--- /home/fdroid/fdroiddata/tmp/com.poppingmoon.aria_912.apk +++ /home/fdroid/fdroiddata/tmp/sigcp_com.poppingmoon.aria_912.apk ├── zipinfo {} │ @@ -4,15 +4,15 @@ │ -rw-r--r-- 0.0 unx 1711 b- stor 81-Jan-01 01:01 assets/dexopt/baseline.prof │ -rw-r--r-- 0.0 unx 274 b- stor 81-Jan-01 01:01 assets/dexopt/baseline.profm │ -rw-r--r-- 0.0 unx 4808580 b- defN 81-Jan-01 01:01 classes.dex │ -rw-r--r-- 0.0 unx 213840 b- defN 81-Jan-01 01:01 classes2.dex │ -rw-r--r-- 0.0 unx 27165276 b- stor 81-Jan-01 01:01 lib/armeabi-v7a/libapp.so │ -rw-r--r-- 0.0 unx 4416 b- stor 81-Jan-01 01:01 lib/armeabi-v7a/libdatastore_shared_counter.so │ -rw-r--r-- 0.0 unx 8276468 b- stor 81-Jan-01 01:01 lib/armeabi-v7a/libflutter.so │ --rw-r--r-- 0.0 unx 898580 b- stor 81-Jan-01 01:01 lib/armeabi-v7a/libisar.so │ +-rw-r--r-- 0.0 unx 898596 b- stor 81-Jan-01 01:01 lib/armeabi-v7a/libisar.so │ -rw-r--r-- 0.0 unx 5565940 b- stor 81-Jan-01 01:01 lib/armeabi-v7a/librust_lib_aria.so │ -rw-r--r-- 0.0 unx 304792 b- stor 81-Jan-01 01:01 lib/armeabi-v7a/libwebcrypto.so │ -rw-r--r-- 0.0 unx 480382 b- defN 81-Jan-01 01:01 assets/flutter_assets/AssetManifest.bin │ -rw-r--r-- 0.0 unx 5877 b- defN 81-Jan-01 01:01 assets/flutter_assets/FontManifest.json │ -rw-r--r-- 0.0 unx 146487 b- defN 81-Jan-01 01:01 assets/flutter_assets/NOTICES.Z │ -rw-r--r-- 0.0 unx 45 b- defN 81-Jan-01 01:01 assets/flutter_assets/NativeAssetsManifest.json │ -rw-r--r-- 0.0 unx 56284 b- stor 81-Jan-01 01:01 assets/flutter_assets/assets/bird.webp │ @@ -4811,8 +4811,8 @@ │ -rw---- 0.0 fat 2463 b- stor 81-Jan-01 01:01 res/zV.9.png │ -rw---- 0.0 fat 956 b- defN 81-Jan-01 01:01 res/zc.xml │ -rw---- 0.0 fat 925 b- stor 81-Jan-01 01:01 res/zk.png │ -rw---- 0.0 fat 308 b- defN 81-Jan-01 01:01 res/zn.xml │ -rw---- 0.0 fat 464 b- defN 81-Jan-01 01:01 res/zq.xml │ -rw---- 0.0 fat 400 b- defN 81-Jan-01 01:01 res/zz.xml │ -rw---- 0.0 fat 647952 b- stor 81-Jan-01 01:01 resources.arsc │ -4816 files, 165307513 bytes uncompressed, 118197972 bytes compressed: 28.5% │ +4816 files, 165307529 bytes uncompressed, 118197988 bytes compressed: 28.5% ├── lib/armeabi-v7a/libisar.so │ ├── readelf --wide --file-header {} │ │ @@ -6,15 +6,15 @@ │ │ OS/ABI: UNIX - System V │ │ ABI Version: 0 │ │ Type: DYN (Shared object file) │ │ Machine: ARM │ │ Version: 0x1 │ │ Entry point address: 0x0 │ │ Start of program headers: 52 (bytes into file) │ │ - Start of section headers: 897540 (bytes into file) │ │ + Start of section headers: 897556 (bytes into file) │ │ Flags: 0x5000200, Version5 EABI, soft-float ABI │ │ Size of this header: 52 (bytes) │ │ Size of program headers: 32 (bytes) │ │ Number of program headers: 10 │ │ Size of section headers: 40 (bytes) │ │ Number of section headers: 26 │ │ Section header string table index: 25 │ ├── readelf --wide --program-header {} │ │ @@ -3,22 +3,22 @@ │ │ Entry point 0x0 │ │ There are 10 program headers, starting at offset 52 │ │ │ │ Program Headers: │ │ Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align │ │ PHDR 0x000034 0x00000034 0x00000034 0x00140 0x00140 R 0x4 │ │ LOAD 0x000000 0x00000000 0x00000000 0x20cbe 0x20cbe R 0x1000 │ │ - LOAD 0x020cc0 0x00021cc0 0x00021cc0 0xb7250 0xb7250 R E 0x1000 │ │ - LOAD 0x0d7f10 0x000d9f10 0x000d9f10 0x02970 0x030f0 RW 0x1000 │ │ - LOAD 0x0da880 0x000dd880 0x000dd880 0x0069c 0x01055 RW 0x1000 │ │ - DYNAMIC 0x0da5a8 0x000dc5a8 0x000dc5a8 0x000c8 0x000c8 RW 0x4 │ │ - GNU_RELRO 0x0d7f10 0x000d9f10 0x000d9f10 0x02970 0x030f0 R 0x1 │ │ + LOAD 0x020cc0 0x00021cc0 0x00021cc0 0xb7260 0xb7260 R E 0x1000 │ │ + LOAD 0x0d7f20 0x000d9f20 0x000d9f20 0x02970 0x030e0 RW 0x1000 │ │ + LOAD 0x0da890 0x000dd890 0x000dd890 0x0069c 0x01065 RW 0x1000 │ │ + DYNAMIC 0x0da5b8 0x000dc5b8 0x000dc5b8 0x000c8 0x000c8 RW 0x4 │ │ + GNU_RELRO 0x0d7f20 0x000d9f20 0x000d9f20 0x02970 0x030e0 R 0x1 │ │ GNU_STACK 0x000000 0x00000000 0x00000000 0x00000 0x00000 RW 0 │ │ NOTE 0x000174 0x00000174 0x00000174 0x00098 0x00098 R 0x4 │ │ - ARM_EXIDX 0x003dcc 0x00003dcc 0x00003dcc 0x01ef0 0x01ef0 R 0x4 │ │ + ARM_EXIDX 0x003dcc 0x00003dcc 0x00003dcc 0x01ee8 0x01ee8 R 0x4 │ │ │ │ Section to Segment mapping: │ │ Segment Sections... │ │ 00 │ │ 01 .note.android.ident .dynsym .gnu.version .gnu.version_r .gnu.hash .dynstr .rel.dyn .ARM.exidx .rel.plt .ARM.extab .rodata │ │ 02 .text .plt │ │ 03 .data.rel.ro .fini_array .init_array .dynamic .got .got.plt .relro_padding │ ├── readelf --wide --sections {} │ │ @@ -1,35 +1,35 @@ │ │ -There are 26 section headers, starting at offset 0xdb204: │ │ +There are 26 section headers, starting at offset 0xdb214: │ │ │ │ Section Headers: │ │ [Nr] Name Type Addr Off Size ES Flg Lk Inf Al │ │ [ 0] NULL 00000000 000000 000000 00 0 0 0 │ │ [ 1] .note.android.ident NOTE 00000174 000174 000098 00 A 0 0 4 │ │ [ 2] .dynsym DYNSYM 0000020c 00020c 000d70 10 A 6 1 4 │ │ [ 3] .gnu.version VERSYM 00000f7c 000f7c 0001ae 02 A 2 0 2 │ │ [ 4] .gnu.version_r VERNEED 0000112c 00112c 000050 00 A 6 2 4 │ │ [ 5] .gnu.hash GNU_HASH 0000117c 00117c 0002e0 00 A 2 0 4 │ │ [ 6] .dynstr STRTAB 0000145c 00145c 000cad 00 A 0 0 1 │ │ [ 7] .rel.dyn REL 0000210c 00210c 001cc0 08 A 2 0 4 │ │ - [ 8] .ARM.exidx ARM_EXIDX 00003dcc 003dcc 001ef0 00 AL 12 0 4 │ │ - [ 9] .rel.plt REL 00005cbc 005cbc 0003c0 08 AI 2 19 4 │ │ - [10] .ARM.extab PROGBITS 0000607c 00607c 0020a4 00 A 0 0 4 │ │ + [ 8] .ARM.exidx ARM_EXIDX 00003dcc 003dcc 001ee8 00 AL 12 0 4 │ │ + [ 9] .rel.plt REL 00005cb4 005cb4 0003c0 08 AI 2 19 4 │ │ + [10] .ARM.extab PROGBITS 00006074 006074 0020a4 00 A 0 0 4 │ │ [11] .rodata PROGBITS 00008140 008140 018b7e 00 AMS 0 0 64 │ │ - [12] .text PROGBITS 00021cc0 020cc0 0b6ab0 00 AX 0 0 16 │ │ - [13] .plt PROGBITS 000d8770 0d7770 0007a0 00 AX 0 0 16 │ │ - [14] .data.rel.ro PROGBITS 000d9f10 0d7f10 002688 00 WA 0 0 8 │ │ - [15] .fini_array FINI_ARRAY 000dc598 0da598 00000c 00 WA 0 0 4 │ │ - [16] .init_array INIT_ARRAY 000dc5a4 0da5a4 000004 00 WA 0 0 4 │ │ - [17] .dynamic DYNAMIC 000dc5a8 0da5a8 0000c8 08 WA 6 0 4 │ │ - [18] .got PROGBITS 000dc670 0da670 000024 00 WA 0 0 4 │ │ - [19] .got.plt PROGBITS 000dc694 0da694 0001ec 00 WA 0 0 4 │ │ - [20] .relro_padding NOBITS 000dc880 0da880 000780 00 WA 0 0 1 │ │ - [21] .data PROGBITS 000dd880 0da880 00069c 00 WA 0 0 8 │ │ - [22] .bss NOBITS 000ddf20 0daf1c 0009b5 00 WA 0 0 32 │ │ - [23] .comment PROGBITS 00000000 0daf1c 0001b0 01 MS 0 0 1 │ │ - [24] .ARM.attributes ARM_ATTRIBUTES 00000000 0db0cc 00003c 00 0 0 1 │ │ - [25] .shstrtab STRTAB 00000000 0db108 0000fa 00 0 0 1 │ │ + [12] .text PROGBITS 00021cc0 020cc0 0b6ac0 00 AX 0 0 16 │ │ + [13] .plt PROGBITS 000d8780 0d7780 0007a0 00 AX 0 0 16 │ │ + [14] .data.rel.ro PROGBITS 000d9f20 0d7f20 002688 00 WA 0 0 8 │ │ + [15] .fini_array FINI_ARRAY 000dc5a8 0da5a8 00000c 00 WA 0 0 4 │ │ + [16] .init_array INIT_ARRAY 000dc5b4 0da5b4 000004 00 WA 0 0 4 │ │ + [17] .dynamic DYNAMIC 000dc5b8 0da5b8 0000c8 08 WA 6 0 4 │ │ + [18] .got PROGBITS 000dc680 0da680 000024 00 WA 0 0 4 │ │ + [19] .got.plt PROGBITS 000dc6a4 0da6a4 0001ec 00 WA 0 0 4 │ │ + [20] .relro_padding NOBITS 000dc890 0da890 000770 00 WA 0 0 1 │ │ + [21] .data PROGBITS 000dd890 0da890 00069c 00 WA 0 0 8 │ │ + [22] .bss NOBITS 000ddf40 0daf2c 0009b5 00 WA 0 0 32 │ │ + [23] .comment PROGBITS 00000000 0daf2c 0001b0 01 MS 0 0 1 │ │ + [24] .ARM.attributes ARM_ATTRIBUTES 00000000 0db0dc 00003c 00 0 0 1 │ │ + [25] .shstrtab STRTAB 00000000 0db118 0000fa 00 0 0 1 │ │ Key to Flags: │ │ W (write), A (alloc), X (execute), M (merge), S (strings), I (info), │ │ L (link order), O (extra OS processing required), G (group), T (TLS), │ │ C (compressed), x (unknown), o (OS specific), E (exclude), │ │ D (mbind), y (purecode), p (processor specific) │ ├── readelf --wide --symbols {} │ │ @@ -119,100 +119,100 @@ │ │ 115: 00000000 0 FUNC GLOBAL DEFAULT UND pthread_cond_broadcast@LIBC (2) │ │ 116: 00000000 0 FUNC GLOBAL DEFAULT UND pthread_cond_timedwait@LIBC (2) │ │ 117: 00000000 0 FUNC GLOBAL DEFAULT UND memset@LIBC (2) │ │ 118: 00000000 0 FUNC GLOBAL DEFAULT UND pthread_once@LIBC (2) │ │ 119: 00000000 0 FUNC GLOBAL DEFAULT UND memcpy@LIBC (2) │ │ 120: 00000000 0 FUNC GLOBAL DEFAULT UND dl_unwind_find_exidx@LIBC (3) │ │ 121: 00000000 0 OBJECT GLOBAL DEFAULT UND __sF@LIBC (2) │ │ - 122: 00038ca7 28 FUNC GLOBAL DEFAULT 12 isar_free_string │ │ - 123: 0003be81 120 FUNC GLOBAL DEFAULT 12 isar_q_aggregate_long_result │ │ - 124: 00037551 696 FUNC GLOBAL DEFAULT 12 isar_filter_long │ │ - 125: 00037809 72 FUNC GLOBAL DEFAULT 12 isar_filter_not │ │ - 126: 00039169 92 FUNC GLOBAL DEFAULT 12 isar_get_size │ │ - 127: 00039fd1 412 FUNC GLOBAL DEFAULT 12 isar_instance_create_async │ │ - 128: 0003a16d 116 FUNC GLOBAL DEFAULT 12 isar_instance_get_collection │ │ - 129: 0003a1e1 80 FUNC GLOBAL DEFAULT 12 isar_instance_get_path │ │ - 130: 0003a99d 94 FUNC GLOBAL DEFAULT 12 isar_key_add_double │ │ - 131: 0003b775 336 FUNC GLOBAL DEFAULT 12 isar_key_add_string_list_hash │ │ - 132: 0003b9cd 104 FUNC GLOBAL DEFAULT 12 isar_link_unlink │ │ - 133: 0003c7e1 1164 FUNC GLOBAL DEFAULT 12 isar_qb_build │ │ - 134: 00038159 392 FUNC GLOBAL DEFAULT 12 isar_filter_string_starts_with │ │ - 135: 0003a2dd 224 FUNC GLOBAL DEFAULT 12 isar_json_import │ │ - 136: 0003bef9 92 FUNC GLOBAL DEFAULT 12 isar_q_delete │ │ - 137: 00036dad 216 FUNC GLOBAL DEFAULT 12 isar_delete_all_by_index │ │ - 138: 000371f5 356 FUNC GLOBAL DEFAULT 12 isar_filter_link │ │ - 139: 00037fd1 392 FUNC GLOBAL DEFAULT 12 isar_filter_string_matches │ │ - 140: 00038e55 128 FUNC GLOBAL DEFAULT 12 isar_get_by_index │ │ - 141: 0003b05d 68 FUNC GLOBAL DEFAULT 12 isar_key_add_long │ │ - 142: 0003c333 576 FUNC GLOBAL DEFAULT 12 isar_qb_add_index_where_clause │ │ - 143: 00036c79 40 FUNC GLOBAL DEFAULT 12 isar_connect_dart_api │ │ - 144: 00036e85 124 FUNC GLOBAL DEFAULT 12 isar_delete_by_index │ │ - 145: 00038c85 24 FUNC GLOBAL DEFAULT 12 isar_free_c_object_set │ │ - 146: 00038d25 84 FUNC GLOBAL DEFAULT 12 isar_get_all │ │ - 147: 0003aae1 1404 FUNC GLOBAL DEFAULT 12 isar_key_add_int_list_hash │ │ - 148: 0003bcb9 84 FUNC GLOBAL DEFAULT 12 isar_put_all │ │ - 149: 0003c6d1 272 FUNC GLOBAL DEFAULT 12 isar_qb_add_sort_by │ │ - 150: 0003d411 12 FUNC GLOBAL DEFAULT 12 isar_version │ │ - 151: 00038c9d 10 FUNC GLOBAL DEFAULT 12 isar_free_json │ │ - 152: 0003b92b 58 FUNC GLOBAL DEFAULT 12 isar_key_increase │ │ - 153: 00036fc9 432 FUNC GLOBAL DEFAULT 12 isar_filter_double │ │ - 154: 0003ba35 96 FUNC GLOBAL DEFAULT 12 isar_link_unlink_all │ │ - 155: 0003ccfd 52 FUNC GLOBAL DEFAULT 12 isar_stop_watching │ │ - 156: 0003a3bd 34 FUNC GLOBAL DEFAULT 12 isar_key_add_byte │ │ - 157: 0003bf55 228 FUNC GLOBAL DEFAULT 12 isar_q_export_json │ │ - 158: 0003c575 348 FUNC GLOBAL DEFAULT 12 isar_qb_add_link_where_clause │ │ - 159: 0003cce1 26 FUNC GLOBAL DEFAULT 12 isar_qb_set_offset_limit │ │ - 160: 00037495 188 FUNC GLOBAL DEFAULT 12 isar_filter_list_length │ │ - 161: 0003a3e1 1468 FUNC GLOBAL DEFAULT 12 isar_key_add_byte_list_hash │ │ - 162: 0003b965 104 FUNC GLOBAL DEFAULT 12 isar_link │ │ - 163: 0003d41d 204 FUNC GLOBAL DEFAULT 12 isar_watch_collection │ │ - 164: 0003d5c1 1748 FUNC GLOBAL DEFAULT 12 isar_watch_query │ │ - 165: 00037851 102 FUNC GLOBAL DEFAULT 12 isar_filter_null │ │ - 166: 00038cc3 14 FUNC GLOBAL DEFAULT 12 isar_free_word_boundaries │ │ - 167: 0003b8c5 38 FUNC GLOBAL DEFAULT 12 isar_key_create │ │ - 168: 00036ca1 84 FUNC GLOBAL DEFAULT 12 isar_count │ │ - 169: 00036d51 92 FUNC GLOBAL DEFAULT 12 isar_delete_all │ │ - 170: 0003b8eb 64 FUNC GLOBAL DEFAULT 12 isar_key_decrease │ │ - 171: 0003bd69 92 FUNC GLOBAL DEFAULT 12 isar_put_by_index │ │ - 172: 00037359 316 FUNC GLOBAL DEFAULT 12 isar_filter_link_length │ │ - 173: 00037a11 688 FUNC GLOBAL DEFAULT 12 isar_filter_string │ │ - 174: 000382e1 2468 FUNC GLOBAL DEFAULT 12 isar_find_word_boundaries │ │ - 175: 0003aa01 168 FUNC GLOBAL DEFAULT 12 isar_key_add_float │ │ - 176: 0003c039 88 FUNC GLOBAL DEFAULT 12 isar_q_find │ │ - 177: 0003d205 524 FUNC GLOBAL DEFAULT 12 isar_verify │ │ - 178: 00038d79 220 FUNC GLOBAL DEFAULT 12 isar_get_all_by_index │ │ - 179: 0003bd0d 92 FUNC GLOBAL DEFAULT 12 isar_put_all_by_index │ │ - 180: 0003931d 3252 FUNC GLOBAL DEFAULT 12 isar_instance_create │ │ - 181: 00036cf5 92 FUNC GLOBAL DEFAULT 12 isar_delete │ │ - 182: 0003d4e9 216 FUNC GLOBAL DEFAULT 12 isar_watch_object │ │ - 183: 000391cd 8 FUNC GLOBAL DEFAULT 12 isar_instance_close_and_delete │ │ - 184: 0003cd31 736 FUNC GLOBAL DEFAULT 12 isar_txn_begin │ │ - 185: 000378b9 308 FUNC GLOBAL DEFAULT 12 isar_filter_object │ │ - 186: 00036c29 80 FUNC GLOBAL DEFAULT 12 isar_clear │ │ - 187: 00037cc1 392 FUNC GLOBAL DEFAULT 12 isar_filter_string_contains │ │ - 188: 0003a231 92 FUNC GLOBAL DEFAULT 12 isar_instance_get_size │ │ - 189: 00038ed5 372 FUNC GLOBAL DEFAULT 12 isar_get_error │ │ - 190: 000391c5 8 FUNC GLOBAL DEFAULT 12 isar_instance_close │ │ - 191: 000391d5 328 FUNC GLOBAL DEFAULT 12 isar_instance_copy_to_file │ │ - 192: 0003b0a1 1404 FUNC GLOBAL DEFAULT 12 isar_key_add_long_list_hash │ │ - 193: 0003b61d 148 FUNC GLOBAL DEFAULT 12 isar_key_add_string │ │ - 194: 0003ba95 124 FUNC GLOBAL DEFAULT 12 isar_link_update_all │ │ - 195: 0003bdc5 132 FUNC GLOBAL DEFAULT 12 isar_q_aggregate │ │ - 196: 0003be49 56 FUNC GLOBAL DEFAULT 12 isar_q_aggregate_double_result │ │ - 197: 0003c091 266 FUNC GLOBAL DEFAULT 12 isar_q_free │ │ - 198: 0003b6b1 196 FUNC GLOBAL DEFAULT 12 isar_key_add_string_hash │ │ - 199: 0003bb11 328 FUNC GLOBAL DEFAULT 12 isar_link_verify │ │ - 200: 0003bc59 12 FUNC GLOBAL DEFAULT 12 isar_mdbx_version │ │ - 201: 0003d011 500 FUNC GLOBAL DEFAULT 12 isar_txn_finish │ │ - 202: 00036f01 198 FUNC GLOBAL DEFAULT 12 isar_filter_and_or_xor │ │ - 203: 00037179 122 FUNC GLOBAL DEFAULT 12 isar_filter_id │ │ - 204: 000379ed 36 FUNC GLOBAL DEFAULT 12 isar_filter_static │ │ - 205: 00037e49 392 FUNC GLOBAL DEFAULT 12 isar_filter_string_ends_with │ │ - 206: 00038cd1 84 FUNC GLOBAL DEFAULT 12 isar_get │ │ - 207: 00039049 288 FUNC GLOBAL DEFAULT 12 isar_get_offsets │ │ - 208: 0003c281 178 FUNC GLOBAL DEFAULT 12 isar_qb_add_id_where_clause │ │ - 209: 0003a28d 80 FUNC GLOBAL DEFAULT 12 isar_instance_verify │ │ - 210: 0003aaa9 56 FUNC GLOBAL DEFAULT 12 isar_key_add_int │ │ - 211: 0003cc6d 68 FUNC GLOBAL DEFAULT 12 isar_qb_create │ │ - 212: 0003bc65 84 FUNC GLOBAL DEFAULT 12 isar_put │ │ - 213: 0003c19d 228 FUNC GLOBAL DEFAULT 12 isar_qb_add_distinct_by │ │ - 214: 0003ccb1 48 FUNC GLOBAL DEFAULT 12 isar_qb_set_filter │ │ + 122: 00038faf 28 FUNC GLOBAL DEFAULT 12 isar_free_string │ │ + 123: 0003c189 120 FUNC GLOBAL DEFAULT 12 isar_q_aggregate_long_result │ │ + 124: 00037859 696 FUNC GLOBAL DEFAULT 12 isar_filter_long │ │ + 125: 00037b11 72 FUNC GLOBAL DEFAULT 12 isar_filter_not │ │ + 126: 00039471 92 FUNC GLOBAL DEFAULT 12 isar_get_size │ │ + 127: 0003a2d9 412 FUNC GLOBAL DEFAULT 12 isar_instance_create_async │ │ + 128: 0003a475 116 FUNC GLOBAL DEFAULT 12 isar_instance_get_collection │ │ + 129: 0003a4e9 80 FUNC GLOBAL DEFAULT 12 isar_instance_get_path │ │ + 130: 0003aca5 94 FUNC GLOBAL DEFAULT 12 isar_key_add_double │ │ + 131: 0003ba7d 336 FUNC GLOBAL DEFAULT 12 isar_key_add_string_list_hash │ │ + 132: 0003bcd5 104 FUNC GLOBAL DEFAULT 12 isar_link_unlink │ │ + 133: 0003cae9 1164 FUNC GLOBAL DEFAULT 12 isar_qb_build │ │ + 134: 00038461 392 FUNC GLOBAL DEFAULT 12 isar_filter_string_starts_with │ │ + 135: 0003a5e5 224 FUNC GLOBAL DEFAULT 12 isar_json_import │ │ + 136: 0003c201 92 FUNC GLOBAL DEFAULT 12 isar_q_delete │ │ + 137: 000370b5 216 FUNC GLOBAL DEFAULT 12 isar_delete_all_by_index │ │ + 138: 000374fd 356 FUNC GLOBAL DEFAULT 12 isar_filter_link │ │ + 139: 000382d9 392 FUNC GLOBAL DEFAULT 12 isar_filter_string_matches │ │ + 140: 0003915d 128 FUNC GLOBAL DEFAULT 12 isar_get_by_index │ │ + 141: 0003b365 68 FUNC GLOBAL DEFAULT 12 isar_key_add_long │ │ + 142: 0003c63b 576 FUNC GLOBAL DEFAULT 12 isar_qb_add_index_where_clause │ │ + 143: 00036f81 40 FUNC GLOBAL DEFAULT 12 isar_connect_dart_api │ │ + 144: 0003718d 124 FUNC GLOBAL DEFAULT 12 isar_delete_by_index │ │ + 145: 00038f8d 24 FUNC GLOBAL DEFAULT 12 isar_free_c_object_set │ │ + 146: 0003902d 84 FUNC GLOBAL DEFAULT 12 isar_get_all │ │ + 147: 0003ade9 1404 FUNC GLOBAL DEFAULT 12 isar_key_add_int_list_hash │ │ + 148: 0003bfc1 84 FUNC GLOBAL DEFAULT 12 isar_put_all │ │ + 149: 0003c9d9 272 FUNC GLOBAL DEFAULT 12 isar_qb_add_sort_by │ │ + 150: 0003d719 12 FUNC GLOBAL DEFAULT 12 isar_version │ │ + 151: 00038fa5 10 FUNC GLOBAL DEFAULT 12 isar_free_json │ │ + 152: 0003bc33 58 FUNC GLOBAL DEFAULT 12 isar_key_increase │ │ + 153: 000372d1 432 FUNC GLOBAL DEFAULT 12 isar_filter_double │ │ + 154: 0003bd3d 96 FUNC GLOBAL DEFAULT 12 isar_link_unlink_all │ │ + 155: 0003d005 52 FUNC GLOBAL DEFAULT 12 isar_stop_watching │ │ + 156: 0003a6c5 34 FUNC GLOBAL DEFAULT 12 isar_key_add_byte │ │ + 157: 0003c25d 228 FUNC GLOBAL DEFAULT 12 isar_q_export_json │ │ + 158: 0003c87d 348 FUNC GLOBAL DEFAULT 12 isar_qb_add_link_where_clause │ │ + 159: 0003cfe9 26 FUNC GLOBAL DEFAULT 12 isar_qb_set_offset_limit │ │ + 160: 0003779d 188 FUNC GLOBAL DEFAULT 12 isar_filter_list_length │ │ + 161: 0003a6e9 1468 FUNC GLOBAL DEFAULT 12 isar_key_add_byte_list_hash │ │ + 162: 0003bc6d 104 FUNC GLOBAL DEFAULT 12 isar_link │ │ + 163: 0003d725 204 FUNC GLOBAL DEFAULT 12 isar_watch_collection │ │ + 164: 0003d8c9 1748 FUNC GLOBAL DEFAULT 12 isar_watch_query │ │ + 165: 00037b59 102 FUNC GLOBAL DEFAULT 12 isar_filter_null │ │ + 166: 00038fcb 14 FUNC GLOBAL DEFAULT 12 isar_free_word_boundaries │ │ + 167: 0003bbcd 38 FUNC GLOBAL DEFAULT 12 isar_key_create │ │ + 168: 00036fa9 84 FUNC GLOBAL DEFAULT 12 isar_count │ │ + 169: 00037059 92 FUNC GLOBAL DEFAULT 12 isar_delete_all │ │ + 170: 0003bbf3 64 FUNC GLOBAL DEFAULT 12 isar_key_decrease │ │ + 171: 0003c071 92 FUNC GLOBAL DEFAULT 12 isar_put_by_index │ │ + 172: 00037661 316 FUNC GLOBAL DEFAULT 12 isar_filter_link_length │ │ + 173: 00037d19 688 FUNC GLOBAL DEFAULT 12 isar_filter_string │ │ + 174: 000385e9 2468 FUNC GLOBAL DEFAULT 12 isar_find_word_boundaries │ │ + 175: 0003ad09 168 FUNC GLOBAL DEFAULT 12 isar_key_add_float │ │ + 176: 0003c341 88 FUNC GLOBAL DEFAULT 12 isar_q_find │ │ + 177: 0003d50d 524 FUNC GLOBAL DEFAULT 12 isar_verify │ │ + 178: 00039081 220 FUNC GLOBAL DEFAULT 12 isar_get_all_by_index │ │ + 179: 0003c015 92 FUNC GLOBAL DEFAULT 12 isar_put_all_by_index │ │ + 180: 00039625 3252 FUNC GLOBAL DEFAULT 12 isar_instance_create │ │ + 181: 00036ffd 92 FUNC GLOBAL DEFAULT 12 isar_delete │ │ + 182: 0003d7f1 216 FUNC GLOBAL DEFAULT 12 isar_watch_object │ │ + 183: 000394d5 8 FUNC GLOBAL DEFAULT 12 isar_instance_close_and_delete │ │ + 184: 0003d039 736 FUNC GLOBAL DEFAULT 12 isar_txn_begin │ │ + 185: 00037bc1 308 FUNC GLOBAL DEFAULT 12 isar_filter_object │ │ + 186: 00036f31 80 FUNC GLOBAL DEFAULT 12 isar_clear │ │ + 187: 00037fc9 392 FUNC GLOBAL DEFAULT 12 isar_filter_string_contains │ │ + 188: 0003a539 92 FUNC GLOBAL DEFAULT 12 isar_instance_get_size │ │ + 189: 000391dd 372 FUNC GLOBAL DEFAULT 12 isar_get_error │ │ + 190: 000394cd 8 FUNC GLOBAL DEFAULT 12 isar_instance_close │ │ + 191: 000394dd 328 FUNC GLOBAL DEFAULT 12 isar_instance_copy_to_file │ │ + 192: 0003b3a9 1404 FUNC GLOBAL DEFAULT 12 isar_key_add_long_list_hash │ │ + 193: 0003b925 148 FUNC GLOBAL DEFAULT 12 isar_key_add_string │ │ + 194: 0003bd9d 124 FUNC GLOBAL DEFAULT 12 isar_link_update_all │ │ + 195: 0003c0cd 132 FUNC GLOBAL DEFAULT 12 isar_q_aggregate │ │ + 196: 0003c151 56 FUNC GLOBAL DEFAULT 12 isar_q_aggregate_double_result │ │ + 197: 0003c399 266 FUNC GLOBAL DEFAULT 12 isar_q_free │ │ + 198: 0003b9b9 196 FUNC GLOBAL DEFAULT 12 isar_key_add_string_hash │ │ + 199: 0003be19 328 FUNC GLOBAL DEFAULT 12 isar_link_verify │ │ + 200: 0003bf61 12 FUNC GLOBAL DEFAULT 12 isar_mdbx_version │ │ + 201: 0003d319 500 FUNC GLOBAL DEFAULT 12 isar_txn_finish │ │ + 202: 00037209 198 FUNC GLOBAL DEFAULT 12 isar_filter_and_or_xor │ │ + 203: 00037481 122 FUNC GLOBAL DEFAULT 12 isar_filter_id │ │ + 204: 00037cf5 36 FUNC GLOBAL DEFAULT 12 isar_filter_static │ │ + 205: 00038151 392 FUNC GLOBAL DEFAULT 12 isar_filter_string_ends_with │ │ + 206: 00038fd9 84 FUNC GLOBAL DEFAULT 12 isar_get │ │ + 207: 00039351 288 FUNC GLOBAL DEFAULT 12 isar_get_offsets │ │ + 208: 0003c589 178 FUNC GLOBAL DEFAULT 12 isar_qb_add_id_where_clause │ │ + 209: 0003a595 80 FUNC GLOBAL DEFAULT 12 isar_instance_verify │ │ + 210: 0003adb1 56 FUNC GLOBAL DEFAULT 12 isar_key_add_int │ │ + 211: 0003cf75 68 FUNC GLOBAL DEFAULT 12 isar_qb_create │ │ + 212: 0003bf6d 84 FUNC GLOBAL DEFAULT 12 isar_put │ │ + 213: 0003c4a5 228 FUNC GLOBAL DEFAULT 12 isar_qb_add_distinct_by │ │ + 214: 0003cfb9 48 FUNC GLOBAL DEFAULT 12 isar_qb_set_filter │ ├── readelf --wide --relocs {} │ │ @@ -1,17 +1,16 @@ │ │ │ │ Relocation section '.rel.dyn' at offset 0x210c contains 920 entries: │ │ Offset Info Type Sym. Value Symbol's Name │ │ -000d9f10 00000017 R_ARM_RELATIVE │ │ -000d9f14 00000017 R_ARM_RELATIVE │ │ 000d9f20 00000017 R_ARM_RELATIVE │ │ -000d9f24 00000017 R_ARM_RELATIVE │ │ -000d9f40 00000017 R_ARM_RELATIVE │ │ +000d9f30 00000017 R_ARM_RELATIVE │ │ +000d9f34 00000017 R_ARM_RELATIVE │ │ 000d9f50 00000017 R_ARM_RELATIVE │ │ 000d9f54 00000017 R_ARM_RELATIVE │ │ +000d9f60 00000017 R_ARM_RELATIVE │ │ 000d9f64 00000017 R_ARM_RELATIVE │ │ 000d9f74 00000017 R_ARM_RELATIVE │ │ 000d9f84 00000017 R_ARM_RELATIVE │ │ 000d9f94 00000017 R_ARM_RELATIVE │ │ 000d9fa4 00000017 R_ARM_RELATIVE │ │ 000d9fb4 00000017 R_ARM_RELATIVE │ │ 000d9fc4 00000017 R_ARM_RELATIVE │ │ @@ -22,165 +21,164 @@ │ │ 000da014 00000017 R_ARM_RELATIVE │ │ 000da024 00000017 R_ARM_RELATIVE │ │ 000da034 00000017 R_ARM_RELATIVE │ │ 000da044 00000017 R_ARM_RELATIVE │ │ 000da054 00000017 R_ARM_RELATIVE │ │ 000da064 00000017 R_ARM_RELATIVE │ │ 000da074 00000017 R_ARM_RELATIVE │ │ -000da080 00000017 R_ARM_RELATIVE │ │ 000da084 00000017 R_ARM_RELATIVE │ │ -000da088 00000017 R_ARM_RELATIVE │ │ +000da090 00000017 R_ARM_RELATIVE │ │ +000da094 00000017 R_ARM_RELATIVE │ │ 000da098 00000017 R_ARM_RELATIVE │ │ 000da09c 00000017 R_ARM_RELATIVE │ │ 000da0a8 00000017 R_ARM_RELATIVE │ │ -000da0ac 00000017 R_ARM_RELATIVE │ │ 000da0b8 00000017 R_ARM_RELATIVE │ │ 000da0bc 00000017 R_ARM_RELATIVE │ │ 000da0c8 00000017 R_ARM_RELATIVE │ │ 000da0cc 00000017 R_ARM_RELATIVE │ │ 000da0d8 00000017 R_ARM_RELATIVE │ │ -000da0dc 00000017 R_ARM_RELATIVE │ │ 000da0e8 00000017 R_ARM_RELATIVE │ │ 000da0ec 00000017 R_ARM_RELATIVE │ │ 000da0f8 00000017 R_ARM_RELATIVE │ │ +000da0fc 00000017 R_ARM_RELATIVE │ │ 000da108 00000017 R_ARM_RELATIVE │ │ 000da10c 00000017 R_ARM_RELATIVE │ │ 000da118 00000017 R_ARM_RELATIVE │ │ 000da11c 00000017 R_ARM_RELATIVE │ │ -000da138 00000017 R_ARM_RELATIVE │ │ -000da13c 00000017 R_ARM_RELATIVE │ │ +000da128 00000017 R_ARM_RELATIVE │ │ +000da12c 00000017 R_ARM_RELATIVE │ │ +000da148 00000017 R_ARM_RELATIVE │ │ 000da14c 00000017 R_ARM_RELATIVE │ │ 000da15c 00000017 R_ARM_RELATIVE │ │ -000da168 00000017 R_ARM_RELATIVE │ │ 000da16c 00000017 R_ARM_RELATIVE │ │ +000da178 00000017 R_ARM_RELATIVE │ │ 000da17c 00000017 R_ARM_RELATIVE │ │ -000da188 00000017 R_ARM_RELATIVE │ │ 000da18c 00000017 R_ARM_RELATIVE │ │ +000da198 00000017 R_ARM_RELATIVE │ │ 000da19c 00000017 R_ARM_RELATIVE │ │ 000da1ac 00000017 R_ARM_RELATIVE │ │ -000da1c8 00000017 R_ARM_RELATIVE │ │ +000da1bc 00000017 R_ARM_RELATIVE │ │ 000da1d8 00000017 R_ARM_RELATIVE │ │ 000da1e8 00000017 R_ARM_RELATIVE │ │ -000da1ec 00000017 R_ARM_RELATIVE │ │ 000da1f8 00000017 R_ARM_RELATIVE │ │ +000da1fc 00000017 R_ARM_RELATIVE │ │ 000da208 00000017 R_ARM_RELATIVE │ │ 000da218 00000017 R_ARM_RELATIVE │ │ 000da228 00000017 R_ARM_RELATIVE │ │ 000da238 00000017 R_ARM_RELATIVE │ │ 000da248 00000017 R_ARM_RELATIVE │ │ -000da24c 00000017 R_ARM_RELATIVE │ │ 000da258 00000017 R_ARM_RELATIVE │ │ +000da25c 00000017 R_ARM_RELATIVE │ │ 000da268 00000017 R_ARM_RELATIVE │ │ -000da26c 00000017 R_ARM_RELATIVE │ │ 000da278 00000017 R_ARM_RELATIVE │ │ 000da27c 00000017 R_ARM_RELATIVE │ │ 000da288 00000017 R_ARM_RELATIVE │ │ +000da28c 00000017 R_ARM_RELATIVE │ │ 000da298 00000017 R_ARM_RELATIVE │ │ -000da29c 00000017 R_ARM_RELATIVE │ │ 000da2a8 00000017 R_ARM_RELATIVE │ │ +000da2ac 00000017 R_ARM_RELATIVE │ │ 000da2b8 00000017 R_ARM_RELATIVE │ │ 000da2c8 00000017 R_ARM_RELATIVE │ │ -000da2cc 00000017 R_ARM_RELATIVE │ │ -000da2e8 00000017 R_ARM_RELATIVE │ │ -000da2ec 00000017 R_ARM_RELATIVE │ │ +000da2d8 00000017 R_ARM_RELATIVE │ │ +000da2dc 00000017 R_ARM_RELATIVE │ │ 000da2f8 00000017 R_ARM_RELATIVE │ │ +000da2fc 00000017 R_ARM_RELATIVE │ │ 000da308 00000017 R_ARM_RELATIVE │ │ 000da318 00000017 R_ARM_RELATIVE │ │ 000da328 00000017 R_ARM_RELATIVE │ │ 000da338 00000017 R_ARM_RELATIVE │ │ 000da348 00000017 R_ARM_RELATIVE │ │ 000da358 00000017 R_ARM_RELATIVE │ │ -000da35c 00000017 R_ARM_RELATIVE │ │ +000da368 00000017 R_ARM_RELATIVE │ │ 000da36c 00000017 R_ARM_RELATIVE │ │ 000da37c 00000017 R_ARM_RELATIVE │ │ 000da38c 00000017 R_ARM_RELATIVE │ │ 000da39c 00000017 R_ARM_RELATIVE │ │ 000da3ac 00000017 R_ARM_RELATIVE │ │ 000da3bc 00000017 R_ARM_RELATIVE │ │ 000da3cc 00000017 R_ARM_RELATIVE │ │ 000da3dc 00000017 R_ARM_RELATIVE │ │ 000da3ec 00000017 R_ARM_RELATIVE │ │ -000da408 00000017 R_ARM_RELATIVE │ │ +000da3fc 00000017 R_ARM_RELATIVE │ │ 000da418 00000017 R_ARM_RELATIVE │ │ -000da41c 00000017 R_ARM_RELATIVE │ │ +000da428 00000017 R_ARM_RELATIVE │ │ 000da42c 00000017 R_ARM_RELATIVE │ │ 000da43c 00000017 R_ARM_RELATIVE │ │ 000da44c 00000017 R_ARM_RELATIVE │ │ -000da454 00000017 R_ARM_RELATIVE │ │ +000da45c 00000017 R_ARM_RELATIVE │ │ 000da464 00000017 R_ARM_RELATIVE │ │ 000da474 00000017 R_ARM_RELATIVE │ │ 000da484 00000017 R_ARM_RELATIVE │ │ -000da4a0 00000017 R_ARM_RELATIVE │ │ -000da4a4 00000017 R_ARM_RELATIVE │ │ +000da494 00000017 R_ARM_RELATIVE │ │ +000da4b0 00000017 R_ARM_RELATIVE │ │ 000da4b4 00000017 R_ARM_RELATIVE │ │ -000da4b8 00000017 R_ARM_RELATIVE │ │ +000da4c4 00000017 R_ARM_RELATIVE │ │ 000da4c8 00000017 R_ARM_RELATIVE │ │ -000da4cc 00000017 R_ARM_RELATIVE │ │ -000da4d0 00000017 R_ARM_RELATIVE │ │ +000da4d8 00000017 R_ARM_RELATIVE │ │ +000da4dc 00000017 R_ARM_RELATIVE │ │ 000da4e0 00000017 R_ARM_RELATIVE │ │ 000da4f0 00000017 R_ARM_RELATIVE │ │ 000da500 00000017 R_ARM_RELATIVE │ │ 000da510 00000017 R_ARM_RELATIVE │ │ 000da520 00000017 R_ARM_RELATIVE │ │ 000da530 00000017 R_ARM_RELATIVE │ │ 000da540 00000017 R_ARM_RELATIVE │ │ 000da550 00000017 R_ARM_RELATIVE │ │ 000da560 00000017 R_ARM_RELATIVE │ │ -000da57c 00000017 R_ARM_RELATIVE │ │ -000da580 00000017 R_ARM_RELATIVE │ │ -000da584 00000017 R_ARM_RELATIVE │ │ -000da588 00000017 R_ARM_RELATIVE │ │ -000da5a4 00000017 R_ARM_RELATIVE │ │ -000da5a8 00000017 R_ARM_RELATIVE │ │ +000da570 00000017 R_ARM_RELATIVE │ │ +000da58c 00000017 R_ARM_RELATIVE │ │ +000da590 00000017 R_ARM_RELATIVE │ │ +000da594 00000017 R_ARM_RELATIVE │ │ +000da598 00000017 R_ARM_RELATIVE │ │ 000da5b4 00000017 R_ARM_RELATIVE │ │ 000da5b8 00000017 R_ARM_RELATIVE │ │ -000da5bc 00000017 R_ARM_RELATIVE │ │ -000da5c0 00000017 R_ARM_RELATIVE │ │ +000da5c4 00000017 R_ARM_RELATIVE │ │ +000da5c8 00000017 R_ARM_RELATIVE │ │ +000da5cc 00000017 R_ARM_RELATIVE │ │ 000da5d0 00000017 R_ARM_RELATIVE │ │ 000da5e0 00000017 R_ARM_RELATIVE │ │ 000da5f0 00000017 R_ARM_RELATIVE │ │ 000da600 00000017 R_ARM_RELATIVE │ │ 000da610 00000017 R_ARM_RELATIVE │ │ -000da62c 00000017 R_ARM_RELATIVE │ │ -000da630 00000017 R_ARM_RELATIVE │ │ -000da634 00000017 R_ARM_RELATIVE │ │ -000da638 00000017 R_ARM_RELATIVE │ │ +000da620 00000017 R_ARM_RELATIVE │ │ +000da63c 00000017 R_ARM_RELATIVE │ │ +000da640 00000017 R_ARM_RELATIVE │ │ +000da644 00000017 R_ARM_RELATIVE │ │ 000da648 00000017 R_ARM_RELATIVE │ │ 000da658 00000017 R_ARM_RELATIVE │ │ 000da668 00000017 R_ARM_RELATIVE │ │ 000da678 00000017 R_ARM_RELATIVE │ │ 000da688 00000017 R_ARM_RELATIVE │ │ 000da698 00000017 R_ARM_RELATIVE │ │ 000da6a8 00000017 R_ARM_RELATIVE │ │ -000da6c4 00000017 R_ARM_RELATIVE │ │ -000da6c8 00000017 R_ARM_RELATIVE │ │ +000da6b8 00000017 R_ARM_RELATIVE │ │ +000da6d4 00000017 R_ARM_RELATIVE │ │ 000da6d8 00000017 R_ARM_RELATIVE │ │ 000da6e8 00000017 R_ARM_RELATIVE │ │ 000da6f8 00000017 R_ARM_RELATIVE │ │ 000da708 00000017 R_ARM_RELATIVE │ │ 000da718 00000017 R_ARM_RELATIVE │ │ 000da728 00000017 R_ARM_RELATIVE │ │ 000da738 00000017 R_ARM_RELATIVE │ │ -000da754 00000017 R_ARM_RELATIVE │ │ -000da758 00000017 R_ARM_RELATIVE │ │ +000da748 00000017 R_ARM_RELATIVE │ │ +000da764 00000017 R_ARM_RELATIVE │ │ 000da768 00000017 R_ARM_RELATIVE │ │ 000da778 00000017 R_ARM_RELATIVE │ │ -000da78c 00000017 R_ARM_RELATIVE │ │ -000da790 00000017 R_ARM_RELATIVE │ │ +000da788 00000017 R_ARM_RELATIVE │ │ +000da79c 00000017 R_ARM_RELATIVE │ │ 000da7a0 00000017 R_ARM_RELATIVE │ │ 000da7b0 00000017 R_ARM_RELATIVE │ │ 000da7c0 00000017 R_ARM_RELATIVE │ │ 000da7d0 00000017 R_ARM_RELATIVE │ │ 000da7e0 00000017 R_ARM_RELATIVE │ │ 000da7f0 00000017 R_ARM_RELATIVE │ │ 000da800 00000017 R_ARM_RELATIVE │ │ 000da810 00000017 R_ARM_RELATIVE │ │ 000da820 00000017 R_ARM_RELATIVE │ │ 000da830 00000017 R_ARM_RELATIVE │ │ -000da838 00000017 R_ARM_RELATIVE │ │ 000da840 00000017 R_ARM_RELATIVE │ │ 000da848 00000017 R_ARM_RELATIVE │ │ 000da850 00000017 R_ARM_RELATIVE │ │ 000da858 00000017 R_ARM_RELATIVE │ │ 000da860 00000017 R_ARM_RELATIVE │ │ 000da868 00000017 R_ARM_RELATIVE │ │ 000da870 00000017 R_ARM_RELATIVE │ │ @@ -198,33 +196,34 @@ │ │ 000da8d0 00000017 R_ARM_RELATIVE │ │ 000da8d8 00000017 R_ARM_RELATIVE │ │ 000da8e0 00000017 R_ARM_RELATIVE │ │ 000da8e8 00000017 R_ARM_RELATIVE │ │ 000da8f0 00000017 R_ARM_RELATIVE │ │ 000da8f8 00000017 R_ARM_RELATIVE │ │ 000da900 00000017 R_ARM_RELATIVE │ │ -000da90c 00000017 R_ARM_RELATIVE │ │ +000da908 00000017 R_ARM_RELATIVE │ │ 000da910 00000017 R_ARM_RELATIVE │ │ 000da91c 00000017 R_ARM_RELATIVE │ │ 000da920 00000017 R_ARM_RELATIVE │ │ 000da92c 00000017 R_ARM_RELATIVE │ │ -000da930 00000017 R_ARM_RELATIVE │ │ 000da93c 00000017 R_ARM_RELATIVE │ │ 000da940 00000017 R_ARM_RELATIVE │ │ 000da94c 00000017 R_ARM_RELATIVE │ │ +000da950 00000017 R_ARM_RELATIVE │ │ 000da95c 00000017 R_ARM_RELATIVE │ │ 000da960 00000017 R_ARM_RELATIVE │ │ 000da96c 00000017 R_ARM_RELATIVE │ │ 000da970 00000017 R_ARM_RELATIVE │ │ 000da97c 00000017 R_ARM_RELATIVE │ │ 000da980 00000017 R_ARM_RELATIVE │ │ 000da98c 00000017 R_ARM_RELATIVE │ │ 000da990 00000017 R_ARM_RELATIVE │ │ 000da99c 00000017 R_ARM_RELATIVE │ │ 000da9a0 00000017 R_ARM_RELATIVE │ │ +000da9ac 00000017 R_ARM_RELATIVE │ │ 000da9b0 00000017 R_ARM_RELATIVE │ │ 000da9c0 00000017 R_ARM_RELATIVE │ │ 000da9d0 00000017 R_ARM_RELATIVE │ │ 000da9e0 00000017 R_ARM_RELATIVE │ │ 000da9f0 00000017 R_ARM_RELATIVE │ │ 000daa00 00000017 R_ARM_RELATIVE │ │ 000daa10 00000017 R_ARM_RELATIVE │ │ @@ -246,15 +245,15 @@ │ │ 000dab10 00000017 R_ARM_RELATIVE │ │ 000dab20 00000017 R_ARM_RELATIVE │ │ 000dab30 00000017 R_ARM_RELATIVE │ │ 000dab40 00000017 R_ARM_RELATIVE │ │ 000dab50 00000017 R_ARM_RELATIVE │ │ 000dab60 00000017 R_ARM_RELATIVE │ │ 000dab70 00000017 R_ARM_RELATIVE │ │ -000dab8c 00000017 R_ARM_RELATIVE │ │ +000dab80 00000017 R_ARM_RELATIVE │ │ 000dab9c 00000017 R_ARM_RELATIVE │ │ 000dabac 00000017 R_ARM_RELATIVE │ │ 000dabbc 00000017 R_ARM_RELATIVE │ │ 000dabcc 00000017 R_ARM_RELATIVE │ │ 000dabdc 00000017 R_ARM_RELATIVE │ │ 000dabec 00000017 R_ARM_RELATIVE │ │ 000dabfc 00000017 R_ARM_RELATIVE │ │ @@ -262,15 +261,15 @@ │ │ 000dac1c 00000017 R_ARM_RELATIVE │ │ 000dac2c 00000017 R_ARM_RELATIVE │ │ 000dac3c 00000017 R_ARM_RELATIVE │ │ 000dac4c 00000017 R_ARM_RELATIVE │ │ 000dac5c 00000017 R_ARM_RELATIVE │ │ 000dac6c 00000017 R_ARM_RELATIVE │ │ 000dac7c 00000017 R_ARM_RELATIVE │ │ -000dac80 00000017 R_ARM_RELATIVE │ │ +000dac8c 00000017 R_ARM_RELATIVE │ │ 000dac90 00000017 R_ARM_RELATIVE │ │ 000daca0 00000017 R_ARM_RELATIVE │ │ 000dacb0 00000017 R_ARM_RELATIVE │ │ 000dacc0 00000017 R_ARM_RELATIVE │ │ 000dacd0 00000017 R_ARM_RELATIVE │ │ 000dace0 00000017 R_ARM_RELATIVE │ │ 000dacf0 00000017 R_ARM_RELATIVE │ │ @@ -344,33 +343,33 @@ │ │ 000db130 00000017 R_ARM_RELATIVE │ │ 000db140 00000017 R_ARM_RELATIVE │ │ 000db150 00000017 R_ARM_RELATIVE │ │ 000db160 00000017 R_ARM_RELATIVE │ │ 000db170 00000017 R_ARM_RELATIVE │ │ 000db180 00000017 R_ARM_RELATIVE │ │ 000db190 00000017 R_ARM_RELATIVE │ │ -000db19c 00000017 R_ARM_RELATIVE │ │ 000db1a0 00000017 R_ARM_RELATIVE │ │ 000db1ac 00000017 R_ARM_RELATIVE │ │ +000db1b0 00000017 R_ARM_RELATIVE │ │ 000db1bc 00000017 R_ARM_RELATIVE │ │ -000db1c0 00000017 R_ARM_RELATIVE │ │ 000db1cc 00000017 R_ARM_RELATIVE │ │ +000db1d0 00000017 R_ARM_RELATIVE │ │ 000db1dc 00000017 R_ARM_RELATIVE │ │ -000db1e0 00000017 R_ARM_RELATIVE │ │ +000db1ec 00000017 R_ARM_RELATIVE │ │ 000db1f0 00000017 R_ARM_RELATIVE │ │ 000db200 00000017 R_ARM_RELATIVE │ │ -000db20c 00000017 R_ARM_RELATIVE │ │ +000db210 00000017 R_ARM_RELATIVE │ │ 000db21c 00000017 R_ARM_RELATIVE │ │ -000db220 00000017 R_ARM_RELATIVE │ │ +000db22c 00000017 R_ARM_RELATIVE │ │ 000db230 00000017 R_ARM_RELATIVE │ │ -000db24c 00000017 R_ARM_RELATIVE │ │ -000db250 00000017 R_ARM_RELATIVE │ │ +000db240 00000017 R_ARM_RELATIVE │ │ +000db25c 00000017 R_ARM_RELATIVE │ │ 000db260 00000017 R_ARM_RELATIVE │ │ -000db264 00000017 R_ARM_RELATIVE │ │ -000db268 00000017 R_ARM_RELATIVE │ │ +000db270 00000017 R_ARM_RELATIVE │ │ +000db274 00000017 R_ARM_RELATIVE │ │ 000db278 00000017 R_ARM_RELATIVE │ │ 000db288 00000017 R_ARM_RELATIVE │ │ 000db298 00000017 R_ARM_RELATIVE │ │ 000db2a8 00000017 R_ARM_RELATIVE │ │ 000db2b8 00000017 R_ARM_RELATIVE │ │ 000db2c8 00000017 R_ARM_RELATIVE │ │ 000db2d8 00000017 R_ARM_RELATIVE │ │ @@ -424,22 +423,22 @@ │ │ 000db5d8 00000017 R_ARM_RELATIVE │ │ 000db5e8 00000017 R_ARM_RELATIVE │ │ 000db5f8 00000017 R_ARM_RELATIVE │ │ 000db608 00000017 R_ARM_RELATIVE │ │ 000db618 00000017 R_ARM_RELATIVE │ │ 000db628 00000017 R_ARM_RELATIVE │ │ 000db638 00000017 R_ARM_RELATIVE │ │ -000db654 00000017 R_ARM_RELATIVE │ │ +000db648 00000017 R_ARM_RELATIVE │ │ 000db664 00000017 R_ARM_RELATIVE │ │ 000db674 00000017 R_ARM_RELATIVE │ │ 000db684 00000017 R_ARM_RELATIVE │ │ 000db694 00000017 R_ARM_RELATIVE │ │ -000db698 00000017 R_ARM_RELATIVE │ │ -000db69c 00000017 R_ARM_RELATIVE │ │ -000db6a0 00000017 R_ARM_RELATIVE │ │ +000db6a4 00000017 R_ARM_RELATIVE │ │ +000db6a8 00000017 R_ARM_RELATIVE │ │ +000db6ac 00000017 R_ARM_RELATIVE │ │ 000db6b0 00000017 R_ARM_RELATIVE │ │ 000db6c0 00000017 R_ARM_RELATIVE │ │ 000db6d0 00000017 R_ARM_RELATIVE │ │ 000db6e0 00000017 R_ARM_RELATIVE │ │ 000db6f0 00000017 R_ARM_RELATIVE │ │ 000db700 00000017 R_ARM_RELATIVE │ │ 000db710 00000017 R_ARM_RELATIVE │ │ @@ -463,160 +462,160 @@ │ │ 000db830 00000017 R_ARM_RELATIVE │ │ 000db840 00000017 R_ARM_RELATIVE │ │ 000db850 00000017 R_ARM_RELATIVE │ │ 000db860 00000017 R_ARM_RELATIVE │ │ 000db870 00000017 R_ARM_RELATIVE │ │ 000db880 00000017 R_ARM_RELATIVE │ │ 000db890 00000017 R_ARM_RELATIVE │ │ -000db89c 00000017 R_ARM_RELATIVE │ │ 000db8a0 00000017 R_ARM_RELATIVE │ │ -000db8a4 00000017 R_ARM_RELATIVE │ │ -000db8a8 00000017 R_ARM_RELATIVE │ │ +000db8ac 00000017 R_ARM_RELATIVE │ │ +000db8b0 00000017 R_ARM_RELATIVE │ │ +000db8b4 00000017 R_ARM_RELATIVE │ │ 000db8b8 00000017 R_ARM_RELATIVE │ │ 000db8c8 00000017 R_ARM_RELATIVE │ │ 000db8d8 00000017 R_ARM_RELATIVE │ │ 000db8e8 00000017 R_ARM_RELATIVE │ │ -000db904 00000017 R_ARM_RELATIVE │ │ -000db908 00000017 R_ARM_RELATIVE │ │ +000db8f8 00000017 R_ARM_RELATIVE │ │ +000db914 00000017 R_ARM_RELATIVE │ │ 000db918 00000017 R_ARM_RELATIVE │ │ 000db928 00000017 R_ARM_RELATIVE │ │ 000db938 00000017 R_ARM_RELATIVE │ │ 000db948 00000017 R_ARM_RELATIVE │ │ 000db958 00000017 R_ARM_RELATIVE │ │ 000db968 00000017 R_ARM_RELATIVE │ │ 000db978 00000017 R_ARM_RELATIVE │ │ 000db988 00000017 R_ARM_RELATIVE │ │ 000db998 00000017 R_ARM_RELATIVE │ │ 000db9a8 00000017 R_ARM_RELATIVE │ │ 000db9b8 00000017 R_ARM_RELATIVE │ │ 000db9c8 00000017 R_ARM_RELATIVE │ │ -000db9cc 00000017 R_ARM_RELATIVE │ │ +000db9d8 00000017 R_ARM_RELATIVE │ │ 000db9dc 00000017 R_ARM_RELATIVE │ │ 000db9e8 00000017 R_ARM_RELATIVE │ │ 000db9ec 00000017 R_ARM_RELATIVE │ │ 000db9f0 00000017 R_ARM_RELATIVE │ │ 000db9f4 00000017 R_ARM_RELATIVE │ │ -000dba00 00000017 R_ARM_RELATIVE │ │ 000dba04 00000017 R_ARM_RELATIVE │ │ -000dba08 00000017 R_ARM_RELATIVE │ │ -000dba0c 00000017 R_ARM_RELATIVE │ │ +000dba10 00000017 R_ARM_RELATIVE │ │ +000dba14 00000017 R_ARM_RELATIVE │ │ +000dba18 00000017 R_ARM_RELATIVE │ │ 000dba1c 00000017 R_ARM_RELATIVE │ │ -000dba20 00000017 R_ARM_RELATIVE │ │ +000dba2c 00000017 R_ARM_RELATIVE │ │ 000dba30 00000017 R_ARM_RELATIVE │ │ 000dba40 00000017 R_ARM_RELATIVE │ │ -000dba54 00000017 R_ARM_RELATIVE │ │ -000dba58 00000017 R_ARM_RELATIVE │ │ +000dba50 00000017 R_ARM_RELATIVE │ │ +000dba64 00000017 R_ARM_RELATIVE │ │ 000dba68 00000017 R_ARM_RELATIVE │ │ 000dba78 00000017 R_ARM_RELATIVE │ │ 000dba88 00000017 R_ARM_RELATIVE │ │ -000dbaa4 00000017 R_ARM_RELATIVE │ │ -000dbaa8 00000017 R_ARM_RELATIVE │ │ -000dbaac 00000017 R_ARM_RELATIVE │ │ +000dba98 00000017 R_ARM_RELATIVE │ │ +000dbab4 00000017 R_ARM_RELATIVE │ │ +000dbab8 00000017 R_ARM_RELATIVE │ │ 000dbabc 00000017 R_ARM_RELATIVE │ │ -000dbac0 00000017 R_ARM_RELATIVE │ │ -000dbac4 00000017 R_ARM_RELATIVE │ │ -000dbac8 00000017 R_ARM_RELATIVE │ │ +000dbacc 00000017 R_ARM_RELATIVE │ │ +000dbad0 00000017 R_ARM_RELATIVE │ │ +000dbad4 00000017 R_ARM_RELATIVE │ │ 000dbad8 00000017 R_ARM_RELATIVE │ │ -000dbae4 00000017 R_ARM_RELATIVE │ │ -000dbaf0 00000017 R_ARM_RELATIVE │ │ +000dbae8 00000017 R_ARM_RELATIVE │ │ +000dbaf4 00000017 R_ARM_RELATIVE │ │ 000dbb00 00000017 R_ARM_RELATIVE │ │ 000dbb10 00000017 R_ARM_RELATIVE │ │ 000dbb20 00000017 R_ARM_RELATIVE │ │ 000dbb30 00000017 R_ARM_RELATIVE │ │ 000dbb40 00000017 R_ARM_RELATIVE │ │ 000dbb50 00000017 R_ARM_RELATIVE │ │ 000dbb60 00000017 R_ARM_RELATIVE │ │ -000dbb6c 00000017 R_ARM_RELATIVE │ │ +000dbb70 00000017 R_ARM_RELATIVE │ │ 000dbb7c 00000017 R_ARM_RELATIVE │ │ 000dbb8c 00000017 R_ARM_RELATIVE │ │ 000dbb9c 00000017 R_ARM_RELATIVE │ │ 000dbbac 00000017 R_ARM_RELATIVE │ │ -000dbbb0 00000017 R_ARM_RELATIVE │ │ 000dbbbc 00000017 R_ARM_RELATIVE │ │ 000dbbc0 00000017 R_ARM_RELATIVE │ │ +000dbbcc 00000017 R_ARM_RELATIVE │ │ 000dbbd0 00000017 R_ARM_RELATIVE │ │ -000dbbd4 00000017 R_ARM_RELATIVE │ │ -000dbbd8 00000017 R_ARM_RELATIVE │ │ +000dbbe0 00000017 R_ARM_RELATIVE │ │ +000dbbe4 00000017 R_ARM_RELATIVE │ │ 000dbbe8 00000017 R_ARM_RELATIVE │ │ 000dbbf8 00000017 R_ARM_RELATIVE │ │ 000dbc08 00000017 R_ARM_RELATIVE │ │ 000dbc18 00000017 R_ARM_RELATIVE │ │ 000dbc28 00000017 R_ARM_RELATIVE │ │ 000dbc38 00000017 R_ARM_RELATIVE │ │ -000dbc54 00000017 R_ARM_RELATIVE │ │ -000dbc58 00000017 R_ARM_RELATIVE │ │ -000dbc5c 00000017 R_ARM_RELATIVE │ │ -000dbc60 00000017 R_ARM_RELATIVE │ │ +000dbc48 00000017 R_ARM_RELATIVE │ │ 000dbc64 00000017 R_ARM_RELATIVE │ │ 000dbc68 00000017 R_ARM_RELATIVE │ │ 000dbc6c 00000017 R_ARM_RELATIVE │ │ 000dbc70 00000017 R_ARM_RELATIVE │ │ +000dbc74 00000017 R_ARM_RELATIVE │ │ +000dbc78 00000017 R_ARM_RELATIVE │ │ +000dbc7c 00000017 R_ARM_RELATIVE │ │ 000dbc80 00000017 R_ARM_RELATIVE │ │ 000dbc90 00000017 R_ARM_RELATIVE │ │ 000dbca0 00000017 R_ARM_RELATIVE │ │ 000dbcb0 00000017 R_ARM_RELATIVE │ │ -000dbcbc 00000017 R_ARM_RELATIVE │ │ 000dbcc0 00000017 R_ARM_RELATIVE │ │ -000dbcc4 00000017 R_ARM_RELATIVE │ │ +000dbccc 00000017 R_ARM_RELATIVE │ │ +000dbcd0 00000017 R_ARM_RELATIVE │ │ 000dbcd4 00000017 R_ARM_RELATIVE │ │ -000dbcd8 00000017 R_ARM_RELATIVE │ │ -000dbcdc 00000017 R_ARM_RELATIVE │ │ -000dbce0 00000017 R_ARM_RELATIVE │ │ 000dbce4 00000017 R_ARM_RELATIVE │ │ +000dbce8 00000017 R_ARM_RELATIVE │ │ +000dbcec 00000017 R_ARM_RELATIVE │ │ 000dbcf0 00000017 R_ARM_RELATIVE │ │ 000dbcf4 00000017 R_ARM_RELATIVE │ │ -000dbcf8 00000017 R_ARM_RELATIVE │ │ -000dbcfc 00000017 R_ARM_RELATIVE │ │ 000dbd00 00000017 R_ARM_RELATIVE │ │ +000dbd04 00000017 R_ARM_RELATIVE │ │ +000dbd08 00000017 R_ARM_RELATIVE │ │ +000dbd0c 00000017 R_ARM_RELATIVE │ │ 000dbd10 00000017 R_ARM_RELATIVE │ │ 000dbd20 00000017 R_ARM_RELATIVE │ │ 000dbd30 00000017 R_ARM_RELATIVE │ │ 000dbd40 00000017 R_ARM_RELATIVE │ │ 000dbd50 00000017 R_ARM_RELATIVE │ │ 000dbd60 00000017 R_ARM_RELATIVE │ │ 000dbd70 00000017 R_ARM_RELATIVE │ │ -000dbd7c 00000017 R_ARM_RELATIVE │ │ 000dbd80 00000017 R_ARM_RELATIVE │ │ 000dbd8c 00000017 R_ARM_RELATIVE │ │ +000dbd90 00000017 R_ARM_RELATIVE │ │ 000dbd9c 00000017 R_ARM_RELATIVE │ │ -000dbda0 00000017 R_ARM_RELATIVE │ │ +000dbdac 00000017 R_ARM_RELATIVE │ │ 000dbdb0 00000017 R_ARM_RELATIVE │ │ 000dbdc0 00000017 R_ARM_RELATIVE │ │ -000dbdcc 00000017 R_ARM_RELATIVE │ │ 000dbdd0 00000017 R_ARM_RELATIVE │ │ 000dbddc 00000017 R_ARM_RELATIVE │ │ 000dbde0 00000017 R_ARM_RELATIVE │ │ -000dbde4 00000017 R_ARM_RELATIVE │ │ -000dbde8 00000017 R_ARM_RELATIVE │ │ 000dbdec 00000017 R_ARM_RELATIVE │ │ 000dbdf0 00000017 R_ARM_RELATIVE │ │ 000dbdf4 00000017 R_ARM_RELATIVE │ │ 000dbdf8 00000017 R_ARM_RELATIVE │ │ 000dbdfc 00000017 R_ARM_RELATIVE │ │ +000dbe00 00000017 R_ARM_RELATIVE │ │ +000dbe04 00000017 R_ARM_RELATIVE │ │ +000dbe08 00000017 R_ARM_RELATIVE │ │ 000dbe0c 00000017 R_ARM_RELATIVE │ │ 000dbe1c 00000017 R_ARM_RELATIVE │ │ 000dbe2c 00000017 R_ARM_RELATIVE │ │ 000dbe3c 00000017 R_ARM_RELATIVE │ │ 000dbe4c 00000017 R_ARM_RELATIVE │ │ 000dbe5c 00000017 R_ARM_RELATIVE │ │ 000dbe6c 00000017 R_ARM_RELATIVE │ │ 000dbe7c 00000017 R_ARM_RELATIVE │ │ 000dbe8c 00000017 R_ARM_RELATIVE │ │ 000dbe9c 00000017 R_ARM_RELATIVE │ │ 000dbeac 00000017 R_ARM_RELATIVE │ │ -000dbec8 00000017 R_ARM_RELATIVE │ │ -000dbecc 00000017 R_ARM_RELATIVE │ │ +000dbebc 00000017 R_ARM_RELATIVE │ │ +000dbed8 00000017 R_ARM_RELATIVE │ │ 000dbedc 00000017 R_ARM_RELATIVE │ │ 000dbeec 00000017 R_ARM_RELATIVE │ │ 000dbefc 00000017 R_ARM_RELATIVE │ │ 000dbf0c 00000017 R_ARM_RELATIVE │ │ 000dbf1c 00000017 R_ARM_RELATIVE │ │ 000dbf2c 00000017 R_ARM_RELATIVE │ │ -000dbf38 00000017 R_ARM_RELATIVE │ │ 000dbf3c 00000017 R_ARM_RELATIVE │ │ +000dbf48 00000017 R_ARM_RELATIVE │ │ 000dbf4c 00000017 R_ARM_RELATIVE │ │ 000dbf5c 00000017 R_ARM_RELATIVE │ │ 000dbf6c 00000017 R_ARM_RELATIVE │ │ 000dbf7c 00000017 R_ARM_RELATIVE │ │ 000dbf8c 00000017 R_ARM_RELATIVE │ │ 000dbf9c 00000017 R_ARM_RELATIVE │ │ 000dbfac 00000017 R_ARM_RELATIVE │ │ @@ -639,51 +638,48 @@ │ │ 000dc0bc 00000017 R_ARM_RELATIVE │ │ 000dc0cc 00000017 R_ARM_RELATIVE │ │ 000dc0dc 00000017 R_ARM_RELATIVE │ │ 000dc0ec 00000017 R_ARM_RELATIVE │ │ 000dc0fc 00000017 R_ARM_RELATIVE │ │ 000dc10c 00000017 R_ARM_RELATIVE │ │ 000dc11c 00000017 R_ARM_RELATIVE │ │ -000dc128 00000017 R_ARM_RELATIVE │ │ 000dc12c 00000017 R_ARM_RELATIVE │ │ 000dc138 00000017 R_ARM_RELATIVE │ │ 000dc13c 00000017 R_ARM_RELATIVE │ │ 000dc148 00000017 R_ARM_RELATIVE │ │ 000dc14c 00000017 R_ARM_RELATIVE │ │ 000dc158 00000017 R_ARM_RELATIVE │ │ 000dc15c 00000017 R_ARM_RELATIVE │ │ 000dc168 00000017 R_ARM_RELATIVE │ │ 000dc16c 00000017 R_ARM_RELATIVE │ │ 000dc178 00000017 R_ARM_RELATIVE │ │ 000dc17c 00000017 R_ARM_RELATIVE │ │ +000dc188 00000017 R_ARM_RELATIVE │ │ 000dc18c 00000017 R_ARM_RELATIVE │ │ 000dc19c 00000017 R_ARM_RELATIVE │ │ 000dc1ac 00000017 R_ARM_RELATIVE │ │ 000dc1bc 00000017 R_ARM_RELATIVE │ │ -000dc1c0 00000017 R_ARM_RELATIVE │ │ -000dc1c4 00000017 R_ARM_RELATIVE │ │ -000dc1c8 00000017 R_ARM_RELATIVE │ │ 000dc1cc 00000017 R_ARM_RELATIVE │ │ 000dc1d0 00000017 R_ARM_RELATIVE │ │ +000dc1d4 00000017 R_ARM_RELATIVE │ │ 000dc1d8 00000017 R_ARM_RELATIVE │ │ 000dc1dc 00000017 R_ARM_RELATIVE │ │ 000dc1e0 00000017 R_ARM_RELATIVE │ │ 000dc1e8 00000017 R_ARM_RELATIVE │ │ 000dc1ec 00000017 R_ARM_RELATIVE │ │ 000dc1f0 00000017 R_ARM_RELATIVE │ │ -000dc1f4 00000017 R_ARM_RELATIVE │ │ 000dc1f8 00000017 R_ARM_RELATIVE │ │ +000dc1fc 00000017 R_ARM_RELATIVE │ │ +000dc200 00000017 R_ARM_RELATIVE │ │ 000dc204 00000017 R_ARM_RELATIVE │ │ 000dc208 00000017 R_ARM_RELATIVE │ │ -000dc20c 00000017 R_ARM_RELATIVE │ │ -000dc210 00000017 R_ARM_RELATIVE │ │ +000dc214 00000017 R_ARM_RELATIVE │ │ 000dc218 00000017 R_ARM_RELATIVE │ │ 000dc21c 00000017 R_ARM_RELATIVE │ │ 000dc220 00000017 R_ARM_RELATIVE │ │ -000dc224 00000017 R_ARM_RELATIVE │ │ 000dc228 00000017 R_ARM_RELATIVE │ │ 000dc22c 00000017 R_ARM_RELATIVE │ │ 000dc230 00000017 R_ARM_RELATIVE │ │ 000dc234 00000017 R_ARM_RELATIVE │ │ 000dc238 00000017 R_ARM_RELATIVE │ │ 000dc23c 00000017 R_ARM_RELATIVE │ │ 000dc240 00000017 R_ARM_RELATIVE │ │ @@ -858,35 +854,35 @@ │ │ 000dc4e4 00000017 R_ARM_RELATIVE │ │ 000dc4e8 00000017 R_ARM_RELATIVE │ │ 000dc4ec 00000017 R_ARM_RELATIVE │ │ 000dc4f0 00000017 R_ARM_RELATIVE │ │ 000dc4f4 00000017 R_ARM_RELATIVE │ │ 000dc4f8 00000017 R_ARM_RELATIVE │ │ 000dc4fc 00000017 R_ARM_RELATIVE │ │ +000dc500 00000017 R_ARM_RELATIVE │ │ 000dc504 00000017 R_ARM_RELATIVE │ │ 000dc508 00000017 R_ARM_RELATIVE │ │ 000dc50c 00000017 R_ARM_RELATIVE │ │ -000dc510 00000017 R_ARM_RELATIVE │ │ 000dc514 00000017 R_ARM_RELATIVE │ │ 000dc518 00000017 R_ARM_RELATIVE │ │ 000dc51c 00000017 R_ARM_RELATIVE │ │ 000dc520 00000017 R_ARM_RELATIVE │ │ 000dc524 00000017 R_ARM_RELATIVE │ │ 000dc528 00000017 R_ARM_RELATIVE │ │ 000dc52c 00000017 R_ARM_RELATIVE │ │ +000dc530 00000017 R_ARM_RELATIVE │ │ +000dc534 00000017 R_ARM_RELATIVE │ │ 000dc538 00000017 R_ARM_RELATIVE │ │ 000dc53c 00000017 R_ARM_RELATIVE │ │ -000dc540 00000017 R_ARM_RELATIVE │ │ -000dc544 00000017 R_ARM_RELATIVE │ │ 000dc548 00000017 R_ARM_RELATIVE │ │ 000dc54c 00000017 R_ARM_RELATIVE │ │ +000dc550 00000017 R_ARM_RELATIVE │ │ +000dc554 00000017 R_ARM_RELATIVE │ │ 000dc558 00000017 R_ARM_RELATIVE │ │ 000dc55c 00000017 R_ARM_RELATIVE │ │ -000dc560 00000017 R_ARM_RELATIVE │ │ -000dc564 00000017 R_ARM_RELATIVE │ │ 000dc568 00000017 R_ARM_RELATIVE │ │ 000dc56c 00000017 R_ARM_RELATIVE │ │ 000dc570 00000017 R_ARM_RELATIVE │ │ 000dc574 00000017 R_ARM_RELATIVE │ │ 000dc578 00000017 R_ARM_RELATIVE │ │ 000dc57c 00000017 R_ARM_RELATIVE │ │ 000dc580 00000017 R_ARM_RELATIVE │ │ @@ -895,152 +891,156 @@ │ │ 000dc58c 00000017 R_ARM_RELATIVE │ │ 000dc590 00000017 R_ARM_RELATIVE │ │ 000dc594 00000017 R_ARM_RELATIVE │ │ 000dc598 00000017 R_ARM_RELATIVE │ │ 000dc59c 00000017 R_ARM_RELATIVE │ │ 000dc5a0 00000017 R_ARM_RELATIVE │ │ 000dc5a4 00000017 R_ARM_RELATIVE │ │ -000dc67c 00000017 R_ARM_RELATIVE │ │ -000dc688 00000017 R_ARM_RELATIVE │ │ +000dc5a8 00000017 R_ARM_RELATIVE │ │ +000dc5ac 00000017 R_ARM_RELATIVE │ │ +000dc5b0 00000017 R_ARM_RELATIVE │ │ +000dc5b4 00000017 R_ARM_RELATIVE │ │ 000dc68c 00000017 R_ARM_RELATIVE │ │ -000dc690 00000017 R_ARM_RELATIVE │ │ -000dd89c 00000017 R_ARM_RELATIVE │ │ -000dd8d0 00000017 R_ARM_RELATIVE │ │ -000dd8dc 00000017 R_ARM_RELATIVE │ │ -000dd920 00000017 R_ARM_RELATIVE │ │ -000ddea4 00000017 R_ARM_RELATIVE │ │ -000ddeac 00000017 R_ARM_RELATIVE │ │ +000dc698 00000017 R_ARM_RELATIVE │ │ +000dc69c 00000017 R_ARM_RELATIVE │ │ +000dc6a0 00000017 R_ARM_RELATIVE │ │ +000dd8ac 00000017 R_ARM_RELATIVE │ │ +000dd8e0 00000017 R_ARM_RELATIVE │ │ +000dd8ec 00000017 R_ARM_RELATIVE │ │ +000dd930 00000017 R_ARM_RELATIVE │ │ 000ddeb4 00000017 R_ARM_RELATIVE │ │ 000ddebc 00000017 R_ARM_RELATIVE │ │ -000dded0 00000017 R_ARM_RELATIVE │ │ -000dded8 00000017 R_ARM_RELATIVE │ │ -000ddeec 00000017 R_ARM_RELATIVE │ │ -000ddf00 00000017 R_ARM_RELATIVE │ │ -000ddf04 00000017 R_ARM_RELATIVE │ │ -000dc670 00001615 R_ARM_GLOB_DAT 00000000 getrandom │ │ -000dc674 00001d15 R_ARM_GLOB_DAT 00000000 gettid@LIBC │ │ -000dc678 00004515 R_ARM_GLOB_DAT 00000000 __cxa_thread_atexit │ │ -000dc680 00006315 R_ARM_GLOB_DAT 00000000 stderr@LIBC │ │ -000dc684 00007915 R_ARM_GLOB_DAT 00000000 __sF@LIBC │ │ +000ddec4 00000017 R_ARM_RELATIVE │ │ +000ddecc 00000017 R_ARM_RELATIVE │ │ +000ddee0 00000017 R_ARM_RELATIVE │ │ +000ddee8 00000017 R_ARM_RELATIVE │ │ +000ddefc 00000017 R_ARM_RELATIVE │ │ +000ddf10 00000017 R_ARM_RELATIVE │ │ +000ddf14 00000017 R_ARM_RELATIVE │ │ +000dc680 00001615 R_ARM_GLOB_DAT 00000000 getrandom │ │ +000dc684 00001d15 R_ARM_GLOB_DAT 00000000 gettid@LIBC │ │ +000dc688 00004515 R_ARM_GLOB_DAT 00000000 __cxa_thread_atexit │ │ +000dc690 00006315 R_ARM_GLOB_DAT 00000000 stderr@LIBC │ │ +000dc694 00007915 R_ARM_GLOB_DAT 00000000 __sF@LIBC │ │ │ │ -Relocation section '.rel.plt' at offset 0x5cbc contains 120 entries: │ │ +Relocation section '.rel.plt' at offset 0x5cb4 contains 120 entries: │ │ Offset Info Type Sym. Value Symbol's Name │ │ -000dc6a0 00000116 R_ARM_JUMP_SLOT 00000000 __cxa_finalize@LIBC │ │ -000dc6a4 00000216 R_ARM_JUMP_SLOT 00000000 __cxa_atexit@LIBC │ │ -000dc6a8 00000316 R_ARM_JUMP_SLOT 00000000 __register_atfork@LIBC │ │ -000dc6ac 00000416 R_ARM_JUMP_SLOT 00000000 free@LIBC │ │ -000dc6b0 00000516 R_ARM_JUMP_SLOT 00000000 syscall@LIBC │ │ -000dc6b4 00000616 R_ARM_JUMP_SLOT 00000000 strlen@LIBC │ │ -000dc6b8 00000716 R_ARM_JUMP_SLOT 00000000 malloc@LIBC │ │ -000dc6bc 0000b416 R_ARM_JUMP_SLOT 0003931d isar_instance_create │ │ -000dc6c0 00000816 R_ARM_JUMP_SLOT 00000000 sched_yield@LIBC │ │ -000dc6c4 00000916 R_ARM_JUMP_SLOT 00000000 calloc@LIBC │ │ -000dc6c8 00000a16 R_ARM_JUMP_SLOT 00000000 pthread_getspecific@LIBC │ │ -000dc6cc 00000b16 R_ARM_JUMP_SLOT 00000000 pthread_setspecific@LIBC │ │ -000dc6d0 00000c16 R_ARM_JUMP_SLOT 00000000 __errno@LIBC │ │ -000dc6d4 00000d16 R_ARM_JUMP_SLOT 00000000 memcmp@LIBC │ │ -000dc6d8 00000e16 R_ARM_JUMP_SLOT 00000000 realloc@LIBC │ │ -000dc6dc 00000f16 R_ARM_JUMP_SLOT 00000000 posix_memalign@LIBC │ │ -000dc6e0 00001016 R_ARM_JUMP_SLOT 00000000 sysconf@LIBC │ │ -000dc6e4 00001116 R_ARM_JUMP_SLOT 00000000 pthread_attr_init@LIBC │ │ -000dc6e8 00001216 R_ARM_JUMP_SLOT 00000000 pthread_attr_setstacksize@LIBC │ │ -000dc6ec 00001316 R_ARM_JUMP_SLOT 00000000 pthread_create@LIBC │ │ -000dc6f0 00001416 R_ARM_JUMP_SLOT 00000000 pthread_attr_destroy@LIBC │ │ -000dc6f4 00001516 R_ARM_JUMP_SLOT 00000000 pthread_detach@LIBC │ │ -000dc6f8 00001616 R_ARM_JUMP_SLOT 00000000 getrandom │ │ -000dc6fc 00001716 R_ARM_JUMP_SLOT 00000000 read@LIBC │ │ -000dc700 00001816 R_ARM_JUMP_SLOT 00000000 stat@LIBC │ │ -000dc704 00001916 R_ARM_JUMP_SLOT 00000000 dlsym@LIBC │ │ -000dc708 00001a16 R_ARM_JUMP_SLOT 00000000 strerror_r@LIBC │ │ -000dc70c 00001b16 R_ARM_JUMP_SLOT 00000000 pthread_key_create@LIBC │ │ -000dc710 00001c16 R_ARM_JUMP_SLOT 00000000 pthread_key_delete@LIBC │ │ -000dc714 00001d16 R_ARM_JUMP_SLOT 00000000 gettid@LIBC │ │ -000dc718 00001e16 R_ARM_JUMP_SLOT 00000000 getcwd@LIBC │ │ -000dc71c 00001f16 R_ARM_JUMP_SLOT 00000000 fstat@LIBC │ │ -000dc720 00002016 R_ARM_JUMP_SLOT 00000000 lseek64@LIBC │ │ -000dc724 00002116 R_ARM_JUMP_SLOT 00000000 close@LIBC │ │ -000dc728 00002216 R_ARM_JUMP_SLOT 00000000 dl_iterate_phdr@LIBC │ │ -000dc72c 00002316 R_ARM_JUMP_SLOT 00000000 mmap@LIBC │ │ -000dc730 00002416 R_ARM_JUMP_SLOT 00000000 munmap@LIBC │ │ -000dc734 00002516 R_ARM_JUMP_SLOT 00000000 open@LIBC │ │ -000dc738 00002616 R_ARM_JUMP_SLOT 00000000 realpath@LIBC │ │ -000dc73c 00002716 R_ARM_JUMP_SLOT 00000000 readlink@LIBC │ │ -000dc740 00002816 R_ARM_JUMP_SLOT 00000000 write@LIBC │ │ -000dc744 00002916 R_ARM_JUMP_SLOT 00000000 writev@LIBC │ │ -000dc748 00002a16 R_ARM_JUMP_SLOT 00000000 getenv@LIBC │ │ -000dc74c 00002b16 R_ARM_JUMP_SLOT 00000000 abort@LIBC │ │ -000dc750 00002c16 R_ARM_JUMP_SLOT 00000000 clock_gettime@LIBC │ │ -000dc754 00002d16 R_ARM_JUMP_SLOT 00000000 unlink@LIBC │ │ -000dc758 00002e16 R_ARM_JUMP_SLOT 00000000 rename@LIBC │ │ -000dc75c 00002f16 R_ARM_JUMP_SLOT 00000000 prctl@LIBC │ │ -000dc760 00003016 R_ARM_JUMP_SLOT 00000000 __assert2@LIBC │ │ -000dc764 00003116 R_ARM_JUMP_SLOT 00000000 madvise@LIBC │ │ -000dc768 00003216 R_ARM_JUMP_SLOT 00000000 pthread_self@LIBC │ │ -000dc76c 00003316 R_ARM_JUMP_SLOT 00000000 pthread_mutex_trylock@LIBC │ │ -000dc770 00003416 R_ARM_JUMP_SLOT 00000000 pthread_mutex_lock@LIBC │ │ -000dc774 00003516 R_ARM_JUMP_SLOT 00000000 pthread_mutex_unlock@LIBC │ │ -000dc778 00003616 R_ARM_JUMP_SLOT 00000000 getpid@LIBC │ │ -000dc77c 00003716 R_ARM_JUMP_SLOT 00000000 fcntl@LIBC │ │ -000dc780 00003816 R_ARM_JUMP_SLOT 00000000 flock@LIBC │ │ -000dc784 00003916 R_ARM_JUMP_SLOT 00000000 vsnprintf@LIBC │ │ -000dc788 00003a16 R_ARM_JUMP_SLOT 00000000 pthread_mutex_init@LIBC │ │ -000dc78c 00003b16 R_ARM_JUMP_SLOT 00000000 pthread_mutex_destroy@LIBC │ │ -000dc790 00003c16 R_ARM_JUMP_SLOT 00000000 msync@LIBC │ │ -000dc794 00003d16 R_ARM_JUMP_SLOT 00000000 mkdir@LIBC │ │ -000dc798 00003e16 R_ARM_JUMP_SLOT 00000000 isatty@LIBC │ │ -000dc79c 00003f16 R_ARM_JUMP_SLOT 00000000 dup@LIBC │ │ -000dc7a0 00004016 R_ARM_JUMP_SLOT 00000000 ftruncate@LIBC │ │ -000dc7a4 00004116 R_ARM_JUMP_SLOT 00000000 mremap@LIBC │ │ -000dc7a8 00004216 R_ARM_JUMP_SLOT 00000000 fdatasync@LIBC │ │ -000dc7ac 00004316 R_ARM_JUMP_SLOT 00000000 fsync@LIBC │ │ -000dc7b0 00004416 R_ARM_JUMP_SLOT 00000000 pwrite@LIBC │ │ -000dc7b4 00004516 R_ARM_JUMP_SLOT 00000000 __cxa_thread_atexit │ │ -000dc7b8 00004616 R_ARM_JUMP_SLOT 00000000 __gnu_strerror_r@LIBC │ │ -000dc7bc 00004716 R_ARM_JUMP_SLOT 00000000 snprintf@LIBC │ │ -000dc7c0 00004816 R_ARM_JUMP_SLOT 00000000 strerror@LIBC │ │ -000dc7c4 00004916 R_ARM_JUMP_SLOT 00000000 getrusage@LIBC │ │ -000dc7c8 00004a16 R_ARM_JUMP_SLOT 00000000 uname@LIBC │ │ -000dc7cc 00004b16 R_ARM_JUMP_SLOT 00000000 strtol@LIBC │ │ -000dc7d0 00004c16 R_ARM_JUMP_SLOT 00000000 strstr@LIBC │ │ -000dc7d4 00004d16 R_ARM_JUMP_SLOT 00000000 strcasestr@LIBC │ │ -000dc7d8 00004e16 R_ARM_JUMP_SLOT 00000000 lseek@LIBC │ │ -000dc7dc 00004f16 R_ARM_JUMP_SLOT 00000000 pthread_cond_init@LIBC │ │ -000dc7e0 00005016 R_ARM_JUMP_SLOT 00000000 pthread_join@LIBC │ │ -000dc7e4 00005116 R_ARM_JUMP_SLOT 00000000 pthread_cond_destroy@LIBC │ │ -000dc7e8 00005216 R_ARM_JUMP_SLOT 00000000 sendfile@LIBC │ │ -000dc7ec 00005316 R_ARM_JUMP_SLOT 00000000 sigemptyset@LIBC │ │ -000dc7f0 00005416 R_ARM_JUMP_SLOT 00000000 sigaddset@LIBC │ │ -000dc7f4 00005516 R_ARM_JUMP_SLOT 00000000 pthread_sigmask@LIBC │ │ -000dc7f8 00005616 R_ARM_JUMP_SLOT 00000000 pthread_cond_signal@LIBC │ │ -000dc7fc 00005716 R_ARM_JUMP_SLOT 00000000 pthread_cond_wait@LIBC │ │ -000dc800 00005816 R_ARM_JUMP_SLOT 00000000 sigwait@LIBC │ │ -000dc804 00005916 R_ARM_JUMP_SLOT 00000000 fallocate@LIBC │ │ -000dc808 00005a16 R_ARM_JUMP_SLOT 00000000 fstatfs@LIBC │ │ -000dc80c 00005b16 R_ARM_JUMP_SLOT 00000000 setmntent@LIBC │ │ -000dc810 00005c16 R_ARM_JUMP_SLOT 00000000 getmntent@LIBC │ │ -000dc814 00005d16 R_ARM_JUMP_SLOT 00000000 strcmp@LIBC │ │ -000dc818 00005e16 R_ARM_JUMP_SLOT 00000000 strncmp@LIBC │ │ -000dc81c 00005f16 R_ARM_JUMP_SLOT 00000000 endmntent@LIBC │ │ -000dc820 00006016 R_ARM_JUMP_SLOT 00000000 vfprintf@LIBC │ │ -000dc824 00006116 R_ARM_JUMP_SLOT 00000000 fflush@LIBC │ │ -000dc828 00006216 R_ARM_JUMP_SLOT 00000000 fprintf@LIBC │ │ -000dc82c 00006416 R_ARM_JUMP_SLOT 00000000 pwritev@LIBC_N │ │ -000dc830 00006516 R_ARM_JUMP_SLOT 00000000 mincore@LIBC │ │ -000dc834 00006616 R_ARM_JUMP_SLOT 00000000 fstatvfs@LIBC │ │ -000dc838 00006716 R_ARM_JUMP_SLOT 00000000 getmntent_r@LIBC │ │ -000dc83c 00006816 R_ARM_JUMP_SLOT 00000000 strncasecmp@LIBC │ │ -000dc840 00006916 R_ARM_JUMP_SLOT 00000000 strcasecmp@LIBC │ │ -000dc844 00006a16 R_ARM_JUMP_SLOT 00000000 access@LIBC │ │ -000dc848 00006b16 R_ARM_JUMP_SLOT 00000000 munlock@LIBC │ │ -000dc84c 00006c16 R_ARM_JUMP_SLOT 00000000 pread@LIBC │ │ -000dc850 00006d16 R_ARM_JUMP_SLOT 00000000 statvfs@LIBC │ │ -000dc854 00006e16 R_ARM_JUMP_SLOT 00000000 pthread_mutexattr_init@LIBC │ │ -000dc858 00006f16 R_ARM_JUMP_SLOT 00000000 pthread_mutexattr_setpshared@LIBC │ │ -000dc85c 00007016 R_ARM_JUMP_SLOT 00000000 pthread_mutexattr_destroy@LIBC │ │ -000dc860 00007116 R_ARM_JUMP_SLOT 00000000 pthread_mutexattr_settype@LIBC │ │ -000dc864 00007216 R_ARM_JUMP_SLOT 00000000 usleep@LIBC │ │ -000dc868 00007316 R_ARM_JUMP_SLOT 00000000 pthread_cond_broadcast@LIBC │ │ -000dc86c 00007416 R_ARM_JUMP_SLOT 00000000 pthread_cond_timedwait@LIBC │ │ -000dc870 00007516 R_ARM_JUMP_SLOT 00000000 memset@LIBC │ │ -000dc874 00007616 R_ARM_JUMP_SLOT 00000000 pthread_once@LIBC │ │ -000dc878 00007716 R_ARM_JUMP_SLOT 00000000 memcpy@LIBC │ │ -000dc87c 00007816 R_ARM_JUMP_SLOT 00000000 dl_unwind_find_exidx@LIBC │ │ +000dc6b0 00000116 R_ARM_JUMP_SLOT 00000000 __cxa_finalize@LIBC │ │ +000dc6b4 00000216 R_ARM_JUMP_SLOT 00000000 __cxa_atexit@LIBC │ │ +000dc6b8 00000316 R_ARM_JUMP_SLOT 00000000 __register_atfork@LIBC │ │ +000dc6bc 00000416 R_ARM_JUMP_SLOT 00000000 free@LIBC │ │ +000dc6c0 00000516 R_ARM_JUMP_SLOT 00000000 syscall@LIBC │ │ +000dc6c4 0000b416 R_ARM_JUMP_SLOT 00039625 isar_instance_create │ │ +000dc6c8 00000616 R_ARM_JUMP_SLOT 00000000 strlen@LIBC │ │ +000dc6cc 00000716 R_ARM_JUMP_SLOT 00000000 malloc@LIBC │ │ +000dc6d0 00000816 R_ARM_JUMP_SLOT 00000000 sched_yield@LIBC │ │ +000dc6d4 00000916 R_ARM_JUMP_SLOT 00000000 calloc@LIBC │ │ +000dc6d8 00000a16 R_ARM_JUMP_SLOT 00000000 pthread_getspecific@LIBC │ │ +000dc6dc 00000b16 R_ARM_JUMP_SLOT 00000000 pthread_setspecific@LIBC │ │ +000dc6e0 00000c16 R_ARM_JUMP_SLOT 00000000 __errno@LIBC │ │ +000dc6e4 00000d16 R_ARM_JUMP_SLOT 00000000 memcmp@LIBC │ │ +000dc6e8 00000e16 R_ARM_JUMP_SLOT 00000000 realloc@LIBC │ │ +000dc6ec 00000f16 R_ARM_JUMP_SLOT 00000000 posix_memalign@LIBC │ │ +000dc6f0 00001016 R_ARM_JUMP_SLOT 00000000 sysconf@LIBC │ │ +000dc6f4 00001116 R_ARM_JUMP_SLOT 00000000 pthread_attr_init@LIBC │ │ +000dc6f8 00001216 R_ARM_JUMP_SLOT 00000000 pthread_attr_setstacksize@LIBC │ │ +000dc6fc 00001316 R_ARM_JUMP_SLOT 00000000 pthread_create@LIBC │ │ +000dc700 00001416 R_ARM_JUMP_SLOT 00000000 pthread_attr_destroy@LIBC │ │ +000dc704 00001516 R_ARM_JUMP_SLOT 00000000 pthread_detach@LIBC │ │ +000dc708 00001616 R_ARM_JUMP_SLOT 00000000 getrandom │ │ +000dc70c 00001716 R_ARM_JUMP_SLOT 00000000 read@LIBC │ │ +000dc710 00001816 R_ARM_JUMP_SLOT 00000000 stat@LIBC │ │ +000dc714 00001916 R_ARM_JUMP_SLOT 00000000 dlsym@LIBC │ │ +000dc718 00001a16 R_ARM_JUMP_SLOT 00000000 strerror_r@LIBC │ │ +000dc71c 00001b16 R_ARM_JUMP_SLOT 00000000 pthread_key_create@LIBC │ │ +000dc720 00001c16 R_ARM_JUMP_SLOT 00000000 pthread_key_delete@LIBC │ │ +000dc724 00001d16 R_ARM_JUMP_SLOT 00000000 gettid@LIBC │ │ +000dc728 00001e16 R_ARM_JUMP_SLOT 00000000 getcwd@LIBC │ │ +000dc72c 00001f16 R_ARM_JUMP_SLOT 00000000 fstat@LIBC │ │ +000dc730 00002016 R_ARM_JUMP_SLOT 00000000 lseek64@LIBC │ │ +000dc734 00002116 R_ARM_JUMP_SLOT 00000000 close@LIBC │ │ +000dc738 00002216 R_ARM_JUMP_SLOT 00000000 dl_iterate_phdr@LIBC │ │ +000dc73c 00002316 R_ARM_JUMP_SLOT 00000000 mmap@LIBC │ │ +000dc740 00002416 R_ARM_JUMP_SLOT 00000000 munmap@LIBC │ │ +000dc744 00002516 R_ARM_JUMP_SLOT 00000000 open@LIBC │ │ +000dc748 00002616 R_ARM_JUMP_SLOT 00000000 realpath@LIBC │ │ +000dc74c 00002716 R_ARM_JUMP_SLOT 00000000 readlink@LIBC │ │ +000dc750 00002816 R_ARM_JUMP_SLOT 00000000 write@LIBC │ │ +000dc754 00002916 R_ARM_JUMP_SLOT 00000000 writev@LIBC │ │ +000dc758 00002a16 R_ARM_JUMP_SLOT 00000000 getenv@LIBC │ │ +000dc75c 00002b16 R_ARM_JUMP_SLOT 00000000 abort@LIBC │ │ +000dc760 00002c16 R_ARM_JUMP_SLOT 00000000 clock_gettime@LIBC │ │ +000dc764 00002d16 R_ARM_JUMP_SLOT 00000000 unlink@LIBC │ │ +000dc768 00002e16 R_ARM_JUMP_SLOT 00000000 rename@LIBC │ │ +000dc76c 00002f16 R_ARM_JUMP_SLOT 00000000 prctl@LIBC │ │ +000dc770 00003016 R_ARM_JUMP_SLOT 00000000 __assert2@LIBC │ │ +000dc774 00003116 R_ARM_JUMP_SLOT 00000000 madvise@LIBC │ │ +000dc778 00003216 R_ARM_JUMP_SLOT 00000000 pthread_self@LIBC │ │ +000dc77c 00003316 R_ARM_JUMP_SLOT 00000000 pthread_mutex_trylock@LIBC │ │ +000dc780 00003416 R_ARM_JUMP_SLOT 00000000 pthread_mutex_lock@LIBC │ │ +000dc784 00003516 R_ARM_JUMP_SLOT 00000000 pthread_mutex_unlock@LIBC │ │ +000dc788 00003616 R_ARM_JUMP_SLOT 00000000 getpid@LIBC │ │ +000dc78c 00003716 R_ARM_JUMP_SLOT 00000000 fcntl@LIBC │ │ +000dc790 00003816 R_ARM_JUMP_SLOT 00000000 flock@LIBC │ │ +000dc794 00003916 R_ARM_JUMP_SLOT 00000000 vsnprintf@LIBC │ │ +000dc798 00003a16 R_ARM_JUMP_SLOT 00000000 pthread_mutex_init@LIBC │ │ +000dc79c 00003b16 R_ARM_JUMP_SLOT 00000000 pthread_mutex_destroy@LIBC │ │ +000dc7a0 00003c16 R_ARM_JUMP_SLOT 00000000 msync@LIBC │ │ +000dc7a4 00003d16 R_ARM_JUMP_SLOT 00000000 mkdir@LIBC │ │ +000dc7a8 00003e16 R_ARM_JUMP_SLOT 00000000 isatty@LIBC │ │ +000dc7ac 00003f16 R_ARM_JUMP_SLOT 00000000 dup@LIBC │ │ +000dc7b0 00004016 R_ARM_JUMP_SLOT 00000000 ftruncate@LIBC │ │ +000dc7b4 00004116 R_ARM_JUMP_SLOT 00000000 mremap@LIBC │ │ +000dc7b8 00004216 R_ARM_JUMP_SLOT 00000000 fdatasync@LIBC │ │ +000dc7bc 00004316 R_ARM_JUMP_SLOT 00000000 fsync@LIBC │ │ +000dc7c0 00004416 R_ARM_JUMP_SLOT 00000000 pwrite@LIBC │ │ +000dc7c4 00004516 R_ARM_JUMP_SLOT 00000000 __cxa_thread_atexit │ │ +000dc7c8 00004616 R_ARM_JUMP_SLOT 00000000 __gnu_strerror_r@LIBC │ │ +000dc7cc 00004716 R_ARM_JUMP_SLOT 00000000 snprintf@LIBC │ │ +000dc7d0 00004816 R_ARM_JUMP_SLOT 00000000 strerror@LIBC │ │ +000dc7d4 00004916 R_ARM_JUMP_SLOT 00000000 getrusage@LIBC │ │ +000dc7d8 00004a16 R_ARM_JUMP_SLOT 00000000 uname@LIBC │ │ +000dc7dc 00004b16 R_ARM_JUMP_SLOT 00000000 strtol@LIBC │ │ +000dc7e0 00004c16 R_ARM_JUMP_SLOT 00000000 strstr@LIBC │ │ +000dc7e4 00004d16 R_ARM_JUMP_SLOT 00000000 strcasestr@LIBC │ │ +000dc7e8 00004e16 R_ARM_JUMP_SLOT 00000000 lseek@LIBC │ │ +000dc7ec 00004f16 R_ARM_JUMP_SLOT 00000000 pthread_cond_init@LIBC │ │ +000dc7f0 00005016 R_ARM_JUMP_SLOT 00000000 pthread_join@LIBC │ │ +000dc7f4 00005116 R_ARM_JUMP_SLOT 00000000 pthread_cond_destroy@LIBC │ │ +000dc7f8 00005216 R_ARM_JUMP_SLOT 00000000 sendfile@LIBC │ │ +000dc7fc 00005316 R_ARM_JUMP_SLOT 00000000 sigemptyset@LIBC │ │ +000dc800 00005416 R_ARM_JUMP_SLOT 00000000 sigaddset@LIBC │ │ +000dc804 00005516 R_ARM_JUMP_SLOT 00000000 pthread_sigmask@LIBC │ │ +000dc808 00005616 R_ARM_JUMP_SLOT 00000000 pthread_cond_signal@LIBC │ │ +000dc80c 00005716 R_ARM_JUMP_SLOT 00000000 pthread_cond_wait@LIBC │ │ +000dc810 00005816 R_ARM_JUMP_SLOT 00000000 sigwait@LIBC │ │ +000dc814 00005916 R_ARM_JUMP_SLOT 00000000 fallocate@LIBC │ │ +000dc818 00005a16 R_ARM_JUMP_SLOT 00000000 fstatfs@LIBC │ │ +000dc81c 00005b16 R_ARM_JUMP_SLOT 00000000 setmntent@LIBC │ │ +000dc820 00005c16 R_ARM_JUMP_SLOT 00000000 getmntent@LIBC │ │ +000dc824 00005d16 R_ARM_JUMP_SLOT 00000000 strcmp@LIBC │ │ +000dc828 00005e16 R_ARM_JUMP_SLOT 00000000 strncmp@LIBC │ │ +000dc82c 00005f16 R_ARM_JUMP_SLOT 00000000 endmntent@LIBC │ │ +000dc830 00006016 R_ARM_JUMP_SLOT 00000000 vfprintf@LIBC │ │ +000dc834 00006116 R_ARM_JUMP_SLOT 00000000 fflush@LIBC │ │ +000dc838 00006216 R_ARM_JUMP_SLOT 00000000 fprintf@LIBC │ │ +000dc83c 00006416 R_ARM_JUMP_SLOT 00000000 pwritev@LIBC_N │ │ +000dc840 00006516 R_ARM_JUMP_SLOT 00000000 mincore@LIBC │ │ +000dc844 00006616 R_ARM_JUMP_SLOT 00000000 fstatvfs@LIBC │ │ +000dc848 00006716 R_ARM_JUMP_SLOT 00000000 getmntent_r@LIBC │ │ +000dc84c 00006816 R_ARM_JUMP_SLOT 00000000 strncasecmp@LIBC │ │ +000dc850 00006916 R_ARM_JUMP_SLOT 00000000 strcasecmp@LIBC │ │ +000dc854 00006a16 R_ARM_JUMP_SLOT 00000000 access@LIBC │ │ +000dc858 00006b16 R_ARM_JUMP_SLOT 00000000 munlock@LIBC │ │ +000dc85c 00006c16 R_ARM_JUMP_SLOT 00000000 pread@LIBC │ │ +000dc860 00006d16 R_ARM_JUMP_SLOT 00000000 statvfs@LIBC │ │ +000dc864 00006e16 R_ARM_JUMP_SLOT 00000000 pthread_mutexattr_init@LIBC │ │ +000dc868 00006f16 R_ARM_JUMP_SLOT 00000000 pthread_mutexattr_setpshared@LIBC │ │ +000dc86c 00007016 R_ARM_JUMP_SLOT 00000000 pthread_mutexattr_destroy@LIBC │ │ +000dc870 00007116 R_ARM_JUMP_SLOT 00000000 pthread_mutexattr_settype@LIBC │ │ +000dc874 00007216 R_ARM_JUMP_SLOT 00000000 usleep@LIBC │ │ +000dc878 00007316 R_ARM_JUMP_SLOT 00000000 pthread_cond_broadcast@LIBC │ │ +000dc87c 00007416 R_ARM_JUMP_SLOT 00000000 pthread_cond_timedwait@LIBC │ │ +000dc880 00007516 R_ARM_JUMP_SLOT 00000000 memset@LIBC │ │ +000dc884 00007616 R_ARM_JUMP_SLOT 00000000 pthread_once@LIBC │ │ +000dc888 00007716 R_ARM_JUMP_SLOT 00000000 memcpy@LIBC │ │ +000dc88c 00007816 R_ARM_JUMP_SLOT 00000000 dl_unwind_find_exidx@LIBC │ ├── readelf --wide --dynamic {} │ │ @@ -1,28 +1,28 @@ │ │ │ │ -Dynamic section at offset 0xda5a8 contains 25 entries: │ │ +Dynamic section at offset 0xda5b8 contains 25 entries: │ │ Tag Type Name/Value │ │ 0x00000001 (NEEDED) Shared library: [libdl.so] │ │ 0x00000001 (NEEDED) Shared library: [libc.so] │ │ 0x0000001e (FLAGS) BIND_NOW │ │ 0x6ffffffb (FLAGS_1) Flags: NOW │ │ 0x00000011 (REL) 0x210c │ │ 0x00000012 (RELSZ) 7360 (bytes) │ │ 0x00000013 (RELENT) 8 (bytes) │ │ 0x6ffffffa (RELCOUNT) 915 │ │ - 0x00000017 (JMPREL) 0x5cbc │ │ + 0x00000017 (JMPREL) 0x5cb4 │ │ 0x00000002 (PLTRELSZ) 960 (bytes) │ │ - 0x00000003 (PLTGOT) 0xdc694 │ │ + 0x00000003 (PLTGOT) 0xdc6a4 │ │ 0x00000014 (PLTREL) REL │ │ 0x00000006 (SYMTAB) 0x20c │ │ 0x0000000b (SYMENT) 16 (bytes) │ │ 0x00000005 (STRTAB) 0x145c │ │ 0x0000000a (STRSZ) 3245 (bytes) │ │ 0x6ffffef5 (GNU_HASH) 0x117c │ │ - 0x00000019 (INIT_ARRAY) 0xdc5a4 │ │ + 0x00000019 (INIT_ARRAY) 0xdc5b4 │ │ 0x0000001b (INIT_ARRAYSZ) 4 (bytes) │ │ - 0x0000001a (FINI_ARRAY) 0xdc598 │ │ + 0x0000001a (FINI_ARRAY) 0xdc5a8 │ │ 0x0000001c (FINI_ARRAYSZ) 12 (bytes) │ │ 0x6ffffff0 (VERSYM) 0xf7c │ │ 0x6ffffffe (VERNEED) 0x112c │ │ 0x6fffffff (VERNEEDNUM) 2 │ │ 0x00000000 (NULL) 0x0 │ ├── strings --all --bytes=8 {} │ │ @@ -156,14 +156,15 @@ │ │ dl_unwind_find_exidx │ │ libdl.so │ │ ThreadPool::execute unable to send job into queue.packages/isar_core_ffi/src/query_aggregation.rs │ │ IllegalArg: │ │ floating point ` │ │ memory allocation of │ │ bytes failed │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/thread/current.rs │ │ mdbx_cursor_del │ │ mdbx_txn_commit_ex │ │ invalid page's flags (%u) │ │ unable fetch-slot, alloc-flags 0x%x, err %d, txn-flags 0x%x, re-list-len %zu, loose-count %zu, gc: height %u, branch %zu, leaf %zu, large %zu, entries %zu │ │ pnl_reserve │ │ complete │ │ mdbx_get_sysraminfo(), rc %d │ │ @@ -195,18 +196,15 @@ │ │ ignore filesize mismatch in readonly-mode │ │ , but unable in read-only mode │ │ recovery │ │ meta[%u] has invalid max-mapsize (%llu), skip it │ │ unexpected thread-id 0x%llx%s0x%0zx and/or txn-id %lli%s%lli │ │ unable undo resize performed by nested txn, promote to the parent (%u->%u, %u->%u) │ │ libunwind: %s - %s │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/core/src/str/lossy.rs │ │ missing field ` │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/../../backtrace/src/symbolize/gimli/lru.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/core/src/cell/once.rs │ │ mdbx_drop │ │ MDBX_READERS_FULL: Too many readers (maxreaders reached) │ │ MDBX_TOO_LARGE: Database is too large for current system, e.g. could NOT be mapped into RAM │ │ 0.13.8-temp-upstream-fix │ │ model_meta->geometry.grow_pv == pages2pv(pv2pages(model_meta->geometry.grow_pv)) │ │ big-node data size (%zu) <> min/max value-length (%zu/%zu) │ │ node-data size (%zu) <> min/max value-length (%zu/%zu) │ │ @@ -221,26 +219,26 @@ │ │ env->geo_in_bytes.now >= used_bytes │ │ updating meta.geo: from l%u-n%u-u%u/s%u-g%u (txn#%lli), to l%u-n%u-u%u/s%u-g%u (txn#%lli) │ │ /etc/machine-id │ │ tls-cleanup: pid %d, pending %u, wait for... │ │ %s: restart since %zu slot(s) comeback non-dense (reserved %zu...%zu of %zu) │ │ _Unwind_VRS_Set │ │ Type matching not implemented │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/alloc/src/str.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/core/src/panicking.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/alloc/src/fmt.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/alloc/src/raw_vec/mod.rs │ │ assertion `left │ │ right` failed │ │ left: │ │ right: │ │ duplicate field ` │ │ SchemaError: │ │ MdbxError ( │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/core/src/cell.rs │ │ packages/isar_core/src/object/object_builder.rs │ │ /rust/deps/rustc-demangle-0.1.26/src/v0.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/../../backtrace/src/symbolize/gimli/stash.rs │ │ MDBX_BUSY: Another write transaction is running, or environment is already used while opening with MDBX_EXCLUSIVE flag │ │ strange nested │ │ the source DB %s: post-compactification used pages %u %c expected %u │ │ invalid db-flags 0x%x │ │ %s-page nkeys (%zu) < %u │ │ invalid page upper (%u) for nkeys %zu with limit %zu │ │ cursor_put │ │ @@ -251,16 +249,19 @@ │ │ thread_rthc_set │ │ txn #%lli too more loops %u, bailout │ │ gc_rerere │ │ gc_dense_solve │ │ reserve depleted (used %zu slots, left %zu loop %u) │ │ begin <= end ( │ │ ) when slicing ` │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/alloc/src/collections/btree/node.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/../../backtrace/src/symbolize/gimli/elf.rs │ │ thread ' │ │ ) panicked at │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/core/src/str/pattern.rs │ │ env->geo_in_bytes.now % globals.sys_pagesize == 0 │ │ new_geo.shrink_pv == pages2pv(pv2pages(new_geo.shrink_pv)) │ │ MDBX_THREAD_MISMATCH: A thread has attempted to use a not owned object, e.g. a transaction that started by another thread │ │ attempt to commit %s txn %p │ │ is_powerof2(env->ps) │ │ model_meta->geometry.upper <= MAX_PAGENO + 1 │ │ osal_fastmutex_acquire(&globals.debug_lock) == 0 │ │ @@ -270,18 +271,20 @@ │ │ bailout waiting for valid snapshot (%s) │ │ unable resize datafile/mapping: present %u -> %u, limit %u -> %u, errcode %d │ │ shrink-MADV_%s %zu..%zu │ │ unlock-before-retry │ │ %s and rollback needed: (from head %lli to steady %lli)%s │ │ Rejecting the use of a FD in the range STDIN_FILENO/%d..STDERR_FILENO/%d to prevent database corruption │ │ recursive-solving failure │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/core/src/slice/sort/shared/smallsort.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/core/src/unicode/printable.rs │ │ packages/isar_core/src/txn.rs │ │ , line: │ │ , column: │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sys/sync/rwlock/futex.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sys/thread/unix.rs │ │ strange read-only │ │ condition │ │ copy_with_compacting │ │ invalid leaf2_ksize %zu │ │ invalid nested/sub-page record size (%zu) │ │ poorpage │ │ suboptimal %s-page #%u, mod-txnid %lli │ │ @@ -318,15 +321,15 @@ │ │ page_split │ │ meta_troika_dump │ │ meta[%u] not completely updated, skip it │ │ pthread_setspecific(key, value) == 0 │ │ fifo │ │ %s: restart since %zu slot(s) reclaimed (reserved %zu...%zu of %zu) │ │ != expected │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/core/src/unicode/printable.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/time.rs │ │ /rust/deps/addr2line-0.25.1/src/function.rs │ │ %s/%d: %s %u │ │ env->geo_in_bytes.grow % (unsigned)pagesize == 0 │ │ leaf2-item size (%zu) <> min/max length (%zu/%zu) │ │ meta_unsteady │ │ page_dirty │ │ DPL is full (PAGELIST_LIMIT %zu) │ │ @@ -338,16 +341,16 @@ │ │ 0 == meta_eq_mask(&troika) │ │ read-only │ │ meta[%u] has invalid steady-checksum (0x%llx != 0x%llx), skip it │ │ meta[%u] used-bytes (%llu) beyond filesize (%llu), skip it │ │ meta[%u] has false-empty %s, skip it │ │ cursor_eot │ │ _Unwind_GetTextRelBase │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/core/src/slice/sort/shared/smallsort.rs │ │ *extension cannot contain path separators: │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/thread/local.rs │ │ env->geo_in_bytes.upper % globals.sys_pagesize == 0 │ │ env->geo_in_bytes.shrink % (unsigned)pagesize == 0 │ │ env->ps >= MDBX_MIN_PAGESIZE │ │ unexpected %s-page for %s (db-flags 0x%x) │ │ node[%zu] (%zu) beyond page-end │ │ bigdata-pgno │ │ too less n-pages %u for bigdata-node (%zu bytes) │ │ @@ -365,17 +368,15 @@ │ │ %s: restart since no slot(s) available (reserved %zu...%zu of %zu) │ │ gc_reserve4return │ │ unexpected pid %u%s%u │ │ txn_ro_unpark │ │ packages/isar_core_ffi/src/instance.rs │ │ ©_from_slice: source slice length ( │ │ +) does not match destination slice length ( │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/alloc/src/collections/btree/map/entry.rs │ │ packages/isar_core/src/index/index_key_builder.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sync/once.rs │ │ MDBX_DUPLICATED_CLK: Alternative/Duplicate LCK-file is exists, please keep one and remove unused other │ │ unexpected leaf2-page for non-dupfix (sub)tree (db-flags 0x%x) │ │ nested-leaf2-key #%u wrong order (%s >= %s) │ │ munlock_after │ │ all %zu dirty pages are unspillable since referenced by a cursor(s), use fewer cursors or increase MDBX_opt_txn_dp_limit │ │ dbi_defer_release │ │ legal4overwrite │ │ @@ -388,18 +389,16 @@ │ │ /rust/deps/hashbrown-0.16.1/src/raw/mod.rs │ │ /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/crossbeam-channel-0.5.15/src/waker.rs │ │ packages/isar_core/src/schema/collection_schema.rs │ │ /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/itoa-1.0.18/src/lib.rs │ │ /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/serde_json-1.0.149/src/error.rs │ │ byte index │ │ is not an OsStr boundary │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sys/random/linux.rs │ │ /rust/deps/gimli-0.32.3/src/read/line.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/../../backtrace/src/backtrace/libunwind.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sync/mpmc/waker.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sync/mpmc/waker.rs │ │ new_geo.upper >= new_geo.now │ │ has page leak(s) │ │ Raise the ENOSYS(%d) error to avoid hang due the 32-bit Bionic/Android bug with tid/thread_id 0x%08x(%i) that don │ │ t fit in 16 bits, see https://android.googlesource.com/platform/bionic/+/master/docs/32-bit-abi.md#is-too-small-for-large-pids │ │ check_table_flags │ │ page_touch_unmodifable │ │ %s addr %p, upper %u │ │ @@ -413,16 +412,15 @@ │ │ try-exclusive │ │ meta-pages are clashed: mask 0x%d │ │ %s, but %s for automatic rollback: %s │ │ thread_key_delete │ │ getInfoFromEHABISection │ │ packages/isar_core_ffi/src/filter.rs │ │ packages/isar_core/src/schema/schema_manager.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sync/mpmc/list.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sync/mpmc/zero.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/../../backtrace/src/symbolize/gimli/lru.rs │ │ mdbx_dbi_open │ │ env->geo_in_bytes.lower >= MIN_MAPSIZE │ │ pgno_ceil2sp_bytes(env, new_geo.now) == (size_t)size_now │ │ invalid GC-record length │ │ nested-node-key #%u wrong order (%s >= %s) │ │ branch/leaf/leaf2 │ │ stop reclaiming %s: %zu (current) + %zu (chunk) >= %zu, rp_augment_limit %u │ │ @@ -437,17 +435,17 @@ │ │ bailout overriding meta-%zu since model failed FreeDB/MainDB %s-check for txnid #%lli │ │ dbi %zu refs to inaccessible table `%.*s` for txn %lli (err %d) │ │ pthread_setspecific(rthc_key, &rthc_thread_state) == 0 │ │ environment corrupted by died writer, must shutdown! │ │ renew MainDB for %s-txn %lli since db-flags changes 0x%x -> 0x%x │ │ unexpected error %d during export the state of dbi-handles to env │ │ _Unwind_GetDataRelBase() not implemented │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/alloc/src/collections/btree/map/entry.rs │ │ packages/isar_core/src/mdbx/db.rs │ │ packages/isar_core/src/index/mod.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/thread/thread.rs │ │ (os error │ │ mdbx_default_pagesize │ │ env->geo_in_bytes.now >= env->geo_in_bytes.lower │ │ new_geo.lower >= MIN_PAGENO │ │ MDBX_TXN_FULL: Transaction has too many dirty pages, i.e transaction is too big │ │ MDBX_SUCCESS: Successful │ │ MDBX_WRITEMAP │ │ @@ -471,14 +469,16 @@ │ │ unable provide IDs and/or to fit returned PNL (%zd+%zd pages, %zd+%zd slots), err %d │ │ txn_merge │ │ unexpected thread-id 0x%llx%s0x%llx and/or txn-id %lli%s%lli │ │ unwind_phase2 │ │ slice index starts at │ │ but ends at │ │ packages/isar_core/src/legacy/isar_object_v1.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/panic_abort/src/lib.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sync/mpmc/list.rs │ │ mdbx_cursor_unbind │ │ │ │ compacting_walk │ │ invalid type (%u) │ │ invalid n-pages (%u) for large-page │ │ leaf2-sub │ │ nested-node non-empty data size (%zu) │ │ @@ -506,14 +506,15 @@ │ │ meta[%u] has false-empty %s │ │ dbi %zu refs to the re-created table `%.*s` for txn %lli with different flags (present 0x%X != wanna 0x%X) │ │ MDBX_PROBLEM │ │ txn_ro_start │ │ getRegister │ │ index out of bounds: the len is │ │ but the index is │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sys/pal/unix/time.rs │ │ unsuitable system pagesize %u │ │ MDBX_MAP_FULL: Environment mapsize limit reached │ │ MDBX_PAGE_FULL: Internal error - Page has no more space │ │ invalid nested-db record size (%zu, expect %zu) │ │ ousted-%s parked read-txn %lli, pid %u, tid 0x%llx │ │ page_unspill │ │ pagesize <= MDBX_MAX_PAGESIZE │ │ @@ -521,18 +522,17 @@ │ │ rthc_unlock │ │ 0 == meta_txnid(recent.ptr_v) │ │ %s meta[%u], txnid %lli, error %d │ │ rthc_dtor │ │ meta_override │ │ iov-init │ │ meta-pages are too volatile │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/core/src/fmt/mod.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/alloc/src/collections/btree/node.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/core/src/ops/function.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sys/io/io_slice/iovec.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/alloc/src/str.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/core/src/fmt/mod.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/io/mod.rs │ │ mdbx_env_open │ │ osal_fastmutex_destroy(&env->remap_guard) == MDBX_SUCCESS │ │ new_geo.now >= new_geo.lower │ │ MDBX_DBS_FULL: Too many DBI-handles (maxdbs reached) │ │ MDBX_CURSOR_FULL: Cursor stack limit reachedn - this usually indicates corruption, i.e branch-pages loop │ │ mdbx_txn_park │ │ meta_model │ │ @@ -552,14 +552,15 @@ │ │ meta[%u] has too large max-mapsize (%llu), but size of used space still acceptable (%llu) │ │ stage == cur_signature_live || (stage == cur_signature_wait4eot && shadow) │ │ unexpected thread-id 0x%llx%s0x%zx and/or txn-id %lli%s%lli │ │ txn_ro_seize │ │ setFloatRegister │ │ packages/isar_core/src/query/mod.rs │ │ /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/once_cell-1.21.4/src/lib.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/core/src/time.rs │ │ (*prev)->signature == cur_signature_live || (*prev)->signature == cur_signature_wait4eot │ │ mdbx_env_set_geometry │ │ env->geo_in_bytes.upper % (unsigned)pagesize == 0 │ │ new_geo.grow_pv == pages2pv(pv2pages(new_geo.grow_pv)) │ │ new_geo.now >= new_geo.first_unallocated │ │ MDBX_BAD_VALSIZE: Invalid size or alignment of key or data for target database, either invalid table name │ │ MDBX_PROBLEM: Unexpected internal error, transaction should be aborted │ │ @@ -585,16 +586,16 @@ │ │ packages/isar_core/src/query/query_builder.rs │ │ packages/isar_core/src/instance.rs │ │ .compact │ │ /rust/deps/miniz_oxide-0.8.9/src/inflate/core.rs │ │ 9internal error: entered unreachable code: str::from_utf8( │ │ " was expected to have 1 char, but │ │ chars were found │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sys/io/error/unix.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/core/src/str/pattern.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/../../backtrace/src/symbolize/gimli.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/path.rs │ │ /rust/deps/gimli-0.32.3/src/read/index.rs │ │ mdbx_cursor_put │ │ too old linux kernel %u.%u.%u.%u, the >= 3.16 is required │ │ txn_check_badbits_parked │ │ unexpected leaf-page for dupfix subtree (db-lags 0x%x) │ │ invalid nested/sub-page flags (0x%02x) │ │ catch delayed/non-arrived page %u %s │ │ @@ -611,18 +612,19 @@ │ │ rthc_ctor │ │ gc_update │ │ /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/serde_json-1.0.149/src/de.rs │ │ /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/crossbeam-channel-0.5.15/src/flavors/list.rs │ │ /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/crossbeam-channel-0.5.15/src/flavors/zero.rs │ │ /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/intmap-2.0.0/src/lib.rs │ │ android_set_abort_message │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/path.rs │ │ memory allocation of │ │ G bytes failed │ │ skipping backtrace printing to avoid potential recursion │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/core/src/num/wrapping.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sync/mpmc/context.rs │ │ pagesize == (intptr_t)env->ps │ │ MDBX_OUSTED: The parked read transaction was outed for the sake of recycling old MVCC snapshots │ │ assert: %s │ │ │ │ has double-used pages or other corruption │ │ incompatible or invalid db.flags (0x%x) │ │ unknown_0x%x │ │ @@ -636,15 +638,17 @@ │ │ recovery requires exclusive mode │ │ manual recovery is required │ │ wrong rec-size │ │ during phase1 personality function said it would stop here, but now in phase2 it did not stop here │ │ /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/unicode-segmentation-1.12.0/src/word.rs │ │ /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/once_cell-1.21.4/src/imp_std.rs │ │ /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/serde_core-1.0.228/src/de/mod.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/io/mod.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sys/random/linux.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/core/src/slice/sort/stable/quicksort.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sync/mpmc/array.rs │ │ mdbx_cursor_get │ │ MDBX_CORRUPTED │ │ MDBX_EKEYMISMATCH: The given key value is mismatched to the current cursor position │ │ %s/%d: %s %zu │ │ end of large-page beyond (%u) allocated space (%u next-pgno) │ │ invalid page upper (%u) for nkeys %zu with leaf2-length %zu │ │ large/overflow │ │ @@ -661,19 +665,18 @@ │ │ dbi_lock failed, err %d │ │ setRegister │ │ range end index │ │ " out of range for slice of length │ │ packages/isar_core/src/watch/mod.rs │ │ packages/isar_core/src/watch/isar_watchers.rs │ │ packages/isar_core/src/schema/index_schema.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/alloc/src/collections/btree/navigate.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sys/thread/unix.rs │ │ [... omitted │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/ffi/os_str.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/ffi/os_str.rs │ │ Hcannot access a Thread Local Storage value during or after destruction: │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/thread/local.rs │ │ env->geo_in_bytes.grow % globals.sys_pagesize == 0 │ │ mdbx_get_sysraminfo │ │ env->ps <= MDBX_MAX_PAGESIZE │ │ dupfix-subleaf │ │ no keys on a %s-page │ │ %s-pages %u..%u, mlocked-process(es) %u -> %u │ │ %s-madvise: ignore EINVAL (%d) since some pages maybe locked (%u/%u mlcnt-processes) │ │ @@ -688,18 +691,18 @@ │ │ packages/isar_core_ffi/src/error.rs │ │ packages/isar_core_ffi/src/query.rs │ │ /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/byteorder-1.5.0/src/lib.rs │ │ packages/isar_core/src/object/isar_object.rs │ │ packages/isar_core/src/object/json_encode_decode.rs │ │ invalid value: │ │ , expected │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/../../backtrace/src/symbolize/mod.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/panicking.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/alloc/src/collections/btree/navigate.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/../../backtrace/src/symbolize/mod.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sys/io/error/unix.rs │ │ aborting due to panic at │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/core/src/num/wrapping.rs │ │ txnid overflow, raise %d │ │ mdbx_is_readahead_reasonable │ │ MDBX_KEYEXIST: Key/data pair already exists │ │ MDBX_INVALID: File is not an MDBX file │ │ MDBX_WANNA_RECOVERY: Database should be recovered, but this could NOT be done automatically for now since it opened in read-only mode │ │ mdbx_txn_renew │ │ node[%zu] key wrong order (%s >= %s) │ │ @@ -718,16 +721,15 @@ │ │ %s: enter to dense-mode (amount %zu, reserved %zu..%zu, slots/ids %zu, left %zu..%zu, unfit %zu) │ │ txn_nested_create │ │ /rust/deps/addr2line-0.25.1/src/line.rs │ │ range start index │ │ " out of range for slice of length │ │ Cannot open Environment: │ │ /rust/deps/rustc-demangle-0.1.26/src/lib.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/alloc/src/string.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/core/src/slice/sort/stable/quicksort.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sync/once.rs │ │ env->geo_in_bytes.lower % (unsigned)pagesize == 0 │ │ MDBX_VERSION_MISMATCH: DB version mismatch libmdbx │ │ MDBX_INCOMPATIBLE: Environment or database is not compatible with the requested operation or the specified flags │ │ extra n-pages %u for bigdata-node (%zu bytes) │ │ wipe txn #%lli, meta %u │ │ %s-spilling %zu dirty-entries, %zu dirty-npages │ │ Unable to merge/rebalance %s page %u (has %zu keys, fill %u.%u%%, used %zu, room %zu bytes) │ │ @@ -738,16 +740,20 @@ │ │ skip overriding meta-%zu since no changes for txnid #%lli │ │ page #%u not a meta-page │ │ meta[%u] consider geo-%s pageno is %u instead of wrong %u, will be corrected on next commit(s) │ │ fallback to pthreads' tsd, key %u, count %u │ │ txn_basal_commit │ │ unknown register │ │ /rust/deps/rustc-demangle-0.1.26/src/legacy.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/core/src/ops/function.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/thread/thread.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sys/io/io_slice/iovec.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/thread/id.rs │ │ /rust/deps/addr2line-0.25.1/src/unit.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sync/mpmc/context.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sync/mpmc/zero.rs │ │ mdbx_env_create │ │ env->geo_in_bytes.shrink % globals.sys_pagesize == 0 │ │ MDBX_BAD_DBI: The specified DBI-handle is invalid or changed by another thread/transaction │ │ /dev/urandom │ │ osal_check_tid4bionic │ │ corrupted %s-page #%u, mod-txnid %lli │ │ mvcc_shapshot_oldest │ │ @@ -761,15 +767,15 @@ │ │ drown env %p │ │ osal_fastmutex_destroy(&globals.debug_lock) == 0 │ │ Got STD%s_FILENO/%d, avoid using it by dup(fd) │ │ id == rkl_pop(rkl, is_lifo(txn)) │ │ environment had fatal error, must shutdown! │ │ MainDB db-flags changes 0x%x -> 0x%x ahead of read-txn %lli │ │ _Unwind_GetTextRelBase() not implemented │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/time.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/panicking.rs │ │ osal_fastmutex_destroy(&env->dbi_lock) == MDBX_SUCCESS │ │ %s %d (%s) │ │ model_meta->geometry.now >= model_meta->geometry.lower │ │ leaf-sub │ │ invalid page' txnid (%lli) for %s' txnid (%lli) │ │ PNL too long (%zu > %zu) │ │ Wrong or mismatch pages's types (src %d, dst %d) to move node │ │ @@ -779,15 +785,14 @@ │ │ current mode/flags 0x%X incompatible with requested 0x%X, rigorous diff 0x%X │ │ meta[%u] has invalid min-mapsize (%llu), skip it │ │ db.mod_txnid (%lli) > page-txnid (%lli) │ │ unexpected duplicate(s) during rkl-merge │ │ Invalid descriptor kind found. │ │ invalid length │ │ , expected │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/thread/id.rs │ │ MDBX_EBADSIGN: Wrong signature of a runtime object(s), e.g. memory corruption or double-free │ │ MDBX_MVCC_RETARDED: MVCC snapshot used by parked transaction was bygone │ │ mdbx-panic │ │ %s/%d: %s │ │ dupfix-leaf │ │ node[%zu] key size (%zu) <> min/max key-length (%zu/%zu) │ │ invalid sub-db record size (%zu) │ │ @@ -798,21 +803,21 @@ │ │ mutex (un)lock failed, %s │ │ dxb_set_readahead │ │ meta[%u] with last txnid %lli is corrupted, rollback needed │ │ skipped update meta.geo in %s mode: from l%u-n%u-u%u/s%u-g%u, to l%u-n%u-u%u/s%u-g%u │ │ %s %smeta[%u], txnid %lli │ │ gc_peekid │ │ too long %s-comeback-reserve @%lli, have %zu bytes, need %zu bytes │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/alloc/src/raw_vec/mod.rs │ │ packages/isar_core/src/cursor.rs │ │ /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/serde_json-1.0.149/src/value/ser.rs │ │ packages/isar_core/src/collection.rs │ │ integer ` │ │ panicked at │ │ thread panicked while processing panic. aborting. │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/core/src/cell/once.rs │ │ is_powerof2(pagesize) │ │ mdbx_env_copy │ │ mdbx_cursor_bind │ │ mdbx_cursor_close │ │ env->geo_in_bytes.now <= env->geo_in_bytes.upper │ │ env->geo_in_bytes.now % (unsigned)pagesize == 0 │ │ pgno mismatch (%u) != expected (%u) │ │ @@ -826,15 +831,14 @@ │ │ pthread_cond_broadcast(&rthc_cond) == 0 │ │ lifo │ │ gc_push_sequel │ │ recursive-solving preconditions violated │ │ target meta-page %i is referenced to an obsolete MVCC-snapshot %lli < cached-oldest %lli │ │ _Unwind_Resume │ │ unsupported register class │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sys/sync/rwlock/futex.rs │ │ %s mode is incompatible with nested transactions │ │ model_meta->geometry.now <= model_meta->geometry.upper │ │ tbl_setup │ │ nested dupsort tree │ │ node[%zu] too long key (%zu) │ │ node-%s(%zu of %zu, %zu bytes) beyond (%zu) page-end │ │ nested-node-key beyond (%zu) nested-page │ │ @@ -843,21 +847,19 @@ │ │ !env->basal_txn || !env->txn │ │ %s is on a remote file system, the %s is required │ │ lck_destroy │ │ STD%s_FILENO/%d is invalid, open %s for temporary stub │ │ gc_remove_rkl │ │ txn_ro_park │ │ Unknown ARM float register │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sync/mpmc/mod.rs │ │ byte index │ │ is out of bounds of ` │ │ /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/serde_json-1.0.149/src/read.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/../../backtrace/src/symbolize/gimli/elf.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/core/src/time.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sys/pal/unix/time.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sync/mpmc/array.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/../../backtrace/src/backtrace/libunwind.rs │ │ mdbx_cursor_close2 │ │ MDBX_CORRUPTED: Database is corrupted │ │ MDBX_PANIC: Environment had fatal error │ │ mdbx_env_set_option │ │ mdbx_txn_abort │ │ /proc/sys/kernel/random/uuid │ │ /proc/mounts │ │ @@ -881,18 +883,17 @@ │ │ thread 0x%x, rthc %p, pid %d, self-status %s (0x%08llx) │ │ lck_txn_unlock │ │ meta[%u] has invalid magic/version %llx │ │ count_before < INT_MAX │ │ txn->txnid >= env->lck->cached_oldest.weak │ │ txn_basal_start │ │ latch_maindb_locked │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/core/src/cell.rs │ │ /rust/deps/miniz_oxide-0.8.9/src/inflate/output_buffer.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/panic_abort/src/lib.rs │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/../../backtrace/src/symbolize/gimli.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/alloc/src/string.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/../../backtrace/src/symbolize/gimli/stash.rs │ │ /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/threadpool-1.8.1/src/lib.rs │ │ env->geo_in_bytes.upper <= MAX_MAPSIZE │ │ (size_t)size_lower >= MIN_MAPSIZE │ │ MDBX_NOTFOUND: No matching key/data pair found │ │ error %d │ │ mdbx_txn_begin_ex │ │ model_meta->geometry.lower >= MIN_PAGENO │ │ @@ -907,22 +908,21 @@ │ │ skip update meta%u for txn#%lli, since it is already steady │ │ %s is exported via NFS │ │ target meta[%u] is corrupted │ │ pthread_atfork(nullptr, nullptr, rthc_afterfork) == 0 │ │ atomic_sub32(&rthc_pending, 1) > 0 │ │ ** internal error (reservation gc-id %lli) │ │ index inlined table detected but pr function requires extra words │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sync/mpmc/mod.rs │ │ v0.13.8-temp-upstream-fix │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/alloc/src/fmt.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/core/src/panicking.rs │ │ +/rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/core/src/str/lossy.rs │ │ DbCorrupted: │ │ packages/isar_core/src/object/id.rs │ │ invalid type: │ │ , expected │ │ -/rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/thread/current.rs │ │ /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/unicode-segmentation-1.12.0/src/tables.rs │ │ mdbx_env_close_ex │ │ pgno_ceil2sp_bytes(env, new_geo.upper) == (size_t)size_upper │ │ MDBX_PAGE_NOTFOUND: Requested page not found │ │ MDBX_BAD_RSLOT: Invalid reuse of reader locktable slot, e.g. read-transaction already run for current thread │ │ MDBX_DANGLING_DBI: Some cursors and/or other resources should be closed before table or corresponding DBI-handle could be (re)used │ │ unknown/extra page-flags (have 0x%x, expect 0x%x) │ │ @@ -1037,28 +1037,28 @@ │ │ )H*K*IxD{DyD │ │ 'H'K(IxD{DyD │ │ J8F1FzD │ │ 0H(!0JxDzD │ │ +H,K,IxD{DyD │ │ )H)K*IxD{DyD │ │ J8F1FzD │ │ -/H(!/JxDzD │ │ 5n@{@3C@ │ │ %(F1F"F │ │ 0 8F.F!F │ │ +/H(!/JxDzD │ │ e8?e@N@.C │ │ e8?e@N@.C │ │ -8F!F*F0#t │ │ -8F!F2F0#t │ │ +8F!F*F0#p │ │ +8F!F2F0#p │ │ IIhgF[h4F │ │ h%FIh....... │ │ - 0x000043fc 78810300 b0af0a80 cc820300 b0af0680 x............... │ │ - 0x0000440c d4830300 af3f0480 58880300 b0b0a880 .....?..X....... │ │ - 0x0000441c 94880300 0b841180 bc880300 b0b0b080 ................ │ │ - 0x0000442c d0880300 b0b0aa80 fc880300 b0af2e80 ................ │ │ - 0x0000443c d48b0300 b0af2280 c08d0300 b0af1680 ......"......... │ │ - 0x0000444c c48f0300 b0b0b080 c88f0300 b0ae0180 ................ │ │ - 0x0000445c 8c900300 b0af0280 5c910300 af3f0a80 ........\....?.. │ │ - 0x0000446c 28980300 08849780 40980300 d41c0000 (.......@....... │ │ - 0x0000447c 6e990300 b0b0b080 a6990300 08849780 n............... │ │ - 0x0000448c ac990300 b0b0b080 bc990300 c01c0000 ................ │ │ - 0x0000449c 089b0300 08849780 0e9b0300 d81c0000 ................ │ │ - 0x000044ac 4a9b0300 dc1c0000 889b0300 08849780 J............... │ │ - 0x000044bc 9c9b0300 d81c0000 289c0300 f01c0000 ........(....... │ │ - 0x000044cc 309d0300 b0b0b080 4a9d0300 001d0000 0.......J....... │ │ - 0x000044dc 809d0300 041d0000 2c9e0300 b0b0b080 ........,....... │ │ - 0x000044ec 349e0300 001d0000 04a70300 08849780 4............... │ │ - 0x000044fc 28a70300 181d0000 56a70300 1c1d0000 (.......V....... │ │ - 0x0000450c 8aa70300 201d0000 c6a80300 241d0000 .... .......$... │ │ - 0x0000451c 02aa0300 281d0000 70aa0300 2c1d0000 ....(...p...,... │ │ - 0x0000452c 74ab0300 301d0000 5cad0300 aaf08080 t...0...\....... │ │ - 0x0000453c d0ae0300 2c1d0000 10af0300 301d0000 ....,.......0... │ │ - 0x0000454c f0b00300 341d0000 74b30300 b0b0a880 ....4...t....... │ │ - 0x0000455c 4cb40300 301d0000 d4b40300 08849780 L...0........... │ │ - 0x0000456c 34b50300 2c1d0000 a8b70300 08849780 4...,........... │ │ - 0x0000457c b4b70300 281d0000 8cb90300 2c1d0000 ....(.......,... │ │ - 0x0000458c b8b90300 301d0000 40ba0300 341d0000 ....0...@...4... │ │ - 0x0000459c 74bb0300 b0b0b080 94bb0300 301d0000 t...........0... │ │ - 0x000045ac 2cbc0300 b0b0aa80 2cbd0300 ab108080 ,.......,....... │ │ - 0x000045bc 9cbe0300 b0b0aa80 70bf0300 1c1d0000 ........p....... │ │ - 0x000045cc b4c10300 08849780 18c20300 181d0000 ................ │ │ - 0x000045dc 50c20300 1c1d0000 90c20300 201d0000 P........... ... │ │ - 0x000045ec b6c20300 241d0000 dcc20300 281d0000 ....$.......(... │ │ - 0x000045fc 20c30300 2c1d0000 64c30300 301d0000 ...,...d...0... │ │ - 0x0000460c b8c30300 08849780 10c40300 b0b0b080 ................ │ │ - 0x0000461c 10c40300 241d0000 7cc50300 281d0000 ....$...|...(... │ │ - 0x0000462c c0c50300 b0b0b080 c8c50300 241d0000 ............$... │ │ - 0x0000463c dcc60300 281d0000 b4c70300 2c1d0000 ....(.......,... │ │ - 0x0000464c 1cc90300 301d0000 a0c90300 08849780 ....0........... │ │ - 0x0000465c b4c90300 b0b0b080 b4c90300 241d0000 ............$... │ │ - 0x0000466c c0cc0300 08849780 dccc0300 b0b0b080 ................ │ │ - 0x0000467c e4cc0300 08849780 00cd0300 b0b0b080 ................ │ │ - 0x0000468c 08cd0300 081d0000 38cd0300 08849780 ........8....... │ │ - 0x0000469c 4ccd0300 ab108080 e4cd0300 fc1c0000 L............... │ │ - 0x000046ac 04ce0300 001d0000 3cce0300 b0b0a880 ........<....... │ │ - 0x000046bc e4cf0300 08849780 0cd00300 f41c0000 ................ │ │ - 0x000046cc 2ad00300 08849780 50d00300 aa308080 *.......P....0.. │ │ - 0x000046dc a0d10300 b00b8480 e4d10300 b0b0a880 ................ │ │ - 0x000046ec 30d20300 b0a80180 58d20300 b0ac0180 0.......X....... │ │ - 0x000046fc a0d20300 08849780 b2d20300 b0b00180 ................ │ │ - 0x0000470c d0d20300 c41c0000 9cd30300 08849780 ................ │ │ - 0x0000471c aed30300 c01c0000 44d40300 08849780 ........D....... │ │ - 0x0000472c 62d40300 bc1c0000 b2d40300 c01c0000 b............... │ │ - 0x0000473c 42d50300 08849780 60d50300 bc1c0000 B.......`....... │ │ - 0x0000474c 90db0300 08849780 b4db0300 b0088480 ................ │ │ - 0x0000475c 28dc0300 b0ad0280 e8dc0300 b0af1880 (............... │ │ - 0x0000476c a8e00300 b0ad0280 28e20300 b0af0280 ........(....... │ │ - 0x0000477c 28e30300 b0ac0380 8ce40300 b0aa0380 (............... │ │ - 0x0000478c 50e50300 b0af0680 60e60300 b0af0280 P.......`....... │ │ - 0x0000479c 54e70300 b0a80380 d4e70300 b0b0ac80 T............... │ │ - 0x000047ac 20e80300 b0ab0080 1ee90300 c01c0000 ............... │ │ - 0x000047bc bee90300 af3f2680 a0ee0300 b0af1680 .....?&......... │ │ - 0x000047cc 54f70300 b0af0280 76f80300 b0af0480 T.......v....... │ │ - 0x000047dc 9ef90300 b0af0280 54fa0300 9c1c0000 ........T....... │ │ - 0x000047ec f0fa0300 af3f2680 fcff0300 b0af1a80 .....?&......... │ │ - 0x000047fc e0060400 b0af0280 a00a0400 b0ad0280 ................ │ │ - 0x0000480c f40d0400 b0af1080 b6140400 781c0000 ............x... │ │ - 0x0000481c 2a190400 b0af0a80 c21a0400 b0af0280 *............... │ │ - 0x0000482c 581c0400 b0af0480 e01e0400 b0b0a880 X............... │ │ - 0x0000483c 101f0400 b0af0080 9c220400 b0af0480 ........."...... │ │ - 0x0000484c cc230400 b0ae0380 ac250400 b0b0ae80 .#.......%...... │ │ - 0x0000485c 50260400 b0ad0080 bc260400 b0ae0380 P&.......&...... │ │ - 0x0000486c 90290400 b0b0ac80 2c2a0400 b0b0b080 .)......,*...... │ │ - 0x0000487c 4e2a0400 b0af0c80 1a2d0400 b00b8480 N*.......-...... │ │ - 0x0000488c 602e0400 b0b0aa80 a42e0400 b0af0280 `............... │ │ - 0x0000489c 2a2f0400 b0af0080 962f0400 0b840580 */......./...... │ │ - 0x000048ac ca2f0400 b0ae0180 7c300400 0b840580 ./......|0...... │ │ - 0x000048bc e8330400 b0aa0580 b8350400 b0b0b080 .3.......5...... │ │ - 0x000048cc ca350400 b0aa0580 fc350400 b0ab0880 .5.......5...... │ │ - 0x000048dc bc360400 b0af0280 f8380400 b0af0a80 .6.......8...... │ │ - 0x000048ec f43a0400 b0af1c80 c44f0400 b0ad0280 .:.......O...... │ │ - 0x000048fc 7c500400 08840580 f8510400 b0af1c80 |P.......Q...... │ │ - 0x0000490c f4530400 b0ac0380 14550400 b0ac0780 .S.......U...... │ │ - 0x0000491c fc550400 b0ad0280 9c560400 b0ad0880 .U.......V...... │ │ - 0x0000492c cc570400 b0af0480 fc580400 b0af1080 .W.......X...... │ │ - 0x0000493c 405c0400 b0ac0180 185d0400 b0af1080 @\.......]...... │ │ - 0x0000494c 8c5f0400 b0af0680 d0620400 b0af1080 ._.......b...... │ │ - 0x0000495c 80680400 b0af3a80 646b0400 b0af1680 .h....:.dk...... │ │ - 0x0000496c 486d0400 b0af0480 2c6e0400 b0af0080 Hm......,n...... │ │ - 0x0000497c 886f0400 b0ae0780 9c700400 b0ac0380 .o.......p...... │ │ - 0x0000498c 3c710400 b0aa0580 14720400 041b0000 ...... │ │ - 0x00004b6c 3c400500 b0af1080 1c420500 b0af0e80 <@.......B...... │ │ - 0x00004b7c 0c440500 b0af0a80 5c450500 b0af0880 .D......\E...... │ │ - 0x00004b8c 94460500 af3f0e80 24530500 b0af0e80 .F...?..$S...... │ │ - 0x00004b9c f8540500 b0af0c80 e0560500 b0af0880 .T.......V...... │ │ - 0x00004bac e6570500 b0af0e80 fc580500 b0ab0280 .W.......X...... │ │ - 0x00004bbc c8590500 b0af0080 8c5b0500 b0ae0180 .Y.......[...... │ │ - 0x00004bcc 385d0500 b0af1080 24640500 b0af0c80 8]......$d...... │ │ - 0x00004bdc f4640500 b0af2080 a86d0500 cc180000 .d.... ..m...... │ │ - 0x00004bec 5c700500 b0af0a80 7e710500 b0af0880 \p......~q...... │ │ - 0x00004bfc 9e720500 b0ab0080 6c730500 b0af0080 .r......ls...... │ │ - 0x00004c0c dc730500 b0af2280 18760500 b0ab1080 .s...."..v...... │ │ - 0x00004c1c 4e780500 b00b8480 7a780500 b0ab0280 Nx......zx...... │ │ - 0x00004c2c 80790500 b0af3880 50830500 0b840380 .y....8.P....... │ │ - 0x00004c3c 08840500 b0ac0380 28860500 0b840780 ........(....... │ │ - 0x00004c4c 64860500 b0af1480 988d0500 b0af1a80 d............... │ │ - 0x00004c5c 78970500 b0af1280 049e0500 b0ab0880 x............... │ │ - 0x00004c6c 489f0500 b0ab0080 889f0500 b0ab0280 H............... │ │ - 0x00004c7c c0a00500 b0af0480 e4a40500 b0b0b080 ................ │ │ - 0x00004c8c e8a40500 08840380 0aa60500 b0a80380 ................ │ │ - 0x00004c9c 76a70500 b0ae0780 7ca90500 b0b0b080 v.......|....... │ │ - 0x00004cac b0a90500 b0af1480 7cb00500 b0ab0080 ........|....... │ │ - 0x00004cbc aab00500 b0ad0280 7cb30500 0b840380 ........|....... │ │ - 0x00004ccc 38b40500 b0b0b080 44b40500 b0aa0780 8.......D....... │ │ - 0x00004cdc 74b40500 b0b0b080 94b40500 b0ac0380 t............... │ │ - 0x00004cec 5cb50500 b0ad0280 24b70500 b0ae0380 \.......$....... │ │ - 0x00004cfc b4b90500 b0b0b080 18ba0500 b0aa0980 ................ │ │ - 0x00004d0c d0ba0500 b0af0680 a0bf0500 b00b8480 ................ │ │ - 0x00004d1c c2bf0500 b0ab0480 02c00500 b00b8480 ................ │ │ - 0x00004d2c 1cc00500 b0b0b080 3cc00500 b0ae0380 ........<....... │ │ - 0x00004d3c fcc10500 b0af0080 24c40500 b00b8480 ........$....... │ │ - 0x00004d4c 3cc40500 af3f0480 28c50500 b00b8480 <....?..(....... │ │ - 0x00004d5c 48c50500 b0af0080 bcc50500 b0ae0380 H............... │ │ - 0x00004d6c c8c60500 08840580 f4c60500 b0088480 ................ │ │ - 0x00004d7c f8c60500 b0af1a80 e4c70500 b0ac0780 ................ │ │ - 0x00004d8c 60c80500 b0af0880 8cca0500 b0ab0080 `............... │ │ - 0x00004d9c 68cb0500 b00b8480 80cb0500 b0af0280 h............... │ │ - 0x00004dac 84cd0500 b0af0680 5cd10500 b0ae0980 ........\....... │ │ - 0x00004dbc ecd20500 b0b0a880 38d30500 b0b0ac80 ........8....... │ │ - 0x00004dcc b0d30500 b00b8480 c8d30500 b0ad0080 ................ │ │ - 0x00004ddc 28d40500 00170000 c4020600 b0ad0680 (............... │ │ - 0x00004dec 6c040600 b0ac0580 28050600 b0ae0980 l.......(....... │ │ - 0x00004dfc ec060600 08840580 10070600 b0ab0080 ................ │ │ - 0x00004e0c 80070600 b0af1a80 d8150600 b0ab0080 ................ │ │ - 0x00004e1c 00160600 b0af3080 b4170600 af3f3e80 ......0......?>. │ │ - 0x00004e2c 983e0600 b0ab0080 be3e0600 b0af0080 .>.......>...... │ │ - 0x00004e3c 203f0600 b0af0c80 d0430600 b0af1480 ?.......C...... │ │ - 0x00004e4c fc4b0600 b0b0b080 004c0600 b0af0c80 .K.......L...... │ │ - 0x00004e5c f44c0600 b0af0680 685e0600 b0af1880 .L......h^...... │ │ - 0x00004e6c 64600600 b0a80180 c0600600 b00b8480 d`.......`...... │ │ - 0x00004e7c 06610600 b0af1880 c8630600 b0ae0780 .a.......c...... │ │ - 0x00004e8c 44640600 5c160000 20690600 b0ab0080 Dd..\... i...... │ │ - 0x00004e9c 48690600 b0ac0380 e8690600 b0ac0d80 Hi.......i...... │ │ - 0x00004eac 706a0600 b0af3680 90720600 b0ae0d80 pj....6..r...... │ │ - 0x00004ebc 18740600 b0af0a80 dc760600 30160000 .t.......v..0... │ │ - 0x00004ecc b0850600 b0b0b080 bc850600 b0a80580 ................ │ │ - 0x00004edc f0850600 b0a80380 80860600 b0a80580 ................ │ │ - 0x00004eec ba860600 b0b0b080 c0860600 b0a80380 ................ │ │ - 0x00004efc ec860600 b0af0880 30880600 b0af2080 ........0..... . │ │ - 0x00004f0c 688d0600 b0af0280 0e8e0600 b0b0b080 h............... │ │ - 0x00004f1c 148e0600 0b840380 848f0600 b0ad0880 ................ │ │ - 0x00004f2c 68900600 b0af0880 ac910600 b0af2880 h.............(. │ │ - 0x00004f3c 14940600 b0af0a80 f09b0600 b0b0a880 ................ │ │ - 0x00004f4c 349c0600 b00b8480 609c0600 b0b0ae80 4.......`....... │ │ - 0x00004f5c 809e0600 a4150000 80b40600 a8150000 ................ │ │ - 0x00004f6c 34b70600 ac150000 f4b90600 b0088480 4............... │ │ - 0x00004f7c 44ba0600 b00b8480 24bb0600 a0150000 D.......$....... │ │ - 0x00004f8c 24be0600 08849780 28be0600 bc150000 $.......(....... │ │ - 0x00004f9c 00bf0600 08849780 14bf0600 b8150000 ................ │ │ - 0x00004fac c4c60600 bc150000 6cc90600 c0150000 ........l....... │ │ - 0x00004fbc 5ccd0600 b0b0b080 68cd0600 bc150000 \.......h....... │ │ - 0x00004fcc 08ce0600 c0150000 60ce0600 c4150000 ........`....... │ │ - 0x00004fdc b0cf0600 c8150000 b4d20600 cc150000 ................ │ │ - 0x00004fec f0d20600 d0150000 b0d60600 d4150000 ................ │ │ - 0x00004ffc 84d70600 aaf08080 48d80600 d0150000 ........H....... │ │ - 0x0000500c 08dd0600 d4150000 dcdd0600 d8150000 ................ │ │ - 0x0000501c dcde0600 dc150000 7cdf0600 e0150000 ........|....... │ │ - 0x0000502c f8df0600 e4150000 e8e00600 e8150000 ................ │ │ - 0x0000503c 20e20600 ec150000 6ce40600 f0150000 .......l....... │ │ - 0x0000504c c4e40600 f4150000 20e50600 f8150000 ........ ....... │ │ - 0x0000505c 5ce60600 fc150000 78e80600 00160000 \.......x....... │ │ - 0x0000506c 0ce90600 b0b0b080 40e90600 fc150000 ........@....... │ │ - 0x0000507c ace90600 b0b0b080 cce90600 f8150000 ................ │ │ - 0x0000508c 28ea0600 b0b0b080 48ea0600 f4150000 (.......H....... │ │ - 0x0000509c 6ceb0600 f8150000 08ec0600 fc150000 l............... │ │ - 0x000050ac 5cec0600 00160000 7ced0600 04160000 \.......|....... │ │ - 0x000050bc 80ee0600 08160000 dcef0600 0c160000 ................ │ │ - 0x000050cc b4f00600 10160000 14f30600 14160000 ................ │ │ - 0x000050dc 00f40600 b00b8480 24f40600 10160000 ........$....... │ │ - 0x000050ec 00fd0600 14160000 34fd0600 18160000 ........4....... │ │ - 0x000050fc cefd0600 b0088480 f4fd0600 b0b0b080 ................ │ │ - 0x0000510c 20fe0600 b0af0480 24ff0600 b0b0b080 .......$....... │ │ - 0x0000511c 36ff0600 b0af1880 92000700 b0ac0b80 6............... │ │ - 0x0000512c 22010700 08840380 58010700 0b840980 ".......X....... │ │ - 0x0000513c b0030700 b0aa0380 fc030700 b0af1680 ................ │ │ - 0x0000514c 4c080700 b0af0a80 d4090700 b00b8480 L............... │ │ - 0x0000515c e80a0700 b0b0aa80 080b0700 b4150000 ................ │ │ - 0x0000516c 4c0e0700 b0b0b080 500e0700 b0ab0080 L.......P....... │ │ - 0x0000517c 280f0700 b0b0b080 300f0700 0b840580 (.......0....... │ │ - 0x0000518c ac0f0700 b0ab0080 40100700 b00b8480 ........@....... │ │ - 0x0000519c 88100700 b0b0a880 a4100700 b0af0680 ................ │ │ - 0x000051ac 9c130700 b00b8480 bc130700 b0b0b080 ................ │ │ - 0x000051bc dc130700 0b840980 24140700 b0af0480 ........$....... │ │ - 0x000051cc 08160700 b0af0a80 a0190700 b00b8480 ................ │ │ - 0x000051dc c0190700 5c150000 d01a0700 70150000 ....\.......p... │ │ - 0x000051ec 301f0700 cc150000 64200700 d0150000 0.......d ...... │ │ - 0x000051fc b0200700 b0b0b080 b4200700 cc150000 . ....... ...... │ │ - 0x0000520c 6c210700 fc150000 ba210700 08849780 l!.......!...... │ │ - 0x0000521c bc210700 b0b0b080 e0210700 08849780 .!.......!...... │ │ - 0x0000522c e0210700 f4150000 88220700 08849780 .!......."...... │ │ - 0x0000523c a4220700 b0b0b080 b0220700 e8150000 ."......."...... │ │ - 0x0000524c f8220700 08849780 18230700 f8150000 .".......#...... │ │ - 0x0000525c a8230700 18160000 e8230700 1c160000 .#.......#...... │ │ - 0x0000526c a0240700 20160000 14250700 24160000 .$.. ....%..$... │ │ - 0x0000527c 62250700 28160000 b0250700 38160000 b%..(....%..8... │ │ - 0x0000528c 72260700 3c160000 30270700 40160000 r&..<...0'..@... │ │ - 0x0000529c 70270700 44160000 98290700 9c160000 p'..D....)...... │ │ - 0x000052ac e4290700 a0160000 d02b0700 cc160000 .).......+...... │ │ - 0x000052bc f82b0700 08849780 0c2c0700 b0b0b080 .+.......,...... │ │ - 0x000052cc 082c0700 d0160000 d82c0700 e8160000 .,.......,...... │ │ - 0x000052dc 50520700 4c180000 00550700 50180000 PR..L....U..P... │ │ - 0x000052ec 70550700 54180000 e0560700 58180000 pU..T....V..X... │ │ - 0x000052fc 54580700 5c180000 205a0700 60180000 TX..\... Z..`... │ │ - 0x0000530c 585a0700 64180000 7c5d0700 a4180000 XZ..d...|]...... │ │ - 0x0000531c f05d0700 b8180000 3c630700 d8180000 .]......K.......K...... │ │ - 0x0000551c ea4b0800 1c1e0000 484c0800 201e0000 .K......HL.. ... │ │ - 0x0000552c 58510800 241e0000 ac590800 3c1e0000 XQ..$....Y..<... │ │ - 0x0000553c 485a0800 401e0000 a85b0800 541e0000 HZ..@....[..T... │ │ - 0x0000554c 8c5e0800 581e0000 f8600800 6c1e0000 .^..X....`..l... │ │ - 0x0000555c b0610800 701e0000 38620800 741e0000 .a..p...8b..t... │ │ - 0x0000556c 70620800 781e0000 9c640800 aaf08080 pb..x....d...... │ │ - 0x0000557c e06b0800 741e0000 146c0800 781e0000 .k..t....l..x... │ │ - 0x0000558c 8a6c0800 8c1e0000 d86c0800 901e0000 .l.......l...... │ │ - 0x0000559c 0c6d0800 941e0000 906d0800 b81e0000 .m.......m...... │ │ - 0x000055ac 8c6e0800 cc1e0000 d86e0800 d01e0000 .n.......n...... │ │ - 0x000055bc 0c6f0800 08849780 386f0800 cc1e0000 .o......8o...... │ │ - 0x000055cc 886f0800 b0b0b080 846f0800 c81e0000 .o.......o...... │ │ - 0x000055dc e46f0800 e41e0000 bc700800 041f0000 .o.......p...... │ │ - 0x000055ec 3c710800 141f0000 c8720800 381f0000 ...........T%.. │ │ - 0x00005a4c bc0f0900 b0af2480 101d0900 b0b0aa80 ......$......... │ │ - 0x00005a5c 9c1d0900 b0ac0380 6c1e0900 0b840380 ........l....... │ │ - 0x00005a6c c01e0900 b0ac0380 8c1f0900 0b840380 ................ │ │ - 0x00005a7c e01f0900 b0af0680 60240900 b0ac0580 ........`$...... │ │ - 0x00005a8c d0240900 b0af0680 cc2d0900 b0b0ac80 .$.......-...... │ │ - 0x00005a9c 682e0900 b0b0a880 ac2e0900 b0088480 h............... │ │ - 0x00005aac bc2e0900 b0af1280 2a300900 0b840380 ........*0...... │ │ - 0x00005abc 62300900 b00b8480 b4300900 b0ad0280 b0.......0...... │ │ - 0x00005acc e8310900 b0af0480 30330900 b0ad0080 .1......03...... │ │ - 0x00005adc 44340900 b0af1280 2c360900 af3f0280 D4......,6...?.. │ │ - 0x00005aec 003c0900 b0af0280 36430900 b0af3680 .<......6C....6. │ │ - 0x00005afc ec490900 b0af1480 384f0900 b0af1280 .I......8O...... │ │ - 0x00005b0c 94520900 01000000 18f10c00 b0b0b080 .R.............. │ │ - 0x00005b1c 4ef10c00 c8240000 9ef20c00 cc240000 N....$.......$.. │ │ - 0x00005b2c 86f50c00 b0088480 d4f50c00 b0b0b080 ................ │ │ - 0x00005b3c fef60c00 b0b0a880 86f70c00 b0b0b080 ................ │ │ - 0x00005b4c 9cf70c00 b0088480 6ef80c00 b0b0b080 ........n....... │ │ - 0x00005b5c 74f80c00 01000000 80f80c00 98240000 t............$.. │ │ - 0x00005b6c aaf80c00 a8240000 9cfa0c00 01000000 .....$.......... │ │ - 0x00005b7c 44010d00 80849b80 c0010d00 af469b80 D............F.. │ │ - 0x00005b8c 20070d00 94240000 20080d00 98240000 ....$.. ....$.. │ │ - 0x00005b9c 34090d00 af469b80 600e0d00 b0b0b080 4....F..`....... │ │ - 0x00005bac 640e0d00 af469b80 a4100d00 b0b0b080 d....F.......... │ │ - 0x00005bbc b4100d00 af469b80 0c120d00 74240000 .....F......t$.. │ │ - 0x00005bcc a0120d00 78240000 8c130d00 80849b80 ....x$.......... │ │ - 0x00005bdc 04140d00 74240000 d4140d00 78240000 ....t$......x$.. │ │ - 0x00005bec 24150d00 7c240000 f8150d00 80240000 $...|$.......$.. │ │ - 0x00005bfc 48160d00 84240000 a0160d00 b0b0b080 H....$.......... │ │ - 0x00005c0c a8160d00 80240000 d4160d00 80849b80 .....$.......... │ │ - 0x00005c1c ec160d00 b0b0b080 0c170d00 74240000 ............t$.. │ │ - 0x00005c2c ec170d00 78240000 cc180d00 b0b0b080 ....x$.......... │ │ - 0x00005c3c d8180d00 74240000 d8190d00 78240000 ....t$......x$.. │ │ - 0x00005c4c e01a0d00 7c240000 681b0d00 b0b0b080 ....|$..h....... │ │ - 0x00005c5c a81b0d00 78240000 001c0d00 b0b0b080 ....x$.......... │ │ - 0x00005c6c 001c0d00 80849b80 181c0d00 6c240000 ............l$.. │ │ - 0x00005c7c a01c0d00 b0b0b080 ac1c0d00 68240000 ............h$.. │ │ - 0x00005c8c d01e0d00 b0b0b080 78280d00 64240000 ........x(..d$.. │ │ - 0x00005c9c c0280d00 68240000 08290d00 6c240000 .(..h$...)..l$.. │ │ - 0x00005cac f8290d00 01000000 4c2a0d00 01000000 .)......L*...... │ │ + 0x00003e1c 18e60100 b00b8480 44e60100 b0af3680 ........D.....6. │ │ + 0x00003e2c 3cf00100 b0af0e80 68f40100 b0ae0d80 <.......h....... │ │ + 0x00003e3c 54f60100 0b840380 88f70100 b0ad1480 T............... │ │ + 0x00003e4c f0f70100 b0ac1180 c0f80100 af3f2c80 .............?,. │ │ + 0x00003e5c f8030200 b0af2080 7c0b0200 b0af2680 ...... .|.....&. │ │ + 0x00003e6c 64140200 b0ac0380 30150200 b0ae0380 d.......0....... │ │ + 0x00003e7c 04180200 b0af0a80 a41c0200 b0af0680 ................ │ │ + 0x00003e8c 34210200 b0af0880 f0250200 b0ac0380 4!.......%...... │ │ + 0x00003e9c 9c270200 b0af0080 f8280200 b0ae0380 .'.......(...... │ │ + 0x00003eac d82a0200 b0af0480 202c0200 b0ae0380 .*...... ,...... │ │ + 0x00003ebc e02d0200 b0ad0280 142f0200 b0af1280 .-......./...... │ │ + 0x00003ecc 7c300200 b0ae0780 f8300200 0b840380 |0.......0...... │ │ + 0x00003edc 04320200 b0ac0580 74320200 b0ad0880 .2......t2...... │ │ + 0x00003eec f0320200 b0a80380 c4330200 b0af0880 .2.......3...... │ │ + 0x00003efc 08350200 b0aa0580 a8350200 0b840580 .5.......5...... │ │ + 0x00003f0c 30360200 b0b0b080 38360200 b0af0a80 06......86...... │ │ + 0x00003f1c c8360200 0b840780 20370200 af3f2a80 .6...... 7...?*. │ │ + 0x00003f2c ec500200 b0af1080 9c520200 b0ac0b80 .P.......R...... │ │ + 0x00003f3c 08530200 b0af0680 8a530200 b0aa0980 .S.......S...... │ │ + 0x00003f4c cc530200 af3f3c80 54720200 0b840580 .S...?<.Tr...... │ │ + 0x00003f5c 9c720200 af3f2e80 bc890200 08840b80 .r...?.......... │ │ + 0x00003f6c f0890200 b0aa0780 1a8a0200 0b840580 ................ │ │ + 0x00003f7c 5c8a0200 af3f3a80 d8a30200 af3f0c80 \....?:......?.. │ │ + 0x00003f8c eca90200 b0ac0d80 6caa0200 b0af1680 ........l....... │ │ + 0x00003f9c b8ab0200 b0088480 bcab0200 0b840580 ................ │ │ + 0x00003fac feab0200 b0ab0c80 58ac0200 af3f2280 ........X....?". │ │ + 0x00003fbc f0bc0200 b0af3480 e8c10200 b0ae0d80 ......4......... │ │ + 0x00003fcc acc30200 b0af3880 b8c90200 b0ae0580 ......8......... │ │ + 0x00003fdc 18ca0200 b0ad0880 94ca0200 b0af0880 ................ │ │ + 0x00003fec 16cb0200 b0b0b080 24cb0200 b0af2280 ........$.....". │ │ + 0x00003ffc a4cc0200 b0af0c80 38cd0200 b0aa0980 ........8....... │ │ + 0x0000400c 7ccd0200 b0af1c80 30cf0200 b0088480 |.......0....... │ │ + 0x0000401c 32cf0200 b0af1280 88d00200 b0b0aa80 2............... │ │ + 0x0000402c 14d10200 b0b0b080 24d10200 3c200000 ........$...< .. │ │ + 0x0000403c 64d80200 b0ab0080 92d80200 b0b0b080 d............... │ │ + 0x0000404c a6d80200 b0ab0080 d4d80200 b0ac0b80 ................ │ │ + 0x0000405c 64d90200 b00b8480 c0d90200 b0b0b080 d............... │ │ + 0x0000406c ded90200 0b840180 36db0200 b00b8480 ........6....... │ │ + 0x0000407c 4edb0200 b0ad0080 bedb0200 b0b0b080 N............... │ │ + 0x0000408c c4db0200 b0af0280 d8dc0200 b0af1880 ................ │ │ + 0x0000409c 34de0200 b0b0b080 3cde0200 b0b0a880 4.......<....... │ │ + 0x000040ac 8cde0200 b0ab0080 8adf0200 b0af0280 ................ │ │ + 0x000040bc 34e30200 b0aa0380 7ce60200 b0af0880 4.......|....... │ │ + 0x000040cc bce70200 b0b0aa80 88e80200 08840b80 ................ │ │ + 0x000040dc bce80200 b0b0b080 c8e80200 b0ab0080 ................ │ │ + 0x000040ec ace90200 b0af2e80 04f10200 b0b0ac80 ................ │ │ + 0x000040fc f4f10200 b0b0aa80 46f20200 b0b0a880 ........F....... │ │ + 0x0000410c 7ef20200 0b840580 9af30200 b0ae0180 ~............... │ │ + 0x0000411c 4cf40200 0b840580 98f40200 b0b0b080 L............... │ │ + 0x0000412c a4f40200 b0a80380 d0f40200 b0aa0980 ................ │ │ + 0x0000413c 30fb0200 b0b0a880 48fb0200 b0af1080 0.......H....... │ │ + 0x0000414c a8fd0200 b0af0880 98ff0200 b0af0080 ................ │ │ + 0x0000415c 60000300 b00b8480 8c000300 b0af1a80 `............... │ │ + 0x0000416c e8060300 b0ab0280 20080300 b00b8480 ........ ....... │ │ + 0x0000417c 3c080300 b0af0a80 140a0300 b0af0c80 <............... │ │ + 0x0000418c fc0b0300 b0af0a80 ec0d0300 b0af0c80 ................ │ │ + 0x0000419c d00f0300 b0af0880 48120300 b0af0680 ........H....... │ │ + 0x000041ac ec130300 b0af0880 c4150300 b0af0a80 ................ │ │ + 0x000041bc 7c1a0300 b0af0c80 601e0300 b0af0a80 |.......`....... │ │ + 0x000041cc bc210300 b0af0c80 44230300 b0ae0980 .!......D#...... │ │ + 0x000041dc 74240300 b0af0880 d4260300 08840580 t$.......&...... │ │ + 0x000041ec 6c270300 b0ad0880 ec270300 b0af1280 l'.......'...... │ │ + 0x000041fc 1c2d0300 b0b0b080 2c2d0300 0b840780 .-......,-...... │ │ + 0x0000420c 742d0300 08840180 942d0300 b0aa0780 t-.......-...... │ │ + 0x0000421c e02d0300 b0ab0880 902e0300 b0af0a80 .-.............. │ │ + 0x0000422c 602f0300 b0ac0b80 d42f0300 b0af1680 `/......./...... │ │ + 0x0000423c 94300300 e01e0000 3c320300 b0ad0080 .0......<2...... │ │ + 0x0000424c b0320300 b0af1e80 0c340300 b0af0a80 .2.......4...... │ │ + 0x0000425c 40350300 b0ac0980 f4350300 b0af0a80 @5.......5...... │ │ + 0x0000426c a4380300 0b841180 e4380300 b0ab0a80 .8.......8...... │ │ + 0x0000427c 44390300 b0ad1880 703a0300 b00b8480 D9......p:...... │ │ + 0x0000428c 8c3a0300 b0af1080 343d0300 b0af0a80 .:......4=...... │ │ + 0x0000429c 4c430300 b0af1080 e84c0300 b0b0a880 LC.......L...... │ │ + 0x000042ac f84c0300 b0b0b080 fa4c0300 b0b0a880 .L.......L...... │ │ + 0x000042bc 0e4d0300 b0b0b080 144d0300 b0aa0780 .M.......M...... │ │ + 0x000042cc b44d0300 b0af0a80 884e0300 b0ac0b80 .M.......N...... │ │ + 0x000042dc 004f0300 b0ac0980 6c500300 b0b0a880 .O......lP...... │ │ + 0x000042ec 84510300 b0ab0880 d8510300 b0b0b080 .Q.......Q...... │ │ + 0x000042fc e0510300 b0ae0380 20530300 af3f1080 .Q...... S...?.. │ │ + 0x0000430c cc5f0300 1c1e0000 60610300 0b840380 ._......`a...... │ │ + 0x0000431c cc610300 b0a80980 14620300 b0ab0880 .a.......b...... │ │ + 0x0000432c 68620300 0b840780 b0620300 b0ac0980 hb.......b...... │ │ + 0x0000433c 88630300 b0b0aa80 a4630300 b0af0480 .c.......c...... │ │ + 0x0000434c 58690300 b0aa0180 b4690300 0b840180 Xi.......i...... │ │ + 0x0000435c 8c6a0300 b0af0480 00700300 b0aa0180 .j.......p...... │ │ + 0x0000436c 3c700300 b0af0480 b0750300 b0aa0580 .......?...... │ │ + 0x00004b6c 6c400500 b0af0880 44420500 b0af1080 l@......DB...... │ │ + 0x00004b7c 24440500 b0af0e80 14460500 b0af0a80 $D.......F...... │ │ + 0x00004b8c 64470500 b0af0880 9c480500 af3f0e80 dG.......H...?.. │ │ + 0x00004b9c 2c550500 b0af0e80 00570500 b0af0c80 ,U.......W...... │ │ + 0x00004bac e8580500 b0af0880 ee590500 b0af0e80 .X.......Y...... │ │ + 0x00004bbc 045b0500 b0ab0280 d05b0500 b0af0080 .[.......[...... │ │ + 0x00004bcc 945d0500 b0ae0180 405f0500 b0af1080 .]......@_...... │ │ + 0x00004bdc 2c660500 b0af0c80 fc660500 b0af2080 ,f.......f.... . │ │ + 0x00004bec b06f0500 bc180000 64720500 b0af0a80 .o......dr...... │ │ + 0x00004bfc 86730500 b0af0880 a6740500 b0ab0080 .s.......t...... │ │ + 0x00004c0c 74750500 b0af0080 e4750500 b0af2280 tu.......u....". │ │ + 0x00004c1c 20780500 b0ab1080 567a0500 b0ab0280 x......Vz...... │ │ + 0x00004c2c 5c7b0500 b0af3880 2c850500 0b840380 \{....8.,....... │ │ + 0x00004c3c e4850500 b0ac0380 04880500 0b840780 ................ │ │ + 0x00004c4c 40880500 b0af1480 748f0500 b0af1a80 @.......t....... │ │ + 0x00004c5c 54990500 b0af1280 e09f0500 b0ab0880 T............... │ │ + 0x00004c6c 24a10500 b0ab0080 64a10500 b0af0480 $.......d....... │ │ + 0x00004c7c 88a50500 b0b0b080 8ca50500 b0aa0380 ................ │ │ + 0x00004c8c d8a50500 08840380 faa60500 b0a80380 ................ │ │ + 0x00004c9c 66a80500 b0ae0780 6caa0500 b0b0b080 f.......l....... │ │ + 0x00004cac 8caa0500 b0af1480 58b10500 b0ab0080 ........X....... │ │ + 0x00004cbc 86b10500 b0ad0280 58b40500 0b840380 ........X....... │ │ + 0x00004ccc 14b50500 b0b0b080 20b50500 b0aa0780 ........ ....... │ │ + 0x00004cdc 50b50500 b0b0b080 84b50500 b0ac0380 P............... │ │ + 0x00004cec 4cb60500 b0ad0280 14b80500 b0ae0380 L............... │ │ + 0x00004cfc a4ba0500 b0b0b080 00bb0500 b0aa0980 ................ │ │ + 0x00004d0c b8bb0500 b0af0680 88c00500 b00b8480 ................ │ │ + 0x00004d1c aac00500 b0ab0480 eac00500 b00b8480 ................ │ │ + 0x00004d2c 04c10500 b0b0b080 24c10500 b0ae0380 ........$....... │ │ + 0x00004d3c e4c20500 b0af0080 0cc50500 b00b8480 ................ │ │ + 0x00004d4c 24c50500 af3f0480 10c60500 b00b8480 $....?.......... │ │ + 0x00004d5c 30c60500 b0af0080 a4c60500 b0ae0380 0............... │ │ + 0x00004d6c b0c70500 08840580 dcc70500 b0088480 ................ │ │ + 0x00004d7c e0c70500 b0af1a80 ccc80500 b0ac0780 ................ │ │ + 0x00004d8c 48c90500 b0af0880 74cb0500 b0ab0080 H.......t....... │ │ + 0x00004d9c 50cc0500 b00b8480 68cc0500 b0af0280 P.......h....... │ │ + 0x00004dac 6cce0500 b0af0680 44d20500 b0ae0980 l.......D....... │ │ + 0x00004dbc d4d30500 b0b0a880 20d40500 b0b0ac80 ........ ....... │ │ + 0x00004dcc 98d40500 b00b8480 b0d40500 b0ad0080 ................ │ │ + 0x00004ddc 10d50500 f8160000 ac030600 b0ad0680 ................ │ │ + 0x00004dec 54050600 b0ac0580 10060600 b0ae0980 T............... │ │ + 0x00004dfc d4070600 08840580 f8070600 b0ab0080 ................ │ │ + 0x00004e0c 68080600 b0af1a80 c0160600 b0ab0080 h............... │ │ + 0x00004e1c e8160600 b0af3080 9c180600 af3f3e80 ......0......?>. │ │ + 0x00004e2c 803f0600 b0ab0080 a63f0600 b0af0080 .?.......?...... │ │ + 0x00004e3c 08400600 b0af0c80 b8440600 b0af1480 .@.......D...... │ │ + 0x00004e4c e44c0600 b0b0b080 e84c0600 b0af0c80 .L.......L...... │ │ + 0x00004e5c dc4d0600 b0af0680 505f0600 b0af1880 .M......P_...... │ │ + 0x00004e6c 4c610600 b0a80180 a8610600 b00b8480 La.......a...... │ │ + 0x00004e7c ee610600 b0af1880 b0640600 b0ae0780 .a.......d...... │ │ + 0x00004e8c 2c650600 54160000 086a0600 b0ab0080 ,e..T....j...... │ │ + 0x00004e9c 306a0600 b0ac0380 d06a0600 b0ac0d80 0j.......j...... │ │ + 0x00004eac 586b0600 b0af3680 78730600 b0ae0d80 Xk....6.xs...... │ │ + 0x00004ebc 00750600 b0af0a80 c4770600 28160000 .u.......w..(... │ │ + 0x00004ecc 98860600 b0b0b080 a4860600 b0a80580 ................ │ │ + 0x00004edc d8860600 b0a80380 68870600 b0a80580 ........h....... │ │ + 0x00004eec a2870600 b0b0b080 a8870600 b0a80380 ................ │ │ + 0x00004efc d4870600 b0af0880 18890600 b0af2080 .............. . │ │ + 0x00004f0c 508e0600 b0af0280 f68e0600 b0b0b080 P............... │ │ + 0x00004f1c fc8e0600 0b840380 6c900600 b0ad0880 ........l....... │ │ + 0x00004f2c 50910600 b0af0880 94920600 b0af2880 P.............(. │ │ + 0x00004f3c fc940600 b0af0a80 d89c0600 b0b0a880 ................ │ │ + 0x00004f4c 1c9d0600 b0b0ae80 3c9f0600 a4150000 ........<....... │ │ + 0x00004f5c 3cb50600 a8150000 f0b70600 ac150000 <............... │ │ + 0x00004f6c b0ba0600 b0088480 00bb0600 b00b8480 ................ │ │ + 0x00004f7c e0bb0600 a0150000 e0be0600 08849780 ................ │ │ + 0x00004f8c e4be0600 bc150000 bcbf0600 08849780 ................ │ │ + 0x00004f9c d0bf0600 b8150000 80c70600 bc150000 ................ │ │ + 0x00004fac 28ca0600 c0150000 18ce0600 b0b0b080 (............... │ │ + 0x00004fbc 24ce0600 bc150000 c4ce0600 c0150000 $............... │ │ + 0x00004fcc 1ccf0600 c4150000 6cd00600 c8150000 ........l....... │ │ + 0x00004fdc 70d30600 cc150000 acd30600 d0150000 p............... │ │ + 0x00004fec 6cd70600 d4150000 40d80600 aaf08080 l.......@....... │ │ + 0x00004ffc 04d90600 d0150000 c4dd0600 d4150000 ................ │ │ + 0x0000500c 98de0600 d8150000 98df0600 dc150000 ................ │ │ + 0x0000501c 38e00600 e0150000 b4e00600 e4150000 8............... │ │ + 0x0000502c a4e10600 e8150000 dce20600 ec150000 ................ │ │ + 0x0000503c 28e50600 f0150000 80e50600 f4150000 (............... │ │ + 0x0000504c dce50600 f8150000 18e70600 fc150000 ................ │ │ + 0x0000505c 34e90600 00160000 c8e90600 b0b0b080 4............... │ │ + 0x0000506c fce90600 fc150000 68ea0600 b0b0b080 ........h....... │ │ + 0x0000507c 88ea0600 f8150000 e4ea0600 b0b0b080 ................ │ │ + 0x0000508c 04eb0600 f4150000 28ec0600 f8150000 ........(....... │ │ + 0x0000509c c4ec0600 fc150000 18ed0600 00160000 ................ │ │ + 0x000050ac 38ee0600 04160000 3cef0600 08160000 8.......<....... │ │ + 0x000050bc 98f00600 0c160000 70f10600 10160000 ........p....... │ │ + 0x000050cc d0f30600 14160000 bcf40600 b00b8480 ................ │ │ + 0x000050dc e0f40600 10160000 bcfd0600 14160000 ................ │ │ + 0x000050ec f0fd0600 18160000 8afe0600 b0088480 ................ │ │ + 0x000050fc b0fe0600 b0b0b080 dcfe0600 b0af0480 ................ │ │ + 0x0000510c e0ff0600 b0b0b080 f2ff0600 b0af1880 ................ │ │ + 0x0000511c 4e010700 b0ac0b80 de010700 08840380 N............... │ │ + 0x0000512c 14020700 0b840980 6c040700 b0b0b080 ........l....... │ │ + 0x0000513c 6c040700 b0af1680 bc080700 b0af0a80 l............... │ │ + 0x0000514c 440a0700 b00b8480 580b0700 b0b0aa80 D.......X....... │ │ + 0x0000515c 780b0700 b4150000 bc0e0700 b0b0b080 x............... │ │ + 0x0000516c c00e0700 b0ab0080 980f0700 b0b0b080 ................ │ │ + 0x0000517c a00f0700 0b840580 1c100700 b0ab0080 ................ │ │ + 0x0000518c b0100700 b00b8480 f8100700 b0b0a880 ................ │ │ + 0x0000519c 14110700 b0af0680 0c140700 b00b8480 ................ │ │ + 0x000051ac 2c140700 b0b0b080 4c140700 0b840980 ,.......L....... │ │ + 0x000051bc 94140700 b0af0480 78160700 b0af0a80 ........x....... │ │ + 0x000051cc 101a0700 b00b8480 301a0700 5c150000 ........0...\... │ │ + 0x000051dc 401b0700 70150000 a01f0700 cc150000 @...p........... │ │ + 0x000051ec d4200700 d0150000 20210700 b0b0b080 . ...... !...... │ │ + 0x000051fc 24210700 cc150000 dc210700 fc150000 $!.......!...... │ │ + 0x0000520c 2a220700 08849780 2c220700 b0b0b080 *"......,"...... │ │ + 0x0000521c 50220700 08849780 50220700 f4150000 P"......P"...... │ │ + 0x0000522c f8220700 08849780 14230700 b0b0b080 .".......#...... │ │ + 0x0000523c 20230700 e8150000 68230700 08849780 #......h#...... │ │ + 0x0000524c 88230700 f8150000 18240700 18160000 .#.......$...... │ │ + 0x0000525c 58240700 1c160000 10250700 20160000 X$.......%.. ... │ │ + 0x0000526c 84250700 24160000 d2250700 28160000 .%..$....%..(... │ │ + 0x0000527c 20260700 38160000 e2260700 3c160000 &..8....&..<... │ │ + 0x0000528c a0270700 40160000 e0270700 44160000 .'..@....'..D... │ │ + 0x0000529c 082a0700 9c160000 542a0700 a0160000 .*......T*...... │ │ + 0x000052ac 402c0700 cc160000 682c0700 08849780 @,......h,...... │ │ + 0x000052bc 7c2c0700 b0b0b080 782c0700 d0160000 |,......x,...... │ │ + 0x000052cc 482d0700 e8160000 c0520700 4c180000 H-.......R..L... │ │ + 0x000052dc 70550700 50180000 e0550700 54180000 pU..P....U..T... │ │ + 0x000052ec 50570700 58180000 c4580700 5c180000 PW..X....X..\... │ │ + 0x000052fc 905a0700 60180000 c85a0700 64180000 .Z..`....Z..d... │ │ + 0x0000530c ec5d0700 a4180000 605e0700 b8180000 .]......`^...... │ │ + 0x0000531c ac630700 d8180000 08640700 dc180000 .c.......d...... │ │ + 0x0000532c 8c7f0700 301a0000 6a860700 a41a0000 ....0...j....... │ │ + 0x0000533c 08870700 c81a0000 348b0700 cc1a0000 ........4....... │ │ + 0x0000534c 708e0700 041b0000 088f0700 241b0000 p...........$... │ │ + 0x0000535c 4c8f0700 441b0000 58910700 5c1b0000 L...D...X...\... │ │ + 0x0000536c 8c910700 601b0000 18940700 641b0000 ....`.......d... │ │ + 0x0000537c bc970700 681b0000 02ae0700 fc1b0000 ....h........... │ │ + 0x0000538c 82ae0700 0c1c0000 e2ae0700 1c1c0000 ................ │ │ + 0x0000539c 26af0700 201c0000 fcaf0700 481c0000 &... .......H... │ │ + 0x000053ac 48b30700 4c1c0000 94cb0700 cc1c0000 H...L........... │ │ + 0x000053bc 84cc0700 b0b0b080 8ecf0700 c81c0000 ................ │ │ + 0x000053cc 14d20700 cc1c0000 4ad20700 d01c0000 ........J....... │ │ + 0x000053dc 80d20700 d41c0000 b8d20700 d81c0000 ................ │ │ + 0x000053ec ead20700 dc1c0000 9cd30700 f41c0000 ................ │ │ + 0x000053fc 44d40700 f81c0000 7ad40700 fc1c0000 D.......z....... │ │ + 0x0000540c b2d40700 001d0000 80d60700 2c1d0000 ............,... │ │ + 0x0000541c b4d60700 301d0000 16d70700 341d0000 ....0.......4... │ │ + 0x0000542c 74d70700 b00b8480 a6d80700 301d0000 t...........0... │ │ + 0x0000543c b8dd0700 341d0000 18e60700 4c1d0000 ....4.......L... │ │ + 0x0000544c b4e60700 501d0000 84f00700 901d0000 ....P........... │ │ + 0x0000545c 94f50700 c01d0000 c8070800 c41d0000 ................ │ │ + 0x0000546c cc150800 c81d0000 0a1c0800 ab708080 .............p.. │ │ + 0x0000547c 141e0800 c41d0000 b81e0800 dc1d0000 ................ │ │ + 0x0000548c 861f0800 e01d0000 ac1f0800 e41d0000 ................ │ │ + 0x0000549c fc240800 e81d0000 302d0800 aaf08080 .$......0-...... │ │ + 0x000054ac ca2e0800 f81d0000 dc2f0800 fc1d0000 ........./...... │ │ + 0x000054bc 00330800 b0b0b080 80330800 f81d0000 .3.......3...... │ │ + 0x000054cc 80390800 fc1d0000 fe480800 b0b0a880 .9.......H...... │ │ + 0x000054dc 66490800 b00b8480 604a0800 f01d0000 fI......`J...... │ │ + 0x000054ec 044b0800 081e0000 3a4b0800 0c1e0000 .K......:K...... │ │ + 0x000054fc 604b0800 101e0000 b04b0800 141e0000 `K.......K...... │ │ + 0x0000550c fa4b0800 181e0000 5c4c0800 1c1e0000 .K......\L...... │ │ + 0x0000551c ba4c0800 201e0000 cc510800 241e0000 .L.. ....Q..$... │ │ + 0x0000552c 205a0800 3c1e0000 bc5a0800 401e0000 Z..<....Z..@... │ │ + 0x0000553c 1c5c0800 541e0000 005f0800 581e0000 .\..T...._..X... │ │ + 0x0000554c 6c610800 6c1e0000 24620800 701e0000 la..l...$b..p... │ │ + 0x0000555c ac620800 741e0000 e4620800 781e0000 .b..t....b..x... │ │ + 0x0000556c 10650800 aaf08080 546c0800 741e0000 .e......Tl..t... │ │ + 0x0000557c 886c0800 781e0000 fe6c0800 8c1e0000 .l..x....l...... │ │ + 0x0000558c 4c6d0800 901e0000 806d0800 941e0000 Lm.......m...... │ │ + 0x0000559c 046e0800 b81e0000 006f0800 cc1e0000 .n.......o...... │ │ + 0x000055ac 4c6f0800 d01e0000 806f0800 08849780 Lo.......o...... │ │ + 0x000055bc ac6f0800 cc1e0000 fc6f0800 b0b0b080 .o.......o...... │ │ + 0x000055cc f86f0800 c81e0000 58700800 e41e0000 .o......Xp...... │ │ + 0x000055dc 30710800 041f0000 b0710800 141f0000 0q.......q...... │ │ + 0x000055ec 3c730800 381f0000 68740800 3c1f0000 .....x..... │ │ - 0x0000677c 01f80700 d2041ce6 0700f004 06f80700 ................ │ │ - 0x0000678c 9c05a001 e60700bc 060af807 00c60696 ................ │ │ - 0x0000679c 010000dc 0708f807 00e8070a f40701fa ................ │ │ - 0x000067ac 07048408 01fe076a 00007f00 00000000 .......j........ │ │ - 0x000067bc 46970181 b0abf080 00000000 43970181 F...........C... │ │ - 0x000067cc b0ab8080 00000000 c9030700 80439701 .............C.. │ │ - 0x000067dc b0b0ab10 ff002501 1e1e089a 01005204 ......%.......R. │ │ - 0x000067ec 80010078 069a0100 7e260000 a40106b0 ...x....~&...... │ │ - 0x000067fc 0101aa01 1600007f 00000000 00000000 ................ │ │ - 0x0000680c 91030700 80439701 b0b0ab10 ffff0108 .....C.......... │ │ - 0x0000681c 18043c00 1c3a0000 43970181 b0ab8080 ..<..:..C....... │ │ - 0x0000682c 00000000 6d030700 84419701 b0b0b00b ....m....A...... │ │ - 0x0000683c ff000d01 082e043c 013c0442 017f0000 .......<.<.B.... │ │ - 0x0000684c 00000000 4d030700 84419701 b0b0b00b ....M....A...... │ │ - 0x0000685c ff001501 0a142288 01037404 8401017f ......"...t..... │ │ - 0x0000686c 00017d00 00000000 00000000 41970181 ..}.........A... │ │ - 0x0000687c b0b00d84 00000000 43970181 b0ab8080 ........C....... │ │ - 0x0000688c 00000000 43970181 b0ab8080 00000000 ....C........... │ │ - 0x0000689c 41970181 b0b00b84 00000000 f5020700 A............... │ │ - 0x000068ac 80439701 b0b0ab10 ffff0108 18043c00 .C............<. │ │ - 0x000068bc 1c3a0000 45970181 b0abb080 00000000 .:..E........... │ │ - 0x000068cc 45970181 b0abb080 00000000 41970181 E...........A... │ │ - 0x000068dc b0b00d84 00000000 b9020700 80469701 .............F.. │ │ - 0x000068ec b0b0abf0 ff004d01 4800a801 0000a801 ......M.H....... │ │ - 0x000068fc 08ea0300 dc0104c2 0300e001 3c00009c ............<... │ │ - 0x0000690c 0204c403 00b00204 ce0300b4 024a0000 .............J.. │ │ - 0x0000691c fe0204c0 03008203 360000b8 0306ea03 ........6....... │ │ - 0x0000692c 00be0336 0000f403 06800401 fa033600 ...6..........6. │ │ - 0x0000693c 007f0000 00000000 41970181 b0b00d84 ........A....... │ │ - 0x0000694c 00000000 4d020700 80469701 b0b0abf0 ....M....F...... │ │ - 0x0000695c ffff0122 480ecc03 00a40104 a80300d4 ..."H........... │ │ - 0x0000696c 019201c0 0300e602 3800009e 0308ba03 ........8....... │ │ - 0x0000697c 00a6034e 00000000 19020700 08849700 ...N............ │ │ - 0x0000698c ff000d01 08120626 0026042c 017f0000 .......&.&.,.... │ │ - 0x0000699c 00000000 fd010700 80469701 b0b0abf0 .........F...... │ │ - 0x000069ac ffff0110 00940100 00940110 cc0100a4 ................ │ │ - 0x000069bc 01340000 dd010700 80469701 b0b0abf0 .4.......F...... │ │ - 0x000069cc ff00d802 01d102a0 020eda48 00ae02b0 ...........H.... │ │ - 0x000069dc 020000de 04048648 009c0610 c44600ac .......H.....F.. │ │ - 0x000069ec 06f20200 009e09da 09e44800 90130682 ..........H..... │ │ - 0x000069fc 4700c814 049c4800 cc14ba09 0000861e G.....H......... │ │ - 0x00006a0c 08ca4600 8e1e2000 00ae1e14 ca4600ec ..F... ......F.. │ │ - 0x00006a1c 1e04e846 00f01e58 0000c81f 08b64800 ...F...X......H. │ │ - 0x00006a2c d01f8408 0000d427 10e24800 e427a202 .......'..H..'.. │ │ - 0x00006a3c 0000862a 08e24800 a22a08ce 4800ca2a ...*..H..*..H..* │ │ - 0x00006a4c 06e24800 902bce02 e64800de 2d900200 ..H..+...H..-... │ │ - 0x00006a5c 00ee2fd8 01ea4800 c6311200 00d8310a ../...H..1....1. │ │ - 0x00006a6c ea4800e2 31880500 00ea366e e2480096 .H..1.....6n.H.. │ │ - 0x00006a7c 380e9846 00fa3808 ea480082 39a60600 8..F..8..H..9... │ │ - 0x00006a8c 00a83f08 c64800fc 3f08ee48 00ae420c ..?..H..?..H..B. │ │ - 0x00006a9c c64600ba 42ee0100 00a84404 a24900ae .F..B.....D..I.. │ │ - 0x00006aac 44088a49 00be4420 8c4a00de 44480000 D..I..D .J..DH.. │ │ - 0x00006abc a6450e94 4600b445 1c0000d0 4516e048 .E..F..E....E..H │ │ - 0x00006acc 00ec4508 b24800f4 450a0000 fe450aa2 ..E..H..E....E.. │ │ - 0x00006adc 47008a46 08944700 b64608c0 4601be46 G..F..G..F..F..F │ │ - 0x00006aec 58000096 47069e47 01be4706 f84701e2 X...G..G..G..G.. │ │ - 0x00006afc 4704ee47 01f84706 824801b8 4808c248 G..G..G..H..H..H │ │ - 0x00006b0c 01c0484c 00008c49 069e4901 d0490684 ..HL...I..I..I.. │ │ - 0x00006b1c 4a01d649 aa010000 7f000000 00000000 J..I............ │ │ - 0x00006b2c 46970181 b0abf080 00000000 43970181 F...........C... │ │ - 0x00006b3c b0ab1080 00000000 46970181 b0abf080 ........F....... │ │ - 0x00006b4c 00000000 46970181 b0abf080 00000000 ....F........... │ │ - 0x00006b5c 46970181 b0abf080 00000000 41970181 F...........A... │ │ - 0x00006b6c b0b00b84 00000000 29000700 80469701 ........)....F.. │ │ - 0x00006b7c b0b0abf0 ff003501 2f482690 06018e01 ......5./H&..... │ │ - 0x00006b8c 04ca0501 b2010690 0601d601 04e00500 ................ │ │ - 0x00006b9c da018a02 0000e403 06f60500 b8050694 ................ │ │ - 0x00006bac 0600c005 08800600 7f000000 00000000 ................ │ │ - 0x00006bbc e1ff0600 80439701 b0b0ab10 ffff010c .....C.......... │ │ - 0x00006bcc 00220000 22085e00 2a520000 c5ff0600 ."..".^.*R...... │ │ - 0x00006bdc 80469701 b0b0abf0 ffff0117 ae0312be .F.............. │ │ - 0x00006bec 0a00c003 ec060000 ac0a08b6 0a00b40a ................ │ │ - 0x00006bfc 20000000 43970181 b0ab1080 00000000 ...C........... │ │ - 0x00006c0c 91ff0600 80469701 b0b0abf0 ff00c802 .....F.......... │ │ - 0x00006c1c 01c10214 a804aa35 00ea05f6 03a43500 .......5......5. │ │ - 0x00006c2c e009d202 0000b20c 06a03500 c20e0a8e ..........5..... │ │ - 0x00006c3c 3500cc0e e4010000 b01004d2 3400b410 5...........4... │ │ - 0x00006c4c ac010000 e01106d0 3300e611 ba010000 ........3....... │ │ - 0x00006c5c a01304b4 3300a413 a60b0000 ca1e06b0 ....3........... │ │ - 0x00006c6c 3300c620 06ae3300 96213ab4 3300ac22 3.. ..3..!:.3.." │ │ - 0x00006c7c 0eb23300 802306b8 3300a825 04d43400 ..3..#..3..%..4. │ │ - 0x00006c8c 842604b6 3500c826 06de3400 de2708ac .&..5..&..4..'.. │ │ - 0x00006c9c 3400b029 0cfa3400 bc292c00 00e82906 4..)..4..),...). │ │ - 0x00006cac de3300ee 292c0000 9a2a06ce 3400de2a .3..),...*..4..* │ │ - 0x00006cbc 08ec3300 e82a06a8 3400ee2a d0010000 ..3..*..4..*.... │ │ - 0x00006ccc be2cc602 e2340084 2f740000 f82f0ade .,...4../t.../.. │ │ - 0x00006cdc 34008230 780000fa 3008c636 0084310e 4..0x...0..6..1. │ │ - 0x00006cec 9c360092 31f80100 008a3306 ac330094 .6..1.....3..3.. │ │ - 0x00006cfc 3308c234 009e3308 aa3300c6 33089c35 3..4..3..3..3..5 │ │ - 0x00006d0c 01d23306 da3301e0 3306e833 01ee3306 ..3..3..3..3..3. │ │ - 0x00006d1c f63301ae 3406be34 01ec3406 c23601fc .3..4..4..4..6.. │ │ - 0x00006d2c 34068a35 01823506 94360192 35069c35 4..5..5..6..5..5 │ │ - 0x00006d3c 01bc350a 98360184 36069436 019e3606 ..5..6..6..6..6. │ │ - 0x00006d4c be3601b4 3606c236 01c83606 863701ce .6..6..6..6..7.. │ │ - 0x00006d5c 363c0000 7f000000 00000000 35fe0600 6<..........5... │ │ - 0x00006d6c 80469701 b0b0abf0 ffff016a 00320000 .F.........j.2.. │ │ - 0x00006d7c 320ab60d 003c3400 00700eae 0d008401 2....<4..p...... │ │ - 0x00006d8c 16b60d00 9a01d803 0000f204 08ae0d00 ................ │ │ - 0x00006d9c fa045000 00ca0504 820d00e2 050aae0d ..P............. │ │ - 0x00006dac 00a60630 ba0d00d6 06f80100 00ce0816 ...0............ │ │ - 0x00006dbc 980d00e4 08cc0100 00b00a06 980d00dc ................ │ │ - 0x00006dcc 0a0cae0d 00e80a64 0000cc0b ae01980d .......d........ │ │ - 0x00006ddc 00fa0c6c 00000000 b9fd0600 84419701 ...l.........A.. │ │ - 0x00006dec b0b0b00b ff001901 15280460 002c0870 .........(.`.,.p │ │ - 0x00006dfc 0038046c 006218a0 01017a2a 00007f00 .8.l.b....z*.... │ │ - 0x00006e0c 00000000 46970181 b0abf080 00000000 ....F........... │ │ - 0x00006e1c 81fd0600 80469701 b0b0abf0 ff002d01 .....F........-. │ │ - 0x00006e2c 2800c202 0000c202 0e840600 9a0506f2 (............... │ │ - 0x00006e3c 0500dc05 08f60500 ec0504f4 0500ac06 ................ │ │ - 0x00006e4c 06b80601 b2061200 007f0000 00000000 ................ │ │ - 0x00006e5c 41fd0600 84419701 b0b0b00b ff001501 A....A.......... │ │ - 0x00006e6c 10280462 002c0872 0064086e 016c3400 .(.b.,.r.d.n.l4. │ │ - 0x00006e7c 007f0000 00000000 19fd0600 84419701 .............A.. │ │ - 0x00006e8c b0b0b00b ff001501 10260436 002a0e00 .........&.6.*.. │ │ - 0x00006e9c 00380846 01400a00 007f0000 00000000 .8.F.@.......... │ │ - 0x00006eac f1fc0600 80459701 b0b0abb0 ffff0110 .....E.......... │ │ - 0x00006ebc 00ba0300 00ba0304 f60300be 03560000 .............V.. │ │ - 0x00006ecc 41970181 b0b00b84 00000000 46970181 A...........F... │ │ - 0x00006edc b0abf080 00000000 46970181 b0abf080 ........F....... │ │ - 0x00006eec 00000000 adfc0600 80469701 b0b0abf0 .........F...... │ │ - 0x00006efc ff008801 01810192 070acc2b 009c0744 ...........+...D │ │ - 0x00006f0c 0000e007 06e22b00 da0a08c6 2b00e20a ......+.....+... │ │ - 0x00006f1c c8030000 aa0e0896 2c00b20e c60b0000 ........,....... │ │ - 0x00006f2c f8190480 2c00b41d 08982c00 8e200e84 ....,.....,.. .. │ │ - 0x00006f3c 2c009221 06f02a00 c021089c 2b00be22 ,..!..*..!..+.." │ │ - 0x00006f4c 30a22b00 a82410f2 2b00be24 08ea2a00 0.+..$..+..$..*. │ │ - 0x00006f5c fa2550fc 2a009a29 06e02a00 f42b06fc .%P.*..)..*..+.. │ │ - 0x00006f6c 2b01862c 06922c01 8c2c2c00 00b82c04 +..,..,..,,...,. │ │ - 0x00006f7c ca2c01bc 2c120000 7f000000 00000000 .,..,........... │ │ - 0x00006f8c 11fc0600 84419701 b0b0b00b ffff0108 .....A.......... │ │ - 0x00006f9c 28047800 2c5c0000 f9fb0600 84419701 (.x.,\.......A.. │ │ - 0x00006fac b0b0b00b ffff0108 06063a00 0c5c0000 ..........:..\.. │ │ - 0x00006fbc 41970181 b0b00d84 00000000 d5fb0600 A............... │ │ - 0x00006fcc 84419701 b0b0b00b ff001d01 193204c4 .A...........2.. │ │ - 0x00006fdc 01005804 ae01005c 6a0000c6 0106d801 ..X....\j....... │ │ - 0x00006fec 01cc0110 00007f00 00000000 46970181 ............F... │ │ - 0x00006ffc b0abf080 00000000 99fb0600 80469701 .............F.. │ │ - 0x0000700c b0b0abf0 ffff0177 00c00100 00c00108 .......w........ │ │ - 0x0000701c 963000c8 018c1700 00d41806 e82f00da .0.........../.. │ │ - 0x0000702c 18ac0a00 00862306 d02f00c4 2306c42f ......#../..#../ │ │ - 0x0000703c 00c4260e b82f00e2 2606aa2f 008c2706 ..&../..&../..'. │ │ - 0x0000704c b62f008e 280ede2f 00b02806 d22f00dc ./..(../..(../.. │ │ - 0x0000705c 2908882f 00e429b0 03000094 2d088a2f )../..).....-../ │ │ - 0x0000706c 00be2e08 a43000c8 2e088830 00d22e08 .....0.....0.... │ │ - 0x0000707c ba2f00e0 2e26ce2f 00862fce 01000000 ./...&./../..... │ │ - 0x0000708c 45970181 b0abb080 00000000 800b0181 E............... │ │ - 0x0000709c b0b0aaf0 00000000 41970181 b0b00b84 ........A....... │ │ - 0x000070ac 00000000 41970181 b0b00d84 00000000 ....A........... │ │ - 0x000070bc 43970181 b0ab1080 00000000 43970181 C...........C... │ │ - 0x000070cc b0ab8080 00000000 c9fa0600 80469701 .............F.. │ │ - 0x000070dc b0b0abf0 ffff0110 00800100 00800108 ................ │ │ - 0x000070ec a6010088 01320000 80070181 b0b0aaf0 .....2.......... │ │ - 0x000070fc 00000000 41970181 b0b00b84 00000000 ....A........... │ │ - 0x0000710c 43970181 b0ab1080 00000000 85fa0600 C............... │ │ - 0x0000711c 80469701 b0b0abf0 ffff0123 00d20100 .F.........#.... │ │ - 0x0000712c 00d20108 b20300e0 0108a403 009e0208 ................ │ │ - 0x0000713c c20300ac 0208b403 00b402a2 01000000 ................ │ │ - 0x0000714c 41970181 b0b00b84 00000000 43970181 A...........C... │ │ - 0x0000715c b0ab1080 00000000 43970181 b0ab1080 ........C....... │ │ - 0x0000716c 00000000 46970181 b0abf080 00000000 ....F........... │ │ - 0x0000717c 21fa0600 80469701 b0b0abf0 ffff0110 !....F.......... │ │ - 0x0000718c 00b41000 00b41004 c61000b8 10300000 .............0.. │ │ - 0x0000719c 46970181 b0abf080 00000000 f5f90600 F............... │ │ - 0x000071ac 80469701 b0b0abf0 ffff0135 900b06fe .F.........5.... │ │ - 0x000071bc 1200e20b 42fc1200 fc0c0680 1300f20e ....B........... │ │ - 0x000071cc 08a01300 a60f088a 1300ae0f bc030000 ................ │ │ - 0x000071dc ea1208ac 1300f412 04fa1200 f8126000 ..............`. │ │ - 0x000071ec 00000000 adf90600 80469701 b0b0abf0 .........F...... │ │ - 0x000071fc ffff0128 00be0600 00be0608 e6090080 ...(............ │ │ - 0x0000720c 0708e209 00980808 d60900a0 08ac0100 ................ │ │ - 0x0000721c 00cc0904 e60900d0 09480000 46970181 .........H..F... │ │ - 0x0000722c b0abf080 00000000 46970181 b0abf080 ........F....... │ │ - 0x0000723c 00000000 41970181 b0b00b84 00000000 ....A........... │ │ - 0x0000724c 51f90600 80459701 b0b0ab70 ffff010d Q....E.....p.... │ │ - 0x0000725c 00740000 74089a01 007c3000 00000000 .t..t....|0..... │ │ - 0x0000726c 80060181 b0b0aaf0 00000000 41970181 ............A... │ │ - 0x0000727c b0b00d84 00000000 46970181 b0abf080 ........F....... │ │ - 0x0000728c 00000000 0df90600 80469701 b0b0abf0 .........F...... │ │ - 0x0000729c ffff0110 00881000 00881004 9a10008c ................ │ │ - 0x000072ac 10300000 46970181 b0abf080 00000000 .0..F........... │ │ - 0x000072bc 46970181 b0abf080 00000000 800d0181 F............... │ │ - 0x000072cc b0b0aaf0 00000000 41970181 b0b00b84 ........A....... │ │ - 0x000072dc 00000000 80230181 b0b0aaf0 00000000 .....#.......... │ │ - 0x000072ec b1f80600 80459701 b0b0ab70 ffff010d .....E.....p.... │ │ - 0x000072fc 00740000 74089a01 007c3000 00000000 .t..t....|0..... │ │ - 0x0000730c 41970181 b0b00d84 00000000 43970181 A...........C... │ │ - 0x0000731c b0ab1080 00000000 43970181 b0ab1080 ........C....... │ │ - 0x0000732c 00000000 43970181 b0ab1080 00000000 ....C........... │ │ - 0x0000733c 43970181 b0ab1080 00000000 46970181 C...........F... │ │ - 0x0000734c b0abf080 00000000 49f80600 80469701 ........I....F.. │ │ - 0x0000735c b0b0abf0 ffff0110 00aa1000 00aa1004 ................ │ │ - 0x0000736c bc1000ae 102e0000 46970181 b0abf080 ........F....... │ │ - 0x0000737c 00000000 1df80600 80469701 b0b0abf0 .........F...... │ │ - 0x0000738c ffff010b d00204de 0200d402 14000000 ................ │ │ - 0x0000739c 46970181 b0abf080 00000000 f5f70600 F............... │ │ - 0x000073ac 80469701 b0b0abf0 ffff010c f00206e0 .F.............. │ │ - 0x000073bc 0400f602 fe010000 80000181 b0b0aaf0 ................ │ │ - 0x000073cc 00000000 46970181 b0abf080 00000000 ....F........... │ │ - 0x000073dc 41970181 b0b00b84 00000000 46970181 A...........F... │ │ - 0x000073ec b0abf080 00000000 41970181 b0b00b84 ........A....... │ │ - 0x000073fc 00000000 9df70600 80439701 b0b0ab10 .........C...... │ │ - 0x0000740c ffff010c 00380000 38066c00 3e400000 .....8..8.l.>@.. │ │ - 0x0000741c 45970181 b0abb080 00000000 41970181 E...........A... │ │ - 0x0000742c b0b00b84 00000000 69f70600 80439701 ........i....C.. │ │ - 0x0000743c b0b0ab80 ff001901 12006c00 006c047a ..........l..l.z │ │ - 0x0000744c 007c0688 01018201 0a00007f 00000000 .|.............. │ │ - 0x0000745c 00000000 3df70600 80459701 b0b0abb0 ....=....E...... │ │ - 0x0000746c ffff010b ec0104fa 0100f001 14000000 ................ │ │ - 0x0000747c 43970181 b0ab8080 00000000 41970181 C...........A... │ │ - 0x0000748c b0b00b84 00000000 41970181 b0b00d84 ........A....... │ │ - 0x0000749c 00000000 fdf60600 80459701 b0b0abb0 .........E...... │ │ - 0x000074ac ff001101 0c260444 004a0a64 01541400 .....&.D.J.d.T.. │ │ - 0x000074bc 007f0000 00000000 d9f60600 80459701 .............E.. │ │ - 0x000074cc b0b0ab70 ff001501 105404b4 0100c201 ...p.....T...... │ │ - 0x000074dc 0adc0101 cc011400 007f0000 00000000 ................ │ │ - 0x000074ec b1f60600 84419701 b0b0b00b ffff0108 .....A.......... │ │ - 0x000074fc 28047800 2c5c0000 99f60600 80439701 (.x.,\.......C.. │ │ - 0x0000750c b0b0ab10 ff001901 152c04d0 020030d6 .........,....0. │ │ - 0x0000751c 02000086 03049003 018a030a 00007f00 ................ │ │ - 0x0000752c 00000000 46970181 b0abf080 00000000 ....F........... │ │ - 0x0000753c 61f60600 80459701 b0b0ab70 ffff010e a....E.....p.... │ │ - 0x0000754c 003e0000 3e08bc01 00469601 00000000 .>..>....F...... │ │ - 0x0000755c 46970181 b0abf080 00000000 45970181 F...........E... │ │ - 0x0000756c b0ab7080 00000000 46970181 b0abf080 ..p.....F....... │ │ - 0x0000757c 00000000 1df60600 80459701 b0b0abb0 .........E...... │ │ - 0x0000758c ffff0110 00ea0200 00ea0204 b80300ee ................ │ │ - 0x0000759c 026a0000 fdf50600 80469701 b0b0abf0 .j.......F...... │ │ - 0x000075ac ffff0185 01180a8a 0d003c0e f40c0094 ..........<..... │ │ - 0x000075bc 0308c20c 009c0382 0100009e 0408c20c ................ │ │ - 0x000075cc 00d80404 a20c00dc 04640000 c00518c6 .........d...... │ │ - 0x000075dc 0c00d805 5c0000b4 0610b40c 00c40634 ....\..........4 │ │ - 0x000075ec 0000f806 0cb40c00 a4070ed0 0c00c807 ................ │ │ - 0x000075fc 06960c00 e40708d0 0c00e808 10da0c00 ................ │ │ - 0x0000760c ec0914f4 0c00800a d0010000 d00b08c2 ................ │ │ - 0x0000761c 0c00ec0b 10b40c00 860c04d0 0c008c0c ................ │ │ - 0x0000762c 08c60c00 940c9801 00000000 65f50600 ............e... │ │ - 0x0000763c 80469701 b0b0abf0 ffff0159 00660000 .F.........Y.f.. │ │ - 0x0000764c 660cfa06 00725600 00c80110 e40600d6 f....rV......... │ │ - 0x0000765c 0208fe06 00de02c6 010000a4 0408fa06 ................ │ │ - 0x0000766c 00c40404 ee0600e6 0406fa06 00ba054c ...............L │ │ - 0x0000767c fe06008c 0604fa06 00920628 fe0600c4 ...........(.... │ │ - 0x0000768c 0608fa06 00cc060c 0000d806 04fe0600 ................ │ │ - 0x0000769c dc065000 00000000 46970181 b0abf080 ..P.....F....... │ │ - 0x000076ac 00000000 45970181 b0ab7080 00000000 ....E.....p..... │ │ - 0x000076bc 43970181 b0ab1080 00000000 41970181 C...........A... │ │ - 0x000076cc b0b00b84 00000000 43970181 b0ab1080 ........C....... │ │ - 0x000076dc 00000000 46970181 b0abf080 00000000 ....F........... │ │ - 0x000076ec 41970181 b0b00b84 00000000 a5f40600 A............... │ │ - 0x000076fc 80459701 b0b0ab70 ffff0109 70089c01 .E.....p....p... │ │ - 0x0000770c 00783800 00000000 89f40600 80459701 .x8..........E.. │ │ - 0x0000771c b0b0ab70 ffff0109 6c089601 00743400 ...p....l....t4. │ │ - 0x0000772c 00000000 41970181 b0b00b84 00000000 ....A........... │ │ - 0x0000773c 41970181 b0b00b84 00000000 55f40600 A...........U... │ │ - 0x0000774c 80459701 b0b0ab70 ff001101 0c1a043c .E.....p.......< │ │ - 0x0000775c 00420a64 014c1c00 007f0000 00000000 .B.d.L.......... │ │ - 0x0000776c 31f40600 80469701 b0b0abf0 ff001501 1....F.......... │ │ - 0x0000777c 105a04c4 0100d201 0af40101 dc011c00 .Z.............. │ │ - 0x0000778c 007f0000 00000000 41970181 b0b00b84 ........A....... │ │ - 0x0000779c 00000000 800c0181 b0b0aaf0 00000000 ................ │ │ - 0x000077ac f1f30600 84419701 b0b0b00b ff001901 .....A.......... │ │ - 0x000077bc 1422063a 00280644 002e0e00 003c1254 .".:.(.D.....<.T │ │ - 0x000077cc 014e0a00 007f0000 00000000 46970181 .N..........F... │ │ - 0x000077dc b0abf080 00000000 b9f30600 80469701 .............F.. │ │ - 0x000077ec b0b0abf0 ffff0110 00fa0f00 00fa0f04 ................ │ │ - 0x000077fc 8c1000fe 0f2e0000 45970181 b0ab7080 ........E.....p. │ │ - 0x0000780c 00000000 46970181 b0abf080 00000000 ....F........... │ │ - 0x0000781c 81f30600 80469701 b0b0abf0 ffff0110 .....F.......... │ │ - 0x0000782c 00f00e00 00f00e04 840f00f4 0e300000 .............0.. │ │ - 0x0000783c 46970181 b0abf080 00000000 45970181 F...........E... │ │ - 0x0000784c b0ab7080 00000000 80000181 b0b0aaf0 ..p............. │ │ - 0x0000785c 00000000 46970181 b0abf080 00000000 ....F........... │ │ - 0x0000786c 31f30600 80469701 b0b0abf0 ffff010b 1....F.......... │ │ - 0x0000787c e80904ee 0900ec09 16000000 46970181 ............F... │ │ - 0x0000788c b0abf080 00000000 46970181 b0abf080 ........F....... │ │ - 0x0000789c 00000000 fdf20600 80469701 b0b0abf0 .........F...... │ │ - 0x000078ac ffff0118 be011086 0400a402 04ee0300 ................ │ │ - 0x000078bc 94030882 04009c03 90010000 41970181 ............A... │ │ - 0x000078cc b0b00b84 00000000 41970181 b0b00d84 ........A....... │ │ - 0x000078dc 00000000 43970181 b0ab8080 00000000 ....C........... │ │ - 0x000078ec 43970181 b0ab8080 00000000 a5f20600 C............... │ │ - 0x000078fc 80439701 b0b0ab10 ffff0110 00540000 .C...........T.. │ │ - 0x0000790c 54087e00 5e087000 662a0000 41970181 T.~.^.p.f*..A... │ │ - 0x0000791c b0b00d84 00000000 79f20600 80459701 ........y....E.. │ │ - 0x0000792c b0b0abb0 ffff011c 00a00100 00a00108 ................ │ │ - 0x0000793c 880300a8 01a60100 00ce0214 880300e2 ................ │ │ - 0x0000794c 024a0000 45970181 b0ab7080 00000000 .J..E.....p..... │ │ - 0x0000795c 46970181 b0abf080 00000000 35f20600 F...........5... │ │ - 0x0000796c 80439701 b0b0ab80 ffff0108 260a5000 .C..........&.P. │ │ - 0x0000797c 30340000 46970181 b0abf080 00000000 04..F........... │ │ - 0x0000798c 45970181 b0ab7080 00000000 05f20600 E.....p......... │ │ - 0x0000799c 80439701 b0b0ab10 ffff0108 1c044000 .C............@. │ │ - 0x000079ac 203a0000 edf10600 80469701 b0b0abf0 :.......F...... │ │ - 0x000079bc ffff010e 007c0000 7c04a601 0080014c .....|..|......L │ │ - 0x000079cc 00000000 cdf10600 80469701 b0b0abf0 .........F...... │ │ - 0x000079dc ffff0110 00f60100 00f60104 a00200fa ................ │ │ - 0x000079ec 014e0000 41970181 b0b00d84 00000000 .N..A........... │ │ - 0x000079fc 41970181 b0b00d84 00000000 45970181 A...........E... │ │ - 0x00007a0c b0ab7080 00000000 89f10600 80469701 ..p..........F.. │ │ - 0x00007a1c b0b0abf0 ffff010c e40104ec 0200e801 ................ │ │ - 0x00007a2c bc010000 6df10600 80459701 b0b0abb0 ....m....E...... │ │ - 0x00007a3c ff002101 1db40108 800300bc 01500000 ..!..........P.. │ │ - 0x00007a4c 8c0204e6 02009002 98010000 a80304ae ................ │ │ - 0x00007a5c 03017f00 00000000 41970181 b0b00d84 ........A....... │ │ - 0x00007a6c 00000000 2df10600 80469701 b0b0abf0 ....-....F...... │ │ - 0x00007a7c ffff010b 960104c8 01009a01 56000000 ............V... │ │ - 0x00007a8c 41970181 b0b00d84 00000000 46970181 A...........F... │ │ - 0x00007a9c b0abf080 00000000 f9f00600 84419701 .............A.. │ │ - 0x00007aac b0b0b00b ff000d01 082e043c 013c0442 ...........<.<.B │ │ - 0x00007abc 017f0000 00000000 d9f00600 84419701 .............A.. │ │ - 0x00007acc b0b0b00b ff000d01 082e043c 013c0442 ...........<.<.B │ │ - 0x00007adc 017f0000 00000000 b9f00600 84419701 .............A.. │ │ - 0x00007aec b0b0b00b ff000d01 08520460 01600466 .........R.`.`.f │ │ - 0x00007afc 017f0000 00000000 41970181 b0b00d84 ........A....... │ │ - 0x00007b0c 00000000 8df00600 84419701 b0b0b00b .........A...... │ │ - 0x00007b1c ff000d01 08142240 01400446 017f0000 ......"@.@.F.... │ │ - 0x00007b2c 00000000 6df00600 84419701 b0b0b00b ....m....A...... │ │ - 0x00007b3c ff001d01 0c080640 052c063c 075e0668 .......@.,.<.^.h │ │ - 0x00007b4c 017f0000 00017d01 00000000 00000000 ......}......... │ │ - 0x00007b5c 00000000 3df00600 80459701 b0b0abb0 ....=....E...... │ │ - 0x00007b6c ff001501 0f64047e 00a80106 b40101ae .....d.~........ │ │ - 0x00007b7c 010a0000 7f000000 00000000 15f00600 ................ │ │ - 0x00007b8c 80439701 b0b0ab10 ff001901 14120480 .C.............. │ │ - 0x00007b9c 01004404 7c00b001 04e00101 b4013000 ..D.|.........0. │ │ - 0x00007bac 007f0000 00000000 e9ef0600 84419701 .............A.. │ │ - 0x00007bbc b0b0b00d ffff0108 26085000 2e460000 ........&.P..F.. │ │ - 0x00007bcc d1ef0600 80439701 b0b0ab10 ffff010c .....C.......... │ │ - 0x00007bdc 2a067000 66087a00 6e260000 b5ef0600 *.p.f.z.n&...... │ │ - 0x00007bec 84419701 b0b0b00d ffff0108 26064000 .A..........&.@. │ │ - 0x00007bfc 2c300000 43970181 b0ab1080 00000000 ,0..C........... │ │ - 0x00007c0c 43970181 b0ab1080 00000000 41970181 C...........A... │ │ - 0x00007c1c b0b00b84 00000000 79ef0600 80439701 ........y....C.. │ │ - 0x00007c2c b0b0ab80 ff001d01 19007400 00747c82 ..........t..t|. │ │ - 0x00007c3c 0200f001 14000084 020a9402 018e0232 ...............2 │ │ - 0x00007c4c 00007f00 00000000 41970181 b0b00d84 ........A....... │ │ - 0x00007c5c 00000000 41970181 b0b00d84 00000000 ....A........... │ │ - 0x00007c6c 46970181 b0abf080 00000000 41970181 F...........A... │ │ - 0x00007c7c b0b00b84 00000000 19ef0600 80439701 .............C.. │ │ - 0x00007c8c b0b0ab10 ffff010c 00240000 240a5e00 .........$..$.^. │ │ - 0x00007c9c 2e4a0000 43970181 b0ab8080 00000000 .J..C........... │ │ - 0x00007cac 43970181 b0ab8080 00000000 e5ee0600 C............... │ │ - 0x00007cbc 84419701 b0b0b00d ff001d01 19480a86 .A...........H.. │ │ - 0x00007ccc 01006c0a 78007a06 82010188 01069401 ..l.x.z......... │ │ - 0x00007cdc 018e0126 00007f00 00000000 46970181 ...&........F... │ │ - 0x00007cec b0abf080 00000000 a9ee0600 80459701 .............E.. │ │ - 0x00007cfc b0b0ab70 ffff0112 00d00a00 00d00ac0 ...p............ │ │ - 0x00007d0c 019a0e00 900cac03 00000000 45970181 ............E... │ │ - 0x00007d1c b0abb080 00000000 41970181 b0b00d84 ........A....... │ │ - 0x00007d2c 00000000 46970181 b0abf080 00000000 ....F........... │ │ - 0x00007d3c 41970181 b0b00d84 00000000 45970181 A...........E... │ │ - 0x00007d4c b0ab7080 00000000 45970181 b0abb080 ..p.....E....... │ │ - 0x00007d5c 00000000 3dee0600 80459701 b0b0ab70 ....=....E.....p │ │ - 0x00007d6c ff001501 11f80108 a80200d4 0204de02 ................ │ │ - 0x00007d7c 01d80210 00007f00 00000000 15ee0600 ................ │ │ - 0x00007d8c 80469701 b0b0abf0 ffff0110 00d60100 .F.............. │ │ - 0x00007d9c 00d60104 a80200da 01760000 f5ed0600 .........v...... │ │ - 0x00007dac 80469701 b0b0abf0 ff002901 232e3484 .F........).#.4. │ │ - 0x00007dbc 03008601 1af00200 ac013884 0300f201 ..........8..... │ │ - 0x00007dcc 08e00200 c40204e2 0200a403 06ae0301 ................ │ │ - 0x00007ddc 7f000000 00000000 b9ed0600 80439701 .............C.. │ │ - 0x00007dec b0b0ab10 ffff0108 34045200 38340000 ........4.R.84.. │ │ - 0x00007dfc 43970181 b0ab8080 00000000 95ed0600 C............... │ │ - 0x00007e0c 80439701 b0b0ab10 ffff0121 00940100 .C.........!.... │ │ - 0x00007e1c 00940104 a60200fa 0108ba02 00820210 ................ │ │ - 0x00007e2c 00009202 12a60200 a4024c00 00000000 ..........L..... │ │ - 0x00007e3c 61ed0600 84419701 b0b0b00b ffff010f a....A.......... │ │ - 0x00007e4c 007a0000 7a2cee01 00a6018a 01000000 .z..z,.......... │ │ - 0x00007e5c 41ed0600 80459701 b0b0abb0 ffff0116 A....E.......... │ │ - 0x00007e6c 009e0200 009e0208 ec0200be 020ae202 ................ │ │ - 0x00007e7c 00c80248 00000000 45970181 b0abb080 ...H....E....... │ │ - 0x00007e8c 00000000 0ded0600 80439701 b0b0ab80 .........C...... │ │ - 0x00007e9c ff001d01 16009601 00009601 08a00100 ................ │ │ - 0x00007eac a20106ae 0101a801 1000007f 00000000 ................ │ │ - 0x00007ebc 00000000 ddec0600 84419701 b0b0b00b .........A...... │ │ - 0x00007ecc ff001501 100a063c 00104c00 005c0668 .......<..L..\.h │ │ - 0x00007edc 01620a00 007f0000 00000000 b5ec0600 .b.............. │ │ - 0x00007eec 80459701 b0b0ab70 ff001101 0d3c045e .E.....p.....<.^ │ │ - 0x00007efc 00780494 01017c1c 00007f00 00000000 .x....|......... │ │ - 0x00007f0c 91ec0600 80469701 b0b0abf0 ff001501 .....F.......... │ │ - 0x00007f1c 0e3c0460 007e0498 01018201 1a00007f .<.`.~.......... │ │ - 0x00007f2c 00000000 00000000 69ec0600 80439701 ........i....C.. │ │ - 0x00007f3c b0b0ab80 ffff0108 10042c00 142c0000 ..........,..,.. │ │ - 0x00007f4c 51ec0600 84419701 b0b0b00b ff001501 Q....A.......... │ │ - 0x00007f5c 10060436 000a4c00 00560662 015c0a00 ...6..L..V.b.\.. │ │ - 0x00007f6c 007f0000 00000000 29ec0600 84419701 ........)....A.. │ │ - 0x00007f7c b0b0b00b ff001501 10060436 000a4c00 ...........6..L. │ │ - 0x00007f8c 00560662 015c0a00 007f0000 00000000 .V.b.\.......... │ │ - 0x00007f9c 01ec0600 b0ae0500 ff003d01 371006f8 ..........=.7... │ │ - 0x00007fac 01002806 b401004c 06b00100 7804e001 ..(....L....x... │ │ - 0x00007fbc 00aa0104 f80100d4 0106dc01 01f00106 ................ │ │ - 0x00007fcc 8c0201fa 01069002 01800206 8c020186 ................ │ │ - 0x00007fdc 02120000 7f000000 00000000 80040181 ................ │ │ - 0x00007fec b0b0aaf0 00000000 80090181 b0b0aaf0 ................ │ │ - 0x00007ffc 00000000 9deb0600 08849700 ff000901 ................ │ │ - 0x0000800c 04080e30 017f0000 00000000 46970181 ...0........F... │ │ - 0x0000801c b0abf080 00000000 439b0181 b0b0c784 ........C....... │ │ - 0x0000802c 00000000 439b0181 b0b0c784 00000000 ....C........... │ │ - 0x0000803c 419b0181 b0b0c184 00000000 459b0181 A...........E... │ │ - 0x0000804c b0b0f784 00000000 439b0181 b0b0c784 ........C....... │ │ - 0x0000805c 00000000 439b0181 b0b0c784 00000000 ....C........... │ │ - 0x0000806c 439b0181 b0b0c784 00000000 439b0181 C...........C... │ │ - 0x0000807c b0b0c784 00000000 459b0181 b0b0df84 ........E....... │ │ - 0x0000808c 00000000 419b0181 b0b0c184 00000000 ....A........... │ │ - 0x0000809c 419b0181 b0b0c184 00000000 419b0181 A...........A... │ │ - 0x000080ac b0b0c184 00000000 419b0181 b0b08384 ........A....... │ │ - 0x000080bc 00000000 439b0181 b0b08f84 00000000 ....C........... │ │ - 0x000080cc 439b0181 b0b0c784 00000000 419b0181 C...........A... │ │ - 0x000080dc b0b0c184 00000000 419b0181 b0b08384 ........A....... │ │ - 0x000080ec 00000000 459b0181 b0b0df84 00000000 ....E........... │ │ - 0x000080fc 419b0181 b0b0c184 00000000 419b0181 A...........A... │ │ - 0x0000810c b0b0c184 00000000 459b0181 b0b0df84 ........E....... │ │ - 0x0000811c 00000000 .... │ │ + 0x00006074 910b0700 b0af1600 ff009c01 01950100 ................ │ │ + 0x00006084 a8050000 a8050692 0d00cc05 06e60c00 ................ │ │ + 0x00006094 e205048e 0d00ac06 04d80d00 c20616c8 ................ │ │ + 0x000060a4 0d008409 04f60c00 8809ba01 0000c20a ................ │ │ + 0x000060b4 06fe0d00 c80a1800 00e00a06 f00d00e6 ................ │ │ + 0x000060c4 0a460000 ac0b04cc 0c00b00b 7a0000aa .F..........z... │ │ + 0x000060d4 0c08ea0c 00b20c12 0000c40c 06fe0d00 ................ │ │ + 0x000060e4 ca0c2200 00ec0c08 ec0d01b2 0d06c00d .."............. │ │ + 0x000060f4 01b80d06 c40d01ca 0d08d40d 01da0d06 ................ │ │ + 0x00006104 ec0d01e0 0d06e80d 01f40d12 8c0e0186 ................ │ │ + 0x00006114 0e420000 7f000000 00000000 c90d0181 .B.............. │ │ + 0x00006124 b0b0ae80 00000000 c9090181 b0af0080 ................ │ │ + 0x00006134 00000000 80c90181 b0b00884 00000000 ................ │ │ + 0x00006144 46970181 b0abf080 00000000 b50a0700 F............... │ │ + 0x00006154 80469701 b0b0abf0 ffff0116 00e40100 .F.............. │ │ + 0x00006164 00e4011a c0020094 021cbe02 00b00224 ...............$ │ │ + 0x00006174 00000000 41970181 b0b00b84 00000000 ....A........... │ │ + 0x00006184 41970181 b0b00b84 00000000 750a0700 A...........u... │ │ + 0x00006194 80439701 b0b0ab80 ffff010d 6a088401 .C..........j... │ │ + 0x000061a4 0078047e 007c1600 00000000 550a0700 .x.~.|......U... │ │ + 0x000061b4 80459701 b0b0ab70 ffff0110 00a40100 .E.....p........ │ │ + 0x000061c4 00a4013a ec0100de 01320000 43970181 ...:.....2..C... │ │ + 0x000061d4 b0ab1080 00000000 43970181 b0ab1080 ........C....... │ │ + 0x000061e4 00000000 1d0a0700 80469701 b0b0abf0 .........F...... │ │ + 0x000061f4 ffff0117 00bc0f00 00bc0fc0 01b81100 ................ │ │ + 0x00006204 94110cba 1100a011 38000000 41970181 ........8...A... │ │ + 0x00006214 b0b00b84 00000000 43970181 b0ab1080 ........C....... │ │ + 0x00006224 00000000 46970181 b0abf080 00000000 ....F........... │ │ + 0x00006234 46970181 b0abf080 00000000 43970181 F...........C... │ │ + 0x00006244 b0ab1080 00000000 46970181 b0abf080 ........F....... │ │ + 0x00006254 00000000 46970181 b0abf080 00000000 ....F........... │ │ + 0x00006264 43970181 b0ab1080 00000000 43970181 C...........C... │ │ + 0x00006274 b0ab8080 00000000 43970181 b0ab1080 ........C....... │ │ + 0x00006284 00000000 41970181 b0b00d84 00000000 ....A........... │ │ + 0x00006294 46970181 b0abf080 00000000 43970181 F...........C... │ │ + 0x000062a4 b0ab8080 00000000 41970181 b0b00b84 ........A....... │ │ + 0x000062b4 00000000 41970181 b0b00b84 00000000 ....A........... │ │ + 0x000062c4 46970181 b0abf080 00000000 41970181 F...........A... │ │ + 0x000062d4 b0b00d84 00000000 46970181 b0abf080 ........F....... │ │ + 0x000062e4 00000000 43970181 b0ab8080 00000000 ....C........... │ │ + 0x000062f4 43970181 b0ab8080 00000000 41970181 C...........A... │ │ + 0x00006304 b0b00b84 00000000 41970181 b0b00b84 ........A....... │ │ + 0x00006314 00000000 41970181 b0b00d84 00000000 ....A........... │ │ + 0x00006324 41970181 b0b00d84 00000000 41970181 A...........A... │ │ + 0x00006334 b0b00d84 00000000 46970181 b0abf080 ........F....... │ │ + 0x00006344 00000000 43970181 b0ab1080 00000000 ....C........... │ │ + 0x00006354 46970181 b0abf080 00000000 45970181 F...........E... │ │ + 0x00006364 b0ab7080 00000000 45970181 b0ab7080 ..p.....E.....p. │ │ + 0x00006374 00000000 41970181 b0b00b84 00000000 ....A........... │ │ + 0x00006384 46970181 b0abf080 00000000 41970181 F...........A... │ │ + 0x00006394 b0b00d84 00000000 41970181 b0b00d84 ........A....... │ │ + 0x000063a4 00000000 43970181 b0ab8080 00000000 ....C........... │ │ + 0x000063b4 51080700 08849700 ff000901 041a0622 Q.............." │ │ + 0x000063c4 017f0000 00000000 46970181 b0abf080 ........F....... │ │ + 0x000063d4 00000000 46970181 b0abf080 00000000 ....F........... │ │ + 0x000063e4 41970181 b0b00b84 00000000 45970181 A...........E... │ │ + 0x000063f4 b0ab7080 00000000 09080700 80469701 ..p..........F.. │ │ + 0x00006404 b0b0abf0 ffff0163 c40204a6 0b00c802 .......c........ │ │ + 0x00006414 2a0000f2 02069a0b 00f80276 0000ee03 *..........v.... │ │ + 0x00006424 04940b00 f203c402 0000b606 04960b00 ................ │ │ + 0x00006434 ba06fc02 0000b609 04920b00 ba097400 ..............t. │ │ + 0x00006444 00ae0a0a e40b00be 0a18e60b 00de0a0a ................ │ │ + 0x00006454 c00b00f0 0a04b40b 00fa0a04 ac0b008a ................ │ │ + 0x00006464 0b06aa0b 00900ba8 01000000 82b20181 ................ │ │ + 0x00006474 b0b0af07 00000000 80b20181 b0b0af07 ................ │ │ + 0x00006484 00000000 b0b20181 b0b0af01 00000000 ................ │ │ + 0x00006494 c92f0181 b0af0085 00000000 3f190181 ./..........?... │ │ + 0x000064a4 af0084c9 00000000 59070700 b0ae0700 ........Y....... │ │ + 0x000064b4 ff001d01 1600ec04 0000ec04 0a820500 ................ │ │ + 0x000064c4 84050690 05018a05 3200007f 00000000 ........2....... │ │ + 0x000064d4 00000000 92b20181 b0b0af01 00000000 ................ │ │ + 0x000064e4 35b20181 af0080c9 00000000 c91f0181 5............... │ │ + 0x000064f4 b0af0082 00000000 46970181 b0abf080 ........F....... │ │ + 0x00006504 00000000 46970181 b0abf080 00000000 ....F........... │ │ + 0x00006514 46970181 b0abf080 00000000 e5060700 F............... │ │ + 0x00006524 b0af0a00 ff001d01 18009402 00009402 ................ │ │ + 0x00006534 c201ec05 00d60396 020000ec 0504f205 ................ │ │ + 0x00006544 017f0000 00000000 45970181 b0abb080 ........E....... │ │ + 0x00006554 00000000 46970181 b0abf080 00000000 ....F........... │ │ + 0x00006564 46970181 b0abf080 00000000 45970181 F...........E... │ │ + 0x00006574 b0ab7080 00000000 45970181 b0abb080 ..p.....E....... │ │ + 0x00006584 00000000 41970181 b0b00d84 00000000 ....A........... │ │ + 0x00006594 43970181 b0ab1080 00000000 46970181 C...........F... │ │ + 0x000065a4 b0abf080 00000000 41970181 b0b00b84 ........A....... │ │ + 0x000065b4 00000000 45970181 b0ab7080 00000000 ....E.....p..... │ │ + 0x000065c4 43970181 b0ab8080 00000000 45970181 C...........E... │ │ + 0x000065d4 b0abb080 00000000 45970181 b0abb080 ........E....... │ │ + 0x000065e4 00000000 45970181 b0abb080 00000000 ....E........... │ │ + 0x000065f4 45970181 b0abb080 00000000 45970181 E...........E... │ │ + 0x00006604 b0abb080 00000000 45970181 b0abb080 ........E....... │ │ + 0x00006614 00000000 46970181 b0abf080 00000000 ....F........... │ │ + 0x00006624 46970181 b0abf080 00000000 43970181 F...........C... │ │ + 0x00006634 b0ab1080 00000000 43970181 b0ab1080 ........C....... │ │ + 0x00006644 00000000 46970181 b0abf080 00000000 ....F........... │ │ + 0x00006654 46970181 b0abf080 00000000 43970181 F...........C... │ │ + 0x00006664 b0ab8080 00000000 43970181 b0ab1080 ........C....... │ │ + 0x00006674 00000000 43970181 b0ab8080 00000000 ....C........... │ │ + 0x00006684 46970181 b0abf080 00000000 43970181 F...........C... │ │ + 0x00006694 b0ab1080 00000000 43970181 b0ab8080 ........C....... │ │ + 0x000066a4 00000000 46970181 b0abf080 00000000 ....F........... │ │ + 0x000066b4 41970181 b0b00b84 00000000 46970181 A...........F... │ │ + 0x000066c4 b0abf080 00000000 43970181 b0ab1080 ........C....... │ │ + 0x000066d4 00000000 46970181 b0abf080 00000000 ....F........... │ │ + 0x000066e4 46970181 b0abf080 00000000 46970181 F...........F... │ │ + 0x000066f4 b0abf080 00000000 41970181 b0b00d84 ........A....... │ │ + 0x00006704 00000000 41970181 b0b00d84 00000000 ....A........... │ │ + 0x00006714 f1040700 b0ac3100 ffff0111 00ca0400 ......1......... │ │ + 0x00006724 00ca0408 920500d2 04fa0100 00000000 ................ │ │ + 0x00006734 d1040700 80459701 b0b0abb0 ff000901 .....E.......... │ │ + 0x00006744 05345692 02017f00 00000000 b5040700 .4V............. │ │ + 0x00006754 80469701 b0b0abf0 ff005101 4d00d001 .F........Q.M... │ │ + 0x00006764 0000d001 3ef80700 8e027800 008603aa ....>.....x..... │ │ + 0x00006774 01f80700 d2041ce6 0700f004 06f80700 ................ │ │ + 0x00006784 9c05a001 e60700bc 060af807 00c60696 ................ │ │ + 0x00006794 010000dc 0708f807 00e8070a f40701fa ................ │ │ + 0x000067a4 07048408 01fe076a 00007f00 00000000 .......j........ │ │ + 0x000067b4 46970181 b0abf080 00000000 43970181 F...........C... │ │ + 0x000067c4 b0ab8080 00000000 39040700 80439701 ........9....C.. │ │ + 0x000067d4 b0b0ab10 ff002501 1e1e089a 01005204 ......%.......R. │ │ + 0x000067e4 80010078 069a0100 7e260000 a40106b0 ...x....~&...... │ │ + 0x000067f4 0101aa01 1600007f 00000000 00000000 ................ │ │ + 0x00006804 01040700 80439701 b0b0ab10 ffff0108 .....C.......... │ │ + 0x00006814 18043c00 1c3a0000 43970181 b0ab8080 ..<..:..C....... │ │ + 0x00006824 00000000 dd030700 84419701 b0b0b00b .........A...... │ │ + 0x00006834 ff000d01 082e043c 013c0442 017f0000 .......<.<.B.... │ │ + 0x00006844 00000000 bd030700 84419701 b0b0b00b .........A...... │ │ + 0x00006854 ff001501 0a142288 01037404 8401017f ......"...t..... │ │ + 0x00006864 00017d00 00000000 00000000 41970181 ..}.........A... │ │ + 0x00006874 b0b00d84 00000000 43970181 b0ab8080 ........C....... │ │ + 0x00006884 00000000 43970181 b0ab8080 00000000 ....C........... │ │ + 0x00006894 41970181 b0b00b84 00000000 65030700 A...........e... │ │ + 0x000068a4 80439701 b0b0ab10 ffff0108 18043c00 .C............<. │ │ + 0x000068b4 1c3a0000 45970181 b0abb080 00000000 .:..E........... │ │ + 0x000068c4 45970181 b0abb080 00000000 41970181 E...........A... │ │ + 0x000068d4 b0b00d84 00000000 29030700 80469701 ........)....F.. │ │ + 0x000068e4 b0b0abf0 ff004d01 4800a801 0000a801 ......M.H....... │ │ + 0x000068f4 08ea0300 dc0104c2 0300e001 3c00009c ............<... │ │ + 0x00006904 0204c403 00b00204 ce0300b4 024a0000 .............J.. │ │ + 0x00006914 fe0204c0 03008203 360000b8 0306ea03 ........6....... │ │ + 0x00006924 00be0336 0000f403 06800401 fa033600 ...6..........6. │ │ + 0x00006934 007f0000 00000000 41970181 b0b00d84 ........A....... │ │ + 0x00006944 00000000 bd020700 80469701 b0b0abf0 .........F...... │ │ + 0x00006954 ffff0122 480ecc03 00a40104 a80300d4 ..."H........... │ │ + 0x00006964 019201c0 0300e602 3800009e 0308ba03 ........8....... │ │ + 0x00006974 00a6034e 00000000 89020700 08849700 ...N............ │ │ + 0x00006984 ff000d01 08120626 0026042c 017f0000 .......&.&.,.... │ │ + 0x00006994 00000000 6d020700 80469701 b0b0abf0 ....m....F...... │ │ + 0x000069a4 ffff0110 00940100 00940110 cc0100a4 ................ │ │ + 0x000069b4 01340000 4d020700 80469701 b0b0abf0 .4..M....F...... │ │ + 0x000069c4 ff00d802 01d102a0 020eda48 00ae02b0 ...........H.... │ │ + 0x000069d4 020000de 04048648 009c0610 c44600ac .......H.....F.. │ │ + 0x000069e4 06f20200 009e09da 09e44800 90130682 ..........H..... │ │ + 0x000069f4 4700c814 049c4800 cc14ba09 0000861e G.....H......... │ │ + 0x00006a04 08ca4600 8e1e2000 00ae1e14 ca4600ec ..F... ......F.. │ │ + 0x00006a14 1e04e846 00f01e58 0000c81f 08b64800 ...F...X......H. │ │ + 0x00006a24 d01f8408 0000d427 10e24800 e427a202 .......'..H..'.. │ │ + 0x00006a34 0000862a 08e24800 a22a08ce 4800ca2a ...*..H..*..H..* │ │ + 0x00006a44 06e24800 902bce02 e64800de 2d900200 ..H..+...H..-... │ │ + 0x00006a54 00ee2fd8 01ea4800 c6311200 00d8310a ../...H..1....1. │ │ + 0x00006a64 ea4800e2 31880500 00ea366e e2480096 .H..1.....6n.H.. │ │ + 0x00006a74 380e9846 00fa3808 ea480082 39a60600 8..F..8..H..9... │ │ + 0x00006a84 00a83f08 c64800fc 3f08ee48 00ae420c ..?..H..?..H..B. │ │ + 0x00006a94 c64600ba 42ee0100 00a84404 a24900ae .F..B.....D..I.. │ │ + 0x00006aa4 44088a49 00be4420 8c4a00de 44480000 D..I..D .J..DH.. │ │ + 0x00006ab4 a6450e94 4600b445 1c0000d0 4516e048 .E..F..E....E..H │ │ + 0x00006ac4 00ec4508 b24800f4 450a0000 fe450aa2 ..E..H..E....E.. │ │ + 0x00006ad4 47008a46 08944700 b64608c0 4601be46 G..F..G..F..F..F │ │ + 0x00006ae4 58000096 47069e47 01be4706 f84701e2 X...G..G..G..G.. │ │ + 0x00006af4 4704ee47 01f84706 824801b8 4808c248 G..G..G..H..H..H │ │ + 0x00006b04 01c0484c 00008c49 069e4901 d0490684 ..HL...I..I..I.. │ │ + 0x00006b14 4a01d649 aa010000 7f000000 00000000 J..I............ │ │ + 0x00006b24 46970181 b0abf080 00000000 43970181 F...........C... │ │ + 0x00006b34 b0ab1080 00000000 46970181 b0abf080 ........F....... │ │ + 0x00006b44 00000000 46970181 b0abf080 00000000 ....F........... │ │ + 0x00006b54 46970181 b0abf080 00000000 41970181 F...........A... │ │ + 0x00006b64 b0b00b84 00000000 99000700 80469701 .............F.. │ │ + 0x00006b74 b0b0abf0 ff003501 2f482690 06018e01 ......5./H&..... │ │ + 0x00006b84 04ca0501 b2010690 0601d601 04e00500 ................ │ │ + 0x00006b94 da018a02 0000e403 06f60500 b8050694 ................ │ │ + 0x00006ba4 0600c005 08800600 7f000000 00000000 ................ │ │ + 0x00006bb4 51000700 80439701 b0b0ab10 ffff010c Q....C.......... │ │ + 0x00006bc4 00220000 22085e00 2a520000 35000700 ."..".^.*R..5... │ │ + 0x00006bd4 80469701 b0b0abf0 ffff0117 ae0312be .F.............. │ │ + 0x00006be4 0a00c003 ec060000 ac0a08b6 0a00b40a ................ │ │ + 0x00006bf4 20000000 43970181 b0ab1080 00000000 ...C........... │ │ + 0x00006c04 01000700 80469701 b0b0abf0 ff00c802 .....F.......... │ │ + 0x00006c14 01c10214 a804aa35 00ea05f6 03a43500 .......5......5. │ │ + 0x00006c24 e009d202 0000b20c 06a03500 c20e0a8e ..........5..... │ │ + 0x00006c34 3500cc0e e4010000 b01004d2 3400b410 5...........4... │ │ + 0x00006c44 ac010000 e01106d0 3300e611 ba010000 ........3....... │ │ + 0x00006c54 a01304b4 3300a413 a60b0000 ca1e06b0 ....3........... │ │ + 0x00006c64 3300c620 06ae3300 96213ab4 3300ac22 3.. ..3..!:.3.." │ │ + 0x00006c74 0eb23300 802306b8 3300a825 04d43400 ..3..#..3..%..4. │ │ + 0x00006c84 842604b6 3500c826 06de3400 de2708ac .&..5..&..4..'.. │ │ + 0x00006c94 3400b029 0cfa3400 bc292c00 00e82906 4..)..4..),...). │ │ + 0x00006ca4 de3300ee 292c0000 9a2a06ce 3400de2a .3..),...*..4..* │ │ + 0x00006cb4 08ec3300 e82a06a8 3400ee2a d0010000 ..3..*..4..*.... │ │ + 0x00006cc4 be2cc602 e2340084 2f740000 f82f0ade .,...4../t.../.. │ │ + 0x00006cd4 34008230 780000fa 3008c636 0084310e 4..0x...0..6..1. │ │ + 0x00006ce4 9c360092 31f80100 008a3306 ac330094 .6..1.....3..3.. │ │ + 0x00006cf4 3308c234 009e3308 aa3300c6 33089c35 3..4..3..3..3..5 │ │ + 0x00006d04 01d23306 da3301e0 3306e833 01ee3306 ..3..3..3..3..3. │ │ + 0x00006d14 f63301ae 3406be34 01ec3406 c23601fc .3..4..4..4..6.. │ │ + 0x00006d24 34068a35 01823506 94360192 35069c35 4..5..5..6..5..5 │ │ + 0x00006d34 01bc350a 98360184 36069436 019e3606 ..5..6..6..6..6. │ │ + 0x00006d44 be3601b4 3606c236 01c83606 863701ce .6..6..6..6..7.. │ │ + 0x00006d54 363c0000 7f000000 00000000 a5fe0600 6<.............. │ │ + 0x00006d64 80469701 b0b0abf0 ffff016a 00320000 .F.........j.2.. │ │ + 0x00006d74 320ab60d 003c3400 00700eae 0d008401 2....<4..p...... │ │ + 0x00006d84 16b60d00 9a01d803 0000f204 08ae0d00 ................ │ │ + 0x00006d94 fa045000 00ca0504 820d00e2 050aae0d ..P............. │ │ + 0x00006da4 00a60630 ba0d00d6 06f80100 00ce0816 ...0............ │ │ + 0x00006db4 980d00e4 08cc0100 00b00a06 980d00dc ................ │ │ + 0x00006dc4 0a0cae0d 00e80a64 0000cc0b ae01980d .......d........ │ │ + 0x00006dd4 00fa0c6c 00000000 29fe0600 84419701 ...l....)....A.. │ │ + 0x00006de4 b0b0b00b ff001901 15280460 002c0870 .........(.`.,.p │ │ + 0x00006df4 0038046c 006218a0 01017a2a 00007f00 .8.l.b....z*.... │ │ + 0x00006e04 00000000 46970181 b0abf080 00000000 ....F........... │ │ + 0x00006e14 f1fd0600 80469701 b0b0abf0 ff002d01 .....F........-. │ │ + 0x00006e24 2800c202 0000c202 0e840600 9a0506f2 (............... │ │ + 0x00006e34 0500dc05 08f60500 ec0504f4 0500ac06 ................ │ │ + 0x00006e44 06b80601 b2061200 007f0000 00000000 ................ │ │ + 0x00006e54 b1fd0600 84419701 b0b0b00b ff001501 .....A.......... │ │ + 0x00006e64 10280462 002c0872 0064086e 016c3400 .(.b.,.r.d.n.l4. │ │ + 0x00006e74 007f0000 00000000 89fd0600 84419701 .............A.. │ │ + 0x00006e84 b0b0b00b ff001501 10260436 002a0e00 .........&.6.*.. │ │ + 0x00006e94 00380846 01400a00 007f0000 00000000 .8.F.@.......... │ │ + 0x00006ea4 61fd0600 80459701 b0b0abb0 ffff0110 a....E.......... │ │ + 0x00006eb4 00ba0300 00ba0304 f60300be 03560000 .............V.. │ │ + 0x00006ec4 41970181 b0b00b84 00000000 46970181 A...........F... │ │ + 0x00006ed4 b0abf080 00000000 46970181 b0abf080 ........F....... │ │ + 0x00006ee4 00000000 1dfd0600 80469701 b0b0abf0 .........F...... │ │ + 0x00006ef4 ff008801 01810192 070acc2b 009c0744 ...........+...D │ │ + 0x00006f04 0000e007 06e22b00 da0a08c6 2b00e20a ......+.....+... │ │ + 0x00006f14 c8030000 aa0e0896 2c00b20e c60b0000 ........,....... │ │ + 0x00006f24 f8190480 2c00b41d 08982c00 8e200e84 ....,.....,.. .. │ │ + 0x00006f34 2c009221 06f02a00 c021089c 2b00be22 ,..!..*..!..+.." │ │ + 0x00006f44 30a22b00 a82410f2 2b00be24 08ea2a00 0.+..$..+..$..*. │ │ + 0x00006f54 fa2550fc 2a009a29 06e02a00 f42b06fc .%P.*..)..*..+.. │ │ + 0x00006f64 2b01862c 06922c01 8c2c2c00 00b82c04 +..,..,..,,...,. │ │ + 0x00006f74 ca2c01bc 2c120000 7f000000 00000000 .,..,........... │ │ + 0x00006f84 81fc0600 84419701 b0b0b00b ffff0108 .....A.......... │ │ + 0x00006f94 28047800 2c5c0000 69fc0600 84419701 (.x.,\..i....A.. │ │ + 0x00006fa4 b0b0b00b ffff0108 06063a00 0c5c0000 ..........:..\.. │ │ + 0x00006fb4 41970181 b0b00d84 00000000 45fc0600 A...........E... │ │ + 0x00006fc4 84419701 b0b0b00b ff001d01 193204c4 .A...........2.. │ │ + 0x00006fd4 01005804 ae01005c 6a0000c6 0106d801 ..X....\j....... │ │ + 0x00006fe4 01cc0110 00007f00 00000000 46970181 ............F... │ │ + 0x00006ff4 b0abf080 00000000 09fc0600 80469701 .............F.. │ │ + 0x00007004 b0b0abf0 ffff0177 00c00100 00c00108 .......w........ │ │ + 0x00007014 963000c8 018c1700 00d41806 e82f00da .0.........../.. │ │ + 0x00007024 18ac0a00 00862306 d02f00c4 2306c42f ......#../..#../ │ │ + 0x00007034 00c4260e b82f00e2 2606aa2f 008c2706 ..&../..&../..'. │ │ + 0x00007044 b62f008e 280ede2f 00b02806 d22f00dc ./..(../..(../.. │ │ + 0x00007054 2908882f 00e429b0 03000094 2d088a2f )../..).....-../ │ │ + 0x00007064 00be2e08 a43000c8 2e088830 00d22e08 .....0.....0.... │ │ + 0x00007074 ba2f00e0 2e26ce2f 00862fce 01000000 ./...&./../..... │ │ + 0x00007084 45970181 b0abb080 00000000 800b0181 E............... │ │ + 0x00007094 b0b0aaf0 00000000 41970181 b0b00b84 ........A....... │ │ + 0x000070a4 00000000 41970181 b0b00d84 00000000 ....A........... │ │ + 0x000070b4 43970181 b0ab1080 00000000 43970181 C...........C... │ │ + 0x000070c4 b0ab8080 00000000 39fb0600 80469701 ........9....F.. │ │ + 0x000070d4 b0b0abf0 ffff0110 00800100 00800108 ................ │ │ + 0x000070e4 a6010088 01320000 80070181 b0b0aaf0 .....2.......... │ │ + 0x000070f4 00000000 41970181 b0b00b84 00000000 ....A........... │ │ + 0x00007104 43970181 b0ab1080 00000000 f5fa0600 C............... │ │ + 0x00007114 80469701 b0b0abf0 ffff0123 00d20100 .F.........#.... │ │ + 0x00007124 00d20108 b20300e0 0108a403 009e0208 ................ │ │ + 0x00007134 c20300ac 0208b403 00b402a2 01000000 ................ │ │ + 0x00007144 41970181 b0b00b84 00000000 43970181 A...........C... │ │ + 0x00007154 b0ab1080 00000000 43970181 b0ab1080 ........C....... │ │ + 0x00007164 00000000 46970181 b0abf080 00000000 ....F........... │ │ + 0x00007174 91fa0600 80469701 b0b0abf0 ffff0110 .....F.......... │ │ + 0x00007184 00b41000 00b41004 c61000b8 10300000 .............0.. │ │ + 0x00007194 46970181 b0abf080 00000000 65fa0600 F...........e... │ │ + 0x000071a4 80469701 b0b0abf0 ffff0135 900b06fe .F.........5.... │ │ + 0x000071b4 1200e20b 42fc1200 fc0c0680 1300f20e ....B........... │ │ + 0x000071c4 08a01300 a60f088a 1300ae0f bc030000 ................ │ │ + 0x000071d4 ea1208ac 1300f412 04fa1200 f8126000 ..............`. │ │ + 0x000071e4 00000000 1dfa0600 80469701 b0b0abf0 .........F...... │ │ + 0x000071f4 ffff0128 00be0600 00be0608 e6090080 ...(............ │ │ + 0x00007204 0708e209 00980808 d60900a0 08ac0100 ................ │ │ + 0x00007214 00cc0904 e60900d0 09480000 46970181 .........H..F... │ │ + 0x00007224 b0abf080 00000000 46970181 b0abf080 ........F....... │ │ + 0x00007234 00000000 41970181 b0b00b84 00000000 ....A........... │ │ + 0x00007244 c1f90600 80459701 b0b0ab70 ffff010d .....E.....p.... │ │ + 0x00007254 00740000 74089a01 007c3000 00000000 .t..t....|0..... │ │ + 0x00007264 80060181 b0b0aaf0 00000000 41970181 ............A... │ │ + 0x00007274 b0b00d84 00000000 46970181 b0abf080 ........F....... │ │ + 0x00007284 00000000 7df90600 80469701 b0b0abf0 ....}....F...... │ │ + 0x00007294 ffff0110 00881000 00881004 9a10008c ................ │ │ + 0x000072a4 10300000 46970181 b0abf080 00000000 .0..F........... │ │ + 0x000072b4 46970181 b0abf080 00000000 800d0181 F............... │ │ + 0x000072c4 b0b0aaf0 00000000 80230181 b0b0aaf0 .........#...... │ │ + 0x000072d4 00000000 2df90600 80459701 b0b0ab70 ....-....E.....p │ │ + 0x000072e4 ffff010d 00740000 74089a01 007c3000 .....t..t....|0. │ │ + 0x000072f4 00000000 41970181 b0b00b84 00000000 ....A........... │ │ + 0x00007304 41970181 b0b00d84 00000000 43970181 A...........C... │ │ + 0x00007314 b0ab1080 00000000 43970181 b0ab1080 ........C....... │ │ + 0x00007324 00000000 43970181 b0ab1080 00000000 ....C........... │ │ + 0x00007334 43970181 b0ab1080 00000000 46970181 C...........F... │ │ + 0x00007344 b0abf080 00000000 b9f80600 80469701 .............F.. │ │ + 0x00007354 b0b0abf0 ffff0110 00aa1000 00aa1004 ................ │ │ + 0x00007364 bc1000ae 102e0000 46970181 b0abf080 ........F....... │ │ + 0x00007374 00000000 8df80600 80469701 b0b0abf0 .........F...... │ │ + 0x00007384 ffff010b d00204de 0200d402 14000000 ................ │ │ + 0x00007394 46970181 b0abf080 00000000 65f80600 F...........e... │ │ + 0x000073a4 80469701 b0b0abf0 ffff010c f00206e0 .F.............. │ │ + 0x000073b4 0400f602 fe010000 80000181 b0b0aaf0 ................ │ │ + 0x000073c4 00000000 46970181 b0abf080 00000000 ....F........... │ │ + 0x000073d4 41970181 b0b00b84 00000000 46970181 A...........F... │ │ + 0x000073e4 b0abf080 00000000 41970181 b0b00b84 ........A....... │ │ + 0x000073f4 00000000 0df80600 80439701 b0b0ab10 .........C...... │ │ + 0x00007404 ffff010c 00380000 38066c00 3e400000 .....8..8.l.>@.. │ │ + 0x00007414 45970181 b0abb080 00000000 41970181 E...........A... │ │ + 0x00007424 b0b00b84 00000000 d9f70600 80439701 .............C.. │ │ + 0x00007434 b0b0ab80 ff001901 12006c00 006c047a ..........l..l.z │ │ + 0x00007444 007c0688 01018201 0a00007f 00000000 .|.............. │ │ + 0x00007454 00000000 adf70600 80459701 b0b0abb0 .........E...... │ │ + 0x00007464 ffff010b ec0104fa 0100f001 14000000 ................ │ │ + 0x00007474 43970181 b0ab8080 00000000 41970181 C...........A... │ │ + 0x00007484 b0b00b84 00000000 41970181 b0b00d84 ........A....... │ │ + 0x00007494 00000000 6df70600 80459701 b0b0abb0 ....m....E...... │ │ + 0x000074a4 ff001101 0c260444 004a0a64 01541400 .....&.D.J.d.T.. │ │ + 0x000074b4 007f0000 00000000 49f70600 80459701 ........I....E.. │ │ + 0x000074c4 b0b0ab70 ff001501 105404b4 0100c201 ...p.....T...... │ │ + 0x000074d4 0adc0101 cc011400 007f0000 00000000 ................ │ │ + 0x000074e4 21f70600 84419701 b0b0b00b ffff0108 !....A.......... │ │ + 0x000074f4 28047800 2c5c0000 09f70600 80439701 (.x.,\.......C.. │ │ + 0x00007504 b0b0ab10 ff001901 152c04d0 020030d6 .........,....0. │ │ + 0x00007514 02000086 03049003 018a030a 00007f00 ................ │ │ + 0x00007524 00000000 46970181 b0abf080 00000000 ....F........... │ │ + 0x00007534 d1f60600 80459701 b0b0ab70 ffff010e .....E.....p.... │ │ + 0x00007544 003e0000 3e08bc01 00469601 00000000 .>..>....F...... │ │ + 0x00007554 46970181 b0abf080 00000000 45970181 F...........E... │ │ + 0x00007564 b0ab7080 00000000 46970181 b0abf080 ..p.....F....... │ │ + 0x00007574 00000000 8df60600 80459701 b0b0abb0 .........E...... │ │ + 0x00007584 ffff0110 00ea0200 00ea0204 b80300ee ................ │ │ + 0x00007594 026a0000 6df60600 80469701 b0b0abf0 .j..m....F...... │ │ + 0x000075a4 ffff0185 01180a8a 0d003c0e f40c0094 ..........<..... │ │ + 0x000075b4 0308c20c 009c0382 0100009e 0408c20c ................ │ │ + 0x000075c4 00d80404 a20c00dc 04640000 c00518c6 .........d...... │ │ + 0x000075d4 0c00d805 5c0000b4 0610b40c 00c40634 ....\..........4 │ │ + 0x000075e4 0000f806 0cb40c00 a4070ed0 0c00c807 ................ │ │ + 0x000075f4 06960c00 e40708d0 0c00e808 10da0c00 ................ │ │ + 0x00007604 ec0914f4 0c00800a d0010000 d00b08c2 ................ │ │ + 0x00007614 0c00ec0b 10b40c00 860c04d0 0c008c0c ................ │ │ + 0x00007624 08c60c00 940c9801 00000000 d5f50600 ................ │ │ + 0x00007634 80469701 b0b0abf0 ffff0159 00660000 .F.........Y.f.. │ │ + 0x00007644 660cfa06 00725600 00c80110 e40600d6 f....rV......... │ │ + 0x00007654 0208fe06 00de02c6 010000a4 0408fa06 ................ │ │ + 0x00007664 00c40404 ee0600e6 0406fa06 00ba054c ...............L │ │ + 0x00007674 fe06008c 0604fa06 00920628 fe0600c4 ...........(.... │ │ + 0x00007684 0608fa06 00cc060c 0000d806 04fe0600 ................ │ │ + 0x00007694 dc065000 00000000 46970181 b0abf080 ..P.....F....... │ │ + 0x000076a4 00000000 45970181 b0ab7080 00000000 ....E.....p..... │ │ + 0x000076b4 43970181 b0ab1080 00000000 41970181 C...........A... │ │ + 0x000076c4 b0b00b84 00000000 43970181 b0ab1080 ........C....... │ │ + 0x000076d4 00000000 46970181 b0abf080 00000000 ....F........... │ │ + 0x000076e4 41970181 b0b00b84 00000000 15f50600 A............... │ │ + 0x000076f4 80459701 b0b0ab70 ffff0109 70089c01 .E.....p....p... │ │ + 0x00007704 00783800 00000000 f9f40600 80459701 .x8..........E.. │ │ + 0x00007714 b0b0ab70 ffff0109 6c089601 00743400 ...p....l....t4. │ │ + 0x00007724 00000000 41970181 b0b00b84 00000000 ....A........... │ │ + 0x00007734 41970181 b0b00b84 00000000 c5f40600 A............... │ │ + 0x00007744 80459701 b0b0ab70 ff001101 0c1a043c .E.....p.......< │ │ + 0x00007754 00420a64 014c1c00 007f0000 00000000 .B.d.L.......... │ │ + 0x00007764 a1f40600 80469701 b0b0abf0 ff001501 .....F.......... │ │ + 0x00007774 105a04c4 0100d201 0af40101 dc011c00 .Z.............. │ │ + 0x00007784 007f0000 00000000 41970181 b0b00b84 ........A....... │ │ + 0x00007794 00000000 800c0181 b0b0aaf0 00000000 ................ │ │ + 0x000077a4 61f40600 84419701 b0b0b00b ff001901 a....A.......... │ │ + 0x000077b4 1422063a 00280644 002e0e00 003c1254 .".:.(.D.....<.T │ │ + 0x000077c4 014e0a00 007f0000 00000000 46970181 .N..........F... │ │ + 0x000077d4 b0abf080 00000000 29f40600 80469701 ........)....F.. │ │ + 0x000077e4 b0b0abf0 ffff0110 00fa0f00 00fa0f04 ................ │ │ + 0x000077f4 8c1000fe 0f2e0000 45970181 b0ab7080 ........E.....p. │ │ + 0x00007804 00000000 46970181 b0abf080 00000000 ....F........... │ │ + 0x00007814 f1f30600 80469701 b0b0abf0 ffff0110 .....F.......... │ │ + 0x00007824 00f00e00 00f00e04 840f00f4 0e300000 .............0.. │ │ + 0x00007834 46970181 b0abf080 00000000 45970181 F...........E... │ │ + 0x00007844 b0ab7080 00000000 80000181 b0b0aaf0 ..p............. │ │ + 0x00007854 00000000 46970181 b0abf080 00000000 ....F........... │ │ + 0x00007864 a1f30600 80469701 b0b0abf0 ffff010b .....F.......... │ │ + 0x00007874 e80904ee 0900ec09 16000000 46970181 ............F... │ │ + 0x00007884 b0abf080 00000000 46970181 b0abf080 ........F....... │ │ + 0x00007894 00000000 6df30600 80469701 b0b0abf0 ....m....F...... │ │ + 0x000078a4 ffff0118 be011086 0400a402 04ee0300 ................ │ │ + 0x000078b4 94030882 04009c03 90010000 41970181 ............A... │ │ + 0x000078c4 b0b00b84 00000000 41970181 b0b00d84 ........A....... │ │ + 0x000078d4 00000000 43970181 b0ab8080 00000000 ....C........... │ │ + 0x000078e4 43970181 b0ab8080 00000000 15f30600 C............... │ │ + 0x000078f4 80439701 b0b0ab10 ffff0110 00540000 .C...........T.. │ │ + 0x00007904 54087e00 5e087000 662a0000 41970181 T.~.^.p.f*..A... │ │ + 0x00007914 b0b00d84 00000000 e9f20600 80459701 .............E.. │ │ + 0x00007924 b0b0abb0 ffff011c 00a00100 00a00108 ................ │ │ + 0x00007934 880300a8 01a60100 00ce0214 880300e2 ................ │ │ + 0x00007944 024a0000 45970181 b0ab7080 00000000 .J..E.....p..... │ │ + 0x00007954 46970181 b0abf080 00000000 a5f20600 F............... │ │ + 0x00007964 80439701 b0b0ab80 ffff0108 260a5000 .C..........&.P. │ │ + 0x00007974 30340000 46970181 b0abf080 00000000 04..F........... │ │ + 0x00007984 45970181 b0ab7080 00000000 75f20600 E.....p.....u... │ │ + 0x00007994 80439701 b0b0ab10 ffff0108 1c044000 .C............@. │ │ + 0x000079a4 203a0000 5df20600 80469701 b0b0abf0 :..]....F...... │ │ + 0x000079b4 ffff010e 007c0000 7c04a601 0080014c .....|..|......L │ │ + 0x000079c4 00000000 3df20600 80469701 b0b0abf0 ....=....F...... │ │ + 0x000079d4 ffff0110 00f60100 00f60104 a00200fa ................ │ │ + 0x000079e4 014e0000 41970181 b0b00d84 00000000 .N..A........... │ │ + 0x000079f4 41970181 b0b00d84 00000000 45970181 A...........E... │ │ + 0x00007a04 b0ab7080 00000000 f9f10600 80469701 ..p..........F.. │ │ + 0x00007a14 b0b0abf0 ffff010c e40104ec 0200e801 ................ │ │ + 0x00007a24 bc010000 ddf10600 80459701 b0b0abb0 .........E...... │ │ + 0x00007a34 ff002101 1db40108 800300bc 01500000 ..!..........P.. │ │ + 0x00007a44 8c0204e6 02009002 98010000 a80304ae ................ │ │ + 0x00007a54 03017f00 00000000 41970181 b0b00d84 ........A....... │ │ + 0x00007a64 00000000 9df10600 80469701 b0b0abf0 .........F...... │ │ + 0x00007a74 ffff010b 960104c8 01009a01 56000000 ............V... │ │ + 0x00007a84 41970181 b0b00d84 00000000 46970181 A...........F... │ │ + 0x00007a94 b0abf080 00000000 69f10600 84419701 ........i....A.. │ │ + 0x00007aa4 b0b0b00b ff000d01 082e043c 013c0442 ...........<.<.B │ │ + 0x00007ab4 017f0000 00000000 49f10600 84419701 ........I....A.. │ │ + 0x00007ac4 b0b0b00b ff000d01 082e043c 013c0442 ...........<.<.B │ │ + 0x00007ad4 017f0000 00000000 29f10600 84419701 ........)....A.. │ │ + 0x00007ae4 b0b0b00b ff000d01 08520460 01600466 .........R.`.`.f │ │ + 0x00007af4 017f0000 00000000 41970181 b0b00d84 ........A....... │ │ + 0x00007b04 00000000 fdf00600 84419701 b0b0b00b .........A...... │ │ + 0x00007b14 ff000d01 08142240 01400446 017f0000 ......"@.@.F.... │ │ + 0x00007b24 00000000 ddf00600 84419701 b0b0b00b .........A...... │ │ + 0x00007b34 ff001d01 0c080640 052c063c 075e0668 .......@.,.<.^.h │ │ + 0x00007b44 017f0000 00017d01 00000000 00000000 ......}......... │ │ + 0x00007b54 00000000 adf00600 80459701 b0b0abb0 .........E...... │ │ + 0x00007b64 ff001501 0f64047e 00a80106 b40101ae .....d.~........ │ │ + 0x00007b74 010a0000 7f000000 00000000 85f00600 ................ │ │ + 0x00007b84 80439701 b0b0ab10 ff001901 14120480 .C.............. │ │ + 0x00007b94 01004404 7c00b001 04e00101 b4013000 ..D.|.........0. │ │ + 0x00007ba4 007f0000 00000000 59f00600 84419701 ........Y....A.. │ │ + 0x00007bb4 b0b0b00d ffff0108 26085000 2e460000 ........&.P..F.. │ │ + 0x00007bc4 41f00600 80439701 b0b0ab10 ffff010c A....C.......... │ │ + 0x00007bd4 2a067000 66087a00 6e260000 25f00600 *.p.f.z.n&..%... │ │ + 0x00007be4 84419701 b0b0b00d ffff0108 26064000 .A..........&.@. │ │ + 0x00007bf4 2c300000 43970181 b0ab1080 00000000 ,0..C........... │ │ + 0x00007c04 43970181 b0ab1080 00000000 41970181 C...........A... │ │ + 0x00007c14 b0b00b84 00000000 e9ef0600 80439701 .............C.. │ │ + 0x00007c24 b0b0ab80 ff001d01 19007400 00747c82 ..........t..t|. │ │ + 0x00007c34 0200f001 14000084 020a9402 018e0232 ...............2 │ │ + 0x00007c44 00007f00 00000000 41970181 b0b00d84 ........A....... │ │ + 0x00007c54 00000000 41970181 b0b00d84 00000000 ....A........... │ │ + 0x00007c64 46970181 b0abf080 00000000 41970181 F...........A... │ │ + 0x00007c74 b0b00b84 00000000 89ef0600 80439701 .............C.. │ │ + 0x00007c84 b0b0ab10 ffff010c 00240000 240a5e00 .........$..$.^. │ │ + 0x00007c94 2e4a0000 43970181 b0ab8080 00000000 .J..C........... │ │ + 0x00007ca4 43970181 b0ab8080 00000000 55ef0600 C...........U... │ │ + 0x00007cb4 84419701 b0b0b00d ff001d01 19480a86 .A...........H.. │ │ + 0x00007cc4 01006c0a 78007a06 82010188 01069401 ..l.x.z......... │ │ + 0x00007cd4 018e0126 00007f00 00000000 46970181 ...&........F... │ │ + 0x00007ce4 b0abf080 00000000 19ef0600 80459701 .............E.. │ │ + 0x00007cf4 b0b0ab70 ffff0112 00d00a00 00d00ac0 ...p............ │ │ + 0x00007d04 019a0e00 900cac03 00000000 45970181 ............E... │ │ + 0x00007d14 b0abb080 00000000 41970181 b0b00d84 ........A....... │ │ + 0x00007d24 00000000 46970181 b0abf080 00000000 ....F........... │ │ + 0x00007d34 41970181 b0b00d84 00000000 45970181 A...........E... │ │ + 0x00007d44 b0ab7080 00000000 45970181 b0abb080 ..p.....E....... │ │ + 0x00007d54 00000000 adee0600 80459701 b0b0ab70 .........E.....p │ │ + 0x00007d64 ff001501 11f80108 a80200d4 0204de02 ................ │ │ + 0x00007d74 01d80210 00007f00 00000000 85ee0600 ................ │ │ + 0x00007d84 80469701 b0b0abf0 ffff0110 00d60100 .F.............. │ │ + 0x00007d94 00d60104 a80200da 01760000 65ee0600 .........v..e... │ │ + 0x00007da4 80469701 b0b0abf0 ff002901 232e3484 .F........).#.4. │ │ + 0x00007db4 03008601 1af00200 ac013884 0300f201 ..........8..... │ │ + 0x00007dc4 08e00200 c40204e2 0200a403 06ae0301 ................ │ │ + 0x00007dd4 7f000000 00000000 29ee0600 80439701 ........)....C.. │ │ + 0x00007de4 b0b0ab10 ffff0108 34045200 38340000 ........4.R.84.. │ │ + 0x00007df4 43970181 b0ab8080 00000000 05ee0600 C............... │ │ + 0x00007e04 80439701 b0b0ab10 ffff0121 00940100 .C.........!.... │ │ + 0x00007e14 00940104 a60200fa 0108ba02 00820210 ................ │ │ + 0x00007e24 00009202 12a60200 a4024c00 00000000 ..........L..... │ │ + 0x00007e34 d1ed0600 84419701 b0b0b00b ffff010f .....A.......... │ │ + 0x00007e44 007a0000 7a2cee01 00a6018a 01000000 .z..z,.......... │ │ + 0x00007e54 b1ed0600 80459701 b0b0abb0 ffff0116 .....E.......... │ │ + 0x00007e64 009e0200 009e0208 ec0200be 020ae202 ................ │ │ + 0x00007e74 00c80248 00000000 45970181 b0abb080 ...H....E....... │ │ + 0x00007e84 00000000 7ded0600 80439701 b0b0ab80 ....}....C...... │ │ + 0x00007e94 ff001d01 16009601 00009601 08a00100 ................ │ │ + 0x00007ea4 a20106ae 0101a801 1000007f 00000000 ................ │ │ + 0x00007eb4 00000000 4ded0600 84419701 b0b0b00b ....M....A...... │ │ + 0x00007ec4 ff001501 100a063c 00104c00 005c0668 .......<..L..\.h │ │ + 0x00007ed4 01620a00 007f0000 00000000 25ed0600 .b..........%... │ │ + 0x00007ee4 80459701 b0b0ab70 ff001101 0d3c045e .E.....p.....<.^ │ │ + 0x00007ef4 00780494 01017c1c 00007f00 00000000 .x....|......... │ │ + 0x00007f04 01ed0600 80469701 b0b0abf0 ff001501 .....F.......... │ │ + 0x00007f14 0e3c0460 007e0498 01018201 1a00007f .<.`.~.......... │ │ + 0x00007f24 00000000 00000000 d9ec0600 80439701 .............C.. │ │ + 0x00007f34 b0b0ab80 ffff0108 10042c00 142c0000 ..........,..,.. │ │ + 0x00007f44 c1ec0600 84419701 b0b0b00b ff001501 .....A.......... │ │ + 0x00007f54 10060436 000a4c00 00560662 015c0a00 ...6..L..V.b.\.. │ │ + 0x00007f64 007f0000 00000000 99ec0600 84419701 .............A.. │ │ + 0x00007f74 b0b0b00b ff001501 10060436 000a4c00 ...........6..L. │ │ + 0x00007f84 00560662 015c0a00 007f0000 00000000 .V.b.\.......... │ │ + 0x00007f94 71ec0600 b0ae0500 ff003d01 371006f8 q.........=.7... │ │ + 0x00007fa4 01002806 b401004c 06b00100 7804e001 ..(....L....x... │ │ + 0x00007fb4 00aa0104 f80100d4 0106dc01 01f00106 ................ │ │ + 0x00007fc4 8c0201fa 01069002 01800206 8c020186 ................ │ │ + 0x00007fd4 02120000 7f000000 00000000 80040181 ................ │ │ + 0x00007fe4 b0b0aaf0 00000000 80090181 b0b0aaf0 ................ │ │ + 0x00007ff4 00000000 0dec0600 08849700 ff000901 ................ │ │ + 0x00008004 04080e30 017f0000 00000000 46970181 ...0........F... │ │ + 0x00008014 b0abf080 00000000 439b0181 b0b0c784 ........C....... │ │ + 0x00008024 00000000 439b0181 b0b0c784 00000000 ....C........... │ │ + 0x00008034 419b0181 b0b0c184 00000000 459b0181 A...........E... │ │ + 0x00008044 b0b0f784 00000000 439b0181 b0b0c784 ........C....... │ │ + 0x00008054 00000000 439b0181 b0b0c784 00000000 ....C........... │ │ + 0x00008064 439b0181 b0b0c784 00000000 439b0181 C...........C... │ │ + 0x00008074 b0b0c784 00000000 459b0181 b0b0df84 ........E....... │ │ + 0x00008084 00000000 419b0181 b0b0c184 00000000 ....A........... │ │ + 0x00008094 419b0181 b0b0c184 00000000 419b0181 A...........A... │ │ + 0x000080a4 b0b0c184 00000000 419b0181 b0b08384 ........A....... │ │ + 0x000080b4 00000000 439b0181 b0b08f84 00000000 ....C........... │ │ + 0x000080c4 439b0181 b0b0c784 00000000 419b0181 C...........A... │ │ + 0x000080d4 b0b0c184 00000000 419b0181 b0b08384 ........A....... │ │ + 0x000080e4 00000000 459b0181 b0b0df84 00000000 ....E........... │ │ + 0x000080f4 419b0181 b0b0c184 00000000 419b0181 A...........A... │ │ + 0x00008104 b0b0c184 00000000 459b0181 b0b0df84 ........E....... │ │ + 0x00008114 00000000 .... │ ├── readelf --wide --decompress --string-dump=.rodata {} │ │ @@ -2,915 +2,915 @@ │ │ String dump of section '.rodata': │ │ [ 0] ThreadPool::execute unable to send job into queue.packages/isar_core_ffi/src/query_aggregation.rs │ │ [ 64] : � │ │ [ 69] IllegalArg: �^A. │ │ [ 7a] _b_�^A_� │ │ [ 83] floating point `�^A` │ │ [ 98] memory allocation of �^N bytes failed\n │ │ - [ be] mdbx_cursor_del │ │ - [ ce] mdbx_txn_commit_ex │ │ - [ e1] invalid page's flags (%u)\n │ │ - [ fc] unable fetch-slot, alloc-flags 0x%x, err %d, txn-flags 0x%x, re-list-len %zu, loose-count %zu, gc: height %u, branch %zu, leaf %zu, large %zu, entries %zu\n │ │ - [ 198] pnl_reserve │ │ - [ 1a4] complete │ │ - [ 1ad] mdbx_get_sysraminfo(), rc %d\n │ │ - [ 1cb] Write error: %s\n │ │ - [ 1dc] readahead %s %u..%u\n │ │ - [ 1f1] OFF │ │ - [ 1f5] Microsoft │ │ - [ 1ff] pre │ │ - [ 203] meta[%u] has too large used-space (%llu), skip it\n │ │ - [ 236] meta[%u] consider get-%s pageno is %u instead of wrong %u, will be corrected on next commit(s)\n │ │ - [ 296] meta[%u] next-pageno (%u) is beyond end-pgno (%u), skip it\n │ │ - [ 2d2] meta[%u] has invalid %s-root %u, skip it\n │ │ - [ 2fc] presync-meta │ │ - [ 309] gc_handle_dense │ │ - [ 319] txn_basal_end │ │ - [ 327] getFloatRegister │ │ - [ 338] r5 │ │ - [ 33b] d26 │ │ - [ 33f] packages/isar_core_ffi/src/crud.rs │ │ - [ 362] /rust/deps/gimli-0.32.3/src/read/abbrev.rs │ │ - [ 38d] packages/isar_core/src/mdbx/env.rs │ │ - [ 3b0] packages/isar_core/src/schema/migrate_v1.rs │ │ - [ 3dd] character `�^A` │ │ - [ 3ed] .�� │ │ - [ 3f1] unexpected leaf-page #%u type 0x%x seen by cursor\n │ │ - [ 424] mdbx_dbi_stat │ │ - [ 432] invalid dupsort sub-tree node size │ │ - [ 455] env->geo_in_bytes.lower / (unsigned)pagesize >= MIN_PAGENO │ │ - [ 490] env->geo_in_bytes.lower % globals.sys_pagesize == 0 │ │ - [ 4c4] MDBX_UNABLE_EXTEND_MAPSIZE: Database engine was unable to extend mapping, e.g. since address space is unavailable or busy, or Operation system not supported such operations │ │ - [ 571] hsr-kick: done turn %lli -> %lli +%lli\n │ │ - [ 599] kick stuck reader[%zu of %zu].pid_%u %lli < prev-oldest %lli, steady-txn %lli\n │ │ - [ 5e8] Dirtyroom is depleted, DPL length %zu\n │ │ - [ 60f] resize │ │ - [ 616] shrink │ │ - [ 61d] ignore filesize mismatch in readonly-mode │ │ - [ 647] , but unable in read-only mode │ │ - [ 666] recovery │ │ - [ 66f] meta[%u] has invalid max-mapsize (%llu), skip it\n │ │ - [ 6a1] unexpected thread-id 0x%llx%s0x%0zx and/or txn-id %lli%s%lli\n │ │ - [ 6df] unable undo resize performed by nested txn, promote to the parent (%u->%u, %u->%u)\n │ │ - [ 733] libunwind: %s - %s\n │ │ - [ 747] s11 │ │ - [ 74b] d14 │ │ - [ 74f] debug │ │ - [ 755] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/core/src/str/lossy.rs │ │ - [ 7a4] missing field `�^A` │ │ - [ 7b7] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/../../backtrace/src/symbolize/gimli/lru.rs │ │ - [ 822] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/core/src/cell/once.rs │ │ - [ 870] mdbx_drop │ │ - [ 87a] MDBX_READERS_FULL: Too many readers (maxreaders reached) │ │ - [ 8b3] MDBX_TOO_LARGE: Database is too large for current system, e.g. could NOT be mapped into RAM │ │ - [ 90f] mdbx │ │ - [ 914] 0.13.8-temp-upstream-fix │ │ - [ 92d] model_meta->geometry.grow_pv == pages2pv(pv2pages(model_meta->geometry.grow_pv)) │ │ - [ 97e] big-node data size (%zu) <> min/max value-length (%zu/%zu)\n │ │ - [ 9ba] node-data size (%zu) <> min/max value-length (%zu/%zu)\n │ │ - [ 9f2] Unexpected not frozen/modifiable/spilled but shadowed %s page %u mod-txnid %lli, without parent transaction, current txn %lli front %lli\n │ │ - [ a7c] unexpected/invalid gc-detent %lli for current-txnid %lli\n │ │ - [ ab6] rkl_resize │ │ - [ ac1] unexpected/invalid db-flags 0x%x for %s\n │ │ - [ aea] spill_slowpath │ │ - [ af9] accede mode-flags: 0x%X, 0x%X -> 0x%X\n │ │ - [ b20] dxb_setup │ │ - [ b2a] header.geometry.now >= header.geometry.first_unallocated │ │ - [ b63] env->geo_in_bytes.now >= used_bytes │ │ - [ b87] updating meta.geo: from l%u-n%u-u%u/s%u-g%u (txn#%lli), to l%u-n%u-u%u/s%u-g%u (txn#%lli)\n │ │ - [ be2] /etc/machine-id │ │ - [ bf2] tls-cleanup: pid %d, pending %u, wait for...\n │ │ - [ c20] %s: restart since %zu slot(s) comeback non-dense (reserved %zu...%zu of %zu)\n │ │ - [ c6e] ro │ │ - [ c71] _Unwind_VRS_Set │ │ - [ c81] Type matching not implemented │ │ - [ c9f] s18 │ │ - [ ca3] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/alloc/src/str.rs │ │ - [ cec] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/core/src/panicking.rs │ │ - [ d3b] assertion `left �^W right` failed\n │ │ + [ be] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/thread/current.rs │ │ + [ 110] mdbx_cursor_del │ │ + [ 120] mdbx_txn_commit_ex │ │ + [ 133] invalid page's flags (%u)\n │ │ + [ 14e] unable fetch-slot, alloc-flags 0x%x, err %d, txn-flags 0x%x, re-list-len %zu, loose-count %zu, gc: height %u, branch %zu, leaf %zu, large %zu, entries %zu\n │ │ + [ 1ea] pnl_reserve │ │ + [ 1f6] complete │ │ + [ 1ff] mdbx_get_sysraminfo(), rc %d\n │ │ + [ 21d] Write error: %s\n │ │ + [ 22e] readahead %s %u..%u\n │ │ + [ 243] OFF │ │ + [ 247] Microsoft │ │ + [ 251] pre │ │ + [ 255] meta[%u] has too large used-space (%llu), skip it\n │ │ + [ 288] meta[%u] consider get-%s pageno is %u instead of wrong %u, will be corrected on next commit(s)\n │ │ + [ 2e8] meta[%u] next-pageno (%u) is beyond end-pgno (%u), skip it\n │ │ + [ 324] meta[%u] has invalid %s-root %u, skip it\n │ │ + [ 34e] presync-meta │ │ + [ 35b] gc_handle_dense │ │ + [ 36b] txn_basal_end │ │ + [ 379] getFloatRegister │ │ + [ 38a] r5 │ │ + [ 38d] d26 │ │ + [ 391] packages/isar_core_ffi/src/crud.rs │ │ + [ 3b4] /rust/deps/gimli-0.32.3/src/read/abbrev.rs │ │ + [ 3df] packages/isar_core/src/mdbx/env.rs │ │ + [ 402] packages/isar_core/src/schema/migrate_v1.rs │ │ + [ 42f] character `�^A` │ │ + [ 43f] .�� │ │ + [ 443] unexpected leaf-page #%u type 0x%x seen by cursor\n │ │ + [ 476] mdbx_dbi_stat │ │ + [ 484] invalid dupsort sub-tree node size │ │ + [ 4a7] env->geo_in_bytes.lower / (unsigned)pagesize >= MIN_PAGENO │ │ + [ 4e2] env->geo_in_bytes.lower % globals.sys_pagesize == 0 │ │ + [ 516] MDBX_UNABLE_EXTEND_MAPSIZE: Database engine was unable to extend mapping, e.g. since address space is unavailable or busy, or Operation system not supported such operations │ │ + [ 5c3] hsr-kick: done turn %lli -> %lli +%lli\n │ │ + [ 5eb] kick stuck reader[%zu of %zu].pid_%u %lli < prev-oldest %lli, steady-txn %lli\n │ │ + [ 63a] Dirtyroom is depleted, DPL length %zu\n │ │ + [ 661] resize │ │ + [ 668] shrink │ │ + [ 66f] ignore filesize mismatch in readonly-mode │ │ + [ 699] , but unable in read-only mode │ │ + [ 6b8] recovery │ │ + [ 6c1] meta[%u] has invalid max-mapsize (%llu), skip it\n │ │ + [ 6f3] unexpected thread-id 0x%llx%s0x%0zx and/or txn-id %lli%s%lli\n │ │ + [ 731] unable undo resize performed by nested txn, promote to the parent (%u->%u, %u->%u)\n │ │ + [ 785] libunwind: %s - %s\n │ │ + [ 799] s11 │ │ + [ 79d] d14 │ │ + [ 7a1] debug │ │ + [ 7a8] missing field `�^A` │ │ + [ 7bb] mdbx_drop │ │ + [ 7c5] MDBX_READERS_FULL: Too many readers (maxreaders reached) │ │ + [ 7fe] MDBX_TOO_LARGE: Database is too large for current system, e.g. could NOT be mapped into RAM │ │ + [ 85a] mdbx │ │ + [ 85f] 0.13.8-temp-upstream-fix │ │ + [ 878] model_meta->geometry.grow_pv == pages2pv(pv2pages(model_meta->geometry.grow_pv)) │ │ + [ 8c9] big-node data size (%zu) <> min/max value-length (%zu/%zu)\n │ │ + [ 905] node-data size (%zu) <> min/max value-length (%zu/%zu)\n │ │ + [ 93d] Unexpected not frozen/modifiable/spilled but shadowed %s page %u mod-txnid %lli, without parent transaction, current txn %lli front %lli\n │ │ + [ 9c7] unexpected/invalid gc-detent %lli for current-txnid %lli\n │ │ + [ a01] rkl_resize │ │ + [ a0c] unexpected/invalid db-flags 0x%x for %s\n │ │ + [ a35] spill_slowpath │ │ + [ a44] accede mode-flags: 0x%X, 0x%X -> 0x%X\n │ │ + [ a6b] dxb_setup │ │ + [ a75] header.geometry.now >= header.geometry.first_unallocated │ │ + [ aae] env->geo_in_bytes.now >= used_bytes │ │ + [ ad2] updating meta.geo: from l%u-n%u-u%u/s%u-g%u (txn#%lli), to l%u-n%u-u%u/s%u-g%u (txn#%lli)\n │ │ + [ b2d] /etc/machine-id │ │ + [ b3d] tls-cleanup: pid %d, pending %u, wait for...\n │ │ + [ b6b] %s: restart since %zu slot(s) comeback non-dense (reserved %zu...%zu of %zu)\n │ │ + [ bb9] ro │ │ + [ bbc] _Unwind_VRS_Set │ │ + [ bcc] Type matching not implemented │ │ + [ bea] s18 │ │ + [ bee] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/alloc/src/fmt.rs │ │ + [ c37] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/alloc/src/raw_vec/mod.rs │ │ + [ c89] assertion `left �^W right` failed\n │ │ left: �^I\n │ │ right: � │ │ - [ d72] duplicate field `�^A` │ │ - [ d88] SchemaError: � │ │ - [ d98] MdbxError (�^C): � │ │ - [ daa] packages/isar_core/src/object/object_builder.rs │ │ - [ dda] /rust/deps/rustc-demangle-0.1.26/src/v0.rs │ │ - [ e05] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/../../backtrace/src/symbolize/gimli/stash.rs │ │ - [ e72] MDBX_BUSY: Another write transaction is running, or environment is already used while opening with MDBX_EXCLUSIVE flag │ │ - [ ee9] strange nested │ │ - [ ef8] the source DB %s: post-compactification used pages %u %c expected %u\n │ │ - [ f3e] invalid db-flags 0x%x\n │ │ - [ f55] %s-page nkeys (%zu) < %u\n │ │ - [ f6f] invalid page upper (%u) for nkeys %zu with limit %zu\n │ │ - [ fa5] cursor_put │ │ - [ fb0] tree_rebalance │ │ - [ fbf] dbi_open_locked │ │ - [ fcf] lock region has os/format signature 0x%x, expected 0x%x\n │ │ - [ 1008] manual recovery │ │ - [ 1018] thread_rthc_set │ │ - [ 1028] txn #%lli too more loops %u, bailout\n │ │ - [ 104e] gc_rerere │ │ - [ 1058] gc_dense_solve │ │ - [ 1067] reserve depleted (used %zu slots, left %zu loop %u)\n │ │ - [ 109c] s3 │ │ - [ 109f] d25 │ │ - [ 10a4] begin <= end (�^D <= �^P) when slicing `�^A`� │ │ - [ 10d1] thread '�^C' (�^N) panicked at �^B:\n │ │ - env->geo_in_bytes.now % globals.sys_pagesize == 0 │ │ - [ 1128] new_geo.shrink_pv == pages2pv(pv2pages(new_geo.shrink_pv)) │ │ - [ 1163] MDBX_THREAD_MISMATCH: A thread has attempted to use a not owned object, e.g. a transaction that started by another thread │ │ - [ 11dd] attempt to commit %s txn %p\n │ │ - [ 11fa] is_powerof2(env->ps) │ │ - [ 120f] model_meta->geometry.upper <= MAX_PAGENO + 1 │ │ - [ 123c] osal_fastmutex_acquire(&globals.debug_lock) == 0 │ │ - [ 126d] nested-leaf2-key size (%zu) <> min/max value-length (%zu/%zu)\n │ │ - [ 12ac] Page %u mod-txnid %lli not found in the spill-list(s), current txn %lli front %lli, root txn %lli front %lli\n │ │ - [ 131a] fuseblk │ │ - [ 1322] ftp │ │ - [ 1326] coherency_check │ │ - [ 1336] bailout waiting for valid snapshot (%s)\n │ │ - [ 135f] unable resize datafile/mapping: present %u -> %u, limit %u -> %u, errcode %d\n │ │ - [ 13ad] shrink-MADV_%s %zu..%zu\n │ │ - [ 13c6] unlock-before-retry │ │ - [ 13da] %s and rollback needed: (from head %lli to steady %lli)%s\n │ │ - [ 1415] weak │ │ - [ 141b] Rejecting the use of a FD in the range STDIN_FILENO/%d..STDERR_FILENO/%d to prevent database corruption\n │ │ - [ 1484] recursive-solving failure │ │ - [ 149e] txn_end │ │ - [ 14a6] pc │ │ - [ 14a9] s4 │ │ - [ 14ac] s5 │ │ - [ 14af] s14 │ │ - [ 14b3] d2 │ │ - [ 14b6] d8 │ │ - [ 14b9] d11 │ │ - [ 14bd] d24 │ │ - [ 14c1] d31 │ │ - [ 14c5] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/core/src/slice/sort/shared/smallsort.rs │ │ - [ 1525] packages/isar_core/src/txn.rs │ │ - [ 1544] _i_�^A_� │ │ - [ 154d] Error(�^H, line: �\n │ │ + [ cc0] duplicate field `�^A` │ │ + [ cd6] SchemaError: � │ │ + [ ce6] MdbxError (�^C): � │ │ + [ cf8] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/core/src/cell.rs │ │ + [ d41] packages/isar_core/src/object/object_builder.rs │ │ + [ d71] /rust/deps/rustc-demangle-0.1.26/src/v0.rs │ │ + [ d9c] MDBX_BUSY: Another write transaction is running, or environment is already used while opening with MDBX_EXCLUSIVE flag │ │ + [ e13] strange nested │ │ + [ e22] the source DB %s: post-compactification used pages %u %c expected %u\n │ │ + [ e68] invalid db-flags 0x%x\n │ │ + [ e7f] %s-page nkeys (%zu) < %u\n │ │ + [ e99] invalid page upper (%u) for nkeys %zu with limit %zu\n │ │ + [ ecf] cursor_put │ │ + [ eda] tree_rebalance │ │ + [ ee9] dbi_open_locked │ │ + [ ef9] lock region has os/format signature 0x%x, expected 0x%x\n │ │ + [ f32] manual recovery │ │ + [ f42] thread_rthc_set │ │ + [ f52] txn #%lli too more loops %u, bailout\n │ │ + [ f78] gc_rerere │ │ + [ f82] gc_dense_solve │ │ + [ f91] reserve depleted (used %zu slots, left %zu loop %u)\n │ │ + [ fc6] s3 │ │ + [ fc9] d25 │ │ + [ fce] begin <= end (�^D <= �^P) when slicing `�^A`� │ │ + [ ff9] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/alloc/src/collections/btree/node.rs │ │ + [ 1055] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/../../backtrace/src/symbolize/gimli/elf.rs │ │ + [ 10c2] thread '�^C' (�^N) panicked at �^B:\n │ │ + /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/core/src/str/pattern.rs │ │ + [ 1137] env->geo_in_bytes.now % globals.sys_pagesize == 0 │ │ + [ 1169] new_geo.shrink_pv == pages2pv(pv2pages(new_geo.shrink_pv)) │ │ + [ 11a4] MDBX_THREAD_MISMATCH: A thread has attempted to use a not owned object, e.g. a transaction that started by another thread │ │ + [ 121e] attempt to commit %s txn %p\n │ │ + [ 123b] is_powerof2(env->ps) │ │ + [ 1250] model_meta->geometry.upper <= MAX_PAGENO + 1 │ │ + [ 127d] osal_fastmutex_acquire(&globals.debug_lock) == 0 │ │ + [ 12ae] nested-leaf2-key size (%zu) <> min/max value-length (%zu/%zu)\n │ │ + [ 12ed] Page %u mod-txnid %lli not found in the spill-list(s), current txn %lli front %lli, root txn %lli front %lli\n │ │ + [ 135b] fuseblk │ │ + [ 1363] ftp │ │ + [ 1367] coherency_check │ │ + [ 1377] bailout waiting for valid snapshot (%s)\n │ │ + [ 13a0] unable resize datafile/mapping: present %u -> %u, limit %u -> %u, errcode %d\n │ │ + [ 13ee] shrink-MADV_%s %zu..%zu\n │ │ + [ 1407] unlock-before-retry │ │ + [ 141b] %s and rollback needed: (from head %lli to steady %lli)%s\n │ │ + [ 1456] weak │ │ + [ 145c] Rejecting the use of a FD in the range STDIN_FILENO/%d..STDERR_FILENO/%d to prevent database corruption\n │ │ + [ 14c5] recursive-solving failure │ │ + [ 14df] txn_end │ │ + [ 14e7] pc │ │ + [ 14ea] s4 │ │ + [ 14ed] s5 │ │ + [ 14f0] s14 │ │ + [ 14f4] d2 │ │ + [ 14f7] d8 │ │ + [ 14fa] d11 │ │ + [ 14fe] d24 │ │ + [ 1502] d31 │ │ + [ 1506] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/core/src/unicode/printable.rs │ │ + [ 155c] packages/isar_core/src/txn.rs │ │ + [ 157b] _i_�^A_� │ │ + [ 1584] Error(�^H, line: �\n │ │ , column: �^A) │ │ - [ 156d] strange read-only │ │ - [ 157f] condition │ │ - [ 1589] copy_with_compacting │ │ - [ 159e] invalid leaf2_ksize %zu\n │ │ - [ 15b7] invalid nested/sub-page record size (%zu)\n │ │ - [ 15e2] poorpage │ │ - [ 15eb] suboptimal %s-page #%u, mod-txnid %lli\n │ │ - [ 1613] cursor_bring │ │ - [ 1620] node_move │ │ - [ 162a] read meta: empty file (%d, %s)\n │ │ - [ 164a] %s\n │ │ - [ 164e] rthc_lock │ │ - [ 1658] there are no suitable meta-pages │ │ - [ 1679] open-MADV_%s %u..%u\n │ │ - [ 168e] /proc/sys/kernel/random/boot_id │ │ - [ 16ae] clock_gettime(CLOCK_REALTIME, &abstime) == 0 │ │ - [ 16db] tbl_fetch │ │ - [ 16e5] shadow->signature == cur_signature_live │ │ - [ 170d] txn_renew │ │ - [ 1717] _Unwind_Resume() can't return │ │ - [ 1735] s17 │ │ - [ 1739] d30 │ │ - [ 173e] byte index �& is not a char boundary; it is inside �^H (bytes �^F) of `�^A`� │ │ - [ 1789] unknown variant `�^L`, expected � │ │ - [ 17ab] boolean `�^A` │ │ - [ 17b9] :� │ │ - [ 17bc] %s:%d error %d (%s) while closing cursor │ │ - [ 17e5] MDBX_BAD_TXN: Transaction is not valid for requested operation, e.g. had errored and be must aborted, has a child, or is invalid │ │ - [ 1866] MDBX_EMULTIVAL: The specified key has more than one associated value │ │ - [ 18ab] mdbx_txn_reset │ │ - [ 18ba] mdbx_txn_break │ │ - [ 18c9] mdbx_txn_unpark │ │ - [ 18d9] invalid GC-record content │ │ - [ 18f3] subleaf │ │ - [ 18fb] debug_log_va │ │ - [ 1908] invalid node[%zu] flags (%u)\n │ │ - [ 1926] nested-node invalid flags (%u)\n │ │ - [ 1946] Alternative/Duplicate LCK-file '%s' error %d\n │ │ - [ 1974] bailout waiting for %u page arrival %s\n │ │ - [ 199c] write │ │ - [ 19a2] page_split │ │ - [ 19ad] meta_troika_dump │ │ - [ 19be] meta[%u] not completely updated, skip it\n │ │ - [ 19e8] pthread_setspecific(key, value) == 0 │ │ - [ 1a0d] fifo │ │ - [ 1a16] %s: restart since %zu slot(s) reclaimed (reserved %zu...%zu of %zu)\n │ │ - [ 1a5b] != expected │ │ - [ 1a69] r11 │ │ - [ 1a6d] s12 │ │ - [ 1a71] s21 │ │ - [ 1a75] d7 │ │ - [ 1a78] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/core/src/unicode/printable.rs │ │ - [ 1acf] /rust/deps/addr2line-0.25.1/src/function.rs │ │ - [ 1afb] %s/%d: %s %u\n │ │ - [ 1b09] env->geo_in_bytes.grow % (unsigned)pagesize == 0 │ │ - [ 1b3a] unknown │ │ - [ 1b42] leaf2-item size (%zu) <> min/max length (%zu/%zu)\n │ │ - [ 1b75] meta_unsteady │ │ - [ 1b83] page_dirty │ │ - [ 1b8e] DPL is full (PAGELIST_LIMIT %zu)\n │ │ - [ 1bb0] read meta[%u,%u]: %i, %s\n │ │ - [ 1bca] failed resize datafile/mapping: present %u -> %u, limit %u -> %u, errcode %d\n │ │ - [ 1c18] ipc-unlock() │ │ - [ 1c25] lck-file has invalid size %llu bytes\n │ │ - [ 1c4b] msync/fsync │ │ - [ 1c57] 0 == meta_eq_mask(&troika) │ │ - [ 1c72] read-only │ │ - [ 1c7c] meta[%u] has invalid steady-checksum (0x%llx != 0x%llx), skip it\n │ │ - [ 1cbe] meta[%u] used-bytes (%llu) beyond filesize (%llu), skip it\n │ │ - [ 1cfa] meta[%u] has false-empty %s, skip it\n │ │ - [ 1d20] cursor_eot │ │ - [ 1d2b] r1 │ │ - [ 1d2e] r6 │ │ - [ 1d31] r7 │ │ - [ 1d34] _Unwind_GetTextRelBase │ │ - [ 1d4b] *extension cannot contain path separators: � │ │ - [ 1d78] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/thread/local.rs │ │ - [ 1dc8] env->geo_in_bytes.upper % globals.sys_pagesize == 0 │ │ - [ 1dfc] env->geo_in_bytes.shrink % (unsigned)pagesize == 0 │ │ - [ 1e2f] env->ps >= MDBX_MIN_PAGESIZE │ │ - [ 1e4c] unexpected %s-page for %s (db-flags 0x%x)\n │ │ - [ 1e77] node[%zu] (%zu) beyond page-end\n │ │ - [ 1e98] bigdata-pgno │ │ - [ 1ea5] too less n-pages %u for bigdata-node (%zu bytes) │ │ - [ 1ed6] nested-node beyond (%zu) nested-page\n │ │ - [ 1efc] nested-db.mod_txnid (%lli) > page-txnid (%lli)\n │ │ - [ 1f2c] mismatched nested-db flags %u\n │ │ - [ 1f4b] 9P │ │ - [ 1f4e] unlock │ │ - [ 1f55] munlock(%zu, %zu) error %d\n │ │ - [ 1f71] workaround for incoherent flaw of unified page/buffer cache │ │ - [ 1fad] spilled %u dirty-entries, %u dirty-npages, now have %zu dirty-room\n │ │ - [ 1ff1] REMOVE │ │ - [ 1ff8] dxb_sync_locked │ │ - [ 2008] fstat(%s), err %d\n │ │ - [ 201b] last-page beyond end-of-file (last %u, have %u)\n │ │ - [ 204c] meta[%u] with %s txnid %lli is corrupted, %s needed\n │ │ - [ 2081] rthc_thread_dtor │ │ - [ 2092] %s: restart since no slot(s) available (reserved %zu...%zu of %zu)\n │ │ - [ 20d6] gc_reserve4return │ │ - [ 20e8] unexpected pid %u%s%u\n │ │ - [ 20ff] txn_ro_unpark │ │ - [ 210d] s1 │ │ - [ 2110] d20 │ │ - [ 2114] d29 │ │ - [ 2118] packages/isar_core_ffi/src/instance.rs │ │ - [ 213f] ©_from_slice: source slice length (�+) does not match destination slice length (�^A) │ │ - [ 2197] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/alloc/src/collections/btree/map/entry.rs │ │ - [ 21f8] packages/isar_core/src/index/index_key_builder.rs │ │ - [ 222a] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sync/once.rs │ │ - [ 2277] MDBX_DUPLICATED_CLK: Alternative/Duplicate LCK-file is exists, please keep one and remove unused other │ │ - [ 22de] unexpected leaf2-page for non-dupfix (sub)tree (db-flags 0x%x)\n │ │ - [ 231e] nested-leaf2-key #%u wrong order (%s >= %s)\n │ │ - [ 234b] smbfs │ │ - [ 2351] munlock_after │ │ - [ 235f] free │ │ - [ 2364] all %zu dirty pages are unspillable since referenced by a cursor(s), use fewer cursors or increase MDBX_opt_txn_dp_limit\n │ │ - [ 23de] dbi_defer_release │ │ - [ 23f0] mresize │ │ - [ 23f8] legal4overwrite │ │ - [ 2408] %s and doing automatic rollback: purge%s meta[%u] with%s txnid %lli\n │ │ - [ 244d] invalid │ │ - [ 2456] meta_validate │ │ - [ 2464] MDBX_NOTFOUND │ │ - [ 2472] s10 │ │ - [ 2476] s16 │ │ - [ 247a] s25 │ │ - [ 247f] removal index (is �^V) should be < len (is �^A) │ │ - [ 24ad] /rust/deps/hashbrown-0.16.1/src/raw/mod.rs │ │ - [ 24d8] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/crossbeam-channel-0.5.15/src/waker.rs │ │ - [ 2538] packages/isar_core/src/schema/collection_schema.rs │ │ - [ 256b] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/itoa-1.0.18/src/lib.rs │ │ - [ 25bc] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/serde_json-1.0.149/src/error.rs │ │ - [ 2617] byte index �^Y is not an OsStr boundary │ │ - [ 263e] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sys/random/linux.rs │ │ - [ 2692] /rust/deps/gimli-0.32.3/src/read/line.rs │ │ - [ 26bb] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/../../backtrace/src/backtrace/libunwind.rs │ │ - [ 2726] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sync/mpmc/waker.rs │ │ - [ 2779] new_geo.upper >= new_geo.now │ │ - [ 2796] has page leak(s) │ │ - [ 27a7] Raise the ENOSYS(%d) error to avoid hang due the 32-bit Bionic/Android bug with tid/thread_id 0x%08x(%i) that don�t fit in 16 bits, see https://android.googlesource.com/platform/bionic/+/master/docs/32-bit-abi.md#is-too-small-for-large-pids\n │ │ - [ 289b] check_table_flags │ │ - [ 28ad] badpage │ │ - [ 28b5] page_touch_unmodifable │ │ - [ 28cc] %s addr %p, upper %u │ │ - [ 28e1] cursor mismatched nested-db dupfix_size %u\n │ │ - [ 290d] coherency_fetch_head │ │ - [ 2922] GC/FreeDB │ │ - [ 292c] Unexpected %i error while put to nested dupsort's hive\n │ │ - [ 2964] unexpected %i error going left sibling\n │ │ - [ 298c] mmap │ │ - [ 2991] ON │ │ - [ 2994] pagesize >= MDBX_MIN_PAGESIZE │ │ - [ 29b2] lck_setup │ │ - [ 29bc] try-exclusive │ │ - [ 29ca] meta-pages are clashed: mask 0x%d\n │ │ - [ 29ed] %s, but %s for automatic rollback: %s\n │ │ - [ 2a14] thread_key_delete │ │ - [ 2a26] getInfoFromEHABISection │ │ - [ 2a3e] r0 │ │ - [ 2a41] s27 │ │ - [ 2a45] d3 │ │ - [ 2a48] d27 │ │ - [ 2a4c] packages/isar_core_ffi/src/filter.rs │ │ - [ 2a71] packages/isar_core/src/schema/schema_manager.rs │ │ - [ 2aa2] `�^F` or `�^A` │ │ - [ 2ab1] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sync/mpmc/list.rs │ │ - [ 2b03] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sync/mpmc/zero.rs │ │ - [ 2b55] mdbx_dbi_open │ │ - [ 2b63] env->geo_in_bytes.lower >= MIN_MAPSIZE │ │ - [ 2b8a] pgno_ceil2sp_bytes(env, new_geo.now) == (size_t)size_now │ │ - [ 2bc3] invalid GC-record length │ │ - [ 2bdc] nested-node-key #%u wrong order (%s >= %s)\n │ │ - [ 2c08] branch/leaf/leaf2 │ │ - [ 2c1a] stop reclaiming %s: %zu (current) + %zu (chunk) >= %zu, rp_augment_limit %u\n │ │ - [ 2c67] http │ │ - [ 2c6c] coherency_timeout │ │ - [ 2c7e] iov_callback4dirtypages │ │ - [ 2c96] meta[%u] is too volatile, skip it\n │ │ - [ 2cb9] target == head.ptr_c || constmeta_txnid(target) < pending->unsafe_txnid │ │ - [ 2d01] osal_mmap │ │ - [ 2d0b] could not apply preconfigured db-geometry │ │ - [ 2d35] updating db-format/guid signature for │ │ - [ 2d5b] mdbx_fini │ │ - [ 2d65] bailout overriding meta-%zu since model failed FreeDB/MainDB %s-check for txnid #%lli\n │ │ - [ 2dbc] dbi %zu refs to inaccessible table `%.*s` for txn %lli (err %d)\n │ │ - [ 2dfd] pthread_setspecific(rthc_key, &rthc_thread_state) == 0 │ │ - [ 2e34] environment corrupted by died writer, must shutdown! │ │ - [ 2e69] renew MainDB for %s-txn %lli since db-flags changes 0x%x -> 0x%x\n │ │ - [ 2eab] unexpected error %d during export the state of dbi-handles to env\n │ │ - [ 2eee] r3 │ │ - [ 2ef1] _Unwind_GetDataRelBase() not implemented │ │ - [ 2f1a] packages/isar_core/src/mdbx/db.rs │ │ - [ 2f3c] packages/isar_core/src/index/mod.rs │ │ - [ 2f60] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/thread/thread.rs │ │ - [ 2fb3] (os error �^A) │ │ - [ 2fc2] mdbx_default_pagesize │ │ - [ 2fd8] env->geo_in_bytes.now >= env->geo_in_bytes.lower │ │ - [ 3009] new_geo.lower >= MIN_PAGENO │ │ - [ 3025] MDBX_TXN_FULL: Transaction has too many dirty pages, i.e transaction is too big │ │ - [ 3075] MDBX_SUCCESS: Successful │ │ - [ 308e] MDBX_WRITEMAP │ │ - [ 309c] dupfix-subleaf.legacy-dirty │ │ - [ 30b8] invalid page lower(%u)/upper(%u) with limit %zu\n │ │ - [ 30e9] unexpected leaf2-page (db-flags 0x%x)\n │ │ - [ 3110] branch-node[%zu] wrong flags (%u)\n │ │ - [ 3133] too small data (%zu bytes) for bigdata-node │ │ - [ 315f] alloc │ │ - [ 3165] invalid table node size │ │ - [ 317d] osal_fastmutex_release(&txn->env->dbi_lock) == MDBX_SUCCESS │ │ - [ 31b9] env_setup_pagesize │ │ - [ 31cc] !env->page_auxbuf && env->ps != pagesize │ │ - [ 31f5] check_fs_incore(), err %d\n │ │ - [ 3210] osal_pthread_mutex_lock(&rthc_mutex) == 0 │ │ - [ 323a] lock-against-without-lck │ │ - [ 3253] check_fstat │ │ - [ 325f] unacceptable/unexpected datafile size %u\n │ │ - [ 3289] troika: %lli.%c:%lli.%c:%lli.%c, fsm=0x%02x, head=%d-%lli.%c, base=%d-%lli.%c, tail=%d-%lli.%c, valid %c, strict %c\n │ │ - [ 32fe] lck_downgrade │ │ - [ 330c] meta[%u] has invalid txnid %lli, skip it\n │ │ - [ 3336] now │ │ - [ 333a] unable provide IDs and/or to fit returned PNL (%zd+%zd pages, %zd+%zd slots), err %d\n │ │ - [ 3390] txn_merge │ │ - [ 339a] unexpected thread-id 0x%llx%s0x%llx and/or txn-id %lli%s%lli\n │ │ - [ 33d8] unwind_phase2 │ │ - [ 33e6] d5 │ │ - [ 33ea] slice index starts at �^M but ends at � │ │ - [ 3411] packages/isar_core/src/legacy/isar_object_v1.rs │ │ - [ 3442] string � │ │ - [ 344b] mdbx_cursor_unbind │ │ - [ 345e] │ │ - [ 346c] %s │ │ - [ 346f] compacting_walk │ │ - [ 347f] invalid type (%u)\n │ │ - [ 3492] invalid n-pages (%u) for large-page\n │ │ - [ 34b7] leaf2-sub │ │ - [ 34c1] nested-node non-empty data size (%zu)\n │ │ - [ 34e8] mincore(+%zu, %zu), err %d\n │ │ - [ 3504] gc-alloc: next %zu > upper %u\n │ │ - [ 3523] cursor_del │ │ - [ 352e] invalid magic │ │ - [ 353c] LCK │ │ - [ 3540] MainDB │ │ - [ 3547] meta[%u] has invalid min-pages (%u), skip it\n │ │ - [ 3575] upper │ │ - [ 357b] osal_openfile │ │ - [ 3589] error %d while undo resize performed by nested txn, fail the parent\n │ │ - [ 35ce] txn_ro_end │ │ - [ 35d9] unknown personality routine │ │ - [ 35f5] s0 │ │ - [ 35f8] s31 │ │ - [ 35fc] d23 │ │ - [ 3600] _Unwind_GetDataRelBase │ │ - [ 3617] packages/isar_core_ffi/src/txn.rs │ │ - [ 3639] *internal error: entered unreachable code: � │ │ - [ 3666] pgno_ceil2sp_bytes(env, new_geo.lower) == (size_t)size_lower │ │ - [ 36a3] MDBX_TXN_OVERLAPPING: Overlapping read and write transactions for the current thread │ │ - [ 36f8] large │ │ - [ 36fe] nested dupsort db │ │ - [ 3710] to avoid PNL overflow │ │ - [ 3726] invalid nested-page size %zu\n │ │ - [ 3744] unexpected dupsort-page/node for non-dupsort db/cursor (dbi %zu)\n │ │ - [ 3786] flock │ │ - [ 378c] lock │ │ - [ 3791] %s() failed: err %d\n │ │ - [ 37a6] lock region has %s\n │ │ - [ 37ba] try-shared │ │ - [ 37c5] wsl │ │ - [ 37c9] meta[%u] has false-empty %s\n │ │ - [ 37e6] dbi %zu refs to the re-created table `%.*s` for txn %lli with different flags (present 0x%X != wanna 0x%X)\n │ │ - [ 3852] MDBX_PROBLEM │ │ - [ 385f] txn_ro_start │ │ - [ 386c] getRegister │ │ - [ 3878] r4 │ │ - [ 387b] d19 │ │ - [ 387f] index out of bounds: the len is �^R but the index is � │ │ - [ 38b6] unsuitable system pagesize %u\n │ │ - [ 38d5] MDBX_MAP_FULL: Environment mapsize limit reached │ │ - [ 3906] MDBX_PAGE_FULL: Internal error - Page has no more space │ │ - [ 393e] %.*s │ │ - [ 3943] invalid nested-db record size (%zu, expect %zu)\n │ │ - [ 3974] ousted-%s parked read-txn %lli, pid %u, tid 0x%llx\n │ │ - [ 39a8] page_unspill │ │ - [ 39b5] sshfs │ │ - [ 39bb] main │ │ - [ 39c0] pagesize <= MDBX_MAX_PAGESIZE │ │ - [ 39de] lck_seize │ │ - [ 39e8] DXB │ │ - [ 39ec] rthc_unlock │ │ - [ 39f8] 0 == meta_txnid(recent.ptr_v) │ │ - [ 3a16] %s meta[%u], txnid %lli, error %d\n │ │ - [ 3a39] WSL │ │ - [ 3a3d] rthc_dtor │ │ - [ 3a47] meta_override │ │ - [ 3a55] IN │ │ - [ 3a58] iov-init │ │ - [ 3a61] meta-pages are too volatile │ │ - [ 3a7d] s15 │ │ - [ 3a81] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/core/src/fmt/mod.rs │ │ - [ 3acd] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/alloc/src/collections/btree/node.rs │ │ - [ 3b29] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/core/src/ops/function.rs │ │ - [ 3b7a] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sys/io/io_slice/iovec.rs │ │ - [ 3bd3] mdbx_env_open │ │ - [ 3be1] osal_fastmutex_destroy(&env->remap_guard) == MDBX_SUCCESS │ │ - [ 3c1b] new_geo.now >= new_geo.lower │ │ - [ 3c38] MDBX_DBS_FULL: Too many DBI-handles (maxdbs reached) │ │ - [ 3c6d] MDBX_CURSOR_FULL: Cursor stack limit reachedn - this usually indicates corruption, i.e branch-pages loop │ │ - [ 3cd6] mdbx_txn_park │ │ - [ 3ce4] meta_model │ │ - [ 3cef] model_meta->geometry.shrink_pv == pages2pv(pv2pages(model_meta->geometry.shrink_pv)) │ │ - [ 3d44] invalid page-address %p, offset %zi\n │ │ - [ 3d69] node[%zu] key (%zu) beyond page-end\n │ │ - [ 3d8e] front-txn │ │ - [ 3d98] gc_alloc_ex │ │ - [ 3da4] unable %s %zu, alloc-flags 0x%x, err %d, txn-flags 0x%x, re-list-len %zu, loose-count %zu, gc: height %u, branch %zu, leaf %zu, large %zu, entries %zu\n │ │ - [ 3e3c] invalid node flags %u\n │ │ - [ 3e53] nfs │ │ - [ 3e57] ncpfs │ │ - [ 3e5d] unexpected │ │ - [ 3e68] stub │ │ - [ 3e6d] incompatible version (only applications with nearly or the same versions of libmdbx can share the same database) │ │ - [ 3ede] without-lck │ │ - [ 3eea] %s: err %d\n │ │ - [ 3ef6] %s, but boot-id(%016llx-%016llx) is MATCH: rollback NOT needed, steady-sync NEEDED%s\n │ │ - [ 3f4c] osal_fastmutex_init(&globals.debug_lock) == 0 │ │ - [ 3f7a] meta[%u] has too large max-mapsize (%llu), but size of used space still acceptable (%llu)\n │ │ - [ 3fd5] stage == cur_signature_live || (stage == cur_signature_wait4eot && shadow) │ │ - [ 4020] unexpected thread-id 0x%llx%s0x%zx and/or txn-id %lli%s%lli\n │ │ - [ 405d] txn_ro_seize │ │ - [ 406a] setFloatRegister │ │ - [ 407b] d13 │ │ - [ 407f] packages/isar_core/src/query/mod.rs │ │ - [ 40a3] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/once_cell-1.21.4/src/lib.rs │ │ - [ 40f9] (*prev)->signature == cur_signature_live || (*prev)->signature == cur_signature_wait4eot │ │ - [ 4152] mdbx_env_set_geometry │ │ - [ 4168] env->geo_in_bytes.upper % (unsigned)pagesize == 0 │ │ - [ 419a] new_geo.grow_pv == pages2pv(pv2pages(new_geo.grow_pv)) │ │ - [ 41d1] new_geo.now >= new_geo.first_unallocated │ │ - [ 41fa] MDBX_BAD_VALSIZE: Invalid size or alignment of key or data for target database, either invalid table name │ │ - [ 4264] MDBX_PROBLEM: Unexpected internal error, transaction should be aborted │ │ - [ 42ab] since rp_augment_limit was reached │ │ - [ 42ce] unable shrink rkl to %zu since length is %u\n │ │ - [ 42fb] mvcc_kick_laggards │ │ - [ 430e] ignore %s(%s) error %d: since %s done, local/remote-fs check %d\n │ │ - [ 434f] file-lock(%s) failed: fcntl-lock %d, flock %d, local/remote-fs check %d\n │ │ - [ 4398] update_mlcnt │ │ - [ 43a5] dxb_resize │ │ - [ 43b0] could not apply geometry from db │ │ - [ 43d1] filesize should be rounded-up to system page size %u\n │ │ - [ 4407] opening after an unclean shutdown │ │ - [ 4429] drown %d rthc entries\n │ │ - [ 4440] meta[%u] has invalid pagesize (%u), skip it\n │ │ - [ 446d] meta[%u] has invalid %s flags 0x%x, skip it\n │ │ - [ 449a] meta[%u] has invalid max-pages (%u), skip it\n │ │ - [ 44c8] wrong flags │ │ - [ 44d4] != must │ │ - [ 44de] unsupported arm register │ │ - [ 44f7] lr │ │ - [ 44fa] r9 │ │ - [ 44fd] s8 │ │ - [ 4500] d28 │ │ - [ 4504] packages/isar_core_ffi/src/dart.rs │ │ - [ 4527] packages/isar_core_ffi/src/index_key.rs │ │ - [ 454f] packages/isar_core/src/query/query_builder.rs │ │ - [ 457d] packages/isar_core/src/instance.rs │ │ - [ 45a2] .compact │ │ - [ 45ab] /rust/deps/miniz_oxide-0.8.9/src/inflate/core.rs │ │ - [ 45dc] 9internal error: entered unreachable code: str::from_utf8(�^D) = �" was expected to have 1 char, but �^Q chars were found │ │ - [ 4654] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sys/io/error/unix.rs │ │ - [ 46a9] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/core/src/str/pattern.rs │ │ - [ 46f9] /rust/deps/gimli-0.32.3/src/read/index.rs │ │ - [ 4723] mdbx_cursor_put │ │ - [ 4733] too old linux kernel %u.%u.%u.%u, the >= 3.16 is required\n │ │ - [ 476e] txn_check_badbits_parked │ │ - [ 4787] %s:%d │ │ - [ 478e] unexpected leaf-page for dupfix subtree (db-lags 0x%x)\n │ │ - [ 47c6] invalid nested/sub-page flags (0x%02x)\n │ │ - [ 47ee] catch delayed/non-arrived page %u %s\n │ │ - [ 4814] wrong page-type %u\n │ │ - [ 4828] Unexpected target %s flags 0x%x for large data-item\n │ │ - [ 485d] dbi_open │ │ - [ 4866] %s-madvise(%s, %zu, +%zu), %u/%u mlcnt-processes, err %d\n │ │ - [ 48a0] continue %s within without-lck mode, env-flags 0x%X, lck-error %d\n │ │ - [ 48e3] lck_setup_locked │ │ - [ 48f4] %s %s, err %d\n │ │ - [ 4903] MDBX_EXCLUSIVE │ │ - [ 4912] error %d, while updating meta.geo: from l%u-n%u-u%u/s%u-g%u (txn#%lli), to l%u-n%u-u%u/s%u-g%u (txn#%lli)\n │ │ - [ 497d] REMOVE (deallocate file space) │ │ - [ 499c] rthc_ctor │ │ - [ 49a6] lower │ │ - [ 49ac] gc_update │ │ - [ 49b6] sp │ │ - [ 49b9] r12 │ │ - [ 49bd] d21 │ │ - [ 49c1] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/serde_json-1.0.149/src/de.rs │ │ - [ 4a18] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/crossbeam-channel-0.5.15/src/flavors/list.rs │ │ - [ 4a7f] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/crossbeam-channel-0.5.15/src/flavors/zero.rs │ │ - [ 4ae6] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/intmap-2.0.0/src/lib.rs │ │ - [ 4b38] android_set_abort_message │ │ - [ 4b52] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/path.rs │ │ - [ 4b9b] memory allocation of �G bytes failed\n │ │ + [ 15a4] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sys/sync/rwlock/futex.rs │ │ + [ 15fd] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sys/thread/unix.rs │ │ + [ 1650] strange read-only │ │ + [ 1662] condition │ │ + [ 166c] copy_with_compacting │ │ + [ 1681] invalid leaf2_ksize %zu\n │ │ + [ 169a] invalid nested/sub-page record size (%zu)\n │ │ + [ 16c5] poorpage │ │ + [ 16ce] suboptimal %s-page #%u, mod-txnid %lli\n │ │ + [ 16f6] cursor_bring │ │ + [ 1703] node_move │ │ + [ 170d] read meta: empty file (%d, %s)\n │ │ + [ 172d] %s\n │ │ + [ 1731] rthc_lock │ │ + [ 173b] there are no suitable meta-pages │ │ + [ 175c] open-MADV_%s %u..%u\n │ │ + [ 1771] /proc/sys/kernel/random/boot_id │ │ + [ 1791] clock_gettime(CLOCK_REALTIME, &abstime) == 0 │ │ + [ 17be] tbl_fetch │ │ + [ 17c8] shadow->signature == cur_signature_live │ │ + [ 17f0] txn_renew │ │ + [ 17fa] _Unwind_Resume() can't return │ │ + [ 1818] s17 │ │ + [ 181c] d30 │ │ + [ 1821] byte index �& is not a char boundary; it is inside �^H (bytes �^F) of `�^A`� │ │ + [ 186c] unknown variant `�^L`, expected � │ │ + [ 188e] boolean `�^A` │ │ + [ 189c] :� │ │ + [ 189f] %s:%d error %d (%s) while closing cursor │ │ + [ 18c8] MDBX_BAD_TXN: Transaction is not valid for requested operation, e.g. had errored and be must aborted, has a child, or is invalid │ │ + [ 1949] MDBX_EMULTIVAL: The specified key has more than one associated value │ │ + [ 198e] mdbx_txn_reset │ │ + [ 199d] mdbx_txn_break │ │ + [ 19ac] mdbx_txn_unpark │ │ + [ 19bc] invalid GC-record content │ │ + [ 19d6] subleaf │ │ + [ 19de] debug_log_va │ │ + [ 19eb] invalid node[%zu] flags (%u)\n │ │ + [ 1a09] nested-node invalid flags (%u)\n │ │ + [ 1a29] Alternative/Duplicate LCK-file '%s' error %d\n │ │ + [ 1a57] bailout waiting for %u page arrival %s\n │ │ + [ 1a7f] write │ │ + [ 1a85] page_split │ │ + [ 1a90] meta_troika_dump │ │ + [ 1aa1] meta[%u] not completely updated, skip it\n │ │ + [ 1acb] pthread_setspecific(key, value) == 0 │ │ + [ 1af0] fifo │ │ + [ 1af9] %s: restart since %zu slot(s) reclaimed (reserved %zu...%zu of %zu)\n │ │ + [ 1b3e] != expected │ │ + [ 1b4c] r11 │ │ + [ 1b50] s12 │ │ + [ 1b54] s21 │ │ + [ 1b58] d7 │ │ + [ 1b5c] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/time.rs │ │ + [ 1ba4] /rust/deps/addr2line-0.25.1/src/function.rs │ │ + [ 1bd0] %s/%d: %s %u\n │ │ + [ 1bde] env->geo_in_bytes.grow % (unsigned)pagesize == 0 │ │ + [ 1c0f] unknown │ │ + [ 1c17] leaf2-item size (%zu) <> min/max length (%zu/%zu)\n │ │ + [ 1c4a] meta_unsteady │ │ + [ 1c58] page_dirty │ │ + [ 1c63] DPL is full (PAGELIST_LIMIT %zu)\n │ │ + [ 1c85] read meta[%u,%u]: %i, %s\n │ │ + [ 1c9f] failed resize datafile/mapping: present %u -> %u, limit %u -> %u, errcode %d\n │ │ + [ 1ced] ipc-unlock() │ │ + [ 1cfa] lck-file has invalid size %llu bytes\n │ │ + [ 1d20] msync/fsync │ │ + [ 1d2c] 0 == meta_eq_mask(&troika) │ │ + [ 1d47] read-only │ │ + [ 1d51] meta[%u] has invalid steady-checksum (0x%llx != 0x%llx), skip it\n │ │ + [ 1d93] meta[%u] used-bytes (%llu) beyond filesize (%llu), skip it\n │ │ + [ 1dcf] meta[%u] has false-empty %s, skip it\n │ │ + [ 1df5] cursor_eot │ │ + [ 1e00] r1 │ │ + [ 1e03] r6 │ │ + [ 1e06] r7 │ │ + [ 1e09] _Unwind_GetTextRelBase │ │ + [ 1e20] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/core/src/slice/sort/shared/smallsort.rs │ │ + [ 1e80] *extension cannot contain path separators: � │ │ + [ 1ead] env->geo_in_bytes.upper % globals.sys_pagesize == 0 │ │ + [ 1ee1] env->geo_in_bytes.shrink % (unsigned)pagesize == 0 │ │ + [ 1f14] env->ps >= MDBX_MIN_PAGESIZE │ │ + [ 1f31] unexpected %s-page for %s (db-flags 0x%x)\n │ │ + [ 1f5c] node[%zu] (%zu) beyond page-end\n │ │ + [ 1f7d] bigdata-pgno │ │ + [ 1f8a] too less n-pages %u for bigdata-node (%zu bytes) │ │ + [ 1fbb] nested-node beyond (%zu) nested-page\n │ │ + [ 1fe1] nested-db.mod_txnid (%lli) > page-txnid (%lli)\n │ │ + [ 2011] mismatched nested-db flags %u\n │ │ + [ 2030] 9P │ │ + [ 2033] unlock │ │ + [ 203a] munlock(%zu, %zu) error %d\n │ │ + [ 2056] workaround for incoherent flaw of unified page/buffer cache │ │ + [ 2092] spilled %u dirty-entries, %u dirty-npages, now have %zu dirty-room\n │ │ + [ 20d6] REMOVE │ │ + [ 20dd] dxb_sync_locked │ │ + [ 20ed] fstat(%s), err %d\n │ │ + [ 2100] last-page beyond end-of-file (last %u, have %u)\n │ │ + [ 2131] meta[%u] with %s txnid %lli is corrupted, %s needed\n │ │ + [ 2166] rthc_thread_dtor │ │ + [ 2177] %s: restart since no slot(s) available (reserved %zu...%zu of %zu)\n │ │ + [ 21bb] gc_reserve4return │ │ + [ 21cd] unexpected pid %u%s%u\n │ │ + [ 21e4] txn_ro_unpark │ │ + [ 21f2] s1 │ │ + [ 21f5] d20 │ │ + [ 21f9] d29 │ │ + [ 21fd] packages/isar_core_ffi/src/instance.rs │ │ + [ 2224] ©_from_slice: source slice length (�+) does not match destination slice length (�^A) │ │ + [ 227c] packages/isar_core/src/index/index_key_builder.rs │ │ + [ 22ae] MDBX_DUPLICATED_CLK: Alternative/Duplicate LCK-file is exists, please keep one and remove unused other │ │ + [ 2315] unexpected leaf2-page for non-dupfix (sub)tree (db-flags 0x%x)\n │ │ + [ 2355] nested-leaf2-key #%u wrong order (%s >= %s)\n │ │ + [ 2382] smbfs │ │ + [ 2388] munlock_after │ │ + [ 2396] free │ │ + [ 239b] all %zu dirty pages are unspillable since referenced by a cursor(s), use fewer cursors or increase MDBX_opt_txn_dp_limit\n │ │ + [ 2415] dbi_defer_release │ │ + [ 2427] mresize │ │ + [ 242f] legal4overwrite │ │ + [ 243f] %s and doing automatic rollback: purge%s meta[%u] with%s txnid %lli\n │ │ + [ 2484] invalid │ │ + [ 248d] meta_validate │ │ + [ 249b] MDBX_NOTFOUND │ │ + [ 24a9] s10 │ │ + [ 24ad] s16 │ │ + [ 24b1] s25 │ │ + [ 24b6] removal index (is �^V) should be < len (is �^A) │ │ + [ 24e4] /rust/deps/hashbrown-0.16.1/src/raw/mod.rs │ │ + [ 250f] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/crossbeam-channel-0.5.15/src/waker.rs │ │ + [ 256f] packages/isar_core/src/schema/collection_schema.rs │ │ + [ 25a2] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/itoa-1.0.18/src/lib.rs │ │ + [ 25f3] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/serde_json-1.0.149/src/error.rs │ │ + [ 264e] byte index �^Y is not an OsStr boundary │ │ + [ 2675] /rust/deps/gimli-0.32.3/src/read/line.rs │ │ + [ 269e] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sync/mpmc/waker.rs │ │ + [ 26f1] new_geo.upper >= new_geo.now │ │ + [ 270e] has page leak(s) │ │ + [ 271f] Raise the ENOSYS(%d) error to avoid hang due the 32-bit Bionic/Android bug with tid/thread_id 0x%08x(%i) that don�t fit in 16 bits, see https://android.googlesource.com/platform/bionic/+/master/docs/32-bit-abi.md#is-too-small-for-large-pids\n │ │ + [ 2813] check_table_flags │ │ + [ 2825] badpage │ │ + [ 282d] page_touch_unmodifable │ │ + [ 2844] %s addr %p, upper %u │ │ + [ 2859] cursor mismatched nested-db dupfix_size %u\n │ │ + [ 2885] coherency_fetch_head │ │ + [ 289a] GC/FreeDB │ │ + [ 28a4] Unexpected %i error while put to nested dupsort's hive\n │ │ + [ 28dc] unexpected %i error going left sibling\n │ │ + [ 2904] mmap │ │ + [ 2909] ON │ │ + [ 290c] pagesize >= MDBX_MIN_PAGESIZE │ │ + [ 292a] lck_setup │ │ + [ 2934] try-exclusive │ │ + [ 2942] meta-pages are clashed: mask 0x%d\n │ │ + [ 2965] %s, but %s for automatic rollback: %s\n │ │ + [ 298c] thread_key_delete │ │ + [ 299e] getInfoFromEHABISection │ │ + [ 29b6] r0 │ │ + [ 29b9] s27 │ │ + [ 29bd] d3 │ │ + [ 29c0] d27 │ │ + [ 29c4] packages/isar_core_ffi/src/filter.rs │ │ + [ 29e9] packages/isar_core/src/schema/schema_manager.rs │ │ + [ 2a1a] `�^F` or `�^A` │ │ + [ 2a29] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/../../backtrace/src/symbolize/gimli/lru.rs │ │ + [ 2a94] mdbx_dbi_open │ │ + [ 2aa2] env->geo_in_bytes.lower >= MIN_MAPSIZE │ │ + [ 2ac9] pgno_ceil2sp_bytes(env, new_geo.now) == (size_t)size_now │ │ + [ 2b02] invalid GC-record length │ │ + [ 2b1b] nested-node-key #%u wrong order (%s >= %s)\n │ │ + [ 2b47] branch/leaf/leaf2 │ │ + [ 2b59] stop reclaiming %s: %zu (current) + %zu (chunk) >= %zu, rp_augment_limit %u\n │ │ + [ 2ba6] http │ │ + [ 2bab] coherency_timeout │ │ + [ 2bbd] iov_callback4dirtypages │ │ + [ 2bd5] meta[%u] is too volatile, skip it\n │ │ + [ 2bf8] target == head.ptr_c || constmeta_txnid(target) < pending->unsafe_txnid │ │ + [ 2c40] osal_mmap │ │ + [ 2c4a] could not apply preconfigured db-geometry │ │ + [ 2c74] updating db-format/guid signature for │ │ + [ 2c9a] mdbx_fini │ │ + [ 2ca4] bailout overriding meta-%zu since model failed FreeDB/MainDB %s-check for txnid #%lli\n │ │ + [ 2cfb] dbi %zu refs to inaccessible table `%.*s` for txn %lli (err %d)\n │ │ + [ 2d3c] pthread_setspecific(rthc_key, &rthc_thread_state) == 0 │ │ + [ 2d73] environment corrupted by died writer, must shutdown! │ │ + [ 2da8] renew MainDB for %s-txn %lli since db-flags changes 0x%x -> 0x%x\n │ │ + [ 2dea] unexpected error %d during export the state of dbi-handles to env\n │ │ + [ 2e2d] r3 │ │ + [ 2e30] _Unwind_GetDataRelBase() not implemented │ │ + [ 2e59] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/alloc/src/collections/btree/map/entry.rs │ │ + [ 2eba] packages/isar_core/src/mdbx/db.rs │ │ + [ 2edc] packages/isar_core/src/index/mod.rs │ │ + [ 2f02] (os error �^A) │ │ + [ 2f11] mdbx_default_pagesize │ │ + [ 2f27] env->geo_in_bytes.now >= env->geo_in_bytes.lower │ │ + [ 2f58] new_geo.lower >= MIN_PAGENO │ │ + [ 2f74] MDBX_TXN_FULL: Transaction has too many dirty pages, i.e transaction is too big │ │ + [ 2fc4] MDBX_SUCCESS: Successful │ │ + [ 2fdd] MDBX_WRITEMAP │ │ + [ 2feb] dupfix-subleaf.legacy-dirty │ │ + [ 3007] invalid page lower(%u)/upper(%u) with limit %zu\n │ │ + [ 3038] unexpected leaf2-page (db-flags 0x%x)\n │ │ + [ 305f] branch-node[%zu] wrong flags (%u)\n │ │ + [ 3082] too small data (%zu bytes) for bigdata-node │ │ + [ 30ae] alloc │ │ + [ 30b4] invalid table node size │ │ + [ 30cc] osal_fastmutex_release(&txn->env->dbi_lock) == MDBX_SUCCESS │ │ + [ 3108] env_setup_pagesize │ │ + [ 311b] !env->page_auxbuf && env->ps != pagesize │ │ + [ 3144] check_fs_incore(), err %d\n │ │ + [ 315f] osal_pthread_mutex_lock(&rthc_mutex) == 0 │ │ + [ 3189] lock-against-without-lck │ │ + [ 31a2] check_fstat │ │ + [ 31ae] unacceptable/unexpected datafile size %u\n │ │ + [ 31d8] troika: %lli.%c:%lli.%c:%lli.%c, fsm=0x%02x, head=%d-%lli.%c, base=%d-%lli.%c, tail=%d-%lli.%c, valid %c, strict %c\n │ │ + [ 324d] lck_downgrade │ │ + [ 325b] meta[%u] has invalid txnid %lli, skip it\n │ │ + [ 3285] now │ │ + [ 3289] unable provide IDs and/or to fit returned PNL (%zd+%zd pages, %zd+%zd slots), err %d\n │ │ + [ 32df] txn_merge │ │ + [ 32e9] unexpected thread-id 0x%llx%s0x%llx and/or txn-id %lli%s%lli\n │ │ + [ 3327] unwind_phase2 │ │ + [ 3335] d5 │ │ + [ 3339] slice index starts at �^M but ends at � │ │ + [ 3360] packages/isar_core/src/legacy/isar_object_v1.rs │ │ + [ 3390] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/panic_abort/src/lib.rs │ │ + [ 33e0] string � │ │ + [ 33e9] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sync/mpmc/list.rs │ │ + [ 343b] mdbx_cursor_unbind │ │ + [ 344e] │ │ + [ 345c] %s │ │ + [ 345f] compacting_walk │ │ + [ 346f] invalid type (%u)\n │ │ + [ 3482] invalid n-pages (%u) for large-page\n │ │ + [ 34a7] leaf2-sub │ │ + [ 34b1] nested-node non-empty data size (%zu)\n │ │ + [ 34d8] mincore(+%zu, %zu), err %d\n │ │ + [ 34f4] gc-alloc: next %zu > upper %u\n │ │ + [ 3513] cursor_del │ │ + [ 351e] invalid magic │ │ + [ 352c] LCK │ │ + [ 3530] MainDB │ │ + [ 3537] meta[%u] has invalid min-pages (%u), skip it\n │ │ + [ 3565] upper │ │ + [ 356b] osal_openfile │ │ + [ 3579] error %d while undo resize performed by nested txn, fail the parent\n │ │ + [ 35be] txn_ro_end │ │ + [ 35c9] unknown personality routine │ │ + [ 35e5] s0 │ │ + [ 35e8] s31 │ │ + [ 35ec] d23 │ │ + [ 35f0] _Unwind_GetDataRelBase │ │ + [ 3607] packages/isar_core_ffi/src/txn.rs │ │ + [ 3629] *internal error: entered unreachable code: � │ │ + [ 3656] pgno_ceil2sp_bytes(env, new_geo.lower) == (size_t)size_lower │ │ + [ 3693] MDBX_TXN_OVERLAPPING: Overlapping read and write transactions for the current thread │ │ + [ 36e8] large │ │ + [ 36ee] nested dupsort db │ │ + [ 3700] to avoid PNL overflow │ │ + [ 3716] invalid nested-page size %zu\n │ │ + [ 3734] unexpected dupsort-page/node for non-dupsort db/cursor (dbi %zu)\n │ │ + [ 3776] flock │ │ + [ 377c] lock │ │ + [ 3781] %s() failed: err %d\n │ │ + [ 3796] lock region has %s\n │ │ + [ 37aa] try-shared │ │ + [ 37b5] wsl │ │ + [ 37b9] meta[%u] has false-empty %s\n │ │ + [ 37d6] dbi %zu refs to the re-created table `%.*s` for txn %lli with different flags (present 0x%X != wanna 0x%X)\n │ │ + [ 3842] MDBX_PROBLEM │ │ + [ 384f] txn_ro_start │ │ + [ 385c] getRegister │ │ + [ 3868] r4 │ │ + [ 386b] d19 │ │ + [ 386f] index out of bounds: the len is �^R but the index is � │ │ + [ 38a6] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sys/pal/unix/time.rs │ │ + [ 38fb] unsuitable system pagesize %u\n │ │ + [ 391a] MDBX_MAP_FULL: Environment mapsize limit reached │ │ + [ 394b] MDBX_PAGE_FULL: Internal error - Page has no more space │ │ + [ 3983] %.*s │ │ + [ 3988] invalid nested-db record size (%zu, expect %zu)\n │ │ + [ 39b9] ousted-%s parked read-txn %lli, pid %u, tid 0x%llx\n │ │ + [ 39ed] page_unspill │ │ + [ 39fa] sshfs │ │ + [ 3a00] main │ │ + [ 3a05] pagesize <= MDBX_MAX_PAGESIZE │ │ + [ 3a23] lck_seize │ │ + [ 3a2d] DXB │ │ + [ 3a31] rthc_unlock │ │ + [ 3a3d] 0 == meta_txnid(recent.ptr_v) │ │ + [ 3a5b] %s meta[%u], txnid %lli, error %d\n │ │ + [ 3a7e] WSL │ │ + [ 3a82] rthc_dtor │ │ + [ 3a8c] meta_override │ │ + [ 3a9a] IN │ │ + [ 3a9d] iov-init │ │ + [ 3aa6] meta-pages are too volatile │ │ + [ 3ac2] s15 │ │ + [ 3ac6] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/alloc/src/str.rs │ │ + [ 3b0f] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/core/src/fmt/mod.rs │ │ + [ 3b5b] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/io/mod.rs │ │ + [ 3ba5] mdbx_env_open │ │ + [ 3bb3] osal_fastmutex_destroy(&env->remap_guard) == MDBX_SUCCESS │ │ + [ 3bed] new_geo.now >= new_geo.lower │ │ + [ 3c0a] MDBX_DBS_FULL: Too many DBI-handles (maxdbs reached) │ │ + [ 3c3f] MDBX_CURSOR_FULL: Cursor stack limit reachedn - this usually indicates corruption, i.e branch-pages loop │ │ + [ 3ca8] mdbx_txn_park │ │ + [ 3cb6] meta_model │ │ + [ 3cc1] model_meta->geometry.shrink_pv == pages2pv(pv2pages(model_meta->geometry.shrink_pv)) │ │ + [ 3d16] invalid page-address %p, offset %zi\n │ │ + [ 3d3b] node[%zu] key (%zu) beyond page-end\n │ │ + [ 3d60] front-txn │ │ + [ 3d6a] gc_alloc_ex │ │ + [ 3d76] unable %s %zu, alloc-flags 0x%x, err %d, txn-flags 0x%x, re-list-len %zu, loose-count %zu, gc: height %u, branch %zu, leaf %zu, large %zu, entries %zu\n │ │ + [ 3e0e] invalid node flags %u\n │ │ + [ 3e25] nfs │ │ + [ 3e29] ncpfs │ │ + [ 3e2f] unexpected │ │ + [ 3e3a] stub │ │ + [ 3e3f] incompatible version (only applications with nearly or the same versions of libmdbx can share the same database) │ │ + [ 3eb0] without-lck │ │ + [ 3ebc] %s: err %d\n │ │ + [ 3ec8] %s, but boot-id(%016llx-%016llx) is MATCH: rollback NOT needed, steady-sync NEEDED%s\n │ │ + [ 3f1e] osal_fastmutex_init(&globals.debug_lock) == 0 │ │ + [ 3f4c] meta[%u] has too large max-mapsize (%llu), but size of used space still acceptable (%llu)\n │ │ + [ 3fa7] stage == cur_signature_live || (stage == cur_signature_wait4eot && shadow) │ │ + [ 3ff2] unexpected thread-id 0x%llx%s0x%zx and/or txn-id %lli%s%lli\n │ │ + [ 402f] txn_ro_seize │ │ + [ 403c] setFloatRegister │ │ + [ 404d] d13 │ │ + [ 4051] packages/isar_core/src/query/mod.rs │ │ + [ 4075] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/once_cell-1.21.4/src/lib.rs │ │ + [ 40cb] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/core/src/time.rs │ │ + [ 4114] (*prev)->signature == cur_signature_live || (*prev)->signature == cur_signature_wait4eot │ │ + [ 416d] mdbx_env_set_geometry │ │ + [ 4183] env->geo_in_bytes.upper % (unsigned)pagesize == 0 │ │ + [ 41b5] new_geo.grow_pv == pages2pv(pv2pages(new_geo.grow_pv)) │ │ + [ 41ec] new_geo.now >= new_geo.first_unallocated │ │ + [ 4215] MDBX_BAD_VALSIZE: Invalid size or alignment of key or data for target database, either invalid table name │ │ + [ 427f] MDBX_PROBLEM: Unexpected internal error, transaction should be aborted │ │ + [ 42c6] since rp_augment_limit was reached │ │ + [ 42e9] unable shrink rkl to %zu since length is %u\n │ │ + [ 4316] mvcc_kick_laggards │ │ + [ 4329] ignore %s(%s) error %d: since %s done, local/remote-fs check %d\n │ │ + [ 436a] file-lock(%s) failed: fcntl-lock %d, flock %d, local/remote-fs check %d\n │ │ + [ 43b3] update_mlcnt │ │ + [ 43c0] dxb_resize │ │ + [ 43cb] could not apply geometry from db │ │ + [ 43ec] filesize should be rounded-up to system page size %u\n │ │ + [ 4422] opening after an unclean shutdown │ │ + [ 4444] drown %d rthc entries\n │ │ + [ 445b] meta[%u] has invalid pagesize (%u), skip it\n │ │ + [ 4488] meta[%u] has invalid %s flags 0x%x, skip it\n │ │ + [ 44b5] meta[%u] has invalid max-pages (%u), skip it\n │ │ + [ 44e3] wrong flags │ │ + [ 44ef] != must │ │ + [ 44f9] unsupported arm register │ │ + [ 4512] lr │ │ + [ 4515] r9 │ │ + [ 4518] s8 │ │ + [ 451b] d28 │ │ + [ 451f] packages/isar_core_ffi/src/dart.rs │ │ + [ 4542] packages/isar_core_ffi/src/index_key.rs │ │ + [ 456a] packages/isar_core/src/query/query_builder.rs │ │ + [ 4598] packages/isar_core/src/instance.rs │ │ + [ 45bd] .compact │ │ + [ 45c6] /rust/deps/miniz_oxide-0.8.9/src/inflate/core.rs │ │ + [ 45f7] 9internal error: entered unreachable code: str::from_utf8(�^D) = �" was expected to have 1 char, but �^Q chars were found │ │ + [ 466f] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/../../backtrace/src/symbolize/gimli.rs │ │ + [ 46d6] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/path.rs │ │ + [ 471e] /rust/deps/gimli-0.32.3/src/read/index.rs │ │ + [ 4748] mdbx_cursor_put │ │ + [ 4758] too old linux kernel %u.%u.%u.%u, the >= 3.16 is required\n │ │ + [ 4793] txn_check_badbits_parked │ │ + [ 47ac] %s:%d │ │ + [ 47b3] unexpected leaf-page for dupfix subtree (db-lags 0x%x)\n │ │ + [ 47eb] invalid nested/sub-page flags (0x%02x)\n │ │ + [ 4813] catch delayed/non-arrived page %u %s\n │ │ + [ 4839] wrong page-type %u\n │ │ + [ 484d] Unexpected target %s flags 0x%x for large data-item\n │ │ + [ 4882] dbi_open │ │ + [ 488b] %s-madvise(%s, %zu, +%zu), %u/%u mlcnt-processes, err %d\n │ │ + [ 48c5] continue %s within without-lck mode, env-flags 0x%X, lck-error %d\n │ │ + [ 4908] lck_setup_locked │ │ + [ 4919] %s %s, err %d\n │ │ + [ 4928] MDBX_EXCLUSIVE │ │ + [ 4937] error %d, while updating meta.geo: from l%u-n%u-u%u/s%u-g%u (txn#%lli), to l%u-n%u-u%u/s%u-g%u (txn#%lli)\n │ │ + [ 49a2] REMOVE (deallocate file space) │ │ + [ 49c1] rthc_ctor │ │ + [ 49cb] lower │ │ + [ 49d1] gc_update │ │ + [ 49db] sp │ │ + [ 49de] r12 │ │ + [ 49e2] d21 │ │ + [ 49e6] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/serde_json-1.0.149/src/de.rs │ │ + [ 4a3d] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/crossbeam-channel-0.5.15/src/flavors/list.rs │ │ + [ 4aa4] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/crossbeam-channel-0.5.15/src/flavors/zero.rs │ │ + [ 4b0b] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/intmap-2.0.0/src/lib.rs │ │ + [ 4b5d] android_set_abort_message │ │ + [ 4b78] memory allocation of �G bytes failed\n │ │ skipping backtrace printing to avoid potential recursion\n │ │ - [ 4bfa] pagesize == (intptr_t)env->ps │ │ - [ 4c18] MDBX_OUSTED: The parked read transaction was outed for the sake of recycling old MVCC snapshots │ │ - [ 4c78] assert: %s\n │ │ - [ 4c84] │ │ - [ 4cae] error │ │ - [ 4cb4] has double-used pages or other corruption │ │ - [ 4cde] incompatible or invalid db.flags (0x%x) \n │ │ - [ 4d08] unknown_0x%x │ │ - [ 4d15] nested-node-key size (%zu) <> min/max value-length (%zu/%zu)\n │ │ - [ 4d53] page_alloc_finalize │ │ - [ 4d67] (workaround for incoherent flaw of unified page/buffer cache) │ │ - [ 4da5] cursor_seek │ │ - [ 4db1] DONTNEED │ │ - [ 4dba] lck_rdt_unlock │ │ - [ 4dc9] coherency_check_written │ │ - [ 4de1] recovery requires exclusive mode │ │ - [ 4e02] manual recovery is required │ │ - [ 4e1e] wrong │ │ - [ 4e24] GC │ │ - [ 4e27] wrong rec-size │ │ - [ 4e36] during phase1 personality function said it would stop here, but now in phase2 it did not stop here │ │ - [ 4e99] s13 │ │ - [ 4e9d] s20 │ │ - [ 4ea1] s22 │ │ - [ 4ea5] d1 │ │ - [ 4ea8] d16 │ │ - [ 4eac] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/unicode-segmentation-1.12.0/src/word.rs │ │ - [ 4f0e] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/once_cell-1.21.4/src/imp_std.rs │ │ - [ 4f68] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/serde_core-1.0.228/src/de/mod.rs │ │ - [ 4fc3] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/io/mod.rs │ │ - [ 500d] mdbx_cursor_get │ │ - [ 501d] MDBX_CORRUPTED │ │ - [ 502c] MDBX_EKEYMISMATCH: The given key value is mismatched to the current cursor position │ │ - [ 5080] %s/%d: %s %zu\n │ │ - [ 508f] end of large-page beyond (%u) allocated space (%u next-pgno)\n │ │ - [ 50cd] invalid page upper (%u) for nkeys %zu with leaf2-length %zu\n │ │ - [ 510a] large/overflow │ │ - [ 5119] pgno >= NUM_METAS │ │ - [ 512b] fcntl-lock │ │ - [ 5136] cifs │ │ - [ 513b] iov_write │ │ - [ 5145] no usable meta-pages, database is corrupted │ │ - [ 5171] lck-size too small (up to %u readers)\n │ │ - [ 5198] rollback: overwrite meta[%u] with txnid %lli, error %d\n │ │ - [ 51d0] drown env %p after-fork pid %d -> %d\n │ │ - [ 51f6] meta[%u] has invalid next-pageno (%u), skip it\n │ │ - [ 5226] txn-%s: error %d\n │ │ - [ 5238] unexpected duplicate(s) during rkl-push │ │ - [ 5260] dbi_lock failed, err %d\n │ │ - [ 5279] setRegister │ │ - [ 5285] s26 │ │ - [ 5289] d12 │ │ - [ 528e] range end index �" out of range for slice of length � │ │ - [ 52c4] packages/isar_core/src/watch/mod.rs │ │ - [ 52e8] packages/isar_core/src/watch/isar_watchers.rs │ │ - [ 5316] packages/isar_core/src/schema/index_schema.rs │ │ - [ 5345] `�^A` │ │ - [ 534a] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/alloc/src/collections/btree/navigate.rs │ │ - [ 53aa] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sys/thread/unix.rs │ │ - [ 53fe] [... omitted �^F frame�^F ...]\n │ │ - [ 5422] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/ffi/os_str.rs │ │ - [ 5470] Hcannot access a Thread Local Storage value during or after destruction: � │ │ - [ 54bb] env->geo_in_bytes.grow % globals.sys_pagesize == 0 │ │ - [ 54ee] mdbx_get_sysraminfo │ │ - [ 5502] /proc/ │ │ - [ 5509] env->ps <= MDBX_MAX_PAGESIZE │ │ - [ 5526] branch │ │ - [ 552d] dupfix-subleaf │ │ - [ 553c] %d: │ │ - [ 5541] no keys on a %s-page\n │ │ - [ 5557] %s-pages %u..%u, mlocked-process(es) %u -> %u\n │ │ - [ 5586] %s-madvise: ignore EINVAL (%d) since some pages maybe locked (%u/%u mlcnt-processes) │ │ - [ 55db] branch_nodemax > (intptr_t)(NODESIZE + 42) && branch_nodemax % 2 == 0 && leaf_nodemax > (intptr_t)(sizeof(tree_t) + NODESIZE + 42) && leaf_nodemax >= branch_nodemax && leaf_nodemax < (int)UINT16_MAX && leaf_nodemax % 2 == 0 │ │ - [ 56bb] WSL1 (Windows Subsystem for Linux) is mad and trouble-full, injecting failure to avoid data loss │ │ - [ 571c] need update meta-geo to filesize %u bytes, %u pages\n │ │ - [ 5751] updating db-format signature for │ │ - [ 5772] mdbx_init │ │ - [ 577c] meta[%u] has wrong mod_txnid %lli for %s, skip it\n │ │ - [ 57af] ERR │ │ - [ 57b3] gc_fill_returned │ │ - [ 57c4] _Unwind_VRS_Get_Internal │ │ - [ 57dd] r8 │ │ - [ 57e0] s19 │ │ - [ 57e4] s23 │ │ - [ 57e8] packages/isar_core_ffi/src/error.rs │ │ - [ 580c] packages/isar_core_ffi/src/query.rs │ │ - [ 5830] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/byteorder-1.5.0/src/lib.rs │ │ - [ 5885] packages/isar_core/src/object/isar_object.rs │ │ - [ 58b2] packages/isar_core/src/object/json_encode_decode.rs │ │ - [ 58e7] invalid value: �^K, expected � │ │ - [ 5905] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/../../backtrace/src/symbolize/mod.rs │ │ - [ 596a] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/panicking.rs │ │ - [ 59b8] aborting due to panic at �^B:\n │ │ - /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/core/src/num/wrapping.rs │ │ - [ 5a2a] txnid overflow, raise %d\n │ │ - [ 5a44] mdbx_is_readahead_reasonable │ │ - [ 5a61] MDBX_KEYEXIST: Key/data pair already exists │ │ - [ 5a8d] MDBX_INVALID: File is not an MDBX file │ │ - [ 5ab4] MDBX_WANNA_RECOVERY: Database should be recovered, but this could NOT be done automatically for now since it opened in read-only mode │ │ - [ 5b3a] mdbx_txn_renew │ │ - [ 5b49] r │ │ - [ 5b4b] node[%zu] key wrong order (%s >= %s)\n │ │ - [ 5b71] branch-node[%zu] wrong pgno (%u)\n │ │ - [ 5b93] parent-page │ │ - [ 5b9f] invalid GC key-length │ │ - [ 5bb5] invalid GC value-length │ │ - [ 5bcd] cursor_dupsort_setup │ │ - [ 5be2] osal_fastmutex_release(&env->dbi_lock) == MDBX_SUCCESS │ │ - [ 5c19] dxb_read_header │ │ - [ 5c29] skip %s since wagering meta-page (%u) is mispatch the recent meta-page (%u)\n │ │ - [ 5c76] pthread_mutex_unlock(&rthc_mutex) == 0 │ │ - [ 5c9d] without-lck, unable recovery/rollback │ │ - [ 5cc3] weak- │ │ - [ 5cc9] lck │ │ - [ 5ccd] meta[%u] has invalid pageno %u\n │ │ - [ 5ced] meta[%u] has too large min-mapsize (%llu), but size of used space still acceptable (%llu)\n │ │ - [ 5d48] %s: enter to dense-mode (amount %zu, reserved %zu..%zu, slots/ids %zu, left %zu..%zu, unfit %zu)\n │ │ - [ 5daa] txn_nested_create │ │ - [ 5dbc] s2 │ │ - [ 5dbf] d4 │ │ - [ 5dc2] d9 │ │ - [ 5dc5] /rust/deps/addr2line-0.25.1/src/line.rs │ │ - [ 5dee] range start index �" out of range for slice of length � │ │ - [ 5e27] Cannot open Environment: � │ │ - [ 5e43] _l_�^A_� │ │ - [ 5e4b] /rust/deps/rustc-demangle-0.1.26/src/lib.rs │ │ - [ 5e77] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/alloc/src/string.rs │ │ - [ 5ec3] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/core/src/slice/sort/stable/quicksort.rs │ │ - [ 5f23] env->geo_in_bytes.lower % (unsigned)pagesize == 0 │ │ - [ 5f55] MDBX_VERSION_MISMATCH: DB version mismatch libmdbx │ │ - [ 5f88] MDBX_INCOMPATIBLE: Environment or database is not compatible with the requested operation or the specified flags │ │ - [ 5ff9] │ │ - [ 6000] 0 │ │ - [ 6002] extra n-pages %u for bigdata-node (%zu bytes) │ │ - [ 6030] wipe txn #%lli, meta %u\n │ │ - [ 6049] fuse │ │ - [ 604e] multi │ │ - [ 6054] %s-spilling %zu dirty-entries, %zu dirty-npages\n │ │ - [ 6085] Unable to merge/rebalance %s page %u (has %zu keys, fill %u.%u%%, used %zu, room %zu bytes)\n │ │ - [ 60e2] force-forward pending-txn %lli -> %lli\n │ │ - [ 610a] sync datafile │ │ - [ 6118] time_conversion_checkup >= one_less && time_conversion_checkup <= one_more │ │ - [ 6163] osal_ctor │ │ - [ 616d] skip overriding meta-%zu since no changes for txnid #%lli\n │ │ - [ 61a8] page #%u not a meta-page\n │ │ - [ 61c2] meta[%u] consider geo-%s pageno is %u instead of wrong %u, will be corrected on next commit(s)\n │ │ - [ 6222] fallback to pthreads' tsd, key %u, count %u\n │ │ - [ 624f] txn_basal_commit │ │ - [ 6260] s28 │ │ - [ 6264] d0 │ │ - [ 6267] unknown register │ │ - [ 6278] /rust/deps/rustc-demangle-0.1.26/src/legacy.rs │ │ - [ 62a7] /rust/deps/addr2line-0.25.1/src/unit.rs │ │ - [ 62cf] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sync/mpmc/context.rs │ │ - [ 6324] mdbx_env_create │ │ - [ 6334] env->geo_in_bytes.shrink % globals.sys_pagesize == 0 │ │ - [ 6369] MDBX_BAD_DBI: The specified DBI-handle is invalid or changed by another thread/transaction │ │ - [ 63c4] /dev/urandom │ │ - [ 63d1] lxcfs │ │ - [ 63d7] osal_check_tid4bionic │ │ - [ 63ed] corrupted %s-page #%u, mod-txnid %lli\n │ │ - [ 6414] half │ │ - [ 6419] mvcc_shapshot_oldest │ │ - [ 642e] mismatched nested-db.dupfix_size (%u) <> min/max value-length (%zu/%zu)\n │ │ - [ 6477] mismatch and/or invalid size %p.%zu/%p.%zu for INTEGERKEY/INTEGERDUP\n │ │ - [ 64bd] failed: env %p, lck-%s %p, err %d\n │ │ - [ 64e0] initial-%s for lck-file failed, err %d\n │ │ - [ 6508] %s, err %u\n │ │ - [ 6514] lck_fstat │ │ - [ 651e] stead- │ │ - [ 6525] /var/lib/dbus/machine-id │ │ - [ 653e] drown env %p\n │ │ - [ 654c] osal_fastmutex_destroy(&globals.debug_lock) == 0 │ │ - [ 657d] post │ │ - [ 6582] Got STD%s_FILENO/%d, avoid using it by dup(fd)\n │ │ - [ 65b2] id == rkl_pop(rkl, is_lifo(txn)) │ │ - [ 65d3] environment had fatal error, must shutdown! │ │ - [ 65ff] MainDB db-flags changes 0x%x -> 0x%x ahead of read-txn %lli\n │ │ - [ 663c] rw │ │ - [ 663f] s24 │ │ - [ 6643] _Unwind_GetTextRelBase() not implemented │ │ - [ 666c] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/time.rs │ │ - [ 66b4] osal_fastmutex_destroy(&env->dbi_lock) == MDBX_SUCCESS │ │ - [ 66eb] %s %d (%s)\n │ │ - [ 66f7] model_meta->geometry.now >= model_meta->geometry.lower │ │ - [ 672e] leaf-sub │ │ - [ 6737] invalid page' txnid (%lli) for %s' txnid (%lli)\n │ │ - [ 6768] PNL too long (%zu > %zu)\n │ │ - [ 6782] steady │ │ - [ 6789] Wrong or mismatch pages's types (src %d, dst %d) to move node\n │ │ - [ 67c8] osal_ipclock_failed │ │ - [ 67dc] troika_tail < NUM_METAS && troika_tail != troika->recent && troika_tail != troika->prefer_steady │ │ - [ 683d] catch %s txnid %lli for meta_%u %s\n │ │ - [ 6861] current mode/flags 0x%X incompatible with requested 0x%X, rigorous diff 0x%X\n │ │ - [ 68af] meta[%u] has invalid min-mapsize (%llu), skip it\n │ │ - [ 68e1] db.mod_txnid (%lli) > page-txnid (%lli)\n │ │ - [ 690a] sync │ │ - [ 690f] unexpected duplicate(s) during rkl-merge │ │ - [ 6938] Invalid descriptor kind found. │ │ - [ 6958] invalid length �^K, expected � │ │ - [ 6976] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/thread/id.rs │ │ - [ 69c3] MDBX_EBADSIGN: Wrong signature of a runtime object(s), e.g. memory corruption or double-free │ │ - [ 6a20] MDBX_MVCC_RETARDED: MVCC snapshot used by parked transaction was bygone │ │ - [ 6a68] mdbx-panic │ │ - [ 6a73] %s/%d: %s\n │ │ - [ 6a7e] dupfix-leaf │ │ - [ 6a8a] node[%zu] key size (%zu) <> min/max key-length (%zu/%zu)\n │ │ - [ 6ac4] data │ │ - [ 6ac9] invalid sub-db record size (%zu)\n │ │ - [ 6aeb] unexpected_dupsort │ │ - [ 6afe] node_add_leaf │ │ - [ 6b0c] dupsort-db │ │ - [ 6b17] resize-MADV_%s %u..%u\n │ │ - [ 6b2e] mutex (un)lock failed, %s\n │ │ - [ 6b49] dxb_set_readahead │ │ - [ 6b5b] meta[%u] with last txnid %lli is corrupted, rollback needed\n │ │ - [ 6b98] skipped update meta.geo in %s mode: from l%u-n%u-u%u/s%u-g%u, to l%u-n%u-u%u/s%u-g%u\n │ │ - [ 6bee] %s %smeta[%u], txnid %lli\n │ │ - [ 6c09] gc_peekid │ │ - [ 6c13] too long %s-comeback-reserve @%lli, have %zu bytes, need %zu bytes\n │ │ - [ 6c57] s7 │ │ - [ 6c5a] d22 │ │ - [ 6c5e] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/alloc/src/raw_vec/mod.rs │ │ - [ 6caf] packages/isar_core/src/cursor.rs │ │ - [ 6cd0] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/serde_json-1.0.149/src/value/ser.rs │ │ - [ 6d2e] packages/isar_core/src/collection.rs │ │ - [ 6d54] integer `�^A` │ │ - [ 6d62] panicked at �^B:\n │ │ + [ 4bd7] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/core/src/num/wrapping.rs │ │ + [ 4c28] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sync/mpmc/context.rs │ │ + [ 4c7d] pagesize == (intptr_t)env->ps │ │ + [ 4c9b] MDBX_OUSTED: The parked read transaction was outed for the sake of recycling old MVCC snapshots │ │ + [ 4cfb] assert: %s\n │ │ + [ 4d07] │ │ + [ 4d31] error │ │ + [ 4d37] has double-used pages or other corruption │ │ + [ 4d61] incompatible or invalid db.flags (0x%x) \n │ │ + [ 4d8b] unknown_0x%x │ │ + [ 4d98] nested-node-key size (%zu) <> min/max value-length (%zu/%zu)\n │ │ + [ 4dd6] page_alloc_finalize │ │ + [ 4dea] (workaround for incoherent flaw of unified page/buffer cache) │ │ + [ 4e28] cursor_seek │ │ + [ 4e34] DONTNEED │ │ + [ 4e3d] lck_rdt_unlock │ │ + [ 4e4c] coherency_check_written │ │ + [ 4e64] recovery requires exclusive mode │ │ + [ 4e85] manual recovery is required │ │ + [ 4ea1] wrong │ │ + [ 4ea7] GC │ │ + [ 4eaa] wrong rec-size │ │ + [ 4eb9] during phase1 personality function said it would stop here, but now in phase2 it did not stop here │ │ + [ 4f1c] s13 │ │ + [ 4f20] s20 │ │ + [ 4f24] s22 │ │ + [ 4f28] d1 │ │ + [ 4f2b] d16 │ │ + [ 4f2f] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/unicode-segmentation-1.12.0/src/word.rs │ │ + [ 4f91] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/once_cell-1.21.4/src/imp_std.rs │ │ + [ 4feb] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/serde_core-1.0.228/src/de/mod.rs │ │ + [ 5046] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sys/random/linux.rs │ │ + [ 509a] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/core/src/slice/sort/stable/quicksort.rs │ │ + [ 50fa] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sync/mpmc/array.rs │ │ + [ 514d] mdbx_cursor_get │ │ + [ 515d] MDBX_CORRUPTED │ │ + [ 516c] MDBX_EKEYMISMATCH: The given key value is mismatched to the current cursor position │ │ + [ 51c0] %s/%d: %s %zu\n │ │ + [ 51cf] end of large-page beyond (%u) allocated space (%u next-pgno)\n │ │ + [ 520d] invalid page upper (%u) for nkeys %zu with leaf2-length %zu\n │ │ + [ 524a] large/overflow │ │ + [ 5259] pgno >= NUM_METAS │ │ + [ 526b] fcntl-lock │ │ + [ 5276] cifs │ │ + [ 527b] iov_write │ │ + [ 5285] no usable meta-pages, database is corrupted │ │ + [ 52b1] lck-size too small (up to %u readers)\n │ │ + [ 52d8] rollback: overwrite meta[%u] with txnid %lli, error %d\n │ │ + [ 5310] drown env %p after-fork pid %d -> %d\n │ │ + [ 5336] meta[%u] has invalid next-pageno (%u), skip it\n │ │ + [ 5366] txn-%s: error %d\n │ │ + [ 5378] unexpected duplicate(s) during rkl-push │ │ + [ 53a0] dbi_lock failed, err %d\n │ │ + [ 53b9] setRegister │ │ + [ 53c5] s26 │ │ + [ 53c9] d12 │ │ + [ 53ce] range end index �" out of range for slice of length � │ │ + [ 5404] packages/isar_core/src/watch/mod.rs │ │ + [ 5428] packages/isar_core/src/watch/isar_watchers.rs │ │ + [ 5456] packages/isar_core/src/schema/index_schema.rs │ │ + [ 5485] `�^A` │ │ + [ 548b] [... omitted �^F frame�^F ...]\n │ │ + [ 54af] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/ffi/os_str.rs │ │ + [ 54fd] Hcannot access a Thread Local Storage value during or after destruction: � │ │ + [ 5548] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/thread/local.rs │ │ + [ 5598] env->geo_in_bytes.grow % globals.sys_pagesize == 0 │ │ + [ 55cb] mdbx_get_sysraminfo │ │ + [ 55df] /proc/ │ │ + [ 55e6] env->ps <= MDBX_MAX_PAGESIZE │ │ + [ 5603] branch │ │ + [ 560a] dupfix-subleaf │ │ + [ 5619] %d: │ │ + [ 561e] no keys on a %s-page\n │ │ + [ 5634] %s-pages %u..%u, mlocked-process(es) %u -> %u\n │ │ + [ 5663] %s-madvise: ignore EINVAL (%d) since some pages maybe locked (%u/%u mlcnt-processes) │ │ + [ 56b8] branch_nodemax > (intptr_t)(NODESIZE + 42) && branch_nodemax % 2 == 0 && leaf_nodemax > (intptr_t)(sizeof(tree_t) + NODESIZE + 42) && leaf_nodemax >= branch_nodemax && leaf_nodemax < (int)UINT16_MAX && leaf_nodemax % 2 == 0 │ │ + [ 5798] WSL1 (Windows Subsystem for Linux) is mad and trouble-full, injecting failure to avoid data loss │ │ + [ 57f9] need update meta-geo to filesize %u bytes, %u pages\n │ │ + [ 582e] updating db-format signature for │ │ + [ 584f] mdbx_init │ │ + [ 5859] meta[%u] has wrong mod_txnid %lli for %s, skip it\n │ │ + [ 588c] ERR │ │ + [ 5890] gc_fill_returned │ │ + [ 58a1] _Unwind_VRS_Get_Internal │ │ + [ 58ba] r8 │ │ + [ 58bd] s19 │ │ + [ 58c1] s23 │ │ + [ 58c5] packages/isar_core_ffi/src/error.rs │ │ + [ 58e9] packages/isar_core_ffi/src/query.rs │ │ + [ 590d] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/byteorder-1.5.0/src/lib.rs │ │ + [ 5962] packages/isar_core/src/object/isar_object.rs │ │ + [ 598f] packages/isar_core/src/object/json_encode_decode.rs │ │ + [ 59c4] invalid value: �^K, expected � │ │ + [ 59e2] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/alloc/src/collections/btree/navigate.rs │ │ + [ 5a42] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/../../backtrace/src/symbolize/mod.rs │ │ + [ 5aa7] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sys/io/error/unix.rs │ │ + [ 5afd] aborting due to panic at �^B:\n │ │ + txnid overflow, raise %d\n │ │ + [ 5b38] mdbx_is_readahead_reasonable │ │ + [ 5b55] MDBX_KEYEXIST: Key/data pair already exists │ │ + [ 5b81] MDBX_INVALID: File is not an MDBX file │ │ + [ 5ba8] MDBX_WANNA_RECOVERY: Database should be recovered, but this could NOT be done automatically for now since it opened in read-only mode │ │ + [ 5c2e] mdbx_txn_renew │ │ + [ 5c3d] r │ │ + [ 5c3f] node[%zu] key wrong order (%s >= %s)\n │ │ + [ 5c65] branch-node[%zu] wrong pgno (%u)\n │ │ + [ 5c87] parent-page │ │ + [ 5c93] invalid GC key-length │ │ + [ 5ca9] invalid GC value-length │ │ + [ 5cc1] cursor_dupsort_setup │ │ + [ 5cd6] osal_fastmutex_release(&env->dbi_lock) == MDBX_SUCCESS │ │ + [ 5d0d] dxb_read_header │ │ + [ 5d1d] skip %s since wagering meta-page (%u) is mispatch the recent meta-page (%u)\n │ │ + [ 5d6a] pthread_mutex_unlock(&rthc_mutex) == 0 │ │ + [ 5d91] without-lck, unable recovery/rollback │ │ + [ 5db7] weak- │ │ + [ 5dbd] lck │ │ + [ 5dc1] meta[%u] has invalid pageno %u\n │ │ + [ 5de1] meta[%u] has too large min-mapsize (%llu), but size of used space still acceptable (%llu)\n │ │ + [ 5e3c] %s: enter to dense-mode (amount %zu, reserved %zu..%zu, slots/ids %zu, left %zu..%zu, unfit %zu)\n │ │ + [ 5e9e] txn_nested_create │ │ + [ 5eb0] s2 │ │ + [ 5eb3] d4 │ │ + [ 5eb6] d9 │ │ + [ 5eb9] /rust/deps/addr2line-0.25.1/src/line.rs │ │ + [ 5ee2] range start index �" out of range for slice of length � │ │ + [ 5f1b] Cannot open Environment: � │ │ + [ 5f37] _l_�^A_� │ │ + [ 5f3f] /rust/deps/rustc-demangle-0.1.26/src/lib.rs │ │ + [ 5f6b] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sync/once.rs │ │ + [ 5fb8] env->geo_in_bytes.lower % (unsigned)pagesize == 0 │ │ + [ 5fea] MDBX_VERSION_MISMATCH: DB version mismatch libmdbx │ │ + [ 601d] MDBX_INCOMPATIBLE: Environment or database is not compatible with the requested operation or the specified flags │ │ + [ 608e] │ │ + [ 6095] 0 │ │ + [ 6097] extra n-pages %u for bigdata-node (%zu bytes) │ │ + [ 60c5] wipe txn #%lli, meta %u\n │ │ + [ 60de] fuse │ │ + [ 60e3] multi │ │ + [ 60e9] %s-spilling %zu dirty-entries, %zu dirty-npages\n │ │ + [ 611a] Unable to merge/rebalance %s page %u (has %zu keys, fill %u.%u%%, used %zu, room %zu bytes)\n │ │ + [ 6177] force-forward pending-txn %lli -> %lli\n │ │ + [ 619f] sync datafile │ │ + [ 61ad] time_conversion_checkup >= one_less && time_conversion_checkup <= one_more │ │ + [ 61f8] osal_ctor │ │ + [ 6202] skip overriding meta-%zu since no changes for txnid #%lli\n │ │ + [ 623d] page #%u not a meta-page\n │ │ + [ 6257] meta[%u] consider geo-%s pageno is %u instead of wrong %u, will be corrected on next commit(s)\n │ │ + [ 62b7] fallback to pthreads' tsd, key %u, count %u\n │ │ + [ 62e4] txn_basal_commit │ │ + [ 62f5] s28 │ │ + [ 62f9] d0 │ │ + [ 62fc] unknown register │ │ + [ 630d] /rust/deps/rustc-demangle-0.1.26/src/legacy.rs │ │ + [ 633c] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/core/src/ops/function.rs │ │ + [ 638d] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/thread/thread.rs │ │ + [ 63de] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sys/io/io_slice/iovec.rs │ │ + [ 6437] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/thread/id.rs │ │ + [ 6484] /rust/deps/addr2line-0.25.1/src/unit.rs │ │ + [ 64ac] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sync/mpmc/zero.rs │ │ + [ 64fe] mdbx_env_create │ │ + [ 650e] env->geo_in_bytes.shrink % globals.sys_pagesize == 0 │ │ + [ 6543] MDBX_BAD_DBI: The specified DBI-handle is invalid or changed by another thread/transaction │ │ + [ 659e] /dev/urandom │ │ + [ 65ab] lxcfs │ │ + [ 65b1] osal_check_tid4bionic │ │ + [ 65c7] corrupted %s-page #%u, mod-txnid %lli\n │ │ + [ 65ee] half │ │ + [ 65f3] mvcc_shapshot_oldest │ │ + [ 6608] mismatched nested-db.dupfix_size (%u) <> min/max value-length (%zu/%zu)\n │ │ + [ 6651] mismatch and/or invalid size %p.%zu/%p.%zu for INTEGERKEY/INTEGERDUP\n │ │ + [ 6697] failed: env %p, lck-%s %p, err %d\n │ │ + [ 66ba] initial-%s for lck-file failed, err %d\n │ │ + [ 66e2] %s, err %u\n │ │ + [ 66ee] lck_fstat │ │ + [ 66f8] stead- │ │ + [ 66ff] /var/lib/dbus/machine-id │ │ + [ 6718] drown env %p\n │ │ + [ 6726] osal_fastmutex_destroy(&globals.debug_lock) == 0 │ │ + [ 6757] post │ │ + [ 675c] Got STD%s_FILENO/%d, avoid using it by dup(fd)\n │ │ + [ 678c] id == rkl_pop(rkl, is_lifo(txn)) │ │ + [ 67ad] environment had fatal error, must shutdown! │ │ + [ 67d9] MainDB db-flags changes 0x%x -> 0x%x ahead of read-txn %lli\n │ │ + [ 6816] rw │ │ + [ 6819] s24 │ │ + [ 681d] _Unwind_GetTextRelBase() not implemented │ │ + [ 6846] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/panicking.rs │ │ + [ 6893] osal_fastmutex_destroy(&env->dbi_lock) == MDBX_SUCCESS │ │ + [ 68ca] %s %d (%s)\n │ │ + [ 68d6] model_meta->geometry.now >= model_meta->geometry.lower │ │ + [ 690d] leaf-sub │ │ + [ 6916] invalid page' txnid (%lli) for %s' txnid (%lli)\n │ │ + [ 6947] PNL too long (%zu > %zu)\n │ │ + [ 6961] steady │ │ + [ 6968] Wrong or mismatch pages's types (src %d, dst %d) to move node\n │ │ + [ 69a7] osal_ipclock_failed │ │ + [ 69bb] troika_tail < NUM_METAS && troika_tail != troika->recent && troika_tail != troika->prefer_steady │ │ + [ 6a1c] catch %s txnid %lli for meta_%u %s\n │ │ + [ 6a40] current mode/flags 0x%X incompatible with requested 0x%X, rigorous diff 0x%X\n │ │ + [ 6a8e] meta[%u] has invalid min-mapsize (%llu), skip it\n │ │ + [ 6ac0] db.mod_txnid (%lli) > page-txnid (%lli)\n │ │ + [ 6ae9] sync │ │ + [ 6aee] unexpected duplicate(s) during rkl-merge │ │ + [ 6b17] Invalid descriptor kind found. │ │ + [ 6b37] invalid length �^K, expected � │ │ + [ 6b55] MDBX_EBADSIGN: Wrong signature of a runtime object(s), e.g. memory corruption or double-free │ │ + [ 6bb2] MDBX_MVCC_RETARDED: MVCC snapshot used by parked transaction was bygone │ │ + [ 6bfa] mdbx-panic │ │ + [ 6c05] %s/%d: %s\n │ │ + [ 6c10] dupfix-leaf │ │ + [ 6c1c] node[%zu] key size (%zu) <> min/max key-length (%zu/%zu)\n │ │ + [ 6c56] data │ │ + [ 6c5b] invalid sub-db record size (%zu)\n │ │ + [ 6c7d] unexpected_dupsort │ │ + [ 6c90] node_add_leaf │ │ + [ 6c9e] dupsort-db │ │ + [ 6ca9] resize-MADV_%s %u..%u\n │ │ + [ 6cc0] mutex (un)lock failed, %s\n │ │ + [ 6cdb] dxb_set_readahead │ │ + [ 6ced] meta[%u] with last txnid %lli is corrupted, rollback needed\n │ │ + [ 6d2a] skipped update meta.geo in %s mode: from l%u-n%u-u%u/s%u-g%u, to l%u-n%u-u%u/s%u-g%u\n │ │ + [ 6d80] %s %smeta[%u], txnid %lli\n │ │ + [ 6d9b] gc_peekid │ │ + [ 6da5] too long %s-comeback-reserve @%lli, have %zu bytes, need %zu bytes\n │ │ + [ 6de9] s7 │ │ + [ 6dec] d22 │ │ + [ 6df0] packages/isar_core/src/cursor.rs │ │ + [ 6e11] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/serde_json-1.0.149/src/value/ser.rs │ │ + [ 6e6f] packages/isar_core/src/collection.rs │ │ + [ 6e95] integer `�^A` │ │ + [ 6ea3] panicked at �^B:\n │ │ 3\n │ │ thread panicked while processing panic. aborting.\n │ │ - [ 6da8] is_powerof2(pagesize) │ │ - [ 6dbe] mdbx_env_copy │ │ - [ 6dcc] mdbx_cursor_bind │ │ - [ 6ddd] mdbx_cursor_close │ │ - [ 6def] env->geo_in_bytes.now <= env->geo_in_bytes.upper │ │ - [ 6e20] env->geo_in_bytes.now % (unsigned)pagesize == 0 │ │ - [ 6e50] pgno mismatch (%u) != expected (%u)\n │ │ - [ 6e75] %s: │ │ - [ 6e7a] invalid pgno (%u)\n │ │ - [ 6e8d] tree_search_finalize │ │ - [ 6ea2] cmp_int_inline │ │ - [ 6eb1] single │ │ - [ 6eb8] catch invalid %s-db.mod_txnid %lli for meta_txnid %lli %s\n │ │ - [ 6ef3] file was removed │ │ - [ 6f04] filesize mismatch (expect %ub/%up, have %llub/%llup)\n │ │ - [ 6f3a] pthread_key_delete(key) == 0 │ │ - [ 6f57] pthread_cond_broadcast(&rthc_cond) == 0 │ │ - [ 6f7f] lifo │ │ - [ 6f88] gc_push_sequel │ │ - [ 6f97] recursive-solving preconditions violated │ │ - [ 6fc0] target meta-page %i is referenced to an obsolete MVCC-snapshot %lli < cached-oldest %lli\n │ │ - [ 701a] _Unwind_Resume │ │ - [ 7029] unsupported register class │ │ - [ 7044] r10 │ │ - [ 7048] d6 │ │ - [ 704b] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sys/sync/rwlock/futex.rs │ │ - [ 70a4] %s mode is incompatible with nested transactions\n │ │ - [ 70d6] model_meta->geometry.now <= model_meta->geometry.upper │ │ - [ 710d] tbl_setup │ │ - [ 7117] nested dupsort tree │ │ - [ 712b] node[%zu] too long key (%zu)\n │ │ - [ 7149] node-%s(%zu of %zu, %zu bytes) beyond (%zu) page-end\n │ │ - [ 717f] nested-node-key beyond (%zu) nested-page\n │ │ - [ 71a9] mincore_fetch │ │ - [ 71b7] reserve │ │ - [ 71bf] check_alternative_lck_absent │ │ - [ 71dc] msync │ │ - [ 71e2] !env->basal_txn || !env->txn │ │ - [ 71ff] %s is on a remote file system, the %s is required\n │ │ - [ 7232] lck_destroy │ │ - [ 723e] STD%s_FILENO/%d is invalid, open %s for temporary stub\n │ │ - [ 7276] gc_remove_rkl │ │ - [ 7284] txn_ro_park │ │ - [ 7290] Unknown ARM float register │ │ - [ 72ab] r2 │ │ - [ 72ae] s6 │ │ - [ 72b2] byte index �^V is out of bounds of `�^A`� │ │ - [ 72da] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/serde_json-1.0.149/src/read.rs │ │ - [ 7333] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/../../backtrace/src/symbolize/gimli/elf.rs │ │ - [ 739e] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/core/src/time.rs │ │ - [ 73e7] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sys/pal/unix/time.rs │ │ - [ 743e] :�^A:� │ │ - [ 7444] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sync/mpmc/array.rs │ │ - [ 7497] mdbx_cursor_close2 │ │ - [ 74aa] MDBX_CORRUPTED: Database is corrupted │ │ - [ 74d0] MDBX_PANIC: Environment had fatal error │ │ - [ 74f8] mdbx_env_set_option │ │ - [ 750c] mdbx_txn_abort │ │ - [ 751b] /proc/sys/kernel/random/uuid │ │ - [ 7538] /proc/mounts │ │ - [ 7545] page #%u beyond next-pgno\n │ │ - [ 7560] osal_fastmutex_release(&globals.debug_lock) == 0 │ │ - [ 7591] leaf2-item beyond (%zu) page-end\n │ │ - [ 75b3] nested-leaf2-key beyond (%zu) nested-page\n │ │ - [ 75de] invalid page' lower(%u)/upper(%u) with limit %zu\n │ │ - [ 7610] unable growth datafile to %zu pages (+%zu), errcode %d\n │ │ - [ 7648] invalid/corrupted source page │ │ - [ 7666] copy2pathname │ │ - [ 7674] cursor->signature == cur_signature_wait4eot │ │ - [ 76a0] catch invalid %s-db root %u for meta_txnid %lli %s\n │ │ - [ 76d4] failed resume-after-remap: errcode %d\n │ │ - [ 76fb] env_sync │ │ - [ 7704] env_open │ │ - [ 770d] in-core database │ │ - [ 771e] unable to open lck-file %s, env-flags 0x%X, err %d\n │ │ - [ 7752] dxb-exclusive │ │ - [ 7760] header.unsafe_txnid == recent.txnid │ │ - [ 7784] thread 0x%x, rthc %p, pid %d, self-status %s (0x%08llx)\n │ │ - [ 77bd] lck_txn_unlock │ │ - [ 77cc] meta[%u] has invalid magic/version %llx\n │ │ - [ 77f5] count_before < INT_MAX │ │ - [ 780c] txn->txnid >= env->lck->cached_oldest.weak │ │ - [ 7837] txn_basal_start │ │ - [ 7847] latch_maindb_locked │ │ - [ 785b] d10 │ │ - [ 785f] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/core/src/cell.rs │ │ - [ 78a8] /rust/deps/miniz_oxide-0.8.9/src/inflate/output_buffer.rs │ │ - [ 78e2] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/panic_abort/src/lib.rs │ │ - [ 7931] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/../../backtrace/src/symbolize/gimli.rs │ │ - [ 7998] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/threadpool-1.8.1/src/lib.rs │ │ - [ 79ee] env->geo_in_bytes.upper <= MAX_MAPSIZE │ │ - [ 7a15] (size_t)size_lower >= MIN_MAPSIZE │ │ - [ 7a37] MDBX_NOTFOUND: No matching key/data pair found │ │ - [ 7a66] error %d │ │ - [ 7a6f] mdbx_txn_begin_ex │ │ - [ 7a81] │ │ - [ 7a89] model_meta->geometry.lower >= MIN_PAGENO │ │ - [ 7ab2] db.dupfix_size (%u) <> min/max value-length (%zu/%zu)\n │ │ - [ 7ae9] page_get_inline │ │ - [ 7af9] leaf2-item #%zu wrong order (%s >= %s)\n │ │ - [ 7b21] unexpected %s instead of %s (%u)\n │ │ - [ 7b43] dpl_append │ │ - [ 7b4e] /etc/mtab │ │ - [ 7b58] txn_shadow_cursors │ │ - [ 7b6b] catch invalid root_page %u mod_txnid %lli for %s-db.mod_txnid %lli %s\n │ │ - [ 7bb2] skip update meta%u for txn#%lli, since it is already steady\n │ │ - [ 7bef] invalid │ │ - [ 7bf7] %s is exported via NFS\n │ │ - [ 7c0f] target meta[%u] is corrupted\n │ │ - [ 7c2d] pthread_atfork(nullptr, nullptr, rthc_afterfork) == 0 │ │ - [ 7c63] atomic_sub32(&rthc_pending, 1) > 0 │ │ - [ 7c86] OUT │ │ - [ 7c8a] ** internal error (reservation gc-id %lli)\n │ │ - [ 7cb6] index inlined table detected but pr function requires extra words │ │ - [ 7cf8] s9 │ │ - [ 7cfb] s29 │ │ - [ 7cff] d15 │ │ - [ 7d03] d17 │ │ - [ 7d07] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/sync/mpmc/mod.rs │ │ - [ 7d58] v0.13.8-temp-upstream-fix │ │ - [ 7d72] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/alloc/src/fmt.rs │ │ - [ 7dbc] DbCorrupted: � │ │ - [ 7dcb] packages/isar_core/src/object/id.rs │ │ - [ 7df0] invalid type: �^K, expected � │ │ - [ 7e0d] /rustc/4a4ef493e3a1488c6e321570238084b38948f6db/library/std/src/thread/current.rs │ │ + [ 6ee9] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/core/src/cell/once.rs │ │ + [ 6f37] is_powerof2(pagesize) │ │ + [ 6f4d] mdbx_env_copy │ │ + [ 6f5b] mdbx_cursor_bind │ │ + [ 6f6c] mdbx_cursor_close │ │ + [ 6f7e] env->geo_in_bytes.now <= env->geo_in_bytes.upper │ │ + [ 6faf] env->geo_in_bytes.now % (unsigned)pagesize == 0 │ │ + [ 6fdf] pgno mismatch (%u) != expected (%u)\n │ │ + [ 7004] %s: │ │ + [ 7009] invalid pgno (%u)\n │ │ + [ 701c] tree_search_finalize │ │ + [ 7031] cmp_int_inline │ │ + [ 7040] single │ │ + [ 7047] catch invalid %s-db.mod_txnid %lli for meta_txnid %lli %s\n │ │ + [ 7082] file was removed │ │ + [ 7093] filesize mismatch (expect %ub/%up, have %llub/%llup)\n │ │ + [ 70c9] pthread_key_delete(key) == 0 │ │ + [ 70e6] pthread_cond_broadcast(&rthc_cond) == 0 │ │ + [ 710e] lifo │ │ + [ 7117] gc_push_sequel │ │ + [ 7126] recursive-solving preconditions violated │ │ + [ 714f] target meta-page %i is referenced to an obsolete MVCC-snapshot %lli < cached-oldest %lli\n │ │ + [ 71a9] _Unwind_Resume │ │ + [ 71b8] unsupported register class │ │ + [ 71d3] r10 │ │ + [ 71d7] d6 │ │ + [ 71da] %s mode is incompatible with nested transactions\n │ │ + [ 720c] model_meta->geometry.now <= model_meta->geometry.upper │ │ + [ 7243] tbl_setup │ │ + [ 724d] nested dupsort tree │ │ + [ 7261] node[%zu] too long key (%zu)\n │ │ + [ 727f] node-%s(%zu of %zu, %zu bytes) beyond (%zu) page-end\n │ │ + [ 72b5] nested-node-key beyond (%zu) nested-page\n │ │ + [ 72df] mincore_fetch │ │ + [ 72ed] reserve │ │ + [ 72f5] check_alternative_lck_absent │ │ + [ 7312] msync │ │ + [ 7318] !env->basal_txn || !env->txn │ │ + [ 7335] %s is on a remote file system, the %s is required\n │ │ + [ 7368] lck_destroy │ │ + [ 7374] STD%s_FILENO/%d is invalid, open %s for temporary stub\n │ │ + [ 73ac] gc_remove_rkl │ │ + [ 73ba] txn_ro_park │ │ + [ 73c6] Unknown ARM float register │ │ + [ 73e1] r2 │ │ + [ 73e4] s6 │ │ + [ 73e7] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/sync/mpmc/mod.rs │ │ + [ 7439] byte index �^V is out of bounds of `�^A`� │ │ + [ 7461] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/serde_json-1.0.149/src/read.rs │ │ + [ 74bc] :�^A:� │ │ + [ 74c2] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/../../backtrace/src/backtrace/libunwind.rs │ │ + [ 752d] mdbx_cursor_close2 │ │ + [ 7540] MDBX_CORRUPTED: Database is corrupted │ │ + [ 7566] MDBX_PANIC: Environment had fatal error │ │ + [ 758e] mdbx_env_set_option │ │ + [ 75a2] mdbx_txn_abort │ │ + [ 75b1] /proc/sys/kernel/random/uuid │ │ + [ 75ce] /proc/mounts │ │ + [ 75db] page #%u beyond next-pgno\n │ │ + [ 75f6] osal_fastmutex_release(&globals.debug_lock) == 0 │ │ + [ 7627] leaf2-item beyond (%zu) page-end\n │ │ + [ 7649] nested-leaf2-key beyond (%zu) nested-page\n │ │ + [ 7674] invalid page' lower(%u)/upper(%u) with limit %zu\n │ │ + [ 76a6] unable growth datafile to %zu pages (+%zu), errcode %d\n │ │ + [ 76de] invalid/corrupted source page │ │ + [ 76fc] copy2pathname │ │ + [ 770a] cursor->signature == cur_signature_wait4eot │ │ + [ 7736] catch invalid %s-db root %u for meta_txnid %lli %s\n │ │ + [ 776a] failed resume-after-remap: errcode %d\n │ │ + [ 7791] env_sync │ │ + [ 779a] env_open │ │ + [ 77a3] in-core database │ │ + [ 77b4] unable to open lck-file %s, env-flags 0x%X, err %d\n │ │ + [ 77e8] dxb-exclusive │ │ + [ 77f6] header.unsafe_txnid == recent.txnid │ │ + [ 781a] thread 0x%x, rthc %p, pid %d, self-status %s (0x%08llx)\n │ │ + [ 7853] lck_txn_unlock │ │ + [ 7862] meta[%u] has invalid magic/version %llx\n │ │ + [ 788b] count_before < INT_MAX │ │ + [ 78a2] txn->txnid >= env->lck->cached_oldest.weak │ │ + [ 78cd] txn_basal_start │ │ + [ 78dd] latch_maindb_locked │ │ + [ 78f1] d10 │ │ + [ 78f5] /rust/deps/miniz_oxide-0.8.9/src/inflate/output_buffer.rs │ │ + [ 792f] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/alloc/src/string.rs │ │ + [ 797b] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/std/src/../../backtrace/src/symbolize/gimli/stash.rs │ │ + [ 79e8] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/threadpool-1.8.1/src/lib.rs │ │ + [ 7a3e] env->geo_in_bytes.upper <= MAX_MAPSIZE │ │ + [ 7a65] (size_t)size_lower >= MIN_MAPSIZE │ │ + [ 7a87] MDBX_NOTFOUND: No matching key/data pair found │ │ + [ 7ab6] error %d │ │ + [ 7abf] mdbx_txn_begin_ex │ │ + [ 7ad1] │ │ + [ 7ad9] model_meta->geometry.lower >= MIN_PAGENO │ │ + [ 7b02] db.dupfix_size (%u) <> min/max value-length (%zu/%zu)\n │ │ + [ 7b39] page_get_inline │ │ + [ 7b49] leaf2-item #%zu wrong order (%s >= %s)\n │ │ + [ 7b71] unexpected %s instead of %s (%u)\n │ │ + [ 7b93] dpl_append │ │ + [ 7b9e] /etc/mtab │ │ + [ 7ba8] txn_shadow_cursors │ │ + [ 7bbb] catch invalid root_page %u mod_txnid %lli for %s-db.mod_txnid %lli %s\n │ │ + [ 7c02] skip update meta%u for txn#%lli, since it is already steady\n │ │ + [ 7c3f] invalid │ │ + [ 7c47] %s is exported via NFS\n │ │ + [ 7c5f] target meta[%u] is corrupted\n │ │ + [ 7c7d] pthread_atfork(nullptr, nullptr, rthc_afterfork) == 0 │ │ + [ 7cb3] atomic_sub32(&rthc_pending, 1) > 0 │ │ + [ 7cd6] OUT │ │ + [ 7cda] ** internal error (reservation gc-id %lli)\n │ │ + [ 7d06] index inlined table detected but pr function requires extra words │ │ + [ 7d48] s9 │ │ + [ 7d4b] s29 │ │ + [ 7d4f] d15 │ │ + [ 7d53] d17 │ │ + [ 7d57] v0.13.8-temp-upstream-fix │ │ + [ 7d71] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/core/src/panicking.rs │ │ + [ 7dbf] /rustc/e408947bfd200af42db322daf0fadfe7e26d3bd1/library/core/src/str/lossy.rs │ │ + [ 7e0e] DbCorrupted: � │ │ + [ 7e1d] packages/isar_core/src/object/id.rs │ │ + [ 7e42] invalid type: �^K, expected � │ │ [ 7e5f] /tmp/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/unicode-segmentation-1.12.0/src/tables.rs │ │ [ 7ec3] mdbx_env_close_ex │ │ [ 7ed5] pgno_ceil2sp_bytes(env, new_geo.upper) == (size_t)size_upper │ │ [ 7f12] MDBX_PAGE_NOTFOUND: Requested page not found │ │ [ 7f3f] MDBX_BAD_RSLOT: Invalid reuse of reader locktable slot, e.g. read-transaction already run for current thread │ │ [ 7fac] MDBX_DANGLING_DBI: Some cursors and/or other resources should be closed before table or corresponding DBI-handle could be (re)used │ │ [ 802f] leaf │ │ @@ -3264,22 +3264,22 @@ │ │ [ ef20] + │ │ [ ef22] 3 │ │ [ ef24] ; │ │ [ ef26] C │ │ [ ef28] S │ │ [ ef2a] c │ │ [ ef2c] s │ │ - [ ef66] ! │ │ - [ ef68] 1 │ │ - [ ef6a] A │ │ - [ ef6c] a │ │ - [ ef87] ^A0^A@^A`^A^A^A │ │ - [ ef94] assertion failed: out_pos + 3 < out_slice.len()assertion failed: (source_pos + 3) & out_buf_size_mask < out_slice.len()assertion failed: out_pos + 1 < out_slice.len()assertion failed: (source_pos + 1) & out_buf_size_mask < out_slice.len()assertion failed: out_pos + 2 < out_slice.len()assertion failed: (source_pos + 2) & out_buf_size_mask < out_slice.len()dest is out of bounds0str()i8i16i32i64isizeu16u32u64usizef32f64!_...[]{recursion limit reached}?::::{closure:#}<>& *const ; (,) + Cunsafe " -fn(false{ { }: = 0x`fmt::Error`s should be impossible without a `fmt::Formatter`'> ..= | !null__R_ZN.llvm.{size limit reached}`fmt::Error` from `SizeLimitedFmtAdapter` was discardedpunycode{EmptyInvalidDigitPosOverflowNegOverflowParseIntErrorSizeLimitExhausted@.u8explicit panicone of , byte arrayOption valuenewtype structmapunit variantnewtype varianttuple variantstruct varianta booleanuuuuuuuubtnufruuuuuuuuuuuuuuuuuu │ │ - [ f32f] " │ │ - [ f369] \ │ │ + [ ef52] ! │ │ + [ ef54] 1 │ │ + [ ef56] A │ │ + [ ef58] a │ │ + [ ef73] ^A0^A@^A`^A^A^A │ │ + [ ef93] assertion failed: out_pos + 3 < out_slice.len()assertion failed: (source_pos + 3) & out_buf_size_mask < out_slice.len()assertion failed: out_pos + 1 < out_slice.len()assertion failed: (source_pos + 1) & out_buf_size_mask < out_slice.len()assertion failed: out_pos + 2 < out_slice.len()assertion failed: (source_pos + 2) & out_buf_size_mask < out_slice.len()dest is out of bounds0str()i8i16i32i64isizeu16u32u64usizef32f64!_...[]{recursion limit reached}?::::{closure:#}<>& *const ; (,) + Cunsafe " -fn(false{ { }: = 0x`fmt::Error`s should be impossible without a `fmt::Formatter`'> ..= | !null__R_ZN.llvm.{size limit reached}`fmt::Error` from `SizeLimitedFmtAdapter` was discardedpunycode{EmptyInvalidDigitPosOverflowNegOverflowParseIntErrorSizeLimitExhausted@.u8explicit panicone of , byte arrayOption valuenewtype structmapunit variantnewtype varianttuple variantstruct varianta booleanuuuuuuuubtnufruuuuuuuuuuuuuuuuuu │ │ + [ f32e] " │ │ + [ f368] \ │ │ [ f417] ? │ │ [ f41e] $@ │ │ [ f426] Y@ │ │ [ f42d] @�@ │ │ [ f437] @ │ │ [ f43d] j�@ │ │ [ f446] .A │ ├── objdump --line-numbers --disassemble --demangle --reloc --no-show-raw-insn --section=.text {} │ │ @@ -1,34 +1,34 @@ │ │ │ │ │ │ │ │ Disassembly of section .text: │ │ │ │ -00021cc0 : │ │ - ldr r0, [pc, #4] @ 21ccc │ │ +00021cc0 : │ │ + ldr r0, [pc, #4] @ 21ccc │ │ add r0, pc, r0 │ │ - b d8790 │ │ - andeq r8, fp, r4, asr #4 │ │ + b d87a0 │ │ + andeq r8, fp, r4, asr r2 │ │ bx lr │ │ - b d5820 │ │ + b d5830 │ │ cmp r0, #0 │ │ bxeq lr │ │ bx r0 │ │ mov r1, r0 │ │ - ldr r0, [pc, #12] @ 21cfc │ │ - ldr r2, [pc, #12] @ 21d00 │ │ + ldr r0, [pc, #12] @ 21cfc │ │ + ldr r2, [pc, #12] @ 21d00 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ - b d87a0 │ │ + b d87b0 │ │ @ instruction: 0xffffffe0 │ │ - andeq r8, fp, r4, lsl r2 │ │ - ldr r3, [pc, #4] @ 21d10 │ │ + andeq r8, fp, r4, lsr #4 │ │ + ldr r3, [pc, #4] @ 21d10 │ │ add r3, pc, r3 │ │ - b d87b0 │ │ - andeq r8, fp, r0, lsl #4 │ │ + b d87c0 │ │ + andeq r8, fp, r0, lsl r2 │ │ svcmi 0x00f0e92d │ │ strmi fp, [r0], r1, lsl #1 │ │ @ instruction: 0xf8d84615 │ │ stmdavs r0, {r3, sp} │ │ @ instruction: 0xf0004290 │ │ @ instruction: 0xf8d880b1 │ │ @ instruction: 0x23220004 │ │ @@ -46,30 +46,30 @@ │ │ svceq 0x0000f1bb │ │ strdlt sp, [pc, r3]! │ │ ldrdeq pc, [r0], -r8 │ │ addmi r1, r7, #128, 22 @ 0x20000 │ │ @ instruction: 0xf8d8d842 │ │ ldrtmi r0, [sl], -r4 │ │ ldrtmi r4, [r0], #-1673 @ 0xfffff977 │ │ - blx 99e04e │ │ + blx fee1e04c │ │ mrrcpl 2, 4, pc, ip, cr7 @ │ │ @ instruction: 0x4649443e │ │ ldceq 2, cr15, [r0], #-780 @ 0xfffffcf4 │ │ cdpeq 0, 5, cr15, cr12, cr15, {2} │ │ andvs pc, r8, r8, asr #17 │ │ strmi r4, [r5], #-1016 @ 0xfffffc08 │ │ @ instruction: 0xf1bb19c8 │ │ @ instruction: 0xf1000f75 │ │ tstle r9, r1, lsl #2 │ │ @ instruction: 0xf00a484e │ │ @ instruction: 0xf8d8030f │ │ ldrbtmi r2, [r8], #-0 │ │ andls pc, r3, r0, lsl r8 @ │ │ tstne sl, #323584 @ 0x4f000 │ │ - blne fe4390d8 │ │ + blne fe4390d8 │ │ stmdble r8!, {r0, r2, fp, sp} │ │ ldrdeq pc, [r4], -r8 │ │ andgt pc, r6, r0, asr #16 │ │ @ instruction: 0x36064430 │ │ andls pc, r5, r0, lsl #17 │ │ @ instruction: 0xf8c87107 │ │ ldr r6, [r9, r8]! │ │ @@ -81,68 +81,68 @@ │ │ @ instruction: 0xf8803602 │ │ @ instruction: 0xf8c8b001 │ │ str r6, [r9, r8]! │ │ strmi r2, [r9], r1 │ │ strbmi r9, [r0], -r0 │ │ @ instruction: 0x463a4631 │ │ @ instruction: 0xf0112301 │ │ - @ instruction: 0xf8d8facd │ │ + @ instruction: 0xf8d8fbb1 │ │ strbmi r6, [r9], -r8 │ │ andcs lr, r1, pc, lsr #15 │ │ andls r4, r0, sl, lsl #13 │ │ @ instruction: 0x46404631 │ │ movwcs r2, #4614 @ 0x1206 │ │ ldrbtmi r4, [r3], r6, ror #12 │ │ - blx fefdde6c │ │ + blx fe8dde6e │ │ @ instruction: 0xf8d846b4 │ │ ldrbmi r6, [lr], r8 │ │ @ instruction: 0xe7c54651 │ │ strmi r2, [r9], r1 │ │ ldrtmi r9, [r1], -r0 │ │ andcs r4, r2, #64, 12 @ 0x4000000 │ │ strbtmi r2, [r6], -r1, lsl #6 │ │ @ instruction: 0xf0114677 │ │ - ldrtmi pc, [r4], sp, lsr #21 @ │ │ + ssatmi pc, #21, r1, lsl #23 @ │ │ ldrdvs pc, [r8], -r8 │ │ @ instruction: 0x464946be │ │ cmnlt sp, r5, asr #15 │ │ ldrdeq pc, [r0], -r8 │ │ addmi r1, r5, #128, 22 @ 0x20000 │ │ @ instruction: 0xf8d8d82e │ │ strtmi r0, [sl], -r4 │ │ @ instruction: 0xf0b34430 │ │ - strtmi pc, [lr], #-2734 @ 0xfffff552 │ │ + strtmi pc, [lr], #-2624 @ 0xfffff5c0 │ │ andvs pc, r8, r8, asr #17 │ │ ldrdeq pc, [r0], -r8 │ │ @ instruction: 0xd01642b0 │ │ ldrdeq pc, [r4], -r8 │ │ strpl r2, [r1, #290] @ 0x122 │ │ @ instruction: 0xf8c81c70 │ │ andlt r0, r1, r8 │ │ svchi 0x00f0e8bd │ │ strmi r2, [ip], -r1 │ │ ldrmi r9, [r1], -r0 │ │ andcs r4, r1, #64, 12 @ 0x4000000 │ │ @ instruction: 0xf0112301 │ │ - @ instruction: 0xf8d8fa81 │ │ + @ instruction: 0xf8d8fb65 │ │ strtmi r2, [r1], -r8 │ │ andcs lr, r1, r1, asr #14 │ │ andls r4, r0, r1, lsr r6 │ │ andcs r4, r1, #64, 12 @ 0x4000000 │ │ @ instruction: 0xf0112301 │ │ - @ instruction: 0xf8d8fa75 │ │ + @ instruction: 0xf8d8fb59 │ │ ldrb r6, [sp, r8] │ │ strmi r2, [ip], -r1 │ │ strbmi r9, [r0], -r0 │ │ @ instruction: 0x462a4631 │ │ @ instruction: 0xf0112301 │ │ - @ instruction: 0xf8d8fa69 │ │ + @ instruction: 0xf8d8fb4d │ │ strtmi r6, [r1], -r8 │ │ svclt 0x0000e7c3 │ │ - @ instruction: 0xffff5703 │ │ + @ instruction: 0xffff5702 │ │ @ instruction: 0xffff0c62 │ │ svcmi 0x00f0e92d │ │ strmi fp, [r9], sp, lsl #1 │ │ ldmib r9, {r0, r2, r9, sl, lr}^ │ │ ldmib sp, {r2, r8, r9, sl, sp, pc}^ │ │ ldrbmi r0, [r7, #-278] @ 0xfffffeea │ │ @ instruction: 0xf8d9d21b │ │ @@ -163,48 +163,48 @@ │ │ andcs fp, r1, #-2147483634 @ 0x8000000e │ │ movwcs lr, #2501 @ 0x9c5 │ │ smlabteq r2, r5, r9, lr │ │ pop {r0, r2, r3, ip, sp, pc} │ │ submi r8, r7, #240, 30 @ 0x3c0 │ │ @ instruction: 0x0601eb73 │ │ @ instruction: 0xf0b3d444 │ │ - @ instruction: 0xf041f9cd │ │ + @ instruction: 0xf041f8cd │ │ rsc r4, r7, r0, lsl #2 │ │ strls r3, [r4, #-1793] @ 0xfffff8ff │ │ @ instruction: 0xf8c94557 │ │ subsle r7, sl, #20 │ │ ldcne 6, cr15, [r9], {73} @ 0x49 │ │ @ instruction: 0xf6499203 │ │ - bl fe9e69d0 │ │ + bl fe9e69d0 │ │ strcs r0, [r0], -sl, lsl #22 │ │ ldcne 6, cr15, [r9], {193} @ 0xc1 │ │ addsne pc, r9, #210763776 @ 0xc900000 │ │ cdpeq 0, 0, cr15, cr10, cr15, {2} │ │ and r9, fp, r5, lsl #6 │ │ orreq lr, r1, r1, lsl #22 │ │ cdpcc 7, 0, cr3, cr1, cr1, {0} │ │ andsvc pc, r4, r9, asr #17 │ │ ldrbmi r0, [r7, #-73] @ 0xffffffb7 │ │ smlattmi lr, r0, fp, pc @ │ │ eorsle r4, sl, r0, lsr #12 │ │ andhi pc, r7, r3, lsl r8 @ │ │ ldrteq pc, [r0], #-424 @ 0xfffffe58 @ │ │ stccs 2, cr11, [sl], {228} @ 0xe4 │ │ - bne 59682c │ │ + bne 59682c │ │ streq lr, [r1, #-2940] @ 0xfffff484 │ │ ldrmi sp, [r3], -r8, ror #5 │ │ streq lr, [ip, #-2689] @ 0xfffff57f │ │ addscc pc, r9, #128 @ 0x80 │ │ ldrmi r4, [sl], -sl, lsr #6 │ │ tstle r1, r5, lsl #22 │ │ ldmible sp, {r0, r2, sl, fp, sp}^ │ │ stm sp, {r0, r1, r9, fp, ip, pc} │ │ stmdage r6, {r0, r1, r6} │ │ - @ instruction: 0xf0204649 │ │ - ldrd pc, [r1], r3 @ │ │ + @ instruction: 0xf0214649 │ │ + adc pc, r1, r7, asr r9 @ │ │ ldrtmi r2, [r8], -r2, lsl #4 │ │ stmib r5, {r0, r4, r5, r9, sl, lr}^ │ │ stmib r5, {r8, r9, sp}^ │ │ andlt r0, sp, r2, lsl #2 │ │ svchi 0x00f0e8bd │ │ @ instruction: 0xf0002e00 │ │ stcls 0, cr8, [r4, #-516] @ 0xfffffdfc │ │ @@ -217,74 +217,74 @@ │ │ cmnle r8, r0, lsl #16 │ │ ldrbmi lr, [r7], -r8, lsl #1 │ │ svceq 0x0000f1bb │ │ andcs sp, r5, r3, lsl #2 │ │ ldrtmi lr, [r3], fp, rrx │ │ strtmi r4, [r0], -r4, lsl #12 │ │ @ instruction: 0xf0b39d03 │ │ - ldrbmi pc, [sl], -r1, ror #18 @ │ │ + ldrbmi pc, [sl], -r1, ror #16 @ │ │ svceq 0x0000f1bb │ │ @ instruction: 0xf1cbbf48 │ │ mcrr 2, 0, r0, r1, cr0 │ │ stmdals r5, {r4, r5, r8, r9, fp} │ │ svcvc 0x009af5b2 │ │ strtmi sp, [fp], -r2, lsl #16 │ │ ands r9, r6, r4, lsl #26 │ │ stcls 6, cr4, [r4, #-172] @ 0xffffff54 │ │ - blne f1d7cc │ │ - bleq 105dc28 │ │ - blx 45dc1c │ │ + blne f1d7cc │ │ + bleq 105dc28 │ │ + blx 45dc1c │ │ @ instruction: 0xf1bbd037 │ │ ldcle 15, cr3, [pc], {255} @ 0xff │ │ - bleq fe89db64 │ │ - blvc fe6df4d4 │ │ + bleq fe89db64 │ │ + blvc fe6df4d4 │ │ svclt 0x0048465a │ │ andeq pc, r0, #-1073741774 @ 0xc0000032 │ │ svcvc 0x009af5b2 │ │ ldmdbmi r3!, {r2, r3, r5, r6, r7, fp, ip, lr, pc} │ │ svccc 0x00fff1bb │ │ - bl 73264 │ │ + bl 73264 │ │ ldcl 1, cr0, [r1, #776] @ 0x308 │ │ vldrle d1, [lr, #-0] │ │ - bleq fe89da0c │ │ - blne c5d1d8 │ │ + bleq fe89da0c │ │ + blne c5d1d8 │ │ andmi pc, r0, #34 @ 0x22 │ │ rscmi pc, r0, #130 @ 0x82 │ │ rsbsvs pc, pc, #130 @ 0x82 │ │ tstle r4, r1, lsl r3 │ │ ldrtmi r2, [sl], -lr, lsl #2 │ │ ldrbmi r9, [r1], -sl, lsl #2 │ │ - stc2l 0, cr15, [r0, #-332] @ 0xfffffeb4 │ │ + ldc2l 0, cr15, [r4, #-332]! @ 0xfffffeb4 │ │ strmi r4, [fp], -r2, lsl #12 │ │ ldrmi sl, [r1], -sl, lsl #16 │ │ @ instruction: 0xf053461a │ │ - andls pc, r7, r7, asr #27 │ │ + strdls pc, [r7], -fp │ │ andls r2, r6, r1 │ │ ldmdblt r0!, {r1, r2, fp, ip, pc}^ │ │ cdp 0, 12, cr14, cr0, cr14, {1} │ │ @ instruction: 0xeef10ba1 │ │ andcs r1, r0, r0, ror #22 │ │ svclt 0x00182b00 │ │ - blne 185dc98 │ │ + blne 185dc98 │ │ stcl 0, cr9, [sp, #24] │ │ stmdals r6, {r3, r8, r9, fp, ip} │ │ mrscs fp, LR_irq │ │ stmdals r7, {r0, r1, r9, sp} │ │ smlabtcs r0, r5, r9, lr │ │ andlt r6, sp, r8, lsr #1 │ │ svchi 0x00f0e8bd │ │ andls r2, sl, sp │ │ @ instruction: 0x46181c7a │ │ ldrbmi r4, [r2, #-1617] @ 0xfffff9af │ │ ldrbmi fp, [r2], -r8, lsr #30 │ │ - ldc2 0, cr15, [r2, #-332] @ 0xfffffeb4 │ │ + stc2l 0, cr15, [r6, #-332] @ 0xfffffeb4 │ │ strmi r4, [fp], -r2, lsl #12 │ │ ldrmi sl, [r1], -sl, lsl #16 │ │ @ instruction: 0xf053461a │ │ - mulls r7, r9, sp │ │ + andls pc, r7, sp, asr #27 │ │ andls r2, r6, r1 │ │ stmdals r6, {r2, r8, sl, fp, ip, pc} │ │ bicsle r2, lr, r0, lsl #16 │ │ stmdbls r9, {r3, fp, ip, pc} │ │ movwcs r2, #512 @ 0x200 │ │ movwcs lr, #2501 @ 0x9c5 │ │ smlabteq r2, r5, r9, lr │ │ @@ -298,25 +298,25 @@ │ │ ldrbmi lr, [r4, #-1028]! @ 0xfffffbfc │ │ @ instruction: 0xf8d1d27e │ │ stclne 0, cr12, [r3], #-48 @ 0xffffffd0 │ │ @ instruction: 0xf81c614b │ │ ldccs 0, cr5, [r0, #-16]! │ │ ldrbmi sp, [r3, #-288]! @ 0xfffffee0 │ │ @ instruction: 0xf81cd264 │ │ - blcc c2e17c │ │ + blcc c2e17c │ │ subsle r2, pc, #10240 @ 0x2800 │ │ smlatbcs sp, r2, ip, r1 │ │ ldrbmi r9, [r2, #-258]! @ 0xfffffefe │ │ svclt 0x00284604 │ │ @ instruction: 0x46604672 │ │ @ instruction: 0xf0534671 │ │ - @ instruction: 0x4602fcd1 │ │ + strmi pc, [r2], -r5, lsl #26 │ │ stmdage r2, {r0, r1, r3, r9, sl, lr} │ │ @ instruction: 0x461a4611 │ │ - ldc2l 0, cr15, [r8, #-332] @ 0xfffffeb4 │ │ + stc2 0, cr15, [ip, #332] @ 0x14c │ │ andcs r2, r3, #0, 2 │ │ smlabtcs r0, r4, r9, lr │ │ andlt r6, r6, r0, lsr #1 │ │ @ instruction: 0x87f0e8bd │ │ ldrteq pc, [r1], #-421 @ 0xfffffe5b @ │ │ stccs 2, cr11, [r9], {228} @ 0xe4 │ │ @ instruction: 0xf1a5d274 │ │ @@ -325,31 +325,31 @@ │ │ suble r0, r2, #0, 8 │ │ ldmibne r9, {r0, r3, r6, r9, sl, ip, sp, lr, pc} │ │ stmdaeq sl, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ ldmibne r9, {r0, r6, r7, r9, sl, ip, sp, lr, pc} │ │ and r4, sl, pc, lsr #12 │ │ streq lr, [r4], #2820 @ 0xb04 │ │ cmpvs fp, r1, lsl #6 │ │ - b 13f3854 │ │ - blx ff9e32f2 │ │ + b 13f3854 │ │ + blx ff9e32f2 │ │ strtmi r5, [pc], -r8, lsl #8 │ │ @ instruction: 0xf81cd02f │ │ ldccc 0, cr5, [r0, #-12]! │ │ stccs 2, cr11, [sl, #-948] @ 0xfffffc4c │ │ @ instruction: 0xf1b7d228 │ │ - bl 1d2fc5c │ │ + bl 1d2fc5c │ │ mvnle r0, #9437184 @ 0x900000 │ │ - beq 29cc10 │ │ + beq 29cc10 │ │ ldrcc pc, [r9], r7, lsl #1 │ │ @ instruction: 0x060aea56 │ │ stccs 1, cr13, [r5, #-4] │ │ strmi sp, [r5], -r0, ror #19 │ │ stmib sp, {r1, fp, sp, pc}^ │ │ @ instruction: 0xf0207400 │ │ - stmdals r2, {r0, r1, r6, r7, sl, fp, ip, sp, lr, pc} │ │ + stmdals r2, {r0, r1, r2, r6, r9, sl, fp, ip, sp, lr, pc} │ │ teqle r1, r1, lsl #16 │ │ strtmi r9, [r8], -r3, lsl #18 │ │ andcs r6, r0, #169 @ 0xa9 │ │ stmib r0, {r0, r1, r8, sp}^ │ │ andlt r1, r6, r0, lsl #4 │ │ @ instruction: 0x87f0e8bd │ │ stmib sp, {r8, r9, sp}^ │ │ @@ -360,23 +360,23 @@ │ │ @ instruction: 0xf7ff5400 │ │ andlt pc, r6, fp, asr #28 │ │ @ instruction: 0x87f0e8bd │ │ andcs r6, r5, #13172736 @ 0xc90000 │ │ strmi r9, [r5], -r2, lsl #4 │ │ strmi r4, [r8], -r2, lsr #12 │ │ @ instruction: 0xf0534671 │ │ - strmi pc, [r2], -r3, ror #24 │ │ + @ instruction: 0x4602fc97 │ │ stmdage r2, {r0, r1, r3, r9, sl, lr} │ │ @ instruction: 0x461a4611 │ │ - stc2l 0, cr15, [sl], #332 @ 0x14c │ │ + ldc2 0, cr15, [lr, #-332] @ 0xfffffeb4 │ │ andcs r2, r3, #0, 2 │ │ smlabtcs r0, r5, r9, lr │ │ andlt r6, r6, r8, lsr #1 │ │ @ instruction: 0x87f0e8bd │ │ - bleq 15d9fc │ │ + bleq 15d9fc │ │ tstcs r0, r8, lsr #12 │ │ stcl 2, cr2, [r5] │ │ stmib r0, {r1, r8, r9, fp}^ │ │ andlt r1, r6, r0, lsl #4 │ │ @ instruction: 0x87f0e8bd │ │ strmi r2, [r4], -sp, lsl #2 │ │ strbtmi r9, [r0], -r2, lsl #2 │ │ @@ -399,43 +399,43 @@ │ │ @ instruction: 0xf04fe001 │ │ ldrbmi r0, [r2, #-3073] @ 0xfffff3ff │ │ addhi pc, r9, r0, lsl #1 │ │ ldrdlt pc, [ip], -r4 │ │ cmnvs r7, r7, asr ip │ │ andcc pc, r2, fp, lsl r8 @ │ │ eorseq pc, r0, #-1073741784 @ 0xc0000028 │ │ - bcs 2cee4c │ │ + bcs 2cee4c │ │ addshi pc, r0, r0, lsl #1 │ │ eorle r4, r8, #364904448 @ 0x15c00000 │ │ bicmi pc, fp, #76, 12 @ 0x4c00000 │ │ bicmi pc, ip, #192, 12 @ 0xc000000 │ │ - bl da32c │ │ + bl da32c │ │ ldrmi r0, [sl, #642]! @ 0x282 │ │ subeq lr, r2, #5120 @ 0x1400 │ │ @ instruction: 0xf81bd01c │ │ ldccc 0, cr5, [r0, #-28]! @ 0xffffffe4 │ │ stccs 2, cr11, [sl, #-948] @ 0xfffffc4c │ │ smladcc r1, r7, r2, sp │ │ @ instruction: 0x6167429a │ │ mrrcne 13, 14, sp, lr, cr15 │ │ @ instruction: 0xd10142b2 │ │ stmible sl!, {r0, r1, r2, r8, sl, fp, sp}^ │ │ @ instruction: 0xf8cd4308 │ │ - blx fec52408 │ │ + blx fec52408 │ │ strtmi pc, [r1], -r0, lsl #1 │ │ stmdbeq r3, {r1, r6, r9, sl, lr}^ │ │ andlt r4, r3, r8, asr #12 │ │ svcmi 0x00f0e8bd │ │ - stcllt 0, cr15, [ip, #128] @ 0x80 │ │ - blx fe0b3cbc │ │ + svclt 0x0050f020 │ │ + blx fe0b3cbc │ │ @ instruction: 0xf1bcf4ae │ │ svclt 0x00180f00 │ │ vst3.32 {d15[1],d16[1],d17[1]}, [lr], r2 │ │ - @ instruction: 0xffbef0b2 │ │ - bleq c5d478 │ │ + mrc2 0, 5, pc, cr14, cr2, {5} │ │ + bleq c5d478 │ │ strtmi r2, [r2], -r0, lsl #24 │ │ rsbmi fp, r2, #72, 30 @ 0x120 │ │ svcvc 0x009af5b2 │ │ @ instruction: 0xeddfd913 │ │ @ instruction: 0xeef51b2a │ │ vneg.f64 d16, d0 │ │ eorle pc, r9, r0, lsl sl @ │ │ @@ -443,48 +443,61 @@ │ │ mcr 12, 6, sp, cr0, cr14, {0} │ │ @ instruction: 0xf5140ba1 │ │ @ instruction: 0x4622749a │ │ rsbmi fp, r2, #72, 30 @ 0x120 │ │ svcvc 0x009af5b2 │ │ stmdami r2!, {r0, r2, r3, r5, r6, r7, fp, ip, lr, pc} │ │ svccc 0x00fff1b4 │ │ - bl 33594 │ │ + bl 33594 │ │ ldcl 0, cr0, [r0, #776] @ 0x308 │ │ vldrle d1, [r1, #-0] │ │ - bleq fe89dd40 │ │ - bleq c5d508 │ │ + bleq fe89dd40 │ │ + bleq c5d508 │ │ tstpmi r0, r1, lsr #32 @ p-variant is OBSOLETE │ │ mvnmi pc, r1, lsl #1 │ │ cmnpvs pc, r1, lsl #1 @ p-variant is OBSOLETE │ │ tstle r7, r8, lsl #6 │ │ andls r2, r0, lr │ │ @ instruction: 0x46514658 │ │ ands r4, r4, sl, lsr r6 │ │ - bleq fe89dee4 │ │ - blne 185dfac │ │ + bleq fe89dee4 │ │ + blne 185dfac │ │ @ instruction: 0xf1b82000 │ │ svclt 0x00180f00 │ │ - blne 185dfb4 │ │ + blne 185dfb4 │ │ andeq pc, r0, r9, asr #17 │ │ - blne ddb20 │ │ + blne ddb20 │ │ pop {r0, r1, ip, sp, pc} │ │ strdcs r8, [r5, -r0] │ │ smlattls r0, r0, r8, r6 │ │ @ instruction: 0xf0534651 │ │ - strmi pc, [r2], -pc, lsl #23 │ │ + strmi pc, [r2], -r3, asr #23 │ │ ldrmi r4, [r1], -fp, lsl #12 │ │ ldrmi r4, [sl], -r8, ror #12 │ │ - ldc2 0, cr15, [r6], {83} @ 0x53 │ │ + mcrr2 0, 5, pc, sl, cr3 @ │ │ stmib r9, {r0, r8, sp}^ │ │ andlt r1, r3, r0 │ │ svchi 0x00f0e8bd │ │ ldrb r2, [r4, sp] │ │ strbhi ip, [fp, #2208]! @ 0x8a0 │ │ svcvc 0x00e1ccf3 │ │ @ instruction: 0xffff51a0 │ │ + bcs 3c744 │ │ + @ instruction: 0x4770bf18 │ │ + ldmib r1, {r4, r5, r7, r8, sl, ip, sp, pc}^ │ │ + strmi ip, [r4], -r3, lsl #6 │ │ + ldrmi r6, [r9], -sl, asr #18 │ │ + @ instruction: 0xf0534660 │ │ + strmi pc, [r2], -r1, lsr #23 │ │ + ldrmi r4, [r1], -fp, lsl #12 │ │ + ldrmi r4, [sl], -r0, lsr #12 │ │ + stc2 0, cr15, [r8], #-332 @ 0xfffffeb4 │ │ + strtmi r4, [r0], -r5, lsl #12 │ │ + ldmib r6!, {r1, r2, r4, r5, r7, ip, sp, lr, pc} │ │ + ldclt 6, cr4, [r0, #160]! @ 0xa0 │ │ svcmi 0x00f0e92d │ │ @ instruction: 0x460db0b7 │ │ @ instruction: 0xf8554683 │ │ strmi r0, [fp], -ip, lsl #30 │ │ @ instruction: 0x1601e9d5 │ │ eorsle r4, r0, #-536870904 @ 0xe0000008 │ │ @ instruction: 0xf1a25d82 │ │ @@ -506,15 +519,15 @@ │ │ @ instruction: 0x01ae0185 │ │ @ instruction: 0x01ae01ae │ │ @ instruction: 0x01ae01ae │ │ @ instruction: 0x01ae01ae │ │ @ instruction: 0x01ae01ae │ │ orrseq r0, sl, lr, lsr #3 │ │ cmpvs lr, r1, lsl #12 │ │ - strhle r4, [pc, #33] @ 224d1 │ │ + strhle r4, [pc, #33] @ 22505 │ │ andcs r4, r5, #14680064 @ 0xe00000 │ │ ldclne 2, cr9, [r2], #-128 @ 0xffffff80 │ │ svclt 0x0028428a │ │ movw r4, #38410 @ 0x960a │ │ ldrbeq pc, [fp, -r2, lsr #3] @ │ │ vmax.f32 d2, d0, d16 │ │ ldm pc, {r3, r4, r5, r6, r8, pc}^ @ │ │ @@ -531,15 +544,15 @@ │ │ cmneq r6, fp, lsl #2 │ │ cmneq r6, r6, ror r1 │ │ cmneq r6, r6, ror r1 │ │ ldrheq r0, [r6, #-10]! │ │ cmneq r6, r6, ror r1 │ │ cmneq r6, r6, ror r1 │ │ @ instruction: 0x012e0176 │ │ - bcc 81d7c │ │ + bcc 81db0 │ │ @ instruction: 0x0612761a │ │ ldrhi pc, [r2], #-0 │ │ @ instruction: 0x26001c72 │ │ addmi r2, sl, #8, 14 @ 0x200000 │ │ @ instruction: 0x9632615a │ │ ldrvs lr, [r0, -sp, asr #19]! │ │ @ instruction: 0xf0809303 │ │ @@ -557,24 +570,24 @@ │ │ stmdale r9, {r0, r1, r2, r4, r8, r9, sl, fp, sp} │ │ @ instruction: 0xf707fa08 │ │ svceq 0x0009ea17 │ │ andcc sp, r1, #4 │ │ addsmi r6, r1, #-2147483626 @ 0x80000016 │ │ ands sp, lr, #1073741884 @ 0x4000003c │ │ @ instruction: 0xf0002c5d │ │ - b 1802a5c │ │ + b 1802a90 │ │ tstle r9, ip, asr #15 │ │ @ instruction: 0xf0402c2c │ │ andcc r8, r1, #1124073472 @ 0x43000000 │ │ addmi r6, sl, #-2147483626 @ 0x80000016 │ │ @ instruction: 0x83bbf080 │ │ @ instruction: 0xf1a75c87 │ │ ldccs 4, cr0, [r7], {9} │ │ - blx 2585c0 │ │ - b 55f5b0 │ │ + blx 2585f4 │ │ + b 55f5e4 │ │ andle r0, r4, r9, lsl #30 │ │ cmpvs sl, r1, lsl #4 │ │ @ instruction: 0xd1f14291 │ │ svccs 0x005de3aa │ │ strthi pc, [lr], #-0 │ │ @ instruction: 0x46194670 │ │ @ instruction: 0xff3ef7ff │ │ @@ -587,33 +600,33 @@ │ │ ldrdge pc, [r4], sp │ │ @ instruction: 0xc000f8b0 │ │ ldmdals r0!, {r0, r7, fp, ip, sp, lr} │ │ adcsne pc, lr, sp, lsl #17 │ │ addmi sl, r6, #688128 @ 0xa8000 │ │ adcsgt pc, ip, sp, lsr #17 │ │ andsmi lr, ip, r1, lsl #17 │ │ - blls d6678 │ │ + blls d66ac │ │ subeq lr, r6, r6, lsl #22 │ │ @ instruction: 0xf10d3601 │ │ @ instruction: 0xf04f0e80 │ │ @ instruction: 0xf8030c00 │ │ - bl fe6c8 │ │ + bl fe6fc │ │ svcge 0x002a00c0 │ │ ldrhtne pc, [ip], sp @ │ │ umlalscs pc, lr, sp, r8 @ │ │ andge pc, r4, r0, asr #17 │ │ @ instruction: 0xf8a070c2 │ │ andcc r1, r8, r1 │ │ @ instruction: 0xf8ddcf8e │ │ addgt sl, lr, r0 │ │ ldrtls r9, [r2], -r3, lsl #22 │ │ andne lr, r4, #3457024 @ 0x34c000 │ │ orrle r4, pc, #-1610612728 @ 0xa0000008 │ │ ldmdage r0!, {r1, r7, r8, r9, sp, lr, pc} │ │ - stc2l 0, cr15, [r2, #-332]! @ 0xfffffeb4 │ │ + ldc2l 0, cr15, [ip, #-332]! @ 0xfffffeb4 │ │ andls r9, r2, r1, lsr r8 │ │ ldclne 7, cr14, [r2], #-860 @ 0xfffffca4 │ │ cmpvs sl, pc, lsl #12 │ │ svclt 0x0088428a │ │ @ instruction: 0xf0804617 │ │ stcpl 2, cr8, [r5], {61} @ 0x3d │ │ ldrhvs r1, [sl, #-194] @ 0xffffff3e │ │ @@ -624,15 +637,15 @@ │ │ ldclcs 1, cr6, [r5, #-360]! @ 0xfffffe98 │ │ movthi pc, #28736 @ 0x7040 @ │ │ @ instruction: 0xf00042ba │ │ stcpl 2, cr8, [r7], {44} @ 0x2c │ │ cmpvs sl, r2, lsr sp │ │ @ instruction: 0xf0402f65 │ │ tstcs r1, lr, lsr r3 │ │ - beq 9e7c4 │ │ + beq 9e7f8 │ │ ldclne 2, cr14, [r2], #-308 @ 0xfffffecc │ │ cmpvs sl, pc, lsl #12 │ │ svclt 0x0088428a │ │ @ instruction: 0xf0804617 │ │ stcpl 2, cr8, [r5], {25} │ │ ldrhvs r1, [sl, #-194] @ 0xffffff3e │ │ @ instruction: 0xf0402d61 │ │ @@ -646,15 +659,15 @@ │ │ cmpvs sl, r2, lsr sp │ │ @ instruction: 0xf0402d73 │ │ adcsmi r8, sl, #1744830464 @ 0x68000000 │ │ mvnshi pc, r0 │ │ ldclne 12, cr5, [r2, #-540]! @ 0xfffffde4 │ │ svccs 0x0065615a │ │ tstphi r1, #64 @ p-variant is OBSOLETE @ 0x40 │ │ - beq 9e81c │ │ + beq 9e850 │ │ eor r2, r0, #0, 2 │ │ @ instruction: 0x460f1c72 │ │ addmi r6, sl, #-2147483626 @ 0x80000016 │ │ ldrmi fp, [r7], -r8, lsl #31 │ │ mvnhi pc, r0, lsl #1 │ │ ldcne 12, cr5, [r2], #532 @ 0x214 │ │ ldclcs 1, cr6, [r5, #-360]! @ 0xfffffe98 │ │ @@ -664,110 +677,110 @@ │ │ ldrshvs r1, [sl, #-194] @ 0xffffff3e │ │ @ instruction: 0xf0402d6c │ │ adcsmi r8, sl, #1610612751 @ 0x6000000f │ │ bicshi pc, fp, r0 │ │ ldcne 12, cr5, [r2, #-540]! @ 0xfffffde4 │ │ svccs 0x006c615a │ │ rschi pc, sp, #64 @ 0x40 │ │ - beq 5e864 │ │ + beq 5e898 │ │ mrcvc 1, 0, lr, cr10, cr13, {7} │ │ ldrvc r3, [sl], -r1, lsl #20 │ │ @ instruction: 0xf0000612 │ │ ldclne 3, cr8, [r0], #-20 @ 0xffffffec │ │ stmibeq r0, {r0, r2, r3, r8, ip, sp, lr, pc} │ │ andcs r6, r1, r8, asr r1 │ │ @ instruction: 0xf88da90a │ │ strbmi r0, [r8], -ip, lsr #32 │ │ movwls r9, #41731 @ 0xa303 │ │ - blx 165e840 │ │ + @ instruction: 0xf86af012 │ │ umulleq pc, r0, sp, r8 @ │ │ cmple r0, r1, lsl #16 │ │ @ instruction: 0xf04f9f21 │ │ - blls e4f78 │ │ + blls e4fac │ │ andsge pc, r0, sp, lsl #17 │ │ adc r9, r2, r5, lsl #14 │ │ strtmi r2, [r9], -r0 │ │ ldclne 0, cr6, [r0], #-608 @ 0xfffffda0 │ │ stmdage r0!, {r3, r4, r6, r8, sp, lr} │ │ @ instruction: 0xf054461a │ │ - ldmib sp, {r0, r1, r2, r3, r5, fp, ip, sp, lr, pc}^ │ │ + ldmib sp, {r0, r3, r6, fp, ip, sp, lr, pc}^ │ │ stmdacs r2, {r5, r9, sl} │ │ andcs sp, r6, r0, ror #2 │ │ andvs pc, r4, fp, asr #17 │ │ andeq pc, r0, fp, lsl #17 │ │ pop {r0, r1, r2, r4, r5, ip, sp, pc} │ │ ldclne 15, cr8, [r0], #-960 @ 0xfffffc40 │ │ ldmdage r0!, {r3, r4, r6, r8, sp, lr} │ │ andcs r4, r0, #26214400 @ 0x1900000 │ │ - ldc2l 7, cr15, [r4], {255} @ 0xff │ │ + ldc2 7, cr15, [sl], #1020 @ 0x3fc │ │ teqeq r0, sp @ │ │ andeq pc, r3, #128 @ 0x80 │ │ andsle r4, r5, r1, lsl r3 │ │ @ instruction: 0x5732e9dd │ │ rsble r2, r5, r0, lsl #16 │ │ rsble r2, r1, r1, lsl #16 │ │ - bcc c5a978 │ │ + bcc c5a9ac │ │ @ instruction: 0xf0802a0a │ │ ldmdage r0!, {r1, r6, r7, r9, pc} │ │ andcs r4, r1, #26214400 @ 0x1900000 │ │ - ldc2 7, cr15, [lr], #1020 @ 0x3fc │ │ + stc2 7, cr15, [r4], #1020 @ 0x3fc │ │ teqeq r0, sp @ │ │ andeq pc, r3, #128 @ 0x80 │ │ cmple fp, r1, lsl r3 │ │ @ instruction: 0xf8cb9832 │ │ andcs r0, r6, r4 │ │ andeq pc, r0, fp, lsl #17 │ │ pop {r0, r1, r2, r4, r5, ip, sp, pc} │ │ ldmib sp, {r4, r5, r6, r7, r8, r9, sl, fp, pc}^ │ │ @ instruction: 0xf04f8430 │ │ @ instruction: 0xf8dd0a04 │ │ strcs r9, [r0], -r8, asr #1 │ │ @ instruction: 0xf89de102 │ │ stmdacs r1, {r0, r7} │ │ - bls 2d6d38 │ │ + bls 2d6d6c │ │ ldmdbvs r0, {r8, sp}^ │ │ @ instruction: 0xf1026091 │ │ andcc r0, r1, ip, lsl #2 │ │ stmdage r0!, {r4, r6, r8, sp, lr} │ │ - @ instruction: 0xffe0f053 │ │ + @ instruction: 0xfffaf053 │ │ @ instruction: 0x0720e9dd │ │ addsle r2, ip, r2, lsl #16 │ │ strbeq r9, [r0, r2, lsr #28] │ │ svccc 0x00fff1b6 │ │ sbchi pc, r1, r0, asr #6 │ │ @ instruction: 0xf0002e00 │ │ @ instruction: 0x4630819a │ │ @ instruction: 0xf01f2101 │ │ - stmdacs r0, {r0, r1, r4, r5, r6, fp, ip, sp, lr, pc} │ │ + stmdacs r0, {r0, r2, r3, r4, r6, r7, r8, fp, ip, sp, lr, pc} │ │ rscshi pc, r4, #0 │ │ orrs r4, r2, r0, lsl #13 │ │ ldrdls pc, [r8], sp │ │ @ instruction: 0xf00007c0 │ │ @ instruction: 0xf1b980ac │ │ vmaxnm.f32 , q8, │ │ @ instruction: 0xf1b980ac │ │ @ instruction: 0xf0000f00 │ │ @ instruction: 0x4648815b │ │ @ instruction: 0xf01f2101 │ │ - stmdacs r0, {r0, r2, r3, r4, r6, fp, ip, sp, lr, pc} │ │ + stmdacs r0, {r0, r1, r2, r6, r7, r8, fp, ip, sp, lr, pc} │ │ sbcshi pc, sl, #0 │ │ cmp r2, r4, lsl #12 │ │ @ instruction: 0x5732e9dd │ │ andsle r2, r0, r2, lsl #16 │ │ tstle r1, r1, lsl #16 │ │ cmp r0, r0, lsl #8 │ │ mvnsvc pc, pc, asr #12 │ │ andmi pc, r0, r7, lsr #32 │ │ - beq 5e9c8 │ │ + beq 5e9fc │ │ mvnvc pc, r7, asr #13 │ │ vhsub.u8 d20, d16, d8 │ │ strcs r8, [r3], #-304 @ 0xfffffed0 │ │ svceq 0x00fce135 │ │ andcs lr, r0, r1, lsr r1 │ │ - beq 19e9e0 │ │ + beq 19ea14 │ │ andls r9, r5, r7 │ │ andsge pc, r0, sp, lsl #17 │ │ vnmlsvc.f64 d9, d8, d3 │ │ andeq pc, ip, #-1073741824 @ 0xc0000000 │ │ ldrvc r3, [r8], -r1 │ │ addmi ip, sl, #28672 @ 0x7000 │ │ stcpl 2, cr13, [r4], {47} @ 0x2f │ │ @@ -794,67 +807,67 @@ │ │ addseq r0, lr, #128, 4 │ │ cmpvs sl, r1, lsl #4 │ │ @ instruction: 0xd1d04291 │ │ movwcs r4, #13834 @ 0x360a │ │ teqls r0, #268435456 @ 0x10000000 │ │ svclt 0x0028428a │ │ @ instruction: 0xf053460a │ │ - @ instruction: 0x4602f8ff │ │ + @ instruction: 0x4602f919 │ │ ldmdage r0!, {r0, r1, r3, r9, sl, lr} │ │ @ instruction: 0x461a4611 │ │ - @ instruction: 0xf986f053 │ │ + @ instruction: 0xf9a0f053 │ │ stmdage r4, {r7, r9, sl, lr} │ │ ldm r0, {r0, r3, r6, r9, sl, lr} │ │ ldrshgt r0, [ip, #12]! │ │ umulleq pc, r0, sp, r8 @ │ │ addshi pc, r8, sp, asr #17 │ │ @ instruction: 0xf0402806 │ │ @ instruction: 0xf10980fe │ │ @ instruction: 0xf8dd0018 │ │ @ instruction: 0xf0358084 │ │ - rscs pc, r9, r9, lsr fp @ │ │ + rscs pc, r9, r7, lsr #24 │ │ @ instruction: 0xf0402c7d │ │ mrrcne 2, 3, r8, r0, cr1 │ │ stmdage r4, {r3, r4, r6, r8, sp, lr} │ │ smlalseq lr, r6, r0, r8 │ │ rscseq lr, r6, r9, lsl #17 │ │ umulleq pc, r0, sp, r8 @ │ │ tstle r4, r6, lsl #16 │ │ ldrdhi pc, [r4], sp │ │ - beq 1deac4 │ │ + beq 1deaf8 │ │ svcls 0x0009e098 │ │ strls lr, [r7, #-2525] @ 0xfffff623 │ │ strhi lr, [r5], #-2525 @ 0xfffff623 │ │ @ instruction: 0x0012f8bd │ │ mulsne r1, sp, r8 │ │ svceq 0x0006f1ba │ │ sbchi pc, r1, r0, asr #32 │ │ @ instruction: 0xf1b9e08d │ │ vmaxnm.f32 , q8, │ │ @ instruction: 0xf01b80af │ │ - strmi pc, [sl], -r7, asr #22 │ │ + @ instruction: 0x460afcb1 │ │ andcc r2, r1, #134217728 @ 0x8000000 │ │ addmi r9, sl, #32, 6 @ 0x80000000 │ │ strmi fp, [sl], -r8, lsr #30 │ │ - @ instruction: 0xf8b4f053 │ │ + @ instruction: 0xf8cef053 │ │ strmi r4, [fp], -r2, lsl #12 │ │ ldrmi sl, [r1], -r0, lsr #16 │ │ @ instruction: 0xf053461a │ │ - @ instruction: 0x4680f93b │ │ + pkhtbmi pc, r0, r5, asr #18 @ │ │ teqlt r6, r1, lsr sp │ │ ldrtmi r4, [r8], -pc, lsr #12 │ │ - @ instruction: 0xf962f00f │ │ + @ instruction: 0xf9aef00f │ │ mcrcc 7, 0, r3, cr1, cr8, {0} │ │ ldmdals r0!, {r0, r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ svclt 0x001c2800 │ │ @ instruction: 0xf0b54628 │ │ - blls 11e59c │ │ - beq 1deb34 │ │ + blls 11e588 │ │ + beq 1deb68 │ │ @ instruction: 0xf1032601 │ │ - bgt 1e3230 │ │ + bgt 1e3264 │ │ addmi r7, sl, #496 @ 0x1f0 │ │ streq pc, [r1, -r7, lsl #2] │ │ eorle r7, pc, #32505856 @ 0x1f00000 │ │ @ instruction: 0xf1a75c87 │ │ stccs 5, cr0, [r3, #-36]! @ 0xffffffdc │ │ ldm pc, {r1, r3, r6, fp, ip, lr, pc}^ @ │ │ eoreq pc, r4, r5, lsl r0 @ │ │ @@ -877,134 +890,134 @@ │ │ andeq r0, r1, #268435456 @ 0x10000000 │ │ andcc r0, r1, #-1073741770 @ 0xc0000036 │ │ addsmi r6, r1, #-2147483626 @ 0x80000016 │ │ @ instruction: 0x460ad1d0 │ │ andcc r2, r1, #134217728 @ 0x8000000 │ │ addmi r9, sl, #32, 6 @ 0x80000000 │ │ strmi fp, [sl], -r8, lsr #30 │ │ - @ instruction: 0xf858f053 │ │ + @ instruction: 0xf872f053 │ │ strmi r4, [fp], -r2, lsl #12 │ │ ldrmi sl, [r1], -r0, lsr #16 │ │ @ instruction: 0xf053461a │ │ - @ instruction: 0x4605f8df │ │ + @ instruction: 0x4605f8f9 │ │ stmdage r0!, {r1, r2, r5, ip, pc} │ │ stmib sp, {r9, sl, fp, sp}^ │ │ @ instruction: 0xf88d8421 │ │ @ instruction: 0xf8cda080 │ │ subsle r9, r1, ip, lsl #1 │ │ @ instruction: 0xf0353018 │ │ - @ instruction: 0xf04ffa97 │ │ + @ instruction: 0xf04ffb85 │ │ subs r0, r0, r6, lsl #20 │ │ @ instruction: 0xf0402f5d │ │ mrrcne 1, 11, r8, r0, cr5 │ │ tstlt lr, r8, asr r1 │ │ - beq 1debf8 │ │ + beq 1dec2c │ │ svceq 0x0006f1ba │ │ @ instruction: 0x4640d131 │ │ - @ instruction: 0xf0394619 │ │ - pkhtb pc, r6, r2, asr #25 @ │ │ + @ instruction: 0xf7ff4619 │ │ + pkhbt pc, r6, sp, lsl #25 @ │ │ andcs r4, r5, #24117248 @ 0x1700000 │ │ ldrtmi r9, [sl], -r0, lsr #4 │ │ - @ instruction: 0xf82af053 │ │ + @ instruction: 0xf844f053 │ │ strmi r4, [fp], -r2, lsl #12 │ │ ldrmi sl, [r1], -r0, lsr #16 │ │ @ instruction: 0xf053461a │ │ - @ instruction: 0x2106f8b1 │ │ + smlabtcs r6, fp, r8, pc @ │ │ andeq pc, r4, fp, asr #17 │ │ andne pc, r0, fp, lsl #17 │ │ pop {r0, r1, r2, r4, r5, ip, sp, pc} │ │ stmdage r0!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ addge pc, r0, sp, lsl #17 │ │ - @ instruction: 0xf8d2f00f │ │ + @ instruction: 0xf91ef00f │ │ @ instruction: 0xf04f2402 │ │ @ instruction: 0xf04f0a02 │ │ and r0, ip, r0, lsl #18 │ │ svceq 0x0000f1b9 │ │ mcrge 4, 5, pc, cr5, cr15, {3} @ │ │ strtmi r2, [r0], -r1, lsl #8 │ │ @ instruction: 0x464a4631 │ │ - mrrc2 0, 11, pc, r5, cr2 @ │ │ - beq 11ec60 │ │ + blx ff39ee1e │ │ + beq 11ec94 │ │ @ instruction: 0xf8ab46c8 │ │ @ instruction: 0xf88b0002 │ │ @ instruction: 0xf88b1001 │ │ stmib fp, {sp, pc}^ │ │ stmib fp, {r0, sl, pc}^ │ │ @ instruction: 0xf8cb9503 │ │ eorslt r7, r7, r4, lsl r0 │ │ svchi 0x00f0e8bd │ │ - @ instruction: 0xf8aef00f │ │ - beq 1dec88 │ │ - blls f45f0 │ │ + @ instruction: 0xf8faf00f │ │ + beq 1decbc │ │ + blls f4624 │ │ stmdage r0!, {r2, r4, r5, r7, r8, r9, sl, sp, lr, pc} │ │ - @ instruction: 0xf8a6f00f │ │ - beq 1dec98 │ │ + @ instruction: 0xf8f2f00f │ │ + beq 1deccc │ │ @ instruction: 0xf1ba9b03 │ │ mvnle r0, r6, lsl #30 │ │ @ instruction: 0xf04fe7ad │ │ strbmi r0, [r0], -r1, lsl #16 │ │ @ instruction: 0x46324639 │ │ - stc2 0, cr15, [fp], #-712 @ 0xfffffd38 │ │ + blx fe91ee72 │ │ stmdbge sl, {sp} │ │ andls r9, ip, lr │ │ ldrtls sl, [r2], -r4, lsl #16 │ │ ldmdavs r0!, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc} │ │ - stc2 0, cr15, [r4, #68] @ 0x44 │ │ + mcr2 0, 7, pc, cr14, cr1, {0} @ │ │ mulseq r0, sp, r8 │ │ tstle r5, r6, lsl #16 │ │ svclt 0x001c2e00 │ │ @ instruction: 0xf0b54640 │ │ - bls 35e3f4 │ │ - bcs 2aba0 │ │ + bls 35e3e0 │ │ + bcs 2abd4 │ │ addshi pc, ip, r0 │ │ ldceq 1, cr15, [r4], {13} │ │ ldrdcc lr, [sp, -sp] │ │ andeq lr, sp, ip, lsl #17 │ │ stceq 1, cr15, [r4], {13} │ │ andeq lr, sp, ip, lsl #17 │ │ adds r2, r0, r1 │ │ stmdbge ip, {r5, r8, r9, sl, fp, sp, pc} │ │ - blge 14d484 │ │ + blge 14d4b8 │ │ @ instruction: 0xf00f4638 │ │ - @ instruction: 0xf89dff01 │ │ + @ instruction: 0xf89dff4f │ │ stmdacs r6, {r7} │ │ @ instruction: 0xf10dbf1c │ │ @ instruction: 0xf00f0080 │ │ - ldmdage r0, {r0, r2, r5, r6, fp, ip, sp, lr, pc} │ │ - beq a5f014 │ │ + ldmdage r0, {r0, r4, r5, r7, fp, ip, sp, lr, pc} │ │ + beq a5f048 │ │ andls r3, r2, r4 │ │ andls r1, r1, r8, lsr sp │ │ @ instruction: 0x46514638 │ │ - @ instruction: 0xf03c2400 │ │ - @ instruction: 0xf89df807 │ │ + @ instruction: 0xf0112400 │ │ + @ instruction: 0xf89dfe19 │ │ stmdacs r1, {r7} │ │ addhi pc, r7, r0 │ │ umulleq pc, r1, sp, r8 @ │ │ @ instruction: 0xf0402801 │ │ stcls 0, cr8, [sl, #-528] @ 0xfffffdf0 │ │ tstpeq ip, r5, lsl #2 @ p-variant is OBSOLETE │ │ strtmi r6, [sl], -r8, ror #18 │ │ andcc r6, r1, ip, lsr #1 │ │ ldrtmi r6, [r8], -r8, ror #2 │ │ - ldc2l 0, cr15, [lr, #332] @ 0x14c │ │ + ldc2l 0, cr15, [r8, #332]! @ 0x14c │ │ strteq lr, [r0], #-2525 @ 0xfffff623 │ │ @ instruction: 0xf0002802 │ │ @ instruction: 0xf8dd80ad │ │ strbeq r8, [r0, r8, lsl #1] │ │ svccc 0x00fff1b8 │ │ mrcge 7, 5, APSR_nzcv, cr13, cr15, {3} │ │ svceq 0x0000f1b8 │ │ strbmi sp, [r0], -r5 │ │ @ instruction: 0xf01e2101 │ │ - stmdblt r8, {r0, r1, r2, r3, r5, r6, r9, sl, fp, ip, sp, lr, pc} │ │ + stmdblt r8, {r0, r3, r4, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ strdcs lr, [r1], -r4 │ │ strbmi r4, [r2], -r1, lsr #12 │ │ @ instruction: 0xf0b29000 │ │ - @ instruction: 0x4628fbbc │ │ - blx fe45ed48 │ │ + @ instruction: 0x4628fb34 │ │ + blx ffbded7c │ │ @ instruction: 0xf0402800 │ │ ldrtmi r8, [r8], -r8, lsl #1 │ │ @ instruction: 0xf7ff4629 │ │ @ instruction: 0xf89dfbe9 │ │ stmdacs r6, {r7} │ │ addhi pc, r1, r0 │ │ ldcge 6, cr4, [r0, #-752]! @ 0xfffffd10 │ │ @@ -1013,45 +1026,45 @@ │ │ @ instruction: 0x4629c1dd │ │ ldrdgt pc, [r4], -sp │ │ smullseq lr, sp, r1, r8 │ │ stm ip, {r4, r8, fp, sp, pc} │ │ @ instruction: 0x467000dd │ │ orrgt ip, ip, ip, lsl #17 │ │ smulleq lr, ip, r0, r8 │ │ - blge 6d33cc │ │ + blge 6d3400 │ │ ldrmi r9, [ip], r0, lsl #16 │ │ @ instruction: 0xf8cd9902 │ │ stmib sp, {r2, r5, r6, pc}^ │ │ ldm r1, {r0, r1, r2, r4, pc} │ │ stmdbge ip, {r0, r2, r4, r5, r6, r7} │ │ rscseq lr, r5, ip, lsl #17 │ │ @ instruction: 0x4670aa17 │ │ @ instruction: 0xf00f4677 │ │ - @ instruction: 0xf89dfe87 │ │ + @ instruction: 0xf89dfed5 │ │ stmdacs r6, {r7} │ │ @ instruction: 0x4638d090 │ │ - @ instruction: 0xffecf00e │ │ + @ instruction: 0xf838f00f │ │ @ instruction: 0xf8dde78c │ │ ldcls 0, cr8, [r1, #-528]! @ 0xfffffdf0 │ │ @ instruction: 0xf47f2e00 │ │ @ instruction: 0xe684ae7f │ │ cdpge 1, 3, cr2, cr0, cr0, {0} │ │ @ instruction: 0x9128af20 │ │ eorls r9, r0, r4, lsr #32 │ │ @ instruction: 0x46394630 │ │ - @ instruction: 0xf8d6f02b │ │ + blx 1b5ed64 │ │ stmdacs r0, {r4, r5, fp, ip, pc} │ │ ldmdbls r2!, {r0, r1, r2, r5, r6, ip, lr, pc} │ │ - blx 65ed3c │ │ + blx ff8ded70 │ │ movwcs lr, #38900 @ 0x97f4 │ │ strbt r9, [r7], r0, lsr #6 │ │ movwcs r4, #22026 @ 0x560a │ │ stcls 6, cr14, [r1], #-340 @ 0xfffffeac │ │ - bge 35adf0 │ │ - beq 19ee50 │ │ + bge 35ae24 │ │ + beq 19ee84 │ │ andsge pc, r0, sp, lsl #17 │ │ @ instruction: 0xf8cdca07 │ │ @ instruction: 0xf8cd208b │ │ stmdbls r2!, {r0, r1, r2, r7, ip} │ │ addeq pc, r3, sp, asr #17 │ │ ldrdcc lr, [r0], -sp @ │ │ @ instruction: 0xf8cd9207 │ │ @@ -1060,44 +1073,44 @@ │ │ ldr r1, [r7, #25]! │ │ ldrt r6, [r9], -r8, lsr #16 │ │ @ instruction: 0xf7ff2218 │ │ andcs fp, sl, #187392 @ 0x2dc00 │ │ eorls r4, r0, #30408704 @ 0x1d00000 │ │ addmi r1, sl, #29184 @ 0x7200 │ │ strmi fp, [sl], -r8, lsr #30 │ │ - mcr2 0, 7, pc, cr10, cr2, {2} @ │ │ + @ instruction: 0xff04f052 │ │ strmi r4, [fp], -r2, lsl #12 │ │ ldrmi sl, [r1], -r0, lsr #16 │ │ @ instruction: 0xf052461a │ │ - qsub16mi pc, r9, r1 @ │ │ - blx fe09ee52 │ │ + strtmi pc, [r9], -fp, lsl #31 │ │ + blx 1360d9e │ │ @ instruction: 0x4604e535 │ │ stcls 0, cr14, [r1], #-0 │ │ svceq 0x0000f1b8 │ │ stmdals r0, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ - stc 0, cr15, [r2, #-724]! @ 0xfffffd2c │ │ + ldc 0, cr15, [r0, #-724] @ 0xfffffd2c │ │ andcs r9, r6, ip, lsl #20 │ │ andseq pc, r0, sp, lsl #17 │ │ strls r2, [r5], #-0 │ │ @ instruction: 0xf10db15a │ │ ldmib sp, {r2, r4, r7, sl, fp}^ │ │ stm ip, {r0, r2, r3, r8, ip, sp} │ │ @ instruction: 0xf10d000d │ │ stm ip, {r2, r7, sl, fp} │ │ andcs r0, r1, sp │ │ mrscs lr, (UNDEF: 0) │ │ svcge 0x0020ae30 │ │ eorls r9, r4, r8, lsr #2 │ │ ldrtmi r9, [r0], -r0, lsr #32 │ │ - @ instruction: 0xf02b4639 │ │ - ldmdals r0!, {r0, r4, r5, r6, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xf0104639 │ │ + ldmdals r0!, {r0, r1, r2, r9, fp, ip, sp, lr, pc} │ │ ldmdbls r2!, {r3, r4, r8, ip, sp, pc} │ │ - @ instruction: 0xf9b4f010 │ │ + blx 1fdee38 │ │ @ instruction: 0xf04fe7f5 │ │ - strb r0, [pc, #-2566]! @ 223c6 │ │ + strb r0, [pc, #-2566]! @ 223fa │ │ str r2, [r7, #790]! @ 0x316 │ │ cmpvs sl, r1, lsl #4 │ │ eorle r4, r1, #-1610612728 @ 0xa0000008 │ │ vqdmulh.s d25, d0, d3 │ │ @ instruction: 0xf04f0e13 │ │ vmull.s8 q8, d0, d1 │ │ stcpl 14, cr0, [r5], {128} @ 0x80 │ │ @@ -1112,19 +1125,19 @@ │ │ str r2, [r9, #789] @ 0x315 │ │ ldrb r2, [r2, #775] @ 0x307 │ │ ldrb r2, [r0, #789] @ 0x315 │ │ tstle r1, sp, asr sp │ │ @ instruction: 0xe6282315 │ │ @ instruction: 0xe6262316 │ │ strbmi r2, [r9], -r1 │ │ - @ instruction: 0xf8c0f01b │ │ + blx adeec8 │ │ ldrtmi r2, [r1], -r1 │ │ - @ instruction: 0xf8bcf01b │ │ + blx 9deed0 │ │ strbmi r2, [r1], -r1 │ │ - @ instruction: 0xf8b8f01b │ │ + blx 8deed8 │ │ svcmi 0x00f0e92d │ │ strmi fp, [sl], pc, lsl #1 │ │ ldm pc, {r0, fp, ip, sp, lr}^ @ │ │ strvc pc, [r3, #-1] │ │ ldmdbhi r1, {r1, r3, r6, sl, fp, sp, lr} │ │ ldrdmi pc, [r0], -sl │ │ stmiavs r1!, {r5, fp, sp, lr} │ │ @@ -1156,37 +1169,37 @@ │ │ ldrcc r6, [r8, #-2160] @ 0xfffff790 │ │ @ instruction: 0xf8003f18 │ │ mcrrne 0, 0, r9, r8, cr1 │ │ @ instruction: 0xe7ea60b0 │ │ andcs r4, r1, #48, 12 @ 0x3000000 │ │ @ instruction: 0xf8cd2301 │ │ @ instruction: 0xf0108000 │ │ - ldmvs r1!, {r0, r1, r2, r5, r6, r9, fp, ip, sp, lr, pc} │ │ + ldmvs r1!, {r0, r4, r5, r8, r9, fp, ip, sp, lr, pc} │ │ stmvs r1, {r1, r2, r3, r5, r6, r7, r8, r9, sl, sp, lr, pc} │ │ ldrdmi pc, [r0], -sl │ │ @ instruction: 0xf0002902 │ │ stmdbcs r1, {r1, r2, r4, r8, pc} │ │ msrhi CPSR_s, r0, asr #32 │ │ @ instruction: 0x0604e9d0 │ │ - b fe1ce304 │ │ - b fe03f690 │ │ + b fe1ce338 │ │ + b fe03f6c4 │ │ strtmi r7, [sl], -r6, ror #1 │ │ strhtvc lr, [r6], #176 @ 0xb0 │ │ mvnvc lr, r1, ror #22 │ │ - cdp2 0, 5, cr15, cr8, cr11, {2} │ │ + cdp2 0, 9, cr15, cr8, cr11, {2} │ │ svccc 0x00fff1b6 │ │ tstphi r8, r0, lsl #6 @ p-variant is OBSOLETE │ │ ldmdacs r3, {r0, fp, ip, sp} │ │ orrshi pc, pc, r0, lsl #4 │ │ strtpl r2, [r9], #-301 @ 0xfffffed3 │ │ ldmib r0, {r4, r8, sp, lr, pc}^ │ │ @ instruction: 0xf8da1202 │ │ andlt r0, pc, r0 │ │ svcmi 0x00f0e8bd │ │ - mrclt 7, 7, APSR_nzcv, cr4, cr14, {7} │ │ + mrclt 7, 6, APSR_nzcv, cr10, cr14, {7} │ │ ldrdmi pc, [r0], -sl │ │ stmdacs r0, {r6, fp, ip, sp, lr} │ │ sbchi pc, lr, r0 │ │ stmiavs r1!, {r5, fp, sp, lr} │ │ stmdacs r3, {r6, r9, fp, ip} │ │ cmpphi lr, r0, asr #4 @ p-variant is OBSOLETE │ │ rsbscs pc, r4, #1879048196 @ 0x70000004 │ │ @@ -1229,56 +1242,56 @@ │ │ ldrdhi pc, [r8, -r7] │ │ svceq 0x0000f1b8 │ │ rscshi pc, r5, r0 │ │ @ instruction: 0x1190f8b7 │ │ @ instruction: 0xf8b83001 │ │ @ instruction: 0x46472192 │ │ rscsle r4, r1, #268435465 @ 0x10000009 │ │ - bl 24f53c │ │ + bl 24f570 │ │ @ instruction: 0xf5020281 │ │ ldmdavs r7, {r1, r2, r3, r6, r7, r9, ip, sp, lr} │ │ @ instruction: 0xf5073801 │ │ mvnsle r7, ip, asr #5 │ │ and r2, r1, r0, lsl #12 │ │ strbmi r1, [r7], -lr, asr #24 │ │ stmdbeq r1, {r0, r8, r9, fp, sp, lr, pc}^ │ │ ldrdeq pc, [r0], -sl │ │ - bl 22dc24 │ │ + bl 22dc58 │ │ ldmib r1, {r0, r3, r7, r8}^ │ │ andle r1, fp, r4, asr #4 │ │ stmdavs r5, {r0, r1, r7, fp, sp, lr} │ │ mlale sl, sp, r2, r4 │ │ strtcs r6, [ip], #-2117 @ 0xfffff7bb │ │ movwcc r5, #5356 @ 0x14ec │ │ addvs r2, r3, sl, lsr r4 │ │ ldrdeq pc, [r0], -sl │ │ - mcr2 7, 3, pc, cr10, cr14, {7} @ │ │ + mrc2 7, 2, pc, cr0, cr14, {7} │ │ ldrdpl pc, [r0], -sl │ │ stmdavs r8!, {r0, r3, r5, r7, fp, sp, lr} │ │ andsle r4, r1, r8, lsl #5 │ │ - bl 23d1fc │ │ + bl 23d230 │ │ @ instruction: 0xf1ab00c9 │ │ ldrbpl r0, [r4], #-2817 @ 0xfffff4ff │ │ adcvs r3, r9, r1, lsl #2 │ │ @ instruction: 0xf7ff4651 │ │ movwcs pc, #12009 @ 0x2ee9 @ │ │ andcs r2, r1, r0, lsl #2 │ │ svceq 0x0000f1bb │ │ muls r7, ip, r1 │ │ andcs r2, r1, #1 │ │ strtmi r9, [r8], -r0 │ │ @ instruction: 0xf0102301 │ │ - stmiavs r9!, {r0, r4, r7, r8, fp, ip, sp, lr, pc} │ │ + stmiavs r9!, {r0, r1, r3, r4, r6, r9, fp, ip, sp, lr, pc} │ │ strcs lr, [r1, #-2020] @ 0xfffff81c │ │ strmi r9, [r5], -r0, lsl #10 │ │ ldrmi r9, [r9], -r3, lsl #2 │ │ andcs r9, r1, #536870912 @ 0x20000000 │ │ @ instruction: 0xf0102301 │ │ - stmdbls r3, {r0, r2, r7, r8, fp, ip, sp, lr, pc} │ │ - bls b4940 │ │ + stmdbls r3, {r0, r1, r2, r3, r6, r9, fp, ip, sp, lr, pc} │ │ + bls b4974 │ │ strb r6, [r5, fp, lsr #17] │ │ rsbsle r2, r5, r0, lsl #22 │ │ ldrdmi pc, [r0], -sl │ │ stmdavs r0!, {r0, r5, r7, fp, sp, lr} │ │ @ instruction: 0xf0004288 │ │ stmdavs r0!, {r1, r2, r3, r4, r7, pc}^ │ │ strbpl r2, [r2], #-637 @ 0xfffffd83 │ │ @@ -1298,159 +1311,159 @@ │ │ rsbcs r4, r5, #8, 8 @ 0x8000000 │ │ stclne 1, cr7, [r8, #-8] │ │ ldmdavs r0!, {r0, r1, r3, r6, sp, lr, pc} │ │ mvnle r4, r8, lsl #5 │ │ andcs r2, r1, #1 │ │ ldrtmi r9, [r0], -r0 │ │ @ instruction: 0xf0102301 │ │ - ldmvs r1!, {r0, r1, r3, r6, r8, fp, ip, sp, lr, pc} │ │ + ldmvs r1!, {r0, r2, r4, r9, fp, ip, sp, lr, pc} │ │ ldc 7, cr14, [r0, #872] @ 0x368 │ │ mrrc 11, 0, r0, r1, cr4 │ │ @ instruction: 0x460a0b10 │ │ andspl pc, pc, #-1140850687 @ 0xbc000001 │ │ andsle r4, ip, r2, lsl #6 │ │ smlabtcs r0, r8, r3, r4 │ │ mvnsvc pc, r7, asr #13 │ │ @ instruction: 0xf43f4208 │ │ ands sl, sp, pc, lsl #29 │ │ ldmib r0, {r2, r8, sl, fp, sp, pc}^ │ │ strtmi r0, [sl], -r4, lsl #2 │ │ - ldc2 0, cr15, [ip, #-300]! @ 0xfffffed4 │ │ + ldc2l 0, cr15, [ip, #-300]! @ 0xfffffed4 │ │ @ instruction: 0xf1c06821 │ │ stmiavs r7!, {r2, r4, r9, sl} │ │ addmi r1, lr, #205824 @ 0x32400 │ │ stmdavs r2!, {r0, r2, r6, fp, ip, lr, pc}^ │ │ ldmibne r0, {r0, r3, r5, fp, ip}^ │ │ @ instruction: 0xf0b24632 │ │ - ldmibne r8!, {r3, r4, r5, r8, fp, ip, sp, lr, pc} │ │ + ldmibne r8!, {r4, r5, r7, fp, ip, sp, lr, pc} │ │ @ instruction: 0xf021e019 │ │ @ instruction: 0xf0814100 │ │ @ instruction: 0xf08141e0 │ │ movwmi r6, #33151 @ 0x817f │ │ mrcge 4, 3, APSR_nzcv, cr0, cr15, {1} │ │ strtmi sl, [r8], -r4, lsl #26 │ │ - @ instruction: 0xf9baf077 │ │ - blne 117d200 │ │ - blne fe23d418 │ │ + @ instruction: 0xf9a6f077 │ │ + blne 117d234 │ │ + blne fe23d44c │ │ ldmdale sl, {r0, r2, r7, r9, lr}^ │ │ stmdbge r4, {r5, r6, fp, sp, lr} │ │ ldrtmi r4, [r0], #-1578 @ 0xfffff9d6 │ │ - @ instruction: 0xf91df0b2 │ │ + @ instruction: 0xf895f0b2 │ │ adcvs r1, r0, r0, ror r9 │ │ pop {r0, r1, r2, r3, ip, sp, pc} │ │ strdcs r8, [r1], -r0 │ │ andls r2, r0, r4, lsl #4 │ │ movwcs r4, #5664 @ 0x1620 │ │ - @ instruction: 0xf8fef010 │ │ + @ instruction: 0xf9c8f010 │ │ ldrb r6, [r7], -r1, lsr #17 │ │ andcs r2, r1, #1 │ │ ldrtmi r9, [r0], -r0 │ │ @ instruction: 0xf0102301 │ │ - ldmvs r1!, {r0, r2, r4, r5, r6, r7, fp, ip, sp, lr, pc} │ │ + ldmvs r1!, {r0, r1, r2, r3, r4, r5, r7, r8, fp, ip, sp, lr, pc} │ │ andcs lr, r1, #97517568 @ 0x5d00000 │ │ strtmi r4, [r8], -r6, lsl #12 │ │ andls r2, r0, #67108864 @ 0x4000000 │ │ - @ instruction: 0xf8ecf010 │ │ + @ instruction: 0xf9b6f010 │ │ ldrtmi r6, [r0], -r9, lsr #17 │ │ stmdami r4!, {r0, r1, r3, r6, r7, r9, sl, sp, lr, pc} │ │ @ instruction: 0xf01c4478 │ │ - tstpcs r1, r1, lsr ip @ p-variant is OBSOLETE │ │ + @ instruction: 0x2101fd9b │ │ smlabbls r0, r0, r6, r4 │ │ ldrtmi r4, [r9], -r0, lsr #12 │ │ movwcs r4, #5682 @ 0x1632 │ │ - @ instruction: 0xf8dcf010 │ │ + @ instruction: 0xf9a6f010 │ │ strbmi r6, [r0], -r7, lsr #17 │ │ andcs lr, r1, sp, lsr #15 │ │ andls r2, r0, r1, lsl #4 │ │ movwcs r4, #5664 @ 0x1620 │ │ - @ instruction: 0xf8d2f010 │ │ + @ instruction: 0xf99cf010 │ │ ldrb r6, [r8, -r1, lsr #17] │ │ andcs r2, r4, #1 │ │ strtmi r9, [r0], -r0 │ │ @ instruction: 0xf0102301 │ │ - stmiavs r1!, {r0, r3, r6, r7, fp, ip, sp, lr, pc} │ │ + stmiavs r1!, {r0, r1, r4, r7, r8, fp, ip, sp, lr, pc} │ │ mulcs r1, r8, r6 │ │ andls r2, r0, r5, lsl #4 │ │ movwcs r4, #5664 @ 0x1620 │ │ - @ instruction: 0xf8c0f010 │ │ + @ instruction: 0xf98af010 │ │ ldrb r6, [sp, -r1, lsr #17] │ │ strmi r2, [r6], -r1, lsl #4 │ │ andls r4, r0, #40, 12 @ 0x2800000 │ │ - @ instruction: 0xf8b8f010 │ │ + @ instruction: 0xf982f010 │ │ ldrtmi r6, [r0], -r9, lsr #17 │ │ andcs lr, r1, r6, lsr #13 │ │ andls r4, r0, r1, lsr r6 │ │ strtmi r4, [sl], -r0, lsr #12 │ │ @ instruction: 0xf0102301 │ │ - stmiavs r6!, {r0, r2, r3, r5, r7, fp, ip, sp, lr, pc} │ │ + stmiavs r6!, {r0, r1, r2, r4, r5, r6, r8, fp, ip, sp, lr, pc} │ │ stmdami r6, {r1, r3, r4, r7, r8, r9, sl, sp, lr, pc} │ │ @ instruction: 0xf01c4478 │ │ - bmi e2224 │ │ + bmi e2800 │ │ ldrbtmi r2, [sl], #-276 @ 0xfffffeec │ │ - stc2 0, cr15, [ip], {28} │ │ - andeq r7, fp, r2, ror #3 │ │ - andeq r7, fp, ip, lsr #16 │ │ - andeq r7, fp, r8, ror #9 │ │ + ldc2l 0, cr15, [r6, #-112]! @ 0xffffff90 │ │ + @ instruction: 0x000b71be │ │ + andeq r7, fp, r8, lsl #16 │ │ + andeq r7, fp, r4, asr #9 │ │ ldrbmi lr, [r0, sp, lsr #18]! │ │ stmdavs r1, {r1, r2, r3, r7, ip, sp, pc} │ │ vrshr.s8 d18, d1, #8 │ │ addsmi r0, r1, #0, 4 │ │ @ instruction: 0xf04fd107 │ │ strcs r0, [r0, #-2304] @ 0xfffff700 │ │ strtmi r4, [r9], -r8, asr #12 │ │ pop {r1, r2, r3, ip, sp, pc} │ │ ldm r0, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ stmiavs r0, {r1, r2, r3}^ │ │ andls r4, r5, r8, ror #28 │ │ ldrbtmi sl, [lr], #-2050 @ 0xfffff7fe │ │ - bvs fec532d8 │ │ + bvs fec5330c │ │ svchi 0x005bf3bf │ │ svclt 0x00182802 │ │ - @ instruction: 0xf984f013 │ │ + blx ffbdf32c │ │ ldmda r6, {r0, sp}^ │ │ stmdbcs r0, {r1, r8, r9, sl, fp, ip} │ │ stmda r6, {r0, r2, r3, r4, r5, r6, r8, ip, lr, pc}^ │ │ stmdbcs r0, {r1, r8} │ │ vsra.u64 , , #1 │ │ mrrcmi 15, 5, r8, lr, cr11 │ │ stmdavs r0!, {r2, r3, r4, r5, r6, sl, lr}^ │ │ cmnle lr, r0, asr #32 │ │ stmdaeq r0, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ stmdacs r0, {r4, r5, r8, r9, fp, ip, sp, lr} │ │ addhi pc, r1, r0, asr #32 │ │ @ instruction: 0x46a269b5 │ │ tstle r6, #704 @ 0x2c0 │ │ - bl 17d8a4 │ │ + bl 17d8d8 │ │ @ instruction: 0xf06f0145 │ │ - bl a3b48 │ │ + bl a3b7c │ │ @ instruction: 0xf10002c1 │ │ ldmib r0, {r3, r4, r8}^ │ │ - @ instruction: 0xf0b27402 │ │ - cdpne 8, 6, cr15, cr9, cr6, {3} │ │ + @ instruction: 0xf0b17402 │ │ + cdpne 15, 6, cr15, cr9, cr6, {3} │ │ teqlt r7, r1 @ │ │ svcmi 0x0000f1b7 │ │ addshi pc, r3, r0 │ │ @ instruction: 0xf0b54620 │ │ - ldmib r6, {r2, r3, r4, r6, r9, fp, sp, lr, pc}^ │ │ + ldmib r6, {r1, r3, r6, r9, fp, sp, lr, pc}^ │ │ andcs r9, r0, r8, lsl #10 │ │ tstcs r1, sl, asr #20 │ │ smlabteq sl, sp, r9, lr │ │ andls sl, ip, sl, lsl #18 │ │ stmdage r2, {r1, r3, r4, r5, r6, sl, lr} │ │ - stc2l 0, cr15, [r0], {36} @ 0x24 │ │ + cdp2 0, 2, cr15, cr10, cr4, {1} │ │ cmnle r6, r0, lsl #16 │ │ ldmibvs r7!, {r1, r3, r9, fp, sp, pc} │ │ @ instruction: 0xf10d6933 │ │ - bgt 1e6398 │ │ + bgt 1e63cc │ │ stm ip, {r0, r1, r2, r3, r4, r7, r9, lr} │ │ eorsle r0, pc, r7 │ │ ldmdbvs r3!, {r1, r2, r9, fp, sp, pc}^ │ │ strbeq lr, [r7], #-2823 @ 0xfffff4f9 │ │ @ instruction: 0xf843ca07 │ │ - bl 107420 │ │ + bl 107454 │ │ stmib r3, {r2, r6, r7, r8, r9}^ │ │ ldclne 2, cr1, [sl], #-12 │ │ andpl lr, r1, r3, asr #19 │ │ ldmib r6, {r0, r8, r9, sp}^ │ │ @ instruction: 0x61b20108 │ │ andcc r2, r1, r1, lsl #4 │ │ tstpeq r0, r1, asr #2 @ p-variant is OBSOLETE │ │ @@ -1461,91 +1474,91 @@ │ │ stmib r6, {r8, r9, sl, fp}^ │ │ tstle r3, r8, lsl #2 │ │ ldrdeq pc, [r4], -sl │ │ cmple r9, r0, asr #32 │ │ vaddl.u q1, d15, d0 │ │ ldmda r6, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ stmda r6, {r1, r8, r9, sl, fp, ip}^ │ │ - bcs 23ba4 │ │ + bcs 23bd8 │ │ stmdbcs r2, {r0, r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ stmdage r2, {r1, r2, r4, r5, ip, lr, pc} │ │ - ldc2 0, cr15, [r8, #-56]! @ 0xffffffc8 │ │ + stc2 0, cr15, [r4, #56] @ 0x38 │ │ strtmi r4, [r9], -r8, asr #12 │ │ pop {r1, r2, r3, ip, sp, pc} │ │ @ instruction: 0xf10687f0 │ │ vaddl.u q0, d15, d8 │ │ @ instruction: 0xf0548f2f │ │ - str pc, [r0, r2, lsr #21] │ │ + @ instruction: 0xe780fabc │ │ andseq pc, r0, r6, lsl #2 │ │ - cdp2 0, 15, cr15, cr15, cr15, {0} │ │ + @ instruction: 0xf820f010 │ │ @ instruction: 0xf054e7ba │ │ - @ instruction: 0xf080f9a1 │ │ - blvc c253d8 │ │ + @ instruction: 0xf080f9bb │ │ + blvc c2540c │ │ @ instruction: 0xf43f2800 │ │ ldmdami sl, {r0, r1, r2, r3, r4, r5, r6, r8, r9, sl, fp, sp, pc} │ │ andeq pc, r8, #-2147483647 @ 0x80000001 │ │ ldmdbmi sl, {r0, r3, r4, r8, r9, fp, lr} │ │ andls r4, sl, #120, 8 @ 0x78000000 │ │ ldrbtmi r4, [r9], #-1147 @ 0xfffffb85 │ │ tstls r0, sl, lsl #20 │ │ @ instruction: 0xf88d212b │ │ @ instruction: 0xf01e802c │ │ - ldmdami r6, {r0, r2, r3, r4, r6, fp, ip, sp, lr, pc} │ │ - blmi 5cdc18 │ │ + ldmdami r6, {r0, r1, r2, r6, r7, r8, fp, ip, sp, lr, pc} │ │ + blmi 5cdc4c │ │ ldrbtmi r4, [r8], #-2326 @ 0xfffff6ea │ │ ldrbtmi r4, [r9], #-1147 @ 0xfffffb85 │ │ teqcs r7, r0, lsl #2 │ │ - @ instruction: 0xf852f01e │ │ + @ instruction: 0xf9bcf01e │ │ tstpeq r8, r6, lsl #2 @ p-variant is OBSOLETE │ │ addcs r2, r1, #240 @ 0xf0 │ │ @ instruction: 0xf0b52301 │ │ - @ instruction: 0xe7c0e9dc │ │ - @ instruction: 0xf976f054 │ │ + strb lr, [r0, sl, asr #19] │ │ + @ instruction: 0xf990f054 │ │ svclt 0x00042800 │ │ teqvc r0, #1 │ │ - bmi 25d2e8 │ │ + bmi 25d31c │ │ ldrbtmi r2, [sl], #-0 │ │ - blx ff8df4a6 │ │ - andeq sl, fp, r6, lsl #12 │ │ - ldrdeq fp, [fp], -r4 │ │ - andeq r6, fp, r4, asr sp │ │ - @ instruction: 0xffff60a3 │ │ - andeq r6, fp, r4, asr #25 │ │ - andeq r6, fp, sl, ror #22 │ │ - andeq r6, fp, r2, lsr fp │ │ - @ instruction: 0xffff4f05 │ │ - andeq r6, fp, r8, lsl #25 │ │ - andeq r8, fp, r2, lsr #9 │ │ + stc2l 0, cr15, [ip, #-108] @ 0xffffff94 │ │ + andeq sl, fp, r2, ror #11 │ │ + andeq fp, fp, r0, asr #9 │ │ + andeq r6, fp, r0, lsr sp │ │ + @ instruction: 0xffff606f │ │ + ldrdeq r6, [fp], -r0 │ │ + andeq r6, fp, r6, asr #22 │ │ + andeq r6, fp, lr, lsl #22 │ │ + @ instruction: 0xffff4ed1 │ │ + andeq r6, fp, r4, ror ip │ │ + andeq r8, fp, lr, ror r4 │ │ @ instruction: 0xb084b5b0 │ │ addmi fp, sl, #-2147483624 @ 0x80000018 │ │ strpl sp, [r3], r9, lsl #4 │ │ svceq 0x0040f113 │ │ - blmi 1219c8c │ │ + blmi 1219cc0 │ │ movwls r4, #1147 @ 0x47b │ │ @ instruction: 0xf01c460b │ │ - mvnsle pc, r1, asr ip @ │ │ + ldrhle pc, [r8, #219]! @ 0xdb @ │ │ rsbsle r4, fp, sl, lsl #5 │ │ @ instruction: 0xf9931883 │ │ @ instruction: 0xf1b44000 │ │ stcle 15, cr3, [lr, #-1020] @ 0xfffffc04 │ │ ldrmi r2, [sl], #-769 @ 0xfffffcff │ │ rsble r4, r2, #-1610612728 @ 0xa0000008 │ │ strpl fp, [r3], r2, asr #6 │ │ svceq 0x0040f113 │ │ sbcslt sp, r9, #112, 22 @ 0x1c000 │ │ @ instruction: 0xf1b3b24b │ │ stclle 15, cr3, [r0], #-1020 @ 0xfffffc04 │ │ - blx 181b53c │ │ + blx 181b570 │ │ ldmdavc ip, {r2, r7, r9, sl, fp, ip, sp, lr, pc}^ │ │ ldceq 0, cr15, [pc], {14} │ │ svceq 0x00e0f1be │ │ - ldrteq pc, [pc], #-4 @ 234c0 @ │ │ + ldrteq pc, [pc], #-4 @ 234f4 @ │ │ ldmvc sp, {r1, r4, r5, r8, r9, ip, lr, pc} │ │ svceq 0x00f0f1be │ │ - ldreq pc, [pc, #-5]! @ 234c7 │ │ + ldreq pc, [pc, #-5]! @ 234fb │ │ strne lr, [r4], #2629 @ 0xa45 │ │ ldmvc fp, {r4, r5, r8, r9, ip, lr, pc}^ │ │ streq pc, [r7, #-12] │ │ teqpeq pc, #3 @ p-variant is OBSOLETE │ │ orrne lr, r4, #274432 @ 0x43000 │ │ vstmiami r5, {s28-s94} │ │ svceq 0x0080f1bc │ │ @@ -1554,20 +1567,20 @@ │ │ svccc 0x00fff1b3 │ │ strmi sp, [r2], #-3131 @ 0xfffff3c5 │ │ andseq pc, pc, r1 │ │ ldmdavc r3, {r5, r6, r7, r8, fp, sp}^ │ │ teqpeq pc, #3 @ p-variant is OBSOLETE │ │ ldmvc r5, {r1, r2, r3, r5, r8, r9, ip, lr, pc} │ │ @ instruction: 0xf00529f0 │ │ - b 1164a0c │ │ + b 1164a40 │ │ @ instruction: 0xd32a1383 │ │ @ instruction: 0xf00078d1 │ │ @ instruction: 0xf0010007 │ │ - b 1063a1c │ │ - b 1067b30 │ │ + b 1063a50 │ │ + b 1067b64 │ │ eor r4, r2, r0, lsl #3 │ │ vstmiane ip, {s28-s95} │ │ svceq 0x0080f1bc │ │ and sp, r4, lr, lsr #7 │ │ @ instruction: 0x3c0cea44 │ │ svceq 0x0080f1bc │ │ @ instruction: 0xf5bcd3a8 │ │ @@ -1577,141 +1590,141 @@ │ │ movwcs lr, #16391 @ 0x4007 │ │ svccc 0x0080f5bc │ │ movwcs fp, #16184 @ 0x3f38 │ │ addmi r4, sl, #436207616 @ 0x1a000000 │ │ mulscs r3, ip, r3 │ │ ldclt 0, cr11, [r0, #16]! │ │ orrne lr, r0, r3, asr #20 │ │ - b 111b570 │ │ + b 111b5a4 │ │ stmdage r1, {r8, ip, sp} │ │ - mcrr2 0, 7, pc, sl, cr5 @ │ │ + ldc2 0, cr15, [r6], #-468 @ 0xfffffe2c │ │ muleq ip, sp, r8 │ │ ldclt 0, cr11, [r0, #16]! │ │ ldrbtmi r4, [r8], #-2053 @ 0xfffff7fb │ │ - blx 175f5f4 │ │ + blx ff1df62a │ │ ldrbtmi r4, [fp], #-2820 @ 0xfffff4fc │ │ strmi r9, [fp], -r0, lsl #6 │ │ - blx ff25f602 │ │ - andeq r6, fp, r0, lsl #22 │ │ - andeq r6, fp, r6, lsl #20 │ │ - andeq r6, fp, lr, lsl #20 │ │ + ldc2 0, cr15, [r2, #-112]! @ 0xffffff90 │ │ + ldrdeq r6, [fp], -ip │ │ + andeq r6, fp, r2, ror #19 │ │ + andeq r6, fp, sl, ror #19 │ │ + mvnsmi lr, #737280 @ 0xb4000 │ │ + @ instruction: 0x4604b095 │ │ + cdpeq 1, 1, cr15, cr12, cr4, {0} │ │ + stmdals r4, {r4, r6, r7, r8, fp, sp, lr, pc} │ │ + ldmib r4, {r7, r8, fp, sp, lr}^ │ │ + ldcl 5, cr7, [r4] │ │ + @ instruction: 0xf8940b02 │ │ + ldm lr, {r4, r5, sp, lr} │ │ + stmib sp, {r1, r2, r3, ip, lr}^ │ │ + stcge 5, cr7, [r2, #-0] │ │ + bleq 1ded30 │ │ + subpl lr, r0, r5, lsl #17 │ │ + ldm r8!, {r0, r2, r4, r5, r7, ip, sp, lr, pc}^ │ │ + ldrbtmi r4, [sl], #-2572 @ 0xfffff5f4 │ │ + @ instruction: 0xf3bf68d3 │ │ + blcs c737c │ │ + stmib sp, {r1, r2, r3, r8, ip, lr, pc}^ │ │ + andcs r0, r3, sl, lsl #2 │ │ + bge 23da68 │ │ + strbmi r9, [r8], -r8 │ │ + ldrmi r4, [r8, r1, asr #12] │ │ + @ instruction: 0xf0b54620 │ │ + @ instruction: 0xb015e8d6 │ │ + mvnshi lr, #12386304 @ 0xbd0000 │ │ + ldrbtmi r4, [r8], #-2050 @ 0xfffff7fe │ │ + blx fe1df6aa │ │ + @ instruction: 0x000bb1b2 │ │ + andeq r6, fp, sl, lsr #25 │ │ mvnsmi lr, sp, lsr #18 │ │ stmvs r7, {r1, r4, r7, ip, sp, pc} │ │ @ instruction: 0x4604b397 │ │ stmdavs r0, {r4, r6, r7, r8, fp, sp, lr, pc} │ │ ldrtmi r6, [r8], -r5, asr #17 │ │ - ldmdb r8, {r0, r2, r4, r5, r7, ip, sp, lr, pc} │ │ + ldm r6, {r0, r2, r4, r5, r7, ip, sp, lr, pc}^ │ │ stmdage r6, {r1, r9, sl, lr} │ │ @ instruction: 0xf01c4639 │ │ - stmdals r6, {r0, r1, r4, r7, r9, sl, fp, ip, sp, lr, pc} │ │ + stmdals r6, {r0, r2, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ eorle r2, r7, r1, lsl #16 │ │ ldmib sp, {r1, r8, r9, sl, fp, sp, pc}^ │ │ cdpvs 3, 6, cr2, cr9, cr7, {0} │ │ @ instruction: 0xf03d4638 │ │ - ldrtmi pc, [r8], -r9, lsr #29 @ │ │ - mcr2 7, 2, pc, cr10, cr15, {7} @ │ │ + ldrtmi pc, [r8], -fp, asr #29 @ │ │ + mrc2 7, 0, pc, cr2, cr15, {7} │ │ ldrbtmi r4, [sl], #-2595 @ 0xfffff5dd │ │ @ instruction: 0xf3bf68d3 │ │ - blcs c7350 │ │ + blcs c73f4 │ │ stmib sp, {r1, r2, r3, r8, ip, lr, pc}^ │ │ andcs r0, r3, r8, lsl #2 │ │ - bge 1bda3c │ │ + bge 1bdae0 │ │ ldrtmi r9, [r0], -r6 │ │ ldrmi r4, [r8, r1, asr #12] │ │ @ instruction: 0xf0b54620 │ │ - andslt lr, r2, r4, ror #17 │ │ + mulslt r2, sl, r8 │ │ ldrhhi lr, [r0, #141]! @ 0x8d │ │ ldrbtmi r4, [r8], #-2073 @ 0xfffff7e7 │ │ - blx 65f67c │ │ + blx 12df722 │ │ ldrbtmi r4, [r8], #-2072 @ 0xfffff7e8 │ │ - blx 55f684 │ │ + blx 11df72a │ │ strcs r2, [r1, #-33]! @ 0xffffffdf │ │ - stmia ip!, {r0, r2, r4, r5, r7, ip, sp, lr, pc}^ │ │ + stmia sl!, {r0, r2, r4, r5, r7, ip, sp, lr, pc} │ │ andcs fp, r1, r8, lsl r9 │ │ @ instruction: 0xf01a2121 │ │ - stmdbmi ip, {r0, r6, r7, sl, fp, ip, sp, lr, pc} │ │ + stmdbmi ip, {r0, r1, r4, r5, r6, r7, r8, sl, fp, ip, sp, lr, pc} │ │ strmi r2, [r4], -r1, lsr #4 │ │ @ instruction: 0xf0b14479 │ │ - stmdami sl, {r2, r3, r6, r7, r9, sl, fp, ip, sp, lr, pc} │ │ - blmi 2abe60 │ │ + stmdami sl, {r2, r3, r9, sl, fp, ip, sp, lr, pc} │ │ + blmi 2abf04 │ │ andeq pc, r0, #200, 4 @ 0x8000000c │ │ ldrbtmi r4, [r8], #-2313 @ 0xfffff6f7 │ │ ldrbtmi r9, [fp], #-518 @ 0xfffffdfa │ │ - bge 1b482c │ │ + bge 1b48d0 │ │ @ instruction: 0x212b9100 │ │ stmib sp, {r0, r3, r8, sl, ip, pc}^ │ │ - @ instruction: 0xf01d5407 │ │ - svclt 0x0000ff2f │ │ - @ instruction: 0xfffeea14 │ │ - @ instruction: 0xffff5e49 │ │ - muleq fp, sl, sl │ │ - ldrdeq r6, [fp], -r8 │ │ - @ instruction: 0x000bb1be │ │ - andeq r6, fp, r6, asr #25 │ │ - andeq r6, fp, lr, lsl lr │ │ - mvnsmi lr, #737280 @ 0xb4000 │ │ - @ instruction: 0x4604b095 │ │ - cdpeq 1, 1, cr15, cr12, cr4, {0} │ │ - stmdals r4, {r4, r6, r7, r8, fp, sp, lr, pc} │ │ - ldmib r4, {r7, r8, fp, sp, lr}^ │ │ - ldcl 5, cr7, [r4] │ │ - @ instruction: 0xf8940b02 │ │ - ldm lr, {r4, r5, sp, lr} │ │ - stmib sp, {r1, r2, r3, ip, lr}^ │ │ - stcge 5, cr7, [r2, #-0] │ │ - bleq 1dedd4 │ │ - subpl lr, r0, r5, lsl #17 │ │ - stmia lr!, {r0, r2, r4, r5, r7, ip, sp, lr, pc} │ │ - ldrbtmi r4, [sl], #-2572 @ 0xfffff5f4 │ │ - @ instruction: 0xf3bf68d3 │ │ - blcs c7420 │ │ - stmib sp, {r1, r2, r3, r8, ip, lr, pc}^ │ │ - andcs r0, r3, sl, lsl #2 │ │ - bge 23db0c │ │ - strbmi r9, [r8], -r8 │ │ - ldrmi r4, [r8, r1, asr #12] │ │ - @ instruction: 0xf0b54620 │ │ - andslt lr, r5, ip, ror r8 │ │ - mvnshi lr, #12386304 @ 0xbd0000 │ │ - ldrbtmi r4, [r8], #-2050 @ 0xfffff7fe │ │ - @ instruction: 0xf9b0f01c │ │ - andeq fp, fp, lr, ror #1 │ │ - strdeq r6, [fp], -r6 @ │ │ + @ instruction: 0xf01e5407 │ │ + svclt 0x0000f861 │ │ + @ instruction: 0xfffee970 │ │ + @ instruction: 0xffff5da5 │ │ + andeq r6, fp, r6, ror #19 │ │ + andeq r6, fp, r4, asr #26 │ │ + andeq fp, fp, sl, lsr r1 │ │ + andeq r6, fp, r2, lsr ip │ │ + andeq r6, fp, sl, lsl #27 │ │ svcmi 0x00f0e92d │ │ strmi fp, [r0], sp, ror #1 │ │ strbmi sl, [r1], -ip, lsl #16 │ │ sbcgt ip, ip, ip, asr #19 │ │ smulleq lr, ip, r1, r8 │ │ cdpge 0, 1, cr12, cr4, cr12, {6} │ │ @ instruction: 0x46309910 │ │ umaalcc pc, r9, sp, r8 @ │ │ umaalcs pc, r8, sp, r8 @ │ │ - stc2l 0, cr15, [ip], #296 @ 0x128 │ │ + stc2l 0, cr15, [r6, #-296] @ 0xfffffed8 │ │ @ instruction: 0x0054f89d │ │ andshi pc, r4, sp, asr #17 │ │ tstle pc, r2, lsl #16 │ │ andeq pc, r8, r6, lsl #2 │ │ strmi lr, [lr, #-2525] @ 0xfffff623 │ │ stc2 7, cr15, [r4, #1020]! @ 0x3fc │ │ ldrbtmi r4, [sl], #-2781 @ 0xfffff523 │ │ @ instruction: 0xf3bf68d3 │ │ - blcs c749c │ │ + blcs c74d0 │ │ strhi pc, [fp, #-64]! @ 0xffffffc0 │ │ smlalbteq lr, r2, sp, r9 │ │ ldmdbvs r3, {r0, r1, sp} │ │ subls sl, r0, r0, asr #20 │ │ strtmi r4, [r9], -r0, lsr #12 │ │ stmdage ip, {r3, r4, r7, r8, r9, sl, lr} │ │ - ldc2 0, cr15, [r5], {14} │ │ + stc2l 0, cr15, [r1], #-56 @ 0xffffffc8 │ │ @ instruction: 0xf0b59805 │ │ - rsblt lr, sp, sl, lsr r8 │ │ + rsblt lr, sp, r8, lsr #16 │ │ svchi 0x00f0e8bd │ │ ldmdbge r4, {r1, r3, r5, fp, sp, pc} │ │ @ instruction: 0xf0b12258 │ │ - vldrls s30, [r1, #-484] @ 0xfffffe1c │ │ + ldcls 12, cr15, [r1, #-544] @ 0xfffffde0 │ │ @ instruction: 0xf1052001 │ │ ldmda r4, {r3, sl}^ │ │ stmdbcs r0, {r8, r9, sl, fp, ip} │ │ strbthi pc, [sp], #64 @ 0x40 @ │ │ tsteq r0, r4, asr #16 │ │ mvnsle r2, r0, lsl #18 │ │ svchi 0x005bf3bf │ │ @@ -1720,28 +1733,28 @@ │ │ @ instruction: 0xf0400040 │ │ strcs r8, [r0, -r2, lsl #10] │ │ stmdacs r0, {r3, r5, r8, r9, fp, ip, sp, lr} │ │ strhi pc, [r5, #-64] @ 0xffffffc0 │ │ ldreq pc, [r0], -r5, lsl #2 │ │ subscs sl, r8, #64, 16 @ 0x400000 │ │ @ instruction: 0xf0b14631 │ │ - stmdbge sl!, {r0, r1, r2, r4, r6, r9, fp, ip, sp, lr, pc} │ │ + stmdbge sl!, {r1, r2, r5, r6, sl, fp, ip, sp, lr, pc} │ │ subscs r4, r8, #48, 12 @ 0x3000000 │ │ - blx 14dfa74 │ │ + stc2l 0, cr15, [r1], #-708 @ 0xfffffd3c │ │ @ instruction: 0x0104f89d │ │ svclt 0x001c2802 │ │ addvc pc, r0, sp, lsl #10 │ │ - @ instruction: 0xf9e4f00e │ │ + blx c5f82c │ │ stmdals sl, {r0, r1, r2, r5, r8, fp, ip, sp, pc} │ │ subeq r6, r0, r0, asr #16 │ │ strhi pc, [r1, #-64] @ 0xffffffc0 │ │ vaddl.u q1, d15, d0 │ │ ldmda r4, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ stmda r4, {r8, r9, sl, fp, ip}^ │ │ - bcs 23fdc │ │ + bcs 24010 │ │ stmdbcs r2, {r0, r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ strbthi pc, [sp], #0 @ │ │ ldmib sp, {r1, r3, r8, r9, fp, ip, pc}^ │ │ ldmvs sl, {r1, r2, r3, r8}^ │ │ svchi 0x005bf3bf │ │ @ instruction: 0xf0402a02 │ │ @ instruction: 0xf50d84ca │ │ @@ -1768,24 +1781,24 @@ │ │ @ instruction: 0xf6c32000 │ │ @ instruction: 0xf040309a │ │ strhtls r8, [r0], #-28 @ 0xffffffe4 │ │ tstpls r0, sp, asr #17 @ p-variant is OBSOLETE │ │ stmdbls r2, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc}^ │ │ stmdbls r0, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc}^ │ │ and r2, r2, r0 │ │ - svc 0x00d6f0b4 │ │ + svc 0x00c4f0b4 │ │ @ instruction: 0x46071c78 │ │ ldrdeq pc, [r0], -sl │ │ svchi 0x005bf3bf │ │ ldrdls pc, [r4], -sl │ │ svchi 0x005bf3bf │ │ strbeq pc, [r4], #-960 @ 0xfffffc40 @ │ │ tstle r9, pc, lsl ip │ │ rscle r2, sp, #7, 30 │ │ - blx 20fd2a │ │ + blx 20fd5e │ │ stmdacc r1, {r0, r1, r2, ip, sp, lr, pc} │ │ mvnsle fp, r0, lsl pc │ │ @ instruction: 0xe7e81c78 │ │ strbeq r1, [r1, r5, lsl #25] │ │ vaddw.u , , d12 │ │ stmdaeq r2, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ ldrdne pc, [r0], -sl @ │ │ @@ -1803,41 +1816,41 @@ │ │ smlawtlt r7, r6, r2, sp │ │ @ instruction: 0xf007fb07 │ │ svclt 0x00103801 │ │ ldclne 1, cr13, [r8], #-1008 @ 0xfffffc10 │ │ @ instruction: 0xf3bfe7c1 │ │ andcs r8, r6, pc, lsr #30 │ │ svclt 0x00382f06 │ │ - blx 351d6 │ │ + blx 3520a │ │ andcs pc, r1, r0, lsl #2 │ │ svchi 0x005bf3bf │ │ adcsle r2, r4, r0, lsl #30 │ │ svclt 0x00103901 │ │ ldclne 1, cr13, [r8], #-1008 @ 0xfffffc10 │ │ strbeq lr, [r8, pc, lsr #15] │ │ rsbhi pc, r7, #64 @ 0x40 │ │ @ instruction: 0xf64c9c60 │ │ @ instruction: 0xf04f2000 │ │ @ instruction: 0xf6c30900 │ │ addmi r3, r4, #154 @ 0x9a │ │ stmdage r4!, {r0, r2, r4, ip, lr, pc}^ │ │ @ instruction: 0x565ee9dd │ │ - @ instruction: 0xff0ef070 │ │ + @ instruction: 0xff2af070 │ │ ldrdeq lr, [r4, #-157]! @ 0xffffff63 │ │ andeq lr, r6, #528384 @ 0x81000 │ │ movweq lr, #23168 @ 0x5a80 │ │ tstle r3, sl, lsl r3 │ │ adcmi r9, r0, #6684672 @ 0x660000 │ │ orr sp, r5, #335544320 @ 0x14000000 │ │ - bl 1c6a648 │ │ + bl 1c6a67c │ │ vaddl.s8 q0, d0, d6 │ │ ldmdage lr, {r0, r7, r8, r9, pc}^ │ │ stmib sp, {r2, r3, r4, r6, ip, pc}^ │ │ - @ instruction: 0xf0738a5a │ │ - msrlt SPSR_f, #7, 30 │ │ + @ instruction: 0xf00d8a5a │ │ + msrlt SPSR_f, #148480 @ 0x24400 │ │ strmi r6, [r4], -r7, lsl #16 │ │ andls pc, r0, r0, asr #17 │ │ @ instruction: 0xf3bfb367 │ │ @ instruction: 0xf8c78f5b │ │ vaddl.u , d15, d12 │ │ @ instruction: 0xf8c78f5b │ │ ldmib sp, {r4, ip, pc}^ │ │ @@ -1852,44 +1865,44 @@ │ │ ldmda r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ cdpne 15, 4, cr1, cr10, cr0, {0} │ │ movwcs lr, #2112 @ 0x840 │ │ mvnsle r2, r0, lsl #22 │ │ @ instruction: 0xf47f2901 │ │ vcvt.u32.f32 q5, , #1 │ │ @ instruction: 0xf0708f5b │ │ - ldrb pc, [r3, -sp, ror #16] @ │ │ + ldrb pc, [r3, -r9, lsl #17] @ │ │ @ instruction: 0xf003a85a │ │ - strb pc, [pc, -sp, lsr #21] @ │ │ - @ instruction: 0xf9daf072 │ │ + smlald pc, pc, sp, fp @ │ │ + @ instruction: 0xf9f6f072 │ │ ldmib sp, {r2, r9, sl, lr}^ │ │ @ instruction: 0xf8cd015b │ │ cmnls r6, r8, ror #2 │ │ stmib sp, {r0, r5, r9, sl, lr}^ │ │ stmdage r4!, {r2, r5, r6, pc}^ │ │ stc2l 0, cr15, [r2], #-4 │ │ svchi 0x005bf3bf │ │ svceq 0x0000e854 │ │ stmda r4, {r0, r6, r9, sl, fp, ip}^ │ │ - bcs 281ec │ │ + bcs 28220 │ │ stmdacs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ svcge 0x0036f47f │ │ vrsubhn.i d4, , q8 │ │ @ instruction: 0xf0708f5b │ │ - str pc, [pc, -r9, asr #16]! │ │ + str pc, [pc, -r5, ror #16]! │ │ andcs pc, r0, ip, asr #12 │ │ tstpls r0, sp, asr #17 @ p-variant is OBSOLETE │ │ addscc pc, sl, r3, asr #13 │ │ stmdbls r2, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc}^ │ │ stmib sp, {r5, r6, ip, pc}^ │ │ andcs r9, r0, r0, asr #18 │ │ @ instruction: 0xf0b4e002 │ │ - stclne 14, cr14, [r0], #-1008 @ 0xfffffc10 │ │ + stclne 14, cr14, [r0], #-936 @ 0xfffffc58 │ │ @ instruction: 0xf8da4604 │ │ ldmib sl, {}^ @ │ │ - bcc 80270 │ │ + bcc 802a4 │ │ @ instruction: 0x1094f8da │ │ mcrrne 0, 0, r4, r6, cr2 │ │ stmiapl fp, {r0, r1, r4, r8}^ │ │ svchi 0x005bf3bf │ │ @ instruction: 0xd113429e │ │ ldrdvs pc, [r0], #-138 @ 0xffffff76 │ │ adcsmi r1, r5, #21760 @ 0x5500 │ │ @@ -1910,48 +1923,48 @@ │ │ stccs 0, cr2, [r6], {6} │ │ qasxmi fp, r0, r8 │ │ @ instruction: 0xf100fb00 │ │ stccs 0, cr2, [r0], {1} │ │ stmdbcc r1, {r1, r2, r6, r7, ip, lr, pc} │ │ mvnsle fp, r0, lsl pc │ │ strb r1, [r1, r0, ror #24] │ │ - andeq fp, fp, r2, ror r0 │ │ - andeq fp, fp, r6, lsl r0 │ │ + andeq fp, fp, lr, asr r0 │ │ + andeq fp, fp, r2 │ │ svchi 0x002ff3bf │ │ stccs 0, cr2, [r6], {6} │ │ qasxmi fp, r0, r8 │ │ @ instruction: 0xf100fb00 │ │ stccs 0, cr2, [r0], {1} │ │ stmdbcc r1, {r1, r4, r5, r7, ip, lr, pc} │ │ mvnsle fp, r0, lsl pc │ │ str r1, [sp, r0, ror #24]! │ │ adcle r2, r8, #1792 @ 0x700 │ │ - blx 14ff5e │ │ + blx 14ff92 │ │ stmdacc r1, {r2, ip, sp, lr, pc} │ │ mvnsle fp, r0, lsl pc │ │ str r1, [r3, r0, ror #24]! │ │ @ instruction: 0xf040420a │ │ stclls 0, cr8, [r0], #-936 @ 0xfffffc58 │ │ andcs pc, r0, ip, asr #12 │ │ addscc pc, sl, r3, asr #13 │ │ andsle r4, r5, r4, lsl #5 │ │ ldmib sp, {r2, r5, r6, fp, sp, pc}^ │ │ @ instruction: 0xf070565e │ │ - ldmib sp, {r0, r3, r5, r9, sl, fp, ip, sp, lr, pc}^ │ │ - b fe06408c │ │ - b fe024318 │ │ + ldmib sp, {r0, r2, r6, r9, sl, fp, ip, sp, lr, pc}^ │ │ + b fe0640c0 │ │ + b fe02434c │ │ tstmi sl, #335544320 @ 0x14000000 │ │ stmdals r6!, {r0, r1, r8, ip, lr, pc}^ │ │ movwle r4, #21152 @ 0x52a0 │ │ - blne 105c590 │ │ + blne 105c5c4 │ │ andeq lr, r6, r1, ror fp │ │ addshi pc, ip, #128, 4 │ │ subsls sl, ip, lr, asr r8 │ │ - bhi 16de254 │ │ - mcr2 0, 1, pc, cr2, cr3, {3} @ │ │ + bhi 16de288 │ │ + blx feb5fb8c │ │ stmdavs r7, {r3, r5, r6, r8, r9, ip, sp, pc} │ │ @ instruction: 0xf8c04604 │ │ cmnlt r7, #0 │ │ svchi 0x005bf3bf │ │ andls pc, ip, r7, asr #17 │ │ svchi 0x005bf3bf │ │ andsls pc, r0, r7, asr #17 │ │ @@ -1962,37 +1975,37 @@ │ │ @ instruction: 0xf002a864 │ │ stmdavs r0!, {r0, r1, r2, r3, r4, r5, r6, sl, fp, ip, sp, lr, pc} │ │ stmdacs r0, {r0, r1, r2, r5, sp, lr} │ │ svcge 0x005bf43f │ │ svchi 0x005bf3bf │ │ svcne 0x0000e850 │ │ stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ - blcs 2c770 │ │ + blcs 2c7a4 │ │ stmdbcs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ svcge 0x004ff47f │ │ svchi 0x005bf3bf │ │ - @ instruction: 0xff88f06f │ │ + @ instruction: 0xffa4f06f │ │ ldmdage sl, {r0, r3, r6, r8, r9, sl, sp, lr, pc}^ │ │ - @ instruction: 0xf9f6f003 │ │ + blx 19dfbc8 │ │ @ instruction: 0xf072e745 │ │ - @ instruction: 0x4604f8f5 │ │ + @ instruction: 0x4604f911 │ │ ldrsbeq lr, [fp, #-157] @ 0xffffff63 │ │ msrls SPSR_f, sp, asr #17 │ │ strtmi r9, [r1], -r6, ror #2 │ │ rsbhi lr, r4, sp, asr #19 │ │ @ instruction: 0xf002a864 │ │ vcvt.f16.u16 , , #1 │ │ ldmda r4, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ cdpne 15, 4, cr0, cr1, cr0, {0} │ │ andne lr, r0, #68, 16 @ 0x440000 │ │ mvnsle r2, r0, lsl #20 │ │ @ instruction: 0xf47f2801 │ │ strtmi sl, [r0], -ip, lsr #30 │ │ svchi 0x005bf3bf │ │ - @ instruction: 0xff64f06f │ │ + @ instruction: 0xff80f06f │ │ subsls lr, ip, r5, lsr #14 │ │ orrls pc, r8, sp, asr #17 │ │ stmdbls r0!, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc}^ │ │ ldmdbls lr, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc}^ │ │ svceq 0x0000e85b │ │ @ instruction: 0xf0402800 │ │ stmda fp, {r0, r1, r5, r9, pc}^ │ │ @@ -2035,15 +2048,15 @@ │ │ @ instruction: 0xf8898f5b │ │ tst r6, ip │ │ svchi 0x005bf3bf │ │ tstne r2, r1, lsl #22 │ │ ldrdcs pc, [r4], #-138 @ 0xffffff76 │ │ ldrmi r9, [r0], #-320 @ 0xfffffec0 │ │ @ instruction: 0xf8b19041 │ │ - blvc ff2ebcc8 │ │ + blvc ff2ebcfc │ │ @ instruction: 0x21a8f8ad │ │ @ instruction: 0x31aaf88d │ │ strpl lr, [r1], #-2513 @ 0xfffff62f │ │ vtbl.8 d7, {d15-d18}, d15 │ │ andvs r8, r8, fp, asr pc │ │ @ instruction: 0xf0029806 │ │ svccs 0x0002fefb │ │ @@ -2059,44 +2072,44 @@ │ │ vsra.u64 , q8, #1 │ │ @ instruction: 0xf8ca8f5b │ │ @ instruction: 0xf0250004 │ │ stmdbcs r0, {r0} │ │ andcc fp, r1, r8, lsl pc │ │ vaddl.u , d15, d2 │ │ @ instruction: 0xf8ca8f5b │ │ - bl 263cf4 │ │ + bl 263d28 │ │ stmib sp, {r2, r8, ip}^ │ │ @ instruction: 0xf1019442 │ │ stmiavs r8, {r2, r3, r8, sl}^ │ │ vaddw.u , , d9 │ │ @ instruction: 0x07c08f5b │ │ @ instruction: 0xf04fd118 │ │ strcs r0, [r0], -r1, lsl #16 │ │ and r2, sl, r0, lsl #14 │ │ - ldcl 0, cr15, [lr, #-720]! @ 0xfffffd30 │ │ + stcl 0, cr15, [ip, #-720]! @ 0xfffffd30 │ │ strbmi r6, [r6], #-2088 @ 0xfffff7d8 │ │ stmdaeq r2, {r3, r8, ip, sp, lr, pc} │ │ vabdl.u , d15, d1 │ │ @ instruction: 0x07c08f5b │ │ svccs 0x0007d108 │ │ svccs 0x0000d2f2 │ │ @ instruction: 0x4630d0f2 │ │ svclt 0x00103801 │ │ @ instruction: 0xe7edd1fc │ │ ldmib r2, {r0, r3, r9, fp, ip, pc}^ │ │ @ instruction: 0xf8b2ec00 │ │ - bvc 5e3d6c │ │ + bvc 5e3da0 │ │ @ instruction: 0x01a8f8ad │ │ - bvc ff46aed0 │ │ + bvc ff46af04 │ │ @ instruction: 0xf88d281f │ │ @ instruction: 0xd12711aa │ │ stmvc r0, {r0, r2, r3, r8, sl, ip, sp, lr, pc} │ │ and r2, r2, r0 │ │ ldmdacs lr, {r0, ip, sp} │ │ - bl 297e30 │ │ + bl 297e64 │ │ stmiavs sl, {r8, ip}^ │ │ svchi 0x005bf3bf │ │ ldrbtle r0, [r5], #1938 @ 0x792 │ │ vaddw.u , , d12 │ │ ldmda r1, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ @ instruction: 0xf0422f00 │ │ stmda r1, {r2, r8, r9}^ │ │ @@ -2116,22 +2129,22 @@ │ │ movwcs lr, #2117 @ 0x845 │ │ mvnsle r2, r0, lsl #22 │ │ @ instruction: 0xf3bf0749 │ │ strle r8, [r8, #-3931] @ 0xfffff0a5 │ │ ldmdble r2, {r2, r3, r4, sl, fp, sp} │ │ strbtmi r4, [r4], -r8, asr #12 │ │ @ instruction: 0xf0b44675 │ │ - @ instruction: 0x46aeecf8 │ │ + strtmi lr, [lr], r6, ror #25 │ │ svccs 0x000246a4 │ │ andcs sp, r1, r0, lsr #2 │ │ @ instruction: 0xf88d2702 │ │ @ instruction: 0xf04f0158 │ │ cmn r4, r0, lsl #18 │ │ ldmdacs lr, {r0, ip, sp} │ │ - bl 2981a4 │ │ + bl 2981d8 │ │ stmiavs sl, {r8, ip}^ │ │ svchi 0x005bf3bf │ │ ldrbtle r0, [r5], #1938 @ 0x792 │ │ vaddw.u , , d12 │ │ ldmda r1, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ @ instruction: 0xf0422f00 │ │ stmda r1, {r2, r8, r9}^ │ │ @@ -2169,58 +2182,58 @@ │ │ andeq pc, r8, r9, lsl #17 │ │ cmnphi r7, r0 @ p-variant is OBSOLETE │ │ muleq fp, r9, r8 │ │ @ instruction: 0x1009f8b9 │ │ orrseq pc, r2, sp, lsl #17 │ │ @ instruction: 0xf8ad4648 │ │ @ instruction: 0xf0b41190 │ │ - bls 25f0e4 │ │ + bls 25f0d0 │ │ @ instruction: 0x0192f89d │ │ @ instruction: 0x1190f8bd │ │ cmpphi ip, sp, asr #17 @ p-variant is OBSOLETE │ │ stmvc r0, {r0, r2, r3, r8, sl, ip, sp, lr, pc} │ │ addsvc r8, r0, r1, lsl r0 │ │ @ instruction: 0xf88d9656 │ │ rsc r5, r2, r0, ror #2 │ │ rsbls sl, r5, sl, asr r8 │ │ @ instruction: 0xf88da85e │ │ stmib sp, {r5, r7, r8, ip, lr}^ │ │ rsbls fp, r4, r6, ror #22 │ │ - mcrr2 0, 7, pc, r6, cr3 @ │ │ + @ instruction: 0xf8d0f00d │ │ @ instruction: 0xf0002800 │ │ stmdavs r7, {r0, r1, r3, r4, r5, r7, pc} │ │ @ instruction: 0xf8c04604 │ │ svccs 0x00009000 │ │ mrshi pc, (UNDEF: 0) @ │ │ svchi 0x005bf3bf │ │ andls pc, ip, r7, asr #17 │ │ svchi 0x005bf3bf │ │ andsls pc, r0, r7, asr #17 │ │ - bls ca310 │ │ + bls ca344 │ │ @ instruction: 0xce64e9dd │ │ addsvc r7, r0, r8, lsl #17 │ │ stmdahi r9, {r1, sp} │ │ lsleq pc, sp, #17 @ │ │ ldmib sp, {r1, r3, r5, r6, fp, sp, pc}^ │ │ andshi r3, r1, r6, ror #12 │ │ ldrtmi r4, [sl], -r1, asr #12 │ │ @ instruction: 0xce40e9cd │ │ strbcc lr, [r2], -sp, asr #19 │ │ tstppl r0, sp, lsl #17 @ p-variant is OBSOLETE │ │ - blx fe45ff36 │ │ + blx fe45ff6a │ │ strcs r6, [r1, #-2080] @ 0xfffff7e0 │ │ cmnlt r0, r7, lsr #32 │ │ svchi 0x005bf3bf │ │ svcne 0x0000e850 │ │ stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ - blcs 2cb48 │ │ + blcs 2cb7c │ │ stmdbcs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ vaddw.u , , d3 │ │ @ instruction: 0xf06f8f5b │ │ - stmdbls r4, {r0, r2, r3, r4, r7, r8, sl, fp, ip, sp, lr, pc} │ │ + stmdbls r4, {r0, r3, r4, r5, r7, r8, sl, fp, ip, sp, lr, pc} │ │ lslseq pc, sp @ @ │ │ stmdacs r3, {r0, r1, r3, fp, pc} │ │ ldmib sp, {r0, r1, r2, r3, r7, fp, ip, sp, lr}^ │ │ @ instruction: 0xf8ad216a │ │ @ instruction: 0xf88d3100 │ │ rsbsle r7, r4, r2, lsl #2 │ │ @ instruction: 0xf89d9e08 │ │ @@ -2238,175 +2251,175 @@ │ │ svchi 0x005bf3bf │ │ svceq 0x0000e854 │ │ tstls r0, r4, asr #16 │ │ mvnsle r2, r0, lsl #18 │ │ cmnle lr, r2, lsl #16 │ │ @ instruction: 0x462120f0 │ │ movwcs r2, #4737 @ 0x1281 │ │ - stc 0, cr15, [sl], {180} @ 0xb4 │ │ + bl ffe602c4 │ │ smlsdxcs r1, r7, r0, lr │ │ stmdaeq r0, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ and r2, fp, r0, lsl #12 │ │ - stc 0, cr15, [r2], #-720 @ 0xfffffd30 │ │ + ldc 0, cr15, [r0], {180} @ 0xb4 │ │ ldrsbeq pc, [r0, #137]! @ 0x89 @ │ │ @ instruction: 0x370244b8 │ │ stmdacs r0, {r0, r9, sl, ip, sp} │ │ svchi 0x005bf3bf │ │ mrcge 4, 3, APSR_nzcv, cr7, cr15, {3} │ │ rscsle r2, r1, #7, 28 @ 0x70 │ │ rscsle r2, r1, r0, lsl #28 │ │ stmdacc r1, {r6, r9, sl, lr} │ │ mvnsle fp, r0, lsl pc │ │ strcs lr, [r1, #-2028] @ 0xfffff814 │ │ strcs r2, [r0, -r0, lsl #12] │ │ @ instruction: 0xf0b4e00b │ │ - @ instruction: 0xf899ec0a │ │ + @ instruction: 0xf899ebf8 │ │ strtmi r0, [lr], #-12 │ │ strcc r3, [r1, -r2, lsl #10] │ │ vtbl.8 d2, {d15}, d0 │ │ @ instruction: 0xf47f8f5b │ │ svccs 0x0007af35 │ │ svccs 0x0000d2f1 │ │ @ instruction: 0x4630d0f1 │ │ svclt 0x00103801 │ │ @ instruction: 0xe7ecd1fc │ │ vqshlu.s32 q2, q4, #31 │ │ @ instruction: 0xf0538f2f │ │ - stmdbls sl, {r3, r5, r6, sl, fp, ip, sp, lr, pc} │ │ + stmdbls sl, {r1, r7, sl, fp, ip, sp, lr, pc} │ │ subeq r6, r0, r8, asr #16 │ │ ldclge 4, cr15, [sp, #252] @ 0xfc │ │ - blx 1a6018e │ │ + blx fe0e01c2 │ │ streq pc, [r1, #-128] @ 0xffffff80 │ │ muleq ip, sl, r8 │ │ @ instruction: 0xf43f2800 │ │ ldrd sl, [r5], sl @ │ │ cmppls r8, sp, lsl #17 @ p-variant is OBSOLETE │ │ eor r2, lr, r2, lsl #14 │ │ ldmdage r6, {r0, r8, sl, sp}^ │ │ - @ instruction: 0xf002a964 │ │ - @ instruction: 0xf89dffb7 │ │ + @ instruction: 0xf003a964 │ │ + @ instruction: 0xf89df827 │ │ stmdacs r2, {r5, r7, r8} │ │ mla r2, r2, r1, sp │ │ @ instruction: 0x465920f0 │ │ movwcs r2, #4737 @ 0x1281 │ │ - bl febe0348 │ │ + bl fe76037c │ │ ldrdls pc, [r8, sp] │ │ svceq 0x0000f1b9 │ │ stclge 4, cr15, [r0, #508]! @ 0x1fc │ │ @ instruction: 0xf88d2002 │ │ @ instruction: 0xf88d7158 │ │ @ instruction: 0xf04f0160 │ │ vtbl.8 d0, {d15-d16}, d0 │ │ ldmda r4, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ cdpne 15, 4, cr0, cr1, cr0, {0} │ │ andne lr, r0, #68, 16 @ 0x440000 │ │ mvnsle r2, r0, lsl #20 │ │ tstle r4, r1, lsl #16 │ │ vrsubhn.i d4, , q8 │ │ @ instruction: 0xf06f8f5b │ │ - @ instruction: 0xf89dfcef │ │ + @ instruction: 0xf89dfd0b │ │ svccs 0x00027160 │ │ addshi pc, r1, r0 │ │ ldrbmi lr, [r6, #-2525] @ 0xfffff623 │ │ strtmi r6, [r0], -r9, ror #17 │ │ stmdavs r8!, {r3, r7, r8, r9, sl, lr}^ │ │ svclt 0x001c2800 │ │ @ instruction: 0xf0b44620 │ │ - @ instruction: 0x07f8eb7a │ │ + ldrbeq lr, [r8, r8, ror #22]! │ │ streq pc, [r1, -pc, asr #32] │ │ @ instruction: 0xf43f980b │ │ @ instruction: 0xf7ffabaf │ │ @ instruction: 0xf053bb32 │ │ - stmdacs r0, {r0, r2, r4, r8, r9, fp, ip, sp, lr, pc} │ │ + stmdacs r0, {r0, r1, r2, r3, r5, r8, r9, fp, ip, sp, lr, pc} │ │ @ instruction: 0xf88abf08 │ │ ldr r7, [r8, #12] │ │ - mcr2 0, 2, pc, cr2, cr1, {3} @ │ │ + mrc2 0, 2, pc, cr14, cr1, {3} │ │ andcs r4, r2, r4, lsl #12 │ │ lsleq pc, sp, #17 @ │ │ subls sl, r1, sl, asr r8 │ │ subls sl, r0, lr, asr r8 │ │ strbmi sl, [r1], -sl, ror #16 │ │ @ instruction: 0xf88d4622 │ │ stmib sp, {r4, r8, ip, lr}^ │ │ @ instruction: 0xf001bb42 │ │ @ instruction: 0x4620fa9d │ │ svchi 0x005bf3bf │ │ svcne 0x0000e850 │ │ stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ - blcs 2cd28 │ │ + blcs 2cd5c │ │ strcs sp, [r1, #-504] @ 0xfffffe08 │ │ @ instruction: 0xf43f2901 │ │ ldr sl, [r0, -lr, lsl #30] │ │ - blx ffb60284 │ │ + blx 1e02ba │ │ svclt 0x00082800 │ │ andvc pc, ip, sl, lsl #17 │ │ @ instruction: 0xf053e689 │ │ - stmdacs r0, {r0, r2, r5, r6, r7, r9, fp, ip, sp, lr, pc} │ │ + stmdacs r0, {r0, r1, r2, r3, r4, r5, r6, r7, r9, fp, ip, sp, lr, pc} │ │ @ instruction: 0x7125bf08 │ │ strtmi lr, [r0], -r8, lsr #14 │ │ svchi 0x002ff3bf │ │ - blx ff5a02a6 │ │ - bllt 4e2158 │ │ - blmi a76200 │ │ + blx ffc202da │ │ + bllt 4e218c │ │ + blmi a76234 │ │ ldrbtmi r4, [r8], #-2345 @ 0xfffff6d7 │ │ @ instruction: 0xf88d447b │ │ ldrbtmi r5, [r9], #-260 @ 0xfffffefc │ │ smlabtlt r0, sp, r8, pc @ │ │ tstls r0, r0, asr #20 │ │ @ instruction: 0xf01d212b │ │ - stmdami r5!, {r0, r2, r3, r4, r7, r8, fp, ip, sp, lr, pc} │ │ + stmdami r5!, {r0, r1, r2, r8, r9, fp, ip, sp, lr, pc} │ │ @ instruction: 0xf01b4478 │ │ - stmdami r2!, {r0, r2, r3, r4, r6, sl, fp, ip, sp, lr, pc} │ │ + stmdami r2!, {r0, r1, r2, r6, r7, r8, sl, fp, ip, sp, lr, pc} │ │ @ instruction: 0xf01b4478 │ │ - stmdami r5!, {r0, r3, r4, r6, sl, fp, ip, sp, lr, pc} │ │ + stmdami r5!, {r0, r1, r6, r7, r8, sl, fp, ip, sp, lr, pc} │ │ @ instruction: 0xf01b4478 │ │ - @ instruction: 0xf053fc55 │ │ - @ instruction: 0xf080fabd │ │ - blvc a25da0 │ │ + @ instruction: 0xf053fdbf │ │ + @ instruction: 0xf080fad7 │ │ + blvc a25dd4 │ │ @ instruction: 0xf43f2800 │ │ ldmdami r4, {r0, r1, r3, r4, r5, r6, r7, r9, fp, sp, pc} │ │ ldmdbmi r5, {r2, r4, r8, r9, fp, lr} │ │ ldrbtmi r4, [fp], #-1144 @ 0xfffffb88 │ │ smlabbvc r4, sp, r8, pc @ │ │ strbls r4, [r0], #-1145 @ 0xfffffb87 │ │ tstls r0, r0, asr #20 │ │ @ instruction: 0xf01d212b │ │ - rscscs pc, r0, fp, ror r9 @ │ │ + rscscs pc, r0, r5, ror #21 │ │ addcs r4, r1, #34603008 @ 0x2100000 │ │ @ instruction: 0xf0b42301 │ │ - @ instruction: 0xf7ffeb06 │ │ + @ instruction: 0xf7ffeaf4 │ │ @ instruction: 0xf053bb0b │ │ - stmdacs r0, {r0, r1, r2, r3, r4, r7, r9, fp, ip, sp, lr, pc} │ │ + stmdacs r0, {r0, r3, r4, r5, r7, r9, fp, ip, sp, lr, pc} │ │ andcs fp, r1, r4, lsl #30 │ │ @ instruction: 0xf7ff7328 │ │ stmdami sp, {r0, r1, r2, r4, r5, r6, r7, r9, fp, ip, sp, pc} │ │ stmdbmi lr, {r0, r2, r3, r8, r9, fp, lr} │ │ ldrbtmi r4, [fp], #-1144 @ 0xfffffb88 │ │ - bge 10353d0 │ │ + bge 1035404 │ │ @ instruction: 0x212b9100 │ │ - @ instruction: 0xf960f01d │ │ - @ instruction: 0xffff52df │ │ - andeq r5, fp, r2, lsl #30 │ │ - andeq r5, fp, ip, lsl #31 │ │ - @ instruction: 0xffff5325 │ │ - andeq r5, fp, r8, lsl #31 │ │ - andeq r7, fp, r2, lsr #29 │ │ - andeq r7, fp, r8, ror #28 │ │ - andeq r7, fp, r0, lsl #29 │ │ - @ instruction: 0xffff52a3 │ │ - andeq r5, fp, r6, lsl pc │ │ - andeq r5, fp, r4, ror #30 │ │ - andeq r6, fp, r0, asr #2 │ │ + blx ff2e029c │ │ + @ instruction: 0xffff52ab │ │ + andeq r5, fp, lr, lsl #30 │ │ + andeq r5, fp, r8, ror #30 │ │ + @ instruction: 0xffff52f1 │ │ + andeq r5, fp, r4, lsl #31 │ │ + andeq r7, fp, lr, ror lr │ │ + andeq r7, fp, r4, asr #28 │ │ + andeq r7, fp, ip, asr lr │ │ + @ instruction: 0xffff526f │ │ + andeq r5, fp, r2, asr #29 │ │ + andeq r5, fp, r0, asr #30 │ │ + andeq r6, fp, ip, lsl r1 │ │ svcmi 0x00f0e92d │ │ ldrmi fp, [ip], -r1, lsr #1 │ │ @ instruction: 0x460e4691 │ │ stmdacs r1, {r3, r4, r5, r7, r8, ip, sp, pc} │ │ @ instruction: 0xf8d6d12c │ │ vaddl.u q5, d15, d16 │ │ - bvs 1e07fac │ │ + bvs 1e07fe0 │ │ svchi 0x005bf3bf │ │ sbcvc lr, sl, pc, asr sl │ │ adcshi pc, sp, #64 @ 0x40 │ │ eoreq pc, r0, #-2147483647 @ 0x80000001 │ │ streq pc, [r4, #-262]! @ 0xfffffefa │ │ stmdbmi r2, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc} │ │ @ instruction: 0xf04f2400 │ │ @@ -2414,18 +2427,18 @@ │ │ @ instruction: 0xf64ce084 │ │ @ instruction: 0xf04f2700 │ │ @ instruction: 0xf6c30800 │ │ @ instruction: 0xf8cd379a │ │ smlsdxls ip, r8, r0, r8 │ │ stmib sp, {r1, r5, r7, r9, sl, lr}^ │ │ stmib sp, {r2, r3, r4, fp, pc}^ │ │ - bvs c462e8 │ │ + bvs c4631c │ │ andmi r6, r1, #45312 @ 0xb100 │ │ tstphi pc, r0 @ p-variant is OBSOLETE │ │ - bls 65e9c0 │ │ + bls 65e9f4 │ │ adds r2, r6, #1 │ │ andcs pc, r0, ip, asr #12 │ │ streq pc, [r8, #-262] @ 0xfffffefa │ │ addscc pc, sl, r3, asr #13 │ │ andcs r9, r0, r8 │ │ stmib sp, {r1, r2, r3, ip, pc}^ │ │ stmib sp, {r2, r3}^ │ │ @@ -2435,15 +2448,15 @@ │ │ stmda r5, {r0, r2, r3, r5, r7, r9, pc}^ │ │ stmdbcs r0, {r8} │ │ vsra.u64 , q11, #1 │ │ svcmi 0x00c18f5b │ │ ldmdavs r8!, {r0, r1, r2, r3, r4, r5, r6, sl, lr}^ │ │ @ instruction: 0xf0400040 │ │ @ instruction: 0xf04f82e7 │ │ - blvc c26ad4 │ │ + blvc c26b08 │ │ @ instruction: 0xf0402800 │ │ @ instruction: 0xf10d82e9 │ │ @ instruction: 0xf1060868 │ │ strbmi r0, [r0], -r8, lsr #2 │ │ @ instruction: 0xf990f002 │ │ stmdacs r0, {r1, r3, r4, fp, ip, pc} │ │ bichi pc, lr, r0 │ │ @@ -2467,60 +2480,60 @@ │ │ ldmda r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ cdpne 15, 4, cr1, cr10, cr0, {0} │ │ movwcs lr, #2112 @ 0x840 │ │ mvnsle r2, r0, lsl #22 │ │ @ instruction: 0xf0402901 │ │ vrshr.u32 d8, d25, #1 │ │ @ instruction: 0xf06f8f5b │ │ - eors pc, r3, #162816 @ 0x27c00 │ │ + eors pc, r3, #191488 @ 0x2ec00 │ │ @ instruction: 0xf8d22401 │ │ vaddl.u q5, d15, d0 │ │ stmdavs pc!, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc} @ │ │ svchi 0x005bf3bf │ │ sbcvc lr, sl, pc, asr sl │ │ subshi pc, r8, #64 @ 0x40 │ │ stmdbeq r4, {r1, r3, r6, r7, r8, r9, ip, sp, lr, pc}^ │ │ svceq 0x001ff1b9 │ │ @ instruction: 0xf8cdd126 │ │ - blx 1443be │ │ + blx 1443f2 │ │ rsbeq pc, r0, r4, lsl #16 │ │ - bleq a0784 │ │ + bleq a07b8 │ │ andle r2, r5, #1792 @ 0x700 │ │ @ instruction: 0x4640b13c │ │ svclt 0x00103801 │ │ strd sp, [r2], -ip │ │ - b fe0668 │ │ + b b6069c │ │ @ instruction: 0xf8d29a05 │ │ vaddl.u q5, d15, d0 │ │ stmdavs pc!, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc} @ │ │ svchi 0x005bf3bf │ │ sbcvc lr, sl, pc, asr sl │ │ ldrbmi sp, [r8], #357 @ 0x165 │ │ stmdbeq r4, {r1, r3, r6, r7, r8, r9, ip, sp, lr, pc}^ │ │ - bleq e07e4 │ │ + bleq e0818 │ │ @ instruction: 0xf1b93401 │ │ rscle r0, r1, pc, lsl pc │ │ @ instruction: 0x8010f8dd │ │ svceq 0x001ef1b9 │ │ @ instruction: 0xf1b8bf08 │ │ tstle r9, r0, lsl #30 │ │ adcsvc pc, ip, pc, asr #8 │ │ @ instruction: 0xf0b42101 │ │ - bls 19ec74 │ │ + bls 19ec60 │ │ stmdacs r0, {r7, r9, sl, lr} │ │ subshi pc, r7, #0 │ │ ldmda r2, {r0, r1, r2, r3, r4, r6, r8, ip, sp, pc}^ │ │ ldrbmi r0, [r0, #-3840] @ 0xfffff100 │ │ @ instruction: 0xf10ad128 │ │ vaddl.u q0, d15, d2 │ │ stmda r2, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ - bllt 6647fc │ │ + bllt 664830 │ │ vst1.8 {d30-d33}, [pc :64], r3 │ │ strhcs r7, [r1, -ip] │ │ - b 3e06d8 │ │ + ldmib ip!, {r2, r4, r5, r7, ip, sp, lr, pc}^ │ │ @ instruction: 0xf0002800 │ │ strmi r8, [r7], -r2, asr #4 │ │ svceq 0x0000e855 │ │ stmdblt r0, {r0, r2, r9, fp, ip, pc}^ │ │ svchi 0x005bf3bf │ │ andvc lr, r0, r5, asr #16 │ │ ldmda r5, {r3, r4, r5, r6, r7, r8, ip, sp, pc}^ │ │ @@ -2539,46 +2552,46 @@ │ │ movtmi sl, #3967 @ 0xf7f │ │ svclt 0x00103801 │ │ strcc sp, [r1], #-508 @ 0xfffffe04 │ │ andcs lr, r1, r9, ror r7 │ │ mvnle r2, r0, lsl #16 │ │ svceq 0x0000f1b8 │ │ strbmi sp, [r0], -r3 │ │ - stmib r8!, {r2, r4, r5, r7, ip, sp, lr, pc} │ │ + ldmib r6, {r2, r4, r5, r7, ip, sp, lr, pc} │ │ ldrtmi r9, [r8], r5, lsl #20 │ │ stcls 7, cr14, [r2], {109} @ 0x6d │ │ @ instruction: 0xf8dd2700 │ │ @ instruction: 0xf04f8010 │ │ @ instruction: 0xf1b80900 │ │ svclt 0x001c0f00 │ │ @ instruction: 0xf0b44640 │ │ - svccs 0x0000e99a │ │ + svccs 0x0000e988 │ │ @ instruction: 0x81a5f000 │ │ subeq lr, r9, r9, lsl #22 │ │ - bl 20a8ac │ │ + bl 20a8e0 │ │ stmib r0, {r7}^ │ │ andcc r1, ip, r1, lsl #8 │ │ svchi 0x005bf3bf │ │ svcne 0x0000e850 │ │ tstpeq r1, r1, asr #32 @ p-variant is OBSOLETE │ │ andne lr, r0, #64, 16 @ 0x400000 │ │ mvnsle r2, r0, lsl #20 │ │ subeq pc, r0, r6, lsl #2 │ │ - blx ffc604cc │ │ + blx ffc60500 │ │ @ instruction: 0xf106e17d │ │ strcs r0, [r0], #-2848 @ 0xfffff4e0 │ │ @ instruction: 0xf0b4e007 │ │ - strcc lr, [r1], #-2466 @ 0xfffff65e │ │ + strcc lr, [r1], #-2448 @ 0xfffff670 │ │ vldmiavs r1!, {s12-s59} │ │ @ instruction: 0xf47f4201 │ │ stmdbcc r1, {r0, r2, r4, r6, r7, r9, sl, fp, sp, pc} │ │ @ instruction: 0x5094f8d6 │ │ movweq lr, #2561 @ 0xa01 │ │ - bl ff6b4 │ │ - bl 1649fc │ │ + bl ff6e8 │ │ + bl 164a30 │ │ stmvs sp, {r0, r7, r8} │ │ svchi 0x005bf3bf │ │ smlatble fp, r8, r2, r4 │ │ movwcc r6, #7221 @ 0x1c35 │ │ andsle r4, lr, #-1342177270 @ 0xb000000a │ │ ldmda fp, {r1, r6, sl, fp, ip}^ │ │ addmi r3, r3, #0, 30 │ │ @@ -2597,50 +2610,50 @@ │ │ mvnsle fp, r0, lsl pc │ │ subsmi lr, r2, #52166656 @ 0x31c0000 │ │ andmi r6, r2, r3, ror ip │ │ ldmda fp, {r1, r3, r4, sl, lr}^ │ │ addmi r3, r3, #0, 30 │ │ vsra.u64 , , #1 │ │ stmda fp, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ - blcs 2d15c │ │ + blcs 2d190 │ │ mrshi pc, (UNDEF: 72) @ │ │ @ instruction: 0xf04f2c06 │ │ svclt 0x00380006 │ │ @ instruction: 0xb1244620 │ │ stmdacc r1, {r6, r8, r9, lr} │ │ mvnsle fp, r0, lsl pc │ │ strcs lr, [r1], #-1965 @ 0xfffff853 │ │ vldmiavs r1!, {s12-s59} │ │ adcle r4, lr, r1, lsl #4 │ │ stccs 6, cr14, [r7], {130} @ 0x82 │ │ stccs 2, cr13, [r0], {163} @ 0xa3 │ │ - blx 15881a │ │ + blx 15884e │ │ stmdacc r1, {r2, ip, sp, lr, pc} │ │ mvnsle fp, r0, lsl pc │ │ stcls 7, cr14, [ip], {157} @ 0x9d │ │ @ instruction: 0xd01e42bc │ │ @ instruction: 0xf8cda810 │ │ ldmib sp, {r2, r3, ip, pc}^ │ │ @ instruction: 0xf070590a │ │ - ldmib sp, {r0, r1, r2, r3, r6, r7, fp, ip, sp, lr, pc}^ │ │ - b fe0649f0 │ │ - b fe024dd8 │ │ + ldmib sp, {r0, r1, r3, r5, r6, r7, fp, ip, sp, lr, pc}^ │ │ + b fe064a24 │ │ + b fe024e0c │ │ tstmi sl, #335544320 @ 0x14000000 │ │ @ instruction: 0xf8ddd108 │ │ ldmdals r2, {r2, r3, ip, pc} │ │ movwle r4, #41632 @ 0xa2a0 │ │ svclt 0x0000e15a │ │ - ldrdeq sl, [fp], -r4 │ │ - bl 1c6b2d0 │ │ + andeq sl, fp, r0, asr #9 │ │ + bl 1c6b304 │ │ @ instruction: 0xf8dd0009 │ │ vaddl.s8 , d0, d12 │ │ stmdage sl, {r0, r4, r6, r8, pc} │ │ andvs lr, r7, sp, asr #19 │ │ andls sl, r6, sl, lsl r8 │ │ - @ instruction: 0xf8c0f073 │ │ + stc2l 0, cr15, [sl, #-48] @ 0xffffffd0 │ │ stmdavs r5, {r7, r8, r9, ip, sp, pc} │ │ @ instruction: 0xf8c04604 │ │ cmnlt sp, #0 │ │ svchi 0x005bf3bf │ │ andhi pc, ip, r5, asr #17 │ │ svchi 0x005bf3bf │ │ andshi pc, r0, r5, asr #17 │ │ @@ -2654,21 +2667,21 @@ │ │ vsra.u32 , q8, #1 │ │ ldmda r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ cdpne 15, 4, cr1, cr10, cr0, {0} │ │ movwcs lr, #2112 @ 0x840 │ │ mvnsle r2, r0, lsl #22 │ │ tstle r3, r1, lsl #18 │ │ svchi 0x005bf3bf │ │ - blx a607fc │ │ + blx 1160830 │ │ vldmiavs r1!, {s12-s59} │ │ @ instruction: 0xf43f4201 │ │ ldr sl, [sp], -r0, asr #30 │ │ @ instruction: 0xf002a806 │ │ - udf #24523 @ 0x5fcb │ │ - blx fe46081e │ │ + ldrb pc, [r5, r5, lsr #25]! @ │ │ + blx feb60852 │ │ ldmib sp, {r2, r9, sl, lr}^ │ │ stmib sp, {r0, r1, r2, r8}^ │ │ ldmdage sl, {r0, r4, r8} │ │ ldmdage r0, {r4, ip, pc} │ │ @ instruction: 0xf8cd4621 │ │ @ instruction: 0xf0018018 │ │ vcvt.u32.f32 , , #1 │ │ @@ -2684,25 +2697,25 @@ │ │ ldrls lr, [r8], #-2509 @ 0xfffff633 │ │ tstle r3, r7, lsl r0 │ │ subeq r6, r0, r8, ror r8 │ │ cmpphi sp, r0, asr #32 @ p-variant is OBSOLETE │ │ vaddl.u q1, d15, d0 │ │ ldmda r5, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ stmda r5, {r8, r9, sl, fp, ip}^ │ │ - bcs 24eb8 │ │ + bcs 24eec │ │ stmdbcs r2, {r0, r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ rscscs sp, r0, lr, ror r1 │ │ cmp r7, r9, lsr #12 │ │ stmdage r6, {r0, r2, r8, r9, sl, ip, pc} │ │ @ instruction: 0xf88daf0a │ │ stmib sp, {r3, r4, r6, sp, pc}^ │ │ andsls r5, r3, r4, lsl r5 │ │ stmib sp, {r1, r4, r8, r9, sl, ip, pc}^ │ │ - @ instruction: 0xf0739410 │ │ - stmdacs r0, {r0, r2, r6, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xf00c9410 │ │ + stmdacs r0, {r0, r1, r2, r3, r6, r7, sl, fp, ip, sp, lr, pc} │ │ adcshi pc, pc, r0 │ │ @ instruction: 0xf8d0464e │ │ strmi r9, [r3], r0 │ │ @ instruction: 0xf1b92000 │ │ @ instruction: 0xf8cb0f00 │ │ @ instruction: 0xf0000000 │ │ vsra.u32 d8, d1, #1 │ │ @@ -2724,38 +2737,38 @@ │ │ @ instruction: 0xf9def001 │ │ ldrdeq pc, [r0], -fp │ │ @ instruction: 0xf8cb9f05 │ │ cmnlt r0, r0 │ │ svchi 0x005bf3bf │ │ svcne 0x0000e850 │ │ stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ - blcs 2d358 │ │ + blcs 2d38c │ │ stmdbcs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ vaddw.u , , d3 │ │ @ instruction: 0xf06f8f5b │ │ - ldmdals r7, {r0, r2, r4, r7, r8, fp, ip, sp, lr, pc} │ │ + ldmdals r7, {r0, r4, r5, r7, r8, fp, ip, sp, lr, pc} │ │ rsbsle r2, fp, r3, lsl #16 │ │ ldmib sp, {r0, r1, r2, r4, r8, r9, fp, sp, pc}^ │ │ movwgt r1, #29208 @ 0x7218 │ │ @ instruction: 0x5058f89d │ │ andsle r2, pc, r2, lsl #26 │ │ @ instruction: 0x4610e9dd │ │ stmdbcs r0, {r0, r4, r5, fp, sp, lr} │ │ qadd16mi fp, r0, ip │ │ ldmdavs r0!, {r3, r7, r8, r9, sl, lr}^ │ │ svclt 0x001c2800 │ │ @ instruction: 0xf0b44620 │ │ - ldcls 8, cr14, [r5], {24} │ │ + ldcls 8, cr14, [r5], {6} │ │ smlattle r3, r8, r7, r0 │ │ subeq r6, r0, r8, ror r8 │ │ rschi pc, sp, r0, asr #32 │ │ vaddl.u q1, d15, d0 │ │ ldmda r4, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ stmda r4, {r8, r9, sl, fp, ip}^ │ │ - bcs 24fb4 │ │ + bcs 24fe8 │ │ stmdbcs r2, {r0, r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ sbcshi pc, sl, r0 │ │ stmdacs r2, {r0, r1, r2, r4, fp, ip, pc} │ │ @ instruction: 0xf04fd106 │ │ strbmi r0, [r8], -r0, lsl #18 │ │ eorlt r4, r1, r1, lsr #12 │ │ svchi 0x00f0e8bd │ │ @@ -2773,15 +2786,15 @@ │ │ vtbl.8 d9, {d15-d17}, d0 │ │ addvs r8, r8, fp, asr pc │ │ rsbseq pc, r0, r6, lsl #2 │ │ @ instruction: 0xf94cf002 │ │ ldrb r2, [r6, r2] │ │ vrsubhn.i d4, , q12 │ │ @ instruction: 0xf0538f2f │ │ - ldrb pc, [r2, #-2164] @ 0xfffff78c @ │ │ + ldrb pc, [r2, #-2190] @ 0xfffff772 @ │ │ @ instruction: 0xf04f2700 │ │ @ instruction: 0x9c020900 │ │ @ instruction: 0xf1b9e62f │ │ vcvt.u32.f32 d0, d14, #1 │ │ @ instruction: 0xd1238f5b │ │ @ instruction: 0xf1b89c02 │ │ @ instruction: 0xf0000f00 │ │ @@ -2793,60 +2806,60 @@ │ │ tsteq r0, r2, asr #16 │ │ mvnsle r2, r0, lsl #18 │ │ ldmdbeq lr, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ svchi 0x005bf3bf │ │ andhi pc, r0, r7, asr #17 │ │ svcls 0x0005e61a │ │ ldmdbge r0, {r0, r1, r2, r4, fp, sp, pc} │ │ - mrrc2 0, 0, pc, lr, cr2 @ │ │ + blx 15e08aa │ │ @ instruction: 0x5058f89d │ │ @ instruction: 0xf47f2d02 │ │ str sl, [r1, r3, lsl #31]! │ │ str r9, [r4], -r2, lsl #24 │ │ - bls 65efb4 │ │ + bls 65efe8 │ │ ldr r2, [ip, r0] │ │ @ instruction: 0x21284847 │ │ ldrbtmi r4, [r8], #-2631 @ 0xfffff5b9 │ │ @ instruction: 0xf01b447a │ │ - ldrdcs pc, [r4], -pc @ │ │ + andcs pc, r4, r9, asr #20 │ │ @ instruction: 0x71bcf44f │ │ - blx ff2a0900 │ │ - @ instruction: 0xff38f052 │ │ - beq a0aa4 │ │ + ldc2 0, cr15, [r3], #-100 @ 0xffffff9c │ │ + @ instruction: 0xff52f052 │ │ + beq a0ad8 │ │ stmdacs r0, {r4, r5, r8, r9, fp, ip, sp, lr} │ │ ldcge 4, cr15, [r7, #-252] @ 0xffffff04 │ │ - bge 6b6998 │ │ + bge 6b69cc │ │ ldmdbmi fp!, {r1, r3, r4, r5, r8, r9, fp, lr} │ │ ldrbtmi r4, [fp], #-1144 @ 0xfffffb88 │ │ rsbge pc, ip, sp, lsl #17 │ │ tstls r0, r9, ror r4 │ │ ldrls r2, [sl, #-299] @ 0xfffffed5 │ │ - ldc2l 0, cr15, [r6, #112]! @ 0x70 │ │ + @ instruction: 0xff60f01c │ │ strmi r4, [r4], -r6, lsr #12 │ │ @ instruction: 0x462920f0 │ │ movwcs r2, #4737 @ 0x1281 │ │ - svc 0x007ef0b3 │ │ + svc 0x006cf0b3 │ │ ldrtmi r4, [r4], -r0, lsr #12 │ │ stmdbcs r0, {r1, r2, r3, r8, fp, ip, pc} │ │ - ldcge 4, cr15, [pc, #-508] @ 246e8 │ │ + ldcge 4, cr15, [pc, #-508] @ 2471c │ │ strtmi r6, [r5], -r1, lsr #16 │ │ svclt 0x001c2900 │ │ strmi r4, [r8, r8, asr #12] │ │ stmdacs r0, {r3, r5, r6, fp, sp, lr} │ │ @ instruction: 0x4648bf1c │ │ - svc 0x0064f0b3 │ │ + svc 0x0052f0b3 │ │ ldrbtmi r4, [r8], #-2085 @ 0xfffff7db │ │ - @ instruction: 0xf89cf01b │ │ + blx 1e09a4 │ │ strmi r4, [r4], -r7, lsr #12 │ │ - @ instruction: 0xff02f052 │ │ + @ instruction: 0xff1cf052 │ │ strtmi r4, [r0], -r1, lsl #12 │ │ stmdbcs r0, {r2, r3, r4, r5, r9, sl, lr} │ │ tstcs r1, r4, lsl #30 │ │ ldrbt r7, [r2], #817 @ 0x331 │ │ - blx b60ae4 │ │ + blx 1260b18 │ │ andcs r4, r2, r0, lsl #13 │ │ subseq pc, r8, sp, lsl #17 │ │ ldmdbge sl, {r1, r2, fp, sp, pc} │ │ stmib sp, {r1, r6, r9, sl, lr}^ │ │ ldmdage r7, {r2, r3, r4, ip, sp, lr} │ │ addge pc, r0, sp, lsl #17 │ │ ldrpl lr, [lr, #-2509] @ 0xfffff633 │ │ @@ -2856,87 +2869,87 @@ │ │ ldmda r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ cdpne 15, 4, cr1, cr10, cr0, {0} │ │ movwcs lr, #2112 @ 0x840 │ │ mvnsle r2, r0, lsl #22 │ │ stmdbcs r1, {r0, r2, r8, r9, sl, fp, ip, pc} │ │ mrcge 4, 7, APSR_nzcv, cr15, cr15, {1} │ │ @ instruction: 0xf052e701 │ │ - stmdacs r0, {r0, r2, r4, r6, r7, r9, sl, fp, ip, sp, lr, pc} │ │ + stmdacs r0, {r0, r1, r2, r3, r5, r6, r7, r9, sl, fp, ip, sp, lr, pc} │ │ andcs fp, r1, r4, lsl #30 │ │ @ instruction: 0xe69b7330 │ │ @ instruction: 0x462120f0 │ │ movwcs r2, #4737 @ 0x1281 │ │ - svc 0x002cf0b3 │ │ + svc 0x001af0b3 │ │ @ instruction: 0xf052e71e │ │ - stmdacs r0, {r0, r1, r2, r6, r7, r9, sl, fp, ip, sp, lr, pc} │ │ + stmdacs r0, {r0, r5, r6, r7, r9, sl, fp, ip, sp, lr, pc} │ │ andcs fp, r1, r4, lsl #30 │ │ str r7, [fp, -r0, lsr #2] │ │ ldrbtmi r4, [r8], #-2055 @ 0xfffff7f9 │ │ - @ instruction: 0xf854f01b │ │ - ldrdeq r5, [fp], -r6 │ │ - @ instruction: 0xffff4bd3 │ │ - andeq r5, fp, r6, lsr r8 │ │ - andeq r5, fp, r8, lsl #14 │ │ - @ instruction: 0xffff4bc7 │ │ - andeq r5, fp, r8, lsl r7 │ │ - andeq r5, fp, r6, lsr #12 │ │ + @ instruction: 0xf9bef01b │ │ + @ instruction: 0x000b56b2 │ │ + @ instruction: 0xffff4b9f │ │ + andeq r5, fp, r2, lsr r8 │ │ + andeq r5, fp, r4, ror #13 │ │ + @ instruction: 0xffff4b93 │ │ + strdeq r5, [fp], -r4 │ │ + andeq r5, fp, r2, lsl #12 │ │ svcmi 0x00f0e92d │ │ ldrmi fp, [r5], -r7, lsr #1 │ │ tstlt r9, #135266304 @ 0x8100000 │ │ cmple r4, r1, lsl #18 │ │ @ instruction: 0x0009f8b3 │ │ @ instruction: 0xf8ad7ad9 │ │ @ instruction: 0xf88d0030 │ │ ldmib r3, {r1, r4, r5, ip}^ │ │ - bvc 73f1d4 │ │ + bvc 73f208 │ │ ldrdhi pc, [r0], -r5 @ │ │ svchi 0x005bf3bf │ │ vtbx.8 d6, {d15-d17}, d31 │ │ - b 1808750 │ │ + b 1808784 │ │ @ instruction: 0xf04070c8 │ │ stmib sp, {r3, r5, r7, pc}^ │ │ @ instruction: 0xf1059401 │ │ @ instruction: 0xf1050320 │ │ stmib sp, {r2, r5, r8, fp}^ │ │ @ instruction: 0xf04f6a03 │ │ strcs r0, [r0], #-2560 @ 0xfffff600 │ │ adcs r9, r1, r6, lsl #6 │ │ @ instruction: 0x0009f8b3 │ │ - beq 60b48 │ │ + beq 60b7c │ │ eoreq pc, r0, sp, lsr #17 │ │ andcs pc, r0, ip, asr #12 │ │ andvc lr, r0, #3457024 @ 0x34c000 │ │ addscc pc, sl, r3, asr #13 │ │ stmib sp, {r0, r3, r4, r6, r7, r9, fp, ip, sp, lr}^ │ │ @ instruction: 0xf88d7205 │ │ andls r1, lr, r2, lsr #32 │ │ addge pc, r8, sp, asr #17 │ │ - bge 85f164 │ │ - bge 7df168 │ │ + bge 85f198 │ │ + bge 7df19c │ │ mulhi r8, r3, r8 │ │ vstmiavs r9!, {s12-s51} │ │ @ instruction: 0xf0004201 │ │ @ instruction: 0xf1b8811d │ │ @ instruction: 0xf0000f02 │ │ @ instruction: 0xf8bd8313 │ │ @ instruction: 0xf89d0020 │ │ - bls 168adc │ │ + bls 168b10 │ │ rsbseq pc, r5, sp, lsr #17 │ │ andsls r9, ip, r6, lsl #16 │ │ andsls r2, fp, #1 │ │ rsbsne pc, r7, sp, lsl #17 │ │ rsbshi pc, r4, sp, lsl #17 │ │ @ instruction: 0xf8b3e397 │ │ @ instruction: 0xf1050009 │ │ @ instruction: 0xf8ad0608 │ │ @ instruction: 0xf64c001c │ │ @ instruction: 0xf6c32000 │ │ @ instruction: 0xf893309a │ │ andls fp, sl, r8 │ │ - bvc ff66ca88 │ │ + bvc ff66cabc │ │ strcs lr, [r0], #-2515 @ 0xfffff62d │ │ stmib sp, {r4, ip, pc}^ │ │ stmib sp, {r1, r2, r3}^ │ │ andcs r0, r1, ip │ │ @ instruction: 0xf88d9206 │ │ ldmda r6, {r1, r2, r3, r4, ip}^ │ │ stmdbcs r0, {r8, r9, sl, fp, ip} │ │ @@ -2944,15 +2957,15 @@ │ │ tsteq r0, r6, asr #16 │ │ mvnsle r2, r0, lsl #18 │ │ svchi 0x005bf3bf │ │ @ instruction: 0x46ca4fd0 │ │ ldmdavs r8!, {r0, r1, r2, r3, r4, r5, r6, sl, lr}^ │ │ @ instruction: 0xf0400040 │ │ @ instruction: 0xf04f8335 │ │ - blvc a26ec8 │ │ + blvc a26efc │ │ @ instruction: 0xf0402800 │ │ @ instruction: 0xf10d8337 │ │ @ instruction: 0xf1050878 │ │ strbmi r0, [r0], -r8, lsr #2 │ │ ldc2 0, cr15, [r6, #4] │ │ stmdacs r0, {r1, r2, r3, r4, fp, ip, pc} │ │ @ instruction: 0x81a8f000 │ │ @@ -2960,16 +2973,16 @@ │ │ tstls r0, r0, lsl #30 │ │ ldmdavs r9!, {r0, r1, r8, ip, lr, pc}^ │ │ @ instruction: 0xf0400049 │ │ tstcs r0, ip, ror #6 │ │ vqshlu.s64 q2, , #63 @ 0x3f │ │ ldmda r6, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ stmda r6, {r8, r9, sl, fp, sp}^ │ │ - blcs 29708 │ │ - bcs d92f0 │ │ + blcs 2973c │ │ + bcs d9324 │ │ msrhi CPSR_s, #0 │ │ stmdbcs r0, {r4, r8, fp, ip, pc} │ │ msrhi CPSR_fs, #0 │ │ mulscs lr, sp, r8 │ │ @ instruction: 0x301cf8bd │ │ sbcvc r9, sl, #6, 30 │ │ @ instruction: 0xf8812201 │ │ @@ -2978,61 +2991,61 @@ │ │ vaddl.u , d15, d9 │ │ movwvc r8, #44891 @ 0xaf5b │ │ @ instruction: 0xf8bde31d │ │ @ instruction: 0xf89d0030 │ │ @ instruction: 0xf88d1032 │ │ @ instruction: 0xf8ad107a │ │ add r0, r7, #120 @ 0x78 │ │ - beq a0c8c │ │ + beq a0cc0 │ │ ldrdhi pc, [r0], -r3 │ │ svchi 0x005bf3bf │ │ ldrdvc pc, [r0], -r9 │ │ svchi 0x005bf3bf │ │ sbcvc lr, r8, pc, asr sl │ │ subhi pc, r2, #64 @ 0x40 │ │ - bleq 1161a8c │ │ + bleq 1161ac0 │ │ svceq 0x001ff1bb │ │ - blx 2d901a │ │ + blx 2d904e │ │ strls pc, [r5], #-1546 @ 0xfffff9f6 │ │ subeq lr, sl, pc, asr #20 │ │ @ instruction: 0xf1ba1c44 │ │ andle r0, r7, #7, 30 │ │ svceq 0x0000f1ba │ │ ldrtmi sp, [r0], -r7 │ │ svclt 0x00103801 │ │ strd sp, [r2], -ip │ │ - mrc 0, 1, APSR_nzcv, cr14, cr3, {5} │ │ + mcr 0, 1, pc, cr12, cr3, {5} @ │ │ @ instruction: 0xf8d39b06 │ │ vaddl.u q4, d15, d0 │ │ @ instruction: 0xf8d98f5b │ │ vaddl.u , d15, d0 │ │ - b 1808918 │ │ + b 180894c │ │ @ instruction: 0xf04070c8 │ │ strtmi r8, [r6], #-542 @ 0xfffffde2 │ │ - bleq 1161ad8 │ │ + bleq 1161b0c │ │ @ instruction: 0xf10a3402 │ │ @ instruction: 0xf1bb0a01 │ │ sbcsle r0, ip, pc, lsl pc │ │ @ instruction: 0xf1bb9c05 │ │ svclt 0x00080f1e │ │ tstle r9, r0, lsl #24 │ │ rscsvc pc, sl, pc, asr #8 │ │ @ instruction: 0xf0b32101 │ │ - blls 1e0474 │ │ + blls 1e0460 │ │ stmdacs r0, {r2, r9, sl, lr} │ │ addshi pc, pc, #0 │ │ ldmda r3, {r0, r1, r2, r3, r4, r6, r8, ip, sp, pc}^ │ │ strbmi r0, [r0, #-3840] @ 0xfffff100 │ │ @ instruction: 0xf108d128 │ │ vaddl.u q0, d15, d2 │ │ stmda r3, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ - bllt 664ffc │ │ + bllt 665030 │ │ vst1.16 {d30-d33}, [pc], r9 │ │ strdcs r7, [r1, -sl] │ │ - mcr 0, 0, pc, cr14, cr3, {5} @ │ │ + ldcl 0, cr15, [ip, #716]! @ 0x2cc │ │ @ instruction: 0xf0002800 │ │ strmi r8, [r7], -sl, lsl #5 │ │ svceq 0x0000e859 │ │ stmdblt r0, {r1, r2, r8, r9, fp, ip, pc}^ │ │ svchi 0x005bf3bf │ │ andvc lr, r0, r9, asr #16 │ │ ldmda r9, {r4, r8, r9, ip, sp, pc}^ │ │ @@ -3052,20 +3065,20 @@ │ │ movtmi sl, #3961 @ 0xf79 │ │ svclt 0x00103801 │ │ @ instruction: 0xf10ad1fc │ │ ldrb r0, [r3, -r1, lsl #20]! │ │ stmdacs r0, {r0, sp} │ │ tstlt ip, r1, ror #3 │ │ @ instruction: 0xf0b34620 │ │ - blls 1e0318 │ │ + blls 1e0304 │ │ @ instruction: 0xe769463c │ │ - bleq 861094 │ │ + bleq 8610c8 │ │ and r2, r7, r0, lsl #8 │ │ - stcl 0, cr15, [r6, #716] @ 0x2cc │ │ - bvs a31c90 │ │ + ldc 0, cr15, [r4, #716]! @ 0x2cc │ │ + bvs a31cc4 │ │ andmi r6, r1, #43264 @ 0xa900 │ │ mrcge 4, 6, APSR_nzcv, cr7, cr15, {3} │ │ @ instruction: 0xf8d53901 │ │ mulmi r1, r4, r0 │ │ tsteq lr, fp, ror #24 │ │ @ instruction: 0xf3bf5996 │ │ adcsmi r8, r0, #364 @ 0x16c │ │ @@ -3083,97 +3096,97 @@ │ │ addmi r4, r1, #285212672 @ 0x11000000 │ │ stccs 0, cr13, [r6], {52} @ 0x34 │ │ andeq pc, r6, pc, asr #32 │ │ qasxmi fp, r0, r8 │ │ movtmi fp, #500 @ 0x1f4 │ │ svclt 0x00103801 │ │ @ instruction: 0xe7cbd1fc │ │ - stclvs 2, cr4, [pc], #-364 @ 24b88 │ │ + stclvs 2, cr4, [pc], #-364 @ 24bbc │ │ ldrtmi r4, [fp], #-3 │ │ svcvc 0x0000e85b │ │ bicsle r4, sp, r7, lsl #5 │ │ svchi 0x005bf3bf │ │ strcc lr, [r0, -fp, asr #16] │ │ @ instruction: 0xf0002f00 │ │ stccs 1, cr8, [r6], {79} @ 0x4f │ │ andeq pc, r6, pc, asr #32 │ │ qasxmi fp, r0, r8 │ │ movtmi fp, #292 @ 0x124 │ │ svclt 0x00103801 │ │ @ instruction: 0xe7b1d1fc │ │ - bvs a2dd2c │ │ + bvs a2dd60 │ │ andmi r6, r1, #43264 @ 0xa900 │ │ @ instruction: 0xe688d0b2 │ │ adcle r2, r7, #1792 @ 0x700 │ │ adcle r2, r7, r0, lsl #24 │ │ @ instruction: 0xf004fb04 │ │ svclt 0x00103801 │ │ @ instruction: 0xe7a1d1fc │ │ @ instruction: 0xf64c9c0e │ │ @ instruction: 0xf6c32000 │ │ addmi r3, r4, #154 @ 0x9a │ │ ldmdage r2, {r0, r2, r4, ip, lr, pc} │ │ @ instruction: 0x670ce9dd │ │ - ldc2l 0, cr15, [r6], #444 @ 0x1bc │ │ + ldc2 0, cr15, [r2, #-444] @ 0xfffffe44 │ │ @ instruction: 0x0112e9dd │ │ andeq lr, r7, #528384 @ 0x81000 │ │ movweq lr, #27264 @ 0x6a80 │ │ tstle r3, sl, lsl r3 │ │ adcmi r9, r0, #20, 16 @ 0x140000 │ │ bic sp, r6, r5, lsl #6 │ │ - bl 1c6bb78 │ │ + bl 1c6bbac │ │ vaddl.s8 q0, d0, d7 │ │ stmdage ip, {r1, r6, r7, r8, pc} │ │ andspl lr, fp, sp, asr #19 │ │ andsls sl, sl, lr, lsl r8 │ │ - stc2l 0, cr15, [lr], #456 @ 0x1c8 │ │ + @ instruction: 0xf978f00c │ │ stmdavs r6, {r7, r8, r9, ip, sp, pc} │ │ @ instruction: 0xf8c04604 │ │ orrlt sl, lr, #0 │ │ svchi 0x005bf3bf │ │ andge pc, ip, r6, asr #17 │ │ svchi 0x005bf3bf │ │ andsge pc, r0, r6, asr #17 │ │ @ instruction: 0x011be9dd │ │ tsteq r3, sp, asr #19 │ │ andsls sl, r2, lr, lsl r8 │ │ @ instruction: 0x4631a812 │ │ rsbge pc, r8, sp, asr #17 │ │ - blx fede0dc6 │ │ + blx fede0dfa │ │ eorvs r6, r6, r0, lsr #16 │ │ vsra.u32 , q8, #1 │ │ ldmda r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ cdpne 15, 4, cr1, cr10, cr0, {0} │ │ movwcs lr, #2112 @ 0x840 │ │ mvnsle r2, r0, lsl #22 │ │ tstle r3, r1, lsl #18 │ │ svchi 0x005bf3bf │ │ - cdp2 0, 5, cr15, cr6, cr14, {3} │ │ + cdp2 0, 7, cr15, cr2, cr14, {3} │ │ vstmiavs r9!, {s12-s51} │ │ @ instruction: 0xf43f4201 │ │ strt sl, [r8], -r9, asr #30 │ │ @ instruction: 0xf002a81a │ │ - ldrb pc, [r5, r9, lsr #18]! @ │ │ - andeq r9, fp, r0, ror #25 │ │ - @ instruction: 0xffbcf070 │ │ + ubfx pc, r3, #17, #22 │ │ + andeq r9, fp, ip, asr #25 │ │ + @ instruction: 0xffd8f070 │ │ ldmib sp, {r2, r9, sl, lr}^ │ │ stmib sp, {r0, r1, r3, r4, r8}^ │ │ ldmdage lr, {r0, r1, r4, r8} │ │ ldmdage r2, {r1, r4, ip, pc} │ │ @ instruction: 0xf8cd4621 │ │ @ instruction: 0xf001a068 │ │ vtbl.8 d15, {d31- │ │ - bls 1d1afc │ │ + bls 1d1b30 │ │ svceq 0x0000f1b9 │ │ mulseq lr, sp, r8 │ │ @ instruction: 0x101cf8bd │ │ @ instruction: 0xf04f921b │ │ @ instruction: 0xf88d0201 │ │ ldrls fp, [ip], #-116 @ 0xffffff8c │ │ @ instruction: 0xf8ad921a │ │ @@ -3188,23 +3201,23 @@ │ │ mvnsle r2, r0, lsl #20 │ │ @ instruction: 0xf0402902 │ │ rscscs r8, r0, fp, lsl #3 │ │ add r4, ip, r1, lsr r6 │ │ @ instruction: 0xf89d9a06 │ │ @ instruction: 0xf8bd001e │ │ stmib sp, {r2, r3, r4, ip}^ │ │ - bge 23d6e8 │ │ - bge 3496e8 │ │ + bge 23d71c │ │ + bge 34971c │ │ subslt pc, ip, sp, lsl #17 │ │ andsls r9, r2, #369098752 @ 0x16000000 │ │ subsne pc, sp, sp, lsr #17 │ │ subseq pc, pc, sp, lsl #17 │ │ rsbls pc, r4, sp, lsl #17 │ │ - @ instruction: 0xf0729618 │ │ - stmdacs r0, {r0, r3, r4, r6, sl, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xf00c9618 │ │ + stmdacs r0, {r0, r1, r5, r6, r7, fp, ip, sp, lr, pc} │ │ tstphi r6, r0 @ p-variant is OBSOLETE │ │ strmi r9, [r5], -r5, lsl #14 │ │ andcs r6, r0, r7, lsl #16 │ │ svccs 0x00006028 │ │ orrhi pc, fp, r0 │ │ svchi 0x005bf3bf │ │ ldmdbge r2, {r3, r4, r5, r6, r7, sp, lr} │ │ @@ -3224,48 +3237,48 @@ │ │ @ instruction: 0xf0019094 │ │ stmdavs r8!, {r0, r6, fp, ip, sp, lr, pc} │ │ ldrdvs r4, [pc], -r1 @ │ │ cmnlt r0, r5, lsl #30 │ │ svchi 0x005bf3bf │ │ svcne 0x0000e850 │ │ stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ - blcs 2db28 │ │ + blcs 2db5c │ │ stmdbcs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ vaddw.u , , d3 │ │ @ instruction: 0xf06e8f5b │ │ - blge 6e45ec │ │ + blge 6e4690 │ │ ldcleq 1, cr15, [r8], #-52 @ 0xffffffcc │ │ stmdacs r3, {r0, r1, r2, r3, r8, r9, fp, lr, pc} │ │ andeq lr, lr, ip, lsl #17 │ │ sbcshi pc, r1, r0 │ │ @ instruction: 0xf10dab1e │ │ - blgt 3a80f0 │ │ + blgt 3a8124 │ │ andeq lr, pc, ip, lsl #17 │ │ mlspl r4, sp, r8, pc @ │ │ @ instruction: 0xf0002d02 │ │ ldmib sp, {r0, r2, r3, r4, r8, pc}^ │ │ ldmdavs r1!, {r0, r2, r4, r9, sl, lr} │ │ svclt 0x001c2900 │ │ strmi r4, [r8, r0, lsr #12] │ │ stmdacs r0, {r4, r5, r6, fp, sp, lr} │ │ qadd16mi fp, r0, ip │ │ - stc 0, cr15, [r6], #-716 @ 0xfffffd34 │ │ + ldc 0, cr15, [r4], {179} @ 0xb3 │ │ @ instruction: 0x07e89c18 │ │ ldmdavs r8!, {r0, r1, r8, ip, lr, pc}^ │ │ @ instruction: 0xf0400040 │ │ andcs r8, r0, r5, ror #2 │ │ svchi 0x005bf3bf │ │ svcne 0x0000e854 │ │ andeq lr, r0, #68, 16 @ 0x440000 │ │ mvnsle r2, r0, lsl #20 │ │ @ instruction: 0xf0402902 │ │ ldrshtcs r8, [r0], #13 │ │ addcs r4, r1, #34603008 @ 0x2100000 │ │ @ instruction: 0xf0b32301 │ │ - rscs lr, r5, r6, lsl ip │ │ + rscs lr, r5, r4, lsl #24 │ │ svchi 0x005bf3bf │ │ tstne r1, r2, lsl #22 │ │ @ instruction: 0xf89d3001 │ │ @ instruction: 0xf8bd2022 │ │ ldmib sp, {r5, ip, sp}^ │ │ stmib sp, {r0, r2, r8, r9, sl, sp, lr}^ │ │ stmib r1, {r1, r2, r3, r4, ip}^ │ │ @@ -3273,23 +3286,23 @@ │ │ @ instruction: 0xf8a1800c │ │ bicvc r3, sl, #13 │ │ svchi 0x005bf3bf │ │ @ instruction: 0xf1056008 │ │ eors r0, r9, r0, ror r0 │ │ vqshlu.s32 d4, d16, #31 │ │ @ instruction: 0xf0528f2f │ │ - strb pc, [r3, #-3212]! @ 0xfffff374 @ │ │ + strb pc, [r3, #-3238]! @ 0xfffff35a @ │ │ strcs r9, [r0, -r5, lsl #8] │ │ - bleq 61130 │ │ - beq 26142c │ │ + bleq 61164 │ │ + beq 261460 │ │ @ instruction: 0xf8dd9805 │ │ ldm sl, {r2, ip, pc} │ │ stmdacs r0, {r4, r6, sl} │ │ @ instruction: 0xf0b3bf18 │ │ - @ instruction: 0xf8bdebde │ │ + @ instruction: 0xf8bdebcc │ │ @ instruction: 0xf89d0030 │ │ @ instruction: 0xf88d1032 │ │ @ instruction: 0xf8ad107a │ │ mvnslt r0, r8, ror r0 │ │ andne lr, fp, r7, lsl #22 │ │ tstne fp, pc, asr #20 │ │ @ instruction: 0xf89d7204 │ │ @@ -3319,15 +3332,15 @@ │ │ rsbsne pc, r7, sp, lsl #17 │ │ rsbsmi pc, r4, sp, lsl #17 │ │ rsbsge pc, r0, sp, asr #17 │ │ @ instruction: 0xf1bbe083 │ │ vcvt.u32.f32 d0, d14, #1 │ │ teqle r0, fp, asr pc │ │ strtmi r2, [r0], -r0, lsl #24 │ │ - bvs 11f818 │ │ + bvs 11f84c │ │ @ instruction: 0xf0009c02 │ │ vshr.u64 q4, q5, #1 │ │ @ instruction: 0x46028f5b │ │ andeq pc, r0, r9, asr #17 │ │ svchi 0x005bf3bf │ │ svceq 0x0000e853 │ │ stmda r3, {r1, ip, sp}^ │ │ @@ -3338,77 +3351,77 @@ │ │ @ instruction: 0xf04f0030 │ │ @ instruction: 0xf89d0b1e │ │ @ instruction: 0xf88d1032 │ │ @ instruction: 0xf8ad107a │ │ @ instruction: 0xf8dd0078 │ │ ldr r9, [r9, r4] │ │ ldmdage sl, {r0, r4, r6, r7, r9, sl, lr} │ │ - @ instruction: 0xf001a912 │ │ - @ instruction: 0xf89dffd9 │ │ + @ instruction: 0xf002a912 │ │ + @ instruction: 0xf89df81b │ │ stccs 0, cr5, [r2, #-400] @ 0xfffffe70 │ │ svcge 0x0031f47f │ │ strls lr, [r5], #-76 @ 0xffffffb4 │ │ @ instruction: 0xf89de778 │ │ @ instruction: 0xf8bd0022 │ │ - bls 16918c │ │ + bls 1691c0 │ │ rsbseq pc, r7, sp, lsl #17 │ │ andsls r9, ip, r6, lsl #16 │ │ andsls r2, fp, #0 │ │ rsbshi pc, r4, sp, lsl #17 │ │ rsbsne pc, r5, sp, lsr #17 │ │ andcs lr, r4, fp, lsr r0 │ │ mvnsvc pc, pc, asr #8 │ │ - mcr2 0, 4, pc, cr1, cr8, {0} @ │ │ - blx ffc61278 │ │ + @ instruction: 0xffebf018 │ │ + blx 2e12ae │ │ stmdbeq r1, {r7, ip, sp, lr, pc} │ │ stmdacs r0, {r3, r5, r8, r9, fp, ip, sp, lr} │ │ stclge 4, cr15, [r9], {63} @ 0x3f │ │ - bge 7b728c │ │ + bge 7b72c0 │ │ ldmdbmi r4, {r0, r1, r4, r6, r8, r9, fp, lr}^ │ │ ldrbtmi r4, [fp], #-1144 @ 0xfffffb88 │ │ rsbsls pc, ip, sp, lsl #17 │ │ tstls r0, r9, ror r4 │ │ ldrls r2, [lr], -fp, lsr #2 │ │ - @ instruction: 0xf9aef01c │ │ + blx 6611fe │ │ rscscs r4, r0, r5, lsl #12 │ │ addcs r4, r1, #51380224 @ 0x3100000 │ │ @ instruction: 0xf0b32301 │ │ - @ instruction: 0x4628eb38 │ │ + strtmi lr, [r8], -r6, lsr #22 │ │ stmdbcs r0, {r4, r8, fp, ip, pc} │ │ ldclge 4, cr15, [r4], {127} @ 0x7f │ │ svceq 0x0002f1bb │ │ tstcs r2, r7, ror r1 │ │ vsra.u32 d9, d10, #1 │ │ ldmda r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ cdpne 15, 4, cr1, cr10, cr0, {0} │ │ movwcs lr, #2112 @ 0x840 │ │ mvnsle r2, r0, lsl #22 │ │ tstle r3, r1, lsl #18 │ │ svchi 0x005bf3bf │ │ - ldc2l 0, cr15, [ip], #-440 @ 0xfffffe48 │ │ + ldc2 0, cr15, [r8], {110} @ 0x6e │ │ stmdacs r2, {r1, r3, r4, fp, ip, pc} │ │ andcs sp, r2, r5, lsl #2 │ │ andeq pc, r8, r9, lsl #17 │ │ pop {r0, r1, r2, r5, ip, sp, pc} │ │ @ instruction: 0x07c08ff0 │ │ @ instruction: 0xf10dbf1f │ │ - bgt 1e5b64 │ │ + bgt 1e5b98 │ │ andeq lr, r7, r9, lsl #17 │ │ svclt 0x0018b027 │ │ svchi 0x00f0e8bd │ │ @ instruction: 0x21284835 │ │ ldrbtmi r4, [r8], #-2613 @ 0xfffff5cb │ │ @ instruction: 0xf01a447a │ │ - strmi pc, [r7], -r1, asr #24 │ │ - blx fe7e131c │ │ + strmi pc, [r7], -fp, lsr #27 │ │ + blx fee61350 │ │ ldrtmi r4, [r8], -r1, lsl #12 │ │ svclt 0x00042900 │ │ @ instruction: 0x73292101 │ │ @ instruction: 0xf070e489 │ │ - bls 1e490c │ │ + bls 1e49b0 │ │ strmi r2, [r5], -r2, lsl #2 │ │ mulseq lr, sp, r8 │ │ rsbne pc, r4, sp, lsl #17 │ │ @ instruction: 0x101cf8bd │ │ eorvs lr, r0, #3358720 @ 0x334000 │ │ andsls sl, pc, #8, 20 @ 0x8000 │ │ @ instruction: 0xf8adaa0c │ │ @@ -3419,63 +3432,63 @@ │ │ strtls fp, [r2], #-140 @ 0xffffff74 │ │ addsls pc, r4, sp, lsl #17 │ │ @ instruction: 0xf0009624 │ │ @ instruction: 0x4628feb7 │ │ svchi 0x005bf3bf │ │ svcne 0x0000e850 │ │ stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ - blcs 2de34 │ │ + blcs 2de68 │ │ svcls 0x0005d1f8 │ │ stmdbcs r1, {r0, r4, r6, r7, r9, sl, lr} │ │ mrcge 4, 3, APSR_nzcv, cr7, cr15, {1} │ │ @ instruction: 0xf052e679 │ │ - stmdacs r0, {r0, r2, r5, r6, r9, fp, ip, sp, lr, pc} │ │ + stmdacs r0, {r0, r1, r2, r3, r4, r5, r6, r9, fp, ip, sp, lr, pc} │ │ andcs fp, r1, r4, lsl #30 │ │ str r7, [fp], -r8, lsr #6 │ │ - blx 17e139c │ │ + blx 1e613d0 │ │ svclt 0x00042800 │ │ @ instruction: 0x71202001 │ │ stmdami r9, {r0, r1, r4, r7, r9, sl, sp, lr, pc} │ │ @ instruction: 0xf01a4478 │ │ - stmdavs r1!, {r0, r1, r3, r5, r6, r7, r8, r9, fp, ip, sp, lr, pc} │ │ + stmdavs r1!, {r0, r2, r4, r6, r8, sl, fp, ip, sp, lr, pc} │ │ svclt 0x001c2900 │ │ strmi r9, [r8, r6, lsl #16] │ │ stmdacs r0, {r5, r6, fp, sp, lr} │ │ stmdals r6, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ - b fe961548 │ │ + b fe4e157c │ │ ldrbtmi r4, [r8], #-2050 @ 0xfffff7fe │ │ - blx ff7612ee │ │ - andeq r4, fp, r4, asr sp │ │ - andeq r4, fp, r6, asr sp │ │ - @ instruction: 0xffff4343 │ │ - andeq r4, fp, r6, lsr #31 │ │ - andeq r4, fp, r8, ror lr │ │ - @ instruction: 0xffff428b │ │ - ldrdeq r4, [fp], -ip │ │ + stc2l 0, cr15, [r6, #-104] @ 0xffffff98 │ │ + andeq r4, fp, r0, lsr sp │ │ + andeq r4, fp, r2, lsr sp │ │ + @ instruction: 0xffff430f │ │ + andeq r4, fp, r2, lsr #31 │ │ + andeq r4, fp, r4, asr lr │ │ + @ instruction: 0xffff4257 │ │ + @ instruction: 0x000b4db8 │ │ mvnsmi lr, sp, lsr #18 │ │ ldmib r0, {r2, r7, ip, sp, pc}^ │ │ @ instruction: 0xf1048400 │ │ strmi r0, [lr], -r0, asr #10 │ │ strtmi r4, [r8], -r7, lsl #12 │ │ @ instruction: 0x46414632 │ │ ldc2l 0, cr15, [r8], {1} │ │ vtbl.8 d6, {d15}, d16 │ │ - bvs 889030 │ │ + bvs 889064 │ │ svchi 0x005bf3bf │ │ stmdacs r2, {r3, r6, lr} │ │ - bvs 859ae0 │ │ + bvs 859b14 │ │ svchi 0x005bf3bf │ │ andsle r0, r2, r0, asr #15 │ │ svceq 0x0003e856 │ │ @ instruction: 0xf106b958 │ │ tstcs r1, ip │ │ svchi 0x005bf3bf │ │ andne lr, r0, #64, 16 @ 0x400000 │ │ ldmda r0, {r1, r3, r5, r8, ip, sp, pc}^ │ │ - bcs 30ef4 │ │ + bcs 30f28 │ │ vshr.u64 , q12, #1 │ │ @ instruction: 0xf3bf8f2f │ │ ldmvs r8!, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc} │ │ movwcs lr, #2512 @ 0x9d0 │ │ andls r6, r0, r0, lsl #17 │ │ @ instruction: 0xf0014630 │ │ cdpne 13, 4, cr15, cr1, cr13, {2} │ │ @@ -3488,26 +3501,26 @@ │ │ cdpne 15, 4, cr1, cr10, cr0, {0} │ │ movwcs lr, #2112 @ 0x840 │ │ mvnsle r2, r0, lsl #22 │ │ tstle r8, r1, lsl #18 │ │ svchi 0x005bf3bf │ │ pop {r2, ip, sp, pc} │ │ @ instruction: 0xf06e41f0 │ │ - stmdacs r3, {r0, r2, r5, r7, r8, r9, fp, ip, sp, pc} │ │ + stmdacs r3, {r0, r6, r7, r8, r9, fp, ip, sp, pc} │ │ andlt sp, r4, r6, lsl #2 │ │ ldrhhi lr, [r0, #141]! @ 0x8d │ │ ldrbtmi r4, [r8], #-2053 @ 0xfffff7fb │ │ - blx 1ce13c2 │ │ + ldc2l 0, cr15, [ip], {26} │ │ @ instruction: 0x21284804 │ │ ldrbtmi r4, [r8], #-2564 @ 0xfffff5fc │ │ @ instruction: 0xf01a447a │ │ - svclt 0x0000fb75 │ │ - andeq r6, fp, sl, ror ip │ │ - @ instruction: 0xffff40f3 │ │ - andeq r6, fp, ip, asr ip │ │ + svclt 0x0000fcdf │ │ + andeq r6, fp, r6, asr ip │ │ + @ instruction: 0xffff40bf │ │ + andeq r6, fp, r8, lsr ip │ │ ldrbmi lr, [r0, sp, lsr #18]! │ │ strmi fp, [r4], -r4, lsl #1 │ │ ldmda r4, {r0, sp}^ │ │ stmdbcs r0, {r8, r9, sl, fp, ip} │ │ teqphi r8, r0, asr #32 @ p-variant is OBSOLETE │ │ tsteq r0, r4, asr #16 │ │ mvnsle r2, r0, lsl #18 │ │ @@ -3521,138 +3534,138 @@ │ │ mlaseq r8, r4, r8, pc @ │ │ stmdacs r0, {r1, r3, r5, r7, r9, sl, lr} │ │ tstphi r2, r0, asr #32 @ p-variant is OBSOLETE │ │ ldrdpl lr, [r3], -r4 │ │ @ instruction: 0xf8842601 │ │ orrslt r6, r8, #56 @ 0x38 │ │ subeq lr, r0, r0, lsl #22 │ │ - bl 16efd4 │ │ + bl 16f008 │ │ and r0, r5, r0, lsl #19 │ │ svchi 0x002ff3bf │ │ svchi 0x005bf3bf │ │ eorle r4, r7, sp, asr #10 │ │ @ instruction: 0xf8554628 │ │ ldmda r1, {r2, r3, r8, r9, fp, ip}^ │ │ - bcs 30ff4 │ │ + bcs 31028 │ │ strdcc sp, [ip, -r2] │ │ svchi 0x005bf3bf │ │ andvc lr, r0, #4259840 @ 0x410000 │ │ ldmda r1, {r1, r5, r8, ip, sp, pc}^ │ │ - bcs 30ffc │ │ + bcs 31030 │ │ @ instruction: 0xe7e7d0f8 │ │ svchi 0x005bf3bf │ │ stmvs r0, {fp, sp, lr} │ │ svchi 0x005bf3bf │ │ tstpeq r8, r0, lsl #2 @ p-variant is OBSOLETE │ │ svceq 0x0000e851 │ │ andvs lr, r0, #4259840 @ 0x410000 │ │ mvnsle r2, r0, lsl #20 │ │ bicsle r3, fp, r1 │ │ addcs r2, r1, #240 @ 0xf0 │ │ @ instruction: 0xf0b32301 │ │ - @ instruction: 0xe7d5e9d6 │ │ + ldrb lr, [r5, r4, asr #19] │ │ ldrdvc lr, [r6], -r4 │ │ stmdacs r0, {r8, sp} │ │ suble r6, r1, r1, ror #3 │ │ subeq lr, r0, r0, lsl #22 │ │ - bl 1ee844 │ │ + bl 1ee878 │ │ ldmib r7, {r7, r9, sl}^ │ │ ldmda r0, {r8}^ │ │ ldmdblt r2, {r0, r1, r8, r9, sl, fp, sp}^ │ │ andeq pc, ip, #0, 2 │ │ svchi 0x005bf3bf │ │ movwne lr, #2114 @ 0x842 │ │ ldmda r2, {r0, r1, r4, r6, r7, r8, ip, sp, pc}^ │ │ - blcs 35060 │ │ + blcs 35094 │ │ vshr.u64 , q12, #1 │ │ @ instruction: 0xf3bf8f2f │ │ smlsdcc ip, fp, pc, r8 @ │ │ svchi 0x005bf3bf │ │ svcne 0x0000e850 │ │ stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ - blcs 2e07c │ │ + blcs 2e0b0 │ │ stmdbcs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ @ instruction: 0xf3bfbf04 │ │ @ instruction: 0xf06e8f5b │ │ - adcsmi pc, r7, #3072 @ 0xc00 │ │ + adcsmi pc, r7, #31744 @ 0x7c00 │ │ @ instruction: 0xe015d1d9 │ │ svchi 0x005bf3bf │ │ vtbl.8 d6, {d31}, d1 │ │ tstcc r8, fp, asr pc │ │ svccs 0x0000e851 │ │ movwpl lr, #2113 @ 0x841 │ │ mvnsle r2, r0, lsl #22 │ │ bicsle r3, lr, r1, lsl #4 │ │ rscscs r4, r0, r1, lsl #13 │ │ movwcs r2, #4737 @ 0x1281 │ │ - stmib lr, {r0, r1, r4, r5, r7, ip, sp, lr, pc} │ │ + ldmdb ip!, {r0, r1, r4, r5, r7, ip, sp, lr, pc}^ │ │ ldrb r4, [r6, r8, asr #12] │ │ @ instruction: 0xb3a86aa0 │ │ - bl 3fe58 │ │ + bl 3fe8c │ │ strcs r0, [r2, -r0, asr #32] │ │ - bl 16ecd0 │ │ + bl 16ed04 │ │ and r0, r5, r0, lsl #19 │ │ svchi 0x002ff3bf │ │ svchi 0x005bf3bf │ │ eorle r4, r7, sp, asr #10 │ │ @ instruction: 0xf8554628 │ │ ldmda r1, {r2, r3, r8, r9, fp, ip}^ │ │ - bcs 310f4 │ │ + bcs 31128 │ │ strdcc sp, [ip, -r2] │ │ svchi 0x005bf3bf │ │ andvc lr, r0, #4259840 @ 0x410000 │ │ ldmda r1, {r1, r5, r8, ip, sp, pc}^ │ │ - bcs 310fc │ │ + bcs 31130 │ │ @ instruction: 0xe7e7d0f8 │ │ svchi 0x005bf3bf │ │ stmvs r0, {fp, sp, lr} │ │ svchi 0x005bf3bf │ │ tstpeq r8, r0, lsl #2 @ p-variant is OBSOLETE │ │ svceq 0x0000e851 │ │ andvs lr, r0, #4259840 @ 0x410000 │ │ mvnsle r2, r0, lsl #20 │ │ bicsle r3, fp, r1 │ │ addcs r2, r1, #240 @ 0xf0 │ │ @ instruction: 0xf0b32301 │ │ - @ instruction: 0xe7d5e956 │ │ + ldrb lr, [r5, r4, asr #18] │ │ ldrdvc lr, [ip], -r4 │ │ stmdacs r0, {r8, sp} │ │ suble r6, r1, r1, ror #6 │ │ subeq lr, r0, r0, lsl #22 │ │ - bl 1ee944 │ │ + bl 1ee978 │ │ ldmib r7, {r7, r9, sl}^ │ │ ldmda r0, {r8}^ │ │ ldmdblt r2, {r0, r1, r8, r9, sl, fp, sp}^ │ │ andeq pc, ip, #0, 2 │ │ svchi 0x005bf3bf │ │ movwne lr, #2114 @ 0x842 │ │ ldmda r2, {r0, r1, r4, r6, r7, r8, ip, sp, pc}^ │ │ - blcs 35160 │ │ + blcs 35194 │ │ vshr.u64 , q12, #1 │ │ @ instruction: 0xf3bf8f2f │ │ smlsdcc ip, fp, pc, r8 @ │ │ svchi 0x005bf3bf │ │ svcne 0x0000e850 │ │ stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ - blcs 2e17c │ │ + blcs 2e1b0 │ │ stmdbcs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ @ instruction: 0xf3bfbf04 │ │ @ instruction: 0xf06e8f5b │ │ - adcsmi pc, r7, #536576 @ 0x83000 │ │ + adcsmi pc, r7, #651264 @ 0x9f000 │ │ @ instruction: 0xe015d1d9 │ │ svchi 0x005bf3bf │ │ vtbl.8 d6, {d31}, d1 │ │ tstcc r8, fp, asr pc │ │ svccs 0x0000e851 │ │ movwpl lr, #2113 @ 0x841 │ │ mvnsle r2, r0, lsl #22 │ │ bicsle r3, lr, r1, lsl #4 │ │ rscscs r4, r0, r1, lsl #13 │ │ movwcs r2, #4737 @ 0x1281 │ │ - stmdb lr, {r0, r1, r4, r5, r7, ip, sp, lr, pc} │ │ + ldm ip!, {r0, r1, r4, r5, r7, ip, sp, lr, pc}^ │ │ ldrb r4, [r6, r8, asr #12] │ │ svceq 0x0000f1b8 │ │ @ instruction: 0xf8dad103 │ │ subeq r0, r0, r4 │ │ andcs sp, r0, r2, lsr r1 │ │ svchi 0x005bf3bf │ │ svcne 0x0000e854 │ │ @@ -3660,96 +3673,96 @@ │ │ mvnsle r2, r0, lsl #20 │ │ svclt 0x001c2902 │ │ pop {r2, ip, sp, pc} │ │ ldrshtcs r8, [r0], #112 @ 0x70 │ │ addcs r4, r1, #34603008 @ 0x2100000 │ │ andlt r2, r4, r1, lsl #6 │ │ @ instruction: 0x47f0e8bd │ │ - stmlt r6, {r0, r1, r4, r5, r7, ip, sp, lr, pc} │ │ + ldmdalt r4!, {r0, r1, r4, r5, r7, ip, sp, lr, pc}^ │ │ vrsubhn.i d4, , q8 │ │ @ instruction: 0xf0528f2f │ │ - strb pc, [r7], r0, lsl #19 @ │ │ - @ instruction: 0xf884f052 │ │ + @ instruction: 0xe6c7f99a │ │ + @ instruction: 0xf89ef052 │ │ stmdaeq r1, {r7, ip, sp, lr, pc} │ │ stmdacs r0, {r5, r8, fp, ip, sp, lr} │ │ mcrge 4, 6, pc, cr12, cr15, {1} @ │ │ - bge b7644 │ │ + bge b7678 │ │ stmdbmi ip, {r0, r1, r3, r8, r9, fp, lr} │ │ ldrbtmi r4, [fp], #-1144 @ 0xfffffb88 │ │ andhi pc, ip, sp, lsl #17 │ │ strls r4, [r2], #-1145 @ 0xfffffb87 │ │ @ instruction: 0x212b9100 │ │ - @ instruction: 0xff42f01b │ │ - @ instruction: 0xf86ef052 │ │ + @ instruction: 0xf8acf01c │ │ + @ instruction: 0xf888f052 │ │ svclt 0x00042800 │ │ @ instruction: 0x71202001 │ │ svclt 0x0000e7c5 │ │ - andeq r9, fp, r2, lsl #8 │ │ - @ instruction: 0xffff3e6b │ │ - andeq r4, fp, lr, asr #21 │ │ - @ instruction: 0x000b69b8 │ │ + andeq r9, fp, lr, ror #7 │ │ + @ instruction: 0xffff3e37 │ │ + andeq r4, fp, sl, asr #21 │ │ + muleq fp, r4, r9 │ │ svcmi 0x00f0e92d │ │ @ instruction: 0xf8d1b08b │ │ stcge 0, cr11, [r4, #-0] │ │ ldrmi r6, [r6], -pc, asr #17 │ │ vst4.8 {d25-d28}, [pc], r3 │ │ strmi r7, [sl], r0, lsl #1 │ │ andseq pc, ip, sp, lsr #17 │ │ @ instruction: 0xf88d2002 │ │ @ instruction: 0xf1050018 │ │ andls r0, r2, r9 │ │ svceq 0x0000e856 │ │ stmda r6, {r0, r6, sl, fp, ip}^ │ │ - bcs 29e84 │ │ + bcs 29eb8 │ │ stmdacs r0, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ andshi pc, r1, #0, 2 │ │ - bvs e40180 │ │ + bvs e401b4 │ │ @ instruction: 0xf0004284 │ │ - bvs 1e45cfc │ │ + bvs 1e45d30 │ │ cmpeq r4, r4, lsl #22 │ │ eorvs pc, r1, r0, asr #16 │ │ addeq lr, r1, r0, lsl #22 │ │ stmib r0, {r0, r5, r6, sl, fp, ip}^ │ │ ldmib r7, {r0, r8, sl, ip, sp, pc}^ │ │ stmdacs r0, {r1, r2, ip, lr} │ │ @ instruction: 0xf04f62b9 │ │ mvnsvs r0, r0, lsl #2 │ │ - bl 597c4 │ │ + bl 597f8 │ │ @ instruction: 0xf04f0040 │ │ - bl 1676c8 │ │ + bl 1676fc │ │ ldmib r5, {r7, sl}^ │ │ ldmda r0, {r8}^ │ │ ldmdblt r2, {r0, r1, r8, r9, sl, fp, sp}^ │ │ andeq pc, ip, #0, 2 │ │ svchi 0x005bf3bf │ │ movwne lr, #2114 @ 0x842 │ │ ldmda r2, {r0, r1, r4, r6, r7, r8, ip, sp, pc}^ │ │ - blcs 352e4 │ │ + blcs 35318 │ │ vshr.u64 , q12, #1 │ │ @ instruction: 0xf3bf8f2f │ │ strcc r8, [ip, #-3931] @ 0xfffff0a5 │ │ svchi 0x005bf3bf │ │ svcne 0x0000e850 │ │ stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ - blcs 2e300 │ │ + blcs 2e334 │ │ stmdbcs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ @ instruction: 0xf3bfbf04 │ │ @ instruction: 0xf06e8f5b │ │ - adcmi pc, r5, #3162112 @ 0x304000 │ │ + adcmi pc, r5, #3620864 @ 0x374000 │ │ @ instruction: 0xe015d1d9 │ │ svchi 0x005bf3bf │ │ vtbl.8 d6, {d31}, d1 │ │ tstcc r8, fp, asr pc │ │ svccs 0x0000e851 │ │ movwhi lr, #2113 @ 0x841 │ │ mvnsle r2, r0, lsl #22 │ │ bicsle r3, lr, r1, lsl #4 │ │ rscscs r4, r0, r1, lsl #13 │ │ movwcs r2, #4737 @ 0x1281 │ │ - stmda ip, {r0, r1, r4, r5, r7, ip, sp, lr, pc}^ │ │ + ldmda sl!, {r0, r1, r4, r5, r7, ip, sp, lr, pc} │ │ ldrb r4, [r6, r8, asr #12] │ │ mulseq r0, sl, r8 │ │ ldmmi sp, {r3, r5, r8, fp, ip, sp, pc}^ │ │ stmdavs r0, {r3, r4, r5, r6, sl, lr}^ │ │ @ instruction: 0xf0400040 │ │ andcs r8, r0, r3, asr r1 │ │ svchi 0x005bf3bf │ │ @@ -3757,15 +3770,15 @@ │ │ andeq lr, r0, #4653056 @ 0x470000 │ │ mvnsle r2, r0, lsl #20 │ │ @ instruction: 0xf0002902 │ │ @ instruction: 0xf8da8140 │ │ ldmib r0, {r2}^ │ │ stmvs r0, {r8, r9, sp} │ │ ldrtmi r9, [r0], -r0 │ │ - blx 5e1782 │ │ + blx 5e17b6 │ │ @ instruction: 0xf010e8df │ │ andeq r0, r4, r3, asr #2 │ │ rsbeq r0, ip, ip, lsl #1 │ │ ldrdpl pc, [r8], -sl │ │ ldmda r5, {r0, sp}^ │ │ stmdbcs r0, {r8, r9, sl, fp, ip} │ │ tstphi sp, r0, asr #32 @ p-variant is OBSOLETE │ │ @@ -3785,51 +3798,51 @@ │ │ @ instruction: 0xf0002900 │ │ ldmdavs r3, {r1, r2, r5, r6, r8, pc}^ │ │ strcc r3, [r1, -ip, lsl #18] │ │ ldrbmi r3, [fp, #-524] @ 0xfffffdf4 │ │ adcsmi sp, r7, #-2147483587 @ 0x8000003d │ │ msrhi SPSR_sx, r0, lsl #1 │ │ @ instruction: 0x46a043f9 │ │ - bl 768b0 │ │ - bl 1e60f4 │ │ - bl 25d10 │ │ + bl 768e4 │ │ + bl 1e6128 │ │ + bl 25d44 │ │ addseq r0, r2, r1, lsl #1 │ │ @ instruction: 0xf8514601 │ │ @ instruction: 0xf0af4b0c │ │ - cdpcc 13, 0, cr15, cr1, cr6, {7} │ │ + mcrcc 12, 0, pc, cr1, cr6, {1} @ │ │ adcvs r2, lr, #0, 24 │ │ cmpphi r2, r0 @ p-variant is OBSOLETE │ │ svchi 0x005bf3bf │ │ svceq 0x0000e854 │ │ stmda r4, {r0, r6, r9, sl, fp, ip}^ │ │ - bcs 2a01c │ │ + bcs 2a050 │ │ stmdacs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ strtmi sp, [r0], -r4, lsl #2 │ │ svchi 0x005bf3bf │ │ - @ instruction: 0xf932f06e │ │ + @ instruction: 0xf94ef06e │ │ svceq 0x0000f1b9 │ │ @ instruction: 0xf8d8d104 │ │ subeq r0, r0, r4 │ │ msrhi CPSR_xc, r0, asr #32 │ │ vaddl.u q1, d15, d0 │ │ ldmda r5, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ stmda r5, {r8, r9, sl, fp, ip}^ │ │ - bcs 2604c │ │ + bcs 26080 │ │ stmdbcs r2, {r0, r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ mrshi pc, (UNDEF: 9) @ │ │ add r2, r6, r0 │ │ mulseq ip, sp, r8 │ │ svchi 0x005bf3bf │ │ @ instruction: 0xf0002800 │ │ @ instruction: 0xf89d8098 │ │ movwcs r0, #8216 @ 0x2018 │ │ @ instruction: 0x1604e9dd │ │ @ instruction: 0xf88d2802 │ │ @ instruction: 0xf0003018 │ │ - bls c5bb0 │ │ + bls c5be4 │ │ ldmvc r7, {r0, r1, r4, fp, pc} │ │ stmib r2, {r0, r1, r9, fp, ip, pc}^ │ │ sbcsvc r1, r7, #0, 12 │ │ andcc pc, r9, r2, lsr #17 │ │ mulsne r8, sp, r8 │ │ stmdbcs r2, {r4, r9, ip, sp, lr} │ │ rsbs sp, fp, pc, ror #2 │ │ @@ -3853,142 +3866,142 @@ │ │ @ instruction: 0xf0002900 │ │ ldmdavs r3, {r1, r5, r6, r7, pc}^ │ │ strcc r3, [r1, -ip, lsl #18] │ │ ldrbmi r3, [fp, #-524] @ 0xfffffdf4 │ │ adcsmi sp, r7, #-2147483587 @ 0x8000003d │ │ sbcshi pc, lr, r0, lsl #1 │ │ @ instruction: 0x46a043f9 │ │ - bl 769c0 │ │ - bl 1e6204 │ │ - bl 25e20 │ │ + bl 769f4 │ │ + bl 1e6238 │ │ + bl 25e54 │ │ addseq r0, r2, r1, lsl #1 │ │ @ instruction: 0xf8514601 │ │ @ instruction: 0xf0af4b0c │ │ - mcrcc 13, 0, pc, cr1, cr14, {2} @ │ │ + vmlacc.f64 d15, d17, d30 │ │ adcvs r2, lr, #0, 24 │ │ sbchi pc, sl, r0 │ │ svchi 0x005bf3bf │ │ svceq 0x0000e854 │ │ stmda r4, {r0, r6, r9, sl, fp, ip}^ │ │ - bcs 2a12c │ │ + bcs 2a160 │ │ stmdacs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ strtmi sp, [r0], -r4, lsl #2 │ │ svchi 0x005bf3bf │ │ - @ instruction: 0xf8aaf06e │ │ + @ instruction: 0xf8c6f06e │ │ svceq 0x0000f1b9 │ │ @ instruction: 0xf8d8d104 │ │ subeq r0, r0, r4 │ │ adchi pc, r2, r0, asr #32 │ │ vaddl.u q1, d15, d0 │ │ ldmda r5, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ stmda r5, {r8, r9, sl, fp, ip}^ │ │ - bcs 2615c │ │ + bcs 26190 │ │ stmdbcs r2, {r0, r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ addhi pc, r8, r0 │ │ - bls ed96c │ │ + bls ed9a0 │ │ andcs r7, r2, r0, lsl r0 │ │ mulsne r8, sp, r8 │ │ stmdbcs r2, {r4, r9, ip, sp, lr} │ │ ldmib sp, {r2, r3, ip, lr, pc}^ │ │ stmdavs r9!, {r2, r8, sl, lr} │ │ svclt 0x001c2900 │ │ strmi r4, [r8, r0, lsr #12] │ │ stmdacs r0, {r3, r5, r6, fp, sp, lr} │ │ qadd16mi fp, r0, ip │ │ - svc 0x001af0b2 │ │ + svc 0x0008f0b2 │ │ pop {r0, r1, r3, ip, sp, pc} │ │ strcs r8, [r1], #-4080 @ 0xfffff010 │ │ strcs r2, [r0], -r0, lsl #10 │ │ @ instruction: 0xf0b2e00b │ │ - @ instruction: 0xf89def3a │ │ + @ instruction: 0xf89def28 │ │ strtmi r0, [r5], #-28 @ 0xffffffe4 │ │ strcc r3, [r1], -r2, lsl #8 │ │ vtbl.8 d2, {d15}, d0 │ │ @ instruction: 0xf47f8f5b │ │ mcrcs 15, 0, sl, cr7, cr8, {2} │ │ mcrcs 2, 0, sp, cr0, cr1, {7} │ │ @ instruction: 0x4628d0f1 │ │ svclt 0x00103801 │ │ @ instruction: 0xe7ecd1fc │ │ eoreq pc, r0, r7, lsl #2 │ │ - @ instruction: 0xffc2f072 │ │ + @ instruction: 0xff94f072 │ │ strtmi lr, [r8], -r1, ror #12 │ │ svchi 0x002ff3bf │ │ - @ instruction: 0xff93f051 │ │ + @ instruction: 0xffadf051 │ │ strtmi lr, [r8], -r2, ror #13 │ │ svchi 0x002ff3bf │ │ - @ instruction: 0xff8df051 │ │ + @ instruction: 0xffa7f051 │ │ rscscs lr, r0, r4, ror #14 │ │ addcs r4, r1, #59768832 @ 0x3900000 │ │ @ instruction: 0xf0b22301 │ │ - @ instruction: 0xe6b8eef0 │ │ - mcr2 0, 4, pc, cr10, cr1, {2} @ │ │ + ssat lr, #25, lr, asr #29 │ │ + mcr2 0, 5, pc, cr4, cr1, {2} @ │ │ svclt 0x00042800 │ │ teqvc r8, r1 │ │ stmdami lr!, {r0, r2, r5, r7, r9, sl, sp, lr, pc} │ │ - bmi badeac │ │ + bmi badee0 │ │ ldrbtmi r4, [sl], #-1144 @ 0xfffffb88 │ │ - @ instruction: 0xf81ef01a │ │ + @ instruction: 0xf988f01a │ │ ldrbtmi r4, [r8], #-2102 @ 0xfffff7ca │ │ - @ instruction: 0xf810f01a │ │ - mrc2 0, 3, pc, cr8, cr1, {2} │ │ + @ instruction: 0xf97af01a │ │ + mrc2 0, 4, pc, cr2, cr1, {2} │ │ stmdbeq r1, {r7, ip, sp, lr, pc} │ │ stmdacs r0, {r3, r5, r8, fp, ip, sp, lr} │ │ mcrge 4, 6, pc, cr8, cr15, {1} @ │ │ - blmi a37acc │ │ + blmi a37b00 │ │ ldrbtmi r4, [r8], #-2344 @ 0xfffff6d8 │ │ ldrbtmi r4, [r9], #-1147 @ 0xfffffb85 │ │ @ instruction: 0xf051e00d │ │ - @ instruction: 0xf080fe69 │ │ + @ instruction: 0xf080fe83 │ │ stmdbvc r8!, {r0, r8, fp} │ │ @ instruction: 0xf43f2800 │ │ stmdami r5!, {r0, r6, r8, r9, sl, fp, sp, pc} │ │ stmdbmi r6!, {r0, r2, r5, r8, r9, fp, lr} │ │ ldrbtmi r4, [fp], #-1144 @ 0xfffffb88 │ │ - bge 276c3c │ │ + bge 276c70 │ │ @ instruction: 0x212b9100 │ │ eorls pc, r8, sp, lsl #17 │ │ @ instruction: 0xf01b9509 │ │ - rscscs pc, r0, r7, lsr #26 │ │ + smlalscs pc, r0, r1, lr @ │ │ addcs r4, r1, #42991616 @ 0x2900000 │ │ @ instruction: 0xf0b22301 │ │ - @ instruction: 0xe6efeeb2 │ │ + strbt lr, [pc], r0, lsr #29 │ │ @ instruction: 0x462920f0 │ │ movwcs r2, #4737 @ 0x1281 │ │ - mcr 0, 5, pc, cr10, cr2, {5} @ │ │ + mrc 0, 4, APSR_nzcv, cr8, cr2, {5} │ │ @ instruction: 0xf051e770 │ │ - stmdacs r0, {r0, r2, r6, r9, sl, fp, ip, sp, lr, pc} │ │ + stmdacs r0, {r0, r1, r2, r3, r4, r6, r9, sl, fp, ip, sp, lr, pc} │ │ andcs fp, r1, r4, lsl #30 │ │ ldrb r7, [r5], r8, lsr #2 │ │ - mrc2 0, 1, pc, cr14, cr1, {2} │ │ + mrc2 0, 2, pc, cr8, cr1, {2} │ │ svclt 0x00042800 │ │ @ instruction: 0x71282001 │ │ ldmdami r5, {r1, r2, r4, r6, r8, r9, sl, sp, lr, pc} │ │ - @ instruction: 0xf0194478 │ │ - ldmdami r1, {r0, r1, r3, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ - @ instruction: 0xf0194478 │ │ - cdple 15, 15, cr15, cr14, cr7, {6} │ │ + @ instruction: 0xf01a4478 │ │ + ldmdami r1, {r0, r2, r4, r5, r8, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xf01a4478 │ │ + mrcle 9, 7, APSR_nzcv, cr14, cr1, {1} @ │ │ ldrtmi r4, [r8], -r9, lsl #20 │ │ ldrbtmi r4, [sl], #-1585 @ 0xfffff9cf │ │ - @ instruction: 0xf8a0f019 │ │ - andeq r9, fp, r0, asr r0 │ │ - @ instruction: 0xffff3a45 │ │ - andeq r6, fp, lr, lsl #12 │ │ - strdeq r8, [fp], -r2 │ │ - @ instruction: 0xffff3a55 │ │ - @ instruction: 0x000b46b8 │ │ - strdeq r6, [fp], -r6 @ │ │ - strdeq r6, [fp], -r6 @ │ │ - andeq r8, fp, r2, ror #29 │ │ - @ instruction: 0xffff3a37 │ │ - muleq fp, sl, r6 │ │ - strdeq r6, [fp], -r8 │ │ - @ instruction: 0x000b65b4 │ │ - andeq r6, fp, r6, asr r6 │ │ - muleq fp, ip, r5 │ │ + blx 2e1b54 │ │ + andeq r9, fp, ip, lsr r0 │ │ + @ instruction: 0xffff3a11 │ │ + andeq r6, fp, sl, ror #11 │ │ + ldrdeq r8, [fp], -lr │ │ + @ instruction: 0xffff3a21 │ │ + @ instruction: 0x000b46b4 │ │ + ldrdeq r6, [fp], -r2 │ │ + ldrdeq r6, [fp], -r2 │ │ + andeq r8, fp, lr, asr #29 │ │ + @ instruction: 0xffff3a03 │ │ + muleq fp, r6, r6 │ │ + ldrdeq r6, [fp], -r4 │ │ + muleq fp, r0, r5 │ │ + andeq r6, fp, r2, lsr r6 │ │ + andeq r6, fp, r8, ror r5 │ │ svcmi 0x00f0e92d │ │ strmi fp, [r9], r7, lsl #1 │ │ ldrdcc lr, [r0, -r1] │ │ ldrdge pc, [r8], -r9 │ │ @ instruction: 0xf8d94616 │ │ vst4.8 {d23-d26}, [pc :64], r4 │ │ @ instruction: 0xf8ad7280 │ │ @@ -4008,45 +4021,45 @@ │ │ stmib r0, {r1, r8, fp, sp, pc}^ │ │ stclne 1, cr10, [r1], #-4 │ │ ldrdpl lr, [ip], -r7 │ │ teqvs r9, r0, lsl #16 │ │ tstpeq r0, pc, asr #32 @ p-variant is OBSOLETE │ │ suble r6, r1, r9, ror r3 │ │ subeq lr, r0, r0, lsl #22 │ │ - bl 16eb6c │ │ + bl 16eba0 │ │ ldmib r5, {r7, r8, r9, fp}^ │ │ ldmda r0, {r8}^ │ │ ldmdblt r2, {r0, r1, r8, r9, sl, fp, sp}^ │ │ andeq pc, ip, #0, 2 │ │ svchi 0x005bf3bf │ │ movwne lr, #2114 @ 0x842 │ │ ldmda r2, {r0, r1, r4, r6, r7, r8, ip, sp, pc}^ │ │ - blcs 35788 │ │ + blcs 357bc │ │ vshr.u64 , q12, #1 │ │ @ instruction: 0xf3bf8f2f │ │ strcc r8, [ip, #-3931] @ 0xfffff0a5 │ │ svchi 0x005bf3bf │ │ svcne 0x0000e850 │ │ stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ - blcs 2e7a4 │ │ + blcs 2e7d8 │ │ stmdbcs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ @ instruction: 0xf3bfbf04 │ │ @ instruction: 0xf06d8f5b │ │ - ldrbmi pc, [sp, #-3951] @ 0xfffff091 @ │ │ + ldrbmi pc, [sp, #-3979] @ 0xfffff075 @ │ │ @ instruction: 0xe015d1d9 │ │ svchi 0x005bf3bf │ │ vtbl.8 d6, {d31}, d1 │ │ tstcc r8, fp, asr pc │ │ svccs 0x0000e851 │ │ movwmi lr, #2113 @ 0x841 │ │ mvnsle r2, r0, lsl #22 │ │ bicsle r3, lr, r1, lsl #4 │ │ rscscs r4, r0, r0, lsl #13 │ │ movwcs r2, #4737 @ 0x1281 │ │ - ldcl 0, cr15, [sl, #712]! @ 0x2c8 │ │ + stcl 0, cr15, [r8, #712]! @ 0x2c8 │ │ ldrb r4, [r6, r0, asr #12] │ │ mulseq r8, r9, r8 │ │ ldmmi r9, {r3, r5, r8, fp, ip, sp, pc}^ │ │ stmdavs r0, {r3, r4, r5, r6, sl, lr}^ │ │ @ instruction: 0xf0400040 │ │ andcs r8, r0, fp, asr #2 │ │ svchi 0x005bf3bf │ │ @@ -4082,59 +4095,59 @@ │ │ @ instruction: 0xf0002900 │ │ ldmdavs r3, {r1, r2, r3, r4, r6, r8, pc}^ │ │ strcc r3, [r1, -ip, lsl #18] │ │ ldrbmi r3, [r3, #-524] @ 0xfffffdf4 │ │ adcsmi sp, r7, #-2147483587 @ 0x8000003d │ │ cmpphi lr, r0, lsl #1 @ p-variant is OBSOLETE │ │ @ instruction: 0x46a043f9 │ │ - bl 76d54 │ │ - bl 1e6598 │ │ - bl 261b4 │ │ + bl 76d88 │ │ + bl 1e65cc │ │ + bl 261e8 │ │ addseq r0, r2, r1, lsl #1 │ │ @ instruction: 0xf8514601 │ │ @ instruction: 0xf0af4b0c │ │ - vmovcc.32 d17[0], pc │ │ + @ instruction: 0x3e01f9e4 │ │ @ instruction: 0x612e2c00 │ │ mrshi pc, (UNDEF: 74) @ │ │ svchi 0x005bf3bf │ │ svceq 0x0000e854 │ │ stmda r4, {r0, r6, r9, sl, fp, ip}^ │ │ - bcs 2a4c0 │ │ + bcs 2a4f4 │ │ stmdacs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ strtmi sp, [r0], -r4, lsl #2 │ │ svchi 0x005bf3bf │ │ - cdp2 0, 14, cr15, cr0, cr13, {3} │ │ + cdp2 0, 15, cr15, cr12, cr13, {3} │ │ svceq 0x0000f1b9 │ │ @ instruction: 0xf8d8d104 │ │ subeq r0, r0, r4 │ │ tstphi fp, r0, asr #32 @ p-variant is OBSOLETE │ │ vaddl.u q1, d15, d0 │ │ ldmda r5, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ stmda r5, {r8, r9, sl, fp, ip}^ │ │ - bcs 264f0 │ │ + bcs 26524 │ │ stmdbcs r2, {r0, r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ rscshi pc, sp, r0 │ │ ldrdeq lr, [r2, -sp] │ │ andls r2, r2, #0, 4 │ │ @ instruction: 0xf0402800 │ │ ldmmi lr, {r0, r1, r3, r7, pc} │ │ - @ instruction: 0xf0194478 │ │ - @ instruction: 0xf89dfe97 │ │ + @ instruction: 0xf01a4478 │ │ + @ instruction: 0xf89df801 │ │ vshr.u32 d0, d0, #1 │ │ stmdacs r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc} │ │ addhi pc, r7, r0 │ │ strmi lr, [r2, #-2525] @ 0xfffff623 │ │ stmdbls r1, {r1, sp} │ │ cmplt r4, r8 │ │ stmdbcs r0, {r0, r3, r5, fp, sp, lr} │ │ qadd16mi fp, r0, ip │ │ stmdavs r8!, {r3, r7, r8, r9, sl, lr}^ │ │ svclt 0x001c2800 │ │ @ instruction: 0xf0b24620 │ │ - andlt lr, r7, r4, asr #26 │ │ + andlt lr, r7, r2, lsr sp │ │ svchi 0x00f0e8bd │ │ @ instruction: 0x5010f8d9 │ │ ldmda r5, {r0, sp}^ │ │ stmdbcs r0, {r8, r9, sl, fp, ip} │ │ addhi pc, pc, r0, asr #32 │ │ tsteq r0, r5, asr #16 │ │ mvnsle r2, r0, lsl #18 │ │ @@ -4152,166 +4165,166 @@ │ │ @ instruction: 0xf0002900 │ │ ldmdavs r3, {r1, r2, r4, r6, r7, pc}^ │ │ strcc r3, [r1, -ip, lsl #18] │ │ ldrbmi r3, [r3, #-524] @ 0xfffffdf4 │ │ adcsmi sp, r7, #-2147483587 @ 0x8000003d │ │ sbcshi pc, r2, r0, lsl #1 │ │ @ instruction: 0x46a043f9 │ │ - bl 76e6c │ │ - bl 1e66b0 │ │ - bl 262cc │ │ + bl 76ea0 │ │ + bl 1e66e4 │ │ + bl 26300 │ │ addseq r0, r2, r1, lsl #1 │ │ @ instruction: 0xf8514601 │ │ @ instruction: 0xf0af4b0c │ │ - vmlacc.f64 d15, d1, d8 │ │ + @ instruction: 0x3e01f958 │ │ @ instruction: 0x612e2c00 │ │ adcshi pc, lr, r0 │ │ svchi 0x005bf3bf │ │ svceq 0x0000e854 │ │ stmda r4, {r0, r6, r9, sl, fp, ip}^ │ │ - bcs 2a5d8 │ │ + bcs 2a60c │ │ stmdacs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ strtmi sp, [r0], -r4, lsl #2 │ │ svchi 0x005bf3bf │ │ - cdp2 0, 5, cr15, cr4, cr13, {3} │ │ + cdp2 0, 7, cr15, cr0, cr13, {3} │ │ svceq 0x0000f1b9 │ │ @ instruction: 0xf8d8d104 │ │ subeq r0, r0, r4 │ │ addshi pc, r6, r0, asr #32 │ │ vaddl.u q1, d15, d0 │ │ ldmda r5, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ stmda r5, {r8, r9, sl, fp, ip}^ │ │ - bcs 26608 │ │ + bcs 2663c │ │ stmdbcs r2, {r0, r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ ldmib sp, {r3, r4, r5, r6, ip, lr, pc}^ │ │ andcs r0, r0, #-2147483648 @ 0x80000000 │ │ stmdacs r0, {r1, r9, ip, pc} │ │ andcs sp, r1, #121 @ 0x79 │ │ andsvs r9, sl, r1, lsl #22 │ │ addsvs r6, r9, r8, asr r0 │ │ pop {r0, r1, r2, ip, sp, pc} │ │ strcs r8, [r1], #-4080 @ 0xfffff010 │ │ strcs r2, [r0], -r0, lsl #10 │ │ @ instruction: 0xf0b2e00b │ │ - @ instruction: 0xf89decf0 │ │ + @ instruction: 0xf89decde │ │ strtmi r0, [r5], #-16 │ │ strcc r3, [r1], -r2, lsl #8 │ │ vtbl.8 d2, {d15}, d0 │ │ @ instruction: 0xf47f8f5b │ │ cdpcs 15, 0, cr10, cr7, cr9, {3} │ │ mcrcs 2, 0, sp, cr0, cr1, {7} │ │ @ instruction: 0x4628d0f1 │ │ svclt 0x00103801 │ │ @ instruction: 0xe7ecd1fc │ │ andeq pc, r8, r7, lsl #2 │ │ - ldc2l 0, cr15, [r8, #-456]! @ 0xfffffe38 │ │ + stc2l 0, cr15, [sl, #-456] @ 0xfffffe38 │ │ strtmi lr, [r8], -r9, ror #12 │ │ svchi 0x002ff3bf │ │ - stc2l 0, cr15, [r9, #-324] @ 0xfffffebc │ │ + stc2l 0, cr15, [r3, #-324]! @ 0xfffffebc │ │ strtmi lr, [r8], -sl, ror #13 │ │ svchi 0x002ff3bf │ │ - stc2l 0, cr15, [r3, #-324] @ 0xfffffebc │ │ + ldc2l 0, cr15, [sp, #-324] @ 0xfffffebc │ │ rscscs lr, r0, r0, ror r7 │ │ addcs r4, r1, #59768832 @ 0x3900000 │ │ @ instruction: 0xf0b22301 │ │ - strb lr, [r0], r6, lsr #25 │ │ - mcrr2 0, 5, pc, r0, cr1 @ │ │ + @ instruction: 0xe6c0ec94 │ │ + mrrc2 0, 5, pc, sl, cr1 @ │ │ svclt 0x00042800 │ │ teqvc r8, r1 │ │ stmdami lr!, {r0, r2, r3, r5, r7, r9, sl, sp, lr, pc} │ │ - bmi bae340 │ │ + bmi bae374 │ │ ldrbtmi r4, [sl], #-1144 @ 0xfffffb88 │ │ - ldc2l 0, cr15, [r4, #100] @ 0x64 │ │ - ldc2 0, cr15, [r2], #-324 @ 0xfffffebc │ │ + @ instruction: 0xff3ef019 │ │ + mcrr2 0, 5, pc, ip, cr1 @ │ │ stmdbeq r1, {r7, ip, sp, lr, pc} │ │ stmdacs r0, {r3, r5, r8, fp, ip, sp, lr} │ │ mrcge 4, 6, APSR_nzcv, cr4, cr15, {1} │ │ - blmi ab7f60 │ │ + blmi ab7f94 │ │ ldrbtmi r4, [r8], #-2346 @ 0xfffff6d6 │ │ ldrbtmi r4, [r9], #-1147 @ 0xfffffb85 │ │ @ instruction: 0xf051e00d │ │ - @ instruction: 0xf080fc23 │ │ + @ instruction: 0xf080fc3d │ │ stmdbvc r8!, {r0, r8, fp} │ │ @ instruction: 0xf43f2800 │ │ stmdami r7!, {r0, r4, r6, r8, r9, sl, fp, sp, pc} │ │ stmdbmi r8!, {r0, r1, r2, r5, r8, r9, fp, lr} │ │ ldrbtmi r4, [fp], #-1144 @ 0xfffffb88 │ │ - bge 1770c8 │ │ + bge 1770fc │ │ @ instruction: 0x212b9100 │ │ andsls pc, r8, sp, lsl #17 │ │ @ instruction: 0xf01b9505 │ │ - rscscs pc, r0, r1, ror #21 │ │ + rscscs pc, r0, fp, asr #24 │ │ addcs r4, r1, #42991616 @ 0x2900000 │ │ @ instruction: 0xf0b22301 │ │ - ldrbt lr, [fp], ip, ror #24 │ │ + usat lr, #27, sl, asr #24 │ │ @ instruction: 0x462920f0 │ │ movwcs r2, #4737 @ 0x1281 │ │ - stcl 0, cr15, [r4], #-712 @ 0xfffffd38 │ │ + mrrc 0, 11, pc, r2, cr2 @ │ │ ldmdami sp, {r0, r1, r2, r3, r4, r5, r6, r8, r9, sl, sp, lr, pc} │ │ @ instruction: 0xf0194478 │ │ - @ instruction: 0xf051fd93 │ │ - stmdacs r0, {r0, r1, r3, r4, r5, r6, r7, r8, r9, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xf051fefd │ │ + stmdacs r0, {r0, r2, r4, sl, fp, ip, sp, lr, pc} │ │ andcs fp, r1, r4, lsl #30 │ │ ldrb r7, [sp], r8, lsr #2 │ │ - blx ffd6206e │ │ + stc2 0, cr15, [lr], {81} @ 0x51 │ │ svclt 0x00042800 │ │ @ instruction: 0x71282001 │ │ ldmdami r5, {r1, r5, r6, r8, r9, sl, sp, lr, pc} │ │ @ instruction: 0xf0194478 │ │ - ldmdami r4, {r0, r7, r8, sl, fp, ip, sp, lr, pc} │ │ + ldmdami r4, {r0, r1, r3, r5, r6, r7, r9, sl, fp, ip, sp, lr, pc} │ │ @ instruction: 0xf0194478 │ │ - mrcle 13, 7, APSR_nzcv, cr14, cr13, {3} │ │ + cdple 14, 15, cr15, cr14, cr7, {7} │ │ ldrtmi r4, [r8], -r9, lsl #20 │ │ ldrbtmi r4, [sl], #-1585 @ 0xfffff9cf │ │ - mrc2 0, 2, pc, cr6, cr8, {0} │ │ - andeq r8, fp, ip, lsr #23 │ │ - @ instruction: 0xffff35b1 │ │ - andeq r4, fp, r2, asr #2 │ │ - andeq r8, fp, lr, asr #22 │ │ - @ instruction: 0xffff35c9 │ │ - andeq r4, fp, ip, lsr #4 │ │ - andeq r4, fp, r2, lsr r1 │ │ - andeq r6, fp, r2, ror #2 │ │ - andeq r8, fp, r6, lsr sl │ │ - @ instruction: 0xffff35ab │ │ - andeq r4, fp, lr, lsl #4 │ │ - andeq r4, fp, r4, asr #2 │ │ - andeq r4, fp, ip, lsl #6 │ │ - andeq r4, fp, r4, lsr r1 │ │ - ldrdeq r4, [fp], -r0 │ │ - strdeq r4, [fp], -r8 │ │ + @ instruction: 0xffc0f018 │ │ + muleq fp, r8, fp │ │ + @ instruction: 0xffff357d │ │ + andeq r4, fp, lr, lsl r1 │ │ + andeq r8, fp, sl, lsr fp │ │ + @ instruction: 0xffff3595 │ │ + andeq r4, fp, r8, lsr #4 │ │ + andeq r4, fp, lr, lsl #2 │ │ + andeq r6, fp, lr, lsr r1 │ │ + andeq r8, fp, r2, lsr #20 │ │ + @ instruction: 0xffff3577 │ │ + andeq r4, fp, sl, lsl #4 │ │ + andeq r4, fp, r0, lsr #2 │ │ + andeq r4, fp, r8, ror #5 │ │ + andeq r4, fp, r0, lsl r1 │ │ + andeq r4, fp, ip, lsr #1 │ │ + ldrdeq r4, [fp], -r4 @ │ │ svcmi 0x00f0e92d │ │ @ instruction: 0xf8d1b089 │ │ strmi sl, [r9], r0 │ │ ldrdpl lr, [r3, -r1] │ │ ldmib r9, {r1, r2, r4, r9, sl, lr}^ │ │ vst1.8 {d18}, [pc], r5 │ │ @ instruction: 0xf8ad7380 │ │ andls r3, r4, #20 │ │ smlabtpl r2, sp, r9, lr │ │ svccc 0x0000e856 │ │ stmda r6, {r0, r3, r4, r6, sl, fp, ip}^ │ │ - bcs 2a7c0 │ │ - blcs 5a7a4 │ │ + bcs 2a7f4 │ │ + blcs 5a7d8 │ │ andshi pc, pc, #0, 2 │ │ andls r6, r1, ip, lsr r9 │ │ addmi r6, r4, #184, 16 @ 0xb80000 │ │ @ instruction: 0x81a2f000 │ │ - bl 1403b8 │ │ + bl 1403ec │ │ @ instruction: 0xf8400144 │ │ - bl 3e064 │ │ + bl 3e098 │ │ stmdbge r2, {r0, r7} │ │ smlabtge r1, r0, r9, lr │ │ ldmib r7, {r0, r5, r6, sl, fp, ip}^ │ │ stmdacs r0, {r2, r3, ip, lr} │ │ @ instruction: 0xf04f6139 │ │ cmnvs r9, #0, 2 │ │ - bl 5a100 │ │ + bl 5a134 │ │ strcs r0, [r1], #-64 @ 0xffffffc0 │ │ - bleq fe060c18 │ │ + bleq fe060c4c │ │ ldrdeq lr, [r0, -r5] │ │ svccs 0x0003e850 │ │ @ instruction: 0xf100b952 │ │ vsubl.u q0, d15, d12 │ │ stmda r2, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ bicslt r1, r3, r0, lsl #6 │ │ svccc 0x0000e852 │ │ @@ -4321,36 +4334,36 @@ │ │ vabal.u , d15, d12 │ │ ldmda r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ cdpne 15, 4, cr1, cr10, cr0, {0} │ │ movwcs lr, #2112 @ 0x840 │ │ mvnsle r2, r0, lsl #22 │ │ svclt 0x00042901 │ │ svchi 0x005bf3bf │ │ - stc2 0, cr15, [r2, #-436]! @ 0xfffffe4c │ │ + ldc2 0, cr15, [lr, #-436]! @ 0xfffffe4c │ │ bicsle r4, r9, sp, asr r5 │ │ vshr.u32 d14, d5, #1 │ │ stmvs r1, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc} │ │ svchi 0x005bf3bf │ │ ldmda r1, {r3, r4, r8, ip, sp}^ │ │ stmda r1, {r8, r9, sl, fp, sp}^ │ │ - blcs 36c68 │ │ + blcs 36c9c │ │ andcc sp, r1, #1073741886 @ 0x4000003e │ │ pkhtbmi sp, r0, lr, asr #3 │ │ addcs r2, r1, #240 @ 0xf0 │ │ @ instruction: 0xf0b22301 │ │ - strbmi lr, [r0], -lr, lsr #23 │ │ + @ instruction: 0x4640eb9c │ │ @ instruction: 0xf899e7d6 │ │ stmdblt r8!, {r2, r3, r4} │ │ ldrbtmi r4, [r8], #-2275 @ 0xfffff71d │ │ subeq r6, r0, r0, asr #16 │ │ cmpphi ip, r0, asr #32 @ p-variant is OBSOLETE │ │ vaddl.u q1, d15, d0 │ │ ldmda r7, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ stmda r7, {r8, r9, sl, fp, ip}^ │ │ - bcs 268a0 │ │ + bcs 268d4 │ │ stmdbcs r2, {r0, r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ mrshi pc, (UNDEF: 73) @ │ │ ldrdeq pc, [r4], -r9 │ │ movwcs lr, #2512 @ 0x9d0 │ │ andls r6, r0, r0, lsl #17 │ │ @ instruction: 0xf0004630 │ │ ldm pc, {r0, r1, r2, r4, r5, r6, r9, sl, fp, ip, sp, lr, pc}^ @ │ │ @@ -4367,41 +4380,41 @@ │ │ stmdavs r0!, {r2, r3, r4, r5, r6, sl, lr}^ │ │ @ instruction: 0xf0400040 │ │ @ instruction: 0xf04f813b │ │ stmdbvc r8!, {r8, fp} │ │ @ instruction: 0xf0402800 │ │ ldmib r5, {r0, r2, r3, r4, r5, r8, pc}^ │ │ @ instruction: 0xf04f0603 │ │ - bl 1b4100 │ │ + bl 1b4134 │ │ addeq r0, r9, r6, asr #2 │ │ stmdbcs r0, {r1, r9, sl, lr} │ │ cmnphi r3, r0 @ p-variant is OBSOLETE │ │ stmdbcc ip, {r0, r1, r4, r6, fp, sp, lr} │ │ andcc r3, ip, #262144 @ 0x40000 │ │ mvnsle r4, r3, asr r5 │ │ @ instruction: 0xf08042b7 │ │ mvnsmi r8, #-1073741796 @ 0xc000001c │ │ ldrtmi r4, [r1], #-1696 @ 0xfffff960 │ │ subeq lr, r1, #1024 @ 0x400 │ │ cmpeq r7, r7, lsl #22 │ │ addeq lr, r1, r0, lsl #22 │ │ @ instruction: 0x46010092 │ │ - blmi 364280 │ │ - @ instruction: 0xf947f0af │ │ + blmi 3642b4 │ │ + @ instruction: 0xff97f0ae │ │ stccs 14, cr3, [r0], {1} │ │ @ instruction: 0xf000612e │ │ vsra.u32 q4, , #1 │ │ ldmda r4, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ cdpne 15, 4, cr0, cr1, cr0, {0} │ │ andne lr, r0, #68, 16 @ 0x440000 │ │ mvnsle r2, r0, lsl #20 │ │ tstle r4, r1, lsl #16 │ │ vrsubhn.i d4, , q8 │ │ @ instruction: 0xf06d8f5b │ │ - @ instruction: 0xf1b9fc93 │ │ + @ instruction: 0xf1b9fcaf │ │ tstle r4, r0, lsl #30 │ │ ldrdeq pc, [r4], -r8 │ │ @ instruction: 0xf0400040 │ │ andcs r8, r0, r0, lsr r1 │ │ svchi 0x005bf3bf │ │ svcne 0x0000e855 │ │ andeq lr, r0, #4521984 @ 0x450000 │ │ @@ -4422,15 +4435,15 @@ │ │ andsvs r2, r1, r2, lsl #16 │ │ ldmib sp, {r2, r3, ip, lr, pc}^ │ │ stmdavs r9!, {r1, r8, sl, lr} │ │ svclt 0x001c2900 │ │ strmi r4, [r8, r0, lsr #12] │ │ stmdacs r0, {r3, r5, r6, fp, sp, lr} │ │ qadd16mi fp, r0, ip │ │ - b ffce24a8 │ │ + b ff8624dc │ │ pop {r0, r3, ip, sp, pc} │ │ @ instruction: 0xf8d98ff0 │ │ andcs r5, r1, r8 │ │ svcne 0x0000e855 │ │ @ instruction: 0xf0402900 │ │ stmda r5, {r2, r3, r4, r7, pc}^ │ │ stmdbcs r0, {r8} │ │ @@ -4439,41 +4452,41 @@ │ │ stmdavs r0!, {r2, r3, r4, r5, r6, sl, lr}^ │ │ @ instruction: 0xf0400040 │ │ @ instruction: 0xf04f80ba │ │ stmdbvc r8!, {r8, fp} │ │ @ instruction: 0xf0402800 │ │ ldmib r5, {r2, r3, r4, r5, r7, pc}^ │ │ @ instruction: 0xf04f0603 │ │ - bl 1b4220 │ │ + bl 1b4254 │ │ addeq r0, r9, r6, asr #2 │ │ stmdbcs r0, {r1, r9, sl, lr} │ │ rschi pc, r7, r0 │ │ stmdbcc ip, {r0, r1, r4, r6, fp, sp, lr} │ │ andcc r3, ip, #262144 @ 0x40000 │ │ mvnsle r4, r3, asr r5 │ │ @ instruction: 0xf08042b7 │ │ mvnsmi r8, #227 @ 0xe3 │ │ ldrtmi r4, [r1], #-1696 @ 0xfffff960 │ │ subeq lr, r1, #1024 @ 0x400 │ │ cmpeq r7, r7, lsl #22 │ │ addeq lr, r1, r0, lsl #22 │ │ @ instruction: 0x46010092 │ │ - blmi 3643a0 │ │ - @ instruction: 0xf8b7f0af │ │ + blmi 3643d4 │ │ + @ instruction: 0xff07f0ae │ │ stccs 14, cr3, [r0], {1} │ │ @ instruction: 0xf000612e │ │ vmla.i q4, , d15[0] │ │ ldmda r4, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ cdpne 15, 4, cr0, cr1, cr0, {0} │ │ andne lr, r0, #68, 16 @ 0x440000 │ │ mvnsle r2, r0, lsl #20 │ │ tstle r4, r1, lsl #16 │ │ vrsubhn.i d4, , q8 │ │ @ instruction: 0xf06d8f5b │ │ - @ instruction: 0xf1b9fc03 │ │ + @ instruction: 0xf1b9fc1f │ │ tstle r4, r0, lsl #30 │ │ ldrdeq pc, [r4], -r8 │ │ @ instruction: 0xf0400040 │ │ andcs r8, r0, r7, lsr #1 │ │ svchi 0x005bf3bf │ │ svcne 0x0000e855 │ │ andeq lr, r0, #4521984 @ 0x450000 │ │ @@ -4491,125 +4504,125 @@ │ │ andvc pc, sp, r5, lsr #17 │ │ stmib r5, {r1, r3, r5, r8, r9, ip, sp, lr}^ │ │ adcvs r3, r9, r0 │ │ pop {r0, r3, ip, sp, pc} │ │ strcs r8, [r1], #-4080 @ 0xfffff010 │ │ strcs r2, [r0], -r0, lsl #10 │ │ @ instruction: 0xf0b2e00b │ │ - @ instruction: 0xf89dea92 │ │ + @ instruction: 0xf89dea80 │ │ strtmi r0, [r5], #-20 @ 0xffffffec │ │ strcc r3, [r1], -r2, lsl #8 │ │ vtbl.8 d2, {d15}, d0 │ │ @ instruction: 0xf47f8f5b │ │ mcrcs 15, 0, sl, cr7, cr9, {2} │ │ mcrcs 2, 0, sp, cr0, cr1, {7} │ │ @ instruction: 0x4628d0f1 │ │ svclt 0x00103801 │ │ @ instruction: 0xe7ecd1fc │ │ andeq pc, r8, r7, lsl #2 │ │ - blx 6e24ea │ │ + blx ffb6251c │ │ @ instruction: 0x4628e658 │ │ svchi 0x002ff3bf │ │ - blx ffb22470 │ │ + blx 1a24a6 │ │ @ instruction: 0x4628e6d9 │ │ svchi 0x002ff3bf │ │ - blx ff9a247c │ │ + blx 224b0 │ │ rscscs lr, r0, r3, ror #14 │ │ addcs r4, r1, #59768832 @ 0x3900000 │ │ @ instruction: 0xf0b22301 │ │ - strt lr, [pc], r8, asr #20 │ │ - @ instruction: 0xf9e2f051 │ │ + @ instruction: 0xe6afea36 │ │ + @ instruction: 0xf9fcf051 │ │ svclt 0x00042800 │ │ teqvc r8, r1 │ │ ldmdami r0!, {r2, r3, r4, r7, r9, sl, sp, lr, pc} │ │ - bmi c2e7fc │ │ + bmi c2e830 │ │ ldrbtmi r4, [sl], #-1144 @ 0xfffffb88 │ │ - blx 1de23ca │ │ - @ instruction: 0xf9d4f051 │ │ + stc2l 0, cr15, [r0], #100 @ 0x64 │ │ + @ instruction: 0xf9eef051 │ │ stmdbeq r1, {r7, ip, sp, lr, pc} │ │ stmdacs r0, {r3, r5, r8, fp, ip, sp, lr} │ │ mcrge 4, 6, pc, cr3, cr15, {1} @ │ │ - blmi b38424 │ │ + blmi b38458 │ │ ldrbtmi r4, [r8], #-2348 @ 0xfffff6d4 │ │ ldrbtmi r4, [r9], #-1147 @ 0xfffffb85 │ │ @ instruction: 0xf051e00d │ │ - @ instruction: 0xf080f9c5 │ │ + @ instruction: 0xf080f9df │ │ stmdbvc r8!, {r0, r8, fp} │ │ @ instruction: 0xf43f2800 │ │ stmdami r9!, {r2, r6, r8, r9, sl, fp, sp, pc} │ │ stmdbmi sl!, {r0, r3, r5, r8, r9, fp, lr} │ │ ldrbtmi r4, [fp], #-1144 @ 0xfffffb88 │ │ - bge 1f7584 │ │ + bge 1f75b8 │ │ @ instruction: 0x212b9100 │ │ eorls pc, r0, sp, lsl #17 │ │ @ instruction: 0xf01b9507 │ │ - rscscs pc, r0, r3, lsl #17 │ │ + rscscs pc, r0, sp, ror #19 │ │ addcs r4, r1, #42991616 @ 0x2900000 │ │ @ instruction: 0xf0b22301 │ │ - strbt lr, [sl], lr, lsl #20 │ │ + @ instruction: 0xe6eae9fc │ │ ldrbtmi r4, [r8], #-2082 @ 0xfffff7de │ │ - blx f6242a │ │ + stc2 0, cr15, [r6], #100 @ 0x64 │ │ @ instruction: 0x462920f0 │ │ movwcs r2, #4737 @ 0x1281 │ │ - b e2698 │ │ + ldmib r0!, {r1, r4, r5, r7, ip, sp, lr, pc}^ │ │ ldmdami pc, {r0, r1, r2, r3, r5, r6, r8, r9, sl, sp, lr, pc} @ │ │ @ instruction: 0xf0194478 │ │ - @ instruction: 0xf051fb31 │ │ - stmdacs r0, {r0, r3, r4, r7, r8, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xf051fc9b │ │ + stmdacs r0, {r0, r1, r4, r5, r7, r8, fp, ip, sp, lr, pc} │ │ andcs fp, r1, r4, lsl #30 │ │ strb r7, [r8], r8, lsr #2 │ │ - @ instruction: 0xf992f051 │ │ + @ instruction: 0xf9acf051 │ │ svclt 0x00042800 │ │ @ instruction: 0x71282001 │ │ ldmdami r3, {r0, r4, r6, r8, r9, sl, sp, lr, pc} │ │ @ instruction: 0xf0194478 │ │ - ldmdami r3, {r0, r1, r2, r3, r4, r8, r9, fp, ip, sp, lr, pc} │ │ + ldmdami r3, {r0, r3, r7, sl, fp, ip, sp, lr, pc} │ │ @ instruction: 0xf0194478 │ │ - vmovle.u8 pc, d14[4] │ │ + cdple 12, 15, cr15, cr14, cr5, {4} │ │ ldrtmi r4, [r8], -r9, lsl #20 │ │ ldrbtmi r4, [sl], #-1585 @ 0xfffff9cf │ │ - blx ffd62476 │ │ - andeq r8, fp, r2, lsl r7 │ │ - @ instruction: 0xffff30f5 │ │ - andeq r3, fp, r6, lsl #25 │ │ - @ instruction: 0x000b86b4 │ │ - @ instruction: 0xffff310d │ │ - andeq r3, fp, r0, ror sp │ │ - andeq r3, fp, r6, ror ip │ │ - muleq fp, lr, ip │ │ - muleq fp, r4, r5 │ │ - @ instruction: 0xffff30ef │ │ - andeq r3, fp, r2, asr sp │ │ - andeq r3, fp, r8, lsl #25 │ │ - andeq r3, fp, ip, lsl #24 │ │ - andeq r3, fp, r6, asr ip │ │ - andeq r3, fp, r4, lsr ip │ │ - andeq r3, fp, r0, ror ip │ │ + ldc2l 0, cr15, [lr, #-96] @ 0xffffffa0 │ │ + strdeq r8, [fp], -lr │ │ + @ instruction: 0xffff30c1 │ │ + andeq r3, fp, r2, ror #24 │ │ + andeq r8, fp, r0, lsr #13 │ │ + @ instruction: 0xffff30d9 │ │ + andeq r3, fp, ip, ror #26 │ │ + andeq r3, fp, r2, asr ip │ │ + andeq r5, fp, sl, ror ip │ │ + andeq r8, fp, r0, lsl #11 │ │ + @ instruction: 0xffff30bb │ │ + andeq r3, fp, lr, asr #26 │ │ + andeq r3, fp, r4, ror #24 │ │ + andeq r3, fp, r8, ror #23 │ │ + andeq r3, fp, r2, lsr ip │ │ + andeq r3, fp, r0, lsl ip │ │ + andeq r3, fp, ip, asr #24 │ │ mvnsmi lr, sp, lsr #18 │ │ ldmib r0, {r2, r7, ip, sp, pc}^ │ │ @ instruction: 0xf1048400 │ │ @ instruction: 0x460e0570 │ │ strtmi r4, [r8], -r7, lsl #12 │ │ @ instruction: 0x46414632 │ │ - blx fffe2472 │ │ + blx fffe24a6 │ │ vtbl.8 d6, {d15}, d16 │ │ - bvs 88a1e4 │ │ + bvs 88a218 │ │ svchi 0x005bf3bf │ │ orrsmi r6, r1, #41472 @ 0xa200 │ │ smlabble r5, r1, r2, r4 │ │ vtbl.8 d6, {d15-d17}, d16 │ │ stcvs 15, cr8, [r1], #364 @ 0x16c │ │ andsle r4, r2, r1, lsl #4 │ │ svceq 0x0003e856 │ │ @ instruction: 0xf106b958 │ │ tstcs r1, ip │ │ svchi 0x005bf3bf │ │ andne lr, r0, #64, 16 @ 0x400000 │ │ ldmda r0, {r1, r3, r5, r8, ip, sp, pc}^ │ │ - bcs 320ac │ │ + bcs 320e0 │ │ vshr.u64 , q12, #1 │ │ @ instruction: 0xf3bf8f2f │ │ ldmvs r8!, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc} │ │ movwcs lr, #2512 @ 0x9d0 │ │ andls r6, r0, r0, lsl #17 │ │ @ instruction: 0xf0004630 │ │ mcrne 12, 2, pc, cr1, cr1, {3} @ │ │ @@ -4622,33 +4635,33 @@ │ │ cdpne 15, 4, cr1, cr10, cr0, {0} │ │ movwcs lr, #2112 @ 0x840 │ │ mvnsle r2, r0, lsl #22 │ │ tstle r8, r1, lsl #18 │ │ svchi 0x005bf3bf │ │ pop {r2, ip, sp, pc} │ │ @ instruction: 0xf06d41f0 │ │ - stmdacs r3, {r0, r3, r6, r7, r9, fp, ip, sp, pc} │ │ + stmdacs r3, {r0, r2, r5, r6, r7, r9, fp, ip, sp, pc} │ │ andlt sp, r4, r6, lsl #2 │ │ ldrhhi lr, [r0, #141]! @ 0x8d │ │ ldrbtmi r4, [r8], #-2053 @ 0xfffff7fb │ │ - blx fe5e2574 │ │ + stc2 0, cr15, [r0], {25} │ │ @ instruction: 0x21284804 │ │ ldrbtmi r4, [r8], #-2564 @ 0xfffff5fc │ │ @ instruction: 0xf019447a │ │ - svclt 0x0000fa99 │ │ - andeq r5, fp, r2, lsl #23 │ │ - @ instruction: 0xffff2f3b │ │ - andeq r5, fp, r4, ror #22 │ │ + svclt 0x0000fc03 │ │ + andeq r5, fp, lr, asr fp │ │ + @ instruction: 0xffff2f07 │ │ + andeq r5, fp, r0, asr #22 │ │ mvnsmi lr, sp, lsr #18 │ │ ldmib r0, {r2, r7, ip, sp, pc}^ │ │ @ instruction: 0xf1048400 │ │ strmi r0, [lr], -ip, asr #10 │ │ strtmi r4, [r8], -r7, lsl #12 │ │ @ instruction: 0x46414632 │ │ - blx fe4e254a │ │ + blx fe4e257e │ │ vtbl.8 d6, {d15-d17}, d16 │ │ stmdavs r1!, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc} │ │ svchi 0x005bf3bf │ │ tstcs r1, #212, 18 @ 0x350000 │ │ ldrmi r4, [r1], #-920 @ 0xfffffc68 │ │ smlabble r5, r1, r2, r4 │ │ vtbl.8 d6, {d15-d17}, d16 │ │ @@ -4656,15 +4669,15 @@ │ │ andsle r4, r2, r1, lsl #4 │ │ svceq 0x0003e856 │ │ @ instruction: 0xf106b958 │ │ tstcs r1, ip │ │ svchi 0x005bf3bf │ │ andne lr, r0, #64, 16 @ 0x400000 │ │ ldmda r0, {r1, r3, r5, r8, ip, sp, pc}^ │ │ - bcs 32188 │ │ + bcs 321bc │ │ vshr.u64 , q12, #1 │ │ @ instruction: 0xf3bf8f2f │ │ ldmvs r8!, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc} │ │ movwcs lr, #2512 @ 0x9d0 │ │ andls r6, r0, r0, lsl #17 │ │ @ instruction: 0xf0004630 │ │ cdpne 12, 4, cr15, cr1, cr3, {0} │ │ @@ -4677,61 +4690,61 @@ │ │ cdpne 15, 4, cr1, cr10, cr0, {0} │ │ movwcs lr, #2112 @ 0x840 │ │ mvnsle r2, r0, lsl #22 │ │ tstle r8, r1, lsl #18 │ │ svchi 0x005bf3bf │ │ pop {r2, ip, sp, pc} │ │ @ instruction: 0xf06d41f0 │ │ - stmdacs r3, {r0, r1, r3, r4, r6, r9, fp, ip, sp, pc} │ │ + stmdacs r3, {r0, r1, r2, r4, r5, r6, r9, fp, ip, sp, pc} │ │ andlt sp, r4, r6, lsl #2 │ │ ldrhhi lr, [r0, #141]! @ 0x8d │ │ ldrbtmi r4, [r8], #-2053 @ 0xfffff7fb │ │ - blx a62650 │ │ + blx fe4e2686 │ │ @ instruction: 0x21284804 │ │ ldrbtmi r4, [r8], #-2564 @ 0xfffff5fc │ │ @ instruction: 0xf019447a │ │ - svclt 0x0000fa2b │ │ - andeq r3, fp, lr, ror sl │ │ - @ instruction: 0xffff2e5f │ │ - andeq r3, fp, r0, ror #20 │ │ + svclt 0x0000fb95 │ │ + andeq r3, fp, sl, asr sl │ │ + @ instruction: 0xffff2e2b │ │ + andeq r3, fp, ip, lsr sl │ │ svcmi 0x00f0e92d │ │ strmi fp, [r0], r1, lsl #1 │ │ stmdacs r0, {r3, r7, fp, sp, lr} │ │ ldmdami r2, {r1, r4, r6, ip, lr, pc}^ │ │ ldrbtmi r4, [r8], #-1675 @ 0xfffff975 │ │ vtbl.8 d6, {d15}, d6 │ │ ldmdblt r6, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc} │ │ - mrc2 0, 7, pc, cr4, cr0, {2} │ │ + @ instruction: 0xff0ef050 │ │ ldrtmi r4, [r0], -r6, lsl #12 │ │ - stmdb r2, {r1, r4, r5, r7, ip, sp, lr, pc} │ │ + ldm r0!, {r1, r4, r5, r7, ip, sp, lr, pc}^ │ │ stmdacs r1, {r0, r1, r2, r9, sl, lr} │ │ @ instruction: 0xf000d818 │ │ andcs r8, r8, pc, lsl #1 │ │ - ldm sl, {r1, r4, r5, r7, ip, sp, lr, pc}^ │ │ + ldm r0, {r1, r4, r5, r7, ip, sp, lr, pc}^ │ │ @ instruction: 0xf0002800 │ │ strmi r8, [r7], -r5, lsl #1 │ │ andcs r6, r0, r6, asr #32 │ │ @ instruction: 0x46307038 │ │ - ldm r0!, {r1, r4, r5, r7, ip, sp, lr, pc}^ │ │ + ldm lr, {r1, r4, r5, r7, ip, sp, lr, pc}^ │ │ ldrtmi r4, [r0], -r4, lsl #12 │ │ @ instruction: 0xf0b24639 │ │ - stccs 8, cr14, [r0], {244} @ 0xf4 │ │ + stccs 8, cr14, [r0], {226} @ 0xe2 │ │ qadd16mi fp, r0, ip │ │ - stmia lr!, {r1, r4, r5, r7, ip, sp, lr, pc} │ │ + ldm ip, {r1, r4, r5, r7, ip, sp, lr, pc} │ │ ldrdeq pc, [r8], -fp │ │ @ instruction: 0xf8dbb330 │ │ - bl 2a684 │ │ + bl 2a6b8 │ │ strcs r0, [r0], -r0, asr #32 │ │ fstmiaxeq r0, {d14-d13} @ Deprecated │ │ and r4, r7, sl, lsl #12 │ │ svchi 0x002ff3bf │ │ svchi 0x005bf3bf │ │ ldrmi r3, [r1], -r1, lsl #12 │ │ andsle r4, r5, r2, ror #10 │ │ - blcc 3647dc │ │ + blcc 364810 │ │ adcsmi r6, sp, #1523712 @ 0x174000 │ │ stmdavs ip, {r1, r2, r4, r5, r6, r7, ip, lr, pc}^ │ │ svcpl 0x0003e853 │ │ mvnle r2, r0, lsl #26 │ │ streq pc, [ip, #-259] @ 0xfffffefd │ │ svchi 0x005bf3bf │ │ andmi lr, r0, r5, asr #16 │ │ @@ -4750,42 +4763,42 @@ │ │ andcs r0, r1, r8, lsl r1 │ │ svccs 0x0000e851 │ │ movweq lr, #2113 @ 0x841 │ │ mvnsle r2, r0, lsl #22 │ │ tstle r4, r0, asr ip │ │ addcs r2, r1, #240 @ 0xf0 │ │ @ instruction: 0xf0b22301 │ │ - @ instruction: 0xf8dbe86c │ │ + @ instruction: 0xf8dbe85a │ │ adcsmi r7, lr, #8 │ │ mvnsmi sp, #-536870911 @ 0xe0000001 │ │ ldrdne pc, [r4], -fp │ │ subeq lr, r6, #6144 @ 0x1800 │ │ - bl 77800 │ │ + bl 77834 │ │ @ instruction: 0xf8510082 │ │ - bl f67a4 │ │ + bl f67d8 │ │ ldmib r0, {r0, r1, r6, r8}^ │ │ addeq sl, sl, r1, lsl #18 │ │ mrseq pc, (UNDEF: 28) @ │ │ - cdp2 0, 5, cr15, cr1, cr14, {5} │ │ + stc2 0, cr15, [r1], #696 @ 0x2b8 │ │ stccs 15, cr3, [r0], {1} │ │ andvc pc, r8, fp, asr #17 │ │ stmib r8, {r0, r1, r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ @ instruction: 0xf8c84a00 │ │ andlt r9, r1, r8 │ │ svchi 0x00f0e8bd │ │ ldrtmi r4, [r0], -r8, lsl #20 │ │ ldrbtmi r4, [sl], #-1593 @ 0xfffff9c7 │ │ - blx 15e27b0 │ │ + blx ff0627e6 │ │ tstcs r8, r4 │ │ - blx 1b227b6 │ │ + ldc2l 0, cr15, [r5], {23} │ │ ldrbtmi r4, [r8], #-2050 @ 0xfffff7fe │ │ - mrc2 0, 5, pc, cr0, cr0, {2} │ │ - muleq fp, r6, r8 │ │ - @ instruction: 0x000b59b2 │ │ - andeq r5, fp, r2, asr r9 │ │ + mcr2 0, 6, pc, cr10, cr0, {2} @ │ │ + andeq r7, fp, r2, ror r8 │ │ + andeq r5, fp, lr, lsl #19 │ │ + andeq r5, fp, lr, lsr #18 │ │ ldrbmi lr, [r0, sp, lsr #18]! │ │ strmi fp, [r4], -r4, lsl #1 │ │ ldmda r4, {r0, sp}^ │ │ stmdbcs r0, {r8, r9, sl, fp, ip} │ │ adcshi pc, pc, r0, asr #32 │ │ tsteq r0, r4, asr #16 │ │ mvnsle r2, r0, lsl #18 │ │ @@ -4801,37 +4814,37 @@ │ │ subeq lr, r0, r0, lsl #22 │ │ strcs r2, [r1], -r2, lsl #14 │ │ stmibeq r0, {r0, r2, r8, r9, fp, sp, lr, pc} │ │ vaddl.u q7, d15, d5 │ │ @ instruction: 0xf3bf8f2f │ │ strbmi r8, [sp, #-3931] @ 0xfffff0a5 │ │ strtmi sp, [r8], -r7, lsr #32 │ │ - blne 364920 │ │ + blne 364954 │ │ svccs 0x0003e851 │ │ mvnsle r2, r0, lsl #20 │ │ vaddw.u , , d12 │ │ stmda r1, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ @ instruction: 0xb1227200 │ │ svccs 0x0000e851 │ │ rscsle r2, r8, r0, lsl #20 │ │ @ instruction: 0xf3bfe7e7 │ │ stmdavs r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc} │ │ vtbl.8 d6, {d31}, d0 │ │ @ instruction: 0xf1008f5b │ │ ldmda r1, {r3, r4, r8}^ │ │ stmda r1, {r8, r9, sl, fp}^ │ │ - bcs 3f004 │ │ + bcs 3f038 │ │ strdcc sp, [r1], -r9 │ │ ldrsbtcs sp, [r0], #27 │ │ movwcs r2, #4737 @ 0x1281 │ │ - svc 0x00e0f0b1 │ │ + svc 0x00cef0b1 │ │ ldmib r4, {r0, r2, r4, r6, r7, r8, r9, sl, sp, lr, pc}^ │ │ tstcs r0, r6 │ │ mvnvs r2, r0, lsl #16 │ │ - bl 5a928 │ │ + bl 5a95c │ │ strcs r0, [r1, #-64] @ 0xffffffc0 │ │ streq lr, [r0], r7, lsl #22 │ │ ldrdeq lr, [r0, -r7] │ │ svccs 0x0003e850 │ │ @ instruction: 0xf100b952 │ │ vsubl.u q0, d15, d12 │ │ stmda r2, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ @@ -4843,71 +4856,71 @@ │ │ vabdl.u , d15, d12 │ │ ldmda r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ cdpne 15, 4, cr1, cr10, cr0, {0} │ │ movwcs lr, #2112 @ 0x840 │ │ mvnsle r2, r0, lsl #22 │ │ svclt 0x00042901 │ │ svchi 0x005bf3bf │ │ - @ instruction: 0xf90ef06d │ │ + @ instruction: 0xf92af06d │ │ ldrhle r4, [r9, #39] @ 0x27 │ │ vshr.u32 d14, d5, #1 │ │ stmvs r1, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc} │ │ svchi 0x005bf3bf │ │ ldmda r1, {r3, r4, r8, ip, sp}^ │ │ stmda r1, {r8, r9, sl, fp, sp}^ │ │ - blcs 3b490 │ │ + blcs 3b4c4 │ │ andcc sp, r1, #1073741886 @ 0x4000003e │ │ pkhtbmi sp, r1, lr, asr #3 │ │ addcs r2, r1, #240 @ 0xf0 │ │ @ instruction: 0xf0b12301 │ │ - @ instruction: 0x4648ef9a │ │ + strbmi lr, [r8], -r8, lsl #31 │ │ stmdbvs r0!, {r1, r2, r4, r6, r7, r8, r9, sl, sp, lr, pc} │ │ andcs fp, r0, r8, lsl #2 │ │ stmibvs r0!, {r0, r1, sp, lr, pc}^ │ │ @ instruction: 0xf080fab0 │ │ vtbx.8 d0, {d15-d16}, d0 │ │ @ instruction: 0xf8848f5b │ │ @ instruction: 0xf1b80020 │ │ @ instruction: 0xf3bf0f00 │ │ tstle r3, fp, asr pc │ │ ldrdeq pc, [r4], -sl │ │ teqle r2, r0, asr #32 │ │ vaddl.u q1, d15, d0 │ │ ldmda r4, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ stmda r4, {r8, r9, sl, fp, ip}^ │ │ - bcs 270e0 │ │ + bcs 27114 │ │ stmdbcs r2, {r0, r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ andlt fp, r4, ip, lsl pc │ │ @ instruction: 0x87f0e8bd │ │ @ instruction: 0x462120f0 │ │ movwcs r2, #4737 @ 0x1281 │ │ pop {r2, ip, sp, pc} │ │ @ instruction: 0xf0b147f0 │ │ - strtmi fp, [r0], -r3, lsl #30 │ │ + @ instruction: 0x4620bef1 │ │ svchi 0x002ff3bf │ │ - @ instruction: 0xfffdf050 │ │ + @ instruction: 0xf817f051 │ │ @ instruction: 0xf050e740 │ │ - @ instruction: 0xf080ff01 │ │ + @ instruction: 0xf080ff1b │ │ stmdbvc r0!, {r0, fp} │ │ @ instruction: 0xf43f2800 │ │ stmdami fp, {r1, r2, r6, r8, r9, sl, fp, sp, pc} │ │ - blmi 311128 │ │ + blmi 31115c │ │ ldrbtmi r4, [r8], #-2315 @ 0xfffff6f5 │ │ @ instruction: 0xf88d447b │ │ ldrbtmi r8, [r9], #-12 │ │ tstls r0, r2, lsl #8 │ │ @ instruction: 0xf01a212b │ │ - @ instruction: 0xf050fdbf │ │ - stmdacs r0, {r0, r1, r3, r5, r6, r7, r9, sl, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xf050ff29 │ │ + stmdacs r0, {r0, r2, r8, r9, sl, fp, ip, sp, lr, pc} │ │ andcs fp, r1, r4, lsl #30 │ │ strb r7, [r5, r0, lsr #2] │ │ - andeq r8, fp, sl │ │ - @ instruction: 0xffff2b65 │ │ - andeq r3, fp, r8, asr #15 │ │ - muleq fp, r2, r7 │ │ + strdeq r7, [fp], -r6 │ │ + @ instruction: 0xffff2b31 │ │ + andeq r3, fp, r4, asr #15 │ │ + andeq r5, fp, lr, ror #14 │ │ svcmi 0x00f0e92d │ │ strmi fp, [r1], r5, lsl #1 │ │ andcs r4, r1, ip, lsl #12 │ │ svcne 0x0000e854 │ │ cmnle r6, r0, lsl #18 │ │ tsteq r0, r4, asr #16 │ │ mvnsle r2, r0, lsl #18 │ │ @@ -4915,30 +4928,30 @@ │ │ ldrbtmi r4, [r8], #-2118 @ 0xfffff7ba │ │ stmdavs r0, {r1, ip, pc}^ │ │ cmnle r2, r0, asr #32 │ │ stmdaeq r0, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ stmdacs r0, {r5, r8, fp, ip, sp, lr} │ │ ldmib r4, {r1, r2, r5, r6, r8, ip, lr, pc}^ │ │ @ instruction: 0xf04f0603 │ │ - bl 1b4990 │ │ + bl 1b49c4 │ │ addeq r0, r9, r6, asr #2 │ │ mvnslt r4, r3, lsl #12 │ │ stmdbcc ip, {r0, r2, r3, r4, r6, fp, sp, lr} │ │ movwcc r3, #50945 @ 0xc701 │ │ @ instruction: 0xd1f84295 │ │ rsble r4, sl, #1879048203 @ 0x7000000b │ │ - bl 1f7998 │ │ + bl 1f79cc │ │ ldrtmi r0, [r2], #-327 @ 0xfffffeb9 │ │ eorpl pc, r1, r0, asr r8 @ │ │ addeq lr, r1, r0, lsl #22 │ │ subeq lr, r2, #2048 @ 0x800 │ │ mrseq pc, (UNDEF: 28) @ │ │ - blge a1108 │ │ + blge a113c │ │ @ instruction: 0xf0ae0092 │ │ - cdpcc 13, 0, cr15, cr1, cr0, {0} │ │ + @ instruction: 0x3e01fb50 │ │ @ instruction: 0x61262d00 │ │ qsublt sp, r5, r6 │ │ and r2, r6, r0 │ │ cdpcs 5, 0, cr2, cr0, cr0, {0} │ │ stmibvs r0!, {r1, r3, r4, r5, r6, r7, r8, ip, lr, pc}^ │ │ @ instruction: 0xf080fab0 │ │ vtbx.8 d0, {d15-d16}, d0 │ │ @@ -4948,50 +4961,50 @@ │ │ stm r9, {r8, r9, sl, fp} │ │ tstle r3, r0, lsr #24 │ │ stmdavs r0, {r1, fp, ip, pc}^ │ │ teqle r5, r0, asr #32 │ │ vaddl.u q1, d15, d0 │ │ ldmda r4, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ stmda r4, {r8, r9, sl, fp, ip}^ │ │ - bcs 27218 │ │ + bcs 2724c │ │ stmdbcs r2, {r0, r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ andlt fp, r5, ip, lsl pc │ │ svchi 0x00f0e8bd │ │ @ instruction: 0x462120f0 │ │ movwcs r2, #4737 @ 0x1281 │ │ pop {r0, r2, ip, sp, pc} │ │ @ instruction: 0xf0b14ff0 │ │ - strtmi fp, [r0], -r7, ror #28 │ │ + @ instruction: 0x4620be55 │ │ svchi 0x002ff3bf │ │ @ instruction: 0xf0504615 │ │ - strtmi pc, [sl], -r0, ror #30 │ │ + qsub16mi pc, sl, sl @ │ │ @ instruction: 0x4615e796 │ │ - mcr2 0, 3, pc, cr2, cr0, {2} @ │ │ + mrc2 0, 3, pc, cr12, cr0, {2} │ │ stmdaeq r1, {r7, ip, sp, lr, pc} │ │ stmdbvc r0!, {r1, r3, r5, r9, sl, lr} │ │ addsle r2, r8, r0, lsl #16 │ │ - bge f8a94 │ │ + bge f8ac8 │ │ stmdbmi pc, {r1, r2, r3, r8, r9, fp, lr} @ │ │ ldrbtmi r4, [fp], #-1144 @ 0xfffffb88 │ │ andshi pc, r0, sp, lsl #17 │ │ strls r4, [r3], #-1145 @ 0xfffffb87 │ │ @ instruction: 0x212b9100 │ │ - stc2 0, cr15, [r0, #-104]! @ 0xffffff98 │ │ - mcr2 0, 2, pc, cr12, cr0, {2} @ │ │ + mcr2 0, 4, pc, cr10, cr10, {0} @ │ │ + mcr2 0, 3, pc, cr6, cr0, {2} @ │ │ svclt 0x00042800 │ │ @ instruction: 0x71202001 │ │ - bmi 22098c │ │ + bmi 2209c0 │ │ @ instruction: 0x46314638 │ │ @ instruction: 0xf018447a │ │ - svclt 0x0000f8b7 │ │ - andeq r7, fp, r2, lsr #28 │ │ - @ instruction: 0xffff2a27 │ │ - andeq r3, fp, sl, lsl #13 │ │ - andeq r5, fp, r4, ror #12 │ │ - andeq r5, fp, r4, lsr #12 │ │ + svclt 0x0000fa21 │ │ + andeq r7, fp, lr, lsl #28 │ │ + @ instruction: 0xffff29f3 │ │ + andeq r3, fp, r6, lsl #13 │ │ + andeq r5, fp, r0, asr #12 │ │ + andeq r5, fp, r0, lsl #12 │ │ ldrbmi lr, [r0, sp, lsr #18]! │ │ strmi fp, [r4], -r4, lsl #1 │ │ mlaeq r0, r0, r8, pc @ │ │ svchi 0x005bf3bf │ │ @ instruction: 0xf0402800 │ │ andcs r8, r1, r1, lsr #1 │ │ svcne 0x0000e854 │ │ @@ -5017,54 +5030,54 @@ │ │ ldmda r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ cdpne 15, 4, cr1, cr10, cr0, {0} │ │ movwcs lr, #2112 @ 0x840 │ │ mvnsle r2, r0, lsl #22 │ │ tstle r4, r1, lsl #18 │ │ svchi 0x005bf3bf │ │ @ instruction: 0xf06c9801 │ │ - ldmib r4, {r0, r1, r4, r5, r7, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ + ldmib r4, {r0, r1, r2, r3, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ tstcs r0, r6 │ │ stmdacs r0, {r1, r3, r5, r7, r9, sl, lr} │ │ suble r6, r1, r1, ror #3 │ │ subeq lr, r0, r0, lsl #22 │ │ - bl 1eff44 │ │ + bl 1eff78 │ │ ldmib r7, {r7, r9, sl}^ │ │ ldmda r0, {r8}^ │ │ ldmdblt r2, {r0, r1, r8, r9, sl, fp, sp}^ │ │ andeq pc, ip, #0, 2 │ │ svchi 0x005bf3bf │ │ movwne lr, #2114 @ 0x842 │ │ ldmda r2, {r0, r1, r4, r6, r7, r8, ip, sp, pc}^ │ │ - blcs 36760 │ │ + blcs 36794 │ │ vshr.u64 , q12, #1 │ │ @ instruction: 0xf3bf8f2f │ │ smlsdcc ip, fp, pc, r8 @ │ │ svchi 0x005bf3bf │ │ svcne 0x0000e850 │ │ stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ - blcs 2f77c │ │ + blcs 2f7b0 │ │ stmdbcs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ @ instruction: 0xf3bfbf04 │ │ @ instruction: 0xf06c8f5b │ │ - adcsmi pc, r7, #524 @ 0x20c │ │ + adcsmi pc, r7, #636 @ 0x27c │ │ @ instruction: 0xe015d1d9 │ │ svchi 0x005bf3bf │ │ vtbl.8 d6, {d31}, d1 │ │ tstcc r8, fp, asr pc │ │ svccs 0x0000e851 │ │ movwpl lr, #2113 @ 0x841 │ │ mvnsle r2, r0, lsl #22 │ │ bicsle r3, lr, r1, lsl #4 │ │ rscscs r4, r0, r1, lsl #13 │ │ movwcs r2, #4737 @ 0x1281 │ │ - mcr 0, 0, pc, cr14, cr1, {5} @ │ │ + ldcl 0, cr15, [ip, #708]! @ 0x2c4 │ │ ldrb r4, [r6, r8, asr #12] │ │ tstlt r8, r0, lsr #18 │ │ and r2, r3, r0 │ │ - blx fec41348 │ │ + blx fec4137c │ │ stmdbeq r0, {r7, ip, sp, lr, pc}^ │ │ vqshlu.s32 q2, , #31 │ │ @ instruction: 0xf8848f5b │ │ vaddl.u q0, d15, d16 │ │ @ instruction: 0xf1b88f5b │ │ tstle r2, r0, lsl #30 │ │ subeq r6, r0, r8, ror #16 │ │ @@ -5073,60 +5086,60 @@ │ │ svcne 0x0000e854 │ │ andeq lr, r0, #68, 16 @ 0x440000 │ │ mvnsle r2, r0, lsl #20 │ │ andsle r2, lr, r2, lsl #18 │ │ pop {r2, ip, sp, pc} │ │ @ instruction: 0x462087f0 │ │ svchi 0x002ff3bf │ │ - mrc2 0, 3, pc, cr11, cr0, {2} │ │ + mrc2 0, 4, pc, cr5, cr0, {2} │ │ @ instruction: 0xf050e761 │ │ - @ instruction: 0xf080fd7f │ │ + @ instruction: 0xf080fd99 │ │ stmdbvc r0!, {r0, fp} │ │ @ instruction: 0xf43f2800 │ │ ldmdami r0, {r1, r2, r5, r6, r8, r9, sl, fp, sp, pc} │ │ - blmi 451428 │ │ + blmi 45145c │ │ ldrbtmi r4, [r8], #-2320 @ 0xfffff6f0 │ │ @ instruction: 0xf88d447b │ │ ldrbtmi r8, [r9], #-8 │ │ strne lr, [r0], #-2509 @ 0xfffff633 │ │ @ instruction: 0xf01a212b │ │ - rscscs pc, r0, sp, lsr ip @ │ │ + rscscs pc, r0, r7, lsr #27 │ │ addcs r4, r1, #34603008 @ 0x2100000 │ │ andlt r2, r4, r1, lsl #6 │ │ @ instruction: 0x47f0e8bd │ │ - ldcllt 0, cr15, [ip, #-708] @ 0xfffffd3c │ │ - stc2l 0, cr15, [r0, #-320]! @ 0xfffffec0 │ │ + stcllt 0, cr15, [sl, #-708] @ 0xfffffd3c │ │ + ldc2l 0, cr15, [sl, #-320]! @ 0xfffffec0 │ │ svclt 0x00042800 │ │ @ instruction: 0x71202001 │ │ svclt 0x0000e7c5 │ │ - andeq r7, fp, r4, asr #25 │ │ - @ instruction: 0xffff2861 │ │ - andeq r3, fp, r4, asr #9 │ │ - andeq r5, fp, lr, lsr #9 │ │ + @ instruction: 0x000b7cb0 │ │ + @ instruction: 0xffff282d │ │ + andeq r3, fp, r0, asr #9 │ │ + andeq r5, fp, sl, lsl #9 │ │ mvnsmi lr, #737280 @ 0xb4000 │ │ movwcs fp, #4227 @ 0x1083 │ │ svcvc 0x0000e850 │ │ cmple sp, r0, lsl #30 │ │ strcc lr, [r0, -r0, asr #16] │ │ mvnsle r2, r0, lsl #30 │ │ svchi 0x005bf3bf │ │ ldrbtmi r4, [ip], #-3139 @ 0xfffff3bd │ │ subseq r6, fp, r3, ror #16 │ │ strcs sp, [r0, #-345] @ 0xfffffea7 │ │ - blcs 450a4 │ │ + blcs 450d8 │ │ ldmda r2, {r0, r1, r5, r6, r8, ip, lr, pc}^ │ │ mrrcne 15, 0, r3, pc, cr0 @ │ │ strvc lr, [r0], -r2, asr #16 │ │ mvnsle r2, r0, lsl #28 │ │ ldrbtle r2, [r3], #-2816 @ 0xfffff500 │ │ stmvs r3, {r1, r2, r8, fp, sp, lr} │ │ mlasle ip, lr, r2, r4 │ │ - bl 1c0fc4 │ │ + bl 1c0ff8 │ │ @ instruction: 0xf8430746 │ │ - bl eed5c │ │ + bl eed90 │ │ andcs r0, r0, #469762050 @ 0x1c000002 │ │ andne lr, r1, #3194880 @ 0x30c000 │ │ tstvs r1, r1, ror ip │ │ stmibvs r1, {r1, r5, r8, r9, sl, fp, ip, sp, pc}^ │ │ @ instruction: 0xf181fab1 │ │ vtbx.8 d0, {d15-d16}, d10 │ │ @ instruction: 0xf8808f5b │ │ @@ -5140,51 +5153,51 @@ │ │ mvnsle r2, r0, lsl #22 │ │ svclt 0x001c2a02 │ │ pop {r0, r1, ip, sp, pc} │ │ @ instruction: 0x460183f0 │ │ addcs r2, r1, #240 @ 0xf0 │ │ andlt r2, r3, r1, lsl #6 │ │ mvnsmi lr, #12386304 @ 0xbd0000 │ │ - ldcllt 0, cr15, [r6], #708 @ 0x2c4 │ │ + stcllt 0, cr15, [r4], #708 @ 0x2c4 │ │ svchi 0x002ff3bf │ │ strmi r4, [sp], -r4, lsl #12 │ │ @ instruction: 0xf0504616 │ │ - ldrtmi pc, [r2], -lr, ror #27 @ │ │ + ldrtmi pc, [r2], -r8, lsl #28 @ │ │ strtmi r4, [r0], -r9, lsr #12 │ │ @ instruction: 0xf100e7ac │ │ strmi r0, [r0], r8, lsl #6 │ │ ldrmi r4, [r1], pc, lsl #12 │ │ @ instruction: 0xf0714618 │ │ - strbmi pc, [sl], -fp, lsl #28 @ │ │ + @ instruction: 0x464afddd │ │ @ instruction: 0x46404639 │ │ @ instruction: 0x4605e7b6 │ │ ldrmi r4, [r6], -pc, lsl #12 │ │ - stc2l 0, cr15, [r0], #320 @ 0x140 │ │ + ldc2l 0, cr15, [sl], #320 @ 0x140 │ │ strtmi r4, [r8], -r3, lsl #12 │ │ streq pc, [r1, #-131] @ 0xffffff7d │ │ @ instruction: 0x46394632 │ │ - blcs 4516c │ │ + blcs 451a0 │ │ stmdbmi lr, {r0, r1, r3, r4, r7, ip, lr, pc} │ │ - bmi 3f99a0 │ │ + bmi 3f99d4 │ │ ldrbtmi r4, [fp], #-1145 @ 0xfffffb87 │ │ andpl pc, r8, sp, lsl #17 │ │ stmib sp, {r1, r3, r4, r5, r6, sl, lr}^ │ │ - bge 6ed78 │ │ + bge 6edac │ │ @ instruction: 0x212b4608 │ │ - blx fe6e2dea │ │ + stc2 0, cr15, [r4, #-104] @ 0xffffff98 │ │ @ instruction: 0xf0504604 │ │ - strmi pc, [r1], -r5, asr #25 │ │ + @ instruction: 0x4601fcdf │ │ stmdbcs r0, {r5, r9, sl, lr} │ │ tstcs r1, r4, lsl #30 │ │ str r7, [sl, r1, lsl #2]! │ │ svclt 0x0000defe │ │ - andeq r7, fp, lr, lsl #22 │ │ - @ instruction: 0xffff271f │ │ - andeq r3, fp, r2, lsl #7 │ │ - andeq r5, fp, ip, ror r3 │ │ + strdeq r7, [fp], -sl │ │ + @ instruction: 0xffff26eb │ │ + andeq r3, fp, lr, ror r3 │ │ + andeq r5, fp, r8, asr r3 │ │ svcmi 0x00f0e92d │ │ @ instruction: 0xf8ddb093 │ │ @ instruction: 0xf1009070 │ │ strmi r0, [r3], ip, lsl #16 │ │ andcs pc, r0, ip, asr #12 │ │ addscc pc, sl, r3, asr #13 │ │ smlalbble r4, r1, r1, r5 │ │ @@ -5193,69 +5206,69 @@ │ │ ldrdeq pc, [r0], -r8 │ │ svchi 0x005bf3bf │ │ cmnle fp, r0, lsl #16 │ │ ldrdeq pc, [r8], -fp │ │ ldreq pc, [r8, #-256] @ 0xffffff00 │ │ svceq 0x0000e855 │ │ stmda r5, {r0, r6, r9, sl, fp, ip}^ │ │ - bcs 2b5ec │ │ + bcs 2b620 │ │ stmdacs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ svchi 0x005bf3bf │ │ and sp, r3, sl, ror #1 │ │ svchi 0x002ff3bf │ │ svchi 0x005bf3bf │ │ stmdavs r8!, {r2, r3, sl, ip, pc} │ │ tstle r4, r1 │ │ strtmi r9, [r9], -ip, lsl #16 │ │ @ instruction: 0xf04f2289 │ │ stmdacs r0, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, ip, sp} │ │ ldcne 15, cr11, [r0, #-96]! @ 0xffffffa0 │ │ addseq lr, r1, sp, lsl #17 │ │ @ instruction: 0xf0b120f0 │ │ - @ instruction: 0xf1b0ecda │ │ + @ instruction: 0xf1b0ecc8 │ │ stcle 15, cr3, [r4], {255} @ 0xff │ │ - ldc 0, cr15, [r4, #-708] @ 0xfffffd3c │ │ + stc 0, cr15, [r2, #-708] @ 0xfffffd3c │ │ stmdacs r4, {fp, sp, lr} │ │ ldmda r5, {r0, r1, r2, r5, r6, r7, ip, lr, pc}^ │ │ stmdacs r1, {r8, r9, sl, fp} │ │ stmda r5, {r1, r2, r3, r4, r6, r7, r8, ip, lr, pc}^ │ │ stmdacs r0, {lr} │ │ vsra.u64 , , #1 │ │ @ instruction: 0xe7c18f5b │ │ @ instruction: 0x4616461d │ │ - beq c63284 │ │ + beq c632b8 │ │ ldrdeq pc, [r0], -r8 │ │ svchi 0x005bf3bf │ │ @ instruction: 0x4650bbd0 │ │ - ldc2l 0, cr15, [r4], #-436 @ 0xfffffe4c │ │ + ldc2 0, cr15, [r0], {109} @ 0x6d │ │ andeq lr, ip, #3620864 @ 0x374000 │ │ movweq lr, #23170 @ 0x5a82 │ │ strcs r9, [r0, -lr, lsl #18] │ │ streq lr, [r6], #-2688 @ 0xfffff580 │ │ - blne fe137b00 │ │ + blne fe137b34 │ │ streq lr, [r5], #-2930 @ 0xfffff48e │ │ streq pc, [r0], #-79 @ 0xffffffb1 │ │ strcs fp, [r1], #-4024 @ 0xfffff048 │ │ svclt 0x00384549 │ │ - blcs 30a8c │ │ + blcs 30ac0 │ │ qadd16mi fp, r7, r8 │ │ stmib sp, {r0, r1, r2, r3, r4, r5, r8, r9, ip, sp, pc}^ │ │ - bge 2276b4 │ │ + bge 2276e8 │ │ stmdbge r4, {r1, r3, r8, ip, pc} │ │ @ instruction: 0xf8cd4650 │ │ stmib sp, {r3, r4, ip, pc}^ │ │ @ instruction: 0xf06d6504 │ │ - stmdals ip, {r0, r1, r3, r5, r7, sl, fp, ip, sp, lr, pc} │ │ + stmdals ip, {r0, r1, r2, r6, r7, sl, fp, ip, sp, lr, pc} │ │ movwcs lr, #59869 @ 0xe9dd │ │ bfieq r9, r0, (invalid: 18:0) │ │ ldrdeq pc, [r8], -fp │ │ tstcs r0, r8, lsl pc │ │ svclt 0x001c9100 │ │ movwcs r2, #512 @ 0x200 │ │ - @ instruction: 0xf972f06f │ │ + @ instruction: 0xf98ef06f │ │ ldrdeq pc, [r0], -r8 │ │ svchi 0x005bf3bf │ │ sbcle r2, r4, r0, lsl #16 │ │ stmdbcs r2, {r0, r6, r9, sl, fp, ip} │ │ andcs fp, r3, r8, lsr #30 │ │ pop {r0, r1, r4, ip, sp, pc} │ │ ldmda r8, {r4, r5, r6, r7, r8, r9, sl, fp, pc}^ │ │ @@ -5269,192 +5282,192 @@ │ │ @ instruction: 0xf3bf8f2f │ │ tstlt r9, fp, asr pc │ │ andslt r2, r3, r1 │ │ svchi 0x00f0e8bd │ │ svclt 0x00282803 │ │ andslt r2, r3, r3 │ │ svchi 0x00f0e8bd │ │ + ldrbmi lr, [r0, sp, lsr #18]! │ │ + strmi fp, [r9], r8, lsl #1 │ │ + @ instruction: 0xf06e4680 │ │ + @ instruction: 0xf899ff45 │ │ + tstcs r2, r8, lsl r0 │ │ + andsne pc, r8, r9, lsl #17 │ │ + svceq 0x0002f1bc │ │ + strbmi sp, [fp], -fp, lsr #32 │ │ + ldm r3, {r1, r7, r9, sl, lr} │ │ + @ instruction: 0x466900f5 │ │ + stm lr, {r1, r2, r3, r7, r9, sl, lr} │ │ + @ instruction: 0xf89900f5 │ │ + @ instruction: 0xf8b9001b │ │ + @ instruction: 0xf8ad2019 │ │ + @ instruction: 0x46522019 │ │ + andseq pc, fp, sp, lsl #17 │ │ + @ instruction: 0xf88d4640 │ │ + @ instruction: 0xf7fec018 │ │ + vqrdmulh.s , , d11[0] │ │ + ldmda sl, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ + cdpne 15, 4, cr0, cr1, cr0, {0} │ │ + andne lr, r0, #4849664 @ 0x4a0000 │ │ + mvnsle r2, r0, lsl #20 │ │ + tstle r7, r1, lsl #16 │ │ + svchi 0x005bf3bf │ │ + andlt r4, r8, r0, asr r6 │ │ + @ instruction: 0x47f0e8bd │ │ + stclt 0, cr15, [r0, #432]! @ 0x1b0 │ │ + pop {r3, ip, sp, pc} │ │ + stmdami r2, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ + @ instruction: 0xf0184478 │ │ + svclt 0x0000febd │ │ + andeq r5, fp, r8, asr #2 │ │ @ instruction: 0xb084b5b0 │ │ @ instruction: 0xf06e4605 │ │ - strmi pc, [r4], -fp, lsr #30 │ │ + strmi pc, [r4], -r5, lsl #30 │ │ + andeq lr, r0, #3489792 @ 0x354000 │ │ + movwcs r6, #2217 @ 0x8a9 │ │ + bicslt r6, r8, fp, lsr #32 │ │ + andeq lr, r1, #3358720 @ 0x334000 │ │ + tstls r3, r1, lsl #16 │ │ + @ instruction: 0xf7ff4621 │ │ + @ instruction: 0xf3bffab5 │ │ + ldmda r4, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ + cdpne 15, 4, cr0, cr1, cr0, {0} │ │ + andne lr, r0, #68, 16 @ 0x440000 │ │ + mvnsle r2, r0, lsl #20 │ │ + tstle r7, r1, lsl #16 │ │ + svchi 0x005bf3bf │ │ + andlt r4, r4, r0, lsr #12 │ │ + ldrhtmi lr, [r0], sp │ │ + ldcllt 0, cr15, [r0, #-432]! @ 0xfffffe50 │ │ + ldclt 0, cr11, [r0, #16]! │ │ + ldrbtmi r4, [r8], #-2049 @ 0xfffff7ff │ │ + mcr2 0, 4, pc, cr14, cr8, {0} @ │ │ + andeq r5, fp, sl, ror #1 │ │ + @ instruction: 0xb084b5b0 │ │ + @ instruction: 0xf06e4605 │ │ + @ instruction: 0x4604fed7 │ │ andeq lr, r0, #3489792 @ 0x354000 │ │ movwcs r6, #2217 @ 0x8a9 │ │ bicslt r6, r8, fp, lsr #32 │ │ andeq lr, r1, #3358720 @ 0x334000 │ │ tstls r3, r1, lsl #16 │ │ @ instruction: 0xf7fe4621 │ │ - @ instruction: 0xf3bff9b1 │ │ + vtbx.8 d15, {d15-d16}, d1 │ │ ldmda r4, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ cdpne 15, 4, cr0, cr1, cr0, {0} │ │ andne lr, r0, #68, 16 @ 0x440000 │ │ mvnsle r2, r0, lsl #20 │ │ tstle r7, r1, lsl #16 │ │ svchi 0x005bf3bf │ │ andlt r4, r4, r0, lsr #12 │ │ ldrhtmi lr, [r0], sp │ │ - ldclt 0, cr15, [r6, #432] @ 0x1b0 │ │ + stcllt 0, cr15, [r2, #-432] @ 0xfffffe50 │ │ ldclt 0, cr11, [r0, #16]! │ │ ldrbtmi r4, [r8], #-2049 @ 0xfffff7ff │ │ - stc2l 0, cr15, [r6, #-96]! @ 0xffffffa0 │ │ - muleq fp, r2, r1 │ │ + mcr2 0, 3, pc, cr0, cr8, {0} @ │ │ + andeq r5, fp, lr, lsl #1 │ │ @ instruction: 0xb084b5b0 │ │ @ instruction: 0xf06e4605 │ │ - @ instruction: 0x4604fefd │ │ + strmi pc, [r4], -r9, lsr #29 │ │ andeq lr, r0, #3489792 @ 0x354000 │ │ movwcs r6, #2217 @ 0x8a9 │ │ bicslt r6, r8, fp, lsr #32 │ │ andeq lr, r1, #3358720 @ 0x334000 │ │ tstls r3, r1, lsl #16 │ │ @ instruction: 0xf7ff4621 │ │ - @ instruction: 0xf3bffa5d │ │ + vtbx.8 d15, {d31- instruction: 0xf06e4680 │ │ - strmi pc, [r4], -sp, asr #29 │ │ + @ instruction: 0x4604fe79 │ │ tstcs r2, r0, lsr ip │ │ ldrtvc r2, [r1], #-2050 @ 0xfffff7fe │ │ ldm r6, {r0, r1, r2, r5, ip, lr, pc} │ │ ldclvc 0, cr0, [r7], #184 @ 0xb8 │ │ eoreq lr, lr, sp, lsl #17 │ │ strtmi r4, [r2], -r9, ror #12 │ │ @ instruction: 0x6011f8b6 │ │ andseq pc, r0, sp, lsl #17 │ │ @ instruction: 0xf8ad4640 │ │ @ instruction: 0xf88d6011 │ │ @ instruction: 0xf7fe7013 │ │ - vtbl.8 d15, {d15-d18}, d17 │ │ + @ instruction: 0xf3bffab1 │ │ ldmda r4, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ cdpne 15, 4, cr0, cr1, cr0, {0} │ │ andne lr, r0, #68, 16 @ 0x440000 │ │ mvnsle r2, r0, lsl #20 │ │ tstle r7, r1, lsl #16 │ │ svchi 0x005bf3bf │ │ andlt r4, r6, r0, lsr #12 │ │ ldrhmi lr, [r0, #141]! @ 0x8d │ │ - stclt 0, cr15, [lr, #-432]! @ 0xfffffe50 │ │ + ldcllt 0, cr15, [sl], {108} @ 0x6c │ │ pop {r1, r2, ip, sp, pc} │ │ stmdami r2, {r4, r5, r6, r7, r8, pc} │ │ @ instruction: 0xf0184478 │ │ - svclt 0x0000fcfd │ │ - andeq r5, fp, r0, asr #1 │ │ - @ instruction: 0xb084b5b0 │ │ - @ instruction: 0xf06e4605 │ │ - @ instruction: 0x4604fe93 │ │ - andeq lr, r0, #3489792 @ 0x354000 │ │ - movwcs r6, #2217 @ 0x8a9 │ │ - bicslt r6, r8, fp, lsr #32 │ │ - andeq lr, r1, #3358720 @ 0x334000 │ │ - tstls r3, r1, lsl #16 │ │ - @ instruction: 0xf7ff4621 │ │ - @ instruction: 0xf3bffa5f │ │ - ldmda r4, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ - cdpne 15, 4, cr0, cr1, cr0, {0} │ │ - andne lr, r0, #68, 16 @ 0x440000 │ │ - mvnsle r2, r0, lsl #20 │ │ - tstle r7, r1, lsl #16 │ │ - svchi 0x005bf3bf │ │ - andlt r4, r4, r0, lsr #12 │ │ - ldrhtmi lr, [r0], sp │ │ - ldcllt 0, cr15, [lr], #432 @ 0x1b0 │ │ - ldclt 0, cr11, [r0, #16]! │ │ - ldrbtmi r4, [r8], #-2049 @ 0xfffff7ff │ │ - stc2l 0, cr15, [lr], {24} │ │ - andeq r5, fp, r2, rrx │ │ + svclt 0x0000fdf7 │ │ + @ instruction: 0x000b4fbc │ │ mvnsmi lr, #737280 @ 0xb4000 │ │ strmi fp, [r9], r9, lsl #1 │ │ @ instruction: 0xf06e4680 │ │ - @ instruction: 0xf899fe63 │ │ + @ instruction: 0xf899fe3d │ │ tstcs r2, ip, lsl r0 │ │ andsne pc, ip, r9, lsl #17 │ │ svceq 0x0002f1bc │ │ strbmi sp, [fp], -ip, lsr #32 │ │ - blgt fe8788d8 │ │ + blgt fe878990 │ │ strmi r4, [sl], -r9, ror #12 │ │ ldm r3, {r0, r5, r7, r9, lr, pc} │ │ rscgt r0, r1, #225 @ 0xe1 │ │ mulseq pc, r9, r8 @ │ │ @ instruction: 0x201df8b9 │ │ andscs pc, sp, sp, lsr #17 │ │ @ instruction: 0xf88d4622 │ │ @ instruction: 0x4640001f │ │ andsgt pc, ip, sp, lsl #17 │ │ - @ instruction: 0xff50f7fe │ │ + @ instruction: 0xff0ef7fe │ │ svchi 0x005bf3bf │ │ svceq 0x0000e854 │ │ stmda r4, {r0, r6, r9, sl, fp, ip}^ │ │ - bcs 2b900 │ │ + bcs 2b9b8 │ │ stmdacs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ vaddw.u , , d7 │ │ qsaxmi r8, r0, fp │ │ pop {r0, r3, ip, sp, pc} │ │ @ instruction: 0xf06c43f0 │ │ - @ instruction: 0xb009bcbd │ │ + mullt r9, r7, ip │ │ mvnshi lr, #12386304 @ 0xbd0000 │ │ ldrbtmi r4, [r8], #-2049 @ 0xfffff7ff │ │ - stc2 0, cr15, [ip], {24} │ │ - ldrdeq r4, [fp], -lr │ │ - ldrbmi lr, [r0, sp, lsr #18]! │ │ - strmi fp, [r9], r8, lsl #1 │ │ - @ instruction: 0xf06e4680 │ │ - @ instruction: 0xf899fe21 │ │ - tstcs r2, r8, lsl r0 │ │ - andsne pc, r8, r9, lsl #17 │ │ - svceq 0x0002f1bc │ │ - strbmi sp, [fp], -fp, lsr #32 │ │ - ldm r3, {r1, r7, r9, sl, lr} │ │ - @ instruction: 0x466900f5 │ │ - stm lr, {r1, r2, r3, r7, r9, sl, lr} │ │ - @ instruction: 0xf89900f5 │ │ - @ instruction: 0xf8b9001b │ │ - @ instruction: 0xf8ad2019 │ │ - @ instruction: 0x46522019 │ │ - andseq pc, fp, sp, lsl #17 │ │ - @ instruction: 0xf88d4640 │ │ - @ instruction: 0xf7fec018 │ │ - vqdmulh.s , , d3[0] │ │ - ldmda sl, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ - cdpne 15, 4, cr0, cr1, cr0, {0} │ │ - andne lr, r0, #4849664 @ 0x4a0000 │ │ - mvnsle r2, r0, lsl #20 │ │ - tstle r7, r1, lsl #16 │ │ - svchi 0x005bf3bf │ │ - andlt r4, r8, r0, asr r6 │ │ - @ instruction: 0x47f0e8bd │ │ - ldcllt 0, cr15, [ip], #-432 @ 0xfffffe50 │ │ - pop {r3, ip, sp, pc} │ │ - stmdami r2, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ - @ instruction: 0xf0184478 │ │ - svclt 0x0000fc4b │ │ - andeq r4, fp, ip, asr pc │ │ + ldc2 0, cr15, [r4, #96]! @ 0x60 │ │ + andeq r4, fp, r6, lsr pc │ │ addlt fp, r4, r0, lsl r5 │ │ stmvs r9, {r2, r3, r7, r9, sl, lr} │ │ ldrle r0, [r4], #-394 @ 0xfffffe76 │ │ strtle r0, [r2], #-329 @ 0xfffffeb7 │ │ stcmi 8, cr7, [lr], #-12 │ │ ldrbtmi r2, [ip], #-2826 @ 0xfffff4f6 │ │ eorcs sp, r9, fp, lsr r3 │ │ - bleq b7f2c │ │ - blx af362 │ │ + bleq b7f60 │ │ + blx af396 │ │ sbclt r3, r0, #16 │ │ andseq pc, r0, r4, lsr r8 @ │ │ andeq pc, ip, sp, lsr #17 │ │ - bllt fe2ef1e4 │ │ + bllt fe2ef218 │ │ stmdavc r2, {r0, r4, r5, sp, lr, pc} │ │ andeq pc, r9, sp, lsl #2 │ │ tstcs r1, r4, lsr #24 │ │ @ instruction: 0x460b447c │ │ tstpeq pc, r2 @ p-variant is OBSOLETE │ │ @ instruction: 0x5c610912 │ │ @ instruction: 0xf1a354c1 │ │ @@ -5463,50 +5476,50 @@ │ │ andeq pc, lr, sp, lsl #2 │ │ tstcs r1, sp, lsl ip │ │ @ instruction: 0x460b447c │ │ tstpeq pc, r2 @ p-variant is OBSOLETE │ │ @ instruction: 0x5c610912 │ │ @ instruction: 0xf1a354c1 │ │ mvnsle r0, r1, lsl #2 │ │ - bmi 62e388 │ │ + bmi 62e3bc │ │ smlabteq r3, r1, r1, pc @ │ │ ldrbtmi r4, [sl], #-1048 @ 0xfffffbe8 │ │ stmib sp, {r1, r8, r9, sp}^ │ │ strbtmi r0, [r0], -r0, lsl #2 │ │ - @ instruction: 0xf0172101 │ │ - andlt pc, r4, r5, lsr pc @ │ │ + @ instruction: 0xf0182101 │ │ + mullt r4, pc, r8 @ │ │ andcs fp, r3, r0, lsl sp │ │ tstlt r3, sl, lsl r6 │ │ @ instruction: 0xf002b142 │ │ stmdacc r1, {r0, r1, r2, r3, r4, r5, r6, r8} │ │ andeq pc, fp, #1073741827 @ 0x40000003 │ │ cmpeq r1, r4, lsl #22 │ │ ldrpl r7, [r1], #-2121 @ 0xfffff7b7 │ │ smlabteq r3, r0, r1, pc @ │ │ andeq pc, fp, #1073741827 @ 0x40000003 │ │ andcs r4, r1, #16, 8 @ 0x10000000 │ │ smlabteq r0, sp, r9, lr │ │ tstcs r1, r0, ror #12 │ │ - @ instruction: 0xf0172300 │ │ - andlt pc, r4, r9, lsl pc @ │ │ + @ instruction: 0xf0182300 │ │ + andlt pc, r4, r3, lsl #17 │ │ svclt 0x0000bd10 │ │ - @ instruction: 0xffff957e │ │ - @ instruction: 0xfffeb824 │ │ - @ instruction: 0xfffeb724 │ │ - @ instruction: 0xffff00af │ │ + @ instruction: 0xffff954a │ │ + @ instruction: 0xfffeb7f0 │ │ + @ instruction: 0xfffeb6f0 │ │ + @ instruction: 0xffff007a │ │ svcmi 0x00f0e92d │ │ strmi fp, [ip], -r9, lsl #1 │ │ ldmib r4, {r0, fp, sp, lr}^ │ │ ldmvs r3, {r9}^ │ │ ldmib r1, {r0, r9, sp}^ │ │ stmdbmi r5, {r0, r8, r9, sl, ip, lr}^ │ │ @ instruction: 0x47984479 │ │ rsbsle r2, r6, r0, lsl #30 │ │ andcs fp, r1, r8, lsl #2 │ │ - bvc fe85f378 │ │ + bvc fe85f3ac │ │ strle r0, [r4], #-1536 @ 0xfffffa00 │ │ strtmi r4, [r1], -r8, lsr #12 │ │ @ instruction: 0xff78f7ff │ │ ldmib r4, {r1, r3, r5, sp, lr, pc}^ │ │ andcs r8, r1, #0, 12 │ │ @ instruction: 0xf04f68f3 │ │ ldmdbmi fp!, {r0, r8, fp} │ │ @@ -5526,15 +5539,15 @@ │ │ stmdacs r0, {r0, r2, r4, r6, r8, r9, sl, fp, ip, sp, lr, pc} │ │ ldmib sp, {r0, r4, r6, r7, r8, ip, lr, pc}^ │ │ andcs r0, r2, #1073741825 @ 0x40000001 │ │ stmdbmi ip!, {r0, r1, r3, r6, r7, fp, sp, lr} │ │ @ instruction: 0x47984479 │ │ eorsle r3, lr, r1, lsl #30 │ │ strcc r4, [r1, #-2346] @ 0xfffff6d6 │ │ - bleq 163754 │ │ + bleq 163788 │ │ ldmdaeq r4, {r0, r2, r3, r8, ip, sp, lr, pc} │ │ sxtab16mi r4, r9, r9, ror #8 │ │ ldrbtmi r4, [r9], #-2343 @ 0xfffff6d9 │ │ and r4, r3, sl, lsl #13 │ │ strcc r2, [r1, #-1] │ │ eorle r3, lr, r1, lsl #30 │ │ mvnsle r0, r0, asr #15 │ │ @@ -5564,3290 +5577,181 @@ │ │ andlt r2, r9, r1 │ │ svchi 0x00f0e8bd │ │ ldrdeq lr, [r0, -r4] │ │ stmiavs fp, {r0, r9, sp}^ │ │ ldrbtmi r4, [r9], #-2313 @ 0xfffff6f7 │ │ mullt r9, r8, r7 │ │ svchi 0x00f0e8bd │ │ - @ instruction: 0xfffeffdd │ │ - @ instruction: 0xffff1340 │ │ - andeq r3, fp, r0, asr #6 │ │ - @ instruction: 0xfffeb720 │ │ - @ instruction: 0xffff00c1 │ │ - strdeq r3, [fp], -r6 │ │ - @ instruction: 0xfffeb6a0 │ │ - @ instruction: 0xfffefed4 │ │ + @ instruction: 0xfffeffa8 │ │ + @ instruction: 0xffff130c │ │ + andeq r3, fp, ip, lsl r3 │ │ + @ instruction: 0xfffeb6ec │ │ + @ instruction: 0xffff008c │ │ + ldrdeq r3, [fp], -r2 │ │ + @ instruction: 0xfffeb66c │ │ + @ instruction: 0xfffefe9f │ │ addlt fp, r6, r0, ror r5 │ │ stmvs r9, {r2, r3, r9, sl, lr} │ │ ldrle r0, [r9], #-394 @ 0xfffffe76 │ │ strtle r0, [r7], #-329 @ 0xfffffeb7 │ │ @ instruction: 0xf10d6806 │ │ strtmi r0, [r9], -lr, lsl #10 │ │ ldrtmi r2, [r0], -r0, lsl #28 │ │ rsbsmi fp, r0, #72, 30 @ 0x120 │ │ - @ instruction: 0xf832f019 │ │ + @ instruction: 0xf99cf019 │ │ smlabteq sl, r0, r1, pc @ │ │ andcs r4, r1, #40, 8 @ 0x28000000 │ │ stmib sp, {r8, r9, sp}^ │ │ mvnsmi r0, #0, 2 │ │ strtmi r0, [r0], -r1, asr #31 │ │ - mcr2 0, 2, pc, cr10, cr7, {0} @ │ │ + @ instruction: 0xffb4f017 │ │ ldcllt 0, cr11, [r0, #-24]! @ 0xffffffe8 │ │ @ instruction: 0xf10d6801 │ │ - bmi 567454 │ │ + bmi 567488 │ │ ldrbtmi r2, [sl], #-1543 @ 0xfffff9f9 │ │ @ instruction: 0xf0014633 │ │ stmdbeq r9, {r0, r1, r2, r3, r9, sl} │ │ strbpl r5, [r6], #3478 @ 0xd96 │ │ streq pc, [r1], -r3, lsr #3 │ │ strd sp, [lr], -r6 │ │ @ instruction: 0xf10d6801 │ │ - bmi 3a7474 │ │ + bmi 3a74a8 │ │ ldrbtmi r2, [sl], #-1543 @ 0xfffff9f9 │ │ @ instruction: 0xf0014633 │ │ stmdbeq r9, {r0, r1, r2, r3, r9, sl} │ │ strbpl r5, [r6], #3478 @ 0xd96 │ │ streq pc, [r1], -r3, lsr #3 │ │ mrrcne 1, 15, sp, r9, cr6 │ │ @ instruction: 0xf1c14a08 │ │ ldrmi r0, [r8], #-265 @ 0xfffffef7 │ │ movwcs r4, #9338 @ 0x247a │ │ smlabteq r0, sp, r9, lr │ │ tstcs r1, r0, lsr #12 │ │ - mrc2 0, 0, pc, cr12, cr7, {0} │ │ + @ instruction: 0xff86f017 │ │ ldcllt 0, cr11, [r0, #-24]! @ 0xffffffe8 │ │ - @ instruction: 0xfffeb5f2 │ │ - @ instruction: 0xfffeb4f2 │ │ - @ instruction: 0xfffefe7d │ │ + @ instruction: 0xfffeb5be │ │ + @ instruction: 0xfffeb4be │ │ + @ instruction: 0xfffefe48 │ │ @ instruction: 0xb086b5b0 │ │ stmvs r9, {r2, r3, r9, sl, lr} │ │ strle r0, [sp], #-394 @ 0xfffffe76 │ │ ldrle r0, [fp], #-329 @ 0xfffffeb7 │ │ streq pc, [lr, #-269] @ 0xfffffef3 │ │ strtmi r6, [r9], -r0, lsl #16 │ │ - @ instruction: 0xffe2f018 │ │ + @ instruction: 0xf94cf019 │ │ smlabteq sl, r0, r1, pc @ │ │ andcs r4, r1, #40, 8 @ 0x28000000 │ │ eor r2, r5, r0, lsl #6 │ │ @ instruction: 0xf10d6801 │ │ - bmi 5674e4 │ │ + bmi 567518 │ │ ldrbtmi r2, [sl], #-1287 @ 0xfffffaf9 │ │ @ instruction: 0xf001462b │ │ stmdbeq r9, {r0, r1, r2, r3, r8, sl} │ │ strbpl r5, [r5], #3413 @ 0xd55 │ │ streq pc, [r1, #-419] @ 0xfffffe5d │ │ strd sp, [lr], -r6 │ │ @ instruction: 0xf10d6801 │ │ - bmi 3a7504 │ │ + bmi 3a7538 │ │ ldrbtmi r2, [sl], #-1287 @ 0xfffffaf9 │ │ @ instruction: 0xf001462b │ │ stmdbeq r9, {r0, r1, r2, r3, r8, sl} │ │ strbpl r5, [r5], #3413 @ 0xd55 │ │ streq pc, [r1, #-419] @ 0xfffffe5d │ │ mrrcne 1, 15, sp, r9, cr6 │ │ @ instruction: 0xf1c14a08 │ │ ldrmi r0, [r8], #-265 @ 0xfffffef7 │ │ movwcs r4, #9338 @ 0x247a │ │ smlabteq r0, sp, r9, lr │ │ tstcs r1, r0, lsr #12 │ │ - ldc2l 0, cr15, [r4, #92] @ 0x5c │ │ + @ instruction: 0xff3ef017 │ │ ldclt 0, cr11, [r0, #24]! │ │ - @ instruction: 0xfffeb562 │ │ - @ instruction: 0xfffeb462 │ │ - @ instruction: 0xfffefded │ │ + @ instruction: 0xfffeb52e │ │ + @ instruction: 0xfffeb42e │ │ + @ instruction: 0xfffefdb8 │ │ @ instruction: 0x460a4613 │ │ ldrbtmi r4, [r9], #-2305 @ 0xfffff6ff │ │ - stcllt 0, cr15, [r0, #-92] @ 0xffffffa4 │ │ - andeq r2, fp, r2, ror #22 │ │ + mcrlt 0, 5, pc, cr10, cr7, {0} @ │ │ + andeq r2, fp, lr, lsr fp │ │ svcmi 0x00f0e92d │ │ - ldrmi fp, [r6], -r9, lsl #1 │ │ - andls r6, r3, sl, asr #16 │ │ - bleq 4a3e2c │ │ - bleq 64050 │ │ - cdpvs 1, 1, cr9, cr0, cr2, {0} │ │ - ldclvs 1, cr11, [r7, #928] @ 0x3a0 │ │ - stmibne r0, {r0, r1, r2, r3, r6, r9, fp, sp, lr, pc}^ │ │ - mulhi r9, r1, r8 │ │ - bvc 330944 │ │ - beq 63684 │ │ - ldrtmi sl, [r9], -r4, lsl #16 │ │ - @ instruction: 0x46234632 │ │ - andhi pc, r0, sp, asr #17 │ │ - stc2l 0, cr15, [r4, #-192]! @ 0xffffff40 │ │ - ldrbmi r9, [r8, #-2052] @ 0xfffff7fc │ │ - ldmib sp, {r1, r2, r4, r8, ip, lr, pc}^ │ │ - strcc r0, [r0, r6, lsl #2] │ │ - bl 12ad61c │ │ - @ instruction: 0xf1b90a01 │ │ - mvnle r0, r0, lsl #19 │ │ - strcs lr, [r0, #-2] │ │ - beq 636b4 │ │ - stmdbls r3, {r1, fp, ip, pc} │ │ - stmib r0, {fp, sp, lr}^ │ │ - @ instruction: 0xf8c15a00 │ │ - andlt fp, r9, r0 │ │ - svchi 0x00f0e8bd │ │ - strmi r9, [r3], r3, lsl #18 │ │ - andvc lr, r5, #3620864 @ 0x374000 │ │ - stmib r1, {r0, r1, r2, r8, r9, fp, ip, pc}^ │ │ - sbcvs r7, fp, r1, lsl #4 │ │ - andlt pc, r0, r1, asr #17 │ │ - pop {r0, r3, ip, sp, pc} │ │ - ldrble r8, [r4], #4080 @ 0xff0 │ │ - mvnsmi lr, #737280 @ 0xb4000 │ │ - ldmib r0, {r0, r3, r7, ip, sp, pc}^ │ │ - movwcs r0, #2304 @ 0x900 │ │ - andvs r6, r3, r2, lsl #16 │ │ - tstvs r3, #17408 @ 0x4400 │ │ - @ instruction: 0x466cb359 │ │ - strmi r4, [r8, r0, lsr #12] │ │ - ldrdvc pc, [r0], -r9 │ │ - ldrdeq lr, [r0, -r7] │ │ - andsle r4, r3, r8, lsl #6 │ │ - strhi lr, [r5, #-2519] @ 0xfffff629 │ │ - @ instruction: 0xf108b155 │ │ - ldmdavs r0!, {r3, r9, sl} │ │ - svclt 0x001c2800 │ │ - @ instruction: 0xf0b16870 │ │ - @ instruction: 0x3618e8f0 │ │ - mvnsle r3, r1, lsl #26 │ │ - stmdacs r0, {r3, r4, r5, r8, fp, sp, lr} │ │ - @ instruction: 0x4640bf1c │ │ - stmia r6!, {r0, r4, r5, r7, ip, sp, lr, pc}^ │ │ - ldrdeq pc, [r0], -r9 │ │ - andcs r2, r1, #0, 2 │ │ - smlattcs r2, r0, r8, lr │ │ - addgt ip, lr, lr, lsl #25 │ │ - umulleq lr, lr, r4, r8 @ │ │ - andcs ip, r1, lr, lsl #1 │ │ - pop {r0, r3, ip, sp, pc} │ │ - stmdami r3, {r4, r5, r6, r7, r8, r9, pc} │ │ - bmi efb70 │ │ - ldrbtmi r4, [sl], #-1144 @ 0xfffffb88 │ │ - blx 763684 │ │ - @ instruction: 0xfffef9f7 │ │ - andeq r3, fp, sl, asr #24 │ │ - ldrdeq lr, [r0, -r0] │ │ - stmdavs r2, {r8, r9, sp} │ │ - ldmdavs r0, {r0, r1, sp, lr} │ │ - stmdavs r9, {r0, r1, r4, sp, lr} │ │ - andcs r6, r1, r8 │ │ - push {r4, r5, r6, r8, r9, sl, lr} │ │ - @ instruction: 0xb0914ff0 │ │ - @ instruction: 0xf8914682 │ │ - andls r0, fp, #36 @ 0x24 │ │ - @ instruction: 0xf101b188 │ │ - strmi r0, [ip], -r8, lsl #12 │ │ - @ instruction: 0xce4d6989 │ │ - subeq lr, sp, sp, lsl #17 │ │ - bls 311694 │ │ - ldc2 0, cr15, [ip, #140]! @ 0x8c │ │ - tstcs r1, ip, lsl #16 │ │ + andls fp, r3, fp, lsl #1 │ │ + stmvs r8, {r0, r1, r4, r7, r9, sl, lr} │ │ + cmplt sl, #4325376 @ 0x420000 │ │ + @ instruction: 0xf10d6800 │ │ + ldmib r1, {r5, r8, fp}^ │ │ + @ instruction: 0xf10d7500 │ │ + stmiavs lr, {r4, r9, fp}^ │ │ + stmdaeq r8, {r8, ip, sp, lr, pc} │ │ + @ instruction: 0xf8d80114 │ │ + bcs 6f58c │ │ + @ instruction: 0xf8d8d92b │ │ + stmib sp, {}^ @ │ │ + ldrbmi r0, [sl], -r8, lsl #4 │ │ + ldrbmi r8, [r0], -r1, lsl #16 │ │ + ldrtmi r9, [r1], -sl, lsl #2 │ │ + strvc lr, [r0, #-2509] @ 0xfffff633 │ │ + andls pc, r8, sp, asr #17 │ │ + cdp2 0, 6, cr15, cr4, cr12, {1} │ │ + tstcs r1, r4, lsl #16 │ │ smlabteq r0, r8, r2, pc @ │ │ - smlalbble r4, fp, r8, r2 │ │ - stmibvs sp, {r0, r5, r9, sl, lr}^ │ │ - ldrdlt lr, [r0], -r1 │ │ - @ instruction: 0xf101b3cd │ │ - stmdbvs lr, {r3, r8, fp}^ │ │ - stmibvs r9, {r3, r8, ip, pc} │ │ - andseq lr, r4, #10027008 @ 0x990000 │ │ - eorge pc, r8, sp, asr #17 │ │ - beq ff061fd0 │ │ - @ instruction: 0xf8cd9007 │ │ - strls fp, [r6, #-36] @ 0xffffffdc │ │ - svceq 0x0000f1ba │ │ - ldmib fp, {r1, r3, r4, ip, lr, pc}^ │ │ - ldrmi r0, [r0], r0, lsl #6 │ │ - andseq lr, r4, #9240576 @ 0x8d0000 │ │ - bls 2f8eec │ │ - andvs lr, r3, sp, asr #19 │ │ - movwls sl, #22540 @ 0x580c │ │ - blx fe663770 │ │ - tstcs r1, ip, lsl #16 │ │ + smlabble pc, r8, r2, r4 @ │ │ + ldrdeq lr, [r6, -sp] │ │ + stmdb r8, {r4, sl, fp, ip, sp}^ │ │ + cps #2 │ │ + bicsle r0, lr, r0, lsl r8 │ │ + tstcs r1, r3, lsl #16 │ │ smlabteq r0, r8, r2, pc @ │ │ - smlawble r8, r8, r2, r4 │ │ - @ instruction: 0xf1aa3d01 │ │ - @ instruction: 0xf10b0a08 │ │ - strbmi r0, [r2], -r8, lsl #22 │ │ - mvnle r4, r9, lsr r6 │ │ - ldrdcc lr, [r6], -sp │ │ - ldrdge pc, [r8], -sp @ │ │ - ldmib sp, {r0, r1, r7, r9, lr}^ │ │ - andle r0, r9, #8, 22 @ 0x2000 │ │ - teqlt pc, r7, lsl #20 │ │ - sbceq lr, r3, fp, lsl #22 │ │ - bvs 41f7a8 │ │ - svclt 0x00182f00 │ │ - @ instruction: 0xd1202800 │ │ - vshr.s8 d18, d1, #8 │ │ - @ instruction: 0xf8ca0000 │ │ - andslt r0, r1, r0 │ │ + andlt r6, fp, r1 │ │ svchi 0x00f0e8bd │ │ - blgt 412340 │ │ - andeq lr, pc, sl, lsl #17 │ │ - pop {r0, r4, ip, sp, pc} │ │ - mcrls 15, 0, r8, cr10, cr0, {7} │ │ - ldrsbtne pc, [r9], -sp @ │ │ - mlascc r4, sp, r8, pc @ │ │ - ldrsbtvc pc, [r5], -sp @ │ │ - @ instruction: 0xf8c69a0f │ │ - @ instruction: 0xf8c61009 │ │ - rscsvs r7, r2, r5 │ │ - eorsvs r7, r0, r3, lsr r1 │ │ - pop {r0, r4, ip, sp, pc} │ │ - @ instruction: 0xf1018ff0 │ │ - ldmib r1, {r3, r8, fp}^ │ │ - andls r6, r7, r5, lsl #2 │ │ - ldm r9, {r3, r4, r6, r9, sl, lr} │ │ - andls r0, r6, r4, lsl r2 │ │ - ldmib r0, {r3, r7, r9, sl, lr}^ │ │ - andls r0, sl, #0, 6 │ │ - andseq lr, r4, #9240576 @ 0x8d0000 │ │ - stmib sp, {r0, r1, r3, r9, fp, ip, pc}^ │ │ - stmdage ip, {r0, r1, sp, lr} │ │ - strls lr, [r8], #-2509 @ 0xfffff633 │ │ - movwls r4, #22193 @ 0x56b1 │ │ - cdp2 0, 7, cr15, cr8, cr13, {1} │ │ - tstcs r1, ip, lsl #16 │ │ - smlabteq r0, r8, r2, pc @ │ │ - smlawble sl, r8, r2, r4 │ │ - andpl lr, r9, #3620864 @ 0x374000 │ │ - ldmib sp, {r0, r8, r9, sl, fp, ip, sp}^ │ │ - adcsle r0, r9, r7, lsl #12 │ │ - bleq ff0623b8 │ │ - strbmi r9, [r1], -r6, lsl #16 │ │ - @ instruction: 0xf100464b │ │ - ldrbmi r0, [ip, #-1032] @ 0xfffffbf8 │ │ - ldmib r4, {r4, r5, r7, ip, lr, pc}^ │ │ - stm sp, {sl, fp} │ │ - bls 2e7934 │ │ - andcc lr, r3, sp, asr #19 │ │ - @ instruction: 0xf8cda80c │ │ - @ instruction: 0xf02dc014 │ │ - stmdals ip, {r0, r1, r2, r4, r6, r9, sl, fp, ip, sp, lr, pc} │ │ - vsra.s8 d18, d1, #8 │ │ - addmi r0, r8, #0, 2 │ │ - bls 2dbbe4 │ │ - ldmib sp, {r0, r8, r9, sl, fp, ip, sp}^ │ │ - @ instruction: 0xf1046508 │ │ - strbmi r0, [r1], -r8, lsl #8 │ │ - mvnle r4, fp, asr #12 │ │ - @ instruction: 0xf8dde794 │ │ - @ instruction: 0xf89d1039 │ │ - @ instruction: 0xf8dd3034 │ │ - bls 4038b4 │ │ - andne pc, r9, sl, asr #17 │ │ - andvc pc, r5, sl, asr #17 │ │ - andcs pc, ip, sl, asr #17 │ │ - andcc pc, r4, sl, lsl #17 │ │ - andeq pc, r0, sl, asr #17 │ │ - pop {r0, r4, ip, sp, pc} │ │ - ldrble r8, [r4], #4080 @ 0xff0 │ │ - svcmi 0x00f0e92d │ │ - ldrmi fp, [r2], pc, ror #1 │ │ - movwcs r2, #33280 @ 0x8200 │ │ - stmib sp, {r0, r2, r4, r9, ip, pc}^ │ │ - @ instruction: 0x460b2313 │ │ - blpl 265960 │ │ - bleq 4a4118 │ │ - blge 5cc480 │ │ - vrshr.s8 d25, d6, #8 │ │ - tstls r8, #0, 22 │ │ - tstls r7, #19456 @ 0x4c00 │ │ - @ instruction: 0x2702e9da │ │ - @ instruction: 0x3600e9d5 │ │ - subsmi r4, sl, r7, ror r0 │ │ - tstle r2, sl, lsr r3 │ │ - ldrdcs pc, [r0], #-138 @ 0xffffff76 │ │ - @ instruction: 0xf0412a00 │ │ - @ instruction: 0x465382b0 │ │ - andmi pc, r0, #79 @ 0x4f │ │ - svcmi 0x0044f853 │ │ - stmdbhi r1, {r0, r1, r4, r6, r7, r8, fp, sp, lr, pc} │ │ - svcmi 0x0000f1b4 │ │ - tstle r6, sl, lsl r0 │ │ - bleq 263f08 │ │ - @ instruction: 0xf1abe001 │ │ - tstcs r0, r1, lsl #22 │ │ - @ instruction: 0xf289fa5f │ │ - b 10b1c6c │ │ - stmib r0, {r0, r1, r9, sp}^ │ │ - stmib r0, {r1, r8, r9, sl, sp, lr}^ │ │ - @ instruction: 0xf001b200 │ │ - ldmdals r4, {r0, r4, r8, r9, pc} │ │ - svc 0x00a2f0b0 │ │ - pop {r0, r1, r2, r3, r5, r6, ip, sp, pc} │ │ - strdls r8, [r9, -r0] │ │ - stmib sp, {r1, r3, r5, r9, sl, fp, sp, pc}^ │ │ - andcs r3, r0, fp │ │ - ldrls r2, [r2, #-260] @ 0xfffffefc │ │ - smlawteq ip, sp, r9, lr │ │ - orrcc pc, sp, r0, asr #4 │ │ - eoreq lr, sl, sp, asr #19 │ │ - eoreq lr, lr, sp, asr #19 │ │ - teqeq r0, sp, asr #19 │ │ - cdpge 0, 2, cr14, cr10, cr2, {0} │ │ - @ instruction: 0xd11e0890 │ │ - @ instruction: 0xf0204630 │ │ - stmdals pc!, {r0, r2, r4, r7, sl, fp, ip, sp, lr, pc} @ │ │ - rscsle r2, r9, r0, lsl #16 │ │ - movwcs r2, #8448 @ 0x2100 │ │ - strcs r2, [r0, -r1, lsl #10] │ │ - blx fe91f8e6 │ │ - stmdaeq r0, {r0, r1, r9, sl, sp}^ │ │ - strvs pc, [r7], -r3, lsl #22 │ │ - strvs pc, [r7, -r3, lsl #22] │ │ - bfieq r4, r3, (invalid: 12:2) │ │ - blx fe91bcb2 │ │ - stmdacs r1, {r0, r2, r9, sl, sp} │ │ - blx 11bc72 │ │ - blx 1ffcee │ │ - ldrmi r1, [r5], -r5, lsl #2 │ │ - ldrtmi lr, [r1], -fp, ror #15 │ │ - stmibgt ip, {r1, r6, r8, sl, fp, sp, pc}^ │ │ - sbcgt r1, ip, r8, lsr #26 │ │ - smulleq lr, ip, r1, r8 │ │ - sbcgt r4, ip, r9, lsr #12 │ │ - stmib sp, {sp}^ │ │ - @ instruction: 0xf10d891c │ │ - andsls r0, lr, r8, ror #18 │ │ - ldreq lr, [sl], #-2509 @ 0xfffff633 │ │ - andseq pc, r4, r9, lsl #2 │ │ - adcge pc, r0, sp, asr #17 │ │ - sbcgt ip, ip, ip, asr #19 │ │ - smlaleq lr, ip, r1, r8 │ │ - ldcls 0, cr12, [r2], {236} @ 0xec │ │ - eorsge pc, r8, sp, asr #17 │ │ - stmdacs r0, {r5, r6, r7, r9, sl, fp, sp, lr} │ │ - addshi pc, r2, r0 │ │ - bge 6d1a3c │ │ - @ instruction: 0xf0314621 │ │ - ldmib sp, {r0, r2, r4, r5, r6, sl, fp, ip, sp, lr, pc}^ │ │ - ldmib sp, {r1, r6, r8, r9, ip, lr}^ │ │ - ldrbmi r8, [sp, #-68] @ 0xffffffbc │ │ - subhi pc, r4, sp, asr #17 │ │ - @ instruction: 0xf0409010 │ │ - @ instruction: 0xf8d480ce │ │ - @ instruction: 0xf1baa054 │ │ - @ instruction: 0xf0010f00 │ │ - stcvs 2, cr8, [r0, #-240]! @ 0xffffff10 │ │ - andshi lr, r7, #3620864 @ 0x374000 │ │ - ldrdgt pc, [r4], #-141 @ 0xffffff73 @ │ │ - @ instruction: 0xf0412800 │ │ - cdpls 2, 1, cr8, cr1, cr4, {1} │ │ - stmdacs r0, {r4, fp, ip, pc} │ │ - eorhi pc, pc, #1 │ │ - svccs 0x000068b7 │ │ - eorhi pc, fp, #1 │ │ - ldrdpl lr, [r0], -r6 │ │ - ldrd pc, [ip], -r6 │ │ - ldrdmi pc, [r8], -r8 │ │ - @ instruction: 0xf8d8900f │ │ - addmi r0, r4, #0 │ │ - mvnshi pc, r1 │ │ - ldrdeq pc, [r4], -r8 │ │ - subpl r0, r5, r1, lsr #2 │ │ - bl 2eb24 │ │ - @ instruction: 0xf8c81004 │ │ - andcc r1, r4, r8 │ │ - stm r0, {r0, r1, r2, r3, r8, fp, ip, pc} │ │ - ldmdavs r0, {r1, r7, lr} │ │ - andsvs r3, r0, r1 │ │ - ldrdne pc, [r0], -ip │ │ - @ instruction: 0xf0814288 │ │ - ldmdals r0, {r1, r3, r9, pc} │ │ - ldreq pc, [r8, -r6, lsl #2] │ │ - @ instruction: 0xf1aa9911 │ │ - bl 291d0 │ │ - bl 67ad0 │ │ - cdpcs 14, 0, cr0, cr0, cr0, {6} │ │ - mvnshi pc, r1 │ │ - svclt 0x001c4577 │ │ - stccs 8, cr6, [r0, #-756] @ 0xfffffd0c │ │ - mvnshi pc, r1 │ │ - strlt lr, [r0], #-2519 @ 0xfffff629 │ │ - ldrdge pc, [ip], -r7 │ │ - ldrdls pc, [r8], -r8 │ │ - ldrdeq pc, [r0], -r8 │ │ - andsle r4, pc, r1, lsl #11 │ │ - ldrdeq pc, [r4], -r8 │ │ - tstne r9, pc, asr #20 │ │ - mcrcc 7, 0, r3, cr1, cr8, {0} │ │ - andlt pc, r1, r0, asr #16 │ │ - andne lr, r9, r0, lsl #22 │ │ - @ instruction: 0xf1093004 │ │ - @ instruction: 0xf8c80101 │ │ - stm r0, {r3, ip} │ │ - vqshl.s8 d16, d16, d0 │ │ - @ instruction: 0xf10d0b11 │ │ - ldmdavs r0, {r3, r5, r6, r8, fp} │ │ - bleq 64548 │ │ - andsvs r3, r0, r1 │ │ - ldrdne pc, [r0], -ip │ │ - bicle r4, lr, #136, 4 @ 0x80000008 │ │ - stmiblt sp, {r0, ip, sp, lr, pc}^ │ │ - tstls r2, #64, 12 @ 0x4000000 │ │ - eorsgt pc, r4, sp, asr #17 │ │ - and lr, pc, #3358720 @ 0x334000 │ │ - blx ffea3a76 │ │ - ldrsbtgt pc, [r4], -sp @ │ │ - and lr, pc, #3620864 @ 0x374000 │ │ - bfi r9, r2, (invalid: 22:17) │ │ - stccs 15, cr6, [r0, #-660] @ 0xfffffd6c │ │ - sbcshi pc, r1, r0 │ │ - subeq lr, r5, r5, lsl #22 │ │ - tsteq r0, r6, ror #30 │ │ - @ instruction: 0xf0b09011 │ │ - stmdacs r0, {r1, r2, r6, r7, r9, sl, fp, sp, lr, pc} │ │ - subhi pc, r4, #1 │ │ - strcs r4, [r0], #-1666 @ 0xfffff97e │ │ - ldrls r4, [r0, #-1705] @ 0xfffff957 │ │ - strcs lr, [r1, #-40] @ 0xffffffd8 │ │ - ldrbmi r4, [r9], -r8, lsr #12 │ │ - @ instruction: 0xf106463a │ │ - @ instruction: 0xf1a90830 │ │ - @ instruction: 0xf0ad0901 │ │ - ldmib r6, {r1, r2, r3, r4, r7, sl, fp, ip, sp, lr, pc}^ │ │ - @ instruction: 0xf1b93000 │ │ - @ instruction: 0xf8d60f00 │ │ - @ instruction: 0xf896c01c │ │ - @ instruction: 0xf896e028 │ │ - ldmib r6, {r5, sp}^ │ │ - @ instruction: 0xf84a1602 │ │ - bl 2b3abc │ │ - @ instruction: 0xf1040304 │ │ - @ instruction: 0xf8830430 │ │ - @ instruction: 0xf1032020 │ │ - sbcgt r0, r3, #4, 4 @ 0x40000000 │ │ - andseq pc, r4, r3, lsl #2 │ │ - @ instruction: 0xf8834646 │ │ - stm r0, {r3, r5, sp, lr, pc} │ │ - andsle r1, r2, r0, lsr #1 │ │ - adcmi r9, r0, #1114112 @ 0x110000 │ │ - ldmib r6, {r0, r1, r2, r3, ip, lr, pc}^ │ │ - svccs 0x0000b705 │ │ - ldrtmi sp, [r8], -pc, asr #1 │ │ - mcr 0, 4, pc, cr10, cr0, {5} @ │ │ - @ instruction: 0xf0012800 │ │ - @ instruction: 0x460581f6 │ │ - beq 661a0c │ │ - @ instruction: 0xf001900f │ │ - andcs fp, r0, r7, ror r9 │ │ - bleq 4a43f8 │ │ - @ instruction: 0xf50d2104 │ │ - stmib sp, {r2, r7, r8, fp, ip, sp, lr}^ │ │ - vrhadd.s8 q8, q0, q2 │ │ - vaddw.s8 , q12, d13 │ │ - stmib sp, {r8, r9, fp}^ │ │ - stmib sp, {r1, r6}^ │ │ - stmib sp, {r1, r2, r6}^ │ │ - and r0, r1, r8, asr #2 │ │ - @ instruction: 0xd11e0890 │ │ - @ instruction: 0xf00b4648 │ │ - stmdals r7, {r0, r1, r4, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ - rscsle r2, r9, r0, lsl #16 │ │ - movwcs r2, #8448 @ 0x2100 │ │ - strcs r2, [r0, -r1, lsl #10] │ │ - blx fe91fb52 │ │ - stmdaeq r0, {r0, r1, r9, sl, sp}^ │ │ - strvs pc, [r7], -r3, lsl #22 │ │ - strvs pc, [r7, -r3, lsl #22] │ │ - bfieq r4, r3, (invalid: 12:2) │ │ - blx fe91bf1e │ │ - stmdacs r1, {r0, r2, sl, sp} │ │ - blx 11bee2 │ │ - blx 1f7f5a │ │ - ldrmi r1, [r5], -r5, lsl #2 │ │ - strbmi lr, [r8], -fp, ror #15 │ │ - stmiagt ip, {r1, r3, r5, r8, fp, sp, pc}^ │ │ - ldm r0, {r2, r3, r6, r7, r8, lr, pc} │ │ - andcs r0, r0, ip, asr #1 │ │ - ldmdbge r7, {r2, r3, r6, r7, r8, lr, pc} │ │ - teqls r5, r2, lsl fp │ │ - andsne lr, r4, #3457024 @ 0x34c000 │ │ - teqls r8, r0, lsl pc │ │ - eorsls r1, r6, r9, lsl #17 │ │ - stmib sp, {r2, r4, r5, r8, r9, sl, ip, pc}^ │ │ - svclt 0x00287a32 │ │ - mvnscc pc, pc, asr #32 │ │ - @ instruction: 0xf8939137 │ │ - stmdbcs r0, {r2, r3, r4, r5, r6, ip} │ │ - @ instruction: 0xf8ddd075 │ │ - tstcs r4, r8, lsr r0 │ │ - stmib sp, {r1, r6, sl, fp, sp, pc}^ │ │ - vrhadd.s8 q8, q0, q2 │ │ - stmib sp, {r0, r2, r3, r7, r8, ip, sp}^ │ │ - stmib sp, {r1, r6}^ │ │ - stmib sp, {r1, r2, r6}^ │ │ - strtmi r0, [r0], -r8, asr #2 │ │ - @ instruction: 0xff8af00b │ │ - stmdacs r0, {r0, r1, r2, r6, fp, ip, pc} │ │ - strdcs sp, [r0, -r9] │ │ - strcs r2, [r1, #-770] @ 0xfffffcfe │ │ - and r2, ip, r0, lsl #14 │ │ - tstpvs r1, r3, lsl #22 @ p-variant is OBSOLETE │ │ - tstpne r5, r7, lsl #22 @ p-variant is OBSOLETE │ │ - blx fe8f9426 │ │ - stmdaeq r0, {r0, r1, r9, sl, sp}^ │ │ - strvs pc, [r7], -r3, lsl #22 │ │ - strvs pc, [r7, -r3, lsl #22] │ │ - bfieq r4, r3, (invalid: 12:2) │ │ - blx fe91bfba │ │ - stmdacs r1, {r0, r2, r9, sl, sp} │ │ - ldmeq r0, {r2, r3, r5, r6, r7, r8, ip, lr, pc} │ │ - stcgt 0, cr13, [lr], {223} @ 0xdf │ │ - addgt sl, lr, sl, lsr r8 │ │ - umulleq lr, lr, r4, r8 @ │ │ - blls 4d7e34 │ │ - ldmib r4, {r2, r6, sp, lr, pc}^ │ │ - ldmdage r7, {r2, r4, r9, ip} │ │ - andcs r9, r0, ip, asr r0 │ │ - stmne r9, {r0, r1, r2, r3, r4, r6, r8, ip, pc} │ │ - svclt 0x0028905d │ │ - mvnscc pc, pc, asr #32 │ │ - @ instruction: 0xf894915e │ │ - stmdbcs r0, {r2, r3, r4, r5, r6, ip} │ │ - strbhi pc, [ip], #0 @ │ │ - mcrrge 1, 0, r2, r2, cr4 │ │ - smlalbteq lr, r4, sp, r9 │ │ - orrcc pc, sp, r0, asr #4 │ │ - subeq lr, r2, sp, asr #19 │ │ - subeq lr, r6, sp, asr #19 │ │ - smlalbteq lr, r8, sp, r9 │ │ - ldmeq r0, {r1, sp, lr, pc} │ │ - strbhi pc, [r1], #64 @ 0x40 @ │ │ - @ instruction: 0xf00b4620 │ │ - stmdals r7, {r0, r6, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ - rscsle r2, r9, r0, lsl #16 │ │ - movwcs r2, #8448 @ 0x2100 │ │ - strcs r2, [r0, -r1, lsl #12] │ │ - blx fe91fc76 │ │ - stmdaeq r0, {r0, r1, r8, sl, sp}^ │ │ - strpl pc, [r7, #-2819] @ 0xfffff4fd │ │ - strpl pc, [r7, -r3, lsl #22] │ │ - bfieq r4, r3, (invalid: 12:2) │ │ - blx fe91c042 │ │ - stmdacs r1, {r1, r2, r8, sl, sp} │ │ - blx 11c002 │ │ - blx 1fc07e │ │ - ldrmi r1, [r6], -r6, lsl #2 │ │ - @ instruction: 0xf04fe7eb │ │ - @ instruction: 0xf8dd4000 │ │ - eorsls sl, ip, r8, lsr r0 │ │ - svceq 0x0008f813 │ │ - stclge 2, cr2, [r8, #-352]! @ 0xfffffea0 │ │ - ldmib r3, {r1, r3, r5, r9, sl, fp, sp, pc}^ │ │ - stmdacs r0!, {r0, r2, r4, r8, pc} │ │ - tstphi r2, r1, lsl #22 @ p-variant is OBSOLETE │ │ - @ instruction: 0xf100a85c │ │ - tstls sp, r5 │ │ - tstpne fp, r0, asr #4 @ p-variant is OBSOLETE │ │ - smlatbne r8, sp, r8, pc @ │ │ - strbmi fp, [fp], -r8, lsl #30 │ │ - @ instruction: 0xf1059005 │ │ - andls r0, r7, r8 │ │ - andls r1, r6, r8, ror #26 │ │ - stmdbeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ - stmdals sp, {r1, r4, r8, r9, ip, pc} │ │ - @ instruction: 0xf0004580 │ │ - svcls 0x003c8421 │ │ - @ instruction: 0xf8d8a93a │ │ - @ instruction: 0xf1b72010 │ │ - ldrbls r4, [r7], -r0 │ │ - ldmdbcc r5, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc}^ │ │ - @ instruction: 0x4608bf18 │ │ - @ instruction: 0xf04f2a00 │ │ - svclt 0x00480101 │ │ - smlabbmi r0, r2, r0, pc @ │ │ - stmdbcs r1, {r0, r3, r4, r5, r7, r8, ip, sp, pc} │ │ - @ instruction: 0xf8d8d126 │ │ - @ instruction: 0x46492030 │ │ - @ instruction: 0x4628905b │ │ - @ instruction: 0xf802f022 │ │ - strbtne lr, [r8], #-2525 @ 0xfffff623 │ │ - strtmi r4, [r9], pc, asr #12 │ │ - ldrdpl lr, [sl], #-157 @ 0xffffff63 @ │ │ - stmdbcs r2, {r2, r3, r5, r6, r9, fp, ip, pc} │ │ - beq a9c1d8 │ │ - stmib sp, {r0, r4, ip, pc}^ │ │ - ldrtmi r1, [r9], pc, lsl #4 │ │ - @ instruction: 0xf8d8e339 │ │ - @ instruction: 0x46282018 │ │ - @ instruction: 0xf0214649 │ │ - stclge 15, cr15, [r8, #-948]! @ 0xfffffc4c │ │ - rsbne lr, fp, #3620864 @ 0x374000 │ │ - stmdacs r2, {r0, r4, r5, r8, sl, fp, lr, pc} │ │ - beq a5c260 │ │ - stmib sp, {r0, r4, r8, ip, pc}^ │ │ - @ instruction: 0xe328020f │ │ - ldmdage r5, {r0, r1, r3, r4, r6, ip, pc}^ │ │ - ldrsbtcs pc, [r8], -r8 @ │ │ - subsls r4, r9, r9, asr #12 │ │ - subsls sl, r8, fp, asr r8 │ │ - ldmib r8, {r3, r5, r9, sl, lr}^ │ │ - @ instruction: 0xf0214a06 │ │ - stmdals r8!, {r0, r2, r4, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ - cmple sl, r2, lsl #16 │ │ - andsls r9, r1, fp, ror #16 │ │ - ldmib sp, {r2, r3, r5, r6, fp, ip, pc}^ │ │ - andsls r4, r0, r9, ror #10 │ │ - andls r0, pc, r8, lsr #20 │ │ - ldrsbtge pc, [r8], -sp @ │ │ - @ instruction: 0xf50de30d │ │ - blls 1b87074 │ │ - andeq lr, sp, ip, lsl #17 │ │ - ssatmi sl, #27, ip, asr #16 │ │ - @ instruction: 0x4639c032 │ │ - @ instruction: 0x0050f898 │ │ - ldmdage r5, {r3, ip, pc}^ │ │ - ldmdage ip, {r1, r3, r4, r6, ip, pc}^ │ │ - ldmdage fp, {r0, r3, r4, r6, ip, pc}^ │ │ - @ instruction: 0x46489058 │ │ - ldrdcs pc, [r0], -r8 │ │ - @ instruction: 0xb051f898 │ │ - @ instruction: 0xffaef021 │ │ - strbteq lr, [r8], #-2525 @ 0xfffff623 │ │ - @ instruction: 0x276ae9dd │ │ - stmdacs r2, {r2, r3, r5, r6, r9, sl, fp, ip, pc} │ │ - vand d29, d0, d28 │ │ - beq 42aa00 │ │ - @ instruction: 0x461546d1 │ │ - vaddl.s8 , d8, d15 │ │ - @ instruction: 0xf8dd0b00 │ │ - sbcs sl, r6, #56 @ 0x38 │ │ - stclvc 5, cr15, [sl], {13} │ │ - stm ip, {r0, r2, r3, r5, r6, r8, r9, fp, ip, pc} │ │ - stmdbge r2!, {r1, r2, r3}^ │ │ - @ instruction: 0x07c0c131 │ │ - strbhi pc, [r5, r0]! @ │ │ - msreq CPSR_, #8, 2 │ │ - bne 45aa24 │ │ - andeq lr, r1, r3, ror fp │ │ - addhi pc, r4, r0, lsl #5 │ │ - ldrbmi r2, [lr], -r1, lsl #10 │ │ - svcge 0x0069e2a5 │ │ - ldcvc 5, cr15, [sl], #52 @ 0x34 │ │ - svcgt 0x008e9e6d │ │ - @ instruction: 0x4628905c │ │ - addeq lr, lr, ip, lsl #17 │ │ - @ instruction: 0xf8d84649 │ │ - strbtls r2, [r1], -r0, lsr #32 │ │ - @ instruction: 0xff78f021 │ │ - cmneq r8, #3620864 @ 0x374000 │ │ - @ instruction: 0x276ae9dd │ │ - stmdacs r2, {r2, r3, r5, r6, r9, sl, fp, ip, pc} │ │ - beq 45c2f8 │ │ - andls r4, pc, r5, lsl r6 @ │ │ - @ instruction: 0xf8dd461c │ │ - adc sl, r4, #56 @ 0x38 │ │ - stmib sp, {r0, r2, r3, r5, r6, r8, fp, ip, pc}^ │ │ - strbeq r0, [r0, r2, ror #8] │ │ - strbcs lr, [r4, -sp, asr #19]! │ │ - stmib sp, {r1, r3, sl, ip, pc}^ │ │ - @ instruction: 0xf0006166 │ │ - ldmib r8, {r1, r4, r5, r7, r8, r9, sl, pc}^ │ │ - @ instruction: 0x464d7612 │ │ - strls lr, [pc], #-2520 @ 27e50 │ │ - @ instruction: 0xf8984632 │ │ - adcsmi sl, r4, #40 @ 0x28 │ │ - svclt 0x00384638 │ │ - strbmi r4, [r9], -r2, lsr #12 │ │ - stc 0, cr15, [r0, #-704] @ 0xfffffd40 │ │ - @ instruction: 0xf04f42a6 │ │ - svclt 0x00380100 │ │ - stmdacs r0, {r0, r8, sp} │ │ - andeq pc, r0, pc, asr #32 │ │ - andcs fp, r1, r8, asr #30 │ │ - strmi fp, [r8], -r8, lsl #30 │ │ - subsle r2, sp, r0, lsl #16 │ │ - bleq 4a4784 │ │ - vabal.s8 q9, d8, d1 │ │ - ldrbmi r0, [ip], -r0, lsl #22 │ │ - stmdbls sp!, {r2, r4, r5, r6, sp, lr, pc}^ │ │ - cmneq r2, #3358720 @ 0x334000 │ │ - stmib sp, {r6, r7, r8, r9, sl}^ │ │ - stmib sp, {r2, r5, r6, r8, r9, sl, sp}^ │ │ - @ instruction: 0xf0006166 │ │ - andcs r8, r8, r4, lsl #15 │ │ - @ instruction: 0xf0b0461e │ │ - stmdacs r0, {r1, r2, r5, r7, sl, fp, sp, lr, pc} │ │ - eorhi pc, r0, r1 │ │ - tstpmi r0, pc, asr #32 @ p-variant is OBSOLETE │ │ - b fe07fec8 │ │ - subvs r0, r1, sl, lsl #2 │ │ - tstcs r0, r4, lsl #12 │ │ - strtmi r2, [r8], -r8, lsl #4 │ │ - smlabtcs r0, sp, r9, lr │ │ - andscs r4, r0, #51380224 @ 0x3100000 │ │ - @ instruction: 0xf0214623 │ │ - strtmi pc, [r0], -sp, lsr #31 │ │ - ldcl 0, cr15, [r6], #-704 @ 0xfffffd40 │ │ - strbteq lr, [r8], #-2525 @ 0xfffff623 │ │ - @ instruction: 0xf0402801 │ │ - ldmib sp, {r3, r4, r7, pc}^ │ │ - @ instruction: 0xf8dd106a │ │ - andsls sl, r1, r8, lsr r0 │ │ - strmi r9, [sp], -ip, ror #16 │ │ - beq 24bf34 │ │ - eors r9, r5, #15 │ │ - mlasge r0, r8, r8, pc @ │ │ - ldmib r8, {r3, r5, r6, r8, sl, fp, sp, pc}^ │ │ - ldmib r8, {r3, r8, r9, sp}^ │ │ - @ instruction: 0xf08a010a │ │ - strls r0, [sl], #-1537 @ 0xfffff9ff │ │ - subeq lr, r3, sp, lsl #17 │ │ - strtmi r4, [r1], -r8, lsr #12 │ │ - @ instruction: 0xf9d8f00d │ │ - blvc ff565350 │ │ - @ instruction: 0x0668e9dd │ │ - ldmdaeq r2, {r0, r1, r3, r4, r7, fp, sp, lr, pc} │ │ - @ instruction: 0xd12c2801 │ │ - strmi r0, [sp], -r8, lsl #20 │ │ - bleq 422664 │ │ - bleq 4a4834 │ │ - @ instruction: 0xf2c89411 │ │ - and r0, r0, #0, 22 │ │ - andeq pc, r1, sl, lsl #1 │ │ - smlabbeq r1, fp, r0, pc @ │ │ - strtmi r4, [r3], -sl, asr #12 │ │ - andne lr, r2, sp, asr #19 │ │ - stmdbls sl, {r3, r5, r9, sl, lr} │ │ - strvc lr, [r0], -sp, asr #19 │ │ - @ instruction: 0xf8c8f00d │ │ - cmncs fp, #3620864 @ 0x374000 │ │ - strbteq lr, [r8], #-2525 @ 0xfffff623 │ │ - cmnle ip, r1, lsl #16 │ │ - vadd.i8 , q0, q13 │ │ - andsls r0, r1, #17408 @ 0x4400 │ │ - bleq 64a90 │ │ - beq 39788 │ │ - movweq lr, #63949 @ 0xf9cd │ │ - ldrsbtge pc, [r8], -sp @ │ │ - stmdbeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ - mcrcs 1, 0, lr, cr0, cr0, {7} │ │ - addshi pc, r2, r0 │ │ - @ instruction: 0xf0402908 │ │ - ldmdavs r0!, {r1, r2, r5, r7, r8, r9, sl, pc}^ │ │ - tstpmi r0, pc, asr #32 @ p-variant is OBSOLETE │ │ - ldrdls pc, [r0], -r6 │ │ - svcmi 0x0000f1b7 │ │ - streq lr, [r1], -r0, lsl #21 │ │ - ldmdage sl!, {r0, r1, r2, ip, lr, pc} │ │ - ldrtmi r4, [r3], -sl, asr #12 │ │ - @ instruction: 0xffbef00b │ │ - @ instruction: 0xf0002800 │ │ - @ instruction: 0xf1bb8120 │ │ - vmax.f32 d16, d0, d1 │ │ - @ instruction: 0xf8cd877f │ │ - ldmdbge r5, {r5, r7, r8, ip, pc}^ │ │ - blmi 1ae26f8 │ │ - stmdahi r0!, {r1, r3, r6, r9, sl, lr} │ │ - rsbls r4, ip, r3, lsr r6 │ │ - andls r9, r0, r7, lsl #16 │ │ - @ instruction: 0x9669a85c │ │ - @ instruction: 0xf9baf00e │ │ - @ instruction: 0x5174f89d │ │ - bleq 4a48e0 │ │ - @ instruction: 0xf2c89e5c │ │ - ldrbmi r0, [lr, #-2816] @ 0xfffff500 │ │ - adchi pc, r6, r0, asr #32 │ │ - stmdbeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ - @ instruction: 0xf00007e8 │ │ - @ instruction: 0xf1ba81a2 │ │ - @ instruction: 0xf0000f00 │ │ - @ instruction: 0xf8dd81d5 │ │ - stclge 0, cr10, [r8, #-224]! @ 0xffffff20 │ │ - @ instruction: 0xf1b7990a │ │ - @ instruction: 0xf0404f00 │ │ - ldcls 1, cr8, [r2], {2} │ │ - @ instruction: 0xf8dde0a2 │ │ - movwlt sl, #16440 @ 0x4038 │ │ - ldmdbge ip, {r0, r1, r3, r5, r6, r8, r9, fp, ip, pc}^ │ │ - bge 164e1d0 │ │ - strtmi r9, [r8], -r0 │ │ - blx 11e405a │ │ - @ instruction: 0xf89d9c68 │ │ - ldrbmi r5, [ip, #-420] @ 0xfffffe5c │ │ - cmnphi r6, r0, asr #32 @ p-variant is OBSOLETE │ │ - @ instruction: 0xf00007e8 │ │ - stclge 1, cr8, [r8, #-452]! @ 0xfffffe3c │ │ - andls r2, r1, r0 │ │ - @ instruction: 0x46284631 │ │ - movwcs r2, #521 @ 0x209 │ │ - cdp2 0, 15, cr15, cr0, cr1, {1} │ │ - strbteq lr, [r8], #-2525 @ 0xfffff623 │ │ - @ instruction: 0xf0002801 │ │ - stccs 2, cr8, [r0], {62} @ 0x3e │ │ - strcs sp, [r1, #-478] @ 0xfffffe22 │ │ - @ instruction: 0xf8dde181 │ │ - @ instruction: 0xf10da038 │ │ - @ instruction: 0x2c000968 │ │ - msrhi SPSR_sc, r0 │ │ - @ instruction: 0x4628a958 │ │ - blx fe7e40aa │ │ - @ instruction: 0x51a4f89d │ │ - stclls 0, cr2, [r8], #-68 @ 0xffffffbc │ │ - andeq pc, r0, r8, asr #5 │ │ - @ instruction: 0xf0404284 │ │ - strbeq r8, [r8, r7, lsr #1]! │ │ - msrhi SPSR_sx, r0 │ │ - strcs r9, [ip], -r8, lsl #16 │ │ - @ instruction: 0xf04f2800 │ │ - svclt 0x00180008 │ │ - svclt 0x0018200b │ │ - @ instruction: 0xf1bb260e │ │ - svclt 0x00080f00 │ │ - stmdage r8!, {r1, r2, r9, sl, lr}^ │ │ - rscs sp, ip, r7, lsl #2 │ │ - bleq 4a49b0 │ │ - vabal.s8 q9, d8, d1 │ │ - cmp r1, r0, lsl #22 │ │ - tstcs r0, r8, ror #16 │ │ - tstls r1, r2, lsr r6 │ │ - stmdbls sl, {r8, r9, sp} │ │ - cdp2 0, 11, cr15, cr2, cr1, {1} │ │ - blvc ff565500 │ │ - strbteq lr, [r8], #-2525 @ 0xfffff623 │ │ - stmeq r8, {r0, r1, r3, r4, r7, fp, sp, lr, pc} │ │ - @ instruction: 0xf0002801 │ │ - stccs 2, cr8, [r0], {4} │ │ - msrhi CPSR_fxc, r0 │ │ - streq lr, [pc, #-2520] @ 2770c │ │ - strtmi r4, [sl], -r1, lsr #12 │ │ - svclt 0x003842ab │ │ - @ instruction: 0x461c461a │ │ - bl fee643b4 │ │ - @ instruction: 0xf04f42a5 │ │ - svclt 0x00880100 │ │ - stmdacs r0, {r0, r8, sp} │ │ - andeq pc, r0, pc, asr #32 │ │ - andcs fp, r1, r8, asr #31 │ │ - strmi fp, [r8], -r8, lsl #30 │ │ - sbcsle r2, r3, r1, lsl #16 │ │ - ldmdbge r8, {r3, r5, r6, fp, sp, pc}^ │ │ - @ instruction: 0x465b463a │ │ - blx 12e4152 │ │ - @ instruction: 0x51a4f89d │ │ - bleq 4a4a24 │ │ - vqdmulh.s d25, d8, d0[6] │ │ - ldrbmi r0, [ip, #-2816] @ 0xfffff500 │ │ - rscshi pc, r8, r0, asr #32 │ │ - stmdage r8!, {r3, r5, r6, r7, r8, r9, sl}^ │ │ - rscs sp, r1, r1, asr #3 │ │ - @ instruction: 0xf10d9905 │ │ - bls 17aa6e0 │ │ - stmvc r8, {r0, r4, r9, ip, pc} │ │ - bls 180a16c │ │ - andmi lr, r0, r1, asr #20 │ │ - andls r9, pc, r0, lsl r2 @ │ │ - @ instruction: 0x462ce0f5 │ │ - @ instruction: 0xad68990a │ │ - andcs r2, ip, #0 │ │ - strtmi r9, [r8], -r1 │ │ - @ instruction: 0xf0212300 │ │ - ldmib sp, {r0, r1, r5, r6, r9, sl, fp, ip, sp, lr, pc}^ │ │ - bls 1b34314 │ │ - @ instruction: 0x1668e9dd │ │ - @ instruction: 0xf0402900 │ │ - cdpcs 1, 0, cr8, cr0, cr8, {6} │ │ - mrcge 4, 1, APSR_nzcv, cr10, cr15, {1} │ │ - @ instruction: 0xf0402b08 │ │ - ldmdavs r3!, {r2, r3, r5, r7, r9, sl, pc}^ │ │ - ldmdavs r7!, {r0, r2, r5, r9, sl, lr} │ │ - strmi pc, [r0], -pc, asr #32 │ │ - strne lr, [r8], #-2520 @ 0xfffff628 │ │ - bne 1e78360 │ │ - tsteq r4, r3, ror fp │ │ - @ instruction: 0x9c0adbdb │ │ - vpmax.s8 d18, d0, d1 │ │ - stmib sp, {r1, r4, r7, r9, sl, pc}^ │ │ - ldmdbge r5, {r1, r3, r5, r6, r9}^ │ │ - ldrtmi r9, [sl], -r8, ror #14 │ │ - rsbls r8, ip, r0, lsl #16 │ │ - andls r9, r0, r7, lsl #16 │ │ - cmnls r9, #92, 16 @ 0x5c0000 │ │ - @ instruction: 0xf8c8f00e │ │ - @ instruction: 0xf89d9e5c │ │ - ldrbmi r5, [lr, #-372] @ 0xfffffe8c │ │ - orrshi pc, r4, r0, asr #32 │ │ - ldcls 6, cr4, [r2], {33} @ 0x21 │ │ - stclge 7, cr0, [r8, #-928]! @ 0xfffffc60 │ │ - cmn r6, r2, asr #3 │ │ - bls 1ace5f0 │ │ - stmvc r8, {r0, r4, r9, ip, pc} │ │ - bls 1b0a204 │ │ - b 108ca24 │ │ - vhadd.s8 d20, d0, d0 │ │ - andls r0, pc, r1, lsl fp @ │ │ - bleq 64d10 │ │ - @ instruction: 0xf1bae0b8 │ │ - @ instruction: 0xf8dd0f00 │ │ - stmdbls sl, {r3, r4, r5, sp, pc} │ │ - bleq 4a4b00 │ │ - stmdbeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ - bleq 64d28 │ │ - sbcs sp, r9, r3, lsl #2 │ │ - stmdbeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ - andcs r9, r0, sl, lsl #18 │ │ - andls r2, r1, ip, lsl #4 │ │ - movwcs r4, #1576 @ 0x628 │ │ - cdp2 0, 0, cr15, cr6, cr1, {1} │ │ - @ instruction: 0x376ae9dd │ │ - ldmib sp, {r2, r3, r5, r6, sl, fp, ip, pc}^ │ │ - stmdacs r1, {r3, r5, r6, r9, sl} │ │ - mrshi pc, (UNDEF: 75) @ │ │ - @ instruction: 0xf43f2e00 │ │ - blcs 2539ac │ │ - strbhi pc, [pc], -r0, asr #32 @ │ │ - @ instruction: 0xf04f6872 │ │ - @ instruction: 0xf8d64300 │ │ - ldmib r8, {ip, pc}^ │ │ - b fe0a866c │ │ - bl fee69a5c │ │ - bl 1da8254 │ │ - blle ff66825c │ │ - @ instruction: 0x464aa83a │ │ - @ instruction: 0xf00b4633 │ │ - stmdacs r0, {r0, r1, r5, r6, r9, sl, fp, ip, sp, lr, pc} │ │ - stccs 0, cr13, [r1], {210} @ 0xd2 │ │ - ldrhi pc, [pc], -r0, asr #4 │ │ - asrls pc, sp, #17 @ │ │ - stmib sp, {r0, r2, r4, r6, r8, fp, sp, pc}^ │ │ - strbmi r7, [sl], -sl, ror #8 │ │ - @ instruction: 0x46338838 │ │ - stmdals r7, {r2, r3, r5, r6, ip, pc} │ │ - ldmdage ip, {ip, pc}^ │ │ - @ instruction: 0xf00e9669 │ │ - cdpls 8, 5, cr15, cr12, cr1, {3} │ │ - @ instruction: 0x5174f89d │ │ - @ instruction: 0xf040455e │ │ - stmdbls sl, {r0, r1, r3, r5, r8, pc} │ │ - @ instruction: 0xf10d07e8 │ │ - @ instruction: 0xad680968 │ │ - @ instruction: 0xe10ed1b7 │ │ - tstcs r0, r8, ror #16 │ │ - tstls r1, r2, lsr r6 │ │ - stmdbls sl, {r8, r9, sp} │ │ - ldc2 0, cr15, [ip, #132]! @ 0x84 │ │ - blvc ff5656ec │ │ - strbteq lr, [r8], #-2525 @ 0xfffff623 │ │ - stmeq r8, {r0, r1, r3, r4, r7, fp, sp, lr, pc} │ │ - @ instruction: 0xf0402800 │ │ - @ instruction: 0xb3b4810e │ │ - ldreq lr, [r2, #-2520] @ 0xfffff628 │ │ - strtmi r4, [sl], -r1, lsr #12 │ │ - svclt 0x003842ab │ │ - @ instruction: 0x461c461a │ │ - b ff16459c │ │ - @ instruction: 0xf04f42a5 │ │ - svclt 0x00380100 │ │ - stmdacs r0, {r0, r8, sp} │ │ - andeq pc, r0, pc, asr #32 │ │ - andcs fp, r1, r8, asr #30 │ │ - strmi fp, [r8], -r8, lsl #30 │ │ - bicsle r2, r5, r0, lsl #16 │ │ - ldmdbge r8, {r3, r5, r6, fp, sp, pc}^ │ │ - @ instruction: 0x465b463a │ │ - blx 15e4338 │ │ - @ instruction: 0x51a4f89d │ │ - bleq 4a4c0c │ │ - vqdmulh.s d25, d8, d0[6] │ │ - ldrbmi r0, [ip, #-2816] @ 0xfffff500 │ │ - strbeq sp, [r8, r4, lsl #2]! │ │ - bicle sl, r4, r8, ror #16 │ │ - eor r2, r0, r0, lsl #10 │ │ - bls 1ace73c │ │ - stmvc r8, {r0, r4, r9, ip, pc} │ │ - bls 1b0a350 │ │ - b 108cb70 │ │ - andls r4, pc, r0 │ │ - strcs lr, [r1, #-22] @ 0xffffffea │ │ - strcs lr, [r0, #-15] │ │ - @ instruction: 0xf8dd465e │ │ - stmdage r2!, {r3, r4, r5, sp, pc}^ │ │ - mcr2 0, 1, pc, cr10, cr15, {0} @ │ │ - stmdacs r0, {r1, r5, r6, fp, ip, pc} │ │ - stmdals r3!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ - bl 16e4524 │ │ - ands r4, fp, r4, lsr r6 │ │ - vrshl.s8 d18, d0, d0 │ │ - @ instruction: 0xf2c80b11 │ │ - ldrbmi r0, [ip], -r0, lsl #22 │ │ - @ instruction: 0xf01fa862 │ │ - stmdals r2!, {r0, r3, r4, r9, sl, fp, ip, sp, lr, pc}^ │ │ - svclt 0x001c2800 │ │ - @ instruction: 0xf0749863 │ │ - ldmib sp, {r1, r3, r6, r8, r9, fp, sp, lr, pc}^ │ │ - ldmdage ip, {r4, r8, r9, sl, sp, lr}^ │ │ - mcr2 0, 0, pc, cr14, cr15, {0} @ │ │ - stmdacs r0, {r2, r3, r4, r6, fp, ip, pc} │ │ - ldmdals sp, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ - bl fe455c │ │ - ldrvs lr, [r0, -sp, asr #19] │ │ - ldrbmi sl, [ip, #-3626] @ 0xfffff1d6 │ │ - sbchi pc, r4, r0, asr #32 │ │ - @ instruction: 0x07e89b12 │ │ - ldmdaeq r8, {r3, r8, ip, sp, lr, pc}^ │ │ - @ instruction: 0xf47fad68 │ │ - adcs sl, sp, lr, lsl #25 │ │ - ldrsbtge pc, [r8], -sp @ │ │ - stmdbls sl, {r3, r5, r6, r8, sl, fp, sp, pc} │ │ - svcmi 0x0000f1b7 │ │ - ldcls 1, cr13, [r2], {4} │ │ - stmdbls sl, {r0, r1, r3, r6, sp, lr, pc} │ │ - stmdbeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ - andcs r2, r8, #0 │ │ - strtmi r9, [r8], -r1 │ │ - @ instruction: 0xf0212300 │ │ - ldmib sp, {r0, r1, r2, r3, r5, r8, sl, fp, ip, sp, lr, pc}^ │ │ - stclls 7, cr3, [ip], #-424 @ 0xfffffe58 │ │ - @ instruction: 0x0668e9dd │ │ - cmnle r4, r0, lsl #16 │ │ - @ instruction: 0xf43f2e00 │ │ - blcs 253800 │ │ - ldrbhi pc, [r9, #-64]! @ 0xffffffc0 @ │ │ - @ instruction: 0xf04f6872 │ │ - @ instruction: 0xf8d64300 │ │ - ldmib r8, {ip, pc}^ │ │ - b fe0a8820 │ │ - bl fec29c08 │ │ - bl 1c68424 │ │ - blle ff6a841c │ │ - @ instruction: 0x464aa83a │ │ - @ instruction: 0xf00b4633 │ │ - stmdacs r0, {r0, r2, r3, r7, r8, sl, fp, ip, sp, lr, pc} │ │ - stccs 0, cr13, [r1], {211} @ 0xd3 │ │ - strbhi pc, [r9, #-576] @ 0xfffffdc0 @ │ │ - asrls pc, sp, #17 @ │ │ - stmib sp, {r0, r2, r4, r6, r8, fp, sp, pc}^ │ │ - strbmi r7, [sl], -sl, ror #8 │ │ - @ instruction: 0x46338838 │ │ - stmdals r7, {r2, r3, r5, r6, ip, pc} │ │ - ldmdage ip, {ip, pc}^ │ │ - @ instruction: 0xf00d9669 │ │ - cdpls 15, 5, cr15, cr12, cr11, {4} │ │ - @ instruction: 0x5174f89d │ │ - cmple r5, lr, asr r5 │ │ - strbeq r9, [r8, sl, lsl #18]! │ │ - stmdbeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ - @ instruction: 0xd1b9ad68 │ │ - stmdbls sl, {r0, r3, r4, r5, sp, lr, pc} │ │ - andcs sl, r0, r8, ror #26 │ │ - andls r2, r1, r8, lsl #4 │ │ - movwcs r4, #1576 @ 0x628 │ │ - stc2l 0, cr15, [r6], #132 @ 0x84 │ │ - ldrdcc lr, [sl], #-157 @ 0xffffff63 @ │ │ - ldmib sp, {r2, r3, r5, r6, r9, fp, ip, pc}^ │ │ - stmdbcs r0, {r3, r5, r6, r9, sl, ip} │ │ - cdpcs 1, 0, cr13, cr0, cr11, {2} │ │ - ldcge 4, cr15, [lr], #252 @ 0xfc │ │ - @ instruction: 0xf0402b08 │ │ - ldmdavs r3!, {r4, r5, r8, sl, pc}^ │ │ - @ instruction: 0xf04f6837 │ │ - ldmib r8, {r9, sl, lr}^ │ │ - rsbsmi r1, r3, sl, lsl #10 │ │ - bl 1d6f3b0 │ │ - blle ff7a889c │ │ - vpmax.s8 d18, d0, d1 │ │ - stmib sp, {r3, r4, r8, sl, pc}^ │ │ - ldmdbge r5, {r1, r3, r5, r6, r9}^ │ │ - ldrtmi r9, [sl], -r8, ror #14 │ │ - rsbls r8, ip, r0, lsl #16 │ │ - andls r9, r0, r7, lsl #16 │ │ - cmnls r9, #92, 16 @ 0x5c0000 │ │ - @ instruction: 0xff4ef00d │ │ - @ instruction: 0xf89d9e5c │ │ - ldrbmi r5, [lr, #-372] @ 0xfffffe8c │ │ - stmdbls sl, {r1, r3, r4, r8, ip, lr, pc} │ │ - stclge 7, cr0, [r8, #-928]! @ 0xfffffc60 │ │ - strcs sp, [r0, #-455] @ 0xfffffe39 │ │ - stmib sp, {r0, r2, r4, r7, sl, sp, lr, pc}^ │ │ - beq 63a10c │ │ - andls r4, pc, sp, lsl r6 @ │ │ - ldmib sp, {r0, r1, r2, r4, r5, r8, r9, sl, sp, lr, pc}^ │ │ - andsls r1, r1, sl, rrx │ │ - strmi r9, [sp], -ip, ror #16 │ │ - beq 24c520 │ │ - ldrmi lr, [sp], -r7, lsr #14 │ │ - stmib sp, {r3, r4, r9, fp}^ │ │ - @ instruction: 0xe67cb710 │ │ - stmdbeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ - bls 17ce908 │ │ - stmvc r8, {r0, r4, r9, ip, pc} │ │ - bls 180a520 │ │ - andmi lr, r0, r1, asr #20 │ │ - andls r9, pc, r0, lsl r2 @ │ │ - stmib sp, {r0, r2, r3, r4, r8, r9, sl, sp, lr, pc}^ │ │ - bfi r2, r0, #0, #31 │ │ - @ instruction: 0xf009a842 │ │ - ldcls 12, cr15, [ip, #-700]! @ 0xfffffd44 │ │ - svcmi 0x0000f1b5 │ │ - strhi pc, [r0], #-64 @ 0xffffffc0 │ │ - ands r4, sp, sp, asr r6 │ │ - and r9, r0, r2, lsl r5 │ │ - stmdage r2, {r2, r3, r4, r6, r9, sl, lr}^ │ │ - stc2 0, cr15, [r2], #36 @ 0x24 │ │ - @ instruction: 0x46259e3c │ │ - svcmi 0x0000f1b6 │ │ - ldmib sp, {r1, r4, ip, lr, pc}^ │ │ - cmplt pc, sp, lsr r7 @ │ │ - streq pc, [r4], #-264 @ 0xfffffef8 │ │ - stceq 8, cr15, [r4], {84} @ 0x54 │ │ - svclt 0x001c2800 │ │ - @ instruction: 0xf0b06820 │ │ - strcc lr, [ip], #-2364 @ 0xfffff6c4 │ │ - mvnsle r3, r1, lsl #30 │ │ - @ instruction: 0x4640b116 │ │ - ldmdb r4!, {r4, r5, r7, ip, sp, lr, pc} │ │ - @ instruction: 0x4633e9dd │ │ - @ instruction: 0xf104b156 │ │ - ldmdavs r8!, {r4, r8, r9, sl} │ │ - svclt 0x001c2800 │ │ - @ instruction: 0xf0b06878 │ │ - ldrcc lr, [r0, -sl, lsr #18]! │ │ - mvnsle r3, r1, lsl #28 │ │ - stmdacs r0, {r1, r4, r5, fp, ip, pc} │ │ - qadd16mi fp, r0, ip │ │ - stmdb r0!, {r4, r5, r7, ip, sp, lr, pc} │ │ - @ instruction: 0x462de9dd │ │ - stcne 1, cr11, [r7, #-344]! @ 0xfffffea8 │ │ - stceq 8, cr15, [r4], {87} @ 0x57 │ │ - svclt 0x001c2800 │ │ - @ instruction: 0xf0b06838 │ │ - smladcc ip, r6, r9, lr │ │ - mvnsle r3, r1, lsl #28 │ │ - stmdacs r0, {r2, r3, r5, fp, ip, pc} │ │ - qadd16mi fp, r0, ip │ │ - stmdb ip, {r4, r5, r7, ip, sp, lr, pc} │ │ - ldrbmi r9, [sp, #-2834] @ 0xfffff4ee │ │ - ldrhi pc, [r5], #-0 │ │ - ldclt 0, cr15, [r4], {-0} │ │ - andmi pc, r0, pc, asr #32 │ │ - eorls r4, ip, r6, lsr #12 │ │ - stcgt 0, cr14, [lr], {6} │ │ - addgt sl, lr, sl, lsr #16 │ │ - umulleq lr, lr, r4, r8 @ │ │ - cdpls 0, 1, cr12, cr2, cr14, {4} │ │ - svceq 0x0008f816 │ │ - ldcge 2, cr2, [sl, #-352]! @ 0xfffffea0 │ │ - @ instruction: 0xa115e9d6 │ │ - blx 72662 │ │ - vabd.s8 d26, d0, d2 │ │ - stmdage r2, {r0, r1, r3, r4, r8, ip}^ │ │ - smlatbne r8, sp, r8, pc @ │ │ - strmi fp, [r6], -r8, lsl #30 │ │ - andls r1, r8, r8, ror #26 │ │ - ldrls r9, [r2], -sp, lsl #14 │ │ - @ instruction: 0xf00045ba │ │ - stmdals ip!, {r0, r2, r3, r5, r6, r8, r9, pc} │ │ - cmpls r7, ip, asr r9 │ │ - @ instruction: 0x1010f8da │ │ - blmi 64ccc │ │ - stmib sp, {r1, r3, r5, fp, sp, pc}^ │ │ - svclt 0x00186955 │ │ - stmdbcs r0, {r0, r1, r7, r9, sl, lr} │ │ - andeq pc, r1, pc, asr #32 │ │ - @ instruction: 0xf081bf48 │ │ - bicslt r4, r8, r0 │ │ - @ instruction: 0xd12d2801 │ │ - ldrsbtcs pc, [r0], -sl @ │ │ - strbmi r4, [r9], -r8, lsr #12 │ │ - msrlt SPSR_fs, sp, asr #17 │ │ - blx 19e46be │ │ - @ instruction: 0x4628993a │ │ - ldmdapl fp!, {r0, r2, r3, r4, r6, r7, r8, fp, sp, lr, pc} │ │ - eorsvs lr, sp, #3620864 @ 0x374000 │ │ - teqle ip, r2, lsl #18 │ │ - bleq 4a4f4c │ │ - tstcs r8, pc, asr #20 │ │ - andne lr, pc, #3358720 @ 0x334000 │ │ - @ instruction: 0xf2c84634 │ │ - @ instruction: 0xe3260b00 │ │ - @ instruction: 0x2018f8da │ │ - strbmi r4, [r9], -r8, lsr #12 │ │ - blx 13e46ee │ │ - stmiaeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ - eorsne lr, sp, #3620864 @ 0x374000 │ │ - @ instruction: 0x0121e898 │ │ - cmple r9, r2, lsl #16 │ │ - andscs lr, r8, pc, asr #20 │ │ - stmib sp, {r2, r3, r9, sl, lr}^ │ │ - ands r0, r9, pc, lsl #4 │ │ - @ instruction: 0xf8daa855 │ │ - subsls r2, r9, r8, lsr r0 │ │ - subsls sl, r8, fp, asr r8 │ │ - strbmi r4, [r9], -r8, lsr #12 │ │ - ldmib sl, {r0, r4, sl, ip, pc}^ │ │ - @ instruction: 0xf8cd4806 │ │ - @ instruction: 0xf021b16c │ │ - ldmdals sl!, {r0, r4, r5, r8, r9, fp, ip, sp, lr, pc} │ │ - cmple lr, r2, lsl #16 │ │ - ldrsbtmi lr, [sp], -sp │ │ - ldmdapl fp!, {r0, r2, r3, r4, r6, r7, r8, fp, sp, lr, pc} │ │ - b 140c6f4 │ │ - andls r2, pc, r8, lsl r0 @ │ │ - bleq 4a4fbc │ │ - bleq 651e0 │ │ - stmib sp, {r2, r4, r5, r6, r7, r9, sp, lr, pc}^ │ │ - bge 18c105c │ │ - smlawbeq r2, r2, r8, lr │ │ - blls 1012c24 │ │ - stmdbge r2!, {r1, r3, r4, r6, r8, ip, pc}^ │ │ - ldmdbge fp, {r0, r3, r4, r6, r8, ip, pc}^ │ │ - @ instruction: 0x46499158 │ │ - @ instruction: 0xf8da9367 │ │ - @ instruction: 0xf89a2000 │ │ - @ instruction: 0xf89ab050 │ │ - @ instruction: 0xf0218051 │ │ - ldmib sp, {r0, r1, r3, r8, r9, fp, ip, sp, lr, pc}^ │ │ - ldmib sp, {r1, r3, r4, r5, r8, sl}^ │ │ - mrcls 7, 1, r2, cr14, cr12, {1} │ │ - cmple r2, r2, lsl #16 │ │ - bleq 4a5000 │ │ - @ instruction: 0x46900a10 │ │ - vaddl.s8 , d8, d15 │ │ - sbc r0, r2, #0, 22 │ │ - ldclvc 5, cr15, [r6], {13} │ │ - stm ip, {r0, r1, r2, r3, r4, r5, r8, r9, fp, ip, pc} │ │ - stmdbge r8!, {r1, r2, r3}^ │ │ - smlawbeq r1, r1, r8, lr │ │ - strls r0, [sl, #-1984] @ 0xfffff840 │ │ - movthi pc, #12288 @ 0x3000 @ │ │ - msreq CPSR_, #-2147483646 @ 0x80000002 │ │ - ldrls sl, [r1], #-3386 @ 0xfffff2c6 │ │ - bne 45b36c │ │ - andeq lr, r1, r3, ror fp │ │ - addhi pc, sl, r0, lsl #5 │ │ - vabd.s8 d18, d0, d1 │ │ - @ instruction: 0xf2c80b11 │ │ - ldrbmi r0, [r8], r0, lsl #22 │ │ - svcge 0x003be282 │ │ - stclvc 5, cr15, [r6], {13} │ │ - svcgt 0x008e9e3f │ │ - strtmi r9, [r8], -r2, rrx │ │ - addeq lr, lr, ip, lsl #17 │ │ - @ instruction: 0xf8da4649 │ │ - strbtls r2, [r7], -r0, lsr #32 │ │ - blx ff4647e8 │ │ - ldreq lr, [sl, #-2525]! @ 0xfffff623 │ │ - bleq 4a506c │ │ - @ instruction: 0x273ce9dd │ │ - bleq 65294 │ │ - stmdacs r2, {r1, r2, r3, r4, r5, r9, sl, fp, ip, pc} │ │ - beq 45cc60 │ │ - mulls pc, r0, r6 @ │ │ - ldmdbls pc!, {r0, r1, r2, r7, r9, sp, lr, pc} @ │ │ - strbeq lr, [r8, #-2509]! @ 0xfffff633 │ │ - @ instruction: 0xf8cd07c0 │ │ - ldrls fp, [r1], #-28 @ 0xffffffe4 │ │ - strbcs lr, [sl, -sp, asr #19]! │ │ - stmib sp, {r1, r3, r8, sl, ip, pc}^ │ │ - @ instruction: 0xf000616c │ │ - ldmib sl, {r1, r2, r8, r9, pc}^ │ │ - ldmib sl, {r1, r4, r9, sl, ip, sp, lr}^ │ │ - ldrtmi r9, [r2], -pc, lsl #8 │ │ - mlalt r8, sl, r8, pc @ │ │ - @ instruction: 0x463842b4 │ │ - qasxmi fp, r2, r8 │ │ - @ instruction: 0xf0b04649 │ │ - adcmi lr, r6, #5636096 @ 0x560000 │ │ - tstpeq r0, pc, asr #32 @ p-variant is OBSOLETE │ │ - tstcs r1, r8, lsr pc │ │ - @ instruction: 0xf04f2800 │ │ - ldcge 0, cr0, [sl, #-0] │ │ - andcs fp, r1, r8, asr #30 │ │ - strmi fp, [r8], -r8, lsl #30 │ │ - subsle r2, r4, r0, lsl #16 │ │ - bleq 4a50dc │ │ - stmdaeq r1, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ - bleq 65304 │ │ - stmdbeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ - svcls 0x0011465c │ │ - ldmdbls pc!, {r1, r2, r6, r9, sp, lr, pc} @ │ │ - strbeq lr, [r8, #-2509]! @ 0xfffff633 │ │ - stmib sp, {r6, r7, r8, r9, sl}^ │ │ - stmib sp, {r1, r3, r5, r6, r8, r9, sl, sp}^ │ │ - @ instruction: 0xf000616c │ │ - ldrdcs r8, [r8], -r4 │ │ - @ instruction: 0xf0af462e │ │ - ldcge 15, cr14, [sl, #-984]! @ 0xfffffc28 │ │ - @ instruction: 0xf0002800 │ │ - @ instruction: 0xf088836f │ │ - andvs r4, r4, r0, lsl #2 │ │ - strmi r6, [r4], -r1, asr #32 │ │ - andcs r2, r8, #0, 2 │ │ - smlabtcs r0, sp, r9, lr │ │ - ldrtmi r4, [r1], -r8, lsr #12 │ │ - @ instruction: 0x46232210 │ │ - blx fffe48b4 │ │ - @ instruction: 0xf0af4620 │ │ - ldmib sp, {r3, r6, r7, r8, r9, sl, fp, sp, lr, pc}^ │ │ - stmdacs r1, {r1, r3, r4, r5, sl} │ │ - ldmdbls ip!, {r2, r5, r6, r8, ip, lr, pc} │ │ - andsls r9, r0, lr, lsr r8 │ │ - svcls 0x003d0a08 │ │ - ands r4, r6, #136, 12 @ 0x8800000 │ │ - mlasmi r0, sl, r8, pc @ │ │ - ldrdeq lr, [sl, -sl] │ │ - movwcs lr, #35290 @ 0x89da │ │ - streq pc, [r1, -r4, lsl #1] │ │ - addeq lr, r3, sp, lsl #17 │ │ - stmdbls sl, {r3, r5, r9, sl, lr} │ │ - ldc2 0, cr15, [r0, #-48]! @ 0xffffffd0 │ │ - ldrsbtcc lr, [ip], -sp │ │ - ldmib sp, {r1, r2, r3, r4, r5, r8, fp, ip, pc}^ │ │ - bcs 7295c │ │ - beq 6dcd14 │ │ - stmib sp, {r0, r1, r2, r3, r4, r9, sl, lr}^ │ │ - andsls r2, r1, pc, lsl #2 │ │ - @ instruction: 0xf08be1e0 │ │ - @ instruction: 0xf0880001 │ │ - strbmi r0, [sl], -r1, lsl #2 │ │ - stmib sp, {r0, r1, r5, r9, sl, lr}^ │ │ - strtmi r1, [r8], -r2 │ │ - stmib sp, {r1, r3, r8, fp, ip, pc}^ │ │ - @ instruction: 0xf00c7600 │ │ - ldmib sp, {r0, r2, r5, sl, fp, ip, sp, lr, pc}^ │ │ - ldmib sp, {r0, r2, r3, r4, r5, r8, r9, sp}^ │ │ - stmdacs r1, {r1, r3, r4, r5, sl} │ │ - adchi pc, r3, r0, asr #32 │ │ - vtst.8 d25, d0, d28 │ │ - @ instruction: 0x46170b11 │ │ - bleq 653d8 │ │ - stmdbeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ - beq 3a2c0 │ │ - movweq lr, #63949 @ 0xf9cd │ │ - @ instruction: 0xf1b8e1da │ │ - @ instruction: 0xf43f0f00 │ │ - bge 15945a4 │ │ - andcc lr, r0, sp, asr #19 │ │ - strtmi r9, [r8], -r2, lsl #2 │ │ - @ instruction: 0x46434659 │ │ - blx a64916 │ │ - smlalvc pc, ip, sp, r8 @ │ │ - @ instruction: 0xf8dd2011 │ │ - vmla.i d24, d24, d0[6] │ │ - strmi r0, [r0] │ │ - orrshi pc, lr, r0, asr #32 │ │ - @ instruction: 0xf00007f8 │ │ - andcs r8, ip, r6, lsr #2 │ │ - svclt 0x00082c00 │ │ - andls r2, r7, r8 │ │ - rsc sp, r2, r6, lsr r1 │ │ - @ instruction: 0xf0002c00 │ │ - ldmib sp, {r0, r3, r4, r6, r7, pc}^ │ │ - stmdbge r2!, {r0, r2, r3, r4, r5, ip, sp}^ │ │ - andls sl, r0, r8, asr sl │ │ - @ instruction: 0xf00c4628 │ │ - @ instruction: 0x9c3af9f9 │ │ - smlalhi pc, ip, sp, r8 @ │ │ - ldrbmi r9, [ip, #-3857] @ 0xfffff0ef │ │ - orrshi pc, pc, r0, asr #32 │ │ - sbcvc lr, r8, pc, asr sl │ │ - mrshi pc, (UNDEF: 11) @ │ │ - ldrtmi r2, [r1], -r0 │ │ - strtmi r9, [r8], -r1 │ │ - movwcs r2, #521 @ 0x209 │ │ - blx 1d649c8 │ │ - ldrteq lr, [sl], #-2525 @ 0xfffff623 │ │ - @ instruction: 0xf43f2801 │ │ - stccs 15, cr10, [r0], {120} @ 0x78 │ │ - tstphi sp, r0 @ p-variant is OBSOLETE │ │ - ldrsbtcc lr, [sp], -sp │ │ - bge 1652ee4 │ │ - strtmi r9, [r8], -r0 │ │ - @ instruction: 0xf9d6f00c │ │ - @ instruction: 0xf89d9c3a │ │ - ldrbmi r8, [ip, #-236] @ 0xffffff14 │ │ - ldrsb sp, [ip, #-14]! │ │ - ldcge 6, cr4, [sl, #-184]! @ 0xffffff48 │ │ - andcs r9, r0, sl, lsl #18 │ │ - movwcs r9, #2567 @ 0xa07 │ │ - strtmi r9, [r8], -r1 │ │ - blx 1564a08 │ │ - teqcc ip, sp @ │ │ - ldmib sp, {r1, r2, r3, r4, r5, fp, ip, pc}^ │ │ - bcs 72a78 │ │ - rscshi pc, r8, r0 │ │ - svceq 0x0000f1b8 │ │ - mcrge 4, 6, pc, cr14, cr15, {1} @ │ │ - @ instruction: 0xf0402b08 │ │ - @ instruction: 0x4635829c │ │ - movwcs lr, #35290 @ 0x89da │ │ - ldrdvc pc, [r0], -r8 │ │ - strmi pc, [r0], #-79 @ 0xffffffb1 │ │ - ldrdvs pc, [r4], -r8 │ │ - b fe1af4a0 │ │ - bl 1daa1cc │ │ - blle ff5e91cc │ │ - andls r2, r2, r8, lsl #4 │ │ - smlabtcs r0, sp, r9, lr │ │ - bge 1592ab4 │ │ - @ instruction: 0x46434659 │ │ - blx febe4a08 │ │ - smlalvc pc, ip, sp, r8 @ │ │ - @ instruction: 0xf8dd2011 │ │ - vmla.i d24, d24, d0[6] │ │ - strmi r0, [r0] │ │ - msrhi CPSR_xc, r0, asr #32 │ │ - ldcge 6, cr4, [sl, #-184]! @ 0xffffff48 │ │ - strdle r0, [r1, #120] @ 0x78 │ │ - svcls 0x0011e0a9 │ │ - stmdbeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ - @ instruction: 0xf0002c00 │ │ - ldmdbge r8, {r0, r3, r5, r7, pc}^ │ │ - @ instruction: 0xf00d4628 │ │ - @ instruction: 0xf89df98d │ │ - andscs r1, r1, ip, ror #1 │ │ - @ instruction: 0xf2c89c3a │ │ - addmi r0, r4, #0 │ │ - addshi pc, pc, r0, asr #32 │ │ - @ instruction: 0xf00007c8 │ │ - stmdals r7, {r0, r1, r3, r5, r7, pc} │ │ - stmdacs r0, {r2, r3, r8, sp} │ │ - andeq pc, r8, pc, asr #32 │ │ - andcs fp, fp, r8, lsl pc │ │ - tstcs lr, r8, lsl pc │ │ - svceq 0x0000f1b8 │ │ - svclt 0x00084688 │ │ - cdpls 6, 1, cr4, cr2, cr0, {4} │ │ - adchi pc, sl, r0 │ │ - andcs r9, r0, sl, lsl #18 │ │ - strtmi r9, [r8], -r1 │ │ - movwcs r4, #1602 @ 0x642 │ │ - @ instruction: 0xf9eef021 │ │ - bleq ffc64e88 │ │ - ldrteq lr, [sl], #-2525 @ 0xfffff623 │ │ - stmeq r8, {r0, r1, r3, r4, r7, fp, sp, lr, pc} │ │ - @ instruction: 0xf0002801 │ │ - stccs 0, cr8, [r0], {218} @ 0xda │ │ - sbcshi pc, ip, r0 │ │ - streq lr, [pc, #-2522] @ 28092 │ │ - strtmi r4, [sl], -r1, lsr #12 │ │ - svclt 0x003842ab │ │ - @ instruction: 0x461c461a │ │ - cdp 0, 15, cr15, cr4, cr15, {5} │ │ - @ instruction: 0xf04f42a5 │ │ - svclt 0x00880100 │ │ - stmdacs r0, {r0, r8, sp} │ │ - andeq pc, r0, pc, asr #32 │ │ - svclt 0x00c8ad3a │ │ - svclt 0x00082001 │ │ - stmdacs r1, {r3, r9, sl, lr} │ │ - ldmdbge r8, {r1, r4, r6, r7, ip, lr, pc}^ │ │ - ldrtmi r4, [sl], -r8, lsr #12 │ │ - @ instruction: 0xf00d465b │ │ - @ instruction: 0xf89df93d │ │ - vhadd.s8 q8, q8, q14 │ │ - @ instruction: 0x9c3a0b11 │ │ - bleq 655d4 │ │ - @ instruction: 0xf040455c │ │ - @ instruction: 0x07c080d7 │ │ - adc sp, r7, r0, asr #3 │ │ - stmdaeq r1, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ - svcls 0x0011465c │ │ - @ instruction: 0x462ee0d8 │ │ - stmdbls sl, {r1, r3, r4, r5, r8, sl, fp, sp, pc} │ │ - bls 1f0ad4 │ │ - andls r2, r1, r0, lsl #6 │ │ - @ instruction: 0xf0214628 │ │ - ldmib sp, {r0, r1, r2, r5, r7, r8, fp, ip, sp, lr, pc}^ │ │ - ldmdals lr!, {r2, r3, r4, r5, r8, ip, sp} │ │ - ldmdacs sl!, {r0, r2, r3, r4, r6, r7, r8, fp, sp, lr, pc} │ │ - cmple fp, r0, lsl #20 │ │ - svceq 0x0000f1b8 │ │ - mcrge 4, 1, pc, cr2, cr15, {1} @ │ │ - @ instruction: 0xf0402b08 │ │ - @ instruction: 0x463581f0 │ │ - movwcs lr, #43482 @ 0xa9da │ │ - ldrdvc pc, [r0], -r8 │ │ - strmi pc, [r0], #-79 @ 0xffffffb1 │ │ - ldrdvs pc, [r4], -r8 │ │ - b fe1afa58 │ │ - bl 1cea324 │ │ - blle ff629330 │ │ - andls r2, r2, r8, lsl #4 │ │ - smlabtcs r0, sp, r9, lr │ │ - bge 1592c0c │ │ - @ instruction: 0x46434659 │ │ - blx e4b60 │ │ - smlalvc pc, ip, sp, r8 @ │ │ - @ instruction: 0xf8dd2011 │ │ - vmla.i d24, d24, d0[6] │ │ - strmi r0, [r0] │ │ - @ instruction: 0x462ed177 │ │ - @ instruction: 0x07f8ad3a │ │ - strcs sp, [r0, -r3, asr #3] │ │ - @ instruction: 0xf04fe5f7 │ │ - ands r0, r7, r0, lsl #16 │ │ - stmdaeq r1, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ - pkhbtmi lr, r8, r0 │ │ - ldmib sp, {r3, r8, fp, ip, pc}^ │ │ - stmvc r8, {r2, r3, r4, r5, r9, ip, sp, lr} │ │ - andsls r8, r0, #589824 @ 0x90000 │ │ - andmi lr, r0, r1, asr #20 │ │ - bleq 4a546c │ │ - vaddl.s8 , d8, d15 │ │ - add r0, r3, r0, lsl #22 │ │ - stmdaeq r0, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ - bleq 4a547c │ │ - bleq 656a0 │ │ - rsbs r4, fp, ip, asr r6 │ │ - tsteq r0, sp, asr #19 │ │ - beq 63a408 │ │ - @ instruction: 0xf04fe059 │ │ - ldrb r0, [r5, r1, lsl #16]! │ │ - and r9, r1, sl, lsl #18 │ │ - @ instruction: 0xad3a990a │ │ - strbmi r2, [r2], -r0 │ │ - strtmi r9, [r8], -r1 │ │ - @ instruction: 0xf0212300 │ │ - @ instruction: 0xf10df941 │ │ - ldmib sp, {r4, r5, r6, r7, r8, r9, fp}^ │ │ - ldm fp, {r1, r3, r4, r5, sl} │ │ - bllt 1c2add8 │ │ - ldmib sl, {r2, r4, r7, r8, r9, ip, sp, pc}^ │ │ - @ instruction: 0x46210512 │ │ - adcmi r4, fp, #44040192 @ 0x2a00000 │ │ - sasxmi fp, sl, r8 │ │ - @ instruction: 0xf0af461c │ │ - adcmi lr, r5, #76, 28 @ 0x4c0 │ │ - tstpeq r0, pc, asr #32 @ p-variant is OBSOLETE │ │ - tstcs r1, r8, lsr pc │ │ - @ instruction: 0xf04f2800 │ │ - svclt 0x00480000 │ │ - svclt 0x00082001 │ │ - stmdacs r0, {r3, r9, sl, lr} │ │ - ldcge 1, cr13, [sl, #-856]! @ 0xfffffca8 │ │ - @ instruction: 0x463aa958 │ │ - @ instruction: 0x4628465b │ │ - @ instruction: 0xf894f00d │ │ - smlaleq pc, ip, sp, r8 @ │ │ - bleq 4a5500 │ │ - @ instruction: 0xf2c89c3a │ │ - ldrbmi r0, [ip, #-2816] @ 0xfffff500 │ │ - stmdbls sl, {r1, r2, r3, r5, r8, ip, lr, pc} │ │ - bicle r0, r5, r0, asr #15 │ │ - stmdaeq r0, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ - @ instruction: 0x4698e756 │ │ - @ instruction: 0xf8cd0a18 │ │ - str fp, [r3, r0, asr #32]! │ │ - bleq 4a5524 │ │ - stmdaeq r1, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ - bleq 6574c │ │ - strtmi lr, [lr], -sl, asr #14 │ │ - bls f4f054 │ │ - stmvc r8, {r0, r4, r9, ip, pc} │ │ - bls f8ac60 │ │ - b 108d480 │ │ - andls r4, pc, r0 │ │ - bleq 4a5548 │ │ - bleq 6576c │ │ - @ instruction: 0xf01fa868 │ │ - stmdals r8!, {r0, r2, r5, r7, r8, fp, ip, sp, lr, pc}^ │ │ - svclt 0x001c2800 │ │ - @ instruction: 0xf0739869 │ │ - @ instruction: 0x4645eed6 │ │ - ldcls 6, cr4, [r1], {184} @ 0xb8 │ │ - eor r9, r1, sp, lsl #30 │ │ - stmdbls r8, {r7, r9, sl, lr} │ │ - svcls 0x003c9a3d │ │ - stmdahi r9, {r3, r7, fp, ip, sp, lr} │ │ - b 108d4b8 │ │ - andls r4, pc, r0 │ │ - @ instruction: 0xf01fa868 │ │ - stmdals r8!, {r0, r2, r3, r7, r8, fp, ip, sp, lr, pc}^ │ │ - svclt 0x001c2800 │ │ - @ instruction: 0xf0739869 │ │ - mrcls 14, 0, lr, cr0, cr14, {5} │ │ - stmdage r2!, {r0, r2, r5, r9, sl, lr}^ │ │ - @ instruction: 0xf982f01f │ │ - stmdacs r0, {r1, r5, r6, fp, ip, pc} │ │ - stmdals r3!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ - mrc 0, 5, APSR_nzcv, cr2, cr3, {3} │ │ - svcls 0x000d463c │ │ - mrcls 6, 0, r9, cr2, cr0, {0} │ │ - tstle r7, sp, asr r5 │ │ - beq 16650dc │ │ - b 18141a0 │ │ - @ instruction: 0xf47f70c8 │ │ - @ instruction: 0x465dac9d │ │ - ldrls sl, [r1], #-2114 @ 0xfffff7be │ │ - @ instruction: 0xf8d4f009 │ │ - @ instruction: 0xf8dd9e2c │ │ - @ instruction: 0xf1b6a038 │ │ - tstle ip, r0, lsl #30 │ │ - strbt r4, [sl], #-1603 @ 0xfffff9bd │ │ - @ instruction: 0xf009a842 │ │ - stcls 8, cr15, [ip, #-804]! @ 0xfffffcdc │ │ - svcmi 0x0000f1b5 │ │ - ldrbmi sp, [sp], -pc, lsr #2 │ │ - ldrsbtge pc, [r8], -sp @ │ │ - svcls 0x002ee45f │ │ - stmdals sp!, {r0, r1, r6, r9, sl, lr} │ │ - cmnlt r7, r2, lsl r0 │ │ - stcne 8, cr9, [r4, #-72] @ 0xffffffb8 │ │ - strcc lr, [ip], #-2 │ │ - andle r3, r8, r1, lsl #30 │ │ - stceq 8, cr15, [r4], {84} @ 0x54 │ │ - rscsle r2, r8, r0, lsl #16 │ │ - @ instruction: 0xf0af6820 │ │ - @ instruction: 0x4643ed5a │ │ - ldcls 7, cr14, [r2], {243} @ 0xf3 │ │ - strb fp, [r8], #-2894 @ 0xfffff4b2 │ │ - @ instruction: 0x863de9dd │ │ - @ instruction: 0xf108b15e │ │ - @ instruction: 0xf8570704 │ │ - stmdacs r0, {r2, sl, fp} │ │ - ldmdavs r8!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ - stcl 0, cr15, [r8, #-700] @ 0xfffffd44 │ │ - cdpcc 7, 0, cr3, cr1, cr12, {0} │ │ - stccs 1, cr13, [r0, #-980] @ 0xfffffc2c │ │ - @ instruction: 0xf47f465d │ │ - @ instruction: 0xf7ffac0a │ │ - ldmib sp, {r0, r1, r3, sl, fp, ip, sp, pc}^ │ │ - @ instruction: 0xf8dd462d │ │ - cmplt r6, r8, lsr r0 │ │ - @ instruction: 0xf8571d27 │ │ - stmdacs r0, {r2, sl, fp} │ │ - ldmdavs r8!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ - ldc 0, cr15, [r2, #-700]! @ 0xfffffd44 │ │ - cdpcc 7, 0, cr3, cr1, cr12, {0} │ │ - stccs 1, cr13, [r0, #-980] @ 0xfffffc2c │ │ - @ instruction: 0xf43f465d │ │ - strtmi sl, [r0], -r0, lsr #24 │ │ - @ instruction: 0xf0af461c │ │ - strtmi lr, [r3], -r8, lsr #26 │ │ - ldclt 7, cr15, [r9], {255} @ 0xff │ │ - tstls r2, #64, 12 @ 0x4000000 │ │ - @ instruction: 0xf8cd4691 │ │ - @ instruction: 0xf8cdc034 │ │ - @ instruction: 0xf00ae028 │ │ - @ instruction: 0xf8ddfa56 │ │ - strbmi lr, [sl], -r8, lsr #32 │ │ - ldrsbtgt pc, [r4], -sp @ │ │ - stmdbeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ - @ instruction: 0xf7fe9b12 │ │ - ldmdami r8, {r0, r3, r4, r5, r6, r7, r8, sl, fp, ip, sp, pc}^ │ │ - @ instruction: 0xf0184478 │ │ - ldmdami r7, {r0, r1, r6, r7, r9, fp, ip, sp, lr, pc}^ │ │ - @ instruction: 0xf0164478 │ │ - ldmdbls r0, {r0, r2, r6, r9, sl, fp, ip, sp, lr, pc} │ │ - strmi r4, [pc], -r8, lsl #5 │ │ - @ instruction: 0x4607bf38 │ │ - stmdble r8, {r0, r7, r9, lr} │ │ - subeq lr, r7, r7, lsl #22 │ │ - bl 8f20c │ │ - ldmvs r7!, {r6, r7, r9, sl} │ │ - @ instruction: 0xf47e2f00 │ │ - @ instruction: 0xf8ddadd5 │ │ - ldmdals r1, {r3, r4, r5, sp, pc} │ │ - @ instruction: 0xf0afb10b │ │ - @ instruction: 0x465decf4 │ │ - ldrdeq pc, [r0], #-138 @ 0xffffff76 │ │ - cmple ip, r0, lsl #16 │ │ - @ instruction: 0xf04f46d0 │ │ - tstls r2, #255 @ 0xff │ │ - @ instruction: 0xf8c846da │ │ - strtmi r0, [fp], r0, asr #32 │ │ - ldm r9!, {r1, r6, r8, fp, sp, pc} │ │ - strmi r0, [r8], -ip, ror #1 │ │ - ldm r9!, {r2, r3, r5, r6, r7, lr, pc} │ │ - rscgt r0, ip, ip, ror #1 │ │ - smlalseq lr, ip, r9, r8 │ │ - stmdage sl!, {r2, r3, r4, r5, r6, r7, lr, pc} │ │ - mrrc2 0, 2, pc, r2, cr2 @ │ │ - ldmib r8, {r1, r3, r5, r9, fp, sp, pc}^ │ │ - @ instruction: 0xf8d86511 │ │ - strbmi r7, [r1], ip, asr #32 │ │ - @ instruction: 0xf1b6ca07 │ │ - blls 2fca28 │ │ - andle ip, ip, r7, lsl #6 │ │ - @ instruction: 0x462cb137 │ │ - bleq 166f84 │ │ - stcl 0, cr15, [r8, #460]! @ 0x1cc │ │ - mvnsle r3, r1, lsl #30 │ │ - svclt 0x001c2e00 │ │ - @ instruction: 0xf0af4628 │ │ - @ instruction: 0xf8d9ecc0 │ │ - ldrbmi r0, [r3, #64] @ 0x40 │ │ - @ instruction: 0xf1009913 │ │ - @ instruction: 0xf8c90001 │ │ - @ instruction: 0xf8dd0040 │ │ - tstle r1, r8, asr #32 │ │ - ldmib sp, {r0, r3, r9, fp, ip, pc}^ │ │ - adcmi r0, r9, #20, 10 @ 0x5000000 │ │ - ldmdavs r6, {r2, r3, r8, fp, ip, pc}^ │ │ - cmnlt sp, r4, lsl r9 │ │ - strtmi r0, [r1], -ip, lsr #2 │ │ - stc 0, cr15, [r0, #-700] @ 0xfffffd44 │ │ - stmdblt r8!, {r2, r3, r8, fp, ip, pc}^ │ │ - strtmi r2, [r1], -r8 │ │ - @ instruction: 0xf894f015 │ │ - ldmib sp, {r2, r3, fp, ip, pc}^ │ │ - cdpls 7, 1, cr3, cr1, cr15, {0} │ │ - stcllt 7, cr15, [ip], #1016 @ 0x3f8 │ │ - ldc 0, cr15, [sl], {175} @ 0xaf │ │ - stmdbls ip, {r3, sp} │ │ - streq lr, [r0, #-2502] @ 0xfffff63a │ │ - andge pc, r0, r1, asr #17 │ │ - pop {r0, r1, r2, r3, r5, r6, ip, sp, pc} │ │ - ldmdami r7, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - @ instruction: 0xf0184478 │ │ - blmi 7a77b8 │ │ - mrscs r2, (UNDEF: 2) │ │ - ldrbtmi r4, [fp], #-1570 @ 0xfffff9de │ │ - ldc2l 0, cr15, [sl, #-88]! @ 0xffffffa8 │ │ - andcs r4, r0, r7, lsl fp │ │ - ldrbmi r2, [sl], -r2, lsl #2 │ │ - @ instruction: 0xf016447b │ │ - blmi 5a8494 │ │ + svcls 0x0003ab05 │ │ + strgt ip, [pc, -lr, lsl #22] │ │ + pop {r0, r1, r3, ip, sp, pc} │ │ + blmi 10b598 │ │ mrscs r2, (UNDEF: 2) │ │ - @ instruction: 0xf016447b │ │ - andcs pc, r1, sp, ror #26 │ │ - @ instruction: 0xf0154639 │ │ - stmdami ip, {r0, r1, r2, r5, r6, fp, ip, sp, lr, pc} │ │ - blmi 353840 │ │ - ldrbtmi r4, [r8], #-2316 @ 0xfffff6f4 │ │ - ldrbtmi r4, [r9], #-1147 @ 0xfffffb85 │ │ - @ instruction: 0x212b9100 │ │ - blx ff8e4f50 │ │ - tstcs r8, r1 │ │ - @ instruction: 0xf858f015 │ │ - andcs r9, r8, r1, lsl r9 │ │ - @ instruction: 0xf854f015 │ │ - andeq r1, fp, ip, lsl #28 │ │ - strdeq r1, [fp], -ip │ │ - andeq r1, fp, r4, lsr #27 │ │ - @ instruction: 0xffff05a5 │ │ - andeq r1, fp, ip, ror #20 │ │ - andeq r1, fp, sl, lsl #23 │ │ - andeq r1, fp, r0, ror fp │ │ - andeq r1, fp, r4, ror #22 │ │ - andeq r1, fp, lr, ror fp │ │ - addlt fp, sl, r0, ror r5 │ │ - ldm r1, {r2, r9, sl, lr} │ │ - ldmib r1, {r0, r3, ip, lr}^ │ │ - stmibvs r9, {r2, r9, sl, ip, lr} │ │ - andpl lr, r9, sp, lsl #17 │ │ - stmib sp, {r1, r2, fp, sp, pc}^ │ │ - @ instruction: 0xf02c5604 │ │ - stmdals r6, {r0, r1, r2, r3, r7, r9, fp, ip, sp, lr, pc} │ │ - vsra.s8 d18, d1, #8 │ │ - addmi r0, r8, #0, 2 │ │ - @ instruction: 0xf8ddd00c │ │ - @ instruction: 0xf89d1021 │ │ - @ instruction: 0xf8dd301c │ │ - bls 280fd0 │ │ - andne pc, r9, r4, asr #17 │ │ - andvs pc, r5, r4, asr #17 │ │ - @ instruction: 0x712360e2 │ │ - andlt r6, sl, r0, lsr #32 │ │ - ldrble fp, [r4], #3440 @ 0xd70 │ │ - svcmi 0x00f0e92d │ │ - @ instruction: 0xf8d1b0b5 │ │ - ldrmi fp, [r1], r0 │ │ - ldmib r2, {r7, r9, sl, lr}^ │ │ - ldmib fp, {r1, r8, r9, sp}^ │ │ - subsmi r0, r9, ip, lsl #2 │ │ - movwmi r4, #32848 @ 0x8050 │ │ - @ instruction: 0xf899d117 │ │ - biclt r0, r8, r0, asr r0 │ │ - ldrdeq pc, [r0], #-137 @ 0xffffff77 │ │ - @ instruction: 0xf0402800 │ │ - strbmi r8, [r9], -pc, asr #4 │ │ - andmi pc, r0, pc, asr #32 │ │ - svccs 0x0044f851 │ │ - movwvc lr, #6609 @ 0x19d1 │ │ - svcmi 0x0000f1b2 │ │ - tstle r2, r8 │ │ - vshr.s8 d18, d1, #8 │ │ - stmdacc r8, {} @ │ │ - andscs lr, r1, r8 │ │ - andeq pc, r0, r8, asr #5 │ │ - and r3, r3, r1, lsl #16 │ │ - vshr.s8 d18, d1, #8 │ │ - stmdacc ip, {} @ │ │ - andeq pc, r0, r8, asr #17 │ │ - pop {r0, r2, r4, r5, ip, sp, pc} │ │ - @ instruction: 0xf8d98ff0 │ │ - stmib sp, {r4}^ │ │ - stmdacs r0, {r1, r3, r9, ip, sp} │ │ - strne lr, [r8, -sp, asr #19] │ │ - eorhi pc, r8, #64 @ 0x40 │ │ - andseq pc, r8, r9, lsl #2 │ │ - stmdbge ip, {r0, r2, ip, pc} │ │ - beq 166542c │ │ - mvngt ip, ip, ror #17 │ │ - smlaleq lr, ip, r0, r8 │ │ - andmi pc, r0, pc, asr #32 │ │ - smlattcs r4, ip, r1, ip │ │ - eoreq pc, r0, r9, asr #17 │ │ - stmib sp, {sp}^ │ │ - vand d16, d0, d8 │ │ - stmib sp, {r0, r2, r3, r7, r8, ip, sp}^ │ │ - stmib sp, {r1, r2, r4}^ │ │ - stmib sp, {r1, r3, r4}^ │ │ - and r0, r1, ip, lsl r1 │ │ - @ instruction: 0xd11e0890 │ │ - @ instruction: 0xf01f4650 │ │ - ldmdals fp, {r0, r3, r4, r6, r7, fp, ip, sp, lr, pc} │ │ - rscsle r2, r9, r0, lsl #16 │ │ - movwcs r2, #8448 @ 0x2100 │ │ - strcs r2, [r0, -r1, lsl #12] │ │ - blx fe92105e │ │ - stmdaeq r0, {r0, r1, r8, sl, sp}^ │ │ - strpl pc, [r7, #-2819] @ 0xfffff4fd │ │ - strpl pc, [r7, -r3, lsl #22] │ │ - bfieq r4, r3, (invalid: 12:2) │ │ - blx fe91d42a │ │ - stmdacs r1, {r1, r2, r8, sl, sp} │ │ - blx 11d3ee │ │ - blx 1fd466 │ │ - ldrmi r1, [r6], -r6, lsl #2 │ │ - ldrbmi lr, [r1], -fp, ror #15 │ │ - stmibgt ip, {r1, r2, r5, fp, sp, pc}^ │ │ - sbcgt r3, ip, r4 │ │ - smulleq lr, ip, r1, r8 │ │ - @ instruction: 0xf8dbc0cc │ │ - @ instruction: 0xf8d90060 │ │ - stmdbls lr, {ip, sp, lr} │ │ - lsllt r9, r4, #2 │ │ - subeq lr, r0, r0, lsl #22 │ │ - ldrsbmi pc, [ip], #-139 @ 0xffffff75 @ │ │ - tsteq r5, r6, lsl lr │ │ - ldrtmi r6, [r0], -r1, lsr #16 │ │ - @ instruction: 0xf02c463a │ │ - ldmdals r6, {r0, r2, r3, r4, r6, fp, ip, sp, lr, pc} │ │ - vsra.s8 d18, d1, #8 │ │ - addmi r0, r8, #0, 2 │ │ - addhi pc, r8, r0, asr #32 │ │ - ldccc 4, cr3, [r0, #-192]! @ 0xffffff40 │ │ - @ instruction: 0xf8dbd1f0 │ │ - ldrcs r0, [r1], #-108 @ 0xffffff94 │ │ - streq pc, [r0], #-712 @ 0xfffffd38 │ │ - stmdbhi r6, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc} │ │ - @ instruction: 0xf8dbb338 │ │ - bl ff02d264 │ │ - cdpge 0, 1, cr0, cr6, cr0, {6} │ │ - @ instruction: 0xf101ad30 │ │ - b 13eb4f0 │ │ - @ instruction: 0xf85908c0 │ │ - ldrtmi r1, [r0], -r8, lsl #24 │ │ - @ instruction: 0xf02c463a │ │ - ldmdals r6, {r0, r1, r3, r4, r5, fp, ip, sp, lr, pc} │ │ - smlatble r6, r0, r2, r4 │ │ - ldrdne pc, [r0], -r9 │ │ - ldrtmi r4, [sl], -r8, lsr #12 │ │ - @ instruction: 0xf832f02c │ │ - blge 5e1108 │ │ - stcleq 1, cr15, [r0], {13} │ │ - stm ip, {r0, r1, r2, r3, r8, r9, fp, lr, pc} │ │ - ldmdals r0!, {r0, r1, r2, r3} │ │ - cmple r7, r0, lsr #5 │ │ - ldmdbeq r8!, {r0, r3, r8, ip, sp, lr, pc} │ │ - ldmdaeq r8!, {r3, r4, r5, r7, r8, ip, sp, lr, pc} │ │ - @ instruction: 0xf8dbd1e1 │ │ - teqlt r0, #120 @ 0x78 │ │ - ldrsbtne pc, [r4], #-139 @ 0xffffff75 @ │ │ - sbceq lr, r0, r0, asr #23 │ │ - ldmdbeq r8, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ - @ instruction: 0xf101ad30 │ │ - b 13ea948 │ │ - @ instruction: 0xf85608c0 │ │ - strbmi r1, [r8], -r8, lsl #24 │ │ - @ instruction: 0xf02c463a │ │ - ldmdals r6, {r0, r1, r2, r3, fp, ip, sp, lr, pc} │ │ - smlatble r5, r0, r2, r4 │ │ - @ instruction: 0x46286831 │ │ - @ instruction: 0xf02c463a │ │ - and pc, r5, r7, lsl #16 │ │ - @ instruction: 0xf10dab16 │ │ - blgt 3ec450 │ │ - andeq lr, pc, ip, lsl #17 │ │ - adcmi r9, r0, #48, 16 @ 0x300000 │ │ - ldrtcc sp, [r8], -ip, lsr #2 │ │ - ldmdaeq r8!, {r3, r4, r5, r7, r8, ip, sp, lr, pc} │ │ - @ instruction: 0xf8dbd1e3 │ │ - ldmdage r6, {r5, ip} │ │ - @ instruction: 0xf02b463a │ │ - ldmdals r6, {r0, r1, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ - @ instruction: 0xd12642a0 │ │ - @ instruction: 0xf8dd2000 │ │ - stmib fp, {r2, r3, r4, ip, pc}^ │ │ - stmdals r4, {r1, r2, r3} │ │ - svcmi 0x0000f1b0 │ │ - sbchi pc, r7, r0 │ │ - ldmib fp, {r2, r4, fp, ip, pc}^ │ │ - andcc r2, r8, sl, lsl #6 │ │ - blx 1165232 │ │ - andne lr, r9, #208, 18 @ 0x340000 │ │ - stmdage ip, {r0, r2, r9, sl, lr} │ │ - ldc2 0, cr15, [r6, #-156] @ 0xffffff64 │ │ - ldrdvs lr, [r3], -r5 │ │ - bleq 652e4 │ │ - subeq lr, r0, r0, lsl #22 │ │ - bl 1ce5b8 │ │ - ands r0, r3, r0, lsl #19 │ │ - and sl, r5, r0, lsr fp │ │ - blgt 413e14 │ │ - andeq lr, pc, r8, lsl #17 │ │ - blge 5e1478 │ │ - @ instruction: 0xf8ddcb0f │ │ - @ instruction: 0xf8dd8018 │ │ - stm r8, {r2, r3, r4, ip, pc} │ │ - adc r0, r4, pc │ │ - bls 13221c │ │ - streq pc, [r0], #-712 @ 0xfffffd38 │ │ - svceq 0x0000f1bb │ │ - ldrmi fp, [r3, #3864] @ 0xf18 │ │ - strbmi sp, [lr, #-268] @ 0xfffffef4 │ │ - ldmvs r1!, {r2, r3, r4, r6, ip, lr, pc} │ │ - stmdbcs r0, {r2, r3, r9, sl, ip, sp} │ │ - @ instruction: 0xf856d0f9 │ │ - bl 6c218 │ │ - bl 29700 │ │ - and r0, r0, r1, asr #5 │ │ - stmdbvs r1, {r3, r4, r6, r9, sl, lr} │ │ - bleq 665608 │ │ - rscle r2, r7, r0, lsl #18 │ │ - ldrdhi pc, [ip], -r0 │ │ - bl 24da24 │ │ - andls r0, r3, r1, lsl #1 │ │ - blvc 16737c │ │ - subsmi pc, r5, r7, asr #12 │ │ - subvc pc, sl, r7, asr #13 │ │ - ldmdbls r0, {r2, r3, r8, r9, fp, ip, pc} │ │ - cmpmi r0, #950272 @ 0xe8000 │ │ - addmi r4, r1, #24 │ │ - tstphi r1, r0, asr #4 @ p-variant is OBSOLETE │ │ - bl 4f674 │ │ - ldmdbvs fp!, {r6}^ │ │ - addeq lr, r0, r1, lsl #22 │ │ - ldrdeq lr, [r1, -r0] │ │ - teqlt r9, r9, lsl #2 │ │ - strpl lr, [r4], #-2288 @ 0xfffff710 │ │ - subsmi r3, ip, r0, lsl r9 │ │ - @ instruction: 0x43254055 │ │ - @ instruction: 0xe7bdd1f7 │ │ - svceq 0x0000e857 │ │ - stmda r7, {r0, r6, sl, fp, ip}^ │ │ - stccs 5, cr1, [r0, #-0] │ │ - stmdacs r0, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ - rscshi pc, r4, r0, lsl #2 │ │ - strls sl, [r0, -ip, lsl #16] │ │ - stc2 0, cr15, [r2, #-156] @ 0xffffff64 │ │ - @ instruction: 0xf2c82411 │ │ - cmnlt r0, r0, lsl #8 │ │ - svchi 0x005bf3bf │ │ - svcne 0x0000e850 │ │ - stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ - blcs 31e8c │ │ - stmdbcs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ - @ instruction: 0xf3bfbf04 │ │ - @ instruction: 0xf01e8f5b │ │ - stmdals r3, {r0, r1, r3, r5, r9, fp, ip, sp, lr, pc} │ │ - @ instruction: 0xd1bb4580 │ │ - ldr r9, [fp, r4, lsl #20] │ │ - @ instruction: 0xf8dd9902 │ │ - blvs 124d31c │ │ - blvs 3d6110 │ │ - andne lr, r0, r0, lsl #22 │ │ - ldmdaeq r0!, {r0, r2, r3, r8, ip, sp, lr, pc} │ │ - strbeq lr, [r0, r6, lsl #22] │ │ - strcc lr, [r8], r2 │ │ - strhtle r4, [r8], -lr │ │ - ldrdeq pc, [r0], r6 │ │ - movwcs lr, #18896 @ 0x49d0 │ │ - svcne 0x0000e850 │ │ - stmda r0, {r0, r2, r3, r6, sl, fp, ip}^ │ │ - stccs 4, cr5, [r0], {-0} │ │ - stmdbcs r0, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ - adcshi pc, sl, r0, lsl #2 │ │ - ldrdeq pc, [r0], r6 │ │ - strbmi r9, [r0], -r0 │ │ - stc2l 0, cr15, [r6], {39} @ 0x27 │ │ - stmdacs r0, {r0, r4, sl, sp} │ │ - streq pc, [r0], #-712 @ 0xfffffd38 │ │ - vmla.i , , d19[0] │ │ - ldmda r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ - cdpne 15, 4, cr1, cr10, cr0, {0} │ │ - movwcs lr, #2112 @ 0x840 │ │ - mvnsle r2, r0, lsl #22 │ │ - svclt 0x00042901 │ │ - svchi 0x005bf3bf │ │ - @ instruction: 0xf9eef01e │ │ - @ instruction: 0xf8dde7d3 │ │ - @ instruction: 0xf8c88018 │ │ - stmdbls fp, {lr} │ │ - stmdals r9, {r1, r2, r5, r8, sl, fp, sp, pc} │ │ - andcs r9, r0, r8, lsl r0 │ │ - stmib sp, {r1, r3, r4, ip, pc}^ │ │ - stmdals sl, {r1, r2, r4, r8} │ │ - @ instruction: 0xf10a9019 │ │ - stcgt 0, cr0, [lr, #80] @ 0x50 │ │ - ldm r5, {r1, r2, r3, r7, lr, pc} │ │ - sbcgt r0, lr, lr, asr #1 │ │ - @ instruction: 0x4651a830 │ │ - addsls pc, r0, sp, asr #17 │ │ - @ instruction: 0xf9b6f022 │ │ - ldrdeq pc, [r0], -r8 │ │ - vsra.s8 d18, d1, #8 │ │ - addmi r0, r8, #0, 2 │ │ - @ instruction: 0xf8d9d14a │ │ - stmdacs r0, {r6} │ │ - bge c5d924 │ │ - ldmdavc r1, {r0, r3, r4, r6, r7, r8, fp, sp, lr, pc} │ │ - mvnscc pc, #79 @ 0x4f │ │ - ldrdvs pc, [ip], #-137 @ 0xffffff77 │ │ - @ instruction: 0xf1b7ca07 │ │ - @ instruction: 0xf8c94f00 │ │ - blls 23547c │ │ - andle ip, ip, r7, lsl #6 │ │ - @ instruction: 0x4644b136 │ │ - bleq 1674d8 │ │ - bl fe5558 │ │ - mvnsle r3, r1, lsl #28 │ │ - svclt 0x001c2f00 │ │ - @ instruction: 0xf0af4640 │ │ - @ instruction: 0xf8d9ea16 │ │ - stmdbls lr, {r6} │ │ - @ instruction: 0xf8c93001 │ │ - @ instruction: 0xf1b10040 │ │ - @ instruction: 0xf43f4f00 │ │ - @ instruction: 0xf8d9ae13 │ │ - stmdacs r0, {r4} │ │ - stcls 1, cr13, [r5, #-296] @ 0xfffffed8 │ │ - rscscc pc, pc, pc, asr #32 │ │ - andseq pc, r0, r9, asr #17 │ │ - stmiagt lr, {r3, r5, r9, sl, lr}^ │ │ - sbceq lr, lr, sl, lsr #17 │ │ - smulleq lr, lr, r0, r8 @ │ │ - sbceq lr, lr, sl, lsl #17 │ │ - cdpgt 14, 8, cr10, cr15, cr12, {0} │ │ - ldm r6, {r0, r1, r2, r3, r7, r8, sl, lr, pc} │ │ - strgt r0, [pc, #143] @ 2946b │ │ - @ instruction: 0xf1b09818 │ │ - @ instruction: 0xd1204f00 │ │ - @ instruction: 0xf8c92000 │ │ - eorslt r0, r5, r0, lsl r0 │ │ - svchi 0x00f0e8bd │ │ - ldrmi lr, [r1, #-2525]! @ 0xfffff623 │ │ - @ instruction: 0x4626b135 │ │ - bleq 167554 │ │ - bl 1655cc │ │ - mvnsle r3, r1, lsl #26 │ │ - stmdacs r0, {r4, r5, fp, ip, pc} │ │ - qadd16mi fp, r0, ip │ │ - ldmib sl, {r0, r1, r2, r3, r5, r7, ip, sp, lr, pc}^ │ │ - @ instruction: 0xf1b0980e │ │ - @ instruction: 0xf43f4f00 │ │ - stmdage ip, {r0, r2, r3, r4, r6, r7, r8, sl, fp, sp, pc} │ │ - @ instruction: 0xf9c2f022 │ │ - pop {r0, r2, r4, r5, ip, sp, pc} │ │ - ldmdage r6, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - @ instruction: 0xf9bcf022 │ │ - @ instruction: 0x0010f8d9 │ │ - @ instruction: 0xf8c93001 │ │ - eorslt r0, r5, r0, lsl r0 │ │ - svchi 0x00f0e8bd │ │ - ldrbtmi r4, [r8], #-2059 @ 0xfffff7f5 │ │ - @ instruction: 0xff76f017 │ │ - ldrbtmi r4, [r8], #-2055 @ 0xfffff7f9 │ │ - @ instruction: 0xff72f017 │ │ - ldrbtmi r4, [r8], #-2054 @ 0xfffff7fa │ │ - @ instruction: 0xff6ef017 │ │ - bmi e1050 │ │ - @ instruction: 0xf016447a │ │ - svclt 0x0000fb0d │ │ - andeq r1, fp, r8, asr r6 │ │ - andeq r1, fp, sl, lsl #17 │ │ - andeq r1, fp, r2, ror r8 │ │ - andeq r1, fp, r2, ror #16 │ │ - @ instruction: 0xb086b5b0 │ │ - strmi r4, [r4], -sp, lsl #12 │ │ - stmdavs r9, {r0, r1, r3, r9, fp, ip, sp, lr}^ │ │ - andls r7, r0, r8, ror #20 │ │ - @ instruction: 0xf02ea802 │ │ - stmdals r2, {r0, r2, r3, r6, r7, r8, sl, fp, ip, sp, lr, pc} │ │ - vsra.s8 d18, d1, #8 │ │ - addmi r0, r8, #0, 2 │ │ - stmdavs fp!, {r0, r1, r2, r8, ip, lr, pc} │ │ - andne lr, r4, #3620864 @ 0x374000 │ │ - andne lr, r0, #3194880 @ 0x30c000 │ │ - andlt r6, r6, r0, lsr #32 │ │ - blge 118b64 │ │ - stceq 1, cr15, [r4], {4} │ │ - stm ip, {r1, r2, r3, r8, r9, fp, lr, pc} │ │ - eorvs r0, r0, lr │ │ - ldclt 0, cr11, [r0, #24]! │ │ - mvnsmi lr, sp, lsr #18 │ │ - stmiavs lr, {r2, r3, r7, ip, sp, pc}^ │ │ - stccs 8, cr6, [r1], {244} @ 0xf4 │ │ - ldmvs r5!, {r3, r5, r8, fp, ip, lr, pc} │ │ - ldmib r1, {r7, r9, sl, lr}^ │ │ - stmvs r9, {r8, r9} │ │ - strls r8, [fp, -pc, lsr #16] │ │ - stm sp, {r0, r3, r8, r9, sl, fp, sp, pc} │ │ - stmdage r4, {r0, r3, r7} │ │ - strpl lr, [r9], #-2509 @ 0xfffff633 │ │ - ldc2 0, cr15, [sl, #168]! @ 0xa8 │ │ - tstcs r1, r4, lsl #16 │ │ - smlabteq r0, r8, r2, pc @ │ │ - smlabble r8, r8, r2, r4 │ │ - andne lr, r6, #3620864 @ 0x374000 │ │ - andne lr, r0, #3244032 @ 0x318000 │ │ - andeq pc, r0, r8, asr #17 │ │ - pop {r2, r3, ip, sp, pc} │ │ - blge 189cc0 │ │ - stceq 1, cr15, [r4], {8} │ │ - stm ip, {r1, r2, r3, r8, r9, fp, lr, pc} │ │ - @ instruction: 0xf8c8000e │ │ - andlt r0, ip, r0 │ │ - ldrhhi lr, [r0, #141]! @ 0x8d │ │ - andcs r4, r0, r3, lsl #22 │ │ - strtmi r2, [r2], -r2, lsl #2 │ │ - @ instruction: 0xf016447b │ │ - svclt 0x0000fa45 │ │ - andeq r1, fp, r4, lsl r5 │ │ - svcmi 0x00f0e92d │ │ - @ instruction: 0xf8d1b0e3 │ │ - strmi fp, [r9], r0, lsr #32 │ │ - ldrdvs lr, [r2, -r2] │ │ - movwvc lr, #51675 @ 0xc9db │ │ - b fe1b96a4 │ │ - tstmi r9, #469762048 @ 0x1c000000 │ │ - ldcvs 1, cr13, [r1], {30} │ │ - @ instruction: 0xf0402900 │ │ - eorls r8, r3, #43778048 @ 0x29c0000 │ │ - tstpmi r0, pc, asr #32 @ p-variant is OBSOLETE │ │ - svcge 0x0044f852 │ │ - addsls pc, r8, sp, asr #17 │ │ - stmdbhi r1, {r1, r4, r6, r7, r8, fp, sp, lr, pc} │ │ - svcmi 0x0000f1ba │ │ - tstle r9, r1, lsl r0 │ │ - @ instruction: 0xf8dd2111 │ │ - vshr.s64 d25, d8, #56 │ │ - stmdbcc r8, {r8} │ │ - ldmib r9, {r0, sp, lr}^ │ │ - stccs 4, cr5, [r0], {3} │ │ - ldrbhi pc, [r1, -r0, asr #32] @ │ │ - svclt 0x005af000 │ │ - vsra.s8 d18, d1, #8 │ │ - stmdbcc r1, {r8} │ │ - ldmib r9, {r0, sp, lr}^ │ │ - stccs 4, cr5, [r0], {3} │ │ - strbhi pc, [r5, -r0, asr #32] @ │ │ - svclt 0x004ef000 │ │ - andcs r9, r0, r2, lsr #32 │ │ - svcge 0x00482104 │ │ - smlalbteq lr, sl, sp, r9 │ │ - orrcc pc, sp, r0, asr #4 │ │ - stmib sp, {r0, r3, r4, r9, ip, pc}^ │ │ - stmib sp, {r3, r6}^ │ │ - stmib sp, {r2, r3, r6}^ │ │ - and r0, r1, lr, asr #2 │ │ - @ instruction: 0xd11e0890 │ │ - @ instruction: 0xf01e4638 │ │ - stmdals sp, {r0, r2, r3, r9, sl, fp, ip, sp, lr, pc}^ │ │ - rscsle r2, r9, r0, lsl #16 │ │ - movwcs r2, #8448 @ 0x2100 │ │ - strcs r2, [r0, #-1537] @ 0xfffff9ff │ │ - blx fe9215f6 │ │ - stmdaeq r0, {r0, r1, sl, sp}^ │ │ - strmi pc, [r5], #-2819 @ 0xfffff4fd │ │ - strmi pc, [r5, #-2819] @ 0xfffff4fd │ │ - bfieq r4, r3, (invalid: 12:2) │ │ - blx fe91d9c2 │ │ - stmdacs r1, {r1, r2, sl, sp} │ │ - blx 11d986 │ │ - blx 1799fe │ │ - ldrmi r1, [r6], -r6, lsl #2 │ │ - svcgt 0x006ce7eb │ │ - stcne 8, cr10, [r1, #-224] @ 0xffffff20 │ │ - stceq 0, cr15, [r0], {79} @ 0x4f │ │ - ldm r7, {r2, r3, r5, r6, r8, lr, pc} │ │ - cmngt ip, ip, rrx │ │ - @ instruction: 0xf101a928 │ │ - stmib sp, {r2, r4, r9}^ │ │ - @ instruction: 0xf8dd892a │ │ - @ instruction: 0xf8cd808c │ │ - stmib sp, {r4, r5, r7, lr, pc}^ │ │ - @ instruction: 0xf8cdca28 │ │ - stmiagt r8!, {r3, r4, r6, r7, pc}^ │ │ - ldm r0, {r3, r5, r6, r7, r9, lr, pc} │ │ - rscsgt r0, r8, #248 @ 0xf8 │ │ - @ instruction: 0xf8dbad38 │ │ - strtmi r2, [r8], -r0, lsr #32 │ │ - smlalbtgt pc, r4, sp, r8 @ │ │ - blx 18656c6 │ │ - @ instruction: 0xf50daf38 │ │ - svcgt 0x008f7c90 │ │ - stm ip, {r1, fp, sp} │ │ - smlabble r7, lr, r0, r0 │ │ - svcls 0x0022ab48 │ │ - @ instruction: 0x9098f8dd │ │ - strgt ip, [pc, -pc, lsl #22] │ │ - cdplt 0, 10, cr15, cr9, cr0, {0} │ │ - @ instruction: 0x9098f8dd │ │ - cdpls 15, 3, cr10, cr13, cr8, {2} │ │ - stcvc 5, cr15, [r4], #52 @ 0x34 │ │ - stm ip, {r1, r2, r3, r7, r8, r9, sl, fp, lr, pc} │ │ - strbeq r0, [r0, pc, lsl #1] │ │ - @ instruction: 0xf0009657 │ │ - svcls 0x00538713 │ │ - subls sl, sl, r1, asr r8 │ │ - andls r2, r1, r0 │ │ - @ instruction: 0x4639a838 │ │ - movwcs r2, #512 @ 0x200 │ │ - stmdblt r8, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc}^ │ │ - blx ff2e571a │ │ - ldmib sp, {r3, r4, r5, r8, r9, fp, sp, pc}^ │ │ - @ instruction: 0x2611153b │ │ - vqdmlsl.s q14, d8, d13 │ │ - teqlt r0, r0, lsl #12 │ │ - ldrdge pc, [r8], sp │ │ - ldrhtle r4, [r9], -r2 │ │ - @ instruction: 0xf0000a18 │ │ - @ instruction: 0xf8ddbe6c │ │ - strbmi sl, [ip], -r8, lsl #1 │ │ - stmib sp, {r1, r3, r4, r5, r6, r8, r9, ip, sp, pc}^ │ │ - ldmdage r8!, {r8, sl, ip} │ │ - @ instruction: 0xf02ca948 │ │ - bls e67b78 │ │ - smlalcc pc, r4, sp, r8 @ │ │ - @ instruction: 0xf04042b2 │ │ - @ instruction: 0x07d88651 │ │ - @ instruction: 0xf10dd021 │ │ - @ instruction: 0xf04f08e0 │ │ - strbmi r0, [r0], -r0, lsl #18 │ │ - andcs r4, r8, #59768832 @ 0x3900000 │ │ - @ instruction: 0xf8cd2300 │ │ - @ instruction: 0xf0209004 │ │ - blge e68568 │ │ - ldrne lr, [fp, #-2525]! @ 0xfffff623 │ │ - stmdacs r0, {r0, r2, r3, r8, r9, fp, lr, pc} │ │ - ldrthi pc, [r3], r0, asr #32 @ │ │ - stmib sp, {r1, r3, r5, r6, r8, ip, sp, pc}^ │ │ - stmdbge r8, {r8, sl, ip}^ │ │ - @ instruction: 0xf02c4640 │ │ - bls e67b34 │ │ - smlalcc pc, r4, sp, r8 @ │ │ - @ instruction: 0xf04042b2 │ │ - ldrbeq r8, [r8, pc, lsr #12] │ │ - @ instruction: 0xf8ddd1e1 │ │ - strtmi r8, [r1], ip, lsl #1 │ │ - @ instruction: 0xf8d99851 │ │ - addmi r1, r8, #24 │ │ - ldrhi pc, [r2], -r0, asr #32 │ │ - ldrdeq pc, [r0], #-139 @ 0xffffff75 @ │ │ - @ instruction: 0xf0002800 │ │ - @ instruction: 0xf8db8600 │ │ - bl 4d8b0 │ │ - stmdbls r6!, {r6} │ │ - andne lr, r0, r9, lsl #22 │ │ - stmdavs r8, {r1, r4, ip, pc} │ │ - ldmib r1, {r0, r1, r2, r4, ip, pc}^ │ │ - @ instruction: 0x91211003 │ │ - bl 4d7b8 │ │ - bl 6985c │ │ - addeq r0, r0, r0, lsl #17 │ │ - tstcc r8, sp │ │ - @ instruction: 0xf8d9910e │ │ - ldmdage r8!, {sp} │ │ - andsls sl, r3, #40, 18 @ 0xa0000 │ │ - blx ff2657f4 │ │ - ldmib sp, {r1, r3, r4, r5, r9, fp, sp, pc}^ │ │ - bgt 20685c │ │ - tstle r5, r2, lsl #30 │ │ - andsls r0, r1, r3, lsl #20 │ │ - movwcs lr, #63949 @ 0xf9cd │ │ - stcllt 0, cr15, [sp] │ │ - ldcvc 5, cr15, [r4], {13} │ │ - stm ip, {r0, r2, r3, r4, r5, r8, r9, fp, ip, pc} │ │ - ldmib r9, {r0, r1, r2}^ │ │ - stmdbcs r0, {r3, r8} │ │ - stmib sp, {r0, r2, r3, r6, r8, r9, ip, pc}^ │ │ - stmib sp, {r3, r6, sl, ip, sp, lr}^ │ │ - ldmib sp, {r1, r2, r3, r4, ip}^ │ │ - @ instruction: 0xf000100d │ │ - andcs r8, r0, r1, lsl #11 │ │ - eorls r9, r7, r1, lsr #28 │ │ - ldrtmi r2, [ip], r0, lsl #10 │ │ - @ instruction: 0x46bb46be │ │ - @ instruction: 0x463b4639 │ │ - ssatmi r9, #27, fp, lsl #14 │ │ - @ instruction: 0xf8cd2700 │ │ - strtls r9, [r0], #-116 @ 0xffffff8c │ │ - svclt 0x001c2f00 │ │ - addmi r9, r7, #28, 16 @ 0x1c0000 │ │ - strbmi sp, [r6, #-272] @ 0xfffffef0 │ │ - strbhi pc, [pc, #-0]! @ 297dc @ │ │ - @ instruction: 0x360c68b0 │ │ - rscsle r2, r8, r0, lsl #16 │ │ - stcvc 8, cr15, [r8], {86} @ 0x56 │ │ - subeq lr, r0, r0, lsl #22 │ │ - tstlt r4, sp, asr #19 │ │ - sbceq lr, r0, r7, lsl #22 │ │ - and r9, r1, ip, lsl r0 │ │ - tstlt r4, sp, asr #19 │ │ - ldrdlt pc, [r0], -r7 │ │ - subsmi pc, r5, r7, asr #12 │ │ - subvc pc, sl, r7, asr #13 │ │ - tstls r6, #376832 @ 0x5c000 │ │ - @ instruction: 0xf000fb0b │ │ - andmi r9, r8, r5, lsr #10 │ │ - addmi r9, r1, #24, 18 @ 0x60000 │ │ - strthi pc, [r6], r0, asr #4 │ │ - subeq lr, r0, r0, lsl #22 │ │ - ldmdavs ip!, {r0, r5, r8, fp, ip, pc}^ │ │ - bl 77488 │ │ - strls r0, [r4, -r0, lsl #1]! │ │ - ldrdeq lr, [r1, -r0] │ │ - cmpeq r1, r1, lsl #22 │ │ - sbceq r3, pc, r8, lsl r8 @ │ │ - svccs 0x0000991f │ │ - ldrhi pc, [r0], r0 │ │ - svccs 0x0018f850 │ │ - stmdavs r3, {r3, r4, r8, r9, sl, fp, ip, sp}^ │ │ - andeq lr, fp, #532480 @ 0x82000 │ │ - tstmi sl, #99 @ 0x63 │ │ - @ instruction: 0xf891d1f3 │ │ - ldmib r0, {r5, ip, sp, lr}^ │ │ - stmdbvs r0, {r1, r9, ip, sp} │ │ - subsls r2, sl, r8, lsl #30 │ │ - subscc lr, r8, #3358720 @ 0x334000 │ │ - @ instruction: 0xf891d304 │ │ - @ instruction: 0xf1b99029 │ │ - cmple r7, r1, lsl #30 │ │ - ldmdage sp, {r1, r2, r3, r4, r9, fp, ip, pc}^ │ │ - @ instruction: 0xf025ab58 │ │ - stcls 8, cr15, [r5, #-436]! @ 0xfffffe4c │ │ - strcc r9, [r1, #-2087] @ 0xfffff7d9 │ │ - andeq pc, r0, r0, asr #2 │ │ - ldmdals fp, {r0, r1, r2, r5, ip, pc} │ │ - @ instruction: 0xf00007c0 │ │ - @ instruction: 0xf04f860b │ │ - ldmib sp, {r8, lr}^ │ │ - rsbmi r7, r1, lr, asr r0 │ │ - stmdbge r0!, {r0, r5, r6, r8, ip, pc}^ │ │ - ldrtmi r2, [fp], -r2, lsl #4 │ │ - orrlt pc, r0, sp, asr #17 │ │ - smlabteq r0, sp, r9, lr │ │ - stmdbls r0!, {r3, r4, r5, fp, sp, pc} │ │ - blx fefe5930 │ │ - eorseq lr, r8, #3620864 @ 0x374000 │ │ - @ instruction: 0xf8ddb178 │ │ - andscs r9, r1, r4, ror r0 │ │ - andeq pc, r0, r8, asr #5 │ │ - andle r4, fp, r2, lsl #5 │ │ - ldrsbtne lr, [sl], -sp │ │ - andls r9, r9, fp, lsl #2 │ │ - andls r9, r8, ip, lsr r8 │ │ - andls r0, r7, r8, lsl #20 │ │ - @ instruction: 0xf8dde04e │ │ - @ instruction: 0xb3b29074 │ │ - stmdacs r0, {r0, r2, r3, r4, r6, fp, ip, pc} │ │ - shadd16mi fp, r8, ip │ │ - svc 0x006ef0ae │ │ - stceq 0, cr15, [r1], {79} @ 0x4f │ │ - cdpeq 0, 0, cr15, cr1, cr15, {2} │ │ - bleq a5a30 │ │ - movwcs r2, #4353 @ 0x1101 │ │ - beq a5a38 │ │ - strb r9, [r5, -r4, lsr #30]! │ │ - strcs r9, [r0, #-2078] @ 0xfffff7e2 │ │ - eor pc, r8, sp, asr #17 │ │ - @ instruction: 0xf8cd2801 │ │ - subsls ip, ip, r0, lsr r0 │ │ - ldrbhi pc, [r0, #64] @ 0x40 @ │ │ - ldrtmi r2, [sl], -r1 │ │ - subsls r9, lr, fp │ │ - ldrbls r9, [sp, #-2079] @ 0xfffff7e1 │ │ - ldmdage r8, {r0, r6, r7, r8, fp, sp, lr}^ │ │ - @ instruction: 0xf0209106 │ │ - mvnlt pc, #2686976 @ 0x290000 │ │ - @ instruction: 0xf8dd2211 │ │ - vshr.s8 , q10, #8 │ │ - ldmib sp, {r9}^ │ │ - @ instruction: 0xf8dd7524 │ │ - @ instruction: 0xf8ddc030 │ │ - ldmib sp, {r3, r5, sp, lr, pc}^ │ │ - blls 5d5d98 │ │ - andscs lr, r4, r6, lsr #32 │ │ - svc 0x0052f0ae │ │ - @ instruction: 0xf0002800 │ │ - stmibmi r5, {r0, r2, r3, r4, r6, r7, r8, sl, pc}^ │ │ - stmib sp, {r2, r4, r9, sp}^ │ │ - ldrbtmi r2, [r9], #-8 │ │ - ldc2 0, cr15, [r3, #-684]! @ 0xfffffd54 │ │ - vshr.s8 d18, d1, #8 │ │ - svcne 0x00020000 │ │ - andls r2, r7, r0 │ │ - andls r2, fp, r4, lsl r0 │ │ - @ instruction: 0xb120985d │ │ - @ instruction: 0x46174638 │ │ - svc 0x0022f0ae │ │ - svcls 0x0024463a │ │ - stceq 0, cr15, [r1], {79} @ 0x4f │ │ - cdpeq 0, 0, cr15, cr1, cr15, {2} │ │ - bleq a5acc │ │ - movwcs r2, #4353 @ 0x1101 │ │ - beq a5ad4 │ │ - vshr.s8 d18, d1, #8 │ │ - addmi r0, r2, #0 │ │ - svcge 0x0014f43f │ │ - stcllt 0, cr15, [r7, #-0] │ │ - @ instruction: 0xf1a79d27 │ │ - stmdacs r6, {r3} │ │ - strhi pc, [fp, #512] @ 0x200 │ │ - @ instruction: 0xf010e8df │ │ - andeq r0, r7, r7 │ │ - ldrdeq r0, [r9], #-9 @ │ │ - teqeq ip, r4, lsr r2 │ │ - bls 1aa0b0 │ │ - ldmdbge r8, {r3, r4, r5, fp, sp, pc}^ │ │ - ldc2 0, cr15, [lr], {24} │ │ - stmdacs r1, {r3, r4, r5, fp, ip, pc} │ │ - strbhi pc, [sp, #64] @ 0x40 @ │ │ - @ instruction: 0x0739e9dd │ │ - vstmdbls r5!, {s18-s106} │ │ - @ instruction: 0xf8dd1839 │ │ - @ instruction: 0xf8ddc030 │ │ - blls 5e1a8c │ │ - strbhi pc, [r9, #-128]! @ 0xffffff80 @ │ │ - vqsub.s8 d4, d16, d1 │ │ - svccs 0x00008566 │ │ - rsbshi pc, fp, #0 │ │ - strcs r9, [r0, #-2392] @ 0xfffff6a8 │ │ - @ instruction: 0xa09cf8dd │ │ - stmdbeq r0, {r0, r8, r9, fp, sp, lr, pc} │ │ - andmi pc, r0, pc, asr #32 │ │ - andsls r4, r6, r0, rrx │ │ - @ instruction: 0xf8dde007 │ │ - bcs 59ad8 │ │ - addshi pc, pc, #0 │ │ - @ instruction: 0xf0003f01 │ │ - @ instruction: 0xf8198276 │ │ - ldmdals sp, {r0, r8, r9, fp, lr}^ │ │ - movtlt r9, #1375 @ 0x55f │ │ - tstcs r1, r5, lsr #16 │ │ - andcc r9, r1, lr, asr fp │ │ - @ instruction: 0xf14a915f │ │ - eorls r0, r5, r0, lsl #20 │ │ - sbcvc lr, ip, pc, asr sl │ │ - @ instruction: 0xf000701c │ │ - ldmdals r6, {r0, r1, r2, r3, r5, r8, sl, pc} │ │ - rsbls r2, r1, r2, lsl #4 │ │ - @ instruction: 0xf8cda860 │ │ - stmib sp, {r7, r8, ip, sp, pc}^ │ │ - ldmdage r8!, {ip} │ │ - @ instruction: 0xf0209920 │ │ - ldmib sp, {r0, r1, r2, r5, r6, r7, r8, fp, ip, sp, lr, pc}^ │ │ - stmdacs r0, {r3, r4, r5, r9} │ │ - ldmdbls sl!, {r0, r2, r4, r6, r7, ip, lr, pc} │ │ - vshr.s8 d18, d1, #8 │ │ - addmi r0, r2, #0 │ │ - subshi pc, pc, #64 @ 0x40 │ │ - ldrsbtgt pc, [r0], -sp @ │ │ - bicle r0, pc, r8, asr #15 │ │ - ldmdage sp, {r0, r1, r2, r3, r7, r9, sp, lr, pc}^ │ │ - @ instruction: 0xf8d2f015 │ │ - ldrsbtgt pc, [r0], -sp @ │ │ - bls 1e39cc │ │ - ldmdbge r8, {r3, r4, r5, fp, sp, pc}^ │ │ - mcr2 0, 6, pc, cr2, cr8, {0} @ │ │ - svcls 0x00249938 │ │ - svcmi 0x0000f1b1 │ │ - strhi pc, [r8, #-0]! │ │ - andls r9, r6, r9, lsr r8 │ │ - stmdacs r0, {r1, r3, r4, r5, fp, ip, pc} │ │ - adchi pc, ip, #0 │ │ - @ instruction: 0xf04f0080 │ │ - andsls r0, r6, r0, lsl #18 │ │ - andmi pc, r0, pc, asr #32 │ │ - beq 644cc │ │ - tstls r5, r6, lsl #24 │ │ - bcs 61ae4 │ │ - sbchi pc, sl, #0 │ │ - stmdbeq r4, {r0, r3, r8, ip, sp, lr, pc} │ │ - strbmi r9, [r8, #-2070] @ 0xfffff7ea │ │ - rsbshi pc, r7, #0 │ │ - andeq lr, r9, r4, lsl #22 │ │ - beq 6511c │ │ - subsls r2, pc, r0 │ │ - beq 10655b4 │ │ - blx 4656ac │ │ - mrc 6, 0, sp, cr0, cr1, {1} │ │ - @ instruction: 0xf0800a10 │ │ - stmdacs r0, {r8, lr} │ │ - bicmi fp, r1, #72, 30 @ 0x120 │ │ - ldmdals sp, {r0, r1, r2, r3, r9, fp, ip, sp, pc}^ │ │ - stmdble sl!, {r0, r1, fp, sp} │ │ - stmdbls r5!, {sp} │ │ - tstcc r1, lr, asr fp │ │ - ldmdbls r4, {r0, r2, r5, r8, ip, pc} │ │ - streq pc, [r0, #-325] @ 0xfffffebb │ │ - andcc r5, r4, pc, lsl r0 │ │ - subsls r0, pc, r9, asr #15 │ │ - strbhi pc, [r4], #0 @ │ │ - andcs sl, r2, #96, 18 @ 0x180000 │ │ - blt 1864258 │ │ - smlabteq r0, sp, r9, lr │ │ - stmdbls r0!, {r3, r4, r5, fp, sp, pc} │ │ - @ instruction: 0xf97ef020 │ │ - ldmib sp, {r2, r5, r8, r9, sl, fp, ip, pc}^ │ │ - stmdacs r0, {r3, r4, r5, r9} │ │ - ldmdbls sl!, {r0, r1, r6, r7, ip, lr, pc} │ │ - vshr.s8 d18, d1, #8 │ │ - addmi r0, r2, #0 │ │ - rsbshi pc, r8, #64 @ 0x40 │ │ - @ instruction: 0xd1bd07c8 │ │ - smladcs r0, r4, r3, lr │ │ - stmdacs r3, {r0, r2, r3, r4, r6, fp, ip, pc} │ │ - ldrdcs sp, [r1], -r4 │ │ - andls r2, r0, r0, lsl #2 │ │ - andcs sl, r4, #6094848 @ 0x5d0000 │ │ - @ instruction: 0xf0252301 │ │ - ldmdals pc, {r0, r2, r3, r4, r5, r8, fp, ip, sp, lr, pc}^ @ │ │ - bls 1e3a98 │ │ - ldmdbge r8, {r3, r4, r5, fp, sp, pc}^ │ │ - mcr2 0, 5, pc, cr4, cr15, {0} @ │ │ - svcls 0x00249938 │ │ - svcmi 0x0000f1b1 │ │ - ldrthi pc, [ip], #0 @ │ │ - andls r9, r6, r9, lsr r8 │ │ - bls 2cfc70 │ │ - @ instruction: 0xf0002800 │ │ - addeq r8, r0, pc, asr #3 │ │ - stmdbeq r0, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ - @ instruction: 0xf04f9016 │ │ - b fe139b9c │ │ - @ instruction: 0x9c060a00 │ │ - and r9, r9, r4, lsl r1 │ │ - bls 2b43a8 │ │ - addhi pc, sl, #0 │ │ - stmdbeq r4, {r0, r3, r8, ip, sp, lr, pc} │ │ - strbmi r9, [r8, #-2070] @ 0xfffff7ea │ │ - andhi pc, ip, #0 │ │ - andvc pc, r9, r4, asr r8 @ │ │ - ldmdals sp, {r8, sp}^ │ │ - stmdacs r3, {r0, r1, r2, r3, r4, r6, r8, ip, pc} │ │ - andeq pc, r0, pc, asr #32 │ │ - blls 17e006c │ │ - smlabbmi r0, r7, r0, pc @ │ │ - andspl fp, r9, r9, lsl #20 │ │ - stmdbls r5!, {r2, ip, sp} │ │ - qaddcc r9, pc, r1 @ │ │ - @ instruction: 0xf1459125 │ │ - ldrbeq r0, [r1, r0, lsl #10] │ │ - ldrbhi pc, [lr], #-0 @ │ │ - andcs sl, r2, #96, 18 @ 0x180000 │ │ - blt 1864324 │ │ - smlabteq r0, sp, r9, lr │ │ - stmdbls r0!, {r3, r4, r5, fp, sp, pc} │ │ - @ instruction: 0xf918f020 │ │ - ldmib sp, {r2, r5, r8, r9, sl, fp, ip, pc}^ │ │ - stmdacs r0, {r3, r4, r5, r9} │ │ - ldmdbls sl!, {r1, r2, r3, r6, r7, ip, lr, pc} │ │ - vshr.s8 d18, d1, #8 │ │ - addmi r0, r2, #0 │ │ - andshi pc, fp, #64 @ 0x40 │ │ - strbeq r9, [r8, sl, lsl #20] │ │ - adcs sp, pc, #200, 2 @ 0x32 │ │ - andcs r2, r4, #1 │ │ - ldmdage sp, {ip, pc}^ │ │ - @ instruction: 0xf0252301 │ │ - bls 2e7f98 │ │ - @ instruction: 0xe7cc985f │ │ - ldmdage r8!, {r1, r2, r9, fp, ip, pc} │ │ - @ instruction: 0xf018a958 │ │ - ldmdbls r8!, {r0, r1, r2, r3, r6, r9, sl, fp, ip, sp, lr, pc} │ │ - @ instruction: 0xf1b19f24 │ │ - @ instruction: 0xf0004f00 │ │ - ldmdals r9!, {r0, r2, r3, r6, sl, pc} │ │ - ldmdals sl!, {r1, r2, ip, pc} │ │ - @ instruction: 0xf0002800 │ │ - @ instruction: 0xf8dd81d9 │ │ - sbceq sl, r0, r8, lsl r0 │ │ - @ instruction: 0xf04f9005 │ │ - @ instruction: 0xf04f4000 │ │ - rsbmi r0, r0, r0, lsl #18 │ │ - andls r9, fp, r4, lsl #2 │ │ - svclt 0x0000e00b │ │ - @ instruction: 0xfffed19a │ │ - @ instruction: 0xf0002a00 │ │ - @ instruction: 0xf109823c │ │ - stmdals r5, {r3, r8, fp} │ │ - @ instruction: 0xf0004548 │ │ - bl 2ca358 │ │ - ldcl 0, cr0, [r0, #36] @ 0x24 │ │ - andcs r0, r0, r0, lsl #22 │ │ - mrc 0, 7, r9, cr4, cr15, {2} │ │ - vneg.f64 d16, d16 │ │ - @ instruction: 0xd63afa10 │ │ - blne c64ddc │ │ - svclt 0x00482800 │ │ - blt 3fabc8 │ │ - tstpmi r0, pc, asr #32 @ p-variant is OBSOLETE │ │ - @ instruction: 0xf04fbf48 │ │ - strdmi r3, [r8], #-31 @ 0xffffffe1 │ │ - ldmdals sp, {r2, r9, fp, ip, sp, pc}^ │ │ - stmdble pc!, {r0, r1, r2, fp, sp} @ │ │ - blls 17b1cbc │ │ - andspl r1, ip, r9, lsl r8 │ │ - subvs r3, pc, r8 │ │ - subsls r9, pc, r5, lsr #18 │ │ - @ instruction: 0x91253101 │ │ - @ instruction: 0xf1459916 │ │ - strbeq r0, [r9, r0, lsl #10] │ │ - mvnhi pc, #0 │ │ - andcs r9, r2, #180224 @ 0x2c000 │ │ - stmdbge r0!, {r0, r5, r6, r8, ip, pc}^ │ │ - orrlt pc, r0, sp, asr #17 │ │ - smlabteq r0, sp, r9, lr │ │ - stmdbls r0!, {r3, r4, r5, fp, sp, pc} │ │ - @ instruction: 0xf89ef020 │ │ - ldmib sp, {r2, r5, r8, r9, sl, fp, ip, pc}^ │ │ - stmdacs r0, {r3, r4, r5, r9} │ │ - ldmdbls sl!, {r1, r3, r4, r5, r7, ip, lr, pc} │ │ - vshr.s8 d18, d1, #8 │ │ - addmi r0, r2, #0 │ │ - bichi pc, r1, r0, asr #32 │ │ - @ instruction: 0xd1b407c8 │ │ - strcs lr, [r0], #-602 @ 0xfffffda6 │ │ - ldmdals sp, {r8, r9, sl, sp}^ │ │ - stmiale pc, {r0, r1, r2, fp, sp}^ @ │ │ - tstcs r0, r1 │ │ - ldmdage sp, {ip, pc}^ │ │ - movwcs r2, #4616 @ 0x1208 │ │ - @ instruction: 0xf85cf025 │ │ - @ instruction: 0xe7c6985f │ │ - ldmdage r8!, {r1, r2, r9, fp, ip, pc} │ │ - @ instruction: 0xf018a958 │ │ - ldmdals r8!, {r0, r2, r4, r5, r9, sl, fp, ip, sp, lr, pc} │ │ - svcmi 0x0000f1b0 │ │ - bichi pc, ip, #0 │ │ - ldmib sp, {r0, r1, ip, pc}^ │ │ - stmdacs r0, {r0, r3, r4, r5, ip, sp, lr} │ │ - @ instruction: 0xf0009706 │ │ - bl 20a0b0 │ │ - andls r0, r4, r0, asr #1 │ │ - @ instruction: 0xf890981f │ │ - andls r0, fp, r8, lsr #32 │ │ - andmi pc, r0, pc, asr #32 │ │ - stcls 0, cr4, [r0], #-384 @ 0xfffffe80 │ │ - and r9, r7, r5 │ │ - @ instruction: 0xf0002a00 │ │ - @ instruction: 0x370881d7 │ │ - addmi r9, r7, #4, 16 @ 0x40000 │ │ - sbchi pc, r3, r0 │ │ - andne lr, r0, #3522560 @ 0x35c000 │ │ - @ instruction: 0xf1b92000 │ │ - subsls r0, pc, r2, lsl #30 │ │ - @ instruction: 0x4608d115 │ │ - bls 2fb5d0 │ │ - stmib sp, {sl, sp}^ │ │ - @ instruction: 0xf0254400 │ │ - bls 17a7ed4 │ │ - ldmdble r3!, {r0, r1, r2, r9, fp, sp} │ │ - blt 290b18 │ │ - tstpl r9, r0, lsl #20 │ │ - subvs r1, r8, r9, lsl r9 │ │ - andeq pc, r8, r4, lsl #2 │ │ - stcls 0, cr9, [r0], #-380 @ 0xfffffe84 │ │ - blls 321dc8 │ │ - @ instruction: 0xf025a85d │ │ - ldmib sp, {r0, r1, r3, r4, r5, r6, r7, r9, sl, fp, ip, sp, lr, pc}^ │ │ - stmdbls r5!, {r1, r2, r3, r4, r6, ip, sp} │ │ - @ instruction: 0x91253101 │ │ - streq pc, [r0, #-325] @ 0xfffffebb │ │ - bicvc lr, sl, pc, asr sl │ │ - msrhi SPSR_fx, #0 │ │ - andcs r9, r2, #81920 @ 0x14000 │ │ - stmdbge r0!, {r0, r5, r6, r8, ip, pc}^ │ │ - orrlt pc, r0, sp, asr #17 │ │ - smlabteq r0, sp, r9, lr │ │ - @ instruction: 0x4621a838 │ │ - @ instruction: 0xf822f020 │ │ - eorseq lr, r8, #3620864 @ 0x374000 │ │ - adcsle r2, fp, r0, lsl #16 │ │ - andscs r9, r1, sl, lsr r9 │ │ - andeq pc, r0, r8, asr #5 │ │ - @ instruction: 0xf0404282 │ │ - strbeq r8, [r8, pc, asr #2] │ │ - ldrh sp, [r1, #21]! │ │ - eorls r2, r7, r1, lsl #4 │ │ - andls sl, r0, #6094848 @ 0x5d0000 │ │ - tstcs r0, ip, lsl #12 │ │ - movwcs r2, #4616 @ 0x1208 │ │ - @ instruction: 0xffe4f024 │ │ - stmdals r7!, {r0, r5, r9, sl, lr} │ │ - sbfx r9, pc, #24, #30 │ │ - ldmdage r8!, {r1, r2, r9, fp, ip, pc} │ │ - @ instruction: 0xf018a958 │ │ - ldmdbls r8!, {r0, r1, r2, r3, r5, r7, r9, fp, ip, sp, lr, pc} │ │ - @ instruction: 0xf1b19f24 │ │ - @ instruction: 0xf0004f00 │ │ - ldmdals r9!, {r0, r3, r4, r6, r8, r9, pc} │ │ - ldmdals sl!, {r1, r2, ip, pc} │ │ - @ instruction: 0xf0002800 │ │ - @ instruction: 0xf8dd80e1 │ │ - sbceq sl, r0, r8, lsl r0 │ │ - @ instruction: 0xf04f900b │ │ - @ instruction: 0xf04f4000 │ │ - rsbmi r0, r0, r0, lsl #18 │ │ - andsls r9, r6, r5, lsl #2 │ │ - bcs 61e7c │ │ - cmnphi r5, r0 @ p-variant is OBSOLETE │ │ - stmdbeq r8, {r0, r3, r8, ip, sp, lr, pc} │ │ - strbmi r9, [r8, #-2059] @ 0xfffff7f5 │ │ - sbchi pc, r5, r0 │ │ - tsteq r9, sl, lsl #22 │ │ - andvc pc, r9, sl, asr r8 @ │ │ - stmdavs ip, {r0, r2, r3, r4, r6, fp, ip, pc}^ │ │ - stmdacs r7, {r8, sp} │ │ - andeq pc, r0, pc, asr #32 │ │ - pushle {r0, r1, r2, r3, r4, r6, r8, ip, pc} │ │ - tstpmi r0, pc, asr #32 @ p-variant is OBSOLETE │ │ - rsbmi r9, r1, lr, asr fp │ │ - blt 298778 │ │ - ldmdane r9, {r0, r3, r4, ip, lr} │ │ - subvs r3, sl, r8 │ │ - subsls r9, pc, r5, lsr #18 │ │ - @ instruction: 0x91253101 │ │ - @ instruction: 0xf1459915 │ │ - strbeq r0, [r9, r0, lsl #10] │ │ - rscshi pc, ip, #0 │ │ - andcs r9, r2, #360448 @ 0x58000 │ │ - stmdbge r0!, {r0, r5, r6, r8, ip, pc}^ │ │ - orrlt pc, r0, sp, asr #17 │ │ - smlabteq r0, sp, r9, lr │ │ - stmdbls r0!, {r3, r4, r5, fp, sp, pc} │ │ - @ instruction: 0xffb4f01f │ │ - eorseq lr, r8, #3620864 @ 0x374000 │ │ - sbcle r2, r6, r0, lsl #16 │ │ - andscs r9, r1, sl, lsr r9 │ │ - andeq pc, r0, r8, asr #5 │ │ - @ instruction: 0xf0404282 │ │ - strbeq r8, [r8, sl, ror #1] │ │ - orrs sp, r7, r0, asr #3 │ │ - andcs r2, r8, #1 │ │ - ldmdage sp, {ip, pc}^ │ │ - @ instruction: 0xf0242301 │ │ - ldmdals pc, {r0, r3, r4, r5, r6, r8, r9, sl, fp, ip, sp, lr, pc}^ @ │ │ - @ instruction: 0xf8dde7c8 │ │ - svcls 0x00249074 │ │ - @ instruction: 0xb114e9dd │ │ - stmdals r3, {r1, r4, r7, sp, lr, pc} │ │ - stmdacs r0, {r0, r1, r2, r5, r8, sl, ip, pc} │ │ - ldrsbtls pc, [r4], #-141 @ 0xffffff73 @ │ │ - strvc lr, [r4, #-2525]! @ 0xfffff623 │ │ - @ instruction: 0xf8cde07e │ │ - @ instruction: 0xf04fa09c │ │ - @ instruction: 0xf04f0e01 │ │ - tstcs r1, r1, lsl #22 │ │ - @ instruction: 0xf04f2301 │ │ - @ instruction: 0xf8dd0a01 │ │ - ldmib sp, {r2, r4, r5, r6, ip, pc}^ │ │ - rsbs r7, fp, r4, lsr #10 │ │ - ldrsblt pc, [r0], #-141 @ 0xffffff73 @ │ │ - ldmdals fp!, {r0, r1, r2, r4, r6, sp, lr, pc} │ │ - cdpeq 0, 0, cr15, cr1, cr15, {2} │ │ - @ instruction: 0xf04f9009 │ │ - ldmdals ip!, {r0, r8, r9, fp} │ │ - andls r2, r8, r1, lsl #6 │ │ - tstls fp, r8, lsl #20 │ │ - @ instruction: 0xf8cd2101 │ │ - mulls r7, ip, r0 │ │ - ldrsbtls pc, [r4], #-141 @ 0xffffff73 @ │ │ - strvc lr, [r4, #-2525]! @ 0xfffff623 │ │ - andscs lr, r4, lr, ror r1 │ │ - addsge pc, ip, sp, asr #17 │ │ - mcrr 0, 10, pc, r8, cr14 @ │ │ - ldrsbtls pc, [r4], #-141 @ 0xffffff73 @ │ │ - ldmib sp, {fp, sp}^ │ │ - @ instruction: 0xf0007524 │ │ - stmibmi r6, {r0, r1, r2, r3, r6, r7, r9, pc}^ │ │ - andls r2, fp, #20, 4 @ 0x40000001 │ │ - andls r4, r9, r9, ror r4 │ │ - blx 9a622c │ │ - @ instruction: 0xf04f2011 │ │ - vmull.p8 q8, d8, d1 │ │ - svcne 0x00020000 │ │ - @ instruction: 0xf04f2000 │ │ - andls r0, r7, r1, lsl #22 │ │ - tstcs r1, r4, lsl r0 │ │ - andls r2, r8, r1, lsl #6 │ │ - andscs lr, r1, #92, 2 │ │ - @ instruction: 0xf8cd2000 │ │ - @ instruction: 0xf04fa09c │ │ - andls r0, fp, r1, lsl #28 │ │ - bleq a60ec │ │ - movwcs r2, #4353 @ 0x1101 │ │ - andeq pc, r0, #200, 4 @ 0x8000000c │ │ - ldrsbtls pc, [r4], #-141 @ 0xffffff73 @ │ │ - strvc lr, [r4, #-2525]! @ 0xfffff623 │ │ - andcs lr, r1, ip, asr #2 │ │ - stmib sp, {r0, r1, r2, r5, r8, sl, ip, pc}^ │ │ - @ instruction: 0xf04f0015 │ │ - ands r0, r8, r1, lsl #20 │ │ - strls r2, [r7, #-1]! │ │ - bleq a6114 │ │ - andseq lr, r5, sp, asr #19 │ │ - beq a611c │ │ - @ instruction: 0xf8dd9914 │ │ - stcls 0, cr9, [r5, #-464]! @ 0xfffffe30 │ │ - muls r5, r9, r9 │ │ - @ instruction: 0xf04f9527 │ │ - stmdbls r4, {r0, r9, fp} │ │ - andcs lr, r1, r6 │ │ - andsls r9, r6, r7, lsr #10 │ │ - beq a613c │ │ - stmdbls r5, {r2, r5, r8, r9, sl, fp, ip, pc} │ │ - ldrsbtls pc, [r4], #-141 @ 0xffffff73 @ │ │ - @ instruction: 0x9d252900 │ │ - ldrsblt pc, [r0], #-141 @ 0xffffff73 @ │ │ - stmdals r6, {r1, ip, lr, pc} │ │ - bl ff5e62d0 │ │ - ldrsbtgt pc, [r0], -sp @ │ │ - ldrd pc, [r8], -sp @ │ │ - tstne r5, #3620864 @ 0x374000 │ │ - ldmdals sp, {r0, r9, sp}^ │ │ - andscs r9, r1, #-1342177280 @ 0xb0000000 │ │ - andeq pc, r0, #200, 4 @ 0x8000000c │ │ - @ instruction: 0xf0402800 │ │ - strt r8, [pc], #281 @ 2a038 │ │ - andls r9, r9, fp, lsr r8 │ │ - andls r9, r8, ip, lsr r8 │ │ - strls r0, [r7, #-2568]! @ 0xfffff5f8 │ │ - andls r9, r7, fp, lsl #2 │ │ - ldmdals fp!, {r2, r3, r4, r7, sp, lr, pc} │ │ - ldmdals ip!, {r0, r3, ip, pc} │ │ - beq 24e074 │ │ - tstls fp, r7, lsr #10 │ │ - adc r9, r5, r7 │ │ - strls r2, [r7, #-20]! @ 0xffffffec │ │ - bl ff26631c │ │ - @ instruction: 0xf0002800 │ │ - stmibmi r9, {r0, r1, r4, r6, r9, pc} │ │ - andls r2, fp, #20, 4 @ 0x40000001 │ │ - andls r4, r9, r9, ror r4 │ │ - @ instruction: 0xf9a9f0ab │ │ - vshr.s8 d18, d1, #8 │ │ - svcne 0x00020000 │ │ - andls r2, r7, r0 │ │ - andls r2, r8, r4, lsl r0 │ │ - ldmdals fp!, {r2, r3, r4, r5, r6, sp, lr, pc} │ │ - ldmdals ip!, {r0, r3, ip, pc} │ │ - beq 24e0b4 │ │ - tstls fp, r7, lsr #10 │ │ - adds r9, r9, r7 │ │ - andls r9, r9, fp, lsr r8 │ │ - andls r9, r8, ip, lsr r8 │ │ - strls r0, [r7, #-2568]! @ 0xfffff5f8 │ │ - andls r9, r7, fp, lsl #2 │ │ - ldmdals fp!, {r1, r5, r7, sp, lr, pc} │ │ - ldmdals ip!, {r0, r3, ip, pc} │ │ - beq 24e0d8 │ │ - tstls fp, r7, lsr #10 │ │ - adc r9, sp, r7 │ │ - strls r2, [r7, #-20]! @ 0xffffffec │ │ - bl fe5e6380 │ │ - @ instruction: 0xf0002800 │ │ - ldmdbmi r1!, {r0, r5, r9, pc}^ │ │ - andls r2, fp, #20, 4 @ 0x40000001 │ │ - andls r4, r9, r9, ror r4 │ │ - @ instruction: 0xf977f0ab │ │ - vshr.s8 d18, d1, #8 │ │ - svcne 0x00020000 │ │ - andls r2, r7, r0 │ │ - andls r2, r8, r4, lsl r0 │ │ - andscs lr, r4, ip, asr r0 │ │ - @ instruction: 0xf0ae9527 │ │ - stmdacs r0, {r7, r8, r9, fp, sp, lr, pc} │ │ - andhi pc, sl, #0 │ │ - andscs r4, r4, #1671168 @ 0x198000 │ │ - ldrbtmi r9, [r9], #-523 @ 0xfffffdf5 │ │ - @ instruction: 0xf0ab9009 │ │ - andscs pc, r1, r0, ror #18 │ │ - andeq pc, r0, r8, asr #5 │ │ - andcs r1, r0, r2, lsl #30 │ │ - andscs r9, r4, r7 │ │ - subs r9, r9, r8 │ │ - strls r2, [r7, #-20]! @ 0xffffffec │ │ - bl 1a663dc │ │ - @ instruction: 0xf0002800 │ │ - ldmdbmi ip, {r0, r1, r4, r5, r6, r7, r8, pc}^ │ │ - andls r2, fp, #20, 4 @ 0x40000001 │ │ - andls r4, r9, r9, ror r4 │ │ - @ instruction: 0xf949f0ab │ │ - vshr.s8 d18, d1, #8 │ │ - svcne 0x00020000 │ │ - andls r2, r7, r0 │ │ - andls r2, r8, r4, lsl r0 │ │ - andscs lr, r4, r4, asr r0 │ │ - @ instruction: 0xf0ae9527 │ │ - stmdacs r0, {r1, r4, r6, r8, r9, fp, sp, lr, pc} │ │ - bicshi pc, ip, r0 │ │ - andscs r4, r4, #1327104 @ 0x144000 │ │ - ldrbtmi r9, [r9], #-523 @ 0xfffffdf5 │ │ - @ instruction: 0xf0ab9009 │ │ - andscs pc, r1, r2, lsr r9 @ │ │ - andeq pc, r0, r8, asr #5 │ │ - andcs r1, r0, r2, lsl #30 │ │ - andscs r9, r4, r7 │ │ - subs r9, r1, r8 │ │ - andcs r2, r0, r1, lsl r2 │ │ - andeq pc, r0, #200, 4 @ 0x8000000c │ │ - andls r9, fp, r7, lsr #10 │ │ - @ instruction: 0xf04f9805 │ │ - @ instruction: 0xf8dd0b01 │ │ - stcls 0, cr9, [r5, #-464]! @ 0xfffffe30 │ │ - @ instruction: 0xf8dd2800 │ │ - @ instruction: 0xf8ddc030 │ │ - ands lr, r0, r8, lsr #32 │ │ - andcs r2, r0, r1, lsl r2 │ │ - andeq pc, r0, #200, 4 @ 0x8000000c │ │ - andls r9, fp, r7, lsr #10 │ │ - @ instruction: 0xf04f9814 │ │ - @ instruction: 0xf8dd0e01 │ │ - @ instruction: 0xf04f9074 │ │ - fstmdbxls r5!, {d0-d-1} @ Deprecated │ │ - @ instruction: 0xf8dd2800 │ │ - @ instruction: 0xf04fc030 │ │ - eors r0, r8, r1, lsl #2 │ │ - andcs r2, r0, r1, lsl r2 │ │ - andeq pc, r0, #200, 4 @ 0x8000000c │ │ - andls r9, fp, r7, lsr #10 │ │ - ldrsbtls pc, [r4], #-141 @ 0xffffff73 @ │ │ - stcls 3, cr2, [r5, #-4]! │ │ - ldrsbtgt pc, [r0], -sp @ │ │ - ldrd pc, [r8], -sp @ │ │ - @ instruction: 0xb114e9dd │ │ - ands r9, r1, r4, lsl #16 │ │ - andcs r2, r0, r1, lsl r2 │ │ - andeq pc, r0, #200, 4 @ 0x8000000c │ │ - andls r9, fp, r7, lsr #10 │ │ - ldrsbtls pc, [r4], #-141 @ 0xffffff73 @ │ │ - strvc lr, [r4, #-2525]! @ 0xfffff623 │ │ - ldrsbtgt pc, [r0], -sp @ │ │ - ldrd pc, [r8], -sp @ │ │ - @ instruction: 0xb114e9dd │ │ - stmdals r3, {r1, r2, r4, r8, r9, fp, ip, pc} │ │ - strht fp, [r5], -r0 │ │ - andcs r2, r0, r1, lsl r2 │ │ + @ instruction: 0xf018447b │ │ + svclt 0x0000fb69 │ │ + andeq r3, fp, r4, ror #8 │ │ + @ instruction: 0xb088b5b0 │ │ + ldmib r1, {r0, r2, r9, sl, lr}^ │ │ + strmi r0, [ip], -r0, lsl #6 │ │ + @ instruction: 0xce03e9d1 │ │ + stm sp, {r0, r3, r7, r8, fp, sp, lr} │ │ + stmdage r4, {r0, r3, ip, lr} │ │ + @ instruction: 0xfff8f02c │ │ + andscs r9, r1, #4, 18 @ 0x10000 │ │ + mulseq r4, sp, r8 │ │ andeq pc, r0, #200, 4 @ 0x8000000c │ │ - andls r9, fp, r7, lsr #10 │ │ - tstcs r1, r5, lsl #16 │ │ - ldrsbtls pc, [r4], #-141 @ 0xffffff73 @ │ │ - strvc lr, [r4, #-2525]! @ 0xfffff623 │ │ - @ instruction: 0xf8dd2800 │ │ - @ instruction: 0xf8ddc030 │ │ - @ instruction: 0xf8dde028 │ │ - @ instruction: 0xf04fb050 │ │ - andle r0, pc, r1, lsl #6 │ │ - ldrmi r9, [r2], r6, lsl #16 │ │ - tstlt r4, sp, asr #19 │ │ - tstls r6, #254803968 @ 0xf300000 │ │ - b fef66504 │ │ - ldmib sp, {r1, r2, r3, r4, r6, r7, r9, sl, lr}^ │ │ - @ instruction: 0xf8dd1315 │ │ - @ instruction: 0x4652b050 │ │ - ldrsbtgt pc, [r0], -sp @ │ │ - @ instruction: 0xf04f985d │ │ - stmdacs r0, {r0, r9, fp} │ │ - blge fe667364 │ │ - stmib sp, {r1, r2, r3, r4, r6, fp, ip, pc}^ │ │ - usatmi fp, #19, r4, lsl #2 │ │ - tstls r6, #1342177282 @ 0x50000002 │ │ - b fe9e6530 │ │ - bls 97bdf4 │ │ - tstne r5, #3620864 @ 0x374000 │ │ - ldrsblt pc, [r0], #-141 @ 0xffffff73 @ │ │ - ldrsbtgt pc, [r0], -sp @ │ │ - bllt fe1e8288 │ │ - @ instruction: 0xfffecb80 │ │ - @ instruction: 0xfffeca88 │ │ - @ instruction: 0xfffeca24 │ │ - @ instruction: 0xfffec9f6 │ │ - @ instruction: 0xfffec9c8 │ │ - @ instruction: 0xfffec99a │ │ - blcs 3683e8 │ │ - bcs 386dc │ │ - teqphi r4, r0, asr #32 @ p-variant is OBSOLETE │ │ - mvnsle r2, r0, lsl #18 │ │ - andcs r2, r0, r0, lsl #10 │ │ - ldmdals r6!, {r0, r1, r2, r5, ip, pc} │ │ - teqcs r0, r8, lsr ip │ │ - strtmi r6, [r0], -r6, lsl #16 │ │ - @ instruction: 0xff65f0aa │ │ - @ instruction: 0x46309913 │ │ - teqcs r0, #35651584 @ 0x2200000 │ │ - ldcl 0, cr15, [lr, #472]! @ 0x1d8 │ │ - ldrdeq lr, [r0, #-157] @ 0xffffff63 │ │ - bls 9f3b20 │ │ - streq pc, [r0], -r8, asr #5 │ │ - ldrdge pc, [r8], sp │ │ - subsmi r4, r1, r8, rrx │ │ - movwmi r4, #34356 @ 0x8634 │ │ - andscs sp, r5, r1, lsl r0 │ │ - b fe0665ac │ │ - @ instruction: 0xf0002800 │ │ - stmibmi r2!, {r0, r1, r8, pc} │ │ - andsls r2, r1, #1342177281 @ 0x50000001 │ │ - andsls r4, sl, r9, ror r4 │ │ - @ instruction: 0xf861f0ab │ │ - andcs r1, r0, r4, lsr pc │ │ - andscs r9, r5, r0, lsl r0 │ │ - stmdage r8, {r0, r1, r2, r3, ip, pc}^ │ │ - mcr2 0, 2, pc, cr2, cr13, {0} @ │ │ - stmdacs r0, {r3, r6, fp, ip, pc} │ │ - stmdals r9, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ - bl 1ce64ec │ │ - adcsmi r9, r4, #425984 @ 0x68000 │ │ - addshi pc, r0, r0, asr #32 │ │ - ldmdbeq r0!, {r0, r3, r8, ip, sp, lr, pc} │ │ - tstls sl, r2, lsl r8 │ │ - @ instruction: 0xf47f4581 │ │ - ldmdage r2, {r1, r2, r4, r9, fp, sp, pc}^ │ │ - andvs pc, r0, sl, asr #17 │ │ - mcr2 0, 1, pc, cr12, cr13, {0} @ │ │ - ldrdhi pc, [ip], sp │ │ - @ instruction: 0xf8ddad38 │ │ - ldmdals r2, {r3, r4, r7, ip, pc}^ │ │ - eors fp, r0, r0, ror fp │ │ - ldrcs r2, [fp, #-27] @ 0xffffffe5 │ │ - b 1366614 │ │ - @ instruction: 0xf0002800 │ │ - ldmibmi r0, {r0, r1, r4, r6, r7, pc} │ │ - @ instruction: 0x4604221b │ │ - @ instruction: 0xf0ab4479 │ │ - svcne 0x0030f82e │ │ - stmib sl, {r0, r5, r9, sl, lr}^ │ │ - ands r0, r3, r0, lsl #10 │ │ - smlaleq pc, r7, sp, r8 @ │ │ - @ instruction: 0xf8bd46a1 │ │ - ldcls 0, cr7, [fp, #-916]! @ 0xfffffc6c │ │ - b 1210870 │ │ - @ instruction: 0xf8dd4000 │ │ - @ instruction: 0xf8aa808c │ │ - stceq 0, cr0, [r0], {5} │ │ - andcc pc, r4, sl, lsl #17 │ │ - andcs pc, r0, sl, asr #17 │ │ - andeq pc, r7, sl, lsl #17 │ │ - stmib sl, {r1, r4, r6, fp, sp, pc}^ │ │ - @ instruction: 0xf01d1502 │ │ - ldmdals r2, {r0, r3, r4, r5, r6, r7, r8, sl, fp, ip, sp, lr, pc}^ │ │ - tstlt r0, r8, lsr sp │ │ - @ instruction: 0xf0729853 │ │ - @ instruction: 0xf8d8eb2a │ │ - stmdacs r0, {r6} │ │ - @ instruction: 0xf04fd176 │ │ - stcge 0, cr3, [r8], #-1020 @ 0xfffffc04 │ │ - subeq pc, r0, r8, asr #17 │ │ - stclgt 6, cr4, [lr], {40} @ 0x28 │ │ - stclgt 0, cr12, [lr], {206} @ 0xce │ │ - strtmi ip, [r9], -lr, asr #1 │ │ - smlalne lr, ip, r4, r8 │ │ - rscne lr, ip, r0, lsl #17 │ │ - @ instruction: 0xf021a848 │ │ - bge 1268990 │ │ - @ instruction: 0x4611e9d8 │ │ - ldrdpl pc, [ip], #-136 @ 0xffffff78 │ │ - @ instruction: 0xf1b4ca07 │ │ - blls 67dff4 │ │ - andle ip, ip, r7, lsl #6 │ │ - @ instruction: 0x4637b135 │ │ - bleq 16855c │ │ - bl e65cc │ │ - mvnsle r3, r1, lsl #26 │ │ - svclt 0x001c2c00 │ │ - @ instruction: 0xf0ae4630 │ │ - @ instruction: 0xf8d8e9da │ │ - andcc r0, r1, r0, asr #32 │ │ - subeq pc, r0, r8, asr #17 │ │ - strpl lr, [r3], #-2521 @ 0xfffff627 │ │ - stcne 1, cr11, [lr, #-336]! @ 0xfffffeb0 │ │ - stceq 8, cr15, [r4], {86} @ 0x56 │ │ - svclt 0x001c2800 │ │ - @ instruction: 0xf0ae6830 │ │ - strcc lr, [ip], -sl, asr #19 │ │ - mvnsle r3, r1, lsl #24 │ │ - ldrdeq pc, [r8], -r9 │ │ - svclt 0x001c2800 │ │ - @ instruction: 0xf0ae4628 │ │ - rsblt lr, r3, r0, asr #19 │ │ - svchi 0x00f0e8bd │ │ - ldmib sp, {r0, r4, fp, ip, pc}^ │ │ - @ instruction: 0xf8dd520f │ │ - @ instruction: 0xf8dd808c │ │ - sbclt r9, r0, #152 @ 0x98 │ │ - andcs lr, r2, r0, asr #20 │ │ - andmi lr, r0, sl, asr #19 │ │ - @ instruction: 0xf8dde79c │ │ - strtmi r8, [r1], ip, lsl #1 │ │ - @ instruction: 0xf47f42b2 │ │ - @ instruction: 0xf7ffa91f │ │ - stmdage r8, {r0, r1, r2, r4, r6, r8, fp, ip, sp, pc}^ │ │ - @ instruction: 0xf01d4614 │ │ - stmdals r8, {r0, r1, r2, r3, r7, r8, sl, fp, ip, sp, lr, pc}^ │ │ - svclt 0x001c2800 │ │ - @ instruction: 0xf0729849 │ │ - ldmib sp, {r6, r7, r9, fp, sp, lr, pc}^ │ │ - stmdbls r9, {r1, r5, fp, sp, pc} │ │ - @ instruction: 0x9098f8dd │ │ - strcs lr, [r7, #-2525] @ 0xfffff623 │ │ - ldrb r9, [lr, fp, lsl #16] │ │ - ldrbtmi r4, [r8], #-2115 @ 0xfffff7bd │ │ - @ instruction: 0xff46f016 │ │ - ldrbtmi r4, [r8], #-2114 @ 0xfffff7be │ │ - blx ff266500 │ │ - ldrbtmi r4, [r8], #-2110 @ 0xfffff7c2 │ │ - @ instruction: 0xff3ef016 │ │ - ldmdage ip, {r3, r4, r5, r8, fp, lr}^ │ │ - ldrbtmi r4, [r9], #-2616 @ 0xfffff5c8 │ │ - @ instruction: 0xf016447a │ │ - blmi 1069b30 │ │ - @ instruction: 0xf015447b │ │ - stmdami pc!, {r0, r4, r5, r6, r9, fp, ip, sp, lr, pc} @ │ │ - bmi bf2970 │ │ - ldrbtmi r4, [sl], #-1144 @ 0xfffffb88 │ │ - blx fef6652c │ │ - ldrbtmi r4, [r8], #-2105 @ 0xfffff7c7 │ │ - blx febe6534 │ │ - ldrbtmi r4, [r8], #-2102 @ 0xfffff7ca │ │ - blx feae653c │ │ - ldrbtmi r4, [r8], #-2099 @ 0xfffff7cd │ │ - blx fe9e6544 │ │ - ldrbtmi r4, [r8], #-2088 @ 0xfffff7d8 │ │ - blx fe8e654c │ │ - ldrbtmi r4, [r8], #-2094 @ 0xfffff7d2 │ │ - blx fe7e6554 │ │ - tstcs r5, r1 │ │ - ldc2l 0, cr15, [r0, #-76] @ 0xffffffb4 │ │ - tstcs fp, r1 │ │ - stc2l 0, cr15, [ip, #-76] @ 0xffffffb4 │ │ - tstcs r4, r1 │ │ - stc2l 0, cr15, [r8, #-76] @ 0xffffffb4 │ │ - ldccs 8, cr15, [r0], {80} @ 0x50 │ │ - subsmi pc, r5, r7, asr #12 │ │ - subvc pc, sl, r7, asr #13 │ │ - ldmdavs r1, {r0, r1, r2, r4, r8, r9, fp, ip, pc} │ │ - andsmi r4, r8, r8, asr #6 │ │ - addmi r9, r3, #24, 22 @ 0x6000 │ │ - bl 6099c │ │ - blls 86a638 │ │ - bl 104684 │ │ - ldmib r0, {r7}^ │ │ - bl eb148 │ │ - sbcseq r0, fp, r3, asr #6 │ │ - ldm r0!, {r0, r1, r4, r6, r8, ip, sp, pc}^ │ │ - blcc 647d68 │ │ - submi r4, pc, r6, asr r0 @ │ │ - mvnsle r4, r7, lsr r3 │ │ - ldrbtmi r4, [r8], #-2056 @ 0xfffff7f8 │ │ - blx 1be65b4 │ │ - ldrbtmi r4, [r8], #-2063 @ 0xfffff7f1 │ │ - blx 1ae65bc │ │ - ldmdbls r8, {r0, r2, r9, fp, lr} │ │ - @ instruction: 0xf015447a │ │ - stmdami r7, {r0, r1, r7, r9, fp, ip, sp, lr, pc} │ │ - @ instruction: 0xf0154478 │ │ - svclt 0x0000fa61 │ │ - andeq r0, fp, r6, asr #15 │ │ - andeq r0, fp, r4, asr #10 │ │ - @ instruction: 0xfffec7e0 │ │ - @ instruction: 0xfffeef81 │ │ - andeq r0, fp, lr, asr #17 │ │ - andeq r0, fp, ip, asr #15 │ │ - andeq r0, fp, lr, ror #16 │ │ - @ instruction: 0xfffebd8e │ │ - andeq r0, fp, r4, ror r8 │ │ - andeq r0, fp, lr, ror #16 │ │ - @ instruction: 0xfffec6b0 │ │ - andeq r0, fp, r2, lsl #16 │ │ - andeq r0, fp, r2, lsl #16 │ │ - andeq r0, fp, sl, lsr #13 │ │ - andeq r0, fp, r6, asr r8 │ │ - andeq r0, fp, r6, lsl #17 │ │ - muleq fp, lr, r8 │ │ - @ instruction: 0x000b08b6 │ │ - andeq r0, fp, ip, ror #21 │ │ - @ instruction: 0xb086b5b0 │ │ - ldrdpl lr, [r0, -r1] │ │ - ldmib r5, {r2, r9, sl, lr}^ │ │ - stmib sp, {r8, r9}^ │ │ - stmdage r2, {r8, r9} │ │ - @ instruction: 0xf8aaf02a │ │ - andeq lr, r2, #3620864 @ 0x374000 │ │ - stmdbls r4, {r0, r4, r8, r9, sp} │ │ - movweq pc, #712 @ 0x2c8 @ │ │ - @ instruction: 0xd1084298 │ │ - bcs 4289c │ │ - ldrmi fp, [r1], -r8, lsl #30 │ │ - rscvs r4, fp, fp, lsl #12 │ │ - andlt r6, r6, r0, lsr #32 │ │ - blls 199cc4 │ │ - stmib r4, {r0, r2, r5, r9, sl, lr}^ │ │ - rscvs r2, fp, r1, lsl #2 │ │ - andlt r6, r6, r0, lsr #32 │ │ - strlt fp, [r0, #3504] @ 0xdb0 │ │ - @ instruction: 0xf86ef00c │ │ - stclt 0, cr2, [r0, #4] │ │ - svcmi 0x00f0e92d │ │ - andls fp, r2, r7, lsl #1 │ │ - beq 4a6f28 │ │ - strmi r6, [r9], r8, asr #16 │ │ - beq 67150 │ │ - @ instruction: 0xf8d9b1e8 │ │ - @ instruction: 0xf10d4000 │ │ - @ instruction: 0xf8d90b0c │ │ - ldrmi r7, [r6], -r8 │ │ - stmiaeq r0, {r0, r1, r2, r3, r6, r9, fp, sp, lr, pc}^ │ │ - ldmib r4, {r8, sl, sp}^ │ │ - ldrtmi r0, [r2], -r0, lsl #2 │ │ - smlabteq r0, sp, r9, lr │ │ - @ instruction: 0x46394658 │ │ - ldc2l 0, cr15, [r2, #168] @ 0xa8 │ │ - ldrbmi r9, [r0, #-2051] @ 0xfffff7fd │ │ - @ instruction: 0xf89dd111 │ │ - strcc r0, [r8], #-16 │ │ - stmdaeq r8, {r3, r4, r5, r7, r8, ip, sp, lr, pc} │ │ - mvnle r4, r5, lsl #8 │ │ - strcs lr, [r0, #-0] │ │ - ldrdeq pc, [ip], -r9 │ │ - andvs r9, r5, r2, lsl #18 │ │ - andge pc, r0, r1, asr #17 │ │ - pop {r0, r1, r2, ip, sp, pc} │ │ - mcrls 15, 0, r8, cr2, cr0, {7} │ │ - @ instruction: 0x1015f8dd │ │ - mulscc r0, sp, r8 │ │ - @ instruction: 0x7011f8dd │ │ - @ instruction: 0xf8c69a06 │ │ - @ instruction: 0xf8c61009 │ │ - rscsvs r7, r2, r5 │ │ - eorsvs r7, r0, r3, lsr r1 │ │ - pop {r0, r1, r2, ip, sp, pc} │ │ - ldrble r8, [r4], #4080 @ 0xff0 │ │ + @ instruction: 0xd1054291 │ │ + eorvs r6, sl, r1, ror #18 │ │ + stmiavs r0!, {r3, ip, sp, lr} │ │ + ands fp, r0, r0, ror r9 │ │ + rscvs r9, sl, r7, lsl #20 │ │ + @ instruction: 0xf8dd68a2 │ │ + @ instruction: 0xf8ddc015 │ │ + @ instruction: 0xf8c53019 │ │ + @ instruction: 0xf8c53009 │ │ + @ instruction: 0x7128c005 │ │ + tstlt r2, r9, lsr #32 │ │ + @ instruction: 0xf0b168e0 │ │ + andlt lr, r8, sl, asr #17 │ │ + ldrble fp, [r4], #3504 @ 0xdb0 │ │ svcmi 0x00f0e92d │ │ strmi fp, [fp], -fp, ror #1 │ │ andcs r4, r0, #153092096 @ 0x9200000 │ │ - blmi 368804 │ │ + blmi 3657a4 │ │ tstls r5, #8, 14 @ 0x200000 │ │ ldrcs lr, [r1, -sp, asr #19] │ │ andsls sl, r3, #17408 @ 0x4400 │ │ ldmib sl, {r2, r4, r8, r9, ip, pc}^ │ │ ldmib r4, {r1, r9, sl, ip, sp, lr}^ │ │ rsbmi r3, lr, r0, lsl #10 │ │ teqmi r3, #123 @ 0x7b │ │ ldreq pc, [r1], -r0, asr #4 │ │ streq pc, [r0], -r8, asr #5 │ │ @ instruction: 0xf8dad117 │ │ - blcs 367e4 │ │ + blcs 33784 │ │ strbthi pc, [lr], #-65 @ 0xffffffbf @ │ │ ldrls r4, [r0], #-1623 @ 0xfffff9a9 │ │ svcmi 0x0044f857 │ │ movwmi pc, #79 @ 0x4f @ │ │ stmdbhi r1, {r0, r1, r2, r4, r6, r7, r8, fp, sp, lr, pc} │ │ svcmi 0x0000f1b4 │ │ tstle ip, fp, lsr r0 │ │ @@ -8864,22 +5768,22 @@ │ │ eoreq lr, r6, sp, asr #19 │ │ smlawteq r8, sp, r9, lr │ │ orrcc pc, sp, r0, asr #4 │ │ eoreq lr, sl, sp, asr #19 │ │ smlawteq ip, sp, r9, lr │ │ ldmeq r0, {r0, sp, lr, pc} │ │ @ instruction: 0x4658d11e │ │ - stc2l 0, cr15, [ip, #-116] @ 0xffffff8c │ │ + @ instruction: 0xff00f020 │ │ stmdacs r0, {r0, r1, r3, r5, fp, ip, pc} │ │ strdcs sp, [r0, -r9] │ │ strcs r2, [r1, #-770] @ 0xfffffcfe │ │ and r2, r7, r0, lsl #14 │ │ strcs pc, [r3], -r3, lsr #23 │ │ - blx ec862 │ │ - blx 103f82 │ │ + blx e9802 │ │ + blx 100f22 │ │ ldrmi r6, [r3], -r7, lsl #14 │ │ rscsle r0, r5, r2, asr #15 │ │ strcs pc, [r5], -r3, lsr #23 │ │ rscle r2, r4, r1, lsl #16 │ │ tstpvs r1, r3, lsl #22 @ p-variant is OBSOLETE │ │ tstpne r5, r7, lsl #22 @ p-variant is OBSOLETE │ │ @ instruction: 0xe7eb4615 │ │ @@ -8895,107 +5799,107 @@ │ │ stmibgt ip, {r2, r4, ip, sp}^ │ │ ldm r1, {r2, r3, r6, r7, lr, pc} │ │ rscgt r0, ip, ip, ror #1 │ │ @ instruction: 0xf8cd9d10 │ │ cdpvs 0, 14, cr10, cr8, cr8, {1} │ │ ldmdage lr!, {r5, r6, r7, r8, r9, ip, sp, pc} │ │ @ instruction: 0x4629aa16 │ │ - ldc2 0, cr15, [r0, #-184]! @ 0xffffff48 │ │ + mcr2 0, 3, pc, cr8, cr1, {1} @ │ │ eorsge lr, lr, #3620864 @ 0x374000 │ │ ldrdlt pc, [r4, -sp] │ │ andls r9, pc, r0, asr #16 │ │ vshr.s8 d18, d1, #8 │ │ strmi r0, [r2] │ │ stclvs 1, cr13, [lr, #-488]! @ 0xfffffe18 │ │ stcvs 3, cr11, [r8, #-56]! @ 0xffffffc8 │ │ @ instruction: 0xf0412800 │ │ - stcls 3, cr8, [pc, #-1004] @ 2a3fc │ │ + stcls 3, cr8, [pc, #-1004] @ 2739c │ │ svceq 0x0000f1bb │ │ stmiavs r8!, {r0, r3, r4, ip, lr, pc} │ │ ldmib sp, {r3, r4, r5, r7, r8, ip, sp, pc}^ │ │ @ instruction: 0x46d94a14 │ │ stmdalt r0, {r0, r2, r4, r6, r7, r8, fp, sp, lr, pc} │ │ stmdavs r0!, {r0, r1, r2, r5, r7, fp, sp, lr} │ │ @ instruction: 0xf0014287 │ │ stmdavs r0!, {r3, r4, r6, r7, r8, r9, pc}^ │ │ @ instruction: 0xf8401c79 │ │ - bl 568ec │ │ + bl 5388c │ │ adcvs r0, r1, r7, asr #1 │ │ andhi pc, r4, r0, asr #17 │ │ ldrdeq pc, [r0], -sl │ │ vhsub.s8 d20, d17, d1 │ │ ldcge 3, cr8, [r6], {123} @ 0x7b │ │ @ instruction: 0xf0002a00 │ │ stmdals pc, {r0, r1, r3, r8, r9, sl, pc} @ │ │ - svc 0x00caf0ad │ │ + stmda r2, {r0, r4, r5, r7, ip, sp, lr, pc} │ │ svclt 0x0006f000 │ │ ldrsbtge pc, [r8], #-133 @ 0xffffff7b @ │ │ svceq 0x0000f1ba │ │ sbchi pc, pc, r0 │ │ subeq lr, sl, sl, lsl #22 │ │ ldrsbtls pc, [r4], #-133 @ 0xffffff7b @ │ │ andls r0, pc, r0, lsl #2 │ │ - svc 0x00d2f0ad │ │ + ldmda r2, {r0, r4, r5, r7, ip, sp, lr, pc} │ │ @ instruction: 0xf0012800 │ │ @ instruction: 0x468383fd │ │ @ instruction: 0xf8cd2700 │ │ eor sl, r8, r8, lsr r0 │ │ strtmi r2, [r8], -r1, lsl #10 │ │ @ instruction: 0x46224631 │ │ ldmdaeq r0!, {r0, r3, r8, ip, sp, lr, pc} │ │ - beq a6f18 │ │ - stc2 0, cr15, [fp, #680]! @ 0x2a8 │ │ + beq a3eb8 │ │ + stc2l 0, cr15, [sp, #-692]! @ 0xfffffd4c │ │ @ instruction: 0x3600e9d9 │ │ svceq 0x0000f1ba │ │ ldrdeq lr, [r2, -r9] │ │ @ instruction: 0xc01cf8d9 │ │ mla r8, r9, r8, pc @ │ │ mlacs r0, r9, r8, pc @ │ │ @ instruction: 0xf84b46c1 │ │ - bl 2f68b0 │ │ + bl 2f3850 │ │ @ instruction: 0xf1070307 │ │ stmib r3, {r4, r5, r8, r9, sl}^ │ │ @ instruction: 0xf1036001 │ │ @ instruction: 0xf883000c │ │ @ instruction: 0xf8832020 │ │ eorsgt lr, r2, r8, lsr #32 │ │ @ instruction: 0x4c06e9c3 │ │ stmdals pc, {r0, r1, r4, ip, lr, pc} @ │ │ @ instruction: 0xd01042b8 │ │ strvs lr, [r5], #-2521 @ 0xfffff627 │ │ sbcle r2, pc, r0, lsl #24 │ │ - @ instruction: 0xf0ad4620 │ │ - stmdacs r0, {r3, r4, r7, r8, r9, sl, fp, sp, lr, pc} │ │ + @ instruction: 0xf0b04620 │ │ + stmdacs r0, {r3, r4, r6, r7, r8, r9, sl, fp, sp, lr, pc} │ │ @ instruction: 0x83aff001 │ │ strb r4, [r8, r5, lsl #12] │ │ - beq 45592c │ │ + beq 4528cc │ │ @ instruction: 0xf000900d │ │ @ instruction: 0x2000beb7 │ │ @ instruction: 0xf10d2104 │ │ stmib sp, {r3, r4, r5, r6, r7, r8, fp}^ │ │ vrhadd.s8 q8, q0, q0 │ │ stmib sp, {r0, r2, r3, r7, r8, ip, sp}^ │ │ stmib sp, {r1, r2, r3, r4, r5}^ │ │ stmib sp, {r1, r6}^ │ │ and r0, r1, r4, asr #2 │ │ @ instruction: 0xd11e0890 │ │ - @ instruction: 0xf0094648 │ │ - stmdals r3, {r0, r1, r5, r6, r7, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf00c4648 │ │ + stmdals r3, {r0, r1, r3, r5, r8, r9, fp, ip, sp, lr, pc}^ │ │ rscsle r2, r9, r0, lsl #16 │ │ movwcs r2, #8448 @ 0x2100 │ │ strcs r2, [r0, -r1, lsl #10] │ │ - blx fe922932 │ │ + blx fe91f8d2 │ │ stmdaeq r0, {r0, r1, r9, sl, sp}^ │ │ strvs pc, [r7], -r3, lsl #22 │ │ strvs pc, [r7, -r3, lsl #22] │ │ bfieq r4, r3, (invalid: 12:2) │ │ - blx fe91ecfe │ │ + blx fe91bc9e │ │ stmdacs r1, {r0, r2, sl, sp} │ │ - blx 11ecc2 │ │ - blx 1fad3a │ │ + blx 11bc62 │ │ + blx 1f7cda │ │ ldrmi r1, [r5], -r5, lsl #2 │ │ strbmi lr, [r8], -fp, ror #15 │ │ stmiagt ip, {r1, r2, r5, r8, fp, sp, pc}^ │ │ ldm r0, {r2, r3, r6, r7, r8, lr, pc} │ │ andcs r0, r0, ip, asr #1 │ │ ldmdbge r4, {r2, r3, r6, r7, r8, lr, pc} │ │ teqls r1, r0, lsl fp │ │ @@ -9011,27 +5915,27 @@ │ │ @ instruction: 0xf10daf3e │ │ stmib sp, {r3, r4, r7, r8, r9, fp}^ │ │ vrhadd.s8 q8, q0, q0 │ │ stmib sp, {r0, r2, r3, r7, r8, ip, sp}^ │ │ stmib sp, {r1, r2, r3, r4, r5}^ │ │ stmib sp, {r1, r6}^ │ │ ldrtmi r0, [r8], -r4, asr #2 │ │ - @ instruction: 0xf89af009 │ │ + blx ff8e3964 │ │ stmdacs r0, {r0, r1, r6, fp, ip, pc} │ │ strdcs sp, [r0, -r9] │ │ strcs r2, [r1], #-770 @ 0xfffffcfe │ │ and r2, ip, r0, lsl #10 │ │ tstpvs r1, r3, lsl #22 @ p-variant is OBSOLETE │ │ tstpne r4, r5, lsl #22 @ p-variant is OBSOLETE │ │ - blx fe8fc202 │ │ + blx fe8f91a2 │ │ stmdaeq r0, {r0, r1, r9, sl, sp}^ │ │ strvs pc, [r5], -r3, lsl #22 │ │ strvs pc, [r5, #-2819] @ 0xfffff4fd │ │ bfieq r4, r3, (invalid: 12:2) │ │ - blx fe91ed9a │ │ + blx fe91bd3a │ │ stmdacs r1, {r2, r9, sl, sp} │ │ ldmeq r0, {r2, r3, r5, r6, r7, r8, ip, lr, pc} │ │ svcgt 0x004ed0df │ │ subgt sl, lr, r6, lsr r8 │ │ umaaleq lr, lr, r7, r8 │ │ subgt r4, lr, pc, asr r6 │ │ ldmib r5, {r2, r6, sp, lr, pc}^ │ │ @@ -9048,149 +5952,149 @@ │ │ vrhadd.s8 q8, q0, q0 │ │ stmib sp, {r0, r2, r3, r7, r8, ip, sp}^ │ │ stmib sp, {r1, r2, r3, r4, r5}^ │ │ stmib sp, {r1, r6}^ │ │ and r0, r2, r4, asr #2 │ │ @ instruction: 0xf0400890 │ │ ldrtmi r8, [r0], -sp, lsr #13 │ │ - @ instruction: 0xf850f009 │ │ + blx fe6639f8 │ │ stmdacs r0, {r0, r1, r6, fp, ip, pc} │ │ strdcs sp, [r0, -r9] │ │ strcs r2, [r1, #-770] @ 0xfffffcfe │ │ and r2, r7, r0, lsl #14 │ │ strcs pc, [r3], #-2979 @ 0xfffff45d │ │ - blx ecb42 │ │ - blx fba62 │ │ + blx e9ae2 │ │ + blx f8a02 │ │ ldrmi r4, [r3], -r7, lsl #14 │ │ rscsle r0, r5, r2, asr #15 │ │ strcs pc, [r5], #-2979 @ 0xfffff45d │ │ rscle r2, r3, r1, lsl #16 │ │ tstpmi r1, r3, lsl #22 @ p-variant is OBSOLETE │ │ tstpne r5, r7, lsl #22 @ p-variant is OBSOLETE │ │ @ instruction: 0xe7eb4615 │ │ andmi pc, r0, pc, asr #32 │ │ eorsls sl, r8, r6, lsr #30 │ │ subscs r9, r8, #16, 22 @ 0x4000 │ │ ldcge 6, cr2, [r6, #-68] @ 0xffffffbc │ │ streq pc, [r0], -r8, asr #5 │ │ svceq 0x0008f813 │ │ @ instruction: 0x8115e9d3 │ │ - blx 74b02 │ │ + blx 71aa2 │ │ tstls ip, r2, lsl #2 │ │ tstpne fp, r0, asr #4 @ p-variant is OBSOLETE │ │ rscsne pc, r8, sp, lsr #17 │ │ strbmi fp, [fp], -r8, lsl #30 │ │ stmibvc r8, {r0, r2, r3, r8, sl, ip, sp, lr, pc}^ │ │ @ instruction: 0xf1099310 │ │ andls r0, r5, r5 │ │ strmi r9, [r0, #2060] @ 0x80c │ │ ldrbhi pc, [r1, #-0]! @ │ │ ldrdlt pc, [r0], #141 @ 0x8d @ │ │ @ instruction: 0xf8d8a851 │ │ ldmdbge r6!, {r4, sp} │ │ @ instruction: 0xf1bbc0a8 │ │ svclt 0x00184000 │ │ - bcs 3c2dc │ │ + bcs 3927c │ │ tstpeq r1, pc, asr #32 @ p-variant is OBSOLETE │ │ @ instruction: 0xf082bf48 │ │ @ instruction: 0xb1b14100 │ │ @ instruction: 0xd1272901 │ │ ldrsbtcs pc, [r0], -r8 @ │ │ subsls r4, r7, r9, lsr #12 │ │ ldrtmi r4, [fp], r8, asr #12 │ │ - @ instruction: 0xf914f01f │ │ - bne 1965254 │ │ + blx ff263b04 │ │ + bne 19621f4 │ │ ldrdmi lr, [r6], #-157 @ 0xffffff63 @ │ │ stmdbcs r2, {r3, r5, r6, r9, fp, ip, pc} │ │ - beq 89efb4 │ │ + beq 89bf54 │ │ stmib sp, {r0, r1, r2, r3, ip, pc}^ │ │ @ instruction: 0xf000120d │ │ @ instruction: 0xf8d8bd3a │ │ @ instruction: 0x46482018 │ │ - @ instruction: 0xf01f4629 │ │ - ldmib sp, {r0, r8, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf0224629 │ │ + ldmib sp, {r0, r2, r4, r5, r7, r9, fp, ip, sp, lr, pc}^ │ │ ldmib sp, {r2, r5, r6, r8, r9, sl}^ │ │ - bls 1a3b0a4 │ │ + bls 1a38044 │ │ cmple r3, r2, lsl #16 │ │ tstls pc, r0, lsr #20 │ │ andeq lr, sp, #3358720 @ 0x334000 │ │ stcllt 0, cr15, [r9] │ │ ldmdage r1, {r0, r1, r2, r4, r6, ip, pc}^ │ │ ldrsbtcs pc, [r8], -r8 @ │ │ subsls r4, r5, r9, lsr #12 │ │ subsls sl, r4, r7, asr r8 │ │ ldmib r8, {r3, r6, r9, sl, lr}^ │ │ - @ instruction: 0xf01fb406 │ │ - stmdals r4!, {r0, r1, r2, r5, r6, r7, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf022b406 │ │ + stmdals r4!, {r0, r1, r3, r4, r7, r9, fp, ip, sp, lr, pc}^ │ │ cmple r5, r2, lsl #16 │ │ andls r9, pc, r7, ror #16 │ │ ldmib sp, {r3, r5, r6, fp, ip, pc}^ │ │ andls sl, lr, r5, ror #8 │ │ andls r0, sp, r0, lsr #20 │ │ ldcllt 0, cr15, [r0], {0} │ │ stmib sp, {r0, r3, r5, r6, r8, r9, fp, ip, pc}^ │ │ ldmdage r1, {r1, r3, r4, r6, lr}^ │ │ ldmdage r8, {r1, r2, r4, r6, ip, pc}^ │ │ - bne 1665294 │ │ + bne 1662234 │ │ subsls r4, r5, r9, lsr #12 │ │ subsls sl, r4, r7, asr r8 │ │ stmib sp, {r3, r6, r9, sl, lr}^ │ │ @ instruction: 0xf8d8235c │ │ @ instruction: 0xf8982000 │ │ @ instruction: 0xf898b050 │ │ - @ instruction: 0xf01f7051 │ │ - cdpge 8, 6, cr15, cr6, cr3, {6} │ │ - beq 19652f8 │ │ + @ instruction: 0xf0227051 │ │ + @ instruction: 0xae66fa77 │ │ + beq 1962298 │ │ stmdacs r2, {r2, r4, r6, r9, sl, fp, lr, pc} │ │ - beq 45f088 │ │ + beq 45c028 │ │ andls r9, sp, fp, lsl #4 │ │ - bleq fe666fc8 │ │ + bleq fe663f68 │ │ ldcllt 0, cr15, [sl], {0} │ │ stmib sp, {r0, r3, r5, r6, r8, r9, fp, ip, pc}^ │ │ @ instruction: 0x07c0075e │ │ cmnmi r0, sp, asr #19 │ │ stmib sp, {r0, r1, r3, r8, r9, sl, ip, pc}^ │ │ @ instruction: 0xf0012362 │ │ @ instruction: 0xf108820f │ │ - blgt 3eb834 │ │ - bl 1cf13f8 │ │ + blgt 3e87d4 │ │ + bl 1cee398 │ │ vaddl.s8 q0, d0, d1 │ │ @ instruction: 0xf04f8093 │ │ ldrtmi r0, [r7], -r1, lsl #18 │ │ stclt 0, cr15, [r7], {0} │ │ strtmi r9, [r9], -fp, lsl #8 │ │ rsbmi lr, r5, #3620864 @ 0x374000 │ │ subsmi lr, r9, #3358720 @ 0x334000 │ │ ldrdcs pc, [r0], -r8 @ │ │ @ instruction: 0x3767e9dd │ │ subsls r9, r8, r9, ror #26 │ │ stmib sp, {r3, r6, r9, sl, lr}^ │ │ ldrbls r3, [sp, #-1883] @ 0xfffff8a5 │ │ - @ instruction: 0xf88cf01f │ │ + blx 1063c14 │ │ strbteq lr, [r4], #-2525 @ 0xfffff623 │ │ @ instruction: 0x3766e9dd │ │ stmdacs r2, {r3, r5, r6, r8, sl, fp, ip, pc} │ │ - beq 65f0ec │ │ + beq 65c08c │ │ andls r9, sp, fp, lsl #6 │ │ - bleq fe667038 │ │ + bleq fe663fd8 │ │ stmibvc r8, {r0, r2, r3, r8, sl, ip, sp, lr, pc}^ │ │ stmdbls r9!, {r2, r5, r7, r8, sp, lr, pc}^ │ │ stmib sp, {r5, r6, r8, r9, fp, sp, pc}^ │ │ @ instruction: 0x07c00a5e │ │ cmpgt r4, #1572864 @ 0x180000 │ │ eorge pc, ip, sp, asr #17 │ │ @ instruction: 0xf0019163 │ │ ldmib r8, {r0, r2, r4, r6, r7, r8, pc}^ │ │ ldmib r8, {r1, r4, r9, sl, ip, sp, lr}^ │ │ ldrtmi r5, [r2], -pc, lsl #8 │ │ mlage r8, r8, r8, pc @ │ │ @ instruction: 0x463842b4 │ │ qasxmi fp, r2, r8 │ │ - @ instruction: 0xf0ad4629 │ │ - adcmi lr, r6, #20, 28 @ 0x140 │ │ + @ instruction: 0xf0b04629 │ │ + adcmi lr, r6, #76, 28 @ 0x4c0 │ │ tstpeq r0, pc, asr #32 @ p-variant is OBSOLETE │ │ tstcs r1, r8, lsr pc │ │ @ instruction: 0xf04f2800 │ │ svclt 0x00480000 │ │ svclt 0x00082001 │ │ stmdacs r0, {r3, r9, sl, lr} │ │ ldrcs sp, [r1, -r3, rrx] │ │ @@ -9202,59 +6106,59 @@ │ │ stcllt 0, cr15, [r1], #-0 │ │ stmib sp, {r0, r3, r5, r6, r8, fp, ip, pc}^ │ │ @ instruction: 0x07c0045e │ │ strbcc lr, [r0, -sp, asr #19]! │ │ cmnpl r2, sp, asr #19 │ │ @ instruction: 0x81a2f001 │ │ strtmi r2, [r5], -r8 │ │ - ldc 0, cr15, [r2, #692]! @ 0x2b4 │ │ + ldcl 0, cr15, [r2, #704]! @ 0x2c0 │ │ stmdacs r0, {r0, r1, r3, r9, fp, ip, pc} │ │ bicshi pc, r8, r1 │ │ tstpmi r0, pc, asr #32 @ p-variant is OBSOLETE │ │ subsmi r4, r1, r4, lsl #12 │ │ @ instruction: 0xf8c06041 │ │ mrscs fp, (UNDEF: 0) │ │ stmdage r4!, {r3, r9, sp}^ │ │ smlabtcs r0, sp, r9, lr │ │ andscs r4, r0, #42991616 @ 0x2900000 │ │ - @ instruction: 0xf01f4623 │ │ - @ instruction: 0x4620f8b9 │ │ - stc 0, cr15, [r2, #692] @ 0x2b4 │ │ + @ instruction: 0xf0224623 │ │ + strtmi pc, [r0], -sp, ror #20 │ │ + ldc 0, cr15, [sl, #704]! @ 0x2c0 │ │ strbteq lr, [r4], #-2525 @ 0xfffff623 │ │ @ instruction: 0xf0402801 │ │ ldmib sp, {r2, r4, r7, pc}^ │ │ @ instruction: 0xf10d1066 │ │ @ instruction: 0x910b0b98 │ │ stmibvc r8, {r0, r2, r3, r8, sl, ip, sp, lr, pc}^ │ │ stmdals r8!, {r0, r1, r2, r3, ip, pc}^ │ │ - beq 24ed18 │ │ + beq 24bcb8 │ │ @ instruction: 0xe12c900d │ │ mlasvc r0, r8, r8, pc @ │ │ ldrdeq lr, [sl, -r8] │ │ movwcs lr, #35288 @ 0x89d8 │ │ streq pc, [r1], -r7, lsl #1 │ │ subeq lr, r3, sp, lsl #17 │ │ stmdbls fp, {r3, r6, r9, sl, lr} │ │ - @ instruction: 0xf00a9706 │ │ - ldmib sp, {r0, r1, r5, r6, r7, r9, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf00d9706 │ │ + ldmib sp, {r0, r1, r2, r5, r7, r8, r9, fp, ip, sp, lr, pc}^ │ │ @ instruction: 0x9c681a66 │ │ @ instruction: 0x0764e9dd │ │ @ instruction: 0xd1252801 │ │ pkhbtmi r2, r9, r1, lsl #12 │ │ stmdbge sp, {r3, r9, fp} │ │ ldreq lr, [r1], #-2177 @ 0xfffff77f │ │ streq pc, [r0], -r8, asr #5 │ │ stmdbls r6, {r0, r3, r4, r6, r7, r8, r9, sp, lr, pc} │ │ andeq pc, r1, sl, lsl #1 │ │ strtmi r4, [r3], -sl, lsr #12 │ │ smlabbeq r1, r1, r0, pc @ │ │ andne lr, r2, sp, asr #19 │ │ stmdage r4!, {r0, r1, r3, r8, fp, ip, pc}^ │ │ strvc lr, [r0], -sp, asr #19 │ │ - @ instruction: 0xf9d4f00a │ │ + mrrc2 0, 0, pc, lr, cr13 @ │ │ cmncs r7, #3620864 @ 0x374000 │ │ @ instruction: 0x0764e9dd │ │ cmnle ip, r1, lsl #16 │ │ ldrmi r9, [r4], -r6, ror #16 │ │ ldcge 0, cr9, [r6, #-44] @ 0xffffffd4 │ │ stmib sp, {r9, fp}^ │ │ tst lr, sp, lsl #6 │ │ @@ -9263,32 +6167,32 @@ │ │ msrhi SPSR_sc, r1, asr #32 │ │ @ instruction: 0xf04f6878 │ │ ldmdavs fp!, {r8, lr} │ │ svcmi 0x0000f1bb │ │ streq lr, [r1], -r0, lsl #21 │ │ ldmdage r6!, {r0, r3, ip, lr, pc} │ │ @ instruction: 0x461d461a │ │ - @ instruction: 0xf0094633 │ │ - @ instruction: 0x462bf8d1 │ │ + @ instruction: 0xf00c4633 │ │ + strtmi pc, [fp], -r5, ror #19 │ │ @ instruction: 0xf0002800 │ │ stccs 1, cr8, [r1], {8} │ │ teqphi sp, r1, asr #4 @ p-variant is OBSOLETE │ │ ldrsbne lr, [r1], #-157 @ 0xffffff63 │ │ @ instruction: 0xf8baaa58 │ │ stmib sp, {ip, lr}^ │ │ strbmi r2, [r8], -r0 │ │ ldrmi r9, [sl], -r4, lsl #6 │ │ ldrbls r4, [sl, #-1587] @ 0xfffff9cd │ │ ldrbge lr, [r8], #-2509 @ 0xfffff633 │ │ - blx 666e2a │ │ + stc2l 0, cr15, [ip], {32} │ │ @ instruction: 0x9194f89d │ │ svcls 0x00642011 │ │ andeq pc, r0, r8, asr #5 │ │ @ instruction: 0xf0404287 │ │ - b 180bb48 │ │ + b 1808ae8 │ │ @ instruction: 0xf50d70c9 │ │ @ instruction: 0xf00079c8 │ │ @ instruction: 0x4637815b │ │ ldmib r6, {r0, r1, r4, r6, r9, sl, fp, ip, pc}^ │ │ andcc r0, r1, ip, lsl #2 │ │ addmi r6, r8, #48, 6 @ 0xc0000000 │ │ msrhi R12_fiq, r0 │ │ @@ -9296,190 +6200,190 @@ │ │ vqdmlal.s q8, d8, d0 │ │ ldrtmi r0, [r7], -r0, lsl #12 │ │ @ instruction: 0xf10de356 │ │ @ instruction: 0x2c000b98 │ │ ldmib sp, {r0, r1, r3, r6, ip, lr, pc}^ │ │ @ instruction: 0xf50d3067 │ │ andls r7, r0, r8, asr #19 │ │ - bge 1555368 │ │ - @ instruction: 0xf0094648 │ │ - stclls 14, cr15, [r4], #-900 @ 0xfffffc7c │ │ + bge 1552308 │ │ + @ instruction: 0xf00d4648 │ │ + @ instruction: 0x9c64f9e1 │ │ @ instruction: 0x0194f89d │ │ strhle r4, [r2, #-36] @ 0xffffffdc │ │ @ instruction: 0xf00007c0 │ │ andcs r8, r0, sp, lsl #1 │ │ andls r4, r1, r9, lsr #12 │ │ andcs r4, r9, #72, 12 @ 0x4800000 │ │ - @ instruction: 0xf01e2300 │ │ - ldmib sp, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf0222300 │ │ + ldmib sp, {r0, r1, r4, r5, r7, r8, fp, ip, sp, lr, pc}^ │ │ stmdacs r1, {r2, r5, r6, sl} │ │ teqphi fp, #0 @ p-variant is OBSOLETE │ │ @ instruction: 0xf0002c00 │ │ ldmib sp, {r0, r2, r3, r4, r5, r8, r9, pc}^ │ │ andls r3, r0, r7, rrx │ │ stcls 7, cr14, [pc], {222} @ 0xde │ │ svccs 0x0000ad16 │ │ addshi pc, r0, r0 │ │ stmibvc r8, {r0, r2, r3, r8, sl, ip, sp, lr, pc}^ │ │ @ instruction: 0x4648a954 │ │ - blx 366e86 │ │ + stc2l 0, cr15, [r0], {13} │ │ @ instruction: 0x1194f89d │ │ svcls 0x00642011 │ │ andeq pc, r0, r8, asr #5 │ │ @ instruction: 0xf0404287 │ │ strbeq r8, [r8, fp, lsl #1] │ │ sbcshi pc, ip, r0 │ │ tstcs ip, r8 │ │ svceq 0x0000f1bb │ │ andcs fp, fp, r8, lsl pc │ │ tstcs lr, r8, lsl pc │ │ - bcs 516a0 │ │ + bcs 4e640 │ │ strmi fp, [r1], -r8, lsl #30 │ │ tstle r3, r6, lsl #2 │ │ andcs lr, r1, fp, lsl #1 │ │ andls r4, fp, r4, lsr r6 │ │ stmibvc r8, {r0, r2, r3, r8, sl, ip, sp, lr, pc}^ │ │ stmdbls r5, {r0, r1, r2, r3, r6, sp, lr, pc} │ │ - bls 19ceed0 │ │ + bls 19cbe70 │ │ stmdahi r9, {r3, r7, fp, ip, sp, lr} │ │ - bls 1a0f6e8 │ │ + bls 1a0c688 │ │ andmi lr, r0, r1, asr #20 │ │ andls r9, sp, lr, lsl #4 │ │ ldcge 0, cr14, [r6, #-268] @ 0xfffffef4 │ │ andcs r9, r0, fp, lsl #18 │ │ movwcs r9, #2566 @ 0xa06 │ │ strbmi r9, [r8], -r1 │ │ - @ instruction: 0xffb2f01e │ │ - blvc ff368300 │ │ + @ instruction: 0xf966f022 │ │ + blvc ff3652a0 │ │ @ instruction: 0x0764e9dd │ │ ldmdaeq r8, {r0, r1, r3, r4, r7, fp, sp, lr, pc} │ │ @ instruction: 0xf0002801 │ │ svccs 0x00008313 │ │ tstphi r5, #0 @ p-variant is OBSOLETE │ │ - streq lr, [pc, #-2520] @ 2a50c │ │ + streq lr, [pc, #-2520] @ 274ac │ │ @ instruction: 0x462a4639 │ │ svclt 0x003842ab │ │ @ instruction: 0x461e461a │ │ - ldc 0, cr15, [r8], #692 @ 0x2b4 │ │ + ldcl 0, cr15, [r0], #704 @ 0x2c0 │ │ @ instruction: 0xf04f42b5 │ │ svclt 0x00880100 │ │ stmdacs r0, {r0, r8, sp} │ │ andeq pc, r0, pc, asr #32 │ │ andcs fp, r1, r8, asr #31 │ │ strmi fp, [r8], -r8, lsl #30 │ │ sbcsle r2, r2, r1, lsl #16 │ │ @ instruction: 0x4648a954 │ │ ldrbmi r4, [fp], -r2, lsr #12 │ │ - blx feb66f44 │ │ + stc2l 0, cr15, [r0], #-52 @ 0xffffffcc │ │ @ instruction: 0x0194f89d │ │ - bleq 4a7824 │ │ + bleq 4a47c4 │ │ vqrdmlsh.s d25, d8, d0[5] │ │ - ldrbmi r0, [pc, #-2816] @ 2a42c │ │ + ldrbmi r0, [pc, #-2816] @ 273cc │ │ rscshi pc, r6, #64 @ 0x40 │ │ bfieq sl, r6, (invalid: 26:0) │ │ rsbs sp, r7, r0, asr #3 │ │ ldrtmi r2, [r4], -r0 │ │ ldmdage lr, {r0, r1, r3, ip, pc}^ │ │ - @ instruction: 0xf82cf01d │ │ + @ instruction: 0xf9e0f020 │ │ stmdacs r0, {r1, r2, r3, r4, r6, fp, ip, pc} │ │ ldmdals pc, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ @ │ │ - ldcl 0, cr15, [ip, #-452] @ 0xfffffe3c │ │ + ldc 0, cr15, [r2, #464] @ 0x1d0 │ │ @ instruction: 0x570ee9dd │ │ - @ instruction: 0xf01da858 │ │ - ldmdals r8, {r0, r5, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf020a858 │ │ + ldmdals r8, {r0, r2, r4, r6, r7, r8, fp, ip, sp, lr, pc}^ │ │ svclt 0x001c2800 │ │ - @ instruction: 0xf0719859 │ │ - stmib sp, {r1, r4, r6, r8, sl, fp, sp, lr, pc}^ │ │ + @ instruction: 0xf0749859 │ │ + stmib sp, {r3, r7, r8, sl, fp, sp, lr, pc}^ │ │ ldcge 7, cr5, [r6, #-56] @ 0xffffffc8 │ │ rscs r4, fp, #169869312 @ 0xa200000 │ │ andcs r2, r1, r1, lsl r7 │ │ streq pc, [r0, -r8, asr #5] │ │ @ instruction: 0xf10d900b │ │ @ instruction: 0xf50d0b98 │ │ sbcs r7, r8, #200, 18 @ 0x320000 │ │ stmdbls r5, {r0, r1, r3, r8, ip, pc} │ │ rsbmi lr, r6, #3620864 @ 0x374000 │ │ stmdahi r9, {r3, r7, fp, ip, sp, lr} │ │ - b 108f7cc │ │ + b 108c76c │ │ andls r4, sp, r0 │ │ - bleq fe6673d0 │ │ + bleq fe664370 │ │ stmdals r6, {r0, r1, r3, r6, r7, r9, sp, lr, pc} │ │ @ instruction: 0xf0402800 │ │ strd r8, [ip, #0]! │ │ stmdbls fp, {r1, r2, r4, r8, sl, fp, sp, pc} │ │ - bls 1b2fb0 │ │ + bls 1aff50 │ │ andls r2, r1, r0, lsl #6 │ │ - @ instruction: 0xf01e4648 │ │ - @ instruction: 0xf50dff39 │ │ + @ instruction: 0xf0224648 │ │ + @ instruction: 0xf50df8ed │ │ ldmib sp, {r2, r3, r6, r7, r8, r9, fp, ip, sp, lr}^ │ │ ldm fp, {r2, r5, r6, r8, r9, sl} │ │ stmdacs r0, {r3, r4, fp} │ │ addshi pc, sl, #64 @ 0x40 │ │ @ instruction: 0xf0002f00 │ │ ldmib r8, {r2, r3, r4, r7, r9, pc}^ │ │ @ instruction: 0x46390512 │ │ adcmi r4, fp, #44040192 @ 0x2a00000 │ │ sasxmi fp, sl, r8 │ │ - @ instruction: 0xf0ad461e │ │ - adcsmi lr, r5, #64, 24 @ 0x4000 │ │ + @ instruction: 0xf0b0461e │ │ + adcsmi lr, r5, #120, 24 @ 0x7800 │ │ tstpeq r0, pc, asr #32 @ p-variant is OBSOLETE │ │ tstcs r1, r8, lsr pc │ │ @ instruction: 0xf04f2800 │ │ svclt 0x00480000 │ │ svclt 0x00082001 │ │ stmdacs r0, {r3, r9, sl, lr} │ │ ldmdbge r4, {r1, r4, r6, r7, r8, ip, lr, pc}^ │ │ strtmi r4, [r2], -r8, asr #12 │ │ - @ instruction: 0xf00a465b │ │ - @ instruction: 0xf89dfa33 │ │ + @ instruction: 0xf00d465b │ │ + @ instruction: 0xf89dfbe7 │ │ vand d16, d16, d4 │ │ svcls 0x00640b11 │ │ - bleq 67b3c │ │ + bleq 64adc │ │ @ instruction: 0xf040455f │ │ ldcge 2, cr8, [r6, #-500] @ 0xfffffe0c │ │ bicle r0, r0, r0, asr #15 │ │ rsb r2, pc, #0 │ │ andcs r2, r0, r1, lsl r7 │ │ vaddl.s8 , d8, d11 │ │ @ instruction: 0xf10d0700 │ │ rsbs r0, ip, #152, 22 @ 0x26000 │ │ addmi r6, r8, #181248 @ 0x2c400 │ │ ldmib r6, {r1, r5, r8, fp, ip, lr, pc}^ │ │ strbmi r1, [r8], -r9, lsl #4 │ │ stmib sp, {r1, r2, r5, r6, r8, sl, ip, pc}^ │ │ - @ instruction: 0xf02fa464 │ │ - @ instruction: 0x4602fa31 │ │ + @ instruction: 0xf032a464 │ │ + strmi pc, [r2], -r9, ror #22 │ │ @ instruction: 0x460b4630 │ │ - @ instruction: 0xff66f008 │ │ - bvs ffc576e0 │ │ + @ instruction: 0xf87af00c │ │ + bvs ffc54680 │ │ strmi lr, [r0, #-2512] @ 0xfffff630 │ │ stmdavs r0!, {r1, r2, r5, r7, fp, sp, lr} │ │ @ instruction: 0xf0004286 │ │ stmdavs r0!, {r3, r7, r9, pc}^ │ │ @ instruction: 0xf8409904 │ │ - bl 2f150 │ │ + bl 2c0f0 │ │ ldclne 0, cr0, [r1], #-792 @ 0xfffffce8 │ │ subvs r6, r7, r1, lsr #1 │ │ addmi r6, r1, #40, 16 @ 0x280000 │ │ mcrge 6, 5, pc, cr14, cr15, {1} @ │ │ stmdacs r0, {r1, r2, fp, ip, pc} │ │ rscshi pc, lr, r0 │ │ svcmi 0x0000f1bb │ │ stmdbls fp, {r0, r1, r2, r4, r5, r6, r8, ip, lr, pc} │ │ andls r2, r1, r0 │ │ andcs r4, ip, #72, 12 @ 0x4800000 │ │ - @ instruction: 0xf01e2300 │ │ - cdpge 14, 6, cr15, cr6, cr3, {6} │ │ + @ instruction: 0xf0222300 │ │ + mcrge 8, 3, pc, cr6, cr7, {3} @ │ │ ldmib sp, {r0, r4, r8, sp}^ │ │ vqdmlsl.s q8, d8, d0[5] │ │ cdpgt 1, 5, cr0, cr4, cr0, {0} │ │ @ instruction: 0xf0402800 │ │ ldcge 2, cr8, [r6, #-28] @ 0xffffffe4 │ │ @ instruction: 0xf0002f00 │ │ - bcs 24b92c │ │ + bcs 2488cc │ │ ldrhi pc, [r5, r0, asr #32]! │ │ @ instruction: 0xf04f687a │ │ ldmib r8, {r8, r9, lr}^ │ │ @ instruction: 0xf8d70108 │ │ subsmi fp, r3, r0 │ │ @ instruction: 0x0000ebbb │ │ andeq lr, r1, r3, ror fp │ │ @@ -9487,126 +6391,126 @@ │ │ strhi pc, [ip, r0, asr #4] │ │ ldrsbne lr, [r1], #-157 @ 0xffffff63 │ │ stmdahi r5!, {r3, r4, r6, r9, fp, sp, pc} │ │ andcs lr, r0, sp, asr #19 │ │ ldrbmi r4, [sl], -r8, asr #12 │ │ stmib sp, {r1, r3, r4, r6, r8, sl, ip, pc}^ │ │ movwls r4, #26200 @ 0x6658 │ │ - @ instruction: 0xf970f01d │ │ + blx 964126 │ │ @ instruction: 0x9194f89d │ │ svcls 0x00642011 │ │ andeq pc, r0, r8, asr #5 │ │ @ instruction: 0xf0404287 │ │ - b 180b7f8 │ │ + b 1808798 │ │ @ instruction: 0xf50d70c9 │ │ adcsle r7, sl, r8, asr #19 │ │ ldmib r7, {r0, r1, r4, r6, r8, r9, sl, fp, ip, pc}^ │ │ andcc r0, r1, ip, lsl #2 │ │ addmi r6, r8, #56, 6 @ 0xe0000000 │ │ mrcge 6, 2, APSR_nzcv, cr10, cr15, {1} │ │ addmi r6, r8, #189440 @ 0x2e400 │ │ ldmib r7, {r0, r1, r2, r3, r5, r7, r8, fp, ip, lr, pc}^ │ │ strbmi r1, [r8], -r9, lsl #4 │ │ stmib sp, {r1, r2, r5, r6, r8, sl, ip, pc}^ │ │ - @ instruction: 0xf02f4664 │ │ - @ instruction: 0x4602f9b7 │ │ + @ instruction: 0xf0324664 │ │ + strmi pc, [r2], -pc, ror #21 │ │ @ instruction: 0x460b4638 │ │ - cdp2 0, 14, cr15, cr12, cr8, {0} │ │ + @ instruction: 0xf800f00c │ │ stmdacs r0, {r1, r2, r9, fp, ip, pc} │ │ - bvs ffe5f3d4 │ │ + bvs ffe5c374 │ │ strmi lr, [r0, #-2512] @ 0xfffff630 │ │ stmdavs r0!, {r1, r2, r5, r7, fp, sp, lr} │ │ andle r4, fp, r6, lsl #5 │ │ ldclne 8, cr6, [r1], #-384 @ 0xfffffe80 │ │ eorslt pc, r6, r0, asr #16 │ │ sbceq lr, r6, r0, lsl #22 │ │ subvs r6, r2, r1, lsr #1 │ │ addmi r6, r1, #40, 16 @ 0x280000 │ │ ldrt sp, [r3], -sp, lsl #19 │ │ - @ instruction: 0xf0084620 │ │ - bls 1e93e0 │ │ + @ instruction: 0xf00b4620 │ │ + bls 1e67d0 │ │ stmdbls fp, {r1, r2, r3, r5, r6, r7, r8, r9, sl, sp, lr, pc} │ │ andls r2, r1, r0 │ │ andcs r4, ip, #72, 12 @ 0x4800000 │ │ - @ instruction: 0xf01e2300 │ │ - cdpge 14, 6, cr15, cr6, cr11, {2} │ │ + @ instruction: 0xf0212300 │ │ + mcrge 15, 3, pc, cr6, cr15, {7} @ │ │ @ instruction: 0x0764e9dd │ │ stmdacs r1, {r2, r4, r6, r9, sl, fp, lr, pc} │ │ vqadd.s8 , q0, │ │ vldrge d0, [r6, #-68] @ 0xffffffbc │ │ - bleq 67ccc │ │ + bleq 64c6c │ │ @ instruction: 0xf0002f00 │ │ - bcs 24b798 │ │ + bcs 248738 │ │ ldrhi pc, [sp, -r0, asr #32]! │ │ @ instruction: 0xf04f687a │ │ ldmib r8, {r8, r9, lr}^ │ │ @ instruction: 0xf8d70108 │ │ - b fe0d71c8 │ │ - bl feeed9d8 │ │ - bl 1eab1d0 │ │ - blle ff62b1d8 │ │ + b fe0d4168 │ │ + bl feeea978 │ │ + bl 1ea8170 │ │ + blle ff628178 │ │ @ instruction: 0x465aa836 │ │ - @ instruction: 0xf0084653 │ │ - stmdacs r0, {r0, r2, r5, r7, r9, sl, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xf00b4653 │ │ + stmdacs r0, {r0, r3, r4, r5, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ mcrcs 0, 0, sp, cr1, cr1, {6} │ │ strhi pc, [ip, -r0, asr #4] │ │ ldrsbne lr, [r1], #-157 @ 0xffffff63 │ │ stmdahi r5!, {r3, r4, r6, r9, fp, sp, pc} │ │ stmib sp, {r0, r1, r4, r6, r9, sl, lr}^ │ │ strbmi r2, [r8], -r0 │ │ ldrbls r4, [sl, #-1626] @ 0xfffff9a6 │ │ ldrbmi lr, [r8], -sp, asr #19 │ │ - @ instruction: 0xf8f0f01d │ │ + blx fe964224 │ │ @ instruction: 0x9194f89d │ │ svcls 0x00642011 │ │ andeq pc, r0, r8, asr #5 │ │ @ instruction: 0xf0404287 │ │ - b 180b6f8 │ │ + b 1808698 │ │ @ instruction: 0xf50d70c9 │ │ adcsle r7, r2, r8, asr #19 │ │ ldmib r7, {r0, r1, r4, r6, r8, r9, sl, fp, ip, pc}^ │ │ andcc r0, r1, ip, lsl #2 │ │ addmi r6, r8, #56, 6 @ 0xe0000000 │ │ ldclge 6, cr15, [sl, #252] @ 0xfc │ │ addmi r6, r8, #189440 @ 0x2e400 │ │ ldmib r7, {r0, r1, r2, r5, r7, r8, fp, ip, lr, pc}^ │ │ strbmi r1, [r8], -r9, lsl #4 │ │ stmib sp, {r1, r2, r5, r6, r8, sl, ip, pc}^ │ │ - @ instruction: 0xf02f4664 │ │ - @ instruction: 0x4602f937 │ │ + @ instruction: 0xf0324664 │ │ + strmi pc, [r2], -pc, ror #20 │ │ @ instruction: 0x460b4638 │ │ - cdp2 0, 6, cr15, cr12, cr8, {0} │ │ + @ instruction: 0xff80f00b │ │ addsle r2, r8, r0, lsl #16 │ │ ldmib r0, {r3, r4, r5, r6, r7, r9, fp, sp, lr}^ │ │ stmiavs lr!, {sl, ip, lr} │ │ addmi r6, r6, #40, 16 @ 0x280000 │ │ stmdavs r8!, {r0, r2, r3, ip, lr, pc}^ │ │ @ instruction: 0xf8401c71 │ │ - bl 57344 │ │ + bl 542e4 │ │ adcvs r0, r9, r6, asr #1 │ │ andge pc, r4, r0, asr #17 │ │ addmi r6, r1, #32, 16 @ 0x200000 │ │ svcge 0x0085f67f │ │ @ instruction: 0x4628e5b2 │ │ - @ instruction: 0xf816f008 │ │ + @ instruction: 0xf92af00b │ │ stmib sp, {r0, r2, r3, r5, r6, r7, r8, r9, sl, sp, lr, pc}^ │ │ tst r9, lr, lsl #8 │ │ svcmi 0x0000f1bb │ │ stmdbls fp, {r0, r1, r2, r4, r5, r6, r8, ip, lr, pc} │ │ andls r2, r1, r0 │ │ andcs r4, r8, #72, 12 @ 0x4800000 │ │ - @ instruction: 0xf01e2300 │ │ - cdpge 13, 6, cr15, cr6, cr5, {6} │ │ + @ instruction: 0xf0212300 │ │ + mcrge 15, 3, pc, cr6, cr9, {3} @ │ │ ldmib sp, {r0, r4, r8, sp}^ │ │ vqdmlsl.s q8, d8, d0[5] │ │ cdpgt 1, 5, cr0, cr4, cr0, {0} │ │ @ instruction: 0xf0402800 │ │ ldcge 1, cr8, [r6, #-36] @ 0xffffffdc │ │ @ instruction: 0xf0002f00 │ │ - bcs 24b730 │ │ + bcs 2486d0 │ │ ldrthi pc, [r7], r0, asr #32 @ │ │ @ instruction: 0xf04f687a │ │ ldmib r8, {r8, r9, lr}^ │ │ @ instruction: 0xf8d7010a │ │ subsmi fp, r3, r0 │ │ @ instruction: 0x000bebb0 │ │ andeq lr, r3, r1, ror fp │ │ @@ -9614,117 +6518,117 @@ │ │ strhi pc, [lr], r0, asr #4 │ │ ldrsbne lr, [r1], #-157 @ 0xffffff63 │ │ stmdahi r5!, {r3, r4, r6, r9, fp, sp, pc} │ │ andcs lr, r0, sp, asr #19 │ │ ldrbmi r4, [sl], -r8, asr #12 │ │ stmib sp, {r1, r3, r4, r6, r8, sl, ip, pc}^ │ │ movwls r4, #26200 @ 0x6658 │ │ - @ instruction: 0xf872f01d │ │ + blx 9e4320 │ │ @ instruction: 0x9194f89d │ │ svcls 0x00642011 │ │ andeq pc, r0, r8, asr #5 │ │ @ instruction: 0xf0404287 │ │ - b 180b5fc │ │ + b 180859c │ │ @ instruction: 0xf50d70c9 │ │ adcsle r7, sl, r8, asr #19 │ │ ldmib r7, {r0, r1, r4, r6, r8, r9, sl, fp, ip, pc}^ │ │ andcc r0, r1, ip, lsl #2 │ │ addmi r6, r8, #56, 6 @ 0xe0000000 │ │ ldclge 6, cr15, [ip, #-252] @ 0xffffff04 │ │ addmi r6, r8, #189440 @ 0x2e400 │ │ ldmib r7, {r0, r1, r2, r3, r5, r7, r8, fp, ip, lr, pc}^ │ │ strbmi r1, [r8], -r9, lsl #4 │ │ stmib sp, {r1, r2, r5, r6, r8, sl, ip, pc}^ │ │ - @ instruction: 0xf02f4664 │ │ - @ instruction: 0x4602f8b9 │ │ + @ instruction: 0xf0324664 │ │ + @ instruction: 0x4602f9f1 │ │ @ instruction: 0x460b4638 │ │ - stc2l 0, cr15, [lr, #32]! │ │ + @ instruction: 0xff02f00b │ │ stmdacs r0, {r1, r2, r9, fp, ip, pc} │ │ - bvs ffe5f5d0 │ │ + bvs ffe5c570 │ │ strmi lr, [r0, #-2512] @ 0xfffff630 │ │ stmdavs r0!, {r1, r2, r5, r7, fp, sp, lr} │ │ andle r4, fp, r6, lsl #5 │ │ ldclne 8, cr6, [r1], #-384 @ 0xfffffe80 │ │ eorslt pc, r6, r0, asr #16 │ │ sbceq lr, r6, r0, lsl #22 │ │ subvs r6, r2, r1, lsr #1 │ │ addmi r6, r1, #40, 16 @ 0x280000 │ │ ldr sp, [r5, #-2445]! @ 0xfffff673 │ │ - @ instruction: 0xf0074620 │ │ - bls 1eb1e4 │ │ + @ instruction: 0xf00b4620 │ │ + bls 1e65d4 │ │ stmdbls fp, {r1, r2, r3, r5, r6, r7, r8, r9, sl, sp, lr, pc} │ │ andls r2, r1, r0 │ │ andcs r4, r8, #72, 12 @ 0x4800000 │ │ - @ instruction: 0xf01e2300 │ │ - @ instruction: 0xf50dfd4d │ │ + @ instruction: 0xf0212300 │ │ + @ instruction: 0xf50dff01 │ │ ldmib sp, {r2, r3, r6, r7, r8, r9, fp, ip, sp, lr}^ │ │ ldm fp, {r2, r5, r6, r8, r9, sl} │ │ stmdacs r0, {r2, r4, fp} │ │ addhi pc, ip, r0, asr #32 │ │ svccs 0x0000ad16 │ │ - bcs 25f544 │ │ + bcs 25c4e4 │ │ strbhi pc, [r1], -r0, asr #32 @ │ │ @ instruction: 0xf04f687a │ │ ldmib r8, {r8, r9, lr}^ │ │ ldmdavs lr!, {r1, r3, r8} │ │ - beq 125dc8 │ │ - bl 1c721c4 │ │ - blle ff72b3f0 │ │ + beq 122d68 │ │ + bl 1c6f164 │ │ + blle ff728390 │ │ @ instruction: 0x4632a836 │ │ - @ instruction: 0xf0084653 │ │ - stmdacs r0, {r0, r1, r3, r5, r7, r8, sl, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xf00b4653 │ │ + stmdacs r0, {r0, r1, r2, r3, r4, r5, r7, r9, sl, fp, ip, sp, lr, pc} │ │ @ instruction: 0xf1bbd0d5 │ │ vmax.f32 d16, d0, d1 │ │ ldmib sp, {r0, r1, r2, r3, r4, r9, sl, pc}^ │ │ - bge 162f528 │ │ + bge 162c4c8 │ │ ldrbmi r8, [r3], -r5, lsr #16 │ │ andcs lr, r0, sp, asr #19 │ │ ldrtmi r4, [r2], -r8, asr #12 │ │ stmib sp, {r1, r3, r4, r6, r8, sl, ip, pc}^ │ │ - @ instruction: 0xf01c4b58 │ │ - @ instruction: 0xf89dfff5 │ │ + @ instruction: 0xf0204b58 │ │ + @ instruction: 0xf89df9a9 │ │ mulscs r1, r4, r1 │ │ vqrdmlsh.s d25, d8, d0[5] │ │ addmi r0, r7, #0 │ │ - b 181f900 │ │ + b 181c8a0 │ │ @ instruction: 0xf50d70c9 │ │ adcsle r7, r6, r8, asr #19 │ │ ldmib r7, {r0, r1, r4, r6, r8, r9, sl, fp, ip, pc}^ │ │ andcc r0, r1, ip, lsl #2 │ │ addmi r6, r8, #56, 6 @ 0xe0000000 │ │ stclge 6, cr15, [r0], #252 @ 0xfc │ │ addmi r6, r8, #189440 @ 0x2e400 │ │ ldmib r7, {r0, r1, r3, r5, r7, r8, fp, ip, lr, pc}^ │ │ strbmi r1, [r8], -r9, lsl #4 │ │ stmib sp, {r1, r2, r5, r6, r8, sl, ip, pc}^ │ │ - @ instruction: 0xf02f4b64 │ │ - @ instruction: 0x4602f83d │ │ + @ instruction: 0xf0324b64 │ │ + @ instruction: 0x4602f975 │ │ @ instruction: 0x460b4638 │ │ - ldc2l 0, cr15, [r2, #-32]! @ 0xffffffe0 │ │ + cdp2 0, 8, cr15, cr6, cr11, {0} │ │ addsle r2, ip, r0, lsl #16 │ │ ldmib r0, {r3, r4, r5, r6, r7, r9, fp, sp, lr}^ │ │ stmiavs pc!, {sl, ip, lr} @ │ │ addmi r6, r7, #40, 16 @ 0x280000 │ │ stmdavs r8!, {r2, r3, ip, lr, pc}^ │ │ @ instruction: 0xf8401c79 │ │ - bl 4353c │ │ + bl 404dc │ │ adcvs r0, r9, r7, asr #1 │ │ andge pc, r4, r0, asr #17 │ │ addmi r6, r1, #32, 16 @ 0x200000 │ │ ldrt sp, [r9], #2441 @ 0x989 │ │ - @ instruction: 0xf0074628 │ │ - @ instruction: 0xe7eeff1d │ │ + @ instruction: 0xf00b4628 │ │ + @ instruction: 0xe7eef831 │ │ @ instruction: 0xf04f2611 │ │ vqdmlal.s q8, d8, d1 │ │ ldrtmi r0, [r7], -r0, lsl #12 │ │ stmdbls r5, {r0, r1, r2, r5, sp, lr, pc} │ │ - bls 19b4cd0 │ │ + bls 19b1c70 │ │ streq pc, [r0], -r8, asr #5 │ │ stmvc r8, {r0, r1, r2, r3, r9, ip, pc} │ │ - bls 1a0d4bc │ │ + bls 1a0a45c │ │ andmi lr, r0, r1, asr #20 │ │ andls r9, sp, lr, lsl #4 │ │ ands sl, r8, r6, lsl sp │ │ stmdbeq r1, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ @ instruction: 0x465e465f │ │ ldmib sp, {r0, r1, r4, sp, lr, pc}^ │ │ tstls fp, r6, rrx │ │ @@ -9733,180 +6637,180 @@ │ │ strlt lr, [lr], #-2509 @ 0xfffff633 │ │ vsra.s8 d18, d1, #8 │ │ and r0, r1, r0, lsl #2 │ │ strvs lr, [lr], #-2509 @ 0xfffff633 │ │ vldrge s0, [r6, #-64] @ 0xffffffc0 │ │ mulls sp, r1, r6 │ │ ldmdage lr, {r1, r2, r3, r9, sl, lr}^ │ │ - stc2l 0, cr15, [r0, #-112]! @ 0xffffff90 │ │ + @ instruction: 0xff14f01f │ │ stmdacs r0, {r1, r2, r3, r4, r6, fp, ip, pc} │ │ ldmdals pc, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ @ │ │ - b fe4676ac │ │ + b ff1e4658 │ │ @ instruction: 0xf50d464c │ │ ldrtmi r7, [sl], r8, asr #19 │ │ svcge 0x00269b10 │ │ @ instruction: 0xf04fe03b │ │ strmi r0, [lr], -r1, lsl #18 │ │ strb r4, [sl, pc, lsl #12]! │ │ @ instruction: 0xf8cd0a18 │ │ movwls fp, #45112 @ 0xb038 │ │ andcs lr, r1, r5, asr #10 │ │ ldrcs r9, [r1, -pc, lsl #24] │ │ - bleq fe667948 │ │ + bleq fe6648e8 │ │ streq pc, [r0, -r8, asr #5] │ │ and r9, ip, fp │ │ @ instruction: 0xad169905 │ │ @ instruction: 0xf10d900b │ │ ldmib sp, {r3, r4, r7, r8, r9, fp}^ │ │ stmvc r8, {r1, r2, r5, r6, r9, lr} │ │ andls r8, lr, #589824 @ 0x90000 │ │ andmi lr, r0, r1, asr #20 │ │ ldmdage lr, {r0, r2, r3, ip, pc}^ │ │ - ldc2 0, cr15, [r0, #-112]! @ 0xffffff90 │ │ + mcr2 0, 7, pc, cr4, cr15, {0} @ │ │ stmdacs r0, {r1, r2, r3, r4, r6, fp, ip, pc} │ │ ldmdals pc, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ @ │ │ - b 186770c │ │ + b fe5e46b8 │ │ ldrtmi r9, [sl], lr, lsl #28 │ │ - @ instruction: 0xf01ca858 │ │ - ldmdals r8, {r0, r2, r5, r8, sl, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf01fa858 │ │ + ldmdals r8, {r0, r3, r4, r6, r7, r9, sl, fp, ip, sp, lr, pc}^ │ │ svclt 0x001c2800 │ │ - @ instruction: 0xf0719859 │ │ - stmib sp, {r1, r2, r4, r6, r9, fp, sp, lr, pc}^ │ │ + @ instruction: 0xf0749859 │ │ + stmib sp, {r2, r3, r7, r9, fp, sp, lr, pc}^ │ │ ldrcs r6, [r1], -lr, lsl #8 │ │ streq pc, [r0], -r8, asr #5 │ │ - blls 452598 │ │ + blls 44f538 │ │ ldrmi r4, [r2, #1631]! @ 0x65f │ │ @ instruction: 0xf108d113 │ │ ubfxeq r0, r8, #16, #1 │ │ - bge fe468778 │ │ + bge fe465718 │ │ @ instruction: 0x4620e012 │ │ - cdp2 0, 9, cr15, cr6, cr7, {0} │ │ + @ instruction: 0xffaaf00a │ │ ldmdage lr!, {r0, r1, r4, r5, r6, r8, sl, sp, lr, pc} │ │ - ldc2l 0, cr15, [r2], #-24 @ 0xffffffe8 │ │ + stc2 0, cr15, [r8, #-36] @ 0xffffffdc │ │ @ instruction: 0xf1b59d38 │ │ @ instruction: 0xf0404f00 │ │ ldrtmi r8, [r2], r9, lsr #9 │ │ strls lr, [fp], #-35 @ 0xffffffdd │ │ - blne 3a5d14 │ │ + blne 3a2cb4 │ │ and r9, r0, pc, lsl #20 │ │ ldmdage lr!, {r1, r4, r5, r7, r9, sl, lr} │ │ andls r9, pc, #1073741827 @ 0x40000003 │ │ - stc2l 0, cr15, [r0], #-24 @ 0xffffffe8 │ │ + ldc2l 0, cr15, [r6], #36 @ 0x24 │ │ @ instruction: 0xf1b59d38 │ │ andsle r4, r4, r0, lsl #30 │ │ @ instruction: 0x9639e9dd │ │ cmplt lr, r4, asr r6 │ │ streq pc, [r4, -r9, lsl #2] │ │ stceq 8, cr15, [r4], {87} @ 0x57 │ │ svclt 0x001c2800 │ │ - @ instruction: 0xf0ad6838 │ │ - @ instruction: 0x370ce8fa │ │ + @ instruction: 0xf0b06838 │ │ + smladxcc ip, r2, r9, lr │ │ mvnsle r3, r1, lsl #28 │ │ tstlt r5, r2, lsr #13 │ │ - @ instruction: 0xf0ad4648 │ │ - ldmib sp, {r1, r4, r5, r6, r7, fp, sp, lr, pc}^ │ │ + @ instruction: 0xf0b04648 │ │ + ldmib sp, {r1, r3, r5, r8, fp, sp, lr, pc}^ │ │ cmplt r5, pc, lsr #10 │ │ ldreq pc, [r0], -r4, lsl #2 │ │ stmdacs r0, {r4, r5, fp, sp, lr} │ │ ldmdavs r0!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ - stmia r6!, {r0, r2, r3, r5, r7, ip, sp, lr, pc}^ │ │ + ldmdb lr, {r4, r5, r7, ip, sp, lr, pc} │ │ stccc 6, cr3, [r1, #-192] @ 0xffffff40 │ │ stmdals lr!, {r1, r2, r4, r5, r6, r7, r8, ip, lr, pc} │ │ svclt 0x001c2800 │ │ - @ instruction: 0xf0ad4620 │ │ - ldmib sp, {r1, r2, r3, r4, r6, r7, fp, sp, lr, pc}^ │ │ + @ instruction: 0xf0b04620 │ │ + ldmib sp, {r1, r2, r4, r8, fp, sp, lr, pc}^ │ │ cmplt r5, r9, lsr #10 │ │ @ instruction: 0xf8561d26 │ │ stmdacs r0, {r2, sl, fp} │ │ ldmdavs r0!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ - ldm r2, {r0, r2, r3, r5, r7, ip, sp, lr, pc}^ │ │ + stmdb sl, {r4, r5, r7, ip, sp, lr, pc} │ │ stccc 6, cr3, [r1, #-48] @ 0xffffffd0 │ │ stmdals r8!, {r0, r2, r4, r5, r6, r7, r8, ip, lr, pc} │ │ svclt 0x001c2800 │ │ - @ instruction: 0xf0ad4620 │ │ - bls 32595c │ │ + @ instruction: 0xf0b04620 │ │ + bls 3229dc │ │ andscs sl, r1, r6, lsl ip │ │ andeq pc, r0, r8, asr #5 │ │ smlabble r3, r2, r5, r4 │ │ - beq 4a7f44 │ │ - beq 68168 │ │ + beq 4a4ee4 │ │ + beq 65108 │ │ @ instruction: 0xf8dd46d1 │ │ @ instruction: 0xf8daa028 │ │ stmdacs r0, {r6} │ │ ldrthi pc, [lr], #64 @ 0x40 @ │ │ rscscc pc, pc, pc, asr #32 │ │ @ instruction: 0xf8ca46a4 │ │ ldrmi r0, [r0], r0, asr #32 │ │ ldm ip!, {r1, r2, r3, r4, r5, r8, fp, sp, pc} │ │ strmi r0, [r8], -ip, ror #1 │ │ ldm ip!, {r2, r3, r5, r6, r7, lr, pc} │ │ rscgt r0, ip, ip, ror #1 │ │ smlalseq lr, ip, ip, r8 │ │ stmdage r6!, {r2, r3, r4, r5, r6, r7, lr, pc} │ │ - @ instruction: 0xf81cf020 │ │ + @ instruction: 0xf9d0f023 │ │ ldmib sl, {r1, r2, r5, r9, fp, sp, pc}^ │ │ @ instruction: 0xf8da5411 │ │ - bgt 2037bc │ │ + bgt 20075c │ │ svcmi 0x0000f1b5 │ │ movwgt r9, #31496 @ 0x7b08 │ │ teqlt r6, ip │ │ @ instruction: 0xf8574627 │ │ - @ instruction: 0xf0710b04 │ │ - @ instruction: 0x3e01e9b4 │ │ + @ instruction: 0xf0740b04 │ │ + @ instruction: 0x3e01e9ea │ │ stccs 1, cr13, [r0, #-996] @ 0xfffffc1c │ │ qadd16mi fp, r0, ip │ │ - stm sl, {r0, r2, r3, r5, r7, ip, sp, lr, pc} │ │ + stmia r2, {r4, r5, r7, ip, sp, lr, pc}^ │ │ ldrdeq pc, [r0], #-138 @ 0xffffff76 │ │ @ instruction: 0xf8ca3001 │ │ andscs r0, r1, r0, asr #32 │ │ andeq pc, r0, r8, asr #5 │ │ smlawble fp, r1, r5, r4 │ │ vadd.i8 d25, d0, d7 │ │ ldmdbls r3, {r0, r4, r8, r9, fp} │ │ - bleq 681f0 │ │ + bleq 65190 │ │ andsvs r6, r1, r2, asr #16 │ │ ldrhi lr, [r1, #-2525] @ 0xfffff623 │ │ stmvs r4, {r0, r5, r7, r8, ip, sp, pc} │ │ ldmibeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ strcs r0, [r0], -pc, asr #1 │ │ stmibpl r8!, {r0, r3, r5, r7, r8, fp, ip} │ │ stmdavs r9, {r1, r4, r6, r9, sl, lr}^ │ │ smlabteq r0, sp, r9, lr │ │ strtmi r4, [r1], -r8, asr #12 │ │ - stc2 0, cr15, [r2, #164] @ 0xa4 │ │ + cdp2 0, 11, cr15, cr10, cr12, {1} │ │ ldrbmi r9, [r8, #-2110] @ 0xfffff7c2 │ │ strcc sp, [r8], -r2, lsr #2 │ │ - strhle r4, [pc, #39] @ 2b72b │ │ + strhle r4, [pc, #39] @ 286cb │ │ svceq 0x0000f1b8 │ │ qadd16mi fp, r8, ip │ │ - ldmda sl, {r0, r2, r3, r5, r7, ip, sp, lr, pc}^ │ │ + ldm r2, {r4, r5, r7, ip, sp, lr, pc} │ │ @ instruction: 0xf8c09809 │ │ rsblt fp, fp, r0 │ │ svchi 0x00f0e8bd │ │ - blx 1811f54 │ │ + blx 180eef4 │ │ ldmdals r1, {r3, r7, r8, ip, sp, lr, pc} │ │ tstcs r2, r1, asr #20 │ │ stmdacs r0, {r0, r3, r9, fp, ip, pc} │ │ smlabtls r0, r2, r9, lr │ │ stmib r2, {r0, r1, r2, r3, r8, fp, ip, pc}^ │ │ rscle r1, lr, r2, lsl #22 │ │ - @ instruction: 0xf0ad9812 │ │ - rsblt lr, fp, r4, asr #16 │ │ + @ instruction: 0xf0b09812 │ │ + rsblt lr, fp, ip, ror r8 │ │ svchi 0x00f0e8bd │ │ @ instruction: 0xf1b89e09 │ │ @ instruction: 0xf8dd0f00 │ │ @ instruction: 0xf89d1101 │ │ @ instruction: 0xf8dd30fc │ │ - bls 1087b4c │ │ + bls 1084aec │ │ andne pc, r9, r6, asr #17 │ │ andvc pc, r5, r6, asr #17 │ │ ldrshvc r6, [r3, -r2]! │ │ sbcsle r6, r6, r0, lsr r0 │ │ - @ instruction: 0xf0ad4628 │ │ - rsblt lr, fp, ip, lsr #16 │ │ + @ instruction: 0xf0b04628 │ │ + rsblt lr, fp, r4, ror #16 │ │ svchi 0x00f0e8bd │ │ andmi pc, r0, pc, asr #32 │ │ and r9, r6, r8, lsr #32 │ │ ldrbmi ip, [r8], -lr, lsl #29 │ │ addgt r4, lr, r5, asr #12 │ │ umulleq lr, lr, r6, r8 @ │ │ @ instruction: 0xf815c08e │ │ @@ -9921,1554 +6825,822 @@ │ │ andls r1, r6, r8, ror sp │ │ stmdals ip, {r4, r8, sl, ip, pc} │ │ @ instruction: 0xf0004581 │ │ ldmdbge r8, {r1, r2, r4, r6, r8, r9, pc}^ │ │ ldmdbge r6, {r0, r1, r4, r6, r8, ip, pc} │ │ ldrbmi r9, [sl], -r8, lsr #16 │ │ cmppl r1, sp, asr #19 │ │ - blmi 67e8c │ │ + blmi 64e2c │ │ @ instruction: 0x1010f8d9 │ │ @ instruction: 0x4693bf18 │ │ stmdbcs r0, {r0, sp} │ │ @ instruction: 0xf081bf48 │ │ mvnlt r4, r0 │ │ strls r2, [pc], -r1, lsl #16 │ │ ldcge 1, cr13, [r6], {47} @ 0x2f │ │ ldrsbtcs pc, [r0], -r9 @ │ │ @ instruction: 0x462e4638 │ │ @ instruction: 0xf8cd4621 │ │ - @ instruction: 0xf01eb15c │ │ - ldmib sp, {r0, r2, r7, r9, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf021b15c │ │ + ldmib sp, {r0, r3, r4, r5, sl, fp, ip, sp, lr, pc}^ │ │ ldmib sp, {r1, r2, r4, r5, r9, fp, ip}^ │ │ - bls eccce4 │ │ + bls ec9c84 │ │ teqle lr, r2, lsl #18 │ │ tstcs r8, pc, asr #20 │ │ ldrtmi r4, [r5], -r8, lsr #12 │ │ andne lr, sp, #3358720 @ 0x334000 │ │ - bleq fe667c4c │ │ + bleq fe664bec │ │ adcs r4, pc, #6291456 @ 0x600000 │ │ @ instruction: 0x2018f8d9 │ │ @ instruction: 0x4638a916 │ │ - blx 1be78a0 │ │ - beq de5fa0 │ │ + stc2 0, cr15, [r2], #-132 @ 0xffffff7c │ │ + beq de2f40 │ │ teqhi r8, sp @ │ │ stmdacs r2, {r1, r3, r4, r5, r9, fp, ip, pc} │ │ - b 141fd60 │ │ + b 141cd00 │ │ @ instruction: 0x460e2018 │ │ andeq lr, sp, #3358720 @ 0x334000 │ │ - bleq fe667c78 │ │ + bleq fe664c18 │ │ strtmi lr, [ip], -sl, lsr #5 │ │ ldcge 8, cr10, [r6, #-324] @ 0xfffffebc │ │ ldrsbtcs pc, [r8], -r9 @ │ │ ldmdage r7, {r0, r2, r4, r6, ip, pc}^ │ │ @ instruction: 0x46389054 │ │ ldmib r9, {r0, r3, r5, r9, sl, lr}^ │ │ @ instruction: 0xf8cd8a06 │ │ - @ instruction: 0xf01eb15c │ │ - strtmi pc, [r9], -pc, asr #20 │ │ + @ instruction: 0xf021b15c │ │ + strtmi pc, [r9], -r3, lsl #24 │ │ stccs 13, cr9, [r2, #-216] @ 0xffffff28 │ │ ldmib sp, {r1, r2, r6, r8, ip, lr, pc}^ │ │ @ instruction: 0xf10d6039 │ │ ldmib sp, {r3, r4, r7, r8, r9, fp}^ │ │ @ instruction: 0x4625a837 │ │ - b 140f8b8 │ │ + b 140c858 │ │ andls r2, sp, r8, lsl r0 │ │ - blls f242b0 │ │ + blls f21250 │ │ stmib sp, {r3, r4, r5, r9, sl, lr}^ │ │ ldmdbge r1, {r1, r2, r3, r4, r6, r9, fp, ip}^ │ │ ldmdbge lr, {r1, r2, r4, r6, r8, ip, pc}^ │ │ strbhi lr, [r0, #-2509]! @ 0xfffff633 │ │ ldmdbge r7, {r0, r2, r4, r6, r8, ip, pc}^ │ │ @ instruction: 0x46219154 │ │ cmncs r2, #3358720 @ 0x334000 │ │ ldrdcs pc, [r0], -r9 │ │ @ instruction: 0xb050f899 │ │ @ instruction: 0x8051f899 │ │ - blx a6792c │ │ + blx ff7648da │ │ ldmib sp, {r3, r4, r5, r9, sl, fp, sp, pc}^ │ │ @ instruction: 0xce640a36 │ │ teqle fp, r2, lsl #16 │ │ @ instruction: 0x46140a10 │ │ @ instruction: 0xf10d900d │ │ subs r0, sl, #152, 22 @ 0x26000 │ │ stmib sp, {r0, r1, r3, r4, r5, r8, r9, fp, ip, pc}^ │ │ strbeq r0, [r0, r4, ror #20] │ │ cmnhi r6, sp, asr #19 │ │ cmncs r8, #3358720 @ 0x334000 │ │ cmnphi r6, #0 @ p-variant is OBSOLETE │ │ msreq CPSR_, #1073741826 @ 0x40000002 │ │ - bne 45e524 │ │ + bne 45b4c4 │ │ andeq lr, r1, r3, ror fp │ │ adchi pc, ip, r0, lsl #5 │ │ vshl.s8 d18, d1, d0 │ │ vshrn.i16 d16, , #8 │ │ cmn ip, r0, lsl #16 │ │ eorsgt lr, r7, #3620864 @ 0x374000 │ │ stmib sp, {r3, r4, r5, r9, sl, lr}^ │ │ @ instruction: 0xf8d9c25f │ │ ldmib sp, {r5, sp}^ │ │ mrcls 7, 1, r3, cr11, cr9, {1} │ │ strbcc lr, [r1, -sp, asr #19]! │ │ ldrbls r9, [lr, #-1635] @ 0xfffff99d │ │ - @ instruction: 0xf9f4f01e │ │ + blx fea64942 │ │ ldreq lr, [r6, #-2525]! @ 0xfffff623 │ │ @ instruction: 0x3738e9dd │ │ stmdacs r2, {r1, r3, r4, r5, r9, sl, fp, ip, pc} │ │ - beq 65fe00 │ │ + beq 65cda0 │ │ mulls sp, r8, r6 │ │ - bleq fe667d68 │ │ + bleq fe664d08 │ │ mvns r4, r2, lsr #13 │ │ - blge 19d1e28 │ │ - beq 1966074 │ │ + blge 19cedc8 │ │ + beq 1963014 │ │ cmngt r4, #192, 14 @ 0x3000000 │ │ eorge pc, ip, sp, asr #17 │ │ @ instruction: 0xf0009169 │ │ ldmib r9, {r0, r1, r2, r3, r4, r5, r8, r9, pc}^ │ │ ldmib r9, {r1, r4, r9, sl, ip, sp, lr}^ │ │ ldrtmi r5, [r2], -pc, lsl #8 │ │ mlage r8, r9, r8, pc @ │ │ @ instruction: 0x463842b4 │ │ qasxmi fp, r2, r8 │ │ - @ instruction: 0xf0ac4629 │ │ - adcmi lr, r6, #504 @ 0x1f8 │ │ + @ instruction: 0xf0af4629 │ │ + adcmi lr, r6, #728 @ 0x2d8 │ │ tstpeq r0, pc, asr #32 @ p-variant is OBSOLETE │ │ tstcs r1, r8, lsr pc │ │ @ instruction: 0xf04f2800 │ │ svclt 0x00480000 │ │ svclt 0x00082001 │ │ stmdacs r0, {r3, r9, sl, lr} │ │ strcs sp, [r1], #-126 @ 0xffffff82 │ │ ldrcs r9, [r1, -pc, lsl #26] │ │ - bleq fe667dc4 │ │ + bleq fe664d64 │ │ streq pc, [r0, -r8, asr #5] │ │ ldmdbls fp!, {r1, r3, r5, r6, r7, r8, sp, lr, pc} │ │ - bleq fe667dd0 │ │ + bleq fe664d70 │ │ strbeq lr, [r4, #-2509]! @ 0xfffff633 │ │ stmib sp, {r6, r7, r8, r9, sl}^ │ │ stmib sp, {r1, r2, r5, r6, r8, r9, sl, ip, sp}^ │ │ @ instruction: 0xf0006168 │ │ andcs r8, r8, pc, lsl #6 │ │ strtmi r4, [r5], -lr, lsr #12 │ │ - svc 0x001ef0ac │ │ + svc 0x005ef0af │ │ stmdacs r0, {r1, r2, r4, r5, r8, r9, sl, fp, sp, pc} │ │ movthi pc, #16384 @ 0x4000 @ │ │ smlabbmi r0, sl, r0, pc @ │ │ strmi r6, [r4], -r1, asr #32 │ │ andcs r2, r8, #0, 2 │ │ andhi pc, r0, r0, asr #17 │ │ smlabtcs r0, sp, r9, lr │ │ @ instruction: 0x46314638 │ │ @ instruction: 0x46232210 │ │ - blx 9e7a58 │ │ - @ instruction: 0xf0ac4620 │ │ - ldcls 14, cr14, [r7], #-960 @ 0xfffffc40 │ │ + blx ff6e4a06 │ │ + @ instruction: 0xf0af4620 │ │ + ldcls 15, cr14, [r7], #-160 @ 0xffffff60 │ │ stmdacs r1, {r1, r2, r4, r5, fp, ip, pc} │ │ stccs 0, cr13, [r0], {35} @ 0x23 │ │ rschi pc, r9, r0 │ │ ldmdbge lr, {r0, r3, r4, r5, r8, r9, fp, ip, pc}^ │ │ - bge 1551ae4 │ │ + bge 154ea84 │ │ ldrtmi r9, [r8], -r0 │ │ - blx fe0e7a28 │ │ + @ instruction: 0xf80cf00c │ │ smullshi pc, ip, sp, r8 @ │ │ ldcls 0, cr2, [r6], #-68 @ 0xffffffbc │ │ andeq pc, r0, r8, asr #5 │ │ @ instruction: 0xf0404284 │ │ - b 180bd84 │ │ + b 1808d24 │ │ @ instruction: 0xf00070c8 │ │ andcs r8, r0, r9, ror r1 │ │ andls r4, r1, r1, lsr r6 │ │ andcs r4, r9, #56, 12 @ 0x3800000 │ │ - @ instruction: 0xf01e2300 │ │ - @ instruction: 0x9c37f9ff │ │ + @ instruction: 0xf0212300 │ │ + @ instruction: 0x9c37fbb3 │ │ stmdacs r1, {r1, r2, r4, r5, fp, ip, pc} │ │ ldmdbls r8!, {r0, r1, r3, r4, r6, r7, r8, ip, lr, pc} │ │ andls r9, pc, r9, lsr r8 @ │ │ @ instruction: 0x4688983a │ │ - beq 24fa7c │ │ + beq 24ca1c │ │ cmn r8, sp │ │ mlasmi r0, r9, r8, pc @ │ │ ldrdeq lr, [sl, -r9] │ │ eorge pc, ip, sp, asr #17 │ │ streq pc, [r1, -r4, lsl #1] │ │ movwcs lr, #35289 @ 0x89d9 │ │ addeq lr, r3, sp, lsl #17 │ │ stmdbls fp, {r1, r2, r4, r5, r8, r9, sl, fp, sp, pc} │ │ - @ instruction: 0xf0094638 │ │ - ldmib sp, {r0, r1, r2, r3, r5, sl, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf00c4638 │ │ + ldmib sp, {r0, r1, r4, r5, r6, r7, sl, fp, ip, sp, lr, pc}^ │ │ ldmdbls sl!, {r3, r4, r5, ip, sp} │ │ ldmdacs r6!, {r0, r2, r3, r4, r6, r7, r8, fp, sp, lr, pc} │ │ @ instruction: 0xd1222a01 │ │ @ instruction: 0x461c0a1a │ │ smlabtcs sp, sp, r9, lr │ │ adcs r4, r8, r6, lsl #12 │ │ andeq pc, r1, sl, lsl #1 │ │ smlabbeq r1, r8, r0, pc @ │ │ strtmi r4, [r3], -sl, lsr #12 │ │ andne lr, r2, sp, asr #19 │ │ stmdbls fp, {r1, r2, r4, r5, fp, sp, pc} │ │ strvc lr, [r0], -sp, asr #19 │ │ - blx 967ac6 │ │ + stc2 0, cr15, [lr, #48]! @ 0x30 │ │ teqcs r9, #3620864 @ 0x374000 │ │ @ instruction: 0x0736e9dd │ │ cmnle r6, r1, lsl #16 │ │ @ instruction: 0x46159838 │ │ - bleq fe667ee8 │ │ - beq 3d2c8 │ │ + bleq fe664e88 │ │ + beq 3a268 │ │ movweq lr, #55757 @ 0xd9cd │ │ @ instruction: 0xf1b8e156 │ │ @ instruction: 0xf43f0f00 │ │ - bge 149771c │ │ + bge 14946bc │ │ andcc lr, r0, sp, asr #19 │ │ ldrtmi r9, [r8], -r2, lsl #2 │ │ @ instruction: 0x46434659 │ │ - blx fe7e7b02 │ │ + ldc2l 0, cr15, [r2, #-52] @ 0xffffffcc │ │ smullsne pc, ip, sp, r8 @ │ │ @ instruction: 0xf8dd2011 │ │ vshr.s64 q12, q4, #56 │ │ strmi r0, [r0] │ │ @ instruction: 0x07c8d17b │ │ sbchi pc, lr, r0 │ │ stccs 0, cr2, [r0], {12} │ │ andcs fp, r8, r8, lsl #30 │ │ tstle r1, r5 │ │ ldrbmi lr, [r5], -sl, lsl #1 │ │ stmdbls fp, {sp} │ │ movwcs r9, #2565 @ 0xa05 │ │ ldmdage r6!, {r0, ip, pc} │ │ - @ instruction: 0xf98ef01e │ │ + blx 10e4b36 │ │ teqcc r8, sp @ │ │ ldmib sp, {r1, r3, r4, r5, fp, ip, pc}^ │ │ - bcs 75bf4 │ │ + bcs 72b94 │ │ orrhi pc, ip, r0 │ │ svceq 0x0000f1b8 │ │ mcrge 4, 7, pc, cr4, cr15, {1} @ │ │ @ instruction: 0xf0402b08 │ │ strtmi r8, [sl], r2, lsl #5 │ │ movwcs lr, #35289 @ 0x89d9 │ │ ldrdmi pc, [r0], -r8 │ │ strmi pc, [r0, -pc, asr #32] │ │ ldrdpl pc, [r4], -r8 │ │ - b fe1725cc │ │ - bl 1d6cf64 │ │ - blle ff62c358 │ │ + b fe16f56c │ │ + bl 1d69f04 │ │ + blle ff6292f8 │ │ andls r2, r2, r8, lsl #4 │ │ smlabtcs r0, sp, r9, lr │ │ - bge 1495c30 │ │ + bge 1492bd0 │ │ @ instruction: 0x46434659 │ │ - blx 16e7b8a │ │ + stc2 0, cr15, [lr, #-52] @ 0xffffffcc │ │ smullsmi pc, ip, sp, r8 @ │ │ @ instruction: 0xf8dd2011 │ │ @ instruction: 0x465580d8 │ │ andeq pc, r0, r8, asr #5 │ │ teqle r7, r0, lsl #11 │ │ bicle r0, r3, r0, ror #15 │ │ - stcls 0, cr14, [pc, #-544] @ 2b95c │ │ + stcls 0, cr14, [pc, #-544] @ 288fc │ │ @ instruction: 0xf0002f00 │ │ ldmdage r6!, {r3, r5, r6, r7, pc} │ │ - @ instruction: 0xf009a954 │ │ - @ instruction: 0xf89dffc7 │ │ + @ instruction: 0xf00ca954 │ │ + @ instruction: 0xf89dff85 │ │ ldrsbcs r4, [r1], -ip │ │ @ instruction: 0xf2c89f36 │ │ addmi r0, r7, #0 │ │ sbcshi pc, sp, r0, asr #32 │ │ @ instruction: 0xf00007e0 │ │ andcs r8, r8, r9, asr #2 │ │ - beq 367ce4 │ │ + beq 364c84 │ │ svceq 0x0000f1bb │ │ andcs fp, fp, r8, lsl pc │ │ @ instruction: 0xf04fbf18 │ │ @ instruction: 0xf1b80a0e │ │ svclt 0x00080f00 │ │ ldmdage r6!, {r1, r7, r9, sl, lr} │ │ stmdbls fp, {r0, r1, r2, r5, r6, r8, ip, lr, pc} │ │ @ instruction: 0xf04fe0f9 │ │ adc r0, r3, r1, lsl #16 │ │ - bls e51fe8 │ │ + bls e4ef88 │ │ stmvc r8, {r0, r1, r2, r3, r9, ip, pc} │ │ - bls e8dbfc │ │ + bls e8ab9c │ │ andmi lr, r0, r1, asr #20 │ │ andls r9, sp, lr, lsl #4 │ │ @ instruction: 0x460ce09b │ │ - bls e92000 │ │ + bls e8efa0 │ │ stmvc r8, {r3, r4, r5, r9, sl, fp, ip, pc} │ │ andls r8, lr, #589824 @ 0x90000 │ │ andmi lr, r0, r1, asr #20 │ │ stmdage r4!, {r0, r2, r3, ip, pc}^ │ │ - @ instruction: 0xf9d0f01c │ │ + blx fe164c1a │ │ @ instruction: 0xf10d9864 │ │ stmdacs r0, {r3, r4, r7, r8, r9, fp} │ │ stmdals r5!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ - mrc 0, 7, APSR_nzcv, cr14, cr0, {3} │ │ + svc 0x0034f073 │ │ strtmi r4, [r0], r2, asr #13 │ │ ldrbmi lr, [r5], -r4, asr #1 │ │ stmdbls fp, {sp} │ │ movwcs r9, #2565 @ 0xa05 │ │ ldmdage r6!, {r0, ip, pc} │ │ - @ instruction: 0xf904f01e │ │ + blx fee64c48 │ │ teqcc r8, sp @ │ │ ldmib sp, {r1, r3, r4, r5, fp, ip, pc}^ │ │ - bcs 35d08 │ │ + bcs 32ca8 │ │ tstphi r2, r0, asr #32 @ p-variant is OBSOLETE │ │ svceq 0x0000f1b8 │ │ mrcge 4, 2, APSR_nzcv, cr10, cr15, {1} │ │ @ instruction: 0xf0402b08 │ │ @ instruction: 0x46aa81f8 │ │ movwcs lr, #43481 @ 0xa9d9 │ │ ldrdmi pc, [r0], -r8 │ │ strmi pc, [r0, -pc, asr #32] │ │ ldrdpl pc, [r4], -r8 │ │ - b fe1728a0 │ │ - bl 1ced078 │ │ - blle ff62c474 │ │ + b fe16f840 │ │ + bl 1cea018 │ │ + blle ff629414 │ │ andls r2, r2, r8, lsl #4 │ │ smlabtcs r0, sp, r9, lr │ │ - bge 1495d44 │ │ + bge 1492ce4 │ │ @ instruction: 0x46434659 │ │ - blx ff467c9c │ │ + stc2 0, cr15, [r4], {13} │ │ smullsmi pc, ip, sp, r8 @ │ │ @ instruction: 0xf8dd2011 │ │ @ instruction: 0x465580d8 │ │ andeq pc, r0, r8, asr #5 │ │ @ instruction: 0xd1ad4580 │ │ bicle r0, r3, r0, ror #15 │ │ ldrt r2, [r0], -r0, lsl #8 │ │ tstcs r0, r6, lsr r8 │ │ tstls r1, r2, asr r6 │ │ stmdbls fp, {r8, r9, sp} │ │ - @ instruction: 0xf8c6f01e │ │ - bleq ff8680d8 │ │ + blx 1ee4cc4 │ │ + bleq ff865078 │ │ @ instruction: 0x0736e9dd │ │ ldmdaeq r8, {r0, r1, r3, r4, r7, fp, sp, lr, pc} │ │ @ instruction: 0xf0002801 │ │ svccs 0x000080c8 │ │ mcrge 4, 3, pc, cr7, cr15, {1} @ │ │ - streq lr, [pc, #-2521] @ 2b2e3 │ │ + streq lr, [pc, #-2521] @ 28283 │ │ @ instruction: 0x462a4639 │ │ svclt 0x003842ab │ │ @ instruction: 0x461e461a │ │ - stcl 0, cr15, [ip, #688] @ 0x2b0 │ │ + cdp 0, 0, cr15, cr4, cr15, {5} │ │ @ instruction: 0xf04f42b5 │ │ svclt 0x00880100 │ │ stmdacs r0, {r0, r8, sp} │ │ andeq pc, r0, pc, asr #32 │ │ andcs fp, r1, r8, asr #31 │ │ strmi fp, [r8], -r8, lsl #30 │ │ sbcsle r2, r3, r1, lsl #16 │ │ ldmdbge r4, {r1, r2, r4, r5, fp, sp, pc}^ │ │ ldrbmi r4, [fp], -r2, lsr #12 │ │ - @ instruction: 0xff12f009 │ │ + cdp2 0, 13, cr15, cr0, cr12, {0} │ │ smullsmi pc, ip, sp, r8 @ │ │ - bleq 4a85fc │ │ + bleq 4a559c │ │ @ instruction: 0xf2c89f36 │ │ - ldrbmi r0, [pc, #-2816] @ 2b204 │ │ + ldrbmi r0, [pc, #-2816] @ 281a4 │ │ adchi pc, r3, r0, asr #32 │ │ ldmdage r6!, {r5, r6, r7, r8, r9, sl} │ │ add sp, pc, r1, asr #3 │ │ stmdaeq r0, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ @ instruction: 0xf2c82411 │ │ stmdage r4!, {sl}^ │ │ - @ instruction: 0xf01c46aa │ │ - stmdals r4!, {r0, r2, r3, r4, r5, r8, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf01f46aa │ │ + stmdals r4!, {r0, r4, r5, r6, r7, r9, fp, ip, sp, lr, pc}^ │ │ svclt 0x001c2800 │ │ - @ instruction: 0xf0709865 │ │ - ldmib sp, {r1, r2, r3, r5, r6, r9, sl, fp, sp, lr, pc}^ │ │ + @ instruction: 0xf0739865 │ │ + ldmib sp, {r2, r5, r7, r9, sl, fp, sp, lr, pc}^ │ │ strtmi r6, [r5], -lr, lsl #14 │ │ - @ instruction: 0xf01ca85e │ │ - ldmdals lr, {r0, r4, r5, r8, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf01fa85e │ │ + ldmdals lr, {r0, r2, r5, r6, r7, r9, fp, ip, sp, lr, pc}^ │ │ svclt 0x001c2800 │ │ - @ instruction: 0xf070985f │ │ - strtmi lr, [r8], -r2, ror #28 │ │ + @ instruction: 0xf073985f │ │ + @ instruction: 0x4628ee98 │ │ ldrbmi r9, [r5], -lr, lsl #12 │ │ @ instruction: 0x4682463e │ │ strcs lr, [r1], #-36 @ 0xffffffdc │ │ stmdbls r6, {r0, r3, r4, r9, sl, sp, lr, pc} │ │ eorspl lr, r8, #3620864 @ 0x374000 │ │ stmdahi r9, {r3, r7, fp, ip, sp, lr} │ │ - b 109059c │ │ + b 108d53c │ │ andls r4, sp, r0 │ │ - bleq fe6681a0 │ │ - @ instruction: 0xf01ca864 │ │ - stmdals r4!, {r0, r2, r4, r8, fp, ip, sp, lr, pc}^ │ │ + bleq fe665140 │ │ + @ instruction: 0xf01fa864 │ │ + stmdals r4!, {r0, r3, r6, r7, r9, fp, ip, sp, lr, pc}^ │ │ svclt 0x001c2800 │ │ - @ instruction: 0xf0709865 │ │ - cdpls 14, 0, cr14, cr14, cr6, {2} │ │ + @ instruction: 0xf0739865 │ │ + mcrls 14, 0, lr, cr14, cr12, {3} │ │ ldmdage lr, {r1, r3, r4, r5, r7, r9, sl, lr}^ │ │ - @ instruction: 0xf90af01c │ │ + blx fefe4da4 │ │ stmdacs r0, {r1, r2, r3, r4, r6, fp, ip, pc} │ │ ldmdals pc, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ @ │ │ - mrc 0, 1, APSR_nzcv, cr10, cr0, {3} │ │ + mrc 0, 3, APSR_nzcv, cr0, cr3, {3} │ │ strtmi r9, [lr], -lr, lsl #12 │ │ ldcls 6, cr4, [r0, #-640] @ 0xfffffd80 │ │ vshr.s8 d18, d1, #8 │ │ strmi r0, [r2] │ │ @ instruction: 0xf109d174 │ │ svcge 0x00360958 │ │ sbcvc lr, r8, pc, asr sl │ │ - ldclge 4, cr15, [pc], #508 @ 2bfb0 │ │ + ldclge 4, cr15, [pc], #508 @ 28f50 │ │ stmdbls fp, {r0, r1, r2, r3, r5, r6, sp, lr, pc} │ │ andcs sl, r0, #3538944 @ 0x360000 │ │ andls r2, r1, #0, 6 │ │ - @ instruction: 0xf01e4652 │ │ - @ instruction: 0xf10df833 │ │ + @ instruction: 0xf0214652 │ │ + @ instruction: 0xf10df9e7 │ │ ldmib sp, {r5, r6, r7, r8, r9, fp}^ │ │ ldm fp, {r1, r2, r4, r5, r8, r9, sl} │ │ - bllt fec2de34 │ │ + bllt fec2add4 │ │ @ instruction: 0xf43f2f00 │ │ ldmib r9, {r1, r2, r4, r6, r7, r8, sl, fp, sp, pc}^ │ │ @ instruction: 0x46390512 │ │ adcmi r4, fp, #44040192 @ 0x2a00000 │ │ sasxmi fp, sl, r8 │ │ - @ instruction: 0xf0ac461e │ │ - adcsmi lr, r5, #60, 26 @ 0xf00 │ │ + @ instruction: 0xf0af461e │ │ + adcsmi lr, r5, #116, 26 @ 0x1d00 │ │ tstpeq r0, pc, asr #32 @ p-variant is OBSOLETE │ │ tstcs r1, r8, lsr pc │ │ @ instruction: 0xf04f2800 │ │ svclt 0x00480000 │ │ svclt 0x00082001 │ │ stmdacs r0, {r3, r9, sl, lr} │ │ ldmdage r6!, {r0, r2, r4, r6, r7, r8, ip, lr, pc} │ │ @ instruction: 0x4622a954 │ │ - @ instruction: 0xf009465b │ │ - @ instruction: 0xf89dfe81 │ │ + @ instruction: 0xf00c465b │ │ + @ instruction: 0xf89dfe3f │ │ vqadd.s8 q10, q8, q6 │ │ svcls 0x00360b11 │ │ - bleq 68944 │ │ + bleq 658e4 │ │ tstle r2, pc, asr r5 │ │ stmdbls fp, {r5, r6, r7, r8, r9, sl} │ │ bicle sl, r4, r6, lsr r8 │ │ str r2, [r9, #1024]! @ 0x400 │ │ str r2, [r8, #1024]! @ 0x400 │ │ - beq 64fe74 │ │ + beq 64ce14 │ │ ldrmi r4, [ip], -lr, lsl #12 │ │ @ instruction: 0x4625e6d8 │ │ - beq 63d6b8 │ │ + beq 63a658 │ │ eorslt pc, r8, sp, asr #17 │ │ stmdbls r6, {r0, r1, r3, r7, r8, r9, sl, sp, lr, pc} │ │ - bleq fe668288 │ │ + bleq fe665228 │ │ eorspl lr, r8, #3620864 @ 0x374000 │ │ stmdahi r9, {r3, r7, fp, ip, sp, lr} │ │ - b 1090698 │ │ + b 108d638 │ │ andls r4, sp, r0 │ │ ldmdage lr!, {r1, r7, r8, r9, sl, sp, lr, pc} │ │ - @ instruction: 0xf802f006 │ │ + @ instruction: 0xf898f009 │ │ @ instruction: 0xf1b59d28 │ │ @ instruction: 0xf0404f00 │ │ vhadd.s8 d24, d16, d3 │ │ @ instruction: 0xac160a11 │ │ - beq 689a0 │ │ + beq 65940 │ │ vshr.s8 d18, d1, #8 │ │ strmi r0, [r2] │ │ - blge ff7e9088 │ │ - bllt ff669e8c │ │ - bleq 3a6608 │ │ + blge ff7e6028 │ │ + bllt ff666e2c │ │ + bleq 3a35a8 │ │ vhadd.s8 d30, d0, d3 │ │ vmovl.s8 q8, d1 │ │ andls r0, sp, r0, lsl #20 │ │ @ instruction: 0x960fa83e │ │ - @ instruction: 0xffe4f005 │ │ + @ instruction: 0xf87af009 │ │ @ instruction: 0xf1b59d28 │ │ tstle r2, r0, lsl #30 │ │ @ instruction: 0xf7ff4642 │ │ ldmib sp, {r0, r1, r2, r3, r4, r5, r7, r8, r9, fp, ip, sp, pc}^ │ │ ldrbmi r9, [r4], -r9, lsr #12 │ │ cmnlt r6, r2, asr #12 │ │ streq pc, [r4, -r9, lsl #2] │ │ strcc lr, [ip, -r2] │ │ andle r3, r8, r1, lsl #28 │ │ stceq 8, cr15, [r4], {87} @ 0x57 │ │ rscsle r2, r8, r0, lsl #16 │ │ - @ instruction: 0xf0ac6838 │ │ - @ instruction: 0x4642ec76 │ │ + @ instruction: 0xf0af6838 │ │ + strbmi lr, [r2], -lr, lsr #25 │ │ @ instruction: 0x46a2e7f3 │ │ cmnle r1, r0, lsl #26 │ │ - bllt fe9e9ee4 │ │ + bllt fe9e6e84 │ │ @ instruction: 0x9639e9dd │ │ @ instruction: 0xf109b15e │ │ @ instruction: 0xf8570704 │ │ stmdacs r0, {r2, sl, fp} │ │ ldmdavs r8!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ - stcl 0, cr15, [r2], #-688 @ 0xfffffd50 │ │ + ldc 0, cr15, [sl], {175} @ 0xaf │ │ cdpcc 7, 0, cr3, cr1, cr12, {0} │ │ vand , q8, │ │ vstrcs s0, [r0, #-68] @ 0xffffffbc │ │ - beq 68a30 │ │ - blge 1969110 │ │ - bllt 19a9f14 │ │ + beq 659d0 │ │ + blge 19660b0 │ │ + bllt 19a6eb4 │ │ subeq lr, r9, r9, lsl #22 │ │ @ instruction: 0xf105990f │ │ mcrcc 7, 0, r0, cr1, cr8, {0} │ │ stmibeq r0, {r0, r8, r9, fp, sp, lr, pc}^ │ │ @ instruction: 0xf43e2e00 │ │ - strbmi sl, [pc, #-3194] @ 2b2b6 │ │ + strbmi sl, [pc, #-3194] @ 28256 │ │ ldmvs r8!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ @ instruction: 0xf43e2800 │ │ ldmib sp, {r2, r4, r5, r6, sl, fp, sp, pc}^ │ │ ldmib r7, {r2, r4, r9, fp, lr}^ │ │ @ instruction: 0xf8d45b00 │ │ stmdavs r0!, {r3, pc} │ │ andsle r4, r1, r0, lsl #11 │ │ @ instruction: 0xf1086860 │ │ ldrcc r0, [r8, -r1, lsl #2] │ │ @ instruction: 0xf8403e01 │ │ - bl 4003c │ │ + bl 3cfdc │ │ adcvs r0, r1, r8, asr #1 │ │ andlt pc, r4, r0, asr #17 │ │ ldrdeq pc, [r0], -sl │ │ ldmible sp, {r0, r7, r9, lr}^ │ │ mrrclt 7, 15, pc, r9, cr14 @ │ │ andls r4, fp, #32, 12 @ 0x2000000 │ │ - @ instruction: 0xf99cf007 │ │ + blx fec64f40 │ │ strb r9, [r7, fp, lsl #20]! │ │ @ instruction: 0x9629e9dd │ │ @ instruction: 0xf109b15e │ │ @ instruction: 0xf8570704 │ │ stmdacs r0, {r2, sl, fp} │ │ ldmdavs r8!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ - ldc 0, cr15, [r8], {172} @ 0xac │ │ + mrrc 0, 10, pc, r0, cr15 @ │ │ cdpcc 7, 0, cr3, cr1, cr12, {0} │ │ vand , q8, │ │ vstrcs s0, [r0, #-68] @ 0xffffffbc │ │ - beq 68ac4 │ │ - blge 11e90a4 │ │ + beq 65a64 │ │ + blge 11e6044 │ │ ldrmi r4, [r4], -r8, asr #12 │ │ - stc 0, cr15, [sl], {172} @ 0xac │ │ + mcrr 0, 10, pc, r2, cr15 @ │ │ @ instruction: 0xf7ff4622 │ │ @ instruction: 0x4620bb3f │ │ - @ instruction: 0xf007920b │ │ - bls 32a5a4 │ │ + @ instruction: 0xf00a920b │ │ + bls 327994 │ │ stclt 7, cr15, [r1], #-1016 @ 0xfffffc08 │ │ ldrbtmi r4, [r8], #-2085 @ 0xfffff7db │ │ - @ instruction: 0xf9b2f015 │ │ + blx 19e4fce │ │ ldrbtmi r4, [r8], #-2084 @ 0xfffff7dc │ │ - ldc2 0, cr15, [r4, #-76]! @ 0xffffffb4 │ │ + mcr2 0, 7, pc, cr8, cr6, {0} @ │ │ ldrbtmi r4, [r8], #-2080 @ 0xfffff7e0 │ │ - @ instruction: 0xf9aaf015 │ │ + blx 17e4fde │ │ @ instruction: 0x46594558 │ │ @ instruction: 0x4601bf38 │ │ @ instruction: 0xf67e4583 │ │ - bl 9705c │ │ + bl 93ffc │ │ stmdbls pc, {r0, r6} @ │ │ strbeq lr, [r0, #2817] @ 0xb01 │ │ stmdacs r0, {r3, r5, r7, fp, sp, lr} │ │ - blge fff291f4 │ │ + blge fff26194 │ │ ldclt 7, cr15, [r1], {254} @ 0xfe │ │ andcs r4, r0, ip, lsl fp │ │ ldrtmi r2, [r2], -r2, lsl #2 │ │ - @ instruction: 0xf013447b │ │ - blmi 66b34c │ │ + @ instruction: 0xf016447b │ │ + blmi 6689bc │ │ mrscs r2, (UNDEF: 2) │ │ ldrbtmi r4, [fp], #-1570 @ 0xfffff9de │ │ - stc2l 0, cr15, [r8], {19} │ │ + mrc2 0, 3, pc, cr12, cr6, {0} │ │ andcs r4, r0, r6, lsl fp │ │ ldrbmi r2, [sl], -r2, lsl #2 │ │ - @ instruction: 0xf013447b │ │ - andcs pc, r1, r1, asr #25 │ │ - @ instruction: 0xf0114621 │ │ - stmdami ip, {r0, r1, r3, r4, r5, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ - blmi 356988 │ │ + @ instruction: 0xf016447b │ │ + andcs pc, r1, r5, ror lr @ │ │ + @ instruction: 0xf0154621 │ │ + stmdami ip, {r0, r1, r2, r3, r5, r6, r8, fp, ip, sp, lr, pc} │ │ + blmi 353928 │ │ ldrbtmi r4, [r8], #-2316 @ 0xfffff6f4 │ │ ldrbtmi r4, [r9], #-1147 @ 0xfffffb85 │ │ @ instruction: 0x212b9100 │ │ - blx de809c │ │ + blx ffae504a │ │ tstcs r8, r1 │ │ - @ instruction: 0xffacf011 │ │ + @ instruction: 0xf960f015 │ │ andcs r9, r8, pc, lsl #18 │ │ - @ instruction: 0xffa8f011 │ │ - ldrdeq lr, [sl], -sl │ │ - ldrdeq lr, [sl], -sl │ │ - andeq lr, sl, r2, lsl #23 │ │ - @ instruction: 0xfffed44d │ │ - andeq lr, sl, r4, lsl r9 │ │ - andeq lr, sl, r2, lsr sl │ │ - andeq lr, sl, sl, lsl sl │ │ - andeq lr, sl, r8, lsr #20 │ │ - andeq lr, sl, ip, lsl #20 │ │ + @ instruction: 0xf95cf015 │ │ + andeq r1, fp, sl, asr #26 │ │ + andeq r1, fp, sl, asr #26 │ │ + strdeq r1, [fp], -r2 │ │ + @ instruction: 0xffff04ad │ │ + andeq r1, fp, r4, asr r9 │ │ + andeq r1, fp, r2, lsr #21 │ │ + andeq r1, fp, sl, lsl #21 │ │ + muleq fp, r8, sl │ │ + andeq r1, fp, ip, ror sl │ │ + svcmi 0x00f0e92d │ │ + pkhbtmi fp, r2, r1, lsl #1 │ │ + mlaeq r4, r1, r8, pc @ │ │ + orrlt r9, r8, fp, lsl #4 │ │ + streq pc, [r8], -r1, lsl #2 │ │ + stmibvs r9, {r2, r3, r9, sl, lr} │ │ + stm sp, {r0, r2, r3, r6, r9, sl, fp, lr, pc} │ │ + stmdage ip, {r0, r2, r3, r6} │ │ + @ instruction: 0xf0229a0b │ │ + stmdals ip, {r0, r1, r4, r6, r9, fp, ip, sp, lr, pc} │ │ + vsra.s8 d18, d1, #8 │ │ + addmi r0, r8, #0, 2 │ │ + strtmi sp, [r1], -fp, asr #2 │ │ + ldmib r1, {r0, r2, r3, r6, r7, r8, fp, sp, lr}^ │ │ + biclt fp, sp, #0 │ │ + stmdbeq r8, {r0, r8, ip, sp, lr, pc} │ │ + tstls r8, lr, asr #18 │ │ + ldm r9, {r0, r3, r7, r8, fp, sp, lr} │ │ + @ instruction: 0xf8cd0214 │ │ + b 141110c │ │ + andls r0, r7, r0, asr #21 │ │ + eorlt pc, r4, sp, asr #17 │ │ + @ instruction: 0xf1ba9506 │ │ + andsle r0, sl, r0, lsl #30 │ │ + movweq lr, #2523 @ 0x9db │ │ + stm sp, {r4, r7, r9, sl, lr} │ │ + @ instruction: 0x460f0214 │ │ + stmib sp, {r0, r1, r3, r9, fp, ip, pc}^ │ │ + stmdage ip, {r0, r1, sp, lr} │ │ + @ instruction: 0xf02b9305 │ │ + stmdals ip, {r0, r1, r4, r5, r7, r9, sl, fp, ip, sp, lr, pc} │ │ + vsra.s8 d18, d1, #8 │ │ + addmi r0, r8, #0, 2 │ │ + stccc 1, cr13, [r1, #-160] @ 0xffffff60 │ │ + beq 265750 │ │ + bleq 2654d8 │ │ + ldrtmi r4, [r9], -r2, asr #12 │ │ + ldmib sp, {r0, r5, r6, r7, r8, ip, lr, pc}^ │ │ + @ instruction: 0xf8dd3006 │ │ + addmi sl, r3, #40 @ 0x28 │ │ + bleq 263834 │ │ + bvs 21d8e8 │ │ + bl 3155c4 │ │ + eor r0, sp, r3, asr #1 │ │ + svccs 0x00006a0f │ │ + stmdacs r0, {r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ + andscs sp, r1, r0, lsr #2 │ │ + andeq pc, r0, r8, asr #5 │ │ + andeq pc, r0, sl, asr #17 │ │ + pop {r0, r4, ip, sp, pc} │ │ + blge 34d0a8 │ │ + stm sl, {r0, r1, r2, r3, r8, r9, fp, lr, pc} │ │ + andslt r0, r1, pc │ │ + svchi 0x00f0e8bd │ │ + @ instruction: 0xf8dd9e0a │ │ + @ instruction: 0xf89d1039 │ │ + @ instruction: 0xf8dd3034 │ │ + bls 4051d8 │ │ + andne pc, r9, r6, asr #17 │ │ + andvc pc, r5, r6, asr #17 │ │ + ldrshvc r6, [r3, -r2]! │ │ + andslt r6, r1, r0, lsr r0 │ │ + svchi 0x00f0e8bd │ │ + stmdbeq r8, {r0, r8, ip, sp, lr, pc} │ │ + ldrdvs lr, [r5, -r1] │ │ + ldrbmi r9, [r8], -r7 │ │ + andseq lr, r4, #10027008 @ 0x990000 │ │ + strmi r9, [r8], r6 │ │ + movweq lr, #2512 @ 0x9d0 │ │ + stm sp, {r1, r3, r9, ip, pc} │ │ + bls 2e9988 │ │ + andvs lr, r3, sp, asr #19 │ │ + stmib sp, {r2, r3, fp, sp, pc}^ │ │ + ldrtmi r9, [r1], r8, lsl #8 │ │ + @ instruction: 0xf02c9305 │ │ + stmdals ip, {r0, r1, r4, r7, r9, fp, ip, sp, lr, pc} │ │ + vsra.s8 d18, d1, #8 │ │ + addmi r0, r8, #0, 2 │ │ + ldmib sp, {r1, r3, r5, r8, ip, lr, pc}^ │ │ + svccc 0x00015209 │ │ + @ instruction: 0x0607e9dd │ │ + bl 31d448 │ │ + stmdals r6, {r6, r7, r8, r9, fp} │ │ + strbmi r4, [fp], -r1, asr #12 │ │ + streq pc, [r8], #-256 @ 0xffffff00 │ │ + adcsle r4, r0, ip, asr r5 │ │ + @ instruction: 0x0c00e9d4 │ │ + rsbeq lr, r4, sp, lsl #17 │ │ + stmib sp, {r0, r1, r3, r9, fp, ip, pc}^ │ │ + stmdage ip, {r0, r1, ip, sp} │ │ + andsgt pc, r4, sp, asr #17 │ │ + blx 1ce523c │ │ + tstcs r1, ip, lsl #16 │ │ + smlabteq r0, r8, r2, pc @ │ │ + smlabble r9, r8, r2, r4 │ │ + svccc 0x00019a0a │ │ + strvs lr, [r8, #-2525] @ 0xfffff623 │ │ + streq pc, [r8], #-260 @ 0xfffffefc │ │ + strbmi r4, [fp], -r1, asr #12 │ │ + ldr sp, [r4, r2, ror #3] │ │ + ldrsbtne pc, [r9], -sp @ │ │ + mlascc r4, sp, r8, pc @ │ │ + ldrsbtvc pc, [r5], -sp @ │ │ + @ instruction: 0xf8ca9a0f │ │ + @ instruction: 0xf8ca1009 │ │ + @ instruction: 0xf8ca7005 │ │ + @ instruction: 0xf88a200c │ │ + @ instruction: 0xf8ca3004 │ │ + andslt r0, r1, r0 │ │ + svchi 0x00f0e8bd │ │ mvnsmi lr, sp, lsr #18 │ │ - stmdavs lr, {r1, r2, r3, r7, ip, sp, pc} │ │ + stmiavs lr, {r2, r3, r7, ip, sp, pc}^ │ │ stccs 8, cr6, [r1], {244} @ 0xf4 │ │ - @ instruction: 0x4680d932 │ │ - mlaeq r9, r6, r8, lr │ │ - stceq 1, cr15, [r8], {13} │ │ - strpl lr, [fp], #-2509 @ 0xfffff633 │ │ - strmi pc, [r0], #-131 @ 0xffffff7d │ │ - movwmi r8, #18479 @ 0x482f │ │ - @ instruction: 0xf04f6849 │ │ - strls r0, [sp, -r0, lsl #10] │ │ - strcs fp, [r1], #-3864 @ 0xfffff0e8 │ │ - stm ip, {r0, r1, r3, r8, r9, sl, fp, sp, pc} │ │ - stmdage r6, {r0, r3, r7} │ │ - strmi lr, [r0, #-2509] @ 0xfffff633 │ │ - stc2l 0, cr15, [r2], #-160 @ 0xffffff60 │ │ - tstcs r1, r6, lsl #16 │ │ + ldmvs r5!, {r3, r5, r8, fp, ip, lr, pc} │ │ + ldmib r1, {r7, r9, sl, lr}^ │ │ + stmvs r9, {r8, r9} │ │ + strls r8, [fp, -pc, lsr #16] │ │ + stm sp, {r0, r3, r8, r9, sl, fp, sp, pc} │ │ + stmdage r4, {r0, r3, r7} │ │ + strpl lr, [r9], #-2509 @ 0xfffff633 │ │ + @ instruction: 0xf832f02b │ │ + tstcs r1, r4, lsl #16 │ │ smlabteq r0, r8, r2, pc @ │ │ smlabble r8, r8, r2, r4 │ │ - andne lr, r8, #3620864 @ 0x374000 │ │ + andne lr, r6, #3620864 @ 0x374000 │ │ andne lr, r0, #3244032 @ 0x318000 │ │ andeq pc, r0, r8, asr #17 │ │ - pop {r1, r2, r3, ip, sp, pc} │ │ - blge 20c89c │ │ + pop {r2, r3, ip, sp, pc} │ │ + blge 1899e0 │ │ stceq 1, cr15, [r4], {8} │ │ stm ip, {r1, r2, r3, r8, r9, fp, lr, pc} │ │ @ instruction: 0xf8c8000e │ │ - andlt r0, lr, r0 │ │ + andlt r0, ip, r0 │ │ ldrhhi lr, [r0, #141]! @ 0x8d │ │ andcs r4, r0, r3, lsl #22 │ │ strtmi r2, [r2], -r2, lsl #2 │ │ - @ instruction: 0xf013447b │ │ - svclt 0x0000fc57 │ │ - andeq lr, sl, r8, lsr r9 │ │ - svcmi 0x00f0e92d │ │ - andls fp, lr, #147 @ 0x93 │ │ - stmvs r8, {r3, ip, pc} │ │ - andvs lr, r3, #3424256 @ 0x344000 │ │ - bl d013c │ │ - tstls r7, r2, asr #32 │ │ - orreq lr, r0, #6144 @ 0x1800 │ │ - movwls fp, #25546 @ 0x63ca │ │ - ldmib r1, {r7}^ │ │ - @ instruction: 0xf04f2300 │ │ - stmdbvs r9, {r8, r9, fp}^ │ │ - stmdaeq r0, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ - andcc lr, ip, #3358720 @ 0x334000 │ │ - smlabteq sl, sp, r9, lr │ │ - andls r3, r5, ip, lsl #16 │ │ - ldrbmi r4, [lr], #-1713 @ 0xfffff94f │ │ - @ instruction: 0xf8574637 │ │ - @ instruction: 0xf1baab0c │ │ - eorle r4, r8, r0, lsl #30 │ │ - ldrdmi lr, [r1], -r6 │ │ - tstls r0, sp, lsl #18 │ │ - stmib sp, {r2, r3, r8, fp, ip, pc}^ │ │ - stmdbls fp, {r0, sl, ip} │ │ - andls r9, r3, lr, lsl #20 │ │ - @ instruction: 0xf028a80f │ │ - @ instruction: 0xf89df93d │ │ - tstcs r1, r0, asr #32 │ │ - vmlal.s8 , d8, d15 │ │ - addmi r0, r8, #0, 2 │ │ - @ instruction: 0xf1bad13d │ │ - svclt 0x001c0f00 │ │ - @ instruction: 0xf0ac4620 │ │ - strtmi lr, [r8], #2848 @ 0xb20 │ │ - bleq 3685b8 │ │ - strbmi r9, [lr], -sl, lsl #16 │ │ - bicsle r4, r5, r8, asr r5 │ │ - @ instruction: 0xf04fe01d │ │ - ldrtmi r0, [r0], -r0, lsl #16 │ │ - tstle r6, r9, lsl sl │ │ - blls 1e4200 │ │ - andeq pc, ip, r6, lsl #2 │ │ - bne 67dae4 │ │ - @ instruction: 0xf64ad011 │ │ - stcne 2, cr2, [r5, #-684] @ 0xfffffd54 │ │ - adccs pc, sl, #211812352 @ 0xca00000 │ │ - andne pc, r2, #164864 @ 0x28400 │ │ - @ instruction: 0xf85508d4 │ │ - stmdacs r0, {r2, sl, fp} │ │ - stmdavs r8!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ - b fff6847c │ │ - stccc 5, cr3, [r1], {12} │ │ - stmdals r9, {r0, r2, r4, r5, r6, r7, r8, ip, lr, pc} │ │ - svclt 0x001c2800 │ │ - @ instruction: 0xf0ac4630 │ │ - stmdals r7, {r2, r4, r5, r6, r7, r9, fp, sp, lr, pc} │ │ - stmdbls r8, {r0, r4, r9, sp} │ │ - andeq pc, r0, #200, 4 @ 0x8000000c │ │ - andvs r6, sl, r0, lsl #19 │ │ - andhi pc, r0, r0, asr #17 │ │ - pop {r0, r1, r4, ip, sp, pc} │ │ - stmdbls r8, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - svceq 0x0000f1ba │ │ - ldrdgt pc, [r1], #-141 @ 0xffffff73 │ │ - @ instruction: 0xf8dd9b12 │ │ - sbcvs r2, fp, r5, asr #32 │ │ - andcs pc, r9, r1, asr #17 │ │ - andgt pc, r5, r1, asr #17 │ │ - andvs r7, r8, sp, lsl #2 │ │ - qadd16mi fp, r0, ip │ │ - b ff5684cc │ │ - adcsmi r9, r8, #393216 @ 0x60000 │ │ - stmdals r5, {r0, r2, r4, ip, lr, pc} │ │ - @ instruction: 0x21abf64a │ │ - @ instruction: 0x21aaf6ca │ │ - ldreq pc, [r0], #-262 @ 0xfffffefa │ │ - andeq lr, fp, r0, lsr #23 │ │ - smlatbeq r1, r0, fp, pc @ │ │ - @ instruction: 0xf85408cd │ │ - stmdacs r0, {r2, sl, fp} │ │ - stmdavs r0!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ - b fefe84f8 │ │ - stccc 4, cr3, [r1, #-48] @ 0xffffffd0 │ │ - stmdals r9, {r0, r2, r4, r5, r6, r7, r8, ip, lr, pc} │ │ - sbcle r2, sp, r0, lsl #16 │ │ - @ instruction: 0xf0ac4648 │ │ - @ instruction: 0xb013eab6 │ │ - svchi 0x00f0e8bd │ │ - svcmi 0x00f0e92d │ │ - @ instruction: 0xf101b097 │ │ - andls r0, r7, ip, lsl #6 │ │ - andls r6, ip, #136, 16 @ 0x880000 │ │ - blgt 390294 │ │ - subeq lr, r2, #2048 @ 0x800 │ │ - bl 463f8 │ │ - andls r0, sp, r2, lsl #13 │ │ - suble r2, r9, r0, lsl #30 │ │ - b 1411aa0 │ │ - ldmib r1, {r0, r1, r2, fp, ip}^ │ │ - addseq r7, r4, r0, lsl #12 │ │ - @ instruction: 0xf04f6818 │ │ - stmibvs r9, {r9, fp} │ │ - movweq pc, #45167 @ 0xb06f @ │ │ - strvs lr, [sl, -sp, asr #19] │ │ - streq pc, [r8], -r0, lsl #2 │ │ - bl 1106cc │ │ - smlabbls r5, r2, r1, r0 │ │ - ldmdbls r3, {r1, r4, sp, lr, pc} │ │ - tstcs r0, #3620864 @ 0x374000 │ │ - movwcs lr, #10566 @ 0x2946 │ │ - svceq 0x0000f1b9 │ │ - smlabteq r0, r6, r9, lr │ │ - qadd16mi fp, r8, ip │ │ - b 1fe8578 │ │ - @ instruction: 0xf10a3610 │ │ - @ instruction: 0xf1b80a0c │ │ - andsle r0, lr, r0, lsl r8 │ │ - eorsle r4, r3, r4, asr r5 │ │ - bl 52310 │ │ - ldrtmi r0, [fp], sl, lsl #14 │ │ - blls 36a450 │ │ - svcmi 0x0000f1b9 │ │ - ldmib r7, {r0, r1, r4, ip, lr, pc}^ │ │ - stmdbls fp, {r0, ip, lr} │ │ - stmdbls sl, {r8, ip, pc} │ │ - strne lr, [r1, #-2509] @ 0xfffff633 │ │ - bls 352720 │ │ - stmdage lr, {r0, r1, ip, pc} │ │ - mrrc2 0, 2, pc, lr, cr7 @ │ │ - bllt 1252340 │ │ - stmdacs r0, {r1, r4, fp, ip, pc} │ │ - smlabtcs r0, pc, r1, sp @ │ │ - mcrls 7, 0, lr, cr6, cr2, {6} │ │ - andeq pc, ip, r7, lsl #2 │ │ - andsle r1, r1, r1, lsr sl │ │ - adccs pc, fp, #77594624 @ 0x4a00000 │ │ - @ instruction: 0xf6ca1d05 │ │ - blx fe874dd2 │ │ - ldmeq r4, {r1, r9, ip}^ │ │ - stceq 8, cr15, [r4], {85} @ 0x55 │ │ - svclt 0x001c2800 │ │ - @ instruction: 0xf0ac6828 │ │ - strcc lr, [ip, #-2630] @ 0xfffff5ba │ │ - mvnsle r3, r1, lsl #24 │ │ - stmdacs r0, {r3, fp, ip, pc} │ │ - stmdals sp, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ - b f685fc │ │ - andscs r9, r1, r7, lsl #18 │ │ - andeq pc, r0, r8, asr #5 │ │ - andslt r6, r7, r8 │ │ - svchi 0x00f0e8bd │ │ - vmlals.f64 d10, d7, d15 │ │ - svceq 0x0000f1b9 │ │ - strgt ip, [pc], -pc, lsl #22 │ │ - qadd16mi fp, r8, ip │ │ - b ae8620 │ │ - ldrbmi r9, [r8, #-2054] @ 0xfffff7fa │ │ - stmdals r5, {r0, r2, r4, ip, lr, pc} │ │ - @ instruction: 0x21abf64a │ │ - @ instruction: 0x21aaf6ca │ │ - ldreq pc, [r0], #-263 @ 0xfffffef9 │ │ - andeq lr, sl, r0, lsr #23 │ │ - smlatbeq r1, r0, fp, pc @ │ │ - @ instruction: 0xf85408cd │ │ - stmdacs r0, {r2, sl, fp} │ │ - stmdavs r0!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ - b 56864c │ │ - stccc 4, cr3, [r1, #-48] @ 0xffffffd0 │ │ - stmdals r8, {r0, r2, r4, r5, r6, r7, r8, ip, lr, pc} │ │ - sbcsle r2, r6, r0, lsl #16 │ │ - @ instruction: 0xf0ac980d │ │ - andslt lr, r7, ip, lsl #20 │ │ - svchi 0x00f0e8bd │ │ - addlt fp, ip, r0, lsl #11 │ │ - ldmib r0, {r0, r1, r3, r9, fp, lr}^ │ │ - ldrbtmi r0, [sl], #-256 @ 0xffffff00 │ │ - @ instruction: 0xf3bf68d3 │ │ - blcs d0134 │ │ - ldmdbvs r3, {r1, r3, r8, ip, lr, pc} │ │ - andls r2, r3, #0, 4 │ │ - andls r2, r2, #268435456 @ 0x10000000 │ │ - andls r2, r0, #805306368 @ 0x30000000 │ │ - ldrmi r4, [r8, sl, ror #12] │ │ - stclt 0, cr11, [r0, #48] @ 0x30 │ │ - ldrbtmi r4, [r8], #-2050 @ 0xfffff7fe │ │ - blx ae8436 │ │ - ldrdeq r2, [fp], -sl │ │ - andeq sp, sl, sl, ror #29 │ │ + @ instruction: 0xf016447b │ │ + svclt 0x0000fd39 │ │ + andeq r1, fp, r4, lsl #16 │ │ svcmi 0x00f0e92d │ │ - @ instruction: 0xf8d1b0b9 │ │ - pkhbtmi ip, r1, r4 │ │ - ldmib r1, {r3, r7, r9, sl, lr}^ │ │ - ldmib ip, {r0, r1, r9, sl, fp}^ │ │ - bl ff1fa070 │ │ - ldmib r1, {r0, r1, r2, r6, r7, r8, r9, sl}^ │ │ - nopcc {0} @ │ │ - ldrshlt r0, [pc, -pc]! │ │ - strvs lr, [lr, #-2291] @ 0xfffff70d │ │ - rsbmi r3, r5, r8, lsr pc │ │ - @ instruction: 0x432e404e │ │ - strd sp, [sp], -r7 │ │ - @ instruction: 0x371de9dc │ │ - strbeq lr, [r7, r7, asr #23] │ │ - rscseq r3, pc, r0, lsr #6 │ │ - ldm r3!, {r0, r1, r2, r3, r4, r5, r6, r8, r9, ip, sp, pc}^ │ │ - svccc 0x0038650e │ │ - submi r4, lr, r5, rrx │ │ - mvnsle r4, lr, lsr #6 │ │ - ldrbeq pc, [r8], #-419 @ 0xfffffe5d @ │ │ - ldrdvc lr, [ip, -ip] │ │ - movwvs lr, #10706 @ 0x29d2 │ │ - b fe1bc5b4 │ │ - tstmi r9, #469762048 @ 0x1c000000 │ │ - tstpeq r1, #64, 4 @ p-variant is OBSOLETE │ │ - movweq pc, #712 @ 0x2c8 @ │ │ - ldcvs 1, cr13, [r1], {21} │ │ - @ instruction: 0xf0402900 │ │ - andls r8, r9, #1610612746 @ 0x6000000a │ │ - tstpmi r0, pc, asr #32 @ p-variant is OBSOLETE │ │ - svclt 0x0044f852 │ │ - stmdb r7, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc} │ │ - bls a6bc0 │ │ - svcmi 0x0000f1bb │ │ - @ instruction: 0xd1206011 │ │ - streq pc, [r8], #-419 @ 0xfffffe5d │ │ - ldrdls pc, [r0], -sp @ │ │ - cdpne 0, 5, cr14, cr12, cr0, {0} │ │ - tstpeq r8, r8, lsl #2 @ p-variant is OBSOLETE │ │ - strmi lr, [r2], r2, ror #3 │ │ - @ instruction: 0xf0ac2017 │ │ - stmdacs r0, {r1, r2, r3, r5, r7, r8, fp, sp, lr, pc} │ │ - addshi pc, r5, #0 │ │ - andscs r4, r7, #3817472 @ 0x3a4000 │ │ - ldrcs r4, [r7, -r6, lsl #12] │ │ - @ instruction: 0xf0a84479 │ │ - andscs pc, r1, lr, lsl #31 │ │ - tstpeq r8, r8, lsl #2 @ p-variant is OBSOLETE │ │ - andeq pc, r0, r8, asr #5 │ │ - strcs r1, [r0, #-4036] @ 0xfffff03c │ │ - @ instruction: 0x46502317 │ │ - stmib sp, {r1, r3, r6, r7, r8, sp, lr, pc}^ │ │ - stcge 4, cr2, [sl], #-16 │ │ - andcs r9, r0, r6 │ │ - stmib sp, {r2, r8, sp}^ │ │ - stmib sp, {r1, r3, r5}^ │ │ - vrhadd.s8 d16, d0, d28 │ │ - stmib sp, {r0, r2, r3, r7, r8, ip, sp}^ │ │ - stmib sp, {r1, r2, r3, r5}^ │ │ - and r0, r1, r0, lsr r1 │ │ - @ instruction: 0xd11e0890 │ │ - @ instruction: 0xf01b4620 │ │ - stmdals pc!, {r0, r3, r4, r5, r6, r9, sl, fp, ip, sp, lr, pc} @ │ │ - rscsle r2, r9, r0, lsl #16 │ │ - movwcs r2, #8448 @ 0x2100 │ │ - strcs r2, [r0, -r1, lsl #12] │ │ - blx fe92451e │ │ - stmdaeq r0, {r0, r1, r8, sl, sp}^ │ │ - strpl pc, [r7, #-2819] @ 0xfffff4fd │ │ - strpl pc, [r7, -r3, lsl #22] │ │ - bfieq r4, r3, (invalid: 12:2) │ │ - blx fe9208ea │ │ - stmdacs r1, {r1, r2, r8, sl, sp} │ │ - blx 1208ae │ │ - blx 200926 │ │ - ldrmi r1, [r6], -r6, lsl #2 │ │ - stclgt 7, cr14, [ip], {235} @ 0xeb │ │ - stcne 8, cr10, [r1, #-104] @ 0xffffff98 │ │ - ldm r4, {r2, r3, r6, r7, r8, lr, pc} │ │ - bicgt r0, ip, ip, asr #1 │ │ - stmib sp, {r8, sp}^ │ │ - @ instruction: 0xf8dd9a0c │ │ - stmib sp, {r2, r5, ip, pc}^ │ │ - @ instruction: 0xf10d1b0a │ │ - tstls lr, r8, lsr #22 │ │ - tstpeq r4, fp, lsl #2 @ p-variant is OBSOLETE │ │ - rsbls pc, r0, sp, asr #17 │ │ - bicgt ip, ip, ip, asr #17 │ │ - smlaleq lr, ip, r0, r8 │ │ - ldcge 1, cr12, [sl, #-944] @ 0xfffffc50 │ │ - stmdals r5, {r4, r5, r8, sp} │ │ - ldrdvc pc, [r0], -r9 │ │ - strtmi r6, [r8], -r4, lsl #16 │ │ - cdp2 0, 1, cr15, cr3, cr8, {5} │ │ - @ instruction: 0x46214638 │ │ - teqcs r0, #44040192 @ 0x2a00000 │ │ - stc 0, cr15, [ip], #464 @ 0x1d0 │ │ - mrcge 8, 0, r9, cr10, cr8, {0} │ │ - stcls 1, cr2, [r2, #-192]! @ 0xffffff40 │ │ - ldrtmi r6, [r0], -r7, lsl #16 │ │ - cdp2 0, 0, cr15, cr5, cr8, {5} │ │ - @ instruction: 0x46214638 │ │ - teqcs r0, #52428800 @ 0x3200000 │ │ - ldc 0, cr15, [lr], {116} @ 0x74 │ │ - @ instruction: 0xa01cf8dd │ │ - svclt 0x000445aa │ │ - strmi r9, [r2, #2082] @ 0x822 │ │ - eorcs sp, r0, r4, lsl r0 │ │ - stmdb r6!, {r2, r3, r5, r7, ip, sp, lr, pc} │ │ - @ instruction: 0xf0002800 │ │ - stmibmi r7!, {r1, r4, r9, pc} │ │ - strcs r2, [r0, -r0, lsr #4]! │ │ - ldrbtmi r9, [r9], #-3 │ │ - @ instruction: 0xff07f0a8 │ │ - strtcs r2, [r0], #-17 @ 0xffffffef │ │ - andeq pc, r0, r8, asr #5 │ │ - andcs r1, r0, r5, lsl #30 │ │ - rsc r9, r9, r2 │ │ - stmdbge sl, {r1, r3, r4, fp, sp, pc} │ │ - @ instruction: 0xf01d4622 │ │ - svcge 0x001afb97 │ │ - ldrcs lr, [sp], #-2525 @ 0xfffff623 │ │ - stmdacs r2, {r0, r5, r7, r8, r9, sl, fp, lr, pc} │ │ - beq e609f0 │ │ - andls r9, r2, r3, lsl #4 │ │ - ldmdbls pc, {r1, r3, r4, r6, r7, sp, lr, pc} @ │ │ - ldmdbge r2!, {r0, r1, r2, r4, r5, r8, ip, pc} │ │ - strbeq ip, [r0, r1, lsr #3] │ │ - ldrtcs lr, [r5], #-2509 @ 0xfffff633 │ │ - mvnhi pc, r0 │ │ - strtmi r2, [r9], -r0 │ │ - ldmdage sl, {r0, ip, pc} │ │ - movwcs r2, #512 @ 0x200 │ │ - ldc2 0, cr15, [r0], {29} │ │ - ldmib sp, {r1, r3, r4, r8, r9, sl, fp, sp, pc}^ │ │ - svcgt 0x0083321d │ │ - andscs fp, r1, r8, asr r1 │ │ - vsubhn.i16 d20, q4, │ │ - addmi r0, r1, #0 │ │ - @ instruction: 0xf8ddd065 │ │ - cdpge 0, 1, cr9, cr10, cr4, {1} │ │ - andls r0, r2, r8, lsr sl │ │ - cdpls 0, 0, cr14, cr6, cr14, {5} │ │ - subsle r2, ip, r0, lsl #18 │ │ - svclt 0x00042f08 │ │ - bcs 251a48 │ │ - cmnphi r6, r0, asr #32 @ p-variant is OBSOLETE │ │ - b 1406664 │ │ - ldmdavs sl, {r1, r3, sl, fp, ip} │ │ - stmdbmi r0, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ - strbtmi r6, [r7], -r9, asr #16 │ │ - @ instruction: 0x4634685b │ │ - @ instruction: 0xf0002f00 │ │ - strtmi r8, [r5], -r1, lsl #1 │ │ - strvs lr, [r0], #-2516 @ 0xfffff62c │ │ - svccc 0x0010404c │ │ - b fe13c780 │ │ - @ instruction: 0x43260409 │ │ - ldreq pc, [r0], #-261 @ 0xfffffefb │ │ - ldmib r5, {r4, r5, r6, r7, r8, ip, lr, pc}^ │ │ - subsmi r6, sp, r2, lsl #10 │ │ - b fe17c7d4 │ │ - @ instruction: 0x432e0509 │ │ - ands sp, ip, r8, ror #3 │ │ - strtmi r6, [r4], r8, lsl #16 │ │ - @ instruction: 0x4625681a │ │ - ldrtmi r6, [ip], -r9, asr #16 │ │ - stccs 8, cr6, [r0, #-364] @ 0xfffffe94 │ │ - strtmi sp, [r7], -r2, rrx │ │ - strvs lr, [r0], #-2516 @ 0xfffff62c │ │ - ldccc 0, cr4, [r0, #-304] @ 0xfffffed0 │ │ - b fe13c7bc │ │ - @ instruction: 0x43260409 │ │ - ldreq pc, [r0], #-263 @ 0xfffffef9 │ │ - ldmib r7, {r0, r4, r5, r6, r7, r8, ip, lr, pc}^ │ │ - subsmi r7, lr, r2, lsl #12 │ │ - b fe1bc814 │ │ - teqmi r7, #9437184 @ 0x900000 │ │ - andcs sp, r0, r9, ror #3 │ │ - andls r9, r1, r3, lsl #18 │ │ - andcs sl, r8, #1703936 @ 0x1a0000 │ │ - strbtmi r2, [r4], -r0, lsl #6 │ │ - blx febe8746 │ │ - ldmib sp, {r1, r3, r4, r8, r9, sl, fp, sp, pc}^ │ │ - svcgt 0x0083321d │ │ - orrsle r2, ip, r0, lsl #16 │ │ - svcls 0x00064638 │ │ - stmdacs r8, {r0, r3, r5, r8, ip, sp, pc} │ │ - bcs 25c308 │ │ - msrhi CPSR_, r0, asr #32 │ │ - stmdals r5, {r1, r3, r6, r7, r8, r9, sl, sp, lr, pc} │ │ - stmvs r2, {r1, r3, r8, fp, sp, pc} │ │ - @ instruction: 0xf01da81a │ │ - svcge 0x001afb05 │ │ - ldrcc lr, [sp], #-2525 @ 0xfffff623 │ │ - stmdacs r2, {r0, r5, r7, r8, r9, sl, fp, lr, pc} │ │ - beq e60b1c │ │ - andls sl, r2, sl, lsl lr │ │ - ldrdls pc, [r4], -sp @ │ │ - ldmdbls pc, {r0, r2, r3, r4, r5, sp, lr, pc} @ │ │ - stmdbge sl!, {r0, r1, r2, r3, r5, r8, ip, pc} │ │ - strbeq ip, [r0, r1, lsr #3] │ │ - strtcc lr, [sp], #-2509 @ 0xfffff633 │ │ - mrshi pc, SPSR @ │ │ - strtmi r2, [r9], -r0 │ │ - ldmdage sl, {r0, ip, pc} │ │ - movwcs r2, #512 @ 0x200 │ │ - blx 1f687aa │ │ - ldrne lr, [ip], #-2525 @ 0xfffff623 │ │ - ldmib sp, {r1, r2, r3, r4, r9, fp, ip, pc}^ │ │ - stmdacs r0, {r1, r3, r4, r8, r9} │ │ - addshi pc, r9, r0 │ │ - @ instruction: 0x461d2011 │ │ - andeq pc, r0, r8, asr #5 │ │ - @ instruction: 0xf0004283 │ │ - beq 24cb34 │ │ - ldrmi r4, [r4], -r2, lsr #13 │ │ - tst ip, pc, lsl #12 │ │ - @ instruction: 0xf0ac2019 │ │ - stmdacs r0, {r1, r3, r6, fp, sp, lr, pc} │ │ - teqphi r9, r0 @ p-variant is OBSOLETE │ │ - ldrdls pc, [r4], -sp @ │ │ - ldmibmi sp, {r0, r4, r8, sl, sp} │ │ - vrshr.s8 d18, d9, #8 │ │ - cdpge 5, 1, cr0, cr10, cr0, {0} │ │ - @ instruction: 0x27194479 │ │ - @ instruction: 0xf0a84604 │ │ - andcs pc, r0, r4, lsr #28 │ │ - stccc 6, cr4, [r4, #-140] @ 0xffffff74 │ │ - andscs r9, r9, #2 │ │ - ldmdage r2!, {r2, r4, r9, sl, lr} │ │ - @ instruction: 0xf01b9303 │ │ - ldmdals r2!, {r0, r1, sl, fp, ip, sp, lr, pc} │ │ - ldmdals r3!, {r4, r8, ip, sp, pc} │ │ - ldmdb r4!, {r4, r5, r6, ip, sp, lr, pc} │ │ - ldrdeq pc, [r0], #-137 @ 0xffffff77 │ │ - stmdacs r0, {r0, r2, sl, ip, pc} │ │ - @ instruction: 0xf0409707 │ │ - @ instruction: 0xf04f8106 │ │ - @ instruction: 0x46aa30ff │ │ - subeq pc, r0, r9, asr #17 │ │ - @ instruction: 0x46314630 │ │ - strhteq lr, [ip], #139 @ 0x8b │ │ - ldm fp!, {r2, r3, r5, r6, r7, lr, pc} │ │ - rscgt r0, ip, ip, ror #1 │ │ - smlalseq lr, ip, fp, r8 │ │ - stmdage sl!, {r2, r3, r4, r5, r6, r7, lr, pc} │ │ - @ instruction: 0xff72f01e │ │ - blls 157080 │ │ - blpl 4a6f40 │ │ - bgt 1fe130 │ │ - svcmi 0x0000f1b5 │ │ - ldrdls pc, [ip], #-137 @ 0xffffff77 │ │ - movwgt r9, #32259 @ 0x7e03 │ │ - andseq pc, r1, #64, 4 │ │ - andeq pc, r0, #200, 4 @ 0x8000000c │ │ - @ instruction: 0x4692d011 │ │ - svceq 0x0000f1b9 │ │ - ldrbmi sp, [pc], -r7 │ │ - bleq 16a960 │ │ - stmdb r0, {r4, r5, r6, ip, sp, lr, pc} │ │ - stmdbeq r1, {r0, r3, r4, r5, r7, r8, ip, sp, lr, pc} │ │ - @ instruction: 0x4652d1f8 │ │ - @ instruction: 0x4658b11d │ │ - svc 0x00d6f0ab │ │ - stmdbls r9, {r1, r4, r6, r9, sl, lr} │ │ - svcls 0x00074294 │ │ - @ instruction: 0x6c089b05 │ │ - andeq pc, r1, r0, lsl #2 │ │ - @ instruction: 0xf1086408 │ │ - tstle pc, r8, lsl #2 │ │ - stmdbls r8, {r3, fp, sp, lr} │ │ - stmdals r6, {fp, sp} │ │ - andle r6, r1, sl │ │ - svc 0x00c2f0ab │ │ - pop {r0, r3, r4, r5, ip, sp, pc} │ │ - svclt 0x00008ff0 │ │ - @ instruction: 0xfffea558 │ │ - @ instruction: 0xfffe9ba2 │ │ - @ instruction: 0xf8dd9806 │ │ - stcls 0, cr9, [r2, #-128] @ 0xffffff80 │ │ - rscslt r6, r9, #655360 @ 0xa0000 │ │ - tstcs r5, r1, asr #20 │ │ - movwvs lr, #10697 @ 0x29c9 │ │ - stmib r9, {r9, fp, sp}^ │ │ - svclt 0x00184100 │ │ - svc 0x00aaf0ab │ │ - pop {r0, r3, r4, r5, ip, sp, pc} │ │ - mcrls 15, 0, r8, cr6, cr0, {7} │ │ - rsble r2, r2, r0, lsl #22 │ │ - svclt 0x00042a08 │ │ - stmdbcs r8, {r0, r1, r8, sl, ip, pc} │ │ - ldmdavs sl, {r1, r4, r6, r8, ip, lr, pc} │ │ - bne 2e71c8 │ │ - @ instruction: 0xf04f6820 │ │ - stmdavs r1!, {r8, fp, lr}^ │ │ - ldmdavs fp, {r0, r1, r2, r4, r6, r9, sl, lr}^ │ │ - svccs 0x00004634 │ │ - strtmi sp, [r5], -sl, rrx │ │ - strvs lr, [r0], #-2516 @ 0xfffff62c │ │ - svccc 0x0010404c │ │ - b fe13c9c4 │ │ - @ instruction: 0x43260409 │ │ - ldreq pc, [r0], #-261 @ 0xfffffefb │ │ - ldmib r5, {r0, r4, r5, r6, r7, r8, ip, lr, pc}^ │ │ - subsmi r6, sp, r2, lsl #10 │ │ - b fe17ca18 │ │ - @ instruction: 0x432e0509 │ │ - ands sp, fp, r9, ror #3 │ │ - @ instruction: 0x4655681a │ │ - stmdavs r1!, {r5, fp, sp, lr}^ │ │ - ldmdavs fp, {r2, r3, r4, r5, r9, sl, lr}^ │ │ - suble r2, sp, r0, lsl #26 │ │ - ldmib r4, {r0, r1, r2, r5, r9, sl, lr}^ │ │ - submi r6, ip, r0, lsl #8 │ │ - submi r3, r6, r0, lsl sp │ │ - streq lr, [r9], #-2692 @ 0xfffff57c │ │ - @ instruction: 0xf1074326 │ │ - mvnsle r0, r0, lsl r4 │ │ - @ instruction: 0x7602e9d7 │ │ - subsmi r4, r7, lr, asr r0 │ │ - streq lr, [r9], -r6, lsl #21 │ │ - mvnle r4, r7, lsr r3 │ │ - stmdbls r3, {sp} │ │ - ldmdage sl, {r0, ip, pc} │ │ - movwcs r2, #520 @ 0x208 │ │ - blx fe3e8984 │ │ - ldrne lr, [ip], #-2525 @ 0xfffff623 │ │ - ldmib sp, {r1, r2, r3, r4, r9, fp, ip, pc}^ │ │ - stmdacs r0, {r1, r3, r4, r8, r9} │ │ - svcge 0x0012f47f │ │ - cmnlt r3, r6, lsl #30 │ │ - svclt 0x00082a08 │ │ - sbcle r2, sp, r8, lsl #18 │ │ - bge 6be9f8 │ │ - ldmdbmi r3!, {r1, r4, r5, r8, r9, fp, lr} │ │ - ldrbtmi r4, [fp], #-1144 @ 0xfffffb88 │ │ - tstls r0, r9, ror r4 │ │ - @ instruction: 0xf014212b │ │ - stmdage sl!, {r0, r3, r4, r5, r7, r8, sl, fp, ip, sp, lr, pc} │ │ - blx ae89b6 │ │ - stmdacs r0, {r1, r3, r5, fp, ip, pc} │ │ - stmdals fp!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ - ldmda sl, {r4, r5, r6, ip, sp, lr, pc}^ │ │ - @ instruction: 0xf01ba832 │ │ - ldmdals r2!, {r0, r5, r8, r9, fp, ip, sp, lr, pc} │ │ - vshl.s8 d18, d1, #0 │ │ - cdpge 5, 1, cr0, cr10, cr0, {0} │ │ - @ instruction: 0xf8dd2800 │ │ - svclt 0x001c9024 │ │ - @ instruction: 0xf0709833 │ │ - ldr lr, [r5, -ip, asr #16] │ │ - @ instruction: 0xf0ab2019 │ │ - cmnlt r0, #62, 30 @ 0xf8 │ │ - ldrcs r4, [r1, #-2330] @ 0xfffff6e6 │ │ - vrshr.s8 d18, d9, #8 │ │ - ldrbtmi r0, [r9], #-1280 @ 0xfffffb00 │ │ - pkhbtmi r2, r2, r9, lsl #8 │ │ - ldc2 0, cr15, [sp, #-672] @ 0xfffffd60 │ │ - andcs r3, r0, r4, lsl #26 │ │ - andls r2, r2, r9, lsl r7 │ │ - @ instruction: 0xf01ba82a │ │ - stmdals sl!, {r0, r1, r2, r3, r4, r5, r6, r7, r9, fp, ip, sp, lr, pc} │ │ - stmdals fp!, {r4, r8, ip, sp, pc} │ │ - ldmda r0!, {r4, r5, r6, ip, sp, lr, pc} │ │ - @ instruction: 0xf8ddae1a │ │ - ldrbmi r9, [r3], -r4, lsr #32 │ │ - stmdami pc, {r0, r2, r3, r5, r6, r7, r9, sl, sp, lr, pc} @ │ │ - @ instruction: 0xf0144478 │ │ - stmdami ip, {r0, r1, r3, r4, r5, r7, sl, fp, ip, sp, lr, pc} │ │ - @ instruction: 0xf0144478 │ │ - stmdami ip, {r0, r1, r2, r4, r5, r7, sl, fp, ip, sp, lr, pc} │ │ - @ instruction: 0xf0134478 │ │ - andcs pc, r1, r9, lsr r8 @ │ │ - @ instruction: 0xf0112117 │ │ - andcs pc, r1, fp, ror #21 │ │ - @ instruction: 0xf0112120 │ │ - andcs pc, r1, r7, ror #21 │ │ - @ instruction: 0xf0112119 │ │ - svclt 0x0000fae3 │ │ - @ instruction: 0xfffea318 │ │ - @ instruction: 0xfffea10a │ │ - strdeq lr, [sl], -r4 │ │ - andeq lr, sl, ip, ror #5 │ │ - andeq lr, sl, ip, lsl #3 │ │ - @ instruction: 0xfffecb53 │ │ - andeq lr, sl, sl, lsl r0 │ │ - andeq lr, sl, r8, lsr r1 │ │ - ldrbmi lr, [r0, sp, lsr #18]! │ │ - @ instruction: 0xf100b08e │ │ - strmi r0, [r4], -r8, lsl #18 │ │ - ldm r9, {r0, sp} │ │ - @ instruction: 0xf1050320 │ │ - ldmda r6, {r3, r9, sl}^ │ │ - stmdbcs r0, {r8, r9, sl, fp, ip} │ │ - addhi pc, pc, r0, asr #32 │ │ - tsteq r0, r6, asr #16 │ │ - mvnsle r2, r0, lsl #18 │ │ - svchi 0x005bf3bf │ │ - ldrbtmi r4, [r8], #-2146 @ 0xfffff79e │ │ - stmdavs r0, {r1, r7, r9, sl, lr}^ │ │ - @ instruction: 0xf0400040 │ │ - strcs r8, [r0, -r8, lsl #1] │ │ - stmdacs r0, {r3, r5, r8, r9, fp, ip, sp, lr} │ │ - addhi pc, fp, r0, asr #32 │ │ - stmdacs r2, {r3, r5, r8, sl, fp, ip, sp, lr} │ │ - andcs sp, r9, r3, lsr r1 │ │ - andeq pc, r0, r8, asr #5 │ │ - stmdblt r7!, {r1, ip, pc} │ │ - ldrdeq pc, [r4], -sl │ │ - @ instruction: 0xf0400040 │ │ - mulcs r0, lr, r0 │ │ - svchi 0x005bf3bf │ │ - svcne 0x0000e856 │ │ - andeq lr, r0, #4587520 @ 0x460000 │ │ - mvnsle r2, r0, lsl #20 │ │ - @ instruction: 0xf0002902 │ │ - vaddl.u q4, d31, d4 │ │ - ldmda r5, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ - cdpne 15, 4, cr0, cr1, cr0, {0} │ │ - andne lr, r0, #4521984 @ 0x450000 │ │ - mvnsle r2, r0, lsl #20 │ │ - tstle r4, r1, lsl #16 │ │ - vrsubhn.i d4, , q12 │ │ - @ instruction: 0xf0068f5b │ │ - @ instruction: 0xf8d9fb76 │ │ - stmdbcs r0, {ip} │ │ - @ instruction: 0x4640bf1c │ │ - @ instruction: 0xf8d94788 │ │ - stmdacs r0, {r2} │ │ - @ instruction: 0x4640bf1c │ │ - cdp 0, 8, cr15, cr8, cr11, {5} │ │ - @ instruction: 0xf8d9e02d │ │ - @ instruction: 0xf105300c │ │ - stmdage r2, {r4, r9} │ │ - ldrmi r4, [r8, r1, asr #12] │ │ - ldrdeq pc, [r4], -r9 │ │ - svclt 0x001c2800 │ │ - @ instruction: 0xf0ab4640 │ │ - ldmdblt pc, {r1, r3, r4, r5, r6, r9, sl, fp, sp, lr, pc} @ │ │ - ldrdeq pc, [r4], -sl │ │ - cmnle r7, r0, asr #32 │ │ - vaddl.u q1, d15, d0 │ │ - ldmda r6, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ - stmda r6, {r8, r9, sl, fp, ip}^ │ │ - bcs 2d2ec │ │ - stmdbcs r2, {r0, r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ - vmla.i , , d14[0] │ │ - ldmda r5, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ - cdpne 15, 4, cr0, cr1, cr0, {0} │ │ - andne lr, r0, #4521984 @ 0x450000 │ │ - mvnsle r2, r0, lsl #20 │ │ - tstle r4, r1, lsl #16 │ │ - vrsubhn.i d4, , q12 │ │ - @ instruction: 0xf0068f5b │ │ - stmdage r2, {r1, r3, r4, r5, r8, r9, fp, ip, sp, lr, pc} │ │ - blx feaeaaf2 │ │ - strmi r4, [fp], -r2, lsl #12 │ │ - ldrdeq lr, [r0, -r4] │ │ - ldrdvc pc, [ip], -sl │ │ - svchi 0x005bf3bf │ │ - @ instruction: 0xd1262f02 │ │ - movwcs lr, #18893 @ 0x49cd │ │ - andls r2, r2, #805306368 @ 0x30000000 │ │ - @ instruction: 0xf8daaa02 │ │ - @ instruction: 0x47b87010 │ │ - pop {r1, r2, r3, ip, sp, pc} │ │ - @ instruction: 0x463087f0 │ │ - svchi 0x002ff3bf │ │ - cdp2 0, 13, cr15, cr11, cr10, {2} │ │ - @ instruction: 0xf04ae770 │ │ - @ instruction: 0xf080fddf │ │ - blvc a2e75c │ │ - @ instruction: 0xf43f2800 │ │ - ldmdami r8, {r0, r2, r4, r5, r6, r8, r9, sl, fp, sp, pc} │ │ - blmi 65736c │ │ - ldrbtmi r4, [r8], #-2328 @ 0xfffff6e8 │ │ - @ instruction: 0xf88d447b │ │ - ldrbtmi r7, [r9], #-12 │ │ - @ instruction: 0x212b9100 │ │ - @ instruction: 0xf0149602 │ │ - ldmdami r4, {r0, r2, r3, r4, r7, sl, fp, ip, sp, lr, pc} │ │ - @ instruction: 0xf0124478 │ │ - rscscs pc, r0, sp, asr pc @ │ │ - addcs r4, r1, #51380224 @ 0x3100000 │ │ - @ instruction: 0xf0ab2301 │ │ - ldrb lr, [r4, -r4, lsr #28]! │ │ - @ instruction: 0x463120f0 │ │ - movwcs r2, #4737 @ 0x1281 │ │ - cdp 0, 1, cr15, cr12, cr11, {5} │ │ - @ instruction: 0xf04ae7a9 │ │ - stmdacs r0, {r0, r1, r2, r4, r5, r7, r8, sl, fp, ip, sp, lr, pc} │ │ - andcs fp, r1, r4, lsl #30 │ │ - ldrb r7, [sl, -r8, lsr #6] │ │ - ldc2 0, cr15, [r0, #296]! @ 0x128 │ │ - svclt 0x00042800 │ │ - @ instruction: 0x73282001 │ │ - svclt 0x0000e790 │ │ - andeq r1, fp, r6, ror #26 │ │ - @ instruction: 0xfffec921 │ │ - andeq sp, sl, r4, asr #10 │ │ - andeq sp, sl, lr, lsl r6 │ │ - andeq sp, sl, r0, asr r7 │ │ - @ instruction: 0xb086b5b0 │ │ - strmi r4, [sp], -r4, lsl #12 │ │ - movweq lr, #2513 @ 0x9d1 │ │ - stmib sp, {r0, r3, r6, r7, fp, sp, lr}^ │ │ - stmdage r2, {r8, r9} │ │ - blx 2e8c8a │ │ - mulne ip, sp, r8 │ │ - stmdals r2, {r0, r4, r9, sp} │ │ - andeq pc, r0, #200, 4 @ 0x8000000c │ │ - @ instruction: 0xd1044290 │ │ - andsvc r6, r1, sl, lsr #17 │ │ - andlt r6, r6, r0, lsr #32 │ │ - @ instruction: 0xf8ddbdb0 │ │ - stcls 0, cr2, [r5, #-52] @ 0xffffffcc │ │ - @ instruction: 0x3011f8dd │ │ - @ instruction: 0xf8c460e5 │ │ - @ instruction: 0xf8c43009 │ │ - @ instruction: 0x71212005 │ │ - andlt r6, r6, r0, lsr #32 │ │ - ldrblt fp, [r0, #-3504]! @ 0xfffff250 │ │ + andls fp, r2, r7, lsl #1 │ │ + beq 4a5b54 │ │ + strmi r6, [r9], r8, asr #16 │ │ + beq 65d7c │ │ + @ instruction: 0xf8d9b1e8 │ │ + @ instruction: 0xf10d4000 │ │ + @ instruction: 0xf8d90b0c │ │ + ldrmi r7, [r6], -r8 │ │ + stmiaeq r0, {r0, r1, r2, r3, r6, r9, fp, sp, lr, pc}^ │ │ + ldmib r4, {r8, sl, sp}^ │ │ + ldrtmi r0, [r2], -r0, lsl #2 │ │ + smlabteq r0, sp, r9, lr │ │ + @ instruction: 0x46394658 │ │ + @ instruction: 0xf8c4f02c │ │ + ldrbmi r9, [r0, #-2051] @ 0xfffff7fd │ │ + @ instruction: 0xf89dd111 │ │ + strcc r0, [r8], #-16 │ │ + stmdaeq r8, {r3, r4, r5, r7, r8, ip, sp, lr, pc} │ │ + mvnle r4, r5, lsl #8 │ │ + strcs lr, [r0, #-0] │ │ + ldrdeq pc, [ip], -r9 │ │ + andvs r9, r5, r2, lsl #18 │ │ + andge pc, r0, r1, asr #17 │ │ + pop {r0, r1, r2, ip, sp, pc} │ │ + mcrls 15, 0, r8, cr2, cr0, {7} │ │ + @ instruction: 0x1015f8dd │ │ + mulscc r0, sp, r8 │ │ + @ instruction: 0x7011f8dd │ │ + @ instruction: 0xf8c69a06 │ │ + @ instruction: 0xf8c61009 │ │ + rscsvs r7, r2, r5 │ │ + eorsvs r7, r0, r3, lsr r1 │ │ + pop {r0, r1, r2, ip, sp, pc} │ │ + ldrblt r8, [r0, #-4080]! @ 0xfffff010 │ │ strmi fp, [r4], -sl, lsl #1 │ │ mulpl r9, r1, r8 │ │ @ instruction: 0x5604e9d1 │ │ stm sp, {r0, r3, r7, r8, fp, sp, lr} │ │ stmdage r6, {r0, r3, ip, lr} │ │ strpl lr, [r4], -sp, asr #19 │ │ - @ instruction: 0xffd8f027 │ │ + @ instruction: 0xf9c0f02c │ │ tstcs r1, r6, lsl #16 │ │ smlabteq r0, r8, r2, pc @ │ │ andle r4, ip, r8, lsl #5 │ │ ldrdne pc, [r1], -sp @ │ │ mulscc ip, sp, r8 │ │ @ instruction: 0x601df8dd │ │ @ instruction: 0xf8c49a09 │ │ @ instruction: 0xf8c41009 │ │ rscvs r6, r2, r5 │ │ eorvs r7, r0, r3, lsr #2 │ │ ldcllt 0, cr11, [r0, #-40]! @ 0xffffffd8 │ │ svcmi 0x00f0e92d │ │ - andls fp, r5, sp, lsl #1 │ │ - stmdavs r8, {r0, r4, r7, r9, sl, lr} │ │ - cmnlt sl, #4325376 @ 0x420000 │ │ - @ instruction: 0xf10d6804 │ │ - stmdavs lr, {r3, r5, r8, r9, fp}^ │ │ - beq 6690b8 │ │ - strne lr, [r2, -r4, lsl #22] │ │ - stmdaeq r0, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ - bcs 87018 │ │ - ldm r4, {r0, r1, r2, r3, r5, r8, fp, ip, lr, pc} │ │ - stmib sp, {r0, r1, r3}^ │ │ - @ instruction: 0xf081320a │ │ - ldmdahi sp, {r9, lr} │ │ - strls r4, [ip, #-770] @ 0xfffffcfe │ │ - andcs fp, r1, #24, 30 @ 0x60 │ │ - stmdacs r0, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc} │ │ - stm r2, {r1, r9, fp, sp, pc} │ │ - ldrbmi r0, [r0], -r3, lsl #16 │ │ - @ instruction: 0x464a4631 │ │ - cdp2 0, 6, cr15, cr2, cr7, {1} │ │ - tstcs r1, r6, lsl #16 │ │ - smlabteq r0, r8, r2, pc @ │ │ - smlabble sp, r8, r2, r4 │ │ - ldrdeq lr, [r8, -sp] │ │ - smlatteq r4, r4, r8, lr │ │ - ldrhle r4, [fp, #44] @ 0x2c │ │ - tstcs r1, r5, lsl #16 │ │ - smlabteq r0, r8, r2, pc @ │ │ - andlt r6, sp, r1 │ │ - svchi 0x00f0e8bd │ │ - svcls 0x0005ab07 │ │ - strgt ip, [pc, -lr, lsl #22] │ │ - pop {r0, r2, r3, ip, sp, pc} │ │ - blmi 110cb4 │ │ - mrscs r2, (UNDEF: 2) │ │ - @ instruction: 0xf012447b │ │ - svclt 0x0000fe57 │ │ - andeq sp, sl, r8, lsr sp │ │ - svcmi 0x00f0e92d │ │ - @ instruction: 0xf8d1b0a3 │ │ - ldrmi r8, [r3], r4 │ │ - @ instruction: 0x7602e9db │ │ - movwcs lr, #51672 @ 0xc9d8 │ │ - rsbsmi r4, sl, r3, ror r0 │ │ - vcge.s8 d20, d0, d10 │ │ - vsubw.s8 q8, q4, d9 │ │ - mrsle r0, SPSR_abt │ │ - ldrdcs pc, [r0], #-139 @ 0xffffff75 │ │ - @ instruction: 0xf0402a00 │ │ - ldrbmi r8, [r9], r6, lsr #1 │ │ - @ instruction: 0xf859680a │ │ - @ instruction: 0xf04f7f44 │ │ - ldmib r9, {r8, lr}^ │ │ - @ instruction: 0xf1b76501 │ │ - @ instruction: 0xf8c94f00 │ │ - eorsle r1, r3, r0 │ │ - stmib sp, {r0, r8, fp, sp, pc}^ │ │ - mvngt r2, r4 │ │ - mrscs r2, (UNDEF: 4) │ │ - stmib sp, {r1, r2, r8, sl, fp, sp, pc}^ │ │ - vrhadd.s8 d16, d0, d8 │ │ - stmib sp, {r0, r2, r3, r7, r8, ip, sp}^ │ │ - stmib sp, {r1, r2}^ │ │ - stmib sp, {r1, r3}^ │ │ - and r0, r1, ip, lsl #2 │ │ - @ instruction: 0xd1230890 │ │ - @ instruction: 0xf01b4628 │ │ - stmdals fp, {r0, r1, r4, r5, r9, fp, ip, sp, lr, pc} │ │ - rscsle r2, r9, r0, lsl #16 │ │ - movwcs r2, #8448 @ 0x2100 │ │ - strcs r2, [r0], -r1, lsl #14 │ │ - blx fe924daa │ │ - stmdaeq r0, {r0, r1, sl, sp}^ │ │ - strmi pc, [r6], #-2819 @ 0xfffff4fd │ │ - strmi pc, [r6], -r3, lsl #22 │ │ - bfieq r4, r3, (invalid: 12:2) │ │ - blx fe921176 │ │ - stmdacs r1, {r0, r1, r2, sl, sp} │ │ - blx 12113a │ │ - blx 1bd1b2 │ │ - ldrmi r1, [r7], -r7, lsl #2 │ │ - movwcc lr, #30699 @ 0x77eb │ │ - eorlt r6, r3, r3 │ │ - svchi 0x00f0e8bd │ │ - @ instruction: 0xf10dcd8e │ │ - @ instruction: 0xf10a0a68 │ │ - addgt r0, lr, r4 │ │ - umulleq lr, lr, r5, r8 @ │ │ - teqcs r0, lr, lsl #1 │ │ - ldrdvs pc, [r0], -r8 @ │ │ - ldmdaeq r8, {r0, r2, r3, r8, ip, sp, lr, pc} │ │ - ldrdpl pc, [r0], -fp │ │ - @ instruction: 0xf0a84640 │ │ - @ instruction: 0x4628f9d8 │ │ - @ instruction: 0x46424631 │ │ - @ instruction: 0xf0742330 │ │ - ldmib sp, {r1, r4, r5, r6, fp, sp, lr, pc}^ │ │ - stmdbls r3, {r1, r2, r3, lr} │ │ - @ instruction: 0xf04f9000 │ │ - @ instruction: 0xf8cb30ff │ │ - stmdals r1, {r6} │ │ - stmdals r2, {r0, r3, ip, pc} │ │ - andcs r9, r0, r8 │ │ - stmib sp, {r1, r3, ip, pc}^ │ │ - cps #6 │ │ - ldm sl!, {r2, r4} │ │ - addgt r0, lr, lr, lsl #1 │ │ - smulleq lr, lr, sl, r8 @ │ │ - ldmdage r6, {r1, r2, r3, r6, r7, lr, pc} │ │ - @ instruction: 0xf8cd4641 │ │ - @ instruction: 0xf01eb050 │ │ - bge 5ebf48 │ │ - ldmdavs r1, {r0, r1, r3, r4, r6, r7, r8, fp, sp, lr, pc} │ │ - ldrdpl pc, [ip], #-139 @ 0xffffff75 │ │ - @ instruction: 0xf1b6ca07 │ │ - stm r9, {r8, r9, sl, fp, lr} │ │ - andle r0, ip, r7 │ │ - @ instruction: 0x4647b135 │ │ - bleq 16afa4 │ │ - ldcl 0, cr15, [lr, #444] @ 0x1bc │ │ - mvnsle r3, r1, lsl #26 │ │ - svclt 0x001c2e00 │ │ - @ instruction: 0xf0ab4640 │ │ - @ instruction: 0xf8dbecb6 │ │ - movwcs r0, #36928 @ 0x9040 │ │ - vqdmlal.s , d8, d0 │ │ - andcc r0, r1, r0, lsl #6 │ │ - subeq pc, r0, fp, asr #17 │ │ - movwcc r9, #34820 @ 0x8804 │ │ - smlabtmi r0, r0, r9, lr │ │ - andvs r9, r3, r5, lsl #16 │ │ - pop {r0, r1, r5, ip, sp, pc} │ │ - stmdami r2, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - @ instruction: 0xf0144478 │ │ - svclt 0x0000fa55 │ │ - andeq sp, sl, r0, lsr #28 │ │ - strdlt fp, [sp], r0 │ │ - ldmib r1, {r0, r1, r2, r9, sl, lr}^ │ │ - strmi r0, [ip], -r0, lsl #6 │ │ - @ instruction: 0x5603e9d1 │ │ - stm sp, {r0, r3, r6, r8, fp, sp, lr} │ │ - stmdage r4, {r0, r3, r5, r6} │ │ - cdp2 0, 8, cr15, cr12, cr6, {1} │ │ - stmdacs r1, {r2, fp, ip, pc} │ │ - blge 1a12c4 │ │ - blgt 40714c │ │ - stmiblt r6!, {r0, r1, r2, r3, r8, r9, sl, lr, pc} │ │ - stmdals r8, {r1, r2, r4, sp, lr, pc} │ │ - teqlt r8, r1, lsr #19 │ │ - @ instruction: 0x3606e9dd │ │ - stmibvs r3!, {r0, r1, r3, sp, lr} │ │ - subvs r9, lr, r9, lsl #20 │ │ - and r4, r0, r9, lsl r6 │ │ - stmib r1, {r9, sp}^ │ │ - tstcs r1, r2, lsl #4 │ │ - vmlal.s8 q11, d24, d16 │ │ - eorsvs r0, r9, r0, lsl #2 │ │ - stmiavs r0!, {r4, r8, ip, sp, pc}^ │ │ - stcl 0, cr15, [lr], #-684 @ 0xfffffd54 │ │ - ldcllt 0, cr11, [r0, #52]! @ 0x34 │ │ - svcmi 0x00f0e92d │ │ @ instruction: 0x4615b0fd │ │ andsls r6, r2, #9043968 @ 0x8a0000 │ │ stmiavs sl, {r0, r8, r9, sp}^ │ │ ldmib r1, {r2, r4, ip, pc}^ │ │ andsls r6, r1, #0 │ │ ldrdcs lr, [r4, -r1] │ │ tstcs sl, sp, asr #19 │ │ andcs r2, r4, #0, 2 │ │ rsbscc pc, r3, sp, lsl #17 │ │ - blge 791394 │ │ + blge 78d7c4 │ │ andsne lr, sp, #3358720 @ 0x334000 │ │ andne lr, r0, #3506176 @ 0x358000 │ │ - blge 6d1bb0 │ │ + blge 6cdfe0 │ │ @ instruction: 0xf10d9322 │ │ @ instruction: 0x93210373 │ │ @ instruction: 0x3702e9d5 │ │ - b fe210fb4 │ │ + b fe20d3e4 │ │ subsmi r0, r9, r2 │ │ vcgt.s8 d20, d0, d8 │ │ vsra.s8 d16, d1, #8 │ │ tstle r2, r0, lsl #2 │ │ stmdacs r0, {r3, r5, sl, fp, sp, lr} │ │ ldrbthi pc, [r7], -r1, asr #32 @ │ │ @ instruction: 0xf85546ab │ │ @ instruction: 0xf04faf44 │ │ ldmib r5, {lr}^ │ │ @ instruction: 0xf1ba8901 │ │ eorvs r4, r8, r0, lsl #30 │ │ addhi pc, lr, r0, asr #32 │ │ andeq pc, r8, r1, lsr #3 │ │ cdpne 0, 4, cr14, cr8, cr0, {0} │ │ - blx 1810fc8 │ │ - b 10691a0 │ │ + blx 180d3f8 │ │ + b 10655d0 │ │ andsls r2, r7, r1 │ │ andsls r2, r0, r6 │ │ andsls r2, r3, r1 │ │ @ instruction: 0x711ee9dd │ │ tstls r9, r0, lsl #18 │ │ teqphi lr, r1 @ p-variant is OBSOLETE │ │ - bleq 690cc │ │ + bleq 654fc │ │ strtmi lr, [r5], -r9 │ │ - @ instruction: 0xf0ab4628 │ │ - @ instruction: 0xf10bec16 │ │ + @ instruction: 0xf0af4628 │ │ + @ instruction: 0xf10bea06 │ │ ldmdals r9, {r0, r8, r9, fp} │ │ @ instruction: 0xf0014583 │ │ - bl 30d46c │ │ + bl 30989c │ │ @ instruction: 0xf857014b │ │ stmdacs r0, {r0, r5} │ │ - bl 221380 │ │ + bl 21d7b0 │ │ ldmib r1, {r0, r7, r8}^ │ │ @ instruction: 0xf1ba8a01 │ │ suble r0, r8, r0, lsl #30 │ │ and r2, ip, r0, lsl #8 │ │ stmdaeq r1, {r1, r2, r8, ip, sp, lr, pc} │ │ strtmi r4, [r8], -ip, lsr #12 │ │ @ instruction: 0xf1aa4631 │ │ - @ instruction: 0xf0210a01 │ │ - andcs pc, r0, fp, lsr #16 │ │ + @ instruction: 0xf0240a01 │ │ + andcs pc, r0, fp, lsl pc @ │ │ svceq 0x0000f1ba │ │ cmplt r4, r2, asr #32 │ │ strtmi r4, [r0], -r1, lsl #13 │ │ @ instruction: 0x1192f8b0 │ │ andsle r4, r2, #136, 10 @ 0x22000000 │ │ strmi r4, [r5], -r6, asr #12 │ │ @ instruction: 0xf1b8e01f │ │ @@ -11479,15 +7651,15 @@ │ │ @ instruction: 0xf04f0800 │ │ @ instruction: 0xf8b00900 │ │ strmi r1, [r8, #402] @ 0x192 │ │ @ instruction: 0xf8d0d3ec │ │ stccs 1, cr5, [r0, #-32] @ 0xffffffe0 │ │ strhi pc, [r9], -r1 │ │ @ instruction: 0x6190f8b0 │ │ - bl ff4692d0 │ │ + stmib r0, {r0, r1, r2, r3, r5, r7, ip, sp, lr, pc}^ │ │ @ instruction: 0x0192f8b5 │ │ stmdbeq r1, {r0, r3, r8, ip, sp, lr, pc} │ │ strtmi r4, [r8], -r6, lsl #5 │ │ @ instruction: 0xf1b9d2ef │ │ sbcle r0, r5, r0, lsl #30 │ │ addeq lr, r6, r5, lsl #22 │ │ sbcvc pc, lr, r0, lsl #10 │ │ @@ -11499,41 +7671,41 @@ │ │ svceq 0x0000f1b8 │ │ @ instruction: 0xf8d4d004 │ │ @ instruction: 0xf1b84198 │ │ mvnsle r0, r1, lsl #16 │ │ ldrdeq pc, [r8, -r4] │ │ addsle r2, r2, r0, lsl #16 │ │ strtmi r4, [r0], -r5, lsl #12 │ │ - bl fea69320 │ │ + ldmib r8, {r0, r1, r2, r3, r5, r7, ip, sp, lr, pc} │ │ ldrdeq pc, [r8, -r5] │ │ stmdacs r0, {r2, r3, r5, r9, sl, lr} │ │ @ instruction: 0xe789d1f6 │ │ mrscs r2, (UNDEF: 4) │ │ stmib sp, {r2, r4, r5, sl, fp, sp, pc}^ │ │ vand d16, d0, d22 │ │ ldrls r3, [r9], -sp, lsl #3 │ │ stmib sp, {r0, r1, r2, r3, r8, sl, ip, pc}^ │ │ stmib sp, {r2, r4, r5}^ │ │ stmib sp, {r3, r4, r5}^ │ │ and r0, r1, sl, lsr r1 │ │ @ instruction: 0xd11e0890 │ │ - @ instruction: 0xf01b4620 │ │ - ldmdals r9!, {r0, r1, r3, r4, r7, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xf01f4620 │ │ + ldmdals r9!, {r0, r1, r2, fp, ip, sp, lr, pc} │ │ rscsle r2, r9, r0, lsl #16 │ │ movwcs r2, #8448 @ 0x2100 │ │ strcs r2, [r0, -r1, lsl #10] │ │ - blx fe9250da │ │ + blx fe92150a │ │ stmdaeq r0, {r0, r1, r9, sl, sp}^ │ │ strvs pc, [r7], -r3, lsl #22 │ │ strvs pc, [r7, -r3, lsl #22] │ │ bfieq r4, r3, (invalid: 12:2) │ │ - blx fe9214a6 │ │ + blx fe91d8d6 │ │ stmdacs r1, {r0, r2, r9, sl, sp} │ │ - blx 12146a │ │ - blx 2054e2 │ │ + blx 11d89a │ │ + blx 201912 │ │ ldrmi r1, [r5], -r5, lsl #2 │ │ strtmi lr, [r1], -fp, ror #15 │ │ stmibgt ip, {r2, r3, r6, sl, fp, sp, pc}^ │ │ sbcgt r1, ip, r0, lsr #26 │ │ smulleq lr, ip, r1, r8 │ │ sbcgt r4, ip, r1, lsr #12 │ │ stmib sp, {sp}^ │ │ @@ -11543,16 +7715,16 @@ │ │ @ instruction: 0xf8cd3014 │ │ stmibgt ip, {r3, r6, r7, ip, sp, pc}^ │ │ ldm r1, {r2, r3, r6, r7, lr, pc} │ │ rscgt r0, ip, ip, ror #1 │ │ mcrvs 13, 7, r9, cr8, cr9, {0} │ │ subsle r2, r9, r0, lsl #16 │ │ strtmi sl, [r0], -r4, lsr #20 │ │ - @ instruction: 0xf02c4629 │ │ - ldmib sp, {r0, r1, r2, r3, r4, r5, r6, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf02f4629 │ │ + ldmib sp, {r0, r1, r2, r3, r5, r6, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ svcls 0x004f1b4c │ │ andsls r9, r8, lr, asr #16 │ │ vshr.s8 d18, d1, #8 │ │ addmi r0, r1, #0 │ │ addshi pc, sl, r0, asr #32 │ │ bicslt r6, r0, #104, 26 @ 0x1a00 │ │ stmdbcs r0, {r0, r3, r5, r8, sl, fp, sp, lr} │ │ @@ -11563,106 +7735,106 @@ │ │ ldrtmi r1, [ip], -r5, asr #28 │ │ @ instruction: 0x0703e9d6 │ │ movwcs lr, #2518 @ 0x9d6 │ │ stmib sp, {r4, r6, r8, r9, sl, ip, pc}^ │ │ stmdage r0!, {r1, r2, r3, r6, ip} │ │ movtcs lr, #51661 @ 0xc9cd │ │ andls pc, r0, sp, asr #17 │ │ - blx ff1e9222 │ │ - bl 15996c │ │ + blx fede5660 │ │ + bl 155d9c │ │ ldmdbls r8, {r2, r6} │ │ @ instruction: 0xf10d3618 │ │ - bl 6f384 │ │ + bl 6b7b4 │ │ adcmi r0, r6, #192, 8 @ 0xc0000000 │ │ ldmvs r0!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ andsle r2, r2, r0, lsl #16 │ │ movwcs lr, #2518 @ 0x9d6 │ │ ldcvc 5, cr15, [ip], {13} │ │ @ instruction: 0x1703e9d6 │ │ stm ip, {r0, r8, sl, fp, ip, sp} │ │ strbmi r0, [r0], -r3, lsl #1 │ │ movtcs lr, #51661 @ 0xc9cd │ │ andls pc, r0, sp, asr #17 │ │ - blx fea6925e │ │ + blx fe66569c │ │ stccs 6, cr3, [r0, #-96] @ 0xffffffa0 │ │ ldrcs sp, [r1, -r7, ror #3] │ │ vmull.p8 q13, d8, d20 │ │ @ instruction: 0xf1bb0700 │ │ @ instruction: 0xf0000f00 │ │ ldmdals r8, {r2, r7, r8, r9, sl, pc} │ │ - b fff69478 │ │ + stmia ip!, {r0, r1, r2, r3, r5, r7, ip, sp, lr, pc}^ │ │ svclt 0x007ff000 │ │ ldrsbthi pc, [r8], #-133 @ 0xffffff7b @ │ │ eorsge pc, r8, sp, asr #17 │ │ svceq 0x0000f1b8 │ │ sbchi pc, sp, r0 │ │ subeq lr, r8, r8, lsl #22 │ │ ldrsbtlt pc, [r4], #-133 @ 0xffffff7b @ │ │ andsls r0, r8, r0, lsl #2 │ │ - bl e949c │ │ + ldm sl!, {r0, r1, r2, r3, r5, r7, ip, sp, lr, pc}^ │ │ @ instruction: 0xf0012800 │ │ strmi r8, [r2], fp, lsl #11 │ │ @ instruction: 0xf8cd2500 │ │ eor r8, r8, ip, asr r0 │ │ ldrtmi r2, [r8], -r1, lsl #14 │ │ ldrtmi r4, [r2], -r1, lsr #12 │ │ ldmdbeq r0!, {r0, r1, r3, r8, ip, sp, lr, pc} │ │ stmdaeq r1, {r3, r5, r7, r8, ip, sp, lr, pc} │ │ - @ instruction: 0xf8dbf0a8 │ │ + cdp2 0, 5, cr15, cr5, cr11, {5} │ │ strcc lr, [r0], #-2523 @ 0xfffff625 │ │ svceq 0x0000f1b8 │ │ ldrdeq lr, [r2, -fp] │ │ @ instruction: 0xc01cf8db │ │ mla r8, fp, r8, pc @ │ │ mlacs r0, fp, r8, pc @ │ │ @ instruction: 0xf84a46cb │ │ - bl 2b9248 │ │ + bl 2b5678 │ │ @ instruction: 0xf1050305 │ │ stmib r3, {r4, r5, r8, sl}^ │ │ @ instruction: 0xf1034001 │ │ @ instruction: 0xf883000c │ │ @ instruction: 0xf8832020 │ │ sbcgt lr, r2, r8, lsr #32 │ │ @ instruction: 0x6c06e9c3 │ │ ldmdals r8, {r1, r2, r4, ip, lr, pc} │ │ andsle r4, r3, r8, lsr #5 │ │ @ instruction: 0x4605e9db │ │ sbcle r2, pc, r0, lsl #28 │ │ - @ instruction: 0xf0ab4630 │ │ - stmdacs r0, {r3, r6, r7, r9, fp, sp, lr, pc} │ │ + @ instruction: 0xf0af4630 │ │ + stmdacs r0, {r6, r7, fp, sp, lr, pc} │ │ ldrhi pc, [r9, #-1]! │ │ strb r4, [r8, r7, lsl #12] │ │ - b 1418b04 │ │ + b 1414f34 │ │ stmib sp, {r0, r1, r3, r4, sp}^ │ │ andsls r7, r7, r5, lsl r1 │ │ svclt 0x0028f000 │ │ andcs r9, r0, r7, lsl ip │ │ @ instruction: 0xf50d2104 │ │ @ instruction: 0xf10d7998 │ │ stmib sp, {r4, r6, r7, r8, r9, fp}^ │ │ vrhadd.s8 q8, q0, q7 │ │ stmib sp, {r0, r2, r3, r7, r8, ip, sp}^ │ │ stmib sp, {r2, r3, r6}^ │ │ stmib sp, {r4, r6}^ │ │ and r0, r1, r2, asr r1 │ │ @ instruction: 0xd11e0890 │ │ - @ instruction: 0xf02b4648 │ │ - ldmdals r1, {r0, r2, r3, r5, r6, r7, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf02e4648 │ │ + ldmdals r1, {r0, r2, r3, r4, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ rscsle r2, r9, r0, lsl #16 │ │ movwcs r2, #8448 @ 0x2100 │ │ strcs r2, [r0, -r1, lsl #12] │ │ - blx fe9252de │ │ + blx fe92170e │ │ stmdaeq r0, {r0, r1, r8, sl, sp}^ │ │ strpl pc, [r7, #-2819] @ 0xfffff4fd │ │ strpl pc, [r7, -r3, lsl #22] │ │ bfieq r4, r3, (invalid: 12:2) │ │ - blx fe9216aa │ │ + blx fe91dada │ │ stmdacs r1, {r1, r2, r8, sl, sp} │ │ - blx 12166e │ │ - blx 2016e6 │ │ + blx 11da9e │ │ + blx 1fdb16 │ │ ldrmi r1, [r6], -r6, lsl #2 │ │ strbmi lr, [r8], -fp, ror #15 │ │ stmiagt ip, {r0, r3, r4, r6, r9, sl, lr}^ │ │ ldm r0, {r2, r3, r6, r7, r8, lr, pc} │ │ andcs r0, r0, ip, asr #1 │ │ stmdbge r0!, {r2, r3, r6, r7, r8, lr, pc} │ │ ldrdhi pc, [r4], #-141 @ 0xffffff73 @ │ │ @@ -11678,28 +7850,28 @@ │ │ stmib sp, {r2, r3, r6, r8, sl, fp, sp, pc}^ │ │ vrhadd.s8 q8, q0, q7 │ │ stmib sp, {r0, r2, r3, r7, r8, ip, sp}^ │ │ stmib sp, {r2, r3, r6}^ │ │ stmib sp, {r4, r6}^ │ │ and r0, r1, r2, asr r1 │ │ @ instruction: 0xd1620890 │ │ - @ instruction: 0xf02b4628 │ │ - ldmdals r1, {r0, r1, r5, r7, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf02e4628 │ │ + ldmdals r1, {r0, r1, r4, r7, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ rscsle r2, r9, r0, lsl #16 │ │ movwcs r2, #8448 @ 0x2100 │ │ strcs r2, [r0, -r1, lsl #12] │ │ - blx fe925372 │ │ + blx fe9217a2 │ │ stmdaeq r0, {r0, r1, sl, sp}^ │ │ strmi pc, [r7], #-2819 @ 0xfffff4fd │ │ strmi pc, [r7, -r3, lsl #22] │ │ bfieq r4, r3, (invalid: 12:2) │ │ - blx fe92173e │ │ + blx fe91db6e │ │ stmdacs r1, {r1, r2, sl, sp} │ │ - blx 121702 │ │ - blx 1fd77a │ │ + blx 11db32 │ │ + blx 1f9baa │ │ ldrmi r1, [r6], -r6, lsl #2 │ │ ldmib r5, {r0, r1, r3, r5, r6, r7, r8, r9, sl, sp, lr, pc}^ │ │ stmdage r0!, {r2, r4, r9, ip} │ │ andcs r9, r0, sl, rrx │ │ stmne r9, {r0, r2, r3, r5, r6, r8, ip, pc} │ │ svclt 0x0028906b │ │ mvnscc pc, pc, asr #32 │ │ @@ -11710,146 +7882,146 @@ │ │ smlalbteq lr, lr, sp, r9 @ │ │ orrcc pc, sp, r0, asr #4 │ │ subeq lr, ip, sp, asr #19 │ │ subseq lr, r0, sp, asr #19 │ │ cmpeq r2, sp, asr #19 │ │ ldmeq r0, {r1, sp, lr, pc} │ │ ldrbhi pc, [pc, -r0, asr #32]! @ │ │ - @ instruction: 0xf02b4620 │ │ - ldmdals r1, {r0, r1, r5, r6, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf02e4620 │ │ + ldmdals r1, {r0, r1, r4, r6, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ rscsle r2, r9, r0, lsl #16 │ │ movwcs r2, #8448 @ 0x2100 │ │ strcs r2, [r0, -r1, lsl #12] │ │ - blx fe9253f2 │ │ + blx fe921822 │ │ stmdaeq r0, {r0, r1, r8, sl, sp}^ │ │ strpl pc, [r7, #-2819] @ 0xfffff4fd │ │ strpl pc, [r7, -r3, lsl #22] │ │ bfieq r4, r3, (invalid: 12:2) │ │ - blx fe9217be │ │ + blx fe91dbee │ │ stmdacs r1, {r1, r2, r8, sl, sp} │ │ - blx 12177e │ │ - blx 2017fa │ │ + blx 11dbae │ │ + blx 1fdc2a │ │ ldrmi r1, [r6], -r6, lsl #2 │ │ @ instruction: 0xf04fe7eb │ │ subls r4, r6, r0 │ │ stcgt 0, cr14, [lr, #28] │ │ addgt sl, lr, r4, asr #16 │ │ umulleq lr, lr, r5, r8 @ │ │ @ instruction: 0xf8ddc08e │ │ @ instruction: 0xf8188064 │ │ subscs r0, r8, #8, 30 │ │ mcrge 7, 1, r2, cr4, cr1, {0} │ │ @ instruction: 0x5115e9d8 │ │ - blx 774a6 │ │ + blx 738d6 │ │ vaddw.s8 , q4, d2 │ │ tstls r0, r0, lsl #14 │ │ tstpne fp, r0, asr #4 @ p-variant is OBSOLETE │ │ teqpne r0, sp, lsr #17 @ p-variant is OBSOLETE │ │ strbmi fp, [r8], r8, lsl #30 │ │ stmibvc ip!, {r0, r2, r3, r8, sl, ip, sp, lr, pc}^ │ │ rsbhi pc, r4, sp, asr #17 │ │ andeq pc, r5, r9, lsl #2 │ │ @ instruction: 0xf1099009 │ │ andls r0, r7, r8 │ │ andcc sl, r8, r0, ror r8 │ │ stmdage sl!, {r3, ip, pc}^ │ │ andls r3, ip, r8 │ │ addmi r9, r5, #16, 16 @ 0x100000 │ │ - ldrbhi pc, [pc] @ 2d460 @ │ │ + ldrbhi pc, [pc] @ 29890 @ │ │ @ instruction: 0xa118f8dd │ │ stmdbvs sl!, {r2, r6, r8, fp, sp, pc} │ │ @ instruction: 0x4000f1ba │ │ orrlt pc, r4, sp, asr #17 │ │ ldrbhi lr, [pc], -sp, asr #19 │ │ @ instruction: 0x4608bf18 │ │ @ instruction: 0xf04f2a00 │ │ svclt 0x00480101 │ │ smlabbmi r0, r2, r0, pc @ │ │ stmdbcs r1, {r0, r4, r5, r7, r8, ip, sp, pc} │ │ - blvs ae192c │ │ + blvs addd5c │ │ rsbls r4, r9, r1, lsr r6 │ │ - @ instruction: 0xf01c4648 │ │ - @ instruction: 0xf50dfc37 │ │ + @ instruction: 0xf0204648 │ │ + @ instruction: 0xf50dfba3 │ │ ldmib sp, {r2, r3, r5, r6, r7, r8, r9, fp, ip, sp, lr}^ │ │ ldm fp, {r0, r3, r4, r5, r6, r9} │ │ stmdbcs r2, {r1, r4, fp} │ │ - b 142197c │ │ + b 141ddac │ │ andsls r2, r5, #-1073741818 @ 0xc0000006 │ │ andsne lr, r7, sp, asr #19 │ │ ldcllt 0, cr15, [r4] │ │ strbmi r6, [r8], -sl, lsr #19 │ │ - @ instruction: 0xf01c4631 │ │ - @ instruction: 0xf50dfc23 │ │ + @ instruction: 0xf0204631 │ │ + @ instruction: 0xf50dfb8f │ │ ldmib sp, {r2, r3, r5, r6, r7, r8, r9, fp, ip, sp, lr}^ │ │ ldm fp, {r0, r3, r4, r5, r6, r9, ip} │ │ stmdacs r2, {r0, r4, fp} │ │ - b 1421a0c │ │ + b 141de3c │ │ andsls r2, r5, #27 │ │ tsteq r7, sp, asr #19 │ │ stcllt 0, cr15, [r0] │ │ ldmdage pc, {r0, r3, r5, r6, ip, pc}^ @ │ │ ldrtmi r6, [r1], -sl, lsr #23 │ │ stmdage r9!, {r0, r1, r5, r6, ip, pc}^ │ │ strbmi r9, [r8], -r2, rrx │ │ strge lr, [r6], #-2517 @ 0xfffff62b │ │ - stc2 0, cr15, [r8], {28} │ │ + blx 1d659a6 │ │ ldrls r9, [r3, #-2166] @ 0xfffff78a │ │ cmple r5, r2, lsl #16 │ │ andsls r9, r8, r9, ror r8 │ │ ldmib sp, {r1, r3, r4, r5, r6, fp, ip, pc}^ │ │ andsls r4, r5, r7, ror fp │ │ andscs lr, fp, pc, asr #20 │ │ @ instruction: 0xf0009017 │ │ @ instruction: 0xf50dbcc4 │ │ - blls 1f0c880 │ │ + blls 1f08cb0 │ │ andeq lr, sp, ip, lsl #17 │ │ ldrtmi sl, [r8], sl, ror #16 │ │ ldmdaeq r2, {r7, fp, sp, lr, pc} │ │ ldmib r5, {r0, r4, r5, r9, sl, lr}^ │ │ andsls r0, r6, r2, lsl r7 │ │ rsbls sl, r4, pc, asr r8 │ │ @ instruction: 0x0050f895 │ │ stmdage sl!, {r0, r2, r3, ip, pc}^ │ │ rsbls r6, r3, sl, lsr #16 │ │ rsbls sl, r2, r9, ror #16 │ │ ldmib r5, {r3, r6, r9, sl, lr}^ │ │ @ instruction: 0xf895460f │ │ ldrls sl, [r3, #-81] @ 0xffffffaf │ │ - blx ff6e95c2 │ │ - blvc ffb6a988 │ │ + blx 11e5a02 │ │ + blvc ffb66db8 │ │ ldmdbpl r9!, {r0, r2, r3, r4, r6, r7, r8, fp, sp, lr, pc}^ │ │ stmdaeq r5, {r0, r1, r3, r4, r7, fp, sp, lr, pc} │ │ cmple r6, r2, lsl #16 │ │ andscs lr, fp, pc, asr #20 │ │ andsls r4, r7, r4, lsl r6 │ │ strbmi sl, [r7], -r4, lsr #28 │ │ @ instruction: 0xf50de259 │ │ - blls 1f0c89c │ │ + blls 1f08ccc │ │ andeq lr, lr, ip, lsl #17 │ │ stm r1, {r1, r5, r6, r8, fp, sp, pc} │ │ bfieq r0, r1, (invalid: 16:0) │ │ @ instruction: 0xf0019416 │ │ ssatmi r8, #25, lr, asr #6 │ │ movwvc lr, #35285 @ 0x89d5 │ │ andne lr, sl, #3489792 @ 0x354000 │ │ - blne ff2529e0 │ │ + blne ff24ee10 │ │ andeq lr, r3, r2, ror fp │ │ addhi pc, pc, r0, lsl #5 │ │ - bleq a96dc │ │ + bleq a5b0c │ │ strbmi r4, [r5], -r7, asr #12 │ │ stcllt 0, cr15, [fp], #-0 │ │ ldmib sp, {r5, r7, r9, sl, lr}^ │ │ stmib sp, {r0, r1, r2, r4, r5, r6, r9, lr}^ │ │ ldrtmi r4, [r1], -fp, ror #4 │ │ ldmib sp, {r1, r3, r5, r9, fp, sp, lr}^ │ │ mrcls 7, 3, r3, cr11, cr9, {3} │ │ strbmi r9, [r8], -sl, rrx │ │ strbcc lr, [sp, -sp, asr #19]! │ │ - @ instruction: 0xf01c966f │ │ - @ instruction: 0xf50dfb9d │ │ + @ instruction: 0xf020966f │ │ + @ instruction: 0xf50dfb09 │ │ ldmib sp, {r2, r3, r5, r6, r7, r8, r9, fp, ip, sp, lr}^ │ │ ldm fp, {r0, r3, r4, r5, r6, r8, sl, sp, lr} │ │ stmdacs r2, {r0, r2, fp} │ │ @ instruction: 0x2711d135 │ │ andscs lr, fp, pc, asr #20 │ │ andsls r4, r7, r4, lsl r6 │ │ streq pc, [r0, -r8, asr #5] │ │ @@ -11862,153 +8034,153 @@ │ │ ldmdals r3, {r5, r8, r9, pc} │ │ @ instruction: 0x463a4691 │ │ ldrtmi r4, [ip], -r3, lsr #12 │ │ @ instruction: 0xf89042be │ │ svclt 0x0038b028 │ │ svcls 0x00164632 │ │ @ instruction: 0x461d4619 │ │ - @ instruction: 0xf0ab4638 │ │ - adcsmi lr, r4, #557056 @ 0x88000 │ │ + @ instruction: 0xf0ae4638 │ │ + adcsmi lr, r4, #18, 30 @ 0x48 │ │ tstpeq r0, pc, asr #32 @ p-variant is OBSOLETE │ │ tstcs r1, r8, lsr pc │ │ @ instruction: 0xf04f2800 │ │ svclt 0x00480000 │ │ svclt 0x00082001 │ │ stmdacs r0, {r3, r9, sl, lr} │ │ @ instruction: 0xf04fd05e │ │ strbmi r0, [r7], -r1, lsl #22 │ │ ldmdbls fp!, {r2, r3, r4, r6, r7, r8, sp, lr, pc}^ │ │ ldmdbge r0!, {r0, r2, r4, r5, r6, r8, ip, pc}^ │ │ stmdaeq r5, {r0, r7, fp, sp, lr, pc} │ │ stmib sp, {r6, r7, r8, r9, sl}^ │ │ @ instruction: 0xf0016573 │ │ strdcs r8, [r8], -r4 │ │ - @ instruction: 0xf0ab4615 │ │ - ldrcs lr, [r1, -sl, asr #17] │ │ + @ instruction: 0xf0ae4615 │ │ + ldrcs lr, [r1, -r2, asr #29] │ │ vmlal.s8 q9, d8, d0 │ │ @ instruction: 0xf0010700 │ │ @ instruction: 0xf04f834b │ │ @ instruction: 0xf50d4100 │ │ - b fe08be28 │ │ + b fe088258 │ │ subvs r0, r1, r8, lsl #2 │ │ tstcs r0, r4, lsl #12 │ │ @ instruction: 0xf8c02208 │ │ stmib sp, {sp, pc}^ │ │ strbmi r2, [r8], -r0, lsl #2 │ │ andscs r4, r0, #42991616 @ 0x2900000 │ │ - @ instruction: 0xf01c4623 │ │ - strtmi pc, [r0], -fp, asr #23 │ │ - ldm r4, {r0, r1, r3, r5, r7, ip, sp, lr, pc} │ │ + @ instruction: 0xf0204623 │ │ + @ instruction: 0x4620fb37 │ │ + cdp 0, 8, cr15, cr4, cr14, {5} │ │ ldrbteq lr, [r6], #-2525 @ 0xfffff623 │ │ @ instruction: 0xf0402801 │ │ @ instruction: 0xf8dd8092 │ │ ldmdals r9!, {r5, r6, r7, r8, ip, sp, pc}^ │ │ ldmdals sl!, {r3, r4, ip, pc}^ │ │ - b 1411708 │ │ + b 140db38 │ │ andsls r2, r7, fp, lsl r0 │ │ @ instruction: 0xf895e185 │ │ stmib sp, {r4, r5, ip, pc}^ │ │ stmib sp, {r1, r3, r8, sp}^ │ │ @ instruction: 0xf0891200 │ │ ldmdbls r6, {r0} │ │ andls r4, r2, sl, lsr r6 │ │ movwls sl, #55414 @ 0xd876 │ │ - @ instruction: 0xffd0f02a │ │ - blvc ffb6ab10 │ │ + cdp2 0, 12, cr15, cr0, cr14, {1} │ │ + blvc ffb66f40 │ │ ldrbtvs lr, [r9], #-2525 @ 0xfffff623 │ │ stmdaeq r1!, {r0, r1, r3, r4, r7, fp, sp, lr, pc} │ │ @ instruction: 0xd1262801 │ │ andscs lr, fp, pc, asr #20 │ │ stmib sp, {r0, r2, r4, sl, ip, pc}^ │ │ mcrge 6, 1, r0, cr4, cr7, {0} │ │ stmibvc ip!, {r0, r2, r3, r8, sl, ip, sp, lr, pc}^ │ │ bic r4, r2, #74448896 @ 0x4700000 │ │ andeq pc, r1, fp, lsl #1 │ │ smlabbeq r1, sl, r0, pc @ │ │ ldrtmi r4, [r3], -sl, lsr #12 │ │ andne lr, r2, sp, asr #19 │ │ @ instruction: 0x4649a876 │ │ strvc lr, [r0], #-2509 @ 0xfffff633 │ │ - @ instruction: 0xf95af02b │ │ + @ instruction: 0xf84af02f │ │ cmncs r9, #3620864 @ 0x374000 │ │ @ instruction: 0x0776e9dd │ │ @ instruction: 0xf0402801 │ │ @ instruction: 0xf8dd8089 │ │ tstls r5, #224, 2 @ 0x38 │ │ andscs lr, fp, pc, asr #20 │ │ andseq lr, r7, #3358720 @ 0x334000 │ │ stccs 1, cr14, [r0, #-400] @ 0xfffffe70 │ │ rschi pc, r3, r0 │ │ svceq 0x0008f1bb │ │ sbcshi pc, r5, #65 @ 0x41 │ │ @ instruction: 0xf04f6868 │ │ @ instruction: 0xf8d54100 │ │ @ instruction: 0xf1bab000 │ │ - b fe041354 │ │ + b fe03d784 │ │ strls r0, [r6, -r1, lsl #10] │ │ stmdage r4, {r0, r1, r2, ip, lr, pc}^ │ │ @ instruction: 0x462b465a │ │ - @ instruction: 0xf866f02b │ │ + @ instruction: 0xff56f02e │ │ @ instruction: 0xf0002800 │ │ stccs 1, cr8, [r1], {38} @ 0x26 │ │ addshi pc, r4, #268435460 @ 0x10000004 │ │ @ instruction: 0x462b8830 │ │ ldmib sp, {r1, r2, r3, r5, r6, ip, pc}^ │ │ stmdals ip, {r0, r1, r2, r3, r4, r6, r9, ip} │ │ andeq lr, r0, #3358720 @ 0x334000 │ │ @ instruction: 0x465aa876 │ │ strblt lr, [sl, #-2509]! @ 0xfffff633 │ │ strbtvs lr, [ip], #-2509 @ 0xfffff633 │ │ andslt pc, r0, sp, asr #17 │ │ - @ instruction: 0xf01a9505 │ │ - ldclls 14, cr15, [r6, #-156]! @ 0xffffff64 │ │ + @ instruction: 0xf01e9505 │ │ + ldclls 13, cr15, [r6, #-588]! @ 0xfffffdb4 │ │ @ instruction: 0xf89d4647 │ │ strbmi fp, [r5, #-476] @ 0xfffffe24 │ │ msrhi SPSR_x, #64 @ 0x40 │ │ - b 1819038 │ │ + b 1815468 │ │ @ instruction: 0xf00070cb │ │ @ instruction: 0xf8dd818e │ │ ldmib r8, {r2, r7, r8, pc}^ │ │ andcc r0, r1, ip, lsl #2 │ │ eorseq pc, r0, r8, asr #17 │ │ vhsub.s8 d20, d16, d8 │ │ @ instruction: 0xf04f813f │ │ ldrtmi r0, [sp], -r0, lsl #22 │ │ stccs 3, cr14, [r0], {89} @ 0x59 │ │ addshi pc, r6, r0 │ │ ldrsbtcc lr, [r9], #-157 @ 0xffffff63 │ │ - bge 18d7d80 │ │ + bge 18d41b0 │ │ strbmi r9, [r8], -r0 │ │ - stc2 0, cr15, [r2], {43} @ 0x2b │ │ + blx 1ce5cce │ │ @ instruction: 0xf89d9c76 │ │ adcsmi fp, ip, #220, 2 @ 0x37 │ │ addshi pc, r0, r0, asr #32 │ │ sbcvc lr, fp, pc, asr sl │ │ rschi pc, r6, r0 │ │ strtmi r2, [r9], -r0 │ │ strbmi r9, [r8], -r1 │ │ movwcs r2, #521 @ 0x209 │ │ - blx 569876 │ │ + blx fe065cb4 │ │ ldrbteq lr, [r6], #-2525 @ 0xfffff623 │ │ @ instruction: 0xf43f2801 │ │ stccs 15, cr10, [r0], {76} @ 0x4c │ │ ldmib sp, {r2, r4, r5, r6, ip, lr, pc}^ │ │ stmdbge sl!, {r0, r3, r4, r5, r6, ip, sp}^ │ │ andls sl, r0, r2, ror #20 │ │ - @ instruction: 0xf02b4648 │ │ - ldclls 12, cr15, [r6], #-388 @ 0xfffffe7c │ │ + @ instruction: 0xf02f4648 │ │ + @ instruction: 0x9c76fb51 │ │ @ instruction: 0xb1dcf89d │ │ - strhle r4, [pc, #-44] @ 2d800 │ │ + strhle r4, [pc, #-44] @ 29c30 │ │ sbcvc lr, fp, pc, asr sl │ │ - bleq 69970 │ │ + bleq 65da0 │ │ ldrd sp, [r5], #30 │ │ @ instruction: 0xf0002f00 │ │ ldmdage r6!, {r1, r2, r3, r5, r7, pc}^ │ │ - @ instruction: 0xf02ba962 │ │ - @ instruction: 0xf89dfba3 │ │ + @ instruction: 0xf02fa962 │ │ + @ instruction: 0xf89dfa93 │ │ @ instruction: 0x2011b1dc │ │ @ instruction: 0xf2c89f76 │ │ addmi r0, r7, #0 │ │ adchi pc, r4, r0, asr #32 │ │ sbcvc lr, fp, pc, asr sl │ │ sbchi pc, fp, r0 │ │ @ instruction: 0xf04f980d │ │ @@ -12018,349 +8190,349 @@ │ │ @ instruction: 0xf04fbf18 │ │ @ instruction: 0xf1ba080e │ │ strtmi r0, [sl], r0, lsl #30 │ │ strmi fp, [r0], r8, lsl #30 │ │ andcs sp, r0, pc, asr #32 │ │ andls r4, r1, r9, asr #12 │ │ @ instruction: 0x4642a876 │ │ - @ instruction: 0xf01c2300 │ │ - @ instruction: 0xf50dfacd │ │ + @ instruction: 0xf0202300 │ │ + @ instruction: 0xf50dfa39 │ │ ldmib sp, {r2, r3, r5, r6, r7, r8, r9, fp, ip, sp, lr}^ │ │ ldm fp, {r0, r3, r4, r5, r6, sl, ip, lr} │ │ stmdacs r1, {r0, r7, fp} │ │ rscshi pc, r5, r0 │ │ rsbsle r2, r8, r0, lsl #30 │ │ @ instruction: 0x46504632 │ │ ldrmi r4, [r3, #1593]! @ 0x639 │ │ uasxmi fp, sl, r8 │ │ - svc 0x00d6f0aa │ │ + stcl 0, cr15, [r6, #696] @ 0x2b8 │ │ @ instruction: 0xf04f455e │ │ svclt 0x00880100 │ │ stmdacs r0, {r0, r8, sp} │ │ andeq pc, r0, pc, asr #32 │ │ andcs fp, r1, r8, asr #31 │ │ strmi fp, [r8], -r8, lsl #30 │ │ sbcsle r2, r6, r1, lsl #16 │ │ stmdbge r2!, {r1, r2, r4, r5, r6, fp, sp, pc}^ │ │ strtmi r4, [r3], -sl, lsr #12 │ │ - blx 15e998e │ │ + blx 11e5dcc │ │ @ instruction: 0xb1dcf89d │ │ svcls 0x00762011 │ │ andeq pc, r0, r8, asr #5 │ │ cmple r7, r7, lsl #5 │ │ sbcvc lr, fp, pc, asr sl │ │ - bleq 69a34 │ │ + bleq 65e64 │ │ rsbs sp, lr, r3, asr #3 │ │ - bleq a9a3c │ │ + bleq a5e6c │ │ @ instruction: 0xf04fe060 │ │ strbmi r0, [r7], -r1, lsl #22 │ │ adcs r4, r7, #72351744 @ 0x4500000 │ │ - bls 1e53d34 │ │ + bls 1e50164 │ │ stmvc r8, {r3, r4, r9, ip, pc} │ │ - bls 1e8f93c │ │ + bls 1e8bd6c │ │ andmi lr, r0, r1, asr #20 │ │ andsls r9, r7, r5, lsl r2 │ │ andcs lr, r0, r1, asr r0 │ │ andls r4, r1, r9, asr #12 │ │ @ instruction: 0x4642a876 │ │ - @ instruction: 0xf01c2300 │ │ - @ instruction: 0xf50dfa7d │ │ + @ instruction: 0xf0202300 │ │ + @ instruction: 0xf50df9e9 │ │ ldmib sp, {r2, r3, r5, r6, r7, r8, r9, fp, ip, sp, lr}^ │ │ ldm fp, {r0, r3, r4, r5, r6, r8, sl, sp, lr} │ │ stmdacs r0, {r0, r7, fp} │ │ msrhi SPSR_sx, #64 @ 0x40 │ │ strtmi fp, [r2], -pc, asr #6 │ │ svclt 0x003845a3 │ │ ldmdals r6, {r1, r3, r4, r6, r9, sl, lr} │ │ - @ instruction: 0xf0aa4639 │ │ - ldrbmi lr, [ip, #-3976] @ 0xfffff078 │ │ + @ instruction: 0xf0ae4639 │ │ + ldrbmi lr, [ip, #-3448] @ 0xfffff288 │ │ tstpeq r0, pc, asr #32 @ p-variant is OBSOLETE │ │ tstcs r1, r8, lsr pc │ │ @ instruction: 0xf04f2800 │ │ svclt 0x00480000 │ │ svclt 0x00082001 │ │ stmdacs r0, {r3, r9, sl, lr} │ │ ldmdage r6!, {r0, r1, r2, r4, r6, r7, r8, ip, lr, pc}^ │ │ ldrtmi sl, [r2], -r2, ror #18 │ │ - @ instruction: 0xf02b462b │ │ - @ instruction: 0xf89dfb07 │ │ + @ instruction: 0xf02f462b │ │ + @ instruction: 0xf89df9f7 │ │ @ instruction: 0x2011b1dc │ │ @ instruction: 0xf2c89f76 │ │ addmi r0, r7, #0 │ │ - b 1821db0 │ │ + b 181e1e0 │ │ @ instruction: 0xf04f70cb │ │ bicle r0, r4, r0, lsl #22 │ │ @ instruction: 0xf04fe02f │ │ eor r0, ip, r1, lsl #22 │ │ - bls 1e53dc8 │ │ + bls 1e501f8 │ │ stmvc r8, {r3, r4, r9, ip, pc} │ │ - bls 1e8f9d0 │ │ + bls 1e8be00 │ │ andmi lr, r0, r1, asr #20 │ │ andsls r9, r7, r5, lsl r2 │ │ @ instruction: 0xf1b9e024 │ │ @ instruction: 0xf0400f00 │ │ @ instruction: 0xe1c18098 │ │ - bleq 69b00 │ │ + bleq 65f30 │ │ ldmdage r0!, {r2, r3, r4, r5, r9, sl, lr}^ │ │ - blx ffa69a34 │ │ + blx 1565e74 │ │ stmdacs r0, {r4, r5, r6, fp, ip, pc} │ │ ldmdals r1!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ - ldmda r8, {r0, r1, r2, r3, r5, r6, ip, sp, lr, pc} │ │ + mcr 0, 0, pc, cr6, cr2, {3} @ │ │ mrcls 13, 0, r9, cr8, cr5, {0} │ │ - @ instruction: 0xf01aa86a │ │ - stmdals sl!, {r0, r2, r3, r4, r6, r7, r9, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf01ea86a │ │ + stmdals sl!, {r0, r3, r6, r9, fp, ip, sp, lr, pc}^ │ │ svclt 0x001c2800 │ │ - @ instruction: 0xf06f986b │ │ - ldrls lr, [r8], -lr, lsl #16 │ │ + @ instruction: 0xf072986b │ │ + @ instruction: 0x9618edfc │ │ ldrls sl, [r5, #-3620] @ 0xfffff1dc │ │ @ instruction: 0xf04fe24f │ │ ldrcs r0, [r1, -r0, lsl #22] │ │ streq pc, [r0, -r8, asr #5] │ │ ldmdage r0!, {r2, r5, r9, sl, fp, sp, pc}^ │ │ - blx ff2e9a70 │ │ + blx de5eb0 │ │ stmdacs r0, {r4, r5, r6, fp, ip, pc} │ │ ldmdals r1!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ - svc 0x00faf06e │ │ + stcl 0, cr15, [r8, #456]! @ 0x1c8 │ │ ldrsbls pc, [r4], #-141 @ 0xffffff73 @ │ │ ldcls 6, cr4, [r8, #-240] @ 0xffffff10 │ │ vqshl.s8 d18, d1, #0 │ │ stmdage sl!, {r8, r9, sl}^ │ │ - blx feee9a90 │ │ + blx 9e5ed0 │ │ stmdacs r0, {r1, r3, r5, r6, fp, ip, pc} │ │ stmdals fp!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ - svc 0x00eaf06e │ │ + ldcl 0, cr15, [r8, #456] @ 0x1c8 │ │ subsls pc, r4, sp, asr #17 │ │ stmibvc ip!, {r0, r2, r3, r8, sl, ip, sp, lr, pc}^ │ │ eor r9, sl, #24, 10 @ 0x6000000 │ │ ldrsbtne pc, [r8], -r8 @ │ │ stmdble r0, {r3, r7, r9, lr}^ │ │ @ instruction: 0xf8dd980c │ │ stcls 0, cr11, [r8], {16} │ │ umulleq lr, ip, r0, r8 │ │ ldrdeq lr, [r9, -r8] │ │ addeq lr, ip, r4, lsl #17 │ │ @ instruction: 0xf8cd9a05 │ │ rsbsls fp, r1, #192, 2 @ 0x30 │ │ - bl 9a12c │ │ + bl 9655c │ │ cps #1 │ │ andcs r0, r0, ip, lsl r6 │ │ tstcs r0, sp, lsl #2 │ │ ldmdbvc r2!, {r0, r1, r4, r5, r8, r9, fp, ip, sp, lr} │ │ - blvc c6bbd4 │ │ + blvc c68004 │ │ smlabteq r0, sp, r9, lr │ │ ldrtmi r4, [r9], -r0, lsr #12 │ │ - @ instruction: 0xf880f024 │ │ + @ instruction: 0xff70f027 │ │ mvnsle r3, r0, lsr sp │ │ ldrls lr, [r8, #-4] │ │ adcs r9, pc, #352321536 @ 0x15000000 │ │ mrscs r2, (UNDEF: 0) │ │ strbmi r4, [r0], -r2, lsl #12 │ │ - @ instruction: 0xf02a460b │ │ - cmnplt r8, r7, asr #29 @ p-variant is OBSOLETE │ │ + @ instruction: 0xf02e460b │ │ + ldrhlt pc, [r8, #-215]! @ 0xffffff29 @ │ │ svcls 0x0007980c │ │ bicslt pc, r8, sp, asr #17 │ │ muleq lr, r0, r8 │ │ ldrdeq pc, [ip], -r8 @ │ │ andeq lr, lr, r7, lsl #17 │ │ - blls 17f424 │ │ + blls 17b854 │ │ smlsdxls r0, r7, r3, r9 │ │ - @ instruction: 0xff1ef02a │ │ + cdp2 0, 0, cr15, cr14, cr14, {1} │ │ vqshl.s8 d18, d1, #0 │ │ ldrtmi r0, [r8], r0, lsl #14 │ │ svceq 0x0000f1b9 │ │ msrhi CPSR_fsc, r0 │ │ @ instruction: 0xf1ba9f06 │ │ tstle r8, r0, lsl #30 │ │ stmibvc ip!, {r0, r2, r3, r8, sl, ip, sp, lr, pc}^ │ │ adds r4, fp, r7, asr #12 │ │ vqshl.s8 d18, d1, #0 │ │ ldrtmi r0, [r8], r0, lsl #14 │ │ @ instruction: 0xf50d9f06 │ │ ldmdbls r6, {r2, r3, r5, r6, r7, r8, fp, ip, sp, lr} │ │ andcs r2, ip, #0 │ │ strbmi r9, [r8], -r1 │ │ - @ instruction: 0xf01c2300 │ │ - @ instruction: 0xf50df995 │ │ + @ instruction: 0xf0202300 │ │ + @ instruction: 0xf50df901 │ │ ldmib sp, {r2, r3, r5, r6, r7, r8, r9, fp, ip, sp, lr}^ │ │ ldm fp, {r0, r3, r4, r5, r6, r9, sl, lr} │ │ stmdacs r1, {r0, r5, fp} │ │ bicshi pc, r0, r0 │ │ @ instruction: 0xf0002d00 │ │ @ instruction: 0xf1bb81d0 │ │ @ instruction: 0xf0410f08 │ │ @ instruction: 0xf8d580e6 │ │ @ instruction: 0xf04fa000 │ │ stmdavs r8!, {r8, lr}^ │ │ stmdbeq r1, {r7, r9, fp, sp, lr, pc} │ │ @ instruction: 0x0007ebba │ │ - bl 1e93b6c │ │ - blle ff62db3c │ │ + bl 1e8ff9c │ │ + blle ff629f6c │ │ ldrbmi sl, [r2], -r4, asr #16 │ │ - @ instruction: 0xf02a464b │ │ - stmdacs r0, {r0, r2, r4, r5, r6, r9, sl, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xf02e464b │ │ + stmdacs r0, {r0, r2, r5, r6, r8, sl, fp, ip, sp, lr, pc} │ │ mcrcs 0, 0, sp, cr1, cr1, {6} │ │ addhi pc, pc, r1, asr #4 │ │ strbmi r8, [fp], -r0, lsr #16 │ │ ldmib sp, {r1, r2, r3, r5, r6, ip, pc}^ │ │ stmdals ip, {r0, r1, r2, r3, r4, r6, r9, ip} │ │ andeq lr, r0, #3358720 @ 0x334000 │ │ @ instruction: 0x4652a876 │ │ stmdbge sl!, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc}^ │ │ strbtmi lr, [ip], -sp, asr #19 │ │ - ldc2 0, cr15, [sl], #-104 @ 0xffffff98 │ │ + blx fe9e601a │ │ @ instruction: 0x46479d76 │ │ @ instruction: 0xb1dcf89d │ │ @ instruction: 0xf0404545 │ │ - b 180e154 │ │ + b 180a584 │ │ adcsle r7, r2, fp, asr #1 │ │ ldrdhi pc, [r4, sp] │ │ ldrdeq lr, [ip, -r8] │ │ @ instruction: 0xf8c83001 │ │ addmi r0, r8, #48 @ 0x30 │ │ eorhi pc, lr, #0, 4 │ │ ldrsbtne pc, [r8], -r8 @ │ │ stmible r4!, {r3, r7, r9, lr} │ │ cdpls 8, 0, cr9, cr8, cr12, {0} │ │ ldmdbge r0!, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc}^ │ │ umulleq lr, ip, r0, r8 │ │ ldrdeq lr, [r9, -r8] │ │ addeq lr, ip, r6, lsl #17 │ │ - bl 9a21c │ │ + bl 9664c │ │ cps #1 │ │ andcs r0, r0, ip, lsl r5 │ │ tstcs r0, ip, lsl #2 │ │ stmdbvc sl!, {r0, r1, r3, r5, r8, r9, fp, ip, sp, lr} │ │ - blvc c6bd20 │ │ + blvc c68150 │ │ smlabteq r0, sp, r9, lr │ │ @ instruction: 0x46394630 │ │ - @ instruction: 0xffd8f023 │ │ + cdp2 0, 12, cr15, cr8, cr7, {1} │ │ mvnsle r3, r0, lsr ip │ │ andcs lr, r0, r1 │ │ strmi r2, [r2], -r0, lsl #2 │ │ strmi r4, [fp], -r0, asr #12 │ │ - cdp2 0, 2, cr15, cr2, cr10, {1} │ │ + ldc2 0, cr15, [r2, #-184] @ 0xffffff48 │ │ @ instruction: 0xf43f2800 │ │ stmdals ip, {r0, r3, r4, r5, r6, r8, r9, sl, fp, sp, pc} │ │ stmib sp, {r0, r1, r2, r8, r9, sl, fp, ip, pc}^ │ │ ldm r0, {r1, r2, r4, r5, r6, r8, fp, sp, pc} │ │ @ instruction: 0xf8d8000e │ │ stm r7, {r2, r3, r5} │ │ ldrbmi r0, [r2], -lr │ │ strls r4, [r0, -fp, asr #12] │ │ - cdp2 0, 7, cr15, cr8, cr10, {1} │ │ + stc2l 0, cr15, [r8, #-184]! @ 0xffffff48 │ │ ldrcs lr, [r1, -r8, ror #14] │ │ streq pc, [r0, -r8, asr #5] │ │ stmibvc ip!, {r0, r2, r3, r8, sl, ip, sp, lr, pc}^ │ │ andcs r9, r0, r6, lsl r9 │ │ strbmi r9, [r8], -r1 │ │ movwcs r2, #524 @ 0x20c │ │ - @ instruction: 0xf900f01c │ │ - blvc ffb6b064 │ │ + @ instruction: 0xf86cf020 │ │ + blvc ffb67494 │ │ @ instruction: 0x0679e9dd │ │ stmdaeq r2!, {r0, r1, r3, r4, r7, fp, sp, lr, pc} │ │ @ instruction: 0xf0402900 │ │ stccs 1, cr8, [r0, #-848] @ 0xfffffcb0 │ │ bichi pc, ip, r0 │ │ @ instruction: 0xf1bb9b06 │ │ @ instruction: 0xf0410f08 │ │ @ instruction: 0xf8d58050 │ │ @ instruction: 0xf04fa000 │ │ stmdavs r9!, {r9, lr}^ │ │ stmdaeq r2, {r0, r7, r9, fp, sp, lr, pc} │ │ @ instruction: 0x0103ebba │ │ - bl 1e54098 │ │ - blle ff66e06c │ │ + bl 1e504c8 │ │ + blle ff66a49c │ │ @ instruction: 0xf0c12e02 │ │ ldmib sp, {pc}^ │ │ stmdahi r2, {r0, r1, r2, r3, r4, r6, r8, r9, ip} │ │ strbteq lr, [ip], -sp, asr #19 │ │ stmib sp, {r2, r3, fp, ip, pc}^ │ │ strbmi r0, [r8], -r0, lsl #6 │ │ ldrbmi r9, [r2], -lr, ror #4 │ │ stmib sp, {r0, r1, r6, r9, sl, lr}^ │ │ - @ instruction: 0xf01aa86a │ │ - fldmdbxls r6!, {d31-d115} @ Deprecated │ │ + @ instruction: 0xf01ea86a │ │ + fldmdbxls r6!, {d31-d41} @ Deprecated │ │ @ instruction: 0xb1dcf89d │ │ @ instruction: 0xf04042bd │ │ - b 180e360 │ │ + b 180a790 │ │ adcsle r7, fp, fp, asr #1 │ │ ldrdls pc, [r4, sp] │ │ ldrdeq lr, [ip, -r9] │ │ @ instruction: 0xf8c93001 │ │ addmi r0, r8, #48 @ 0x30 │ │ lslhi pc, r0, #4 @ │ │ ldrsbtne pc, [r8], -r9 @ │ │ stmible sp!, {r3, r7, r9, lr} │ │ stcls 8, cr9, [r8], {12} │ │ ldmdage r0!, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc}^ │ │ umulleq lr, ip, r0, r8 │ │ ldrdeq lr, [r9, -r9] │ │ addeq lr, ip, r4, lsl #17 │ │ - bl 9a338 │ │ + bl 96768 │ │ cps #1 │ │ andcs r0, r0, ip, lsl r6 │ │ tstcs r0, sp, lsl #2 │ │ ldmdbvc r2!, {r0, r1, r4, r5, r8, r9, fp, ip, sp, lr} │ │ - blvc c6be40 │ │ + blvc c68270 │ │ smlabteq r0, sp, r9, lr │ │ ldrtmi r4, [r9], -r0, lsr #12 │ │ - @ instruction: 0xff4af023 │ │ + cdp2 0, 3, cr15, cr10, cr7, {1} │ │ mvnsle r3, r0, lsr sp │ │ andcs lr, r0, r1 │ │ strmi r2, [r2], -r0, lsl #2 │ │ strmi r4, [fp], -r8, asr #12 │ │ - ldc2 0, cr15, [r4, #168] @ 0xa8 │ │ + stc2 0, cr15, [r4], {46} @ 0x2e │ │ @ instruction: 0xf43f2800 │ │ stmdals ip, {r1, r7, r8, r9, sl, fp, sp, pc} │ │ stmib sp, {r0, r1, r2, r8, r9, sl, fp, ip, pc}^ │ │ ldm r0, {r1, r2, r4, r5, r6, fp, sp, pc} │ │ @ instruction: 0xf8d9000e │ │ stm r7, {r2, r3, r5} │ │ ldrbmi r0, [r2], -lr │ │ strls r4, [r0, -r3, asr #12] │ │ - stc2l 0, cr15, [sl, #168]! @ 0xa8 │ │ + ldc2l 0, cr15, [sl], {46} @ 0x2e │ │ @ instruction: 0xf1bae771 │ │ tstle r7, r0, lsl #30 │ │ stmibvc ip!, {r0, r2, r3, r8, sl, ip, sp, lr, pc}^ │ │ sbc r4, r9, r7, asr #12 │ │ vqshl.s8 d18, d1, #0 │ │ ldrtmi r0, [r8], r0, lsl #14 │ │ stmibvc ip!, {r0, r2, r3, r8, sl, ip, sp, lr, pc}^ │ │ andcs r9, r0, r6, lsl r9 │ │ andls r2, r1, r8, lsl #4 │ │ movwcs r4, #1608 @ 0x648 │ │ - @ instruction: 0xf86af01c │ │ - blvc ffb6b190 │ │ + @ instruction: 0xffd6f01f │ │ + blvc ffb675c0 │ │ @ instruction: 0x4679e9dd │ │ stmdaeq r1!, {r0, r1, r3, r4, r7, fp, sp, lr, pc} │ │ @ instruction: 0xf0402800 │ │ stccs 0, cr8, [r0, #-660] @ 0xfffffd6c │ │ teqphi r5, r0 @ p-variant is OBSOLETE │ │ svceq 0x0008f1bb │ │ ldrhi pc, [fp, r0, asr #32]! │ │ @ instruction: 0xf04f6868 │ │ @ instruction: 0xf8d54100 │ │ - b fe055d84 │ │ + b fe0521b4 │ │ stmdals fp, {r0, r8, fp} │ │ @ instruction: 0x000aebb0 │ │ - bl 1c53db8 │ │ - blle ff5eddb8 │ │ + bl 1c501e8 │ │ + blle ff5ea1e8 │ │ ldrbmi sl, [r2], -r4, asr #16 │ │ - @ instruction: 0xf02a464b │ │ - stmdacs r0, {r0, r3, r6, r8, sl, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xf02e464b │ │ + stmdacs r0, {r0, r3, r4, r5, sl, fp, ip, sp, lr, pc} │ │ mcrcs 0, 0, sp, cr2, cr0, {6} │ │ strbhi pc, [r3, -r0, asr #1]! @ │ │ strbmi r8, [fp], -r0, lsr #16 │ │ ldmib sp, {r1, r2, r3, r5, r6, ip, pc}^ │ │ stmdals ip, {r0, r1, r2, r3, r4, r6, r9, ip} │ │ andeq lr, r0, #3358720 @ 0x334000 │ │ @ instruction: 0x4652a876 │ │ stmdbge sl!, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc}^ │ │ strbtmi lr, [ip], -sp, asr #19 │ │ - blx 3e9e32 │ │ + blx 1ee6270 │ │ @ instruction: 0x46479d76 │ │ @ instruction: 0xb1dcf89d │ │ cmple r9, r5, asr #10 │ │ sbcvc lr, fp, pc, asr sl │ │ @ instruction: 0xf8ddd0b3 │ │ ldmib r8, {r2, r7, r8, pc}^ │ │ andcc r0, r1, ip, lsl #2 │ │ @@ -12373,88 +8545,88 @@ │ │ ldm r0, {r4, r5, r6, r8, fp, sp, pc} │ │ ldmib r8, {r2, r3, r7}^ │ │ stm r6, {r0, r3, r8} │ │ orrslt r0, r9, ip, lsl #1 │ │ cmpeq r1, r1, lsl #22 │ │ ldreq pc, [ip, #-256] @ 0xffffff00 │ │ mrseq r2, (UNDEF: 12) │ │ - blvc af621c │ │ + blvc af264c │ │ @ instruction: 0xf855792a │ │ stmib sp, {r4, r5, r8, r9, fp, ip, sp, lr}^ │ │ ldrtmi r0, [r0], -r0, lsl #2 │ │ - @ instruction: 0xf0234639 │ │ - ldccc 14, cr15, [r0], #-692 @ 0xfffffd4c │ │ + @ instruction: 0xf0274639 │ │ + ldccc 13, cr15, [r0], #-628 @ 0xfffffd8c │ │ strd sp, [r1], -r3 │ │ mrscs r2, (UNDEF: 0) │ │ strbmi r4, [r0], -r2, lsl #12 │ │ - @ instruction: 0xf02a460b │ │ - stmdacs r0, {r0, r1, r2, r4, r5, r6, r7, sl, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xf02e460b │ │ + stmdacs r0, {r0, r1, r2, r5, r6, r7, r8, r9, fp, ip, sp, lr, pc} │ │ svcge 0x007af43f │ │ svcls 0x0007980c │ │ ldmdbge r6!, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc}^ │ │ muleq lr, r0, r8 │ │ ldrdeq pc, [ip], -r8 @ │ │ andeq lr, lr, r7, lsl #17 │ │ @ instruction: 0x464b4652 │ │ - @ instruction: 0xf02a9700 │ │ - strb pc, [r9, -sp, asr #26]! @ │ │ - bls 1e54290 │ │ + @ instruction: 0xf02e9700 │ │ + @ instruction: 0xe769fc3d │ │ + bls 1e506c0 │ │ stmvc r8, {r3, r4, r9, ip, pc} │ │ - bls 1e8fe98 │ │ + bls 1e8c2c8 │ │ andmi lr, r0, r1, asr #20 │ │ andsls r9, r7, r5, lsl r2 │ │ @ instruction: 0xf50dae24 │ │ stmdage r2!, {r2, r3, r5, r6, r7, r8, fp, ip, sp, lr}^ │ │ - @ instruction: 0xf88af01a │ │ + @ instruction: 0xfff6f01d │ │ stmdacs r0, {r1, r5, r6, fp, ip, pc} │ │ stmdals r3!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ - ldc 0, cr15, [sl, #440]! @ 0x1b8 │ │ + bl fea6648c │ │ @ instruction: 0xf8dd462c │ │ ldcls 0, cr8, [r3, #-400] @ 0xfffffe70 │ │ @ instruction: 0xf04042bc │ │ - b 180e1cc │ │ + b 180a5fc │ │ @ instruction: 0xf10570cb │ │ @ instruction: 0xf10d0558 │ │ @ instruction: 0xf47f0bd0 │ │ ldrd sl, [r2], #163 @ 0xa3 │ │ ldrls r4, [r8], #-1607 @ 0xfffff9b9 │ │ @ instruction: 0xf04fe096 │ │ strbmi r0, [r7], -r1, lsl #22 │ │ cdpge 6, 2, cr4, cr4, cr5, {2} │ │ @ instruction: 0x2711e7dd │ │ streq pc, [r0, -r8, asr #5] │ │ stmibvc ip!, {r0, r2, r3, r8, sl, ip, sp, lr, pc}^ │ │ andcs r9, r0, r6, lsl r9 │ │ strbmi r9, [r8], -r1 │ │ movwcs r2, #520 @ 0x208 │ │ - @ instruction: 0xffa6f01b │ │ - blvc ffb6b318 │ │ + @ instruction: 0xff12f01f │ │ + blvc ffb67748 │ │ @ instruction: 0x0679e9dd │ │ stmdaeq r2!, {r0, r1, r3, r4, r7, fp, sp, lr, pc} │ │ cmnle sl, r0, lsl #18 │ │ rsbsle r2, r3, r0, lsl #26 │ │ svceq 0x0008f1bb │ │ ldrbthi pc, [r9], r0, asr #32 @ │ │ @ instruction: 0xf04f6869 │ │ @ instruction: 0xf8d54200 │ │ - b fe095f08 │ │ + b fe092338 │ │ stmdbls fp, {r1, fp} │ │ @ instruction: 0x010aebb1 │ │ - bl 1c9433c │ │ - blle ff6ee338 │ │ + bl 1c9076c │ │ + blle ff6ea768 │ │ @ instruction: 0xf0c02e02 │ │ ldmib sp, {r3, r5, r7, r9, sl, pc}^ │ │ stmdahi r2, {r0, r1, r2, r3, r4, r6, r8, r9, ip} │ │ strbteq lr, [ip], -sp, asr #19 │ │ stmib sp, {r2, r3, fp, ip, pc}^ │ │ strbmi r0, [r8], -r0, lsl #6 │ │ ldrbmi r9, [r2], -lr, ror #4 │ │ stmib sp, {r0, r1, r6, r9, sl, lr}^ │ │ - @ instruction: 0xf01aa86a │ │ - vldmdbls r6!, {s31-s113} │ │ + @ instruction: 0xf01ea86a │ │ + @ instruction: 0x9d76f9bf │ │ @ instruction: 0xb1dcf89d │ │ ldrhle r4, [r9, #-45] @ 0xffffffd3 │ │ sbcvc lr, fp, pc, asr sl │ │ @ instruction: 0xf8ddd0be │ │ ldmib r9, {r2, r7, r8, ip, pc}^ │ │ andcc r0, r1, ip, lsl #2 │ │ eorseq pc, r0, r9, asr #17 │ │ @@ -12462,218 +8634,218 @@ │ │ ldrsbtne pc, [r8], -r9 @ │ │ ldmible r1!, {r3, r7, r9, lr} │ │ stcls 8, cr9, [r8], {12} │ │ ldmdage r0!, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc}^ │ │ umulleq lr, ip, r0, r8 │ │ ldrdeq lr, [r9, -r9] │ │ addeq lr, ip, r4, lsl #17 │ │ - bl 9a5e4 │ │ + bl 96a14 │ │ cps #1 │ │ andcs r0, r0, ip, lsl r6 │ │ tstcs r0, sp, lsl #2 │ │ ldmdbvc r2!, {r0, r1, r4, r5, r8, r9, fp, ip, sp, lr} │ │ - blvc c6c0ec │ │ + blvc c6851c │ │ smlabteq r0, sp, r9, lr │ │ ldrtmi r4, [r9], -r0, lsr #12 │ │ - ldc2l 0, cr15, [r4, #140]! @ 0x8c │ │ + stc2l 0, cr15, [r4], #156 @ 0x9c │ │ mvnsle r3, r0, lsr sp │ │ andcs lr, r0, r1 │ │ strmi r2, [r2], -r0, lsl #2 │ │ strmi r4, [fp], -r8, asr #12 │ │ - ldc2 0, cr15, [lr], #-168 @ 0xffffff58 │ │ + blx be649e │ │ @ instruction: 0xf43f2800 │ │ stmdals ip, {r1, r2, r7, r8, r9, sl, fp, sp, pc} │ │ stmib sp, {r0, r1, r2, r8, r9, sl, fp, ip, pc}^ │ │ ldm r0, {r1, r2, r4, r5, r6, fp, sp, pc} │ │ @ instruction: 0xf8d9000e │ │ stm r7, {r2, r3, r5} │ │ ldrbmi r0, [r2], -lr │ │ strls r4, [r0, -r3, asr #12] │ │ - ldc2 0, cr15, [r4], {42} @ 0x2a │ │ + blx fe1664c2 │ │ @ instruction: 0x4647e775 │ │ - bleq aa11c │ │ + bleq a654c │ │ mcrge 6, 1, r4, cr4, cr13, {1} │ │ andsls lr, r8, sp, asr #14 │ │ - b 1413840 │ │ + b 140fc70 │ │ andsls r2, r7, fp, lsl r0 │ │ strb sl, [r6, -r4, lsr #28] │ │ - bleq 6a134 │ │ + bleq 66564 │ │ @ instruction: 0xe73f463d │ │ - bls 1e54424 │ │ + bls 1e50854 │ │ stmvc r8, {r3, r4, r9, ip, pc} │ │ - bls 1e9002c │ │ - b 1092860 │ │ + bls 1e8c45c │ │ + b 108ec90 │ │ strb r4, [lr, r0]! │ │ ldrls r9, [r5, #-1560] @ 0xfffff9e8 │ │ andscs lr, fp, pc, asr #20 │ │ andsls sl, r7, r4, lsr #28 │ │ stmdage ip, {r0, r4, r5, r6, r7, sl, sp, lr, pc}^ │ │ - @ instruction: 0xffd6f014 │ │ + @ instruction: 0xff42f018 │ │ @ instruction: 0xf1b49c46 │ │ @ instruction: 0xf0404f00 │ │ ldrtmi r8, [r9], r9, asr #11 │ │ ldrsbtge pc, [r8], -sp @ │ │ ssatmi lr, #2, lr │ │ ldrtmi lr, [r9], r0 │ │ - @ instruction: 0xf014a84c │ │ - mcrrls 15, 12, pc, r6, cr7 @ │ │ + @ instruction: 0xf018a84c │ │ + mcrrls 15, 3, pc, r6, cr3 @ │ │ ldrsbtge pc, [r8], -sp @ │ │ svcmi 0x0000f1b4 │ │ ldmib sp, {r1, r4, ip, lr, pc}^ │ │ cmplt sp, r7, asr #10 │ │ streq pc, [r4], -r8, lsl #2 │ │ stceq 8, cr15, [r4], {86} @ 0x56 │ │ svclt 0x001c2800 │ │ - @ instruction: 0xf0aa6830 │ │ - @ instruction: 0x360cebb0 │ │ + @ instruction: 0xf0ae6830 │ │ + strcc lr, [ip], -r0, lsr #19 │ │ mvnsle r3, r1, lsl #26 │ │ @ instruction: 0x4640b114 │ │ - bl fea6a31c │ │ + ldmib r8, {r1, r2, r3, r5, r7, ip, sp, lr, pc} │ │ ldrmi lr, [sp, #-2525]! @ 0xfffff623 │ │ @ instruction: 0xf104b155 │ │ ldmdavs r0!, {r4, r9, sl} │ │ svclt 0x001c2800 │ │ - @ instruction: 0xf0aa6870 │ │ - @ instruction: 0x3630eb9e │ │ + @ instruction: 0xf0ae6870 │ │ + ldrtcc lr, [r0], -lr, lsl #19 │ │ mvnsle r3, r1, lsl #26 │ │ stmdacs r0, {r2, r3, r4, r5, fp, ip, pc} │ │ qadd16mi fp, r0, ip │ │ - bl fe56a344 │ │ + stmib r4, {r1, r2, r3, r5, r7, ip, sp, lr, pc} │ │ ldrmi lr, [r7, #-2525]! @ 0xfffff623 │ │ stcne 1, cr11, [r6, #-340]! @ 0xfffffeac │ │ stceq 8, cr15, [r4], {86} @ 0x56 │ │ svclt 0x001c2800 │ │ - @ instruction: 0xf0aa6830 │ │ - strcc lr, [ip], -sl, lsl #23 │ │ + @ instruction: 0xf0ae6830 │ │ + @ instruction: 0x360ce97a │ │ mvnsle r3, r1, lsl #26 │ │ stmdacs r0, {r1, r2, r4, r5, fp, ip, pc} │ │ qadd16mi fp, r0, ip │ │ - bl fe06a36c │ │ + ldmdb r0!, {r1, r2, r3, r5, r7, ip, sp, lr, pc}^ │ │ ldrmi sl, [r9, #3620]! @ 0xe24 │ │ subsls pc, r8, sp, asr #17 │ │ ldrls sp, [r6, -r0, lsl #2] │ │ ldrdeq pc, [r0], #-138 @ 0xffffff76 │ │ @ instruction: 0xf0402800 │ │ @ instruction: 0xf04f85b8 │ │ @ instruction: 0x46b430ff │ │ subeq pc, r0, sl, asr #17 │ │ ldm ip!, {r2, r3, r6, r8, fp, sp, pc} │ │ strmi r0, [r8], -ip, ror #1 │ │ ldm ip!, {r2, r3, r5, r6, r7, lr, pc} │ │ rscgt r0, ip, ip, ror #1 │ │ smlalseq lr, ip, ip, r8 │ │ ldmdage r4!, {r2, r3, r4, r5, r6, r7, lr, pc} │ │ - blx ff76a174 │ │ + blx 12665b4 │ │ ldmib sl, {r2, r4, r5, r9, fp, sp, pc}^ │ │ @ instruction: 0xf8da5711 │ │ - bgt 20623c │ │ + bgt 20266c │ │ svcmi 0x0000f1b5 │ │ movwgt r9, #31503 @ 0x7b0f │ │ teqlt r6, ip │ │ @ instruction: 0xf854463c │ │ - @ instruction: 0xf06e0b04 │ │ - mcrcc 12, 0, lr, cr1, cr4, {3} │ │ + @ instruction: 0xf0720b04 │ │ + vmlscc.f32 s28, s2, s5 │ │ stccs 1, cr13, [r0, #-996] @ 0xfffffc1c │ │ shadd16mi fp, r8, ip │ │ - bl 12ea3d8 │ │ + ldmdb sl!, {r1, r2, r3, r5, r7, ip, sp, lr, pc} │ │ ldrdeq pc, [r0], #-138 @ 0xffffff76 │ │ andcc r9, r1, r6, lsl r9 │ │ subeq pc, r0, sl, asr #17 │ │ vshr.s8 d18, d1, #8 │ │ addmi r0, r1, #0 │ │ @ instruction: 0xf47e9917 │ │ mrcls 15, 0, sl, cr15, cr2, {0} │ │ subspl pc, r5, r5, asr #4 │ │ subspl pc, r5, r0, asr #5 │ │ stmdble r1, {r1, r2, r7, r9, lr} │ │ - @ instruction: 0xff72f00f │ │ + mrc2 0, 6, pc, cr14, cr3, {0} │ │ strbeq lr, [r6, -r6, lsl #22] │ │ ldrsbtls pc, [r8], #-141 @ 0xffffff73 @ │ │ rscseq r2, ip, r0, lsl #10 │ │ strtmi sp, [r0], -r9 │ │ - bl 10ea418 │ │ - blvc fe66b5a8 │ │ + ldmdb sl!, {r1, r2, r3, r5, r7, ip, sp, lr, pc} │ │ + blvc fe6679d8 │ │ @ instruction: 0xf0002800 │ │ ldrtmi r8, [r1], -sp, asr #11 │ │ andcs lr, r8, r3 │ │ @ instruction: 0xf50d2100 │ │ ldrls r7, [r6, #-2968]! @ 0xfffff468 │ │ stmib sp, {r0, r1, r2, r4, ip, pc}^ │ │ cmnlt r6, #52 @ 0x34 │ │ - beq fe228ad0 │ │ + beq fe224f00 │ │ andcs r2, r0, r0, lsl #14 │ │ ands r9, r0, r8, lsl r0 │ │ @ instruction: 0x46599017 │ │ mcrreq 11, 0, lr, r7, cr0 │ │ @ instruction: 0x007de891 │ │ ldrmi r3, [sl, #1804]! @ 0x70c │ │ stmdaeq r1, {r3, r8, ip, sp, lr, pc} │ │ rsbseq lr, sp, ip, lsl #17 │ │ rsbhi pc, r0, sp, asr #17 │ │ sbcshi pc, r8, sp, asr #17 │ │ - bl 2a2210 │ │ + bl 29e640 │ │ ldrbmi r0, [r8], -r7, lsl #2 │ │ - mrrc2 0, 2, pc, lr, cr9 @ │ │ + blx 13e66ae │ │ teqpeq r0, sp @ @ p-variant is OBSOLETE │ │ @ instruction: 0xf0002806 │ │ ldmdals r4!, {r1, r3, r5, r6, r8, sl, pc} │ │ ldrdhi pc, [r0], #-141 @ 0xffffff73 @ │ │ ldmdals r7, {r7, r8, sl, lr} │ │ ldmdage r4!, {r1, r2, r3, r4, r6, r7, r8, ip, lr, pc} │ │ - @ instruction: 0xff8ef047 │ │ + stc2 0, cr15, [sl, #300]! @ 0x12c │ │ @ instruction: 0xe7d99835 │ │ andsls r9, r6, r4, lsr r8 │ │ andcs lr, r0, r2 │ │ andsls r9, r8, r6, lsl r1 │ │ andsls r2, r0, r4 │ │ andsls r2, r3, r0 │ │ @ instruction: 0x711ee9dd │ │ tstls r9, r0, lsl #18 │ │ mcrge 4, 6, pc, cr2, cr14, {3} @ │ │ stmdacs r0, {r0, r2, r3, r4, fp, ip, pc} │ │ shadd16mi fp, r8, ip │ │ - b ff66a4bc │ │ + stmia r8, {r1, r2, r3, r5, r7, ip, sp, lr, pc}^ │ │ cmplt r8, r3, lsl r8 │ │ ldmdbls r6, {r2, r4, fp, ip, pc} │ │ ldmdbls r7, {r0, sp, lr} │ │ ldmdbls r8, {r0, r6, sp, lr} │ │ ldmdbls r5, {r0, r7, sp, lr} │ │ rsbslt r6, sp, r1, asr #1 │ │ svchi 0x00f0e8bd │ │ strcs r9, [r0], #2069 @ 0x815 │ │ ldmdals r8, {r4, r6, ip, pc} │ │ ldmdals r7, {r0, r1, r2, r3, r6, ip, pc} │ │ ldmdals r6, {r1, r2, r3, r6, ip, pc} │ │ ldmdals r0, {r0, r2, r3, r6, ip, pc} │ │ teqpeq r0, sp, lsl #17 @ p-variant is OBSOLETE │ │ - @ instruction: 0xf0aa2080 │ │ - stmdacs r0, {r2, r4, r6, r7, r9, fp, sp, lr, pc} │ │ + @ instruction: 0xf0ae2080 │ │ + stmdacs r0, {r2, r3, r6, r7, fp, sp, lr, pc} │ │ strbhi pc, [r9, #-0] @ │ │ stmib sp, {r8, sp}^ │ │ ldmdage r4!, {r2, r4, r5, lr} │ │ eorls r9, r4, r6, lsr r1 │ │ stmdbge r4!, {r2, r3, r6, fp, sp, pc} │ │ - stc2l 7, cr15, [r8, #976]! @ 0x3d0 │ │ + blx ffae867a │ │ ldrsbtne lr, [r4], -sp │ │ vshl.s8 d18, d1, #0 │ │ @ instruction: 0xf1b10500 │ │ @ instruction: 0xf0004f00 │ │ ldcls 5, cr8, [r6], #-324 @ 0xfffffebc │ │ stmdble fp, {r0, r5, r7, r9, lr} │ │ @ instruction: 0x4621b13c │ │ - b ffdea530 │ │ + stmia r6!, {r1, r2, r3, r5, r7, ip, sp, lr, pc}^ │ │ andcs fp, r1, r0, lsr r9 │ │ - @ instruction: 0xf00f4621 │ │ - @ instruction: 0xf0aafe8b │ │ - mulcs r1, r8, sl │ │ + @ instruction: 0xf0134621 │ │ + @ instruction: 0xf0aefdf7 │ │ + andcs lr, r1, r8, lsl #17 │ │ andvs r9, ip, r1, lsl r9 │ │ andvs r9, sp, r4, lsl r9 │ │ andvs r9, r8, r2, lsl r9 │ │ - @ instruction: 0xf003a84c │ │ - ldrshtlt pc, [sp], #-205 @ 0xffffff33 @ │ │ + @ instruction: 0xf007a84c │ │ + rsbslt pc, sp, fp, asr #22 │ │ svchi 0x00f0e8bd │ │ andmi pc, r0, pc, asr #32 │ │ eorsls sl, r6, r4, lsr #28 │ │ stcgt 0, cr14, [lr], {8} │ │ mcrge 8, 1, sl, cr4, cr4, {1} │ │ ldm r4, {r1, r2, r3, r7, lr, pc} │ │ strbmi r0, [r4], -lr, lsl #1 │ │ @@ -12704,180 +8876,180 @@ │ │ stmdage sl!, {r0, r1, r2, r4, sl, pc}^ │ │ ldrsbhi pc, [r8], #141 @ 0x8d @ │ │ @ instruction: 0x2010f8da │ │ stmib sp, {r2, r4, r5, r8, fp, sp, pc}^ │ │ ldmdals r9, {r5, r6, sp, lr} │ │ @ instruction: 0xf1b8905f │ │ svclt 0x00184000 │ │ - bcs 3fb68 │ │ + bcs 3bf98 │ │ tstpeq r1, pc, asr #32 @ p-variant is OBSOLETE │ │ @ instruction: 0xf082bf48 │ │ mvnlt r4, #0, 2 │ │ cmple r4, r1, lsl #18 │ │ ldrsbtcs pc, [r0], -sl @ │ │ rsbls r4, r9, r1, lsr r6 │ │ - @ instruction: 0xf01b4628 │ │ - @ instruction: 0xf50dfccf │ │ + @ instruction: 0xf01f4628 │ │ + @ instruction: 0xf50dfc3b │ │ ldmib sp, {r3, r7, r8, r9, fp, ip, sp, lr}^ │ │ ldm fp, {r0, r1, r2, r6, r9} │ │ stmdbcs r2, {r1, r9, fp} │ │ @ instruction: 0xf50dd0c4 │ │ - blls 128d714 │ │ + blls 1289b44 │ │ andeq lr, sp, ip, lsl #17 │ │ stm r0, {r4, r5, r6, fp, sp, pc} │ │ ldrtmi r0, [r1], -r2, lsl #20 │ │ andseq lr, r2, #3571712 @ 0x368000 │ │ ldmdage pc, {r4, ip, pc}^ @ │ │ @ instruction: 0xf89a9064 │ │ andls r0, sl, r0, asr r0 │ │ andls sl, sp, #112, 16 @ 0x700000 │ │ @ instruction: 0xf89a9063 │ │ @ instruction: 0xf8da0051 │ │ andls r2, ip, r0 │ │ rsbls sl, r2, r9, ror #16 │ │ ldmib sl, {r3, r5, r9, sl, lr}^ │ │ - @ instruction: 0xf01b760f │ │ - @ instruction: 0xf50dfca7 │ │ + @ instruction: 0xf01f760f │ │ + @ instruction: 0xf50dfc13 │ │ ldmib sp, {r3, r7, r8, r9, fp, ip, sp, lr}^ │ │ ldm fp, {r0, r1, r2, r6, fp, lr} │ │ stmdacs r2, {r0, r9, fp} │ │ - b 14229a4 │ │ + b 141edd4 │ │ mcrge 0, 1, r2, cr4, cr11, {0} │ │ add r9, r7, #23 │ │ @ instruction: 0x2018f8da │ │ ldrtmi r4, [r1], -r8, lsr #12 │ │ - ldc2 0, cr15, [r4], {27} │ │ - blvc fe26b814 │ │ + stc2 0, cr15, [r0], {31} │ │ + blvc fe267c44 │ │ subne lr, r7, #3620864 @ 0x374000 │ │ - beq a8654 │ │ + beq a4a84 │ │ @ instruction: 0xd12a2802 │ │ andscs lr, fp, pc, asr #20 │ │ stmib sp, {r0, r2, r4, r9, ip, pc}^ │ │ andscs r0, r1, r7, lsl r1 │ │ andeq pc, r0, r8, asr #5 │ │ addle r4, sl, r1, lsl #11 │ │ strhtls lr, [r9], #-57 @ 0xffffffc7 │ │ @ instruction: 0xf8daa85f │ │ @ instruction: 0x46312038 │ │ stmdage r9!, {r0, r1, r5, r6, ip, pc}^ │ │ strtmi r9, [r8], -r2, rrx │ │ stmdals r6, {r1, r3, r4, r6, r7, r8, fp, sp, lr, pc} │ │ - ldc2l 0, cr15, [r4], #-108 @ 0xffffff94 │ │ + blx ff8668ca │ │ stmdacs r2, {r2, r6, fp, ip, pc} │ │ stmdals r7, {r0, r1, r3, r5, r8, ip, lr, pc}^ │ │ stmdals r8, {r3, r4, ip, pc}^ │ │ - blls 11a8ba0 │ │ - b 1412484 │ │ + blls 11a4fd0 │ │ + b 140e8b4 │ │ andsls r2, r7, fp, lsl r0 │ │ vshr.s8 d18, d1, #8 │ │ strmi r0, [r1] │ │ svcge 0x006bf43f │ │ @ instruction: 0xf50de399 │ │ - blls 128d7e0 │ │ + blls 1289c10 │ │ andeq lr, lr, ip, lsl #17 │ │ stm r1, {r4, r5, r6, r8, fp, sp, pc} │ │ strbeq r0, [r0, r1, lsl #20] │ │ subsls pc, r8, sp, asr #17 │ │ mvnshi pc, #0 │ │ movwcs lr, #35290 @ 0x89da │ │ strne lr, [sl, #-2522] @ 0xfffff626 │ │ - bl 1d74e88 │ │ + bl 1d712b8 │ │ vaddl.s8 q0, d0, d3 │ │ @ instruction: 0xf04f808b │ │ ldrcs r0, [r1], -r1, lsl #22 │ │ streq pc, [r0], -r8, asr #5 │ │ ldmib sp, {r0, r1, r2, r3, r6, r8, r9, sp, lr, pc}^ │ │ ldrtmi r4, [r1], -r5, asr #4 │ │ rsbsmi lr, r1, #3358720 @ 0x334000 │ │ ldrdcs pc, [r0], -sl @ │ │ @ instruction: 0x3747e9dd │ │ rsbsls r9, r0, r9, asr #28 │ │ stmib sp, {r3, r5, r9, sl, lr}^ │ │ @ instruction: 0x96753773 │ │ - ldc2 0, cr15, [r4], #-108 @ 0xffffff94 │ │ - blvc fe26b8d4 │ │ + blx fe86694a │ │ + blvc fe267d04 │ │ strbvs lr, [r7], #-2525 @ 0xfffff623 │ │ stmdaeq r5, {r0, r1, r3, r4, r7, fp, sp, lr, pc} │ │ teqle r2, r2, lsl #16 │ │ andscs lr, fp, pc, asr #20 │ │ mulsls r7, r1, r6 │ │ stmdbls r9, {r2, r3, r5, r7, r8, sp, lr, pc}^ │ │ ldmdbge r6!, {r0, r1, r3, r4, r5, r6, r8, ip, pc}^ │ │ - beq a86c4 │ │ + beq a4af4 │ │ stmib sp, {r6, r7, r8, r9, sl}^ │ │ @ instruction: 0xf8cd4879 │ │ @ instruction: 0xf0009058 │ │ stcls 3, cr8, [sp], {186} @ 0xba │ │ @ instruction: 0xf89a4639 │ │ ldrtmi r9, [r8], r8, lsr #32 │ │ strtmi r4, [r2], -r6, lsr #5 │ │ shasxmi fp, r2, r8 │ │ @ instruction: 0x46289d10 │ │ - ldmib lr!, {r1, r3, r5, r7, ip, sp, lr, pc} │ │ + svc 0x00aef0ad │ │ @ instruction: 0xf04f42b4 │ │ svclt 0x00380100 │ │ stmdacs r0, {r0, r8, sp} │ │ andeq pc, r0, pc, asr #32 │ │ andcs fp, r1, r8, asr #30 │ │ strmi fp, [r8], -r8, lsl #30 │ │ subsle r2, fp, r0, lsl #16 │ │ - bleq aa644 │ │ + bleq a6a74 │ │ ldmdbeq r1, {r6, r9, ip, sp, lr, pc} │ │ stmdbeq r0, {r3, r6, r7, r9, ip, sp, lr, pc} │ │ stmdbls r9, {r0, r3, r4, r6, r7, r8, sp, lr, pc}^ │ │ ldmdbge r6!, {r0, r1, r3, r4, r5, r6, r8, ip, pc}^ │ │ stmdaeq r5, {r0, r7, fp, sp, lr, pc} │ │ stmib sp, {r6, r7, r8, r9, sl}^ │ │ @ instruction: 0xf0006479 │ │ andcs r8, r8, lr, lsl #7 │ │ - @ instruction: 0xf0aa4616 │ │ - ldrcs lr, [r1, -r4, ror #18] │ │ + @ instruction: 0xf0ad4616 │ │ + @ instruction: 0x2711ef5c │ │ vqrdmulh.s d26, d8, d0[1] │ │ stmdacs r0, {r8, r9, sl} │ │ mvnhi pc, #0 │ │ tstpmi r0, pc, asr #32 @ p-variant is OBSOLETE │ │ - b fe07fd54 │ │ + b fe07c184 │ │ subvs r0, r1, r8, lsl #2 │ │ andcs r2, r8, #0, 2 │ │ smlabtcs r0, sp, r9, lr │ │ @ instruction: 0xf8c04631 │ │ strtmi r9, [r8], -r0 │ │ @ instruction: 0x46232210 │ │ - stc2l 0, cr15, [r6], #-108 @ 0xffffff94 │ │ - @ instruction: 0xf0aa4620 │ │ - ldmib sp, {r4, r5, r8, fp, sp, lr, pc}^ │ │ + blx ff4e6a0e │ │ + @ instruction: 0xf0ad4620 │ │ + ldmib sp, {r5, r8, r9, sl, fp, sp, lr, pc}^ │ │ stmdacs r1, {r2, r6, r8, fp} │ │ addshi pc, r1, r0, asr #32 │ │ @ instruction: 0xb118f8dd │ │ andsls r9, r8, r7, asr #16 │ │ andsls r9, r5, r8, asr #16 │ │ andscs lr, fp, pc, asr #20 │ │ teq sl, r7, lsl r0 │ │ mlasls r0, sl, r8, pc @ │ │ @ instruction: 0xf089910a │ │ stmib sp, {r0}^ │ │ ldmdbls r6, {r8, sl, ip} │ │ stmdage r4, {r1, ip, pc}^ │ │ andcc lr, ip, #3358720 @ 0x334000 │ │ - @ instruction: 0xf86cf02a │ │ - blvc fe26b9d8 │ │ + @ instruction: 0xff5cf02d │ │ + blvc fe267e08 │ │ @ instruction: 0x4747e9dd │ │ stmdaeq r1, {r0, r1, r3, r4, r7, fp, sp, lr, pc}^ │ │ @ instruction: 0xd1242801 │ │ andscs lr, fp, pc, asr #20 │ │ stmib sp, {r0, r2, r4, r8, r9, sl, ip, pc}^ │ │ adc r0, sp, #385875968 @ 0x17000000 │ │ @ instruction: 0xf0899f0c │ │ stmib sp, {r0}^ │ │ mcrrge 4, 0, r5, r4, cr0 │ │ smlabbeq r1, r7, r0, pc @ │ │ andne lr, r2, sp, asr #19 │ │ @ instruction: 0x46209916 │ │ ldrtmi r4, [r3], -r2, asr #12 │ │ - @ instruction: 0xf9f8f02a │ │ + @ instruction: 0xf8e8f02e │ │ movtcs lr, #31197 @ 0x79dd │ │ stmdbeq r4, {r0, r2, r3, r4, r6, r7, r8, fp, sp, lr, pc}^ │ │ @ instruction: 0xf0402801 │ │ @ instruction: 0xf8dd8090 │ │ tstls r5, #24, 2 │ │ andscs lr, fp, pc, asr #20 │ │ andseq lr, r7, #3358720 @ 0x334000 │ │ @@ -12889,1097 +9061,2039 @@ │ │ @ instruction: 0xf8d64100 │ │ cdpge 0, 4, cr11, cr4, cr0, {0} │ │ movweq lr, #6784 @ 0x1a80 │ │ @ instruction: 0xf1b8a834 │ │ andle r4, fp, r0, lsl #30 │ │ @ instruction: 0xf8cd465a │ │ ldrmi r9, [r9], r0, asr #32 │ │ - @ instruction: 0xf902f02a │ │ + @ instruction: 0xfff2f02d │ │ @ instruction: 0xf8dd464b │ │ stmdacs r0, {r6, ip, pc} │ │ cmnphi fp, r0 @ p-variant is OBSOLETE │ │ vmax.f32 d18, d0, d1 │ │ stmdahi r0!, {r0, r1, r2, r3, r4, r8, r9, pc} │ │ rsbsls r4, sl, sl, asr r6 │ │ stmdbls fp, {r2, r5, fp, sp, pc} │ │ andne lr, r0, sp, asr #19 │ │ ldmdbls r9, {r4, r5, r9, sl, lr} │ │ ldrbmi lr, [r8, -sp, asr #19]! │ │ stmib sp, {r2, r3, r4, r6, r9, sl, lr}^ │ │ tstls r0, #-671088639 @ 0xd8000001 │ │ - mcr2 0, 6, pc, cr2, cr9, {0} @ │ │ + mcr2 0, 1, pc, cr14, cr13, {0} @ │ │ @ instruction: 0xb114f89d │ │ mcrls 7, 2, r2, cr4, cr1, {0} │ │ streq pc, [r0, -r8, asr #5] │ │ @ instruction: 0xf04042be │ │ cdpge 2, 4, cr8, cr4, cr1, {2} │ │ sbcvc lr, fp, pc, asr sl │ │ cmpphi r9, r0 @ p-variant is OBSOLETE │ │ ldrdeq lr, [fp, #-157]! @ 0xffffff63 │ │ andcc r9, r1, r3, lsl pc │ │ addmi r9, r8, #107 @ 0x6b │ │ cmpphi r1, r0, asr #4 @ p-variant is OBSOLETE │ │ - bleq 6a7cc │ │ + bleq 66bfc │ │ @ instruction: 0xf1b9e6ef │ │ @ instruction: 0xf0000f00 │ │ ldmib sp, {r0, r1, r2, r3, r4, r7, pc}^ │ │ ldmdbge r0!, {r0, r1, r2, r6, ip, sp}^ │ │ andls sl, r0, r2, ror #20 │ │ - @ instruction: 0xf02a4628 │ │ - @ instruction: 0xf8ddfb75 │ │ + @ instruction: 0xf02e4628 │ │ + @ instruction: 0xf8ddfa65 │ │ @ instruction: 0xf89d9110 │ │ ldrmi fp, [r9, #276]! @ 0x114 │ │ addshi pc, r3, r0, asr #32 │ │ sbcvc lr, fp, pc, asr sl │ │ addshi pc, sl, r0 │ │ andcs sl, r0, r4, asr #24 │ │ ldrtmi r9, [r1], -r1 │ │ andcs r4, r9, #32, 12 @ 0x2000000 │ │ - @ instruction: 0xf01b2300 │ │ - ldmib sp, {r0, r2, r3, r5, r7, r8, r9, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf01f2300 │ │ + ldmib sp, {r0, r3, r4, r8, r9, fp, ip, sp, lr, pc}^ │ │ stmdacs r1, {r2, r6, r8, fp} │ │ svcge 0x004af43f │ │ svceq 0x0000f1b9 │ │ ldmib sp, {r1, r3, r4, r5, r6, ip, lr, pc}^ │ │ ldmdbge r0!, {r0, r1, r2, r6, ip, sp}^ │ │ andls sl, r0, r2, ror #20 │ │ - @ instruction: 0xf02a4620 │ │ - @ instruction: 0xf8ddfb51 │ │ + @ instruction: 0xf02e4620 │ │ + @ instruction: 0xf8ddfa41 │ │ @ instruction: 0xf89d9110 │ │ ldrmi fp, [r9, #276]! @ 0x114 │ │ - b 1822cbc │ │ + b 181f0ec │ │ @ instruction: 0xf04f70cb │ │ bicsle r0, fp, r0, lsl #22 │ │ @ instruction: 0xf1b9e076 │ │ @ instruction: 0xf43f0f00 │ │ stmdbge r2!, {r0, r3, r4, r5, r6, r7, r9, sl, fp, sp, pc}^ │ │ - @ instruction: 0xf02a4620 │ │ - @ instruction: 0xf89dfa49 │ │ + @ instruction: 0xf02e4620 │ │ + @ instruction: 0xf89df939 │ │ andscs fp, r1, r4, lsl r1 │ │ @ instruction: 0x9110f8dd │ │ andeq pc, r0, r8, asr #5 │ │ @ instruction: 0xf0404581 │ │ - b 180ea38 │ │ + b 180ae68 │ │ @ instruction: 0xf00070cb │ │ stmdals sl, {r0, r3, r5, r6, r7, pc} │ │ stmdacs r0, {r2, r3, r8, sl, sp} │ │ andeq pc, r8, pc, asr #32 │ │ andcs fp, fp, r8, lsl pc │ │ strcs fp, [lr, #-3864] @ 0xfffff0e8 │ │ svclt 0x00082f00 │ │ rsble r4, sp, r5, lsl #12 │ │ ldmdbls r6, {sp} │ │ stmdage r4, {r0, ip, pc}^ │ │ movwcs r4, #1578 @ 0x62a │ │ - blx 19ea7ce │ │ - blvc fe26bb98 │ │ + blx ff4e6c0c │ │ + blvc fe267fc8 │ │ strbne lr, [r7], #-2525 @ 0xfffff623 │ │ - beq a89d8 │ │ + beq a4e08 │ │ @ instruction: 0xf0002801 │ │ ldrcs r8, [r1, -r6, ror #3] │ │ svceq 0x0000f1b9 │ │ streq pc, [r0, -r8, asr #5] │ │ mvnhi pc, r0 │ │ ldrtmi r4, [r2], -pc, lsl #12 │ │ strbmi r4, [r9], -r0, asr #12 │ │ svclt 0x003845b3 │ │ - @ instruction: 0xf0aa465a │ │ - ldrbmi lr, [lr, #-2154] @ 0xfffff796 │ │ + @ instruction: 0xf0ad465a │ │ + ldrbmi lr, [lr, #-3674] @ 0xfffff1a6 │ │ tstpeq r0, pc, asr #32 @ p-variant is OBSOLETE │ │ smlabbcs r1, r8, pc, fp @ │ │ @ instruction: 0xf04f2800 │ │ svclt 0x00c80000 │ │ svclt 0x00082001 │ │ stmdacs r1, {r3, r9, sl, lr} │ │ stmdage r4, {r4, r6, r7, ip, lr, pc}^ │ │ ldrtmi sl, [sl], -r2, ror #18 │ │ - @ instruction: 0xf02a4623 │ │ - @ instruction: 0xf89df9f9 │ │ + @ instruction: 0xf02e4623 │ │ + @ instruction: 0xf89df8e9 │ │ andscs fp, r1, r4, lsl r1 │ │ @ instruction: 0x9110f8dd │ │ andeq pc, r0, r8, asr #5 │ │ cmnle r2, r1, lsl #11 │ │ sbcvc lr, fp, pc, asr sl │ │ - bleq 6a910 │ │ + bleq 66d40 │ │ @ instruction: 0xe697d1bc │ │ - bleq aa918 │ │ + bleq a6d48 │ │ stmdbls r9, {r2, r3, sp, lr, pc} │ │ andsls r9, r8, #286720 @ 0x46000 │ │ stmdahi r9, {r3, r7, fp, ip, sp, lr} │ │ - b 1095108 │ │ + b 1091538 │ │ andsls r4, r5, #0 │ │ and r9, r2, r7, lsl r0 │ │ - bleq 6a934 │ │ + bleq 66d64 │ │ ldmdage r6!, {r0, r3, r4, r5, r7, r9, sl, lr}^ │ │ - blx ff3ea866 │ │ + blx ee6ca6 │ │ stmdacs r0, {r1, r2, r4, r5, r6, fp, ip, pc} │ │ ldmdals r7!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ - ldm lr!, {r1, r2, r3, r5, r6, ip, sp, lr, pc}^ │ │ + mcr 0, 7, pc, cr12, cr1, {3} @ │ │ mrcls 12, 0, r9, cr8, cr5, {0} │ │ - @ instruction: 0xf019a870 │ │ - ldmdals r0!, {r0, r1, r6, r7, r8, r9, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf01da870 │ │ + ldmdals r0!, {r0, r1, r2, r3, r5, r8, r9, fp, ip, sp, lr, pc}^ │ │ svclt 0x001c2800 │ │ - @ instruction: 0xf06e9871 │ │ - @ instruction: 0x9618e8f4 │ │ + @ instruction: 0xf0719871 │ │ + ldrls lr, [r8], -r2, ror #29 │ │ ldrls sl, [r5], #-3620 @ 0xfffff1dc │ │ ldrtmi lr, [sp], -r6, rrx │ │ ldmdbls r6, {sp} │ │ stmdage r4, {r0, ip, pc}^ │ │ movwcs r4, #1578 @ 0x62a │ │ - blx ffe6a8a8 │ │ - blvc fe26bc74 │ │ + blx 1966ce8 │ │ + blvc fe2680a4 │ │ strbvs lr, [r7], #-2525 @ 0xfffff623 │ │ - beq a8ab4 │ │ + beq a4ee4 │ │ @ instruction: 0xf0402800 │ │ @ instruction: 0xf1b9817e │ │ @ instruction: 0xf43f0f00 │ │ @ instruction: 0x462fae57 │ │ strbmi r9, [r9], -sp, lsl #26 │ │ strtmi r4, [sl], -fp, lsr #11 │ │ uasxmi fp, sl, r8 │ │ - @ instruction: 0xf0a99810 │ │ - ldrbmi lr, [sp, #-4094] @ 0xfffff002 │ │ + @ instruction: 0xf0ad9810 │ │ + ldrbmi lr, [sp, #-3566] @ 0xfffff212 │ │ tstpeq r0, pc, asr #32 @ p-variant is OBSOLETE │ │ tstcs r1, r8, lsr pc │ │ @ instruction: 0xf04f2800 │ │ svclt 0x00480000 │ │ svclt 0x00082001 │ │ stmdacs r0, {r3, r9, sl, lr} │ │ stmdage r4, {r0, r4, r6, r7, r8, ip, lr, pc}^ │ │ ldrtmi sl, [r2], -r2, ror #18 │ │ - @ instruction: 0xf02a4623 │ │ - @ instruction: 0xf89df98d │ │ + @ instruction: 0xf02e4623 │ │ + @ instruction: 0xf89df87d │ │ andscs fp, r1, r4, lsl r1 │ │ @ instruction: 0x9110f8dd │ │ andeq pc, r0, r8, asr #5 │ │ smlabble r6, r1, r5, r4 │ │ sbcvc lr, fp, pc, asr sl │ │ @ instruction: 0xf04f463d │ │ @ instruction: 0xd1bd0b00 │ │ stmdbls r9, {r1, r3, r5, r9, sl, sp, lr, pc} │ │ andsls r9, r8, #286720 @ 0x46000 │ │ stmdahi r9, {r3, r7, fp, ip, sp, lr} │ │ - b 10951dc │ │ + b 109160c │ │ andsls r4, r5, #0 │ │ mcrge 0, 1, r9, cr4, cr7, {0} │ │ - @ instruction: 0xf019a876 │ │ - ldmdals r6!, {r0, r1, r2, r5, r6, r8, r9, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf01da876 │ │ + ldmdals r6!, {r0, r1, r4, r6, r7, r9, fp, ip, sp, lr, pc}^ │ │ svclt 0x001c2800 │ │ - @ instruction: 0xf06e9877 │ │ - @ instruction: 0xf8dde898 │ │ + @ instruction: 0xf0719877 │ │ + @ instruction: 0xf8ddee86 │ │ ldcls 0, cr8, [r8], {84} @ 0x54 │ │ - @ instruction: 0xf019a870 │ │ - ldmdals r0!, {r0, r1, r3, r4, r6, r8, r9, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf01da870 │ │ + ldmdals r0!, {r0, r1, r2, r6, r7, r9, fp, ip, sp, lr, pc}^ │ │ svclt 0x001c2800 │ │ - @ instruction: 0xf06e9871 │ │ - @ instruction: 0xf8cde88c │ │ + @ instruction: 0xf0719871 │ │ + @ instruction: 0xf8cdee7a │ │ ldrls r8, [r8], #-84 @ 0xffffffac │ │ andscs r9, r1, r3, lsl pc │ │ andeq pc, r0, r8, asr #5 │ │ @ instruction: 0xf43f4581 │ │ teq r6, r8, lsl #26 │ │ - bleq 6aa48 │ │ + bleq 66e78 │ │ stmdbls sp!, {r2, r3, r4, r5, r6, r7, r8, sl, sp, lr, pc}^ │ │ stmdble ip, {r3, r7, r9, lr} │ │ svcls 0x00089b0b │ │ - blgt 3d4ac4 │ │ + blgt 3d0ef4 │ │ stm r7, {r2, r6, sl, ip, pc} │ │ strtmi r0, [r2], -lr │ │ movtls r9, #23312 @ 0x5b10 │ │ - @ instruction: 0xf0299700 │ │ - andcs pc, ip, r9, ror #31 │ │ + @ instruction: 0xf02d9700 │ │ + ldrdcs pc, [ip], -r9 │ │ svceq 0x0000f1b9 │ │ andcs fp, r8, r8, lsl #30 │ │ rsble r9, fp, r0, lsl r0 │ │ andcs r9, r0, r6, lsl r9 │ │ movwcs r9, #2576 @ 0xa10 │ │ ldrtmi r9, [r0], -r1 │ │ - blx 1c6a9b8 │ │ - blvc fe26bd84 │ │ + @ instruction: 0xf9dcf01f │ │ + blvc fe2681b4 │ │ strbmi lr, [r7, #-2525] @ 0xfffff623 │ │ stmdaeq r1, {r0, r1, r3, r4, r7, fp, sp, lr, pc}^ │ │ @ instruction: 0xf0002801 │ │ mcrcs 0, 0, r8, cr0, cr5, {6} │ │ sbchi pc, r2, r0 │ │ svceq 0x0008f1bb │ │ bichi pc, r1, r0, asr #32 │ │ @ instruction: 0xf04f6870 │ │ ldmdavs r7!, {r8, lr} │ │ - b fe05a288 │ │ + b fe0566b8 │ │ stmdals sp, {r0, r8, fp} │ │ stmdals ip, {r3, r4, r5, r9, fp, ip} │ │ andeq lr, r0, r9, ror fp │ │ @ instruction: 0xf1b8dbda │ │ andle r4, r6, r0, lsl #30 │ │ @ instruction: 0x463aa834 │ │ - @ instruction: 0xf029464b │ │ - stmdacs r0, {r0, r2, r3, r6, r8, r9, sl, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xf02d464b │ │ + stmdacs r0, {r0, r2, r3, r4, r5, r9, sl, fp, ip, sp, lr, pc} │ │ stccs 0, cr13, [r1, #-832] @ 0xfffffcc0 │ │ cmnphi r5, r0, asr #4 @ p-variant is OBSOLETE │ │ ldrtmi r8, [sl], -r0, lsr #16 │ │ stmdage r4!, {r1, r3, r4, r5, r6, ip, pc} │ │ strbmi r9, [fp], -fp, lsl #18 │ │ andne lr, r0, sp, asr #19 │ │ ldmdbls r9, {r4, r5, r9, sl, lr} │ │ ldrbmi lr, [r8, #-2509]! @ 0xfffff633 │ │ stmib sp, {r2, r3, r4, r5, r9, sl, lr}^ │ │ - @ instruction: 0xf0197976 │ │ - @ instruction: 0xf89dfd11 │ │ + @ instruction: 0xf01d7976 │ │ + @ instruction: 0xf89dfc7d │ │ andscs fp, r1, r4, lsl r1 │ │ vqrdmlah.s d25, d8, d0[1] │ │ addmi r0, r6, #0 │ │ addshi pc, r0, r0, asr #32 │ │ - b 181a2e8 │ │ + b 1816718 │ │ adcle r7, pc, fp, asr #1 │ │ ldrdeq lr, [fp, #-157]! @ 0xffffff63 │ │ andcc r9, r1, r3, lsl pc │ │ addmi r9, r8, #107 @ 0x6b │ │ mrcge 6, 2, APSR_nzcv, cr0, cr15, {1} │ │ addmi r9, r8, #1785856 @ 0x1b4000 │ │ - blls 325084 │ │ + blls 3214b4 │ │ stcls 6, cr4, [r8, #-136] @ 0xffffff78 │ │ ldmib r3, {r1, r3, r5, r6, fp, ip, pc}^ │ │ ldmvs fp, {r8, r9, sl, ip} │ │ strbmi r6, [fp], -fp, lsr #1 │ │ strne lr, [r0, -r5, asr #19] │ │ stmdbmi r4, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc}^ │ │ - @ instruction: 0xf0299500 │ │ - @ instruction: 0xe793ff77 │ │ + @ instruction: 0xf02d9500 │ │ + ldr pc, [r3, r7, ror #28] │ │ ldmdbls r6, {r0, r2, r3, r8, sl, ip, pc} │ │ - bls 436a1c │ │ + bls 432e4c │ │ andls r2, r1, r0, lsl #6 │ │ - @ instruction: 0xf01b4630 │ │ - @ instruction: 0xf50dfa03 │ │ + @ instruction: 0xf01f4630 │ │ + @ instruction: 0xf50df96f │ │ ldmib sp, {r3, r7, r8, r9, fp, ip, sp, lr}^ │ │ ldm fp, {r0, r1, r2, r6, r8, r9, sl, lr} │ │ stmdacs r0, {r0, r6, fp} │ │ cdpcs 1, 0, cr13, cr0, cr11, {3} │ │ @ instruction: 0xf1bbd056 │ │ @ instruction: 0xf0400f08 │ │ ldmdavs r0!, {r1, r2, r4, r6, r8, pc}^ │ │ tstpmi r0, pc, asr #32 @ p-variant is OBSOLETE │ │ mcrge 8, 2, r6, cr4, cr5, {1} │ │ stmdbeq r1, {r7, r9, fp, sp, lr, pc} │ │ - blne 1054a7c │ │ - bl 1c54a8c │ │ - blle ff72ea80 │ │ + blne 1050eac │ │ + bl 1c50ebc │ │ + blle ff72aeb0 │ │ svcmi 0x0000f1b8 │ │ ldmdage r4!, {r1, r2, ip, lr, pc} │ │ strbmi r4, [fp], -sl, lsr #12 │ │ - cdp2 0, 14, cr15, cr2, cr9, {1} │ │ + ldc2l 0, cr15, [r2, #180] @ 0xb4 │ │ sbcsle r2, r2, r0, lsl #16 │ │ vmax.f32 d18, d0, d1 │ │ stmdahi r0!, {r0, r1, r8, pc} │ │ rsbsls r4, sl, sl, lsr #12 │ │ stmdbls fp, {r2, r5, fp, sp, pc} │ │ stmib sp, {r0, r1, r3, r6, r9, sl, lr}^ │ │ ldrtmi r1, [r0], -r0 │ │ stmib sp, {r0, r3, r4, r8, fp, ip, pc}^ │ │ @ instruction: 0x462c4778 │ │ ldmdbpl r6!, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc}^ │ │ - stc2 0, cr15, [r6], #100 @ 0x64 │ │ + ldc2 0, cr15, [r2], {29} │ │ @ instruction: 0xb114f89d │ │ mcrls 7, 2, r2, cr4, cr1, {0} │ │ streq pc, [r0, -r8, asr #5] │ │ @ instruction: 0xd12542be │ │ - b 181a3bc │ │ + b 18167ec │ │ adcsle r7, r2, fp, asr #1 │ │ ldrdeq lr, [fp, #-157]! @ 0xffffff63 │ │ andcc r9, r1, r3, lsl pc │ │ addmi r9, r8, #107 @ 0x6b │ │ stclge 6, cr15, [r6, #252]! @ 0xfc │ │ addmi r9, r8, #1785856 @ 0x1b4000 │ │ - blls 325164 │ │ + blls 321594 │ │ svcls 0x00084622 │ │ ldmib r3, {r1, r3, r5, r6, fp, ip, pc}^ │ │ ldmvs fp, {r8, sl, ip} │ │ @ instruction: 0x464b60bb │ │ strne lr, [r0, #-2503] @ 0xfffff639 │ │ stmdbmi r4, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc}^ │ │ - @ instruction: 0xf0299700 │ │ - ldr pc, [r6, sp, lsl #30] │ │ + @ instruction: 0xf02d9700 │ │ + @ instruction: 0xe796fdfd │ │ @ instruction: 0xf04f2611 │ │ vqdmlsl.s q8, d8, d1 │ │ ands r0, r1, r0, lsl #12 │ │ - bls 11d4f1c │ │ + bls 11d134c │ │ stmvc r8, {r3, r4, r9, ip, pc} │ │ - bls 1210b24 │ │ - b 1093358 │ │ + bls 120cf54 │ │ + b 108f788 │ │ and r4, r6, r0 │ │ ldrls r9, [r5, #-1048] @ 0xfffffbe8 │ │ ldrls lr, [r8], #-1 │ │ - b 1414768 │ │ + b 1410b98 │ │ andsls r2, r7, fp, lsl r0 │ │ ldmdage r0!, {r0, r1, r4, r8, r9, sl, fp, ip, pc}^ │ │ - blx feab84 │ │ + @ instruction: 0xf9aaf01d │ │ stmdacs r0, {r4, r5, r6, fp, ip, pc} │ │ ldmdals r1!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ - svc 0x006ef06d │ │ + ldcl 0, cr15, [ip, #-452] @ 0xfffffe3c │ │ mcrge 6, 1, r4, cr4, cr1, {5} │ │ vshr.s8 d18, d1, #8 │ │ strmi r0, [r1] │ │ - blge ffbabc38 │ │ + blge ffba8068 │ │ tstls r8, fp, lsl r0 │ │ @ instruction: 0xf04fe004 │ │ ldrtmi r0, [r9], r1, lsl #22 │ │ @ instruction: 0x9618e6bd │ │ andscs lr, fp, pc, asr #20 │ │ mcrge 4, 1, r9, cr4, cr5, {0} │ │ ssat r9, #24, r7 │ │ - @ instruction: 0xf014a84c │ │ - @ instruction: 0x9c36fa39 │ │ + @ instruction: 0xf018a84c │ │ + @ instruction: 0x9c36f9a5 │ │ svcmi 0x0000f1b4 │ │ ldrcs sp, [r1, -r6, asr #2] │ │ ldrsbtge pc, [r8], -sp @ │ │ streq pc, [r0, -r8, asr #5] │ │ @ instruction: 0xf7ff46b9 │ │ ldrcs fp, [r1, -r8, lsr #21] │ │ streq pc, [r0, -r8, asr #5] │ │ ldrcs lr, [r1, -r3] │ │ streq pc, [r0, -r8, asr #5] │ │ stmdage ip, {r0, r3, r4, r5, r7, r9, sl, lr}^ │ │ - blx 8eabdc │ │ + @ instruction: 0xf98ef018 │ │ @ instruction: 0xf8dd9c36 │ │ @ instruction: 0xf1b4a038 │ │ @ instruction: 0xf43f4f00 │ │ ldmib sp, {r1, r2, r4, r7, r9, fp, sp, pc}^ │ │ cmplt sp, r7, lsr r5 │ │ streq pc, [r4], -r8, lsl #2 │ │ stceq 8, cr15, [r4], {86} @ 0x56 │ │ svclt 0x001c2800 │ │ - @ instruction: 0xf0a96830 │ │ - strcc lr, [ip], -sl, lsl #28 │ │ + @ instruction: 0xf0ad6830 │ │ + @ instruction: 0x360cebfa │ │ mvnsle r3, r1, lsl #26 │ │ - bllt fe75a44c │ │ - blt fe12cbbc │ │ + bllt fe75687c │ │ + blt fe128fec │ │ strbhi lr, [r7, #-2525] @ 0xfffff623 │ │ ldrsbtge pc, [r8], -sp @ │ │ @ instruction: 0xf108b15d │ │ @ instruction: 0xf8570704 │ │ stmdacs r0, {r2, sl, fp} │ │ ldmdavs r8!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ - ldcl 0, cr15, [r4, #676]! @ 0x2a4 │ │ + bl ff9672c0 │ │ stccc 7, cr3, [r1, #-48] @ 0xffffffd0 │ │ @ instruction: 0x2711d1f5 │ │ vmull.s8 q9, d8, d0 │ │ ldrtmi r0, [r9], r0, lsl #14 │ │ - bge 102bdec │ │ - blt 106cbf0 │ │ + bge 102821c │ │ + blt 1069020 │ │ ldrhi lr, [r7, #-2525]! @ 0xfffff623 │ │ ldrsbtge pc, [r8], -sp @ │ │ @ instruction: 0xf108b15d │ │ @ instruction: 0xf8570704 │ │ stmdacs r0, {r2, sl, fp} │ │ ldmdavs r8!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ - ldcl 0, cr15, [sl, #676] @ 0x2a4 │ │ + bl ff2e72f4 │ │ stccc 7, cr3, [r1, #-48] @ 0xffffffd0 │ │ @ instruction: 0x2711d1f5 │ │ vmull.s8 q9, d8, d0 │ │ ldrtmi r0, [r9], r0, lsl #14 │ │ - bge 14abd20 │ │ - @ instruction: 0xf0a94640 │ │ - @ instruction: 0xf7ffedce │ │ - @ instruction: 0xf0a9ba4c │ │ - stmdami r5, {r1, r3, r6, r7, r8, sl, fp, sp, lr, pc}^ │ │ - @ instruction: 0xf0104478 │ │ - stmdami r4, {r0, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ - @ instruction: 0xf0124478 │ │ - stmdami r3, {r0, r1, r2, r4, r5, r6, r8, r9, fp, ip, sp, lr, pc}^ │ │ - @ instruction: 0xf0104478 │ │ - ldmdami fp!, {r0, r3, r4, r5, r6, r7, r9, sl, fp, ip, sp, lr, pc} │ │ - @ instruction: 0xf0124478 │ │ - addmi pc, pc, #113664 @ 0x1bc00 │ │ - bge fec2c650 │ │ + bge 14a8150 │ │ + @ instruction: 0xf0ad4640 │ │ + @ instruction: 0xf7ffebbe │ │ + @ instruction: 0xf0adba4c │ │ + stmdami r5, {r1, r3, r4, r5, r7, r8, r9, fp, sp, lr, pc}^ │ │ + @ instruction: 0xf0144478 │ │ + stmdami r4, {r0, r2, r3, r5, r6, r9, sl, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf0164478 │ │ + stmdami r3, {r0, r1, r5, r6, r7, r9, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf0144478 │ │ + ldmdami fp!, {r0, r2, r5, r6, r9, sl, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xf0164478 │ │ + addmi pc, pc, #897024 @ 0xdb000 │ │ + bge fec28a80 │ │ cmpeq r1, r1, lsl #22 │ │ - bl d54c0 │ │ + bl d18f0 │ │ ldmvs r1!, {r0, r6, r7, r9, sl} │ │ @ instruction: 0xf47e2900 │ │ @ instruction: 0xf7feaa73 │ │ - blmi 101d700 │ │ + blmi 1019b30 │ │ mrscs r2, (UNDEF: 2) │ │ ldrbtmi r4, [fp], #-1586 @ 0xfffff9ce │ │ - mrc2 0, 4, pc, cr8, cr0, {0} │ │ + mcr2 0, 0, pc, cr4, cr4, {0} @ │ │ andcs r4, r0, r8, lsr fp │ │ ldrtmi r2, [sl], -r2, lsl #2 │ │ - @ instruction: 0xf010447b │ │ - blmi dee6d0 │ │ + @ instruction: 0xf014447b │ │ + blmi dea8b0 │ │ mrscs r2, (UNDEF: 2) │ │ ldrbtmi r4, [fp], #-1578 @ 0xfffff9d6 │ │ - mcr2 0, 4, pc, cr10, cr0, {0} @ │ │ + ldc2l 0, cr15, [r6, #80]! @ 0x50 │ │ andcs r4, r0, r3, lsr fp │ │ strtmi r2, [r2], -r2, lsl #2 │ │ - @ instruction: 0xf010447b │ │ - cdpls 14, 1, cr15, cr8, cr3, {4} │ │ + @ instruction: 0xf014447b │ │ + cdpls 13, 1, cr15, cr8, cr15, {7} │ │ teqlt r6, sp, asr #26 │ │ @ instruction: 0x46209c17 │ │ - @ instruction: 0xf842f01f │ │ + @ instruction: 0xffaef022 │ │ mcrcc 4, 0, r3, cr1, cr8, {0} │ │ ldmdals r4!, {r0, r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ svclt 0x001c2800 │ │ - @ instruction: 0xf0a99817 │ │ - ldmdami sp, {r7, r8, sl, fp, sp, lr, pc} │ │ - blmi 7995fc │ │ + @ instruction: 0xf0ad9817 │ │ + ldmdami sp, {r4, r5, r6, r8, r9, fp, sp, lr, pc} │ │ + blmi 795a2c │ │ ldrbtmi r4, [r8], #-2333 @ 0xfffff6e3 │ │ strbls r4, [ip, #-1147] @ 0xfffffb85 │ │ tstls r0, r9, ror r4 │ │ - @ instruction: 0xf012212b │ │ - andcs pc, r1, fp, ror #23 │ │ - @ instruction: 0xf00f4631 │ │ - andcs pc, r1, r1, ror #18 │ │ - @ instruction: 0xf00f2180 │ │ - ldmdami r9, {r0, r2, r3, r4, r6, r8, fp, ip, sp, lr, pc} │ │ - blmi 6996cc │ │ + @ instruction: 0xf016212b │ │ + andcs pc, r1, r7, asr fp @ │ │ + @ instruction: 0xf0134631 │ │ + andcs pc, r1, sp, asr #17 │ │ + @ instruction: 0xf0132180 │ │ + ldmdami r9, {r0, r3, r6, r7, fp, ip, sp, lr, pc} │ │ + blmi 695afc │ │ ldrbtmi r4, [r8], #-2329 @ 0xfffff6e7 │ │ ldrbtmi r4, [r9], #-1147 @ 0xfffffb85 │ │ @ instruction: 0x212b9100 │ │ - blx ff66ad4e │ │ + blx 116718e │ │ tstcs r8, r1 │ │ - @ instruction: 0xf94ef00f │ │ + @ instruction: 0xf8baf013 │ │ andcs r9, r8, r8, lsl r9 │ │ - @ instruction: 0xf94af00f │ │ + @ instruction: 0xf8b6f013 │ │ strtmi r2, [r1], -r8 │ │ - @ instruction: 0xf946f00f │ │ - blmi 581170 │ │ + @ instruction: 0xf8b2f013 │ │ + blmi 57d5a0 │ │ ldrbtmi r4, [r9], #-2581 @ 0xfffff5eb │ │ eorsls r4, r4, fp, ror r4 │ │ andls r4, r0, #2046820352 @ 0x7a000000 │ │ @ instruction: 0x4608aa34 │ │ - @ instruction: 0xf012212b │ │ - svclt 0x0000fbbf │ │ - andeq ip, sl, r4, rrx │ │ - @ instruction: 0xfffea7b9 │ │ - andeq fp, sl, r0, ror #24 │ │ - andeq ip, sl, ip, lsl r1 │ │ - andeq sp, sl, ip, ror #2 │ │ - andeq ip, sl, r4, rrx │ │ - andeq fp, sl, ip, lsl #30 │ │ - @ instruction: 0xfffea791 │ │ - andeq fp, sl, r8, asr ip │ │ - andeq fp, sl, r6, ror sp │ │ - andeq fp, sl, ip, lsr #27 │ │ - muleq sl, lr, sp │ │ - muleq sl, r0, sp │ │ - @ instruction: 0x000abdba │ │ - @ instruction: 0xfffea765 │ │ - andeq fp, sl, r8, ror #7 │ │ - andeq fp, sl, r4, lsr r6 │ │ - ldmdavs r2, {r7, r8, sl, ip, sp, pc} │ │ - @ instruction: 0xf03e6809 │ │ - stclt 12, cr15, [r0, #868] @ 0x364 │ │ - svcmi 0x00f0e92d │ │ - andls fp, r3, fp, lsl #1 │ │ - stmvs r8, {r0, r1, r4, r7, r9, sl, lr} │ │ - cmplt sl, #4325376 @ 0x420000 │ │ - @ instruction: 0xf10d6800 │ │ - ldmib r1, {r5, r8, fp}^ │ │ - @ instruction: 0xf10d7500 │ │ - stmiavs lr, {r4, r9, fp}^ │ │ - stmdaeq r8, {r8, ip, sp, lr, pc} │ │ - @ instruction: 0xf8d80114 │ │ - bcs 76dc4 │ │ - @ instruction: 0xf8d8d92b │ │ - stmib sp, {}^ @ │ │ - ldrbmi r0, [sl], -r8, lsl #4 │ │ - ldrbmi r8, [r0], -r1, lsl #16 │ │ - ldrtmi r9, [r1], -sl, lsl #2 │ │ - strvc lr, [r0, #-2509] @ 0xfffff633 │ │ - andls pc, r8, sp, asr #17 │ │ - @ instruction: 0xf940f025 │ │ - tstcs r1, r4, lsl #16 │ │ - smlabteq r0, r8, r2, pc @ │ │ - smlabble pc, r8, r2, r4 @ │ │ - ldrdeq lr, [r6, -sp] │ │ - stmdb r8, {r4, sl, fp, ip, sp}^ │ │ - cps #2 │ │ - bicsle r0, lr, r0, lsl r8 │ │ - tstcs r1, r3, lsl #16 │ │ - smlabteq r0, r8, r2, pc @ │ │ - andlt r6, fp, r1 │ │ - svchi 0x00f0e8bd │ │ - svcls 0x0003ab05 │ │ - strgt ip, [pc, -lr, lsl #22] │ │ - pop {r0, r1, r3, ip, sp, pc} │ │ - blmi 112dd0 │ │ - mrscs r2, (UNDEF: 2) │ │ - @ instruction: 0xf010447b │ │ - svclt 0x0000fdc9 │ │ - andeq fp, sl, ip, lsl ip │ │ + @ instruction: 0xf016212b │ │ + svclt 0x0000fb2b │ │ + andeq pc, sl, r4, asr #24 │ │ + @ instruction: 0xfffee389 │ │ + muleq sl, r0, r8 │ │ + strdeq pc, [sl], -ip │ │ + andeq r0, fp, ip, asr #26 │ │ + andeq pc, sl, r4, asr #24 │ │ + andeq pc, sl, ip, ror #21 │ │ + @ instruction: 0xfffee361 │ │ + andeq pc, sl, r8, lsl #16 │ │ + andeq pc, sl, r6, asr r9 @ │ │ + andeq pc, sl, ip, lsl #19 │ │ + andeq pc, sl, lr, ror r9 @ │ │ + andeq pc, sl, r0, ror r9 @ │ │ + muleq sl, sl, r9 │ │ + @ instruction: 0xfffee335 │ │ + andeq lr, sl, r8, ror #30 │ │ + andeq pc, sl, r4, lsl r2 @ │ │ + @ instruction: 0xb086b5b0 │ │ + strmi r4, [sp], -r4, lsl #12 │ │ + movweq lr, #2513 @ 0x9d1 │ │ + stmib sp, {r0, r3, r6, r7, fp, sp, lr}^ │ │ + stmdage r2, {r8, r9} │ │ + @ instruction: 0xf924f02a │ │ + mulne ip, sp, r8 │ │ + stmdals r2, {r0, r4, r9, sp} │ │ + andeq pc, r0, #200, 4 @ 0x8000000c │ │ + @ instruction: 0xd1044290 │ │ + andsvc r6, r1, sl, lsr #17 │ │ + andlt r6, r6, r0, lsr #32 │ │ + @ instruction: 0xf8ddbdb0 │ │ + stcls 0, cr2, [r5, #-52] @ 0xffffffcc │ │ + @ instruction: 0x3011f8dd │ │ + @ instruction: 0xf8c460e5 │ │ + @ instruction: 0xf8c43009 │ │ + @ instruction: 0x71212005 │ │ + andlt r6, r6, r0, lsr #32 │ │ + ldrble fp, [r4], #3504 @ 0xdb0 │ │ svcmi 0x00f0e92d │ │ - strmi fp, [r8], sp, asr #1 │ │ - ldmib r1, {r1, r7, r9, sl, lr}^ │ │ - blge d6f230 │ │ - andcs r4, r0, #154140672 @ 0x9300000 │ │ - addcs ip, r0, r7, lsl #6 │ │ - @ instruction: 0xf88dac18 │ │ - andcs r0, r1, r0, ror #1 │ │ - stmib sp, {r1, r4, r5, r8, fp, sp, pc}^ │ │ - @ instruction: 0x46202032 │ │ - @ instruction: 0xf7f39234 │ │ - @ instruction: 0xf89dfaf5 │ │ - @ instruction: 0xf1b99060 │ │ - tstle r4, r6, lsl #30 │ │ - teqlt r8, #3276800 @ 0x320000 │ │ - stmdbeq r6, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ - @ instruction: 0x4621e01e │ │ - ldm r1, {r1, r5, fp, sp, pc} │ │ - ldrshtgt r0, [ip], #12 │ │ - eorsne lr, r6, #3620864 @ 0x374000 │ │ - andsle r4, r3, #-1610612728 @ 0xa0000008 │ │ - ldrcs r9, [r3], #-2101 @ 0xfffff7cb │ │ - vsubw.s8 q9, q0, d1 │ │ - stcpl 4, cr0, [r7], {128} @ 0x80 │ │ - streq pc, [r9, #-423] @ 0xfffffe59 │ │ - vmla.f32 d2, d0, d7 │ │ - blx 10f8f4 │ │ - eormi pc, r7, #1310720 @ 0x140000 │ │ - addshi pc, r5, #0 │ │ - eorsls r3, r7, #268435456 @ 0x10000000 │ │ - @ instruction: 0xd1f04291 │ │ - tstlt r0, r2, lsr r8 │ │ - @ instruction: 0xf0a99833 │ │ - @ instruction: 0xf1b9ec90 │ │ - tstle sl, r6, lsl #30 │ │ - stmdavs r0!, {r0, r3, r4, sl, fp, ip, pc} │ │ - suble r2, sp, r1, lsl #16 │ │ - cmple pc, r0, lsl #16 │ │ - stmdacs r0, {r5, r7, fp, sp, lr} │ │ - stmdavs r5!, {r2, r3, r4, r6, ip, lr, pc}^ │ │ - @ instruction: 0xf89de057 │ │ - ldmib sp, {r0, r1, r5, r6}^ │ │ - @ instruction: 0xf88d6219 │ │ - ldmdage r4, {r0, r1, r3, r6} │ │ - @ instruction: 0x371be9dd │ │ - ldmib r8, {r2, r3, r7, lr, pc}^ │ │ - @ instruction: 0xf8bd7002 │ │ - @ instruction: 0xf8ad1061 │ │ - andsls r1, r1, r9, asr #32 │ │ - @ instruction: 0x8010f8d8 │ │ - ldrdeq lr, [ip, -r7] │ │ - movwcs lr, #10715 @ 0x29db │ │ - ldcls 0, cr4, [sp, #-356] @ 0xfffffe9c │ │ - ldrls r4, [r7, #-80] @ 0xffffffb0 │ │ - ldrls r4, [r3], -r8, lsl #6 │ │ - subls pc, r8, sp, lsl #17 │ │ - @ instruction: 0xf89bd121 │ │ - stmdacs r0, {r4, r6} │ │ - @ instruction: 0xf8dbd041 │ │ - @ instruction: 0xf8cd0040 │ │ - stmdacs r0, {r2, r3, r4, r5, sp, pc} │ │ - rsbshi pc, r8, #64 @ 0x40 │ │ - @ instruction: 0xf04f4659 │ │ - @ instruction: 0xf8514000 │ │ - ldmib r1, {r2, r6, r8, r9, sl, fp, sp, pc}^ │ │ - @ instruction: 0xf1ba2301 │ │ - andvs r4, r8, r0, lsl #30 │ │ - stmdbls pc, {r0, r1, r3, r4, r5, r8, ip, lr, pc} @ │ │ - vaddl.s8 q9, d8, d12 │ │ - stmdacc r3, {} @ │ │ - ldmdage r2, {r3, sp, lr} │ │ - mrc2 0, 7, pc, cr12, cr14, {0} │ │ - pop {r0, r2, r3, r6, ip, sp, pc} │ │ - strdcs r8, [ip], -r0 │ │ - andeq pc, r0, r8, asr #5 │ │ - eor r3, r2, r4 │ │ - stmdacs r3, {r5, r8, fp, ip, sp, lr} │ │ - stmiavs r5!, {r4, r8, ip, lr, pc} │ │ - @ instruction: 0x6700e9d5 │ │ - stmdbcs r0, {r0, r3, r4, r5, fp, sp, lr} │ │ - shadd16mi fp, r0, ip │ │ - ldmdavs r8!, {r3, r7, r8, r9, sl, lr}^ │ │ - svclt 0x001c2800 │ │ - @ instruction: 0xf0a94630 │ │ - strtmi lr, [r8], -sl, lsr #24 │ │ - stc 0, cr15, [r6], #-676 @ 0xfffffd5c │ │ - @ instruction: 0xf0a94620 │ │ - andcs lr, ip, r4, lsr #24 │ │ - andeq pc, r0, r8, asr #5 │ │ - andeq pc, r0, sl, asr #17 │ │ - pop {r0, r2, r3, r6, ip, sp, pc} │ │ - strdcs r8, [ip], -r0 │ │ - andeq pc, r0, r8, asr #5 │ │ - @ instruction: 0xf8ca3807 │ │ - ldmdage r2, {} @ │ │ - mcr2 0, 6, pc, cr12, cr14, {0} @ │ │ - pop {r0, r2, r3, r6, ip, sp, pc} │ │ - @ instruction: 0xf8db8ff0 │ │ - movwls r0, #57360 @ 0xe010 │ │ - andsls r2, r0, #0, 16 │ │ - tstls r6, r9, lsl #14 │ │ - eorhi pc, r8, #64 @ 0x40 │ │ - tstpeq r8, fp, lsl #2 @ p-variant is OBSOLETE │ │ - ldmdage r8, {r0, r2, r8, ip, pc} │ │ - rscgt ip, ip, ip, ror #19 │ │ - smlaleq lr, ip, r1, r8 │ │ - rscgt r2, ip, r4, lsl #2 │ │ - andmi pc, r0, pc, asr #32 │ │ - eoreq pc, r0, fp, asr #17 │ │ + ldrmi fp, [r2], pc, ror #1 │ │ + movwcs r2, #33280 @ 0x8200 │ │ + stmib sp, {r0, r2, r4, r9, ip, pc}^ │ │ + @ instruction: 0x460b2313 │ │ + blpl 269360 │ │ + bleq 4a7b18 │ │ + blge 5cfe80 │ │ + vrshr.s8 d25, d6, #8 │ │ + tstls r8, #0, 22 │ │ + tstls r7, #19456 @ 0x4c00 │ │ + @ instruction: 0x2702e9da │ │ + @ instruction: 0x3600e9d5 │ │ + subsmi r4, sl, r7, ror r0 │ │ + tstle r2, sl, lsr r3 │ │ + ldrdcs pc, [r0], #-138 @ 0xffffff76 │ │ + @ instruction: 0xf0412a00 │ │ + @ instruction: 0x465382b0 │ │ + andmi pc, r0, #79 @ 0x4f │ │ + svcmi 0x0044f853 │ │ + stmdbhi r1, {r0, r1, r4, r6, r7, r8, fp, sp, lr, pc} │ │ + svcmi 0x0000f1b4 │ │ + tstle r6, sl, lsl r0 │ │ + bleq 267908 │ │ + @ instruction: 0xf1abe001 │ │ + tstcs r0, r1, lsl #22 │ │ + @ instruction: 0xf289fa5f │ │ + b 10b566c │ │ + stmib r0, {r0, r1, r9, sp}^ │ │ + stmib r0, {r1, r8, r9, sl, sp, lr}^ │ │ + @ instruction: 0xf001b200 │ │ + ldmdals r4, {r0, r4, r8, r9, pc} │ │ + b feae7534 │ │ + pop {r0, r1, r2, r3, r5, r6, ip, sp, pc} │ │ + strdls r8, [r9, -r0] │ │ + stmib sp, {r1, r3, r5, r9, sl, fp, sp, pc}^ │ │ + andcs r3, r0, fp │ │ + ldrls r2, [r2, #-260] @ 0xfffffefc │ │ + smlawteq ip, sp, r9, lr │ │ + orrcc pc, sp, r0, asr #4 │ │ + eoreq lr, sl, sp, asr #19 │ │ + eoreq lr, lr, sp, asr #19 │ │ + teqeq r0, sp, asr #19 │ │ + cdpge 0, 2, cr14, cr10, cr2, {0} │ │ + @ instruction: 0xd11e0890 │ │ + @ instruction: 0xf01d4630 │ │ + stmdals pc!, {r0, r3, r4, r8, fp, ip, sp, lr, pc} @ │ │ + rscsle r2, r9, r0, lsl #16 │ │ + movwcs r2, #8448 @ 0x2100 │ │ + strcs r2, [r0, -r1, lsl #10] │ │ + blx fe9232e6 │ │ + stmdaeq r0, {r0, r1, r9, sl, sp}^ │ │ + strvs pc, [r7], -r3, lsl #22 │ │ + strvs pc, [r7, -r3, lsl #22] │ │ + bfieq r4, r3, (invalid: 12:2) │ │ + blx fe91f6b2 │ │ + stmdacs r1, {r0, r2, r9, sl, sp} │ │ + blx 11f672 │ │ + blx 2036ee │ │ + ldrmi r1, [r5], -r5, lsl #2 │ │ + ldrtmi lr, [r1], -fp, ror #15 │ │ + stmibgt ip, {r1, r6, r8, sl, fp, sp, pc}^ │ │ + sbcgt r1, ip, r8, lsr #26 │ │ + smulleq lr, ip, r1, r8 │ │ + sbcgt r4, ip, r9, lsr #12 │ │ stmib sp, {sp}^ │ │ + @ instruction: 0xf10d891c │ │ + andsls r0, lr, r8, ror #18 │ │ + ldreq lr, [sl], #-2509 @ 0xfffff633 │ │ + andseq pc, r4, r9, lsl #2 │ │ + adcge pc, r0, sp, asr #17 │ │ + sbcgt ip, ip, ip, asr #19 │ │ + smlaleq lr, ip, r1, r8 │ │ + ldcls 0, cr12, [r2], {236} @ 0xec │ │ + eorsge pc, r8, sp, asr #17 │ │ + stmdacs r0, {r5, r6, r7, r9, sl, fp, sp, lr} │ │ + addshi pc, r2, r0 │ │ + bge 6d543c │ │ + @ instruction: 0xf02e4621 │ │ + ldmib sp, {r0, r2, r3, r4, r5, r6, fp, ip, sp, lr, pc}^ │ │ + ldmib sp, {r1, r6, r8, r9, ip, lr}^ │ │ + ldrbmi r8, [sp, #-68] @ 0xffffffbc │ │ + subhi pc, r4, sp, asr #17 │ │ + @ instruction: 0xf0409010 │ │ + @ instruction: 0xf8d480ce │ │ + @ instruction: 0xf1baa054 │ │ + @ instruction: 0xf0010f00 │ │ + stcvs 2, cr8, [r0, #-240]! @ 0xffffff10 │ │ + andshi lr, r7, #3620864 @ 0x374000 │ │ + ldrdgt pc, [r4], #-141 @ 0xffffff73 @ │ │ + @ instruction: 0xf0412800 │ │ + cdpls 2, 1, cr8, cr1, cr4, {1} │ │ + stmdacs r0, {r4, fp, ip, pc} │ │ + eorhi pc, pc, #1 │ │ + svccs 0x000068b7 │ │ + eorhi pc, fp, #1 │ │ + ldrdpl lr, [r0], -r6 │ │ + ldrd pc, [ip], -r6 │ │ + ldrdmi pc, [r8], -r8 │ │ + @ instruction: 0xf8d8900f │ │ + addmi r0, r4, #0 │ │ + mvnshi pc, r1 │ │ + ldrdeq pc, [r4], -r8 │ │ + subpl r0, r5, r1, lsr #2 │ │ + bl 32524 │ │ + @ instruction: 0xf8c81004 │ │ + andcc r1, r4, r8 │ │ + stm r0, {r0, r1, r2, r3, r8, fp, ip, pc} │ │ + ldmdavs r0, {r1, r7, lr} │ │ + andsvs r3, r0, r1 │ │ + ldrdne pc, [r0], -ip │ │ + @ instruction: 0xf0814288 │ │ + ldmdals r0, {r1, r3, r9, pc} │ │ + ldreq pc, [r8, -r6, lsl #2] │ │ + @ instruction: 0xf1aa9911 │ │ + bl 2cbd0 │ │ + bl 6b4d0 │ │ + cdpcs 14, 0, cr0, cr0, cr0, {6} │ │ + mvnshi pc, r1 │ │ + svclt 0x001c4577 │ │ + stccs 8, cr6, [r0, #-756] @ 0xfffffd0c │ │ + mvnshi pc, r1 │ │ + strlt lr, [r0], #-2519 @ 0xfffff629 │ │ + ldrdge pc, [ip], -r7 │ │ + ldrdls pc, [r8], -r8 │ │ + ldrdeq pc, [r0], -r8 │ │ + andsle r4, pc, r1, lsl #11 │ │ + ldrdeq pc, [r4], -r8 │ │ + tstne r9, pc, asr #20 │ │ + mcrcc 7, 0, r3, cr1, cr8, {0} │ │ + andlt pc, r1, r0, asr #16 │ │ + andne lr, r9, r0, lsl #22 │ │ + @ instruction: 0xf1093004 │ │ + @ instruction: 0xf8c80101 │ │ + stm r0, {r3, ip} │ │ + vqshl.s8 d16, d16, d0 │ │ + @ instruction: 0xf10d0b11 │ │ + ldmdavs r0, {r3, r5, r6, r8, fp} │ │ + bleq 67f48 │ │ + andsvs r3, r0, r1 │ │ + ldrdne pc, [r0], -ip │ │ + bicle r4, lr, #136, 4 @ 0x80000008 │ │ + stmiblt sp, {r0, ip, sp, lr, pc}^ │ │ + tstls r2, #64, 12 @ 0x4000000 │ │ + eorsgt pc, r4, sp, asr #17 │ │ + and lr, pc, #3358720 @ 0x334000 │ │ + @ instruction: 0xffdcf007 │ │ + ldrsbtgt pc, [r4], -sp @ │ │ + and lr, pc, #3620864 @ 0x374000 │ │ + bfi r9, r2, (invalid: 22:17) │ │ + stccs 15, cr6, [r0, #-660] @ 0xfffffd6c │ │ + sbcshi pc, r1, r0 │ │ + subeq lr, r5, r5, lsl #22 │ │ + tsteq r0, r6, ror #30 │ │ + @ instruction: 0xf0ad9011 │ │ + stmdacs r0, {r1, r2, r4, r6, r7, r8, fp, sp, lr, pc} │ │ + subhi pc, r4, #1 │ │ + strcs r4, [r0], #-1666 @ 0xfffff97e │ │ + ldrls r4, [r0, #-1705] @ 0xfffff957 │ │ + strcs lr, [r1, #-40] @ 0xffffffd8 │ │ + ldrbmi r4, [r9], -r8, lsr #12 │ │ + @ instruction: 0xf106463a │ │ + @ instruction: 0xf1a90830 │ │ + @ instruction: 0xf0a90901 │ │ + ldmib r6, {r4, r5, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf1b93000 │ │ + @ instruction: 0xf8d60f00 │ │ + @ instruction: 0xf896c01c │ │ + @ instruction: 0xf896e028 │ │ + ldmib r6, {r5, sp}^ │ │ + @ instruction: 0xf84a1602 │ │ + bl 2b74bc │ │ + @ instruction: 0xf1040304 │ │ + @ instruction: 0xf8830430 │ │ + @ instruction: 0xf1032020 │ │ + sbcgt r0, r3, #4, 4 @ 0x40000000 │ │ + andseq pc, r4, r3, lsl #2 │ │ + @ instruction: 0xf8834646 │ │ + stm r0, {r3, r5, sp, lr, pc} │ │ + andsle r1, r2, r0, lsr #1 │ │ + adcmi r9, r0, #1114112 @ 0x110000 │ │ + ldmib r6, {r0, r1, r2, r3, ip, lr, pc}^ │ │ + svccs 0x0000b705 │ │ + ldrtmi sp, [r8], -pc, asr #1 │ │ + ldmib sl, {r0, r2, r3, r5, r7, ip, sp, lr, pc} │ │ + @ instruction: 0xf0012800 │ │ + @ instruction: 0x460581f6 │ │ + beq 66540c │ │ + @ instruction: 0xf001900f │ │ + andcs fp, r0, r7, ror r9 │ │ + bleq 4a7df8 │ │ + @ instruction: 0xf50d2104 │ │ + stmib sp, {r2, r7, r8, fp, ip, sp, lr}^ │ │ vrhadd.s8 q8, q0, q2 │ │ - stmib sp, {r0, r2, r3, r7, r8, ip, sp}^ │ │ + vaddw.s8 , q12, d13 │ │ + stmib sp, {r8, r9, fp}^ │ │ stmib sp, {r1, r6}^ │ │ stmib sp, {r1, r2, r6}^ │ │ and r0, r1, r8, asr #2 │ │ @ instruction: 0xd11e0890 │ │ - @ instruction: 0xf019a842 │ │ - stmdals r7, {r0, r2, r4, r5, r6, r7, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf0084648 │ │ + stmdals r7, {r0, r1, r3, r5, r6, r7, sl, fp, ip, sp, lr, pc}^ │ │ rscsle r2, r9, r0, lsl #16 │ │ movwcs r2, #8448 @ 0x2100 │ │ - strcs r2, [r0], #-1281 @ 0xfffffaff │ │ - blx fe927026 │ │ - stmdaeq r0, {r0, r1, r8, r9, sl, sp}^ │ │ - strvc pc, [r4, -r3, lsl #22] │ │ - strvc pc, [r4], #-2819 @ 0xfffff4fd │ │ + strcs r2, [r0, -r1, lsl #10] │ │ + blx fe923552 │ │ + stmdaeq r0, {r0, r1, r9, sl, sp}^ │ │ + strvs pc, [r7], -r3, lsl #22 │ │ + strvs pc, [r7, -r3, lsl #22] │ │ bfieq r4, r3, (invalid: 12:2) │ │ - blx fe9233f2 │ │ - stmdacs r1, {r0, r2, r9, sl, sp} │ │ - blx 1233b6 │ │ - blx 14742e │ │ + blx fe91f91e │ │ + stmdacs r1, {r0, r2, sl, sp} │ │ + blx 11f8e2 │ │ + blx 1fb95a │ │ ldrmi r1, [r5], -r5, lsl #2 │ │ - stmdbge r2, {r0, r1, r3, r5, r6, r7, r8, r9, sl, sp, lr, pc}^ │ │ - stcne 13, cr10, [r8, #-200]! @ 0xffffff38 │ │ - stmibgt ip, {r1, r5, sl, fp, sp, pc}^ │ │ - ldm r1, {r2, r3, r6, r7, lr, pc} │ │ - strtmi r0, [r9], -ip, asr #1 │ │ - stmdals lr, {r2, r3, r6, r7, lr, pc} │ │ - ldmdals r0, {r0, r2, r5, ip, pc} │ │ - andcs r9, r0, r4, lsr #32 │ │ - beq 8e9784 │ │ - beq 186b488 │ │ - @ instruction: 0xf1049026 │ │ - @ instruction: 0xf8cd0014 │ │ - stmibgt ip, {r6, r7, ip, sp, pc}^ │ │ - ldm r1, {r2, r3, r6, r7, lr, pc} │ │ - rscgt r0, ip, ip, ror #1 │ │ - vabal.s8 q9, d8, d12 │ │ - ldmdals sl, {r8, sl} │ │ - @ instruction: 0x4000f1b0 │ │ - uadd16mi fp, r0, r8 │ │ - svceq 0x0004f1b9 │ │ - @ instruction: 0xf040900e │ │ - @ instruction: 0xf10d80d0 │ │ - ldrls r0, [r2, #-2504]! @ 0xfffff638 │ │ - @ instruction: 0xf0024648 │ │ - ldmdals r5, {r0, r2, r6, r7, r9, sl, fp, ip, sp, lr, pc} │ │ - stmdacs r0, {r0, r3, r5, r6, r8, sl, fp, ip} │ │ - rscshi pc, r1, r0 │ │ - ldrsbge pc, [r0], #-141 @ 0xffffff73 @ │ │ - subeq lr, r0, r0, lsl #22 │ │ - cdpge 12, 3, cr9, cr2, cr9, {0} │ │ - sbceq lr, r0, sl, lsl #22 │ │ - movwmi pc, #79 @ 0x4f @ │ │ - andls r4, sl, r9, lsl #13 │ │ - eorlt pc, ip, sp, asr #17 │ │ - ldmdals r1, {r0, r1, r2, r8, ip, pc} │ │ - suble r2, r4, r0, lsl #16 │ │ - muleq r0, sl, r8 │ │ - cmple r0, r5, lsl #16 │ │ - ldrdvc pc, [r4], -sl │ │ - @ instruction: 0xf8dab3ef │ │ - movwls r0, #32776 @ 0x8008 │ │ - @ instruction: 0xf8b7900d │ │ - @ instruction: 0xf5070192 │ │ - @ instruction: 0xf04f7986 │ │ - @ instruction: 0x46063bff │ │ - subeq lr, r0, r0, lsl #22 │ │ - movwlt r0, #16516 @ 0x4084 │ │ - strne lr, [r1, #-2521] @ 0xfffff627 │ │ - strtmi r4, [sl], -r8, lsr #11 │ │ - @ instruction: 0x4642bf38 │ │ - @ instruction: 0xf0a99811 │ │ - stmdacs r0, {r1, r2, r4, r5, r7, r8, r9, fp, sp, lr, pc} │ │ - bl fea5ed20 │ │ - stmdacs r0, {r0, r2} │ │ + strbmi lr, [r8], -fp, ror #15 │ │ + stmiagt ip, {r1, r3, r5, r8, fp, sp, pc}^ │ │ + ldm r0, {r2, r3, r6, r7, r8, lr, pc} │ │ + andcs r0, r0, ip, asr #1 │ │ + ldmdbge r7, {r2, r3, r6, r7, r8, lr, pc} │ │ + teqls r5, r2, lsl fp │ │ + andsne lr, r4, #3457024 @ 0x34c000 │ │ + teqls r8, r0, lsl pc │ │ + eorsls r1, r6, r9, lsl #17 │ │ + stmib sp, {r2, r4, r5, r8, r9, sl, ip, pc}^ │ │ + svclt 0x00287a32 │ │ + mvnscc pc, pc, asr #32 │ │ + @ instruction: 0xf8939137 │ │ + stmdbcs r0, {r2, r3, r4, r5, r6, ip} │ │ + @ instruction: 0xf8ddd075 │ │ + tstcs r4, r8, lsr r0 │ │ + stmib sp, {r1, r6, sl, fp, sp, pc}^ │ │ + vrhadd.s8 q8, q0, q2 │ │ + stmib sp, {r0, r2, r3, r7, r8, ip, sp}^ │ │ + stmib sp, {r1, r6}^ │ │ + stmib sp, {r1, r2, r6}^ │ │ + strtmi r0, [r0], -r8, asr #2 │ │ + stc2 0, cr15, [r2], #32 │ │ + stmdacs r0, {r0, r1, r2, r6, fp, ip, pc} │ │ + strdcs sp, [r0, -r9] │ │ + strcs r2, [r1, #-770] @ 0xfffffcfe │ │ + and r2, ip, r0, lsl #14 │ │ + tstpvs r1, r3, lsl #22 @ p-variant is OBSOLETE │ │ + tstpne r5, r7, lsl #22 @ p-variant is OBSOLETE │ │ + blx fe8fce26 │ │ + stmdaeq r0, {r0, r1, r9, sl, sp}^ │ │ + strvs pc, [r7], -r3, lsl #22 │ │ + strvs pc, [r7, -r3, lsl #22] │ │ + bfieq r4, r3, (invalid: 12:2) │ │ + blx fe91f9ba │ │ + stmdacs r1, {r0, r2, r9, sl, sp} │ │ + ldmeq r0, {r2, r3, r5, r6, r7, r8, ip, lr, pc} │ │ + stcgt 0, cr13, [lr], {223} @ 0xdf │ │ + addgt sl, lr, sl, lsr r8 │ │ + umulleq lr, lr, r4, r8 @ │ │ + blls 4db834 │ │ + ldmib r4, {r2, r6, sp, lr, pc}^ │ │ + ldmdage r7, {r2, r4, r9, ip} │ │ + andcs r9, r0, ip, asr r0 │ │ + stmne r9, {r0, r1, r2, r3, r4, r6, r8, ip, pc} │ │ + svclt 0x0028905d │ │ + mvnscc pc, pc, asr #32 │ │ + @ instruction: 0xf894915e │ │ + stmdbcs r0, {r2, r3, r4, r5, r6, ip} │ │ + strbhi pc, [ip], #0 @ │ │ + mcrrge 1, 0, r2, r2, cr4 │ │ + smlalbteq lr, r4, sp, r9 │ │ + orrcc pc, sp, r0, asr #4 │ │ + subeq lr, r2, sp, asr #19 │ │ + subeq lr, r6, sp, asr #19 │ │ + smlalbteq lr, r8, sp, r9 │ │ + ldmeq r0, {r1, sp, lr, pc} │ │ + strbhi pc, [r1], #64 @ 0x40 @ │ │ + @ instruction: 0xf0084620 │ │ + stmdals r7, {r0, r3, r4, r6, sl, fp, ip, sp, lr, pc}^ │ │ + rscsle r2, r9, r0, lsl #16 │ │ + movwcs r2, #8448 @ 0x2100 │ │ + strcs r2, [r0, -r1, lsl #12] │ │ + blx fe923676 │ │ + stmdaeq r0, {r0, r1, r8, sl, sp}^ │ │ + strpl pc, [r7, #-2819] @ 0xfffff4fd │ │ + strpl pc, [r7, -r3, lsl #22] │ │ + bfieq r4, r3, (invalid: 12:2) │ │ + blx fe91fa42 │ │ + stmdacs r1, {r1, r2, r8, sl, sp} │ │ + blx 11fa02 │ │ + blx 1ffa7e │ │ + ldrmi r1, [r6], -r6, lsl #2 │ │ + @ instruction: 0xf04fe7eb │ │ + @ instruction: 0xf8dd4000 │ │ + eorsls sl, ip, r8, lsr r0 │ │ + svceq 0x0008f813 │ │ + stclge 2, cr2, [r8, #-352]! @ 0xfffffea0 │ │ + ldmib r3, {r1, r3, r5, r9, sl, fp, sp, pc}^ │ │ + stmdacs r0!, {r0, r2, r4, r8, pc} │ │ + tstphi r2, r1, lsl #22 @ p-variant is OBSOLETE │ │ + @ instruction: 0xf100a85c │ │ + tstls sp, r5 │ │ + tstpne fp, r0, asr #4 @ p-variant is OBSOLETE │ │ + smlatbne r8, sp, r8, pc @ │ │ + strbmi fp, [fp], -r8, lsl #30 │ │ + @ instruction: 0xf1059005 │ │ + andls r0, r7, r8 │ │ + andls r1, r6, r8, ror #26 │ │ + stmdbeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ + stmdals sp, {r1, r4, r8, r9, ip, pc} │ │ + @ instruction: 0xf0004580 │ │ + svcls 0x003c8421 │ │ + @ instruction: 0xf8d8a93a │ │ + @ instruction: 0xf1b72010 │ │ + ldrbls r4, [r7], -r0 │ │ + ldmdbcc r5, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc}^ │ │ + @ instruction: 0x4608bf18 │ │ + @ instruction: 0xf04f2a00 │ │ + svclt 0x00480101 │ │ + smlabbmi r0, r2, r0, pc @ │ │ + stmdbcs r1, {r0, r3, r4, r5, r7, r8, ip, sp, pc} │ │ + @ instruction: 0xf8d8d126 │ │ + @ instruction: 0x46492030 │ │ + @ instruction: 0x4628905b │ │ + stc2 0, cr15, [r6], {30} │ │ + strbtne lr, [r8], #-2525 @ 0xfffff623 │ │ + strtmi r4, [r9], pc, asr #12 │ │ + ldrdpl lr, [sl], #-157 @ 0xffffff63 @ │ │ + stmdbcs r2, {r2, r3, r5, r6, r9, fp, ip, pc} │ │ + beq a9fbd8 │ │ + stmib sp, {r0, r4, ip, pc}^ │ │ + ldrtmi r1, [r9], pc, lsl #4 │ │ + @ instruction: 0xf8d8e339 │ │ + @ instruction: 0x46282018 │ │ + @ instruction: 0xf01e4649 │ │ + stclge 12, cr15, [r8, #-452]! @ 0xfffffe3c │ │ + rsbne lr, fp, #3620864 @ 0x374000 │ │ + stmdacs r2, {r0, r4, r5, r8, sl, fp, lr, pc} │ │ + beq a5fc60 │ │ + stmib sp, {r0, r4, r8, ip, pc}^ │ │ + @ instruction: 0xe328020f │ │ + ldmdage r5, {r0, r1, r3, r4, r6, ip, pc}^ │ │ + ldrsbtcs pc, [r8], -r8 @ │ │ + subsls r4, r9, r9, asr #12 │ │ + subsls sl, r8, fp, asr r8 │ │ + ldmib r8, {r3, r5, r9, sl, lr}^ │ │ + @ instruction: 0xf01e4a06 │ │ + stmdals r8!, {r0, r3, r4, r6, sl, fp, ip, sp, lr, pc}^ │ │ + cmple sl, r2, lsl #16 │ │ + andsls r9, r1, fp, ror #16 │ │ + ldmib sp, {r2, r3, r5, r6, fp, ip, pc}^ │ │ + andsls r4, r0, r9, ror #10 │ │ + andls r0, pc, r8, lsr #20 │ │ + ldrsbtge pc, [r8], -sp @ │ │ + @ instruction: 0xf50de30d │ │ + blls 1b8aa74 │ │ + andeq lr, sp, ip, lsl #17 │ │ + ssatmi sl, #27, ip, asr #16 │ │ + @ instruction: 0x4639c032 │ │ + @ instruction: 0x0050f898 │ │ + ldmdage r5, {r3, ip, pc}^ │ │ + ldmdage ip, {r1, r3, r4, r6, ip, pc}^ │ │ + ldmdage fp, {r0, r3, r4, r6, ip, pc}^ │ │ + @ instruction: 0x46489058 │ │ + ldrdcs pc, [r0], -r8 │ │ + @ instruction: 0xb051f898 │ │ + ldc2 0, cr15, [r2], #-120 @ 0xffffff88 │ │ + strbteq lr, [r8], #-2525 @ 0xfffff623 │ │ + @ instruction: 0x276ae9dd │ │ + stmdacs r2, {r2, r3, r5, r6, r9, sl, fp, ip, pc} │ │ + vand d29, d0, d28 │ │ + beq 42e400 │ │ + @ instruction: 0x461546d1 │ │ + vaddl.s8 , d8, d15 │ │ + @ instruction: 0xf8dd0b00 │ │ + sbcs sl, r6, #56 @ 0x38 │ │ + stclvc 5, cr15, [sl], {13} │ │ + stm ip, {r0, r2, r3, r5, r6, r8, r9, fp, ip, pc} │ │ + stmdbge r2!, {r1, r2, r3}^ │ │ + @ instruction: 0x07c0c131 │ │ + strbhi pc, [r5, r0]! @ │ │ + msreq CPSR_, #8, 2 │ │ + bne 45e424 │ │ + andeq lr, r1, r3, ror fp │ │ + addhi pc, r4, r0, lsl #5 │ │ + ldrbmi r2, [lr], -r1, lsl #10 │ │ + svcge 0x0069e2a5 │ │ + ldcvc 5, cr15, [sl], #52 @ 0x34 │ │ + svcgt 0x008e9e6d │ │ + @ instruction: 0x4628905c │ │ + addeq lr, lr, ip, lsl #17 │ │ + @ instruction: 0xf8d84649 │ │ + strbtls r2, [r1], -r0, lsr #32 │ │ + blx fff6788e │ │ + cmneq r8, #3620864 @ 0x374000 │ │ + @ instruction: 0x276ae9dd │ │ + stmdacs r2, {r2, r3, r5, r6, r9, sl, fp, ip, pc} │ │ + beq 45fcf8 │ │ + andls r4, pc, r5, lsl r6 @ │ │ + @ instruction: 0xf8dd461c │ │ + adc sl, r4, #56 @ 0x38 │ │ + stmib sp, {r0, r2, r3, r5, r6, r8, fp, ip, pc}^ │ │ + strbeq r0, [r0, r2, ror #8] │ │ + strbcs lr, [r4, -sp, asr #19]! │ │ + stmib sp, {r1, r3, sl, ip, pc}^ │ │ + @ instruction: 0xf0006166 │ │ + ldmib r8, {r1, r4, r5, r7, r8, r9, sl, pc}^ │ │ + @ instruction: 0x464d7612 │ │ + strls lr, [pc], #-2520 @ 2b850 │ │ + @ instruction: 0xf8984632 │ │ + adcsmi sl, r4, #40 @ 0x28 │ │ + svclt 0x00384638 │ │ + strbmi r4, [r9], -r2, lsr #12 │ │ + stmda r8, {r0, r2, r3, r5, r7, ip, sp, lr, pc} │ │ + @ instruction: 0xf04f42a6 │ │ + svclt 0x00380100 │ │ + stmdacs r0, {r0, r8, sp} │ │ andeq pc, r0, pc, asr #32 │ │ andcs fp, r1, r8, asr #30 │ │ - tstpeq r0, pc, asr #32 @ p-variant is OBSOLETE │ │ - smlabtcs r1, r8, pc, fp @ │ │ - @ instruction: 0x3c0c1a08 │ │ - bleq ab548 │ │ - stmdbeq ip, {r0, r3, r8, ip, sp, lr, pc} │ │ - stmdacs r1, {r6, r7, r9, ip, sp, pc} │ │ - stmdblt r8, {r0, r1, r2, r3, r4, r6, r7, ip, lr, pc} │ │ - ldrtmi lr, [r3], sl, asr #32 │ │ - stcls 14, cr9, [r9], {13} │ │ - movwls lr, #31197 @ 0x79dd │ │ - rsble r2, pc, r0, lsl #28 │ │ - addeq lr, fp, r7, lsl #22 │ │ - strls r3, [sp], -r1, lsl #28 │ │ - @ instruction: 0x7198f8d0 │ │ - @ instruction: 0xf04fe7c5 │ │ - strcs r0, [r0, -r0, lsl #22] │ │ - andsne lr, r4, #212, 18 @ 0x350000 │ │ - ldmdals r0, {r1, r6, r8, sl, fp, sp, pc} │ │ + strmi fp, [r8], -r8, lsl #30 │ │ + subsle r2, sp, r0, lsl #16 │ │ + bleq 4a8184 │ │ + vabal.s8 q9, d8, d1 │ │ + ldrbmi r0, [ip], -r0, lsl #22 │ │ + stmdbls sp!, {r2, r4, r5, r6, sp, lr, pc}^ │ │ + cmneq r2, #3358720 @ 0x334000 │ │ + stmib sp, {r6, r7, r8, r9, sl}^ │ │ + stmib sp, {r2, r5, r6, r8, r9, sl, sp}^ │ │ + @ instruction: 0xf0006166 │ │ + andcs r8, r8, r4, lsl #15 │ │ + @ instruction: 0xf0ac461e │ │ + stmdacs r0, {r1, r2, r4, r5, r7, r8, r9, sl, fp, sp, lr, pc} │ │ + eorhi pc, r0, r1 │ │ + tstpmi r0, pc, asr #32 @ p-variant is OBSOLETE │ │ + b fe0838c8 │ │ + subvs r0, r1, sl, lsl #2 │ │ + tstcs r0, r4, lsl #12 │ │ + strtmi r2, [r8], -r8, lsl #4 │ │ + smlabtcs r0, sp, r9, lr │ │ + andscs r4, r0, #51380224 @ 0x3100000 │ │ + @ instruction: 0xf01e4623 │ │ + @ instruction: 0x4620fc31 │ │ + svc 0x007ef0ac │ │ + strbteq lr, [r8], #-2525 @ 0xfffff623 │ │ + @ instruction: 0xf0402801 │ │ + ldmib sp, {r3, r4, r7, pc}^ │ │ + @ instruction: 0xf8dd106a │ │ + andsls sl, r1, r8, lsr r0 │ │ + strmi r9, [sp], -ip, ror #16 │ │ + beq 24f934 │ │ + eors r9, r5, #15 │ │ + mlasge r0, r8, r8, pc @ │ │ + ldmib r8, {r3, r5, r6, r8, sl, fp, sp, pc}^ │ │ + ldmib r8, {r3, r8, r9, sp}^ │ │ + @ instruction: 0xf08a010a │ │ + strls r0, [sl], #-1537 @ 0xfffff9ff │ │ + subeq lr, r3, sp, lsl #17 │ │ + strtmi r4, [r1], -r8, lsr #12 │ │ + stc2l 0, cr15, [ip, #-36]! @ 0xffffffdc │ │ + blvc ff568d50 │ │ + @ instruction: 0x0668e9dd │ │ + ldmdaeq r2, {r0, r1, r3, r4, r7, fp, sp, lr, pc} │ │ + @ instruction: 0xd12c2801 │ │ + strmi r0, [sp], -r8, lsl #20 │ │ + bleq 426064 │ │ + bleq 4a8234 │ │ + @ instruction: 0xf2c89411 │ │ + and r0, r0, #0, 22 │ │ + andeq pc, r1, sl, lsl #1 │ │ + smlabbeq r1, fp, r0, pc @ │ │ + strtmi r4, [r3], -sl, asr #12 │ │ + andne lr, r2, sp, asr #19 │ │ + stmdbls sl, {r3, r5, r9, sl, lr} │ │ + strvc lr, [r0], -sp, asr #19 │ │ + cdp2 0, 2, cr15, cr2, cr9, {0} │ │ + cmncs fp, #3620864 @ 0x374000 │ │ + strbteq lr, [r8], #-2525 @ 0xfffff623 │ │ + cmnle ip, r1, lsl #16 │ │ + vadd.i8 , q0, q13 │ │ + andsls r0, r1, #17408 @ 0x4400 │ │ + bleq 68490 │ │ + beq 3d188 │ │ + movweq lr, #63949 @ 0xf9cd │ │ + ldrsbtge pc, [r8], -sp @ │ │ + stmdbeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ + mcrcs 1, 0, lr, cr0, cr0, {7} │ │ + addshi pc, r2, r0 │ │ + @ instruction: 0xf0402908 │ │ + ldmdavs r0!, {r1, r2, r5, r7, r8, r9, sl, pc}^ │ │ + tstpmi r0, pc, asr #32 @ p-variant is OBSOLETE │ │ + ldrdls pc, [r0], -r6 │ │ + svcmi 0x0000f1b7 │ │ + streq lr, [r1], -r0, lsl #21 │ │ + ldmdage sl!, {r0, r1, r2, ip, lr, pc} │ │ + ldrtmi r4, [r3], -sl, asr #12 │ │ + blx fe8e79ce │ │ + @ instruction: 0xf0002800 │ │ + @ instruction: 0xf1bb8120 │ │ + vmax.f32 d16, d0, d1 │ │ + @ instruction: 0xf8cd877f │ │ + ldmdbge r5, {r5, r7, r8, ip, pc}^ │ │ + blmi 1ae60f8 │ │ + stmdahi r0!, {r1, r3, r6, r9, sl, lr} │ │ + rsbls r4, ip, r3, lsr r6 │ │ + andls r9, r0, r7, lsl #16 │ │ + @ instruction: 0x9669a85c │ │ + cdp2 0, 3, cr15, cr14, cr10, {0} │ │ + @ instruction: 0x5174f89d │ │ + bleq 4a82e0 │ │ + @ instruction: 0xf2c89e5c │ │ + ldrbmi r0, [lr, #-2816] @ 0xfffff500 │ │ + adchi pc, r6, r0, asr #32 │ │ + stmdbeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf00007e8 │ │ + @ instruction: 0xf1ba81a2 │ │ + @ instruction: 0xf0000f00 │ │ + @ instruction: 0xf8dd81d5 │ │ + stclge 0, cr10, [r8, #-224]! @ 0xffffff20 │ │ + @ instruction: 0xf1b7990a │ │ + @ instruction: 0xf0404f00 │ │ + ldcls 1, cr8, [r2], {2} │ │ + @ instruction: 0xf8dde0a2 │ │ + movwlt sl, #16440 @ 0x4038 │ │ + ldmdbge ip, {r0, r1, r3, r5, r6, r8, r9, fp, ip, pc}^ │ │ + bge 1651bd0 │ │ strtmi r9, [r8], -r0 │ │ - ldc2 0, cr15, [r8], #112 @ 0x70 │ │ - andsne lr, r4, #212, 18 @ 0x350000 │ │ - @ instruction: 0x46234630 │ │ - bpl 6989c │ │ - stc2 0, cr15, [r0, #-112]! @ 0xffffff90 │ │ - strbmi r9, [r8, #-2098] @ 0xfffff7ce │ │ - addhi pc, r6, r0, asr #32 │ │ - bcs 95a88 │ │ - cmpphi sl, r0, asr #4 @ p-variant is OBSOLETE │ │ - stmib sp, {r0, r1, r6, fp, ip, pc}^ │ │ - bge 8afaac │ │ - stmdahi r1, {r1, r2, r3, r8, r9, fp, ip, pc} │ │ - andls r9, r2, ip, lsl #16 │ │ - andls r9, r3, sp, lsl #16 │ │ - cmpls ip, sl, asr #16 │ │ - andls r4, r4, r1, lsr #12 │ │ - stmib sp, {r4, r5, r9, sl, lr}^ │ │ - @ instruction: 0xf01eb700 │ │ - ldmdals r2!, {r0, r2, r3, r6, r8, fp, ip, sp, lr, pc} │ │ - cmnle ip, r8, asr #10 │ │ - ldrdcc lr, [r2], #-157 @ 0xffffff63 │ │ - beq 66b5d8 │ │ - ldrdlt pc, [ip], -sp @ │ │ - stmdals sl, {r4, ip, pc} │ │ - @ instruction: 0xf47f4582 │ │ - add sl, sl, ip, ror pc │ │ - subeq lr, fp, fp, lsl #22 │ │ - @ instruction: 0xf8dd9c09 │ │ - mrcge 0, 1, r9, cr2, cr12, {0} │ │ - eorsne pc, r0, r7, lsl r8 @ │ │ - stmdbcs r2, {r3, r9, fp, ip, pc} │ │ - tstphi fp, r0, asr #32 @ p-variant is OBSOLETE │ │ - sbceq lr, r0, r7, lsl #22 │ │ - teqlt r9, r1, lsl #17 │ │ - @ instruction: 0xf0402901 │ │ - ldmib r0, {r2, r8, pc}^ │ │ - stmib sp, {r2, ip}^ │ │ - and r1, r7, ip │ │ - @ instruction: 0xf1b16941 │ │ - vmaxnm.f32 , q8, │ │ - stmdbvs r0, {r1, r3, r4, r5, r6, r7, pc} │ │ - andls r9, ip, sp, lsl #2 │ │ - vaddl.s8 q9, d8, d12 │ │ - eorsls r0, r2, r0 │ │ - @ instruction: 0xf0024630 │ │ - blls 26ea24 │ │ - @ instruction: 0xf04f2700 │ │ - ldr r0, [r9, r1, lsl #22] │ │ - bleq 6b358 │ │ - cdpge 7, 3, cr2, cr2, cr0, {0} │ │ - stmdals pc, {r2, r4, r7, r8, r9, sl, sp, lr, pc} @ │ │ - ldmdbge r2!, {r0, r2, sp, lr} │ │ - strmi ip, [r8], -ip, ror #25 │ │ - stclgt 0, cr12, [ip], #944 @ 0x3b0 │ │ - rscgt r4, ip, r4, lsr #13 │ │ - smlalseq lr, ip, ip, r8 │ │ - stmdage r2, {r2, r3, r4, r5, r6, r7, lr, pc}^ │ │ - blx f6b2b0 │ │ - strbmi lr, [r3, #-2525] @ 0xfffff623 │ │ - @ instruction: 0x4626b135 │ │ - bleq 16d3a4 │ │ - bl ff76b404 │ │ - mvnsle r3, r1, lsl #26 │ │ - stmdacs r0, {r1, r6, fp, ip, pc} │ │ + mcrr2 0, 0, pc, r4, cr9 @ │ │ + @ instruction: 0xf89d9c68 │ │ + ldrbmi r5, [ip, #-420] @ 0xfffffe5c │ │ + cmnphi r6, r0, asr #32 @ p-variant is OBSOLETE │ │ + @ instruction: 0xf00007e8 │ │ + stclge 1, cr8, [r8, #-452]! @ 0xfffffe3c │ │ + andls r2, r1, r0 │ │ + @ instruction: 0x46284631 │ │ + movwcs r2, #521 @ 0x209 │ │ + blx 1d67ac6 │ │ + strbteq lr, [r8], #-2525 @ 0xfffff623 │ │ + @ instruction: 0xf0002801 │ │ + stccs 2, cr8, [r0], {62} @ 0x3e │ │ + strcs sp, [r1, #-478] @ 0xfffffe22 │ │ + @ instruction: 0xf8dde181 │ │ + @ instruction: 0xf10da038 │ │ + @ instruction: 0x2c000968 │ │ + msrhi SPSR_sc, r0 │ │ + @ instruction: 0x4628a958 │ │ + @ instruction: 0xff32f009 │ │ + @ instruction: 0x51a4f89d │ │ + stclls 0, cr2, [r8], #-68 @ 0xffffffbc │ │ + andeq pc, r0, r8, asr #5 │ │ + @ instruction: 0xf0404284 │ │ + strbeq r8, [r8, r7, lsr #1]! │ │ + msrhi SPSR_sx, r0 │ │ + strcs r9, [ip], -r8, lsl #16 │ │ + @ instruction: 0xf04f2800 │ │ + svclt 0x00180008 │ │ + svclt 0x0018200b │ │ + @ instruction: 0xf1bb260e │ │ + svclt 0x00080f00 │ │ + stmdage r8!, {r1, r2, r9, sl, lr}^ │ │ + rscs sp, ip, r7, lsl #2 │ │ + bleq 4a83b0 │ │ + vabal.s8 q9, d8, d1 │ │ + cmp r1, r0, lsl #22 │ │ + tstcs r0, r8, ror #16 │ │ + tstls r1, r2, lsr r6 │ │ + stmdbls sl, {r8, r9, sp} │ │ + blx de7b42 │ │ + blvc ff568f00 │ │ + strbteq lr, [r8], #-2525 @ 0xfffff623 │ │ + stmeq r8, {r0, r1, r3, r4, r7, fp, sp, lr, pc} │ │ + @ instruction: 0xf0002801 │ │ + stccs 2, cr8, [r0], {4} │ │ + msrhi CPSR_fxc, r0 │ │ + streq lr, [pc, #-2520] @ 2b10c │ │ + strtmi r4, [sl], -r1, lsr #12 │ │ + svclt 0x003842ab │ │ + @ instruction: 0x461c461a │ │ + cdp 0, 12, cr15, cr0, cr12, {5} │ │ + @ instruction: 0xf04f42a5 │ │ + svclt 0x00880100 │ │ + stmdacs r0, {r0, r8, sp} │ │ + andeq pc, r0, pc, asr #32 │ │ + andcs fp, r1, r8, asr #31 │ │ + strmi fp, [r8], -r8, lsl #30 │ │ + sbcsle r2, r3, r1, lsl #16 │ │ + ldmdbge r8, {r3, r5, r6, fp, sp, pc}^ │ │ + @ instruction: 0x465b463a │ │ + cdp2 0, 13, cr15, cr14, cr9, {0} │ │ + @ instruction: 0x51a4f89d │ │ + bleq 4a8424 │ │ + vqdmulh.s d25, d8, d0[6] │ │ + ldrbmi r0, [ip, #-2816] @ 0xfffff500 │ │ + rscshi pc, r8, r0, asr #32 │ │ + stmdage r8!, {r3, r5, r6, r7, r8, r9, sl}^ │ │ + rscs sp, r1, r1, asr #3 │ │ + @ instruction: 0xf10d9905 │ │ + bls 17ae0e0 │ │ + stmvc r8, {r0, r4, r9, ip, pc} │ │ + bls 180db6c │ │ + andmi lr, r0, r1, asr #20 │ │ + andls r9, pc, r0, lsl r2 @ │ │ + @ instruction: 0x462ce0f5 │ │ + @ instruction: 0xad68990a │ │ + andcs r2, ip, #0 │ │ + strtmi r9, [r8], -r1 │ │ + @ instruction: 0xf01e2300 │ │ + ldmib sp, {r0, r1, r2, r5, r6, r7, r9, fp, ip, sp, lr, pc}^ │ │ + bls 1b37d14 │ │ + @ instruction: 0x1668e9dd │ │ + @ instruction: 0xf0402900 │ │ + cdpcs 1, 0, cr8, cr0, cr8, {6} │ │ + mrcge 4, 1, APSR_nzcv, cr10, cr15, {1} │ │ + @ instruction: 0xf0402b08 │ │ + ldmdavs r3!, {r2, r3, r5, r7, r9, sl, pc}^ │ │ + ldmdavs r7!, {r0, r2, r5, r9, sl, lr} │ │ + strmi pc, [r0], -pc, asr #32 │ │ + strne lr, [r8], #-2520 @ 0xfffff628 │ │ + bne 1e7bd60 │ │ + tsteq r4, r3, ror fp │ │ + @ instruction: 0x9c0adbdb │ │ + vpmax.s8 d18, d0, d1 │ │ + stmib sp, {r1, r4, r7, r9, sl, pc}^ │ │ + ldmdbge r5, {r1, r3, r5, r6, r9}^ │ │ + ldrtmi r9, [sl], -r8, ror #14 │ │ + rsbls r8, ip, r0, lsl #16 │ │ + andls r9, r0, r7, lsl #16 │ │ + cmnls r9, #92, 16 @ 0x5c0000 │ │ + stc2l 0, cr15, [ip, #-40] @ 0xffffffd8 │ │ + @ instruction: 0xf89d9e5c │ │ + ldrbmi r5, [lr, #-372] @ 0xfffffe8c │ │ + orrshi pc, r4, r0, asr #32 │ │ + ldcls 6, cr4, [r2], {33} @ 0x21 │ │ + stclge 7, cr0, [r8, #-928]! @ 0xfffffc60 │ │ + cmn r6, r2, asr #3 │ │ + bls 1ad1ff0 │ │ + stmvc r8, {r0, r4, r9, ip, pc} │ │ + bls 1b0dc04 │ │ + b 1090424 │ │ + vhadd.s8 d20, d0, d0 │ │ + andls r0, pc, r1, lsl fp @ │ │ + bleq 68710 │ │ + @ instruction: 0xf1bae0b8 │ │ + @ instruction: 0xf8dd0f00 │ │ + stmdbls sl, {r3, r4, r5, sp, pc} │ │ + bleq 4a8500 │ │ + stmdbeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ + bleq 68728 │ │ + sbcs sp, r9, r3, lsl #2 │ │ + stmdbeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ + andcs r9, r0, sl, lsl #18 │ │ + andls r2, r1, ip, lsl #4 │ │ + movwcs r4, #1576 @ 0x628 │ │ + blx fe2e7c98 │ │ + @ instruction: 0x376ae9dd │ │ + ldmib sp, {r2, r3, r5, r6, sl, fp, ip, pc}^ │ │ + stmdacs r1, {r3, r5, r6, r9, sl} │ │ + mrshi pc, (UNDEF: 75) @ │ │ + @ instruction: 0xf43f2e00 │ │ + blcs 2573ac │ │ + strbhi pc, [pc], -r0, asr #32 @ │ │ + @ instruction: 0xf04f6872 │ │ + @ instruction: 0xf8d64300 │ │ + ldmib r8, {ip, pc}^ │ │ + b fe0ac06c │ │ + bl fee6d45c │ │ + bl 1dabc54 │ │ + blle ff66bc5c │ │ + @ instruction: 0x464aa83a │ │ + @ instruction: 0xf0084633 │ │ + stmdacs r0, {r0, r1, r2, r6, r9, fp, ip, sp, lr, pc} │ │ + stccs 0, cr13, [r1], {210} @ 0xd2 │ │ + ldrhi pc, [pc], -r0, asr #4 │ │ + asrls pc, sp, #17 @ │ │ + stmib sp, {r0, r2, r4, r6, r8, fp, sp, pc}^ │ │ + strbmi r7, [sl], -sl, ror #8 │ │ + @ instruction: 0x46338838 │ │ + stmdals r7, {r2, r3, r5, r6, ip, pc} │ │ + ldmdage ip, {ip, pc}^ │ │ + @ instruction: 0xf00a9669 │ │ + cdpls 12, 5, cr15, cr12, cr5, {7} │ │ + @ instruction: 0x5174f89d │ │ + @ instruction: 0xf040455e │ │ + stmdbls sl, {r0, r1, r3, r5, r8, pc} │ │ + @ instruction: 0xf10d07e8 │ │ + @ instruction: 0xad680968 │ │ + @ instruction: 0xe10ed1b7 │ │ + tstcs r0, r8, ror #16 │ │ + tstls r1, r2, lsr r6 │ │ + stmdbls sl, {r8, r9, sp} │ │ + blx 1067d2c │ │ + blvc ff5690ec │ │ + strbteq lr, [r8], #-2525 @ 0xfffff623 │ │ + stmeq r8, {r0, r1, r3, r4, r7, fp, sp, lr, pc} │ │ + @ instruction: 0xf0402800 │ │ + @ instruction: 0xb3b4810e │ │ + ldreq lr, [r2, #-2520] @ 0xfffff628 │ │ + strtmi r4, [sl], -r1, lsr #12 │ │ + svclt 0x003842ab │ │ + @ instruction: 0x461c461a │ │ + stcl 0, cr15, [ip, #688] @ 0x2b0 │ │ + @ instruction: 0xf04f42a5 │ │ + svclt 0x00380100 │ │ + stmdacs r0, {r0, r8, sp} │ │ + andeq pc, r0, pc, asr #32 │ │ + andcs fp, r1, r8, asr #30 │ │ + strmi fp, [r8], -r8, lsl #30 │ │ + bicsle r2, r5, r0, lsl #16 │ │ + ldmdbge r8, {r3, r5, r6, fp, sp, pc}^ │ │ + @ instruction: 0x465b463a │ │ + stc2l 0, cr15, [sl, #36]! @ 0x24 │ │ + @ instruction: 0x51a4f89d │ │ + bleq 4a860c │ │ + vqdmulh.s d25, d8, d0[6] │ │ + ldrbmi r0, [ip, #-2816] @ 0xfffff500 │ │ + strbeq sp, [r8, r4, lsl #2]! │ │ + bicle sl, r4, r8, ror #16 │ │ + eor r2, r0, r0, lsl #10 │ │ + bls 1ad213c │ │ + stmvc r8, {r0, r4, r9, ip, pc} │ │ + bls 1b0dd50 │ │ + b 1090570 │ │ + andls r4, pc, r0 │ │ + strcs lr, [r1, #-22] @ 0xffffffea │ │ + strcs lr, [r0, #-15] │ │ + @ instruction: 0xf8dd465e │ │ + stmdage r2!, {r3, r4, r5, sp, pc}^ │ │ + blx febe7db8 │ │ + stmdacs r0, {r1, r5, r6, fp, ip, pc} │ │ + stmdals r3!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ + mcr 0, 3, pc, cr0, cr0, {3} @ │ │ + ands r4, fp, r4, lsr r6 │ │ + vrshl.s8 d18, d0, d0 │ │ + @ instruction: 0xf2c80b11 │ │ + ldrbmi r0, [ip], -r0, lsl #22 │ │ + @ instruction: 0xf01ca862 │ │ + stmdals r2!, {r0, r2, r3, r4, r7, r9, fp, ip, sp, lr, pc}^ │ │ + svclt 0x001c2800 │ │ + @ instruction: 0xf0709863 │ │ + ldmib sp, {r4, r6, r9, sl, fp, sp, lr, pc}^ │ │ + ldmdage ip, {r4, r8, r9, sl, sp, lr}^ │ │ + blx fe4e7df0 │ │ + stmdacs r0, {r2, r3, r4, r6, fp, ip, pc} │ │ + ldmdals sp, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ + mcr 0, 2, pc, cr4, cr0, {3} @ │ │ + ldrvs lr, [r0, -sp, asr #19] │ │ + ldrbmi sl, [ip, #-3626] @ 0xfffff1d6 │ │ + sbchi pc, r4, r0, asr #32 │ │ + @ instruction: 0x07e89b12 │ │ + ldmdaeq r8, {r3, r8, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf47fad68 │ │ + adcs sl, sp, lr, lsl #25 │ │ + ldrsbtge pc, [r8], -sp @ │ │ + stmdbls sl, {r3, r5, r6, r8, sl, fp, sp, pc} │ │ + svcmi 0x0000f1b7 │ │ + ldcls 1, cr13, [r2], {4} │ │ + stmdbls sl, {r0, r1, r3, r6, sp, lr, pc} │ │ + stmdbeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ + andcs r2, r8, #0 │ │ + strtmi r9, [r8], -r1 │ │ + @ instruction: 0xf01e2300 │ │ + ldmib sp, {r0, r1, r4, r5, r7, r8, fp, ip, sp, lr, pc}^ │ │ + stclls 7, cr3, [ip], #-424 @ 0xfffffe58 │ │ + @ instruction: 0x0668e9dd │ │ + cmnle r4, r0, lsl #16 │ │ + @ instruction: 0xf43f2e00 │ │ + blcs 257200 │ │ + ldrbhi pc, [r9, #-64]! @ 0xffffffc0 @ │ │ + @ instruction: 0xf04f6872 │ │ + @ instruction: 0xf8d64300 │ │ + ldmib r8, {ip, pc}^ │ │ + b fe0ac220 │ │ + bl fec2d608 │ │ + bl 1c6be24 │ │ + blle ff6abe1c │ │ + @ instruction: 0x464aa83a │ │ + @ instruction: 0xf0084633 │ │ + stmdacs r0, {r0, r4, r5, r6, r8, fp, ip, sp, lr, pc} │ │ + stccs 0, cr13, [r1], {211} @ 0xd3 │ │ + strbhi pc, [r9, #-576] @ 0xfffffdc0 @ │ │ + asrls pc, sp, #17 @ │ │ + stmib sp, {r0, r2, r4, r6, r8, fp, sp, pc}^ │ │ + strbmi r7, [sl], -sl, ror #8 │ │ + @ instruction: 0x46338838 │ │ + stmdals r7, {r2, r3, r5, r6, ip, pc} │ │ + ldmdage ip, {ip, pc}^ │ │ + @ instruction: 0xf00a9669 │ │ + cdpls 12, 5, cr15, cr12, cr15, {0} │ │ + @ instruction: 0x5174f89d │ │ + cmple r5, lr, asr r5 │ │ + strbeq r9, [r8, sl, lsl #18]! │ │ + stmdbeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ + @ instruction: 0xd1b9ad68 │ │ + stmdbls sl, {r0, r3, r4, r5, sp, lr, pc} │ │ + andcs sl, r0, r8, ror #26 │ │ + andls r2, r1, r8, lsl #4 │ │ + movwcs r4, #1576 @ 0x628 │ │ + @ instruction: 0xf96af01e │ │ + ldrdcc lr, [sl], #-157 @ 0xffffff63 @ │ │ + ldmib sp, {r2, r3, r5, r6, r9, fp, ip, pc}^ │ │ + stmdbcs r0, {r3, r5, r6, r9, sl, ip} │ │ + cdpcs 1, 0, cr13, cr0, cr11, {2} │ │ + ldcge 4, cr15, [lr], #252 @ 0xfc │ │ + @ instruction: 0xf0402b08 │ │ + ldmdavs r3!, {r4, r5, r8, sl, pc}^ │ │ + @ instruction: 0xf04f6837 │ │ + ldmib r8, {r9, sl, lr}^ │ │ + rsbsmi r1, r3, sl, lsl #10 │ │ + bl 1d72db0 │ │ + blle ff7ac29c │ │ + vpmax.s8 d18, d0, d1 │ │ + stmib sp, {r3, r4, r8, sl, pc}^ │ │ + ldmdbge r5, {r1, r3, r5, r6, r9}^ │ │ + ldrtmi r9, [sl], -r8, ror #14 │ │ + rsbls r8, ip, r0, lsl #16 │ │ + andls r9, r0, r7, lsl #16 │ │ + cmnls r9, #92, 16 @ 0x5c0000 │ │ + blx ff4e7eda │ │ + @ instruction: 0xf89d9e5c │ │ + ldrbmi r5, [lr, #-372] @ 0xfffffe8c │ │ + stmdbls sl, {r1, r3, r4, r8, ip, lr, pc} │ │ + stclge 7, cr0, [r8, #-928]! @ 0xfffffc60 │ │ + strcs sp, [r0, #-455] @ 0xfffffe39 │ │ + stmib sp, {r0, r2, r4, r7, sl, sp, lr, pc}^ │ │ + beq 63db0c │ │ + andls r4, pc, sp, lsl r6 @ │ │ + ldmib sp, {r0, r1, r2, r4, r5, r8, r9, sl, sp, lr, pc}^ │ │ + andsls r1, r1, sl, rrx │ │ + strmi r9, [sp], -ip, ror #16 │ │ + beq 24ff20 │ │ + ldrmi lr, [sp], -r7, lsr #14 │ │ + stmib sp, {r3, r4, r9, fp}^ │ │ + @ instruction: 0xe67cb710 │ │ + stmdbeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ + bls 17d2308 │ │ + stmvc r8, {r0, r4, r9, ip, pc} │ │ + bls 180df20 │ │ + andmi lr, r0, r1, asr #20 │ │ + andls r9, pc, r0, lsl r2 @ │ │ + stmib sp, {r0, r2, r3, r4, r8, r9, sl, sp, lr, pc}^ │ │ + bfi r2, r0, #0, #31 │ │ + @ instruction: 0xf006a842 │ │ + ldcls 8, cr15, [ip, #-84]! @ 0xffffffac │ │ + svcmi 0x0000f1b5 │ │ + strhi pc, [r0], #-64 @ 0xffffffc0 │ │ + ands r4, sp, sp, asr r6 │ │ + and r9, r0, r2, lsl r5 │ │ + stmdage r2, {r2, r3, r4, r6, r9, sl, lr}^ │ │ + @ instruction: 0xf808f006 │ │ + @ instruction: 0x46259e3c │ │ + svcmi 0x0000f1b6 │ │ + ldmib sp, {r1, r4, ip, lr, pc}^ │ │ + cmplt pc, sp, lsr r7 @ │ │ + streq pc, [r4], #-264 @ 0xfffffef8 │ │ + stceq 8, cr15, [r4], {84} @ 0x54 │ │ + svclt 0x001c2800 │ │ + @ instruction: 0xf0ac6820 │ │ + strcc lr, [ip], #-3140 @ 0xfffff3bc │ │ + mvnsle r3, r1, lsl #30 │ │ + @ instruction: 0x4640b116 │ │ + ldc 0, cr15, [ip], #-688 @ 0xfffffd50 │ │ + @ instruction: 0x4633e9dd │ │ + @ instruction: 0xf104b156 │ │ + ldmdavs r8!, {r4, r8, r9, sl} │ │ + svclt 0x001c2800 │ │ + @ instruction: 0xf0ac6878 │ │ + @ instruction: 0x3730ec32 │ │ + mvnsle r3, r1, lsl #28 │ │ + stmdacs r0, {r1, r4, r5, fp, ip, pc} │ │ qadd16mi fp, r0, ip │ │ - b feceb504 │ │ - @ instruction: 0xf1b0981a │ │ - rsbsle r4, r9, r0, lsl #30 │ │ - @ instruction: 0xf01ca818 │ │ - ldmdage r2, {r0, r1, r3, r4, r7, r9, fp, ip, sp, lr, pc} │ │ - stc2l 0, cr15, [r2, #-120]! @ 0xffffff88 │ │ - pop {r0, r2, r3, r6, ip, sp, pc} │ │ - stmdals pc, {r4, r5, r6, r7, r8, r9, sl, fp, pc} @ │ │ - eors r6, r6, r1 │ │ - svcls 0x000f9832 │ │ - beq 186b6bc │ │ - bls d55758 │ │ - stmdals r2, {r3, r4, r5, sp, lr}^ │ │ - stmdacs r0, {r0, r2, r4, r5, r8, r9, fp, ip, pc} │ │ - adcsvs r6, sl, r9, ror r0 │ │ - @ instruction: 0xf8dd60fb │ │ - svclt 0x001cb02c │ │ - @ instruction: 0xf0a99843 │ │ - stmdals pc, {r4, r7, r9, fp, sp, lr, pc} @ │ │ - stceq 1, cr15, [r8], {13} │ │ - @ instruction: 0xf8d04631 │ │ - ldrtmi r8, [r0], -r0 │ │ - strhteq lr, [ip], #140 @ 0x8c │ │ - ldm ip!, {r2, r3, r5, r6, r7, lr, pc} │ │ + stc 0, cr15, [r8], #-688 @ 0xfffffd50 │ │ + @ instruction: 0x462de9dd │ │ + stcne 1, cr11, [r7, #-344]! @ 0xfffffea8 │ │ + stceq 8, cr15, [r4], {87} @ 0x57 │ │ + svclt 0x001c2800 │ │ + @ instruction: 0xf0ac6838 │ │ + smladcc ip, lr, ip, lr │ │ + mvnsle r3, r1, lsl #28 │ │ + stmdacs r0, {r2, r3, r5, fp, ip, pc} │ │ + qadd16mi fp, r0, ip │ │ + ldc 0, cr15, [r4], {172} @ 0xac │ │ + ldrbmi r9, [sp, #-2834] @ 0xfffff4ee │ │ + ldrhi pc, [r5], #-0 │ │ + ldclt 0, cr15, [r4], {-0} │ │ + andmi pc, r0, pc, asr #32 │ │ + eorls r4, ip, r6, lsr #12 │ │ + stcgt 0, cr14, [lr], {6} │ │ + addgt sl, lr, sl, lsr #16 │ │ + umulleq lr, lr, r4, r8 @ │ │ + cdpls 0, 1, cr12, cr2, cr14, {4} │ │ + svceq 0x0008f816 │ │ + ldcge 2, cr2, [sl, #-352]! @ 0xfffffea0 │ │ + @ instruction: 0xa115e9d6 │ │ + blx 76062 │ │ + vabd.s8 d26, d0, d2 │ │ + stmdage r2, {r0, r1, r3, r4, r8, ip}^ │ │ + smlatbne r8, sp, r8, pc @ │ │ + strmi fp, [r6], -r8, lsl #30 │ │ + andls r1, r8, r8, ror #26 │ │ + ldrls r9, [r2], -sp, lsl #14 │ │ + @ instruction: 0xf00045ba │ │ + stmdals ip!, {r0, r2, r3, r5, r6, r8, r9, pc} │ │ + cmpls r7, ip, asr r9 │ │ + @ instruction: 0x1010f8da │ │ + blmi 686cc │ │ + stmib sp, {r1, r3, r5, fp, sp, pc}^ │ │ + svclt 0x00186955 │ │ + stmdbcs r0, {r0, r1, r7, r9, sl, lr} │ │ + andeq pc, r1, pc, asr #32 │ │ + @ instruction: 0xf081bf48 │ │ + bicslt r4, r8, r0 │ │ + @ instruction: 0xd12d2801 │ │ + ldrsbtcs pc, [r0], -sl @ │ │ + strbmi r4, [r9], -r8, lsr #12 │ │ + msrlt SPSR_fs, sp, asr #17 │ │ + @ instruction: 0xffeaf01d │ │ + @ instruction: 0x4628993a │ │ + ldmdapl fp!, {r0, r2, r3, r4, r6, r7, r8, fp, sp, lr, pc} │ │ + eorsvs lr, sp, #3620864 @ 0x374000 │ │ + teqle ip, r2, lsl #18 │ │ + bleq 4a894c │ │ + tstcs r8, pc, asr #20 │ │ + andne lr, pc, #3358720 @ 0x334000 │ │ + @ instruction: 0xf2c84634 │ │ + @ instruction: 0xe3260b00 │ │ + @ instruction: 0x2018f8da │ │ + strbmi r4, [r9], -r8, lsr #12 │ │ + @ instruction: 0xffd2f01d │ │ + stmiaeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ + eorsne lr, sp, #3620864 @ 0x374000 │ │ + @ instruction: 0x0121e898 │ │ + cmple r9, r2, lsl #16 │ │ + andscs lr, r8, pc, asr #20 │ │ + stmib sp, {r2, r3, r9, sl, lr}^ │ │ + ands r0, r9, pc, lsl #4 │ │ + @ instruction: 0xf8daa855 │ │ + subsls r2, r9, r8, lsr r0 │ │ + subsls sl, r8, fp, asr r8 │ │ + strbmi r4, [r9], -r8, lsr #12 │ │ + ldmib sl, {r0, r4, sl, ip, pc}^ │ │ + @ instruction: 0xf8cd4806 │ │ + @ instruction: 0xf01db16c │ │ + ldmdals sl!, {r0, r2, r4, r5, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ + cmple lr, r2, lsl #16 │ │ + ldrsbtmi lr, [sp], -sp │ │ + ldmdapl fp!, {r0, r2, r3, r4, r6, r7, r8, fp, sp, lr, pc} │ │ + b 14100f4 │ │ + andls r2, pc, r8, lsl r0 @ │ │ + bleq 4a89bc │ │ + bleq 68be0 │ │ + stmib sp, {r2, r4, r5, r6, r7, r9, sp, lr, pc}^ │ │ + bge 18c4a5c │ │ + smlawbeq r2, r2, r8, lr │ │ + blls 1016624 │ │ + stmdbge r2!, {r1, r3, r4, r6, r8, ip, pc}^ │ │ + ldmdbge fp, {r0, r3, r4, r6, r8, ip, pc}^ │ │ + @ instruction: 0x46499158 │ │ + @ instruction: 0xf8da9367 │ │ + @ instruction: 0xf89a2000 │ │ + @ instruction: 0xf89ab050 │ │ + @ instruction: 0xf01d8051 │ │ + ldmib sp, {r0, r1, r2, r3, r7, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ + ldmib sp, {r1, r3, r4, r5, r8, sl}^ │ │ + mrcls 7, 1, r2, cr14, cr12, {1} │ │ + cmple r2, r2, lsl #16 │ │ + bleq 4a8a00 │ │ + @ instruction: 0x46900a10 │ │ + vaddl.s8 , d8, d15 │ │ + sbc r0, r2, #0, 22 │ │ + ldclvc 5, cr15, [r6], {13} │ │ + stm ip, {r0, r1, r2, r3, r4, r5, r8, r9, fp, ip, pc} │ │ + stmdbge r8!, {r1, r2, r3}^ │ │ + smlawbeq r1, r1, r8, lr │ │ + strls r0, [sl, #-1984] @ 0xfffff840 │ │ + movthi pc, #12288 @ 0x3000 @ │ │ + msreq CPSR_, #-2147483646 @ 0x80000002 │ │ + ldrls sl, [r1], #-3386 @ 0xfffff2c6 │ │ + bne 45ed6c │ │ + andeq lr, r1, r3, ror fp │ │ + addhi pc, sl, r0, lsl #5 │ │ + vabd.s8 d18, d0, d1 │ │ + @ instruction: 0xf2c80b11 │ │ + ldrbmi r0, [r8], r0, lsl #22 │ │ + svcge 0x003be282 │ │ + stclvc 5, cr15, [r6], {13} │ │ + svcgt 0x008e9e3f │ │ + strtmi r9, [r8], -r2, rrx │ │ + addeq lr, lr, ip, lsl #17 │ │ + @ instruction: 0xf8da4649 │ │ + strbtls r2, [r7], -r0, lsr #32 │ │ + @ instruction: 0xff54f01d │ │ + ldreq lr, [sl, #-2525]! @ 0xfffff623 │ │ + bleq 4a8a6c │ │ + @ instruction: 0x273ce9dd │ │ + bleq 68c94 │ │ + stmdacs r2, {r1, r2, r3, r4, r5, r9, sl, fp, ip, pc} │ │ + beq 460660 │ │ + mulls pc, r0, r6 @ │ │ + ldmdbls pc!, {r0, r1, r2, r7, r9, sp, lr, pc} @ │ │ + strbeq lr, [r8, #-2509]! @ 0xfffff633 │ │ + @ instruction: 0xf8cd07c0 │ │ + ldrls fp, [r1], #-28 @ 0xffffffe4 │ │ + strbcs lr, [sl, -sp, asr #19]! │ │ + stmib sp, {r1, r3, r8, sl, ip, pc}^ │ │ + @ instruction: 0xf000616c │ │ + ldmib sl, {r1, r2, r8, r9, pc}^ │ │ + ldmib sl, {r1, r4, r9, sl, ip, sp, lr}^ │ │ + ldrtmi r9, [r2], -pc, lsl #8 │ │ + mlalt r8, sl, r8, pc @ │ │ + @ instruction: 0x463842b4 │ │ + qasxmi fp, r2, r8 │ │ + @ instruction: 0xf0ac4649 │ │ + adcmi lr, r6, #96256 @ 0x17800 │ │ + tstpeq r0, pc, asr #32 @ p-variant is OBSOLETE │ │ + tstcs r1, r8, lsr pc │ │ + @ instruction: 0xf04f2800 │ │ + ldcge 0, cr0, [sl, #-0] │ │ + andcs fp, r1, r8, asr #30 │ │ + strmi fp, [r8], -r8, lsl #30 │ │ + subsle r2, r4, r0, lsl #16 │ │ + bleq 4a8adc │ │ + stmdaeq r1, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ + bleq 68d04 │ │ + stmdbeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ + svcls 0x0011465c │ │ + ldmdbls pc!, {r1, r2, r6, r9, sp, lr, pc} @ │ │ + strbeq lr, [r8, #-2509]! @ 0xfffff633 │ │ + stmib sp, {r6, r7, r8, r9, sl}^ │ │ + stmib sp, {r1, r3, r5, r6, r8, r9, sl, sp}^ │ │ + @ instruction: 0xf000616c │ │ + ldrdcs r8, [r8], -r4 │ │ + @ instruction: 0xf0ac462e │ │ + vldmdbge sl!, {d14-d16} │ │ + @ instruction: 0xf0002800 │ │ + @ instruction: 0xf088836f │ │ + andvs r4, r4, r0, lsl #2 │ │ + strmi r6, [r4], -r1, asr #32 │ │ + andcs r2, r8, #0, 2 │ │ + smlabtcs r0, sp, r9, lr │ │ + ldrtmi r4, [r1], -r8, lsr #12 │ │ + @ instruction: 0x46232210 │ │ + @ instruction: 0xff82f01d │ │ + @ instruction: 0xf0ac4620 │ │ + ldmib sp, {r4, r6, r7, r9, fp, sp, lr, pc}^ │ │ + stmdacs r1, {r1, r3, r4, r5, sl} │ │ + ldmdbls ip!, {r2, r5, r6, r8, ip, lr, pc} │ │ + andsls r9, r0, lr, lsr r8 │ │ + svcls 0x003d0a08 │ │ + ands r4, r6, #136, 12 @ 0x8800000 │ │ + mlasmi r0, sl, r8, pc @ │ │ + ldrdeq lr, [sl, -sl] │ │ + movwcs lr, #35290 @ 0x89da │ │ + streq pc, [r1, -r4, lsl #1] │ │ + addeq lr, r3, sp, lsl #17 │ │ + stmdbls sl, {r3, r5, r9, sl, lr} │ │ + @ instruction: 0xf8c4f009 │ │ + ldrsbtcc lr, [ip], -sp │ │ + ldmib sp, {r1, r2, r3, r4, r5, r8, fp, ip, pc}^ │ │ + bcs 7635c │ │ + beq 6e0714 │ │ + stmib sp, {r0, r1, r2, r3, r4, r9, sl, lr}^ │ │ + andsls r2, r1, pc, lsl #2 │ │ + @ instruction: 0xf08be1e0 │ │ + @ instruction: 0xf0880001 │ │ + strbmi r0, [sl], -r1, lsl #2 │ │ + stmib sp, {r0, r1, r5, r9, sl, lr}^ │ │ + strtmi r1, [r8], -r2 │ │ + stmib sp, {r1, r3, r8, fp, ip, pc}^ │ │ + @ instruction: 0xf0097600 │ │ + ldmib sp, {r0, r1, r2, r3, r4, r5, r6, r8, fp, ip, sp, lr, pc}^ │ │ + ldmib sp, {r0, r2, r3, r4, r5, r8, r9, sp}^ │ │ + stmdacs r1, {r1, r3, r4, r5, sl} │ │ + adchi pc, r3, r0, asr #32 │ │ + vtst.8 d25, d0, d28 │ │ + @ instruction: 0x46170b11 │ │ + bleq 68dd8 │ │ + stmdbeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ + beq 3dcc0 │ │ + movweq lr, #63949 @ 0xf9cd │ │ + @ instruction: 0xf1b8e1da │ │ + @ instruction: 0xf43f0f00 │ │ + bge 1597fa4 │ │ + andcc lr, r0, sp, asr #19 │ │ + strtmi r9, [r8], -r2, lsl #2 │ │ + @ instruction: 0x46434659 │ │ + @ instruction: 0xffacf009 │ │ + smlalvc pc, ip, sp, r8 @ │ │ + @ instruction: 0xf8dd2011 │ │ + vmla.i d24, d24, d0[6] │ │ + strmi r0, [r0] │ │ + orrshi pc, lr, r0, asr #32 │ │ + @ instruction: 0xf00007f8 │ │ + andcs r8, ip, r6, lsr #2 │ │ + svclt 0x00082c00 │ │ + andls r2, r7, r8 │ │ + rsc sp, r2, r6, lsr r1 │ │ + @ instruction: 0xf0002c00 │ │ + ldmib sp, {r0, r3, r4, r6, r7, pc}^ │ │ + stmdbge r2!, {r0, r2, r3, r4, r5, ip, sp}^ │ │ + andls sl, r0, r8, asr sl │ │ + @ instruction: 0xf0084628 │ │ + ldcls 13, cr15, [sl], #-220 @ 0xffffff24 │ │ + smlalhi pc, ip, sp, r8 @ │ │ + ldrbmi r9, [ip, #-3857] @ 0xfffff0ef │ │ + orrshi pc, pc, r0, asr #32 │ │ + sbcvc lr, r8, pc, asr sl │ │ + mrshi pc, (UNDEF: 11) @ │ │ + ldrtmi r2, [r1], -r0 │ │ + strtmi r9, [r8], -r1 │ │ + movwcs r2, #521 @ 0x209 │ │ + mrc2 0, 7, pc, cr8, cr13, {0} │ │ + ldrteq lr, [sl], #-2525 @ 0xfffff623 │ │ + @ instruction: 0xf43f2801 │ │ + stccs 15, cr10, [r0], {120} @ 0x78 │ │ + tstphi sp, r0 @ p-variant is OBSOLETE │ │ + ldrsbtcc lr, [sp], -sp │ │ + bge 16568e4 │ │ + strtmi r9, [r8], -r0 │ │ + ldc2 0, cr15, [r4, #-32] @ 0xffffffe0 │ │ + @ instruction: 0xf89d9c3a │ │ + ldrbmi r8, [ip, #-236] @ 0xffffff14 │ │ + ldrsb sp, [ip, #-14]! │ │ + ldcge 6, cr4, [sl, #-184]! @ 0xffffff48 │ │ + andcs r9, r0, sl, lsl #18 │ │ + movwcs r9, #2567 @ 0xa07 │ │ + strtmi r9, [r8], -r1 │ │ + mrc2 0, 6, pc, cr8, cr13, {0} │ │ + teqcc ip, sp @ │ │ + ldmib sp, {r1, r2, r3, r4, r5, fp, ip, pc}^ │ │ + bcs 76478 │ │ + rscshi pc, r8, r0 │ │ + svceq 0x0000f1b8 │ │ + mcrge 4, 6, pc, cr14, cr15, {1} @ │ │ + @ instruction: 0xf0402b08 │ │ + @ instruction: 0x4635829c │ │ + movwcs lr, #35290 @ 0x89da │ │ + ldrdvc pc, [r0], -r8 │ │ + strmi pc, [r0], #-79 @ 0xffffffb1 │ │ + ldrdvs pc, [r4], -r8 │ │ + b fe1b2ea0 │ │ + bl 1dadbcc │ │ + blle ff5ecbcc │ │ + andls r2, r2, r8, lsl #4 │ │ + smlabtcs r0, sp, r9, lr │ │ + bge 15964b4 │ │ + @ instruction: 0x46434659 │ │ + @ instruction: 0xff32f009 │ │ + smlalvc pc, ip, sp, r8 @ │ │ + @ instruction: 0xf8dd2011 │ │ + vmla.i d24, d24, d0[6] │ │ + strmi r0, [r0] │ │ + msrhi CPSR_xc, r0, asr #32 │ │ + ldcge 6, cr4, [sl, #-184]! @ 0xffffff48 │ │ + strdle r0, [r1, #120] @ 0x78 │ │ + svcls 0x0011e0a9 │ │ + stmdbeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf0002c00 │ │ + ldmdbge r8, {r0, r3, r5, r7, pc}^ │ │ + @ instruction: 0xf0094628 │ │ + @ instruction: 0xf89dfe11 │ │ + andscs r1, r1, ip, ror #1 │ │ + @ instruction: 0xf2c89c3a │ │ + addmi r0, r4, #0 │ │ + addshi pc, pc, r0, asr #32 │ │ + @ instruction: 0xf00007c8 │ │ + stmdals r7, {r0, r1, r3, r5, r7, pc} │ │ + stmdacs r0, {r2, r3, r8, sp} │ │ + andeq pc, r8, pc, asr #32 │ │ + andcs fp, fp, r8, lsl pc │ │ + tstcs lr, r8, lsl pc │ │ + svceq 0x0000f1b8 │ │ + svclt 0x00084688 │ │ + cdpls 6, 1, cr4, cr2, cr0, {4} │ │ + adchi pc, sl, r0 │ │ + andcs r9, r0, sl, lsl #18 │ │ + strtmi r9, [r8], -r1 │ │ + movwcs r4, #1602 @ 0x642 │ │ + mrc2 0, 3, pc, cr2, cr13, {0} │ │ + bleq ffc68888 │ │ + ldrteq lr, [sl], #-2525 @ 0xfffff623 │ │ + stmeq r8, {r0, r1, r3, r4, r7, fp, sp, lr, pc} │ │ + @ instruction: 0xf0002801 │ │ + stccs 0, cr8, [r0], {218} @ 0xda │ │ + sbcshi pc, ip, r0 │ │ + streq lr, [pc, #-2522] @ 2ba92 │ │ + strtmi r4, [sl], -r1, lsr #12 │ │ + svclt 0x003842ab │ │ + @ instruction: 0x461c461a │ │ + ldmib ip!, {r2, r3, r5, r7, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf04f42a5 │ │ + svclt 0x00880100 │ │ + stmdacs r0, {r0, r8, sp} │ │ + andeq pc, r0, pc, asr #32 │ │ + svclt 0x00c8ad3a │ │ + svclt 0x00082001 │ │ + stmdacs r1, {r3, r9, sl, lr} │ │ + ldmdbge r8, {r1, r4, r6, r7, ip, lr, pc}^ │ │ + ldrtmi r4, [sl], -r8, lsr #12 │ │ + @ instruction: 0xf009465b │ │ + @ instruction: 0xf89dfdc1 │ │ + vhadd.s8 q8, q8, q14 │ │ + @ instruction: 0x9c3a0b11 │ │ + bleq 68fd4 │ │ + @ instruction: 0xf040455c │ │ + @ instruction: 0x07c080d7 │ │ + adc sp, r7, r0, asr #3 │ │ + stmdaeq r1, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ + svcls 0x0011465c │ │ + @ instruction: 0x462ee0d8 │ │ + stmdbls sl, {r1, r3, r4, r5, r8, sl, fp, sp, pc} │ │ + bls 1f44d4 │ │ + andls r2, r1, r0, lsl #6 │ │ + @ instruction: 0xf01d4628 │ │ + ldmib sp, {r0, r1, r3, r5, r9, sl, fp, ip, sp, lr, pc}^ │ │ + ldmdals lr!, {r2, r3, r4, r5, r8, ip, sp} │ │ + ldmdacs sl!, {r0, r2, r3, r4, r6, r7, r8, fp, sp, lr, pc} │ │ + cmple fp, r0, lsl #20 │ │ + svceq 0x0000f1b8 │ │ + mcrge 4, 1, pc, cr2, cr15, {1} @ │ │ + @ instruction: 0xf0402b08 │ │ + @ instruction: 0x463581f0 │ │ + movwcs lr, #43482 @ 0xa9da │ │ + ldrdvc pc, [r0], -r8 │ │ + strmi pc, [r0], #-79 @ 0xffffffb1 │ │ + ldrdvs pc, [r4], -r8 │ │ + b fe1b3458 │ │ + bl 1cedd24 │ │ + blle ff62cd30 │ │ + andls r2, r2, r8, lsl #4 │ │ + smlabtcs r0, sp, r9, lr │ │ + bge 159660c │ │ + @ instruction: 0x46434659 │ │ + cdp2 0, 8, cr15, cr6, cr9, {0} │ │ + smlalvc pc, ip, sp, r8 @ │ │ + @ instruction: 0xf8dd2011 │ │ + vmla.i d24, d24, d0[6] │ │ + strmi r0, [r0] │ │ + @ instruction: 0x462ed177 │ │ + @ instruction: 0x07f8ad3a │ │ + strcs sp, [r0, -r3, asr #3] │ │ + @ instruction: 0xf04fe5f7 │ │ + ands r0, r7, r0, lsl #16 │ │ + stmdaeq r1, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ + pkhbtmi lr, r8, r0 │ │ + ldmib sp, {r3, r8, fp, ip, pc}^ │ │ + stmvc r8, {r2, r3, r4, r5, r9, ip, sp, lr} │ │ + andsls r8, r0, #589824 @ 0x90000 │ │ + andmi lr, r0, r1, asr #20 │ │ + bleq 4a8e6c │ │ + vaddl.s8 , d8, d15 │ │ + add r0, r3, r0, lsl #22 │ │ + stmdaeq r0, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ + bleq 4a8e7c │ │ + bleq 690a0 │ │ + rsbs r4, fp, ip, asr r6 │ │ + tsteq r0, sp, asr #19 │ │ + beq 63de08 │ │ + @ instruction: 0xf04fe059 │ │ + ldrb r0, [r5, r1, lsl #16]! │ │ + and r9, r1, sl, lsl #18 │ │ + @ instruction: 0xad3a990a │ │ + strbmi r2, [r2], -r0 │ │ + strtmi r9, [r8], -r1 │ │ + @ instruction: 0xf01d2300 │ │ + @ instruction: 0xf10dfdc5 │ │ + ldmib sp, {r4, r5, r6, r7, r8, r9, fp}^ │ │ + ldm fp, {r1, r3, r4, r5, sl} │ │ + bllt 1c2e7d8 │ │ + ldmib sl, {r2, r4, r7, r8, r9, ip, sp, pc}^ │ │ + @ instruction: 0x46210512 │ │ + adcmi r4, fp, #44040192 @ 0x2a00000 │ │ + sasxmi fp, sl, r8 │ │ + @ instruction: 0xf0ac461c │ │ + adcmi lr, r5, #84, 18 @ 0x150000 │ │ + tstpeq r0, pc, asr #32 @ p-variant is OBSOLETE │ │ + tstcs r1, r8, lsr pc │ │ + @ instruction: 0xf04f2800 │ │ + svclt 0x00480000 │ │ + svclt 0x00082001 │ │ + stmdacs r0, {r3, r9, sl, lr} │ │ + ldcge 1, cr13, [sl, #-856]! @ 0xfffffca8 │ │ + @ instruction: 0x463aa958 │ │ + @ instruction: 0x4628465b │ │ + ldc2 0, cr15, [r8, #-36] @ 0xffffffdc │ │ + smlaleq pc, ip, sp, r8 @ │ │ + bleq 4a8f00 │ │ + @ instruction: 0xf2c89c3a │ │ + ldrbmi r0, [ip, #-2816] @ 0xfffff500 │ │ + stmdbls sl, {r1, r2, r3, r5, r8, ip, lr, pc} │ │ + bicle r0, r5, r0, asr #15 │ │ + stmdaeq r0, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ + @ instruction: 0x4698e756 │ │ + @ instruction: 0xf8cd0a18 │ │ + str fp, [r3, r0, asr #32]! │ │ + bleq 4a8f24 │ │ + stmdaeq r1, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ + bleq 6914c │ │ + strtmi lr, [lr], -sl, asr #14 │ │ + bls f52a54 │ │ + stmvc r8, {r0, r4, r9, ip, pc} │ │ + bls f8e660 │ │ + b 1090e80 │ │ + andls r4, pc, r0 │ │ + bleq 4a8f48 │ │ + bleq 6916c │ │ + @ instruction: 0xf01ba868 │ │ + stmdals r8!, {r0, r3, r5, r9, sl, fp, ip, sp, lr, pc}^ │ │ + svclt 0x001c2800 │ │ + @ instruction: 0xf0709869 │ │ + @ instruction: 0x4645e9dc │ │ + ldcls 6, cr4, [r1], {184} @ 0xb8 │ │ + eor r9, r1, sp, lsl #30 │ │ + stmdbls r8, {r7, r9, sl, lr} │ │ + svcls 0x003c9a3d │ │ + stmdahi r9, {r3, r7, fp, ip, sp, lr} │ │ + b 1090eb8 │ │ + andls r4, pc, r0 │ │ + @ instruction: 0xf01ba868 │ │ + stmdals r8!, {r0, r4, r9, sl, fp, ip, sp, lr, pc}^ │ │ + svclt 0x001c2800 │ │ + @ instruction: 0xf0709869 │ │ + @ instruction: 0x9e10e9c4 │ │ + stmdage r2!, {r0, r2, r5, r9, sl, lr}^ │ │ + mcr2 0, 0, pc, cr6, cr11, {0} @ │ │ + stmdacs r0, {r1, r5, r6, fp, ip, pc} │ │ + stmdals r3!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ + ldmib r8!, {r4, r5, r6, ip, sp, lr, pc} │ │ + svcls 0x000d463c │ │ + mrcls 6, 0, r9, cr2, cr0, {0} │ │ + tstle r7, sp, asr r5 │ │ + beq 1668adc │ │ + b 1817ba0 │ │ + @ instruction: 0xf47f70c8 │ │ + @ instruction: 0x465dac9d │ │ + ldrls sl, [r1], #-2114 @ 0xfffff7be │ │ + ldc2 0, cr15, [sl], #-20 @ 0xffffffec │ │ + @ instruction: 0xf8dd9e2c │ │ + @ instruction: 0xf1b6a038 │ │ + tstle ip, r0, lsl #30 │ │ + strbt r4, [sl], #-1603 @ 0xfffff9bd │ │ + @ instruction: 0xf005a842 │ │ + stcls 12, cr15, [ip, #-188]! @ 0xffffff44 │ │ + svcmi 0x0000f1b5 │ │ + ldrbmi sp, [sp], -pc, lsr #2 │ │ + ldrsbtge pc, [r8], -sp @ │ │ + svcls 0x002ee45f │ │ + stmdals sp!, {r0, r1, r6, r9, sl, lr} │ │ + cmnlt r7, r2, lsl r0 │ │ + stcne 8, cr9, [r4, #-72] @ 0xffffffb8 │ │ + strcc lr, [ip], #-2 │ │ + andle r3, r8, r1, lsl #30 │ │ + stceq 8, cr15, [r4], {84} @ 0x54 │ │ + rscsle r2, r8, r0, lsl #16 │ │ + @ instruction: 0xf0ac6820 │ │ + strbmi lr, [r3], -r2, ror #16 │ │ + ldcls 7, cr14, [r2], {243} @ 0xf3 │ │ + strb fp, [r8], #-2894 @ 0xfffff4b2 │ │ + @ instruction: 0x863de9dd │ │ + @ instruction: 0xf108b15e │ │ + @ instruction: 0xf8570704 │ │ + stmdacs r0, {r2, sl, fp} │ │ + ldmdavs r8!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ + ldmda r0, {r2, r3, r5, r7, ip, sp, lr, pc}^ │ │ + cdpcc 7, 0, cr3, cr1, cr12, {0} │ │ + stccs 1, cr13, [r0, #-980] @ 0xfffffc2c │ │ + @ instruction: 0xf47f465d │ │ + @ instruction: 0xf7ffac0a │ │ + ldmib sp, {r0, r1, r3, sl, fp, ip, sp, pc}^ │ │ + @ instruction: 0xf8dd462d │ │ + cmplt r6, r8, lsr r0 │ │ + @ instruction: 0xf8571d27 │ │ + stmdacs r0, {r2, sl, fp} │ │ + ldmdavs r8!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ + ldmda sl!, {r2, r3, r5, r7, ip, sp, lr, pc} │ │ + cdpcc 7, 0, cr3, cr1, cr12, {0} │ │ + stccs 1, cr13, [r0, #-980] @ 0xfffffc2c │ │ + @ instruction: 0xf43f465d │ │ + strtmi sl, [r0], -r0, lsr #24 │ │ + @ instruction: 0xf0ac461c │ │ + @ instruction: 0x4623e830 │ │ + ldclt 7, cr15, [r9], {255} @ 0xff │ │ + tstls r2, #64, 12 @ 0x4000000 │ │ + @ instruction: 0xf8cd4691 │ │ + @ instruction: 0xf8cdc034 │ │ + @ instruction: 0xf006e028 │ │ + @ instruction: 0xf8ddfe39 │ │ + strbmi lr, [sl], -r8, lsr #32 │ │ + ldrsbtgt pc, [r4], -sp @ │ │ + stmdbeq r8!, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf7fe9b12 │ │ + ldmdami r8, {r0, r3, r4, r5, r6, r7, r8, sl, fp, ip, sp, pc}^ │ │ + @ instruction: 0xf0144478 │ │ + ldmdami r7, {r0, r1, r2, r6, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf0134478 │ │ + ldmdbls r0, {r0, r3, r6, r7, r9, fp, ip, sp, lr, pc} │ │ + strmi r4, [pc], -r8, lsl #5 │ │ + @ instruction: 0x4607bf38 │ │ + stmdble r8, {r0, r7, r9, lr} │ │ + subeq lr, r7, r7, lsl #22 │ │ + bl 92c0c │ │ + ldmvs r7!, {r6, r7, r9, sl} │ │ + @ instruction: 0xf47e2f00 │ │ + @ instruction: 0xf8ddadd5 │ │ + ldmdals r1, {r3, r4, r5, sp, pc} │ │ + @ instruction: 0xf0abb10b │ │ + usub8mi lr, sp, ip │ │ + ldrdeq pc, [r0], #-138 @ 0xffffff76 │ │ + cmple ip, r0, lsl #16 │ │ + @ instruction: 0xf04f46d0 │ │ + tstls r2, #255 @ 0xff │ │ + @ instruction: 0xf8c846da │ │ + strtmi r0, [fp], r0, asr #32 │ │ + ldm r9!, {r1, r6, r8, fp, sp, pc} │ │ + strmi r0, [r8], -ip, ror #1 │ │ + ldm r9!, {r2, r3, r5, r6, r7, lr, pc} │ │ rscgt r0, ip, ip, ror #1 │ │ - smlalseq lr, ip, ip, r8 │ │ - stmdage r2, {r2, r3, r4, r5, r6, r7, lr, pc}^ │ │ - @ instruction: 0xf9f6f01c │ │ - @ instruction: 0xf10d45c8 │ │ - @ instruction: 0xd1b509c8 │ │ - stmdals pc, {r3, r4, sp, lr, pc} @ │ │ - beq 186b710 │ │ - andls pc, r0, r0, asr #17 │ │ - stmibeq r8, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ - andle r0, r2, r8, asr r0 │ │ - @ instruction: 0xf0a99810 │ │ - @ instruction: 0xac22ea6c │ │ - stclgt 6, cr4, [lr], {72} @ 0x48 │ │ - stclgt 0, cr12, [lr], {206} @ 0xce │ │ - ldm r4, {r1, r2, r3, r6, r7, lr, pc} │ │ - rscgt r0, lr, lr, ror #1 │ │ - strbmi sl, [r9], -r2, asr #16 │ │ - @ instruction: 0xf9d8f01c │ │ - ldrdeq pc, [r0], #-139 @ 0xffffff75 │ │ - @ instruction: 0xf0402800 │ │ - bge 10cf528 │ │ - ldmdavs r1, {r0, r1, r3, r4, r6, r7, r8, fp, sp, lr, pc} │ │ - mvnscc pc, #79 @ 0x4f │ │ - ldrdvc pc, [ip], #-139 @ 0xffffff75 │ │ + smlalseq lr, ip, r9, r8 │ │ + stmdage sl!, {r2, r3, r4, r5, r6, r7, lr, pc} │ │ + @ instruction: 0xf8d6f01f │ │ + ldmib r8, {r1, r3, r5, r9, fp, sp, pc}^ │ │ + @ instruction: 0xf8d86511 │ │ + strbmi r7, [r1], ip, asr #32 │ │ @ instruction: 0xf1b6ca07 │ │ - @ instruction: 0xf8cb4f00 │ │ - blls 1bb42c │ │ + blls 300428 │ │ andle ip, ip, r7, lsl #6 │ │ - @ instruction: 0x4644b137 │ │ - bleq 16d488 │ │ - bl 19eb4f0 │ │ + @ instruction: 0x462cb137 │ │ + bleq 16a984 │ │ + stmia lr!, {r4, r5, r6, ip, sp, lr, pc}^ │ │ mvnsle r3, r1, lsl #30 │ │ svclt 0x001c2e00 │ │ - @ instruction: 0xf0a94640 │ │ - @ instruction: 0xf8dbea3e │ │ - ldmdbls sl, {r6} │ │ - @ instruction: 0xf8cb3001 │ │ - @ instruction: 0xf1b10040 │ │ - tstle r5, r0, lsl #30 │ │ - @ instruction: 0xf01ea812 │ │ - sublt pc, sp, fp, ror #25 │ │ - svchi 0x00f0e8bd │ │ - @ instruction: 0x0010f8db │ │ - cmple r9, r0, lsl #16 │ │ - @ instruction: 0xf04f9d05 │ │ - @ instruction: 0xf8cb30ff │ │ - @ instruction: 0x46280010 │ │ - stmia r9!, {r1, r2, r3, r6, r7, fp, lr, pc} │ │ - ldm r0, {r1, r2, r3, r6, r7} │ │ - stm r9, {r1, r2, r3, r6, r7} │ │ - ldm sl!, {r1, r2, r3, r6, r7} │ │ - strgt r0, [pc, #143] @ 2f41f │ │ - umulleq lr, pc, sl, r8 @ │ │ - ldmdals r4!, {r0, r1, r2, r3, r7, r8, sl, lr, pc} │ │ - svcmi 0x0000f1b0 │ │ - andcs sp, r0, r1, lsl #2 │ │ - ldmdage r2!, {r0, r2, sp, lr, pc} │ │ - @ instruction: 0xf9fef01c │ │ - @ instruction: 0x0010f8db │ │ - @ instruction: 0xf8cb3001 │ │ - ldmdage r2, {r4} │ │ - stc2l 0, cr15, [r0], {30} │ │ - pop {r0, r2, r3, r6, ip, sp, pc} │ │ - tstcs r6, #240, 30 @ 0x3c0 │ │ - movtls r3, #8705 @ 0x2201 │ │ - svclt 0x0028428a │ │ - @ instruction: 0xf046460a │ │ - strmi pc, [r2], -pc, lsr #23 │ │ - stmdage r2, {r0, r1, r3, r9, sl, lr}^ │ │ - @ instruction: 0x461a4611 │ │ - ldc2 0, cr15, [r6], #-280 @ 0xfffffee8 │ │ - stmdage r2!, {r0, r3, r4, ip, pc} │ │ - stc2l 0, cr15, [r0], #-8 │ │ - stmdacs r0, {r1, r4, r5, fp, ip, pc} │ │ - ldcge 4, cr15, [r8, #-508]! @ 0xfffffe04 │ │ - stmdals pc, {r1, r2, r3, r4, r6, r8, sl, sp, lr, pc} @ │ │ - stcge 1, cr2, [r2], #-48 @ 0xffffffd0 │ │ - smlabteq r0, r8, r2, pc @ │ │ - subseq r6, r0, r1 │ │ - svcge 0x0013f43f │ │ - @ instruction: 0xf0a99810 │ │ - str lr, [lr, -r0, ror #19] │ │ - ldrbtmi r4, [r8], #-2056 @ 0xfffff7f8 │ │ - @ instruction: 0xff90f011 │ │ - andcs r4, r0, r7, lsl #22 │ │ - ldrbtmi r2, [fp], #-258 @ 0xfffffefe │ │ - blx ff26b45c │ │ - ldrbtmi r4, [r8], #-2053 @ 0xfffff7fb │ │ - @ instruction: 0xff86f011 │ │ - ldrbtmi r4, [r8], #-2052 @ 0xfffff7fc │ │ - @ instruction: 0xff82f011 │ │ - muleq sl, r6, r8 │ │ - andeq fp, sl, sl, lsl r6 │ │ - @ instruction: 0x000ab8b2 │ │ - muleq sl, sl, r8 │ │ - svcmi 0x00f0e92d │ │ - stmvs r5, {r0, r2, r3, r4, r7, ip, sp, pc} │ │ - @ instruction: 0xf8904680 │ │ - andcs sl, r1, ip │ │ - streq pc, [r8], -r5, lsl #2 │ │ - svcne 0x0000e856 │ │ - @ instruction: 0xf0402900 │ │ - stmda r6, {r0, r1, r2, r4, r7, pc}^ │ │ - stmdbcs r0, {r8} │ │ - vsra.u64 , q11, #1 │ │ - mrrcmi 15, 5, r8, pc, cr11 @ │ │ - stmdavs r0!, {r2, r3, r4, r5, r6, sl, lr}^ │ │ - @ instruction: 0xf0400040 │ │ - @ instruction: 0xf04f8091 │ │ - blvc a31878 │ │ - @ instruction: 0xf0402800 │ │ - stcvc 0, cr8, [r8, #-588]! @ 0xfffffdb4 │ │ - stmdbvs pc!, {r1, r8, sp} @ │ │ - strvc r2, [r9, #-2050]! @ 0xfffff7fe │ │ - andcs sp, r9, r7, lsl #2 │ │ - andeq pc, r0, r8, asr #5 │ │ - @ instruction: 0xf1b99002 │ │ - suble r0, r3, r0, lsl #30 │ │ - @ instruction: 0xf10de045 │ │ - @ instruction: 0xf88d0b18 │ │ - @ instruction: 0xf10b001c │ │ - @ instruction: 0xf1050005 │ │ - subscs r0, r3, #1073741829 @ 0x40000005 │ │ - @ instruction: 0xf0a59706 │ │ - @ instruction: 0xf1baff8c │ │ - andle r0, r7, r0, lsl #30 │ │ - stmdbge r6, {r1, fp, sp, pc} │ │ - cdp2 0, 13, cr15, cr10, cr8, {1} │ │ - svceq 0x0000f1b9 │ │ - eor sp, lr, ip, lsr #32 │ │ - svclt 0x001c2f00 │ │ - @ instruction: 0xf06c4638 │ │ - stmdals lr, {r1, r3, r6, r8, r9, fp, sp, lr, pc} │ │ - svcmi 0x0000f1b0 │ │ - @ instruction: 0xf10bbf1c │ │ - @ instruction: 0xf01c0018 │ │ - @ instruction: 0xf8ddf961 │ │ - @ instruction: 0xf1bbb05c │ │ - andsle r4, r1, r0, lsl #30 │ │ - ldmdals r8, {r0, r3, r4, r8, r9, sl, fp, ip, pc} │ │ - teqlt pc, r1 │ │ - ldrdge pc, [r4], -sp │ │ - bleq 16d664 │ │ - b fe16b6b4 │ │ - mvnsle r3, r1, lsl #30 │ │ - svceq 0x0000f1bb │ │ - stmdals r1, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ - ldmdb sl, {r0, r3, r5, r7, ip, sp, lr, pc}^ │ │ - vaddl.s8 q9, d8, d9 │ │ - andcc r0, r8, r0 │ │ - @ instruction: 0xf1b99002 │ │ - tstle r2, r0, lsl #30 │ │ - subeq r6, r0, r0, ror #16 │ │ - andcs sp, r0, r7, asr r1 │ │ - svchi 0x005bf3bf │ │ - svcne 0x0000e856 │ │ - andeq lr, r0, #4587520 @ 0x460000 │ │ - mvnsle r2, r0, lsl #20 │ │ - suble r2, r1, r2, lsl #18 │ │ - svchi 0x005bf3bf │ │ - svceq 0x0000e855 │ │ - stmda r5, {r0, r6, r9, sl, fp, ip}^ │ │ - bcs 33d4c │ │ - stmdacs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ - strtmi sp, [r8], -r4, lsl #2 │ │ - svchi 0x005bf3bf │ │ - cdp2 0, 1, cr15, cr5, cr3, {0} │ │ - @ instruction: 0xf7f3a802 │ │ - strmi pc, [r2], -r5, lsl #29 │ │ - ldmib r8, {r0, r1, r3, r9, sl, lr}^ │ │ - stmiavs r7!, {r8}^ │ │ - svchi 0x005bf3bf │ │ - @ instruction: 0xd12c2f02 │ │ - movwcs lr, #35277 @ 0x89cd │ │ - andls r2, r6, #805306368 @ 0x30000000 │ │ - stmdbvs r7!, {r1, r2, r9, fp, sp, pc} │ │ - @ instruction: 0xb01d47b8 │ │ - svchi 0x00f0e8bd │ │ - vqshlu.s32 d4, d16, #31 │ │ - @ instruction: 0xf0488f2f │ │ - @ instruction: 0xe768f9b8 │ │ - @ instruction: 0xf8bcf048 │ │ - stmdbeq r1, {r7, ip, sp, lr, pc} │ │ - stmdacs r0, {r3, r5, r8, r9, fp, ip, sp, lr} │ │ - svcge 0x006df43f │ │ - bge 1c15e8 │ │ - ldmdbmi r1, {r4, r8, r9, fp, lr} │ │ - ldrbtmi r4, [fp], #-1144 @ 0xfffffb88 │ │ - andsls pc, ip, sp, lsl #17 │ │ - tstls r0, r9, ror r4 │ │ - strls r2, [r6], -fp, lsr #2 │ │ - @ instruction: 0xff7af011 │ │ - @ instruction: 0x463120f0 │ │ - movwcs r2, #4737 @ 0x1281 │ │ - stmdb r4, {r0, r3, r5, r7, ip, sp, lr, pc} │ │ - stmdami r9, {r1, r2, r4, r5, r7, r8, r9, sl, sp, lr, pc} │ │ - @ instruction: 0xf0104478 │ │ - @ instruction: 0xf048fa33 │ │ - stmdacs r0, {r0, r1, r3, r4, r7, fp, ip, sp, lr, pc} │ │ - andcs fp, r1, r4, lsl #30 │ │ - str r7, [r0, r8, lsr #6]! │ │ - andeq pc, sl, r0, lsr r3 @ │ │ - @ instruction: 0xfffe9edb │ │ - strdeq sl, [sl], -lr │ │ - andeq sl, sl, r8, ror #23 │ │ - strdeq sl, [sl], -ip │ │ - ldrbmi lr, [r0, sp, lsr #18]! │ │ - strmi fp, [r0], r6, lsl #1 │ │ - ldrmi r6, [r5], -r8, lsl #16 │ │ - ldmdbeq r1, {r6, r9, ip, sp, lr, pc} │ │ - stmdbeq r0, {r3, r6, r7, r9, ip, sp, lr, pc} │ │ - bicslt r6, sl, r2, asr #16 │ │ - @ instruction: 0xf10d6804 │ │ - stmdavs lr, {r3, r9, fp}^ │ │ - strne lr, [r2, -r4, lsl #22] │ │ - ldrdeq lr, [r0, -r4] │ │ - stmib sp, {r1, r3, r5, r9, sl, lr}^ │ │ - ldrbmi r0, [r0], -r0, lsl #2 │ │ - @ instruction: 0xf0254631 │ │ - stmdals r2, {r0, r1, r7, fp, ip, sp, lr, pc} │ │ - tstle lr, r8, asr #10 │ │ - ldrdeq lr, [r3, -sp] │ │ - svclt 0x00082800 │ │ - stmib r4, {r0, r9, sl, lr}^ │ │ - ldrcc r0, [r0], #-258 @ 0xfffffefe │ │ - strhle r4, [r9, #44]! @ 0x2c │ │ - andls pc, r0, r8, asr #17 │ │ - pop {r1, r2, ip, sp, pc} │ │ - blge 111614 │ │ - stm r8, {r1, r2, r3, r8, r9, fp, lr, pc} │ │ - andlt r0, r6, pc │ │ - @ instruction: 0x87f0e8bd │ │ + @ instruction: 0xf0ab4628 │ │ + @ instruction: 0xf8d9efc8 │ │ + ldrbmi r0, [r3, #64] @ 0x40 │ │ + @ instruction: 0xf1009913 │ │ + @ instruction: 0xf8c90001 │ │ + @ instruction: 0xf8dd0040 │ │ + tstle r1, r8, asr #32 │ │ + ldmib sp, {r0, r3, r9, fp, ip, pc}^ │ │ + adcmi r0, r9, #20, 10 @ 0x5000000 │ │ + ldmdavs r6, {r2, r3, r8, fp, ip, pc}^ │ │ + cmnlt sp, r4, lsl r9 │ │ + strtmi r0, [r1], -ip, lsr #2 │ │ + stmda r8, {r2, r3, r5, r7, ip, sp, lr, pc} │ │ + stmdblt r8!, {r2, r3, r8, fp, ip, pc}^ │ │ + strtmi r2, [r1], -r8 │ │ + ldc2 0, cr15, [r8, #-68] @ 0xffffffbc │ │ + ldmib sp, {r2, r3, fp, ip, pc}^ │ │ + cdpls 7, 1, cr3, cr1, cr15, {0} │ │ + stcllt 7, cr15, [ip], #1016 @ 0x3f8 │ │ + svc 0x00a2f0ab │ │ + stmdbls ip, {r3, sp} │ │ + streq lr, [r0, #-2502] @ 0xfffff63a │ │ + andge pc, r0, r1, asr #17 │ │ + pop {r0, r1, r2, r3, r5, r6, ip, sp, pc} │ │ + ldmdami r7, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ + @ instruction: 0xf0144478 │ │ + blmi 7ac3c8 │ │ + mrscs r2, (UNDEF: 2) │ │ + ldrbtmi r4, [fp], #-1570 @ 0xfffff9de │ │ + @ instruction: 0xf9fef013 │ │ + andcs r4, r0, r7, lsl fp │ │ + ldrbmi r2, [sl], -r2, lsl #2 │ │ + @ instruction: 0xf013447b │ │ + blmi 5ab0a4 │ │ + mrscs r2, (UNDEF: 2) │ │ + @ instruction: 0xf013447b │ │ + strdcs pc, [r1], -r1 │ │ + @ instruction: 0xf0114639 │ │ + stmdami ip, {r0, r1, r3, r5, r6, r7, sl, fp, ip, sp, lr, pc} │ │ + blmi 357240 │ │ + ldrbtmi r4, [r8], #-2316 @ 0xfffff6f4 │ │ + ldrbtmi r4, [r9], #-1147 @ 0xfffffb85 │ │ + @ instruction: 0x212b9100 │ │ + @ instruction: 0xff66f014 │ │ + tstcs r8, r1 │ │ + ldc2l 0, cr15, [ip], {17} │ │ + andcs r9, r8, r1, lsl r9 │ │ + ldc2l 0, cr15, [r8], {17} │ │ + andeq lr, sl, ip, lsl r4 │ │ + andeq lr, sl, ip, lsl #10 │ │ + @ instruction: 0x000ae3b4 │ │ + @ instruction: 0xfffecba5 │ │ + andeq lr, sl, ip, asr #32 │ │ + muleq sl, sl, r1 │ │ + andeq lr, sl, r0, lsl #3 │ │ + andeq lr, sl, r4, ror r1 │ │ + andeq lr, sl, lr, lsl #3 │ │ + addlt fp, ip, r0, lsl #11 │ │ + ldmib r0, {r0, r1, r3, r9, fp, lr}^ │ │ + ldrbtmi r0, [sl], #-256 @ 0xffffff00 │ │ + @ instruction: 0xf3bf68d3 │ │ + blcs d06a4 │ │ + ldmdbvs r3, {r1, r3, r8, ip, lr, pc} │ │ + andls r2, r3, #0, 4 │ │ + andls r2, r2, #268435456 @ 0x10000000 │ │ + andls r2, r0, #805306368 @ 0x30000000 │ │ + ldrmi r4, [r8, sl, ror #12] │ │ + stclt 0, cr11, [r0, #48] @ 0x30 │ │ + ldrbtmi r4, [r8], #-2050 @ 0xfffff7fe │ │ + @ instruction: 0xf9f6f013 │ │ + andeq r1, fp, sl, lsl #29 │ │ + andeq sp, sl, sl, lsl #19 │ │ addlt fp, r8, r0, ror r5 │ │ ldm r1, {r1, r2, r9, sl, lr} │ │ stmdbvs r9, {r0, r3, r4, r5} │ │ eorseq lr, r9, sp, lsl #17 │ │ - @ instruction: 0xf01ba804 │ │ - @ instruction: 0x2011fdb5 │ │ + @ instruction: 0xf01ea804 │ │ + @ instruction: 0x2011fdb9 │ │ vqdmlal.s , d8, d4 │ │ addmi r0, r1, #0 │ │ eorsvs sp, r0, r2, lsl #2 │ │ ldcllt 0, cr11, [r0, #-32]! @ 0xffffffe0 │ │ - blgt 41a29c │ │ + blgt 41759c │ │ andlt ip, r8, pc, lsl #12 │ │ ldrlt fp, [r0, #3440]! @ 0xd70 │ │ - strmi fp, [r5], -r8, lsl #1 │ │ - movweq lr, #2513 @ 0x9d1 │ │ - ldmib r1, {r2, r3, r9, sl, lr}^ │ │ - stmibvs r9, {r0, r1, r9, sl, fp, lr, pc} │ │ - andpl lr, r9, sp, lsl #17 │ │ - @ instruction: 0xf024a804 │ │ - stmdbls r4, {r0, r1, r3, r4, r7, r9, sl, fp, ip, sp, lr, pc} │ │ - @ instruction: 0xf89d2211 │ │ - vshr.s8 d16, d4, #8 │ │ - addsmi r0, r1, #0, 4 │ │ - stmdbvs r1!, {r0, r2, r8, ip, lr, pc}^ │ │ - andvc r6, r8, sl, lsr #32 │ │ - ldmdblt r0!, {r5, r7, fp, sp, lr}^ │ │ - bls 22770c │ │ - stmiavs r2!, {r1, r3, r5, r6, r7, sp, lr} │ │ - @ instruction: 0xc015f8dd │ │ - @ instruction: 0x3019f8dd │ │ - andcc pc, r9, r5, asr #17 │ │ - andgt pc, r5, r5, asr #17 │ │ - eorvs r7, r9, r8, lsr #2 │ │ - stmiavs r0!, {r1, r4, r8, ip, sp, pc}^ │ │ - stmda ip!, {r0, r3, r5, r7, ip, sp, lr, pc}^ │ │ - ldclt 0, cr11, [r0, #32]! │ │ + strmi fp, [sp], -r6, lsl #1 │ │ + bvc 2fe1ac │ │ + bvc 1a46ac4 │ │ + stmdage r2, {ip, pc} │ │ + mcrr2 0, 2, pc, r4, cr11 @ │ │ + tstcs r1, r2, lsl #16 │ │ + smlabteq r0, r8, r2, pc @ │ │ + smlabble r7, r8, r2, r4 │ │ + ldmib sp, {r0, r1, r3, r5, fp, sp, lr}^ │ │ + stmib r3, {r2, r9, ip}^ │ │ + eorvs r1, r0, r0, lsl #4 │ │ + ldclt 0, cr11, [r0, #24]! │ │ + @ instruction: 0xf104ab03 │ │ + blgt 3af9dc │ │ + andeq lr, lr, ip, lsl #17 │ │ + andlt r6, r6, r0, lsr #32 │ │ + ldrble fp, [r4], #3504 @ 0xdb0 │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ svcmi 0x00f0e92d │ │ stcvc 0, cr11, [ip, #-1004] @ 0xfffffc14 │ │ @ instruction: 0xf8d14683 │ │ stccs 0, cr12, [r4], {16} │ │ andcs sp, r4, ip, asr #2 │ │ cdpeq 0, 0, cr15, cr0, cr15, {2} │ │ ldrdhi pc, [ip], -r1 │ │ - ldcl 1, cr2, [pc] @ 2f714 │ │ + ldcl 1, cr2, [pc] @ 2c9fc │ │ movwcs r0, #3034 @ 0xbda │ │ subseq pc, fp, sp, lsl #17 │ │ subs pc, ip, sp, asr #17 │ │ ldmmi r8, {r1, r3, r4, r9, sl, fp, sp, pc}^ │ │ tstne r8, #3358720 @ 0x334000 │ │ stcl 6, cr4, [r6, #132] @ 0x84 │ │ @ instruction: 0x2c010b00 │ │ @@ -14010,87 +11124,87 @@ │ │ @ instruction: 0xf1ba8901 │ │ andsvs r4, r0, r0, lsl #30 │ │ @ instruction: 0xf1a1d144 │ │ ands r0, lr, r8, lsl #20 │ │ stmdavs r8, {r0, r1, r2, r3, r7, fp, sp, lr} │ │ addmi r6, r3, #7872 @ 0x1ec0 │ │ @ instruction: 0xf8d1d924 │ │ - bl 4f7e0 │ │ + bl 4cac8 │ │ ldcvs 0, cr0, [r9, #-512]! @ 0xfffffe00 │ │ @ instruction: 0xf88d2300 │ │ stccs 0, cr4, [r1], {91} @ 0x5b │ │ vdiveq.f64 d30, d0, d1 │ │ @ instruction: 0xf0009317 │ │ stccs 0, cr8, [r0], {196} @ 0xc4 │ │ sbchi pc, r7, r0, asr #32 │ │ - bleq fec2af4c │ │ + bleq fec28234 │ │ movwmi pc, #111 @ 0x6f @ │ │ mvnscc pc, pc, asr #32 │ │ @ instruction: 0xf1a1e7a2 │ │ ldmdals r5, {r0, r9, fp} │ │ andne lr, r2, #3325952 @ 0x32c000 │ │ - b 105c2e8 │ │ + b 10595d0 │ │ stmib fp, {r0, r3, sp}^ │ │ rsbslt sl, fp, r0 │ │ svchi 0x00f0e8bd │ │ ldrcs r2, [r8, #-24] @ 0xffffffe8 │ │ - svc 0x00fcf0a8 │ │ + cdp 0, 9, cr15, cr8, cr11, {5} │ │ @ instruction: 0xf0012800 │ │ stmibmi r4!, {r2, r4, sl, pc} │ │ @ instruction: 0x46042218 │ │ - @ instruction: 0xf0a54479 │ │ - @ instruction: 0x2011fdde │ │ + @ instruction: 0xf0a84479 │ │ + @ instruction: 0x2011fbfc │ │ strmi lr, [r2, #-2507] @ 0xfffff635 │ │ andeq pc, r0, r8, asr #5 │ │ stmib fp, {r0, r1, r2, fp, ip, sp}^ │ │ rsbslt r0, fp, r0, lsl #10 │ │ svchi 0x00f0e8bd │ │ stmib sp, {sp}^ │ │ tstcs r4, fp, lsl #8 │ │ stmib sp, {r1, r2, r4, r5, sl, fp, sp, pc}^ │ │ vand d16, d0, d24 │ │ andls r3, sp, #1073741859 @ 0x40000023 │ │ eorseq lr, r6, sp, asr #19 │ │ eorseq lr, sl, sp, asr #19 │ │ teqeq ip, sp, asr #19 │ │ - @ instruction: 0xf0184620 │ │ - ldmdals fp!, {r0, r1, r3, r6, r7, sl, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xf01b4620 │ │ + ldmdals fp!, {r0, r1, r3, r4, r6, r7, sl, fp, ip, sp, lr, pc} │ │ rscsle r2, r9, r0, lsl #16 │ │ movwcs r2, #8448 @ 0x2100 │ │ strcs r2, [r0, -r1, lsl #10] │ │ - blx 12788e │ │ - blx 207c66 │ │ + blx 124b76 │ │ + blx 204f4e │ │ ldrmi r1, [r5], -r5, lsl #2 │ │ strcs pc, [r3], -r3, lsr #23 │ │ - blx f196e │ │ - blx 10908e │ │ + blx eec56 │ │ + blx 106376 │ │ ldrmi r6, [r3], -r7, lsl #14 │ │ rscsle r0, r5, r2, asr #15 │ │ strcs pc, [r5], -r3, lsr #23 │ │ mvnle r2, r1, lsl #16 │ │ ldmeq r0, {r1, r2, r4, r5, sl, fp, sp, pc} │ │ stclgt 0, cr13, [ip], {222} @ 0xde │ │ @ instruction: 0x1d08a94e │ │ ldm r4, {r2, r3, r6, r7, lr, pc} │ │ sbcgt r0, ip, ip, asr #1 │ │ stmib sp, {sp}^ │ │ @ instruction: 0xf8dd8928 │ │ eorls r8, sl, r0, asr #32 │ │ - beq 9e9fd8 │ │ + beq 9e72c0 │ │ @ instruction: 0xf8cda826 │ │ ldrsbcc r8, [r4], -r0 │ │ sbcgt ip, ip, ip, asr #19 │ │ smlaleq lr, ip, r1, r8 │ │ @ instruction: 0xf8ddc0ec │ │ @ instruction: 0xf8daa048 │ │ stmdacs r0, {r2, r3, r5, r6} │ │ mcrrge 0, 4, sp, lr, cr15 │ │ ldrbmi sl, [r1], -r6, lsr #20 │ │ - @ instruction: 0xf0294620 │ │ - ldmib sp, {r0, r1, r3, r5, r7, sl, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf02c4620 │ │ + ldmib sp, {r0, r1, r2, r3, r4, r5, sl, fp, ip, sp, lr, pc}^ │ │ ldrcs r7, [r1], -lr, asr #32 │ │ streq pc, [r0], -r8, asr #5 │ │ adcsmi r9, r7, #21 │ │ andsls r9, r3, r0, asr r8 │ │ andsls r9, r4, r1, asr r8 │ │ addshi pc, r0, r0, asr #32 │ │ ldrsbvs pc, [r4], #-138 @ 0xffffff76 @ │ │ @@ -14101,51 +11215,51 @@ │ │ stmiavs r8!, {r3, r5, r7, r8, ip, sp, pc} │ │ ldmib r5, {r3, r4, r7, r8, ip, sp, pc}^ │ │ @ instruction: 0xf1041200 │ │ stmib sp, {r3, r9, fp}^ │ │ ldmdbge r0, {r1, r2, r3, r6, r9, ip}^ │ │ @ instruction: 0x3703e9d5 │ │ ldmdage lr, {r0, r3, r7, r8, lr, pc} │ │ - @ instruction: 0xf0024651 │ │ - stmdacs r0, {r0, r1, r8, sl, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xf0054651 │ │ + stmdacs r0, {r0, r1, r2, r4, r5, r6, r7, r8, r9, fp, ip, sp, lr, pc} │ │ @ instruction: 0xf1b6bf18 │ │ @ instruction: 0xf0410601 │ │ @ instruction: 0xf8dd832e │ │ ldrcs r8, [r1], -r0, asr #32 │ │ @ instruction: 0xf10d9815 │ │ @ instruction: 0xf2c80c98 │ │ stmdacs r0, {r9, sl} │ │ ldrhi pc, [r2] │ │ @ instruction: 0x46649813 │ │ - svc 0x003ef0a8 │ │ + ldcl 0, cr15, [r2, #684] @ 0x2ac │ │ @ instruction: 0xf00046a4 │ │ @ instruction: 0xf04fbd8b │ │ - ldcl 3, cr4, [pc] @ 2f954 │ │ + ldcl 3, cr4, [pc] @ 2cc3c │ │ tstcs r0, r2, asr fp │ │ - ldcl 6, cr14, [pc, #904] @ 2fce4 │ │ + ldcl 6, cr14, [pc, #904] @ 2cfcc │ │ tstcs r0, r8, asr #22 │ │ @ instruction: 0xf8dae6de │ │ @ instruction: 0x26119078 │ │ streq pc, [r0], -r8, asr #5 │ │ eorlt pc, r4, sp, asr #17 │ │ svceq 0x0000f1b9 │ │ rschi pc, sl, r0 │ │ subeq lr, r9, r9, lsl #22 │ │ ldrsbtvs pc, [r4], #-138 @ 0xffffff76 @ │ │ andsls r0, r5, r0, lsl #2 │ │ - svc 0x0036f0a8 │ │ + ldcl 0, cr15, [r2, #684] @ 0x2ac │ │ @ instruction: 0xf0012800 │ │ strmi r8, [r2], r1, ror #6 │ │ @ instruction: 0xf8cd2500 │ │ eor r9, r8, r0, asr r0 │ │ ldrtmi r2, [r8], -r1, lsl #14 │ │ @ instruction: 0x46224659 │ │ ldmdaeq r0!, {r1, r2, r8, ip, sp, lr, pc} │ │ stmdbeq r1, {r0, r3, r5, r7, r8, ip, sp, lr, pc} │ │ - stc2 0, cr15, [pc, #-660] @ 2f718 │ │ + blx ba8f36 │ │ ldrdcc lr, [r0], -r6 │ │ svceq 0x0000f1b9 │ │ @ instruction: 0xc01cf8d6 │ │ mla r8, r6, r8, pc @ │ │ mlacs r0, r6, r8, pc @ │ │ @ instruction: 0x1602e9d6 │ │ andcc pc, r5, sl, asr #16 │ │ @@ -14157,61 +11271,61 @@ │ │ eor pc, r8, r3, lsl #17 │ │ strmi lr, [r4, -r3, asr #19] │ │ @ instruction: 0x4c06e9c3 │ │ ldmdals r5, {r0, r2, r4, ip, lr, pc} │ │ andsle r4, r2, r8, lsr #5 │ │ strlt lr, [r5], #-2518 @ 0xfffff62a │ │ sbcle r2, pc, r0, lsl #24 │ │ - @ instruction: 0xf0a84620 │ │ - stmdacs r0, {r2, r3, r4, r5, r6, r7, r9, sl, fp, sp, lr, pc} │ │ + @ instruction: 0xf0ab4620 │ │ + stmdacs r0, {r3, r4, r7, r8, sl, fp, sp, lr, pc} │ │ movwhi pc, #61441 @ 0xf001 @ │ │ strb r4, [r8, r7, lsl #12] │ │ @ instruction: 0xf10d9815 │ │ - b 13f2c70 │ │ + b 13eff58 │ │ @ instruction: 0xf0002910 │ │ @ instruction: 0xf8ddbd28 │ │ andcs r9, r0, r0, asr r0 │ │ @ instruction: 0xf50d2104 │ │ stmib sp, {r2, r3, r4, r7, fp, ip, sp, lr}^ │ │ vand q8, q0, q0 │ │ stmib sp, {r0, r2, r3, r7, r8, ip, sp}^ │ │ stmib sp, {r1, r2, r3, r6}^ │ │ stmib sp, {r1, r4, r6}^ │ │ and r0, r1, r4, asr r1 │ │ teqle r3, r0 @ │ │ - @ instruction: 0xf0044640 │ │ - ldmdals r3, {r0, r1, r6, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf0074640 │ │ + ldmdals r3, {r0, r1, r2, r5, r6, r7, fp, ip, sp, lr, pc}^ │ │ rscsle r2, r9, r0, lsl #16 │ │ movwcs r2, #8448 @ 0x2100 │ │ strcs r2, [r0, -r1, lsl #10] │ │ - blx fe927a72 │ │ + blx fe924d5a │ │ stmdaeq r0, {r0, r1, r9, sl, sp}^ │ │ strvs pc, [r7], -r3, lsl #22 │ │ strvs pc, [r7, -r3, lsl #22] │ │ bfieq r4, r3, (invalid: 12:2) │ │ - blx fe923e3e │ │ + blx fe921126 │ │ stmdacs r1, {r0, r2, sl, sp} │ │ - blx 123e02 │ │ - blx 1ffe7a │ │ + blx 1210ea │ │ + blx 1fd162 │ │ ldrmi r1, [r5], -r5, lsl #2 │ │ svclt 0x0000e7eb │ │ ... │ │ - @ instruction: 0xfffe292a │ │ + @ instruction: 0xfffe5642 │ │ svclt 0x0000bf00 │ │ andeq r0, r0, r0 │ │ svcvc 0x00f00000 @ IMB │ │ - @ instruction: 0xfffe2888 │ │ + @ instruction: 0xfffe55a0 │ │ svclt 0x0000bf00 │ │ andeq r0, r0, r0 │ │ @ instruction: 0xfff00000 @ IMB │ │ ldmdage r6!, {r0, r6, r9, sl, lr} │ │ sbcgt ip, ip, ip, asr #19 │ │ smulleq lr, ip, r1, r8 │ │ sbcgt sl, ip, lr, lsl r9 │ │ - blls 4b7ab8 │ │ + blls 4b4da0 │ │ smlalbtls lr, r0, sp, r9 │ │ andsne lr, r4, #3457024 @ 0x34c000 │ │ stmne r9, {r2, r6, r8, ip, pc} │ │ stmib sp, {r1, r6, ip, pc}^ │ │ svclt 0x00289a3e │ │ mvnscc pc, pc, asr #32 │ │ @ instruction: 0xf8939143 │ │ @@ -14221,27 +11335,27 @@ │ │ stmib sp, {r1, r2, r3, r6, r8, sl, fp, sp, pc}^ │ │ vand q8, q0, q0 │ │ vaddw.s8 , q12, d13 │ │ stmib sp, {r8, fp}^ │ │ stmib sp, {r1, r2, r3, r6}^ │ │ stmib sp, {r1, r4, r6}^ │ │ @ instruction: 0x46280154 │ │ - @ instruction: 0xffe4f003 │ │ + @ instruction: 0xf888f007 │ │ stmdacs r0, {r0, r1, r4, r6, fp, ip, pc} │ │ strdcs sp, [r0, -r9] │ │ strcs r2, [r1], #-770 @ 0xfffffcfe │ │ and r2, ip, r0, lsl #14 │ │ tstpvs r1, r3, lsl #22 @ p-variant is OBSOLETE │ │ tstpne r4, r7, lsl #22 @ p-variant is OBSOLETE │ │ - blx fe90136e │ │ + blx fe8fe656 │ │ stmdaeq r0, {r0, r1, r9, sl, sp}^ │ │ strvs pc, [r7], -r3, lsl #22 │ │ strvs pc, [r7, -r3, lsl #22] │ │ bfieq r4, r3, (invalid: 12:2) │ │ - blx fe923f06 │ │ + blx fe9211ee │ │ stmdacs r1, {r2, r9, sl, sp} │ │ ldmeq r0, {r2, r3, r5, r6, r7, r8, ip, lr, pc} │ │ stcgt 0, cr13, [lr, #892] @ 0x37c │ │ strbmi sl, [lr], -r6, asr #16 │ │ ldm r5, {r1, r2, r3, r7, lr, pc} │ │ stcge 0, cr0, [r6, #-568]! @ 0xfffffdc8 │ │ sub ip, r6, lr, lsl #1 │ │ @@ -14258,22 +11372,22 @@ │ │ vand q8, q0, q0 │ │ stmib sp, {r0, r2, r3, r7, r8, ip, sp}^ │ │ stmib sp, {r1, r2, r3, r6}^ │ │ stmib sp, {r1, r4, r6}^ │ │ and r0, r2, r4, asr r1 │ │ @ instruction: 0xf0400890 │ │ strtmi r8, [r8], -r0, lsl #10 │ │ - @ instruction: 0xff9af003 │ │ + @ instruction: 0xf83ef007 │ │ stmdacs r0, {r0, r1, r4, r6, fp, ip, pc} │ │ strdcs sp, [r0, -r9] │ │ strcs r2, [r1], -r2, lsl #6 │ │ and r2, r7, r0, lsl #14 │ │ strcs pc, [r3], #-2979 @ 0xfffff45d │ │ - blx f1cae │ │ - blx 100bce │ │ + blx eef96 │ │ + blx fdeb6 │ │ ldrmi r4, [r3], -r7, lsl #14 │ │ rscsle r0, r5, r2, asr #15 │ │ strcs pc, [r6], #-2979 @ 0xfffff45d │ │ rscle r2, r3, r1, lsl #16 │ │ tstpmi r1, r3, lsl #22 @ p-variant is OBSOLETE │ │ tstpne r6, r7, lsl #22 @ p-variant is OBSOLETE │ │ @ instruction: 0xe7eb4616 │ │ @@ -14293,15 +11407,15 @@ │ │ andls r4, r8, r2, asr #13 │ │ subge pc, r8, sp, asr #17 │ │ ldmdbls r5, {r1, r2, r3, sp, lr, pc} │ │ andsls r4, r4, #135266304 @ 0x8100000 │ │ tstls pc, r9, lsl #20 │ │ @ instruction: 0xf04042b7 │ │ ldmdals r5, {r1, r4, r6, r7, r8, r9, pc} │ │ - bleq 166c04c │ │ + bleq 1669334 │ │ @ instruction: 0x07c0ac74 │ │ bicshi pc, r0, #0 │ │ strmi r9, [r3, #2062] @ 0x80e │ │ @ instruction: 0x83bbf000 │ │ ldmdbge r6!, {r3, r6, fp, ip, pc} │ │ @ instruction: 0xf8db9163 │ │ @ instruction: 0xf1b01010 │ │ @@ -14311,16 +11425,16 @@ │ │ @ instruction: 0xf04f2900 │ │ svclt 0x00480001 │ │ andmi pc, r0, r1, lsl #1 │ │ stmdacs r1, {r3, r5, r6, r7, r8, r9, ip, sp, pc} │ │ @ instruction: 0xf8dbd151 │ │ @ instruction: 0x46202030 │ │ @ instruction: 0xf8cd4629 │ │ - @ instruction: 0xf01a819c │ │ - ldmdals r6!, {r0, r2, r3, r6, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf01d819c │ │ + ldmdals r6!, {r0, r2, r3, r4, r6, fp, ip, sp, lr, pc}^ │ │ @ instruction: 0x1774e9dd │ │ ldmib sp, {r0, r2, r4, ip, pc}^ │ │ stmdbcs r2, {r0, r1, r2, r4, r5, r6, r9} │ │ stmib sp, {r0, r1, r2, r6, r7, ip, lr, pc}^ │ │ ldmdals r5, {r0, r1, r3, r5, r6, r9} │ │ stmdage r1!, {r1, r3, r5, r6, ip, pc}^ │ │ rsbls r9, r6, r9, ror fp │ │ @@ -14328,125 +11442,125 @@ │ │ strtmi r1, [r9], -r8, ror #14 │ │ stmdage r7!, {r0, r2, r5, r6, ip, pc}^ │ │ strtmi r9, [r0], -r4, rrx │ │ @ instruction: 0xf8db936d │ │ @ instruction: 0xf8cd2000 │ │ @ instruction: 0xf89b904c │ │ @ instruction: 0xf89b9050 │ │ - @ instruction: 0xf01aa051 │ │ - ldmib sp, {r0, r1, r3, r5, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf01da051 │ │ + ldmib sp, {r0, r1, r3, r4, r5, fp, ip, sp, lr, pc}^ │ │ ldmib sp, {r2, r4, r5, r6, r8, r9, sl}^ │ │ ldmdbls r6!, {r0, r1, r2, r4, r5, r6, r9, sl, lr}^ │ │ tstls r5, r2, lsl #16 │ │ ldmdals r5, {r1, r3, r4, r5, r6, r8, ip, lr, pc} │ │ ldmdaeq r1, {r6, r9, ip, sp, lr, pc} │ │ stmdaeq r0, {r3, r6, r7, r9, ip, sp, lr, pc} │ │ ldrdge pc, [r8], #-141 @ 0xffffff73 │ │ andls r0, pc, r0, lsl #20 │ │ @ instruction: 0xf8dbe2f1 │ │ @ instruction: 0x46202018 │ │ - @ instruction: 0xf01a4629 │ │ - ldmdbls r6!, {r0, r1, r4, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf01d4629 │ │ + ldmdbls r6!, {r0, r1, r5, fp, ip, sp, lr, pc}^ │ │ @ instruction: 0x0774e9dd │ │ ldmib sp, {r0, r2, r4, r8, ip, pc}^ │ │ stmdacs r2, {r0, r1, r2, r4, r5, r6, r9, ip} │ │ ldmdals r5, {r0, r1, r3, r5, r8, ip, lr, pc} │ │ andsls r4, r4, #143654912 @ 0x8900000 │ │ andls r0, pc, r0, lsl #20 │ │ @ instruction: 0xd08e42b7 │ │ stmdage r1!, {r0, r1, r2, r3, r4, r6, r8, r9, sp, lr, pc}^ │ │ ldrsbtcs pc, [r8], -fp @ │ │ stmdage r7!, {r0, r2, r5, r6, ip, pc}^ │ │ strtmi r9, [r0], -r4, rrx │ │ @ instruction: 0xf8cd4629 │ │ ldmib fp, {r2, r3, r6, ip, pc}^ │ │ @ instruction: 0xf8cda906 │ │ - @ instruction: 0xf019819c │ │ - ldmdals r4!, {r0, r1, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf01d819c │ │ + ldmdals r4!, {r0, r1, fp, ip, sp, lr, pc}^ │ │ @ instruction: 0xd1262802 │ │ ldrsbtls lr, [r7], #-157 @ 0xffffff63 │ │ ldmib sp, {r0, r4, r9, sl, sp}^ │ │ vsra.s8 , , #8 │ │ stmib sp, {r9, sl}^ │ │ - beq 230188 │ │ + beq 22d470 │ │ @ instruction: 0xf8dd900f │ │ adcsmi sl, r7, #72 @ 0x48 │ │ svcge 0x006bf43f │ │ - blls 1ea8a34 │ │ + blls 1ea5d1c │ │ rsbsne lr, r1, #3358720 @ 0x334000 │ │ stmib sp, {r0, r2, r4, r8, fp, ip, pc}^ │ │ strbeq r0, [r0, lr, ror #14] │ │ cmnls r3, #112, 2 │ │ teqphi lr, r1 @ p-variant is OBSOLETE │ │ msreq CPSR_, #-1073741822 @ 0xc0000002 │ │ - bne 4629a0 │ │ + bne 45fc88 │ │ andeq lr, r1, r3, ror fp │ │ addhi pc, pc, r0, lsl #5 │ │ andsls r2, r5, r1 │ │ svcge 0x0075e2fe │ │ ldclvc 5, cr15, [r2], {13} │ │ svcgt 0x008e9e79 │ │ strtmi r9, [r0], -r8, rrx │ │ addeq lr, lr, ip, lsl #17 │ │ @ instruction: 0xf8db4629 │ │ strbtls r2, [sp], -r0, lsr #32 │ │ - @ instruction: 0xffbaf019 │ │ + @ instruction: 0xffcaf01c │ │ @ instruction: 0x0774e9dd │ │ ldrbvs lr, [r7, #-2525]! @ 0xfffff623 │ │ stmdacs r2, {r1, r2, r4, r5, r6, r8, fp, ip, pc} │ │ teqle fp, r5, lsl r1 │ │ vtst.8 d25, d0, d5 │ │ vshrn.i16 d16, , #8 │ │ @ instruction: 0xf8dd0800 │ │ - beq 57ed0 │ │ + beq 551b8 │ │ adcs r9, r0, #15 │ │ - bls 59639c │ │ + bls 593684 │ │ strbeq lr, [lr, -sp, asr #19]! │ │ stmib sp, {r6, r7, r8, r9, sl}^ │ │ rsbsls r4, r0, #118489088 @ 0x7100000 │ │ cmnls r3, sl, lsl #14 │ │ tstphi r6, r1 @ p-variant is OBSOLETE │ │ @ instruction: 0x6712e9db │ │ - strpl lr, [pc], #-2523 @ 2fdd4 │ │ + strpl lr, [pc], #-2523 @ 2d0bc │ │ @ instruction: 0xf89b463a │ │ adcsmi r8, ip, #40 @ 0x28 │ │ svclt 0x00384630 │ │ strtmi r4, [r9], -r2, lsr #12 │ │ - ldc 0, cr15, [lr, #-672]! @ 0xfffffd60 │ │ + bl ff4e937c │ │ @ instruction: 0xf04f42a7 │ │ svclt 0x00380100 │ │ stmdacs r0, {r0, r8, sp} │ │ andeq pc, r0, pc, asr #32 │ │ andcs fp, r1, r8, asr #30 │ │ strmi fp, [r8], -r8, lsl #30 │ │ rsble r2, r1, r0, lsl #16 │ │ andcs r2, r1, r1, lsl r3 │ │ movweq pc, #712 @ 0x2c8 @ │ │ @ instruction: 0x461d9015 │ │ ldrdge pc, [r8], #-141 @ 0xffffff73 │ │ sub r9, r1, #4864 @ 0x1300 │ │ - blls 596400 │ │ + blls 5936e8 │ │ strbeq lr, [lr, -sp, asr #19]! │ │ stmib sp, {r6, r7, r8, r9, sl}^ │ │ cmnls r0, #473956352 @ 0x1c400000 │ │ @ instruction: 0xf0019173 │ │ ldrdcs r8, [r8], -r5 │ │ - @ instruction: 0xf0a8463e │ │ - svcge 0x0074ece0 │ │ + @ instruction: 0xf0ab463e │ │ + svcge 0x0074eb7c │ │ @ instruction: 0xf0012800 │ │ @ instruction: 0xf0898105 │ │ subvs r4, r1, r0, lsl #2 │ │ tstcs r0, r4, lsl #12 │ │ @ instruction: 0xf8c02208 │ │ stmib sp, {sp, pc}^ │ │ ldrtmi r2, [r8], -r0, lsl #2 │ │ andscs r4, r0, #51380224 @ 0x3100000 │ │ - @ instruction: 0xf0194623 │ │ - strtmi pc, [r0], -r7, ror #31 │ │ - ldc 0, cr15, [r0], #672 @ 0x2a0 │ │ + @ instruction: 0xf01c4623 │ │ + qsub8mi pc, r0, r7 @ │ │ + bl 11693f8 │ │ ldrbteq lr, [r4], #-2525 @ 0xfffff623 │ │ @ instruction: 0xf0402801 │ │ ldmib sp, {r1, r2, r3, r5, r7, pc}^ │ │ ldrcs r1, [r1, #-118] @ 0xffffff8a │ │ streq pc, [r0, #-712] @ 0xfffffd38 │ │ ldrdge pc, [r8], #-141 @ 0xffffff73 │ │ ldmdals r8!, {r0, r1, r4, ip, pc}^ │ │ @@ -14456,77 +11570,77 @@ │ │ ldmib fp, {r4, r5, lr}^ │ │ strls r0, [sl, -sl, lsl #2] │ │ streq pc, [r1, -r4, lsl #1] │ │ movwcs lr, #35291 @ 0x89db │ │ addeq lr, r3, sp, lsl #17 │ │ stmdbls sl, {r2, r4, r5, r6, fp, sp, pc} │ │ subls pc, ip, sp, asr #17 │ │ - blx 3ebec0 │ │ + @ instruction: 0xf92ef008 │ │ andsls r9, r5, r6, ror r8 │ │ ldrsbeq lr, [r7, #-157]! @ 0xffffff63 │ │ @ instruction: 0x2674e9dd │ │ @ instruction: 0xd1212a01 │ │ pkhbtmi r9, r1, r5, lsl #20 │ │ - beq 4d4314 │ │ + beq 4d15fc │ │ subs r9, r3, #-268435456 @ 0xf0000000 │ │ andeq pc, r1, r8, lsl #1 │ │ smlabbeq r1, sl, r0, pc @ │ │ strvs lr, [r0, -sp, asr #19] │ │ stmib sp, {r2, r4, r5, r6, r9, sl, fp, sp, pc}^ │ │ strtmi r1, [sl], -r2 │ │ ldrtmi r9, [r0], -sl, lsl #18 │ │ - @ instruction: 0xf0054623 │ │ - ldmib sp, {r0, r8, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf0084623 │ │ + ldmib sp, {r0, r1, r2, r5, r6, r7, r8, fp, ip, sp, lr, pc}^ │ │ ldmib sp, {r0, r1, r2, r4, r5, r6, r8, r9, sp}^ │ │ stmdacs r1, {r2, r4, r5, r6, r8, sl} │ │ adchi pc, sp, r0, asr #32 │ │ @ instruction: 0x46149876 │ │ tstls r4, #21 │ │ @ instruction: 0xe1b40a00 │ │ @ instruction: 0xf0002e00 │ │ - bls 590344 │ │ + bls 58d62c │ │ stmib sp, {r0, r1, r4, r5, r9, sl, lr}^ │ │ ldmdage r4!, {sp}^ │ │ tstls r2, r1, ror #20 │ │ - @ instruction: 0xf0064641 │ │ - mrcls 8, 3, APSR_nzcv, cr4, cr5, {5} │ │ + @ instruction: 0xf0094641 │ │ + cdpls 8, 7, cr15, cr4, cr5, {6} │ │ @ instruction: 0x01d4f89d │ │ andscs r9, r1, r5, lsl r0 │ │ andeq pc, r0, r8, asr #5 │ │ @ instruction: 0xf0404286 │ │ ldmdals r5, {r0, r1, r2, r4, r9, pc} │ │ @ instruction: 0xf00007c0 │ │ andcs r8, ip, r1, lsr #3 │ │ svclt 0x00082c00 │ │ andls r2, r7, r8 │ │ rscshi pc, r8, r0 │ │ ldrdls pc, [ip], #-141 @ 0xffffff73 │ │ andcs r9, r0, sl, lsl #18 │ │ andls r9, r1, r7, lsl #20 │ │ movwcs sl, #2164 @ 0x874 │ │ - @ instruction: 0xff6af019 │ │ + @ instruction: 0xff7af01c │ │ andsls r9, r5, r6, ror r8 │ │ ldrsbtne lr, [r7], #-157 @ 0xffffff63 │ │ @ instruction: 0x2674e9dd │ │ @ instruction: 0xf0002a01 │ │ mcrcs 1, 0, r8, cr0, cr6, {5} │ │ @ instruction: 0x81b9f000 │ │ - bcs 2567c8 │ │ + bcs 253ab0 │ │ subshi pc, sp, r1, asr #32 │ │ movwcs lr, #35291 @ 0x89db │ │ strmi pc, [r0, #-79] @ 0xffffffb1 │ │ ldmdavs r7!, {r2, r4, r5, r6, fp, sp, lr} │ │ - bne feec0138 │ │ + bne feebd420 │ │ andeq lr, r3, #116, 22 @ 0x1d000 │ │ andcs sp, r8, #223232 @ 0x36800 │ │ stmib sp, {r1, ip, pc}^ │ │ ldmdage r4!, {r8, sp}^ │ │ strbmi sl, [r1], -r1, ror #20 │ │ - @ instruction: 0xf0064633 │ │ - mrcls 8, 3, APSR_nzcv, cr4, cr1, {3} │ │ + @ instruction: 0xf0094633 │ │ + cdpls 8, 7, cr15, cr4, cr1, {4} │ │ ldrdls pc, [ip], #-141 @ 0xffffff73 │ │ @ instruction: 0x01d4f89d │ │ andscs r9, r1, r5, lsl r0 │ │ andeq pc, r0, r8, asr #5 │ │ @ instruction: 0xf0404286 │ │ ldmdals r5, {r4, r6, r7, r8, pc} │ │ strbeq r9, [r0, sl, lsl #18] │ │ @@ -14534,46 +11648,46 @@ │ │ bicle r9, r0, r5, lsl r0 │ │ ldrcs lr, [r1, #-397] @ 0xfffffe73 │ │ vmull.s8 q9, d8, d0 │ │ @ instruction: 0xf0000500 │ │ ldmib sp, {r0, r3, r5, r7, pc}^ │ │ stmdbge r8!, {r0, r1, r2, r4, r5, r6, ip, sp}^ │ │ andls sl, r0, r4, ror #20 │ │ - @ instruction: 0xf0044638 │ │ - ldclls 12, cr15, [r4], #-28 @ 0xffffffe4 │ │ + @ instruction: 0xf0074638 │ │ + ldclls 12, cr15, [r4], #-412 @ 0xfffffe64 │ │ ldrdge pc, [r8], #-141 @ 0xffffff73 │ │ @ instruction: 0x01d4f89d │ │ andsls r4, r5, ip, lsr #5 │ │ rschi pc, r1, r0, asr #32 │ │ bfieq r9, r5, (invalid: 16:0) │ │ mrshi pc, (UNDEF: 68) @ │ │ andcs sl, r0, r4, ror pc │ │ ldrtmi r9, [r1], -r1 │ │ andcs r4, r9, #56, 12 @ 0x3800000 │ │ - @ instruction: 0xf0192300 │ │ - ldmib sp, {r0, r2, r3, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf01c2300 │ │ + ldmib sp, {r0, r2, r3, r4, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ stmdacs r1, {r2, r4, r5, r6, sl} │ │ msrhi SPSR_fx, r0 │ │ @ instruction: 0xf0002c00 │ │ ldmib sp, {r1, r3, r5, r6, r8, pc}^ │ │ stmdbge r8!, {r0, r1, r2, r4, r5, r6, ip, sp}^ │ │ andls sl, r0, r4, ror #20 │ │ - @ instruction: 0xf0044638 │ │ - @ instruction: 0x9c74fbe1 │ │ + @ instruction: 0xf0074638 │ │ + ldclls 12, cr15, [r4], #-260 @ 0xfffffefc │ │ @ instruction: 0x01d4f89d │ │ andsls r4, r5, ip, lsr #5 │ │ adcshi pc, sp, r0, asr #32 │ │ bfieq r9, r5, (invalid: 16:0) │ │ andeq pc, r0, pc, asr #32 │ │ bicsle r9, r9, r5, lsl r0 │ │ ldcls 1, cr14, [r3], {85} @ 0x55 │ │ @ instruction: 0xf0002d00 │ │ stmdbge r4!, {r8, pc}^ │ │ - @ instruction: 0xf0054630 │ │ - ldclls 12, cr15, [r4, #-348]! @ 0xfffffea4 │ │ + @ instruction: 0xf0084630 │ │ + ldclls 13, cr15, [r4, #-428]! @ 0xfffffe54 │ │ @ instruction: 0x01d4f89d │ │ andscs r9, r1, r5, lsl r0 │ │ andeq pc, r0, r8, asr #5 │ │ @ instruction: 0xf0404285 │ │ ldmdals r5, {r2, r4, r5, r6, r7, pc} │ │ @ instruction: 0xf00007c0 │ │ andcs r8, r8, r9, lsl #2 │ │ @@ -14584,37 +11698,37 @@ │ │ @ instruction: 0xf1ba080e │ │ svclt 0x00080f00 │ │ @ instruction: 0xf8dd4680 │ │ @ instruction: 0xf000a048 │ │ mulcs r0, r9, r0 │ │ andls r9, r1, sl, lsl #18 │ │ @ instruction: 0x4642a874 │ │ - @ instruction: 0xf0192300 │ │ - ldmib sp, {r0, r1, r2, r3, r4, r5, r7, r9, sl, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf01c2300 │ │ + ldmib sp, {r0, r1, r2, r3, r6, r7, r9, sl, fp, ip, sp, lr, pc}^ │ │ ldmib sp, {r0, r1, r2, r4, r5, r6, r8, fp, sp, lr}^ │ │ ldmdbls r6!, {r2, r4, r5, r6, r8, sl}^ │ │ tstls r5, r1, lsl #16 │ │ teqphi ip, r0 @ p-variant is OBSOLETE │ │ @ instruction: 0xf0002d00 │ │ ldmib fp, {r0, r1, r6, r8, pc}^ │ │ strtmi r0, [r9], -pc, lsl #14 │ │ @ instruction: 0x463a9c15 │ │ svclt 0x003842bc │ │ - @ instruction: 0xf0a84622 │ │ - adcmi lr, r7, #202752 @ 0x31800 │ │ + @ instruction: 0xf0ab4622 │ │ + adcmi lr, r7, #368640 @ 0x5a000 │ │ tstpeq r0, pc, asr #32 @ p-variant is OBSOLETE │ │ smlabbcs r1, r8, pc, fp @ │ │ @ instruction: 0xf04f2800 │ │ svclt 0x00c80000 │ │ svclt 0x00082001 │ │ stmdacs r1, {r3, r9, sl, lr} │ │ ldmdage r4!, {r0, r1, r4, r6, r7, ip, lr, pc}^ │ │ ldrtmi sl, [r2], -r4, ror #18 │ │ - @ instruction: 0xf005464b │ │ - ldclls 12, cr15, [r4, #-20]! @ 0xffffffec │ │ + @ instruction: 0xf008464b │ │ + ldclls 13, cr15, [r4, #-100]! @ 0xffffff9c │ │ @ instruction: 0xf89d2311 │ │ vsra.s64 q8, q2, #56 │ │ addsmi r0, sp, #0, 6 │ │ @ instruction: 0xf0409015 │ │ ldmdals r5, {r1, r2, r3, r4, r5, r8, pc} │ │ @ instruction: 0xf04f07c0 │ │ andsls r0, r5, r0 │ │ @@ -14623,266 +11737,266 @@ │ │ strtmi r2, [ip], -r1 │ │ @ instruction: 0xf8dd9015 │ │ rsc sl, r3, r8, asr #32 │ │ ldrdls pc, [ip], #-141 @ 0xffffff73 │ │ andcs r9, r0, sl, lsl #18 │ │ andls r9, r1, r7, lsl #20 │ │ movwcs sl, #2164 @ 0x874 │ │ - mrc2 0, 3, pc, cr2, cr9, {0} │ │ + mcr2 0, 4, pc, cr2, cr12, {0} @ │ │ andsls r9, r5, r6, ror r8 │ │ ldrsbtne lr, [r7], #-157 @ 0xffffff63 │ │ @ instruction: 0x2674e9dd │ │ @ instruction: 0xf0402a00 │ │ mcrcs 0, 0, r8, cr0, cr14, {5} │ │ sbchi pc, r1, r0 │ │ - bcs 2569b8 │ │ + bcs 253ca0 │ │ strbhi pc, [r5, -r0, asr #32]! @ │ │ movwcs lr, #43483 @ 0xa9db │ │ strmi pc, [r0, #-79] @ 0xffffffb1 │ │ ldmdavs r7!, {r2, r4, r5, r6, fp, sp, lr} │ │ - blne ff4c0328 │ │ + blne ff4bd610 │ │ andeq lr, r4, #117760 @ 0x1cc00 │ │ andcs sp, r8, #223232 @ 0x36800 │ │ stmib sp, {r1, ip, pc}^ │ │ ldmdage r4!, {r8, sp}^ │ │ strbmi sl, [r1], -r1, ror #20 │ │ - @ instruction: 0xf0054633 │ │ - mrcls 15, 3, APSR_nzcv, cr4, cr9, {3} │ │ + @ instruction: 0xf0084633 │ │ + cdpls 15, 7, cr15, cr4, cr9, {4} │ │ ldrdls pc, [ip], #-141 @ 0xffffff73 │ │ @ instruction: 0x01d4f89d │ │ andscs r9, r1, r5, lsl r0 │ │ andeq pc, r0, r8, asr #5 │ │ @ instruction: 0xf0404286 │ │ ldmdals r5, {r3, r4, r6, r7, pc} │ │ strbeq r9, [r0, sl, lsl #18] │ │ andeq pc, r0, pc, asr #32 │ │ bicle r9, r0, r5, lsl r0 │ │ stmdbls r8, {r0, r2, r4, r7, sp, lr, pc} │ │ andsls r9, r3, #483328 @ 0x76000 │ │ stmdahi r9, {r3, r7, fp, ip, sp, lr} │ │ - b 1096ba4 │ │ + b 1093e8c │ │ andsls r4, r4, #0 │ │ adds r9, r5, pc │ │ stmdbls sl, {sp} │ │ ldmdage r4!, {r0, ip, pc}^ │ │ movwcs r4, #1602 @ 0x642 │ │ - mcr2 0, 1, pc, cr6, cr9, {0} @ │ │ + mrc2 0, 1, pc, cr6, cr12, {0} │ │ ldmdbvs r7!, {r0, r2, r3, r4, r6, r7, r8, fp, sp, lr, pc}^ │ │ ldrbeq lr, [r4, #-2525]! @ 0xfffff623 │ │ stmdacs r0, {r1, r2, r4, r5, r6, r8, fp, ip, pc} │ │ @ instruction: 0xf0409115 │ │ stccs 0, cr8, [r0, #-652] @ 0xfffffd74 │ │ adchi pc, sl, r0 │ │ @ instruction: 0x0712e9db │ │ ldcls 6, cr4, [r5], {41} @ 0x29 │ │ adcsmi r4, ip, #60817408 @ 0x3a00000 │ │ qasxmi fp, r2, r8 │ │ - bl b6c4ac │ │ + stmib r0, {r0, r1, r3, r5, r7, ip, sp, lr, pc}^ │ │ @ instruction: 0xf04f42a7 │ │ svclt 0x00380100 │ │ stmdacs r0, {r0, r8, sp} │ │ andeq pc, r0, pc, asr #32 │ │ andcs fp, r1, r8, asr #30 │ │ strmi fp, [r8], -r8, lsl #30 │ │ bicsle r2, r3, r0, lsl #16 │ │ stmdbge r4!, {r2, r4, r5, r6, fp, sp, pc}^ │ │ @ instruction: 0x464b4632 │ │ - blx 1b6c24a │ │ + stc2 0, cr15, [r0], {8} │ │ tstcs r1, #116, 26 @ 0x1d00 │ │ @ instruction: 0x01d4f89d │ │ movweq pc, #712 @ 0x2c8 @ │ │ mulsls r5, sp, r2 │ │ adchi pc, r5, r0, asr #32 │ │ bfieq r9, r5, (invalid: 16:0) │ │ andeq pc, r0, pc, asr #32 │ │ @ instruction: 0xd1bd9015 │ │ andcs lr, r1, pc, ror r0 │ │ stmdbls r8, {r0, r3, r4, sp, lr, pc} │ │ rsbsmi lr, r6, #3620864 @ 0x374000 │ │ stmdahi r9, {r3, r7, fp, ip, sp, lr} │ │ - b 1094ab8 │ │ + b 1091da0 │ │ andls r4, pc, r0 │ │ @ instruction: 0xf8dd2311 │ │ vmla.i d26, d8, d0[2] │ │ ands r0, r1, r0, lsl #6 │ │ ldrcs r2, [r1], -r0 │ │ vshr.s8 d25, d5, #8 │ │ @ instruction: 0xf8dd0600 │ │ rsbs r9, r3, ip, asr #32 │ │ eors r2, r5, r0 │ │ tstcs r1, #0 │ │ vshr.s8 d25, d5, #8 │ │ @ instruction: 0xf8dd0300 │ │ ldrmi sl, [sp], -r8, asr #32 │ │ ldrmi sl, [r8], lr, ror #16 │ │ - mrc2 0, 3, pc, cr12, cr7, {0} │ │ + mcr2 0, 4, pc, cr12, cr10, {0} @ │ │ stmdacs r0, {r1, r2, r3, r5, r6, fp, ip, pc} │ │ stmdals pc!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ @ │ │ - bl feb6c460 │ │ + b fe9754 │ │ @ instruction: 0x462f9e14 │ │ stmdage r8!, {r1, r2, r5, r8, sl, fp, sp, pc}^ │ │ - mrc2 0, 3, pc, cr0, cr7, {0} │ │ + mcr2 0, 4, pc, cr0, cr10, {0} @ │ │ stmdacs r0, {r3, r5, r6, fp, ip, pc} │ │ stmdals r9!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ - bl fe86c478 │ │ + b ce976c │ │ ssatmi r9, #2, r4, lsl #12 │ │ adcsmi r4, r7, #73400320 @ 0x4600000 │ │ stcge 4, cr15, [r3], #252 @ 0xfc │ │ andsls lr, r4, r3, ror r0 │ │ ldmdals r5, {r0, r3, r7, r9, sl, lr} │ │ - beq 5b778 │ │ + beq 58a60 │ │ andcs lr, r1, r5, asr #32 │ │ @ instruction: 0x26119015 │ │ vqdmull.s q13, d8, d22 │ │ eors r0, pc, r0, lsl #12 │ │ ldrsbtne lr, [r6], #-157 @ 0xffffff63 │ │ andcs lr, r1, r2, asr #11 │ │ @ instruction: 0x462c9015 │ │ strtmi sl, [r8], lr, ror #16 │ │ - mcr2 0, 2, pc, cr12, cr7, {0} @ │ │ + mrc2 0, 2, pc, cr12, cr10, {0} │ │ stmdacs r0, {r1, r2, r3, r5, r6, fp, ip, pc} │ │ stmdals pc!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ @ │ │ - bl 1f6c4c0 │ │ + b 3e97b4 │ │ ldrvs lr, [r3, #-2525] @ 0xfffff623 │ │ stmdage r8!, {r0, r1, r2, r5, r9, sl, lr}^ │ │ - mcr2 0, 2, pc, cr0, cr7, {0} @ │ │ + mrc2 0, 2, pc, cr0, cr10, {0} │ │ stmdacs r0, {r3, r5, r6, fp, ip, pc} │ │ stmdals r9!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ - bl 1c6c4d8 │ │ + b e97cc │ │ stcge 5, cr9, [r6, #-80]! @ 0xffffffb0 │ │ @ instruction: 0x464646b1 │ │ @ instruction: 0xf43f42b7 │ │ sub sl, r2, r2, ror ip │ │ tstcs r1, #1376256 @ 0x150000 │ │ subsls pc, r0, sp, asr #17 │ │ @ instruction: 0xf2c84634 │ │ - beq 30f48 │ │ + beq 2e230 │ │ str r9, [r7, pc]! │ │ andcs r2, r1, r1, lsl r3 │ │ vshr.s8 d25, d5, #8 │ │ ldrmi r0, [sp], -r0, lsl #6 │ │ stcge 5, cr14, [r6, #-368]! @ 0xfffffe90 │ │ - bls 1e16780 │ │ + bls 1e13a68 │ │ ldrsbls pc, [r8, #141] @ 0x8d @ │ │ stmdahi r9, {r3, r7, fp, ip, sp, lr} │ │ - b 1094bbc │ │ + b 1091ea4 │ │ andls r4, pc, r0 │ │ - @ instruction: 0xf017a86e │ │ - stmdals lr!, {r0, r1, r4, r9, sl, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf01aa86e │ │ + stmdals lr!, {r0, r1, r5, r9, sl, fp, ip, sp, lr, pc}^ │ │ svclt 0x001c2800 │ │ - @ instruction: 0xf06c986f │ │ - ldrtmi lr, [r7], -r4, asr #22 │ │ + @ instruction: 0xf06f986f │ │ + @ instruction: 0x4637e9d6 │ │ @ instruction: 0xf2c82611 │ │ adcsmi r0, r7, #0, 12 │ │ mcrrge 4, 3, pc, r5, cr15 @ │ │ stmdbls r8, {r0, r2, r4, sp, lr, pc} │ │ rsbsmi lr, r6, #3620864 @ 0x374000 │ │ stmdahi r9, {r3, r7, fp, ip, sp, lr} │ │ - b 1094bf0 │ │ + b 1091ed8 │ │ andls r4, pc, r0 │ │ stmdage lr, {r1, r3, r4, r5, r6, r8, r9, sl, sp, lr, pc}^ │ │ - stc2l 0, cr15, [r2, #-4]! │ │ + mrrc2 0, 0, pc, r4, cr4 @ │ │ @ instruction: 0xf1b49c48 │ │ @ instruction: 0xf0404f00 │ │ ldrtmi r8, [r7], -r4, lsl #11 │ │ ldrdlt pc, [r4], -sp @ │ │ @ instruction: 0xf8cde021 │ │ @ instruction: 0xf8dd904c │ │ and r9, r0, ip, lsr r0 │ │ stmdage lr, {r0, r1, r2, r4, r5, r9, sl, lr}^ │ │ - ldc2l 0, cr15, [r0, #-4] │ │ + mcrr2 0, 0, pc, r2, cr4 @ │ │ @ instruction: 0xf8dd9c48 │ │ @ instruction: 0xf1b4b024 │ │ andsle r4, r2, r0, lsl #30 │ │ @ instruction: 0x8649e9dd │ │ @ instruction: 0xf108b15e │ │ @ instruction: 0xf8550504 │ │ stmdacs r0, {r2, sl, fp} │ │ stmdavs r8!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ - stmib r8!, {r3, r5, r7, ip, sp, lr, pc}^ │ │ + ldmda ip!, {r0, r1, r3, r5, r7, ip, sp, lr, pc}^ │ │ cdpcc 5, 0, cr3, cr1, cr12, {0} │ │ @ instruction: 0xb114d1f5 │ │ - @ instruction: 0xf0a84640 │ │ - ldmib sp, {r1, r5, r6, r7, r8, fp, sp, lr, pc}^ │ │ + @ instruction: 0xf0ab4640 │ │ + ldmib sp, {r1, r2, r4, r5, r6, fp, sp, lr, pc}^ │ │ @ instruction: 0xf8dd453f │ │ cmplt r5, r0, asr #32 │ │ ldreq pc, [r0], -r4, lsl #2 │ │ stmdacs r0, {r4, r5, fp, sp, lr} │ │ ldmdavs r0!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ - ldmib r4, {r3, r5, r7, ip, sp, lr, pc}^ │ │ + stmda r8!, {r0, r1, r3, r5, r7, ip, sp, lr, pc}^ │ │ stccc 6, cr3, [r1, #-192] @ 0xffffff40 │ │ ldmdals lr!, {r1, r2, r4, r5, r6, r7, r8, ip, lr, pc} │ │ svclt 0x001c2800 │ │ - @ instruction: 0xf0a84620 │ │ - ldmib sp, {r2, r3, r6, r7, r8, fp, sp, lr, pc}^ │ │ + @ instruction: 0xf0ab4620 │ │ + ldmib sp, {r5, r6, fp, sp, lr, pc}^ │ │ cmplt r5, r9, lsr r5 │ │ @ instruction: 0xf8561d26 │ │ stmdacs r0, {r2, sl, fp} │ │ ldmdavs r0!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ - stmib r0, {r3, r5, r7, ip, sp, lr, pc}^ │ │ + ldmda r4, {r0, r1, r3, r5, r7, ip, sp, lr, pc}^ │ │ stccc 6, cr3, [r1, #-48] @ 0xffffffd0 │ │ ldmdals r8!, {r0, r2, r4, r5, r6, r7, r8, ip, lr, pc} │ │ svclt 0x001c2800 │ │ - @ instruction: 0xf0a84620 │ │ - @ instruction: 0x2611e9b8 │ │ + @ instruction: 0xf0ab4620 │ │ + ldrcs lr, [r1], -ip, asr #16 │ │ ldceq 1, cr15, [r8], {13} │ │ streq pc, [r0], -r8, asr #5 │ │ @ instruction: 0xd10042b7 │ │ @ instruction: 0xf8d84637 │ │ stmdacs r0, {r6} │ │ ldrhi pc, [r8, #64]! @ 0x40 │ │ rscscc pc, pc, pc, asr #32 │ │ @ instruction: 0xf8c846ba │ │ stmdbge lr, {r6}^ │ │ strhteq lr, [ip], #140 @ 0x8c │ │ rscgt r4, ip, r8, lsl #12 │ │ strhteq lr, [ip], #140 @ 0x8c │ │ ldm ip, {r2, r3, r5, r6, r7, lr, pc} │ │ ldrshtgt r0, [ip], #12 │ │ - @ instruction: 0xf01ba836 │ │ - bge dee8dc │ │ + @ instruction: 0xf01ea836 │ │ + bge debc04 │ │ @ instruction: 0x5711e9d8 │ │ ldrdvs pc, [ip], #-136 @ 0xffffff78 │ │ @ instruction: 0xf1b5ca07 │ │ - blls 3840a8 │ │ + blls 381390 │ │ andle ip, ip, r7, lsl #6 │ │ @ instruction: 0x463cb136 │ │ - bleq 16e604 │ │ - b fea6c668 │ │ + bleq 16b8ec │ │ + ldmdb sl!, {r0, r1, r2, r3, r5, r6, ip, sp, lr, pc} │ │ mvnsle r3, r1, lsl #28 │ │ svclt 0x001c2d00 │ │ - @ instruction: 0xf0a84638 │ │ - @ instruction: 0xf8d8e980 │ │ + @ instruction: 0xf0ab4638 │ │ + @ instruction: 0xf8d8e814 │ │ ldmib sp, {r6}^ │ │ andcc r1, r1, r3, lsl r2 │ │ subeq pc, r0, r8, asr #17 │ │ vshr.s8 d18, d1, #8 │ │ strmi r0, [r2] │ │ ldmdbge pc!, {r0, r1, r2, r3, r4, r5, r6, sl, ip, sp, lr, pc}^ @ │ │ - bge 6d6914 │ │ + bge 6d3bfc │ │ stmdale r7!, {r0, r2, r8, fp, sp} │ │ @ instruction: 0xf001e8df │ │ @ instruction: 0x03260303 │ │ ldcls 3, cr4, [r7], {61} @ 0x3d │ │ eorsle r2, r3, r0, lsl #24 │ │ tstle sp, r3, lsl #18 │ │ @ instruction: 0xf8909811 │ │ stmdacc r2, {r5} │ │ vadd.i8 d2, d0, d3 │ │ ldm pc, {r1, r4, r5, r7, sl, pc}^ @ │ │ andeq pc, r4, r0, lsl r0 @ │ │ strdeq r0, [r4], -r1 │ │ ldmib sp, {r0, r4, r5, r6, r7, sl}^ │ │ @ instruction: 0x46150118 │ │ - cdp2 0, 8, cr15, cr15, cr4, {5} │ │ - bmi 46bd24 │ │ - bleq cab62c │ │ - bleq 106c10c │ │ - bleq fe86c034 │ │ - bleq 2ebc48 │ │ + stc2 0, cr15, [r3, #668]! @ 0x29c │ │ + bmi 46900c │ │ + bleq ca8914 │ │ + bleq 10693f4 │ │ + bleq fe86931c │ │ + bleq 2e8f30 │ │ stcllt 0, cr15, [r6] │ │ @ instruction: 0xf8909811 │ │ stmdacc r2, {r5} │ │ vadd.i8 d2, d0, d3 │ │ ldm pc, {r2, r4, r7, sl, pc}^ @ │ │ andeq pc, r4, r0, lsl r0 @ │ │ andeq r0, r4, r5, lsl #9 │ │ @@ -14931,47 +12045,47 @@ │ │ svclt 0x00480101 │ │ smlabbmi r0, r2, r0, pc @ │ │ stmdbcs r1, {r0, r4, r6, r7, r8, ip, sp, pc} │ │ @ instruction: 0xf8d8d12e │ │ @ instruction: 0x46192030 │ │ strtmi r9, [r8], -r7, rrx │ │ @ instruction: 0x469a46d1 │ │ - blx 1dec67e │ │ + blx fe1e9972 │ │ ldmib sp, {r3, r6, fp, ip, pc}^ │ │ andsls r1, r5, r6, asr #14 │ │ subeq lr, r9, #3620864 @ 0x374000 │ │ teqle sp, r2, lsl #18 │ │ @ instruction: 0x46539915 │ │ @ instruction: 0x46049214 │ │ - beq 28215c │ │ + beq 27f444 │ │ mvn r9, #-1073741821 @ 0xc0000003 │ │ @ instruction: 0x2018f8d8 │ │ ldrmi r4, [r9], -r8, lsr #12 │ │ - @ instruction: 0xf019461d │ │ - stmdbls r8, {r0, r1, r2, r3, r4, r6, r8, r9, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf01c461d │ │ + stmdbls r8, {r0, r1, r2, r3, r5, r6, r8, r9, fp, ip, sp, lr, pc}^ │ │ @ instruction: 0x0746e9dd │ │ ldmib sp, {r0, r2, r4, r8, ip, pc}^ │ │ stmdacs r2, {r0, r3, r6, r9, ip} │ │ ldmdals r5, {r1, r2, r3, r6, r8, ip, lr, pc} │ │ andsls r4, r4, #12, 12 @ 0xc00000 │ │ - beq 41f0c │ │ + beq 3f1f4 │ │ bic r9, pc, #15 │ │ stmdage r1!, {r0, r1, r2, r5, r6, ip, pc}^ │ │ ldrsbtcs pc, [r8], -r8 @ │ │ rsbls r4, r5, r9, lsl r6 │ │ rsbls sl, r4, r7, ror #16 │ │ ldmib r8, {r3, r5, r9, sl, lr}^ │ │ ldrmi r4, [r9], r6, lsl #12 │ │ - blx 10ec6e6 │ │ + blx 14e99da │ │ stmdacs r2, {r1, r2, r6, fp, ip, pc} │ │ ldmib sp, {r1, r2, r3, r6, r8, ip, lr, pc}^ │ │ ldrcs r4, [r1], -r9, asr #32 │ │ ldrdvc lr, [r7, #-157] @ 0xffffff63 │ │ streq pc, [r0], -r8, asr #5 │ │ - beq 2546e8 │ │ + beq 2519d0 │ │ @ instruction: 0x464b9115 │ │ @ instruction: 0xf8dd900f │ │ @ instruction: 0xe3afa048 │ │ rsbseq lr, r1, #3358720 @ 0x334000 │ │ rsbsls r9, r0, r5, lsl r8 │ │ @ instruction: 0x0050f898 │ │ stmdage r1!, {r3, ip, pc}^ │ │ @@ -14979,109 +12093,109 @@ │ │ stmib sp, {r1, r2, r3, r5, r6, fp, sp, pc}^ │ │ ldrbmi r1, [r1], -lr, ror #14 │ │ stmdage r7!, {r0, r2, r5, r6, ip, pc}^ │ │ strtmi r9, [r8], -r4, rrx │ │ @ instruction: 0x46559373 │ │ ldrdcs pc, [r0], -r8 │ │ @ instruction: 0x9051f898 │ │ - blx 5ec73e │ │ + blx 9e9a32 │ │ @ instruction: 0x0746e9dd │ │ @ instruction: 0x4649e9dd │ │ stmdacs r2, {r3, r6, r8, fp, ip, pc} │ │ teqle fp, r5, lsl r1 │ │ @ instruction: 0xf8dd9815 │ │ - beq 58810 │ │ + beq 55af8 │ │ rsb r9, r3, #15 │ │ stmib sp, {r0, r1, r3, r6, r8, r9, fp, ip, pc}^ │ │ ldmdbls r5, {r0, r1, r2, r4, r5, r6, r9, ip} │ │ ldrbeq lr, [r4, -sp, asr #19]! │ │ cmnls r6, r0, asr #15 │ │ @ instruction: 0xf0009379 │ │ @ instruction: 0xf1088467 │ │ - blgt 3f1390 │ │ - bl 1cf6f54 │ │ + blgt 3ee678 │ │ + bl 1cf423c │ │ vaddl.s8 q0, d0, d1 │ │ andcs r8, r1, fp, lsl #1 │ │ @ instruction: 0x901546b2 │ │ cmp pc, #4864 @ 0x1300 │ │ @ instruction: 0xf50daf47 │ │ @ instruction: 0x960a7cde │ │ svcgt 0x008e46c2 │ │ stm ip, {r0, r1, r3, r6, r9, sl, fp, ip, pc} │ │ strbmi r0, [r9], -lr, lsl #1 │ │ ldrdcs pc, [r0], -r8 @ │ │ strtmi r9, [r8], -lr, rrx │ │ - @ instruction: 0xf0199673 │ │ - ldmib sp, {r0, r1, r2, r3, r4, r6, r7, r9, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf01c9673 │ │ + ldmib sp, {r0, r1, r2, r3, r5, r6, r7, r9, fp, ip, sp, lr, pc}^ │ │ ldmib sp, {r1, r2, r6, r8, r9, sl}^ │ │ stmdbls r8, {r0, r3, r6, r8, sl, sp, lr}^ │ │ tstls r5, r2, lsl #16 │ │ ldmdals r5, {r1, r2, r4, r5, r8, ip, lr, pc} │ │ - beq 4229c │ │ + beq 3f584 │ │ and r9, r8, #15 │ │ - bls 596c90 │ │ + bls 593f78 │ │ ldrbeq lr, [r4, -sp, asr #19]! │ │ stmib sp, {r6, r7, r8, r9, sl}^ │ │ rsbsls r4, r6, #124780544 @ 0x7700000 │ │ cmnls r9, sl, lsl #14 │ │ ldrthi pc, [r0], #-0 @ │ │ @ instruction: 0x6712e9d8 │ │ ldmib r8, {r0, r2, r3, r6, r9, sl, lr}^ │ │ ldrtmi sl, [sl], -pc, lsl #8 │ │ mlals r8, r8, r8, pc @ │ │ @ instruction: 0x463042bc │ │ qasxmi fp, r2, r8 │ │ - @ instruction: 0xf0a84651 │ │ - adcmi lr, r7, #104, 16 @ 0x680000 │ │ + @ instruction: 0xf0aa4651 │ │ + adcmi lr, r7, #252, 28 @ 0xfc0 │ │ tstpeq r0, pc, asr #32 @ p-variant is OBSOLETE │ │ tstcs r1, r8, lsr pc │ │ @ instruction: 0xf04f2800 │ │ svclt 0x00480000 │ │ svclt 0x00082001 │ │ stmdacs r0, {r3, r9, sl, lr} │ │ ldrcs sp, [r1, #-94] @ 0xffffffa2 │ │ andsls r2, r5, r1 │ │ streq pc, [r0, #-712] @ 0xfffffd38 │ │ ldrdge pc, [r8], #-141 @ 0xffffff73 │ │ mvn r9, r3, lsl ip │ │ - blls 596cf4 │ │ + blls 593fdc │ │ ldrbeq lr, [r4, -sp, asr #19]! │ │ stmib sp, {r6, r7, r8, r9, sl}^ │ │ cmnls r6, #499122176 @ 0x1dc00000 │ │ @ instruction: 0xf0009179 │ │ strdcs r8, [r8], -pc @ │ │ - @ instruction: 0xf0a8463e │ │ - svcge 0x0046e80a │ │ + @ instruction: 0xf0aa463e │ │ + svcge 0x0046eea6 │ │ @ instruction: 0xf0002800 │ │ - bls 2d18a8 │ │ + bls 2ceb90 │ │ tstpmi r0, pc, asr #32 @ p-variant is OBSOLETE │ │ strmi r6, [r4], -r4 │ │ subvs r4, r1, r1, asr r0 │ │ andcs r2, r8, #0, 2 │ │ smlabtcs r0, sp, r9, lr │ │ @ instruction: 0x46314638 │ │ @ instruction: 0x46232210 │ │ - @ instruction: 0xf01946d0 │ │ - strtmi pc, [r0], -pc, lsl #22 │ │ - svc 0x00d8f0a7 │ │ + @ instruction: 0xf01c46d0 │ │ + @ instruction: 0x4620fb1f │ │ + cdp 0, 6, cr15, cr12, cr10, {5} │ │ strbeq lr, [r6], #-2525 @ 0xfffff623 │ │ @ instruction: 0xf0402801 │ │ stmdbls r8, {r2, r4, r7, pc}^ │ │ andsls r9, r3, r9, asr #16 │ │ stmib sp, {r1, r3, r6, fp, ip, pc}^ │ │ - beq 230c7c │ │ + beq 22df64 │ │ orrs r9, r4, pc │ │ mlaspl r0, r8, r8, pc @ │ │ ldmib r8, {r0, r1, r3, r4, r5, r7, r9, sl, lr}^ │ │ ldmib r8, {r1, r3, r8}^ │ │ @ instruction: 0xf0852308 │ │ stm sp, {r0, r8, r9, sl} │ │ stmdage r6, {r0, r1, r7}^ │ │ - @ instruction: 0xf0044659 │ │ - ldmib sp, {r0, r2, r3, r4, r5, r8, sl, fp, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf0074659 │ │ + ldmib sp, {r0, r2, r3, r4, r6, sl, fp, ip, sp, lr, pc}^ │ │ ldmib sp, {r0, r3, r6, r8, r9, sl, sp, lr}^ │ │ stmdbls r8, {r1, r2, r6, r9, fp}^ │ │ tstls r5, r1, lsl #16 │ │ ldmdals r5, {r3, r5, r8, ip, lr, pc} │ │ @ instruction: 0x97144634 │ │ andls r0, pc, r0, lsl #20 │ │ ldrdlt pc, [r4], -sp @ │ │ @@ -15089,543 +12203,3480 @@ │ │ andeq pc, r1, r9, lsl #1 │ │ smlabbeq r1, r5, r0, pc @ │ │ strvs lr, [r0, -sp, asr #19] │ │ stmib sp, {r1, r2, r6, r9, sl, fp, sp, pc}^ │ │ ldrbmi r1, [r2], -r2 │ │ ldrtmi r9, [r0], -sl, lsl #18 │ │ strtmi r4, [r9], r3, lsr #12 │ │ - stc2 0, cr15, [ip], #-16 │ │ + ldc2 0, cr15, [r2, #-28] @ 0xffffffe4 │ │ movtcs lr, #39389 @ 0x99dd │ │ strbeq lr, [r6, #-2525] @ 0xfffff623 │ │ @ instruction: 0xf0402801 │ │ stmdals r8, {r0, r1, r4, r7, pc}^ │ │ andsls r4, r5, r4, lsl r6 │ │ - beq 554f8 │ │ + beq 527e0 │ │ ldrdge pc, [r8], #-141 @ 0xffffff73 │ │ cmn r9, pc │ │ svceq 0x0000f1ba │ │ addhi pc, ip, #0 │ │ stmdacs r8, {r0, r2, r4, fp, ip, pc} │ │ @ instruction: 0x83b9f040 │ │ ldrdeq pc, [r4], -sl │ │ tstpmi r0, pc, asr #32 @ p-variant is OBSOLETE │ │ - ldrdcs pc, [r0], -sl │ │ - stmibvc ip, {r0, r2, r3, r8, sl, ip, sp, lr, pc} │ │ - beq ab2d4 │ │ - svcmi 0x0000f1b4 │ │ - eorlt pc, r8, sp, asr #17 │ │ - ldmdage r6!, {r3, ip, lr, pc} │ │ - @ instruction: 0x46934653 │ │ - blx 86c8f6 │ │ - stmdacs r0, {r1, r3, r4, r6, r9, sl, lr} │ │ - orrhi pc, r5, r0 │ │ - vmax.f32 d18, d0, d1 │ │ - ldmdahi r0!, {r0, r1, r2, r3, r7, r8, r9, pc} │ │ - andls sl, r8, lr, ror #18 │ │ - rsbsls r4, r0, r3, asr r6 │ │ - stmib sp, {r1, r2, r5, fp, sp, pc}^ │ │ - ldrmi r6, [r3], lr, ror #14 │ │ - andne lr, r0, sp, asr #19 │ │ - ldmdbls r2, {r3, r6, r9, sl, lr} │ │ - @ instruction: 0xf01746d1 │ │ - @ instruction: 0xf8ddfd67 │ │ - @ instruction: 0xf89da118 │ │ - andsls r0, r5, ip, lsl r1 │ │ - vshr.s8 d18, d1, #8 │ │ - strmi r0, [r2] │ │ - rsbshi pc, r6, #64 @ 0x40 │ │ - bfieq r9, r5, (invalid: 16:0) │ │ - msrhi SPSR_xc, r0 │ │ - ldrdeq lr, [r9, #-157]! @ 0xffffff63 │ │ - rsbls r3, r9, r1 │ │ - vhsub.s8 d20, d16, d8 │ │ - andcs r8, r0, fp, asr #2 │ │ - vhsub.s8 q15, q0, │ │ - @ instruction: 0x2c000a11 │ │ - beq 6d470 │ │ - adchi pc, r1, r0 │ │ - ldrdcc lr, [r9], #-157 @ 0xffffff63 │ │ - bge 195af14 │ │ - ldrtmi r9, [r8], -r0 │ │ - @ instruction: 0xf840f004 │ │ - @ instruction: 0xf89d9c46 │ │ - ldrbmi r0, [r4, #-284] @ 0xfffffee4 │ │ - @ instruction: 0xf0409015 │ │ - ldmdals r5, {r2, r4, r7, pc} │ │ - @ instruction: 0xf00007c0 │ │ - svcge 0x004680ed │ │ - andls r2, r1, r0 │ │ - @ instruction: 0x46384631 │ │ - movwcs r2, #521 @ 0x209 │ │ - blx 146c9f0 │ │ - strbeq lr, [r6], #-2525 @ 0xfffff623 │ │ - @ instruction: 0xf43f2801 │ │ - stccs 15, cr10, [r0], {68} @ 0x44 │ │ - ldmib sp, {r0, r2, r3, r4, r5, r6, ip, lr, pc}^ │ │ - stmdbge lr!, {r0, r3, r6, ip, sp}^ │ │ - andls sl, r0, r4, ror #20 │ │ - @ instruction: 0xf0044638 │ │ - mcrrls 8, 1, pc, r6, cr13 @ │ │ - @ instruction: 0x011cf89d │ │ - andsls r4, r5, r4, asr r5 │ │ - ldmdals r5, {r0, r4, r5, r6, r8, ip, lr, pc} │ │ - @ instruction: 0xf04f07c0 │ │ - andsls r0, r5, r0 │ │ - ldrd sp, [r9], #27 │ │ - stccs 12, cr9, [r0, #-76] @ 0xffffffb4 │ │ - stmdbge r4!, {r1, r4, r5, r6, ip, lr, pc}^ │ │ - @ instruction: 0xf0044630 │ │ - stclls 13, cr15, [r6, #-1020] @ 0xfffffc04 │ │ - @ instruction: 0x011cf89d │ │ - andscs r9, r1, r5, lsl r0 │ │ + ldrdcs pc, [r0], -sl │ │ + stmibvc ip, {r0, r2, r3, r8, sl, ip, sp, lr, pc} │ │ + beq a85bc │ │ + svcmi 0x0000f1b4 │ │ + eorlt pc, r8, sp, asr #17 │ │ + ldmdage r6!, {r3, ip, lr, pc} │ │ + @ instruction: 0x46934653 │ │ + blx fe469be8 │ │ + stmdacs r0, {r1, r3, r4, r6, r9, sl, lr} │ │ + orrhi pc, r5, r0 │ │ + vmax.f32 d18, d0, d1 │ │ + ldmdahi r0!, {r0, r1, r2, r3, r7, r8, r9, pc} │ │ + andls sl, r8, lr, ror #18 │ │ + rsbsls r4, r0, r3, asr r6 │ │ + stmib sp, {r1, r2, r5, fp, sp, pc}^ │ │ + ldrmi r6, [r3], lr, ror #14 │ │ + andne lr, r0, sp, asr #19 │ │ + ldmdbls r2, {r3, r6, r9, sl, lr} │ │ + @ instruction: 0xf01a46d1 │ │ + @ instruction: 0xf8ddfd77 │ │ + @ instruction: 0xf89da118 │ │ + andsls r0, r5, ip, lsl r1 │ │ + vshr.s8 d18, d1, #8 │ │ + strmi r0, [r2] │ │ + rsbshi pc, r6, #64 @ 0x40 │ │ + bfieq r9, r5, (invalid: 16:0) │ │ + msrhi SPSR_xc, r0 │ │ + ldrdeq lr, [r9, #-157]! @ 0xffffff63 │ │ + rsbls r3, r9, r1 │ │ + vhsub.s8 d20, d16, d8 │ │ + andcs r8, r0, fp, asr #2 │ │ + vhsub.s8 q15, q0, │ │ + @ instruction: 0x2c000a11 │ │ + beq 6a758 │ │ + adchi pc, r1, r0 │ │ + ldrdcc lr, [r9], #-157 @ 0xffffff63 │ │ + bge 19581fc │ │ + ldrtmi r9, [r8], -r0 │ │ + @ instruction: 0xf99cf007 │ │ + @ instruction: 0xf89d9c46 │ │ + ldrbmi r0, [r4, #-284] @ 0xfffffee4 │ │ + @ instruction: 0xf0409015 │ │ + ldmdals r5, {r2, r4, r7, pc} │ │ + @ instruction: 0xf00007c0 │ │ + svcge 0x004680ed │ │ + andls r2, r1, r0 │ │ + @ instruction: 0x46384631 │ │ + movwcs r2, #521 @ 0x209 │ │ + blx 1869ce4 │ │ + strbeq lr, [r6], #-2525 @ 0xfffff623 │ │ + @ instruction: 0xf43f2801 │ │ + stccs 15, cr10, [r0], {68} @ 0x44 │ │ + ldmib sp, {r0, r2, r3, r4, r5, r6, ip, lr, pc}^ │ │ + stmdbge lr!, {r0, r3, r6, ip, sp}^ │ │ + andls sl, r0, r4, ror #20 │ │ + @ instruction: 0xf0074638 │ │ + mcrrls 9, 7, pc, r6, cr9 @ │ │ + @ instruction: 0x011cf89d │ │ + andsls r4, r5, r4, asr r5 │ │ + ldmdals r5, {r0, r4, r5, r6, r8, ip, lr, pc} │ │ + @ instruction: 0xf04f07c0 │ │ + andsls r0, r5, r0 │ │ + ldrd sp, [r9], #27 │ │ + stccs 12, cr9, [r0, #-76] @ 0xffffffb4 │ │ + stmdbge r4!, {r1, r4, r5, r6, ip, lr, pc}^ │ │ + @ instruction: 0xf0074630 │ │ + stclls 15, cr15, [r6, #-772] @ 0xfffffcfc │ │ + @ instruction: 0x011cf89d │ │ + andscs r9, r1, r5, lsl r0 │ │ + andeq pc, r0, r8, asr #5 │ │ + @ instruction: 0xf0404285 │ │ + ldmdals r5, {r0, r1, r3, r5, r7, pc} │ │ + @ instruction: 0xf00007c0 │ │ + stmdals r8, {r2, r4, r6, r7, pc} │ │ + stmdacs r0, {r2, r3, r8, sp} │ │ + andeq pc, r8, pc, asr #32 │ │ + andcs fp, fp, r8, lsl pc │ │ + tstcs lr, r8, lsl pc │ │ + svceq 0x0000f1b9 │ │ + strmi fp, [r1], -r8, lsl #30 │ │ + ldrdge pc, [r8], #-141 @ 0xffffff73 │ │ + subsle r9, r1, r8, lsl #2 │ │ + stmdbls sl, {sp} │ │ + movwcs r9, #2568 @ 0xa08 │ │ + stmdage r6, {r0, ip, pc}^ │ │ + blx 5e9d78 │ │ + stmdbvs r9, {r0, r2, r3, r4, r6, r7, r8, fp, sp, lr, pc}^ │ │ + strbeq lr, [r6, #-2525] @ 0xfffff623 │ │ + stmdacs r1, {r3, r6, r8, fp, ip, pc} │ │ + @ instruction: 0xf0009115 │ │ + stccs 2, cr8, [r0, #-0] │ │ + andhi pc, r4, #0 │ │ + @ instruction: 0x070fe9d8 │ │ + ldcls 6, cr4, [r5], {41} @ 0x29 │ │ + adcsmi r4, ip, #60817408 @ 0x3a00000 │ │ + qasxmi fp, r2, r8 │ │ + stc 0, cr15, [r0, #680]! @ 0x2a8 │ │ + @ instruction: 0xf04f42a7 │ │ + svclt 0x00880100 │ │ + stmdacs r0, {r0, r8, sp} │ │ + andeq pc, r0, pc, asr #32 │ │ + andcs fp, r1, r8, asr #31 │ │ + strmi fp, [r8], -r8, lsl #30 │ │ + sbcsle r2, r3, r1, lsl #16 │ │ + stmdbge r4!, {r1, r2, r6, fp, sp, pc}^ │ │ + @ instruction: 0x464b4632 │ │ + @ instruction: 0xff70f007 │ │ + tstcs r1, #4480 @ 0x1180 │ │ + @ instruction: 0x011cf89d │ │ + movweq pc, #712 @ 0x2c8 @ │ │ + mulsls r5, sp, r2 │ │ + mvnhi pc, r0, asr #32 │ │ + bfieq r9, r5, (invalid: 16:0) │ │ + andeq pc, r0, pc, asr #32 │ │ + @ instruction: 0xd1bd9015 │ │ + ldrdcs lr, [r1], -r6 │ │ + stmdbls r7, {r0, r2, r3, r4, r6, sp, lr, pc} │ │ + andsls r9, r3, #72, 20 @ 0x48000 │ │ + stmdahi r9, {r3, r7, fp, ip, sp, lr} │ │ + b 10946b4 │ │ + andsls r4, r4, #0 │ │ + subs r9, r4, pc │ │ + rsbs r2, r1, r1 │ │ + andcs r9, r0, sl, lsl #18 │ │ + andls r9, r1, r8, lsl #20 │ │ + movwcs sl, #2118 @ 0x846 │ │ + @ instruction: 0xf9c4f01c │ │ + stmdbvs r9, {r0, r2, r3, r4, r6, r7, r8, fp, sp, lr, pc}^ │ │ + strbeq lr, [r6, #-2525] @ 0xfffff623 │ │ + stmdacs r0, {r3, r6, r8, fp, ip, pc} │ │ + @ instruction: 0xf0409115 │ │ + stccs 1, cr8, [r0, #-696] @ 0xfffffd48 │ │ + @ instruction: 0x81b2f000 │ │ + @ instruction: 0x0712e9d8 │ │ + ldcls 6, cr4, [r5], {41} @ 0x29 │ │ + adcsmi r4, ip, #60817408 @ 0x3a00000 │ │ + qasxmi fp, r2, r8 │ │ + stcl 0, cr15, [lr, #-680] @ 0xfffffd58 │ │ + @ instruction: 0xf04f42a7 │ │ + svclt 0x00380100 │ │ + stmdacs r0, {r0, r8, sp} │ │ + andeq pc, r0, pc, asr #32 │ │ + andcs fp, r1, r8, asr #30 │ │ + strmi fp, [r8], -r8, lsl #30 │ │ + bicsle r2, r3, r0, lsl #16 │ │ + stmdbge r4!, {r1, r2, r6, fp, sp, pc}^ │ │ + @ instruction: 0x464b4632 │ │ + @ instruction: 0xff1ef007 │ │ + @ instruction: 0xf89d9d46 │ │ + andsls r0, r5, ip, lsl r1 │ │ + vshr.s8 d18, d1, #8 │ │ + addmi r0, r5, #0 │ │ + orrshi pc, r0, r0, asr #32 │ │ + stmdbls sl, {r0, r2, r4, fp, ip, pc} │ │ + @ instruction: 0xf04f07c0 │ │ + andsls r0, r5, r0 │ │ + @ instruction: 0xe183d1bd │ │ + ldmib sp, {r0, r1, r2, r8, fp, ip, pc}^ │ │ + @ instruction: 0xf8dd4248 │ │ + stmvc r8, {r3, r6, sp, pc} │ │ + andsls r8, r4, #589824 @ 0x90000 │ │ + andmi lr, r0, r1, asr #20 │ │ + eor r9, r7, pc │ │ + andsls r2, r5, r0 │ │ + ldmdage r4!, {r2, r4, r6, r9, sl, lr}^ │ │ + blx be9eb0 │ │ + stmdacs r0, {r2, r4, r5, r6, fp, ip, pc} │ │ + ldmdals r5!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ + stcl 0, cr15, [r0, #440]! @ 0x1b8 │ │ + ldrvs lr, [r3, #-2525] @ 0xfffff623 │ │ + stmdage lr!, {r0, r1, r2, r5, r9, sl, lr}^ │ │ + blx 8e9ec8 │ │ + stmdacs r0, {r1, r2, r3, r5, r6, fp, ip, pc} │ │ + stmdals pc!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ @ │ │ + ldcl 0, cr15, [r4, #440] @ 0x1b8 │ │ + ldrdge pc, [r8], #-141 @ 0xffffff73 │ │ + @ instruction: 0x26114634 │ │ + vqdmlsl.s q13, d8, d22 │ │ + ldrls r0, [r4, #-1536] @ 0xfffffa00 │ │ + andcs lr, r0, r6, lsr r1 │ │ + andsls r2, r5, r1, lsl r5 │ │ + streq pc, [r0, #-712] @ 0xfffffd38 │ │ + ldrdge pc, [r8], #-141 @ 0xffffff73 │ │ + @ instruction: 0xf01aa874 │ │ + ldmdals r4!, {r0, r3, r9, fp, ip, sp, lr, pc}^ │ │ + svclt 0x001c2800 │ │ + @ instruction: 0xf06e9875 │ │ + mrcls 13, 0, lr, cr4, cr12, {5} │ │ + stcge 6, cr4, [r6, #-188]! @ 0xffffff44 │ │ + @ instruction: 0xf01aa86e │ │ + stmdals lr!, {r0, r2, r3, r4, r5, r6, r7, r8, fp, ip, sp, lr, pc}^ │ │ + svclt 0x001c2800 │ │ + @ instruction: 0xf06e986f │ │ + @ instruction: 0x9614edb0 │ │ + @ instruction: 0xf2c82611 │ │ + tst r4, r0, lsl #12 │ │ + addmi r9, r8, #1753088 @ 0x1ac000 │ │ + stmdbls r8, {r0, r2, r3, r8, fp, ip, lr, pc} │ │ + @ instruction: 0xf8cd9868 │ │ + stmib sp, {r3, r4, r8, ip, sp, pc}^ │ │ + stmdbls r6, {r0, r3, r6, r8, ip, sp, lr} │ │ + strbls lr, [r7], -sp, asr #19 │ │ + blx fe369eec │ │ + @ instruction: 0xf43f2800 │ │ + strcs sl, [ip], -r4, lsr #29 │ │ + svclt 0x00082d00 │ │ + @ instruction: 0xf8dd2608 │ │ + strls r9, [r8], -r8, lsr #32 │ │ + andcs sp, r0, r3, ror r0 │ │ + andls r4, r1, r9, asr #12 │ │ + ldrtmi sl, [r2], -r6, asr #16 │ │ + @ instruction: 0xf01c2300 │ │ + ldmib sp, {r0, r3, r4, r8, fp, ip, sp, lr, pc}^ │ │ + ldmib sp, {r0, r3, r6, r8, sl, ip, sp, pc}^ │ │ + stmdbls r8, {r1, r2, r6, r9, fp}^ │ │ + tstls r5, r1, lsl #16 │ │ + rscshi pc, pc, r0 │ │ + svceq 0x0000f1ba │ │ + sbchi pc, lr, r0 │ │ + stmdacs r8, {r0, r2, r4, fp, ip, pc} │ │ + mvnshi pc, r0, asr #32 │ │ + ldrdvc pc, [r4], -sl │ │ + movwmi pc, #79 @ 0x4f @ │ │ + ldrdeq lr, [r8, -r8] │ │ + ldrdcs pc, [r0], -sl │ │ + bne 43e0b4 │ │ + andeq lr, r1, r7, ror fp │ │ + @ instruction: 0xf1b4dbd9 │ │ + andle r4, r9, r0, lsl #30 │ │ + @ instruction: 0x463ba836 │ │ + @ instruction: 0x461646b2 │ │ + @ instruction: 0xf8d0f006 │ │ + @ instruction: 0x46564632 │ │ + sbcle r2, ip, r0, lsl #16 │ │ + vadd.f32 d18, d0, d1 │ │ + @ instruction: 0xf8bb81c8 │ │ + stmdbge lr!, {}^ @ │ │ + ldrtmi r9, [fp], -r5 │ │ + stmdage r6!, {r4, r5, r6, ip, pc} │ │ + strblt lr, [lr, #-2509]! @ 0xfffff633 │ │ + stmib sp, {r1, r2, r4, r9, sl, lr}^ │ │ + stmdage r6, {ip}^ │ │ + ssatmi r9, #26, r2, lsl #18 │ │ + blx fede9fea │ │ + @ instruction: 0xa118f8dd │ │ + @ instruction: 0x011cf89d │ │ + andscs r9, r1, r5, lsl r0 │ │ + andeq pc, r0, r8, asr #5 │ │ + @ instruction: 0xf0404582 │ │ + ldmdals r5, {r0, r2, r4, r5, r7, pc} │ │ + @ instruction: 0xf8dd464a │ │ + ldrtmi r9, [r3], -r8, lsr #32 │ │ + stmdals r8, {r6, r7, r8, r9, sl} │ │ + adcle r4, r4, r6, lsl #12 │ │ + ldrdeq lr, [r9, #-157]! @ 0xffffff63 │ │ + rsbls r3, r9, r1 │ │ + @ instruction: 0xf63f4288 │ │ + stmdbls fp!, {r1, r3, r4, r5, r9, sl, fp, sp, pc}^ │ │ + ldmible sl, {r3, r7, r9, lr} │ │ + stmdals r8!, {r0, r2, r8, fp, ip, pc}^ │ │ + stmib sp, {r1, r2, r6, r8, r9, ip, pc}^ │ │ + stmdbls r6, {r0, r3, r6, r8, ip, lr} │ │ + blcs 1228700 │ │ + blx 4e9fe0 │ │ + stmdacs r0, {r8, sp} │ │ + orrle r9, ip, r5, lsl r1 │ │ + andcs lr, r0, r0, ror r0 │ │ + andls r9, r1, sl, lsl #18 │ │ + ldrtmi sl, [r2], -r6, asr #16 │ │ + @ instruction: 0xf01c2300 │ │ + ldmib sp, {r0, r2, r5, r7, fp, ip, sp, lr, pc}^ │ │ + ldmib sp, {r0, r3, r6, r8, sl, ip, sp, pc}^ │ │ + stmdbls r8, {r1, r2, r6, r9, fp}^ │ │ + tstls r5, r0, lsl #16 │ │ + addhi pc, fp, r0, asr #32 │ │ + svceq 0x0000f1ba │ │ + ldmdals r5, {r1, r3, r4, r6, ip, lr, pc} │ │ + @ instruction: 0xf0402808 │ │ + @ instruction: 0xf8da8188 │ │ + @ instruction: 0xf04f7004 │ │ + ldmib r8, {r8, r9, lr}^ │ │ + @ instruction: 0xf8da010a │ │ + subsmi r2, pc, r0 │ │ + bl 1c74a20 │ │ + blle ff6ae040 │ │ + svcmi 0x0000f1b4 │ │ + ldmdage r6!, {r0, r3, ip, lr, pc} │ │ + @ instruction: 0x46b1463b │ │ + @ instruction: 0xf0064616 │ │ + @ instruction: 0x4632f85d │ │ + stmdacs r0, {r1, r2, r3, r6, r9, sl, lr} │ │ + stccs 0, cr13, [r1, #-820] @ 0xfffffccc │ │ + cmpphi r5, r0, asr #4 @ p-variant is OBSOLETE │ │ + @ instruction: 0x0000f8bb │ │ + andls sl, r5, lr, ror #18 │ │ + rsbsls r4, r0, fp, lsr r6 │ │ + stmib sp, {r1, r2, r5, fp, sp, pc}^ │ │ + ldrmi fp, [r6], -lr, ror #10 │ │ + andne lr, r0, sp, asr #19 │ │ + ldmdbls r2, {r1, r2, r6, fp, sp, pc} │ │ + @ instruction: 0xf01a46b9 │ │ + @ instruction: 0xf8ddfb43 │ │ + @ instruction: 0xf89da118 │ │ + andsls r0, r5, ip, lsl r1 │ │ + vshr.s8 d18, d1, #8 │ │ + strmi r0, [r2] │ │ + ldmdals r5, {r1, r6, r8, ip, lr, pc} │ │ + @ instruction: 0x07c04633 │ │ + strmi r9, [r6], -r8, lsl #16 │ │ + ldmib sp, {r0, r3, r5, r7, ip, lr, pc}^ │ │ + andcc r0, r1, r9, ror #2 │ │ + addmi r9, r8, #105 @ 0x69 │ │ + stclge 6, cr15, [fp, #252] @ 0xfc │ │ + addmi r9, r8, #1753088 @ 0x1ac000 │ │ + stmdbls r5, {r0, r1, r2, r3, r4, r7, r8, fp, ip, lr, pc} │ │ + movtls r9, #26728 @ 0x6868 │ │ + smlalbtpl lr, r9, sp, r9 │ │ + stmib sp, {r1, r2, r8, fp, ip, pc}^ │ │ + @ instruction: 0xf0049b47 │ │ + smlatbcs r0, r3, r9, pc @ │ │ + tstls r5, r0, lsl #16 │ │ + mul r1, r1, r1 │ │ + andsls r2, r5, r1 │ │ + beq 4aa9c0 │ │ + ldrdlt pc, [r4], -sp @ │ │ + beq 6abe8 │ │ + ldcls 13, cr10, [r3], {38} @ 0x26 │ │ + @ instruction: 0xf01aa874 │ │ + ldmdals r4!, {r0, r3, r5, r6, r7, fp, ip, sp, lr, pc}^ │ │ + svclt 0x001c2800 │ │ + @ instruction: 0xf06e9875 │ │ + @ instruction: 0x2611ec9c │ │ + @ instruction: 0xf2c84657 │ │ + @ instruction: 0xf8dd0600 │ │ + strtmi sl, [fp], -r8, asr #32 │ │ + teqle r4, r7 @ │ │ + @ instruction: 0xf1089815 │ │ + stclge 8, cr0, [r6, #-352] @ 0xfffffea0 │ │ + @ instruction: 0xf47f07c0 │ │ + ldrsbt sl, [r1], -lr │ │ + mcrrls 9, 0, r9, r8, cr7 @ │ │ + stmvc r8, {r0, r3, r6, r9, fp, ip, pc} │ │ + andsls r8, r4, #589824 @ 0x90000 │ │ + andmi lr, r0, r1, asr #20 │ │ + ldmdals r5, {r0, r2, r3, r4, r8, sl, sp, lr, pc} │ │ + ldrls r4, [r4, #-1628] @ 0xfffff9a4 │ │ + ldmdals r5, {r3, r4, r8, sl, sp, lr, pc} │ │ + @ instruction: 0xf8cd4634 │ │ + beq 52264 │ │ + ldrt r9, [r1], pc │ │ + andsls r2, r5, r1 │ │ + vshl.s8 d18, d1, #0 │ │ + ldrt r0, [r9], #1280 @ 0x500 │ │ + ldmib sp, {r0, r1, r2, r8, fp, ip, pc}^ │ │ + ldrbt r4, [r8], -r8, asr #4 │ │ + bleq 69888 │ │ + stmdage lr, {r1, r4, r6, sp, lr, pc}^ │ │ + @ instruction: 0xf003461d │ │ + ldcls 14, cr15, [r8], #-996 @ 0xfffffc1c │ │ + svcmi 0x0000f1b4 │ │ + ldrtmi sp, [r7], -r9, ror #2 │ │ + strcs lr, [r2], #-15 │ │ + ldrmi lr, [sp], -r9, asr #32 │ │ + @ instruction: 0xf8dd9413 │ │ + and r9, r1, ip, lsr r0 │ │ + @ instruction: 0x4637461d │ │ + @ instruction: 0xf003a84e │ │ + ldcls 14, cr15, [r8], #-924 @ 0xfffffc64 │ │ + svcmi 0x0000f1b4 │ │ + strtmi sp, [ip], r1, lsl #2 │ │ + sxtahmi lr, sl, r2 │ │ + ldmib sp, {r0, r1, r2, r4, r5, r9, sl, lr}^ │ │ + cmplt lr, r9, lsr r6 │ │ + streq pc, [r4, #-264] @ 0xfffffef8 │ │ + stceq 8, cr15, [r4], {85} @ 0x55 │ │ + svclt 0x001c2800 │ │ + @ instruction: 0xf0aa6828 │ │ + strcc lr, [ip, #-2848] @ 0xfffff4e0 │ │ + mvnsle r3, r1, lsl #28 │ │ + ldceq 1, cr15, [r8], {13} │ │ + ldrtmi r2, [lr], -r0, lsl #24 │ │ + ldmib sp, {r0, r2, r4, r6, sp, lr, pc}^ │ │ + @ instruction: 0xf8dd8649 │ │ + cmplt lr, r4, lsr #32 │ │ + streq pc, [r4, -r8, lsl #2] │ │ + stceq 8, cr15, [r4], {87} @ 0x57 │ │ + svclt 0x001c2800 │ │ + @ instruction: 0xf0aa6838 │ │ + strcc lr, [ip, -sl, lsl #22] │ │ + mvnsle r3, r1, lsl #28 │ │ + stccs 7, cr2, [r0], {17} │ │ + streq pc, [r0, -r8, asr #5] │ │ + bge fe26b3d0 │ │ + blt fe2ac1d4 │ │ + bmi 4699dc │ │ + blne 69928 │ │ + bleq 1069dc4 │ │ + bleq fe869cec │ │ + bleq 2e98f4 │ │ + ldmib sp, {r0, sl, sp}^ │ │ + andscs r5, r0, r4, lsr #12 │ │ + bl 3ea4a0 │ │ + svclt 0x001f2800 │ │ + andscs r2, r1, #0, 2 │ │ + andeq pc, r0, #200, 4 @ 0x8000000c │ │ + andcs pc, r0, fp, asr #17 │ │ + stmib r0, {r0, r1, r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ + stmib r0, {r8, lr}^ │ │ + stmdbls fp, {r1, r9, sl, ip, lr} │ │ + svclt 0x001c6008 │ │ + pop {r0, r1, r3, r4, r5, r6, ip, sp, pc} │ │ + strdcs r8, [r8], -r0 │ │ + @ instruction: 0xf00f2110 │ │ + ldrtmi pc, [r2], r8, lsl #31 @ │ │ + @ instruction: 0x8639e9dd │ │ + cmnlt r6, ip, lsr #13 │ │ + streq pc, [r4, -r8, lsl #2] │ │ + strcc lr, [ip, -r2] │ │ + andle r3, r8, r1, lsl #28 │ │ + stceq 8, cr15, [r4], {87} @ 0x57 │ │ + rscsle r2, r8, r0, lsl #16 │ │ + @ instruction: 0xf0aa6838 │ │ + strtmi lr, [ip], r6, asr #21 │ │ + stccs 7, cr14, [r0], {243} @ 0xf3 │ │ + @ instruction: 0x46574656 │ │ + strbmi sp, [r0], -r4 │ │ + @ instruction: 0xf0aa4664 │ │ + @ instruction: 0x46a4eabc │ │ + ldrdhi pc, [r0], #-141 @ 0xffffff73 │ │ + @ instruction: 0xf47f42b7 │ │ + @ instruction: 0xf7ffaa72 │ │ + ldmdals r4, {r0, r1, r2, r3, r5, r6, r9, fp, ip, sp, pc} │ │ + ldreq pc, [r8], #-261 @ 0xfffffefb │ │ + @ instruction: 0xf10d9913 │ │ + bl 3045c │ │ + bl 6e380 │ │ + adcsmi r0, ip, #192, 14 @ 0x3000000 │ │ + stmiavs r0!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ + @ instruction: 0xf43e2800 │ │ + ldmib r4, {r1, r6, r7, sl, fp, sp, pc}^ │ │ + ldmib r4, {r9, ip}^ │ │ + stmib sp, {r0, r1, r8, sl, ip, sp}^ │ │ + ldmdbge r0, {r1, r2, r3, r6, r9, ip}^ │ │ + strbmi ip, [r0], -r9, lsr #2 │ │ + @ instruction: 0xf0044651 │ │ + stmdacs r0, {r0, r1, r2, r5, r7, fp, ip, sp, lr, pc} │ │ + ldcge 4, cr15, [r3], #248 @ 0xf8 │ │ + @ instruction: 0xf1043e01 │ │ + mvnle r0, r8, lsl r4 │ │ + stclt 7, cr15, [sp], #1016 @ 0x3f8 │ │ + ldrbtmi r4, [r8], #-2082 @ 0xfffff7de │ │ + @ instruction: 0xf9bcf013 │ │ + ldrbtmi r4, [r8], #-2081 @ 0xfffff7df │ │ + ldc2 0, cr15, [lr, #-68]! @ 0xffffffbc │ │ + ldrbtmi r4, [r8], #-2077 @ 0xfffff7e3 │ │ + @ instruction: 0xf9b4f013 │ │ + addmi r9, r1, #20, 18 @ 0x50000 │ │ + ldcge 6, cr15, [sp], {126} @ 0x7e │ │ + subeq lr, r0, r0, lsl #22 │ │ + bl 9472c │ │ + stmiavs r8!, {r6, r7, r8, sl} │ │ + @ instruction: 0xf47e2800 │ │ + @ instruction: 0xf7feac80 │ │ + blmi 71d538 │ │ + mrscs r2, (UNDEF: 2) │ │ + ldrbtmi r4, [fp], #-1578 @ 0xfffff9d6 │ │ + ldc2l 0, cr15, [ip], {17} │ │ + andcs r4, r0, r6, lsl fp │ │ + ldrtmi r2, [sl], -r2, lsl #2 │ │ + @ instruction: 0xf011447b │ │ + ldrdcs pc, [r1], -r5 │ │ + @ instruction: 0xf00f4621 │ │ + andcs pc, r1, pc, asr #31 │ │ + @ instruction: 0xf00f2118 │ │ + stmdami ip, {r0, r1, r3, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ + blmi 358cb0 │ │ + ldrbtmi r4, [r8], #-2316 @ 0xfffff6f4 │ │ + ldrbtmi r4, [r9], #-1147 @ 0xfffffb85 │ │ + @ instruction: 0x212b9100 │ │ + blx 11ea37c │ │ + tstcs r8, r1 │ │ + @ instruction: 0xffbcf00f │ │ + andcs r9, r8, r5, lsl r9 │ │ + @ instruction: 0xffb8f00f │ │ + strdeq ip, [sl], -r6 │ │ + strdeq ip, [sl], -r6 │ │ + muleq sl, lr, r8 │ │ + @ instruction: 0xfffeb165 │ │ + andeq ip, sl, ip, lsl #12 │ │ + andeq ip, sl, sl, asr r7 │ │ + andeq ip, sl, ip, lsr r7 │ │ + andeq ip, sl, sl, asr #14 │ │ + svcmi 0x00f0e92d │ │ + strmi fp, [r8], sp, asr #1 │ │ + ldmib r1, {r1, r7, r9, sl, lr}^ │ │ + blge d6e770 │ │ + andcs r4, r0, #154140672 @ 0x9300000 │ │ + addcs ip, r0, r7, lsl #6 │ │ + @ instruction: 0xf88dac18 │ │ + andcs r0, r1, r0, ror #1 │ │ + stmib sp, {r1, r4, r5, r8, fp, sp, pc}^ │ │ + @ instruction: 0x46202032 │ │ + @ instruction: 0xf7f49234 │ │ + @ instruction: 0xf89df86f │ │ + @ instruction: 0xf1b99060 │ │ + tstle r4, r6, lsl #30 │ │ + teqlt r8, #3276800 @ 0x320000 │ │ + stmdbeq r6, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ + @ instruction: 0x4621e01e │ │ + ldm r1, {r1, r5, fp, sp, pc} │ │ + ldrshtgt r0, [ip], #12 │ │ + eorsne lr, r6, #3620864 @ 0x374000 │ │ + andsle r4, r3, #-1610612728 @ 0xa0000008 │ │ + ldrcs r9, [r3], #-2101 @ 0xfffff7cb │ │ + vsubw.s8 q9, q0, d1 │ │ + stcpl 4, cr0, [r7], {128} @ 0x80 │ │ + streq pc, [r9, #-423] @ 0xfffffe59 │ │ + vmla.f32 d2, d0, d7 │ │ + blx 10ee34 │ │ + eormi pc, r7, #1310720 @ 0x140000 │ │ + addshi pc, r5, #0 │ │ + eorsls r3, r7, #268435456 @ 0x10000000 │ │ + @ instruction: 0xd1f04291 │ │ + tstlt r0, r2, lsr r8 │ │ + @ instruction: 0xf0aa9833 │ │ + @ instruction: 0xf1b9e9f8 │ │ + tstle sl, r6, lsl #30 │ │ + stmdavs r0!, {r0, r3, r4, sl, fp, ip, pc} │ │ + suble r2, sp, r1, lsl #16 │ │ + cmple pc, r0, lsl #16 │ │ + stmdacs r0, {r5, r7, fp, sp, lr} │ │ + stmdavs r5!, {r2, r3, r4, r6, ip, lr, pc}^ │ │ + @ instruction: 0xf89de057 │ │ + ldmib sp, {r0, r1, r5, r6}^ │ │ + @ instruction: 0xf88d6219 │ │ + ldmdage r4, {r0, r1, r3, r6} │ │ + @ instruction: 0x371be9dd │ │ + ldmib r8, {r2, r3, r7, lr, pc}^ │ │ + @ instruction: 0xf8bd7002 │ │ + @ instruction: 0xf8ad1061 │ │ + andsls r1, r1, r9, asr #32 │ │ + @ instruction: 0x8010f8d8 │ │ + ldrdeq lr, [ip, -r7] │ │ + movwcs lr, #10715 @ 0x29db │ │ + ldcls 0, cr4, [sp, #-356] @ 0xfffffe9c │ │ + ldrls r4, [r7, #-80] @ 0xffffffb0 │ │ + ldrls r4, [r3], -r8, lsl #6 │ │ + subls pc, r8, sp, lsl #17 │ │ + @ instruction: 0xf89bd121 │ │ + stmdacs r0, {r4, r6} │ │ + @ instruction: 0xf8dbd041 │ │ + @ instruction: 0xf8cd0040 │ │ + stmdacs r0, {r2, r3, r4, r5, sp, pc} │ │ + rsbshi pc, r8, #64 @ 0x40 │ │ + @ instruction: 0xf04f4659 │ │ + @ instruction: 0xf8514000 │ │ + ldmib r1, {r2, r6, r8, r9, sl, fp, sp, pc}^ │ │ + @ instruction: 0xf1ba2301 │ │ + andvs r4, r8, r0, lsl #30 │ │ + stmdbls pc, {r0, r1, r3, r4, r5, r8, ip, lr, pc} @ │ │ + vaddl.s8 q9, d8, d12 │ │ + stmdacc r3, {} @ │ │ + ldmdage r2, {r3, sp, lr} │ │ + stc2l 0, cr15, [r0, #124]! @ 0x7c │ │ + pop {r0, r2, r3, r6, ip, sp, pc} │ │ + strdcs r8, [ip], -r0 │ │ + andeq pc, r0, r8, asr #5 │ │ + eor r3, r2, r4 │ │ + stmdacs r3, {r5, r8, fp, ip, sp, lr} │ │ + stmiavs r5!, {r4, r8, ip, lr, pc} │ │ + @ instruction: 0x6700e9d5 │ │ + stmdbcs r0, {r0, r3, r4, r5, fp, sp, lr} │ │ + shadd16mi fp, r0, ip │ │ + ldmdavs r8!, {r3, r7, r8, r9, sl, lr}^ │ │ + svclt 0x001c2800 │ │ + @ instruction: 0xf0aa4630 │ │ + @ instruction: 0x4628e992 │ │ + stmib lr, {r1, r3, r5, r7, ip, sp, lr, pc} │ │ + @ instruction: 0xf0aa4620 │ │ + andcs lr, ip, ip, lsl #19 │ │ + andeq pc, r0, r8, asr #5 │ │ + andeq pc, r0, sl, asr #17 │ │ + pop {r0, r2, r3, r6, ip, sp, pc} │ │ + strdcs r8, [ip], -r0 │ │ + andeq pc, r0, r8, asr #5 │ │ + @ instruction: 0xf8ca3807 │ │ + ldmdage r2, {} @ │ │ + ldc2 0, cr15, [r0, #124]! @ 0x7c │ │ + pop {r0, r2, r3, r6, ip, sp, pc} │ │ + @ instruction: 0xf8db8ff0 │ │ + movwls r0, #57360 @ 0xe010 │ │ + andsls r2, r0, #0, 16 │ │ + tstls r6, r9, lsl #14 │ │ + eorhi pc, r8, #64 @ 0x40 │ │ + tstpeq r8, fp, lsl #2 @ p-variant is OBSOLETE │ │ + ldmdage r8, {r0, r2, r8, ip, pc} │ │ + rscgt ip, ip, ip, ror #19 │ │ + smlaleq lr, ip, r1, r8 │ │ + rscgt r2, ip, r4, lsl #2 │ │ + andmi pc, r0, pc, asr #32 │ │ + eoreq pc, r0, fp, asr #17 │ │ + stmib sp, {sp}^ │ │ + vrhadd.s8 q8, q0, q2 │ │ + stmib sp, {r0, r2, r3, r7, r8, ip, sp}^ │ │ + stmib sp, {r1, r6}^ │ │ + stmib sp, {r1, r2, r6}^ │ │ + and r0, r1, r8, asr #2 │ │ + @ instruction: 0xd11e0890 │ │ + @ instruction: 0xf019a842 │ │ + stmdals r7, {r0, r3, r4, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ + rscsle r2, r9, r0, lsl #16 │ │ + movwcs r2, #8448 @ 0x2100 │ │ + strcs r2, [r0], #-1281 @ 0xfffffaff │ │ + blx fe926566 │ │ + stmdaeq r0, {r0, r1, r8, r9, sl, sp}^ │ │ + strvc pc, [r4, -r3, lsl #22] │ │ + strvc pc, [r4], #-2819 @ 0xfffff4fd │ │ + bfieq r4, r3, (invalid: 12:2) │ │ + blx fe922932 │ │ + stmdacs r1, {r0, r2, r9, sl, sp} │ │ + blx 1228f6 │ │ + blx 14696e │ │ + ldrmi r1, [r5], -r5, lsl #2 │ │ + stmdbge r2, {r0, r1, r3, r5, r6, r7, r8, r9, sl, sp, lr, pc}^ │ │ + stcne 13, cr10, [r8, #-200]! @ 0xffffff38 │ │ + stmibgt ip, {r1, r5, sl, fp, sp, pc}^ │ │ + ldm r1, {r2, r3, r6, r7, lr, pc} │ │ + strtmi r0, [r9], -ip, asr #1 │ │ + stmdals lr, {r2, r3, r6, r7, lr, pc} │ │ + ldmdals r0, {r0, r2, r5, ip, pc} │ │ + andcs r9, r0, r4, lsr #32 │ │ + beq 8e8cc4 │ │ + beq 186a9c8 │ │ + @ instruction: 0xf1049026 │ │ + @ instruction: 0xf8cd0014 │ │ + stmibgt ip, {r6, r7, ip, sp, pc}^ │ │ + ldm r1, {r2, r3, r6, r7, lr, pc} │ │ + rscgt r0, ip, ip, ror #1 │ │ + vabal.s8 q9, d8, d12 │ │ + ldmdals sl, {r8, sl} │ │ + @ instruction: 0x4000f1b0 │ │ + uadd16mi fp, r0, r8 │ │ + svceq 0x0004f1b9 │ │ + @ instruction: 0xf040900e │ │ + @ instruction: 0xf10d80d0 │ │ + ldrls r0, [r2, #-2504]! @ 0xfffff638 │ │ + @ instruction: 0xf0034648 │ │ + ldmdals r5, {r0, r1, r3, r7, sl, fp, ip, sp, lr, pc} │ │ + stmdacs r0, {r0, r3, r5, r6, r8, sl, fp, ip} │ │ + rscshi pc, r1, r0 │ │ + ldrsbge pc, [r0], #-141 @ 0xffffff73 @ │ │ + subeq lr, r0, r0, lsl #22 │ │ + cdpge 12, 3, cr9, cr2, cr9, {0} │ │ + sbceq lr, r0, sl, lsl #22 │ │ + movwmi pc, #79 @ 0x4f @ │ │ + andls r4, sl, r9, lsl #13 │ │ + eorlt pc, ip, sp, asr #17 │ │ + ldmdals r1, {r0, r1, r2, r8, ip, pc} │ │ + suble r2, r4, r0, lsl #16 │ │ + muleq r0, sl, r8 │ │ + cmple r0, r5, lsl #16 │ │ + ldrdvc pc, [r4], -sl │ │ + @ instruction: 0xf8dab3ef │ │ + movwls r0, #32776 @ 0x8008 │ │ + @ instruction: 0xf8b7900d │ │ + @ instruction: 0xf5070192 │ │ + @ instruction: 0xf04f7986 │ │ + @ instruction: 0x46063bff │ │ + subeq lr, r0, r0, lsl #22 │ │ + movwlt r0, #16516 @ 0x4084 │ │ + strne lr, [r1, #-2521] @ 0xfffff627 │ │ + strtmi r4, [sl], -r8, lsr #11 │ │ + @ instruction: 0x4642bf38 │ │ + @ instruction: 0xf0aa9811 │ │ + stmdacs r0, {r1, r2, r3, r4, r8, fp, sp, lr, pc} │ │ + bl fea5e260 │ │ + stmdacs r0, {r0, r2} │ │ + andeq pc, r0, pc, asr #32 │ │ + andcs fp, r1, r8, asr #30 │ │ + tstpeq r0, pc, asr #32 @ p-variant is OBSOLETE │ │ + smlabtcs r1, r8, pc, fp @ │ │ + @ instruction: 0x3c0c1a08 │ │ + bleq aaa88 │ │ + stmdbeq ip, {r0, r3, r8, ip, sp, lr, pc} │ │ + stmdacs r1, {r6, r7, r9, ip, sp, pc} │ │ + stmdblt r8, {r0, r1, r2, r3, r4, r6, r7, ip, lr, pc} │ │ + ldrtmi lr, [r3], sl, asr #32 │ │ + stcls 14, cr9, [r9], {13} │ │ + movwls lr, #31197 @ 0x79dd │ │ + rsble r2, pc, r0, lsl #28 │ │ + addeq lr, fp, r7, lsl #22 │ │ + strls r3, [sp], -r1, lsl #28 │ │ + @ instruction: 0x7198f8d0 │ │ + @ instruction: 0xf04fe7c5 │ │ + strcs r0, [r0, -r0, lsl #22] │ │ + andsne lr, r4, #212, 18 @ 0x350000 │ │ + ldmdals r0, {r1, r6, r8, sl, fp, sp, pc} │ │ + strtmi r9, [r8], -r0 │ │ + blx fe76a712 │ │ + andsne lr, r4, #212, 18 @ 0x350000 │ │ + @ instruction: 0x46234630 │ │ + bpl 68ddc │ │ + stc2 0, cr15, [r4], {29} │ │ + strbmi r9, [r8, #-2098] @ 0xfffff7ce │ │ + addhi pc, r6, r0, asr #32 │ │ + bcs 94fc8 │ │ + cmpphi sl, r0, asr #4 @ p-variant is OBSOLETE │ │ + stmib sp, {r0, r1, r6, fp, ip, pc}^ │ │ + bge 8aefec │ │ + stmdahi r1, {r1, r2, r3, r8, r9, fp, ip, pc} │ │ + andls r9, r2, ip, lsl #16 │ │ + andls r9, r3, sp, lsl #16 │ │ + cmpls ip, sl, asr #16 │ │ + andls r4, r4, r1, lsr #12 │ │ + stmib sp, {r4, r5, r9, sl, lr}^ │ │ + @ instruction: 0xf01fb700 │ │ + ldmdals r2!, {r0, r4, r5, fp, ip, sp, lr, pc} │ │ + cmnle ip, r8, asr #10 │ │ + ldrdcc lr, [r2], #-157 @ 0xffffff63 │ │ + beq 66ab18 │ │ + ldrdlt pc, [ip], -sp @ │ │ + stmdals sl, {r4, ip, pc} │ │ + @ instruction: 0xf47f4582 │ │ + add sl, sl, ip, ror pc │ │ + subeq lr, fp, fp, lsl #22 │ │ + @ instruction: 0xf8dd9c09 │ │ + mrcge 0, 1, r9, cr2, cr12, {0} │ │ + eorsne pc, r0, r7, lsl r8 @ │ │ + stmdbcs r2, {r3, r9, fp, ip, pc} │ │ + tstphi fp, r0, asr #32 @ p-variant is OBSOLETE │ │ + sbceq lr, r0, r7, lsl #22 │ │ + teqlt r9, r1, lsl #17 │ │ + @ instruction: 0xf0402901 │ │ + ldmib r0, {r2, r8, pc}^ │ │ + stmib sp, {r2, ip}^ │ │ + and r1, r7, ip │ │ + @ instruction: 0xf1b16941 │ │ + vmaxnm.f32 , q8, │ │ + stmdbvs r0, {r1, r3, r4, r5, r6, r7, pc} │ │ + andls r9, ip, sp, lsl #2 │ │ + vaddl.s8 q9, d8, d12 │ │ + eorsls r0, r2, r0 │ │ + @ instruction: 0xf0034630 │ │ + blls 26d67c │ │ + @ instruction: 0xf04f2700 │ │ + ldr r0, [r9, r1, lsl #22] │ │ + bleq 6a898 │ │ + cdpge 7, 3, cr2, cr2, cr0, {0} │ │ + stmdals pc, {r2, r4, r7, r8, r9, sl, sp, lr, pc} @ │ │ + ldmdbge r2!, {r0, r2, sp, lr} │ │ + strmi ip, [r8], -ip, ror #25 │ │ + stclgt 0, cr12, [ip], #944 @ 0x3b0 │ │ + rscgt r4, ip, r4, lsr #13 │ │ + smlalseq lr, ip, ip, r8 │ │ + stmdage r2, {r2, r3, r4, r5, r6, r7, lr, pc}^ │ │ + @ instruction: 0xf920f01d │ │ + strbmi lr, [r3, #-2525] @ 0xfffff623 │ │ + @ instruction: 0x4626b135 │ │ + bleq 16c8e4 │ │ + stmdb r2, {r1, r2, r3, r5, r6, ip, sp, lr, pc}^ │ │ + mvnsle r3, r1, lsl #26 │ │ + stmdacs r0, {r1, r6, fp, ip, pc} │ │ + qadd16mi fp, r0, ip │ │ + ldmda sl, {r1, r3, r5, r7, ip, sp, lr, pc} │ │ + @ instruction: 0xf1b0981a │ │ + rsbsle r4, r9, r0, lsl #30 │ │ + @ instruction: 0xf01da818 │ │ + ldmdage r2, {r0, r1, r2, r3, r4, r5, r6, r8, fp, ip, sp, lr, pc} │ │ + mcrr2 0, 1, pc, r6, cr15 @ │ │ + pop {r0, r2, r3, r6, ip, sp, pc} │ │ + stmdals pc, {r4, r5, r6, r7, r8, r9, sl, fp, pc} @ │ │ + eors r6, r6, r1 │ │ + svcls 0x000f9832 │ │ + beq 186abfc │ │ + bls d54c98 │ │ + stmdals r2, {r3, r4, r5, sp, lr}^ │ │ + stmdacs r0, {r0, r2, r4, r5, r8, r9, fp, ip, pc} │ │ + adcsvs r6, sl, r9, ror r0 │ │ + @ instruction: 0xf8dd60fb │ │ + svclt 0x001cb02c │ │ + @ instruction: 0xf0a99843 │ │ + stmdals pc, {r3, r4, r5, r6, r7, r8, r9, sl, fp, sp, lr, pc} @ │ │ + stceq 1, cr15, [r8], {13} │ │ + @ instruction: 0xf8d04631 │ │ + ldrtmi r8, [r0], -r0 │ │ + strhteq lr, [ip], #140 @ 0x8c │ │ + ldm ip!, {r2, r3, r5, r6, r7, lr, pc} │ │ + rscgt r0, ip, ip, ror #1 │ │ + smlalseq lr, ip, ip, r8 │ │ + stmdage r2, {r2, r3, r4, r5, r6, r7, lr, pc}^ │ │ + @ instruction: 0xf8daf01d │ │ + @ instruction: 0xf10d45c8 │ │ + @ instruction: 0xd1b509c8 │ │ + stmdals pc, {r3, r4, sp, lr, pc} @ │ │ + beq 186ac50 │ │ + andls pc, r0, r0, asr #17 │ │ + stmibeq r8, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ + andle r0, r2, r8, asr r0 │ │ + @ instruction: 0xf0a99810 │ │ + stcge 15, cr14, [r2], #-848 @ 0xfffffcb0 │ │ + stclgt 6, cr4, [lr], {72} @ 0x48 │ │ + stclgt 0, cr12, [lr], {206} @ 0xce │ │ + ldm r4, {r1, r2, r3, r6, r7, lr, pc} │ │ + rscgt r0, lr, lr, ror #1 │ │ + strbmi sl, [r9], -r2, asr #16 │ │ + @ instruction: 0xf8bcf01d │ │ + ldrdeq pc, [r0], #-139 @ 0xffffff75 │ │ + @ instruction: 0xf0402800 │ │ + bge 10cea68 │ │ + ldmdavs r1, {r0, r1, r3, r4, r6, r7, r8, fp, sp, lr, pc} │ │ + mvnscc pc, #79 @ 0x4f │ │ + ldrdvc pc, [ip], #-139 @ 0xffffff75 │ │ + @ instruction: 0xf1b6ca07 │ │ + @ instruction: 0xf8cb4f00 │ │ + blls 1ba96c │ │ + andle ip, ip, r7, lsl #6 │ │ + @ instruction: 0x4644b137 │ │ + bleq 16c9c8 │ │ + stmia ip, {r1, r2, r3, r5, r6, ip, sp, lr, pc}^ │ │ + mvnsle r3, r1, lsl #30 │ │ + svclt 0x001c2e00 │ │ + @ instruction: 0xf0a94640 │ │ + @ instruction: 0xf8dbefa6 │ │ + ldmdbls sl, {r6} │ │ + @ instruction: 0xf8cb3001 │ │ + @ instruction: 0xf1b10040 │ │ + tstle r5, r0, lsl #30 │ │ + @ instruction: 0xf01fa812 │ │ + sublt pc, sp, pc, asr #23 │ │ + svchi 0x00f0e8bd │ │ + @ instruction: 0x0010f8db │ │ + cmple r9, r0, lsl #16 │ │ + @ instruction: 0xf04f9d05 │ │ + @ instruction: 0xf8cb30ff │ │ + @ instruction: 0x46280010 │ │ + stmia r9!, {r1, r2, r3, r6, r7, fp, lr, pc} │ │ + ldm r0, {r1, r2, r3, r6, r7} │ │ + stm r9, {r1, r2, r3, r6, r7} │ │ + ldm sl!, {r1, r2, r3, r6, r7} │ │ + strgt r0, [pc, #143] @ 2e95f │ │ + umulleq lr, pc, sl, r8 @ │ │ + ldmdals r4!, {r0, r1, r2, r3, r7, r8, sl, lr, pc} │ │ + svcmi 0x0000f1b0 │ │ + andcs sp, r0, r1, lsl #2 │ │ + ldmdage r2!, {r0, r2, sp, lr, pc} │ │ + @ instruction: 0xf8e2f01d │ │ + @ instruction: 0x0010f8db │ │ + @ instruction: 0xf8cb3001 │ │ + ldmdage r2, {r4} │ │ + blx fe96a976 │ │ + pop {r0, r2, r3, r6, ip, sp, pc} │ │ + tstcs r6, #240, 30 @ 0x3c0 │ │ + movtls r3, #8705 @ 0x2201 │ │ + svclt 0x0028428a │ │ + @ instruction: 0xf047460a │ │ + strmi pc, [r2], -r3, asr #18 │ │ + stmdage r2, {r0, r1, r3, r9, sl, lr}^ │ │ + @ instruction: 0x461a4611 │ │ + @ instruction: 0xf9caf047 │ │ + stmdage r2!, {r0, r3, r4, ip, pc} │ │ + blx 9ea930 │ │ + stmdacs r0, {r1, r4, r5, fp, ip, pc} │ │ + ldcge 4, cr15, [r8, #-508]! @ 0xfffffe04 │ │ + stmdals pc, {r1, r2, r3, r4, r6, r8, sl, sp, lr, pc} @ │ │ + stcge 1, cr2, [r2], #-48 @ 0xffffffd0 │ │ + smlabteq r0, r8, r2, pc @ │ │ + subseq r6, r0, r1 │ │ + svcge 0x0013f43f │ │ + @ instruction: 0xf0a99810 │ │ + str lr, [lr, -r8, asr #30] │ │ + ldrbtmi r4, [r8], #-2056 @ 0xfffff7f8 │ │ + mrc2 0, 3, pc, cr4, cr2, {0} │ │ + andcs r4, r0, r7, lsl #22 │ │ + ldrbtmi r2, [fp], #-258 @ 0xfffffefe │ │ + @ instruction: 0xf9acf011 │ │ + ldrbtmi r4, [r8], #-2053 @ 0xfffff7fb │ │ + mcr2 0, 3, pc, cr10, cr2, {0} @ │ │ + ldrbtmi r4, [r8], #-2052 @ 0xfffff7fc │ │ + mcr2 0, 3, pc, cr6, cr2, {0} @ │ │ + andeq ip, sl, r6, ror #6 │ │ + andeq ip, sl, sl, ror #1 │ │ + andeq ip, sl, r2, lsl #7 │ │ + andeq ip, sl, sl, ror #6 │ │ + mvnsmi lr, sp, lsr #18 │ │ + stmdavs lr, {r1, r2, r3, r7, ip, sp, pc} │ │ + stccs 8, cr6, [r1], {244} @ 0xf4 │ │ + @ instruction: 0x4680d932 │ │ + mlaeq r9, r6, r8, lr │ │ + stceq 1, cr15, [r8], {13} │ │ + strpl lr, [fp], #-2509 @ 0xfffff633 │ │ + strmi pc, [r0], #-131 @ 0xffffff7d │ │ + movwmi r8, #18479 @ 0x482f │ │ + @ instruction: 0xf04f6849 │ │ + strls r0, [sp, -r0, lsl #10] │ │ + strcs fp, [r1], #-3864 @ 0xfffff0e8 │ │ + stm ip, {r0, r1, r3, r8, r9, sl, fp, sp, pc} │ │ + stmdage r6, {r0, r3, r7} │ │ + strmi lr, [r0, #-2509] @ 0xfffff633 │ │ + @ instruction: 0xf8eaf026 │ │ + tstcs r1, r6, lsl #16 │ │ + smlabteq r0, r8, r2, pc @ │ │ + smlabble r8, r8, r2, r4 │ │ + andne lr, r8, #3620864 @ 0x374000 │ │ + andne lr, r0, #3244032 @ 0x318000 │ │ + andeq pc, r0, r8, asr #17 │ │ + pop {r1, r2, r3, ip, sp, pc} │ │ + blge 20f19c │ │ + stceq 1, cr15, [r4], {8} │ │ + stm ip, {r1, r2, r3, r8, r9, fp, lr, pc} │ │ + @ instruction: 0xf8c8000e │ │ + andlt r0, lr, r0 │ │ + ldrhhi lr, [r0, #141]! @ 0x8d │ │ + andcs r4, r0, r3, lsl #22 │ │ + strtmi r2, [r2], -r2, lsl #2 │ │ + @ instruction: 0xf011447b │ │ + svclt 0x0000f95b │ │ + andeq ip, sl, r8, asr #32 │ │ + svcmi 0x00f0e92d │ │ + @ instruction: 0xf101b097 │ │ + andls r0, r7, ip, lsl #6 │ │ + andls r6, ip, #136, 16 @ 0x880000 │ │ + blgt 392a38 │ │ + subeq lr, r2, #2048 @ 0x800 │ │ + bl 48b9c │ │ + andls r0, sp, r2, lsl #13 │ │ + suble r2, r9, r0, lsl #30 │ │ + b 1414244 │ │ + ldmib r1, {r0, r1, r2, fp, ip}^ │ │ + addseq r7, r4, r0, lsl #12 │ │ + @ instruction: 0xf04f6818 │ │ + stmibvs r9, {r9, fp} │ │ + movweq pc, #45167 @ 0xb06f @ │ │ + strvs lr, [sl, -sp, asr #19] │ │ + streq pc, [r8], -r0, lsl #2 │ │ + bl 112e70 │ │ + smlabbls r5, r2, r1, r0 │ │ + ldmdbls r3, {r1, r4, sp, lr, pc} │ │ + tstcs r0, #3620864 @ 0x374000 │ │ + movwcs lr, #10566 @ 0x2946 │ │ + svceq 0x0000f1b9 │ │ + smlabteq r0, r6, r9, lr │ │ + qadd16mi fp, r8, ip │ │ + cdp 0, 11, cr15, cr4, cr9, {5} │ │ + @ instruction: 0xf10a3610 │ │ + @ instruction: 0xf1b80a0c │ │ + andsle r0, lr, r0, lsl r8 │ │ + eorsle r4, r3, r4, asr r5 │ │ + bl 54ab4 │ │ + ldrtmi r0, [fp], sl, lsl #14 │ │ + blls 36cbf4 │ │ + svcmi 0x0000f1b9 │ │ + ldmib r7, {r0, r1, r4, ip, lr, pc}^ │ │ + stmdbls fp, {r0, ip, lr} │ │ + stmdbls sl, {r8, ip, pc} │ │ + strne lr, [r1, #-2509] @ 0xfffff633 │ │ + bls 354ec4 │ │ + stmdage lr, {r0, r1, ip, pc} │ │ + @ instruction: 0xf994f025 │ │ + bllt 1254ae4 │ │ + stmdacs r0, {r1, r4, fp, ip, pc} │ │ + smlabtcs r0, pc, r1, sp @ │ │ + mcrls 7, 0, lr, cr6, cr2, {6} │ │ + andeq pc, ip, r7, lsl #2 │ │ + andsle r1, r1, r1, lsr sl │ │ + adccs pc, fp, #77594624 @ 0x4a00000 │ │ + @ instruction: 0xf6ca1d05 │ │ + blx fe877576 │ │ + ldmeq r4, {r1, r9, ip}^ │ │ + stceq 8, cr15, [r4], {85} @ 0x55 │ │ + svclt 0x001c2800 │ │ + @ instruction: 0xf0a96828 │ │ + strcc lr, [ip, #-3708] @ 0xfffff184 │ │ + mvnsle r3, r1, lsl #24 │ │ + stmdacs r0, {r3, fp, ip, pc} │ │ + stmdals sp, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ + cdp 0, 7, cr15, cr2, cr9, {5} │ │ + andscs r9, r1, r7, lsl #18 │ │ + andeq pc, r0, r8, asr #5 │ │ + andslt r6, r7, r8 │ │ + svchi 0x00f0e8bd │ │ + vmlals.f64 d10, d7, d15 │ │ + svceq 0x0000f1b9 │ │ + strgt ip, [pc], -pc, lsl #22 │ │ + qadd16mi fp, r8, ip │ │ + cdp 0, 6, cr15, cr0, cr9, {5} │ │ + ldrbmi r9, [r8, #-2054] @ 0xfffff7fa │ │ + stmdals r5, {r0, r2, r4, ip, lr, pc} │ │ + @ instruction: 0x21abf64a │ │ + @ instruction: 0x21aaf6ca │ │ + ldreq pc, [r0], #-263 @ 0xfffffef9 │ │ + andeq lr, sl, r0, lsr #23 │ │ + smlatbeq r1, r0, fp, pc @ │ │ + @ instruction: 0xf85408cd │ │ + stmdacs r0, {r2, sl, fp} │ │ + stmdavs r0!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ + cdp 0, 4, cr15, cr10, cr9, {5} │ │ + stccc 4, cr3, [r1, #-48] @ 0xffffffd0 │ │ + stmdals r8, {r0, r2, r4, r5, r6, r7, r8, ip, lr, pc} │ │ + sbcsle r2, r6, r0, lsl #16 │ │ + @ instruction: 0xf0a9980d │ │ + andslt lr, r7, r2, asr #28 │ │ + svchi 0x00f0e8bd │ │ + ldmdavs r2, {r7, r8, sl, ip, sp, pc} │ │ + @ instruction: 0xf03e6809 │ │ + stclt 14, cr15, [r0, #380] @ 0x17c │ │ + @ instruction: 0xb086b5b0 │ │ + ldrdpl lr, [r0, -r1] │ │ + ldmib r5, {r2, r9, sl, lr}^ │ │ + stmib sp, {r8, r9}^ │ │ + stmdage r2, {r8, r9} │ │ + cdp2 0, 14, cr15, cr4, cr5, {1} │ │ + andeq lr, r2, #3620864 @ 0x374000 │ │ + stmdbls r4, {r0, r4, r8, r9, sp} │ │ + movweq pc, #712 @ 0x2c8 @ │ │ + @ instruction: 0xd1084298 │ │ + bcs 46e38 │ │ + ldrmi fp, [r1], -r8, lsl #30 │ │ + rscvs r4, fp, fp, lsl #12 │ │ + andlt r6, r6, r0, lsr #32 │ │ + blls 19e260 │ │ + stmib r4, {r0, r2, r5, r9, sl, lr}^ │ │ + rscvs r2, fp, r1, lsl #2 │ │ + andlt r6, r6, r0, lsr #32 │ │ + ldrblt fp, [r0, #3504]! @ 0xdb0 │ │ + strmi fp, [r7], -sp, lsl #1 │ │ + movweq lr, #2513 @ 0x9d1 │ │ + ldmib r1, {r2, r3, r9, sl, lr}^ │ │ + stmdbvs r9, {r0, r1, r9, sl, ip, lr}^ │ │ + rsbeq lr, r9, sp, lsl #17 │ │ + @ instruction: 0xf025a804 │ │ + stmdals r4, {r0, r1, r8, fp, ip, sp, lr, pc} │ │ + tstle r5, r1, lsl #16 │ │ + stmiavs r6!, {r0, r2, r8, r9, fp, sp, pc} │ │ + strgt ip, [pc, -pc, lsl #22] │ │ + ands fp, r6, r6, lsr #19 │ │ + stmibvs r1!, {r3, fp, ip, pc} │ │ + ldmib sp, {r3, r4, r5, r8, ip, sp, pc}^ │ │ + andvs r3, fp, r6, lsl #12 │ │ + bls 289278 │ │ + ldrmi r6, [r9], -lr, asr #32 │ │ + andcs lr, r0, #0 │ │ + andeq lr, r2, #3162112 @ 0x304000 │ │ + stmiavs r0!, {r0, r4, r8, sp} │ │ + smlabteq r0, r8, r2, pc @ │ │ + tstlt r0, r9, lsr r0 │ │ + @ instruction: 0xf0a968e0 │ │ + andlt lr, sp, r6, ror #27 │ │ + ldrble fp, [r4], #3568 @ 0xdf0 │ │ + svcmi 0x00f0e92d │ │ + @ instruction: 0xf8d1b0e3 │ │ + strmi fp, [r9], r0, lsr #32 │ │ + ldrdvs lr, [r2, -r2] │ │ + movwvc lr, #51675 @ 0xc9db │ │ + b fe1bed8c │ │ + tstmi r9, #469762048 @ 0x1c000000 │ │ + ldcvs 1, cr13, [r1], {30} │ │ + @ instruction: 0xf0402900 │ │ + eorls r8, r3, #43778048 @ 0x29c0000 │ │ + tstpmi r0, pc, asr #32 @ p-variant is OBSOLETE │ │ + svcge 0x0044f852 │ │ + addsls pc, r8, sp, asr #17 │ │ + stmdbhi r1, {r1, r4, r6, r7, r8, fp, sp, lr, pc} │ │ + svcmi 0x0000f1ba │ │ + tstle r9, r1, lsl r0 │ │ + @ instruction: 0xf8dd2111 │ │ + vshr.s64 d25, d8, #56 │ │ + stmdbcc r8, {r8} │ │ + ldmib r9, {r0, sp, lr}^ │ │ + stccs 4, cr5, [r0], {3} │ │ + ldrbhi pc, [r1, -r0, asr #32] @ │ │ + svclt 0x005af000 │ │ + vsra.s8 d18, d1, #8 │ │ + stmdbcc r1, {r8} │ │ + ldmib r9, {r0, sp, lr}^ │ │ + stccs 4, cr5, [r0], {3} │ │ + strbhi pc, [r5, -r0, asr #32] @ │ │ + svclt 0x004ef000 │ │ + andcs r9, r0, r2, lsr #32 │ │ + svcge 0x00482104 │ │ + smlalbteq lr, sl, sp, r9 │ │ + orrcc pc, sp, r0, asr #4 │ │ + stmib sp, {r0, r3, r4, r9, ip, pc}^ │ │ + stmib sp, {r3, r6}^ │ │ + stmib sp, {r2, r3, r6}^ │ │ + and r0, r1, lr, asr #2 │ │ + @ instruction: 0xd11e0890 │ │ + @ instruction: 0xf0194638 │ │ + stmdals sp, {r0, r2, r3, r4, sl, fp, ip, sp, lr, pc}^ │ │ + rscsle r2, r9, r0, lsl #16 │ │ + movwcs r2, #8448 @ 0x2100 │ │ + strcs r2, [r0, #-1537] @ 0xfffff9ff │ │ + blx fe926cde │ │ + stmdaeq r0, {r0, r1, sl, sp}^ │ │ + strmi pc, [r5], #-2819 @ 0xfffff4fd │ │ + strmi pc, [r5, #-2819] @ 0xfffff4fd │ │ + bfieq r4, r3, (invalid: 12:2) │ │ + blx fe9230aa │ │ + stmdacs r1, {r1, r2, sl, sp} │ │ + blx 12306e │ │ + blx 17f0e6 │ │ + ldrmi r1, [r6], -r6, lsl #2 │ │ + svcgt 0x006ce7eb │ │ + stcne 8, cr10, [r1, #-224] @ 0xffffff20 │ │ + stceq 0, cr15, [r0], {79} @ 0x4f │ │ + ldm r7, {r2, r3, r5, r6, r8, lr, pc} │ │ + cmngt ip, ip, rrx │ │ + @ instruction: 0xf101a928 │ │ + stmib sp, {r2, r4, r9}^ │ │ + @ instruction: 0xf8dd892a │ │ + @ instruction: 0xf8cd808c │ │ + stmib sp, {r4, r5, r7, lr, pc}^ │ │ + @ instruction: 0xf8cdca28 │ │ + stmiagt r8!, {r3, r4, r6, r7, pc}^ │ │ + ldm r0, {r3, r5, r6, r7, r9, lr, pc} │ │ + rscsgt r0, r8, #248 @ 0xf8 │ │ + @ instruction: 0xf8dbad38 │ │ + strtmi r2, [r8], -r0, lsr #32 │ │ + smlalbtgt pc, r4, sp, r8 @ │ │ + @ instruction: 0xf970f01b │ │ + @ instruction: 0xf50daf38 │ │ + svcgt 0x008f7c90 │ │ + stm ip, {r1, fp, sp} │ │ + smlabble r7, lr, r0, r0 │ │ + svcls 0x0022ab48 │ │ + @ instruction: 0x9098f8dd │ │ + strgt ip, [pc, -pc, lsl #22] │ │ + cdplt 0, 10, cr15, cr9, cr0, {0} │ │ + @ instruction: 0x9098f8dd │ │ + cdpls 15, 3, cr10, cr13, cr8, {2} │ │ + stcvc 5, cr15, [r4], #52 @ 0x34 │ │ + stm ip, {r1, r2, r3, r7, r8, r9, sl, fp, lr, pc} │ │ + strbeq r0, [r0, pc, lsl #1] │ │ + @ instruction: 0xf0009657 │ │ + svcls 0x00538713 │ │ + subls sl, sl, r1, asr r8 │ │ + andls r2, r1, r0 │ │ + @ instruction: 0x4639a838 │ │ + movwcs r2, #512 @ 0x200 │ │ + stmdblt r8, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc}^ │ │ + @ instruction: 0xf9daf01b │ │ + ldmib sp, {r3, r4, r5, r8, r9, fp, sp, pc}^ │ │ + @ instruction: 0x2611153b │ │ + vqdmlsl.s q14, d8, d13 │ │ + teqlt r0, r0, lsl #12 │ │ + ldrdge pc, [r8], sp │ │ + ldrhtle r4, [r9], -r2 │ │ + @ instruction: 0xf0000a18 │ │ + @ instruction: 0xf8ddbe6c │ │ + strbmi sl, [ip], -r8, lsl #1 │ │ + stmib sp, {r1, r3, r4, r5, r6, r8, r9, ip, sp, pc}^ │ │ + ldmdage r8!, {r8, sl, ip} │ │ + @ instruction: 0xf026a948 │ │ + bls e6e8b0 │ │ + smlalcc pc, r4, sp, r8 @ │ │ + @ instruction: 0xf04042b2 │ │ + @ instruction: 0x07d88651 │ │ + @ instruction: 0xf10dd021 │ │ + @ instruction: 0xf04f08e0 │ │ + strbmi r0, [r0], -r0, lsl #18 │ │ + andcs r4, r8, #59768832 @ 0x3900000 │ │ + @ instruction: 0xf8cd2300 │ │ + @ instruction: 0xf01b9004 │ │ + blge e6d490 │ │ + ldrne lr, [fp, #-2525]! @ 0xfffff623 │ │ + stmdacs r0, {r0, r2, r3, r8, r9, fp, lr, pc} │ │ + ldrthi pc, [r3], r0, asr #32 @ │ │ + stmib sp, {r1, r3, r5, r6, r8, ip, sp, pc}^ │ │ + stmdbge r8, {r8, sl, ip}^ │ │ + @ instruction: 0xf0264640 │ │ + bls e6e86c │ │ + smlalcc pc, r4, sp, r8 @ │ │ + @ instruction: 0xf04042b2 │ │ + ldrbeq r8, [r8, pc, lsr #12] │ │ + @ instruction: 0xf8ddd1e1 │ │ + strtmi r8, [r1], ip, lsl #1 │ │ + @ instruction: 0xf8d99851 │ │ + addmi r1, r8, #24 │ │ + ldrhi pc, [r2], -r0, asr #32 │ │ + ldrdeq pc, [r0], #-139 @ 0xffffff75 @ │ │ + @ instruction: 0xf0002800 │ │ + @ instruction: 0xf8db8600 │ │ + bl 52f98 │ │ + stmdbls r6!, {r6} │ │ + andne lr, r0, r9, lsl #22 │ │ + stmdavs r8, {r1, r4, ip, pc} │ │ + ldmib r1, {r0, r1, r2, r4, ip, pc}^ │ │ + @ instruction: 0x91211003 │ │ + bl 52ea0 │ │ + bl 6ef44 │ │ + addeq r0, r0, r0, lsl #17 │ │ + tstcc r8, sp │ │ + @ instruction: 0xf8d9910e │ │ + ldmdage r8!, {sp} │ │ + andsls sl, r3, #40, 18 @ 0xa0000 │ │ + @ instruction: 0xf8d8f01b │ │ + ldmib sp, {r1, r3, r4, r5, r9, fp, sp, pc}^ │ │ + bgt 20bf44 │ │ + tstle r5, r2, lsl #30 │ │ + andsls r0, r1, r3, lsl #20 │ │ + movwcs lr, #63949 @ 0xf9cd │ │ + stcllt 0, cr15, [sp] │ │ + ldcvc 5, cr15, [r4], {13} │ │ + stm ip, {r0, r2, r3, r4, r5, r8, r9, fp, ip, pc} │ │ + ldmib r9, {r0, r1, r2}^ │ │ + stmdbcs r0, {r3, r8} │ │ + stmib sp, {r0, r2, r3, r6, r8, r9, ip, pc}^ │ │ + stmib sp, {r3, r6, sl, ip, sp, lr}^ │ │ + ldmib sp, {r1, r2, r3, r4, ip}^ │ │ + @ instruction: 0xf000100d │ │ + andcs r8, r0, r1, lsl #11 │ │ + eorls r9, r7, r1, lsr #28 │ │ + ldrtmi r2, [ip], r0, lsl #10 │ │ + @ instruction: 0x46bb46be │ │ + @ instruction: 0x463b4639 │ │ + ssatmi r9, #27, fp, lsl #14 │ │ + @ instruction: 0xf8cd2700 │ │ + strtls r9, [r0], #-116 @ 0xffffff8c │ │ + svclt 0x001c2f00 │ │ + addmi r9, r7, #28, 16 @ 0x1c0000 │ │ + strbmi sp, [r6, #-272] @ 0xfffffef0 │ │ + strbhi pc, [pc, #-0]! @ 2eec4 @ │ │ + @ instruction: 0x360c68b0 │ │ + rscsle r2, r8, r0, lsl #16 │ │ + stcvc 8, cr15, [r8], {86} @ 0x56 │ │ + subeq lr, r0, r0, lsl #22 │ │ + tstlt r4, sp, asr #19 │ │ + sbceq lr, r0, r7, lsl #22 │ │ + and r9, r1, ip, lsl r0 │ │ + tstlt r4, sp, asr #19 │ │ + ldrdlt pc, [r0], -r7 │ │ + subsmi pc, r5, r7, asr #12 │ │ + subvc pc, sl, r7, asr #13 │ │ + tstls r6, #376832 @ 0x5c000 │ │ + @ instruction: 0xf000fb0b │ │ + andmi r9, r8, r5, lsr #10 │ │ + addmi r9, r1, #24, 18 @ 0x60000 │ │ + strthi pc, [r6], r0, asr #4 │ │ + subeq lr, r0, r0, lsl #22 │ │ + ldmdavs ip!, {r0, r5, r8, fp, ip, pc}^ │ │ + bl 7cb70 │ │ + strls r0, [r4, -r0, lsl #1]! │ │ + ldrdeq lr, [r1, -r0] │ │ + cmpeq r1, r1, lsl #22 │ │ + sbceq r3, pc, r8, lsl r8 @ │ │ + svccs 0x0000991f │ │ + ldrhi pc, [r0], r0 │ │ + svccs 0x0018f850 │ │ + stmdavs r3, {r3, r4, r8, r9, sl, fp, ip, sp}^ │ │ + andeq lr, fp, #532480 @ 0x82000 │ │ + tstmi sl, #99 @ 0x63 │ │ + @ instruction: 0xf891d1f3 │ │ + ldmib r0, {r5, ip, sp, lr}^ │ │ + stmdbvs r0, {r1, r9, ip, sp} │ │ + subsls r2, sl, r8, lsl #30 │ │ + subscc lr, r8, #3358720 @ 0x334000 │ │ + @ instruction: 0xf891d304 │ │ + @ instruction: 0xf1b99029 │ │ + cmple r7, r1, lsl #30 │ │ + ldmdage sp, {r1, r2, r3, r4, r9, fp, ip, pc}^ │ │ + @ instruction: 0xf01fab58 │ │ + stcls 14, cr15, [r5, #-4]! │ │ + strcc r9, [r1, #-2087] @ 0xfffff7d9 │ │ + andeq pc, r0, r0, asr #2 │ │ + ldmdals fp, {r0, r1, r2, r5, ip, pc} │ │ + @ instruction: 0xf00007c0 │ │ + @ instruction: 0xf04f860b │ │ + ldmib sp, {r8, lr}^ │ │ + rsbmi r7, r1, lr, asr r0 │ │ + stmdbge r0!, {r0, r5, r6, r8, ip, pc}^ │ │ + ldrtmi r2, [fp], -r2, lsl #4 │ │ + orrlt pc, r0, sp, asr #17 │ │ + smlabteq r0, sp, r9, lr │ │ + stmdbls r0!, {r3, r4, r5, fp, sp, pc} │ │ + @ instruction: 0xf8cef01b │ │ + eorseq lr, r8, #3620864 @ 0x374000 │ │ + @ instruction: 0xf8ddb178 │ │ + andscs r9, r1, r4, ror r0 │ │ + andeq pc, r0, r8, asr #5 │ │ + andle r4, fp, r2, lsl #5 │ │ + ldrsbtne lr, [sl], -sp │ │ + andls r9, r9, fp, lsl #2 │ │ + andls r9, r8, ip, lsr r8 │ │ + andls r0, r7, r8, lsl #20 │ │ + @ instruction: 0xf8dde04e │ │ + @ instruction: 0xb3b29074 │ │ + stmdacs r0, {r0, r2, r3, r4, r6, fp, ip, pc} │ │ + shadd16mi fp, r8, ip │ │ + stc 0, cr15, [r2], {169} @ 0xa9 │ │ + stceq 0, cr15, [r1], {79} @ 0x4f │ │ + cdpeq 0, 0, cr15, cr1, cr15, {2} │ │ + bleq ab118 │ │ + movwcs r2, #4353 @ 0x1101 │ │ + beq ab120 │ │ + strb r9, [r5, -r4, lsr #30]! │ │ + strcs r9, [r0, #-2078] @ 0xfffff7e2 │ │ + eor pc, r8, sp, asr #17 │ │ + @ instruction: 0xf8cd2801 │ │ + subsls ip, ip, r0, lsr r0 │ │ + ldrbhi pc, [r0, #64] @ 0x40 @ │ │ + ldrtmi r2, [sl], -r1 │ │ + subsls r9, lr, fp │ │ + ldrbls r9, [sp, #-2079] @ 0xfffff7e1 │ │ + ldmdage r8, {r0, r6, r7, r8, fp, sp, lr}^ │ │ + @ instruction: 0xf01a9106 │ │ + mvnlt pc, #912 @ 0x390 │ │ + @ instruction: 0xf8dd2211 │ │ + vshr.s8 , q10, #8 │ │ + ldmib sp, {r9}^ │ │ + @ instruction: 0xf8dd7524 │ │ + @ instruction: 0xf8ddc030 │ │ + ldmib sp, {r3, r5, sp, lr, pc}^ │ │ + blls 5db480 │ │ + andscs lr, r4, r6, lsr #32 │ │ + bl ffbeb2dc │ │ + @ instruction: 0xf0002800 │ │ + stmibmi r5, {r0, r2, r3, r4, r6, r7, r8, sl, pc}^ │ │ + stmib sp, {r2, r4, r9, sp}^ │ │ + ldrbtmi r2, [r9], #-8 │ │ + @ instruction: 0xf951f0a6 │ │ + vshr.s8 d18, d1, #8 │ │ + svcne 0x00020000 │ │ + andls r2, r7, r0 │ │ + andls r2, fp, r4, lsl r0 │ │ + @ instruction: 0xb120985d │ │ + @ instruction: 0x46174638 │ │ + bl fedeb30c │ │ + svcls 0x0024463a │ │ + stceq 0, cr15, [r1], {79} @ 0x4f │ │ + cdpeq 0, 0, cr15, cr1, cr15, {2} │ │ + bleq ab1b4 │ │ + movwcs r2, #4353 @ 0x1101 │ │ + beq ab1bc │ │ + vshr.s8 d18, d1, #8 │ │ + addmi r0, r2, #0 │ │ + svcge 0x0014f43f │ │ + stcllt 0, cr15, [r7, #-0] │ │ + @ instruction: 0xf1a79d27 │ │ + stmdacs r6, {r3} │ │ + strhi pc, [fp, #512] @ 0x200 │ │ + @ instruction: 0xf010e8df │ │ + andeq r0, r7, r7 │ │ + ldrdeq r0, [r9], #-9 @ │ │ + teqeq ip, r4, lsr r2 │ │ + bls 1af798 │ │ + ldmdbge r8, {r3, r4, r5, fp, sp, pc}^ │ │ + blx febeb104 │ │ + stmdacs r1, {r3, r4, r5, fp, ip, pc} │ │ + strbhi pc, [sp, #64] @ 0x40 @ │ │ + @ instruction: 0x0739e9dd │ │ + vstmdbls r5!, {s18-s106} │ │ + @ instruction: 0xf8dd1839 │ │ + @ instruction: 0xf8ddc030 │ │ + blls 5e7174 │ │ + strbhi pc, [r9, #-128]! @ 0xffffff80 @ │ │ + vqsub.s8 d4, d16, d1 │ │ + svccs 0x00008566 │ │ + rsbshi pc, fp, #0 │ │ + strcs r9, [r0, #-2392] @ 0xfffff6a8 │ │ + @ instruction: 0xa09cf8dd │ │ + stmdbeq r0, {r0, r8, r9, fp, sp, lr, pc} │ │ + andmi pc, r0, pc, asr #32 │ │ + andsls r4, r6, r0, rrx │ │ + @ instruction: 0xf8dde007 │ │ + bcs 5f1c0 │ │ + addshi pc, pc, #0 │ │ + @ instruction: 0xf0003f01 │ │ + @ instruction: 0xf8198276 │ │ + ldmdals sp, {r0, r8, r9, fp, lr}^ │ │ + movtlt r9, #1375 @ 0x55f │ │ + tstcs r1, r5, lsr #16 │ │ + andcc r9, r1, lr, asr fp │ │ + @ instruction: 0xf14a915f │ │ + eorls r0, r5, r0, lsl #20 │ │ + sbcvc lr, ip, pc, asr sl │ │ + @ instruction: 0xf000701c │ │ + ldmdals r6, {r0, r1, r2, r3, r5, r8, sl, pc} │ │ + rsbls r2, r1, r2, lsl #4 │ │ + @ instruction: 0xf8cda860 │ │ + stmib sp, {r7, r8, ip, sp, pc}^ │ │ + ldmdage r8!, {ip} │ │ + @ instruction: 0xf01a9920 │ │ + ldmib sp, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ + stmdacs r0, {r3, r4, r5, r9} │ │ + ldmdbls sl!, {r0, r2, r4, r6, r7, ip, lr, pc} │ │ + vshr.s8 d18, d1, #8 │ │ + addmi r0, r2, #0 │ │ + subshi pc, pc, #64 @ 0x40 │ │ + ldrsbtgt pc, [r0], -sp @ │ │ + bicle r0, pc, r8, asr #15 │ │ + ldmdage sp, {r0, r1, r2, r3, r7, r9, sp, lr, pc}^ │ │ + cdp2 0, 14, cr15, cr2, cr15, {0} │ │ + ldrsbtgt pc, [r0], -sp @ │ │ + bls 1e90b4 │ │ + ldmdbge r8, {r3, r4, r5, fp, sp, pc}^ │ │ + ldc2l 0, cr15, [r2], {19} │ │ + svcls 0x00249938 │ │ + svcmi 0x0000f1b1 │ │ + strhi pc, [r8, #-0]! │ │ + andls r9, r6, r9, lsr r8 │ │ + stmdacs r0, {r1, r3, r4, r5, fp, ip, pc} │ │ + adchi pc, ip, #0 │ │ + @ instruction: 0xf04f0080 │ │ + andsls r0, r6, r0, lsl #18 │ │ + andmi pc, r0, pc, asr #32 │ │ + beq 69bb4 │ │ + tstls r5, r6, lsl #24 │ │ + bcs 671cc │ │ + sbchi pc, sl, #0 │ │ + stmdbeq r4, {r0, r3, r8, ip, sp, lr, pc} │ │ + strbmi r9, [r8, #-2070] @ 0xfffff7ea │ │ + rsbshi pc, r7, #0 │ │ + andeq lr, r9, r4, lsl #22 │ │ + beq 6a804 │ │ + subsls r2, pc, r0 │ │ + beq 106ac9c │ │ + blx 46ad94 │ │ + mrc 6, 0, sp, cr0, cr1, {1} │ │ + @ instruction: 0xf0800a10 │ │ + stmdacs r0, {r8, lr} │ │ + bicmi fp, r1, #72, 30 @ 0x120 │ │ + ldmdals sp, {r0, r1, r2, r3, r9, fp, ip, sp, pc}^ │ │ + stmdble sl!, {r0, r1, fp, sp} │ │ + stmdbls r5!, {sp} │ │ + tstcc r1, lr, asr fp │ │ + ldmdbls r4, {r0, r2, r5, r8, ip, pc} │ │ + streq pc, [r0, #-325] @ 0xfffffebb │ │ + andcc r5, r4, pc, lsl r0 │ │ + subsls r0, pc, r9, asr #15 │ │ + strbhi pc, [r4], #0 @ │ │ + andcs sl, r2, #96, 18 @ 0x180000 │ │ + blt 1869940 │ │ + smlabteq r0, sp, r9, lr │ │ + stmdbls r0!, {r3, r4, r5, fp, sp, pc} │ │ + @ instruction: 0xff8ef01a │ │ + ldmib sp, {r2, r5, r8, r9, sl, fp, ip, pc}^ │ │ + stmdacs r0, {r3, r4, r5, r9} │ │ + ldmdbls sl!, {r0, r1, r6, r7, ip, lr, pc} │ │ + vshr.s8 d18, d1, #8 │ │ + addmi r0, r2, #0 │ │ + rsbshi pc, r8, #64 @ 0x40 │ │ + @ instruction: 0xd1bd07c8 │ │ + smladcs r0, r4, r3, lr │ │ + stmdacs r3, {r0, r2, r3, r4, r6, fp, ip, pc} │ │ + ldrdcs sp, [r1], -r4 │ │ + andls r2, r0, r0, lsl #2 │ │ + andcs sl, r4, #6094848 @ 0x5d0000 │ │ + @ instruction: 0xf01f2301 │ │ + ldmdals pc, {r0, r4, r6, r7, r9, sl, fp, ip, sp, lr, pc}^ @ │ │ + bls 1e9180 │ │ + ldmdbge r8, {r3, r4, r5, fp, sp, pc}^ │ │ + ldc2 0, cr15, [r4], #104 @ 0x68 │ │ + svcls 0x00249938 │ │ + svcmi 0x0000f1b1 │ │ + ldrthi pc, [ip], #0 @ │ │ + andls r9, r6, r9, lsr r8 │ │ + bls 2d5358 │ │ + @ instruction: 0xf0002800 │ │ + addeq r8, r0, pc, asr #3 │ │ + stmdbeq r0, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ + @ instruction: 0xf04f9016 │ │ + b fe13f284 │ │ + @ instruction: 0x9c060a00 │ │ + and r9, r9, r4, lsl r1 │ │ + bls 2b9a90 │ │ + addhi pc, sl, #0 │ │ + stmdbeq r4, {r0, r3, r8, ip, sp, lr, pc} │ │ + strbmi r9, [r8, #-2070] @ 0xfffff7ea │ │ + andhi pc, ip, #0 │ │ + andvc pc, r9, r4, asr r8 @ │ │ + ldmdals sp, {r8, sp}^ │ │ + stmdacs r3, {r0, r1, r2, r3, r4, r6, r8, ip, pc} │ │ + andeq pc, r0, pc, asr #32 │ │ + blls 17e5754 │ │ + smlabbmi r0, r7, r0, pc @ │ │ + andspl fp, r9, r9, lsl #20 │ │ + stmdbls r5!, {r2, ip, sp} │ │ + qaddcc r9, pc, r1 @ │ │ + @ instruction: 0xf1459125 │ │ + ldrbeq r0, [r1, r0, lsl #10] │ │ + ldrbhi pc, [lr], #-0 @ │ │ + andcs sl, r2, #96, 18 @ 0x180000 │ │ + blt 1869a0c │ │ + smlabteq r0, sp, r9, lr │ │ + stmdbls r0!, {r3, r4, r5, fp, sp, pc} │ │ + @ instruction: 0xff28f01a │ │ + ldmib sp, {r2, r5, r8, r9, sl, fp, ip, pc}^ │ │ + stmdacs r0, {r3, r4, r5, r9} │ │ + ldmdbls sl!, {r1, r2, r3, r6, r7, ip, lr, pc} │ │ + vshr.s8 d18, d1, #8 │ │ + addmi r0, r2, #0 │ │ + andshi pc, fp, #64 @ 0x40 │ │ + strbeq r9, [r8, sl, lsl #20] │ │ + adcs sp, pc, #200, 2 @ 0x32 │ │ + andcs r2, r4, #1 │ │ + ldmdage sp, {ip, pc}^ │ │ + @ instruction: 0xf01f2301 │ │ + bls 2eecd0 │ │ + @ instruction: 0xe7cc985f │ │ + ldmdage r8!, {r1, r2, r9, fp, ip, pc} │ │ + @ instruction: 0xf013a958 │ │ + ldmdbls r8!, {r0, r1, r2, r3, r4, r6, sl, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xf1b19f24 │ │ + @ instruction: 0xf0004f00 │ │ + ldmdals r9!, {r0, r2, r3, r6, sl, pc} │ │ + ldmdals sl!, {r1, r2, ip, pc} │ │ + @ instruction: 0xf0002800 │ │ + @ instruction: 0xf8dd81d9 │ │ + sbceq sl, r0, r8, lsl r0 │ │ + @ instruction: 0xf04f9005 │ │ + @ instruction: 0xf04f4000 │ │ + rsbmi r0, r0, r0, lsl #18 │ │ + andls r9, fp, r4, lsl #2 │ │ + svclt 0x0000e00b │ │ + @ instruction: 0xfffe7ab2 │ │ + @ instruction: 0xf0002a00 │ │ + @ instruction: 0xf109823c │ │ + stmdals r5, {r3, r8, fp} │ │ + @ instruction: 0xf0004548 │ │ + bl 2cfa40 │ │ + ldcl 0, cr0, [r0, #36] @ 0x24 │ │ + andcs r0, r0, r0, lsl #22 │ │ + mrc 0, 7, r9, cr4, cr15, {2} │ │ + vneg.f64 d16, d16 │ │ + @ instruction: 0xd63afa10 │ │ + blne c6a4c4 │ │ + svclt 0x00482800 │ │ + blt 4002b0 │ │ + tstpmi r0, pc, asr #32 @ p-variant is OBSOLETE │ │ + @ instruction: 0xf04fbf48 │ │ + strdmi r3, [r8], #-31 @ 0xffffffe1 │ │ + ldmdals sp, {r2, r9, fp, ip, sp, pc}^ │ │ + stmdble pc!, {r0, r1, r2, fp, sp} @ │ │ + blls 17b73a4 │ │ + andspl r1, ip, r9, lsl r8 │ │ + subvs r3, pc, r8 │ │ + subsls r9, pc, r5, lsr #18 │ │ + @ instruction: 0x91253101 │ │ + @ instruction: 0xf1459916 │ │ + strbeq r0, [r9, r0, lsl #10] │ │ + mvnhi pc, #0 │ │ + andcs r9, r2, #180224 @ 0x2c000 │ │ + stmdbge r0!, {r0, r5, r6, r8, ip, pc}^ │ │ + orrlt pc, r0, sp, asr #17 │ │ + smlabteq r0, sp, r9, lr │ │ + stmdbls r0!, {r3, r4, r5, fp, sp, pc} │ │ + mcr2 0, 5, pc, cr14, cr10, {0} @ │ │ + ldmib sp, {r2, r5, r8, r9, sl, fp, ip, pc}^ │ │ + stmdacs r0, {r3, r4, r5, r9} │ │ + ldmdbls sl!, {r1, r3, r4, r5, r7, ip, lr, pc} │ │ + vshr.s8 d18, d1, #8 │ │ + addmi r0, r2, #0 │ │ + bichi pc, r1, r0, asr #32 │ │ + @ instruction: 0xd1b407c8 │ │ + strcs lr, [r0], #-602 @ 0xfffffda6 │ │ + ldmdals sp, {r8, r9, sl, sp}^ │ │ + stmiale pc, {r0, r1, r2, fp, sp}^ @ │ │ + tstcs r0, r1 │ │ + ldmdage sp, {ip, pc}^ │ │ + movwcs r2, #4616 @ 0x1208 │ │ + ldc2l 0, cr15, [r0, #124]! @ 0x7c │ │ + @ instruction: 0xe7c6985f │ │ + ldmdage r8!, {r1, r2, r9, fp, ip, pc} │ │ + @ instruction: 0xf013a958 │ │ + ldmdals r8!, {r0, r2, r6, sl, fp, ip, sp, lr, pc} │ │ + svcmi 0x0000f1b0 │ │ + bichi pc, ip, #0 │ │ + ldmib sp, {r0, r1, ip, pc}^ │ │ + stmdacs r0, {r0, r3, r4, r5, ip, sp, lr} │ │ + @ instruction: 0xf0009706 │ │ + bl 20f798 │ │ + andls r0, r4, r0, asr #1 │ │ + @ instruction: 0xf890981f │ │ + andls r0, fp, r8, lsr #32 │ │ + andmi pc, r0, pc, asr #32 │ │ + stcls 0, cr4, [r0], #-384 @ 0xfffffe80 │ │ + and r9, r7, r5 │ │ + @ instruction: 0xf0002a00 │ │ + @ instruction: 0x370881d7 │ │ + addmi r9, r7, #4, 16 @ 0x40000 │ │ + sbchi pc, r3, r0 │ │ + andne lr, r0, #3522560 @ 0x35c000 │ │ + @ instruction: 0xf1b92000 │ │ + subsls r0, pc, r2, lsl #30 │ │ + @ instruction: 0x4608d115 │ │ + bls 300cb8 │ │ + stmib sp, {sl, sp}^ │ │ + @ instruction: 0xf01f4400 │ │ + bls 17aec0c │ │ + ldmdble r3!, {r0, r1, r2, r9, fp, sp} │ │ + blt 296200 │ │ + tstpl r9, r0, lsl #20 │ │ + subvs r1, r8, r9, lsl r9 │ │ + andeq pc, r8, r4, lsl #2 │ │ + stcls 0, cr9, [r0], #-380 @ 0xfffffe84 │ │ + blls 3274b0 │ │ + @ instruction: 0xf020a85d │ │ + ldmib sp, {r0, r1, r2, r3, r7, sl, fp, ip, sp, lr, pc}^ │ │ + stmdbls r5!, {r1, r2, r3, r4, r6, ip, sp} │ │ + @ instruction: 0x91253101 │ │ + streq pc, [r0, #-325] @ 0xfffffebb │ │ + bicvc lr, sl, pc, asr sl │ │ + msrhi SPSR_fx, #0 │ │ + andcs r9, r2, #81920 @ 0x14000 │ │ + stmdbge r0!, {r0, r5, r6, r8, ip, pc}^ │ │ + orrlt pc, r0, sp, asr #17 │ │ + smlabteq r0, sp, r9, lr │ │ + @ instruction: 0x4621a838 │ │ + mrc2 0, 1, pc, cr2, cr10, {0} │ │ + eorseq lr, r8, #3620864 @ 0x374000 │ │ + adcsle r2, fp, r0, lsl #16 │ │ + andscs r9, r1, sl, lsr r9 │ │ + andeq pc, r0, r8, asr #5 │ │ + @ instruction: 0xf0404282 │ │ + strbeq r8, [r8, pc, asr #2] │ │ + ldrh sp, [r1, #21]! │ │ + eorls r2, r7, r1, lsl #4 │ │ + andls sl, r0, #6094848 @ 0x5d0000 │ │ + tstcs r0, ip, lsl #12 │ │ + movwcs r2, #4616 @ 0x1208 │ │ + ldc2l 0, cr15, [r8, #-124]! @ 0xffffff84 │ │ + stmdals r7!, {r0, r5, r9, sl, lr} │ │ + sbfx r9, pc, #24, #30 │ │ + ldmdage r8!, {r1, r2, r9, fp, ip, pc} │ │ + @ instruction: 0xf013a958 │ │ + ldmdbls r8!, {r0, r1, r2, r3, r4, r5, r7, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xf1b19f24 │ │ + @ instruction: 0xf0004f00 │ │ + ldmdals r9!, {r0, r3, r4, r6, r8, r9, pc} │ │ + ldmdals sl!, {r1, r2, ip, pc} │ │ + @ instruction: 0xf0002800 │ │ + @ instruction: 0xf8dd80e1 │ │ + sbceq sl, r0, r8, lsl r0 │ │ + @ instruction: 0xf04f900b │ │ + @ instruction: 0xf04f4000 │ │ + rsbmi r0, r0, r0, lsl #18 │ │ + andsls r9, r6, r5, lsl #2 │ │ + bcs 67564 │ │ + cmnphi r5, r0 @ p-variant is OBSOLETE │ │ + stmdbeq r8, {r0, r3, r8, ip, sp, lr, pc} │ │ + strbmi r9, [r8, #-2059] @ 0xfffff7f5 │ │ + sbchi pc, r5, r0 │ │ + tsteq r9, sl, lsl #22 │ │ + andvc pc, r9, sl, asr r8 @ │ │ + stmdavs ip, {r0, r2, r3, r4, r6, fp, ip, pc}^ │ │ + stmdacs r7, {r8, sp} │ │ + andeq pc, r0, pc, asr #32 │ │ + pushle {r0, r1, r2, r3, r4, r6, r8, ip, pc} │ │ + tstpmi r0, pc, asr #32 @ p-variant is OBSOLETE │ │ + rsbmi r9, r1, lr, asr fp │ │ + blt 29de60 │ │ + ldmdane r9, {r0, r3, r4, ip, lr} │ │ + subvs r3, sl, r8 │ │ + subsls r9, pc, r5, lsr #18 │ │ + @ instruction: 0x91253101 │ │ + @ instruction: 0xf1459915 │ │ + strbeq r0, [r9, r0, lsl #10] │ │ + rscshi pc, ip, #0 │ │ + andcs r9, r2, #360448 @ 0x58000 │ │ + stmdbge r0!, {r0, r5, r6, r8, ip, pc}^ │ │ + orrlt pc, r0, sp, asr #17 │ │ + smlabteq r0, sp, r9, lr │ │ + stmdbls r0!, {r3, r4, r5, fp, sp, pc} │ │ + stc2l 0, cr15, [r4, #104] @ 0x68 │ │ + eorseq lr, r8, #3620864 @ 0x374000 │ │ + sbcle r2, r6, r0, lsl #16 │ │ + andscs r9, r1, sl, lsr r9 │ │ + andeq pc, r0, r8, asr #5 │ │ + @ instruction: 0xf0404282 │ │ + strbeq r8, [r8, sl, ror #1] │ │ + orrs sp, r7, r0, asr #3 │ │ + andcs r2, r8, #1 │ │ + ldmdage sp, {ip, pc}^ │ │ + @ instruction: 0xf01f2301 │ │ + ldmdals pc, {r0, r2, r3, r8, sl, fp, ip, sp, lr, pc}^ @ │ │ + @ instruction: 0xf8dde7c8 │ │ + svcls 0x00249074 │ │ + @ instruction: 0xb114e9dd │ │ + stmdals r3, {r1, r4, r7, sp, lr, pc} │ │ + stmdacs r0, {r0, r1, r2, r5, r8, sl, ip, pc} │ │ + ldrsbtls pc, [r4], #-141 @ 0xffffff73 @ │ │ + strvc lr, [r4, #-2525]! @ 0xfffff623 │ │ + @ instruction: 0xf8cde07e │ │ + @ instruction: 0xf04fa09c │ │ + @ instruction: 0xf04f0e01 │ │ + tstcs r1, r1, lsl #22 │ │ + @ instruction: 0xf04f2301 │ │ + @ instruction: 0xf8dd0a01 │ │ + ldmib sp, {r2, r4, r5, r6, ip, pc}^ │ │ + rsbs r7, fp, r4, lsr #10 │ │ + ldrsblt pc, [r0], #-141 @ 0xffffff73 @ │ │ + ldmdals fp!, {r0, r1, r2, r4, r6, sp, lr, pc} │ │ + cdpeq 0, 0, cr15, cr1, cr15, {2} │ │ + @ instruction: 0xf04f9009 │ │ + ldmdals ip!, {r0, r8, r9, fp} │ │ + andls r2, r8, r1, lsl #6 │ │ + tstls fp, r8, lsl #20 │ │ + @ instruction: 0xf8cd2101 │ │ + mulls r7, ip, r0 │ │ + ldrsbtls pc, [r4], #-141 @ 0xffffff73 @ │ │ + strvc lr, [r4, #-2525]! @ 0xfffff623 │ │ + andscs lr, r4, lr, ror r1 │ │ + addsge pc, ip, sp, asr #17 │ │ + stmia r4!, {r0, r3, r5, r7, ip, sp, lr, pc}^ │ │ + ldrsbtls pc, [r4], #-141 @ 0xffffff73 @ │ │ + ldmib sp, {fp, sp}^ │ │ + @ instruction: 0xf0007524 │ │ + stmibmi r6, {r0, r1, r2, r3, r6, r7, r9, pc}^ │ │ + andls r2, fp, #20, 4 @ 0x40000001 │ │ + andls r4, r9, r9, ror r4 │ │ + cdp2 0, 4, cr15, cr3, cr5, {5} │ │ + @ instruction: 0xf04f2011 │ │ + vmull.p8 q8, d8, d1 │ │ + svcne 0x00020000 │ │ + @ instruction: 0xf04f2000 │ │ + andls r0, r7, r1, lsl #22 │ │ + tstcs r1, r4, lsl r0 │ │ + andls r2, r8, r1, lsl #6 │ │ + andscs lr, r1, #92, 2 │ │ + @ instruction: 0xf8cd2000 │ │ + @ instruction: 0xf04fa09c │ │ + andls r0, fp, r1, lsl #28 │ │ + bleq ab7d4 │ │ + movwcs r2, #4353 @ 0x1101 │ │ + andeq pc, r0, #200, 4 @ 0x8000000c │ │ + ldrsbtls pc, [r4], #-141 @ 0xffffff73 @ │ │ + strvc lr, [r4, #-2525]! @ 0xfffff623 │ │ + andcs lr, r1, ip, asr #2 │ │ + stmib sp, {r0, r1, r2, r5, r8, sl, ip, pc}^ │ │ + @ instruction: 0xf04f0015 │ │ + ands r0, r8, r1, lsl #20 │ │ + strls r2, [r7, #-1]! │ │ + bleq ab7fc │ │ + andseq lr, r5, sp, asr #19 │ │ + beq ab804 │ │ + @ instruction: 0xf8dd9914 │ │ + stcls 0, cr9, [r5, #-464]! @ 0xfffffe30 │ │ + muls r5, r9, r9 │ │ + @ instruction: 0xf04f9527 │ │ + stmdbls r4, {r0, r9, fp} │ │ + andcs lr, r1, r6 │ │ + andsls r9, r6, r7, lsr #10 │ │ + beq ab824 │ │ + stmdbls r5, {r2, r5, r8, r9, sl, fp, ip, pc} │ │ + ldrsbtls pc, [r4], #-141 @ 0xffffff73 @ │ │ + @ instruction: 0x9d252900 │ │ + ldrsblt pc, [r0], #-141 @ 0xffffff73 @ │ │ + stmdals r6, {r1, ip, lr, pc} │ │ + stmda sl!, {r0, r3, r5, r7, ip, sp, lr, pc}^ │ │ + ldrsbtgt pc, [r0], -sp @ │ │ + ldrd pc, [r8], -sp @ │ │ + tstne r5, #3620864 @ 0x374000 │ │ + ldmdals sp, {r0, r9, sp}^ │ │ + andscs r9, r1, #-1342177280 @ 0xb0000000 │ │ + andeq pc, r0, #200, 4 @ 0x8000000c │ │ + @ instruction: 0xf0402800 │ │ + strt r8, [pc], #281 @ 2f720 │ │ + andls r9, r9, fp, lsr r8 │ │ + andls r9, r8, ip, lsr r8 │ │ + strls r0, [r7, #-2568]! @ 0xfffff5f8 │ │ + andls r9, r7, fp, lsl #2 │ │ + ldmdals fp!, {r2, r3, r4, r7, sp, lr, pc} │ │ + ldmdals ip!, {r0, r3, ip, pc} │ │ + beq 25375c │ │ + tstls fp, r7, lsr #10 │ │ + adc r9, r5, r7 │ │ + strls r2, [r7, #-20]! @ 0xffffffec │ │ + stmda r4!, {r0, r3, r5, r7, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf0002800 │ │ + stmibmi r9, {r0, r1, r4, r6, r9, pc} │ │ + andls r2, fp, #20, 4 @ 0x40000001 │ │ + andls r4, r9, r9, ror r4 │ │ + stc2l 0, cr15, [r7, #660] @ 0x294 │ │ + vshr.s8 d18, d1, #8 │ │ + svcne 0x00020000 │ │ + andls r2, r7, r0 │ │ + andls r2, r8, r4, lsl r0 │ │ + ldmdals fp!, {r2, r3, r4, r5, r6, sp, lr, pc} │ │ + ldmdals ip!, {r0, r3, ip, pc} │ │ + beq 25379c │ │ + tstls fp, r7, lsr #10 │ │ + adds r9, r9, r7 │ │ + andls r9, r9, fp, lsr r8 │ │ + andls r9, r8, ip, lsr r8 │ │ + strls r0, [r7, #-2568]! @ 0xfffff5f8 │ │ + andls r9, r7, fp, lsl #2 │ │ + ldmdals fp!, {r1, r5, r7, sp, lr, pc} │ │ + ldmdals ip!, {r0, r3, ip, pc} │ │ + beq 2537c0 │ │ + tstls fp, r7, lsr #10 │ │ + adc r9, sp, r7 │ │ + strls r2, [r7, #-20]! @ 0xffffffec │ │ + ldmda r2!, {r0, r3, r5, r7, ip, sp, lr, pc} │ │ + @ instruction: 0xf0002800 │ │ + ldmdbmi r1!, {r0, r5, r9, pc}^ │ │ + andls r2, fp, #20, 4 @ 0x40000001 │ │ + andls r4, r9, r9, ror r4 │ │ + ldc2 0, cr15, [r5, #660] @ 0x294 │ │ + vshr.s8 d18, d1, #8 │ │ + svcne 0x00020000 │ │ + andls r2, r7, r0 │ │ + andls r2, r8, r4, lsl r0 │ │ + andscs lr, r4, ip, asr r0 │ │ + @ instruction: 0xf0a99527 │ │ + stmdacs r0, {r2, r3, r4, fp, sp, lr, pc} │ │ + andhi pc, sl, #0 │ │ + andscs r4, r4, #1671168 @ 0x198000 │ │ + ldrbtmi r9, [r9], #-523 @ 0xfffffdf5 │ │ + @ instruction: 0xf0a59009 │ │ + andscs pc, r1, lr, ror sp @ │ │ + andeq pc, r0, r8, asr #5 │ │ + andcs r1, r0, r2, lsl #30 │ │ + andscs r9, r4, r7 │ │ + subs r9, r9, r8 │ │ + strls r2, [r7, #-20]! @ 0xffffffec │ │ + stmda r4, {r0, r3, r5, r7, ip, sp, lr, pc} │ │ + @ instruction: 0xf0002800 │ │ + ldmdbmi ip, {r0, r1, r4, r5, r6, r7, r8, pc}^ │ │ + andls r2, fp, #20, 4 @ 0x40000001 │ │ + andls r4, r9, r9, ror r4 │ │ + stc2l 0, cr15, [r7, #-660]! @ 0xfffffd6c │ │ + vshr.s8 d18, d1, #8 │ │ + svcne 0x00020000 │ │ + andls r2, r7, r0 │ │ + andls r2, r8, r4, lsl r0 │ │ + andscs lr, r4, r4, asr r0 │ │ + @ instruction: 0xf0a89527 │ │ + stmdacs r0, {r1, r2, r3, r5, r6, r7, r8, r9, sl, fp, sp, lr, pc} │ │ + bicshi pc, ip, r0 │ │ + andscs r4, r4, #1327104 @ 0x144000 │ │ + ldrbtmi r9, [r9], #-523 @ 0xfffffdf5 │ │ + @ instruction: 0xf0a59009 │ │ + andscs pc, r1, r0, asr sp @ │ │ + andeq pc, r0, r8, asr #5 │ │ + andcs r1, r0, r2, lsl #30 │ │ + andscs r9, r4, r7 │ │ + subs r9, r1, r8 │ │ + andcs r2, r0, r1, lsl r2 │ │ + andeq pc, r0, #200, 4 @ 0x8000000c │ │ + andls r9, fp, r7, lsr #10 │ │ + @ instruction: 0xf04f9805 │ │ + @ instruction: 0xf8dd0b01 │ │ + stcls 0, cr9, [r5, #-464]! @ 0xfffffe30 │ │ + @ instruction: 0xf8dd2800 │ │ + @ instruction: 0xf8ddc030 │ │ + ands lr, r0, r8, lsr #32 │ │ + andcs r2, r0, r1, lsl r2 │ │ + andeq pc, r0, #200, 4 @ 0x8000000c │ │ + andls r9, fp, r7, lsr #10 │ │ + @ instruction: 0xf04f9814 │ │ + @ instruction: 0xf8dd0e01 │ │ + @ instruction: 0xf04f9074 │ │ + fstmdbxls r5!, {d0-d-1} @ Deprecated │ │ + @ instruction: 0xf8dd2800 │ │ + @ instruction: 0xf04fc030 │ │ + eors r0, r8, r1, lsl #2 │ │ + andcs r2, r0, r1, lsl r2 │ │ + andeq pc, r0, #200, 4 @ 0x8000000c │ │ + andls r9, fp, r7, lsr #10 │ │ + ldrsbtls pc, [r4], #-141 @ 0xffffff73 @ │ │ + stcls 3, cr2, [r5, #-4]! │ │ + ldrsbtgt pc, [r0], -sp @ │ │ + ldrd pc, [r8], -sp @ │ │ + @ instruction: 0xb114e9dd │ │ + ands r9, r1, r4, lsl #16 │ │ + andcs r2, r0, r1, lsl r2 │ │ + andeq pc, r0, #200, 4 @ 0x8000000c │ │ + andls r9, fp, r7, lsr #10 │ │ + ldrsbtls pc, [r4], #-141 @ 0xffffff73 @ │ │ + strvc lr, [r4, #-2525]! @ 0xfffff623 │ │ + ldrsbtgt pc, [r0], -sp @ │ │ + ldrd pc, [r8], -sp @ │ │ + @ instruction: 0xb114e9dd │ │ + stmdals r3, {r1, r2, r4, r8, r9, fp, ip, pc} │ │ + strht fp, [r5], -r0 │ │ + andcs r2, r0, r1, lsl r2 │ │ + andeq pc, r0, #200, 4 @ 0x8000000c │ │ + andls r9, fp, r7, lsr #10 │ │ + tstcs r1, r5, lsl #16 │ │ + ldrsbtls pc, [r4], #-141 @ 0xffffff73 @ │ │ + strvc lr, [r4, #-2525]! @ 0xfffff623 │ │ + @ instruction: 0xf8dd2800 │ │ + @ instruction: 0xf8ddc030 │ │ + @ instruction: 0xf8dde028 │ │ + @ instruction: 0xf04fb050 │ │ + andle r0, pc, r1, lsl #6 │ │ + ldrmi r9, [r2], r6, lsl #16 │ │ + tstlt r4, sp, asr #19 │ │ + tstls r6, #254803968 @ 0xf300000 │ │ + svc 0x0050f0a8 │ │ + ldmib sp, {r1, r2, r3, r4, r6, r7, r9, sl, lr}^ │ │ + @ instruction: 0xf8dd1315 │ │ + @ instruction: 0x4652b050 │ │ + ldrsbtgt pc, [r0], -sp @ │ │ + @ instruction: 0xf04f985d │ │ + stmdacs r0, {r0, r9, fp} │ │ + blge fe66ca4c │ │ + stmib sp, {r1, r2, r3, r4, r6, fp, ip, pc}^ │ │ + usatmi fp, #19, r4, lsl #2 │ │ + tstls r6, #1342177282 @ 0x50000002 │ │ + svc 0x003af0a8 │ │ + bls 9814dc │ │ + tstne r5, #3620864 @ 0x374000 │ │ + ldrsblt pc, [r0], #-141 @ 0xffffff73 @ │ │ + ldrsbtgt pc, [r0], -sp @ │ │ + bllt fe1ed970 │ │ + @ instruction: 0xfffe7498 │ │ + @ instruction: 0xfffe73a0 │ │ + @ instruction: 0xfffe733c │ │ + @ instruction: 0xfffe730e │ │ + @ instruction: 0xfffe72e0 │ │ + @ instruction: 0xfffe72b2 │ │ + blcs 36dad0 │ │ + bcs 3ddc4 │ │ + teqphi r4, r0, asr #32 @ p-variant is OBSOLETE │ │ + mvnsle r2, r0, lsl #18 │ │ + andcs r2, r0, r0, lsl #10 │ │ + ldmdals r6!, {r0, r1, r2, r5, ip, pc} │ │ + teqcs r0, r8, lsr ip │ │ + strtmi r6, [r0], -r6, lsl #16 │ │ + ldc2 0, cr15, [r9], #-660 @ 0xfffffd6c │ │ + @ instruction: 0x46309913 │ │ + teqcs r0, #35651584 @ 0x2200000 │ │ + b fe46bb80 │ │ + ldrdeq lr, [r0, #-157] @ 0xffffff63 │ │ + bls 9f9208 │ │ + streq pc, [r0], -r8, asr #5 │ │ + ldrdge pc, [r8], sp │ │ + subsmi r4, r1, r8, rrx │ │ + movwmi r4, #34356 @ 0x8634 │ │ + andscs sp, r5, r1, lsl r0 │ │ + svc 0x001cf0a8 │ │ + @ instruction: 0xf0002800 │ │ + stmibmi r2!, {r0, r1, r8, pc} │ │ + andsls r2, r1, #1342177281 @ 0x50000001 │ │ + andsls r4, sl, r9, ror r4 │ │ + ldc2l 0, cr15, [pc], #-660 @ 2f75c │ │ + andcs r1, r0, r4, lsr pc │ │ + andscs r9, r5, r0, lsl r0 │ │ + stmdage r8, {r0, r1, r2, r3, ip, pc}^ │ │ + mrrc2 0, 1, pc, r2, cr8 @ │ │ + stmdacs r0, {r3, r6, fp, ip, pc} │ │ + stmdals r9, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ + stmda r4, {r0, r2, r3, r5, r6, ip, sp, lr, pc} │ │ + adcsmi r9, r4, #425984 @ 0x68000 │ │ + addshi pc, r0, r0, asr #32 │ │ + ldmdbeq r0!, {r0, r3, r8, ip, sp, lr, pc} │ │ + tstls sl, r2, lsl r8 │ │ + @ instruction: 0xf47f4581 │ │ + ldmdage r2, {r1, r2, r4, r9, fp, sp, pc}^ │ │ + andvs pc, r0, sl, asr #17 │ │ + ldc2 0, cr15, [ip], #-96 @ 0xffffffa0 │ │ + ldrdhi pc, [ip], sp │ │ + @ instruction: 0xf8ddad38 │ │ + ldmdals r2, {r3, r4, r7, ip, pc}^ │ │ + eors fp, r0, r0, ror fp │ │ + ldrcs r2, [fp, #-27] @ 0xffffffe5 │ │ + cdp 0, 14, cr15, cr8, cr8, {5} │ │ + @ instruction: 0xf0002800 │ │ + ldmibmi r0, {r0, r1, r4, r6, r7, pc} │ │ + @ instruction: 0x4604221b │ │ + @ instruction: 0xf0a54479 │ │ + svcne 0x0030fc4c │ │ + stmib sl, {r0, r5, r9, sl, lr}^ │ │ + ands r0, r3, r0, lsl #10 │ │ + smlaleq pc, r7, sp, r8 @ │ │ + @ instruction: 0xf8bd46a1 │ │ + ldcls 0, cr7, [fp, #-916]! @ 0xfffffc6c │ │ + b 1215f58 │ │ + @ instruction: 0xf8dd4000 │ │ + @ instruction: 0xf8aa808c │ │ + stceq 0, cr0, [r0], {5} │ │ + andcc pc, r4, sl, lsl #17 │ │ + andcs pc, r0, sl, asr #17 │ │ + andeq pc, r7, sl, lsl #17 │ │ + stmib sl, {r1, r4, r6, fp, sp, pc}^ │ │ + @ instruction: 0xf0181502 │ │ + ldmdals r2, {r0, r3, sl, fp, ip, sp, lr, pc}^ │ │ + tstlt r0, r8, lsr sp │ │ + @ instruction: 0xf06c9853 │ │ + @ instruction: 0xf8d8efbc │ │ + stmdacs r0, {r6} │ │ + @ instruction: 0xf04fd176 │ │ + stcge 0, cr3, [r8], #-1020 @ 0xfffffc04 │ │ + subeq pc, r0, r8, asr #17 │ │ + stclgt 6, cr4, [lr], {40} @ 0x28 │ │ + stclgt 0, cr12, [lr], {206} @ 0xce │ │ + strtmi ip, [r9], -lr, asr #1 │ │ + smlalne lr, ip, r4, r8 │ │ + rscne lr, ip, r0, lsl #17 │ │ + @ instruction: 0xf01ba848 │ │ + bge 126f8b8 │ │ + @ instruction: 0x4611e9d8 │ │ + ldrdpl pc, [ip], #-136 @ 0xffffff78 │ │ + @ instruction: 0xf1b4ca07 │ │ + blls 6836dc │ │ + andle ip, ip, r7, lsl #6 │ │ + @ instruction: 0x4637b135 │ │ + bleq 16dc44 │ │ + svc 0x0094f06c │ │ + mvnsle r3, r1, lsl #26 │ │ + svclt 0x001c2c00 │ │ + @ instruction: 0xf0a84630 │ │ + @ instruction: 0xf8d8ee6e │ │ + andcc r0, r1, r0, asr #32 │ │ + subeq pc, r0, r8, asr #17 │ │ + strpl lr, [r3], #-2521 @ 0xfffff627 │ │ + stcne 1, cr11, [lr, #-336]! @ 0xfffffeb0 │ │ + stceq 8, cr15, [r4], {86} @ 0x56 │ │ + svclt 0x001c2800 │ │ + @ instruction: 0xf0a86830 │ │ + @ instruction: 0x360cee5e │ │ + mvnsle r3, r1, lsl #24 │ │ + ldrdeq pc, [r8], -r9 │ │ + svclt 0x001c2800 │ │ + @ instruction: 0xf0a84628 │ │ + rsblt lr, r3, r4, asr lr │ │ + svchi 0x00f0e8bd │ │ + ldmib sp, {r0, r4, fp, ip, pc}^ │ │ + @ instruction: 0xf8dd520f │ │ + @ instruction: 0xf8dd808c │ │ + sbclt r9, r0, #152 @ 0x98 │ │ + andcs lr, r2, r0, asr #20 │ │ + andmi lr, r0, sl, asr #19 │ │ + @ instruction: 0xf8dde79c │ │ + strtmi r8, [r1], ip, lsl #1 │ │ + @ instruction: 0xf47f42b2 │ │ + @ instruction: 0xf7ffa91f │ │ + stmdage r8, {r0, r1, r2, r4, r6, r8, fp, ip, sp, pc}^ │ │ + @ instruction: 0xf0184614 │ │ + stmdals r8, {r0, r1, r2, r3, r4, r7, r8, r9, fp, ip, sp, lr, pc}^ │ │ + svclt 0x001c2800 │ │ + @ instruction: 0xf06c9849 │ │ + ldmib sp, {r1, r4, r6, r8, r9, sl, fp, sp, lr, pc}^ │ │ + stmdbls r9, {r1, r5, fp, sp, pc} │ │ + @ instruction: 0x9098f8dd │ │ + strcs lr, [r7, #-2525] @ 0xfffff623 │ │ + ldrb r9, [lr, fp, lsl #16] │ │ + ldrbtmi r4, [r8], #-2115 @ 0xfffff7bd │ │ + ldc2l 0, cr15, [r6, #-68] @ 0xffffffbc │ │ + ldrbtmi r4, [r8], #-2114 @ 0xfffff7be │ │ + @ instruction: 0xf8d8f010 │ │ + ldrbtmi r4, [r8], #-2110 @ 0xfffff7c2 │ │ + stc2l 0, cr15, [lr, #-68] @ 0xffffffbc │ │ + ldmdage ip, {r3, r4, r5, r8, fp, lr}^ │ │ + ldrbtmi r4, [r9], #-2616 @ 0xfffff5c8 │ │ + @ instruction: 0xf011447a │ │ + blmi 106ea58 │ │ + @ instruction: 0xf010447b │ │ + stmdami pc!, {r0, r7, fp, ip, sp, lr, pc} @ │ │ + bmi bf8058 │ │ + ldrbtmi r4, [sl], #-1144 @ 0xfffffb88 │ │ + @ instruction: 0xf8ccf010 │ │ + ldrbtmi r4, [r8], #-2105 @ 0xfffff7c7 │ │ + @ instruction: 0xf8bef010 │ │ + ldrbtmi r4, [r8], #-2102 @ 0xfffff7ca │ │ + @ instruction: 0xf8baf010 │ │ + ldrbtmi r4, [r8], #-2099 @ 0xfffff7cd │ │ + @ instruction: 0xf8b6f010 │ │ + ldrbtmi r4, [r8], #-2088 @ 0xfffff7d8 │ │ + @ instruction: 0xf8b2f010 │ │ + ldrbtmi r4, [r8], #-2094 @ 0xfffff7d2 │ │ + @ instruction: 0xf8aef010 │ │ + tstcs r5, r1 │ │ + blx 186bc2a │ │ + tstcs fp, r1 │ │ + blx 176bc32 │ │ + tstcs r4, r1 │ │ + blx 166bc3a │ │ + ldccs 8, cr15, [r0], {80} @ 0x50 │ │ + subsmi pc, r5, r7, asr #12 │ │ + subvc pc, sl, r7, asr #13 │ │ + ldmdavs r1, {r0, r1, r2, r4, r8, r9, fp, ip, pc} │ │ + andsmi r4, r8, r8, asr #6 │ │ + addmi r9, r3, #24, 22 @ 0x6000 │ │ + bl 66084 │ │ + blls 86fd20 │ │ + bl 109d6c │ │ + ldmib r0, {r7}^ │ │ + bl f0830 │ │ + sbcseq r0, fp, r3, asr #6 │ │ + ldm r0!, {r0, r1, r4, r6, r8, ip, sp, pc}^ │ │ + blcc 64d450 │ │ + submi r4, pc, r6, asr r0 @ │ │ + mvnsle r4, r7, lsr r3 │ │ + ldrbtmi r4, [r8], #-2056 @ 0xfffff7f8 │ │ + @ instruction: 0xf87ef010 │ │ + ldrbtmi r4, [r8], #-2063 @ 0xfffff7f1 │ │ + @ instruction: 0xf87af010 │ │ + ldmdbls r8, {r0, r2, r9, fp, lr} │ │ + @ instruction: 0xf010447a │ │ + stmdami r7, {r0, r1, r4, r7, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xf0104478 │ │ + svclt 0x0000f871 │ │ + andeq fp, sl, lr, ror #1 │ │ + andeq sl, sl, ip, ror #28 │ │ + @ instruction: 0xfffe70f8 │ │ + @ instruction: 0xfffe9899 │ │ + strdeq fp, [sl], -r6 │ │ + strdeq fp, [sl], -r4 │ │ + muleq sl, r6, r1 │ │ + @ instruction: 0xfffe66a6 │ │ + muleq sl, ip, r1 │ │ + muleq sl, r6, r1 │ │ + @ instruction: 0xfffe6fc8 │ │ + andeq fp, sl, sl, lsr #2 │ │ + andeq fp, sl, sl, lsr #2 │ │ + ldrdeq sl, [sl], -r2 │ │ + andeq fp, sl, lr, ror r1 │ │ + andeq fp, sl, lr, lsr #3 │ │ + andeq fp, sl, r6, asr #3 │ │ + ldrdeq fp, [sl], -lr │ │ + andeq fp, sl, r4, lsl r4 │ │ + svcmi 0x00f0e92d │ │ + @ instruction: 0xf8d1b0b5 │ │ + ldrmi fp, [r1], r0 │ │ + ldmib r2, {r7, r9, sl, lr}^ │ │ + ldmib fp, {r1, r8, r9, sp}^ │ │ + subsmi r0, r9, ip, lsl #2 │ │ + movwmi r4, #32848 @ 0x8050 │ │ + @ instruction: 0xf899d117 │ │ + biclt r0, r8, r0, asr r0 │ │ + ldrdeq pc, [r0], #-137 @ 0xffffff77 │ │ + @ instruction: 0xf0402800 │ │ + strbmi r8, [r9], -pc, asr #4 │ │ + andmi pc, r0, pc, asr #32 │ │ + svccs 0x0044f851 │ │ + movwvc lr, #6609 @ 0x19d1 │ │ + svcmi 0x0000f1b2 │ │ + tstle r2, r8 │ │ + vshr.s8 d18, d1, #8 │ │ + stmdacc r8, {} @ │ │ + andscs lr, r1, r8 │ │ + andeq pc, r0, r8, asr #5 │ │ + and r3, r3, r1, lsl #16 │ │ + vshr.s8 d18, d1, #8 │ │ + stmdacc ip, {} @ │ │ + andeq pc, r0, r8, asr #17 │ │ + pop {r0, r2, r4, r5, ip, sp, pc} │ │ + @ instruction: 0xf8d98ff0 │ │ + stmib sp, {r4}^ │ │ + stmdacs r0, {r1, r3, r9, ip, sp} │ │ + strne lr, [r8, -sp, asr #19] │ │ + eorhi pc, r8, #64 @ 0x40 │ │ + andseq pc, r8, r9, lsl #2 │ │ + stmdbge ip, {r0, r2, ip, pc} │ │ + beq 166c16c │ │ + mvngt ip, ip, ror #17 │ │ + smlaleq lr, ip, r0, r8 │ │ + andmi pc, r0, pc, asr #32 │ │ + smlattcs r4, ip, r1, ip │ │ + eoreq pc, r0, r9, asr #17 │ │ + stmib sp, {sp}^ │ │ + vand d16, d0, d8 │ │ + stmib sp, {r0, r2, r3, r7, r8, ip, sp}^ │ │ + stmib sp, {r1, r2, r4}^ │ │ + stmib sp, {r1, r3, r4}^ │ │ + and r0, r1, ip, lsl r1 │ │ + @ instruction: 0xd11e0890 │ │ + @ instruction: 0xf0184650 │ │ + ldmdals fp, {r0, r2, r3, r4, r5, r7, r8, r9, fp, ip, sp, lr, pc} │ │ + rscsle r2, r9, r0, lsl #16 │ │ + movwcs r2, #8448 @ 0x2100 │ │ + strcs r2, [r0, -r1, lsl #12] │ │ + blx fe927d9e │ │ + stmdaeq r0, {r0, r1, r8, sl, sp}^ │ │ + strpl pc, [r7, #-2819] @ 0xfffff4fd │ │ + strpl pc, [r7, -r3, lsl #22] │ │ + bfieq r4, r3, (invalid: 12:2) │ │ + blx fe92416a │ │ + stmdacs r1, {r1, r2, r8, sl, sp} │ │ + blx 12412e │ │ + blx 2041a6 │ │ + ldrmi r1, [r6], -r6, lsl #2 │ │ + ldrbmi lr, [r1], -fp, ror #15 │ │ + stmibgt ip, {r1, r2, r5, fp, sp, pc}^ │ │ + sbcgt r3, ip, r4 │ │ + smulleq lr, ip, r1, r8 │ │ + @ instruction: 0xf8dbc0cc │ │ + @ instruction: 0xf8d90060 │ │ + stmdbls lr, {ip, sp, lr} │ │ + lsllt r9, r4, #2 │ │ + subeq lr, r0, r0, lsl #22 │ │ + ldrsbmi pc, [ip], #-139 @ 0xffffff75 @ │ │ + tsteq r5, r6, lsl lr │ │ + ldrtmi r6, [r0], -r1, lsr #16 │ │ + @ instruction: 0xf025463a │ │ + ldmdals r6, {r0, r2, r6, r7, r9, fp, ip, sp, lr, pc} │ │ + vsra.s8 d18, d1, #8 │ │ + addmi r0, r8, #0, 2 │ │ + addhi pc, r8, r0, asr #32 │ │ + ldccc 4, cr3, [r0, #-192]! @ 0xffffff40 │ │ + @ instruction: 0xf8dbd1f0 │ │ + ldrcs r0, [r1], #-108 @ 0xffffff94 │ │ + streq pc, [r0], #-712 @ 0xfffffd38 │ │ + stmdbhi r6, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc} │ │ + @ instruction: 0xf8dbb338 │ │ + bl ff033fa4 │ │ + cdpge 0, 1, cr0, cr6, cr0, {6} │ │ + @ instruction: 0xf101ad30 │ │ + b 13f2230 │ │ + @ instruction: 0xf85908c0 │ │ + ldrtmi r1, [r0], -r8, lsl #24 │ │ + @ instruction: 0xf025463a │ │ + ldmdals r6, {r0, r1, r5, r7, r9, fp, ip, sp, lr, pc} │ │ + smlatble r6, r0, r2, r4 │ │ + ldrdne pc, [r0], -r9 │ │ + ldrtmi r4, [sl], -r8, lsr #12 │ │ + blx fe6ebec4 │ │ + blge 5e7e48 │ │ + stcleq 1, cr15, [r0], {13} │ │ + stm ip, {r0, r1, r2, r3, r8, r9, fp, lr, pc} │ │ + ldmdals r0!, {r0, r1, r2, r3} │ │ + cmple r7, r0, lsr #5 │ │ + ldmdbeq r8!, {r0, r3, r8, ip, sp, lr, pc} │ │ + ldmdaeq r8!, {r3, r4, r5, r7, r8, ip, sp, lr, pc} │ │ + @ instruction: 0xf8dbd1e1 │ │ + teqlt r0, #120 @ 0x78 │ │ + ldrsbtne pc, [r4], #-139 @ 0xffffff75 @ │ │ + sbceq lr, r0, r0, asr #23 │ │ + ldmdbeq r8, {r0, r2, r3, r8, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf101ad30 │ │ + b 13f1688 │ │ + @ instruction: 0xf85608c0 │ │ + strbmi r1, [r8], -r8, lsl #24 │ │ + @ instruction: 0xf025463a │ │ + ldmdals r6, {r0, r1, r2, r4, r5, r6, r9, fp, ip, sp, lr, pc} │ │ + smlatble r5, r0, r2, r4 │ │ + @ instruction: 0x46286831 │ │ + @ instruction: 0xf025463a │ │ + and pc, r5, pc, ror #20 │ │ + @ instruction: 0xf10dab16 │ │ + blgt 3f3190 │ │ + andeq lr, pc, ip, lsl #17 │ │ + adcmi r9, r0, #48, 16 @ 0x300000 │ │ + ldrtcc sp, [r8], -ip, lsr #2 │ │ + ldmdaeq r8!, {r3, r4, r5, r7, r8, ip, sp, lr, pc} │ │ + @ instruction: 0xf8dbd1e3 │ │ + ldmdage r6, {r5, ip} │ │ + @ instruction: 0xf025463a │ │ + ldmdals r6, {r0, r1, r3, r4, r6, r9, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xd12642a0 │ │ + @ instruction: 0xf8dd2000 │ │ + stmib fp, {r2, r3, r4, ip, pc}^ │ │ + stmdals r4, {r1, r2, r3} │ │ + svcmi 0x0000f1b0 │ │ + sbchi pc, r7, r0 │ │ + ldmib fp, {r2, r4, fp, ip, pc}^ │ │ + andcc r2, r8, sl, lsl #6 │ │ + stc2 0, cr15, [ip, #128]! @ 0x80 │ │ + andne lr, r9, #208, 18 @ 0x340000 │ │ + stmdage ip, {r0, r2, r9, sl, lr} │ │ + @ instruction: 0xff7ef020 │ │ + ldrdvs lr, [r3], -r5 │ │ + bleq 6c024 │ │ + subeq lr, r0, r0, lsl #22 │ │ + bl 1d52f8 │ │ + ands r0, r3, r0, lsl #19 │ │ + and sl, r5, r0, lsr fp │ │ + blgt 41ab54 │ │ + andeq lr, pc, r8, lsl #17 │ │ + blge 5e81b8 │ │ + @ instruction: 0xf8ddcb0f │ │ + @ instruction: 0xf8dd8018 │ │ + stm r8, {r2, r3, r4, ip, pc} │ │ + adc r0, r4, pc │ │ + bls 138f5c │ │ + streq pc, [r0], #-712 @ 0xfffffd38 │ │ + svceq 0x0000f1bb │ │ + ldrmi fp, [r3, #3864] @ 0xf18 │ │ + strbmi sp, [lr, #-268] @ 0xfffffef4 │ │ + ldmvs r1!, {r2, r3, r4, r6, ip, lr, pc} │ │ + stmdbcs r0, {r2, r3, r9, sl, ip, sp} │ │ + @ instruction: 0xf856d0f9 │ │ + bl 72f58 │ │ + bl 30440 │ │ + and r0, r0, r1, asr #5 │ │ + stmdbvs r1, {r3, r4, r6, r9, sl, lr} │ │ + bleq 66c348 │ │ + rscle r2, r7, r0, lsl #18 │ │ + ldrdhi pc, [ip], -r0 │ │ + bl 254764 │ │ + andls r0, r3, r1, lsl #1 │ │ + blvc 16e0bc │ │ + subsmi pc, r5, r7, asr #12 │ │ + subvc pc, sl, r7, asr #13 │ │ + ldmdbls r0, {r2, r3, r8, r9, fp, ip, pc} │ │ + cmpmi r0, #950272 @ 0xe8000 │ │ + addmi r4, r1, #24 │ │ + tstphi r1, r0, asr #4 @ p-variant is OBSOLETE │ │ + bl 563b4 │ │ + ldmdbvs fp!, {r6}^ │ │ + addeq lr, r0, r1, lsl #22 │ │ + ldrdeq lr, [r1, -r0] │ │ + teqlt r9, r9, lsl #2 │ │ + strpl lr, [r4], #-2288 @ 0xfffff710 │ │ + subsmi r3, ip, r0, lsl r9 │ │ + @ instruction: 0x43254055 │ │ + @ instruction: 0xe7bdd1f7 │ │ + svceq 0x0000e857 │ │ + stmda r7, {r0, r6, sl, fp, ip}^ │ │ + stccs 5, cr1, [r0, #-0] │ │ + stmdacs r0, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ + rscshi pc, r4, r0, lsl #2 │ │ + strls sl, [r0, -ip, lsl #16] │ │ + @ instruction: 0xff6af020 │ │ + @ instruction: 0xf2c82411 │ │ + cmnlt r0, r0, lsl #8 │ │ + svchi 0x005bf3bf │ │ + svcne 0x0000e850 │ │ + stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ + blcs 38bcc │ │ + stmdbcs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ + @ instruction: 0xf3bfbf04 │ │ + @ instruction: 0xf0168f5b │ │ + stmdals r3, {r0, r1, r5, r8, sl, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xd1bb4580 │ │ + ldr r9, [fp, r4, lsl #20] │ │ + @ instruction: 0xf8dd9902 │ │ + blvs 125405c │ │ + blvs 3dce50 │ │ + andne lr, r0, r0, lsl #22 │ │ + ldmdaeq r0!, {r0, r2, r3, r8, ip, sp, lr, pc} │ │ + strbeq lr, [r0, r6, lsl #22] │ │ + strcc lr, [r8], r2 │ │ + strhtle r4, [r8], -lr │ │ + ldrdeq pc, [r0], r6 │ │ + movwcs lr, #18896 @ 0x49d0 │ │ + svcne 0x0000e850 │ │ + stmda r0, {r0, r2, r3, r6, sl, fp, ip}^ │ │ + stccs 4, cr5, [r0], {-0} │ │ + stmdbcs r0, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ + adcshi pc, sl, r0, lsl #2 │ │ + ldrdeq pc, [r0], r6 │ │ + strbmi r9, [r0], -r0 │ │ + @ instruction: 0xff2ef020 │ │ + stmdacs r0, {r0, r4, sl, sp} │ │ + streq pc, [r0], #-712 @ 0xfffffd38 │ │ + vmla.i , , d19[0] │ │ + ldmda r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ + cdpne 15, 4, cr1, cr10, cr0, {0} │ │ + movwcs lr, #2112 @ 0x840 │ │ + mvnsle r2, r0, lsl #22 │ │ + svclt 0x00042901 │ │ + svchi 0x005bf3bf │ │ + stc2l 0, cr15, [r6], #88 @ 0x58 │ │ + @ instruction: 0xf8dde7d3 │ │ + @ instruction: 0xf8c88018 │ │ + stmdbls fp, {lr} │ │ + stmdals r9, {r1, r2, r5, r8, sl, fp, sp, pc} │ │ + andcs r9, r0, r8, lsl r0 │ │ + stmib sp, {r1, r3, r4, ip, pc}^ │ │ + stmdals sl, {r1, r2, r4, r8} │ │ + @ instruction: 0xf10a9019 │ │ + stcgt 0, cr0, [lr, #80] @ 0x50 │ │ + ldm r5, {r1, r2, r3, r7, lr, pc} │ │ + sbcgt r0, lr, lr, asr #1 │ │ + @ instruction: 0x4651a830 │ │ + addsls pc, r0, sp, asr #17 │ │ + ldc2 0, cr15, [sl], {27} │ │ + ldrdeq pc, [r0], -r8 │ │ + vsra.s8 d18, d1, #8 │ │ + addmi r0, r8, #0, 2 │ │ + @ instruction: 0xf8d9d14a │ │ + stmdacs r0, {r6} │ │ + bge c64664 │ │ + ldmdavc r1, {r0, r3, r4, r6, r7, r8, fp, sp, lr, pc} │ │ + mvnscc pc, #79 @ 0x4f │ │ + ldrdvs pc, [ip], #-137 @ 0xffffff77 │ │ + @ instruction: 0xf1b7ca07 │ │ + @ instruction: 0xf8c94f00 │ │ + blls 23c1bc │ │ + andle ip, ip, r7, lsl #6 │ │ + @ instruction: 0x4644b136 │ │ + bleq 16e218 │ │ + stc 0, cr15, [r4], #432 @ 0x1b0 │ │ + mvnsle r3, r1, lsl #28 │ │ + svclt 0x001c2f00 │ │ + @ instruction: 0xf0a84640 │ │ + @ instruction: 0xf8d9eb7e │ │ + stmdbls lr, {r6} │ │ + @ instruction: 0xf8c93001 │ │ + @ instruction: 0xf1b10040 │ │ + @ instruction: 0xf43f4f00 │ │ + @ instruction: 0xf8d9ae13 │ │ + stmdacs r0, {r4} │ │ + stcls 1, cr13, [r5, #-296] @ 0xfffffed8 │ │ + rscscc pc, pc, pc, asr #32 │ │ + andseq pc, r0, r9, asr #17 │ │ + stmiagt lr, {r3, r5, r9, sl, lr}^ │ │ + sbceq lr, lr, sl, lsr #17 │ │ + smulleq lr, lr, r0, r8 @ │ │ + sbceq lr, lr, sl, lsl #17 │ │ + cdpgt 14, 8, cr10, cr15, cr12, {0} │ │ + ldm r6, {r0, r1, r2, r3, r7, r8, sl, lr, pc} │ │ + strgt r0, [pc, #143] @ 301ab │ │ + @ instruction: 0xf1b09818 │ │ + @ instruction: 0xd1204f00 │ │ + @ instruction: 0xf8c92000 │ │ + eorslt r0, r5, r0, lsl r0 │ │ + svchi 0x00f0e8bd │ │ + ldrmi lr, [r1, #-2525]! @ 0xfffff623 │ │ + @ instruction: 0x4626b135 │ │ + bleq 16e294 │ │ + stcl 0, cr15, [sl], #-432 @ 0xfffffe50 │ │ + mvnsle r3, r1, lsl #26 │ │ + stmdacs r0, {r4, r5, fp, ip, pc} │ │ + qadd16mi fp, r0, ip │ │ + bl 10ec3f0 │ │ + @ instruction: 0xf1b0980e │ │ + @ instruction: 0xf43f4f00 │ │ + stmdage ip, {r0, r2, r3, r4, r6, r7, r8, sl, fp, sp, pc} │ │ + stc2 0, cr15, [r6], #108 @ 0x6c │ │ + pop {r0, r2, r4, r5, ip, sp, pc} │ │ + ldmdage r6, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ + stc2 0, cr15, [r0], #108 @ 0x6c │ │ + @ instruction: 0x0010f8d9 │ │ + @ instruction: 0xf8c93001 │ │ + eorslt r0, r5, r0, lsl r0 │ │ + svchi 0x00f0e8bd │ │ + ldrbtmi r4, [r8], #-2059 @ 0xfffff7f5 │ │ + blx 16ec1c8 │ │ + ldrbtmi r4, [r8], #-2055 @ 0xfffff7f9 │ │ + blx 15ec1d0 │ │ + ldrbtmi r4, [r8], #-2054 @ 0xfffff7fa │ │ + blx 14ec1d8 │ │ + bmi e7d90 │ │ + @ instruction: 0xf00f447a │ │ + svclt 0x0000fdf1 │ │ + andeq sl, sl, r8, lsr #18 │ │ + andeq sl, sl, sl, asr fp │ │ + andeq sl, sl, r2, asr #22 │ │ + andeq sl, sl, r2, lsr fp │ │ + ldrbmi lr, [r0, sp, lsr #18]! │ │ + @ instruction: 0xf100b08e │ │ + strmi r0, [r4], -r8, lsl #18 │ │ + ldm r9, {r0, sp} │ │ + @ instruction: 0xf1050320 │ │ + ldmda r6, {r3, r9, sl}^ │ │ + stmdbcs r0, {r8, r9, sl, fp, ip} │ │ + addhi pc, pc, r0, asr #32 │ │ + tsteq r0, r6, asr #16 │ │ + mvnsle r2, r0, lsl #18 │ │ + svchi 0x005bf3bf │ │ + ldrbtmi r4, [r8], #-2146 @ 0xfffff79e │ │ + stmdavs r0, {r1, r7, r9, sl, lr}^ │ │ + @ instruction: 0xf0400040 │ │ + strcs r8, [r0, -r8, lsl #1] │ │ + stmdacs r0, {r3, r5, r8, r9, fp, ip, sp, lr} │ │ + addhi pc, fp, r0, asr #32 │ │ + stmdacs r2, {r3, r5, r8, sl, fp, ip, sp, lr} │ │ + andcs sp, r9, r3, lsr r1 │ │ + andeq pc, r0, r8, asr #5 │ │ + stmdblt r7!, {r1, ip, pc} │ │ + ldrdeq pc, [r4], -sl │ │ + @ instruction: 0xf0400040 │ │ + mulcs r0, lr, r0 │ │ + svchi 0x005bf3bf │ │ + svcne 0x0000e856 │ │ + andeq lr, r0, #4587520 @ 0x460000 │ │ + mvnsle r2, r0, lsl #20 │ │ + @ instruction: 0xf0002902 │ │ + vaddl.u q4, d31, d4 │ │ + ldmda r5, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ + cdpne 15, 4, cr0, cr1, cr0, {0} │ │ + andne lr, r0, #4521984 @ 0x450000 │ │ + mvnsle r2, r0, lsl #20 │ │ + tstle r4, r1, lsl #16 │ │ + vrsubhn.i d4, , q12 │ │ + @ instruction: 0xf0038f5b │ │ + @ instruction: 0xf8d9f884 │ │ + stmdbcs r0, {ip} │ │ + @ instruction: 0x4640bf1c │ │ + @ instruction: 0xf8d94788 │ │ + stmdacs r0, {r2} │ │ + @ instruction: 0x4640bf1c │ │ + b feeec500 │ │ + @ instruction: 0xf8d9e02d │ │ + @ instruction: 0xf105300c │ │ + stmdage r2, {r4, r9} │ │ + ldrmi r4, [r8, r1, asr #12] │ │ + ldrdeq pc, [r4], -r9 │ │ + svclt 0x001c2800 │ │ + @ instruction: 0xf0a84640 │ │ + ldmdblt pc, {r2, r3, r5, r7, r9, fp, sp, lr, pc} @ │ │ + ldrdeq pc, [r4], -sl │ │ + cmnle r7, r0, asr #32 │ │ + vaddl.u q1, d15, d0 │ │ + ldmda r6, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ + stmda r6, {r8, r9, sl, fp, ip}^ │ │ + bcs 30a98 │ │ + stmdbcs r2, {r0, r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ + vmla.i , , d14[0] │ │ + ldmda r5, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ + cdpne 15, 4, cr0, cr1, cr0, {0} │ │ + andne lr, r0, #4521984 @ 0x450000 │ │ + mvnsle r2, r0, lsl #20 │ │ + tstle r4, r1, lsl #16 │ │ + vrsubhn.i d4, , q12 │ │ + @ instruction: 0xf0038f5b │ │ + stmdage r2, {r3, r6, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xffeef7f2 │ │ + strmi r4, [fp], -r2, lsl #12 │ │ + ldrdeq lr, [r0, -r4] │ │ + ldrdvc pc, [ip], -sl │ │ + svchi 0x005bf3bf │ │ + @ instruction: 0xd1262f02 │ │ + movwcs lr, #18893 @ 0x49cd │ │ + andls r2, r2, #805306368 @ 0x30000000 │ │ + @ instruction: 0xf8daaa02 │ │ + @ instruction: 0x47b87010 │ │ + pop {r1, r2, r3, ip, sp, pc} │ │ + @ instruction: 0x463087f0 │ │ + svchi 0x002ff3bf │ │ + blx eac416 │ │ + @ instruction: 0xf047e770 │ │ + @ instruction: 0xf080fa3d │ │ + blvc a31f08 │ │ + @ instruction: 0xf43f2800 │ │ + ldmdami r8, {r0, r2, r4, r5, r6, r8, r9, sl, fp, sp, pc} │ │ + blmi 65ab18 │ │ + ldrbtmi r4, [r8], #-2328 @ 0xfffff6e8 │ │ + @ instruction: 0xf88d447b │ │ + ldrbtmi r7, [r9], #-12 │ │ + @ instruction: 0x212b9100 │ │ + @ instruction: 0xf0119602 │ │ + ldmdami r4, {r0, r1, r3, r6, r9, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xf00f4478 │ │ + rscscs pc, r0, fp, lsl #26 │ │ + addcs r4, r1, #51380224 @ 0x3100000 │ │ + @ instruction: 0xf0a82301 │ │ + @ instruction: 0xe774ea56 │ │ + @ instruction: 0x463120f0 │ │ + movwcs r2, #4737 @ 0x1281 │ │ + b 13ec5e8 │ │ + @ instruction: 0xf047e7a9 │ │ + stmdacs r0, {r0, r2, r4, r9, fp, ip, sp, lr, pc} │ │ + andcs fp, r1, r4, lsl #30 │ │ + ldrb r7, [sl, -r8, lsr #6] │ │ + blx 3ec478 │ │ + svclt 0x00042800 │ │ + @ instruction: 0x73282001 │ │ + svclt 0x0000e790 │ │ + ldrdeq lr, [sl], -sl │ │ + @ instruction: 0xfffe9175 │ │ + ldrdeq r9, [sl], -r8 │ │ + andeq r9, sl, r2, lsl #29 │ │ + @ instruction: 0x000a9fb4 │ │ + svcmi 0x00f0e92d │ │ + @ instruction: 0xf8d1b0b9 │ │ + pkhbtmi ip, r1, r4 │ │ + ldmib r1, {r3, r7, r9, sl, lr}^ │ │ + ldmib ip, {r0, r1, r9, sl, fp}^ │ │ + bl ff1fdffc │ │ + ldmib r1, {r0, r1, r2, r6, r7, r8, r9, sl}^ │ │ + nopcc {0} @ │ │ + ldrshlt r0, [pc, -pc]! │ │ + strvs lr, [lr, #-2291] @ 0xfffff70d │ │ + rsbmi r3, r5, r8, lsr pc │ │ + @ instruction: 0x432e404e │ │ + strd sp, [sp], -r7 │ │ + @ instruction: 0x371de9dc │ │ + strbeq lr, [r7, r7, asr #23] │ │ + rscseq r3, pc, r0, lsr #6 │ │ + ldm r3!, {r0, r1, r2, r3, r4, r5, r6, r8, r9, ip, sp, pc}^ │ │ + svccc 0x0038650e │ │ + submi r4, lr, r5, rrx │ │ + mvnsle r4, lr, lsr #6 │ │ + ldrbeq pc, [r8], #-419 @ 0xfffffe5d @ │ │ + ldrdvc lr, [ip, -ip] │ │ + movwvs lr, #10706 @ 0x29d2 │ │ + b fe1c0540 │ │ + tstmi r9, #469762048 @ 0x1c000000 │ │ + tstpeq r1, #64, 4 @ p-variant is OBSOLETE │ │ + movweq pc, #712 @ 0x2c8 @ │ │ + ldcvs 1, cr13, [r1], {21} │ │ + @ instruction: 0xf0402900 │ │ + andls r8, r9, #1610612746 @ 0x6000000a │ │ + tstpmi r0, pc, asr #32 @ p-variant is OBSOLETE │ │ + svclt 0x0044f852 │ │ + stmdb r7, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc} │ │ + bls aab4c │ │ + svcmi 0x0000f1bb │ │ + @ instruction: 0xd1206011 │ │ + streq pc, [r8], #-419 @ 0xfffffe5d │ │ + ldrdls pc, [r0], -sp @ │ │ + cdpne 0, 5, cr14, cr12, cr0, {0} │ │ + tstpeq r8, r8, lsl #2 @ p-variant is OBSOLETE │ │ + strmi lr, [r2], r2, ror #3 │ │ + @ instruction: 0xf0a82017 │ │ + stmdacs r0, {r3, r4, r5, r6, r7, r8, fp, sp, lr, pc} │ │ + addshi pc, r5, #0 │ │ + andscs r4, r7, #3817472 @ 0x3a4000 │ │ + ldrcs r4, [r7, -r6, lsl #12] │ │ + @ instruction: 0xf0a44479 │ │ + andscs pc, r1, sl, asr pc @ │ │ + tstpeq r8, r8, lsl #2 @ p-variant is OBSOLETE │ │ andeq pc, r0, r8, asr #5 │ │ - @ instruction: 0xf0404285 │ │ - ldmdals r5, {r0, r1, r3, r5, r7, pc} │ │ - @ instruction: 0xf00007c0 │ │ - stmdals r8, {r2, r4, r6, r7, pc} │ │ - stmdacs r0, {r2, r3, r8, sp} │ │ - andeq pc, r8, pc, asr #32 │ │ - andcs fp, fp, r8, lsl pc │ │ - tstcs lr, r8, lsl pc │ │ + strcs r1, [r0, #-4036] @ 0xfffff03c │ │ + @ instruction: 0x46502317 │ │ + stmib sp, {r1, r3, r6, r7, r8, sp, lr, pc}^ │ │ + stcge 4, cr2, [sl], #-16 │ │ + andcs r9, r0, r6 │ │ + stmib sp, {r2, r8, sp}^ │ │ + stmib sp, {r1, r3, r5}^ │ │ + vrhadd.s8 d16, d0, d28 │ │ + stmib sp, {r0, r2, r3, r7, r8, ip, sp}^ │ │ + stmib sp, {r1, r2, r3, r5}^ │ │ + and r0, r1, r0, lsr r1 │ │ + @ instruction: 0xd11e0890 │ │ + @ instruction: 0xf0184620 │ │ + stmdals pc!, {r0, r1, r2, r4, r5, fp, ip, sp, lr, pc} @ │ │ + rscsle r2, r9, r0, lsl #16 │ │ + movwcs r2, #8448 @ 0x2100 │ │ + strcs r2, [r0, -r1, lsl #12] │ │ + blx fe9284aa │ │ + stmdaeq r0, {r0, r1, r8, sl, sp}^ │ │ + strpl pc, [r7, #-2819] @ 0xfffff4fd │ │ + strpl pc, [r7, -r3, lsl #22] │ │ + bfieq r4, r3, (invalid: 12:2) │ │ + blx fe924876 │ │ + stmdacs r1, {r1, r2, r8, sl, sp} │ │ + blx 12483a │ │ + blx 2048b2 │ │ + ldrmi r1, [r6], -r6, lsl #2 │ │ + stclgt 7, cr14, [ip], {235} @ 0xeb │ │ + stcne 8, cr10, [r1, #-104] @ 0xffffff98 │ │ + ldm r4, {r2, r3, r6, r7, r8, lr, pc} │ │ + bicgt r0, ip, ip, asr #1 │ │ + stmib sp, {r8, sp}^ │ │ + @ instruction: 0xf8dd9a0c │ │ + stmib sp, {r2, r5, ip, pc}^ │ │ + @ instruction: 0xf10d1b0a │ │ + tstls lr, r8, lsr #22 │ │ + tstpeq r4, fp, lsl #2 @ p-variant is OBSOLETE │ │ + rsbls pc, r0, sp, asr #17 │ │ + bicgt ip, ip, ip, asr #17 │ │ + smlaleq lr, ip, r0, r8 │ │ + ldcge 1, cr12, [sl, #-944] @ 0xfffffc50 │ │ + stmdals r5, {r4, r5, r8, sp} │ │ + ldrdvc pc, [r0], -r9 │ │ + strtmi r6, [r8], -r4, lsl #16 │ │ + cdp2 0, 9, cr15, cr5, cr4, {5} │ │ + @ instruction: 0x46214638 │ │ + teqcs r0, #44040192 @ 0x2a00000 │ │ + stcl 0, cr15, [ip], #448 @ 0x1c0 │ │ + mrcge 8, 0, r9, cr10, cr8, {0} │ │ + stcls 1, cr2, [r2, #-192]! @ 0xffffff40 │ │ + ldrtmi r6, [r0], -r7, lsl #16 │ │ + cdp2 0, 8, cr15, cr7, cr4, {5} │ │ + @ instruction: 0x46214638 │ │ + teqcs r0, #52428800 @ 0x3200000 │ │ + ldcl 0, cr15, [lr], {112} @ 0x70 │ │ + @ instruction: 0xa01cf8dd │ │ + svclt 0x000445aa │ │ + strmi r9, [r2, #2082] @ 0x822 │ │ + eorcs sp, r0, r4, lsl r0 │ │ + ldmdb r0!, {r3, r5, r7, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf0002800 │ │ + stmibmi r7!, {r1, r4, r9, pc} │ │ + strcs r2, [r0, -r0, lsr #4]! │ │ + ldrbtmi r9, [r9], #-3 │ │ + cdp2 0, 13, cr15, cr3, cr4, {5} │ │ + strtcs r2, [r0], #-17 @ 0xffffffef │ │ + andeq pc, r0, r8, asr #5 │ │ + andcs r1, r0, r5, lsl #30 │ │ + rsc r9, r9, r2 │ │ + stmdbge sl, {r1, r3, r4, fp, sp, pc} │ │ + @ instruction: 0xf0194622 │ │ + svcge 0x001afd55 │ │ + ldrcs lr, [sp], #-2525 @ 0xfffff623 │ │ + stmdacs r2, {r0, r5, r7, r8, r9, sl, fp, lr, pc} │ │ + beq e6497c │ │ + andls r9, r2, r3, lsl #4 │ │ + ldmdbls pc, {r1, r3, r4, r6, r7, sp, lr, pc} @ │ │ + ldmdbge r2!, {r0, r1, r2, r4, r5, r8, ip, pc} │ │ + strbeq ip, [r0, r1, lsr #3] │ │ + ldrtcs lr, [r5], #-2509 @ 0xfffff633 │ │ + mvnhi pc, r0 │ │ + strtmi r2, [r9], -r0 │ │ + ldmdage sl, {r0, ip, pc} │ │ + movwcs r2, #512 @ 0x200 │ │ + stc2l 0, cr15, [lr, #100] @ 0x64 │ │ + ldmib sp, {r1, r3, r4, r8, r9, sl, fp, sp, pc}^ │ │ + svcgt 0x0083321d │ │ + andscs fp, r1, r8, asr r1 │ │ + vsubhn.i16 d20, q4, │ │ + addmi r0, r1, #0 │ │ + @ instruction: 0xf8ddd065 │ │ + cdpge 0, 1, cr9, cr10, cr4, {1} │ │ + andls r0, r2, r8, lsr sl │ │ + cdpls 0, 0, cr14, cr6, cr14, {5} │ │ + subsle r2, ip, r0, lsl #18 │ │ + svclt 0x00042f08 │ │ + bcs 2559d4 │ │ + cmnphi r6, r0, asr #32 @ p-variant is OBSOLETE │ │ + b 140a5f0 │ │ + ldmdavs sl, {r1, r3, sl, fp, ip} │ │ + stmdbmi r0, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ + strbtmi r6, [r7], -r9, asr #16 │ │ + @ instruction: 0x4634685b │ │ + @ instruction: 0xf0002f00 │ │ + strtmi r8, [r5], -r1, lsl #1 │ │ + strvs lr, [r0], #-2516 @ 0xfffff62c │ │ + svccc 0x0010404c │ │ + b fe14070c │ │ + @ instruction: 0x43260409 │ │ + ldreq pc, [r0], #-261 @ 0xfffffefb │ │ + ldmib r5, {r4, r5, r6, r7, r8, ip, lr, pc}^ │ │ + subsmi r6, sp, r2, lsl #10 │ │ + b fe180760 │ │ + @ instruction: 0x432e0509 │ │ + ands sp, ip, r8, ror #3 │ │ + strtmi r6, [r4], r8, lsl #16 │ │ + @ instruction: 0x4625681a │ │ + ldrtmi r6, [ip], -r9, asr #16 │ │ + stccs 8, cr6, [r0, #-364] @ 0xfffffe94 │ │ + strtmi sp, [r7], -r2, rrx │ │ + strvs lr, [r0], #-2516 @ 0xfffff62c │ │ + ldccc 0, cr4, [r0, #-304] @ 0xfffffed0 │ │ + b fe140748 │ │ + @ instruction: 0x43260409 │ │ + ldreq pc, [r0], #-263 @ 0xfffffef9 │ │ + ldmib r7, {r0, r4, r5, r6, r7, r8, ip, lr, pc}^ │ │ + subsmi r7, lr, r2, lsl #12 │ │ + b fe1c07a0 │ │ + teqmi r7, #9437184 @ 0x900000 │ │ + andcs sp, r0, r9, ror #3 │ │ + andls r9, r1, r3, lsl #18 │ │ + andcs sl, r8, #1703936 @ 0x1a0000 │ │ + strbtmi r2, [r4], -r0, lsl #6 │ │ + stc2l 0, cr15, [ip, #-100]! @ 0xffffff9c │ │ + ldmib sp, {r1, r3, r4, r8, r9, sl, fp, sp, pc}^ │ │ + svcgt 0x0083321d │ │ + orrsle r2, ip, r0, lsl #16 │ │ + svcls 0x00064638 │ │ + stmdacs r8, {r0, r3, r5, r8, ip, sp, pc} │ │ + bcs 260294 │ │ + msrhi CPSR_, r0, asr #32 │ │ + stmdals r5, {r1, r3, r6, r7, r8, r9, sl, sp, lr, pc} │ │ + stmvs r2, {r1, r3, r8, fp, sp, pc} │ │ + @ instruction: 0xf019a81a │ │ + svcge 0x001afcc3 │ │ + ldrcc lr, [sp], #-2525 @ 0xfffff623 │ │ + stmdacs r2, {r0, r5, r7, r8, r9, sl, fp, lr, pc} │ │ + beq e64aa8 │ │ + andls sl, r2, sl, lsl lr │ │ + ldrdls pc, [r4], -sp @ │ │ + ldmdbls pc, {r0, r2, r3, r4, r5, sp, lr, pc} @ │ │ + stmdbge sl!, {r0, r1, r2, r3, r5, r8, ip, pc} │ │ + strbeq ip, [r0, r1, lsr #3] │ │ + strtcc lr, [sp], #-2509 @ 0xfffff633 │ │ + mrshi pc, SPSR @ │ │ + strtmi r2, [r9], -r0 │ │ + ldmdage sl, {r0, ip, pc} │ │ + movwcs r2, #512 @ 0x200 │ │ + ldc2 0, cr15, [sl, #-100]! @ 0xffffff9c │ │ + ldrne lr, [ip], #-2525 @ 0xfffff623 │ │ + ldmib sp, {r1, r2, r3, r4, r9, fp, ip, pc}^ │ │ + stmdacs r0, {r1, r3, r4, r8, r9} │ │ + addshi pc, r9, r0 │ │ + @ instruction: 0x461d2011 │ │ + andeq pc, r0, r8, asr #5 │ │ + @ instruction: 0xf0004283 │ │ + beq 250ac0 │ │ + ldrmi r4, [r4], -r2, lsr #13 │ │ + tst ip, pc, lsl #12 │ │ + @ instruction: 0xf0a82019 │ │ + stmdacs r0, {r2, r4, r7, fp, sp, lr, pc} │ │ + teqphi r9, r0 @ p-variant is OBSOLETE │ │ + ldrdls pc, [r4], -sp @ │ │ + ldmibmi sp, {r0, r4, r8, sl, sp} │ │ + vrshr.s8 d18, d9, #8 │ │ + cdpge 5, 1, cr0, cr10, cr0, {0} │ │ + @ instruction: 0x27194479 │ │ + @ instruction: 0xf0a44604 │ │ + strdcs pc, [r0], -r0 │ │ + stccc 6, cr4, [r4, #-140] @ 0xffffff74 │ │ + andscs r9, r9, #2 │ │ + ldmdage r2!, {r2, r4, r9, sl, lr} │ │ + @ instruction: 0xf0179303 │ │ + ldmdals r2!, {r0, r6, r7, r8, sl, fp, ip, sp, lr, pc} │ │ + ldmdals r3!, {r4, r8, ip, sp, pc} │ │ + ldmdb r4!, {r2, r3, r5, r6, ip, sp, lr, pc}^ │ │ + ldrdeq pc, [r0], #-137 @ 0xffffff77 │ │ + stmdacs r0, {r0, r2, sl, ip, pc} │ │ + @ instruction: 0xf0409707 │ │ + @ instruction: 0xf04f8106 │ │ + @ instruction: 0x46aa30ff │ │ + subeq pc, r0, r9, asr #17 │ │ + @ instruction: 0x46314630 │ │ + strhteq lr, [ip], #139 @ 0x8b │ │ + ldm fp!, {r2, r3, r5, r6, r7, lr, pc} │ │ + rscgt r0, ip, ip, ror #1 │ │ + smlalseq lr, ip, fp, r8 │ │ + stmdage sl!, {r2, r3, r4, r5, r6, r7, lr, pc} │ │ + @ instruction: 0xf930f01b │ │ + blls 15b00c │ │ + blpl 4aaecc │ │ + bgt 2020bc │ │ + svcmi 0x0000f1b5 │ │ + ldrdls pc, [ip], #-137 @ 0xffffff77 │ │ + movwgt r9, #32259 @ 0x7e03 │ │ + andseq pc, r1, #64, 4 │ │ + andeq pc, r0, #200, 4 @ 0x8000000c │ │ + @ instruction: 0x4692d011 │ │ svceq 0x0000f1b9 │ │ - strmi fp, [r1], -r8, lsl #30 │ │ - ldrdge pc, [r8], #-141 @ 0xffffff73 │ │ - subsle r9, r1, r8, lsl #2 │ │ - stmdbls sl, {sp} │ │ - movwcs r9, #2568 @ 0xa08 │ │ - stmdage r6, {r0, ip, pc}^ │ │ - blx 1eca84 │ │ - stmdbvs r9, {r0, r2, r3, r4, r6, r7, r8, fp, sp, lr, pc}^ │ │ - strbeq lr, [r6, #-2525] @ 0xfffff623 │ │ - stmdacs r1, {r3, r6, r8, fp, ip, pc} │ │ - @ instruction: 0xf0009115 │ │ - stccs 2, cr8, [r0, #-0] │ │ - andhi pc, r4, #0 │ │ - @ instruction: 0x070fe9d8 │ │ - ldcls 6, cr4, [r5], {41} @ 0x29 │ │ - adcsmi r4, ip, #60817408 @ 0x3a00000 │ │ - qasxmi fp, r2, r8 │ │ - svc 0x000cf0a7 │ │ - @ instruction: 0xf04f42a7 │ │ - svclt 0x00880100 │ │ - stmdacs r0, {r0, r8, sp} │ │ - andeq pc, r0, pc, asr #32 │ │ - andcs fp, r1, r8, asr #31 │ │ - strmi fp, [r8], -r8, lsl #30 │ │ - sbcsle r2, r3, r1, lsl #16 │ │ - stmdbge r4!, {r1, r2, r6, fp, sp, pc}^ │ │ - @ instruction: 0x464b4632 │ │ - stc2 0, cr15, [lr, #16]! │ │ - tstcs r1, #4480 @ 0x1180 │ │ - @ instruction: 0x011cf89d │ │ - movweq pc, #712 @ 0x2c8 @ │ │ - mulsls r5, sp, r2 │ │ - mvnhi pc, r0, asr #32 │ │ - bfieq r9, r5, (invalid: 16:0) │ │ - andeq pc, r0, pc, asr #32 │ │ - @ instruction: 0xd1bd9015 │ │ - ldrdcs lr, [r1], -r6 │ │ - stmdbls r7, {r0, r2, r3, r4, r6, sp, lr, pc} │ │ - andsls r9, r3, #72, 20 @ 0x48000 │ │ - stmdahi r9, {r3, r7, fp, ip, sp, lr} │ │ - b 10973cc │ │ - andsls r4, r4, #0 │ │ - subs r9, r4, pc │ │ - rsbs r2, r1, r1 │ │ - andcs r9, r0, sl, lsl #18 │ │ - andls r9, r1, r8, lsl #20 │ │ - movwcs sl, #2118 @ 0x846 │ │ - @ instruction: 0xf9b4f019 │ │ - stmdbvs r9, {r0, r2, r3, r4, r6, r7, r8, fp, sp, lr, pc}^ │ │ - strbeq lr, [r6, #-2525] @ 0xfffff623 │ │ - stmdacs r0, {r3, r6, r8, fp, ip, pc} │ │ - @ instruction: 0xf0409115 │ │ - stccs 1, cr8, [r0, #-696] @ 0xfffffd48 │ │ - @ instruction: 0x81b2f000 │ │ - @ instruction: 0x0712e9d8 │ │ - ldcls 6, cr4, [r5], {41} @ 0x29 │ │ - adcsmi r4, ip, #60817408 @ 0x3a00000 │ │ - qasxmi fp, r2, r8 │ │ - cdp 0, 11, cr15, cr10, cr7, {5} │ │ - @ instruction: 0xf04f42a7 │ │ - svclt 0x00380100 │ │ - stmdacs r0, {r0, r8, sp} │ │ - andeq pc, r0, pc, asr #32 │ │ - andcs fp, r1, r8, asr #30 │ │ - strmi fp, [r8], -r8, lsl #30 │ │ - bicsle r2, r3, r0, lsl #16 │ │ - stmdbge r4!, {r1, r2, r6, fp, sp, pc}^ │ │ - @ instruction: 0x464b4632 │ │ - ldc2l 0, cr15, [ip, #-16] │ │ - @ instruction: 0xf89d9d46 │ │ - andsls r0, r5, ip, lsl r1 │ │ - vshr.s8 d18, d1, #8 │ │ - addmi r0, r5, #0 │ │ - orrshi pc, r0, r0, asr #32 │ │ - stmdbls sl, {r0, r2, r4, fp, ip, pc} │ │ - @ instruction: 0xf04f07c0 │ │ - andsls r0, r5, r0 │ │ - @ instruction: 0xe183d1bd │ │ - ldmib sp, {r0, r1, r2, r8, fp, ip, pc}^ │ │ - @ instruction: 0xf8dd4248 │ │ - stmvc r8, {r3, r6, sp, pc} │ │ - andsls r8, r4, #589824 @ 0x90000 │ │ - andmi lr, r0, r1, asr #20 │ │ - eor r9, r7, pc │ │ - andsls r2, r5, r0 │ │ - ldmdage r4!, {r2, r4, r6, r9, sl, lr}^ │ │ - blx 7ecbbc │ │ - stmdacs r0, {r2, r4, r5, r6, fp, ip, pc} │ │ - ldmdals r5!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ - svc 0x004ef06b │ │ - ldrvs lr, [r3, #-2525] @ 0xfffff623 │ │ - stmdage lr!, {r0, r1, r2, r5, r9, sl, lr}^ │ │ - blx 4ecbd4 │ │ - stmdacs r0, {r1, r2, r3, r5, r6, fp, ip, pc} │ │ - stmdals pc!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ @ │ │ - svc 0x0042f06b │ │ - ldrdge pc, [r8], #-141 @ 0xffffff73 │ │ - @ instruction: 0x26114634 │ │ - vqdmlsl.s q13, d8, d22 │ │ - ldrls r0, [r4, #-1536] @ 0xfffffa00 │ │ - andcs lr, r0, r6, lsr r1 │ │ - andsls r2, r5, r1, lsl r5 │ │ - streq pc, [r0, #-712] @ 0xfffffd38 │ │ - ldrdge pc, [r8], #-141 @ 0xffffff73 │ │ - @ instruction: 0xf017a874 │ │ - ldmdals r4!, {r0, r3, r4, r5, r6, r7, r8, fp, ip, sp, lr, pc}^ │ │ - svclt 0x001c2800 │ │ - @ instruction: 0xf06b9875 │ │ - cdpls 15, 1, cr14, cr4, cr10, {1} │ │ - stcge 6, cr4, [r6, #-188]! @ 0xffffff44 │ │ - @ instruction: 0xf017a86e │ │ - stmdals lr!, {r0, r2, r3, r5, r6, r7, r8, fp, ip, sp, lr, pc}^ │ │ + ldrbmi sp, [pc], -r7 │ │ + bleq 16e8ec │ │ + stmdb r0, {r2, r3, r5, r6, ip, sp, lr, pc}^ │ │ + stmdbeq r1, {r0, r3, r4, r5, r7, r8, ip, sp, lr, pc} │ │ + @ instruction: 0x4652d1f8 │ │ + @ instruction: 0x4658b11d │ │ + ldmda r8, {r3, r5, r7, ip, sp, lr, pc} │ │ + stmdbls r9, {r1, r4, r6, r9, sl, lr} │ │ + svcls 0x00074294 │ │ + @ instruction: 0x6c089b05 │ │ + andeq pc, r1, r0, lsl #2 │ │ + @ instruction: 0xf1086408 │ │ + tstle pc, r8, lsl #2 │ │ + stmdbls r8, {r3, fp, sp, lr} │ │ + stmdals r6, {fp, sp} │ │ + andle r6, r1, sl │ │ + stmda r4, {r3, r5, r7, ip, sp, lr, pc} │ │ + pop {r0, r3, r4, r5, ip, sp, pc} │ │ + svclt 0x00008ff0 │ │ + @ instruction: 0xfffe65cc │ │ + @ instruction: 0xfffe5c16 │ │ + @ instruction: 0xf8dd9806 │ │ + stcls 0, cr9, [r2, #-128] @ 0xffffff80 │ │ + rscslt r6, r9, #655360 @ 0xa0000 │ │ + tstcs r5, r1, asr #20 │ │ + movwvs lr, #10697 @ 0x29c9 │ │ + stmib r9, {r9, fp, sp}^ │ │ + svclt 0x00184100 │ │ + svc 0x00ecf0a7 │ │ + pop {r0, r3, r4, r5, ip, sp, pc} │ │ + mcrls 15, 0, r8, cr6, cr0, {7} │ │ + rsble r2, r2, r0, lsl #22 │ │ + svclt 0x00042a08 │ │ + stmdbcs r8, {r0, r1, r8, sl, ip, pc} │ │ + ldmdavs sl, {r1, r4, r6, r8, ip, lr, pc} │ │ + bne 2eb154 │ │ + @ instruction: 0xf04f6820 │ │ + stmdavs r1!, {r8, fp, lr}^ │ │ + ldmdavs fp, {r0, r1, r2, r4, r6, r9, sl, lr}^ │ │ + svccs 0x00004634 │ │ + strtmi sp, [r5], -sl, rrx │ │ + strvs lr, [r0], #-2516 @ 0xfffff62c │ │ + svccc 0x0010404c │ │ + b fe140950 │ │ + @ instruction: 0x43260409 │ │ + ldreq pc, [r0], #-261 @ 0xfffffefb │ │ + ldmib r5, {r0, r4, r5, r6, r7, r8, ip, lr, pc}^ │ │ + subsmi r6, sp, r2, lsl #10 │ │ + b fe1809a4 │ │ + @ instruction: 0x432e0509 │ │ + ands sp, fp, r9, ror #3 │ │ + @ instruction: 0x4655681a │ │ + stmdavs r1!, {r5, fp, sp, lr}^ │ │ + ldmdavs fp, {r2, r3, r4, r5, r9, sl, lr}^ │ │ + suble r2, sp, r0, lsl #26 │ │ + ldmib r4, {r0, r1, r2, r5, r9, sl, lr}^ │ │ + submi r6, ip, r0, lsl #8 │ │ + submi r3, r6, r0, lsl sp │ │ + streq lr, [r9], #-2692 @ 0xfffff57c │ │ + @ instruction: 0xf1074326 │ │ + mvnsle r0, r0, lsl r4 │ │ + @ instruction: 0x7602e9d7 │ │ + subsmi r4, r7, lr, asr r0 │ │ + streq lr, [r9], -r6, lsl #21 │ │ + mvnle r4, r7, lsr r3 │ │ + stmdbls r3, {sp} │ │ + ldmdage sl, {r0, ip, pc} │ │ + movwcs r2, #520 @ 0x208 │ │ + mcrr2 0, 1, pc, ip, cr9 @ │ │ + ldrne lr, [ip], #-2525 @ 0xfffff623 │ │ + ldmib sp, {r1, r2, r3, r4, r9, fp, ip, pc}^ │ │ + stmdacs r0, {r1, r3, r4, r8, r9} │ │ + svcge 0x0012f47f │ │ + cmnlt r3, r6, lsl #30 │ │ + svclt 0x00082a08 │ │ + sbcle r2, sp, r8, lsl #18 │ │ + bge 6c2984 │ │ + ldmdbmi r3!, {r1, r4, r5, r8, r9, fp, lr} │ │ + ldrbtmi r4, [fp], #-1144 @ 0xfffffb88 │ │ + tstls r0, r9, ror r4 │ │ + @ instruction: 0xf010212b │ │ + stmdage sl!, {r0, r1, r2, r4, r5, r6, r8, r9, sl, fp, ip, sp, lr, pc} │ │ + stc2l 0, cr15, [r8], #92 @ 0x5c │ │ + stmdacs r0, {r1, r3, r5, fp, ip, pc} │ │ + stmdals fp!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ + ldm sl, {r2, r3, r5, r6, ip, sp, lr, pc} │ │ + @ instruction: 0xf017a832 │ │ + ldmdals r2!, {r0, r1, r2, r3, r4, r6, r7, sl, fp, ip, sp, lr, pc} │ │ + vshl.s8 d18, d1, #0 │ │ + cdpge 5, 1, cr0, cr10, cr0, {0} │ │ + @ instruction: 0xf8dd2800 │ │ + svclt 0x001c9024 │ │ + @ instruction: 0xf06c9833 │ │ + ldr lr, [r5, -ip, lsl #17] │ │ + @ instruction: 0xf0a72019 │ │ + cmnlt r0, #136, 30 @ 0x220 │ │ + ldrcs r4, [r1, #-2330] @ 0xfffff6e6 │ │ + vrshr.s8 d18, d9, #8 │ │ + ldrbtmi r0, [r9], #-1280 @ 0xfffffb00 │ │ + pkhbtmi r2, r2, r9, lsl #8 │ │ + stc2l 0, cr15, [r9], #656 @ 0x290 │ │ + andcs r3, r0, r4, lsl #26 │ │ + andls r2, r2, r9, lsl r7 │ │ + @ instruction: 0xf017a82a │ │ + stmdals sl!, {r0, r2, r3, r4, r5, r7, sl, fp, ip, sp, lr, pc} │ │ + stmdals fp!, {r4, r8, ip, sp, pc} │ │ + ldmda r0!, {r2, r3, r5, r6, ip, sp, lr, pc}^ │ │ + @ instruction: 0xf8ddae1a │ │ + ldrbmi r9, [r3], -r4, lsr #32 │ │ + stmdami pc, {r0, r2, r3, r5, r6, r7, r9, sl, sp, lr, pc} @ │ │ + @ instruction: 0xf0104478 │ │ + stmdami ip, {r0, r3, r4, r5, r6, r9, sl, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xf0104478 │ │ + stmdami ip, {r0, r2, r4, r5, r6, r9, sl, fp, ip, sp, lr, pc} │ │ + @ instruction: 0xf00f4478 │ │ + strdcs pc, [r1], -r7 │ │ + @ instruction: 0xf00d2117 │ │ + andcs pc, r1, r9, lsr #25 │ │ + @ instruction: 0xf00d2120 │ │ + andcs pc, r1, r5, lsr #25 │ │ + @ instruction: 0xf00d2119 │ │ + svclt 0x0000fca1 │ │ + @ instruction: 0xfffe638c │ │ + @ instruction: 0xfffe617e │ │ + andeq sl, sl, r8, ror r3 │ │ + andeq sl, sl, r0, ror r3 │ │ + andeq sl, sl, r0, lsl r2 │ │ + @ instruction: 0xfffe8bc7 │ │ + andeq sl, sl, lr, rrx │ │ + @ instruction: 0x000aa1bc │ │ + ldrbmi lr, [r0, sp, lsr #18]! │ │ + strmi fp, [r0], r6, lsl #1 │ │ + ldrmi r6, [r5], -r8, lsl #16 │ │ + ldmdbeq r1, {r6, r9, ip, sp, lr, pc} │ │ + stmdbeq r0, {r3, r6, r7, r9, ip, sp, lr, pc} │ │ + bicslt r6, sl, r2, asr #16 │ │ + @ instruction: 0xf10d6804 │ │ + stmdavs lr, {r3, r9, fp}^ │ │ + strne lr, [r2, -r4, lsl #22] │ │ + ldrdeq lr, [r0, -r4] │ │ + stmib sp, {r1, r3, r5, r9, sl, lr}^ │ │ + ldrbmi r0, [r0], -r0, lsl #2 │ │ + @ instruction: 0xf0234631 │ │ + stmdals r2, {r0, r1, r2, r3, r4, r5, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ + tstle lr, r8, asr #10 │ │ + ldrdeq lr, [r3, -sp] │ │ + svclt 0x00082800 │ │ + stmib r4, {r0, r9, sl, lr}^ │ │ + ldrcc r0, [r0], #-258 @ 0xfffffefe │ │ + strhle r4, [r9, #44]! @ 0x2c │ │ + andls pc, r0, r8, asr #17 │ │ + pop {r1, r2, ip, sp, pc} │ │ + blge 1129ac │ │ + stm r8, {r1, r2, r3, r8, r9, fp, lr, pc} │ │ + andlt r0, r6, pc │ │ + @ instruction: 0x87f0e8bd │ │ + mvnsmi lr, #737280 @ 0xb4000 │ │ + ldmib r0, {r0, r3, r7, ip, sp, pc}^ │ │ + movwcs r0, #2304 @ 0x900 │ │ + andvs r6, r3, r2, lsl #16 │ │ + tstvs r3, #17408 @ 0x4400 │ │ + @ instruction: 0x466cb359 │ │ + strmi r4, [r8, r0, lsr #12] │ │ + ldrdvc pc, [r0], -r9 │ │ + ldrdeq lr, [r0, -r7] │ │ + andsle r4, r3, r8, lsl #6 │ │ + strhi lr, [r5, #-2519] @ 0xfffff629 │ │ + @ instruction: 0xf108b155 │ │ + ldmdavs r0!, {r3, r9, sl} │ │ svclt 0x001c2800 │ │ - @ instruction: 0xf06b986f │ │ - sadd16ls lr, r4, lr │ │ - @ instruction: 0xf2c82611 │ │ - tst r4, r0, lsl #12 │ │ - addmi r9, r8, #1753088 @ 0x1ac000 │ │ - stmdbls r8, {r0, r2, r3, r8, fp, ip, lr, pc} │ │ - @ instruction: 0xf8cd9868 │ │ - stmib sp, {r3, r4, r8, ip, sp, pc}^ │ │ - stmdbls r6, {r0, r3, r6, r8, ip, sp, lr} │ │ - strbls lr, [r7], -sp, asr #19 │ │ - blx fe66cbfa │ │ - @ instruction: 0xf43f2800 │ │ - strcs sl, [ip], -r4, lsr #29 │ │ - svclt 0x00082d00 │ │ - @ instruction: 0xf8dd2608 │ │ - strls r9, [r8], -r8, lsr #32 │ │ - andcs sp, r0, r3, ror r0 │ │ - andls r4, r1, r9, asr #12 │ │ - ldrtmi sl, [r2], -r6, asr #16 │ │ - @ instruction: 0xf0192300 │ │ - ldmib sp, {r0, r3, r8, fp, ip, sp, lr, pc}^ │ │ - ldmib sp, {r0, r3, r6, r8, sl, ip, sp, pc}^ │ │ - stmdbls r8, {r1, r2, r6, r9, fp}^ │ │ - tstls r5, r1, lsl #16 │ │ - rscshi pc, pc, r0 │ │ - svceq 0x0000f1ba │ │ - sbchi pc, lr, r0 │ │ - stmdacs r8, {r0, r2, r4, fp, ip, pc} │ │ - mvnshi pc, r0, asr #32 │ │ - ldrdvc pc, [r4], -sl │ │ - movwmi pc, #79 @ 0x4f @ │ │ - ldrdeq lr, [r8, -r8] │ │ - ldrdcs pc, [r0], -sl │ │ - bne 440dcc │ │ - andeq lr, r1, r7, ror fp │ │ - @ instruction: 0xf1b4dbd9 │ │ - andle r4, r9, r0, lsl #30 │ │ - @ instruction: 0x463ba836 │ │ - @ instruction: 0x461646b2 │ │ - @ instruction: 0xf960f003 │ │ - @ instruction: 0x46564632 │ │ - sbcle r2, ip, r0, lsl #16 │ │ - vadd.f32 d18, d0, d1 │ │ - @ instruction: 0xf8bb81c8 │ │ - stmdbge lr!, {}^ @ │ │ - ldrtmi r9, [fp], -r5 │ │ - stmdage r6!, {r4, r5, r6, ip, pc} │ │ - strblt lr, [lr, #-2509]! @ 0xfffff633 │ │ - stmib sp, {r1, r2, r4, r9, sl, lr}^ │ │ - stmdage r6, {ip}^ │ │ - ssatmi r9, #26, r2, lsl #18 │ │ - blx fe9eccf6 │ │ - @ instruction: 0xa118f8dd │ │ - @ instruction: 0x011cf89d │ │ - andscs r9, r1, r5, lsl r0 │ │ + @ instruction: 0xf0a76870 │ │ + @ instruction: 0x3618eed0 │ │ + mvnsle r3, r1, lsl #26 │ │ + stmdacs r0, {r3, r4, r5, r8, fp, sp, lr} │ │ + @ instruction: 0x4640bf1c │ │ + cdp 0, 12, cr15, cr6, cr7, {5} │ │ + ldrdeq pc, [r0], -r9 │ │ + andcs r2, r1, #0, 2 │ │ + smlattcs r2, r0, r8, lr │ │ + addgt ip, lr, lr, lsl #25 │ │ + umulleq lr, lr, r4, r8 @ │ │ + andcs ip, r1, lr, lsl #1 │ │ + pop {r0, r3, ip, sp, pc} │ │ + stmdami r3, {r4, r5, r6, r7, r8, r9, pc} │ │ + bmi f8fc0 │ │ + ldrbtmi r4, [sl], #-1144 @ 0xfffffb88 │ │ + @ instruction: 0xf978f00f │ │ + @ instruction: 0xfffe65a7 │ │ + andeq sl, sl, sl, lsl #16 │ │ + svcmi 0x00f0e92d │ │ + ldrmi fp, [r6], -r9, lsl #1 │ │ + andls r6, r3, sl, asr #16 │ │ + bleq 4ad38c │ │ + bleq 6d5b0 │ │ + cdpvs 1, 1, cr9, cr0, cr2, {0} │ │ + ldclvs 1, cr11, [r7, #928] @ 0x3a0 │ │ + stmibne r0, {r0, r1, r2, r3, r6, r9, fp, sp, lr, pc}^ │ │ + mulhi r9, r1, r8 │ │ + bvc 339ea4 │ │ + beq 6cbe4 │ │ + ldrtmi sl, [r9], -r4, lsl #16 │ │ + @ instruction: 0x46234632 │ │ + andhi pc, r0, sp, asr #17 │ │ + blx fef6cb56 │ │ + ldrbmi r9, [r8, #-2052] @ 0xfffff7fc │ │ + ldmib sp, {r1, r2, r4, r8, ip, lr, pc}^ │ │ + strcc r0, [r0, r6, lsl #2] │ │ + bl 12b6b7c │ │ + @ instruction: 0xf1b90a01 │ │ + mvnle r0, r0, lsl #19 │ │ + strcs lr, [r0, #-2] │ │ + beq 6cc14 │ │ + stmdbls r3, {r1, fp, ip, pc} │ │ + stmib r0, {fp, sp, lr}^ │ │ + @ instruction: 0xf8c15a00 │ │ + andlt fp, r9, r0 │ │ + svchi 0x00f0e8bd │ │ + strmi r9, [r3], r3, lsl #18 │ │ + andvc lr, r5, #3620864 @ 0x374000 │ │ + stmib r1, {r0, r1, r2, r8, r9, fp, ip, pc}^ │ │ + sbcvs r7, fp, r1, lsl #4 │ │ + andlt pc, r0, r1, asr #17 │ │ + pop {r0, r3, ip, sp, pc} │ │ + ldmib r0, {r4, r5, r6, r7, r8, r9, sl, fp, pc}^ │ │ + movwcs r0, #256 @ 0x100 │ │ + andvs r6, r3, r2, lsl #16 │ │ + andsvs r6, r3, r0, lsl r8 │ │ + andvs r6, r8, r9, lsl #16 │ │ + ldrbmi r2, [r0, -r1]! │ │ + svcmi 0x00f0e92d │ │ + @ instruction: 0xf8d1b0a3 │ │ + ldrmi r8, [r3], r4 │ │ + @ instruction: 0x7602e9db │ │ + movwcs lr, #51672 @ 0xc9d8 │ │ + rsbsmi r4, sl, r3, ror r0 │ │ + vcge.s8 d20, d0, d10 │ │ + vsubw.s8 q8, q4, d9 │ │ + mrsle r0, SPSR_abt │ │ + ldrdcs pc, [r0], #-139 @ 0xffffff75 │ │ + @ instruction: 0xf0402a00 │ │ + ldrbmi r8, [r9], r6, lsr #1 │ │ + @ instruction: 0xf859680a │ │ + @ instruction: 0xf04f7f44 │ │ + ldmib r9, {r8, lr}^ │ │ + @ instruction: 0xf1b76501 │ │ + @ instruction: 0xf8c94f00 │ │ + eorsle r1, r3, r0 │ │ + stmib sp, {r0, r8, fp, sp, pc}^ │ │ + mvngt r2, r4 │ │ + mrscs r2, (UNDEF: 4) │ │ + stmib sp, {r1, r2, r8, sl, fp, sp, pc}^ │ │ + vrhadd.s8 d16, d0, d8 │ │ + stmib sp, {r0, r2, r3, r7, r8, ip, sp}^ │ │ + stmib sp, {r1, r2}^ │ │ + stmib sp, {r1, r3}^ │ │ + and r0, r1, ip, lsl #2 │ │ + @ instruction: 0xd1230890 │ │ + @ instruction: 0xf0174628 │ │ + stmdals fp, {r0, r1, r3, r5, r7, sl, fp, ip, sp, lr, pc} │ │ + rscsle r2, r9, r0, lsl #16 │ │ + movwcs r2, #8448 @ 0x2100 │ │ + strcs r2, [r0], -r1, lsl #14 │ │ + blx fe928bc2 │ │ + stmdaeq r0, {r0, r1, sl, sp}^ │ │ + strmi pc, [r6], #-2819 @ 0xfffff4fd │ │ + strmi pc, [r6], -r3, lsl #22 │ │ + bfieq r4, r3, (invalid: 12:2) │ │ + blx fe924f8e │ │ + stmdacs r1, {r0, r1, r2, sl, sp} │ │ + blx 124f52 │ │ + blx 1c0fca │ │ + ldrmi r1, [r7], -r7, lsl #2 │ │ + movwcc lr, #30699 @ 0x77eb │ │ + eorlt r6, r3, r3 │ │ + svchi 0x00f0e8bd │ │ + @ instruction: 0xf10dcd8e │ │ + @ instruction: 0xf10a0a68 │ │ + addgt r0, lr, r4 │ │ + umulleq lr, lr, r5, r8 @ │ │ + teqcs r0, lr, lsl #1 │ │ + ldrdvs pc, [r0], -r8 @ │ │ + ldmdaeq r8, {r0, r2, r3, r8, ip, sp, lr, pc} │ │ + ldrdpl pc, [r0], -fp │ │ + @ instruction: 0xf0a44640 │ │ + @ instruction: 0x4628fb14 │ │ + @ instruction: 0x46424631 │ │ + @ instruction: 0xf0702330 │ │ + ldmib sp, {r2, r3, r5, r6, r8, fp, sp, lr, pc}^ │ │ + stmdbls r3, {r1, r2, r3, lr} │ │ + @ instruction: 0xf04f9000 │ │ + @ instruction: 0xf8cb30ff │ │ + stmdals r1, {r6} │ │ + stmdals r2, {r0, r3, ip, pc} │ │ + andcs r9, r0, r8 │ │ + stmib sp, {r1, r3, ip, pc}^ │ │ + cps #6 │ │ + ldm sl!, {r2, r4} │ │ + addgt r0, lr, lr, lsl #1 │ │ + smulleq lr, lr, sl, r8 @ │ │ + ldmdage r6, {r1, r2, r3, r6, r7, lr, pc} │ │ + @ instruction: 0xf8cd4641 │ │ + @ instruction: 0xf01ab050 │ │ + bge 5f0740 │ │ + ldmdavs r1, {r0, r1, r3, r4, r6, r7, r8, fp, sp, lr, pc} │ │ + ldrdpl pc, [ip], #-139 @ 0xffffff75 │ │ + @ instruction: 0xf1b6ca07 │ │ + stm r9, {r8, r9, sl, fp, lr} │ │ + andle r0, ip, r7 │ │ + @ instruction: 0x4647b135 │ │ + bleq 16edbc │ │ + cdp 0, 13, cr15, cr8, cr11, {3} │ │ + mvnsle r3, r1, lsl #26 │ │ + svclt 0x001c2e00 │ │ + @ instruction: 0xf0a74640 │ │ + @ instruction: 0xf8dbedb2 │ │ + movwcs r0, #36928 @ 0x9040 │ │ + vqdmlal.s , d8, d0 │ │ + andcc r0, r1, r0, lsl #6 │ │ + subeq pc, r0, fp, asr #17 │ │ + movwcc r9, #34820 @ 0x8804 │ │ + smlabtmi r0, r0, r9, lr │ │ + andvs r9, r3, r5, lsl #16 │ │ + pop {r0, r1, r5, ip, sp, pc} │ │ + stmdami r2, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ + @ instruction: 0xf0104478 │ │ + svclt 0x0000fccd │ │ + andeq sl, sl, r8, lsl r0 │ │ + svcmi 0x00f0e92d │ │ + andls fp, r5, sp, lsl #1 │ │ + stmdavs r8, {r0, r4, r7, r9, sl, lr} │ │ + cmnlt sl, #4325376 @ 0x420000 │ │ + @ instruction: 0xf10d6804 │ │ + stmdavs lr, {r3, r5, r8, r9, fp}^ │ │ + beq 66d0f4 │ │ + strne lr, [r2, -r4, lsl #22] │ │ + stmdaeq r0, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ + bcs 8b054 │ │ + ldm r4, {r0, r1, r2, r3, r5, r8, fp, ip, lr, pc} │ │ + stmib sp, {r0, r1, r3}^ │ │ + @ instruction: 0xf081320a │ │ + ldmdahi sp, {r9, lr} │ │ + strls r4, [ip, #-770] @ 0xfffffcfe │ │ + andcs fp, r1, #24, 30 @ 0x60 │ │ + stmdacs r0, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc} │ │ + stm r2, {r1, r9, fp, sp, pc} │ │ + ldrbmi r0, [r0], -r3, lsl #16 │ │ + @ instruction: 0x464a4631 │ │ + @ instruction: 0xff4cf023 │ │ + tstcs r1, r6, lsl #16 │ │ + smlabteq r0, r8, r2, pc @ │ │ + smlabble sp, r8, r2, r4 │ │ + ldrdeq lr, [r8, -sp] │ │ + smlatteq r4, r4, r8, lr │ │ + ldrhle r4, [fp, #44] @ 0x2c │ │ + tstcs r1, r5, lsl #16 │ │ + smlabteq r0, r8, r2, pc @ │ │ + andlt r6, sp, r1 │ │ + svchi 0x00f0e8bd │ │ + svcls 0x0005ab07 │ │ + strgt ip, [pc, -lr, lsl #22] │ │ + pop {r0, r2, r3, ip, sp, pc} │ │ + blmi 114cf0 │ │ + mrscs r2, (UNDEF: 2) │ │ + @ instruction: 0xf00e447b │ │ + svclt 0x0000ffbd │ │ + andeq r9, sl, ip, lsl #26 │ │ + addlt fp, sl, r0, ror r5 │ │ + ldm r1, {r2, r9, sl, lr} │ │ + ldmib r1, {r0, r3, ip, lr}^ │ │ + stmibvs r9, {r2, r9, sl, ip, lr} │ │ + andpl lr, r9, sp, lsl #17 │ │ + stmib sp, {r1, r2, fp, sp, pc}^ │ │ + @ instruction: 0xf0245604 │ │ + stmdals r6, {r0, r1, r2, r3, r6, fp, ip, sp, lr, pc} │ │ + vsra.s8 d18, d1, #8 │ │ + addmi r0, r8, #0, 2 │ │ + @ instruction: 0xf8ddd00c │ │ + @ instruction: 0xf89d1021 │ │ + @ instruction: 0xf8dd301c │ │ + bls 288dec │ │ + andne pc, r9, r4, asr #17 │ │ + andvs pc, r5, r4, asr #17 │ │ + @ instruction: 0x712360e2 │ │ + andlt r6, sl, r0, lsr #32 │ │ + ldrble fp, [r4], #3440 @ 0xd70 │ │ + svcmi 0x00f0e92d │ │ + stmvs r5, {r0, r2, r3, r4, r7, ip, sp, pc} │ │ + @ instruction: 0xf8904680 │ │ + andcs sl, r1, ip │ │ + streq pc, [r8], -r5, lsl #2 │ │ + svcne 0x0000e856 │ │ + @ instruction: 0xf0402900 │ │ + stmda r6, {r0, r1, r2, r4, r7, pc}^ │ │ + stmdbcs r0, {r8} │ │ + vsra.u64 , q11, #1 │ │ + mrrcmi 15, 5, r8, pc, cr11 @ │ │ + stmdavs r0!, {r2, r3, r4, r5, r6, sl, lr}^ │ │ + @ instruction: 0xf0400040 │ │ + @ instruction: 0xf04f8091 │ │ + blvc a331c8 │ │ + @ instruction: 0xf0402800 │ │ + stcvc 0, cr8, [r8, #-588]! @ 0xfffffdb4 │ │ + stmdbvs pc!, {r1, r8, sp} @ │ │ + strvc r2, [r9, #-2050]! @ 0xfffff7fe │ │ + andcs sp, r9, r7, lsl #2 │ │ andeq pc, r0, r8, asr #5 │ │ - @ instruction: 0xf0404582 │ │ - ldmdals r5, {r0, r2, r4, r5, r7, pc} │ │ - @ instruction: 0xf8dd464a │ │ - ldrtmi r9, [r3], -r8, lsr #32 │ │ - stmdals r8, {r6, r7, r8, r9, sl} │ │ - adcle r4, r4, r6, lsl #12 │ │ - ldrdeq lr, [r9, #-157]! @ 0xffffff63 │ │ - rsbls r3, r9, r1 │ │ - @ instruction: 0xf63f4288 │ │ - stmdbls fp!, {r1, r3, r4, r5, r9, sl, fp, sp, pc}^ │ │ - ldmible sl, {r3, r7, r9, lr} │ │ - stmdals r8!, {r0, r2, r8, fp, ip, pc}^ │ │ - stmib sp, {r1, r2, r6, r8, r9, ip, pc}^ │ │ - stmdbls r6, {r0, r3, r6, r8, ip, lr} │ │ - blcs 122b418 │ │ - blx 7eccee │ │ - stmdacs r0, {r8, sp} │ │ - orrle r9, ip, r5, lsl r1 │ │ - andcs lr, r0, r0, ror r0 │ │ - andls r9, r1, sl, lsl #18 │ │ - ldrtmi sl, [r2], -r6, asr #16 │ │ - @ instruction: 0xf0192300 │ │ - ldmib sp, {r0, r2, r4, r7, fp, ip, sp, lr, pc}^ │ │ - ldmib sp, {r0, r3, r6, r8, sl, ip, sp, pc}^ │ │ - stmdbls r8, {r1, r2, r6, r9, fp}^ │ │ - tstls r5, r0, lsl #16 │ │ - addhi pc, fp, r0, asr #32 │ │ + @ instruction: 0xf1b99002 │ │ + suble r0, r3, r0, lsl #30 │ │ + @ instruction: 0xf10de045 │ │ + @ instruction: 0xf88d0b18 │ │ + @ instruction: 0xf10b001c │ │ + @ instruction: 0xf1050005 │ │ + subscs r0, r3, #1073741829 @ 0x40000005 │ │ + @ instruction: 0xf0a49706 │ │ + @ instruction: 0xf1bafa76 │ │ + andle r0, r7, r0, lsl #30 │ │ + stmdbge r6, {r1, fp, sp, pc} │ │ + blx eeceae │ │ + svceq 0x0000f1b9 │ │ + eor sp, lr, ip, lsr #32 │ │ + svclt 0x001c2f00 │ │ + @ instruction: 0xf06a4638 │ │ + stmdals lr, {r3, r5, r7, r9, sl, fp, sp, lr, pc} │ │ + svcmi 0x0000f1b0 │ │ + @ instruction: 0xf10bbf1c │ │ + @ instruction: 0xf01a0018 │ │ + @ instruction: 0xf8ddfe3d │ │ + @ instruction: 0xf1bbb05c │ │ + andsle r4, r1, r0, lsl #30 │ │ + ldmdals r8, {r0, r3, r4, r8, r9, sl, fp, ip, pc} │ │ + teqlt pc, r1 │ │ + ldrdge pc, [r4], -sp │ │ + bleq 16efb4 │ │ + stcl 0, cr15, [r2, #428]! @ 0x1ac │ │ + mvnsle r3, r1, lsl #30 │ │ + svceq 0x0000f1bb │ │ + stmdals r1, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ + ldc 0, cr15, [sl], #668 @ 0x29c │ │ + vaddl.s8 q9, d8, d9 │ │ + andcc r0, r8, r0 │ │ + @ instruction: 0xf1b99002 │ │ + tstle r2, r0, lsl #30 │ │ + subeq r6, r0, r0, ror #16 │ │ + andcs sp, r0, r7, asr r1 │ │ + svchi 0x005bf3bf │ │ + svcne 0x0000e856 │ │ + andeq lr, r0, #4587520 @ 0x460000 │ │ + mvnsle r2, r0, lsl #20 │ │ + suble r2, r1, r2, lsl #18 │ │ + svchi 0x005bf3bf │ │ + svceq 0x0000e855 │ │ + stmda r5, {r0, r6, r9, sl, fp, ip}^ │ │ + bcs 3569c │ │ + stmdacs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ + strtmi sp, [r8], -r4, lsl #2 │ │ + svchi 0x005bf3bf │ │ + blx 14aceb4 │ │ + @ instruction: 0xf7f2a802 │ │ + @ instruction: 0x4602f9f7 │ │ + ldmib r8, {r0, r1, r3, r9, sl, lr}^ │ │ + stmiavs r7!, {r8}^ │ │ + svchi 0x005bf3bf │ │ + @ instruction: 0xd12c2f02 │ │ + movwcs lr, #35277 @ 0x89cd │ │ + andls r2, r6, #805306368 @ 0x30000000 │ │ + stmdbvs r7!, {r1, r2, r9, fp, sp, pc} │ │ + @ instruction: 0xb01d47b8 │ │ + svchi 0x00f0e8bd │ │ + vqshlu.s32 d4, d16, #31 │ │ + @ instruction: 0xf0468f2f │ │ + strb pc, [r8, -r4, asr #26]! @ │ │ + mcrr2 0, 4, pc, r8, cr6 @ │ │ + stmdbeq r1, {r7, ip, sp, lr, pc} │ │ + stmdacs r0, {r3, r5, r8, r9, fp, ip, sp, lr} │ │ + svcge 0x006df43f │ │ + bge 1c2f38 │ │ + ldmdbmi r1, {r4, r8, r9, fp, lr} │ │ + ldrbtmi r4, [fp], #-1144 @ 0xfffffb88 │ │ + andsls pc, ip, sp, lsl #17 │ │ + tstls r0, r9, ror r4 │ │ + strls r2, [r6], -fp, lsr #2 │ │ + mrrc2 0, 1, pc, r6, cr0 @ │ │ + @ instruction: 0x463120f0 │ │ + movwcs r2, #4737 @ 0x1281 │ │ + stcl 0, cr15, [r4], #-668 @ 0xfffffd64 │ │ + stmdami r9, {r1, r2, r4, r5, r7, r8, r9, sl, sp, lr, pc} │ │ + @ instruction: 0xf00e4478 │ │ + @ instruction: 0xf046ff0f │ │ + stmdacs r0, {r0, r1, r2, r5, sl, fp, ip, sp, lr, pc} │ │ + andcs fp, r1, r4, lsl #30 │ │ + str r7, [r0, r8, lsr #6]! │ │ + andeq sp, sl, r0, lsl #20 │ │ + @ instruction: 0xfffe858b │ │ + andeq r9, sl, lr, ror #3 │ │ + andeq r9, sl, r8, lsr #5 │ │ + @ instruction: 0x000a93bc │ │ + @ instruction: 0xf005b580 │ │ + andcs pc, r1, fp, asr #26 │ │ + push {r7, r8, sl, fp, ip, sp, pc} │ │ + @ instruction: 0xb0934ff0 │ │ + andls r9, r8, lr, lsl #4 │ │ + ldmib r1, {r3, r7, fp, sp, lr}^ │ │ + andls r6, r9, r3, lsl #4 │ │ + subeq lr, r2, r2, lsl #22 │ │ + bl 1d5388 │ │ + biclt r0, sl, #128, 6 │ │ + addeq r9, r0, r6, lsl #6 │ │ + movwcs lr, #2513 @ 0x9d1 │ │ + bleq 6d0b8 │ │ + @ instruction: 0xf04f6949 │ │ + stmib sp, {fp}^ │ │ + stmib sp, {r2, r3, r9, ip, sp}^ │ │ + stmdacc ip, {r1, r3, r8} │ │ + ldrtmi r9, [r1], r5 │ │ + @ instruction: 0x4637445e │ │ + blge 36f0f4 │ │ + svcmi 0x0000f1ba │ │ + ldmib r6, {r3, r5, ip, lr, pc}^ │ │ + stmdbls sp, {r0, lr} │ │ + stmdbls ip, {r8, ip, pc} │ │ + strne lr, [r1], #-2509 @ 0xfffff633 │ │ + bls 3d73dc │ │ + stmdage pc, {r0, r1, ip, pc} @ │ │ + blx 7ed046 │ │ + umaalpl pc, r0, sp, r8 @ │ │ + stmdals pc, {r0, r4, r8, sp} @ │ │ + smlabteq r0, r8, r2, pc @ │ │ + teqle sp, r8, lsl #5 │ │ svceq 0x0000f1ba │ │ - ldmdals r5, {r1, r3, r4, r6, ip, lr, pc} │ │ - @ instruction: 0xf0402808 │ │ - @ instruction: 0xf8da8188 │ │ - @ instruction: 0xf04f7004 │ │ - ldmib r8, {r8, r9, lr}^ │ │ - @ instruction: 0xf8da010a │ │ - subsmi r2, pc, r0 │ │ - bl 1c77738 │ │ - blle ff6b0d58 │ │ - svcmi 0x0000f1b4 │ │ - ldmdage r6!, {r0, r3, ip, lr, pc} │ │ - @ instruction: 0x46b1463b │ │ - @ instruction: 0xf0034616 │ │ - ldrtmi pc, [r2], -sp, ror #17 @ │ │ - stmdacs r0, {r1, r2, r3, r6, r9, sl, lr} │ │ - stccs 0, cr13, [r1, #-820] @ 0xfffffccc │ │ - cmpphi r5, r0, asr #4 @ p-variant is OBSOLETE │ │ - @ instruction: 0x0000f8bb │ │ - andls sl, r5, lr, ror #18 │ │ - rsbsls r4, r0, fp, lsr r6 │ │ - stmib sp, {r1, r2, r5, fp, sp, pc}^ │ │ - ldrmi fp, [r6], -lr, ror #10 │ │ - andne lr, r0, sp, asr #19 │ │ - ldmdbls r2, {r1, r2, r6, fp, sp, pc} │ │ - @ instruction: 0xf01746b9 │ │ - @ instruction: 0xf8ddfb33 │ │ - @ instruction: 0xf89da118 │ │ - andsls r0, r5, ip, lsl r1 │ │ - vshr.s8 d18, d1, #8 │ │ - strmi r0, [r2] │ │ - ldmdals r5, {r1, r6, r8, ip, lr, pc} │ │ - @ instruction: 0x07c04633 │ │ - strmi r9, [r6], -r8, lsl #16 │ │ - ldmib sp, {r0, r3, r5, r7, ip, lr, pc}^ │ │ - andcc r0, r1, r9, ror #2 │ │ - addmi r9, r8, #105 @ 0x69 │ │ - stclge 6, cr15, [fp, #252] @ 0xfc │ │ - addmi r9, r8, #1753088 @ 0x1ac000 │ │ - stmdbls r5, {r0, r1, r2, r3, r4, r7, r8, fp, ip, lr, pc} │ │ - movtls r9, #26728 @ 0x6868 │ │ - smlalbtpl lr, r9, sp, r9 │ │ - stmib sp, {r1, r2, r8, fp, ip, pc}^ │ │ - @ instruction: 0xf0019b47 │ │ - smlatbcs r0, pc, sl, pc @ │ │ - tstls r5, r0, lsl #16 │ │ - mul r1, r1, r1 │ │ - andsls r2, r5, r1 │ │ - beq 4ad6d8 │ │ - ldrdlt pc, [r4], -sp @ │ │ - beq 6d900 │ │ - ldcls 13, cr10, [r3], {38} @ 0x26 │ │ - @ instruction: 0xf017a874 │ │ - ldmdals r4!, {r0, r3, r4, r6, r7, fp, ip, sp, lr, pc}^ │ │ - svclt 0x001c2800 │ │ - @ instruction: 0xf06b9875 │ │ - ldrcs lr, [r1], -sl, lsl #28 │ │ - @ instruction: 0xf2c84657 │ │ - @ instruction: 0xf8dd0600 │ │ - strtmi sl, [fp], -r8, asr #32 │ │ - teqle r4, r7 @ │ │ - @ instruction: 0xf1089815 │ │ - stclge 8, cr0, [r6, #-352] @ 0xfffffea0 │ │ - @ instruction: 0xf47f07c0 │ │ - ldrsbt sl, [r1], -lr │ │ - mcrrls 9, 0, r9, r8, cr7 @ │ │ - stmvc r8, {r0, r3, r6, r9, fp, ip, pc} │ │ - andsls r8, r4, #589824 @ 0x90000 │ │ - andmi lr, r0, r1, asr #20 │ │ - ldmdals r5, {r0, r2, r3, r4, r8, sl, sp, lr, pc} │ │ - ldrls r4, [r4, #-1628] @ 0xfffff9a4 │ │ - ldmdals r5, {r3, r4, r8, sl, sp, lr, pc} │ │ - @ instruction: 0xf8cd4634 │ │ - beq 54f7c │ │ - ldrt r9, [r1], pc │ │ - andsls r2, r5, r1 │ │ - vshl.s8 d18, d1, #0 │ │ - ldrt r0, [r9], #1280 @ 0x500 │ │ - ldmib sp, {r0, r1, r2, r8, fp, ip, pc}^ │ │ - ldrbt r4, [r8], -r8, asr #4 │ │ - bleq 6c5a0 │ │ - stmdage lr, {r1, r4, r6, sp, lr, pc}^ │ │ - @ instruction: 0xf001461d │ │ - ldcls 8, cr15, [r8], #-28 @ 0xffffffe4 │ │ - svcmi 0x0000f1b4 │ │ - ldrtmi sp, [r7], -r9, ror #2 │ │ - strcs lr, [r2], #-15 │ │ - ldrmi lr, [sp], -r9, asr #32 │ │ - @ instruction: 0xf8dd9413 │ │ - and r9, r1, ip, lsr r0 │ │ - @ instruction: 0x4637461d │ │ - @ instruction: 0xf000a84e │ │ - ldcls 15, cr15, [r8], #-980 @ 0xfffffc2c │ │ - svcmi 0x0000f1b4 │ │ - strtmi sp, [ip], r1, lsl #2 │ │ - sxtahmi lr, sl, r2 │ │ - ldmib sp, {r0, r1, r2, r4, r5, r9, sl, lr}^ │ │ - cmplt lr, r9, lsr r6 │ │ - streq pc, [r4, #-264] @ 0xfffffef8 │ │ + qadd16mi fp, r0, ip │ │ + stc 0, cr15, [r0], {167} @ 0xa7 │ │ + @ instruction: 0xf10b44a8 │ │ + stmdals sl, {r2, r3, r8, r9, fp} │ │ + ldrbmi r4, [r8, #-1614] @ 0xfffff9b2 │ │ + @ instruction: 0xe01dd1d5 │ │ + stmdaeq r0, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ + bne 6828ac │ │ + ands sp, r7, r6, lsl #2 │ │ + @ instruction: 0xf1069b06 │ │ + strbmi r0, [lr], -ip │ │ + andsle r1, r1, r9, lsl sl │ │ + adccs pc, fp, #77594624 @ 0x4a00000 │ │ + @ instruction: 0xf6ca1d05 │ │ + blx fe879ab2 │ │ + ldmeq r4, {r1, r9, ip}^ │ │ stceq 8, cr15, [r4], {85} @ 0x55 │ │ svclt 0x001c2800 │ │ @ instruction: 0xf0a76828 │ │ - strcc lr, [ip, #-3212] @ 0xfffff374 │ │ - mvnsle r3, r1, lsl #28 │ │ - ldceq 1, cr15, [r8], {13} │ │ - ldrtmi r2, [lr], -r0, lsl #24 │ │ - ldmib sp, {r0, r2, r4, r6, sp, lr, pc}^ │ │ - @ instruction: 0xf8dd8649 │ │ - cmplt lr, r4, lsr #32 │ │ - streq pc, [r4, -r8, lsl #2] │ │ - stceq 8, cr15, [r4], {87} @ 0x57 │ │ - svclt 0x001c2800 │ │ - @ instruction: 0xf0a76838 │ │ - smlsdxcc ip, r6, ip, lr │ │ - mvnsle r3, r1, lsl #28 │ │ - stccs 7, cr2, [r0], {17} │ │ - streq pc, [r0, -r8, asr #5] │ │ - bge fe26e0e8 │ │ - blt fe2aeeec │ │ - bmi 46c6f4 │ │ - blne 6c640 │ │ - bleq 106cadc │ │ - bleq fe86ca04 │ │ - bleq 2ec60c │ │ - ldmib sp, {r0, sl, sp}^ │ │ - andscs r5, r0, r4, lsr #12 │ │ - ldcl 0, cr15, [r2], #-668 @ 0xfffffd64 │ │ - svclt 0x001f2800 │ │ - andscs r2, r1, #0, 2 │ │ - andeq pc, r0, #200, 4 @ 0x8000000c │ │ - andcs pc, r0, fp, asr #17 │ │ - stmib r0, {r0, r1, r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ - stmib r0, {r8, lr}^ │ │ - stmdbls fp, {r1, r9, sl, ip, lr} │ │ + strcc lr, [ip, #-3038] @ 0xfffff422 │ │ + mvnsle r3, r1, lsl #24 │ │ + stmdacs r0, {r0, r3, fp, ip, pc} │ │ + shadd16mi fp, r0, ip │ │ + bl ff56d2c8 │ │ + andscs r9, r1, #458752 @ 0x70000 │ │ + vqdmlal.s , d8, d8 │ │ + stmibvs r0, {r9} │ │ + @ instruction: 0xf8c0600a │ │ + andslt r8, r3, r0 │ │ + svchi 0x00f0e8bd │ │ + @ instruction: 0xf1ba9908 │ │ + @ instruction: 0xf8dd0f00 │ │ + blls 4e1154 │ │ + ldrdcs pc, [r5], #-141 @ 0xffffff73 │ │ + @ instruction: 0xf8c160cb │ │ + @ instruction: 0xf8c12009 │ │ + tstvc sp, r5 │ │ svclt 0x001c6008 │ │ - pop {r0, r1, r3, r4, r5, r6, ip, sp, pc} │ │ - strdcs r8, [r8], -r0 │ │ - @ instruction: 0xf00c2110 │ │ - @ instruction: 0x46b2ff78 │ │ - @ instruction: 0x8639e9dd │ │ - cmnlt r6, ip, lsr #13 │ │ - streq pc, [r4, -r8, lsl #2] │ │ - strcc lr, [ip, -r2] │ │ - andle r3, r8, r1, lsl #28 │ │ - stceq 8, cr15, [r4], {87} @ 0x57 │ │ - rscsle r2, r8, r0, lsl #16 │ │ - @ instruction: 0xf0a76838 │ │ - @ instruction: 0x46acec32 │ │ - stccs 7, cr14, [r0], {243} @ 0xf3 │ │ - @ instruction: 0x46574656 │ │ - strbmi sp, [r0], -r4 │ │ - @ instruction: 0xf0a74664 │ │ - strtmi lr, [r4], r8, lsr #24 │ │ - ldrdhi pc, [r0], #-141 @ 0xffffff73 │ │ - @ instruction: 0xf47f42b7 │ │ - @ instruction: 0xf7ffaa72 │ │ - ldmdals r4, {r0, r1, r2, r3, r5, r6, r9, fp, ip, sp, pc} │ │ - ldreq pc, [r8], #-261 @ 0xfffffefb │ │ - @ instruction: 0xf10d9913 │ │ - bl 33174 │ │ - bl 71098 │ │ - adcsmi r0, ip, #192, 14 @ 0x3000000 │ │ - stmiavs r0!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ - @ instruction: 0xf43e2800 │ │ - ldmib r4, {r1, r6, r7, sl, fp, sp, pc}^ │ │ - ldmib r4, {r9, ip}^ │ │ - stmib sp, {r0, r1, r8, sl, ip, sp}^ │ │ - ldmdbge r0, {r1, r2, r3, r6, r9, ip}^ │ │ - strbmi ip, [r0], -r9, lsr #2 │ │ - @ instruction: 0xf0014651 │ │ - stmdacs r0, {r0, r1, r4, r5, r7, r8, fp, ip, sp, lr, pc} │ │ - ldcge 4, cr15, [r3], #248 @ 0xf8 │ │ - @ instruction: 0xf1043e01 │ │ - mvnle r0, r8, lsl r4 │ │ - stclt 7, cr15, [sp], #1016 @ 0x3f8 │ │ - ldrbtmi r4, [r8], #-2082 @ 0xfffff7de │ │ - @ instruction: 0xf9acf010 │ │ - ldrbtmi r4, [r8], #-2081 @ 0xfffff7df │ │ - stc2 0, cr15, [lr, #-56]! @ 0xffffffc8 │ │ - ldrbtmi r4, [r8], #-2077 @ 0xfffff7e3 │ │ - @ instruction: 0xf9a4f010 │ │ - addmi r9, r1, #20, 18 @ 0x50000 │ │ - ldcge 6, cr15, [sp], {126} @ 0x7e │ │ - subeq lr, r0, r0, lsl #22 │ │ - bl 97444 │ │ - stmiavs r8!, {r6, r7, r8, sl} │ │ - @ instruction: 0xf47e2800 │ │ - @ instruction: 0xf7feac80 │ │ - blmi 720250 │ │ - mrscs r2, (UNDEF: 2) │ │ - ldrbtmi r4, [fp], #-1578 @ 0xfffff9d6 │ │ - stc2l 0, cr15, [ip], {14} │ │ - andcs r4, r0, r6, lsl fp │ │ - ldrtmi r2, [sl], -r2, lsl #2 │ │ - @ instruction: 0xf00e447b │ │ - andcs pc, r1, r5, asr #25 │ │ - @ instruction: 0xf00c4621 │ │ - @ instruction: 0x2001ffbf │ │ - @ instruction: 0xf00c2118 │ │ - stmdami ip, {r0, r1, r3, r4, r5, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ - blmi 35b9c8 │ │ - ldrbtmi r4, [r8], #-2316 @ 0xfffff6f4 │ │ - ldrbtmi r4, [r9], #-1147 @ 0xfffffb85 │ │ - @ instruction: 0x212b9100 │ │ - blx ded088 │ │ - tstcs r8, r1 │ │ - @ instruction: 0xffacf00c │ │ - andcs r9, r8, r5, lsl r9 │ │ - @ instruction: 0xffa8f00c │ │ - andeq r9, sl, lr, asr #25 │ │ - andeq r9, sl, lr, asr #25 │ │ - andeq r9, sl, r6, ror fp │ │ - @ instruction: 0xfffe844d │ │ - andeq r9, sl, r4, lsl r9 │ │ - andeq r9, sl, r2, lsr sl │ │ - andeq r9, sl, r4, lsl sl │ │ - andeq r9, sl, r2, lsr #20 │ │ + @ instruction: 0xf0a74620 │ │ + stmdals r6, {r1, r2, r4, r5, r7, r8, r9, fp, sp, lr, pc} │ │ + @ instruction: 0xd01542b8 │ │ + @ instruction: 0xf64a9805 │ │ + @ instruction: 0xf6ca21ab │ │ + @ instruction: 0xf10621aa │ │ + bl fe8320c0 │ │ + blx fe8310b2 │ │ + stmiaeq sp, {r0, r8}^ │ │ + stceq 8, cr15, [r4], {84} @ 0x54 │ │ + svclt 0x001c2800 │ │ + @ instruction: 0xf0a76820 │ │ + strcc lr, [ip], #-2976 @ 0xfffff460 │ │ + mvnsle r3, r1, lsl #26 │ │ + stmdacs r0, {r0, r3, fp, ip, pc} │ │ + strbmi sp, [r8], -sp, asr #1 │ │ + bl fe5ed344 │ │ + pop {r0, r1, r4, ip, sp, pc} │ │ + ldrble r8, [r4], #4080 @ 0xff0 │ │ + stmdami r3!, {r4, r5, r6, r8, sl, ip, sp, pc} │ │ + stmdavs r4, {r3, r4, r5, r6, sl, lr} │ │ + svchi 0x005bf3bf │ │ + strtmi fp, [r0], -ip, lsr #2 │ │ + bl ff06d360 │ │ + stmdble r8, {r0, fp, sp} │ │ + @ instruction: 0xf046bd70 │ │ + @ instruction: 0x4604f9d5 │ │ + @ instruction: 0xf0a74620 │ │ + stmdacs r1, {r3, r4, r5, r7, r8, r9, fp, sp, lr, pc} │ │ + svclt 0x0004d8f6 │ │ + ldcllt 0, cr2, [r0, #-0] │ │ + cdp2 0, 8, cr15, cr0, cr4, {3} │ │ + andcs r4, r8, r5, lsl #12 │ │ + bl fe56d388 │ │ + stmib r0, {r3, r4, r8, r9, ip, sp, pc}^ │ │ + strmi r5, [r6], -r0, lsl #8 │ │ + @ instruction: 0xf0a74620 │ │ + strmi lr, [r5], -r6, lsr #23 │ │ + ldrtmi r4, [r1], -r0, lsr #12 │ │ + @ instruction: 0xf0a74634 │ │ + @ instruction: 0xb1a5eba8 │ │ + cmnlt r8, r8, lsr #16 │ │ + svchi 0x005bf3bf │ │ + svcne 0x0000e850 │ │ + stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ + blcs 39d1c │ │ + stmdbcs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ + vaddw.u , , d4 │ │ + stmdavs r8!, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc} │ │ + stc2l 0, cr15, [r8], #392 @ 0x188 │ │ + @ instruction: 0xf0a74628 │ │ + @ instruction: 0x4620eb52 │ │ + andcs fp, r4, r0, ror sp │ │ + @ instruction: 0xf00c2108 │ │ + svclt 0x0000fffc │ │ + andeq ip, sl, r4, lsl lr │ │ andcs r2, r1, #0, 2 │ │ smlabtcs r6, r0, r9, lr │ │ stmib r0, {r3, r9, sp}^ │ │ tstvs r1, r2, lsl #4 │ │ andvs r7, r1, r1, lsl #2 │ │ ldrble r4, [r4], #1904 @ 0x770 │ │ svcmi 0x00f0e92d │ │ @ instruction: 0x4605b097 │ │ @ instruction: 0xf0a7200a │ │ - stmdacs r0, {r2, r3, r5, r7, r8, r9, fp, sp, lr, pc} │ │ + stmdacs r0, {r1, r2, r4, r6, r8, r9, fp, sp, lr, pc} │ │ tstphi r0, #0 @ p-variant is OBSOLETE │ │ vmax.s8 d20, d7, d4 │ │ @ instruction: 0x81202065 │ │ rsbsvc pc, r7, r6, asr #12 │ │ rsbscc pc, r2, r6, asr #13 │ │ rsbvs r2, r0, r0, lsr #2 │ │ rsbcc pc, r9, r7, asr #4 │ │ rsbcs pc, r1, r7, asr #5 │ │ eorvs r2, r0, r0, lsr #5 │ │ andsls r2, r0, r0 │ │ @ instruction: 0xf0a7a810 │ │ - stmdacs r0, {r2, r3, r4, r6, r7, r8, r9, fp, sp, lr, pc} │ │ + stmdacs r0, {r1, r2, r3, r4, r5, r6, r8, r9, fp, sp, lr, pc} │ │ addshi pc, r2, #64 @ 0x40 │ │ stmdbcs r0, {r4, r8, fp, ip, pc} │ │ addhi pc, lr, #0 │ │ stmdbeq r0, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ strcs r2, [r1], -r4 │ │ andsls lr, r2, r1, asr #19 │ │ ldmdbeq r6, {r0, r6, r7, r8, fp, sp, lr, pc} │ │ @@ -15635,23 +15686,23 @@ │ │ @ instruction: 0xf8816620 │ │ stmib r1, {r5, r6, sp, lr}^ │ │ @ instruction: 0xf8819914 │ │ @ instruction: 0xf8c19044 │ │ stmib r1, {r6, ip, pc}^ │ │ stmib r1, {r3, r8, fp, ip, pc}^ │ │ @ instruction: 0xf0a79900 │ │ - strmi lr, [r7], -r0, asr #23 │ │ + strmi lr, [r7], -r2, ror #22 │ │ @ instruction: 0xf04f2801 │ │ svclt 0x00d8004c │ │ @ instruction: 0xf0a74637 │ │ - stmdacs r0, {r3, r5, r6, r8, r9, fp, sp, lr, pc} │ │ + stmdacs r0, {r1, r4, r8, r9, fp, sp, lr, pc} │ │ rsbhi pc, sl, #0 │ │ @ instruction: 0xf8804683 │ │ subvs r9, r6, #48 @ 0x30 │ │ - beq 6d274 │ │ + beq 6d340 │ │ strvs lr, [r0], -fp, asr #19 │ │ stmib r0, {r4, r9, sl, fp, sp, pc}^ │ │ @ instruction: 0xf880590a │ │ andcs r9, sl, r0, lsr #32 │ │ streq lr, [r4], #-2507 @ 0xfffff635 │ │ stmdbeq r6, {r0, r1, r3, r6, r7, r8, fp, sp, lr, pc} │ │ @ instruction: 0xf8cb9501 │ │ @@ -15661,454 +15712,454 @@ │ │ stmib sp, {r0, r4, r8, fp, ip, sp, lr}^ │ │ and fp, r5, r3, lsl #14 │ │ @ instruction: 0xa018f8dd │ │ strmi r9, [r2, #2052] @ 0x804 │ │ andshi pc, r5, #0 │ │ svceq 0x0000e85b │ │ stmda fp, {r0, r6, sl, fp, ip}^ │ │ - bcs 35980 │ │ + bcs 35a4c │ │ stmdacs r0, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ adchi pc, r9, #0, 2 │ │ @ instruction: 0x0010f8db │ │ svcmi 0x0000f1b0 │ │ @ instruction: 0xf04fd102 │ │ ands r4, r1, r0, lsl #14 │ │ @ instruction: 0x5705e9db │ │ @ instruction: 0x4638b13f │ │ - bl a6d440 │ │ + b ff4ed50c │ │ @ instruction: 0xf0002800 │ │ strmi r8, [r4], -r4, lsl #5 │ │ strcs lr, [r1], #-0 │ │ strtmi r4, [r9], -r0, lsr #12 │ │ @ instruction: 0xf0a4463a │ │ - strls pc, [r5, -r8, lsl #18] │ │ + smuadxls r5, r4, r8 │ │ ldrdeq pc, [r8], -fp │ │ stmdacs r1, {r0, r1, r3, r4, r6, r7, r8, sl, fp, lr} │ │ ldrbtmi r9, [sp], #-1031 @ 0xfffffbf9 │ │ @ instruction: 0xf8dbd107 │ │ andls r0, r8, ip │ │ andls r9, fp, r5, lsl #16 │ │ strvc lr, [r9], #-2509 @ 0xfffff633 │ │ stmdals r5, {r1, r5, r6, sp, lr, pc} │ │ stmib sp, {r0, r1, r3, ip, pc}^ │ │ stmiavs r8!, {r0, r3, sl, ip, sp, lr} │ │ stmdacc r1, {r4, r8, ip, sp, pc} │ │ subs r9, r9, r8 │ │ stmdage sp, {r0, r4, r6, r7, r8, fp, lr} │ │ @ instruction: 0xf0614479 │ │ - @ instruction: 0xf8ddfeb3 │ │ + @ instruction: 0xf8ddfe83 │ │ @ instruction: 0xf1b88034 │ │ tstle r2, r0, lsl #30 │ │ strne pc, [r0], -pc, asr #8 │ │ ldmib sp, {r0, r3, r6, sp, lr, pc}^ │ │ ldrtmi r4, [r0], -lr, lsl #4 │ │ @ instruction: 0xf00f4621 │ │ - ldmdals r0, {r0, r3, r5, r6, fp, ip, sp, lr, pc} │ │ + ldmdals r0, {r0, r1, r2, r7, r8, fp, ip, sp, lr, pc} │ │ eorsle r2, r8, r1, lsl #16 │ │ movslt r9, #1179648 @ 0x120000 │ │ stmdacs r1, {r0, r4, r8, fp, ip, pc} │ │ stmdavc sl, {r0, r1, r2, r8, ip, lr, pc} │ │ strne pc, [r0], -pc, asr #8 │ │ eorsle r2, r0, fp, lsr #20 │ │ eorle r2, lr, sp, lsr #20 │ │ stmdavc sl, {sp, lr, pc} │ │ svclt 0x00042a2b │ │ stmdacc r1, {r0, r8, ip, sp} │ │ andle r2, sp, #589824 @ 0x90000 │ │ noplt {0} @ │ │ - bcc c4f270 │ │ + bcc c4f33c │ │ ldmdale lr, {r0, r3, r9, fp, sp} │ │ orreq lr, r6, #6144 @ 0x1800 │ │ stmdacc r1, {r0, r8, ip, sp} │ │ strbeq lr, [r3], -r2, lsl #22 │ │ @ instruction: 0xe018d1f4 │ │ stmdacs r0, {r9, sp} │ │ orrshi pc, fp, r0 │ │ - blx fe8b9e92 │ │ + blx fe8b9f5e │ │ ldmdblt r3!, {r0, r1, r8, r9, sp}^ │ │ - blcc af2b4 │ │ + blcc af380 │ │ strne pc, [r0], -pc, asr #8 │ │ ldreq pc, [r0, -r3, lsr #3]! │ │ @ instruction: 0xf14919d2 │ │ svccs 0x00090300 │ │ stmdacc r1, {r0, r2, fp, ip, lr, pc} │ │ rscle r2, sl, r0, lsl #22 │ │ vst4.8 {d30-d33}, [pc], r1 │ │ @ instruction: 0xf1b81600 │ │ svclt 0x001c0f00 │ │ @ instruction: 0xf0a74620 │ │ - @ instruction: 0x9608ea96 │ │ + @ instruction: 0x9608ea38 │ │ adcvs r1, r8, r0, ror ip │ │ eoreq pc, r0, #1073741825 @ 0x40000001 │ │ - beq ad6d0 │ │ + beq ad79c │ │ cmnvc pc, #13762560 @ 0xd20000 │ │ svchi 0x002ff3bf │ │ movwcs lr, #6 │ │ svchi 0x002ff3bf │ │ @ instruction: 0x463707db │ │ tstle r8, fp, lsr #12 │ │ @ instruction: 0xf1531c78 │ │ @ instruction: 0xf1590100 │ │ @ instruction: 0xf0400600 │ │ ldm r2, {r2, r4, r5, r6, r8, pc}^ │ │ rsbmi r6, fp, pc, ror r5 │ │ teqmi fp, #119 @ 0x77 │ │ stmia r2, {r0, r1, r3, r5, r6, r7, r8, ip, lr, pc}^ │ │ - blcs 318ac │ │ + blcs 31978 │ │ movweq pc, #79 @ 0x4f @ │ │ @ instruction: 0xf04fbf08 │ │ @ instruction: 0x07db33ff │ │ @ instruction: 0x462b4637 │ │ - bge 2a568c │ │ - cdp2 0, 9, cr15, cr0, cr4, {3} │ │ + bge 2a5758 │ │ + cdp2 0, 6, cr15, cr0, cr4, {3} │ │ andls r4, ip, r0, lsl #13 │ │ @ instruction: 0xf04f2000 │ │ @ instruction: 0xf0640900 │ │ - stmdacs r0, {r0, r2, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ + stmdacs r0, {r0, r2, r4, r5, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ andsge pc, r8, sp, asr #17 │ │ stmdavs r1, {r1, r2, r3, r5, r6, ip, lr, pc} │ │ @ instruction: 0xf8c0ac10 │ │ mrsls r9, (UNDEF: 13) │ │ ldmda r1, {r0, r3, r4, r6, r8, ip, sp, pc}^ │ │ mrrcne 15, 0, r2, r3, cr0 │ │ strcc lr, [r0, -r1, asr #16] │ │ mvnsle r2, r0, lsl #30 │ │ @ instruction: 0xf1002a00 │ │ @ instruction: 0xf8d081d6 │ │ andvs r9, r1, r0 │ │ subls pc, r0, sp, asr #17 │ │ @ instruction: 0xf0624620 │ │ - ldmdals r0, {r0, r2, r4, r5, sl, fp, ip, sp, lr, pc} │ │ + ldmdals r0, {r0, r2, sl, fp, ip, sp, lr, pc} │ │ vsra.u32 , q12, #1 │ │ ldmda r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ cdpne 15, 4, cr1, cr10, cr0, {0} │ │ movwcs lr, #2112 @ 0x840 │ │ mvnsle r2, r0, lsl #22 │ │ tstle r4, r1, lsl #18 │ │ svchi 0x005bf3bf │ │ @ instruction: 0xf0624620 │ │ - svcls 0x000dfc7f │ │ + svcls 0x000dfc4f │ │ svccs 0x0000970d │ │ @ instruction: 0xf107d044 │ │ cdpgt 6, 4, cr0, cr3, cr8, {0} │ │ stmdbge ip, {r1, r3, r6, r8, fp, sp, lr} │ │ @ instruction: 0x46044790 │ │ eorsle r2, lr, r0, lsl #16 │ │ strmi r2, [sp], -r0, lsr #32 │ │ - b e6d620 │ │ + stmib r2!, {r0, r1, r2, r5, r7, ip, sp, lr, pc}^ │ │ @ instruction: 0xf0002800 │ │ stmib r0, {r3, r4, r7, r8, pc}^ │ │ strcs r4, [r1, #-1280] @ 0xfffffb00 │ │ stmdbeq r4, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ ldreq lr, [r1, #-2509] @ 0xfffff633 │ │ subls pc, r0, sp, asr #17 │ │ strcs fp, [r0], #-982 @ 0xfffffc2a │ │ - bl 693c4 │ │ + bl 69490 │ │ stmib r1, {r2, r6, r7, r8}^ │ │ @ instruction: 0xf1045a02 │ │ ldrtmi r0, [ip], -r2, lsl #10 │ │ movtlt r9, #58642 @ 0xe512 │ │ strmi r3, [r3], r8, lsl #12 │ │ stmdbvs sl, {r0, r1, r6, r9, sl, fp, lr, pc}^ │ │ ldrmi sl, [r0, ip, lsl #18] │ │ ldrdls pc, [r0], #-141 @ 0xffffff73 │ │ strmi r1, [r5], -r7, ror #24 │ │ strmi fp, [sl], r0, ror #3 │ │ - strbmi r4, [pc, #-1624] @ 30d78 │ │ + strbmi r4, [pc, #-1624] @ 30e44 │ │ andcs sp, r8, r7, ror #3 │ │ andls r2, r0, r2, lsl #4 │ │ @ instruction: 0x4639a810 │ │ cdpcs 3, 0, cr2, cr0, cr4, {0} │ │ andcs fp, r1, #8, 30 │ │ - @ instruction: 0xf9d2f046 │ │ + @ instruction: 0xf9a0f046 │ │ bfi r9, r1, #16, #11 │ │ strcs r2, [r0, #-1540] @ 0xfffff9fc │ │ ands r2, r0, r0, lsl #14 │ │ strcs r2, [r0, -r4] │ │ andcs lr, r4, r0 │ │ @ instruction: 0xf04f2500 │ │ and r0, r7, r0, lsl #18 │ │ and r4, r1, sp, lsr r6 │ │ ldrdls pc, [r0], #-141 @ 0xffffff73 │ │ ldmdals r1, {r0, r2, r3, r8, r9, sl, fp, ip, pc} │ │ ldrdlt pc, [ip], -sp │ │ andscs r4, r8, r6, lsl #12 │ │ - stmib ip!, {r0, r1, r2, r5, r7, ip, sp, lr, pc}^ │ │ + ldmib r6, {r0, r1, r2, r5, r7, ip, sp, lr, pc} │ │ @ instruction: 0xf0002800 │ │ strmi r8, [r2], ip, asr #1 │ │ stmib sl, {r0, sp}^ │ │ andcs r0, r0, r0 │ │ andeq lr, r2, sl, asr #19 │ │ svceq 0x0000e85a │ │ stmda sl, {r0, r6, sl, fp, ip}^ │ │ - bcs 35c3c │ │ + bcs 35d08 │ │ @ instruction: 0xf1b0d1f8 │ │ vmaxnm.f32 , q8, │ │ andscs r8, r8, sl, asr #2 │ │ - ldmib r4, {r0, r1, r2, r5, r7, ip, sp, lr, pc}^ │ │ + ldmdb lr!, {r0, r1, r2, r5, r7, ip, sp, lr, pc}^ │ │ @ instruction: 0xf0002800 │ │ @ instruction: 0x460480b4 │ │ strls lr, [r2], -r0, ror #17 │ │ stceq 8, cr14, [r0], #512 @ 0x200 │ │ svceq 0x0000e858 │ │ stmda r8, {r0, r6, sl, fp, ip}^ │ │ - bcs 35c68 │ │ + bcs 35d34 │ │ svcls 0x0008d1f8 │ │ stmdbeq r0, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ @ instruction: 0xf1002800 │ │ andcs r8, ip, r2, lsr r1 │ │ - ldmib ip!, {r0, r1, r2, r5, r7, ip, sp, lr, pc} │ │ + stmdb r6!, {r0, r1, r2, r5, r7, ip, sp, lr, pc}^ │ │ stmdacs r0, {r4, r9, sl, fp, sp, pc} │ │ addshi pc, pc, r0 │ │ stmiami r6, {r0, r2, r9, sl, lr}^ │ │ strhi lr, [r0], #-2501 @ 0xfffff63b │ │ adcvs r4, r8, r8, ror r4 │ │ @ instruction: 0xf0a74630 │ │ - stmdacs r0, {r3, r9, fp, sp, lr, pc} │ │ + stmdacs r0, {r1, r3, r5, r7, r8, fp, sp, lr, pc} │ │ @ instruction: 0xf0409016 │ │ @ instruction: 0xf5b78096 │ │ svclt 0x00985f00 │ │ strpl pc, [r0, -pc, asr #8] │ │ @ instruction: 0x46394630 │ │ - b ed74c │ │ + stmib r4!, {r0, r1, r2, r5, r7, ip, sp, lr, pc} │ │ ldmdacs r6, {r7, r8, ip, sp, pc} │ │ @ instruction: 0xf040900d │ │ mlacs r7, r7, r0, r8 │ │ - stmib sl!, {r0, r1, r2, r5, r7, ip, sp, lr, pc}^ │ │ + stmib ip, {r0, r1, r2, r5, r7, ip, sp, lr, pc} │ │ submi r1, r0, #3735552 @ 0x390000 │ │ andmi r3, r1, r1, lsl #18 │ │ @ instruction: 0xf0a74630 │ │ - stmdacs r0, {r2, r4, r5, r6, r7, r8, fp, sp, lr, pc} │ │ + stmdacs r0, {r1, r2, r4, r7, r8, fp, sp, lr, pc} │ │ addshi pc, sl, r0, asr #32 │ │ stmdage sp, {r0, r2, r4, r5, r7, r9, fp, lr} │ │ @ instruction: 0x462b4631 │ │ @ instruction: 0xf8cd447a │ │ @ instruction: 0xf0a79034 │ │ - teqlt r8, #240, 18 @ 0x3c0000 │ │ + teqlt r8, #2392064 @ 0x248000 │ │ stmdavs r8!, {r0, r1, r2, r9, sl, lr} │ │ svchi 0x005bf3bf │ │ svcne 0x0000e850 │ │ stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ - blcs 3a0fc │ │ + blcs 3a1c8 │ │ stmdbcs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ vaddw.u , , d4 │ │ stmdavs r8!, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc} │ │ - @ instruction: 0xf87ef046 │ │ + @ instruction: 0xf84cf046 │ │ @ instruction: 0x4601e9d5 │ │ tstlt r9, r1, lsr r8 │ │ strmi r4, [r8, r0, lsr #12] │ │ stmdacs r0, {r4, r5, r6, fp, sp, lr} │ │ qadd16mi fp, r0, ip │ │ - ldmdb r0, {r0, r1, r2, r5, r7, ip, sp, lr, pc}^ │ │ + ldm r2!, {r0, r1, r2, r5, r7, ip, sp, lr, pc}^ │ │ @ instruction: 0xf0a74628 │ │ - @ instruction: 0xae10e94e │ │ + mrcge 8, 0, lr, cr0, cr0, {7} │ │ and r2, r5, r0, lsl #8 │ │ - ldrdeq sp, [sl], -r2 │ │ - @ instruction: 0xfffe8289 │ │ + andeq sp, sl, r6, lsr #10 │ │ + @ instruction: 0xfffe81bd │ │ strcs r9, [r4], #-3853 @ 0xfffff0f3 │ │ @ instruction: 0xf0a74630 │ │ - stmdacs r0, {r1, r3, r6, r7, r8, fp, sp, lr, pc} │ │ + stmdacs r0, {r2, r3, r5, r6, r8, fp, sp, lr, pc} │ │ cmple r8, sp │ │ @ instruction: 0xf0402c04 │ │ ldrtmi r8, [r8], -r5, lsl #1 │ │ - stmib r8, {r0, r1, r2, r5, r7, ip, sp, lr, pc}^ │ │ + stmdb sl!, {r0, r1, r2, r5, r7, ip, sp, lr, pc}^ │ │ svchi 0x005bf3bf │ │ svceq 0x0000e858 │ │ stmda r8, {r0, r6, r9, sl, fp, ip}^ │ │ - bcs 35d64 │ │ + bcs 35e30 │ │ stmdacs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ strbmi sp, [r0], -r4, lsl #2 │ │ svchi 0x005bf3bf │ │ - @ instruction: 0xf84af046 │ │ + @ instruction: 0xf818f046 │ │ svchi 0x005bf3bf │ │ svceq 0x0000e85a │ │ stmda sl, {r0, r6, r9, sl, fp, ip}^ │ │ - bcs 35d84 │ │ + bcs 35e50 │ │ stcls 1, cr13, [r7], {248} @ 0xf8 │ │ @ instruction: 0xf47f2801 │ │ ldrbmi sl, [r0], -sp, ror #27 │ │ svchi 0x005bf3bf │ │ - @ instruction: 0xf84ef065 │ │ + @ instruction: 0xf81ef065 │ │ ldrmi lr, [r6], -r6, ror #11 │ │ stmdbls r2, {r0, r1, r2, r4, r5, r6, r9, sl, sp, lr, pc} │ │ addvs r2, r8, r1 │ │ stmib r1, {r0, fp, ip, pc}^ │ │ andcs r0, r0, r3, lsl #22 │ │ andvs r7, r8, r8, lsl #2 │ │ pop {r0, r1, r2, r4, ip, sp, pc} │ │ @ instruction: 0xf0638ff0 │ │ - @ instruction: 0x2004f8b3 │ │ + andcs pc, r4, r3, lsl #17 │ │ @ instruction: 0xf00c2118 │ │ - andcs pc, r4, r6, lsr ip @ │ │ + andcs pc, r4, r4, asr sp @ │ │ @ instruction: 0xf00c210c │ │ - ldmdbmi r6!, {r1, r4, r5, sl, fp, ip, sp, lr, pc}^ │ │ + ldmdbmi r6!, {r4, r6, r8, sl, fp, ip, sp, lr, pc}^ │ │ ldrbtmi r4, [r9], #-2678 @ 0xfffff58a │ │ ldmdage r6, {r1, r3, r4, r5, r6, sl, lr} │ │ - blx e6d768 │ │ + blx 26d834 │ │ ldmdbmi r9!, {r0, r1, r2, r3, r4, r5, r6, sp, lr, pc}^ │ │ - bmi 1e9b614 │ │ + bmi 1e9b6e0 │ │ ldrbtmi r4, [sl], #-1145 @ 0xfffffb87 │ │ - blx c6d778 │ │ - bmi 1cc3bb0 │ │ + blx 6d844 │ │ + bmi 1cc3c7c │ │ ldrbtmi r4, [sl], #-1145 @ 0xfffffb87 │ │ @ instruction: 0xf064a80d │ │ - rsbs pc, r0, r9, lsr #20 │ │ + ldrsht pc, [r0], #-153 @ 0xffffff67 @ │ │ lsrcs r2, r0, #32 │ │ - ldc2 0, cr15, [r7], {12} │ │ + ldc2 0, cr15, [r5, #-48]! @ 0xffffffd0 │ │ cmpcs ip, r4 │ │ - ldc2 0, cr15, [r3], {12} │ │ + ldc2 0, cr15, [r1, #-48]! @ 0xffffffd0 │ │ @ instruction: 0xf0a7a810 │ │ - stmdacs r0, {r2, r5, r6, r8, fp, sp, lr, pc} │ │ + stmdacs r0, {r1, r2, r8, fp, sp, lr, pc} │ │ cmple fp, sp │ │ svchi 0x005bf3bf │ │ svceq 0x0000e858 │ │ stmda r8, {r0, r6, r9, sl, fp, ip}^ │ │ - bcs 35e24 │ │ + bcs 35ef0 │ │ stmdacs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ vaddw.u , , d4 │ │ stmdavs r8!, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc} │ │ - @ instruction: 0xffeaf045 │ │ + @ instruction: 0xffb8f045 │ │ @ instruction: 0x4601e9d5 │ │ tstlt r9, r1, lsr r8 │ │ strmi r4, [r8, r0, lsr #12] │ │ stmdacs r0, {r4, r5, r6, fp, sp, lr} │ │ qadd16mi fp, r0, ip │ │ - ldm ip!, {r0, r1, r2, r5, r7, ip, sp, lr, pc} │ │ + ldmda lr, {r0, r1, r2, r5, r7, ip, sp, lr, pc}^ │ │ @ instruction: 0xf0a74628 │ │ - svcmi 0x005de8ba │ │ - ldrbtmi r2, [pc], #-1026 @ 31658 │ │ + svcmi 0x005de85c │ │ + ldrbtmi r2, [pc], #-1026 @ 31724 │ │ svchi 0x005bf3bf │ │ svceq 0x0000e85a │ │ stmda sl, {r0, r6, r9, sl, fp, ip}^ │ │ - bcs 35e68 │ │ + bcs 35f34 │ │ stmdacs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ ldrbmi sp, [r0], -r4, lsl #2 │ │ svchi 0x005bf3bf │ │ - @ instruction: 0xffdef064 │ │ + @ instruction: 0xffaef064 │ │ svchi 0x005bf3bf │ │ svceq 0x0000e858 │ │ stmda r8, {r0, r6, r9, sl, fp, ip}^ │ │ - bcs 35e88 │ │ + bcs 35f54 │ │ stmdacs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ strbmi sp, [r0], -r4, lsl #2 │ │ svchi 0x005bf3bf │ │ - @ instruction: 0xffb8f045 │ │ - bge 4437cc │ │ + @ instruction: 0xff86f045 │ │ + bge 443898 │ │ stmdbmi sp, {r2, r3, r6, r8, r9, fp, lr}^ │ │ ldrbtmi r4, [fp], #-1144 @ 0xfffffb88 │ │ ldrmi lr, [r0, -sp, asr #19] │ │ tstls r0, r9, ror r4 │ │ - @ instruction: 0xf00f212b │ │ - andcs pc, r1, r1, lsl #30 │ │ + @ instruction: 0xf010212b │ │ + andcs pc, r1, pc, lsl r8 @ │ │ @ instruction: 0xf00c4639 │ │ - andcs pc, r4, r7, ror ip @ │ │ + mulcs r4, r5, sp │ │ @ instruction: 0xf00c2120 │ │ - and pc, sl, r3, ror ip @ │ │ + mul sl, r1, sp │ │ tstcs sl, r1 │ │ - stc2l 0, cr15, [lr], #-48 @ 0xffffffd0 │ │ - bmi f03bb8 │ │ + stc2 0, cr15, [ip, #48] @ 0x30 │ │ + bmi f03c84 │ │ ldrbtmi r4, [sl], #-1145 @ 0xfffffb87 │ │ @ instruction: 0xf064a80d │ │ - mrcle 9, 7, APSR_nzcv, cr14, cr7, {5} @ │ │ + @ instruction: 0xdefef987 │ │ ldmdavs r0!, {r0, r1, r2, r9, sl, lr}^ │ │ svclt 0x001c2800 │ │ @ instruction: 0xf0a74620 │ │ - strtmi lr, [r8], -lr, ror #16 │ │ - stmda sl!, {r0, r1, r2, r5, r7, ip, sp, lr, pc}^ │ │ + @ instruction: 0x4628e810 │ │ + stmda ip, {r0, r1, r2, r5, r7, ip, sp, lr, pc} │ │ @ instruction: 0xf0a54638 │ │ - @ instruction: 0x4607eb70 │ │ + @ instruction: 0x4607eb12 │ │ strmi lr, [r7], -r6, lsr #32 │ │ strtmi r4, [r9], -r0, lsr #12 │ │ - @ instruction: 0xff12f064 │ │ + cdp2 0, 14, cr15, cr2, cr4, {3} │ │ @ instruction: 0x4607e034 │ │ stmdacs r0, {r4, r5, r6, fp, sp, lr} │ │ qadd16mi fp, r0, ip │ │ - ldmda r8, {r0, r1, r2, r5, r7, ip, sp, lr, pc}^ │ │ - @ instruction: 0xf0a74628 │ │ - strcs lr, [r0], #-2134 @ 0xfffff7aa │ │ + svc 0x00faf0a6 │ │ + @ instruction: 0xf0a64628 │ │ + strcs lr, [r0], #-4088 @ 0xfffff008 │ │ @ instruction: 0x4607e032 │ │ strmi lr, [r7], -r6, lsr #32 │ │ cmnlt r8, r0, lsl r8 │ │ svchi 0x005bf3bf │ │ svcne 0x0000e850 │ │ stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ - blcs 3a338 │ │ + blcs 3a404 │ │ stmdbcs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ vaddw.u , , d4 │ │ ldmdage r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc} │ │ - blx fe36d8d0 │ │ + blx 176d99c │ │ @ instruction: 0xf064a80d │ │ - eor pc, r2, r0, asr #30 │ │ - @ instruction: 0xffd7f00f │ │ - @ instruction: 0xffd5f00f │ │ + eor pc, r2, r0, lsl pc @ │ │ + @ instruction: 0xf8f5f010 │ │ + @ instruction: 0xf8f3f010 │ │ strtmi r4, [r8], -r7, lsl #12 │ │ @ instruction: 0xf0644651 │ │ - and pc, r2, r3, ror #29 │ │ - @ instruction: 0xffcdf00f │ │ + @ instruction: 0xe002feb3 │ │ + @ instruction: 0xf8ebf010 │ │ ldmdage r0, {r0, r1, r2, r9, sl, lr} │ │ - cdp2 0, 8, cr15, cr14, cr4, {3} │ │ + cdp2 0, 5, cr15, cr14, cr4, {3} │ │ @ instruction: 0xf064a80d │ │ - and pc, lr, ip, lsr #30 │ │ - @ instruction: 0xffc3f00f │ │ - @ instruction: 0xffc1f00f │ │ + strd pc, [lr], -ip │ │ + @ instruction: 0xf8e1f010 │ │ + @ instruction: 0xf8dff010 │ │ strcs r4, [r1], #-1543 @ 0xfffff9f9 │ │ @ instruction: 0xf064a810 │ │ - stmdblt ip, {r0, r2, r3, r5, r6, r8, fp, ip, sp, lr, pc} │ │ + stmdblt ip, {r0, r2, r3, r4, r5, r8, fp, ip, sp, lr, pc} │ │ strmi lr, [r7], -r3 │ │ @ instruction: 0xf0644628 │ │ - @ instruction: 0x4638fa5f │ │ - bl 76da30 │ │ - @ instruction: 0xffb1f00f │ │ - muleq sl, r0, ip │ │ - @ instruction: 0xfffe4c3a │ │ - andeq sl, sl, ip, lsr #11 │ │ - @ instruction: 0x000645b1 │ │ - @ instruction: 0xfffe4c08 │ │ - andeq sl, sl, lr, ror r5 │ │ - @ instruction: 0xfffe4b38 │ │ - @ instruction: 0x000aa4ba │ │ - @ instruction: 0xfffe4c28 │ │ - andeq sl, sl, sl, lsr #11 │ │ - andeq sl, sl, sl, lsl #10 │ │ - @ instruction: 0xfffe7de7 │ │ - @ instruction: 0x000aaaba │ │ - andeq sl, sl, r4, ror #17 │ │ + ldrtmi pc, [r8], -pc, lsr #20 @ │ │ + b fefedafc │ │ + @ instruction: 0xf8cff010 │ │ + ldrdeq sl, [sl], -r4 │ │ + @ instruction: 0xfffe4b6e │ │ + strdeq sl, [sl], -r0 │ │ + andeq r4, r6, r1, asr r5 │ │ + @ instruction: 0xfffe4b3c │ │ + andeq sl, sl, r2, asr #9 │ │ + @ instruction: 0xfffe4a6c │ │ + strdeq sl, [sl], -lr │ │ + @ instruction: 0xfffe4b5c │ │ + andeq sl, sl, lr, ror #9 │ │ + andeq sl, sl, lr, asr #8 │ │ + @ instruction: 0xfffe7d1b │ │ + andeq sl, sl, lr, ror #19 │ │ + andeq sl, sl, r8, lsr #16 │ │ strdlt fp, [r1], r0 │ │ @ instruction: 0x4603e9d0 │ │ cmplt r6, r5, lsl #12 │ │ @ instruction: 0xf8571d27 │ │ stmdacs r0, {r2, sl, fp} │ │ ldmdavs r8!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ - svc 0x00e8f0a6 │ │ + svc 0x008af0a6 │ │ cdpcc 7, 0, cr3, cr1, cr12, {0} │ │ stmiavs r8!, {r0, r2, r4, r5, r6, r7, r8, ip, lr, pc} │ │ strtmi fp, [r0], -r8, lsr #2 │ │ pop {r0, ip, sp, pc} │ │ @ instruction: 0xf0a640f0 │ │ - andlt fp, r1, r3, lsl #31 │ │ + andlt fp, r1, r5, lsr #30 │ │ stmvs r1, {r4, r5, r6, r7, r8, sl, fp, ip, sp, pc} │ │ svclt 0x001c2900 │ │ @ instruction: 0xf0a668c0 │ │ - @ instruction: 0x4770bf7b │ │ + @ instruction: 0x4770bf1d │ │ stmdbcs r0, {r0, r7, fp, sp, lr} │ │ stmiavs r0, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ - svclt 0x0074f0a6 │ │ + svclt 0x0016f0a6 │ │ ldrblt r4, [r0, #1904]! @ 0x770 │ │ ldmib r0, {r0, r7, ip, sp, pc}^ │ │ strmi r4, [r5], -r3, lsl #12 │ │ stcne 1, cr11, [r7, #-344]! @ 0xfffffea8 │ │ stceq 8, cr15, [r4], {87} @ 0x57 │ │ svclt 0x001c2800 │ │ @ instruction: 0xf0a66838 │ │ - strcc lr, [ip, -r0, asr #31] │ │ + strcc lr, [ip, -r2, ror #30] │ │ mvnsle r3, r1, lsl #28 │ │ @ instruction: 0xb12868a8 │ │ andlt r4, r1, r0, lsr #12 │ │ ldrhtmi lr, [r0], #141 @ 0x8d │ │ - svclt 0x005af0a6 │ │ + cdplt 0, 15, cr15, cr12, cr6, {5} │ │ ldcllt 0, cr11, [r0, #4]! │ │ mvnsmi lr, sp, lsr #18 │ │ stmdavs r2, {r2, r3, r7, ip, sp, pc} │ │ cmplt sl, r0, lsl #2 │ │ ldceq 1, cr15, [r4], {13} │ │ ldrdcc lr, [r1], -r0 │ │ andeq lr, lr, ip, lsl #17 │ │ @@ -16117,72 +16168,72 @@ │ │ and r2, r0, r1, lsl #2 │ │ @ instruction: 0xf10d2000 │ │ strbtmi r0, [sp], -r4, lsr #16 │ │ tstls r4, r8 │ │ and r9, r2, r0, lsl #2 │ │ @ instruction: 0xf7ff1d38 │ │ strbmi pc, [r0], -r3, ror #31 @ │ │ - @ instruction: 0xf01c4629 │ │ - @ instruction: 0x9c09fafd │ │ + @ instruction: 0xf0014629 │ │ + stcls 12, cr15, [r9], {71} @ 0x47 │ │ stmdals fp, {r2, r3, r5, r8, r9, ip, sp, pc} │ │ strbeq lr, [r0], -r0, lsl #22 │ │ addeq lr, r6, r4, lsl #22 │ │ ldrdne pc, [ip, -r0] │ │ svclt 0x001e2900 │ │ addvc pc, r6, r0, lsl #10 │ │ @ instruction: 0xf0a66840 │ │ - bl 16d6cc │ │ + bl 16d620 │ │ ldmdavc r8!, {r1, r2, r6, r7, r8, r9, sl} │ │ mvnle r2, #196608 @ 0x30000 │ │ stmdacs r4, {r1, r3, ip, lr, pc} │ │ ldmvs ip!, {r5, r6, r7, r8, ip, lr, pc}^ │ │ ldmvs lr!, {r2, r4, r5, r8, ip, sp, pc} │ │ @ instruction: 0xf0004630 │ │ ldrcc pc, [r8], -r3, ror #19 │ │ mvnsle r3, r1, lsl #24 │ │ stmdacs r0, {r3, r4, r5, r6, fp, sp, lr} │ │ ldmvs r8!, {r0, r1, r2, r4, r6, r7, ip, lr, pc} │ │ - svc 0x006af0a6 │ │ + svc 0x000cf0a6 │ │ ldrdlt lr, [ip], -r3 │ │ ldrhhi lr, [r0, #141]! @ 0x8d │ │ ldmib r0, {r4, r5, r7, r8, sl, ip, sp, pc}^ │ │ stmdavs r9!, {r8, sl, lr} │ │ svclt 0x001c2900 │ │ strmi r4, [r8, r0, lsr #12] │ │ @ instruction: 0xb1206868 │ │ pop {r5, r9, sl, lr} │ │ @ instruction: 0xf0a640b0 │ │ - ldclt 14, cr11, [r0, #1012]! @ 0x3f4 │ │ + ldclt 14, cr11, [r0, #636]! @ 0x27c │ │ @ instruction: 0x4604b5b0 │ │ vtbl.8 d6, {d31}, d0 │ │ ldmda r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ cdpne 15, 4, cr1, cr10, cr0, {0} │ │ movwcs lr, #2112 @ 0x840 │ │ mvnsle r2, r0, lsl #22 │ │ tstle r4, r1, lsl #18 │ │ svchi 0x005bf3bf │ │ @ instruction: 0xf00168a0 │ │ - ldmib r4, {r2, r5, sl, fp, ip, sp, lr, pc}^ │ │ + ldmib r4, {r1, r5, r7, sl, fp, ip, sp, lr, pc}^ │ │ stmdavs r9!, {r0, r1, r8, sl, lr} │ │ svclt 0x001c2900 │ │ strmi r4, [r8, r0, lsr #12] │ │ @ instruction: 0xb1206868 │ │ pop {r5, r9, sl, lr} │ │ @ instruction: 0xf0a640b0 │ │ - ldclt 14, cr11, [r0, #876]! @ 0x36c │ │ + ldclt 14, cr11, [r0, #500]! @ 0x1f4 │ │ ldrdgt pc, [r8], -r0 │ │ svchi 0x005bf3bf │ │ svccs 0x0000e85c │ │ stmda ip, {r0, r1, r4, r6, r9, sl, fp, ip}^ │ │ stmdbcs r0, {r8, ip, sp} │ │ - bcs a6154 │ │ + bcs a6220 │ │ @ instruction: 0x4770bf18 │ │ svchi 0x005bf3bf │ │ @ instruction: 0xf0016880 │ │ - ldrlt fp, [r0, #3074]! @ 0xc02 │ │ + ldrlt fp, [r0, #3200]! @ 0xc80 │ │ strmi fp, [sp], -r2, lsl #1 │ │ stmdacs r1, {r4, r6, r7, r8, r9, ip, sp, pc} │ │ @ instruction: 0xf105d17a │ │ vaddl.u q0, d31, d0 │ │ ldmda r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ cdpne 15, 4, cr1, cr10, cr0, {0} │ │ movwcs lr, #2112 @ 0x840 │ │ @@ -16190,199 +16241,199 @@ │ │ vtbl.8 d2, {d15-d16}, d1 │ │ @ instruction: 0xf0408f5b │ │ @ instruction: 0xf1058098 │ │ vaddl.u q0, d15, d16 │ │ ldmda r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ @ instruction: 0xf0411f00 │ │ stmda r0, {r0, r9}^ │ │ - blcs 3a5c4 │ │ + blcs 3a690 │ │ @ instruction: 0x07c8d1f7 │ │ svchi 0x005bf3bf │ │ @ instruction: 0xf105bf04 │ │ @ instruction: 0xf7f40040 │ │ - @ instruction: 0xf105fecb │ │ + @ instruction: 0xf105fe7f │ │ andcs r0, r1, #136 @ 0x88 │ │ svchi 0x005bf3bf │ │ svcne 0x004fe8d0 │ │ svccs 0x0043e8c0 │ │ mvnsle r2, r0, lsl #22 │ │ vtbl.8 d2, {d15-d16}, d0 │ │ svclt 0x001e8f5b │ │ @ instruction: 0xf10d9501 │ │ @ instruction: 0xf0000004 │ │ rsb pc, lr, r2, lsl #17 │ │ adceq pc, r0, r5, lsl #2 │ │ svchi 0x005bf3bf │ │ svcne 0x0000e850 │ │ stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ - blcs 3a614 │ │ + blcs 3a6e0 │ │ stmdbcs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ svchi 0x005bf3bf │ │ stcvs 1, cr13, [r8], #380 @ 0x17c │ │ eoreq pc, r0, #1073741825 @ 0x40000001 │ │ svchi 0x005bf3bf │ │ svcne 0x0000e852 │ │ movweq lr, #2625 @ 0xa41 │ │ strcc lr, [r0], #-2114 @ 0xfffff7be │ │ mvnsle r2, r0, lsl #24 │ │ svchi 0x005bf3bf │ │ andmi r6, r8, #168, 24 @ 0xa800 │ │ @ instruction: 0xf105bf04 │ │ @ instruction: 0xf7f40070 │ │ - @ instruction: 0xf105fe91 │ │ + @ instruction: 0xf105fe45 │ │ andcs r0, r1, #168 @ 0xa8 │ │ svchi 0x005bf3bf │ │ svcne 0x004fe8d0 │ │ svccs 0x0043e8c0 │ │ mvnsle r2, r0, lsl #22 │ │ svchi 0x005bf3bf │ │ @ instruction: 0xf8d5b3d9 │ │ stmdacs r0, {r3, r4, r7} │ │ @ instruction: 0xf8d5bf1c │ │ @ instruction: 0xf0a60094 │ │ - @ instruction: 0xf105eea8 │ │ + @ instruction: 0xf105ee4a │ │ @ instruction: 0xf0660054 │ │ - @ instruction: 0xf105fef3 │ │ + @ instruction: 0xf105fe79 │ │ eor r0, r4, r8, ror r0 │ │ svchi 0x005bf3bf │ │ svceq 0x0000e855 │ │ stmda r5, {r0, r6, r9, sl, fp, ip}^ │ │ - bcs 36294 │ │ + bcs 36360 │ │ stmdacs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ svchi 0x005bf3bf │ │ @ instruction: 0xf105d11f │ │ @ instruction: 0xf7f30008 │ │ - @ instruction: 0xf105fc67 │ │ + @ instruction: 0xf105fc1b │ │ andcs r0, r1, #68 @ 0x44 │ │ svchi 0x005bf3bf │ │ svcne 0x004fe8d0 │ │ svccs 0x0043e8c0 │ │ mvnsle r2, r0, lsl #22 │ │ svchi 0x005bf3bf │ │ @ instruction: 0xf105b169 │ │ @ instruction: 0xf0660010 │ │ - @ instruction: 0xf105fecd │ │ + @ instruction: 0xf105fe53 │ │ @ instruction: 0xf0660028 │ │ - strtmi pc, [r8], -r9, asr #29 │ │ + strtmi pc, [r8], -pc, asr #28 │ │ pop {r1, ip, sp, pc} │ │ @ instruction: 0xf0a640b0 │ │ - andlt fp, r2, r9, lsl lr │ │ + @ instruction: 0xb002bdbb │ │ ldrlt fp, [r0, #3504]! @ 0xdb0 │ │ strmi lr, [r0, #-2512] @ 0xfffff630 │ │ stmdbcs r0, {r0, r3, r5, fp, sp, lr} │ │ qadd16mi fp, r0, ip │ │ stmdavs r8!, {r3, r7, r8, r9, sl, lr}^ │ │ strtmi fp, [r0], -r0, lsr #2 │ │ ldrhtmi lr, [r0], sp │ │ - cdplt 0, 0, cr15, cr8, cr6, {5} │ │ + stclt 0, cr15, [sl, #664]! @ 0x298 │ │ push {r4, r5, r7, r8, sl, fp, ip, sp, pc} │ │ strdlt r4, [r1], r0 │ │ ldrdhi pc, [r0], -r0 │ │ ldrdeq pc, [r0], -r8 │ │ ldrdne pc, [r0], -r8 @ │ │ ldrdpl pc, [r4], -r8 │ │ streq pc, [r1, -r0, lsr #32] │ │ stmdbeq r1, {r0, r5, ip, sp, lr, pc} │ │ tstle r8, pc, asr #10 │ │ svclt 0x001c2d00 │ │ @ instruction: 0xf0a64628 │ │ - @ instruction: 0xf108ee4c │ │ + @ instruction: 0xf108edee │ │ @ instruction: 0xf0660048 │ │ - @ instruction: 0x4640fe97 │ │ + @ instruction: 0x4640fe1d │ │ pop {r0, ip, sp, pc} │ │ @ instruction: 0xf0a643f0 │ │ - @ instruction: 0xf8d5bde7 │ │ + @ instruction: 0xf8d5bd89 │ │ @ instruction: 0x462e01f0 │ │ ldrtmi r4, [r0], -r5, lsl #12 │ │ - cdp 0, 3, cr15, cr10, cr6, {5} │ │ + ldcl 0, cr15, [ip, #664] @ 0x298 │ │ ldrmi r3, [r9, #1794]! @ 0x702 │ │ vmla.i , , d2[5] │ │ ldmdacs pc, {r2, r6} @ │ │ - bl 1a5f24 │ │ + bl 1a5ff0 │ │ mrseq r1, (UNDEF: 16) │ │ stmdavs ip, {r1, r2, r3, r5, fp, ip, lr}^ │ │ stmdbcs r0, {r0, r5, fp, sp, lr} │ │ shadd16mi fp, r0, ip │ │ stmdavs r0!, {r3, r7, r8, r9, sl, lr}^ │ │ mvnle r2, r0, lsl #16 │ │ stmdavs r1, {r1, r3, r5, r6, r7, r8, r9, sl, sp, lr, pc} │ │ svclt 0x001c2900 │ │ @ instruction: 0xf0a66840 │ │ - ldrbmi fp, [r0, -r5, asr #27]! │ │ + ldrbmi fp, [r0, -r7, ror #26]! │ │ svcmi 0x00f0e92d │ │ strmi fp, [r4], -r3, lsl #1 │ │ tstlt r8, r0, lsl #16 │ │ - svc 0x00e6f069 │ │ + svc 0x0086f069 │ │ eorvs r2, r0, r0 │ │ @ instruction: 0xf1b06a20 │ │ subsle r4, sp, r0, lsl #30 │ │ andls r6, r1, r5, lsr #23 │ │ mlaseq ip, r4, r8, pc @ │ │ ldmdami ip!, {r5, r8, fp, ip, sp, pc} │ │ stmdavs r0, {r3, r4, r5, r6, sl, lr}^ │ │ cmnle fp, r0, asr #32 │ │ vaddl.u q1, d15, d0 │ │ ldmda r5, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ stmda r5, {r8, r9, sl, fp, ip}^ │ │ - bcs 323c8 │ │ + bcs 32494 │ │ stmdbcs r2, {r0, r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ ldmib r4, {r0, r2, r4, r5, ip, lr, pc}^ │ │ @ instruction: 0xf1bbab09 │ │ strls r0, [r2], #-3840 @ 0xfffff100 │ │ strcs sp, [r0], #-59 @ 0xffffffc5 │ │ @ instruction: 0xf8d9e009 │ │ stmdacs r0, {} @ │ │ shadd16mi fp, r0, ip │ │ - stcl 0, cr15, [ip, #664]! @ 0x298 │ │ + stc 0, cr15, [lr, #664] @ 0x298 │ │ ldrbmi r3, [ip, #-1025] @ 0xfffffbff │ │ - bl 165cb0 │ │ - bl 2b1d08 │ │ + bl 165d7c │ │ + bl 2b1dd4 │ │ ldmib r9, {r7, r8, fp}^ │ │ svccs 0x00006701 │ │ @ instruction: 0xf04fd0ed │ │ and r0, r1, r0, lsl #16 │ │ strhtle r4, [r8], #88 @ 0x58 │ │ andne lr, r8, r6, lsl #22 │ │ stmdaeq r1, {r3, r8, ip, sp, lr, pc} │ │ svcne 0x0008f850 │ │ svchi 0x005bf3bf │ │ svccs 0x0000e851 │ │ stmda r1, {r0, r1, r4, r6, r9, sl, fp, ip}^ │ │ stccs 5, cr3, [r0, #-0] │ │ - bcs a640c │ │ + bcs a64d8 │ │ @ instruction: 0xf3bfd1ec │ │ stmdavs r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc} │ │ - ldc2l 0, cr15, [ip, #-84] @ 0xffffffac │ │ + mcr2 0, 4, pc, cr14, cr4, {0} @ │ │ rscscs lr, r0, r6, ror #15 │ │ addcs r4, r1, #42991616 @ 0x2900000 │ │ @ instruction: 0xf0a62301 │ │ - ldmib r4, {r3, r6, r7, r8, sl, fp, sp, lr, pc}^ │ │ + ldmib r4, {r1, r3, r5, r6, r8, sl, fp, sp, lr, pc}^ │ │ @ instruction: 0xf1bbab09 │ │ strls r0, [r2], #-3840 @ 0xfffff100 │ │ stmdals r1, {r0, r1, r6, r7, r8, ip, lr, pc} │ │ stmdacs r0, {r1, sl, fp, ip, pc} │ │ uadd16mi fp, r0, ip │ │ - ldc 0, cr15, [r2, #664]! @ 0x298 │ │ + ldcl 0, cr15, [r4, #-664] @ 0xfffffd68 │ │ @ instruction: 0xf1b56c65 │ │ andsle r4, r0, r0, lsl #30 │ │ @ instruction: 0x4612e9d4 │ │ @ instruction: 0x4627b136 │ │ - bleq 16fdd0 │ │ - cdp 0, 12, cr15, cr8, cr10, {3} │ │ + bleq 16fe9c │ │ + cdp 0, 6, cr15, cr8, cr10, {3} │ │ mvnsle r3, r1, lsl #28 │ │ strtmi fp, [r0], -sp, lsr #2 │ │ pop {r0, r1, ip, sp, pc} │ │ @ instruction: 0xf0a64ff0 │ │ - andlt fp, r3, r3, asr #26 │ │ + andlt fp, r3, r5, ror #25 │ │ svchi 0x00f0e8bd │ │ - ldc2 0, cr15, [lr, #-276]! @ 0xfffffeec │ │ + stc2 0, cr15, [ip, #-276] @ 0xfffffeec │ │ svclt 0x00042800 │ │ @ instruction: 0x71282001 │ │ svclt 0x0000e78c │ │ - andeq ip, sl, r8, ror #23 │ │ + andeq ip, sl, ip, lsr fp │ │ svcmi 0x00f0e92d │ │ stmdavc r1, {r0, r3, r4, r7, ip, sp, pc} │ │ andle r2, r2, #49152 @ 0xc000 │ │ pop {r0, r3, r4, ip, sp, pc} │ │ @ instruction: 0xd0158ff0 │ │ tstle ip, r4, lsl #18 │ │ @ instruction: 0x4702e9d0 │ │ @@ -16390,191 +16441,191 @@ │ │ strtmi r4, [r8], -r5, lsr #12 │ │ @ instruction: 0xffecf7ff │ │ svccc 0x00013518 │ │ ldmdavs r0!, {r0, r3, r4, r5, r6, r7, r8, ip, lr, pc}^ │ │ rscle r2, fp, r0, lsl #16 │ │ andslt r4, r9, r0, lsr #12 │ │ svcmi 0x00f0e8bd │ │ - ldclt 0, cr15, [r6, #-664] @ 0xfffffd68 │ │ + ldclt 0, cr15, [r8], #664 @ 0x298 │ │ stmdbcs r0, {r0, r6, fp, sp, lr} │ │ stmvs r0, {r1, r5, r6, r7, ip, lr, pc} │ │ pop {r0, r3, r4, ip, sp, pc} │ │ @ instruction: 0xf0a64ff0 │ │ - stmdavs r1, {r0, r2, r3, r8, sl, fp, ip, sp, pc}^ │ │ + stmdavs r1, {r0, r1, r2, r3, r5, r7, sl, fp, ip, sp, pc}^ │ │ stmdbeq r0, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ ldmib r0, {r0, r3, r6, r8, ip, sp, pc}^ │ │ stmib sp, {r1, sp}^ │ │ stmib sp, {r1, r2, r8, ip, pc}^ │ │ tstcs r1, r2, lsl #2 │ │ andls r9, r4, #8, 4 @ 0x80000000 │ │ tstcs r0, r1 │ │ @ instruction: 0xf10d2000 │ │ @ instruction: 0xf10d0828 │ │ @ instruction: 0xf10d0a04 │ │ svcge 0x000d0b58 │ │ tstls r5, r9 │ │ strbmi r9, [r0], -r1, lsl #2 │ │ - @ instruction: 0xf01c4651 │ │ - stcls 8, cr15, [sl], {181} @ 0xb5 │ │ + @ instruction: 0xf0014651 │ │ + @ instruction: 0x9c0af9ff │ │ adcsle r2, fp, r0, lsl #24 │ │ - bl 57d6c │ │ - bl 133240 │ │ + bl 57e38 │ │ + bl 13330c │ │ @ instruction: 0xf8d00085 │ │ stmdbcs r0, {r2, r3, r8, ip} │ │ @ instruction: 0xf500bf1e │ │ stmdavs r0, {r1, r2, r7, ip, sp, lr}^ │ │ - ldc 0, cr15, [r8, #-664]! @ 0xfffffd68 │ │ + ldcl 0, cr15, [sl], {166} @ 0xa6 │ │ strbeq lr, [r5, #2820] @ 0xb04 │ │ stmdacs r3, {r3, r5, fp, ip, sp, lr} │ │ andle sp, sl, r5, ror #7 │ │ tstle pc, r4, lsl #16 │ │ teqlt r6, lr, ror #17 │ │ strtmi r6, [r0], -ip, lsr #17 │ │ @ instruction: 0xff9af7ff │ │ mcrcc 4, 0, r3, cr1, cr8, {0} │ │ stmdavs r8!, {r0, r3, r4, r5, r6, r7, r8, ip, lr, pc}^ │ │ sbcsle r2, r6, r0, lsl #16 │ │ @ instruction: 0xf0a668a8 │ │ - ldrb lr, [r2, r2, lsr #26] │ │ + ldrb lr, [r2, r4, asr #25] │ │ cmplt r9, r9, ror #16 │ │ ldrdcs lr, [r2], -r5 │ │ tstls r2, sp, asr #19 │ │ smlabtls lr, sp, r9, lr │ │ andsls r2, r4, #1073741824 @ 0x40000000 │ │ and r9, r1, r0, lsl r2 │ │ andcs r2, r0, r0, lsl #2 │ │ tstls r1, r5, lsl r0 │ │ and r9, r2, sp, lsl #2 │ │ @ instruction: 0xf7ff1d28 │ │ @ instruction: 0x4658fd59 │ │ - @ instruction: 0xf01c4639 │ │ - ldcls 8, cr15, [r6], {115} @ 0x73 │ │ + @ instruction: 0xf0014639 │ │ + @ instruction: 0x9c16f9bd │ │ adcsle r2, r6, r0, lsl #24 │ │ - bl 57e20 │ │ - bl 1332c4 │ │ + bl 57eec │ │ + bl 133390 │ │ @ instruction: 0xf8d00085 │ │ stmdbcs r0, {r2, r3, r8, ip} │ │ @ instruction: 0xf500bf1e │ │ stmdavs r0, {r1, r2, r7, ip, sp, lr}^ │ │ - ldcl 0, cr15, [r6], #664 @ 0x298 │ │ + ldc 0, cr15, [r8], {166} @ 0xa6 │ │ strbeq lr, [r5, #2820] @ 0xb04 │ │ stmdacs r3, {r3, r5, fp, ip, sp, lr} │ │ andle sp, sl, r5, ror #7 │ │ bicsle r2, pc, r4, lsl #16 │ │ teqlt r6, lr, ror #17 │ │ strtmi r6, [r0], -ip, lsr #17 │ │ @ instruction: 0xff58f7ff │ │ mcrcc 4, 0, r3, cr1, cr8, {0} │ │ stmdavs r8!, {r0, r3, r4, r5, r6, r7, r8, ip, lr, pc}^ │ │ sbcsle r2, r6, r0, lsl #16 │ │ @ instruction: 0xf0a668a8 │ │ - ldrb lr, [r2, r0, ror #25] │ │ + ldrb lr, [r2, r2, lsl #25] │ │ stmdbcs r0, {r0, fp, sp, lr} │ │ stmdavs r0, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc}^ │ │ - ldcllt 0, cr15, [lr], #-664 @ 0xfffffd68 │ │ + stclt 0, cr15, [r0], #-664 @ 0xfffffd68 │ │ ldrble r4, [r4], #1904 @ 0x770 │ │ tstcs r1, r2, lsl #16 │ │ svclt 0x00482a00 │ │ smlabbmi r0, r2, r0, pc @ │ │ ldmdale ip, {r4, r8, fp, sp} │ │ @ instruction: 0xf001e8df │ │ ldmdbeq r1, {r0, r3, r8, fp} │ │ stmdbeq r9, {r0, r3, r8, fp} │ │ stmdbeq sl, {r0, r3, r8, fp} │ │ stmdbeq sl, {r0, r3, r9, fp} │ │ ldrbmi r0, [r0, -r9]! │ │ stmdbcs r0, {r0, r6, fp, sp, lr} │ │ strdcs sp, [r8, -fp] │ │ @ instruction: 0xf0a65840 │ │ - ldrlt fp, [r0, #-3169] @ 0xfffff39f │ │ + ldrlt fp, [r0, #-3075] @ 0xfffff3fd │ │ strtmi r6, [r0], -r4, asr #16 │ │ @ instruction: 0xffe0f7ff │ │ pop {r5, r9, sl, lr} │ │ @ instruction: 0xf0a64010 │ │ - bcs 60fc0 │ │ + bcs 60f14 │ │ ldrbmi fp, [r0, -r8, lsl #30]! │ │ stmdapl r0, {r2, r8, sp}^ │ │ - mrrclt 0, 10, pc, r0, cr6 @ │ │ + bllt ffcee1d4 │ │ strdlt fp, [r1], r0 │ │ ldm pc, {r0, fp, ip, sp, lr}^ @ │ │ andsne pc, r0, r1 │ │ andsne r1, r0, r0, lsl r0 │ │ andsne r1, r2, #-536870911 @ 0xe0000001 │ │ andsne r1, r0, r2, lsl r0 │ │ andsne r1, lr, #16 │ │ andsne r1, r2, r2, lsl r2 │ │ - bvs c816d4 │ │ + bvs c817a0 │ │ mrcpl 0, 0, r1, cr12, cr12, {0} │ │ andlt r4, r1, r4, asr sl │ │ stmdavs r1, {r4, r5, r6, r7, r8, sl, fp, ip, sp, pc}^ │ │ rscsle r2, sl, r0, lsl #18 │ │ strtmi r6, [r0], -r4, lsl #17 │ │ pop {r0, ip, sp, pc} │ │ @ instruction: 0xf0a640f0 │ │ - stmdavs r4, {r0, r1, r2, r3, r5, sl, fp, ip, sp, pc}^ │ │ + stmdavs r4, {r0, r4, r6, r7, r8, r9, fp, ip, sp, pc}^ │ │ stmdavs r1, {r1, r6, sp, lr, pc}^ │ │ andle r0, r5, r9, asr #32 │ │ strmi r6, [r4], -r1, lsl #17 │ │ @ instruction: 0xf0a64608 │ │ - strtmi lr, [r0], -r0, lsl #25 │ │ + strtmi lr, [r0], -r2, lsr #24 │ │ subeq r6, r9, r1, lsl #18 │ │ stmdbvs r4, {r0, r2, r5, r6, r7, ip, lr, pc}^ │ │ andlt r4, r1, r0, lsr #12 │ │ ldrhtmi lr, [r0], #141 @ 0x8d │ │ - ldclt 0, cr15, [sl], {166} @ 0xa6 │ │ + bllt fef6e240 │ │ @ instruction: 0x4702e9d0 │ │ svccs 0x00004606 │ │ @ instruction: 0x4625d03e │ │ @ instruction: 0xf7ff4628 │ │ strbcc pc, [r8, #-4033] @ 0xfffff03f @ │ │ mvnsle r3, r1, lsl #30 │ │ ldmib r0, {r1, r2, r4, r5, sp, lr, pc}^ │ │ strmi r4, [r6], -r2, lsl #14 │ │ @ instruction: 0x4625b397 │ │ @ instruction: 0xf7ff4628 │ │ strbcc pc, [r8, #-4021] @ 0xfffff04b @ │ │ mvnsle r3, r1, lsl #30 │ │ - blvs a9fb8 │ │ + blvs aa084 │ │ sbcle r2, r2, r0, lsl #18 │ │ strtmi r6, [r0], -r4, asr #22 │ │ pop {r0, ip, sp, pc} │ │ @ instruction: 0xf0a640f0 │ │ - blvs a0f00 │ │ - blvs 109e3cc │ │ + blvs a0e54 │ │ + blvs 109e498 │ │ strmi r4, [r8], -r4, lsl #12 │ │ - mcrr 0, 10, pc, sl, cr6 @ │ │ + bl ffb6e294 │ │ stcvs 6, cr4, [r4], {32} │ │ stmvs r4, {r1, sp, lr, pc} │ │ adcle r2, lr, r0, lsl #24 │ │ @ instruction: 0xf7ff4620 │ │ qadd8mi pc, r0, r7 @ │ │ pop {r0, ip, sp, pc} │ │ @ instruction: 0xf0a640f0 │ │ - ldmib r0, {r0, r5, r6, r7, r8, r9, fp, ip, sp, pc}^ │ │ + ldmib r0, {r0, r1, r7, r8, r9, fp, ip, sp, pc}^ │ │ strmi r4, [r6], -r2, lsl #14 │ │ @ instruction: 0x4625b137 │ │ @ instruction: 0xf7ff4628 │ │ strbcc pc, [r8, #-3977] @ 0xfffff077 @ │ │ mvnsle r3, r1, lsl #30 │ │ stmdacs r0, {r4, r5, r6, fp, sp, lr} │ │ @ instruction: 0x4620d097 │ │ pop {r0, ip, sp, pc} │ │ @ instruction: 0xf0a640f0 │ │ - push {r0, r2, r3, r6, r7, r8, r9, fp, ip, sp, pc} │ │ + push {r0, r1, r2, r3, r5, r6, r8, r9, fp, ip, sp, pc} │ │ strdlt r4, [r3], r0 │ │ stmdbvs r0, {r2, r9, sl, lr}^ │ │ svchi 0x005bf3bf │ │ svcne 0x0000e850 │ │ stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ - blcs 3ab90 │ │ + blcs 3ac5c │ │ stmdbcs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ vaddw.u , , d4 │ │ stmdbvs r0!, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ - @ instruction: 0xf8f3f001 │ │ - bleq 6c6f4 │ │ + @ instruction: 0xf971f001 │ │ + bleq 6c7c0 │ │ svchi 0x005bf3bf │ │ suble r2, r5, r0, lsl #16 │ │ @ instruction: 0xf0402801 │ │ @ instruction: 0xf10b80ab │ │ ldmda r0, {r2, r7}^ │ │ cdpne 15, 4, cr1, cr10, cr0, {0} │ │ movwcs lr, #2112 @ 0x840 │ │ @@ -16582,196 +16633,196 @@ │ │ vtbl.8 d2, {d15-d16}, d1 │ │ @ instruction: 0xf0408f5b │ │ @ instruction: 0xf10b814a │ │ vabal.u q0, d15, d16 │ │ ldmda r5, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ @ instruction: 0xf0400f00 │ │ stmda r5, {r0, r8}^ │ │ - bcs 367e4 │ │ + bcs 368b0 │ │ @ instruction: 0x07c0d1f7 │ │ svchi 0x005bf3bf │ │ msrhi CPSR_s, r0, asr #32 │ │ @ instruction: 0xf04f6828 │ │ strcs r0, [r0], -r0, lsl #20 │ │ svchi 0x005bf3bf │ │ @ instruction: 0xf01143c1 │ │ @ instruction: 0xf0400f3e │ │ strcs r8, [r1], #-207 @ 0xffffff31 │ │ and r2, ip, r0, lsl #14 │ │ - stc 0, cr15, [r2], {166} @ 0xa6 │ │ + bl fe96e374 │ │ strtmi r6, [r7], #-2088 @ 0xfffff7d8 │ │ strcc r3, [r1], -r2, lsl #8 │ │ svchi 0x005bf3bf │ │ @ instruction: 0xf01143c1 │ │ @ instruction: 0xf0400f3e │ │ mcrcs 0, 0, r8, cr7, cr15, {5} │ │ mcrcs 2, 0, sp, cr0, cr0, {7} │ │ @ instruction: 0x4638d0f0 │ │ svclt 0x00103801 │ │ @ instruction: 0xe7ebd1fc │ │ adceq pc, r4, fp, lsl #2 │ │ svcne 0x0000e850 │ │ stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ - blcs 3ac48 │ │ + blcs 3ad14 │ │ stmdbcs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ svchi 0x005bf3bf │ │ tstphi r7, r0, asr #32 @ p-variant is OBSOLETE │ │ ldrdeq pc, [r8], #-139 @ 0xffffff75 │ │ msreq CPSR_, fp, lsl #2 │ │ svchi 0x005bf3bf │ │ svcmi 0x0000e851 │ │ andeq lr, r0, #68, 20 @ 0x44000 │ │ movwcs lr, #2113 @ 0x841 │ │ mvnsle r2, r0, lsl #22 │ │ svchi 0x005bf3bf │ │ ldrdeq pc, [r8], #-139 @ 0xffffff75 │ │ tstle r5, r0, lsr #4 │ │ subeq pc, ip, fp, lsl #2 │ │ - blx 1d70056 │ │ + blx a70122 │ │ ldrdeq pc, [r8], #-139 @ 0xffffff75 │ │ ldrdpl pc, [r0], -fp │ │ stmdaeq r0, {r2, r5, r9, fp, sp, lr, pc} │ │ and r2, r4, r0, lsl #14 │ │ - bl fefee330 │ │ + bl 186e3fc │ │ @ instruction: 0xf8db3701 │ │ stmdacc r1, {r3, r6} │ │ @ instruction: 0x1094f8db │ │ @ instruction: 0xf8db4028 │ │ tsteq r3, r4, asr #32 │ │ stclne 8, cr5, [fp], #-816 @ 0xfffffcd0 │ │ svchi 0x005bf3bf │ │ tstle fp, r3, lsr #5 │ │ ldrdcc pc, [r0], #-139 @ 0xffffff75 │ │ - bl 791d8 │ │ + bl 792a4 │ │ addsmi r1, lr, #0 │ │ subsmi fp, r2, #33, 30 @ 0x84 │ │ @ instruction: 0xf8db402a │ │ ldmne ip, {r2, r6, ip, sp} │ │ @ instruction: 0x5601e9d0 │ │ stmdbcs r0, {r0, r4, r5, fp, sp, lr} │ │ qadd16mi fp, r8, ip │ │ ldmdavs r0!, {r3, r7, r8, r9, sl, lr}^ │ │ @ instruction: 0x4628b110 │ │ - bl 1bee380 │ │ + bl 46e44c │ │ @ instruction: 0xf8db4625 │ │ ldrb r0, [r6, r8, asr #32] │ │ eorsle r4, r2, r8, lsr #11 │ │ sbcle r2, sp, #7, 30 │ │ sbcle r2, sp, r0, lsl #30 │ │ @ instruction: 0xf007fb07 │ │ svclt 0x00103801 │ │ @ instruction: 0xe7c7d1fc │ │ andeq pc, r4, fp, lsl #2 │ │ svcne 0x0000e850 │ │ stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ - blcs 3ad18 │ │ + blcs 3ade4 │ │ stmdbcs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ svchi 0x005bf3bf │ │ addshi pc, pc, r0, asr #32 │ │ andeq pc, r8, fp, lsl #2 │ │ - @ instruction: 0xf924f7f3 │ │ + @ instruction: 0xf8d8f7f3 │ │ subeq pc, r4, fp, lsl #2 │ │ vsubl.u q1, d15, d1 │ │ ldm r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ stmia r0, {r0, r1, r2, r3, r6, r8, r9, sl, fp, ip}^ │ │ - blcs 3de4c │ │ + blcs 3df18 │ │ stmdbcs r0, {r0, r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ svchi 0x005bf3bf │ │ addhi pc, fp, r0 │ │ andseq pc, r0, fp, lsl #2 │ │ - blx fe26e2ee │ │ + blx 3ee3ba │ │ eoreq pc, r8, fp, lsl #2 │ │ @ instruction: 0xf10be01c │ │ andcs r0, r1, #168 @ 0xa8 │ │ svchi 0x005bf3bf │ │ svcne 0x004fe8d0 │ │ svccs 0x0043e8c0 │ │ mvnsle r2, r0, lsl #22 │ │ vtbl.8 d2, {d15-d16}, d0 │ │ rsbsle r8, r4, fp, asr pc │ │ @ instruction: 0x0098f8db │ │ svclt 0x001c2800 │ │ @ instruction: 0x0094f8db │ │ - bl 7ee420 │ │ + b ff06e4ec │ │ subseq pc, r4, fp, lsl #2 │ │ - blx 1aee32a │ │ + blx ffc6e3f4 │ │ rsbseq pc, r8, fp, lsl #2 │ │ - blx 19ee332 │ │ + blx ffb6e3fc │ │ andlt r4, r3, r8, asr r6 │ │ svcmi 0x00f0e8bd │ │ - blt fedee43c │ │ + blt 166e508 │ │ ldrdls pc, [r0], -fp │ │ streq pc, [r4, -fp, lsl #2] │ │ svchi 0x005bf3bf │ │ ldmdaeq r0, {r0, r1, r2, r3, r6, r9, fp, sp, lr, pc}^ │ │ svchi 0x005bf3bf │ │ svcpl 0x0000e857 │ │ andge lr, r0, r7, asr #16 │ │ mvnsle r2, r0, lsl #16 │ │ - beq 16acb04 │ │ + beq 16acbd0 │ │ svchi 0x005bf3bf │ │ @ instruction: 0xf8cd45d0 │ │ eorle r8, r5, r4 │ │ - blx 1e0e6e │ │ + blx 1e0f3a │ │ rsbseq pc, r0, r6, lsl #8 │ │ stmdaeq r1, {r8, ip, sp, lr, pc} │ │ andls pc, r0, sp, asr #17 │ │ stmdbeq r0, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ andle r2, r5, #7, 28 @ 0x70 │ │ @ instruction: 0x4620b136 │ │ svclt 0x00103801 │ │ strd sp, [r1], -ip │ │ - bl 36e494 │ │ + b febee560 │ │ vrsubhn.i d3, , │ │ ldmda r7, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ stmda r7, {r8, r9, sl, fp, ip, lr}^ │ │ stmdacs r0, {ip, pc} │ │ strbmi sp, [r4], #-505 @ 0xfffffe07 │ │ stmdaeq r2, {r3, r8, ip, sp, lr, pc} │ │ @ instruction: 0xf3bf2d00 │ │ rscle r8, r5, fp, asr pc │ │ stmdals r0, {r0, r2, r3, r4, r6, r7, r8, fp, sp, lr, pc} │ │ teqle r6, r2, asr #11 │ │ @ instruction: 0x4628b115 │ │ - b ff36e4c4 │ │ + b 1bee590 │ │ andeq pc, r1, r9, lsr #32 │ │ svchi 0x005bf3bf │ │ andeq pc, r0, fp, asr #17 │ │ addeq pc, r8, fp, lsl #2 │ │ vsubl.u q1, d15, d1 │ │ ldm r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ stmia r0, {r0, r1, r2, r3, r6, r8, r9, sl, fp, ip}^ │ │ - blcs 3df58 │ │ + blcs 3e024 │ │ stmdbcs r0, {r0, r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ svchi 0x005bf3bf │ │ @ instruction: 0xf8cdbf1e │ │ @ instruction: 0xf10db008 │ │ @ instruction: 0xf7ff0008 │ │ andlt pc, r3, r0, asr ip @ │ │ svchi 0x00f0e8bd │ │ ldrsbeq pc, [r0, #133]! @ 0x85 @ │ │ svchi 0x005bf3bf │ │ eorsle r2, pc, r0, lsl #16 │ │ ldrsbeq pc, [r0, #133]! @ 0x85 @ │ │ vrsubhn.i d4, , q15 │ │ @ instruction: 0x46058f5b │ │ @ instruction: 0xf0a64630 │ │ - @ instruction: 0xf109eaa0 │ │ - b 13f4694 │ │ + @ instruction: 0xf109ea42 │ │ + b 13f4760 │ │ ldrbmi r0, [r0, #2649] @ 0xa59 │ │ @ instruction: 0xf00ad0c8 │ │ ldmdacs pc, {r0, r1, r2, r3, r4} @ │ │ - bl 1a6634 │ │ + bl 1a6700 │ │ @ instruction: 0xf8d81800 │ │ vaddl.u q0, d15, d12 │ │ @ instruction: 0x07c08f5b │ │ strcs sp, [r1], #-279 @ 0xfffffee9 │ │ strcs r2, [r0], -r0, lsl #14 │ │ @ instruction: 0xf0a6e00a │ │ - @ instruction: 0xf8d8eab0 │ │ + @ instruction: 0xf8d8ea52 │ │ strtmi r0, [r7], #-12 │ │ strcc r3, [r1], -r2, lsl #8 │ │ svchi 0x005bf3bf │ │ smlabtle r8, r0, r7, r0 │ │ rscsle r2, r2, #7, 28 @ 0x70 │ │ rscsle r2, r2, r0, lsl #28 │ │ stmdacc r1, {r3, r4, r5, r9, sl, lr} │ │ @@ -16781,52 +16832,53 @@ │ │ svclt 0x001c2900 │ │ @ instruction: 0x47884630 │ │ ldrdhi pc, [r4], -sp │ │ stmdacs r0, {r5, r6, fp, sp, lr} │ │ strb sp, [r8, r6, asr #3] │ │ strcs r2, [r0], -r1, lsl #8 │ │ and r2, sl, r0, lsl #14 │ │ - b fe2ee598 │ │ + b b6e664 │ │ ldrsbeq pc, [r0, #133]! @ 0x85 @ │ │ strcc r4, [r2], #-1062 @ 0xfffffbda │ │ stmdacs r0, {r0, r8, r9, sl, ip, sp} │ │ svchi 0x005bf3bf │ │ svccs 0x0007d1b0 │ │ svccs 0x0000d2f2 │ │ @ instruction: 0x4630d0f2 │ │ svclt 0x00103801 │ │ @ instruction: 0xe7edd1fc │ │ + ldrble sp, [r4], #1236 @ 0x4d4 │ │ addlt fp, r4, r0, ror r5 │ │ stmdavs r0, {r2, r9, sl, lr} │ │ stmdavc r0, {r0, r2, r3, r9, sl, lr} │ │ @ instruction: 0xf000e8df │ │ stmdacs r8!, {r0, r1, r8, r9} │ │ stmdavs r6!, {r0, r1, r2, r3, r5, r6, fp, sp, lr}^ │ │ @ instruction: 0xf8964628 │ │ ldmibvs r1!, {r5, sp}^ │ │ - blx 6ee3a6 │ │ + ldc2 0, cr15, [r6], #-92 @ 0xffffffa4 │ │ stmiavs r0!, {r5, r8, r9, fp, ip, sp, pc} │ │ tstcc r1, r1, lsl #16 │ │ @ instruction: 0xf8966001 │ │ stmdacc r2, {r5} │ │ ldmdale fp, {r0, r1, fp, sp} │ │ @ instruction: 0xf000e8df │ │ stmdbhi r0!, {r1, r8, r9, ip, sp, pc}^ │ │ stmiavs r9!, {r4, r5, r6, r7, r8, fp, sp, lr} │ │ vhsub.s8 d20, d16, d1 │ │ stmdavs r9!, {r1, r2, r5, r8, pc}^ │ │ @ instruction: 0xf0c04281 │ │ - bne 2d2904 │ │ + bne 2d29d4 │ │ vpmax.s8 d18, d0, d3 │ │ stmdavs r9!, {r0, r1, r2, r3, r6, r8, pc} │ │ tst ip, r9, lsl #16 │ │ strtmi r6, [r8], -r6, ror #16 │ │ mlacs r0, r6, r8, pc @ │ │ @ instruction: 0xf01769f1 │ │ - @ instruction: 0xb110faf5 │ │ + tstplt r0, r1, lsl ip @ p-variant is OBSOLETE │ │ andlt r2, r4, r1 │ │ stmiavs r0!, {r4, r5, r6, r8, sl, fp, ip, sp, pc} │ │ tstcc r1, r1, lsl #16 │ │ @ instruction: 0xf8966001 │ │ stmdacc r2, {r5} │ │ ldmle r3!, {r0, r1, fp, sp}^ │ │ @ instruction: 0xf000e8df │ │ @@ -16834,15 +16886,15 @@ │ │ @ instruction: 0xf04f68e3 │ │ ldmibvs r0!, {sl, fp, lr}^ │ │ ldmib r3, {r0, r3, r5, r7, fp, sp, lr}^ │ │ addmi r6, r1, #0, 8 │ │ tstpmi r0, pc, asr #32 @ p-variant is OBSOLETE │ │ stmdavs r9!, {r0, r3, r8, fp, ip, lr, pc}^ │ │ @ instruction: 0xf0c04281 │ │ - bne 2d28a8 │ │ + bne 2d2978 │ │ vpmax.s8 d18, d0, d3 │ │ stmdavs r9!, {r0, r5, r8, pc} │ │ ldmdane r2!, {r0, r3, fp, ip, lr}^ │ │ rscvc lr, r1, r4, lsl #21 │ │ mvnvc lr, r4, asr #22 │ │ streq lr, [r1], -r4, lsl #21 │ │ andeq lr, r0, r6, lsr sl │ │ @@ -16858,241 +16910,241 @@ │ │ tstcc r1, r1, lsl #16 │ │ andcs r6, r1, r1 │ │ ldcllt 0, cr11, [r0, #-16]! │ │ stmiavs r9!, {r4, r5, r6, r7, r8, fp, sp, lr} │ │ vhsub.s8 d20, d16, d1 │ │ stmdavs r9!, {r0, r1, r5, r7, pc}^ │ │ @ instruction: 0xf0c04281 │ │ - bne 2d2820 │ │ + bne 2d28f0 │ │ vpmax.s8 d18, d0, d7 │ │ stmdavs sl!, {r0, r1, r3, r5, r6, r7, pc} │ │ ldrmi r5, [r0], #-2065 @ 0xfffff7ef │ │ adcs r6, sp, r0, asr #16 │ │ @ instruction: 0xf04f68e3 │ │ ldmibvs r0!, {sl, fp, lr}^ │ │ strvs lr, [r0], #-2515 @ 0xfffff62d │ │ addmi r6, r1, #11075584 @ 0xa90000 │ │ addshi pc, r0, r0, asr #4 │ │ addmi r6, r1, #6881280 @ 0x690000 │ │ rschi pc, r4, r0, asr #1 │ │ - bcs 1f8c8c │ │ + bcs 1f8d5c │ │ sbcshi pc, r4, r0, asr #4 │ │ ldmdapl r1, {r1, r3, r5, fp, sp, lr} │ │ stmdavs r0, {r4, sl, lr}^ │ │ ldmibvs r0!, {r0, r2, r7, sp, lr, pc}^ │ │ addmi r6, r1, #11075584 @ 0xa90000 │ │ stmdavs r9!, {r3, r4, r5, r8, fp, ip, lr, pc}^ │ │ @ instruction: 0xf0c04281 │ │ - bne 2d27e4 │ │ + bne 2d28b4 │ │ vpmax.s8 d18, d0, d7 │ │ stmdavs r9!, {r0, r1, r6, r7, pc} │ │ strmi r5, [r8], #-2058 @ 0xfffff7f6 │ │ stmib sp, {r6, fp, sp, lr}^ │ │ ldcl 0, cr2, [sp] │ │ eor r0, r9, r0, lsl #22 │ │ stmiavs r9!, {r4, r5, r6, r7, r8, fp, sp, lr} │ │ ldmdble lr!, {r0, r7, r9, lr}^ │ │ addmi r6, r1, #6881280 @ 0x690000 │ │ sbchi pc, r3, r0, asr #1 │ │ - bcs 1f8cd8 │ │ + bcs 1f8da8 │ │ adchi pc, lr, r0, asr #4 │ │ stmdapl sl, {r0, r3, r5, fp, sp, lr} │ │ stmdavs r0, {r3, sl, lr}^ │ │ andcs lr, r2, sp, asr #19 │ │ - bleq edc38 │ │ + bleq edd08 │ │ ldmibvs r0!, {r0, r1, r2, r3, r5, r6, sp, lr, pc}^ │ │ addmi r6, r1, #11075584 @ 0xa90000 │ │ stmdavs r9!, {r1, r2, r3, r8, fp, ip, lr, pc}^ │ │ @ instruction: 0xf0c04281 │ │ - bne 2d27b8 │ │ + bne 2d2888 │ │ vpmax.s8 d18, d0, d3 │ │ stmdavs r9!, {r0, r1, r2, r3, r4, r7, pc} │ │ cdp 8, 0, cr5, cr0, cr8, {0} │ │ vmrs r0, mvfr0 │ │ and r0, r1, r0, asr #21 │ │ - bleq 16adc6c │ │ - bl c6d63c │ │ + bleq 16add3c │ │ + bl c6d70c │ │ @ instruction: 0x3c04e9d4 │ │ strvs lr, [r0, #-2524] @ 0xfffff624 │ │ ldmdavc fp, {r2, r3, r5, r6, r7, r8, r9, sl, ip} │ │ subseq lr, r4, pc, asr sl │ │ andeq lr, r5, r0, lsl #21 │ │ ldreq lr, [r4, #-2639]! @ 0xfffff5b1 │ │ - b 17f8460 │ │ - b fe072a64 │ │ - b fe172920 │ │ - b 13f2d34 │ │ - b fe1335f0 │ │ - bne fed33d5c │ │ + b 17f8530 │ │ + b fe072b34 │ │ + b fe1729f0 │ │ + b 13f2e04 │ │ + b fe1336c0 │ │ + bne fed33e2c │ │ streq pc, [r0, #-79] @ 0xffffffb1 │ │ streq lr, [r0], #-2929 @ 0xfffff48f │ │ streq pc, [r0], #-79 @ 0xffffffb1 │ │ strcs fp, [r1], #-4024 @ 0xfffff048 │ │ @ instruction: 0x41881b92 │ │ strcs fp, [r1, #-4024] @ 0xfffff048 │ │ sbclt r1, r0, #40, 22 @ 0xa000 │ │ svclt 0x00084298 │ │ - bleq 6dc78 │ │ + bleq 6dd48 │ │ andlt r2, r4, r1 │ │ ldmibvs r0!, {r4, r5, r6, r8, sl, fp, ip, sp, pc}^ │ │ addmi r6, r1, #11075584 @ 0xa90000 │ │ stmdavs r9!, {r4, r6, r8, fp, ip, lr, pc}^ │ │ cmnle r4, #268435464 @ 0x10000008 │ │ - bcs f8d88 │ │ + bcs f8e58 │ │ stmdavs r9!, {r2, r3, r4, r6, r8, fp, ip, lr, pc} │ │ cdp 8, 0, cr5, cr0, cr8, {0} │ │ vmrs r0, mvfr0 │ │ sub r0, r5, r0, asr #21 │ │ andmi pc, r0, pc, asr #32 │ │ eor r2, r3, r0, lsl #2 │ │ @ instruction: 0xf04f2100 │ │ stmibne r9, {lr} │ │ andeq lr, r0, #132, 20 @ 0x84000 │ │ - b fe142b08 │ │ - b db3d8c │ │ + b fe142bd8 │ │ + b db3e5c │ │ strmi r0, [r2], -r2, lsl #4 │ │ - b fe3622a4 │ │ + b fe362374 │ │ strbne r7, [r1, r2, ror #5] │ │ andne lr, r0, #3194880 @ 0x30c000 │ │ andlt r2, r4, r1 │ │ - ldcl 13, cr11, [pc, #448] @ 32764 │ │ + ldcl 13, cr11, [pc, #448] @ 32834 │ │ stmdbvs r0!, {r2, r3, r5, r8, r9, fp}^ │ │ - blne 6dcec │ │ - bleq fe8adf70 │ │ - bleq 6dcb4 │ │ + blne 6ddbc │ │ + bleq fe8ae040 │ │ + bleq 6dd84 │ │ andlt r2, r4, r1 │ │ @ instruction: 0xf04fbd70 │ │ strbne r4, [r8, r0, lsl #2] │ │ movwcs lr, #14804 @ 0x39d4 │ │ @ instruction: 0xf8932600 │ │ ldmib r2, {lr, pc}^ │ │ - blne 13075d0 │ │ + blne 13076a0 │ │ movweq lr, #19312 @ 0x4b70 │ │ movweq pc, #79 @ 0x4f @ │ │ movwcs fp, #8120 @ 0x1fb8 │ │ - bl 1d38f94 │ │ + bl 1d39064 │ │ svclt 0x00b80500 │ │ - bne ffcfbdec │ │ + bne ffcfbebc │ │ strbmi fp, [r3, #-731]! @ 0xfffffd25 │ │ stmib r2, {r3, r8, r9, sl, fp, ip, sp, pc}^ │ │ andcs r1, r1, r0 │ │ ldcllt 0, cr11, [r0, #-16]! │ │ - bleq 5edd78 │ │ + bleq 5ede48 │ │ @ instruction: 0xedd06960 │ │ vadd.f64 d17, d1, d0 │ │ vstr d16, [r0, #640] @ 0x280 │ │ andcs r0, r1, r0, lsl #22 │ │ ldcllt 0, cr11, [r0, #-16]! │ │ andcs r4, r0, r3, lsl fp │ │ ldrbtmi r2, [fp], #-264 @ 0xfffffef8 │ │ - @ instruction: 0xf9c8f00d │ │ + blx ff96e720 │ │ andcs r4, r0, pc, lsl #22 │ │ ldrbtmi r2, [fp], #-260 @ 0xfffffefc │ │ - @ instruction: 0xf9c2f00d │ │ + blx ff7ee72c │ │ @ instruction: 0x460a4b10 │ │ @ instruction: 0xf00d447b │ │ - blmi 430d28 │ │ + blmi 431268 │ │ ldrbtmi r4, [fp], #-1546 @ 0xfffff9f6 │ │ - @ instruction: 0xf9b8f00d │ │ + blx ff56e740 │ │ strmi r4, [sl], -r9, lsl #22 │ │ @ instruction: 0xf00d447b │ │ - blmi 270d14 │ │ + blmi 271254 │ │ ldrbtmi r4, [fp], #-1546 @ 0xfffff9f6 │ │ - @ instruction: 0xf9aef00d │ │ + blx ff2ee754 │ │ svclt 0x0000bf00 │ │ andeq r0, r0, r0 │ │ svcvc 0x00f80000 │ │ - andeq r8, sl, lr, lsl r4 │ │ - andeq r8, sl, sl, lsr r4 │ │ - ldrdeq r8, [sl], -r0 │ │ - andeq r8, sl, r6, lsl #18 │ │ - andeq r8, sl, r4, lsl #20 │ │ - andeq r8, sl, sl, lsr #18 │ │ + andeq r8, sl, lr, asr r3 │ │ + andeq r8, sl, sl, ror r3 │ │ + andeq r8, sl, r0, lsl r9 │ │ + andeq r8, sl, r6, asr #16 │ │ + andeq r8, sl, r4, asr #18 │ │ + andeq r8, sl, sl, ror #16 │ │ svcmi 0x00f0e92d │ │ ldrmi fp, [r1], r9, lsl #1 │ │ stmdbvc r9, {r1, r3, r9, sl, lr} │ │ stmdbcs r2, {r0, r2, r3, r4, r9, sl, lr} │ │ stmdbcs r3, {r0, r2, r3, r5, ip, lr, pc} │ │ ldmibvs r6, {r3, r4, r5, r8, ip, lr, pc} │ │ svcne 0x0000e856 │ │ stmda r6, {r0, r1, r3, r6, sl, fp, ip}^ │ │ svccs 0x00003700 │ │ stmdbcs r0, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ addhi pc, r5, r0, lsl #2 │ │ @ instruction: 0x8702e9d2 │ │ - bmi 16cdf0 │ │ + bmi 16cec0 │ │ svceq 0x0000f1b8 │ │ @ instruction: 0xf1b8d032 │ │ tstle sl, r1, lsl #30 │ │ orreq pc, r0, r7, lsl #2 │ │ ldmda r1, {r2, r5, r7, r9, sl, lr}^ │ │ mrrcne 15, 0, r2, r3, cr0 │ │ strcc lr, [r0], #-2113 @ 0xfffff7bf │ │ mvnsle r2, r0, lsl #24 │ │ ldmda r7, {r1, r2, r3, r5, sp, lr, pc}^ │ │ mcrrne 15, 0, r1, sl, cr0 │ │ movwcs lr, #2119 @ 0x847 │ │ mvnsle r2, r0, lsl #22 │ │ svccc 0x00fff1b1 │ │ @ instruction: 0xf044dc28 │ │ - stmdavs r9!, {r3, r4, r5, r6, r9, sl, fp, ip, sp, lr, pc} │ │ + stmdavs r9!, {r2, r6, r9, sl, fp, ip, sp, lr, pc} │ │ vsubl.s8 q9, d8, d9 │ │ andvs r0, r2, r0, lsl #4 │ │ strbmi fp, [r8], -r9, lsl #2 │ │ stmdavs r8!, {r3, r7, r8, r9, sl, lr}^ │ │ andlt fp, r9, r0, asr #18 │ │ svchi 0x00f0e8bd │ │ strbmi r6, [r9], -fp, ror #17 │ │ stmdavs r8!, {r3, r4, r7, r8, r9, sl, lr}^ │ │ rscsle r2, r6, r0, lsl #16 │ │ andlt r4, r9, r8, asr #12 │ │ svcmi 0x00f0e8bd │ │ - svclt 0x00fef0a5 │ │ + svclt 0x009ef0a5 │ │ lsleq pc, r7, #2 @ │ │ ldmda r1, {r2, r5, r7, r9, sl, lr}^ │ │ mrrcne 15, 0, r2, r3, cr0 │ │ strcc lr, [r0], #-2113 @ 0xfffff7bf │ │ mvnsle r2, r0, lsl #24 │ │ @ instruction: 0xf1b24664 │ │ ldclle 15, cr3, [r6, #1020] @ 0x3fc │ │ andscs r4, r8, r3, lsl #13 │ │ - ldmda lr, {r1, r2, r5, r7, ip, sp, lr, pc}^ │ │ + stmda r6, {r1, r2, r5, r7, ip, sp, lr, pc} │ │ ldmdbmi ip, {r4, r8, r9, ip, sp, pc} │ │ stmib r0, {r9, sp}^ │ │ - blge 1c4f44 │ │ + blge 1c5014 │ │ stmib r0, {r0, r3, r4, r5, r6, sl, lr}^ │ │ tstvs r5, r2, lsl #18 │ │ smlabteq r6, sp, r9, lr │ │ @ instruction: 0xf88da802 │ │ strbmi r2, [r1], -r0, lsr #32 │ │ @ instruction: 0xf7f2463a │ │ - @ instruction: 0xf89df929 │ │ + @ instruction: 0xf89df8db │ │ stmdacs r2, {r4} │ │ @ instruction: 0x4640d110 │ │ @ instruction: 0xf7ff4639 │ │ - andcs pc, r9, sl, lsl #18 │ │ + andcs pc, r9, r8, lsl #18 │ │ andeq pc, r0, r8, asr #5 │ │ @ instruction: 0xf8cb3008 │ │ andlt r0, r9, r0 │ │ svchi 0x00f0e8bd │ │ tstcs r8, r8 │ │ - blx 152e7b6 │ │ + stc2l 0, cr15, [pc], #-44 @ 3282c │ │ @ instruction: 0xf10daf02 │ │ svcgt 0x00860c18 │ │ - blmi 2447b0 │ │ + blmi 244880 │ │ ldrbtmi r4, [r8], #-3080 @ 0xfffff3f8 │ │ addeq lr, r6, ip, lsl #17 │ │ - bge 1c398c │ │ + bge 1c3a5c │ │ ldrbtmi r2, [ip], #-299 @ 0xfffffed5 │ │ @ instruction: 0xf00e9400 │ │ - cdple 14, 15, cr15, cr14, cr5, {4} │ │ - andeq r7, sl, r8, lsr sl │ │ - @ instruction: 0xfffe6cf1 │ │ - andeq r7, sl, r0, lsr #18 │ │ - andeq r7, sl, sl, asr #19 │ │ + cdple 15, 15, cr15, cr14, cr1, {5} │ │ + andeq r7, sl, r8, asr r9 │ │ + @ instruction: 0xfffe6c21 │ │ + muleq sl, r0, r8 │ │ + andeq r7, sl, sl, lsl #18 │ │ @ instruction: 0x4604b570 │ │ andeq lr, r3, r2, asr sl │ │ @ instruction: 0xf647d02c │ │ stmdavs lr, {r0, r2, r4, r6, lr} │ │ subvc pc, sl, r7, asr #13 │ │ cmpmi r0, #212992 @ 0x34000 │ │ addmi r4, r5, #48 @ 0x30 │ │ @@ -17106,66 +17158,66 @@ │ │ ldmdbcc r8, {r3, r4, r8, r9, sl, fp, sp, lr} │ │ subsmi r6, r6, r5, asr #16 │ │ @ instruction: 0x432e405d │ │ strdcc sp, [r8], -r6 │ │ stmvs r2, {r2, r8, fp, ip, pc} │ │ stmdale pc, {r1, r3, r7, r9, lr} @ │ │ @ instruction: 0x26182018 │ │ - svc 0x00f0f0a5 │ │ + svc 0x0098f0a5 │ │ ldmdbmi ip, {r4, r5, r6, r8, r9, ip, sp, pc} │ │ andscs r4, r8, #5242880 @ 0x500000 │ │ ands r4, sl, r9, ror r4 │ │ subeq pc, ip, r1, lsl #2 │ │ stmvs r2, {r2, r8, fp, ip, pc} │ │ stmible pc!, {r1, r3, r7, r9, lr}^ @ │ │ - bl 8c930 │ │ + bl 8ca00 │ │ andcs r0, sl, #1073741856 @ 0x40000020 │ │ sbceq lr, r1, r0, lsl #22 │ │ andeq pc, r0, #200, 4 @ 0x8000000c │ │ stmib r4, {r0, r1, r2, r9, ip, sp}^ │ │ ldcllt 0, cr2, [r0, #-0] │ │ strtcs r2, [r3], -r3, lsr #32 │ │ - svc 0x00d4f0a5 │ │ + svc 0x007cf0a5 │ │ stmdbmi sp, {r4, r5, r7, r8, ip, sp, pc} │ │ eorcs r4, r3, #5242880 @ 0x500000 │ │ @ instruction: 0xf0a24479 │ │ - @ instruction: 0x200afdb8 │ │ + andcs pc, sl, r2, ror #25 │ │ vmla.i d22, d8, d2[5] │ │ adcvs r0, r5, r0 │ │ rscvs r6, r6, r0, lsr #32 │ │ - bmi 261e2c │ │ + bmi 261efc │ │ ldrbtmi r4, [sl], #-1577 @ 0xfffff9d7 │ │ - @ instruction: 0xf902f00d │ │ + blx 7ee978 │ │ tstcs r8, r1 │ │ - blx fe5ee8aa │ │ + ldc2 0, cr15, [r2], #44 @ 0x2c │ │ @ instruction: 0x21232001 │ │ - blx fe4ee8b2 │ │ - @ instruction: 0xfffdf854 │ │ - @ instruction: 0xfffdf874 │ │ - andeq r8, sl, r2, asr #4 │ │ + stc2 0, cr15, [lr], #44 @ 0x2c │ │ + @ instruction: 0xfffdf784 │ │ + @ instruction: 0xfffdf7a4 │ │ + andeq r8, sl, r2, lsl #3 │ │ addlt fp, ip, r0, lsl #11 │ │ ldmib r0, {r0, r1, r3, r9, fp, lr}^ │ │ ldrbtmi r0, [sl], #-256 @ 0xffffff00 │ │ @ instruction: 0xf3bf68d3 │ │ - blcs d6610 │ │ + blcs d66e0 │ │ ldmdbvs r3, {r1, r3, r8, ip, lr, pc} │ │ andls r2, r3, #0, 4 │ │ andls r2, r2, #268435456 @ 0x10000000 │ │ andls r2, r0, #805306368 @ 0x30000000 │ │ ldrmi r4, [r8, sl, ror #12] │ │ stclt 0, cr11, [r0, #48] @ 0x30 │ │ ldrbtmi r4, [r8], #-2050 @ 0xfffff7fe │ │ - @ instruction: 0xf8bcf00d │ │ - strdeq fp, [sl], -lr │ │ - andeq r7, sl, lr, lsl #20 │ │ + @ instruction: 0xf9d8f00d │ │ + andeq fp, sl, lr, asr #28 │ │ + andeq r7, sl, lr, asr #18 │ │ andeq lr, r0, #3424256 @ 0x344000 │ │ ldmvs r3, {r1, r8, fp, lr}^ │ │ ldrbtmi r2, [r9], #-517 @ 0xfffffdfb │ │ svclt 0x00004718 │ │ - @ instruction: 0xfffe5f00 │ │ + @ instruction: 0xfffe5e30 │ │ strdlt fp, [r1], r0 │ │ stmibcs r0, {r2, r7, fp, sp, lr} │ │ strcs sp, [r1, #-513] @ 0xfffffdff │ │ @ instruction: 0xf5b1e009 │ │ andle r6, r1, #0, 30 │ │ and r2, r4, r2, lsl #10 │ │ @ instruction: 0xf5b12504 │ │ @@ -17179,15 +17231,15 @@ │ │ vsubhn.i16 d20, q0, q7 │ │ stmibeq fp, {r0, r1, r2, r3, r4, r5, r6, r7, sl, fp, ip, sp} │ │ ldrne pc, [pc], ip, ror #6 │ │ svcvs 0x0000f5b1 │ │ subsvc sp, r6, r3, lsl #4 │ │ biceq pc, r0, r3, asr #32 │ │ vqadd.u32 d30, d12, d6 │ │ - b 13f77b4 │ │ + b 13f7884 │ │ smladcs r0, r1, lr, r3 │ │ svcmi 0x0011ebb7 │ │ addsvc sp, r6, r4, lsl #2 │ │ mvneq pc, lr, asr #32 │ │ and r7, r9, r3, asr r0 │ │ streq pc, [pc, -pc, rrx] │ │ orrsmi lr, r1, r7, asr #20 │ │ @@ -17197,57 +17249,57 @@ │ │ stmdbne r9!, {r0, r4, ip, sp, lr} │ │ andcs r6, r0, r1, lsl #1 │ │ ldcllt 0, cr11, [r0, #4]! │ │ strmi r2, [pc], -r1, lsl #4 │ │ strtmi r9, [r1], -r0, lsl #4 │ │ movwcs r4, #5674 @ 0x162a │ │ @ instruction: 0xf0004606 │ │ - ldmvs r2!, {r0, r1, r4, r8, sl, fp, ip, sp, lr, pc} │ │ + ldmvs r2!, {r0, r1, r2, r3, r7, r8, sl, fp, ip, sp, lr, pc} │ │ @ instruction: 0x46304639 │ │ stmibcs r0, {r0, r1, r6, fp, sp, lr} │ │ sbcle r4, r3, #436207616 @ 0x1a000000 │ │ ldrblt lr, [r0, #2024]! @ 0x7e8 │ │ strmi fp, [r5], -r1, lsl #1 │ │ stmiavs lr!, {fp, sp, lr} │ │ - blne fe0441ec │ │ + blne fe0442bc │ │ stmdale r9, {r1, r7, r9, lr} │ │ strtmi r6, [r2], -r8, ror #16 │ │ @ instruction: 0xf0a24430 │ │ - ldmdbne r0!, {r4, r8, sl, fp, ip, sp, lr, pc} │ │ + ldmdbne r0!, {r1, r3, r4, r5, sl, fp, ip, sp, lr, pc} │ │ andcs r6, r0, r8, lsr #1 │ │ ldcllt 0, cr11, [r0, #4]! │ │ strmi r2, [pc], -r1 │ │ strtmi r9, [r8], -r0 │ │ @ instruction: 0x46224631 │ │ @ instruction: 0xf0002301 │ │ - stmiavs lr!, {r0, r1, r2, r3, r5, r6, r7, sl, fp, ip, sp, lr, pc} │ │ + stmiavs lr!, {r0, r1, r3, r5, r6, r8, sl, fp, ip, sp, lr, pc} │ │ @ instruction: 0xe7e94639 │ │ svcmi 0x00f0e92d │ │ strmi fp, [r3], pc, lsr #1 │ │ ldrmi r6, [r9], r8, lsl #16 │ │ stmdacs r0, {r3, r7, r9, sl, lr} │ │ @ instruction: 0xf8cdd050 │ │ ldmib r2, {r2, r4, r5, ip, sp, pc}^ │ │ @ instruction: 0xf8d86b01 │ │ stmib sp, {r2, ip, sp, lr}^ │ │ @ instruction: 0xf8cd920b │ │ @ instruction: 0xf8b08028 │ │ @ instruction: 0xf5008192 │ │ andls r7, pc, r6, lsl #11 │ │ - bcc 2eb3c │ │ - bl 257e3c │ │ - b 13f2b28 │ │ + bcc 2ec0c │ │ + bl 257f0c │ │ + b 13f2bf8 │ │ @ instruction: 0xf1b90980 │ │ eorle r0, r0, r0, lsl #30 │ │ strne lr, [r1], #-2517 @ 0xfffff62b │ │ @ instruction: 0x46224630 │ │ svclt 0x003845a3 │ │ @ instruction: 0xf0a5465a │ │ - stmdacs r0, {r1, r5, r8, r9, sl, fp, sp, lr, pc} │ │ - bl feb22648 │ │ + stmdacs r0, {r1, r6, r7, r9, sl, fp, sp, lr, pc} │ │ + bl feb22718 │ │ stmdacs r0, {r2} │ │ andeq pc, r0, pc, asr #32 │ │ andcs fp, r1, r8, asr #30 │ │ tstpeq r0, pc, asr #32 @ p-variant is OBSOLETE │ │ smlabtcs r1, r8, pc, fp @ │ │ @ instruction: 0xf1a91a08 │ │ @ instruction: 0xf10a090c │ │ @@ -17259,15 +17311,15 @@ │ │ suble r2, sp, r0, lsl #30 │ │ addeq lr, sl, r9, lsl #22 │ │ @ instruction: 0xf8d03f01 │ │ bfi r0, r8, #3, #2 │ │ svcls 0x000f980c │ │ tstlt r0, r0, lsl #16 │ │ @ instruction: 0xf0a54630 │ │ - @ instruction: 0xf8ddeea8 │ │ + @ instruction: 0xf8ddee48 │ │ @ instruction: 0xf8ddb034 │ │ and r9, r5, ip, lsr #32 │ │ @ instruction: 0x5700e9d2 │ │ svcmi 0x0000f1b5 │ │ @ instruction: 0x46c2d115 │ │ subeq lr, sl, sl, lsl #22 │ │ cdpeq 1, 10, cr15, cr0, cr13, {0} │ │ @@ -17277,15 +17329,15 @@ │ │ ldm r9, {r1, r2, r4, r5, r6, r7, r8, r9, lr, pc} │ │ rscgt r0, lr, lr, ror #1 │ │ smulleq lr, pc, lr, r8 @ │ │ sbceq lr, pc, fp, lsl #17 │ │ pop {r0, r1, r2, r3, r5, ip, sp, pc} │ │ @ instruction: 0xf44f8ff0 │ │ ldmvs r4, {r2, r3, r6, r7, ip, sp, lr} │ │ - cdp 0, 9, cr15, cr10, cr5, {5} │ │ + cdp 0, 4, cr15, cr2, cr5, {5} │ │ @ instruction: 0xf0002800 │ │ andcs r8, r1, #1610612751 @ 0x6000000f │ │ @ instruction: 0xf8a02100 │ │ @ instruction: 0xf5002192 │ │ stmib r8, {r2, r7, r9, ip, sp, lr}^ │ │ adcgt r0, r2, #0, 2 │ │ tstpmi r4, r0, asr #17 @ p-variant is OBSOLETE │ │ @@ -17301,53 +17353,53 @@ │ │ ldrtmi sp, [r7], -r3, lsl #2 │ │ ldrdge pc, [r8], -sp @ │ │ @ instruction: 0xf1b8e7b5 │ │ eorle r0, r6, #11, 30 @ 0x2c │ │ mcrreq 11, 0, lr, sl, cr10 │ │ ldrbmi r9, [r0, #2062] @ 0x80e │ │ streq lr, [ip], #2816 @ 0xb00 │ │ - bl fea68fb4 │ │ + bl fea69084 │ │ cps #10 │ │ strbtmi r0, [r2], ip │ │ stmdbeq r1, {r0, r8, r9, fp, sp, lr, pc}^ │ │ - b 14043b4 │ │ + b 1404484 │ │ @ instruction: 0xf0a20289 │ │ - svcls 0x000bfc4c │ │ + svcls 0x000bfa4e │ │ stm r4, {r3, r4, fp, sp, pc} │ │ ldm r7, {r5, r6, fp} │ │ rsbsgt r0, lr, lr, ror r0 │ │ sbceq lr, r9, #323584 @ 0x4f000 │ │ @ instruction: 0xf8dd980f │ │ - bl 56c40 │ │ + bl 56d10 │ │ setend le │ │ @ instruction: 0xf0a20018 │ │ - @ instruction: 0x46d4fc36 │ │ + ldrbmi pc, [r4], r8, ror #21 @ │ │ @ instruction: 0xf1bae00c │ │ andsle r0, r6, #5, 30 │ │ strcs r2, [r0], #-1796 @ 0xfffff8fc │ │ svcls 0x000be022 │ │ stm r4, {r3, r4, fp, sp, pc} │ │ ldm r7, {r5, r6, fp} │ │ rsbsgt r0, lr, lr, ror r0 │ │ - bl 29cfdc │ │ + bl 29d0ac │ │ ldm r1, {r2, r3, r6, r7} │ │ ldrshtgt r0, [ip], #12 │ │ andeq pc, r1, r8, lsl #2 │ │ ldrsbtlt pc, [r4], -sp @ │ │ orrseq pc, r2, r9, lsr #17 │ │ andle lr, r6, r9, lsr #1 │ │ svceq 0x0006f1ba │ │ strcs sp, [r5, -r6, lsl #2] │ │ - beq 6ecdc │ │ + beq 6edac │ │ strcs lr, [r0], #-5 │ │ and r4, r3, r7, asr r6 │ │ - beq 22f254 │ │ + beq 22f324 │ │ strcs r2, [r1], #-1798 @ 0xfffff8fa │ │ sbcvc pc, ip, pc, asr #8 │ │ - cdp 0, 1, cr15, cr14, cr5, {5} │ │ + stcl 0, cr15, [r6, #660] @ 0x294 │ │ @ instruction: 0xf0002800 │ │ @ instruction: 0xf8dd827a │ │ @ instruction: 0x4680903c │ │ mvnsmi r2, #0 │ │ smlabteq r8, r8, r8, pc @ │ │ @ instruction: 0x0192f8b9 │ │ strpl lr, [r7], #-2509 @ 0xfffff633 │ │ @@ -17357,61 +17409,61 @@ │ │ strbeq lr, [r7, #-2823] @ 0xfffff4f9 │ │ strls r9, [r9, -lr, lsl #16] │ │ strbeq lr, [r1, -r1, lsl #22] │ │ streq lr, [r5], #2816 @ 0xb00 │ │ addvc pc, r6, r8, lsl #10 │ │ movweq pc, #49412 @ 0xc104 @ │ │ @ instruction: 0x461900ba │ │ - blx 1a2ee8a │ │ + @ instruction: 0xffb8f0a1 │ │ @ instruction: 0x464f00fa │ │ stmibeq r5, {r0, r3, r8, r9, fp, sp, lr, pc}^ │ │ @ instruction: 0xf1094640 │ │ @ instruction: 0xf0a20118 │ │ - ldmib r4, {r0, r5, fp, ip, sp, lr, pc}^ │ │ + ldmib r4, {r1, r5, r6, r7, r8, fp, ip, sp, lr, pc}^ │ │ ldrtmi r0, [lr], r1, lsl #24 │ │ andls r9, ip, lr, lsl #18 │ │ @ instruction: 0xf8a79809 │ │ stmdage r8!, {r1, r4, r7, r8} │ │ eorne pc, r5, r1, asr r8 @ │ │ andls r3, r1, r4 │ │ ldm r9, {r0, r3, r8, ip, pc} │ │ - bl 2b2f2c │ │ + bl 2b2ffc │ │ adcsgt r0, lr, sl, asr #18 │ │ @ instruction: 0xf8cd9808 │ │ stmdacs r0, {r3, r4, r5, pc} │ │ ldrbtmi fp, [r0], r8, lsl #30 │ │ addvc pc, r6, r8, lsl #10 │ │ @ instruction: 0x1192f8b8 │ │ streq lr, [r9], #2816 @ 0xb00 │ │ stmdble r4!, {r0, r4, r6, r8, sl, lr} │ │ - bl fe897070 │ │ + bl fe897140 │ │ cps #10 │ │ @ instruction: 0xf8cd000c │ │ - bl a2ce4 │ │ + bl a2db4 │ │ strtmi r0, [r1], -r1, asr #20 │ │ addeq lr, sl, #323584 @ 0x4f000 │ │ - blx fec2eefa │ │ + @ instruction: 0xf9b1f0a2 │ │ svcls 0x000b9807 │ │ stmdaeq r1, {r2, r7, fp, sp, lr, pc}^ │ │ ldm r7, {r3, r4, fp, sp, pc} │ │ rsbsgt r0, lr, lr, ror r0 │ │ biceq lr, r9, r8, lsl #22 │ │ andseq pc, r8, r1, lsl #2 │ │ sbceq lr, sl, #323584 @ 0x4f000 │ │ @ instruction: 0xa018f8dd │ │ - blx fe6aef1e │ │ + blx 132efec │ │ ldrsbt pc, [r0], -sp @ │ │ ldrdgt pc, [r0], -sp @ │ │ stmdals r7, {r1, r3, sp, lr, pc} │ │ svcls 0x000b468a │ │ stmdaeq r1, {r2, r7, fp, sp, lr, pc}^ │ │ ldm r7, {r3, r4, fp, sp, pc} │ │ rsbsgt r0, lr, lr, ror r0 │ │ ldrsbt pc, [r0], -sp @ │ │ - bl 25d118 │ │ + bl 25d1e8 │ │ ldm r1, {r0, r3, r6, r7} │ │ stmdbge r8!, {r2, r3, r4, r5, r6, r7} │ │ @ instruction: 0xf10ac0fc │ │ stcge 0, cr0, [r0], #-4 │ │ orrseq pc, r2, r8, lsr #17 │ │ strtmi ip, [r0], -ip, lsl #19 │ │ ldm r1, {r2, r3, r7, lr, pc} │ │ @@ -17438,128 +17490,128 @@ │ │ stmdage r4, {r4, r7, r8, sp, pc} │ │ svceq 0x000bf1bc │ │ stm r0, {r0, r1, r2, sl, ip, pc} │ │ @ instruction: 0xf0c01084 │ │ @ instruction: 0xf1ba815b │ │ movwls r0, #16133 @ 0x3f05 │ │ strcs sp, [r0, #-515] @ 0xfffffdfd │ │ - bleq 16ee80 │ │ + bleq 16ef50 │ │ andle lr, r8, r1, lsl r0 │ │ svceq 0x0006f1ba │ │ strcs sp, [r1, #-264] @ 0xfffffef8 │ │ - beq 6ee90 │ │ - bleq 1aee94 │ │ + beq 6ef60 │ │ + bleq 1aef64 │ │ strcs lr, [r0, #-7] │ │ ldrd r4, [r4], -r3 │ │ - beq 22f40c │ │ + beq 22f4dc │ │ @ instruction: 0xf04f2501 │ │ @ instruction: 0xf44f0b06 │ │ @ instruction: 0xf0a570e4 │ │ - stmdacs r0, {r1, r6, r8, sl, fp, sp, lr, pc} │ │ + stmdacs r0, {r1, r3, r5, r6, r7, sl, fp, sp, lr, pc} │ │ @ instruction: 0x81aef000 │ │ andcs r4, r0, r0, lsl #13 │ │ smlabteq r8, r8, r8, pc @ │ │ tsteq fp, pc, ror #20 │ │ @ instruction: 0x0192f8b9 │ │ strmi r9, [r1], #-1282 @ 0xfffffafe │ │ orrsne pc, r2, r8, lsr #17 │ │ @ instruction: 0xf080290c │ │ - bl 3133e4 │ │ - bl 73ec8 │ │ + bl 3134b4 │ │ + bl 73f98 │ │ @ instruction: 0xf5080541 │ │ - bl 28efbc │ │ + bl 28f08c │ │ adceq r0, sl, r4, lsl #15 │ │ orrvc pc, ip, #29360128 @ 0x1c00000 │ │ - @ instruction: 0xf0a24619 │ │ - bl 2b17ec │ │ + @ instruction: 0xf0a14619 │ │ + bl 2b2a00 │ │ andls r0, ip, r4, asr #1 │ │ tstpeq r8, r0, lsl #2 @ p-variant is OBSOLETE │ │ strbmi r0, [r0], -sl, ror #1 │ │ - @ instruction: 0xff48f0a1 │ │ + @ instruction: 0xf909f0a2 │ │ @ instruction: 0xf8cd9d0c │ │ @ instruction: 0xf8a9903c │ │ @ instruction: 0xf8cdb192 │ │ ldmib r7, {r3, r4, r5, pc}^ │ │ @ instruction: 0xf8d7ce44 │ │ stmdals r1, {r2, r3, r8, ip, pc} │ │ smullseq lr, lr, r5, r8 @ │ │ mcrls 0, 0, ip, cr14, cr14, {6} │ │ @ instruction: 0x7192f8b6 │ │ svccs 0x000c1c79 │ │ msrhi SPSR_fs, r0, lsl #1 │ │ @ instruction: 0xf8cd9806 │ │ - bl fe862eb8 │ │ + bl fe862f88 │ │ stmib sp, {r0, r1, r3}^ │ │ addmi lr, r8, #8, 18 @ 0x20000 │ │ msrhi SPSR_fsc, r0, asr #32 │ │ @ instruction: 0xf508980b │ │ @ instruction: 0xf8dd74cc │ │ addeq r9, sl, ip, lsr r0 │ │ andls r3, fp, r1 │ │ addeq lr, fp, r9, lsl #22 │ │ bicvc pc, lr, #0, 10 │ │ ldrmi r4, [r9], -r0, lsr #12 │ │ - blx 15af0ac │ │ + cdp2 0, 10, cr15, cr6, cr1, {5} │ │ andcs r9, r0, r2, lsl #26 │ │ eorne pc, r0, r4, asr r8 @ │ │ @ instruction: 0xf8a142b8 │ │ @ instruction: 0xf8c10190 │ │ @ instruction: 0xf04f6108 │ │ svclt 0x00380100 │ │ andle r2, r2, #1073741824 @ 0x40000000 │ │ adcsmi r4, r8, #8, 8 @ 0x8000000 │ │ stmdbge r8!, {r4, r5, r6, r7, r8, fp, ip, lr, pc} │ │ stccs 8, cr10, [r0, #-128] @ 0xffffff80 │ │ addgt ip, ip, ip, lsl #19 │ │ smulleq lr, ip, r1, r8 │ │ - bl 2e3188 │ │ + bl 2e3258 │ │ svclt 0x0008074a │ │ @ instruction: 0xf50846c8 │ │ @ instruction: 0xf8b87086 │ │ - bl 474b0 │ │ + bl 47580 │ │ @ instruction: 0xf10a0487 │ │ ldrbmi r0, [r5, #-2305] @ 0xfffff6ff │ │ - bl fe9a9320 │ │ - bl 2732a0 │ │ + bl fe9a93f0 │ │ + bl 273370 │ │ tstls r6, r9, asr #22 │ │ strbeq lr, [r1], -r1, lsl #22 │ │ addeq lr, fp, r0, lsl #22 │ │ adcseq r4, r2, r1, lsr #12 │ │ - blx fe8af114 │ │ + @ instruction: 0xf8a3f0a2 │ │ rscseq r9, r2, r4, lsl #16 │ │ stmdals r3, {r5, sp, lr} │ │ stmdals r5, {r5, r6, sp, lr} │ │ - bl 24b11c │ │ - bl 2331cc │ │ + bl 24b1ec │ │ + bl 23329c │ │ ldrbmi r0, [r9], -r7, asr #23 │ │ - blx fe42f130 │ │ + @ instruction: 0xf941f0a2 │ │ ldm r0, {fp, ip, pc} │ │ @ instruction: 0xf50800de │ │ stm fp, {r2, r3, r6, r7, ip, sp, lr} │ │ - bl 33230 │ │ - bl 334e0 │ │ - bls 1b30e8 │ │ + bl 33300 │ │ + bl 335b0 │ │ + bls 1b31b8 │ │ addseq r3, r2, r8 │ │ - blx fe12f150 │ │ + @ instruction: 0xf885f0a2 │ │ stmdals r4, {r2, r3, sp, lr, pc} │ │ vstmiaeq r7, {d30-} │ │ stmdals r3, {r5, sp, lr} │ │ rsbvs r9, r0, r0, lsl #18 │ │ adcvs r9, r0, r5, lsl #16 │ │ smullseq lr, sp, r1, r8 │ │ sbcseq lr, sp, ip, lsl #17 │ │ ldrsbtlt pc, [r4], -sp @ │ │ orreq lr, r9, r8, lsl #22 │ │ ldrsbt pc, [r0], -sp @ │ │ - bls 1fa094 │ │ + bls 1fa164 │ │ stcleq 1, cr15, [r0], #-52 @ 0xffffffcc │ │ orrscs pc, r8, r1, asr #17 │ │ strmi r1, [r9, #3241] @ 0xca9 │ │ orrseq pc, r2, r8, lsr #17 │ │ - bl 267734 │ │ + bl 267804 │ │ cpsie ai, #10 │ │ ldrbmi r0, [r0, #-2561] @ 0xfffff5ff │ │ @ instruction: 0x119cf8d1 │ │ orrsge pc, r0, r1, lsr #17 │ │ smlabthi r8, r1, r8, pc @ │ │ stmdage r0!, {r0, r1, r4, r5, r6, r7, r8, ip, lr, pc} │ │ ldcge 6, cr4, [r0, #-388] @ 0xfffffe7c │ │ @@ -17584,15 +17636,15 @@ │ │ andls r2, fp, r0 │ │ ldrdmi pc, [r0], -r8 │ │ eorgt pc, r0, sp, asr #17 │ │ @ instruction: 0xf0002c00 │ │ vst4.32 {d24-d27}, [pc :256], r7 │ │ ldrbtmi r7, [r1], r4, ror #1 │ │ ldrdvc pc, [r4], -r8 │ │ - ldc 0, cr15, [r4], #-660 @ 0xfffffd6c │ │ + bl ff76f2f0 │ │ @ instruction: 0xf0002800 │ │ ldclne 0, cr8, [sl], #-644 @ 0xfffffd7c │ │ tstpeq r0, pc, asr #32 @ p-variant is OBSOLETE │ │ orrsmi pc, r8, r0, asr #17 │ │ orrsne pc, r2, r0, lsr #17 │ │ smlabtne r8, r0, r8, pc @ │ │ adchi pc, r6, r0, lsl #1 │ │ @@ -17614,242 +17666,304 @@ │ │ @ instruction: 0xf8c00108 │ │ ldrb r9, [sl, #-412]! @ 0xfffffe64 │ │ strbeq lr, [sl], #-2826 @ 0xfffff4f6 │ │ addvc pc, r6, r9, lsl #10 │ │ streq pc, [r1, #-266] @ 0xfffffef6 │ │ cdpeq 1, 0, cr15, cr1, cr12, {0} │ │ streq lr, [r4], r0, lsl #22 │ │ - strls r4, [pc, #-1506] @ 32a22 │ │ - bl 1a78d8 │ │ + strls r4, [pc, #-1506] @ 32af2 │ │ + bl 1a79a8 │ │ tstls ip, r5, asr #2 │ │ @ instruction: 0xf8cd461d │ │ - bl 6b0f4 │ │ - bl feb3321c │ │ + bl 6b1c4 │ │ + bl feb332ec │ │ tstls sp, sl, lsl #2 │ │ strbeq lr, [r1, -r1, lsl #22] │ │ adcseq r4, sl, r1, lsr r6 │ │ - @ instruction: 0xf9d3f0a2 │ │ - bl 29903c │ │ + @ instruction: 0xffd5f0a1 │ │ + bl 29910c │ │ stmib r6, {r2, r6, r7, r8}^ │ │ rscseq r0, sl, r0, lsl #10 │ │ adcsvs r9, r0, r5, lsl #16 │ │ tstls ip, ip, lsl #16 │ │ sbceq lr, r0, r9, lsl #22 │ │ - @ instruction: 0xf9c1f0a2 │ │ + @ instruction: 0xf873f0a2 │ │ stcls 14, cr9, [ip, #-0] │ │ umullseq lr, pc, r6, r8 @ │ │ @ instruction: 0xf509c59f │ │ stcls 0, cr7, [pc], {204} @ 0xcc │ │ - bl 5988c │ │ - bl 3366c │ │ + bl 5995c │ │ + bl 3373c │ │ andcc r0, r8, sl, lsl #1 │ │ - @ instruction: 0xf0a20092 │ │ - @ instruction: 0xf8ddf9b4 │ │ + @ instruction: 0xf0a10092 │ │ + @ instruction: 0xf8ddffb6 │ │ @ instruction: 0xf8dde038 │ │ and ip, r7, r8, lsl r0 │ │ - bl 29a474 │ │ + bl 29a544 │ │ strgt r0, [ip], r4, asr #1 │ │ smullseq lr, lr, r5, r8 @ │ │ stcls 0, cr12, [pc], {222} @ 0xde │ │ addeq lr, r4, r9, lsl #22 │ │ @ instruction: 0xf8a99907 │ │ @ instruction: 0xf8c0e192 │ │ @ instruction: 0xf10c1198 │ │ addmi r0, r4, #2 │ │ stcge 4, cr15, [r5, #-764]! @ 0xfffffd04 │ │ sbcvc pc, lr, r9, lsl #10 │ │ eorne pc, sl, r0, asr r8 @ │ │ - beq af4cc │ │ + beq af59c │ │ @ instruction: 0xf8a145d6 │ │ @ instruction: 0xf8c1a190 │ │ mvnsle r9, r8, lsl #2 │ │ andcs lr, r8, r7, lsl r5 │ │ bicvc pc, ip, pc, asr #8 │ │ - cdp2 0, 11, cr15, cr9, cr10, {0} │ │ + @ instruction: 0xffd5f00a │ │ andcs r4, r0, r6, lsl fp │ │ ldrbtmi r2, [fp], #-523 @ 0xfffffdf5 │ │ - ldc2l 0, cr15, [r2], #-48 @ 0xffffffd0 │ │ + stc2 0, cr15, [lr, #48] @ 0x30 │ │ andcs r4, r0, r5, lsl fp │ │ ldrbtmi r2, [fp], #-524 @ 0xfffffdf4 │ │ - stc2l 0, cr15, [ip], #-48 @ 0xffffffd0 │ │ + stc2 0, cr15, [r8, #48] @ 0x30 │ │ vst4.8 {d18-d21}, [pc], r8 │ │ @ instruction: 0xf00a71e4 │ │ - ldmdami r1, {r3, r5, r7, r9, sl, fp, ip, sp, lr, pc} │ │ - bmi 47b584 │ │ + ldmdami r1, {r2, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ + bmi 47b654 │ │ ldrbtmi r4, [sl], #-1144 @ 0xfffffb88 │ │ - ldc2 0, cr15, [r2], #48 @ 0x30 │ │ + stc2l 0, cr15, [lr, #48] @ 0x30 │ │ ldrbtmi r4, [r8], #-2057 @ 0xfffff7f7 │ │ - stc2 0, cr15, [r4], #48 @ 0x30 │ │ + stc2l 0, cr15, [r0, #48] @ 0x30 │ │ ldrbtmi r4, [r8], #-2057 @ 0xfffff7f7 │ │ - stc2 0, cr15, [r0], #48 @ 0x30 │ │ + ldc2 0, cr15, [ip, #48]! @ 0x30 │ │ teqcs r0, r3, lsl #16 │ │ ldrbtmi r4, [r8], #-2563 @ 0xfffff5fd │ │ @ instruction: 0xf00c447a │ │ - svclt 0x0000fca3 │ │ - @ instruction: 0xfffe3456 │ │ - andeq r7, sl, ip, lsr #17 │ │ - @ instruction: 0x000a78b2 │ │ - andeq r7, sl, lr, lsl r9 │ │ - andeq r7, sl, sl, asr #17 │ │ - andeq r7, sl, r2, lsr #18 │ │ - @ instruction: 0xfffe34a4 │ │ - andeq r7, sl, sl, ror #17 │ │ - bl a06f0 │ │ - bl 33a38 │ │ - bl 33740 │ │ + svclt 0x0000fdbf │ │ + @ instruction: 0xfffe3386 │ │ + andeq r7, sl, ip, ror #15 │ │ + strdeq r7, [sl], -r2 │ │ + andeq r7, sl, lr, asr r8 │ │ + andeq r7, sl, sl, lsl #16 │ │ + andeq r7, sl, r2, ror #16 │ │ + @ instruction: 0xfffe33d4 │ │ + andeq r7, sl, sl, lsr #16 │ │ + mvnsmi lr, sp, lsr #18 │ │ + bvs 244a14 │ │ + stmdavs sl, {r3, r4, r6, r7, r8, ip, sp, pc} │ │ + andvs r3, r8, #65536 @ 0x10000 │ │ + cmnle r9, r1, lsl #20 │ │ + cmnlt r8, #72, 16 @ 0x480000 │ │ + @ instruction: 0x5602e9d1 │ │ + @ instruction: 0x2192f8b0 │ │ + eorsle r4, r8, #1610612745 @ 0x60000009 │ │ + stccs 6, cr4, [r0, #-28] @ 0xffffffe4 │ │ + bl 227340 │ │ + strtmi r0, [fp], -r6, lsl #1 │ │ + sbcvc pc, lr, #0, 10 │ │ + blcc 8d274 │ │ + sbcvc pc, ip, #0, 10 │ │ + andcs sp, r0, #-2147483586 @ 0x8000003e │ │ + ldmib r1, {r2, r3, r4, r5, sp, lr, pc}^ │ │ + strcs r7, [r0], -r0 │ │ + andcc lr, r2, #3424256 @ 0x344000 │ │ + ldrbeq r6, [r9, lr]! │ │ + stmdblt r8!, {r0, r6, ip, lr, pc} │ │ + tstlt sl, r8, lsl r6 │ │ + @ instruction: 0x0198f8d0 │ │ + mvnsle r3, r1, lsl #20 │ │ + ldrdne pc, [r8, -r0] │ │ + @ instruction: 0x460db399 │ │ + b fedef4fc │ │ + ldrdne pc, [r8, -r5] │ │ + stmdbcs r0, {r3, r5, r9, sl, lr} │ │ + strd sp, [fp], -r7 @ │ │ + andeq lr, r2, #3424256 @ 0x344000 │ │ + @ instruction: 0xf8d0b11a │ │ + bcc 738e0 │ │ + andcs sp, r1, #-1073741762 @ 0xc000003e │ │ + strcs r2, [r0, #-1536] @ 0xfffffa00 │ │ + @ instruction: 0xf8b0600a │ │ + addsmi r2, r6, #-2147483612 @ 0x80000024 │ │ + strmi sp, [r8], r6, asr #7 │ │ + ldrdvc pc, [r8, -r0] │ │ + @ instruction: 0xf8b0b1f7 │ │ + @ instruction: 0xf0a56190 │ │ + @ instruction: 0xf8b7ea9a │ │ + strcc r0, [r1, #-402] @ 0xfffffe6e │ │ + ldrtmi r4, [r8], -r6, lsl #5 │ │ + @ instruction: 0x4641d2f2 │ │ + @ instruction: 0xd1b82d00 │ │ + @ instruction: 0x46381c72 │ │ + sbcvs r2, sl, r0, lsl #6 │ │ + movweq lr, #6593 @ 0x19c1 │ │ + strvc lr, [r0, #-2500] @ 0xfffff63c │ │ + pop {r1, r2, r5, r7, sp, lr} │ │ + @ instruction: 0x460581f0 │ │ + @ instruction: 0xf0a54628 │ │ + eorvs lr, r6, r2, lsl #21 │ │ + ldrhhi lr, [r0, #141]! @ 0x8d │ │ + b 1f6f570 │ │ + ldrbtmi r4, [r8], #-2051 @ 0xfffff7fd │ │ + ldc2 0, cr15, [r0, #-48]! @ 0xffffffd0 │ │ + ldrbtmi r4, [r8], #-2050 @ 0xfffff7fe │ │ + stc2 0, cr15, [ip, #-48]! @ 0xffffffd0 │ │ + ldrdeq r8, [sl], -r2 │ │ + ldrdeq r8, [sl], -sl │ │ + bl a08b8 │ │ + bl 33c00 │ │ + bl 33908 │ │ @ instruction: 0xf8d105c2 │ │ - blcs 3f570 │ │ + blcs 3f738 │ │ @ instruction: 0xf501bf1e │ │ stmdavs r0, {r1, r2, r7, ip, sp, lr}^ │ │ - bl f6f3e0 │ │ + b 186f5a8 │ │ stmdacs r3, {r3, r5, fp, ip, sp, lr} │ │ ldcllt 15, cr11, [r0, #-224]! @ 0xffffff20 │ │ stmdacs r4, {r1, r3, ip, lr, pc} │ │ stmiavs lr!, {r0, r1, r2, r3, r8, ip, lr, pc}^ │ │ stmiavs ip!, {r1, r2, r4, r5, r8, ip, sp, pc} │ │ @ instruction: 0xf7fe4620 │ │ - ldrcc pc, [r8], #-3487 @ 0xfffff261 │ │ + ldrcc pc, [r8], #-3361 @ 0xfffff2df │ │ mvnsle r3, r1, lsl #28 │ │ cmplt r8, r8, ror #16 │ │ pop {r3, r5, r7, fp, sp, lr} │ │ @ instruction: 0xf0a54070 │ │ - vstmdbne r8!, {s22-s224} │ │ + @ instruction: 0x1d28b9ef │ │ ldrhtmi lr, [r0], #-141 @ 0xffffff73 │ │ - bllt 1bf117c │ │ + blt ffc71344 │ │ ldrlt fp, [r0, #-3440] @ 0xfffff290 │ │ stcvc 6, cr4, [r0, #-16] │ │ svclt 0x001c2802 │ │ andseq pc, r0, r4, lsl #2 │ │ - ldc2l 7, cr15, [r8], #1016 @ 0x3f8 │ │ + ldc2l 7, cr15, [sl], #-1016 @ 0xfffffc08 │ │ svclt 0x00081c60 │ │ stcne 13, cr11, [r0, #-64]! @ 0xffffffc0 │ │ svchi 0x005bf3bf │ │ svcne 0x0000e850 │ │ stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ - blcs 3bdb0 │ │ + blcs 3bf78 │ │ stmdbcs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ vaddw.u , , d6 │ │ qsaxmi r8, r0, fp │ │ @ instruction: 0x4010e8bd │ │ - blt fe9ef458 │ │ + stmiblt sl, {r0, r2, r5, r7, ip, sp, lr, pc}^ │ │ ldrlt fp, [r0, #3344]! @ 0xd10 │ │ ldmib r0, {r1, r2, r7, ip, sp, pc}^ │ │ strmi r1, [r4], -r0, lsl #4 │ │ - movwcs r2, #32792 @ 0x8018 │ │ - andcc lr, r0, sp, asr #19 │ │ - subeq r2, r8, r4, lsl #10 │ │ - stmdage r3, {r2, fp, sp} │ │ - subeq fp, sp, r8, lsl #31 │ │ - @ instruction: 0xf000462b │ │ - stmdals r3, {r7, fp, ip, sp, lr, pc} │ │ - svclt 0x001f2801 │ │ - stmib r4, {r2, fp, ip, pc}^ │ │ - andlt r5, r6, r0 │ │ - ldmib sp, {r4, r5, r7, r8, sl, fp, ip, sp, pc}^ │ │ - @ instruction: 0xf00a0104 │ │ - ldrlt pc, [r0, #3795]! @ 0xed3 │ │ - ldmib r0, {r1, r2, r7, ip, sp, pc}^ │ │ - strmi r1, [r4], -r0, lsl #4 │ │ stmib sp, {r2, r8, sl, sp}^ │ │ subeq r5, r8, r0, lsl #10 │ │ stmdage r3, {r2, fp, sp} │ │ subeq fp, sp, r8, lsl #31 │ │ @ instruction: 0xf000462b │ │ - stmdals r3, {r2, r5, r6, fp, ip, sp, lr, pc} │ │ - svclt 0x001f2801 │ │ - stmib r4, {r2, fp, ip, pc}^ │ │ - andlt r5, r6, r0 │ │ - ldmib sp, {r4, r5, r7, r8, sl, fp, ip, sp, pc}^ │ │ - @ instruction: 0xf00a0104 │ │ - ldrlt pc, [r0, #3767]! @ 0xeb7 │ │ - ldmib r0, {r1, r2, r7, ip, sp, pc}^ │ │ - strmi r1, [r4], -r0, lsl #4 │ │ - movwcs r2, #32784 @ 0x8010 │ │ - andcc lr, r0, sp, asr #19 │ │ - subeq r2, r8, r4, lsl #10 │ │ - stmdage r3, {r2, fp, sp} │ │ - subeq fp, sp, r8, lsl #31 │ │ - @ instruction: 0xf000462b │ │ - stmdals r3, {r1, r2, r6, fp, ip, sp, lr, pc} │ │ + stmdals r3, {r1, r7, fp, ip, sp, lr, pc} │ │ svclt 0x001f2801 │ │ stmib r4, {r2, fp, ip, pc}^ │ │ andlt r5, r6, r0 │ │ ldmib sp, {r4, r5, r7, r8, sl, fp, ip, sp, pc}^ │ │ @ instruction: 0xf00a0104 │ │ - ldrlt pc, [r0, #3737]! @ 0xe99 │ │ + ldrlt pc, [r0, #3957]! @ 0xf75 │ │ ldmib r0, {r1, r2, r7, ip, sp, pc}^ │ │ strmi r1, [r4], -r0, lsl #4 │ │ strcs r2, [r4, #-8] │ │ andpl lr, r0, sp, asr #19 │ │ stmdacs r4, {r3, r6} │ │ svclt 0x0088a803 │ │ strtmi r0, [fp], -sp, asr #32 │ │ + @ instruction: 0xf865f000 │ │ + stmdacs r1, {r0, r1, fp, ip, pc} │ │ + stmdals r4, {r0, r1, r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ + andpl lr, r0, r4, asr #19 │ │ + ldclt 0, cr11, [r0, #24]! │ │ + ldrdeq lr, [r4, -sp] │ │ + @ instruction: 0xff58f00a │ │ + @ instruction: 0xb086b5b0 │ │ + andne lr, r0, #208, 18 @ 0x340000 │ │ + andscs r4, r0, r4, lsl #12 │ │ + stmib sp, {r3, r8, r9, sp}^ │ │ + strcs r3, [r4, #-0] │ │ + stmdacs r4, {r3, r6} │ │ + svclt 0x0088a803 │ │ + strtmi r0, [fp], -sp, asr #32 │ │ + @ instruction: 0xf847f000 │ │ + stmdacs r1, {r0, r1, fp, ip, pc} │ │ + stmdals r4, {r0, r1, r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ + andpl lr, r0, r4, asr #19 │ │ + ldclt 0, cr11, [r0, #24]! │ │ + ldrdeq lr, [r4, -sp] │ │ + @ instruction: 0xff3af00a │ │ + @ instruction: 0xb086b5b0 │ │ + andne lr, r0, #208, 18 @ 0x340000 │ │ + andscs r4, r8, r4, lsl #12 │ │ + stmib sp, {r3, r8, r9, sp}^ │ │ + strcs r3, [r4, #-0] │ │ + stmdacs r4, {r3, r6} │ │ + svclt 0x0088a803 │ │ + strtmi r0, [fp], -sp, asr #32 │ │ @ instruction: 0xf829f000 │ │ stmdacs r1, {r0, r1, fp, ip, pc} │ │ stmdals r4, {r0, r1, r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ andpl lr, r0, r4, asr #19 │ │ ldclt 0, cr11, [r0, #24]! │ │ ldrdeq lr, [r4, -sp] │ │ - cdp2 0, 7, cr15, cr12, cr10, {0} │ │ + @ instruction: 0xff1cf00a │ │ @ instruction: 0xb086b5b0 │ │ andne lr, r0, #208, 18 @ 0x340000 │ │ andcs r4, r8, r4, lsl #12 │ │ stmib sp, {r2, r8, sl, sp}^ │ │ subeq r0, r8, r0 │ │ stmdage r3, {r2, fp, sp} │ │ subeq fp, sp, r8, lsl #31 │ │ @ instruction: 0xf000462b │ │ stmdals r3, {r2, r3, fp, ip, sp, lr, pc} │ │ svclt 0x001f2801 │ │ stmib r4, {r2, fp, ip, pc}^ │ │ andlt r5, r6, r0 │ │ ldmib sp, {r4, r5, r7, r8, sl, fp, ip, sp, pc}^ │ │ @ instruction: 0xf00a0104 │ │ - push {r0, r1, r2, r3, r4, r6, r9, sl, fp, ip, sp, lr, pc} │ │ + push {r0, r1, r2, r3, r4, r5, r6, r7, r9, sl, fp, ip, sp, lr, pc} │ │ strdlt r4, [r2], r0 │ │ stmdavs sl, {r0, r2, r3, r4, r6, r7, r8, fp, sp, lr, pc} │ │ @ instruction: 0xf04f4604 │ │ - bl 1b5afc │ │ + bl 1b5cc4 │ │ rsbsmi r0, r7, #8 │ │ eorsmi r3, r8, r1, lsl #16 │ │ strpl pc, [r3, -r0, lsr #23] │ │ movwcs r2, #16385 @ 0x4001 │ │ cmple r3, r0, lsl #30 │ │ strmi pc, [r0, -r6, asr #3] │ │ ldmdale pc!, {r0, r2, r3, r4, r5, r7, r9, lr} @ │ │ bicslt r4, r1, sl, lsr #13 │ │ stmdble r9!, {r1, r2, r3, r5, r7, r9, lr} │ │ strmi r2, [sp], -r0 │ │ mulls r0, r1, r6 │ │ @ instruction: 0x46684631 │ │ mcrcs 6, 0, r4, cr4, cr2, {2} │ │ @ instruction: 0x2104bf98 │ │ - b fe9ef5cc │ │ + stmib sl, {r0, r2, r5, r7, ip, sp, lr, pc}^ │ │ stmdals r0, {r3, r4, r6, r8, r9, fp, ip, sp, pc} │ │ - blx 260062 │ │ + blx 26022a │ │ strbmi pc, [r9], -r5, lsl #4 @ │ │ - @ instruction: 0xf0a24606 │ │ - strbmi pc, [r8], -r0, asr #16 @ │ │ - b eef5e4 │ │ + @ instruction: 0xf0a14606 │ │ + strbmi pc, [r8], -lr, ror #29 @ │ │ + ldmdb lr, {r0, r2, r5, r7, ip, sp, lr, pc}^ │ │ @ instruction: 0xb1ade016 │ │ ldmdble r7, {r1, r2, r3, r5, r7, r9, lr} │ │ ldrtmi r2, [r1], -r0 │ │ stmdage r1, {r0, ip, pc} │ │ mcrcs 6, 0, r4, cr4, cr2, {2} │ │ @ instruction: 0x2104bf98 │ │ - b fe36f600 │ │ + ldmib r0!, {r0, r2, r5, r7, ip, sp, lr, pc} │ │ stmdals r1, {r3, r7, r8, fp, ip, sp, pc} │ │ and fp, lr, r8, lsr r9 │ │ @ instruction: 0x46514610 │ │ - b 1f6f610 │ │ + stmib r0!, {r0, r2, r5, r7, ip, sp, lr, pc} │ │ and fp, r8, r8, lsl #18 │ │ rsbvs r4, r0, r0, lsr r6 │ │ and r2, r6, r0 │ │ @ instruction: 0xf0a54650 │ │ - stmdacs r0, {r2, r4, r5, r9, fp, sp, lr, pc} │ │ + stmdacs r0, {r5, r6, r8, fp, sp, lr, pc} │ │ strdcs sp, [r1], -r7 │ │ movwcs r6, #32870 @ 0x8066 │ │ andge pc, r3, r4, asr #16 │ │ andlt r6, r2, r0, lsr #32 │ │ @ instruction: 0x87f0e8bd │ │ @ instruction: 0xb086b5b0 │ │ ldmdane r0, {r2, r9, sl, lr}^ │ │ @@ -17866,34 +17980,34 @@ │ │ @ instruction: 0xf7ff462b │ │ stmdals r3, {r3, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ svclt 0x001f2801 │ │ stmib r4, {r2, fp, ip, pc}^ │ │ andlt r5, r6, r0 │ │ ldmib sp, {r4, r5, r7, r8, sl, fp, ip, sp, pc}^ │ │ @ instruction: 0xf00a0104 │ │ - ldrdcs pc, [r0], -fp │ │ - ldc2l 0, cr15, [r8, #40] @ 0x28 │ │ + andcs pc, r0, fp, ror lr @ │ │ + cdp2 0, 7, cr15, cr8, cr10, {0} │ │ andeq lr, r0, #3424256 @ 0x344000 │ │ ldmvs r3, {r1, r8, fp, lr}^ │ │ ldrbtmi r2, [r9], #-521 @ 0xfffffdf7 │ │ svclt 0x00004718 │ │ - @ instruction: 0xfffdece7 │ │ + @ instruction: 0xfffdeb1f │ │ addlt fp, r4, r0, lsl r5 │ │ stmdbmi r8, {r2, r3, r7, r9, sl, lr} │ │ - bge 106038 │ │ + bge 106200 │ │ ldrbtmi r4, [r9], #-3080 @ 0xfffff3f8 │ │ andls r4, r3, fp, ror r4 │ │ stmib sp, {r2, r3, r4, r5, r6, sl, lr}^ │ │ @ instruction: 0xf1002400 │ │ strbtmi r0, [r0], -ip, lsl #4 │ │ - stc2l 0, cr15, [r6], #52 @ 0x34 │ │ + stc2 0, cr15, [r6, #52] @ 0x34 │ │ ldclt 0, cr11, [r0, #-16] │ │ - @ instruction: 0xfffe2f72 │ │ - @ instruction: 0xffff405d │ │ - @ instruction: 0xffff3e65 │ │ + @ instruction: 0xfffe2daa │ │ + @ instruction: 0xffff3ec9 │ │ + @ instruction: 0xffff3cd1 │ │ addlt fp, sl, r0, ror r5 │ │ andscs r6, r1, #196608 @ 0x30000 │ │ svclt 0x00482b00 │ │ andmi pc, r0, #131 @ 0x83 │ │ @ instruction: 0xf012e8df │ │ adcseq r0, ip, r2, lsl r0 │ │ adceq r0, r8, sl, rrx │ │ @@ -17992,33 +18106,33 @@ │ │ andeq lr, r0, #3424256 @ 0x344000 │ │ ldmvs r3, {r4, r7, r8, fp, lr}^ │ │ ldrbtmi r2, [r9], #-521 @ 0xfffffdf7 │ │ pop {r1, r3, ip, sp, pc} │ │ @ instruction: 0x47184070 │ │ movwcs lr, #2513 @ 0x9d1 │ │ ldmvs lr, {r2, r9, sl, lr}^ │ │ - blmi fe304e20 │ │ + blmi fe304fe8 │ │ andcs r4, r9, #16, 12 @ 0x1000000 │ │ @ instruction: 0x4619447b │ │ stmibmi r9, {r4, r5, r7, r8, r9, sl, lr} │ │ - bmi fe27c1fc │ │ + bmi fe27c3c4 │ │ andcc pc, sp, sp, lsl #17 │ │ @ instruction: 0xf88d4479 │ │ ldrbtmi r0, [sl], #-12 │ │ movweq pc, #49412 @ 0xc104 @ │ │ strls sl, [r2, #-2050] @ 0xfffff7fe │ │ andls r4, r0, #38797312 @ 0x2500000 │ │ @ instruction: 0xf00d2204 │ │ - @ instruction: 0xf89dfaf3 │ │ + @ instruction: 0xf89dfb93 │ │ stmdacs r0, {r2, r3} │ │ stcls 1, cr13, [r2], {113} @ 0x71 │ │ mulcs sp, sp, r8 │ │ streq r7, [r0], -r0, lsr #21 │ │ teqphi ip, r0, lsl #2 @ p-variant is OBSOLETE │ │ - bcs 46424 │ │ + bcs 465ec │ │ @ instruction: 0xf04f497c │ │ ldrbtmi r0, [fp], #-515 @ 0xfffffdfd │ │ @ instruction: 0x0600e9d4 │ │ svclt 0x00084479 │ │ ldmvs r3!, {r0, r3, r4, r9, sl, lr}^ │ │ andcs fp, r2, #24, 30 @ 0x60 │ │ stmdacs r0, {r3, r4, r7, r8, r9, sl, lr} │ │ @@ -18039,15 +18153,15 @@ │ │ andscs r6, r0, #13828096 @ 0xd30000 │ │ pop {r1, r3, ip, sp, pc} │ │ @ instruction: 0x47184070 │ │ strmi r4, [ip], -r5, lsl #12 │ │ ldrdeq lr, [r0, -r1] │ │ stmiavs fp, {r0, r1, r3, r9, sp}^ │ │ ldrbtmi r4, [r9], #-2541 @ 0xfffff613 │ │ - bllt 1c45508 │ │ + bllt 1c456d0 │ │ strtmi r7, [r0], -r1, lsr #21 │ │ @ instruction: 0xf1000609 │ │ ldmib r0, {r0, r1, r2, r3, r5, r8, pc}^ │ │ andcs r0, r3, #0, 2 │ │ stmibmi r8!, {r0, r1, r3, r6, r7, fp, sp, lr}^ │ │ @ instruction: 0x47984479 │ │ ldmib r4, {r3, r8, r9, fp, ip, sp, pc}^ │ │ @@ -18088,85 +18202,85 @@ │ │ ldmib r4, {r0, r1, r3, r4, r6, r7, r8, ip, lr, pc}^ │ │ stmiavs fp, {r8}^ │ │ ldrbtmi r4, [r9], #-2490 @ 0xfffff646 │ │ ldrmi r2, [r8, r2, lsl #4] │ │ bicsle r2, r2, r0, lsl #16 │ │ movwcs lr, #2516 @ 0x9d4 │ │ ldrdeq lr, [r2, -r5] │ │ - @ instruction: 0xf99cf00c │ │ + blx f6f964 │ │ ldmib r0, {r1, r2, r4, r5, r8, sp, lr, pc}^ │ │ andcs r0, r3, #0, 2 │ │ stmibmi r1, {r0, r1, r3, r6, r7, fp, sp, lr}^ │ │ @ instruction: 0x47984479 │ │ andcs r4, r1, r1, lsl #12 │ │ @ instruction: 0xf0402900 │ │ ldmibmi lr!, {r0, r1, r2, r3, r4, r5, r8, pc} │ │ andls sl, r7, #8192 @ 0x2000 │ │ movwcs lr, #2516 @ 0x9d4 │ │ @ instruction: 0xf88d4479 │ │ stmdage r5, {r3} │ │ movwcs lr, #22989 @ 0x59cd │ │ @ instruction: 0xf00d2207 │ │ - stmdacs r0, {r0, r1, r2, r6, r8, fp, ip, sp, lr, pc} │ │ + stmdacs r0, {r0, r1, r2, r5, r6, r7, r8, fp, ip, sp, lr, pc} │ │ ldmibmi r7!, {r0, r1, r2, r3, r5, r7, r8, ip, lr, pc} │ │ andcs sl, r2, #327680 @ 0x50000 │ │ @ instruction: 0xf00d4479 │ │ - stmdacs r0, {r0, r1, r2, r3, r4, r5, r8, fp, ip, sp, lr, pc} │ │ + stmdacs r0, {r0, r1, r2, r3, r4, r6, r7, r8, fp, ip, sp, lr, pc} │ │ ldmib r5, {r0, r1, r2, r5, r7, r8, ip, lr, pc}^ │ │ - bge 173bc4 │ │ + bge 173d8c │ │ ldrbtmi r4, [fp], #-2994 @ 0xfffff44e │ │ - @ instruction: 0xf970f00c │ │ + blx 46f9bc │ │ orrsle r2, lr, r0, lsl #16 │ │ ldrbtmi r4, [r9], #-2480 @ 0xfffff650 │ │ svclt 0x0000e102 │ │ - @ instruction: 0xfffe31fd │ │ - @ instruction: 0xfffdf518 │ │ - @ instruction: 0xfffe3278 │ │ - @ instruction: 0xfffe3e17 │ │ - @ instruction: 0xfffe5303 │ │ - @ instruction: 0xfffe3df6 │ │ - @ instruction: 0xfffe3208 │ │ - @ instruction: 0xfffe319a │ │ - @ instruction: 0xfffe31f2 │ │ - @ instruction: 0xfffe31b7 │ │ - @ instruction: 0xfffe2e16 │ │ - @ instruction: 0xfffe3d7b │ │ - @ instruction: 0xfffe5279 │ │ - @ instruction: 0xfffe3d58 │ │ - @ instruction: 0xfffe3187 │ │ - @ instruction: 0xfffe30e2 │ │ - @ instruction: 0xfffe30f7 │ │ - @ instruction: 0xfffe30b1 │ │ - @ instruction: 0xfffe313b │ │ - @ instruction: 0xfffe2c10 │ │ - @ instruction: 0xffff3dcb │ │ - @ instruction: 0xfffe3c95 │ │ - @ instruction: 0xfffe3da5 │ │ + @ instruction: 0xfffe3035 │ │ + @ instruction: 0xfffdf350 │ │ + @ instruction: 0xfffe30b0 │ │ + @ instruction: 0xfffe3c4e │ │ + @ instruction: 0xfffe513b │ │ + @ instruction: 0xfffe3c2d │ │ + @ instruction: 0xfffe3040 │ │ + @ instruction: 0xfffe2fd2 │ │ + @ instruction: 0xfffe302a │ │ + @ instruction: 0xfffe2fef │ │ + @ instruction: 0xfffe2c4e │ │ + @ instruction: 0xfffe3bb2 │ │ + @ instruction: 0xfffe50b1 │ │ + @ instruction: 0xfffe3b8f │ │ + @ instruction: 0xfffe2fbf │ │ + @ instruction: 0xfffe2f1a │ │ + @ instruction: 0xfffe2f2f │ │ + @ instruction: 0xfffe2ee9 │ │ + @ instruction: 0xfffe2f73 │ │ + @ instruction: 0xfffe2a48 │ │ + @ instruction: 0xffff3c37 │ │ + @ instruction: 0xfffe3acc │ │ + @ instruction: 0xfffe3bdc │ │ ldrdeq lr, [r0, -r0] │ │ stmiavs fp, {r0, r1, r9, sp}^ │ │ ldrbtmi r4, [r9], #-2422 @ 0xfffff68a │ │ @ instruction: 0x46014798 │ │ stmdbcs r0, {r0, sp} │ │ rschi pc, r0, r0, asr #32 │ │ - bmi 1d45e14 │ │ + bmi 1d45fdc │ │ eoreq pc, r7, sp, lsl #17 │ │ eoreq pc, r7, sp, lsl #2 │ │ andls r4, r4, sl, ror r4 │ │ ldrbtmi sl, [r9], #-2050 @ 0xfffff7fe │ │ @ instruction: 0xce00e9d4 │ │ @ instruction: 0x3602e9d4 │ │ andcs r9, r5, #1610612736 @ 0x60000000 │ │ stmib sp, {r0, r2, ip, pc}^ │ │ stmib sp, {r0, r1, r2, r9, sl, ip, sp}^ │ │ @ instruction: 0xf00dce02 │ │ - stmdacs r0, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc} │ │ + stmdacs r0, {r0, r1, r2, r3, r4, r5, r6, r8, fp, ip, sp, lr, pc} │ │ svcge 0x0047f47f │ │ stmdage r2, {r3, r5, r6, r8, fp, lr} │ │ ldrbtmi r2, [r9], #-514 @ 0xfffffdfe │ │ - @ instruction: 0xf8d6f00d │ │ + @ instruction: 0xf976f00d │ │ @ instruction: 0xf47f2800 │ │ stmdavs r8!, {r1, r2, r3, r4, r5, r8, r9, sl, fp, sp, pc}^ │ │ @ instruction: 0xf7ffa905 │ │ stmdacs r0, {r0, r1, r2, r4, r6, r7, r8, sl, fp, ip, sp, lr, pc} │ │ svcge 0x0037f47f │ │ ldrdeq lr, [r5, -sp] │ │ stmiavs fp, {r1, r9, sp}^ │ │ @@ -18181,24 +18295,24 @@ │ │ eoreq pc, r7, sp, lsl #2 │ │ movwcs r9, #4103 @ 0x1007 │ │ andeq lr, r0, #212, 18 @ 0x350000 │ │ stmib sp, {r0, r3, r4, r5, r6, sl, lr}^ │ │ stmdage r5, {r0, r2, r9} │ │ @ instruction: 0xf88d2207 │ │ @ instruction: 0xf00d3027 │ │ - stmdacs r0, {r0, r3, r5, r7, fp, ip, sp, lr, pc} │ │ + stmdacs r0, {r0, r3, r6, r8, fp, ip, sp, lr, pc} │ │ svcge 0x0011f47f │ │ stmdage r5, {r2, r3, r5, r6, r8, fp, lr} │ │ ldrbtmi r2, [r9], #-514 @ 0xfffffdfe │ │ - @ instruction: 0xf8a0f00d │ │ + @ instruction: 0xf940f00d │ │ @ instruction: 0xf47f2800 │ │ ldmib r5, {r3, r8, r9, sl, fp, sp, pc}^ │ │ - bge 173d00 │ │ + bge 173ec8 │ │ ldrbtmi r4, [fp], #-2919 @ 0xfffff499 │ │ - @ instruction: 0xf8d0f00c │ │ + @ instruction: 0xf970f00c │ │ @ instruction: 0xf47f2800 │ │ stmdbmi r5!, {r1, r2, r3, r4, r5, r6, r7, r9, sl, fp, sp, pc}^ │ │ rsb r4, r1, r9, ror r4 │ │ ldrdeq lr, [r0, -r0] │ │ stmiavs fp, {r0, r1, r9, sp}^ │ │ ldrbtmi r4, [r9], #-2387 @ 0xfffff6ad │ │ @ instruction: 0x46014798 │ │ @@ -18206,285 +18320,159 @@ │ │ ldmdbmi r1, {r1, r2, r3, r5, r6, r8, ip, lr, pc}^ │ │ andls sl, r7, #8192 @ 0x2000 │ │ movwcs lr, #2516 @ 0x9d4 │ │ @ instruction: 0xf88d4479 │ │ stmdage r5, {r3} │ │ movwcs lr, #22989 @ 0x59cd │ │ @ instruction: 0xf00d2207 │ │ - stmdacs r0, {r0, r1, r2, r4, r5, r6, fp, ip, sp, lr, pc} │ │ + stmdacs r0, {r0, r1, r2, r4, r8, fp, ip, sp, lr, pc} │ │ mrcge 4, 6, APSR_nzcv, cr15, cr15, {3} │ │ stmdage r5, {r0, r3, r6, r8, fp, lr} │ │ ldrbtmi r2, [r9], #-514 @ 0xfffffdfe │ │ - @ instruction: 0xf86ef00d │ │ + @ instruction: 0xf90ef00d │ │ @ instruction: 0xf47f2800 │ │ ldmib r5, {r1, r2, r4, r6, r7, r9, sl, fp, sp, pc}^ │ │ - bge 173d68 │ │ + bge 173f30 │ │ ldrbtmi r4, [fp], #-2884 @ 0xfffff4bc │ │ - @ instruction: 0xf89ef00c │ │ + @ instruction: 0xf93ef00c │ │ @ instruction: 0xf47f2800 │ │ stmdbmi r2, {r2, r3, r6, r7, r9, sl, fp, sp, pc}^ │ │ eor r4, pc, r9, ror r4 @ │ │ ldrdeq lr, [r0, -r0] │ │ stmiavs fp, {r0, r1, r9, sp}^ │ │ ldrbtmi r4, [r9], #-2353 @ 0xfffff6cf │ │ @ instruction: 0x46014798 │ │ - bllt ffa7b98c │ │ - bge c5e48 │ │ + bllt ffa7bb54 │ │ + bge c6010 │ │ ldmib r4, {r0, r1, r2, r9, ip, pc}^ │ │ ldrbtmi r2, [r9], #-768 @ 0xfffffd00 │ │ andeq pc, r8, sp, lsl #17 │ │ stmib sp, {r0, r2, fp, sp, pc}^ │ │ andcs r2, r7, #335544320 @ 0x14000000 │ │ - @ instruction: 0xf846f00d │ │ + @ instruction: 0xf8e6f00d │ │ @ instruction: 0xf47f2800 │ │ stmdbmi r8!, {r1, r2, r3, r5, r7, r9, sl, fp, sp, pc} │ │ andcs sl, r2, #327680 @ 0x50000 │ │ @ instruction: 0xf00d4479 │ │ - stmdacs r0, {r0, r2, r3, r4, r5, fp, ip, sp, lr, pc} │ │ + stmdacs r0, {r0, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc} │ │ mcrge 4, 5, pc, cr5, cr15, {3} @ │ │ ldrdeq lr, [r2, -r5] │ │ - blmi 91e1d8 │ │ + blmi 91e3a0 │ │ @ instruction: 0xf00c447b │ │ - stmdacs r0, {r0, r2, r3, r5, r6, fp, ip, sp, lr, pc} │ │ + stmdacs r0, {r0, r2, r3, r8, fp, ip, sp, lr, pc} │ │ mrcge 4, 4, APSR_nzcv, cr11, cr15, {3} │ │ ldrbtmi r4, [r9], #-2336 @ 0xfffff6e0 │ │ andcs sl, r2, #327680 @ 0x50000 │ │ - @ instruction: 0xf82af00d │ │ + @ instruction: 0xf8caf00d │ │ @ instruction: 0xf47f2800 │ │ - bvc fe85f42c │ │ + bvc fe85f5f4 │ │ strle r0, [r6], #-1536 @ 0xfffffa00 │ │ ldrdeq lr, [r0, -r4] │ │ stmiavs fp, {r1, r9, sp}^ │ │ ldrbtmi r4, [r9], #-2316 @ 0xfffff6f4 │ │ ldmib r4, {r0, r2, sp, lr, pc}^ │ │ andcs r0, r1, #0, 2 │ │ stmdbmi r9!, {r0, r1, r3, r6, r7, fp, sp, lr} │ │ @ instruction: 0x47984479 │ │ ldcllt 0, cr11, [r0, #-40]! @ 0xffffffd8 │ │ - @ instruction: 0xfffe5173 │ │ - @ instruction: 0xfffe3c66 │ │ - @ instruction: 0xfffdf1fe │ │ - @ instruction: 0xfffe4f8b │ │ - ldrdeq r6, [sl], -r0 │ │ - @ instruction: 0xfffe3a56 │ │ - @ instruction: 0xfffdf18e │ │ - @ instruction: 0xfffe38e0 │ │ - @ instruction: 0xfffdf39a │ │ - @ instruction: 0xfffe2fbc │ │ - @ instruction: 0xfffe2fb2 │ │ - @ instruction: 0xfffe2fe6 │ │ - @ instruction: 0xfffe3b9b │ │ - @ instruction: 0xfffe5089 │ │ - @ instruction: 0xfffe3b7e │ │ - @ instruction: 0xfffdf0b6 │ │ - @ instruction: 0xfffe4e3d │ │ - @ instruction: 0xfffe3924 │ │ - andeq r6, sl, ip, asr ip │ │ - @ instruction: 0xfffdf05e │ │ - @ instruction: 0xfffe3065 │ │ - @ instruction: 0xfffe3c13 │ │ - @ instruction: 0xfffe5103 │ │ - @ instruction: 0xfffe3bfa │ │ - @ instruction: 0xfffdf11a │ │ - @ instruction: 0xfffe4e9f │ │ - @ instruction: 0xfffe3986 │ │ - @ instruction: 0x000a6cbe │ │ - @ instruction: 0xfffdf0c0 │ │ - @ instruction: 0xfffdf2bc │ │ - @ instruction: 0xfffe503f │ │ - @ instruction: 0xfffe3b28 │ │ - andeq r6, sl, r2, ror #28 │ │ - @ instruction: 0xfffdf266 │ │ - @ instruction: 0xfffdf180 │ │ - @ instruction: 0xfffe4f03 │ │ - @ instruction: 0xfffe39ea │ │ - andeq r6, sl, r2, lsr #26 │ │ - @ instruction: 0xfffdf124 │ │ - @ instruction: 0xfffe38a7 │ │ + @ instruction: 0xfffe4fab │ │ + @ instruction: 0xfffe3a9d │ │ + @ instruction: 0xfffdf036 │ │ + @ instruction: 0xfffe4dc3 │ │ + andeq r6, sl, r8, lsl ip │ │ + @ instruction: 0xfffe388d │ │ + @ instruction: 0xfffdefc6 │ │ + @ instruction: 0xfffe3717 │ │ + @ instruction: 0xfffdf1d2 │ │ + @ instruction: 0xfffe2df4 │ │ + @ instruction: 0xfffe2dea │ │ + @ instruction: 0xfffe2e1e │ │ + @ instruction: 0xfffe39d2 │ │ + @ instruction: 0xfffe4ec1 │ │ + @ instruction: 0xfffe39b5 │ │ + @ instruction: 0xfffdeeee │ │ + @ instruction: 0xfffe4c75 │ │ + @ instruction: 0xfffe375b │ │ + andeq r6, sl, r4, lsr #21 │ │ + @ instruction: 0xfffdee96 │ │ + @ instruction: 0xfffe2e9d │ │ + @ instruction: 0xfffe3a4a │ │ + @ instruction: 0xfffe4f3b │ │ + @ instruction: 0xfffe3a31 │ │ + @ instruction: 0xfffdef52 │ │ + @ instruction: 0xfffe4cd7 │ │ + @ instruction: 0xfffe37bd │ │ + andeq r6, sl, r6, lsl #22 │ │ + @ instruction: 0xfffdeef8 │ │ + @ instruction: 0xfffdf0f4 │ │ + @ instruction: 0xfffe4e77 │ │ + @ instruction: 0xfffe395f │ │ + andeq r6, sl, sl, lsr #25 │ │ + @ instruction: 0xfffdf09e │ │ + @ instruction: 0xfffdefb8 │ │ + @ instruction: 0xfffe4d3b │ │ + @ instruction: 0xfffe3821 │ │ + andeq r6, sl, sl, ror #22 │ │ + @ instruction: 0xfffdef5c │ │ + @ instruction: 0xfffe36de │ │ @ instruction: 0x4604b510 │ │ @ instruction: 0xf0a42048 │ │ - @ instruction: 0xb128eea2 │ │ + smlawtlt r8, lr, sp, lr │ │ strmi r6, [r4], -r1, lsr #16 │ │ - blx fee6fabc │ │ + blx fee6fc84 │ │ ldclt 6, cr4, [r0, #-128] @ 0xffffff80 │ │ cmpcs r8, r8 │ │ - @ instruction: 0xf9b3f00a │ │ - svcmi 0x00f0e92d │ │ - strmi fp, [r0], r9, lsl #1 │ │ - andcc r6, r1, r0, asr #18 │ │ - andseq pc, r4, r8, asr #17 │ │ - addhi pc, ip, r0, asr #1 │ │ - strcs r2, [ip, #-0] │ │ - andeq pc, r0, r8, asr #17 │ │ - @ instruction: 0xf8c84607 │ │ - strcs r0, [r1], #-4 │ │ - @ instruction: 0xf0a44628 │ │ - stmdacs r0, {r1, r7, r9, sl, fp, sp, lr, pc} │ │ - sbcshi pc, sl, r0 │ │ - andcs r1, r0, #1, 26 @ 0x40 │ │ - strtmi r2, [r6], -r8, lsl #6 │ │ - stccs 8, cr15, [r4], {65} @ 0x41 │ │ - stmia r1!, {r0, r9, sl, fp, ip, sp}^ │ │ - mvnsle r3, r3, lsl #4 │ │ - @ instruction: 0xf8d84621 │ │ - ldrtmi r2, [ip], r8 │ │ - ldmib r8, {r0, r2, r9, ip, pc}^ │ │ - stmib r8, {r0, r1, r9, ip, sp, lr}^ │ │ - bl b7b28 │ │ - @ instruction: 0xf8cd0042 │ │ - bl 213ba8 │ │ - @ instruction: 0xf8c80580 │ │ - @ instruction: 0xf1a54010 │ │ - andls r0, r7, ip │ │ - ldrtmi r2, [sl], r0 │ │ - mvnlt r9, r6, lsl #14 │ │ - bl fe899f5c │ │ - teqlt r0, sl, lsl #12 │ │ - tstle sp, r1, asr #11 │ │ - svceq 0x0000f1bb │ │ - @ instruction: 0xf0a4bf18 │ │ - strmi lr, [sl, #3642]! @ 0xe3a │ │ - addhi pc, fp, r0 │ │ - @ instruction: 0xf8514651 │ │ - @ instruction: 0xf1bbbb0c │ │ - rsble r4, pc, r0, lsl #30 │ │ - andeq lr, r1, #3571712 @ 0x368000 │ │ - strmi r3, [sl], ip, lsl #28 │ │ - stmiaeq r2, {r8, r9, fp, sp, lr, pc}^ │ │ - stmdacs r0, {r0, r7, r9, sl, lr} │ │ - strb sp, [ip, r6, ror #3]! │ │ - @ instruction: 0xf0002800 │ │ - strbmi r8, [r1, #132] @ 0x84 │ │ - rsbs sp, ip, r4, lsl #2 │ │ - @ instruction: 0xf8d19908 │ │ - stmdbvs ip, {lr, pc} │ │ - ldrdvs pc, [r0], -r9 │ │ - cmppmi r5, r7, asr #12 @ p-variant is OBSOLETE │ │ - smlalbtvc pc, sl, r7, r6 @ │ │ - b 84960 │ │ - addmi r0, ip, #12, 2 │ │ - bls 26a174 │ │ - cmpeq r1, r1, lsl #22 │ │ - ldrd pc, [r4], -r9 │ │ - @ instruction: 0xf85268d2 │ │ - bl bfc38 │ │ - ldmvs r7, {r0, r7, r9} │ │ - mulle lr, pc, r2 @ │ │ - @ instruction: 0xf1096851 │ │ - @ instruction: 0xf8410908 │ │ - bl 8bca4 │ │ - @ instruction: 0xf8c101c7 │ │ - ldclne 0, cr14, [r9], #-16 │ │ - svcls 0x00066091 │ │ - @ instruction: 0xd1b12f00 │ │ - andls lr, r4, lr, asr #15 │ │ - @ instruction: 0xf8cd4610 │ │ - stmib sp, {r2, r3, lr, pc}^ │ │ - @ instruction: 0xf0132e01 │ │ - ldmib sp, {r1, r4, r7, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ - ldmib sp, {r0, r9, sl, fp, sp}^ │ │ - strb ip, [r3, r3]! │ │ - movwcs r2, #8448 @ 0x2100 │ │ - strcs r2, [r0, -r1, lsl #4] │ │ - blx fe92bc1e │ │ - stmdaeq r0, {r0, r1, r8, sl, sp, lr}^ │ │ - strpl pc, [r7, #-2819] @ 0xfffff4fd │ │ - strpl pc, [r7, -r3, lsl #22] │ │ - @ instruction: 0x07c64633 │ │ - blx fe927fea │ │ - stmdacs r1, {r1, r9, sl, lr} │ │ - blx 127c32 │ │ - blx 20c026 │ │ - strtmi r1, [r2], -r2, lsl #2 │ │ - cdpne 7, 6, cr14, cr7, cr11, {7} │ │ - andeq pc, r0, pc, asr #32 │ │ - andeq pc, r0, r0, ror #2 │ │ - andvc lr, r0, r8, asr #19 │ │ - adccs pc, sl, sl, asr #12 │ │ - adccs pc, sl, r0, asr #13 │ │ - stmdble fp!, {r2, r7, r9, lr} │ │ - @ instruction: 0xf9fef00a │ │ - andsle r4, r2, sp, lsl #5 │ │ - adccs pc, fp, sl, asr #12 │ │ - ldreq pc, [r0], #-266 @ 0xfffffef6 │ │ - adccs pc, sl, sl, asr #13 │ │ - smlatbeq r0, r6, fp, pc @ │ │ - @ instruction: 0xf85408cd │ │ - stmdacs r0, {r2, sl, fp} │ │ - stmdavs r0!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ - stc 0, cr15, [lr, #656]! @ 0x290 │ │ - stccc 4, cr3, [r1, #-48] @ 0xffffffd0 │ │ - stmdals r5, {r0, r2, r4, r5, r6, r7, r8, ip, lr, pc} │ │ - ldrtmi fp, [r8], -r8, asr #2 │ │ - pop {r0, r3, ip, sp, pc} │ │ - @ instruction: 0xf0a44ff0 │ │ - strmi fp, [r7], -r9, asr #26 │ │ - svceq 0x0000f1bb │ │ - strdlt sp, [r9], -r5 │ │ - svchi 0x00f0e8bd │ │ - strmi r4, [r8], -fp, lsl #20 │ │ - ldrbtmi r4, [sl], #-1569 @ 0xfffff9df │ │ - cdp2 0, 15, cr15, cr0, cr11, {0} │ │ - bl 16022c │ │ - addeq r0, r5, r4, asr #32 │ │ - @ instruction: 0xf0a44628 │ │ - stmdacs r0, {r3, r5, r7, r8, sl, fp, sp, lr, pc} │ │ - svcge 0x0026f47f │ │ - strtmi r2, [r9], -r4 │ │ - @ instruction: 0xf97af00a │ │ - andcs r2, r4, r0, lsl #2 │ │ - svclt 0x0000e729 │ │ - andeq r6, sl, lr, ror #27 │ │ + blx 152fcb8 │ │ svcmi 0x00f0e92d │ │ @ instruction: 0x4604b091 │ │ andcc r6, r1, r0, asr #18 │ │ @ instruction: 0xf0c06160 │ │ andcs r8, r0, r2, asr #1 │ │ eorvs r2, r0, ip, lsl #10 │ │ rsbvs r4, r0, r7, lsl #12 │ │ stmdbeq r1, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ @ instruction: 0xf0a44628 │ │ - stmdacs r0, {r3, r7, r8, sl, fp, sp, lr, pc} │ │ + stmdacs r0, {r4, r5, r7, r8, sl, fp, sp, lr, pc} │ │ tstphi r5, r0 @ p-variant is OBSOLETE │ │ andcs r1, r0, #1, 26 @ 0x40 │ │ strbmi r2, [lr], -r8, lsl #6 │ │ stccs 8, cr15, [r4], {65} @ 0x41 │ │ stmia r1!, {r0, r9, sl, fp, ip, sp}^ │ │ mvnsle r3, r3, lsl #4 │ │ stmiavs r2!, {r0, r3, r6, r9, sl, lr} │ │ andls r4, r5, #199229440 @ 0xbe00000 │ │ andvs lr, r3, #212, 18 @ 0x350000 │ │ andne lr, r2, r4, asr #19 │ │ subeq lr, r2, r2, lsl #22 │ │ - bl 1d8d30 │ │ + bl 1d8d00 │ │ @ instruction: 0xf8c40080 │ │ @ instruction: 0xf1a09010 │ │ andls r0, r7, ip, lsl #8 │ │ ldrtmi r2, [r2], r0 │ │ strls r9, [r4], #-1544 @ 0xfffff9f8 │ │ @ instruction: 0xf8ddb39e │ │ - bl fe957da4 │ │ + bl fe957d74 │ │ orrlt r0, r0, sl, lsl #12 │ │ andle r4, r9, r0, ror #11 │ │ movweq pc, #49416 @ 0xc108 @ │ │ umlalseq lr, r0, r8, r8 │ │ cdpeq 1, 3, cr15, cr8, cr13, {0} │ │ stm lr, {r1, r2, r3, r8, r9, fp, lr, pc} │ │ ldmiblt r7, {r1, r2, r3}^ │ │ svceq 0x0000f1bb │ │ @ instruction: 0xf0a4bf18 │ │ - strbmi lr, [sl, #3382] @ 0xd36 │ │ + strbmi lr, [sl, #3414] @ 0xd56 │ │ adcshi pc, r9, r0 │ │ @ instruction: 0xf8514651 │ │ @ instruction: 0xf1bbbb0c │ │ @ instruction: 0xf0004f00 │ │ ldmib sl, {r0, r2, r3, r4, r7, pc}^ │ │ cdpcc 0, 0, cr8, cr12, cr1, {0} │ │ subeq lr, r0, r0, lsl #22 │ │ - bl 2457a4 │ │ + bl 245774 │ │ strbmi r0, [r0], -r0, asr #25 │ │ bicsle r2, r9, r0, lsl #16 │ │ strls lr, [r9], #-2025 @ 0xfffff817 │ │ stmdbls r6, {r0, r1, r8, sl, ip, pc} │ │ ldrd pc, [r0], -r1 │ │ @ instruction: 0x9010f8d1 │ │ stmdacs r0, {r1, r2, r4, sp, lr, pc} │ │ @@ -18499,111 +18487,237 @@ │ │ strgt r0, [lr], #-1080 @ 0xfffffbc8 │ │ svccs 0x0000bf18 │ │ addhi pc, pc, r0 │ │ @ instruction: 0xf6479a09 │ │ @ instruction: 0xf6c74155 │ │ cdpge 1, 0, cr7, cr14, cr10, {2} │ │ cmpmi r1, #2560 @ 0xa00 │ │ - b a7708 │ │ + b a76d8 │ │ strbgt r0, [ip], #-270 @ 0xfffffef2 │ │ vrshl.s8 d20, d9, d16 │ │ @ instruction: 0xf8cd8088 │ │ - bl a3e08 │ │ - bls 1b42f0 │ │ - bl ce138 │ │ + bl a3dd8 │ │ + bls 1b42c0 │ │ + bl ce108 │ │ @ instruction: 0xf8520581 │ │ stmiavs r9!, {r0, r5, ip, sp} │ │ mlale r2, r9, r2, r4 │ │ ldrbtmi r9, [r3], -ip, lsl #20 │ │ strtmi r6, [lr], lr, ror #16 │ │ - bl 9860c │ │ + bl 985dc │ │ stcls 2, cr0, [r9, #-260] @ 0xfffffefc │ │ ldmdaeq r8, {r3, r8, ip, sp, lr, pc} │ │ eorspl pc, r2, r6, asr #16 │ │ - bl 1baf4c │ │ + bl 1baf1c │ │ @ instruction: 0xf8ce01c2 │ │ stcne 0, cr5, [sl, #-32] @ 0xffffffe0 │ │ ldrmi r9, [lr], r3, lsl #26 │ │ strgt lr, [sl], #-2525 @ 0xfffff623 │ │ adcne lr, r0, r2, lsl #17 │ │ tstvs ip, r1, lsl #20 │ │ cdpls 1, 0, cr6, cr8, cr10, {2} │ │ ldrdgt pc, [r8], -sp │ │ cdpcs 12, 0, cr9, cr0, cr4, {0} │ │ svcge 0x0077f47f │ │ andls lr, r1, r9, lsr #15 │ │ ldrbtmi r4, [r6], -r8, lsr #12 │ │ @ instruction: 0xf7ff460c │ │ - stmdals r1, {r2, r3, r4, r5, r7, r8, fp, ip, sp, lr, pc} │ │ + stmdals r1, {r0, r1, r2, r3, r8, r9, fp, ip, sp, lr, pc} │ │ ldrtmi r4, [r6], r1, lsr #12 │ │ ldrdcs lr, [r0, -r2] │ │ andcs r2, r1, #134217728 @ 0x8000000 │ │ and r2, r7, r0, lsl #14 │ │ strvs pc, [r3, #-2979] @ 0xfffff45d │ │ - blx f5f6a │ │ - blx 10928a │ │ + blx f5f3a │ │ + blx 10925a │ │ ldrtmi r5, [r3], -r7, lsl #14 │ │ rscsle r0, r5, r6, asr #15 │ │ strls pc, [r2], -r3, lsr #23 │ │ andle r2, r5, r1, lsl #16 │ │ tstpvs r1, r3, lsl #22 @ p-variant is OBSOLETE │ │ tstpne r2, r7, lsl #22 @ p-variant is OBSOLETE │ │ strb r4, [fp, sl, asr #12]! │ │ @ instruction: 0x0701f1b9 │ │ andeq pc, r0, pc, asr #32 │ │ andeq pc, r0, r0, ror #2 │ │ andvc lr, r0, r4, asr #19 │ │ adccs pc, sl, sl, asr #12 │ │ adccs pc, sl, r0, asr #13 │ │ stmdble ip!, {r0, r7, r8, sl, lr} │ │ - @ instruction: 0xf8ccf00a │ │ + blx 1a6fea0 │ │ andsle r4, r2, r9, lsl #11 │ │ adccs pc, fp, sl, asr #12 │ │ ldreq pc, [r0], #-266 @ 0xfffffef6 │ │ adccs pc, sl, sl, asr #13 │ │ smlatbeq r0, r6, fp, pc @ │ │ @ instruction: 0xf85408cd │ │ stmdacs r0, {r2, sl, fp} │ │ stmdavs r0!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ - ldcl 0, cr15, [ip], #-656 @ 0xfffffd70 │ │ + ldc 0, cr15, [ip], {164} @ 0xa4 │ │ stccc 4, cr3, [r1, #-48] @ 0xffffffd0 │ │ stmdals r5, {r0, r2, r4, r5, r6, r7, r8, ip, lr, pc} │ │ stmdals r8, {r4, r6, r8, ip, sp, pc} │ │ pop {r0, r4, ip, sp, pc} │ │ @ instruction: 0xf0a44ff0 │ │ - @ instruction: 0xf1bbbc17 │ │ + @ instruction: 0xf1bbbc37 │ │ andle r0, r1, r0, lsl #30 │ │ - stcl 0, cr15, [ip], #-656 @ 0xfffffd70 │ │ + stc 0, cr15, [ip], {164} @ 0xa4 │ │ pop {r0, r4, ip, sp, pc} │ │ - bmi 357eb4 │ │ + bmi 357e84 │ │ strbmi r4, [r9], -r8, lsl #12 │ │ @ instruction: 0xf00b447a │ │ - @ instruction: 0xf1b9fdbd │ │ + @ instruction: 0xf1b9ff59 │ │ andle r0, ip, r0, lsl #30 │ │ subeq lr, r9, r9, lsl #22 │ │ strtmi r0, [r8], -r5, lsl #1 │ │ - ldcl 0, cr15, [r2], #-656 @ 0xfffffd70 │ │ + ldc 0, cr15, [sl], {164} @ 0xa4 │ │ @ instruction: 0xf47f2800 │ │ andcs sl, r4, fp, ror #29 │ │ @ instruction: 0xf00a4629 │ │ - tstpcs r0, r5, asr #16 @ p-variant is OBSOLETE │ │ + smlattcs r0, r1, r9, pc @ │ │ strbt r2, [lr], r4 │ │ - andeq r6, sl, r8, lsl #23 │ │ + andeq r6, sl, r8, asr #23 │ │ + svcmi 0x00f0e92d │ │ + strmi fp, [r0], r9, lsl #1 │ │ + andcc r6, r1, r0, asr #18 │ │ + andseq pc, r4, r8, asr #17 │ │ + addhi pc, ip, r0, asr #1 │ │ + strcs r2, [ip, #-0] │ │ + andeq pc, r0, r8, asr #17 │ │ + @ instruction: 0xf8c84607 │ │ + strcs r0, [r1], #-4 │ │ + @ instruction: 0xf0a44628 │ │ + stmdacs r0, {r1, r3, r4, r5, r6, sl, fp, sp, lr, pc} │ │ + sbcshi pc, sl, r0 │ │ + andcs r1, r0, #1, 26 @ 0x40 │ │ + strtmi r2, [r6], -r8, lsl #6 │ │ + stccs 8, cr15, [r4], {65} @ 0x41 │ │ + stmia r1!, {r0, r9, sl, fp, ip, sp}^ │ │ + mvnsle r3, r3, lsl #4 │ │ + @ instruction: 0xf8d84621 │ │ + ldrtmi r2, [ip], r8 │ │ + ldmib r8, {r0, r2, r9, ip, pc}^ │ │ + stmib r8, {r0, r1, r9, ip, sp, lr}^ │ │ + bl b7f58 │ │ + @ instruction: 0xf8cd0042 │ │ + bl 213fd8 │ │ + @ instruction: 0xf8c80580 │ │ + @ instruction: 0xf1a54010 │ │ + andls r0, r7, ip │ │ + ldrtmi r2, [sl], r0 │ │ + mvnlt r9, r6, lsl #14 │ │ + bl fe89a38c │ │ + teqlt r0, sl, lsl #12 │ │ + tstle sp, r1, asr #11 │ │ + svceq 0x0000f1bb │ │ + @ instruction: 0xf0a4bf18 │ │ + strmi lr, [sl, #3114]! @ 0xc2a │ │ + addhi pc, fp, r0 │ │ + @ instruction: 0xf8514651 │ │ + @ instruction: 0xf1bbbb0c │ │ + rsble r4, pc, r0, lsl #30 │ │ + andeq lr, r1, #3571712 @ 0x368000 │ │ + strmi r3, [sl], ip, lsl #28 │ │ + stmiaeq r2, {r8, r9, fp, sp, lr, pc}^ │ │ + stmdacs r0, {r0, r7, r9, sl, lr} │ │ + strb sp, [ip, r6, ror #3]! │ │ + @ instruction: 0xf0002800 │ │ + strbmi r8, [r1, #132] @ 0x84 │ │ + rsbs sp, ip, r4, lsl #2 │ │ + @ instruction: 0xf8d19908 │ │ + stmdbvs ip, {lr, pc} │ │ + ldrdvs pc, [r0], -r9 │ │ + cmppmi r5, r7, asr #12 @ p-variant is OBSOLETE │ │ + smlalbtvc pc, sl, r7, r6 @ │ │ + b 84d90 │ │ + addmi r0, ip, #12, 2 │ │ + bls 26a5a4 │ │ + cmpeq r1, r1, lsl #22 │ │ + ldrd pc, [r4], -r9 │ │ + @ instruction: 0xf85268d2 │ │ + bl c0068 │ │ + ldmvs r7, {r0, r7, r9} │ │ + mulle lr, pc, r2 @ │ │ + @ instruction: 0xf1096851 │ │ + @ instruction: 0xf8410908 │ │ + bl 8c0d4 │ │ + @ instruction: 0xf8c101c7 │ │ + ldclne 0, cr14, [r9], #-16 │ │ + svcls 0x00066091 │ │ + @ instruction: 0xd1b12f00 │ │ + andls lr, r4, lr, asr #15 │ │ + @ instruction: 0xf8cd4610 │ │ + stmib sp, {r2, r3, lr, pc}^ │ │ + @ instruction: 0xf0132e01 │ │ + ldmib sp, {r4, r7, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ + ldmib sp, {r0, r9, sl, fp, sp}^ │ │ + strb ip, [r3, r3]! │ │ + movwcs r2, #8448 @ 0x2100 │ │ + strcs r2, [r0, -r1, lsl #4] │ │ + blx fe92c04e │ │ + stmdaeq r0, {r0, r1, r8, sl, sp, lr}^ │ │ + strpl pc, [r7, #-2819] @ 0xfffff4fd │ │ + strpl pc, [r7, -r3, lsl #22] │ │ + @ instruction: 0x07c64633 │ │ + blx fe92841a │ │ + stmdacs r1, {r1, r9, sl, lr} │ │ + blx 128062 │ │ + blx 20c456 │ │ + strtmi r1, [r2], -r2, lsl #2 │ │ + cdpne 7, 6, cr14, cr7, cr11, {7} │ │ + andeq pc, r0, pc, asr #32 │ │ + andeq pc, r0, r0, ror #2 │ │ + andvc lr, r0, r8, asr #19 │ │ + adccs pc, sl, sl, asr #12 │ │ + adccs pc, sl, r0, asr #13 │ │ + stmdble fp!, {r2, r7, r9, lr} │ │ + @ instruction: 0xf96af00a │ │ + andsle r4, r2, sp, lsl #5 │ │ + adccs pc, fp, sl, asr #12 │ │ + ldreq pc, [r0], #-266 @ 0xfffffef6 │ │ + adccs pc, sl, sl, asr #13 │ │ + smlatbeq r0, r6, fp, pc @ │ │ + @ instruction: 0xf85408cd │ │ + stmdacs r0, {r2, sl, fp} │ │ + stmdavs r0!, {r2, r3, r4, r8, r9, sl, fp, ip, sp, pc} │ │ + bl fe7f0328 │ │ + stccc 4, cr3, [r1, #-48] @ 0xffffffd0 │ │ + stmdals r5, {r0, r2, r4, r5, r6, r7, r8, ip, lr, pc} │ │ + ldrtmi fp, [r8], -r8, asr #2 │ │ + pop {r0, r3, ip, sp, pc} │ │ + @ instruction: 0xf0a44ff0 │ │ + @ instruction: 0x4607bb39 │ │ + svceq 0x0000f1bb │ │ + strdlt sp, [r9], -r5 │ │ + svchi 0x00f0e8bd │ │ + strmi r4, [r8], -fp, lsl #20 │ │ + ldrbtmi r4, [sl], #-1569 @ 0xfffff9df │ │ + cdp2 0, 5, cr15, cr12, cr11, {0} │ │ + bl 16065c │ │ + addeq r0, r5, r4, asr #32 │ │ + @ instruction: 0xf0a44628 │ │ + stmdacs r0, {r5, r7, r8, r9, fp, sp, lr, pc} │ │ + svcge 0x0026f47f │ │ + strtmi r2, [r9], -r4 │ │ + @ instruction: 0xf8e6f00a │ │ + andcs r2, r4, r0, lsl #2 │ │ + svclt 0x0000e729 │ │ + andeq r6, sl, lr, asr #19 │ │ svcmi 0x00f0e92d │ │ strmi fp, [r4], -r1, lsl #1 │ │ subsmi pc, r5, r7, asr #12 │ │ subvc pc, sl, r7, asr #13 │ │ cmpmi r0, #2555904 @ 0x270000 │ │ eorsmi r6, r8, r1, lsr #18 │ │ ldmdble r0, {r0, r7, r9, lr}^ │ │ - bl 4e2e4 │ │ - bl 1f404c │ │ + bl 4e4ac │ │ + bl 1f4214 │ │ strcs r0, [r0, -r0, lsl #17] │ │ stmdbeq r1, {r3, r4, r6, r7, r8, fp, sp, lr, pc} │ │ - beq ff2ae894 │ │ + beq ff2aea5c │ │ ldrmi r4, [sl, #1598]! @ 0x63e │ │ stmibne r5, {r0, r3, ip, lr, pc} │ │ stmdavs sp!, {r0, r1, r2, r7, r8, fp, ip, lr}^ │ │ subsmi r4, sp, r7, asr r0 │ │ @ instruction: 0xf106432f │ │ mvnsle r0, r8, lsl #14 │ │ stmibvs r7!, {r0, r4, sp, lr, pc} │ │ @@ -18611,52 +18725,52 @@ │ │ @ instruction: 0x61a51c7d │ │ eorle r4, r6, r1, ror #11 │ │ eorscs pc, r9, r0, asr #16 │ │ sbceq lr, r9, r0, lsl #22 │ │ @ instruction: 0xf1096043 │ │ @ instruction: 0xf8c80001 │ │ strbeq r0, [r8, -r8]! │ │ - bl feae8fb4 │ │ - blx fec33fb4 │ │ + bl feae917c │ │ + blx fec3417c │ │ stmdbeq r0, {r7, ip, sp, lr, pc}^ │ │ pop {r0, ip, sp, pc} │ │ @ instruction: 0xf44f8ff0 │ │ - blx 192196 │ │ + blx 19235e │ │ @ instruction: 0xf0a1f008 │ │ - stmibvs r1!, {r1, r5, r7, r8, sl, fp, sp, lr, pc}^ │ │ + stmibvs r1!, {r1, r2, r6, r7, sl, fp, sp, lr, pc}^ │ │ stmible lr!, {r3, r7, r9, lr}^ │ │ @ instruction: 0xf7ff4620 │ │ - stmdbvs r1!, {r0, r2, r7, r8, sl, fp, ip, sp, lr, pc} │ │ + stmdbvs r1!, {r0, r3, r4, r5, r7, r9, sl, fp, ip, sp, lr, pc} │ │ stmdbcs r0, {r0, r2, r5, r7, r8, fp, sp, lr} │ │ stmdami fp, {r0, r4, r5, r6, r7, r8, ip, lr, pc} │ │ @ instruction: 0xf00c4478 │ │ - @ instruction: 0x4640fcfd │ │ + @ instruction: 0x4640fd9d │ │ ldrmi r9, [pc], -r0, lsl #2 │ │ @ instruction: 0xf0134693 │ │ - stmdbls r0, {r1, r3, r4, r7, r8, sl, fp, ip, sp, lr, pc} │ │ + stmdbls r0, {r2, r3, r6, r7, r9, sl, fp, ip, sp, lr, pc} │ │ @ instruction: 0xf8d8465a │ │ ldrtmi r0, [fp], -r4 │ │ - bmi edf18 │ │ + bmi ee0e0 │ │ @ instruction: 0xf00b447a │ │ - svclt 0x0000fd45 │ │ - andeq r6, sl, r8, lsr #21 │ │ - ldrdeq r6, [sl], -r8 │ │ + svclt 0x0000fde5 │ │ + strdeq r6, [sl], -r0 │ │ + andeq r6, sl, r0, lsr #18 │ │ ldmib r1, {r4, r5, r7, r8, sl, ip, sp, pc}^ │ │ andcs r4, r9, #0 │ │ stmdbmi r8, {r0, r1, r6, r7, fp, sp, lr} │ │ ldrbtmi r4, [r9], #-1568 @ 0xfffff9e0 │ │ @ instruction: 0x4798461d │ │ andcs fp, r1, r8, lsl #2 │ │ stmdbmi r5, {r4, r5, r7, r8, sl, fp, ip, sp, pc} │ │ andcs r4, r7, #32, 12 @ 0x2000000 │ │ ldrbtmi r4, [r9], #-1579 @ 0xfffff9d5 │ │ ldrhtmi lr, [r0], sp │ │ svclt 0x00004718 │ │ - @ instruction: 0xfffde0ec │ │ - @ instruction: 0xfffdea1d │ │ + @ instruction: 0xfffddf24 │ │ + @ instruction: 0xfffde855 │ │ svcmi 0x00f0e92d │ │ @ instruction: 0x4604b09b │ │ ldm pc, {r3, fp, ip, sp, lr}^ @ │ │ eoreq pc, r0, r0, lsl r0 @ │ │ eoreq r0, r0, r0, lsr #32 │ │ eoreq r0, r0, r0, lsr #32 │ │ subeq r0, r8, r0, lsr #32 │ │ @@ -18670,163 +18784,163 @@ │ │ eoreq r0, r0, r0, lsr #32 │ │ subseq r0, r2, r4, lsl #1 │ │ eoreq r0, r7, r5, ror #2 │ │ cmpeq r7, r0, lsr #32 │ │ tsteq r3, sl, asr r1 │ │ strtmi r0, [r0], -r6, asr #1 │ │ @ instruction: 0xf0a02248 │ │ - andslt pc, fp, r9, ror #27 │ │ + andslt pc, fp, lr, lsr #30 │ │ svchi 0x00f0e8bd │ │ strmi r2, [lr], -r8, asr #32 │ │ - bl fecf0320 │ │ + b ff7f04e8 │ │ @ instruction: 0xf0002800 │ │ ldmdavs r1!, {r0, r2, r4, r5, r6, r7, r9, pc}^ │ │ @ instruction: 0xf7ff4605 │ │ andscs pc, sl, r7, asr #31 │ │ eorvc r6, r0, r5, rrx │ │ pop {r0, r1, r3, r4, ip, sp, pc} │ │ ldmib r1, {r4, r5, r6, r7, r8, r9, sl, fp, pc}^ │ │ strmi r6, [r8], r2, lsl #10 │ │ @ instruction: 0x9010f8d1 │ │ @ instruction: 0xf0002d00 │ │ @ instruction: 0x46288179 │ │ - bl fe6f0350 │ │ + b ff1f0518 │ │ @ instruction: 0xf0002800 │ │ strmi r8, [r7], -r6, asr #2 │ │ @ instruction: 0xf8d1e171 │ │ stmdavs r8, {r2, r3, r4, sp, pc}^ │ │ svcmi 0x0000f1b0 │ │ msrhi CPSR_, r0, asr #32 │ │ strmi pc, [r0, #-79] @ 0xffffffb1 │ │ @ instruction: 0xf8d1e24e │ │ @ instruction: 0xf641800c │ │ vmvn.i32 q10, #1 @ 0x00000001 │ │ strmi r1, [r0, #199] @ 0xc7 │ │ tstphi r2, r0, lsl #4 @ p-variant is OBSOLETE │ │ sbceq lr, r8, r8, lsl #22 │ │ - beq ff06ea74 │ │ + beq ff06ec3c │ │ addshi pc, r8, #0 │ │ ldrdls pc, [r8], -r1 │ │ tstcs r8, r0, asr r6 │ │ - stc2 0, cr15, [ip], {13} │ │ + stc2 0, cr15, [ip], #52 @ 0x34 │ │ @ instruction: 0xf0002800 │ │ @ instruction: 0x468382bd │ │ svceq 0x0000f1b8 │ │ addshi pc, r6, #0 │ │ strcs sl, [r0], -r8, lsl #30 │ │ ldrmi r4, [r2, #1605]! @ 0x645 │ │ - bl 2a8158 │ │ + bl 2a8320 │ │ ldrtmi r0, [r8], -r6, lsl #2 │ │ @ instruction: 0xff80f7ff │ │ andeq lr, r6, fp, lsl #22 │ │ subcs r4, r8, #59768832 @ 0x3900000 │ │ - stc2 0, cr15, [lr, #640] @ 0x280 │ │ + cdp2 0, 13, cr15, cr3, cr0, {5} │ │ stccc 6, cr3, [r1, #-288] @ 0xfffffee0 │ │ strbmi sp, [r0], -pc, ror #3 │ │ @ instruction: 0xf8d1e281 │ │ @ instruction: 0xf641800c │ │ vmvn.i32 q10, #1 @ 0x00000001 │ │ strmi r1, [r0, #199] @ 0xc7 │ │ rschi pc, r0, r0, lsl #4 │ │ sbceq lr, r8, r8, lsl #22 │ │ - beq ff06ead8 │ │ + beq ff06eca0 │ │ rsbhi pc, sl, #0 │ │ ldrdls pc, [r8], -r1 │ │ tstcs r8, r0, asr r6 │ │ - blx ff6f01a2 │ │ + ldc2l 0, cr15, [sl], #-52 @ 0xffffffcc │ │ @ instruction: 0xf0002800 │ │ strmi r8, [r3], fp, lsl #5 │ │ svceq 0x0000f1b8 │ │ rsbhi pc, lr, #0 │ │ strcs sl, [r0], -r8, lsl #30 │ │ ldrmi r4, [r2, #1605]! @ 0x645 │ │ - bl 2a81bc │ │ + bl 2a8384 │ │ ldrtmi r0, [r8], -r6, lsl #2 │ │ @ instruction: 0xff4ef7ff │ │ andeq lr, r6, fp, lsl #22 │ │ subcs r4, r8, #59768832 @ 0x3900000 │ │ - ldc2l 0, cr15, [ip, #-640] @ 0xfffffd80 │ │ + cdp2 0, 10, cr15, cr1, cr0, {5} │ │ stccc 6, cr3, [r1, #-288] @ 0xfffffee0 │ │ strbmi sp, [r0], -pc, ror #3 │ │ ldmib r1, {r0, r3, r4, r6, r9, sp, lr, pc}^ │ │ strmi r6, [r8], r2, lsl #10 │ │ @ instruction: 0x9010f8d1 │ │ @ instruction: 0xf0002d00 │ │ strtmi r8, [r8], -r5, lsl #2 │ │ - bl 77044c │ │ + b 1270614 │ │ @ instruction: 0xf0002800 │ │ strmi r8, [r7], -r8, asr #1 │ │ ldmib r1, {r0, r2, r3, r4, r5, r6, r7, sp, lr, pc}^ │ │ strmi r7, [r8], sp, lsl #10 │ │ @ instruction: 0xf0002d00 │ │ strtmi r8, [r8], -r9, lsl #2 │ │ - bl 3f0468 │ │ + b ef0630 │ │ @ instruction: 0xf0002800 │ │ @ instruction: 0x460680ba │ │ ldmib r1, {r0, r8, sp, lr, pc}^ │ │ strmi r6, [r8], r2, lsl #10 │ │ @ instruction: 0x9010f8d1 │ │ @ instruction: 0xf0002d00 │ │ strtmi r8, [r8], -sl, lsr #2 │ │ - b ffff0488 │ │ + b af0650 │ │ @ instruction: 0xf0002800 │ │ strmi r8, [r7], -sl, lsr #1 │ │ ldmib r1, {r1, r5, r8, sp, lr, pc}^ │ │ strmi r6, [r8], r2, lsl #10 │ │ @ instruction: 0x9010f8d1 │ │ @ instruction: 0xf0002d00 │ │ strtmi r8, [r8], -r4, lsr #2 │ │ - b ffbf04a8 │ │ + b 6f0670 │ │ @ instruction: 0xf0002800 │ │ @ instruction: 0x4607809a │ │ ldmib r1, {r2, r3, r4, r8, sp, lr, pc}^ │ │ strmi r6, [r8], r2, lsl #10 │ │ @ instruction: 0x9010f8d1 │ │ @ instruction: 0xf0002d00 │ │ @ instruction: 0x4628811e │ │ - b ff7f04c8 │ │ + b 2f0690 │ │ @ instruction: 0xf0002800 │ │ strmi r8, [r7], -sl, lsl #1 │ │ ldmib r1, {r1, r2, r4, r8, sp, lr, pc}^ │ │ strmi r6, [r8], r2, lsl #10 │ │ @ instruction: 0x9010f8d1 │ │ @ instruction: 0xf0002d00 │ │ @ instruction: 0x46288118 │ │ - b ff3f04e8 │ │ + ldmib sl!, {r2, r5, r7, ip, sp, lr, pc}^ │ │ rsbsle r2, sl, r0, lsl #16 │ │ tst r1, r7, lsl #12 │ │ strvc lr, [sp, #-2513] @ 0xfffff62f │ │ stccs 6, cr4, [r0, #-544] @ 0xfffffde0 │ │ tstphi r5, r0 @ p-variant is OBSOLETE │ │ @ instruction: 0xf0a44628 │ │ - stmdacs r0, {r1, r6, r7, r9, fp, sp, lr, pc} │ │ + stmdacs r0, {r1, r2, r3, r5, r6, r7, r8, fp, sp, lr, pc} │ │ strmi sp, [r6], -sp, rrx │ │ ldmib r1, {r1, r2, r3, r8, sp, lr, pc}^ │ │ strmi r6, [r8], r2, lsl #10 │ │ @ instruction: 0x9010f8d1 │ │ @ instruction: 0xf0002d00 │ │ strtmi r8, [r8], -sp, asr #2 │ │ - b fecf0520 │ │ + ldmib lr, {r2, r5, r7, ip, sp, lr, pc}^ │ │ subsle r2, lr, r0, lsl #16 │ │ cmp r6, r7, lsl #12 │ │ @ instruction: 0xa01cf8d1 │ │ @ instruction: 0xf1b06848 │ │ cmple r8, r0, lsl #30 │ │ strmi pc, [r0, #-79] @ 0xffffffb1 │ │ ldmib r1, {r1, r7, r8, sp, lr, pc}^ │ │ strmi r6, [r8], r2, lsl #10 │ │ @ instruction: 0x9010f8d1 │ │ @ instruction: 0xf0002d00 │ │ @ instruction: 0x4628813f │ │ - b fe6f0550 │ │ + stmib r6, {r2, r5, r7, ip, sp, lr, pc}^ │ │ suble r2, r6, r0, lsl #16 │ │ teq r8, r7, lsl #12 │ │ strmi r2, [pc], -r8, asr #32 │ │ @ instruction: 0xf0a4688e │ │ - stmdacs r0, {r1, r4, r7, r9, fp, sp, lr, pc} │ │ + stmdacs r0, {r1, r2, r3, r4, r5, r7, r8, fp, sp, lr, pc} │ │ bicshi pc, r4, r0 │ │ @ instruction: 0x46056879 │ │ mcr2 7, 5, pc, cr6, cr15, {7} @ │ │ strpl lr, [r1], -r4, asr #19 │ │ eorvc r2, r0, ip, lsl r0 │ │ pop {r0, r1, r3, r4, ip, sp, pc} │ │ @ instruction: 0xf8518ff0 │ │ @@ -18835,69 +18949,69 @@ │ │ teqphi r0, r0 @ p-variant is OBSOLETE │ │ @ instruction: 0xf7ff4608 │ │ ldrd pc, [ip, -r3]! │ │ ldrdhi pc, [ip], -r1 │ │ rsbsmi pc, r1, r1, asr #12 │ │ sbcne pc, r7, r0, asr #5 │ │ stmdble r2!, {r7, r8, sl, lr} │ │ - cdp2 0, 9, cr15, cr4, cr9, {0} │ │ + @ instruction: 0xff34f009 │ │ strvs lr, [r2, #-2513] @ 0xfffff62f │ │ stccs 6, cr4, [r0, #-60] @ 0xffffffc4 │ │ msrhi CPSR_s, r0 │ │ tstcs r1, r8, lsr #12 │ │ - blx ffef0360 │ │ + blx fe6f052a │ │ stmdacs r0, {r7, r9, sl, lr} │ │ tstphi lr, r0, asr #32 @ p-variant is OBSOLETE │ │ ldmib r1, {r0, r2, r3, sp, lr, pc}^ │ │ strmi r6, [pc], -r2, lsl #10 │ │ @ instruction: 0xf0002d00 │ │ strtmi r8, [r8], -pc, lsr #2 │ │ @ instruction: 0xf00d2101 │ │ - strmi pc, [r0], fp, ror #21 │ │ + strmi pc, [r0], fp, lsl #23 │ │ @ instruction: 0xf0402800 │ │ andcs r8, r1, r9, lsr #2 │ │ @ instruction: 0xf0094629 │ │ - bl 273bf8 │ │ - b 17f4680 │ │ + bl 274040 │ │ + b 17f4848 │ │ @ instruction: 0xf0000ac0 │ │ @ instruction: 0xf8d1816b │ │ ldrbmi r9, [r0], -r8 │ │ @ instruction: 0xf00d2108 │ │ - stmdacs r0, {r0, r1, r2, r4, r6, r7, r9, fp, ip, sp, lr, pc} │ │ + stmdacs r0, {r0, r1, r2, r4, r5, r6, r8, r9, fp, ip, sp, lr, pc} │ │ orrhi pc, r8, r0 │ │ @ instruction: 0xf1b84683 │ │ @ instruction: 0xf0000f00 │ │ svcge 0x00088175 │ │ strbmi r2, [r5], -r0, lsl #12 │ │ @ instruction: 0xd00d45b2 │ │ tsteq r6, r9, lsl #22 │ │ @ instruction: 0xf7ff4638 │ │ - bl 333cc4 │ │ + bl 333e8c │ │ ldrtmi r0, [r9], -r6 │ │ @ instruction: 0xf0a02248 │ │ - @ instruction: 0x3648fc59 │ │ + @ instruction: 0x3648fd9e │ │ mvnle r3, r1, lsl #26 │ │ cmn r0, r0, asr #12 │ │ ldrtmi r2, [r8], -r1, lsl #14 │ │ @ instruction: 0x462a4631 │ │ - @ instruction: 0xf809f0a1 │ │ + cdp2 0, 11, cr15, cr7, cr0, {5} │ │ strpl lr, [r1, -r4, asr #19] │ │ sbc r2, r4, r8, lsl #2 │ │ ldrtmi r2, [r8], -r1, lsl #14 │ │ @ instruction: 0x462a4631 │ │ - @ instruction: 0xfffff0a0 │ │ + cdp2 0, 10, cr15, cr13, cr0, {5} │ │ mulseq r4, r8, r8 │ │ stmib r4, {r0, r1, r2, r8, sp}^ │ │ stmib r4, {r0, r8, r9, sl, ip, lr}^ │ │ eorvc r5, r1, r3, lsl #18 │ │ andslt r7, fp, r0, lsr #10 │ │ svchi 0x00f0e8bd │ │ ldrtmi r2, [r0], -r1, lsl #12 │ │ @ instruction: 0x462a4639 │ │ - @ instruction: 0xffedf0a0 │ │ + cdp2 0, 9, cr15, cr11, cr0, {5} │ │ ldrdeq lr, [sl, -r8] │ │ stmdbeq r8!, {r2, r8, ip, sp, lr, pc} │ │ andscc lr, r0, #216, 18 @ 0x360000 │ │ rsbeq lr, r3, r9, lsl #17 │ │ mulseq r4, r8, r8 │ │ andscc lr, r0, #196, 18 @ 0x310000 │ │ mlavc r4, r8, r8, pc @ │ │ @@ -18914,49 +19028,49 @@ │ │ ands pc, r8, r4, asr #17 │ │ @ instruction: 0x73226121 │ │ eorvc r6, r0, r3, lsr #1 │ │ pop {r0, r1, r3, r4, ip, sp, pc} │ │ @ instruction: 0x27018ff0 │ │ @ instruction: 0x46314638 │ │ @ instruction: 0xf0a0462a │ │ - stmib r4, {r2, r3, r4, r5, r7, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ + stmib r4, {r1, r3, r5, r6, r9, sl, fp, ip, sp, lr, pc}^ │ │ tstcs r9, r1, lsl #14 │ │ smlsdxcs r1, r7, r0, lr │ │ @ instruction: 0x46314638 │ │ @ instruction: 0xf0a0462a │ │ - stmib r4, {r1, r4, r5, r7, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ + stmib r4, {r5, r6, r9, sl, fp, ip, sp, lr, pc}^ │ │ tstcs r1, r1, lsl #14 │ │ strcs lr, [r1, -sp, rrx] │ │ @ instruction: 0x46314638 │ │ @ instruction: 0xf0a0462a │ │ - stmib r4, {r3, r5, r7, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ + stmib r4, {r1, r2, r4, r6, r9, sl, fp, ip, sp, lr, pc}^ │ │ tstcs r2, r1, lsl #14 │ │ strcs lr, [r1, -r3, rrx] │ │ @ instruction: 0x46314638 │ │ @ instruction: 0xf0a0462a │ │ - stmib r4, {r1, r2, r3, r4, r7, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ + stmib r4, {r2, r3, r6, r9, sl, fp, ip, sp, lr, pc}^ │ │ tstcs sl, r1, lsl #14 │ │ @ instruction: 0x2601e059 │ │ @ instruction: 0x46394630 │ │ @ instruction: 0xf0a0462a │ │ - ldmib r8, {r2, r4, r7, r8, r9, sl, fp, ip, sp, lr, pc}^ │ │ + ldmib r8, {r1, r6, r9, sl, fp, ip, sp, lr, pc}^ │ │ subcs sl, r8, sl, lsl #2 │ │ ldrdlt pc, [r0], -r8 @ │ │ @ instruction: 0xf8d89101 │ │ tstls r7, r8 │ │ mulne ip, r8, r8 │ │ @ instruction: 0xf8d89106 │ │ tstls r5, r0, lsl r0 │ │ mulsne r4, r8, r8 │ │ @ instruction: 0xf8d89104 │ │ tstls r3, r8, lsl r0 │ │ mulsne ip, r8, r8 │ │ @ instruction: 0xf8989102 │ │ @ instruction: 0xf0a49024 │ │ - stmdacs r0, {r1, r2, r3, r7, r8, fp, sp, lr, pc} │ │ + stmdacs r0, {r1, r3, r4, r5, r7, fp, sp, lr, pc} │ │ sbcshi pc, r0, r0 │ │ ldrdne pc, [r0], #-136 @ 0xffffff78 │ │ @ instruction: 0xf7ff4607 │ │ stmdals r1, {r0, r5, r7, r8, sl, fp, ip, sp, lr, pc} │ │ msreq CPSR_fs, r4, lsl #2 │ │ eorge pc, r8, r4, asr #17 │ │ stmdals r2, {r0, r5, r6, r8, lr, pc} │ │ @@ -18969,69 +19083,69 @@ │ │ strtvs r6, [r7], #-933 @ 0xfffffc5b │ │ eorls pc, r4, r4, lsl #17 │ │ eorlt pc, r0, r4, asr #17 │ │ andslt r7, fp, r0, lsr #32 │ │ svchi 0x00f0e8bd │ │ ldrtmi r2, [r8], -r1, lsl #14 │ │ @ instruction: 0x462a4631 │ │ - @ instruction: 0xff4df0a0 │ │ + ldc2l 0, cr15, [fp, #640]! @ 0x280 │ │ strpl lr, [r1, -r4, asr #19] │ │ and r2, r8, r3, lsl r1 │ │ ldrtmi r2, [r8], -r1, lsl #14 │ │ @ instruction: 0x462a4631 │ │ - @ instruction: 0xff43f0a0 │ │ + ldc2l 0, cr15, [r1, #640]! @ 0x280 │ │ strpl lr, [r1, -r4, asr #19] │ │ stmib r4, {r2, r4, r8, sp}^ │ │ @ instruction: 0xf8985903 │ │ eorvc r0, r1, r4, lsl r0 │ │ andslt r7, fp, r0, lsr #10 │ │ svchi 0x00f0e8bd │ │ stmib r4, {sp}^ │ │ andscs r5, sp, r1 │ │ andslt r7, fp, r0, lsr #32 │ │ svchi 0x00f0e8bd │ │ stmdaeq r1, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ ldrtmi r4, [r1], -r0, asr #12 │ │ @ instruction: 0xf0a0462a │ │ - ldrtmi pc, [r9], -r8, lsr #30 @ │ │ + @ instruction: 0x4639fdd6 │ │ @ instruction: 0xf1b06908 │ │ tstle r2, r0, lsl #30 │ │ strmi pc, [r0, -pc, asr #32] │ │ ldmib r1, {r1, r2, r3, r5, sp, lr, pc}^ │ │ strmi r9, [fp], r5, lsl #14 │ │ @ instruction: 0x4638b31f │ │ @ instruction: 0xf00d2101 │ │ - strmi pc, [r6], -r3, asr #19 │ │ + strmi pc, [r6], -r3, ror #20 │ │ @ instruction: 0xe018b9f0 │ │ stmdaeq r1, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ ldrtmi r4, [r1], -r0, asr #12 │ │ @ instruction: 0xf0a0462a │ │ - ldrtmi pc, [r9], -lr, lsl #30 @ │ │ + @ instruction: 0x4639fdbc │ │ @ instruction: 0xf1b06908 │ │ tstle r2, r0, lsl #30 │ │ strmi pc, [r0, -pc, asr #32] │ │ ldmib r1, {r0, r2, r5, sp, lr, pc}^ │ │ strmi r9, [fp], r5, lsl #14 │ │ @ instruction: 0x4638b1d7 │ │ @ instruction: 0xf00d2101 │ │ - strmi pc, [r6], -r9, lsr #19 │ │ + strmi pc, [r6], -r9, asr #20 │ │ andcs fp, r1, r8, lsr #19 │ │ @ instruction: 0xf0094639 │ │ - strcs pc, [r1], -r7, ror #25 │ │ + strcs pc, [r1], -r7, lsl #27 │ │ @ instruction: 0x46494630 │ │ @ instruction: 0xf0a0463a │ │ - @ instruction: 0x4659fef2 │ │ + ldrbmi pc, [r9], -r0, lsr #27 @ │ │ andseq pc, r4, r4, lsl #2 │ │ stmdapl r1, {r2, r6, r7, r8, fp, sp, lr, pc} │ │ strbeq lr, [r0], #2176 @ 0x880 │ │ mlaeq r0, r1, r8, pc @ │ │ and r2, pc, r6, lsl #2 │ │ ldrtmi r2, [r0], -r1, lsl #12 │ │ ldrtmi r4, [sl], -r9, asr #12 │ │ - cdp2 0, 14, cr15, cr1, cr0, {5} │ │ + stc2 0, cr15, [pc, #640] @ 34a50 │ │ @ instruction: 0xf1044659 │ │ stmib r4, {r2, r4}^ │ │ stm r0, {r0, fp, ip, lr} │ │ @ instruction: 0xf89104c0 │ │ tstcs r0, r0, lsr #32 │ │ strpl lr, [r3, -r4, asr #19] │ │ @ instruction: 0xf8847021 │ │ @@ -19055,126 +19169,246 @@ │ │ svchi 0x00f0e8bd │ │ stmib r4, {sp}^ │ │ andscs r0, r9, r1, lsl #22 │ │ andhi pc, ip, r4, asr #17 │ │ andslt r7, fp, r0, lsr #32 │ │ svchi 0x00f0e8bd │ │ cmpcs r8, r8 │ │ - blx ff5306ae │ │ + ldc2l 0, cr15, [r3], #-36 @ 0xffffffdc │ │ ldrbmi r2, [r1], -r8 │ │ - stc2 0, cr15, [ip], {9} │ │ + stc2 0, cr15, [ip, #-36]! @ 0xffffffdc │ │ + strdlt fp, [r3], r0 │ │ + strmi r6, [ip], sl, lsl #16 │ │ + ldrdcc lr, [r3, -r2] │ │ + addmi r6, ip, #84, 18 @ 0x150000 │ │ + vhsub.s8 , q0, q4 │ │ + @ instruction: 0x26010e13 │ │ + cdpeq 2, 8, cr15, cr0, cr0, {6} │ │ + @ instruction: 0xf1a55d1d │ │ + svccs 0x00170709 │ │ + blx 1ea8ac │ │ + b 6324a0 │ │ + andle r0, r6, lr, lsl #30 │ │ + cmpvs r4, r1, lsl #8 │ │ + mvnsle r4, r1, lsr #5 │ │ + strmi r4, [ip], -r5, lsl #12 │ │ + ldclcs 0, cr14, [sp, #-204]! @ 0xffffff34 │ │ + tstcs r0, r4, lsl #2 │ │ + andvc r7, r1, r1, asr #32 │ │ + ldcllt 0, cr11, [r0, #12]! │ │ + mulvs r4, ip, r8 │ │ + andcs fp, r0, #-2147483635 @ 0x8000000d │ │ + @ instruction: 0xf88c2d22 │ │ + andsle r2, sp, r4 │ │ + subs r2, r8, r1, lsl r2 │ │ + cmple r5, ip, lsr #26 │ │ + cmpvs r4, r1, lsl #8 │ │ + eorsle r4, r3, #140, 4 @ 0xc0000008 │ │ + stceq 0, cr15, [r1], {79} @ 0x4f │ │ + @ instruction: 0xf1a55d1d │ │ + cdpcs 6, 1, cr0, cr9, cr9, {0} │ │ + blx 36a990 │ │ + b 6324f0 │ │ + andle r0, r7, lr, lsl #30 │ │ + cmpvs r4, r1, lsl #8 │ │ + mvnsle r4, r1, lsr #5 │ │ + strmi r4, [ip], -r5, lsl #12 │ │ + and r2, r9, r5 │ │ + @ instruction: 0xd1202e19 │ │ + subvc r2, r1, r1, lsl #2 │ │ + andvc r2, r1, r0, lsl #2 │ │ + ldcllt 0, cr11, [r0, #12]! │ │ + andcs r4, r3, r5, lsl #12 │ │ + stclne 0, cr9, [r2], #-0 │ │ + addmi r4, sl, #24, 12 @ 0x1800000 │ │ + strmi fp, [sl], -r8, lsr #30 │ │ + @ instruction: 0xf942f041 │ │ + strmi r4, [fp], -r2, lsl #12 │ │ + @ instruction: 0x46684611 │ │ + @ instruction: 0xf041461a │ │ + strmi pc, [r1], -r9, asr #19 │ │ + rsbvs r4, r9, r8, lsr #12 │ │ + andvc r2, r1, r1, lsl #2 │ │ + ldcllt 0, cr11, [r0, #12]! │ │ + andcs r4, r5, r5, lsl #12 │ │ + strmi lr, [r6], -r6, ror #15 │ │ + svclt 0x00142d7d │ │ + andscs r2, r5, r1, lsl r0 │ │ + stclne 0, cr9, [r2], #-0 │ │ + addmi r4, sl, #24, 12 @ 0x1800000 │ │ + strmi fp, [sl], -r8, lsr #30 │ │ + @ instruction: 0xf924f041 │ │ + strmi r4, [fp], -r2, lsl #12 │ │ + @ instruction: 0x46684611 │ │ + @ instruction: 0xf041461a │ │ + strmi pc, [r1], -fp, lsr #19 │ │ + rsbsvs r4, r1, r0, lsr r6 │ │ + andvc r2, r1, r1, lsl #2 │ │ + ldcllt 0, cr11, [r0, #12]! │ │ + andls r2, r0, #8, 4 @ 0x80000000 │ │ + strmi r1, [r4], -r2, ror #24 │ │ + addmi r4, sl, #24, 12 @ 0x1800000 │ │ + strmi fp, [sl], -r8, lsr #30 │ │ + @ instruction: 0xf90cf041 │ │ + strmi r4, [fp], -r2, lsl #12 │ │ + @ instruction: 0x46684611 │ │ + @ instruction: 0xf041461a │ │ + @ instruction: 0x4601f993 │ │ + rsbvs r4, r1, r0, lsr #12 │ │ + andvc r2, r1, r1, lsl #2 │ │ + ldcllt 0, cr11, [r0, #12]! │ │ stmdavs sp, {r4, r5, r7, r8, sl, ip, sp, pc} │ │ strtmi r4, [r8], -r4, lsl #12 │ │ - stc2l 0, cr15, [lr, #-168]! @ 0xffffff58 │ │ + stc2l 0, cr15, [r2], #-168 @ 0xffffff58 │ │ tstcs r6, r8, lsl r1 │ │ eorvc r6, r1, r0, rrx │ │ @ instruction: 0x4620bdb0 │ │ pop {r0, r3, r5, r9, sl, lr} │ │ @ instruction: 0xf7ed40b0 │ │ - ldrble fp, [r4], #3779 @ 0xec3 │ │ + ldrble fp, [r4], #3417 @ 0xd59 │ │ svcmi 0x00f0e92d │ │ - strmi fp, [r4], -r9, lsl #1 │ │ - stmdacs r8, {r1, r4, fp, ip, pc} │ │ - stmdavs r8, {r3, r4, r5, r6, r8, ip, lr, pc} │ │ - stmdacs r0, {r0, r2, r3, r9, sl, lr} │ │ - andcs sp, r8, r9, rrx │ │ - ldmdavs lr, {r0, r4, r7, r9, sl, lr} │ │ - stmdaeq r8, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ - @ instruction: 0xf0a4685f │ │ - stmdacs r0, {r1, r2, r3, r7, fp, sp, lr, pc} │ │ - andcs sp, r0, #117 @ 0x75 │ │ + strmi fp, [r0], fp, lsl #1 │ │ + stmdacs r8, {r2, r4, fp, ip, pc} │ │ + sbchi pc, r8, r0, asr #32 │ │ + strmi r6, [sp], -r8, lsl #16 │ │ + @ instruction: 0xf0002800 │ │ + strhcs r8, [r8], -r8 @ │ │ + ldmdavs ip, {r1, r4, r7, r9, sl, lr} │ │ + ldmdavs pc, {r3, r9, sl, sp}^ @ │ │ + svc 0x0018f0a3 │ │ + @ instruction: 0xf0002800 │ │ + andcs r8, r0, #196 @ 0xc4 │ │ stmib sp, {r0, r3, r5, r6, fp, sp, lr}^ │ │ - @ instruction: 0xf10d8200 │ │ - strmi r0, [r5], -r8, lsl #16 │ │ - subvs r6, r7, r6 │ │ - andscs r4, r0, #64, 12 @ 0x4000000 │ │ - @ instruction: 0xf015462b │ │ - @ instruction: 0x4628fb99 │ │ - stmda r2!, {r2, r5, r7, ip, sp, lr, pc}^ │ │ - ldmib sp, {r2, r8, r9, sl, fp, sp, pc}^ │ │ - svcgt 0x00c22002 │ │ - tstle r3, r1, lsl #20 │ │ - andlt ip, r9, r3, asr #9 │ │ - svchi 0x00f0e8bd │ │ - stmdbcs r8, {r5, r8, r9, ip, sp, pc} │ │ - svccs 0x0001d14c │ │ - @ instruction: 0xf8d0d943 │ │ - stmdavs r0, {sp, pc}^ │ │ - @ instruction: 0xb000f8b6 │ │ - strmi pc, [r0, #-128] @ 0xffffff80 │ │ - stmdbeq r0, {r0, r3, r4, r6, r7, r8, fp, sp, lr, pc} │ │ + bge 10d1f4 │ │ + andvs r4, r4, r5, lsl #12 │ │ + ldrmi r6, [r0], -r7, asr #32 │ │ + @ instruction: 0x462b2210 │ │ + blx fe670a5a │ │ + @ instruction: 0xf0a34628 │ │ + ldmib sp, {r1, r2, r5, r6, r7, r9, sl, fp, sp, lr, pc}^ │ │ + stcls 6, cr1, [r7, #-20] @ 0xffffffec │ │ + ldrdcs lr, [r3], -sp │ │ + tstle r6, r1, lsl #20 │ │ + subeq lr, r3, r8, lsl #17 │ │ + andpl pc, ip, r8, asr #17 │ │ + pop {r0, r1, r3, ip, sp, pc} │ │ + mvnlt r8, #240, 30 @ 0x3c0 │ │ + @ instruction: 0xf0402908 │ │ + stccs 0, cr8, [r1, #-604] @ 0xfffffda4 │ │ + addhi pc, sp, r0, asr #4 │ │ + ldrdls pc, [r0], -r0 │ │ + ldmdahi r7!, {r6, fp, sp, lr} │ │ + strmi pc, [r0], #-128 @ 0xffffff80 │ │ + bleq 6f1ac │ │ + beq 4b1348 │ │ + beq 7156c │ │ @ instruction: 0xb1206800 │ │ - @ instruction: 0x462b4652 │ │ - blx ffdf273a │ │ - stmdage r4, {r3, r5, r8, r9, ip, sp, pc} │ │ - stm r0, {r0, r3, r6, r9, sl, lr} │ │ - @ instruction: 0xf10808c0 │ │ - ldrbmi r0, [r2], -r8 │ │ - strtmi r9, [r0], -r0 │ │ - stmib sp, {r0, r1, r3, r5, r9, sl, lr}^ │ │ - @ instruction: 0xf001a502 │ │ - strdlt pc, [r9], -r9 │ │ - svchi 0x00f0e8bd │ │ - @ instruction: 0x261c201c │ │ - stmda r6, {r2, r5, r7, ip, sp, lr, pc}^ │ │ - ldmdbmi ip, {r3, r4, r7, r8, r9, ip, sp, pc} │ │ + strtmi r4, [r3], -sl, asr #12 │ │ + blx 1372a56 │ │ + ldmib fp, {r4, r6, r7, r8, r9, ip, sp, pc}^ │ │ + bge 238a60 │ │ + andcs lr, r0, sp, asr #19 │ │ + strbmi sl, [sl], -r3, lsl #16 │ │ + strls r4, [sl, -r3, lsr #12] │ │ + strvs lr, [r8, #-2509] @ 0xfffff633 │ │ + mrc2 0, 1, pc, cr12, cr3, {0} │ │ + @ instruction: 0xf89d9903 │ │ + ldrbmi r0, [r1, #-16] │ │ + @ instruction: 0x07c0d130 │ │ + @ instruction: 0xf8dbd026 │ │ + ldmib r0, {r3}^ │ │ + tstcc r1, r1, lsl #4 │ │ + addsmi r6, r1, #65 @ 0x41 │ │ + andcs sp, r0, r8, lsr r9 │ │ + andge pc, r0, r8, asr #17 │ │ + andeq pc, r4, r8, lsl #17 │ │ + pop {r0, r1, r3, ip, sp, pc} │ │ + @ instruction: 0x201c8ff0 │ │ + @ instruction: 0xf0a3261c │ │ + stmdacs r0, {r1, r2, r4, r5, r7, r9, sl, fp, sp, lr, pc} │ │ + ldmdbmi r5!, {r0, r2, r5, r6, ip, lr, pc} │ │ @ instruction: 0x4605221c │ │ @ instruction: 0xf0a04479 │ │ - andcs pc, sp, sl, lsr #28 │ │ - strpl lr, [r2], -r4, asr #19 │ │ - andeq pc, r0, r8, asr #5 │ │ - streq lr, [r0], -r4, asr #19 │ │ - pop {r0, r3, ip, sp, pc} │ │ - strdcs r8, [sp], -r0 │ │ + andscs pc, r1, sl, lsl ip @ │ │ + strpl lr, [r2], -r8, asr #19 │ │ andeq pc, r0, r8, asr #5 │ │ - eorvs r3, r0, r4 │ │ - @ instruction: 0x71202001 │ │ - pop {r0, r3, ip, sp, pc} │ │ - ldmdami r3, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ + stmib r8, {r2, fp, ip, sp}^ │ │ + andlt r0, fp, r0, lsl #12 │ │ + svchi 0x00f0e8bd │ │ + andge pc, r0, r8, asr #17 │ │ + @ instruction: 0xf8882001 │ │ + andlt r0, fp, r4 │ │ + svchi 0x00f0e8bd │ │ + @ instruction: 0x2011f8dd │ │ + @ instruction: 0xf8dd9f06 │ │ + @ instruction: 0xf8c83015 │ │ + @ instruction: 0xf8c8700c │ │ + @ instruction: 0xf8c83009 │ │ + @ instruction: 0xf8882005 │ │ + @ instruction: 0xf8c80004 │ │ + andlt r1, fp, r0 │ │ + svchi 0x00f0e8bd │ │ + addsmi r6, r1, #12713984 @ 0xc20000 │ │ + stmdavs r0, {r0, r4, r8, fp, ip, lr, pc} │ │ + @ instruction: 0x5600e9d0 │ │ + stmdavs r8!, {r0, r1, r2, r3, r5, r7, fp, sp, lr} │ │ + andsle r4, r2, r7, lsl #5 │ │ + ldclne 8, cr6, [r9], #-416 @ 0xfffffe60 │ │ + eorsls pc, r7, r0, asr #16 │ │ + sbceq lr, r7, r0, lsl #22 │ │ + subvs r6, r4, r9, lsr #1 │ │ + addmi r6, r1, #48, 16 @ 0x300000 │ │ + @ instruction: 0x2001d8b1 │ │ + andge pc, r0, r8, asr #17 │ │ + andeq pc, r4, r8, lsl #17 │ │ + pop {r0, r1, r3, ip, sp, pc} │ │ + qsub8mi r8, r8, r0 │ │ + ldc2 7, cr15, [sl], {254} @ 0xfe │ │ + ldmdami r3, {r3, r5, r6, r7, r8, r9, sl, sp, lr, pc} │ │ @ instruction: 0xf00b4478 │ │ - blmi 4f2cd4 │ │ + blmi 4f2f3c │ │ mrscs r2, (UNDEF: 2) │ │ - ldrbtmi r4, [fp], #-1594 @ 0xfffff9c6 │ │ - @ instruction: 0xf8fcf00b │ │ - bge c67e0 │ │ + ldrbtmi r4, [fp], #-1578 @ 0xfffff9d6 │ │ + @ instruction: 0xf8acf00b │ │ + bge 106b88 │ │ stmdbmi fp, {r1, r3, r8, r9, fp, lr} │ │ ldrbtmi r4, [fp], #-1144 @ 0xfffffb88 │ │ tstls r0, r9, ror r4 │ │ @ instruction: 0xf00c212b │ │ - andcs pc, r1, r5, ror lr @ │ │ + andcs pc, r1, r5, lsr #28 │ │ @ instruction: 0xf0092108 │ │ - andcs pc, r1, fp, ror #23 │ │ + mulcs r1, fp, fp │ │ @ instruction: 0xf009211c │ │ - svclt 0x0000fbe7 │ │ - @ instruction: 0xfffe2300 │ │ - @ instruction: 0xfffe4ccb │ │ - muleq sl, r2, r1 │ │ - @ instruction: 0x000a62b0 │ │ - @ instruction: 0x000a63b0 │ │ - andeq r6, sl, r2, lsl #5 │ │ + svclt 0x0000fb97 │ │ + @ instruction: 0xfffe1fbc │ │ + @ instruction: 0xfffe4923 │ │ + andeq r5, sl, sl, asr #27 │ │ + andeq r5, sl, r8, lsl pc │ │ + andeq r6, sl, r8, lsl r0 │ │ + andeq r5, sl, sl, ror #29 │ │ svcmi 0x00f0e92d │ │ strmi fp, [r2], sp, lsl #1 │ │ stmdacs r8, {r1, r2, r4, fp, ip, pc} │ │ sbcshi pc, r0, r0, asr #32 │ │ strmi r6, [sp], -r8, lsl #16 │ │ @ instruction: 0xf0002800 │ │ andcs r8, r8, r0, asr #1 │ │ ldmdavs ip, {r0, r4, r7, r9, sl, lr} │ │ ldmdavs lr, {r3, r8, r9, sl, sp}^ │ │ - svc 0x00ecf0a3 │ │ + cdp 0, 2, cr15, cr8, cr3, {5} │ │ @ instruction: 0xf0002800 │ │ andcs r8, r0, #204 @ 0xcc │ │ stmib sp, {r0, r3, r5, r6, fp, sp, lr}^ │ │ - bge 1d102c │ │ + bge 1d13d4 │ │ andvs r4, r4, r5, lsl #12 │ │ ldrmi r6, [r0], -r6, asr #32 │ │ @ instruction: 0x462b2210 │ │ - blx ffe70890 │ │ + blx fea70c38 │ │ @ instruction: 0xf0a34628 │ │ - ldmib sp, {r1, r6, r7, r8, r9, sl, fp, sp, lr, pc}^ │ │ + ldmib sp, {r1, r2, r4, r5, r6, r7, r8, sl, fp, sp, lr, pc}^ │ │ stcls 7, cr1, [sl, #-32] @ 0xffffffe0 │ │ ldrdcs lr, [r6], -sp │ │ tstle r6, r1, lsl #20 │ │ addeq lr, r3, sl, lsl #17 │ │ andpl pc, ip, sl, asr #17 │ │ pop {r0, r2, r3, ip, sp, pc} │ │ mvnlt r8, #240, 30 @ 0x3c0 │ │ @@ -19185,40 +19419,40 @@ │ │ stmdavs r0, {r0, r4, sl, sp}^ │ │ streq pc, [r0], #-712 @ 0xfffffd38 │ │ stmdami r0, {r7, ip, sp, lr, pc} │ │ @ instruction: 0x0600e9d9 │ │ @ instruction: 0x9000f8b7 │ │ @ instruction: 0xb1206800 │ │ @ instruction: 0x4643465a │ │ - blx 137288e │ │ + blx 1772c34 │ │ ldmib r6, {r4, r6, r7, r8, r9, ip, sp, pc}^ │ │ - bge f8898 │ │ + bge f8c40 │ │ andcs lr, r0, sp, asr #19 │ │ ldrbmi sl, [sl], -r6, lsl #16 │ │ @ instruction: 0xf8cd4643 │ │ stmib sp, {r2, r4, ip, pc}^ │ │ @ instruction: 0xf0137503 │ │ - stmdbls r6, {r0, r1, r3, r4, r7, r8, sl, fp, ip, sp, lr, pc} │ │ + stmdbls r6, {r0, r1, r3, r6, r8, sl, fp, ip, sp, lr, pc} │ │ mulseq ip, sp, r8 │ │ @ instruction: 0xd12f42a1 │ │ eorle r0, r5, r0, asr #15 │ │ ldmib r6, {r1, r2, r4, r5, r7, fp, sp, lr}^ │ │ andcc r0, r1, ip, lsl #2 │ │ addmi r6, r8, #48, 6 @ 0xc0000000 │ │ andcs sp, r0, r8, lsr r9 │ │ andmi pc, r0, sl, asr #17 │ │ andeq pc, r4, sl, lsl #17 │ │ pop {r0, r2, r3, ip, sp, pc} │ │ @ instruction: 0x201c8ff0 │ │ @ instruction: 0xf0a3261c │ │ - stmdacs r0, {r1, r3, r7, r8, r9, sl, fp, sp, lr, pc} │ │ + stmdacs r0, {r1, r2, r6, r7, r8, sl, fp, sp, lr, pc} │ │ ldmdbmi r9!, {r0, r2, r3, r5, r6, ip, lr, pc} │ │ @ instruction: 0x4605221c │ │ @ instruction: 0xf0a04479 │ │ - andscs pc, r1, ip, ror #26 │ │ + andscs pc, r1, sl, lsr #22 │ │ strpl lr, [r2], -sl, asr #19 │ │ andeq pc, r0, r8, asr #5 │ │ stmib sl, {r2, fp, ip, sp}^ │ │ andlt r0, sp, r0, lsl #12 │ │ svchi 0x00f0e8bd │ │ andmi pc, r0, sl, asr #17 │ │ @ instruction: 0xf88a2001 │ │ @@ -19234,71 +19468,197 @@ │ │ andlt r1, sp, r0 │ │ svchi 0x00f0e8bd │ │ addmi r6, r8, #181248 @ 0x2c400 │ │ ldmib r6, {r0, r2, r3, r4, r8, fp, ip, lr, pc}^ │ │ stmdage r6, {r0, r3, r9, ip} │ │ eorls pc, r0, sp, asr #17 │ │ strvc lr, [r6, #-2509] @ 0xfffff633 │ │ - ldc2 0, cr15, [r0, #148]! @ 0x94 │ │ + stc2l 0, cr15, [r4], #148 @ 0x94 │ │ ldrtmi r4, [r0], -r2, lsl #12 │ │ @ instruction: 0xf7ff460b │ │ - cmnplt r0, r5, ror #21 @ p-variant is OBSOLETE │ │ - bvs ffc5ed7c │ │ + ldrshlt pc, [r0, #-149]! @ 0xffffff6b @ │ │ + bvs ffc5f124 │ │ @ instruction: 0xf8cd3108 │ │ @ instruction: 0xf8cdb018 │ │ stmib sp, {r3, r5, ip, pc}^ │ │ @ instruction: 0xf8cd7508 │ │ @ instruction: 0xf7fd801c │ │ - stmdacs r0, {r0, r2, r4, r6, r7, sl, fp, ip, sp, lr, pc} │ │ + stmdacs r0, {r0, r3, r5, r6, r8, r9, fp, ip, sp, lr, pc} │ │ andcs sp, r1, r5, lsr #1 │ │ andmi pc, r0, sl, asr #17 │ │ andeq pc, r4, sl, lsl #17 │ │ pop {r0, r2, r3, ip, sp, pc} │ │ ldmdami r3, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ @ instruction: 0xf00b4478 │ │ - blmi 4f2ae4 │ │ + blmi 4f2d4c │ │ mrscs r2, (UNDEF: 2) │ │ ldrbtmi r4, [fp], #-1578 @ 0xfffff9d6 │ │ - @ instruction: 0xf804f00b │ │ - bge 1c69d0 │ │ + @ instruction: 0xffb4f00a │ │ + bge 1c6d78 │ │ stmdbmi fp, {r1, r3, r8, r9, fp, lr} │ │ ldrbtmi r4, [fp], #-1144 @ 0xfffffb88 │ │ tstls r0, r9, ror r4 │ │ @ instruction: 0xf00c212b │ │ - andcs pc, r1, sp, ror sp @ │ │ + andcs pc, r1, sp, lsr #26 │ │ @ instruction: 0xf0092108 │ │ - strdcs pc, [r1], -r3 │ │ + andcs pc, r1, r3, lsr #21 │ │ @ instruction: 0xf009211c │ │ - svclt 0x0000faef │ │ - @ instruction: 0xfffe2184 │ │ - @ instruction: 0xfffe4adb │ │ - andeq r5, sl, r2, lsr #31 │ │ - andeq r6, sl, r0, asr #1 │ │ - andeq r6, sl, r0, asr #3 │ │ - muleq sl, r2, r0 │ │ + svclt 0x0000fa9f │ │ + @ instruction: 0xfffe1ddc │ │ + @ instruction: 0xfffe4733 │ │ + ldrdeq r5, [sl], -sl │ │ + andeq r5, sl, r8, lsr #26 │ │ + andeq r5, sl, r8, lsr #28 │ │ + strdeq r5, [sl], -sl │ │ + svcmi 0x00f0e92d │ │ + strmi fp, [r3], fp, lsl #1 │ │ + stmdacs r8, {r2, r4, fp, ip, pc} │ │ + sbcshi pc, r5, r0, asr #32 │ │ + strmi r6, [sp], -r8, lsl #16 │ │ + @ instruction: 0xf0002800 │ │ + andcs r8, r8, r5, asr #1 │ │ + ldmdavs ip, {r1, r4, r7, r9, sl, lr} │ │ + ldmdavs lr, {r3, r8, r9, sl, sp}^ │ │ + ldc 0, cr15, [r0, #-652]! @ 0xfffffd74 │ │ + @ instruction: 0xf0002800 │ │ + andcs r8, r0, #209 @ 0xd1 │ │ + stmib sp, {r0, r3, r5, r6, fp, sp, lr}^ │ │ + bge 1115c4 │ │ + andvs r4, r4, r5, lsl #12 │ │ + ldrmi r6, [r0], -r6, asr #32 │ │ + @ instruction: 0x462b2210 │ │ + @ instruction: 0xf9b0f015 │ │ + @ instruction: 0xf0a34628 │ │ + ldmib sp, {r1, r2, r3, r4, r5, r6, r7, sl, fp, sp, lr, pc}^ │ │ + stcls 7, cr1, [r7, #-20] @ 0xffffffec │ │ + ldrdcs lr, [r3], -sp │ │ + tstle r6, r1, lsl #20 │ │ + addeq lr, r3, fp, lsl #17 │ │ + andpl pc, ip, fp, asr #17 │ │ + pop {r0, r1, r3, ip, sp, pc} │ │ + bicslt r8, r8, #240, 30 @ 0x3c0 │ │ + @ instruction: 0xf0402908 │ │ + stccs 0, cr8, [r1, #-656] @ 0xfffffd70 │ │ + addshi pc, sl, r0, asr #4 │ │ + ldrdls pc, [r0], -r0 │ │ + stmdavs r0, {r0, r4, sl, sp}^ │ │ + streq pc, [r0], #-712 @ 0xfffffd38 │ │ + @ instruction: 0xf080883e │ │ + ldmib sl, {fp, lr}^ │ │ + stmdavs r0, {r9, fp} │ │ + strbmi fp, [sl], -r0, lsr #2 │ │ + @ instruction: 0xf7ff4643 │ │ + bicslt pc, r0, #1654784 @ 0x194000 │ │ + ldrdne lr, [r0], -sl │ │ + stmib sp, {r3, r9, fp, sp, pc}^ │ │ + stmdage r3, {sp} │ │ + strbmi r4, [r3], -sl, asr #12 │ │ + stmib sp, {r1, r3, r9, sl, ip, pc}^ │ │ + @ instruction: 0xf0137508 │ │ + stmdbls r3, {r0, r2, r4, r6, sl, fp, ip, sp, lr, pc} │ │ + mulseq r0, sp, r8 │ │ + teqle r0, r1, lsr #5 │ │ + eorle r0, r6, r0, asr #15 │ │ + ldrdeq pc, [r8], -sl │ │ + andne lr, r1, #208, 18 @ 0x340000 │ │ + subvs r3, r1, r1, lsl #2 │ │ + ldmdble r8!, {r0, r4, r7, r9, lr} │ │ + @ instruction: 0xf8cb2000 │ │ + @ instruction: 0xf88b4000 │ │ + andlt r0, fp, r4 │ │ + svchi 0x00f0e8bd │ │ + @ instruction: 0x261c201c │ │ + stcl 0, cr15, [lr], {163} @ 0xa3 │ │ + rsbsle r2, r3, r0, lsl #16 │ │ + andscs r4, ip, #966656 @ 0xec000 │ │ + ldrbtmi r4, [r9], #-1541 @ 0xfffff9fb │ │ + blx d31108 │ │ + stmib fp, {r0, r4, sp}^ │ │ + vsubhn.i16 d21, q4, q1 │ │ + stmdacc r4, {} @ │ │ + streq lr, [r0], -fp, asr #19 │ │ + pop {r0, r1, r3, ip, sp, pc} │ │ + @ instruction: 0xf8cb8ff0 │ │ + andcs r4, r1, r0 │ │ + andeq pc, r4, fp, lsl #17 │ │ + pop {r0, r1, r3, ip, sp, pc} │ │ + @ instruction: 0xf8dd8ff0 │ │ + svcls 0x00062011 │ │ + @ instruction: 0x3015f8dd │ │ + andvc pc, ip, fp, asr #17 │ │ + andcc pc, r9, fp, asr #17 │ │ + andcs pc, r5, fp, asr #17 │ │ + andeq pc, r4, fp, lsl #17 │ │ + andne pc, r0, fp, asr #17 │ │ + pop {r0, r1, r3, ip, sp, pc} │ │ + stmiavs r2, {r4, r5, r6, r7, r8, r9, sl, fp, pc}^ │ │ + ldmdble sp, {r0, r4, r7, r9, lr} │ │ + @ instruction: 0xf8d16801 │ │ + @ instruction: 0xf8daa000 │ │ + @ instruction: 0xf8da6008 │ │ + addmi r0, r6, #0 │ │ + @ instruction: 0xf8dad01c │ │ + teqeq r3, r4 │ │ + andne lr, r1, #3424256 @ 0x344000 │ │ + andls pc, r3, r0, asr #16 │ │ + andne lr, r6, r0, lsl #22 │ │ + @ instruction: 0xf8ca1c73 │ │ + stmib r0, {r3, ip, sp}^ │ │ + sbcvs r8, r5, r1, lsl #14 │ │ + andcc r6, r1, r8, lsl #16 │ │ + ldmdavs r1, {r3, sp, lr} │ │ + adcle r4, r5, #136, 4 @ 0x80000008 │ │ + @ instruction: 0xf8cb2001 │ │ + @ instruction: 0xf88b4000 │ │ + andlt r0, fp, r4 │ │ + svchi 0x00f0e8bd │ │ + tstls r2, r0, asr r6 │ │ + blx 1af2f24 │ │ + ldrb r9, [ip, r2, lsl #18] │ │ + ldrbtmi r4, [r8], #-2066 @ 0xfffff7ee │ │ + @ instruction: 0xff06f00a │ │ + andcs r4, r0, r1, lsl fp │ │ + strtmi r2, [sl], -r2, lsl #2 │ │ + @ instruction: 0xf00a447b │ │ + stmdami sl, {r0, r1, r2, r4, r5, r7, r9, sl, fp, ip, sp, lr, pc} │ │ + blmi 2df758 │ │ + ldrbtmi r4, [r8], #-2314 @ 0xfffff6f6 │ │ + ldrbtmi r4, [r9], #-1147 @ 0xfffffb85 │ │ + @ instruction: 0x212b9100 │ │ + ldc2 0, cr15, [r0], #-48 @ 0xffffffd0 │ │ + tstcs r8, r1 │ │ + @ instruction: 0xf9a6f009 │ │ + tstcs ip, r1 │ │ + @ instruction: 0xf9a2f009 │ │ + @ instruction: 0xfffe1bee │ │ + @ instruction: 0xfffe4539 │ │ + andeq r5, sl, r0, ror #19 │ │ + andeq r5, sl, lr, lsr #22 │ │ + andeq r5, sl, lr, lsr #24 │ │ + andeq r5, sl, r0, lsl #22 │ │ svcmi 0x00f0e92d │ │ strmi fp, [r3], sp, lsl #1 │ │ stmdacs r8, {r1, r2, r4, fp, ip, pc} │ │ sbchi pc, pc, r0, asr #32 │ │ strmi r6, [sp], -r8, lsl #16 │ │ @ instruction: 0xf0002800 │ │ strhcs r8, [r8], -pc @ │ │ ldmdavs ip, {r0, r4, r7, r9, sl, lr} │ │ ldmdavs lr, {r3, r8, r9, sl, sp}^ │ │ - cdp 0, 15, cr15, cr4, cr3, {5} │ │ + ldc 0, cr15, [r4], #-652 @ 0xfffffd74 │ │ @ instruction: 0xf0002800 │ │ andcs r8, r0, #203 @ 0xcb │ │ stmib sp, {r0, r3, r5, r6, fp, sp, lr}^ │ │ - bge 1d121c │ │ + bge 1d17bc │ │ andvs r4, r4, r5, lsl #12 │ │ ldrmi r6, [r0], -r6, asr #32 │ │ @ instruction: 0x462b2210 │ │ - blx 70a80 │ │ + @ instruction: 0xf8b4f015 │ │ @ instruction: 0xf0a34628 │ │ - ldmib sp, {r1, r3, r6, r7, r9, sl, fp, sp, lr, pc}^ │ │ + ldmib sp, {r1, sl, fp, sp, lr, pc}^ │ │ stcls 7, cr1, [sl, #-32] @ 0xffffffe0 │ │ ldrdcs lr, [r6], -sp │ │ tstle r6, r1, lsl #20 │ │ addeq lr, r3, fp, lsl #17 │ │ andpl pc, ip, fp, asr #17 │ │ pop {r0, r2, r3, ip, sp, pc} │ │ mvnlt r8, #240, 30 @ 0x3c0 │ │ @@ -19307,42 +19667,42 @@ │ │ addshi pc, r4, r0, asr #4 │ │ ldrdge pc, [r0], -r0 │ │ ldmdahi lr!, {r6, fp, sp, lr} │ │ stmdami r0, {r7, ip, sp, lr, pc} │ │ stmdbeq r0, {r0, r3, r4, r6, r7, r8, fp, sp, lr, pc} │ │ @ instruction: 0xb1286800 │ │ @ instruction: 0x46434652 │ │ - blx 1672a74 │ │ + @ instruction: 0xf86cf7ff │ │ subsle r2, r0, r0, lsl #16 │ │ ldrdne lr, [r0], -r9 │ │ - bge 11fa9c │ │ + bge 12003c │ │ andcs lr, r0, sp, asr #19 │ │ ldrbmi r4, [r2], -r0, lsr #12 │ │ strls r4, [r5], -r3, asr #12 │ │ strvc lr, [r3, #-2509] @ 0xfffff633 │ │ - stc2 0, cr15, [r6], #76 @ 0x4c │ │ + blx 16f1086 │ │ mulseq ip, sp, r8 │ │ stmdbls r6, {r0, r4, r8, r9, sp} │ │ movweq pc, #712 @ 0x2c8 @ │ │ @ instruction: 0xd1284299 │ │ suble r0, r3, r0, asr #15 │ │ ldrdeq pc, [r8], -r9 │ │ andne lr, r1, #208, 18 @ 0x340000 │ │ subvs r3, r1, r1, lsl #2 │ │ stmdble r3, {r0, r4, r7, r9, lr}^ │ │ @ instruction: 0xf8cb2000 │ │ @ instruction: 0xf88b3000 │ │ andlt r0, sp, r4 │ │ svchi 0x00f0e8bd │ │ @ instruction: 0x261c201c │ │ - cdp 0, 9, cr15, cr0, cr3, {5} │ │ + bl ff471300 │ │ rsble r2, fp, r0, lsl #16 │ │ andscs r4, ip, #901120 @ 0xdc000 │ │ ldrbtmi r4, [r9], #-1541 @ 0xfffff9fb │ │ - ldc2l 0, cr15, [r3], #-640 @ 0xfffffd80 │ │ + @ instruction: 0xf935f0a0 │ │ stmib fp, {r0, r4, sp}^ │ │ vsubhn.i16 d21, q4, q1 │ │ stmdacc r4, {} @ │ │ streq lr, [r0], -fp, asr #19 │ │ pop {r0, r2, r3, ip, sp, pc} │ │ @ instruction: 0xf8dd8ff0 │ │ svcls 0x0009201d │ │ @@ -19366,641 +19726,475 @@ │ │ addsmi r6, r1, #12713984 @ 0xc20000 │ │ @ instruction: 0xf8cdd910 │ │ @ instruction: 0xf104a018 │ │ strls r0, [sl], -r8, lsl #2 │ │ strvc lr, [r8, #-2509] @ 0xfffff633 │ │ @ instruction: 0xf8cd6800 │ │ @ instruction: 0xf7fd801c │ │ - tstpcs r1, #230400 @ p-variant is OBSOLETE @ 0x38400 │ │ + tstpcs r1, #1982464 @ p-variant is OBSOLETE @ 0x1e4000 │ │ vmlal.s8 q9, d8, d0 │ │ adcle r0, r7, r0, lsl #6 │ │ @ instruction: 0xf8cb2001 │ │ @ instruction: 0xf88b3000 │ │ andlt r0, sp, r4 │ │ svchi 0x00f0e8bd │ │ ldrbtmi r4, [r8], #-2066 @ 0xfffff7ee │ │ - @ instruction: 0xff5cf00a │ │ + cdp2 0, 1, cr15, cr0, cr10, {0} │ │ andcs r4, r0, r1, lsl fp │ │ strtmi r2, [sl], -r2, lsl #2 │ │ @ instruction: 0xf00a447b │ │ - stmdami sl, {r0, r2, r3, r8, r9, sl, fp, ip, sp, lr, pc} │ │ - blmi 2df3b0 │ │ + stmdami sl, {r0, r6, r7, r8, sl, fp, ip, sp, lr, pc} │ │ + blmi 2df950 │ │ ldrbtmi r4, [r8], #-2314 @ 0xfffff6f6 │ │ ldrbtmi r4, [r9], #-1147 @ 0xfffffb85 │ │ @ instruction: 0x212b9100 │ │ - stc2 0, cr15, [r6], {12} │ │ + blx ef117a │ │ tstcs r8, r1 │ │ - @ instruction: 0xf9fcf009 │ │ + @ instruction: 0xf8b0f009 │ │ tstcs ip, r1 │ │ - @ instruction: 0xf9f8f009 │ │ - @ instruction: 0xfffe1f92 │ │ - @ instruction: 0xfffe48ed │ │ - @ instruction: 0x000a5db4 │ │ - ldrdeq r5, [sl], -r2 │ │ - ldrdeq r5, [sl], -r2 │ │ - andeq r5, sl, r4, lsr #29 │ │ + @ instruction: 0xf8acf009 │ │ + @ instruction: 0xfffe19f2 │ │ + @ instruction: 0xfffe434d │ │ + strdeq r5, [sl], -r4 │ │ + andeq r5, sl, r2, asr #18 │ │ + andeq r5, sl, r2, asr #20 │ │ + andeq r5, sl, r4, lsl r9 │ │ svcmi 0x00f0e92d │ │ strmi fp, [r4], -r9, lsl #1 │ │ stmdacs r8, {r1, r4, fp, ip, pc} │ │ stmdavs r8, {r3, r4, r5, r6, r8, ip, lr, pc} │ │ stmdacs r0, {r0, r2, r3, r9, sl, lr} │ │ andcs sp, r8, r9, rrx │ │ ldmdavs lr, {r0, r4, r7, r9, sl, lr} │ │ stmdaeq r8, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ @ instruction: 0xf0a3685f │ │ - stmdacs r0, {r9, sl, fp, sp, lr, pc} │ │ + stmdacs r0, {r6, r8, r9, fp, sp, lr, pc} │ │ andcs sp, r0, #117 @ 0x75 │ │ stmib sp, {r0, r3, r5, r6, fp, sp, lr}^ │ │ @ instruction: 0xf10d8200 │ │ strmi r0, [r5], -r8, lsl #16 │ │ subvs r6, r7, r6 │ │ andscs r4, r0, #64, 12 @ 0x4000000 │ │ - @ instruction: 0xf015462b │ │ - strtmi pc, [r8], -fp, lsl #18 │ │ - ldcl 0, cr15, [r4, #652] @ 0x28c │ │ + @ instruction: 0xf014462b │ │ + @ instruction: 0x4628ffbf │ │ + bl 371448 │ │ ldmib sp, {r2, r8, r9, sl, fp, sp, pc}^ │ │ svcgt 0x00c22002 │ │ tstle r3, r1, lsl #20 │ │ andlt ip, r9, r3, asr #9 │ │ svchi 0x00f0e8bd │ │ stmdbcs r8, {r5, r8, r9, ip, sp, pc} │ │ svccs 0x0001d14c │ │ @ instruction: 0xf8d0d943 │ │ stmdavs r0, {sp, pc}^ │ │ @ instruction: 0xb000f8b6 │ │ strmi pc, [r0, #-128] @ 0xffffff80 │ │ stmdbeq r0, {r0, r3, r4, r6, r7, r8, fp, sp, lr, pc} │ │ @ instruction: 0xb1206800 │ │ @ instruction: 0x462b4652 │ │ - @ instruction: 0xf968f7ff │ │ + @ instruction: 0xff7cf7fe │ │ stmdage r4, {r3, r5, r8, r9, ip, sp, pc} │ │ stm r0, {r0, r3, r6, r9, sl, lr} │ │ @ instruction: 0xf10808c0 │ │ ldrbmi r0, [r2], -r8 │ │ strtmi r9, [r0], -r0 │ │ stmib sp, {r0, r1, r3, r5, r9, sl, lr}^ │ │ @ instruction: 0xf001a502 │ │ - andlt pc, r9, fp, lsl #24 │ │ + @ instruction: 0xb009fabf │ │ svchi 0x00f0e8bd │ │ @ instruction: 0x261c201c │ │ - ldc 0, cr15, [r8, #652]! @ 0x28c │ │ + b ffe714b0 │ │ ldmdbmi ip, {r3, r4, r7, r8, r9, ip, sp, pc} │ │ @ instruction: 0x4605221c │ │ @ instruction: 0xf0a04479 │ │ - mulcs sp, ip, fp │ │ + andcs pc, sp, lr, asr r8 @ │ │ strpl lr, [r2], -r4, asr #19 │ │ andeq pc, r0, r8, asr #5 │ │ streq lr, [r0], -r4, asr #19 │ │ pop {r0, r3, ip, sp, pc} │ │ strdcs r8, [sp], -r0 │ │ andeq pc, r0, r8, asr #5 │ │ eorvs r3, r0, r4 │ │ @ instruction: 0x71202001 │ │ pop {r0, r3, ip, sp, pc} │ │ ldmdami r3, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ @ instruction: 0xf00a4478 │ │ - blmi 4f47b8 │ │ + blmi 4f4828 │ │ mrscs r2, (UNDEF: 2) │ │ ldrbtmi r4, [fp], #-1594 @ 0xfffff9c6 │ │ - cdp2 0, 6, cr15, cr14, cr10, {0} │ │ - bge c6cfc │ │ + stc2 0, cr15, [r2, #-40]! @ 0xffffffd8 │ │ + bge c729c │ │ stmdbmi fp, {r1, r3, r8, r9, fp, lr} │ │ ldrbtmi r4, [fp], #-1144 @ 0xfffffb88 │ │ tstls r0, r9, ror r4 │ │ @ instruction: 0xf00c212b │ │ - andcs pc, r1, r7, ror #23 │ │ + mulcs r1, fp, sl │ │ @ instruction: 0xf0092108 │ │ - andcs pc, r1, sp, asr r9 @ │ │ + andcs pc, r1, r1, lsl r8 @ │ │ @ instruction: 0xf009211c │ │ - svclt 0x0000f959 │ │ - @ instruction: 0xfffe1de4 │ │ - @ instruction: 0xfffe47af │ │ - andeq r5, sl, r6, ror ip │ │ - muleq sl, r4, sp │ │ - muleq sl, r4, lr │ │ - andeq r5, sl, r6, ror #26 │ │ + svclt 0x0000f80d │ │ + @ instruction: 0xfffe1844 │ │ + @ instruction: 0xfffe420f │ │ + @ instruction: 0x000a56b6 │ │ + andeq r5, sl, r4, lsl #16 │ │ + andeq r5, sl, r4, lsl #18 │ │ + ldrdeq r5, [sl], -r6 │ │ svcmi 0x00f0e92d │ │ - strmi fp, [r3], fp, lsl #1 │ │ - stmdacs r8, {r2, r4, fp, ip, pc} │ │ - sbcshi pc, r5, r0, asr #32 │ │ - strmi r6, [sp], -r8, lsl #16 │ │ - @ instruction: 0xf0002800 │ │ - andcs r8, r8, r5, asr #1 │ │ - ldmdavs ip, {r1, r4, r7, r9, sl, lr} │ │ - ldmdavs lr, {r3, r8, r9, sl, sp}^ │ │ - ldcl 0, cr15, [lr, #-652] @ 0xfffffd74 │ │ - @ instruction: 0xf0002800 │ │ - andcs r8, r0, #209 @ 0xd1 │ │ + strmi fp, [r4], -r9, lsl #1 │ │ + stmdacs r8, {r1, r4, fp, ip, pc} │ │ + stmdavs r8, {r3, r4, r5, r6, r8, ip, lr, pc} │ │ + stmdacs r0, {r0, r2, r3, r9, sl, lr} │ │ + andcs sp, r8, r9, rrx │ │ + ldmdavs lr, {r0, r4, r7, r9, sl, lr} │ │ + stmdaeq r8, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ + @ instruction: 0xf0a3685f │ │ + stmdacs r0, {r5, r7, r9, fp, sp, lr, pc} │ │ + andcs sp, r0, #117 @ 0x75 │ │ stmib sp, {r0, r3, r5, r6, fp, sp, lr}^ │ │ - bge 111548 │ │ - andvs r4, r4, r5, lsl #12 │ │ - ldrmi r6, [r0], -r6, asr #32 │ │ - @ instruction: 0x462b2210 │ │ - @ instruction: 0xf86af015 │ │ - @ instruction: 0xf0a34628 │ │ - ldmib sp, {r2, r4, r5, r8, sl, fp, sp, lr, pc}^ │ │ - stcls 7, cr1, [r7, #-20] @ 0xffffffec │ │ - ldrdcs lr, [r3], -sp │ │ - tstle r6, r1, lsl #20 │ │ - addeq lr, r3, fp, lsl #17 │ │ - andpl pc, ip, fp, asr #17 │ │ - pop {r0, r1, r3, ip, sp, pc} │ │ - bicslt r8, r8, #240, 30 @ 0x3c0 │ │ - @ instruction: 0xf0402908 │ │ - stccs 0, cr8, [r1, #-656] @ 0xfffffd70 │ │ - addshi pc, sl, r0, asr #4 │ │ - ldrdls pc, [r0], -r0 │ │ - stmdavs r0, {r0, r4, sl, sp}^ │ │ - streq pc, [r0], #-712 @ 0xfffffd38 │ │ - @ instruction: 0xf080883e │ │ - ldmib sl, {fp, lr}^ │ │ - stmdavs r0, {r9, fp} │ │ - strbmi fp, [sl], -r0, lsr #2 │ │ - @ instruction: 0xf7ff4643 │ │ - bicslt pc, r0, #12517376 @ 0xbf0000 │ │ - ldrdne lr, [r0], -sl │ │ - stmib sp, {r3, r9, fp, sp, pc}^ │ │ - stmdage r3, {sp} │ │ - strbmi r4, [r3], -sl, asr #12 │ │ - stmib sp, {r1, r3, r9, sl, ip, pc}^ │ │ - @ instruction: 0xf0137508 │ │ - stmdbls r3, {r0, r1, r2, r3, r8, r9, fp, ip, sp, lr, pc} │ │ - mulseq r0, sp, r8 │ │ - teqle r0, r1, lsr #5 │ │ - eorle r0, r6, r0, asr #15 │ │ - ldrdeq pc, [r8], -sl │ │ - andne lr, r1, #208, 18 @ 0x340000 │ │ - subvs r3, r1, r1, lsl #2 │ │ - ldmdble r8!, {r0, r4, r7, r9, lr} │ │ - @ instruction: 0xf8cb2000 │ │ - @ instruction: 0xf88b4000 │ │ - andlt r0, fp, r4 │ │ - svchi 0x00f0e8bd │ │ - @ instruction: 0x261c201c │ │ - ldcl 0, cr15, [ip], #652 @ 0x28c │ │ - rsbsle r2, r3, r0, lsl #16 │ │ - andscs r4, ip, #966656 @ 0xec000 │ │ - ldrbtmi r4, [r9], #-1541 @ 0xfffff9fb │ │ - blx ff83108c │ │ - stmib fp, {r0, r4, sp}^ │ │ - vsubhn.i16 d21, q4, q1 │ │ - stmdacc r4, {} @ │ │ - streq lr, [r0], -fp, asr #19 │ │ - pop {r0, r1, r3, ip, sp, pc} │ │ - @ instruction: 0xf8cb8ff0 │ │ - andcs r4, r1, r0 │ │ - andeq pc, r4, fp, lsl #17 │ │ - pop {r0, r1, r3, ip, sp, pc} │ │ - @ instruction: 0xf8dd8ff0 │ │ - svcls 0x00062011 │ │ - @ instruction: 0x3015f8dd │ │ - andvc pc, ip, fp, asr #17 │ │ - andcc pc, r9, fp, asr #17 │ │ - andcs pc, r5, fp, asr #17 │ │ - andeq pc, r4, fp, lsl #17 │ │ - andne pc, r0, fp, asr #17 │ │ - pop {r0, r1, r3, ip, sp, pc} │ │ - stmiavs r2, {r4, r5, r6, r7, r8, r9, sl, fp, pc}^ │ │ - ldmdble sp, {r0, r4, r7, r9, lr} │ │ - @ instruction: 0xf8d16801 │ │ - @ instruction: 0xf8daa000 │ │ - @ instruction: 0xf8da6008 │ │ - addmi r0, r6, #0 │ │ - @ instruction: 0xf8dad01c │ │ - teqeq r3, r4 │ │ - andne lr, r1, #3424256 @ 0x344000 │ │ - andls pc, r3, r0, asr #16 │ │ - andne lr, r6, r0, lsl #22 │ │ - @ instruction: 0xf8ca1c73 │ │ - stmib r0, {r3, ip, sp}^ │ │ - sbcvs r8, r5, r1, lsl #14 │ │ - andcc r6, r1, r8, lsl #16 │ │ - ldmdavs r1, {r3, sp, lr} │ │ - adcle r4, r5, #136, 4 @ 0x80000008 │ │ - @ instruction: 0xf8cb2001 │ │ - @ instruction: 0xf88b4000 │ │ - andlt r0, fp, r4 │ │ + @ instruction: 0xf10d8200 │ │ + strmi r0, [r5], -r8, lsl #16 │ │ + subvs r6, r7, r6 │ │ + andscs r4, r0, #64, 12 @ 0x4000000 │ │ + @ instruction: 0xf014462b │ │ + qadd16mi pc, r8, pc @ │ │ + b 1b71588 │ │ + ldmib sp, {r2, r8, r9, sl, fp, sp, pc}^ │ │ + svcgt 0x00c22002 │ │ + tstle r3, r1, lsl #20 │ │ + andlt ip, r9, r3, asr #9 │ │ svchi 0x00f0e8bd │ │ - tstls r2, r0, asr r6 │ │ - @ instruction: 0xf9c5f7fe │ │ - ldrb r9, [ip, r2, lsl #18] │ │ - ldrbtmi r4, [r8], #-2066 @ 0xfffff7ee │ │ - stc2l 0, cr15, [r0, #40] @ 0x28 │ │ - andcs r4, r0, r1, lsl fp │ │ - strtmi r2, [sl], -r2, lsl #2 │ │ - @ instruction: 0xf00a447b │ │ - stmdami sl, {r0, r4, r5, r6, r8, sl, fp, ip, sp, lr, pc} │ │ - blmi 2df6dc │ │ - ldrbtmi r4, [r8], #-2314 @ 0xfffff6f6 │ │ - ldrbtmi r4, [r9], #-1147 @ 0xfffffb85 │ │ - @ instruction: 0x212b9100 │ │ - blx ffaf0f10 │ │ - tstcs r8, r1 │ │ - @ instruction: 0xf860f009 │ │ - tstcs ip, r1 │ │ - @ instruction: 0xf85cf009 │ │ - @ instruction: 0xfffe1c6a │ │ - @ instruction: 0xfffe45b5 │ │ - andeq r5, sl, ip, ror sl │ │ - muleq sl, sl, fp │ │ - muleq sl, sl, ip │ │ - andeq r5, sl, ip, ror #22 │ │ - svcmi 0x00f0e92d │ │ - strmi fp, [r0], fp, lsl #1 │ │ - stmdacs r8, {r2, r4, fp, ip, pc} │ │ - sbchi pc, r8, r0, asr #32 │ │ - strmi r6, [sp], -r8, lsl #16 │ │ - @ instruction: 0xf0002800 │ │ - strhcs r8, [r8], -r8 @ │ │ - ldmdavs ip, {r1, r4, r7, r9, sl, lr} │ │ - ldmdavs pc, {r3, r9, sl, sp}^ @ │ │ - stcl 0, cr15, [r2], #-652 @ 0xfffffd74 │ │ - @ instruction: 0xf0002800 │ │ - andcs r8, r0, #196 @ 0xc4 │ │ - stmib sp, {r0, r3, r5, r6, fp, sp, lr}^ │ │ - bge 10d740 │ │ - andvs r4, r4, r5, lsl #12 │ │ - ldrmi r6, [r0], -r7, asr #32 │ │ - @ instruction: 0x462b2210 │ │ - @ instruction: 0xff6ef014 │ │ - @ instruction: 0xf0a34628 │ │ - ldmib sp, {r3, r4, r5, sl, fp, sp, lr, pc}^ │ │ - stcls 6, cr1, [r7, #-20] @ 0xffffffec │ │ - ldrdcs lr, [r3], -sp │ │ - tstle r6, r1, lsl #20 │ │ - subeq lr, r3, r8, lsl #17 │ │ - andpl pc, ip, r8, asr #17 │ │ - pop {r0, r1, r3, ip, sp, pc} │ │ - mvnlt r8, #240, 30 @ 0x3c0 │ │ - @ instruction: 0xf0402908 │ │ - stccs 0, cr8, [r1, #-604] @ 0xfffffda4 │ │ - addhi pc, sp, r0, asr #4 │ │ - ldrdls pc, [r0], -r0 │ │ - ldmdahi r7!, {r6, fp, sp, lr} │ │ - strmi pc, [r0], #-128 @ 0xffffff80 │ │ - bleq 6f6f8 │ │ - beq 4b1894 │ │ - beq 71ab8 │ │ + stmdbcs r8, {r5, r8, r9, ip, sp, pc} │ │ + svccs 0x0001d14c │ │ + @ instruction: 0xf8d0d943 │ │ + stmdavs r0, {sp, pc}^ │ │ + @ instruction: 0xb000f8b6 │ │ + strmi pc, [r0, #-128] @ 0xffffff80 │ │ + stmdbeq r0, {r0, r3, r4, r6, r7, r8, fp, sp, lr, pc} │ │ @ instruction: 0xb1206800 │ │ - strtmi r4, [r3], -sl, asr #12 │ │ - @ instruction: 0xffc2f7fe │ │ - ldmib fp, {r4, r6, r7, r8, r9, ip, sp, pc}^ │ │ - bge 238fac │ │ - andcs lr, r0, sp, asr #19 │ │ - strbmi sl, [sl], -r3, lsl #16 │ │ - strls r4, [sl, -r3, lsr #12] │ │ - strvs lr, [r8, #-2509] @ 0xfffff633 │ │ - blx 4f100c │ │ - @ instruction: 0xf89d9903 │ │ - ldrbmi r0, [r1, #-16] │ │ - @ instruction: 0x07c0d130 │ │ - @ instruction: 0xf8dbd026 │ │ - ldmib r0, {r3}^ │ │ - tstcc r1, r1, lsl #4 │ │ - addsmi r6, r1, #65 @ 0x41 │ │ - andcs sp, r0, r8, lsr r9 │ │ - andge pc, r0, r8, asr #17 │ │ - andeq pc, r4, r8, lsl #17 │ │ - pop {r0, r1, r3, ip, sp, pc} │ │ - @ instruction: 0x201c8ff0 │ │ - @ instruction: 0xf0a3261c │ │ - stmdacs r0, {sl, fp, sp, lr, pc} │ │ - ldmdbmi r5!, {r0, r2, r5, r6, ip, lr, pc} │ │ + @ instruction: 0x462b4652 │ │ + mrc2 7, 6, pc, cr12, cr14, {7} │ │ + stmdage r4, {r3, r5, r8, r9, ip, sp, pc} │ │ + stm r0, {r0, r3, r6, r9, sl, lr} │ │ + @ instruction: 0xf10808c0 │ │ + ldrbmi r0, [r2], -r8 │ │ + strtmi r9, [r0], -r0 │ │ + stmib sp, {r0, r1, r3, r5, r9, sl, lr}^ │ │ + @ instruction: 0xf001a502 │ │ + andlt pc, r9, pc, ror r9 @ │ │ + svchi 0x00f0e8bd │ │ + @ instruction: 0x261c201c │ │ + b 16715f0 │ │ + ldmdbmi ip, {r3, r4, r7, r8, r9, ip, sp, pc} │ │ @ instruction: 0x4605221c │ │ - @ instruction: 0xf0a04479 │ │ - andscs pc, r1, r2, ror #19 │ │ - strpl lr, [r2], -r8, asr #19 │ │ + @ instruction: 0xf09f4479 │ │ + @ instruction: 0x200dffbe │ │ + strpl lr, [r2], -r4, asr #19 │ │ andeq pc, r0, r8, asr #5 │ │ - stmib r8, {r2, fp, ip, sp}^ │ │ - andlt r0, fp, r0, lsl #12 │ │ - svchi 0x00f0e8bd │ │ - andge pc, r0, r8, asr #17 │ │ - @ instruction: 0xf8882001 │ │ - andlt r0, fp, r4 │ │ - svchi 0x00f0e8bd │ │ - @ instruction: 0x2011f8dd │ │ - @ instruction: 0xf8dd9f06 │ │ - @ instruction: 0xf8c83015 │ │ - @ instruction: 0xf8c8700c │ │ - @ instruction: 0xf8c83009 │ │ - @ instruction: 0xf8882005 │ │ - @ instruction: 0xf8c80004 │ │ - andlt r1, fp, r0 │ │ - svchi 0x00f0e8bd │ │ - addsmi r6, r1, #12713984 @ 0xc20000 │ │ - stmdavs r0, {r0, r4, r8, fp, ip, lr, pc} │ │ - @ instruction: 0x5600e9d0 │ │ - stmdavs r8!, {r0, r1, r2, r3, r5, r7, fp, sp, lr} │ │ - andsle r4, r2, r7, lsl #5 │ │ - ldclne 8, cr6, [r9], #-416 @ 0xfffffe60 │ │ - eorsls pc, r7, r0, asr #16 │ │ - sbceq lr, r7, r0, lsl #22 │ │ - subvs r6, r4, r9, lsr #1 │ │ - addmi r6, r1, #48, 16 @ 0x300000 │ │ - @ instruction: 0x2001d8b1 │ │ - andge pc, r0, r8, asr #17 │ │ - andeq pc, r4, r8, lsl #17 │ │ - pop {r0, r1, r3, ip, sp, pc} │ │ - qsub8mi r8, r8, r0 │ │ - @ instruction: 0xf910f7fe │ │ - ldmdami r3, {r3, r5, r6, r7, r8, r9, sl, sp, lr, pc} │ │ + streq lr, [r0], -r4, asr #19 │ │ + pop {r0, r3, ip, sp, pc} │ │ + strdcs r8, [sp], -r0 │ │ + andeq pc, r0, r8, asr #5 │ │ + eorvs r3, r0, r4 │ │ + @ instruction: 0x71202001 │ │ + pop {r0, r3, ip, sp, pc} │ │ + ldmdami r3, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ @ instruction: 0xf00a4478 │ │ - blmi 4f43e0 │ │ + blmi 4f46e8 │ │ mrscs r2, (UNDEF: 2) │ │ - ldrbtmi r4, [fp], #-1578 @ 0xfffff9d6 │ │ + ldrbtmi r4, [fp], #-1594 @ 0xfffff9c6 │ │ stc2 0, cr15, [r2], {10} │ │ - bge 1070d4 │ │ + bge c73dc │ │ stmdbmi fp, {r1, r3, r8, r9, fp, lr} │ │ ldrbtmi r4, [fp], #-1144 @ 0xfffffb88 │ │ tstls r0, r9, ror r4 │ │ @ instruction: 0xf00c212b │ │ strdcs pc, [r1], -fp │ │ @ instruction: 0xf0082108 │ │ andcs pc, r1, r1, ror pc @ │ │ @ instruction: 0xf008211c │ │ svclt 0x0000ff6d │ │ - @ instruction: 0xfffe1a70 │ │ - @ instruction: 0xfffe43d7 │ │ - muleq sl, lr, r8 │ │ - @ instruction: 0x000a59bc │ │ - @ instruction: 0x000a5abc │ │ - andeq r5, sl, lr, lsl #19 │ │ + @ instruction: 0xfffe1704 │ │ + @ instruction: 0xfffe40cf │ │ + andeq r5, sl, r6, ror r5 │ │ + andeq r5, sl, r4, asr #13 │ │ + andeq r5, sl, r4, asr #15 │ │ + muleq sl, r6, r6 │ │ + svcmi 0x00f0e92d │ │ + ldmib sp, {r0, r1, r2, r7, ip, sp, pc}^ │ │ + @ instruction: 0x4604a910 │ │ + @ instruction: 0x46989812 │ │ + @ instruction: 0x460f4616 │ │ + orrslt r2, r0, #8, 10 @ 0x2000000 │ │ + @ instruction: 0xf0a32008 │ │ + stmdacs r0, {r2, r9, fp, sp, lr, pc} │ │ + adchi pc, pc, r0 │ │ + smlabbmi r0, r8, r0, pc @ │ │ + tstcs r0, r1, asr #32 │ │ + stmib sp, {r1, r2, sp, lr}^ │ │ + stmdbge r2, {r8, ip, lr} │ │ + andscs r4, r1, #5242880 @ 0x500000 │ │ + ldrtmi r4, [r9], -r8, lsl #12 │ │ + @ instruction: 0xf014462b │ │ + strtmi pc, [r8], -r1, lsl #29 │ │ + stmib lr, {r0, r1, r5, r7, ip, sp, lr, pc}^ │ │ + ldrdcc lr, [r4], -sp │ │ + ldmib sp, {r1, r2, r8, fp, ip, pc}^ │ │ + bllt fe611c4c │ │ + blcs 2619f0 │ │ + addshi pc, r7, r0, asr #32 │ │ + @ instruction: 0xf04f6817 │ │ + ldmdavs r6, {r8, r9, lr}^ │ │ + @ instruction: 0x0707ebba │ │ + movweq lr, #27267 @ 0x6a83 │ │ + movweq lr, #15225 @ 0x3b79 │ │ + andcs sp, r0, r8, asr #20 │ │ + eorvs r6, r0, r0, rrx │ │ + pop {r0, r1, r2, ip, sp, pc} │ │ + strdcs r8, [r8], -r0 │ │ + ldmib r0, {r0, r1, r5, r7, ip, sp, lr, pc}^ │ │ + rsbsle r2, ip, r0, lsl #16 │ │ + smlabbmi r0, r9, r0, pc @ │ │ + tstcs r0, r1, asr #32 │ │ + andge pc, r0, r0, asr #17 │ │ + smlabtpl r0, sp, r9, lr │ │ + strmi sl, [r5], -r2, lsl #18 │ │ + @ instruction: 0x46082211 │ │ + @ instruction: 0x462b4639 │ │ + mcr2 0, 2, pc, cr14, cr4, {0} @ │ │ + @ instruction: 0xf0a34628 │ │ + ldmib sp, {r2, r3, r4, r7, r8, fp, sp, lr, pc}^ │ │ + stmdbls r6, {r2, ip, sp} │ │ + andpl lr, r2, #3620864 @ 0x374000 │ │ + rscvs fp, r0, r5, asr #2 │ │ + rsbvs r2, r2, r1 │ │ + @ instruction: 0x612160a3 │ │ + andlt r6, r7, r0, lsr #32 │ │ + svchi 0x00f0e8bd │ │ + blmi 715fc │ │ + blcs 26210c │ │ + ldmdavs r3, {r0, r3, r4, r6, r8, ip, lr, pc}^ │ │ + ldrdgt pc, [r0], -r2 │ │ + streq lr, [fp, #-2691] @ 0xfffff57d │ │ + movweq lr, #52154 @ 0xcbba │ │ + movweq lr, #23417 @ 0x5b79 │ │ + andcs sp, r0, ip, lsl #20 │ │ + andls r4, r1, r9, lsr r6 │ │ + andcs sl, lr, #131072 @ 0x20000 │ │ + @ instruction: 0xf0142300 │ │ + svcge 0x0002fe25 │ │ + movtlt ip, #36751 @ 0x8f8f │ │ + eors r2, r6, r1 │ │ + stmib r4, {r3, r8, r9, sp}^ │ │ + stmib r4, {r0, r1, r8}^ │ │ + andcs r2, r0, r1, lsl #6 │ │ + andlt r6, r7, r0, lsr #32 │ │ + svchi 0x00f0e8bd │ │ + ldrtmi r2, [r9], -r0 │ │ + stmdage r2, {r0, ip, pc} │ │ + movwcs r2, #518 @ 0x206 │ │ + mcr2 0, 0, pc, cr14, cr4, {0} @ │ │ + ldrdcc lr, [r4], -sp │ │ + ldmib sp, {r1, r2, r8, fp, ip, pc}^ │ │ + stccs 2, cr5, [r1, #-8] │ │ + bcs 6982c │ │ + blcs 269798 │ │ + ldmdavs r5, {r0, r2, r5, r8, ip, lr, pc}^ │ │ + ldrdgt pc, [r0], -r2 │ │ + streq lr, [fp, #-2693] @ 0xfffff57b │ │ + movweq lr, #27580 @ 0x6bbc │ │ + movweq lr, #35701 @ 0x8b75 │ │ + strb sp, [r5, pc, lsl #23] │ │ + @ instruction: 0xf43f2900 │ │ + bcs 26137c │ │ + stmdavs r8, {r0, r2, r4, r8, ip, lr, pc} │ │ + blne fe04f688 │ │ + streq lr, [fp, #-2693] @ 0xfffff57b │ │ + andeq lr, r8, r5, ror fp │ │ + svcge 0x0081f6ff │ │ + @ instruction: 0xf1042000 │ │ + stm ip, {r2, sl, fp} │ │ + eorvs r0, r0, lr, lsl #1 │ │ + pop {r0, r1, r2, ip, sp, pc} │ │ + strdcs r8, [r1], -r0 │ │ + @ instruction: 0xf0082108 │ │ + stmdami r5, {r0, r1, r3, r4, r7, r9, sl, fp, ip, sp, lr, pc} │ │ + blmi 19fd88 │ │ + ldrbtmi r4, [r8], #-2309 @ 0xfffff6fb │ │ + ldrbtmi r4, [r9], #-1147 @ 0xfffffb85 │ │ + @ instruction: 0x212b9100 │ │ + @ instruction: 0xf916f00c │ │ + @ instruction: 0xfffe3f05 │ │ + andeq r5, sl, ip, lsr #7 │ │ + strdeq r5, [sl], -sl │ │ svcmi 0x00f0e92d │ │ ldmib sp, {r0, r3, r7, ip, sp, pc}^ │ │ @ instruction: 0x46049b12 │ │ @ instruction: 0x46159814 │ │ andcs fp, r0, r8, asr r3 │ │ stmib sp, {r0, r4, r9, sp}^ │ │ stmdage r4, {ip, sp} │ │ @ instruction: 0xf014462b │ │ - @ instruction: 0xf10dfe91 │ │ + @ instruction: 0xf10dfdbb │ │ ldmib sp, {r4, fp}^ │ │ ldm r8, {r0, r1, r2, r9, fp, ip, sp, lr} │ │ - bllt 1a3561c │ │ + bllt 1a35ad0 │ │ ldrbmi fp, [sl], -lr, lsr #3 │ │ ldrtmi r4, [r1], -r8, asr #12 │ │ svclt 0x003845d8 │ │ @ instruction: 0xf0a34642 │ │ - @ instruction: 0x2100eb9e │ │ + tstcs r0, ip, asr #18 │ │ @ instruction: 0xf04f45c3 │ │ svclt 0x00380200 │ │ stmdacs r0, {r0, r9, sp} │ │ tstcs r1, r8, asr #30 │ │ ldrmi fp, [r1], -r8, lsl #30 │ │ @ instruction: 0xf0002900 │ │ swpcs r8, r2, [r0] │ │ eorvs r6, r1, r1, rrx │ │ pop {r0, r3, ip, sp, pc} │ │ strdcs r8, [r0], -r0 │ │ stmib sp, {r1, r8, r9, ip, pc}^ │ │ stmdage r4, {ip, sp, pc} │ │ @ instruction: 0x464b2211 │ │ @ instruction: 0xf0149103 │ │ - @ instruction: 0xf10dfe63 │ │ + @ instruction: 0xf10dfd8d │ │ ldmib sp, {r4, fp}^ │ │ ldm r8, {r0, r1, r2, r9, fp, ip, sp, lr} │ │ cmplt r0, r1, asr #2 │ │ smlattcs r1, r7, r0, r6 │ │ @ instruction: 0xf8c46066 │ │ @ instruction: 0xf8c48008 │ │ eorvs sl, r1, r0, lsl r0 │ │ pop {r0, r3, ip, sp, pc} │ │ ldrshlt r8, [r6, #240] @ 0xf0 │ │ stmdacs r0, {r0, r2, r4, fp, ip, pc} │ │ andcs sp, r0, r6, asr #32 │ │ andls r9, r1, r3, lsl #18 │ │ andcs sl, r7, #4, 16 @ 0x40000 │ │ @ instruction: 0xf0142300 │ │ - ldmib sp, {r0, r2, r6, r9, sl, fp, ip, sp, lr, pc}^ │ │ - bls 265dc0 │ │ + ldmib sp, {r0, r1, r2, r3, r5, r6, r8, sl, fp, ip, sp, lr, pc}^ │ │ + bls 266274 │ │ ldrdne lr, [r4], -sp │ │ teqle r1, r1, lsl #18 │ │ @ instruction: 0x0c01e9c4 │ │ stmib r4, {r0, r8, sp}^ │ │ eorvs r3, r1, r3, lsl #4 │ │ pop {r0, r3, ip, sp, pc} │ │ strdcs r8, [r0], -r0 │ │ andls r9, r1, r3, lsl #18 │ │ andcs sl, r6, #4, 16 @ 0x40000 │ │ @ instruction: 0xf0142300 │ │ - @ instruction: 0xf10dfe2d │ │ + @ instruction: 0xf10dfd57 │ │ ldmib sp, {r4, fp}^ │ │ ldm r8, {r0, r1, r2, r9, fp, ip, sp, lr} │ │ stmdacs r0, {r0, r6, r8} │ │ cdpcs 1, 0, cr13, cr0, cr8, {6} │ │ - bls e94a4 │ │ + bls e9958 │ │ ldrtmi r4, [r1], -r8, lsr #12 │ │ svclt 0x00384590 │ │ @ instruction: 0xf0a34642 │ │ - bls efed8 │ │ + bls efa44 │ │ strbmi r2, [r2, #-256] @ 0xffffff00 │ │ andeq pc, r0, #79 @ 0x4f │ │ andcs fp, r1, #136, 30 @ 0x220 │ │ svclt 0x00c82800 │ │ svclt 0x00082101 │ │ stmdbcs r0, {r0, r4, r9, sl, lr} │ │ mul r5, r9, r1 │ │ svclt 0x001f2800 │ │ @ instruction: 0x4692461f │ │ strmi r4, [r6], -r0, ror #13 │ │ @ instruction: 0x4648465a │ │ ldrbmi r4, [r8, #1585] @ 0x631 │ │ @ instruction: 0x4642bf38 │ │ - bl 6f14bc │ │ + stmia r8, {r0, r1, r5, r7, ip, sp, lr, pc}^ │ │ @ instruction: 0xf04f45c3 │ │ svclt 0x00380200 │ │ stmdacs r0, {r0, r9, sp} │ │ andeq pc, r0, pc, asr #32 │ │ tstpeq r0, pc, asr #32 @ p-variant is OBSOLETE │ │ andcs fp, r1, r8, asr #30 │ │ ldrmi fp, [r0], -r8, lsl #30 │ │ tstls r1, r8, ror #2 │ │ stmdbls r3, {r2, fp, sp, pc} │ │ movwcs r2, #526 @ 0x20e │ │ - stc2l 0, cr15, [r8, #80]! @ 0x50 │ │ + ldc2 0, cr15, [r2, #-80] @ 0xffffffb0 │ │ ldmdbeq r0, {r0, r2, r3, r8, ip, sp, lr, pc} │ │ biceq lr, r1, #10027008 @ 0x990000 │ │ tstcs r1, r0, asr r1 │ │ stmib r4, {r1, r2, r5, sp, lr, pc}^ │ │ tstcs r0, r1, lsl #16 │ │ - bvc 12f984 │ │ + bvc 12fe38 │ │ andlt r6, r9, r1, lsr #32 │ │ svchi 0x00f0e8bd │ │ @ instruction: 0xf43f2e00 │ │ @ instruction: 0xf8ddaf62 │ │ strtmi sl, [r8], -r8 │ │ ldrbmi r4, [r7, #-1585] @ 0xfffff9cf │ │ svclt 0x00384652 │ │ @ instruction: 0xf0a3463a │ │ - ldrmi lr, [sl, #2792]! @ 0xae8 │ │ + ldrmi lr, [sl, #2198]! @ 0x896 │ │ andeq pc, r0, #79 @ 0x4f │ │ andcs fp, r1, #136, 30 @ 0x220 │ │ @ instruction: 0xf04f2800 │ │ @ instruction: 0xf04f0000 │ │ svclt 0x00c80100 │ │ svclt 0x00082001 │ │ stmdacs r0, {r4, r9, sl, lr} │ │ svcge 0x0047f47f │ │ stm r0, {r5, r8, sl, fp, ip} │ │ eorvs r0, r1, r0, asr #7 │ │ pop {r0, r3, ip, sp, pc} │ │ ldrble r8, [r4], #4080 @ 0xff0 │ │ svcmi 0x00f0e92d │ │ - ldmib sp, {r0, r1, r2, r7, ip, sp, pc}^ │ │ - @ instruction: 0x4604a910 │ │ - @ instruction: 0x46989812 │ │ - @ instruction: 0x460f4616 │ │ - orrslt r2, r0, #8, 10 @ 0x2000000 │ │ - @ instruction: 0xf0a32008 │ │ - stmdacs r0, {r3, r7, r9, fp, sp, lr, pc} │ │ - adchi pc, pc, r0 │ │ - smlabbmi r0, r8, r0, pc @ │ │ - tstcs r0, r1, asr #32 │ │ - stmib sp, {r1, r2, sp, lr}^ │ │ - stmdbge r2, {r8, ip, lr} │ │ - andscs r4, r1, #5242880 @ 0x500000 │ │ - ldrtmi r4, [r9], -r8, lsl #12 │ │ - @ instruction: 0xf014462b │ │ - @ instruction: 0x4628fd91 │ │ - b 16f159c │ │ - ldrdcc lr, [r4], -sp │ │ - ldmib sp, {r1, r2, r8, fp, ip, pc}^ │ │ - bllt fe611b24 │ │ - blcs 2618c8 │ │ - addshi pc, r7, r0, asr #32 │ │ - @ instruction: 0xf04f6817 │ │ - ldmdavs r6, {r8, r9, lr}^ │ │ - @ instruction: 0x0707ebba │ │ - movweq lr, #27267 @ 0x6a83 │ │ - movweq lr, #15225 @ 0x3b79 │ │ - andcs sp, r0, r8, asr #20 │ │ - eorvs r6, r0, r0, rrx │ │ - pop {r0, r1, r2, ip, sp, pc} │ │ - strdcs r8, [r8], -r0 │ │ - b 15715d8 │ │ - rsbsle r2, ip, r0, lsl #16 │ │ - smlabbmi r0, r9, r0, pc @ │ │ - tstcs r0, r1, asr #32 │ │ - andge pc, r0, r0, asr #17 │ │ - smlabtpl r0, sp, r9, lr │ │ - strmi sl, [r5], -r2, lsl #18 │ │ - @ instruction: 0x46082211 │ │ - @ instruction: 0x462b4639 │ │ - ldc2l 0, cr15, [lr, #-80] @ 0xffffffb0 │ │ - @ instruction: 0xf0a34628 │ │ - ldmib sp, {r3, r5, r9, fp, sp, lr, pc}^ │ │ - stmdbls r6, {r2, ip, sp} │ │ - andpl lr, r2, #3620864 @ 0x374000 │ │ - rscvs fp, r0, r5, asr #2 │ │ - rsbvs r2, r2, r1 │ │ - @ instruction: 0x612160a3 │ │ - andlt r6, r7, r0, lsr #32 │ │ - svchi 0x00f0e8bd │ │ - blmi 714d4 │ │ - blcs 261fe4 │ │ - ldmdavs r3, {r0, r3, r4, r6, r8, ip, lr, pc}^ │ │ - ldrdgt pc, [r0], -r2 │ │ - streq lr, [fp, #-2691] @ 0xfffff57d │ │ - movweq lr, #52154 @ 0xcbba │ │ - movweq lr, #23417 @ 0x5b79 │ │ - andcs sp, r0, ip, lsl #20 │ │ - andls r4, r1, r9, lsr r6 │ │ - andcs sl, lr, #131072 @ 0x20000 │ │ - @ instruction: 0xf0142300 │ │ - svcge 0x0002fd35 │ │ - movtlt ip, #36751 @ 0x8f8f │ │ - eors r2, r6, r1 │ │ - stmib r4, {r3, r8, r9, sp}^ │ │ - stmib r4, {r0, r1, r8}^ │ │ - andcs r2, r0, r1, lsl #6 │ │ - andlt r6, r7, r0, lsr #32 │ │ - svchi 0x00f0e8bd │ │ - ldrtmi r2, [r9], -r0 │ │ - stmdage r2, {r0, ip, pc} │ │ - movwcs r2, #518 @ 0x206 │ │ - ldc2 0, cr15, [lr, #-80] @ 0xffffffb0 │ │ - ldrdcc lr, [r4], -sp │ │ - ldmib sp, {r1, r2, r8, fp, ip, pc}^ │ │ - stccs 2, cr5, [r1, #-8] │ │ - bcs 69704 │ │ - blcs 269670 │ │ - ldmdavs r5, {r0, r2, r5, r8, ip, lr, pc}^ │ │ - ldrdgt pc, [r0], -r2 │ │ - streq lr, [fp, #-2693] @ 0xfffff57b │ │ - movweq lr, #27580 @ 0x6bbc │ │ - movweq lr, #35701 @ 0x8b75 │ │ - strb sp, [r5, pc, lsl #23] │ │ - @ instruction: 0xf43f2900 │ │ - bcs 261254 │ │ - stmdavs r8, {r0, r2, r4, r8, ip, lr, pc} │ │ - blne fe04f560 │ │ - streq lr, [fp, #-2693] @ 0xfffff57b │ │ - andeq lr, r8, r5, ror fp │ │ - svcge 0x0081f6ff │ │ - @ instruction: 0xf1042000 │ │ - stm ip, {r2, sl, fp} │ │ - eorvs r0, r0, lr, lsl #1 │ │ - pop {r0, r1, r2, ip, sp, pc} │ │ - strdcs r8, [r1], -r0 │ │ - @ instruction: 0xf0082108 │ │ - stmdami r5, {r0, r1, r3, r5, r7, r8, sl, fp, ip, sp, lr, pc} │ │ - blmi 19fc60 │ │ - ldrbtmi r4, [r8], #-2309 @ 0xfffff6fb │ │ - ldrbtmi r4, [r9], #-1147 @ 0xfffffb85 │ │ - @ instruction: 0x212b9100 │ │ - @ instruction: 0xf826f00c │ │ - @ instruction: 0xfffe402d │ │ - strdeq r5, [sl], -r4 │ │ - andeq r5, sl, r2, lsl r6 │ │ - svcmi 0x00f0e92d │ │ - blcs 2616a8 │ │ + blcs 2619b0 │ │ addhi pc, r9, r0, asr #32 │ │ stmdavs r8, {r2, r9, sl, lr} │ │ @ instruction: 0x460f6856 │ │ ldrdlt pc, [r0], -r2 │ │ @ instruction: 0xf0866800 │ │ @ instruction: 0xb1284900 │ │ @ instruction: 0x464b465a │ │ - stc2l 7, cr15, [r6, #-1016] @ 0xfffffc08 │ │ + stc2 7, cr15, [r6], #1016 @ 0x3f8 │ │ subsle r2, sp, r0, lsl #16 │ │ stmdavs r8!, {r0, r2, r3, r4, r5, r6, fp, sp, lr} │ │ rsble r2, sl, r0, lsl #16 │ │ @ instruction: 0xf04f2008 │ │ @ instruction: 0xf0a30808 │ │ - stmdacs r0, {r1, r5, r7, r8, fp, sp, lr, pc} │ │ + stmdacs r0, {r1, r2, r3, r5, fp, sp, lr, pc} │ │ subvs sp, r6, r8, ror r0 │ │ @ instruction: 0xf8c02200 │ │ strmi fp, [r6], -r0 │ │ ldrtmi r6, [r3], -r9, ror #16 │ │ andhi lr, r0, #3358720 @ 0x334000 │ │ ldrmi sl, [r0], -r4, lsl #20 │ │ @ instruction: 0xf0142210 │ │ ldrtmi pc, [r0], -sp, lsr #25 @ │ │ - ldmdb r6!, {r0, r1, r5, r7, ip, sp, lr, pc}^ │ │ + svc 0x00faf0a2 │ │ streq lr, [r4, #-2525] @ 0xfffff623 │ │ - bge 1e19e0 │ │ + bge 1e1ce8 │ │ stmib r4, {r0, r1, r2, r9, fp, lr, pc}^ │ │ stmib r4, {r1, r9, ip}^ │ │ andlt r5, fp, r0 │ │ svchi 0x00f0e8bd │ │ ldrdge lr, [r7], -sp │ │ stmdaeq r9!, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ eorcs r9, r9, r3 │ │ - ldmdb sl!, {r0, r1, r5, r7, ip, sp, lr, pc}^ │ │ + stmda r6, {r0, r1, r5, r7, ip, sp, lr, pc} │ │ subsle r2, r5, r0, lsl #16 │ │ eorcs r4, r9, #44, 18 @ 0xb0000 │ │ ldrbtmi r4, [r9], #-1542 @ 0xfffff9fa │ │ - @ instruction: 0xff5df09f │ │ + stc2l 0, cr15, [fp, #-636]! @ 0xfffffd84 │ │ @ instruction: 0xf8cd200d │ │ vshr.s8 d24, d12, #8 │ │ stmib sp, {}^ @ │ │ andls r8, r4, r5, lsl #12 │ │ mcrge 3, 0, fp, cr4, cr5, {1} │ │ @ instruction: 0xf7fc4630 │ │ - bls 134708 │ │ + bls 134598 │ │ stmdble sl!, {r0, r9, fp, sp} │ │ ldrbmi r9, [sl], -r7, lsl #4 │ │ andslt pc, r0, sp, asr #17 │ │ @ instruction: 0xf8cd464b │ │ @ instruction: 0xf8baa018 │ │ ldmvs r9!, {} @ │ │ @ instruction: 0xf1069008 │ │ @@ -20015,92 +20209,309 @@ │ │ andlt r7, fp, r0, lsr #2 │ │ svchi 0x00f0e8bd │ │ stm r4, {r0, r3, r5, r8, sp} │ │ rscvs r0, r1, r3, asr #32 │ │ pop {r0, r1, r3, ip, sp, pc} │ │ ldmdami r2, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ @ instruction: 0xf00a4478 │ │ - blmi 4b3ef4 │ │ + blmi 4b41fc │ │ mrscs r2, (UNDEF: 2) │ │ @ instruction: 0xf00a447b │ │ stmdami sl, {r0, r2, r3, r9, fp, ip, sp, lr, pc} │ │ - blmi 2dfda8 │ │ + blmi 2e00b0 │ │ ldrbtmi r4, [r8], #-2314 @ 0xfffff6f6 │ │ ldrbtmi r4, [r9], #-1147 @ 0xfffffb85 │ │ @ instruction: 0x212b9100 │ │ @ instruction: 0xff86f00b │ │ tstcs r8, r1 │ │ ldc2l 0, cr15, [ip], #32 │ │ @ instruction: 0x21292001 │ │ ldc2l 0, cr15, [r8], #32 │ │ - @ instruction: 0xfffe1636 │ │ - @ instruction: 0xfffe3eed │ │ - @ instruction: 0x000a53b4 │ │ - ldrdeq r5, [sl], -r2 │ │ - ldrdeq r5, [sl], -r0 │ │ - andeq r5, sl, r4, lsr #9 │ │ + @ instruction: 0xfffe132e │ │ + @ instruction: 0xfffe3be5 │ │ + andeq r5, sl, ip, lsl #1 │ │ + ldrdeq r5, [sl], -sl │ │ + ldrdeq r5, [sl], -r8 │ │ + andeq r5, sl, ip, lsr #3 │ │ + svcmi 0x00f0e92d │ │ + blcs 261b0c │ │ + addhi pc, r9, r0, asr #32 │ │ + stmdavs r8, {r2, r9, sl, lr} │ │ + @ instruction: 0x460f6856 │ │ + ldrdlt pc, [r0], -r2 │ │ + @ instruction: 0xf0866800 │ │ + @ instruction: 0xb1284900 │ │ + @ instruction: 0x464b465a │ │ + blx ffe738fa │ │ + subsle r2, sp, r0, lsl #16 │ │ + stmdavs r8!, {r0, r2, r3, r4, r5, r6, fp, sp, lr} │ │ + rsble r2, sl, r0, lsl #16 │ │ + @ instruction: 0xf04f2008 │ │ + @ instruction: 0xf0a20808 │ │ + stmdacs r0, {r7, r8, r9, sl, fp, sp, lr, pc} │ │ + subvs sp, r6, r8, ror r0 │ │ + @ instruction: 0xf8c02200 │ │ + strmi fp, [r6], -r0 │ │ + ldrtmi r6, [r3], -r9, ror #16 │ │ + andhi lr, r0, #3358720 @ 0x334000 │ │ + ldrmi sl, [r0], -r4, lsl #20 │ │ + @ instruction: 0xf0142210 │ │ + @ instruction: 0x4630fbff │ │ + svc 0x004cf0a2 │ │ + streq lr, [r4, #-2525] @ 0xfffff623 │ │ + bge 1e1e44 │ │ + stmib r4, {r0, r1, r2, r9, fp, lr, pc}^ │ │ + stmib r4, {r1, r9, ip}^ │ │ + andlt r5, fp, r0 │ │ + svchi 0x00f0e8bd │ │ + ldrdge lr, [r7], -sp │ │ + stmdaeq r9!, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ + eorcs r9, r9, r3 │ │ + svc 0x0058f0a2 │ │ + subsle r2, r5, r0, lsl #16 │ │ + eorcs r4, r9, #44, 18 @ 0xb0000 │ │ + ldrbtmi r4, [r9], #-1542 @ 0xfffff9fa │ │ + ldc2 0, cr15, [sp], #636 @ 0x27c │ │ + @ instruction: 0xf8cd200d │ │ + vshr.s8 d24, d12, #8 │ │ + stmib sp, {}^ @ │ │ + andls r8, r4, r5, lsl #12 │ │ + mcrge 3, 0, fp, cr4, cr5, {1} │ │ + @ instruction: 0xf7fc4630 │ │ + bls 13443c │ │ + stmdble sl!, {r0, r9, fp, sp} │ │ + ldrbmi r9, [sl], -r7, lsl #4 │ │ + andslt pc, r0, sp, asr #17 │ │ + @ instruction: 0xf8cd464b │ │ + @ instruction: 0xf8baa018 │ │ + ldmvs r9!, {} @ │ │ + @ instruction: 0xf1069008 │ │ + andls r0, r0, r8 │ │ + @ instruction: 0xf8cd4620 │ │ + @ instruction: 0xf0009014 │ │ + andlt pc, fp, sp, asr #28 │ │ + svchi 0x00f0e8bd │ │ + vaddl.s8 q9, d8, d13 │ │ + andcc r0, r4, r0 │ │ + andcs r6, r1, r0, lsr #32 │ │ + andlt r7, fp, r0, lsr #2 │ │ + svchi 0x00f0e8bd │ │ + stm r4, {r0, r3, r5, r8, sp} │ │ + rscvs r0, r1, r3, asr #32 │ │ + pop {r0, r1, r3, ip, sp, pc} │ │ + ldmdami r2, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ + @ instruction: 0xf00a4478 │ │ + blmi 4b40a0 │ │ + mrscs r2, (UNDEF: 2) │ │ + @ instruction: 0xf00a447b │ │ + stmdami sl, {r0, r1, r2, r3, r4, r6, r8, fp, ip, sp, lr, pc} │ │ + blmi 2e020c │ │ + ldrbtmi r4, [r8], #-2314 @ 0xfffff6f6 │ │ + ldrbtmi r4, [r9], #-1147 @ 0xfffffb85 │ │ + @ instruction: 0x212b9100 │ │ + cdp2 0, 13, cr15, cr8, cr11, {0} │ │ + tstcs r8, r1 │ │ + mcrr2 0, 0, pc, lr, cr8 @ │ │ + @ instruction: 0x21292001 │ │ + mcrr2 0, 0, pc, sl, cr8 @ │ │ + @ instruction: 0xfffe11d2 │ │ + @ instruction: 0xfffe3a89 │ │ + andeq r4, sl, r0, lsr pc │ │ + andeq r5, sl, lr, ror r0 │ │ + andeq r5, sl, ip, ror r1 │ │ + andeq r5, sl, r0, asr r0 │ │ + svcmi 0x00f0e92d │ │ + blcs 261c68 │ │ + sbcshi pc, lr, r0, asr #32 │ │ + stmdavs r8, {r0, r1, r7, r9, sl, lr} │ │ + @ instruction: 0x460f6855 │ │ + ldrdhi pc, [r0], -r2 │ │ + @ instruction: 0xf0856800 │ │ + @ instruction: 0xb1284400 │ │ + strtmi r4, [r3], -r2, asr #12 │ │ + blx 12f3a56 │ │ + rsbsle r2, r2, r0, lsl #16 │ │ + ldmdavs r0!, {r1, r2, r3, r4, r5, r6, fp, sp, lr} │ │ + @ instruction: 0xf0002800 │ │ + strhcs r8, [r8], -lr │ │ + stmdbeq r8, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ + cdp 0, 13, cr15, cr0, cr2, {5} │ │ + @ instruction: 0xf0002800 │ │ + subvs r8, r5, ip, asr #1 │ │ + @ instruction: 0xf8c02200 │ │ + strmi r8, [r5], -r0 │ │ + @ instruction: 0x462b6871 │ │ + andls lr, r0, #3358720 @ 0x334000 │ │ + ldrmi sl, [r0], -r3, lsl #20 │ │ + @ instruction: 0xf0142210 │ │ + strtmi pc, [r8], -pc, asr #22 │ │ + cdp 0, 9, cr15, cr12, cr2, {5} │ │ + beq 130214 │ │ + bge 1a1fa4 │ │ + stmib fp, {r0, r1, r2, r9, fp, lr, pc}^ │ │ + stmib fp, {r1, r9, ip}^ │ │ + andlt sl, fp, r0 │ │ + svchi 0x00f0e8bd │ │ + strls r2, [r2], #-41 @ 0xffffffd7 │ │ + strls lr, [r6], #-2525 @ 0xfffff623 │ │ + @ instruction: 0xf0a22629 │ │ + stmdacs r0, {r1, r3, r5, r7, r9, sl, fp, sp, lr, pc} │ │ + adchi pc, r9, r0 │ │ + eorcs r4, r9, #1409024 @ 0x158000 │ │ + ldrbtmi r4, [r9], #-1541 @ 0xfffff9fb │ │ + stc2 0, cr15, [sp], {159} @ 0x9f │ │ + @ instruction: 0xf1ba9606 │ │ + stmib sp, {r8, r9, sl, fp}^ │ │ + vrshl.s8 d22, d4, d0 │ │ + @ instruction: 0xf2c80611 │ │ + @ instruction: 0xf1a60600 │ │ + andls r0, r3, r4 │ │ + stmdage r3, {r1, r2, r4, r5, ip, lr, pc} │ │ + @ instruction: 0xf9f8f7fc │ │ + ldmdble sl!, {r0, sl, fp, sp}^ │ │ + bge 24fdf0 │ │ + @ instruction: 0x0000f8b9 │ │ + strls lr, [r8], #-2509 @ 0xfffff633 │ │ + andls r9, sl, r2, lsl #24 │ │ + ldrdne lr, [r0], -r5 │ │ + andcs lr, r0, sp, asr #19 │ │ + strbmi sl, [r2], -r3, lsl #16 │ │ + @ instruction: 0xf0124623 │ │ + stmdbls r3, {r0, r3, r5, r6, r7, r8, sl, fp, ip, sp, lr, pc} │ │ + mulseq r0, sp, r8 │ │ + @ instruction: 0xd12342b1 │ │ + eorsle r0, r3, r0, asr #15 │ │ + ldmib r0, {r3, r5, r7, fp, sp, lr}^ │ │ + tstcc r1, r1, lsl #4 │ │ + addsmi r6, r1, #65 @ 0x41 │ │ + andcs sp, r0, r4, lsr r9 │ │ + andvs pc, r0, fp, asr #17 │ │ + andeq pc, r4, fp, lsl #17 │ │ + pop {r0, r1, r3, ip, sp, pc} │ │ + @ instruction: 0x20118ff0 │ │ + andeq pc, r0, r8, asr #5 │ │ + andeq pc, r0, fp, asr #17 │ │ + @ instruction: 0xf88b2001 │ │ + andlt r0, fp, r4 │ │ + svchi 0x00f0e8bd │ │ + stm fp, {r0, r3, r5, r8, sp} │ │ + @ instruction: 0xf8cb0023 │ │ + andlt r1, fp, ip │ │ + svchi 0x00f0e8bd │ │ + @ instruction: 0x2011f8dd │ │ + @ instruction: 0xf8dd9f06 │ │ + @ instruction: 0xf8cb3015 │ │ + @ instruction: 0xf8cb700c │ │ + @ instruction: 0xf8cb3009 │ │ + @ instruction: 0xf88b2005 │ │ + @ instruction: 0xf8cb0004 │ │ + andlt r1, fp, r0 │ │ + svchi 0x00f0e8bd │ │ + andvs pc, r0, fp, asr #17 │ │ + @ instruction: 0xf88b2001 │ │ + andlt r0, fp, r4 │ │ + svchi 0x00f0e8bd │ │ + addsmi r6, r1, #12713984 @ 0xc20000 │ │ + stmdavs r0, {r0, r1, r4, r8, fp, ip, lr, pc} │ │ + ldmib r0, {r0, r4, r5, r7, r9, sl, lr}^ │ │ + stmiavs pc!, {r9, sl, ip, lr} @ │ │ + addmi r6, r7, #40, 16 @ 0x280000 │ │ + stmdavs r8!, {r0, r1, r4, ip, lr, pc}^ │ │ + @ instruction: 0xf8401c79 │ │ + bl 55c9c │ │ + adcvs r0, r9, r7, asr #1 │ │ + ldmdavs r0!, {r2, r6, sp, lr} │ │ + addmi r4, r1, #81788928 @ 0x4e00000 │ │ + @ instruction: 0x2001d8b3 │ │ + andvs pc, r0, fp, asr #17 │ │ + andeq pc, r4, fp, lsl #17 │ │ + pop {r0, r1, r3, ip, sp, pc} │ │ + qsub8mi r8, r8, r0 │ │ + mcrr2 7, 15, pc, sl, cr13 @ │ │ + ldmdami r3, {r0, r1, r2, r5, r6, r7, r8, r9, sl, sp, lr, pc} │ │ + @ instruction: 0xf00a4478 │ │ + blmi 4f3e9c │ │ + mrscs r2, (UNDEF: 2) │ │ + ldrbtmi r4, [fp], #-1570 @ 0xfffff9de │ │ + @ instruction: 0xf85cf00a │ │ + bge 107c28 │ │ + stmdbmi fp, {r1, r3, r8, r9, fp, lr} │ │ + ldrbtmi r4, [fp], #-1144 @ 0xfffffb88 │ │ + tstls r0, r9, ror r4 │ │ + @ instruction: 0xf00b212b │ │ + ldrdcs pc, [r1], -r5 │ │ + @ instruction: 0xf0082108 │ │ + andcs pc, r1, fp, asr #22 │ │ + @ instruction: 0xf0082129 │ │ + svclt 0x0000fb47 │ │ + @ instruction: 0xfffe1072 │ │ + @ instruction: 0xfffe3883 │ │ + andeq r4, sl, sl, lsr #26 │ │ + andeq r4, sl, r8, ror lr │ │ + andeq r4, sl, r8, ror pc │ │ + andeq r4, sl, sl, asr #28 │ │ svcmi 0x00f0e92d │ │ - blcs 26180c │ │ + blcs 261e78 │ │ sbchi pc, sl, r0, asr #32 │ │ stmdavs r8, {r2, r9, sl, lr} │ │ @ instruction: 0x460f6855 │ │ ldrdhi pc, [r0], -r2 │ │ @ instruction: 0xf0856800 │ │ @ instruction: 0xb1284900 │ │ strbmi r4, [fp], -r2, asr #12 │ │ - ldc2 7, cr15, [r8], {254} @ 0xfe │ │ + blx 11f3c5c │ │ rsbsle r2, r2, r0, lsl #16 │ │ ldmdavs r0!, {r1, r2, r3, r4, r5, r6, fp, sp, lr} │ │ @ instruction: 0xf0002800 │ │ andcs r8, r8, fp, lsr #1 │ │ - beq 271748 │ │ - ldm r2!, {r0, r1, r5, r7, ip, sp, lr, pc}^ │ │ + beq 271db4 │ │ + stcl 0, cr15, [ip, #648] @ 0x288 │ │ @ instruction: 0xf0002800 │ │ strhvs r8, [r5], #-8 │ │ @ instruction: 0xf8c02200 │ │ strmi r8, [r5], -r0 │ │ @ instruction: 0x462b6871 │ │ andge lr, r0, #3358720 @ 0x334000 │ │ ldrmi sl, [r0], -r6, lsl #20 │ │ @ instruction: 0xf0142210 │ │ - @ instruction: 0x4628fbfd │ │ - stmia r6, {r0, r1, r5, r7, ip, sp, lr, pc}^ │ │ - beq 1efdb0 │ │ - bge 261b40 │ │ + strtmi pc, [r8], -fp, asr #20 │ │ + ldc 0, cr15, [r8, #648] @ 0x288 │ │ + beq 1f041c │ │ + bge 2621ac │ │ stmib r4, {r0, r1, r2, r9, fp, lr, pc}^ │ │ stmib r4, {r1, r9, ip}^ │ │ andlt sl, sp, r0 │ │ svchi 0x00f0e8bd │ │ ldrdlt lr, [r9], -sp │ │ andls r2, r2, r9, lsr #12 │ │ - @ instruction: 0xf0a32029 │ │ - stmdacs r0, {r2, r3, r6, r7, fp, sp, lr, pc} │ │ + @ instruction: 0xf0a22029 │ │ + stmdacs r0, {r1, r2, r5, r7, r8, sl, fp, sp, lr, pc} │ │ addshi pc, r5, r0 │ │ eorcs r4, r9, #76, 18 @ 0x130000 │ │ ldrbtmi r4, [r9], #-1541 @ 0xfffff9fb │ │ - mcr2 0, 5, pc, cr13, cr15, {4} @ │ │ + blx 2b1f5a │ │ @ instruction: 0xf1ba9609 │ │ stmib sp, {r8, r9, sl, fp}^ │ │ vrshl.s8 d22, d7, d0 │ │ @ instruction: 0xf2c80611 │ │ @ instruction: 0xf1a60600 │ │ andls r0, r6, r4 │ │ stmdage r6, {r2, r4, r5, ip, lr, pc} │ │ - blx ff173682 │ │ - bcs 9be9c │ │ + @ instruction: 0xf8f4f7fc │ │ + bcs 9c508 │ │ ldmvs pc!, {r1, r2, r5, r6, r8, fp, ip, lr, pc} @ │ │ - beq 671ad0 │ │ + beq 67213c │ │ andlt lr, r3, #3358720 @ 0x334000 │ │ ldmib r7, {r0, r1, r9, fp, sp, pc}^ │ │ strbmi r1, [fp], -r0 │ │ @ instruction: 0x5000f8bb │ │ andcs lr, r0, sp, asr #19 │ │ @ instruction: 0x46424650 │ │ @ instruction: 0xf0129505 │ │ - stmdbls r6, {r0, r2, r4, r7, r9, sl, fp, ip, sp, lr, pc} │ │ + stmdbls r6, {r0, r1, r5, r6, r7, sl, fp, ip, sp, lr, pc} │ │ mulseq ip, sp, r8 │ │ @ instruction: 0xd11e42b1 │ │ eorle r0, fp, r0, asr #15 │ │ ldmib r0, {r3, r4, r5, r7, fp, sp, lr}^ │ │ tstcc r1, r1, lsl #4 │ │ addsmi r6, r1, #65 @ 0x41 │ │ andcs sp, r0, sl, lsr #18 │ │ @@ -20128,186 +20539,99 @@ │ │ addsmi r6, r1, #12713984 @ 0xc20000 │ │ stmdbls r2, {r1, r2, r3, r8, fp, ip, lr, pc} │ │ andshi pc, r8, sp, asr #17 │ │ stmib sp, {r1, r3, r8, sl, ip, pc}^ │ │ @ instruction: 0xf10ab108 │ │ stmdavs r0, {r3, r8} │ │ andsls pc, ip, sp, asr #17 │ │ - stc2l 7, cr15, [ip, #1008]! @ 0x3f0 │ │ + blx 7f3daa │ │ sbcle r2, r2, r0, lsl #16 │ │ eorvs r2, r6, r1 │ │ andlt r7, sp, r0, lsr #2 │ │ svchi 0x00f0e8bd │ │ ldrbtmi r4, [r8], #-2066 @ 0xfffff7ee │ │ - @ instruction: 0xf96cf00a │ │ + @ instruction: 0xffbaf009 │ │ andcs r4, r0, r1, lsl fp │ │ ldrbtmi r2, [fp], #-258 @ 0xfffffefe │ │ - @ instruction: 0xf91ef00a │ │ - bge 1c779c │ │ + @ instruction: 0xff6cf009 │ │ + bge 1c7e08 │ │ stmdbmi fp, {r1, r3, r8, r9, fp, lr} │ │ ldrbtmi r4, [fp], #-1144 @ 0xfffffb88 │ │ tstls r0, r9, ror r4 │ │ @ instruction: 0xf00b212b │ │ - mulcs r1, r7, lr │ │ + andcs pc, r1, r5, ror #25 │ │ @ instruction: 0xf0082108 │ │ - andcs pc, r1, sp, lsl #24 │ │ + andcs pc, r1, fp, asr sl @ │ │ @ instruction: 0xf0082129 │ │ - svclt 0x0000fc09 │ │ - @ instruction: 0xfffe14d6 │ │ - @ instruction: 0xfffe3d0f │ │ - ldrdeq r5, [sl], -r6 │ │ - strdeq r5, [sl], -r4 │ │ - strdeq r5, [sl], -r2 │ │ - andeq r5, sl, r6, asr #5 │ │ - svcmi 0x00f0e92d │ │ - blcs 2619e4 │ │ - addhi pc, r9, r0, asr #32 │ │ - stmdavs r8, {r2, r9, sl, lr} │ │ - @ instruction: 0x460f6856 │ │ - ldrdlt pc, [r0], -r2 │ │ - @ instruction: 0xf0866800 │ │ - @ instruction: 0xb1284900 │ │ - @ instruction: 0x464b465a │ │ - blx fea737d2 │ │ - subsle r2, sp, r0, lsl #16 │ │ - stmdavs r8!, {r0, r2, r3, r4, r5, r6, fp, sp, lr} │ │ - rsble r2, sl, r0, lsl #16 │ │ - @ instruction: 0xf04f2008 │ │ - @ instruction: 0xf0a30808 │ │ - stmdacs r0, {r2, fp, sp, lr, pc} │ │ - subvs sp, r6, r8, ror r0 │ │ - @ instruction: 0xf8c02200 │ │ - strmi fp, [r6], -r0 │ │ - ldrtmi r6, [r3], -r9, ror #16 │ │ - andhi lr, r0, #3358720 @ 0x334000 │ │ - ldrmi sl, [r0], -r4, lsl #20 │ │ - @ instruction: 0xf0142210 │ │ - ldrtmi pc, [r0], -pc, lsl #22 @ │ │ - svc 0x00d8f0a2 │ │ - streq lr, [r4, #-2525] @ 0xfffff623 │ │ - bge 1e1d1c │ │ - stmib r4, {r0, r1, r2, r9, fp, lr, pc}^ │ │ - stmib r4, {r1, r9, ip}^ │ │ - andlt r5, fp, r0 │ │ - svchi 0x00f0e8bd │ │ - ldrdge lr, [r7], -sp │ │ - stmdaeq r9!, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ - eorcs r9, r9, r3 │ │ - svc 0x00dcf0a2 │ │ - subsle r2, r5, r0, lsl #16 │ │ - eorcs r4, r9, #44, 18 @ 0xb0000 │ │ - ldrbtmi r4, [r9], #-1542 @ 0xfffff9fa │ │ - ldc2 0, cr15, [pc, #636]! @ 35ac8 │ │ - @ instruction: 0xf8cd200d │ │ - vshr.s8 d24, d12, #8 │ │ - stmib sp, {}^ @ │ │ - andls r8, r4, r5, lsl #12 │ │ - mcrge 3, 0, fp, cr4, cr5, {1} │ │ - @ instruction: 0xf7fc4630 │ │ - bls 1343cc │ │ - stmdble sl!, {r0, r9, fp, sp} │ │ - ldrbmi r9, [sl], -r7, lsl #4 │ │ - andslt pc, r0, sp, asr #17 │ │ - @ instruction: 0xf8cd464b │ │ - @ instruction: 0xf8baa018 │ │ - ldmvs r9!, {} @ │ │ - @ instruction: 0xf1069008 │ │ - andls r0, r0, r8 │ │ - @ instruction: 0xf8cd4620 │ │ - @ instruction: 0xf0009014 │ │ - andlt pc, fp, sp, asr sp @ │ │ - svchi 0x00f0e8bd │ │ - vaddl.s8 q9, d8, d13 │ │ - andcc r0, r4, r0 │ │ - andcs r6, r1, r0, lsr #32 │ │ - andlt r7, fp, r0, lsr #2 │ │ - svchi 0x00f0e8bd │ │ - stm r4, {r0, r3, r5, r8, sp} │ │ - rscvs r0, r1, r3, asr #32 │ │ - pop {r0, r1, r3, ip, sp, pc} │ │ - ldmdami r2, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - @ instruction: 0xf00a4478 │ │ - blmi 4b3bb8 │ │ - mrscs r2, (UNDEF: 2) │ │ - @ instruction: 0xf00a447b │ │ - stmdami sl, {r0, r1, r2, r3, r5, r6, fp, ip, sp, lr, pc} │ │ - blmi 2e00e4 │ │ - ldrbtmi r4, [r8], #-2314 @ 0xfffff6f6 │ │ - ldrbtmi r4, [r9], #-1147 @ 0xfffffb85 │ │ - @ instruction: 0x212b9100 │ │ - stc2l 0, cr15, [r8, #44]! @ 0x2c │ │ - tstcs r8, r1 │ │ - blx 17f190e │ │ - @ instruction: 0x21292001 │ │ - blx 16f1916 │ │ - @ instruction: 0xfffe12fa │ │ - @ instruction: 0xfffe3bb1 │ │ - andeq r5, sl, r8, ror r0 │ │ - muleq sl, r6, r1 │ │ - muleq sl, r4, r2 │ │ - andeq r5, sl, r8, ror #2 │ │ + svclt 0x0000fa57 │ │ + @ instruction: 0xfffe0e6a │ │ + @ instruction: 0xfffe36a3 │ │ + andeq r4, sl, sl, asr #22 │ │ + muleq sl, r8, ip │ │ + muleq sl, r6, sp │ │ + andeq r4, sl, sl, ror #24 │ │ svcmi 0x00f0e92d │ │ - blcs 261b48 │ │ + blcs 262058 │ │ rschi pc, r1, r0, asr #32 │ │ stmdavs r8, {r2, r9, sl, lr} │ │ @ instruction: 0x460f6855 │ │ ldrdhi pc, [r0], -r2 │ │ @ instruction: 0xf0856800 │ │ @ instruction: 0xb1284900 │ │ strbmi r4, [fp], -r2, asr #12 │ │ - blx ffef392c │ │ + @ instruction: 0xf956f7fe │ │ rsbsle r2, r3, r0, lsl #16 │ │ ldmdavs r0!, {r1, r2, r3, r4, r5, r6, fp, sp, lr} │ │ @ instruction: 0xf0002800 │ │ andcs r8, r8, r1, asr #1 │ │ - beq 271a84 │ │ - svc 0x0054f0a2 │ │ + beq 271f94 │ │ + ldcl 0, cr15, [ip], {162} @ 0xa2 │ │ @ instruction: 0xf0002800 │ │ subvs r8, r5, pc, asr #1 │ │ @ instruction: 0xf8c02200 │ │ strmi r8, [r5], -r0 │ │ @ instruction: 0x462b6871 │ │ andge lr, r0, #3358720 @ 0x334000 │ │ ldrmi sl, [r0], -r6, lsl #20 │ │ @ instruction: 0xf0142210 │ │ - @ instruction: 0x4628fa5f │ │ - svc 0x0028f0a2 │ │ - beq 1f00ec │ │ - bge 261e7c │ │ + @ instruction: 0x4628f95b │ │ + stc 0, cr15, [r8], #648 @ 0x288 │ │ + beq 1f05fc │ │ + bge 26238c │ │ stmib r4, {r0, r1, r2, r9, fp, lr, pc}^ │ │ stmib r4, {r1, r9, ip}^ │ │ andlt sl, sp, r0 │ │ svchi 0x00f0e8bd │ │ strtcs r9, [r9], -r9, lsl #16 │ │ eorcs r9, r9, r2 │ │ ldrdlt pc, [r8], -sp @ │ │ - svc 0x002cf0a2 │ │ + ldc 0, cr15, [r4], #648 @ 0x288 │ │ @ instruction: 0xf0002800 │ │ ldmdbmi r7, {r0, r1, r3, r5, r7, pc}^ │ │ strmi r2, [r5], -r9, lsr #4 │ │ @ instruction: 0xf09f4479 │ │ - tstpcs r1, lr, lsl #26 @ p-variant is OBSOLETE │ │ + tstpcs r1, r8, lsl sl @ p-variant is OBSOLETE │ │ vsubhn.i16 d25, q4, │ │ svcne 0x00080100 │ │ svceq 0x0000f1ba │ │ strvs lr, [r7, #-2509] @ 0xfffff633 │ │ eorsle r9, r6, r6 │ │ strmi sl, [sl], r6, lsl #16 │ │ - blx 9f39bc │ │ + @ instruction: 0xf804f7fc │ │ @ instruction: 0xf1bb465e │ │ ldmdble fp!, {r0, r8, r9, sl, fp}^ │ │ - bge 10fcd4 │ │ + bge 1101e4 │ │ strbmi r9, [fp], -r2, lsl #26 │ │ ldrdne lr, [r0], -r7 │ │ @ instruction: 0xb000f8b5 │ │ stmdaeq r0!, {r1, r7, fp, sp, lr, pc}^ │ │ stmib sp, {r0, r1, r9, fp, sp, pc}^ │ │ stmdage r6, {sp} │ │ @ instruction: 0xf0124642 │ │ - stmdbls r6, {r0, r1, r2, r4, r5, r6, r7, sl, fp, ip, sp, lr, pc} │ │ + stmdbls r6, {r0, r1, r4, r5, r6, r7, r8, r9, fp, ip, sp, lr, pc} │ │ mulseq ip, sp, r8 │ │ tstle pc, r1, asr r5 @ │ │ @ instruction: 0x07c04652 │ │ ldmvs pc!, {r0, r1, r3, r5, ip, lr, pc} @ │ │ ldrdeq lr, [ip, -r7] │ │ teqvs r8, #1 │ │ stmdble sl!, {r3, r7, r9, lr} │ │ @@ -20328,246 +20652,116 @@ │ │ andcc pc, r9, r4, asr #17 │ │ andcs pc, r5, r4, asr #17 │ │ eorvs r7, r1, r0, lsr #2 │ │ pop {r0, r2, r3, ip, sp, pc} │ │ strdvs r8, [r2], -r0 @ │ │ @ instruction: 0x71202001 │ │ pop {r0, r2, r3, ip, sp, pc} │ │ - blvs fee99a2c │ │ + blvs fee99f3c │ │ ldmdble ip, {r3, r7, r9, lr} │ │ ldmib r7, {r1, r2, fp, sp, pc}^ │ │ stm r0, {r0, r3, r9, ip} │ │ stmdage r6, {r5, r6, fp} │ │ - ldc2 0, cr15, [sl, #-144] @ 0xffffff70 │ │ + blx fe6f2022 │ │ ldrtmi r4, [r8], -r2, lsl #12 │ │ @ instruction: 0xf7fe460b │ │ - asrlt pc, pc, #20 @ │ │ + lsrlt pc, fp, #17 @ │ │ stmdbge r6, {r3, fp, sp, pc} │ │ stmdaeq r0!, {r7, fp, sp, lr, pc}^ │ │ - bvs ffe41eb8 │ │ + bvs ffe423c8 │ │ andshi pc, r8, sp, asr #17 │ │ andsls pc, ip, sp, asr #17 │ │ - mcrr2 7, 15, pc, r0, cr12 @ │ │ + blx 873fa4 │ │ stmdacs r0, {r1, r4, r6, r9, sl, lr} │ │ strhcs sp, [r1], -r4 │ │ @ instruction: 0x71206022 │ │ pop {r0, r2, r3, ip, sp, pc} │ │ strdcs r8, [r1], -r0 │ │ eorvs r4, r2, r2, asr r6 │ │ andlt r7, sp, r0, lsr #2 │ │ svchi 0x00f0e8bd │ │ ldrbtmi r4, [r8], #-2066 @ 0xfffff7ee │ │ - @ instruction: 0xffb8f009 │ │ + cdp2 0, 11, cr15, cr4, cr9, {0} │ │ andcs r4, r0, r1, lsl fp │ │ ldrtmi r2, [r2], -r2, lsl #2 │ │ @ instruction: 0xf009447b │ │ - stmdami sl, {r0, r3, r5, r6, r8, r9, sl, fp, ip, sp, lr, pc} │ │ - blmi 2e02f8 │ │ + stmdami sl, {r0, r2, r5, r6, r9, sl, fp, ip, sp, lr, pc} │ │ + blmi 2e0808 │ │ ldrbtmi r4, [r8], #-2314 @ 0xfffff6f6 │ │ ldrbtmi r4, [r9], #-1147 @ 0xfffffb85 │ │ @ instruction: 0x212b9100 │ │ - stc2l 0, cr15, [r2], #44 @ 0x2c │ │ + blx ff7f202e │ │ tstcs r8, r1 │ │ - blx 1671b18 │ │ + @ instruction: 0xf954f008 │ │ @ instruction: 0x21292001 │ │ - blx 1571b20 │ │ - @ instruction: 0xfffe1198 │ │ - @ instruction: 0xfffe39a5 │ │ - andeq r4, sl, ip, ror #28 │ │ - andeq r4, sl, sl, lsl #31 │ │ - andeq r5, sl, sl, lsl #1 │ │ - andeq r4, sl, ip, asr pc │ │ - svcmi 0x00f0e92d │ │ - blcs 261d4c │ │ - sbcshi pc, lr, r0, asr #32 │ │ - stmdavs r8, {r0, r1, r7, r9, sl, lr} │ │ - @ instruction: 0x460f6855 │ │ - ldrdhi pc, [r0], -r2 │ │ - @ instruction: 0xf0856800 │ │ - @ instruction: 0xb1284400 │ │ - strtmi r4, [r3], -r2, asr #12 │ │ - @ instruction: 0xf9f4f7fe │ │ - rsbsle r2, r2, r0, lsl #16 │ │ - ldmdavs r0!, {r1, r2, r3, r4, r5, r6, fp, sp, lr} │ │ - @ instruction: 0xf0002800 │ │ - strhcs r8, [r8], -lr │ │ - stmdbeq r8, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ - cdp 0, 4, cr15, cr14, cr2, {5} │ │ - @ instruction: 0xf0002800 │ │ - subvs r8, r5, ip, asr #1 │ │ - @ instruction: 0xf8c02200 │ │ - strmi r8, [r5], -r0 │ │ - @ instruction: 0x462b6871 │ │ - andls lr, r0, #3358720 @ 0x334000 │ │ - ldrmi sl, [r0], -r3, lsl #20 │ │ - @ instruction: 0xf0142210 │ │ - @ instruction: 0x4628f959 │ │ - cdp 0, 2, cr15, cr2, cr2, {5} │ │ - beq 1302f8 │ │ - bge 1a2088 │ │ - stmib fp, {r0, r1, r2, r9, fp, lr, pc}^ │ │ - stmib fp, {r1, r9, ip}^ │ │ - andlt sl, fp, r0 │ │ - svchi 0x00f0e8bd │ │ - strls r2, [r2], #-41 @ 0xffffffd7 │ │ - strls lr, [r6], #-2525 @ 0xfffff623 │ │ - @ instruction: 0xf0a22629 │ │ - stmdacs r0, {r3, r5, r9, sl, fp, sp, lr, pc} │ │ - adchi pc, r9, r0 │ │ - eorcs r4, r9, #1409024 @ 0x158000 │ │ - ldrbtmi r4, [r9], #-1541 @ 0xfffff9fb │ │ - stc2 0, cr15, [r9], {159} @ 0x9f │ │ - @ instruction: 0xf1ba9606 │ │ - stmib sp, {r8, r9, sl, fp}^ │ │ - vrshl.s8 d22, d4, d0 │ │ - @ instruction: 0xf2c80611 │ │ - @ instruction: 0xf1a60600 │ │ - andls r0, r3, r4 │ │ - stmdage r3, {r1, r2, r4, r5, ip, lr, pc} │ │ - @ instruction: 0xf920f7fc │ │ - ldmdble sl!, {r0, sl, fp, sp}^ │ │ - bge 24fed4 │ │ - @ instruction: 0x0000f8b9 │ │ - strls lr, [r8], #-2509 @ 0xfffff633 │ │ - andls r9, sl, r2, lsl #24 │ │ - ldrdne lr, [r0], -r5 │ │ - andcs lr, r0, sp, asr #19 │ │ - strbmi sl, [r2], -r3, lsl #16 │ │ - @ instruction: 0xf0124623 │ │ - stmdbls r3, {r0, r1, r4, r5, r6, r7, r8, r9, fp, ip, sp, lr, pc} │ │ - mulseq r0, sp, r8 │ │ - @ instruction: 0xd12342b1 │ │ - eorsle r0, r3, r0, asr #15 │ │ - ldmib r0, {r3, r5, r7, fp, sp, lr}^ │ │ - tstcc r1, r1, lsl #4 │ │ - addsmi r6, r1, #65 @ 0x41 │ │ - andcs sp, r0, r4, lsr r9 │ │ - andvs pc, r0, fp, asr #17 │ │ - andeq pc, r4, fp, lsl #17 │ │ - pop {r0, r1, r3, ip, sp, pc} │ │ - @ instruction: 0x20118ff0 │ │ - andeq pc, r0, r8, asr #5 │ │ - andeq pc, r0, fp, asr #17 │ │ - @ instruction: 0xf88b2001 │ │ - andlt r0, fp, r4 │ │ - svchi 0x00f0e8bd │ │ - stm fp, {r0, r3, r5, r8, sp} │ │ - @ instruction: 0xf8cb0023 │ │ - andlt r1, fp, ip │ │ - svchi 0x00f0e8bd │ │ - @ instruction: 0x2011f8dd │ │ - @ instruction: 0xf8dd9f06 │ │ - @ instruction: 0xf8cb3015 │ │ - @ instruction: 0xf8cb700c │ │ - @ instruction: 0xf8cb3009 │ │ - @ instruction: 0xf88b2005 │ │ - @ instruction: 0xf8cb0004 │ │ - andlt r1, fp, r0 │ │ - svchi 0x00f0e8bd │ │ - andvs pc, r0, fp, asr #17 │ │ - @ instruction: 0xf88b2001 │ │ - andlt r0, fp, r4 │ │ - svchi 0x00f0e8bd │ │ - addsmi r6, r1, #12713984 @ 0xc20000 │ │ - stmdavs r0, {r0, r1, r4, r8, fp, ip, lr, pc} │ │ - ldmib r0, {r0, r4, r5, r7, r9, sl, lr}^ │ │ - stmiavs pc!, {r9, sl, ip, lr} @ │ │ - addmi r6, r7, #40, 16 @ 0x280000 │ │ - stmdavs r8!, {r0, r1, r4, ip, lr, pc}^ │ │ - @ instruction: 0xf8401c79 │ │ - bl 55d80 │ │ - adcvs r0, r9, r7, asr #1 │ │ - ldmdavs r0!, {r2, r6, sp, lr} │ │ - addmi r4, r1, #81788928 @ 0x4e00000 │ │ - @ instruction: 0x2001d8b3 │ │ - andvs pc, r0, fp, asr #17 │ │ - andeq pc, r4, fp, lsl #17 │ │ - pop {r0, r1, r3, ip, sp, pc} │ │ - qsub8mi r8, r8, r0 │ │ - blx ffd73cbc │ │ - ldmdami r3, {r0, r1, r2, r5, r6, r7, r8, r9, sl, sp, lr, pc} │ │ - @ instruction: 0xf0094478 │ │ - blmi 4f57a8 │ │ - mrscs r2, (UNDEF: 2) │ │ - ldrbtmi r4, [fp], #-1570 @ 0xfffff9de │ │ - cdp2 0, 6, cr15, cr6, cr9, {0} │ │ - bge 107d0c │ │ - stmdbmi fp, {r1, r3, r8, r9, fp, lr} │ │ - ldrbtmi r4, [fp], #-1144 @ 0xfffffb88 │ │ - tstls r0, r9, ror r4 │ │ - @ instruction: 0xf00b212b │ │ - ldrdcs pc, [r1], -pc @ │ │ - @ instruction: 0xf0082108 │ │ - andcs pc, r1, r5, asr r9 @ │ │ - @ instruction: 0xf0082129 │ │ - svclt 0x0000f951 │ │ - @ instruction: 0xfffe0f8e │ │ - @ instruction: 0xfffe379f │ │ - andeq r4, sl, r6, ror #24 │ │ - andeq r4, sl, r4, lsl #27 │ │ - andeq r4, sl, r4, lsl #29 │ │ - andeq r4, sl, r6, asr sp │ │ + @ instruction: 0xf950f008 │ │ + @ instruction: 0xfffe0c88 │ │ + @ instruction: 0xfffe3495 │ │ + andeq r4, sl, ip, lsr r9 │ │ + andeq r4, sl, sl, lsl #21 │ │ + andeq r4, sl, sl, lsl #23 │ │ + andeq r4, sl, ip, asr sl │ │ svcmi 0x00f0e92d │ │ - blcs 261f54 │ │ + blcs 26225c │ │ rschi pc, r3, r0, asr #32 │ │ stmdavs r8, {r2, r9, sl, lr} │ │ @ instruction: 0x460f6855 │ │ ldrdhi pc, [r0], -r2 │ │ @ instruction: 0xf0856800 │ │ @ instruction: 0xb1284900 │ │ strbmi r4, [fp], -r2, asr #12 │ │ - @ instruction: 0xf8f0f7fe │ │ + @ instruction: 0xf850f7fe │ │ rsbsle r2, r2, r0, lsl #16 │ │ ldmdavs r0!, {r1, r2, r3, r4, r5, r6, fp, sp, lr} │ │ @ instruction: 0xf0002800 │ │ andcs r8, r8, r3, asr #1 │ │ - beq 271e98 │ │ - stcl 0, cr15, [sl, #-648] @ 0xfffffd78 │ │ + beq 2721a0 │ │ + bl ff5f22f0 │ │ @ instruction: 0xf0002800 │ │ ldrdvs r8, [r5], #-1 │ │ @ instruction: 0xf8c02200 │ │ strmi r8, [r5], -r0 │ │ @ instruction: 0x462b6871 │ │ andge lr, r0, #3358720 @ 0x334000 │ │ ldrmi sl, [r0], -r3, lsl #20 │ │ @ instruction: 0xf0142210 │ │ @ instruction: 0x4628f855 │ │ - ldc 0, cr15, [lr, #-648] @ 0xfffffd78 │ │ - beq 130500 │ │ - bge 1a2290 │ │ + bl fe8f2318 │ │ + beq 130808 │ │ + bge 1a2598 │ │ stmib r4, {r0, r1, r2, r9, fp, lr, pc}^ │ │ stmib r4, {r1, r9, ip}^ │ │ andlt sl, fp, r0 │ │ svchi 0x00f0e8bd │ │ strtcs r9, [r9], -r6, lsl #16 │ │ eorcs r9, r9, r2 │ │ @ instruction: 0xb01cf8dd │ │ - stc 0, cr15, [r2, #-648]! @ 0xfffffd78 │ │ + bl febf2340 │ │ @ instruction: 0xf0002800 │ │ ldmdbmi r8, {r0, r2, r3, r5, r7, pc}^ │ │ strmi r2, [r5], -r9, lsr #4 │ │ @ instruction: 0xf09f4479 │ │ - tstpcs r1, r4, lsl #22 @ p-variant is OBSOLETE │ │ + tstpcs r1, r2, lsl r9 @ p-variant is OBSOLETE │ │ vsubhn.i16 d25, q4, q3 │ │ svcne 0x00080100 │ │ svceq 0x0000f1ba │ │ strvs lr, [r4, #-2509] @ 0xfffff633 │ │ eorsle r9, r5, r3 │ │ strmi sl, [sl], r3, lsl #16 │ │ - @ instruction: 0xf81cf7fc │ │ + mrc2 7, 7, pc, cr14, cr11, {7} │ │ @ instruction: 0xf1bb465e │ │ ldmdble sp!, {r0, r8, r9, sl, fp}^ │ │ popvs {r1, r8, r9, fp, ip, pc} │ │ strcc lr, [r8], -sp, asr #19 │ │ @ instruction: 0x464b8818 │ │ stmdage r8, {r1, r3, ip, pc} │ │ andne lr, r0, #3489792 @ 0x354000 │ │ andeq lr, r0, #3358720 @ 0x334000 │ │ strbmi sl, [r2], -r3, lsl #16 │ │ - blx ffbf1e50 │ │ + blx ffbf2158 │ │ @ instruction: 0xf89d9903 │ │ ldrbmi r0, [r1, #-16] │ │ @ instruction: 0x4657d11f │ │ eorle r0, fp, r0, asr #15 │ │ ldmib r0, {r3, r5, r7, fp, sp, lr}^ │ │ tstcc r1, r1, lsl #4 │ │ addsmi r6, r1, #65 @ 0x41 │ │ @@ -20611,58 +20805,58 @@ │ │ andvs r3, r8, r1 │ │ addmi r6, r8, #1114112 @ 0x110000 │ │ @ instruction: 0x2001d2b1 │ │ @ instruction: 0x71206027 │ │ pop {r0, r1, r3, ip, sp, pc} │ │ usub8mi r8, r8, r0 │ │ @ instruction: 0xf7fd460f │ │ - @ instruction: 0x4639f9b2 │ │ + @ instruction: 0x4639f911 │ │ @ instruction: 0xe7db4657 │ │ ldrbtmi r4, [r8], #-2066 @ 0xfffff7ee │ │ stc2 0, cr15, [ip, #36]! @ 0x24 │ │ andcs r4, r0, r1, lsl fp │ │ ldrtmi r2, [r2], -r2, lsl #2 │ │ @ instruction: 0xf009447b │ │ stmdami sl, {r0, r2, r3, r4, r6, r8, sl, fp, ip, sp, lr, pc} │ │ - blmi 2e0704 │ │ + blmi 2e0a0c │ │ ldrbtmi r4, [r8], #-2314 @ 0xfffff6f6 │ │ ldrbtmi r4, [r9], #-1147 @ 0xfffffb85 │ │ @ instruction: 0x212b9100 │ │ - blx ff5f1f34 │ │ + blx ff5f223c │ │ tstcs r8, r1 │ │ @ instruction: 0xf84cf008 │ │ @ instruction: 0x21292001 │ │ @ instruction: 0xf848f008 │ │ - @ instruction: 0xfffe0d84 │ │ - @ instruction: 0xfffe358d │ │ - andeq r4, sl, r4, asr sl │ │ - andeq r4, sl, r2, ror fp │ │ - andeq r4, sl, r2, ror ip │ │ - andeq r4, sl, r4, asr #22 │ │ + @ instruction: 0xfffe0a7c │ │ + @ instruction: 0xfffe3285 │ │ + andeq r4, sl, ip, lsr #14 │ │ + andeq r4, sl, sl, ror r8 │ │ + andeq r4, sl, sl, ror r9 │ │ + andeq r4, sl, ip, asr #16 │ │ svcmi 0x00f0e92d │ │ strmi fp, [r4], -fp, lsl #1 │ │ stmdacs r8, {r2, r4, fp, ip, pc} │ │ addhi pc, pc, r0, asr #32 │ │ @ instruction: 0x46176858 │ │ @ instruction: 0xf080681e │ │ @ instruction: 0xb1294500 │ │ ldrtmi r4, [r2], -r8, lsl #12 │ │ @ instruction: 0xf7fd462b │ │ - mvnlt pc, #932 @ 0x3a4 │ │ + mvnlt pc, #292 @ 0x124 │ │ ldrsbhi pc, [r8], #-141 @ 0xffffff73 @ │ │ svceq 0x0001f1b8 │ │ @ instruction: 0xf8ddd976 │ │ @ instruction: 0x462ba054 │ │ andne lr, r0, #3522560 @ 0x35c000 │ │ stmdage r8, {r0, r2, r3, r6, r7, r8, fp, sp, lr, pc} │ │ @ instruction: 0x0000f8ba │ │ stmdage r8, {r1, r3, ip, pc} │ │ andeq lr, r0, #3358720 @ 0x334000 │ │ ldrtmi sl, [r2], -r4, lsl #16 │ │ - blx c71fcc │ │ + blx c722d4 │ │ vmla.i8 d25, d0, d4 │ │ @ instruction: 0xf89d0911 │ │ vshr.s8 d16, d4, #8 │ │ strbmi r0, [r9, #-2304] @ 0xfffff700 │ │ strbeq sp, [r0, pc, lsl #2] │ │ ldmvs r8!, {r0, r2, r5, ip, lr, pc} │ │ andne lr, r1, #208, 18 @ 0x340000 │ │ @@ -20704,50 +20898,50 @@ │ │ andvs r3, r8, r1 │ │ addmi r6, r8, #1114112 @ 0x110000 │ │ @ instruction: 0x2001d2b8 │ │ andls pc, r0, r4, asr #17 │ │ andlt r7, fp, r0, lsr #2 │ │ svchi 0x00f0e8bd │ │ tstls r3, r8, asr r6 │ │ - @ instruction: 0xf8f7f7fd │ │ + @ instruction: 0xf856f7fd │ │ ldrb r9, [sp, r3, lsl #18] │ │ andcs r4, r0, fp, lsl #22 │ │ strbmi r2, [r2], -r2, lsl #2 │ │ @ instruction: 0xf009447b │ │ stmdami r5, {r0, r1, r2, r5, r7, sl, fp, ip, sp, lr, pc} │ │ - blmi 1a0874 │ │ + blmi 1a0b7c │ │ ldrbtmi r4, [r8], #-2309 @ 0xfffff6fb │ │ ldrbtmi r4, [r9], #-1147 @ 0xfffffb85 │ │ @ instruction: 0x212b9100 │ │ - blx 8720a0 │ │ - @ instruction: 0xfffe3421 │ │ - andeq r4, sl, r8, ror #17 │ │ - andeq r4, sl, r6, lsl #20 │ │ - ldrdeq r4, [sl], -r8 │ │ + blx 8723a8 │ │ + @ instruction: 0xfffe3119 │ │ + andeq r4, sl, r0, asr #11 │ │ + andeq r4, sl, lr, lsl #14 │ │ + andeq r4, sl, r0, ror #13 │ │ svcmi 0x00f0e92d │ │ strmi fp, [r4], -sp, lsl #1 │ │ stmdacs r8, {r1, r2, r4, fp, ip, pc} │ │ adchi pc, ip, r0, asr #32 │ │ @ instruction: 0x46176858 │ │ @ instruction: 0xf080681e │ │ @ instruction: 0xb1294500 │ │ ldrtmi r4, [r2], -r8, lsl #12 │ │ @ instruction: 0xf7fd462b │ │ - mvnlt pc, #63, 30 @ 0xfc │ │ + mvnlt pc, #2544 @ 0x9f0 │ │ ldrdge pc, [r0], #-141 @ 0xffffff73 @ │ │ svceq 0x0001f1ba │ │ addshi pc, r3, r0, asr #4 │ │ ldrsbhi pc, [ip], #-141 @ 0xffffff73 @ │ │ ldmib r7, {r0, r1, r9, fp, sp, pc}^ │ │ strtmi r1, [fp], -r0 │ │ andcs lr, r0, sp, asr #19 │ │ @ instruction: 0xf8b8a806 │ │ ldrtmi r9, [r2], -r0 │ │ andsls pc, r4, sp, asr #17 │ │ - bhi 13080c │ │ + bhi 130b14 │ │ @ instruction: 0xf984f012 │ │ andscs r9, r1, #98304 @ 0x18000 │ │ mulseq ip, sp, r8 │ │ andeq pc, r0, #200, 4 @ 0x8000000c │ │ @ instruction: 0xd10e4291 │ │ eorle r0, r4, r0, asr #15 │ │ ldmib r3, {r0, r1, r3, r4, r5, r7, fp, sp, lr}^ │ │ @@ -20767,80 +20961,80 @@ │ │ vshr.s8 d18, d1, #8 │ │ eorvs r0, r0, r0 │ │ @ instruction: 0x71202001 │ │ pop {r0, r2, r3, ip, sp, pc} │ │ strdvs r8, [r2], -r0 @ │ │ @ instruction: 0x71202001 │ │ pop {r0, r2, r3, ip, sp, pc} │ │ - blvs fe69a108 │ │ + blvs fe69a410 │ │ ldmdble r9!, {r3, r7, r9, lr} │ │ ldrdeq lr, [r9, -r3] │ │ @ instruction: 0xf8cd9302 │ │ stmib sp, {r5, ip, pc}^ │ │ @ instruction: 0xb1b98a06 │ │ cmpeq r1, r1, lsl #22 │ │ - bleq 772564 │ │ - b 13fe168 │ │ + bleq 77286c │ │ + b 13fe470 │ │ tstcs r0, r1, lsl #20 │ │ mulcc ip, fp, r8 │ │ mulcs r4, fp, r8 │ │ - blvc c742e4 │ │ + blvc c745ec │ │ smlabteq r0, sp, r9, lr │ │ ldrtmi sl, [r9], -r6, lsl #16 │ │ - stc2 0, cr15, [r2, #-108] @ 0xffffff94 │ │ - beq c72870 │ │ + stc2 0, cr15, [r6], {27} │ │ + beq c72b78 │ │ strd sp, [r1], -r0 │ │ mrscs r2, (UNDEF: 0) │ │ strmi r9, [r2], -r2, lsl #30 │ │ ldrtmi r4, [r8], -fp, lsl #12 │ │ - mcr2 7, 6, pc, cr6, cr13, {7} @ │ │ + mcr2 7, 1, pc, cr6, cr13, {7} @ │ │ ldmdals r8, {r4, r5, r7, r8, ip, sp, pc} │ │ tstcc r8, r6, lsl #18 │ │ @ instruction: 0xf8cd9606 │ │ stmib sp, {r3, r5, ip, pc}^ │ │ - bvs ffe561d0 │ │ - @ instruction: 0xf7fc9507 │ │ - andscs pc, r1, #11993088 @ 0xb70000 │ │ + bvs ffe564d8 │ │ + @ instruction: 0xf7fb9507 │ │ + andscs pc, r1, #620 @ 0x26c │ │ vmlal.s8 q9, d8, d0 │ │ addsle r0, lr, r0, lsl #4 │ │ eorvs r2, r2, r1 │ │ andlt r7, sp, r0, lsr #2 │ │ svchi 0x00f0e8bd │ │ andcs r2, r1, r1, lsl r2 │ │ andeq pc, r0, #200, 4 @ 0x8000000c │ │ @ instruction: 0x71206022 │ │ pop {r0, r2, r3, ip, sp, pc} │ │ - blmi 35a1a0 │ │ + blmi 35a4a8 │ │ mrscs r2, (UNDEF: 2) │ │ ldrbtmi r4, [fp], #-1618 @ 0xfffff9ae │ │ - blx ff872212 │ │ - bge 1c8204 │ │ + blx ff87251a │ │ + bge 1c850c │ │ stmdbmi r6, {r0, r2, r8, r9, fp, lr} │ │ ldrbtmi r4, [fp], #-1144 @ 0xfffffb88 │ │ tstls r0, r9, ror r4 │ │ @ instruction: 0xf00b212b │ │ svclt 0x0000f959 │ │ - @ instruction: 0xfffe3293 │ │ - andeq r4, sl, sl, asr r7 │ │ - andeq r4, sl, r8, ror r8 │ │ - andeq r4, sl, sl, asr #16 │ │ + @ instruction: 0xfffe2f8b │ │ + andeq r4, sl, r2, lsr r4 │ │ + andeq r4, sl, r0, lsl #11 │ │ + andeq r4, sl, r2, asr r5 │ │ ldrbmi lr, [r0, sp, lsr #18]! │ │ strmi fp, [r4], -sl, lsl #1 │ │ stmdacs r8, {r1, r4, fp, ip, pc} │ │ addhi pc, r1, r0, asr #32 │ │ @ instruction: 0x46176858 │ │ @ instruction: 0xf080681e │ │ @ instruction: 0xb1294500 │ │ ldrtmi r4, [r2], -r8, lsl #12 │ │ @ instruction: 0xf7fd462b │ │ - biclt pc, r8, #1904 @ 0x770 │ │ - bcs 9ca90 │ │ + biclt pc, r8, #13760 @ 0x35c0 │ │ + bcs 9cd98 │ │ ldmdals r3, {r0, r1, r3, r5, r6, r8, fp, ip, lr, pc} │ │ stmib sp, {r0, r1, r3, r5, r9, sl, lr}^ │ │ - bge 1b6a64 │ │ + bge 1b6d6c │ │ tstls r8, r1, lsl #16 │ │ ldrdne lr, [r0], -r7 │ │ andcs lr, r0, sp, asr #19 │ │ ldrtmi sl, [r2], -r2, lsl #16 │ │ @ instruction: 0xf8c2f012 │ │ vmla.i8 d25, d0, d2 │ │ @ instruction: 0xf89d0811 │ │ @@ -20874,37 +21068,37 @@ │ │ stmdavs r0, {r1, r2, r4, r8, fp, ip, lr, pc} │ │ stmdbge r0, {r4, r6, r7, r8, fp, sp, lr, pc} │ │ ldrdvc pc, [r8], -sl │ │ ldrdeq pc, [r0], -sl │ │ andsle r4, r4, r7, lsl #5 │ │ ldrdeq pc, [r4], -sl │ │ @ instruction: 0xf8401c79 │ │ - bl 4e3d0 │ │ + bl 4e6d8 │ │ @ instruction: 0xf8ca00c7 │ │ subvs r1, r5, r8 │ │ ldrdeq pc, [r0], -r9 │ │ ldmle pc!, {r0, r7, r9, lr} @ │ │ @ instruction: 0xf8c42001 │ │ @ instruction: 0x71208000 │ │ pop {r1, r3, ip, sp, pc} │ │ @ instruction: 0x465087f0 │ │ - @ instruction: 0xffccf7fc │ │ - blmi 3302b4 │ │ + @ instruction: 0xff2cf7fc │ │ + blmi 3305bc │ │ mrscs r2, (UNDEF: 2) │ │ @ instruction: 0xf009447b │ │ stmdami r5, {r0, r1, r6, r8, r9, fp, ip, sp, lr, pc} │ │ - blmi 1a0b34 │ │ + blmi 1a0e3c │ │ ldrbtmi r4, [r8], #-2309 @ 0xfffff6fb │ │ ldrbtmi r4, [r9], #-1147 @ 0xfffffb85 │ │ @ instruction: 0x212b9100 │ │ @ instruction: 0xf8bcf00b │ │ - @ instruction: 0xfffe3159 │ │ - andeq r4, sl, r0, lsr #12 │ │ - andeq r4, sl, lr, lsr r7 │ │ - andeq r4, sl, r0, lsl r7 │ │ + @ instruction: 0xfffe2e51 │ │ + strdeq r4, [sl], -r8 │ │ + andeq r4, sl, r6, asr #8 │ │ + andeq r4, sl, r8, lsl r4 │ │ svcmi 0x00f0e92d │ │ strmi fp, [pc], -r9, lsl #1 │ │ ldmib r1, {r2, r9, sl, lr}^ │ │ ldrmi r1, [r8], r0 │ │ @ instruction: 0x46169d12 │ │ andpl lr, r0, sp, asr #19 │ │ @ instruction: 0xf012a805 │ │ @@ -20935,38 +21129,38 @@ │ │ addsmi r6, r1, #190464 @ 0x2e800 │ │ ldmib r7, {r0, r1, r3, r6, r8, fp, ip, lr, pc}^ │ │ strls r1, [r4, -r9, lsl #4] │ │ stmib sp, {r0, r1, r2, r8, sl, ip, pc}^ │ │ stmib sp, {r1, sl, fp}^ │ │ biclt ip, sl, r5 │ │ subeq lr, r2, r2, lsl #22 │ │ - beq 7727ec │ │ + beq 772af4 │ │ ldmdbeq r4, {r0, r2, r3, r8, ip, sp, lr, pc} │ │ - b 13fe7f0 │ │ + b 13feaf8 │ │ andcs r1, r0, r0, lsl #22 │ │ mulcc ip, sl, r8 │ │ mulcs r4, sl, r8 │ │ - blvc c74568 │ │ + blvc c74870 │ │ smlabteq r0, sp, r9, lr │ │ ldrtmi r4, [r9], -r8, asr #12 │ │ - blx feff247a │ │ - bleq c72afc │ │ + blx 10f2782 │ │ + bleq c72e04 │ │ strd sp, [r1], -r0 │ │ mrscs r2, (UNDEF: 0) │ │ strmi r9, [r2], -r4, lsl #26 │ │ strtmi r4, [r8], -fp, lsl #12 │ │ - stc2 7, cr15, [r2, #1012] @ 0x3f4 │ │ + stc2l 7, cr15, [r2], #1012 @ 0x3f4 │ │ @ instruction: 0xf8d5b328 │ │ @ instruction: 0xf8d9902c │ │ popvs {ip, sp, lr} │ │ addmi r6, r5, #56, 16 @ 0x380000 │ │ ldmdavs r8!, {r1, r2, r5, ip, lr, pc}^ │ │ ldmib r9, {r0, r1, r3, r5, r8}^ │ │ sbcpl r1, r6, r1, lsl #4 │ │ - bl 3d5f0 │ │ + bl 3d8f8 │ │ adcsvs r1, fp, r5 │ │ addvs r9, r3, r3, lsl #22 │ │ sbcvs r9, r3, r2, lsl #22 │ │ @ instruction: 0xf8c02311 │ │ vaddl.s8 q12, d8, d4 │ │ stmdavs r8, {r8, r9} │ │ andvs r3, r8, r1 │ │ @@ -20976,15 +21170,15 @@ │ │ pop {r0, r3, ip, sp, pc} │ │ tstcs r1, #240, 30 @ 0x3c0 │ │ vaddl.s8 q9, d8, d1 │ │ eorvs r0, r3, r0, lsl #6 │ │ andlt r7, r9, r0, lsr #2 │ │ svchi 0x00f0e8bd │ │ @ instruction: 0xf7fc4638 │ │ - @ instruction: 0xe7d4fed8 │ │ + @ instruction: 0xe7d4fe37 │ │ svcmi 0x00f0e92d │ │ strmi fp, [pc], -r9, lsl #1 │ │ ldmib r1, {r2, r9, sl, lr}^ │ │ ldrmi r1, [fp], r0 │ │ @ instruction: 0x46909d12 │ │ andpl lr, r0, sp, asr #19 │ │ @ instruction: 0xf011a804 │ │ @@ -21006,99 +21200,99 @@ │ │ andcc pc, r9, r4, asr #17 │ │ andcs pc, r5, r4, asr #17 │ │ eorvs r7, r1, r0, lsr #2 │ │ pop {r0, r3, ip, sp, pc} │ │ strdvs r8, [r6], -r0 @ │ │ @ instruction: 0x71202001 │ │ pop {r0, r3, ip, sp, pc} │ │ - blvs fe49a4c4 │ │ + blvs fe49a7cc │ │ stmdble r1, {r3, r7, r9, lr}^ │ │ ldrdeq lr, [r9, -r2] │ │ movwvs lr, #2517 @ 0x9d5 │ │ andls r6, r3, #11468800 @ 0xaf0000 │ │ stmib sp, {r1, r2, r8, r9, sl, ip, pc}^ │ │ @ instruction: 0xb1b96304 │ │ cmpeq r1, r1, lsl #22 │ │ - beq 772924 │ │ + beq 772c2c │ │ ldmdbeq r0, {r0, r2, r3, r8, ip, sp, lr, pc} │ │ mrseq r2, (UNDEF: 13) │ │ @ instruction: 0xf89a2100 │ │ @ instruction: 0xf89a300c │ │ @ instruction: 0xf85a2004 │ │ stmib sp, {r4, r5, r8, r9, fp, ip, sp, lr}^ │ │ strbmi r0, [r8], -r0, lsl #2 │ │ @ instruction: 0xf01b4639 │ │ - fldmdbxcc r0!, {d15-d30} @ Deprecated │ │ + vldmdbcc r0!, {s30-s194} │ │ strd sp, [r1], -r1 │ │ mrscs r2, (UNDEF: 0) │ │ strmi r9, [r2], -r3, lsl #26 │ │ strtmi r4, [r8], -fp, lsl #12 │ │ - stc2l 7, cr15, [r6], #1012 @ 0x3f4 │ │ - bvs ffa62ce0 │ │ + mcrr2 7, 15, pc, r6, cr13 @ │ │ + bvs ffa62fe8 │ │ @ instruction: 0xf2c82611 │ │ ldmib r0, {r9, sl}^ │ │ popvs {r8, fp, ip, sp, lr} │ │ addmi r6, r5, #56, 16 @ 0x380000 │ │ ldmdavs r8!, {r0, r1, r3, r4, ip, lr, pc}^ │ │ @ instruction: 0xf8401c69 │ │ - bl 56650 │ │ + bl 56958 │ │ adcsvs r0, r9, r5, asr #1 │ │ andlt pc, r4, r0, asr #17 │ │ ldrdeq pc, [r0], -r9 │ │ ldmle pc, {r0, r7, r9, lr} @ │ │ eorvs r2, r6, r1 │ │ andlt r7, r9, r0, lsr #2 │ │ svchi 0x00f0e8bd │ │ andcs r2, r1, r1, lsl r6 │ │ streq pc, [r0], -r8, asr #5 │ │ @ instruction: 0x71206026 │ │ pop {r0, r3, ip, sp, pc} │ │ shsub8mi r8, r8, r0 │ │ - mcr2 7, 4, pc, cr0, cr12, {7} @ │ │ + stc2l 7, cr15, [r0, #1008]! @ 0x3f0 │ │ ldrble lr, [r4], #2015 @ 0x7df │ │ addlt fp, r6, r0, lsl #11 │ │ @ instruction: 0xf10d4809 │ │ - bmi 276a1c │ │ + bmi 276d24 │ │ tstls r4, r8, ror r4 │ │ tstls r3, r1, lsl #18 │ │ stmib sp, {r0, r3, r5, r6, r9, sl, lr}^ │ │ mrsls r0, (UNDEF: 2) │ │ eorcc r4, r8, sl, ror r4 │ │ @ instruction: 0xf03aa902 │ │ - andlt pc, r6, r9, ror #20 │ │ + andlt pc, r6, pc, lsr r9 @ │ │ + svclt 0x0000bd80 │ │ + andeq r6, sl, r8, ror #31 │ │ + andeq r3, sl, ip, asr #23 │ │ + addlt fp, r6, r0, lsl #11 │ │ + @ instruction: 0xf10d4809 │ │ + bmi 276d58 │ │ + tstls r4, r8, ror r4 │ │ + tstls r3, r1, lsl #18 │ │ + stmib sp, {r0, r3, r5, r6, r9, sl, lr}^ │ │ + mrsls r0, (UNDEF: 2) │ │ + andscc r4, r8, sl, ror r4 │ │ + @ instruction: 0xf03aa902 │ │ + andlt pc, r6, r5, lsr #18 │ │ svclt 0x0000bd80 │ │ - andeq r7, sl, r0, ror #5 │ │ - andeq r3, sl, r4, asr #29 │ │ + muleq sl, r4, pc @ │ │ + andeq r3, sl, ip, lsr #23 │ │ addlt fp, r6, r0, lsl #11 │ │ stmdbmi fp, {r1, r3, r9, fp, lr} │ │ ldrbtmi r9, [sl], #-0 │ │ @ instruction: 0xf1014479 │ │ andls r0, r1, r0, lsl r0 │ │ andseq pc, r7, sp, lsl #2 │ │ stmdage r1, {r2, ip, pc} │ │ strbtmi r9, [r8], -r3 │ │ @ instruction: 0xf1019002 │ │ stmdbge r2, {r2, r3} │ │ - blx 13726fc │ │ + @ instruction: 0xf908f03a │ │ stclt 0, cr11, [r0, #24] │ │ - @ instruction: 0x000a3eb6 │ │ - andeq r8, sl, r4, lsr #3 │ │ - addlt fp, r6, r0, lsl #11 │ │ - @ instruction: 0xf10d4809 │ │ - bmi 276a88 │ │ - tstls r4, r8, ror r4 │ │ - tstls r3, r1, lsl #18 │ │ - stmib sp, {r0, r3, r5, r6, r9, sl, lr}^ │ │ - mrsls r0, (UNDEF: 2) │ │ - andscc r4, r8, sl, ror r4 │ │ - @ instruction: 0xf03aa902 │ │ - andlt pc, r6, r3, lsr sl @ │ │ - svclt 0x0000bd80 │ │ - andeq r7, sl, r4, asr r2 │ │ - andeq r3, sl, r0, lsl #29 │ │ + muleq sl, lr, fp │ │ + andeq r7, sl, r8, lsl #29 │ │ mvnsmi lr, #737280 @ 0xb4000 │ │ strmi fp, [r5], -r9, lsl #1 │ │ movwcs r6, #2048 @ 0x800 │ │ andvs r6, r3, r2, lsl #16 │ │ tstvs r3, #17408 @ 0x4400 │ │ strbtmi fp, [ip], -r9, ror #6 │ │ strmi r4, [r8, r0, lsr #12] │ │ @@ -21106,148 +21300,142 @@ │ │ ldrdvc pc, [r0], -r9 │ │ ldrdeq lr, [r0, -r7] │ │ andsle r4, r3, r8, lsl #6 │ │ strhi lr, [r5, #-2519] @ 0xfffff629 │ │ @ instruction: 0xf108b155 │ │ ldmdavs r0!, {r3, r9, sl} │ │ svclt 0x001c2800 │ │ - @ instruction: 0xf0a26870 │ │ - @ instruction: 0x3618e898 │ │ + @ instruction: 0xf0a16870 │ │ + sadd16cc lr, r8, ip │ │ mvnsle r3, r1, lsl #26 │ │ stmdacs r0, {r3, r4, r5, r8, fp, sp, lr} │ │ @ instruction: 0x4640bf1c │ │ - stm lr, {r1, r5, r7, ip, sp, lr, pc} │ │ + svc 0x0012f0a1 │ │ ldrdeq pc, [r0], -r9 │ │ andcs r2, r1, #0, 2 │ │ smlattcs r2, r0, r8, lr │ │ addgt ip, lr, lr, lsl #25 │ │ umulleq lr, lr, r4, r8 @ │ │ andcs ip, r1, lr, lsl #1 │ │ pop {r0, r3, ip, sp, pc} │ │ stmdami r3, {r4, r5, r6, r7, r8, r9, pc} │ │ - bmi fec20 │ │ + bmi fef28 │ │ ldrbtmi r4, [sl], #-1144 @ 0xfffffb88 │ │ @ instruction: 0xf9c4f009 │ │ - @ instruction: 0xfffe0947 │ │ - muleq sl, sl, fp │ │ - ldrdeq lr, [r0, -r0] │ │ - stmdavs r2, {r8, r9, sp} │ │ - ldmdavs r0, {r0, r1, sp, lr} │ │ - stmdavs r9, {r0, r1, r4, sp, lr} │ │ - andcs r6, r1, r8 │ │ - ldrble r4, [r4], #1904 @ 0x770 │ │ + @ instruction: 0xfffe063f │ │ + andeq r4, sl, r2, lsr #17 │ │ svcmi 0x00f0e92d │ │ @ instruction: 0x4604b093 │ │ movwcs r6, #2048 @ 0x800 │ │ andvs r6, r3, r2, lsl #16 │ │ ldrsbvs r6, [r3, #145] @ 0x91 │ │ @ instruction: 0xf0002900 │ │ stcge 2, cr8, [r6, #-328] @ 0xfffffeb8 │ │ strmi r4, [r8, r8, lsr #12] │ │ - bleq c72b4c │ │ + bleq c72e3c │ │ smulleq lr, lr, r5, r8 @ │ │ sbcgt r4, lr, r8, asr r6 │ │ ldrdge pc, [r4], -r4 │ │ ldrdhi pc, [r0], -sl │ │ ldrdeq pc, [r0], -r8 │ │ @ instruction: 0xf0002800 │ │ ldmib r8, {r1, r2, r3, r5, r9, pc}^ │ │ stmdacs r0, {r0, r1, r8, fp} │ │ stmdacs r1, {r3, r5, r6, ip, lr, pc} │ │ adchi pc, ip, r0, asr #32 │ │ addeq pc, r0, r9, lsl #2 │ │ svchi 0x005bf3bf │ │ svcne 0x0000e850 │ │ stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ - blcs 3f354 │ │ + blcs 3f644 │ │ stmdbcs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ svchi 0x005bf3bf │ │ andhi pc, r4, #64 @ 0x40 │ │ eoreq pc, r0, r9, lsl #2 │ │ svchi 0x005bf3bf │ │ svcne 0x0000e850 │ │ andeq pc, r1, #65 @ 0x41 │ │ movwcs lr, #2112 @ 0x840 │ │ mvnsle r2, r0, lsl #22 │ │ @ instruction: 0xf3bf07c8 │ │ svclt 0x00048f5b │ │ subeq pc, r0, r9, lsl #2 │ │ - @ instruction: 0xfff2f7ef │ │ + cdp2 7, 9, cr15, cr4, cr15, {7} │ │ addeq pc, r8, r9, lsl #2 │ │ vsubl.u q1, d15, d1 │ │ ldm r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ stmia r0, {r0, r1, r2, r3, r6, r8, r9, sl, fp, ip}^ │ │ - blcs 424a8 │ │ + blcs 42798 │ │ stmdbcs r0, {r0, r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ svchi 0x005bf3bf │ │ mvnhi pc, r0 │ │ andshi pc, r4, sp, asr #17 │ │ ldrdeq pc, [r0], -r9 │ │ ldrdne pc, [r0], -r9 @ │ │ ldrdpl pc, [r4], -r9 │ │ streq pc, [r1], #-32 @ 0xffffffe0 │ │ stmdaeq r1, {r0, r5, ip, sp, lr, pc} │ │ tstle r0, r4, asr #10 │ │ @ instruction: 0x4628b115 │ │ - svc 0x00fcf0a1 │ │ + cdp 0, 8, cr15, cr12, cr1, {5} │ │ @ instruction: 0xf8dd2048 │ │ bic r8, r3, r4, lsl r0 │ │ strtmi r6, [lr], -r8, lsr #16 │ │ ldrtmi r4, [r0], -r5, lsl #12 │ │ - svc 0x00f2f0a1 │ │ + cdp 0, 8, cr15, cr2, cr1, {5} │ │ strmi r3, [r0, #1026]! @ 0x402 │ │ vmla.i , q10, d2[7] │ │ ldmdacs pc, {r2, r6} @ │ │ - bl 6abb8 │ │ - bl 1768f4 │ │ + bl 6aea8 │ │ + bl 176be4 │ │ ldmib r0, {r7}^ │ │ ldmdavs r9!, {r0, r8, r9, sl, sp, lr} │ │ svclt 0x001c2900 │ │ @ instruction: 0x47884630 │ │ stmdacs r0, {r3, r4, r5, r6, fp, sp, lr} │ │ strb sp, [r9, r7, ror #3]! │ │ adceq pc, r0, r9, lsl #2 │ │ svchi 0x005bf3bf │ │ svcne 0x0000e850 │ │ stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ - blcs 3f420 │ │ + blcs 3f710 │ │ stmdbcs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ svchi 0x005bf3bf │ │ orrshi pc, lr, r0, asr #32 │ │ ldrdeq pc, [r8], #-137 @ 0xffffff77 │ │ eoreq pc, r0, #1073741826 @ 0x40000002 │ │ svchi 0x005bf3bf │ │ svcne 0x0000e852 │ │ movweq lr, #2625 @ 0xa41 │ │ strcc lr, [r0, -r2, asr #16] │ │ mvnsle r2, r0, lsl #30 │ │ svchi 0x005bf3bf │ │ ldrdeq pc, [r8], #-137 @ 0xffffff77 │ │ svclt 0x00044208 │ │ rsbseq pc, r0, r9, lsl #2 │ │ - @ instruction: 0xff88f7ef │ │ + cdp2 7, 2, cr15, cr10, cr15, {7} │ │ adceq pc, r8, r9, lsl #2 │ │ vsubl.u q1, d15, d1 │ │ ldm r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ stmia r0, {r0, r1, r2, r3, r6, r8, r9, sl, fp, ip}^ │ │ - blcs 4257c │ │ + blcs 4286c │ │ stmdbcs r0, {r0, r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ svchi 0x005bf3bf │ │ cmnphi r6, r0 @ p-variant is OBSOLETE │ │ @ instruction: 0x0098f8d9 │ │ svclt 0x001c2800 │ │ @ instruction: 0x0094f8d9 │ │ - svc 0x009cf0a1 │ │ + cdp 0, 2, cr15, cr12, cr1, {5} │ │ subseq pc, r4, r9, lsl #2 │ │ - @ instruction: 0xffe8f061 │ │ + cdp2 0, 5, cr15, cr12, cr1, {3} │ │ smc 4616 @ 0x1208 │ │ svchi 0x005bf3bf │ │ svceq 0x0000e859 │ │ stmda r9, {r0, r6, r9, sl, fp, ip}^ │ │ - bcs 3b0a8 │ │ + bcs 3b398 │ │ stmdacs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ svchi 0x005bf3bf │ │ cmpphi sl, r0, asr #32 @ p-variant is OBSOLETE │ │ streq pc, [r8, #-265] @ 0xfffffef7 │ │ ldmda r5, {r0, sp}^ │ │ stmdbcs r0, {r8, r9, sl, fp, ip} │ │ cmnphi r1, r0, asr #32 @ p-variant is OBSOLETE │ │ @@ -21266,44 +21454,44 @@ │ │ tstphi ip, r0, asr #32 @ p-variant is OBSOLETE │ │ ldrdvs lr, [r5], -r9 │ │ @ instruction: 0xf8cd2701 │ │ @ instruction: 0xf8898014 │ │ movlt r7, #64 @ 0x40 │ │ subeq lr, r0, r0, lsl #22 │ │ stmdaeq r2, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ - beq fe07152c │ │ + beq fe07181c │ │ vaddl.u q7, d15, d5 │ │ @ instruction: 0xf3bf8f2f │ │ ldrbmi r8, [r6, #-3931] @ 0xfffff0a5 │ │ ldrtmi sp, [r0], -r7, lsr #32 │ │ - blne 374a80 │ │ + blne 374d70 │ │ svccs 0x0003e851 │ │ mvnsle r2, r0, lsl #20 │ │ vaddw.u , , d12 │ │ stmda r1, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ @ instruction: 0xb1228200 │ │ svccs 0x0000e851 │ │ rscsle r2, r8, r0, lsl #20 │ │ @ instruction: 0xf3bfe7e7 │ │ stmdavs r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc} │ │ vtbl.8 d6, {d31}, d0 │ │ @ instruction: 0xf1008f5b │ │ ldmda r1, {r3, r4, r8}^ │ │ stmda r1, {r8, r9, sl, fp}^ │ │ - bcs 53160 │ │ + bcs 53450 │ │ strdcc sp, [r1], -r9 │ │ ldrsbtcs sp, [r0], #27 │ │ movwcs r2, #4737 @ 0x1281 │ │ - svc 0x0032f0a1 │ │ + stcl 0, cr15, [r2, #644] @ 0x284 │ │ ldmib r9, {r0, r2, r4, r6, r7, r8, r9, sl, sp, lr, pc}^ │ │ tstcs r0, r8 │ │ @ instruction: 0xf8c92800 │ │ suble r1, r2, r4, lsr #32 │ │ subeq lr, r0, r0, lsl #22 │ │ - beq b2ac4 │ │ + beq b2db4 │ │ streq lr, [r0, r6, lsl #22] │ │ ldrdeq lr, [r0, -r6] │ │ svccs 0x0003e850 │ │ @ instruction: 0xf100b952 │ │ vsubl.u q0, d15, d12 │ │ stmda r2, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ bicslt r1, r3, r0, lsl #6 │ │ @@ -21314,514 +21502,520 @@ │ │ vrsubhn.i d3, , q6 │ │ ldmda r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ cdpne 15, 4, cr1, cr10, cr0, {0} │ │ movwcs lr, #2112 @ 0x840 │ │ mvnsle r2, r0, lsl #22 │ │ svclt 0x00042901 │ │ svchi 0x005bf3bf │ │ - @ instruction: 0xf85ef05d │ │ + @ instruction: 0xff1cf05c │ │ ldrhle r4, [r9, #46] @ 0x2e │ │ vshr.u32 d14, d5, #1 │ │ stmvs r1, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc} │ │ svchi 0x005bf3bf │ │ ldmda r1, {r3, r4, r8, ip, sp}^ │ │ stmda r1, {r8, r9, sl, fp, sp}^ │ │ - blcs 5f5f0 │ │ + blcs 5f8e0 │ │ andcc sp, r1, #1073741886 @ 0x4000003e │ │ @ instruction: 0x4604d1de │ │ addcs r2, r1, #240 @ 0xf0 │ │ @ instruction: 0xf0a12301 │ │ - strtmi lr, [r0], -sl, ror #29 │ │ + @ instruction: 0x4620ed7a │ │ @ instruction: 0xf8d9e7d6 │ │ @ instruction: 0xf8dd0030 │ │ movslt r8, #20 │ │ ldrdvs pc, [ip], -r9 @ │ │ subeq lr, r0, r0, lsl #22 │ │ strcs r2, [r1], #-1794 @ 0xfffff8fe │ │ - beq fe071638 │ │ + beq fe071928 │ │ vaddl.u q7, d15, d5 │ │ @ instruction: 0xf3bf8f2f │ │ ldrbmi r8, [r6, #-3931] @ 0xfffff0a5 │ │ ldrtmi sp, [r0], -r7, lsr #32 │ │ - blne 374b8c │ │ + blne 374e7c │ │ svccs 0x0003e851 │ │ mvnsle r2, r0, lsl #20 │ │ vaddw.u , , d12 │ │ stmda r1, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc}^ │ │ @ instruction: 0xb1227200 │ │ svccs 0x0000e851 │ │ rscsle r2, r8, r0, lsl #20 │ │ @ instruction: 0xf3bfe7e7 │ │ stmdavs r0, {r0, r1, r3, r4, r6, r8, r9, sl, fp, pc} │ │ vtbl.8 d6, {d31}, d0 │ │ @ instruction: 0xf1008f5b │ │ ldmda r1, {r3, r4, r8}^ │ │ stmda r1, {r8, r9, sl, fp}^ │ │ - bcs 4726c │ │ + bcs 4755c │ │ strdcc sp, [r1], -r9 │ │ ldrsbtcs sp, [r0], #27 │ │ movwcs r2, #4737 @ 0x1281 │ │ - cdp 0, 10, cr15, cr12, cr1, {5} │ │ + ldc 0, cr15, [ip, #-644]! @ 0xfffffd7c │ │ ldmib r9, {r0, r2, r4, r6, r7, r8, r9, sl, sp, lr, pc}^ │ │ tstcs r0, lr │ │ @ instruction: 0xf8c92800 │ │ suble r1, r1, ip, lsr r0 │ │ subeq lr, r0, r0, lsl #22 │ │ - bl 1c0698 │ │ + bl 1c0988 │ │ ldmib r6, {r7, r9, fp}^ │ │ ldmda r0, {r8}^ │ │ ldmdblt r2, {r0, r1, r8, r9, sl, fp, sp}^ │ │ andeq pc, ip, #0, 2 │ │ svchi 0x005bf3bf │ │ movwne lr, #2114 @ 0x842 │ │ ldmda r2, {r0, r1, r4, r6, r7, r8, ip, sp, pc}^ │ │ - blcs 466b4 │ │ + blcs 469a4 │ │ vshr.u64 , q12, #1 │ │ @ instruction: 0xf3bf8f2f │ │ @ instruction: 0x360c8f5b │ │ svchi 0x005bf3bf │ │ svcne 0x0000e850 │ │ stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ - blcs 3f6d0 │ │ + blcs 3f9c0 │ │ stmdbcs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ @ instruction: 0xf3bfbf04 │ │ @ instruction: 0xf05c8f5b │ │ - ldrbmi pc, [r6, #-4057] @ 0xfffff027 @ │ │ + ldrbmi pc, [r6, #-3735] @ 0xfffff169 @ │ │ @ instruction: 0xe015d1d9 │ │ svchi 0x005bf3bf │ │ vtbl.8 d6, {d31}, d1 │ │ tstcc r8, fp, asr pc │ │ svccs 0x0000e851 │ │ movwvc lr, #2113 @ 0x841 │ │ mvnsle r2, r0, lsl #22 │ │ bicsle r3, lr, r1, lsl #4 │ │ rscscs r4, r0, r4, lsl #12 │ │ movwcs r2, #4737 @ 0x1281 │ │ - cdp 0, 6, cr15, cr4, cr1, {5} │ │ + ldcl 0, cr15, [r4], #644 @ 0x284 │ │ ldrb r4, [r6, r0, lsr #12] │ │ ldmdblt r8, {r2, fp, ip, pc} │ │ stmdavs r0, {r1, fp, ip, pc}^ │ │ cmnle r2, r0, asr #32 │ │ svchi 0x005bf3bf │ │ @ instruction: 0xf8dd2000 │ │ ldmda r5, {r2, r3, sp, pc}^ │ │ stmda r5, {r8, r9, sl, fp, ip}^ │ │ - bcs 37330 │ │ + bcs 37620 │ │ stmdbcs r2, {r0, r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ @ instruction: 0xf109d05e │ │ andcs r0, r1, #68 @ 0x44 │ │ svchi 0x005bf3bf │ │ svcne 0x004fe8d0 │ │ svccs 0x0043e8c0 │ │ mvnsle r2, r0, lsl #22 │ │ svchi 0x005bf3bf │ │ @ instruction: 0xf109b151 │ │ @ instruction: 0xf0610010 │ │ - eorcs pc, r8, r5, lsl #29 │ │ + strdcs pc, [r8], -r9 @ │ │ @ instruction: 0xf0614448 │ │ - strbmi pc, [r8], -r1, lsl #29 @ │ │ - cdp 0, 2, cr15, cr14, cr1, {5} │ │ + @ instruction: 0x4648fcf5 │ │ + ldc 0, cr15, [lr], #644 @ 0x284 │ │ @ instruction: 0x0014f8d8 │ │ svchi 0x005bf3bf │ │ svcne 0x0000e850 │ │ stmda r0, {r1, r3, r6, r9, sl, fp, ip}^ │ │ - blcs 3f77c │ │ + blcs 3fa6c │ │ stmdbcs r1, {r3, r4, r5, r6, r7, r8, ip, lr, pc} │ │ vaddw.u , , d5 │ │ @ instruction: 0xf8d88f5b │ │ @ instruction: 0xf0610014 │ │ - @ instruction: 0xf8daf9e9 │ │ + @ instruction: 0xf8daf85d │ │ mrscs r0, (UNDEF: 1) │ │ - blne 174c98 │ │ + blne 174f88 │ │ smulleq lr, lr, fp, r8 @ │ │ andcs ip, r1, lr, asr #1 │ │ pop {r0, r1, r4, ip, sp, pc} │ │ qsub8mi r8, r8, r0 │ │ svchi 0x002ff3bf │ │ - cdp2 0, 10, cr15, cr9, cr0, {2} │ │ + stc2l 0, cr15, [r5, #-256]! @ 0xffffff00 │ │ ldmdami r9, {r1, r2, r3, r7, r9, sl, sp, lr, pc} │ │ - bmi 67f10c │ │ + bmi 67f3fc │ │ ldrbtmi r4, [sl], #-1144 @ 0xfffffb88 │ │ - @ instruction: 0xff4ef008 │ │ - stc2 0, cr15, [r6, #256]! @ 0x100 │ │ + @ instruction: 0xff5af008 │ │ + stc2l 0, cr15, [r2], #-256 @ 0xffffff00 │ │ andeq pc, r1, r0, lsl #1 │ │ andge lr, r3, sp, asr #19 │ │ muleq ip, r9, r8 │ │ @ instruction: 0xf43f2800 │ │ ldmdami r2, {r2, r3, r7, r9, sl, fp, sp, pc} │ │ ldmdbmi r3, {r1, r4, r8, r9, fp, lr} │ │ - bls 147dc0 │ │ + bls 1480b0 │ │ ldrbtmi r4, [r9], #-1147 @ 0xfffffb85 │ │ subcs pc, r8, sp, lsl #17 │ │ tstls r0, r1, lsl sl │ │ ldrls r2, [r1, #-299] @ 0xfffffed5 │ │ - stc2l 0, cr15, [r0], #-40 @ 0xffffffd8 │ │ + stc2l 0, cr15, [ip], #-40 @ 0xffffffd8 │ │ @ instruction: 0x462920f0 │ │ movwcs r2, #4737 @ 0x1281 │ │ - stcl 0, cr15, [sl, #644]! @ 0x284 │ │ + ldcl 0, cr15, [sl], #-644 @ 0xfffffd7c │ │ @ instruction: 0xf040e799 │ │ - stmdacs r0, {r0, r2, r7, r8, sl, fp, ip, sp, lr, pc} │ │ + stmdacs r0, {r0, r6, sl, fp, ip, sp, lr, pc} │ │ andcs fp, r1, r4, lsl #30 │ │ andeq pc, ip, r9, lsl #17 │ │ svclt 0x0000e784 │ │ - andeq r7, sl, r6, asr #29 │ │ - @ instruction: 0xfffe045b │ │ - andeq r4, sl, lr, lsr #13 │ │ - @ instruction: 0xfffe28ab │ │ - andeq r3, sl, ip, lsl #10 │ │ - strdeq r5, [sl], -sl │ │ + strdeq r7, [sl], -r6 │ │ + @ instruction: 0xfffe016b │ │ + andeq r4, sl, lr, asr #7 │ │ + @ instruction: 0xfffe25bb │ │ + andeq r3, sl, ip, asr #4 │ │ + andeq r5, sl, sl, lsl r1 │ │ + ldrdeq lr, [r0, -r0] │ │ + stmdavs r2, {r8, r9, sp} │ │ + ldmdavs r0, {r0, r1, sp, lr} │ │ + stmdavs r9, {r0, r1, r4, sp, lr} │ │ + andcs r6, r1, r8 │ │ + ldrble r4, [r4], #1904 @ 0x770 │ │ │ │ -00036c28 : │ │ +00036f30 : │ │ push {r4, r5, r7, lr} │ │ sub sp, #32 │ │ mov r5, r0 │ │ movs r0, #4 │ │ mov r4, r1 │ │ - blx d87f0 │ │ - cbz r0, 36c6c │ │ - ldr r3, [pc, #56] @ (36c74 ) │ │ + blx d8810 │ │ + cbz r0, 36f74 │ │ + ldr r3, [pc, #56] @ (36f7c ) │ │ mov r2, r0 │ │ str r5, [r0, #0] │ │ add r0, sp, #16 │ │ add r3, pc │ │ mov r1, r4 │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #16] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 36c60 │ │ + beq.n 36f68 │ │ add r3, sp, #16 │ │ add.w ip, sp, #4 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #0] │ │ mov r0, sp │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #32 │ │ pop {r4, r5, r7, pc} │ │ movs r0, #4 │ │ movs r1, #4 │ │ - bl 3de2a │ │ - adds r5, #120 @ 0x78 │ │ + bl 3e132 │ │ + adds r2, #128 @ 0x80 │ │ movs r2, r1 │ │ │ │ -00036c78 : │ │ +00036f80 : │ │ push {r7, lr} │ │ sub sp, #8 │ │ - ldr r1, [pc, #28] @ (36c9c ) │ │ + ldr r1, [pc, #28] @ (36fa4 ) │ │ str r0, [sp, #4] │ │ add r1, pc │ │ ldr r0, [r1, #12] │ │ dmb ish │ │ cmp r0, #2 │ │ - bne.n 36c90 │ │ + bne.n 36f98 │ │ add sp, #8 │ │ pop {r7, pc} │ │ add r0, sp, #4 │ │ - bl 365e4 │ │ + bl 36920 │ │ add sp, #8 │ │ pop {r7, pc} │ │ nop │ │ - ldrb r4, [r2, #12] │ │ + ldrb r4, [r5, #0] │ │ movs r2, r1 │ │ │ │ -00036ca0 : │ │ +00036fa8 : │ │ push {r4, r5, r6, lr} │ │ sub sp, #32 │ │ mov r6, r0 │ │ movs r0, #8 │ │ mov r5, r2 │ │ mov r4, r1 │ │ - blx d87f0 │ │ - cbz r0, 36ce8 │ │ - ldr r3, [pc, #60] @ (36cf0 ) │ │ + blx d8810 │ │ + cbz r0, 36ff0 │ │ + ldr r3, [pc, #60] @ (36ff8 ) │ │ mov r2, r0 │ │ add r0, sp, #16 │ │ mov r1, r4 │ │ add r3, pc │ │ strd r5, r6, [r2] │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #16] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 36cdc │ │ + beq.n 36fe4 │ │ add r3, sp, #16 │ │ add.w ip, sp, #4 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #0] │ │ mov r0, sp │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #32 │ │ pop {r4, r5, r6, pc} │ │ movs r0, #4 │ │ movs r1, #8 │ │ - bl 3de2a │ │ - adds r5, #14 │ │ + bl 3e132 │ │ + adds r2, #22 │ │ movs r2, r1 │ │ │ │ -00036cf4 : │ │ +00036ffc : │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #36 @ 0x24 │ │ mov r6, r0 │ │ movs r0, #16 │ │ mov r5, r3 │ │ mov r7, r2 │ │ mov r4, r1 │ │ - blx d87f0 │ │ - cbz r0, 36d44 │ │ - ldr r3, [pc, #64] @ (36d4c ) │ │ + blx d8810 │ │ + cbz r0, 3704c │ │ + ldr r3, [pc, #64] @ (37054 ) │ │ mov r2, r0 │ │ ldr r0, [sp, #56] @ 0x38 │ │ mov r1, r4 │ │ strd r0, r6, [r2, #8] │ │ add r3, pc │ │ add r0, sp, #16 │ │ strd r7, r5, [r2] │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #16] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 36d38 │ │ + beq.n 37040 │ │ add r3, sp, #16 │ │ add.w ip, sp, #4 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #0] │ │ mov r0, sp │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #36 @ 0x24 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #8 │ │ movs r1, #16 │ │ - bl 3de2a │ │ - adds r4, #196 @ 0xc4 │ │ + bl 3e132 │ │ + adds r1, #204 @ 0xcc │ │ movs r2, r1 │ │ │ │ -00036d50 : │ │ +00037058 : │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #36 @ 0x24 │ │ mov r6, r0 │ │ movs r0, #16 │ │ mov r5, r3 │ │ mov r7, r2 │ │ mov r4, r1 │ │ - blx d87f0 │ │ - cbz r0, 36da0 │ │ + blx d8810 │ │ + cbz r0, 370a8 │ │ mov r2, r0 │ │ ldr r0, [sp, #56] @ 0x38 │ │ - ldr r3, [pc, #60] @ (36da8 ) │ │ + ldr r3, [pc, #60] @ (370b0 ) │ │ mov r1, r4 │ │ strd r7, r5, [r2] │ │ strd r6, r0, [r2, #8] │ │ add r3, pc │ │ add r0, sp, #16 │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #16] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 36d94 │ │ + beq.n 3709c │ │ add r3, sp, #16 │ │ add.w ip, sp, #4 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #0] │ │ mov r0, sp │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #36 @ 0x24 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #4 │ │ movs r1, #16 │ │ - bl 3de2a │ │ - adds r4, #180 @ 0xb4 │ │ + bl 3e132 │ │ + adds r1, #188 @ 0xbc │ │ movs r2, r1 │ │ │ │ -00036dac : │ │ +000370b4 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #44 @ 0x2c │ │ ldr.w fp, [sp, #84] @ 0x54 │ │ mov r9, r0 │ │ movw r0, #43691 @ 0xaaab │ │ movt r0, #2730 @ 0xaaa │ │ cmp fp, r0 │ │ - bcc.n 36dc8 │ │ - bl 3e03c │ │ + bcc.n 370d0 │ │ + bl 3e344 │ │ add.w r0, fp, fp, lsl #1 │ │ mov sl, r3 │ │ mov r7, r2 │ │ str r1, [sp, #4] │ │ lsls r4, r0, #2 │ │ - beq.n 36dee │ │ + beq.n 370f6 │ │ mov r0, r4 │ │ - blx d87f0 │ │ + blx d8810 │ │ mov r8, r0 │ │ cmp r0, #0 │ │ mov r0, fp │ │ - beq.n 36e78 │ │ + beq.n 37180 │ │ cmp.w fp, #0 │ │ str r0, [sp, #0] │ │ - bne.n 36dfc │ │ - b.n 36e20 │ │ + bne.n 37104 │ │ + b.n 37128 │ │ mov.w r8, #4 │ │ movs r0, #0 │ │ cmp.w fp, #0 │ │ str r0, [sp, #0] │ │ - beq.n 36e20 │ │ + beq.n 37128 │ │ ldr r4, [sp, #80] @ 0x50 │ │ mov r6, r8 │ │ mov r5, fp │ │ ldr.w r0, [r4], #4 │ │ add.w ip, sp, #24 │ │ ldmia.w r0, {r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ - blx d87c0 │ │ + blx d87d0 │ │ add r2, sp, #24 │ │ subs r5, #1 │ │ ldmia r2, {r0, r1, r2} │ │ stmia r6!, {r0, r1, r2} │ │ - bne.n 36e02 │ │ + bne.n 3710a │ │ movs r0, #32 │ │ - blx d87f0 │ │ - cbz r0, 36e70 │ │ - ldr r3, [pc, #84] @ (36e80 ) │ │ + blx d8810 │ │ + cbz r0, 37178 │ │ + ldr r3, [pc, #84] @ (37188 ) │ │ mov r2, r0 │ │ ldr r0, [sp, #88] @ 0x58 │ │ add.w ip, r2, #8 │ │ ldr r1, [sp, #0] │ │ add r3, pc │ │ strd r7, sl, [r2] │ │ stmia.w ip, {r1, r8, fp} │ │ ldr r1, [sp, #4] │ │ strd r9, r0, [r2, #20] │ │ add r0, sp, #24 │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #24] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 36e62 │ │ + beq.n 3716a │ │ add r3, sp, #24 │ │ add.w ip, sp, #12 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #8] │ │ add r0, sp, #8 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #8 │ │ movs r1, #32 │ │ - bl 3de2a │ │ + bl 3e132 │ │ movs r0, #4 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ - adds r4, #100 @ 0x64 │ │ + bl 3e2ac │ │ + adds r1, #108 @ 0x6c │ │ movs r2, r1 │ │ │ │ -00036e84 : │ │ +0003718c : │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #48 @ 0x30 │ │ mov r5, r0 │ │ ldr r0, [sp, #72] @ 0x48 │ │ mov r6, r3 │ │ mov r7, r2 │ │ mov r8, r1 │ │ ldmia.w r0, {r1, r2, r3} │ │ stmia.w sp, {r1, r2, r3} │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r0, #32 │ │ - blx d87f0 │ │ - cbz r0, 36ef4 │ │ + blx d8810 │ │ + cbz r0, 371fc │ │ mov r2, r0 │ │ ldrd r1, r0, [sp] │ │ ldr r4, [sp, #8] │ │ - ldr r3, [pc, #72] @ (36efc ) │ │ + ldr r3, [pc, #72] @ (37204 ) │ │ ldr.w ip, [sp, #76] @ 0x4c │ │ strd r1, r0, [r2, #8] │ │ add r3, pc │ │ add r0, sp, #32 │ │ mov r1, r8 │ │ strd r7, r6, [r2] │ │ strd r4, ip, [r2, #16] │ │ str r5, [r2, #24] │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #32] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 36ee6 │ │ + beq.n 371ee │ │ add r3, sp, #32 │ │ add.w ip, sp, #20 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #16] │ │ add r0, sp, #16 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #48 @ 0x30 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movs r0, #8 │ │ movs r1, #32 │ │ - bl 3de2a │ │ - adds r3, #174 @ 0xae │ │ + bl 3e132 │ │ + adds r0, #182 @ 0xb6 │ │ movs r2, r1 │ │ │ │ -00036f00 : │ │ +00037208 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #92 @ 0x5c │ │ ldr.w r9, [sp, #128] @ 0x80 │ │ mov fp, r0 │ │ movw r0, #7282 @ 0x1c72 │ │ movt r0, #455 @ 0x1c7 │ │ cmp r9, r0 │ │ - bcc.n 36f1c │ │ - bl 3e03c │ │ + bcc.n 37224 │ │ + bl 3e344 │ │ add.w r0, r9, r9, lsl #3 │ │ mov r4, r3 │ │ mov sl, r2 │ │ str r1, [sp, #8] │ │ lsls r0, r0, #3 │ │ str r0, [sp, #12] │ │ - beq.n 36f42 │ │ - blx d87f0 │ │ + beq.n 3724a │ │ + blx d8810 │ │ mov r6, r0 │ │ cmp r0, #0 │ │ mov r0, r9 │ │ - beq.n 36fbe │ │ + beq.n 372c6 │ │ cmp.w r9, #0 │ │ str r0, [sp, #4] │ │ - bne.n 36f4e │ │ - b.n 36f78 │ │ + bne.n 37256 │ │ + b.n 37280 │ │ movs r6, #8 │ │ movs r0, #0 │ │ cmp.w r9, #0 │ │ str r0, [sp, #4] │ │ - beq.n 36f78 │ │ + beq.n 37280 │ │ add r5, sp, #16 │ │ mov r7, r6 │ │ ldr.w r8, [r4], #4 │ │ mov r0, r5 │ │ movs r2, #72 @ 0x48 │ │ mov r1, r8 │ │ - bl d4c50 │ │ + bl d50a2 │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r7 │ │ mov r1, r5 │ │ movs r2, #72 @ 0x48 │ │ - bl d4c50 │ │ + bl d50a2 │ │ adds r7, #72 @ 0x48 │ │ subs.w r9, r9, #1 │ │ - bne.n 36f52 │ │ + bne.n 3725a │ │ movs r0, #72 @ 0x48 │ │ - blx d87f0 │ │ - cbz r0, 36fb6 │ │ + blx d8810 │ │ + cbz r0, 372be │ │ ldr r1, [sp, #12] │ │ movw r3, #36409 @ 0x8e39 │ │ movs r2, #24 │ │ movt r3, #14563 @ 0x38e3 │ │ str.w r0, [fp] │ │ cmp.w sl, #0 │ │ mov.w r1, r1, lsr #3 │ │ @@ -21836,58 +22030,58 @@ │ │ ldr r2, [sp, #4] │ │ strd r2, r6, [r0, #4] │ │ str r1, [r0, #12] │ │ add sp, #92 @ 0x5c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #8 │ │ movs r1, #72 @ 0x48 │ │ - bl 3de2a │ │ + bl 3e132 │ │ ldr r1, [sp, #12] │ │ movs r0, #8 │ │ - bl 3dfa4 │ │ - bmi.n 36f72 │ │ + bl 3e2ac │ │ + bmi.n 3727a │ │ │ │ -00036fc8 : │ │ +000372d0 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ vpush {d8} │ │ sub sp, #56 @ 0x38 │ │ mov r8, r1 │ │ mov r1, r0 │ │ ldrd r0, r7, [sp, #112] @ 0x70 │ │ mov r5, r3 │ │ mov r6, r2 │ │ ldrd r2, r3, [sp, #104] @ 0x68 │ │ strd r0, r7, [sp] │ │ add r0, sp, #40 @ 0x28 │ │ - bl 327b8 │ │ + bl 32888 │ │ movw r9, #10 │ │ ldrd r1, r0, [sp, #40] @ 0x28 │ │ movt r9, #32768 @ 0x8000 │ │ add.w r4, r9, #7 │ │ cmp r1, r4 │ │ - bne.n 3708c │ │ + bne.n 37394 │ │ ldrb.w r7, [r0, #32] │ │ vmov d16, r6, r5 │ │ vldr d8, [sp, #96] @ 0x60 │ │ orr.w r1, r7, #8 │ │ cmp r1, #11 │ │ - bne.n 3709a │ │ - vldr d17, [pc, #328] @ 37160 │ │ + bne.n 373a2 │ │ + vldr d17, [pc, #328] @ 37468 │ │ vmov r1, r2, d8 │ │ vmov.f64 d18, d8 │ │ vcmp.f64 d8, d17 │ │ vmrs APSR_nzcv, fpscr │ │ it mi │ │ vmovmi.f64 d18, d17 │ │ vcmp.f64 d16, d17 │ │ vmov.f64 d19, d16 │ │ vmrs APSR_nzcv, fpscr │ │ it mi │ │ vmovmi.f64 d19, d17 │ │ - vldr d17, [pc, #292] @ 37168 │ │ + vldr d17, [pc, #292] @ 37470 │ │ bic.w r1, r2, #2147483648 @ 0x80000000 │ │ movs r2, #0 │ │ vcmp.f64 d18, d17 │ │ movt r2, #32752 @ 0x7ff0 │ │ vmrs APSR_nzcv, fpscr │ │ it gt │ │ vmovgt.f64 d18, d17 │ │ @@ -21900,203 +22094,203 @@ │ │ it lt │ │ vmovlt.f64 d8, d18 │ │ cmp r1, r2 │ │ it lt │ │ vmovlt.f64 d16, d19 │ │ ldr r0, [r0, #28] │ │ cmp r7, #3 │ │ - beq.n 370aa │ │ + beq.n 373b2 │ │ cmp r7, #11 │ │ - bne.n 370ec │ │ + bne.n 373f4 │ │ movs r7, #14 │ │ - b.n 370ac │ │ + b.n 373b4 │ │ ldrd r2, r3, [sp, #48] @ 0x30 │ │ strd r2, r3, [sp, #32] │ │ strd r1, r0, [sp, #24] │ │ - b.n 3713a │ │ + b.n 37442 │ │ ldr.w sl, [r0, #28] │ │ cmp r7, #5 │ │ - beq.n 370c2 │ │ + beq.n 373ca │ │ cmp r7, #13 │ │ - bne.n 3710c │ │ + bne.n 37414 │ │ movs r7, #15 │ │ - b.n 370c2 │ │ + b.n 373ca │ │ movs r7, #4 │ │ vcvt.f32.f64 s2, d16 │ │ movs r6, #38 @ 0x26 │ │ vcvt.f32.f64 s0, d8 │ │ vmov r1, s2 │ │ vmov r9, s0 │ │ vmov d8, r1, r0 │ │ movs r0, #72 @ 0x48 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 3714a │ │ + beq.n 37452 │ │ strd r5, sl, [r0, #20] │ │ str r6, [r0, #16] │ │ str.w r9, [r0, #4] │ │ strb r7, [r0, #0] │ │ vstr d8, [sp, #16] │ │ ldrd r1, r2, [sp, #16] │ │ str.w r0, [r8] │ │ str r2, [r0, #12] │ │ str r1, [r0, #8] │ │ str r4, [sp, #24] │ │ - b.n 3713a │ │ + b.n 37442 │ │ movs r0, #38 @ 0x26 │ │ movs r5, #38 @ 0x26 │ │ - blx d87f0 │ │ - cbz r0, 37152 │ │ - ldr r1, [pc, #120] @ (37170 ) │ │ + blx d8810 │ │ + cbz r0, 3745a │ │ + ldr r1, [pc, #120] @ (37478 ) │ │ movs r2, #38 @ 0x26 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ strd r4, r5, [sp, #32] │ │ strd r9, r5, [sp, #24] │ │ - b.n 3713a │ │ + b.n 37442 │ │ movs r0, #38 @ 0x26 │ │ movs r5, #38 @ 0x26 │ │ - blx d87f0 │ │ - cbz r0, 37152 │ │ - ldr r1, [pc, #92] @ (37174 ) │ │ + blx d8810 │ │ + cbz r0, 3745a │ │ + ldr r1, [pc, #92] @ (3747c ) │ │ movs r2, #38 @ 0x26 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ strd r5, r4, [sp, #40] @ 0x28 │ │ vldr d16, [sp, #40] @ 0x28 │ │ vstr d16, [sp, #8] │ │ str r5, [sp, #36] @ 0x24 │ │ ldrd r0, r1, [sp, #8] │ │ str r1, [sp, #32] │ │ strd r9, r0, [sp, #24] │ │ add r0, sp, #24 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #56 @ 0x38 │ │ vpop {d8} │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ movs r0, #8 │ │ movs r1, #72 @ 0x48 │ │ - bl 3de2a │ │ + bl 3e132 │ │ movs r0, #1 │ │ movs r1, #38 @ 0x26 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ nop │ │ nop │ │ movs r0, r0 │ │ - b.n 37166 │ │ + b.n 3746e │ │ @ instruction: 0xffffc7ef │ │ movs r0, r0 │ │ - b.n 3716e │ │ + b.n 37476 │ │ @ instruction: 0xffff47ef │ │ - @ instruction: 0xfa70fffd │ │ - @ instruction: 0xfa50fffd │ │ + bl fffa0476 │ │ + bl fff8047a │ │ │ │ -00037178 : │ │ +00037480 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ sub sp, #4 │ │ mov r8, r0 │ │ ldr r0, [sp, #48] @ 0x30 │ │ ldr r1, [sp, #32] │ │ mov r6, r3 │ │ mov r9, r2 │ │ - cbz r1, 371a4 │ │ + cbz r1, 374ac │ │ movs r7, #0 │ │ ldrd r5, r1, [sp, #40] @ 0x28 │ │ - cbnz r0, 371c4 │ │ + cbnz r0, 374cc │ │ subs r5, #1 │ │ sbc.w r4, r1, #0 │ │ eor.w r0, r1, r4 │ │ ands r0, r1 │ │ it mi │ │ movmi r7, #27 │ │ - b.n 371c6 │ │ + b.n 374ce │ │ adds.w r9, r9, #1 │ │ mov.w r3, #27 │ │ adc.w r1, r6, #0 │ │ eor.w r2, r6, r1 │ │ bics r2, r6 │ │ mov r6, r1 │ │ and.w r7, r3, r2, asr #31 │ │ ldrd r5, r1, [sp, #40] @ 0x28 │ │ cmp r0, #0 │ │ - beq.n 37192 │ │ + beq.n 3749a │ │ mov r4, r1 │ │ movs r0, #72 @ 0x48 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ itttt ne │ │ movne r1, #0 │ │ strbne r1, [r0, #1] │ │ strbne r7, [r0, #0] │ │ strne.w r0, [r8] │ │ itttt ne │ │ strdne r9, r6, [r0, #8] │ │ strdne r5, r4, [r0, #16] │ │ addne sp, #4 │ │ ldmiane.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ movs r0, #8 │ │ movs r1, #72 @ 0x48 │ │ - bl 3de2a │ │ - bmi.n 3719e │ │ + bl 3e132 │ │ + bmi.n 374a6 │ │ │ │ -000371f4 : │ │ +000374fc : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #124 @ 0x7c │ │ mov r5, r0 │ │ add r0, sp, #48 @ 0x30 │ │ mov r4, r1 │ │ mov r6, r2 │ │ mov r1, r2 │ │ movs r2, #72 @ 0x48 │ │ - bl d4c50 │ │ + bl d50a2 │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrd r2, r3, [r5, #104] @ 0x68 │ │ rsb r3, r3, r3, lsl #3 │ │ ldrd r1, r0, [sp, #160] @ 0xa0 │ │ adds r2, #32 │ │ lsls r3, r3, #3 │ │ - cbz r3, 37232 │ │ + cbz r3, 3753a │ │ ldrd r7, r6, [r2], #56 @ 0x38 │ │ subs r3, #56 @ 0x38 │ │ eors r6, r0 │ │ eors r7, r1 │ │ orrs r7, r6 │ │ - bne.n 37220 │ │ - b.n 37250 │ │ + bne.n 37528 │ │ + b.n 37558 │ │ ldrd r2, r3, [r5, #116] @ 0x74 │ │ rsb r3, r3, r3, lsl #3 │ │ adds r2, #32 │ │ lsls r3, r3, #3 │ │ cmp r3, #0 │ │ - beq.n 37306 │ │ + beq.n 3760e │ │ ldrd r7, r6, [r2], #56 @ 0x38 │ │ subs r3, #56 @ 0x38 │ │ eors r6, r0 │ │ eors r7, r1 │ │ orrs r7, r6 │ │ - bne.n 3723e │ │ + bne.n 37546 │ │ sub.w r8, r2, #88 @ 0x58 │ │ str r4, [sp, #28] │ │ ldrd r7, r5, [r8, #44] @ 0x2c │ │ - cbz r5, 3726a │ │ + cbz r5, 37572 │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 37344 │ │ + beq.n 3764c │ │ mov r6, r0 │ │ - b.n 3726c │ │ + b.n 37574 │ │ movs r6, #1 │ │ mov r0, r6 │ │ mov r1, r7 │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldrd r1, r0, [r8, #32] │ │ strd r1, r0, [sp, #20] │ │ ldr.w r0, [r8] │ │ str r0, [sp, #16] │ │ ldrb.w r0, [r8, #4] │ │ str r0, [sp, #12] │ │ ldr.w r0, [r8, #8] │ │ @@ -22104,24 +22298,24 @@ │ │ ldrb.w r0, [r8, #12] │ │ str r0, [sp, #4] │ │ movs r0, #72 @ 0x48 │ │ ldr.w fp, [r8, #16] │ │ ldrb.w sl, [r8, #20] │ │ ldr.w r9, [r8, #24] │ │ ldrb.w r4, [r8, #28] │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 3733c │ │ + beq.n 37644 │ │ add r1, sp, #48 @ 0x30 │ │ movs r2, #72 @ 0x48 │ │ mov r7, r0 │ │ - bl d4c50 │ │ + bl d50a2 │ │ movs r0, #72 @ 0x48 │ │ - blx d87f0 │ │ - cbz r0, 3733c │ │ + blx d8810 │ │ + cbz r0, 37644 │ │ ldr r1, [sp, #4] │ │ movs r2, #30 │ │ strb r1, [r0, #20] │ │ add.w r3, r0, #44 @ 0x2c │ │ ldr r1, [sp, #8] │ │ str r1, [r0, #16] │ │ ldr r1, [sp, #12] │ │ @@ -22141,109 +22335,109 @@ │ │ str.w r9, [r0, #32] │ │ strb.w sl, [r0, #28] │ │ str.w fp, [r0, #24] │ │ str r1, [r0, #4] │ │ str r5, [r0, #56] @ 0x38 │ │ adds r0, r1, #7 │ │ stmia r3!, {r2, r5, r6} │ │ - b.n 3732e │ │ + b.n 37636 │ │ movs r0, #23 │ │ movs r5, #23 │ │ - blx d87f0 │ │ - cbz r0, 3734c │ │ - ldr r1, [pc, #64] @ (37354 ) │ │ + blx d8810 │ │ + cbz r0, 37654 │ │ + ldr r1, [pc, #64] @ (3765c ) │ │ movs r2, #23 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ add r0, sp, #48 @ 0x30 │ │ - bl 42fcc │ │ + bl 432d4 │ │ movs r0, #10 │ │ str r5, [sp, #44] @ 0x2c │ │ strd r5, r4, [sp, #36] @ 0x24 │ │ movt r0, #32768 @ 0x8000 │ │ str r0, [sp, #32] │ │ add r0, sp, #32 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #124 @ 0x7c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #8 │ │ movs r1, #72 @ 0x48 │ │ - bl 3de2a │ │ + bl 3e132 │ │ movs r0, #1 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #23 │ │ - bl 3dfa4 │ │ - bl fff1e352 │ │ + bl 3e2ac │ │ + bl 41665a │ │ │ │ -00037358 : │ │ +00037660 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #44 @ 0x2c │ │ mov r9, r3 │ │ ldrd r3, r7, [r0, #104] @ 0x68 │ │ rsb r7, r7, r7, lsl #3 │ │ mov sl, r2 │ │ mov r8, r1 │ │ ldrd r2, r1, [sp, #80] @ 0x50 │ │ adds r3, #32 │ │ lsls r7, r7, #3 │ │ - cbz r7, 3738a │ │ + cbz r7, 37692 │ │ ldrd r6, r5, [r3], #56 @ 0x38 │ │ subs r7, #56 @ 0x38 │ │ eors r5, r1 │ │ eors r6, r2 │ │ orrs r6, r5 │ │ - bne.n 37374 │ │ + bne.n 3767c │ │ sub.w r6, r3, #88 @ 0x58 │ │ - b.n 373ac │ │ + b.n 376b4 │ │ ldrd r0, r3, [r0, #116] @ 0x74 │ │ rsb r3, r3, r3, lsl #3 │ │ adds r0, #32 │ │ lsls r3, r3, #3 │ │ cmp r3, #0 │ │ - beq.n 37446 │ │ + beq.n 3774e │ │ ldrd r7, r6, [r0], #56 @ 0x38 │ │ subs r3, #56 @ 0x38 │ │ eors r6, r1 │ │ eors r7, r2 │ │ orrs r7, r6 │ │ - bne.n 37396 │ │ + bne.n 3769e │ │ sub.w r6, r0, #88 @ 0x58 │ │ ldrd r5, r7, [r6, #44] @ 0x2c │ │ str.w r8, [sp, #24] │ │ strd sl, r9, [sp, #16] │ │ - cbz r7, 373c8 │ │ + cbz r7, 376d0 │ │ mov r0, r7 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 3747e │ │ + beq.n 37786 │ │ mov r4, r0 │ │ - b.n 373ca │ │ + b.n 376d2 │ │ movs r4, #1 │ │ mov r0, r4 │ │ mov r1, r5 │ │ mov r2, r7 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldrd r1, r0, [r6, #32] │ │ strd r1, r0, [sp, #8] │ │ ldr r0, [r6, #0] │ │ str r0, [sp, #4] │ │ ldr r0, [r6, #8] │ │ str r0, [sp, #0] │ │ movs r0, #72 @ 0x48 │ │ ldrb.w sl, [r6, #12] │ │ ldr.w fp, [r6, #16] │ │ ldrb r5, [r6, #20] │ │ ldr.w r8, [r6, #24] │ │ ldrb.w r9, [r6, #28] │ │ ldrb r6, [r6, #4] │ │ - blx d87f0 │ │ - cbz r0, 37476 │ │ + blx d8810 │ │ + cbz r0, 3777e │ │ ldrd r2, r1, [sp, #16] │ │ strd r2, r1, [r0, #64] @ 0x40 │ │ movs r2, #31 │ │ strb r2, [r0, #0] │ │ ldr r2, [sp, #24] │ │ ldr r1, [sp, #0] │ │ str r1, [r0, #16] │ │ @@ -22261,144 +22455,144 @@ │ │ str.w fp, [r0, #24] │ │ strb.w sl, [r0, #20] │ │ str r6, [r0, #12] │ │ str r1, [r0, #4] │ │ strd r2, r7, [r0, #44] @ 0x2c │ │ strd r4, r7, [r0, #52] @ 0x34 │ │ adds r0, r1, #7 │ │ - b.n 37468 │ │ + b.n 37770 │ │ movs r0, #23 │ │ movs r5, #23 │ │ - blx d87f0 │ │ - cbz r0, 37486 │ │ - ldr r1, [pc, #60] @ (37490 ) │ │ + blx d8810 │ │ + cbz r0, 3778e │ │ + ldr r1, [pc, #60] @ (37798 ) │ │ movs r2, #23 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #10 │ │ str r5, [sp, #40] @ 0x28 │ │ strd r5, r4, [sp, #32] │ │ movt r0, #32768 @ 0x8000 │ │ str r0, [sp, #28] │ │ add r0, sp, #28 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #8 │ │ movs r1, #72 @ 0x48 │ │ - bl 3de2a │ │ + bl 3e132 │ │ movs r0, #1 │ │ mov r1, r7 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #23 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - bl ffdde48e │ │ + bl 2d6796 │ │ │ │ -00037494 : │ │ +0003779c : │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #40 @ 0x28 │ │ mov r4, r1 │ │ mov r1, r0 │ │ ldrd r0, r7, [sp, #72] @ 0x48 │ │ mov r6, r3 │ │ mov r5, r2 │ │ ldrd r2, r3, [sp, #64] @ 0x40 │ │ strd r0, r7, [sp] │ │ add r0, sp, #24 │ │ - bl 327b8 │ │ + bl 32888 │ │ ldrd r1, r0, [sp, #24] │ │ movs r7, #17 │ │ movt r7, #32768 @ 0x8000 │ │ cmp r1, r7 │ │ - bne.n 374f6 │ │ + bne.n 377fe │ │ ldrb.w r1, [r0, #32] │ │ cmp r1, #7 │ │ - bhi.n 3750e │ │ + bhi.n 37816 │ │ movs r0, #38 @ 0x26 │ │ movs r5, #38 @ 0x26 │ │ - blx d87f0 │ │ - cbz r0, 37542 │ │ - ldr r1, [pc, #116] @ (3754c ) │ │ + blx d8810 │ │ + cbz r0, 3784a │ │ + ldr r1, [pc, #116] @ (37854 ) │ │ movs r2, #38 @ 0x26 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ subs r0, r7, #7 │ │ str r5, [sp, #20] │ │ strd r5, r4, [sp, #12] │ │ str r0, [sp, #8] │ │ add r0, sp, #8 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #40 @ 0x28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ ldrd r2, r3, [sp, #32] │ │ strd r2, r3, [sp, #16] │ │ strd r1, r0, [sp, #8] │ │ add r0, sp, #8 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #40 @ 0x28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ ldr.w r8, [r0, #28] │ │ movs r0, #72 @ 0x48 │ │ - blx d87f0 │ │ - cbz r0, 3753a │ │ + blx d8810 │ │ + cbz r0, 37842 │ │ movs r1, #38 @ 0x26 │ │ str r6, [r0, #12] │ │ str r1, [r0, #16] │ │ movs r1, #21 │ │ str r5, [r0, #8] │ │ str.w r8, [r0, #4] │ │ strb r1, [r0, #0] │ │ str r0, [r4, #0] │ │ str r7, [sp, #8] │ │ add r0, sp, #8 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #40 @ 0x28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movs r0, #8 │ │ movs r1, #72 @ 0x48 │ │ - bl 3de2a │ │ + bl 3e132 │ │ movs r0, #1 │ │ movs r1, #38 @ 0x26 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - bl ffeca54a │ │ + bl 3c2852 │ │ │ │ -00037550 : │ │ +00037858 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #44 @ 0x2c │ │ mov r8, r1 │ │ mov r1, r0 │ │ ldrd r0, r7, [sp, #112] @ 0x70 │ │ mov r6, r3 │ │ mov r5, r2 │ │ ldrd r2, r3, [sp, #104] @ 0x68 │ │ strd r0, r7, [sp] │ │ add r0, sp, #28 │ │ - bl 327b8 │ │ + bl 32888 │ │ movw r9, #10 │ │ ldrd r1, r0, [sp, #28] │ │ movt r9, #32768 @ 0x8000 │ │ add.w sl, r9, #7 │ │ cmp r1, sl │ │ - bne.n 3762c │ │ + bne.n 37934 │ │ add.w ip, sp, #88 @ 0x58 │ │ ldrb.w fp, [r0, #32] │ │ ldr.w lr, [sp, #80] @ 0x50 │ │ ldmia.w ip, {r1, r7, ip} │ │ cmp.w fp, #10 │ │ - bhi.w 376da │ │ + bhi.w 379e2 │ │ movs r4, #1 │ │ movw r3, #771 @ 0x303 │ │ lsl.w r4, r4, fp │ │ tst r4, r3 │ │ - beq.n 37644 │ │ + beq.n 3794c │ │ cmp r6, #0 │ │ it mi │ │ movmi r5, #0 │ │ bic.w r3, r6, r6, asr #31 │ │ subs.w r6, r5, #255 @ 0xff │ │ sbcs.w r3, r3, #0 │ │ mov.w r4, #255 @ 0xff │ │ @@ -22414,48 +22608,48 @@ │ │ movmi r1, #0 │ │ bic.w r3, r7, r7, asr #31 │ │ subs.w r7, r1, #255 @ 0xff │ │ sbcs.w r3, r3, #0 │ │ it ge │ │ movge r1, r4 │ │ cmp.w ip, #0 │ │ - bne.n 375f2 │ │ + bne.n 378fa │ │ lsls r3, r1, #24 │ │ - beq.w 37762 │ │ + beq.w 37a6a │ │ subs r1, #1 │ │ orrs.w r3, lr, r6 │ │ - beq.w 37762 │ │ + beq.w 37a6a │ │ cmp.w fp, #9 │ │ - bhi.n 376ea │ │ + bhi.n 379f2 │ │ movw r3, #771 @ 0x303 │ │ lsr.w r3, r3, fp │ │ lsls r3, r3, #31 │ │ - beq.n 376ea │ │ + beq.n 379f2 │ │ str.w r8, [sp, #8] │ │ eor.w r2, lr, #1 │ │ - ldr r3, [pc, #488] @ (37800 ) │ │ + ldr r3, [pc, #488] @ (37b08 ) │ │ add r2, r5 │ │ ldr r4, [r0, #28] │ │ uxtb r1, r1 │ │ add r3, pc │ │ uxtb r0, r2 │ │ orr.w r8, r1, r0, lsl #8 │ │ movs r5, #38 @ 0x26 │ │ ldrb.w fp, [r3, fp] │ │ - b.n 3776a │ │ + b.n 37a72 │ │ ldrd r2, r3, [sp, #36] @ 0x24 │ │ strd r2, r3, [sp, #20] │ │ strd r1, r0, [sp, #12] │ │ add r0, sp, #12 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movw r3, #1028 @ 0x404 │ │ tst r4, r3 │ │ - beq.n 376da │ │ + beq.n 379e2 │ │ rsbs r4, r5, #2147483648 @ 0x80000000 │ │ mov.w r3, #4294967295 @ 0xffffffff │ │ sbcs.w r4, r3, r6 │ │ str.w r8, [sp, #8] │ │ it ge │ │ movge r6, r3 │ │ mov.w r4, #2147483648 @ 0x80000000 │ │ @@ -22481,548 +22675,548 @@ │ │ movlt r3, r7 │ │ movlt r4, r1 │ │ subs.w r1, r4, r9 │ │ sbcs.w r1, r3, #0 │ │ it ge │ │ movge r4, r9 │ │ cmp.w ip, #0 │ │ - bne.n 376b6 │ │ + bne.n 379be │ │ subs r1, r4, #1 │ │ cmp r1, r4 │ │ - bvs.n 37766 │ │ + bvs.n 37a6e │ │ mov r4, r1 │ │ eor.w r1, r6, #1 │ │ orr.w r1, r1, lr │ │ lsls r1, r1, #31 │ │ - beq.n 37766 │ │ + beq.n 37a6e │ │ ldr r7, [r0, #28] │ │ cmp.w fp, #2 │ │ - beq.w 377ce │ │ + beq.w 37ad6 │ │ cmp.w fp, #10 │ │ - bne.n 3779e │ │ + bne.n 37aa6 │ │ mov.w fp, #12 │ │ movs r5, #38 @ 0x26 │ │ - b.n 3776a │ │ + b.n 37a72 │ │ cmp.w lr, #0 │ │ - beq.n 37716 │ │ + beq.n 37a1e │ │ movs r2, #1 │ │ cmp.w ip, #0 │ │ - beq.n 37736 │ │ - b.n 37746 │ │ + beq.n 37a3e │ │ + b.n 37a4e │ │ movs r0, #38 @ 0x26 │ │ movs r5, #38 @ 0x26 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 377f4 │ │ - ldr r1, [pc, #260] @ (377fc ) │ │ + beq.n 37afc │ │ + ldr r1, [pc, #260] @ (37b04 ) │ │ movs r2, #38 @ 0x26 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ strd r4, r5, [sp, #20] │ │ strd r9, r5, [sp, #12] │ │ add r0, sp, #12 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ adds r5, #1 │ │ adc.w r3, r6, #0 │ │ eor.w r2, r6, r3 │ │ bic.w r6, r2, r6 │ │ movs r2, #0 │ │ cmp.w r6, #4294967295 @ 0xffffffff │ │ mov r6, r3 │ │ it gt │ │ movgt r2, #1 │ │ cmp.w ip, #0 │ │ - bne.n 37746 │ │ + bne.n 37a4e │ │ subs r1, #1 │ │ sbc.w r3, r7, #0 │ │ eor.w r4, r7, r3 │ │ ands r7, r4 │ │ - bmi.n 37762 │ │ + bmi.n 37a6a │ │ mov r7, r3 │ │ - cbz r2, 37762 │ │ + cbz r2, 37a6a │ │ ldr.w r9, [r0, #28] │ │ cmp.w fp, #4 │ │ - beq.n 377d2 │ │ + beq.n 37ada │ │ cmp.w fp, #12 │ │ - bne.n 3779e │ │ + bne.n 37aa6 │ │ str.w r8, [sp, #8] │ │ mov.w fp, #13 │ │ - b.n 377da │ │ + b.n 37ae2 │ │ str.w r8, [sp, #8] │ │ mov.w fp, #27 │ │ movs r0, #72 @ 0x48 │ │ - blx d87f0 │ │ - cbz r0, 377ec │ │ + blx d8810 │ │ + cbz r0, 37af4 │ │ movs r1, #0 │ │ str.w r9, [r0, #24] │ │ strb r1, [r0, #1] │ │ ldr r1, [sp, #8] │ │ str r6, [r0, #20] │ │ str r5, [r0, #16] │ │ str r7, [r0, #12] │ │ str.w r8, [r0, #8] │ │ str r4, [r0, #4] │ │ strb.w fp, [r0] │ │ str r0, [r1, #0] │ │ str.w sl, [sp, #12] │ │ add r0, sp, #12 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #38 @ 0x26 │ │ movs r5, #38 @ 0x26 │ │ - blx d87f0 │ │ - cbz r0, 377f4 │ │ - ldr r1, [pc, #88] @ (37804 ) │ │ + blx d8810 │ │ + cbz r0, 37afc │ │ + ldr r1, [pc, #88] @ (37b0c ) │ │ movs r2, #38 @ 0x26 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #10 │ │ str r5, [sp, #24] │ │ movt r0, #32768 @ 0x8000 │ │ str r4, [sp, #20] │ │ str r5, [sp, #16] │ │ str r0, [sp, #12] │ │ add r0, sp, #12 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r5, #38 @ 0x26 │ │ - b.n 3776a │ │ + b.n 37a72 │ │ mov.w fp, #3 │ │ str.w r8, [sp, #8] │ │ movs r4, #10 │ │ mov r8, r1 │ │ movt r4, #32768 @ 0x8000 │ │ movs r0, #72 @ 0x48 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - bne.n 37772 │ │ + bne.n 37a7a │ │ movs r0, #8 │ │ movs r1, #72 @ 0x48 │ │ - bl 3de2a │ │ + bl 3e132 │ │ movs r0, #1 │ │ movs r1, #38 @ 0x26 │ │ - bl 3dfa4 │ │ - bl ffca87fa │ │ - str r1, [sp, #928] @ 0x3a0 │ │ - vrsra.u64 d31, d30, #2 │ │ - Address 0x37806 is out of bounds. │ │ + bl 3e2ac │ │ + bl 1a0b02 │ │ + ldrh r0, [r4, #54] @ 0x36 │ │ + vshr.u64 d31, d22, #2 │ │ + Address 0x37b0e is out of bounds. │ │ │ │ │ │ -00037808 : │ │ +00037b10 : │ │ push {r4, r5, r7, lr} │ │ sub sp, #72 @ 0x48 │ │ mov r4, r0 │ │ mov r0, sp │ │ movs r2, #72 @ 0x48 │ │ mov r5, r1 │ │ - bl d4c50 │ │ + bl d50a2 │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r0, #72 @ 0x48 │ │ - blx d87f0 │ │ - cbz r0, 37848 │ │ + blx d8810 │ │ + cbz r0, 37b50 │ │ mov r1, sp │ │ movs r2, #72 @ 0x48 │ │ mov r5, r0 │ │ - bl d4c50 │ │ + bl d50a2 │ │ movs r0, #72 @ 0x48 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ itttt ne │ │ strne r5, [r0, #4] │ │ movne r1, #26 │ │ strbne r1, [r0, #0] │ │ strne r0, [r4, #0] │ │ itt ne │ │ addne sp, #72 @ 0x48 │ │ popne {r4, r5, r7, pc} │ │ movs r0, #8 │ │ movs r1, #72 @ 0x48 │ │ - bl 3de2a │ │ + bl 3e132 │ │ │ │ -00037850 : │ │ +00037b58 : │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #44 @ 0x2c │ │ mov r4, r1 │ │ mov r1, r0 │ │ ldrd r0, r7, [sp, #64] @ 0x40 │ │ strd r0, r7, [sp] │ │ add r0, sp, #28 │ │ - bl 327b8 │ │ + bl 32888 │ │ ldrd r1, r0, [sp, #28] │ │ movs r5, #17 │ │ movt r5, #32768 @ 0x8000 │ │ cmp r1, r5 │ │ - bne.n 37898 │ │ + bne.n 37ba0 │ │ ldrb.w r7, [r0, #32] │ │ ldr r6, [r0, #28] │ │ movs r0, #72 @ 0x48 │ │ - blx d87f0 │ │ - cbz r0, 378ae │ │ + blx d8810 │ │ + cbz r0, 37bb6 │ │ movs r1, #22 │ │ strb r7, [r0, #8] │ │ str r6, [r0, #4] │ │ strb r1, [r0, #0] │ │ str r0, [r4, #0] │ │ str r5, [sp, #12] │ │ add r0, sp, #12 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #44 @ 0x2c │ │ pop {r4, r5, r6, r7, pc} │ │ ldrd r2, r3, [sp, #36] @ 0x24 │ │ strd r2, r3, [sp, #20] │ │ strd r1, r0, [sp, #12] │ │ add r0, sp, #12 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #44 @ 0x2c │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #8 │ │ movs r1, #72 @ 0x48 │ │ - bl 3de2a │ │ - bmi.n 37862 │ │ + bl 3e132 │ │ + bmi.n 37b6a │ │ │ │ -000378b8 : │ │ +00037bc0 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ sub sp, #100 @ 0x64 │ │ mov r5, r2 │ │ ldrd r2, r3, [sp, #128] @ 0x80 │ │ add r6, sp, #24 │ │ mov r9, r1 │ │ mov r1, r0 │ │ ldrd r0, r7, [sp, #136] @ 0x88 │ │ strd r0, r7, [sp] │ │ mov r0, r6 │ │ - bl 327b8 │ │ + bl 32888 │ │ ldrd r0, r4, [sp, #24] │ │ movw r8, #17 │ │ movt r8, #32768 @ 0x8000 │ │ cmp r0, r8 │ │ - bne.n 37916 │ │ - cbz r5, 37922 │ │ + bne.n 37c1e │ │ + cbz r5, 37c2a │ │ add r0, sp, #24 │ │ mov r1, r5 │ │ movs r2, #72 @ 0x48 │ │ - bl d4c50 │ │ + bl d50a2 │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrb.w r0, [r4, #32] │ │ ldr r7, [r4, #28] │ │ cmp r0, #15 │ │ - beq.n 37932 │ │ + beq.n 37c3a │ │ cmp r0, #7 │ │ - bne.n 37940 │ │ + bne.n 37c48 │ │ ldrb.w r0, [sp, #24] │ │ cmp r0, #32 │ │ - bne.n 37980 │ │ + bne.n 37c88 │ │ movs r4, #22 │ │ movs r5, #7 │ │ - b.n 379b2 │ │ + b.n 37cba │ │ ldrd r1, r2, [sp, #32] │ │ str r2, [sp, #20] │ │ strd r4, r1, [sp, #12] │ │ - b.n 37972 │ │ + b.n 37c7a │ │ movs r0, #32 │ │ strb.w r0, [sp, #24] │ │ ldrb.w r0, [r4, #32] │ │ ldr r7, [r4, #28] │ │ cmp r0, #15 │ │ - bne.n 37904 │ │ + bne.n 37c0c │ │ ldrb.w r4, [sp, #24] │ │ cmp r4, #32 │ │ - bne.n 3799a │ │ + bne.n 37ca2 │ │ movs r4, #29 │ │ movs r5, #0 │ │ - b.n 379b2 │ │ + b.n 37cba │ │ movs r0, #38 @ 0x26 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 379e0 │ │ - ldr r1, [pc, #156] @ (379e8 ) │ │ + beq.n 37ce8 │ │ + ldr r1, [pc, #156] @ (37cf0 ) │ │ movs r2, #38 @ 0x26 │ │ mov r4, r0 │ │ movs r5, #38 @ 0x26 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ ldrb.w r0, [sp, #24] │ │ cmp r0, #32 │ │ itt ne │ │ addne.w r0, sp, #24 │ │ - blne 42fcc │ │ + blne 432d4 │ │ sub.w r0, r8, #7 │ │ str r5, [sp, #20] │ │ strd r5, r4, [sp, #12] │ │ str r0, [sp, #8] │ │ add r0, sp, #8 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ movs r0, #72 @ 0x48 │ │ - blx d87f0 │ │ - cbz r0, 379d8 │ │ + blx d8810 │ │ + cbz r0, 37ce0 │ │ add r1, sp, #24 │ │ movs r2, #72 @ 0x48 │ │ mov r6, r0 │ │ - bl d4c50 │ │ + bl d50a2 │ │ mov r5, r7 │ │ movs r4, #28 │ │ mov r7, r6 │ │ - b.n 379b2 │ │ + b.n 37cba │ │ movs r0, #72 @ 0x48 │ │ - blx d87f0 │ │ - cbz r0, 379d8 │ │ + blx d8810 │ │ + cbz r0, 37ce0 │ │ mov r5, r0 │ │ adds r1, r6, #1 │ │ strb.w r4, [r0], #1 │ │ movs r2, #71 @ 0x47 │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r4, #29 │ │ movs r0, #72 @ 0x48 │ │ - blx d87f0 │ │ - cbz r0, 379d8 │ │ + blx d8810 │ │ + cbz r0, 37ce0 │ │ movs r1, #38 @ 0x26 │ │ str r5, [r0, #8] │ │ str r1, [r0, #16] │ │ str r7, [r0, #4] │ │ strb r4, [r0, #0] │ │ str.w r0, [r9] │ │ str.w r8, [sp, #8] │ │ add r0, sp, #8 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ movs r0, #8 │ │ movs r1, #72 @ 0x48 │ │ - bl 3de2a │ │ + bl 3e132 │ │ movs r0, #1 │ │ movs r1, #38 @ 0x26 │ │ - bl 3dfa4 │ │ - bl 2529e6 │ │ + bl 3e2ac │ │ + vrecps.f16 , q9, │ │ │ │ -000379ec : │ │ +00037cf4 : │ │ push {r4, r5, r7, lr} │ │ mov r4, r0 │ │ movs r0, #72 @ 0x48 │ │ mov r5, r1 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ itttt ne │ │ strbne r5, [r0, #1] │ │ movne r1, #27 │ │ strbne r1, [r0, #0] │ │ strne r0, [r4, #0] │ │ it ne │ │ popne {r4, r5, r7, pc} │ │ movs r0, #8 │ │ movs r1, #72 @ 0x48 │ │ - bl 3de2a │ │ + bl 3e132 │ │ │ │ -00037a10 : │ │ +00037d18 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #68 @ 0x44 │ │ mov r9, r1 │ │ mov r1, r0 │ │ ldrd r0, r7, [sp, #128] @ 0x80 │ │ mov r5, r3 │ │ mov r6, r2 │ │ ldrd r2, r3, [sp, #120] @ 0x78 │ │ strd r0, r7, [sp] │ │ add r0, sp, #40 @ 0x28 │ │ - bl 327b8 │ │ + bl 32888 │ │ movs r7, #10 │ │ ldrd r0, sl, [sp, #40] @ 0x28 │ │ movt r7, #32768 @ 0x8000 │ │ adds r4, r7, #7 │ │ cmp r0, r4 │ │ - bne.n 37a86 │ │ - cbz r6, 37a9e │ │ + bne.n 37d8e │ │ + cbz r6, 37da6 │ │ mov r0, r6 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #40 @ 0x28 │ │ mov r1, r6 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #40] @ 0x28 │ │ cmp r0, #1 │ │ - bne.n 37aa4 │ │ + bne.n 37dac │ │ movs r0, #33 @ 0x21 │ │ movs r5, #33 @ 0x21 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 37ca2 │ │ - ldr r1, [pc, #588] @ (37cb4 ) │ │ + beq.w 37faa │ │ + ldr r1, [pc, #588] @ (37fbc ) │ │ movs r2, #33 @ 0x21 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ strd r4, r5, [sp, #32] │ │ strd r7, r5, [sp, #24] │ │ add r0, sp, #24 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd r1, r2, [sp, #48] @ 0x30 │ │ strd r1, r2, [sp, #32] │ │ strd r0, sl, [sp, #24] │ │ add r0, sp, #24 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r6, r7 │ │ movs r1, #0 │ │ - b.n 37aaa │ │ + b.n 37db2 │ │ ldrd r1, r2, [sp, #44] @ 0x2c │ │ mov r6, r7 │ │ ldr r3, [sp, #112] @ 0x70 │ │ add r0, sp, #56 @ 0x38 │ │ ldr.w fp, [sp, #104] @ 0x68 │ │ - bl 5a4ea │ │ + bl 5a6fa │ │ ldr.w r8, [sp, #56] @ 0x38 │ │ - cbz r5, 37aca │ │ + cbz r5, 37dd2 │ │ ldrd r2, r7, [sp, #60] @ 0x3c │ │ cmp.w fp, #0 │ │ str r2, [sp, #20] │ │ - bne.n 37ae0 │ │ - b.n 37b6c │ │ + bne.n 37de8 │ │ + b.n 37e74 │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ - bne.n 37b26 │ │ + bne.n 37e2e │ │ movs r2, #1 │ │ movs r7, #0 │ │ mov.w r8, #0 │ │ cmp.w fp, #0 │ │ str r2, [sp, #20] │ │ - beq.n 37b6c │ │ + beq.n 37e74 │ │ mov r0, fp │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #40 @ 0x28 │ │ mov r1, fp │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #40] @ 0x28 │ │ cmp r0, #1 │ │ - bne.n 37b20 │ │ + bne.n 37e28 │ │ movs r0, #33 @ 0x21 │ │ movs r5, #33 @ 0x21 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 37ca2 │ │ - ldr r1, [pc, #432] @ (37cb8 ) │ │ + beq.w 37faa │ │ + ldr r1, [pc, #432] @ (37fc0 ) │ │ movs r2, #33 @ 0x21 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ strd r4, r5, [sp, #32] │ │ strd r6, r5, [sp, #24] │ │ movs.w r0, r8, lsl #1 │ │ - beq.n 37a7a │ │ - b.n 37bca │ │ + beq.n 37d82 │ │ + b.n 37ed2 │ │ ldrd r1, r2, [sp, #44] @ 0x2c │ │ - b.n 37b6e │ │ + b.n 37e76 │ │ add r7, sp, #56 @ 0x38 │ │ add r2, sp, #40 @ 0x28 │ │ ldmia r7, {r0, r1, r7} │ │ stmia r2!, {r0, r1, r7} │ │ - cbz r7, 37b4a │ │ + cbz r7, 37e52 │ │ ldr r2, [sp, #44] @ 0x2c │ │ subs r0, r7, #1 │ │ ldrb r1, [r2, r0] │ │ cmp r1, #255 @ 0xff │ │ - bne.n 37b5c │ │ + bne.n 37e64 │ │ ldr r0, [sp, #40] @ 0x28 │ │ cmp r7, r0 │ │ - beq.w 37c90 │ │ + beq.w 37f98 │ │ movs r0, #0 │ │ strb r0, [r2, r7] │ │ adds r7, #1 │ │ - b.n 37b60 │ │ + b.n 37e68 │ │ ldr r0, [sp, #40] @ 0x28 │ │ cmp r0, #0 │ │ - beq.w 37c88 │ │ + beq.w 37f90 │ │ ldr r2, [sp, #44] @ 0x2c │ │ movs r0, #0 │ │ movs r7, #1 │ │ strb r0, [r2, #0] │ │ - b.n 37b60 │ │ + b.n 37e68 │ │ adds r1, #1 │ │ strb r1, [r2, r0] │ │ ldr.w r8, [sp, #40] @ 0x28 │ │ cmp.w fp, #0 │ │ str r2, [sp, #20] │ │ - bne.n 37ae0 │ │ + bne.n 37de8 │ │ movs r1, #0 │ │ ldr r3, [sp, #112] @ 0x70 │ │ add r0, sp, #40 @ 0x28 │ │ mov fp, r6 │ │ ldr r5, [sp, #108] @ 0x6c │ │ - bl 5a4ea │ │ + bl 5a6fa │ │ ldr r0, [sp, #40] @ 0x28 │ │ - cbz r5, 37ba8 │ │ + cbz r5, 37eb0 │ │ sub.w r1, fp, #9 │ │ cmp r0, r1 │ │ - beq.n 37bae │ │ + beq.n 37eb6 │ │ ldrd r1, r2, [sp, #44] @ 0x2c │ │ mov r6, r0 │ │ str r7, [sp, #16] │ │ ldrb.w r5, [sl, #32] │ │ ldr.w r7, [sl, #28] │ │ cmp r5, #6 │ │ - beq.n 37c04 │ │ + beq.n 37f0c │ │ cmp r5, #14 │ │ - bne.n 37c46 │ │ + bne.n 37f4e │ │ str r6, [sp, #12] │ │ mov fp, r2 │ │ mov r6, r1 │ │ movs r5, #16 │ │ - b.n 37c0a │ │ + b.n 37f12 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.n 37bdc │ │ + bne.n 37ee4 │ │ movs r0, #72 @ 0x48 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 37c9a │ │ + beq.n 37fa2 │ │ movs r1, #27 │ │ str.w r0, [r9] │ │ strh r1, [r0, #0] │ │ str r4, [sp, #24] │ │ movs.w r0, r8, lsl #1 │ │ - beq.w 37a7a │ │ + beq.w 37d82 │ │ ldr r0, [sp, #20] │ │ - blx d87c0 │ │ + blx d87d0 │ │ add r0, sp, #24 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r1, [sp, #48] @ 0x30 │ │ movs r2, #0 │ │ movs r6, #0 │ │ cmp r1, #0 │ │ it eq │ │ moveq.w r6, #2147483648 @ 0x80000000 │ │ str r7, [sp, #16] │ │ - cbz r0, 37bf6 │ │ + cbz r0, 37efe │ │ ldr r0, [sp, #44] @ 0x2c │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r2, #0 │ │ movs r1, #1 │ │ ldrb.w r5, [sl, #32] │ │ ldr.w r7, [sl, #28] │ │ cmp r5, #6 │ │ - bne.n 37b9a │ │ + bne.n 37ea2 │ │ str r6, [sp, #12] │ │ mov fp, r2 │ │ mov r6, r1 │ │ movs r0, #72 @ 0x48 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 37c9a │ │ + beq.n 37fa2 │ │ ldr r1, [sp, #112] @ 0x70 │ │ strb.w r1, [r0, #32] │ │ ldr r1, [sp, #12] │ │ str r1, [r0, #16] │ │ ldr r1, [sp, #16] │ │ str r1, [r0, #12] │ │ ldr r1, [sp, #20] │ │ @@ -23031,890 +23225,890 @@ │ │ str r6, [r0, #20] │ │ str r1, [r0, #8] │ │ str.w r8, [r0, #4] │ │ strb r5, [r0, #0] │ │ str.w r0, [r9] │ │ str r4, [sp, #24] │ │ add r0, sp, #24 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #38 @ 0x26 │ │ mov r5, r1 │ │ - blx d87f0 │ │ - cbz r0, 37caa │ │ - ldr r1, [pc, #104] @ (37cbc ) │ │ + blx d8810 │ │ + cbz r0, 37fb2 │ │ + ldr r1, [pc, #104] @ (37fc4 ) │ │ movs r2, #38 @ 0x26 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ lsls r0, r6, #1 │ │ - beq.n 37c66 │ │ + beq.n 37f6e │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs.w r0, r8, lsl #1 │ │ - beq.n 37c72 │ │ + beq.n 37f7a │ │ ldr r0, [sp, #20] │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r0, #38 @ 0x26 │ │ strd r4, r0, [sp, #32] │ │ strd fp, r0, [sp, #24] │ │ add r0, sp, #24 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add r0, sp, #40 @ 0x28 │ │ - bl 3ec24 │ │ - b.n 37b52 │ │ + bl 3ef2c │ │ + b.n 37e5a │ │ add r0, sp, #40 @ 0x28 │ │ - bl 3ec24 │ │ + bl 3ef2c │ │ ldr r2, [sp, #44] @ 0x2c │ │ - b.n 37b42 │ │ + b.n 37e4a │ │ movs r0, #8 │ │ movs r1, #72 @ 0x48 │ │ - bl 3de2a │ │ + bl 3e132 │ │ movs r0, #1 │ │ movs r1, #33 @ 0x21 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #38 @ 0x26 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - add r5, pc, #832 @ (adr r5, 37ff8 ) │ │ - vsli.32 d26, d18, #29 │ │ - vcvt.u32.f32 d30, d6, #3 │ │ - Address 0x37cbe is out of bounds. │ │ + add r2, pc, #800 @ (adr r2, 382e0 ) │ │ + vclt.s d26, d26, #0 │ │ + vdup.8 d30, d14[6] │ │ + Address 0x37fc6 is out of bounds. │ │ │ │ │ │ -00037cc0 : │ │ +00037fc8 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #44 @ 0x2c │ │ mov fp, r1 │ │ mov r1, r0 │ │ ldrd r0, r7, [sp, #88] @ 0x58 │ │ mov r5, r3 │ │ mov r6, r2 │ │ ldrd r2, r3, [sp, #80] @ 0x50 │ │ strd r0, r7, [sp] │ │ add r0, sp, #28 │ │ - bl 327b8 │ │ + bl 32888 │ │ movw r9, #10 │ │ ldrd r0, r4, [sp, #28] │ │ movt r9, #32768 @ 0x8000 │ │ add.w r7, r9, #7 │ │ cmp r0, r7 │ │ - bne.n 37d40 │ │ + bne.n 38048 │ │ cmp r6, #0 │ │ - beq.w 37e1a │ │ + beq.w 38122 │ │ mov r0, r6 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #28 │ │ mov r1, r6 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #28] │ │ cmp r0, #1 │ │ - bne.n 37d58 │ │ + bne.n 38060 │ │ movs r0, #33 @ 0x21 │ │ movs r5, #33 @ 0x21 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 37e22 │ │ - ldr r1, [pc, #284] @ (37e3c ) │ │ + beq.w 3812a │ │ + ldr r1, [pc, #284] @ (38144 ) │ │ movs r2, #33 @ 0x21 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ str r5, [sp, #24] │ │ str r4, [sp, #20] │ │ str r5, [sp, #16] │ │ str.w r9, [sp, #12] │ │ add r0, sp, #12 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd r1, r2, [sp, #36] @ 0x24 │ │ strd r1, r2, [sp, #20] │ │ strd r0, r4, [sp, #12] │ │ add r0, sp, #12 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd r1, r6, [sp, #32] │ │ ldrb.w sl, [r4, #32] │ │ ldr r0, [r4, #28] │ │ - cbz r5, 37d6e │ │ + cbz r5, 38076 │ │ cmp.w r6, #4294967295 @ 0xffffffff │ │ - bgt.n 37db0 │ │ - bl 3e03c │ │ + bgt.n 380b8 │ │ + bl 3e344 │ │ str r0, [sp, #8] │ │ add r0, sp, #28 │ │ mov r2, r6 │ │ - bl 3e320 │ │ + bl 3e628 │ │ cmp.w sl, #6 │ │ - beq.n 37ddc │ │ + beq.n 380e4 │ │ cmp.w sl, #14 │ │ - bne.n 37d8a │ │ + bne.n 38092 │ │ mov.w r8, #19 │ │ - b.n 37de0 │ │ + b.n 380e8 │ │ movs r0, #38 @ 0x26 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 37e2a │ │ - ldr r1, [pc, #168] @ (37e40 ) │ │ + beq.n 38132 │ │ + ldr r1, [pc, #168] @ (38148 ) │ │ movs r2, #38 @ 0x26 │ │ mov r4, r0 │ │ movs r5, #38 @ 0x26 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r0, [sp, #28] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #32] │ │ - blxne d87c0 │ │ - b.n 37d2a │ │ + blxne d87d0 │ │ + b.n 38032 │ │ str r0, [sp, #8] │ │ - cbz r6, 37dc4 │ │ + cbz r6, 380cc │ │ mov r0, r6 │ │ mov r4, r1 │ │ - blx d87f0 │ │ - cbz r0, 37e32 │ │ + blx d8810 │ │ + cbz r0, 3813a │ │ mov r8, r0 │ │ mov r1, r4 │ │ - b.n 37dc8 │ │ + b.n 380d0 │ │ mov.w r8, #1 │ │ mov r0, r8 │ │ mov r2, r6 │ │ - bl d53c6 │ │ + bl d52ea │ │ str r6, [sp, #36] @ 0x24 │ │ strd r6, r8, [sp, #28] │ │ cmp.w sl, #6 │ │ - bne.n 37d7e │ │ + bne.n 38086 │ │ mov.w r8, #9 │ │ movs r0, #72 @ 0x48 │ │ ldrd r9, r6, [sp, #28] │ │ ldr r4, [sp, #36] @ 0x24 │ │ - blx d87f0 │ │ - cbz r0, 37e12 │ │ + blx d8810 │ │ + cbz r0, 3811a │ │ ldr r1, [sp, #8] │ │ strb r5, [r0, #20] │ │ str r1, [r0, #16] │ │ str r4, [r0, #12] │ │ str r6, [r0, #8] │ │ str.w r9, [r0, #4] │ │ strb.w r8, [r0] │ │ str.w r0, [fp] │ │ str r7, [sp, #12] │ │ add r0, sp, #12 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #8 │ │ movs r1, #72 @ 0x48 │ │ - bl 3de2a │ │ - ldr r0, [pc, #40] @ (37e44 ) │ │ + bl 3e132 │ │ + ldr r0, [pc, #40] @ (3814c ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ movs r0, #1 │ │ movs r1, #33 @ 0x21 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #38 @ 0x26 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r1, r6 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - add r3, pc, #96 @ (adr r3, 37ea0 ) │ │ - @ instruction: 0xfffdedd0 │ │ - vsli.32 q9, q6, #29 │ │ + add r0, pc, #64 @ (adr r0, 38188 ) │ │ + vtbx.8 d30, {d29-d31}, d8 │ │ + vclt.s q9, q10, #0 │ │ movs r2, r1 │ │ │ │ -00037e48 : │ │ +00038150 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #44 @ 0x2c │ │ mov fp, r1 │ │ mov r1, r0 │ │ ldrd r0, r7, [sp, #88] @ 0x58 │ │ mov r5, r3 │ │ mov r6, r2 │ │ ldrd r2, r3, [sp, #80] @ 0x50 │ │ strd r0, r7, [sp] │ │ add r0, sp, #28 │ │ - bl 327b8 │ │ + bl 32888 │ │ movw r9, #10 │ │ ldrd r0, r4, [sp, #28] │ │ movt r9, #32768 @ 0x8000 │ │ add.w r7, r9, #7 │ │ cmp r0, r7 │ │ - bne.n 37ec8 │ │ + bne.n 381d0 │ │ cmp r6, #0 │ │ - beq.w 37fa2 │ │ + beq.w 382aa │ │ mov r0, r6 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #28 │ │ mov r1, r6 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #28] │ │ cmp r0, #1 │ │ - bne.n 37ee0 │ │ + bne.n 381e8 │ │ movs r0, #33 @ 0x21 │ │ movs r5, #33 @ 0x21 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 37faa │ │ - ldr r1, [pc, #284] @ (37fc4 ) │ │ + beq.w 382b2 │ │ + ldr r1, [pc, #284] @ (382cc ) │ │ movs r2, #33 @ 0x21 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ str r5, [sp, #24] │ │ str r4, [sp, #20] │ │ str r5, [sp, #16] │ │ str.w r9, [sp, #12] │ │ add r0, sp, #12 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd r1, r2, [sp, #36] @ 0x24 │ │ strd r1, r2, [sp, #20] │ │ strd r0, r4, [sp, #12] │ │ add r0, sp, #12 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd r1, r6, [sp, #32] │ │ ldrb.w sl, [r4, #32] │ │ ldr r0, [r4, #28] │ │ - cbz r5, 37ef6 │ │ + cbz r5, 381fe │ │ cmp.w r6, #4294967295 @ 0xffffffff │ │ - bgt.n 37f38 │ │ - bl 3e03c │ │ + bgt.n 38240 │ │ + bl 3e344 │ │ str r0, [sp, #8] │ │ add r0, sp, #28 │ │ mov r2, r6 │ │ - bl 3e320 │ │ + bl 3e628 │ │ cmp.w sl, #6 │ │ - beq.n 37f64 │ │ + beq.n 3826c │ │ cmp.w sl, #14 │ │ - bne.n 37f12 │ │ + bne.n 3821a │ │ mov.w r8, #18 │ │ - b.n 37f68 │ │ + b.n 38270 │ │ movs r0, #38 @ 0x26 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 37fb2 │ │ - ldr r1, [pc, #168] @ (37fc8 ) │ │ + beq.n 382ba │ │ + ldr r1, [pc, #168] @ (382d0 ) │ │ movs r2, #38 @ 0x26 │ │ mov r4, r0 │ │ movs r5, #38 @ 0x26 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r0, [sp, #28] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #32] │ │ - blxne d87c0 │ │ - b.n 37eb2 │ │ + blxne d87d0 │ │ + b.n 381ba │ │ str r0, [sp, #8] │ │ - cbz r6, 37f4c │ │ + cbz r6, 38254 │ │ mov r0, r6 │ │ mov r4, r1 │ │ - blx d87f0 │ │ - cbz r0, 37fba │ │ + blx d8810 │ │ + cbz r0, 382c2 │ │ mov r8, r0 │ │ mov r1, r4 │ │ - b.n 37f50 │ │ + b.n 38258 │ │ mov.w r8, #1 │ │ mov r0, r8 │ │ mov r2, r6 │ │ - bl d53c6 │ │ + bl d52ea │ │ str r6, [sp, #36] @ 0x24 │ │ strd r6, r8, [sp, #28] │ │ cmp.w sl, #6 │ │ - bne.n 37f06 │ │ + bne.n 3820e │ │ mov.w r8, #8 │ │ movs r0, #72 @ 0x48 │ │ ldrd r9, r6, [sp, #28] │ │ ldr r4, [sp, #36] @ 0x24 │ │ - blx d87f0 │ │ - cbz r0, 37f9a │ │ + blx d8810 │ │ + cbz r0, 382a2 │ │ ldr r1, [sp, #8] │ │ strb r5, [r0, #20] │ │ str r1, [r0, #16] │ │ str r4, [r0, #12] │ │ str r6, [r0, #8] │ │ str.w r9, [r0, #4] │ │ strb.w r8, [r0] │ │ str.w r0, [fp] │ │ str r7, [sp, #12] │ │ add r0, sp, #12 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #8 │ │ movs r1, #72 @ 0x48 │ │ - bl 3de2a │ │ - ldr r0, [pc, #40] @ (37fcc ) │ │ + bl 3e132 │ │ + ldr r0, [pc, #40] @ (382d4 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ movs r0, #1 │ │ movs r1, #33 @ 0x21 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #38 @ 0x26 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r1, r6 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - add r1, pc, #576 @ (adr r1, 38208 ) │ │ - vdup.8 q15, d8[6] │ │ - vneg.s q9, q10 │ │ + ldr r6, [sp, #544] @ 0x220 │ │ + vtbx.8 d30, {d13-d14}, d0 │ │ + vcge.s q9, q14, #0 │ │ movs r2, r1 │ │ │ │ -00037fd0 : │ │ +000382d8 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #44 @ 0x2c │ │ mov fp, r1 │ │ mov r1, r0 │ │ ldrd r0, r7, [sp, #88] @ 0x58 │ │ mov r5, r3 │ │ mov r6, r2 │ │ ldrd r2, r3, [sp, #80] @ 0x50 │ │ strd r0, r7, [sp] │ │ add r0, sp, #28 │ │ - bl 327b8 │ │ + bl 32888 │ │ movw r9, #10 │ │ ldrd r0, r4, [sp, #28] │ │ movt r9, #32768 @ 0x8000 │ │ add.w r7, r9, #7 │ │ cmp r0, r7 │ │ - bne.n 38050 │ │ + bne.n 38358 │ │ cmp r6, #0 │ │ - beq.w 3812a │ │ + beq.w 38432 │ │ mov r0, r6 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #28 │ │ mov r1, r6 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #28] │ │ cmp r0, #1 │ │ - bne.n 38068 │ │ + bne.n 38370 │ │ movs r0, #33 @ 0x21 │ │ movs r5, #33 @ 0x21 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 38132 │ │ - ldr r1, [pc, #284] @ (3814c ) │ │ + beq.w 3843a │ │ + ldr r1, [pc, #284] @ (38454 ) │ │ movs r2, #33 @ 0x21 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ str r5, [sp, #24] │ │ str r4, [sp, #20] │ │ str r5, [sp, #16] │ │ str.w r9, [sp, #12] │ │ add r0, sp, #12 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd r1, r2, [sp, #36] @ 0x24 │ │ strd r1, r2, [sp, #20] │ │ strd r0, r4, [sp, #12] │ │ add r0, sp, #12 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd r1, r6, [sp, #32] │ │ ldrb.w sl, [r4, #32] │ │ ldr r0, [r4, #28] │ │ - cbz r5, 3807e │ │ + cbz r5, 38386 │ │ cmp.w r6, #4294967295 @ 0xffffffff │ │ - bgt.n 380c0 │ │ - bl 3e03c │ │ + bgt.n 383c8 │ │ + bl 3e344 │ │ str r0, [sp, #8] │ │ add r0, sp, #28 │ │ mov r2, r6 │ │ - bl 3e320 │ │ + bl 3e628 │ │ cmp.w sl, #6 │ │ - beq.n 380ec │ │ + beq.n 383f4 │ │ cmp.w sl, #14 │ │ - bne.n 3809a │ │ + bne.n 383a2 │ │ mov.w r8, #20 │ │ - b.n 380f0 │ │ + b.n 383f8 │ │ movs r0, #38 @ 0x26 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 3813a │ │ - ldr r1, [pc, #168] @ (38150 ) │ │ + beq.n 38442 │ │ + ldr r1, [pc, #168] @ (38458 ) │ │ movs r2, #38 @ 0x26 │ │ mov r4, r0 │ │ movs r5, #38 @ 0x26 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r0, [sp, #28] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #32] │ │ - blxne d87c0 │ │ - b.n 3803a │ │ + blxne d87d0 │ │ + b.n 38342 │ │ str r0, [sp, #8] │ │ - cbz r6, 380d4 │ │ + cbz r6, 383dc │ │ mov r0, r6 │ │ mov r4, r1 │ │ - blx d87f0 │ │ - cbz r0, 38142 │ │ + blx d8810 │ │ + cbz r0, 3844a │ │ mov r8, r0 │ │ mov r1, r4 │ │ - b.n 380d8 │ │ + b.n 383e0 │ │ mov.w r8, #1 │ │ mov r0, r8 │ │ mov r2, r6 │ │ - bl d53c6 │ │ + bl d52ea │ │ str r6, [sp, #36] @ 0x24 │ │ strd r6, r8, [sp, #28] │ │ cmp.w sl, #6 │ │ - bne.n 3808e │ │ + bne.n 38396 │ │ mov.w r8, #10 │ │ movs r0, #72 @ 0x48 │ │ ldrd r9, r6, [sp, #28] │ │ ldr r4, [sp, #36] @ 0x24 │ │ - blx d87f0 │ │ - cbz r0, 38122 │ │ + blx d8810 │ │ + cbz r0, 3842a │ │ ldr r1, [sp, #8] │ │ strb r5, [r0, #20] │ │ str r1, [r0, #16] │ │ str r4, [r0, #12] │ │ str r6, [r0, #8] │ │ str.w r9, [r0, #4] │ │ strb.w r8, [r0] │ │ str.w r0, [fp] │ │ str r7, [sp, #12] │ │ add r0, sp, #12 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #8 │ │ movs r1, #72 @ 0x48 │ │ - bl 3de2a │ │ - ldr r0, [pc, #40] @ (38154 ) │ │ + bl 3e132 │ │ + ldr r0, [pc, #40] @ (3845c ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ movs r0, #1 │ │ movs r1, #33 @ 0x21 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #38 @ 0x26 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r1, r6 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - add r0, pc, #32 @ (adr r0, 38170 ) │ │ - vtbx.8 d30, {d29-d31}, d0 │ │ - vrshr.u32 d18, d28, #3 │ │ + ldr r5, [sp, #0] │ │ + vqshl.u64 d30, d24, #61 @ 0x3d │ │ + vqrdmlsh.s , , d4[0] │ │ movs r2, r1 │ │ │ │ -00038158 : │ │ +00038460 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #44 @ 0x2c │ │ mov fp, r1 │ │ mov r1, r0 │ │ ldrd r0, r7, [sp, #88] @ 0x58 │ │ mov r5, r3 │ │ mov r6, r2 │ │ ldrd r2, r3, [sp, #80] @ 0x50 │ │ strd r0, r7, [sp] │ │ add r0, sp, #28 │ │ - bl 327b8 │ │ + bl 32888 │ │ movw r9, #10 │ │ ldrd r0, r4, [sp, #28] │ │ movt r9, #32768 @ 0x8000 │ │ add.w r7, r9, #7 │ │ cmp r0, r7 │ │ - bne.n 381d8 │ │ + bne.n 384e0 │ │ cmp r6, #0 │ │ - beq.w 382b2 │ │ + beq.w 385ba │ │ mov r0, r6 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #28 │ │ mov r1, r6 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #28] │ │ cmp r0, #1 │ │ - bne.n 381f0 │ │ + bne.n 384f8 │ │ movs r0, #33 @ 0x21 │ │ movs r5, #33 @ 0x21 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 382ba │ │ - ldr r1, [pc, #284] @ (382d4 ) │ │ + beq.w 385c2 │ │ + ldr r1, [pc, #284] @ (385dc ) │ │ movs r2, #33 @ 0x21 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ str r5, [sp, #24] │ │ str r4, [sp, #20] │ │ str r5, [sp, #16] │ │ str.w r9, [sp, #12] │ │ add r0, sp, #12 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd r1, r2, [sp, #36] @ 0x24 │ │ strd r1, r2, [sp, #20] │ │ strd r0, r4, [sp, #12] │ │ add r0, sp, #12 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd r1, r6, [sp, #32] │ │ ldrb.w sl, [r4, #32] │ │ ldr r0, [r4, #28] │ │ - cbz r5, 38206 │ │ + cbz r5, 3850e │ │ cmp.w r6, #4294967295 @ 0xffffffff │ │ - bgt.n 38248 │ │ - bl 3e03c │ │ + bgt.n 38550 │ │ + bl 3e344 │ │ str r0, [sp, #8] │ │ add r0, sp, #28 │ │ mov r2, r6 │ │ - bl 3e320 │ │ + bl 3e628 │ │ cmp.w sl, #6 │ │ - beq.n 38274 │ │ + beq.n 3857c │ │ cmp.w sl, #14 │ │ - bne.n 38222 │ │ + bne.n 3852a │ │ mov.w r8, #17 │ │ - b.n 38278 │ │ + b.n 38580 │ │ movs r0, #38 @ 0x26 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 382c2 │ │ - ldr r1, [pc, #168] @ (382d8 ) │ │ + beq.n 385ca │ │ + ldr r1, [pc, #168] @ (385e0 ) │ │ movs r2, #38 @ 0x26 │ │ mov r4, r0 │ │ movs r5, #38 @ 0x26 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r0, [sp, #28] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #32] │ │ - blxne d87c0 │ │ - b.n 381c2 │ │ + blxne d87d0 │ │ + b.n 384ca │ │ str r0, [sp, #8] │ │ - cbz r6, 3825c │ │ + cbz r6, 38564 │ │ mov r0, r6 │ │ mov r4, r1 │ │ - blx d87f0 │ │ - cbz r0, 382ca │ │ + blx d8810 │ │ + cbz r0, 385d2 │ │ mov r8, r0 │ │ mov r1, r4 │ │ - b.n 38260 │ │ + b.n 38568 │ │ mov.w r8, #1 │ │ mov r0, r8 │ │ mov r2, r6 │ │ - bl d53c6 │ │ + bl d52ea │ │ str r6, [sp, #36] @ 0x24 │ │ strd r6, r8, [sp, #28] │ │ cmp.w sl, #6 │ │ - bne.n 38216 │ │ + bne.n 3851e │ │ mov.w r8, #7 │ │ movs r0, #72 @ 0x48 │ │ ldrd r9, r6, [sp, #28] │ │ ldr r4, [sp, #36] @ 0x24 │ │ - blx d87f0 │ │ - cbz r0, 382aa │ │ + blx d8810 │ │ + cbz r0, 385b2 │ │ ldr r1, [sp, #8] │ │ strb r5, [r0, #20] │ │ str r1, [r0, #16] │ │ str r4, [r0, #12] │ │ str r6, [r0, #8] │ │ str.w r9, [r0, #4] │ │ strb.w r8, [r0] │ │ str.w r0, [fp] │ │ str r7, [sp, #12] │ │ add r0, sp, #12 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #8 │ │ movs r1, #72 @ 0x48 │ │ - bl 3de2a │ │ - ldr r0, [pc, #40] @ (382dc ) │ │ + bl 3e132 │ │ + ldr r0, [pc, #40] @ (385e4 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ movs r0, #1 │ │ movs r1, #33 @ 0x21 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #38 @ 0x26 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r1, r6 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - ldr r6, [sp, #512] @ 0x200 │ │ - vqshrn.u64 d30, q12, #3 │ │ - vcge.s q9, q10, #0 │ │ + ldr r3, [sp, #480] @ 0x1e0 │ │ + vqshlu.s32 d30, d16, #29 │ │ + vqrdmulh.s , , d28[0] │ │ movs r2, r1 │ │ │ │ -000382e0 : │ │ +000385e8 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #68 @ 0x44 │ │ mov r5, r0 │ │ movs r3, #0 │ │ movs r0, #4 │ │ cmp r1, #0 │ │ str r3, [sp, #56] @ 0x38 │ │ strd r3, r0, [sp, #48] @ 0x30 │ │ str r1, [sp, #28] │ │ - beq.w 38bda │ │ + beq.w 38ee2 │ │ mov.w sl, #19 │ │ mov r8, r5 │ │ str r2, [sp, #4] │ │ str r5, [sp, #8] │ │ strd r0, r3, [sp, #12] │ │ ldr r0, [sp, #28] │ │ mov fp, r8 │ │ str.w r8, [sp, #32] │ │ add r0, r8 │ │ str r0, [sp, #44] @ 0x2c │ │ - b.n 38320 │ │ + b.n 38628 │ │ ldr.w fp, [sp, #32] │ │ cmp r5, #0 │ │ - bne.w 38894 │ │ + bne.w 38b9c │ │ movs r0, #0 │ │ movs r7, #1 │ │ str r0, [sp, #40] @ 0x28 │ │ mov lr, sl │ │ movs r0, #0 │ │ mov.w ip, #0 │ │ str r0, [sp, #20] │ │ movs r0, #1 │ │ str r0, [sp, #24] │ │ mov.w r9, #0 │ │ mov r0, sl │ │ - b.n 3834a │ │ + b.n 38652 │ │ movs r0, #1 │ │ str r0, [sp, #40] @ 0x28 │ │ movs r0, #19 │ │ ldr r1, [sp, #44] @ 0x2c │ │ cmp fp, r1 │ │ - beq.w 387aa │ │ + beq.w 38ab2 │ │ mov r4, r9 │ │ mov r9, fp │ │ ldrsb.w r1, [fp], #1 │ │ mov r8, r7 │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ uxtb r6, r1 │ │ - ble.n 3838c │ │ + ble.n 38694 │ │ uxtb r1, r0 │ │ cmp r1, #19 │ │ - bne.w 3846c │ │ + bne.w 38774 │ │ movw r0, #65408 @ 0xff80 │ │ movt r0, #1 │ │ cmp r6, r0 │ │ - bcs.n 383ce │ │ - ldr r0, [pc, #752] @ (38664 ) │ │ + bcs.n 386d6 │ │ + ldr r0, [pc, #752] @ (3896c ) │ │ lsrs r1, r6, #7 │ │ add r0, pc │ │ add.w r2, r0, r1, lsl #1 │ │ ldrh.w r0, [r0, r1, lsl #1] │ │ ldrh r2, [r2, #2] │ │ adds r1, r2, #1 │ │ uxth r1, r1 │ │ cmp r1, r0 │ │ - bcs.n 383dc │ │ - b.w 38b9c │ │ + bcs.n 386e4 │ │ + b.w 38ea4 │ │ ldrb.w r2, [r9, #1] │ │ and.w r1, r6, #31 │ │ cmp r6, #224 @ 0xe0 │ │ and.w r2, r2, #63 @ 0x3f │ │ - bcc.n 3845c │ │ + bcc.n 38764 │ │ ldrb.w r3, [r9, #2] │ │ cmp r6, #240 @ 0xf0 │ │ and.w r3, r3, #63 @ 0x3f │ │ orr.w r2, r3, r2, lsl #6 │ │ - bcc.w 38630 │ │ + bcc.w 38938 │ │ ldrb.w r3, [r9, #3] │ │ and.w r1, r1, #7 │ │ add.w fp, r9, #4 │ │ and.w r3, r3, #63 @ 0x3f │ │ orr.w r2, r3, r2, lsl #6 │ │ orr.w r6, r2, r1, lsl #18 │ │ uxtb r1, r0 │ │ cmp r1, #19 │ │ - beq.n 38364 │ │ - b.n 3846c │ │ + beq.n 3866c │ │ + b.n 38774 │ │ movw r1, #1085 @ 0x43d │ │ movw r0, #1082 @ 0x43a │ │ cmp r1, r0 │ │ - bcc.w 38b9c │ │ + bcc.w 38ea4 │ │ movw r2, #1086 @ 0x43e │ │ cmp r1, r2 │ │ - bcs.w 38b9c │ │ + bcs.w 38ea4 │ │ subs r1, r1, r0 │ │ - beq.n 38482 │ │ - ldr r2, [pc, #656] @ (3867c ) │ │ + beq.n 3878a │ │ + ldr r2, [pc, #656] @ (38984 ) │ │ add.w r0, r0, r0, lsl #1 │ │ mov sl, ip │ │ mov ip, lr │ │ add r2, pc │ │ mov lr, r4 │ │ add.w r7, r2, r0, lsl #2 │ │ movs r0, #0 │ │ cmp r1, #1 │ │ - beq.n 3842a │ │ + beq.n 38732 │ │ mov r2, r1 │ │ add.w r3, r0, r2, lsr #1 │ │ sub.w r2, r2, r2, lsr #1 │ │ add.w r5, r3, r3, lsl #1 │ │ ldr.w r4, [r7, r5, lsl #2] │ │ add.w r5, r7, r5, lsl #2 │ │ ldr r5, [r5, #4] │ │ cmp r4, r6 │ │ it ls │ │ movls r0, r3 │ │ cmp r6, r5 │ │ it hi │ │ movhi r0, r3 │ │ cmp r2, #1 │ │ - bhi.n 38404 │ │ + bhi.n 3870c │ │ add.w r5, r0, r0, lsl #1 │ │ add.w r2, r7, r5, lsl #2 │ │ ldr r3, [r2, #4] │ │ cmp r6, r3 │ │ itt ls │ │ ldrls.w r5, [r7, r5, lsl #2] │ │ cmpls r5, r6 │ │ - bls.n 38494 │ │ + bls.n 3879c │ │ cmp r6, r3 │ │ mov.w r7, #1 │ │ mov r4, lr │ │ it hi │ │ addhi r0, #1 │ │ - cbz r0, 38498 │ │ + cbz r0, 387a0 │ │ subs r0, #1 │ │ mov lr, ip │ │ mov ip, sl │ │ cmp r0, r1 │ │ - bcc.n 3849c │ │ - b.w 38c12 │ │ + bcc.n 387a4 │ │ + b.w 38f1a │ │ orr.w r6, r2, r1, lsl #6 │ │ add.w fp, r9, #2 │ │ uxtb r1, r0 │ │ cmp r1, #19 │ │ - beq.w 38364 │ │ + beq.w 3866c │ │ mov.w lr, #19 │ │ mov r7, r0 │ │ sub.w r0, r4, r9 │ │ add.w r9, r0, fp │ │ movs.w r0, ip, lsl #24 │ │ - bne.n 384aa │ │ - b.n 384c2 │ │ + bne.n 387b2 │ │ + b.n 387ca │ │ movs r7, #1 │ │ sub.w r0, r4, r9 │ │ add.w r9, r0, fp │ │ movs.w r0, ip, lsl #24 │ │ - bne.n 384aa │ │ - b.n 384c2 │ │ + bne.n 387b2 │ │ + b.n 387ca │ │ ldrb r7, [r2, #8] │ │ mov r4, lr │ │ mov lr, ip │ │ mov ip, sl │ │ sub.w r0, r4, r9 │ │ add.w r9, r0, fp │ │ movs.w r0, ip, lsl #24 │ │ - beq.n 384c2 │ │ + beq.n 387ca │ │ uxtb r0, r7 │ │ cmp r0, #18 │ │ - bhi.n 384c2 │ │ + bhi.n 387ca │ │ movs r1, #1 │ │ lsl.w r0, r1, r0 │ │ movs r1, #80 @ 0x50 │ │ movt r1, #4 │ │ tst r0, r1 │ │ - bne.w 3833c │ │ + bne.w 38644 │ │ uxtb.w r0, r8 │ │ cmp r0, #18 │ │ - bne.n 3856e │ │ + bne.n 38876 │ │ movw r0, #65408 @ 0xff80 │ │ movt r0, #1 │ │ cmp r6, r0 │ │ - bcs.n 384ee │ │ - ldr r0, [pc, #424] @ (38680 ) │ │ + bcs.n 387f6 │ │ + ldr r0, [pc, #424] @ (38988 ) │ │ lsrs r2, r6, #7 │ │ add r0, pc │ │ add.w r1, r0, r6, lsr #7 │ │ ldrb r0, [r0, r2] │ │ ldrb r1, [r1, #1] │ │ adds r1, #1 │ │ uxtb r1, r1 │ │ cmp r1, r0 │ │ - bcs.n 384f8 │ │ - b.n 38ba8 │ │ + bcs.n 38800 │ │ + b.n 38eb0 │ │ movs r1, #78 @ 0x4e │ │ movs r0, #77 @ 0x4d │ │ cmp r1, r0 │ │ - bcc.w 38ba8 │ │ + bcc.w 38eb0 │ │ cmp r1, #79 @ 0x4f │ │ - bcs.w 38ba8 │ │ + bcs.w 38eb0 │ │ subs r1, r1, r0 │ │ - beq.n 3856e │ │ - ldr r2, [pc, #384] @ (38684 ) │ │ + beq.n 38876 │ │ + ldr r2, [pc, #384] @ (3898c ) │ │ add.w r0, r0, r0, lsl #1 │ │ mov sl, r7 │ │ mov r8, r4 │ │ add r2, pc │ │ cmp r1, #1 │ │ add.w r5, r2, r0, lsl #2 │ │ mov.w r0, #0 │ │ - beq.n 38542 │ │ + beq.n 3884a │ │ mov r2, r1 │ │ add.w r3, r0, r2, lsr #1 │ │ sub.w r2, r2, r2, lsr #1 │ │ add.w r4, r3, r3, lsl #1 │ │ ldr.w r7, [r5, r4, lsl #2] │ │ add.w r4, r5, r4, lsl #2 │ │ ldr r4, [r4, #4] │ │ cmp r7, r6 │ │ it ls │ │ movls r0, r3 │ │ cmp r6, r4 │ │ it hi │ │ movhi r0, r3 │ │ cmp r2, #1 │ │ - bhi.n 3851c │ │ + bhi.n 38824 │ │ add.w r3, r0, r0, lsl #1 │ │ add.w r2, r5, r3, lsl #2 │ │ ldr r2, [r2, #4] │ │ cmp r6, r2 │ │ itt ls │ │ ldrls.w r3, [r5, r3, lsl #2] │ │ cmpls r3, r6 │ │ - bls.w 38642 │ │ + bls.w 3894a │ │ cmp r6, r2 │ │ mov r4, r8 │ │ mov r7, sl │ │ it hi │ │ addhi r0, #1 │ │ - cbz r0, 3856e │ │ + cbz r0, 38876 │ │ subs r0, #1 │ │ cmp r0, r1 │ │ - bcs.w 38c1a │ │ + bcs.w 38f22 │ │ uxtb.w r0, ip │ │ cmp r0, #0 │ │ - bne.n 385da │ │ + bne.n 388e2 │ │ uxtb r0, r7 │ │ cmp r0, #18 │ │ - bhi.n 385a6 │ │ + bhi.n 388ae │ │ tbh [pc, r0, lsl #1] │ │ lsls r0, r0, #4 │ │ movs r3, r2 │ │ lsls r7, r4, #4 │ │ movs r3, r2 │ │ movs r3, r2 │ │ lsls r2, r0, #3 │ │ @@ -23929,43 +24123,43 @@ │ │ lsls r2, r1, #3 │ │ lsls r7, r3, #3 │ │ movs r3, r2 │ │ lsls r4, r4, #3 │ │ lsls r4, r3, #3 │ │ ldrd r1, r0, [sp, #28] │ │ mov r2, r4 │ │ - bl 2345c │ │ + bl 23490 │ │ uxtb.w lr, r0 │ │ cmp.w lr, #18 │ │ - bhi.w 387e0 │ │ + bhi.w 38ae8 │ │ movs r0, #1 │ │ movs r1, #80 @ 0x50 │ │ lsl.w r0, r0, lr │ │ movt r1, #4 │ │ tst r0, r1 │ │ - beq.w 387e0 │ │ + beq.w 38ae8 │ │ movs r0, #1 │ │ mov.w ip, #7 │ │ str r0, [sp, #36] @ 0x24 │ │ mov r0, lr │ │ - b.n 38342 │ │ + b.n 3864a │ │ subs r1, r0, #1 │ │ ldr r3, [sp, #36] @ 0x24 │ │ tbb [pc, r1] │ │ lsrs r0, r1, #32 │ │ ldrb r6, [r6, #0] │ │ ldr r6, [r7, #36] @ 0x24 │ │ lsls r4, r3, #22 │ │ ldrh r5, [r0, r4] │ │ mov r5, r4 │ │ mov sl, r7 │ │ - b.n 38316 │ │ + b.n 3861e │ │ uxtb r1, r7 │ │ cmp r1, #16 │ │ - bhi.n 385ec │ │ + bhi.n 388f4 │ │ mov.w ip, #1 │ │ mov r5, r4 │ │ mov sl, r7 │ │ tbh [pc, r1, lsl #1] │ │ lsls r6, r1, #3 │ │ movs r1, r2 │ │ movs r1, r2 │ │ @@ -23979,295 +24173,295 @@ │ │ movs r2, r2 │ │ movs r1, r2 │ │ movs r2, r2 │ │ movs r1, r2 │ │ lsls r0, r1, #2 │ │ movs r1, r2 │ │ lsls r0, r6, #2 │ │ - b.n 38316 │ │ + b.n 3861e │ │ mov.w ip, #7 │ │ movs r0, #2 │ │ - b.n 38690 │ │ + b.n 38998 │ │ orr.w r6, r2, r1, lsl #12 │ │ add.w fp, r9, #3 │ │ uxtb r1, r0 │ │ cmp r1, #19 │ │ - beq.w 38364 │ │ - b.n 3846c │ │ + beq.w 3866c │ │ + b.n 38774 │ │ mov.w ip, #9 │ │ movs r0, #19 │ │ mov r4, r8 │ │ mov r7, sl │ │ - b.n 38342 │ │ + b.n 3864a │ │ uxtb r0, r7 │ │ cmp r0, #16 │ │ - bhi.n 385ec │ │ + bhi.n 388f4 │ │ addw r1, pc, #16 │ │ mov.w ip, #1 │ │ mov r5, r4 │ │ mov sl, r7 │ │ tbb [r1, r0] │ │ - asrs r6, r0, #5 │ │ + lsrs r6, r7, #24 │ │ vrshr.u64 d17, d14, #2 │ │ asrs r2, r2, #8 │ │ str r2, [r2, r0] │ │ strb r2, [r2, r4] │ │ asrs r2, r2, #8 │ │ asrs r2, r2, #12 │ │ asrs r3, r2, #8 │ │ asrs r0, r3, #9 │ │ movs r3, r2 │ │ nop │ │ - adds r0, r1, r3 │ │ - @ instruction: 0xfffe4abe │ │ - @ instruction: 0xfffe4e8c │ │ + asrs r0, r0, #23 │ │ + vqshl.u64 d20, d22, #62 @ 0x3e │ │ + vtbl.8 d20, {d30- q15, d14, d5[0] │ │ mov.w ip, #7 │ │ movs r0, #5 │ │ str r0, [sp, #36] @ 0x24 │ │ strd r4, r7, [sp, #20] │ │ - b.n 387a0 │ │ + b.n 38aa8 │ │ uxtb r0, r7 │ │ subs r0, #17 │ │ it ne │ │ movne r0, #1 │ │ ldr r1, [sp, #40] @ 0x28 │ │ orrs r0, r1 │ │ lsls r0, r0, #31 │ │ - bne.w 385ec │ │ + bne.w 388f4 │ │ movs r0, #0 │ │ mov.w ip, #10 │ │ str r0, [sp, #40] @ 0x28 │ │ movs r7, #17 │ │ - b.n 387a0 │ │ + b.n 38aa8 │ │ uxtb r0, r3 │ │ cmp r0, #0 │ │ - bne.w 38856 │ │ + bne.w 38b5e │ │ uxtb r0, r7 │ │ cmp r0, #15 │ │ - bne.w 385ec │ │ + bne.w 388f4 │ │ movs r0, #1 │ │ mov.w ip, #6 │ │ str r0, [sp, #36] @ 0x24 │ │ movs r7, #15 │ │ - b.n 387a0 │ │ + b.n 38aa8 │ │ uxtb r0, r7 │ │ cmp r0, #5 │ │ - beq.n 38704 │ │ + beq.n 38a0c │ │ cmp r0, #8 │ │ - beq.n 38708 │ │ - b.n 385ec │ │ + beq.n 38a10 │ │ + b.n 388f4 │ │ uxtb r0, r7 │ │ cmp r0, #14 │ │ - bhi.w 385ec │ │ + bhi.w 388f4 │ │ mov.w ip, #1 │ │ mov r5, r4 │ │ mov sl, r7 │ │ tbb [pc, r0] │ │ lsrs r7, r2, #1 │ │ lsrs r0, r1, #32 │ │ lsrs r0, r1, #4 │ │ lsrs r0, r1, #24 │ │ lsrs r3, r1, #32 │ │ lsrs r0, r1, #32 │ │ lsrs r0, r1, #32 │ │ movs r1, r2 │ │ - b.n 38316 │ │ + b.n 3861e │ │ mov ip, r7 │ │ - b.n 387a0 │ │ + b.n 38aa8 │ │ mov.w ip, #4 │ │ - b.n 387a0 │ │ + b.n 38aa8 │ │ mov.w ip, #2 │ │ - b.n 387a0 │ │ + b.n 38aa8 │ │ mov.w ip, #3 │ │ - b.n 387a0 │ │ + b.n 38aa8 │ │ uxtb r0, r3 │ │ mov.w sl, #19 │ │ mov r5, r4 │ │ tbb [pc, r0] │ │ lsls r5, r3, #13 │ │ adds r0, #4 │ │ adds r7, #40 @ 0x28 │ │ - b.n 38316 │ │ + b.n 3861e │ │ uxtb r0, r7 │ │ - cbz r0, 38780 │ │ + cbz r0, 38a88 │ │ cmp r0, #7 │ │ - beq.n 3878c │ │ - b.n 38882 │ │ + beq.n 38a94 │ │ + b.n 38b8a │ │ mov.w ip, #8 │ │ - b.n 387a0 │ │ + b.n 38aa8 │ │ movs r0, #0 │ │ mov.w ip, #6 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n 387a0 │ │ + b.n 38aa8 │ │ mov.w ip, #10 │ │ - b.n 387a0 │ │ + b.n 38aa8 │ │ movs r7, #3 │ │ cmp r0, #2 │ │ - bne.w 38888 │ │ + bne.w 38b90 │ │ movs r0, #3 │ │ mov.w ip, #7 │ │ strd r4, r0, [sp, #20] │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n 387a0 │ │ + b.n 38aa8 │ │ cmp r0, #2 │ │ - bne.w 38628 │ │ + bne.w 38930 │ │ movs r0, #4 │ │ mov.w ip, #7 │ │ str r0, [sp, #36] @ 0x24 │ │ movs r7, #16 │ │ - b.n 387a0 │ │ + b.n 38aa8 │ │ uxtb r0, r7 │ │ - cbz r0, 38780 │ │ + cbz r0, 38a88 │ │ cmp r0, #7 │ │ - beq.n 3878c │ │ - b.n 38890 │ │ + beq.n 38a94 │ │ + b.n 38b98 │ │ mov.w ip, #1 │ │ - b.n 387a0 │ │ + b.n 38aa8 │ │ uxtb r0, r7 │ │ cmp r0, #7 │ │ - bne.n 38882 │ │ + bne.n 38b8a │ │ mov.w ip, #2 │ │ movs r7, #7 │ │ - b.n 387a0 │ │ + b.n 38aa8 │ │ uxtb r0, r7 │ │ cmp r0, #14 │ │ - bne.n 38882 │ │ + bne.n 38b8a │ │ mov.w ip, #3 │ │ movs r7, #14 │ │ ldr r0, [sp, #44] @ 0x2c │ │ cmp fp, r0 │ │ - beq.n 387aa │ │ + beq.n 38ab2 │ │ mov r0, lr │ │ - b.n 3834a │ │ + b.n 38652 │ │ uxtb.w r0, ip │ │ cmp r0, #7 │ │ - bne.n 387e0 │ │ + bne.n 38ae8 │ │ ldr r0, [sp, #36] @ 0x24 │ │ uxtb r0, r0 │ │ cmp r0, #5 │ │ - bhi.n 387e0 │ │ + bhi.n 38ae8 │ │ ldrd r5, sl, [sp, #20] │ │ movs r1, #1 │ │ lsl.w r0, r1, r0 │ │ tst.w r0, #44 @ 0x2c │ │ - bne.w 38316 │ │ - b.n 387e0 │ │ + bne.w 3861e │ │ + b.n 38ae8 │ │ ldrd r1, r0, [sp, #28] │ │ mov r2, r4 │ │ - bl 2345c │ │ + bl 23490 │ │ uxtb r0, r0 │ │ cmp r0, #9 │ │ it eq │ │ addeq r4, #1 │ │ ldr r1, [sp, #32] │ │ - cbz r4, 387f8 │ │ + cbz r4, 38b00 │ │ ldr r0, [sp, #28] │ │ cmp r4, r0 │ │ - bcs.n 387f4 │ │ + bcs.n 38afc │ │ ldrsb r0, [r1, r4] │ │ cmn.w r0, #64 @ 0x40 │ │ - bge.n 387f8 │ │ - b.n 38c2a │ │ - bne.w 38c2a │ │ + bge.n 38b00 │ │ + b.n 38f32 │ │ + bne.w 38f32 │ │ ldr r0, [sp, #28] │ │ cmp r4, r0 │ │ - beq.w 38c22 │ │ + beq.w 38f2a │ │ adds r0, r1, r4 │ │ ldrsb.w r1, [r0] │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ - ble.n 38816 │ │ + ble.n 38b1e │ │ movs r0, #1 │ │ adds r5, r0, r4 │ │ mov.w sl, #19 │ │ - b.n 38316 │ │ + b.n 3861e │ │ ldrb r3, [r0, #1] │ │ uxtb r2, r1 │ │ and.w r1, r2, #31 │ │ cmp r2, #224 @ 0xe0 │ │ and.w r3, r3, #63 @ 0x3f │ │ - bcc.n 3884c │ │ + bcc.n 38b54 │ │ ldrb r7, [r0, #2] │ │ cmp r2, #240 @ 0xf0 │ │ and.w r7, r7, #63 @ 0x3f │ │ orr.w r3, r7, r3, lsl #6 │ │ - bcc.n 38862 │ │ + bcc.n 38b6a │ │ ldrb r0, [r0, #3] │ │ and.w r1, r1, #7 │ │ and.w r0, r0, #63 @ 0x3f │ │ orr.w r0, r0, r3, lsl #6 │ │ orr.w r0, r0, r1, lsl #18 │ │ cmp r0, #128 @ 0x80 │ │ - bcc.n 3880c │ │ - b.n 3886a │ │ + bcc.n 38b14 │ │ + b.n 38b72 │ │ orr.w r0, r3, r1, lsl #6 │ │ cmp r0, #128 @ 0x80 │ │ - bcc.n 3880c │ │ - b.n 3886a │ │ + bcc.n 38b14 │ │ + b.n 38b72 │ │ mov r5, r4 │ │ mov sl, r7 │ │ cmp r0, #1 │ │ - beq.w 38316 │ │ - b.n 38bf8 │ │ + beq.w 3861e │ │ + b.n 38f00 │ │ orr.w r0, r3, r1, lsl #12 │ │ cmp r0, #128 @ 0x80 │ │ - bcc.n 3880c │ │ + bcc.n 38b14 │ │ cmp.w r0, #2048 @ 0x800 │ │ - bcs.n 38874 │ │ + bcs.n 38b7c │ │ movs r0, #2 │ │ - b.n 3880e │ │ + b.n 38b16 │ │ cmp.w r0, #65536 @ 0x10000 │ │ mov.w r0, #4 │ │ it cc │ │ movcc r0, #3 │ │ - b.n 3880e │ │ + b.n 38b16 │ │ ldrd r5, sl, [sp, #20] │ │ - b.n 38316 │ │ + b.n 3861e │ │ mov r5, r4 │ │ mov.w sl, #3 │ │ - b.n 38316 │ │ + b.n 3861e │ │ mov r5, r4 │ │ - b.n 38316 │ │ + b.n 3861e │ │ ldr r0, [sp, #28] │ │ cmp r0, r5 │ │ - bls.n 388b2 │ │ + bls.n 38bba │ │ ldrsb.w r0, [fp, r5] │ │ movw r9, #833 @ 0x341 │ │ movw lr, #43616 @ 0xaa60 │ │ movt r9, #1 │ │ cmn.w r0, #65 @ 0x41 │ │ - bgt.n 388c2 │ │ - b.n 38c3c │ │ + bgt.n 38bca │ │ + b.n 38f44 │ │ movw r9, #833 @ 0x341 │ │ movw lr, #43616 @ 0xaa60 │ │ movt r9, #1 │ │ - bne.w 38c3c │ │ + bne.w 38f44 │ │ ldr r0, [sp, #28] │ │ add.w r8, fp, r5 │ │ mov ip, fp │ │ subs r0, r0, r5 │ │ str r0, [sp, #28] │ │ - b.n 388e0 │ │ + b.n 38be8 │ │ sub.w r0, r1, #48 @ 0x30 │ │ cmp r0, #10 │ │ - bcc.w 38b52 │ │ + bcc.w 38e5a │ │ cmp ip, r8 │ │ - beq.w 38b48 │ │ + beq.w 38e50 │ │ mov r2, ip │ │ ldrsb.w r3, [ip], #1 │ │ cmp.w r3, #4294967295 @ 0xffffffff │ │ uxtb r1, r3 │ │ - ble.w 38ad6 │ │ + ble.w 38dde │ │ bic.w r2, r1, #32 │ │ subs r2, #65 @ 0x41 │ │ cmp r2, #26 │ │ - bcc.w 38b52 │ │ + bcc.w 38e5a │ │ cmp r1, #128 @ 0x80 │ │ - bcc.n 388d0 │ │ - ldr r2, [pc, #880] @ (38c74 ) │ │ + bcc.n 38bd8 │ │ + ldr r2, [pc, #880] @ (38f7c ) │ │ mov.w r3, #378 @ 0x17a │ │ cmp r1, lr │ │ it cc │ │ movcc r3, #0 │ │ add r2, pc │ │ add.w r7, r3, #189 @ 0xbd │ │ add.w r0, r2, r7, lsl #3 │ │ @@ -24358,19 +24552,19 @@ │ │ movls r3, r0 │ │ cmp r1, r4 │ │ it hi │ │ movhi r3, r0 │ │ add.w r0, r2, r3, lsl #3 │ │ ldr r0, [r0, #4] │ │ cmp r1, r0 │ │ - bhi.n 38a04 │ │ + bhi.n 38d0c │ │ ldr.w r0, [r2, r3, lsl #3] │ │ cmp r0, r1 │ │ - bls.w 38b52 │ │ - ldr r2, [pc, #624] @ (38c78 ) │ │ + bls.w 38e5a │ │ + ldr r2, [pc, #624] @ (38f80 ) │ │ movs r3, #72 @ 0x48 │ │ cmp r1, r9 │ │ it cc │ │ movcc r3, #0 │ │ add r2, pc │ │ add.w r0, r3, #36 @ 0x24 │ │ add.w r4, r2, r0, lsl #3 │ │ @@ -24441,635 +24635,635 @@ │ │ movls r3, r0 │ │ cmp r1, r4 │ │ it hi │ │ movhi r3, r0 │ │ add.w r0, r2, r3, lsl #3 │ │ ldr r0, [r0, #4] │ │ cmp r1, r0 │ │ - bhi.w 388da │ │ + bhi.w 38be2 │ │ ldr.w r0, [r2, r3, lsl #3] │ │ cmp r0, r1 │ │ - bhi.w 388da │ │ - b.n 38b52 │ │ + bhi.w 38be2 │ │ + b.n 38e5a │ │ ldrb r3, [r2, #1] │ │ and.w r0, r1, #31 │ │ cmp r1, #224 @ 0xe0 │ │ and.w r3, r3, #63 @ 0x3f │ │ - bcc.n 38b1c │ │ + bcc.n 38e24 │ │ ldrb r7, [r2, #2] │ │ cmp r1, #240 @ 0xf0 │ │ and.w r7, r7, #63 @ 0x3f │ │ orr.w r3, r7, r3, lsl #6 │ │ - bcc.n 38b32 │ │ + bcc.n 38e3a │ │ ldrb r1, [r2, #3] │ │ and.w r0, r0, #7 │ │ and.w r1, r1, #63 @ 0x3f │ │ orr.w r1, r1, r3, lsl #6 │ │ orr.w r1, r1, r0, lsl #18 │ │ cmp.w r1, #1114112 @ 0x110000 │ │ - beq.n 38b48 │ │ + beq.n 38e50 │ │ add.w ip, r2, #4 │ │ bic.w r2, r1, #32 │ │ subs r2, #65 @ 0x41 │ │ cmp r2, #26 │ │ - bcs.w 388fc │ │ - b.n 38b52 │ │ + bcs.w 38c04 │ │ + b.n 38e5a │ │ orr.w r1, r3, r0, lsl #6 │ │ add.w ip, r2, #2 │ │ bic.w r2, r1, #32 │ │ subs r2, #65 @ 0x41 │ │ cmp r2, #26 │ │ - bcs.w 388fc │ │ - b.n 38b52 │ │ + bcs.w 38c04 │ │ + b.n 38e5a │ │ orr.w r1, r3, r0, lsl #12 │ │ add.w ip, r2, #3 │ │ bic.w r2, r1, #32 │ │ subs r2, #65 @ 0x41 │ │ cmp r2, #26 │ │ - bcs.w 388fc │ │ - b.n 38b52 │ │ + bcs.w 38c04 │ │ + b.n 38e5a │ │ ldr r0, [sp, #28] │ │ cmp r0, #0 │ │ - bne.w 38308 │ │ - b.n 38bb2 │ │ + bne.w 38610 │ │ + b.n 38eba │ │ ldr r2, [sp, #48] @ 0x30 │ │ ldr r3, [sp, #16] │ │ ldr r0, [sp, #12] │ │ cmp r3, r2 │ │ - beq.n 38b82 │ │ + beq.n 38e8a │ │ ldr r1, [sp, #8] │ │ adds r4, r3, #1 │ │ str r4, [sp, #56] @ 0x38 │ │ cmp r4, r2 │ │ sub.w r7, fp, r1 │ │ str.w r7, [r0, r3, lsl #2] │ │ - beq.n 38b90 │ │ + beq.n 38e98 │ │ adds r3, #2 │ │ ldr r1, [sp, #28] │ │ adds r2, r5, r7 │ │ str.w r2, [r0, r4, lsl #2] │ │ cmp r1, #0 │ │ str r3, [sp, #56] @ 0x38 │ │ - bne.w 38304 │ │ - b.n 38bb6 │ │ + bne.w 3860c │ │ + b.n 38ebe │ │ add r0, sp, #48 @ 0x30 │ │ - bl 331fe │ │ + bl 3338a │ │ ldr r3, [sp, #16] │ │ ldrd r2, r0, [sp, #48] @ 0x30 │ │ - b.n 38b5c │ │ + b.n 38e64 │ │ add r0, sp, #48 @ 0x30 │ │ - bl 331fe │ │ + bl 3338a │ │ ldr r3, [sp, #16] │ │ ldr r0, [sp, #52] @ 0x34 │ │ - b.n 38b6e │ │ - ldr r3, [pc, #220] @ (38c7c ) │ │ + b.n 38e76 │ │ + ldr r3, [pc, #220] @ (38f84 ) │ │ movw r2, #1085 @ 0x43d │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #212] @ (38c80 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #212] @ (38f88 ) │ │ movs r2, #78 @ 0x4e │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ ldrd r0, r3, [sp, #12] │ │ ldr r2, [sp, #48] @ 0x30 │ │ cmp r2, r3 │ │ - bls.n 38bd8 │ │ + bls.n 38ee0 │ │ ldr r5, [sp, #4] │ │ - cbz r3, 38be4 │ │ + cbz r3, 38eec │ │ lsls r4, r3, #2 │ │ mov r6, r3 │ │ mov r1, r4 │ │ - blx d8870 │ │ + blx d8880 │ │ mov r3, r6 │ │ mov r2, r5 │ │ - cbnz r0, 38bda │ │ + cbnz r0, 38ee2 │ │ movs r0, #4 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ ldr r2, [sp, #4] │ │ lsrs r1, r3, #1 │ │ str r1, [r2, #0] │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r0, #4 │ │ movs r3, #0 │ │ mov r2, r5 │ │ lsrs r1, r3, #1 │ │ str r1, [r2, #0] │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r1, [pc, #92] @ (38c58 ) │ │ - ldr r0, [pc, #96] @ (38c5c ) │ │ - ldr r2, [pc, #96] @ (38c60 ) │ │ + ldr r1, [pc, #92] @ (38f60 ) │ │ + ldr r0, [pc, #96] @ (38f64 ) │ │ + ldr r2, [pc, #96] @ (38f68 ) │ │ add r1, pc │ │ - ldr r3, [pc, #96] @ (38c64 ) │ │ + ldr r3, [pc, #96] @ (38f6c ) │ │ add r0, pc │ │ add r2, pc │ │ add r3, pc │ │ strd r3, r1, [sp, #60] @ 0x3c │ │ add r1, sp, #60 @ 0x3c │ │ - bl 3fa58 │ │ - ldr r2, [pc, #60] @ (38c50 ) │ │ + bl 3fd60 │ │ + ldr r2, [pc, #60] @ (38f58 ) │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r2, [pc, #56] @ (38c54 ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #56] @ (38f5c ) │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r0, [pc, #72] @ (38c6c ) │ │ + bl 3fd7c │ │ + ldr r0, [pc, #72] @ (38f74 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #60] @ (38c68 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #60] @ (38f70 ) │ │ mov r2, r4 │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, r1 │ │ ldr r1, [sp, #28] │ │ mov r3, r1 │ │ - bl 3fd1c │ │ - ldr r0, [pc, #48] @ (38c70 ) │ │ + bl 40024 │ │ + ldr r0, [pc, #48] @ (38f78 ) │ │ movs r2, #0 │ │ ldr r1, [sp, #28] │ │ mov r3, r5 │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ - bl 3fd1c │ │ + bl 40024 │ │ nop │ │ - adds r5, #116 @ 0x74 │ │ + adds r2, #124 @ 0x7c │ │ movs r2, r1 │ │ - adds r5, #140 @ 0x8c │ │ + adds r2, #148 @ 0x94 │ │ movs r2, r1 │ │ - str r7, [r4, #84] @ 0x54 │ │ + str r3, [r7, #44] @ 0x2c │ │ movs r2, r0 │ │ - cmp r3, #115 @ 0x73 │ │ - vtbx.8 d17, {d13}, d12 │ │ + cmp r0, #91 @ 0x5b │ │ + vsli.32 , q2, #29 │ │ movs r2, r1 │ │ - adds r2, r0, r1 │ │ + asrs r2, r1, #21 │ │ movs r2, r1 │ │ - adds r2, r6, r0 │ │ + asrs r2, r7, #20 │ │ movs r2, r1 │ │ - adds r4, r1, r1 │ │ + asrs r4, r2, #21 │ │ movs r2, r1 │ │ - adds r4, r7, r0 │ │ + asrs r4, r0, #21 │ │ movs r2, r1 │ │ - ldrb r0, [r1, #30] │ │ - vtbl.8 d23, {d13-d15}, d6 │ │ - vsli.64 , q3, #61 @ 0x3d │ │ + ldrb r0, [r0, #18] │ │ + vqshlu.s64 , q15, #61 @ 0x3d │ │ + vrshr.u64 , q7, #3 │ │ movs r2, r1 │ │ - adds r5, #236 @ 0xec │ │ + adds r2, #244 @ 0xf4 │ │ movs r2, r1 │ │ │ │ -00038c84 : │ │ +00038f8c : │ │ push {r4, lr} │ │ mov r4, r0 │ │ ldr r0, [r0, #4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ movs r0, #0 │ │ strd r0, r0, [r4] │ │ pop {r4, pc} │ │ │ │ -00038c9c : │ │ +00038fa4 : │ │ cmp r1, #0 │ │ it eq │ │ bxeq lr │ │ - b.w d870c │ │ + b.w d871c │ │ │ │ -00038ca6 : │ │ +00038fae : │ │ push {r4, lr} │ │ mov r4, r0 │ │ - blx d87e0 │ │ + blx d8800 │ │ movs r2, #0 │ │ adds r1, r0, #1 │ │ strb r2, [r4, #0] │ │ it eq │ │ popeq {r4, pc} │ │ mov r0, r4 │ │ ldmia.w sp!, {r4, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ │ │ -00038cc2 : │ │ +00038fca : │ │ movs r2, #0 │ │ cmp.w r2, r1, lsl #1 │ │ it eq │ │ bxeq lr │ │ - b.w d870c │ │ + b.w d871c │ │ │ │ -00038cd0 : │ │ +00038fd8 : │ │ push {r4, r5, r6, lr} │ │ sub sp, #32 │ │ mov r6, r0 │ │ movs r0, #8 │ │ mov r5, r2 │ │ mov r4, r1 │ │ - blx d87f0 │ │ - cbz r0, 38d18 │ │ - ldr r3, [pc, #60] @ (38d20 ) │ │ + blx d8810 │ │ + cbz r0, 39020 │ │ + ldr r3, [pc, #60] @ (39028 ) │ │ mov r2, r0 │ │ add r0, sp, #16 │ │ mov r1, r4 │ │ add r3, pc │ │ strd r5, r6, [r2] │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #16] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 38d0c │ │ + beq.n 39014 │ │ add r3, sp, #16 │ │ add.w ip, sp, #4 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #0] │ │ mov r0, sp │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #32 │ │ pop {r4, r5, r6, pc} │ │ movs r0, #4 │ │ movs r1, #8 │ │ - bl 3de2a │ │ - asrs r6, r7, #22 │ │ + bl 3e132 │ │ + asrs r6, r0, #11 │ │ movs r2, r1 │ │ │ │ -00038d24 : │ │ +0003902c : │ │ push {r4, r5, r6, lr} │ │ sub sp, #32 │ │ mov r6, r0 │ │ movs r0, #8 │ │ mov r5, r2 │ │ mov r4, r1 │ │ - blx d87f0 │ │ - cbz r0, 38d6c │ │ - ldr r3, [pc, #60] @ (38d74 ) │ │ + blx d8810 │ │ + cbz r0, 39074 │ │ + ldr r3, [pc, #60] @ (3907c ) │ │ mov r2, r0 │ │ add r0, sp, #16 │ │ mov r1, r4 │ │ add r3, pc │ │ strd r5, r6, [r2] │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #16] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 38d60 │ │ + beq.n 39068 │ │ add r3, sp, #16 │ │ add.w ip, sp, #4 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #0] │ │ mov r0, sp │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #32 │ │ pop {r4, r5, r6, pc} │ │ movs r0, #4 │ │ movs r1, #8 │ │ - bl 3de2a │ │ - asrs r2, r7, #18 │ │ + bl 3e132 │ │ + asrs r2, r0, #7 │ │ movs r2, r1 │ │ │ │ -00038d78 : │ │ +00039080 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #44 @ 0x2c │ │ mov r9, r0 │ │ ldr r0, [sp, #84] @ 0x54 │ │ ldr.w r8, [r0, #4] │ │ movw r0, #43691 @ 0xaaab │ │ movt r0, #2730 @ 0xaaa │ │ cmp r8, r0 │ │ - bcc.n 38d96 │ │ - bl 3e03c │ │ + bcc.n 3909e │ │ + bl 3e344 │ │ add.w r0, r8, r8, lsl #1 │ │ mov fp, r3 │ │ mov r7, r2 │ │ str r1, [sp, #4] │ │ lsls r4, r0, #2 │ │ - beq.n 38dbc │ │ + beq.n 390c4 │ │ mov r0, r4 │ │ - blx d87f0 │ │ + blx d8810 │ │ mov sl, r0 │ │ cmp r0, #0 │ │ mov r0, r8 │ │ - beq.n 38e46 │ │ + beq.n 3914e │ │ cmp.w r8, #0 │ │ str r0, [sp, #0] │ │ - bne.n 38dca │ │ - b.n 38dee │ │ + bne.n 390d2 │ │ + b.n 390f6 │ │ mov.w sl, #4 │ │ movs r0, #0 │ │ cmp.w r8, #0 │ │ str r0, [sp, #0] │ │ - beq.n 38dee │ │ + beq.n 390f6 │ │ ldr r4, [sp, #80] @ 0x50 │ │ mov r6, sl │ │ mov r5, r8 │ │ ldr.w r0, [r4], #4 │ │ add.w ip, sp, #24 │ │ ldmia.w r0, {r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ - blx d87c0 │ │ + blx d87d0 │ │ add r2, sp, #24 │ │ subs r5, #1 │ │ ldmia r2, {r0, r1, r2} │ │ stmia r6!, {r0, r1, r2} │ │ - bne.n 38dd0 │ │ + bne.n 390d8 │ │ movs r0, #32 │ │ - blx d87f0 │ │ - cbz r0, 38e3e │ │ - ldr r3, [pc, #88] @ (38e50 ) │ │ + blx d8810 │ │ + cbz r0, 39146 │ │ + ldr r3, [pc, #88] @ (39158 ) │ │ mov r2, r0 │ │ strd r7, fp, [r0] │ │ ldr r0, [sp, #0] │ │ add r3, pc │ │ strd r0, sl, [r2, #8] │ │ ldr r0, [sp, #84] @ 0x54 │ │ ldr r1, [sp, #4] │ │ strd r0, r9, [r2, #20] │ │ add r0, sp, #24 │ │ str.w r8, [r2, #16] │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #24] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 38e30 │ │ + beq.n 39138 │ │ add r3, sp, #24 │ │ add.w ip, sp, #12 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #8] │ │ add r0, sp, #8 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #8 │ │ movs r1, #32 │ │ - bl 3de2a │ │ + bl 3e132 │ │ movs r0, #4 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - asrs r0, r7, #17 │ │ + asrs r0, r0, #6 │ │ movs r2, r1 │ │ │ │ -00038e54 : │ │ +0003915c : │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #48 @ 0x30 │ │ mov r5, r0 │ │ ldr r0, [sp, #72] @ 0x48 │ │ mov r6, r3 │ │ mov r7, r2 │ │ mov r8, r1 │ │ ldmia.w r0, {r1, r2, r3} │ │ stmia.w sp, {r1, r2, r3} │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r0, #32 │ │ - blx d87f0 │ │ - cbz r0, 38ec6 │ │ + blx d8810 │ │ + cbz r0, 391ce │ │ mov r2, r0 │ │ ldrd r1, r0, [sp] │ │ ldr r4, [sp, #8] │ │ - ldr r3, [pc, #76] @ (38ed0 ) │ │ + ldr r3, [pc, #76] @ (391d8 ) │ │ strd r1, r0, [r2, #8] │ │ add.w r0, r2, #16 │ │ ldr.w ip, [sp, #76] @ 0x4c │ │ add r3, pc │ │ stmia.w r0, {r4, r5, ip} │ │ add r0, sp, #32 │ │ mov r1, r8 │ │ strd r7, r6, [r2] │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #32] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 38eb8 │ │ + beq.n 391c0 │ │ add r3, sp, #32 │ │ add.w ip, sp, #20 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #16] │ │ add r0, sp, #16 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #48 @ 0x30 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movs r0, #8 │ │ movs r1, #32 │ │ - bl 3de2a │ │ + bl 3e132 │ │ nop │ │ - asrs r2, r7, #14 │ │ + asrs r2, r0, #3 │ │ movs r2, r1 │ │ │ │ -00038ed4 : │ │ +000391dc : │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #40 @ 0x28 │ │ - ldr r4, [pc, #332] @ (39028 ) │ │ + ldr r4, [pc, #332] @ (39330 ) │ │ add r4, pc │ │ ldr r2, [r4, #40] @ 0x28 │ │ dmb ish │ │ cmp r2, #2 │ │ - bne.n 38f8e │ │ + bne.n 39296 │ │ movs r2, #1 │ │ ldrex r3, [r4, #8] │ │ cmp r3, #0 │ │ - bne.n 38f76 │ │ + bne.n 3927e │ │ strex r3, r2, [r4, #8] │ │ cmp r3, #0 │ │ - bne.n 38eea │ │ + bne.n 391f2 │ │ dmb ish │ │ - ldr r5, [pc, #300] @ (3902c ) │ │ + ldr r5, [pc, #300] @ (39334 ) │ │ add r5, pc │ │ ldr r2, [r5, #4] │ │ lsls r2, r2, #1 │ │ - bne.n 38f9c │ │ + bne.n 392a4 │ │ mov.w r8, #0 │ │ ldrb r2, [r4, #12] │ │ cmp r2, #0 │ │ - bne.n 38fb4 │ │ + bne.n 392bc │ │ ldrd r2, r3, [r4, #20] │ │ add.w r3, r3, r3, lsl #1 │ │ subs r2, #24 │ │ lsls r3, r3, #3 │ │ - cbz r3, 38f4c │ │ + cbz r3, 39254 │ │ ldr.w r7, [r2, #24]! │ │ subs r3, #24 │ │ ldr r6, [r2, #4] │ │ eors r7, r0 │ │ eors r6, r1 │ │ orrs r7, r6 │ │ - bne.n 38f1e │ │ + bne.n 39226 │ │ ldrd r1, r2, [r2, #12] │ │ add r0, sp, #8 │ │ - bl 3ec96 │ │ + bl 3ef9e │ │ ldr r0, [sp, #8] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.n 39000 │ │ + bne.n 39308 │ │ ldr r0, [sp, #12] │ │ cmp.w r8, #0 │ │ - beq.n 38f54 │ │ - b.n 38f5a │ │ + beq.n 3925c │ │ + b.n 39262 │ │ movs r0, #0 │ │ cmp.w r8, #0 │ │ - bne.n 38f5a │ │ + bne.n 39262 │ │ ldr r1, [r5, #4] │ │ lsls r1, r1, #1 │ │ - bne.n 38fec │ │ + bne.n 392f4 │ │ movs r1, #0 │ │ dmb ish │ │ ldrex r2, [r4, #8] │ │ strex r3, r1, [r4, #8] │ │ cmp r3, #0 │ │ - bne.n 38f60 │ │ + bne.n 39268 │ │ cmp r2, #2 │ │ - beq.n 38fd4 │ │ + beq.n 392dc │ │ add sp, #40 @ 0x28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ add.w r2, r4, #8 │ │ mov r5, r0 │ │ clrex │ │ mov r6, r1 │ │ mov r0, r2 │ │ - bl 778fe │ │ + bl 77966 │ │ mov r0, r5 │ │ mov r1, r6 │ │ - b.n 38efe │ │ + b.n 39206 │ │ mov r5, r1 │ │ mov r6, r0 │ │ - bl 365b0 │ │ + bl 368b8 │ │ mov r0, r6 │ │ mov r1, r5 │ │ - b.n 38ee8 │ │ + b.n 391f0 │ │ mov r7, r1 │ │ mov r6, r0 │ │ - bl 7770c │ │ + bl 77774 │ │ mov r2, r0 │ │ eor.w r8, r2, #1 │ │ mov r1, r7 │ │ mov r0, r6 │ │ ldrb r2, [r4, #12] │ │ cmp r2, #0 │ │ - beq.n 38f12 │ │ - ldr r0, [pc, #120] @ (39030 ) │ │ + beq.n 3921a │ │ + ldr r0, [pc, #120] @ (39338 ) │ │ add.w r2, r4, #8 │ │ - ldr r3, [pc, #120] @ (39034 ) │ │ - ldr r1, [pc, #120] @ (39038 ) │ │ + ldr r3, [pc, #120] @ (3933c ) │ │ + ldr r1, [pc, #120] @ (39340 ) │ │ add r0, pc │ │ add r3, pc │ │ strb.w r8, [sp, #28] │ │ add r1, pc │ │ str r2, [sp, #24] │ │ str r1, [sp, #0] │ │ add r2, sp, #24 │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ add.w r1, r4, #8 │ │ mov r4, r0 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ + blx d87e0 │ │ mov r0, r4 │ │ add sp, #40 @ 0x28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ mov r5, r0 │ │ - bl 7770c │ │ + bl 77774 │ │ mov r1, r0 │ │ mov r0, r5 │ │ cmp r1, #0 │ │ itt eq │ │ moveq r1, #1 │ │ strbeq r1, [r4, #12] │ │ - b.n 38f5a │ │ + b.n 39262 │ │ add r7, sp, #8 │ │ ldr r6, [sp, #20] │ │ add.w ip, sp, #24 │ │ ldmia r7, {r1, r2, r7} │ │ - ldr r0, [pc, #48] @ (3903c ) │ │ - ldr r3, [pc, #48] @ (39040 ) │ │ - ldr r4, [pc, #52] @ (39044 ) │ │ + ldr r0, [pc, #48] @ (39344 ) │ │ + ldr r3, [pc, #48] @ (39348 ) │ │ + ldr r4, [pc, #52] @ (3934c ) │ │ add r0, pc │ │ add r3, pc │ │ str r6, [sp, #36] @ 0x24 │ │ add r4, pc │ │ stmia.w ip, {r1, r2, r7} │ │ str r4, [sp, #0] │ │ add r2, sp, #24 │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ nop │ │ - ldr r1, [pc, #768] @ (3932c ) │ │ + mov r8, r9 │ │ movs r2, r1 │ │ - ldr r4, [r2, r2] │ │ + strb r4, [r5, r6] │ │ movs r2, r1 │ │ - lsls r5, r0, #19 │ │ - vtrn. , q12 │ │ + lsls r5, r7, #6 │ │ + @ instruction: 0xfffe0e20 │ │ movs r2, r1 │ │ - asrs r6, r0, #20 │ │ + asrs r6, r1, #8 │ │ movs r2, r1 │ │ - lsls r3, r6, #17 │ │ - vshr.u64 d17, d22, #2 │ │ + lsls r3, r5, #5 │ │ + vqrdmulh.s q8, q15, d30[0] │ │ movs r2, r1 │ │ - asrs r6, r0, #19 │ │ + asrs r6, r1, #7 │ │ movs r2, r1 │ │ │ │ -00039048 : │ │ +00039350 : │ │ push {r4, lr} │ │ orrs.w r1, r2, r3 │ │ - beq.n 390aa │ │ + beq.n 393b2 │ │ movw r1, #31829 @ 0x7c55 │ │ ldr.w lr, [r0] │ │ movt r1, #32586 @ 0x7f4a │ │ mul.w ip, r2, r1 │ │ ldr r1, [r0, #16] │ │ and.w ip, ip, lr │ │ cmp r1, ip │ │ - bls.n 3914c │ │ + bls.n 39454 │ │ ldr r0, [r0, #12] │ │ add.w r1, ip, ip, lsl #1 │ │ add.w r0, r0, r1, lsl #2 │ │ ldrd r0, r1, [r0, #4] │ │ add.w r1, r1, r1, lsl #1 │ │ sub.w r4, r0, #24 │ │ lsls r1, r1, #3 │ │ cmp r1, #0 │ │ - beq.n 3913a │ │ + beq.n 39442 │ │ ldr.w ip, [r4, #24]! │ │ subs r1, #24 │ │ ldr.w lr, [r4, #4] │ │ eor.w ip, ip, r2 │ │ eor.w r0, lr, r3 │ │ orrs.w r0, r0, ip │ │ - bne.n 39082 │ │ + bne.n 3938a │ │ add.w ip, r4, #8 │ │ ldr.w r0, [ip, #8] │ │ - cbnz r0, 390b4 │ │ - b.n 39130 │ │ + cbnz r0, 393bc │ │ + b.n 39438 │ │ add.w ip, r0, #76 @ 0x4c │ │ ldr.w r0, [ip, #8] │ │ - cbz r0, 39130 │ │ + cbz r0, 39438 │ │ ldr.w r1, [ip, #4] │ │ add.w r2, r0, r0, lsl #2 │ │ ldr.w lr, [sp, #8] │ │ adds r1, #28 │ │ lsls r3, r2, #3 │ │ movs r2, #0 │ │ cmp r0, r2 │ │ - beq.n 39142 │ │ + beq.n 3944a │ │ ldr.w r4, [r1], #40 │ │ subs r3, #40 @ 0x28 │ │ str.w r4, [lr, r2, lsl #2] │ │ add.w r2, r2, #1 │ │ - bne.n 390c6 │ │ + bne.n 393ce │ │ ldr.w r1, [ip, #8] │ │ - cbz r1, 39130 │ │ + cbz r1, 39438 │ │ ldr.w r0, [ip, #4] │ │ cmp r1, #1 │ │ - beq.n 3911a │ │ + beq.n 39422 │ │ add.w r1, r1, r1, lsl #2 │ │ movw r2, #52429 @ 0xcccd │ │ movt r2, #52428 @ 0xcccc │ │ add.w ip, r0, #68 @ 0x44 │ │ lsls r1, r1, #3 │ │ subs r1, #40 @ 0x28 │ │ mov r3, ip │ │ @@ -25079,361 +25273,361 @@ │ │ ldr.w r4, [r3], #40 │ │ cmp r2, r4 │ │ itt ls │ │ movls r2, r4 │ │ subls.w r0, ip, #28 │ │ subs r1, #1 │ │ mov ip, r3 │ │ - bne.n 39104 │ │ - cbz r0, 39130 │ │ + bne.n 3940c │ │ + cbz r0, 39438 │ │ ldrb.w r1, [r0, #32] │ │ ldr r0, [r0, #28] │ │ cmp r1, #5 │ │ - bhi.n 39134 │ │ - ldr r2, [pc, #52] @ (3915c ) │ │ + bhi.n 3943c │ │ + ldr r2, [pc, #52] @ (39464 ) │ │ add r2, pc │ │ ldr.w r1, [r2, r1, lsl #2] │ │ add r0, r1 │ │ pop {r4, pc} │ │ movs r0, #2 │ │ pop {r4, pc} │ │ movs r1, #3 │ │ add r0, r1 │ │ pop {r4, pc} │ │ - ldr r0, [pc, #28] @ (39158 ) │ │ + ldr r0, [pc, #28] @ (39460 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r2, [pc, #28] @ (39160 ) │ │ + bl 3fd40 │ │ + ldr r2, [pc, #28] @ (39468 ) │ │ mov r1, r0 │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r2, [pc, #20] @ (39164 ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #20] @ (3946c ) │ │ mov r0, ip │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ nop │ │ - asrs r0, r6, #14 │ │ + asrs r0, r7, #2 │ │ movs r2, r1 │ │ - str r0, [sp, #56] @ 0x38 │ │ - vrsra.u64 d17, d22, #3 │ │ + ldrh r6, [r0, #40] @ 0x28 │ │ + vshr.u64 d17, d30, #3 │ │ movs r2, r1 │ │ - adds r4, r3, r5 │ │ + asrs r4, r4, #25 │ │ movs r2, r1 │ │ │ │ -00039168 : │ │ +00039470 : │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #36 @ 0x24 │ │ mov r7, r0 │ │ movs r0, #12 │ │ mov r6, r3 │ │ mov r5, r2 │ │ mov r4, r1 │ │ - blx d87f0 │ │ - cbz r0, 391b8 │ │ - ldr r3, [pc, #64] @ (391c0 ) │ │ + blx d8810 │ │ + cbz r0, 394c0 │ │ + ldr r3, [pc, #64] @ (394c8 ) │ │ mov r2, r0 │ │ ldr r0, [sp, #56] @ 0x38 │ │ mov r1, r4 │ │ strd r0, r7, [r2] │ │ add r3, pc │ │ add r0, sp, #16 │ │ strb r6, [r2, #9] │ │ strb r5, [r2, #8] │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #16] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 391ac │ │ + beq.n 394b4 │ │ add r3, sp, #16 │ │ add.w ip, sp, #4 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #0] │ │ mov r0, sp │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #36 @ 0x24 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #4 │ │ movs r1, #12 │ │ - bl 3de2a │ │ - asrs r0, r2, #2 │ │ + bl 3e132 │ │ + lsrs r0, r3, #22 │ │ movs r2, r1 │ │ │ │ -000391c4 : │ │ +000394cc : │ │ subs r0, #8 │ │ movs r1, #0 │ │ - b.w 61b30 │ │ + b.w 61c18 │ │ │ │ -000391cc : │ │ +000394d4 : │ │ subs r0, #8 │ │ movs r1, #1 │ │ - b.w 61b30 │ │ + b.w 61c18 │ │ │ │ -000391d4 : │ │ +000394dc : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ sub sp, #16 │ │ - ldr r4, [pc, #284] @ (392f8 ) │ │ + ldr r4, [pc, #284] @ (39600 ) │ │ mov r9, r0 │ │ mov r8, r3 │ │ mov r7, r2 │ │ add r4, pc │ │ mov sl, r1 │ │ ldr r0, [r4, #24] │ │ dmb ish │ │ cmp r0, #2 │ │ it ne │ │ - blne 3661c │ │ + blne 368ec │ │ movs r0, #1 │ │ ldrex r1, [r4, #4] │ │ cmp r1, #0 │ │ - bne.n 3928e │ │ + bne.n 39596 │ │ strex r1, r0, [r4, #4] │ │ cmp r1, #0 │ │ - bne.n 391f6 │ │ + bne.n 394fe │ │ dmb ish │ │ - ldr r5, [pc, #240] @ (392fc ) │ │ + ldr r5, [pc, #240] @ (39604 ) │ │ add r5, pc │ │ ldr r0, [r5, #4] │ │ lsls r0, r0, #1 │ │ - bne.n 3929a │ │ + bne.n 395a2 │ │ movs r6, #0 │ │ ldrb r0, [r4, #8] │ │ cmp r0, #0 │ │ - bne.n 392a8 │ │ + bne.n 395b0 │ │ ldr r0, [r4, #20] │ │ dmb ish │ │ adds r0, #60 @ 0x3c │ │ ldrex r1, [r0] │ │ adds r1, #1 │ │ strex r2, r1, [r0] │ │ cmp r2, #0 │ │ - bne.n 39224 │ │ + bne.n 3952c │ │ movs r0, #16 │ │ dmb ish │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 392c6 │ │ - ldr r3, [pc, #188] @ (39300 ) │ │ + beq.n 395ce │ │ + ldr r3, [pc, #188] @ (39608 ) │ │ mov r2, r0 │ │ ldrd r0, r1, [r4, #12] │ │ add r3, pc │ │ stmia.w r2, {r7, r8, sl} │ │ str.w r9, [r2, #12] │ │ - bl 24220 │ │ - cbnz r0, 392ce │ │ - cbnz r6, 39260 │ │ + bl 24254 │ │ + cbnz r0, 395d6 │ │ + cbnz r6, 39568 │ │ ldr r0, [r5, #4] │ │ lsls r0, r0, #1 │ │ - bne.n 392ea │ │ + bne.n 395f2 │ │ movs r0, #0 │ │ dmb ish │ │ ldrex r1, [r4, #4] │ │ strex r2, r0, [r4, #4] │ │ cmp r2, #0 │ │ - bne.n 39266 │ │ + bne.n 3956e │ │ cmp r1, #2 │ │ itt ne │ │ addne sp, #16 │ │ ldmiane.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ adds r1, r4, #4 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ - b.w d8700 │ │ + b.w d8710 │ │ adds r0, r4, #4 │ │ clrex │ │ - bl 778fe │ │ - b.n 3920a │ │ - bl 7770c │ │ + bl 77966 │ │ + b.n 39512 │ │ + bl 77774 │ │ eor.w r6, r0, #1 │ │ ldrb r0, [r4, #8] │ │ cmp r0, #0 │ │ - beq.n 3921c │ │ - ldr r0, [pc, #88] @ (39304 ) │ │ + beq.n 39524 │ │ + ldr r0, [pc, #88] @ (3960c ) │ │ adds r2, r4, #4 │ │ - ldr r3, [pc, #88] @ (39308 ) │ │ - ldr r1, [pc, #92] @ (3930c ) │ │ + ldr r3, [pc, #88] @ (39610 ) │ │ + ldr r1, [pc, #92] @ (39614 ) │ │ add r0, pc │ │ str r2, [sp, #8] │ │ add r3, pc │ │ add r1, pc │ │ add r2, sp, #8 │ │ strb.w r6, [sp, #12] │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ movs r0, #8 │ │ movs r1, #16 │ │ - bl 3de2a │ │ - ldr r4, [pc, #64] @ (39310 ) │ │ - ldr r3, [pc, #64] @ (39314 ) │ │ - ldr r2, [pc, #68] @ (39318 ) │ │ + bl 3e132 │ │ + ldr r4, [pc, #64] @ (39618 ) │ │ + ldr r3, [pc, #64] @ (3961c ) │ │ + ldr r2, [pc, #68] @ (39620 ) │ │ add r4, pc │ │ strd r0, r1, [sp, #8] │ │ add r3, pc │ │ add r2, pc │ │ str r2, [sp, #0] │ │ add r2, sp, #8 │ │ mov r0, r4 │ │ movs r1, #50 @ 0x32 │ │ - bl 414b0 │ │ - bl 7770c │ │ + bl 417b8 │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq r0, [r4, #8] │ │ - b.n 39260 │ │ - mov sl, r3 │ │ + b.n 39568 │ │ + bics r2, r4 │ │ movs r2, r1 │ │ - strb r0, [r1, r6] │ │ + strh r0, [r4, r2] │ │ movs r2, r1 │ │ - lsrs r0, r7, #19 │ │ + lsrs r0, r6, #7 │ │ movs r2, r1 │ │ - lsls r3, r2, #7 │ │ - vcvt.f32.u32 d16, d20, #2 │ │ + mcr2 15, 6, pc, cr11, cr13, {7} @ │ │ + lsrs r4, r3, #13 │ │ movs r2, r1 │ │ - lsrs r2, r6, #27 │ │ + lsrs r2, r7, #15 │ │ movs r2, r1 │ │ - mcr 15, 3, pc, cr8, cr12, {7} @ │ │ - lsrs r6, r7, #22 │ │ + @ instruction: 0xeb60fffc │ │ + lsrs r6, r6, #10 │ │ movs r2, r1 │ │ - lsrs r4, r0, #17 │ │ + lsrs r4, r1, #5 │ │ movs r2, r1 │ │ │ │ -0003931c : │ │ +00039624 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #324 @ 0x144 │ │ cmp r1, #0 │ │ - beq.w 39eea │ │ + beq.w 3a1f2 │ │ mov r9, r0 │ │ mov r0, r1 │ │ mov r4, r3 │ │ mov r7, r2 │ │ mov r5, r1 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #136 @ 0x88 │ │ mov r1, r5 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #136] @ 0x88 │ │ cmp r0, #1 │ │ - beq.w 39ef2 │ │ + beq.w 3a1fa │ │ ldrd fp, r5, [sp, #140] @ 0x8c │ │ cmp r7, #0 │ │ - beq.w 39590 │ │ + beq.w 39898 │ │ mov r0, r7 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #136 @ 0x88 │ │ mov r1, r7 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #136] @ 0x88 │ │ cmp r0, #1 │ │ - beq.w 39f3a │ │ + beq.w 3a242 │ │ ldrd r8, r6, [sp, #140] @ 0x8c │ │ cmp r4, #0 │ │ - beq.w 3959a │ │ + beq.w 398a2 │ │ mov r0, r4 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #136 @ 0x88 │ │ mov r1, r4 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #136] @ 0x88 │ │ cmp r0, #1 │ │ - beq.w 39f16 │ │ + beq.w 3a21e │ │ ldrd r0, r1, [sp, #140] @ 0x8c │ │ add r3, sp, #148 @ 0x94 │ │ movs r2, #0 │ │ stmia r3!, {r0, r1, r2} │ │ movs r0, #128 @ 0x80 │ │ add r1, sp, #136 @ 0x88 │ │ strb.w r0, [sp, #160] @ 0xa0 │ │ movs r0, #1 │ │ strd r2, r0, [sp, #136] @ 0x88 │ │ add r0, sp, #120 @ 0x78 │ │ str r2, [sp, #144] @ 0x90 │ │ - bl 5bfe8 │ │ + bl 5c1f8 │ │ ldr r7, [sp, #120] @ 0x78 │ │ cmp.w r7, #2147483648 @ 0x80000000 │ │ - bne.n 39406 │ │ + bne.n 3970e │ │ ldr r0, [sp, #136] @ 0x88 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #140] @ 0x8c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ movs r0, #33 @ 0x21 │ │ movs r6, #33 @ 0x21 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 39f44 │ │ - ldr r1, [pc, #544] @ (395f0 ) │ │ + beq.w 3a24c │ │ + ldr r1, [pc, #544] @ (398f8 ) │ │ movs r2, #33 @ 0x21 │ │ mov r5, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r4, [sp, #124] @ 0x7c │ │ movs r1, #10 │ │ movt r1, #32768 @ 0x8000 │ │ adds r7, r1, #4 │ │ str r6, [sp, #252] @ 0xfc │ │ ldr r0, [r4, #0] │ │ strd r6, r5, [sp, #244] @ 0xf4 │ │ cmp r0, #1 │ │ str r7, [sp, #240] @ 0xf0 │ │ - beq.w 395a2 │ │ + beq.w 398aa │ │ cmp r0, #0 │ │ - bne.w 395ca │ │ + bne.w 398d2 │ │ ldr r0, [r4, #8] │ │ cmp r0, #0 │ │ - beq.w 395ca │ │ + beq.w 398d2 │ │ ldr r5, [r4, #4] │ │ - b.n 395c4 │ │ + b.n 398cc │ │ ldrd r1, r2, [sp, #152] @ 0x98 │ │ str r6, [sp, #60] @ 0x3c │ │ cmp r2, r1 │ │ str r5, [sp, #68] @ 0x44 │ │ - bcs.n 3943c │ │ + bcs.n 39744 │ │ ldrd sl, r4, [sp, #124] @ 0x7c │ │ movs r5, #19 │ │ ldr r0, [sp, #148] @ 0x94 │ │ movs r3, #1 │ │ movt r5, #128 @ 0x80 │ │ ldrb r6, [r0, r2] │ │ subs r6, #9 │ │ cmp r6, #23 │ │ - bhi.w 39e1a │ │ + bhi.w 3a122 │ │ lsl.w r6, r3, r6 │ │ tst r6, r5 │ │ - beq.w 39e1a │ │ + beq.w 3a122 │ │ adds r2, #1 │ │ str r2, [sp, #156] @ 0x9c │ │ cmp r1, r2 │ │ - bne.n 39420 │ │ + bne.n 39728 │ │ ldr r0, [sp, #136] @ 0x88 │ │ str.w r8, [sp, #64] @ 0x40 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #140] @ 0x8c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add r0, sp, #240 @ 0xf0 │ │ add r1, sp, #120 @ 0x78 │ │ - bl 5b0d0 │ │ + bl 5b2e0 │ │ ldrd r7, r0, [sp, #240] @ 0xf0 │ │ add r3, sp, #72 @ 0x48 │ │ ldrd r1, r2, [sp, #248] @ 0xf8 │ │ stmia r3!, {r0, r1, r2} │ │ movs r0, #10 │ │ movt r0, #32768 @ 0x8000 │ │ add.w r8, r0, #7 │ │ cmp r7, r8 │ │ - bne.w 395d8 │ │ + bne.w 398e0 │ │ add r2, sp, #72 @ 0x48 │ │ vldr d16, [sp, #384] @ 0x180 │ │ add r3, sp, #120 @ 0x78 │ │ ldmia r2, {r0, r1, r2} │ │ vcmp.f64 d16, d16 │ │ stmia r3!, {r0, r1, r2} │ │ movs r0, #0 │ │ @@ -25444,45 +25638,45 @@ │ │ strdvc r1, r0, [sp, #104] @ 0x68 │ │ strdvc r2, r0, [sp, #96] @ 0x60 │ │ ittt vc │ │ vstrvc d16, [sp, #112] @ 0x70 │ │ movvc r1, #0 │ │ movvc r0, #1 │ │ ldr.w sl, [sp, #68] @ 0x44 │ │ - ldr r5, [pc, #332] @ (395f4 ) │ │ + ldr r5, [pc, #332] @ (398fc ) │ │ strd r0, r1, [sp, #88] @ 0x58 │ │ add r5, pc │ │ ldr r0, [r5, #56] @ 0x38 │ │ dmb ish │ │ cmp r0, #2 │ │ it ne │ │ - blne 61434 │ │ + blne 6151c │ │ ldrex r0, [r5, #8] │ │ cmp r0, #0 │ │ - bne.w 39cfa │ │ + bne.w 3a002 │ │ mvn.w r0, #3221225472 @ 0xc0000000 │ │ strex r1, r0, [r5, #8] │ │ cmp r1, #0 │ │ - bne.w 39cfe │ │ + bne.w 3a006 │ │ dmb ish │ │ - ldr r4, [pc, #288] @ (395f8 ) │ │ + ldr r4, [pc, #288] @ (39900 ) │ │ add r4, pc │ │ ldr r0, [r4, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 39e7e │ │ + bne.w 3a186 │ │ movs r2, #0 │ │ ldrb r0, [r5, #16] │ │ cmp r0, #0 │ │ - bne.w 39e8e │ │ + bne.w 3a196 │ │ cmp.w sl, #17 │ │ str r2, [sp, #56] @ 0x38 │ │ strd fp, r4, [sp, #48] @ 0x30 │ │ - bcs.w 39600 │ │ + bcs.w 39908 │ │ cmp.w sl, #8 │ │ - bls.w 399ba │ │ + bls.w 39cc2 │ │ movw r3, #14777 @ 0x39b9 │ │ add.w r2, fp, sl │ │ ldr.w r0, [fp] │ │ movt r3, #59970 @ 0xea42 │ │ ldr.w r7, [r2, #-8] │ │ movw r4, #48187 @ 0xbc3b │ │ eors r0, r3 │ │ @@ -25517,75 +25711,75 @@ │ │ eor.w r6, r4, lr │ │ adds r1, r1, r6 │ │ movt r2, #40503 @ 0x9e37 │ │ adcs r0, r7 │ │ movw r6, #26513 @ 0x6791 │ │ movt r6, #5718 @ 0x1656 │ │ eor.w r1, r1, r0, lsr #5 │ │ - b.n 39aca │ │ + b.n 39dd2 │ │ mov.w r8, #0 │ │ cmp r4, #0 │ │ - bne.w 39374 │ │ - ldr r0, [pc, #96] @ (395fc ) │ │ + bne.w 3967c │ │ + ldr r0, [pc, #96] @ (39904 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ ldrb r0, [r4, #4] │ │ cmp r0, #3 │ │ - bne.n 395ca │ │ + bne.n 398d2 │ │ ldr r5, [r4, #8] │ │ ldrd r8, r6, [r5] │ │ ldr r1, [r6, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r8 │ │ blxne r1 │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add r2, sp, #244 @ 0xf4 │ │ add r3, sp, #72 @ 0x48 │ │ ldmia r2, {r0, r1, r2} │ │ stmia r3!, {r0, r1, r2} │ │ add r2, sp, #72 @ 0x48 │ │ ldmia r2, {r0, r1, r2} │ │ strd r1, r2, [sp, #144] @ 0x90 │ │ strd r7, r0, [sp, #136] @ 0x88 │ │ add r0, sp, #136 @ 0x88 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #324 @ 0x144 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - bvc.n 395c4 │ │ - vsri.32 d20, d18, #3 │ │ + bmi.n 398bc │ │ + vsra.u32 d20, d26, #3 │ │ movs r2, r1 │ │ - strh r4, [r7, r2] │ │ + ldr r7, [pc, #848] @ (39c54 ) │ │ movs r2, r1 │ │ - lsrs r4, r1, #25 │ │ + lsrs r4, r2, #13 │ │ movs r2, r1 │ │ cmp.w sl, #129 @ 0x81 │ │ - bcs.w 39a48 │ │ + bcs.w 39d50 │ │ movw r0, #51847 @ 0xca87 │ │ movw r1, #31153 @ 0x79b1 │ │ movt r0, #34283 @ 0x85eb │ │ movt r1, #40503 @ 0x9e37 │ │ umull r3, r0, sl, r0 │ │ cmp.w sl, #33 @ 0x21 │ │ mla r0, sl, r1, r0 │ │ strd r3, r8, [sp, #40] @ 0x28 │ │ strd r9, r0, [sp, #32] │ │ - bcc.w 398d6 │ │ + bcc.w 39bde │ │ cmp.w sl, #64 @ 0x40 │ │ - bls.w 397f2 │ │ + bls.w 39afa │ │ cmp.w sl, #96 @ 0x60 │ │ - bls.n 39718 │ │ + bls.n 39a20 │ │ add.w r0, fp, sl │ │ movw r7, #20874 @ 0x518a │ │ movt r7, #19424 @ 0x4be0 │ │ movw r4, #30937 @ 0x78d9 │ │ ldr.w r1, [r0, #-64] │ │ movt r4, #25715 @ 0x6473 │ │ ldr.w r2, [r0, #-56] │ │ @@ -25835,17 +26029,17 @@ │ │ ldr r3, [sp, #36] @ 0x24 │ │ movt r6, #5718 @ 0x1656 │ │ adcs r1, r3 │ │ eor.w r3, r7, lr │ │ adds r2, r2, r3 │ │ adcs r0, r1 │ │ eor.w r1, r2, r0, lsr #5 │ │ - b.n 39ac2 │ │ + b.n 39dca │ │ cmp.w sl, #3 │ │ - bls.n 39a62 │ │ + bls.n 39d6a │ │ add.w r0, fp, sl │ │ movw r2, #45428 @ 0xb174 │ │ ldr.w r1, [fp] │ │ movt r2, #51002 @ 0xc73a │ │ ldr.w r0, [r0, #-4] │ │ movw ip, #7269 @ 0x1c65 │ │ eors r1, r2 │ │ @@ -25878,28 +26072,28 @@ │ │ adc.w r7, r6, #0 │ │ eors r0, r7 │ │ mla r0, r0, r3, r1 │ │ lsrs r1, r2, #28 │ │ orr.w r1, r1, r0, lsl #4 │ │ eor.w fp, r0, r0, lsr #28 │ │ eor.w r7, r1, r2 │ │ - b.n 39ae8 │ │ + b.n 39df0 │ │ cmp.w sl, #241 @ 0xf1 │ │ - bcs.n 39adc │ │ - ldr r0, [pc, #944] @ (39e00 ) │ │ + bcs.n 39de4 │ │ + ldr r0, [pc, #944] @ (3a108 ) │ │ mov r1, sl │ │ movs r2, #0 │ │ movs r3, #0 │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ - bl 996ec │ │ - b.n 39ae4 │ │ + bl 996f8 │ │ + b.n 39dec │ │ cmp.w sl, #0 │ │ - beq.w 39e08 │ │ + beq.w 3a110 │ │ mov.w r0, sl, lsr #1 │ │ add.w r2, fp, sl │ │ ldrb.w r0, [fp, r0] │ │ movw r3, #44605 @ 0xae3d │ │ ldrb.w r1, [fp] │ │ ldrb.w r2, [r2, #-1] │ │ movt r3, #49842 @ 0xc2b2 │ │ @@ -25923,213 +26117,213 @@ │ │ eors r1, r2 │ │ movw r2, #31225 @ 0x79f9 │ │ movt r2, #40503 @ 0x9e37 │ │ umull r3, r7, r1, r2 │ │ mla r1, r1, r6, r7 │ │ mla fp, r0, r2, r1 │ │ eor.w r7, fp, r3 │ │ - b.n 39ae8 │ │ + b.n 39df0 │ │ mov r0, fp │ │ mov r1, sl │ │ - bl 98f20 │ │ + bl 98f2c │ │ mov r7, r0 │ │ mov fp, r1 │ │ movw r0, #31829 @ 0x7c55 │ │ ldr r1, [r5, #40] @ 0x28 │ │ movt r0, #32586 @ 0x7f4a │ │ umull sl, r0, r7, r0 │ │ ldr r0, [r5, #24] │ │ and.w r0, r0, sl │ │ cmp r1, r0 │ │ - bls.w 39f72 │ │ + bls.w 3a27a │ │ ldr r3, [r5, #36] @ 0x24 │ │ add.w r0, r0, r0, lsl #1 │ │ ldr.w ip, [sp, #360] @ 0x168 │ │ add.w r0, r3, r0, lsl #2 │ │ ldr r2, [sp, #368] @ 0x170 │ │ ldrd r0, r3, [r0, #4] │ │ lsls r3, r3, #4 │ │ subs r0, #16 │ │ - cbz r3, 39b52 │ │ + cbz r3, 39e5a │ │ ldr.w r6, [r0, #16]! │ │ subs r3, #16 │ │ ldr r1, [r0, #4] │ │ eors r6, r7 │ │ eor.w r1, r1, fp │ │ orrs r1, r6 │ │ - bne.n 39b1a │ │ + bne.n 39e22 │ │ ldr r1, [r0, #8] │ │ ldrex r2, [r1] │ │ adds r3, r2, #1 │ │ strex r7, r3, [r1] │ │ cmp r7, #0 │ │ - bne.n 39b30 │ │ + bne.n 39e38 │ │ cmp r2, #0 │ │ - bmi.w 39f7a │ │ + bmi.w 3a282 │ │ ldr.w sl, [r0, #8] │ │ mov r6, r8 │ │ ldr r0, [sp, #56] @ 0x38 │ │ cmp r0, #0 │ │ - beq.n 39bf0 │ │ - b.n 39bfa │ │ + beq.n 39ef8 │ │ + b.n 39f02 │ │ ldr r3, [sp, #64] @ 0x40 │ │ - cbz r3, 39bca │ │ + cbz r3, 39ed2 │ │ add r0, sp, #88 @ 0x58 │ │ add r1, sp, #120 @ 0x78 │ │ strd r1, ip, [sp, #16] │ │ strd r2, r0, [sp, #24] │ │ ldr r0, [sp, #60] @ 0x3c │ │ ldr r1, [sp, #48] @ 0x30 │ │ ldr r2, [sp, #68] @ 0x44 │ │ str r0, [sp, #0] │ │ add r0, sp, #136 @ 0x88 │ │ str.w r8, [sp, #44] @ 0x2c │ │ strd r7, fp, [sp, #8] │ │ - bl 62204 │ │ + bl 622ec │ │ ldrd r8, r6, [sp, #136] @ 0x88 │ │ ldr r4, [sp, #152] @ 0x98 │ │ ldr r0, [sp, #144] @ 0x90 │ │ cmp.w r8, #3 │ │ str r0, [sp, #68] @ 0x44 │ │ ldr r0, [sp, #148] @ 0x94 │ │ str r0, [sp, #64] @ 0x40 │ │ - bne.n 39c56 │ │ + bne.n 39f5e │ │ ldr r0, [sp, #56] @ 0x38 │ │ - cbnz r0, 39b9a │ │ + cbnz r0, 39ea2 │ │ ldr r0, [sp, #52] @ 0x34 │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 39ece │ │ + bne.w 3a1d6 │ │ dmb ish │ │ movs r0, #1 │ │ ldr.w r8, [sp, #44] @ 0x2c │ │ movt r0, #49152 @ 0xc000 │ │ ldrd fp, sl, [sp, #64] @ 0x40 │ │ ldrex r1, [r5, #8] │ │ add r1, r0 │ │ strex r2, r1, [r5, #8] │ │ cmp r2, #0 │ │ - bne.n 39bac │ │ + bne.n 39eb4 │ │ cmp.w r1, #1073741824 @ 0x40000000 │ │ - bcc.n 39c3c │ │ + bcc.n 39f44 │ │ add.w r0, r5, #8 │ │ - bl 9311c │ │ - b.n 39c3c │ │ + bl 93188 │ │ + b.n 39f44 │ │ movs r0, #33 @ 0x21 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 39f44 │ │ - ldr r1, [pc, #556] @ (39e04 ) │ │ + beq.w 3a24c │ │ + ldr r1, [pc, #556] @ (3a10c ) │ │ movs r2, #33 @ 0x21 │ │ mov fp, r0 │ │ mov.w sl, #33 @ 0x21 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r6, #10 │ │ movt r6, #32768 @ 0x8000 │ │ ldr r0, [sp, #56] @ 0x38 │ │ - cbnz r0, 39bfa │ │ + cbnz r0, 39f02 │ │ ldr r0, [sp, #52] @ 0x34 │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 39eae │ │ + bne.w 3a1b6 │ │ movs r0, #1 │ │ dmb ish │ │ movt r0, #49152 @ 0xc000 │ │ ldrex r1, [r5, #8] │ │ add r1, r0 │ │ strex r2, r1, [r5, #8] │ │ cmp r2, #0 │ │ - bne.n 39c04 │ │ + bne.n 39f0c │ │ cmp.w r1, #1073741824 @ 0x40000000 │ │ - bcs.w 39e6a │ │ + bcs.w 3a172 │ │ ldrd r4, r7, [sp, #124] @ 0x7c │ │ - cbz r7, 39c2e │ │ + cbz r7, 39f36 │ │ mov r5, r4 │ │ mov r0, r5 │ │ - bl 5becc │ │ + bl 5c0dc │ │ adds r5, #52 @ 0x34 │ │ subs r7, #1 │ │ - bne.n 39c22 │ │ + bne.n 39f2a │ │ ldr r0, [sp, #120] @ 0x78 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ movs r4, #33 @ 0x21 │ │ cmp r6, r8 │ │ - beq.w 39dbe │ │ + beq.w 3a0c6 │ │ add r0, sp, #136 @ 0x88 │ │ str r4, [sp, #148] @ 0x94 │ │ stmia.w r0, {r6, sl, fp} │ │ add r0, sp, #136 @ 0x88 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #324 @ 0x144 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add r0, sp, #136 @ 0x88 │ │ movs r2, #84 @ 0x54 │ │ add.w r1, r0, #20 │ │ add r0, sp, #240 @ 0xf0 │ │ str.w r9, [sp, #32] │ │ - bl d52ca │ │ + bl d4c3c │ │ movs r0, #112 @ 0x70 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 39ec6 │ │ + beq.w 3a1ce │ │ mov r9, r0 │ │ movs r0, #1 │ │ strd r0, r0, [r9] │ │ add r1, sp, #240 @ 0xf0 │ │ ldr r0, [sp, #68] @ 0x44 │ │ movs r2, #84 @ 0x54 │ │ str.w r0, [r9, #16] │ │ ldr r0, [sp, #64] @ 0x40 │ │ strd r0, r4, [r9, #20] │ │ add.w r0, r9, #28 │ │ strd r8, r6, [r9, #8] │ │ - bl d52ca │ │ + bl d4c3c │ │ ldrex r0, [r9] │ │ adds r1, r0, #1 │ │ strex r2, r1, [r9] │ │ cmp r2, #0 │ │ - bne.n 39c98 │ │ + bne.n 39fa0 │ │ cmp r0, #0 │ │ - bmi.w 39f7a │ │ + bmi.w 3a282 │ │ ldr r0, [r5, #24] │ │ ldr r1, [r5, #40] @ 0x28 │ │ and.w r0, r0, sl │ │ cmp r1, r0 │ │ - bls.w 39f7c │ │ + bls.w 3a284 │ │ ldr r2, [r5, #36] @ 0x24 │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r8, r2, r0, lsl #2 │ │ ldr.w sl, [r8, #8] │ │ cmp.w sl, #0 │ │ - beq.n 39cf0 │ │ + beq.n 39ff8 │ │ ldr.w ip, [r8, #4] │ │ mov.w r3, sl, lsl #4 │ │ movs r2, #0 │ │ mov r0, ip │ │ ldrd r6, r4, [r0] │ │ eor.w r4, r4, fp │ │ eors r6, r7 │ │ orrs r6, r4 │ │ - beq.n 39d06 │ │ + beq.n 3a00e │ │ adds r2, #1 │ │ adds r0, #16 │ │ subs r3, #16 │ │ - bne.n 39cda │ │ + bne.n 39fe2 │ │ ldr r0, [r5, #48] @ 0x30 │ │ movs r6, #0 │ │ adds r0, #1 │ │ str r0, [r5, #48] @ 0x30 │ │ - b.n 39d3a │ │ + b.n 3a042 │ │ clrex │ │ - bl 95668 │ │ - b.w 394d6 │ │ + bl 956d4 │ │ + b.w 397de │ │ sub.w sl, sl, #1 │ │ mov.w r0, sl, lsl #4 │ │ add.w r3, ip, sl, lsl #4 │ │ ldr.w r0, [ip, r0] │ │ ldrd r4, lr, [r3, #4] │ │ str r0, [sp, #68] @ 0x44 │ │ ldr r0, [r3, #12] │ │ @@ -26141,321 +26335,321 @@ │ │ str.w r3, [ip, r2] │ │ ldr r2, [sp, #64] @ 0x40 │ │ str.w sl, [r8, #8] │ │ strd r4, lr, [r0, #4] │ │ str r2, [r0, #12] │ │ ldr.w r0, [r8] │ │ cmp sl, r0 │ │ - beq.w 39e5e │ │ + beq.w 3a166 │ │ ldr.w r0, [r8, #4] │ │ mov.w r2, sl, lsl #4 │ │ str r7, [r0, r2] │ │ add.w r2, sl, #1 │ │ str.w r2, [r8, #8] │ │ add.w r2, r0, sl, lsl #4 │ │ ldr r0, [r5, #48] @ 0x30 │ │ ldr.w r8, [sp, #44] @ 0x2c │ │ strd fp, r9, [r2, #4] │ │ lsls r2, r0, #29 │ │ - bmi.n 39dd6 │ │ - cbz r6, 39d8a │ │ + bmi.n 3a0de │ │ + cbz r6, 3a092 │ │ dmb ish │ │ ldrex r0, [r6] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r6] │ │ cmp r2, #0 │ │ - bne.n 39d6e │ │ + bne.n 3a076 │ │ cmp r0, #1 │ │ - bne.n 39d8a │ │ + bne.n 3a092 │ │ mov r0, r6 │ │ dmb ish │ │ - bl 46714 │ │ + bl 46a68 │ │ ldr r0, [sp, #56] @ 0x38 │ │ - cbnz r0, 39d98 │ │ + cbnz r0, 3a0a0 │ │ ldr r0, [sp, #52] @ 0x34 │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 39edc │ │ + bne.w 3a1e4 │ │ movs r0, #1 │ │ dmb ish │ │ movt r0, #49152 @ 0xc000 │ │ ldrex r1, [r5, #8] │ │ add r1, r0 │ │ strex r2, r1, [r5, #8] │ │ cmp r2, #0 │ │ - bne.n 39da2 │ │ + bne.n 3a0aa │ │ cmp.w r1, #1073741824 @ 0x40000000 │ │ - bcs.w 39ebc │ │ + bcs.w 3a1c4 │ │ mov sl, r9 │ │ ldr.w r9, [sp, #32] │ │ add.w r0, sl, #8 │ │ str.w r0, [r9] │ │ str.w r8, [sp, #136] @ 0x88 │ │ add r0, sp, #136 @ 0x88 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #324 @ 0x144 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov.w r4, #1000 @ 0x3e8 │ │ muls r0, r4 │ │ - blx d5af0 │ │ + blx d5b00 │ │ ldr r1, [r5, #52] @ 0x34 │ │ cmp r0, r1 │ │ - bls.n 39d68 │ │ + bls.n 3a070 │ │ add.w r0, r5, #24 │ │ - bl 615ec │ │ + bl 616d4 │ │ ldr r1, [r5, #40] @ 0x28 │ │ ldr r0, [r5, #48] @ 0x30 │ │ cmp r1, #0 │ │ - bne.n 39dda │ │ - ldr r0, [pc, #464] @ (39fc8 ) │ │ + bne.n 3a0e2 │ │ + ldr r0, [pc, #464] @ (3a2d0 ) │ │ add r0, pc │ │ - bl 409c4 │ │ + bl 40ccc │ │ nop │ │ - subs r5, #38 @ 0x26 │ │ - vrsra.u64 , q10, #2 │ │ + subs r2, #30 │ │ + vtrn. , q14 │ │ vclt.s , q4, #0 │ │ lsrs r5, r0, #12 │ │ movw r7, #38082 @ 0x94c2 │ │ movt fp, #11526 @ 0x2d06 │ │ movt r7, #14547 @ 0x38d3 │ │ - b.n 39ae8 │ │ + b.n 39df0 │ │ movs r3, #22 │ │ adds r2, #1 │ │ str r3, [sp, #88] @ 0x58 │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #88 @ 0x58 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ str r0, [sp, #124] @ 0x7c │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str r0, [sp, #120] @ 0x78 │ │ - cbz r4, 39e50 │ │ + cbz r4, 3a158 │ │ mov r5, sl │ │ mov r0, r5 │ │ - bl 5becc │ │ + bl 5c0dc │ │ adds r5, #52 @ 0x34 │ │ subs r4, #1 │ │ - bne.n 39e44 │ │ + bne.n 3a14c │ │ cmp r7, #0 │ │ itt ne │ │ movne r0, sl │ │ - blxne d87c0 │ │ - b.w 393b4 │ │ + blxne d87d0 │ │ + b.w 396bc │ │ mov r0, r8 │ │ mov r4, r1 │ │ - bl 4796a │ │ + bl 47dd2 │ │ mov r1, r4 │ │ - b.n 39d44 │ │ + b.n 3a04c │ │ add.w r0, r5, #8 │ │ - bl 9311c │ │ + bl 93188 │ │ ldrd r4, r7, [sp, #124] @ 0x7c │ │ cmp r7, #0 │ │ - bne.w 39c20 │ │ - b.n 39c2e │ │ - bl 7770c │ │ + bne.w 39f28 │ │ + b.n 39f36 │ │ + bl 77774 │ │ eor.w r2, r0, #1 │ │ ldrb r0, [r5, #16] │ │ cmp r0, #0 │ │ - beq.w 394ec │ │ - ldr r0, [pc, #296] @ (39fb8 ) │ │ - ldr r3, [pc, #296] @ (39fbc ) │ │ - ldr r1, [pc, #300] @ (39fc0 ) │ │ + beq.w 397f4 │ │ + ldr r0, [pc, #296] @ (3a2c0 ) │ │ + ldr r3, [pc, #296] @ (3a2c4 ) │ │ + ldr r1, [pc, #300] @ (3a2c8 ) │ │ add r0, pc │ │ strb.w r2, [sp, #140] @ 0x8c │ │ add r3, pc │ │ add r1, pc │ │ add.w r2, r5, #8 │ │ str r2, [sp, #136] @ 0x88 │ │ add r2, sp, #136 @ 0x88 │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ - bl 7770c │ │ + bl 417b8 │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq r0, [r5, #16] │ │ - b.n 39bfa │ │ + b.n 39f02 │ │ add.w r0, r5, #8 │ │ - bl 9311c │ │ - b.n 39db8 │ │ + bl 93188 │ │ + b.n 3a0c0 │ │ movs r0, #8 │ │ movs r1, #112 @ 0x70 │ │ - bl 3de2a │ │ - bl 7770c │ │ + bl 3e132 │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq r0, [r5, #16] │ │ - b.n 39b9a │ │ - bl 7770c │ │ + b.n 39ea2 │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq r0, [r5, #16] │ │ - b.n 39d98 │ │ - ldr r0, [pc, #200] @ (39fb4 ) │ │ + b.n 3a0a0 │ │ + ldr r0, [pc, #200] @ (3a2bc ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ movs r0, #33 @ 0x21 │ │ movs r5, #33 @ 0x21 │ │ - blx d87f0 │ │ - cbz r0, 39f44 │ │ - ldr r1, [pc, #132] @ (39f84 ) │ │ + blx d8810 │ │ + cbz r0, 3a24c │ │ + ldr r1, [pc, #132] @ (3a28c ) │ │ movs r2, #33 @ 0x21 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ - ldr r0, [pc, #124] @ (39f88 ) │ │ - ldr r3, [pc, #128] @ (39f8c ) │ │ - ldr r1, [pc, #128] @ (39f90 ) │ │ + bl d52ea │ │ + ldr r0, [pc, #124] @ (3a290 ) │ │ + ldr r3, [pc, #128] @ (3a294 ) │ │ + ldr r1, [pc, #128] @ (3a298 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ - b.n 39f64 │ │ + b.n 3a26c │ │ movs r0, #33 @ 0x21 │ │ movs r5, #33 @ 0x21 │ │ - blx d87f0 │ │ - cbz r0, 39f44 │ │ - ldr r1, [pc, #128] @ (39fa4 ) │ │ + blx d8810 │ │ + cbz r0, 3a24c │ │ + ldr r1, [pc, #128] @ (3a2ac ) │ │ movs r2, #33 @ 0x21 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ - ldr r0, [pc, #120] @ (39fa8 ) │ │ - ldr r3, [pc, #124] @ (39fac ) │ │ - ldr r1, [pc, #124] @ (39fb0 ) │ │ + bl d52ea │ │ + ldr r0, [pc, #120] @ (3a2b0 ) │ │ + ldr r3, [pc, #124] @ (3a2b4 ) │ │ + ldr r1, [pc, #124] @ (3a2b8 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ - b.n 39f64 │ │ + b.n 3a26c │ │ movs r0, #33 @ 0x21 │ │ movs r5, #33 @ 0x21 │ │ - blx d87f0 │ │ - cbnz r0, 39f4c │ │ + blx d8810 │ │ + cbnz r0, 3a254 │ │ movs r0, #1 │ │ movs r1, #33 @ 0x21 │ │ - bl 3dfa4 │ │ - ldr r1, [pc, #68] @ (39f94 ) │ │ + bl 3e2ac │ │ + ldr r1, [pc, #68] @ (3a29c ) │ │ movs r2, #33 @ 0x21 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ - ldr r0, [pc, #60] @ (39f98 ) │ │ - ldr r3, [pc, #64] @ (39f9c ) │ │ - ldr r1, [pc, #64] @ (39fa0 ) │ │ + bl d52ea │ │ + ldr r0, [pc, #60] @ (3a2a0 ) │ │ + ldr r3, [pc, #64] @ (3a2a4 ) │ │ + ldr r1, [pc, #64] @ (3a2a8 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ movs r2, #10 │ │ str r5, [sp, #148] @ 0x94 │ │ str r4, [sp, #144] @ 0x90 │ │ movt r2, #32768 @ 0x8000 │ │ str r5, [sp, #140] @ 0x8c │ │ - b.n 39ea2 │ │ - ldr r2, [pc, #88] @ (39fcc ) │ │ + b.n 3a1aa │ │ + ldr r2, [pc, #88] @ (3a2d4 ) │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ udf #254 @ 0xfe │ │ - ldr r2, [pc, #68] @ (39fc4 ) │ │ + ldr r2, [pc, #68] @ (3a2cc ) │ │ add r2, pc │ │ - bl 3fa74 │ │ - strh r2, [r7, #8] │ │ - vsli.32 , , #29 │ │ - vcle.s q8, q4, #0 │ │ - movs r2, r1 │ │ - lsls r6, r2, #18 │ │ - movs r2, r1 │ │ - strh r2, [r5, #6] │ │ - vceq.f d31, d21, #0 │ │ - vsra.u32 q8, q12, #3 │ │ - movs r2, r1 │ │ - lsls r6, r4, #17 │ │ + bl 3fd7c │ │ + ldrb r2, [r6, #24] │ │ + vclt.s , , #0 │ │ + @ instruction: 0xfffdfeb0 │ │ + movs r1, r1 │ │ + lsls r6, r3, #6 │ │ movs r2, r1 │ │ - strh r6, [r2, #8] │ │ - vsli.32 , , #29 │ │ - vcle.s d16, d20, #0 │ │ + ldrb r2, [r4, #23] │ │ + vrshr.u32 d31, d13, #3 │ │ + vqrdmlah.s , , d16[0] │ │ + movs r1, r1 │ │ + lsls r6, r5, #5 │ │ movs r2, r1 │ │ - lsls r2, r4, #18 │ │ + ldrb r6, [r1, #24] │ │ + vclt.s , , #0 │ │ + @ instruction: 0xfffdfe8c │ │ + movs r1, r1 │ │ + lsls r2, r5, #6 │ │ movs r2, r1 │ │ - lsls r4, r1, #19 │ │ + lsls r4, r2, #7 │ │ movs r2, r1 │ │ - bl ffe29fb6 │ │ - lsrs r2, r6, #11 │ │ + bl 3222be │ │ + lsls r2, r3, #31 │ │ movs r2, r1 │ │ - asrs r0, r0, #14 │ │ + asrs r0, r1, #2 │ │ movs r2, r1 │ │ - lsrs r6, r7, #12 │ │ + lsrs r6, r0, #1 │ │ movs r2, r1 │ │ - lsrs r4, r4, #18 │ │ + lsrs r4, r5, #6 │ │ movs r2, r1 │ │ - lsrs r0, r7, #12 │ │ + lsrs r0, r0, #1 │ │ movs r2, r1 │ │ │ │ -00039fd0 : │ │ +0003a2d8 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #4 │ │ vpush {d8} │ │ sub sp, #40 @ 0x28 │ │ add.w ip, sp, #20 │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #12] │ │ - ldr r4, [pc, #352] @ (3a148 ) │ │ + ldr r4, [pc, #352] @ (3a450 ) │ │ add r4, pc │ │ ldr r0, [r4, #24] │ │ ldr r1, [sp, #92] @ 0x5c │ │ ldrd r9, r6, [sp, #120] @ 0x78 │ │ cmp r0, #2 │ │ str r1, [sp, #16] │ │ ldr r1, [sp, #104] @ 0x68 │ │ ldr.w fp, [sp, #88] @ 0x58 │ │ ldr.w sl, [sp, #96] @ 0x60 │ │ vldr d8, [sp, #112] @ 0x70 │ │ str r1, [sp, #8] │ │ ldr.w r8, [sp, #100] @ 0x64 │ │ dmb ish │ │ it ne │ │ - blne 3661c │ │ + blne 368ec │ │ movs r0, #1 │ │ ldrex r1, [r4, #4] │ │ cmp r1, #0 │ │ - bne.n 3a0de │ │ + bne.n 3a3e6 │ │ strex r1, r0, [r4, #4] │ │ cmp r1, #0 │ │ - bne.n 3a016 │ │ + bne.n 3a31e │ │ dmb ish │ │ - ldr r7, [pc, #288] @ (3a14c ) │ │ + ldr r7, [pc, #288] @ (3a454 ) │ │ add r7, pc │ │ ldr r0, [r7, #4] │ │ lsls r0, r0, #1 │ │ - bne.n 3a0ea │ │ + bne.n 3a3f2 │ │ movs r5, #0 │ │ ldrb r0, [r4, #8] │ │ cmp r0, #0 │ │ - bne.n 3a0f8 │ │ + bne.n 3a400 │ │ ldr r0, [r4, #20] │ │ dmb ish │ │ adds r0, #60 @ 0x3c │ │ ldrex r1, [r0] │ │ adds r1, #1 │ │ strex r2, r1, [r0] │ │ cmp r2, #0 │ │ - bne.n 3a044 │ │ + bne.n 3a34c │ │ movs r0, #56 @ 0x38 │ │ dmb ish │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 3a116 │ │ - ldr r3, [pc, #236] @ (3a150 ) │ │ + beq.n 3a41e │ │ + ldr r3, [pc, #236] @ (3a458 ) │ │ mov r2, r0 │ │ strd r9, r6, [r0, #16] │ │ str.w fp, [r0] │ │ add r3, pc │ │ strb.w sl, [r0, #48] @ 0x30 │ │ vstr d8, [r0, #8] │ │ ldr r0, [sp, #12] │ │ @@ -26467,370 +26661,365 @@ │ │ ldr r0, [sp, #28] │ │ strd r0, r8, [r2, #36] @ 0x24 │ │ ldr r0, [sp, #8] │ │ str r0, [r2, #44] @ 0x2c │ │ ldrd r0, r1, [r4, #12] │ │ ldr r6, [sp, #16] │ │ str r6, [r2, #4] │ │ - bl 24220 │ │ + bl 24254 │ │ cmp r0, #0 │ │ - bne.n 3a11e │ │ - cbnz r5, 3a0a4 │ │ + bne.n 3a426 │ │ + cbnz r5, 3a3ac │ │ ldr r0, [r7, #4] │ │ lsls r0, r0, #1 │ │ - bne.n 3a13a │ │ + bne.n 3a442 │ │ movs r0, #0 │ │ dmb ish │ │ ldrex r1, [r4, #4] │ │ strex r2, r0, [r4, #4] │ │ cmp r2, #0 │ │ - bne.n 3a0aa │ │ + bne.n 3a3b2 │ │ cmp r1, #2 │ │ itttt ne │ │ addne sp, #40 @ 0x28 │ │ vpopne {d8} │ │ addne sp, #4 │ │ ldmiane.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ adds r1, r4, #4 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ add sp, #40 @ 0x28 │ │ vpop {d8} │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d8700 │ │ + b.w d8710 │ │ adds r0, r4, #4 │ │ clrex │ │ - bl 778fe │ │ - b.n 3a02a │ │ - bl 7770c │ │ + bl 77966 │ │ + b.n 3a332 │ │ + bl 77774 │ │ eor.w r5, r0, #1 │ │ ldrb r0, [r4, #8] │ │ cmp r0, #0 │ │ - beq.n 3a03c │ │ - ldr r0, [pc, #88] @ (3a154 ) │ │ + beq.n 3a344 │ │ + ldr r0, [pc, #88] @ (3a45c ) │ │ adds r2, r4, #4 │ │ - ldr r3, [pc, #88] @ (3a158 ) │ │ - ldr r1, [pc, #92] @ (3a15c ) │ │ + ldr r3, [pc, #88] @ (3a460 ) │ │ + ldr r1, [pc, #92] @ (3a464 ) │ │ add r0, pc │ │ str r2, [sp, #32] │ │ add r3, pc │ │ add r1, pc │ │ add r2, sp, #32 │ │ strb.w r5, [sp, #36] @ 0x24 │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ movs r0, #8 │ │ movs r1, #56 @ 0x38 │ │ - bl 3de2a │ │ - ldr r4, [pc, #64] @ (3a160 ) │ │ - ldr r3, [pc, #64] @ (3a164 ) │ │ - ldr r2, [pc, #68] @ (3a168 ) │ │ + bl 3e132 │ │ + ldr r4, [pc, #64] @ (3a468 ) │ │ + ldr r3, [pc, #64] @ (3a46c ) │ │ + ldr r2, [pc, #68] @ (3a470 ) │ │ add r4, pc │ │ strd r0, r1, [sp, #32] │ │ add r3, pc │ │ add r2, pc │ │ str r2, [sp, #0] │ │ add r2, sp, #32 │ │ mov r0, r4 │ │ movs r1, #50 @ 0x32 │ │ - bl 414b0 │ │ - bl 7770c │ │ + bl 417b8 │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq r0, [r4, #8] │ │ - b.n 3a0a4 │ │ - subs r0, #148 @ 0x94 │ │ - movs r2, r1 │ │ - bx sp │ │ + b.n 3a3ac │ │ + adds r5, #156 @ 0x9c │ │ movs r2, r1 │ │ - cdp2 0, 12, cr0, cr4, cr9, {0} │ │ - bl 3be152 │ │ - vaddl.u32 q8, d4, d9 │ │ - lsls r2, r4, #2 │ │ + add r8, r0 │ │ movs r2, r1 │ │ - b.n 3a194 │ │ - vqrdmlsh.s , q6, d30[0] │ │ + umull r0, r0, ip, r9 │ │ + bl b645a │ │ + stc2 0, cr0, [ip, #-36] @ 0xffffffdc │ │ + stc2 0, cr0, [sl, #36]! @ 0x24 │ │ + ble.n 3a48c │ │ + vdup.32 , d22[1] │ │ movs r1, r1 │ │ - ldc2l 0, cr0, [r4, #36]! @ 0x24 │ │ + @ instruction: 0xfafc0009 │ │ │ │ -0003a16c : │ │ +0003a474 : │ │ push {r4, r5, r7, lr} │ │ sub sp, #16 │ │ ldrd r0, r4, [r0, #92] @ 0x5c │ │ add.w r5, r0, #40 @ 0x28 │ │ lsls r0, r4, #7 │ │ - cbz r0, 3a1a6 │ │ + cbz r0, 3a4ae │ │ mov r4, r5 │ │ ldrd ip, r5, [r5] │ │ eor.w lr, r5, r3 │ │ subs r0, #128 @ 0x80 │ │ eor.w r5, ip, r2 │ │ orrs.w r5, r5, lr │ │ add.w r5, r4, #128 @ 0x80 │ │ - bne.n 3a17a │ │ + bne.n 3a482 │ │ sub.w r0, r4, #40 @ 0x28 │ │ str r0, [r1, #0] │ │ movs r0, #10 │ │ movt r0, #32768 @ 0x8000 │ │ adds r0, #7 │ │ - b.n 3a1c8 │ │ + b.n 3a4d0 │ │ movs r0, #25 │ │ movs r5, #25 │ │ - blx d87f0 │ │ - cbz r0, 3a1d4 │ │ - ldr r1, [pc, #40] @ (3a1dc ) │ │ + blx d8810 │ │ + cbz r0, 3a4dc │ │ + ldr r1, [pc, #40] @ (3a4e4 ) │ │ movs r2, #25 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #10 │ │ str r5, [sp, #12] │ │ movt r0, #32768 @ 0x8000 │ │ strd r5, r4, [sp, #4] │ │ str r0, [sp, #0] │ │ mov r0, sp │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #16 │ │ pop {r4, r5, r7, pc} │ │ movs r0, #1 │ │ movs r1, #25 │ │ - bl 3dfa4 │ │ - ldrb r6, [r2, #28] │ │ - Address 0x3a1de is out of bounds. │ │ + bl 3e2ac │ │ + ldrb r6, [r1, #16] │ │ + Address 0x3a4e6 is out of bounds. │ │ │ │ │ │ -0003a1e0 : │ │ +0003a4e8 : │ │ push {r4, lr} │ │ sub sp, #40 @ 0x28 │ │ ldrd r1, r2, [r0, #80] @ 0x50 │ │ add r0, sp, #8 │ │ - bl 3ec96 │ │ + bl 3ef9e │ │ ldr r0, [sp, #8] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ ittt eq │ │ ldreq r0, [sp, #12] │ │ addeq sp, #40 @ 0x28 │ │ popeq {r4, pc} │ │ ldrd ip, lr, [sp, #8] │ │ ldrd r1, r2, [sp, #16] │ │ - ldr r0, [pc, #28] @ (3a224 ) │ │ - ldr r3, [pc, #32] @ (3a228 ) │ │ - ldr r4, [pc, #32] @ (3a22c ) │ │ + ldr r0, [pc, #28] @ (3a52c ) │ │ + ldr r3, [pc, #32] @ (3a530 ) │ │ + ldr r4, [pc, #32] @ (3a534 ) │ │ add r0, pc │ │ strd r1, r2, [sp, #32] │ │ add r3, pc │ │ add r2, sp, #24 │ │ movs r1, #43 @ 0x2b │ │ add r4, pc │ │ strd ip, lr, [sp, #24] │ │ str r4, [sp, #0] │ │ - bl 414b0 │ │ + bl 417b8 │ │ nop │ │ - bl 2b4222 │ │ - cdp2 0, 11, cr0, cr8, cr9, {0} │ │ - lsls r6, r6, #11 │ │ - movs r2, r1 │ │ + vrsqrts.f16 , , │ │ + @ instruction: 0xfbf00009 │ │ + vaddl.u q8, d14, d9 │ │ │ │ -0003a230 : │ │ +0003a538 : │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #36 @ 0x24 │ │ mov r7, r0 │ │ movs r0, #12 │ │ mov r6, r3 │ │ mov r5, r2 │ │ mov r4, r1 │ │ - blx d87f0 │ │ - cbz r0, 3a280 │ │ - ldr r3, [pc, #64] @ (3a288 ) │ │ + blx d8810 │ │ + cbz r0, 3a588 │ │ + ldr r3, [pc, #64] @ (3a590 ) │ │ mov r2, r0 │ │ ldr r0, [sp, #56] @ 0x38 │ │ mov r1, r4 │ │ strd r0, r7, [r2] │ │ add r3, pc │ │ add r0, sp, #16 │ │ strb r6, [r2, #9] │ │ strb r5, [r2, #8] │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #16] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 3a274 │ │ + beq.n 3a57c │ │ add r3, sp, #16 │ │ add.w ip, sp, #4 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #0] │ │ mov r0, sp │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #36 @ 0x24 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #4 │ │ movs r1, #12 │ │ - bl 3de2a │ │ - lsls r0, r7, #6 │ │ - movs r2, r1 │ │ + bl 3e132 │ │ + cdp2 0, 12, cr0, cr0, cr9, {0} │ │ │ │ -0003a28c : │ │ +0003a594 : │ │ push {r4, r5, r7, lr} │ │ sub sp, #32 │ │ mov r5, r0 │ │ movs r0, #4 │ │ mov r4, r1 │ │ - blx d87f0 │ │ - cbz r0, 3a2d0 │ │ - ldr r3, [pc, #56] @ (3a2d8 ) │ │ + blx d8810 │ │ + cbz r0, 3a5d8 │ │ + ldr r3, [pc, #56] @ (3a5e0 ) │ │ mov r2, r0 │ │ str r5, [r0, #0] │ │ add r0, sp, #16 │ │ add r3, pc │ │ mov r1, r4 │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #16] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 3a2c4 │ │ + beq.n 3a5cc │ │ add r3, sp, #16 │ │ add.w ip, sp, #4 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #0] │ │ mov r0, sp │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #32 │ │ pop {r4, r5, r7, pc} │ │ movs r0, #4 │ │ movs r1, #4 │ │ - bl 3de2a │ │ - lsls r4, r2, #5 │ │ - movs r2, r1 │ │ + bl 3e132 │ │ + cdp2 0, 5, cr0, cr12, cr9, {0} │ │ │ │ -0003a2dc : │ │ +0003a5e4 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #40 @ 0x28 │ │ mov r5, r3 │ │ mov r8, r1 │ │ mov r6, r0 │ │ - cbz r2, 3a34e │ │ + cbz r2, 3a656 │ │ mov r0, r2 │ │ mov r7, r2 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #24 │ │ mov r1, r7 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #24] │ │ cmp r0, #1 │ │ - beq.n 3a362 │ │ + beq.n 3a66a │ │ ldrd r7, r4, [sp, #28] │ │ movs r0, #20 │ │ - blx d87f0 │ │ - cbz r0, 3a35a │ │ + blx d8810 │ │ + cbz r0, 3a662 │ │ mov r2, r0 │ │ ldr r0, [sp, #64] @ 0x40 │ │ - ldr r3, [pc, #164] @ (3a3b8 ) │ │ + ldr r3, [pc, #164] @ (3a6c0 ) │ │ mov r1, r8 │ │ strd r6, r7, [r2, #8] │ │ strd r5, r0, [r2] │ │ add r3, pc │ │ add r0, sp, #24 │ │ str r4, [r2, #16] │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #24] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 3a340 │ │ + beq.n 3a648 │ │ add r3, sp, #24 │ │ add.w ip, sp, #12 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #8] │ │ add r0, sp, #8 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #40 @ 0x28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movs r7, #0 │ │ movs r0, #20 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - bne.n 3a30e │ │ + bne.n 3a616 │ │ movs r0, #4 │ │ movs r1, #20 │ │ - bl 3de2a │ │ + bl 3e132 │ │ movs r0, #33 @ 0x21 │ │ movs r5, #33 @ 0x21 │ │ - blx d87f0 │ │ - cbnz r0, 3a374 │ │ + blx d8810 │ │ + cbnz r0, 3a67c │ │ movs r0, #1 │ │ movs r1, #33 @ 0x21 │ │ - bl 3dfa4 │ │ - ldr r1, [pc, #48] @ (3a3a8 ) │ │ + bl 3e2ac │ │ + ldr r1, [pc, #48] @ (3a6b0 ) │ │ movs r2, #33 @ 0x21 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r2, #17 │ │ - ldr r0, [pc, #40] @ (3a3ac ) │ │ - ldr r3, [pc, #40] @ (3a3b0 ) │ │ + ldr r0, [pc, #40] @ (3a6b4 ) │ │ + ldr r3, [pc, #40] @ (3a6b8 ) │ │ movt r2, #32768 @ 0x8000 │ │ - ldr r1, [pc, #40] @ (3a3b4 ) │ │ + ldr r1, [pc, #40] @ (3a6bc ) │ │ subs r2, #7 │ │ str r2, [sp, #24] │ │ add r0, pc │ │ add r1, pc │ │ add r3, pc │ │ add r2, sp, #24 │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ str r5, [sp, #36] @ 0x24 │ │ strd r5, r4, [sp, #28] │ │ - bl 414b0 │ │ + bl 417b8 │ │ nop │ │ - ldrb r2, [r0, #19] │ │ - vshr.u64 , , #3 │ │ - vqrdmulh.s , , d4[0] │ │ + ldrb r2, [r7, #6] │ │ + vqrdmulh.s q15, , d27[0] │ │ + vtbl.8 d31, {d13-d15}, d28 │ │ movs r1, r1 │ │ - lsls r2, r1, #6 │ │ - movs r2, r1 │ │ - vhadd.u16 d0, d10, d9 │ │ + cdp2 0, 9, cr0, cr2, cr9, {0} │ │ + stc2 0, cr0, [r2], #-36 @ 0xffffffdc │ │ │ │ -0003a3bc : │ │ +0003a6c4 : │ │ push {r4, r5, r6, lr} │ │ ldr r5, [r0, #8] │ │ ldr r2, [r0, #0] │ │ cmp r5, r2 │ │ - beq.n 3a3d0 │ │ + beq.n 3a6d8 │ │ ldr r2, [r0, #4] │ │ strb r1, [r2, r5] │ │ adds r1, r5, #1 │ │ str r1, [r0, #8] │ │ pop {r4, r5, r6, pc} │ │ mov r4, r0 │ │ mov r6, r1 │ │ - bl 3ec24 │ │ + bl 3ef2c │ │ mov r1, r6 │ │ mov r0, r4 │ │ - b.n 3a3c6 │ │ - bmi.n 3a38a │ │ + b.n 3a6ce │ │ + bmi.n 3a692 │ │ │ │ -0003a3e0 : │ │ +0003a6e8 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #20 │ │ cmp r1, #0 │ │ - beq.n 3a46c │ │ + beq.n 3a774 │ │ cmp r2, #17 │ │ - bcs.n 3a472 │ │ + bcs.n 3a77a │ │ cmp r2, #8 │ │ - bls.w 3a834 │ │ + bls.w 3ab3c │ │ ldr r3, [r1, #0] │ │ movw r6, #14777 @ 0x39b9 │ │ ldr.w r8, [r1, #4] │ │ add r1, r2 │ │ movt r6, #59970 @ 0xea42 │ │ eors r3, r6 │ │ ldr.w r5, [r1, #-8] │ │ @@ -26859,33 +27048,33 @@ │ │ adc.w r3, r3, #0 │ │ adds.w r2, r2, r9 │ │ adcs r1, r3 │ │ eor.w r5, r5, ip │ │ eors r6, r4 │ │ adds r2, r2, r5 │ │ adcs r1, r6 │ │ - b.n 3a80e │ │ + b.n 3ab16 │ │ movs r4, #0 │ │ movs r1, #0 │ │ - b.n 3a94a │ │ + b.n 3ac52 │ │ cmp r2, #129 @ 0x81 │ │ - bcs.w 3a8be │ │ + bcs.w 3abc6 │ │ movw r3, #51847 @ 0xca87 │ │ movw r7, #31153 @ 0x79b1 │ │ movt r3, #34283 @ 0x85eb │ │ movt r7, #40503 @ 0x9e37 │ │ umull r6, r3, r2, r3 │ │ cmp r2, #33 @ 0x21 │ │ mla r3, r2, r7, r3 │ │ strd r3, r6, [sp, #12] │ │ - bcc.w 3a746 │ │ + bcc.w 3aa4e │ │ cmp r2, #64 @ 0x40 │ │ - bls.w 3a664 │ │ + bls.w 3a96c │ │ cmp r2, #96 @ 0x60 │ │ - bls.n 3a584 │ │ + bls.n 3a88c │ │ adds r3, r1, r2 │ │ movw r4, #20874 @ 0x518a │ │ movt r4, #19424 @ 0x4be0 │ │ mov.w ip, #0 │ │ ldr.w r7, [r3, #-64] │ │ ldr.w r5, [r3, #-56] │ │ eors r7, r4 │ │ @@ -27142,17 +27331,17 @@ │ │ movt r3, #40503 @ 0x9e37 │ │ movw r5, #26513 @ 0x6791 │ │ umull r7, r6, r2, r3 │ │ movt r5, #5718 @ 0x1656 │ │ mla r2, r2, r5, r6 │ │ mla r1, r1, r3, r2 │ │ eor.w r4, r1, r7 │ │ - b.n 3a94a │ │ + b.n 3ac52 │ │ cmp r2, #3 │ │ - bls.n 3a8d8 │ │ + bls.n 3abe0 │ │ adds r3, r1, r2 │ │ movw r7, #45428 @ 0xb174 │ │ ldr r1, [r1, #0] │ │ movt r7, #51002 @ 0xc73a │ │ ldr.w r3, [r3, #-4] │ │ movw ip, #7269 @ 0x1c65 │ │ eors r1, r7 │ │ @@ -27185,29 +27374,29 @@ │ │ adc.w r7, r5, #0 │ │ eors r1, r7 │ │ mla r1, r1, r6, r2 │ │ lsrs r2, r3, #28 │ │ orr.w r2, r2, r1, lsl #4 │ │ eor.w r1, r1, r1, lsr #28 │ │ eor.w r4, r2, r3 │ │ - b.n 3a94a │ │ + b.n 3ac52 │ │ mov r5, r0 │ │ cmp r2, #241 @ 0xf1 │ │ - bcs.n 3a93a │ │ - ldr r0, [pc, #208] @ (3a998 ) │ │ + bcs.n 3ac42 │ │ + ldr r0, [pc, #208] @ (3aca0 ) │ │ movs r3, #0 │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, r1 │ │ mov r1, r2 │ │ movs r2, #0 │ │ - bl 996ec │ │ - b.n 3a946 │ │ + bl 996f8 │ │ + b.n 3ac4e │ │ cmp r2, #0 │ │ - beq.n 3a96c │ │ + beq.n 3ac74 │ │ lsrs r3, r2, #1 │ │ ldrb r7, [r1, #0] │ │ ldrb r3, [r1, r3] │ │ add r1, r2 │ │ movw r5, #26513 @ 0x6791 │ │ ldrb.w r1, [r1, #-1] │ │ movt r5, #5718 @ 0x1656 │ │ @@ -27228,109 +27417,109 @@ │ │ lsrs r3, r2, #29 │ │ orr.w r3, r3, r1, lsl #3 │ │ eor.w r1, r1, r1, lsr #29 │ │ eors r2, r3 │ │ movw r3, #31225 @ 0x79f9 │ │ movt r3, #40503 @ 0x9e37 │ │ umull r7, r6, r2, r3 │ │ - b.n 3a826 │ │ + b.n 3ab2e │ │ mov r0, r1 │ │ mov r1, r2 │ │ movs r2, #0 │ │ movs r3, #0 │ │ - bl 99110 │ │ + bl 9911c │ │ mov r4, r0 │ │ mov r0, r5 │ │ ldr r3, [r0, #0] │ │ ldr r2, [r0, #8] │ │ subs r3, r3, r2 │ │ cmp r3, #7 │ │ - bls.n 3a97e │ │ + bls.n 3ac86 │ │ ldr r3, [r0, #4] │ │ rev r1, r1 │ │ str r1, [r3, r2] │ │ add.w r1, r2, #8 │ │ str r1, [r0, #8] │ │ adds r0, r3, r2 │ │ rev r1, r4 │ │ str r1, [r0, #4] │ │ add sp, #20 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movw r1, #32773 @ 0x8005 │ │ movw r4, #38082 @ 0x94c2 │ │ movt r1, #11526 @ 0x2d06 │ │ movt r4, #14547 @ 0x38d3 │ │ - b.n 3a94a │ │ + b.n 3ac52 │ │ movs r3, #1 │ │ mov r6, r1 │ │ mov r1, r2 │ │ movs r2, #8 │ │ str r3, [sp, #0] │ │ mov r5, r0 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r2, [r5, #8] │ │ mov r1, r6 │ │ mov r0, r5 │ │ - b.n 3a954 │ │ + b.n 3ac5c │ │ nop │ │ - cmp r6, #180 @ 0xb4 │ │ - Address 0x3a99a is out of bounds. │ │ + cmp r3, #172 @ 0xac │ │ + Address 0x3aca2 is out of bounds. │ │ │ │ │ │ -0003a99c : │ │ +0003aca4 : │ │ push {r4, r5, r6, lr} │ │ sub sp, #8 │ │ vmov d16, r2, r3 │ │ vcmp.f64 d16, d16 │ │ vmrs APSR_nzcv, fpscr │ │ - bvs.n 3a9f4 │ │ + bvs.n 3acfc │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ cmp r3, #0 │ │ it mi │ │ mvnmi r2, r2 │ │ it mi │ │ movmi.w r1, #4294967295 @ 0xffffffff │ │ eors r1, r3 │ │ rev r5, r2 │ │ rev r6, r1 │ │ ldr r2, [r0, #0] │ │ ldr r1, [r0, #8] │ │ subs r2, r2, r1 │ │ cmp r2, #7 │ │ - bls.n 3a9e0 │ │ + bls.n 3ace8 │ │ ldr r2, [r0, #4] │ │ add.w r3, r1, #8 │ │ str r3, [r0, #8] │ │ adds r0, r2, r1 │ │ str r6, [r2, r1] │ │ str r5, [r0, #4] │ │ add sp, #8 │ │ pop {r4, r5, r6, pc} │ │ movs r2, #1 │ │ movs r3, #1 │ │ str r2, [sp, #0] │ │ movs r2, #8 │ │ mov r4, r0 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ mov r0, r4 │ │ - b.n 3a9ce │ │ + b.n 3acd6 │ │ movs r6, #0 │ │ movs r5, #0 │ │ - b.n 3a9c4 │ │ - bmi.n 3a9a6 │ │ - bmi.n 3a9a8 │ │ - bmi.n 3a9aa │ │ + b.n 3accc │ │ + bmi.n 3acae │ │ + bmi.n 3acb0 │ │ + bmi.n 3acb2 │ │ │ │ -0003aa00 : │ │ +0003ad08 : │ │ push {r4, r5, r7, lr} │ │ sub sp, #8 │ │ - vldr d17, [pc, #144] @ 3aa98 │ │ + vldr d17, [pc, #144] @ 3ada0 │ │ vmov d16, r2, r3 │ │ - vldr d18, [pc, #144] @ 3aaa0 │ │ + vldr d18, [pc, #144] @ 3ada8 │ │ movs r2, #0 │ │ vcmp.f64 d16, d17 │ │ bic.w r1, r3, #2147483648 @ 0x80000000 │ │ movt r2, #32752 @ 0x7ff0 │ │ vmov.f64 d19, d16 │ │ vmrs APSR_nzcv, fpscr │ │ it mi │ │ @@ -27341,93 +27530,93 @@ │ │ vmovgt.f64 d19, d18 │ │ cmp r1, r2 │ │ it lt │ │ vmovlt.f64 d16, d19 │ │ vcvt.f32.f64 s0, d16 │ │ vcmp.f32 s0, s0 │ │ vmrs APSR_nzcv, fpscr │ │ - bvs.n 3aa8e │ │ + bvs.n 3ad96 │ │ vmov r1, s0 │ │ vmov r2, r3, d16 │ │ eor.w r2, r1, #2147483648 @ 0x80000000 │ │ cmp r3, #0 │ │ it mi │ │ mvnmi r2, r1 │ │ rev r5, r2 │ │ ldr r2, [r0, #0] │ │ ldr r1, [r0, #8] │ │ subs r2, r2, r1 │ │ cmp r2, #3 │ │ - bls.n 3aa7a │ │ + bls.n 3ad82 │ │ ldr r2, [r0, #4] │ │ str r5, [r2, r1] │ │ adds r1, #4 │ │ str r1, [r0, #8] │ │ add sp, #8 │ │ pop {r4, r5, r7, pc} │ │ movs r2, #1 │ │ movs r3, #1 │ │ str r2, [sp, #0] │ │ movs r2, #4 │ │ mov r4, r0 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ mov r0, r4 │ │ - b.n 3aa6e │ │ + b.n 3ad76 │ │ movs r5, #0 │ │ - b.n 3aa64 │ │ + b.n 3ad6c │ │ nop │ │ nop │ │ nop │ │ movs r0, r0 │ │ - b.n 3aa9e │ │ + b.n 3ada6 │ │ @ instruction: 0xffffc7ef │ │ movs r0, r0 │ │ - b.n 3aaa6 │ │ + b.n 3adae │ │ @ instruction: 0xffff47ef │ │ │ │ -0003aaa8 : │ │ +0003adb0 : │ │ push {r4, r5, r7, lr} │ │ sub sp, #8 │ │ ldr r3, [r0, #0] │ │ ldr r2, [r0, #8] │ │ subs r3, r3, r2 │ │ cmp r3, #3 │ │ - bls.n 3aac8 │ │ + bls.n 3add0 │ │ ldr r3, [r0, #4] │ │ eor.w r1, r1, #2147483648 @ 0x80000000 │ │ rev r1, r1 │ │ str r1, [r3, r2] │ │ adds r1, r2, #4 │ │ str r1, [r0, #8] │ │ add sp, #8 │ │ pop {r4, r5, r7, pc} │ │ movs r3, #1 │ │ mov r5, r1 │ │ mov r1, r2 │ │ movs r2, #4 │ │ str r3, [sp, #0] │ │ mov r4, r0 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r2, [r4, #8] │ │ mov r1, r5 │ │ mov r0, r4 │ │ - b.n 3aab6 │ │ + b.n 3adbe │ │ │ │ -0003aae0 : │ │ +0003ade8 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #20 │ │ cmp r1, #0 │ │ - beq.n 3ab94 │ │ + beq.n 3ae9c │ │ mov r3, r1 │ │ lsls r1, r2, #2 │ │ cmp r1, #17 │ │ - bcs.n 3ab9a │ │ + bcs.n 3aea2 │ │ cmp r1, #8 │ │ - bls.w 3af5c │ │ + bls.w 3b264 │ │ ldr r2, [r3, #0] │ │ movw r6, #14777 @ 0x39b9 │ │ ldr.w r8, [r3, #4] │ │ add r3, r1 │ │ movt r6, #59970 @ 0xea42 │ │ eors r2, r6 │ │ ldr.w r5, [r3, #-8] │ │ @@ -27465,33 +27654,33 @@ │ │ movw r5, #26513 @ 0x6791 │ │ movt r5, #5718 @ 0x1656 │ │ eor.w r1, r1, r2, lsr #5 │ │ umull r7, r6, r1, r3 │ │ mla r1, r1, r5, r6 │ │ mla r1, r2, r3, r1 │ │ eor.w r4, r1, r7 │ │ - b.n 3b01e │ │ + b.n 3b326 │ │ movs r4, #0 │ │ movs r1, #0 │ │ - b.n 3b01e │ │ + b.n 3b326 │ │ cmp r1, #129 @ 0x81 │ │ - bcs.w 3afe6 │ │ + bcs.w 3b2ee │ │ movw r2, #51847 @ 0xca87 │ │ movw r7, #31153 @ 0x79b1 │ │ movt r2, #34283 @ 0x85eb │ │ movt r7, #40503 @ 0x9e37 │ │ umull r6, r2, r1, r2 │ │ cmp r1, #33 @ 0x21 │ │ mla r2, r1, r7, r2 │ │ strd r2, r6, [sp, #12] │ │ - bcc.w 3ae6e │ │ + bcc.w 3b176 │ │ cmp r1, #64 @ 0x40 │ │ - bls.w 3ad8c │ │ + bls.w 3b094 │ │ cmp r1, #96 @ 0x60 │ │ - bls.n 3acac │ │ + bls.n 3afb4 │ │ adds r2, r3, r1 │ │ movw r4, #20874 @ 0x518a │ │ movt r4, #19424 @ 0x4be0 │ │ mov.w ip, #0 │ │ ldr.w r7, [r2, #-64] │ │ ldr.w r5, [r2, #-56] │ │ eors r7, r4 │ │ @@ -27748,17 +27937,17 @@ │ │ movw r3, #31225 @ 0x79f9 │ │ movt r3, #40503 @ 0x9e37 │ │ eor.w r2, r2, r1, lsr #5 │ │ umull r7, r6, r2, r3 │ │ mla r2, r2, r5, r6 │ │ mla r1, r1, r3, r2 │ │ eor.w r4, r1, r7 │ │ - b.n 3b01e │ │ + b.n 3b326 │ │ cmp r1, #0 │ │ - beq.n 3b00e │ │ + beq.n 3b316 │ │ adds r2, r3, r1 │ │ movw r7, #45428 @ 0xb174 │ │ ldr r3, [r3, #0] │ │ movt r7, #51002 @ 0xc73a │ │ ldr.w r2, [r2, #-4] │ │ movw ip, #7269 @ 0x1c65 │ │ eors r3, r7 │ │ @@ -27791,42 +27980,42 @@ │ │ adc.w r7, r5, #0 │ │ eors r2, r7 │ │ mla r1, r2, r6, r1 │ │ lsrs r2, r3, #28 │ │ orr.w r2, r2, r1, lsl #4 │ │ eor.w r1, r1, r1, lsr #28 │ │ eor.w r4, r2, r3 │ │ - b.n 3b01e │ │ + b.n 3b326 │ │ mov r5, r0 │ │ cmp r1, #241 @ 0xf1 │ │ - bcs.n 3affe │ │ - ldr r0, [pc, #104] @ (3b058 ) │ │ + bcs.n 3b306 │ │ + ldr r0, [pc, #104] @ (3b360 ) │ │ movs r2, #0 │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, r3 │ │ movs r3, #0 │ │ - bl 996ec │ │ - b.n 3b008 │ │ + bl 996f8 │ │ + b.n 3b310 │ │ mov r0, r3 │ │ movs r2, #0 │ │ movs r3, #0 │ │ - bl 99110 │ │ + bl 9911c │ │ mov r4, r0 │ │ mov r0, r5 │ │ - b.n 3b01e │ │ + b.n 3b326 │ │ movw r1, #32773 @ 0x8005 │ │ movw r4, #38082 @ 0x94c2 │ │ movt r1, #11526 @ 0x2d06 │ │ movt r4, #14547 @ 0x38d3 │ │ ldr r3, [r0, #0] │ │ ldr r2, [r0, #8] │ │ subs r3, r3, r2 │ │ cmp r3, #7 │ │ - bls.n 3b040 │ │ + bls.n 3b348 │ │ ldr r3, [r0, #4] │ │ rev r1, r1 │ │ str r1, [r3, r2] │ │ add.w r1, r2, #8 │ │ str r1, [r0, #8] │ │ adds r0, r3, r2 │ │ rev r1, r4 │ │ @@ -27835,31 +28024,31 @@ │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r3, #1 │ │ mov r6, r1 │ │ mov r1, r2 │ │ movs r2, #8 │ │ str r3, [sp, #0] │ │ mov r5, r0 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r2, [r5, #8] │ │ mov r1, r6 │ │ mov r0, r5 │ │ - b.n 3b028 │ │ - movs r7, #140 @ 0x8c │ │ - Address 0x3b05a is out of bounds. │ │ + b.n 3b330 │ │ + movs r4, #132 @ 0x84 │ │ + Address 0x3b362 is out of bounds. │ │ │ │ │ │ -0003b05c : │ │ +0003b364 : │ │ push {r4, r5, r6, lr} │ │ sub sp, #8 │ │ ldr r6, [r0, #0] │ │ ldr r1, [r0, #8] │ │ subs r6, r6, r1 │ │ cmp r6, #7 │ │ - bls.n 3b084 │ │ + bls.n 3b38c │ │ ldr r6, [r0, #4] │ │ eor.w r3, r3, #2147483648 @ 0x80000000 │ │ rev r3, r3 │ │ str r3, [r6, r1] │ │ add.w r3, r1, #8 │ │ str r3, [r0, #8] │ │ adds r0, r6, r1 │ │ @@ -27870,32 +28059,32 @@ │ │ movs r6, #1 │ │ mov r5, r2 │ │ str r6, [sp, #0] │ │ mov r6, r3 │ │ movs r2, #8 │ │ movs r3, #1 │ │ mov r4, r0 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ mov r3, r6 │ │ mov r0, r4 │ │ mov r2, r5 │ │ - b.n 3b06a │ │ + b.n 3b372 │ │ │ │ -0003b0a0 : │ │ +0003b3a8 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #20 │ │ cmp r1, #0 │ │ - beq.n 3b154 │ │ + beq.n 3b45c │ │ mov r3, r1 │ │ lsls r1, r2, #3 │ │ cmp r1, #17 │ │ - bcs.n 3b15a │ │ + bcs.n 3b462 │ │ cmp r1, #8 │ │ - bls.w 3b51c │ │ + bls.w 3b824 │ │ ldr r2, [r3, #0] │ │ movw r6, #14777 @ 0x39b9 │ │ ldr.w r8, [r3, #4] │ │ add r3, r1 │ │ movt r6, #59970 @ 0xea42 │ │ eors r2, r6 │ │ ldr.w r5, [r3, #-8] │ │ @@ -27933,33 +28122,33 @@ │ │ movw r5, #26513 @ 0x6791 │ │ movt r5, #5718 @ 0x1656 │ │ eor.w r1, r1, r2, lsr #5 │ │ umull r7, r6, r1, r3 │ │ mla r1, r1, r5, r6 │ │ mla r1, r2, r3, r1 │ │ eor.w r4, r1, r7 │ │ - b.n 3b5de │ │ + b.n 3b8e6 │ │ movs r4, #0 │ │ movs r1, #0 │ │ - b.n 3b5de │ │ + b.n 3b8e6 │ │ cmp r1, #129 @ 0x81 │ │ - bcs.w 3b5a6 │ │ + bcs.w 3b8ae │ │ movw r2, #51847 @ 0xca87 │ │ movw r7, #31153 @ 0x79b1 │ │ movt r2, #34283 @ 0x85eb │ │ movt r7, #40503 @ 0x9e37 │ │ umull r6, r2, r1, r2 │ │ cmp r1, #33 @ 0x21 │ │ mla r2, r1, r7, r2 │ │ strd r2, r6, [sp, #12] │ │ - bcc.w 3b42e │ │ + bcc.w 3b736 │ │ cmp r1, #64 @ 0x40 │ │ - bls.w 3b34c │ │ + bls.w 3b654 │ │ cmp r1, #96 @ 0x60 │ │ - bls.n 3b26c │ │ + bls.n 3b574 │ │ adds r2, r3, r1 │ │ movw r4, #20874 @ 0x518a │ │ movt r4, #19424 @ 0x4be0 │ │ mov.w ip, #0 │ │ ldr.w r7, [r2, #-64] │ │ ldr.w r5, [r2, #-56] │ │ eors r7, r4 │ │ @@ -28216,17 +28405,17 @@ │ │ movw r3, #31225 @ 0x79f9 │ │ movt r3, #40503 @ 0x9e37 │ │ eor.w r2, r2, r1, lsr #5 │ │ umull r7, r6, r2, r3 │ │ mla r2, r2, r5, r6 │ │ mla r1, r1, r3, r2 │ │ eor.w r4, r1, r7 │ │ - b.n 3b5de │ │ + b.n 3b8e6 │ │ cmp r1, #0 │ │ - beq.n 3b5ce │ │ + beq.n 3b8d6 │ │ adds r2, r3, r1 │ │ movw r7, #45428 @ 0xb174 │ │ ldr r3, [r3, #0] │ │ movt r7, #51002 @ 0xc73a │ │ ldr.w r2, [r2, #-4] │ │ movw ip, #7269 @ 0x1c65 │ │ eors r3, r7 │ │ @@ -28259,42 +28448,42 @@ │ │ adc.w r7, r5, #0 │ │ eors r2, r7 │ │ mla r1, r2, r6, r1 │ │ lsrs r2, r3, #28 │ │ orr.w r2, r2, r1, lsl #4 │ │ eor.w r1, r1, r1, lsr #28 │ │ eor.w r4, r2, r3 │ │ - b.n 3b5de │ │ + b.n 3b8e6 │ │ mov r5, r0 │ │ cmp r1, #241 @ 0xf1 │ │ - bcs.n 3b5be │ │ - ldr r0, [pc, #104] @ (3b618 ) │ │ + bcs.n 3b8c6 │ │ + ldr r0, [pc, #104] @ (3b920 ) │ │ movs r2, #0 │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, r3 │ │ movs r3, #0 │ │ - bl 996ec │ │ - b.n 3b5c8 │ │ + bl 996f8 │ │ + b.n 3b8d0 │ │ mov r0, r3 │ │ movs r2, #0 │ │ movs r3, #0 │ │ - bl 99110 │ │ + bl 9911c │ │ mov r4, r0 │ │ mov r0, r5 │ │ - b.n 3b5de │ │ + b.n 3b8e6 │ │ movw r1, #32773 @ 0x8005 │ │ movw r4, #38082 @ 0x94c2 │ │ movt r1, #11526 @ 0x2d06 │ │ movt r4, #14547 @ 0x38d3 │ │ ldr r3, [r0, #0] │ │ ldr r2, [r0, #8] │ │ subs r3, r3, r2 │ │ cmp r3, #7 │ │ - bls.n 3b600 │ │ + bls.n 3b908 │ │ ldr r3, [r0, #4] │ │ rev r1, r1 │ │ str r1, [r3, r2] │ │ add.w r1, r2, #8 │ │ str r1, [r0, #8] │ │ adds r0, r3, r2 │ │ rev r1, r4 │ │ @@ -28303,112 +28492,112 @@ │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r3, #1 │ │ mov r6, r1 │ │ mov r1, r2 │ │ movs r2, #8 │ │ str r3, [sp, #0] │ │ mov r5, r0 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r2, [r5, #8] │ │ mov r1, r6 │ │ mov r0, r5 │ │ - b.n 3b5e8 │ │ - movs r1, #204 @ 0xcc │ │ - Address 0x3b61a is out of bounds. │ │ + b.n 3b8f0 │ │ + subs r4, r0, #3 │ │ + Address 0x3b922 is out of bounds. │ │ │ │ │ │ -0003b61c : │ │ +0003b924 : │ │ push {r4, r5, r6, lr} │ │ sub sp, #24 │ │ mov r4, r2 │ │ - cbz r1, 3b650 │ │ + cbz r1, 3b958 │ │ mov r6, r0 │ │ mov r0, r1 │ │ mov r5, r1 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #8 │ │ mov r1, r5 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #8] │ │ cmp r0, #1 │ │ - beq.n 3b65e │ │ + beq.n 3b966 │ │ ldrd r1, r2, [sp, #12] │ │ mov r0, r6 │ │ mov r3, r4 │ │ add sp, #24 │ │ ldmia.w sp!, {r4, r5, r6, lr} │ │ - b.w 4fbac │ │ + b.w 4fdbc │ │ movs r1, #0 │ │ mov r3, r4 │ │ add sp, #24 │ │ ldmia.w sp!, {r4, r5, r6, lr} │ │ - b.w 4fbac │ │ + b.w 4fdbc │ │ movs r0, #33 @ 0x21 │ │ movs r5, #33 @ 0x21 │ │ - blx d87f0 │ │ - cbnz r0, 3b670 │ │ + blx d8810 │ │ + cbnz r0, 3b978 │ │ movs r0, #1 │ │ movs r1, #33 @ 0x21 │ │ - bl 3dfa4 │ │ - ldr r1, [pc, #44] @ (3b6a0 ) │ │ + bl 3e2ac │ │ + ldr r1, [pc, #44] @ (3b9a8 ) │ │ movs r2, #33 @ 0x21 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ - ldr r0, [pc, #36] @ (3b6a4 ) │ │ + bl d52ea │ │ + ldr r0, [pc, #36] @ (3b9ac ) │ │ movs r2, #10 │ │ - ldr r3, [pc, #36] @ (3b6a8 ) │ │ + ldr r3, [pc, #36] @ (3b9b0 ) │ │ movt r2, #32768 @ 0x8000 │ │ - ldr r1, [pc, #36] @ (3b6ac ) │ │ + ldr r1, [pc, #36] @ (3b9b4 ) │ │ add r0, pc │ │ str r2, [sp, #8] │ │ add r3, pc │ │ add r1, pc │ │ add r2, sp, #8 │ │ str r5, [sp, #20] │ │ strd r5, r4, [sp, #12] │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ - ldr r6, [r0, #28] │ │ - @ instruction: 0xfffdddfb │ │ - vtbx.8 d30, {d13-d15}, d12 │ │ + bl 417b8 │ │ + str r6, [r7, #104] @ 0x68 │ │ + @ instruction: 0xfffddaf3 │ │ + vqshl.u32 d30, d20, #29 │ │ movs r1, r1 │ │ - cdp 0, 9, cr0, cr14, cr9, {0} │ │ + sub.w r0, r6, r9 │ │ │ │ -0003b6b0 : │ │ +0003b9b8 : │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #28 │ │ mov r4, r0 │ │ movs r6, #0 │ │ - cbz r1, 3b6dc │ │ + cbz r1, 3b9e4 │ │ mov r0, r1 │ │ mov r7, r2 │ │ mov r5, r1 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #12 │ │ mov r1, r5 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ - beq.n 3b720 │ │ + beq.n 3ba28 │ │ ldrd r0, r1, [sp, #16] │ │ mov r2, r7 │ │ - b.n 3b6de │ │ + b.n 3b9e6 │ │ movs r0, #0 │ │ strd r6, r6, [sp] │ │ - bl 4ee30 │ │ + bl 4f040 │ │ mov r2, r1 │ │ ldr r3, [r4, #0] │ │ ldr r1, [r4, #8] │ │ subs r3, r3, r1 │ │ cmp r3, #7 │ │ - bls.n 3b708 │ │ + bls.n 3ba10 │ │ ldr r3, [r4, #4] │ │ rev r2, r2 │ │ rev r0, r0 │ │ str r2, [r3, r1] │ │ add.w r2, r1, #8 │ │ add r1, r3 │ │ str r2, [r4, #8] │ │ @@ -28417,137 +28606,137 @@ │ │ pop {r4, r5, r6, r7, pc} │ │ movs r3, #1 │ │ mov r5, r0 │ │ mov r6, r2 │ │ mov r0, r4 │ │ movs r2, #8 │ │ str r3, [sp, #0] │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ mov r2, r6 │ │ mov r0, r5 │ │ - b.n 3b6f2 │ │ + b.n 3b9fa │ │ movs r0, #33 @ 0x21 │ │ movs r5, #33 @ 0x21 │ │ - blx d87f0 │ │ - cbnz r0, 3b732 │ │ + blx d8810 │ │ + cbnz r0, 3ba3a │ │ movs r0, #1 │ │ movs r1, #33 @ 0x21 │ │ - bl 3dfa4 │ │ - ldr r1, [pc, #48] @ (3b764 ) │ │ + bl 3e2ac │ │ + ldr r1, [pc, #48] @ (3ba6c ) │ │ movs r2, #33 @ 0x21 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ - ldr r0, [pc, #40] @ (3b768 ) │ │ + bl d52ea │ │ + ldr r0, [pc, #40] @ (3ba70 ) │ │ movs r2, #10 │ │ - ldr r3, [pc, #40] @ (3b76c ) │ │ + ldr r3, [pc, #40] @ (3ba74 ) │ │ movt r2, #32768 @ 0x8000 │ │ - ldr r1, [pc, #36] @ (3b770 ) │ │ + ldr r1, [pc, #36] @ (3ba78 ) │ │ add r0, pc │ │ str r2, [sp, #12] │ │ add r3, pc │ │ add r1, pc │ │ add r2, sp, #12 │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ str r5, [sp, #24] │ │ strd r5, r4, [sp, #16] │ │ - bl 414b0 │ │ + bl 417b8 │ │ nop │ │ - ldr r4, [r0, #16] │ │ - vcvt.u16.f16 d29, d25, #3 │ │ - vtbl.8 d30, {d29-d30}, d10 │ │ + str r4, [r7, #92] @ 0x5c │ │ + vshll.u32 , d17, #29 │ │ + vqshlu.s32 q15, q9, #29 │ │ movs r1, r1 │ │ - stcl 0, cr0, [ip, #36]! @ 0x24 │ │ + @ instruction: 0xeaf40009 │ │ │ │ -0003b774 : │ │ +0003ba7c : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #44 @ 0x2c │ │ mov r7, r0 │ │ movs r0, #0 │ │ - cbz r1, 3b7ee │ │ + cbz r1, 3baf6 │ │ mov r6, r1 │ │ movs r1, #4 │ │ str r0, [sp, #24] │ │ strd r0, r1, [sp, #16] │ │ - cbz r2, 3b7ee │ │ + cbz r2, 3baf6 │ │ add.w sl, sp, #28 │ │ str r7, [sp, #12] │ │ mov fp, r3 │ │ lsls r5, r2, #2 │ │ movs r7, #0 │ │ mov.w r8, #4 │ │ - b.n 3b7ba │ │ + b.n 3bac2 │ │ movs r4, #0 │ │ ldr r0, [sp, #16] │ │ cmp r7, r0 │ │ - beq.n 3b7e2 │ │ + beq.n 3baea │ │ add.w r0, r8, r7, lsl #3 │ │ str.w r4, [r8, r7, lsl #3] │ │ adds r7, #1 │ │ subs r5, #4 │ │ str.w r9, [r0, #4] │ │ str r7, [sp, #24] │ │ - beq.n 3b7f2 │ │ + beq.n 3bafa │ │ ldr.w r4, [r6, r7, lsl #2] │ │ cmp r4, #0 │ │ - beq.n 3b79e │ │ + beq.n 3baa6 │ │ mov r0, r4 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ mov r0, sl │ │ mov r1, r4 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #28] │ │ cmp r0, #1 │ │ - beq.n 3b872 │ │ + beq.n 3bb7a │ │ ldrd r4, r9, [sp, #32] │ │ ldr r0, [sp, #16] │ │ cmp r7, r0 │ │ - bne.n 3b7a6 │ │ + bne.n 3baae │ │ add r0, sp, #16 │ │ - bl 33272 │ │ + bl 333c2 │ │ ldr.w r8, [sp, #20] │ │ - b.n 3b7a6 │ │ + b.n 3baae │ │ movs r1, #0 │ │ - b.n 3b836 │ │ + b.n 3bb3e │ │ ldr r4, [sp, #16] │ │ cmp.w r4, #2147483648 @ 0x80000000 │ │ - bne.n 3b802 │ │ + bne.n 3bb0a │ │ movs r0, #0 │ │ movs r1, #0 │ │ ldr r7, [sp, #12] │ │ - b.n 3b836 │ │ + b.n 3bb3e │ │ ldr r6, [sp, #20] │ │ movs r0, #0 │ │ movs r1, #0 │ │ add.w r5, r6, r7, lsl #3 │ │ mov r7, r6 │ │ ldrd r2, r3, [r7], #8 │ │ strd r0, r1, [sp] │ │ mov r1, r3 │ │ mov r0, r2 │ │ mov r2, fp │ │ - bl 4ee30 │ │ + bl 4f040 │ │ cmp r7, r5 │ │ - bne.n 3b80e │ │ + bne.n 3bb16 │ │ ldr r7, [sp, #12] │ │ - cbz r4, 3b836 │ │ + cbz r4, 3bb3e │ │ mov r4, r0 │ │ mov r0, r6 │ │ mov r5, r1 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r1, r5 │ │ mov r0, r4 │ │ ldr r3, [r7, #0] │ │ ldr r2, [r7, #8] │ │ subs r3, r3, r2 │ │ cmp r3, #7 │ │ - bls.n 3b858 │ │ + bls.n 3bb60 │ │ ldr r3, [r7, #4] │ │ rev r1, r1 │ │ rev r0, r0 │ │ str r1, [r3, r2] │ │ add.w r1, r2, #8 │ │ str r1, [r7, #8] │ │ adds r1, r3, r2 │ │ @@ -28557,660 +28746,664 @@ │ │ movs r3, #1 │ │ mov r4, r0 │ │ mov r5, r1 │ │ mov r1, r2 │ │ mov r0, r7 │ │ movs r2, #8 │ │ str r3, [sp, #0] │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r2, [r7, #8] │ │ mov r1, r5 │ │ mov r0, r4 │ │ - b.n 3b840 │ │ + b.n 3bb48 │ │ movs r0, #33 @ 0x21 │ │ movs r5, #33 @ 0x21 │ │ - blx d87f0 │ │ - cbnz r0, 3b884 │ │ + blx d8810 │ │ + cbnz r0, 3bb8c │ │ movs r0, #1 │ │ movs r1, #33 @ 0x21 │ │ - bl 3dfa4 │ │ - ldr r1, [pc, #44] @ (3b8b4 ) │ │ + bl 3e2ac │ │ + ldr r1, [pc, #44] @ (3bbbc ) │ │ movs r2, #33 @ 0x21 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ - ldr r0, [pc, #36] @ (3b8b8 ) │ │ + bl d52ea │ │ + ldr r0, [pc, #36] @ (3bbc0 ) │ │ movs r2, #10 │ │ - ldr r3, [pc, #36] @ (3b8bc ) │ │ + ldr r3, [pc, #36] @ (3bbc4 ) │ │ movt r2, #32768 @ 0x8000 │ │ - ldr r1, [pc, #36] @ (3b8c0 ) │ │ + ldr r1, [pc, #36] @ (3bbc8 ) │ │ add r0, pc │ │ str r2, [sp, #28] │ │ add r3, pc │ │ add r1, pc │ │ add r2, sp, #28 │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ str r5, [sp, #40] @ 0x28 │ │ strd r5, r4, [sp, #32] │ │ - bl 414b0 │ │ - str r2, [r6, #120] @ 0x78 │ │ - vtbx.8 d29, {d29- │ │ + str r2, [r5, #72] @ 0x48 │ │ + @ instruction: 0xfffdd8df │ │ + vceq.f d30, d16, #0 │ │ movs r1, r1 │ │ - stc 0, cr0, [sl], #36 @ 0x24 │ │ + @ instruction: 0xe9b20009 │ │ │ │ -0003b8c4 : │ │ +0003bbcc : │ │ push {r4, lr} │ │ mov r4, r0 │ │ movs r0, #12 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ itttt ne │ │ movne r1, #0 │ │ movne r2, #1 │ │ strdne r1, r2, [r0] │ │ strne r1, [r0, #8] │ │ itt ne │ │ strne r0, [r4, #0] │ │ popne {r4, pc} │ │ movs r0, #4 │ │ movs r1, #12 │ │ - bl 3de2a │ │ + bl 3e132 │ │ │ │ -0003b8ea : │ │ +0003bbf2 : │ │ push {r4, lr} │ │ ldrd lr, ip, [r0, #4] │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ mov r2, ip │ │ sub.w r3, lr, #1 │ │ mov r0, r2 │ │ - cbz r2, 3b922 │ │ + cbz r2, 3bc2a │ │ ldrb r4, [r3, r0] │ │ adds r1, #1 │ │ subs r2, r0, #1 │ │ cmp r4, #0 │ │ - beq.n 3b8fa │ │ + beq.n 3bc02 │ │ subs r3, r4, #1 │ │ cmp r0, ip │ │ strb.w r3, [lr, r2] │ │ - bcs.n 3b922 │ │ + bcs.n 3bc2a │ │ add.w r2, lr, r0 │ │ mov r4, r0 │ │ mov r0, r2 │ │ movs r2, #255 @ 0xff │ │ - bl d50b2 │ │ + bl d5294 │ │ mov r0, r4 │ │ cmp r0, #0 │ │ it ne │ │ movne r0, #1 │ │ pop {r4, pc} │ │ │ │ -0003b92a : │ │ +0003bc32 : │ │ push {r4, lr} │ │ ldrd r0, lr, [r0, #4] │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ mov r2, lr │ │ sub.w ip, r0, #1 │ │ mov r4, r2 │ │ - cbz r2, 3b95a │ │ + cbz r2, 3bc62 │ │ ldrb.w r3, [ip, r4] │ │ adds r1, #1 │ │ subs r2, r4, #1 │ │ cmp r3, #255 @ 0xff │ │ - beq.n 3b93a │ │ + beq.n 3bc42 │ │ cmp r4, lr │ │ add.w r3, r3, #1 │ │ strb r3, [r0, r2] │ │ itt cc │ │ addcc r0, r4 │ │ - blcc d5370 │ │ + blcc d5242 │ │ cmp r4, #0 │ │ it ne │ │ movne r4, #1 │ │ mov r0, r4 │ │ pop {r4, pc} │ │ │ │ -0003b964 : │ │ +0003bc6c : │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #36 @ 0x24 │ │ mov r5, r0 │ │ movs r0, #32 │ │ mov r6, r3 │ │ mov r7, r2 │ │ mov r4, r1 │ │ - blx d87f0 │ │ - cbz r0, 3b9c0 │ │ - ldr r3, [pc, #76] @ (3b9c8 ) │ │ + blx d8810 │ │ + cbz r0, 3bcc8 │ │ + ldr r3, [pc, #76] @ (3bcd0 ) │ │ mov r2, r0 │ │ ldrd r1, r0, [sp, #56] @ 0x38 │ │ strd r1, r0, [r2, #8] │ │ add r3, pc │ │ add r0, sp, #16 │ │ ldrd lr, ip, [sp, #64] @ 0x40 │ │ mov r1, r4 │ │ strd r7, r6, [r2] │ │ strd lr, ip, [r2, #16] │ │ str r5, [r2, #24] │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #16] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 3b9b4 │ │ + beq.n 3bcbc │ │ add r3, sp, #16 │ │ add.w ip, sp, #4 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #0] │ │ mov r0, sp │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #36 @ 0x24 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #8 │ │ movs r1, #32 │ │ - bl 3de2a │ │ - @ instruction: 0xe9940009 │ │ + bl 3e132 │ │ + b.n 3ba0c │ │ + movs r1, r1 │ │ │ │ -0003b9cc : │ │ +0003bcd4 : │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #36 @ 0x24 │ │ mov r5, r0 │ │ movs r0, #32 │ │ mov r6, r3 │ │ mov r7, r2 │ │ mov r4, r1 │ │ - blx d87f0 │ │ - cbz r0, 3ba28 │ │ - ldr r3, [pc, #76] @ (3ba30 ) │ │ + blx d8810 │ │ + cbz r0, 3bd30 │ │ + ldr r3, [pc, #76] @ (3bd38 ) │ │ mov r2, r0 │ │ ldrd r1, r0, [sp, #56] @ 0x38 │ │ strd r1, r0, [r2, #8] │ │ add r3, pc │ │ add r0, sp, #16 │ │ ldrd lr, ip, [sp, #64] @ 0x40 │ │ mov r1, r4 │ │ strd r7, r6, [r2] │ │ strd lr, ip, [r2, #16] │ │ str r5, [r2, #24] │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #16] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 3ba1c │ │ + beq.n 3bd24 │ │ add r3, sp, #16 │ │ add.w ip, sp, #4 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #0] │ │ mov r0, sp │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #36 @ 0x24 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #8 │ │ movs r1, #32 │ │ - bl 3de2a │ │ - strd r0, r0, [ip], #36 @ 0x24 │ │ + bl 3e132 │ │ + b.n 3b924 │ │ + movs r1, r1 │ │ │ │ -0003ba34 : │ │ +0003bd3c : │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #36 @ 0x24 │ │ mov r5, r0 │ │ movs r0, #24 │ │ mov r6, r3 │ │ mov r7, r2 │ │ mov r4, r1 │ │ - blx d87f0 │ │ - cbz r0, 3ba88 │ │ - ldr r3, [pc, #68] @ (3ba90 ) │ │ + blx d8810 │ │ + cbz r0, 3bd90 │ │ + ldr r3, [pc, #68] @ (3bd98 ) │ │ mov r2, r0 │ │ ldrd r1, r0, [sp, #56] @ 0x38 │ │ strd r1, r0, [r2, #8] │ │ add r3, pc │ │ add r0, sp, #16 │ │ mov r1, r4 │ │ strd r7, r6, [r2] │ │ str r5, [r2, #16] │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #16] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 3ba7c │ │ + beq.n 3bd84 │ │ add r3, sp, #16 │ │ add.w ip, sp, #4 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #0] │ │ mov r0, sp │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #36 @ 0x24 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #8 │ │ movs r1, #24 │ │ - bl 3de2a │ │ - stmia.w r4!, {r0, r3} │ │ + bl 3e132 │ │ + b.n 3b8f4 │ │ + movs r1, r1 │ │ │ │ -0003ba94 : │ │ +0003bd9c : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ sub sp, #36 @ 0x24 │ │ mov r5, r0 │ │ movs r0, #40 @ 0x28 │ │ mov r6, r3 │ │ mov r7, r2 │ │ mov r4, r1 │ │ - blx d87f0 │ │ - cbz r0, 3bb02 │ │ + blx d8810 │ │ + cbz r0, 3be0a │ │ ldrd r1, r8, [sp, #80] @ 0x50 │ │ mov r2, r0 │ │ - ldr r3, [pc, #88] @ (3bb0c ) │ │ + ldr r3, [pc, #88] @ (3be14 ) │ │ ldrd r9, r0, [sp, #72] @ 0x48 │ │ str r1, [r2, #32] │ │ add r1, r0 │ │ strd r5, r0, [r2, #24] │ │ add r3, pc │ │ add r0, sp, #16 │ │ ldrd lr, ip, [sp, #64] @ 0x40 │ │ strd r9, r1, [r2] │ │ mov r1, r4 │ │ strb.w r8, [r2, #36] @ 0x24 │ │ strd r7, r6, [r2, #8] │ │ strd lr, ip, [r2, #16] │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #16] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 3baf4 │ │ + beq.n 3bdfc │ │ add r3, sp, #16 │ │ add.w ip, sp, #4 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #0] │ │ mov r0, sp │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ movs r0, #8 │ │ movs r1, #40 @ 0x28 │ │ - bl 3de2a │ │ + bl 3e132 │ │ nop │ │ - strex r0, r0, [sl, #36] @ 0x24 │ │ + b.n 3b8bc │ │ + movs r1, r1 │ │ │ │ -0003bb10 : │ │ +0003be18 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #68 @ 0x44 │ │ ldr r6, [sp, #108] @ 0x6c │ │ mov r5, r3 │ │ mov r7, r2 │ │ mov r9, r1 │ │ cmp r6, #0 │ │ mov sl, r0 │ │ it ne │ │ cmpne r6, #1 │ │ - bne.n 3bb7c │ │ + bne.n 3be84 │ │ movs r6, #8 │ │ movs r4, #0 │ │ mov.w r8, #0 │ │ movs r0, #24 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 3bc44 │ │ - ldr r3, [pc, #276] @ (3bc54 ) │ │ + beq.w 3bf4c │ │ + ldr r3, [pc, #276] @ (3bf5c ) │ │ mov r2, r0 │ │ strd r7, r5, [r0] │ │ mov r1, r9 │ │ add r3, pc │ │ strd r8, r6, [r0, #8] │ │ strd r4, sl, [r0, #16] │ │ add r0, sp, #48 @ 0x30 │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #48] @ 0x30 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 3bb6e │ │ + beq.n 3be76 │ │ add r3, sp, #48 @ 0x30 │ │ add.w ip, sp, #36 @ 0x24 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #32] │ │ add r0, sp, #32 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr.w fp, [sp, #104] @ 0x68 │ │ movs r0, #64 @ 0x40 │ │ strd r7, r5, [sp, #24] │ │ ldmia.w fp, {r4, r7, r8} │ │ ldr.w r5, [fp, #12] │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 3bc4c │ │ + beq.n 3bf54 │ │ stmia.w r0, {r4, r7, r8} │ │ movs r4, #1 │ │ mov.w r8, #4 │ │ cmp r6, #2 │ │ str r5, [r0, #12] │ │ strd r0, r4, [sp, #52] @ 0x34 │ │ str.w r8, [sp, #48] @ 0x30 │ │ - bne.n 3bbb2 │ │ + bne.n 3beba │ │ mov r6, r0 │ │ - b.n 3bc34 │ │ + b.n 3bf3c │ │ add.w r2, fp, r6, lsl #3 │ │ add.w r3, fp, #16 │ │ add.w lr, sp, #48 @ 0x30 │ │ strd sl, r9, [sp, #16] │ │ mov.w r9, #0 │ │ mov.w ip, #16 │ │ add.w r1, r3, r9 │ │ ldr.w r8, [sp, #48] @ 0x30 │ │ add.w fp, r1, #8 │ │ cmp fp, r2 │ │ - beq.n 3bc2e │ │ + beq.n 3bf36 │ │ ldr.w r7, [r3, r9] │ │ cmp r4, r8 │ │ ldr r5, [r1, #4] │ │ ldrd sl, r6, [fp] │ │ - beq.n 3bc06 │ │ + beq.n 3bf0e │ │ add.w r1, r0, r9 │ │ adds r4, #1 │ │ add.w r9, r9, #16 │ │ strd r7, r5, [r1, #16] │ │ strd sl, r6, [r1, #24] │ │ add.w r1, fp, #8 │ │ cmp r1, r2 │ │ str r4, [sp, #56] @ 0x38 │ │ - bne.n 3bbca │ │ - b.n 3bc2a │ │ + bne.n 3bed2 │ │ + b.n 3bf32 │ │ str r2, [sp, #12] │ │ mov r0, lr │ │ str r3, [sp, #8] │ │ mov r1, r4 │ │ movs r2, #1 │ │ movs r3, #8 │ │ str.w ip, [sp] │ │ mov r8, lr │ │ - bl 333a0 │ │ + bl 33568 │ │ ldrd r3, r2, [sp, #8] │ │ mov lr, r8 │ │ ldr r0, [sp, #52] @ 0x34 │ │ mov.w ip, #16 │ │ - b.n 3bbe8 │ │ + b.n 3bef0 │ │ ldr.w r8, [sp, #48] @ 0x30 │ │ ldr r6, [sp, #52] @ 0x34 │ │ ldrd sl, r9, [sp, #16] │ │ ldrd r7, r5, [sp, #24] │ │ movs r0, #24 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - bne.w 3bb3c │ │ + bne.w 3be44 │ │ movs r0, #8 │ │ movs r1, #24 │ │ - bl 3de2a │ │ + bl 3e132 │ │ movs r0, #8 │ │ movs r1, #64 @ 0x40 │ │ - bl 3dfa4 │ │ - b.n 3bb9c │ │ + bl 3e2ac │ │ + b.n 3b8b4 │ │ movs r1, r1 │ │ │ │ -0003bc58 : │ │ - ldr r0, [pc, #4] @ (3bc60 ) │ │ +0003bf60 : │ │ + ldr r0, [pc, #4] @ (3bf68 ) │ │ add r0, pc │ │ bx lr │ │ nop │ │ - tst r2, r7 │ │ - Address 0x3bc62 is out of bounds. │ │ + subs r7, #49 @ 0x31 │ │ + Address 0x3bf6a is out of bounds. │ │ │ │ │ │ -0003bc64 : │ │ +0003bf6c : │ │ push {r4, r5, r6, lr} │ │ sub sp, #32 │ │ mov r6, r0 │ │ movs r0, #8 │ │ mov r5, r2 │ │ mov r4, r1 │ │ - blx d87f0 │ │ - cbz r0, 3bcac │ │ - ldr r3, [pc, #60] @ (3bcb4 ) │ │ + blx d8810 │ │ + cbz r0, 3bfb4 │ │ + ldr r3, [pc, #60] @ (3bfbc ) │ │ mov r2, r0 │ │ add r0, sp, #16 │ │ mov r1, r4 │ │ add r3, pc │ │ strd r5, r6, [r2] │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #16] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 3bca0 │ │ + beq.n 3bfa8 │ │ add r3, sp, #16 │ │ add.w ip, sp, #4 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #0] │ │ mov r0, sp │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #32 │ │ pop {r4, r5, r6, pc} │ │ movs r0, #4 │ │ movs r1, #8 │ │ - bl 3de2a │ │ - b.n 3b92c │ │ + bl 3e132 │ │ + b.n 3c644 │ │ movs r1, r1 │ │ │ │ -0003bcb8 : │ │ +0003bfc0 : │ │ push {r4, r5, r6, lr} │ │ sub sp, #32 │ │ mov r6, r0 │ │ movs r0, #8 │ │ mov r5, r2 │ │ mov r4, r1 │ │ - blx d87f0 │ │ - cbz r0, 3bd00 │ │ - ldr r3, [pc, #60] @ (3bd08 ) │ │ + blx d8810 │ │ + cbz r0, 3c008 │ │ + ldr r3, [pc, #60] @ (3c010 ) │ │ mov r2, r0 │ │ add r0, sp, #16 │ │ mov r1, r4 │ │ add r3, pc │ │ strd r5, r6, [r2] │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #16] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 3bcf4 │ │ + beq.n 3bffc │ │ add r3, sp, #16 │ │ add.w ip, sp, #4 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #0] │ │ mov r0, sp │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #32 │ │ pop {r4, r5, r6, pc} │ │ movs r0, #4 │ │ movs r1, #8 │ │ - bl 3de2a │ │ - b.n 3b778 │ │ + bl 3e132 │ │ + b.n 3c490 │ │ movs r1, r1 │ │ │ │ -0003bd0c : │ │ +0003c014 : │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #36 @ 0x24 │ │ mov r6, r0 │ │ movs r0, #16 │ │ mov r5, r3 │ │ mov r7, r2 │ │ mov r4, r1 │ │ - blx d87f0 │ │ - cbz r0, 3bd5c │ │ - ldr r3, [pc, #64] @ (3bd64 ) │ │ + blx d8810 │ │ + cbz r0, 3c064 │ │ + ldr r3, [pc, #64] @ (3c06c ) │ │ mov r2, r0 │ │ ldr r0, [sp, #56] @ 0x38 │ │ mov r1, r4 │ │ strd r0, r6, [r2, #8] │ │ add r3, pc │ │ add r0, sp, #16 │ │ strd r7, r5, [r2] │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #16] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 3bd50 │ │ + beq.n 3c058 │ │ add r3, sp, #16 │ │ add.w ip, sp, #4 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #0] │ │ mov r0, sp │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #36 @ 0x24 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #8 │ │ movs r1, #16 │ │ - bl 3de2a │ │ - b.n 3b820 │ │ + bl 3e132 │ │ + b.n 3c538 │ │ movs r1, r1 │ │ │ │ -0003bd68 : │ │ +0003c070 : │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #36 @ 0x24 │ │ mov r6, r0 │ │ movs r0, #16 │ │ mov r5, r3 │ │ mov r7, r2 │ │ mov r4, r1 │ │ - blx d87f0 │ │ - cbz r0, 3bdb8 │ │ + blx d8810 │ │ + cbz r0, 3c0c0 │ │ mov r2, r0 │ │ ldr r0, [sp, #56] @ 0x38 │ │ - ldr r3, [pc, #60] @ (3bdc0 ) │ │ + ldr r3, [pc, #60] @ (3c0c8 ) │ │ mov r1, r4 │ │ strd r7, r5, [r2] │ │ strd r6, r0, [r2, #8] │ │ add r3, pc │ │ add r0, sp, #16 │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #16] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 3bdac │ │ + beq.n 3c0b4 │ │ add r3, sp, #16 │ │ add.w ip, sp, #4 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #0] │ │ mov r0, sp │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #36 @ 0x24 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #8 │ │ movs r1, #16 │ │ - bl 3de2a │ │ - b.n 3b75c │ │ + bl 3e132 │ │ + b.n 3c474 │ │ movs r1, r1 │ │ │ │ -0003bdc4 : │ │ +0003c0cc : │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #36 @ 0x24 │ │ cmp r3, #6 │ │ - bcs.n 3be2c │ │ + bcs.n 3c134 │ │ mov r6, r0 │ │ movs r0, #24 │ │ mov r7, r3 │ │ mov r4, r2 │ │ mov r5, r1 │ │ - blx d87f0 │ │ - cbz r0, 3be24 │ │ - ldr r3, [pc, #92] @ (3be3c ) │ │ + blx d8810 │ │ + cbz r0, 3c12c │ │ + ldr r3, [pc, #92] @ (3c144 ) │ │ mov r2, r0 │ │ ldrd r1, r0, [sp, #56] @ 0x38 │ │ strd r1, r0, [r2] │ │ add r3, pc │ │ add r0, sp, #16 │ │ ldr.w ip, [sp, #64] @ 0x40 │ │ mov r1, r4 │ │ strb r7, [r2, #20] │ │ strd r6, r5, [r2, #8] │ │ str.w ip, [r2, #16] │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #16] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 3be18 │ │ + beq.n 3c120 │ │ add r3, sp, #16 │ │ add.w ip, sp, #4 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #0] │ │ mov r0, sp │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #36 @ 0x24 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #8 │ │ movs r1, #24 │ │ - bl 3de2a │ │ - ldr r0, [pc, #16] @ (3be40 ) │ │ + bl 3e132 │ │ + ldr r0, [pc, #16] @ (3c148 ) │ │ movs r1, #40 @ 0x28 │ │ - ldr r2, [pc, #16] @ (3be44 ) │ │ + ldr r2, [pc, #16] @ (3c14c ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ + bl 3fd54 │ │ nop │ │ - b.n 3c4c0 │ │ + b.n 3c1d8 │ │ movs r1, r1 │ │ - bvs.n 3be7a │ │ - vmlal.u q15, d29, d20[0] │ │ + bcc.n 3c172 │ │ + vqrdmlsh.s , , d28[0] │ │ movs r1, r1 │ │ │ │ -0003be48 : │ │ +0003c150 : │ │ ldr r1, [r0, #0] │ │ - cbz r1, 3be5e │ │ + cbz r1, 3c166 │ │ cmp r1, #1 │ │ ite eq │ │ vldreq d16, [r0, #8] │ │ - vldrne d16, [pc, #32] @ 3be78 │ │ + vldrne d16, [pc, #32] @ 3c180 │ │ vmov r0, r1, d16 │ │ bx lr │ │ push {r7, lr} │ │ ldrd r0, r1, [r0, #8] │ │ - bl d523a │ │ + bl d534a │ │ vmov d16, r0, r1 │ │ ldmia.w sp!, {r7, lr} │ │ vmov r0, r1, d16 │ │ bx lr │ │ nop │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ ldrb r0, [r7, #31] │ │ │ │ -0003be80 : │ │ +0003c188 : │ │ ldr r1, [r0, #0] │ │ cmp r1, #0 │ │ itt eq │ │ ldrdeq r0, r1, [r0, #8] │ │ bxeq lr │ │ cmp r1, #1 │ │ ittt ne │ │ movne.w r1, #2147483648 @ 0x80000000 │ │ movne r0, #0 │ │ bxne lr │ │ push {r7, lr} │ │ vpush {d8} │ │ vldr d8, [r0, #8] │ │ vmov r0, r1, d8 │ │ - bl d5108 │ │ - vldr d16, [pc, #60] @ 3bee8 │ │ - vldr d17, [pc, #64] @ 3bef0 │ │ + bl d5170 │ │ + vldr d16, [pc, #60] @ 3c1f0 │ │ + vldr d17, [pc, #64] @ 3c1f8 │ │ vcmp.f64 d8, d16 │ │ vmrs APSR_nzcv, fpscr │ │ itt lt │ │ movlt r0, #0 │ │ movlt.w r1, #2147483648 @ 0x80000000 │ │ vcmp.f64 d8, d17 │ │ vmrs APSR_nzcv, fpscr │ │ @@ -29227,336 +29420,336 @@ │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ stmia r3!, {r5, r6, r7} │ │ @ instruction: 0xffffffff │ │ vrsra.u64 q10, , #1 │ │ │ │ -0003bef8 : │ │ +0003c200 : │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #36 @ 0x24 │ │ mov r7, r0 │ │ movs r0, #16 │ │ mov r5, r3 │ │ mov r4, r2 │ │ mov r6, r1 │ │ - blx d87f0 │ │ - cbz r0, 3bf48 │ │ + blx d8810 │ │ + cbz r0, 3c250 │ │ mov r2, r0 │ │ ldr r0, [sp, #56] @ 0x38 │ │ - ldr r3, [pc, #60] @ (3bf50 ) │ │ + ldr r3, [pc, #60] @ (3c258 ) │ │ mov r1, r4 │ │ strd r6, r5, [r2, #8] │ │ strd r7, r0, [r2] │ │ add r3, pc │ │ add r0, sp, #16 │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #16] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 3bf3c │ │ + beq.n 3c244 │ │ add r3, sp, #16 │ │ add.w ip, sp, #4 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #0] │ │ mov r0, sp │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #36 @ 0x24 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #4 │ │ movs r1, #16 │ │ - bl 3de2a │ │ - b.n 3b78c │ │ + bl 3e132 │ │ + b.n 3c4a4 │ │ movs r1, r1 │ │ │ │ -0003bf54 : │ │ +0003c25c : │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #40 @ 0x28 │ │ mov r8, r2 │ │ mov r5, r1 │ │ mov r6, r0 │ │ - cbz r3, 3bfca │ │ + cbz r3, 3c2d2 │ │ mov r0, r3 │ │ mov r7, r3 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #24 │ │ mov r1, r7 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #24] │ │ cmp r0, #1 │ │ - beq.n 3bfde │ │ + beq.n 3c2e6 │ │ ldrd r7, r4, [sp, #28] │ │ movs r0, #24 │ │ - blx d87f0 │ │ - cbz r0, 3bfd6 │ │ - ldr r3, [pc, #172] @ (3c034 ) │ │ + blx d8810 │ │ + cbz r0, 3c2de │ │ + ldr r3, [pc, #172] @ (3c33c ) │ │ mov r2, r0 │ │ ldrd r1, r0, [sp, #64] @ 0x40 │ │ strd r1, r0, [r2, #8] │ │ add r3, pc │ │ add r0, sp, #24 │ │ mov r1, r8 │ │ strd r6, r5, [r2] │ │ strd r7, r4, [r2, #16] │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #24] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 3bfbc │ │ + beq.n 3c2c4 │ │ add r3, sp, #24 │ │ add.w ip, sp, #12 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #8] │ │ add r0, sp, #8 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #40 @ 0x28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movs r7, #0 │ │ movs r0, #24 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - bne.n 3bf86 │ │ + bne.n 3c28e │ │ movs r0, #4 │ │ movs r1, #24 │ │ - bl 3de2a │ │ + bl 3e132 │ │ movs r0, #33 @ 0x21 │ │ movs r5, #33 @ 0x21 │ │ - blx d87f0 │ │ - cbnz r0, 3bff0 │ │ + blx d8810 │ │ + cbnz r0, 3c2f8 │ │ movs r0, #1 │ │ movs r1, #33 @ 0x21 │ │ - bl 3dfa4 │ │ - ldr r1, [pc, #48] @ (3c024 ) │ │ + bl 3e2ac │ │ + ldr r1, [pc, #48] @ (3c32c ) │ │ movs r2, #33 @ 0x21 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r2, #17 │ │ - ldr r0, [pc, #40] @ (3c028 ) │ │ - ldr r3, [pc, #40] @ (3c02c ) │ │ + ldr r0, [pc, #40] @ (3c330 ) │ │ + ldr r3, [pc, #40] @ (3c334 ) │ │ movt r2, #32768 @ 0x8000 │ │ - ldr r1, [pc, #40] @ (3c030 ) │ │ + ldr r1, [pc, #40] @ (3c338 ) │ │ subs r2, #7 │ │ str r2, [sp, #24] │ │ add r0, pc │ │ add r1, pc │ │ add r3, pc │ │ add r2, sp, #24 │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ str r5, [sp, #36] @ 0x24 │ │ strd r5, r4, [sp, #28] │ │ - bl 414b0 │ │ + bl 417b8 │ │ nop │ │ - str r6, [r0, #4] │ │ - vsri.32 , , #3 │ │ - vcge.s q15, q4, #0 │ │ + ldrb r6, [r7, r4] │ │ + vceq.i , , #0 │ │ + @ instruction: 0xfffdddb0 │ │ movs r1, r1 │ │ - b.n 3bad0 │ │ + b.n 3c7e8 │ │ movs r1, r1 │ │ - b.n 3c7a4 │ │ + b.n 3c4bc │ │ movs r1, r1 │ │ │ │ -0003c038 : │ │ +0003c340 : │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #36 @ 0x24 │ │ mov r7, r0 │ │ movs r0, #12 │ │ mov r5, r3 │ │ mov r6, r2 │ │ mov r4, r1 │ │ - blx d87f0 │ │ - cbz r0, 3c084 │ │ - ldr r3, [pc, #60] @ (3c08c ) │ │ + blx d8810 │ │ + cbz r0, 3c38c │ │ + ldr r3, [pc, #60] @ (3c394 ) │ │ mov r2, r0 │ │ strd r7, r6, [r0] │ │ mov r1, r4 │ │ str r5, [r0, #8] │ │ add r3, pc │ │ add r0, sp, #16 │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #16] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 3c078 │ │ + beq.n 3c380 │ │ add r3, sp, #16 │ │ add.w ip, sp, #4 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #0] │ │ mov r0, sp │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #36 @ 0x24 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #4 │ │ movs r1, #12 │ │ - bl 3de2a │ │ - b.n 3c630 │ │ + bl 3e132 │ │ + svc 216 @ 0xd8 │ │ movs r1, r1 │ │ │ │ -0003c090 : │ │ +0003c398 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #4 │ │ ldrd sl, fp, [r0, #92] @ 0x5c │ │ cmp.w fp, #0 │ │ str r0, [sp, #0] │ │ - beq.n 3c122 │ │ + beq.n 3c42a │ │ movs r4, #0 │ │ mov.w r9, #88 @ 0x58 │ │ - b.n 3c0bc │ │ + b.n 3c3c4 │ │ ldr r0, [r5, #72] @ 0x48 │ │ - cbz r0, 3c0b6 │ │ + cbz r0, 3c3be │ │ movs r0, #76 @ 0x4c │ │ ldr r0, [r5, r0] │ │ - blx d87c0 │ │ + blx d87d0 │ │ adds r4, #1 │ │ cmp r4, fp │ │ - beq.n 3c122 │ │ + beq.n 3c42a │ │ mla r5, r4, r9, sl │ │ movs r1, #1 │ │ ldr r0, [r5, #16] │ │ cmp r0, #0 │ │ it mi │ │ eormi.w r1, r0, #2147483648 @ 0x80000000 │ │ cmp r1, #0 │ │ - beq.n 3c0b6 │ │ + beq.n 3c3be │ │ cmp r1, #1 │ │ - bne.n 3c0aa │ │ + bne.n 3c3b2 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #20] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r6, r7, [r5, #32] │ │ - cbz r7, 3c100 │ │ + cbz r7, 3c408 │ │ add.w r8, r6, #16 │ │ ldr.w r0, [r8] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r8, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r8, r8, #48 @ 0x30 │ │ subs r7, #1 │ │ - bne.n 3c0e8 │ │ + bne.n 3c3f0 │ │ ldr r0, [r5, #28] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r5, #56] @ 0x38 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #60] @ 0x3c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r5, #68] @ 0x44 │ │ cmp r0, #0 │ │ - beq.n 3c0b6 │ │ + beq.n 3c3be │ │ movs r0, #72 @ 0x48 │ │ - b.n 3c0b0 │ │ + b.n 3c3b8 │ │ ldr r7, [sp, #0] │ │ ldr r0, [r7, #88] @ 0x58 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, sl │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r7 │ │ ldrb.w r1, [r0, #8]! │ │ cmp r1, #32 │ │ it ne │ │ - blne 31e6c │ │ + blne 31f38 │ │ ldrd r5, r4, [r7, #104] @ 0x68 │ │ - cbz r4, 3c15a │ │ + cbz r4, 3c462 │ │ add.w r6, r5, #16 │ │ ldr r0, [r6, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #48 @ 0x30 │ │ subs r4, #1 │ │ - bne.n 3c148 │ │ + bne.n 3c450 │ │ ldr r0, [r7, #100] @ 0x64 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r5, r4, [r7, #116] @ 0x74 │ │ - cbz r4, 3c182 │ │ + cbz r4, 3c48a │ │ add.w r6, r5, #16 │ │ ldr r0, [r6, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #48 @ 0x30 │ │ subs r4, #1 │ │ - bne.n 3c170 │ │ + bne.n 3c478 │ │ ldr r0, [r7, #112] @ 0x70 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r7 │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ - bmi.n 3c146 │ │ + b.w d871c │ │ + bmi.n 3c44e │ │ │ │ -0003c19c : │ │ +0003c4a4 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #28 │ │ mov r5, r0 │ │ ldr r0, [r0, #80] @ 0x50 │ │ ldr r1, [r0, #84] @ 0x54 │ │ cmp r1, r2 │ │ - bls.n 3c1ca │ │ + bls.n 3c4d2 │ │ ldr r0, [r0, #80] @ 0x50 │ │ add.w r1, r2, r2, lsl #2 │ │ add.w r7, r0, r1, lsl #3 │ │ ldrd r8, r4, [r7, #20] │ │ - cbz r4, 3c1f0 │ │ + cbz r4, 3c4f8 │ │ mov r0, r4 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 3c272 │ │ + beq.n 3c57a │ │ mov r6, r0 │ │ - b.n 3c1f2 │ │ + b.n 3c4fa │ │ movs r0, #24 │ │ movs r5, #24 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 3c26a │ │ - ldr r1, [pc, #164] @ (3c27c ) │ │ + beq.n 3c572 │ │ + ldr r1, [pc, #164] @ (3c584 ) │ │ movs r2, #24 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #10 │ │ str r5, [sp, #24] │ │ strd r5, r4, [sp, #16] │ │ movt r0, #32768 @ 0x8000 │ │ - b.n 3c24a │ │ + b.n 3c552 │ │ movs r6, #1 │ │ mov r0, r6 │ │ mov r1, r8 │ │ mov r2, r4 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr.w r8, [r5, #116] @ 0x74 │ │ ldmia.w r7, {r9, sl, fp} │ │ ldr r3, [r7, #12] │ │ ldr.w ip, [r7, #28] │ │ ldrb.w r7, [r7, #32] │ │ ldr r0, [r5, #108] @ 0x6c │ │ cmp r8, r0 │ │ - beq.n 3c258 │ │ + beq.n 3c560 │ │ add.w r1, r8, r8, lsl #1 │ │ ldr r0, [r5, #112] @ 0x70 │ │ lsls r2, r1, #4 │ │ str.w r9, [r0, r2] │ │ add.w r0, r0, r1, lsl #4 │ │ add.w r2, r8, #1 │ │ ldr r1, [sp, #64] @ 0x40 │ │ @@ -29568,46 +29761,46 @@ │ │ movs r0, #10 │ │ movt r0, #32768 @ 0x8000 │ │ str r2, [r5, #116] @ 0x74 │ │ adds r0, #7 │ │ stmia r1!, {r3, r4, r6} │ │ str r0, [sp, #12] │ │ add r0, sp, #12 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add.w r0, r5, #108 @ 0x6c │ │ strd r3, ip, [sp, #4] │ │ - bl 47a58 │ │ + bl 47e0e │ │ ldrd r3, ip, [sp, #4] │ │ - b.n 3c214 │ │ + b.n 3c51c │ │ movs r0, #1 │ │ movs r1, #24 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - ldrsh r0, [r6, r2] │ │ - Address 0x3c27e is out of bounds. │ │ + ldrh r0, [r5, r6] │ │ + Address 0x3c586 is out of bounds. │ │ │ │ │ │ -0003c280 : │ │ +0003c588 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #20 │ │ ldr r1, [r0, #84] @ 0x54 │ │ ldrd fp, sl, [sp, #56] @ 0x38 │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ - beq.n 3c306 │ │ + beq.n 3c60e │ │ ldr r7, [r0, #80] @ 0x50 │ │ ldr r6, [r0, #92] @ 0x5c │ │ ldrb.w r8, [r7, #36] @ 0x24 │ │ cmp r6, r1 │ │ ldr.w r9, [r7, #32] │ │ - beq.n 3c31a │ │ + beq.n 3c622 │ │ movs r1, #88 @ 0x58 │ │ ldr r7, [r0, #88] @ 0x58 │ │ mla r1, r6, r1, r7 │ │ adds r7, r6, #1 │ │ str r7, [r0, #92] @ 0x5c │ │ subs.w r7, fp, r2 │ │ mov.w r0, #0 │ │ @@ -29632,53 +29825,53 @@ │ │ movt r0, #32768 @ 0x8000 │ │ strd fp, sl, [r1, #32] │ │ str r0, [sp, #4] │ │ add r0, sp, #4 │ │ strd r5, r4, [r1, #40] @ 0x28 │ │ strb.w r8, [r1, #28] │ │ str.w r9, [r1, #24] │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #20 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r1, [r0, #80] @ 0x50 │ │ movs r6, #0 │ │ str r6, [r0, #92] @ 0x5c │ │ ldrb.w r8, [r1, #36] @ 0x24 │ │ ldr.w r9, [r1, #32] │ │ movs r1, #8 │ │ strd r6, r1, [r0, #84] @ 0x54 │ │ add.w r1, r0, #84 @ 0x54 │ │ mov r7, r0 │ │ mov r4, r2 │ │ mov r5, r3 │ │ mov r0, r1 │ │ - bl 47bf2 │ │ + bl 47cea │ │ mov r0, r7 │ │ mov r3, r5 │ │ mov r2, r4 │ │ - b.n 3c2a2 │ │ + b.n 3c5aa │ │ │ │ -0003c332 : │ │ +0003c63a : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #108 @ 0x6c │ │ mov r7, r0 │ │ ldr r0, [sp, #144] @ 0x90 │ │ mov r5, r3 │ │ mov r6, r2 │ │ ldrd r9, r8, [r0] │ │ ldr.w sl, [r0, #8] │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #148] @ 0x94 │ │ ldr r1, [r0, #0] │ │ str r1, [sp, #60] @ 0x3c │ │ ldr r1, [r0, #4] │ │ str r1, [sp, #56] @ 0x38 │ │ ldr r1, [r0, #8] │ │ str r1, [sp, #52] @ 0x34 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #152] @ 0x98 │ │ ldr r1, [r7, #84] @ 0x54 │ │ eor.w r0, r0, #1 │ │ str r0, [sp, #48] @ 0x30 │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ itttt eq │ │ moveq r1, #0 │ │ @@ -29688,88 +29881,88 @@ │ │ ldr r4, [r7, #80] @ 0x50 │ │ str r1, [sp, #44] @ 0x2c │ │ ldrd r1, r0, [r4, #92] @ 0x5c │ │ add.w r2, r0, r0, lsl #1 │ │ add.w fp, r1, #8 │ │ add.w r0, r1, r2, lsl #4 │ │ lsls r1, r2, #4 │ │ - cbz r1, 3c3ce │ │ + cbz r1, 3c6d6 │ │ ldrd r2, r3, [fp], #48 @ 0x30 │ │ subs r1, #48 @ 0x30 │ │ eors r3, r5 │ │ eors r2, r6 │ │ orrs r2, r3 │ │ - bne.n 3c38e │ │ + bne.n 3c696 │ │ movs r0, #11 │ │ movt r0, #32768 @ 0x8000 │ │ str r0, [sp, #92] @ 0x5c │ │ add r0, sp, #92 @ 0x5c │ │ - bl 31e14 │ │ + bl 31ee0 │ │ ldrd r5, r0, [fp, #-36] @ 0x24 │ │ ldrb.w r1, [r4, #36] @ 0x24 │ │ str r1, [sp, #36] @ 0x24 │ │ ldr r1, [r4, #32] │ │ mov r4, r0 │ │ str r1, [sp, #40] @ 0x28 │ │ - cbz r0, 3c3fc │ │ + cbz r0, 3c704 │ │ mov r0, r4 │ │ - blx d87f0 │ │ - cbnz r0, 3c3fe │ │ + blx d8810 │ │ + cbnz r0, 3c706 │ │ movs r0, #1 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ str r0, [sp, #80] @ 0x50 │ │ movs r0, #11 │ │ movt r0, #32768 @ 0x8000 │ │ str r0, [sp, #76] @ 0x4c │ │ ldr r0, [sp, #60] @ 0x3c │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #56] @ 0x38 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ cmp.w r9, #0 │ │ - beq.n 3c3f0 │ │ + beq.n 3c6f8 │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add r0, sp, #76 @ 0x4c │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #108 @ 0x6c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #1 │ │ mov r1, r5 │ │ mov r2, r4 │ │ str r0, [sp, #16] │ │ - bl d53c6 │ │ + bl d52ea │ │ ldrd r0, r1, [fp, #-48] @ 0x30 │ │ ldr.w r5, [fp, #-20] │ │ strd r9, r8, [sp, #28] │ │ cmp r5, #0 │ │ strd r1, r0, [sp, #4] │ │ strd r4, sl, [sp, #20] │ │ str r5, [sp, #12] │ │ - beq.n 3c4b6 │ │ + beq.n 3c7be │ │ add.w r0, r5, r5, lsl #1 │ │ str r7, [sp, #0] │ │ ldr.w r4, [fp, #-24] │ │ lsls r0, r0, #4 │ │ str r0, [sp, #64] @ 0x40 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ str r0, [sp, #68] @ 0x44 │ │ - beq.w 3c56a │ │ + beq.w 3c872 │ │ mov.w sl, #0 │ │ - b.n 3c496 │ │ + b.n 3c79e │ │ mov.w r8, #1 │ │ add.w r0, r4, #48 @ 0x30 │ │ str r0, [sp, #72] @ 0x48 │ │ mov r0, r8 │ │ mov r1, r9 │ │ mov r2, r7 │ │ subs r5, #1 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r2, [sp, #68] @ 0x44 │ │ ldrh.w ip, [r4, #40] @ 0x28 │ │ ldrb.w r1, [r4, #32] │ │ ldr.w lr, [r4, #28] │ │ ldrd r3, r6, [r4] │ │ ldrd r0, r4, [r4, #8] │ │ str.w r3, [r2, sl] │ │ @@ -29778,40 +29971,40 @@ │ │ strd r6, r0, [r3, #4] │ │ add.w r0, r3, #12 │ │ stmia.w r0, {r4, r7, r8} │ │ ldr r4, [sp, #72] @ 0x48 │ │ strb.w r1, [r3, #32] │ │ strd r7, lr, [r3, #24] │ │ strh.w ip, [r3, #40] @ 0x28 │ │ - cbz r5, 3c4b2 │ │ + cbz r5, 3c7ba │ │ ldr r0, [sp, #64] @ 0x40 │ │ cmp r0, sl │ │ - beq.n 3c4b2 │ │ + beq.n 3c7ba │ │ ldrd r9, r7, [r4, #20] │ │ cmp r7, #0 │ │ - beq.n 3c442 │ │ + beq.n 3c74a │ │ mov r0, r7 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 3c562 │ │ + beq.n 3c86a │ │ mov r8, r0 │ │ - b.n 3c446 │ │ + b.n 3c74e │ │ ldr r7, [sp, #0] │ │ - b.n 3c4ba │ │ + b.n 3c7c2 │ │ movs r0, #8 │ │ str r0, [sp, #68] @ 0x44 │ │ ldrb.w r8, [fp, #-52] │ │ ldr.w r6, [fp, #-56] │ │ ldrb.w r9, [fp, #-14] │ │ ldrb.w r4, [fp, #-15] │ │ ldrb.w sl, [fp, #-16] │ │ ldr r5, [r7, #92] @ 0x5c │ │ ldr r0, [sp, #44] @ 0x2c │ │ cmp r5, r0 │ │ - beq.n 3c558 │ │ + beq.n 3c860 │ │ movs r0, #88 @ 0x58 │ │ ldr r2, [r7, #88] @ 0x58 │ │ mul.w r1, r5, r0 │ │ mla r0, r5, r0, r2 │ │ str r6, [r2, r1] │ │ ldr r1, [sp, #4] │ │ str r1, [r0, #12] │ │ @@ -29852,92 +30045,92 @@ │ │ adds r0, r5, #1 │ │ str r0, [r7, #92] @ 0x5c │ │ movs r0, #11 │ │ movt r0, #32768 @ 0x8000 │ │ adds r0, #6 │ │ str r0, [sp, #76] @ 0x4c │ │ add r0, sp, #76 @ 0x4c │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #108 @ 0x6c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add.w r0, r7, #84 @ 0x54 │ │ - bl 47bf2 │ │ - b.n 3c4d6 │ │ + bl 47cea │ │ + b.n 3c7de │ │ movs r0, #1 │ │ mov r1, r7 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ ldr r1, [sp, #64] @ 0x40 │ │ movs r0, #8 │ │ - bl 3dfa4 │ │ - bmi.n 3c51e │ │ + bl 3e2ac │ │ + bmi.n 3c826 │ │ │ │ -0003c574 : │ │ +0003c87c : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #44 @ 0x2c │ │ mov fp, r0 │ │ ldrd r0, r7, [r1, #104] @ 0x68 │ │ rsb r7, r7, r7, lsl #3 │ │ adds r0, #32 │ │ lsls r7, r7, #3 │ │ - cbz r7, 3c59a │ │ + cbz r7, 3c8a2 │ │ ldrd r6, r5, [r0], #56 @ 0x38 │ │ subs r7, #56 @ 0x38 │ │ eors r5, r3 │ │ eors r6, r2 │ │ orrs r6, r5 │ │ - bne.n 3c588 │ │ - b.n 3c5b8 │ │ + bne.n 3c890 │ │ + b.n 3c8c0 │ │ ldrd r0, r1, [r1, #116] @ 0x74 │ │ rsb r1, r1, r1, lsl #3 │ │ adds r0, #32 │ │ lsls r1, r1, #3 │ │ cmp r1, #0 │ │ - beq.n 3c66a │ │ + beq.n 3c972 │ │ ldrd r7, r6, [r0], #56 @ 0x38 │ │ subs r1, #56 @ 0x38 │ │ eors r6, r3 │ │ eors r7, r2 │ │ orrs r7, r6 │ │ - bne.n 3c5a6 │ │ + bne.n 3c8ae │ │ ldr.w r4, [fp, #84] @ 0x54 │ │ sub.w r7, r0, #88 @ 0x58 │ │ cmp.w r4, #2147483648 @ 0x80000000 │ │ itttt eq │ │ moveq r4, #0 │ │ moveq r0, #8 │ │ strdeq r4, r0, [fp, #84] @ 0x54 │ │ streq.w r4, [fp, #92] @ 0x5c │ │ ldrd sl, r5, [r7, #44] @ 0x2c │ │ - cbz r5, 3c5e6 │ │ + cbz r5, 3c8ee │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 3c6ba │ │ + beq.n 3c9c2 │ │ mov r6, r0 │ │ - b.n 3c5e8 │ │ + b.n 3c8f0 │ │ movs r6, #1 │ │ mov r0, r6 │ │ mov r1, sl │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldrb r0, [r7, #28] │ │ str r0, [sp, #16] │ │ ldr r0, [r7, #24] │ │ str r0, [sp, #20] │ │ ldrb r0, [r7, #20] │ │ ldrd r9, r8, [r7, #32] │ │ ldr.w lr, [r7, #16] │ │ ldrb r2, [r7, #12] │ │ ldr r3, [r7, #8] │ │ ldrb.w sl, [r7, #4] │ │ ldr.w ip, [r7] │ │ ldr.w r7, [fp, #92] @ 0x5c │ │ str r0, [sp, #24] │ │ cmp r7, r4 │ │ - beq.n 3c69c │ │ + beq.n 3c9a4 │ │ movs r0, #88 @ 0x58 │ │ ldr.w r1, [fp, #88] @ 0x58 │ │ mla r0, r7, r0, r1 │ │ adds r1, r7, #1 │ │ str.w r1, [fp, #92] @ 0x5c │ │ ldr r1, [sp, #16] │ │ strb.w r1, [r0, #60] @ 0x3c │ │ @@ -29956,117 +30149,117 @@ │ │ str r5, [r0, #80] @ 0x50 │ │ str.w lr, [r0, #48] @ 0x30 │ │ strb.w r2, [r0, #44] @ 0x2c │ │ str r3, [r0, #40] @ 0x28 │ │ strb.w sl, [r0, #36] @ 0x24 │ │ str r1, [r0, #16] │ │ add.w r0, r1, #15 │ │ - b.n 3c68e │ │ + b.n 3c996 │ │ movs r0, #23 │ │ movs r5, #23 │ │ - blx d87f0 │ │ - cbz r0, 3c6c2 │ │ - ldr r1, [pc, #84] @ (3c6cc ) │ │ + blx d8810 │ │ + cbz r0, 3c9ca │ │ + ldr r1, [pc, #84] @ (3c9d4 ) │ │ movs r2, #23 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #2 │ │ str r5, [sp, #40] @ 0x28 │ │ movt r0, #32768 @ 0x8000 │ │ strd r5, r4, [sp, #32] │ │ adds r0, #8 │ │ str r0, [sp, #28] │ │ add r0, sp, #28 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add.w r0, fp, #84 @ 0x54 │ │ str.w ip, [sp, #12] │ │ mov r4, r3 │ │ strd lr, r2, [sp, #4] │ │ - bl 47bf2 │ │ + bl 47cea │ │ ldrd lr, r2, [sp, #4] │ │ mov r3, r4 │ │ ldr.w ip, [sp, #12] │ │ - b.n 3c61a │ │ + b.n 3c922 │ │ movs r0, #1 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #23 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - add r3, pc, #520 @ (adr r3, 3c8d8 ) │ │ - Address 0x3c6ce is out of bounds. │ │ + add r0, pc, #488 @ (adr r0, 3cbc0 ) │ │ + Address 0x3c9d6 is out of bounds. │ │ │ │ │ │ -0003c6d0 : │ │ +0003c9d8 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #28 │ │ ldr r1, [r0, #80] @ 0x50 │ │ ldr r3, [r1, #84] @ 0x54 │ │ cmp r3, r2 │ │ - bls.n 3c706 │ │ + bls.n 3ca0e │ │ ldr r1, [r1, #80] @ 0x50 │ │ add.w r2, r2, r2, lsl #2 │ │ add.w r6, r1, r2, lsl #3 │ │ ldrb.w r7, [r6, #32] │ │ cmp r7, #7 │ │ - bhi.n 3c71c │ │ + bhi.n 3ca24 │ │ ldrd r9, r4, [r6, #20] │ │ str r0, [sp, #8] │ │ - cbz r4, 3c742 │ │ + cbz r4, 3ca4a │ │ mov r0, r4 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 3c7ce │ │ + beq.n 3cad6 │ │ mov r5, r0 │ │ - b.n 3c744 │ │ + b.n 3ca4c │ │ movs r0, #24 │ │ movs r5, #24 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 3c7be │ │ - ldr r1, [pc, #196] @ (3c7d8 ) │ │ + beq.n 3cac6 │ │ + ldr r1, [pc, #196] @ (3cae0 ) │ │ mov r4, r0 │ │ movs r2, #24 │ │ add r1, pc │ │ - b.n 3c730 │ │ + b.n 3ca38 │ │ movs r0, #42 @ 0x2a │ │ movs r5, #42 @ 0x2a │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 3c7c6 │ │ - ldr r1, [pc, #176] @ (3c7dc ) │ │ + beq.n 3cace │ │ + ldr r1, [pc, #176] @ (3cae4 ) │ │ mov r4, r0 │ │ movs r2, #42 @ 0x2a │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #10 │ │ str r5, [sp, #24] │ │ movt r0, #32768 @ 0x8000 │ │ str r4, [sp, #20] │ │ str r5, [sp, #16] │ │ - b.n 3c79e │ │ + b.n 3caa6 │ │ movs r5, #1 │ │ ldr r0, [sp, #64] @ 0x40 │ │ mov r1, r9 │ │ mov r2, r4 │ │ eor.w r0, r0, #1 │ │ str r0, [sp, #4] │ │ mov r0, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r0, [sp, #8] │ │ ldmia.w r6, {r8, r9, fp, ip} │ │ ldr.w sl, [r0, #104] @ 0x68 │ │ ldr r6, [r6, #28] │ │ ldr r1, [r0, #96] @ 0x60 │ │ cmp sl, r1 │ │ - beq.n 3c7ac │ │ + beq.n 3cab4 │ │ add.w r2, sl, sl, lsl #1 │ │ ldr r1, [r0, #100] @ 0x64 │ │ lsls r3, r2, #4 │ │ str.w r8, [r1, r3] │ │ add.w r3, sl, #1 │ │ str r3, [r0, #104] @ 0x68 │ │ add.w r0, r1, r2, lsl #4 │ │ @@ -30078,232 +30271,232 @@ │ │ strd r4, r6, [r0, #24] │ │ movs r0, #10 │ │ movt r0, #32768 @ 0x8000 │ │ stmia.w r1, {r9, fp, ip} │ │ adds r0, #7 │ │ str r0, [sp, #12] │ │ add r0, sp, #12 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ adds r0, #96 @ 0x60 │ │ str.w ip, [sp] │ │ - bl 47a58 │ │ + bl 47e0e │ │ ldr.w ip, [sp] │ │ ldr r0, [sp, #8] │ │ - b.n 3c768 │ │ + b.n 3ca70 │ │ movs r0, #1 │ │ movs r1, #24 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #42 @ 0x2a │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - ldr r4, [r6, r5] │ │ - vrsra.u64 q13, q7, #3 │ │ - Address 0x3c7de is out of bounds. │ │ + ldrsb r4, [r5, r1] │ │ + vshr.u64 q13, q3, #3 │ │ + Address 0x3cae6 is out of bounds. │ │ │ │ │ │ -0003c7e0 : │ │ +0003cae8 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #276 @ 0x114 │ │ add r5, sp, #152 @ 0x98 │ │ mov r6, r0 │ │ mov r1, r6 │ │ movs r2, #120 @ 0x78 │ │ mov r0, r5 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr.w fp, [sp, #236] @ 0xec │ │ cmp.w fp, #2147483648 @ 0x80000000 │ │ - beq.w 3cc08 │ │ + beq.w 3cf10 │ │ ldr r0, [sp, #240] @ 0xf0 │ │ str r0, [sp, #44] @ 0x2c │ │ ldr r1, [sp, #244] @ 0xf4 │ │ ldr r0, [sp, #224] @ 0xe0 │ │ movs r5, #0 │ │ str r0, [sp, #32] │ │ cmp r1, #0 │ │ ldr r0, [sp, #228] @ 0xe4 │ │ str r0, [sp, #28] │ │ ldr r0, [sp, #232] @ 0xe8 │ │ str r6, [sp, #36] @ 0x24 │ │ ldrd r0, r2, [r0, #48] @ 0x30 │ │ str r1, [sp, #40] @ 0x28 │ │ strd r2, r0, [sp, #20] │ │ - beq.w 3cb8e │ │ + beq.w 3ce96 │ │ movs r0, #88 @ 0x58 │ │ ldr.w r9, [sp, #44] @ 0x2c │ │ mla lr, r1, r0, r9 │ │ mov.w ip, #0 │ │ muls r0, r1 │ │ str.w lr, [sp, #8] │ │ sub.w r4, r0, #176 @ 0xb0 │ │ ldr.w r0, [r9, #16] │ │ add.w ip, ip, #1 │ │ cmp r0, #0 │ │ - bmi.w 3caa4 │ │ + bmi.w 3cdac │ │ ldrb.w r0, [r9, #42] @ 0x2a │ │ cmp r0, #0 │ │ - bne.w 3cb8c │ │ + bne.w 3ce94 │ │ ldr.w sl, [sp, #44] @ 0x2c │ │ mov r6, ip │ │ strd r4, fp, [sp, #12] │ │ str.w ip, [sp, #4] │ │ cmp r6, #0 │ │ - bne.w 3ca7e │ │ + bne.w 3cd86 │ │ mov r8, sl │ │ cmp sl, lr │ │ - beq.w 3cb74 │ │ + beq.w 3ce7c │ │ ldr.w r0, [r8, #16] │ │ cmp r0, #0 │ │ - bmi.w 3cb8c │ │ + bmi.w 3ce94 │ │ ldrd r0, r1, [r8, #8] │ │ ldrd r2, r3, [r9, #8] │ │ eors r1, r3 │ │ eors r0, r2 │ │ orrs r0, r1 │ │ - bne.w 3cb8c │ │ + bne.w 3ce94 │ │ ldrb.w r0, [r8, #40] @ 0x28 │ │ ldrb.w r1, [r9, #40] @ 0x28 │ │ cmp r1, r0 │ │ - bne.w 3cb8c │ │ + bne.w 3ce94 │ │ ldrb.w r0, [r8, #41] @ 0x29 │ │ ldrb.w r1, [r9, #41] @ 0x29 │ │ cmp r1, r0 │ │ - bne.w 3cb8c │ │ + bne.w 3ce94 │ │ ldrb.w r0, [r8, #42] @ 0x2a │ │ cmp r0, #0 │ │ - bne.w 3cb8c │ │ + bne.w 3ce94 │ │ ldr.w r2, [r9, #24] │ │ ldr.w r0, [r8, #24] │ │ cmp r2, r0 │ │ - bne.w 3cb8c │ │ + bne.w 3ce94 │ │ ldr.w r0, [r9, #20] │ │ ldr.w r1, [r8, #20] │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.w 3cb8c │ │ + bne.w 3ce94 │ │ ldr.w r5, [r9, #36] @ 0x24 │ │ ldr.w r0, [r8, #36] @ 0x24 │ │ cmp r5, r0 │ │ - bne.w 3cb8c │ │ + bne.w 3ce94 │ │ cmp r5, #0 │ │ - beq.n 3c96e │ │ + beq.n 3cc76 │ │ ldr.w sl, [r8, #32] │ │ movs r4, #0 │ │ ldr.w fp, [r9, #32] │ │ add.w r6, sl, r4 │ │ add.w r7, fp, r4 │ │ ldrb.w r0, [r6, #40] @ 0x28 │ │ ldrb.w r1, [r7, #40] @ 0x28 │ │ cmp r1, r0 │ │ ittt eq │ │ ldreq r2, [r7, #24] │ │ ldreq r0, [r6, #24] │ │ cmpeq r2, r0 │ │ - bne.w 3cb84 │ │ + bne.w 3ce8c │ │ ldr r0, [r7, #20] │ │ ldr r1, [r6, #20] │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.w 3cb84 │ │ + bne.w 3ce8c │ │ ldrb.w r0, [r6, #32] │ │ ldrb.w r1, [r7, #32] │ │ cmp r1, r0 │ │ ittt eq │ │ ldreq r0, [r6, #28] │ │ ldreq r1, [r7, #28] │ │ cmpeq r1, r0 │ │ - bne.w 3cb84 │ │ + bne.w 3ce8c │ │ ldr.w r1, [fp, r4] │ │ ldr.w r0, [sl, r4] │ │ lsls r1, r1, #31 │ │ - beq.n 3c954 │ │ + beq.n 3cc5c │ │ cmp r0, #0 │ │ - beq.w 3cb84 │ │ + beq.w 3ce8c │ │ ldrd r0, r1, [r7, #8] │ │ ldrd r2, r3, [r6, #8] │ │ eors r1, r3 │ │ eors r0, r2 │ │ orrs r0, r1 │ │ - beq.n 3c95a │ │ - b.n 3cb84 │ │ + beq.n 3cc62 │ │ + b.n 3ce8c │ │ cmp r0, #0 │ │ - bne.w 3cb84 │ │ + bne.w 3ce8c │ │ ldrb.w r0, [r6, #41] @ 0x29 │ │ ldrb.w r1, [r7, #41] @ 0x29 │ │ cmp r1, r0 │ │ - bne.w 3cb84 │ │ + bne.w 3ce8c │ │ adds r4, #48 @ 0x30 │ │ subs r5, #1 │ │ - bne.n 3c8ee │ │ + bne.n 3cbf6 │ │ ldr.w fp, [sp, #16] │ │ ldrb.w r0, [r8, #4] │ │ ldrb.w r1, [r9, #4] │ │ cmp r1, r0 │ │ - bne.w 3cb8c │ │ + bne.w 3ce94 │ │ ldr.w r0, [r8] │ │ ldr.w r1, [r9] │ │ cmp r1, r0 │ │ - bne.w 3cb8c │ │ + bne.w 3ce94 │ │ ldrd r5, r4, [r9, #60] @ 0x3c │ │ ldrd r6, fp, [r8, #60] @ 0x3c │ │ mov r7, r4 │ │ cmp fp, r4 │ │ it cc │ │ movcc r7, fp │ │ mov r0, r5 │ │ mov r2, r7 │ │ mov r1, r6 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #1 │ │ mov.w r1, #0 │ │ it lt │ │ movlt r1, #1 │ │ cmp r4, fp │ │ mov.w r2, #0 │ │ it ls │ │ movls r2, #1 │ │ cmp r0, #0 │ │ it ne │ │ movne r2, r1 │ │ cmp r2, #1 │ │ - bne.n 3ca04 │ │ + bne.n 3cd0c │ │ str r5, [sp, #0] │ │ mov sl, r6 │ │ ldrd r0, r5, [r9, #72] @ 0x48 │ │ ldrd r1, r6, [r8, #72] @ 0x48 │ │ mov r2, r5 │ │ cmp r6, r5 │ │ it cc │ │ movcc r2, r6 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ mov.w r1, #0 │ │ it gt │ │ movgt r1, #1 │ │ cmp r5, r6 │ │ ldr r5, [sp, #0] │ │ mov.w r2, #0 │ │ it cs │ │ movcs r2, #1 │ │ cmp r0, #0 │ │ mov r6, sl │ │ it ne │ │ movne r2, r1 │ │ cmp r2, #0 │ │ - bne.w 3cb84 │ │ + bne.w 3ce8c │ │ mov r0, r6 │ │ mov r1, r5 │ │ mov r2, r7 │ │ add.w sl, r8, #88 @ 0x58 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #1 │ │ mov.w r1, #0 │ │ mov.w r2, #0 │ │ it lt │ │ movlt r1, #1 │ │ cmp fp, r4 │ │ it ls │ │ @@ -30311,22 +30504,22 @@ │ │ cmp r0, #0 │ │ it ne │ │ movne r2, r1 │ │ ldrd r4, fp, [sp, #12] │ │ movs r6, #0 │ │ ldrd ip, lr, [sp, #4] │ │ cmp r2, #1 │ │ - bne.w 3c862 │ │ + bne.w 3cb6a │ │ ldrd r0, r7, [r8, #72] @ 0x48 │ │ ldrd r1, r5, [r9, #72] @ 0x48 │ │ mov r2, r7 │ │ cmp r5, r7 │ │ it cc │ │ movcc r2, r5 │ │ - blx d8860 │ │ + blx d8870 │ │ ldr r4, [sp, #12] │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ ldrd ip, lr, [sp, #4] │ │ mov.w r1, #0 │ │ it gt │ │ movgt r1, #1 │ │ cmp r7, r5 │ │ @@ -30334,138 +30527,138 @@ │ │ mov.w r5, #1 │ │ it cs │ │ movcs r2, #1 │ │ cmp r0, #0 │ │ it ne │ │ movne r2, r1 │ │ cmp r2, #0 │ │ - beq.w 3c862 │ │ - b.n 3cb8e │ │ + beq.w 3cb6a │ │ + b.n 3ce96 │ │ sub.w r0, lr, sl │ │ movw r1, #35747 @ 0x8ba3 │ │ movt r1, #47662 @ 0xba2e │ │ lsrs r0, r0, #3 │ │ muls r0, r1 │ │ cmp r6, r0 │ │ - bcs.n 3cb74 │ │ + bcs.n 3ce7c │ │ movs r0, #88 @ 0x58 │ │ mla r8, r6, r0, sl │ │ ldr.w r0, [r8, #16] │ │ cmp r0, #0 │ │ - bpl.w 3c87a │ │ - b.n 3cb8c │ │ + bpl.w 3cb82 │ │ + b.n 3ce94 │ │ bic.w r0, r0, #2147483648 @ 0x80000000 │ │ cmp r0, #2 │ │ - beq.n 3cb6e │ │ + beq.n 3ce76 │ │ cmp r0, #0 │ │ - bne.n 3cb74 │ │ + bne.n 3ce7c │ │ ldr r0, [sp, #40] @ 0x28 │ │ cmp ip, r0 │ │ - bcs.n 3cb74 │ │ + bcs.n 3ce7c │ │ movs r1, #88 @ 0x58 │ │ ldr r0, [sp, #44] @ 0x2c │ │ mla r2, ip, r1, r0 │ │ ldr r0, [r2, #16] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.n 3cb8c │ │ + bne.n 3ce94 │ │ ldrd r7, r3, [r2, #32] │ │ ldrd r8, sl, [r9, #32] │ │ subs.w r6, r7, r8 │ │ sbcs.w r6, r3, sl │ │ - blt.n 3caf4 │ │ + blt.n 3cdfc │ │ mov lr, r4 │ │ mov r0, ip │ │ ldrd r6, ip, [r2, #40] @ 0x28 │ │ ldrd r4, r5, [r9, #40] @ 0x28 │ │ subs r6, r4, r6 │ │ mov r4, lr │ │ ldr.w lr, [sp, #8] │ │ sbcs.w r6, r5, ip │ │ mov ip, r0 │ │ - bge.n 3cb8c │ │ + bge.n 3ce94 │ │ subs.w r7, r8, r7 │ │ sbcs.w r3, sl, r3 │ │ - blt.n 3cb0e │ │ + blt.n 3ce16 │ │ ldrd r3, r7, [r9, #40] @ 0x28 │ │ ldrd r6, r5, [r2, #40] @ 0x28 │ │ subs r3, r6, r3 │ │ sbcs.w r3, r5, r7 │ │ - bge.n 3cb8c │ │ + bge.n 3ce94 │ │ adds r2, #88 @ 0x58 │ │ cmp r2, lr │ │ - beq.n 3cb74 │ │ + beq.n 3ce7c │ │ movs r2, #0 │ │ str r4, [sp, #12] │ │ - b.n 3cb20 │ │ + b.n 3ce28 │ │ adds r2, #88 @ 0x58 │ │ cmp r4, r2 │ │ - beq.n 3cb74 │ │ + beq.n 3ce7c │ │ add.w r3, r9, r2 │ │ ldr.w r7, [r3, #192] @ 0xc0 │ │ cmp.w r7, #2147483648 @ 0x80000000 │ │ - bne.n 3cb8c │ │ + bne.n 3ce94 │ │ ldrd r6, r7, [r3, #208] @ 0xd0 │ │ subs.w r5, r6, r8 │ │ sbcs.w r5, r7, sl │ │ - blt.n 3cb52 │ │ + blt.n 3ce5a │ │ mov r4, ip │ │ ldrd r5, ip, [r9, #40] @ 0x28 │ │ ldrd r0, r1, [r3, #216] @ 0xd8 │ │ subs r0, r5, r0 │ │ sbcs.w r0, ip, r1 │ │ mov ip, r4 │ │ ldr r4, [sp, #12] │ │ - bge.n 3cb8c │ │ + bge.n 3ce94 │ │ subs.w r0, r8, r6 │ │ sbcs.w r0, sl, r7 │ │ - blt.n 3cb1a │ │ + blt.n 3ce22 │ │ ldrd r0, r5, [r9, #40] @ 0x28 │ │ ldrd r3, r7, [r3, #216] @ 0xd8 │ │ subs r0, r3, r0 │ │ sbcs.w r0, r7, r5 │ │ - blt.n 3cb1a │ │ - b.n 3cb8c │ │ + blt.n 3ce22 │ │ + b.n 3ce94 │ │ ldr r0, [sp, #40] @ 0x28 │ │ cmp ip, r0 │ │ - bcc.n 3cb8c │ │ + bcc.n 3ce94 │ │ add.w r9, r9, #88 @ 0x58 │ │ subs r4, #88 @ 0x58 │ │ movs r5, #0 │ │ cmp r9, lr │ │ - bne.w 3c83c │ │ - b.n 3cb8e │ │ + bne.w 3cb44 │ │ + b.n 3ce96 │ │ movs r5, #1 │ │ ldr.w fp, [sp, #16] │ │ - b.n 3cb8e │ │ + b.n 3ce96 │ │ movs r5, #1 │ │ add r0, sp, #80 @ 0x50 │ │ add r1, sp, #152 @ 0x98 │ │ movs r2, #72 @ 0x48 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add r7, sp, #248 @ 0xf8 │ │ add.w ip, sp, #64 @ 0x40 │ │ ldr r6, [sp, #268] @ 0x10c │ │ ldmia r7, {r0, r1, r2, r3, r7} │ │ strd r3, r7, [sp, #48] @ 0x30 │ │ stmia.w ip, {r0, r1, r2} │ │ ldr r0, [sp, #36] @ 0x24 │ │ str r6, [sp, #56] @ 0x38 │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r0, #128 @ 0x80 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 3cc5e │ │ + beq.n 3cf66 │ │ ldrd r2, r1, [sp, #20] │ │ mov r4, r0 │ │ strd r1, r2, [r0] │ │ add.w r2, r0, #8 │ │ add r1, sp, #80 @ 0x50 │ │ mov r0, r2 │ │ movs r2, #72 @ 0x48 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add r2, sp, #48 @ 0x30 │ │ strb.w r5, [r4, #124] @ 0x7c │ │ ldr r5, [sp, #32] │ │ str r5, [r4, #80] @ 0x50 │ │ ldr r5, [sp, #28] │ │ ldrd r3, r7, [sp, #64] @ 0x40 │ │ ldr r6, [sp, #72] @ 0x48 │ │ @@ -30485,45 +30678,45 @@ │ │ movs r4, #0 │ │ str r4, [sp, #244] @ 0xf4 │ │ ldr.w r8, [r0, #32] │ │ ldrb.w r7, [r0, #36] @ 0x24 │ │ movs r0, #8 │ │ strd r4, r0, [sp, #236] @ 0xec │ │ add.w r0, r5, #84 @ 0x54 │ │ - bl 47bf2 │ │ + bl 47cea │ │ ldrd fp, r3, [sp, #236] @ 0xec │ │ mvn.w r0, #2147483648 @ 0x80000000 │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ mov.w r2, #2147483648 @ 0x80000000 │ │ strd r1, r0, [r3, #40] @ 0x28 │ │ movs r1, #1 │ │ cmp.w fp, #2147483648 @ 0x80000000 │ │ strd r4, r2, [r3, #32] │ │ strb.w r4, [r3, #48] @ 0x30 │ │ strb r7, [r3, #28] │ │ str.w r8, [r3, #24] │ │ str r3, [sp, #44] @ 0x2c │ │ str r2, [r3, #16] │ │ str r1, [sp, #244] @ 0xf4 │ │ - bne.w 3c806 │ │ - ldr r0, [pc, #16] @ (3cc68 ) │ │ + bne.w 3cb0e │ │ + ldr r0, [pc, #16] @ (3cf70 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ movs r0, #8 │ │ movs r1, #128 @ 0x80 │ │ - bl 3de2a │ │ + bl 3e132 │ │ nop │ │ - b.n 3cf74 │ │ + udf #140 @ 0x8c │ │ movs r1, r1 │ │ │ │ -0003cc6c : │ │ +0003cf74 : │ │ push {r4, lr} │ │ mov r4, r0 │ │ movs r0, #120 @ 0x78 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ itttt ne │ │ movne r1, #0 │ │ movne r2, #8 │ │ strdne r1, r2, [r0, #96] @ 0x60 │ │ strdne r1, r1, [r0, #104] @ 0x68 │ │ itttt ne │ │ @@ -30536,216 +30729,216 @@ │ │ strne r2, [r0, #84] @ 0x54 │ │ movne r1, #32 │ │ strbne r1, [r0, #0] │ │ it ne │ │ popne {r4, pc} │ │ movs r0, #8 │ │ movs r1, #120 @ 0x78 │ │ - bl 3de2a │ │ + bl 3e132 │ │ │ │ -0003ccb0 : │ │ +0003cfb8 : │ │ push {r4, r5, r7, lr} │ │ sub sp, #72 @ 0x48 │ │ mov r4, r0 │ │ mov r0, sp │ │ movs r2, #72 @ 0x48 │ │ mov r5, r1 │ │ - bl d4c50 │ │ + bl d50a2 │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrb r0, [r4, #0] │ │ cmp r0, #32 │ │ itt ne │ │ movne r0, r4 │ │ - blne 42fcc │ │ + blne 432d4 │ │ mov r1, sp │ │ mov r0, r4 │ │ movs r2, #72 @ 0x48 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add sp, #72 @ 0x48 │ │ pop {r4, r5, r7, pc} │ │ │ │ -0003cce0 : │ │ +0003cfe8 : │ │ cmp r3, #0 │ │ ldrd r1, ip, [sp] │ │ it mi │ │ movmi r2, #0 │ │ cmp.w ip, #0 │ │ it mi │ │ movmi.w r1, #4294967295 @ 0xffffffff │ │ strd r2, r1, [r0, #72] @ 0x48 │ │ bx lr │ │ - bmi.n 3cca6 │ │ + bmi.n 3cfae │ │ │ │ -0003ccfc : │ │ +0003d004 : │ │ push {r4, r5, r6, lr} │ │ ldr r5, [r0, #0] │ │ - cbz r5, 3cd22 │ │ + cbz r5, 3d02a │ │ ldr r6, [r0, #4] │ │ mov r4, r0 │ │ mov r0, r5 │ │ ldr r1, [r6, #12] │ │ blx r1 │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ ldmia.w sp!, {r4, r5, r6, lr} │ │ - b.w d870c │ │ - ldr r0, [pc, #8] @ (3cd2c ) │ │ + b.w d871c │ │ + ldr r0, [pc, #8] @ (3d034 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ nop │ │ - udf #24 │ │ + blt.n 3d078 │ │ movs r1, r1 │ │ │ │ -0003cd30 : │ │ +0003d038 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #188 @ 0xbc │ │ mov r8, r3 │ │ ldr r3, [sp, #224] @ 0xe0 │ │ mov r7, r1 │ │ mov sl, r0 │ │ - cbz r2, 3cd66 │ │ + cbz r2, 3d06e │ │ add r4, sp, #96 @ 0x60 │ │ mov r1, sl │ │ mov r2, r8 │ │ mov r0, r4 │ │ - bl 6e0e0 │ │ + bl 6e1c8 │ │ ldrb.w r9, [sp, #100] @ 0x64 │ │ cmp.w r9, #2 │ │ - bne.w 3cf0c │ │ + bne.w 3d214 │ │ add r3, sp, #104 @ 0x68 │ │ add.w ip, sp, #20 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ - b.n 3cefe │ │ + b.n 3d206 │ │ add r0, sp, #96 @ 0x60 │ │ movs r5, #0 │ │ movs r1, #32 │ │ movs r2, #160 @ 0xa0 │ │ str r5, [sp, #96] @ 0x60 │ │ - blx d8880 │ │ + blx d8890 │ │ ldr r1, [sp, #96] @ 0x60 │ │ cmp r0, #0 │ │ mov.w r6, #0 │ │ it eq │ │ moveq r6, r1 │ │ cmp r6, #0 │ │ - beq.w 3cf64 │ │ + beq.w 3d26c │ │ movs r0, #4 │ │ movs r4, #1 │ │ strd r5, r0, [r1, #72] @ 0x48 │ │ strd r0, r5, [r1, #88] @ 0x58 │ │ movs r0, #104 @ 0x68 │ │ strb.w r5, [r1, #136] @ 0x88 │ │ strd r4, r4, [r1, #128] @ 0x80 │ │ strb.w r4, [r1, #96] @ 0x60 │ │ strd r5, r5, [r1, #80] @ 0x50 │ │ strb.w r5, [r1, #68] @ 0x44 │ │ str r5, [r1, #64] @ 0x40 │ │ strd r5, r5, [r1, #32] │ │ strd r5, r5, [r1] │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 3cf6c │ │ + beq.w 3d274 │ │ ldr.w r9, [sp, #236] @ 0xec │ │ mov r5, r0 │ │ movs r0, #2 │ │ strd r4, r4, [r5] │ │ strb r0, [r5, #20] │ │ movs r0, #0 │ │ strb r0, [r5, #12] │ │ str r0, [r5, #8] │ │ ldrex r0, [r5] │ │ adds r1, r0, #1 │ │ strex r2, r1, [r5] │ │ cmp r2, #0 │ │ - bne.n 3cdd0 │ │ + bne.n 3d0d8 │ │ cmp r0, #0 │ │ - bmi.w 3cfea │ │ - ldr r4, [pc, #516] @ (3cfec ) │ │ + bmi.w 3d2f2 │ │ + ldr r4, [pc, #516] @ (3d2f4 ) │ │ add r4, pc │ │ ldr r0, [r4, #24] │ │ dmb ish │ │ cmp r0, #2 │ │ it ne │ │ - blne 3661c │ │ + blne 368ec │ │ movs r0, #1 │ │ str r7, [sp, #12] │ │ ldrex r1, [r4, #4] │ │ cmp r1, #0 │ │ - bne.w 3cf58 │ │ + bne.w 3d260 │ │ strex r1, r0, [r4, #4] │ │ cmp r1, #0 │ │ - bne.n 3cdfa │ │ + bne.n 3d102 │ │ dmb ish │ │ - ldr r0, [pc, #476] @ (3cff0 ) │ │ + ldr r0, [pc, #476] @ (3d2f8 ) │ │ add r0, pc │ │ str r0, [sp, #8] │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 3cf74 │ │ + bne.w 3d27c │ │ mov.w fp, #0 │ │ ldrb r0, [r4, #8] │ │ cmp r0, #0 │ │ - bne.w 3cf84 │ │ + bne.w 3d28c │ │ ldr r0, [r4, #20] │ │ dmb ish │ │ adds r0, #60 @ 0x3c │ │ ldrex r1, [r0] │ │ adds r1, #1 │ │ strex r2, r1, [r0] │ │ cmp r2, #0 │ │ - bne.n 3ce32 │ │ + bne.n 3d13a │ │ movs r0, #32 │ │ dmb ish │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 3cfa2 │ │ + beq.w 3d2aa │ │ mov r2, r0 │ │ - ldr r3, [pc, #416] @ (3cff4 ) │ │ + ldr r3, [pc, #416] @ (3d2fc ) │ │ ldr r0, [sp, #224] @ 0xe0 │ │ movs r7, #1 │ │ strb r0, [r2, #25] │ │ add r3, pc │ │ ldrd r0, r1, [r4, #12] │ │ add.w ip, r2, #8 │ │ strd r7, r6, [r2] │ │ ldr r7, [sp, #232] @ 0xe8 │ │ strb.w r8, [r2, #24] │ │ stmia.w ip, {r7, r9, sl} │ │ str r5, [r2, #20] │ │ - bl 24220 │ │ + bl 24254 │ │ cmp r0, #0 │ │ - bne.w 3cfaa │ │ + bne.w 3d2b2 │ │ cmp.w fp, #0 │ │ - bne.n 3ce8e │ │ + bne.n 3d196 │ │ ldr r0, [sp, #8] │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 3cfdc │ │ + bne.w 3d2e4 │ │ movs r0, #0 │ │ dmb ish │ │ ldrex r1, [r4, #4] │ │ strex r2, r0, [r4, #4] │ │ cmp r2, #0 │ │ - bne.n 3ce94 │ │ + bne.n 3d19c │ │ mov fp, r6 │ │ cmp r1, #2 │ │ str.w r9, [sp, #8] │ │ - beq.w 3cfc6 │ │ + beq.w 3d2ce │ │ mov.w r9, #3 │ │ mov.w r8, #1 │ │ movs r0, #88 @ 0x58 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 3cf50 │ │ + beq.n 3d258 │ │ ldrb.w r1, [sp, #94] @ 0x5e │ │ ldrh.w r2, [sp, #92] @ 0x5c │ │ strh.w r2, [r0, #5] │ │ add r2, sp, #32 │ │ strb r1, [r0, #7] │ │ ldr r1, [sp, #8] │ │ strd r1, r5, [r0, #20] │ │ @@ -30762,15 +30955,15 @@ │ │ stmia r1!, {r3, r4, r5, r6, r7} │ │ ldr r1, [sp, #12] │ │ str r0, [r1, #0] │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ str r0, [sp, #16] │ │ add r0, sp, #16 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #188 @ 0xbc │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrh.w r0, [sp, #101] @ 0x65 │ │ add.w ip, sp, #104 @ 0x68 │ │ ldrb.w r1, [sp, #103] @ 0x67 │ │ ldr r2, [sp, #116] @ 0x74 │ │ strh.w r0, [sp, #92] @ 0x5c │ │ @@ -30786,140 +30979,140 @@ │ │ stmia r1!, {r2, r3, r4, r6, r7} │ │ ldmia r0!, {r2, r3, r4, r6, r7} │ │ stmia r1!, {r2, r3, r4, r6, r7} │ │ ldmia.w r0, {r2, r3, r4, r6, r7} │ │ stmia r1!, {r2, r3, r4, r6, r7} │ │ mov r7, ip │ │ movs r0, #88 @ 0x58 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - bne.n 3cebe │ │ + bne.n 3d1c6 │ │ movs r0, #8 │ │ movs r1, #88 @ 0x58 │ │ - bl 3de2a │ │ + bl 3e132 │ │ adds r0, r4, #4 │ │ clrex │ │ - bl 778fe │ │ - b.n 3ce10 │ │ + bl 77966 │ │ + b.n 3d118 │ │ movs r0, #32 │ │ movs r1, #160 @ 0xa0 │ │ - bl 3de2a │ │ + bl 3e132 │ │ movs r0, #8 │ │ movs r1, #104 @ 0x68 │ │ - bl 3de2a │ │ - bl 7770c │ │ + bl 3e132 │ │ + bl 77774 │ │ eor.w fp, r0, #1 │ │ ldrb r0, [r4, #8] │ │ cmp r0, #0 │ │ - beq.w 3ce2a │ │ - ldr r0, [pc, #112] @ (3cff8 ) │ │ + beq.w 3d132 │ │ + ldr r0, [pc, #112] @ (3d300 ) │ │ adds r2, r4, #4 │ │ - ldr r3, [pc, #112] @ (3cffc ) │ │ - ldr r1, [pc, #116] @ (3d000 ) │ │ + ldr r3, [pc, #112] @ (3d304 ) │ │ + ldr r1, [pc, #116] @ (3d308 ) │ │ add r0, pc │ │ str r2, [sp, #96] @ 0x60 │ │ add r3, pc │ │ add r1, pc │ │ add r2, sp, #96 @ 0x60 │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ strb.w fp, [sp, #100] @ 0x64 │ │ - bl 414b0 │ │ + bl 417b8 │ │ movs r0, #8 │ │ movs r1, #32 │ │ - bl 3de2a │ │ - ldr r4, [pc, #88] @ (3d004 ) │ │ - ldr r3, [pc, #88] @ (3d008 ) │ │ - ldr r2, [pc, #92] @ (3d00c ) │ │ + bl 3e132 │ │ + ldr r4, [pc, #88] @ (3d30c ) │ │ + ldr r3, [pc, #88] @ (3d310 ) │ │ + ldr r2, [pc, #92] @ (3d314 ) │ │ add r4, pc │ │ add r3, pc │ │ strd r0, r1, [sp, #96] @ 0x60 │ │ add r2, pc │ │ str r2, [sp, #0] │ │ add r2, sp, #96 @ 0x60 │ │ mov r0, r4 │ │ movs r1, #50 @ 0x32 │ │ - bl 414b0 │ │ + bl 417b8 │ │ adds r1, r4, #4 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ mov.w r8, #1 │ │ - blx d87d0 │ │ + blx d87e0 │ │ mov.w r9, #3 │ │ - b.n 3ceb4 │ │ - bl 7770c │ │ + b.n 3d1bc │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq r0, [r4, #8] │ │ - b.n 3ce8e │ │ + b.n 3d196 │ │ udf #254 @ 0xfe │ │ - lsrs r6, r2, #10 │ │ + lsls r6, r3, #30 │ │ movs r2, r1 │ │ - adds r2, r0, r6 │ │ + asrs r2, r3, #26 │ │ movs r2, r1 │ │ - beq.n 3cf64 │ │ + ldmia r5, {r1, r2, r3, r5, r6, r7} │ │ movs r1, r1 │ │ - stmia r4!, {r0, r1, r2, r4, r5, r6, r7} │ │ - vsra.u32 , q4, #3 │ │ + stmia r1!, {r0, r1, r2, r3, r5, r6, r7} │ │ + @ instruction: 0xfffdce80 │ │ movs r1, r1 │ │ - bcs.n 3d030 │ │ + ldmia r7!, {r1, r2, r3, r4} │ │ movs r1, r1 │ │ - cbz r4, 3d02a │ │ - vrev32. , q11 │ │ + add r6, sp, #528 @ 0x210 │ │ + @ instruction: 0xfffccdde │ │ movs r1, r1 │ │ - ldmia r7!, {r3, r5, r6} │ │ + ldmia r4, {r4, r5, r6} │ │ movs r1, r1 │ │ │ │ -0003d010 : │ │ +0003d318 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #140 @ 0x8c │ │ ldrb r2, [r0, #4] │ │ movw fp, #17 │ │ mov r8, r0 │ │ movt fp, #32768 @ 0x8000 │ │ cmp r2, #2 │ │ - beq.n 3d082 │ │ + beq.n 3d38a │ │ add.w sl, r8, #8 │ │ ldrd r9, r5, [r8, #20] │ │ cmp r2, #3 │ │ ldmia.w sl, {r6, r7, sl} │ │ - bne.n 3d08a │ │ + bne.n 3d392 │ │ ldrex r0, [r5] │ │ adds r2, r0, #1 │ │ strex r3, r2, [r5] │ │ cmp r3, #0 │ │ - bne.n 3d036 │ │ + bne.n 3d33e │ │ cmp r0, #0 │ │ - bmi.w 3d1f2 │ │ + bmi.w 3d4fa │ │ mov r4, fp │ │ mov fp, r1 │ │ cmp r6, #0 │ │ - beq.n 3d11c │ │ + beq.n 3d424 │ │ cmp r6, #1 │ │ - bne.n 3d06a │ │ + bne.n 3d372 │ │ add.w r0, r7, #128 @ 0x80 │ │ ldrex r1, [r0] │ │ adds r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 3d05a │ │ - b.n 3d12e │ │ + bne.n 3d362 │ │ + b.n 3d436 │ │ ldrex r0, [r7] │ │ adds r1, r0, #1 │ │ strex r2, r1, [r7] │ │ cmp r2, #0 │ │ - bne.n 3d06a │ │ + bne.n 3d372 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 3d134 │ │ - bl 773ce │ │ + bgt.n 3d43c │ │ + bl 77436 │ │ sub.w r0, fp, #8 │ │ str r0, [sp, #8] │ │ - b.n 3d1aa │ │ + b.n 3d4b2 │ │ ldr.w r0, [r8] │ │ add.w ip, r8, #28 │ │ strb.w r2, [sp, #28] │ │ ldrb.w r2, [r8, #7] │ │ ldrh.w r3, [r8, #5] │ │ str.w r9, [sp, #44] @ 0x2c │ │ add.w r9, sp, #24 │ │ @@ -30933,528 +31126,528 @@ │ │ strb.w r2, [sp, #31] │ │ ldmia.w ip!, {r2, r4, r5, r6, r7} │ │ stmia r3!, {r2, r4, r5, r6, r7} │ │ ldmia.w ip!, {r2, r4, r5, r6, r7} │ │ stmia r3!, {r2, r4, r5, r6, r7} │ │ ldmia.w ip, {r2, r4, r5, r6, r7} │ │ stmia r3!, {r2, r4, r5, r6, r7} │ │ - cbz r1, 3d0dc │ │ + cbz r1, 3d3e4 │ │ add r0, sp, #8 │ │ add r1, sp, #24 │ │ - bl 58270 │ │ - b.n 3d19e │ │ + bl 58480 │ │ + b.n 3d4a6 │ │ cmp r0, #0 │ │ it ne │ │ - blxne 9bb60 │ │ + blxne 9bb6c │ │ ldr r0, [sp, #56] @ 0x38 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ itt ne │ │ addne.w r0, r9, #24 │ │ - blne 4b7a0 │ │ + blne 4baa8 │ │ ldr r6, [sp, #92] @ 0x5c │ │ cmp.w r6, #2147483648 @ 0x80000000 │ │ - beq.n 3d1a4 │ │ + beq.n 3d4ac │ │ ldrd r9, r7, [sp, #96] @ 0x60 │ │ - cbz r7, 3d110 │ │ + cbz r7, 3d418 │ │ mov r5, r9 │ │ ldr.w r0, [r5], #4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r7, #1 │ │ - bne.n 3d104 │ │ + bne.n 3d40c │ │ cmp r6, #0 │ │ itt ne │ │ movne r0, r9 │ │ - blxne d87c0 │ │ - b.n 3d1a4 │ │ + blxne d87d0 │ │ + b.n 3d4ac │ │ add.w r0, r7, #160 @ 0xa0 │ │ ldrex r1, [r0] │ │ adds r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 3d120 │ │ + bne.n 3d428 │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ - ble.n 3d07e │ │ + ble.n 3d386 │ │ movs r0, #16 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 3d1c8 │ │ - ldr r1, [pc, #180] @ (3d1f4 ) │ │ + beq.n 3d4d0 │ │ + ldr r1, [pc, #180] @ (3d4fc ) │ │ movs r2, #1 │ │ strb.w fp, [r0, #12] │ │ add r3, sp, #128 @ 0x80 │ │ add r1, pc │ │ strd sl, r9, [r0] │ │ str r5, [r0, #8] │ │ strd r0, r1, [sp, #128] @ 0x80 │ │ add r0, sp, #112 @ 0x70 │ │ strb.w r2, [sp, #136] @ 0x88 │ │ mov r1, r6 │ │ mov r2, r7 │ │ - bl 249ac │ │ + bl 249e0 │ │ ldrb.w r0, [sp, #120] @ 0x78 │ │ cmp r0, #2 │ │ - bne.n 3d1d0 │ │ + bne.n 3d4d8 │ │ mov r0, r6 │ │ mov r1, r7 │ │ - bl 3197e │ │ + bl 31a4a │ │ mov r0, r6 │ │ mov r1, r7 │ │ mov fp, r4 │ │ str r4, [sp, #8] │ │ - bl 3197e │ │ + bl 31a4a │ │ dmb ish │ │ ldrex r0, [r5] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r5] │ │ cmp r2, #0 │ │ - bne.n 3d182 │ │ + bne.n 3d48a │ │ cmp r0, #1 │ │ - bne.n 3d19e │ │ + bne.n 3d4a6 │ │ mov r0, r5 │ │ dmb ish │ │ - bl 33182 │ │ + bl 3334a │ │ ldr r0, [sp, #8] │ │ cmp r0, fp │ │ - bne.n 3d1aa │ │ + bne.n 3d4b2 │ │ str.w fp, [sp, #24] │ │ - b.n 3d1b6 │ │ + b.n 3d4be │ │ add r3, sp, #8 │ │ add.w ip, sp, #24 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r0, r1, r2, r3} │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add r0, sp, #24 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #140 @ 0x8c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #8 │ │ movs r1, #16 │ │ - bl 3de2a │ │ + bl 3e132 │ │ add r7, sp, #112 @ 0x70 │ │ add.w ip, sp, #128 @ 0x80 │ │ ldmia r7, {r1, r2, r7} │ │ - ldr r0, [pc, #28] @ (3d1f8 ) │ │ - ldr r3, [pc, #32] @ (3d1fc ) │ │ - ldr r4, [pc, #32] @ (3d200 ) │ │ + ldr r0, [pc, #28] @ (3d500 ) │ │ + ldr r3, [pc, #32] @ (3d504 ) │ │ + ldr r4, [pc, #32] @ (3d508 ) │ │ add r0, pc │ │ stmia.w ip, {r1, r2, r7} │ │ add r3, pc │ │ add r2, sp, #128 @ 0x80 │ │ movs r1, #43 @ 0x2b │ │ add r4, pc │ │ str r4, [sp, #0] │ │ - bl 414b0 │ │ + bl 417b8 │ │ udf #254 @ 0xfe │ │ - beq.n 3d218 │ │ - movs r1, r1 │ │ - stmia r2!, {r0, r2, r5, r7} │ │ - @ instruction: 0xfffdced4 │ │ - movs r1, r1 │ │ - ldmia r7!, {r1, r2, r3, r4, r5, r6} │ │ + ldmia r5, {r3, r4, r5} │ │ movs r1, r1 │ │ + ittte ls │ │ + vdupls.8 d28, d12[6] │ │ + movls r1, r1 │ │ + ldmials r4!, {r1, r2, r7} │ │ + movhi r1, r1 │ │ │ │ -0003d204 : │ │ +0003d50c : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #92 @ 0x5c │ │ strd r0, r1, [sp] │ │ movs r0, #0 │ │ movs r1, #4 │ │ add r4, sp, #40 @ 0x28 │ │ mov r8, r2 │ │ strd r0, r1, [sp, #48] @ 0x30 │ │ movw r1, #909 @ 0x38d │ │ strd r0, r0, [sp, #40] @ 0x28 │ │ strd r0, r0, [sp, #56] @ 0x38 │ │ strd r0, r1, [sp, #64] @ 0x40 │ │ - b.n 3d230 │ │ + b.n 3d538 │ │ lsrs r0, r2, #2 │ │ - bne.n 3d26e │ │ + bne.n 3d576 │ │ mov r0, r4 │ │ - bl 33cbc │ │ + bl 33c8c │ │ ldr r0, [sp, #60] @ 0x3c │ │ cmp r0, #0 │ │ - beq.n 3d230 │ │ + beq.n 3d538 │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r6, #1 │ │ movs r7, #0 │ │ - b.n 3d256 │ │ + b.n 3d55e │ │ umull r2, r5, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r5, r3, r7, r5 │ │ mla r7, r3, r7, r5 │ │ mov r3, r2 │ │ lsls r2, r0, #31 │ │ - beq.n 3d246 │ │ + beq.n 3d54e │ │ umull r2, r5, r3, r6 │ │ cmp r0, #1 │ │ - beq.n 3d22c │ │ + beq.n 3d534 │ │ mla r1, r3, r1, r5 │ │ mla r1, r7, r6, r1 │ │ mov r6, r2 │ │ - b.n 3d246 │ │ + b.n 3d54e │ │ ldr.w r0, [r8, #4] │ │ cmp r0, #0 │ │ - beq.w 3d38c │ │ + beq.w 3d694 │ │ ldr.w r5, [r8] │ │ mov.w r9, #1000 @ 0x3e8 │ │ ldr r7, [sp, #56] @ 0x38 │ │ add.w r0, r5, r0, lsl #4 │ │ str r0, [sp, #12] │ │ - b.n 3d292 │ │ + b.n 3d59a │ │ adds r5, #16 │ │ ldr r0, [sp, #12] │ │ cmp r5, r0 │ │ - beq.n 3d38c │ │ + beq.n 3d694 │ │ ldr.w lr, [r5, #12] │ │ cmp.w lr, #1 │ │ - bls.w 3d3d8 │ │ + bls.w 3d6e0 │ │ ldr.w r8, [r5] │ │ movw r0, #31829 @ 0x7c55 │ │ movt r0, #32586 @ 0x7f4a │ │ ldr r1, [sp, #40] @ 0x28 │ │ mul.w r0, r8, r0 │ │ ands r0, r1 │ │ cmp r7, r0 │ │ - bls.w 3d3f6 │ │ + bls.w 3d6fe │ │ ldrd sl, r1, [r5, #4] │ │ add.w r0, r0, r0, lsl #1 │ │ str r1, [sp, #16] │ │ ldrh r1, [r1, #0] │ │ str r1, [sp, #20] │ │ ldr r1, [sp, #52] @ 0x34 │ │ add.w r6, r1, r0, lsl #2 │ │ ldr.w fp, [r6, #8] │ │ cmp.w fp, #0 │ │ - beq.n 3d2fc │ │ + beq.n 3d604 │ │ ldr.w ip, [r6, #4] │ │ add.w r0, fp, fp, lsl #1 │ │ movs r2, #0 │ │ lsls r0, r0, #3 │ │ mov r3, ip │ │ ldrd r1, r4, [r3] │ │ eor.w r4, r4, sl │ │ eor.w r1, r1, r8 │ │ orrs r1, r4 │ │ - beq.n 3d352 │ │ + beq.n 3d65a │ │ adds r2, #1 │ │ adds r3, #24 │ │ subs r0, #24 │ │ - bne.n 3d2e4 │ │ + bne.n 3d5ec │ │ ldr r0, [sp, #64] @ 0x40 │ │ adds r0, #1 │ │ str r0, [sp, #64] @ 0x40 │ │ ldr r0, [r6, #0] │ │ add r4, sp, #40 @ 0x28 │ │ cmp fp, r0 │ │ - beq.n 3d37c │ │ + beq.n 3d684 │ │ ldr r1, [r6, #4] │ │ add.w r2, fp, fp, lsl #1 │ │ ldr r0, [sp, #64] @ 0x40 │ │ str.w r8, [r1, r2, lsl #3] │ │ add.w r1, r1, r2, lsl #3 │ │ ldr r2, [sp, #16] │ │ strd r2, lr, [r1, #8] │ │ ldr r2, [sp, #20] │ │ str.w sl, [r1, #4] │ │ str r2, [r1, #16] │ │ add.w r1, fp, #1 │ │ str r1, [r6, #8] │ │ lsls r1, r0, #29 │ │ - bpl.n 3d28a │ │ + bpl.n 3d592 │ │ mul.w r0, r0, r9 │ │ mov r1, r7 │ │ - blx d5af0 │ │ + blx d5b00 │ │ ldr r1, [sp, #68] @ 0x44 │ │ cmp r0, r1 │ │ - bls.n 3d28a │ │ + bls.n 3d592 │ │ mov r0, r4 │ │ - bl 33cbc │ │ + bl 33c8c │ │ ldr r7, [sp, #56] @ 0x38 │ │ ldr r0, [sp, #64] @ 0x40 │ │ cmp r7, #0 │ │ - bne.n 3d332 │ │ - b.n 3d3ee │ │ + bne.n 3d63a │ │ + b.n 3d6f6 │ │ sub.w fp, fp, #1 │ │ add.w r0, r2, r2, lsl #1 │ │ movs r2, #24 │ │ mov r4, lr │ │ add.w r1, fp, fp, lsl #1 │ │ add.w r0, ip, r0, lsl #3 │ │ add.w r1, ip, r1, lsl #3 │ │ - bl d53c2 │ │ + bl d51f6 │ │ mov lr, r4 │ │ str.w fp, [r6, #8] │ │ ldr r0, [r6, #0] │ │ add r4, sp, #40 @ 0x28 │ │ cmp fp, r0 │ │ - bne.n 3d30a │ │ + bne.n 3d612 │ │ mov r0, r6 │ │ str.w lr, [sp, #8] │ │ - bl 331c2 │ │ + bl 33438 │ │ ldr.w lr, [sp, #8] │ │ - b.n 3d30a │ │ + b.n 3d612 │ │ movs r0, #40 @ 0x28 │ │ - blx d87f0 │ │ - cbz r0, 3d3e6 │ │ + blx d8810 │ │ + cbz r0, 3d6ee │ │ add r4, sp, #40 @ 0x28 │ │ - ldr r3, [pc, #112] @ (3d408 ) │ │ + ldr r3, [pc, #112] @ (3d710 ) │ │ mov r2, r0 │ │ ldmia r4!, {r1, r5, r6, r7} │ │ add r3, pc │ │ stmia r0!, {r1, r5, r6, r7} │ │ ldmia.w r4, {r1, r5, r6, r7} │ │ stmia r0!, {r1, r5, r6, r7} │ │ ldr r0, [sp, #0] │ │ ldr r1, [sp, #4] │ │ str r0, [r2, #32] │ │ add r0, sp, #72 @ 0x48 │ │ - bl 32670 │ │ + bl 32740 │ │ movs r0, #17 │ │ ldr r1, [sp, #72] @ 0x48 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 3d3ca │ │ + beq.n 3d6d2 │ │ add r3, sp, #72 @ 0x48 │ │ add.w ip, sp, #28 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3} │ │ str r0, [sp, #24] │ │ add r0, sp, #24 │ │ - bl 23268 │ │ + bl 2329c │ │ add sp, #92 @ 0x5c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r3, [pc, #48] @ (3d40c ) │ │ + ldr r3, [pc, #48] @ (3d714 ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ mov r2, lr │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ movs r0, #8 │ │ movs r1, #40 @ 0x28 │ │ - bl 3de2a │ │ - ldr r0, [pc, #20] @ (3d404 ) │ │ + bl 3e132 │ │ + ldr r0, [pc, #20] @ (3d70c ) │ │ add r0, pc │ │ - bl 409c4 │ │ - ldr r2, [pc, #8] @ (3d400 ) │ │ + bl 40ccc │ │ + ldr r2, [pc, #8] @ (3d708 ) │ │ mov r1, r7 │ │ add r2, pc │ │ - bl 3fa74 │ │ - bvs.n 3d388 │ │ + bl 3fd7c │ │ + bcc.n 3d6a0 │ │ movs r1, r1 │ │ - bvs.n 3d360 │ │ + bcc.n 3d678 │ │ movs r1, r1 │ │ - ldmia r6, {r2, r3, r6} │ │ + ldmia r3!, {r2, r4, r6} │ │ movs r1, r1 │ │ - bvs.n 3d4a8 │ │ + bcc.n 3d7c0 │ │ movs r1, r1 │ │ │ │ -0003d410 : │ │ - ldr r0, [pc, #4] @ (3d418 ) │ │ +0003d718 : │ │ + ldr r0, [pc, #4] @ (3d720 ) │ │ add r0, pc │ │ bx lr │ │ nop │ │ - push {r0, r3, r4, r5, r6} │ │ - Address 0x3d41a is out of bounds. │ │ + cbz r3, 3d754 │ │ + Address 0x3d722 is out of bounds. │ │ │ │ │ │ -0003d41c : │ │ +0003d724 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ sub sp, #8 │ │ mov r8, r0 │ │ movs r0, #8 │ │ mov r7, r3 │ │ mov r4, r2 │ │ mov r6, r1 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 3d4b2 │ │ + beq.n 3d7ba │ │ mov r5, r0 │ │ strd r4, r7, [r5] │ │ dmb ish │ │ - ldr r0, [pc, #148] @ (3d4d4 ) │ │ + ldr r0, [pc, #148] @ (3d7dc ) │ │ add r0, pc │ │ ldrexd r7, r4, [r0] │ │ adds r1, r7, #1 │ │ adc.w r2, r4, #0 │ │ strexd r3, r1, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 3d442 │ │ + bne.n 3d74a │ │ dmb ish │ │ movs r0, #24 │ │ ldrd sl, r9, [r6, #40] @ 0x28 │ │ - blx d87f0 │ │ - cbz r0, 3d4ba │ │ + blx d8810 │ │ + cbz r0, 3d7c2 │ │ mov r6, r0 │ │ - ldr r0, [pc, #112] @ (3d4d8 ) │ │ + ldr r0, [pc, #112] @ (3d7e0 ) │ │ strd sl, r9, [r6, #8] │ │ add r0, pc │ │ strd r7, r4, [r6, #16] │ │ strd r5, r0, [r6] │ │ movs r0, #16 │ │ - blx d87f0 │ │ - cbz r0, 3d4c2 │ │ - ldr r2, [pc, #92] @ (3d4dc ) │ │ + blx d8810 │ │ + cbz r0, 3d7ca │ │ + ldr r2, [pc, #92] @ (3d7e4 ) │ │ mov r3, r0 │ │ - ldr r0, [pc, #92] @ (3d4e0 ) │ │ + ldr r0, [pc, #92] @ (3d7e8 ) │ │ mov r1, r6 │ │ add r2, pc │ │ strd sl, r9, [r3] │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, r8 │ │ strd r7, r4, [r3, #8] │ │ - bl 6071c │ │ + bl 60804 │ │ mov r4, r0 │ │ movs r0, #8 │ │ - blx d87f0 │ │ - cbz r0, 3d4ca │ │ - ldr r1, [pc, #60] @ (3d4e4 ) │ │ + blx d8810 │ │ + cbz r0, 3d7d2 │ │ + ldr r1, [pc, #60] @ (3d7ec ) │ │ add r1, pc │ │ strd r4, r1, [r0] │ │ add sp, #8 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ movs r0, #8 │ │ movs r1, #8 │ │ - bl 3de2a │ │ + bl 3e132 │ │ movs r0, #8 │ │ movs r1, #24 │ │ - bl 3de2a │ │ + bl 3e132 │ │ movs r0, #8 │ │ movs r1, #16 │ │ - bl 3de2a │ │ + bl 3e132 │ │ movs r0, #4 │ │ movs r1, #8 │ │ - bl 3de2a │ │ + bl 3e132 │ │ nop │ │ - asrs r4, r7, #12 │ │ + asrs r4, r2, #1 │ │ movs r2, r1 │ │ - bne.n 3d4dc │ │ + ldmia r6!, {r3} │ │ movs r1, r1 │ │ - ble.n 3d5cc │ │ + bge.n 3d8e4 │ │ movs r1, r1 │ │ - ble.n 3d3e4 │ │ + bge.n 3d6fc │ │ movs r1, r1 │ │ - bgt.n 3d4b4 │ │ + bls.n 3d7cc │ │ movs r1, r1 │ │ │ │ -0003d4e8 : │ │ +0003d7f0 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #12 │ │ mov r5, r0 │ │ movs r0, #8 │ │ mov r9, r3 │ │ mov sl, r2 │ │ mov r7, r1 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 3d58c │ │ + beq.n 3d894 │ │ mov r4, r0 │ │ ldrd r1, r0, [sp, #48] @ 0x30 │ │ str r5, [sp, #8] │ │ strd r1, r0, [r4] │ │ dmb ish │ │ - ldr r0, [pc, #152] @ (3d5ac ) │ │ + ldr r0, [pc, #152] @ (3d8b4 ) │ │ add r0, pc │ │ ldrexd r6, r5, [r0] │ │ adds r1, r6, #1 │ │ adc.w r2, r5, #0 │ │ strexd r3, r1, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 3d514 │ │ + bne.n 3d81c │ │ dmb ish │ │ movs r0, #32 │ │ ldrd r8, fp, [r7, #40] @ 0x28 │ │ - blx d87f0 │ │ - cbz r0, 3d594 │ │ + blx d8810 │ │ + cbz r0, 3d89c │ │ mov r7, r0 │ │ - ldr r0, [pc, #116] @ (3d5b0 ) │ │ + ldr r0, [pc, #116] @ (3d8b8 ) │ │ strd r8, fp, [r7, #8] │ │ add r0, pc │ │ strd r6, r5, [r7, #16] │ │ strd sl, r9, [r7, #24] │ │ strd r4, r0, [r7] │ │ movs r0, #24 │ │ - blx d87f0 │ │ - cbz r0, 3d59c │ │ - ldr r2, [pc, #92] @ (3d5b4 ) │ │ + blx d8810 │ │ + cbz r0, 3d8a4 │ │ + ldr r2, [pc, #92] @ (3d8bc ) │ │ mov r3, r0 │ │ - ldr r0, [pc, #92] @ (3d5b8 ) │ │ + ldr r0, [pc, #92] @ (3d8c0 ) │ │ mov r1, r7 │ │ add r2, pc │ │ strd r8, fp, [r3] │ │ add r0, pc │ │ str r0, [sp, #0] │ │ ldr r0, [sp, #8] │ │ strd sl, r9, [r3, #8] │ │ strd r6, r5, [r3, #16] │ │ - bl 6071c │ │ + bl 60804 │ │ mov r4, r0 │ │ movs r0, #8 │ │ - blx d87f0 │ │ - cbz r0, 3d5a4 │ │ - ldr r1, [pc, #60] @ (3d5bc ) │ │ + blx d8810 │ │ + cbz r0, 3d8ac │ │ + ldr r1, [pc, #60] @ (3d8c4 ) │ │ add r1, pc │ │ strd r4, r1, [r0] │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #8 │ │ movs r1, #8 │ │ - bl 3de2a │ │ + bl 3e132 │ │ movs r0, #8 │ │ movs r1, #32 │ │ - bl 3de2a │ │ + bl 3e132 │ │ movs r0, #8 │ │ movs r1, #24 │ │ - bl 3de2a │ │ + bl 3e132 │ │ movs r0, #4 │ │ movs r1, #8 │ │ - bl 3de2a │ │ - asrs r2, r5, #9 │ │ + bl 3e132 │ │ + lsrs r2, r0, #30 │ │ movs r2, r1 │ │ - beq.n 3d610 │ │ + ldmia r5, {r1, r2, r4, r5} │ │ movs r1, r1 │ │ - bgt.n 3d678 │ │ + bls.n 3d990 │ │ movs r1, r1 │ │ - bgt.n 3d690 │ │ + bls.n 3d9a8 │ │ movs r1, r1 │ │ - bgt.n 3d5d8 │ │ + bls.n 3d8f0 │ │ movs r1, r1 │ │ │ │ -0003d5c0 : │ │ +0003d8c8 : │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #300 @ 0x12c │ │ mov r6, r2 │ │ str r1, [sp, #24] │ │ ldr r5, [r6, #96] @ 0x60 │ │ ldrd r2, r1, [r2] │ │ cmp r5, #0 │ │ str r2, [sp, #12] │ │ str r6, [sp, #48] @ 0x30 │ │ str r0, [sp, #8] │ │ strd r1, r5, [sp, #16] │ │ - beq.w 3d9a8 │ │ + beq.w 3dcb0 │ │ movs r0, #88 @ 0x58 │ │ ldr r7, [r6, #92] @ 0x5c │ │ mul.w r4, r5, r0 │ │ mov r0, r4 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ str r0, [sp, #44] @ 0x2c │ │ - beq.w 3dc68 │ │ + beq.w 3df70 │ │ movs r0, #88 @ 0x58 │ │ movs r1, #0 │ │ mla r0, r5, r0, r7 │ │ mov.w sl, #0 │ │ mov.w ip, #0 │ │ mov lr, r5 │ │ movs r2, #0 │ │ str r0, [sp, #40] @ 0x28 │ │ - b.n 3d786 │ │ + b.n 3da8e │ │ ldrh.w r0, [r7, #5] │ │ strh.w r0, [sp, #224] @ 0xe0 │ │ ldrb r0, [r7, #4] │ │ ldrd r3, r6, [r7, #8] │ │ str r5, [sp, #140] @ 0x8c │ │ ldr r5, [r7, #40] @ 0x28 │ │ str r0, [sp, #60] @ 0x3c │ │ @@ -31580,81 +31773,81 @@ │ │ ldr r0, [sp, #52] @ 0x34 │ │ strb.w r1, [r5, #55] @ 0x37 │ │ mov r1, r9 │ │ strb.w r4, [r5, #44] @ 0x2c │ │ str.w r8, [r5, #20] │ │ str r0, [r5, #84] @ 0x54 │ │ strh.w r3, [r5, #53] @ 0x35 │ │ - beq.w 3d9ac │ │ + beq.w 3dcb4 │ │ ldr r0, [sp, #40] @ 0x28 │ │ strd r2, lr, [sp, #132] @ 0x84 │ │ cmp r7, r0 │ │ - beq.w 3d9ac │ │ + beq.w 3dcb4 │ │ ldr r5, [r7, #16] │ │ movs r0, #1 │ │ cmp r5, #0 │ │ it mi │ │ eormi.w r0, r5, #2147483648 @ 0x80000000 │ │ cmp r0, #0 │ │ - beq.w 3d60e │ │ + beq.w 3d916 │ │ cmp r0, #1 │ │ - bne.n 3d7c8 │ │ + bne.n 3dad0 │ │ strd sl, r4, [sp, #32] │ │ ldrd r4, r8, [r7, #20] │ │ cmp.w r8, #0 │ │ ldr r6, [r7, #48] @ 0x30 │ │ ldrb.w r5, [r7, #52] @ 0x34 │ │ str r1, [sp, #128] @ 0x80 │ │ - beq.n 3d7e4 │ │ + beq.n 3daec │ │ mov r0, r8 │ │ - blx d87f0 │ │ - cbnz r0, 3d7e6 │ │ - b.n 3dc50 │ │ + blx d8810 │ │ + cbnz r0, 3daee │ │ + b.n 3df58 │ │ ldrd r4, r6, [r7, #76] @ 0x4c │ │ cmp r6, #0 │ │ str.w ip, [sp, #36] @ 0x24 │ │ str.w r8, [sp, #124] @ 0x7c │ │ - beq.n 3d8a2 │ │ + beq.n 3dbaa │ │ mov r0, r6 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - bne.n 3d8a4 │ │ - b.n 3dc48 │ │ + bne.n 3dbac │ │ + b.n 3df50 │ │ movs r0, #1 │ │ mov r1, r4 │ │ mov r2, r8 │ │ str r0, [sp, #124] @ 0x7c │ │ - bl d53c6 │ │ + bl d52ea │ │ ldrd r0, r1, [r7, #8] │ │ ldr r4, [r7, #36] @ 0x24 │ │ str r6, [sp, #28] │ │ cmp r4, #0 │ │ strd r1, r0, [sp, #64] @ 0x40 │ │ str r5, [sp, #120] @ 0x78 │ │ strd r8, r4, [sp, #140] @ 0x8c │ │ - beq.w 3d91e │ │ + beq.w 3dc26 │ │ add.w r0, r4, r4, lsl #1 │ │ str r7, [sp, #116] @ 0x74 │ │ ldr r7, [r7, #32] │ │ lsls r0, r0, #4 │ │ str r0, [sp, #148] @ 0x94 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 3dc58 │ │ + beq.w 3df60 │ │ mov sl, r0 │ │ movs r5, #0 │ │ mov r8, r4 │ │ - b.n 3d87a │ │ + b.n 3db82 │ │ movs r6, #1 │ │ mov r0, r6 │ │ mov r1, sl │ │ mov r2, r4 │ │ add.w r9, r7, #48 @ 0x30 │ │ sub.w r8, r8, #1 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldrd r3, r0, [r7] │ │ mov sl, fp │ │ ldrh.w ip, [r7, #40] @ 0x28 │ │ cmp.w r8, #0 │ │ ldrb.w r1, [r7, #32] │ │ ldr.w lr, [r7, #28] │ │ ldrd r2, r7, [r7, #8] │ │ @@ -31664,36 +31857,36 @@ │ │ strb.w r1, [r3, #32] │ │ add.w r1, r3, #4 │ │ stmia r1!, {r0, r2, r7} │ │ mov r7, r9 │ │ strd r4, r6, [r3, #16] │ │ strd r4, lr, [r3, #24] │ │ strh.w ip, [r3, #40] @ 0x28 │ │ - beq.n 3d89a │ │ + beq.n 3dba2 │ │ ldr r0, [sp, #148] @ 0x94 │ │ cmp r0, r5 │ │ - beq.n 3d89a │ │ + beq.n 3dba2 │ │ mov fp, sl │ │ ldrd sl, r4, [r7, #20] │ │ cmp r4, #0 │ │ - beq.n 3d826 │ │ + beq.n 3db2e │ │ mov r0, r4 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 3dc30 │ │ + beq.w 3df38 │ │ mov r6, r0 │ │ - b.n 3d828 │ │ + b.n 3db30 │ │ ldr.w r8, [sp, #140] @ 0x8c │ │ ldr r7, [sp, #116] @ 0x74 │ │ - b.n 3d922 │ │ + b.n 3dc2a │ │ movs r0, #1 │ │ mov r1, r4 │ │ mov r2, r6 │ │ str r0, [sp, #104] @ 0x68 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldrb.w r0, [r7, #60] @ 0x3c │ │ bic.w r1, fp, #255 @ 0xff │ │ ldr r5, [r7, #40] @ 0x28 │ │ add.w fp, r1, r0 │ │ movs r0, #1 │ │ movt r0, #32768 @ 0x8000 │ │ ldr.w r9, [r7, #48] @ 0x30 │ │ @@ -31726,99 +31919,99 @@ │ │ ubfx r0, r5, #16, #8 │ │ str r0, [sp, #112] @ 0x70 │ │ ubfx r0, r5, #8, #8 │ │ str r0, [sp, #108] @ 0x6c │ │ uxtb r0, r5 │ │ str r6, [sp, #72] @ 0x48 │ │ str r0, [sp, #148] @ 0x94 │ │ - b.n 3d6b8 │ │ + b.n 3d9c0 │ │ mov.w sl, #8 │ │ ldrd r9, r6, [r7, #60] @ 0x3c │ │ ldrb r0, [r7, #4] │ │ ldrb.w fp, [r7, #42] @ 0x2a │ │ ldrb.w r5, [r7, #41] @ 0x29 │ │ str r0, [sp, #60] @ 0x3c │ │ ldr r0, [r7, #0] │ │ str r0, [sp, #56] @ 0x38 │ │ ldrb.w r0, [r7, #40] @ 0x28 │ │ str r0, [sp, #148] @ 0x94 │ │ - cbz r6, 3d94a │ │ + cbz r6, 3dc52 │ │ mov r0, r6 │ │ - blx d87f0 │ │ + blx d8810 │ │ mov r4, r0 │ │ - cbnz r0, 3d94c │ │ - b.n 3dc48 │ │ + cbnz r0, 3dc54 │ │ + b.n 3df50 │ │ movs r4, #1 │ │ mov r0, r4 │ │ mov r1, r9 │ │ mov r2, r6 │ │ strd r5, fp, [sp, #108] @ 0x6c │ │ str.w sl, [sp, #116] @ 0x74 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldrd r9, r2, [r7, #72] @ 0x48 │ │ mov fp, r4 │ │ - cbz r2, 3d974 │ │ + cbz r2, 3dc7c │ │ mov r0, r2 │ │ mov r4, r2 │ │ - blx d87f0 │ │ + blx d8810 │ │ mov r2, r4 │ │ - cbnz r0, 3d976 │ │ - b.n 3dc60 │ │ + cbnz r0, 3dc7e │ │ + b.n 3df68 │ │ movs r0, #1 │ │ mov r1, r9 │ │ str r0, [sp, #72] @ 0x48 │ │ mov r4, r2 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r0, [sp, #144] @ 0x90 │ │ ldrb.w r1, [r7, #80] @ 0x50 │ │ str r1, [sp, #100] @ 0x64 │ │ ldrb.w r1, [r7, #81] @ 0x51 │ │ lsrs r3, r0, #8 │ │ str r1, [sp, #96] @ 0x60 │ │ uxtb r0, r0 │ │ add r1, sp, #76 @ 0x4c │ │ str r6, [sp, #92] @ 0x5c │ │ str r4, [sp, #104] @ 0x68 │ │ stmia.w r1, {r0, r4, r6, r8} │ │ ldrd r2, lr, [sp, #132] @ 0x84 │ │ ldr r4, [sp, #36] @ 0x24 │ │ ldrd r9, sl, [sp, #28] │ │ - b.n 3d6b8 │ │ + b.n 3d9c0 │ │ movs r0, #8 │ │ str r0, [sp, #44] @ 0x2c │ │ ldrb.w r0, [r6, #124] @ 0x7c │ │ mov r1, r6 │ │ str r0, [sp, #140] @ 0x8c │ │ ldrb.w r0, [r1, #8]! │ │ cmp r0, #32 │ │ - bne.w 3daf4 │ │ + bne.w 3ddfc │ │ movs r0, #32 │ │ str r0, [sp, #132] @ 0x84 │ │ ldr r7, [r6, #108] @ 0x6c │ │ str r7, [sp, #136] @ 0x88 │ │ cmp r7, #0 │ │ - beq.w 3db16 │ │ + beq.w 3de1e │ │ add.w r0, r7, r7, lsl #1 │ │ ldr r4, [r6, #104] @ 0x68 │ │ mov.w r9, r0, lsl #4 │ │ mov r0, r9 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ str r0, [sp, #148] @ 0x94 │ │ - beq.w 3dc70 │ │ + beq.w 3df78 │ │ movs r5, #0 │ │ mov r6, r7 │ │ - b.n 3da38 │ │ + b.n 3dd40 │ │ movs r7, #1 │ │ mov r0, r7 │ │ mov r1, sl │ │ mov r2, fp │ │ add.w r8, r4, #48 @ 0x30 │ │ subs r6, #1 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r0, [sp, #148] @ 0x94 │ │ ldrd r3, sl, [r4] │ │ ldr.w ip, [r4, #28] │ │ ldrb.w lr, [r4, #40] @ 0x28 │ │ ldrb.w r2, [r4, #32] │ │ ldrd r1, r4, [r4, #8] │ │ str r3, [r0, r5] │ │ @@ -31827,48 +32020,48 @@ │ │ strd r4, fp, [r3, #12] │ │ add.w r0, r3, #20 │ │ mov r4, r8 │ │ strb.w r2, [r3, #32] │ │ strb.w lr, [r3, #40] @ 0x28 │ │ strd sl, r1, [r3, #4] │ │ stmia.w r0, {r7, fp, ip} │ │ - cbz r6, 3da56 │ │ + cbz r6, 3dd5e │ │ cmp r9, r5 │ │ - beq.n 3da56 │ │ + beq.n 3dd5e │ │ ldrd sl, fp, [r4, #20] │ │ cmp.w fp, #0 │ │ - beq.n 3d9ea │ │ + beq.n 3dcf2 │ │ mov r0, fp │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 3dc38 │ │ + beq.w 3df40 │ │ mov r7, r0 │ │ - b.n 3d9ec │ │ + b.n 3dcf4 │ │ ldr r6, [sp, #48] @ 0x30 │ │ ldr.w r8, [r6, #120] @ 0x78 │ │ str.w r8, [sp, #128] @ 0x80 │ │ cmp.w r8, #0 │ │ - beq.n 3db28 │ │ + beq.n 3de30 │ │ add.w r0, r8, r8, lsl #1 │ │ ldr r6, [r6, #116] @ 0x74 │ │ lsls r0, r0, #4 │ │ str r0, [sp, #144] @ 0x90 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 3dc78 │ │ + beq.w 3df80 │ │ mov sl, r0 │ │ movs r5, #0 │ │ - b.n 3dad2 │ │ + b.n 3ddda │ │ movs r4, #1 │ │ mov r0, r4 │ │ mov r1, fp │ │ mov r2, r7 │ │ add.w r9, r6, #48 @ 0x30 │ │ sub.w r8, r8, #1 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldrd r3, r0, [r6] │ │ cmp.w r8, #0 │ │ ldr.w ip, [r6, #28] │ │ ldrb.w lr, [r6, #40] @ 0x28 │ │ ldrb.w r2, [r6, #32] │ │ ldrd r1, r6, [r6, #8] │ │ str.w r3, [sl, r5] │ │ @@ -31877,94 +32070,94 @@ │ │ strb.w r2, [r3, #32] │ │ add.w r2, r3, #4 │ │ stmia r2!, {r0, r1, r6, r7} │ │ add.w r0, r3, #20 │ │ mov r6, r9 │ │ strb.w lr, [r3, #40] @ 0x28 │ │ stmia.w r0, {r4, r7, ip} │ │ - beq.n 3daf0 │ │ + beq.n 3ddf8 │ │ ldr r0, [sp, #144] @ 0x90 │ │ cmp r0, r5 │ │ - beq.n 3daf0 │ │ + beq.n 3ddf8 │ │ ldrd fp, r7, [r6, #20] │ │ cmp r7, #0 │ │ - beq.n 3da80 │ │ + beq.n 3dd88 │ │ mov r0, r7 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 3dc40 │ │ + beq.w 3df48 │ │ mov r4, r0 │ │ - b.n 3da82 │ │ + b.n 3dd8a │ │ ldr r6, [sp, #48] @ 0x30 │ │ - b.n 3db2c │ │ + b.n 3de34 │ │ add r4, sp, #224 @ 0xe0 │ │ mov r0, r4 │ │ - bl 34028 │ │ + bl 341f0 │ │ ldrb.w r0, [sp, #224] @ 0xe0 │ │ adds r1, r4, #1 │ │ str r0, [sp, #132] @ 0x84 │ │ add r0, sp, #152 @ 0x98 │ │ movs r2, #71 @ 0x47 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r7, [r6, #108] @ 0x6c │ │ str r7, [sp, #136] @ 0x88 │ │ cmp r7, #0 │ │ - bne.w 3d9cc │ │ + bne.w 3dcd4 │ │ movs r0, #8 │ │ str r0, [sp, #148] @ 0x94 │ │ ldr.w r8, [r6, #120] @ 0x78 │ │ str.w r8, [sp, #128] @ 0x80 │ │ cmp.w r8, #0 │ │ - bne.n 3da66 │ │ + bne.n 3dd6e │ │ mov.w sl, #8 │ │ add r0, sp, #224 @ 0xe0 │ │ add r1, sp, #152 @ 0x98 │ │ movs r2, #71 @ 0x47 │ │ ldrd r4, r8, [r6, #80] @ 0x50 │ │ - bl d4c50 │ │ + bl d50a2 │ │ movs r0, #8 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 3dc10 │ │ + beq.n 3df18 │ │ mov r7, r0 │ │ ldrd r1, r0, [sp, #336] @ 0x150 │ │ str r4, [sp, #144] @ 0x90 │ │ strd r1, r0, [r7] │ │ dmb ish │ │ - ldr r0, [pc, #296] @ (3dc80 ) │ │ + ldr r0, [pc, #296] @ (3df88 ) │ │ add r0, pc │ │ ldrexd r5, fp, [r0] │ │ adds r1, r5, #1 │ │ adc.w r2, fp, #0 │ │ strexd r3, r1, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 3db58 │ │ + bne.n 3de60 │ │ dmb ish │ │ ldr r0, [sp, #24] │ │ ldrd r9, r4, [r0, #40] @ 0x28 │ │ movs r0, #152 @ 0x98 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 3dc18 │ │ + beq.n 3df20 │ │ mov r6, r0 │ │ - ldr r0, [pc, #256] @ (3dc84 ) │ │ + ldr r0, [pc, #256] @ (3df8c ) │ │ ldr r1, [sp, #132] @ 0x84 │ │ movs r2, #71 @ 0x47 │ │ add r0, pc │ │ strb.w r1, [r6, #32] │ │ add r1, sp, #224 @ 0xe0 │ │ strd r9, r4, [r6] │ │ strd r7, r0, [r6, #16] │ │ ldr r0, [sp, #12] │ │ str r0, [r6, #24] │ │ ldr r0, [sp, #16] │ │ str r0, [r6, #28] │ │ add.w r0, r6, #33 @ 0x21 │ │ strd r5, fp, [r6, #8] │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r0, [sp, #140] @ 0x8c │ │ strb.w r0, [r6, #148] @ 0x94 │ │ ldr r0, [sp, #128] @ 0x80 │ │ strd r0, sl, [r6, #136] @ 0x88 │ │ str.w r0, [r6, #144] @ 0x90 │ │ ldr r0, [sp, #144] @ 0x90 │ │ strd r0, r8, [r6, #104] @ 0x68 │ │ @@ -31973,723 +32166,723 @@ │ │ str r0, [r6, #112] @ 0x70 │ │ strd r1, r0, [r6, #116] @ 0x74 │ │ ldr r0, [sp, #136] @ 0x88 │ │ ldr r1, [sp, #148] @ 0x94 │ │ str r0, [r6, #124] @ 0x7c │ │ strd r1, r0, [r6, #128] @ 0x80 │ │ movs r0, #16 │ │ - blx d87f0 │ │ - cbz r0, 3dc20 │ │ - ldr r2, [pc, #168] @ (3dc88 ) │ │ + blx d8810 │ │ + cbz r0, 3df28 │ │ + ldr r2, [pc, #168] @ (3df90 ) │ │ mov r3, r0 │ │ - ldr r0, [pc, #168] @ (3dc8c ) │ │ + ldr r0, [pc, #168] @ (3df94 ) │ │ mov r1, r6 │ │ add r2, pc │ │ strd r9, r4, [r3] │ │ add r0, pc │ │ str r0, [sp, #0] │ │ ldr r0, [sp, #8] │ │ strd r5, fp, [r3, #8] │ │ - bl 6071c │ │ + bl 60804 │ │ mov r4, r0 │ │ movs r0, #8 │ │ - blx d87f0 │ │ - cbz r0, 3dc28 │ │ - ldr r1, [pc, #140] @ (3dc90 ) │ │ + blx d8810 │ │ + cbz r0, 3df30 │ │ + ldr r1, [pc, #140] @ (3df98 ) │ │ add r1, pc │ │ strd r4, r1, [r0] │ │ add sp, #300 @ 0x12c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #8 │ │ movs r1, #8 │ │ - bl 3de2a │ │ + bl 3e132 │ │ movs r0, #8 │ │ movs r1, #152 @ 0x98 │ │ - bl 3de2a │ │ + bl 3e132 │ │ movs r0, #8 │ │ movs r1, #16 │ │ - bl 3de2a │ │ + bl 3e132 │ │ movs r0, #4 │ │ movs r1, #8 │ │ - bl 3de2a │ │ + bl 3e132 │ │ movs r0, #1 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r1, fp │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r1, r7 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r1, r6 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r1, r8 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ ldr r1, [sp, #148] @ 0x94 │ │ movs r0, #8 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r1, r2 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #8 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #8 │ │ mov r1, r9 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ ldr r1, [sp, #144] @ 0x90 │ │ movs r0, #8 │ │ - bl 3dfa4 │ │ - lsrs r6, r4, #16 │ │ + bl 3e2ac │ │ + lsrs r6, r7, #4 │ │ movs r2, r1 │ │ - ldmia r1, {r1, r2, r5, r6, r7} │ │ + stmia r6!, {r1, r2, r3, r5, r6, r7} │ │ movs r1, r1 │ │ - bpl.n 3dbfc │ │ + bcs.n 3df14 │ │ movs r1, r1 │ │ - bpl.n 3dc14 │ │ + bcs.n 3df2c │ │ movs r1, r1 │ │ - bpl.n 3dba4 │ │ + bcs.n 3debc │ │ movs r1, r1 │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #8 │ │ movs r3, #1 │ │ str r3, [sp, #0] │ │ - bl 41b8e │ │ + bl 41e96 │ │ movs r2, #1 │ │ movt r2, #32768 @ 0x8000 │ │ cmp r0, r2 │ │ itt eq │ │ addeq sp, #8 │ │ popeq {r7, pc} │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #12 │ │ mov r4, r2 │ │ mov r8, r1 │ │ mov fp, r0 │ │ - cbz r2, 3dcfa │ │ + cbz r2, 3e002 │ │ ldrb.w r0, [r8] │ │ cmp r0, #47 @ 0x2f │ │ - beq.n 3dd04 │ │ + beq.n 3e00c │ │ cmp r4, #1 │ │ - beq.n 3dcfa │ │ + beq.n 3e002 │ │ mov r0, r8 │ │ ldrsb.w r1, [r0, #1]! │ │ cmn.w r1, #64 @ 0x40 │ │ - blt.n 3dcfa │ │ + blt.n 3e002 │ │ cmp r4, #3 │ │ - bhi.n 3dce6 │ │ - beq.n 3dcf0 │ │ - b.n 3dcfa │ │ + bhi.n 3dfee │ │ + beq.n 3dff8 │ │ + b.n 3e002 │ │ ldrsb.w r1, [r8, #3] │ │ cmn.w r1, #64 @ 0x40 │ │ - blt.n 3dcfa │ │ + blt.n 3e002 │ │ ldrh r0, [r0, #0] │ │ movw r1, #12090 @ 0x2f3a │ │ cmp r0, r1 │ │ - beq.n 3dd04 │ │ + beq.n 3e00c │ │ mov r0, r8 │ │ mov r1, r4 │ │ - bl 3ddea │ │ - cbz r0, 3dd12 │ │ + bl 3e0f2 │ │ + cbz r0, 3e01a │ │ cmp r4, #0 │ │ - bpl.n 3dd4a │ │ + bpl.n 3e052 │ │ movs r6, #0 │ │ mov r0, r6 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ ldrd r9, r6, [fp, #4] │ │ mov r1, r6 │ │ mov r0, r9 │ │ - bl 3ddea │ │ - cbz r6, 3dd60 │ │ + bl 3e0f2 │ │ + cbz r6, 3e068 │ │ add.w r1, r9, r6 │ │ movs r5, #47 @ 0x2f │ │ cmp r0, #0 │ │ ldrb.w r1, [r1, #-1] │ │ it ne │ │ movne r5, #92 @ 0x5c │ │ cmp r5, r1 │ │ - beq.n 3dd62 │ │ + beq.n 3e06a │ │ ldr.w r0, [fp] │ │ cmp r0, r6 │ │ mov r0, r6 │ │ - beq.n 3ddda │ │ + beq.n 3e0e2 │ │ adds r6, #1 │ │ strb.w r5, [r9, r0] │ │ str.w r6, [fp, #8] │ │ - b.n 3dd62 │ │ - cbz r4, 3dd84 │ │ + b.n 3e06a │ │ + cbz r4, 3e08c │ │ mov r0, r4 │ │ movs r1, #1 │ │ movs r6, #1 │ │ - bl 4191c │ │ + bl 41c24 │ │ mov r9, r0 │ │ mov sl, r4 │ │ cmp r0, #0 │ │ - beq.n 3dd0a │ │ - b.n 3dd8c │ │ + beq.n 3e012 │ │ + b.n 3e094 │ │ movs r6, #0 │ │ ldr.w r0, [fp] │ │ subs r0, r0, r6 │ │ cmp r4, r0 │ │ - bhi.n 3ddca │ │ + bhi.n 3e0d2 │ │ add.w r0, r9, r6 │ │ mov r1, r8 │ │ mov r2, r4 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr.w r0, [fp, #8] │ │ add r0, r4 │ │ str.w r0, [fp, #8] │ │ - b.n 3ddc2 │ │ + b.n 3e0ca │ │ mov.w sl, #0 │ │ mov.w r9, #1 │ │ mov r0, r9 │ │ mov r1, r8 │ │ mov r2, r4 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr.w r1, [fp] │ │ - cbz r1, 3dda8 │ │ + cbz r1, 3e0b0 │ │ movs r2, #1 │ │ ldr.w r0, [fp, #4] │ │ str r2, [sp, #8] │ │ add r2, sp, #4 │ │ - b.n 3ddac │ │ + b.n 3e0b4 │ │ movs r1, #0 │ │ add r2, sp, #8 │ │ str r1, [r2, #0] │ │ ldr r1, [sp, #8] │ │ - cbz r1, 3ddba │ │ + cbz r1, 3e0c2 │ │ ldr r1, [sp, #4] │ │ - cbz r1, 3ddba │ │ - blx d87c0 │ │ + cbz r1, 3e0c2 │ │ + blx d87d0 │ │ strd sl, r9, [fp] │ │ str.w r4, [fp, #8] │ │ add sp, #12 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, fp │ │ mov r1, r6 │ │ mov r2, r4 │ │ - bl 3dc94 │ │ + bl 3df9c │ │ ldrd r9, r6, [fp, #4] │ │ - b.n 3dd6c │ │ + b.n 3e074 │ │ mov r0, fp │ │ mov r1, r6 │ │ movs r2, #1 │ │ - bl 3dc94 │ │ + bl 3df9c │ │ ldrd r9, r0, [fp, #4] │ │ - b.n 3dd3e │ │ - cbz r1, 3de0c │ │ + b.n 3e046 │ │ + cbz r1, 3e114 │ │ ldrb r2, [r0, #0] │ │ cmp r2, #92 @ 0x5c │ │ itt eq │ │ moveq r0, #1 │ │ bxeq lr │ │ cmp r1, #1 │ │ - beq.n 3de0c │ │ + beq.n 3e114 │ │ mov r2, r0 │ │ ldrsb.w r3, [r2, #1]! │ │ cmn.w r3, #64 @ 0x40 │ │ - blt.n 3de0c │ │ + blt.n 3e114 │ │ cmp r1, #3 │ │ - bhi.n 3de10 │ │ - beq.n 3de1a │ │ + bhi.n 3e118 │ │ + beq.n 3e122 │ │ movs r0, #0 │ │ bx lr │ │ ldrsb.w r0, [r0, #3] │ │ cmn.w r0, #64 @ 0x40 │ │ - blt.n 3de0c │ │ + blt.n 3e114 │ │ ldrh r0, [r2, #0] │ │ movw r1, #23610 @ 0x5c3a │ │ subs r0, r0, r1 │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ bx lr │ │ push {r7, lr} │ │ mov r7, sp │ │ mov r2, r0 │ │ mov r0, r1 │ │ mov r1, r2 │ │ - bl 9409e │ │ + bl 9410a │ │ ldrd r2, r3, [r1] │ │ ldrd r0, r1, [r0, #4] │ │ - b.w 3faa0 │ │ + b.w 3fda8 │ │ mov r3, r1 │ │ ldrd r1, r2, [r0, #4] │ │ mov r0, r3 │ │ - b.w 3ffd4 │ │ + b.w 402dc │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #52 @ 0x34 │ │ mov sl, r0 │ │ strd r1, r2, [sp, #8] │ │ add r0, sp, #36 @ 0x24 │ │ add r1, sp, #8 │ │ mov r4, r2 │ │ - bl 41724 │ │ + bl 41a2c │ │ ldr r6, [sp, #36] @ 0x24 │ │ - cbz r6, 3de88 │ │ + cbz r6, 3e190 │ │ ldr.w r9, [sp, #40] @ 0x28 │ │ ldr r0, [sp, #48] @ 0x30 │ │ - cbz r0, 3de8e │ │ - cbz r4, 3de9e │ │ + cbz r0, 3e196 │ │ + cbz r4, 3e1a6 │ │ mov r0, r4 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 3df86 │ │ + beq.w 3e28e │ │ mov r5, r0 │ │ - b.n 3dea0 │ │ + b.n 3e1a8 │ │ mov.w r9, #0 │ │ movs r6, #1 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ stmia.w sl, {r0, r6, r9} │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r5, #1 │ │ mov.w r8, #0 │ │ add r0, sp, #16 │ │ cmp r9, r4 │ │ stmia.w r0, {r4, r5, r8} │ │ - bhi.n 3df64 │ │ + bhi.n 3e26c │ │ add.w r0, r5, r8 │ │ mov r1, r6 │ │ mov r2, r9 │ │ - bl d53c6 │ │ + bl d52ea │ │ add.w r1, r8, r9 │ │ str r1, [sp, #24] │ │ subs r0, r4, r1 │ │ str.w sl, [sp, #4] │ │ cmp r0, #2 │ │ - bls.n 3df78 │ │ + bls.n 3e280 │ │ movw r0, #49135 @ 0xbfef │ │ movs r2, #189 @ 0xbd │ │ strh r0, [r5, r1] │ │ adds r0, r5, r1 │ │ adds r6, r1, #3 │ │ strb r2, [r0, #2] │ │ add.w sl, sp, #36 @ 0x24 │ │ ldrd r0, r2, [sp, #8] │ │ add.w fp, sp, #28 │ │ str r2, [sp, #32] │ │ strd r6, r0, [sp, #24] │ │ mov r0, sl │ │ mov r1, fp │ │ - bl 41724 │ │ + bl 41a2c │ │ ldr r4, [sp, #36] @ 0x24 │ │ - cbz r4, 3df54 │ │ + cbz r4, 3e25c │ │ ldr r0, [sp, #16] │ │ ldr.w r9, [sp, #40] @ 0x28 │ │ ldr.w r8, [sp, #48] @ 0x30 │ │ subs r0, r0, r6 │ │ cmp r9, r0 │ │ - bhi.n 3df34 │ │ + bhi.n 3e23c │ │ adds r0, r5, r6 │ │ mov r1, r4 │ │ mov r2, r9 │ │ - bl d53c6 │ │ + bl d52ea │ │ add r6, r9 │ │ cmp.w r8, #0 │ │ str r6, [sp, #24] │ │ - beq.n 3deea │ │ + beq.n 3e1f2 │ │ ldr r0, [sp, #16] │ │ subs r0, r0, r6 │ │ cmp r0, #2 │ │ - bls.n 3df44 │ │ + bls.n 3e24c │ │ movw r0, #49135 @ 0xbfef │ │ movs r1, #189 @ 0xbd │ │ strh r0, [r5, r6] │ │ adds r0, r5, r6 │ │ adds r6, #3 │ │ strb r1, [r0, #2] │ │ str r6, [sp, #24] │ │ - b.n 3deea │ │ + b.n 3e1f2 │ │ add r0, sp, #16 │ │ mov r1, r6 │ │ mov r2, r9 │ │ - bl 3dfb2 │ │ + bl 3e2ba │ │ ldrd r5, r6, [sp, #20] │ │ - b.n 3df06 │ │ + b.n 3e20e │ │ add r0, sp, #16 │ │ mov r1, r6 │ │ movs r2, #3 │ │ - bl 3dfb2 │ │ + bl 3e2ba │ │ ldrd r5, r6, [sp, #20] │ │ - b.n 3df22 │ │ + b.n 3e22a │ │ add r2, sp, #16 │ │ ldr r3, [sp, #4] │ │ ldmia r2, {r0, r1, r2} │ │ stmia r3!, {r0, r1, r2} │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ add r0, sp, #16 │ │ movs r1, #0 │ │ mov r2, r9 │ │ - bl 3dfb2 │ │ + bl 3e2ba │ │ add.w r8, sp, #16 │ │ ldmia.w r8, {r4, r5, r8} │ │ - b.n 3deae │ │ + b.n 3e1b6 │ │ add r0, sp, #16 │ │ movs r2, #3 │ │ - bl 3dfb2 │ │ + bl 3e2ba │ │ ldrd r5, r1, [sp, #20] │ │ - b.n 3deca │ │ + b.n 3e1d2 │ │ movs r0, #1 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ - b.n 3df90 │ │ + bl 3e2ac │ │ + b.n 3e298 │ │ mov r4, r0 │ │ ldr r0, [sp, #16] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #20] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ push {r7, lr} │ │ mov r7, sp │ │ - cbnz r0, 3dfae │ │ - bl 3e03c │ │ - bl 3de2a │ │ + cbnz r0, 3e2b6 │ │ + bl 3e344 │ │ + bl 3e132 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ adds r5, r2, r1 │ │ - bcs.n 3dff0 │ │ + bcs.n 3e2f8 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ add r0, sp, #4 │ │ cmp.w r5, r1, lsl #1 │ │ it ls │ │ lslls r5, r1, #1 │ │ cmp r5, #8 │ │ it ls │ │ movls r5, #8 │ │ mov r3, r5 │ │ - bl 3dff6 │ │ + bl 3e2fe │ │ ldr r0, [sp, #4] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #8] │ │ strdne r5, r0, [r4] │ │ addne sp, #16 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #8] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #0 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ cmp r3, #0 │ │ - bpl.n 3e00c │ │ + bpl.n 3e314 │ │ movs r0, #1 │ │ movs r5, #0 │ │ movs r1, #4 │ │ str r5, [r4, r1] │ │ str r0, [r4, #0] │ │ pop {r4, r5, r7, pc} │ │ mov r5, r3 │ │ - cbz r1, 3e026 │ │ + cbz r1, 3e32e │ │ mov r0, r2 │ │ mov r1, r5 │ │ - blx d8870 │ │ - cbz r0, 3e030 │ │ + blx d8880 │ │ + cbz r0, 3e338 │ │ str r0, [r4, #4] │ │ movs r0, #0 │ │ movs r1, #8 │ │ str r5, [r4, r1] │ │ str r0, [r4, #0] │ │ pop {r4, r5, r7, pc} │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - bne.n 3e01a │ │ + bne.n 3e322 │ │ movs r0, #1 │ │ str r0, [r4, #4] │ │ movs r1, #8 │ │ str r5, [r4, r1] │ │ str r0, [r4, #0] │ │ pop {r4, r5, r7, pc} │ │ push {r7, lr} │ │ mov r7, sp │ │ - ldr r0, [pc, #12] @ (3e050 ) │ │ + ldr r0, [pc, #12] @ (3e358 ) │ │ movs r1, #35 @ 0x23 │ │ - ldr r2, [pc, #12] @ (3e054 ) │ │ + ldr r2, [pc, #12] @ (3e35c ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ nop │ │ - asrs r6, r0 │ │ - vcle.f d28, d20, #0 │ │ + subs r5, #254 @ 0xfe │ │ + vsubl.u q14, d29, d28 │ │ movs r1, r1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #16 │ │ ldr r1, [r0, #0] │ │ ldr r6, [r0, #8] │ │ cmp r1, r6 │ │ - beq.n 3e09c │ │ + beq.n 3e3a4 │ │ ldr r0, [r0, #4] │ │ adds r4, r6, #1 │ │ movs r2, #0 │ │ cmp r1, r4 │ │ strb r2, [r0, r6] │ │ - bls.n 3e082 │ │ - cbz r4, 3e08c │ │ + bls.n 3e38a │ │ + cbz r4, 3e394 │ │ mov r1, r4 │ │ mov r5, r0 │ │ - blx d8870 │ │ - cbz r0, 3e0c2 │ │ + blx d8880 │ │ + cbz r0, 3e3ca │ │ mov r1, r4 │ │ add sp, #16 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r0, #1 │ │ mov r1, r4 │ │ add sp, #16 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r2, [r0, #4] │ │ adds r4, r6, #1 │ │ add r0, sp, #4 │ │ mov r1, r6 │ │ mov r3, r4 │ │ mov r5, r2 │ │ - bl 3dff6 │ │ + bl 3e2fe │ │ ldr r0, [sp, #4] │ │ cmp r0, #1 │ │ - beq.n 3e0cc │ │ + beq.n 3e3d4 │ │ ldr r0, [sp, #8] │ │ movs r1, #0 │ │ strb r1, [r0, r6] │ │ mov r1, r4 │ │ add sp, #16 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #1 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ - b.n 3e0d4 │ │ + bl 3e2ac │ │ + b.n 3e3dc │ │ ldrd r0, r1, [sp, #8] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ udf #254 @ 0xfe │ │ mov r4, r0 │ │ - cbnz r6, 3e0de │ │ - b.n 3e0e4 │ │ + cbnz r6, 3e3e6 │ │ + b.n 3e3ec │ │ mov r4, r0 │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ - blx d6dd0 │ │ - bmi.n 3e096 │ │ + blx d6de0 │ │ + bmi.n 3e39e │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #24 │ │ mov r9, r0 │ │ mov sl, r2 │ │ mov r8, r1 │ │ lsls r0, r2, #31 │ │ - beq.n 3e106 │ │ + beq.n 3e40e │ │ mov.w r6, sl, lsr #1 │ │ - b.n 3e16e │ │ + b.n 3e476 │ │ ldrb.w r6, [r8] │ │ - cbz r6, 3e180 │ │ + cbz r6, 3e488 │ │ movs r0, #0 │ │ movs r2, #2 │ │ mov r3, r8 │ │ movs r1, #0 │ │ - b.n 3e122 │ │ + b.n 3e42a │ │ uxtab r3, r3, r6 │ │ uxtab r1, r1, r6 │ │ ldrb r6, [r3, #0] │ │ - cbz r6, 3e15e │ │ + cbz r6, 3e466 │ │ adds r3, #1 │ │ sxtb r4, r6 │ │ cmp.w r4, #4294967295 @ 0xffffffff │ │ - bgt.n 3e116 │ │ + bgt.n 3e41e │ │ uxtb r4, r6 │ │ cmp r4, #128 @ 0x80 │ │ - bne.n 3e13c │ │ + bne.n 3e444 │ │ ldrh r6, [r3, #0] │ │ add r3, r6 │ │ add r1, r6 │ │ adds r3, #2 │ │ - b.n 3e11e │ │ + b.n 3e426 │ │ and.w r5, r6, #3 │ │ and.w r4, r2, r6, lsr #1 │ │ rbit r5, r5 │ │ and.w r6, r2, r6, lsr #2 │ │ add.w r3, r3, r5, lsr #29 │ │ add r3, r4 │ │ add r3, r6 │ │ clz r6, r1 │ │ lsrs r6, r6, #5 │ │ orrs r0, r6 │ │ - b.n 3e11e │ │ + b.n 3e426 │ │ movs r6, #0 │ │ cmp r1, #16 │ │ mov.w r2, #0 │ │ it cc │ │ movcc r2, #1 │ │ tst r0, r2 │ │ - beq.n 3e1cc │ │ - cbz r6, 3e180 │ │ + beq.n 3e4d4 │ │ + cbz r6, 3e488 │ │ mov r0, r6 │ │ - blx d87f0 │ │ - cbnz r0, 3e184 │ │ + blx d8810 │ │ + cbnz r0, 3e48c │ │ movs r0, #1 │ │ mov r1, r6 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r6, #0 │ │ - ldr r1, [pc, #100] @ (3e1ec ) │ │ + ldr r1, [pc, #100] @ (3e4f4 ) │ │ movs r2, #0 │ │ str r2, [sp, #16] │ │ add r1, pc │ │ strd r6, r0, [sp, #8] │ │ add r0, sp, #8 │ │ mov r2, r8 │ │ mov r3, sl │ │ - bl 3ef94 │ │ + bl 3f29c │ │ cmp r0, #0 │ │ itttt eq │ │ addeq.w r2, sp, #8 │ │ ldmiaeq r2, {r0, r1, r2} │ │ stmiaeq.w r9, {r0, r1, r2} │ │ addeq sp, #24 │ │ itt eq │ │ ldmiaeq.w sp!, {r8, r9, sl} │ │ popeq {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #60] @ (3e1f0 ) │ │ - ldr r3, [pc, #60] @ (3e1f4 ) │ │ - ldr r1, [pc, #64] @ (3e1f8 ) │ │ + ldr r0, [pc, #60] @ (3e4f8 ) │ │ + ldr r3, [pc, #60] @ (3e4fc ) │ │ + ldr r1, [pc, #64] @ (3e500 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ sub.w r2, r7, #25 │ │ str r1, [sp, #0] │ │ movs r1, #86 @ 0x56 │ │ - bl 414b0 │ │ + bl 417b8 │ │ udf #254 @ 0xfe │ │ lsls r6, r1, #1 │ │ cmp.w r6, #4294967295 @ 0xffffffff │ │ - bgt.n 3e16e │ │ - bl 3e03c │ │ + bgt.n 3e476 │ │ + bl 3e344 │ │ ldr r1, [sp, #8] │ │ - cbz r1, 3e1e8 │ │ + cbz r1, 3e4f0 │ │ ldr r1, [sp, #12] │ │ mov r4, r0 │ │ mov r0, r1 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ - blx d6dd0 │ │ - stmia r4!, {r1, r3, r4} │ │ + blx d6de0 │ │ + stmia r1!, {r1, r5} │ │ movs r1, r1 │ │ - add r5, pc, #528 @ (adr r5, 3e404 ) │ │ - vrsra.u64 q14, q5, #3 │ │ + add r2, pc, #496 @ (adr r2, 3e6ec ) │ │ + vcge.s q14, q9, #0 │ │ movs r1, r1 │ │ - stmia r4!, {} │ │ + stmia r1!, {r3} │ │ movs r1, r1 │ │ ldrd r0, r2, [r1] │ │ - ldr r1, [pc, #8] @ (3e20c ) │ │ + ldr r1, [pc, #8] @ (3e514 ) │ │ ldr r3, [r2, #12] │ │ movs r2, #5 │ │ add r1, pc │ │ bx r3 │ │ nop │ │ - add r5, pc, #816 @ (adr r5, 3e540 ) │ │ + add r2, pc, #784 @ (adr r2, 3e828 ) │ │ vtbl.8 d22, {d13}, d1 │ │ cmp r1, #0 │ │ itt ne │ │ ldrne r0, [r0, #4] │ │ - bne.w d870c │ │ + bne.w d871c │ │ bx lr │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ mov r5, r0 │ │ ldr r0, [r0, #0] │ │ ldr r6, [r5, #8] │ │ mov r4, r2 │ │ subs r0, r0, r6 │ │ cmp r2, r0 │ │ - bhi.n 3e24a │ │ + bhi.n 3e552 │ │ ldr r0, [r5, #4] │ │ mov r2, r4 │ │ add r0, r6 │ │ - bl d53c6 │ │ + bl d52ea │ │ adds r0, r6, r4 │ │ str r0, [r5, #8] │ │ movs r0, #0 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ mov r8, r1 │ │ mov r0, r5 │ │ mov r1, r6 │ │ mov r2, r4 │ │ - bl 3dfb2 │ │ + bl 3e2ba │ │ ldr r6, [r5, #8] │ │ mov r1, r8 │ │ - b.n 3e234 │ │ + b.n 3e53c │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ ldr r4, [r0, #8] │ │ cmp r1, #128 @ 0x80 │ │ - bcs.n 3e26e │ │ + bcs.n 3e576 │ │ movs r5, #1 │ │ - b.n 3e282 │ │ + b.n 3e58a │ │ cmp.w r1, #2048 @ 0x800 │ │ - bcs.n 3e278 │ │ + bcs.n 3e580 │ │ movs r5, #2 │ │ - b.n 3e282 │ │ + b.n 3e58a │ │ movs r5, #4 │ │ cmp.w r1, #65536 @ 0x10000 │ │ it cc │ │ movcc r5, #3 │ │ ldr r2, [r0, #0] │ │ subs r2, r2, r4 │ │ cmp r5, r2 │ │ mov r2, r4 │ │ - bhi.n 3e2f4 │ │ + bhi.n 3e5fc │ │ ldr r3, [r0, #4] │ │ cmp r1, #128 @ 0x80 │ │ add r2, r3 │ │ - bcc.n 3e2e6 │ │ + bcc.n 3e5ee │ │ movw ip, #65534 @ 0xfffe │ │ mov r6, r1 │ │ movt ip, #1023 @ 0x3ff │ │ mov.w r8, r1, lsr #6 │ │ bfi r6, ip, #6, #26 │ │ cmp.w r1, #2048 @ 0x800 │ │ - bcs.n 3e2b4 │ │ + bcs.n 3e5bc │ │ strb r6, [r2, #1] │ │ orr.w r1, r8, #192 @ 0xc0 │ │ - b.n 3e2e6 │ │ + b.n 3e5ee │ │ bfi r8, ip, #6, #26 │ │ mov.w lr, r1, lsr #12 │ │ movs r3, #0 │ │ cmp.w r3, r1, lsr #16 │ │ - bne.n 3e2d0 │ │ + bne.n 3e5d8 │ │ strb r6, [r2, #2] │ │ orr.w r1, lr, #224 @ 0xe0 │ │ strb.w r8, [r2, #1] │ │ - b.n 3e2e6 │ │ + b.n 3e5ee │ │ mvn.w r3, #15 │ │ orr.w r1, r3, r1, lsr #18 │ │ bfi lr, ip, #6, #26 │ │ strb r6, [r2, #3] │ │ strb.w r8, [r2, #2] │ │ strb.w lr, [r2, #1] │ │ strb r1, [r2, #0] │ │ @@ -32698,51 +32891,51 @@ │ │ movs r0, #0 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ mov r8, r1 │ │ mov r1, r4 │ │ mov r2, r5 │ │ mov r6, r0 │ │ - bl 3dfb2 │ │ + bl 3e2ba │ │ ldr r2, [r6, #8] │ │ mov r1, r8 │ │ mov r0, r6 │ │ ldr r3, [r0, #4] │ │ cmp r1, #128 @ 0x80 │ │ add r2, r3 │ │ - bcs.n 3e294 │ │ - b.n 3e2e6 │ │ + bcs.n 3e59c │ │ + b.n 3e5ee │ │ mov r3, r2 │ │ mov r2, r1 │ │ - ldr r1, [pc, #4] @ (3e31c ) │ │ + ldr r1, [pc, #4] @ (3e624 ) │ │ add r1, pc │ │ - b.w 3ef94 │ │ - stmia r2!, {r1, r2, r3, r7} │ │ - movs r1, r1 │ │ - push {r4, r5, r6, r7, lr} │ │ - add r7, sp, #12 │ │ + b.w 3f29c │ │ + itet ls │ │ + movls r1, r1 │ │ + pushhi {r4, r5, r6, r7, lr} │ │ + addls r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #76 @ 0x4c │ │ cmp.w r2, #4294967295 @ 0xffffffff │ │ - bgt.n 3e334 │ │ - bl 3e03c │ │ + bgt.n 3e63c │ │ + bl 3e344 │ │ mov r4, r2 │ │ cmp r2, #0 │ │ str r0, [sp, #8] │ │ - beq.w 3e5c0 │ │ + beq.w 3e8c8 │ │ mov r0, r4 │ │ mov fp, r1 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 3ebc2 │ │ + beq.w 3eeca │ │ mov lr, r0 │ │ cmp r4, #16 │ │ str r4, [sp, #12] │ │ str.w fp, [sp, #60] @ 0x3c │ │ - bcc.w 3e5c8 │ │ + bcc.w 3e8d0 │ │ movw r0, #65520 @ 0xfff0 │ │ movs r1, #0 │ │ movt r0, #32767 @ 0x7fff │ │ mov r6, r4 │ │ ands r0, r4 │ │ str.w lr, [sp, #20] │ │ str r0, [sp, #16] │ │ @@ -32817,15 +33010,15 @@ │ │ addgt r3, #1 │ │ ldrsb.w r0, [sl, #15] │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ it gt │ │ addgt r3, #1 │ │ uxtb r3, r3 │ │ cmp r3, #16 │ │ - bne.w 3e5d4 │ │ + bne.w 3e8dc │ │ str r2, [sp, #24] │ │ uxtb r2, r0 │ │ ldr r0, [sp, #32] │ │ uxtb.w r3, r8 │ │ uxtb.w r8, r4 │ │ uxtb.w sl, r5 │ │ ldr r5, [sp, #48] @ 0x30 │ │ @@ -32943,48 +33136,48 @@ │ │ cmp r0, #26 │ │ it cc │ │ orrcc.w r1, r1, #32 │ │ strb r1, [r5, #1] │ │ cmp r6, #15 │ │ ldr r1, [sp, #56] @ 0x38 │ │ add.w r1, r1, #16 │ │ - bhi.w 3e36e │ │ + bhi.w 3e676 │ │ cmp r6, #0 │ │ - beq.w 3eba0 │ │ + beq.w 3eea8 │ │ ldr.w lr, [sp, #20] │ │ add.w sl, fp, r1 │ │ ldrd r4, r8, [sp, #12] │ │ add.w r2, lr, r1 │ │ - b.n 3e5e2 │ │ + b.n 3e8ea │ │ movs r0, #0 │ │ mov.w lr, #1 │ │ - b.n 3e60c │ │ + b.n 3e914 │ │ mov.w r8, #0 │ │ mov r2, lr │ │ mov r6, r4 │ │ mov sl, fp │ │ - b.n 3e5e2 │ │ + b.n 3e8ea │ │ ldr.w lr, [sp, #20] │ │ ldr.w r8, [sp, #56] @ 0x38 │ │ ldr r4, [sp, #12] │ │ add.w r2, lr, r8 │ │ add.w r0, r6, r8 │ │ ldrsb.w r1, [sl] │ │ cmp r1, #0 │ │ - bmi.n 3e622 │ │ + bmi.n 3e92a │ │ uxtb r1, r1 │ │ sub.w r3, r1, #65 @ 0x41 │ │ cmp r3, #26 │ │ it cc │ │ orrcc.w r1, r1, #32 │ │ strb.w r1, [r2], #1 │ │ add.w sl, sl, #1 │ │ add.w r8, r8, #1 │ │ subs r6, #1 │ │ - bne.n 3e5e6 │ │ + bne.n 3e8ee │ │ str r0, [sp, #72] @ 0x48 │ │ strd r4, lr, [sp, #64] @ 0x40 │ │ add r2, sp, #64 @ 0x40 │ │ ldr r3, [sp, #8] │ │ ldmia r2, {r0, r1, r2} │ │ stmia r3!, {r0, r1, r2} │ │ add sp, #76 @ 0x4c │ │ @@ -32995,33 +33188,33 @@ │ │ str.w r8, [sp, #72] @ 0x48 │ │ add r0, r4 │ │ str r0, [sp, #52] @ 0x34 │ │ add.w r0, sl, r6 │ │ strd r4, lr, [sp, #64] @ 0x40 │ │ str r0, [sp, #56] @ 0x38 │ │ str.w r8, [sp, #16] │ │ - b.n 3e660 │ │ + b.n 3e968 │ │ mvn.w r5, #15 │ │ orr.w r6, r5, r6, lsr #18 │ │ bfi r3, ip, #6, #26 │ │ strb r2, [r0, #3] │ │ strb r1, [r0, #2] │ │ strb r3, [r0, #1] │ │ strb r6, [r0, #0] │ │ add r8, r4 │ │ ldr r0, [sp, #56] @ 0x38 │ │ str.w r8, [sp, #72] @ 0x48 │ │ cmp sl, r0 │ │ - beq.n 3e612 │ │ + beq.n 3e91a │ │ mov r1, sl │ │ ldrsb.w r0, [r1], #1 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ uxtb r6, r0 │ │ sub.w r0, fp, sl │ │ - ble.n 3e6c6 │ │ + ble.n 3e9ce │ │ add.w fp, r0, r1 │ │ mov sl, r1 │ │ sub.w r0, r6, #65 @ 0x41 │ │ mov.w r9, #0 │ │ cmp r0, #26 │ │ it cc │ │ orrcc.w r6, r6, #32 │ │ @@ -33029,88 +33222,88 @@ │ │ it cc │ │ movcc.w r9, #1 │ │ movs r4, #1 │ │ ldr r0, [sp, #64] @ 0x40 │ │ sub.w r0, r0, r8 │ │ cmp r4, r0 │ │ mov r0, r8 │ │ - bhi.w 3eadc │ │ + bhi.w 3ede4 │ │ add r0, lr │ │ cmp.w r9, #0 │ │ - bne.n 3e652 │ │ + bne.n 3e95a │ │ movw ip, #65534 @ 0xfffe │ │ mov r2, r6 │ │ movt ip, #1023 @ 0x3ff │ │ lsrs r1, r6, #6 │ │ bfi r2, ip, #6, #26 │ │ cmp.w r6, #2048 @ 0x800 │ │ - bcs.n 3e712 │ │ + bcs.n 3ea1a │ │ orr.w r1, r1, #192 @ 0xc0 │ │ strb r2, [r0, #1] │ │ - b.n 3e728 │ │ + b.n 3ea30 │ │ ldrb.w r2, [sl, #1] │ │ and.w r1, r6, #31 │ │ cmp r6, #223 @ 0xdf │ │ and.w r2, r2, #63 @ 0x3f │ │ - bls.n 3e72c │ │ + bls.n 3ea34 │ │ ldrb.w r3, [sl, #2] │ │ cmp r6, #240 @ 0xf0 │ │ and.w r3, r3, #63 @ 0x3f │ │ orr.w r2, r3, r2, lsl #6 │ │ - bcc.n 3e764 │ │ + bcc.n 3ea6c │ │ ldrb.w r3, [sl, #3] │ │ and.w r1, r1, #7 │ │ add.w sl, sl, #4 │ │ and.w r3, r3, #63 @ 0x3f │ │ orr.w r2, r3, r2, lsl #6 │ │ orr.w r6, r2, r1, lsl #18 │ │ add.w r5, r0, sl │ │ movw r0, #931 @ 0x3a3 │ │ cmp r6, r0 │ │ - beq.n 3e740 │ │ + beq.n 3ea48 │ │ cmp r6, #128 @ 0x80 │ │ - bcs.n 3e77a │ │ + bcs.n 3ea82 │ │ mov fp, r5 │ │ - b.n 3e678 │ │ + b.n 3e980 │ │ bfi r1, ip, #6, #26 │ │ lsrs r3, r6, #12 │ │ movs r5, #0 │ │ cmp.w r5, r6, lsr #16 │ │ - bne.n 3e640 │ │ + bne.n 3e948 │ │ strb r1, [r0, #1] │ │ orr.w r1, r3, #224 @ 0xe0 │ │ strb r2, [r0, #2] │ │ strb r1, [r0, #0] │ │ - b.n 3e654 │ │ + b.n 3e95c │ │ orr.w r6, r2, r1, lsl #6 │ │ add.w sl, sl, #2 │ │ add.w r5, r0, sl │ │ movw r0, #931 @ 0x3a3 │ │ cmp r6, r0 │ │ - bne.n 3e70a │ │ + bne.n 3ea12 │ │ ldr r0, [sp, #16] │ │ str r5, [sp, #48] @ 0x30 │ │ adds.w r9, fp, r0 │ │ - beq.w 3e870 │ │ + beq.w 3eb78 │ │ ldr r0, [sp, #12] │ │ cmp r9, r0 │ │ - bcs.w 3e86a │ │ + bcs.w 3eb72 │ │ ldr r0, [sp, #60] @ 0x3c │ │ ldrsb.w r0, [r0, r9] │ │ cmn.w r0, #64 @ 0x40 │ │ - bge.w 3e870 │ │ - b.n 3ebaa │ │ + bge.w 3eb78 │ │ + b.n 3eeb2 │ │ orr.w r6, r2, r1, lsl #12 │ │ add.w sl, sl, #3 │ │ add.w r5, r0, sl │ │ movw r0, #931 @ 0x3a3 │ │ cmp r6, r0 │ │ - beq.n 3e740 │ │ - b.n 3e70a │ │ - ldr r1, [pc, #860] @ (3ead8 ) │ │ + beq.n 3ea48 │ │ + b.n 3ea12 │ │ + ldr r1, [pc, #860] @ (3ede0 ) │ │ movw r0, #7918 @ 0x1eee │ │ movw r2, #731 @ 0x2db │ │ cmp r6, r0 │ │ it cc │ │ movcc r2, #0 │ │ add r1, pc │ │ addw r0, r2, #365 @ 0x16d │ │ @@ -33161,15 +33354,15 @@ │ │ adds r0, r2, #1 │ │ ldr.w r3, [r1, r0, lsl #3] │ │ cmp r3, r6 │ │ it ls │ │ movls r2, r0 │ │ ldr.w r0, [r1, r2, lsl #3] │ │ cmp r0, r6 │ │ - bne.w 3e94e │ │ + bne.w 3ec56 │ │ add.w r0, r1, r2, lsl #3 │ │ movw r1, #63488 @ 0xf800 │ │ movt r1, #16 │ │ movw r9, #775 @ 0x307 │ │ ldr r6, [r0, #4] │ │ eor.w r0, r6, #55296 @ 0xd800 │ │ sub.w r0, r0, #2048 @ 0x800 │ │ @@ -33177,732 +33370,732 @@ │ │ movw r1, #63487 @ 0xf7ff │ │ it cs │ │ movcs r6, #105 @ 0x69 │ │ it cc │ │ movcc.w r9, #0 │ │ movt r1, #16 │ │ cmp r0, r1 │ │ - bhi.w 3e9ba │ │ + bhi.w 3ecc2 │ │ mov fp, r5 │ │ mov.w r9, #0 │ │ cmp r6, #128 @ 0x80 │ │ it cc │ │ movcc.w r9, #1 │ │ - bcc.w 3e690 │ │ + bcc.w 3e998 │ │ cmp.w r6, #2048 @ 0x800 │ │ - bcs.n 3e964 │ │ + bcs.n 3ec6c │ │ movs r4, #2 │ │ - b.n 3e692 │ │ + b.n 3e99a │ │ cmp r9, r0 │ │ - bne.w 3ebaa │ │ + bne.w 3eeb2 │ │ ldr r0, [sp, #60] @ 0x3c │ │ movs r1, #0 │ │ add.w r6, r0, r9 │ │ - b.n 3e884 │ │ + b.n 3eb8c │ │ movs r1, #1 │ │ mov r0, r4 │ │ cmp.w r0, #1114112 @ 0x110000 │ │ - bne.n 3e93e │ │ + bne.n 3ec46 │ │ ldr r0, [sp, #60] @ 0x3c │ │ cmp r0, r6 │ │ - beq.w 3e992 │ │ + beq.w 3ec9a │ │ mov r0, r6 │ │ ldrsb.w r4, [r0, #-1]! │ │ cmp.w r4, #4294967295 @ 0xffffffff │ │ - bgt.n 3e8f6 │ │ + bgt.n 3ebfe │ │ mov r0, r6 │ │ ldrb.w r3, [r0, #-2]! │ │ sxtb r2, r3 │ │ cmn.w r2, #64 @ 0x40 │ │ - bge.n 3e8c8 │ │ + bge.n 3ebd0 │ │ mov r0, r6 │ │ ldrb.w r5, [r0, #-3]! │ │ sxtb r3, r5 │ │ cmn.w r3, #65 @ 0x41 │ │ - bgt.n 3e8dc │ │ + bgt.n 3ebe4 │ │ ldrb.w r0, [r6, #-4]! │ │ and.w r3, r3, #63 @ 0x3f │ │ and.w r0, r0, #7 │ │ orr.w r3, r3, r0, lsl #6 │ │ mov r0, r6 │ │ - b.n 3e8e0 │ │ + b.n 3ebe8 │ │ and.w r2, r3, #31 │ │ and.w r3, r4, #63 @ 0x3f │ │ orr.w r4, r3, r2, lsl #6 │ │ cmp.w r4, #1114112 @ 0x110000 │ │ - bne.n 3e8f6 │ │ - b.n 3e992 │ │ + bne.n 3ebfe │ │ + b.n 3ec9a │ │ and.w r3, r5, #15 │ │ and.w r2, r2, #63 @ 0x3f │ │ orr.w r2, r2, r3, lsl #6 │ │ and.w r3, r4, #63 @ 0x3f │ │ orr.w r4, r3, r2, lsl #6 │ │ cmp.w r4, #1114112 @ 0x110000 │ │ - beq.n 3e992 │ │ + beq.n 3ec9a │ │ mov r6, r0 │ │ lsls r0, r1, #31 │ │ - bne.n 3e87a │ │ + bne.n 3eb82 │ │ cmp r4, #128 @ 0x80 │ │ - bcs.n 3e928 │ │ + bcs.n 3ec30 │ │ sub.w r2, r4, #39 @ 0x27 │ │ mov.w r0, #1114112 @ 0x110000 │ │ movs r1, #0 │ │ cmp r2, #19 │ │ - bhi.n 3e91e │ │ + bhi.n 3ec26 │ │ movs r3, #1 │ │ lsl.w r2, r3, r2 │ │ movs r3, #129 @ 0x81 │ │ movt r3, #8 │ │ tst r2, r3 │ │ - bne.n 3e87e │ │ + bne.n 3eb86 │ │ cmp r4, #94 @ 0x5e │ │ it ne │ │ cmpne r4, #96 @ 0x60 │ │ - beq.n 3e87e │ │ - b.n 3e87a │ │ + beq.n 3eb86 │ │ + b.n 3eb82 │ │ cmp r4, #167 @ 0xa7 │ │ - bls.n 3e87a │ │ + bls.n 3eb82 │ │ mov r0, r4 │ │ - bl 414f0 │ │ + bl 417f8 │ │ cmp r0, #0 │ │ - beq.n 3e87a │ │ + beq.n 3eb82 │ │ mov.w r0, #1114112 @ 0x110000 │ │ movs r1, #0 │ │ - b.n 3e87e │ │ + b.n 3eb86 │ │ cmp r0, #128 @ 0x80 │ │ - bcs.n 3e970 │ │ + bcs.n 3ec78 │ │ and.w r0, r0, #95 @ 0x5f │ │ subs r0, #65 @ 0x41 │ │ cmp r0, #26 │ │ - bcc.n 3e97a │ │ - b.n 3e992 │ │ + bcc.n 3ec82 │ │ + b.n 3ec9a │ │ mov fp, r5 │ │ mov.w r9, #0 │ │ cmp r6, #128 @ 0x80 │ │ it cc │ │ movcc.w r9, #1 │ │ cmp.w r6, #2048 @ 0x800 │ │ - bcc.w 3e866 │ │ + bcc.w 3eb6e │ │ movs r4, #4 │ │ cmp.w r6, #65536 @ 0x10000 │ │ it cc │ │ movcc r4, #3 │ │ - b.n 3e692 │ │ + b.n 3e99a │ │ cmp r0, #169 @ 0xa9 │ │ - bls.n 3e992 │ │ - bl 415d0 │ │ - cbz r0, 3e992 │ │ + bls.n 3ec9a │ │ + bl 418d8 │ │ + cbz r0, 3ec9a │ │ adds.w r2, r9, #2 │ │ - beq.n 3e9d0 │ │ + beq.n 3ecd8 │ │ ldr r0, [sp, #12] │ │ cmp r2, r0 │ │ - bcs.n 3e9cc │ │ + bcs.n 3ecd4 │ │ ldr r0, [sp, #60] @ 0x3c │ │ ldrsb r0, [r0, r2] │ │ cmn.w r0, #64 @ 0x40 │ │ - bge.n 3e9d0 │ │ - b.n 3ebca │ │ + bge.n 3ecd8 │ │ + b.n 3eed2 │ │ movs r4, #131 @ 0x83 │ │ ldr.w fp, [sp, #48] @ 0x30 │ │ ldr r0, [sp, #64] @ 0x40 │ │ sub.w r0, r0, r8 │ │ cmp r0, #1 │ │ mov r0, r8 │ │ - bls.w 3eaf6 │ │ + bls.w 3edfe │ │ ldr.w lr, [sp, #68] @ 0x44 │ │ movs r1, #207 @ 0xcf │ │ add.w r8, r8, #2 │ │ strb.w r1, [lr, r0] │ │ add r0, lr │ │ strb r4, [r0, #1] │ │ - b.n 3e656 │ │ + b.n 3e95e │ │ cmp r6, #128 @ 0x80 │ │ - bcs.n 3e9c2 │ │ + bcs.n 3ecca │ │ movs r4, #1 │ │ - b.n 3eac0 │ │ + b.n 3edc8 │ │ cmp.w r6, #2048 @ 0x800 │ │ - bcs.n 3eab6 │ │ + bcs.n 3edbe │ │ movs r4, #2 │ │ - b.n 3eac0 │ │ - bne.w 3ebca │ │ + b.n 3edc8 │ │ + bne.w 3eed2 │ │ ldr r0, [sp, #60] @ 0x3c │ │ movs r1, #0 │ │ ldr.w fp, [sp, #48] @ 0x30 │ │ adds r6, r0, r2 │ │ - b.n 3e9e6 │ │ + b.n 3ecee │ │ movs r1, #1 │ │ mov r0, r4 │ │ cmp.w r0, #1114112 @ 0x110000 │ │ - bne.n 3ea94 │ │ + bne.n 3ed9c │ │ ldr r2, [sp, #52] @ 0x34 │ │ cmp r6, r2 │ │ - beq.n 3eab2 │ │ + beq.n 3edba │ │ mov r0, r6 │ │ ldrsb.w r2, [r6], #1 │ │ cmp.w r2, #4294967295 @ 0xffffffff │ │ uxtb r4, r2 │ │ - ble.n 3ea2a │ │ + ble.n 3ed32 │ │ lsls r0, r1, #31 │ │ - bne.n 3e9dc │ │ + bne.n 3ece4 │ │ cmp r4, #128 @ 0x80 │ │ - bcs.n 3ea66 │ │ + bcs.n 3ed6e │ │ sub.w r2, r4, #39 @ 0x27 │ │ mov.w r0, #1114112 @ 0x110000 │ │ movs r1, #0 │ │ cmp r2, #19 │ │ - bhi.n 3ea20 │ │ + bhi.n 3ed28 │ │ movs r3, #1 │ │ lsl.w r2, r3, r2 │ │ movs r3, #129 @ 0x81 │ │ movt r3, #8 │ │ tst r2, r3 │ │ - bne.n 3e9e0 │ │ + bne.n 3ece8 │ │ cmp r4, #94 @ 0x5e │ │ it ne │ │ cmpne r4, #96 @ 0x60 │ │ - beq.n 3e9e0 │ │ - b.n 3e9dc │ │ + beq.n 3ece8 │ │ + b.n 3ece4 │ │ ldrb r3, [r0, #1] │ │ and.w r2, r4, #31 │ │ cmp r4, #224 @ 0xe0 │ │ and.w r3, r3, #63 @ 0x3f │ │ - bcc.n 3ea7c │ │ + bcc.n 3ed84 │ │ ldrb r6, [r0, #2] │ │ cmp r4, #240 @ 0xf0 │ │ and.w r6, r6, #63 @ 0x3f │ │ orr.w r3, r6, r3, lsl #6 │ │ - bcc.n 3ea88 │ │ + bcc.n 3ed90 │ │ ldrb r6, [r0, #3] │ │ and.w r2, r2, #7 │ │ and.w r6, r6, #63 @ 0x3f │ │ orr.w r3, r6, r3, lsl #6 │ │ orr.w r4, r3, r2, lsl #18 │ │ cmp.w r4, #1114112 @ 0x110000 │ │ - beq.n 3eab2 │ │ + beq.n 3edba │ │ adds r6, r0, #4 │ │ lsls r0, r1, #31 │ │ - bne.n 3e9dc │ │ - b.n 3e9fe │ │ + bne.n 3ece4 │ │ + b.n 3ed06 │ │ cmp r4, #167 @ 0xa7 │ │ - bls.n 3e9dc │ │ + bls.n 3ece4 │ │ mov r0, r4 │ │ - bl 414f0 │ │ + bl 417f8 │ │ cmp r0, #0 │ │ - beq.n 3e9dc │ │ + beq.n 3ece4 │ │ mov.w r0, #1114112 @ 0x110000 │ │ movs r1, #0 │ │ - b.n 3e9e0 │ │ + b.n 3ece8 │ │ orr.w r4, r3, r2, lsl #6 │ │ adds r6, r0, #2 │ │ lsls r0, r1, #31 │ │ - bne.n 3e9dc │ │ - b.n 3e9fe │ │ + bne.n 3ece4 │ │ + b.n 3ed06 │ │ orr.w r4, r3, r2, lsl #12 │ │ adds r6, r0, #3 │ │ lsls r0, r1, #31 │ │ - beq.n 3e9fe │ │ - b.n 3e9dc │ │ + beq.n 3ed06 │ │ + b.n 3ece4 │ │ cmp r0, #128 @ 0x80 │ │ - bcs.n 3eaa4 │ │ + bcs.n 3edac │ │ and.w r0, r0, #95 @ 0x5f │ │ subs r0, #65 @ 0x41 │ │ cmp r0, #26 │ │ - bcc.n 3eaae │ │ - b.n 3eab2 │ │ + bcc.n 3edb6 │ │ + b.n 3edba │ │ cmp r0, #169 @ 0xa9 │ │ - bls.n 3eab2 │ │ - bl 415d0 │ │ - cbz r0, 3eab2 │ │ + bls.n 3edba │ │ + bl 418d8 │ │ + cbz r0, 3edba │ │ movs r4, #131 @ 0x83 │ │ - b.n 3e998 │ │ + b.n 3eca0 │ │ movs r4, #130 @ 0x82 │ │ - b.n 3e998 │ │ + b.n 3eca0 │ │ movs r4, #4 │ │ cmp.w r6, #65536 @ 0x10000 │ │ it cc │ │ movcc r4, #3 │ │ ldr r0, [sp, #64] @ 0x40 │ │ sub.w r0, r0, r8 │ │ cmp r4, r0 │ │ mov r0, r8 │ │ - bhi.n 3eb04 │ │ + bhi.n 3ee0c │ │ add r0, lr │ │ cmp r6, #128 @ 0x80 │ │ - bcs.n 3eb18 │ │ + bcs.n 3ee20 │ │ strb r6, [r0, #0] │ │ - b.n 3eb50 │ │ + b.n 3ee58 │ │ nop │ │ - add r6, r5 │ │ + asrs r6, r4 │ │ vqshrun.s64 d26, q0, #3 │ │ mov r1, r8 │ │ mov r2, r4 │ │ - bl 3dfb2 │ │ + bl 3e2ba │ │ ldrd lr, r0, [sp, #68] @ 0x44 │ │ add r0, lr │ │ cmp.w r9, #0 │ │ - bne.w 3e652 │ │ - b.n 3e6a8 │ │ + bne.w 3e95a │ │ + b.n 3e9b0 │ │ add r0, sp, #64 @ 0x40 │ │ mov r1, r8 │ │ movs r2, #2 │ │ - bl 3dfb2 │ │ + bl 3e2ba │ │ ldr r0, [sp, #72] @ 0x48 │ │ - b.n 3e9a6 │ │ + b.n 3ecae │ │ add r0, sp, #64 @ 0x40 │ │ mov r1, r8 │ │ mov r2, r4 │ │ - bl 3dfb2 │ │ + bl 3e2ba │ │ ldrd lr, r0, [sp, #68] @ 0x44 │ │ add r0, lr │ │ cmp r6, #128 @ 0x80 │ │ - bcc.n 3ead2 │ │ + bcc.n 3edda │ │ movw lr, #65534 @ 0xfffe │ │ mov r2, r6 │ │ movt lr, #1023 @ 0x3ff │ │ lsrs r1, r6, #6 │ │ bfi r2, lr, #6, #26 │ │ cmp.w r6, #2048 @ 0x800 │ │ - bcs.n 3eb36 │ │ + bcs.n 3ee3e │ │ orr.w r1, r1, #192 @ 0xc0 │ │ strb r2, [r0, #1] │ │ - b.n 3eb4e │ │ + b.n 3ee56 │ │ bfi r1, lr, #6, #26 │ │ mov.w ip, r6, lsr #12 │ │ movs r3, #0 │ │ cmp.w r3, r6, lsr #16 │ │ - bne.n 3eb7c │ │ + bne.n 3ee84 │ │ strb r1, [r0, #1] │ │ orr.w r1, ip, #224 @ 0xe0 │ │ strb r2, [r0, #2] │ │ strb r1, [r0, #0] │ │ ldr r0, [sp, #64] @ 0x40 │ │ add r4, r8 │ │ str r4, [sp, #72] @ 0x48 │ │ subs r0, r0, r4 │ │ cmp r0, #1 │ │ - bls.n 3eb92 │ │ + bls.n 3ee9a │ │ mov r0, r4 │ │ ldr.w lr, [sp, #68] @ 0x44 │ │ mov.w r1, r9, lsr #6 │ │ adds r1, #192 @ 0xc0 │ │ add.w r8, r4, #2 │ │ mov fp, r5 │ │ strb.w r1, [lr, r0] │ │ add r0, lr │ │ orr.w r1, r9, #128 @ 0x80 │ │ strb r1, [r0, #1] │ │ - b.n 3e656 │ │ + b.n 3e95e │ │ mvn.w r3, #15 │ │ orr.w r6, r3, r6, lsr #18 │ │ bfi ip, lr, #6, #26 │ │ strb r2, [r0, #3] │ │ strb r1, [r0, #2] │ │ strb.w ip, [r0, #1] │ │ - b.n 3ead2 │ │ + b.n 3edda │ │ add r0, sp, #64 @ 0x40 │ │ mov r1, r4 │ │ movs r2, #2 │ │ - bl 3dfb2 │ │ + bl 3e2ba │ │ ldr r0, [sp, #72] @ 0x48 │ │ - b.n 3eb5e │ │ + b.n 3ee66 │ │ ldrd r4, r0, [sp, #12] │ │ ldr.w lr, [sp, #20] │ │ - b.n 3e60c │ │ + b.n 3e914 │ │ ldr.w sl, [sp, #60] @ 0x3c │ │ movs r2, #0 │ │ - ldr r0, [pc, #60] @ (3ebf0 ) │ │ + ldr r0, [pc, #60] @ (3eef8 ) │ │ add r0, pc │ │ ldr r1, [sp, #12] │ │ mov r3, r9 │ │ str r0, [sp, #0] │ │ mov r0, sl │ │ - bl 3fd1c │ │ + bl 40024 │ │ udf #254 @ 0xfe │ │ movs r0, #1 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ ldr.w sl, [sp, #60] @ 0x3c │ │ - ldr r0, [pc, #36] @ (3ebf4 ) │ │ + ldr r0, [pc, #36] @ (3eefc ) │ │ ldr.w r9, [sp, #12] │ │ add r0, pc │ │ - b.n 3ebb4 │ │ - b.n 3ebda │ │ + b.n 3eebc │ │ + b.n 3eee2 │ │ mov r4, r0 │ │ ldr r0, [sp, #64] @ 0x40 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #68] @ 0x44 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ nop │ │ - rev r2, r3 │ │ + @ instruction: 0xb722 │ │ movs r1, r1 │ │ - rev r0, r1 │ │ + @ instruction: 0xb710 │ │ movs r1, r1 │ │ push {r1, r2, r3, r4, r5, r6, r7, lr} │ │ add r7, sp, #24 │ │ strd r0, r1, [sp] │ │ - ldr r0, [pc, #24] @ (3ec1c ) │ │ + ldr r0, [pc, #24] @ (3ef24 ) │ │ add r0, pc │ │ str r0, [sp, #20] │ │ add r1, sp, #4 │ │ strd r0, r1, [sp, #12] │ │ mov r0, sp │ │ str r0, [sp, #8] │ │ - ldr r0, [pc, #12] @ (3ec20 ) │ │ + ldr r0, [pc, #12] @ (3ef28 ) │ │ add r1, sp, #8 │ │ add r0, pc │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ nop │ │ adds r7, r5, #1 │ │ movs r0, r0 │ │ - cbnz r6, 3ec4c │ │ + @ instruction: 0xb6d5 │ │ vsli.64 d27, d16, #60 @ 0x3c │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ movs r5, #8 │ │ lsls r0, r1, #1 │ │ cmp r0, #8 │ │ add r0, sp, #4 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 3dff6 │ │ + bl 3e2fe │ │ ldr r0, [sp, #4] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #8] │ │ strdne r5, r0, [r4] │ │ addne sp, #16 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #8] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ mov r4, r2 │ │ mov r5, r0 │ │ - cbz r2, 3ec78 │ │ + cbz r2, 3ef80 │ │ mov r0, r4 │ │ mov r8, r1 │ │ - blx d87f0 │ │ - cbz r0, 3ec8e │ │ + blx d8810 │ │ + cbz r0, 3ef96 │ │ mov r6, r0 │ │ mov r1, r8 │ │ - b.n 3ec7a │ │ + b.n 3ef82 │ │ movs r6, #1 │ │ mov r0, r6 │ │ mov r2, r4 │ │ - bl d53c6 │ │ + bl d52ea │ │ strd r4, r6, [r5] │ │ str r4, [r5, #8] │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #1 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #12 │ │ add.w sl, r2, #1 │ │ cmp.w sl, #4294967295 @ 0xffffffff │ │ - bgt.n 3ecae │ │ - bl 3e03c │ │ + bgt.n 3efb6 │ │ + bl 3e344 │ │ mov r9, r0 │ │ mov r0, sl │ │ mov fp, r2 │ │ mov r4, r1 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 3edd2 │ │ + beq.w 3f0da │ │ mov r1, r4 │ │ mov r2, fp │ │ mov r8, r0 │ │ - bl d53c6 │ │ + bl d52ea │ │ cmp.w fp, #7 │ │ - bhi.n 3ed26 │ │ + bhi.n 3f02e │ │ cmp.w fp, #0 │ │ - beq.n 3ed86 │ │ + beq.n 3f08e │ │ ldrb r0, [r4, #0] │ │ cmp r0, #0 │ │ - beq.n 3eda8 │ │ + beq.n 3f0b0 │ │ cmp.w fp, #1 │ │ - beq.n 3ed86 │ │ + beq.n 3f08e │ │ ldrb r0, [r4, #1] │ │ cmp r0, #0 │ │ - beq.n 3edb0 │ │ + beq.n 3f0b8 │ │ cmp.w fp, #2 │ │ - beq.n 3ed86 │ │ + beq.n 3f08e │ │ ldrb r0, [r4, #2] │ │ cmp r0, #0 │ │ - beq.n 3edb4 │ │ + beq.n 3f0bc │ │ cmp.w fp, #3 │ │ - beq.n 3ed86 │ │ + beq.n 3f08e │ │ ldrb r0, [r4, #3] │ │ cmp r0, #0 │ │ - beq.n 3edb8 │ │ + beq.n 3f0c0 │ │ cmp.w fp, #4 │ │ - beq.n 3ed86 │ │ + beq.n 3f08e │ │ ldrb r0, [r4, #4] │ │ cmp r0, #0 │ │ - beq.n 3edbc │ │ + beq.n 3f0c4 │ │ cmp.w fp, #5 │ │ - beq.n 3ed86 │ │ + beq.n 3f08e │ │ ldrb r0, [r4, #5] │ │ cmp r0, #0 │ │ - beq.n 3edc0 │ │ + beq.n 3f0c8 │ │ cmp.w fp, #6 │ │ - beq.n 3ed86 │ │ + beq.n 3f08e │ │ ldrb r0, [r4, #6] │ │ - cbnz r0, 3ed86 │ │ + cbnz r0, 3f08e │ │ movs r1, #6 │ │ - b.n 3edc2 │ │ + b.n 3f0ca │ │ adds r0, r4, #3 │ │ bic.w r0, r0, #3 │ │ subs r0, r0, r4 │ │ - bne.n 3ed5e │ │ + bne.n 3f066 │ │ sub.w r1, fp, #8 │ │ movs r0, #0 │ │ movw r2, #256 @ 0x100 │ │ movt r2, #257 @ 0x101 │ │ adds r5, r4, r0 │ │ ldr r3, [r4, r0] │ │ ldr r5, [r5, #4] │ │ subs r6, r2, r3 │ │ orrs r3, r6 │ │ subs r6, r2, r5 │ │ orrs r6, r5 │ │ ands r3, r6 │ │ mvns r3, r3 │ │ tst.w r3, #2155905152 @ 0x80808080 │ │ - bne.n 3ed72 │ │ + bne.n 3f07a │ │ adds r0, #8 │ │ cmp r0, r1 │ │ - bls.n 3ed3e │ │ - b.n 3ed72 │ │ + bls.n 3f046 │ │ + b.n 3f07a │ │ movs r1, #0 │ │ ldrb r2, [r4, r1] │ │ - cbz r2, 3edc2 │ │ + cbz r2, 3f0ca │ │ adds r1, #1 │ │ cmp r0, r1 │ │ - bne.n 3ed60 │ │ + bne.n 3f068 │ │ sub.w r1, fp, #8 │ │ cmp r0, r1 │ │ - bls.n 3ed36 │ │ + bls.n 3f03e │ │ subs.w r1, fp, r0 │ │ - beq.n 3ed86 │ │ + beq.n 3f08e │ │ adds r3, r4, r0 │ │ movs r2, #0 │ │ ldrb r6, [r3, r2] │ │ - cbz r6, 3edac │ │ + cbz r6, 3f0b4 │ │ adds r2, #1 │ │ cmp r1, r2 │ │ - bne.n 3ed7c │ │ + bne.n 3f084 │ │ mov r0, sp │ │ str.w fp, [sp, #8] │ │ strd sl, r8, [sp] │ │ - bl 3e058 │ │ + bl 3e360 │ │ mov.w r2, #2147483648 @ 0x80000000 │ │ str.w r1, [r9, #8] │ │ strd r2, r0, [r9] │ │ add sp, #12 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r1, #0 │ │ - b.n 3edc2 │ │ + b.n 3f0ca │ │ adds r1, r2, r0 │ │ - b.n 3edc2 │ │ + b.n 3f0ca │ │ movs r1, #1 │ │ - b.n 3edc2 │ │ + b.n 3f0ca │ │ movs r1, #2 │ │ - b.n 3edc2 │ │ + b.n 3f0ca │ │ movs r1, #3 │ │ - b.n 3edc2 │ │ + b.n 3f0ca │ │ movs r1, #4 │ │ - b.n 3edc2 │ │ + b.n 3f0ca │ │ movs r1, #5 │ │ strd sl, r8, [r9] │ │ strd fp, r1, [r9, #8] │ │ add sp, #12 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #1 │ │ mov r1, sl │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #12 │ │ add.w sl, r2, #1 │ │ cmp.w sl, #4294967295 @ 0xffffffff │ │ - bgt.n 3edf2 │ │ - bl 3e03c │ │ + bgt.n 3f0fa │ │ + bl 3e344 │ │ mov r9, r0 │ │ mov r0, sl │ │ mov fp, r2 │ │ mov r4, r1 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 3ef16 │ │ + beq.w 3f21e │ │ mov r1, r4 │ │ mov r2, fp │ │ mov r8, r0 │ │ - bl d53c6 │ │ + bl d52ea │ │ cmp.w fp, #7 │ │ - bhi.n 3ee6a │ │ + bhi.n 3f172 │ │ cmp.w fp, #0 │ │ - beq.n 3eeca │ │ + beq.n 3f1d2 │ │ ldrb r0, [r4, #0] │ │ cmp r0, #0 │ │ - beq.n 3eeec │ │ + beq.n 3f1f4 │ │ cmp.w fp, #1 │ │ - beq.n 3eeca │ │ + beq.n 3f1d2 │ │ ldrb r0, [r4, #1] │ │ cmp r0, #0 │ │ - beq.n 3eef4 │ │ + beq.n 3f1fc │ │ cmp.w fp, #2 │ │ - beq.n 3eeca │ │ + beq.n 3f1d2 │ │ ldrb r0, [r4, #2] │ │ cmp r0, #0 │ │ - beq.n 3eef8 │ │ + beq.n 3f200 │ │ cmp.w fp, #3 │ │ - beq.n 3eeca │ │ + beq.n 3f1d2 │ │ ldrb r0, [r4, #3] │ │ cmp r0, #0 │ │ - beq.n 3eefc │ │ + beq.n 3f204 │ │ cmp.w fp, #4 │ │ - beq.n 3eeca │ │ + beq.n 3f1d2 │ │ ldrb r0, [r4, #4] │ │ cmp r0, #0 │ │ - beq.n 3ef00 │ │ + beq.n 3f208 │ │ cmp.w fp, #5 │ │ - beq.n 3eeca │ │ + beq.n 3f1d2 │ │ ldrb r0, [r4, #5] │ │ cmp r0, #0 │ │ - beq.n 3ef04 │ │ + beq.n 3f20c │ │ cmp.w fp, #6 │ │ - beq.n 3eeca │ │ + beq.n 3f1d2 │ │ ldrb r0, [r4, #6] │ │ - cbnz r0, 3eeca │ │ + cbnz r0, 3f1d2 │ │ movs r1, #6 │ │ - b.n 3ef06 │ │ + b.n 3f20e │ │ adds r0, r4, #3 │ │ bic.w r0, r0, #3 │ │ subs r0, r0, r4 │ │ - bne.n 3eea2 │ │ + bne.n 3f1aa │ │ sub.w r1, fp, #8 │ │ movs r0, #0 │ │ movw r2, #256 @ 0x100 │ │ movt r2, #257 @ 0x101 │ │ adds r5, r4, r0 │ │ ldr r3, [r4, r0] │ │ ldr r5, [r5, #4] │ │ subs r6, r2, r3 │ │ orrs r3, r6 │ │ subs r6, r2, r5 │ │ orrs r6, r5 │ │ ands r3, r6 │ │ mvns r3, r3 │ │ tst.w r3, #2155905152 @ 0x80808080 │ │ - bne.n 3eeb6 │ │ + bne.n 3f1be │ │ adds r0, #8 │ │ cmp r0, r1 │ │ - bls.n 3ee82 │ │ - b.n 3eeb6 │ │ + bls.n 3f18a │ │ + b.n 3f1be │ │ movs r1, #0 │ │ ldrb r2, [r4, r1] │ │ - cbz r2, 3ef06 │ │ + cbz r2, 3f20e │ │ adds r1, #1 │ │ cmp r0, r1 │ │ - bne.n 3eea4 │ │ + bne.n 3f1ac │ │ sub.w r1, fp, #8 │ │ cmp r0, r1 │ │ - bls.n 3ee7a │ │ + bls.n 3f182 │ │ subs.w r1, fp, r0 │ │ - beq.n 3eeca │ │ + beq.n 3f1d2 │ │ adds r3, r4, r0 │ │ movs r2, #0 │ │ ldrb r6, [r3, r2] │ │ - cbz r6, 3eef0 │ │ + cbz r6, 3f1f8 │ │ adds r2, #1 │ │ cmp r1, r2 │ │ - bne.n 3eec0 │ │ + bne.n 3f1c8 │ │ mov r0, sp │ │ str.w fp, [sp, #8] │ │ strd sl, r8, [sp] │ │ - bl 3e058 │ │ + bl 3e360 │ │ mov.w r2, #2147483648 @ 0x80000000 │ │ str.w r1, [r9, #8] │ │ strd r2, r0, [r9] │ │ add sp, #12 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r1, #0 │ │ - b.n 3ef06 │ │ + b.n 3f20e │ │ adds r1, r2, r0 │ │ - b.n 3ef06 │ │ + b.n 3f20e │ │ movs r1, #1 │ │ - b.n 3ef06 │ │ + b.n 3f20e │ │ movs r1, #2 │ │ - b.n 3ef06 │ │ + b.n 3f20e │ │ movs r1, #3 │ │ - b.n 3ef06 │ │ + b.n 3f20e │ │ movs r1, #4 │ │ - b.n 3ef06 │ │ + b.n 3f20e │ │ movs r1, #5 │ │ strd sl, r8, [r9] │ │ strd fp, r1, [r9, #8] │ │ add sp, #12 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #1 │ │ mov r1, sl │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #16 │ │ ldrd r4, r6, [r1] │ │ mov r5, r0 │ │ ldr.w r8, [r6, #16] │ │ movs r1, #39 @ 0x27 │ │ mov r0, r4 │ │ blx r8 │ │ - cbz r0, 3ef44 │ │ + cbz r0, 3f24c │ │ movs r0, #1 │ │ add sp, #16 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r1, [r5, #0] │ │ mov r5, sp │ │ mov r0, r5 │ │ movw r2, #257 @ 0x101 │ │ - bl 3f454 │ │ + bl 3f75c │ │ ldrb.w r0, [sp, #13] │ │ cmp r0, #129 @ 0x81 │ │ - bcc.n 3ef6c │ │ + bcc.n 3f274 │ │ ldr r1, [sp, #0] │ │ mov r0, r4 │ │ blx r8 │ │ - cbz r0, 3ef86 │ │ + cbz r0, 3f28e │ │ movs r0, #1 │ │ add sp, #16 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ ldrb.w r2, [sp, #12] │ │ ldr r3, [r6, #12] │ │ adds r1, r5, r2 │ │ subs r2, r0, r2 │ │ mov r0, r4 │ │ blx r3 │ │ - cbz r0, 3ef86 │ │ + cbz r0, 3f28e │ │ movs r0, #1 │ │ add sp, #16 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, r4 │ │ movs r1, #39 @ 0x27 │ │ blx r8 │ │ @@ -33913,62 +34106,62 @@ │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #20 │ │ mov r6, r0 │ │ mov fp, r3 │ │ mov sl, r1 │ │ lsls r0, r3, #31 │ │ - bne.n 3f072 │ │ + bne.n 3f37a │ │ ldrb r5, [r2, #0] │ │ movs r0, #0 │ │ cmp r5, #0 │ │ - beq.n 3f08e │ │ + beq.n 3f396 │ │ ldr.w r9, [sl, #12] │ │ mov.w r8, #0 │ │ - b.n 3efc0 │ │ + b.n 3f2c8 │ │ ldrb r5, [r2, #0] │ │ cmp r5, #0 │ │ - beq.n 3f096 │ │ + beq.n 3f39e │ │ adds r4, r2, #1 │ │ sxtb r0, r5 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - ble.n 3efda │ │ + ble.n 3f2e2 │ │ mov r0, r6 │ │ mov r1, r4 │ │ mov r2, r5 │ │ blx r9 │ │ cmp r0, #0 │ │ - bne.n 3f08c │ │ + bne.n 3f394 │ │ adds r2, r4, r5 │ │ - b.n 3efba │ │ + b.n 3f2c2 │ │ cmp r5, #128 @ 0x80 │ │ - beq.n 3eff2 │ │ + beq.n 3f2fa │ │ cmp r5, #192 @ 0xc0 │ │ - bne.n 3f008 │ │ + bne.n 3f310 │ │ ldr.w r0, [fp, r8, lsl #3] │ │ movs r1, #0 │ │ str r1, [sp, #16] │ │ movs r1, #32 │ │ movt r1, #24576 @ 0x6000 │ │ - b.n 3f056 │ │ + b.n 3f35e │ │ ldrh.w r4, [r2, #1] │ │ adds r5, r2, #3 │ │ mov r0, r6 │ │ mov r1, r5 │ │ mov r2, r4 │ │ blx r9 │ │ cmp r0, #0 │ │ - bne.n 3f08c │ │ + bne.n 3f394 │ │ adds r2, r5, r4 │ │ - b.n 3efba │ │ + b.n 3f2c2 │ │ lsls r0, r5, #31 │ │ - bne.n 3f014 │ │ + bne.n 3f31c │ │ movs r1, #32 │ │ movt r1, #24576 @ 0x6000 │ │ - b.n 3f01a │ │ + b.n 3f322 │ │ ldr.w r1, [r2, #1] │ │ adds r4, r2, #5 │ │ lsls r0, r5, #30 │ │ ite mi │ │ ldrhmi.w r2, [r4], #2 │ │ movpl r2, #0 │ │ lsls r0, r5, #29 │ │ @@ -33992,18 +34185,18 @@ │ │ str r1, [sp, #12] │ │ add.w r1, fp, r8, lsl #3 │ │ str.w sl, [sp, #8] │ │ ldr r2, [r1, #4] │ │ add r1, sp, #4 │ │ str r6, [sp, #4] │ │ blx r2 │ │ - cbnz r0, 3f08c │ │ + cbnz r0, 3f394 │ │ add.w r8, r8, #1 │ │ mov r2, r4 │ │ - b.n 3efba │ │ + b.n 3f2c2 │ │ mov.w r3, fp, lsr #1 │ │ mov r1, r2 │ │ ldr.w ip, [sl, #12] │ │ mov r0, r6 │ │ mov r2, r3 │ │ add sp, #20 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ @@ -34018,77 +34211,77 @@ │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #28 │ │ ldr.w sl, [r7, #12] │ │ - cbz r1, 3f0c6 │ │ + cbz r1, 3f3ce │ │ ldr r6, [r0, #8] │ │ mov.w fp, #43 @ 0x2b │ │ ands.w r1, r6, #2097152 @ 0x200000 │ │ it eq │ │ moveq.w fp, #1114112 @ 0x110000 │ │ add.w r4, sl, r1, lsr #21 │ │ - b.n 3f0d0 │ │ + b.n 3f3d8 │ │ ldr r6, [r0, #8] │ │ add.w r4, sl, #1 │ │ mov.w fp, #45 @ 0x2d │ │ ldr.w r9, [r7, #8] │ │ lsls r1, r6, #8 │ │ mov.w r1, #0 │ │ str r3, [sp, #20] │ │ - bmi.n 3f10a │ │ + bmi.n 3f412 │ │ str r1, [sp, #24] │ │ ldrh.w r8, [r0, #12] │ │ cmp r4, r8 │ │ - bcc.n 3f134 │ │ + bcc.n 3f43c │ │ ldrd r5, r6, [r0] │ │ mov r2, fp │ │ ldr r0, [sp, #20] │ │ mov r1, r6 │ │ str r0, [sp, #0] │ │ ldr r3, [sp, #24] │ │ mov r0, r5 │ │ - bl 3f40c │ │ + bl 3f714 │ │ cmp r0, #0 │ │ - beq.n 3f194 │ │ + beq.n 3f49c │ │ movs r0, #1 │ │ add sp, #28 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - cbz r3, 3f128 │ │ + cbz r3, 3f430 │ │ ldrsb.w r5, [r2] │ │ cmn.w r5, #65 @ 0x41 │ │ it gt │ │ movgt r1, #1 │ │ cmp r3, #1 │ │ - beq.n 3f128 │ │ + beq.n 3f430 │ │ ldrsb.w r5, [r2, #1] │ │ cmn.w r5, #65 @ 0x41 │ │ it gt │ │ addgt r1, #1 │ │ add r4, r1 │ │ str r2, [sp, #24] │ │ ldrh.w r8, [r0, #12] │ │ cmp r4, r8 │ │ - bcs.n 3f0e8 │ │ + bcs.n 3f3f0 │ │ lsls r1, r6, #7 │ │ str.w sl, [sp, #16] │ │ - bmi.n 3f15a │ │ + bmi.n 3f462 │ │ ubfx r1, r6, #29, #2 │ │ str.w r9, [sp, #12] │ │ sub.w r3, r8, r4 │ │ bfc r6, #21, #11 │ │ movs r4, #0 │ │ tbb [pc, r1] │ │ lsls r4, r1, #9 │ │ lsls r2, r1, #9 │ │ mov r4, r3 │ │ - b.n 3f1ea │ │ + b.n 3f4f2 │ │ ldrd r5, r1, [r0, #8] │ │ mov r2, fp │ │ ldrd sl, r6, [r0] │ │ str r1, [sp, #8] │ │ movs r1, #0 │ │ movt r1, #40928 @ 0x9fe0 │ │ str r0, [sp, #12] │ │ @@ -34097,16 +34290,16 @@ │ │ orr.w r1, r1, #48 @ 0x30 │ │ str r1, [r0, #8] │ │ ldr r0, [sp, #20] │ │ mov r1, r6 │ │ str r0, [sp, #0] │ │ mov r0, sl │ │ ldr r3, [sp, #24] │ │ - bl 3f40c │ │ - cbz r0, 3f1a8 │ │ + bl 3f714 │ │ + cbz r0, 3f4b0 │ │ movs r0, #1 │ │ add sp, #28 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r3, [r6, #12] │ │ mov r0, r5 │ │ mov r1, r9 │ │ @@ -34117,73 +34310,73 @@ │ │ bx r3 │ │ sub.w r0, r8, r4 │ │ mov fp, r5 │ │ movs r4, #0 │ │ uxth r5, r0 │ │ uxth r0, r4 │ │ cmp r0, r5 │ │ - bcs.n 3f1d0 │ │ + bcs.n 3f4d8 │ │ ldr r2, [r6, #16] │ │ mov r0, sl │ │ movs r1, #48 @ 0x30 │ │ blx r2 │ │ adds r4, #1 │ │ cmp r0, #0 │ │ - beq.n 3f1b2 │ │ + beq.n 3f4ba │ │ movs r0, #1 │ │ add sp, #28 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r2, [sp, #16] │ │ mov r0, sl │ │ ldr r3, [r6, #12] │ │ mov r1, r9 │ │ blx r3 │ │ - cbz r0, 3f24e │ │ + cbz r0, 3f556 │ │ movs r0, #1 │ │ add sp, #28 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ uxth r1, r3 │ │ lsrs r4, r1, #1 │ │ ldrd r5, r8, [r0] │ │ mov r9, r3 │ │ mov.w sl, #0 │ │ uxth r0, r4 │ │ uxth.w r1, sl │ │ cmp r1, r0 │ │ - bcs.n 3f21a │ │ + bcs.n 3f522 │ │ ldr.w r2, [r8, #16] │ │ mov r0, r5 │ │ mov r1, r6 │ │ blx r2 │ │ add.w sl, sl, #1 │ │ cmp r0, #0 │ │ - beq.n 3f1f4 │ │ + beq.n 3f4fc │ │ movs r0, #1 │ │ add sp, #28 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r0, [sp, #20] │ │ mov r1, r8 │ │ str r0, [sp, #0] │ │ mov r0, r5 │ │ ldr r3, [sp, #24] │ │ mov r2, fp │ │ - bl 3f40c │ │ - cbz r0, 3f236 │ │ + bl 3f714 │ │ + cbz r0, 3f53e │ │ movs r0, #1 │ │ add sp, #28 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrd r1, r2, [sp, #12] │ │ mov r0, r5 │ │ ldr.w r3, [r8, #12] │ │ blx r3 │ │ - cbz r0, 3f260 │ │ + cbz r0, 3f568 │ │ movs r0, #1 │ │ add sp, #28 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrd r1, r0, [sp, #8] │ │ strd fp, r1, [r0, #8] │ │ movs r0, #0 │ │ @@ -34191,90 +34384,90 @@ │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ sub.w r0, r9, r4 │ │ movs r4, #0 │ │ uxth.w r9, r0 │ │ uxth r0, r4 │ │ cmp r0, r9 │ │ - bcs.n 3f286 │ │ + bcs.n 3f58e │ │ ldr.w r2, [r8, #16] │ │ mov r0, r5 │ │ mov r1, r6 │ │ blx r2 │ │ adds r4, #1 │ │ mov r1, r0 │ │ movs r0, #1 │ │ cmp r1, #0 │ │ - beq.n 3f26a │ │ - b.n 3f102 │ │ + beq.n 3f572 │ │ + b.n 3f40a │ │ movs r0, #0 │ │ add sp, #28 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ push {r4, r5, r6, lr} │ │ stmdb sp!, {r8, r9, sl, fp} │ │ adds r2, r0, #3 │ │ movs r3, #0 │ │ bic.w lr, r2, #3 │ │ subs.w r2, r0, lr │ │ add r1, r2 │ │ and.w ip, r1, #3 │ │ - beq.n 3f2ba │ │ + beq.n 3f5c2 │ │ ldrsb.w r4, [r0], #1 │ │ cmn.w r4, #65 @ 0x41 │ │ it gt │ │ addgt r3, #1 │ │ adds r2, #1 │ │ - bcc.n 3f2aa │ │ + bcc.n 3f5b2 │ │ mov.w r9, r1, lsr #2 │ │ movs r0, #0 │ │ cmp.w ip, #0 │ │ - beq.n 3f302 │ │ + beq.n 3f60a │ │ movw r4, #65532 @ 0xfffc │ │ movt r4, #32767 @ 0x7fff │ │ ands r1, r4 │ │ add r1, lr │ │ ldrsb.w r4, [r1] │ │ cmn.w r4, #65 @ 0x41 │ │ it gt │ │ movgt r0, #1 │ │ cmp.w ip, #1 │ │ - beq.n 3f302 │ │ + beq.n 3f60a │ │ ldrsb.w r4, [r1, #1] │ │ cmn.w r4, #65 @ 0x41 │ │ it gt │ │ addgt r0, #1 │ │ cmp.w ip, #2 │ │ - beq.n 3f302 │ │ + beq.n 3f60a │ │ ldrsb.w r1, [r1, #2] │ │ cmn.w r1, #65 @ 0x41 │ │ it gt │ │ addgt r0, #1 │ │ add r0, r3 │ │ mov.w ip, #1008 @ 0x3f0 │ │ - b.n 3f32e │ │ + b.n 3f636 │ │ mov.w fp, #0 │ │ uxtb16 r1, fp │ │ uxtb16 r2, fp, ror #8 │ │ add r1, r2 │ │ sub.w r9, r9, sl │ │ add.w lr, r8, sl, lsl #2 │ │ ands.w r3, sl, #3 │ │ add.w r1, r1, r1, lsl #16 │ │ add.w r0, r0, r1, lsr #16 │ │ - bne.n 3f3ac │ │ + bne.n 3f6b4 │ │ cmp.w r9, #0 │ │ - beq.n 3f406 │ │ + beq.n 3f70e │ │ cmp.w r9, #192 @ 0xc0 │ │ mov sl, r9 │ │ it cs │ │ movcs.w sl, #192 @ 0xc0 │ │ ands.w r3, ip, sl, lsl #2 │ │ mov r8, lr │ │ - beq.n 3f30a │ │ + beq.n 3f612 │ │ add.w lr, r8, r3 │ │ mov.w fp, #0 │ │ mov r4, r8 │ │ ldrd r5, r2, [r4] │ │ ldrd r1, r3, [r4, #8] │ │ adds r4, #16 │ │ cmp r4, lr │ │ @@ -34294,33 +34487,33 @@ │ │ bic.w r1, r1, #4278124286 @ 0xfefefefe │ │ add r1, r2 │ │ mvn.w r2, r3 │ │ mov.w r2, r2, lsr #7 │ │ orr.w r2, r2, r3, lsr #6 │ │ bic.w r2, r2, #4278124286 @ 0xfefefefe │ │ add.w fp, r2, r1 │ │ - bne.n 3f352 │ │ - b.n 3f30e │ │ + bne.n 3f65a │ │ + b.n 3f616 │ │ and.w r2, sl, #252 @ 0xfc │ │ cmp r3, #1 │ │ ldr.w r1, [r8, r2, lsl #2] │ │ mvn.w r6, r1 │ │ mov.w r6, r6, lsr #7 │ │ orr.w r1, r6, r1, lsr #6 │ │ bic.w r1, r1, #4278124286 @ 0xfefefefe │ │ - beq.n 3f3f4 │ │ + beq.n 3f6fc │ │ add.w r2, r8, r2, lsl #2 │ │ cmp r3, #2 │ │ ldr r6, [r2, #4] │ │ mvn.w r5, r6 │ │ mov.w r5, r5, lsr #7 │ │ orr.w r6, r5, r6, lsr #6 │ │ bic.w r6, r6, #4278124286 @ 0xfefefefe │ │ add r1, r6 │ │ - beq.n 3f3f4 │ │ + beq.n 3f6fc │ │ ldr r2, [r2, #8] │ │ mvns r3, r2 │ │ lsrs r3, r3, #7 │ │ orr.w r2, r3, r2, lsr #6 │ │ bic.w r2, r2, #4278124286 @ 0xfefefefe │ │ add r1, r2 │ │ uxtb16 r2, r1 │ │ @@ -34333,42 +34526,42 @@ │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ ldr.w r8, [r7, #8] │ │ mov r4, r3 │ │ mov r6, r1 │ │ cmp.w r2, #1114112 @ 0x110000 │ │ - beq.n 3f438 │ │ + beq.n 3f740 │ │ ldr r3, [r6, #16] │ │ mov r1, r2 │ │ mov r5, r0 │ │ blx r3 │ │ mov r1, r0 │ │ mov r0, r5 │ │ - cbz r1, 3f438 │ │ + cbz r1, 3f740 │ │ movs r0, #1 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - cbz r4, 3f44a │ │ + cbz r4, 3f752 │ │ ldr r3, [r6, #12] │ │ mov r1, r4 │ │ mov r2, r8 │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ bx r3 │ │ movs r0, #0 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - bmi.n 3f3fe │ │ + bmi.n 3f706 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #32 │ │ cmp r1, #39 @ 0x27 │ │ - bhi.n 3f496 │ │ + bhi.n 3f79e │ │ tbb [pc, r1] │ │ subs r4, r2, #0 │ │ subs r6, r3, #0 │ │ subs r6, r3, #0 │ │ subs r6, r3, #0 │ │ ldrb r6, [r3, #24] │ │ subs r0, r6, #1 │ │ @@ -34384,35 +34577,35 @@ │ │ subs r6, r3, #0 │ │ subs r6, r3, #0 │ │ subs r2, r0, #2 │ │ subs r6, r3, #0 │ │ strb r6, [r3, #16] │ │ movs r1, #0 │ │ movw r2, #12380 @ 0x305c │ │ - b.n 3f61a │ │ + b.n 3f922 │ │ cmp r1, #92 @ 0x5c │ │ - bne.n 3f4a2 │ │ + bne.n 3f7aa │ │ movs r1, #0 │ │ movw r2, #23644 @ 0x5c5c │ │ - b.n 3f61a │ │ + b.n 3f922 │ │ lsls r2, r2, #31 │ │ itt ne │ │ lsrne r2, r1, #8 │ │ cmpne r2, #2 │ │ - bls.n 3f574 │ │ + bls.n 3f87c │ │ mov r4, r0 │ │ mov r0, r1 │ │ mov r5, r1 │ │ - bl 3f8c8 │ │ + bl 3fbd0 │ │ mov r2, r0 │ │ mov r1, r5 │ │ mov r0, r4 │ │ cmp r2, #0 │ │ - beq.n 3f574 │ │ - ldr r3, [pc, #368] @ (3f634 ) │ │ + beq.n 3f87c │ │ + ldr r3, [pc, #368] @ (3f93c ) │ │ ubfx r2, r1, #8, #4 │ │ ubfx r5, r1, #16, #4 │ │ ubfx r6, r1, #12, #4 │ │ add r3, pc │ │ ldrb.w lr, [r3, r2] │ │ ubfx r2, r1, #4, #4 │ │ ldrb r5, [r3, r5] │ │ @@ -34445,43 +34638,43 @@ │ │ strb.w r3, [r2, #-1] │ │ strb.w r6, [sp, #9] │ │ strb.w ip, [sp, #8] │ │ ldrd r2, r3, [sp] │ │ ldrh.w r6, [sp, #8] │ │ strd r2, r3, [r0] │ │ strh r6, [r0, #8] │ │ - b.n 3f610 │ │ + b.n 3f918 │ │ movs r1, #0 │ │ movw r2, #28252 @ 0x6e5c │ │ - b.n 3f61a │ │ + b.n 3f922 │ │ lsls r2, r2, #23 │ │ - bpl.n 3f574 │ │ + bpl.n 3f87c │ │ movs r1, #0 │ │ movw r2, #10076 @ 0x275c │ │ - b.n 3f61a │ │ + b.n 3f922 │ │ movs r1, #0 │ │ movw r2, #29276 @ 0x725c │ │ - b.n 3f61a │ │ + b.n 3f922 │ │ movs r1, #0 │ │ movw r2, #29788 @ 0x745c │ │ - b.n 3f61a │ │ + b.n 3f922 │ │ bic.w r2, r2, #4278190080 @ 0xff000000 │ │ cmp.w r2, #65536 @ 0x10000 │ │ - bcs.n 3f614 │ │ + bcs.n 3f91c │ │ mov r4, r0 │ │ mov r0, r1 │ │ mov r5, r1 │ │ - bl 3f63c │ │ - cbz r0, 3f58a │ │ + bl 3f944 │ │ + cbz r0, 3f892 │ │ mov r0, r4 │ │ str r5, [r4, #0] │ │ movs r2, #129 @ 0x81 │ │ movs r1, #128 @ 0x80 │ │ - b.n 3f626 │ │ - ldr r1, [pc, #172] @ (3f638 ) │ │ + b.n 3f92e │ │ + ldr r1, [pc, #172] @ (3f940 ) │ │ ubfx r0, r5, #8, #4 │ │ ubfx r2, r5, #12, #4 │ │ lsrs r6, r5, #20 │ │ add r1, pc │ │ ldrb.w lr, [r1, r0] │ │ ubfx r0, r5, #4, #4 │ │ ldrb r6, [r1, r6] │ │ @@ -34516,120 +34709,120 @@ │ │ mov r0, r4 │ │ strb.w ip, [sp, #24] │ │ ldrd r2, r3, [sp, #16] │ │ ldrh.w r6, [sp, #24] │ │ strd r2, r3, [r0] │ │ strh r6, [r4, #8] │ │ movs r2, #10 │ │ - b.n 3f626 │ │ + b.n 3f92e │ │ movs r1, #0 │ │ movw r2, #8796 @ 0x225c │ │ str.w r1, [r0, #6] │ │ str.w r1, [r0, #2] │ │ strh r2, [r0, #0] │ │ movs r2, #2 │ │ strb r2, [r0, #13] │ │ strb r1, [r0, #12] │ │ add sp, #32 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - adds r5, #62 @ 0x3e │ │ - vsri.32 , q11, #3 │ │ + adds r2, #54 @ 0x36 │ │ + vceq.i , q15, #0 │ │ vsli.64 , q8, #61 @ 0x3d │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ cmp r0, #32 │ │ - bcs.n 3f654 │ │ + bcs.n 3f95c │ │ movs r1, #0 │ │ and.w r0, r1, #1 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ cmp r0, #127 @ 0x7f │ │ - bcs.n 3f664 │ │ + bcs.n 3f96c │ │ movs r1, #1 │ │ and.w r0, r1, #1 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ cmp.w r0, #65536 @ 0x10000 │ │ - bcs.n 3f6c4 │ │ - ldr r1, [pc, #568] @ (3f8a4 ) │ │ + bcs.n 3f9cc │ │ + ldr r1, [pc, #568] @ (3fbac ) │ │ uxtb r3, r0 │ │ mov.w ip, r0, lsr #8 │ │ movs r2, #0 │ │ add r1, pc │ │ movs r5, #0 │ │ mov lr, r1 │ │ - ldr r1, [pc, #556] @ (3f8a8 ) │ │ + ldr r1, [pc, #556] @ (3fbb0 ) │ │ add r1, pc │ │ mov r8, r1 │ │ - b.n 3f68e │ │ - bhi.w 3f804 │ │ + b.n 3f996 │ │ + bhi.w 3fb0c │ │ mov r2, r1 │ │ cmp r5, #76 @ 0x4c │ │ - beq.w 3f804 │ │ + beq.w 3fb0c │ │ add.w r1, lr, r5 │ │ ldrb.w r4, [lr, r5] │ │ adds r5, #2 │ │ ldrb r6, [r1, #1] │ │ cmp r4, ip │ │ add.w r1, r2, r6 │ │ - bne.n 3f682 │ │ + bne.n 3f98a │ │ cmp r1, r2 │ │ - bcc.w 3f882 │ │ + bcc.w 3fb8a │ │ cmp.w r1, #284 @ 0x11c │ │ - bhi.w 3f882 │ │ + bhi.w 3fb8a │ │ cmp r6, #0 │ │ - beq.n 3f686 │ │ + beq.n 3f98e │ │ add r2, r8 │ │ ldrb r4, [r2, #0] │ │ cmp r4, r3 │ │ - beq.n 3f722 │ │ + beq.n 3fa2a │ │ adds r2, #1 │ │ subs r6, #1 │ │ - bne.n 3f6b6 │ │ - b.n 3f686 │ │ + bne.n 3f9be │ │ + b.n 3f98e │ │ cmp.w r0, #131072 @ 0x20000 │ │ - bcs.n 3f72e │ │ - ldr r1, [pc, #492] @ (3f8b8 ) │ │ + bcs.n 3fa36 │ │ + ldr r1, [pc, #492] @ (3fbc0 ) │ │ ubfx ip, r0, #8, #8 │ │ uxtb r3, r0 │ │ movs r2, #0 │ │ add r1, pc │ │ movs r6, #0 │ │ mov lr, r1 │ │ - ldr r1, [pc, #480] @ (3f8bc ) │ │ + ldr r1, [pc, #480] @ (3fbc4 ) │ │ add r1, pc │ │ mov r8, r1 │ │ - b.n 3f6ee │ │ - bhi.w 3f842 │ │ + b.n 3f9f6 │ │ + bhi.w 3fb4a │ │ mov r2, r1 │ │ cmp r6, #92 @ 0x5c │ │ - beq.w 3f842 │ │ + beq.w 3fb4a │ │ add.w r1, lr, r6 │ │ ldrb.w r4, [lr, r6] │ │ adds r6, #2 │ │ ldrb r5, [r1, #1] │ │ cmp r4, ip │ │ add.w r1, r2, r5 │ │ - bne.n 3f6e2 │ │ + bne.n 3f9ea │ │ cmp r1, r2 │ │ - bcc.w 3f890 │ │ + bcc.w 3fb98 │ │ cmp r1, #212 @ 0xd4 │ │ - bhi.w 3f890 │ │ + bhi.w 3fb98 │ │ cmp r5, #0 │ │ - beq.n 3f6e6 │ │ + beq.n 3f9ee │ │ add r2, r8 │ │ ldrb r4, [r2, #0] │ │ cmp r4, r3 │ │ - beq.n 3f722 │ │ + beq.n 3fa2a │ │ adds r2, #1 │ │ subs r5, #1 │ │ - bne.n 3f714 │ │ - b.n 3f6e6 │ │ + bne.n 3fa1c │ │ + b.n 3f9ee │ │ movs r1, #0 │ │ and.w r0, r1, #1 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ movw r1, #65504 @ 0xffe0 │ │ movw r3, #42720 @ 0xa6e0 │ │ movt r1, #31 │ │ @@ -34697,90 +34890,90 @@ │ │ cmp r0, r3 │ │ it cc │ │ movcc r1, #1 │ │ ands r1, r2 │ │ and.w r0, r1, #1 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r3, [pc, #164] @ (3f8ac ) │ │ + ldr r3, [pc, #164] @ (3fbb4 ) │ │ movs r5, #0 │ │ movs r1, #1 │ │ add r3, pc │ │ - b.n 3f822 │ │ + b.n 3fb2a │ │ mov r5, r2 │ │ subs r0, r0, r6 │ │ - bmi.w 3f64a │ │ + bmi.w 3f952 │ │ eor.w r1, r1, #1 │ │ cmp.w r5, #292 @ 0x124 │ │ - beq.w 3f64a │ │ + beq.w 3f952 │ │ ldrsb r6, [r3, r5] │ │ adds r2, r5, #1 │ │ cmp r6, #0 │ │ - bpl.n 3f80e │ │ + bpl.n 3fb16 │ │ cmp.w r2, #292 @ 0x124 │ │ - beq.n 3f89c │ │ + beq.n 3fba4 │ │ ldrb r2, [r3, r2] │ │ and.w r6, r6, #127 @ 0x7f │ │ adds r5, #2 │ │ orr.w r6, r2, r6, lsl #8 │ │ subs r0, r0, r6 │ │ - bpl.n 3f816 │ │ - b.n 3f64a │ │ - ldr r3, [pc, #124] @ (3f8c0 ) │ │ + bpl.n 3fb1e │ │ + b.n 3f952 │ │ + ldr r3, [pc, #124] @ (3fbc8 ) │ │ uxth r0, r0 │ │ movs r5, #0 │ │ movs r1, #1 │ │ add r3, pc │ │ - b.n 3f862 │ │ + b.n 3fb6a │ │ mov r5, r2 │ │ subs r0, r0, r6 │ │ - bmi.w 3f64a │ │ + bmi.w 3f952 │ │ eor.w r1, r1, #1 │ │ cmp.w r5, #504 @ 0x1f8 │ │ - beq.w 3f64a │ │ + beq.w 3f952 │ │ ldrsb r6, [r3, r5] │ │ adds r2, r5, #1 │ │ cmp r6, #0 │ │ - bpl.n 3f84e │ │ + bpl.n 3fb56 │ │ cmp.w r2, #504 @ 0x1f8 │ │ - beq.n 3f89c │ │ + beq.n 3fba4 │ │ ldrb r2, [r3, r2] │ │ and.w r6, r6, #127 @ 0x7f │ │ adds r5, #2 │ │ orr.w r6, r2, r6, lsl #8 │ │ subs r0, r0, r6 │ │ - bpl.n 3f856 │ │ - b.n 3f64a │ │ - ldr r3, [pc, #44] @ (3f8b0 ) │ │ + bpl.n 3fb5e │ │ + b.n 3f952 │ │ + ldr r3, [pc, #44] @ (3fbb8 ) │ │ mov r0, r2 │ │ mov.w r2, #284 @ 0x11c │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #48] @ (3f8c4 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #48] @ (3fbcc ) │ │ mov r0, r2 │ │ movs r2, #212 @ 0xd4 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #20] @ (3f8b4 ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #20] @ (3fbbc ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - str r0, [r1, #120] @ 0x78 │ │ - vneg.f q11, q6 │ │ - vqshl.u32 q11, q5, #29 │ │ - @ instruction: 0xfffdae0a │ │ + bl 3fd40 │ │ + str r0, [r0, #72] @ 0x48 │ │ + vcge.f q11, q2, #0 │ │ + vsri.32 q11, q1, #3 │ │ + @ instruction: 0xfffdab12 │ │ movs r1, r1 │ │ - add r6, sp, #24 │ │ + add r3, sp, #56 @ 0x38 │ │ movs r1, r1 │ │ - str r0, [r0, #64] @ 0x40 │ │ - vsri.32 q11, q2, #3 │ │ - vrsra.u64 d22, d26, #3 │ │ - @ instruction: 0xfffdadfe │ │ + str r0, [r7, #12] │ │ + vceq.i q11, q6, #0 │ │ + vshr.u64 d22, d18, #3 │ │ + vtbl.8 d26, {d13-d16}, d6 │ │ movs r1, r1 │ │ push {r4, lr} │ │ - ldr r1, [pc, #212] @ (3f9a0 ) │ │ + ldr r1, [pc, #212] @ (3fca8 ) │ │ movw r3, #3755 @ 0xeab │ │ movt r3, #1 │ │ movs r2, #16 │ │ cmp r0, r3 │ │ it cc │ │ movcc r2, #0 │ │ add r1, pc │ │ @@ -34825,507 +35018,507 @@ │ │ it eq │ │ addeq r4, #1 │ │ add r4, r2 │ │ cmp r4, #31 │ │ ldr.w r2, [r1, r4, lsl #2] │ │ add.w r3, r1, r4, lsl #2 │ │ mov.w r1, r2, lsr #21 │ │ - bhi.n 3f96e │ │ + bhi.n 3fc76 │ │ ldr r2, [r3, #4] │ │ mov.w r2, r2, lsr #21 │ │ - cbnz r4, 3f972 │ │ + cbnz r4, 3fc7a │ │ movs r3, #0 │ │ mvns r4, r1 │ │ adds r4, r4, r2 │ │ - bne.n 3f980 │ │ - b.n 3f99a │ │ + bne.n 3fc88 │ │ + b.n 3fca2 │ │ movw r2, #767 @ 0x2ff │ │ ldr.w r3, [r3, #-4] │ │ bfc r3, #21, #11 │ │ mvns r4, r1 │ │ adds r4, r4, r2 │ │ - beq.n 3f99a │ │ - ldr r4, [pc, #32] @ (3f9a4 ) │ │ + beq.n 3fca2 │ │ + ldr r4, [pc, #32] @ (3fcac ) │ │ subs r0, r0, r3 │ │ sub.w ip, r2, #1 │ │ movs r3, #0 │ │ add r4, pc │ │ ldrb r2, [r4, r1] │ │ add r3, r2 │ │ cmp r3, r0 │ │ - bhi.n 3f99a │ │ + bhi.n 3fca2 │ │ adds r1, #1 │ │ cmp ip, r1 │ │ - bne.n 3f98c │ │ + bne.n 3fc94 │ │ and.w r0, r1, #1 │ │ pop {r4, pc} │ │ - str r4, [r3, #16] │ │ - vtbx.8 d18, {d13-d16}, d26 │ │ + ldrsh r4, [r2, r0] │ │ + vtbx.8 d18, {d13}, d18 │ │ vsli.64 , q0, #61 @ 0x3d │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ cmp r0, r2 │ │ - bls.n 3f9d4 │ │ - ldr r4, [pc, #116] @ (3fa28 ) │ │ - ldr r1, [pc, #116] @ (3fa2c ) │ │ + bls.n 3fcdc │ │ + ldr r4, [pc, #116] @ (3fd30 ) │ │ + ldr r1, [pc, #116] @ (3fd34 ) │ │ strd r0, r2, [sp] │ │ add r0, sp, #4 │ │ add r1, pc │ │ add r4, pc │ │ strd r1, r0, [sp, #12] │ │ mov r0, sp │ │ str r1, [sp, #20] │ │ add r1, sp, #8 │ │ str r0, [sp, #8] │ │ mov r0, r4 │ │ mov r2, r3 │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ cmp r1, r2 │ │ - bhi.n 3f9fe │ │ + bhi.n 3fd06 │ │ cmp r0, r1 │ │ - bls.n 3f9fe │ │ - ldr r2, [pc, #64] @ (3fa20 ) │ │ - ldr r4, [pc, #68] @ (3fa24 ) │ │ + bls.n 3fd06 │ │ + ldr r2, [pc, #64] @ (3fd28 ) │ │ + ldr r4, [pc, #68] @ (3fd2c ) │ │ strd r0, r1, [sp] │ │ add r0, sp, #4 │ │ add r2, pc │ │ add r4, pc │ │ strd r4, r0, [sp, #12] │ │ mov r0, sp │ │ add r1, sp, #8 │ │ str r0, [sp, #8] │ │ mov r0, r2 │ │ mov r2, r3 │ │ str r4, [sp, #20] │ │ - bl 3fa58 │ │ - ldr r0, [pc, #48] @ (3fa30 ) │ │ - ldr r4, [pc, #48] @ (3fa34 ) │ │ + bl 3fd60 │ │ + ldr r0, [pc, #48] @ (3fd38 ) │ │ + ldr r4, [pc, #48] @ (3fd3c ) │ │ strd r1, r2, [sp] │ │ add r1, sp, #4 │ │ str r1, [sp, #16] │ │ mov r1, sp │ │ str r1, [sp, #8] │ │ add r0, pc │ │ add r1, sp, #8 │ │ mov r2, r3 │ │ add r4, pc │ │ str r4, [sp, #20] │ │ str r4, [sp, #12] │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ nop │ │ - cbnz r7, 3fa72 │ │ + @ instruction: 0xb786 │ │ @ instruction: 0xfffc0e89 │ │ movs r0, r0 │ │ - b.n 3f502 │ │ + b.n 403e2 │ │ @ instruction: 0xfffc0eb5 │ │ movs r0, r0 │ │ - bls.n 3f9aa │ │ + bvc.n 3fd22 │ │ vcvt.f32.u32 q8, , #4 │ │ movs r0, r0 │ │ push {r7, lr} │ │ mov r7, sp │ │ mov r2, r0 │ │ - ldr r0, [pc, #8] @ (3fa48 ) │ │ + ldr r0, [pc, #8] @ (3fd50 ) │ │ movs r1, #43 @ 0x2b │ │ add r0, pc │ │ - bl 3fa4c │ │ - adds r1, #73 @ 0x49 │ │ + bl 3fd54 │ │ + cmp r6, #65 @ 0x41 │ │ vcle.f d27, d0, #0 │ │ mov r7, sp │ │ lsls r1, r1, #1 │ │ adds r1, #1 │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #24 │ │ strd r0, r1, [sp, #4] │ │ movs r0, #1 │ │ strh.w r0, [sp, #20] │ │ add r0, sp, #4 │ │ str r0, [sp, #12] │ │ add r0, sp, #12 │ │ str r2, [sp, #16] │ │ - bl 93d48 │ │ + bl 93db4 │ │ push {r1, r2, r3, r4, r5, r6, r7, lr} │ │ add r7, sp, #24 │ │ strd r0, r1, [sp] │ │ mov r1, sp │ │ - ldr r0, [pc, #24] @ (3fa98 ) │ │ + ldr r0, [pc, #24] @ (3fda0 ) │ │ add r0, pc │ │ str r0, [sp, #20] │ │ strd r0, r1, [sp, #12] │ │ add r0, sp, #4 │ │ str r0, [sp, #8] │ │ - ldr r0, [pc, #12] @ (3fa9c ) │ │ + ldr r0, [pc, #12] @ (3fda4 ) │ │ add r1, sp, #8 │ │ add r0, pc │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ nop │ │ lsrs r1, r6, #23 │ │ movs r0, r0 │ │ - itete cs │ │ - vslics.64 , q8, #60 @ 0x3c │ │ - addcc r7, sp, #12 │ │ - stmdbcs sp!, {r8, r9, sl, fp} │ │ - subcc sp, #52 @ 0x34 │ │ + pop {r0, r1, r4} │ │ + vsli.64 , q8, #60 @ 0x3c │ │ + add r7, sp, #12 │ │ + stmdb sp!, {r8, r9, sl, fp} │ │ + sub sp, #52 @ 0x34 │ │ ldr r5, [r3, #16] │ │ mov fp, r1 │ │ mov sl, r0 │ │ mov r0, r2 │ │ movs r1, #34 @ 0x22 │ │ mov r4, r3 │ │ mov r6, r2 │ │ blx r5 │ │ cmp r0, #0 │ │ - bne.w 3fcd8 │ │ + bne.w 3ffe0 │ │ cmp.w fp, #0 │ │ - beq.w 3fc78 │ │ + beq.w 3ff80 │ │ movs r2, #0 │ │ movs r3, #0 │ │ mov r1, fp │ │ strd r5, r4, [sp, #12] │ │ str r6, [sp, #24] │ │ str.w sl, [sp, #20] │ │ str.w fp, [sp, #8] │ │ - b.n 3faec │ │ + b.n 3fdf4 │ │ movs r0, #1 │ │ add.w r3, r0, r8 │ │ subs.w r1, r1, sl │ │ - beq.w 3fc82 │ │ + beq.w 3ff8a │ │ add.w r4, sl, r1 │ │ movs r0, #0 │ │ ldrb.w r5, [sl, r0] │ │ sub.w r6, r5, #127 @ 0x7f │ │ cmn.w r6, #95 @ 0x5f │ │ - bcc.n 3fb10 │ │ + bcc.n 3fe18 │ │ cmp r5, #34 @ 0x22 │ │ it ne │ │ cmpne r5, #92 @ 0x5c │ │ - beq.n 3fb10 │ │ + beq.n 3fe18 │ │ adds r0, #1 │ │ cmp r1, r0 │ │ - bne.n 3faf2 │ │ - b.n 3fc80 │ │ + bne.n 3fdfa │ │ + b.n 3ff88 │ │ add.w r1, sl, r0 │ │ str r2, [sp, #32] │ │ mov r5, fp │ │ str r4, [sp, #28] │ │ mov sl, r1 │ │ ldrsb.w r2, [sl], #1 │ │ cmp.w r2, #4294967295 @ 0xffffffff │ │ uxtb.w r9, r2 │ │ - bgt.n 3fb78 │ │ + bgt.n 3fe80 │ │ mov ip, r5 │ │ ldrb r5, [r1, #1] │ │ and.w r2, r9, #31 │ │ cmp.w r9, #224 @ 0xe0 │ │ and.w r5, r5, #63 @ 0x3f │ │ - bcc.n 3fb64 │ │ + bcc.n 3fe6c │ │ ldrb r4, [r1, #2] │ │ cmp.w r9, #240 @ 0xf0 │ │ and.w r4, r4, #63 @ 0x3f │ │ orr.w r5, r4, r5, lsl #6 │ │ - bcc.n 3fb6e │ │ + bcc.n 3fe76 │ │ ldrb r6, [r1, #3] │ │ and.w r2, r2, #7 │ │ add.w sl, r1, #4 │ │ and.w r6, r6, #63 @ 0x3f │ │ orr.w r6, r6, r5, lsl #6 │ │ orr.w r9, r6, r2, lsl #18 │ │ - b.n 3fb76 │ │ + b.n 3fe7e │ │ orr.w r9, r5, r2, lsl #6 │ │ add.w sl, r1, #2 │ │ - b.n 3fb76 │ │ + b.n 3fe7e │ │ orr.w r9, r5, r2, lsl #12 │ │ add.w sl, r1, #3 │ │ mov r5, ip │ │ add.w r8, r0, r3 │ │ add r0, sp, #36 @ 0x24 │ │ mov r1, r9 │ │ mov.w r2, #65537 @ 0x10001 │ │ - bl 3f454 │ │ + bl 3f75c │ │ ldrb.w r6, [sp, #48] @ 0x30 │ │ ldrb.w r4, [sp, #49] @ 0x31 │ │ sub.w fp, r4, r6 │ │ uxtb.w r0, fp │ │ cmp r0, #1 │ │ - bne.n 3fbaa │ │ + bne.n 3feb2 │ │ ldr r2, [sp, #32] │ │ mov fp, r5 │ │ ldr r1, [sp, #28] │ │ cmp.w r9, #128 @ 0x80 │ │ - bcc.n 3fade │ │ - b.n 3fc62 │ │ + bcc.n 3fde6 │ │ + b.n 3ff6a │ │ ldr r2, [sp, #32] │ │ mov r1, r5 │ │ mov r3, r8 │ │ cmp r8, r2 │ │ - bcc.w 3fcf0 │ │ - cbz r2, 3fbcc │ │ + bcc.w 3fff8 │ │ + cbz r2, 3fed4 │ │ cmp r2, r1 │ │ - bcs.n 3fbc8 │ │ + bcs.n 3fed0 │ │ ldr r0, [sp, #20] │ │ ldrsb r0, [r0, r2] │ │ cmn.w r0, #65 @ 0x41 │ │ - bgt.n 3fbcc │ │ - b.n 3fcf0 │ │ - bne.w 3fcf0 │ │ - cbz r3, 3fbe2 │ │ + bgt.n 3fed4 │ │ + b.n 3fff8 │ │ + bne.w 3fff8 │ │ + cbz r3, 3feea │ │ cmp r3, r1 │ │ - bcs.n 3fbde │ │ + bcs.n 3fee6 │ │ ldr r0, [sp, #20] │ │ ldrsb r0, [r0, r3] │ │ cmn.w r0, #65 @ 0x41 │ │ - bgt.n 3fbe2 │ │ - b.n 3fcf0 │ │ - bne.w 3fcf0 │ │ + bgt.n 3feea │ │ + b.n 3fff8 │ │ + bne.w 3fff8 │ │ ldr r0, [sp, #20] │ │ mov r8, r3 │ │ adds r1, r0, r2 │ │ ldr r0, [sp, #16] │ │ subs r2, r3, r2 │ │ ldr r5, [r0, #12] │ │ ldr r0, [sp, #24] │ │ blx r5 │ │ cmp r0, #0 │ │ - bne.n 3fcd8 │ │ + bne.n 3ffe0 │ │ cmp r4, #129 @ 0x81 │ │ - bcc.n 3fc06 │ │ + bcc.n 3ff0e │ │ ldr r1, [sp, #36] @ 0x24 │ │ ldr r0, [sp, #24] │ │ ldr r2, [sp, #12] │ │ blx r2 │ │ - cbz r0, 3fc14 │ │ - b.n 3fcd8 │ │ + cbz r0, 3ff1c │ │ + b.n 3ffe0 │ │ add r0, sp, #36 @ 0x24 │ │ mov r2, fp │ │ adds r1, r0, r6 │ │ ldr r0, [sp, #24] │ │ blx r5 │ │ cmp r0, #0 │ │ - bne.n 3fcd8 │ │ + bne.n 3ffe0 │ │ cmp.w r9, #128 @ 0x80 │ │ - bcs.n 3fc30 │ │ + bcs.n 3ff38 │ │ movs r0, #1 │ │ ldr.w fp, [sp, #8] │ │ ldr r1, [sp, #28] │ │ add.w r2, r0, r8 │ │ cmp.w r9, #128 @ 0x80 │ │ - bcc.w 3fade │ │ - b.n 3fc62 │ │ + bcc.w 3fde6 │ │ + b.n 3ff6a │ │ ldr.w fp, [sp, #8] │ │ cmp.w r9, #2048 @ 0x800 │ │ ldr r1, [sp, #28] │ │ - bcs.n 3fc4c │ │ + bcs.n 3ff54 │ │ movs r0, #2 │ │ add.w r2, r0, r8 │ │ cmp.w r9, #128 @ 0x80 │ │ - bcc.w 3fade │ │ - b.n 3fc62 │ │ + bcc.w 3fde6 │ │ + b.n 3ff6a │ │ movs r0, #4 │ │ cmp.w r9, #65536 @ 0x10000 │ │ it cc │ │ movcc r0, #3 │ │ add.w r2, r0, r8 │ │ cmp.w r9, #128 @ 0x80 │ │ - bcc.w 3fade │ │ + bcc.w 3fde6 │ │ cmp.w r9, #2048 @ 0x800 │ │ - bcs.n 3fc6c │ │ + bcs.n 3ff74 │ │ movs r0, #2 │ │ - b.n 3fae0 │ │ + b.n 3fde8 │ │ movs r0, #4 │ │ cmp.w r9, #65536 @ 0x10000 │ │ it cc │ │ movcc r0, #3 │ │ - b.n 3fae0 │ │ + b.n 3fde8 │ │ mov.w fp, #0 │ │ movs r0, #0 │ │ - b.n 3fcc8 │ │ + b.n 3ffd0 │ │ add r3, r1 │ │ cmp r2, r3 │ │ - bhi.n 3fcfc │ │ + bhi.n 40004 │ │ ldrd sl, r6, [sp, #20] │ │ ldrd r5, r4, [sp, #12] │ │ - cbz r2, 3fca2 │ │ + cbz r2, 3ffaa │ │ cmp r2, fp │ │ - bcs.n 3fcac │ │ + bcs.n 3ffb4 │ │ ldrsb.w r0, [sl, r2] │ │ cmn.w r0, #65 @ 0x41 │ │ mov r0, r2 │ │ - bgt.n 3fcb0 │ │ - b.n 3fd04 │ │ + bgt.n 3ffb8 │ │ + b.n 4000c │ │ movs r0, #0 │ │ - cbnz r3, 3fcb4 │ │ + cbnz r3, 3ffbc │ │ mov.w fp, #0 │ │ - b.n 3fcc8 │ │ + b.n 3ffd0 │ │ mov r0, fp │ │ - bne.n 3fd04 │ │ + bne.n 4000c │ │ cmp r3, #0 │ │ - beq.n 3fca6 │ │ + beq.n 3ffae │ │ cmp r3, fp │ │ - bcs.n 3fcc6 │ │ + bcs.n 3ffce │ │ ldrsb.w r1, [sl, r3] │ │ cmn.w r1, #65 @ 0x41 │ │ - ble.n 3fd02 │ │ + ble.n 4000a │ │ mov fp, r3 │ │ - b.n 3fcc8 │ │ - bne.n 3fd02 │ │ + b.n 3ffd0 │ │ + bne.n 4000a │ │ add.w r1, sl, r0 │ │ sub.w r2, fp, r0 │ │ ldr r3, [r4, #12] │ │ mov r0, r6 │ │ blx r3 │ │ - cbz r0, 3fce2 │ │ + cbz r0, 3ffea │ │ movs r0, #1 │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, r6 │ │ movs r1, #34 @ 0x22 │ │ blx r5 │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #32] @ (3fd14 ) │ │ + ldr r0, [pc, #32] @ (4001c ) │ │ add r0, pc │ │ str r0, [sp, #0] │ │ ldr r0, [sp, #20] │ │ - bl 3fd1c │ │ + bl 40024 │ │ ldr.w sl, [sp, #20] │ │ - b.n 3fd04 │ │ + b.n 4000c │ │ mov r2, r0 │ │ - ldr r0, [pc, #16] @ (3fd18 ) │ │ + ldr r0, [pc, #16] @ (40020 ) │ │ mov r1, fp │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, sl │ │ - bl 3fd1c │ │ + bl 40024 │ │ nop │ │ - add r1, sp, #40 @ 0x28 │ │ + add r6, pc, #72 @ (adr r6, 40068 ) │ │ movs r1, r1 │ │ - add r1, sp, #16 │ │ + add r6, pc, #48 @ (adr r6, 40054 ) │ │ movs r1, r1 │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #8 │ │ ldr.w ip, [r7, #8] │ │ str.w ip, [sp] │ │ - bl 3fd30 │ │ - bmi.n 3fcda │ │ + bl 40038 │ │ + bmi.n 3ffe2 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #80 @ 0x50 │ │ mov ip, r2 │ │ cmp.w r1, #256 @ 0x100 │ │ strd r2, r3, [sp] │ │ - bhi.n 3fd50 │ │ + bhi.n 40058 │ │ movs r4, #0 │ │ movs r5, #1 │ │ strd r0, r1, [sp, #8] │ │ - b.n 3fd76 │ │ + b.n 4007e │ │ mov.w r2, #256 @ 0x100 │ │ ldrsb r5, [r0, r2] │ │ cmn.w r5, #65 @ 0x41 │ │ - bgt.n 3fd62 │ │ + bgt.n 4006a │ │ subs r2, #1 │ │ - bne.n 3fd54 │ │ + bne.n 4005c │ │ movs r2, #0 │ │ - ldr r5, [pc, #380] @ (3fee0 ) │ │ + ldr r5, [pc, #380] @ (401e8 ) │ │ movs r4, #0 │ │ strd r0, r2, [sp, #8] │ │ cmp r2, r1 │ │ add r5, pc │ │ it cs │ │ movcs r5, #1 │ │ it cc │ │ movcc r4, #5 │ │ ldr.w lr, [r7, #8] │ │ cmp ip, r1 │ │ strd r5, r4, [sp, #16] │ │ - bhi.w 3fe88 │ │ + bhi.w 40190 │ │ cmp r3, r1 │ │ - bhi.n 3fe86 │ │ + bhi.n 4018e │ │ cmp ip, r3 │ │ - bhi.w 3feb2 │ │ + bhi.w 401ba │ │ cmp.w ip, #0 │ │ - beq.n 3fda4 │ │ + beq.n 400ac │ │ cmp ip, r1 │ │ - bcs.n 3fda4 │ │ + bcs.n 400ac │ │ ldrsb.w r5, [r0, ip] │ │ cmn.w r5, #65 @ 0x41 │ │ it le │ │ movle r3, ip │ │ cmp r3, r1 │ │ str r3, [sp, #24] │ │ - bcs.n 3fdbe │ │ - cbz r3, 3fdb8 │ │ + bcs.n 400c6 │ │ + cbz r3, 400c0 │ │ ldrsb r5, [r0, r3] │ │ cmn.w r5, #65 @ 0x41 │ │ - bgt.n 3fdba │ │ + bgt.n 400c2 │ │ subs r3, #1 │ │ - bne.n 3fdac │ │ + bne.n 400b4 │ │ movs r3, #0 │ │ cmp r3, r1 │ │ - bne.n 3fdc4 │ │ + bne.n 400cc │ │ mov r0, lr │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ add r0, r3 │ │ ldrsb.w r1, [r0] │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ uxtb r5, r1 │ │ - ble.n 3fdda │ │ + ble.n 400e2 │ │ str r5, [sp, #28] │ │ mov.w ip, #1 │ │ - b.n 3fe44 │ │ + b.n 4014c │ │ ldrb r4, [r0, #1] │ │ and.w ip, r5, #31 │ │ cmp r5, #223 @ 0xdf │ │ and.w r4, r4, #63 @ 0x3f │ │ - bls.n 3fe10 │ │ + bls.n 40118 │ │ ldrb r1, [r0, #2] │ │ cmp r5, #240 @ 0xf0 │ │ and.w r1, r1, #63 @ 0x3f │ │ orr.w r4, r1, r4, lsl #6 │ │ - bcc.n 3fe20 │ │ + bcc.n 40128 │ │ ldrb r0, [r0, #3] │ │ and.w r1, ip, #7 │ │ and.w r0, r0, #63 @ 0x3f │ │ orr.w r0, r0, r4, lsl #6 │ │ orr.w r0, r0, r1, lsl #18 │ │ cmp r0, #128 @ 0x80 │ │ str r0, [sp, #28] │ │ - bcc.n 3fe1a │ │ - b.n 3fe2a │ │ + bcc.n 40122 │ │ + b.n 40132 │ │ orr.w r0, r4, ip, lsl #6 │ │ cmp r0, #128 @ 0x80 │ │ str r0, [sp, #28] │ │ - bcs.n 3fe2a │ │ + bcs.n 40132 │ │ mov.w ip, #1 │ │ - b.n 3fe44 │ │ + b.n 4014c │ │ orr.w r0, r4, ip, lsl #12 │ │ cmp r0, #128 @ 0x80 │ │ str r0, [sp, #28] │ │ - bcc.n 3fe1a │ │ + bcc.n 40122 │ │ cmp.w r0, #2048 @ 0x800 │ │ - bcs.n 3fe36 │ │ + bcs.n 4013e │ │ mov.w ip, #2 │ │ - b.n 3fe44 │ │ + b.n 4014c │ │ mov.w ip, #4 │ │ cmp.w r0, #65536 @ 0x10000 │ │ it cc │ │ movcc.w ip, #3 │ │ add.w r4, ip, r3 │ │ - ldr r6, [pc, #176] @ (3fefc ) │ │ - ldr r1, [pc, #180] @ (3ff00 ) │ │ - ldr r5, [pc, #180] @ (3ff04 ) │ │ + ldr r6, [pc, #176] @ (40204 ) │ │ + ldr r1, [pc, #180] @ (40208 ) │ │ + ldr r5, [pc, #180] @ (4020c ) │ │ add r6, pc │ │ - ldr r2, [pc, #180] @ (3ff08 ) │ │ + ldr r2, [pc, #180] @ (40210 ) │ │ add r1, pc │ │ - ldr r0, [pc, #180] @ (3ff0c ) │ │ + ldr r0, [pc, #180] @ (40214 ) │ │ add r5, pc │ │ strd r3, r4, [sp, #32] │ │ add r3, sp, #16 │ │ add r2, pc │ │ add r0, pc │ │ strd r6, r3, [sp, #68] @ 0x44 │ │ add r3, sp, #8 │ │ @@ -35335,37 +35528,37 @@ │ │ strd r5, r1, [sp, #52] @ 0x34 │ │ add r1, sp, #28 │ │ strd r2, r1, [sp, #44] @ 0x2c │ │ add r1, sp, #24 │ │ str r1, [sp, #40] @ 0x28 │ │ add r1, sp, #40 @ 0x28 │ │ mov r2, lr │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ mov ip, r3 │ │ - ldr r1, [pc, #88] @ (3fee4 ) │ │ + ldr r1, [pc, #88] @ (401ec ) │ │ add r3, sp, #16 │ │ - ldr r0, [pc, #88] @ (3fee8 ) │ │ - ldr r2, [pc, #92] @ (3feec ) │ │ + ldr r0, [pc, #88] @ (401f0 ) │ │ + ldr r2, [pc, #92] @ (401f4 ) │ │ add r1, pc │ │ add r0, pc │ │ str.w ip, [sp, #32] │ │ add r2, pc │ │ str r2, [sp, #60] @ 0x3c │ │ strd r2, r3, [sp, #52] @ 0x34 │ │ add r2, sp, #8 │ │ strd r1, r2, [sp, #44] @ 0x2c │ │ add r1, sp, #32 │ │ str r1, [sp, #40] @ 0x28 │ │ add r1, sp, #40 @ 0x28 │ │ mov r2, lr │ │ - bl 3fa58 │ │ - ldr r1, [pc, #60] @ (3fef0 ) │ │ + bl 3fd60 │ │ + ldr r1, [pc, #60] @ (401f8 ) │ │ add r5, sp, #16 │ │ - ldr r3, [pc, #60] @ (3fef4 ) │ │ - ldr r0, [pc, #60] @ (3fef8 ) │ │ + ldr r3, [pc, #60] @ (401fc ) │ │ + ldr r0, [pc, #60] @ (40200 ) │ │ add r1, pc │ │ str r5, [sp, #64] @ 0x40 │ │ add r5, sp, #8 │ │ add r3, pc │ │ str r5, [sp, #56] @ 0x38 │ │ add r5, sp, #4 │ │ str r5, [sp, #48] @ 0x30 │ │ @@ -35373,187 +35566,187 @@ │ │ add r0, pc │ │ str r1, [sp, #68] @ 0x44 │ │ str r1, [sp, #60] @ 0x3c │ │ str r3, [sp, #52] @ 0x34 │ │ strd r5, r3, [sp, #40] @ 0x28 │ │ add r1, sp, #40 @ 0x28 │ │ mov r2, lr │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ nop │ │ - cmp r5, #206 @ 0xce │ │ + cmp r2, #198 @ 0xc6 │ │ vtbx.8 d16, {d29-d30}, d17 │ │ movs r0, r0 │ │ - bl ffd9bee4 │ │ - strb r1, [r2, #16] │ │ + bl 41b1ec │ │ + strb r1, [r6, #5] │ │ movs r3, r0 │ │ - strb r7, [r5, #15] │ │ + strb r7, [r1, #5] │ │ movs r3, r0 │ │ lsrs r1, r6, #6 │ │ movs r0, r0 │ │ - str r3, [sp, #84] @ 0x54 │ │ - vsri.32 , , #4 │ │ + ldrh r7, [r6, #56] @ 0x38 │ │ + vsra.u64 d23, d27, #4 │ │ movs r3, r0 │ │ lsls r3, r7, #2 │ │ movs r0, r0 │ │ - bl 105f06 │ │ + bl 10620e │ │ lsrs r3, r2, #8 │ │ movs r0, r0 │ │ - ldr r2, [sp, #100] @ 0x64 │ │ + str r7, [sp, #976] @ 0x3d0 │ │ vsli.64 d27, d16, #60 @ 0x3c │ │ add r7, sp, #8 │ │ mov r5, r0 │ │ ldr r0, [r0, #0] │ │ mov r4, r1 │ │ - bl 3ff44 │ │ - cbnz r0, 3ff30 │ │ + bl 4024c │ │ + cbnz r0, 40238 │ │ ldrd r0, r1, [r4] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #20] @ (3ff40 ) │ │ + ldr r1, [pc, #20] @ (40248 ) │ │ add r1, pc │ │ blx r3 │ │ - cbz r0, 3ff34 │ │ + cbz r0, 4023c │ │ movs r0, #1 │ │ pop {r4, r5, r7, pc} │ │ ldr r0, [r5, #4] │ │ mov r1, r4 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w 3ff44 │ │ - str r2, [r5, #40] @ 0x28 │ │ + b.w 4024c │ │ + ldrsh r2, [r4, r6] │ │ vsli.64 d27, d16, #61 @ 0x3d │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ mov r4, r1 │ │ ldr r1, [r1, #8] │ │ lsls r2, r1, #6 │ │ - bmi.n 3ff70 │ │ + bmi.n 40278 │ │ lsls r1, r1, #5 │ │ - bmi.n 3ff8e │ │ + bmi.n 40296 │ │ sub.w r5, r7, #18 │ │ mov r1, r5 │ │ - bl 40458 │ │ + bl 40760 │ │ rsb r1, r0, #10 │ │ add r0, r5 │ │ movs r2, #1 │ │ movs r3, #0 │ │ strd r0, r1, [sp] │ │ - b.n 3ffbc │ │ - ldr r2, [pc, #84] @ (3ffc8 ) │ │ + b.n 402c4 │ │ + ldr r2, [pc, #84] @ (402d0 ) │ │ sub.w r1, r7, #18 │ │ movs r5, #7 │ │ add r2, pc │ │ mov r3, r5 │ │ and.w r5, r0, #15 │ │ lsrs r0, r0, #4 │ │ ldrb r5, [r2, r5] │ │ strb r5, [r1, r3] │ │ sub.w r5, r3, #1 │ │ - bne.n 3ff7a │ │ - b.n 3ffaa │ │ - ldr r2, [pc, #60] @ (3ffcc ) │ │ + bne.n 40282 │ │ + b.n 402b2 │ │ + ldr r2, [pc, #60] @ (402d4 ) │ │ sub.w r1, r7, #18 │ │ movs r5, #7 │ │ add r2, pc │ │ mov r3, r5 │ │ and.w r5, r0, #15 │ │ lsrs r0, r0, #4 │ │ ldrb r5, [r2, r5] │ │ strb r5, [r1, r3] │ │ sub.w r5, r3, #1 │ │ - bne.n 3ff98 │ │ + bne.n 402a0 │ │ adds r0, r3, #1 │ │ - ldr r2, [pc, #32] @ (3ffd0 ) │ │ + ldr r2, [pc, #32] @ (402d8 ) │ │ rsb r0, r0, #9 │ │ add r1, r3 │ │ add r2, pc │ │ movs r3, #2 │ │ strd r1, r0, [sp] │ │ mov r0, r4 │ │ movs r1, #1 │ │ - bl 3f0a0 │ │ + bl 3f3a8 │ │ add sp, #24 │ │ pop {r4, r5, r7, pc} │ │ - cmp r2, #148 @ 0x94 │ │ - @ instruction: 0xfffd2996 │ │ - vabs.s d23, d17 │ │ + movs r7, #140 @ 0x8c │ │ + vrsubhn.i d18, , q7 │ │ + vshr.u32 d23, d8, #3 │ │ vsli.64 , q8, #61 @ 0x3d │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ ldr.w sl, [r0, #8] │ │ mov r6, r2 │ │ mov r8, r1 │ │ tst.w sl, #402653184 @ 0x18000000 │ │ - beq.n 4008c │ │ + beq.n 40394 │ │ movs.w r1, sl, lsl #3 │ │ - bmi.n 40010 │ │ + bmi.n 40318 │ │ cmp r6, #16 │ │ - bcs.n 40050 │ │ + bcs.n 40358 │ │ movs r1, #0 │ │ - cbz r6, 4005e │ │ + cbz r6, 40366 │ │ mov r2, r8 │ │ mov r3, r6 │ │ ldrsb.w r5, [r2], #1 │ │ cmn.w r5, #65 @ 0x41 │ │ it gt │ │ addgt r1, #1 │ │ subs r3, #1 │ │ - bne.n 3fffe │ │ - b.n 4005e │ │ + bne.n 40306 │ │ + b.n 40366 │ │ ldrh.w ip, [r0, #14] │ │ cmp.w ip, #0 │ │ - beq.n 4007e │ │ + beq.n 40386 │ │ add.w r3, r8, r6 │ │ movs r6, #0 │ │ mov r4, r8 │ │ mov r2, ip │ │ - b.n 40036 │ │ + b.n 4033e │ │ cmp r1, #240 @ 0xf0 │ │ ite cs │ │ addcs r4, r5, #4 │ │ addcc r4, r5, #3 │ │ subs r1, r4, r5 │ │ subs r2, #1 │ │ add r6, r1 │ │ - beq.n 40080 │ │ + beq.n 40388 │ │ cmp r4, r3 │ │ - beq.n 40082 │ │ + beq.n 4038a │ │ mov r5, r4 │ │ ldrsb.w r1, [r4], #1 │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ - bgt.n 4002e │ │ + bgt.n 40336 │ │ uxtb r1, r1 │ │ cmp r1, #224 @ 0xe0 │ │ - bcs.n 40026 │ │ + bcs.n 4032e │ │ adds r4, r5, #2 │ │ - b.n 4002e │ │ + b.n 40336 │ │ mov r4, r0 │ │ mov r0, r8 │ │ mov r1, r6 │ │ - bl 3f290 │ │ + bl 3f598 │ │ mov r1, r0 │ │ mov r0, r4 │ │ ldrh r2, [r0, #12] │ │ cmp r1, r2 │ │ - bcs.n 4008c │ │ + bcs.n 40394 │ │ subs r3, r2, r1 │ │ ubfx r1, sl, #29, #2 │ │ bfc sl, #21, #11 │ │ mov.w fp, #0 │ │ tbb [pc, r1] │ │ lsls r1, r3, #8 │ │ adds r6, r2, r4 │ │ mov fp, r3 │ │ - b.n 400a8 │ │ + b.n 403b0 │ │ movs r6, #0 │ │ movs r2, #0 │ │ sub.w r1, ip, r2 │ │ ldrh r2, [r0, #12] │ │ cmp r1, r2 │ │ - bcc.n 40064 │ │ + bcc.n 4036c │ │ ldrd r0, r1, [r0] │ │ mov r2, r6 │ │ ldr r3, [r1, #12] │ │ mov r1, r8 │ │ add sp, #4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ @@ -35562,219 +35755,219 @@ │ │ mov.w fp, r1, lsr #1 │ │ ldrd r5, r4, [r0] │ │ mov.w r9, #0 │ │ str r3, [sp, #0] │ │ uxth.w r0, fp │ │ uxth.w r1, r9 │ │ cmp r1, r0 │ │ - bcs.n 400d0 │ │ + bcs.n 403d8 │ │ ldr r2, [r4, #16] │ │ mov r0, r5 │ │ mov r1, sl │ │ blx r2 │ │ add.w r9, r9, #1 │ │ cmp r0, #0 │ │ - beq.n 400b2 │ │ - b.n 400fc │ │ + beq.n 403ba │ │ + b.n 40404 │ │ ldr r3, [r4, #12] │ │ mov r0, r5 │ │ mov r1, r8 │ │ mov r2, r6 │ │ blx r3 │ │ - cbnz r0, 400fc │ │ + cbnz r0, 40404 │ │ ldr r0, [sp, #0] │ │ movs r6, #0 │ │ sub.w r0, r0, fp │ │ uxth.w r8, r0 │ │ uxth r0, r6 │ │ cmp r0, r8 │ │ - bcs.n 40106 │ │ + bcs.n 4040e │ │ ldr r2, [r4, #16] │ │ mov r0, r5 │ │ mov r1, sl │ │ blx r2 │ │ adds r6, #1 │ │ cmp r0, #0 │ │ - beq.n 400e8 │ │ + beq.n 403f0 │ │ movs r0, #1 │ │ add sp, #4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #0 │ │ add sp, #4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrb r0, [r0, #0] │ │ mov r2, r1 │ │ - cbz r0, 40122 │ │ - ldr r1, [pc, #28] @ (40134 ) │ │ + cbz r0, 4042a │ │ + ldr r1, [pc, #28] @ (4043c ) │ │ mov r0, r2 │ │ movs r2, #4 │ │ add r1, pc │ │ - b.w 3ffd4 │ │ - ldr r1, [pc, #12] @ (40130 ) │ │ + b.w 402dc │ │ + ldr r1, [pc, #12] @ (40438 ) │ │ mov r0, r2 │ │ movs r2, #5 │ │ add r1, pc │ │ - b.w 3ffd4 │ │ + b.w 402dc │ │ nop │ │ - strb r5, [r3, #6] │ │ - vceq.i d22, d16, #0 │ │ + ldr r4, [r2, #104] @ 0x68 │ │ + vcvt.f32.u32 d21, d8, #3 │ │ vtbl.8 d22, {d13}, d2 │ │ ldrb r3, [r1, #11] │ │ tst.w r3, #24 │ │ - beq.n 40158 │ │ + beq.n 40460 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ movs r0, #0 │ │ cmp r2, #128 @ 0x80 │ │ str r0, [sp, #4] │ │ - bcs.n 40162 │ │ + bcs.n 4046a │ │ strb.w r2, [sp, #4] │ │ movs r2, #1 │ │ - b.n 401ca │ │ + b.n 404d2 │ │ ldrd r0, r1, [r1] │ │ ldr r3, [r1, #16] │ │ mov r1, r2 │ │ bx r3 │ │ movw ip, #65534 @ 0xfffe │ │ mov r3, r2 │ │ movt ip, #1023 @ 0x3ff │ │ lsrs r0, r2, #6 │ │ bfi r3, ip, #6, #26 │ │ cmp.w r2, #2048 @ 0x800 │ │ - bcs.n 40188 │ │ + bcs.n 40490 │ │ orr.w r0, r0, #192 @ 0xc0 │ │ strb.w r3, [sp, #5] │ │ strb.w r0, [sp, #4] │ │ movs r2, #2 │ │ - b.n 401ca │ │ + b.n 404d2 │ │ bfi r0, ip, #6, #26 │ │ mov.w lr, r2, lsr #12 │ │ movs r4, #0 │ │ cmp.w r4, r2, lsr #16 │ │ - bne.n 401ac │ │ + bne.n 404b4 │ │ strb.w r0, [sp, #5] │ │ orr.w r0, lr, #224 @ 0xe0 │ │ strb.w r3, [sp, #6] │ │ movs r2, #3 │ │ strb.w r0, [sp, #4] │ │ - b.n 401ca │ │ + b.n 404d2 │ │ mvn.w r4, #15 │ │ orr.w r2, r4, r2, lsr #18 │ │ strb.w r2, [sp, #4] │ │ movs r2, #4 │ │ bfi lr, ip, #6, #26 │ │ strb.w r3, [sp, #7] │ │ strb.w r0, [sp, #6] │ │ strb.w lr, [sp, #5] │ │ add r3, sp, #4 │ │ mov r0, r1 │ │ mov r1, r3 │ │ - bl 3ffd4 │ │ + bl 402dc │ │ add sp, #8 │ │ pop {r4, r6, r7, pc} │ │ push {r4, r5, r6, lr} │ │ cmp r2, #8 │ │ - bcs.n 40224 │ │ + bcs.n 4052c │ │ ldrb r3, [r1, #0] │ │ cmp r3, #0 │ │ - beq.n 4029a │ │ + beq.n 405a2 │ │ cmp r2, #1 │ │ - beq.n 40292 │ │ + beq.n 4059a │ │ ldrb r3, [r1, #1] │ │ cmp r3, #0 │ │ - beq.n 402a6 │ │ + beq.n 405ae │ │ cmp r2, #2 │ │ - beq.n 40292 │ │ + beq.n 4059a │ │ ldrb r3, [r1, #2] │ │ cmp r3, #0 │ │ - beq.n 402ac │ │ + beq.n 405b4 │ │ cmp r2, #3 │ │ - beq.n 40292 │ │ + beq.n 4059a │ │ ldrb r3, [r1, #3] │ │ cmp r3, #0 │ │ - beq.n 402b2 │ │ + beq.n 405ba │ │ cmp r2, #4 │ │ - beq.n 40292 │ │ + beq.n 4059a │ │ ldrb r3, [r1, #4] │ │ cmp r3, #0 │ │ - beq.n 402b8 │ │ + beq.n 405c0 │ │ cmp r2, #5 │ │ - beq.n 40292 │ │ + beq.n 4059a │ │ ldrb r3, [r1, #5] │ │ cmp r3, #0 │ │ - beq.n 402be │ │ + beq.n 405c6 │ │ cmp r2, #6 │ │ - beq.n 40292 │ │ + beq.n 4059a │ │ ldrb r3, [r1, #6] │ │ - cbnz r3, 40292 │ │ + cbnz r3, 4059a │ │ mov.w ip, #6 │ │ - b.n 402c2 │ │ + b.n 405ca │ │ adds r3, r1, #3 │ │ bic.w r3, r3, #3 │ │ subs r4, r3, r1 │ │ - bne.n 40260 │ │ + bne.n 40568 │ │ sub.w ip, r2, #8 │ │ movs r4, #0 │ │ movw lr, #256 @ 0x100 │ │ movt lr, #257 @ 0x101 │ │ adds r5, r1, r4 │ │ ldr r3, [r1, r4] │ │ ldr r5, [r5, #4] │ │ sub.w r6, lr, r3 │ │ orrs r3, r6 │ │ sub.w r6, lr, r5 │ │ orrs r5, r6 │ │ ands r3, r5 │ │ mvns r3, r3 │ │ tst.w r3, #2155905152 @ 0x80808080 │ │ - bne.n 4027a │ │ + bne.n 40582 │ │ adds r4, #8 │ │ cmp r4, ip │ │ - bls.n 4023c │ │ - b.n 4027a │ │ + bls.n 40544 │ │ + b.n 40582 │ │ mov.w ip, #0 │ │ ldrb.w r3, [r1, ip] │ │ - cbz r3, 402c2 │ │ + cbz r3, 405ca │ │ add.w ip, ip, #1 │ │ cmp r4, ip │ │ - bne.n 40264 │ │ + bne.n 4056c │ │ sub.w ip, r2, #8 │ │ cmp r4, ip │ │ - bls.n 40234 │ │ + bls.n 4053c │ │ subs.w ip, r2, r4 │ │ - beq.n 40292 │ │ + beq.n 4059a │ │ add.w lr, r1, r4 │ │ movs r3, #0 │ │ ldrb.w r5, [lr, r3] │ │ - cbz r5, 402a0 │ │ + cbz r5, 405a8 │ │ adds r3, #1 │ │ cmp ip, r3 │ │ - bne.n 40286 │ │ + bne.n 4058e │ │ movs r1, #1 │ │ strd r1, r1, [r0] │ │ pop {r4, r5, r6, pc} │ │ mov.w ip, #0 │ │ - b.n 402c2 │ │ + b.n 405ca │ │ add.w ip, r3, r4 │ │ - b.n 402c2 │ │ + b.n 405ca │ │ mov.w ip, #1 │ │ - b.n 402c2 │ │ + b.n 405ca │ │ mov.w ip, #2 │ │ - b.n 402c2 │ │ + b.n 405ca │ │ mov.w ip, #3 │ │ - b.n 402c2 │ │ + b.n 405ca │ │ mov.w ip, #4 │ │ - b.n 402c2 │ │ + b.n 405ca │ │ mov.w ip, #5 │ │ add.w r3, ip, #1 │ │ cmp r3, r2 │ │ - bne.n 402d4 │ │ + bne.n 405dc │ │ strd r1, r2, [r0, #4] │ │ movs r1, #0 │ │ str r1, [r0, #0] │ │ pop {r4, r5, r6, pc} │ │ movs r1, #0 │ │ strd r1, ip, [r0, #4] │ │ movs r1, #1 │ │ @@ -35783,166 +35976,166 @@ │ │ push {r4, r5, r6, r7, lr} │ │ str.w r8, [sp, #-4]! │ │ subs.w ip, r2, #7 │ │ mov r8, r0 │ │ it cc │ │ movcc.w ip, #0 │ │ cmp r2, #0 │ │ - beq.w 40420 │ │ + beq.w 40728 │ │ adds r3, r1, #3 │ │ - ldr r0, [pc, #344] @ (40454 ) │ │ + ldr r0, [pc, #344] @ (4075c ) │ │ bic.w r3, r3, #3 │ │ sub.w lr, r3, r1 │ │ add r0, pc │ │ movs r3, #0 │ │ - b.n 40312 │ │ + b.n 4061a │ │ adds r3, r5, #1 │ │ cmp r3, r2 │ │ - bcs.w 40420 │ │ + bcs.w 40728 │ │ ldrsb r5, [r1, r3] │ │ cmp r5, #0 │ │ - bmi.n 4034a │ │ + bmi.n 40652 │ │ sub.w r5, lr, r3 │ │ lsls r5, r5, #30 │ │ - beq.n 40326 │ │ + beq.n 4062e │ │ adds r3, #1 │ │ - b.n 4030c │ │ + b.n 40614 │ │ adds r3, #8 │ │ cmp r3, ip │ │ - bcs.n 40338 │ │ + bcs.n 40640 │ │ adds r6, r1, r3 │ │ ldr r5, [r1, r3] │ │ ldr r6, [r6, #4] │ │ orrs r5, r6 │ │ tst.w r5, #2155905152 @ 0x80808080 │ │ - beq.n 40324 │ │ + beq.n 4062c │ │ cmp r3, r2 │ │ - bcs.n 4030c │ │ + bcs.n 40614 │ │ ldrsb r5, [r1, r3] │ │ cmp r5, #0 │ │ - bmi.n 4030c │ │ + bmi.n 40614 │ │ adds r3, #1 │ │ cmp r2, r3 │ │ - bne.n 4033c │ │ - b.n 40420 │ │ + bne.n 40644 │ │ + b.n 40728 │ │ uxtb r5, r5 │ │ ldrb r6, [r0, r5] │ │ cmp r6, #4 │ │ - beq.n 40384 │ │ + beq.n 4068c │ │ cmp r6, #3 │ │ - beq.n 4036a │ │ + beq.n 40672 │ │ cmp r6, #2 │ │ - bne.n 40434 │ │ + bne.n 4073c │ │ adds r5, r3, #1 │ │ cmp r5, r2 │ │ - bcs.n 40430 │ │ + bcs.n 40738 │ │ ldrsb r6, [r1, r5] │ │ cmn.w r6, #65 @ 0x41 │ │ - ble.n 4030a │ │ - b.n 40434 │ │ + ble.n 40612 │ │ + b.n 4073c │ │ adds r6, r3, #1 │ │ cmp r6, r2 │ │ - bcs.n 40430 │ │ + bcs.n 40738 │ │ ldrb r6, [r1, r6] │ │ cmp r5, #224 @ 0xe0 │ │ - beq.n 4039e │ │ + beq.n 406a6 │ │ sxtb r6, r6 │ │ cmp r5, #237 @ 0xed │ │ - bne.n 403b2 │ │ + bne.n 406ba │ │ cmn.w r6, #97 @ 0x61 │ │ - ble.n 4040a │ │ - b.n 40434 │ │ + ble.n 40712 │ │ + b.n 4073c │ │ adds r6, r3, #1 │ │ cmp r6, r2 │ │ - bcs.n 40430 │ │ + bcs.n 40738 │ │ ldrb r6, [r1, r6] │ │ cmp r5, #240 @ 0xf0 │ │ - beq.n 403a8 │ │ + beq.n 406b0 │ │ sxtb r6, r6 │ │ cmp r5, #244 @ 0xf4 │ │ - bne.n 403c2 │ │ + bne.n 406ca │ │ cmn.w r6, #113 @ 0x71 │ │ - ble.n 403d6 │ │ - b.n 40434 │ │ + ble.n 406de │ │ + b.n 4073c │ │ and.w r4, r6, #224 @ 0xe0 │ │ cmp r4, #160 @ 0xa0 │ │ - beq.n 4040a │ │ - b.n 40434 │ │ + beq.n 40712 │ │ + b.n 4073c │ │ sub.w r4, r6, #144 @ 0x90 │ │ cmp r4, #48 @ 0x30 │ │ - bcc.n 403d6 │ │ - b.n 40434 │ │ + bcc.n 406de │ │ + b.n 4073c │ │ sub.w r4, r5, #225 @ 0xe1 │ │ cmp r4, #12 │ │ - bcs.n 403f6 │ │ + bcs.n 406fe │ │ cmn.w r6, #64 @ 0x40 │ │ - blt.n 4040a │ │ - b.n 40434 │ │ + blt.n 40712 │ │ + b.n 4073c │ │ sub.w r4, r5, #241 @ 0xf1 │ │ movs r5, #1 │ │ cmp r4, #2 │ │ - bhi.n 40436 │ │ + bhi.n 4073e │ │ cmn.w r6, #64 @ 0x40 │ │ mov.w r6, #1 │ │ - bge.n 40438 │ │ + bge.n 40740 │ │ adds r5, r3, #2 │ │ cmp r5, r2 │ │ - bcs.n 40430 │ │ + bcs.n 40738 │ │ ldrsb r4, [r1, r5] │ │ cmn.w r4, #65 @ 0x41 │ │ - bgt.n 4041a │ │ + bgt.n 40722 │ │ adds r5, r3, #3 │ │ cmp r5, r2 │ │ - bcs.n 40430 │ │ + bcs.n 40738 │ │ ldrsb r4, [r1, r5] │ │ cmn.w r4, #64 @ 0x40 │ │ - blt.w 4030a │ │ - b.n 4044e │ │ + blt.w 40612 │ │ + b.n 40756 │ │ and.w r4, r5, #254 @ 0xfe │ │ movs r5, #1 │ │ cmp r4, #238 @ 0xee │ │ - bne.n 40436 │ │ + bne.n 4073e │ │ cmn.w r6, #64 @ 0x40 │ │ mov.w r6, #1 │ │ - bge.n 40438 │ │ + bge.n 40740 │ │ adds r5, r3, #2 │ │ cmp r5, r2 │ │ - bcs.n 40430 │ │ + bcs.n 40738 │ │ ldrsb r4, [r1, r5] │ │ cmn.w r4, #65 @ 0x41 │ │ - ble.w 4030a │ │ + ble.w 40612 │ │ movs r6, #1 │ │ movs r5, #2 │ │ - b.n 40438 │ │ + b.n 40740 │ │ strd r1, r2, [r8, #4] │ │ movs r1, #0 │ │ str.w r1, [r8] │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r6, #0 │ │ - b.n 40438 │ │ + b.n 40740 │ │ movs r5, #1 │ │ movs r6, #1 │ │ uxtb r0, r5 │ │ movs r1, #1 │ │ orr.w r0, r6, r0, lsl #8 │ │ strd r3, r0, [r8, #4] │ │ str.w r1, [r8] │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r6, #1 │ │ movs r5, #3 │ │ - b.n 40438 │ │ - movs r7, #54 @ 0x36 │ │ + b.n 40740 │ │ + movs r4, #46 @ 0x2e │ │ vsli.32 , q8, #29 │ │ - ldr r5, [pc, #212] @ (40530 ) │ │ + ldr r5, [pc, #212] @ (40838 ) │ │ lsrs r2, r0, #3 │ │ cmp r2, #124 @ 0x7c │ │ add r5, pc │ │ - bls.n 404e6 │ │ + bls.n 407ee │ │ movw r2, #5977 @ 0x1759 │ │ movw ip, #10000 @ 0x2710 │ │ movt r2, #53687 @ 0xd1b7 │ │ movw lr, #5243 @ 0x147b │ │ umull r2, r3, r0, r2 │ │ lsrs r3, r3, #13 │ │ mls r4, r3, ip, r0 │ │ @@ -35956,15 +36149,15 @@ │ │ strh r6, [r1, #6] │ │ uxth r4, r4 │ │ ldrh.w r4, [r5, r4, lsl #1] │ │ strh r4, [r1, #8] │ │ movw r4, #38527 @ 0x967f │ │ movt r4, #152 @ 0x98 │ │ cmp r0, r4 │ │ - bls.n 4050e │ │ + bls.n 40816 │ │ movw r4, #36281 @ 0x8db9 │ │ movt r4, #6 │ │ umull r4, r6, r3, r4 │ │ mls r3, r6, ip, r3 │ │ mul.w r6, r3, lr │ │ lsrs r6, r6, #19 │ │ mls r2, r6, r2, r3 │ │ @@ -35975,72 +36168,72 @@ │ │ strh r3, [r1, #2] │ │ uxth r2, r2 │ │ ldrh.w r2, [r5, r2, lsl #1] │ │ lsrs r3, r4, #25 │ │ strh r2, [r1, #4] │ │ movs r2, #2 │ │ cmp r3, #9 │ │ - bhi.n 404ee │ │ - b.n 40514 │ │ + bhi.n 407f6 │ │ + b.n 4081c │ │ movs r2, #10 │ │ mov r3, r0 │ │ cmp r3, #9 │ │ - bls.n 40514 │ │ + bls.n 4081c │ │ uxth r6, r3 │ │ movw r4, #5243 @ 0x147b │ │ lsrs r6, r6, #2 │ │ subs r2, #2 │ │ muls r6, r4 │ │ lsrs r4, r6, #17 │ │ movs r6, #100 @ 0x64 │ │ mls r3, r4, r6, r3 │ │ uxth r3, r3 │ │ ldrh.w r3, [r5, r3, lsl #1] │ │ strh r3, [r1, r2] │ │ - cbnz r0, 40518 │ │ - b.n 4051e │ │ + cbnz r0, 40820 │ │ + b.n 40826 │ │ movs r2, #6 │ │ cmp r3, #9 │ │ - bhi.n 404ee │ │ + bhi.n 407f6 │ │ mov r4, r3 │ │ - cbz r0, 4051e │ │ - cbnz r4, 4051e │ │ + cbz r0, 40826 │ │ + cbnz r4, 40826 │ │ mov r0, r2 │ │ pop {r4, r5, r6, pc} │ │ and.w r0, r4, #15 │ │ subs r2, #1 │ │ add.w r0, r5, r0, lsl #1 │ │ ldrb r0, [r0, #1] │ │ strb r0, [r1, r2] │ │ mov r0, r2 │ │ pop {r4, r5, r6, pc} │ │ - lsls r4, r3, #11 │ │ - vsli.64 , q8, #62 @ 0x3e │ │ + @ instruction: 0xffd4fffd │ │ + push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ mov r6, r0 │ │ lsrs r0, r0, #3 │ │ orr.w r0, r0, r1, lsl #29 │ │ mov r9, r2 │ │ mov r5, r1 │ │ mov.w r8, #0 │ │ rsbs r0, r0, #124 @ 0x7c │ │ sbcs.w r0, r8, r1, lsr #3 │ │ - bcs.w 406ca │ │ + bcs.w 409d2 │ │ mov r0, r6 │ │ mov r1, r5 │ │ movw r2, #10000 @ 0x2710 │ │ movs r3, #0 │ │ movw r4, #10000 @ 0x2710 │ │ - bl d53d0 │ │ + bl d53dc │ │ mls r2, r0, r4, r6 │ │ movw sl, #5243 @ 0x147b │ │ mov.w fp, #100 @ 0x64 │ │ - ldr r4, [pc, #508] @ (40778 ) │ │ + ldr r4, [pc, #508] @ (40a80 ) │ │ add r4, pc │ │ uxth r3, r2 │ │ lsrs r3, r3, #2 │ │ mul.w r3, r3, sl │ │ lsrs r3, r3, #17 │ │ mls r2, r3, fp, r2 │ │ ldrh.w r3, [r4, r3, lsl #1] │ │ @@ -36048,86 +36241,86 @@ │ │ uxth r2, r2 │ │ ldrh.w r2, [r4, r2, lsl #1] │ │ strh.w r2, [r9, #18] │ │ movw r2, #38527 @ 0x967f │ │ movt r2, #152 @ 0x98 │ │ subs r2, r2, r6 │ │ sbcs.w r2, r8, r5 │ │ - bcs.w 406dc │ │ + bcs.w 409e4 │ │ movw r2, #10000 @ 0x2710 │ │ movs r3, #0 │ │ - bl d53d0 │ │ + bl d53dc │ │ mul.w r0, r2, sl │ │ movs r3, #0 │ │ lsrs r0, r0, #19 │ │ mls r1, r0, fp, r2 │ │ ldrh.w r0, [r4, r0, lsl #1] │ │ movw r2, #57600 @ 0xe100 │ │ strh.w r0, [r9, #12] │ │ movt r2, #1525 @ 0x5f5 │ │ mov r0, r6 │ │ uxth r1, r1 │ │ ldrh.w r1, [r4, r1, lsl #1] │ │ strh.w r1, [r9, #14] │ │ mov r1, r5 │ │ - bl d53d0 │ │ + bl d53dc │ │ movw r2, #59392 @ 0xe800 │ │ movt r2, #18550 @ 0x4876 │ │ subs r2, r6, r2 │ │ sbcs.w r2, r5, #23 │ │ - bcc.n 406ea │ │ + bcc.n 409f2 │ │ movw r2, #10000 @ 0x2710 │ │ movs r3, #0 │ │ - bl d53d0 │ │ + bl d53dc │ │ mul.w r0, r2, sl │ │ movs r3, #232 @ 0xe8 │ │ lsrs r0, r0, #19 │ │ mls r1, r0, fp, r2 │ │ ldrh.w r0, [r4, r0, lsl #1] │ │ movw r2, #4096 @ 0x1000 │ │ strh.w r0, [r9, #8] │ │ movt r2, #54437 @ 0xd4a5 │ │ mov r0, r6 │ │ uxth r1, r1 │ │ ldrh.w r1, [r4, r1, lsl #1] │ │ strh.w r1, [r9, #10] │ │ mov r1, r5 │ │ - bl d53d0 │ │ + bl d53dc │ │ movw r3, #32768 @ 0x8000 │ │ movw r2, #36222 @ 0x8d7e │ │ movt r3, #42182 @ 0xa4c6 │ │ movt r2, #3 │ │ subs r3, r6, r3 │ │ sbcs.w r2, r5, r2 │ │ - bcc.n 406f8 │ │ + bcc.n 40a00 │ │ movw r2, #10000 @ 0x2710 │ │ movs r3, #0 │ │ - bl d53d0 │ │ + bl d53dc │ │ mul.w r0, r2, sl │ │ movw r3, #34546 @ 0x86f2 │ │ movt r3, #35 @ 0x23 │ │ lsrs r0, r0, #19 │ │ mls r1, r0, fp, r2 │ │ ldrh.w r0, [r4, r0, lsl #1] │ │ movs r2, #0 │ │ strh.w r0, [r9, #4] │ │ movt r2, #28609 @ 0x6fc1 │ │ mov r0, r6 │ │ uxth r1, r1 │ │ ldrh.w r1, [r4, r1, lsl #1] │ │ strh.w r1, [r9, #6] │ │ mov r1, r5 │ │ - bl d53d0 │ │ + bl d53dc │ │ movs r3, #0 │ │ movw r2, #8964 @ 0x2304 │ │ movt r3, #35304 @ 0x89e8 │ │ movt r2, #35527 @ 0x8ac7 │ │ subs r3, r6, r3 │ │ sbcs.w r2, r5, r2 │ │ - bcc.n 40730 │ │ + bcc.n 40a38 │ │ uxth r1, r0 │ │ movw r2, #5243 @ 0x147b │ │ lsrs r1, r1, #2 │ │ movs r3, #0 │ │ muls r1, r2 │ │ movs r2, #100 @ 0x64 │ │ lsrs r1, r1, #17 │ │ @@ -36136,149 +36329,149 @@ │ │ strh.w r1, [r9] │ │ movs r1, #0 │ │ movs r2, #0 │ │ uxth r0, r0 │ │ ldrh.w r0, [r4, r0, lsl #1] │ │ strh.w r0, [r9, #2] │ │ orrs.w r0, r6, r5 │ │ - bne.n 40744 │ │ - b.n 40754 │ │ + bne.n 40a4c │ │ + b.n 40a5c │ │ movs r2, #20 │ │ mov r0, r6 │ │ mov r1, r5 │ │ rsbs r3, r0, #9 │ │ sbcs.w r3, r8, r1 │ │ - bcc.n 40704 │ │ - b.n 4073c │ │ + bcc.n 40a0c │ │ + b.n 40a44 │ │ movs r2, #16 │ │ rsbs r3, r0, #9 │ │ sbcs.w r3, r8, r1 │ │ - bcc.n 40704 │ │ - b.n 4073c │ │ + bcc.n 40a0c │ │ + b.n 40a44 │ │ movs r2, #12 │ │ rsbs r3, r0, #9 │ │ sbcs.w r3, r8, r1 │ │ - bcc.n 40704 │ │ - b.n 4073c │ │ + bcc.n 40a0c │ │ + b.n 40a44 │ │ movs r2, #8 │ │ rsbs r3, r0, #9 │ │ sbcs.w r3, r8, r1 │ │ - bcs.n 4073c │ │ + bcs.n 40a44 │ │ uxth r1, r0 │ │ movw r3, #5243 @ 0x147b │ │ lsrs r1, r1, #2 │ │ subs r2, #2 │ │ muls r1, r3 │ │ lsrs r3, r1, #17 │ │ movs r1, #100 @ 0x64 │ │ mls r0, r3, r1, r0 │ │ - ldr r1, [pc, #96] @ (4077c ) │ │ + ldr r1, [pc, #96] @ (40a84 ) │ │ add r1, pc │ │ uxth r0, r0 │ │ ldrh.w r0, [r1, r0, lsl #1] │ │ movs r1, #0 │ │ strh.w r0, [r9, r2] │ │ orrs.w r0, r6, r5 │ │ - bne.n 40744 │ │ - b.n 40754 │ │ + bne.n 40a4c │ │ + b.n 40a5c │ │ movs r2, #4 │ │ rsbs r3, r0, #9 │ │ sbcs.w r3, r8, r1 │ │ - bcc.n 40704 │ │ + bcc.n 40a0c │ │ mov r3, r0 │ │ orrs.w r0, r6, r5 │ │ - beq.n 40754 │ │ + beq.n 40a5c │ │ orrs.w r0, r3, r1 │ │ - bne.n 40754 │ │ + bne.n 40a5c │ │ mov r0, r2 │ │ add sp, #4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #28] @ (40774 ) │ │ + ldr r0, [pc, #28] @ (40a7c ) │ │ and.w r1, r3, #15 │ │ subs r2, #1 │ │ add r0, pc │ │ add.w r0, r0, r1, lsl #1 │ │ ldrb r0, [r0, #1] │ │ strb.w r0, [r9, r2] │ │ mov r0, r2 │ │ add sp, #4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - @ instruction: 0xffe0fffd │ │ - lsls r2, r0, #7 │ │ - vaddl.u q8, d14, d18 │ │ - vabal.u , d30, d0 │ │ + ldc2l 15, cr15, [r8], {253} @ 0xfd │ │ + mrc2 15, 5, pc, cr10, cr13, {7} │ │ + ldc2 15, cr15, [sl, #-1012] @ 0xfffffc0c │ │ + push {r7, lr} │ │ mov r7, sp │ │ sub sp, #16 │ │ - ldr r3, [pc, #96] @ (407e8 ) │ │ + ldr r3, [pc, #96] @ (40af0 ) │ │ mov ip, r1 │ │ uxtb r1, r0 │ │ cmp r1, #10 │ │ add r3, pc │ │ - bcc.n 407b0 │ │ + bcc.n 40ab8 │ │ movs r2, #41 @ 0x29 │ │ muls r1, r2 │ │ movs r2, #100 @ 0x64 │ │ lsrs r1, r1, #12 │ │ mls r2, r1, r2, r0 │ │ uxtb r2, r2 │ │ ldrh.w r2, [r3, r2, lsl #1] │ │ strh.w r2, [r7, #-2] │ │ movs r2, #1 │ │ lsls r0, r0, #24 │ │ - bne.n 407b8 │ │ - b.n 407bc │ │ + bne.n 40ac0 │ │ + b.n 40ac4 │ │ movs r2, #3 │ │ mov r1, r0 │ │ lsls r0, r0, #24 │ │ - beq.n 407bc │ │ + beq.n 40ac4 │ │ lsls r0, r1, #24 │ │ - beq.n 407cc │ │ + beq.n 40ad4 │ │ and.w r0, r1, #127 @ 0x7f │ │ subs r2, #1 │ │ subs r1, r7, #3 │ │ add.w r0, r3, r0, lsl #1 │ │ ldrb r0, [r0, #1] │ │ strb r0, [r1, r2] │ │ subs r1, r7, #3 │ │ rsb r0, r2, #3 │ │ add r1, r2 │ │ movs r2, #1 │ │ strd r1, r0, [sp] │ │ mov r0, ip │ │ movs r1, #1 │ │ movs r3, #0 │ │ - bl 3f0a0 │ │ + bl 3f3a8 │ │ add sp, #16 │ │ pop {r7, pc} │ │ - @ instruction: 0xffaefffd │ │ + stc2 15, cr15, [r6], #1012 @ 0x3f4 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #24 │ │ ldr r6, [r0, #0] │ │ sub.w r5, r7, #26 │ │ mov r4, r1 │ │ mov r1, r5 │ │ cmp r6, #0 │ │ mov r0, r6 │ │ it mi │ │ negmi r0, r6 │ │ - bl 40458 │ │ + bl 40760 │ │ rsb r1, r0, #10 │ │ add r0, r5 │ │ movs r2, #1 │ │ movs r3, #0 │ │ strd r0, r1, [sp] │ │ mvns r0, r6 │ │ lsrs r1, r0, #31 │ │ mov r0, r4 │ │ - bl 3f0a0 │ │ + bl 3f3a8 │ │ add sp, #24 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #32 │ │ @@ -36286,197 +36479,197 @@ │ │ mov r4, r1 │ │ add r5, sp, #12 │ │ eor.w r1, r6, r6, asr #31 │ │ eor.w r0, r0, r6, asr #31 │ │ subs.w r0, r0, r6, asr #31 │ │ mov r2, r5 │ │ sbc.w r1, r1, r6, asr #31 │ │ - bl 40534 │ │ + bl 4083c │ │ rsb r1, r0, #20 │ │ add r0, r5 │ │ movs r2, #1 │ │ movs r3, #0 │ │ strd r0, r1, [sp] │ │ mvns r0, r6 │ │ lsrs r1, r0, #31 │ │ mov r0, r4 │ │ - bl 3f0a0 │ │ + bl 3f3a8 │ │ add sp, #32 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ ldr r0, [r0, #0] │ │ sub.w r5, r7, #18 │ │ mov r4, r1 │ │ mov r1, r5 │ │ - bl 40458 │ │ + bl 40760 │ │ rsb r1, r0, #10 │ │ add r0, r5 │ │ movs r2, #1 │ │ movs r3, #0 │ │ strd r0, r1, [sp] │ │ mov r0, r4 │ │ movs r1, #1 │ │ - bl 3f0a0 │ │ + bl 3f3a8 │ │ add sp, #24 │ │ pop {r4, r5, r7, pc} │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #32 │ │ mov r4, r1 │ │ add r5, sp, #12 │ │ ldrd r0, r1, [r0] │ │ mov r2, r5 │ │ - bl 40534 │ │ + bl 4083c │ │ rsb r1, r0, #20 │ │ add r0, r5 │ │ movs r2, #1 │ │ movs r3, #0 │ │ strd r0, r1, [sp] │ │ mov r0, r4 │ │ movs r1, #1 │ │ - bl 3f0a0 │ │ + bl 3f3a8 │ │ add sp, #32 │ │ pop {r4, r5, r7, pc} │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ - ldr r4, [pc, #60] @ (40914 ) │ │ + ldr r4, [pc, #60] @ (40c1c ) │ │ uxtb r2, r0 │ │ sub.w r0, r7, #10 │ │ mov ip, r1 │ │ add r4, pc │ │ movs r1, #1 │ │ mov r3, r1 │ │ and.w r1, r2, #15 │ │ lsrs r2, r2, #4 │ │ ldrb r1, [r4, r1] │ │ strb r1, [r0, r3] │ │ sub.w r1, r3, #1 │ │ - bne.n 408e4 │ │ + bne.n 40bec │ │ adds r1, r3, #1 │ │ - ldr r2, [pc, #28] @ (40918 ) │ │ + ldr r2, [pc, #28] @ (40c20 ) │ │ rsb r1, r1, #3 │ │ add r0, r3 │ │ add r2, pc │ │ movs r3, #2 │ │ strd r0, r1, [sp] │ │ mov r0, ip │ │ movs r1, #1 │ │ - bl 3f0a0 │ │ + bl 3f3a8 │ │ add sp, #16 │ │ pop {r4, r6, r7, pc} │ │ - movs r1, #44 @ 0x2c │ │ - @ instruction: 0xfffd69d5 │ │ + subs r4, r4, #0 │ │ + vmlsl.u q11, d29, d12[0] │ │ vsli.64 , q0, #61 @ 0x3d │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ ldrb r2, [r0, #0] │ │ sub.w r0, r7, #10 │ │ - ldr r4, [pc, #52] @ (40960 ) │ │ + ldr r4, [pc, #52] @ (40c68 ) │ │ mov ip, r1 │ │ movs r1, #1 │ │ add r4, pc │ │ mov r3, r1 │ │ and.w r1, r2, #15 │ │ lsrs r2, r2, #4 │ │ ldrb r1, [r4, r1] │ │ strb r1, [r0, r3] │ │ sub.w r1, r3, #1 │ │ - bne.n 40930 │ │ + bne.n 40c38 │ │ adds r1, r3, #1 │ │ - ldr r2, [pc, #28] @ (40964 ) │ │ + ldr r2, [pc, #28] @ (40c6c ) │ │ rsb r1, r1, #3 │ │ add r0, r3 │ │ add r2, pc │ │ movs r3, #2 │ │ strd r0, r1, [sp] │ │ mov r0, ip │ │ movs r1, #1 │ │ - bl 3f0a0 │ │ + bl 3f3a8 │ │ add sp, #16 │ │ pop {r4, r6, r7, pc} │ │ - subs r6, r7, #7 │ │ - vtbl.8 d22, {d29-d30}, d9 │ │ + adds r6, r6, #3 │ │ + vrsubhn.i d22, , q0 │ │ vsli.64 , q0, #61 @ 0x3d │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ mov ip, r2 │ │ - ldr r2, [pc, #72] @ (409bc ) │ │ + ldr r2, [pc, #72] @ (40cc4 ) │ │ add.w lr, sp, #8 │ │ movs r4, #15 │ │ add r2, pc │ │ mov r3, r4 │ │ and.w r4, r0, #15 │ │ lsrs r0, r0, #4 │ │ ldrb r4, [r2, r4] │ │ orr.w r0, r0, r1, lsl #28 │ │ strb.w r4, [lr, r3] │ │ orrs.w r4, r0, r1, lsr #4 │ │ sub.w r4, r3, #1 │ │ mov.w r1, r1, lsr #4 │ │ - bne.n 4097a │ │ + bne.n 40c82 │ │ adds r0, r3, #1 │ │ - ldr r2, [pc, #32] @ (409c0 ) │ │ + ldr r2, [pc, #32] @ (40cc8 ) │ │ rsb r0, r0, #17 │ │ add.w r1, lr, r3 │ │ add r2, pc │ │ movs r3, #2 │ │ strd r1, r0, [sp] │ │ mov r0, ip │ │ movs r1, #1 │ │ - bl 3f0a0 │ │ + bl 3f3a8 │ │ add sp, #24 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ - movs r0, #148 @ 0x94 │ │ - vtbl.8 d22, {d13-d14}, d31 │ │ + adds r4, r1, #6 │ │ + vclt.f d22, d22, #0 │ │ vcle.f d27, d0, #0 │ │ mov r7, sp │ │ mov r2, r0 │ │ - ldr r0, [pc, #8] @ (409d4 ) │ │ + ldr r0, [pc, #8] @ (40cdc ) │ │ movs r1, #51 @ 0x33 │ │ add r0, pc │ │ - bl 3fa58 │ │ - ldrsb r2, [r7, r2] │ │ + bl 3fd60 │ │ + strh r2, [r6, r6] │ │ vcle.f d27, d0, #0 │ │ mov r7, sp │ │ sub sp, #48 @ 0x30 │ │ stmia.w sp, {r0, r1, r2, r3} │ │ movs r0, #2 │ │ str r0, [sp, #20] │ │ - ldr r0, [pc, #44] @ (40a14 ) │ │ + ldr r0, [pc, #44] @ (40d1c ) │ │ ldr r2, [r7, #8] │ │ add r0, pc │ │ str r0, [sp, #16] │ │ - ldr r0, [pc, #40] @ (40a18 ) │ │ + ldr r0, [pc, #40] @ (40d20 ) │ │ add r0, pc │ │ str r0, [sp, #44] @ 0x2c │ │ add r1, sp, #8 │ │ strd r0, r1, [sp, #36] @ 0x24 │ │ mov r0, sp │ │ str r0, [sp, #32] │ │ - ldr r0, [pc, #28] @ (40a1c ) │ │ + ldr r0, [pc, #28] @ (40d24 ) │ │ add r0, pc │ │ str r0, [sp, #28] │ │ add r0, sp, #16 │ │ str r0, [sp, #24] │ │ - ldr r0, [pc, #20] @ (40a20 ) │ │ + ldr r0, [pc, #20] @ (40d28 ) │ │ add r1, sp, #24 │ │ add r0, pc │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ nop │ │ - ldrsb r4, [r2, r4] │ │ + strb r4, [r1, r0] │ │ vshr.u32 d16, d17, #3 │ │ movs r0, r0 │ │ - ldr r1, [r5, #8] │ │ + str r1, [r1, #96] @ 0x60 │ │ movs r3, r0 │ │ - strh r2, [r5, #34] @ 0x22 │ │ + strh r0, [r6, #4] │ │ @ instruction: 0xfffce9d0 │ │ lsls r0, r0, #8 │ │ ldr r2, [r2, #12] │ │ bx r2 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -36493,15 +36686,15 @@ │ │ movs r4, #0 │ │ mov.w fp, #0 │ │ str r0, [sp, #16] │ │ subs r0, r5, #1 │ │ str r1, [sp, #8] │ │ str r0, [sp, #0] │ │ str r2, [sp, #4] │ │ - b.n 40a94 │ │ + b.n 40d9c │ │ ldr r0, [sp, #0] │ │ ldrb.w r0, [r0, sl] │ │ subs r0, #10 │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ ldr r3, [sp, #8] │ │ sub.w r2, sl, fp │ │ @@ -36512,333 +36705,333 @@ │ │ ldr r0, [sp, #12] │ │ blx r3 │ │ ldr.w sl, [sp, #4] │ │ movw lr, #256 @ 0x100 │ │ mov fp, r8 │ │ movt lr, #257 @ 0x101 │ │ cmp r0, #0 │ │ - bne.n 40b90 │ │ + bne.n 40e98 │ │ lsls r0, r4, #31 │ │ - bne.n 40b86 │ │ + bne.n 40e8e │ │ cmp sl, r9 │ │ - bcc.n 40b5e │ │ + bcc.n 40e66 │ │ sub.w r8, sl, r9 │ │ add.w r0, r5, r9 │ │ cmp.w r8, #7 │ │ - bhi.n 40abe │ │ + bhi.n 40dc6 │ │ cmp sl, r9 │ │ - beq.n 40b52 │ │ + beq.n 40e5a │ │ movs r3, #0 │ │ ldrb r1, [r0, r3] │ │ cmp r1, #10 │ │ - beq.n 40b32 │ │ + beq.n 40e3a │ │ adds r3, #1 │ │ cmp r8, r3 │ │ - bne.n 40ab0 │ │ - b.n 40b52 │ │ + bne.n 40db8 │ │ + b.n 40e5a │ │ adds r1, r0, #3 │ │ mov ip, r5 │ │ bic.w r1, r1, #3 │ │ subs r1, r1, r0 │ │ - bne.n 40ad2 │ │ + bne.n 40dda │ │ sub.w r3, r8, #8 │ │ movs r1, #0 │ │ - b.n 40ae8 │ │ + b.n 40df0 │ │ movs r3, #0 │ │ ldrb r6, [r0, r3] │ │ cmp r6, #10 │ │ - beq.n 40b30 │ │ + beq.n 40e38 │ │ adds r3, #1 │ │ cmp r1, r3 │ │ - bne.n 40ad4 │ │ + bne.n 40ddc │ │ sub.w r3, r8, #8 │ │ cmp r1, r3 │ │ - bhi.n 40b10 │ │ + bhi.n 40e18 │ │ ldr r6, [r0, r1] │ │ adds r5, r0, r1 │ │ ldr r5, [r5, #4] │ │ eor.w r4, r6, #168430090 @ 0xa0a0a0a │ │ sub.w r4, lr, r4 │ │ orrs r6, r4 │ │ eor.w r4, r5, #168430090 @ 0xa0a0a0a │ │ sub.w r4, lr, r4 │ │ orrs r5, r4 │ │ ands r6, r5 │ │ mvns r6, r6 │ │ tst.w r6, #2155905152 @ 0x80808080 │ │ - bne.n 40b10 │ │ + bne.n 40e18 │ │ adds r1, #8 │ │ - b.n 40ae4 │ │ + b.n 40dec │ │ cmp r8, r1 │ │ - beq.n 40b5a │ │ + beq.n 40e62 │ │ sub.w r3, sl, r1 │ │ adds r4, r0, r1 │ │ sub.w r6, r3, r9 │ │ movs r3, #0 │ │ ldrb r5, [r4, r3] │ │ cmp r5, #10 │ │ - beq.n 40b2e │ │ + beq.n 40e36 │ │ adds r3, #1 │ │ cmp r6, r3 │ │ - bne.n 40b20 │ │ - b.n 40b5a │ │ + bne.n 40e28 │ │ + b.n 40e62 │ │ add r3, r1 │ │ mov r5, ip │ │ add.w r1, r9, r3 │ │ add.w r9, r1, #1 │ │ cmp r1, sl │ │ - bcs.n 40a98 │ │ + bcs.n 40da0 │ │ ldrb r0, [r0, r3] │ │ cmp r0, #10 │ │ - bne.n 40a98 │ │ + bne.n 40da0 │ │ movs r4, #0 │ │ mov r8, r9 │ │ mov sl, r9 │ │ ldr r0, [sp, #16] │ │ ldrb r0, [r0, #0] │ │ - cbz r0, 40b7c │ │ - b.n 40b6c │ │ + cbz r0, 40e84 │ │ + b.n 40e74 │ │ mov r9, sl │ │ cmp sl, fp │ │ - bne.n 40b62 │ │ - b.n 40b86 │ │ + bne.n 40e6a │ │ + b.n 40e8e │ │ mov r9, sl │ │ mov r5, ip │ │ cmp sl, fp │ │ - beq.n 40b86 │ │ + beq.n 40e8e │ │ movs r4, #1 │ │ mov r8, fp │ │ ldr r0, [sp, #16] │ │ ldrb r0, [r0, #0] │ │ - cbz r0, 40b7c │ │ - ldr r1, [pc, #44] @ (40b9c ) │ │ + cbz r0, 40e84 │ │ + ldr r1, [pc, #44] @ (40ea4 ) │ │ movs r2, #4 │ │ ldr r0, [sp, #8] │ │ add r1, pc │ │ ldr r3, [r0, #12] │ │ ldr r0, [sp, #12] │ │ blx r3 │ │ - cbnz r0, 40b90 │ │ + cbnz r0, 40e98 │ │ cmp sl, fp │ │ - bne.w 40a60 │ │ + bne.w 40d68 │ │ movs r0, #0 │ │ - b.n 40a6e │ │ + b.n 40d76 │ │ movs r0, #0 │ │ add sp, #20 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #1 │ │ add sp, #20 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - ldrsb r2, [r6, r3] │ │ + strh r2, [r5, r7] │ │ vsli.64 , q8, #61 @ 0x3d │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ ldr r5, [r0, #8] │ │ ldrd r4, r6, [r0] │ │ ldrb r0, [r5, #0] │ │ - cbz r0, 40bce │ │ - ldr r2, [pc, #52] @ (40be8 ) │ │ + cbz r0, 40ed6 │ │ + ldr r2, [pc, #52] @ (40ef0 ) │ │ mov r0, r4 │ │ ldr r3, [r6, #12] │ │ mov r8, r1 │ │ add r2, pc │ │ mov r1, r2 │ │ movs r2, #4 │ │ blx r3 │ │ mov r1, r8 │ │ - cbz r0, 40bce │ │ + cbz r0, 40ed6 │ │ movs r0, #1 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ sub.w r0, r1, #10 │ │ ldr r2, [r6, #16] │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ strb r0, [r5, #0] │ │ mov r0, r4 │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ bx r2 │ │ - ldrsb r2, [r5, r2] │ │ + strh r2, [r4, r6] │ │ vqshlu.s32 d20, d3, #29 │ │ mov r2, r1 │ │ - ldr r1, [pc, #4] @ (40bf8 ) │ │ + ldr r1, [pc, #4] @ (40f00 ) │ │ add r1, pc │ │ - b.w 3ef94 │ │ - ldr r2, [sp, #168] @ 0xa8 │ │ + b.w 3f29c │ │ + str r7, [sp, #200] @ 0xc8 │ │ movs r1, r1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #36 @ 0x24 │ │ mov r8, r3 │ │ mov r3, r0 │ │ ldrb r0, [r0, #4] │ │ mov.w r9, #1 │ │ cmp r0, #0 │ │ mov.w r0, #1 │ │ - bne.n 40cda │ │ + bne.n 40fe2 │ │ ldr r5, [r3, #0] │ │ mov sl, r3 │ │ ldr.w fp, [r7, #8] │ │ ldrb r3, [r3, #5] │ │ ldrb r0, [r5, #10] │ │ lsls r0, r0, #24 │ │ - bmi.n 40c76 │ │ + bmi.n 40f7e │ │ mov fp, r2 │ │ - ldr r2, [pc, #208] @ (40cfc ) │ │ + ldr r2, [pc, #208] @ (41004 ) │ │ mov r4, r1 │ │ - ldr r1, [pc, #208] @ (40d00 ) │ │ + ldr r1, [pc, #208] @ (41008 ) │ │ ldrd r0, r6, [r5] │ │ add r2, pc │ │ add r1, pc │ │ cmp r3, #0 │ │ it eq │ │ moveq r1, r2 │ │ ldr r3, [r6, #12] │ │ mov.w r2, #3 │ │ it ne │ │ movne r2, #2 │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.n 40cd6 │ │ + bne.n 40fde │ │ ldrd r0, r1, [r5] │ │ mov r2, fp │ │ ldr r3, [r1, #12] │ │ mov r1, r4 │ │ blx r3 │ │ - cbnz r0, 40cd6 │ │ + cbnz r0, 40fde │ │ ldrd r0, r1, [r5] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #156] @ (40d04 ) │ │ + ldr r1, [pc, #156] @ (4100c ) │ │ add r1, pc │ │ blx r3 │ │ - cbnz r0, 40cd6 │ │ + cbnz r0, 40fde │ │ ldr r2, [r7, #8] │ │ mov r0, r8 │ │ mov r1, r5 │ │ blx r2 │ │ - b.n 40cd8 │ │ - cbnz r3, 40c94 │ │ + b.n 40fe0 │ │ + cbnz r3, 40f9c │ │ ldrd r0, r3, [r5] │ │ mov r6, r2 │ │ ldr.w ip, [r3, #12] │ │ mov r4, r1 │ │ - ldr r3, [pc, #128] @ (40d08 ) │ │ + ldr r3, [pc, #128] @ (41010 ) │ │ movs r2, #3 │ │ add r3, pc │ │ mov r1, r3 │ │ blx ip │ │ mov r1, r4 │ │ mov r2, r6 │ │ - cbnz r0, 40cd6 │ │ - ldr r0, [pc, #116] @ (40d0c ) │ │ + cbnz r0, 40fde │ │ + ldr r0, [pc, #116] @ (41014 ) │ │ movs r3, #1 │ │ ldrd ip, r6, [r5] │ │ add r0, pc │ │ str r0, [sp, #24] │ │ add r0, sp, #4 │ │ ldrd r4, r5, [r5, #8] │ │ strb.w r3, [r7, #-45] │ │ sub.w r3, r7, #45 @ 0x2d │ │ str r3, [sp, #12] │ │ str r0, [sp, #20] │ │ strd r4, r5, [sp, #28] │ │ strd ip, r6, [sp, #4] │ │ - bl 40a2c │ │ - cbnz r0, 40cd6 │ │ - ldr r1, [pc, #76] @ (40d10 ) │ │ + bl 40d34 │ │ + cbnz r0, 40fde │ │ + ldr r1, [pc, #76] @ (41018 ) │ │ add r0, sp, #4 │ │ movs r2, #2 │ │ add r1, pc │ │ - bl 40a2c │ │ - cbnz r0, 40cd6 │ │ + bl 40d34 │ │ + cbnz r0, 40fde │ │ add r1, sp, #20 │ │ mov r0, r8 │ │ blx fp │ │ - cbz r0, 40cea │ │ + cbz r0, 40ff2 │ │ movs r0, #1 │ │ mov r3, sl │ │ strb r0, [r3, #4] │ │ mov r0, r3 │ │ strb.w r9, [r3, #5] │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrd r0, r1, [sp, #20] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #32] @ (40d14 ) │ │ + ldr r1, [pc, #32] @ (4101c ) │ │ add r1, pc │ │ blx r3 │ │ - b.n 40cd8 │ │ + b.n 40fe0 │ │ nop │ │ - str r7, [r2, #104] @ 0x68 │ │ - vneg.f d22, d27 │ │ - vclt.f q11, q13, #0 │ │ - @ instruction: 0xfffd1da8 │ │ - vtbl.8 d25, {d29-d30}, d0 │ │ + str r6, [r1, #56] @ 0x38 │ │ + vcge.f d22, d18, #0 │ │ + vabs.s q11, │ │ + vtbl.8 d17, {d29-d31}, d16 │ │ + vrsubhn.i d25, , q4 │ │ movs r1, r1 │ │ - str r2, [r1, #96] @ 0x60 │ │ - vcvt.u16.f16 d17, d24, #3 │ │ + str r1, [r0, #48] @ 0x30 │ │ + vshll.u32 , d16, #29 │ │ vsli.64 , q8, #61 @ 0x3d │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #32 │ │ ldrb r3, [r0, #4] │ │ mov.w r8, #1 │ │ movs r5, #1 │ │ cmp r3, #0 │ │ - bne.n 40dda │ │ + bne.n 410e2 │ │ ldr r4, [r0, #0] │ │ ldrb r3, [r0, #5] │ │ ldrb r6, [r4, #10] │ │ lsls r6, r6, #24 │ │ - bmi.n 40d60 │ │ + bmi.n 41068 │ │ mov r6, r0 │ │ cmp r3, #0 │ │ - beq.n 40dbc │ │ + beq.n 410c4 │ │ ldrd r0, r3, [r4] │ │ mov r5, r2 │ │ ldr.w ip, [r3, #12] │ │ mov r9, r1 │ │ - ldr r3, [pc, #156] @ (40de8 ) │ │ + ldr r3, [pc, #156] @ (410f0 ) │ │ movs r2, #2 │ │ add r3, pc │ │ mov r1, r3 │ │ blx ip │ │ mov r1, r9 │ │ mov r2, r5 │ │ - cbz r0, 40dbc │ │ + cbz r0, 410c4 │ │ movs r5, #1 │ │ mov r0, r6 │ │ - b.n 40dda │ │ - cbnz r3, 40d86 │ │ + b.n 410e2 │ │ + cbnz r3, 4108e │ │ ldrd r3, r6, [r4] │ │ mov r9, r0 │ │ ldr.w ip, [r6, #12] │ │ mov sl, r1 │ │ - ldr r6, [pc, #124] @ (40dec ) │ │ + ldr r6, [pc, #124] @ (410f4 ) │ │ mov r0, r3 │ │ add r6, pc │ │ mov r1, r6 │ │ mov r6, r2 │ │ movs r2, #1 │ │ blx ip │ │ mov r3, r0 │ │ mov r1, sl │ │ mov r2, r6 │ │ mov r0, r9 │ │ - cbnz r3, 40dda │ │ + cbnz r3, 410e2 │ │ mov r9, r0 │ │ - ldr r0, [pc, #100] @ (40df0 ) │ │ + ldr r0, [pc, #100] @ (410f8 ) │ │ movs r3, #1 │ │ ldrd ip, r5, [r4] │ │ strb.w r3, [r7, #-41] │ │ sub.w r3, r7, #41 @ 0x29 │ │ add r0, pc │ │ str r3, [sp, #8] │ │ add r3, sp, #16 │ │ @@ -36847,192 +37040,192 @@ │ │ ldrd r6, r4, [r4, #8] │ │ str r0, [sp, #16] │ │ mov r0, r1 │ │ mov r1, r3 │ │ strd r6, r4, [sp, #24] │ │ strd ip, r5, [sp] │ │ blx r2 │ │ - cbz r0, 40dc8 │ │ + cbz r0, 410d0 │ │ movs r5, #1 │ │ - b.n 40dd8 │ │ + b.n 410e0 │ │ mov r0, r1 │ │ mov r1, r4 │ │ blx r2 │ │ mov r5, r0 │ │ mov r0, r6 │ │ - b.n 40dda │ │ + b.n 410e2 │ │ ldrd r0, r1, [sp, #16] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #32] @ (40df4 ) │ │ + ldr r1, [pc, #32] @ (410fc ) │ │ add r1, pc │ │ blx r3 │ │ mov r5, r0 │ │ mov r0, r9 │ │ strb.w r8, [r0, #5] │ │ strb r5, [r0, #4] │ │ add sp, #32 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ - str r3, [r2, #104] @ 0x68 │ │ - @ instruction: 0xfffd7898 │ │ - vtbl.8 d25, {d29}, d4 │ │ + str r2, [r1, #56] @ 0x38 │ │ + vsli.64 d23, d0, #61 @ 0x3d │ │ + vcle.f d25, d12, #0 │ │ movs r1, r1 │ │ - adds r2, r3, #1 │ │ + adds r2, r2, r5 │ │ vsli.64 , q8, #61 @ 0x3d │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #32 │ │ mov r4, r0 │ │ ldrd r5, r0, [r0] │ │ ldr r6, [r0, #12] │ │ mov r9, r2 │ │ movs r2, #8 │ │ mov r8, r3 │ │ mov r0, r5 │ │ blx r6 │ │ - cbz r0, 40e20 │ │ + cbz r0, 41128 │ │ movs r0, #1 │ │ add sp, #32 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrb r0, [r4, #10] │ │ lsls r0, r0, #24 │ │ - bmi.n 40e4e │ │ - ldr r1, [pc, #288] @ (40f48 ) │ │ + bmi.n 41156 │ │ + ldr r1, [pc, #288] @ (41250 ) │ │ mov r0, r5 │ │ movs r2, #1 │ │ mov.w sl, #1 │ │ add r1, pc │ │ blx r6 │ │ mov r1, r0 │ │ mov r0, sl │ │ cmp r1, #0 │ │ - bne.n 40e18 │ │ + bne.n 41120 │ │ mov r0, r9 │ │ mov r1, r4 │ │ blx r8 │ │ - cbz r0, 40eac │ │ + cbz r0, 411b4 │ │ movs r0, #1 │ │ add sp, #32 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r1, [pc, #252] @ (40f4c ) │ │ + ldr r1, [pc, #252] @ (41254 ) │ │ mov r0, r5 │ │ movs r2, #2 │ │ add r1, pc │ │ blx r6 │ │ mov r1, r0 │ │ movs r0, #1 │ │ cmp r1, #0 │ │ - bne.n 40e18 │ │ - ldr r1, [pc, #236] @ (40f50 ) │ │ + bne.n 41120 │ │ + ldr r1, [pc, #236] @ (41258 ) │ │ sub.w r5, r7, #41 @ 0x29 │ │ strb.w r0, [r7, #-41] │ │ add r1, pc │ │ str r1, [sp, #20] │ │ mov r1, sp │ │ ldmia.w r4, {r0, r2, r3, r6} │ │ str r1, [sp, #16] │ │ add r1, sp, #16 │ │ strd r0, r2, [sp] │ │ mov r0, r9 │ │ str r5, [sp, #8] │ │ strd r3, r6, [sp, #24] │ │ blx r8 │ │ - cbz r0, 40e92 │ │ + cbz r0, 4119a │ │ movs r0, #1 │ │ add sp, #32 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #184] @ (40f54 ) │ │ + ldr r1, [pc, #184] @ (4125c ) │ │ add r1, pc │ │ blx r3 │ │ - cbz r0, 40eac │ │ + cbz r0, 411b4 │ │ movs r0, #1 │ │ add sp, #32 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrb r0, [r4, #10] │ │ ldrd r9, r8, [r7, #8] │ │ lsls r0, r0, #24 │ │ - bmi.n 40ed0 │ │ + bmi.n 411d8 │ │ ldrd r0, r1, [r4] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #152] @ (40f58 ) │ │ + ldr r1, [pc, #152] @ (41260 ) │ │ add r1, pc │ │ blx r3 │ │ - cbz r0, 40f04 │ │ + cbz r0, 4120c │ │ movs r0, #1 │ │ add sp, #32 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #136] @ (40f5c ) │ │ + ldr r0, [pc, #136] @ (41264 ) │ │ movs r1, #1 │ │ strb.w r1, [r7, #-41] │ │ sub.w r5, r7, #41 @ 0x29 │ │ ldmia.w r4, {r1, r2, r3, r6} │ │ add r0, pc │ │ str r0, [sp, #20] │ │ mov r0, sp │ │ strd r1, r2, [sp] │ │ add r1, sp, #16 │ │ str r0, [sp, #16] │ │ mov r0, r9 │ │ str r5, [sp, #8] │ │ strd r3, r6, [sp, #24] │ │ blx r8 │ │ - cbz r0, 40f16 │ │ + cbz r0, 4121e │ │ movs r0, #1 │ │ add sp, #32 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, r9 │ │ mov r1, r4 │ │ blx r8 │ │ - cbz r0, 40f30 │ │ + cbz r0, 41238 │ │ movs r0, #1 │ │ add sp, #32 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #64] @ (40f60 ) │ │ + ldr r1, [pc, #64] @ (41268 ) │ │ add r1, pc │ │ blx r3 │ │ - cbz r0, 40f30 │ │ + cbz r0, 41238 │ │ movs r0, #1 │ │ add sp, #32 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrd r0, r1, [r4] │ │ movs r2, #1 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #40] @ (40f64 ) │ │ + ldr r1, [pc, #40] @ (4126c ) │ │ add r1, pc │ │ blx r3 │ │ add sp, #32 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - str r1, [r0, #72] @ 0x48 │ │ - @ instruction: 0xfffd1bda │ │ - vqshl.u64 d25, d18, #61 @ 0x3d │ │ + str r0, [r7, #20] │ │ + @ instruction: 0xfffd18d2 │ │ + vsri.64 d25, d26, #3 │ │ movs r1, r1 │ │ - subs r0, r2, r6 │ │ - vceq.f d22, d17, #0 │ │ - vqshl.u32 d25, d28, #29 │ │ + adds r0, r1, r2 │ │ + vrshr.u32 d22, d8, #3 │ │ + vcgt.f , q2, #0 │ │ movs r1, r1 │ │ - subs r4, r1, r4 │ │ - vrsra.u32 q11, , #3 │ │ + adds r4, r0, r0 │ │ + vshr.u32 q11, q8, #3 │ │ vsli.64 d27, d16, #61 @ 0x3d │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r3 │ │ mov r5, r0 │ │ ldrd r0, r3, [r0] │ │ ldr r3, [r3, #12] │ │ @@ -37042,96 +37235,96 @@ │ │ strb.w r0, [sp, #12] │ │ add r0, sp, #8 │ │ ldmia.w ip, {r2, r3, ip} │ │ strb.w r1, [sp, #13] │ │ mov r1, r4 │ │ str r5, [sp, #8] │ │ str.w ip, [sp] │ │ - bl 40bfc │ │ + bl 40f04 │ │ ldrb.w r2, [sp, #13] │ │ ldrb.w r1, [sp, #12] │ │ cmp r2, #1 │ │ orr.w r0, r2, r1 │ │ it eq │ │ movseq.w r1, r1, lsl #31 │ │ - beq.n 40fb8 │ │ + beq.n 412c0 │ │ and.w r0, r0, #1 │ │ add sp, #16 │ │ pop {r4, r5, r7, pc} │ │ ldr r0, [sp, #8] │ │ ldrb r1, [r0, #10] │ │ lsls r1, r1, #24 │ │ - bmi.n 40fd6 │ │ + bmi.n 412de │ │ ldrd r0, r1, [r0] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #32] @ (40fec ) │ │ + ldr r1, [pc, #32] @ (412f4 ) │ │ add r1, pc │ │ blx r3 │ │ and.w r0, r0, #1 │ │ add sp, #16 │ │ pop {r4, r5, r7, pc} │ │ ldrd r0, r1, [r0] │ │ movs r2, #1 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #16] @ (40ff0 ) │ │ + ldr r1, [pc, #16] @ (412f8 ) │ │ add r1, pc │ │ blx r3 │ │ and.w r0, r0, #1 │ │ add sp, #16 │ │ pop {r4, r5, r7, pc} │ │ - str r4, [r0, #48] @ 0x30 │ │ - vmlal.u q11, d29, d3[0] │ │ + ldrsh r3, [r7, r7] │ │ + @ instruction: 0xfffd5fba │ │ vsli.64 , q12, #61 @ 0x3d │ │ add r7, sp, #16 │ │ strd r0, r1, [sp, #8] │ │ str r2, [sp, #0] │ │ add r0, sp, #8 │ │ add r2, sp, #12 │ │ - ldr r1, [pc, #8] @ (4100c ) │ │ + ldr r1, [pc, #8] @ (41314 ) │ │ add r1, pc │ │ mov r3, r1 │ │ - bl 409d8 │ │ - str r6, [sp, #704] @ 0x2c0 │ │ + bl 40ce0 │ │ + str r3, [sp, #736] @ 0x2e0 │ │ movs r1, r1 │ │ ldr r0, [r0, #0] │ │ ldr r0, [r0, #0] │ │ - b.w 3ff44 │ │ + b.w 4024c │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #12 │ │ ldr.w sl, [r7, #8] │ │ mov fp, r3 │ │ mov r9, r2 │ │ mov ip, r1 │ │ mov lr, r0 │ │ cmp.w sl, #1 │ │ - bne.n 410c8 │ │ + bne.n 413d0 │ │ movs r1, #0 │ │ mov.w r8, #1 │ │ movs r2, #0 │ │ movs r5, #1 │ │ cmp r1, r2 │ │ ite ls │ │ movls r8, r5 │ │ movhi r2, r1 │ │ cmp sl, r2 │ │ - bcc.w 412dc │ │ + bcc.w 415e4 │ │ adds.w r1, r8, r2 │ │ - bcs.w 412ea │ │ + bcs.w 415f2 │ │ cmp r1, sl │ │ - bhi.w 412ea │ │ + bhi.w 415f2 │ │ add.w r1, fp, r8 │ │ mov r0, fp │ │ strd ip, lr, [sp, #4] │ │ str r2, [sp, #0] │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - beq.n 4116a │ │ + beq.n 41472 │ │ movs r0, #0 │ │ mov.w ip, #1 │ │ mov r3, fp │ │ mov r4, sl │ │ movs r1, #0 │ │ ldrb.w r6, [r3], #1 │ │ and.w r6, r6, #63 @ 0x3f │ │ @@ -37142,191 +37335,191 @@ │ │ lslpl.w r2, ip, r5 │ │ orr.w r1, r1, r2 │ │ lsl.w r2, ip, r6 │ │ it pl │ │ movpl r2, #0 │ │ orrs r0, r2 │ │ subs r4, #1 │ │ - bne.n 4107a │ │ + bne.n 41382 │ │ ldr r4, [sp, #0] │ │ mov.w r6, #4294967295 @ 0xffffffff │ │ sub.w r2, sl, r4 │ │ mov r3, r4 │ │ cmp r2, r4 │ │ it hi │ │ movhi r3, r2 │ │ add.w r8, r3, #1 │ │ mov.w r3, #4294967295 @ 0xffffffff │ │ mov ip, r4 │ │ ldr.w lr, [sp, #8] │ │ - b.n 412aa │ │ + b.n 415b2 │ │ movs r3, #0 │ │ movs r6, #1 │ │ movs r2, #1 │ │ mov.w r8, #1 │ │ movs r1, #0 │ │ - b.n 410e6 │ │ + b.n 413ee │ │ adds r0, r2, r3 │ │ movs r3, #0 │ │ adds r2, r0, #1 │ │ sub.w r8, r2, r1 │ │ adds r6, r2, r3 │ │ cmp r6, sl │ │ - bcs.n 4111c │ │ + bcs.n 41424 │ │ adds r0, r1, r3 │ │ cmp r0, sl │ │ - bcs.w 412f6 │ │ + bcs.w 415fe │ │ ldrb.w r6, [fp, r6] │ │ ldrb.w r0, [fp, r0] │ │ cmp r6, r0 │ │ - bcc.n 410d6 │ │ - bne.n 4110e │ │ + bcc.n 413de │ │ + bne.n 41416 │ │ adds r0, r3, #1 │ │ cmp r0, r8 │ │ it eq │ │ addeq r2, r0 │ │ subs.w r3, r0, r8 │ │ it ne │ │ movne r3, r0 │ │ - b.n 410e0 │ │ + b.n 413e8 │ │ adds r0, r2, #1 │ │ mov r1, r2 │ │ movs r3, #0 │ │ mov.w r8, #1 │ │ mov r2, r0 │ │ - b.n 410e0 │ │ + b.n 413e8 │ │ movs r6, #0 │ │ movs r4, #1 │ │ movs r3, #1 │ │ movs r5, #1 │ │ movs r2, #0 │ │ - b.n 41138 │ │ + b.n 41440 │ │ adds r0, r3, r6 │ │ movs r6, #0 │ │ adds r3, r0, #1 │ │ subs r5, r3, r2 │ │ adds r4, r3, r6 │ │ cmp r4, sl │ │ - bcs.w 4103e │ │ + bcs.w 41346 │ │ adds r0, r2, r6 │ │ cmp r0, sl │ │ - bcs.w 412f6 │ │ + bcs.w 415fe │ │ ldrb.w r4, [fp, r4] │ │ ldrb.w r0, [fp, r0] │ │ cmp r4, r0 │ │ - bhi.n 41128 │ │ - bne.n 4115e │ │ + bhi.n 41430 │ │ + bne.n 41466 │ │ adds r0, r6, #1 │ │ cmp r0, r5 │ │ it eq │ │ addeq r3, r0 │ │ subs r6, r0, r5 │ │ it ne │ │ movne r6, r0 │ │ - b.n 41130 │ │ + b.n 41438 │ │ adds r0, r3, #1 │ │ mov r2, r3 │ │ movs r6, #0 │ │ movs r5, #1 │ │ mov r3, r0 │ │ - b.n 41130 │ │ + b.n 41438 │ │ sub.w ip, sl, #1 │ │ mov r5, r9 │ │ movs r3, #0 │ │ movs r2, #1 │ │ movs r0, #1 │ │ mov.w lr, #0 │ │ - b.n 41188 │ │ + b.n 41490 │ │ adds r0, r4, #1 │ │ movs r3, #0 │ │ sub.w r2, r0, lr │ │ cmp r2, r8 │ │ - beq.n 411d8 │ │ + beq.n 414e0 │ │ adds r4, r0, r3 │ │ cmp r4, sl │ │ - bcs.n 411d8 │ │ + bcs.n 414e0 │ │ mov r6, r0 │ │ sub.w r0, sl, r3 │ │ mvns r1, r6 │ │ add r0, r1 │ │ cmp r0, sl │ │ - bcs.w 41300 │ │ + bcs.w 41608 │ │ add.w r1, r3, lr │ │ sub.w r1, ip, r1 │ │ cmp r1, sl │ │ - bcs.w 4130a │ │ + bcs.w 41612 │ │ ldrb.w r0, [fp, r0] │ │ ldrb.w r1, [fp, r1] │ │ cmp r0, r1 │ │ - bcc.n 4117c │ │ + bcc.n 41484 │ │ cmp r0, r1 │ │ - bne.n 411ce │ │ + bne.n 414d6 │ │ adds r0, r3, #1 │ │ cmp r0, r2 │ │ it eq │ │ addeq r6, r0 │ │ subs r3, r0, r2 │ │ it ne │ │ movne r3, r0 │ │ mov r0, r6 │ │ - b.n 41184 │ │ + b.n 4148c │ │ adds r0, r6, #1 │ │ movs r3, #0 │ │ movs r2, #1 │ │ mov lr, r6 │ │ - b.n 41184 │ │ + b.n 4148c │ │ mov.w r9, #0 │ │ movs r2, #1 │ │ movs r0, #1 │ │ movs r3, #0 │ │ - b.n 411f0 │ │ + b.n 414f8 │ │ adds r0, r4, #1 │ │ mov.w r9, #0 │ │ subs r2, r0, r3 │ │ cmp r2, r8 │ │ - beq.n 41244 │ │ + beq.n 4154c │ │ add.w r4, r0, r9 │ │ cmp r4, sl │ │ - bcs.n 41244 │ │ + bcs.n 4154c │ │ mov r6, r0 │ │ sub.w r0, sl, r9 │ │ mvns r1, r6 │ │ add r0, r1 │ │ cmp r0, sl │ │ - bcs.n 41300 │ │ + bcs.n 41608 │ │ add.w r1, r9, r3 │ │ sub.w r1, ip, r1 │ │ cmp r1, sl │ │ - bcs.n 4130a │ │ + bcs.n 41612 │ │ ldrb.w r0, [fp, r0] │ │ ldrb.w r1, [fp, r1] │ │ cmp r0, r1 │ │ - bhi.n 411e4 │ │ + bhi.n 414ec │ │ cmp r0, r1 │ │ - bne.n 41238 │ │ + bne.n 41540 │ │ add.w r0, r9, #1 │ │ cmp r0, r2 │ │ it eq │ │ addeq r6, r0 │ │ subs.w r9, r0, r2 │ │ it ne │ │ movne r9, r0 │ │ mov r0, r6 │ │ - b.n 411ec │ │ + b.n 414f4 │ │ adds r0, r6, #1 │ │ mov.w r9, #0 │ │ movs r2, #1 │ │ mov r3, r6 │ │ - b.n 411ec │ │ + b.n 414f4 │ │ cmp r3, lr │ │ it hi │ │ movhi lr, r3 │ │ sub.w ip, sl, lr │ │ cmp.w r8, #0 │ │ - beq.n 41296 │ │ + beq.n 4159e │ │ ldr.w lr, [sp, #8] │ │ movs r3, #0 │ │ movs r6, #1 │ │ movs r0, #0 │ │ movs r1, #0 │ │ mov r9, r5 │ │ ldrb.w r5, [fp, r3] │ │ @@ -37339,18 +37532,18 @@ │ │ lslpl.w r2, r6, r4 │ │ orr.w r1, r1, r2 │ │ lsl.w r2, r6, r5 │ │ it pl │ │ movpl r2, #0 │ │ orrs r0, r2 │ │ cmp r8, r3 │ │ - bne.n 41262 │ │ + bne.n 4156a │ │ movs r3, #0 │ │ mov r6, sl │ │ - b.n 412a8 │ │ + b.n 415b0 │ │ mov.w r8, #0 │ │ movs r0, #0 │ │ movs r1, #0 │ │ movs r3, #0 │ │ mov r6, sl │ │ mov r9, r5 │ │ ldr.w lr, [sp, #8] │ │ @@ -37366,151 +37559,151 @@ │ │ str.w r6, [lr] │ │ stmia.w r5, {r0, r1, r4, ip} │ │ strd r8, r2, [lr, #24] │ │ strd r9, r3, [lr, #32] │ │ add sp, #12 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r3, [pc, #60] @ (4131c ) │ │ + ldr r3, [pc, #60] @ (41624 ) │ │ mov r1, r2 │ │ movs r0, #0 │ │ mov r2, sl │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #52] @ (41320 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #52] @ (41628 ) │ │ mov r0, r8 │ │ mov r2, sl │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r2, [pc, #32] @ (41318 ) │ │ + bl 3fcb0 │ │ + ldr r2, [pc, #32] @ (41620 ) │ │ mov r1, sl │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r2, [pc, #32] @ (41324 ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #32] @ (4162c ) │ │ mov r1, sl │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r2, [pc, #28] @ (41328 ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #28] @ (41630 ) │ │ mov r0, r1 │ │ mov r1, sl │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ nop │ │ - str r3, [sp, #232] @ 0xe8 │ │ + str r0, [sp, #264] @ 0x108 │ │ movs r1, r1 │ │ - str r3, [sp, #576] @ 0x240 │ │ + str r0, [sp, #608] @ 0x260 │ │ movs r1, r1 │ │ - str r3, [sp, #464] @ 0x1d0 │ │ + str r0, [sp, #496] @ 0x1f0 │ │ movs r1, r1 │ │ - str r3, [sp, #256] @ 0x100 │ │ + str r0, [sp, #288] @ 0x120 │ │ movs r1, r1 │ │ - str r3, [sp, #272] @ 0x110 │ │ + str r0, [sp, #304] @ 0x130 │ │ movs r1, r1 │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #16 │ │ - ldr r1, [pc, #20] @ (41348 ) │ │ + ldr r1, [pc, #20] @ (41650 ) │ │ mov r2, r0 │ │ - ldr r0, [pc, #20] @ (4134c ) │ │ + ldr r0, [pc, #20] @ (41654 ) │ │ subs r3, r7, #1 │ │ add r1, pc │ │ add r0, pc │ │ strd r3, r1, [sp, #4] │ │ add r1, sp, #4 │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ movs r3, r2 │ │ movs r0, r0 │ │ - ldr r0, [sp, #700] @ 0x2bc │ │ + str r5, [sp, #124] @ 0x7c │ │ vpadal.s d20, d8 │ │ - ldr r1, [pc, #8] @ (4135c ) │ │ + ldr r1, [pc, #8] @ (41664 ) │ │ movs r2, #24 │ │ add r1, pc │ │ - b.w 3ffd4 │ │ - ldr r6, [pc, #512] @ (41560 ) │ │ + b.w 402dc │ │ + ldr r3, [pc, #480] @ (41848 ) │ │ vcle.f d27, d0, #0 │ │ mov r7, sp │ │ sub sp, #16 │ │ - ldr r1, [pc, #20] @ (4137c ) │ │ + ldr r1, [pc, #20] @ (41684 ) │ │ mov r2, r0 │ │ - ldr r0, [pc, #20] @ (41380 ) │ │ + ldr r0, [pc, #20] @ (41688 ) │ │ subs r3, r7, #1 │ │ add r1, pc │ │ add r0, pc │ │ strd r3, r1, [sp, #4] │ │ add r1, sp, #4 │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ movs r3, r2 │ │ movs r0, r0 │ │ - ldr r0, [sp, #492] @ 0x1ec │ │ + str r4, [sp, #940] @ 0x3ac │ │ vpadal.s d20, d8 │ │ - ldr r1, [pc, #8] @ (41390 ) │ │ + ldr r1, [pc, #8] @ (41698 ) │ │ movs r2, #32 │ │ add r1, pc │ │ - b.w 3ffd4 │ │ - ldr r5, [pc, #936] @ (4173c ) │ │ + b.w 402dc │ │ + ldr r2, [pc, #904] @ (41a24 ) │ │ vsli.64 , q0, #61 @ 0x3d │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ - ldr r3, [pc, #36] @ (413c0 ) │ │ - ldr r2, [pc, #36] @ (413c4 ) │ │ - ldr r4, [pc, #40] @ (413c8 ) │ │ + ldr r3, [pc, #36] @ (416c8 ) │ │ + ldr r2, [pc, #36] @ (416cc ) │ │ + ldr r4, [pc, #40] @ (416d0 ) │ │ add r3, pc │ │ strd r1, r0, [sp] │ │ add r0, sp, #4 │ │ add r4, pc │ │ add r2, pc │ │ strd r4, r0, [sp, #12] │ │ mov r0, sp │ │ add r1, sp, #8 │ │ str r0, [sp, #8] │ │ mov r0, r3 │ │ str r4, [sp, #20] │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ nop │ │ - ldrh r3, [r3, #54] @ 0x36 │ │ - @ instruction: 0xfffc9efa │ │ + ldrh r0, [r7, #36] @ 0x24 │ │ + vdup.32 d25, d2[1] │ │ movs r1, r1 │ │ - bl ffd0b3ca │ │ + bl ffd0b6d2 │ │ push {r7, lr} │ │ mov r7, sp │ │ - ldr r0, [pc, #12] @ (413e0 ) │ │ + ldr r0, [pc, #12] @ (416e8 ) │ │ movs r1, #153 @ 0x99 │ │ - ldr r2, [pc, #12] @ (413e4 ) │ │ + ldr r2, [pc, #12] @ (416ec ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ nop │ │ - asrs r1, r5, #29 │ │ - vsubl.u , d29, d28 │ │ + asrs r1, r4, #17 │ │ + @ instruction: 0xfffd8fb4 │ │ movs r1, r1 │ │ push {r4, r5, r6, r7, lr} │ │ str.w r8, [sp, #-4]! │ │ adds r3, r1, #3 │ │ uxtb.w ip, r0 │ │ bic.w r3, r3, #3 │ │ cmp r3, r1 │ │ - bne.n 41404 │ │ + bne.n 4170c │ │ sub.w lr, r2, #8 │ │ movs r0, #0 │ │ - b.n 41424 │ │ + b.n 4172c │ │ subs r0, r3, r1 │ │ cmp r2, r0 │ │ it cc │ │ movcc r0, r2 │ │ - cbz r2, 4141c │ │ + cbz r2, 41724 │ │ movs r3, #0 │ │ ldrb r6, [r1, r3] │ │ cmp r6, ip │ │ - beq.n 4147e │ │ + beq.n 41786 │ │ adds r3, #1 │ │ cmp r0, r3 │ │ - bne.n 41410 │ │ + bne.n 41718 │ │ sub.w lr, r2, #8 │ │ cmp r0, lr │ │ - bhi.n 4145c │ │ + bhi.n 41764 │ │ mov.w r3, #16843009 @ 0x1010101 │ │ movw r8, #256 @ 0x100 │ │ mul.w r3, ip, r3 │ │ movt r8, #257 @ 0x101 │ │ ldr r5, [r1, r0] │ │ adds r6, r1, r0 │ │ ldr r6, [r6, #4] │ │ @@ -37519,82 +37712,82 @@ │ │ orrs r4, r5 │ │ eor.w r5, r6, r3 │ │ sub.w r6, r8, r5 │ │ orrs r5, r6 │ │ ands r4, r5 │ │ mvns r4, r4 │ │ tst.w r4, #2155905152 @ 0x80808080 │ │ - bne.n 4145c │ │ + bne.n 41764 │ │ adds r0, #8 │ │ cmp r0, lr │ │ - bls.n 41434 │ │ + bls.n 4173c │ │ cmp r2, r0 │ │ - beq.n 41472 │ │ + beq.n 4177a │ │ adds r3, r1, r0 │ │ subs r2, r2, r0 │ │ movs r1, #0 │ │ ldrb r6, [r3, r1] │ │ cmp r6, ip │ │ - beq.n 4147c │ │ + beq.n 41784 │ │ adds r1, #1 │ │ cmp r2, r1 │ │ - bne.n 41466 │ │ + bne.n 4176e │ │ movs r0, #0 │ │ mov r1, r3 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ adds r3, r1, r0 │ │ movs r0, #1 │ │ mov r1, r3 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ - ldr r3, [pc, #24] @ (414a8 ) │ │ - ldr r4, [pc, #24] @ (414ac ) │ │ + ldr r3, [pc, #24] @ (417b0 ) │ │ + ldr r4, [pc, #24] @ (417b4 ) │ │ add r3, pc │ │ strd r0, r1, [sp] │ │ mov r0, sp │ │ add r1, sp, #8 │ │ str r0, [sp, #8] │ │ mov r0, r3 │ │ add r4, pc │ │ str r4, [sp, #12] │ │ - bl 3fa58 │ │ - str r7, [sp, #356] @ 0x164 │ │ - @ instruction: 0xfffc5e09 │ │ + bl 3fd60 │ │ + str r3, [sp, #804] @ 0x324 │ │ + vtbx.8 d21, {d12-d15}, d25 │ │ movs r3, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #32 │ │ - ldr r5, [pc, #40] @ (414e4 ) │ │ - ldr r6, [pc, #40] @ (414e8 ) │ │ - ldr r4, [pc, #44] @ (414ec ) │ │ + ldr r5, [pc, #40] @ (417ec ) │ │ + ldr r6, [pc, #40] @ (417f0 ) │ │ + ldr r4, [pc, #44] @ (417f4 ) │ │ add r5, pc │ │ stmia.w sp, {r0, r1, r2, r3} │ │ add r0, sp, #8 │ │ add r4, pc │ │ ldr.w ip, [r7, #8] │ │ add r6, pc │ │ strd r6, r0, [sp, #20] │ │ mov r0, sp │ │ add r1, sp, #16 │ │ str r0, [sp, #16] │ │ mov r0, r4 │ │ mov r2, ip │ │ str r5, [sp, #28] │ │ - bl 3fa58 │ │ - bl ffda34e6 │ │ - ldrb r3, [r3, r7] │ │ + bl 3fd60 │ │ + bl ffda37ee │ │ + ldrh r3, [r7, r4] │ │ movs r3, r0 │ │ - ldr r6, [r2, #76] @ 0x4c │ │ + ldr r6, [r1, #28] │ │ vsli.32 d27, d0, #28 │ │ - ldr r1, [pc, #212] @ (415c8 ) │ │ + ldr r1, [pc, #212] @ (418d0 ) │ │ movw r3, #7923 @ 0x1ef3 │ │ movt r3, #1 │ │ movs r2, #18 │ │ cmp r0, r3 │ │ it cc │ │ movcc r2, #0 │ │ add r1, pc │ │ @@ -37639,47 +37832,47 @@ │ │ it eq │ │ addeq r4, #1 │ │ add r4, r2 │ │ cmp r4, #34 @ 0x22 │ │ ldr.w r2, [r1, r4, lsl #2] │ │ add.w r3, r1, r4, lsl #2 │ │ mov.w r1, r2, lsr #21 │ │ - bhi.n 41596 │ │ + bhi.n 4189e │ │ ldr r2, [r3, #4] │ │ mov.w r2, r2, lsr #21 │ │ - cbnz r4, 4159a │ │ + cbnz r4, 418a2 │ │ movs r3, #0 │ │ mvns r4, r1 │ │ adds r4, r4, r2 │ │ - bne.n 415a8 │ │ - b.n 415c2 │ │ + bne.n 418b0 │ │ + b.n 418ca │ │ movw r2, #919 @ 0x397 │ │ ldr.w r3, [r3, #-4] │ │ bfc r3, #21, #11 │ │ mvns r4, r1 │ │ adds r4, r4, r2 │ │ - beq.n 415c2 │ │ - ldr r4, [pc, #32] @ (415cc ) │ │ + beq.n 418ca │ │ + ldr r4, [pc, #32] @ (418d4 ) │ │ subs r0, r0, r3 │ │ sub.w ip, r2, #1 │ │ movs r3, #0 │ │ add r4, pc │ │ ldrb r2, [r4, r1] │ │ add r3, r2 │ │ cmp r3, r0 │ │ - bhi.n 415c2 │ │ + bhi.n 418ca │ │ adds r1, #1 │ │ cmp ip, r1 │ │ - bne.n 415b4 │ │ + bne.n 418bc │ │ and.w r0, r1, #1 │ │ pop {r4, pc} │ │ - add r4, ip │ │ - vtbl.8 d16, {d29-) │ │ + ldr r1, [pc, #196] @ (419a0 ) │ │ movw r3, #1920 @ 0x780 │ │ movt r3, #1 │ │ movs r2, #11 │ │ cmp r0, r3 │ │ it cc │ │ movcc r2, #0 │ │ add r1, pc │ │ @@ -37718,371 +37911,371 @@ │ │ it eq │ │ addeq r4, #1 │ │ add r4, r2 │ │ cmp r4, #20 │ │ ldr.w r2, [r1, r4, lsl #2] │ │ add.w r3, r1, r4, lsl #2 │ │ mov.w r1, r2, lsr #21 │ │ - bhi.n 41664 │ │ + bhi.n 4196c │ │ ldr r2, [r3, #4] │ │ mov.w r2, r2, lsr #21 │ │ - cbnz r4, 41668 │ │ + cbnz r4, 41970 │ │ movs r3, #0 │ │ mvns r4, r1 │ │ adds r4, r4, r2 │ │ - bne.n 41676 │ │ - b.n 41690 │ │ + bne.n 4197e │ │ + b.n 41998 │ │ movw r2, #313 @ 0x139 │ │ ldr.w r3, [r3, #-4] │ │ bfc r3, #21, #11 │ │ mvns r4, r1 │ │ adds r4, r4, r2 │ │ - beq.n 41690 │ │ - ldr r4, [pc, #36] @ (4169c ) │ │ + beq.n 41998 │ │ + ldr r4, [pc, #36] @ (419a4 ) │ │ subs r0, r0, r3 │ │ sub.w ip, r2, #1 │ │ movs r3, #0 │ │ add r4, pc │ │ ldrb r2, [r4, r1] │ │ add r3, r2 │ │ cmp r3, r0 │ │ - bhi.n 41690 │ │ + bhi.n 41998 │ │ adds r1, #1 │ │ cmp ip, r1 │ │ - bne.n 41682 │ │ + bne.n 4198a │ │ and.w r0, r1, #1 │ │ pop {r4, pc} │ │ nop │ │ - add r8, r3 │ │ - vsra.u32 , , #3 │ │ + sbcs r0, r2 │ │ + vqrdmlah.s q8, , d27[0] │ │ vcle.f d27, d0, #0 │ │ mov r7, sp │ │ mov r2, r0 │ │ - ldr r0, [pc, #8] @ (416b0 ) │ │ + ldr r0, [pc, #8] @ (419b8 ) │ │ movs r1, #115 @ 0x73 │ │ add r0, pc │ │ - bl 3fa58 │ │ - ldr r1, [pc, #988] @ (41a90 ) │ │ + bl 3fd60 │ │ + mov pc, sp │ │ vcle.f d27, d0, #0 │ │ mov r7, sp │ │ - ldr r0, [pc, #12] @ (416c8 ) │ │ + ldr r0, [pc, #12] @ (419d0 ) │ │ movs r1, #77 @ 0x4d │ │ - ldr r3, [pc, #12] @ (416cc ) │ │ + ldr r3, [pc, #12] @ (419d4 ) │ │ movs r2, #0 │ │ add r0, pc │ │ add r3, pc │ │ - bl 416d0 │ │ - ldr r2, [pc, #256] @ (417cc ) │ │ - vcgt.s d25, d2, #0 │ │ + bl 419d8 │ │ + bx r7 │ │ + @ instruction: 0xfffd8d0a │ │ movs r1, r1 │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #24 │ │ strd r0, r1, [sp, #4] │ │ movs r0, #0 │ │ strb.w r0, [sp, #20] │ │ add r0, sp, #4 │ │ strb.w r2, [sp, #21] │ │ str r3, [sp, #16] │ │ str r0, [sp, #12] │ │ add r0, sp, #12 │ │ - bl 93d48 │ │ + bl 93db4 │ │ udf #254 @ 0xfe │ │ - bl 416f6 │ │ + bl 419fe │ │ push {r7, lr} │ │ mov r7, sp │ │ - bl 416b4 │ │ + bl 419bc │ │ push {r7, lr} │ │ mov r7, sp │ │ - bl 41708 │ │ - bmi.n 416b2 │ │ + bl 41a10 │ │ + bmi.n 419ba │ │ push {r7, lr} │ │ mov r7, sp │ │ - ldr r0, [pc, #12] @ (4171c ) │ │ + ldr r0, [pc, #12] @ (41a24 ) │ │ movs r1, #73 @ 0x49 │ │ - ldr r3, [pc, #12] @ (41720 ) │ │ + ldr r3, [pc, #12] @ (41a28 ) │ │ movs r2, #1 │ │ add r0, pc │ │ add r3, pc │ │ - bl 416d0 │ │ - ldr r1, [pc, #792] @ (41a38 ) │ │ - @ instruction: 0xfffd8fbe │ │ + bl 419d8 │ │ + mov lr, r7 │ │ + vqdmulh.s q12, , d6[0] │ │ movs r1, r1 │ │ push {r4, r5, r6, lr} │ │ stmdb sp!, {r8, r9} │ │ ldr.w ip, [r1, #4] │ │ mov r9, r0 │ │ cmp.w ip, #0 │ │ - beq.w 41866 │ │ + beq.w 41b6e │ │ ldr.w lr, [r1] │ │ mov r8, r1 │ │ - ldr r0, [pc, #308] @ (41874 ) │ │ + ldr r0, [pc, #308] @ (41b7c ) │ │ movs r3, #0 │ │ - ldr r5, [pc, #308] @ (41878 ) │ │ + ldr r5, [pc, #308] @ (41b80 ) │ │ add r0, pc │ │ add r5, pc │ │ - b.n 41752 │ │ + b.n 41a5a │ │ mov r3, r2 │ │ mov r2, r3 │ │ cmp r3, ip │ │ - bcs.n 41846 │ │ + bcs.n 41b4e │ │ ldrsb.w r4, [lr, r3] │ │ adds r2, r3, #1 │ │ cmp.w r4, #4294967295 @ 0xffffffff │ │ - bgt.n 4174a │ │ + bgt.n 41a52 │ │ uxtb r6, r4 │ │ ldrb r4, [r0, r6] │ │ cmp r4, #4 │ │ - beq.n 417a4 │ │ + beq.n 41aac │ │ cmp r4, #3 │ │ - beq.n 41786 │ │ + beq.n 41a8e │ │ cmp r4, #2 │ │ - bne.n 41846 │ │ + bne.n 41b4e │ │ mov r4, r5 │ │ cmp r2, ip │ │ it cc │ │ addcc.w r4, lr, r2 │ │ ldrsb.w r4, [r4] │ │ cmn.w r4, #64 @ 0x40 │ │ - bge.n 41846 │ │ + bge.n 41b4e │ │ adds r3, #2 │ │ - b.n 4174c │ │ + b.n 41a54 │ │ mov r4, r5 │ │ cmp r2, ip │ │ it cc │ │ addcc.w r4, lr, r2 │ │ cmp r6, #224 @ 0xe0 │ │ ldrb r4, [r4, #0] │ │ - beq.n 417c2 │ │ + beq.n 41aca │ │ sxtb r4, r4 │ │ cmp r6, #237 @ 0xed │ │ - bne.n 417d6 │ │ + bne.n 41ade │ │ cmn.w r4, #97 @ 0x61 │ │ - ble.n 417ec │ │ - b.n 41846 │ │ + ble.n 41af4 │ │ + b.n 41b4e │ │ mov r4, r5 │ │ cmp r2, ip │ │ it cc │ │ addcc.w r4, lr, r2 │ │ cmp r6, #240 @ 0xf0 │ │ ldrb r4, [r4, #0] │ │ - beq.n 417cc │ │ + beq.n 41ad4 │ │ cmp r6, #244 @ 0xf4 │ │ - bne.n 41806 │ │ + bne.n 41b0e │ │ sxtb r1, r4 │ │ cmn.w r1, #113 @ 0x71 │ │ - ble.n 41816 │ │ - b.n 41846 │ │ + ble.n 41b1e │ │ + b.n 41b4e │ │ and.w r1, r4, #224 @ 0xe0 │ │ cmp r1, #160 @ 0xa0 │ │ - beq.n 417ec │ │ - b.n 41846 │ │ + beq.n 41af4 │ │ + b.n 41b4e │ │ sub.w r1, r4, #144 @ 0x90 │ │ cmp r1, #48 @ 0x30 │ │ - bcc.n 41816 │ │ - b.n 41846 │ │ + bcc.n 41b1e │ │ + b.n 41b4e │ │ sub.w r1, r6, #225 @ 0xe1 │ │ cmp r1, #12 │ │ - bcc.n 417e6 │ │ + bcc.n 41aee │ │ and.w r1, r6, #254 @ 0xfe │ │ cmp r1, #238 @ 0xee │ │ - bne.n 41846 │ │ + bne.n 41b4e │ │ cmn.w r4, #64 @ 0x40 │ │ - bge.n 41846 │ │ + bge.n 41b4e │ │ adds r2, r3, #2 │ │ mov r1, r5 │ │ cmp r2, ip │ │ it cc │ │ addcc.w r1, lr, r2 │ │ ldrsb.w r1, [r1] │ │ cmn.w r1, #64 @ 0x40 │ │ - bge.n 41846 │ │ + bge.n 41b4e │ │ adds r3, #3 │ │ - b.n 4174c │ │ + b.n 41a54 │ │ sub.w r1, r6, #241 @ 0xf1 │ │ cmp r1, #2 │ │ - bhi.n 41846 │ │ + bhi.n 41b4e │ │ sxtb r1, r4 │ │ cmn.w r1, #64 @ 0x40 │ │ - bge.n 41846 │ │ + bge.n 41b4e │ │ adds r2, r3, #2 │ │ mov r1, r5 │ │ cmp r2, ip │ │ it cc │ │ addcc.w r1, lr, r2 │ │ ldrsb.w r1, [r1] │ │ cmn.w r1, #65 @ 0x41 │ │ - bgt.n 41846 │ │ + bgt.n 41b4e │ │ adds r2, r3, #3 │ │ mov r1, r5 │ │ cmp r2, ip │ │ it cc │ │ addcc.w r1, lr, r2 │ │ ldrsb.w r1, [r1] │ │ cmn.w r1, #65 @ 0x41 │ │ - bgt.n 41846 │ │ + bgt.n 41b4e │ │ adds r3, #4 │ │ - b.n 4174c │ │ + b.n 41a54 │ │ sub.w r1, ip, r2 │ │ add.w r6, lr, r2 │ │ strd lr, r3, [r9] │ │ strd r6, r1, [r8] │ │ subs r1, r2, r3 │ │ add.w r2, lr, r3 │ │ strd r2, r1, [r9, #8] │ │ ldmia.w sp!, {r8, r9} │ │ pop {r4, r5, r6, pc} │ │ movs r1, #0 │ │ str.w r1, [r9] │ │ ldmia.w sp!, {r8, r9} │ │ pop {r4, r5, r6, pc} │ │ nop │ │ - asrs r6, r6, #11 │ │ - vcge.f q12, q2, #0 │ │ + lsrs r6, r5, #31 │ │ + vclt.s q12, , #0 │ │ vsli.64 d27, d16, #60 @ 0x3c │ │ ldr r5, [r0, #8] │ │ mov r4, r0 │ │ movs r1, #1 │ │ mov r0, r5 │ │ - blx d8840 │ │ + blx d8850 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r5 │ │ movs r1, #0 │ │ - blx d8840 │ │ - ldr r0, [pc, #36] @ (418c0 ) │ │ + blx d8850 │ │ + ldr r0, [pc, #36] @ (41bc8 ) │ │ add r0, pc │ │ ldr r0, [r0, #0] │ │ dmb ish │ │ - cbz r0, 418ae │ │ + cbz r0, 41bb6 │ │ movs r1, #1 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w d8718 │ │ - ldr r0, [pc, #20] @ (418c4 ) │ │ + b.w d8728 │ │ + ldr r0, [pc, #20] @ (41bcc ) │ │ add r0, pc │ │ - bl 7740c │ │ + bl 77474 │ │ movs r1, #1 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w d8718 │ │ - stmia r6!, {r1} │ │ + b.w d8728 │ │ + stmia r3!, {r1, r3} │ │ movs r1, r1 │ │ - stmia r5!, {r2, r3, r5, r6, r7} │ │ + stmia r2!, {r2, r4, r5, r6, r7} │ │ movs r1, r1 │ │ push {r4, lr} │ │ mov r4, r0 │ │ ldr r0, [r0, #16] │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 418d2 │ │ + bne.n 41bda │ │ cmp r1, #1 │ │ - bne.n 418ee │ │ + bne.n 41bf6 │ │ dmb ish │ │ ldr r0, [r4, #16] │ │ - bl 77604 │ │ + bl 7766c │ │ adds r0, r4, #1 │ │ it eq │ │ popeq {r4, pc} │ │ adds r0, r4, #4 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 418fa │ │ + bne.n 41c02 │ │ cmp r1, #1 │ │ - bne.n 4191a │ │ + bne.n 41c22 │ │ dmb ish │ │ mov r0, r4 │ │ ldmia.w sp!, {r4, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ pop {r4, pc} │ │ mov r2, r0 │ │ cmp r1, #8 │ │ ittt ls │ │ cmpls r1, r2 │ │ movls r0, r2 │ │ - bls.w d8724 │ │ + bls.w d8734 │ │ push {r4, lr} │ │ sub sp, #8 │ │ add r0, sp, #4 │ │ movs r4, #0 │ │ str r4, [sp, #4] │ │ cmp r1, #4 │ │ it ls │ │ movls r1, #4 │ │ - blx d8880 │ │ + blx d8890 │ │ ldr r1, [sp, #4] │ │ cmp r0, #0 │ │ it ne │ │ movne r1, r4 │ │ mov r0, r1 │ │ add sp, #8 │ │ pop {r4, pc} │ │ cmp r2, r3 │ │ itt ls │ │ movls r1, r3 │ │ - bls.w d8730 │ │ + bls.w d8740 │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #8 │ │ movs r5, #0 │ │ mov r8, r0 │ │ str r5, [sp, #4] │ │ cmp r2, #4 │ │ it ls │ │ movls r2, #4 │ │ add r0, sp, #4 │ │ mov r4, r1 │ │ mov r1, r2 │ │ mov r2, r3 │ │ mov r7, r3 │ │ - blx d8880 │ │ - cbnz r0, 41994 │ │ + blx d8890 │ │ + cbnz r0, 41c9c │ │ ldr r6, [sp, #4] │ │ - cbz r6, 41994 │ │ + cbz r6, 41c9c │ │ cmp r7, r4 │ │ it cc │ │ movcc r4, r7 │ │ mov r0, r6 │ │ mov r1, r8 │ │ mov r2, r4 │ │ - bl d53c6 │ │ + bl d52ea │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r5, r6 │ │ mov r0, r5 │ │ add sp, #8 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ push {r7, lr} │ │ mov r7, sp │ │ mov.w r0, #1240 @ 0x4d8 │ │ - blx d87f0 │ │ - cbz r0, 419ac │ │ + blx d8810 │ │ + cbz r0, 41cb4 │ │ pop {r7, pc} │ │ movs r0, #8 │ │ mov.w r1, #1240 @ 0x4d8 │ │ - bl 3de2a │ │ + bl 3e132 │ │ sub sp, #8 │ │ - cbz r0, 419c2 │ │ + cbz r0, 41cca │ │ muls r0, r3 │ │ str r2, [sp, #4] │ │ mov r2, sp │ │ - b.n 419c6 │ │ + b.n 41cce │ │ movs r0, #0 │ │ add r2, sp, #4 │ │ str r0, [r2, #0] │ │ ldr r0, [sp, #4] │ │ - cbz r0, 419d8 │ │ + cbz r0, 41ce0 │ │ ldr r0, [sp, #0] │ │ - cbz r0, 419d8 │ │ + cbz r0, 41ce0 │ │ mov r0, r1 │ │ add sp, #8 │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #8 │ │ bx lr │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #116 @ 0x74 │ │ mov r5, r1 │ │ @@ -38090,159 +38283,159 @@ │ │ ldrh.w fp, [r0, #1238] @ 0x4d6 │ │ add.w r8, r5, #1 │ │ add.w r6, r0, r5, lsl #3 │ │ mov r9, r3 │ │ mov sl, r2 │ │ mov r4, r0 │ │ cmp r8, fp │ │ - bls.n 41a0e │ │ + bls.n 41d16 │ │ add r0, sp, #8 │ │ movs r2, #104 @ 0x68 │ │ strd sl, r9, [r6] │ │ - bl d4c50 │ │ - b.n 41a44 │ │ + bl d50a2 │ │ + b.n 41d4c │ │ sub.w r2, fp, r5 │ │ add.w r0, r4, r8, lsl #3 │ │ str r2, [sp, #4] │ │ mov r1, r6 │ │ lsls r2, r2, #3 │ │ - bl d53c2 │ │ + bl d51f6 │ │ ldr r1, [r7, #8] │ │ add r0, sp, #8 │ │ movs r2, #104 @ 0x68 │ │ strd sl, r9, [r6] │ │ movs r6, #104 @ 0x68 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr r2, [sp, #4] │ │ add.w r1, r4, #88 @ 0x58 │ │ mla r0, r8, r6, r1 │ │ mla r1, r5, r6, r1 │ │ muls r2, r6 │ │ - bl d53c2 │ │ + bl d51f6 │ │ movs r0, #104 @ 0x68 │ │ add r1, sp, #8 │ │ mla r0, r5, r0, r4 │ │ movs r2, #104 @ 0x68 │ │ add.w sl, fp, #1 │ │ adds r0, #88 @ 0x58 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add.w r6, r4, #1240 @ 0x4d8 │ │ adds r0, r5, #2 │ │ add.w r9, fp, #2 │ │ cmp r9, r0 │ │ - bls.n 41a78 │ │ + bls.n 41d80 │ │ sub.w r2, fp, r5 │ │ add.w r0, r6, r0, lsl #2 │ │ add.w r1, r6, r8, lsl #2 │ │ lsls r2, r2, #2 │ │ - bl d53ca │ │ + bl d509e │ │ ldr r0, [r7, #12] │ │ cmp r8, r9 │ │ str.w r0, [r6, r8, lsl #2] │ │ strh.w sl, [r4, #1238] @ 0x4d6 │ │ - bcs.n 41aa8 │ │ + bcs.n 41db0 │ │ rsb r0, fp, #0 │ │ addw r1, r5, #311 @ 0x137 │ │ ldr.w r2, [r4, r1, lsl #2] │ │ sub.w r3, r1, #310 @ 0x136 │ │ adds r1, #1 │ │ strh.w r3, [r2, #1236] @ 0x4d4 │ │ str.w r4, [r2, #1232] @ 0x4d0 │ │ adds r2, r0, r1 │ │ cmp.w r2, #312 @ 0x138 │ │ - bne.n 41a8e │ │ + bne.n 41d96 │ │ add sp, #116 @ 0x74 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ push {r7, lr} │ │ mov r7, sp │ │ mov.w r0, #1288 @ 0x508 │ │ - blx d87f0 │ │ - cbz r0, 41ac0 │ │ + blx d8810 │ │ + cbz r0, 41dc8 │ │ pop {r7, pc} │ │ movs r0, #8 │ │ mov.w r1, #1288 @ 0x508 │ │ - bl 3de2a │ │ + bl 3e132 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #124 @ 0x7c │ │ ldr.w r8, [r1] │ │ mov r9, r1 │ │ ldr r4, [r1, #8] │ │ mov fp, r0 │ │ ldr r1, [r7, #8] │ │ ldrh.w r5, [r8, #1238] @ 0x4d6 │ │ add.w sl, r4, #1 │ │ add.w r6, r8, r4, lsl #3 │ │ cmp sl, r5 │ │ - bls.n 41afe │ │ + bls.n 41e06 │ │ add r0, sp, #16 │ │ strd r2, r3, [r6] │ │ movs r2, #104 @ 0x68 │ │ - bl d4c50 │ │ - b.n 41b3e │ │ + bl d50a2 │ │ + b.n 41e46 │ │ str r5, [sp, #12] │ │ add.w r0, r8, sl, lsl #3 │ │ ldr r5, [sp, #12] │ │ mov r1, r6 │ │ str r2, [sp, #8] │ │ subs r5, r5, r4 │ │ str r3, [sp, #4] │ │ lsls r2, r5, #3 │ │ - bl d53c2 │ │ + bl d51f6 │ │ ldrd r1, r0, [sp, #4] │ │ movs r2, #104 @ 0x68 │ │ strd r0, r1, [r6] │ │ add r0, sp, #16 │ │ ldr r1, [r7, #8] │ │ movs r6, #104 @ 0x68 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add.w r1, r8, #88 @ 0x58 │ │ mul.w r2, r5, r6 │ │ ldr r5, [sp, #12] │ │ mla r0, sl, r6, r1 │ │ mla r1, r4, r6, r1 │ │ - bl d53c2 │ │ + bl d51f6 │ │ movs r0, #104 @ 0x68 │ │ add r1, sp, #16 │ │ mla r0, r4, r0, r8 │ │ movs r2, #104 @ 0x68 │ │ adds r0, #88 @ 0x58 │ │ - bl d4c50 │ │ + bl d50a2 │ │ adds r0, r5, #1 │ │ strh.w r0, [r8, #1238] @ 0x4d6 │ │ ldr.w r0, [r9, #4] │ │ str.w r4, [fp, #8] │ │ strd r8, r0, [fp] │ │ add sp, #124 @ 0x7c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #8 │ │ ldr r1, [r0, #0] │ │ - movs r2, #104 @ 0x68 │ │ + movs r2, #16 │ │ str r2, [sp, #0] │ │ movs r2, #1 │ │ movs r3, #8 │ │ - bl 41b8e │ │ + bl 41e96 │ │ movs r2, #1 │ │ movt r2, #32768 @ 0x8000 │ │ cmp r0, r2 │ │ itt eq │ │ addeq sp, #8 │ │ popeq {r7, pc} │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ mov r4, r0 │ │ adds r0, r2, r1 │ │ - bcc.n 41ba0 │ │ + bcc.n 41ea8 │ │ movs r0, #0 │ │ add sp, #24 │ │ pop {r4, r5, r7, pc} │ │ ldrd r1, r2, [r4] │ │ movs r5, #4 │ │ ldr.w ip, [r7, #8] │ │ cmp.w r0, r1, lsl #1 │ │ @@ -38253,133 +38446,133 @@ │ │ it eq │ │ moveq r5, #8 │ │ cmp r0, r5 │ │ it hi │ │ movhi r5, r0 │ │ add r0, sp, #12 │ │ mov r3, r5 │ │ - bl 41be6 │ │ + bl 41eee │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ - bne.n 41bd8 │ │ + bne.n 41ee0 │ │ ldrd r0, r1, [sp, #16] │ │ - b.n 41b9c │ │ + b.n 41ea4 │ │ ldr r0, [sp, #16] │ │ strd r5, r0, [r4] │ │ movs r0, #1 │ │ movt r0, #32768 @ 0x8000 │ │ - b.n 41b9c │ │ + b.n 41ea4 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #8 │ │ ldrd r8, r6, [r7, #8] │ │ mov sl, r0 │ │ add.w r0, r8, r6 │ │ rsb r5, r8, #0 │ │ subs r0, #1 │ │ ands r0, r5 │ │ movs r5, #0 │ │ umull r9, r4, r0, r3 │ │ movs r0, #1 │ │ movs r3, #4 │ │ - cbnz r4, 41c6a │ │ + cbnz r4, 41f72 │ │ rsb r4, r8, #2147483648 @ 0x80000000 │ │ cmp r9, r4 │ │ - bhi.n 41c6a │ │ - cbz r1, 41c24 │ │ + bhi.n 41f72 │ │ + cbz r1, 41f2c │ │ mul.w r0, r1, r6 │ │ mov r1, sp │ │ str.w r8, [sp, #4] │ │ - b.n 41c28 │ │ + b.n 41f30 │ │ movs r0, #0 │ │ add r1, sp, #4 │ │ str r0, [r1, #0] │ │ ldr r0, [sp, #4] │ │ - cbz r0, 41c3e │ │ + cbz r0, 41f46 │ │ ldr r1, [sp, #0] │ │ - cbz r1, 41c48 │ │ + cbz r1, 41f50 │ │ mov r0, r2 │ │ mov r2, r8 │ │ mov r3, r9 │ │ - bl 4194c │ │ - b.n 41c56 │ │ + bl 41c54 │ │ + b.n 41f5e │ │ cmp.w r9, #0 │ │ - bne.n 41c4e │ │ + bne.n 41f56 │ │ mov r0, r8 │ │ - b.n 41c58 │ │ + b.n 41f60 │ │ cmp.w r9, #0 │ │ - beq.n 41c7a │ │ + beq.n 41f82 │ │ mov r0, r9 │ │ mov r1, r8 │ │ - bl 4191c │ │ - cbz r0, 41c60 │ │ + bl 41c24 │ │ + cbz r0, 41f68 │ │ str.w r0, [sl, #4] │ │ movs r0, #0 │ │ - b.n 41c66 │ │ + b.n 41f6e │ │ movs r0, #1 │ │ str.w r8, [sl, #4] │ │ movs r3, #8 │ │ mov r5, r9 │ │ str.w r5, [sl, r3] │ │ str.w r0, [sl] │ │ add sp, #8 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, r8 │ │ - b.n 41c56 │ │ + b.n 41f5e │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #8 │ │ ldr r1, [r0, #0] │ │ - movs r2, #16 │ │ + movs r2, #104 @ 0x68 │ │ str r2, [sp, #0] │ │ movs r2, #1 │ │ movs r3, #8 │ │ - bl 41b8e │ │ + bl 41e96 │ │ movs r2, #1 │ │ movt r2, #32768 @ 0x8000 │ │ cmp r0, r2 │ │ itt eq │ │ addeq sp, #8 │ │ popeq {r7, pc} │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub.w sp, sp, #508 @ 0x1fc │ │ ldrd r9, r4, [r1, #88] @ 0x58 │ │ mov r6, r1 │ │ mov r5, r0 │ │ cmp r4, #0 │ │ - bne.n 41d56 │ │ + bne.n 4205e │ │ ldr r0, [r5, #8] │ │ sub.w sl, r9, #1 │ │ cmp sl, r0 │ │ - bcs.n 41cd4 │ │ + bcs.n 41fdc │ │ ldr r0, [r6, #0] │ │ cmp r0, #0 │ │ - beq.w 41dd6 │ │ + beq.w 420de │ │ ldrd r0, r1, [r6, #4] │ │ - b.n 41dce │ │ - bne.n 41d56 │ │ + b.n 420d6 │ │ + bne.n 4205e │ │ ldr r0, [r5, #20] │ │ cmp r0, #0 │ │ - beq.w 41e10 │ │ + beq.w 42118 │ │ ldr.w r8, [r5, #12] │ │ cmp.w r8, #0 │ │ - beq.w 41e10 │ │ + beq.w 42118 │ │ ldr.w ip, [r5, #16] │ │ mov fp, r5 │ │ str r6, [sp, #76] @ 0x4c │ │ ldrh.w lr, [r8, #1238] @ 0x4d6 │ │ mov.w r2, #4294967295 @ 0xffffffff │ │ mov r0, r8 │ │ mov.w r1, lr, lsl #3 │ │ - cbz r1, 41d3c │ │ + cbz r1, 42044 │ │ ldrd r3, r5, [r0], #8 │ │ subs r1, #8 │ │ adds r2, #1 │ │ subs.w r6, r9, r3 │ │ sbcs.w r6, r4, r5 │ │ mov.w r6, #0 │ │ it cc │ │ @@ -38387,42 +38580,42 @@ │ │ subs.w r3, r3, r9 │ │ sbcs.w r3, r5, r4 │ │ mov.w r3, #0 │ │ it cc │ │ movcc r3, #1 │ │ subs r3, r3, r6 │ │ cmp r3, #1 │ │ - beq.n 41d00 │ │ + beq.n 42008 │ │ ldr r6, [sp, #76] @ 0x4c │ │ uxtb r0, r3 │ │ cmp r0, #0 │ │ - beq.n 41cc6 │ │ + beq.n 41fce │ │ mov r5, fp │ │ - b.n 41d42 │ │ + b.n 4204a │ │ mov r2, lr │ │ mov r5, fp │ │ ldr r6, [sp, #76] @ 0x4c │ │ cmp.w ip, #0 │ │ - beq.n 41e10 │ │ + beq.n 42118 │ │ add.w r0, r8, r2, lsl #2 │ │ sub.w ip, ip, #1 │ │ ldr.w r8, [r0, #1240] @ 0x4d8 │ │ - b.n 41cf2 │ │ + b.n 41ffa │ │ mov ip, r5 │ │ str r6, [sp, #76] @ 0x4c │ │ ldr.w sl, [ip, #12]! │ │ cmp.w sl, #0 │ │ - beq.n 41dda │ │ + beq.n 420e2 │ │ ldr.w lr, [r5, #16] │ │ str r5, [sp, #72] @ 0x48 │ │ ldrh.w r8, [sl, #1238] @ 0x4d6 │ │ mov.w r6, #4294967295 @ 0xffffffff │ │ mov r0, sl │ │ mov.w r3, r8, lsl #3 │ │ - cbz r3, 41dae │ │ + cbz r3, 420b6 │ │ ldrd r1, r2, [r0], #8 │ │ subs r3, #8 │ │ adds r6, #1 │ │ subs.w fp, r9, r1 │ │ sbcs.w r5, r4, r2 │ │ mov.w r5, #0 │ │ it cc │ │ @@ -38430,103 +38623,103 @@ │ │ subs.w r1, r1, r9 │ │ sbcs.w r1, r2, r4 │ │ mov.w r1, #0 │ │ it cc │ │ movcc r1, #1 │ │ subs r1, r1, r5 │ │ cmp r1, #1 │ │ - beq.n 41d78 │ │ + beq.n 42080 │ │ uxtb r0, r1 │ │ - cbz r0, 41dc4 │ │ - b.n 41db0 │ │ + cbz r0, 420cc │ │ + b.n 420b8 │ │ mov r6, r8 │ │ cmp.w lr, #0 │ │ - beq.n 41e3c │ │ + beq.n 42144 │ │ add.w r0, sl, r6, lsl #2 │ │ sub.w lr, lr, #1 │ │ ldr.w sl, [r0, #1240] @ 0x4d8 │ │ - b.n 41d6a │ │ + b.n 42072 │ │ ldr r1, [sp, #76] @ 0x4c │ │ ldr r0, [r1, #0] │ │ - cbz r0, 41dd6 │ │ + cbz r0, 420de │ │ ldrd r0, r1, [r1, #4] │ │ movs r2, #8 │ │ movs r3, #16 │ │ - bl 419b6 │ │ + bl 41cbe │ │ movs r0, #1 │ │ - b.n 41e32 │ │ + b.n 4213a │ │ movs r6, #0 │ │ str.w r9, [sp, #80] @ 0x50 │ │ str.w ip, [sp, #100] @ 0x64 │ │ strd r4, r6, [sp, #84] @ 0x54 │ │ - bl 4199c │ │ + bl 41ca4 │ │ movs r1, #1 │ │ str.w r6, [r0, #1232] @ 0x4d0 │ │ strh.w r1, [r0, #1238] @ 0x4d6 │ │ movs r2, #104 @ 0x68 │ │ ldr r1, [sp, #76] @ 0x4c │ │ strd r0, r6, [r5, #12] │ │ mov r6, r5 │ │ strd r9, r4, [r0], #88 @ 0x58 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr r0, [r6, #20] │ │ adds r0, #1 │ │ str r0, [r6, #20] │ │ - b.n 41e30 │ │ + b.n 42138 │ │ ldr r0, [r5, #0] │ │ cmp sl, r0 │ │ - bne.n 41e1c │ │ + bne.n 42124 │ │ mov r0, r5 │ │ - bl 41b68 │ │ + bl 41f86 │ │ movs r0, #104 @ 0x68 │ │ ldr r1, [r5, #4] │ │ mla r0, sl, r0, r1 │ │ mov r1, r6 │ │ movs r2, #104 @ 0x68 │ │ - bl d4c50 │ │ + bl d50a2 │ │ str.w r9, [r5, #8] │ │ movs r0, #0 │ │ add.w sp, sp, #508 @ 0x1fc │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #0 │ │ str.w r9, [sp, #80] @ 0x50 │ │ str r0, [sp, #92] @ 0x5c │ │ ldrh.w r0, [sl, #1238] @ 0x4d6 │ │ strd r6, ip, [sp, #96] @ 0x60 │ │ cmp r0, #11 │ │ strd r4, sl, [sp, #84] @ 0x54 │ │ - bcs.n 41e6a │ │ + bcs.n 42172 │ │ add r0, sp, #80 @ 0x50 │ │ mov r2, r9 │ │ add.w r1, r0, #8 │ │ ldr r0, [sp, #76] @ 0x4c │ │ str r0, [sp, #0] │ │ add r0, sp, #416 @ 0x1a0 │ │ mov r3, r4 │ │ - bl 41aca │ │ - b.n 421b4 │ │ + bl 41dd2 │ │ + b.n 424bc │ │ cmp r6, #5 │ │ - bcs.n 41e76 │ │ + bcs.n 4217e │ │ mov.w fp, #4 │ │ movs r5, #0 │ │ - b.n 41e92 │ │ - beq.n 41e84 │ │ + b.n 4219a │ │ + beq.n 4218c │ │ cmp r6, #6 │ │ - bne.n 41e8a │ │ + bne.n 42192 │ │ mov.w fp, #5 │ │ movs r6, #0 │ │ - b.n 41e90 │ │ + b.n 42198 │ │ movs r5, #0 │ │ mov fp, r6 │ │ - b.n 41e92 │ │ + b.n 4219a │ │ subs r6, #7 │ │ mov.w fp, #6 │ │ movs r5, #1 │ │ - bl 4199c │ │ + bl 41ca4 │ │ mov r8, r0 │ │ movs r0, #0 │ │ strh.w r0, [r8, #1238] @ 0x4d6 │ │ add.w r3, sl, #88 @ 0x58 │ │ str.w r0, [r8, #1232] @ 0x4d0 │ │ add.w r1, sl, fp, lsl #3 │ │ ldr.w r0, [sl, fp, lsl #3] │ │ @@ -38545,35 +38738,35 @@ │ │ strd r1, r2, [sp, #56] @ 0x38 │ │ add.w r1, r0, #12 │ │ mul.w r0, fp, ip │ │ movs r2, #92 @ 0x5c │ │ ldr r0, [r3, r0] │ │ str r0, [sp, #68] @ 0x44 │ │ add r0, sp, #416 @ 0x1a0 │ │ - bl d52ca │ │ + bl d4c3c │ │ cmp r5, #12 │ │ - bcs.w 421fc │ │ + bcs.w 42504 │ │ str.w fp, [sp, #40] @ 0x28 │ │ add.w fp, fp, #1 │ │ lsls r2, r5, #3 │ │ mov r0, r8 │ │ add.w r1, sl, fp, lsl #3 │ │ - bl d4c50 │ │ + bl d50a2 │ │ movs r1, #104 @ 0x68 │ │ ldr r0, [sp, #44] @ 0x2c │ │ mul.w r2, r5, r1 │ │ mla r1, fp, r1, r0 │ │ add.w r0, r8, #88 @ 0x58 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr r0, [sp, #40] @ 0x28 │ │ add r1, sp, #416 @ 0x1a0 │ │ strh.w r0, [sl, #1238] @ 0x4d6 │ │ add r0, sp, #320 @ 0x140 │ │ movs r2, #92 @ 0x5c │ │ - bl d4c50 │ │ + bl d50a2 │ │ movs r0, #0 │ │ str r6, [sp, #216] @ 0xd8 │ │ str r0, [sp, #212] @ 0xd4 │ │ add r1, sp, #208 @ 0xd0 │ │ ldr r0, [sp, #48] @ 0x30 │ │ mov r2, r9 │ │ mov r3, r4 │ │ @@ -38581,71 +38774,71 @@ │ │ mov r0, r8 │ │ it eq │ │ moveq r0, sl │ │ str r0, [sp, #208] @ 0xd0 │ │ ldr r0, [sp, #76] @ 0x4c │ │ str r0, [sp, #0] │ │ add r0, sp, #416 @ 0x1a0 │ │ - bl 41aca │ │ + bl 41dd2 │ │ ldr.w r9, [sp, #68] @ 0x44 │ │ cmp.w r9, #2 │ │ - beq.w 421b4 │ │ + beq.w 424bc │ │ add r0, sp, #104 @ 0x68 │ │ ldr.w fp, [sp, #60] @ 0x3c │ │ adds r0, #12 │ │ add r1, sp, #320 @ 0x140 │ │ ldr r5, [sp, #56] @ 0x38 │ │ movs r2, #92 @ 0x5c │ │ str r5, [sp, #112] @ 0x70 │ │ strd r9, fp, [sp, #104] @ 0x68 │ │ str r0, [sp, #24] │ │ - bl d52ca │ │ + bl d4c3c │ │ ldr.w r0, [sl, #1232] @ 0x4d0 │ │ ldr r6, [sp, #72] @ 0x48 │ │ cmp r0, #0 │ │ - beq.w 42140 │ │ + beq.w 42448 │ │ mov r2, r0 │ │ ldr r0, [sp, #52] @ 0x34 │ │ str r0, [sp, #48] @ 0x30 │ │ ldr r0, [sp, #64] @ 0x40 │ │ str r0, [sp, #44] @ 0x2c │ │ movs r0, #0 │ │ strd fp, r5, [sp, #12] │ │ str.w r9, [sp, #20] │ │ str r0, [sp, #76] @ 0x4c │ │ ldrh.w r0, [r2, #1238] @ 0x4d6 │ │ mov r5, r2 │ │ ldrh.w r4, [sl, #1236] @ 0x4d4 │ │ cmp r0, #11 │ │ str.w r8, [sp, #40] @ 0x28 │ │ - bcc.w 421b8 │ │ + bcc.w 424c0 │ │ cmp r4, #5 │ │ str r0, [sp, #36] @ 0x24 │ │ - bcs.n 41fb6 │ │ + bcs.n 422be │ │ add r0, sp, #312 @ 0x138 │ │ str r0, [sp, #32] │ │ mov.w r9, #4 │ │ - b.n 41fda │ │ - beq.n 41fc8 │ │ + b.n 422e2 │ │ + beq.n 422d0 │ │ cmp r4, #6 │ │ - bne.n 41fd0 │ │ + bne.n 422d8 │ │ movs r4, #0 │ │ mov.w r9, #5 │ │ add r0, sp, #304 @ 0x130 │ │ str r0, [sp, #32] │ │ - b.n 41fda │ │ + b.n 422e2 │ │ add r0, sp, #312 @ 0x138 │ │ str r0, [sp, #32] │ │ mov r9, r4 │ │ - b.n 41fda │ │ + b.n 422e2 │ │ add r0, sp, #304 @ 0x130 │ │ subs r4, #7 │ │ str r0, [sp, #32] │ │ mov.w r9, #6 │ │ - bl 41ab0 │ │ + bl 41db8 │ │ mov r8, r0 │ │ movs r0, #0 │ │ strh.w r0, [r8, #1238] @ 0x4d6 │ │ add.w r1, r5, r9, lsl #3 │ │ str.w r0, [r8, #1232] @ 0x4d0 │ │ add.w r6, r5, #88 @ 0x58 │ │ ldr.w r0, [r5, r9, lsl #3] │ │ @@ -38664,487 +38857,487 @@ │ │ strd r1, r2, [sp, #56] @ 0x38 │ │ add.w r1, r0, #12 │ │ mul.w r0, r9, r3 │ │ movs r2, #92 @ 0x5c │ │ ldr r0, [r6, r0] │ │ str r0, [sp, #68] @ 0x44 │ │ mov r0, fp │ │ - bl d52ca │ │ + bl d4c3c │ │ cmp.w sl, #12 │ │ - bcs.w 421ce │ │ + bcs.w 424d6 │ │ add.w r4, r9, #1 │ │ mov.w r2, sl, lsl #3 │ │ mov r0, r8 │ │ add.w r1, r5, r4, lsl #3 │ │ - bl d4c50 │ │ + bl d50a2 │ │ movs r0, #104 @ 0x68 │ │ mul.w r2, sl, r0 │ │ mla r1, r4, r0, r6 │ │ add.w r0, r8, #88 @ 0x58 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add r0, sp, #320 @ 0x140 │ │ mov r1, fp │ │ movs r2, #92 @ 0x5c │ │ mov sl, r5 │ │ strh.w r9, [r5, #1238] @ 0x4d6 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldrh.w r6, [r8, #1238] @ 0x4d6 │ │ adds r1, r6, #1 │ │ cmp r6, #12 │ │ - bcs.w 421de │ │ + bcs.w 424e6 │ │ ldr r0, [sp, #36] @ 0x24 │ │ ldr r4, [sp, #76] @ 0x4c │ │ sub.w r0, r0, r9 │ │ cmp r0, r1 │ │ - bne.w 421ec │ │ + bne.w 424f4 │ │ add.w r0, sl, r9, lsl #2 │ │ add.w r5, r8, #1240 @ 0x4d8 │ │ addw r3, r0, #1244 @ 0x4dc │ │ lsls r2, r1, #2 │ │ mov r0, r5 │ │ adds r4, #1 │ │ mov r1, r3 │ │ - bl d52ca │ │ + bl d4c3c │ │ ldr.w r9, [sp, #40] @ 0x28 │ │ movs r0, #0 │ │ ldr.w fp, [sp, #60] @ 0x3c │ │ ldr.w r1, [r5, r0, lsl #2] │ │ cmp r0, r6 │ │ strh.w r0, [r1, #1236] @ 0x4d4 │ │ str.w r8, [r1, #1232] @ 0x4d0 │ │ mov.w r1, #0 │ │ it cc │ │ movcc r1, #1 │ │ - bcs.n 420ca │ │ + bcs.n 423d2 │ │ add r0, r1 │ │ cmp r0, r6 │ │ - bls.n 420ac │ │ + bls.n 423b4 │ │ add r6, sp, #416 @ 0x1a0 │ │ add r1, sp, #320 @ 0x140 │ │ movs r2, #92 @ 0x5c │ │ mov r0, r6 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr r0, [sp, #32] │ │ add r1, sp, #104 @ 0x68 │ │ str.w r8, [sp, #304] @ 0x130 │ │ str.w sl, [sp, #312] @ 0x138 │ │ strd r1, r9, [sp] │ │ ldr r0, [r0, #0] │ │ ldr r1, [sp, #28] │ │ ldrd r3, r2, [sp, #44] @ 0x2c │ │ - bl 419dc │ │ + bl 41ce4 │ │ add r5, sp, #208 @ 0xd0 │ │ mov r1, r6 │ │ movs r2, #92 @ 0x5c │ │ mov r0, r5 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr.w r9, [sp, #68] @ 0x44 │ │ ldr r6, [sp, #72] @ 0x48 │ │ cmp.w r9, #2 │ │ - beq.w 41e08 │ │ + beq.w 42110 │ │ ldr r0, [sp, #24] │ │ mov r1, r5 │ │ ldr r5, [sp, #56] @ 0x38 │ │ movs r2, #92 @ 0x5c │ │ str r4, [sp, #76] @ 0x4c │ │ ldr.w r8, [sp, #304] @ 0x130 │ │ ldr.w sl, [sp, #312] @ 0x138 │ │ str r5, [sp, #112] @ 0x70 │ │ strd r9, fp, [sp, #104] @ 0x68 │ │ - bl d52ca │ │ + bl d4c3c │ │ ldr.w r2, [sl, #1232] @ 0x4d0 │ │ ldr r0, [sp, #52] @ 0x34 │ │ ldr r1, [sp, #64] @ 0x40 │ │ strd fp, r5, [sp, #12] │ │ str.w r9, [sp, #20] │ │ str r0, [sp, #48] @ 0x30 │ │ str r1, [sp, #44] @ 0x2c │ │ - cbz r2, 42148 │ │ - b.n 41f92 │ │ + cbz r2, 42450 │ │ + b.n 4229a │ │ movs r0, #0 │ │ ldr r1, [sp, #64] @ 0x40 │ │ str r0, [sp, #76] @ 0x4c │ │ ldr r0, [sp, #52] @ 0x34 │ │ strd r1, r9, [sp, #64] @ 0x40 │ │ ldr.w r9, [r6, #12] │ │ cmp.w r9, #0 │ │ - beq.n 4220e │ │ + beq.n 42516 │ │ ldr r6, [r6, #16] │ │ mov sl, r0 │ │ - bl 41ab0 │ │ + bl 41db8 │ │ adds r1, r6, #1 │ │ mov r4, r0 │ │ str.w r9, [r0, #1240] @ 0x4d8 │ │ mov.w r0, #0 │ │ strh.w r0, [r4, #1238] @ 0x4d6 │ │ str.w r0, [r4, #1232] @ 0x4d0 │ │ - bcs.n 4221a │ │ + bcs.n 42522 │ │ strh.w r0, [r9, #1236] @ 0x4d4 │ │ ldr r0, [sp, #72] @ 0x48 │ │ str.w r4, [r9, #1232] @ 0x4d0 │ │ strd r4, r1, [r0, #12] │ │ ldr r0, [sp, #76] @ 0x4c │ │ cmp r0, r6 │ │ - bne.n 42224 │ │ + bne.n 4252c │ │ ldr r0, [sp, #68] @ 0x44 │ │ movs r6, #1 │ │ strd r0, fp, [r4, #88] @ 0x58 │ │ movs r2, #92 @ 0x5c │ │ ldr r0, [sp, #64] @ 0x40 │ │ ldr r1, [sp, #24] │ │ str r5, [r4, #96] @ 0x60 │ │ strd sl, r0, [r4] │ │ add.w r0, r4, #100 @ 0x64 │ │ strh.w r6, [r4, #1238] @ 0x4d6 │ │ - bl d52ca │ │ + bl d4c3c │ │ str.w r8, [r4, #1244] @ 0x4dc │ │ strh.w r6, [r8, #1236] @ 0x4d4 │ │ str.w r4, [r8, #1232] @ 0x4d0 │ │ ldr r6, [sp, #72] @ 0x48 │ │ - b.n 41e08 │ │ + b.n 42110 │ │ ldr r0, [sp, #40] @ 0x28 │ │ add r1, sp, #104 @ 0x68 │ │ ldrd r3, r2, [sp, #44] @ 0x2c │ │ strd r1, r0, [sp] │ │ mov r0, r5 │ │ mov r1, r4 │ │ - bl 419dc │ │ - b.n 41e08 │ │ - ldr r3, [pc, #252] @ (422cc ) │ │ + bl 41ce4 │ │ + b.n 42110 │ │ + ldr r3, [pc, #252] @ (425d4 ) │ │ add r3, pc │ │ movs r0, #0 │ │ mov r1, sl │ │ movs r2, #11 │ │ - bl 3f9a8 │ │ - b.n 42234 │ │ - ldr r3, [pc, #240] @ (422d0 ) │ │ + bl 3fcb0 │ │ + b.n 4253c │ │ + ldr r3, [pc, #240] @ (425d8 ) │ │ add r3, pc │ │ movs r0, #0 │ │ movs r2, #12 │ │ - bl 3f9a8 │ │ - b.n 42234 │ │ - ldr r0, [pc, #228] @ (422d4 ) │ │ - ldr r2, [pc, #232] @ (422d8 ) │ │ + bl 3fcb0 │ │ + b.n 4253c │ │ + ldr r0, [pc, #228] @ (425dc ) │ │ + ldr r2, [pc, #232] @ (425e0 ) │ │ add r0, pc │ │ add r2, pc │ │ movs r1, #40 @ 0x28 │ │ - bl 3fa4c │ │ - b.n 42234 │ │ + bl 3fd54 │ │ + b.n 4253c │ │ ldr r6, [sp, #68] @ 0x44 │ │ - ldr r3, [pc, #184] @ (422b8 ) │ │ + ldr r3, [pc, #184] @ (425c0 ) │ │ add r3, pc │ │ movs r0, #0 │ │ mov r1, r5 │ │ movs r2, #11 │ │ - bl 3f9a8 │ │ - b.n 42234 │ │ - ldr r0, [pc, #172] @ (422bc ) │ │ + bl 3fcb0 │ │ + b.n 4253c │ │ + ldr r0, [pc, #172] @ (425c4 ) │ │ mov r6, fp │ │ add r0, pc │ │ - bl 3fa38 │ │ - b.n 42234 │ │ - ldr r0, [pc, #164] @ (422c0 ) │ │ - add r0, pc │ │ - bl 3fa38 │ │ - b.n 42234 │ │ - ldr r0, [pc, #156] @ (422c4 ) │ │ + bl 3fd40 │ │ + b.n 4253c │ │ + ldr r0, [pc, #164] @ (425c8 ) │ │ + add r0, pc │ │ + bl 3fd40 │ │ + b.n 4253c │ │ + ldr r0, [pc, #156] @ (425cc ) │ │ mov r6, fp │ │ - ldr r2, [pc, #156] @ (422c8 ) │ │ + ldr r2, [pc, #156] @ (425d0 ) │ │ add r0, pc │ │ add r2, pc │ │ movs r1, #48 @ 0x30 │ │ - bl 3fa4c │ │ + bl 3fd54 │ │ udf #254 @ 0xfe │ │ udf #254 @ 0xfe │ │ - b.n 4224a │ │ + b.n 42552 │ │ mov r4, r0 │ │ - b.n 422a2 │ │ + b.n 425aa │ │ mov r4, r0 │ │ ldr r0, [r6, #0] │ │ - cbz r0, 422b2 │ │ + cbz r0, 425ba │ │ ldrd r0, r1, [r6, #4] │ │ - b.n 422aa │ │ + b.n 425b2 │ │ mov r4, r0 │ │ - b.n 4227a │ │ - b.n 42258 │ │ + b.n 42582 │ │ + b.n 42560 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ udf #254 @ 0xfe │ │ mov r4, r0 │ │ ldr r0, [sp, #68] @ 0x44 │ │ - cbz r0, 422b2 │ │ + cbz r0, 425ba │ │ mov r0, r6 │ │ mov r1, r5 │ │ - b.n 422aa │ │ + b.n 425b2 │ │ mov r4, r0 │ │ - cbz r6, 42274 │ │ + cbz r6, 4257c │ │ ldrd r1, r0, [sp, #56] @ 0x38 │ │ movs r2, #8 │ │ movs r3, #16 │ │ - bl 419b6 │ │ + bl 41cbe │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #76] @ 0x4c │ │ ldr r0, [r0, #0] │ │ - cbz r0, 422b2 │ │ + cbz r0, 425ba │ │ ldr r0, [sp, #76] @ 0x4c │ │ ldrd r0, r1, [r0, #4] │ │ - b.n 422aa │ │ - b.n 4228a │ │ + b.n 425b2 │ │ + b.n 42592 │ │ mov r4, r0 │ │ ldr r0, [sp, #68] @ 0x44 │ │ - cbz r0, 4229c │ │ + cbz r0, 425a4 │ │ ldrd r1, r0, [sp, #56] @ 0x38 │ │ movs r2, #8 │ │ movs r3, #16 │ │ - bl 419b6 │ │ + bl 41cbe │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #20] │ │ - cbz r0, 422b2 │ │ + cbz r0, 425ba │ │ ldrd r0, r1, [sp, #12] │ │ movs r2, #8 │ │ movs r3, #16 │ │ - bl 419b6 │ │ + bl 41cbe │ │ mov r0, r4 │ │ - blx d6dd0 │ │ - strh r4, [r3, #62] @ 0x3e │ │ + blx d6de0 │ │ + strh r4, [r4, #38] @ 0x26 │ │ movs r1, r1 │ │ - strh r2, [r1, #60] @ 0x3c │ │ + strh r2, [r2, #36] @ 0x24 │ │ movs r1, r1 │ │ - strh r0, [r4, #60] @ 0x3c │ │ + strh r0, [r5, #36] @ 0x24 │ │ movs r1, r1 │ │ - orrs r2, r5 │ │ - vneg.f d24, d0 │ │ + ands r2, r4 │ │ + vcge.f d24, d8, #0 │ │ movs r1, r1 │ │ - ldrh r4, [r1, #0] │ │ + strh r4, [r2, #40] @ 0x28 │ │ movs r1, r1 │ │ - ldrh r4, [r1, #0] │ │ + strh r4, [r2, #40] @ 0x28 │ │ movs r1, r1 │ │ - bics r4, r2 │ │ - vqshl.u64 q12, q5, #61 @ 0x3d │ │ + lsls r4, r1 │ │ + vcge.f q12, q9, #0 │ │ movs r1, r1 │ │ ldr r1, [r0, #0] │ │ cmp r1, #1 │ │ itt eq │ │ ldrdeq r0, r1, [r0, #8] │ │ bxeq lr │ │ ldr r1, [r0, #4] │ │ cmp r1, #6 │ │ itt cc │ │ addcc r0, #8 │ │ bxcc lr │ │ push {r7, lr} │ │ mov r7, sp │ │ - ldr r3, [pc, #12] @ (42304 ) │ │ + ldr r3, [pc, #12] @ (4260c ) │ │ movs r0, #0 │ │ movs r2, #5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ nop │ │ - strh r0, [r3, #32] │ │ + strh r0, [r4, #8] │ │ movs r1, r1 │ │ push {r7, lr} │ │ mov ip, r1 │ │ ldr r1, [r1, #8] │ │ cmp r1, r2 │ │ - bls.n 42364 │ │ + bls.n 4266c │ │ ldr.w r1, [ip, #4] │ │ cmp r1, r2 │ │ - bcc.n 4236a │ │ + bcc.n 42672 │ │ subs r3, r1, r2 │ │ cmp r3, #2 │ │ - bls.n 42356 │ │ + bls.n 4265e │ │ ldr.w r3, [ip] │ │ ldrh.w ip, [r3, r2] │ │ add r2, r3 │ │ ldrb r2, [r2, #2] │ │ orrs.w r2, ip, r2, lsl #16 │ │ - beq.n 42364 │ │ + beq.n 4266c │ │ cmp r1, r2 │ │ - bcc.n 4236a │ │ + bcc.n 42672 │ │ subs r1, r1, r2 │ │ cmp r1, #2 │ │ itttt hi │ │ ldrhhi r1, [r3, r2] │ │ addhi r3, r2 │ │ ldrbhi r3, [r3, #2] │ │ addhi r2, #3 │ │ itttt hi │ │ orrhi.w r1, r1, r3, lsl #16 │ │ strdhi r2, r1, [r0, #4] │ │ movhi r1, #1 │ │ strhi r1, [r0, #0] │ │ it hi │ │ pophi {r7, pc} │ │ - ldr r0, [pc, #36] @ (4237c ) │ │ + ldr r0, [pc, #36] @ (42684 ) │ │ movs r1, #75 @ 0x4b │ │ - ldr r2, [pc, #36] @ (42380 ) │ │ + ldr r2, [pc, #36] @ (42688 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ + bl 3fd54 │ │ movs r1, #0 │ │ str r1, [r0, #0] │ │ pop {r7, pc} │ │ - ldr r3, [pc, #12] @ (42378 ) │ │ + ldr r3, [pc, #12] @ (42680 ) │ │ mov r0, r2 │ │ mov r2, r1 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ nop │ │ - ldrh r4, [r5, #36] @ 0x24 │ │ + ldrh r4, [r6, #12] │ │ movs r1, r1 │ │ - cmp r3, r6 │ │ - vqshlu.s64 q12, q15, #61 @ 0x3d │ │ + subs r7, #171 @ 0xab │ │ + vcgt.f d24, d6, #0 │ │ movs r1, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ sub sp, #12 │ │ mov r8, r0 │ │ mov r0, sp │ │ mov r6, r1 │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r0, [sp, #0] │ │ cmp r0, #1 │ │ - bne.n 423ce │ │ + bne.n 426d6 │ │ ldr.w r9, [sp, #8] │ │ movs r0, #0 │ │ cmp.w r0, r9, lsr #29 │ │ - bne.n 423dc │ │ + bne.n 426e4 │ │ movw r0, #65529 @ 0xfff9 │ │ mov.w r7, r9, lsl #3 │ │ movt r0, #32767 @ 0x7fff │ │ cmp r7, r0 │ │ - bcs.n 423dc │ │ + bcs.n 426e4 │ │ ldr r5, [sp, #4] │ │ - cbz r7, 423e0 │ │ + cbz r7, 426e8 │ │ mov r0, r7 │ │ movs r1, #1 │ │ - blx d8820 │ │ - cbz r0, 4243a │ │ + blx d8830 │ │ + cbz r0, 42742 │ │ mov ip, r9 │ │ cmp.w r9, #0 │ │ - bne.n 423ec │ │ - b.n 42414 │ │ + bne.n 426f4 │ │ + b.n 4271c │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str.w r0, [r8] │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ - bl 3e03c │ │ + bl 3e344 │ │ movs r0, #8 │ │ mov.w ip, #0 │ │ cmp.w r9, #0 │ │ - beq.n 42414 │ │ + beq.n 4271c │ │ ldrd lr, r1, [r6] │ │ subs r2, r1, r5 │ │ mov r4, r9 │ │ mov r6, r0 │ │ cmp r5, r1 │ │ - bhi.n 42422 │ │ + bhi.n 4272a │ │ cmp r2, #7 │ │ - bls.n 4242e │ │ + bls.n 42736 │ │ add.w r7, lr, r5 │ │ ldr.w r3, [lr, r5] │ │ subs r2, #8 │ │ ldr r7, [r7, #4] │ │ adds r5, #8 │ │ subs r4, #1 │ │ strd r3, r7, [r6], #8 │ │ - bne.n 423f6 │ │ + bne.n 426fe │ │ strd ip, r0, [r8] │ │ str.w r9, [r8, #8] │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ - ldr r3, [pc, #36] @ (42448 ) │ │ + ldr r3, [pc, #36] @ (42750 ) │ │ mov r0, r5 │ │ mov r2, r1 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #20] @ (42444 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #20] @ (4274c ) │ │ movs r0, #0 │ │ movs r1, #8 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ movs r0, #8 │ │ mov r1, r7 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - strh r0, [r3, #48] @ 0x30 │ │ + strh r0, [r4, #24] │ │ movs r1, r1 │ │ - ldrh r4, [r2, #28] │ │ + ldrh r4, [r3, #4] │ │ movs r1, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #100 @ 0x64 │ │ cmp r1, #0 │ │ - beq.w 427be │ │ + beq.w 42ac6 │ │ cmp r1, r3 │ │ - bcs.n 42484 │ │ + bcs.n 4278c │ │ cmp r1, #1 │ │ - bne.n 424a2 │ │ + bne.n 427aa │ │ ldrb r0, [r0, #0] │ │ cmp r3, #7 │ │ - bhi.n 424fc │ │ + bhi.n 42804 │ │ subs r1, r3, #1 │ │ ldrb.w r3, [r2], #1 │ │ subs r3, r3, r0 │ │ clz r3, r3 │ │ mov.w r3, r3, lsr #5 │ │ - beq.w 4271e │ │ + beq.w 42a26 │ │ subs r7, r1, #1 │ │ cmp r1, #0 │ │ mov r1, r7 │ │ - bne.n 42468 │ │ - b.n 4271e │ │ - bne.w 42684 │ │ + bne.n 42770 │ │ + b.n 42a26 │ │ + bne.w 4298c │ │ mov r3, r1 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - blx d8860 │ │ + blx d8870 │ │ clz r0, r0 │ │ lsrs r3, r0, #5 │ │ and.w r0, r3, #1 │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ str r1, [sp, #0] │ │ add r1, sp, #32 │ │ mov ip, r0 │ │ mov r0, r1 │ │ mov r1, r2 │ │ mov r2, r3 │ │ mov r3, ip │ │ - bl 41018 │ │ + bl 41320 │ │ ldr r0, [sp, #32] │ │ cmp r0, #1 │ │ - bne.n 42546 │ │ + bne.n 4284e │ │ ldr r5, [sp, #68] @ 0x44 │ │ ldrd r2, ip, [sp, #88] @ 0x58 │ │ sub.w sl, ip, #1 │ │ ldrd lr, r1, [sp, #80] @ 0x50 │ │ adds r0, r5, #1 │ │ str.w sl, [sp, #28] │ │ - beq.w 42660 │ │ + beq.w 42968 │ │ ldr r6, [sp, #60] @ 0x3c │ │ add.w r0, r6, sl │ │ cmp r0, r1 │ │ - bcs.w 42684 │ │ + bcs.w 4298c │ │ ldr r3, [sp, #40] @ 0x28 │ │ str r3, [sp, #24] │ │ ldr r3, [sp, #44] @ 0x2c │ │ str r3, [sp, #20] │ │ ldr.w r8, [sp, #48] @ 0x30 │ │ ldr r7, [sp, #20] │ │ ldr r3, [sp, #56] @ 0x38 │ │ str r3, [sp, #12] │ │ sub.w r3, ip, r3 │ │ str r3, [sp, #8] │ │ str.w r8, [sp, #16] │ │ - b.n 42582 │ │ + b.n 4288a │ │ adds r1, r2, #3 │ │ bic.w r7, r1, #3 │ │ subs r1, r7, r2 │ │ - bne.w 42620 │ │ + bne.w 42928 │ │ sub.w ip, r3, #8 │ │ movs r1, #0 │ │ mov.w r6, #16843009 @ 0x1010101 │ │ movw lr, #256 @ 0x100 │ │ muls r6, r0 │ │ movt lr, #257 @ 0x101 │ │ ldr r4, [r2, r1] │ │ @@ -39155,1159 +39348,2558 @@ │ │ orrs r4, r5 │ │ eor.w r5, r7, r6 │ │ sub.w r7, lr, r5 │ │ orrs r5, r7 │ │ ands r4, r5 │ │ mvns r4, r4 │ │ tst.w r4, #2155905152 @ 0x80808080 │ │ - bne.n 4263c │ │ + bne.n 42944 │ │ adds r1, #8 │ │ cmp r1, ip │ │ - bls.n 4251c │ │ - b.n 4263c │ │ + bls.n 42824 │ │ + b.n 42944 │ │ ldrb.w r0, [sp, #46] @ 0x2e │ │ cmp r0, #0 │ │ - bne.w 42684 │ │ + bne.w 4298c │ │ ldr r2, [sp, #36] @ 0x24 │ │ ldrb.w r3, [sp, #44] @ 0x2c │ │ ldrd r0, r1, [sp, #80] @ 0x50 │ │ cmp r2, #0 │ │ - beq.w 4271a │ │ + beq.w 42a22 │ │ cmp r2, r1 │ │ - bcs.w 42718 │ │ + bcs.w 42a20 │ │ ldrsb r7, [r0, r2] │ │ cmn.w r7, #64 @ 0x40 │ │ - bge.w 4271a │ │ - b.n 427a0 │ │ + bge.w 42a22 │ │ + b.n 42aa8 │ │ add r6, ip │ │ movs r5, #0 │ │ add.w r0, r6, sl │ │ movs r3, #0 │ │ cmp r0, r1 │ │ - bcs.w 4271e │ │ + bcs.w 42a26 │ │ ldrb.w r0, [lr, r0] │ │ ldr r3, [sp, #24] │ │ and.w r0, r0, #63 @ 0x3f │ │ rsb r4, r0, #32 │ │ lsrs r3, r0 │ │ subs r0, #32 │ │ lsl.w r4, r7, r4 │ │ orr.w r3, r3, r4 │ │ it pl │ │ lsrpl.w r3, r7, r0 │ │ lsls r0, r3, #31 │ │ - beq.n 42572 │ │ + beq.n 4287a │ │ mov r4, r8 │ │ add.w fp, lr, r6 │ │ cmp r5, r8 │ │ it hi │ │ movhi r4, r5 │ │ mov r3, ip │ │ mov r0, r4 │ │ cmp r4, ip │ │ it hi │ │ movhi r3, r4 │ │ cmp r3, r0 │ │ - beq.n 425ee │ │ + beq.n 428f6 │ │ mov sl, r0 │ │ add r0, r6 │ │ cmp r0, r1 │ │ - bcs.w 427ca │ │ + bcs.w 42ad2 │ │ ldrb.w r9, [fp, sl] │ │ add.w r0, sl, #1 │ │ ldrb.w r8, [r2, sl] │ │ cmp r8, r9 │ │ - beq.n 425bc │ │ + beq.n 428c4 │ │ ldr.w r8, [sp, #16] │ │ movs r5, #0 │ │ sub.w r0, r6, r8 │ │ add r0, sl │ │ ldr.w sl, [sp, #28] │ │ adds r6, r0, #1 │ │ - b.n 42576 │ │ + b.n 4287e │ │ ldr.w r8, [sp, #16] │ │ ldr.w sl, [sp, #28] │ │ mov r0, r8 │ │ cmp r5, r0 │ │ - bcs.w 427be │ │ + bcs.w 42ac6 │ │ subs r0, #1 │ │ cmp r0, ip │ │ - bcs.w 427da │ │ + bcs.w 42ae2 │ │ adds r3, r0, r6 │ │ cmp r3, r1 │ │ - bcs.w 427e4 │ │ + bcs.w 42aec │ │ ldrb.w r3, [lr, r3] │ │ ldrb r4, [r2, r0] │ │ cmp r4, r3 │ │ - beq.n 425f8 │ │ + beq.n 42900 │ │ ldr r0, [sp, #12] │ │ ldr r5, [sp, #8] │ │ add r6, r0 │ │ - b.n 42576 │ │ + b.n 4287e │ │ subs r7, r2, r7 │ │ mov r6, r2 │ │ ldrb.w r5, [r6], #1 │ │ cmp r5, r0 │ │ - beq.w 427be │ │ + beq.w 42ac6 │ │ adds r7, #1 │ │ - bcc.n 42624 │ │ + bcc.n 4292c │ │ sub.w ip, r3, #8 │ │ cmp r1, ip │ │ - bls.w 4250e │ │ + bls.w 42816 │ │ cmp r3, r1 │ │ - beq.n 42684 │ │ + beq.n 4298c │ │ add r2, r1 │ │ mvns r1, r1 │ │ add r1, r3 │ │ ldrb.w r3, [r2], #1 │ │ subs r3, r3, r0 │ │ clz r3, r3 │ │ mov.w r3, r3, lsr #5 │ │ - beq.n 4271e │ │ + beq.n 42a26 │ │ subs r7, r1, #1 │ │ cmp r1, #0 │ │ mov r1, r7 │ │ - bne.n 42646 │ │ - b.n 4271e │ │ + bne.n 4294e │ │ + b.n 42a26 │ │ ldr r4, [sp, #60] @ 0x3c │ │ add.w r0, r4, sl │ │ cmp r0, r1 │ │ - bcs.n 42684 │ │ + bcs.n 4298c │ │ ldrd r9, r8, [sp, #44] @ 0x2c │ │ sub.w r5, r8, #1 │ │ ldr r3, [sp, #40] @ 0x28 │ │ mov r6, ip │ │ str r3, [sp, #24] │ │ cmp r8, ip │ │ ldr r3, [sp, #56] @ 0x38 │ │ str r3, [sp, #20] │ │ it hi │ │ movhi r6, r8 │ │ - b.n 4269c │ │ + b.n 429a4 │ │ movs r3, #0 │ │ and.w r0, r3, #1 │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add r4, ip │ │ add.w r0, r4, sl │ │ movs r3, #0 │ │ cmp r0, r1 │ │ - bcs.n 4271e │ │ + bcs.n 42a26 │ │ ldrb.w r0, [lr, r0] │ │ ldr r3, [sp, #24] │ │ and.w r0, r0, #63 @ 0x3f │ │ rsb r7, r0, #32 │ │ lsrs r3, r0 │ │ subs r0, #32 │ │ lsl.w r7, r9, r7 │ │ orr.w r3, r3, r7 │ │ it pl │ │ lsrpl.w r3, r9, r0 │ │ lsls r0, r3, #31 │ │ - beq.n 42690 │ │ + beq.n 42998 │ │ add.w r0, lr, r4 │ │ mov fp, r8 │ │ cmp r6, fp │ │ - beq.n 426f2 │ │ + beq.n 429fa │ │ add.w r7, r4, fp │ │ mov r3, fp │ │ cmp r7, r1 │ │ - bcs.w 427ee │ │ + bcs.w 42af6 │ │ ldrb r7, [r0, r3] │ │ add.w fp, r3, #1 │ │ ldrb.w sl, [r2, r3] │ │ cmp sl, r7 │ │ - beq.n 426c6 │ │ + beq.n 429ce │ │ sub.w r0, r4, r8 │ │ ldr.w sl, [sp, #28] │ │ add r0, r3 │ │ adds r4, r0, #1 │ │ - b.n 42692 │ │ + b.n 4299a │ │ ldr.w sl, [sp, #28] │ │ mov r0, r8 │ │ cmp r0, #0 │ │ - beq.n 427be │ │ + beq.n 42ac6 │ │ subs r0, #1 │ │ cmp r5, ip │ │ - bcs.n 427da │ │ + bcs.n 42ae2 │ │ adds r3, r0, r4 │ │ cmp r3, r1 │ │ - bcs.n 427e4 │ │ + bcs.n 42aec │ │ ldrb.w r3, [lr, r3] │ │ ldrb r7, [r2, r0] │ │ cmp r7, r3 │ │ - beq.n 426f8 │ │ + beq.n 42a00 │ │ ldr r0, [sp, #20] │ │ add r4, r0 │ │ - b.n 42692 │ │ - bne.n 427a0 │ │ + b.n 4299a │ │ + bne.n 42aa8 │ │ cmp r2, r1 │ │ - bne.n 42728 │ │ + bne.n 42a30 │ │ and.w r0, r3, #1 │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ adds r6, r0, r2 │ │ ldrsb.w r5, [r6] │ │ cmp.w r5, #4294967295 @ 0xffffffff │ │ uxtb r7, r5 │ │ - bgt.n 42770 │ │ + bgt.n 42a78 │ │ ldrb r4, [r6, #1] │ │ and.w ip, r7, #31 │ │ cmp r7, #224 @ 0xe0 │ │ and.w r4, r4, #63 @ 0x3f │ │ - bcc.n 42766 │ │ + bcc.n 42a6e │ │ ldrb r5, [r6, #2] │ │ cmp r7, #240 @ 0xf0 │ │ and.w r5, r5, #63 @ 0x3f │ │ orr.w r4, r5, r4, lsl #6 │ │ - bcc.n 4276c │ │ + bcc.n 42a74 │ │ ldrb r7, [r6, #3] │ │ and.w r6, ip, #7 │ │ and.w r7, r7, #63 @ 0x3f │ │ orr.w r7, r7, r4, lsl #6 │ │ orr.w r7, r7, r6, lsl #18 │ │ - b.n 42770 │ │ + b.n 42a78 │ │ orr.w r7, r4, ip, lsl #6 │ │ - b.n 42770 │ │ + b.n 42a78 │ │ orr.w r7, r4, ip, lsl #12 │ │ lsls r3, r3, #31 │ │ - bne.n 427be │ │ + bne.n 42ac6 │ │ cmp r7, #128 @ 0x80 │ │ - bcs.n 4277c │ │ + bcs.n 42a84 │ │ movs r3, #1 │ │ - b.n 42790 │ │ + b.n 42a98 │ │ cmp.w r7, #2048 @ 0x800 │ │ - bcs.n 42786 │ │ + bcs.n 42a8e │ │ movs r3, #2 │ │ - b.n 42790 │ │ + b.n 42a98 │ │ movs r3, #4 │ │ cmp.w r7, #65536 @ 0x10000 │ │ it cc │ │ movcc r3, #3 │ │ adds r2, r2, r3 │ │ - beq.n 427ae │ │ + beq.n 42ab6 │ │ cmp r2, r1 │ │ - bcs.n 427ac │ │ + bcs.n 42ab4 │ │ ldrsb r3, [r0, r2] │ │ cmn.w r3, #64 @ 0x40 │ │ - bge.n 427ae │ │ - ldr r3, [pc, #92] @ (42800 ) │ │ + bge.n 42ab6 │ │ + ldr r3, [pc, #92] @ (42b08 ) │ │ add r3, pc │ │ str r3, [sp, #0] │ │ mov r3, r1 │ │ - bl 3fd1c │ │ - bne.n 427a0 │ │ + bl 40024 │ │ + bne.n 42aa8 │ │ cmp r2, r1 │ │ - beq.n 427be │ │ + beq.n 42ac6 │ │ ldrsb r0, [r0, r2] │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 427be │ │ - uxtb r0, r0 │ │ - cmp r0, #224 @ 0xe0 │ │ - movs r3, #1 │ │ - and.w r0, r3, #1 │ │ - add sp, #100 @ 0x64 │ │ + bgt.n 42ac6 │ │ + uxtb r0, r0 │ │ + cmp r0, #224 @ 0xe0 │ │ + movs r3, #1 │ │ + and.w r0, r3, #1 │ │ + add sp, #100 @ 0x64 │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ + ldr r2, [pc, #56] @ (42b0c ) │ │ + adds r0, r6, r4 │ │ + add r2, pc │ │ + cmp r1, r0 │ │ + it hi │ │ + movhi r0, r1 │ │ + bl 3fd7c │ │ + ldr r2, [pc, #48] @ (42b14 ) │ │ + mov r1, ip │ │ + add r2, pc │ │ + bl 3fd7c │ │ + ldr r2, [pc, #40] @ (42b18 ) │ │ + mov r0, r3 │ │ + add r2, pc │ │ + bl 3fd7c │ │ + ldr r2, [pc, #24] @ (42b10 ) │ │ + add.w r0, r4, r8 │ │ + add r2, pc │ │ + cmp r1, r0 │ │ + it hi │ │ + movhi r0, r1 │ │ + bl 3fd7c │ │ + str r3, [sp, #760] @ 0x2f8 │ │ + movs r1, r1 │ │ + str r2, [sp, #344] @ 0x158 │ │ + movs r1, r1 │ │ + str r2, [sp, #192] @ 0xc0 │ │ + movs r1, r1 │ │ + str r2, [sp, #152] @ 0x98 │ │ + movs r1, r1 │ │ + str r2, [sp, #176] @ 0xb0 │ │ + movs r1, r1 │ │ + stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ + sub sp, #12 │ │ + mov r8, r0 │ │ + mov r0, sp │ │ + mov r6, r1 │ │ + bl 42610 │ │ + ldr r0, [sp, #0] │ │ + cmp r0, #1 │ │ + bne.n 42b66 │ │ + ldr.w r9, [sp, #8] │ │ + movs r0, #0 │ │ + cmp.w r0, r9, lsr #30 │ │ + bne.n 42b74 │ │ + movw r0, #65533 @ 0xfffd │ │ + mov.w r7, r9, lsl #2 │ │ + movt r0, #32767 @ 0x7fff │ │ + cmp r7, r0 │ │ + bcs.n 42b74 │ │ + ldr r5, [sp, #4] │ │ + cbz r7, 42b78 │ │ + mov r0, r7 │ │ + movs r1, #1 │ │ + blx d8830 │ │ + cbz r0, 42bca │ │ + mov ip, r9 │ │ + cmp.w r9, #0 │ │ + bne.n 42b84 │ │ + b.n 42ba4 │ │ + mov.w r0, #2147483648 @ 0x80000000 │ │ + str.w r0, [r8] │ │ + add sp, #12 │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ + bl 3e344 │ │ + movs r0, #4 │ │ + mov.w ip, #0 │ │ + cmp.w r9, #0 │ │ + beq.n 42ba4 │ │ + ldrd r7, r1, [r6] │ │ + subs r2, r1, r5 │ │ + mov r4, r9 │ │ + mov r6, r0 │ │ + cmp r5, r1 │ │ + bhi.n 42bb2 │ │ + cmp r2, #3 │ │ + bls.n 42bbe │ │ + ldr r3, [r7, r5] │ │ + subs r2, #4 │ │ + adds r5, #4 │ │ + str.w r3, [r6], #4 │ │ + subs r4, #1 │ │ + bne.n 42b8e │ │ + strd ip, r0, [r8] │ │ + str.w r9, [r8, #8] │ │ + add sp, #12 │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ + ldr r3, [pc, #36] @ (42bd8 ) │ │ + mov r0, r5 │ │ + mov r2, r1 │ │ + add r3, pc │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #20] @ (42bd4 ) │ │ + movs r0, #0 │ │ + movs r1, #4 │ │ + add r3, pc │ │ + bl 3fcb0 │ │ + movs r0, #4 │ │ + mov r1, r7 │ │ + bl 3e2ac │ │ + nop │ │ + ldrb r0, [r1, #26] │ │ + movs r1, r1 │ │ + strh r4, [r4, #32] │ │ + movs r1, r1 │ │ + stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ + sub sp, #12 │ │ + mov r8, r0 │ │ + mov r0, sp │ │ + mov r6, r1 │ │ + bl 42610 │ │ + ldr r0, [sp, #0] │ │ + cmp r0, #1 │ │ + bne.n 42c26 │ │ + ldr.w r9, [sp, #8] │ │ + movs r0, #0 │ │ + cmp.w r0, r9, lsr #29 │ │ + bne.n 42c34 │ │ + movw r0, #65529 @ 0xfff9 │ │ + mov.w r7, r9, lsl #3 │ │ + movt r0, #32767 @ 0x7fff │ │ + cmp r7, r0 │ │ + bcs.n 42c34 │ │ + ldr r5, [sp, #4] │ │ + cbz r7, 42c38 │ │ + mov r0, r7 │ │ + movs r1, #1 │ │ + blx d8830 │ │ + cbz r0, 42c92 │ │ + mov ip, r9 │ │ + cmp.w r9, #0 │ │ + bne.n 42c44 │ │ + b.n 42c6c │ │ + mov.w r0, #2147483648 @ 0x80000000 │ │ + str.w r0, [r8] │ │ + add sp, #12 │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ + bl 3e344 │ │ + movs r0, #8 │ │ + mov.w ip, #0 │ │ + cmp.w r9, #0 │ │ + beq.n 42c6c │ │ + ldrd lr, r1, [r6] │ │ + subs r2, r1, r5 │ │ + mov r4, r9 │ │ + mov r6, r0 │ │ + cmp r5, r1 │ │ + bhi.n 42c7a │ │ + cmp r2, #7 │ │ + bls.n 42c86 │ │ + add.w r7, lr, r5 │ │ + ldr.w r3, [lr, r5] │ │ + subs r2, #8 │ │ + ldr r7, [r7, #4] │ │ + adds r5, #8 │ │ + subs r4, #1 │ │ + strd r3, r7, [r6], #8 │ │ + bne.n 42c4e │ │ + strd ip, r0, [r8] │ │ + str.w r9, [r8, #8] │ │ + add sp, #12 │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ + ldr r3, [pc, #36] @ (42ca0 ) │ │ + mov r0, r5 │ │ + mov r2, r1 │ │ + add r3, pc │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #20] @ (42c9c ) │ │ + movs r0, #0 │ │ + movs r1, #8 │ │ + add r3, pc │ │ + bl 3fcb0 │ │ + movs r0, #8 │ │ + mov r1, r7 │ │ + bl 3e2ac │ │ + nop │ │ + ldrb r0, [r2, #23] │ │ + movs r1, r1 │ │ + strh r4, [r5, #26] │ │ + movs r1, r1 │ │ + stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ + sub sp, #12 │ │ + mov r8, r0 │ │ + mov r0, sp │ │ + mov r6, r1 │ │ + bl 42610 │ │ + ldr r0, [sp, #0] │ │ + cmp r0, #1 │ │ + bne.n 42cf2 │ │ + ldr.w r9, [sp, #8] │ │ + movs r0, #0 │ │ + cmp.w r0, r9, lsr #29 │ │ + bne.n 42d00 │ │ + movw r0, #65533 @ 0xfffd │ │ + mov.w r7, r9, lsl #3 │ │ + movt r0, #32767 @ 0x7fff │ │ + cmp r7, r0 │ │ + bcs.n 42d00 │ │ + ldr.w fp, [sp, #4] │ │ + cbz r7, 42d04 │ │ + mov r0, r7 │ │ + movs r1, #1 │ │ + blx d8830 │ │ + cmp r0, #0 │ │ + beq.n 42d94 │ │ + mov ip, r9 │ │ + cmp.w r9, #0 │ │ + bne.n 42d10 │ │ + b.n 42d62 │ │ + mov.w r0, #2147483648 @ 0x80000000 │ │ + str.w r0, [r8] │ │ + add sp, #12 │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ + bl 3e344 │ │ + movs r0, #4 │ │ + mov.w ip, #0 │ │ + cmp.w r9, #0 │ │ + beq.n 42d62 │ │ + ldrd sl, r2, [r6] │ │ + add.w r1, r9, r9, lsl #1 │ │ + add.w lr, r1, fp │ │ + sub.w r3, r2, fp │ │ + adds r4, r0, #4 │ │ + mov r7, r9 │ │ + b.n 42d32 │ │ + subs r3, #3 │ │ + add.w fp, fp, #3 │ │ + adds r4, #8 │ │ + subs r7, #1 │ │ + beq.n 42d62 │ │ + cmp fp, r2 │ │ + bhi.n 42d88 │ │ + cmp r3, #2 │ │ + bls.n 42d70 │ │ + add.w r6, sl, fp │ │ + ldrh.w r1, [sl, fp] │ │ + ldrb r6, [r6, #2] │ │ + orrs.w r1, r1, r6, lsl #16 │ │ + beq.n 42d26 │ │ + subs r6, r1, #1 │ │ + adds.w r1, r6, lr │ │ + bcs.n 42d7e │ │ + cmp r1, r2 │ │ + bhi.n 42d7e │ │ + add.w r5, sl, lr │ │ + strd r5, r6, [r4, #-4] │ │ + mov lr, r1 │ │ + b.n 42d26 │ │ + strd ip, r0, [r8] │ │ + str.w r9, [r8, #8] │ │ + add sp, #12 │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ + ldr r0, [pc, #40] @ (42d9c ) │ │ + movs r1, #75 @ 0x4b │ │ + ldr r2, [pc, #40] @ (42da0 ) │ │ + add r0, pc │ │ + add r2, pc │ │ + bl 3fd54 │ │ + ldr r3, [pc, #40] @ (42da8 ) │ │ + mov r0, lr │ │ + add r3, pc │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #24] @ (42da4 ) │ │ + mov r0, fp │ │ + mov r1, r2 │ │ + add r3, pc │ │ + bl 3fcb0 │ │ + movs r0, #4 │ │ + mov r1, r7 │ │ + bl 3e2ac │ │ + subs r0, #153 @ 0x99 │ │ + @ instruction: 0xfffd7cf4 │ │ + movs r1, r1 │ │ + strh r6, [r3, #20] │ │ + movs r1, r1 │ │ + strh r2, [r7, #18] │ │ + movs r1, r1 │ │ + cmp r0, #0 │ │ + ittt eq │ │ + clzeq r0, r2 │ │ + lsreq r0, r0, #5 │ │ + bxeq lr │ │ + stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ + sub sp, #16 │ │ + ldrd r4, r8, [sp, #40] @ 0x28 │ │ + mov r7, r0 │ │ + ldr r0, [sp, #48] @ 0x30 │ │ + mov r6, r3 │ │ + mov r5, r1 │ │ + cbz r0, 42e18 │ │ + cmp r2, #0 │ │ + beq.n 42e72 │ │ + mov r3, r5 │ │ + cmp r6, r5 │ │ + it cc │ │ + movcc r3, r6 │ │ + mov r0, r2 │ │ + mov r1, r7 │ │ + mov r2, r3 │ │ + blx d8870 │ │ + cmp r0, #0 │ │ + it eq │ │ + subeq r0, r6, r5 │ │ + movs r6, #0 │ │ + cmp r0, #1 │ │ + it lt │ │ + movlt r6, #1 │ │ + cmp r4, #0 │ │ + beq.n 42e78 │ │ + mov r2, r5 │ │ + mov r0, r4 │ │ + mov r1, r7 │ │ + cmp r8, r5 │ │ + it cc │ │ + movcc r2, r8 │ │ + blx d8870 │ │ + cmp r0, #0 │ │ + it eq │ │ + subeq.w r0, r8, r5 │ │ + mvns r0, r0 │ │ + lsrs r0, r0, #31 │ │ + ands r0, r6 │ │ + add sp, #16 │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ + add r0, sp, #4 │ │ + mov r1, r7 │ │ + mov r7, r2 │ │ + mov r2, r5 │ │ + bl 3e628 │ │ + cbz r7, 42e82 │ │ + ldrd r1, r5, [sp, #8] │ │ + mov r0, r7 │ │ + mov r2, r5 │ │ + cmp r6, r5 │ │ + it cc │ │ + movcc r2, r6 │ │ + blx d8870 │ │ + cmp r0, #0 │ │ + it eq │ │ + subeq r0, r6, r5 │ │ + movs r5, #0 │ │ + cmp r0, #1 │ │ + it lt │ │ + movlt r5, #1 │ │ + cbz r4, 42e88 │ │ + ldrd r1, r6, [sp, #8] │ │ + mov r0, r4 │ │ + mov r2, r6 │ │ + cmp r8, r6 │ │ + it cc │ │ + movcc r2, r8 │ │ + blx d8870 │ │ + cmp r0, #0 │ │ + it eq │ │ + subeq.w r0, r8, r6 │ │ + mvns r0, r0 │ │ + lsrs r0, r0, #31 │ │ + ldr r1, [sp, #4] │ │ + ands r0, r5 │ │ + cbnz r1, 42e92 │ │ + add sp, #16 │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ + movs r6, #1 │ │ + cmp r4, #0 │ │ + bne.n 42df4 │ │ + movs r0, #0 │ │ + ands r0, r6 │ │ + add sp, #16 │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ + movs r5, #1 │ │ + cmp r4, #0 │ │ + bne.n 42e48 │ │ + movs r0, #0 │ │ + ldr r1, [sp, #4] │ │ + ands r0, r5 │ │ + cmp r1, #0 │ │ + beq.n 42e6c │ │ + ldr r1, [sp, #8] │ │ + mov r4, r0 │ │ + mov r0, r1 │ │ + blx d87d0 │ │ + mov r0, r4 │ │ + add sp, #16 │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ + stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ + sub sp, #16 │ │ + ldrd r4, r3, [r1, #16] │ │ + ldrd lr, ip, [sp, #40] @ 0x28 │ │ + cmp r4, r3 │ │ + bls.n 42eda │ │ + ldr r5, [r1, #12] │ │ + sub.w r8, r4, r3 │ │ + adds r6, r3, #1 │ │ + add r5, r3 │ │ + movs r3, #0 │ │ + ldrb r7, [r5, r3] │ │ + sub.w r4, r7, #48 @ 0x30 │ │ + cmp r4, #10 │ │ + bcs.n 42eec │ │ + adds r4, r6, r3 │ │ + adds r3, #1 │ │ + cmp r8, r3 │ │ + str r4, [r1, #20] │ │ + bne.n 42ec2 │ │ + mov r3, r8 │ │ + b.n 42edc │ │ + movs r3, #0 │ │ + strd lr, ip, [sp] │ │ + str r3, [sp, #8] │ │ + bl 42f18 │ │ + add sp, #16 │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ + cmp r7, #46 @ 0x2e │ │ + beq.n 42f08 │ │ + cmp r7, #69 @ 0x45 │ │ + it ne │ │ + cmpne r7, #101 @ 0x65 │ │ + bne.n 42edc │ │ + strd lr, ip, [sp] │ │ + str r3, [sp, #8] │ │ + bl 430fc │ │ + add sp, #16 │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ + strd lr, ip, [sp] │ │ + str r3, [sp, #8] │ │ + bl 42fe4 │ │ + add sp, #16 │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ + push {r4, r5, r6, lr} │ │ + sub sp, #16 │ │ + mov r6, r1 │ │ + mov r4, r0 │ │ + ldrd r0, r1, [sp, #32] │ │ + mov r5, r2 │ │ + bl d50e8 │ │ + ldr r2, [sp, #40] @ 0x28 │ │ + vmov d16, r0, r1 │ │ + cmp r2, #0 │ │ + mov r3, r2 │ │ + it mi │ │ + negmi r3, r2 │ │ + cmp.w r3, #308 @ 0x134 │ │ + bls.n 42f66 │ │ + vldr d17, [pc, #152] @ 42fd8 │ │ + vcmp.f64 d16, #0.0 │ │ + vmrs APSR_nzcv, fpscr │ │ + beq.n 42fba │ │ + cmp.w r2, #4294967295 @ 0xffffffff │ │ + bgt.n 42f90 │ │ + vdiv.f64 d16, d16, d17 │ │ + adds.w r2, r2, #308 @ 0x134 │ │ + mov r3, r2 │ │ + it mi │ │ + negmi r3, r2 │ │ + cmp.w r3, #308 @ 0x134 │ │ + bhi.n 42f42 │ │ + ldr r0, [pc, #120] @ (42fe0 ) │ │ + cmp.w r2, #4294967295 @ 0xffffffff │ │ + add r0, pc │ │ + add.w r0, r0, r3, lsl #3 │ │ + vldr d17, [r0] │ │ + ble.n 42fb6 │ │ + vmul.f64 d16, d16, d17 │ │ + vmov r0, r1, d16 │ │ + bic.w r1, r1, #2147483648 @ 0x80000000 │ │ + eor.w r1, r1, #1879048192 @ 0x70000000 │ │ + eor.w r1, r1, #267386880 @ 0xff00000 │ │ + orrs r0, r1 │ │ + bne.n 42fba │ │ + ldr r0, [r6, #12] │ │ + movs r3, #14 │ │ + ldr r1, [r6, #16] │ │ + ldr r2, [r6, #20] │ │ + str r3, [sp, #4] │ │ + bl 75b90 │ │ + mov r2, r0 │ │ + mov r3, r1 │ │ + add r0, sp, #4 │ │ + mov r1, r2 │ │ + mov r2, r3 │ │ + bl 75cac │ │ + str r0, [r4, #4] │ │ + movs r0, #1 │ │ + str r0, [r4, #0] │ │ + add sp, #16 │ │ + pop {r4, r5, r6, pc} │ │ + vdiv.f64 d16, d16, d17 │ │ + vneg.f64 d17, d16 │ │ + cmp r5, #0 │ │ + it ne │ │ + vmovne.f64 d17, d16 │ │ + movs r0, #0 │ │ + vstr d17, [r4, #8] │ │ + str r0, [r4, #0] │ │ + add sp, #16 │ │ + pop {r4, r5, r6, pc} │ │ + nop │ │ + nop │ │ + nop │ │ + ldmia r0!, {r5, r7} │ │ + strh r3, [r5, #46] @ 0x2e │ │ + ldmia r4, {r0, r1, r4, r5, r6, r7} │ │ + ldrb r1, [r4, #31] │ │ + cmp r8, ip │ │ + vtbl.8 d30, {d13-d14}, d29 │ │ + ldr r7, [pc, #960] @ (433a8 ) │ │ + sub sp, #28 │ │ + str r0, [sp, #12] │ │ + ldrd ip, r0, [r1, #16] │ │ + adds r6, r0, #1 │ │ + ldrd r5, r3, [sp, #64] @ 0x40 │ │ + ldr r7, [sp, #72] @ 0x48 │ │ + cmp r6, ip │ │ + str r6, [r1, #20] │ │ + bcs.n 430ba │ │ + ldr.w lr, [r1, #12] │ │ + movw sl, #39321 @ 0x9999 │ │ + movw fp, #39320 @ 0x9998 │ │ + strd r7, r2, [sp, #4] │ │ + movs r7, #0 │ │ + movt sl, #6553 @ 0x1999 │ │ + movt fp, #39321 @ 0x9999 │ │ + mov.w r8, #10 │ │ + sub.w r0, r6, ip │ │ + str r0, [sp, #0] │ │ + b.n 4303a │ │ + add.w r0, r3, r3, lsl #2 │ │ + adds r6, #1 │ │ + subs r7, #1 │ │ + str r6, [r1, #20] │ │ + lsls r3, r0, #1 │ │ + cmp r6, ip │ │ + umlal r4, r3, r5, r8 │ │ + mov r5, r4 │ │ + beq.n 4309c │ │ + ldrb.w r9, [lr, r6] │ │ + sub.w r4, r9, #48 @ 0x30 │ │ + uxtb r4, r4 │ │ + cmp r4, #10 │ │ + bcs.n 4307a │ │ + subs.w r0, fp, r5 │ │ + sbcs.w r0, sl, r3 │ │ + bcs.n 43024 │ │ + eor.w r0, r3, sl │ │ + eor.w r2, r5, #2576980377 @ 0x99999999 │ │ + orrs r0, r2 │ │ + bne.n 43062 │ │ + cmp r4, #5 │ │ + bls.n 43024 │ │ + ldr r0, [sp, #4] │ │ + add r0, r7 │ │ + str r0, [sp, #72] @ 0x48 │ │ + strd r5, r3, [sp, #64] @ 0x40 │ │ + ldrd r2, r0, [sp, #8] │ │ + add sp, #28 │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ + b.w 43280 │ │ + cbz r7, 430cc │ │ + ldr r0, [sp, #4] │ │ + orr.w r2, r9, #32 │ │ + cmp r2, #101 @ 0x65 │ │ + add r0, r7 │ │ + bne.n 430a4 │ │ + str r0, [sp, #72] @ 0x48 │ │ + strd r5, r3, [sp, #64] @ 0x40 │ │ + ldrd r2, r0, [sp, #8] │ │ + add sp, #28 │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ + b.w 430fc │ │ + ldrd r2, r0, [sp] │ │ + add r0, r2 │ │ + b.n 430a6 │ │ + mov r4, r5 │ │ + ldr r2, [sp, #8] │ │ + str r0, [sp, #72] @ 0x48 │ │ + strd r4, r3, [sp, #64] @ 0x40 │ │ + ldr r0, [sp, #12] │ │ + add sp, #28 │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ + b.w 42f18 │ │ + ldr r1, [r1, #12] │ │ + movs r2, #5 │ │ + str r2, [sp, #16] │ │ + adds r2, r0, #2 │ │ + cmp r2, ip │ │ + it cs │ │ + movcs r2, ip │ │ + mov r0, r1 │ │ + b.n 430da │ │ + movs r0, #13 │ │ + adds r2, r6, #1 │ │ + str r0, [sp, #16] │ │ + mov r0, lr │ │ + cmp r2, ip │ │ + it cs │ │ + movcs r2, ip │ │ + mov r1, ip │ │ + bl 75b90 │ │ + mov r2, r0 │ │ + mov r3, r1 │ │ + add r0, sp, #16 │ │ + mov r1, r2 │ │ + mov r2, r3 │ │ + bl 75cac │ │ + ldr r1, [sp, #12] │ │ + movs r2, #1 │ │ + strd r2, r0, [r1] │ │ + add sp, #28 │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ + stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ + sub sp, #12 │ │ + ldrd ip, r6, [r1, #16] │ │ + adds r3, r6, #1 │ │ + ldrd r9, r8, [sp, #48] @ 0x30 │ │ + ldr.w fp, [sp, #56] @ 0x38 │ │ + cmp r3, ip │ │ + str r3, [r1, #20] │ │ + bcs.n 43130 │ │ + ldr r7, [r1, #12] │ │ + mov.w sl, #1 │ │ + ldrb r7, [r7, r3] │ │ + cmp r7, #43 @ 0x2b │ │ + beq.n 4312a │ │ + cmp r7, #45 @ 0x2d │ │ + bne.n 43134 │ │ + mov.w sl, #0 │ │ + adds r3, r6, #2 │ │ + str r3, [r1, #20] │ │ + b.n 43134 │ │ + mov.w sl, #1 │ │ + cmp r3, ip │ │ + bcs.n 431bc │ │ + ldr.w lr, [r1, #12] │ │ + ldrb.w r4, [lr, r3] │ │ + adds r3, #1 │ │ + str r3, [r1, #20] │ │ + subs r4, #48 @ 0x30 │ │ + uxtb r4, r4 │ │ + cmp r4, #10 │ │ + bcs.n 431e8 │ │ + cmp r3, ip │ │ + bcs.n 4319c │ │ + movw r6, #52427 @ 0xcccb │ │ + movt r6, #3276 @ 0xccc │ │ + b.n 43166 │ │ + add.w r4, r4, r4, lsl #2 │ │ + cmp ip, r3 │ │ + add.w r4, r7, r4, lsl #1 │ │ + beq.n 4319c │ │ + ldrb.w r7, [lr, r3] │ │ + subs r7, #48 @ 0x30 │ │ + uxtb r7, r7 │ │ + cmp r7, #10 │ │ + bcs.n 4319c │ │ + adds r3, #1 │ │ + cmp r4, r6 │ │ + str r3, [r1, #20] │ │ + ble.n 4315a │ │ + adds r5, r6, #1 │ │ + cmp r4, r5 │ │ + bne.n 43184 │ │ + cmp r7, #7 │ │ + bls.n 4315a │ │ + orr.w r3, r9, r8 │ │ + str.w sl, [sp, #48] @ 0x30 │ │ + clz r3, r3 │ │ + lsrs r3, r3, #5 │ │ + add sp, #12 │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ + b.w 431f8 │ │ + qsub r3, fp, r4 │ │ + str.w r9, [sp, #48] @ 0x30 │ │ + cmp.w sl, #0 │ │ + it ne │ │ + qaddne r3, fp, r4 │ │ + strd r8, r3, [sp, #52] @ 0x34 │ │ + add sp, #12 │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ + b.w 42f18 │ │ + ldr r1, [r1, #12] │ │ + movs r2, #5 │ │ + mov r4, r0 │ │ + str r2, [sp, #0] │ │ + mov r0, r1 │ │ + mov r1, ip │ │ + mov r2, r3 │ │ + bl 75b90 │ │ + mov r2, r0 │ │ + mov r3, r1 │ │ + mov r1, r2 │ │ + mov r0, sp │ │ + mov r2, r3 │ │ + bl 75cac │ │ + movs r1, #1 │ │ + strd r1, r0, [r4] │ │ + add sp, #12 │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ + movs r1, #13 │ │ + mov r4, r0 │ │ + mov r0, lr │ │ + str r1, [sp, #0] │ │ + b.n 431c6 │ │ + bmi.n 4319e │ │ + bmi.n 431a0 │ │ + bmi.n 431a2 │ │ + push {r4, lr} │ │ + sub sp, #16 │ │ + cbnz r3, 43202 │ │ + ldr r3, [sp, #24] │ │ + cbnz r3, 4323c │ │ + ldrd ip, r3, [r1, #16] │ │ + cmp r3, ip │ │ + bcs.n 43220 │ │ + ldr.w lr, [r1, #12] │ │ + ldrb.w r4, [lr, r3] │ │ + subs r4, #48 @ 0x30 │ │ + cmp r4, #10 │ │ + bcs.n 43220 │ │ + adds r3, #1 │ │ + str r3, [r1, #20] │ │ + cmp ip, r3 │ │ + bne.n 4320e │ │ + vldr d17, [pc, #84] @ 43278 │ │ + cmp r2, #0 │ │ + vldr d16, [pc, #72] @ 43270 │ │ + it ne │ │ + vmovne.f64 d17, d16 │ │ + vstr d17, [r0, #8] │ │ + movs r1, #0 │ │ + str r1, [r0, #0] │ │ + add sp, #16 │ │ + pop {r4, pc} │ │ + ldrd ip, r3, [r1, #12] │ │ + mov r4, r0 │ │ + ldr r2, [r1, #20] │ │ + movs r1, #14 │ │ + str r1, [sp, #4] │ │ + mov r1, r3 │ │ + mov r0, ip │ │ + bl 75b90 │ │ + mov r2, r0 │ │ + mov r3, r1 │ │ + add r0, sp, #4 │ │ + mov r1, r2 │ │ + mov r2, r3 │ │ + bl 75cac │ │ + mov r1, r0 │ │ + mov r0, r4 │ │ + str r1, [r4, #4] │ │ + movs r1, #1 │ │ + str r1, [r0, #0] │ │ + add sp, #16 │ │ + pop {r4, pc} │ │ + nop │ │ + nop │ │ + ... │ │ + movs r0, r0 │ │ + strh r0, [r0, #0] │ │ + stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ + ldrd r4, r5, [r1, #16] │ │ + ldrd lr, ip, [sp, #24] │ │ + ldr.w r8, [sp, #32] │ │ + cmp r5, r4 │ │ + bcs.n 432c2 │ │ + ldr r6, [r1, #12] │ │ + ldrb r7, [r6, r5] │ │ + sub.w r3, r7, #48 @ 0x30 │ │ + cmp r3, #9 │ │ + bhi.n 432aa │ │ + adds r5, #1 │ │ + str r5, [r1, #20] │ │ + cmp r4, r5 │ │ + bne.n 43296 │ │ + b.n 432c2 │ │ + orr.w r3, r7, #32 │ │ + cmp r3, #101 @ 0x65 │ │ + bne.n 432c2 │ │ + str.w r8, [sp, #32] │ │ + strd lr, ip, [sp, #24] │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, lr} │ │ + b.w 430fc │ │ + str.w r8, [sp, #32] │ │ + strd lr, ip, [sp, #24] │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, lr} │ │ + b.w 42f18 │ │ + bmi.n 4327e │ │ + push {r4, r5, r6, r7, lr} │ │ + sub sp, #4 │ │ + ldrb r1, [r0, #0] │ │ + tbb [pc, r1] │ │ + asrs r0, r2, #32 │ │ + asrs r0, r2, #32 │ │ + asrs r0, r2, #32 │ │ + asrs r6, r3, #8 │ │ + asrs r2, r2, #8 │ │ + asrs r2, r2, #32 │ │ + asrs r0, r2, #32 │ │ + asrs r0, r2, #32 │ │ + asrs r6, r3, #8 │ │ + asrs r2, r2, #8 │ │ + asrs r2, r2, #32 │ │ + subs r6, #16 │ │ + ldr r1, [r6, #32] │ │ + asrs r4, r3, #32 │ │ + ldrsh r4, [r3, r0] │ │ + ldr r2, [pc, #336] @ (43450 ) │ │ + add sp, #4 │ │ + pop {r4, r5, r6, r7, pc} │ │ + ldr r1, [r0, #4] │ │ + cmp r1, #0 │ │ + beq.n 432fe │ │ + ldr r4, [r0, #8] │ │ + mov r0, r4 │ │ + add sp, #4 │ │ + ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ + b.w d871c │ │ + ldr r4, [r0, #4] │ │ + b.n 433a0 │ │ + ldr r1, [r0, #4] │ │ + lsls r1, r1, #1 │ │ + beq.n 4332c │ │ + ldr r1, [r0, #8] │ │ + mov r4, r0 │ │ + mov r0, r1 │ │ + blx d87d0 │ │ + mov r0, r4 │ │ + ldr r1, [r0, #16] │ │ + lsls r1, r1, #1 │ │ + beq.n 432fe │ │ + ldr r4, [r0, #20] │ │ + mov r0, r4 │ │ + add sp, #4 │ │ + ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ + b.w d871c │ │ + ldrd r4, r7, [r0, #8] │ │ + mov r6, r0 │ │ + cmp r7, #0 │ │ + beq.n 433c8 │ │ + mov r5, r4 │ │ + mov r0, r5 │ │ + bl 432d4 │ │ + adds r5, #72 @ 0x48 │ │ + subs r7, #1 │ │ + bne.n 4334c │ │ + b.n 433c8 │ │ + ldrd r4, r7, [r0, #8] │ │ + mov r6, r0 │ │ + cbz r7, 433c8 │ │ + mov r5, r4 │ │ + mov r0, r5 │ │ + bl 432d4 │ │ + adds r5, #72 @ 0x48 │ │ + subs r7, #1 │ │ + bne.n 43364 │ │ + b.n 433c8 │ │ + ldr r1, [r0, #48] @ 0x30 │ │ + cmp r1, #0 │ │ + beq.n 432fe │ │ + ldr r4, [r0, #52] @ 0x34 │ │ + mov r0, r4 │ │ + add sp, #4 │ │ + ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ + b.w d871c │ │ + ldr r1, [r0, #48] @ 0x30 │ │ + cbz r1, 43396 │ │ + ldr r1, [r0, #52] @ 0x34 │ │ + mov r4, r0 │ │ + mov r0, r1 │ │ + blx d87d0 │ │ + mov r0, r4 │ │ + ldr r4, [r0, #64] @ 0x40 │ │ + b.n 433a0 │ │ + ldr r4, [r0, #8] │ │ + cmp r4, #0 │ │ + beq.n 432fe │ │ + mov r0, r4 │ │ + bl 432d4 │ │ + mov r0, r4 │ │ + add sp, #4 │ │ + ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ + b.w d871c │ │ + ldrd r4, r7, [r0, #8] │ │ + mov r6, r0 │ │ + cbz r7, 433c8 │ │ + mov r5, r4 │ │ + mov r0, r5 │ │ + bl 432d4 │ │ + adds r5, #72 @ 0x48 │ │ + subs r7, #1 │ │ + bne.n 433bc │ │ + ldr r0, [r6, #4] │ │ + cmp r0, #0 │ │ + beq.n 432fe │ │ + mov r0, r4 │ │ + add sp, #4 │ │ + ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ + b.w d871c │ │ + stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ + sub.w sp, sp, #4096 @ 0x1000 │ │ + sub sp, #12 │ │ + movw r3, #3392 @ 0xd40 │ │ + sub.w r2, r1, r1, lsr #1 │ │ + movt r3, #3 │ │ + cmp r1, r3 │ │ + it cc │ │ + movcc r3, r1 │ │ + cmp r3, r2 │ │ + it ls │ │ + movls r3, r2 │ │ + cmp r3, #48 @ 0x30 │ │ + mov r4, r3 │ │ + it ls │ │ + movls r4, #48 @ 0x30 │ │ + cmp r3, #103 @ 0x67 │ │ + bcs.n 43424 │ │ + movs r2, #0 │ │ + cmp r1, #65 @ 0x41 │ │ + it cc │ │ + movcc r2, #1 │ │ + str r2, [sp, #0] │ │ + add r2, sp, #8 │ │ + movs r3, #102 @ 0x66 │ │ + bl 4347e │ │ + add.w sp, sp, #4096 @ 0x1000 │ │ + add sp, #12 │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ + movw r3, #13108 @ 0x3334 │ │ + movt r3, #819 @ 0x333 │ │ + cmp r2, r3 │ │ + bcc.n 43434 │ │ + bl 3e344 │ │ + add.w r2, r4, r4, lsl #2 │ │ + movs r7, #0 │ │ + lsls r6, r2, #3 │ │ + beq.n 43452 │ │ + mov r8, r0 │ │ + mov r0, r6 │ │ + mov r9, r1 │ │ + blx d8810 │ │ + cbz r0, 43476 │ │ + mov r5, r0 │ │ + mov r1, r9 │ │ + mov r0, r8 │ │ + b.n 43456 │ │ + movs r5, #8 │ │ + movs r4, #0 │ │ + mov r2, r5 │ │ + mov r3, r4 │ │ + cmp r1, #65 @ 0x41 │ │ + it cc │ │ + movcc r7, #1 │ │ + str r7, [sp, #0] │ │ + bl 4347e │ │ + mov r0, r5 │ │ + add.w sp, sp, #4096 @ 0x1000 │ │ + add sp, #12 │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ + b.w d871c │ │ + movs r0, #8 │ │ + mov r1, r6 │ │ + bl 3e2ac │ │ + stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ + sub sp, #412 @ 0x19c │ │ + mov sl, r1 │ │ + mov r8, r3 │ │ + str r2, [sp, #76] @ 0x4c │ │ + mov.w r1, #1073741824 @ 0x40000000 │ │ + str r0, [sp, #52] @ 0x34 │ │ + movs r0, #0 │ │ + mov r2, sl │ │ + movs r3, #0 │ │ + bl d53dc │ │ + umull r2, r3, r0, sl │ │ + adds r7, r0, #1 │ │ + adc.w r6, r1, #0 │ │ + mla r3, r1, sl, r3 │ │ + eor.w r3, r3, #1073741824 @ 0x40000000 │ │ + orrs r2, r3 │ │ + it eq │ │ + moveq r6, r1 │ │ + str r6, [sp, #20] │ │ + it eq │ │ + moveq r7, r0 │ │ + cmp.w sl, #4096 @ 0x1000 │ │ + str r7, [sp, #24] │ │ + bhi.n 434cc │ │ + sub.w r0, sl, sl, lsr #1 │ │ + cmp r0, #64 @ 0x40 │ │ + it cs │ │ + movcs r0, #64 @ 0x40 │ │ + b.n 434ee │ │ + orr.w r0, sl, #1 │ │ + movs r2, #1 │ │ + clz r0, r0 │ │ + eor.w r0, r0, #31 │ │ + and.w r1, r0, #1 │ │ + add.w r0, r1, r0, lsr #1 │ │ + lsr.w r1, sl, r0 │ │ + lsl.w r0, r2, r0 │ │ + add r0, r1 │ │ + lsrs r0, r0, #1 │ │ + str r0, [sp, #28] │ │ + add.w fp, sp, #346 @ 0x15a │ │ + ldr r0, [sp, #52] @ 0x34 │ │ + mov.w r9, #1 │ │ + movs r4, #0 │ │ + strd r8, sl, [sp, #36] @ 0x24 │ │ + sub.w r1, r0, #40 @ 0x28 │ │ + str r1, [sp, #16] │ │ + sub.w r1, r0, #20 │ │ + str r1, [sp, #8] │ │ + movs r1, #0 │ │ + adds r0, #104 @ 0x68 │ │ + str r0, [sp, #12] │ │ + add.w ip, r4, r4, lsl #2 │ │ + cmp sl, r4 │ │ + str r4, [sp, #60] @ 0x3c │ │ + bhi.n 4352a │ │ + movs r0, #1 │ │ + movs r2, #0 │ │ + str r0, [sp, #48] @ 0x30 │ │ + cmp r1, #2 │ │ + bcs.w 43746 │ │ + b.n 4393a │ │ + ldr r0, [sp, #52] @ 0x34 │ │ + sub.w r7, sl, r4 │ │ + str r1, [sp, #68] @ 0x44 │ │ + add.w r3, r0, ip, lsl #3 │ │ + ldr r0, [sp, #28] │ │ + cmp r7, r0 │ │ + bcs.n 4355e │ │ + ldr r0, [sp, #448] @ 0x1c0 │ │ + cbz r0, 43598 │ │ + movs r0, #0 │ │ + cmp r7, #32 │ │ + strd r0, r0, [sp] │ │ + it cs │ │ + movcs r7, #32 │ │ + ldr r2, [sp, #76] @ 0x4c │ │ + mov r0, r3 │ │ + mov r1, r7 │ │ + mov r3, r8 │ │ + mov r6, ip │ │ + bl 43994 │ │ + mov ip, r6 │ │ + b.n 436f0 │ │ + cmp r7, #2 │ │ + bcc.w 436f0 │ │ + ldrd r1, r5, [r3, #20] │ │ + ldrd r0, r6, [r3, #60] @ 0x3c │ │ + mov r2, r5 │ │ + str.w ip, [sp, #64] @ 0x40 │ │ + cmp r6, r5 │ │ + str r3, [sp, #56] @ 0x38 │ │ + it cc │ │ + movcc r2, r6 │ │ + mov r4, r0 │ │ + blx d8870 │ │ + cmp r0, #0 │ │ + it eq │ │ + subeq r0, r6, r5 │ │ + cmp r0, #0 │ │ + bmi.n 435a4 │ │ + ldr.w ip, [sp, #64] @ 0x40 │ │ + cmp r7, #2 │ │ + bne.n 435b4 │ │ + movs r7, #2 │ │ + ldr r4, [sp, #60] @ 0x3c │ │ + b.n 436f0 │ │ + ldr r0, [sp, #28] │ │ + cmp r7, r0 │ │ + it cs │ │ + movcs r7, r0 │ │ + lsls r3, r7, #1 │ │ + b.n 436f4 │ │ + ldr.w ip, [sp, #64] @ 0x40 │ │ + cmp r7, #2 │ │ + bne.n 435f2 │ │ + mov.w sl, #2 │ │ + movs r0, #1 │ │ + b.n 4365a │ │ + str r0, [sp, #48] @ 0x30 │ │ + mov.w sl, #2 │ │ + ldr r0, [sp, #12] │ │ + mov r1, r4 │ │ + str r7, [sp, #72] @ 0x48 │ │ + add.w r7, r0, ip, lsl #3 │ │ + ldrd r4, r5, [r7, #-4] │ │ + mov r2, r6 │ │ + cmp r5, r6 │ │ + it cc │ │ + movcc r2, r5 │ │ + mov r0, r4 │ │ + blx d8870 │ │ + cmp r0, #0 │ │ + it eq │ │ + subeq r0, r5, r6 │ │ + cmp r0, #0 │ │ + bmi.n 43636 │ │ + adds r7, #40 @ 0x28 │ │ + add.w sl, sl, #1 │ │ + ldr r0, [sp, #72] @ 0x48 │ │ + mov r6, r5 │ │ + mov r1, r4 │ │ + cmp r0, sl │ │ + bne.n 435c4 │ │ + b.n 43630 │ │ + str r0, [sp, #48] @ 0x30 │ │ + mov.w sl, #2 │ │ + ldr r0, [sp, #12] │ │ + mov r1, r4 │ │ + str r7, [sp, #72] @ 0x48 │ │ + add.w r7, r0, ip, lsl #3 │ │ + ldrd r4, r5, [r7, #-4] │ │ + mov r2, r6 │ │ + cmp r5, r6 │ │ + it cc │ │ + movcc r2, r5 │ │ + mov r0, r4 │ │ + blx d8870 │ │ + cmp r0, #0 │ │ + it eq │ │ + subeq r0, r5, r6 │ │ + cmp.w r0, #4294967295 @ 0xffffffff │ │ + bgt.n 43636 │ │ + adds r7, #40 @ 0x28 │ │ + add.w sl, sl, #1 │ │ + ldr r0, [sp, #72] @ 0x48 │ │ + mov r6, r5 │ │ + mov r1, r4 │ │ + cmp r0, sl │ │ + bne.n 43602 │ │ + ldr r7, [sp, #72] @ 0x48 │ │ + mov sl, r7 │ │ + b.n 43638 │ │ + ldr r7, [sp, #72] @ 0x48 │ │ + add.w ip, sp, #56 @ 0x38 │ │ + ldr r0, [sp, #28] │ │ + ldmia.w ip, {r3, r4, ip} │ │ + cmp sl, r0 │ │ + bcc.w 4353c │ │ + ldr r0, [sp, #48] @ 0x30 │ │ + cmp r0, #0 │ │ + bmi.n 43652 │ │ + mov r7, sl │ │ + b.n 436f0 │ │ + movs.w r0, sl, lsr #1 │ │ + beq.w 43960 │ │ + add.w r1, sl, sl, lsl #2 │ │ + ldr r2, [sp, #8] │ │ + ldr r3, [sp, #52] @ 0x34 │ │ + add.w r1, r2, r1, lsl #3 │ │ + mov.w r2, ip, lsl #3 │ │ + str.w sl, [sp, #72] @ 0x48 │ │ + adds r7, r1, r2 │ │ + ldr r6, [r3, r2] │ │ + sub.w lr, r7, #20 │ │ + subs r0, #1 │ │ + ldmia.w lr, {r5, sl, ip, lr} │ │ + str r5, [r3, r2] │ │ + add.w r5, r3, r2 │ │ + add.w r3, r3, #40 @ 0x28 │ │ + str.w r6, [r7, #-20] │ │ + ldrd r6, r4, [r5, #4] │ │ + str.w r6, [r7, #-16] │ │ + ldr.w r6, [r7, #-4] │ │ + ldrd r8, fp, [r5, #12] │ │ + str r6, [r5, #16] │ │ + ldr r6, [r1, r2] │ │ + str.w r4, [r7, #-12] │ │ + ldr r4, [r5, #20] │ │ + str r4, [r1, r2] │ │ + sub.w r1, r1, #40 @ 0x28 │ │ + str r6, [r5, #20] │ │ + ldr r6, [r5, #24] │ │ + ldr r4, [r7, #4] │ │ + str r4, [r5, #24] │ │ + str r6, [r7, #4] │ │ + ldr r6, [r5, #28] │ │ + ldr r4, [r7, #8] │ │ + str r4, [r5, #28] │ │ + str r6, [r7, #8] │ │ + ldr r6, [r5, #32] │ │ + ldr r4, [r7, #12] │ │ + str r4, [r5, #32] │ │ + str r6, [r7, #12] │ │ + ldr r6, [r5, #36] @ 0x24 │ │ + ldr r4, [r7, #16] │ │ + str.w sl, [r5, #4] │ │ + str.w ip, [r5, #8] │ │ + str.w lr, [r5, #12] │ │ + str.w r8, [r7, #-8] │ │ + str.w fp, [r7, #-4] │ │ + str r4, [r5, #36] @ 0x24 │ │ + str r6, [r7, #16] │ │ + bne.n 4366e │ │ + ldr r7, [sp, #72] @ 0x48 │ │ + add.w fp, sp, #346 @ 0x15a │ │ + ldr.w r8, [sp, #36] @ 0x24 │ │ + ldrd r4, ip, [sp, #60] @ 0x3c │ │ + lsls r0, r7, #1 │ │ + adds r3, r0, #1 │ │ + sub.w r0, r4, r9, lsr #1 │ │ + ldr r6, [sp, #24] │ │ + adds r0, r0, r4 │ │ + ldr r4, [sp, #20] │ │ + str r3, [sp, #48] @ 0x30 │ │ + mov.w r3, r3, lsr #1 │ │ + umull r1, r2, r0, r6 │ │ + mla r0, r0, r4, r2 │ │ + ldr r2, [sp, #60] @ 0x3c │ │ + add.w r2, r3, r2, lsl #1 │ │ + umull r3, r7, r6, r2 │ │ + mla r2, r4, r2, r7 │ │ + mov.w r7, #0 │ │ + adc.w r7, r7, #0 │ │ + eors r1, r3 │ │ + ldr r4, [sp, #60] @ 0x3c │ │ + mla r0, r7, r6, r0 │ │ + clz r1, r1 │ │ + eors r0, r2 │ │ + add.w r2, r1, #32 │ │ + it ne │ │ + clzne r2, r0 │ │ + ldr.w sl, [sp, #40] @ 0x28 │ │ + ldr r1, [sp, #68] @ 0x44 │ │ + cmp r1, #2 │ │ + bcc.w 4393a │ │ + ldr r0, [sp, #16] │ │ + str r2, [sp, #56] @ 0x38 │ │ + add.w r0, r0, ip, lsl #3 │ │ + str r0, [sp, #32] │ │ + ldr r0, [sp, #52] @ 0x34 │ │ + add.w r0, r0, ip, lsl #3 │ │ + str r0, [sp, #72] @ 0x48 │ │ + b.n 43764 │ │ + mov.w r9, r5, lsl #1 │ │ + cmp r3, #1 │ │ + bls.w 43938 │ │ + subs r3, r1, #1 │ │ + ldrb.w r0, [fp, r3] │ │ + cmp r0, r2 │ │ + bcc.w 4393a │ │ + add r0, sp, #80 @ 0x50 │ │ + mov r1, r3 │ │ + ldr.w r6, [r0, r3, lsl #2] │ │ + lsrs r7, r6, #1 │ │ + add.w r5, r7, r9, lsr #1 │ │ + cmp r5, r8 │ │ + bhi.n 4378c │ │ + orr.w r0, r6, r9 │ │ + ands.w r0, r0, #1 │ │ + beq.n 4375a │ │ + subs r0, r4, r5 │ │ + str r1, [sp, #68] @ 0x44 │ │ + ldr r1, [sp, #52] @ 0x34 │ │ + add.w r0, r0, r0, lsl #2 │ │ + str r3, [sp, #64] @ 0x40 │ │ + add.w fp, r1, r0, lsl #3 │ │ + lsls r0, r6, #31 │ │ + bne.n 437d0 │ │ + orr.w r0, r7, #1 │ │ + movs r1, #62 @ 0x3e │ │ + clz r0, r0 │ │ + ldr r2, [sp, #76] @ 0x4c │ │ + mov r3, r8 │ │ + eor.w r0, r1, r0, lsl #1 │ │ + movs r1, #0 │ │ + strd r0, r1, [sp] │ │ + mov r0, fp │ │ + mov r1, r7 │ │ + bl 43994 │ │ + ldr r3, [sp, #64] @ 0x40 │ │ + ldr r2, [sp, #56] @ 0x38 │ │ + mov.w r4, r9, lsr #1 │ │ + movs.w r0, r9, lsl #31 │ │ + bne.n 43804 │ │ + b.n 437da │ │ + mov.w r4, r9, lsr #1 │ │ + movs.w r0, r9, lsl #31 │ │ + bne.n 43804 │ │ + orr.w r0, r4, #1 │ │ + movs r1, #62 @ 0x3e │ │ + clz r0, r0 │ │ + ldr r2, [sp, #76] @ 0x4c │ │ + mov r3, r8 │ │ + eor.w r0, r1, r0, lsl #1 │ │ + movs r1, #0 │ │ + strd r0, r1, [sp] │ │ + add.w r0, r7, r7, lsl #2 │ │ + mov r1, r4 │ │ + add.w r0, fp, r0, lsl #3 │ │ + bl 43994 │ │ + ldr r3, [sp, #64] @ 0x40 │ │ + ldr r2, [sp, #56] @ 0x38 │ │ + cmp r6, #2 │ │ + it cs │ │ + cmpcs.w r9, #2 │ │ + bcs.n 43822 │ │ + lsls r0, r5, #1 │ │ + add.w r9, r0, #1 │ │ + add.w fp, sp, #346 @ 0x15a │ │ + ldr r4, [sp, #60] @ 0x3c │ │ + ldr r1, [sp, #68] @ 0x44 │ │ + cmp r3, #1 │ │ + bhi.n 43764 │ │ + b.n 43938 │ │ + cmp r4, r7 │ │ + mov r0, r7 │ │ + it cc │ │ + movcc r0, r4 │ │ + cmp r8, r0 │ │ + bcc.n 4380e │ │ + add.w r1, r7, r7, lsl #2 │ │ + str r5, [sp, #44] @ 0x2c │ │ + cmp r7, r4 │ │ + add.w r9, r0, r0, lsl #2 │ │ + add.w sl, fp, r1, lsl #3 │ │ + mov r1, fp │ │ + it hi │ │ + movhi r1, sl │ │ + ldr r5, [sp, #76] @ 0x4c │ │ + mov.w r2, r9, lsl #3 │ │ + mov r0, r5 │ │ + bl d50a2 │ │ + add.w r9, r5, r9, lsl #3 │ │ + cmp r7, r4 │ │ + bls.n 438c0 │ │ + ldr.w r8, [sp, #32] │ │ + ldrd r1, r5, [sl, #-20] │ │ + ldrd r0, r4, [r9, #-20] │ │ + mov r2, r5 │ │ + cmp r4, r5 │ │ + it cc │ │ + movcc r2, r4 │ │ + blx d8870 │ │ + sub.w ip, sl, #40 @ 0x28 │ │ + cmp r0, #0 │ │ + it eq │ │ + subeq r0, r4, r5 │ │ + sub.w lr, r9, #40 @ 0x28 │ │ + mov r3, ip │ │ + cmp.w r0, #4294967295 @ 0xffffffff │ │ + it gt │ │ + movgt r3, lr │ │ + mov r7, r8 │ │ + ldmia r3!, {r1, r2, r4, r5, r6} │ │ + stmia r7!, {r1, r2, r4, r5, r6} │ │ + ldmia.w r3, {r1, r2, r4, r5, r6} │ │ + stmia r7!, {r1, r2, r4, r5, r6} │ │ + lsrs r1, r0, #31 │ │ + orr.w r1, r1, r1, lsl #2 │ │ + add.w r9, lr, r1, lsl #3 │ │ + movs r1, #1 │ │ + eor.w r0, r1, r0, lsr #31 │ │ + orr.w r0, r0, r0, lsl #2 │ │ + add.w sl, ip, r0, lsl #3 │ │ + cmp sl, fp │ │ + beq.n 4391a │ │ + ldr r0, [sp, #76] @ 0x4c │ │ + sub.w r8, r8, #40 @ 0x28 │ │ + cmp r9, r0 │ │ + bne.n 4385c │ │ + mov fp, sl │ │ + mov r8, r0 │ │ + b.n 43920 │ │ + mov r8, r5 │ │ + ldrd r1, r4, [r8, #20] │ │ + ldrd r0, r5, [sl, #20] │ │ + mov r2, r4 │ │ + cmp r5, r4 │ │ + it cc │ │ + movcc r2, r5 │ │ + blx d8870 │ │ + cmp r0, #0 │ │ + mov r1, sl │ │ + it eq │ │ + subeq r0, r5, r4 │ │ + cmp.w r0, #4294967295 @ 0xffffffff │ │ + it gt │ │ + movgt r1, r8 │ │ + mov r2, fp │ │ + ldmia r1!, {r3, r4, r5, r6, r7} │ │ + add.w fp, fp, #40 @ 0x28 │ │ + stmia r2!, {r3, r4, r5, r6, r7} │ │ + ldmia.w r1, {r3, r4, r5, r6, r7} │ │ + movs r1, #1 │ │ + eor.w r1, r1, r0, lsr #31 │ │ + orr.w r1, r1, r1, lsl #2 │ │ + stmia r2!, {r3, r4, r5, r6, r7} │ │ + add.w r8, r8, r1, lsl #3 │ │ + cmp r8, r9 │ │ + beq.n 43920 │ │ + lsrs r0, r0, #31 │ │ + orr.w r0, r0, r0, lsl #2 │ │ + add.w sl, sl, r0, lsl #3 │ │ + ldr r0, [sp, #72] @ 0x48 │ │ + cmp sl, r0 │ │ + bne.n 438c2 │ │ + b.n 43920 │ │ + mov fp, sl │ │ + ldr.w r8, [sp, #76] @ 0x4c │ │ + sub.w r2, r9, r8 │ │ + mov r0, fp │ │ + mov r1, r8 │ │ + bl d50a2 │ │ + ldrd r8, sl, [sp, #36] @ 0x24 │ │ + ldr r2, [sp, #56] @ 0x38 │ │ + ldr r3, [sp, #64] @ 0x40 │ │ + ldr r5, [sp, #44] @ 0x2c │ │ + b.n 4380e │ │ + movs r1, #1 │ │ + add r0, sp, #80 @ 0x50 │ │ + cmp sl, r4 │ │ + strb.w r2, [fp, r1] │ │ + str.w r9, [r0, r1, lsl #2] │ │ + bls.n 43966 │ │ + ldr.w r9, [sp, #48] @ 0x30 │ │ + adds r1, #1 │ │ + add.w r4, r4, r9, lsr #1 │ │ + add.w ip, r4, r4, lsl #2 │ │ + cmp sl, r4 │ │ + str r4, [sp, #60] @ 0x3c │ │ + bhi.w 4352a │ │ + b.n 4351c │ │ + movs r7, #1 │ │ + ldr r4, [sp, #60] @ 0x3c │ │ + b.n 436f0 │ │ + movs.w r0, r9, lsl #31 │ │ + bne.n 4398c │ │ + orr.w r1, sl, #1 │ │ + movs r0, #0 │ │ + clz r1, r1 │ │ + movs r2, #62 @ 0x3e │ │ + mov r3, r8 │ │ + eor.w r1, r2, r1, lsl #1 │ │ + strd r1, r0, [sp] │ │ + ldr r0, [sp, #52] @ 0x34 │ │ + mov r1, sl │ │ + ldr r2, [sp, #76] @ 0x4c │ │ + bl 43994 │ │ + add sp, #412 @ 0x19c │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ + bmi.n 4393e │ │ + stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ + sub sp, #108 @ 0x6c │ │ + mov fp, r2 │ │ + mov r9, r0 │ │ + cmp r1, #33 @ 0x21 │ │ + str r3, [sp, #28] │ │ + str r2, [sp, #56] @ 0x38 │ │ + bcs.n 439da │ │ + mov r4, r1 │ │ + lsrs r0, r4, #1 │ │ + beq.w 4404c │ │ + mov r8, r0 │ │ + add.w r0, r0, r0, lsl #2 │ │ + mov r1, fp │ │ + cmp r4, #8 │ │ + add.w r5, fp, r0, lsl #3 │ │ + add.w r6, r9, r0, lsl #3 │ │ + mov r0, r9 │ │ + str r5, [sp, #52] @ 0x34 │ │ + str r6, [sp, #24] │ │ + bcc.w 43d28 │ │ + bl 44080 │ │ + mov r0, r6 │ │ + mov r1, r5 │ │ + bl 44080 │ │ + movs r0, #4 │ │ + b.n 43d4a │ │ + ldr.w sl, [sp, #144] @ 0x90 │ │ + ldr r0, [sp, #148] @ 0x94 │ │ + str r0, [sp, #24] │ │ + sub.w r0, fp, #40 @ 0x28 │ │ + str r0, [sp, #16] │ │ + str.w r9, [sp, #44] @ 0x2c │ │ + cmp.w sl, #0 │ │ + beq.w 43d14 │ │ + lsrs r3, r1, #3 │ │ + mov.w r0, #280 @ 0x118 │ │ + mla r6, r3, r0, r9 │ │ + add.w r0, r3, r3, lsl #2 │ │ + mov r8, r9 │ │ + add.w r2, r9, r0, lsl #5 │ │ + cmp r1, #64 @ 0x40 │ │ + str r1, [sp, #40] @ 0x28 │ │ + bcs.n 43a80 │ │ + ldrd r5, r9, [r8, #20] │ │ + ldrd r1, r4, [r2, #20] │ │ + cmp r9, r4 │ │ + str r2, [sp, #52] @ 0x34 │ │ + mov r2, r4 │ │ + mov r0, r5 │ │ + str.w sl, [sp, #32] │ │ + it cc │ │ + movcc r2, r9 │ │ + str r1, [sp, #48] @ 0x30 │ │ + blx d8870 │ │ + str r6, [sp, #60] @ 0x3c │ │ + mov r7, r0 │ │ + ldrd r1, r6, [r6, #20] │ │ + cmp r0, #0 │ │ + mov r2, r6 │ │ + mov r0, r5 │ │ + it eq │ │ + subeq.w r7, r9, r4 │ │ + cmp r9, r6 │ │ + it cc │ │ + movcc r2, r9 │ │ + ldr.w sl, [sp, #32] │ │ + mov fp, r1 │ │ + blx d8870 │ │ + cmp r0, #0 │ │ + it eq │ │ + subeq.w r0, r9, r6 │ │ + mov r5, r8 │ │ + eors r0, r7 │ │ + bmi.n 43a8c │ │ + mov r2, r6 │ │ + cmp r4, r6 │ │ + it cc │ │ + movcc r2, r4 │ │ + ldr r0, [sp, #48] @ 0x30 │ │ + mov r1, fp │ │ + blx d8870 │ │ + cmp r0, #0 │ │ + it eq │ │ + subeq r0, r4, r6 │ │ + eors r0, r7 │ │ + ldr r5, [sp, #52] @ 0x34 │ │ + ldr r0, [sp, #60] @ 0x3c │ │ + it mi │ │ + movmi r5, r0 │ │ + b.n 43a8c │ │ + mov r1, r2 │ │ + mov r0, r8 │ │ + mov r2, r6 │ │ + bl 441be │ │ + mov r5, r0 │ │ + sub.w r0, r5, r8 │ │ + movw r1, #52429 @ 0xcccd │ │ + movt r1, #52428 @ 0xcccc │ │ + sub.w sl, sl, #1 │ │ + lsrs r0, r0, #3 │ │ + muls r0, r1 │ │ + mov r1, r5 │ │ + str r0, [sp, #36] @ 0x24 │ │ + add r0, sp, #64 @ 0x40 │ │ + ldmia r1!, {r2, r3, r4, r6, r7} │ │ + stmia r0!, {r2, r3, r4, r6, r7} │ │ + ldmia.w r1, {r2, r3, r4, r6, r7} │ │ + stmia r0!, {r2, r3, r4, r6, r7} │ │ + ldr.w fp, [sp, #56] @ 0x38 │ │ + ldr r0, [sp, #24] │ │ + str r5, [sp, #52] @ 0x34 │ │ + str.w sl, [sp, #32] │ │ + cbz r0, 43ae2 │ │ + ldr r0, [sp, #24] │ │ + ldrd r1, r4, [r5, #20] │ │ + ldrd r0, r6, [r0, #20] │ │ + mov r2, r4 │ │ + cmp r6, r4 │ │ + it cc │ │ + movcc r2, r6 │ │ + blx d8870 │ │ + cmp r0, #0 │ │ + it eq │ │ + subeq r0, r6, r4 │ │ + cmp.w r0, #4294967295 @ 0xffffffff │ │ + bgt.w 43c04 │ │ + ldr r1, [sp, #40] @ 0x28 │ │ + ldr r0, [sp, #28] │ │ + cmp r0, r1 │ │ + bcc.w 44052 │ │ + add.w r0, r1, r1, lsl #2 │ │ + ldr r1, [sp, #44] @ 0x2c │ │ + ldr.w ip, [sp, #36] @ 0x24 │ │ + movs r4, #0 │ │ + add.w fp, fp, r0, lsl #3 │ │ + str r0, [sp, #20] │ │ + mov sl, r1 │ │ + add.w r0, ip, ip, lsl #2 │ │ + str.w ip, [sp, #48] @ 0x30 │ │ + add.w r0, r1, r0, lsl #3 │ │ + str r0, [sp, #60] @ 0x3c │ │ + cmp sl, r0 │ │ + bcs.n 43b62 │ │ + ldr r0, [sp, #52] @ 0x34 │ │ + ldrd r1, r9, [r0, #20] │ │ + ldrd r0, r8, [sl, #20] │ │ + mov r2, r9 │ │ + cmp r8, r9 │ │ + it cc │ │ + movcc r2, r8 │ │ + blx d8870 │ │ + sub.w fp, fp, #40 @ 0x28 │ │ + cmp r0, #0 │ │ + it eq │ │ + subeq.w r0, r8, r9 │ │ + ldr r2, [sp, #56] @ 0x38 │ │ + mov r1, fp │ │ + cmp r0, #0 │ │ + it mi │ │ + movmi r1, r2 │ │ + add.w r2, r4, r4, lsl #2 │ │ + mov ip, r4 │ │ + add.w r1, r1, r2, lsl #3 │ │ + mov r2, sl │ │ + ldmia r2!, {r3, r4, r5, r6, r7} │ │ + add.w sl, sl, #40 @ 0x28 │ │ + stmia r1!, {r3, r4, r5, r6, r7} │ │ + ldmia.w r2, {r3, r4, r5, r6, r7} │ │ + stmia r1!, {r3, r4, r5, r6, r7} │ │ + add.w r4, ip, r0, lsr #31 │ │ + ldr r0, [sp, #60] @ 0x3c │ │ + cmp sl, r0 │ │ + bcc.n 43b12 │ │ + ldr.w ip, [sp, #40] @ 0x28 │ │ + add.w r8, r4, r4, lsl #2 │ │ + ldr r0, [sp, #48] @ 0x30 │ │ + cmp r0, ip │ │ + beq.n 43b8c │ │ + mov r1, sl │ │ + sub.w fp, fp, #40 @ 0x28 │ │ + ldmia r1!, {r2, r3, r5, r6, r7} │ │ + add.w r0, fp, r8, lsl #3 │ │ + add.w sl, sl, #40 @ 0x28 │ │ + stmia r0!, {r2, r3, r5, r6, r7} │ │ + ldmia.w r1, {r2, r3, r5, r6, r7} │ │ + stmia r0!, {r2, r3, r5, r6, r7} │ │ + ldr r1, [sp, #44] @ 0x2c │ │ + b.n 43b00 │ │ + ldr.w fp, [sp, #56] @ 0x38 │ │ + mov.w r2, r8, lsl #3 │ │ + ldr r0, [sp, #44] @ 0x2c │ │ + mov r5, ip │ │ + mov r1, fp │ │ + bl d50a2 │ │ + subs r1, r5, r4 │ │ + mov sl, r4 │ │ + beq.n 43bd0 │ │ + ldrd r0, r2, [sp, #16] │ │ + mov ip, r1 │ │ + add.w lr, r0, r2, lsl #3 │ │ + ldr r0, [sp, #44] @ 0x2c │ │ + add.w r9, r0, r8, lsl #3 │ │ + mov r0, lr │ │ + mov r2, r9 │ │ + ldmia r0!, {r3, r4, r5, r6, r7} │ │ + sub.w lr, lr, #40 @ 0x28 │ │ + add.w r9, r9, #40 @ 0x28 │ │ + subs.w ip, ip, #1 │ │ + stmia r2!, {r3, r4, r5, r6, r7} │ │ + ldmia.w r0, {r3, r4, r5, r6, r7} │ │ + stmia r2!, {r3, r4, r5, r6, r7} │ │ + bne.n 43bb4 │ │ + mov r4, sl │ │ + cmp.w sl, #0 │ │ + ldr.w sl, [sp, #32] │ │ + beq.n 43c04 │ │ + ldr r0, [sp, #40] @ 0x28 │ │ + cmp r0, r4 │ │ + bcc.w 44054 │ │ + add r0, sp, #64 @ 0x40 │ │ + ldr.w r9, [sp, #44] @ 0x2c │ │ + ldr r3, [sp, #28] │ │ + mov r2, fp │ │ + strd sl, r0, [sp] │ │ + add.w r0, r9, r8, lsl #3 │ │ + bl 43994 │ │ + mov r1, r4 │ │ + cmp r4, #33 @ 0x21 │ │ + bcs.w 439ec │ │ + b.n 439a8 │ │ + ldr r1, [sp, #40] @ 0x28 │ │ + ldr r0, [sp, #28] │ │ + cmp r0, r1 │ │ + bcc.w 44052 │ │ + add.w r0, r1, r1, lsl #2 │ │ + ldr r1, [sp, #44] @ 0x2c │ │ + ldr.w ip, [sp, #36] @ 0x24 │ │ + mov.w sl, #0 │ │ + add.w r7, fp, r0, lsl #3 │ │ + str r0, [sp, #48] @ 0x30 │ │ + mov r9, r1 │ │ + add.w r0, ip, ip, lsl #2 │ │ + ldrd fp, r8, [sp, #52] @ 0x34 │ │ + str.w ip, [sp, #36] @ 0x24 │ │ + add.w r0, r1, r0, lsl #3 │ │ + str r0, [sp, #60] @ 0x3c │ │ + cmp r9, r0 │ │ + bcs.n 43c84 │ │ + ldrd r1, r5, [r9, #20] │ │ + ldrd r0, r4, [fp, #20] │ │ + mov r2, r5 │ │ + cmp r4, r5 │ │ + it cc │ │ + movcc r2, r4 │ │ + blx d8870 │ │ + subs r7, #40 @ 0x28 │ │ + cmp r0, #0 │ │ + it eq │ │ + subeq r0, r4, r5 │ │ + cmp.w r0, #4294967295 @ 0xffffffff │ │ + mov r0, r7 │ │ + add.w r1, sl, sl, lsl #2 │ │ + it gt │ │ + movgt r0, r8 │ │ + add.w r0, r0, r1, lsl #3 │ │ + mov r1, r9 │ │ + ldmia r1!, {r2, r3, r4, r5, r6} │ │ + add.w r9, r9, #40 @ 0x28 │ │ + stmia r0!, {r2, r3, r4, r5, r6} │ │ + ldmia.w r1, {r2, r3, r4, r5, r6} │ │ + stmia r0!, {r2, r3, r4, r5, r6} │ │ + it gt │ │ + addgt.w sl, sl, #1 │ │ + ldr r0, [sp, #60] @ 0x3c │ │ + cmp r9, r0 │ │ + bcc.n 43c3a │ │ + ldrd r0, ip, [sp, #36] @ 0x24 │ │ + add.w r4, sl, sl, lsl #2 │ │ + cmp r0, ip │ │ + beq.n 43cb0 │ │ + ldr r0, [sp, #56] @ 0x38 │ │ + mov r1, r9 │ │ + add.w r9, r9, #40 @ 0x28 │ │ + add.w sl, sl, #1 │ │ + add.w r0, r0, r4, lsl #3 │ │ + ldmia r1!, {r2, r3, r4, r5, r6} │ │ + subs r7, #40 @ 0x28 │ │ + stmia r0!, {r2, r3, r4, r5, r6} │ │ + ldmia.w r1, {r2, r3, r4, r5, r6} │ │ + stmia r0!, {r2, r3, r4, r5, r6} │ │ + ldr r1, [sp, #44] @ 0x2c │ │ + b.n 43c24 │ │ + ldr r7, [sp, #44] @ 0x2c │ │ + lsls r2, r4, #3 │ │ + ldr.w fp, [sp, #56] @ 0x38 │ │ + mov r0, r7 │ │ + mov r1, fp │ │ + bl d50a2 │ │ + ldr r0, [sp, #40] @ 0x28 │ │ + subs.w ip, r0, sl │ │ + beq.w 4404c │ │ + ldr r1, [sp, #48] @ 0x30 │ │ + add.w r7, r7, r4, lsl #3 │ │ + ldr r0, [sp, #16] │ │ + mov r9, ip │ │ + mov r8, r7 │ │ + add.w lr, r0, r1, lsl #3 │ │ + mov r3, lr │ │ + mov r2, r7 │ │ + ldmia r3!, {r0, r1, r4, r5, r6} │ │ + sub.w lr, lr, #40 @ 0x28 │ │ + adds r7, #40 @ 0x28 │ │ + subs.w ip, ip, #1 │ │ + stmia r2!, {r0, r1, r4, r5, r6} │ │ + ldmia.w r3, {r0, r1, r4, r5, r6} │ │ + stmia r2!, {r0, r1, r4, r5, r6} │ │ + bne.n 43cda │ │ + ldr r1, [sp, #40] @ 0x28 │ │ + cmp r1, sl │ │ + bcc.w 44066 │ │ + ldr.w sl, [sp, #32] │ │ + movs r0, #0 │ │ + mov r4, r9 │ │ + cmp.w r9, #33 @ 0x21 │ │ + mov r1, r9 │ │ + mov r9, r8 │ │ + str r0, [sp, #24] │ │ + bcs.w 439e8 │ │ + b.n 439a8 │ │ + ldr r3, [sp, #28] │ │ + movs r0, #1 │ │ + str r0, [sp, #0] │ │ + mov r0, r9 │ │ + mov r2, fp │ │ + bl 4347e │ │ + add sp, #108 @ 0x6c │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ + mov r7, r6 │ │ + mov lr, r5 │ │ + mov ip, r4 │ │ + ldmia r0!, {r2, r3, r4, r5, r6} │ │ + stmia r1!, {r2, r3, r4, r5, r6} │ │ + ldmia.w r0, {r2, r3, r4, r5, r6} │ │ + mov r0, lr │ │ + stmia r1!, {r2, r3, r4, r5, r6} │ │ + mov r1, r7 │ │ + ldmia r1!, {r2, r3, r4, r5, r6} │ │ + stmia r0!, {r2, r3, r4, r5, r6} │ │ + ldmia.w r1, {r2, r3, r4, r5, r6} │ │ + stmia r0!, {r2, r3, r4, r5, r6} │ │ + mov r4, ip │ │ + movs r0, #1 │ │ + sub.w r1, r4, r8 │ │ + cmp r0, r8 │ │ + str r4, [sp, #12] │ │ + str r1, [sp, #28] │ │ + str r0, [sp, #20] │ │ + strd r8, r9, [sp, #40] @ 0x28 │ │ + bcs.n 43e3a │ │ + ldr.w fp, [sp, #20] │ │ + mov r2, r8 │ │ + add.w r0, fp, fp, lsl #2 │ │ + mov.w r8, r0, lsl #3 │ │ + b.n 43d96 │ │ + ldr r0, [sp, #56] @ 0x38 │ │ + ldr r4, [sp, #48] @ 0x30 │ │ + ldmia.w r4, {r1, r2, r3, r5, r6} │ │ + stmia r0!, {r1, r2, r3, r5, r6} │ │ + ldr r2, [sp, #32] │ │ + strd fp, r7, [r9, #-20] │ │ + ldmia r2, {r0, r1, r2} │ │ + stmdb r9, {r0, r1, r2} │ │ + ldr.w r9, [sp, #44] @ 0x2c │ │ + ldrd fp, r2, [sp, #36] @ 0x24 │ │ + add.w fp, fp, #1 │ │ + add.w r8, r8, #40 @ 0x28 │ │ + cmp fp, r2 │ │ + beq.n 43e3a │ │ + add.w r0, fp, fp, lsl #2 │ │ + ldr r1, [sp, #56] @ 0x38 │ │ + str.w r8, [sp, #60] @ 0x3c │ │ + mov r8, r9 │ │ + add.w sl, r9, r0, lsl #3 │ │ + add.w ip, r1, r0, lsl #3 │ │ + mov r9, r2 │ │ + mov r1, sl │ │ + mov r2, ip │ │ + ldmia r1!, {r0, r3, r4, r5, r6} │ │ + stmia r2!, {r0, r3, r4, r5, r6} │ │ + ldmia.w r1, {r0, r3, r4, r5, r6} │ │ + stmia r2!, {r0, r3, r4, r5, r6} │ │ + ldrd r5, r7, [ip, #20] │ │ + ldrd r1, r4, [ip, #-20] │ │ + cmp r7, r4 │ │ + mov r2, r4 │ │ + mov r0, r5 │ │ + it cc │ │ + movcc r2, r7 │ │ + blx d8870 │ │ + mov r2, r9 │ │ + mov r9, r8 │ │ + ldr.w r8, [sp, #60] @ 0x3c │ │ + cmp r0, #0 │ │ + it eq │ │ + subeq r0, r7, r4 │ │ + cmp.w r0, #4294967295 @ 0xffffffff │ │ + bgt.n 43d8a │ │ + add.w r0, sl, #28 │ │ + str.w sl, [sp, #48] @ 0x30 │ │ + mov sl, r8 │ │ + str.w fp, [sp, #36] @ 0x24 │ │ + str r0, [sp, #32] │ │ + ldr r0, [sp, #56] @ 0x38 │ │ + mov fp, r5 │ │ + cmp.w sl, #40 @ 0x28 │ │ + add.w r9, r0, sl │ │ + sub.w r0, r9, #40 @ 0x28 │ │ + mov r1, r9 │ │ + ldmia r0!, {r2, r3, r4, r5, r6} │ │ + stmia r1!, {r2, r3, r4, r5, r6} │ │ + ldmia.w r0, {r2, r3, r4, r5, r6} │ │ + stmia r1!, {r2, r3, r4, r5, r6} │ │ + beq.n 43d6c │ │ + ldrd r1, r4, [r9, #-60] @ 0x3c │ │ + mov r0, fp │ │ + mov r2, r4 │ │ + cmp r7, r4 │ │ + it cc │ │ + movcc r2, r7 │ │ + mov r5, fp │ │ + blx d8870 │ │ + sub.w sl, sl, #40 @ 0x28 │ │ + cmp r0, #0 │ │ + it eq │ │ + subeq r0, r7, r4 │ │ + cmp r0, #0 │ │ + bmi.n 43df4 │ │ + ldr r0, [sp, #56] @ 0x38 │ │ + add r0, sl │ │ + b.n 43d6e │ │ + ldr.w fp, [sp, #20] │ │ + ldr r7, [sp, #52] @ 0x34 │ │ + ldr r0, [sp, #28] │ │ + cmp fp, r0 │ │ + bcs.n 43f28 │ │ + add.w r0, fp, fp, lsl #2 │ │ + lsls r0, r0, #3 │ │ + str r0, [sp, #48] @ 0x30 │ │ + movs r0, #40 @ 0x28 │ │ + strd r7, r0, [sp, #32] │ │ + b.n 43e8c │ │ + ldr r7, [sp, #52] @ 0x34 │ │ + mov r0, r7 │ │ + ldmia.w fp, {r1, r2, r3, r5, r6} │ │ + stmia r0!, {r1, r2, r3, r5, r6} │ │ + ldr r0, [sp, #60] @ 0x3c │ │ + ldr r2, [sp, #16] │ │ + ldr.w fp, [sp, #20] │ │ + strd r8, r0, [r9, #-20] │ │ + ldmia r2, {r0, r1, r2} │ │ + stmdb r9, {r0, r1, r2} │ │ + ldr.w r9, [sp, #44] @ 0x2c │ │ + ldr r0, [sp, #36] @ 0x24 │ │ + add.w fp, fp, #1 │ │ + subs r0, #40 @ 0x28 │ │ + str r0, [sp, #36] @ 0x24 │ │ + ldr r0, [sp, #32] │ │ + adds r0, #40 @ 0x28 │ │ + str r0, [sp, #32] │ │ + ldr r0, [sp, #28] │ │ + cmp fp, r0 │ │ + beq.n 43f28 │ │ + add.w r0, fp, fp, lsl #2 │ │ + ldr r1, [sp, #24] │ │ + add.w sl, r1, r0, lsl #3 │ │ + add.w ip, r7, r0, lsl #3 │ │ + mov r1, sl │ │ + mov r2, ip │ │ + ldmia r1!, {r0, r3, r4, r5, r6} │ │ + stmia r2!, {r0, r3, r4, r5, r6} │ │ + ldmia.w r1, {r0, r3, r4, r5, r6} │ │ + stmia r2!, {r0, r3, r4, r5, r6} │ │ + ldrd r5, r6, [ip, #20] │ │ + ldrd r1, r4, [ip, #-20] │ │ + cmp r6, r4 │ │ + mov r2, r4 │ │ + mov r0, r5 │ │ + it cc │ │ + movcc r2, r6 │ │ + blx d8870 │ │ + cmp r0, #0 │ │ + it eq │ │ + subeq r0, r6, r4 │ │ + cmp.w r0, #4294967295 @ 0xffffffff │ │ + bgt.n 43e76 │ │ + str.w fp, [sp, #20] │ │ + add.w r0, sl, #28 │ │ + mov fp, sl │ │ + ldrd sl, r7, [sp, #32] │ │ + str r6, [sp, #60] @ 0x3c │ │ + str r0, [sp, #16] │ │ + ldr.w ip, [sp, #48] @ 0x30 │ │ + mov r8, r5 │ │ + add.w r9, sl, ip │ │ + cmp ip, r7 │ │ + sub.w r0, r9, #40 @ 0x28 │ │ + mov r1, r9 │ │ + ldmia r0!, {r2, r3, r4, r5, r6} │ │ + stmia r1!, {r2, r3, r4, r5, r6} │ │ + ldmia.w r0, {r2, r3, r4, r5, r6} │ │ + stmia r1!, {r2, r3, r4, r5, r6} │ │ + beq.n 43e56 │ │ + ldrd r1, r4, [r9, #-60] @ 0x3c │ │ + mov r0, r8 │ │ + ldr r6, [sp, #60] @ 0x3c │ │ + mov r2, r4 │ │ + mov r5, r8 │ │ + cmp r6, r4 │ │ + it cc │ │ + movcc r2, r6 │ │ + blx d8870 │ │ + adds r7, #40 @ 0x28 │ │ + sub.w sl, sl, #40 @ 0x28 │ │ + cmp r0, #0 │ │ + it eq │ │ + subeq r0, r6, r4 │ │ + cmp r0, #0 │ │ + bmi.n 43edc │ │ + ldr r0, [sp, #48] @ 0x30 │ │ + ldr r7, [sp, #52] @ 0x34 │ │ + add r0, sl │ │ + b.n 43e5a │ │ + ldr r0, [sp, #12] │ │ + mvn.w r1, #39 @ 0x27 │ │ + ldr.w r8, [sp, #56] @ 0x38 │ │ + mov r3, r7 │ │ + sub.w sl, r3, #40 @ 0x28 │ │ + mov r6, r9 │ │ + add.w r0, r0, r0, lsl #2 │ │ + add.w r0, r1, r0, lsl #3 │ │ + add.w fp, r8, r0 │ │ + add.w r7, r9, r0 │ │ + ldr r0, [sp, #40] @ 0x28 │ │ + strd r0, r6, [sp, #40] @ 0x28 │ │ + ldrd r1, r4, [r8, #20] │ │ + ldrd r0, r5, [r3, #20] │ │ + mov r2, r4 │ │ + str r3, [sp, #52] @ 0x34 │ │ + cmp r5, r4 │ │ + it cc │ │ + movcc r2, r5 │ │ + blx d8870 │ │ + mov r9, r0 │ │ + cmp r0, #0 │ │ + it eq │ │ + subeq.w r9, r5, r4 │ │ + ldr r0, [sp, #52] @ 0x34 │ │ + cmp.w r9, #4294967295 @ 0xffffffff │ │ + it gt │ │ + movgt r0, r8 │ │ + mov r1, r6 │ │ + ldmia r0!, {r2, r3, r4, r5, r6} │ │ + stmia r1!, {r2, r3, r4, r5, r6} │ │ + ldmia.w r0, {r2, r3, r4, r5, r6} │ │ + stmia r1!, {r2, r3, r4, r5, r6} │ │ + ldrd r1, r4, [sl, #20] │ │ + ldrd r0, r5, [fp, #20] │ │ + mov r2, r4 │ │ + cmp r5, r4 │ │ + it cc │ │ + movcc r2, r5 │ │ + blx d8870 │ │ + cmp r0, #0 │ │ + mov ip, sl │ │ + it eq │ │ + subeq r0, r5, r4 │ │ + cmp.w r0, #4294967295 @ 0xffffffff │ │ + it gt │ │ + movgt ip, fp │ │ + mov r2, r7 │ │ + ldmia.w ip!, {r1, r3, r4, r5, r6} │ │ + subs r7, #40 @ 0x28 │ │ + stmia r2!, {r1, r3, r4, r5, r6} │ │ + ldmia.w ip, {r1, r3, r4, r5, r6} │ │ + stmia r2!, {r1, r3, r4, r5, r6} │ │ + mov.w r1, r9, lsr #31 │ │ + orr.w r1, r1, r1, lsl #2 │ │ + ldr r3, [sp, #52] @ 0x34 │ │ + ldr r6, [sp, #44] @ 0x2c │ │ + add.w r3, r3, r1, lsl #3 │ │ + movs r1, #1 │ │ + eor.w r1, r1, r9, lsr #31 │ │ + adds r6, #40 @ 0x28 │ │ + orr.w r1, r1, r1, lsl #2 │ │ + add.w r8, r8, r1, lsl #3 │ │ + asrs r1, r0, #31 │ │ + mvn.w r0, r0, asr #31 │ │ + add.w r1, r1, r1, lsl #2 │ │ + add.w r0, r0, r0, lsl #2 │ │ + add.w sl, sl, r1, lsl #3 │ │ + add.w fp, fp, r0, lsl #3 │ │ + ldr r0, [sp, #40] @ 0x28 │ │ + subs r0, #1 │ │ + bne.n 43f4c │ │ + ldr r1, [sp, #12] │ │ + add.w r0, sl, #40 @ 0x28 │ │ + mov r2, r8 │ │ + mov ip, fp │ │ + mov r8, r3 │ │ + lsls r1, r1, #31 │ │ + beq.n 44040 │ │ + mov r1, r8 │ │ + cmp r2, r0 │ │ + it cc │ │ + movcc r1, r2 │ │ + mov fp, r6 │ │ + mov r4, r2 │ │ + ldmia r1!, {r2, r3, r5, r6, r7} │ │ + stmia.w fp!, {r2, r3, r5, r6, r7} │ │ + ldmia.w r1, {r2, r3, r5, r6, r7} │ │ + mov.w r1, #0 │ │ + stmia.w fp, {r2, r3, r5, r6, r7} │ │ + mov.w r2, #0 │ │ + it cs │ │ + movcs r2, #1 │ │ + it cc │ │ + movcc r1, #1 │ │ + orr.w r2, r2, r2, lsl #2 │ │ + orr.w r1, r1, r1, lsl #2 │ │ + add.w r8, r8, r2, lsl #3 │ │ + add.w r2, r4, r1, lsl #3 │ │ + cmp r2, r0 │ │ + itt eq │ │ + addeq.w r0, ip, #40 @ 0x28 │ │ + cmpeq r8, r0 │ │ + bne.n 44062 │ │ + add sp, #108 @ 0x6c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r2, [pc, #56] @ (42804 ) │ │ - adds r0, r6, r4 │ │ - add r2, pc │ │ - cmp r1, r0 │ │ - it hi │ │ - movhi r0, r1 │ │ - bl 3fa74 │ │ - ldr r2, [pc, #48] @ (4280c ) │ │ - mov r1, ip │ │ - add r2, pc │ │ - bl 3fa74 │ │ - ldr r2, [pc, #40] @ (42810 ) │ │ - mov r0, r3 │ │ - add r2, pc │ │ - bl 3fa74 │ │ - ldr r2, [pc, #24] @ (42808 ) │ │ - add.w r0, r4, r8 │ │ + udf #254 @ 0xfe │ │ + ldr r0, [pc, #32] @ (44078 ) │ │ + movs r1, #19 │ │ + ldr r2, [pc, #32] @ (4407c ) │ │ + add r0, pc │ │ add r2, pc │ │ - cmp r1, r0 │ │ - it hi │ │ - movhi r0, r1 │ │ - bl 3fa74 │ │ - str r6, [sp, #728] @ 0x2d8 │ │ - movs r1, r1 │ │ - str r5, [sp, #312] @ 0x138 │ │ - movs r1, r1 │ │ - str r5, [sp, #160] @ 0xa0 │ │ - movs r1, r1 │ │ - str r5, [sp, #120] @ 0x78 │ │ - movs r1, r1 │ │ - str r5, [sp, #144] @ 0x90 │ │ - movs r1, r1 │ │ - stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ - sub sp, #12 │ │ - mov r8, r0 │ │ - mov r0, sp │ │ - mov r6, r1 │ │ - bl 42308 │ │ - ldr r0, [sp, #0] │ │ - cmp r0, #1 │ │ - bne.n 4285e │ │ - ldr.w r9, [sp, #8] │ │ - movs r0, #0 │ │ - cmp.w r0, r9, lsr #30 │ │ - bne.n 4286c │ │ - movw r0, #65533 @ 0xfffd │ │ - mov.w r7, r9, lsl #2 │ │ - movt r0, #32767 @ 0x7fff │ │ - cmp r7, r0 │ │ - bcs.n 4286c │ │ - ldr r5, [sp, #4] │ │ - cbz r7, 42870 │ │ - mov r0, r7 │ │ - movs r1, #1 │ │ - blx d8820 │ │ - cbz r0, 428c2 │ │ - mov ip, r9 │ │ - cmp.w r9, #0 │ │ - bne.n 4287c │ │ - b.n 4289c │ │ - mov.w r0, #2147483648 @ 0x80000000 │ │ - str.w r0, [r8] │ │ - add sp, #12 │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ - bl 3e03c │ │ - movs r0, #4 │ │ - mov.w ip, #0 │ │ - cmp.w r9, #0 │ │ - beq.n 4289c │ │ - ldrd r7, r1, [r6] │ │ - subs r2, r1, r5 │ │ - mov r4, r9 │ │ - mov r6, r0 │ │ - cmp r5, r1 │ │ - bhi.n 428aa │ │ - cmp r2, #3 │ │ - bls.n 428b6 │ │ - ldr r3, [r7, r5] │ │ - subs r2, #4 │ │ - adds r5, #4 │ │ - str.w r3, [r6], #4 │ │ - subs r4, #1 │ │ - bne.n 42886 │ │ - strd ip, r0, [r8] │ │ - str.w r9, [r8, #8] │ │ - add sp, #12 │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ - ldr r3, [pc, #36] @ (428d0 ) │ │ - mov r0, r5 │ │ - mov r2, r1 │ │ - add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #20] @ (428cc ) │ │ - movs r0, #0 │ │ - movs r1, #4 │ │ - add r3, pc │ │ - bl 3f9a8 │ │ - movs r0, #4 │ │ - mov r1, r7 │ │ - bl 3dfa4 │ │ - nop │ │ - strh r0, [r0, #12] │ │ - movs r1, r1 │ │ - strh r4, [r3, #56] @ 0x38 │ │ - movs r1, r1 │ │ - stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ - sub sp, #12 │ │ - mov r8, r0 │ │ - mov r0, sp │ │ - mov r6, r1 │ │ - bl 42308 │ │ - ldr r0, [sp, #0] │ │ - cmp r0, #1 │ │ - bne.n 4291e │ │ - ldr.w r9, [sp, #8] │ │ - movs r0, #0 │ │ - cmp.w r0, r9, lsr #29 │ │ - bne.n 4292c │ │ - movw r0, #65529 @ 0xfff9 │ │ - mov.w r7, r9, lsl #3 │ │ - movt r0, #32767 @ 0x7fff │ │ - cmp r7, r0 │ │ - bcs.n 4292c │ │ - ldr r5, [sp, #4] │ │ - cbz r7, 42930 │ │ - mov r0, r7 │ │ - movs r1, #1 │ │ - blx d8820 │ │ - cbz r0, 4298a │ │ - mov ip, r9 │ │ - cmp.w r9, #0 │ │ - bne.n 4293c │ │ - b.n 42964 │ │ - mov.w r0, #2147483648 @ 0x80000000 │ │ - str.w r0, [r8] │ │ - add sp, #12 │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ - bl 3e03c │ │ - movs r0, #8 │ │ - mov.w ip, #0 │ │ - cmp.w r9, #0 │ │ - beq.n 42964 │ │ - ldrd lr, r1, [r6] │ │ - subs r2, r1, r5 │ │ - mov r4, r9 │ │ - mov r6, r0 │ │ - cmp r5, r1 │ │ - bhi.n 42972 │ │ - cmp r2, #7 │ │ - bls.n 4297e │ │ - add.w r7, lr, r5 │ │ - ldr.w r3, [lr, r5] │ │ - subs r2, #8 │ │ - ldr r7, [r7, #4] │ │ - adds r5, #8 │ │ - subs r4, #1 │ │ - strd r3, r7, [r6], #8 │ │ - bne.n 42946 │ │ - strd ip, r0, [r8] │ │ - str.w r9, [r8, #8] │ │ - add sp, #12 │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ - ldr r3, [pc, #36] @ (42998 ) │ │ - mov r0, r5 │ │ + bl 3fd60 │ │ + bl 416d4 │ │ + ldr r3, [pc, #12] @ (44074 ) │ │ + mov r0, sl │ │ mov r2, r1 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #20] @ (42994 ) │ │ - movs r0, #0 │ │ - movs r1, #8 │ │ - add r3, pc │ │ - bl 3f9a8 │ │ - movs r0, #8 │ │ - mov r1, r7 │ │ - bl 3dfa4 │ │ + bl 3fcb0 │ │ nop │ │ - strh r0, [r1, #6] │ │ + ldrb r0, [r0, #20] │ │ movs r1, r1 │ │ - strh r4, [r4, #50] @ 0x32 │ │ + ldr r7, [pc, #244] @ (44170 ) │ │ + @ instruction: 0xfffd7d00 │ │ movs r1, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #12 │ │ - mov r8, r0 │ │ - mov r0, sp │ │ - mov r6, r1 │ │ - bl 42308 │ │ - ldr r0, [sp, #0] │ │ - cmp r0, #1 │ │ - bne.n 429ea │ │ - ldr.w r9, [sp, #8] │ │ - movs r0, #0 │ │ - cmp.w r0, r9, lsr #29 │ │ - bne.n 429f8 │ │ - movw r0, #65533 @ 0xfffd │ │ - mov.w r7, r9, lsl #3 │ │ - movt r0, #32767 @ 0x7fff │ │ - cmp r7, r0 │ │ - bcs.n 429f8 │ │ - ldr.w fp, [sp, #4] │ │ - cbz r7, 429fc │ │ - mov r0, r7 │ │ - movs r1, #1 │ │ - blx d8820 │ │ - cmp r0, #0 │ │ - beq.n 42a8c │ │ - mov ip, r9 │ │ - cmp.w r9, #0 │ │ - bne.n 42a08 │ │ - b.n 42a5a │ │ - mov.w r0, #2147483648 @ 0x80000000 │ │ - str.w r0, [r8] │ │ - add sp, #12 │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - bl 3e03c │ │ - movs r0, #4 │ │ - mov.w ip, #0 │ │ - cmp.w r9, #0 │ │ - beq.n 42a5a │ │ - ldrd sl, r2, [r6] │ │ - add.w r1, r9, r9, lsl #1 │ │ - add.w lr, r1, fp │ │ - sub.w r3, r2, fp │ │ - adds r4, r0, #4 │ │ - mov r7, r9 │ │ - b.n 42a2a │ │ - subs r3, #3 │ │ - add.w fp, fp, #3 │ │ - adds r4, #8 │ │ - subs r7, #1 │ │ - beq.n 42a5a │ │ - cmp fp, r2 │ │ - bhi.n 42a80 │ │ - cmp r3, #2 │ │ - bls.n 42a68 │ │ - add.w r6, sl, fp │ │ - ldrh.w r1, [sl, fp] │ │ - ldrb r6, [r6, #2] │ │ - orrs.w r1, r1, r6, lsl #16 │ │ - beq.n 42a1e │ │ - subs r6, r1, #1 │ │ - adds.w r1, r6, lr │ │ - bcs.n 42a76 │ │ - cmp r1, r2 │ │ - bhi.n 42a76 │ │ - add.w r5, sl, lr │ │ - strd r5, r6, [r4, #-4] │ │ - mov lr, r1 │ │ - b.n 42a1e │ │ - strd ip, r0, [r8] │ │ - str.w r9, [r8, #8] │ │ - add sp, #12 │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #40] @ (42a94 ) │ │ - movs r1, #75 @ 0x4b │ │ - ldr r2, [pc, #40] @ (42a98 ) │ │ - add r0, pc │ │ - add r2, pc │ │ - bl 3fa4c │ │ - ldr r3, [pc, #40] @ (42aa0 ) │ │ - mov r0, lr │ │ - add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #24] @ (42a9c ) │ │ - mov r0, fp │ │ - mov r1, r2 │ │ - add r3, pc │ │ - bl 3f9a8 │ │ - movs r0, #4 │ │ - mov r1, r7 │ │ - bl 3dfa4 │ │ - subs r3, #161 @ 0xa1 │ │ - vqrdmlsh.s , , d28[0] │ │ - movs r1, r1 │ │ - strh r6, [r2, #44] @ 0x2c │ │ - movs r1, r1 │ │ - strh r2, [r6, #42] @ 0x2a │ │ - movs r1, r1 │ │ - cmp r0, #0 │ │ - ittt eq │ │ - clzeq r0, r2 │ │ - lsreq r0, r0, #5 │ │ - bxeq lr │ │ - stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ - sub sp, #16 │ │ - ldrd r4, r8, [sp, #40] @ 0x28 │ │ - mov r7, r0 │ │ - ldr r0, [sp, #48] @ 0x30 │ │ - mov r6, r3 │ │ - mov r5, r1 │ │ - cbz r0, 42b10 │ │ - cmp r2, #0 │ │ - beq.n 42b6a │ │ - mov r3, r5 │ │ - cmp r6, r5 │ │ + str r1, [sp, #8] │ │ + mov r5, r0 │ │ + ldrd r1, r9, [r0, #20] │ │ + ldrd r0, sl, [r0, #60] @ 0x3c │ │ + mov r2, r9 │ │ + cmp sl, r9 │ │ it cc │ │ - movcc r3, r6 │ │ - mov r0, r2 │ │ - mov r1, r7 │ │ - mov r2, r3 │ │ - blx d8860 │ │ + movcc r2, sl │ │ + blx d8870 │ │ + mov r6, r0 │ │ + ldrd r1, r4, [r5, #100] @ 0x64 │ │ + ldrd r0, r7, [r5, #140] @ 0x8c │ │ + mov r2, r4 │ │ + cmp r7, r4 │ │ + it cc │ │ + movcc r2, r7 │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ - subeq r0, r6, r5 │ │ - movs r6, #0 │ │ - cmp r0, #1 │ │ - it lt │ │ - movlt r6, #1 │ │ - cmp r4, #0 │ │ - beq.n 42b70 │ │ - mov r2, r5 │ │ - mov r0, r4 │ │ - mov r1, r7 │ │ - cmp r8, r5 │ │ + subeq r0, r7, r4 │ │ + cmp r6, #0 │ │ + it eq │ │ + subeq.w r6, sl, r9 │ │ + lsrs r1, r6, #31 │ │ + movs r2, #80 @ 0x50 │ │ + add.w r1, r1, r1, lsl #2 │ │ + cmp r0, #0 │ │ + mov.w r4, #120 @ 0x78 │ │ + add.w sl, r5, r1, lsl #3 │ │ + ldrd r1, r3, [sl, #20] │ │ + str r3, [sp, #0] │ │ + it mi │ │ + movmi r2, #120 @ 0x78 │ │ + add.w r0, r5, r2 │ │ + str r0, [sp, #4] │ │ + ldrd r0, r8, [r0, #20] │ │ + mov r2, r3 │ │ + it mi │ │ + movmi r4, #80 @ 0x50 │ │ + cmp r8, r3 │ │ it cc │ │ movcc r2, r8 │ │ - blx d8860 │ │ - cmp r0, #0 │ │ - it eq │ │ - subeq.w r0, r8, r5 │ │ - mvns r0, r0 │ │ + blx d8870 │ │ + mov r7, r0 │ │ + mvns r0, r6 │ │ lsrs r0, r0, #31 │ │ - ands r0, r6 │ │ - add sp, #16 │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ - add r0, sp, #4 │ │ - mov r1, r7 │ │ - mov r7, r2 │ │ - mov r2, r5 │ │ - bl 3e320 │ │ - cbz r7, 42b7a │ │ - ldrd r1, r5, [sp, #8] │ │ - mov r0, r7 │ │ - mov r2, r5 │ │ - cmp r6, r5 │ │ - it cc │ │ - movcc r2, r6 │ │ - blx d8860 │ │ - cmp r0, #0 │ │ + add.w r9, r5, r4 │ │ + add.w r0, r0, r0, lsl #2 │ │ + cmp r7, #0 │ │ + ldr r2, [sp, #0] │ │ + add.w r5, r5, r0, lsl #3 │ │ + ldrd r0, fp, [r9, #20] │ │ + ldrd r1, r4, [r5, #20] │ │ it eq │ │ - subeq r0, r6, r5 │ │ - movs r5, #0 │ │ - cmp r0, #1 │ │ - it lt │ │ - movlt r5, #1 │ │ - cbz r4, 42b80 │ │ - ldrd r1, r6, [sp, #8] │ │ - mov r0, r4 │ │ - mov r2, r6 │ │ - cmp r8, r6 │ │ + subeq.w r7, r8, r2 │ │ + ldr r6, [sp, #4] │ │ + cmp r7, #0 │ │ + mov r2, r4 │ │ + mov r8, r6 │ │ + it mi │ │ + movmi r8, r5 │ │ + cmp fp, r4 │ │ it cc │ │ - movcc r2, r8 │ │ - blx d8860 │ │ + movcc r2, fp │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ - subeq.w r0, r8, r6 │ │ - mvns r0, r0 │ │ - lsrs r0, r0, #31 │ │ - ldr r1, [sp, #4] │ │ - ands r0, r5 │ │ - cbnz r1, 42b8a │ │ - add sp, #16 │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ - movs r6, #1 │ │ - cmp r4, #0 │ │ - bne.n 42aec │ │ - movs r0, #0 │ │ - ands r0, r6 │ │ - add sp, #16 │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ - movs r5, #1 │ │ - cmp r4, #0 │ │ - bne.n 42b40 │ │ - movs r0, #0 │ │ - ldr r1, [sp, #4] │ │ - ands r0, r5 │ │ - cmp r1, #0 │ │ - beq.n 42b64 │ │ - ldr r1, [sp, #8] │ │ - mov r4, r0 │ │ - mov r0, r1 │ │ - blx d87c0 │ │ - mov r0, r4 │ │ - add sp, #16 │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ - stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ - sub sp, #16 │ │ - ldrd r4, r3, [r1, #16] │ │ - ldrd lr, ip, [sp, #40] @ 0x28 │ │ - cmp r4, r3 │ │ - bls.n 42bd2 │ │ - ldr r5, [r1, #12] │ │ - sub.w r8, r4, r3 │ │ - adds r6, r3, #1 │ │ - add r5, r3 │ │ - movs r3, #0 │ │ - ldrb r7, [r5, r3] │ │ - sub.w r4, r7, #48 @ 0x30 │ │ - cmp r4, #10 │ │ - bcs.n 42be4 │ │ - adds r4, r6, r3 │ │ - adds r3, #1 │ │ - cmp r8, r3 │ │ - str r4, [r1, #20] │ │ - bne.n 42bba │ │ - mov r3, r8 │ │ - b.n 42bd4 │ │ - movs r3, #0 │ │ - strd lr, ip, [sp] │ │ - str r3, [sp, #8] │ │ - bl 42c10 │ │ - add sp, #16 │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ - cmp r7, #46 @ 0x2e │ │ - beq.n 42c00 │ │ - cmp r7, #69 @ 0x45 │ │ - it ne │ │ - cmpne r7, #101 @ 0x65 │ │ - bne.n 42bd4 │ │ - strd lr, ip, [sp] │ │ - str r3, [sp, #8] │ │ - bl 42df4 │ │ - add sp, #16 │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ - strd lr, ip, [sp] │ │ - str r3, [sp, #8] │ │ - bl 42cdc │ │ - add sp, #16 │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ - push {r4, r5, r6, lr} │ │ - sub sp, #16 │ │ - mov r6, r1 │ │ - mov r4, r0 │ │ - ldrd r0, r1, [sp, #32] │ │ - mov r5, r2 │ │ - bl d52e8 │ │ - ldr r2, [sp, #40] @ 0x28 │ │ - vmov d16, r0, r1 │ │ - cmp r2, #0 │ │ - mov r3, r2 │ │ + subeq.w r0, fp, r4 │ │ + cmp r0, #0 │ │ + ittt mi │ │ + movmi r8, r9 │ │ + movmi r9, r5 │ │ + movmi r5, r6 │ │ + ldrd r0, r3, [r8, #20] │ │ + cmp r7, #0 │ │ + str r3, [sp, #0] │ │ it mi │ │ - negmi r3, r2 │ │ - cmp.w r3, #308 @ 0x134 │ │ - bls.n 42c5e │ │ - vldr d17, [pc, #152] @ 42cd0 │ │ - vcmp.f64 d16, #0.0 │ │ - vmrs APSR_nzcv, fpscr │ │ - beq.n 42cb2 │ │ - cmp.w r2, #4294967295 @ 0xffffffff │ │ - bgt.n 42c88 │ │ - vdiv.f64 d16, d16, d17 │ │ - adds.w r2, r2, #308 @ 0x134 │ │ - mov r3, r2 │ │ + movmi r5, sl │ │ + ldrd r1, fp, [r5, #20] │ │ it mi │ │ - negmi r3, r2 │ │ - cmp.w r3, #308 @ 0x134 │ │ - bhi.n 42c3a │ │ - ldr r0, [pc, #120] @ (42cd8 ) │ │ - cmp.w r2, #4294967295 @ 0xffffffff │ │ - add r0, pc │ │ - add.w r0, r0, r3, lsl #3 │ │ - vldr d17, [r0] │ │ - ble.n 42cae │ │ - vmul.f64 d16, d16, d17 │ │ - vmov r0, r1, d16 │ │ - bic.w r1, r1, #2147483648 @ 0x80000000 │ │ - eor.w r1, r1, #1879048192 @ 0x70000000 │ │ - eor.w r1, r1, #267386880 @ 0xff00000 │ │ - orrs r0, r1 │ │ - bne.n 42cb2 │ │ - ldr r0, [r6, #12] │ │ - movs r3, #14 │ │ - ldr r1, [r6, #16] │ │ - ldr r2, [r6, #20] │ │ - str r3, [sp, #4] │ │ - bl 75b28 │ │ - mov r2, r0 │ │ - mov r3, r1 │ │ - add r0, sp, #4 │ │ - mov r1, r2 │ │ - mov r2, r3 │ │ - bl 75c44 │ │ - str r0, [r4, #4] │ │ - movs r0, #1 │ │ - str r0, [r4, #0] │ │ - add sp, #16 │ │ - pop {r4, r5, r6, pc} │ │ - vdiv.f64 d16, d16, d17 │ │ - vneg.f64 d17, d16 │ │ - cmp r5, #0 │ │ - it ne │ │ - vmovne.f64 d17, d16 │ │ - movs r0, #0 │ │ - vstr d17, [r4, #8] │ │ - str r0, [r4, #0] │ │ - add sp, #16 │ │ - pop {r4, r5, r6, pc} │ │ - nop │ │ - nop │ │ - nop │ │ - ldmia r0!, {r5, r7} │ │ - strh r3, [r5, #46] @ 0x2e │ │ - ldmia r4, {r0, r1, r4, r5, r6, r7} │ │ - ldrb r1, [r4, #31] │ │ - ldr r0, [pc, #928] @ (4307c ) │ │ - vtbl.8 d30, {d13-d14}, d29 │ │ - ldr r7, [pc, #960] @ (430a0 ) │ │ - sub sp, #28 │ │ - str r0, [sp, #12] │ │ - ldrd ip, r0, [r1, #16] │ │ - adds r6, r0, #1 │ │ - ldrd r5, r3, [sp, #64] @ 0x40 │ │ - ldr r7, [sp, #72] @ 0x48 │ │ - cmp r6, ip │ │ - str r6, [r1, #20] │ │ - bcs.n 42db2 │ │ - ldr.w lr, [r1, #12] │ │ - movw sl, #39321 @ 0x9999 │ │ - movw fp, #39320 @ 0x9998 │ │ - strd r7, r2, [sp, #4] │ │ - movs r7, #0 │ │ - movt sl, #6553 @ 0x1999 │ │ - movt fp, #39321 @ 0x9999 │ │ - mov.w r8, #10 │ │ - sub.w r0, r6, ip │ │ - str r0, [sp, #0] │ │ - b.n 42d32 │ │ - add.w r0, r3, r3, lsl #2 │ │ - adds r6, #1 │ │ - subs r7, #1 │ │ - str r6, [r1, #20] │ │ - lsls r3, r0, #1 │ │ - cmp r6, ip │ │ - umlal r4, r3, r5, r8 │ │ - mov r5, r4 │ │ - beq.n 42d94 │ │ - ldrb.w r9, [lr, r6] │ │ - sub.w r4, r9, #48 @ 0x30 │ │ - uxtb r4, r4 │ │ - cmp r4, #10 │ │ - bcs.n 42d72 │ │ - subs.w r0, fp, r5 │ │ - sbcs.w r0, sl, r3 │ │ - bcs.n 42d1c │ │ - eor.w r0, r3, sl │ │ - eor.w r2, r5, #2576980377 @ 0x99999999 │ │ - orrs r0, r2 │ │ - bne.n 42d5a │ │ - cmp r4, #5 │ │ - bls.n 42d1c │ │ - ldr r0, [sp, #4] │ │ - add r0, r7 │ │ - str r0, [sp, #72] @ 0x48 │ │ - strd r5, r3, [sp, #64] @ 0x40 │ │ - ldrd r2, r0, [sp, #8] │ │ - add sp, #28 │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w 42f78 │ │ - cbz r7, 42dc4 │ │ - ldr r0, [sp, #4] │ │ - orr.w r2, r9, #32 │ │ - cmp r2, #101 @ 0x65 │ │ - add r0, r7 │ │ - bne.n 42d9c │ │ - str r0, [sp, #72] @ 0x48 │ │ - strd r5, r3, [sp, #64] @ 0x40 │ │ - ldrd r2, r0, [sp, #8] │ │ - add sp, #28 │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w 42df4 │ │ - ldrd r2, r0, [sp] │ │ - add r0, r2 │ │ - b.n 42d9e │ │ - mov r4, r5 │ │ - ldr r2, [sp, #8] │ │ - str r0, [sp, #72] @ 0x48 │ │ - strd r4, r3, [sp, #64] @ 0x40 │ │ - ldr r0, [sp, #12] │ │ - add sp, #28 │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w 42c10 │ │ - ldr r1, [r1, #12] │ │ - movs r2, #5 │ │ - str r2, [sp, #16] │ │ - adds r2, r0, #2 │ │ - cmp r2, ip │ │ - it cs │ │ - movcs r2, ip │ │ - mov r0, r1 │ │ - b.n 42dd2 │ │ - movs r0, #13 │ │ - adds r2, r6, #1 │ │ - str r0, [sp, #16] │ │ - mov r0, lr │ │ - cmp r2, ip │ │ - it cs │ │ - movcs r2, ip │ │ + movmi sl, r6 │ │ + mov r2, fp │ │ + cmp r3, fp │ │ + it cc │ │ + movcc r2, r3 │ │ + blx d8870 │ │ + ldr.w ip, [sp, #8] │ │ + cmp r0, #0 │ │ + ldmia.w sl!, {r2, r3, r4, r6, r7} │ │ mov r1, ip │ │ - bl 75b28 │ │ - mov r2, r0 │ │ - mov r3, r1 │ │ - add r0, sp, #16 │ │ - mov r1, r2 │ │ - mov r2, r3 │ │ - bl 75c44 │ │ - ldr r1, [sp, #12] │ │ - movs r2, #1 │ │ - strd r2, r0, [r1] │ │ - add sp, #28 │ │ + stmia r1!, {r2, r3, r4, r6, r7} │ │ + ldmia.w sl, {r2, r3, r4, r6, r7} │ │ + stmia r1!, {r2, r3, r4, r6, r7} │ │ + ldr r1, [sp, #0] │ │ + it eq │ │ + subeq.w r0, r1, fp │ │ + cmp r0, #0 │ │ + mov r0, r5 │ │ + it mi │ │ + movmi r0, r8 │ │ + add.w r1, ip, #40 @ 0x28 │ │ + ldmia r0!, {r2, r3, r4, r6, r7} │ │ + stmia r1!, {r2, r3, r4, r6, r7} │ │ + ldmia.w r0, {r2, r3, r4, r6, r7} │ │ + add.w r0, ip, #80 @ 0x50 │ │ + stmia r1!, {r2, r3, r4, r6, r7} │ │ + it pl │ │ + movpl r5, r8 │ │ + ldmia r5!, {r1, r2, r3, r6, r7} │ │ + stmia r0!, {r1, r2, r3, r6, r7} │ │ + ldmia.w r5, {r1, r2, r3, r6, r7} │ │ + stmia r0!, {r1, r2, r3, r6, r7} │ │ + add.w r0, ip, #120 @ 0x78 │ │ + ldmia.w r9!, {r1, r2, r3, r6, r7} │ │ + stmia r0!, {r1, r2, r3, r6, r7} │ │ + ldmia.w r9, {r1, r2, r3, r6, r7} │ │ + stmia r0!, {r1, r2, r3, r6, r7} │ │ + add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #12 │ │ - ldrd ip, r6, [r1, #16] │ │ - adds r3, r6, #1 │ │ - ldrd r9, r8, [sp, #48] @ 0x30 │ │ - ldr.w fp, [sp, #56] @ 0x38 │ │ - cmp r3, ip │ │ - str r3, [r1, #20] │ │ - bcs.n 42e28 │ │ - ldr r7, [r1, #12] │ │ - mov.w sl, #1 │ │ - ldrb r7, [r7, r3] │ │ - cmp r7, #43 @ 0x2b │ │ - beq.n 42e22 │ │ - cmp r7, #45 @ 0x2d │ │ - bne.n 42e2c │ │ - mov.w sl, #0 │ │ - adds r3, r6, #2 │ │ - str r3, [r1, #20] │ │ - b.n 42e2c │ │ - mov.w sl, #1 │ │ - cmp r3, ip │ │ - bcs.n 42eb4 │ │ - ldr.w lr, [r1, #12] │ │ - ldrb.w r4, [lr, r3] │ │ - adds r3, #1 │ │ - str r3, [r1, #20] │ │ - subs r4, #48 @ 0x30 │ │ - uxtb r4, r4 │ │ - cmp r4, #10 │ │ - bcs.n 42ee0 │ │ - cmp r3, ip │ │ - bcs.n 42e94 │ │ - movw r6, #52427 @ 0xcccb │ │ - movt r6, #3276 @ 0xccc │ │ - b.n 42e5e │ │ - add.w r4, r4, r4, lsl #2 │ │ - cmp ip, r3 │ │ - add.w r4, r7, r4, lsl #1 │ │ - beq.n 42e94 │ │ - ldrb.w r7, [lr, r3] │ │ - subs r7, #48 @ 0x30 │ │ - uxtb r7, r7 │ │ - cmp r7, #10 │ │ - bcs.n 42e94 │ │ - adds r3, #1 │ │ - cmp r4, r6 │ │ - str r3, [r1, #20] │ │ - ble.n 42e52 │ │ - adds r5, r6, #1 │ │ - cmp r4, r5 │ │ - bne.n 42e7c │ │ - cmp r7, #7 │ │ - bls.n 42e52 │ │ - orr.w r3, r9, r8 │ │ - str.w sl, [sp, #48] @ 0x30 │ │ - clz r3, r3 │ │ - lsrs r3, r3, #5 │ │ - add sp, #12 │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w 42ef0 │ │ - qsub r3, fp, r4 │ │ - str.w r9, [sp, #48] @ 0x30 │ │ - cmp.w sl, #0 │ │ - it ne │ │ - qaddne r3, fp, r4 │ │ - strd r8, r3, [sp, #52] @ 0x34 │ │ - add sp, #12 │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w 42c10 │ │ - ldr r1, [r1, #12] │ │ - movs r2, #5 │ │ - mov r4, r0 │ │ - str r2, [sp, #0] │ │ - mov r0, r1 │ │ - mov r1, ip │ │ - mov r2, r3 │ │ - bl 75b28 │ │ - mov r2, r0 │ │ - mov r3, r1 │ │ - mov r1, r2 │ │ - mov r0, sp │ │ - mov r2, r3 │ │ - bl 75c44 │ │ - movs r1, #1 │ │ - strd r1, r0, [r4] │ │ - add sp, #12 │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - movs r1, #13 │ │ - mov r4, r0 │ │ - mov r0, lr │ │ - str r1, [sp, #0] │ │ - b.n 42ebe │ │ - bmi.n 42e96 │ │ - bmi.n 42e98 │ │ - bmi.n 42e9a │ │ - push {r4, lr} │ │ - sub sp, #16 │ │ - cbnz r3, 42efa │ │ - ldr r3, [sp, #24] │ │ - cbnz r3, 42f34 │ │ - ldrd ip, r3, [r1, #16] │ │ - cmp r3, ip │ │ - bcs.n 42f18 │ │ - ldr.w lr, [r1, #12] │ │ - ldrb.w r4, [lr, r3] │ │ - subs r4, #48 @ 0x30 │ │ - cmp r4, #10 │ │ - bcs.n 42f18 │ │ - adds r3, #1 │ │ - str r3, [r1, #20] │ │ - cmp ip, r3 │ │ - bne.n 42f06 │ │ - vldr d17, [pc, #84] @ 42f70 │ │ - cmp r2, #0 │ │ - vldr d16, [pc, #72] @ 42f68 │ │ - it ne │ │ - vmovne.f64 d17, d16 │ │ - vstr d17, [r0, #8] │ │ - movs r1, #0 │ │ - str r1, [r0, #0] │ │ - add sp, #16 │ │ - pop {r4, pc} │ │ - ldrd ip, r3, [r1, #12] │ │ - mov r4, r0 │ │ - ldr r2, [r1, #20] │ │ - movs r1, #14 │ │ - str r1, [sp, #4] │ │ - mov r1, r3 │ │ - mov r0, ip │ │ - bl 75b28 │ │ - mov r2, r0 │ │ - mov r3, r1 │ │ - add r0, sp, #4 │ │ - mov r1, r2 │ │ - mov r2, r3 │ │ - bl 75c44 │ │ - mov r1, r0 │ │ - mov r0, r4 │ │ - str r1, [r4, #4] │ │ - movs r1, #1 │ │ - str r1, [r0, #0] │ │ - add sp, #16 │ │ - pop {r4, pc} │ │ - nop │ │ - nop │ │ - ... │ │ - movs r0, r0 │ │ - strh r0, [r0, #0] │ │ - stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ - ldrd r4, r5, [r1, #16] │ │ - ldrd lr, ip, [sp, #24] │ │ - ldr.w r8, [sp, #32] │ │ - cmp r5, r4 │ │ - bcs.n 42fba │ │ - ldr r6, [r1, #12] │ │ - ldrb r7, [r6, r5] │ │ - sub.w r3, r7, #48 @ 0x30 │ │ - cmp r3, #9 │ │ - bhi.n 42fa2 │ │ - adds r5, #1 │ │ - str r5, [r1, #20] │ │ - cmp r4, r5 │ │ - bne.n 42f8e │ │ - b.n 42fba │ │ - orr.w r3, r7, #32 │ │ - cmp r3, #101 @ 0x65 │ │ - bne.n 42fba │ │ - str.w r8, [sp, #32] │ │ - strd lr, ip, [sp, #24] │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, lr} │ │ - b.w 42df4 │ │ - str.w r8, [sp, #32] │ │ - strd lr, ip, [sp, #24] │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, lr} │ │ - b.w 42c10 │ │ - bmi.n 42f76 │ │ - push {r4, r5, r6, r7, lr} │ │ - sub sp, #4 │ │ - ldrb r1, [r0, #0] │ │ - tbb [pc, r1] │ │ - asrs r0, r2, #32 │ │ - asrs r0, r2, #32 │ │ - asrs r0, r2, #32 │ │ - asrs r6, r3, #8 │ │ - asrs r2, r2, #8 │ │ - asrs r2, r2, #32 │ │ - asrs r0, r2, #32 │ │ - asrs r0, r2, #32 │ │ - asrs r6, r3, #8 │ │ - asrs r2, r2, #8 │ │ - asrs r2, r2, #32 │ │ - subs r6, #16 │ │ - ldr r1, [r6, #32] │ │ - asrs r4, r3, #32 │ │ - ldrsh r4, [r3, r0] │ │ - ldr r2, [pc, #336] @ (43148 ) │ │ - add sp, #4 │ │ - pop {r4, r5, r6, r7, pc} │ │ - ldr r1, [r0, #4] │ │ - cmp r1, #0 │ │ - beq.n 42ff6 │ │ - ldr r4, [r0, #8] │ │ - mov r0, r4 │ │ - add sp, #4 │ │ - ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ - ldr r4, [r0, #4] │ │ - b.n 43098 │ │ - ldr r1, [r0, #4] │ │ - lsls r1, r1, #1 │ │ - beq.n 43024 │ │ - ldr r1, [r0, #8] │ │ - mov r4, r0 │ │ - mov r0, r1 │ │ - blx d87c0 │ │ - mov r0, r4 │ │ - ldr r1, [r0, #16] │ │ - lsls r1, r1, #1 │ │ - beq.n 42ff6 │ │ - ldr r4, [r0, #20] │ │ - mov r0, r4 │ │ - add sp, #4 │ │ - ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ - ldrd r4, r7, [r0, #8] │ │ + mov r8, r2 │ │ + mov sl, r1 │ │ mov r6, r0 │ │ - cmp r7, #0 │ │ - beq.n 430c0 │ │ - mov r5, r4 │ │ - mov r0, r5 │ │ - bl 42fcc │ │ - adds r5, #72 @ 0x48 │ │ - subs r7, #1 │ │ - bne.n 43044 │ │ - b.n 430c0 │ │ - ldrd r4, r7, [r0, #8] │ │ + cmp r3, #8 │ │ + bcc.n 4420e │ │ + lsrs r5, r3, #3 │ │ + mov.w r4, #280 @ 0x118 │ │ + mla r2, r5, r4, r6 │ │ + add.w r7, r5, r5, lsl #2 │ │ + mov r0, r6 │ │ + add.w r1, r6, r7, lsl #5 │ │ + mov r3, r5 │ │ + bl 441be │ │ + mla r2, r5, r4, sl │ │ + add.w r1, sl, r7, lsl #5 │ │ mov r6, r0 │ │ - cbz r7, 430c0 │ │ - mov r5, r4 │ │ - mov r0, r5 │ │ - bl 42fcc │ │ - adds r5, #72 @ 0x48 │ │ - subs r7, #1 │ │ - bne.n 4305c │ │ - b.n 430c0 │ │ - ldr r1, [r0, #48] @ 0x30 │ │ - cmp r1, #0 │ │ - beq.n 42ff6 │ │ - ldr r4, [r0, #52] @ 0x34 │ │ - mov r0, r4 │ │ - add sp, #4 │ │ - ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ - ldr r1, [r0, #48] @ 0x30 │ │ - cbz r1, 4308e │ │ - ldr r1, [r0, #52] @ 0x34 │ │ - mov r4, r0 │ │ - mov r0, r1 │ │ - blx d87c0 │ │ - mov r0, r4 │ │ - ldr r4, [r0, #64] @ 0x40 │ │ - b.n 43098 │ │ - ldr r4, [r0, #8] │ │ - cmp r4, #0 │ │ - beq.n 42ff6 │ │ - mov r0, r4 │ │ - bl 42fcc │ │ + mov r0, sl │ │ + mov r3, r5 │ │ + bl 441be │ │ + mla r2, r5, r4, r8 │ │ + add.w r1, r8, r7, lsl #5 │ │ + mov sl, r0 │ │ + mov r0, r8 │ │ + mov r3, r5 │ │ + bl 441be │ │ + mov r8, r0 │ │ + ldrd r4, r9, [r6, #20] │ │ + ldrd r1, r7, [sl, #20] │ │ + cmp r9, r7 │ │ + mov r2, r7 │ │ mov r0, r4 │ │ - add sp, #4 │ │ - ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ - ldrd r4, r7, [r0, #8] │ │ - mov r6, r0 │ │ - cbz r7, 430c0 │ │ - mov r5, r4 │ │ - mov r0, r5 │ │ - bl 42fcc │ │ - adds r5, #72 @ 0x48 │ │ - subs r7, #1 │ │ - bne.n 430b4 │ │ - ldr r0, [r6, #4] │ │ + it cc │ │ + movcc r2, r9 │ │ + str r1, [sp, #8] │ │ + blx d8870 │ │ + str.w r8, [sp, #4] │ │ + mov r5, r0 │ │ + ldrd fp, r8, [r8, #20] │ │ cmp r0, #0 │ │ - beq.n 42ff6 │ │ + mov r2, r8 │ │ mov r0, r4 │ │ - add sp, #4 │ │ - ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + it eq │ │ + subeq.w r5, r9, r7 │ │ + cmp r9, r8 │ │ + mov r1, fp │ │ + it cc │ │ + movcc r2, r9 │ │ + blx d8870 │ │ + cmp r0, #0 │ │ + it eq │ │ + subeq.w r0, r9, r8 │ │ + eors r0, r5 │ │ + bmi.n 44276 │ │ + mov r2, r8 │ │ + cmp r7, r8 │ │ + it cc │ │ + movcc r2, r7 │ │ + ldr r0, [sp, #8] │ │ + mov r1, fp │ │ + blx d8870 │ │ + cmp r0, #0 │ │ + it eq │ │ + subeq.w r0, r7, r8 │ │ + eors r0, r5 │ │ + ldr r0, [sp, #4] │ │ + it mi │ │ + movmi sl, r0 │ │ + mov r6, sl │ │ + mov r0, r6 │ │ + add sp, #12 │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub.w sp, sp, #4096 @ 0x1000 │ │ sub sp, #4 │ │ movw r3, #11306 @ 0x2c2a │ │ sub.w r2, r1, r1, lsr #1 │ │ movt r3, #10 │ │ cmp r1, r3 │ │ @@ -40317,91 +41909,91 @@ │ │ it ls │ │ movls r3, r2 │ │ cmp r3, #48 @ 0x30 │ │ mov r4, r3 │ │ it ls │ │ movls r4, #48 @ 0x30 │ │ cmp.w r3, #342 @ 0x156 │ │ - bcs.n 43120 │ │ + bcs.n 442cc │ │ movs r2, #0 │ │ cmp r1, #65 @ 0x41 │ │ it cc │ │ movcc r2, #1 │ │ str r2, [sp, #0] │ │ add r2, sp, #4 │ │ movw r3, #341 @ 0x155 │ │ - bl 4317a │ │ + bl 44326 │ │ add.w sp, sp, #4096 @ 0x1000 │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movw r3, #43691 @ 0xaaab │ │ movt r3, #2730 @ 0xaaa │ │ cmp r2, r3 │ │ - bcc.n 43130 │ │ - bl 3e03c │ │ + bcc.n 442dc │ │ + bl 3e344 │ │ add.w r2, r4, r4, lsl #1 │ │ movs r7, #0 │ │ lsls r6, r2, #2 │ │ - beq.n 4314e │ │ + beq.n 442fa │ │ mov r8, r0 │ │ mov r0, r6 │ │ mov r9, r1 │ │ - blx d87f0 │ │ - cbz r0, 43172 │ │ + blx d8810 │ │ + cbz r0, 4431e │ │ mov r5, r0 │ │ mov r1, r9 │ │ mov r0, r8 │ │ - b.n 43152 │ │ + b.n 442fe │ │ movs r5, #4 │ │ movs r4, #0 │ │ mov r2, r5 │ │ mov r3, r4 │ │ cmp r1, #65 @ 0x41 │ │ it cc │ │ movcc r7, #1 │ │ str r7, [sp, #0] │ │ - bl 4317a │ │ + bl 44326 │ │ mov r0, r5 │ │ add.w sp, sp, #4096 @ 0x1000 │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ movs r0, #4 │ │ mov r1, r6 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #412 @ 0x19c │ │ mov sl, r1 │ │ mov r5, r3 │ │ str r2, [sp, #76] @ 0x4c │ │ mov.w r1, #1073741824 @ 0x40000000 │ │ str r0, [sp, #60] @ 0x3c │ │ movs r0, #0 │ │ mov r2, sl │ │ movs r3, #0 │ │ - bl d53d0 │ │ + bl d53dc │ │ umull r2, r3, r0, sl │ │ adds r7, r0, #1 │ │ adc.w r6, r1, #0 │ │ mla r3, r1, sl, r3 │ │ eor.w r3, r3, #1073741824 @ 0x40000000 │ │ orrs r2, r3 │ │ it eq │ │ moveq r6, r1 │ │ str r6, [sp, #24] │ │ it eq │ │ moveq r7, r0 │ │ cmp.w sl, #4096 @ 0x1000 │ │ str r7, [sp, #28] │ │ - bhi.n 431c8 │ │ + bhi.n 44374 │ │ sub.w r0, sl, sl, lsr #1 │ │ cmp r0, #64 @ 0x40 │ │ it cs │ │ movcs r0, #64 @ 0x40 │ │ - b.n 431ea │ │ + b.n 44396 │ │ orr.w r0, sl, #1 │ │ movs r2, #1 │ │ clz r0, r0 │ │ eor.w r0, r0, #31 │ │ and.w r1, r0, #1 │ │ add.w r0, r1, r0, lsr #1 │ │ lsr.w r1, sl, r0 │ │ @@ -40423,139 +42015,139 @@ │ │ add.w r1, sp, #346 @ 0x15a │ │ adds r0, #32 │ │ str r0, [sp, #16] │ │ strd sl, r5, [sp, #44] @ 0x2c │ │ add.w r8, r4, r4, lsl #1 │ │ cmp sl, r4 │ │ str r4, [sp, #64] @ 0x40 │ │ - bls.n 43256 │ │ + bls.n 44402 │ │ ldr r0, [sp, #60] @ 0x3c │ │ sub.w sl, sl, r4 │ │ str r2, [sp, #52] @ 0x34 │ │ add.w r7, r0, r8, lsl #2 │ │ ldr r0, [sp, #32] │ │ str.w r8, [sp, #72] @ 0x48 │ │ cmp sl, r0 │ │ - bcs.n 43268 │ │ + bcs.n 44414 │ │ ldr r0, [sp, #448] @ 0x1c0 │ │ - cbz r0, 43272 │ │ + cbz r0, 4441e │ │ movs r0, #0 │ │ cmp.w sl, #32 │ │ strd r0, r0, [sp] │ │ it cs │ │ movcs.w sl, #32 │ │ ldr r2, [sp, #76] @ 0x4c │ │ mov r0, r7 │ │ mov r1, sl │ │ mov r8, r3 │ │ - bl 43664 │ │ - b.n 4339e │ │ + bl 44810 │ │ + b.n 4454a │ │ movs r5, #1 │ │ movs r0, #0 │ │ str r0, [sp, #56] @ 0x38 │ │ cmp r2, #2 │ │ - bcs.w 43406 │ │ + bcs.w 445b2 │ │ ldr.w r8, [sp, #56] @ 0x38 │ │ - b.n 4360e │ │ + b.n 447ba │ │ cmp.w sl, #2 │ │ - bcs.n 43282 │ │ + bcs.n 4442e │ │ mov r8, r3 │ │ - b.n 4339e │ │ + b.n 4454a │ │ ldr r0, [sp, #32] │ │ mov r8, r3 │ │ cmp sl, r0 │ │ it cs │ │ movcs sl, r0 │ │ mov.w r5, sl, lsl #1 │ │ - b.n 433a4 │ │ + b.n 44550 │ │ ldrd r1, r5, [r7, #4] │ │ ldrd r0, r6, [r7, #16] │ │ mov r2, r5 │ │ cmp r6, r5 │ │ it cc │ │ movcc r2, r6 │ │ mov r4, r0 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ subeq r0, r6, r5 │ │ cmp r0, #0 │ │ - bmi.n 432ae │ │ + bmi.n 4445a │ │ cmp.w sl, #2 │ │ - bne.n 432bc │ │ + bne.n 44468 │ │ mov.w sl, #2 │ │ - b.n 43398 │ │ + b.n 44544 │ │ cmp.w sl, #2 │ │ - bne.n 432f8 │ │ + bne.n 444a4 │ │ mov.w fp, #2 │ │ movs r0, #1 │ │ - b.n 43358 │ │ + b.n 44504 │ │ str r0, [sp, #56] @ 0x38 │ │ mov.w fp, #2 │ │ ldr r0, [sp, #16] │ │ mov r1, r4 │ │ str r7, [sp, #68] @ 0x44 │ │ add.w r7, r0, r8, lsl #2 │ │ ldrd r4, r5, [r7, #-4] │ │ mov r2, r6 │ │ cmp r5, r6 │ │ it cc │ │ movcc r2, r5 │ │ mov r0, r4 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ subeq r0, r5, r6 │ │ cmp r0, #0 │ │ - bmi.n 43336 │ │ + bmi.n 444e2 │ │ add.w fp, fp, #1 │ │ adds r7, #12 │ │ mov r6, r5 │ │ mov r1, r4 │ │ cmp sl, fp │ │ - bne.n 432cc │ │ - b.n 43334 │ │ + bne.n 44478 │ │ + b.n 444e0 │ │ str r0, [sp, #56] @ 0x38 │ │ mov.w fp, #2 │ │ ldr r0, [sp, #16] │ │ mov r1, r4 │ │ str r7, [sp, #68] @ 0x44 │ │ add.w r7, r0, r8, lsl #2 │ │ ldrd r4, r5, [r7, #-4] │ │ mov r2, r6 │ │ cmp r5, r6 │ │ it cc │ │ movcc r2, r5 │ │ mov r0, r4 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ subeq r0, r5, r6 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 43336 │ │ + bgt.n 444e2 │ │ add.w fp, fp, #1 │ │ adds r7, #12 │ │ mov r6, r5 │ │ mov r1, r4 │ │ cmp sl, fp │ │ - bne.n 43308 │ │ + bne.n 444b4 │ │ mov fp, sl │ │ ldr r3, [sp, #48] @ 0x30 │ │ ldrd r4, r7, [sp, #64] @ 0x40 │ │ ldr r0, [sp, #32] │ │ cmp fp, r0 │ │ - bcc.w 43234 │ │ + bcc.w 443e0 │ │ ldr r0, [sp, #56] @ 0x38 │ │ cmp r0, #0 │ │ - bmi.n 43350 │ │ + bmi.n 444fc │ │ mov r8, r3 │ │ mov sl, fp │ │ - b.n 4339e │ │ + b.n 4454a │ │ movs.w r0, fp, lsr #1 │ │ - beq.w 43632 │ │ + beq.w 447de │ │ add.w r2, fp, fp, lsl #1 │ │ ldr r1, [sp, #8] │ │ ldr r3, [sp, #12] │ │ lsls r2, r2, #2 │ │ add.w r1, r1, r8, lsl #2 │ │ add.w r2, r2, r8, lsl #2 │ │ add r2, r3 │ │ @@ -40566,15 +42158,15 @@ │ │ ldr r6, [r2, #0] │ │ str.w r5, [r1, #-8] │ │ str.w r4, [r1, #-4] │ │ str.w r3, [r2, #-8] │ │ str.w r7, [r2, #-4] │ │ str.w r6, [r1], #12 │ │ str.w ip, [r2], #-12 │ │ - bne.n 4336c │ │ + bne.n 44518 │ │ mov sl, fp │ │ ldr.w r8, [sp, #48] @ 0x30 │ │ ldr r4, [sp, #64] @ 0x40 │ │ mov.w r0, sl, lsl #1 │ │ adds r5, r0, #1 │ │ sub.w r0, r4, r9, lsr #1 │ │ add.w r2, r4, r5, lsr #1 │ │ @@ -40601,65 +42193,65 @@ │ │ it ne │ │ clzne r1, r0 │ │ str r1, [sp, #56] @ 0x38 │ │ add.w r1, sp, #346 @ 0x15a │ │ ldr r2, [sp, #52] @ 0x34 │ │ ldr.w r8, [sp, #72] @ 0x48 │ │ cmp r2, #2 │ │ - bcc.w 43262 │ │ + bcc.w 4440e │ │ ldr r0, [sp, #20] │ │ str r5, [sp, #40] @ 0x28 │ │ add.w r0, r0, r8, lsl #2 │ │ str r0, [sp, #36] @ 0x24 │ │ ldr r0, [sp, #60] @ 0x3c │ │ add.w r0, r0, r8, lsl #2 │ │ ldr.w r8, [sp, #56] @ 0x38 │ │ str r0, [sp, #72] @ 0x48 │ │ - b.n 4354c │ │ + b.n 446f8 │ │ cmp r6, #2 │ │ it cs │ │ cmpcs.w r9, #2 │ │ - bcs.n 43440 │ │ + bcs.n 445ec │ │ ldr r0, [sp, #68] @ 0x44 │ │ add.w r1, sp, #346 @ 0x15a │ │ ldr r4, [sp, #64] @ 0x40 │ │ lsls r0, r0, #1 │ │ add.w r9, r0, #1 │ │ cmp.w fp, #1 │ │ - bhi.w 4354c │ │ - b.n 43608 │ │ + bhi.w 446f8 │ │ + b.n 447b4 │ │ cmp r4, r7 │ │ mov r0, r7 │ │ it cc │ │ movcc r0, r4 │ │ cmp r3, r0 │ │ - bcc.n 43428 │ │ + bcc.n 445d4 │ │ add.w r1, r7, r7, lsl #1 │ │ str r2, [sp, #52] @ 0x34 │ │ cmp r7, r4 │ │ add.w r9, r0, r0, lsl #1 │ │ add.w r6, sl, r1, lsl #2 │ │ mov r1, sl │ │ it hi │ │ movhi r1, r6 │ │ ldr r5, [sp, #76] @ 0x4c │ │ mov.w r2, r9, lsl #2 │ │ mov r0, r5 │ │ - bl d52ca │ │ + bl d4c3c │ │ add.w r9, r5, r9, lsl #2 │ │ cmp r7, r4 │ │ - bls.n 434da │ │ + bls.n 44686 │ │ ldr r7, [sp, #36] @ 0x24 │ │ ldrd r1, r5, [r6, #-8] │ │ ldrd r0, r4, [r9, #-8] │ │ mov r2, r5 │ │ cmp r4, r5 │ │ it cc │ │ movcc r2, r4 │ │ - blx d8860 │ │ + blx d8870 │ │ sub.w r1, r6, #12 │ │ cmp r0, #0 │ │ it eq │ │ subeq r0, r4, r5 │ │ sub.w r2, r9, #12 │ │ mov r3, r1 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ @@ -40673,30 +42265,30 @@ │ │ strd r6, r5, [r7] │ │ add.w r9, r2, r3, lsl #2 │ │ movs r2, #1 │ │ eor.w r0, r2, r0, lsr #31 │ │ orr.w r0, r0, r0, lsl #1 │ │ add.w r6, r1, r0, lsl #2 │ │ cmp r6, sl │ │ - beq.n 43536 │ │ + beq.n 446e2 │ │ ldr r0, [sp, #76] @ 0x4c │ │ subs r7, #12 │ │ cmp r9, r0 │ │ - bne.n 43478 │ │ + bne.n 44624 │ │ mov sl, r6 │ │ mov r7, r0 │ │ - b.n 4353a │ │ + b.n 446e6 │ │ mov r7, r5 │ │ ldrd r1, r4, [r7, #4] │ │ ldrd r0, r5, [r6, #4] │ │ mov r2, r4 │ │ cmp r5, r4 │ │ it cc │ │ movcc r2, r5 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ mov r1, r6 │ │ it eq │ │ subeq r0, r5, r4 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ it gt │ │ movgt r1, r7 │ │ @@ -40706,236 +42298,236 @@ │ │ movs r1, #1 │ │ eor.w r1, r1, r0, lsr #31 │ │ strd r2, r3, [sl] │ │ add.w sl, sl, #12 │ │ orr.w r1, r1, r1, lsl #1 │ │ add.w r7, r7, r1, lsl #2 │ │ cmp r7, r9 │ │ - beq.n 4353a │ │ + beq.n 446e6 │ │ lsrs r0, r0, #31 │ │ orr.w r0, r0, r0, lsl #1 │ │ add.w r6, r6, r0, lsl #2 │ │ ldr r0, [sp, #72] @ 0x48 │ │ cmp r6, r0 │ │ - bne.n 434dc │ │ - b.n 4353a │ │ + bne.n 44688 │ │ + b.n 446e6 │ │ mov sl, r6 │ │ ldr r7, [sp, #76] @ 0x4c │ │ sub.w r2, r9, r7 │ │ mov r0, sl │ │ mov r1, r7 │ │ - bl d52ca │ │ + bl d4c3c │ │ ldrd r3, r2, [sp, #48] @ 0x30 │ │ - b.n 43428 │ │ + b.n 445d4 │ │ sub.w fp, r2, #1 │ │ ldrb.w r0, [r1, fp] │ │ cmp r0, r8 │ │ - bcc.n 4360a │ │ + bcc.n 447b6 │ │ add r0, sp, #80 @ 0x50 │ │ mov r2, fp │ │ ldr.w r6, [r0, fp, lsl #2] │ │ lsrs r7, r6, #1 │ │ add.w r5, r7, r9, lsr #1 │ │ cmp r5, r3 │ │ - bhi.n 43580 │ │ + bhi.n 4472c │ │ orr.w r0, r6, r9 │ │ ands.w r0, r0, #1 │ │ - bne.n 43580 │ │ + bne.n 4472c │ │ mov.w r9, r5, lsl #1 │ │ cmp.w fp, #1 │ │ - bhi.n 4354c │ │ - b.n 43608 │ │ + bhi.n 446f8 │ │ + b.n 447b4 │ │ subs r0, r4, r5 │ │ ldr r1, [sp, #60] @ 0x3c │ │ str r5, [sp, #68] @ 0x44 │ │ add.w r0, r0, r0, lsl #1 │ │ add.w sl, r1, r0, lsl #2 │ │ lsls r0, r6, #31 │ │ - beq.n 435a0 │ │ + beq.n 4474c │ │ mov.w r4, r9, lsr #1 │ │ movs.w r0, r9, lsl #31 │ │ - bne.w 4341e │ │ - b.n 435d2 │ │ + bne.w 445ca │ │ + b.n 4477e │ │ orr.w r0, r7, #1 │ │ mov r4, r2 │ │ clz r0, r0 │ │ movs r1, #62 @ 0x3e │ │ ldr r2, [sp, #76] @ 0x4c │ │ mov r5, r3 │ │ eor.w r0, r1, r0, lsl #1 │ │ movs r1, #0 │ │ strd r0, r1, [sp] │ │ mov r0, sl │ │ mov r1, r7 │ │ - bl 43664 │ │ + bl 44810 │ │ mov r3, r5 │ │ mov r2, r4 │ │ mov.w r4, r9, lsr #1 │ │ movs.w r0, r9, lsl #31 │ │ - bne.w 4341e │ │ + bne.w 445ca │ │ orr.w r0, r4, #1 │ │ movs r1, #62 @ 0x3e │ │ clz r0, r0 │ │ mov r5, r2 │ │ ldr r2, [sp, #76] @ 0x4c │ │ mov r8, r9 │ │ eor.w r0, r1, r0, lsl #1 │ │ movs r1, #0 │ │ strd r0, r1, [sp] │ │ add.w r0, r7, r7, lsl #1 │ │ mov r1, r4 │ │ mov r9, r3 │ │ add.w r0, sl, r0, lsl #2 │ │ - bl 43664 │ │ + bl 44810 │ │ mov r3, r9 │ │ mov r9, r8 │ │ ldr.w r8, [sp, #56] @ 0x38 │ │ mov r2, r5 │ │ - b.n 4341e │ │ + b.n 445ca │ │ movs r2, #1 │ │ ldrd r5, sl, [sp, #40] @ 0x28 │ │ add r0, sp, #80 @ 0x50 │ │ cmp sl, r4 │ │ strb.w r8, [r1, r2] │ │ str.w r9, [r0, r2, lsl #2] │ │ - bls.n 43638 │ │ + bls.n 447e4 │ │ add.w r4, r4, r5, lsr #1 │ │ adds r2, #1 │ │ mov r9, r5 │ │ add.w r8, r4, r4, lsl #1 │ │ cmp sl, r4 │ │ str r4, [sp, #64] @ 0x40 │ │ - bls.w 43256 │ │ - b.n 4321e │ │ + bls.w 44402 │ │ + b.n 443ca │ │ mov.w sl, #1 │ │ - b.n 43398 │ │ + b.n 44544 │ │ movs.w r0, r9, lsl #31 │ │ - bne.n 4365c │ │ + bne.n 44808 │ │ orr.w r1, sl, #1 │ │ movs r0, #0 │ │ clz r1, r1 │ │ movs r2, #62 @ 0x3e │ │ eor.w r1, r2, r1, lsl #1 │ │ strd r1, r0, [sp] │ │ ldr r0, [sp, #60] @ 0x3c │ │ mov r1, sl │ │ ldr r2, [sp, #76] @ 0x4c │ │ - bl 43664 │ │ + bl 44810 │ │ add sp, #412 @ 0x19c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - bmi.n 4360e │ │ + bmi.n 447ba │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #92 @ 0x5c │ │ mov sl, r0 │ │ cmp r1, #33 @ 0x21 │ │ str r3, [sp, #20] │ │ str r2, [sp, #76] @ 0x4c │ │ - bcs.n 436e6 │ │ + bcs.n 44892 │ │ mov r8, r1 │ │ movs.w r7, r8, lsr #1 │ │ - beq.w 43d0e │ │ + beq.w 44eba │ │ cmp.w r8, #15 │ │ str r7, [sp, #72] @ 0x48 │ │ - bls.w 43d14 │ │ + bls.w 44ec0 │ │ add.w r0, r8, r8, lsl #1 │ │ ldr r4, [sp, #76] @ 0x4c │ │ add.w r5, r4, r0, lsl #2 │ │ mov r0, sl │ │ mov r1, r5 │ │ - bl 43f20 │ │ + bl 450cc │ │ add.w r1, r5, #48 @ 0x30 │ │ add.w r0, sl, #48 @ 0x30 │ │ - bl 43f20 │ │ + bl 450cc │ │ mov r0, r5 │ │ movs r1, #8 │ │ mov r2, r4 │ │ mov.w fp, #8 │ │ - bl 4404a │ │ + bl 451f6 │ │ add.w r9, r7, r7, lsl #1 │ │ add.w r7, r5, #96 @ 0x60 │ │ add.w r6, sl, r9, lsl #2 │ │ mov r1, r7 │ │ mov r0, r6 │ │ - bl 43f20 │ │ + bl 450cc │ │ add.w r0, r6, #48 @ 0x30 │ │ add.w r1, r5, #144 @ 0x90 │ │ - bl 43f20 │ │ + bl 450cc │ │ add.w r2, r4, r9, lsl #2 │ │ mov r0, r7 │ │ movs r1, #8 │ │ ldr r7, [sp, #72] @ 0x48 │ │ - bl 4404a │ │ + bl 451f6 │ │ mov r0, fp │ │ - b.n 43d4c │ │ + b.n 44ef8 │ │ ldr r0, [sp, #132] @ 0x84 │ │ ldr r6, [sp, #128] @ 0x80 │ │ str r0, [sp, #16] │ │ ldr r0, [sp, #76] @ 0x4c │ │ subs r0, #12 │ │ str r0, [sp, #8] │ │ str.w sl, [sp, #36] @ 0x24 │ │ cmp r6, #0 │ │ - beq.w 43d00 │ │ + beq.w 44eac │ │ lsrs r3, r1, #3 │ │ movs r0, #84 @ 0x54 │ │ mla fp, r3, r0, sl │ │ add.w r0, r3, r3, lsl #1 │ │ str r6, [sp, #28] │ │ add.w r8, sl, r0, lsl #4 │ │ cmp r1, #64 @ 0x40 │ │ str r1, [sp, #32] │ │ - bcs.n 4377a │ │ + bcs.n 44926 │ │ ldr r0, [sp, #36] @ 0x24 │ │ ldrd r1, r4, [r8, #4] │ │ ldrd r9, r5, [r0, #4] │ │ mov r2, r4 │ │ cmp r5, r4 │ │ it cc │ │ movcc r2, r5 │ │ str r1, [sp, #72] @ 0x48 │ │ mov r0, r9 │ │ - blx d8860 │ │ + blx d8870 │ │ ldrd r1, r7, [fp, #4] │ │ mov r6, r0 │ │ cmp r0, #0 │ │ mov r0, r9 │ │ mov r2, r7 │ │ it eq │ │ subeq r6, r5, r4 │ │ cmp r5, r7 │ │ it cc │ │ movcc r2, r5 │ │ mov r9, r1 │ │ ldr.w sl, [sp, #36] @ 0x24 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ subeq r0, r5, r7 │ │ eors r0, r6 │ │ mov r0, sl │ │ - bmi.n 43784 │ │ + bmi.n 44930 │ │ mov r2, r7 │ │ cmp r4, r7 │ │ it cc │ │ movcc r2, r4 │ │ ldr r0, [sp, #72] @ 0x48 │ │ mov r1, r9 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ subeq r0, r4, r7 │ │ eors r0, r6 │ │ it mi │ │ movmi r8, fp │ │ mov r0, r8 │ │ - b.n 43784 │ │ + b.n 44930 │ │ mov r0, sl │ │ mov r1, r8 │ │ mov r2, fp │ │ - bl 4417a │ │ + bl 45326 │ │ sub.w r3, r0, sl │ │ movw r7, #43691 @ 0xaaab │ │ movt r7, #43690 @ 0xaaaa │ │ ldrd r5, r1, [r0] │ │ lsrs r3, r3, #2 │ │ ldr.w r9, [sp, #32] │ │ mul.w fp, r3, r7 │ │ @@ -40943,31 +42535,31 @@ │ │ strd r5, r1, [sp, #80] @ 0x50 │ │ ldr r1, [sp, #16] │ │ subs r6, #1 │ │ ldr r2, [r0, #8] │ │ str r2, [sp, #88] @ 0x58 │ │ str r0, [sp, #64] @ 0x40 │ │ str r6, [sp, #28] │ │ - cbz r1, 437d6 │ │ + cbz r1, 44982 │ │ ldrd r1, r4, [r0, #4] │ │ ldr r0, [sp, #16] │ │ mov r2, r4 │ │ ldrd r0, r5, [r0, #4] │ │ cmp r5, r4 │ │ it cc │ │ movcc r2, r5 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ subeq r0, r5, r4 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.w 43a78 │ │ + bgt.w 44c24 │ │ ldr r0, [sp, #20] │ │ cmp r0, r9 │ │ - bcc.w 43ef4 │ │ + bcc.w 450a0 │ │ add.w r0, r9, r9, lsl #1 │ │ ldr r1, [sp, #76] @ 0x4c │ │ mov.w r8, #0 │ │ mov r3, sl │ │ add.w ip, r1, r0, lsl #2 │ │ mov r2, fp │ │ str r0, [sp, #12] │ │ @@ -40976,15 +42568,15 @@ │ │ mov.w r1, #0 │ │ it cc │ │ movcc r0, r1 │ │ str r2, [sp, #40] @ 0x28 │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r0, sl, r0, lsl #2 │ │ cmp r3, r0 │ │ - bcs.w 43980 │ │ + bcs.w 44b2c │ │ mvn.w r1, #35 @ 0x23 │ │ movs r2, #0 │ │ str r1, [sp, #56] @ 0x38 │ │ mvn.w r1, #23 │ │ mvn.w r4, #47 @ 0x2f │ │ mvn.w sl, #11 │ │ str r1, [sp, #52] @ 0x34 │ │ @@ -40998,15 +42590,15 @@ │ │ ldrd r1, fp, [r9, #4] │ │ ldrd r0, r4, [r7, #4] │ │ cmp r4, fp │ │ str r2, [sp, #68] @ 0x44 │ │ mov r2, fp │ │ it cc │ │ movcc r2, r4 │ │ - blx d8860 │ │ + blx d8870 │ │ mov r6, r0 │ │ cmp r0, #0 │ │ it eq │ │ subeq.w r6, r4, fp │ │ ldr r1, [sp, #76] @ 0x4c │ │ cmp r6, #0 │ │ mov r0, r1 │ │ @@ -41023,15 +42615,15 @@ │ │ strd r1, r2, [r0, #4] │ │ ldrd r1, r5, [r9, #4] │ │ ldrd r0, r4, [r7, #16] │ │ mov r2, r5 │ │ cmp r4, r5 │ │ it cc │ │ movcc r2, r4 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ subeq r0, r4, r5 │ │ mov r1, fp │ │ ldr r2, [sp, #72] @ 0x48 │ │ mov r4, fp │ │ cmp r0, #0 │ │ @@ -41048,15 +42640,15 @@ │ │ strd ip, r5, [r1, #4] │ │ ldrd r1, r6, [r9, #4] │ │ ldrd r0, r5, [r7, #28] │ │ mov r2, r6 │ │ cmp r5, r6 │ │ it cc │ │ movcc r2, r5 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ subeq r0, r5, r6 │ │ mov r1, r4 │ │ ldr r2, [sp, #72] @ 0x48 │ │ cmp r0, #0 │ │ ldr.w r9, [sp, #56] @ 0x38 │ │ @@ -41072,15 +42664,15 @@ │ │ strd r6, r5, [r1, #4] │ │ ldrd r1, r5, [r0, #4] │ │ ldrd r0, r6, [r7, #40] @ 0x28 │ │ mov r2, r5 │ │ cmp r6, r5 │ │ it cc │ │ movcc r2, r6 │ │ - blx d8860 │ │ + blx d8870 │ │ adds r7, #36 @ 0x24 │ │ ldr r4, [sp, #48] @ 0x30 │ │ cmp r0, #0 │ │ it eq │ │ subeq r0, r6, r5 │ │ add.w r6, r8, r8, lsl #1 │ │ ldrd ip, r1, [sp, #72] @ 0x48 │ │ @@ -41100,33 +42692,33 @@ │ │ ldr r3, [sp, #60] @ 0x3c │ │ adds r2, #48 @ 0x30 │ │ ldr r0, [sp, #44] @ 0x2c │ │ adds r6, r3, r2 │ │ str.w fp, [sp, #52] @ 0x34 │ │ cmp r6, r0 │ │ str.w r9, [sp, #56] @ 0x38 │ │ - bcc.w 4382e │ │ + bcc.w 449da │ │ sub.w r5, ip, r2 │ │ ldrd sl, r2, [sp, #36] @ 0x24 │ │ - b.n 43984 │ │ + b.n 44b30 │ │ mov r5, ip │ │ mov r6, r3 │ │ add.w r0, r2, r2, lsl #1 │ │ ldr.w r9, [sp, #64] @ 0x40 │ │ add.w r4, sl, r0, lsl #2 │ │ mov sl, r5 │ │ cmp r6, r4 │ │ - bcs.n 439de │ │ + bcs.n 44b8a │ │ ldrd r1, r5, [r9, #4] │ │ ldrd r0, r7, [r6, #4] │ │ mov r2, r5 │ │ cmp r7, r5 │ │ it cc │ │ movcc r2, r7 │ │ - blx d8860 │ │ + blx d8870 │ │ sub.w sl, sl, #12 │ │ cmp r0, #0 │ │ it eq │ │ subeq r0, r7, r5 │ │ ldr r2, [sp, #76] @ 0x4c │ │ mov r1, sl │ │ cmp r0, #0 │ │ @@ -41137,80 +42729,80 @@ │ │ add.w r8, r8, r0, lsr #31 │ │ ldr r5, [r6, #8] │ │ adds r6, #12 │ │ str.w r3, [r1, r2, lsl #2] │ │ add.w r1, r1, r2, lsl #2 │ │ cmp r6, r4 │ │ strd r7, r5, [r1, #4] │ │ - bcc.n 43996 │ │ + bcc.n 44b42 │ │ ldr.w r9, [sp, #32] │ │ add.w r5, r8, r8, lsl #1 │ │ ldr r0, [sp, #40] @ 0x28 │ │ cmp r0, r9 │ │ - beq.n 43a0c │ │ + beq.n 44bb8 │ │ sub.w ip, sl, #12 │ │ ldmia.w r6, {r0, r1, r2} │ │ add.w r3, r6, #12 │ │ str.w r0, [ip, r5, lsl #2] │ │ add.w r0, ip, r5, lsl #2 │ │ strd r1, r2, [r0, #4] │ │ mov r2, r9 │ │ ldr.w sl, [sp, #36] @ 0x24 │ │ - b.n 437f6 │ │ + b.n 449a2 │ │ ldr.w sl, [sp, #36] @ 0x24 │ │ lsls r2, r5, #2 │ │ ldr r1, [sp, #76] @ 0x4c │ │ mov r0, sl │ │ - bl d52ca │ │ + bl d4c3c │ │ subs.w r1, r9, r8 │ │ - beq.n 43a4a │ │ + beq.n 44bf6 │ │ ldrd r0, r2, [sp, #8] │ │ mov r3, r1 │ │ add.w r0, r0, r2, lsl #2 │ │ add.w r2, sl, r5, lsl #2 │ │ ldrd r7, r6, [r0] │ │ subs r3, #1 │ │ ldr.w ip, [r0, #8] │ │ sub.w r0, r0, #12 │ │ strd r7, r6, [r2] │ │ str.w ip, [r2, #8] │ │ add.w r2, r2, #12 │ │ - bne.n 43a2e │ │ + bne.n 44bda │ │ ldrd fp, r6, [sp, #24] │ │ cmp.w r8, #0 │ │ - beq.n 43a78 │ │ + beq.n 44c24 │ │ cmp r9, r8 │ │ - bcc.w 43ef6 │ │ + bcc.w 450a2 │ │ add r0, sp, #80 @ 0x50 │ │ ldr r2, [sp, #76] @ 0x4c │ │ ldr r3, [sp, #20] │ │ strd r6, r0, [sp] │ │ add.w r0, sl, r5, lsl #2 │ │ - bl 43664 │ │ + bl 44810 │ │ mov r1, r8 │ │ cmp.w r8, #33 @ 0x21 │ │ - bcs.w 436f6 │ │ - b.n 43676 │ │ + bcs.w 448a2 │ │ + b.n 44822 │ │ ldr r0, [sp, #20] │ │ cmp r0, r9 │ │ - bcc.w 43ef4 │ │ + bcc.w 450a0 │ │ add.w r0, r9, r9, lsl #1 │ │ ldr r1, [sp, #76] @ 0x4c │ │ movs r6, #0 │ │ mov r3, sl │ │ add.w r4, r1, r0, lsl #2 │ │ str r0, [sp, #40] @ 0x28 │ │ subs.w r0, fp, #3 │ │ mov.w r1, #0 │ │ it cc │ │ movcc r0, r1 │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r0, sl, r0, lsl #2 │ │ cmp r3, r0 │ │ - bcs.w 43c26 │ │ + bcs.w 44dd2 │ │ mvn.w r1, #35 @ 0x23 │ │ movs r7, #0 │ │ str r1, [sp, #56] @ 0x38 │ │ mvn.w r1, #23 │ │ mvn.w r2, #47 @ 0x2f │ │ mvn.w sl, #11 │ │ str.w fp, [sp, #24] │ │ @@ -41224,15 +42816,15 @@ │ │ ldrd r0, r8, [r0, #4] │ │ ldrd r1, r7, [r5, #4] │ │ cmp r8, r7 │ │ str r2, [sp, #48] @ 0x30 │ │ mov r2, r7 │ │ it cc │ │ movcc r2, r8 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ subeq.w r0, r8, r7 │ │ ldr r1, [sp, #76] @ 0x4c │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ ldr.w fp, [sp, #64] @ 0x40 │ │ mov r0, r1 │ │ @@ -41251,15 +42843,15 @@ │ │ addgt r6, #1 │ │ ldrd r1, r7, [r5, #16] │ │ ldrd r0, r4, [fp, #4] │ │ mov r2, r7 │ │ cmp r4, r7 │ │ it cc │ │ movcc r2, r4 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ subeq r0, r4, r7 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ mov r0, r8 │ │ ldr r1, [sp, #72] @ 0x48 │ │ add.w r7, r5, #12 │ │ @@ -41276,15 +42868,15 @@ │ │ addgt r6, #1 │ │ ldrd r1, r4, [r5, #28] │ │ ldrd r0, r7, [fp, #4] │ │ mov r2, r4 │ │ cmp r7, r4 │ │ it cc │ │ movcc r2, r7 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ subeq r0, r7, r4 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ mov r0, r9 │ │ ldr r1, [sp, #72] @ 0x48 │ │ add.w r7, r5, #24 │ │ @@ -41300,15 +42892,15 @@ │ │ addgt r6, #1 │ │ ldrd r1, r7, [r5, #40] @ 0x28 │ │ ldrd r0, r4, [fp, #4] │ │ mov r2, r7 │ │ cmp r4, r7 │ │ it cc │ │ movcc r2, r4 │ │ - blx d8860 │ │ + blx d8870 │ │ ldr r2, [sp, #48] @ 0x30 │ │ cmp r0, #0 │ │ it eq │ │ subeq r0, r4, r7 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ ldr r0, [sp, #76] @ 0x4c │ │ add.w r7, r6, r6, lsl #1 │ │ @@ -41330,33 +42922,33 @@ │ │ ldr r0, [sp, #44] @ 0x2c │ │ it gt │ │ addgt r6, #1 │ │ adds r5, r3, r7 │ │ str.w r8, [sp, #52] @ 0x34 │ │ cmp r5, r0 │ │ str.w r9, [sp, #56] @ 0x38 │ │ - bcc.w 43aca │ │ + bcc.w 44c76 │ │ ldr.w sl, [sp, #36] @ 0x24 │ │ subs r4, r4, r7 │ │ ldr.w fp, [sp, #24] │ │ - b.n 43c28 │ │ + b.n 44dd4 │ │ mov r5, r3 │ │ add.w r0, fp, fp, lsl #1 │ │ ldr.w r9, [sp, #64] @ 0x40 │ │ add.w r8, sl, r0, lsl #2 │ │ cmp r5, r8 │ │ - bcs.n 43c7e │ │ + bcs.n 44e2a │ │ ldrd r1, r7, [r5, #4] │ │ mov sl, r4 │ │ ldrd r0, r4, [r9, #4] │ │ mov r2, r7 │ │ cmp r4, r7 │ │ it cc │ │ movcc r2, r4 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ subeq r0, r4, r7 │ │ sub.w r4, sl, #12 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ ldr r1, [sp, #76] @ 0x4c │ │ mov r0, r4 │ │ @@ -41366,276 +42958,276 @@ │ │ ldmia r5!, {r2, r3, r7} │ │ str.w r2, [r0, r1, lsl #2] │ │ add.w r0, r0, r1, lsl #2 │ │ strd r3, r7, [r0, #4] │ │ it gt │ │ addgt r6, #1 │ │ cmp r5, r8 │ │ - bcc.n 43c38 │ │ + bcc.n 44de4 │ │ ldr.w r9, [sp, #32] │ │ add.w r7, r6, r6, lsl #1 │ │ cmp fp, r9 │ │ - beq.n 43cac │ │ + beq.n 44e58 │ │ ldr r3, [sp, #76] @ 0x4c │ │ adds r6, #1 │ │ ldmia.w r5, {r0, r1, r2} │ │ subs r4, #12 │ │ mov fp, r9 │ │ str.w r0, [r3, r7, lsl #2] │ │ add.w r0, r3, r7, lsl #2 │ │ add.w r3, r5, #12 │ │ strd r1, r2, [r0, #4] │ │ ldr.w sl, [sp, #36] @ 0x24 │ │ - b.n 43a90 │ │ + b.n 44c3c │ │ ldr.w sl, [sp, #36] @ 0x24 │ │ lsls r2, r7, #2 │ │ ldr r1, [sp, #76] @ 0x4c │ │ mov r0, sl │ │ - bl d52ca │ │ + bl d4c3c │ │ subs.w r8, r9, r6 │ │ - beq.n 43d0e │ │ + beq.n 44eba │ │ ldr r1, [sp, #40] @ 0x28 │ │ add.w sl, sl, r7, lsl #2 │ │ ldr r0, [sp, #8] │ │ mov r2, sl │ │ add.w r0, r0, r1, lsl #2 │ │ mov r1, r8 │ │ ldrd r3, r7, [r0] │ │ subs r1, #1 │ │ ldr r5, [r0, #8] │ │ sub.w r0, r0, #12 │ │ strd r3, r7, [r2] │ │ str r5, [r2, #8] │ │ add.w r2, r2, #12 │ │ - bne.n 43cd0 │ │ + bne.n 44e7c │ │ cmp r9, r6 │ │ - bcc.w 43f04 │ │ + bcc.w 450b0 │ │ ldr r6, [sp, #28] │ │ movs r0, #0 │ │ mov r1, r8 │ │ cmp.w r8, #33 @ 0x21 │ │ str r0, [sp, #16] │ │ - bcs.w 436f2 │ │ - b.n 43676 │ │ + bcs.w 4489e │ │ + b.n 44822 │ │ ldr r2, [sp, #76] @ 0x4c │ │ movs r0, #1 │ │ ldr r3, [sp, #20] │ │ str r0, [sp, #0] │ │ mov r0, sl │ │ - bl 4317a │ │ + bl 44326 │ │ add sp, #92 @ 0x5c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add.w r0, r7, r7, lsl #1 │ │ ldr r1, [sp, #76] @ 0x4c │ │ cmp.w r8, #7 │ │ add.w r5, r1, r0, lsl #2 │ │ add.w r6, sl, r0, lsl #2 │ │ - bls.n 43d3c │ │ + bls.n 44ee8 │ │ ldr r1, [sp, #76] @ 0x4c │ │ mov r0, sl │ │ - bl 43f20 │ │ + bl 450cc │ │ mov r0, r6 │ │ mov r1, r5 │ │ - bl 43f20 │ │ + bl 450cc │ │ movs r0, #4 │ │ - b.n 43d4c │ │ + b.n 44ef8 │ │ ldmia.w sl, {r0, r1, r2} │ │ ldr r3, [sp, #76] @ 0x4c │ │ stmia r3!, {r0, r1, r2} │ │ ldmia.w r6, {r0, r1, r2} │ │ stmia r5!, {r0, r1, r2} │ │ movs r0, #1 │ │ sub.w r1, r8, r7 │ │ cmp r0, r7 │ │ str.w r8, [sp, #48] @ 0x30 │ │ str r1, [sp, #68] @ 0x44 │ │ str r0, [sp, #60] @ 0x3c │ │ str.w sl, [sp, #36] @ 0x24 │ │ - bcs.n 43e06 │ │ + bcs.n 44fb2 │ │ ldr.w r8, [sp, #60] @ 0x3c │ │ add.w r0, r8, r8, lsl #1 │ │ mov.w r9, r0, lsl #2 │ │ - b.n 43d8a │ │ + b.n 44f36 │ │ ldr r0, [sp, #76] @ 0x4c │ │ str.w sl, [r0] │ │ ldr.w sl, [sp, #36] @ 0x24 │ │ strd r5, r7, [r4, #-8] │ │ ldr r7, [sp, #72] @ 0x48 │ │ add.w r8, r8, #1 │ │ add.w r9, r9, #12 │ │ cmp r8, r7 │ │ - beq.n 43e06 │ │ + beq.n 44fb2 │ │ add.w r0, r8, r8, lsl #1 │ │ ldr r3, [sp, #76] @ 0x4c │ │ add.w r1, sl, r0, lsl #2 │ │ add.w r4, r3, r0, lsl #2 │ │ ldrd r5, r7, [r1, #4] │ │ ldr.w r2, [sl, r0, lsl #2] │ │ ldrd r1, r6, [r4, #-8] │ │ str.w r2, [r3, r0, lsl #2] │ │ mov r2, r6 │ │ mov r0, r5 │ │ strd r5, r7, [r4, #4] │ │ cmp r7, r6 │ │ it cc │ │ movcc r2, r7 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ subeq r0, r7, r6 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 43d7c │ │ + bgt.n 44f28 │ │ ldr.w sl, [r4] │ │ mov r6, r9 │ │ ldr r3, [sp, #76] @ 0x4c │ │ cmp r6, #12 │ │ add.w r4, r3, r6 │ │ ldmdb r4, {r0, r1, r2} │ │ str r0, [r3, r6] │ │ strd r1, r2, [r4, #4] │ │ - beq.n 43d6e │ │ + beq.n 44f1a │ │ ldrd r1, fp, [r4, #-20] │ │ mov r0, r5 │ │ mov r2, fp │ │ cmp r7, fp │ │ it cc │ │ movcc r2, r7 │ │ - blx d8860 │ │ + blx d8870 │ │ subs r6, #12 │ │ cmp r0, #0 │ │ it eq │ │ subeq.w r0, r7, fp │ │ cmp r0, #0 │ │ - bmi.n 43dcc │ │ + bmi.n 44f78 │ │ ldr r0, [sp, #76] @ 0x4c │ │ add r0, r6 │ │ - b.n 43d70 │ │ + b.n 44f1c │ │ ldr.w r8, [sp, #60] @ 0x3c │ │ ldr r0, [sp, #68] @ 0x44 │ │ cmp r8, r0 │ │ - bcs.n 43ee4 │ │ + bcs.n 45090 │ │ add.w r0, r7, r7, lsl #1 │ │ ldr r1, [sp, #76] @ 0x4c │ │ add.w fp, r1, r0, lsl #2 │ │ ldr r1, [sp, #36] @ 0x24 │ │ str.w fp, [sp, #52] @ 0x34 │ │ add.w r0, r1, r0, lsl #2 │ │ str r0, [sp, #64] @ 0x40 │ │ add.w r0, r8, r8, lsl #1 │ │ mov sl, fp │ │ lsls r4, r0, #2 │ │ movs r0, #12 │ │ str r0, [sp, #72] @ 0x48 │ │ - b.n 43e5a │ │ + b.n 45006 │ │ ldr.w fp, [sp, #52] @ 0x34 │ │ mov r0, fp │ │ ldr.w r8, [sp, #60] @ 0x3c │ │ ldr r1, [sp, #56] @ 0x38 │ │ str r1, [r0, #0] │ │ strd r5, r7, [r9, #-8] │ │ ldr r0, [sp, #72] @ 0x48 │ │ add.w r8, r8, #1 │ │ add.w sl, sl, #12 │ │ subs r0, #12 │ │ str r0, [sp, #72] @ 0x48 │ │ ldr r0, [sp, #68] @ 0x44 │ │ cmp r8, r0 │ │ - beq.n 43ee4 │ │ + beq.n 45090 │ │ ldr r1, [sp, #64] @ 0x40 │ │ add.w r0, r8, r8, lsl #1 │ │ add.w r9, fp, r0, lsl #2 │ │ ldr.w r2, [r1, r0, lsl #2] │ │ add.w r1, r1, r0, lsl #2 │ │ ldrd r5, r7, [r1, #4] │ │ ldrd r1, r6, [r9, #-8] │ │ cmp r7, r6 │ │ str.w r2, [fp, r0, lsl #2] │ │ mov r2, r6 │ │ mov r0, r5 │ │ strd r5, r7, [r9, #4] │ │ it cc │ │ movcc r2, r7 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ subeq r0, r7, r6 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 43e46 │ │ + bgt.n 44ff2 │ │ ldr.w fp, [sp, #72] @ 0x48 │ │ mov r6, sl │ │ ldr.w r0, [r9] │ │ str.w r8, [sp, #60] @ 0x3c │ │ str r0, [sp, #56] @ 0x38 │ │ add.w r9, r6, r4 │ │ cmp r4, fp │ │ ldmdb r9, {r0, r1, r2} │ │ str r0, [r6, r4] │ │ strd r1, r2, [r9, #4] │ │ - beq.n 43e34 │ │ + beq.n 44fe0 │ │ ldrd r1, r8, [r9, #-20] │ │ mov r0, r5 │ │ mov r2, r8 │ │ cmp r7, r8 │ │ it cc │ │ movcc r2, r7 │ │ - blx d8860 │ │ + blx d8870 │ │ add.w fp, fp, #12 │ │ subs r6, #12 │ │ cmp r0, #0 │ │ it eq │ │ subeq.w r0, r7, r8 │ │ cmp r0, #0 │ │ - bmi.n 43ea6 │ │ + bmi.n 45052 │ │ ldr.w fp, [sp, #52] @ 0x34 │ │ adds r0, r6, r4 │ │ - b.n 43e3a │ │ + b.n 44fe6 │ │ ldr r0, [sp, #76] @ 0x4c │ │ ldr r1, [sp, #48] @ 0x30 │ │ ldr r2, [sp, #36] @ 0x24 │ │ - bl 4404a │ │ + bl 451f6 │ │ add sp, #92 @ 0x5c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ udf #254 @ 0xfe │ │ - ldr r0, [pc, #32] @ (43f18 ) │ │ + ldr r0, [pc, #32] @ (450c4 ) │ │ movs r1, #19 │ │ - ldr r2, [pc, #32] @ (43f1c ) │ │ + ldr r2, [pc, #32] @ (450c8 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ - ldr r3, [pc, #12] @ (43f14 ) │ │ + bl 3fd60 │ │ + ldr r3, [pc, #12] @ (450c0 ) │ │ mov r0, r6 │ │ mov r1, r9 │ │ mov r2, r9 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ nop │ │ - ldrb r0, [r2, #25] │ │ + ldr r4, [r6, #72] @ 0x48 │ │ movs r1, r1 │ │ - str r3, [r3, r2] │ │ - vqrdmlah.s , , d14[0] │ │ + subs r6, #239 @ 0xef │ │ + @ instruction: 0xfffd6cb2 │ │ movs r1, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #12 │ │ mov r9, r1 │ │ ldrd r1, r8, [r0, #4] │ │ mov r5, r0 │ │ ldrd r0, sl, [r0, #16] │ │ mov r2, r8 │ │ cmp sl, r8 │ │ it cc │ │ movcc r2, sl │ │ - blx d8860 │ │ + blx d8870 │ │ mov r6, r0 │ │ ldrd r1, r4, [r5, #28] │ │ ldrd r0, r7, [r5, #40] @ 0x28 │ │ mov r2, r4 │ │ cmp r7, r4 │ │ it cc │ │ movcc r2, r7 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ subeq r0, r7, r4 │ │ cmp r6, #0 │ │ it eq │ │ subeq.w r6, sl, r8 │ │ lsrs r1, r6, #31 │ │ @@ -41653,15 +43245,15 @@ │ │ ldrd r0, sl, [r0, #4] │ │ mov r2, r3 │ │ it mi │ │ movmi r4, #24 │ │ cmp sl, r3 │ │ it cc │ │ movcc r2, sl │ │ - blx d8860 │ │ + blx d8870 │ │ mov r7, r0 │ │ mvns r0, r6 │ │ lsrs r0, r0, #31 │ │ adds r2, r5, r4 │ │ add.w r0, r0, r0, lsl #1 │ │ str r2, [sp, #4] │ │ cmp r7, #0 │ │ @@ -41676,15 +43268,15 @@ │ │ mov r2, r4 │ │ mov r6, sl │ │ it mi │ │ movmi r6, r5 │ │ cmp r8, r4 │ │ it cc │ │ movcc r2, r8 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ subeq.w r0, r8, r4 │ │ ldr.w r8, [sp, #4] │ │ cmp r0, #0 │ │ ittt mi │ │ movmi r6, r8 │ │ @@ -41697,15 +43289,15 @@ │ │ ldrd r1, r7, [r5, #4] │ │ it mi │ │ movmi fp, sl │ │ mov r2, r7 │ │ cmp r4, r7 │ │ it cc │ │ movcc r2, r4 │ │ - blx d8860 │ │ + blx d8870 │ │ ldmia.w fp, {r1, r2, r3} │ │ cmp r0, #0 │ │ stmia.w r9, {r1, r2, r3} │ │ it eq │ │ subeq r0, r4, r7 │ │ cmp r0, #0 │ │ mov r0, r5 │ │ @@ -41743,15 +43335,15 @@ │ │ stmia.w r0, {r1, r3, ip} │ │ ldrd r1, fp, [ip, #4] │ │ ldrd r0, r9, [r3, #4] │ │ mov r2, fp │ │ cmp r9, fp │ │ it cc │ │ movcc r2, r9 │ │ - blx d8860 │ │ + blx d8870 │ │ mov r7, r0 │ │ cmp r0, #0 │ │ it eq │ │ subeq.w r7, r9, fp │ │ ldrd r0, r1, [sp, #12] │ │ cmp.w r7, #4294967295 @ 0xffffffff │ │ it gt │ │ @@ -41763,15 +43355,15 @@ │ │ ldrd r1, r6, [r8, #4] │ │ ldrd r0, r5, [r5, #4] │ │ cmp r5, r6 │ │ strd r2, r3, [r4] │ │ mov r2, r6 │ │ it cc │ │ movcc r2, r5 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ mov r1, r8 │ │ ldrd r3, ip, [sp, #12] │ │ it eq │ │ subeq r0, r5, r6 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ it gt │ │ @@ -41793,19 +43385,19 @@ │ │ add.w r1, r1, r1, lsl #1 │ │ mvn.w r0, r0, asr #31 │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r8, r8, r1, lsl #2 │ │ ldr r1, [sp, #8] │ │ add.w r5, r9, r0, lsl #2 │ │ subs r1, #1 │ │ - bne.n 44078 │ │ + bne.n 45224 │ │ ldr r1, [sp, #4] │ │ add.w r0, r8, #12 │ │ lsls r1, r1, #31 │ │ - beq.n 44164 │ │ + beq.n 45310 │ │ mov r1, r3 │ │ cmp ip, r0 │ │ it cc │ │ movcc r1, ip │ │ ldrd r2, r7, [r1] │ │ ldr r1, [r1, #8] │ │ strd r2, r7, [r4] │ │ @@ -41820,1478 +43412,80 @@ │ │ orr.w r1, r1, r1, lsl #1 │ │ add.w r3, r3, r2, lsl #2 │ │ add.w ip, ip, r1, lsl #2 │ │ cmp ip, r0 │ │ itt eq │ │ addeq.w r0, r5, #12 │ │ cmpeq r3, r0 │ │ - beq.n 44174 │ │ - bl 413cc │ │ + beq.n 45320 │ │ + bl 416d4 │ │ add sp, #20 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #12 │ │ mov r8, r2 │ │ mov sl, r1 │ │ mov r6, r0 │ │ cmp r3, #8 │ │ - bcc.n 441c8 │ │ + bcc.n 45374 │ │ lsrs r5, r3, #3 │ │ movs r4, #84 @ 0x54 │ │ mla r2, r5, r4, r6 │ │ add.w r7, r5, r5, lsl #1 │ │ mov r0, r6 │ │ add.w r1, r6, r7, lsl #4 │ │ mov r3, r5 │ │ - bl 4417a │ │ + bl 45326 │ │ mla r2, r5, r4, sl │ │ add.w r1, sl, r7, lsl #4 │ │ mov r6, r0 │ │ mov r0, sl │ │ mov r3, r5 │ │ - bl 4417a │ │ + bl 45326 │ │ mla r2, r5, r4, r8 │ │ add.w r1, r8, r7, lsl #4 │ │ mov sl, r0 │ │ mov r0, r8 │ │ mov r3, r5 │ │ - bl 4417a │ │ + bl 45326 │ │ mov r8, r0 │ │ ldrd r4, r9, [r6, #4] │ │ ldrd r1, r7, [sl, #4] │ │ cmp r9, r7 │ │ mov r2, r7 │ │ mov r0, r4 │ │ it cc │ │ movcc r2, r9 │ │ str r1, [sp, #8] │ │ - blx d8860 │ │ + blx d8870 │ │ str.w r8, [sp, #4] │ │ mov r5, r0 │ │ ldrd fp, r8, [r8, #4] │ │ cmp r0, #0 │ │ mov r2, r8 │ │ mov r0, r4 │ │ it eq │ │ subeq.w r5, r9, r7 │ │ cmp r9, r8 │ │ mov r1, fp │ │ it cc │ │ movcc r2, r9 │ │ - blx d8860 │ │ - cmp r0, #0 │ │ - it eq │ │ - subeq.w r0, r9, r8 │ │ - eors r0, r5 │ │ - bmi.n 44230 │ │ - mov r2, r8 │ │ - cmp r7, r8 │ │ - it cc │ │ - movcc r2, r7 │ │ - ldr r0, [sp, #8] │ │ - mov r1, fp │ │ - blx d8860 │ │ - cmp r0, #0 │ │ - it eq │ │ - subeq.w r0, r7, r8 │ │ - eors r0, r5 │ │ - ldr r0, [sp, #4] │ │ - it mi │ │ - movmi sl, r0 │ │ - mov r6, sl │ │ - mov r0, r6 │ │ - add sp, #12 │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - sub.w sp, sp, #4096 @ 0x1000 │ │ - sub sp, #12 │ │ - movw r3, #3392 @ 0xd40 │ │ - sub.w r2, r1, r1, lsr #1 │ │ - movt r3, #3 │ │ - cmp r1, r3 │ │ - it cc │ │ - movcc r3, r1 │ │ - cmp r3, r2 │ │ - it ls │ │ - movls r3, r2 │ │ - cmp r3, #48 @ 0x30 │ │ - mov r4, r3 │ │ - it ls │ │ - movls r4, #48 @ 0x30 │ │ - cmp r3, #103 @ 0x67 │ │ - bcs.n 44282 │ │ - movs r2, #0 │ │ - cmp r1, #65 @ 0x41 │ │ - it cc │ │ - movcc r2, #1 │ │ - str r2, [sp, #0] │ │ - add r2, sp, #8 │ │ - movs r3, #102 @ 0x66 │ │ - bl 442dc │ │ - add.w sp, sp, #4096 @ 0x1000 │ │ - add sp, #12 │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - movw r3, #13108 @ 0x3334 │ │ - movt r3, #819 @ 0x333 │ │ - cmp r2, r3 │ │ - bcc.n 44292 │ │ - bl 3e03c │ │ - add.w r2, r4, r4, lsl #2 │ │ - movs r7, #0 │ │ - lsls r6, r2, #3 │ │ - beq.n 442b0 │ │ - mov r8, r0 │ │ - mov r0, r6 │ │ - mov r9, r1 │ │ - blx d87f0 │ │ - cbz r0, 442d4 │ │ - mov r5, r0 │ │ - mov r1, r9 │ │ - mov r0, r8 │ │ - b.n 442b4 │ │ - movs r5, #8 │ │ - movs r4, #0 │ │ - mov r2, r5 │ │ - mov r3, r4 │ │ - cmp r1, #65 @ 0x41 │ │ - it cc │ │ - movcc r7, #1 │ │ - str r7, [sp, #0] │ │ - bl 442dc │ │ - mov r0, r5 │ │ - add.w sp, sp, #4096 @ 0x1000 │ │ - add sp, #12 │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ - movs r0, #8 │ │ - mov r1, r6 │ │ - bl 3dfa4 │ │ - stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - sub sp, #412 @ 0x19c │ │ - mov sl, r1 │ │ - mov r8, r3 │ │ - str r2, [sp, #76] @ 0x4c │ │ - mov.w r1, #1073741824 @ 0x40000000 │ │ - str r0, [sp, #52] @ 0x34 │ │ - movs r0, #0 │ │ - mov r2, sl │ │ - movs r3, #0 │ │ - bl d53d0 │ │ - umull r2, r3, r0, sl │ │ - adds r7, r0, #1 │ │ - adc.w r6, r1, #0 │ │ - mla r3, r1, sl, r3 │ │ - eor.w r3, r3, #1073741824 @ 0x40000000 │ │ - orrs r2, r3 │ │ - it eq │ │ - moveq r6, r1 │ │ - str r6, [sp, #20] │ │ - it eq │ │ - moveq r7, r0 │ │ - cmp.w sl, #4096 @ 0x1000 │ │ - str r7, [sp, #24] │ │ - bhi.n 4432a │ │ - sub.w r0, sl, sl, lsr #1 │ │ - cmp r0, #64 @ 0x40 │ │ - it cs │ │ - movcs r0, #64 @ 0x40 │ │ - b.n 4434c │ │ - orr.w r0, sl, #1 │ │ - movs r2, #1 │ │ - clz r0, r0 │ │ - eor.w r0, r0, #31 │ │ - and.w r1, r0, #1 │ │ - add.w r0, r1, r0, lsr #1 │ │ - lsr.w r1, sl, r0 │ │ - lsl.w r0, r2, r0 │ │ - add r0, r1 │ │ - lsrs r0, r0, #1 │ │ - str r0, [sp, #28] │ │ - add.w fp, sp, #346 @ 0x15a │ │ - ldr r0, [sp, #52] @ 0x34 │ │ - mov.w r9, #1 │ │ - movs r4, #0 │ │ - strd r8, sl, [sp, #36] @ 0x24 │ │ - sub.w r1, r0, #40 @ 0x28 │ │ - str r1, [sp, #16] │ │ - sub.w r1, r0, #20 │ │ - str r1, [sp, #8] │ │ - movs r1, #0 │ │ - adds r0, #104 @ 0x68 │ │ - str r0, [sp, #12] │ │ - add.w ip, r4, r4, lsl #2 │ │ - cmp sl, r4 │ │ - str r4, [sp, #60] @ 0x3c │ │ - bhi.n 44388 │ │ - movs r0, #1 │ │ - movs r2, #0 │ │ - str r0, [sp, #48] @ 0x30 │ │ - cmp r1, #2 │ │ - bcs.w 445a4 │ │ - b.n 44798 │ │ - ldr r0, [sp, #52] @ 0x34 │ │ - sub.w r7, sl, r4 │ │ - str r1, [sp, #68] @ 0x44 │ │ - add.w r3, r0, ip, lsl #3 │ │ - ldr r0, [sp, #28] │ │ - cmp r7, r0 │ │ - bcs.n 443bc │ │ - ldr r0, [sp, #448] @ 0x1c0 │ │ - cbz r0, 443f6 │ │ - movs r0, #0 │ │ - cmp r7, #32 │ │ - strd r0, r0, [sp] │ │ - it cs │ │ - movcs r7, #32 │ │ - ldr r2, [sp, #76] @ 0x4c │ │ - mov r0, r3 │ │ - mov r1, r7 │ │ - mov r3, r8 │ │ - mov r6, ip │ │ - bl 447f0 │ │ - mov ip, r6 │ │ - b.n 4454e │ │ - cmp r7, #2 │ │ - bcc.w 4454e │ │ - ldrd r1, r5, [r3, #20] │ │ - ldrd r0, r6, [r3, #60] @ 0x3c │ │ - mov r2, r5 │ │ - str.w ip, [sp, #64] @ 0x40 │ │ - cmp r6, r5 │ │ - str r3, [sp, #56] @ 0x38 │ │ - it cc │ │ - movcc r2, r6 │ │ - mov r4, r0 │ │ - blx d8860 │ │ - cmp r0, #0 │ │ - it eq │ │ - subeq r0, r6, r5 │ │ - cmp r0, #0 │ │ - bmi.n 44402 │ │ - ldr.w ip, [sp, #64] @ 0x40 │ │ - cmp r7, #2 │ │ - bne.n 44412 │ │ - movs r7, #2 │ │ - ldr r4, [sp, #60] @ 0x3c │ │ - b.n 4454e │ │ - ldr r0, [sp, #28] │ │ - cmp r7, r0 │ │ - it cs │ │ - movcs r7, r0 │ │ - lsls r3, r7, #1 │ │ - b.n 44552 │ │ - ldr.w ip, [sp, #64] @ 0x40 │ │ - cmp r7, #2 │ │ - bne.n 44450 │ │ - mov.w sl, #2 │ │ - movs r0, #1 │ │ - b.n 444b8 │ │ - str r0, [sp, #48] @ 0x30 │ │ - mov.w sl, #2 │ │ - ldr r0, [sp, #12] │ │ - mov r1, r4 │ │ - str r7, [sp, #72] @ 0x48 │ │ - add.w r7, r0, ip, lsl #3 │ │ - ldrd r4, r5, [r7, #-4] │ │ - mov r2, r6 │ │ - cmp r5, r6 │ │ - it cc │ │ - movcc r2, r5 │ │ - mov r0, r4 │ │ - blx d8860 │ │ - cmp r0, #0 │ │ - it eq │ │ - subeq r0, r5, r6 │ │ - cmp r0, #0 │ │ - bmi.n 44494 │ │ - adds r7, #40 @ 0x28 │ │ - add.w sl, sl, #1 │ │ - ldr r0, [sp, #72] @ 0x48 │ │ - mov r6, r5 │ │ - mov r1, r4 │ │ - cmp r0, sl │ │ - bne.n 44422 │ │ - b.n 4448e │ │ - str r0, [sp, #48] @ 0x30 │ │ - mov.w sl, #2 │ │ - ldr r0, [sp, #12] │ │ - mov r1, r4 │ │ - str r7, [sp, #72] @ 0x48 │ │ - add.w r7, r0, ip, lsl #3 │ │ - ldrd r4, r5, [r7, #-4] │ │ - mov r2, r6 │ │ - cmp r5, r6 │ │ - it cc │ │ - movcc r2, r5 │ │ - mov r0, r4 │ │ - blx d8860 │ │ - cmp r0, #0 │ │ - it eq │ │ - subeq r0, r5, r6 │ │ - cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 44494 │ │ - adds r7, #40 @ 0x28 │ │ - add.w sl, sl, #1 │ │ - ldr r0, [sp, #72] @ 0x48 │ │ - mov r6, r5 │ │ - mov r1, r4 │ │ - cmp r0, sl │ │ - bne.n 44460 │ │ - ldr r7, [sp, #72] @ 0x48 │ │ - mov sl, r7 │ │ - b.n 44496 │ │ - ldr r7, [sp, #72] @ 0x48 │ │ - add.w ip, sp, #56 @ 0x38 │ │ - ldr r0, [sp, #28] │ │ - ldmia.w ip, {r3, r4, ip} │ │ - cmp sl, r0 │ │ - bcc.w 4439a │ │ - ldr r0, [sp, #48] @ 0x30 │ │ - cmp r0, #0 │ │ - bmi.n 444b0 │ │ - mov r7, sl │ │ - b.n 4454e │ │ - movs.w r0, sl, lsr #1 │ │ - beq.w 447be │ │ - add.w r1, sl, sl, lsl #2 │ │ - ldr r2, [sp, #8] │ │ - ldr r3, [sp, #52] @ 0x34 │ │ - add.w r1, r2, r1, lsl #3 │ │ - mov.w r2, ip, lsl #3 │ │ - str.w sl, [sp, #72] @ 0x48 │ │ - adds r7, r1, r2 │ │ - ldr r6, [r3, r2] │ │ - sub.w lr, r7, #20 │ │ - subs r0, #1 │ │ - ldmia.w lr, {r5, sl, ip, lr} │ │ - str r5, [r3, r2] │ │ - add.w r5, r3, r2 │ │ - add.w r3, r3, #40 @ 0x28 │ │ - str.w r6, [r7, #-20] │ │ - ldrd r6, r4, [r5, #4] │ │ - str.w r6, [r7, #-16] │ │ - ldr.w r6, [r7, #-4] │ │ - ldrd r8, fp, [r5, #12] │ │ - str r6, [r5, #16] │ │ - ldr r6, [r1, r2] │ │ - str.w r4, [r7, #-12] │ │ - ldr r4, [r5, #20] │ │ - str r4, [r1, r2] │ │ - sub.w r1, r1, #40 @ 0x28 │ │ - str r6, [r5, #20] │ │ - ldr r6, [r5, #24] │ │ - ldr r4, [r7, #4] │ │ - str r4, [r5, #24] │ │ - str r6, [r7, #4] │ │ - ldr r6, [r5, #28] │ │ - ldr r4, [r7, #8] │ │ - str r4, [r5, #28] │ │ - str r6, [r7, #8] │ │ - ldr r6, [r5, #32] │ │ - ldr r4, [r7, #12] │ │ - str r4, [r5, #32] │ │ - str r6, [r7, #12] │ │ - ldr r6, [r5, #36] @ 0x24 │ │ - ldr r4, [r7, #16] │ │ - str.w sl, [r5, #4] │ │ - str.w ip, [r5, #8] │ │ - str.w lr, [r5, #12] │ │ - str.w r8, [r7, #-8] │ │ - str.w fp, [r7, #-4] │ │ - str r4, [r5, #36] @ 0x24 │ │ - str r6, [r7, #16] │ │ - bne.n 444cc │ │ - ldr r7, [sp, #72] @ 0x48 │ │ - add.w fp, sp, #346 @ 0x15a │ │ - ldr.w r8, [sp, #36] @ 0x24 │ │ - ldrd r4, ip, [sp, #60] @ 0x3c │ │ - lsls r0, r7, #1 │ │ - adds r3, r0, #1 │ │ - sub.w r0, r4, r9, lsr #1 │ │ - ldr r6, [sp, #24] │ │ - adds r0, r0, r4 │ │ - ldr r4, [sp, #20] │ │ - str r3, [sp, #48] @ 0x30 │ │ - mov.w r3, r3, lsr #1 │ │ - umull r1, r2, r0, r6 │ │ - mla r0, r0, r4, r2 │ │ - ldr r2, [sp, #60] @ 0x3c │ │ - add.w r2, r3, r2, lsl #1 │ │ - umull r3, r7, r6, r2 │ │ - mla r2, r4, r2, r7 │ │ - mov.w r7, #0 │ │ - adc.w r7, r7, #0 │ │ - eors r1, r3 │ │ - ldr r4, [sp, #60] @ 0x3c │ │ - mla r0, r7, r6, r0 │ │ - clz r1, r1 │ │ - eors r0, r2 │ │ - add.w r2, r1, #32 │ │ - it ne │ │ - clzne r2, r0 │ │ - ldr.w sl, [sp, #40] @ 0x28 │ │ - ldr r1, [sp, #68] @ 0x44 │ │ - cmp r1, #2 │ │ - bcc.w 44798 │ │ - ldr r0, [sp, #16] │ │ - str r2, [sp, #56] @ 0x38 │ │ - add.w r0, r0, ip, lsl #3 │ │ - str r0, [sp, #32] │ │ - ldr r0, [sp, #52] @ 0x34 │ │ - add.w r0, r0, ip, lsl #3 │ │ - str r0, [sp, #72] @ 0x48 │ │ - b.n 445c2 │ │ - mov.w r9, r5, lsl #1 │ │ - cmp r3, #1 │ │ - bls.w 44796 │ │ - subs r3, r1, #1 │ │ - ldrb.w r0, [fp, r3] │ │ - cmp r0, r2 │ │ - bcc.w 44798 │ │ - add r0, sp, #80 @ 0x50 │ │ - mov r1, r3 │ │ - ldr.w r6, [r0, r3, lsl #2] │ │ - lsrs r7, r6, #1 │ │ - add.w r5, r7, r9, lsr #1 │ │ - cmp r5, r8 │ │ - bhi.n 445ea │ │ - orr.w r0, r6, r9 │ │ - ands.w r0, r0, #1 │ │ - beq.n 445b8 │ │ - subs r0, r4, r5 │ │ - str r1, [sp, #68] @ 0x44 │ │ - ldr r1, [sp, #52] @ 0x34 │ │ - add.w r0, r0, r0, lsl #2 │ │ - str r3, [sp, #64] @ 0x40 │ │ - add.w fp, r1, r0, lsl #3 │ │ - lsls r0, r6, #31 │ │ - bne.n 4462e │ │ - orr.w r0, r7, #1 │ │ - movs r1, #62 @ 0x3e │ │ - clz r0, r0 │ │ - ldr r2, [sp, #76] @ 0x4c │ │ - mov r3, r8 │ │ - eor.w r0, r1, r0, lsl #1 │ │ - movs r1, #0 │ │ - strd r0, r1, [sp] │ │ - mov r0, fp │ │ - mov r1, r7 │ │ - bl 447f0 │ │ - ldr r3, [sp, #64] @ 0x40 │ │ - ldr r2, [sp, #56] @ 0x38 │ │ - mov.w r4, r9, lsr #1 │ │ - movs.w r0, r9, lsl #31 │ │ - bne.n 44662 │ │ - b.n 44638 │ │ - mov.w r4, r9, lsr #1 │ │ - movs.w r0, r9, lsl #31 │ │ - bne.n 44662 │ │ - orr.w r0, r4, #1 │ │ - movs r1, #62 @ 0x3e │ │ - clz r0, r0 │ │ - ldr r2, [sp, #76] @ 0x4c │ │ - mov r3, r8 │ │ - eor.w r0, r1, r0, lsl #1 │ │ - movs r1, #0 │ │ - strd r0, r1, [sp] │ │ - add.w r0, r7, r7, lsl #2 │ │ - mov r1, r4 │ │ - add.w r0, fp, r0, lsl #3 │ │ - bl 447f0 │ │ - ldr r3, [sp, #64] @ 0x40 │ │ - ldr r2, [sp, #56] @ 0x38 │ │ - cmp r6, #2 │ │ - it cs │ │ - cmpcs.w r9, #2 │ │ - bcs.n 44680 │ │ - lsls r0, r5, #1 │ │ - add.w r9, r0, #1 │ │ - add.w fp, sp, #346 @ 0x15a │ │ - ldr r4, [sp, #60] @ 0x3c │ │ - ldr r1, [sp, #68] @ 0x44 │ │ - cmp r3, #1 │ │ - bhi.n 445c2 │ │ - b.n 44796 │ │ - cmp r4, r7 │ │ - mov r0, r7 │ │ - it cc │ │ - movcc r0, r4 │ │ - cmp r8, r0 │ │ - bcc.n 4466c │ │ - add.w r1, r7, r7, lsl #2 │ │ - str r5, [sp, #44] @ 0x2c │ │ - cmp r7, r4 │ │ - add.w r9, r0, r0, lsl #2 │ │ - add.w sl, fp, r1, lsl #3 │ │ - mov r1, fp │ │ - it hi │ │ - movhi r1, sl │ │ - ldr r5, [sp, #76] @ 0x4c │ │ - mov.w r2, r9, lsl #3 │ │ - mov r0, r5 │ │ - bl d4c50 │ │ - add.w r9, r5, r9, lsl #3 │ │ - cmp r7, r4 │ │ - bls.n 4471e │ │ - ldr.w r8, [sp, #32] │ │ - ldrd r1, r5, [sl, #-20] │ │ - ldrd r0, r4, [r9, #-20] │ │ - mov r2, r5 │ │ - cmp r4, r5 │ │ - it cc │ │ - movcc r2, r4 │ │ - blx d8860 │ │ - sub.w ip, sl, #40 @ 0x28 │ │ - cmp r0, #0 │ │ - it eq │ │ - subeq r0, r4, r5 │ │ - sub.w lr, r9, #40 @ 0x28 │ │ - mov r3, ip │ │ - cmp.w r0, #4294967295 @ 0xffffffff │ │ - it gt │ │ - movgt r3, lr │ │ - mov r7, r8 │ │ - ldmia r3!, {r1, r2, r4, r5, r6} │ │ - stmia r7!, {r1, r2, r4, r5, r6} │ │ - ldmia.w r3, {r1, r2, r4, r5, r6} │ │ - stmia r7!, {r1, r2, r4, r5, r6} │ │ - lsrs r1, r0, #31 │ │ - orr.w r1, r1, r1, lsl #2 │ │ - add.w r9, lr, r1, lsl #3 │ │ - movs r1, #1 │ │ - eor.w r0, r1, r0, lsr #31 │ │ - orr.w r0, r0, r0, lsl #2 │ │ - add.w sl, ip, r0, lsl #3 │ │ - cmp sl, fp │ │ - beq.n 44778 │ │ - ldr r0, [sp, #76] @ 0x4c │ │ - sub.w r8, r8, #40 @ 0x28 │ │ - cmp r9, r0 │ │ - bne.n 446ba │ │ - mov fp, sl │ │ - mov r8, r0 │ │ - b.n 4477e │ │ - mov r8, r5 │ │ - ldrd r1, r4, [r8, #20] │ │ - ldrd r0, r5, [sl, #20] │ │ - mov r2, r4 │ │ - cmp r5, r4 │ │ - it cc │ │ - movcc r2, r5 │ │ - blx d8860 │ │ - cmp r0, #0 │ │ - mov r1, sl │ │ - it eq │ │ - subeq r0, r5, r4 │ │ - cmp.w r0, #4294967295 @ 0xffffffff │ │ - it gt │ │ - movgt r1, r8 │ │ - mov r2, fp │ │ - ldmia r1!, {r3, r4, r5, r6, r7} │ │ - add.w fp, fp, #40 @ 0x28 │ │ - stmia r2!, {r3, r4, r5, r6, r7} │ │ - ldmia.w r1, {r3, r4, r5, r6, r7} │ │ - movs r1, #1 │ │ - eor.w r1, r1, r0, lsr #31 │ │ - orr.w r1, r1, r1, lsl #2 │ │ - stmia r2!, {r3, r4, r5, r6, r7} │ │ - add.w r8, r8, r1, lsl #3 │ │ - cmp r8, r9 │ │ - beq.n 4477e │ │ - lsrs r0, r0, #31 │ │ - orr.w r0, r0, r0, lsl #2 │ │ - add.w sl, sl, r0, lsl #3 │ │ - ldr r0, [sp, #72] @ 0x48 │ │ - cmp sl, r0 │ │ - bne.n 44720 │ │ - b.n 4477e │ │ - mov fp, sl │ │ - ldr.w r8, [sp, #76] @ 0x4c │ │ - sub.w r2, r9, r8 │ │ - mov r0, fp │ │ - mov r1, r8 │ │ - bl d4c50 │ │ - ldrd r8, sl, [sp, #36] @ 0x24 │ │ - ldr r2, [sp, #56] @ 0x38 │ │ - ldr r3, [sp, #64] @ 0x40 │ │ - ldr r5, [sp, #44] @ 0x2c │ │ - b.n 4466c │ │ - movs r1, #1 │ │ - add r0, sp, #80 @ 0x50 │ │ - cmp sl, r4 │ │ - strb.w r2, [fp, r1] │ │ - str.w r9, [r0, r1, lsl #2] │ │ - bls.n 447c4 │ │ - ldr.w r9, [sp, #48] @ 0x30 │ │ - adds r1, #1 │ │ - add.w r4, r4, r9, lsr #1 │ │ - add.w ip, r4, r4, lsl #2 │ │ - cmp sl, r4 │ │ - str r4, [sp, #60] @ 0x3c │ │ - bhi.w 44388 │ │ - b.n 4437a │ │ - movs r7, #1 │ │ - ldr r4, [sp, #60] @ 0x3c │ │ - b.n 4454e │ │ - movs.w r0, r9, lsl #31 │ │ - bne.n 447ea │ │ - orr.w r1, sl, #1 │ │ - movs r0, #0 │ │ - clz r1, r1 │ │ - movs r2, #62 @ 0x3e │ │ - mov r3, r8 │ │ - eor.w r1, r2, r1, lsl #1 │ │ - strd r1, r0, [sp] │ │ - ldr r0, [sp, #52] @ 0x34 │ │ - mov r1, sl │ │ - ldr r2, [sp, #76] @ 0x4c │ │ - bl 447f0 │ │ - add sp, #412 @ 0x19c │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - sub sp, #108 @ 0x6c │ │ - mov fp, r2 │ │ - mov r9, r0 │ │ - cmp r1, #33 @ 0x21 │ │ - str r3, [sp, #28] │ │ - str r2, [sp, #56] @ 0x38 │ │ - bcs.n 44836 │ │ - mov r4, r1 │ │ - lsrs r0, r4, #1 │ │ - beq.w 44ea8 │ │ - mov r8, r0 │ │ - add.w r0, r0, r0, lsl #2 │ │ - mov r1, fp │ │ - cmp r4, #8 │ │ - add.w r5, fp, r0, lsl #3 │ │ - add.w r6, r9, r0, lsl #3 │ │ - mov r0, r9 │ │ - str r5, [sp, #52] @ 0x34 │ │ - str r6, [sp, #24] │ │ - bcc.w 44b84 │ │ - bl 44edc │ │ - mov r0, r6 │ │ - mov r1, r5 │ │ - bl 44edc │ │ - movs r0, #4 │ │ - b.n 44ba6 │ │ - ldr.w sl, [sp, #144] @ 0x90 │ │ - ldr r0, [sp, #148] @ 0x94 │ │ - str r0, [sp, #24] │ │ - sub.w r0, fp, #40 @ 0x28 │ │ - str r0, [sp, #16] │ │ - str.w r9, [sp, #44] @ 0x2c │ │ - cmp.w sl, #0 │ │ - beq.w 44b70 │ │ - lsrs r3, r1, #3 │ │ - mov.w r0, #280 @ 0x118 │ │ - mla r6, r3, r0, r9 │ │ - add.w r0, r3, r3, lsl #2 │ │ - mov r8, r9 │ │ - add.w r2, r9, r0, lsl #5 │ │ - cmp r1, #64 @ 0x40 │ │ - str r1, [sp, #40] @ 0x28 │ │ - bcs.n 448dc │ │ - ldrd r5, r9, [r8, #20] │ │ - ldrd r1, r4, [r2, #20] │ │ - cmp r9, r4 │ │ - str r2, [sp, #52] @ 0x34 │ │ - mov r2, r4 │ │ - mov r0, r5 │ │ - str.w sl, [sp, #32] │ │ - it cc │ │ - movcc r2, r9 │ │ - str r1, [sp, #48] @ 0x30 │ │ - blx d8860 │ │ - str r6, [sp, #60] @ 0x3c │ │ - mov r7, r0 │ │ - ldrd r1, r6, [r6, #20] │ │ - cmp r0, #0 │ │ - mov r2, r6 │ │ - mov r0, r5 │ │ - it eq │ │ - subeq.w r7, r9, r4 │ │ - cmp r9, r6 │ │ - it cc │ │ - movcc r2, r9 │ │ - ldr.w sl, [sp, #32] │ │ - mov fp, r1 │ │ - blx d8860 │ │ - cmp r0, #0 │ │ - it eq │ │ - subeq.w r0, r9, r6 │ │ - mov r5, r8 │ │ - eors r0, r7 │ │ - bmi.n 448e8 │ │ - mov r2, r6 │ │ - cmp r4, r6 │ │ - it cc │ │ - movcc r2, r4 │ │ - ldr r0, [sp, #48] @ 0x30 │ │ - mov r1, fp │ │ - blx d8860 │ │ - cmp r0, #0 │ │ - it eq │ │ - subeq r0, r4, r6 │ │ - eors r0, r7 │ │ - ldr r5, [sp, #52] @ 0x34 │ │ - ldr r0, [sp, #60] @ 0x3c │ │ - it mi │ │ - movmi r5, r0 │ │ - b.n 448e8 │ │ - mov r1, r2 │ │ - mov r0, r8 │ │ - mov r2, r6 │ │ - bl 4501a │ │ - mov r5, r0 │ │ - sub.w r0, r5, r8 │ │ - movw r1, #52429 @ 0xcccd │ │ - movt r1, #52428 @ 0xcccc │ │ - sub.w sl, sl, #1 │ │ - lsrs r0, r0, #3 │ │ - muls r0, r1 │ │ - mov r1, r5 │ │ - str r0, [sp, #36] @ 0x24 │ │ - add r0, sp, #64 @ 0x40 │ │ - ldmia r1!, {r2, r3, r4, r6, r7} │ │ - stmia r0!, {r2, r3, r4, r6, r7} │ │ - ldmia.w r1, {r2, r3, r4, r6, r7} │ │ - stmia r0!, {r2, r3, r4, r6, r7} │ │ - ldr.w fp, [sp, #56] @ 0x38 │ │ - ldr r0, [sp, #24] │ │ - str r5, [sp, #52] @ 0x34 │ │ - str.w sl, [sp, #32] │ │ - cbz r0, 4493e │ │ - ldr r0, [sp, #24] │ │ - ldrd r1, r4, [r5, #20] │ │ - ldrd r0, r6, [r0, #20] │ │ - mov r2, r4 │ │ - cmp r6, r4 │ │ - it cc │ │ - movcc r2, r6 │ │ - blx d8860 │ │ - cmp r0, #0 │ │ - it eq │ │ - subeq r0, r6, r4 │ │ - cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.w 44a60 │ │ - ldr r1, [sp, #40] @ 0x28 │ │ - ldr r0, [sp, #28] │ │ - cmp r0, r1 │ │ - bcc.w 44eae │ │ - add.w r0, r1, r1, lsl #2 │ │ - ldr r1, [sp, #44] @ 0x2c │ │ - ldr.w ip, [sp, #36] @ 0x24 │ │ - movs r4, #0 │ │ - add.w fp, fp, r0, lsl #3 │ │ - str r0, [sp, #20] │ │ - mov sl, r1 │ │ - add.w r0, ip, ip, lsl #2 │ │ - str.w ip, [sp, #48] @ 0x30 │ │ - add.w r0, r1, r0, lsl #3 │ │ - str r0, [sp, #60] @ 0x3c │ │ - cmp sl, r0 │ │ - bcs.n 449be │ │ - ldr r0, [sp, #52] @ 0x34 │ │ - ldrd r1, r9, [r0, #20] │ │ - ldrd r0, r8, [sl, #20] │ │ - mov r2, r9 │ │ - cmp r8, r9 │ │ - it cc │ │ - movcc r2, r8 │ │ - blx d8860 │ │ - sub.w fp, fp, #40 @ 0x28 │ │ - cmp r0, #0 │ │ - it eq │ │ - subeq.w r0, r8, r9 │ │ - ldr r2, [sp, #56] @ 0x38 │ │ - mov r1, fp │ │ - cmp r0, #0 │ │ - it mi │ │ - movmi r1, r2 │ │ - add.w r2, r4, r4, lsl #2 │ │ - mov ip, r4 │ │ - add.w r1, r1, r2, lsl #3 │ │ - mov r2, sl │ │ - ldmia r2!, {r3, r4, r5, r6, r7} │ │ - add.w sl, sl, #40 @ 0x28 │ │ - stmia r1!, {r3, r4, r5, r6, r7} │ │ - ldmia.w r2, {r3, r4, r5, r6, r7} │ │ - stmia r1!, {r3, r4, r5, r6, r7} │ │ - add.w r4, ip, r0, lsr #31 │ │ - ldr r0, [sp, #60] @ 0x3c │ │ - cmp sl, r0 │ │ - bcc.n 4496e │ │ - ldr.w ip, [sp, #40] @ 0x28 │ │ - add.w r8, r4, r4, lsl #2 │ │ - ldr r0, [sp, #48] @ 0x30 │ │ - cmp r0, ip │ │ - beq.n 449e8 │ │ - mov r1, sl │ │ - sub.w fp, fp, #40 @ 0x28 │ │ - ldmia r1!, {r2, r3, r5, r6, r7} │ │ - add.w r0, fp, r8, lsl #3 │ │ - add.w sl, sl, #40 @ 0x28 │ │ - stmia r0!, {r2, r3, r5, r6, r7} │ │ - ldmia.w r1, {r2, r3, r5, r6, r7} │ │ - stmia r0!, {r2, r3, r5, r6, r7} │ │ - ldr r1, [sp, #44] @ 0x2c │ │ - b.n 4495c │ │ - ldr.w fp, [sp, #56] @ 0x38 │ │ - mov.w r2, r8, lsl #3 │ │ - ldr r0, [sp, #44] @ 0x2c │ │ - mov r5, ip │ │ - mov r1, fp │ │ - bl d4c50 │ │ - subs r1, r5, r4 │ │ - mov sl, r4 │ │ - beq.n 44a2c │ │ - ldrd r0, r2, [sp, #16] │ │ - mov ip, r1 │ │ - add.w lr, r0, r2, lsl #3 │ │ - ldr r0, [sp, #44] @ 0x2c │ │ - add.w r9, r0, r8, lsl #3 │ │ - mov r0, lr │ │ - mov r2, r9 │ │ - ldmia r0!, {r3, r4, r5, r6, r7} │ │ - sub.w lr, lr, #40 @ 0x28 │ │ - add.w r9, r9, #40 @ 0x28 │ │ - subs.w ip, ip, #1 │ │ - stmia r2!, {r3, r4, r5, r6, r7} │ │ - ldmia.w r0, {r3, r4, r5, r6, r7} │ │ - stmia r2!, {r3, r4, r5, r6, r7} │ │ - bne.n 44a10 │ │ - mov r4, sl │ │ - cmp.w sl, #0 │ │ - ldr.w sl, [sp, #32] │ │ - beq.n 44a60 │ │ - ldr r0, [sp, #40] @ 0x28 │ │ - cmp r0, r4 │ │ - bcc.w 44eb0 │ │ - add r0, sp, #64 @ 0x40 │ │ - ldr.w r9, [sp, #44] @ 0x2c │ │ - ldr r3, [sp, #28] │ │ - mov r2, fp │ │ - strd sl, r0, [sp] │ │ - add.w r0, r9, r8, lsl #3 │ │ - bl 447f0 │ │ - mov r1, r4 │ │ - cmp r4, #33 @ 0x21 │ │ - bcs.w 44848 │ │ - b.n 44804 │ │ - ldr r1, [sp, #40] @ 0x28 │ │ - ldr r0, [sp, #28] │ │ - cmp r0, r1 │ │ - bcc.w 44eae │ │ - add.w r0, r1, r1, lsl #2 │ │ - ldr r1, [sp, #44] @ 0x2c │ │ - ldr.w ip, [sp, #36] @ 0x24 │ │ - mov.w sl, #0 │ │ - add.w r7, fp, r0, lsl #3 │ │ - str r0, [sp, #48] @ 0x30 │ │ - mov r9, r1 │ │ - add.w r0, ip, ip, lsl #2 │ │ - ldrd fp, r8, [sp, #52] @ 0x34 │ │ - str.w ip, [sp, #36] @ 0x24 │ │ - add.w r0, r1, r0, lsl #3 │ │ - str r0, [sp, #60] @ 0x3c │ │ - cmp r9, r0 │ │ - bcs.n 44ae0 │ │ - ldrd r1, r5, [r9, #20] │ │ - ldrd r0, r4, [fp, #20] │ │ - mov r2, r5 │ │ - cmp r4, r5 │ │ - it cc │ │ - movcc r2, r4 │ │ - blx d8860 │ │ - subs r7, #40 @ 0x28 │ │ - cmp r0, #0 │ │ - it eq │ │ - subeq r0, r4, r5 │ │ - cmp.w r0, #4294967295 @ 0xffffffff │ │ - mov r0, r7 │ │ - add.w r1, sl, sl, lsl #2 │ │ - it gt │ │ - movgt r0, r8 │ │ - add.w r0, r0, r1, lsl #3 │ │ - mov r1, r9 │ │ - ldmia r1!, {r2, r3, r4, r5, r6} │ │ - add.w r9, r9, #40 @ 0x28 │ │ - stmia r0!, {r2, r3, r4, r5, r6} │ │ - ldmia.w r1, {r2, r3, r4, r5, r6} │ │ - stmia r0!, {r2, r3, r4, r5, r6} │ │ - it gt │ │ - addgt.w sl, sl, #1 │ │ - ldr r0, [sp, #60] @ 0x3c │ │ - cmp r9, r0 │ │ - bcc.n 44a96 │ │ - ldrd r0, ip, [sp, #36] @ 0x24 │ │ - add.w r4, sl, sl, lsl #2 │ │ - cmp r0, ip │ │ - beq.n 44b0c │ │ - ldr r0, [sp, #56] @ 0x38 │ │ - mov r1, r9 │ │ - add.w r9, r9, #40 @ 0x28 │ │ - add.w sl, sl, #1 │ │ - add.w r0, r0, r4, lsl #3 │ │ - ldmia r1!, {r2, r3, r4, r5, r6} │ │ - subs r7, #40 @ 0x28 │ │ - stmia r0!, {r2, r3, r4, r5, r6} │ │ - ldmia.w r1, {r2, r3, r4, r5, r6} │ │ - stmia r0!, {r2, r3, r4, r5, r6} │ │ - ldr r1, [sp, #44] @ 0x2c │ │ - b.n 44a80 │ │ - ldr r7, [sp, #44] @ 0x2c │ │ - lsls r2, r4, #3 │ │ - ldr.w fp, [sp, #56] @ 0x38 │ │ - mov r0, r7 │ │ - mov r1, fp │ │ - bl d4c50 │ │ - ldr r0, [sp, #40] @ 0x28 │ │ - subs.w ip, r0, sl │ │ - beq.w 44ea8 │ │ - ldr r1, [sp, #48] @ 0x30 │ │ - add.w r7, r7, r4, lsl #3 │ │ - ldr r0, [sp, #16] │ │ - mov r9, ip │ │ - mov r8, r7 │ │ - add.w lr, r0, r1, lsl #3 │ │ - mov r3, lr │ │ - mov r2, r7 │ │ - ldmia r3!, {r0, r1, r4, r5, r6} │ │ - sub.w lr, lr, #40 @ 0x28 │ │ - adds r7, #40 @ 0x28 │ │ - subs.w ip, ip, #1 │ │ - stmia r2!, {r0, r1, r4, r5, r6} │ │ - ldmia.w r3, {r0, r1, r4, r5, r6} │ │ - stmia r2!, {r0, r1, r4, r5, r6} │ │ - bne.n 44b36 │ │ - ldr r1, [sp, #40] @ 0x28 │ │ - cmp r1, sl │ │ - bcc.w 44ec2 │ │ - ldr.w sl, [sp, #32] │ │ - movs r0, #0 │ │ - mov r4, r9 │ │ - cmp.w r9, #33 @ 0x21 │ │ - mov r1, r9 │ │ - mov r9, r8 │ │ - str r0, [sp, #24] │ │ - bcs.w 44844 │ │ - b.n 44804 │ │ - ldr r3, [sp, #28] │ │ - movs r0, #1 │ │ - str r0, [sp, #0] │ │ - mov r0, r9 │ │ - mov r2, fp │ │ - bl 442dc │ │ - add sp, #108 @ 0x6c │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - mov r7, r6 │ │ - mov lr, r5 │ │ - mov ip, r4 │ │ - ldmia r0!, {r2, r3, r4, r5, r6} │ │ - stmia r1!, {r2, r3, r4, r5, r6} │ │ - ldmia.w r0, {r2, r3, r4, r5, r6} │ │ - mov r0, lr │ │ - stmia r1!, {r2, r3, r4, r5, r6} │ │ - mov r1, r7 │ │ - ldmia r1!, {r2, r3, r4, r5, r6} │ │ - stmia r0!, {r2, r3, r4, r5, r6} │ │ - ldmia.w r1, {r2, r3, r4, r5, r6} │ │ - stmia r0!, {r2, r3, r4, r5, r6} │ │ - mov r4, ip │ │ - movs r0, #1 │ │ - sub.w r1, r4, r8 │ │ - cmp r0, r8 │ │ - str r4, [sp, #12] │ │ - str r1, [sp, #28] │ │ - str r0, [sp, #20] │ │ - strd r8, r9, [sp, #40] @ 0x28 │ │ - bcs.n 44c96 │ │ - ldr.w fp, [sp, #20] │ │ - mov r2, r8 │ │ - add.w r0, fp, fp, lsl #2 │ │ - mov.w r8, r0, lsl #3 │ │ - b.n 44bf2 │ │ - ldr r0, [sp, #56] @ 0x38 │ │ - ldr r4, [sp, #48] @ 0x30 │ │ - ldmia.w r4, {r1, r2, r3, r5, r6} │ │ - stmia r0!, {r1, r2, r3, r5, r6} │ │ - ldr r2, [sp, #32] │ │ - strd fp, r7, [r9, #-20] │ │ - ldmia r2, {r0, r1, r2} │ │ - stmdb r9, {r0, r1, r2} │ │ - ldr.w r9, [sp, #44] @ 0x2c │ │ - ldrd fp, r2, [sp, #36] @ 0x24 │ │ - add.w fp, fp, #1 │ │ - add.w r8, r8, #40 @ 0x28 │ │ - cmp fp, r2 │ │ - beq.n 44c96 │ │ - add.w r0, fp, fp, lsl #2 │ │ - ldr r1, [sp, #56] @ 0x38 │ │ - str.w r8, [sp, #60] @ 0x3c │ │ - mov r8, r9 │ │ - add.w sl, r9, r0, lsl #3 │ │ - add.w ip, r1, r0, lsl #3 │ │ - mov r9, r2 │ │ - mov r1, sl │ │ - mov r2, ip │ │ - ldmia r1!, {r0, r3, r4, r5, r6} │ │ - stmia r2!, {r0, r3, r4, r5, r6} │ │ - ldmia.w r1, {r0, r3, r4, r5, r6} │ │ - stmia r2!, {r0, r3, r4, r5, r6} │ │ - ldrd r5, r7, [ip, #20] │ │ - ldrd r1, r4, [ip, #-20] │ │ - cmp r7, r4 │ │ - mov r2, r4 │ │ - mov r0, r5 │ │ - it cc │ │ - movcc r2, r7 │ │ - blx d8860 │ │ - mov r2, r9 │ │ - mov r9, r8 │ │ - ldr.w r8, [sp, #60] @ 0x3c │ │ - cmp r0, #0 │ │ - it eq │ │ - subeq r0, r7, r4 │ │ - cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 44be6 │ │ - add.w r0, sl, #28 │ │ - str.w sl, [sp, #48] @ 0x30 │ │ - mov sl, r8 │ │ - str.w fp, [sp, #36] @ 0x24 │ │ - str r0, [sp, #32] │ │ - ldr r0, [sp, #56] @ 0x38 │ │ - mov fp, r5 │ │ - cmp.w sl, #40 @ 0x28 │ │ - add.w r9, r0, sl │ │ - sub.w r0, r9, #40 @ 0x28 │ │ - mov r1, r9 │ │ - ldmia r0!, {r2, r3, r4, r5, r6} │ │ - stmia r1!, {r2, r3, r4, r5, r6} │ │ - ldmia.w r0, {r2, r3, r4, r5, r6} │ │ - stmia r1!, {r2, r3, r4, r5, r6} │ │ - beq.n 44bc8 │ │ - ldrd r1, r4, [r9, #-60] @ 0x3c │ │ - mov r0, fp │ │ - mov r2, r4 │ │ - cmp r7, r4 │ │ - it cc │ │ - movcc r2, r7 │ │ - mov r5, fp │ │ - blx d8860 │ │ - sub.w sl, sl, #40 @ 0x28 │ │ - cmp r0, #0 │ │ - it eq │ │ - subeq r0, r7, r4 │ │ - cmp r0, #0 │ │ - bmi.n 44c50 │ │ - ldr r0, [sp, #56] @ 0x38 │ │ - add r0, sl │ │ - b.n 44bca │ │ - ldr.w fp, [sp, #20] │ │ - ldr r7, [sp, #52] @ 0x34 │ │ - ldr r0, [sp, #28] │ │ - cmp fp, r0 │ │ - bcs.n 44d84 │ │ - add.w r0, fp, fp, lsl #2 │ │ - lsls r0, r0, #3 │ │ - str r0, [sp, #48] @ 0x30 │ │ - movs r0, #40 @ 0x28 │ │ - strd r7, r0, [sp, #32] │ │ - b.n 44ce8 │ │ - ldr r7, [sp, #52] @ 0x34 │ │ - mov r0, r7 │ │ - ldmia.w fp, {r1, r2, r3, r5, r6} │ │ - stmia r0!, {r1, r2, r3, r5, r6} │ │ - ldr r0, [sp, #60] @ 0x3c │ │ - ldr r2, [sp, #16] │ │ - ldr.w fp, [sp, #20] │ │ - strd r8, r0, [r9, #-20] │ │ - ldmia r2, {r0, r1, r2} │ │ - stmdb r9, {r0, r1, r2} │ │ - ldr.w r9, [sp, #44] @ 0x2c │ │ - ldr r0, [sp, #36] @ 0x24 │ │ - add.w fp, fp, #1 │ │ - subs r0, #40 @ 0x28 │ │ - str r0, [sp, #36] @ 0x24 │ │ - ldr r0, [sp, #32] │ │ - adds r0, #40 @ 0x28 │ │ - str r0, [sp, #32] │ │ - ldr r0, [sp, #28] │ │ - cmp fp, r0 │ │ - beq.n 44d84 │ │ - add.w r0, fp, fp, lsl #2 │ │ - ldr r1, [sp, #24] │ │ - add.w sl, r1, r0, lsl #3 │ │ - add.w ip, r7, r0, lsl #3 │ │ - mov r1, sl │ │ - mov r2, ip │ │ - ldmia r1!, {r0, r3, r4, r5, r6} │ │ - stmia r2!, {r0, r3, r4, r5, r6} │ │ - ldmia.w r1, {r0, r3, r4, r5, r6} │ │ - stmia r2!, {r0, r3, r4, r5, r6} │ │ - ldrd r5, r6, [ip, #20] │ │ - ldrd r1, r4, [ip, #-20] │ │ - cmp r6, r4 │ │ - mov r2, r4 │ │ - mov r0, r5 │ │ - it cc │ │ - movcc r2, r6 │ │ - blx d8860 │ │ - cmp r0, #0 │ │ - it eq │ │ - subeq r0, r6, r4 │ │ - cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 44cd2 │ │ - str.w fp, [sp, #20] │ │ - add.w r0, sl, #28 │ │ - mov fp, sl │ │ - ldrd sl, r7, [sp, #32] │ │ - str r6, [sp, #60] @ 0x3c │ │ - str r0, [sp, #16] │ │ - ldr.w ip, [sp, #48] @ 0x30 │ │ - mov r8, r5 │ │ - add.w r9, sl, ip │ │ - cmp ip, r7 │ │ - sub.w r0, r9, #40 @ 0x28 │ │ - mov r1, r9 │ │ - ldmia r0!, {r2, r3, r4, r5, r6} │ │ - stmia r1!, {r2, r3, r4, r5, r6} │ │ - ldmia.w r0, {r2, r3, r4, r5, r6} │ │ - stmia r1!, {r2, r3, r4, r5, r6} │ │ - beq.n 44cb2 │ │ - ldrd r1, r4, [r9, #-60] @ 0x3c │ │ - mov r0, r8 │ │ - ldr r6, [sp, #60] @ 0x3c │ │ - mov r2, r4 │ │ - mov r5, r8 │ │ - cmp r6, r4 │ │ - it cc │ │ - movcc r2, r6 │ │ - blx d8860 │ │ - adds r7, #40 @ 0x28 │ │ - sub.w sl, sl, #40 @ 0x28 │ │ - cmp r0, #0 │ │ - it eq │ │ - subeq r0, r6, r4 │ │ - cmp r0, #0 │ │ - bmi.n 44d38 │ │ - ldr r0, [sp, #48] @ 0x30 │ │ - ldr r7, [sp, #52] @ 0x34 │ │ - add r0, sl │ │ - b.n 44cb6 │ │ - ldr r0, [sp, #12] │ │ - mvn.w r1, #39 @ 0x27 │ │ - ldr.w r8, [sp, #56] @ 0x38 │ │ - mov r3, r7 │ │ - sub.w sl, r3, #40 @ 0x28 │ │ - mov r6, r9 │ │ - add.w r0, r0, r0, lsl #2 │ │ - add.w r0, r1, r0, lsl #3 │ │ - add.w fp, r8, r0 │ │ - add.w r7, r9, r0 │ │ - ldr r0, [sp, #40] @ 0x28 │ │ - strd r0, r6, [sp, #40] @ 0x28 │ │ - ldrd r1, r4, [r8, #20] │ │ - ldrd r0, r5, [r3, #20] │ │ - mov r2, r4 │ │ - str r3, [sp, #52] @ 0x34 │ │ - cmp r5, r4 │ │ - it cc │ │ - movcc r2, r5 │ │ - blx d8860 │ │ - mov r9, r0 │ │ - cmp r0, #0 │ │ - it eq │ │ - subeq.w r9, r5, r4 │ │ - ldr r0, [sp, #52] @ 0x34 │ │ - cmp.w r9, #4294967295 @ 0xffffffff │ │ - it gt │ │ - movgt r0, r8 │ │ - mov r1, r6 │ │ - ldmia r0!, {r2, r3, r4, r5, r6} │ │ - stmia r1!, {r2, r3, r4, r5, r6} │ │ - ldmia.w r0, {r2, r3, r4, r5, r6} │ │ - stmia r1!, {r2, r3, r4, r5, r6} │ │ - ldrd r1, r4, [sl, #20] │ │ - ldrd r0, r5, [fp, #20] │ │ - mov r2, r4 │ │ - cmp r5, r4 │ │ - it cc │ │ - movcc r2, r5 │ │ - blx d8860 │ │ - cmp r0, #0 │ │ - mov ip, sl │ │ - it eq │ │ - subeq r0, r5, r4 │ │ - cmp.w r0, #4294967295 @ 0xffffffff │ │ - it gt │ │ - movgt ip, fp │ │ - mov r2, r7 │ │ - ldmia.w ip!, {r1, r3, r4, r5, r6} │ │ - subs r7, #40 @ 0x28 │ │ - stmia r2!, {r1, r3, r4, r5, r6} │ │ - ldmia.w ip, {r1, r3, r4, r5, r6} │ │ - stmia r2!, {r1, r3, r4, r5, r6} │ │ - mov.w r1, r9, lsr #31 │ │ - orr.w r1, r1, r1, lsl #2 │ │ - ldr r3, [sp, #52] @ 0x34 │ │ - ldr r6, [sp, #44] @ 0x2c │ │ - add.w r3, r3, r1, lsl #3 │ │ - movs r1, #1 │ │ - eor.w r1, r1, r9, lsr #31 │ │ - adds r6, #40 @ 0x28 │ │ - orr.w r1, r1, r1, lsl #2 │ │ - add.w r8, r8, r1, lsl #3 │ │ - asrs r1, r0, #31 │ │ - mvn.w r0, r0, asr #31 │ │ - add.w r1, r1, r1, lsl #2 │ │ - add.w r0, r0, r0, lsl #2 │ │ - add.w sl, sl, r1, lsl #3 │ │ - add.w fp, fp, r0, lsl #3 │ │ - ldr r0, [sp, #40] @ 0x28 │ │ - subs r0, #1 │ │ - bne.n 44da8 │ │ - ldr r1, [sp, #12] │ │ - add.w r0, sl, #40 @ 0x28 │ │ - mov r2, r8 │ │ - mov ip, fp │ │ - mov r8, r3 │ │ - lsls r1, r1, #31 │ │ - beq.n 44e9c │ │ - mov r1, r8 │ │ - cmp r2, r0 │ │ - it cc │ │ - movcc r1, r2 │ │ - mov fp, r6 │ │ - mov r4, r2 │ │ - ldmia r1!, {r2, r3, r5, r6, r7} │ │ - stmia.w fp!, {r2, r3, r5, r6, r7} │ │ - ldmia.w r1, {r2, r3, r5, r6, r7} │ │ - mov.w r1, #0 │ │ - stmia.w fp, {r2, r3, r5, r6, r7} │ │ - mov.w r2, #0 │ │ - it cs │ │ - movcs r2, #1 │ │ - it cc │ │ - movcc r1, #1 │ │ - orr.w r2, r2, r2, lsl #2 │ │ - orr.w r1, r1, r1, lsl #2 │ │ - add.w r8, r8, r2, lsl #3 │ │ - add.w r2, r4, r1, lsl #3 │ │ - cmp r2, r0 │ │ - itt eq │ │ - addeq.w r0, ip, #40 @ 0x28 │ │ - cmpeq r8, r0 │ │ - bne.n 44ebe │ │ - add sp, #108 @ 0x6c │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - udf #254 @ 0xfe │ │ - ldr r0, [pc, #32] @ (44ed4 ) │ │ - movs r1, #19 │ │ - ldr r2, [pc, #32] @ (44ed8 ) │ │ - add r0, pc │ │ - add r2, pc │ │ - bl 3fa58 │ │ - bl 413cc │ │ - ldr r3, [pc, #12] @ (44ed0 ) │ │ - mov r0, sl │ │ - mov r2, r1 │ │ - add r3, pc │ │ - bl 3f9a8 │ │ - nop │ │ - ldr r4, [r2, #104] @ 0x68 │ │ - movs r1, r1 │ │ - lsrs r1, r4 │ │ - @ instruction: 0xfffd6e94 │ │ - movs r1, r1 │ │ - stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - sub sp, #12 │ │ - str r1, [sp, #8] │ │ - mov r5, r0 │ │ - ldrd r1, r9, [r0, #20] │ │ - ldrd r0, sl, [r0, #60] @ 0x3c │ │ - mov r2, r9 │ │ - cmp sl, r9 │ │ - it cc │ │ - movcc r2, sl │ │ - blx d8860 │ │ - mov r6, r0 │ │ - ldrd r1, r4, [r5, #100] @ 0x64 │ │ - ldrd r0, r7, [r5, #140] @ 0x8c │ │ - mov r2, r4 │ │ - cmp r7, r4 │ │ - it cc │ │ - movcc r2, r7 │ │ - blx d8860 │ │ - cmp r0, #0 │ │ - it eq │ │ - subeq r0, r7, r4 │ │ - cmp r6, #0 │ │ - it eq │ │ - subeq.w r6, sl, r9 │ │ - lsrs r1, r6, #31 │ │ - movs r2, #80 @ 0x50 │ │ - add.w r1, r1, r1, lsl #2 │ │ - cmp r0, #0 │ │ - mov.w r4, #120 @ 0x78 │ │ - add.w sl, r5, r1, lsl #3 │ │ - ldrd r1, r3, [sl, #20] │ │ - str r3, [sp, #0] │ │ - it mi │ │ - movmi r2, #120 @ 0x78 │ │ - add.w r0, r5, r2 │ │ - str r0, [sp, #4] │ │ - ldrd r0, r8, [r0, #20] │ │ - mov r2, r3 │ │ - it mi │ │ - movmi r4, #80 @ 0x50 │ │ - cmp r8, r3 │ │ - it cc │ │ - movcc r2, r8 │ │ - blx d8860 │ │ - mov r7, r0 │ │ - mvns r0, r6 │ │ - lsrs r0, r0, #31 │ │ - add.w r9, r5, r4 │ │ - add.w r0, r0, r0, lsl #2 │ │ - cmp r7, #0 │ │ - ldr r2, [sp, #0] │ │ - add.w r5, r5, r0, lsl #3 │ │ - ldrd r0, fp, [r9, #20] │ │ - ldrd r1, r4, [r5, #20] │ │ - it eq │ │ - subeq.w r7, r8, r2 │ │ - ldr r6, [sp, #4] │ │ - cmp r7, #0 │ │ - mov r2, r4 │ │ - mov r8, r6 │ │ - it mi │ │ - movmi r8, r5 │ │ - cmp fp, r4 │ │ - it cc │ │ - movcc r2, fp │ │ - blx d8860 │ │ - cmp r0, #0 │ │ - it eq │ │ - subeq.w r0, fp, r4 │ │ - cmp r0, #0 │ │ - ittt mi │ │ - movmi r8, r9 │ │ - movmi r9, r5 │ │ - movmi r5, r6 │ │ - ldrd r0, r3, [r8, #20] │ │ - cmp r7, #0 │ │ - str r3, [sp, #0] │ │ - it mi │ │ - movmi r5, sl │ │ - ldrd r1, fp, [r5, #20] │ │ - it mi │ │ - movmi sl, r6 │ │ - mov r2, fp │ │ - cmp r3, fp │ │ - it cc │ │ - movcc r2, r3 │ │ - blx d8860 │ │ - ldr.w ip, [sp, #8] │ │ - cmp r0, #0 │ │ - ldmia.w sl!, {r2, r3, r4, r6, r7} │ │ - mov r1, ip │ │ - stmia r1!, {r2, r3, r4, r6, r7} │ │ - ldmia.w sl, {r2, r3, r4, r6, r7} │ │ - stmia r1!, {r2, r3, r4, r6, r7} │ │ - ldr r1, [sp, #0] │ │ - it eq │ │ - subeq.w r0, r1, fp │ │ - cmp r0, #0 │ │ - mov r0, r5 │ │ - it mi │ │ - movmi r0, r8 │ │ - add.w r1, ip, #40 @ 0x28 │ │ - ldmia r0!, {r2, r3, r4, r6, r7} │ │ - stmia r1!, {r2, r3, r4, r6, r7} │ │ - ldmia.w r0, {r2, r3, r4, r6, r7} │ │ - add.w r0, ip, #80 @ 0x50 │ │ - stmia r1!, {r2, r3, r4, r6, r7} │ │ - it pl │ │ - movpl r5, r8 │ │ - ldmia r5!, {r1, r2, r3, r6, r7} │ │ - stmia r0!, {r1, r2, r3, r6, r7} │ │ - ldmia.w r5, {r1, r2, r3, r6, r7} │ │ - stmia r0!, {r1, r2, r3, r6, r7} │ │ - add.w r0, ip, #120 @ 0x78 │ │ - ldmia.w r9!, {r1, r2, r3, r6, r7} │ │ - stmia r0!, {r1, r2, r3, r6, r7} │ │ - ldmia.w r9, {r1, r2, r3, r6, r7} │ │ - stmia r0!, {r1, r2, r3, r6, r7} │ │ - add sp, #12 │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - sub sp, #12 │ │ - mov r8, r2 │ │ - mov sl, r1 │ │ - mov r6, r0 │ │ - cmp r3, #8 │ │ - bcc.n 4506a │ │ - lsrs r5, r3, #3 │ │ - mov.w r4, #280 @ 0x118 │ │ - mla r2, r5, r4, r6 │ │ - add.w r7, r5, r5, lsl #2 │ │ - mov r0, r6 │ │ - add.w r1, r6, r7, lsl #5 │ │ - mov r3, r5 │ │ - bl 4501a │ │ - mla r2, r5, r4, sl │ │ - add.w r1, sl, r7, lsl #5 │ │ - mov r6, r0 │ │ - mov r0, sl │ │ - mov r3, r5 │ │ - bl 4501a │ │ - mla r2, r5, r4, r8 │ │ - add.w r1, r8, r7, lsl #5 │ │ - mov sl, r0 │ │ - mov r0, r8 │ │ - mov r3, r5 │ │ - bl 4501a │ │ - mov r8, r0 │ │ - ldrd r4, r9, [r6, #20] │ │ - ldrd r1, r7, [sl, #20] │ │ - cmp r9, r7 │ │ - mov r2, r7 │ │ - mov r0, r4 │ │ - it cc │ │ - movcc r2, r9 │ │ - str r1, [sp, #8] │ │ - blx d8860 │ │ - str.w r8, [sp, #4] │ │ - mov r5, r0 │ │ - ldrd fp, r8, [r8, #20] │ │ - cmp r0, #0 │ │ - mov r2, r8 │ │ - mov r0, r4 │ │ - it eq │ │ - subeq.w r5, r9, r7 │ │ - cmp r9, r8 │ │ - mov r1, fp │ │ - it cc │ │ - movcc r2, r9 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ subeq.w r0, r9, r8 │ │ eors r0, r5 │ │ - bmi.n 450d2 │ │ + bmi.n 453dc │ │ mov r2, r8 │ │ cmp r7, r8 │ │ it cc │ │ movcc r2, r7 │ │ ldr r0, [sp, #8] │ │ mov r1, fp │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ subeq.w r0, r7, r8 │ │ eors r0, r5 │ │ ldr r0, [sp, #4] │ │ it mi │ │ movmi sl, r0 │ │ @@ -43304,77 +43498,77 @@ │ │ ldr.w sl, [r2] │ │ mov r9, r1 │ │ mov fp, r0 │ │ str r2, [sp, #8] │ │ ldr.w r1, [sl] │ │ ldr r0, [r1, #108] @ 0x6c │ │ cmp r0, #0 │ │ - beq.w 4520a │ │ + beq.w 45514 │ │ add.w r0, r0, r0, lsl #1 │ │ ldr r4, [r1, #104] @ 0x68 │ │ add.w r7, fp, #8 │ │ add.w r6, fp, #32 │ │ lsls r5, r0, #4 │ │ ldrb.w r3, [r4, #32] │ │ mov r0, r6 │ │ ldr r2, [r4, #28] │ │ mov r1, r7 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 45120 │ │ + bne.n 4542a │ │ adds r4, #48 @ 0x30 │ │ subs r5, #48 @ 0x30 │ │ - bne.n 45106 │ │ - b.n 4520a │ │ + bne.n 45410 │ │ + b.n 45514 │ │ ldrb.w r1, [r4, #40] @ 0x28 │ │ cmp r1, #0 │ │ - beq.n 45204 │ │ + beq.n 4550e │ │ uxtb r0, r0 │ │ cmp r0, #1 │ │ - bne.n 4520a │ │ + bne.n 45514 │ │ movs r5, #2 │ │ ldr.w r1, [sl] │ │ ldr r0, [r1, #108] @ 0x6c │ │ - cbz r0, 45186 │ │ + cbz r0, 45490 │ │ add.w r2, r5, r5, lsl #1 │ │ ldr r4, [r1, #104] @ 0x68 │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r1, fp, r2, lsl #3 │ │ sub.w r8, r1, #16 │ │ add.w r7, r1, #8 │ │ lsls r6, r0, #4 │ │ ldrb.w r3, [r4, #32] │ │ mov r0, r7 │ │ ldr r2, [r4, #28] │ │ mov r1, r8 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 4516a │ │ + bne.n 45474 │ │ adds r4, #48 @ 0x30 │ │ subs r6, #48 @ 0x30 │ │ - bne.n 45150 │ │ - b.n 45186 │ │ + bne.n 4545a │ │ + b.n 45490 │ │ ldrb.w r1, [r4, #40] @ 0x28 │ │ - cbz r1, 45178 │ │ + cbz r1, 45482 │ │ uxtb r0, r0 │ │ cmp r0, #1 │ │ - beq.n 4517e │ │ - b.n 45186 │ │ + beq.n 45488 │ │ + b.n 45490 │ │ mvns r0, r0 │ │ lsls r0, r0, #24 │ │ - bne.n 45186 │ │ + bne.n 45490 │ │ adds r5, #1 │ │ cmp r5, r9 │ │ - bne.n 45130 │ │ - b.n 45192 │ │ + bne.n 4543a │ │ + b.n 4549c │ │ movs r0, #1 │ │ cmp r5, r9 │ │ - bne.n 4527a │ │ + bne.n 45584 │ │ cmp r0, #0 │ │ - beq.w 4529c │ │ + beq.w 455a6 │ │ add.w r0, r9, r9, lsl #1 │ │ mvn.w r1, #11 │ │ movs r2, #0 │ │ add.w r0, r1, r0, lsl #3 │ │ mov.w r1, r9, lsr #1 │ │ add.w r1, r1, r1, lsl #1 │ │ mov.w ip, r1, lsl #3 │ │ @@ -43399,105 +43593,104 @@ │ │ ldr r6, [r7, #8] │ │ str.w lr, [r7, #-12] │ │ str.w sl, [r1, #4] │ │ str.w r9, [r1, #8] │ │ str r5, [r7, #4] │ │ str r6, [r1, #20] │ │ str r3, [r7, #8] │ │ - bne.n 451ac │ │ - b.n 4529c │ │ + bne.n 454b6 │ │ + b.n 455a6 │ │ mvns r0, r0 │ │ lsls r0, r0, #24 │ │ - beq.n 4512e │ │ + beq.n 45438 │ │ ldr.w r0, [sl] │ │ ldr r0, [r0, #108] @ 0x6c │ │ cmp r0, #0 │ │ - beq.n 4529c │ │ + beq.n 455a6 │ │ movs r5, #2 │ │ - b.n 45224 │ │ + b.n 4552e │ │ mvns r0, r0 │ │ lsls r0, r0, #24 │ │ - beq.n 45272 │ │ + beq.n 4557c │ │ adds r5, #1 │ │ cmp r5, r9 │ │ - beq.n 4529c │ │ + beq.n 455a6 │ │ ldr.w r1, [sl] │ │ ldr r0, [r1, #108] @ 0x6c │ │ cmp r0, #0 │ │ - beq.n 4521e │ │ + beq.n 45528 │ │ add.w r2, r5, r5, lsl #1 │ │ ldr r4, [r1, #104] @ 0x68 │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r1, fp, r2, lsl #3 │ │ sub.w r7, r1, #16 │ │ add.w r6, r1, #8 │ │ mov.w r8, r0, lsl #4 │ │ ldrb.w r3, [r4, #32] │ │ mov r0, r6 │ │ ldr r2, [r4, #28] │ │ mov r1, r7 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 45264 │ │ + bne.n 4556e │ │ adds r4, #48 @ 0x30 │ │ subs.w r8, r8, #48 @ 0x30 │ │ - bne.n 45248 │ │ - b.n 4521e │ │ + bne.n 45552 │ │ + b.n 45528 │ │ ldrb.w r1, [r4, #40] @ 0x28 │ │ cmp r1, #0 │ │ - beq.n 45218 │ │ + beq.n 45522 │ │ uxtb r0, r0 │ │ cmp r0, #1 │ │ - bne.n 4521e │ │ + bne.n 45528 │ │ movs r0, #0 │ │ cmp r5, r9 │ │ - beq.w 4518c │ │ + beq.w 45496 │ │ ldr r0, [sp, #8] │ │ movs r1, #62 @ 0x3e │ │ str r0, [sp, #0] │ │ orr.w r0, r9, #1 │ │ clz r0, r0 │ │ movs r2, #0 │ │ eor.w r3, r1, r0, lsl #1 │ │ mov r0, fp │ │ mov r1, r9 │ │ - bl 45600 │ │ + bl 45908 │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - bmi.n 4524e │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ sub sp, #12 │ │ uxtb r3, r3 │ │ cmp r3, #6 │ │ - bhi.n 4534e │ │ + bhi.n 45656 │ │ tbb [pc, r3] │ │ lsls r4, r0, #16 │ │ movs r6, #81 @ 0x51 │ │ str r3, [r4, #88] @ 0x58 │ │ lsls r7, r7, #1 │ │ ldr r3, [r0, #8] │ │ cmp r3, r2 │ │ - bls.n 452d0 │ │ + bls.n 455d8 │ │ ldr r3, [r0, #4] │ │ cmp r2, r3 │ │ - bcs.w 455d2 │ │ + bcs.w 458da │ │ ldr r0, [r0, #0] │ │ ldrb r0, [r0, r2] │ │ - b.n 452d2 │ │ + b.n 455da │ │ movs r0, #0 │ │ ldr r3, [r1, #8] │ │ movs r7, #0 │ │ cmp r3, r2 │ │ mov.w r3, #0 │ │ - bls.n 452ea │ │ + bls.n 455f2 │ │ ldr r3, [r1, #4] │ │ cmp r2, r3 │ │ - bcs.w 455d2 │ │ + bcs.w 458da │ │ ldr r1, [r1, #0] │ │ ldrb r3, [r1, r2] │ │ cmp r0, r3 │ │ mov.w r0, #0 │ │ it cc │ │ movcc r0, #1 │ │ it hi │ │ @@ -43506,133 +43699,133 @@ │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ movs r3, #0 │ │ ldr r7, [r0, #8] │ │ movt r3, #32704 @ 0x7fc0 │ │ cmp r7, r2 │ │ mov r7, r3 │ │ - bls.n 45322 │ │ + bls.n 4562a │ │ ldr r6, [r0, #4] │ │ cmp r6, r2 │ │ - bcc.w 4559a │ │ + bcc.w 458a2 │ │ subs r6, r6, r2 │ │ cmp r6, #3 │ │ - bls.w 4557e │ │ + bls.w 45886 │ │ ldr r0, [r0, #0] │ │ ldr r7, [r0, r2] │ │ ldr r0, [r1, #8] │ │ cmp r0, r2 │ │ - bls.n 4533c │ │ + bls.n 45644 │ │ ldr r6, [r1, #4] │ │ cmp r6, r2 │ │ - bcc.w 4559a │ │ + bcc.w 458a2 │ │ subs r6, r6, r2 │ │ cmp r6, #3 │ │ - bls.w 4557e │ │ + bls.w 45886 │ │ ldr r0, [r1, #0] │ │ ldr r3, [r0, r2] │ │ asrs r0, r3, #31 │ │ asrs r1, r7, #31 │ │ eor.w r0, r3, r0, lsr #1 │ │ eor.w r1, r7, r1, lsr #1 │ │ movs r2, #0 │ │ cmp r1, r0 │ │ - b.n 45488 │ │ + b.n 45790 │ │ movs r0, #0 │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ ldr r3, [r0, #8] │ │ cmp r3, r2 │ │ - bls.w 45466 │ │ + bls.w 4576e │ │ ldr r6, [r0, #4] │ │ cmp r6, r2 │ │ - bcc.w 455a8 │ │ + bcc.w 458b0 │ │ subs r6, r6, r2 │ │ cmp r6, #3 │ │ - bls.w 4557e │ │ + bls.w 45886 │ │ ldr r0, [r0, #0] │ │ ldr r0, [r0, r2] │ │ ldr r3, [r1, #8] │ │ cmp r3, r2 │ │ - bhi.n 45472 │ │ + bhi.n 4577a │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ - b.n 45484 │ │ + b.n 4578c │ │ ldr r3, [r0, #8] │ │ cmp r3, r2 │ │ - bls.w 4549c │ │ + bls.w 457a4 │ │ ldr r6, [r0, #4] │ │ cmp r6, r2 │ │ - bcc.w 455b6 │ │ + bcc.w 458be │ │ subs r6, r6, r2 │ │ cmp r6, #7 │ │ - bls.w 4558c │ │ + bls.w 45894 │ │ ldr r3, [r0, #0] │ │ ldr r0, [r3, r2] │ │ add r3, r2 │ │ ldr r3, [r3, #4] │ │ ldr r6, [r1, #8] │ │ movs r7, #0 │ │ cmp r6, r2 │ │ - bhi.w 454ae │ │ + bhi.w 457b6 │ │ movs r2, #0 │ │ movs r1, #0 │ │ movt r2, #32760 @ 0x7ff8 │ │ - b.n 454c4 │ │ + b.n 457cc │ │ mov r3, sp │ │ mov r4, r1 │ │ mov r1, r0 │ │ mov r0, r3 │ │ mov r7, r1 │ │ mov r5, r2 │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r0, [sp, #0] │ │ cmp r0, #1 │ │ - bne.w 45506 │ │ + bne.w 4580e │ │ ldrd r6, r9, [sp, #4] │ │ ldr r2, [r7, #4] │ │ adds.w r1, r9, r6 │ │ - bcs.w 45574 │ │ + bcs.w 4587c │ │ cmp r1, r2 │ │ - bhi.w 45574 │ │ + bhi.w 4587c │ │ mov r0, sp │ │ mov r1, r4 │ │ mov r2, r5 │ │ ldr.w r8, [r7] │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r0, [sp, #0] │ │ cmp r0, #0 │ │ - beq.w 45562 │ │ + beq.w 4586a │ │ add.w r0, r8, r6 │ │ - b.n 45516 │ │ + b.n 4581e │ │ ldr r6, [r0, #8] │ │ mov.w r3, #2147483648 @ 0x80000000 │ │ movs r7, #0 │ │ movs r5, #0 │ │ mov.w r4, #2147483648 @ 0x80000000 │ │ cmp r6, r2 │ │ - bls.n 45424 │ │ + bls.n 4572c │ │ ldr r6, [r0, #4] │ │ cmp r6, r2 │ │ - bcc.w 455c4 │ │ + bcc.w 458cc │ │ subs r6, r6, r2 │ │ cmp r6, #7 │ │ - bls.w 4558c │ │ + bls.w 45894 │ │ ldr r0, [r0, #0] │ │ ldr r5, [r0, r2] │ │ add r0, r2 │ │ ldr r4, [r0, #4] │ │ ldr r0, [r1, #8] │ │ cmp r0, r2 │ │ - bls.n 45442 │ │ + bls.n 4574a │ │ ldr r6, [r1, #4] │ │ cmp r6, r2 │ │ - bcc.w 455c4 │ │ + bcc.w 458cc │ │ subs r6, r6, r2 │ │ cmp r6, #7 │ │ - bls.w 4558c │ │ + bls.w 45894 │ │ ldr r0, [r1, #0] │ │ ldr r7, [r0, r2] │ │ add r0, r2 │ │ ldr r3, [r0, #4] │ │ subs r1, r5, r7 │ │ mov.w r0, #0 │ │ sbcs.w r1, r4, r3 │ │ @@ -43645,21 +43838,21 @@ │ │ movlt r0, #1 │ │ subs r0, r0, r1 │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ ldr r3, [r1, #8] │ │ cmp r3, r2 │ │ - bls.w 45378 │ │ + bls.w 45680 │ │ ldr r6, [r1, #4] │ │ cmp r6, r2 │ │ - bcc.w 455a8 │ │ + bcc.w 458b0 │ │ subs r6, r6, r2 │ │ cmp r6, #3 │ │ - bls.n 4557e │ │ + bls.n 45886 │ │ ldr r1, [r1, #0] │ │ ldr r1, [r1, r2] │ │ movs r2, #0 │ │ cmp r0, r1 │ │ mov.w r0, #0 │ │ it lt │ │ movlt r0, #1 │ │ @@ -43670,21 +43863,21 @@ │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ movs r3, #0 │ │ movs r0, #0 │ │ movt r3, #32760 @ 0x7ff8 │ │ ldr r6, [r1, #8] │ │ movs r7, #0 │ │ cmp r6, r2 │ │ - bls.w 453a8 │ │ + bls.w 456b0 │ │ ldr r6, [r1, #4] │ │ cmp r6, r2 │ │ - bcc.w 455b6 │ │ + bcc.w 458be │ │ subs r6, r6, r2 │ │ cmp r6, #7 │ │ - bls.n 4558c │ │ + bls.n 45894 │ │ ldr r6, [r1, #0] │ │ ldr r1, [r6, r2] │ │ add r2, r6 │ │ ldr r2, [r2, #4] │ │ asrs r6, r2, #31 │ │ movs.w r5, r6, lsr #1 │ │ eor.w r2, r2, r5 │ │ @@ -43706,32 +43899,32 @@ │ │ movlt r7, #1 │ │ subs r0, r7, r6 │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ mov r0, sp │ │ mov r1, r4 │ │ mov r2, r5 │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r0, [sp, #0] │ │ - cbz r0, 45558 │ │ + cbz r0, 45860 │ │ movs r0, #0 │ │ ldrd r6, r5, [sp, #4] │ │ ldr r2, [r4, #4] │ │ adds r1, r5, r6 │ │ - bcs.n 45574 │ │ + bcs.n 4587c │ │ cmp r1, r2 │ │ - bhi.n 45574 │ │ - cbz r0, 4556a │ │ + bhi.n 4587c │ │ + cbz r0, 45872 │ │ ldr r1, [r4, #0] │ │ mov r2, r5 │ │ cmp r9, r5 │ │ it cc │ │ movcc r2, r9 │ │ add r1, r6 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ subeq.w r0, r9, r5 │ │ cmp r0, #0 │ │ mov.w r0, #0 │ │ mov.w r1, #0 │ │ it mi │ │ @@ -43748,213 +43941,213 @@ │ │ movs r0, #1 │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ movs r0, #1 │ │ negs r0, r0 │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ - ldr r3, [pc, #132] @ (455fc ) │ │ + ldr r3, [pc, #132] @ (45904 ) │ │ mov r0, r6 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #104] @ (455e8 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #104] @ (458f0 ) │ │ movs r0, #0 │ │ movs r1, #4 │ │ mov r2, r6 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #96] @ (455f0 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #96] @ (458f8 ) │ │ movs r0, #0 │ │ movs r1, #8 │ │ mov r2, r6 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #80] @ (455ec ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #80] @ (458f4 ) │ │ add r3, pc │ │ mov r0, r2 │ │ mov r1, r6 │ │ mov r2, r6 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #52] @ (455e0 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #52] @ (458e8 ) │ │ add r3, pc │ │ mov r0, r2 │ │ mov r1, r6 │ │ mov r2, r6 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #64] @ (455f8 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #64] @ (45900 ) │ │ add r3, pc │ │ mov r0, r2 │ │ mov r1, r6 │ │ mov r2, r6 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #44] @ (455f4 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #44] @ (458fc ) │ │ add r3, pc │ │ mov r0, r2 │ │ mov r1, r6 │ │ mov r2, r6 │ │ - bl 3f9a8 │ │ - ldr r4, [pc, #16] @ (455e4 ) │ │ + bl 3fcb0 │ │ + ldr r4, [pc, #16] @ (458ec ) │ │ mov r0, r2 │ │ mov r1, r3 │ │ add r4, pc │ │ mov r2, r4 │ │ - bl 3fa74 │ │ - ldrh r2, [r4, r1] │ │ + bl 3fd7c │ │ + ldrsb r2, [r5, r5] │ │ movs r1, r1 │ │ - strb r4, [r2, r6] │ │ + strh r4, [r3, r2] │ │ movs r1, r1 │ │ - strb r6, [r6, r2] │ │ + str r6, [r7, r6] │ │ movs r1, r1 │ │ - ldr r0, [r6, r6] │ │ + ldrsb r0, [r7, r2] │ │ movs r1, r1 │ │ - strb r0, [r7, r2] │ │ + str r0, [r0, r7] │ │ movs r1, r1 │ │ - ldrh r6, [r4, r1] │ │ + ldrsb r6, [r5, r5] │ │ movs r1, r1 │ │ - ldr r4, [r4, r6] │ │ + ldrsb r4, [r5, r2] │ │ movs r1, r1 │ │ - ldrh r4, [r6, r0] │ │ + ldrsb r4, [r7, r4] │ │ movs r1, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #68 @ 0x44 │ │ str r2, [sp, #12] │ │ mov r4, r0 │ │ ldr r0, [sp, #104] @ 0x68 │ │ mov sl, r1 │ │ cmp r1, #33 @ 0x21 │ │ str r0, [sp, #32] │ │ - bcs.n 45626 │ │ + bcs.n 4592e │ │ ldr r0, [sp, #32] │ │ mov r1, sl │ │ ldr r2, [r0, #0] │ │ mov r0, r4 │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w 45cca │ │ + b.w 45fd2 │ │ mov r5, r3 │ │ cmp r5, #0 │ │ - beq.w 45cb6 │ │ + beq.w 45fbe │ │ mov.w r3, sl, lsr #3 │ │ movs r0, #168 @ 0xa8 │ │ mla r2, r3, r0, r4 │ │ add.w r0, r3, r3, lsl #1 │ │ str.w sl, [sp, #20] │ │ add.w r9, r4, r0, lsl #5 │ │ cmp.w sl, #64 @ 0x40 │ │ str r4, [sp, #16] │ │ - bcs.n 4568a │ │ + bcs.n 45992 │ │ ldr r0, [sp, #32] │ │ add.w r6, r9, #8 │ │ add.w r8, r4, #8 │ │ ldr.w fp, [r0] │ │ ldr.w r0, [fp] │ │ ldr r1, [r0, #108] @ 0x6c │ │ - cbz r1, 45698 │ │ + cbz r1, 459a0 │ │ ldr r4, [r0, #104] @ 0x68 │ │ add.w r0, r1, r1, lsl #1 │ │ mov sl, r2 │ │ lsls r7, r0, #4 │ │ ldrb.w r3, [r4, #32] │ │ mov r0, r8 │ │ ldr r2, [r4, #28] │ │ mov r1, r6 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 4569c │ │ + bne.n 459a4 │ │ adds r4, #48 @ 0x30 │ │ subs r7, #48 @ 0x30 │ │ - bne.n 4566c │ │ + bne.n 45974 │ │ movs r0, #0 │ │ mov r2, sl │ │ - b.n 456b0 │ │ + b.n 459b8 │ │ ldr r0, [sp, #32] │ │ mov r1, r9 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ - bl 462e6 │ │ - b.n 45782 │ │ + bl 465ee │ │ + b.n 45a8a │ │ movs r0, #0 │ │ - b.n 456b0 │ │ + b.n 459b8 │ │ ldrb.w r1, [r4, #40] @ 0x28 │ │ mov r2, sl │ │ - cbz r1, 456b0 │ │ + cbz r1, 459b8 │ │ mvns r0, r0 │ │ lsls r0, r0, #24 │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #36] @ 0x24 │ │ ldr.w r0, [fp] │ │ add.w r7, r2, #8 │ │ str r2, [sp, #28] │ │ ldr r1, [r0, #108] @ 0x6c │ │ - cbz r1, 45704 │ │ + cbz r1, 45a0c │ │ ldr r4, [r0, #104] @ 0x68 │ │ add.w r0, r1, r1, lsl #1 │ │ mov.w sl, r0, lsl #4 │ │ ldrb.w r3, [r4, #32] │ │ mov r0, r8 │ │ ldr r2, [r4, #28] │ │ mov r1, r7 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 456e6 │ │ + bne.n 459ee │ │ adds r4, #48 @ 0x30 │ │ subs.w sl, sl, #48 @ 0x30 │ │ - bne.n 456ca │ │ - b.n 45704 │ │ + bne.n 459d2 │ │ + b.n 45a0c │ │ ldrb.w r1, [r4, #40] @ 0x28 │ │ cmp r1, #0 │ │ - beq.w 45c94 │ │ + beq.w 45f9c │ │ uxtb r0, r0 │ │ cmp r0, #1 │ │ - bne.n 45704 │ │ + bne.n 45a0c │ │ ldr r1, [sp, #36] @ 0x24 │ │ mvns r0, r1 │ │ lsls r0, r0, #24 │ │ ldr r4, [sp, #16] │ │ mov r0, r4 │ │ - bne.n 45782 │ │ - b.n 45710 │ │ + bne.n 45a8a │ │ + b.n 45a18 │ │ ldr r1, [sp, #36] @ 0x24 │ │ ldr r4, [sp, #16] │ │ mvns r0, r1 │ │ lsls r0, r0, #24 │ │ mov r0, r4 │ │ - beq.n 45782 │ │ + beq.n 45a8a │ │ ldr.w r0, [fp] │ │ ldr r2, [r0, #108] @ 0x6c │ │ - cbz r2, 45744 │ │ + cbz r2, 45a4c │ │ ldr r4, [r0, #104] @ 0x68 │ │ add.w r0, r2, r2, lsl #1 │ │ mov r8, r5 │ │ lsls r5, r0, #4 │ │ ldrb.w r3, [r4, #32] │ │ mov r0, r6 │ │ ldr r2, [r4, #28] │ │ mov r1, r7 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 4574a │ │ + bne.n 45a52 │ │ adds r4, #48 @ 0x30 │ │ subs r5, #48 @ 0x30 │ │ - bne.n 45722 │ │ + bne.n 45a2a │ │ movs r0, #0 │ │ ldr r1, [sp, #36] @ 0x24 │ │ mov r5, r8 │ │ ldr r2, [sp, #28] │ │ - b.n 45764 │ │ + b.n 45a6c │ │ movs r0, #0 │ │ ldr r2, [sp, #28] │ │ - b.n 45764 │ │ + b.n 45a6c │ │ ldrb.w r1, [r4, #40] @ 0x28 │ │ ldr r2, [sp, #28] │ │ cmp r1, #0 │ │ ldr r1, [sp, #36] @ 0x24 │ │ - beq.n 45762 │ │ + beq.n 45a6a │ │ mvns r0, r0 │ │ lsls r0, r0, #24 │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ it eq │ │ moveq r0, #1 │ │ mov r5, r8 │ │ mvns r1, r1 │ │ @@ -43972,57 +44165,57 @@ │ │ mov r0, r9 │ │ subs r5, #1 │ │ str r5, [sp, #8] │ │ ldr.w sl, [sp, #20] │ │ sub.w r8, r0, r4 │ │ ldr r0, [sp, #12] │ │ mov fp, r4 │ │ - cbz r0, 457e4 │ │ + cbz r0, 45aec │ │ ldr r0, [sp, #32] │ │ add.w r9, fp, r8 │ │ ldr r0, [r0, #0] │ │ ldr r1, [r0, #0] │ │ ldr r0, [r1, #108] @ 0x6c │ │ cmp r0, #0 │ │ - beq.w 45a38 │ │ + beq.w 45d40 │ │ ldr r7, [r1, #104] @ 0x68 │ │ add.w r0, r0, r0, lsl #1 │ │ ldr r1, [sp, #12] │ │ add.w r5, r9, #8 │ │ lsls r4, r0, #4 │ │ add.w r6, r1, #8 │ │ ldrb.w r3, [r7, #32] │ │ mov r0, r6 │ │ ldr r2, [r7, #28] │ │ mov r1, r5 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 457d2 │ │ + bne.n 45ada │ │ adds r7, #48 @ 0x30 │ │ subs r4, #48 @ 0x30 │ │ - bne.n 457b8 │ │ - b.n 45a38 │ │ + bne.n 45ac0 │ │ + b.n 45d40 │ │ ldrb.w r1, [r7, #40] @ 0x28 │ │ cmp r1, #0 │ │ - beq.w 45a30 │ │ + beq.w 45d38 │ │ uxtb r0, r0 │ │ cmp r0, #1 │ │ - bne.w 45a38 │ │ + bne.w 45d40 │ │ ldr r0, [sp, #32] │ │ add.w r9, sp, #40 @ 0x28 │ │ mov r1, r9 │ │ ldr.w sl, [r0] │ │ mov r0, fp │ │ ldmia.w r0, {r2, r3, r4, r5, r6, r7} │ │ mov r0, fp │ │ stmia r1!, {r2, r3, r4, r5, r6, r7} │ │ add.w r4, fp, r8 │ │ movs r2, #24 │ │ mov r1, r4 │ │ - bl d53c2 │ │ + bl d51f6 │ │ mov r0, r9 │ │ add.w ip, fp, #24 │ │ ldmia.w r0, {r1, r2, r3, r5, r6, r7} │ │ add.w r8, fp, #8 │ │ mov r0, ip │ │ stmia r4!, {r1, r2, r3, r5, r6, r7} │ │ mov r1, r9 │ │ @@ -44032,219 +44225,219 @@ │ │ ldr r1, [sp, #20] │ │ ldr.w r0, [sl] │ │ add.w r1, r1, r1, lsl #1 │ │ ldr r0, [r0, #108] @ 0x6c │ │ add.w sl, fp, r1, lsl #3 │ │ strd sl, ip, [sp, #24] │ │ cmp r0, #0 │ │ - beq.n 458d8 │ │ + beq.n 45be0 │ │ add.w r6, fp, #48 @ 0x30 │ │ movs r4, #0 │ │ mov fp, ip │ │ - b.n 4587c │ │ + b.n 45b84 │ │ mov.w r9, #0 │ │ add.w r0, r4, r4, lsl #1 │ │ ldr r1, [sp, #28] │ │ movs r2, #24 │ │ add.w r6, r1, r0, lsl #3 │ │ mov r0, r5 │ │ mov r1, r6 │ │ - bl d53c2 │ │ + bl d51f6 │ │ mov r0, fp │ │ mov ip, r4 │ │ ldmia.w r0, {r1, r2, r3, r4, r5, r7} │ │ mvn.w r0, r9 │ │ lsls r0, r0, #24 │ │ stmia r6!, {r1, r2, r3, r4, r5, r7} │ │ add.w r6, fp, #24 │ │ mov r4, ip │ │ it eq │ │ addeq r4, #1 │ │ cmp r6, sl │ │ - bcs.n 45906 │ │ + bcs.n 45c0e │ │ ldr r0, [sp, #36] @ 0x24 │ │ mov r5, fp │ │ mov fp, r6 │ │ ldr r1, [r0, #0] │ │ ldr r0, [r1, #108] @ 0x6c │ │ cmp r0, #0 │ │ - beq.n 45846 │ │ + beq.n 45b4e │ │ add.w r0, r0, r0, lsl #1 │ │ ldr r6, [r1, #104] @ 0x68 │ │ add.w sl, r5, #32 │ │ lsls r7, r0, #4 │ │ ldrb.w r3, [r6, #32] │ │ mov r0, sl │ │ ldr r2, [r6, #28] │ │ mov r1, r8 │ │ - bl 452a4 │ │ + bl 455ac │ │ mov r9, r0 │ │ lsls r0, r0, #24 │ │ - bne.n 458ba │ │ + bne.n 45bc2 │ │ adds r6, #48 @ 0x30 │ │ subs r7, #48 @ 0x30 │ │ - bne.n 45896 │ │ + bne.n 45b9e │ │ mov.w r9, #0 │ │ ldr.w sl, [sp, #24] │ │ - b.n 4584a │ │ + b.n 45b52 │ │ ldr.w sl, [sp, #24] │ │ ldrb.w r0, [r6, #40] @ 0x28 │ │ cmp r0, #0 │ │ - beq.n 4584a │ │ + beq.n 45b52 │ │ mvn.w r0, r9 │ │ mov.w r9, #4294967295 @ 0xffffffff │ │ lsls r0, r0, #24 │ │ it eq │ │ moveq.w r9, #1 │ │ - b.n 4584a │ │ + b.n 45b52 │ │ mov r5, ip │ │ mov r9, ip │ │ mov r0, r5 │ │ mov r1, r9 │ │ movs r2, #24 │ │ - bl d53c2 │ │ + bl d51f6 │ │ add.w fp, r5, #24 │ │ mov ip, r9 │ │ mov r1, fp │ │ ldmia.w r1, {r0, r2, r3, r4, r6, r7} │ │ stmia.w ip, {r0, r2, r3, r4, r6, r7} │ │ add.w r0, r5, #48 @ 0x30 │ │ mov r5, fp │ │ cmp r0, sl │ │ - bcc.n 458dc │ │ + bcc.n 45be4 │ │ add.w r6, fp, #24 │ │ movs r4, #0 │ │ ldr r0, [sp, #36] @ 0x24 │ │ ldr r0, [r0, #0] │ │ ldr r0, [r0, #108] @ 0x6c │ │ cmp r0, #0 │ │ - bne.n 459dc │ │ + bne.n 45ce4 │ │ str r4, [sp, #36] @ 0x24 │ │ add.w r0, r4, r4, lsl #1 │ │ ldr r1, [sp, #28] │ │ add.w r9, sp, #40 @ 0x28 │ │ add.w r8, r1, r0, lsl #3 │ │ mov r0, fp │ │ mov r1, r8 │ │ movs r2, #24 │ │ - bl d53c2 │ │ + bl d51f6 │ │ mov ip, r6 │ │ cmp r6, sl │ │ it eq │ │ moveq ip, r9 │ │ ldmia.w ip, {r0, r2, r3, r4, r5, r7} │ │ mov r1, r8 │ │ mov fp, r6 │ │ stmia r1!, {r0, r2, r3, r4, r5, r7} │ │ add.w r0, r6, #24 │ │ mov r6, r0 │ │ - bne.n 45920 │ │ + bne.n 45c28 │ │ ldr r4, [sp, #36] @ 0x24 │ │ ldr.w sl, [sp, #20] │ │ cmp r4, sl │ │ - bcs.w 45cc8 │ │ + bcs.w 45fd0 │ │ ldr.w fp, [sp, #16] │ │ mov r8, r4 │ │ add r1, sp, #40 @ 0x28 │ │ mov r0, fp │ │ ldmia.w r0, {r2, r3, r4, r5, r6, r7} │ │ add.w r0, r8, r8, lsl #1 │ │ add.w r9, fp, r0, lsl #3 │ │ mov r0, fp │ │ stmia r1!, {r2, r3, r4, r5, r6, r7} │ │ movs r2, #24 │ │ mov r1, r9 │ │ - bl d53c2 │ │ + bl d51f6 │ │ add r1, sp, #40 @ 0x28 │ │ mov r0, r9 │ │ ldmia.w r1, {r2, r3, r4, r5, r6, r7} │ │ mov r1, r8 │ │ stmia r0!, {r2, r3, r4, r5, r6, r7} │ │ ldr r0, [sp, #32] │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ ldrd r5, r2, [sp, #8] │ │ mov r3, r5 │ │ - bl 45600 │ │ + bl 45908 │ │ mvn.w r0, r8 │ │ add sl, r0 │ │ add.w r4, r9, #24 │ │ str.w r9, [sp, #12] │ │ cmp.w sl, #33 @ 0x21 │ │ - bcs.w 45628 │ │ - b.n 45614 │ │ + bcs.w 45930 │ │ + b.n 4591c │ │ movs r5, #0 │ │ add.w r0, r4, r4, lsl #1 │ │ ldr r1, [sp, #28] │ │ movs r2, #24 │ │ add.w r6, r1, r0, lsl #3 │ │ mov r0, fp │ │ mov r1, r6 │ │ - bl d53c2 │ │ + bl d51f6 │ │ mov ip, r4 │ │ ldmia.w sl, {r0, r1, r2, r3, r4, r7} │ │ mov fp, r9 │ │ stmia r6!, {r0, r1, r2, r3, r4, r7} │ │ mvns r0, r5 │ │ mov r4, ip │ │ lsls r0, r0, #24 │ │ it eq │ │ addeq r4, #1 │ │ ldr.w sl, [sp, #24] │ │ add.w r6, r9, #24 │ │ cmp r9, sl │ │ - beq.n 45946 │ │ + beq.n 45c4e │ │ ldr r0, [sp, #36] @ 0x24 │ │ cmp r6, sl │ │ mov r9, r6 │ │ mov sl, r6 │ │ add r2, sp, #40 @ 0x28 │ │ ldr r1, [r0, #0] │ │ ldr r0, [r1, #108] @ 0x6c │ │ it eq │ │ moveq sl, r2 │ │ cmp r0, #0 │ │ - beq.n 459a6 │ │ + beq.n 45cae │ │ add.w r0, r0, r0, lsl #1 │ │ ldr r7, [r1, #104] @ 0x68 │ │ add.w r6, sl, #8 │ │ lsls r5, r0, #4 │ │ ldrb.w r3, [r7, #32] │ │ mov r0, r6 │ │ ldr r2, [r7, #28] │ │ mov r1, r8 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 45a18 │ │ + bne.n 45d20 │ │ adds r7, #48 @ 0x30 │ │ subs r5, #48 @ 0x30 │ │ - bne.n 459fe │ │ - b.n 459a6 │ │ + bne.n 45d06 │ │ + b.n 45cae │ │ ldrb.w r1, [r7, #40] @ 0x28 │ │ - cbz r1, 45a2c │ │ + cbz r1, 45d34 │ │ mvns r0, r0 │ │ mov.w r5, #4294967295 @ 0xffffffff │ │ lsls r0, r0, #24 │ │ it eq │ │ moveq r5, #1 │ │ - b.n 459a8 │ │ + b.n 45cb0 │ │ mov r5, r0 │ │ - b.n 459a8 │ │ + b.n 45cb0 │ │ mvns r0, r0 │ │ lsls r0, r0, #24 │ │ - beq.w 457e4 │ │ + beq.w 45aec │ │ mov r0, fp │ │ add.w r8, sp, #40 @ 0x28 │ │ ldmia.w r0, {r2, r3, r4, r5, r6, r7} │ │ mov r0, fp │ │ mov r1, r8 │ │ stmia r1!, {r2, r3, r4, r5, r6, r7} │ │ mov r1, r9 │ │ movs r2, #24 │ │ - bl d53c2 │ │ + bl d51f6 │ │ mov r0, r8 │ │ ldmia.w r0, {r1, r2, r3, r5, r6, r7} │ │ stmia.w r9, {r1, r2, r3, r5, r6, r7} │ │ add.w r9, fp, #24 │ │ mov r1, r8 │ │ mov r0, r9 │ │ add.w r8, fp, #8 │ │ @@ -44254,257 +44447,257 @@ │ │ ldr r0, [sp, #32] │ │ add.w r1, fp, r1, lsl #3 │ │ str r1, [sp, #36] @ 0x24 │ │ ldr r0, [r0, #0] │ │ ldr r0, [r0, #0] │ │ ldr r0, [r0, #108] @ 0x6c │ │ cmp r0, #0 │ │ - beq.n 45b16 │ │ + beq.n 45e1e │ │ add.w r7, fp, #48 @ 0x30 │ │ mov.w fp, #0 │ │ mov lr, r9 │ │ - b.n 45ac8 │ │ + b.n 45dd0 │ │ movs r4, #0 │ │ add.w r0, fp, fp, lsl #1 │ │ mov sl, r9 │ │ movs r2, #24 │ │ add.w r9, r9, r0, lsl #3 │ │ mov r0, r5 │ │ mov r1, r9 │ │ - bl d53c2 │ │ + bl d51f6 │ │ ldr.w lr, [sp, #28] │ │ mov r0, lr │ │ ldmia.w r0, {r1, r2, r3, r5, r6, r7} │ │ mvns r0, r4 │ │ lsls r0, r0, #24 │ │ stmia.w r9, {r1, r2, r3, r5, r6, r7} │ │ it ne │ │ addne.w fp, fp, #1 │ │ add.w r7, lr, #24 │ │ ldr r4, [sp, #36] @ 0x24 │ │ mov r9, sl │ │ cmp r7, r4 │ │ - bcs.n 45b48 │ │ + bcs.n 45e50 │ │ str r7, [sp, #28] │ │ mov r5, lr │ │ ldr r0, [sp, #32] │ │ ldr r0, [r0, #0] │ │ ldr r1, [r0, #0] │ │ ldr r0, [r1, #108] @ 0x6c │ │ cmp r0, #0 │ │ - beq.n 45a8e │ │ + beq.n 45d96 │ │ add.w r0, r0, r0, lsl #1 │ │ ldr r6, [r1, #104] @ 0x68 │ │ add.w r7, r5, #32 │ │ lsls r4, r0, #4 │ │ ldrb.w r3, [r6, #32] │ │ mov r0, r8 │ │ ldr r2, [r6, #28] │ │ mov r1, r7 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 45afe │ │ + bne.n 45e06 │ │ adds r6, #48 @ 0x30 │ │ subs r4, #48 @ 0x30 │ │ - bne.n 45ae4 │ │ - b.n 45a8e │ │ + bne.n 45dec │ │ + b.n 45d96 │ │ ldrb.w r1, [r6, #40] @ 0x28 │ │ - cbz r1, 45b12 │ │ + cbz r1, 45e1a │ │ mvns r0, r0 │ │ mov.w r4, #4294967295 @ 0xffffffff │ │ lsls r0, r0, #24 │ │ it eq │ │ moveq r4, #1 │ │ - b.n 45a90 │ │ + b.n 45d98 │ │ mov r4, r0 │ │ - b.n 45a90 │ │ + b.n 45d98 │ │ mov.w fp, #0 │ │ mov r6, r9 │ │ mov r0, r6 │ │ mov r1, r6 │ │ movs r2, #24 │ │ - bl d53c2 │ │ + bl d51f6 │ │ add.w lr, r6, #24 │ │ mov r1, r6 │ │ add.w fp, fp, #1 │ │ mov ip, lr │ │ ldmia.w ip, {r0, r2, r3, r4, r5, r7} │ │ stmia r1!, {r0, r2, r3, r4, r5, r7} │ │ add.w r0, r6, #48 @ 0x30 │ │ mov r6, lr │ │ ldr r4, [sp, #36] @ 0x24 │ │ cmp r0, r4 │ │ - bcc.n 45b1c │ │ + bcc.n 45e24 │ │ add.w r7, lr, #24 │ │ ldr r0, [sp, #32] │ │ ldr r0, [r0, #0] │ │ ldr r0, [r0, #0] │ │ ldr r0, [r0, #108] @ 0x6c │ │ cmp r0, #0 │ │ - beq.n 45c08 │ │ + beq.n 45f10 │ │ add.w sl, sp, #40 @ 0x28 │ │ str.w r9, [sp, #24] │ │ - b.n 45b96 │ │ + b.n 45e9e │ │ mov.w r9, #0 │ │ add.w r0, fp, fp, lsl #1 │ │ ldr r1, [sp, #24] │ │ movs r2, #24 │ │ add.w r6, r1, r0, lsl #3 │ │ mov r0, lr │ │ mov r1, r6 │ │ - bl d53c2 │ │ + bl d51f6 │ │ ldmia.w r7, {r0, r1, r2, r3, r4, r5} │ │ stmia r6!, {r0, r1, r2, r3, r4, r5} │ │ mvn.w r0, r9 │ │ lsls r0, r0, #24 │ │ it ne │ │ addne.w fp, fp, #1 │ │ ldr.w lr, [sp, #28] │ │ ldr r4, [sp, #36] @ 0x24 │ │ add.w r7, lr, #24 │ │ cmp lr, r4 │ │ - beq.n 45c48 │ │ + beq.n 45f50 │ │ ldr r0, [sp, #32] │ │ mov r5, r7 │ │ cmp r7, r4 │ │ ldr r0, [r0, #0] │ │ ldr r1, [r0, #0] │ │ ldr r0, [r1, #108] @ 0x6c │ │ it eq │ │ moveq r7, sl │ │ str r5, [sp, #28] │ │ cmp r0, #0 │ │ - beq.n 45b5e │ │ + beq.n 45e66 │ │ add.w r0, r0, r0, lsl #1 │ │ ldr.w sl, [r1, #104] @ 0x68 │ │ add.w r6, r7, #8 │ │ mov r4, lr │ │ mov.w r9, r0, lsl #4 │ │ ldrb.w r3, [sl, #32] │ │ mov r0, r8 │ │ ldr.w r2, [sl, #28] │ │ mov r1, r6 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 45be8 │ │ + bne.n 45ef0 │ │ add.w sl, sl, #48 @ 0x30 │ │ subs.w r9, r9, #48 @ 0x30 │ │ - bne.n 45bbe │ │ + bne.n 45ec6 │ │ mov.w r9, #0 │ │ add.w sl, sp, #40 @ 0x28 │ │ mov lr, r4 │ │ - b.n 45b62 │ │ + b.n 45e6a │ │ ldrb.w r1, [sl, #40] @ 0x28 │ │ mov lr, r4 │ │ - cbz r1, 45c00 │ │ + cbz r1, 45f08 │ │ mvns r0, r0 │ │ mov.w r9, #4294967295 @ 0xffffffff │ │ lsls r0, r0, #24 │ │ it eq │ │ moveq.w r9, #1 │ │ - b.n 45c02 │ │ + b.n 45f0a │ │ mov r9, r0 │ │ add.w sl, sp, #40 @ 0x28 │ │ - b.n 45b62 │ │ + b.n 45e6a │ │ add.w r0, fp, fp, lsl #1 │ │ ldr r1, [sp, #16] │ │ add.w r9, sp, #40 @ 0x28 │ │ add.w r0, r1, r0, lsl #3 │ │ add.w r8, r0, #24 │ │ mov r0, lr │ │ mov r1, r8 │ │ movs r2, #24 │ │ - bl d53c2 │ │ + bl d51f6 │ │ mov ip, r7 │ │ cmp r7, r4 │ │ it eq │ │ moveq ip, r9 │ │ ldmia.w ip, {r0, r2, r3, r4, r5, r6} │ │ mov r1, r8 │ │ add.w r8, r8, #24 │ │ add.w fp, fp, #1 │ │ stmia r1!, {r0, r2, r3, r4, r5, r6} │ │ add.w r0, r7, #24 │ │ mov lr, r7 │ │ ldr r4, [sp, #36] @ 0x24 │ │ mov r7, r0 │ │ - bne.n 45c1a │ │ + bne.n 45f22 │ │ ldr.w sl, [sp, #20] │ │ cmp fp, sl │ │ - bcs.n 45cc8 │ │ + bcs.n 45fd0 │ │ ldr r0, [sp, #16] │ │ add.w r9, sp, #40 @ 0x28 │ │ mov r1, r9 │ │ mov ip, r0 │ │ ldmia.w ip, {r2, r3, r4, r5, r6, r7} │ │ stmia r1!, {r2, r3, r4, r5, r6, r7} │ │ add.w r1, fp, fp, lsl #1 │ │ movs r2, #24 │ │ add.w r8, r0, r1, lsl #3 │ │ mov r1, r8 │ │ - bl d53c2 │ │ + bl d51f6 │ │ mov r1, r9 │ │ mov r0, r8 │ │ ldmia.w r1, {r2, r3, r4, r5, r6, r7} │ │ stmia r0!, {r2, r3, r4, r5, r6, r7} │ │ mvn.w r0, fp │ │ add sl, r0 │ │ movs r0, #0 │ │ add.w r4, r8, #24 │ │ str r0, [sp, #12] │ │ ldr r5, [sp, #8] │ │ cmp.w sl, #33 @ 0x21 │ │ - bcs.w 45628 │ │ - b.n 45614 │ │ + bcs.w 45930 │ │ + b.n 4591c │ │ ldr r1, [sp, #36] @ 0x24 │ │ mvns r0, r0 │ │ uxtb r0, r0 │ │ clz r0, r0 │ │ mvns r2, r1 │ │ uxtb r2, r2 │ │ lsrs r0, r0, #5 │ │ clz r2, r2 │ │ lsrs r2, r2, #5 │ │ eors r2, r0 │ │ ldr r4, [sp, #16] │ │ mov r0, r4 │ │ - bne.w 45782 │ │ - b.n 45710 │ │ + bne.w 45a8a │ │ + b.n 45a18 │ │ ldr r0, [sp, #32] │ │ mov r1, sl │ │ ldr r2, [r0, #0] │ │ mov r0, r4 │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w 46146 │ │ + b.w 4644e │ │ udf #254 @ 0xfe │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ subw sp, sp, #1220 @ 0x4c4 │ │ movs.w lr, r1, lsr #1 │ │ str r2, [sp, #28] │ │ - beq.w 45f6c │ │ + beq.w 46274 │ │ add.w r8, sp, #40 @ 0x28 │ │ mov r9, r1 │ │ cmp r1, #8 │ │ strd lr, r0, [sp, #16] │ │ - bcc.n 45d14 │ │ + bcc.n 4601c │ │ ldr r4, [sp, #28] │ │ mov r1, r8 │ │ mov r2, r4 │ │ - bl 46484 │ │ + bl 4678c │ │ ldr r0, [sp, #16] │ │ mov r2, r4 │ │ add.w r1, r0, r0, lsl #1 │ │ ldr r0, [sp, #20] │ │ add.w r0, r0, r1, lsl #3 │ │ add.w r1, r8, r1, lsl #3 │ │ - bl 46484 │ │ + bl 4678c │ │ ldrd lr, r0, [sp, #16] │ │ mov.w sl, #4 │ │ - b.n 45d36 │ │ + b.n 4603e │ │ mov r1, r0 │ │ mov ip, r8 │ │ ldmia.w r1, {r2, r3, r4, r5, r6, r7} │ │ mov.w sl, #1 │ │ stmia.w ip, {r2, r3, r4, r5, r6, r7} │ │ add.w r2, lr, lr, lsl #1 │ │ add.w ip, r0, r2, lsl #3 │ │ @@ -44521,63 +44714,63 @@ │ │ str r1, [sp, #8] │ │ add.w r1, sp, #1192 @ 0x4a8 │ │ add.w r9, r1, #8 │ │ sub.w r1, sl, sl, lsl #2 │ │ str r2, [sp, #36] @ 0x24 │ │ mov.w r1, r1, lsl #3 │ │ str r1, [sp, #4] │ │ - bcs.n 45d88 │ │ + bcs.n 46090 │ │ ldr r1, [sp, #28] │ │ ldr r1, [r1, #0] │ │ ldr r1, [r1, #108] @ 0x6c │ │ - cbz r1, 45d72 │ │ + cbz r1, 4607a │ │ mov fp, sl │ │ - b.n 45f96 │ │ + b.n 4629e │ │ add.w r0, lr, lr, lsl #1 │ │ ldr r1, [sp, #4] │ │ add.w r2, r1, r0, lsl #3 │ │ ldr r0, [sp, #8] │ │ ldr r1, [sp, #36] @ 0x24 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr.w lr, [sp, #16] │ │ ldr.w fp, [sp, #24] │ │ add.w r1, lr, lr, lsl #1 │ │ add.w r0, r8, r1, lsl #3 │ │ cmp sl, fp │ │ str r0, [sp, #32] │ │ - bcs.n 45dc6 │ │ + bcs.n 460ce │ │ ldr r0, [sp, #28] │ │ ldr r0, [r0, #0] │ │ ldr r0, [r0, #108] @ 0x6c │ │ - cbz r0, 45dac │ │ + cbz r0, 460b4 │ │ ldr r0, [sp, #20] │ │ add.w r0, r0, r1, lsl #3 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n 4607a │ │ + b.n 46382 │ │ ldr r0, [sp, #8] │ │ ldr r2, [sp, #36] @ 0x24 │ │ add.w r0, r0, r1, lsl #3 │ │ ldr r3, [sp, #4] │ │ add.w r1, r2, r1, lsl #3 │ │ add.w r2, fp, fp, lsl #1 │ │ add.w r2, r3, r2, lsl #3 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr r0, [sp, #12] │ │ mvn.w r1, #23 │ │ ldr.w lr, [sp, #20] │ │ add.w r8, sp, #40 @ 0x28 │ │ mov.w r9, #0 │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r0, r1, r0, lsl #3 │ │ add.w fp, lr, r0 │ │ add r0, r8 │ │ str r0, [sp, #24] │ │ ldr r0, [sp, #32] │ │ sub.w sl, r0, #24 │ │ - b.n 45e4a │ │ + b.n 46152 │ │ movs r0, #0 │ │ ldr.w r8, [sp, #24] │ │ uxtb.w ip, r0 │ │ cmp.w ip, #255 @ 0xff │ │ mov r2, fp │ │ add.w r9, r9, #1 │ │ add.w lr, lr, #24 │ │ @@ -44597,47 +44790,47 @@ │ │ movne.w r0, #4294967295 @ 0xffffffff │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r8, r8, r0, lsl #3 │ │ str.w r8, [sp, #24] │ │ ldr.w r8, [sp, #36] @ 0x24 │ │ ldr r0, [sp, #16] │ │ cmp r9, r0 │ │ - beq.n 45f36 │ │ + beq.n 4623e │ │ ldr r0, [sp, #28] │ │ ldr r1, [r0, #0] │ │ ldr r0, [r1, #108] @ 0x6c │ │ - cbz r0, 45e92 │ │ + cbz r0, 4619a │ │ mov r2, r8 │ │ ldr.w r8, [r1, #104] @ 0x68 │ │ ldr r1, [sp, #32] │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r4, r2, #8 │ │ mov r7, lr │ │ add.w r6, r1, #8 │ │ lsls r5, r0, #4 │ │ str r2, [sp, #36] @ 0x24 │ │ ldrb.w r3, [r8, #32] │ │ mov r0, r6 │ │ ldr.w r2, [r8, #28] │ │ mov r1, r4 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 45e96 │ │ + bne.n 4619e │ │ add.w r8, r8, #48 @ 0x30 │ │ subs r5, #48 @ 0x30 │ │ - bne.n 45e6c │ │ + bne.n 46174 │ │ movs r0, #0 │ │ ldr.w r8, [sp, #36] @ 0x24 │ │ mov lr, r7 │ │ - b.n 45eae │ │ + b.n 461b6 │ │ movs r0, #0 │ │ - b.n 45eae │ │ + b.n 461b6 │ │ ldrb.w r1, [r8, #40] @ 0x28 │ │ mov lr, r7 │ │ - cbz r1, 45eaa │ │ + cbz r1, 461b2 │ │ mvns r0, r0 │ │ lsls r0, r0, #24 │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ it eq │ │ moveq r0, #1 │ │ ldr.w r8, [sp, #36] @ 0x24 │ │ uxtb r0, r0 │ │ @@ -44655,49 +44848,49 @@ │ │ addeq.w ip, ip, #24 │ │ str.w ip, [sp, #32] │ │ it ne │ │ addne.w r8, r8, #24 │ │ str.w r8, [sp, #36] @ 0x24 │ │ ldr r1, [r0, #108] @ 0x6c │ │ cmp r1, #0 │ │ - beq.w 45df0 │ │ + beq.w 460f8 │ │ ldr r5, [r0, #104] @ 0x68 │ │ add.w r4, sl, #8 │ │ ldr r0, [sp, #24] │ │ str.w lr, [sp, #20] │ │ add.w r6, r0, #8 │ │ add.w r0, r1, r1, lsl #1 │ │ lsls r7, r0, #4 │ │ ldrb.w r3, [r5, #32] │ │ mov r0, r6 │ │ ldr r2, [r5, #28] │ │ mov r1, r4 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 45f1a │ │ + bne.n 46222 │ │ adds r5, #48 @ 0x30 │ │ subs r7, #48 @ 0x30 │ │ - bne.n 45efa │ │ + bne.n 46202 │ │ movs r0, #0 │ │ ldr.w lr, [sp, #20] │ │ - b.n 45df2 │ │ + b.n 460fa │ │ ldr.w lr, [sp, #20] │ │ ldrb.w r1, [r5, #40] @ 0x28 │ │ cmp r1, #0 │ │ - beq.w 45df2 │ │ + beq.w 460fa │ │ mvns r0, r0 │ │ lsls r0, r0, #24 │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ it eq │ │ moveq r0, #1 │ │ - b.n 45df2 │ │ + b.n 460fa │ │ ldr r1, [sp, #12] │ │ add.w ip, sl, #24 │ │ lsls r1, r1, #31 │ │ - beq.n 45f5c │ │ + beq.n 46264 │ │ ldr r0, [sp, #32] │ │ cmp r8, ip │ │ mov r1, r0 │ │ it cc │ │ movcc r1, r8 │ │ ldmia.w r1, {r2, r3, r4, r5, r6, r7} │ │ stmia.w lr, {r2, r3, r4, r5, r6, r7} │ │ @@ -44707,284 +44900,284 @@ │ │ str r0, [sp, #32] │ │ cmp r8, ip │ │ itttt eq │ │ ldreq r0, [sp, #24] │ │ addeq r0, #24 │ │ ldreq r1, [sp, #32] │ │ cmpeq r1, r0 │ │ - bne.w 46142 │ │ + bne.w 4644a │ │ addw sp, sp, #1220 @ 0x4c4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add r7, sp, #40 @ 0x28 │ │ add.w r0, sp, #1192 @ 0x4a8 │ │ mov r4, r7 │ │ ldmia.w r0, {r1, r2, r3, r5, r6, r7} │ │ stmia r4!, {r1, r2, r3, r5, r6, r7} │ │ ldr.w lr, [sp, #16] │ │ add.w fp, fp, #1 │ │ ldr r0, [sp, #20] │ │ add.w r8, sp, #40 @ 0x28 │ │ cmp fp, lr │ │ - beq.w 45d88 │ │ + beq.w 46090 │ │ add.w r2, fp, fp, lsl #1 │ │ add.w r1, r0, r2, lsl #3 │ │ add.w r8, r8, r2, lsl #3 │ │ ldmia.w r1, {r2, r3, r4, r5, r6, r7} │ │ mov r0, r8 │ │ stmia r0!, {r2, r3, r4, r5, r6, r7} │ │ ldr r0, [sp, #28] │ │ ldr r1, [r0, #0] │ │ ldr r0, [r1, #108] @ 0x6c │ │ cmp r0, #0 │ │ - beq.n 45f82 │ │ + beq.n 4628a │ │ add.w r0, r0, r0, lsl #1 │ │ ldr r6, [r1, #104] @ 0x68 │ │ sub.w r7, r8, #16 │ │ add.w r4, r8, #8 │ │ lsls r5, r0, #4 │ │ ldrb.w r3, [r6, #32] │ │ mov r0, r4 │ │ ldr r2, [r6, #28] │ │ mov r1, r7 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 45fde │ │ + bne.n 462e6 │ │ adds r6, #48 @ 0x30 │ │ subs r5, #48 @ 0x30 │ │ - bne.n 45fc4 │ │ - b.n 45f82 │ │ + bne.n 462cc │ │ + b.n 4628a │ │ ldrb.w r1, [r6, #40] @ 0x28 │ │ - cbz r1, 45fec │ │ + cbz r1, 462f4 │ │ uxtb r0, r0 │ │ cmp r0, #1 │ │ - bne.n 45f82 │ │ - b.n 45ff2 │ │ + bne.n 4628a │ │ + b.n 462fa │ │ mvns r0, r0 │ │ lsls r0, r0, #24 │ │ - bne.n 45f82 │ │ + bne.n 4628a │ │ mov r0, r8 │ │ add.w r1, sp, #1192 @ 0x4a8 │ │ ldmia.w r0, {r2, r3, r4, r5, r6, r7} │ │ stmia r1!, {r2, r3, r4, r5, r6, r7} │ │ sub.w ip, r8, #24 │ │ mov r0, r8 │ │ mov r1, ip │ │ ldmia.w r1, {r2, r3, r4, r5, r6, r7} │ │ stmia r0!, {r2, r3, r4, r5, r6, r7} │ │ add r0, sp, #40 @ 0x28 │ │ cmp ip, r0 │ │ - beq.n 45f74 │ │ + beq.n 4627c │ │ ldr r0, [sp, #28] │ │ mov r7, ip │ │ ldr r1, [r0, #0] │ │ ldr r0, [r1, #108] @ 0x6c │ │ cmp r0, #0 │ │ - beq.n 45f76 │ │ + beq.n 4627e │ │ add.w r0, r0, r0, lsl #1 │ │ ldr r6, [r1, #104] @ 0x68 │ │ sub.w r4, r8, #40 @ 0x28 │ │ lsls r5, r0, #4 │ │ ldrb.w r3, [r6, #32] │ │ mov r0, r9 │ │ ldr r2, [r6, #28] │ │ mov r1, r4 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 46044 │ │ + bne.n 4634c │ │ adds r6, #48 @ 0x30 │ │ subs r5, #48 @ 0x30 │ │ - bne.n 4602a │ │ - b.n 45f76 │ │ + bne.n 46332 │ │ + b.n 4627e │ │ ldrb.w r1, [r6, #40] @ 0x28 │ │ - cbz r1, 46052 │ │ + cbz r1, 4635a │ │ uxtb r0, r0 │ │ cmp r0, #1 │ │ - bne.n 45f76 │ │ + bne.n 4627e │ │ movs r0, #255 @ 0xff │ │ mvns r0, r0 │ │ mov r8, r7 │ │ lsls r0, r0, #24 │ │ - beq.n 45ffe │ │ - b.n 45f76 │ │ + beq.n 46306 │ │ + b.n 4627e │ │ ldr.w fp, [sp, #32] │ │ add.w r0, sp, #1192 @ 0x4a8 │ │ ldmia.w r0, {r1, r2, r3, r5, r6, r7} │ │ stmia.w fp, {r1, r2, r3, r5, r6, r7} │ │ ldr.w fp, [sp, #24] │ │ add.w sl, sl, #1 │ │ cmp sl, fp │ │ - beq.w 45dc6 │ │ + beq.w 460ce │ │ add.w r0, sl, sl, lsl #1 │ │ ldr r1, [sp, #36] @ 0x24 │ │ ldr r2, [sp, #32] │ │ add.w r1, r1, r0, lsl #3 │ │ add.w r8, r2, r0, lsl #3 │ │ ldmia.w r1, {r2, r3, r4, r5, r6, r7} │ │ mov r0, r8 │ │ stmia r0!, {r2, r3, r4, r5, r6, r7} │ │ ldr r0, [sp, #28] │ │ ldr r1, [r0, #0] │ │ ldr r0, [r1, #108] @ 0x6c │ │ cmp r0, #0 │ │ - beq.n 46070 │ │ + beq.n 46378 │ │ add.w r0, r0, r0, lsl #1 │ │ ldr r6, [r1, #104] @ 0x68 │ │ sub.w r7, r8, #16 │ │ add.w r4, r8, #8 │ │ lsls r5, r0, #4 │ │ ldrb.w r3, [r6, #32] │ │ mov r0, r4 │ │ ldr r2, [r6, #28] │ │ mov r1, r7 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 460c6 │ │ + bne.n 463ce │ │ adds r6, #48 @ 0x30 │ │ subs r5, #48 @ 0x30 │ │ - bne.n 460ac │ │ - b.n 46070 │ │ + bne.n 463b4 │ │ + b.n 46378 │ │ ldrb.w r1, [r6, #40] @ 0x28 │ │ - cbz r1, 460d4 │ │ + cbz r1, 463dc │ │ uxtb r0, r0 │ │ cmp r0, #1 │ │ - bne.n 46070 │ │ - b.n 460da │ │ + bne.n 46378 │ │ + b.n 463e2 │ │ mvns r0, r0 │ │ lsls r0, r0, #24 │ │ - bne.n 46070 │ │ + bne.n 46378 │ │ mov r0, r8 │ │ add.w r1, sp, #1192 @ 0x4a8 │ │ ldmia.w r0, {r2, r3, r4, r5, r6, r7} │ │ stmia r1!, {r2, r3, r4, r5, r6, r7} │ │ sub.w fp, r8, #24 │ │ mov r1, r8 │ │ mov r0, fp │ │ ldmia.w r0, {r2, r3, r4, r5, r6, r7} │ │ stmia r1!, {r2, r3, r4, r5, r6, r7} │ │ ldr r0, [sp, #32] │ │ cmp fp, r0 │ │ - beq.n 4605c │ │ + beq.n 46364 │ │ ldr r0, [sp, #28] │ │ ldr r1, [r0, #0] │ │ ldr r0, [r1, #108] @ 0x6c │ │ cmp r0, #0 │ │ - beq.n 46060 │ │ + beq.n 46368 │ │ add.w r0, r0, r0, lsl #1 │ │ ldr r6, [r1, #104] @ 0x68 │ │ sub.w r4, r8, #40 @ 0x28 │ │ lsls r5, r0, #4 │ │ ldrb.w r3, [r6, #32] │ │ mov r0, r9 │ │ ldr r2, [r6, #28] │ │ mov r1, r4 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 4612a │ │ + bne.n 46432 │ │ adds r6, #48 @ 0x30 │ │ subs r5, #48 @ 0x30 │ │ - bne.n 46110 │ │ - b.n 46060 │ │ + bne.n 46418 │ │ + b.n 46368 │ │ ldrb.w r1, [r6, #40] @ 0x28 │ │ - cbz r1, 46138 │ │ + cbz r1, 46440 │ │ uxtb r0, r0 │ │ cmp r0, #1 │ │ - bne.n 46060 │ │ + bne.n 46368 │ │ movs r0, #255 @ 0xff │ │ mvns r0, r0 │ │ mov r8, fp │ │ lsls r0, r0, #24 │ │ - beq.n 460e6 │ │ - b.n 46060 │ │ - bl 413cc │ │ + beq.n 463ee │ │ + b.n 46368 │ │ + bl 416d4 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #44 @ 0x2c │ │ add.w fp, r1, r1, lsr #1 │ │ mov r8, r1 │ │ str r2, [sp, #4] │ │ str r0, [sp, #8] │ │ str r1, [sp, #0] │ │ - b.n 46166 │ │ + b.n 4646e │ │ ldr.w r8, [sp] │ │ cmp.w fp, #0 │ │ - beq.w 462e0 │ │ + beq.w 465e8 │ │ sub.w fp, fp, #1 │ │ cmp fp, r8 │ │ - bcs.n 4619e │ │ + bcs.n 464a6 │ │ ldr r0, [sp, #8] │ │ add.w r9, sp, #16 │ │ mov ip, r9 │ │ mov r1, r0 │ │ ldmia.w r1, {r2, r3, r4, r5, r6, r7} │ │ add.w r1, fp, fp, lsl #1 │ │ stmia.w ip, {r2, r3, r4, r5, r6, r7} │ │ add.w r4, r0, r1, lsl #3 │ │ movs r2, #24 │ │ mov r1, r4 │ │ - bl d53c2 │ │ + bl d51f6 │ │ mov r0, r9 │ │ mov.w r9, #0 │ │ ldmia.w r0, {r1, r2, r3, r5, r6, r7} │ │ stmia r4!, {r1, r2, r3, r5, r6, r7} │ │ - b.n 461a2 │ │ + b.n 464aa │ │ sub.w r9, fp, r8 │ │ mov r1, fp │ │ cmp r8, fp │ │ it cc │ │ movcc r1, r8 │ │ mov.w r0, r9, lsl #1 │ │ add.w r8, r0, #1 │ │ str r1, [sp, #12] │ │ cmp r8, r1 │ │ - bcs.n 4615a │ │ + bcs.n 46462 │ │ ldr r1, [sp, #4] │ │ adds r2, r0, #2 │ │ ldr r0, [sp, #12] │ │ ldr r1, [r1, #0] │ │ cmp r2, r0 │ │ - bcs.n 46226 │ │ + bcs.n 4652e │ │ ldr r0, [r1, #108] @ 0x6c │ │ - cbz r0, 46202 │ │ + cbz r0, 4650a │ │ ldr r5, [r1, #104] @ 0x68 │ │ add.w r1, r2, r2, lsl #1 │ │ ldr r2, [sp, #8] │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r1, r2, r1, lsl #3 │ │ lsls r6, r0, #4 │ │ add.w r7, r1, #8 │ │ add.w r1, r8, r8, lsl #1 │ │ add.w r1, r2, r1, lsl #3 │ │ add.w r4, r1, #8 │ │ ldrb.w r3, [r5, #32] │ │ mov r0, r4 │ │ ldr r2, [r5, #28] │ │ mov r1, r7 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 46206 │ │ + bne.n 4650e │ │ adds r5, #48 @ 0x30 │ │ subs r6, #48 @ 0x30 │ │ - bne.n 461ea │ │ + bne.n 464f2 │ │ movs r0, #0 │ │ - b.n 46218 │ │ + b.n 46520 │ │ ldrb.w r1, [r5, #40] @ 0x28 │ │ - cbz r1, 46218 │ │ + cbz r1, 46520 │ │ mvns r0, r0 │ │ lsls r0, r0, #24 │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ it eq │ │ moveq r0, #1 │ │ ldr r1, [sp, #4] │ │ mvns r0, r0 │ │ lsls r0, r0, #24 │ │ ldr r1, [r1, #0] │ │ it eq │ │ addeq.w r8, r8, #1 │ │ ldr r0, [r1, #108] @ 0x6c │ │ cmp r0, #0 │ │ - beq.n 4615a │ │ + beq.n 46462 │ │ ldr r6, [r1, #104] @ 0x68 │ │ add.w r1, r8, r8, lsl #1 │ │ ldr r2, [sp, #8] │ │ mov sl, r8 │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r8, r2, r1, lsl #3 │ │ add.w r1, r9, r9, lsl #1 │ │ @@ -44992,30 +45185,30 @@ │ │ lsls r5, r0, #4 │ │ add.w r9, r2, r1, lsl #3 │ │ add.w r4, r9, #8 │ │ ldrb.w r3, [r6, #32] │ │ mov r0, r4 │ │ ldr r2, [r6, #28] │ │ mov r1, r7 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 4626a │ │ + bne.n 46572 │ │ adds r6, #48 @ 0x30 │ │ subs r5, #48 @ 0x30 │ │ - bne.n 46250 │ │ - b.n 4615a │ │ + bne.n 46558 │ │ + b.n 46462 │ │ ldrb.w r1, [r6, #40] @ 0x28 │ │ - cbz r1, 46278 │ │ + cbz r1, 46580 │ │ uxtb r0, r0 │ │ cmp r0, #1 │ │ - beq.n 46280 │ │ - b.n 4615a │ │ + beq.n 46588 │ │ + b.n 46462 │ │ mvns r0, r0 │ │ lsls r0, r0, #24 │ │ - bne.w 4615a │ │ + bne.w 46462 │ │ ldmia.w r9, {r0, r1, r2, r3} │ │ ldrd r7, r6, [r8] │ │ str.w r0, [r8] │ │ str.w r1, [r8, #4] │ │ ldr.w r0, [r9, #16] │ │ ldr.w r1, [r8, #16] │ │ ldrd r5, r4, [r8, #8] │ │ @@ -45032,145 +45225,145 @@ │ │ ldr r1, [sp, #12] │ │ str.w r7, [r9] │ │ str.w r6, [r9, #4] │ │ cmp r8, r1 │ │ str.w r5, [r9, #8] │ │ str.w r4, [r9, #12] │ │ mov r9, sl │ │ - bcc.w 461b8 │ │ - b.n 4615a │ │ + bcc.w 464c0 │ │ + b.n 46462 │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #12 │ │ ldr.w fp, [sp, #48] @ 0x30 │ │ mov sl, r2 │ │ mov r8, r1 │ │ mov r9, r0 │ │ cmp r3, #8 │ │ - bcc.n 46344 │ │ + bcc.n 4664c │ │ lsrs r4, r3, #3 │ │ movs r5, #168 @ 0xa8 │ │ mla r2, r4, r5, r9 │ │ add.w r6, r4, r4, lsl #1 │ │ mov r0, r9 │ │ add.w r1, r9, r6, lsl #5 │ │ mov r3, r4 │ │ str.w fp, [sp] │ │ - bl 462e6 │ │ + bl 465ee │ │ mla r2, r4, r5, r8 │ │ add.w r1, r8, r6, lsl #5 │ │ mov r9, r0 │ │ mov r0, r8 │ │ mov r3, r4 │ │ str.w fp, [sp] │ │ - bl 462e6 │ │ + bl 465ee │ │ mla r2, r4, r5, sl │ │ add.w r1, sl, r6, lsl #5 │ │ mov r8, r0 │ │ mov r0, sl │ │ mov r3, r4 │ │ str.w fp, [sp] │ │ - bl 462e6 │ │ + bl 465ee │ │ mov sl, r0 │ │ ldr.w r0, [fp] │ │ add.w r7, r8, #8 │ │ add.w r4, r9, #8 │ │ ldr r0, [r0, #0] │ │ ldr r1, [r0, #108] @ 0x6c │ │ - cbz r1, 46376 │ │ + cbz r1, 4667e │ │ ldr r5, [r0, #104] @ 0x68 │ │ add.w r0, r1, r1, lsl #1 │ │ lsls r6, r0, #4 │ │ ldrb.w r3, [r5, #32] │ │ mov r0, r4 │ │ ldr r2, [r5, #28] │ │ mov r1, r7 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 4637a │ │ + bne.n 46682 │ │ adds r5, #48 @ 0x30 │ │ subs r6, #48 @ 0x30 │ │ - bne.n 4635e │ │ + bne.n 46666 │ │ movs r0, #0 │ │ - b.n 4638c │ │ + b.n 46694 │ │ ldrb.w r1, [r5, #40] @ 0x28 │ │ - cbz r1, 4638c │ │ + cbz r1, 46694 │ │ mvns r0, r0 │ │ lsls r0, r0, #24 │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #8] │ │ add.w r5, sl, #8 │ │ ldr.w r0, [fp] │ │ mov r6, fp │ │ str.w sl, [sp, #4] │ │ ldr r0, [r0, #0] │ │ ldr r1, [r0, #108] @ 0x6c │ │ - cbz r1, 463ec │ │ + cbz r1, 466f4 │ │ ldr.w sl, [r0, #104] @ 0x68 │ │ add.w r0, r1, r1, lsl #1 │ │ mov.w fp, r0, lsl #4 │ │ ldrb.w r3, [sl, #32] │ │ mov r0, r4 │ │ ldr.w r2, [sl, #28] │ │ mov r1, r5 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 463ce │ │ + bne.n 466d6 │ │ add.w sl, sl, #48 @ 0x30 │ │ subs.w fp, fp, #48 @ 0x30 │ │ - bne.n 463ae │ │ - b.n 463ec │ │ + bne.n 466b6 │ │ + b.n 466f4 │ │ ldrb.w r1, [sl, #40] @ 0x28 │ │ cmp r1, #0 │ │ - beq.n 46468 │ │ + beq.n 46770 │ │ uxtb r0, r0 │ │ cmp r0, #1 │ │ - bne.n 463ec │ │ + bne.n 466f4 │ │ ldr r1, [sp, #8] │ │ mvns r0, r1 │ │ lsls r0, r0, #24 │ │ - beq.n 463f4 │ │ + beq.n 466fc │ │ mov r0, r9 │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r1, [sp, #8] │ │ mvns r0, r1 │ │ lsls r0, r0, #24 │ │ - beq.n 463e4 │ │ + beq.n 466ec │ │ ldr r0, [r6, #0] │ │ ldr r0, [r0, #0] │ │ ldr r2, [r0, #108] @ 0x6c │ │ - cbz r2, 46426 │ │ + cbz r2, 4672e │ │ ldr r4, [r0, #104] @ 0x68 │ │ add.w r0, r2, r2, lsl #1 │ │ ldr.w r9, [sp, #4] │ │ lsls r6, r0, #4 │ │ ldrb.w r3, [r4, #32] │ │ mov r0, r7 │ │ ldr r2, [r4, #28] │ │ mov r1, r5 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 4642e │ │ + bne.n 46736 │ │ adds r4, #48 @ 0x30 │ │ subs r6, #48 @ 0x30 │ │ - bne.n 46408 │ │ + bne.n 46710 │ │ movs r0, #0 │ │ ldr r1, [sp, #8] │ │ - b.n 46444 │ │ + b.n 4674c │ │ movs r0, #0 │ │ ldr.w r9, [sp, #4] │ │ - b.n 46444 │ │ + b.n 4674c │ │ ldrb.w r1, [r4, #40] @ 0x28 │ │ cmp r1, #0 │ │ ldr r1, [sp, #8] │ │ - beq.n 46444 │ │ + beq.n 4674c │ │ mvns r0, r0 │ │ lsls r0, r0, #24 │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ it eq │ │ moveq r0, #1 │ │ mvns r1, r1 │ │ mvns r0, r0 │ │ @@ -45193,77 +45386,77 @@ │ │ clz r0, r0 │ │ mvns r2, r1 │ │ uxtb r2, r2 │ │ lsrs r0, r0, #5 │ │ clz r2, r2 │ │ lsrs r2, r2, #5 │ │ eors r2, r0 │ │ - bne.n 463e4 │ │ - b.n 463f4 │ │ + bne.n 466ec │ │ + b.n 466fc │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #20 │ │ str r1, [sp, #8] │ │ mov r9, r0 │ │ ldr r1, [r2, #0] │ │ mov sl, r2 │ │ ldr r0, [r1, #108] @ 0x6c │ │ - cbz r0, 464be │ │ + cbz r0, 467c6 │ │ add.w r0, r0, r0, lsl #1 │ │ ldr r5, [r1, #104] @ 0x68 │ │ add.w r7, r9, #8 │ │ add.w r4, r9, #32 │ │ lsls r6, r0, #4 │ │ ldrb.w r3, [r5, #32] │ │ mov r0, r4 │ │ ldr r2, [r5, #28] │ │ mov r1, r7 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 464c2 │ │ + bne.n 467ca │ │ adds r5, #48 @ 0x30 │ │ subs r6, #48 @ 0x30 │ │ - bne.n 464a6 │ │ + bne.n 467ae │ │ movs r0, #0 │ │ - b.n 464d4 │ │ + b.n 467dc │ │ ldrb.w r1, [r5, #40] @ 0x28 │ │ - cbz r1, 464d4 │ │ + cbz r1, 467dc │ │ mvns r0, r0 │ │ lsls r0, r0, #24 │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ it eq │ │ moveq r0, #1 │ │ ldr.w r2, [sl] │ │ ldr r1, [r2, #108] @ 0x6c │ │ - cbz r1, 4650c │ │ + cbz r1, 46814 │ │ mov r8, r0 │ │ add.w r0, r1, r1, lsl #1 │ │ ldr r5, [r2, #104] @ 0x68 │ │ add.w r7, r9, #56 @ 0x38 │ │ add.w r4, r9, #80 @ 0x50 │ │ lsls r6, r0, #4 │ │ ldrb.w r3, [r5, #32] │ │ mov r0, r4 │ │ ldr r2, [r5, #28] │ │ mov r1, r7 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 46510 │ │ + bne.n 46818 │ │ adds r5, #48 @ 0x30 │ │ subs r6, #48 @ 0x30 │ │ - bne.n 464ee │ │ + bne.n 467f6 │ │ movs r1, #0 │ │ mov r0, r8 │ │ - b.n 46528 │ │ + b.n 46830 │ │ movs r1, #0 │ │ - b.n 46528 │ │ + b.n 46830 │ │ mov r1, r0 │ │ ldrb.w r0, [r5, #40] @ 0x28 │ │ cmp r0, #0 │ │ mov r0, r8 │ │ - beq.n 46528 │ │ + beq.n 46830 │ │ mvns r1, r1 │ │ lsls r1, r1, #24 │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ it eq │ │ moveq r1, #1 │ │ uxtb r3, r0 │ │ ldr.w r2, [sl] │ │ @@ -45284,88 +45477,88 @@ │ │ mvn.w r3, #254 @ 0xfe │ │ uxtab r0, r3, r0 │ │ clz r0, r0 │ │ str r4, [sp, #16] │ │ mov.w r0, r0, lsr #5 │ │ orr.w r0, r0, r0, lsl #1 │ │ add.w r6, r9, r0, lsl #3 │ │ - cbz r1, 465a6 │ │ + cbz r1, 468ae │ │ mov r3, r6 │ │ add.w r0, r1, r1, lsl #1 │ │ ldr r6, [r2, #104] @ 0x68 │ │ mov r8, r7 │ │ add.w r7, r4, #8 │ │ add.w r4, r3, #8 │ │ lsls r5, r0, #4 │ │ str r3, [sp, #12] │ │ ldrb.w r3, [r6, #32] │ │ mov r0, r7 │ │ ldr r2, [r6, #28] │ │ mov r1, r4 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 465aa │ │ + bne.n 468b2 │ │ adds r6, #48 @ 0x30 │ │ subs r5, #48 @ 0x30 │ │ - bne.n 46584 │ │ + bne.n 4688c │ │ movs r0, #0 │ │ ldrd r6, r4, [sp, #12] │ │ mov r7, r8 │ │ - b.n 465c2 │ │ + b.n 468ca │ │ movs r0, #0 │ │ - b.n 465c2 │ │ + b.n 468ca │ │ ldrb.w r1, [r6, #40] @ 0x28 │ │ mov r7, r8 │ │ - cbz r1, 465be │ │ + cbz r1, 468c6 │ │ mvns r0, r0 │ │ lsls r0, r0, #24 │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ it eq │ │ moveq r0, #1 │ │ ldrd r6, r4, [sp, #12] │ │ ldr.w r2, [sl] │ │ add.w r7, r9, r7, lsl #3 │ │ add.w r8, r9, fp │ │ str r7, [sp, #12] │ │ ldr r1, [r2, #108] @ 0x6c │ │ - cbz r1, 4660e │ │ + cbz r1, 46916 │ │ mov r9, r0 │ │ ldr r5, [r2, #104] @ 0x68 │ │ add.w r0, r1, r1, lsl #1 │ │ mov fp, r6 │ │ add.w r6, r7, #8 │ │ add.w r4, r8, #8 │ │ lsls r7, r0, #4 │ │ ldrb.w r3, [r5, #32] │ │ mov r0, r4 │ │ ldr r2, [r5, #28] │ │ mov r1, r6 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 46616 │ │ + bne.n 4691e │ │ adds r5, #48 @ 0x30 │ │ subs r7, #48 @ 0x30 │ │ - bne.n 465e8 │ │ + bne.n 468f0 │ │ mov r5, sl │ │ mov.w ip, #0 │ │ mov r0, r9 │ │ ldr r4, [sp, #16] │ │ mov r6, fp │ │ - b.n 46638 │ │ + b.n 46940 │ │ mov r5, sl │ │ mov.w ip, #0 │ │ - b.n 4663a │ │ + b.n 46942 │ │ mov ip, r0 │ │ ldrb.w r0, [r5, #40] @ 0x28 │ │ ldr r4, [sp, #16] │ │ mov r6, fp │ │ cmp r0, #0 │ │ mov r0, r9 │ │ mov r5, sl │ │ - beq.n 46638 │ │ + beq.n 46940 │ │ mvn.w r1, ip │ │ lsls r1, r1, #24 │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ it eq │ │ moveq r1, #1 │ │ mov ip, r1 │ │ ldr r7, [sp, #12] │ │ @@ -45381,41 +45574,41 @@ │ │ moveq sl, r7 │ │ moveq fp, r6 │ │ ldr r3, [r5, #0] │ │ cmp r2, #255 @ 0xff │ │ ldr r2, [r3, #108] @ 0x6c │ │ it eq │ │ moveq sl, r8 │ │ - cbz r2, 4669a │ │ + cbz r2, 469a2 │ │ strd r0, ip, [sp] │ │ add.w r0, r2, r2, lsl #1 │ │ ldr.w r9, [r3, #104] @ 0x68 │ │ add.w r5, fp, #8 │ │ add.w r4, sl, #8 │ │ lsls r7, r0, #4 │ │ ldrb.w r3, [r9, #32] │ │ mov r0, r4 │ │ ldr.w r2, [r9, #28] │ │ mov r1, r5 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 466a0 │ │ + bne.n 469a8 │ │ add.w r9, r9, #48 @ 0x30 │ │ subs r7, #48 @ 0x30 │ │ - bne.n 46674 │ │ + bne.n 4697c │ │ mov.w lr, #0 │ │ ldrd r0, ip, [sp] │ │ - b.n 466be │ │ + b.n 469c6 │ │ mov.w lr, #0 │ │ - b.n 466c0 │ │ + b.n 469c8 │ │ mov lr, r0 │ │ ldrb.w r0, [r9, #40] @ 0x28 │ │ cmp r0, #0 │ │ ldrd r0, ip, [sp] │ │ - beq.n 466be │ │ + beq.n 469c6 │ │ mvn.w r2, lr │ │ lsls r2, r2, #24 │ │ mov.w r2, #4294967295 @ 0xffffffff │ │ it eq │ │ moveq r2, #1 │ │ mov lr, r2 │ │ ldr r4, [sp, #16] │ │ @@ -45446,66 +45639,96 @@ │ │ it eq │ │ moveq r8, r0 │ │ ldmia.w r8, {r1, r2, r3, r5, r6, r7} │ │ add.w r0, r9, #72 @ 0x48 │ │ stmia r0!, {r1, r2, r3, r5, r6, r7} │ │ add sp, #20 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ + push {r4, r5, r6, lr} │ │ + ldrd r5, r6, [r0, #8] │ │ + mov r4, r0 │ │ + ldr r1, [r6, #0] │ │ + cmp r1, #0 │ │ + itt ne │ │ + movne r0, r5 │ │ + blxne r1 │ │ + ldr r0, [r6, #4] │ │ + cmp r0, #0 │ │ + itt ne │ │ + movne r0, r5 │ │ + blxne d87d0 │ │ + adds r0, r4, #1 │ │ + beq.n 46a66 │ │ + adds r0, r4, #4 │ │ + dmb ish │ │ + ldrex r1, [r0] │ │ + subs r2, r1, #1 │ │ + strex r3, r2, [r0] │ │ + cmp r3, #0 │ │ + bne.n 46a44 │ │ + cmp r1, #1 │ │ + it ne │ │ + popne {r4, r5, r6, pc} │ │ + dmb ish │ │ + mov r0, r4 │ │ + ldmia.w sp!, {r4, r5, r6, lr} │ │ + b.w d871c │ │ + pop {r4, r5, r6, pc} │ │ push {r4, lr} │ │ mov r4, r0 │ │ adds r0, #8 │ │ - bl 4674c │ │ + bl 46aa0 │ │ adds r0, r4, #1 │ │ it eq │ │ popeq {r4, pc} │ │ adds r0, r4, #4 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 4672a │ │ + bne.n 46a7e │ │ cmp r1, #1 │ │ - bne.n 4674a │ │ + bne.n 46a9e │ │ dmb ish │ │ mov r0, r4 │ │ ldmia.w sp!, {r4, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ pop {r4, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #4 │ │ mov sl, r0 │ │ ldr r0, [r0, #64] @ 0x40 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [sl, #68] @ 0x44 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [sl, #76] @ 0x4c │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [sl, #80] @ 0x50 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r5, r4, [sl, #92] @ 0x5c │ │ - cbz r4, 46786 │ │ + cbz r4, 46ada │ │ mov r6, r5 │ │ mov r0, r6 │ │ - bl 46ae0 │ │ + bl 46e34 │ │ adds r6, #128 @ 0x80 │ │ subs r4, #1 │ │ - bne.n 4677a │ │ + bne.n 46ace │ │ ldr.w r0, [sl, #88] @ 0x58 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [sl, #100] @ 0x64 │ │ - cbz r0, 467a6 │ │ + cbz r0, 46afa │ │ movs r1, #0 │ │ movs r4, #0 │ │ - blx a46fc │ │ + blx a4708 │ │ str.w r4, [sl, #100] @ 0x64 │ │ ldrd r0, r5, [sl, #24] │ │ tbh [pc, r0, lsl #1] │ │ movs r6, r0 │ │ lsls r6, r1, #1 │ │ lsls r1, r1, #5 │ │ lsls r4, r0, #1 │ │ @@ -45513,606 +45736,606 @@ │ │ lsls r6, r0, #6 │ │ add.w r0, r5, #164 @ 0xa4 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 467c2 │ │ + bne.n 46b16 │ │ cmp r1, #1 │ │ dmb ish │ │ - bne.w 46aba │ │ + bne.w 46e0e │ │ ldr r0, [r5, #72] @ 0x48 │ │ add.w r2, r5, #32 │ │ dmb ish │ │ ldrex r1, [r2] │ │ orr.w r3, r1, r0 │ │ strex r7, r3, [r2] │ │ cmp r7, #0 │ │ - bne.n 467e4 │ │ + bne.n 46b38 │ │ dmb ish │ │ ldr r0, [r5, #72] @ 0x48 │ │ tst r0, r1 │ │ - bne.n 4680e │ │ + bne.n 46b62 │ │ add.w r0, r5, #76 @ 0x4c │ │ - bl 46c18 │ │ + bl 46f6c │ │ add.w r0, r5, #112 @ 0x70 │ │ - bl 46c18 │ │ + bl 46f6c │ │ add.w r0, r5, #168 @ 0xa8 │ │ movs r2, #1 │ │ dmb ish │ │ ldrexb r1, [r0] │ │ strexb r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 46818 │ │ + bne.n 46b6c │ │ cmp r1, #0 │ │ dmb ish │ │ - beq.w 46aba │ │ + beq.w 46e0e │ │ mov r0, r5 │ │ - bl 46e00 │ │ - b.n 46aba │ │ + bl 47154 │ │ + b.n 46e0e │ │ dmb ish │ │ ldrex r0, [r5] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r5] │ │ cmp r2, #0 │ │ - bne.n 4683a │ │ - b.n 46aaa │ │ + bne.n 46b8e │ │ + b.n 46dfe │ │ add.w r0, r5, #132 @ 0x84 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 46852 │ │ + bne.n 46ba6 │ │ cmp r1, #1 │ │ dmb ish │ │ - bne.w 46aba │ │ + bne.w 46e0e │ │ add.w r4, r5, #32 │ │ dmb ish │ │ ldrex r0, [r4] │ │ orr.w r1, r0, #1 │ │ strex r2, r1, [r4] │ │ cmp r2, #0 │ │ - bne.n 46872 │ │ + bne.n 46bc6 │ │ lsls r0, r0, #31 │ │ dmb ish │ │ - bne.n 46924 │ │ + bne.n 46c78 │ │ ldr r0, [r4, #0] │ │ mov.w fp, #0 │ │ movs r7, #0 │ │ dmb ish │ │ mvns r1, r0 │ │ tst.w r1, #62 @ 0x3e │ │ - beq.n 46964 │ │ + beq.n 46cb8 │ │ ldr.w r8, [r5] │ │ adds r4, r5, #4 │ │ dmb ish │ │ mov.w r9, r0, lsr #1 │ │ dmb ish │ │ ldrex r6, [r4] │ │ strex r0, fp, [r4] │ │ cmp r0, #0 │ │ - bne.n 468b0 │ │ + bne.n 46c04 │ │ mov.w fp, r8, lsr #1 │ │ cmp r9, fp │ │ dmb ish │ │ - beq.n 4690e │ │ - cbnz r6, 4690e │ │ + beq.n 46c62 │ │ + cbnz r6, 46c62 │ │ str.w r9, [sp] │ │ mov.w r9, #0 │ │ cmp r7, #6 │ │ - bhi.n 468e8 │ │ + bhi.n 46c3c │ │ movs r0, #1 │ │ lsrs.w r1, r0, r7 │ │ add.w r0, r0, #1 │ │ yield │ │ - beq.n 468d8 │ │ + beq.n 46c2c │ │ adds r7, #1 │ │ - b.n 468f2 │ │ - blx d8810 │ │ + b.n 46c46 │ │ + blx d8820 │ │ cmp r7, #11 │ │ it cc │ │ addcc r7, #1 │ │ dmb ish │ │ ldrex r6, [r4] │ │ strex r0, r9, [r4] │ │ cmp r0, #0 │ │ - bne.n 468f6 │ │ + bne.n 46c4a │ │ cmp r6, #0 │ │ dmb ish │ │ - beq.n 468d2 │ │ + beq.n 46c26 │ │ ldr.w r9, [sp] │ │ cmp fp, r9 │ │ - bne.n 469a0 │ │ - cbz r6, 4691a │ │ + bne.n 46cf4 │ │ + cbz r6, 46c6e │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ bic.w r0, r8, #1 │ │ dmb ish │ │ str r0, [r5, #0] │ │ add.w r0, r5, #136 @ 0x88 │ │ movs r2, #1 │ │ dmb ish │ │ ldrexb r1, [r0] │ │ strexb r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 4692e │ │ + bne.n 46c82 │ │ cmp r1, #0 │ │ dmb ish │ │ - beq.w 46aba │ │ + beq.w 46e0e │ │ mov r0, r5 │ │ - bl 46eac │ │ - b.n 46aba │ │ - blx d8810 │ │ + bl 47200 │ │ + b.n 46e0e │ │ + blx d8820 │ │ cmp r7, #11 │ │ it cc │ │ addcc r7, #1 │ │ ldr r0, [r4, #0] │ │ dmb ish │ │ mvns r1, r0 │ │ tst.w r1, #62 @ 0x3e │ │ - bne.n 4689e │ │ + bne.n 46bf2 │ │ cmp r7, #6 │ │ - bhi.n 4694c │ │ + bhi.n 46ca0 │ │ movs r0, #1 │ │ lsrs.w r1, r0, r7 │ │ add.w r0, r0, #1 │ │ yield │ │ - beq.n 4696a │ │ + beq.n 46cbe │ │ adds r7, #1 │ │ - b.n 46956 │ │ + b.n 46caa │ │ ldr r0, [r6, #0] │ │ dmb ish │ │ cmp r0, #0 │ │ - beq.n 46a08 │ │ + beq.n 46d5c │ │ ldr r0, [r6, #0] │ │ mov r7, r6 │ │ dmb ish │ │ mov r6, r0 │ │ mov r0, r7 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add.w r8, r8, #2 │ │ mov.w fp, r8, lsr #1 │ │ cmp r9, fp │ │ - beq.n 46912 │ │ + beq.n 46c66 │ │ and.w r0, fp, #31 │ │ cmp r0, #31 │ │ - beq.n 4697a │ │ + beq.n 46cce │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r0, r6, r0, lsl #2 │ │ adds r4, r0, #4 │ │ ldr r1, [r0, #12] │ │ dmb ish │ │ lsls r0, r1, #31 │ │ - bne.n 469f2 │ │ + bne.n 46d46 │ │ movs r7, #0 │ │ - b.n 469d4 │ │ - blx d8810 │ │ + b.n 46d28 │ │ + blx d8820 │ │ cmp r7, #11 │ │ it cc │ │ addcc r7, #1 │ │ ldr r0, [r4, #8] │ │ dmb ish │ │ lsls r0, r0, #31 │ │ - bne.n 469f2 │ │ + bne.n 46d46 │ │ cmp r7, #6 │ │ - bhi.n 469c0 │ │ + bhi.n 46d14 │ │ movs r0, #1 │ │ lsrs.w r1, r0, r7 │ │ add.w r0, r0, #1 │ │ yield │ │ - beq.n 469da │ │ + beq.n 46d2e │ │ adds r7, #1 │ │ ldr r0, [r4, #8] │ │ dmb ish │ │ lsls r0, r0, #31 │ │ - beq.n 469d4 │ │ + beq.n 46d28 │ │ ldrd r7, r4, [r4] │ │ ldr r1, [r4, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r7 │ │ blxne r1 │ │ ldr r0, [r4, #4] │ │ cmp r0, #0 │ │ - bne.n 4698e │ │ - b.n 46994 │ │ + bne.n 46ce2 │ │ + b.n 46ce8 │ │ movs r4, #0 │ │ - b.n 46a20 │ │ - blx d8810 │ │ + b.n 46d74 │ │ + blx d8820 │ │ cmp r4, #11 │ │ it cc │ │ addcc r4, #1 │ │ ldr r0, [r6, #0] │ │ dmb ish │ │ cmp r0, #0 │ │ - bne.n 46984 │ │ + bne.n 46cd8 │ │ cmp r4, #6 │ │ - bhi.n 46a0c │ │ + bhi.n 46d60 │ │ movs r0, #1 │ │ lsrs.w r1, r0, r4 │ │ add.w r0, r0, #1 │ │ yield │ │ - beq.n 46a26 │ │ + beq.n 46d7a │ │ adds r4, #1 │ │ ldr r0, [r6, #0] │ │ dmb ish │ │ cmp r0, #0 │ │ - beq.n 46a20 │ │ - b.n 46984 │ │ + beq.n 46d74 │ │ + b.n 46cd8 │ │ adds r0, r5, #4 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 46a46 │ │ + bne.n 46d9a │ │ cmp r1, #1 │ │ dmb ish │ │ - bne.n 46aba │ │ + bne.n 46e0e │ │ add.w r0, r5, #8 │ │ - bl 46f20 │ │ + bl 47274 │ │ add.w r0, r5, #68 @ 0x44 │ │ movs r2, #1 │ │ dmb ish │ │ ldrexb r1, [r0] │ │ strexb r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 46a6e │ │ + bne.n 46dc2 │ │ dmb ish │ │ - cbz r1, 46aba │ │ + cbz r1, 46e0e │ │ add.w r0, r5, #16 │ │ - bl 471fc │ │ + bl 47550 │ │ add.w r0, r5, #40 @ 0x28 │ │ - bl 471fc │ │ + bl 47550 │ │ mov r0, r5 │ │ - blx d87c0 │ │ - b.n 46aba │ │ + blx d87d0 │ │ + b.n 46e0e │ │ dmb ish │ │ ldrex r0, [r5] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r5] │ │ cmp r2, #0 │ │ - bne.n 46a9c │ │ + bne.n 46df0 │ │ cmp r0, #1 │ │ - bne.n 46aba │ │ + bne.n 46e0e │ │ dmb ish │ │ ldr.w r0, [sl, #28] │ │ - bl 472a0 │ │ + bl 475f4 │ │ ldrd r5, r1, [sl, #44] @ 0x2c │ │ mov r0, r5 │ │ - bl 472ca │ │ + bl 4761e │ │ ldr.w r0, [sl, #40] @ 0x28 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r0, r1, [sl] │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w 4759e │ │ + b.w 478f2 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #20 │ │ mov r7, r0 │ │ ldr r0, [r0, #64] @ 0x40 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r7, #68] @ 0x44 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r5, r4, [r7, #80] @ 0x50 │ │ - cbz r4, 46b10 │ │ + cbz r4, 46e64 │ │ add.w r6, r5, #16 │ │ ldr r0, [r6, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #40 @ 0x28 │ │ subs r4, #1 │ │ - bne.n 46afe │ │ + bne.n 46e52 │ │ ldr r0, [r7, #76] @ 0x4c │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r0, r1, [r7, #12] │ │ str r7, [sp, #4] │ │ strd r1, r0, [sp, #8] │ │ - cbz r1, 46ba4 │ │ + cbz r1, 46ef8 │ │ movs r5, #0 │ │ - b.n 46b42 │ │ + b.n 46e96 │ │ ldr r0, [sp, #16] │ │ ldr r0, [r0, #0] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #1 │ │ ldr r0, [sp, #8] │ │ cmp r5, r0 │ │ - beq.n 46ba4 │ │ + beq.n 46ef8 │ │ add.w r0, r5, r5, lsl #1 │ │ ldr r1, [sp, #12] │ │ add.w r0, r1, r0, lsl #2 │ │ str r0, [sp, #16] │ │ ldrd r6, r4, [r0, #4] │ │ cmp r4, #0 │ │ - beq.n 46b2c │ │ + beq.n 46e80 │ │ mov.w r8, #0 │ │ - b.n 46b72 │ │ + b.n 46ec6 │ │ ldr.w r0, [r9, #8] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r7 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r8, r8, #1 │ │ cmp r8, r4 │ │ - beq.n 46b2c │ │ + beq.n 46e80 │ │ add.w r0, r8, r8, lsl #1 │ │ add.w r9, r6, r0, lsl #3 │ │ ldrd r7, sl, [r9, #12] │ │ cmp.w sl, #0 │ │ - beq.n 46b5c │ │ + beq.n 46eb0 │ │ add.w fp, r7, #16 │ │ ldr.w r0, [fp] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [fp, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w fp, fp, #40 @ 0x28 │ │ subs.w sl, sl, #1 │ │ - bne.n 46b88 │ │ - b.n 46b5c │ │ + bne.n 46edc │ │ + b.n 46eb0 │ │ ldr r7, [sp, #4] │ │ ldr r0, [r7, #8] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #12] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r0, r7, #88 @ 0x58 │ │ - bl 477c6 │ │ + bl 47ace │ │ ldrd r5, r4, [r7, #104] @ 0x68 │ │ - cbz r4, 46bd8 │ │ + cbz r4, 46f2c │ │ add.w r6, r5, #44 @ 0x2c │ │ ldr.w r0, [r6, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #56 @ 0x38 │ │ subs r4, #1 │ │ - bne.n 46bc4 │ │ + bne.n 46f18 │ │ ldr r0, [r7, #100] @ 0x64 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r5, r4, [r7, #116] @ 0x74 │ │ - cbz r4, 46c02 │ │ + cbz r4, 46f56 │ │ add.w r6, r5, #44 @ 0x2c │ │ ldr.w r0, [r6, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #56 @ 0x38 │ │ subs r4, #1 │ │ - bne.n 46bee │ │ + bne.n 46f42 │ │ ldr r0, [r7, #112] @ 0x70 │ │ - cbz r0, 46c12 │ │ + cbz r0, 46f66 │ │ mov r0, r5 │ │ add sp, #20 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #20 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ sub sp, #16 │ │ mov r4, r0 │ │ movs r0, #1 │ │ ldrex r1, [r4] │ │ cmp r1, #0 │ │ - bne.w 46daa │ │ + bne.w 470fe │ │ strex r1, r0, [r4] │ │ cmp r1, #0 │ │ - bne.n 46c22 │ │ + bne.n 46f76 │ │ dmb ish │ │ - ldr r0, [pc, #436] @ (46df0 ) │ │ + ldr r0, [pc, #436] @ (47144 ) │ │ add r0, pc │ │ mov sl, r0 │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 46db6 │ │ + bne.w 4710a │ │ mov.w r8, #0 │ │ ldrb r0, [r4, #4] │ │ cmp r0, #0 │ │ - bne.w 46dc6 │ │ + bne.w 4711a │ │ ldr r0, [r4, #16] │ │ - cbz r0, 46cc2 │ │ + cbz r0, 47016 │ │ ldr r5, [r4, #12] │ │ add.w r0, r0, r0, lsl #1 │ │ movs r7, #2 │ │ movs r6, #1 │ │ add.w r9, r5, r0, lsl #2 │ │ - b.n 46c72 │ │ + b.n 46fc6 │ │ clrex │ │ dmb ish │ │ cmp r5, r9 │ │ - beq.n 46cc2 │ │ + beq.n 47016 │ │ mov r0, r5 │ │ ldr.w r1, [r5], #12 │ │ ldrex r2, [r1, #20] │ │ cmp r2, #0 │ │ - bne.n 46c66 │ │ + bne.n 46fba │ │ adds r1, #20 │ │ dmb ish │ │ strex r2, r7, [r1] │ │ - cbz r2, 46c96 │ │ + cbz r2, 46fea │ │ ldrex r2, [r1] │ │ cmp r2, #0 │ │ - beq.n 46c86 │ │ - b.n 46c66 │ │ + beq.n 46fda │ │ + b.n 46fba │ │ dmb ish │ │ ldr r0, [r0, #0] │ │ ldr r0, [r0, #16] │ │ dmb ish │ │ add.w r1, r0, #24 │ │ ldrex r0, [r1] │ │ strex r2, r6, [r1] │ │ cmp r2, #0 │ │ - bne.n 46ca6 │ │ + bne.n 46ffa │ │ adds r0, #1 │ │ - bne.n 46c6e │ │ + bne.n 46fc2 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ - b.n 46c6e │ │ + blx d87e0 │ │ + b.n 46fc2 │ │ ldrd r7, r0, [r4, #24] │ │ movs r1, #0 │ │ cmp r0, #0 │ │ str r1, [r4, #28] │ │ - beq.n 46d52 │ │ + beq.n 470a6 │ │ add.w r0, r0, r0, lsl #1 │ │ movs r5, #1 │ │ add.w r6, r7, r0, lsl #2 │ │ ldrd r0, r1, [r7] │ │ ldrex r2, [r0, #20] │ │ - cbnz r2, 46cf8 │ │ + cbnz r2, 4704c │ │ add.w r2, r0, #20 │ │ dmb ish │ │ strex r3, r1, [r2] │ │ - cbz r3, 46d26 │ │ + cbz r3, 4707a │ │ ldrex r3, [r2] │ │ cmp r3, #0 │ │ - beq.n 46cea │ │ + beq.n 4703e │ │ clrex │ │ dmb ish │ │ adds r7, #12 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 46d06 │ │ + bne.n 4705a │ │ cmp r1, #1 │ │ itt eq │ │ dmbeq ish │ │ - bleq 418c8 │ │ + bleq 41bd0 │ │ cmp r7, r6 │ │ - bne.n 46cd8 │ │ - b.n 46d52 │ │ + bne.n 4702c │ │ + b.n 470a6 │ │ dmb ish │ │ ldr r1, [r0, #16] │ │ dmb ish │ │ adds r1, #24 │ │ ldrex r2, [r1] │ │ strex r3, r5, [r1] │ │ cmp r3, #0 │ │ - bne.n 46d32 │ │ + bne.n 47086 │ │ adds r2, #1 │ │ - bne.n 46d00 │ │ + bne.n 47054 │ │ mov r9, r0 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ + blx d87e0 │ │ mov r0, r9 │ │ - b.n 46d00 │ │ + b.n 47054 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 46d5a │ │ + cbz r0, 470ae │ │ movs r0, #0 │ │ - b.n 46d62 │ │ + b.n 470b6 │ │ ldr r0, [r4, #28] │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ dmb ish │ │ strb.w r0, [r4, #32] │ │ cmp.w r8, #0 │ │ dmb ish │ │ - bne.n 46d7c │ │ + bne.n 470d0 │ │ ldr.w r0, [sl, #4] │ │ lsls r0, r0, #1 │ │ - bne.n 46de2 │ │ + bne.n 47136 │ │ movs r0, #0 │ │ dmb ish │ │ ldrex r1, [r4] │ │ strex r2, r0, [r4] │ │ cmp r2, #0 │ │ - bne.n 46d82 │ │ + bne.n 470d6 │ │ cmp r1, #2 │ │ itt ne │ │ addne sp, #16 │ │ ldmiane.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ movs r0, #240 @ 0xf0 │ │ mov r1, r4 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ - b.w d8700 │ │ + b.w d8710 │ │ mov r0, r4 │ │ clrex │ │ - bl 778fe │ │ - b.n 46c38 │ │ - bl 7770c │ │ + bl 77966 │ │ + b.n 46f8c │ │ + bl 77774 │ │ eor.w r8, r0, #1 │ │ ldrb r0, [r4, #4] │ │ cmp r0, #0 │ │ - beq.w 46c52 │ │ - ldr r0, [pc, #44] @ (46df4 ) │ │ + beq.w 46fa6 │ │ + ldr r0, [pc, #44] @ (47148 ) │ │ add r2, sp, #8 │ │ - ldr r3, [pc, #44] @ (46df8 ) │ │ - ldr r1, [pc, #44] @ (46dfc ) │ │ + ldr r3, [pc, #44] @ (4714c ) │ │ + ldr r1, [pc, #44] @ (47150 ) │ │ add r0, pc │ │ add r3, pc │ │ strb.w r8, [sp, #12] │ │ add r1, pc │ │ str r4, [sp, #8] │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ - bl 7770c │ │ + bl 417b8 │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq r0, [r4, #4] │ │ - b.n 46d7c │ │ - ldrb r2, [r3, #13] │ │ + b.n 470d0 │ │ + ldrb r6, [r4, #0] │ │ movs r1, r1 │ │ - movs r6, #181 @ 0xb5 │ │ - vtbx.8 d19, {d13-d16}, d12 │ │ + movs r3, #97 @ 0x61 │ │ + vqshl.u64 , q12, #61 @ 0x3d │ │ movs r1, r1 │ │ - subs r1, #198 @ 0xc6 │ │ + adds r6, #130 @ 0x82 │ │ movs r1, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ mov r8, r0 │ │ ldr r0, [r0, #0] │ │ ldr.w r3, [r8, #72] @ 0x48 │ │ ldr.w r1, [r8, #32] │ │ subs r7, r3, #1 │ │ and.w r2, r7, r1 │ │ and.w r6, r7, r0 │ │ cmp r2, r6 │ │ - bls.n 46e24 │ │ + bls.n 47178 │ │ subs r7, r2, r6 │ │ - cbnz r7, 46e3e │ │ - b.n 46e82 │ │ - bcs.n 46e32 │ │ + cbnz r7, 47192 │ │ + b.n 471d6 │ │ + bcs.n 47186 │ │ ldr.w r0, [r8, #64] @ 0x40 │ │ subs r1, r2, r6 │ │ adds r7, r1, r0 │ │ - cbnz r7, 46e3e │ │ - b.n 46e82 │ │ + cbnz r7, 47192 │ │ + b.n 471d6 │ │ bics r1, r3 │ │ cmp r1, r0 │ │ - beq.n 46e82 │ │ + beq.n 471d6 │ │ ldr.w r7, [r8, #64] @ 0x40 │ │ - cbz r7, 46e82 │ │ + cbz r7, 471d6 │ │ ldr.w r0, [r8, #148] @ 0x94 │ │ add.w r1, r6, r6, lsl #1 │ │ ldr.w r9, [r8, #64] @ 0x40 │ │ add.w r4, r0, r1, lsl #2 │ │ mov r0, r9 │ │ cmp r6, r9 │ │ it cc │ │ @@ -46126,1807 +46349,1777 @@ │ │ itt ne │ │ movne r0, sl │ │ blxne r1 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, sl │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r4, #12 │ │ adds r6, #1 │ │ subs r7, #1 │ │ - bne.n 46e4e │ │ + bne.n 471a2 │ │ ldr.w r0, [r8, #152] @ 0x98 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r8, #148] @ 0x94 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r0, r8, #84 @ 0x54 │ │ - bl 471fc │ │ + bl 47550 │ │ add.w r0, r8, #120 @ 0x78 │ │ - bl 471fc │ │ + bl 47550 │ │ mov r0, r8 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ sub sp, #4 │ │ mov r8, r0 │ │ ldrd r0, r5, [r0] │ │ ldr.w r1, [r8, #32] │ │ bic.w r4, r0, #1 │ │ bic.w r9, r1, #1 │ │ cmp r4, r9 │ │ - bne.n 46ef8 │ │ + bne.n 4724c │ │ cmp r5, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r0, r8, #72 @ 0x48 │ │ - bl 471fc │ │ + bl 47550 │ │ mov r0, r8 │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ ldr r0, [r5, #0] │ │ mov r6, r5 │ │ mov r5, r0 │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ adds r4, #2 │ │ cmp r9, r4 │ │ - beq.n 46ec8 │ │ + beq.n 4721c │ │ ubfx r0, r4, #1, #5 │ │ cmp r0, #31 │ │ - beq.n 46ee6 │ │ + beq.n 4723a │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r0, r5, r0, lsl #2 │ │ ldrd r6, r7, [r0, #4] │ │ ldr r1, [r7, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r6 │ │ blxne r1 │ │ ldr r0, [r7, #4] │ │ cmp r0, #0 │ │ - bne.n 46eec │ │ - b.n 46ef2 │ │ - bmi.n 46eca │ │ + bne.n 47240 │ │ + b.n 47246 │ │ + bmi.n 4721e │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ sub sp, #16 │ │ mov r4, r0 │ │ movs r0, #1 │ │ ldrex r1, [r4] │ │ cmp r1, #0 │ │ - bne.w 471a4 │ │ + bne.w 474f8 │ │ strex r1, r0, [r4] │ │ cmp r1, #0 │ │ - bne.n 46f2a │ │ + bne.n 4727e │ │ dmb ish │ │ - ldr r5, [pc, #680] @ (471ec ) │ │ + ldr r5, [pc, #680] @ (47540 ) │ │ add r5, pc │ │ ldr r0, [r5, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 471b0 │ │ + bne.w 47504 │ │ mov.w r8, #0 │ │ ldrb r0, [r4, #4] │ │ cmp r0, #0 │ │ - bne.w 471c0 │ │ + bne.w 47514 │ │ ldrb.w r0, [r4, #56] @ 0x38 │ │ mov sl, r5 │ │ cmp r0, #0 │ │ - bne.w 47168 │ │ + bne.w 474bc │ │ ldrd r5, r0, [r4, #12] │ │ movs r6, #1 │ │ strb.w r6, [r4, #56] @ 0x38 │ │ - cbz r0, 46fd8 │ │ + cbz r0, 4732c │ │ add.w r0, r0, r0, lsl #1 │ │ movs r7, #2 │ │ add.w r9, r5, r0, lsl #2 │ │ - b.n 46f88 │ │ + b.n 472dc │ │ clrex │ │ dmb ish │ │ cmp r5, r9 │ │ - beq.n 46fd8 │ │ + beq.n 4732c │ │ mov r0, r5 │ │ ldr.w r1, [r5], #12 │ │ ldrex r2, [r1, #20] │ │ cmp r2, #0 │ │ - bne.n 46f7c │ │ + bne.n 472d0 │ │ adds r1, #20 │ │ dmb ish │ │ strex r2, r7, [r1] │ │ - cbz r2, 46fac │ │ + cbz r2, 47300 │ │ ldrex r2, [r1] │ │ cmp r2, #0 │ │ - beq.n 46f9c │ │ - b.n 46f7c │ │ + beq.n 472f0 │ │ + b.n 472d0 │ │ dmb ish │ │ ldr r0, [r0, #0] │ │ ldr r0, [r0, #16] │ │ dmb ish │ │ add.w r1, r0, #24 │ │ ldrex r0, [r1] │ │ strex r2, r6, [r1] │ │ cmp r2, #0 │ │ - bne.n 46fbc │ │ + bne.n 47310 │ │ adds r0, #1 │ │ - bne.n 46f84 │ │ + bne.n 472d8 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ - b.n 46f84 │ │ + blx d87e0 │ │ + b.n 472d8 │ │ ldrd r7, r0, [r4, #24] │ │ movs r1, #0 │ │ cmp r0, #0 │ │ str r1, [r4, #28] │ │ - beq.n 47068 │ │ + beq.n 473bc │ │ add.w r0, r0, r0, lsl #1 │ │ movs r5, #1 │ │ add.w r6, r7, r0, lsl #2 │ │ ldrd r0, r1, [r7] │ │ ldrex r2, [r0, #20] │ │ - cbnz r2, 4700e │ │ + cbnz r2, 47362 │ │ add.w r2, r0, #20 │ │ dmb ish │ │ strex r3, r1, [r2] │ │ - cbz r3, 4703c │ │ + cbz r3, 47390 │ │ ldrex r3, [r2] │ │ cmp r3, #0 │ │ - beq.n 47000 │ │ + beq.n 47354 │ │ clrex │ │ dmb ish │ │ adds r7, #12 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 4701c │ │ + bne.n 47370 │ │ cmp r1, #1 │ │ itt eq │ │ dmbeq ish │ │ - bleq 418c8 │ │ + bleq 41bd0 │ │ cmp r7, r6 │ │ - bne.n 46fee │ │ - b.n 47068 │ │ + bne.n 47342 │ │ + b.n 473bc │ │ dmb ish │ │ ldr r1, [r0, #16] │ │ dmb ish │ │ adds r1, #24 │ │ ldrex r2, [r1] │ │ strex r3, r5, [r1] │ │ cmp r3, #0 │ │ - bne.n 47048 │ │ + bne.n 4739c │ │ adds r2, #1 │ │ - bne.n 47016 │ │ + bne.n 4736a │ │ mov r9, r0 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ + blx d87e0 │ │ mov r0, r9 │ │ - b.n 47016 │ │ + b.n 4736a │ │ ldr r0, [r4, #40] @ 0x28 │ │ - cbz r0, 470d8 │ │ + cbz r0, 4742c │ │ ldr r5, [r4, #36] @ 0x24 │ │ add.w r0, r0, r0, lsl #1 │ │ movs r7, #2 │ │ movs r6, #1 │ │ add.w r9, r5, r0, lsl #2 │ │ - b.n 47088 │ │ + b.n 473dc │ │ clrex │ │ dmb ish │ │ cmp r5, r9 │ │ - beq.n 470d8 │ │ + beq.n 4742c │ │ mov r0, r5 │ │ ldr.w r1, [r5], #12 │ │ ldrex r2, [r1, #20] │ │ cmp r2, #0 │ │ - bne.n 4707c │ │ + bne.n 473d0 │ │ adds r1, #20 │ │ dmb ish │ │ strex r2, r7, [r1] │ │ - cbz r2, 470ac │ │ + cbz r2, 47400 │ │ ldrex r2, [r1] │ │ cmp r2, #0 │ │ - beq.n 4709c │ │ - b.n 4707c │ │ + beq.n 473f0 │ │ + b.n 473d0 │ │ dmb ish │ │ ldr r0, [r0, #0] │ │ ldr r0, [r0, #16] │ │ dmb ish │ │ add.w r1, r0, #24 │ │ ldrex r0, [r1] │ │ strex r2, r6, [r1] │ │ cmp r2, #0 │ │ - bne.n 470bc │ │ + bne.n 47410 │ │ adds r0, #1 │ │ - bne.n 47084 │ │ + bne.n 473d8 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ - b.n 47084 │ │ + blx d87e0 │ │ + b.n 473d8 │ │ ldrd r7, r0, [r4, #48] @ 0x30 │ │ movs r1, #0 │ │ cmp r0, #0 │ │ str r1, [r4, #52] @ 0x34 │ │ - beq.n 47168 │ │ + beq.n 474bc │ │ add.w r0, r0, r0, lsl #1 │ │ movs r5, #1 │ │ add.w r6, r7, r0, lsl #2 │ │ ldrd r0, r1, [r7] │ │ ldrex r2, [r0, #20] │ │ - cbnz r2, 4710e │ │ + cbnz r2, 47462 │ │ add.w r2, r0, #20 │ │ dmb ish │ │ strex r3, r1, [r2] │ │ - cbz r3, 4713c │ │ + cbz r3, 47490 │ │ ldrex r3, [r2] │ │ cmp r3, #0 │ │ - beq.n 47100 │ │ + beq.n 47454 │ │ clrex │ │ dmb ish │ │ adds r7, #12 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 4711c │ │ + bne.n 47470 │ │ cmp r1, #1 │ │ itt eq │ │ dmbeq ish │ │ - bleq 418c8 │ │ + bleq 41bd0 │ │ cmp r7, r6 │ │ - bne.n 470ee │ │ - b.n 47168 │ │ + bne.n 47442 │ │ + b.n 474bc │ │ dmb ish │ │ ldr r1, [r0, #16] │ │ dmb ish │ │ adds r1, #24 │ │ ldrex r2, [r1] │ │ strex r3, r5, [r1] │ │ cmp r3, #0 │ │ - bne.n 47148 │ │ + bne.n 4749c │ │ adds r2, #1 │ │ - bne.n 47116 │ │ + bne.n 4746a │ │ mov r9, r0 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ + blx d87e0 │ │ mov r0, r9 │ │ - b.n 47116 │ │ + b.n 4746a │ │ cmp.w r8, #0 │ │ - bne.n 47176 │ │ + bne.n 474ca │ │ ldr.w r0, [sl, #4] │ │ lsls r0, r0, #1 │ │ - bne.n 471dc │ │ + bne.n 47530 │ │ movs r0, #0 │ │ dmb ish │ │ ldrex r1, [r4] │ │ strex r2, r0, [r4] │ │ cmp r2, #0 │ │ - bne.n 4717c │ │ + bne.n 474d0 │ │ cmp r1, #2 │ │ itt ne │ │ addne sp, #16 │ │ ldmiane.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ movs r0, #240 @ 0xf0 │ │ mov r1, r4 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ - b.w d8700 │ │ + b.w d8710 │ │ mov r0, r4 │ │ clrex │ │ - bl 778fe │ │ - b.n 46f40 │ │ - bl 7770c │ │ + bl 77966 │ │ + b.n 47294 │ │ + bl 77774 │ │ eor.w r8, r0, #1 │ │ ldrb r0, [r4, #4] │ │ cmp r0, #0 │ │ - beq.w 46f58 │ │ - ldr r0, [pc, #44] @ (471f0 ) │ │ + beq.w 472ac │ │ + ldr r0, [pc, #44] @ (47544 ) │ │ add r2, sp, #8 │ │ - ldr r3, [pc, #44] @ (471f4 ) │ │ - ldr r1, [pc, #48] @ (471f8 ) │ │ + ldr r3, [pc, #44] @ (47548 ) │ │ + ldr r1, [pc, #48] @ (4754c ) │ │ add r0, pc │ │ add r3, pc │ │ strb.w r8, [sp, #12] │ │ add r1, pc │ │ str r4, [sp, #8] │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ - bl 7770c │ │ + bl 417b8 │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq r0, [r4, #4] │ │ - b.n 47176 │ │ + b.n 474ca │ │ nop │ │ - ldrb r2, [r2, #1] │ │ + strb r6, [r3, #20] │ │ movs r1, r1 │ │ - movs r2, #187 @ 0xbb │ │ - vqshl.u32 , q9, #29 │ │ + subs r7, r4, #5 │ │ + vsri.32 d19, d30, #3 │ │ movs r1, r1 │ │ - adds r5, #252 @ 0xfc │ │ + adds r2, #184 @ 0xb8 │ │ movs r1, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ ldrd r5, r6, [r0, #4] │ │ mov r8, r0 │ │ - cbz r6, 47240 │ │ + cbz r6, 47594 │ │ movs r7, #0 │ │ - b.n 47210 │ │ + b.n 47564 │ │ cmp r7, r6 │ │ - beq.n 47240 │ │ + beq.n 47594 │ │ add.w r0, r7, r7, lsl #1 │ │ adds r7, #1 │ │ ldr.w r1, [r5, r0, lsl #2] │ │ add.w r0, r5, r0, lsl #2 │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r4, r3, [r1] │ │ cmp r4, #0 │ │ - bne.n 47222 │ │ + bne.n 47576 │ │ cmp r2, #1 │ │ - bne.n 4720c │ │ + bne.n 47560 │ │ dmb ish │ │ ldr r0, [r0, #0] │ │ - bl 418c8 │ │ - b.n 4720c │ │ + bl 41bd0 │ │ + b.n 47560 │ │ ldr.w r0, [r8] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r5, r6, [r8, #16] │ │ - cbz r6, 4728c │ │ + cbz r6, 475e0 │ │ movs r7, #0 │ │ - b.n 4725c │ │ + b.n 475b0 │ │ cmp r7, r6 │ │ - beq.n 4728c │ │ + beq.n 475e0 │ │ add.w r0, r7, r7, lsl #1 │ │ adds r7, #1 │ │ ldr.w r1, [r5, r0, lsl #2] │ │ add.w r0, r5, r0, lsl #2 │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r4, r3, [r1] │ │ cmp r4, #0 │ │ - bne.n 4726e │ │ + bne.n 475c2 │ │ cmp r2, #1 │ │ - bne.n 47258 │ │ + bne.n 475ac │ │ dmb ish │ │ ldr r0, [r0, #0] │ │ - bl 418c8 │ │ - b.n 47258 │ │ + bl 41bd0 │ │ + b.n 475ac │ │ ldr.w r0, [r8, #12] │ │ - cbz r0, 4729c │ │ + cbz r0, 475f0 │ │ mov r0, r5 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ adds r1, r0, #1 │ │ it eq │ │ bxeq lr │ │ add.w ip, r0, #4 │ │ dmb ish │ │ ldrex r2, [ip] │ │ subs r3, r2, #1 │ │ strex r1, r3, [ip] │ │ cmp r1, #0 │ │ - bne.n 472ae │ │ + bne.n 47602 │ │ cmp r2, #1 │ │ itt eq │ │ dmbeq ish │ │ - beq.w d870c │ │ + beq.w d871c │ │ bx lr │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #52 @ 0x34 │ │ cmp r1, #0 │ │ strd r0, r1, [sp, #4] │ │ - beq.w 47598 │ │ + beq.w 478ec │ │ movs r1, #0 │ │ - b.n 472f8 │ │ + b.n 4764c │ │ ldr r0, [sp, #12] │ │ ldr r0, [r0, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #24] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r1, [sp, #16] │ │ ldr r0, [sp, #8] │ │ adds r1, #1 │ │ cmp r1, r0 │ │ - beq.w 47598 │ │ + beq.w 478ec │ │ str r1, [sp, #16] │ │ add.w r0, r1, r1, lsl #1 │ │ ldr r1, [sp, #4] │ │ add.w r0, r1, r0, lsl #2 │ │ str r0, [sp, #12] │ │ ldrd r0, r1, [r0, #4] │ │ cmp r1, #0 │ │ strd r1, r0, [sp, #20] │ │ - beq.n 472de │ │ + beq.n 47632 │ │ movs r1, #0 │ │ - b.n 4732e │ │ + b.n 47682 │ │ ldr r0, [sp, #32] │ │ ldr r0, [r0, #44] @ 0x2c │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #40] @ 0x28 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r1, [sp, #28] │ │ ldr r0, [sp, #20] │ │ adds r1, #1 │ │ cmp r1, r0 │ │ - beq.n 472de │ │ + beq.n 47632 │ │ ldr r0, [sp, #24] │ │ str r1, [sp, #28] │ │ add.w r8, r0, r1, lsl #6 │ │ ldrd r5, r6, [r8, #44] @ 0x2c │ │ - cbz r6, 47370 │ │ + cbz r6, 476c4 │ │ movs r7, #0 │ │ - b.n 47344 │ │ + b.n 47698 │ │ cmp r7, r6 │ │ - beq.n 47370 │ │ + beq.n 476c4 │ │ ldr.w r1, [r5, r7, lsl #2] │ │ mov r0, r7 │ │ adds r7, #1 │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r4, r3, [r1] │ │ cmp r4, #0 │ │ - bne.n 47350 │ │ + bne.n 476a4 │ │ cmp r2, #1 │ │ - bne.n 47340 │ │ + bne.n 47694 │ │ dmb ish │ │ ldr.w r0, [r5, r0, lsl #2] │ │ - bl 476ec │ │ - b.n 47340 │ │ + bl 46a1c │ │ + b.n 47694 │ │ add.w r4, r8, #8 │ │ ldr r0, [r4, #32] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r0, r1, [r4, #12] │ │ cmp r1, #0 │ │ str r4, [sp, #32] │ │ strd r1, r0, [sp, #36] @ 0x24 │ │ - beq.n 47426 │ │ + beq.n 4777a │ │ movs r1, #0 │ │ - b.n 473aa │ │ + b.n 476fe │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldr r0, [r0, #0] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r7 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r1, [sp, #48] @ 0x30 │ │ ldr r0, [sp, #36] @ 0x24 │ │ adds r1, #1 │ │ cmp r1, r0 │ │ - beq.n 47426 │ │ + beq.n 4777a │ │ str r1, [sp, #48] @ 0x30 │ │ add.w r0, r1, r1, lsl #1 │ │ ldr r1, [sp, #40] @ 0x28 │ │ add.w r0, r1, r0, lsl #2 │ │ str r0, [sp, #44] @ 0x2c │ │ ldrd r7, r6, [r0, #4] │ │ cmp r6, #0 │ │ - beq.n 47392 │ │ + beq.n 476e6 │ │ mov.w r8, #0 │ │ - b.n 473dc │ │ + b.n 47730 │ │ ldr.w r0, [sl, #8] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r8, r8, #1 │ │ cmp r8, r6 │ │ - beq.n 47392 │ │ + beq.n 476e6 │ │ add.w r0, r8, r8, lsl #1 │ │ add.w sl, r7, r0, lsl #3 │ │ ldrd r4, r9, [sl, #12] │ │ cmp.w r9, #0 │ │ - beq.n 473c6 │ │ + beq.n 4771a │ │ mov.w fp, #0 │ │ - b.n 473f8 │ │ + b.n 4774c │ │ cmp fp, r9 │ │ - beq.n 473c6 │ │ + beq.n 4771a │ │ ldr.w r1, [r4, fp, lsl #2] │ │ mov r0, fp │ │ add.w fp, fp, #1 │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r5, r3, [r1] │ │ cmp r5, #0 │ │ - bne.n 47406 │ │ + bne.n 4775a │ │ cmp r2, #1 │ │ - bne.n 473f4 │ │ + bne.n 47748 │ │ dmb ish │ │ ldr.w r0, [r4, r0, lsl #2] │ │ - bl 476ec │ │ - b.n 473f4 │ │ + bl 46a1c │ │ + b.n 47748 │ │ ldr r4, [sp, #32] │ │ ldr r0, [r4, #8] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #40] @ 0x28 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r0, r1, [r4, #48] @ 0x30 │ │ mov.w sl, #88 @ 0x58 │ │ cmp r1, #0 │ │ strd r1, r0, [sp, #36] @ 0x24 │ │ - beq.w 47316 │ │ + beq.w 4766a │ │ movs r5, #0 │ │ - b.n 47452 │ │ + b.n 477a6 │ │ ldr r0, [sp, #36] @ 0x24 │ │ cmp r5, r0 │ │ - beq.w 47316 │ │ + beq.w 4766a │ │ add.w r0, r5, r5, lsl #4 │ │ ldr r1, [sp, #40] @ 0x28 │ │ str r5, [sp, #48] @ 0x30 │ │ add.w r0, r1, r0, lsl #3 │ │ str r0, [sp, #44] @ 0x2c │ │ ldrd r5, r8, [r0, #92] @ 0x5c │ │ cmp.w r8, #0 │ │ - beq.n 474fe │ │ + beq.n 47852 │ │ movs r7, #0 │ │ - b.n 4747c │ │ + b.n 477d0 │ │ ldr.w r0, [fp, r0] │ │ - blx d87c0 │ │ + blx d87d0 │ │ adds r7, #1 │ │ cmp r7, r8 │ │ - beq.n 474fe │ │ + beq.n 47852 │ │ mla fp, r7, sl, r5 │ │ movs r1, #1 │ │ ldr.w r0, [fp, #16] │ │ cmp r0, #0 │ │ it mi │ │ eormi.w r1, r0, #2147483648 @ 0x80000000 │ │ cmp r1, #0 │ │ - beq.n 47476 │ │ + beq.n 477ca │ │ cmp r1, #1 │ │ - bne.n 474f2 │ │ + bne.n 47846 │ │ cmp r0, #0 │ │ mov.w sl, #88 @ 0x58 │ │ itt ne │ │ ldrne.w r0, [fp, #20] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r4, r6, [fp, #32] │ │ - cbz r6, 474c8 │ │ + cbz r6, 4781c │ │ add.w r9, r4, #16 │ │ ldr.w r0, [r9] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r9, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r9, r9, #48 @ 0x30 │ │ subs r6, #1 │ │ - bne.n 474b0 │ │ + bne.n 47804 │ │ ldr.w r0, [fp, #28] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [fp, #56] @ 0x38 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [fp, #60] @ 0x3c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [fp, #68] @ 0x44 │ │ cmp r0, #0 │ │ - beq.n 47476 │ │ + beq.n 477ca │ │ movs r0, #72 @ 0x48 │ │ - b.n 4746e │ │ + b.n 477c2 │ │ ldr.w r0, [fp, #72] @ 0x48 │ │ cmp r0, #0 │ │ - beq.n 47476 │ │ + beq.n 477ca │ │ movs r0, #76 @ 0x4c │ │ - b.n 4746e │ │ + b.n 477c2 │ │ ldr r7, [sp, #44] @ 0x2c │ │ ldr r0, [r7, #88] @ 0x58 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r7 │ │ ldrb.w r1, [r0, #8]! │ │ cmp r1, #32 │ │ it ne │ │ - blne 42fcc │ │ + blne 432d4 │ │ ldrd r8, r5, [r7, #104] @ 0x68 │ │ - cbz r5, 47536 │ │ + cbz r5, 4788a │ │ add.w r6, r8, #16 │ │ ldr r0, [r6, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #48 @ 0x30 │ │ subs r5, #1 │ │ - bne.n 47524 │ │ + bne.n 47878 │ │ ldr r0, [r7, #100] @ 0x64 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r8, r5, [r7, #116] @ 0x74 │ │ - cbz r5, 4755e │ │ + cbz r5, 478b2 │ │ add.w r6, r8, #16 │ │ ldr r0, [r6, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #48 @ 0x30 │ │ subs r5, #1 │ │ - bne.n 4754c │ │ + bne.n 478a0 │ │ ldr r0, [r7, #112] @ 0x70 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r5, [sp, #48] @ 0x30 │ │ ldr.w r0, [r7, #128] @ 0x80 │ │ dmb ish │ │ adds r5, #1 │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 47576 │ │ + bne.n 478ca │ │ cmp r1, #1 │ │ - bne.w 4744a │ │ + bne.w 4779e │ │ dmb ish │ │ ldr.w r0, [r7, #128] @ 0x80 │ │ - bl 476ec │ │ - b.n 4744a │ │ + bl 46a1c │ │ + b.n 4779e │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ push {r4, r5, r7, lr} │ │ mov r5, r1 │ │ - cbz r0, 47618 │ │ + cbz r0, 4796c │ │ cmp r0, #1 │ │ - bne.n 47690 │ │ + bne.n 479e4 │ │ add.w r0, r5, #128 @ 0x80 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 475b0 │ │ + bne.n 47904 │ │ cmp r1, #1 │ │ dmb ish │ │ - bne.w 476ea │ │ + bne.w 47a3e │ │ add.w r0, r5, #32 │ │ dmb ish │ │ ldrex r1, [r0] │ │ orr.w r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 475d0 │ │ + bne.n 47924 │ │ lsls r0, r1, #31 │ │ dmb ish │ │ itt eq │ │ addeq.w r0, r5, #64 @ 0x40 │ │ - bleq 46c18 │ │ + bleq 46f6c │ │ add.w r0, r5, #136 @ 0x88 │ │ movs r2, #1 │ │ dmb ish │ │ ldrexb r1, [r0] │ │ strexb r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 475fa │ │ + bne.n 4794e │ │ cmp r1, #0 │ │ dmb ish │ │ - beq.n 476ea │ │ + beq.n 47a3e │ │ mov r0, r5 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w 46eac │ │ + b.w 47200 │ │ add.w r0, r5, #160 @ 0xa0 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 47620 │ │ + bne.n 47974 │ │ cmp r1, #1 │ │ dmb ish │ │ - bne.n 476ea │ │ + bne.n 47a3e │ │ ldr r0, [r5, #72] @ 0x48 │ │ add.w r2, r5, #32 │ │ dmb ish │ │ ldrex r1, [r2] │ │ orr.w r3, r1, r0 │ │ strex r4, r3, [r2] │ │ cmp r4, #0 │ │ - bne.n 47640 │ │ + bne.n 47994 │ │ dmb ish │ │ ldr r0, [r5, #72] @ 0x48 │ │ tst r0, r1 │ │ - bne.n 4766a │ │ + bne.n 479be │ │ add.w r0, r5, #76 @ 0x4c │ │ - bl 46c18 │ │ + bl 46f6c │ │ add.w r0, r5, #112 @ 0x70 │ │ - bl 46c18 │ │ + bl 46f6c │ │ add.w r0, r5, #168 @ 0xa8 │ │ movs r2, #1 │ │ dmb ish │ │ ldrexb r1, [r0] │ │ strexb r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 47674 │ │ + bne.n 479c8 │ │ dmb ish │ │ - cbz r1, 476ea │ │ + cbz r1, 47a3e │ │ mov r0, r5 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w 46e00 │ │ + b.w 47154 │ │ dmb ish │ │ ldrex r0, [r5] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r5] │ │ cmp r2, #0 │ │ - bne.n 47694 │ │ + bne.n 479e8 │ │ cmp r0, #1 │ │ dmb ish │ │ it ne │ │ popne {r4, r5, r7, pc} │ │ add.w r0, r5, #8 │ │ - bl 46f20 │ │ + bl 47274 │ │ add.w r0, r5, #68 @ 0x44 │ │ movs r2, #1 │ │ dmb ish │ │ ldrexb r1, [r0] │ │ strexb r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 476be │ │ + bne.n 47a12 │ │ dmb ish │ │ - cbz r1, 476ea │ │ + cbz r1, 47a3e │ │ add.w r0, r5, #16 │ │ - bl 471fc │ │ + bl 47550 │ │ add.w r0, r5, #40 @ 0x28 │ │ - bl 471fc │ │ + bl 47550 │ │ mov r0, r5 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ pop {r4, r5, r7, pc} │ │ - push {r4, r5, r6, lr} │ │ - ldrd r5, r6, [r0, #8] │ │ - mov r4, r0 │ │ - ldr r1, [r6, #0] │ │ - cmp r1, #0 │ │ - itt ne │ │ - movne r0, r5 │ │ - blxne r1 │ │ - ldr r0, [r6, #4] │ │ - cmp r0, #0 │ │ - itt ne │ │ - movne r0, r5 │ │ - blxne d87c0 │ │ - adds r0, r4, #1 │ │ - beq.n 47736 │ │ - adds r0, r4, #4 │ │ - dmb ish │ │ - ldrex r1, [r0] │ │ - subs r2, r1, #1 │ │ - strex r3, r2, [r0] │ │ - cmp r3, #0 │ │ - bne.n 47714 │ │ - cmp r1, #1 │ │ - it ne │ │ - popne {r4, r5, r6, pc} │ │ - dmb ish │ │ - mov r0, r4 │ │ - ldmia.w sp!, {r4, r5, r6, lr} │ │ - b.w d870c │ │ - pop {r4, r5, r6, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #12 │ │ strd r0, r1, [sp] │ │ - cbz r1, 477c0 │ │ + cbz r1, 47ac8 │ │ mov.w fp, #0 │ │ - b.n 47762 │ │ + b.n 47a6a │ │ ldr r0, [sp, #8] │ │ ldr r0, [r0, #0] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w fp, fp, #1 │ │ ldr r0, [sp, #4] │ │ cmp fp, r0 │ │ - beq.n 477c0 │ │ + beq.n 47ac8 │ │ add.w r0, fp, fp, lsl #1 │ │ ldr r1, [sp, #0] │ │ add.w r0, r1, r0, lsl #2 │ │ str r0, [sp, #8] │ │ ldrd r6, r4, [r0, #4] │ │ cmp r4, #0 │ │ - beq.n 4774a │ │ + beq.n 47a52 │ │ movs r5, #0 │ │ - b.n 4778e │ │ + b.n 47a96 │ │ ldr.w r0, [r8, #8] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r7 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #1 │ │ cmp r5, r4 │ │ - beq.n 4774a │ │ + beq.n 47a52 │ │ add.w r0, r5, r5, lsl #1 │ │ add.w r8, r6, r0, lsl #3 │ │ ldrd r7, r9, [r8, #12] │ │ cmp.w r9, #0 │ │ - beq.n 4777a │ │ + beq.n 47a82 │ │ add.w sl, r7, #16 │ │ ldr.w r0, [sl] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [sl, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w sl, sl, #40 @ 0x28 │ │ subs.w r9, r9, #1 │ │ - bne.n 477a4 │ │ - b.n 4777a │ │ + bne.n 47aac │ │ + b.n 47a82 │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #4 │ │ ldrd r9, sl, [r0, #4] │ │ mov r8, r0 │ │ cmp.w sl, #0 │ │ - beq.n 47822 │ │ + beq.n 47b2a │ │ movs r5, #0 │ │ - b.n 477ee │ │ + b.n 47af6 │ │ ldr r0, [r4, #28] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, fp │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #1 │ │ cmp r5, sl │ │ - beq.n 47822 │ │ + beq.n 47b2a │ │ add.w r0, r5, r5, lsl #1 │ │ add.w r4, r9, r0, lsl #4 │ │ ldr r0, [r4, #16] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #20] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd fp, r7, [r4, #32] │ │ cmp r7, #0 │ │ - beq.n 477dc │ │ + beq.n 47ae4 │ │ add.w r6, fp, #16 │ │ ldr r0, [r6, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #48 @ 0x30 │ │ subs r7, #1 │ │ - bne.n 4780e │ │ - b.n 477dc │ │ + bne.n 47b16 │ │ + b.n 47ae4 │ │ ldr.w r0, [r8] │ │ - cbz r0, 47834 │ │ + cbz r0, 47b3c │ │ mov r0, r9 │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ push {r4, r5, r7, lr} │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ - movs r0, #40 @ 0x28 │ │ + movs r0, #128 @ 0x80 │ │ movs r3, #8 │ │ strd r3, r0, [sp] │ │ movs r5, #4 │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 47876 │ │ + bl 47b7e │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ sub sp, #8 │ │ ldrd r6, r8, [sp, #40] @ 0x28 │ │ mov r4, r0 │ │ mov.w sl, #0 │ │ add.w r0, r6, r8 │ │ negs r7, r6 │ │ subs r0, #1 │ │ ands r0, r7 │ │ umull r5, r7, r0, r3 │ │ movs r0, #1 │ │ movs r3, #4 │ │ cmp r7, #0 │ │ - bne.n 47924 │ │ + bne.n 47c2c │ │ rsb r7, r6, #2147483648 @ 0x80000000 │ │ cmp r5, r7 │ │ - bhi.n 47924 │ │ + bhi.n 47c2c │ │ mov sl, r5 │ │ - cbz r1, 478de │ │ + cbz r1, 47be6 │ │ cmp r6, r5 │ │ - bls.n 47900 │ │ + bls.n 47c08 │ │ movs r0, #0 │ │ mov r5, r1 │ │ mov r9, r2 │ │ str r0, [sp, #0] │ │ mov r1, r6 │ │ mov r0, sp │ │ mov r2, sl │ │ cmp r6, #4 │ │ it ls │ │ movls r1, #4 │ │ - blx d8880 │ │ - cbnz r0, 4791e │ │ + blx d8890 │ │ + cbnz r0, 47c26 │ │ ldr r0, [sp, #0] │ │ - cbz r0, 4791e │ │ + cbz r0, 47c26 │ │ mul.w r2, r8, r5 │ │ mov r1, r9 │ │ mov r6, r0 │ │ - bl d53c6 │ │ + bl d52ea │ │ mov r0, r9 │ │ - blx d87c0 │ │ - b.n 4790c │ │ - cbz r5, 4790c │ │ + blx d87d0 │ │ + b.n 47c14 │ │ + cbz r5, 47c14 │ │ cmp r6, r5 │ │ - bls.n 47914 │ │ + bls.n 47c1c │ │ movs r0, #0 │ │ mov r1, r6 │ │ str r0, [sp, #4] │ │ add r0, sp, #4 │ │ mov r2, sl │ │ cmp r6, #4 │ │ it ls │ │ movls r1, #4 │ │ - blx d8880 │ │ - cbnz r0, 4791e │ │ + blx d8890 │ │ + cbnz r0, 47c26 │ │ ldr r0, [sp, #4] │ │ - cbnz r0, 4790e │ │ - b.n 4791e │ │ + cbnz r0, 47c16 │ │ + b.n 47c26 │ │ mov r0, r2 │ │ mov r1, sl │ │ - blx d8870 │ │ - cbnz r0, 4790e │ │ - b.n 4791e │ │ + blx d8880 │ │ + cbnz r0, 47c16 │ │ + b.n 47c26 │ │ mov r0, r6 │ │ str r0, [r4, #4] │ │ movs r0, #0 │ │ - b.n 47922 │ │ + b.n 47c2a │ │ mov r0, sl │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - bne.n 4790e │ │ + bne.n 47c16 │ │ movs r0, #1 │ │ str r6, [r4, #4] │ │ movs r3, #8 │ │ str.w sl, [r4, r3] │ │ str r0, [r4, #0] │ │ add sp, #8 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ push {r4, r5, r7, lr} │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ movs r0, #24 │ │ + movs r3, #8 │ │ + strd r3, r0, [sp] │ │ movs r5, #4 │ │ - strd r5, r0, [sp] │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 47876 │ │ + bl 47b7e │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r7, lr} │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ - movs r0, #16 │ │ + movs r0, #136 @ 0x88 │ │ movs r3, #8 │ │ strd r3, r0, [sp] │ │ movs r5, #4 │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 47876 │ │ + bl 47b7e │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r7, lr} │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ - movs r0, #64 @ 0x40 │ │ - movs r3, #8 │ │ - strd r3, r0, [sp] │ │ + movs r0, #12 │ │ movs r5, #4 │ │ + strd r5, r0, [sp] │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 47876 │ │ + bl 47b7e │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r7, lr} │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ - movs r0, #24 │ │ + movs r0, #88 @ 0x58 │ │ movs r3, #8 │ │ strd r3, r0, [sp] │ │ movs r5, #4 │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 47876 │ │ + bl 47b7e │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r7, lr} │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ - movs r0, #52 @ 0x34 │ │ + movs r0, #28 │ │ movs r5, #4 │ │ strd r5, r0, [sp] │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 47876 │ │ + bl 47b7e │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r7, lr} │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ - movs r0, #48 @ 0x30 │ │ - movs r3, #8 │ │ - strd r3, r0, [sp] │ │ + movs r0, #16 │ │ movs r5, #4 │ │ + strd r5, r0, [sp] │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 47876 │ │ + bl 47b7e │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r7, lr} │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ - movs r0, #136 @ 0x88 │ │ - movs r3, #8 │ │ - strd r3, r0, [sp] │ │ movs r5, #4 │ │ + strd r5, r5, [sp] │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 47876 │ │ + bl 47b7e │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r7, lr} │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ - movs r0, #28 │ │ + movs r0, #16 │ │ + movs r3, #8 │ │ + strd r3, r0, [sp] │ │ movs r5, #4 │ │ - strd r5, r0, [sp] │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 47876 │ │ + bl 47b7e │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r7, lr} │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ - movs r0, #8 │ │ + movs r0, #48 @ 0x30 │ │ + movs r3, #8 │ │ + strd r3, r0, [sp] │ │ movs r5, #4 │ │ - strd r0, r0, [sp] │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 47876 │ │ + bl 47b7e │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r7, lr} │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ - movs r0, #16 │ │ + movs r0, #40 @ 0x28 │ │ + movs r3, #8 │ │ + strd r3, r0, [sp] │ │ movs r5, #4 │ │ - strd r5, r0, [sp] │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 47876 │ │ + bl 47b7e │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r7, lr} │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ - movs r0, #128 @ 0x80 │ │ + movs r0, #64 @ 0x40 │ │ movs r3, #8 │ │ strd r3, r0, [sp] │ │ movs r5, #4 │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 47876 │ │ + bl 47b7e │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r7, lr} │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ + movs r0, #52 @ 0x34 │ │ movs r5, #4 │ │ - strd r5, r5, [sp] │ │ + strd r5, r0, [sp] │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 47876 │ │ + bl 47b7e │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r7, lr} │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ - movs r0, #88 @ 0x58 │ │ - movs r3, #8 │ │ - strd r3, r0, [sp] │ │ + movs r0, #24 │ │ movs r5, #4 │ │ + strd r5, r0, [sp] │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 47876 │ │ + bl 47b7e │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r7, lr} │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ - movs r0, #56 @ 0x38 │ │ - movs r3, #8 │ │ - strd r3, r0, [sp] │ │ + movs r0, #8 │ │ movs r5, #4 │ │ + strd r0, r0, [sp] │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 47876 │ │ + bl 47b7e │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r7, lr} │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ - movs r0, #12 │ │ + movs r0, #56 @ 0x38 │ │ + movs r3, #8 │ │ + strd r3, r0, [sp] │ │ movs r5, #4 │ │ - strd r5, r0, [sp] │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 47876 │ │ + bl 47b7e │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r6, lr} │ │ sub sp, #24 │ │ ldr r3, [r0, #0] │ │ mov r4, r1 │ │ movs r1, #17 │ │ cmp r3, #0 │ │ it mi │ │ eormi.w r1, r3, #2147483648 @ 0x80000000 │ │ tbb [pc, r1] │ │ ldrsh r1, [r1, r0] │ │ - ldr r4, [pc, #272] @ (47dd0 ) │ │ + ldr r4, [pc, #272] @ (480d8 ) │ │ ldrb r1, [r5, #28] │ │ strb r5, [r1, r6] │ │ subs r3, #167 @ 0xa7 │ │ movs r0, #150 @ 0x96 │ │ ldrh r2, [r6, #0] │ │ - ldr r1, [pc, #108] @ (47d38 ) │ │ + ldr r1, [pc, #108] @ (48040 ) │ │ str r2, [r2, #112] @ 0x70 │ │ - ldr r1, [pc, #364] @ (47e3c ) │ │ + ldr r1, [pc, #364] @ (48144 ) │ │ mov r0, r4 │ │ ldr r3, [r2, #12] │ │ movs r2, #58 @ 0x3a │ │ add r1, pc │ │ add sp, #24 │ │ ldmia.w sp!, {r4, r5, r6, lr} │ │ bx r3 │ │ - ldr r1, [pc, #408] @ (47e78 ) │ │ + ldr r1, [pc, #408] @ (48180 ) │ │ mov r0, r4 │ │ ldr r3, [r2, #12] │ │ movs r2, #63 @ 0x3f │ │ add r1, pc │ │ add sp, #24 │ │ ldmia.w sp!, {r4, r5, r6, lr} │ │ bx r3 │ │ - ldr r1, [pc, #320] @ (47e34 ) │ │ - ldr r5, [pc, #324] @ (47e38 ) │ │ + ldr r1, [pc, #320] @ (4813c ) │ │ + ldr r5, [pc, #324] @ (48140 ) │ │ add r1, pc │ │ add r5, pc │ │ - b.n 47dee │ │ - ldr r1, [pc, #368] @ (47e6c ) │ │ + b.n 480f6 │ │ + ldr r1, [pc, #368] @ (48174 ) │ │ mov r0, r4 │ │ ldr r3, [r2, #12] │ │ movs r2, #25 │ │ add r1, pc │ │ add sp, #24 │ │ ldmia.w sp!, {r4, r5, r6, lr} │ │ bx r3 │ │ - ldr r1, [pc, #324] @ (47e54 ) │ │ + ldr r1, [pc, #324] @ (4815c ) │ │ mov r0, r4 │ │ ldr r3, [r2, #12] │ │ movs r2, #22 │ │ add r1, pc │ │ add sp, #24 │ │ ldmia.w sp!, {r4, r5, r6, lr} │ │ bx r3 │ │ - ldr r1, [pc, #336] @ (47e70 ) │ │ + ldr r1, [pc, #336] @ (48178 ) │ │ mov r0, r4 │ │ ldr r3, [r2, #12] │ │ movs r2, #13 │ │ add r1, pc │ │ add sp, #24 │ │ ldmia.w sp!, {r4, r5, r6, lr} │ │ bx r3 │ │ - ldr r1, [pc, #308] @ (47e68 ) │ │ + ldr r1, [pc, #308] @ (48170 ) │ │ mov r0, r4 │ │ ldr r3, [r2, #12] │ │ movs r2, #19 │ │ add r1, pc │ │ add sp, #24 │ │ ldmia.w sp!, {r4, r5, r6, lr} │ │ bx r3 │ │ - ldr r1, [pc, #216] @ (47e1c ) │ │ - ldr r5, [pc, #216] @ (47e20 ) │ │ + ldr r1, [pc, #216] @ (48124 ) │ │ + ldr r5, [pc, #216] @ (48128 ) │ │ add r1, pc │ │ add r5, pc │ │ - b.n 47dee │ │ - ldr r1, [pc, #292] @ (47e74 ) │ │ + b.n 480f6 │ │ + ldr r1, [pc, #292] @ (4817c ) │ │ add r1, pc │ │ - b.n 47dd8 │ │ - ldr r1, [pc, #252] @ (47e50 ) │ │ + b.n 480e0 │ │ + ldr r1, [pc, #252] @ (48158 ) │ │ mov r0, r4 │ │ ldr r3, [r2, #12] │ │ movs r2, #21 │ │ add r1, pc │ │ add sp, #24 │ │ ldmia.w sp!, {r4, r5, r6, lr} │ │ bx r3 │ │ - ldr r1, [pc, #248] @ (47e60 ) │ │ + ldr r1, [pc, #248] @ (48168 ) │ │ mov r0, r4 │ │ ldr r3, [r2, #12] │ │ movs r2, #52 @ 0x34 │ │ add r1, pc │ │ add sp, #24 │ │ ldmia.w sp!, {r4, r5, r6, lr} │ │ bx r3 │ │ - ldr r1, [pc, #212] @ (47e4c ) │ │ + ldr r1, [pc, #212] @ (48154 ) │ │ mov r0, r4 │ │ ldr r3, [r2, #12] │ │ movs r2, #76 @ 0x4c │ │ add r1, pc │ │ add sp, #24 │ │ ldmia.w sp!, {r4, r5, r6, lr} │ │ bx r3 │ │ - ldr r1, [pc, #180] @ (47e40 ) │ │ + ldr r1, [pc, #180] @ (48148 ) │ │ add.w r5, r0, #12 │ │ - ldr r3, [pc, #180] @ (47e44 ) │ │ - ldr r6, [pc, #180] @ (47e48 ) │ │ + ldr r3, [pc, #180] @ (4814c ) │ │ + ldr r6, [pc, #180] @ (48150 ) │ │ add r1, pc │ │ strd r5, r0, [sp] │ │ add r0, sp, #4 │ │ add r3, pc │ │ add r6, pc │ │ strd r3, r0, [sp, #12] │ │ mov r0, sp │ │ add r3, sp, #8 │ │ str r1, [sp, #20] │ │ str r0, [sp, #8] │ │ mov r1, r2 │ │ mov r0, r4 │ │ mov r2, r6 │ │ - bl 3ef94 │ │ + bl 3f29c │ │ add sp, #24 │ │ pop {r4, r5, r6, pc} │ │ - ldr r1, [pc, #156] @ (47e58 ) │ │ + ldr r1, [pc, #156] @ (48160 ) │ │ mov r0, r4 │ │ ldr r3, [r2, #12] │ │ movs r2, #27 │ │ add r1, pc │ │ add sp, #24 │ │ ldmia.w sp!, {r4, r5, r6, lr} │ │ bx r3 │ │ - ldr r1, [pc, #96] @ (47e2c ) │ │ - ldr r5, [pc, #96] @ (47e30 ) │ │ + ldr r1, [pc, #96] @ (48134 ) │ │ + ldr r5, [pc, #96] @ (48138 ) │ │ add r1, pc │ │ add r5, pc │ │ - b.n 47dee │ │ - ldr r1, [pc, #132] @ (47e5c ) │ │ + b.n 480f6 │ │ + ldr r1, [pc, #132] @ (48164 ) │ │ add r1, pc │ │ ldr r3, [r2, #12] │ │ mov r0, r4 │ │ movs r2, #67 @ 0x43 │ │ add sp, #24 │ │ ldmia.w sp!, {r4, r5, r6, lr} │ │ bx r3 │ │ - ldr r1, [pc, #60] @ (47e24 ) │ │ - ldr r5, [pc, #60] @ (47e28 ) │ │ + ldr r1, [pc, #60] @ (4812c ) │ │ + ldr r5, [pc, #60] @ (48130 ) │ │ add r1, pc │ │ add r5, pc │ │ adds r0, #4 │ │ str r0, [sp, #4] │ │ add r0, sp, #4 │ │ str r1, [sp, #12] │ │ str r0, [sp, #8] │ │ mov r1, r2 │ │ add r3, sp, #8 │ │ mov r0, r4 │ │ mov r2, r5 │ │ - bl 3ef94 │ │ + bl 3f29c │ │ add sp, #24 │ │ pop {r4, r5, r6, pc} │ │ - ldr r1, [pc, #88] @ (47e64 ) │ │ + ldr r1, [pc, #88] @ (4816c ) │ │ mov r0, r4 │ │ ldr r3, [r2, #12] │ │ movs r2, #31 │ │ add r1, pc │ │ add sp, #24 │ │ ldmia.w sp!, {r4, r5, r6, lr} │ │ bx r3 │ │ nop │ │ lsls r3, r6, #4 │ │ movs r0, r0 │ │ - str r2, [r3, #32] │ │ + str r6, [r0, #0] │ │ vshr.u64 d16, d11, #4 │ │ movs r0, r0 │ │ - lsls r0, r7, #14 │ │ + lsls r0, r6, #2 │ │ vshr.u64 d16, d23, #4 │ │ movs r0, r0 │ │ - strh r7, [r4, #8] │ │ + ldrb r1, [r6, #25] │ │ vsra.u64 d16, d1, #4 │ │ movs r0, r0 │ │ - asrs r5, r1, #7 │ │ - vtbx.8 d30, {d12-d14}, d30 │ │ + lsrs r3, r2, #24 │ │ + vqabs.s q15, q11 │ │ vshr.u64 q8, , #4 │ │ movs r0, r0 │ │ lsls r1, r7, #3 │ │ movs r0, r0 │ │ - asrs r7, r6, #4 │ │ - @ instruction: 0xfffce9fe │ │ - vtbx.8 d30, {d12-d14}, d30 │ │ - vtbx.8 d30, {d28-d30}, d9 │ │ - vshll.u32 q15, d19, #28 │ │ - vshll.u32 q15, d24, #28 │ │ - vtbx.8 d30, {d28-d30}, d21 │ │ - @ instruction: 0xfffcea75 │ │ - vtbx.8 d30, {d12-d15}, d28 │ │ - @ instruction: 0xfffcebb5 │ │ - vtbl.8 d30, {d28-d31}, d26 │ │ - vtbl.8 d30, {d28-d31}, d15 │ │ - vcvt.f16.u16 d30, d26, #4 │ │ + lsrs r5, r7, #21 │ │ + vqshlu.s64 q15, q11, #60 @ 0x3c │ │ + vqabs.s q15, q11 │ │ + vqneg.s q15, │ │ + vqabs.s d30, d27 │ │ + vqshl.u32 d30, d16, #28 │ │ + vqshl.u64 q15, , #60 @ 0x3c │ │ + vqabs.s q15, │ │ + vtbx.8 d30, {d12}, d20 │ │ + vtbl.8 d30, {d28}, d29 │ │ + vtbl.8 d30, {d28}, d18 │ │ + vtbl.8 d30, {d28}, d7 │ │ + vqshrn.u64 d30, q9, #4 │ │ vtbl.8 d22, {d12}, d0 │ │ ldrd r1, r2, [r1] │ │ ldr r0, [r0, #0] │ │ - b.w 47ca4 │ │ + b.w 47fac │ │ ldr r0, [r0, #0] │ │ mov r3, r1 │ │ ldrd r1, r2, [r0, #4] │ │ mov r0, r3 │ │ - b.w 3ffd4 │ │ + b.w 402dc │ │ push {r4, r5, r6, lr} │ │ sub sp, #24 │ │ ldr r0, [r0, #0] │ │ add.w r5, sp, #14 │ │ mov r4, r1 │ │ mov r1, r5 │ │ ldr r6, [r0, #0] │ │ cmp r6, #0 │ │ mov r0, r6 │ │ it mi │ │ negmi r0, r6 │ │ - bl 40458 │ │ + bl 40760 │ │ rsb r1, r0, #10 │ │ add r0, r5 │ │ movs r2, #1 │ │ movs r3, #0 │ │ strd r0, r1, [sp] │ │ mvns r0, r6 │ │ lsrs r1, r0, #31 │ │ mov r0, r4 │ │ - bl 3f0a0 │ │ + bl 3f3a8 │ │ add sp, #24 │ │ pop {r4, r5, r6, pc} │ │ - bmi.n 47e7a │ │ + bmi.n 48182 │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #36 @ 0x24 │ │ ldrd r4, r7, [r1] │ │ mov r5, r1 │ │ ldr r6, [r7, #12] │ │ movs r2, #17 │ │ - ldr r1, [pc, #152] @ (47f78 ) │ │ + ldr r1, [pc, #152] @ (48280 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx r6 │ │ - cbz r0, 47eee │ │ + cbz r0, 481f6 │ │ movs r0, #1 │ │ add sp, #36 @ 0x24 │ │ pop {r4, r5, r6, r7, pc} │ │ ldrb r0, [r5, #10] │ │ lsls r0, r0, #24 │ │ - bmi.n 47f18 │ │ - ldr r1, [pc, #132] @ (47f7c ) │ │ + bmi.n 48220 │ │ + ldr r1, [pc, #132] @ (48284 ) │ │ mov r0, r4 │ │ movs r2, #1 │ │ movs r7, #1 │ │ add r1, pc │ │ blx r6 │ │ mov r1, r0 │ │ mov r0, r7 │ │ - cbnz r1, 47f72 │ │ - ldr r1, [pc, #120] @ (47f80 ) │ │ + cbnz r1, 4827a │ │ + ldr r1, [pc, #120] @ (48288 ) │ │ mov r0, r5 │ │ movs r2, #2 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 47ee8 │ │ - b.n 47f68 │ │ - ldr r1, [pc, #104] @ (47f84 ) │ │ + bne.n 481f0 │ │ + b.n 48270 │ │ + ldr r1, [pc, #104] @ (4828c ) │ │ mov r0, r4 │ │ movs r2, #2 │ │ add r1, pc │ │ blx r6 │ │ mov r1, r0 │ │ movs r0, #1 │ │ - cbnz r1, 47f72 │ │ - ldr r2, [pc, #92] @ (47f88 ) │ │ + cbnz r1, 4827a │ │ + ldr r2, [pc, #92] @ (48290 ) │ │ add.w r3, sp, #19 │ │ - ldr r1, [pc, #92] @ (47f8c ) │ │ + ldr r1, [pc, #92] @ (48294 ) │ │ add r2, pc │ │ str r3, [sp, #12] │ │ strb.w r0, [sp, #19] │ │ add r1, pc │ │ ldrd r0, r3, [r5, #8] │ │ str r2, [sp, #24] │ │ add r2, sp, #4 │ │ strd r0, r3, [sp, #28] │ │ add r0, sp, #20 │ │ str r2, [sp, #20] │ │ movs r2, #2 │ │ str r7, [sp, #8] │ │ str r4, [sp, #4] │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 47ee8 │ │ - ldr r1, [pc, #52] @ (47f90 ) │ │ + bne.n 481f0 │ │ + ldr r1, [pc, #52] @ (48298 ) │ │ add r0, sp, #4 │ │ movs r2, #2 │ │ add r1, pc │ │ - bl 40a2c │ │ + bl 40d34 │ │ cmp r0, #0 │ │ - bne.n 47ee8 │ │ - ldr r1, [pc, #40] @ (47f94 ) │ │ + bne.n 481f0 │ │ + ldr r1, [pc, #40] @ (4829c ) │ │ mov r0, r4 │ │ movs r2, #1 │ │ add r1, pc │ │ blx r6 │ │ add sp, #36 @ 0x24 │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - @ instruction: 0xea7dfffc │ │ - bl 3fdf78 │ │ - bl 38af7c │ │ - add r3, sp, #64 @ 0x40 │ │ - vpadal.u q9, q14 │ │ - movs r1, r1 │ │ - bl 35ef88 │ │ - add r2, sp, #824 @ 0x338 │ │ - @ instruction: 0xfffcf345 │ │ + b.n 4816e │ │ + vrev32. d31, d28 │ │ + vshr.u32 d31, d25, #4 │ │ + vtbl.8 d26, {d12}, d8 │ │ + vrsra.u64 q9, q10, #4 │ │ + movs r1, r1 │ │ + bl 56290 │ │ + add r7, pc, #792 @ (adr r7, 485b4 ) │ │ + vshr.u32 d31, d28, #4 │ │ vtbl.8 d30, {d12-d13}, d29 │ │ - ldr r7, [pc, #960] @ (4835c ) │ │ + ldr r7, [pc, #960] @ (48664 ) │ │ sub sp, #12 │ │ mov r1, r0 │ │ ldrd r2, r0, [r0] │ │ movs r3, #0 │ │ cmp r2, #1 │ │ str r3, [r1, #0] │ │ - bne.w 4818c │ │ + bne.w 48494 │ │ ldr.w r8, [r1, #16] │ │ mvn.w r2, #2147483648 @ 0x80000000 │ │ ldr.w ip, [r8, #16] │ │ cmp ip, r2 │ │ - bcs.w 48194 │ │ + bcs.w 4849c │ │ ldrd r5, r9, [r1, #8] │ │ movw r1, #31829 @ 0x7c55 │ │ movt r1, #32586 @ 0x7f4a │ │ mov fp, r8 │ │ ldr.w r3, [fp, #24]! │ │ add.w r4, ip, #1 │ │ mul.w r2, r5, r1 │ │ ldr.w r1, [fp, #16] │ │ str.w r4, [fp, #-8] │ │ ands r3, r2 │ │ cmp r1, r3 │ │ - bls.w 481b4 │ │ + bls.w 484bc │ │ ldr.w r2, [r8, #36] @ 0x24 │ │ add.w r3, r3, r3, lsl #1 │ │ add.w lr, r2, r3, lsl #2 │ │ ldrd r3, r2, [lr, #4] │ │ lsls r2, r2, #4 │ │ - cbz r2, 4805e │ │ + cbz r2, 48366 │ │ ldrd r4, r7, [r3], #16 │ │ subs r2, #16 │ │ eor.w r7, r7, r9 │ │ eors r4, r5 │ │ orrs r7, r4 │ │ - bne.n 47ffc │ │ + bne.n 48304 │ │ ldr.w r1, [r8] │ │ mvn.w r2, #2147483648 @ 0x80000000 │ │ str.w ip, [r8, #16] │ │ cmp r1, r2 │ │ - bcs.w 481a4 │ │ + bcs.w 484ac │ │ ldr.w r4, [r8, #12] │ │ cmp r4, #3 │ │ - bcs.n 4811c │ │ + bcs.n 48424 │ │ cmp r1, #0 │ │ - bne.w 481ac │ │ + bne.w 484b4 │ │ ldr.w r1, [r8, #4] │ │ mov.w r2, #4294967295 @ 0xffffffff │ │ str.w r2, [r8] │ │ cmp r4, r1 │ │ - beq.w 4817c │ │ + beq.w 48484 │ │ ldr.w r1, [r8, #8] │ │ str.w r0, [r1, r4, lsl #2] │ │ adds r1, r4, #1 │ │ ldr.w r0, [r8] │ │ str.w r1, [r8, #12] │ │ adds r0, #1 │ │ str.w r0, [r8] │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ cmp.w ip, #0 │ │ str.w ip, [r8, #16] │ │ - bne.w 4819c │ │ + bne.w 484a4 │ │ mov.w r2, #4294967295 @ 0xffffffff │ │ str.w r2, [r8, #16] │ │ ldr.w sl, [lr, #8] │ │ cmp.w sl, #0 │ │ - beq.n 4809e │ │ + beq.n 483a6 │ │ ldr.w ip, [lr, #4] │ │ mov.w r2, sl, lsl #4 │ │ movs r3, #0 │ │ mov r4, ip │ │ ldrd r7, r6, [r4] │ │ eor.w r6, r6, r9 │ │ eors r7, r5 │ │ orrs r7, r6 │ │ - beq.n 48126 │ │ + beq.n 4842e │ │ adds r3, #1 │ │ adds r4, #16 │ │ subs r2, #16 │ │ - bne.n 48088 │ │ + bne.n 48390 │ │ ldr.w r2, [r8, #48] @ 0x30 │ │ movs r7, #1 │ │ adds r2, #1 │ │ str.w r2, [r8, #48] @ 0x30 │ │ ldr.w r2, [lr] │ │ cmp sl, r2 │ │ - beq.n 48168 │ │ + beq.n 48470 │ │ ldr.w r3, [lr, #4] │ │ mov.w r6, sl, lsl #4 │ │ ldr.w r2, [r8, #48] @ 0x30 │ │ str r5, [r3, r6] │ │ add.w r3, r3, sl, lsl #4 │ │ add.w r6, sl, #1 │ │ strd r9, r0, [r3, #4] │ │ lsls r0, r2, #29 │ │ str.w r6, [lr, #8] │ │ - bmi.n 480ee │ │ + bmi.n 483f6 │ │ cmp r7, #0 │ │ itt eq │ │ moveq r0, r4 │ │ - blxeq 9ca04 │ │ + blxeq 9ca10 │ │ ldr.w r0, [r8, #16] │ │ adds r0, #1 │ │ str.w r0, [r8, #16] │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov.w r5, #1000 @ 0x3e8 │ │ mul.w r0, r2, r5 │ │ - blx d5af0 │ │ + blx d5b00 │ │ ldr.w r1, [r8, #52] @ 0x34 │ │ cmp r0, r1 │ │ - bls.n 480d4 │ │ + bls.n 483dc │ │ mov r0, fp │ │ - bl 481dc │ │ + bl 484e4 │ │ ldr.w r1, [r8, #40] @ 0x28 │ │ ldr.w r2, [r8, #48] @ 0x30 │ │ cmp r1, #0 │ │ - bne.n 480f2 │ │ - ldr r0, [pc, #180] @ (481cc ) │ │ + bne.n 483fa │ │ + ldr r0, [pc, #180] @ (484d4 ) │ │ add r0, pc │ │ - bl 409c4 │ │ + bl 40ccc │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d873c │ │ + b.w d874c │ │ sub.w sl, sl, #1 │ │ str.w lr, [sp, #8] │ │ mov.w r2, sl, lsl #4 │ │ add.w r7, ip, sl, lsl #4 │ │ ldr.w lr, [ip, r2] │ │ ldrd r6, r2, [r7, #4] │ │ ldr r7, [r7, #12] │ │ @@ -47939,252 +48132,252 @@ │ │ ldr r4, [r2, #8] │ │ strd r3, r7, [r2, #8] │ │ movs r7, #0 │ │ str.w sl, [lr, #8] │ │ str r6, [r2, #4] │ │ ldr.w r2, [lr] │ │ cmp sl, r2 │ │ - bne.n 480b2 │ │ + bne.n 483ba │ │ str r0, [sp, #8] │ │ mov r0, lr │ │ str r1, [sp, #4] │ │ mov r6, lr │ │ - bl 4796a │ │ + bl 47dd2 │ │ ldrd r1, r0, [sp, #4] │ │ mov lr, r6 │ │ - b.n 480b2 │ │ + b.n 483ba │ │ add.w r1, r8, #4 │ │ mov r5, r0 │ │ mov r0, r1 │ │ - bl 47bba │ │ + bl 47d9a │ │ mov r0, r5 │ │ - b.n 48040 │ │ - ldr r0, [pc, #52] @ (481c4 ) │ │ + b.n 48348 │ │ + ldr r0, [pc, #52] @ (484cc ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #60] @ (481d4 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #60] @ (484dc ) │ │ add r0, pc │ │ - bl 41360 │ │ - ldr r0, [pc, #48] @ (481d0 ) │ │ + bl 41668 │ │ + ldr r0, [pc, #48] @ (484d8 ) │ │ add r0, pc │ │ - bl 4132c │ │ - ldr r0, [pc, #48] @ (481d8 ) │ │ + bl 41634 │ │ + ldr r0, [pc, #48] @ (484e0 ) │ │ add r0, pc │ │ - bl 41360 │ │ - ldr r0, [pc, #24] @ (481c8 ) │ │ + bl 41668 │ │ + ldr r0, [pc, #24] @ (484d0 ) │ │ add r0, pc │ │ - bl 4132c │ │ - ldr r2, [pc, #8] @ (481c0 ) │ │ + bl 41634 │ │ + ldr r2, [pc, #8] @ (484c8 ) │ │ mov r0, r3 │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ nop │ │ - cmp r0, #244 @ 0xf4 │ │ + movs r5, #252 @ 0xfc │ │ movs r1, r1 │ │ - cmp r1, #94 @ 0x5e │ │ + movs r6, #102 @ 0x66 │ │ movs r1, r1 │ │ - cmp r1, #110 @ 0x6e │ │ + movs r6, #118 @ 0x76 │ │ movs r1, r1 │ │ - cmp r1, #134 @ 0x86 │ │ + movs r6, #142 @ 0x8e │ │ movs r1, r1 │ │ - cmp r1, #142 @ 0x8e │ │ + movs r6, #150 @ 0x96 │ │ movs r1, r1 │ │ - cmp r1, #102 @ 0x66 │ │ + movs r6, #110 @ 0x6e │ │ movs r1, r1 │ │ - cmp r1, #102 @ 0x66 │ │ + movs r6, #110 @ 0x6e │ │ movs r1, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #44 @ 0x2c │ │ mov r8, r0 │ │ ldr r0, [r0, #20] │ │ adds r0, #1 │ │ str.w r0, [r8, #20] │ │ - bcc.w 48300 │ │ + bcc.w 48608 │ │ movs r7, #0 │ │ movs r4, #1 │ │ strd r7, r7, [r8] │ │ add.w r0, r4, r4, lsl #1 │ │ lsls r5, r0, #2 │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 483c8 │ │ + beq.w 486d0 │ │ adds r1, r0, #4 │ │ movs r2, #0 │ │ movs r3, #8 │ │ mov r6, r4 │ │ str.w r2, [r1, #-4] │ │ subs r6, #1 │ │ strd r3, r2, [r1], #12 │ │ - bne.n 48212 │ │ + bne.n 4851a │ │ mov r1, r4 │ │ ldr.w r2, [r8, #8] │ │ str r2, [sp, #16] │ │ ldrd r3, r2, [r8, #12] │ │ strd r1, r0, [r8, #8] │ │ add.w r0, r2, r2, lsl #1 │ │ str.w r8, [sp, #36] @ 0x24 │ │ add.w r5, r3, r0, lsl #2 │ │ str.w r4, [r8, #16] │ │ movs r0, #0 │ │ mov sl, r3 │ │ str r3, [sp, #40] @ 0x28 │ │ str r5, [sp, #20] │ │ - cbz r3, 4827e │ │ - cbz r0, 4825a │ │ + cbz r3, 48586 │ │ + cbz r0, 48562 │ │ cmp r9, fp │ │ - bne.n 4828a │ │ + bne.n 48592 │ │ cmp.w r8, #0 │ │ - beq.n 4825a │ │ - blx d87c0 │ │ + beq.n 48562 │ │ + blx d87d0 │ │ ldr r3, [sp, #40] @ 0x28 │ │ cmp sl, r5 │ │ - beq.w 4839e │ │ + beq.w 486a6 │ │ mov r6, sl │ │ ldr.w r8, [r6], #12 │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ - beq.n 48350 │ │ + beq.n 48658 │ │ ldrd r9, r0, [sl, #4] │ │ mov sl, r6 │ │ add.w fp, r9, r0, lsl #4 │ │ mov r0, r9 │ │ cmp r0, #0 │ │ - bne.n 4824a │ │ - b.n 4825a │ │ + bne.n 48552 │ │ + b.n 48562 │ │ cmp r0, #0 │ │ - beq.w 483b6 │ │ + beq.w 486be │ │ cmp r9, fp │ │ - bne.n 48290 │ │ - b.n 483ae │ │ + bne.n 48598 │ │ + b.n 486b6 │ │ ldr r1, [sp, #36] @ 0x24 │ │ ldr r7, [r1, #0] │ │ ldr r4, [r1, #16] │ │ ldr.w r2, [r9] │ │ movw r1, #31829 @ 0x7c55 │ │ movt r1, #32586 @ 0x7f4a │ │ str r7, [sp, #32] │ │ muls r1, r2 │ │ ands r1, r7 │ │ cmp r4, r1 │ │ - bls.w 483bc │ │ + bls.w 486c4 │ │ str r2, [sp, #24] │ │ add.w r1, r1, r1, lsl #1 │ │ ldrd lr, r2, [r9, #4] │ │ str r2, [sp, #28] │ │ ldr r2, [sp, #36] @ 0x24 │ │ ldr r2, [r2, #12] │ │ ldr.w ip, [r2, r1, lsl #2] │ │ add.w r1, r2, r1, lsl #2 │ │ ldr r7, [r1, #8] │ │ cmp r7, ip │ │ - beq.n 482ea │ │ + beq.n 485f2 │ │ ldr r6, [r1, #4] │ │ lsls r2, r7, #4 │ │ ldr r5, [sp, #24] │ │ add.w r9, r9, #16 │ │ str r5, [r6, r2] │ │ adds r2, r7, #1 │ │ str r2, [r1, #8] │ │ add.w r1, r6, r7, lsl #4 │ │ ldr r2, [sp, #28] │ │ ldr r7, [sp, #32] │ │ ldr r5, [sp, #20] │ │ strd lr, r2, [r1, #4] │ │ cmp r3, #0 │ │ - bne.n 48248 │ │ - b.n 4827e │ │ + bne.n 48550 │ │ + b.n 48586 │ │ str r0, [sp, #12] │ │ mov r0, r1 │ │ strd r1, lr, [sp, #4] │ │ - bl 4796a │ │ + bl 47dd2 │ │ ldrd r1, lr, [sp, #4] │ │ ldr r3, [sp, #40] @ 0x28 │ │ ldr r0, [sp, #12] │ │ - b.n 482c6 │ │ + b.n 485ce │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r2, #1 │ │ movs r7, #0 │ │ - b.n 4831a │ │ + b.n 48622 │ │ umull r6, r5, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r5, r3, r7, r5 │ │ mla r7, r3, r7, r5 │ │ mov r3, r6 │ │ lsls r6, r0, #31 │ │ - beq.n 4830a │ │ + beq.n 48612 │ │ umull r4, r6, r3, r2 │ │ cmp r0, #1 │ │ - beq.n 48332 │ │ + beq.n 4863a │ │ mla r1, r3, r1, r6 │ │ mla r1, r7, r2, r1 │ │ mov r2, r4 │ │ - b.n 4830a │ │ + b.n 48612 │ │ subs r7, r4, #1 │ │ mov.w r0, #0 │ │ sbc.w r0, r0, #0 │ │ strd r7, r0, [r8] │ │ movw r0, #43690 @ 0xaaaa │ │ movt r0, #2730 @ 0xaaa │ │ cmp r4, r0 │ │ - bls.n 483d0 │ │ - bl 3e03c │ │ + bls.n 486d8 │ │ + bl 3e344 │ │ subs r0, r5, r6 │ │ - beq.n 4839e │ │ + beq.n 486a6 │ │ movw r1, #43691 @ 0xaaab │ │ lsrs r0, r0, #2 │ │ movt r1, #43690 @ 0xaaaa │ │ movs r7, #0 │ │ mul.w r8, r0, r1 │ │ - b.n 4837c │ │ + b.n 48684 │ │ ldr.w r0, [sl] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r9 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r3, [sp, #40] @ 0x28 │ │ adds r7, #1 │ │ cmp r7, r8 │ │ - beq.n 4839e │ │ + beq.n 486a6 │ │ add.w r0, r7, r7, lsl #1 │ │ add.w sl, r6, r0, lsl #2 │ │ ldrd r9, r4, [sl, #4] │ │ cmp r4, #0 │ │ - beq.n 48366 │ │ + beq.n 4866e │ │ add.w r5, r9, #8 │ │ ldr.w r0, [r5], #16 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r4, #1 │ │ - bne.n 48390 │ │ - b.n 48366 │ │ + bne.n 48698 │ │ + b.n 4866e │ │ ldr r0, [sp, #16] │ │ - cbz r0, 483b6 │ │ + cbz r0, 486be │ │ mov r0, r3 │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ mov r3, r0 │ │ cmp.w r8, #0 │ │ - bne.n 483a2 │ │ + bne.n 486aa │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r2, [pc, #28] @ (483dc ) │ │ + ldr r2, [pc, #28] @ (486e4 ) │ │ mov r0, r1 │ │ mov r1, r4 │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ movs r0, #4 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ cmp r4, #0 │ │ - bne.w 481f8 │ │ + bne.w 48500 │ │ movs r1, #0 │ │ movs r0, #4 │ │ - b.n 48220 │ │ - movs r6, #186 @ 0xba │ │ + b.n 48528 │ │ + movs r3, #194 @ 0xc2 │ │ movs r1, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #116 @ 0x74 │ │ mov r8, r0 │ │ ldrb r0, [r1, #0] │ │ mov r5, r1 │ │ ldrd r9, sl, [sp, #152] @ 0x98 │ │ @@ -48235,26 +48428,26 @@ │ │ it ge │ │ movge r1, #1 │ │ subs r2, r3, r4 │ │ sbcs.w r2, r6, r7 │ │ it ge │ │ movge r0, #1 │ │ ands r0, r1 │ │ - b.w 49532 │ │ + b.w 4983a │ │ ldrb r0, [r5, #1] │ │ - b.w 4902a │ │ + b.w 49332 │ │ ldr r2, [r5, #28] │ │ add r0, sp, #88 @ 0x58 │ │ mov r1, r9 │ │ - bl 4299c │ │ + bl 42ca4 │ │ ldr.w sl, [sp, #88] @ 0x58 │ │ movs r4, #17 │ │ movt r4, #32768 @ 0x8000 │ │ cmp.w sl, #2147483648 @ 0x80000000 │ │ - beq.w 4952c │ │ + beq.w 49834 │ │ add.w r4, r5, #16 │ │ add.w fp, r5, #4 │ │ str.w r8, [sp, #36] @ 0x24 │ │ ldmia r4, {r2, r3, r4} │ │ ldmia.w fp, {r0, r1, fp} │ │ subs.w r6, r2, #2147483648 @ 0x80000000 │ │ ldrb.w r7, [r5, #32] │ │ @@ -48263,43 +48456,43 @@ │ │ subs.w r5, r0, #2147483648 @ 0x80000000 │ │ ldrd r8, r0, [sp, #92] @ 0x5c │ │ mov.w r9, r0, lsl #3 │ │ it ne │ │ movne r5, r1 │ │ str.w r8, [sp, #32] │ │ cmp.w r9, #0 │ │ - beq.w 49250 │ │ + beq.w 49558 │ │ ldrd r0, r1, [r8], #8 │ │ mov r2, r5 │ │ mov r3, fp │ │ strd r6, r4, [sp] │ │ str r7, [sp, #8] │ │ - bl 42aa4 │ │ + bl 42dac │ │ sub.w r9, r9, #8 │ │ cmp r0, #0 │ │ - beq.n 484be │ │ + beq.n 487c6 │ │ ldr r1, [sp, #36] @ 0x24 │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ cmp.w sl, #0 │ │ str r0, [r1, #0] │ │ mov.w r0, #1 │ │ strb r0, [r1, #4] │ │ - bne.w 48acc │ │ - b.w 49536 │ │ + bne.w 48dd4 │ │ + b.w 4983e │ │ ldr r2, [r5, #12] │ │ add r0, sp, #88 @ 0x58 │ │ mov r1, r9 │ │ - bl 42814 │ │ + bl 42b1c │ │ ldr r1, [sp, #88] @ 0x58 │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ - beq.w 494a6 │ │ + beq.w 497ae │ │ ldrd r0, r2, [sp, #92] @ 0x5c │ │ cmp r2, #0 │ │ - beq.w 487ba │ │ + beq.w 48ac2 │ │ vldr s0, [r5, #4] │ │ movs r7, #0 │ │ vldr s2, [r5, #8] │ │ lsls r2, r2, #2 │ │ vmov r3, s0 │ │ vcmp.f32 s2, s2 │ │ cmp.w r3, #4294967295 @ 0xffffffff │ │ @@ -48307,195 +48500,195 @@ │ │ movgt r7, #1 │ │ vmrs APSR_nzcv, fpscr │ │ bic.w r3, r3, #2147483648 @ 0x80000000 │ │ sub.w r3, r3, #2139095040 @ 0x7f800000 │ │ clz r3, r3 │ │ mov.w r3, r3, lsr #5 │ │ and.w r3, r3, r7 │ │ - bvs.w 49818 │ │ + bvs.w 49b20 │ │ lsls r3, r3, #31 │ │ - beq.w 4953c │ │ + beq.w 49844 │ │ mov r3, r0 │ │ vldr s0, [r3] │ │ vcmp.f32 s2, s0 │ │ vmrs APSR_nzcv, fpscr │ │ - bls.w 4959a │ │ + bls.w 498a2 │ │ adds r3, #4 │ │ subs r2, #4 │ │ - bne.n 4855a │ │ - b.n 487ba │ │ + bne.n 48862 │ │ + b.n 48ac2 │ │ ldr r2, [r5, #4] │ │ add r0, sp, #88 @ 0x58 │ │ mov r1, r9 │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r0, [sp, #88] @ 0x58 │ │ cmp r0, #1 │ │ - bne.w 49028 │ │ + bne.w 49330 │ │ ldrd r0, r3, [sp, #92] @ 0x5c │ │ ldr.w r2, [r9, #4] │ │ adds r1, r3, r0 │ │ - bcs.w 497aa │ │ + bcs.w 49ab2 │ │ cmp r1, r2 │ │ - bhi.w 497aa │ │ + bhi.w 49ab2 │ │ cmp r3, #0 │ │ - beq.w 49028 │ │ + beq.w 49330 │ │ ldr.w r1, [r9] │ │ ldrb r2, [r5, #9] │ │ add r0, r1 │ │ ldrb r1, [r5, #8] │ │ - b.n 485b2 │ │ + b.n 488ba │ │ adds r0, #1 │ │ subs r3, #1 │ │ - beq.w 49028 │ │ + beq.w 49330 │ │ ldrb r7, [r0, #0] │ │ cmp r2, r7 │ │ - bhi.n 485aa │ │ + bhi.n 488b2 │ │ cmp r1, r7 │ │ - bcc.n 485aa │ │ + bcc.n 488b2 │ │ movs r0, #1 │ │ - b.w 4902a │ │ + b.w 49332 │ │ ldr r0, [r5, #12] │ │ ldr.w r1, [r9, #8] │ │ cmp r1, r0 │ │ - bls.w 48f64 │ │ + bls.w 4926c │ │ ldr.w r1, [r9, #4] │ │ cmp r1, r0 │ │ - bcc.w 497d4 │ │ + bcc.w 49adc │ │ subs r2, r1, r0 │ │ cmp r2, #3 │ │ - bls.w 497bc │ │ + bls.w 49ac4 │ │ ldr.w r1, [r9] │ │ ldr r0, [r1, r0] │ │ vmov s0, r0 │ │ - b.w 48f68 │ │ + b.w 49270 │ │ ldr r2, [r5, #12] │ │ add r0, sp, #88 @ 0x58 │ │ mov r1, r9 │ │ - bl 498b8 │ │ + bl 49bc0 │ │ ldr r1, [sp, #88] @ 0x58 │ │ movs r4, #17 │ │ movt r4, #32768 @ 0x8000 │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ - beq.w 4952c │ │ + beq.w 49834 │ │ ldrd r0, r7, [sp, #92] @ 0x5c │ │ movs r6, #0 │ │ ldrd r3, r2, [r5, #4] │ │ lsls r7, r7, #2 │ │ cmp r7, r6 │ │ - beq.w 49266 │ │ + beq.w 4956e │ │ ldr r5, [r0, r6] │ │ adds r6, #4 │ │ cmp r2, r5 │ │ - bgt.n 48614 │ │ + bgt.n 4891c │ │ cmp r3, r5 │ │ - blt.n 48614 │ │ + blt.n 4891c │ │ str.w r4, [r8] │ │ - b.w 495a4 │ │ + b.w 498ac │ │ ldr r2, [r5, #16] │ │ add r0, sp, #88 @ 0x58 │ │ mov r1, r9 │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r0, [sp, #88] @ 0x58 │ │ cmp r0, #1 │ │ - bne.w 49028 │ │ + bne.w 49330 │ │ ldrd r0, r3, [sp, #92] @ 0x5c │ │ ldr.w r2, [r9, #4] │ │ adds r1, r3, r0 │ │ - bcs.w 497aa │ │ + bcs.w 49ab2 │ │ cmp r1, r2 │ │ - bhi.w 497aa │ │ + bhi.w 49ab2 │ │ ldr.w r1, [r9] │ │ ldrb r7, [r5, #20] │ │ adds r2, r1, r0 │ │ cmp r7, #0 │ │ - beq.w 4928a │ │ + beq.w 49592 │ │ ldrd r0, r1, [r5, #8] │ │ - bl 4244c │ │ - b.w 4902a │ │ + bl 42754 │ │ + b.w 49332 │ │ ldr r0, [r5, #12] │ │ str.w r8, [sp, #36] @ 0x24 │ │ cmp r0, #0 │ │ - beq.w 490c6 │ │ + beq.w 493ce │ │ add.w r0, r0, r0, lsl #3 │ │ ldr r5, [r5, #8] │ │ add r6, sp, #88 @ 0x58 │ │ mov.w r8, #0 │ │ mov.w fp, r0, lsl #3 │ │ mov r0, r6 │ │ mov r1, r5 │ │ mov r2, r4 │ │ mov r3, r7 │ │ strd r9, sl, [sp] │ │ - bl 483e0 │ │ + bl 486e8 │ │ ldrb.w r0, [sp, #92] @ 0x5c │ │ movs r2, #17 │ │ ldr r1, [sp, #88] @ 0x58 │ │ movt r2, #32768 @ 0x8000 │ │ cmp r1, r2 │ │ - bne.w 48f3e │ │ + bne.w 49246 │ │ and.w r1, r0, r8 │ │ lsls r1, r1, #31 │ │ - bne.w 493b2 │ │ + bne.w 496ba │ │ adds r5, #72 @ 0x48 │ │ orr.w r8, r8, r0 │ │ subs.w fp, fp, #72 @ 0x48 │ │ - bne.n 4868a │ │ - b.w 490ca │ │ + bne.n 48992 │ │ + b.w 493d2 │ │ ldr r0, [r5, #12] │ │ str.w r8, [sp, #36] @ 0x24 │ │ movw r8, #17 │ │ movt r8, #32768 @ 0x8000 │ │ - cbz r0, 4870a │ │ + cbz r0, 48a12 │ │ add.w r0, r0, r0, lsl #3 │ │ ldr r5, [r5, #8] │ │ add.w fp, sp, #88 @ 0x58 │ │ lsls r6, r0, #3 │ │ mov r0, fp │ │ mov r1, r5 │ │ mov r2, r4 │ │ mov r3, r7 │ │ strd r9, sl, [sp] │ │ - bl 483e0 │ │ + bl 486e8 │ │ ldr r1, [sp, #88] @ 0x58 │ │ ldrb.w r0, [sp, #92] @ 0x5c │ │ cmp r1, r8 │ │ - bne.w 48f3e │ │ + bne.w 49246 │ │ lsls r0, r0, #31 │ │ - bne.w 48d04 │ │ + bne.w 4900c │ │ adds r5, #72 @ 0x48 │ │ subs r6, #72 @ 0x48 │ │ - bne.n 486e2 │ │ + bne.n 489ea │ │ ldr r1, [sp, #36] @ 0x24 │ │ str.w r8, [r1] │ │ movs r0, #0 │ │ strb r0, [r1, #4] │ │ add sp, #116 @ 0x74 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r0, [r5, #12] │ │ ldr.w r1, [r9, #8] │ │ cmp r1, r0 │ │ - bls.w 48faa │ │ + bls.w 492b2 │ │ ldr.w r1, [r9, #4] │ │ cmp r1, r0 │ │ - bcc.w 497de │ │ + bcc.w 49ae6 │ │ subs r2, r1, r0 │ │ cmp r2, #3 │ │ - bls.w 497bc │ │ + bls.w 49ac4 │ │ ldr.w r1, [r9] │ │ ldr r0, [r1, r0] │ │ - b.w 48fae │ │ + b.w 492b6 │ │ ldr r2, [r5, #24] │ │ add r0, sp, #88 @ 0x58 │ │ mov r1, r9 │ │ - bl 428d4 │ │ + bl 42bdc │ │ ldr r1, [sp, #88] @ 0x58 │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ - beq.w 494a6 │ │ + beq.w 497ae │ │ ldrd r0, r2, [sp, #92] @ 0x5c │ │ - cbz r2, 487ba │ │ + cbz r2, 48ac2 │ │ vldr d16, [r5, #8] │ │ movs r6, #0 │ │ vldr d17, [r5, #16] │ │ lsls r2, r2, #3 │ │ vmov r3, r7, d16 │ │ vcmp.f64 d17, d17 │ │ cmp.w r7, #4294967295 @ 0xffffffff │ │ @@ -48505,77 +48698,77 @@ │ │ bic.w r7, r7, #2147483648 @ 0x80000000 │ │ eor.w r7, r7, #1879048192 @ 0x70000000 │ │ eor.w r7, r7, #267386880 @ 0xff00000 │ │ orr.w r3, r3, r7 │ │ clz r3, r3 │ │ mov.w r3, r3, lsr #5 │ │ and.w r3, r3, r6 │ │ - bvs.w 49846 │ │ + bvs.w 49b4e │ │ lsls r3, r3, #31 │ │ - beq.w 4956c │ │ + beq.w 49874 │ │ mov r3, r0 │ │ vldr d16, [r3] │ │ vcmp.f64 d17, d16 │ │ vmrs APSR_nzcv, fpscr │ │ - bls.w 4959a │ │ + bls.w 498a2 │ │ adds r3, #8 │ │ subs r2, #8 │ │ - bne.n 487a4 │ │ + bne.n 48aac │ │ cmp r1, #0 │ │ it ne │ │ - blxne d87c0 │ │ - b.w 494a6 │ │ + blxne d87d0 │ │ + b.w 497ae │ │ ldr r0, [r5, #24] │ │ movs r3, #0 │ │ ldr.w r1, [r9, #8] │ │ cmp r1, r0 │ │ - bls.w 48fd6 │ │ + bls.w 492de │ │ ldr.w r1, [r9, #4] │ │ cmp r1, r0 │ │ - bcc.w 497e8 │ │ + bcc.w 49af0 │ │ subs r2, r1, r0 │ │ cmp r2, #7 │ │ - bls.w 497c8 │ │ + bls.w 49ad0 │ │ ldr.w r2, [r9] │ │ ldr r1, [r2, r0] │ │ add r0, r2 │ │ ldr r0, [r0, #4] │ │ - b.n 48fdc │ │ + b.n 492e4 │ │ ldr r2, [r5, #16] │ │ add r0, sp, #88 @ 0x58 │ │ mov r1, r9 │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r0, [sp, #88] @ 0x58 │ │ cmp r0, #1 │ │ - bne.w 48c02 │ │ + bne.w 48f0a │ │ ldrd r0, r2, [sp, #92] @ 0x5c │ │ ldr.w r7, [r9, #4] │ │ adds r1, r2, r0 │ │ - bcs.w 497a0 │ │ + bcs.w 49aa8 │ │ cmp r1, r7 │ │ - bhi.w 497a0 │ │ + bhi.w 49aa8 │ │ ldr.w r1, [r9] │ │ ldrb r3, [r5, #20] │ │ add r1, r0 │ │ cmp r3, #0 │ │ - beq.w 492b6 │ │ + beq.w 495be │ │ ldr r3, [r5, #12] │ │ cmp r2, r3 │ │ - bcc.w 48c02 │ │ + bcc.w 48f0a │ │ ldr r0, [r5, #8] │ │ - b.w 4960e │ │ + b.w 49916 │ │ ldr.w r1, [r9, #8] │ │ movs r2, #0 │ │ ldr r0, [r5, #4] │ │ cmp r1, r0 │ │ mov.w r1, #0 │ │ - bls.n 48854 │ │ + bls.n 48b5c │ │ ldr.w r1, [r9, #4] │ │ cmp r0, r1 │ │ - bcs.w 49810 │ │ + bcs.w 49b18 │ │ ldr.w r1, [r9] │ │ ldrb r1, [r1, r0] │ │ ldrb r0, [r5, #8] │ │ movs r7, #17 │ │ movt r7, #32768 @ 0x8000 │ │ ldrb r3, [r5, #9] │ │ str.w r7, [r8] │ │ @@ -48584,701 +48777,701 @@ │ │ mov.w r0, #0 │ │ it cs │ │ movcs r0, #1 │ │ cmp r3, r1 │ │ it ls │ │ movls r2, #1 │ │ ands r0, r2 │ │ - b.w 49532 │ │ + b.w 4983a │ │ movs r6, #17 │ │ cmp.w sl, #0 │ │ movt r6, #32768 @ 0x8000 │ │ - beq.w 48f36 │ │ + beq.w 4923e │ │ ldr r2, [r5, #8] │ │ add r0, sp, #88 @ 0x58 │ │ mov r1, sl │ │ - bl 49d00 │ │ + bl 4a008 │ │ ldrd r0, fp, [sp, #88] @ 0x58 │ │ ldrd sl, r2, [sp, #96] @ 0x60 │ │ ldr.w r9, [sp, #104] @ 0x68 │ │ cmp r0, #2 │ │ - bne.w 491d8 │ │ + bne.w 494e0 │ │ mov.w r4, sl, lsr #8 │ │ movs r7, #0 │ │ - b.w 4972e │ │ + b.w 49a36 │ │ ldr r2, [r5, #16] │ │ add r0, sp, #64 @ 0x40 │ │ mov r1, r9 │ │ - bl 4299c │ │ + bl 42ca4 │ │ ldr.w fp, [sp, #64] @ 0x40 │ │ cmp.w fp, #2147483648 @ 0x80000000 │ │ - beq.w 494a6 │ │ + beq.w 497ae │ │ ldr r0, [sp, #68] @ 0x44 │ │ str r0, [sp, #32] │ │ ldr r0, [sp, #72] @ 0x48 │ │ str.w r8, [sp, #36] @ 0x24 │ │ cmp r0, #0 │ │ - beq.w 49496 │ │ + beq.w 4979e │ │ ldrb r1, [r5, #20] │ │ ldrd r8, r5, [r5, #8] │ │ lsls r1, r1, #31 │ │ - beq.w 493e8 │ │ + beq.w 496f0 │ │ ldr r7, [sp, #32] │ │ add.w r4, r7, r0, lsl #3 │ │ - b.n 488f0 │ │ + b.n 48bf8 │ │ adds r7, #8 │ │ cmp r7, r4 │ │ - beq.w 49496 │ │ + beq.w 4979e │ │ ldr r1, [r7, #0] │ │ cmp r1, #0 │ │ - beq.n 488e8 │ │ + beq.n 48bf0 │ │ ldr r0, [r7, #4] │ │ cmp r0, r5 │ │ - bcc.n 488e8 │ │ + bcc.n 48bf0 │ │ mov r0, r8 │ │ mov r2, r5 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.n 488e8 │ │ - b.n 48ab4 │ │ + bne.n 48bf0 │ │ + b.n 48dbc │ │ ldr r2, [r5, #16] │ │ add r0, sp, #64 @ 0x40 │ │ mov r1, r9 │ │ - bl 4299c │ │ + bl 42ca4 │ │ ldr r0, [sp, #64] @ 0x40 │ │ movs r4, #17 │ │ movt r4, #32768 @ 0x8000 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 4952c │ │ + beq.w 49834 │ │ str r0, [sp, #20] │ │ ldr r0, [sp, #68] @ 0x44 │ │ str r0, [sp, #24] │ │ ldr r0, [sp, #72] @ 0x48 │ │ str.w r8, [sp, #36] @ 0x24 │ │ cmp r0, #0 │ │ - beq.w 4923a │ │ + beq.w 49542 │ │ ldr.w lr, [sp, #24] │ │ ldrd r9, r8, [r5, #8] │ │ add.w r0, lr, r0, lsl #3 │ │ str r0, [sp, #32] │ │ ldrb r0, [r5, #20] │ │ lsls r0, r0, #31 │ │ add.w r0, r9, #1 │ │ str r0, [sp, #28] │ │ - bne.w 490ec │ │ + bne.w 493f4 │ │ sub.w r0, r8, #1 │ │ str r0, [sp, #16] │ │ mov.w sl, #0 │ │ mov r0, lr │ │ mov fp, lr │ │ - b.n 48e4c │ │ + b.n 49154 │ │ ldr r0, [r5, #24] │ │ ldr.w r1, [r9, #8] │ │ cmp r1, r0 │ │ - bls.w 4900c │ │ + bls.w 49314 │ │ ldr.w r1, [r9, #4] │ │ cmp r1, r0 │ │ - bcc.w 497f2 │ │ + bcc.w 49afa │ │ subs r2, r1, r0 │ │ cmp r2, #7 │ │ - bls.w 497c8 │ │ + bls.w 49ad0 │ │ ldr.w r1, [r9] │ │ ldr r2, [r1, r0] │ │ add r0, r1 │ │ ldr r0, [r0, #4] │ │ strd r2, r0, [sp, #40] @ 0x28 │ │ vldr d16, [sp, #40] @ 0x28 │ │ - b.n 49010 │ │ + b.n 49318 │ │ ldr r2, [r5, #4] │ │ add r0, sp, #88 @ 0x58 │ │ mov r1, r9 │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r1, [sp, #88] @ 0x58 │ │ movs r0, #0 │ │ cmp r1, #1 │ │ - bne.w 4902a │ │ + bne.w 49332 │ │ ldr r1, [sp, #96] @ 0x60 │ │ ldrd r2, r3, [r5, #8] │ │ cmp r3, r1 │ │ mov.w r3, #0 │ │ it cs │ │ movcs r3, #1 │ │ cmp r2, r1 │ │ it ls │ │ movls r0, #1 │ │ ands r0, r3 │ │ - b.n 4902a │ │ + b.n 49332 │ │ ldr r2, [r5, #24] │ │ add r0, sp, #88 @ 0x58 │ │ mov r1, r9 │ │ mov sl, r8 │ │ - bl 42384 │ │ + bl 4268c │ │ ldr.w ip, [sp, #88] @ 0x58 │ │ movw r8, #17 │ │ movt r8, #32768 @ 0x8000 │ │ cmp.w ip, #2147483648 @ 0x80000000 │ │ - beq.w 4927a │ │ + beq.w 49582 │ │ ldrd r0, r1, [sp, #92] @ 0x5c │ │ movs r4, #0 │ │ ldrd lr, r9, [r5, #8] │ │ ldrd r7, r6, [r5, #16] │ │ lsls r5, r1, #3 │ │ cmp r5, r4 │ │ - beq.w 49270 │ │ + beq.w 49578 │ │ adds r2, r0, r4 │ │ ldr r1, [r0, r4] │ │ adds r4, #8 │ │ ldr r2, [r2, #4] │ │ subs r3, r1, r7 │ │ sbcs.w r3, r2, r6 │ │ - blt.n 489f2 │ │ + blt.n 48cfa │ │ subs.w r1, lr, r1 │ │ sbcs.w r1, r9, r2 │ │ - blt.n 489f2 │ │ + blt.n 48cfa │ │ movs r1, #1 │ │ cmp.w ip, #0 │ │ str.w r8, [sl] │ │ strb.w r1, [sl, #4] │ │ - bne.w 496ea │ │ - b.w 49536 │ │ + bne.w 499f2 │ │ + b.w 4983e │ │ ldr r2, [r5, #28] │ │ add r0, sp, #88 @ 0x58 │ │ mov r1, r9 │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r0, [sp, #88] @ 0x58 │ │ cmp r0, #1 │ │ - bne.w 49036 │ │ + bne.w 4933e │ │ ldrd r0, r1, [sp, #92] @ 0x5c │ │ ldr.w r2, [r9, #4] │ │ adds r7, r1, r0 │ │ - bcs.w 497b2 │ │ + bcs.w 49aba │ │ cmp r7, r2 │ │ - bhi.w 497b2 │ │ + bhi.w 49aba │ │ ldr.w r2, [r9] │ │ add r0, r2 │ │ - b.n 49038 │ │ + b.n 49340 │ │ ldr r2, [r5, #16] │ │ add r0, sp, #64 @ 0x40 │ │ mov r1, r9 │ │ - bl 4299c │ │ + bl 42ca4 │ │ ldr.w fp, [sp, #64] @ 0x40 │ │ cmp.w fp, #2147483648 @ 0x80000000 │ │ - beq.w 494a6 │ │ + beq.w 497ae │ │ ldr r0, [sp, #68] @ 0x44 │ │ str r0, [sp, #32] │ │ ldr r0, [sp, #72] @ 0x48 │ │ str.w r8, [sp, #36] @ 0x24 │ │ cmp r0, #0 │ │ - beq.w 49496 │ │ + beq.w 4979e │ │ ldrb r1, [r5, #20] │ │ ldrd r8, r5, [r5, #8] │ │ lsls r1, r1, #31 │ │ - beq.w 4943e │ │ + beq.w 49746 │ │ ldr r7, [sp, #32] │ │ add.w r4, r7, r0, lsl #3 │ │ - b.n 48a98 │ │ + b.n 48da0 │ │ adds r7, #8 │ │ cmp r7, r4 │ │ - beq.w 49496 │ │ + beq.w 4979e │ │ ldr r0, [r7, #0] │ │ cmp r0, #0 │ │ - beq.n 48a90 │ │ + beq.n 48d98 │ │ ldr r1, [r7, #4] │ │ cmp r1, r5 │ │ - bcc.n 48a90 │ │ + bcc.n 48d98 │ │ subs r1, r1, r5 │ │ mov r2, r5 │ │ add r1, r0 │ │ mov r0, r8 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.n 48a90 │ │ + bne.n 48d98 │ │ ldr r1, [sp, #36] @ 0x24 │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ cmp.w fp, #0 │ │ str r0, [r1, #0] │ │ mov.w r0, #1 │ │ strb r0, [r1, #4] │ │ - beq.w 49536 │ │ + beq.w 4983e │ │ ldr r0, [sp, #32] │ │ - blx d87c0 │ │ + blx d87d0 │ │ add sp, #116 @ 0x74 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r2, [r5, #16] │ │ add r0, sp, #88 @ 0x58 │ │ mov r1, r9 │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r0, [sp, #88] @ 0x58 │ │ cmp r0, #1 │ │ - bne.w 48f5e │ │ + bne.w 49266 │ │ ldrd r0, r2, [sp, #92] @ 0x5c │ │ ldr.w r7, [r9, #4] │ │ adds r1, r2, r0 │ │ - bcs.w 497a0 │ │ + bcs.w 49aa8 │ │ cmp r1, r7 │ │ - bhi.w 497a0 │ │ + bhi.w 49aa8 │ │ ldr.w r1, [r9] │ │ mov sl, r8 │ │ ldrb r3, [r5, #20] │ │ add r1, r0 │ │ cmp r3, #0 │ │ - beq.w 492cc │ │ + beq.w 495d4 │ │ ldrd r9, lr, [r5, #8] │ │ cmp r2, #0 │ │ - beq.w 49640 │ │ + beq.w 49948 │ │ add.w ip, r9, #1 │ │ movs r5, #0 │ │ movs r7, #0 │ │ mov.w r8, #0 │ │ movs r6, #0 │ │ mov r0, lr │ │ cmp r6, lr │ │ it hi │ │ movhi r0, r6 │ │ - b.n 48b3a │ │ + b.n 48e42 │ │ adds r5, #1 │ │ adds r6, #1 │ │ cmp r5, r2 │ │ - bcs.w 49642 │ │ + bcs.w 4994a │ │ cmp r0, r6 │ │ - beq.n 48b50 │ │ + beq.n 48e58 │ │ ldrb.w r4, [r9, r6] │ │ cmp r4, #63 @ 0x3f │ │ - beq.n 48b30 │ │ + beq.n 48e38 │ │ cmp r4, #42 @ 0x2a │ │ - beq.n 48bb2 │ │ + beq.n 48eba │ │ ldrb r3, [r1, r5] │ │ cmp r3, r4 │ │ - beq.n 48b30 │ │ + beq.n 48e38 │ │ cmp r7, #0 │ │ - beq.w 49796 │ │ + beq.w 49a9e │ │ add.w r5, r8, #1 │ │ cmp r7, lr │ │ - bcs.n 48b80 │ │ + bcs.n 48e88 │ │ mov r8, sl │ │ cmp r5, r2 │ │ - bcs.n 48b70 │ │ + bcs.n 48e78 │ │ ldrb.w r0, [r9, r7] │ │ ldrb r4, [r1, r5] │ │ cmp r4, r0 │ │ - bne.n 48b74 │ │ - b.n 48ba2 │ │ + bne.n 48e7c │ │ + b.n 48eaa │ │ ldrb.w r0, [r9, r7] │ │ cmp r0, #63 @ 0x3f │ │ - beq.n 48ba2 │ │ + beq.n 48eaa │ │ adds r5, #1 │ │ cmp r5, r2 │ │ - bcc.n 48b60 │ │ - b.n 48f5e │ │ + bcc.n 48e68 │ │ + b.n 49266 │ │ cmp r5, r2 │ │ mov r8, r2 │ │ add.w r4, r5, #1 │ │ it hi │ │ movhi r8, r5 │ │ cmp r2, r4 │ │ it hi │ │ movhi r4, r2 │ │ sub.w r0, r8, r5 │ │ mvns r5, r5 │ │ add r4, r5 │ │ cmp r0, r4 │ │ - bls.n 48ba4 │ │ - b.w 49796 │ │ + bls.n 48eac │ │ + b.w 49a9e │ │ mov r8, r5 │ │ add.w r5, r8, #1 │ │ adds r6, r7, #1 │ │ cmp r5, r2 │ │ - bcc.n 48b26 │ │ - b.w 49642 │ │ + bcc.n 48e2e │ │ + b.w 4994a │ │ mov r8, sl │ │ adds r7, r6, #1 │ │ cmp r7, lr │ │ - bcs.w 49774 │ │ + bcs.w 49a7c │ │ ldrb.w r0, [ip, r6] │ │ mov r6, r7 │ │ cmp r0, #42 @ 0x2a │ │ - beq.n 48bb4 │ │ - b.n 48b5a │ │ + beq.n 48ebc │ │ + b.n 48e62 │ │ ldr r2, [r5, #16] │ │ add r0, sp, #88 @ 0x58 │ │ mov r1, r9 │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r0, [sp, #88] @ 0x58 │ │ cmp r0, #1 │ │ - bne.n 48c02 │ │ + bne.n 48f0a │ │ ldrd r0, r2, [sp, #92] @ 0x5c │ │ ldr.w r7, [r9, #4] │ │ adds r1, r2, r0 │ │ - bcs.w 497a0 │ │ + bcs.w 49aa8 │ │ cmp r1, r7 │ │ - bhi.w 497a0 │ │ + bhi.w 49aa8 │ │ ldr.w r1, [r9] │ │ ldrb r3, [r5, #20] │ │ add r1, r0 │ │ cmp r3, #0 │ │ - beq.w 4939c │ │ + beq.w 496a4 │ │ ldr r3, [r5, #12] │ │ cmp r2, r3 │ │ - bcs.w 49608 │ │ + bcs.w 49910 │ │ movs r5, #0 │ │ movs r0, #17 │ │ strb.w r5, [r8, #4] │ │ movt r0, #32768 @ 0x8000 │ │ str.w r0, [r8] │ │ add sp, #116 @ 0x74 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r6, #17 │ │ cmp.w sl, #0 │ │ movt r6, #32768 @ 0x8000 │ │ - beq.w 48f36 │ │ + beq.w 4923e │ │ ldr r1, [r5, #8] │ │ mov r3, sl │ │ ldr r2, [r5, #32] │ │ ldr r0, [r5, #64] @ 0x40 │ │ strd r0, sl, [sp, #8] │ │ mov r0, r8 │ │ strd r4, r7, [sp] │ │ - bl 49afc │ │ + bl 49e04 │ │ ldr.w r0, [r8] │ │ cmp r0, r6 │ │ - bne.w 49536 │ │ + bne.w 4983e │ │ ldrb.w r0, [r8, #4] │ │ eor.w r0, r0, #1 │ │ - b.w 49532 │ │ + b.w 4983a │ │ ldrb r2, [r5, #8] │ │ mov r0, r9 │ │ ldr r1, [r5, #4] │ │ - bl 49978 │ │ - b.n 49062 │ │ + bl 49c80 │ │ + b.n 4936a │ │ ldr r2, [r5, #16] │ │ add r0, sp, #64 @ 0x40 │ │ mov r1, r9 │ │ - bl 4299c │ │ + bl 42ca4 │ │ ldr.w fp, [sp, #64] @ 0x40 │ │ movs r4, #17 │ │ movt r4, #32768 @ 0x8000 │ │ cmp.w fp, #2147483648 @ 0x80000000 │ │ - beq.w 4952c │ │ + beq.w 49834 │ │ ldr r0, [sp, #68] @ 0x44 │ │ str r0, [sp, #36] @ 0x24 │ │ ldr r0, [sp, #72] @ 0x48 │ │ cmp r0, #0 │ │ - beq.w 4951a │ │ + beq.w 49822 │ │ mov.w r9, r0, lsl #3 │ │ ldrb r0, [r5, #20] │ │ ldrd r5, r6, [r5, #8] │ │ lsls r0, r0, #31 │ │ - beq.w 494b2 │ │ + beq.w 497ba │ │ ldr r0, [sp, #36] @ 0x24 │ │ adds r4, r0, #4 │ │ - b.n 48ca6 │ │ + b.n 48fae │ │ adds r4, #8 │ │ subs.w r9, r9, #8 │ │ - beq.w 4951a │ │ + beq.w 49822 │ │ ldr.w r2, [r4, #-4] │ │ cmp r2, #0 │ │ - beq.n 48c9c │ │ + beq.n 48fa4 │ │ ldr r3, [r4, #0] │ │ mov r0, r5 │ │ mov r1, r6 │ │ - bl 4244c │ │ + bl 42754 │ │ cmp r0, #0 │ │ - beq.n 48c9c │ │ - b.w 494f6 │ │ + beq.n 48fa4 │ │ + b.w 497fe │ │ ldr r0, [r5, #12] │ │ str.w r8, [sp, #36] @ 0x24 │ │ movw r8, #17 │ │ movt r8, #32768 @ 0x8000 │ │ - cbz r0, 48d04 │ │ + cbz r0, 4900c │ │ add.w r0, r0, r0, lsl #3 │ │ ldr r5, [r5, #8] │ │ add.w fp, sp, #88 @ 0x58 │ │ lsls r6, r0, #3 │ │ mov r0, fp │ │ mov r1, r5 │ │ mov r2, r4 │ │ mov r3, r7 │ │ strd r9, sl, [sp] │ │ - bl 483e0 │ │ + bl 486e8 │ │ ldr r1, [sp, #88] @ 0x58 │ │ ldrb.w r0, [sp, #92] @ 0x5c │ │ cmp r1, r8 │ │ - bne.w 48f3e │ │ + bne.w 49246 │ │ lsls r0, r0, #31 │ │ - beq.w 4870a │ │ + beq.w 48a12 │ │ adds r5, #72 @ 0x48 │ │ subs r6, #72 @ 0x48 │ │ - bne.n 48cdc │ │ + bne.n 48fe4 │ │ ldr r1, [sp, #36] @ 0x24 │ │ movs r0, #1 │ │ str.w r8, [r1] │ │ strb r0, [r1, #4] │ │ add sp, #116 @ 0x74 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r2, [r5, #8] │ │ add r0, sp, #88 @ 0x58 │ │ mov r1, r9 │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r0, [sp, #88] @ 0x58 │ │ cmp r0, #1 │ │ - bne.w 494a6 │ │ + bne.w 497ae │ │ ldrd r0, r2, [sp, #92] @ 0x5c │ │ ldr.w r7, [r9, #4] │ │ adds r1, r2, r0 │ │ - bcs.w 497a0 │ │ + bcs.w 49aa8 │ │ cmp r1, r7 │ │ - bhi.w 497a0 │ │ + bhi.w 49aa8 │ │ cmp r2, #1 │ │ - bls.w 497fc │ │ + bls.w 49b04 │ │ ldr.w r3, [r9] │ │ ldr r1, [r5, #4] │ │ str r2, [sp, #68] @ 0x44 │ │ add r2, sp, #64 @ 0x40 │ │ ldrh r7, [r3, r0] │ │ add r0, r3 │ │ str r0, [sp, #64] @ 0x40 │ │ movs r0, #0 │ │ mov.w r3, #2147483648 @ 0x80000000 │ │ strd r2, r0, [sp] │ │ mov r0, r8 │ │ movs r2, #0 │ │ str r7, [sp, #72] @ 0x48 │ │ - bl 483e0 │ │ + bl 486e8 │ │ add sp, #116 @ 0x74 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r2, [r5, #4] │ │ add r0, sp, #52 @ 0x34 │ │ mov r1, r9 │ │ - bl 4a0f8 │ │ + bl 4a400 │ │ ldr r7, [sp, #52] @ 0x34 │ │ cmp.w r7, #2147483648 @ 0x80000000 │ │ - beq.w 494a6 │ │ + beq.w 497ae │ │ ldrd r4, r0, [sp, #56] @ 0x38 │ │ ldr r5, [r5, #8] │ │ add.w r1, r0, r0, lsl #1 │ │ lsls r6, r1, #2 │ │ cmp r5, #0 │ │ - beq.w 493ce │ │ + beq.w 496d6 │ │ cmp r0, #0 │ │ str.w r8, [sp, #36] @ 0x24 │ │ - beq.w 493c6 │ │ + beq.w 496ce │ │ add.w fp, sp, #64 @ 0x40 │ │ add.w sl, sp, #88 @ 0x58 │ │ mov.w r8, #0 │ │ mov.w r9, #0 │ │ - b.n 48db6 │ │ + b.n 490be │ │ add.w r9, r9, #12 │ │ cmp r6, r9 │ │ - beq.w 493c6 │ │ + beq.w 496ce │ │ ldr.w r0, [r4, r9] │ │ cmp r0, #0 │ │ - beq.n 48dac │ │ + beq.n 490b4 │ │ add.w r1, r4, r9 │ │ add r3, sp, #64 @ 0x40 │ │ ldrd r1, r2, [r1, #4] │ │ stmia r3!, {r0, r1, r2} │ │ mov r0, sl │ │ mov r1, r5 │ │ movs r2, #0 │ │ movs r3, #0 │ │ strd fp, r8, [sp] │ │ - bl 483e0 │ │ + bl 486e8 │ │ ldrb.w r0, [sp, #92] @ 0x5c │ │ movs r2, #17 │ │ ldr r1, [sp, #88] @ 0x58 │ │ movt r2, #32768 @ 0x8000 │ │ cmp r1, r2 │ │ - bne.w 496c8 │ │ + bne.w 499d0 │ │ lsls r0, r0, #31 │ │ - beq.n 48dac │ │ + beq.n 490b4 │ │ ldr r1, [sp, #36] @ 0x24 │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ str r0, [r1, #0] │ │ movs r0, #1 │ │ strb r0, [r1, #4] │ │ - b.w 496e2 │ │ + b.w 499ea │ │ ldr r1, [r5, #4] │ │ add r0, sp, #88 @ 0x58 │ │ mov r2, r4 │ │ mov r3, r7 │ │ strd r9, sl, [sp] │ │ - bl 483e0 │ │ + bl 486e8 │ │ ldrb.w r0, [sp, #92] @ 0x5c │ │ movs r2, #17 │ │ ldr r1, [sp, #88] @ 0x58 │ │ movt r2, #32768 @ 0x8000 │ │ cmp r1, r2 │ │ - bne.w 49076 │ │ + bne.w 4937e │ │ movs r2, #1 │ │ bic.w r0, r2, r0 │ │ str.w r1, [r8] │ │ - b.n 49532 │ │ + b.n 4983a │ │ movs r4, #1 │ │ ldr r1, [sp, #88] @ 0x58 │ │ cmp r1, #0 │ │ it ne │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ cmp r4, #0 │ │ - bne.w 491b6 │ │ + bne.w 494be │ │ ldr r0, [sp, #32] │ │ cmp fp, r0 │ │ mov r0, fp │ │ - beq.w 4923a │ │ + beq.w 49542 │ │ ldr.w r1, [fp], #8 │ │ cmp r1, #0 │ │ - beq.n 48e42 │ │ + beq.n 4914a │ │ ldr r2, [r0, #4] │ │ add r0, sp, #88 @ 0x58 │ │ - bl 3e320 │ │ + bl 3e628 │ │ ldrd r0, r1, [sp, #92] @ 0x5c │ │ cmp r1, #0 │ │ - beq.n 48f04 │ │ + beq.n 4920c │ │ ldr.w lr, [sp, #28] │ │ movs r3, #0 │ │ movs r4, #0 │ │ mov.w ip, #0 │ │ movs r2, #0 │ │ mov r5, r8 │ │ cmp r2, r8 │ │ it hi │ │ movhi r5, r2 │ │ - b.n 48e84 │ │ + b.n 4918c │ │ adds r3, #1 │ │ adds r2, #1 │ │ cmp r3, r1 │ │ - bcs.n 48f06 │ │ + bcs.n 4920e │ │ cmp r5, r2 │ │ - beq.n 48e9a │ │ + beq.n 491a2 │ │ ldrb.w r6, [r9, r2] │ │ cmp r6, #63 @ 0x3f │ │ - beq.n 48e7c │ │ + beq.n 49184 │ │ cmp r6, #42 @ 0x2a │ │ - beq.n 48ec6 │ │ + beq.n 491ce │ │ ldrb r7, [r0, r3] │ │ cmp r7, r6 │ │ - beq.n 48e7c │ │ + beq.n 49184 │ │ cmp r4, #0 │ │ - beq.n 48f32 │ │ + beq.n 4923a │ │ add.w r3, ip, #1 │ │ cmp r4, r8 │ │ - bcs.n 48ed8 │ │ + bcs.n 491e0 │ │ cmp r3, r1 │ │ - bcs.n 48eb6 │ │ + bcs.n 491be │ │ ldrb.w r2, [r9, r4] │ │ ldrb r7, [r0, r3] │ │ cmp r7, r2 │ │ - bne.n 48eba │ │ - b.n 48ef6 │ │ + bne.n 491c2 │ │ + b.n 491fe │ │ ldrb.w r2, [r9, r4] │ │ cmp r2, #63 @ 0x3f │ │ - beq.n 48ef6 │ │ + beq.n 491fe │ │ adds r3, #1 │ │ cmp r3, r1 │ │ - bcc.n 48ea6 │ │ - b.n 48f32 │ │ + bcc.n 491ae │ │ + b.n 4923a │ │ adds r4, r2, #1 │ │ cmp r4, r8 │ │ - bcs.n 48e30 │ │ + bcs.n 49138 │ │ ldrb.w r2, [lr, r2] │ │ cmp r2, #42 @ 0x2a │ │ mov r2, r4 │ │ - beq.n 48ec6 │ │ - b.n 48ea2 │ │ + beq.n 491ce │ │ + b.n 491aa │ │ mov ip, r1 │ │ cmp r3, r1 │ │ it hi │ │ movhi ip, r3 │ │ adds r6, r3, #1 │ │ sub.w r2, ip, r3 │ │ mvns r3, r3 │ │ cmp r1, r6 │ │ it hi │ │ movhi r6, r1 │ │ add r3, r6 │ │ cmp r2, r3 │ │ - bls.n 48ef8 │ │ - b.n 48f32 │ │ + bls.n 49200 │ │ + b.n 4923a │ │ mov ip, r3 │ │ add.w r3, ip, #1 │ │ adds r2, r4, #1 │ │ cmp r3, r1 │ │ - bcc.n 48e72 │ │ - b.n 48f06 │ │ + bcc.n 4917a │ │ + b.n 4920e │ │ movs r2, #0 │ │ cmp r2, r8 │ │ - bcs.w 48e30 │ │ + bcs.w 49138 │ │ ldr r3, [sp, #16] │ │ add.w r1, r9, r2 │ │ subs r2, r3, r2 │ │ ldrb.w r7, [r1], #1 │ │ subs r2, #1 │ │ adc.w r3, sl, #0 │ │ subs r7, #42 @ 0x2a │ │ clz r7, r7 │ │ mov.w r4, r7, lsr #5 │ │ - bne.w 48e32 │ │ + bne.w 4913a │ │ cmp r3, #0 │ │ - bne.n 48f14 │ │ - b.n 48e32 │ │ + bne.n 4921c │ │ + b.n 4913a │ │ movs r4, #0 │ │ - b.n 48e32 │ │ + b.n 4913a │ │ str.w r6, [r8] │ │ movs r0, #1 │ │ - b.n 49532 │ │ + b.n 4983a │ │ ldr r6, [sp, #36] @ 0x24 │ │ ldr r7, [sp, #100] @ 0x64 │ │ ldr.w r2, [sp, #93] @ 0x5d │ │ ldr.w r3, [sp, #97] @ 0x61 │ │ str r7, [r6, #12] │ │ str.w r3, [r6, #9] │ │ str.w r2, [r6, #5] │ │ strb r0, [r6, #4] │ │ str r1, [r6, #0] │ │ add sp, #116 @ 0x74 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r4, #0 │ │ - b.w 49782 │ │ - vldr s0, [pc, #912] @ 492f8 │ │ + b.w 49a8a │ │ + vldr s0, [pc, #912] @ 49600 │ │ vldr s2, [r5, #8] │ │ vcmp.f32 s2, s0 │ │ vmrs APSR_nzcv, fpscr │ │ - bls.n 48f80 │ │ + bls.n 49288 │ │ vcmp.f32 s2, s2 │ │ vmrs APSR_nzcv, fpscr │ │ - bvc.n 49028 │ │ + bvc.n 49330 │ │ vcmp.f32 s0, s0 │ │ movs r0, #1 │ │ vmrs APSR_nzcv, fpscr │ │ - bvs.n 4902a │ │ + bvs.n 49332 │ │ vldr s2, [r5, #4] │ │ vcmp.f32 s2, s0 │ │ vmrs APSR_nzcv, fpscr │ │ - bge.n 4902a │ │ + bge.n 49332 │ │ vmov r0, s2 │ │ bic.w r1, r0, #2147483648 @ 0x80000000 │ │ cmp.w r1, #2139095040 @ 0x7f800000 │ │ - bne.n 49028 │ │ - b.n 490c0 │ │ + bne.n 49330 │ │ + b.n 493c8 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ movs r3, #17 │ │ ldrd r1, r2, [r5, #4] │ │ movt r3, #32768 @ 0x8000 │ │ str.w r3, [r8] │ │ cmp r1, r0 │ │ mov.w r1, #0 │ │ mov.w r3, #0 │ │ it ge │ │ movge r1, #1 │ │ cmp r2, r0 │ │ it le │ │ movle r3, #1 │ │ and.w r0, r3, r1 │ │ - b.n 49532 │ │ + b.n 4983a │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ movs r1, #0 │ │ movs r2, #17 │ │ ldrd r7, r6, [r5, #8] │ │ ldrd r4, r5, [r5, #16] │ │ movt r2, #32768 @ 0x8000 │ │ str.w r2, [r8] │ │ @@ -49288,998 +49481,998 @@ │ │ it ge │ │ movge r2, #1 │ │ subs r1, r7, r1 │ │ sbcs.w r0, r6, r0 │ │ it ge │ │ movge r3, #1 │ │ and.w r0, r2, r3 │ │ - b.n 49532 │ │ - vldr d16, [pc, #752] @ 49300 │ │ + b.n 4983a │ │ + vldr d16, [pc, #752] @ 49608 │ │ vldr d17, [r5, #16] │ │ vcmp.f64 d17, d16 │ │ vmrs APSR_nzcv, fpscr │ │ - bls.n 49092 │ │ + bls.n 4939a │ │ vcmp.f64 d17, d17 │ │ vmrs APSR_nzcv, fpscr │ │ - bvs.n 49092 │ │ + bvs.n 4939a │ │ movs r0, #0 │ │ movs r1, #17 │ │ movt r1, #32768 @ 0x8000 │ │ str.w r1, [r8] │ │ - b.n 49532 │ │ + b.n 4983a │ │ movs r0, #0 │ │ ldrd r3, r6, [r5, #12] │ │ ldrd r2, ip, [r5, #4] │ │ subs.w r6, r6, #2147483648 @ 0x80000000 │ │ ldrd r4, r7, [r5, #20] │ │ ldrb.w r5, [r5, #32] │ │ it ne │ │ movne r6, r4 │ │ subs.w r2, r2, #2147483648 @ 0x80000000 │ │ strd r6, r7, [sp] │ │ str r5, [sp, #8] │ │ it ne │ │ movne r2, ip │ │ - bl 42aa4 │ │ + bl 42dac │ │ strb.w r0, [r8, #4] │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ str.w r0, [r8] │ │ add sp, #116 @ 0x74 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr.w r2, [sp, #93] @ 0x5d │ │ ldr r7, [sp, #100] @ 0x64 │ │ ldr.w r3, [sp, #97] @ 0x61 │ │ str.w r7, [r8, #12] │ │ str.w r3, [r8, #9] │ │ str.w r2, [r8, #5] │ │ str.w r1, [r8] │ │ - b.n 49532 │ │ + b.n 4983a │ │ vcmp.f64 d16, d16 │ │ movs r0, #1 │ │ vmrs APSR_nzcv, fpscr │ │ - bvs.n 4902a │ │ + bvs.n 49332 │ │ vldr d17, [r5, #8] │ │ vcmp.f64 d17, d16 │ │ vmrs APSR_nzcv, fpscr │ │ - bge.n 4902a │ │ + bge.n 49332 │ │ vmov r1, r0, d17 │ │ bic.w r2, r0, #2147483648 @ 0x80000000 │ │ eor.w r2, r2, #1879048192 @ 0x70000000 │ │ eor.w r2, r2, #267386880 @ 0xff00000 │ │ orrs r1, r2 │ │ - bne.n 49028 │ │ + bne.n 49330 │ │ mvns r0, r0 │ │ lsrs r0, r0, #31 │ │ - b.n 4902a │ │ + b.n 49332 │ │ mov.w r8, #0 │ │ ldr r1, [sp, #36] @ 0x24 │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ str r0, [r1, #0] │ │ and.w r0, r8, #1 │ │ strb r0, [r1, #4] │ │ add sp, #116 @ 0x74 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add.w lr, lr, #8 │ │ ldr r0, [sp, #32] │ │ cmp lr, r0 │ │ - beq.w 4923a │ │ + beq.w 49542 │ │ ldr.w r1, [lr] │ │ cmp r1, #0 │ │ - beq.n 490e0 │ │ + beq.n 493e8 │ │ ldr.w r2, [lr, #4] │ │ cmp r2, #0 │ │ - beq.n 4919a │ │ + beq.n 494a2 │ │ movs r7, #0 │ │ movs r4, #0 │ │ mov.w ip, #0 │ │ movs r3, #0 │ │ mov r5, r8 │ │ cmp r3, r8 │ │ it hi │ │ movhi r5, r3 │ │ - b.n 49118 │ │ + b.n 49420 │ │ adds r7, #1 │ │ adds r3, #1 │ │ cmp r7, r2 │ │ - bcs.n 4919c │ │ + bcs.n 494a4 │ │ cmp r5, r3 │ │ - beq.n 4912e │ │ + beq.n 49436 │ │ ldrb.w r6, [r9, r3] │ │ cmp r6, #63 @ 0x3f │ │ - beq.n 49110 │ │ + beq.n 49418 │ │ cmp r6, #42 @ 0x2a │ │ - beq.n 4915a │ │ + beq.n 49462 │ │ ldrb r0, [r1, r7] │ │ cmp r0, r6 │ │ - beq.n 49110 │ │ + beq.n 49418 │ │ cmp r4, #0 │ │ - beq.n 490e0 │ │ + beq.n 493e8 │ │ add.w r7, ip, #1 │ │ cmp r4, r8 │ │ - bcs.n 4916c │ │ + bcs.n 49474 │ │ cmp r7, r2 │ │ - bcs.n 4914a │ │ + bcs.n 49452 │ │ ldrb.w r3, [r9, r4] │ │ ldrb r0, [r1, r7] │ │ cmp r0, r3 │ │ - bne.n 4914e │ │ - b.n 4918c │ │ + bne.n 49456 │ │ + b.n 49494 │ │ ldrb.w r3, [r9, r4] │ │ cmp r3, #63 @ 0x3f │ │ - beq.n 4918c │ │ + beq.n 49494 │ │ adds r7, #1 │ │ cmp r7, r2 │ │ - bcc.n 4913a │ │ - b.n 490e0 │ │ + bcc.n 49442 │ │ + b.n 493e8 │ │ adds r4, r3, #1 │ │ cmp r4, r8 │ │ - bcs.n 491b6 │ │ + bcs.n 494be │ │ ldr r0, [sp, #28] │ │ ldrb r3, [r0, r3] │ │ cmp r3, #42 @ 0x2a │ │ mov r3, r4 │ │ - beq.n 4915a │ │ - b.n 49136 │ │ + beq.n 49462 │ │ + b.n 4943e │ │ cmp r7, r2 │ │ mov ip, r2 │ │ add.w r3, r7, #1 │ │ it hi │ │ movhi ip, r7 │ │ cmp r2, r3 │ │ it hi │ │ movhi r3, r2 │ │ mvns r5, r7 │ │ sub.w r0, ip, r7 │ │ add r3, r5 │ │ cmp r0, r3 │ │ - bls.n 4918e │ │ - b.n 490e0 │ │ + bls.n 49496 │ │ + b.n 493e8 │ │ mov ip, r7 │ │ add.w r7, ip, #1 │ │ adds r3, r4, #1 │ │ cmp r7, r2 │ │ - bcc.n 49106 │ │ - b.n 4919c │ │ + bcc.n 4940e │ │ + b.n 494a4 │ │ movs r3, #0 │ │ cmp r8, r3 │ │ - bls.n 491b6 │ │ + bls.n 494be │ │ add.w r1, r9, r3 │ │ sub.w r2, r8, r3 │ │ ldrb.w r0, [r1], #1 │ │ cmp r0, #42 @ 0x2a │ │ - bne.w 490e0 │ │ + bne.w 493e8 │ │ subs r2, #1 │ │ - bne.n 491a8 │ │ + bne.n 494b0 │ │ ldr r1, [sp, #36] @ 0x24 │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ str r0, [r1, #0] │ │ movs r0, #1 │ │ strb r0, [r1, #4] │ │ ldr r0, [sp, #20] │ │ cmp r0, #0 │ │ - beq.w 49536 │ │ + beq.w 4983e │ │ ldr r0, [sp, #24] │ │ - blx d87c0 │ │ + blx d87d0 │ │ add sp, #116 @ 0x74 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r1, [sp, #108] @ 0x6c │ │ strd r0, fp, [sp, #64] @ 0x40 │ │ lsls r0, r0, #31 │ │ strd sl, r2, [sp, #72] @ 0x48 │ │ strd r9, r1, [sp, #80] @ 0x50 │ │ - beq.w 49808 │ │ + beq.w 49b10 │ │ movs r0, #8 │ │ movs r6, #8 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 49874 │ │ + beq.w 49b7c │ │ eor.w r1, r7, #2147483648 @ 0x80000000 │ │ str r1, [r0, #4] │ │ movs r1, #0 │ │ str r4, [r0, #0] │ │ strd r6, r1, [sp] │ │ add r1, sp, #88 @ 0x58 │ │ mov r4, r0 │ │ movs r2, #16 │ │ mov r0, r1 │ │ mov r1, fp │ │ mov r3, r4 │ │ - bl 49e28 │ │ + bl 4a130 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrd r0, r6, [sp, #88] @ 0x58 │ │ cmp r0, #1 │ │ - bne.w 495b2 │ │ + bne.w 498ba │ │ ldrd sl, r0, [sp, #96] @ 0x60 │ │ movs r7, #0 │ │ ldr.w r9, [sp, #104] @ 0x68 │ │ str r0, [sp, #32] │ │ mov.w r4, sl, lsr #8 │ │ - b.n 49712 │ │ + b.n 49a1a │ │ ldr.w r8, [sp, #36] @ 0x24 │ │ movs r4, #17 │ │ ldr r0, [sp, #20] │ │ movt r4, #32768 @ 0x8000 │ │ cmp r0, #0 │ │ - beq.w 4952c │ │ + beq.w 49834 │ │ ldr r0, [sp, #24] │ │ - b.n 49528 │ │ + b.n 49830 │ │ ldr.w r8, [sp, #36] @ 0x24 │ │ movs r4, #17 │ │ movt r4, #32768 @ 0x8000 │ │ cmp.w sl, #0 │ │ - beq.w 4952c │ │ + beq.w 49834 │ │ ldr r0, [sp, #32] │ │ - b.n 49528 │ │ + b.n 49830 │ │ cmp r1, #0 │ │ it ne │ │ - blxne d87c0 │ │ - b.n 4952c │ │ + blxne d87d0 │ │ + b.n 49834 │ │ cmp.w ip, #0 │ │ it ne │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ movs r0, #0 │ │ str.w r8, [sl] │ │ strb.w r0, [sl, #4] │ │ add sp, #116 @ 0x74 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add r0, sp, #88 @ 0x58 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 3e320 │ │ + bl 3e628 │ │ ldrd r4, r3, [sp, #92] @ 0x5c │ │ ldrd r0, r1, [r5, #8] │ │ mov r2, r4 │ │ - bl 4244c │ │ + bl 42754 │ │ ldr r1, [sp, #88] @ 0x58 │ │ cmp r1, #0 │ │ - beq.w 4902a │ │ + beq.w 49332 │ │ mov r5, r0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r5 │ │ - b.n 4902a │ │ + b.n 49332 │ │ add r0, sp, #88 @ 0x58 │ │ - bl 3e320 │ │ + bl 3e628 │ │ ldrd r4, r0, [sp, #92] @ 0x5c │ │ ldr r2, [r5, #12] │ │ cmp r0, r2 │ │ - bcc.n 493ae │ │ + bcc.n 496b6 │ │ ldr r0, [r5, #8] │ │ mov r1, r4 │ │ - b.n 49624 │ │ + b.n 4992c │ │ add r0, sp, #88 @ 0x58 │ │ - bl 3e320 │ │ + bl 3e628 │ │ ldrd r0, r3, [sp, #92] @ 0x5c │ │ cmp r3, #0 │ │ ldrd r9, lr, [r5, #8] │ │ - beq.w 49674 │ │ + beq.w 4997c │ │ add.w ip, r9, #1 │ │ movs r5, #0 │ │ movs r7, #0 │ │ mov.w r8, #0 │ │ movs r6, #0 │ │ mov r1, lr │ │ cmp r6, lr │ │ it hi │ │ movhi r1, r6 │ │ - b.n 49312 │ │ + b.n 4961a │ │ movs r0, r0 │ │ ldrb r0, [r0, #31] │ │ nop │ │ nop │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ ldrb r0, [r7, #31] │ │ adds r5, #1 │ │ adds r6, #1 │ │ cmp r5, r3 │ │ - bcs.w 49676 │ │ + bcs.w 4997e │ │ cmp r1, r6 │ │ - beq.n 49328 │ │ + beq.n 49630 │ │ ldrb.w r4, [r9, r6] │ │ cmp r4, #63 @ 0x3f │ │ - beq.n 49308 │ │ + beq.n 49610 │ │ cmp r4, #42 @ 0x2a │ │ - beq.n 49386 │ │ + beq.n 4968e │ │ ldrb r2, [r0, r5] │ │ cmp r2, r4 │ │ - beq.n 49308 │ │ + beq.n 49610 │ │ cmp r7, #0 │ │ - beq.w 4979c │ │ + beq.w 49aa4 │ │ add.w r5, r8, #1 │ │ mov r8, sl │ │ cmp r7, lr │ │ - bcs.n 49358 │ │ + bcs.n 49660 │ │ cmp r5, r3 │ │ - bcs.n 49348 │ │ + bcs.n 49650 │ │ ldrb.w r1, [r9, r7] │ │ ldrb r4, [r0, r5] │ │ cmp r4, r1 │ │ - bne.n 4934c │ │ - b.n 49378 │ │ + bne.n 49654 │ │ + b.n 49680 │ │ ldrb.w r1, [r9, r7] │ │ cmp r1, #63 @ 0x3f │ │ - beq.n 49378 │ │ + beq.n 49680 │ │ adds r5, #1 │ │ cmp r5, r3 │ │ - bcc.n 49338 │ │ - b.n 49770 │ │ + bcc.n 49640 │ │ + b.n 49a78 │ │ cmp r5, r3 │ │ mov r8, r3 │ │ add.w r4, r5, #1 │ │ it hi │ │ movhi r8, r5 │ │ cmp r3, r4 │ │ it hi │ │ movhi r4, r3 │ │ sub.w r1, r8, r5 │ │ mvns r5, r5 │ │ add r4, r5 │ │ cmp r1, r4 │ │ - bls.n 4937a │ │ - b.n 4979c │ │ + bls.n 49682 │ │ + b.n 49aa4 │ │ mov r8, r5 │ │ add.w r5, r8, #1 │ │ adds r6, r7, #1 │ │ cmp r5, r3 │ │ - bcc.n 492ee │ │ - b.n 49676 │ │ + bcc.n 495f6 │ │ + b.n 4997e │ │ mov r8, sl │ │ adds r7, r6, #1 │ │ cmp r7, lr │ │ - bcs.w 49778 │ │ + bcs.w 49a80 │ │ ldrb.w r1, [ip, r6] │ │ mov r6, r7 │ │ cmp r1, #42 @ 0x2a │ │ - beq.n 49388 │ │ - b.n 49334 │ │ + beq.n 49690 │ │ + b.n 4963c │ │ add r0, sp, #88 @ 0x58 │ │ - bl 3e320 │ │ + bl 3e628 │ │ ldrd r4, r0, [sp, #92] @ 0x5c │ │ ldr r2, [r5, #12] │ │ cmp r0, r2 │ │ - bcs.w 4961e │ │ + bcs.w 49926 │ │ movs r5, #0 │ │ - b.n 4962e │ │ + b.n 49936 │ │ ldr r1, [sp, #36] @ 0x24 │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ str r0, [r1, #0] │ │ movs r0, #0 │ │ strb r0, [r1, #4] │ │ add sp, #116 @ 0x74 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr.w r8, [sp, #36] @ 0x24 │ │ - cbnz r7, 493e4 │ │ - b.n 494a6 │ │ - cbz r0, 493e0 │ │ + cbnz r7, 496ec │ │ + b.n 497ae │ │ + cbz r0, 496e8 │ │ movs r0, #0 │ │ ldr r1, [r4, r0] │ │ cmp r1, #0 │ │ - beq.w 496a8 │ │ + beq.w 499b0 │ │ adds r0, #12 │ │ cmp r6, r0 │ │ - bne.n 493d2 │ │ + bne.n 496da │ │ cmp r7, #0 │ │ - beq.n 494a6 │ │ + beq.n 497ae │ │ mov r0, r4 │ │ - b.n 494a2 │ │ + b.n 497aa │ │ lsls r7, r0, #3 │ │ ldr r0, [sp, #32] │ │ add.w sl, sp, #88 @ 0x58 │ │ add.w r9, r0, #4 │ │ - b.n 49420 │ │ + b.n 49728 │ │ mov r0, r8 │ │ mov r1, r4 │ │ mov r2, r5 │ │ - blx d8860 │ │ + blx d8870 │ │ clz r0, r0 │ │ lsrs r6, r0, #5 │ │ ldr r0, [sp, #88] @ 0x58 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ cmp r6, #0 │ │ - bne.w 48ab4 │ │ + bne.w 48dbc │ │ add.w r9, r9, #8 │ │ subs r7, #8 │ │ - beq.n 49496 │ │ + beq.n 4979e │ │ ldr.w r1, [r9, #-4] │ │ cmp r1, #0 │ │ - beq.n 49418 │ │ + beq.n 49720 │ │ ldr.w r2, [r9] │ │ mov r0, sl │ │ - bl 3e320 │ │ + bl 3e628 │ │ ldrd r4, r0, [sp, #92] @ 0x5c │ │ cmp r0, r5 │ │ - bcs.n 493f6 │ │ + bcs.n 496fe │ │ movs r6, #0 │ │ - b.n 49406 │ │ + b.n 4970e │ │ lsls r7, r0, #3 │ │ ldr r0, [sp, #32] │ │ add.w sl, sp, #88 @ 0x58 │ │ add.w r9, r0, #4 │ │ - b.n 49478 │ │ + b.n 49780 │ │ subs r0, r0, r5 │ │ mov r2, r5 │ │ adds r1, r4, r0 │ │ mov r0, r8 │ │ - blx d8860 │ │ + blx d8870 │ │ clz r0, r0 │ │ lsrs r6, r0, #5 │ │ ldr r0, [sp, #88] @ 0x58 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ cmp r6, #0 │ │ - bne.w 48ab4 │ │ + bne.w 48dbc │ │ add.w r9, r9, #8 │ │ subs r7, #8 │ │ - beq.n 49496 │ │ + beq.n 4979e │ │ ldr.w r1, [r9, #-4] │ │ cmp r1, #0 │ │ - beq.n 49470 │ │ + beq.n 49778 │ │ ldr.w r2, [r9] │ │ mov r0, sl │ │ - bl 3e320 │ │ + bl 3e628 │ │ ldrd r4, r0, [sp, #92] @ 0x5c │ │ cmp r0, r5 │ │ - bcs.n 4944c │ │ + bcs.n 49754 │ │ movs r6, #0 │ │ - b.n 4945e │ │ + b.n 49766 │ │ ldr.w r8, [sp, #36] @ 0x24 │ │ cmp.w fp, #0 │ │ - beq.n 494a6 │ │ + beq.n 497ae │ │ ldr r0, [sp, #32] │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ str.w r0, [r8] │ │ - b.n 49530 │ │ + b.n 49838 │ │ ldr r0, [sp, #36] @ 0x24 │ │ add.w sl, r0, #4 │ │ - b.n 494c4 │ │ + b.n 497cc │ │ add.w sl, sl, #8 │ │ subs.w r9, r9, #8 │ │ - beq.n 4951a │ │ + beq.n 49822 │ │ ldr.w r1, [sl, #-4] │ │ cmp r1, #0 │ │ - beq.n 494ba │ │ + beq.n 497c2 │ │ ldr.w r2, [sl] │ │ add r0, sp, #88 @ 0x58 │ │ - bl 3e320 │ │ + bl 3e628 │ │ ldrd r4, r3, [sp, #92] @ 0x5c │ │ mov r0, r5 │ │ mov r1, r6 │ │ mov r2, r4 │ │ - bl 4244c │ │ + bl 42754 │ │ mov r7, r0 │ │ ldr r0, [sp, #88] @ 0x58 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ cmp r7, #0 │ │ - beq.n 494ba │ │ + beq.n 497c2 │ │ movs r0, #17 │ │ cmp.w fp, #0 │ │ movt r0, #32768 @ 0x8000 │ │ str.w r0, [r8] │ │ mov.w r0, #1 │ │ strb.w r0, [r8, #4] │ │ - beq.n 49536 │ │ + beq.n 4983e │ │ ldr r0, [sp, #36] @ 0x24 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add sp, #116 @ 0x74 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r4, #17 │ │ cmp.w fp, #0 │ │ movt r4, #32768 @ 0x8000 │ │ - beq.n 4952c │ │ + beq.n 49834 │ │ ldr r0, [sp, #36] @ 0x24 │ │ - blx d87c0 │ │ + blx d87d0 │ │ str.w r4, [r8] │ │ movs r0, #0 │ │ strb.w r0, [r8, #4] │ │ add sp, #116 @ 0x74 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r3, r0 │ │ - b.n 49548 │ │ + b.n 49850 │ │ adds r3, #4 │ │ subs r2, #4 │ │ - beq.w 487ba │ │ + beq.w 48ac2 │ │ vldr s4, [r3] │ │ vcmp.f32 s2, s4 │ │ vmrs APSR_nzcv, fpscr │ │ - bhi.n 49540 │ │ + bhi.n 49848 │ │ vcmp.f32 s4, s4 │ │ vmrs APSR_nzcv, fpscr │ │ - bvs.n 4959a │ │ + bvs.n 498a2 │ │ vcmp.f32 s0, s4 │ │ vmrs APSR_nzcv, fpscr │ │ - blt.n 49540 │ │ - b.n 4959a │ │ + blt.n 49848 │ │ + b.n 498a2 │ │ mov r3, r0 │ │ - b.n 49578 │ │ + b.n 49880 │ │ adds r3, #8 │ │ subs r2, #8 │ │ - beq.w 487ba │ │ + beq.w 48ac2 │ │ vldr d18, [r3] │ │ vcmp.f64 d17, d18 │ │ vmrs APSR_nzcv, fpscr │ │ - bhi.n 49570 │ │ + bhi.n 49878 │ │ vcmp.f64 d18, d18 │ │ vmrs APSR_nzcv, fpscr │ │ - bvs.n 4959a │ │ + bvs.n 498a2 │ │ vcmp.f64 d16, d18 │ │ vmrs APSR_nzcv, fpscr │ │ - blt.n 49570 │ │ + blt.n 49878 │ │ movs r2, #17 │ │ movt r2, #32768 @ 0x8000 │ │ str.w r2, [r8] │ │ movs r2, #1 │ │ cmp r1, #0 │ │ strb.w r2, [r8, #4] │ │ - bne.w 496ea │ │ - b.n 49536 │ │ + bne.w 499f2 │ │ + b.n 4983e │ │ cmp r6, #0 │ │ - beq.w 496ba │ │ + beq.w 499c2 │ │ ldr r0, [sp, #104] @ 0x68 │ │ str.w r8, [sp, #36] @ 0x24 │ │ cmp r0, #8 │ │ - bne.n 495f2 │ │ + bne.n 498fa │ │ add r4, sp, #88 @ 0x58 │ │ movs r7, #1 │ │ mov.w r8, #0 │ │ mov r0, r4 │ │ mov r1, fp │ │ movs r2, #9 │ │ movs r3, #0 │ │ str.w r8, [sp, #4] │ │ - bl 49e28 │ │ + bl 4a130 │ │ ldrd r0, r6, [sp, #88] @ 0x58 │ │ cmp r0, #1 │ │ - beq.w 496f4 │ │ + beq.w 499fc │ │ cmp r6, #0 │ │ - beq.w 49704 │ │ + beq.w 49a0c │ │ ldr r0, [sp, #104] @ 0x68 │ │ adds r7, #1 │ │ cmp r0, #8 │ │ - beq.n 495ca │ │ - ldr r0, [pc, #652] @ (49880 ) │ │ + beq.n 498d2 │ │ + ldr r0, [pc, #652] @ (49b88 ) │ │ add r2, sp, #88 @ 0x58 │ │ - ldr r3, [pc, #652] @ (49884 ) │ │ - ldr r1, [pc, #652] @ (49888 ) │ │ + ldr r3, [pc, #652] @ (49b8c ) │ │ + ldr r1, [pc, #652] @ (49b90 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ subs r2, r2, r3 │ │ ldr r0, [r5, #8] │ │ add r1, r2 │ │ mov r2, r3 │ │ - blx d8860 │ │ + blx d8870 │ │ clz r0, r0 │ │ lsrs r5, r0, #5 │ │ - b.w 48c04 │ │ + b.w 48f0c │ │ subs r1, r0, r2 │ │ ldr r0, [r5, #8] │ │ add r1, r4 │ │ - blx d8860 │ │ + blx d8870 │ │ clz r0, r0 │ │ lsrs r5, r0, #5 │ │ ldr r0, [sp, #88] @ 0x58 │ │ cmp r0, #0 │ │ - beq.w 48c04 │ │ + beq.w 48f0c │ │ mov r0, r4 │ │ - blx d87c0 │ │ - b.w 48c04 │ │ + blx d87d0 │ │ + b.w 48f0c │ │ movs r6, #0 │ │ cmp r6, lr │ │ - bcs.n 4966e │ │ + bcs.n 49976 │ │ mvns r1, r6 │ │ add.w r0, r9, r6 │ │ add r1, lr │ │ mov r8, sl │ │ ldrb.w r2, [r0], #1 │ │ sub.w r3, r2, #42 @ 0x2a │ │ clz r3, r3 │ │ lsrs r4, r3, #5 │ │ subs r3, r1, #1 │ │ cmp r3, r1 │ │ - bcs.w 49782 │ │ + bcs.w 49a8a │ │ mov r1, r3 │ │ cmp r2, #42 @ 0x2a │ │ - beq.n 49650 │ │ - b.n 49782 │ │ + beq.n 49958 │ │ + b.n 49a8a │ │ movs r4, #1 │ │ mov r8, sl │ │ - b.n 49782 │ │ + b.n 49a8a │ │ movs r6, #0 │ │ cmp r6, lr │ │ - bcs.n 496a2 │ │ + bcs.n 499aa │ │ mvns r2, r6 │ │ add.w r1, r9, r6 │ │ add.w r7, r2, lr │ │ mov r8, sl │ │ ldrb.w r3, [r1], #1 │ │ sub.w r2, r3, #42 @ 0x2a │ │ clz r2, r2 │ │ lsrs r4, r2, #5 │ │ subs r2, r7, #1 │ │ cmp r2, r7 │ │ - bcs.n 4977a │ │ + bcs.n 49a82 │ │ mov r7, r2 │ │ cmp r3, #42 @ 0x2a │ │ - beq.n 49686 │ │ - b.n 4977a │ │ + beq.n 4998e │ │ + b.n 49a82 │ │ movs r4, #1 │ │ mov r8, sl │ │ - b.n 4977a │ │ + b.n 49a82 │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ str.w r0, [r8] │ │ movs r0, #1 │ │ strb.w r0, [r8, #4] │ │ - b.n 496e2 │ │ + b.n 499ea │ │ movs r6, #17 │ │ movs r7, #0 │ │ mov.w sl, #1 │ │ movt r6, #32768 @ 0x8000 │ │ - b.n 49712 │ │ + b.n 49a1a │ │ ldr r5, [sp, #36] @ 0x24 │ │ ldr.w r2, [sp, #93] @ 0x5d │ │ ldr r6, [sp, #100] @ 0x64 │ │ ldr.w r3, [sp, #97] @ 0x61 │ │ str r6, [r5, #12] │ │ str.w r3, [r5, #9] │ │ str.w r2, [r5, #5] │ │ strb r0, [r5, #4] │ │ str r1, [r5, #0] │ │ cmp r7, #0 │ │ - beq.w 49536 │ │ + beq.w 4983e │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add sp, #116 @ 0x74 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd sl, r0, [sp, #96] @ 0x60 │ │ ldr.w r9, [sp, #104] @ 0x68 │ │ str r0, [sp, #32] │ │ mov.w r4, sl, lsr #8 │ │ - b.n 4970e │ │ + b.n 49a16 │ │ movs r6, #17 │ │ mov.w sl, #1 │ │ movt r6, #32768 @ 0x8000 │ │ ldr.w r8, [sp, #36] @ 0x24 │ │ add r0, sp, #64 @ 0x40 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #64] @ 0x40 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #68] @ 0x44 │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ mov fp, r6 │ │ movs r6, #17 │ │ movt r6, #32768 @ 0x8000 │ │ ldr r2, [sp, #32] │ │ cmp fp, r6 │ │ - bne.n 49754 │ │ + bne.n 49a5c │ │ ldrd r0, r1, [r5, #64] @ 0x40 │ │ cmp r1, r7 │ │ mov.w r2, #0 │ │ mov.w r1, #0 │ │ str.w r6, [r8] │ │ it cs │ │ movcs r1, #1 │ │ cmp r0, r7 │ │ it ls │ │ movls r2, #1 │ │ and.w r0, r2, r1 │ │ - b.n 49532 │ │ + b.n 4983a │ │ lsrs r0, r4, #16 │ │ strh.w r4, [r8, #5] │ │ strd r2, r9, [r8, #8] │ │ strb.w sl, [r8, #4] │ │ str.w fp, [r8] │ │ strb.w r0, [r8, #7] │ │ add sp, #116 @ 0x74 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r4, #0 │ │ - b.n 4977a │ │ + b.n 49a82 │ │ movs r4, #1 │ │ - b.n 49782 │ │ + b.n 49a8a │ │ movs r4, #1 │ │ ldr r1, [sp, #88] @ 0x58 │ │ - cbz r1, 49782 │ │ - blx d87c0 │ │ + cbz r1, 49a8a │ │ + blx d87d0 │ │ movs r0, #17 │ │ strb.w r4, [r8, #4] │ │ movt r0, #32768 @ 0x8000 │ │ str.w r0, [r8] │ │ add sp, #116 @ 0x74 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r4, #0 │ │ mov r8, sl │ │ - b.n 49782 │ │ + b.n 49a8a │ │ movs r4, #0 │ │ - b.n 496a4 │ │ - ldr r3, [pc, #260] @ (498a8 ) │ │ + b.n 499ac │ │ + ldr r3, [pc, #260] @ (49bb0 ) │ │ mov r2, r7 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #256] @ (498ac ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #256] @ (49bb4 ) │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #200] @ (4987c ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #200] @ (49b84 ) │ │ mov r1, r7 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #208] @ (49890 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #208] @ (49b98 ) │ │ movs r0, #0 │ │ movs r1, #4 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #204] @ (49898 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #204] @ (49ba0 ) │ │ movs r0, #0 │ │ movs r1, #8 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #200] @ (498a0 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #200] @ (49ba8 ) │ │ mov r2, r1 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #180] @ (49894 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #180] @ (49b9c ) │ │ mov r2, r1 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #176] @ (4989c ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #176] @ (49ba4 ) │ │ mov r2, r1 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #176] @ (498a4 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #176] @ (49bac ) │ │ mov r2, r1 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #176] @ (498b0 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #176] @ (49bb8 ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #168] @ (498b4 ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #168] @ (49bbc ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r2, [pc, #120] @ (4988c ) │ │ + bl 3fd40 │ │ + ldr r2, [pc, #120] @ (49b94 ) │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ lsls r3, r3, #31 │ │ - bne.w 4959a │ │ + bne.w 498a2 │ │ mov r3, r0 │ │ vldr s2, [r3] │ │ vcmp.f32 s2, s2 │ │ vmrs APSR_nzcv, fpscr │ │ - bvs.w 4959a │ │ + bvs.w 498a2 │ │ vcmp.f32 s0, s2 │ │ vmrs APSR_nzcv, fpscr │ │ - bge.w 4959a │ │ + bge.w 498a2 │ │ adds r3, #4 │ │ subs r2, #4 │ │ - bne.n 49820 │ │ - b.w 487ba │ │ + bne.n 49b28 │ │ + b.w 48ac2 │ │ lsls r3, r3, #31 │ │ - bne.w 4959a │ │ + bne.w 498a2 │ │ mov r3, r0 │ │ vldr d17, [r3] │ │ vcmp.f64 d17, d17 │ │ vmrs APSR_nzcv, fpscr │ │ - bvs.w 4959a │ │ + bvs.w 498a2 │ │ vcmp.f64 d16, d17 │ │ vmrs APSR_nzcv, fpscr │ │ - bge.w 4959a │ │ + bge.w 498a2 │ │ adds r3, #8 │ │ subs r2, #8 │ │ - bne.n 4984e │ │ - b.w 487ba │ │ + bne.n 49b56 │ │ + b.w 48ac2 │ │ movs r0, #1 │ │ movs r1, #8 │ │ - bl 3dfa4 │ │ - asrs r6, r6, #31 │ │ + bl 3e2ac │ │ + asrs r6, r7, #19 │ │ movs r1, r1 │ │ - mcr2 15, 4, pc, cr9, cr12, {7} @ │ │ - asrs r0, r2, #13 │ │ + @ instruction: 0xfb81fffc │ │ + asrs r0, r5, #32 │ │ movs r1, r1 │ │ - asrs r6, r5, #17 │ │ + asrs r6, r6, #5 │ │ movs r1, r1 │ │ - asrs r2, r3, #13 │ │ + asrs r2, r4, #1 │ │ movs r1, r1 │ │ - asrs r2, r7, #9 │ │ + lsrs r2, r0, #30 │ │ movs r1, r1 │ │ - adds r2, r5, r0 │ │ + asrs r2, r6, #20 │ │ movs r1, r1 │ │ - asrs r6, r7, #9 │ │ + lsrs r6, r0, #30 │ │ movs r1, r1 │ │ - adds r0, r0, r1 │ │ + asrs r0, r1, #21 │ │ movs r1, r1 │ │ - asrs r4, r6, #29 │ │ + asrs r4, r7, #17 │ │ movs r1, r1 │ │ - asrs r6, r4, #29 │ │ + asrs r6, r5, #17 │ │ movs r1, r1 │ │ - adds r0, r1, r0 │ │ + asrs r0, r2, #20 │ │ movs r1, r1 │ │ - adds r0, r0, r0 │ │ + asrs r0, r1, #20 │ │ movs r1, r1 │ │ - asrs r2, r5, #8 │ │ + lsrs r2, r6, #28 │ │ movs r1, r1 │ │ - asrs r2, r0, #13 │ │ + asrs r2, r1, #1 │ │ movs r1, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ sub sp, #12 │ │ mov r8, r0 │ │ mov r0, sp │ │ mov r6, r1 │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r0, [sp, #0] │ │ cmp r0, #1 │ │ - bne.n 49902 │ │ + bne.n 49c0a │ │ ldr.w r9, [sp, #8] │ │ movs r0, #0 │ │ cmp.w r0, r9, lsr #30 │ │ - bne.n 49910 │ │ + bne.n 49c18 │ │ movw r0, #65533 @ 0xfffd │ │ mov.w r7, r9, lsl #2 │ │ movt r0, #32767 @ 0x7fff │ │ cmp r7, r0 │ │ - bcs.n 49910 │ │ + bcs.n 49c18 │ │ ldr r5, [sp, #4] │ │ - cbz r7, 49914 │ │ + cbz r7, 49c1c │ │ mov r0, r7 │ │ movs r1, #1 │ │ - blx d8820 │ │ - cbz r0, 49966 │ │ + blx d8830 │ │ + cbz r0, 49c6e │ │ mov ip, r9 │ │ cmp.w r9, #0 │ │ - bne.n 49920 │ │ - b.n 49940 │ │ + bne.n 49c28 │ │ + b.n 49c48 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str.w r0, [r8] │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ - bl 3e03c │ │ + bl 3e344 │ │ movs r0, #4 │ │ mov.w ip, #0 │ │ cmp.w r9, #0 │ │ - beq.n 49940 │ │ + beq.n 49c48 │ │ ldrd r7, r1, [r6] │ │ subs r2, r1, r5 │ │ mov r4, r9 │ │ mov r6, r0 │ │ cmp r5, r1 │ │ - bhi.n 4994e │ │ + bhi.n 49c56 │ │ cmp r2, #3 │ │ - bls.n 4995a │ │ + bls.n 49c62 │ │ ldr r3, [r7, r5] │ │ subs r2, #4 │ │ adds r5, #4 │ │ str.w r3, [r6], #4 │ │ subs r4, #1 │ │ - bne.n 4992a │ │ + bne.n 49c32 │ │ strd ip, r0, [r8] │ │ str.w r9, [r8, #8] │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ - ldr r3, [pc, #36] @ (49974 ) │ │ + ldr r3, [pc, #36] @ (49c7c ) │ │ mov r0, r5 │ │ mov r2, r1 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #20] @ (49970 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #20] @ (49c78 ) │ │ movs r0, #0 │ │ movs r1, #4 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ movs r0, #4 │ │ mov r1, r7 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - asrs r4, r3, #3 │ │ + lsrs r4, r4, #23 │ │ movs r1, r1 │ │ - asrs r0, r7, #24 │ │ + asrs r0, r0, #13 │ │ movs r1, r1 │ │ push {r7, lr} │ │ sub sp, #24 │ │ uxtb r2, r2 │ │ mov ip, r0 │ │ cmp r2, #5 │ │ - bhi.w 49a7a │ │ + bhi.w 49d82 │ │ movs r0, #0 │ │ tbb [pc, r2] │ │ ldrb r3, [r0, #28] │ │ orrs r6, r5 │ │ ldrsb r6, [r2, r4] │ │ ldr.w r0, [ip, #8] │ │ cmp r0, r1 │ │ - bls.n 49a74 │ │ + bls.n 49d7c │ │ mov r2, r1 │ │ ldr.w r1, [ip, #4] │ │ mov r0, r2 │ │ cmp r2, r1 │ │ - bcs.w 49ad6 │ │ + bcs.w 49dde │ │ ldr.w r1, [ip] │ │ ldrb r0, [r1, r0] │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ add sp, #24 │ │ pop {r7, pc} │ │ ldr.w r0, [ip, #8] │ │ cmp r0, r1 │ │ - bls.n 49a74 │ │ + bls.n 49d7c │ │ ldr.w r2, [ip, #4] │ │ cmp r2, r1 │ │ - bcc.n 49aa6 │ │ + bcc.n 49dae │ │ subs r2, r2, r1 │ │ cmp r2, #7 │ │ - bls.n 49a9a │ │ + bls.n 49da2 │ │ ldr.w r0, [ip] │ │ ldr r2, [r0, r1] │ │ add r0, r1 │ │ ldr r0, [r0, #4] │ │ eor.w r0, r0, #2147483648 @ 0x80000000 │ │ orrs r0, r2 │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ add sp, #24 │ │ pop {r7, pc} │ │ ldr.w r0, [ip, #8] │ │ cmp r0, r1 │ │ - bls.n 49a74 │ │ + bls.n 49d7c │ │ ldr.w r2, [ip, #4] │ │ cmp r2, r1 │ │ - bcc.n 49ab2 │ │ + bcc.n 49dba │ │ subs r2, r2, r1 │ │ cmp r2, #3 │ │ - bls.n 49a8e │ │ + bls.n 49d96 │ │ ldr.w r0, [ip] │ │ ldr r0, [r0, r1] │ │ add.w r0, r0, #2147483648 @ 0x80000000 │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ add sp, #24 │ │ pop {r7, pc} │ │ ldr.w r0, [ip, #8] │ │ cmp r0, r1 │ │ - bls.n 49a74 │ │ + bls.n 49d7c │ │ ldr.w r2, [ip, #4] │ │ cmp r2, r1 │ │ - bcc.n 49abe │ │ + bcc.n 49dc6 │ │ subs r2, r2, r1 │ │ cmp r2, #3 │ │ - bls.n 49a8e │ │ + bls.n 49d96 │ │ ldr.w r0, [ip] │ │ ldr r0, [r0, r1] │ │ vmov s0, r0 │ │ movs r0, #0 │ │ vcmp.f32 s0, s0 │ │ - b.n 49a68 │ │ + b.n 49d70 │ │ ldr.w r0, [ip, #8] │ │ cmp r0, r1 │ │ - bls.n 49a74 │ │ + bls.n 49d7c │ │ ldr.w r2, [ip, #4] │ │ cmp r2, r1 │ │ - bcc.n 49aca │ │ + bcc.n 49dd2 │ │ subs r2, r2, r1 │ │ cmp r2, #7 │ │ - bls.n 49a9a │ │ + bls.n 49da2 │ │ ldr.w r0, [ip] │ │ ldr r2, [r0, r1] │ │ add r0, r1 │ │ ldr r0, [r0, #4] │ │ strd r2, r0, [sp] │ │ movs r0, #0 │ │ vldr d16, [sp] │ │ @@ -50291,83 +50484,83 @@ │ │ pop {r7, pc} │ │ movs r0, #1 │ │ add sp, #24 │ │ pop {r7, pc} │ │ add r0, sp, #12 │ │ mov r2, r1 │ │ mov r1, ip │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r0, [sp, #12] │ │ eor.w r0, r0, #1 │ │ add sp, #24 │ │ pop {r7, pc} │ │ - ldr r3, [pc, #100] @ (49af4 ) │ │ + ldr r3, [pc, #100] @ (49dfc ) │ │ movs r0, #0 │ │ movs r1, #4 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #92] @ (49af8 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #92] @ (49e00 ) │ │ movs r0, #0 │ │ movs r1, #8 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #64] @ (49ae8 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #64] @ (49df0 ) │ │ add r3, pc │ │ mov r0, r1 │ │ mov r1, r2 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #44] @ (49ae0 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #44] @ (49de8 ) │ │ add r3, pc │ │ mov r0, r1 │ │ mov r1, r2 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #36] @ (49ae4 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #36] @ (49dec ) │ │ add r3, pc │ │ mov r0, r1 │ │ mov r1, r2 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #32] @ (49aec ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #32] @ (49df4 ) │ │ add r3, pc │ │ mov r0, r1 │ │ mov r1, r2 │ │ - bl 3f9a8 │ │ - ldr r2, [pc, #24] @ (49af0 ) │ │ + bl 3fcb0 │ │ + ldr r2, [pc, #24] @ (49df8 ) │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ nop │ │ - asrs r0, r3, #21 │ │ + asrs r0, r4, #9 │ │ movs r1, r1 │ │ - asrs r4, r1, #18 │ │ + asrs r4, r2, #6 │ │ movs r1, r1 │ │ - asrs r4, r0, #22 │ │ + asrs r4, r1, #10 │ │ movs r1, r1 │ │ - asrs r0, r2, #18 │ │ + asrs r0, r3, #6 │ │ movs r1, r1 │ │ - asrs r4, r4, #20 │ │ + asrs r4, r5, #8 │ │ movs r1, r1 │ │ - lsrs r0, r5, #30 │ │ + lsrs r0, r6, #18 │ │ movs r1, r1 │ │ - lsrs r4, r5, #30 │ │ + lsrs r4, r6, #18 │ │ movs r1, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #116 @ 0x74 │ │ mov r6, r1 │ │ mov fp, r0 │ │ ldrd r1, r0, [sp, #160] @ 0xa0 │ │ mov r5, r3 │ │ strd r1, r0, [sp, #8] │ │ add r0, sp, #88 @ 0x58 │ │ mov r1, r3 │ │ - bl 49d00 │ │ + bl 4a008 │ │ add r7, sp, #88 @ 0x58 │ │ add.w ip, sp, #48 @ 0x30 │ │ ldmia r7, {r0, r1, r2, r3, r7} │ │ cmp r0, #2 │ │ stmia.w ip, {r1, r2, r3, r7} │ │ - bne.n 49b36 │ │ + bne.n 49e3e │ │ add r3, sp, #48 @ 0x30 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w fp, {r0, r1, r2, r3} │ │ add sp, #116 @ 0x74 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add r7, sp, #48 @ 0x30 │ │ add.w ip, sp, #16 │ │ @@ -50378,211 +50571,211 @@ │ │ mov r1, r5 │ │ str r0, [sp, #44] @ 0x2c │ │ add r0, sp, #16 │ │ str r0, [sp, #40] @ 0x28 │ │ add r0, sp, #88 @ 0x58 │ │ mov r2, r6 │ │ str r4, [sp, #36] @ 0x24 │ │ - bl 49d00 │ │ + bl 4a008 │ │ add r7, sp, #88 @ 0x58 │ │ add.w ip, sp, #72 @ 0x48 │ │ ldmia r7, {r0, r1, r2, r3, r7} │ │ cmp r0, #2 │ │ stmia.w ip, {r1, r2, r3, r7} │ │ - bne.n 49b72 │ │ + bne.n 49e7a │ │ add r3, sp, #72 @ 0x48 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w fp, {r0, r1, r2, r3} │ │ - b.n 49caa │ │ + b.n 49fb2 │ │ add r7, sp, #72 @ 0x48 │ │ ldr r6, [sp, #108] @ 0x6c │ │ add.w ip, sp, #48 @ 0x30 │ │ str r6, [sp, #68] @ 0x44 │ │ ldmia r7, {r1, r2, r3, r7} │ │ stmia.w ip, {r0, r1, r2, r3, r7} │ │ lsls r0, r0, #31 │ │ - beq.w 49cc8 │ │ + beq.w 49fd0 │ │ movs r0, #8 │ │ movs r6, #8 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 49cd0 │ │ + beq.w 49fd8 │ │ ldrd r2, r1, [sp, #152] @ 0x98 │ │ eor.w r1, r1, #2147483648 @ 0x80000000 │ │ str r1, [r0, #4] │ │ movs r1, #0 │ │ ldr r5, [sp, #52] @ 0x34 │ │ strd r6, r1, [sp] │ │ add r1, sp, #88 @ 0x58 │ │ mov r6, r0 │ │ str r2, [r0, #0] │ │ mov r0, r1 │ │ mov r1, r5 │ │ movs r2, #16 │ │ mov r3, r6 │ │ - bl 49e28 │ │ + bl 4a130 │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrd r1, r0, [sp, #88] @ 0x58 │ │ cmp r1, #1 │ │ - bne.n 49be0 │ │ + bne.n 49ee8 │ │ ldr r1, [sp, #96] @ 0x60 │ │ ldr r2, [sp, #100] @ 0x64 │ │ ldr r3, [sp, #104] @ 0x68 │ │ str.w r0, [fp] │ │ str.w r1, [fp, #4] │ │ str.w r2, [fp, #8] │ │ str.w r3, [fp, #12] │ │ - b.n 49c98 │ │ + b.n 49fa0 │ │ cmp r0, #0 │ │ - beq.n 49c68 │ │ + beq.n 49f70 │ │ ldr r0, [sp, #104] @ 0x68 │ │ cmp r0, #8 │ │ - bne.n 49cd8 │ │ + bne.n 49fe0 │ │ ldr r0, [sp, #100] @ 0x64 │ │ mov.w r9, #2147483648 @ 0x80000000 │ │ add r1, sp, #40 @ 0x28 │ │ ldr r2, [r0, #0] │ │ ldr r0, [r0, #4] │ │ eor.w r3, r0, r9 │ │ add r0, sp, #88 @ 0x58 │ │ - bl 49fc0 │ │ + bl 4a2c8 │ │ ldr r1, [sp, #88] @ 0x58 │ │ movs r7, #17 │ │ ldrb.w r0, [sp, #92] @ 0x5c │ │ movt r7, #32768 @ 0x8000 │ │ cmp r1, r7 │ │ - bne.n 49c7a │ │ + bne.n 49f82 │ │ lsls r0, r0, #31 │ │ - beq.n 49c60 │ │ + beq.n 49f68 │ │ add r6, sp, #88 @ 0x58 │ │ add.w r8, sp, #40 @ 0x28 │ │ mov.w sl, #0 │ │ mov r0, r6 │ │ mov r1, r5 │ │ movs r2, #9 │ │ movs r3, #0 │ │ str.w sl, [sp, #4] │ │ - bl 49e28 │ │ + bl 4a130 │ │ ldrd r1, r0, [sp, #88] @ 0x58 │ │ cmp r1, #1 │ │ - beq.n 49bc8 │ │ + beq.n 49ed0 │ │ cmp r0, #0 │ │ - beq.n 49cc2 │ │ + beq.n 49fca │ │ ldr r0, [sp, #104] @ 0x68 │ │ cmp r0, #8 │ │ - bne.n 49cd8 │ │ + bne.n 49fe0 │ │ ldr r0, [sp, #100] @ 0x64 │ │ mov r1, r8 │ │ ldr r2, [r0, #0] │ │ ldr r0, [r0, #4] │ │ eor.w r3, r0, r9 │ │ mov r0, r6 │ │ - bl 49fc0 │ │ + bl 4a2c8 │ │ ldr r1, [sp, #88] @ 0x58 │ │ ldrb.w r0, [sp, #92] @ 0x5c │ │ cmp r1, r7 │ │ - bne.n 49c7a │ │ + bne.n 49f82 │ │ lsls r0, r0, #31 │ │ - bne.n 49c1e │ │ + bne.n 49f26 │ │ str.w r7, [fp] │ │ movs r0, #0 │ │ - b.n 49c74 │ │ + b.n 49f7c │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ str.w r0, [fp] │ │ movs r0, #1 │ │ strb.w r0, [fp, #4] │ │ - b.n 49c98 │ │ + b.n 49fa0 │ │ ldr r7, [sp, #100] @ 0x64 │ │ ldr.w r2, [sp, #93] @ 0x5d │ │ ldr.w r3, [sp, #97] @ 0x61 │ │ str.w r7, [fp, #12] │ │ str.w r3, [fp, #9] │ │ str.w r2, [fp, #5] │ │ strb.w r0, [fp, #4] │ │ str.w r1, [fp] │ │ add r0, sp, #48 @ 0x30 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #48] @ 0x30 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #52] @ 0x34 │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ add r0, sp, #16 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #16] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #20] │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ add sp, #116 @ 0x74 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ str.w r7, [fp] │ │ - b.n 49c72 │ │ - ldr r0, [pc, #36] @ (49cf0 ) │ │ + b.n 49f7a │ │ + ldr r0, [pc, #36] @ (49ff8 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ movs r0, #1 │ │ movs r1, #8 │ │ - bl 3dfa4 │ │ - ldr r0, [pc, #24] @ (49cf4 ) │ │ + bl 3e2ac │ │ + ldr r0, [pc, #24] @ (49ffc ) │ │ add r2, sp, #72 @ 0x48 │ │ - ldr r3, [pc, #24] @ (49cf8 ) │ │ - ldr r1, [pc, #28] @ (49cfc ) │ │ + ldr r3, [pc, #24] @ (4a000 ) │ │ + ldr r1, [pc, #28] @ (4a004 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ nop │ │ - lsrs r2, r0, #26 │ │ + lsrs r2, r1, #14 │ │ movs r1, r1 │ │ - bl fffedcf0 │ │ - lsrs r2, r5, #17 │ │ + bl ffce5ff8 │ │ + lsrs r2, r0, #5 │ │ movs r1, r1 │ │ - lsrs r0, r1, #22 │ │ + lsrs r0, r2, #10 │ │ movs r1, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #16 │ │ mov r8, r0 │ │ ldr r0, [r1, #16] │ │ cmp r0, #0 │ │ - bne.n 49e04 │ │ + bne.n 4a10c │ │ movw r0, #31829 @ 0x7c55 │ │ mov r6, r2 │ │ movt r0, #32586 @ 0x7f4a │ │ mov r4, r1 │ │ muls r0, r2 │ │ ldr r2, [r1, #24] │ │ ldr r1, [r1, #40] @ 0x28 │ │ mov.w r3, #4294967295 @ 0xffffffff │ │ str r3, [r4, #16] │ │ ands r0, r2 │ │ cmp r1, r0 │ │ - bls.n 49e14 │ │ + bls.n 4a11c │ │ ldr r1, [r4, #36] @ 0x24 │ │ add.w r0, r0, r0, lsl #1 │ │ movs r2, #16 │ │ movs r5, #0 │ │ add.w r0, r1, r0, lsl #2 │ │ ldr.w ip, [r0, #8] │ │ add.w r2, r2, ip, lsl #4 │ │ add.w r7, r5, #16 │ │ cmp r2, r7 │ │ - beq.n 49d86 │ │ + beq.n 4a08e │ │ ldr r3, [r0, #4] │ │ ldr r1, [r3, r5] │ │ add r5, r3 │ │ ldr r5, [r5, #4] │ │ eors r1, r6 │ │ orrs r1, r5 │ │ mov r5, r7 │ │ - bne.n 49d42 │ │ + bne.n 4a04a │ │ sub.w r2, ip, #1 │ │ adds r1, r3, r7 │ │ str r2, [r0, #8] │ │ subs r1, #16 │ │ lsls r7, r2, #4 │ │ ldr r0, [r4, #48] @ 0x30 │ │ add.w r2, r3, r2, lsl #4 │ │ @@ -50590,44 +50783,44 @@ │ │ subs r3, r0, #1 │ │ ldrd r5, r7, [r2, #4] │ │ ldr r2, [r2, #12] │ │ ldr r0, [r1, #8] │ │ str r3, [r4, #48] @ 0x30 │ │ strd ip, r5, [r1] │ │ strd r7, r2, [r1, #8] │ │ - b.n 49dcc │ │ + b.n 4a0d4 │ │ ldr r0, [r4, #0] │ │ cmp r0, #0 │ │ - bne.n 49e0c │ │ + bne.n 4a114 │ │ ldr r0, [r4, #12] │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ str r1, [r4, #0] │ │ - cbz r0, 49da4 │ │ + cbz r0, 4a0ac │ │ ldr r1, [r4, #8] │ │ subs r0, #1 │ │ str r0, [r4, #12] │ │ ldr.w r1, [r1, r0, lsl #2] │ │ movs r0, #0 │ │ - b.n 49db0 │ │ + b.n 4a0b8 │ │ movs r0, #0 │ │ - blx 9c0d4 │ │ + blx 9c0e0 │ │ mov r1, r0 │ │ ldr r0, [r4, #0] │ │ adds r0, #1 │ │ str r0, [r4, #0] │ │ mov r3, r6 │ │ ldr r0, [r4, #56] @ 0x38 │ │ ldr r2, [r0, #0] │ │ mov r0, sp │ │ - bl 49f18 │ │ + bl 4a220 │ │ ldrd r1, r0, [sp] │ │ movs r2, #17 │ │ movt r2, #32768 @ 0x8000 │ │ cmp r1, r2 │ │ - bne.n 49de8 │ │ + bne.n 4a0f0 │ │ ldr r2, [r4, #16] │ │ movs r1, #0 │ │ movs r3, #1 │ │ strd r6, r1, [r8, #8] │ │ strd r3, r0, [r8] │ │ adds r0, r2, #1 │ │ str.w r4, [r8, #16] │ │ @@ -50640,28 +50833,28 @@ │ │ add.w r1, r8, #8 │ │ ldrd r2, r3, [sp, #8] │ │ stmia r1!, {r0, r2, r3} │ │ adds r0, r7, #1 │ │ str r0, [r4, #16] │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ - ldr r0, [pc, #28] @ (49e24 ) │ │ + ldr r0, [pc, #28] @ (4a12c ) │ │ add r0, pc │ │ - bl 4132c │ │ - ldr r0, [pc, #12] @ (49e1c ) │ │ + bl 41634 │ │ + ldr r0, [pc, #12] @ (4a124 ) │ │ add r0, pc │ │ - bl 4132c │ │ - ldr r2, [pc, #8] @ (49e20 ) │ │ + bl 41634 │ │ + ldr r2, [pc, #8] @ (4a128 ) │ │ add r2, pc │ │ - bl 3fa74 │ │ - asrs r6, r1, #1 │ │ + bl 3fd7c │ │ + lsrs r6, r2, #21 │ │ movs r1, r1 │ │ - lsrs r6, r6, #18 │ │ + lsrs r6, r7, #6 │ │ movs r1, r1 │ │ - asrs r6, r4, #1 │ │ + lsrs r6, r5, #21 │ │ movs r1, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #32 │ │ mov r6, r1 │ │ mov r4, r0 │ │ ldrd r1, r0, [sp, #56] @ 0x38 │ │ cmp r3, #0 │ │ @@ -50675,194 +50868,194 @@ │ │ movne r1, #8 │ │ mov r7, r2 │ │ strd r0, r1, [sp, #12] │ │ add r1, sp, #4 │ │ add r2, sp, #12 │ │ mov r0, r6 │ │ mov r3, r7 │ │ - blx 9cec0 │ │ + blx 9cecc │ │ cmn.w r0, #2 │ │ - ble.n 49e7c │ │ + ble.n 4a184 │ │ adds r1, r0, #1 │ │ cmp r1, #2 │ │ - bcs.n 49e9c │ │ + bcs.n 4a1a4 │ │ add r3, sp, #4 │ │ add.w ip, r4, #4 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r0, r1, r2, r3} │ │ movs r0, #0 │ │ str r0, [r4, #0] │ │ add sp, #32 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movw r1, #34738 @ 0x87b2 │ │ movt r1, #65535 @ 0xffff │ │ cmp r0, r1 │ │ - beq.n 49ea0 │ │ + beq.n 4a1a8 │ │ movw r1, #34744 @ 0x87b8 │ │ movt r1, #65535 @ 0xffff │ │ cmp r0, r1 │ │ - bne.n 49eac │ │ + bne.n 4a1b4 │ │ movs r5, #3 │ │ movt r5, #32768 @ 0x8000 │ │ - b.n 49ef8 │ │ + b.n 4a200 │ │ cmp r0, #61 @ 0x3d │ │ - bne.n 49eac │ │ + bne.n 4a1b4 │ │ movs r0, #0 │ │ str r0, [r4, #4] │ │ str r0, [r4, #0] │ │ add sp, #32 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ mov r8, r0 │ │ - blx a96f8 │ │ + blx a9704 │ │ mov r5, r0 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #20 │ │ mov r1, r5 │ │ - bl 402e0 │ │ + bl 405e8 │ │ add r5, sp, #20 │ │ ldmia r5, {r0, r1, r5} │ │ - ldr r6, [pc, #76] @ (49f14 ) │ │ + ldr r6, [pc, #76] @ (4a21c ) │ │ cmp r0, #0 │ │ add r6, pc │ │ ite eq │ │ moveq r6, r1 │ │ movne r5, #27 │ │ cmp.w r5, #4294967295 @ 0xffffffff │ │ - bgt.n 49edc │ │ - bl 3e03c │ │ - cbz r5, 49eea │ │ + bgt.n 4a1e4 │ │ + bl 3e344 │ │ + cbz r5, 4a1f2 │ │ mov r0, r5 │ │ - blx d87f0 │ │ - cbz r0, 49f0a │ │ + blx d8810 │ │ + cbz r0, 4a212 │ │ mov r7, r0 │ │ - b.n 49eec │ │ + b.n 4a1f4 │ │ movs r7, #1 │ │ mov r0, r7 │ │ mov r1, r6 │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ mov r0, r8 │ │ strd r5, r0, [r4, #12] │ │ movs r0, #1 │ │ strd r5, r7, [r4, #4] │ │ str r0, [r4, #0] │ │ add sp, #32 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movs r0, #1 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - ldmia r3, {r0, r1, r3, r4, r6, r7} │ │ + ldmia r0, {r0, r1, r4, r6, r7} │ │ vtbl.8 d30, {d12-d13}, d29 │ │ mvns r0, r6 │ │ sub sp, #12 │ │ mov r5, r0 │ │ mov r0, r2 │ │ mov r2, r3 │ │ mov r4, r1 │ │ - blx 9c118 │ │ + blx 9c124 │ │ movs r6, #3 │ │ adds r1, r0, #1 │ │ movt r6, #32768 @ 0x8000 │ │ cmp r1, #2 │ │ - bcs.n 49f44 │ │ + bcs.n 4a24c │ │ add.w r0, r6, #14 │ │ strd r0, r4, [r5] │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ movw r1, #34744 @ 0x87b8 │ │ movt r1, #65535 @ 0xffff │ │ cmp r0, r1 │ │ - bne.n 49f52 │ │ - b.n 49fa0 │ │ + bne.n 4a25a │ │ + b.n 4a2a8 │ │ mov r9, r0 │ │ - blx a96f8 │ │ + blx a9704 │ │ mov r6, r0 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ mov r0, sp │ │ mov r1, r6 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldmia.w sp, {r0, r1, r6} │ │ - ldr r7, [pc, #76] @ (49fbc ) │ │ + ldr r7, [pc, #76] @ (4a2c4 ) │ │ cmp r0, #0 │ │ add r7, pc │ │ ite eq │ │ moveq r7, r1 │ │ movne r6, #27 │ │ cmp.w r6, #4294967295 @ 0xffffffff │ │ - bgt.n 49f82 │ │ - bl 3e03c │ │ - cbz r6, 49f90 │ │ + bgt.n 4a28a │ │ + bl 3e344 │ │ + cbz r6, 4a298 │ │ mov r0, r6 │ │ - blx d87f0 │ │ - cbz r0, 49fb4 │ │ + blx d8810 │ │ + cbz r0, 4a2bc │ │ mov r8, r0 │ │ - b.n 49f94 │ │ + b.n 4a29c │ │ mov.w r8, #1 │ │ mov r0, r8 │ │ mov r1, r7 │ │ mov r2, r6 │ │ - bl d53c6 │ │ + bl d52ea │ │ mov r0, r9 │ │ strd r6, r0, [r5, #8] │ │ mov r0, r4 │ │ strd r6, r8, [r5] │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ - b.w d873c │ │ + b.w d874c │ │ movs r0, #1 │ │ mov r1, r6 │ │ - bl 3dfa4 │ │ - ldmia r3!, {r0, r2, r4, r5} │ │ + bl 3e2ac │ │ + ldmia r0, {r0, r2, r3, r5} │ │ vtbl.8 d30, {d12-d13}, d29 │ │ mvns r0, r6 │ │ sub sp, #36 @ 0x24 │ │ ldr r5, [r1, #0] │ │ mov r4, r0 │ │ ldr r0, [r5, #0] │ │ cmp r0, #0 │ │ - beq.n 4a0a4 │ │ + beq.n 4a3ac │ │ movs r0, #8 │ │ mov r6, r3 │ │ mov r7, r2 │ │ mov r8, r1 │ │ mov.w r9, #8 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 4a0b8 │ │ + beq.n 4a3c0 │ │ eor.w r1, r6, #2147483648 @ 0x80000000 │ │ str r7, [r0, #0] │ │ str r1, [r0, #4] │ │ add r6, sp, #8 │ │ ldr r1, [r5, #4] │ │ mov r7, r0 │ │ movs r2, #0 │ │ mov r0, r6 │ │ strd r9, r2, [sp] │ │ movs r2, #16 │ │ mov r3, r7 │ │ - bl 49e28 │ │ + bl 4a130 │ │ mov r0, r7 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrd r3, r0, [sp, #16] │ │ ldr r2, [sp, #24] │ │ ldrd r7, r1, [sp, #8] │ │ cmp r7, #1 │ │ - bne.n 4a024 │ │ + bne.n 4a32c │ │ strd r1, r3, [r4] │ │ strd r0, r2, [r4, #8] │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ - cbz r1, 4a07a │ │ + cbz r1, 4a382 │ │ cmp r3, #8 │ │ - bne.n 4a0c0 │ │ + bne.n 4a3c8 │ │ cmp r2, #1 │ │ - bls.n 4a0ac │ │ + bls.n 4a3b4 │ │ ldr.w r5, [r8, #4] │ │ mov.w ip, #2147483648 @ 0x80000000 │ │ ldr r7, [r1, #0] │ │ ldr r3, [r1, #4] │ │ ldrd r1, r5, [r5] │ │ strd r0, r2, [sp, #16] │ │ eor.w r3, r3, ip │ │ @@ -50870,233 +51063,233 @@ │ │ mov r2, r7 │ │ ldrh r0, [r0, #0] │ │ str r0, [sp, #24] │ │ add.w r0, r6, #8 │ │ strd r0, r5, [sp] │ │ mov r0, r4 │ │ str r3, [sp, #12] │ │ - bl 483e0 │ │ + bl 486e8 │ │ movs r1, #13 │ │ ldr r0, [r4, #0] │ │ movt r1, #32768 @ 0x8000 │ │ adds r1, #4 │ │ cmp r0, r1 │ │ - bne.n 4a09e │ │ + bne.n 4a3a6 │ │ ldrb r0, [r4, #4] │ │ eor.w r0, r0, #1 │ │ strb r0, [r4, #4] │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ movs r0, #28 │ │ movs r6, #28 │ │ - blx d87f0 │ │ - cbz r0, 4a0d6 │ │ - ldr r1, [pc, #88] @ (4a0e0 ) │ │ + blx d8810 │ │ + cbz r0, 4a3de │ │ + ldr r1, [pc, #88] @ (4a3e8 ) │ │ movs r2, #28 │ │ mov r5, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #13 │ │ strd r5, r6, [r4, #8] │ │ movt r0, #32768 @ 0x8000 │ │ strd r0, r6, [r4] │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ - ldr r0, [pc, #60] @ (4a0e4 ) │ │ + ldr r0, [pc, #60] @ (4a3ec ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r3, [pc, #68] @ (4a0f4 ) │ │ + bl 3fd40 │ │ + ldr r3, [pc, #68] @ (4a3fc ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ movs r0, #1 │ │ movs r1, #8 │ │ - bl 3dfa4 │ │ - ldr r0, [pc, #36] @ (4a0e8 ) │ │ + bl 3e2ac │ │ + ldr r0, [pc, #36] @ (4a3f0 ) │ │ add r2, sp, #8 │ │ - ldr r3, [pc, #36] @ (4a0ec ) │ │ - ldr r1, [pc, #40] @ (4a0f0 ) │ │ + ldr r3, [pc, #36] @ (4a3f4 ) │ │ + ldr r1, [pc, #40] @ (4a3f8 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ movs r0, #1 │ │ movs r1, #28 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - ldmia r1, {r1, r5, r6, r7} │ │ - vtbl.8 d16, {d28-d30}, d22 │ │ + stmia r6!, {r1, r3, r4, r6, r7} │ │ + vqneg.s d16, d30 │ │ movs r1, r1 │ │ - bl 4060e4 │ │ - lsrs r2, r0, #2 │ │ + bl fe3ec │ │ + lsls r2, r3, #21 │ │ movs r1, r1 │ │ - lsrs r0, r4, #6 │ │ + lsls r0, r5, #26 │ │ movs r1, r1 │ │ - lsrs r2, r7, #5 │ │ + lsls r2, r0, #26 │ │ movs r1, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #20 │ │ mov r4, r0 │ │ add r0, sp, #8 │ │ mov r6, r1 │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r0, [sp, #8] │ │ cmp r0, #1 │ │ - bne.n 4a122 │ │ + bne.n 4a42a │ │ ldr.w r9, [sp, #16] │ │ movw r0, #43691 @ 0xaaab │ │ movt r0, #2730 @ 0xaaa │ │ cmp r9, r0 │ │ - bcc.n 4a12e │ │ - bl 3e03c │ │ + bcc.n 4a436 │ │ + bl 3e344 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str r0, [r4, #0] │ │ add sp, #20 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ str r4, [sp, #4] │ │ add.w r4, r9, r9, lsl #1 │ │ ldr.w r8, [sp, #12] │ │ lsls r7, r4, #2 │ │ - beq.n 4a160 │ │ + beq.n 4a468 │ │ mov r0, r7 │ │ - blx d87f0 │ │ + blx d8810 │ │ mov ip, r9 │ │ cmp r0, #0 │ │ - beq.n 4a212 │ │ + beq.n 4a51a │ │ cmp.w r9, #2 │ │ - bcc.n 4a16c │ │ + bcc.n 4a474 │ │ sub.w r2, r9, #1 │ │ movs r3, #0 │ │ mov r1, r0 │ │ str.w r3, [r1], #12 │ │ subs r2, #1 │ │ - bne.n 4a156 │ │ - b.n 4a174 │ │ + bne.n 4a45e │ │ + b.n 4a47c │ │ movs r0, #4 │ │ mov.w ip, #0 │ │ cmp.w r9, #2 │ │ - bcs.n 4a14e │ │ + bcs.n 4a456 │ │ mov r1, r0 │ │ cmp.w r9, #0 │ │ - beq.n 4a1de │ │ + beq.n 4a4e6 │ │ ldrd sl, r2, [r6] │ │ movs r3, #0 │ │ add.w lr, r4, r8 │ │ sub.w r4, r2, r8 │ │ adds r6, r0, #4 │ │ str r3, [r1, #0] │ │ mov r3, r9 │ │ - b.n 4a1a8 │ │ + b.n 4a4b0 │ │ ldrh.w fp, [sl, lr] │ │ add.w r5, sl, lr │ │ str.w r5, [r6, #-4] │ │ mov lr, r1 │ │ strd r7, fp, [r6] │ │ subs r4, #3 │ │ add.w r8, r8, #3 │ │ adds r6, #12 │ │ subs r3, #1 │ │ - beq.n 4a1de │ │ + beq.n 4a4e6 │ │ cmp r8, r2 │ │ - bhi.n 4a206 │ │ + bhi.n 4a50e │ │ cmp r4, #2 │ │ - bls.n 4a1ee │ │ + bls.n 4a4f6 │ │ add.w r7, sl, r8 │ │ ldrh.w r1, [sl, r8] │ │ ldrb r7, [r7, #2] │ │ orrs.w r1, r1, r7, lsl #16 │ │ - beq.n 4a19c │ │ + beq.n 4a4a4 │ │ subs r7, r1, #1 │ │ adds.w r1, r7, lr │ │ - bcs.n 4a1fc │ │ + bcs.n 4a504 │ │ cmp r1, r2 │ │ - bhi.n 4a1fc │ │ + bhi.n 4a504 │ │ cmp r7, #1 │ │ - bhi.n 4a18a │ │ - ldr r3, [pc, #84] @ (4a228 ) │ │ + bhi.n 4a492 │ │ + ldr r3, [pc, #84] @ (4a530 ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ mov r2, r7 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ ldr r1, [sp, #4] │ │ strd ip, r0, [r1] │ │ str.w r9, [r1, #8] │ │ add sp, #20 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #44] @ (4a21c ) │ │ + ldr r0, [pc, #44] @ (4a524 ) │ │ movs r1, #75 @ 0x4b │ │ - ldr r2, [pc, #44] @ (4a220 ) │ │ + ldr r2, [pc, #44] @ (4a528 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r3, [pc, #44] @ (4a22c ) │ │ + bl 3fd54 │ │ + ldr r3, [pc, #44] @ (4a534 ) │ │ mov r0, lr │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #28] @ (4a224 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #28] @ (4a52c ) │ │ mov r0, r8 │ │ mov r1, r2 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ movs r0, #4 │ │ mov r1, r7 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - stmia r4!, {r0, r1, r3, r4} │ │ - vtbx.8 d16, {d12}, d22 │ │ + stmia r1!, {r0, r1, r4} │ │ + @ instruction: 0xfffc056e │ │ movs r1, r1 │ │ - lsrs r0, r2, #24 │ │ + lsrs r0, r3, #12 │ │ movs r1, r1 │ │ - lsrs r4, r2, #1 │ │ + lsls r4, r3, #21 │ │ movs r1, r1 │ │ - lsrs r4, r5, #23 │ │ + lsrs r4, r6, #11 │ │ movs r1, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #68 @ 0x44 │ │ ldr r3, [r0, #12] │ │ str r3, [sp, #16] │ │ adds r7, r3, r1 │ │ - bcs.w 4a550 │ │ + bcs.w 4a858 │ │ ldr.w lr, [r0, #4] │ │ mov r8, r0 │ │ add.w r3, lr, #1 │ │ cmp.w lr, #8 │ │ mov.w r0, r3, lsr #3 │ │ mov.w r0, r0, lsl #3 │ │ sub.w r1, r0, r3, lsr #3 │ │ mov r0, r1 │ │ it cc │ │ movcc r0, lr │ │ cmp.w r7, r0, lsr #1 │ │ str.w lr, [sp, #48] @ 0x30 │ │ - bls.w 4a38a │ │ + bls.w 4a692 │ │ adds r0, #1 │ │ mov r6, r2 │ │ cmp r0, r7 │ │ it hi │ │ movhi r7, r0 │ │ add r0, sp, #52 @ 0x34 │ │ movs r1, #8 │ │ mov r2, r7 │ │ - bl 4a57c │ │ + bl 4a884 │ │ ldrd r4, r5, [sp, #52] @ 0x34 │ │ cmp r4, #0 │ │ - beq.w 4a512 │ │ + beq.w 4a81a │ │ ldr r0, [sp, #60] @ 0x3c │ │ strd r0, r8, [sp, #8] │ │ ldr.w r0, [r8] │ │ ldr.w lr, [sp, #48] @ 0x30 │ │ str r0, [sp, #44] @ 0x2c │ │ ldr r0, [sp, #16] │ │ cmp r0, #0 │ │ - beq.w 4a4de │ │ + beq.w 4a7e6 │ │ ldr r7, [sp, #44] @ 0x2c │ │ adds r0, r4, #4 │ │ str r0, [sp, #40] @ 0x28 │ │ mov.w r9, #2155905152 @ 0x80808080 │ │ mov.w sl, #0 │ │ mov r1, r7 │ │ ldr.w r0, [r1], #-8 │ │ @@ -51108,41 +51301,41 @@ │ │ str r1, [sp, #28] │ │ ldr r1, [r6, #8] │ │ str r1, [sp, #24] │ │ ldr r1, [r6, #12] │ │ ldr r6, [sp, #16] │ │ str r1, [sp, #20] │ │ cmp.w r8, #0 │ │ - bne.n 4a2e2 │ │ + bne.n 4a5ea │ │ ldr.w r0, [r7, #4]! │ │ add.w sl, sl, #4 │ │ bics.w r8, r9, r0 │ │ - beq.n 4a2d4 │ │ + beq.n 4a5dc │ │ rev.w r0, r8 │ │ ldrd r3, r2, [sp, #20] │ │ clz r0, r0 │ │ add.w fp, sl, r0, lsr #3 │ │ ldr r0, [sp, #36] @ 0x24 │ │ sub.w r0, r0, fp, lsl #3 │ │ ldrd r0, r1, [r0] │ │ strd r0, r1, [sp] │ │ ldrd r1, r0, [sp, #28] │ │ - bl 4a65c │ │ + bl 4a964 │ │ and.w r1, r5, r0 │ │ ldr r2, [r4, r1] │ │ bics.w r2, r2, #2139062143 @ 0x7f7f7f7f │ │ - beq.n 4a360 │ │ + beq.n 4a668 │ │ ldr.w lr, [sp, #48] @ 0x30 │ │ rev r2, r2 │ │ clz r2, r2 │ │ add.w r1, r1, r2, lsr #3 │ │ ands r1, r5 │ │ ldrsb r2, [r4, r1] │ │ cmp r2, #0 │ │ - bpl.n 4a37a │ │ + bpl.n 4a682 │ │ sub.w r2, r8, #1 │ │ ldr r3, [sp, #40] @ 0x28 │ │ and.w r8, r8, r2 │ │ subs r2, r1, #4 │ │ ands r2, r5 │ │ lsrs r0, r0, #25 │ │ strb r0, [r4, r1] │ │ @@ -51153,33 +51346,33 @@ │ │ ldr r3, [sp, #44] @ 0x2c │ │ ldr.w r2, [r3, r0, lsl #3] │ │ add.w r0, r3, r0, lsl #3 │ │ ldr r0, [r0, #4] │ │ str.w r2, [r4, r1, lsl #3] │ │ add.w r1, r4, r1, lsl #3 │ │ str r0, [r1, #4] │ │ - bne.n 4a2ce │ │ - b.n 4a4de │ │ + bne.n 4a5d6 │ │ + b.n 4a7e6 │ │ ldr.w lr, [sp, #48] @ 0x30 │ │ mov.w ip, #4 │ │ add r1, ip │ │ add.w ip, ip, #4 │ │ ands r1, r5 │ │ ldr r2, [r4, r1] │ │ bics.w r2, r2, #2139062143 @ 0x7f7f7f7f │ │ - bne.n 4a318 │ │ - b.n 4a368 │ │ + bne.n 4a620 │ │ + b.n 4a670 │ │ ldr r1, [r4, #0] │ │ bic.w r1, r1, #2139062143 @ 0x7f7f7f7f │ │ rev r1, r1 │ │ clz r1, r1 │ │ lsrs r1, r1, #3 │ │ - b.n 4a32a │ │ + b.n 4a632 │ │ cmp r3, #0 │ │ - beq.w 4a528 │ │ + beq.w 4a830 │ │ str r1, [sp, #36] @ 0x24 │ │ movs r0, #1 │ │ ldr.w r5, [r8] │ │ lsrs r1, r3, #2 │ │ lsls r7, r3, #30 │ │ it ne │ │ addne.w r1, r0, r3, lsr #2 │ │ @@ -51189,117 +51382,117 @@ │ │ ldr.w r6, [r5, r1, lsl #2] │ │ bic.w r4, r7, r6, lsr #7 │ │ orr.w r6, r6, #2139062143 @ 0x7f7f7f7f │ │ add r6, r4 │ │ str.w r6, [r5, r1, lsl #2] │ │ adds r1, #1 │ │ adds r6, r0, r1 │ │ - bne.n 4a3aa │ │ + bne.n 4a6b2 │ │ mov fp, r8 │ │ cmp r3, #4 │ │ add.w r0, r5, #4 │ │ str r0, [sp, #44] @ 0x2c │ │ - bcc.w 4a55e │ │ + bcc.w 4a866 │ │ ldr r0, [r5, #0] │ │ str r0, [r5, r3] │ │ adds r7, r2, #4 │ │ ldr r0, [r2, #0] │ │ str r0, [sp, #40] @ 0x28 │ │ movs r0, #0 │ │ ldmia r7, {r4, r6, r7} │ │ - b.n 4a4a8 │ │ + b.n 4a7b0 │ │ ldrd r0, r1, [sl, #-8] │ │ mov r2, r6 │ │ strd r0, r1, [sp] │ │ mov r1, r4 │ │ ldr r0, [sp, #40] @ 0x28 │ │ mov r3, r7 │ │ - bl 4a65c │ │ + bl 4a964 │ │ ldr.w lr, [sp, #48] @ 0x30 │ │ and.w r1, lr, r0 │ │ ldr r2, [r5, r1] │ │ bics.w r3, r2, #2139062143 @ 0x7f7f7f7f │ │ - beq.n 4a464 │ │ + beq.n 4a76c │ │ mov r2, r1 │ │ rev r3, r3 │ │ clz r3, r3 │ │ add.w r2, r2, r3, lsr #3 │ │ and.w r2, r2, lr │ │ ldrsb r3, [r5, r2] │ │ cmp r3, #0 │ │ - bpl.n 4a47e │ │ + bpl.n 4a786 │ │ sub.w r3, r8, r1 │ │ subs r1, r2, r1 │ │ eors r1, r3 │ │ and.w r1, r1, lr │ │ cmp r1, #4 │ │ - bcc.n 4a48e │ │ + bcc.n 4a796 │ │ subs r3, r2, #4 │ │ ldr r1, [sp, #44] @ 0x2c │ │ and.w r3, r3, lr │ │ lsrs r0, r0, #25 │ │ ldrb.w ip, [r5, r2] │ │ strb r0, [r5, r2] │ │ strb r0, [r1, r3] │ │ mvns r0, r2 │ │ add.w r0, r5, r0, lsl #3 │ │ cmp.w ip, #255 @ 0xff │ │ - beq.n 4a4be │ │ + beq.n 4a7c6 │ │ ldr.w r1, [r9] │ │ ldr r3, [r0, #0] │ │ ldr.w ip, [r9, #4] │ │ ldr r2, [r0, #4] │ │ str.w r3, [r9] │ │ str r1, [r0, #0] │ │ str.w r2, [r9, #4] │ │ str.w ip, [r0, #4] │ │ - b.n 4a3e0 │ │ + b.n 4a6e8 │ │ mov.w ip, #4 │ │ mov r2, r1 │ │ add r2, ip │ │ add.w ip, ip, #4 │ │ and.w r2, r2, lr │ │ ldr r3, [r5, r2] │ │ bics.w r3, r3, #2139062143 @ 0x7f7f7f7f │ │ - bne.n 4a406 │ │ - b.n 4a46a │ │ + bne.n 4a70e │ │ + b.n 4a772 │ │ ldr r2, [r5, #0] │ │ bic.w r2, r2, #2139062143 @ 0x7f7f7f7f │ │ rev r2, r2 │ │ clz r2, r2 │ │ lsrs r2, r2, #3 │ │ - b.n 4a41a │ │ + b.n 4a722 │ │ sub.w r1, r8, #4 │ │ ldr r2, [sp, #44] @ 0x2c │ │ and.w r1, r1, lr │ │ lsrs r0, r0, #25 │ │ strb.w r0, [r5, r8] │ │ strb r0, [r2, r1] │ │ add.w r0, r8, #1 │ │ cmp r8, lr │ │ - beq.n 4a51a │ │ + beq.n 4a822 │ │ mov r8, r0 │ │ ldrb r0, [r5, r0] │ │ cmp r0, #128 @ 0x80 │ │ - bne.n 4a4a0 │ │ + bne.n 4a7a8 │ │ mvn.w r0, r8 │ │ sub.w sl, r5, r8, lsl #3 │ │ add.w r9, r5, r0, lsl #3 │ │ - b.n 4a3e0 │ │ + b.n 4a6e8 │ │ sub.w r1, r8, #4 │ │ ldr r2, [sp, #44] @ 0x2c │ │ and.w r1, r1, lr │ │ movs r3, #255 @ 0xff │ │ strb.w r3, [r5, r8] │ │ strb r3, [r2, r1] │ │ ldr.w r1, [r9] │ │ ldr.w r2, [r9, #4] │ │ str r2, [r0, #4] │ │ str r1, [r0, #0] │ │ - b.n 4a4a0 │ │ + b.n 4a7a8 │ │ ldr r0, [sp, #16] │ │ cmp.w lr, #0 │ │ ldr r1, [sp, #8] │ │ sub.w r0, r1, r0 │ │ ldr r1, [sp, #12] │ │ strd r4, r5, [r1] │ │ movw r5, #1 │ │ @@ -51308,140 +51501,140 @@ │ │ movne r0, #11 │ │ addne.w r0, r0, lr, lsl #3 │ │ bicne.w r0, r0, #3 │ │ addne.w r1, lr, r0 │ │ movt r5, #32768 @ 0x8000 │ │ it ne │ │ addsne.w r1, r1, #5 │ │ - bne.n 4a540 │ │ + bne.n 4a848 │ │ mov r0, r5 │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r1, [sp, #36] @ 0x24 │ │ mov r8, fp │ │ cmp.w lr, #8 │ │ it cc │ │ movcc r1, lr │ │ - b.n 4a52a │ │ + b.n 4a832 │ │ movs r1, #0 │ │ ldr r0, [sp, #16] │ │ movs r5, #1 │ │ movt r5, #32768 @ 0x8000 │ │ subs r0, r1, r0 │ │ str.w r0, [r8, #8] │ │ mov r0, r5 │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r1, [sp, #44] @ 0x2c │ │ subs r0, r1, r0 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r5 │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #32] @ (4a574 ) │ │ + ldr r0, [pc, #32] @ (4a87c ) │ │ movs r1, #57 @ 0x39 │ │ - ldr r2, [pc, #32] @ (4a578 ) │ │ + ldr r2, [pc, #32] @ (4a880 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ ldr r0, [sp, #44] @ 0x2c │ │ mov r4, r2 │ │ mov r1, r5 │ │ mov r2, r3 │ │ - bl d520a │ │ + bl d531a │ │ ldr.w lr, [sp, #48] @ 0x30 │ │ mov r2, r4 │ │ - b.n 4a3d4 │ │ + b.n 4a6dc │ │ nop │ │ - pop {r1, r2, r5, pc} │ │ - @ instruction: 0xfffc01cc │ │ - movs r1, r1 │ │ + rev r6, r3 │ │ + @ instruction: 0xfffcfed4 │ │ + movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #8 │ │ mov r8, r0 │ │ cmp r2, #15 │ │ - bcs.n 4a598 │ │ + bcs.n 4a8a0 │ │ and.w r0, r2, #8 │ │ cmp r2, #4 │ │ add.w r7, r0, #8 │ │ it cc │ │ movcc r7, #4 │ │ - b.n 4a5c8 │ │ + b.n 4a8d0 │ │ movs r0, #0 │ │ cmp.w r0, r2, lsr #29 │ │ - bne.n 4a5e2 │ │ + bne.n 4a8ea │ │ movw r3, #18725 @ 0x4925 │ │ lsls r0, r2, #3 │ │ movt r3, #9362 @ 0x2492 │ │ umull r0, r3, r0, r3 │ │ rsb r0, r3, r2, lsl #3 │ │ mov.w r2, #4294967295 @ 0xffffffff │ │ add.w r0, r3, r0, lsr #1 │ │ add.w r0, r2, r0, lsr #2 │ │ clz r0, r0 │ │ lsr.w r0, r2, r0 │ │ adds r7, r0, #1 │ │ umull r0, r1, r1, r7 │ │ - cbnz r1, 4a5e2 │ │ + cbnz r1, 4a8ea │ │ cmn.w r0, #4 │ │ itttt ls │ │ addls r5, r7, #4 │ │ addls r0, #3 │ │ bicls.w r4, r0, #3 │ │ addsls.w r6, r5, r4 │ │ - bcc.n 4a5f0 │ │ - ldr r0, [pc, #112] @ (4a654 ) │ │ + bcc.n 4a8f8 │ │ + ldr r0, [pc, #112] @ (4a95c ) │ │ movs r1, #57 @ 0x39 │ │ - ldr r2, [pc, #112] @ (4a658 ) │ │ + ldr r2, [pc, #112] @ (4a960 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ movw r0, #65532 @ 0xfffc │ │ movt r0, #32767 @ 0x7fff │ │ cmp r6, r0 │ │ - bhi.n 4a5e2 │ │ - cbz r6, 4a60a │ │ + bhi.n 4a8ea │ │ + cbz r6, 4a912 │ │ cmp r6, #3 │ │ - bls.n 4a60e │ │ + bls.n 4a916 │ │ mov r0, r6 │ │ - blx d87f0 │ │ - b.n 4a620 │ │ + blx d8810 │ │ + b.n 4a928 │ │ movs r0, #4 │ │ - b.n 4a622 │ │ + b.n 4a92a │ │ movs r0, #0 │ │ movs r1, #4 │ │ str r0, [sp, #4] │ │ add r0, sp, #4 │ │ mov r2, r6 │ │ - blx d8880 │ │ - cbnz r0, 4a64c │ │ + blx d8890 │ │ + cbnz r0, 4a954 │ │ ldr r0, [sp, #4] │ │ - cbz r0, 4a64c │ │ + cbz r0, 4a954 │ │ adds r6, r0, r4 │ │ mov r1, r5 │ │ movs r2, #255 @ 0xff │ │ mov r0, r6 │ │ - bl d51b2 │ │ + bl d52ee │ │ subs r1, r7, #1 │ │ lsrs r2, r7, #3 │ │ movs r0, #0 │ │ lsls r2, r2, #3 │ │ cmp r1, #8 │ │ strd r6, r1, [r8] │ │ it cs │ │ subcs.w r1, r2, r7, lsr #3 │ │ strd r1, r0, [r8, #8] │ │ add sp, #8 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movs r0, #4 │ │ mov r1, r6 │ │ - bl 3de2a │ │ - pop {r2, r4, r7} │ │ - vsra.u32 d16, d26, #4 │ │ - movs r1, r1 │ │ + bl 3e132 │ │ + cbnz r4, 4a982 │ │ + vqrdmlah.s , q6, d2[0] │ │ + movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #68 @ 0x44 │ │ movw r4, #25698 @ 0x6462 │ │ mov ip, r2 │ │ movt r4, #29797 @ 0x7465 │ │ strd ip, r3, [sp, #40] @ 0x28 │ │ eors r4, r3 │ │ @@ -51478,21 +51671,21 @@ │ │ movt r3, #28787 @ 0x7073 │ │ eors r0, r3 │ │ str r0, [sp, #0] │ │ movs r0, #0 │ │ strd r0, r0, [sp, #48] @ 0x30 │ │ strd r0, r0, [sp, #56] @ 0x38 │ │ mov r0, r4 │ │ - bl 4a8d8 │ │ + bl 4abe0 │ │ movs r0, #255 @ 0xff │ │ add.w r1, sp, #67 @ 0x43 │ │ strb.w r0, [sp, #67] @ 0x43 │ │ mov r0, r4 │ │ movs r2, #1 │ │ - bl 4a8d8 │ │ + bl 4abe0 │ │ ldr r1, [sp, #56] @ 0x38 │ │ ldrd ip, r2, [sp, #48] @ 0x30 │ │ ldrd r3, r4, [sp, #24] │ │ orr.w lr, r2, r1, lsl #24 │ │ ldrd r1, r5, [sp, #8] │ │ eor.w r2, lr, r4 │ │ eor.w r3, r3, ip │ │ @@ -51635,38 +51828,38 @@ │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #28 │ │ ldrd r3, ip, [r0, #56] @ 0x38 │ │ mov r8, r0 │ │ cmp.w ip, #0 │ │ add r3, r2 │ │ str r3, [r0, #56] @ 0x38 │ │ - beq.n 4a914 │ │ + beq.n 4ac1c │ │ rsb r7, ip, #8 │ │ mov r3, r2 │ │ cmp r7, r2 │ │ it cc │ │ movcc r3, r7 │ │ mov r0, r7 │ │ cmp r3, #4 │ │ - bcc.n 4a918 │ │ + bcc.n 4ac20 │ │ ldr.w lr, [r1] │ │ mov.w r9, #0 │ │ movs r5, #4 │ │ orr.w r6, r5, #1 │ │ cmp r6, r3 │ │ - bcc.n 4a92a │ │ - b.n 4a95e │ │ + bcc.n 4ac32 │ │ + b.n 4ac66 │ │ movs r0, #0 │ │ - b.n 4aa96 │ │ + b.n 4ad9e │ │ movs r5, #0 │ │ mov.w lr, #0 │ │ mov.w r9, #0 │ │ orr.w r6, r5, #1 │ │ cmp r6, r3 │ │ - bcs.n 4a95e │ │ + bcs.n 4ac66 │ │ ldrh r6, [r1, r5] │ │ movs r4, #32 │ │ sub.w r4, r4, r5, lsl #3 │ │ mvn.w r7, #31 │ │ add.w r7, r7, r5, lsl #3 │ │ lsr.w r4, r6, r4 │ │ cmp r7, #0 │ │ @@ -51676,15 +51869,15 @@ │ │ mov.w r4, r5, lsl #3 │ │ orr.w r5, r5, #2 │ │ lsl.w r4, r6, r4 │ │ it pl │ │ movpl r4, #0 │ │ orr.w lr, lr, r4 │ │ cmp r5, r3 │ │ - bcs.n 4a992 │ │ + bcs.n 4ac9a │ │ ldrb r3, [r1, r5] │ │ movs r6, #32 │ │ sub.w r6, r6, r5, lsl #3 │ │ mvn.w r4, #31 │ │ add.w r4, r4, r5, lsl #3 │ │ lsr.w r6, r3, r6 │ │ cmp r4, #0 │ │ @@ -51709,15 +51902,15 @@ │ │ lsr.w r3, lr, r3 │ │ orr.w r3, r3, r4 │ │ it pl │ │ lslpl.w r3, lr, r7 │ │ orr.w r9, r6, r3 │ │ cmp r2, r0 │ │ strd fp, r9, [r8, #48] @ 0x30 │ │ - bcs.n 4a9dc │ │ + bcs.n 4ace4 │ │ add.w r4, ip, r2 │ │ str.w r4, [r8, #60] @ 0x3c │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr.w r6, [r8, #8] │ │ add.w lr, r8, #16 │ │ str r6, [sp, #16] │ │ @@ -51776,15 +51969,15 @@ │ │ str.w r3, [r8, #28] │ │ eor.w r3, r6, r9 │ │ str.w r3, [r8, #4] │ │ subs r2, r2, r0 │ │ and.w r4, r2, #7 │ │ bic.w r2, r2, #7 │ │ cmp r0, r2 │ │ - bcs.n 4ab86 │ │ + bcs.n 4ae8e │ │ ldrd lr, r3, [r8, #8] │ │ add.w sl, r8, #16 │ │ ldrd r7, r6, [r8] │ │ ldr.w r9, [r8, #28] │ │ str r3, [sp, #24] │ │ ldmia.w sl, {r3, r5, sl} │ │ str r4, [sp, #0] │ │ @@ -51838,38 +52031,38 @@ │ │ ldrd r1, r5, [sp, #12] │ │ eor.w r3, fp, r2 │ │ ldr r2, [sp, #8] │ │ eors r6, r4 │ │ mov r0, r8 │ │ str.w fp, [sp, #24] │ │ cmp r8, r2 │ │ - bcc.n 4aac4 │ │ + bcc.n 4adcc │ │ ldr.w r8, [sp, #4] │ │ ldr r4, [sp, #0] │ │ ldr r2, [sp, #24] │ │ add.w ip, r8, #12 │ │ strd r7, r6, [r8] │ │ str.w lr, [r8, #8] │ │ stmia.w ip, {r2, r3, r5, sl} │ │ str.w r9, [r8, #28] │ │ cmp r4, #4 │ │ - bcc.n 4ab9c │ │ + bcc.n 4aea4 │ │ ldr r2, [r1, r0] │ │ mov.w ip, #0 │ │ movs r7, #4 │ │ orr.w r3, r7, #1 │ │ cmp r3, r4 │ │ - bcc.n 4abac │ │ - b.n 4abe0 │ │ + bcc.n 4aeb4 │ │ + b.n 4aee8 │ │ movs r7, #0 │ │ movs r2, #0 │ │ mov.w ip, #0 │ │ orr.w r3, r7, #1 │ │ cmp r3, r4 │ │ - bcs.n 4abe0 │ │ + bcs.n 4aee8 │ │ adds r3, r1, r0 │ │ movs r5, #32 │ │ sub.w r5, r5, r7, lsl #3 │ │ mvn.w r6, #31 │ │ ldrh r3, [r3, r7] │ │ add.w r6, r6, r7, lsl #3 │ │ cmp r6, #0 │ │ @@ -51880,15 +52073,15 @@ │ │ lsl.w r3, r3, r6 │ │ orr.w ip, ip, r5 │ │ it pl │ │ movpl r3, #0 │ │ orrs r2, r3 │ │ orr.w r7, r7, #2 │ │ cmp r7, r4 │ │ - bcs.n 4ac14 │ │ + bcs.n 4af1c │ │ adds r3, r7, r0 │ │ movs r6, #32 │ │ sub.w r6, r6, r7, lsl #3 │ │ ldrb r1, [r1, r3] │ │ mvn.w r3, #31 │ │ add.w r3, r3, r7, lsl #3 │ │ cmp r3, #0 │ │ @@ -51901,53 +52094,53 @@ │ │ it pl │ │ movpl r1, #0 │ │ orrs r2, r1 │ │ strd r2, ip, [r8, #48] @ 0x30 │ │ str.w r4, [r8, #60] @ 0x3c │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - bmi.n 4abce │ │ + bmi.n 4aed6 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #68 @ 0x44 │ │ ldr r6, [r0, #12] │ │ adds r7, r6, r1 │ │ - bcs.w 4af34 │ │ + bcs.w 4b23c │ │ ldr.w lr, [r0, #4] │ │ mov r8, r0 │ │ add.w r3, lr, #1 │ │ cmp.w lr, #8 │ │ mov.w r0, r3, lsr #3 │ │ mov.w r0, r0, lsl #3 │ │ sub.w r1, r0, r3, lsr #3 │ │ mov r0, r1 │ │ it cc │ │ movcc r0, lr │ │ cmp.w r7, r0, lsr #1 │ │ str.w lr, [sp, #48] @ 0x30 │ │ - bls.w 4ad74 │ │ + bls.w 4b07c │ │ adds r0, #1 │ │ mov r4, r2 │ │ cmp r0, r7 │ │ it hi │ │ movhi r7, r0 │ │ add r0, sp, #52 @ 0x34 │ │ movs r1, #4 │ │ mov r2, r7 │ │ - bl 4a57c │ │ + bl 4a884 │ │ ldrd r7, r5, [sp, #52] @ 0x34 │ │ cmp r7, #0 │ │ - beq.w 4aef6 │ │ + beq.w 4b1fe │ │ ldr.w lr, [sp, #48] @ 0x30 │ │ cmp r6, #0 │ │ ldr r0, [sp, #60] @ 0x3c │ │ strd r0, r8, [sp, #8] │ │ ldr.w r0, [r8] │ │ str r0, [sp, #44] @ 0x2c │ │ str r6, [sp, #16] │ │ - beq.w 4aec2 │ │ + beq.w 4b1ca │ │ ldr r6, [sp, #44] @ 0x2c │ │ adds r0, r7, #4 │ │ str r0, [sp, #40] @ 0x28 │ │ mov.w r8, #2155905152 @ 0x80808080 │ │ mov.w sl, #0 │ │ mov r1, r6 │ │ ldr.w r0, [r1], #-4 │ │ @@ -51959,75 +52152,75 @@ │ │ str r1, [sp, #28] │ │ ldr r1, [r4, #8] │ │ str r1, [sp, #24] │ │ ldr r1, [r4, #12] │ │ ldr r4, [sp, #16] │ │ str r1, [sp, #20] │ │ cmp.w r9, #0 │ │ - bne.n 4acd4 │ │ + bne.n 4afdc │ │ ldr.w r0, [r6, #4]! │ │ add.w sl, sl, #4 │ │ bics.w r9, r8, r0 │ │ - beq.n 4acc6 │ │ + beq.n 4afce │ │ rev.w r0, r9 │ │ ldrd r3, r2, [sp, #20] │ │ clz r0, r0 │ │ add.w fp, sl, r0, lsr #3 │ │ ldr r0, [sp, #36] @ 0x24 │ │ sub.w r0, r0, fp, lsl #2 │ │ ldr r0, [r0, #0] │ │ ldrd r0, r1, [r0, #4] │ │ strd r0, r1, [sp] │ │ ldrd r1, r0, [sp, #28] │ │ - bl 4af60 │ │ + bl 4b268 │ │ and.w r1, r5, r0 │ │ ldr r2, [r7, r1] │ │ bics.w r2, r2, #2139062143 @ 0x7f7f7f7f │ │ - beq.n 4ad4a │ │ + beq.n 4b052 │ │ ldr.w lr, [sp, #48] @ 0x30 │ │ rev r2, r2 │ │ clz r2, r2 │ │ add.w r1, r1, r2, lsr #3 │ │ ands r1, r5 │ │ ldrsb r2, [r7, r1] │ │ cmp r2, #0 │ │ - bpl.n 4ad64 │ │ + bpl.n 4b06c │ │ sub.w r2, r9, #1 │ │ ldr r3, [sp, #40] @ 0x28 │ │ and.w r9, r9, r2 │ │ subs r2, r1, #4 │ │ ands r2, r5 │ │ lsrs r0, r0, #25 │ │ strb r0, [r7, r1] │ │ subs r4, #1 │ │ mvn.w r1, r1 │ │ strb r0, [r3, r2] │ │ mvn.w r0, fp │ │ ldr r2, [sp, #44] @ 0x2c │ │ ldr.w r0, [r2, r0, lsl #2] │ │ str.w r0, [r7, r1, lsl #2] │ │ - bne.n 4acc0 │ │ - b.n 4aec2 │ │ + bne.n 4afc8 │ │ + b.n 4b1ca │ │ ldr.w lr, [sp, #48] @ 0x30 │ │ mov.w ip, #4 │ │ add r1, ip │ │ add.w ip, ip, #4 │ │ ands r1, r5 │ │ ldr r2, [r7, r1] │ │ bics.w r2, r2, #2139062143 @ 0x7f7f7f7f │ │ - bne.n 4ad0c │ │ - b.n 4ad52 │ │ + bne.n 4b014 │ │ + b.n 4b05a │ │ ldr r1, [r7, #0] │ │ bic.w r1, r1, #2139062143 @ 0x7f7f7f7f │ │ rev r1, r1 │ │ clz r1, r1 │ │ lsrs r1, r1, #3 │ │ - b.n 4ad1e │ │ + b.n 4b026 │ │ cmp r3, #0 │ │ - beq.w 4af0e │ │ + beq.w 4b216 │ │ str r1, [sp, #32] │ │ movs r0, #1 │ │ ldr.w r5, [r8] │ │ lsrs r1, r3, #2 │ │ lsls r7, r3, #30 │ │ str r6, [sp, #16] │ │ it ne │ │ @@ -52038,111 +52231,111 @@ │ │ ldr.w r6, [r5, r1, lsl #2] │ │ bic.w r4, r7, r6, lsr #7 │ │ orr.w r6, r6, #2139062143 @ 0x7f7f7f7f │ │ add r6, r4 │ │ str.w r6, [r5, r1, lsl #2] │ │ adds r1, #1 │ │ adds r6, r0, r1 │ │ - bne.n 4ad96 │ │ + bne.n 4b09e │ │ mov fp, r8 │ │ cmp r3, #4 │ │ add.w r0, r5, #4 │ │ str r0, [sp, #44] @ 0x2c │ │ - bcc.w 4af42 │ │ + bcc.w 4b24a │ │ ldr r0, [r5, #0] │ │ str r0, [r5, r3] │ │ ldr r0, [r2, #0] │ │ sub.w r8, r5, #4 │ │ ldrd r6, r4, [r2, #8] │ │ str r0, [sp, #40] @ 0x28 │ │ ldr r0, [r2, #4] │ │ str r0, [sp, #36] @ 0x24 │ │ movs r0, #0 │ │ - b.n 4ae94 │ │ + b.n 4b19c │ │ ldr.w r0, [r8, r7, lsl #2] │ │ mov r2, r6 │ │ mov r3, r4 │ │ ldrd r0, r1, [r0, #4] │ │ strd r0, r1, [sp] │ │ ldrd r1, r0, [sp, #36] @ 0x24 │ │ - bl 4af60 │ │ + bl 4b268 │ │ ldr.w lr, [sp, #48] @ 0x30 │ │ and.w r1, lr, r0 │ │ ldr r2, [r5, r1] │ │ bics.w r3, r2, #2139062143 @ 0x7f7f7f7f │ │ - beq.n 4ae50 │ │ + beq.n 4b158 │ │ mov r2, r1 │ │ rev r3, r3 │ │ clz r3, r3 │ │ add.w r2, r2, r3, lsr #3 │ │ and.w r2, r2, lr │ │ ldrsb r3, [r5, r2] │ │ cmp r3, #0 │ │ - bpl.n 4ae6a │ │ + bpl.n 4b172 │ │ sub.w r3, r9, r1 │ │ subs r1, r2, r1 │ │ eors r1, r3 │ │ and.w r1, r1, lr │ │ cmp r1, #4 │ │ - bcc.n 4ae7a │ │ + bcc.n 4b182 │ │ subs r3, r2, #4 │ │ ldr r1, [sp, #44] @ 0x2c │ │ ldrb.w ip, [r5, r2] │ │ and.w r3, r3, lr │ │ lsrs r0, r0, #25 │ │ strb r0, [r5, r2] │ │ cmp.w ip, #255 @ 0xff │ │ strb r0, [r1, r3] │ │ mvn.w r0, r2 │ │ - beq.n 4aea6 │ │ + beq.n 4b1ae │ │ ldr.w r1, [r5, r0, lsl #2] │ │ ldr.w r2, [r5, sl, lsl #2] │ │ str.w r1, [r5, sl, lsl #2] │ │ str.w r2, [r5, r0, lsl #2] │ │ - b.n 4add4 │ │ + b.n 4b0dc │ │ mov.w ip, #4 │ │ mov r2, r1 │ │ add r2, ip │ │ add.w ip, ip, #4 │ │ and.w r2, r2, lr │ │ ldr r3, [r5, r2] │ │ bics.w r3, r3, #2139062143 @ 0x7f7f7f7f │ │ - bne.n 4adfe │ │ - b.n 4ae56 │ │ + bne.n 4b106 │ │ + b.n 4b15e │ │ ldr r2, [r5, #0] │ │ bic.w r2, r2, #2139062143 @ 0x7f7f7f7f │ │ rev r2, r2 │ │ clz r2, r2 │ │ lsrs r2, r2, #3 │ │ - b.n 4ae12 │ │ + b.n 4b11a │ │ sub.w r1, r9, #4 │ │ ldr r2, [sp, #44] @ 0x2c │ │ and.w r1, r1, lr │ │ lsrs r0, r0, #25 │ │ strb.w r0, [r5, r9] │ │ strb r0, [r2, r1] │ │ add.w r0, r9, #1 │ │ cmp r9, lr │ │ - beq.n 4aefe │ │ + beq.n 4b206 │ │ mov r9, r0 │ │ ldrb r0, [r5, r0] │ │ cmp r0, #128 @ 0x80 │ │ - bne.n 4ae8c │ │ + bne.n 4b194 │ │ rsb r7, r9, #0 │ │ mvn.w sl, r9 │ │ - b.n 4add4 │ │ + b.n 4b0dc │ │ sub.w r1, r9, #4 │ │ ldr r2, [sp, #44] @ 0x2c │ │ and.w r1, r1, lr │ │ movs r3, #255 @ 0xff │ │ strb.w r3, [r5, r9] │ │ strb r3, [r2, r1] │ │ ldr.w r1, [r5, sl, lsl #2] │ │ str.w r1, [r5, r0, lsl #2] │ │ - b.n 4ae8c │ │ + b.n 4b194 │ │ ldr r0, [sp, #16] │ │ cmp.w lr, #0 │ │ ldr r1, [sp, #8] │ │ sub.w r0, r1, r0 │ │ ldr r1, [sp, #12] │ │ strd r7, r5, [r1] │ │ movw r5, #1 │ │ @@ -52151,56 +52344,56 @@ │ │ movne r0, #7 │ │ addne.w r0, r0, lr, lsl #2 │ │ bicne.w r0, r0, #3 │ │ addne.w r1, lr, r0 │ │ movt r5, #32768 @ 0x8000 │ │ it ne │ │ addsne.w r1, r1, #5 │ │ - bne.n 4af24 │ │ + bne.n 4b22c │ │ mov r0, r5 │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r0, [sp, #32] │ │ cmp.w lr, #8 │ │ it cc │ │ movcc r0, lr │ │ ldr r6, [sp, #16] │ │ mov r8, fp │ │ - b.n 4af10 │ │ + b.n 4b218 │ │ movs r0, #0 │ │ movs r5, #1 │ │ subs r0, r0, r6 │ │ movt r5, #32768 @ 0x8000 │ │ str.w r0, [r8, #8] │ │ mov r0, r5 │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r1, [sp, #44] @ 0x2c │ │ subs r0, r1, r0 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r5 │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #32] @ (4af58 ) │ │ + ldr r0, [pc, #32] @ (4b260 ) │ │ movs r1, #57 @ 0x39 │ │ - ldr r2, [pc, #32] @ (4af5c ) │ │ + ldr r2, [pc, #32] @ (4b264 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ ldr r0, [sp, #44] @ 0x2c │ │ mov r4, r2 │ │ mov r1, r5 │ │ mov r2, r3 │ │ - bl d520a │ │ + bl d531a │ │ ldr.w lr, [sp, #48] @ 0x30 │ │ mov r2, r4 │ │ - b.n 4adc0 │ │ + b.n 4b0c8 │ │ nop │ │ - cbz r2, 4afac │ │ - vqneg.s , q12 │ │ + add sp, #232 @ 0xe8 │ │ + vsri.64 , q8, #4 │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #68 @ 0x44 │ │ movw r4, #25698 @ 0x6462 │ │ mov ip, r2 │ │ movt r4, #29797 @ 0x7465 │ │ strd ip, r3, [sp, #40] @ 0x28 │ │ @@ -52238,21 +52431,21 @@ │ │ movt r3, #28787 @ 0x7073 │ │ eors r0, r3 │ │ str r0, [sp, #0] │ │ movs r0, #0 │ │ strd r0, r0, [sp, #48] @ 0x30 │ │ strd r0, r0, [sp, #56] @ 0x38 │ │ mov r0, r4 │ │ - bl 4a8d8 │ │ + bl 4abe0 │ │ movs r0, #255 @ 0xff │ │ add.w r1, sp, #67 @ 0x43 │ │ strb.w r0, [sp, #67] @ 0x43 │ │ mov r0, r4 │ │ movs r2, #1 │ │ - bl 4a8d8 │ │ + bl 4abe0 │ │ ldr r1, [sp, #56] @ 0x38 │ │ ldrd ip, r2, [sp, #48] @ 0x30 │ │ ldrd r3, r4, [sp, #24] │ │ orr.w lr, r2, r1, lsl #24 │ │ ldrd r1, r5, [sp, #8] │ │ eor.w r2, lr, r4 │ │ eor.w r3, r3, ip │ │ @@ -52396,89 +52589,89 @@ │ │ sub sp, #236 @ 0xec │ │ ldrd r7, r5, [r1, #104] @ 0x68 │ │ mov fp, r0 │ │ ldrd r3, r0, [sp, #272] @ 0x110 │ │ add.w r6, r7, #32 │ │ rsb r7, r5, r5, lsl #3 │ │ lsls r5, r7, #3 │ │ - cbz r5, 4b208 │ │ + cbz r5, 4b510 │ │ ldrd r7, r4, [r6], #56 @ 0x38 │ │ subs r5, #56 @ 0x38 │ │ eors r4, r0 │ │ eors r7, r3 │ │ orrs r7, r4 │ │ - bne.n 4b1f6 │ │ - b.n 4b226 │ │ + bne.n 4b4fe │ │ + b.n 4b52e │ │ ldrd r7, r5, [r1, #116] @ 0x74 │ │ add.w r6, r7, #32 │ │ rsb r7, r5, r5, lsl #3 │ │ lsls r5, r7, #3 │ │ - cbz r5, 4b284 │ │ + cbz r5, 4b58c │ │ ldrd r7, r4, [r6], #56 @ 0x38 │ │ subs r5, #56 @ 0x38 │ │ eors r4, r0 │ │ eors r7, r3 │ │ orrs r7, r4 │ │ - bne.n 4b216 │ │ + bne.n 4b51e │ │ ldrd r0, r1, [r1, #48] @ 0x30 │ │ sub.w r8, r6, #88 @ 0x58 │ │ ldrd r3, r7, [r2, #8] │ │ eors r1, r7 │ │ eors r0, r3 │ │ orrs r0, r1 │ │ - bne.n 4b272 │ │ + bne.n 4b57a │ │ ldrb.w r0, [r2, #80] @ 0x50 │ │ - cbz r0, 4b2b4 │ │ + cbz r0, 4b5bc │ │ ldr r0, [r2, #64] @ 0x40 │ │ cmp r0, #0 │ │ - bne.w 4b498 │ │ + bne.w 4b7a0 │ │ mov r9, r2 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ ldr.w r1, [r9, #68]! │ │ ldrd r3, r7, [r9, #4] │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ str.w r0, [r9] │ │ - bne.n 4b2c4 │ │ + bne.n 4b5cc │ │ movs r0, #5 │ │ movt r0, #32768 @ 0x8000 │ │ adds r0, #4 │ │ str.w r0, [fp] │ │ add sp, #236 @ 0xec │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #5 │ │ movt r0, #32768 @ 0x8000 │ │ adds r0, #11 │ │ str.w r0, [fp] │ │ add sp, #236 @ 0xec │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #23 │ │ movs r6, #23 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 4b4b0 │ │ - ldr r1, [pc, #548] @ (4b4b8 ) │ │ + beq.w 4b7b8 │ │ + ldr r1, [pc, #548] @ (4b7c0 ) │ │ movs r2, #23 │ │ mov r5, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #5 │ │ strd r5, r6, [fp, #8] │ │ movt r0, #32768 @ 0x8000 │ │ adds r0, #5 │ │ strd r0, r6, [fp] │ │ add sp, #236 @ 0xec │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #5 │ │ movt r0, #32768 @ 0x8000 │ │ str.w r0, [fp] │ │ add sp, #236 @ 0xec │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r0, [r2, #16] │ │ cmp r0, #0 │ │ - bne.w 4b498 │ │ + bne.w 4b7a0 │ │ add.w r0, r2, #24 │ │ str r1, [sp, #24] │ │ strd r7, r3, [sp, #16] │ │ add r1, sp, #32 │ │ str r0, [sp, #12] │ │ ldmia r0!, {r3, r4, r5, r6, r7} │ │ stmia r1!, {r3, r4, r5, r6, r7} │ │ @@ -52491,41 +52684,41 @@ │ │ movs r0, #0 │ │ strd r0, r1, [sp, #208] @ 0xd0 │ │ movw r1, #909 @ 0x38d │ │ str r2, [sp, #28] │ │ strd r0, r0, [sp, #200] @ 0xc8 │ │ strd r0, r0, [sp, #216] @ 0xd8 │ │ strd r0, r1, [sp, #224] @ 0xe0 │ │ - b.n 4b30c │ │ + b.n 4b614 │ │ lsrs r0, r2, #2 │ │ - bne.n 4b34a │ │ + bne.n 4b652 │ │ mov r0, r6 │ │ - bl 481dc │ │ + bl 484e4 │ │ ldr r0, [sp, #220] @ 0xdc │ │ cmp r0, #0 │ │ - beq.n 4b30c │ │ + beq.n 4b614 │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r7, #1 │ │ movs r5, #0 │ │ - b.n 4b332 │ │ + b.n 4b63a │ │ umull r2, r4, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r4, r3, r5, r4 │ │ mla r5, r3, r5, r4 │ │ mov r3, r2 │ │ lsls r2, r0, #31 │ │ - beq.n 4b322 │ │ + beq.n 4b62a │ │ umull r2, r4, r3, r7 │ │ cmp r0, #1 │ │ - beq.n 4b308 │ │ + beq.n 4b610 │ │ mla r1, r3, r1, r4 │ │ mla r1, r5, r7, r1 │ │ mov r7, r2 │ │ - b.n 4b322 │ │ + b.n 4b62a │ │ ldmia r6!, {r1, r2, r3, r7} │ │ add.w sl, sp, #136 @ 0x88 │ │ add.w r0, sl, #4 │ │ stmia r0!, {r1, r2, r3, r7} │ │ ldmia.w r6, {r1, r2, r3, r7} │ │ add r6, sp, #72 @ 0x48 │ │ stmia r0!, {r1, r2, r3, r7} │ │ @@ -52547,64 +52740,64 @@ │ │ stmia r0!, {r2, r3, r4, r5, r7} │ │ ldr.w r1, [r8] │ │ ldr.w r2, [r8, #8] │ │ ldrd r3, r0, [sp, #280] @ 0x118 │ │ strd r3, r0, [sp] │ │ mov r0, fp │ │ mov r3, r6 │ │ - bl 4b4c8 │ │ + bl 4b7d0 │ │ ldmia r6!, {r1, r2, r3, r5, r7} │ │ mov r0, sl │ │ stmia r0!, {r1, r2, r3, r5, r7} │ │ ldmia r6!, {r1, r2, r3, r5, r7} │ │ stmia r0!, {r1, r2, r3, r5, r7} │ │ ldmia.w r6, {r1, r2, r3, r4, r5, r7} │ │ stmia r0!, {r1, r2, r3, r4, r5, r7} │ │ add r0, sp, #200 @ 0xc8 │ │ mov r1, sl │ │ - bl 4b6b4 │ │ + bl 4b9bc │ │ movs r1, #5 │ │ ldr.w r0, [fp] │ │ movt r1, #32768 @ 0x8000 │ │ adds r1, #12 │ │ cmp r0, r1 │ │ - bne.n 4b44e │ │ + bne.n 4b756 │ │ ldr r0, [sp, #28] │ │ ldr r1, [r0, #64] @ 0x40 │ │ cmp r1, #0 │ │ - bne.n 4b4a0 │ │ + bne.n 4b7a8 │ │ add r3, sp, #200 @ 0xc8 │ │ ldrd r6, r8, [r0, #68] @ 0x44 │ │ ldr r7, [r0, #76] @ 0x4c │ │ mov.w r5, #4294967295 @ 0xffffffff │ │ ldmia r3, {r1, r2, r3} │ │ cmp.w r6, #2147483648 @ 0x80000000 │ │ str r5, [r0, #64] @ 0x40 │ │ stmia.w r9, {r1, r2, r3} │ │ - beq.n 4b402 │ │ - cbz r7, 4b3f6 │ │ + beq.n 4b70a │ │ + cbz r7, 4b6fe │ │ mov r4, r8 │ │ ldr.w r0, [r4], #4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r7, #1 │ │ - bne.n 4b3ea │ │ + bne.n 4b6f2 │ │ ldr r0, [sp, #28] │ │ - cbz r6, 4b402 │ │ + cbz r6, 4b70a │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #28] │ │ ldr r1, [r0, #64] @ 0x40 │ │ ldr r2, [sp, #40] @ 0x28 │ │ adds r1, #1 │ │ str r1, [r0, #64] @ 0x40 │ │ cmp.w r2, #2147483648 @ 0x80000000 │ │ - beq.w 4b2ae │ │ + beq.w 4b5b6 │ │ ldr r1, [r0, #16] │ │ cmp r1, #0 │ │ - bne.n 4b4a8 │ │ + bne.n 4b7b0 │ │ ldr r4, [sp, #12] │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ str r1, [r0, #16] │ │ mov r1, r4 │ │ ldmia r1!, {r2, r3, r5, r6, r7} │ │ stmia.w sl!, {r2, r3, r5, r6, r7} │ │ ldmia.w r1, {r2, r3, r5, r6, r7} │ │ @@ -52612,507 +52805,507 @@ │ │ add r5, sp, #32 │ │ ldmia r5!, {r1, r2, r3, r6, r7} │ │ stmia r4!, {r1, r2, r3, r6, r7} │ │ ldmia.w r5, {r1, r2, r3, r6, r7} │ │ stmia r4!, {r1, r2, r3, r6, r7} │ │ ldr r1, [sp, #144] @ 0x90 │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ - bne.n 4b484 │ │ + bne.n 4b78c │ │ movs r1, #0 │ │ str r1, [r0, #16] │ │ add sp, #236 @ 0xec │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd r4, r5, [sp, #204] @ 0xcc │ │ - cbz r5, 4b462 │ │ + cbz r5, 4b76a │ │ mov r6, r4 │ │ ldr.w r0, [r6], #4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r5, #1 │ │ - bne.n 4b456 │ │ + bne.n 4b75e │ │ ldr r0, [sp, #200] @ 0xc8 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #40] @ 0x28 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 4b2ae │ │ + beq.w 4b5b6 │ │ add r0, sp, #32 │ │ - bl 4b7a0 │ │ + bl 4baa8 │ │ add sp, #236 @ 0xec │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add r0, sp, #136 @ 0x88 │ │ - bl 4b7a0 │ │ + bl 4baa8 │ │ ldr r0, [sp, #28] │ │ ldr r1, [r0, #16] │ │ adds r1, #1 │ │ str r1, [r0, #16] │ │ add sp, #236 @ 0xec │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #36] @ (4b4c0 ) │ │ + ldr r0, [pc, #36] @ (4b7c8 ) │ │ add r0, pc │ │ - bl 4132c │ │ - ldr r0, [pc, #32] @ (4b4c4 ) │ │ + bl 41634 │ │ + ldr r0, [pc, #32] @ (4b7cc ) │ │ add r0, pc │ │ - bl 4132c │ │ - ldr r0, [pc, #16] @ (4b4bc ) │ │ + bl 41634 │ │ + ldr r0, [pc, #16] @ (4b7c4 ) │ │ add r0, pc │ │ - bl 4132c │ │ + bl 41634 │ │ movs r0, #1 │ │ movs r1, #23 │ │ - bl 3dfa4 │ │ - @ instruction: 0xb764 │ │ - vqshrun.s64 d31, q1, #4 │ │ + bl 3e2ac │ │ + push {r2, r3, r4, r6} │ │ + vsli.32 d31, d10, #28 │ │ movs r0, r1 │ │ - strb.w r0, [r2, r8] │ │ - strh.w r0, [sl, r8] │ │ + add.w r0, sl, #8912896 @ 0x880000 │ │ + @ instruction: 0xf5320008 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #92 @ 0x5c │ │ mov r8, r0 │ │ ldrd r9, r0, [sp, #128] @ 0x80 │ │ eor.w fp, r0, #2147483648 @ 0x80000000 │ │ add r0, sp, #64 @ 0x40 │ │ mov r6, r1 │ │ mov r1, r3 │ │ mov r5, r3 │ │ str.w r9, [sp, #8] │ │ str.w fp, [sp, #12] │ │ - bl 49d00 │ │ + bl 4a008 │ │ add r4, sp, #64 @ 0x40 │ │ add.w ip, sp, #40 @ 0x28 │ │ ldmia r4, {r0, r1, r2, r3, r4} │ │ cmp r0, #2 │ │ stmia.w ip, {r1, r2, r3, r4} │ │ - bne.n 4b50a │ │ + bne.n 4b812 │ │ add r3, sp, #40 @ 0x28 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w r8, {r0, r1, r2, r3} │ │ add sp, #92 @ 0x5c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add r4, sp, #40 @ 0x28 │ │ add.w ip, sp, #16 │ │ ldr r7, [sp, #84] @ 0x54 │ │ ldmia r4, {r1, r2, r3, r4} │ │ stmia.w ip, {r0, r1, r2, r3, r4, r7} │ │ add r0, sp, #64 @ 0x40 │ │ mov r1, r5 │ │ mov r2, r6 │ │ - bl 49d00 │ │ + bl 4a008 │ │ ldrd r0, sl, [sp, #64] @ 0x40 │ │ ldrd r6, r7, [sp, #72] @ 0x48 │ │ ldr r4, [sp, #80] @ 0x50 │ │ cmp r0, #2 │ │ - bne.n 4b548 │ │ + bne.n 4b850 │ │ movw fp, #17 │ │ mov.w r9, r6, lsr #8 │ │ movt fp, #32768 @ 0x8000 │ │ cmp sl, fp │ │ - bne.w 4b650 │ │ + bne.w 4b958 │ │ str.w fp, [r8] │ │ - b.n 4b668 │ │ + b.n 4b970 │ │ ldr r1, [sp, #84] @ 0x54 │ │ strd r0, sl, [sp, #40] @ 0x28 │ │ lsls r0, r0, #31 │ │ strd r6, r7, [sp, #48] @ 0x30 │ │ strd r4, r1, [sp, #56] @ 0x38 │ │ - beq.w 4b6a0 │ │ + beq.w 4b9a8 │ │ movs r0, #8 │ │ movs r5, #8 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 4b6a8 │ │ + beq.w 4b9b0 │ │ movs r1, #0 │ │ mov r6, r0 │ │ strd r5, r1, [sp] │ │ add r1, sp, #64 @ 0x40 │ │ str.w r9, [r0] │ │ movs r2, #16 │ │ str.w fp, [r0, #4] │ │ mov r0, r1 │ │ mov r1, sl │ │ mov r3, r6 │ │ - bl 49e28 │ │ + bl 4a130 │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrd r0, r5, [sp, #64] @ 0x40 │ │ cmp r0, #1 │ │ - bne.n 4b5aa │ │ + bne.n 4b8b2 │ │ ldrd r6, r7, [sp, #72] @ 0x48 │ │ movw fp, #17 │ │ ldr r4, [sp, #80] @ 0x50 │ │ movt fp, #32768 @ 0x8000 │ │ mov.w r9, r6, lsr #8 │ │ - b.n 4b636 │ │ + b.n 4b93e │ │ movw fp, #17 │ │ movt fp, #32768 @ 0x8000 │ │ - cbz r5, 4b620 │ │ + cbz r5, 4b928 │ │ ldrd r0, r1, [sp, #76] @ 0x4c │ │ add r2, sp, #8 │ │ strd r0, r1, [sp] │ │ add r0, sp, #64 @ 0x40 │ │ add r1, sp, #16 │ │ mov r3, sl │ │ - bl 4b904 │ │ + bl 4bc0c │ │ ldr r5, [sp, #64] @ 0x40 │ │ ldrb.w r6, [sp, #68] @ 0x44 │ │ cmp r5, fp │ │ - bne.n 4b626 │ │ + bne.n 4b92e │ │ lsls r0, r6, #31 │ │ mov.w r6, #0 │ │ - beq.n 4b622 │ │ + beq.n 4b92a │ │ add r7, sp, #64 @ 0x40 │ │ add r4, sp, #16 │ │ add.w r9, sp, #8 │ │ mov r0, r7 │ │ mov r1, sl │ │ movs r2, #9 │ │ movs r3, #0 │ │ str r6, [sp, #4] │ │ - bl 49e28 │ │ + bl 4a130 │ │ ldrd r0, r5, [sp, #64] @ 0x40 │ │ cmp r0, #1 │ │ - beq.n 4b680 │ │ - cbz r5, 4b620 │ │ + beq.n 4b988 │ │ + cbz r5, 4b928 │ │ ldrd r0, r1, [sp, #76] @ 0x4c │ │ mov r2, r9 │ │ strd r0, r1, [sp] │ │ mov r0, r7 │ │ mov r1, r4 │ │ mov r3, sl │ │ - bl 4b904 │ │ + bl 4bc0c │ │ ldr r5, [sp, #64] @ 0x40 │ │ ldrb.w r0, [sp, #68] @ 0x44 │ │ cmp r5, fp │ │ - bne.n 4b68c │ │ + bne.n 4b994 │ │ lsls r0, r0, #31 │ │ - bne.n 4b5e2 │ │ + bne.n 4b8ea │ │ movs r6, #0 │ │ - b.n 4b622 │ │ + b.n 4b92a │ │ movs r6, #1 │ │ mov r5, fp │ │ - b.n 4b636 │ │ + b.n 4b93e │ │ ldrb.w r0, [sp, #71] @ 0x47 │ │ ldrh.w r1, [sp, #69] @ 0x45 │ │ ldrd r7, r4, [sp, #72] @ 0x48 │ │ orr.w r9, r1, r0, lsl #16 │ │ add r0, sp, #40 @ 0x28 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #40] @ 0x28 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #44] @ 0x2c │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ mov sl, r5 │ │ cmp sl, fp │ │ - beq.w 4b542 │ │ + beq.w 4b84a │ │ mov.w r0, r9, lsr #16 │ │ strh.w r9, [r8, #5] │ │ strd r7, r4, [r8, #8] │ │ strb.w r6, [r8, #4] │ │ str.w sl, [r8] │ │ strb.w r0, [r8, #7] │ │ add r0, sp, #16 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #16] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #20] │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ add sp, #92 @ 0x5c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd r6, r7, [sp, #72] @ 0x48 │ │ ldr r4, [sp, #80] @ 0x50 │ │ mov.w r9, r6, lsr #8 │ │ - b.n 4b636 │ │ + b.n 4b93e │ │ ldrb.w r1, [sp, #71] @ 0x47 │ │ mov r6, r0 │ │ ldrh.w r2, [sp, #69] @ 0x45 │ │ ldrd r7, r4, [sp, #72] @ 0x48 │ │ orr.w r9, r2, r1, lsl #16 │ │ - b.n 4b636 │ │ - ldr r0, [pc, #12] @ (4b6b0 ) │ │ + b.n 4b93e │ │ + ldr r0, [pc, #12] @ (4b9b8 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ movs r0, #1 │ │ movs r1, #8 │ │ - bl 3dfa4 │ │ - @ instruction: 0xf4aa0008 │ │ + bl 3e2ac │ │ + subs.w r0, r2, #8 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #20 │ │ ldr r2, [r1, #0] │ │ cmp r2, #0 │ │ - bne.n 4b788 │ │ + bne.n 4ba90 │ │ adds r7, r1, #4 │ │ ldr r6, [r1, #16] │ │ mov.w r9, #0 │ │ movs r5, #4 │ │ ldmia r7, {r2, r3, r7} │ │ add.w ip, sp, #8 │ │ cmp r6, #0 │ │ strd r9, r5, [r1, #4] │ │ str.w r9, [r1, #12] │ │ stmia.w ip, {r2, r3, r7} │ │ - bne.n 4b790 │ │ + bne.n 4ba98 │ │ ldrd r7, r2, [r1, #36] @ 0x24 │ │ add.w r8, sp, #8 │ │ add.w r2, r2, r2, lsl #1 │ │ mov.w r3, #4294967295 @ 0xffffffff │ │ movs r4, #0 │ │ str r3, [r1, #16] │ │ add.w r6, r7, r2, lsl #2 │ │ cmp r4, #0 │ │ it ne │ │ cmpne r4, r5 │ │ - bne.n 4b734 │ │ + bne.n 4ba3c │ │ cmp r7, r6 │ │ - beq.n 4b770 │ │ + beq.n 4ba78 │ │ ldrd r4, r2, [r7, #4] │ │ str.w r9, [r7, #8] │ │ add.w r5, r4, r2, lsl #4 │ │ add.w r2, r7, #12 │ │ cmp r4, r5 │ │ - bne.n 4b732 │ │ + bne.n 4ba3a │ │ cmp r2, r6 │ │ - beq.n 4b770 │ │ + beq.n 4ba78 │ │ ldrd r4, r3, [r7, #16] │ │ str.w r9, [r7, #20] │ │ mov r7, r2 │ │ add.w r5, r4, r3, lsl #4 │ │ add.w r2, r7, #12 │ │ cmp r4, r5 │ │ - beq.n 4b718 │ │ + beq.n 4ba20 │ │ mov r7, r2 │ │ ldr.w sl, [r4, #8] │ │ ldr.w fp, [sp, #16] │ │ ldr r2, [r1, #48] @ 0x30 │ │ ldr r3, [sp, #8] │ │ subs r2, #1 │ │ str r2, [r1, #48] @ 0x30 │ │ cmp fp, r3 │ │ - beq.n 4b760 │ │ + beq.n 4ba68 │ │ ldr r2, [sp, #12] │ │ adds r4, #16 │ │ str.w sl, [r2, fp, lsl #2] │ │ add.w r2, fp, #1 │ │ str r2, [sp, #16] │ │ cmp r4, #0 │ │ it ne │ │ cmpne r4, r5 │ │ - beq.n 4b700 │ │ - b.n 4b734 │ │ + beq.n 4ba08 │ │ + b.n 4ba3c │ │ str r0, [sp, #4] │ │ mov r0, r8 │ │ str r1, [sp, #0] │ │ - bl 47bba │ │ + bl 47d9a │ │ ldrd r1, r0, [sp] │ │ - b.n 4b748 │ │ + b.n 4ba50 │ │ add r7, sp, #8 │ │ ldr r6, [r1, #16] │ │ ldmia r7, {r2, r3, r7} │ │ stmia r0!, {r2, r3, r7} │ │ adds r0, r6, #1 │ │ str r0, [r1, #16] │ │ mov r0, r1 │ │ add sp, #20 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w 4b880 │ │ - ldr r0, [pc, #12] @ (4b798 ) │ │ + b.w 4bb88 │ │ + ldr r0, [pc, #12] @ (4baa0 ) │ │ add r0, pc │ │ - bl 4132c │ │ - ldr r0, [pc, #8] @ (4b79c ) │ │ + bl 41634 │ │ + ldr r0, [pc, #8] @ (4baa4 ) │ │ add r0, pc │ │ - bl 4132c │ │ - adds.w r0, r2, #8912896 @ 0x880000 │ │ - @ instruction: 0xf6ea0008 │ │ + bl 41634 │ │ + @ instruction: 0xf21a0008 │ │ + @ instruction: 0xf3f20008 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #4 │ │ mov r4, r0 │ │ ldrb.w r0, [r0, #36] @ 0x24 │ │ ldr r5, [r4, #32] │ │ - cbnz r0, 4b7ba │ │ - ldr r0, [pc, #200] @ (4b87c ) │ │ + cbnz r0, 4bac2 │ │ + ldr r0, [pc, #200] @ (4bb84 ) │ │ add r0, pc │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.n 4b86c │ │ + bne.n 4bb74 │ │ movs r0, #0 │ │ dmb ish │ │ ldrex r1, [r5] │ │ strex r2, r0, [r5] │ │ cmp r2, #0 │ │ - bne.n 4b7c0 │ │ + bne.n 4bac8 │ │ cmp r1, #2 │ │ - beq.n 4b83c │ │ + beq.n 4bb44 │ │ ldrd r9, sl, [r4, #12] │ │ cmp.w sl, #0 │ │ str r4, [sp, #0] │ │ - beq.n 4b854 │ │ + beq.n 4bb5c │ │ mov.w r8, #0 │ │ - b.n 4b7f8 │ │ + b.n 4bb00 │ │ ldr.w r0, [fp] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r8, r8, #1 │ │ cmp r8, sl │ │ - beq.n 4b854 │ │ + beq.n 4bb5c │ │ add.w r0, r8, r8, lsl #1 │ │ add.w fp, r9, r0, lsl #2 │ │ ldrd r6, r7, [fp, #4] │ │ cmp r7, #0 │ │ - beq.n 4b7e2 │ │ + beq.n 4baea │ │ movs r5, #0 │ │ - b.n 4b810 │ │ + b.n 4bb18 │ │ cmp r5, r7 │ │ - beq.n 4b7e2 │ │ + beq.n 4baea │ │ add.w r0, r6, r5, lsl #4 │ │ adds r5, #1 │ │ ldr.w r1, [r0, #8]! │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r4, r3, [r1] │ │ cmp r4, #0 │ │ - bne.n 4b81e │ │ + bne.n 4bb26 │ │ cmp r2, #1 │ │ - bne.n 4b80c │ │ + bne.n 4bb14 │ │ dmb ish │ │ ldr r0, [r0, #0] │ │ - bl 476ec │ │ - b.n 4b80c │ │ + bl 46a1c │ │ + b.n 4bb14 │ │ movs r0, #240 @ 0xf0 │ │ mov r1, r5 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ + blx d87e0 │ │ ldrd r9, sl, [r4, #12] │ │ cmp.w sl, #0 │ │ str r4, [sp, #0] │ │ - bne.n 4b7dc │ │ + bne.n 4bae4 │ │ ldr r0, [sp, #0] │ │ ldr r0, [r0, #8] │ │ - cbz r0, 4b866 │ │ + cbz r0, 4bb6e │ │ mov r0, r9 │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - bl 7770c │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq r0, [r5, #4] │ │ - b.n 4b7ba │ │ + b.n 4bac2 │ │ nop │ │ - cmp r7, #226 @ 0xe2 │ │ + cmp r4, #250 @ 0xfa │ │ movs r1, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #4 │ │ ldrd r5, r4, [r0, #8] │ │ mov r8, r0 │ │ - cbz r4, 4b89c │ │ + cbz r4, 4bba4 │ │ mov r6, r5 │ │ ldr.w r0, [r6], #4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r4, #1 │ │ - bne.n 4b890 │ │ + bne.n 4bb98 │ │ ldr.w r0, [r8, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r9, sl, [r8, #36] @ 0x24 │ │ cmp.w sl, #0 │ │ - beq.n 4b8ec │ │ + beq.n 4bbf4 │ │ movs r4, #0 │ │ - b.n 4b8ca │ │ + b.n 4bbd2 │ │ ldr r0, [r5, #0] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, fp │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r4, #1 │ │ cmp r4, sl │ │ - beq.n 4b8ec │ │ + beq.n 4bbf4 │ │ add.w r0, r4, r4, lsl #1 │ │ add.w r5, r9, r0, lsl #2 │ │ ldrd fp, r7, [r5, #4] │ │ cmp r7, #0 │ │ - beq.n 4b8b8 │ │ + beq.n 4bbc0 │ │ add.w r6, fp, #8 │ │ ldr.w r0, [r6], #16 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r7, #1 │ │ - bne.n 4b8de │ │ - b.n 4b8b8 │ │ + bne.n 4bbe6 │ │ + b.n 4bbc0 │ │ ldr.w r0, [r8, #32] │ │ - cbz r0, 4b8fe │ │ + cbz r0, 4bc06 │ │ mov r0, r9 │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ sub sp, #32 │ │ mov sl, r0 │ │ ldr r0, [sp, #68] @ 0x44 │ │ cmp r0, #8 │ │ - bne.n 4b9e4 │ │ + bne.n 4bcec │ │ ldr r0, [r1, #0] │ │ mov r5, r1 │ │ cmp r0, #0 │ │ - beq.n 4b9dc │ │ + beq.n 4bce4 │ │ ldr r0, [sp, #64] @ 0x40 │ │ mov r8, r3 │ │ mov r7, r2 │ │ mov.w r9, #8 │ │ ldr r4, [r0, #0] │ │ ldr r6, [r0, #4] │ │ movs r0, #8 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 4b9fa │ │ + beq.n 4bd02 │ │ ldr r1, [r5, #4] │ │ add r2, sp, #8 │ │ strd r9, r7, [sp] │ │ mov r7, r0 │ │ str r4, [r0, #0] │ │ mov r3, r7 │ │ str r6, [r0, #4] │ │ mov r0, r2 │ │ movs r2, #2 │ │ - bl 49e28 │ │ + bl 4a130 │ │ mov r0, r7 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrd r1, r0, [sp, #8] │ │ lsls r1, r1, #31 │ │ - beq.n 4b95e │ │ + beq.n 4bc66 │ │ add r3, sp, #16 │ │ ldmia r3, {r1, r2, r3} │ │ - b.n 4b99a │ │ - cbz r0, 4b9b0 │ │ + b.n 4bca2 │ │ + cbz r0, 4bcb8 │ │ add r0, sp, #8 │ │ mov r1, r8 │ │ - bl 4ba20 │ │ + bl 4bd28 │ │ movs r6, #17 │ │ ldr r0, [sp, #8] │ │ movt r6, #32768 @ 0x8000 │ │ cmp r0, r6 │ │ - bne.n 4b996 │ │ + bne.n 4bc9e │ │ ldr r0, [r5, #0] │ │ - cbz r0, 4b9dc │ │ + cbz r0, 4bce4 │ │ ldr r1, [r5, #4] │ │ add r0, sp, #8 │ │ - bl 4ba20 │ │ + bl 4bd28 │ │ ldr r0, [sp, #8] │ │ cmp r0, r6 │ │ - bne.n 4b996 │ │ + bne.n 4bc9e │ │ movs r0, #1 │ │ str.w r6, [sl] │ │ strb.w r0, [sl, #4] │ │ add sp, #32 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ add r3, sp, #8 │ │ ldmia r3, {r0, r1, r2, r3} │ │ @@ -53120,121 +53313,121 @@ │ │ str.w r2, [sl, #8] │ │ str.w r0, [sl] │ │ str.w r3, [sl, #12] │ │ add sp, #32 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ movs r0, #23 │ │ movs r6, #23 │ │ - blx d87f0 │ │ - cbz r0, 4ba02 │ │ - ldr r1, [pc, #80] @ (4ba0c ) │ │ + blx d8810 │ │ + cbz r0, 4bd0a │ │ + ldr r1, [pc, #80] @ (4bd14 ) │ │ movs r2, #23 │ │ mov r5, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #17 │ │ strd r5, r6, [sl, #8] │ │ movt r0, #32768 @ 0x8000 │ │ subs r0, #4 │ │ strd r0, r6, [sl] │ │ add sp, #32 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ - ldr r0, [pc, #60] @ (4ba1c ) │ │ + ldr r0, [pc, #60] @ (4bd24 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #40] @ (4ba10 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #40] @ (4bd18 ) │ │ add r2, sp, #8 │ │ - ldr r3, [pc, #40] @ (4ba14 ) │ │ - ldr r1, [pc, #44] @ (4ba18 ) │ │ + ldr r3, [pc, #40] @ (4bd1c ) │ │ + ldr r1, [pc, #44] @ (4bd20 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ movs r0, #1 │ │ movs r1, #8 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #23 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - sub sp, #80 @ 0x50 │ │ - @ instruction: 0xfffcda97 │ │ - vcvt.u32.f32 q15, q7, #4 │ │ + add r5, sp, #560 @ 0x230 │ │ + vqneg.s d29, d15 │ │ + vcvt.f16.u16 d30, d22, #4 │ │ movs r0, r1 │ │ - orns r0, ip, #8 │ │ - sbc.w r0, lr, #8 │ │ + stc 0, cr0, [r4, #32] │ │ + cdp 0, 7, cr0, cr6, cr8, {0} │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #16 │ │ mov r4, r0 │ │ mov r0, r1 │ │ movs r1, #0 │ │ - blx 9e334 │ │ + blx 9e340 │ │ movs r5, #3 │ │ adds r1, r0, #1 │ │ movt r5, #32768 @ 0x8000 │ │ cmp r1, #2 │ │ - bcs.n 4ba48 │ │ + bcs.n 4bd50 │ │ add.w r0, r5, #14 │ │ str r0, [r4, #0] │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movw r1, #34744 @ 0x87b8 │ │ movt r1, #65535 @ 0xffff │ │ cmp r0, r1 │ │ - bne.n 4ba62 │ │ + bne.n 4bd6a │ │ strd r5, r7, [r4] │ │ strd r5, r0, [r4, #8] │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ mov r8, r0 │ │ - blx a96f8 │ │ + blx a9704 │ │ mov r5, r0 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #4 │ │ mov r1, r5 │ │ - bl 402e0 │ │ + bl 405e8 │ │ add r5, sp, #4 │ │ ldmia r5, {r0, r1, r5} │ │ - ldr r6, [pc, #68] @ (4bac4 ) │ │ + ldr r6, [pc, #68] @ (4bdcc ) │ │ cmp r0, #0 │ │ add r6, pc │ │ ite eq │ │ moveq r6, r1 │ │ movne r5, #27 │ │ cmp.w r5, #4294967295 @ 0xffffffff │ │ - bgt.n 4ba92 │ │ - bl 3e03c │ │ - cbz r5, 4baa0 │ │ + bgt.n 4bd9a │ │ + bl 3e344 │ │ + cbz r5, 4bda8 │ │ mov r0, r5 │ │ - blx d87f0 │ │ - cbz r0, 4babc │ │ + blx d8810 │ │ + cbz r0, 4bdc4 │ │ mov r7, r0 │ │ - b.n 4baa2 │ │ + b.n 4bdaa │ │ movs r7, #1 │ │ mov r0, r7 │ │ mov r1, r6 │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ mov r0, r8 │ │ strd r5, r7, [r4] │ │ strd r5, r0, [r4, #8] │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movs r0, #1 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ - add sp, #148 @ 0x94 │ │ + bl 3e2ac │ │ + add r5, sp, #116 @ 0x74 │ │ vsli.32 , q8, #28 │ │ sub sp, #24 │ │ - cbz r2, 4bb16 │ │ + cbz r2, 4be1e │ │ cmp r2, #1 │ │ - beq.n 4bb02 │ │ + beq.n 4be0a │ │ add.w r2, r2, r2, lsl #2 │ │ movw r6, #52429 @ 0xcccd │ │ movt r6, #52428 @ 0xcccc │ │ add.w ip, r1, #68 @ 0x44 │ │ lsls r2, r2, #3 │ │ ldr r5, [r1, #28] │ │ subs r2, #40 @ 0x28 │ │ @@ -53244,55 +53437,55 @@ │ │ ldr.w r6, [r4], #40 │ │ cmp r5, r6 │ │ itt ls │ │ movls r5, r6 │ │ subls.w r1, ip, #28 │ │ subs r2, #1 │ │ mov ip, r4 │ │ - bne.n 4baee │ │ + bne.n 4bdf6 │ │ ldrb.w r2, [r1, #32] │ │ ldr r1, [r1, #28] │ │ cmp r2, #5 │ │ - bhi.n 4bb22 │ │ - ldr r4, [pc, #144] @ (4bba0 ) │ │ + bhi.n 4be2a │ │ + ldr r4, [pc, #144] @ (4bea8 ) │ │ add r4, pc │ │ ldr.w r2, [r4, r2, lsl #2] │ │ - b.n 4bb24 │ │ + b.n 4be2c │ │ movs r5, #0 │ │ cmp.w r3, #2147483648 @ 0x80000000 │ │ - beq.n 4bb2c │ │ + beq.n 4be34 │ │ ldr r1, [sp, #40] @ 0x28 │ │ - b.n 4bb54 │ │ + b.n 4be5c │ │ movs r2, #3 │ │ adds r5, r2, r1 │ │ cmp.w r3, #2147483648 @ 0x80000000 │ │ - bne.n 4bb1e │ │ + bne.n 4be26 │ │ movs r1, #2 │ │ add.w r3, r1, r5, lsl #1 │ │ cmp.w r3, #4294967295 @ 0xffffffff │ │ - bgt.n 4bb3c │ │ - bl 3e03c │ │ - cbz r3, 4bb52 │ │ + bgt.n 4be44 │ │ + bl 3e344 │ │ + cbz r3, 4be5a │ │ mov r6, r0 │ │ mov r0, r3 │ │ mov r4, r3 │ │ - blx d87f0 │ │ - cbz r0, 4bb98 │ │ + blx d8810 │ │ + cbz r0, 4bea0 │ │ mov r1, r0 │ │ mov r0, r6 │ │ mov r3, r4 │ │ - b.n 4bb54 │ │ + b.n 4be5c │ │ movs r1, #1 │ │ movs r4, #0 │ │ movs r2, #0 │ │ cmp r3, #1 │ │ str r5, [sp, #20] │ │ str r4, [sp, #16] │ │ strd r3, r1, [sp, #8] │ │ - bls.n 4bb7c │ │ + bls.n 4be84 │ │ strh r4, [r1, r2] │ │ adds r1, r2, #2 │ │ ldr r6, [sp, #20] │ │ ldrd r2, r3, [sp, #8] │ │ strd r2, r3, [r0] │ │ strd r1, r6, [r0, #8] │ │ strh r5, [r3, #0] │ │ @@ -53302,79 +53495,79 @@ │ │ mov r6, r0 │ │ str r1, [sp, #0] │ │ add r1, sp, #8 │ │ movs r2, #2 │ │ movs r3, #1 │ │ mov r0, r1 │ │ movs r1, #0 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd r1, r2, [sp, #12] │ │ mov r0, r6 │ │ - b.n 4bb64 │ │ + b.n 4be6c │ │ movs r0, #1 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ - ldr r5, [pc, #8] @ (4bbac ) │ │ + bl 3e2ac │ │ + ldr r1, [pc, #1000] @ (4c294 ) │ │ vsri.64 , q2, #3 │ │ - bmi.n 4bb52 │ │ + bmi.n 4be5a │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #4 │ │ vpush {d8-d13} │ │ sub sp, #192 @ 0xc0 │ │ ldr r5, [sp, #284] @ 0x11c │ │ mov r4, r2 │ │ movs r2, #12 │ │ mov r8, r1 │ │ movt r2, #32768 @ 0x8000 │ │ str r3, [sp, #108] @ 0x6c │ │ ldrb r1, [r5, #0] │ │ cmp r1, #5 │ │ - bne.w 4d120 │ │ + bne.w 4d428 │ │ str r0, [sp, #104] @ 0x68 │ │ add r0, sp, #172 @ 0xac │ │ str r2, [sp, #172] @ 0xac │ │ - bl 31e14 │ │ + bl 31ee0 │ │ cmp r4, #0 │ │ - beq.w 4d146 │ │ + beq.w 4d44e │ │ ldr r6, [sp, #280] @ 0x118 │ │ add.w r0, r4, r4, lsl #2 │ │ ldr r1, [r5, #4] │ │ str r1, [sp, #128] @ 0x80 │ │ cmp r1, #0 │ │ - beq.w 4d12e │ │ + beq.w 4d436 │ │ add.w r0, r8, r0, lsl #3 │ │ str r0, [sp, #120] @ 0x78 │ │ ldr r0, [r5, #8] │ │ str r0, [sp, #124] @ 0x7c │ │ movs r0, #0 │ │ str r0, [sp, #100] @ 0x64 │ │ - vldr s16, [pc, #848] @ 4bf4c │ │ - vldr d9, [pc, #848] @ 4bf50 │ │ - vldr d10, [pc, #852] @ 4bf58 │ │ + vldr s16, [pc, #848] @ 4c254 │ │ + vldr d9, [pc, #848] @ 4c258 │ │ + vldr d10, [pc, #852] @ 4c260 │ │ ldrd r4, r5, [r8, #20] │ │ add.w r0, r8, #40 @ 0x28 │ │ ldr.w fp, [sp, #128] @ 0x80 │ │ str r0, [sp, #132] @ 0x84 │ │ ldr r0, [sp, #124] @ 0x7c │ │ str.w r8, [sp, #136] @ 0x88 │ │ str r0, [sp, #140] @ 0x8c │ │ ldrh.w sl, [fp, #402] @ 0x192 │ │ add.w r6, fp, #268 @ 0x10c │ │ mov.w r7, #4294967295 @ 0xffffffff │ │ add.w r0, sl, sl, lsl #1 │ │ mov.w r9, r0, lsl #2 │ │ cmp.w r9, #0 │ │ - beq.n 4bc78 │ │ + beq.n 4bf80 │ │ ldrd r1, r8, [r6, #4] │ │ mov r0, r4 │ │ mov r2, r8 │ │ cmp r5, r8 │ │ it cc │ │ movcc r2, r5 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ subeq.w r0, r5, r8 │ │ cmp r0, #0 │ │ mov.w r0, #0 │ │ it mi │ │ movmi r0, #1 │ │ @@ -53383,28 +53576,28 @@ │ │ movgt r1, #1 │ │ subs r0, r1, r0 │ │ sub.w r9, r9, #12 │ │ adds r7, #1 │ │ adds r6, #12 │ │ uxtb r0, r0 │ │ cmp r0, #1 │ │ - beq.n 4bc2e │ │ - cbz r0, 4bc8e │ │ + beq.n 4bf36 │ │ + cbz r0, 4bf96 │ │ ldr r1, [sp, #140] @ 0x8c │ │ - cbnz r1, 4bc80 │ │ - b.n 4bcdc │ │ + cbnz r1, 4bf88 │ │ + b.n 4bfe4 │ │ mov r7, sl │ │ ldr r1, [sp, #140] @ 0x8c │ │ cmp r1, #0 │ │ - beq.n 4bcdc │ │ + beq.n 4bfe4 │ │ add.w r0, fp, r7, lsl #2 │ │ subs r1, #1 │ │ str r1, [sp, #140] @ 0x8c │ │ ldr.w fp, [r0, #408] @ 0x198 │ │ - b.n 4bc1a │ │ + b.n 4bf22 │ │ ldr r4, [sp, #136] @ 0x88 │ │ add.w r1, r7, r7, lsl #1 │ │ add.w r1, fp, r1, lsl #3 │ │ ldr.w fp, [sp, #280] @ 0x118 │ │ ldrb.w r0, [r4, #32] │ │ ldrd r6, r3, [sp, #112] @ 0x70 │ │ tbh [pc, r0, lsl #1] │ │ @@ -53423,2045 +53616,2045 @@ │ │ lsls r5, r0, #2 │ │ lsls r4, r1, #7 │ │ movs r3, r4 │ │ lsls r6, r0, #4 │ │ ldrb r0, [r1, #0] │ │ ldr r4, [r4, #28] │ │ cmp r0, #1 │ │ - beq.w 4c2a2 │ │ + beq.w 4c5aa │ │ cmp r0, #0 │ │ - bne.w 4d2c6 │ │ + bne.w 4d5ce │ │ movs r0, #2 │ │ - b.n 4c2a4 │ │ + b.n 4c5ac │ │ ldr r0, [sp, #136] @ 0x88 │ │ ldrb.w r2, [r0, #32] │ │ ldr r1, [r0, #28] │ │ ldr r0, [sp, #280] @ 0x118 │ │ - bl 52638 │ │ - b.w 4ce0e │ │ + bl 52848 │ │ + b.w 4d116 │ │ ldrb r0, [r1, #0] │ │ cmp r0, #0 │ │ - beq.w 4c1a0 │ │ + beq.w 4c4a8 │ │ cmp r0, #4 │ │ - bne.w 4d1f6 │ │ + bne.w 4d4fe │ │ ldr r5, [r1, #12] │ │ cmp r5, #0 │ │ - beq.w 4c522 │ │ + beq.w 4c82a │ │ ldr.w r8, [r1, #8] │ │ ldrb.w r0, [r8] │ │ cmp r0, #0 │ │ - beq.w 4c6be │ │ + beq.w 4c9c6 │ │ cmp r0, #3 │ │ - bne.w 4d1f6 │ │ + bne.w 4d4fe │ │ ldrd r4, r6, [r8, #8] │ │ - b.w 4c6c0 │ │ + b.w 4c9c8 │ │ ldrb r0, [r1, #0] │ │ cmp r0, #4 │ │ - beq.w 4c1fa │ │ + beq.w 4c502 │ │ cmp r0, #0 │ │ - bne.w 4d1b6 │ │ + bne.w 4d4be │ │ ldr r4, [r4, #28] │ │ ldr.w r5, [fp, #8] │ │ adds r0, r4, #3 │ │ cmp r0, r5 │ │ - bls.n 4bd6a │ │ + bls.n 4c072 │ │ ldr.w r1, [fp] │ │ subs r6, r0, r5 │ │ subs r0, r1, r5 │ │ cmp r6, r0 │ │ - bhi.w 4d012 │ │ + bhi.w 4d31a │ │ ldr.w r7, [fp, #4] │ │ cmp r6, #2 │ │ add.w r0, r7, r5 │ │ - bcc.n 4bd60 │ │ + bcc.n 4c068 │ │ subs r6, #1 │ │ mov r1, r6 │ │ - bl d5370 │ │ + bl d5242 │ │ add r5, r6 │ │ adds r0, r7, r5 │ │ adds r5, #1 │ │ movs r1, #0 │ │ str.w r5, [fp, #8] │ │ strb r1, [r0, #0] │ │ cmp r5, r4 │ │ - bcc.w 4d322 │ │ + bcc.w 4d62a │ │ subs r0, r5, r4 │ │ cmp r0, #2 │ │ - bls.w 4d314 │ │ + bls.w 4d61c │ │ ldr.w r0, [fp, #4] │ │ movs r1, #0 │ │ strh r1, [r0, r4] │ │ add r0, r4 │ │ strb r1, [r0, #2] │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str r0, [sp, #84] @ 0x54 │ │ - b.w 4ce0e │ │ + b.w 4d116 │ │ ldrb r0, [r1, #0] │ │ ldr r4, [r4, #28] │ │ cmp r0, #0 │ │ - beq.w 4c234 │ │ + beq.w 4c53c │ │ cmp r0, #2 │ │ - bne.w 4d23a │ │ + bne.w 4d542 │ │ ldr r0, [r1, #8] │ │ cmp r0, #0 │ │ - beq.w 4c3ce │ │ + beq.w 4c6d6 │ │ cmp r0, #1 │ │ - bne.w 4d23a │ │ + bne.w 4d542 │ │ ldrd r0, r8, [r1, #16] │ │ - b.n 4c3dc │ │ + b.n 4c6e4 │ │ ldrb r0, [r1, #0] │ │ cmp r0, #4 │ │ - beq.w 4c23c │ │ + beq.w 4c544 │ │ cmp r0, #0 │ │ - bne.w 4d1d6 │ │ + bne.w 4d4de │ │ ldr r4, [r4, #28] │ │ ldr.w r5, [fp, #8] │ │ adds r0, r4, #3 │ │ cmp r0, r5 │ │ - bls.n 4bdfc │ │ + bls.n 4c104 │ │ ldr.w r1, [fp] │ │ subs r6, r0, r5 │ │ subs r0, r1, r5 │ │ cmp r6, r0 │ │ - bhi.w 4d038 │ │ + bhi.w 4d340 │ │ ldr.w r7, [fp, #4] │ │ cmp r6, #2 │ │ add.w r0, r7, r5 │ │ - bcc.n 4bdf2 │ │ + bcc.n 4c0fa │ │ subs r6, #1 │ │ mov r1, r6 │ │ - bl d5370 │ │ + bl d5242 │ │ add r5, r6 │ │ adds r0, r7, r5 │ │ adds r5, #1 │ │ movs r1, #0 │ │ str.w r5, [fp, #8] │ │ strb r1, [r0, #0] │ │ cmp r5, r4 │ │ - bcc.w 4d322 │ │ + bcc.w 4d62a │ │ subs r0, r5, r4 │ │ cmp r0, #2 │ │ - bls.w 4d314 │ │ + bls.w 4d61c │ │ ldr.w r0, [fp, #4] │ │ movs r1, #0 │ │ strh r1, [r0, r4] │ │ add r0, r4 │ │ strb r1, [r0, #2] │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str r0, [sp, #88] @ 0x58 │ │ - b.w 4ce0e │ │ + b.w 4d116 │ │ ldrb r0, [r1, #0] │ │ cmp r0, #4 │ │ - beq.w 4c270 │ │ + beq.w 4c578 │ │ cmp r0, #0 │ │ - bne.w 4d196 │ │ + bne.w 4d49e │ │ ldr r4, [r4, #28] │ │ ldr.w r5, [fp, #8] │ │ adds r0, r4, #3 │ │ cmp r0, r5 │ │ - bls.n 4be6a │ │ + bls.n 4c172 │ │ ldr.w r1, [fp] │ │ subs r6, r0, r5 │ │ subs r0, r1, r5 │ │ cmp r6, r0 │ │ - bhi.w 4d05e │ │ + bhi.w 4d366 │ │ ldr.w r7, [fp, #4] │ │ cmp r6, #2 │ │ add.w r0, r7, r5 │ │ - bcc.n 4be60 │ │ + bcc.n 4c168 │ │ subs r6, #1 │ │ mov r1, r6 │ │ - bl d5370 │ │ + bl d5242 │ │ add r5, r6 │ │ adds r0, r7, r5 │ │ adds r5, #1 │ │ movs r1, #0 │ │ str.w r5, [fp, #8] │ │ strb r1, [r0, #0] │ │ cmp r5, r4 │ │ - bcc.w 4d322 │ │ + bcc.w 4d62a │ │ subs r0, r5, r4 │ │ cmp r0, #2 │ │ - bls.w 4d314 │ │ + bls.w 4d61c │ │ ldr.w r0, [fp, #4] │ │ movs r1, #0 │ │ strh r1, [r0, r4] │ │ add r0, r4 │ │ strb r1, [r0, #2] │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str r0, [sp, #80] @ 0x50 │ │ - b.w 4ce0e │ │ + b.w 4d116 │ │ ldrb r0, [r1, #0] │ │ ldr.w r9, [r4, #28] │ │ cmp r0, #0 │ │ - beq.w 4c29c │ │ + beq.w 4c5a4 │ │ cmp r0, #2 │ │ - bne.w 4d21a │ │ + bne.w 4d522 │ │ ldr r0, [r1, #8] │ │ cmp r0, #0 │ │ - beq.w 4c442 │ │ + beq.w 4c74a │ │ cmp r0, #1 │ │ - bne.w 4d21a │ │ + bne.w 4d522 │ │ ldrd r8, r0, [r1, #16] │ │ - b.n 4c450 │ │ + b.n 4c758 │ │ ldrb r0, [r1, #0] │ │ cmp r0, #0 │ │ - beq.w 4c1a0 │ │ + beq.w 4c4a8 │ │ cmp r0, #4 │ │ - bne.w 4d1f6 │ │ + bne.w 4d4fe │ │ ldr r0, [r1, #12] │ │ cmp r0, #0 │ │ - beq.w 4c7fe │ │ + beq.w 4cb06 │ │ ldr r3, [sp, #136] @ 0x88 │ │ ldr r2, [r3, #0] │ │ lsls r2, r2, #31 │ │ - beq.w 4d3ca │ │ + beq.w 4d6d2 │ │ add.w r0, r0, r0, lsl #1 │ │ ldr.w fp, [r1, #8] │ │ ldrd r6, r5, [r3, #8] │ │ lsls r7, r0, #3 │ │ add.w r1, fp, r0, lsl #3 │ │ str r1, [sp, #140] @ 0x8c │ │ ldr r2, [sp, #108] @ 0x6c │ │ add r0, sp, #172 @ 0xac │ │ mov r1, fp │ │ strd r6, r5, [sp] │ │ - bl 53210 │ │ + bl 53420 │ │ add.w r8, sp, #172 @ 0xac │ │ ldmia.w r8, {r0, r4, r8} │ │ lsls r0, r0, #31 │ │ - bne.w 4c7f0 │ │ + bne.w 4caf8 │ │ mvn.w r0, #2147483648 @ 0x80000000 │ │ add.w fp, fp, #24 │ │ add r0, r4 │ │ cmp r0, #1 │ │ - bhi.w 4c80e │ │ + bhi.w 4cb16 │ │ subs r7, #24 │ │ - bne.n 4bee8 │ │ - b.w 4c7fe │ │ + bne.n 4c1f0 │ │ + b.w 4cb06 │ │ vmov.f32 s26, s16 │ │ ldrb r0, [r1, #0] │ │ ldr.w r8, [r4, #28] │ │ cmp r0, #0 │ │ - beq.w 4c5f2 │ │ + beq.w 4c8fa │ │ cmp r0, #2 │ │ - bne.w 4d258 │ │ + bne.w 4d560 │ │ ldr r0, [r1, #8] │ │ cmp r0, #2 │ │ - beq.w 4c5c6 │ │ + beq.w 4c8ce │ │ cmp r0, #1 │ │ - bne.w 4c5d2 │ │ + bne.w 4c8da │ │ ldrd r0, r1, [r1, #16] │ │ - bl d523a │ │ - b.n 4c5da │ │ + bl d534a │ │ + b.n 4c8e2 │ │ nop │ │ movs r0, r0 │ │ ldrb r0, [r0, #31] │ │ movs r0, r0 │ │ - b.n 4bf56 │ │ + b.n 4c25e │ │ @ instruction: 0xffff47ef │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ ldrb r0, [r7, #31] │ │ ldr r0, [r4, #0] │ │ lsls r0, r0, #31 │ │ - beq.w 4d3a4 │ │ + beq.w 4d6ac │ │ ldrd r0, r2, [r4, #8] │ │ strd r0, r2, [sp] │ │ add r0, sp, #172 @ 0xac │ │ ldr r2, [sp, #108] @ 0x6c │ │ - bl 53210 │ │ + bl 53420 │ │ mov r1, r4 │ │ ldrd r4, r3, [sp, #180] @ 0xb4 │ │ ldrd r0, r5, [sp, #172] @ 0xac │ │ cmp r0, #0 │ │ - bne.w 4d260 │ │ + bne.w 4d568 │ │ ldr r1, [r1, #28] │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ - bne.w 4c3b0 │ │ + bne.w 4c6b8 │ │ ldr.w r4, [fp, #8] │ │ adds r0, r1, #3 │ │ cmp r0, r4 │ │ - bls.n 4bfd0 │ │ + bls.n 4c2d8 │ │ ldr.w r2, [fp] │ │ subs r5, r0, r4 │ │ subs r0, r2, r4 │ │ cmp r5, r0 │ │ - bhi.w 4d0f6 │ │ + bhi.w 4d3fe │ │ ldr.w r6, [fp, #4] │ │ cmp r5, #2 │ │ add.w r0, r6, r4 │ │ - bcc.n 4bfc6 │ │ + bcc.n 4c2ce │ │ subs r5, #1 │ │ mov r7, r1 │ │ mov r1, r5 │ │ - bl d5370 │ │ + bl d5242 │ │ add r4, r5 │ │ mov r1, r7 │ │ adds r0, r6, r4 │ │ adds r4, #1 │ │ movs r2, #0 │ │ str.w r4, [fp, #8] │ │ strb r2, [r0, #0] │ │ cmp r4, r1 │ │ - bcc.w 4d3ac │ │ + bcc.w 4d6b4 │ │ subs r0, r4, r1 │ │ cmp r0, #2 │ │ - bls.w 4d314 │ │ + bls.w 4d61c │ │ ldr.w r0, [fp, #4] │ │ movs r2, #0 │ │ strh r2, [r0, r1] │ │ add r0, r1 │ │ strb r2, [r0, #2] │ │ - b.w 4ce0e │ │ + b.w 4d116 │ │ ldrb r5, [r1, #0] │ │ ldr.w r9, [r4, #28] │ │ cmp r5, #0 │ │ - beq.w 4c4d0 │ │ + beq.w 4c7d8 │ │ cmp r5, #2 │ │ - bne.w 4d234 │ │ + bne.w 4d53c │ │ ldr r0, [r1, #8] │ │ cmp r0, #0 │ │ - beq.w 4c4b4 │ │ + beq.w 4c7bc │ │ cmp r0, #1 │ │ - bne.w 4d234 │ │ + bne.w 4d53c │ │ ldrd r5, r0, [r1, #16] │ │ - b.n 4c4c0 │ │ + b.n 4c7c8 │ │ vmov.f64 d13, d10 │ │ ldrb r0, [r1, #0] │ │ ldr r4, [r4, #28] │ │ cmp r0, #0 │ │ - beq.w 4c658 │ │ + beq.w 4c960 │ │ cmp r0, #2 │ │ - bne.w 4d2a4 │ │ + bne.w 4d5ac │ │ ldr r0, [r1, #8] │ │ cmp r0, #2 │ │ - beq.w 4c5cc │ │ + beq.w 4c8d4 │ │ cmp r0, #1 │ │ - bne.w 4c64c │ │ + bne.w 4c954 │ │ ldrd r0, r1, [r1, #16] │ │ - bl d523a │ │ - b.n 4c654 │ │ + bl d534a │ │ + b.n 4c95c │ │ ldrb r0, [r1, #0] │ │ cmp r0, #4 │ │ - beq.w 4c2fc │ │ + beq.w 4c604 │ │ cmp r0, #0 │ │ - bne.w 4d204 │ │ + bne.w 4d50c │ │ ldr r4, [r4, #28] │ │ ldr.w r5, [fp, #8] │ │ adds r0, r4, #3 │ │ cmp r0, r5 │ │ - bls.n 4c08a │ │ + bls.n 4c392 │ │ ldr.w r1, [fp] │ │ subs r6, r0, r5 │ │ subs r0, r1, r5 │ │ cmp r6, r0 │ │ - bhi.w 4d084 │ │ + bhi.w 4d38c │ │ ldr.w r7, [fp, #4] │ │ cmp r6, #2 │ │ add.w r0, r7, r5 │ │ - bcc.n 4c080 │ │ + bcc.n 4c388 │ │ subs r6, #1 │ │ mov r1, r6 │ │ - bl d5370 │ │ + bl d5242 │ │ add r5, r6 │ │ adds r0, r7, r5 │ │ adds r5, #1 │ │ movs r1, #0 │ │ str.w r5, [fp, #8] │ │ strb r1, [r0, #0] │ │ cmp r5, r4 │ │ - bcc.w 4d322 │ │ + bcc.w 4d62a │ │ subs r0, r5, r4 │ │ cmp r0, #2 │ │ - bls.w 4d314 │ │ + bls.w 4d61c │ │ ldr.w r0, [fp, #4] │ │ movs r1, #0 │ │ strh r1, [r0, r4] │ │ add r0, r4 │ │ strb r1, [r0, #2] │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str r0, [sp, #92] @ 0x5c │ │ - b.w 4ce0e │ │ + b.w 4d116 │ │ ldrb r0, [r1, #0] │ │ ldr r7, [r4, #28] │ │ cmp r0, #0 │ │ - beq.w 4c336 │ │ + beq.w 4c63e │ │ cmp r0, #3 │ │ - bne.w 4d2e0 │ │ + bne.w 4d5e8 │ │ ldrd r2, r3, [r1, #8] │ │ - b.n 4c338 │ │ + b.n 4c640 │ │ ldrb r0, [r1, #0] │ │ cmp r0, #4 │ │ - beq.w 4c348 │ │ + beq.w 4c650 │ │ cmp r0, #0 │ │ - bne.w 4d176 │ │ + bne.w 4d47e │ │ ldr r4, [r4, #28] │ │ ldr.w r5, [fp, #8] │ │ adds r0, r4, #3 │ │ cmp r0, r5 │ │ - bls.n 4c10e │ │ + bls.n 4c416 │ │ ldr.w r1, [fp] │ │ subs r6, r0, r5 │ │ subs r0, r1, r5 │ │ cmp r6, r0 │ │ - bhi.w 4d0aa │ │ + bhi.w 4d3b2 │ │ ldr.w r7, [fp, #4] │ │ cmp r6, #2 │ │ add.w r0, r7, r5 │ │ - bcc.n 4c104 │ │ + bcc.n 4c40c │ │ subs r6, #1 │ │ mov r1, r6 │ │ - bl d5370 │ │ + bl d5242 │ │ add r5, r6 │ │ adds r0, r7, r5 │ │ adds r5, #1 │ │ movs r1, #0 │ │ str.w r5, [fp, #8] │ │ strb r1, [r0, #0] │ │ cmp r5, r4 │ │ - bcc.w 4d322 │ │ + bcc.w 4d62a │ │ subs r0, r5, r4 │ │ cmp r0, #2 │ │ - bls.w 4d314 │ │ + bls.w 4d61c │ │ ldr.w r0, [fp, #4] │ │ movs r1, #0 │ │ strh r1, [r0, r4] │ │ add r0, r4 │ │ strb r1, [r0, #2] │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str r0, [sp, #76] @ 0x4c │ │ - b.w 4ce0e │ │ + b.w 4d116 │ │ ldrb r0, [r1, #0] │ │ cmp r0, #4 │ │ - beq.w 4c374 │ │ + beq.w 4c67c │ │ cmp r0, #0 │ │ - bne.w 4d282 │ │ + bne.w 4d58a │ │ ldr r4, [r4, #28] │ │ ldr.w r5, [fp, #8] │ │ adds r0, r4, #3 │ │ cmp r0, r5 │ │ - bls.n 4c17c │ │ + bls.n 4c484 │ │ ldr.w r1, [fp] │ │ subs r6, r0, r5 │ │ subs r0, r1, r5 │ │ cmp r6, r0 │ │ - bhi.w 4d0d0 │ │ + bhi.w 4d3d8 │ │ ldr.w r7, [fp, #4] │ │ cmp r6, #2 │ │ add.w r0, r7, r5 │ │ - bcc.n 4c172 │ │ + bcc.n 4c47a │ │ subs r6, #1 │ │ mov r1, r6 │ │ - bl d5370 │ │ + bl d5242 │ │ add r5, r6 │ │ adds r0, r7, r5 │ │ adds r5, #1 │ │ movs r1, #0 │ │ str.w r5, [fp, #8] │ │ strb r1, [r0, #0] │ │ cmp r5, r4 │ │ - bcc.w 4d322 │ │ + bcc.w 4d62a │ │ subs r0, r5, r4 │ │ cmp r0, #2 │ │ - bls.w 4d314 │ │ + bls.w 4d61c │ │ ldr.w r0, [fp, #4] │ │ movs r1, #0 │ │ strh r1, [r0, r4] │ │ add r0, r4 │ │ strb r1, [r0, #2] │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str r0, [sp, #72] @ 0x48 │ │ - b.w 4ce0e │ │ + b.w 4d116 │ │ ldr r4, [r4, #28] │ │ ldr.w r5, [fp, #8] │ │ adds r0, r4, #3 │ │ cmp r0, r5 │ │ - bls.n 4c1dc │ │ + bls.n 4c4e4 │ │ ldr.w r1, [fp] │ │ subs r6, r0, r5 │ │ subs r0, r1, r5 │ │ cmp r6, r0 │ │ - bhi.w 4cf04 │ │ + bhi.w 4d20c │ │ ldr.w r7, [fp, #4] │ │ cmp r6, #2 │ │ add.w r0, r7, r5 │ │ - bcc.n 4c1d2 │ │ + bcc.n 4c4da │ │ subs r6, #1 │ │ mov r1, r6 │ │ - bl d5370 │ │ + bl d5242 │ │ add r5, r6 │ │ adds r0, r7, r5 │ │ adds r5, #1 │ │ movs r1, #0 │ │ str.w r5, [fp, #8] │ │ strb r1, [r0, #0] │ │ cmp r5, r4 │ │ - bcc.w 4d322 │ │ + bcc.w 4d62a │ │ subs r0, r5, r4 │ │ cmp r0, #2 │ │ - bls.w 4d314 │ │ + bls.w 4d61c │ │ ldr.w r0, [fp, #4] │ │ movs r1, #0 │ │ strh r1, [r0, r4] │ │ add r0, r4 │ │ strb r1, [r0, #2] │ │ - b.w 4ce0e │ │ + b.w 4d116 │ │ ldr r4, [r1, #12] │ │ cmp r4, #0 │ │ - beq.w 4c532 │ │ + beq.w 4c83a │ │ ldr r0, [r1, #8] │ │ vmov.f32 s26, s16 │ │ mov r5, r0 │ │ ldrb.w r1, [r5], #24 │ │ cmp r1, #0 │ │ - beq.w 4cc16 │ │ + beq.w 4cf1e │ │ cmp r1, #2 │ │ - bne.w 4d1b6 │ │ + bne.w 4d4be │ │ ldr r1, [r0, #8] │ │ cmp r1, #2 │ │ - beq.w 4cbf0 │ │ + beq.w 4cef8 │ │ cmp r1, #1 │ │ - bne.w 4cbf6 │ │ + bne.w 4cefe │ │ ldrd r0, r1, [r0, #16] │ │ - bl d523a │ │ - b.w 4cbfe │ │ + bl d534a │ │ + b.w 4cf06 │ │ mov.w r8, #2147483648 @ 0x80000000 │ │ movs r0, #0 │ │ - b.n 4c3dc │ │ + b.n 4c6e4 │ │ ldr r4, [r1, #12] │ │ cmp r4, #0 │ │ - beq.w 4c550 │ │ + beq.w 4c858 │ │ ldr r6, [r1, #8] │ │ movs r7, #0 │ │ mov.w r5, #2147483648 @ 0x80000000 │ │ ldrb r0, [r6, #0] │ │ cmp r0, #0 │ │ - beq.w 4c906 │ │ + beq.w 4cc0e │ │ ldr r1, [sp, #104] @ 0x68 │ │ cmp r0, #2 │ │ - bne.w 4d1d8 │ │ + bne.w 4d4e0 │ │ ldr r0, [r6, #8] │ │ cmp r0, #0 │ │ - beq.w 4c8fa │ │ + beq.w 4cc02 │ │ cmp r0, #1 │ │ - bne.w 4d1d8 │ │ + bne.w 4d4e0 │ │ ldrd r7, r5, [r6, #16] │ │ - b.n 4c906 │ │ + b.n 4cc0e │ │ ldr r4, [r1, #12] │ │ cmp r4, #0 │ │ - beq.w 4c56e │ │ + beq.w 4c876 │ │ ldr r7, [r1, #8] │ │ ldrb r5, [r7, #0] │ │ cmp r5, #0 │ │ - beq.w 4c9e6 │ │ + beq.w 4ccee │ │ cmp r5, #2 │ │ - bne.w 4d196 │ │ + bne.w 4d49e │ │ ldr r0, [r7, #8] │ │ cmp r0, #0 │ │ - beq.w 4c9ca │ │ + beq.w 4ccd2 │ │ cmp r0, #1 │ │ - bne.w 4d196 │ │ + bne.w 4d49e │ │ ldrd r5, r0, [r7, #16] │ │ - b.n 4c9d6 │ │ + b.n 4ccde │ │ mov.w r8, #2147483648 @ 0x80000000 │ │ - b.n 4c45c │ │ + b.n 4c764 │ │ ldrb r0, [r1, #1] │ │ ldr.w r6, [fp, #8] │ │ add.w r8, r4, #1 │ │ str r0, [sp, #100] @ 0x64 │ │ cmp r8, r6 │ │ - bls.n 4c2e4 │ │ + bls.n 4c5ec │ │ ldr.w r0, [fp] │ │ sub.w r7, r8, r6 │ │ subs r0, r0, r6 │ │ cmp r7, r0 │ │ - bhi.w 4cf2a │ │ + bhi.w 4d232 │ │ ldr.w r5, [fp, #4] │ │ cmp r7, #2 │ │ add.w r0, r5, r6 │ │ - bcc.n 4c2da │ │ + bcc.n 4c5e2 │ │ subs r7, #1 │ │ mov r1, r7 │ │ - bl d5370 │ │ + bl d5242 │ │ add r6, r7 │ │ adds r0, r5, r6 │ │ adds r6, #1 │ │ movs r1, #0 │ │ str.w r6, [fp, #8] │ │ strb r1, [r0, #0] │ │ cmp r4, r6 │ │ - bcs.w 4d360 │ │ + bcs.w 4d668 │ │ ldr r2, [sp, #100] @ 0x64 │ │ ldr.w r0, [fp, #4] │ │ subs r1, r2, #2 │ │ it ne │ │ addne r1, r2, #1 │ │ strb r1, [r0, r4] │ │ - b.w 4ce0e │ │ + b.w 4d116 │ │ ldr r4, [r1, #12] │ │ cmp r4, #0 │ │ - beq.w 4c58c │ │ + beq.w 4c894 │ │ ldr r0, [r1, #8] │ │ vmov.f64 d13, d10 │ │ mov r5, r0 │ │ ldrb.w r1, [r5], #24 │ │ cmp r1, #0 │ │ - beq.w 4cd26 │ │ + beq.w 4d02e │ │ cmp r1, #2 │ │ - bne.w 4d204 │ │ + bne.w 4d50c │ │ ldr r1, [r0, #8] │ │ cmp r1, #2 │ │ - beq.w 4cd14 │ │ + beq.w 4d01c │ │ cmp r1, #1 │ │ - bne.w 4cd1a │ │ + bne.w 4d022 │ │ ldrd r0, r1, [r0, #16] │ │ - bl d523a │ │ - b.w 4cd22 │ │ + bl d534a │ │ + b.w 4d02a │ │ movs r2, #0 │ │ mov r0, fp │ │ mov r1, r7 │ │ strd r2, r3, [sp, #112] @ 0x70 │ │ - bl 52a9c │ │ - b.w 4ce0e │ │ + bl 52cac │ │ + b.w 4d116 │ │ ldr r5, [r1, #12] │ │ cmp r5, #0 │ │ - beq.w 4c5aa │ │ + beq.w 4c8b2 │ │ ldr r6, [r1, #8] │ │ ldrb r0, [r6, #0] │ │ cmp r0, #0 │ │ - beq.w 4c6f0 │ │ + beq.w 4c9f8 │ │ cmp r0, #2 │ │ - bne.w 4d176 │ │ + bne.w 4d47e │ │ ldr r0, [r6, #8] │ │ cmp r0, #0 │ │ - beq.w 4caa4 │ │ + beq.w 4cdac │ │ cmp r0, #1 │ │ - bne.w 4d176 │ │ + bne.w 4d47e │ │ ldrd r4, r0, [r6, #16] │ │ - b.n 4cab0 │ │ + b.n 4cdb8 │ │ ldr r4, [r1, #12] │ │ - cbz r4, 4c392 │ │ + cbz r4, 4c69a │ │ ldr r7, [r1, #8] │ │ ldrb r0, [r7, #0] │ │ cmp r0, #0 │ │ - beq.w 4c6f6 │ │ + beq.w 4c9fe │ │ cmp r0, #1 │ │ - bne.w 4d282 │ │ + bne.w 4d58a │ │ ldrb r5, [r7, #1] │ │ subs r0, r5, #3 │ │ cmp r0, #2 │ │ - bcs.w 4c6f8 │ │ + bcs.w 4ca00 │ │ ldr r0, [sp, #136] @ 0x88 │ │ movs r2, #1 │ │ movs r3, #0 │ │ ldr r1, [r0, #28] │ │ movs r0, #1 │ │ str r0, [sp, #52] @ 0x34 │ │ movs r0, #0 │ │ str r0, [sp, #32] │ │ mov r0, fp │ │ - bl 52a9c │ │ + bl 52cac │ │ movs r0, #0 │ │ str r0, [sp, #72] @ 0x48 │ │ - b.w 4ce0e │ │ + b.w 4d116 │ │ cmp r3, #1 │ │ - bls.w 4d3ba │ │ + bls.w 4d6c2 │ │ mov r0, fp │ │ mov r2, r4 │ │ - bl 52a9c │ │ + bl 52cac │ │ cmp r5, #0 │ │ - beq.w 4ce0e │ │ + beq.w 4d116 │ │ mov r0, r4 │ │ - blx d87c0 │ │ - b.w 4ce0e │ │ + blx d87d0 │ │ + b.w 4d116 │ │ ldr.w r8, [r1, #20] │ │ cmp.w r8, #4294967295 @ 0xffffffff │ │ - ble.w 4d23a │ │ + ble.w 4d542 │ │ ldr r0, [r1, #16] │ │ ldr.w r5, [fp, #8] │ │ add.w r6, r4, #8 │ │ str r0, [sp, #96] @ 0x60 │ │ cmp r6, r5 │ │ - bls.n 4c420 │ │ + bls.n 4c728 │ │ ldr.w r0, [fp] │ │ sub.w r9, r6, r5 │ │ subs r0, r0, r5 │ │ cmp r9, r0 │ │ - bhi.w 4cf78 │ │ + bhi.w 4d280 │ │ ldr.w r7, [fp, #4] │ │ cmp.w r9, #2 │ │ add.w r0, r7, r5 │ │ - bcc.n 4c416 │ │ + bcc.n 4c71e │ │ sub.w r9, r9, #1 │ │ mov r1, r9 │ │ - bl d5370 │ │ + bl d5242 │ │ add r5, r9 │ │ adds r0, r7, r5 │ │ adds r5, #1 │ │ movs r1, #0 │ │ str.w r5, [fp, #8] │ │ strb r1, [r0, #0] │ │ cmn.w r4, #9 │ │ it ls │ │ cmpls r6, r5 │ │ - bhi.w 4d15e │ │ + bhi.w 4d466 │ │ ldr.w r0, [fp, #4] │ │ ldr r1, [sp, #96] @ 0x60 │ │ str.w r8, [sp, #60] @ 0x3c │ │ str r1, [r0, r4] │ │ add r0, r4 │ │ str.w r8, [r0, #4] │ │ - b.w 4ce0e │ │ + b.w 4d116 │ │ ldr r0, [r1, #20] │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - ble.w 4d21a │ │ + ble.w 4d522 │ │ ldr.w r8, [r1, #16] │ │ adds.w r1, r8, #2147483648 @ 0x80000000 │ │ adcs.w r0, r0, #0 │ │ - bne.w 4d21a │ │ + bne.w 4d522 │ │ ldr.w r5, [fp, #8] │ │ add.w r6, r9, #4 │ │ cmp r6, r5 │ │ - bls.n 4c498 │ │ + bls.n 4c7a0 │ │ ldr.w r0, [fp] │ │ subs r7, r6, r5 │ │ subs r0, r0, r5 │ │ cmp r7, r0 │ │ - bhi.w 4cfc6 │ │ + bhi.w 4d2ce │ │ ldr.w r4, [fp, #4] │ │ cmp r7, #2 │ │ add.w r0, r4, r5 │ │ - bcc.n 4c48e │ │ + bcc.n 4c796 │ │ subs r7, #1 │ │ mov r1, r7 │ │ - bl d5370 │ │ + bl d5242 │ │ add r5, r7 │ │ adds r0, r4, r5 │ │ adds r5, #1 │ │ movs r1, #0 │ │ str.w r5, [fp, #8] │ │ strb r1, [r0, #0] │ │ cmn.w r9, #5 │ │ it ls │ │ cmpls r6, r5 │ │ - bhi.w 4d38a │ │ + bhi.w 4d692 │ │ ldr.w r0, [fp, #4] │ │ str.w r8, [sp, #64] @ 0x40 │ │ str.w r8, [r0, r9] │ │ - b.w 4ce0e │ │ + b.w 4d116 │ │ ldr r0, [r1, #20] │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - ble.w 4d234 │ │ + ble.w 4d53c │ │ ldr r5, [r1, #16] │ │ rsbs r1, r5, #255 @ 0xff │ │ mov.w r1, #0 │ │ sbcs.w r0, r1, r0 │ │ - bcc.w 4d234 │ │ + bcc.w 4d53c │ │ ldr.w r6, [fp, #8] │ │ add.w r8, r9, #1 │ │ cmp r8, r6 │ │ - bls.n 4c50e │ │ + bls.n 4c816 │ │ ldr.w r0, [fp] │ │ sub.w r7, r8, r6 │ │ subs r0, r0, r6 │ │ cmp r7, r0 │ │ - bhi.w 4cfec │ │ + bhi.w 4d2f4 │ │ ldr.w r4, [fp, #4] │ │ cmp r7, #2 │ │ add.w r0, r4, r6 │ │ - bcc.n 4c504 │ │ + bcc.n 4c80c │ │ subs r7, #1 │ │ mov r1, r7 │ │ - bl d5370 │ │ + bl d5242 │ │ add r6, r7 │ │ adds r0, r4, r6 │ │ adds r6, #1 │ │ movs r1, #0 │ │ str.w r6, [fp, #8] │ │ strb r1, [r0, #0] │ │ cmp r9, r6 │ │ - bcs.w 4d37c │ │ + bcs.w 4d684 │ │ ldr.w r0, [fp, #4] │ │ str r5, [sp, #68] @ 0x44 │ │ strb.w r5, [r0, r9] │ │ - b.w 4ce0e │ │ + b.w 4d116 │ │ ldr r1, [r4, #28] │ │ mov r0, fp │ │ movs r2, #4 │ │ movs r3, #0 │ │ - bl 532f4 │ │ - b.w 4ce0e │ │ + bl 53504 │ │ + b.w 4d116 │ │ ldr r0, [sp, #136] @ 0x88 │ │ movs r2, #4 │ │ movs r3, #0 │ │ ldr r1, [r0, #28] │ │ movs r0, #4 │ │ str r0, [sp, #44] @ 0x2c │ │ movs r0, #0 │ │ str r0, [sp, #84] @ 0x54 │ │ mov r0, fp │ │ - bl 52d10 │ │ + bl 52f20 │ │ movs r0, #0 │ │ str r0, [sp, #20] │ │ - b.w 4ce0e │ │ + b.w 4d116 │ │ ldr r0, [sp, #136] @ 0x88 │ │ movs r2, #8 │ │ movs r3, #0 │ │ ldr r1, [r0, #28] │ │ movs r0, #8 │ │ str r0, [sp, #48] @ 0x30 │ │ movs r0, #0 │ │ str r0, [sp, #88] @ 0x58 │ │ mov r0, fp │ │ - bl 52f90 │ │ + bl 531a0 │ │ movs r0, #0 │ │ str r0, [sp, #16] │ │ - b.w 4ce0e │ │ + b.w 4d116 │ │ ldr r0, [sp, #136] @ 0x88 │ │ movs r2, #1 │ │ movs r3, #0 │ │ ldr r1, [r0, #28] │ │ movs r0, #1 │ │ str r0, [sp, #40] @ 0x28 │ │ movs r0, #0 │ │ str r0, [sp, #28] │ │ mov r0, fp │ │ - bl 52a9c │ │ + bl 52cac │ │ movs r0, #0 │ │ str r0, [sp, #80] @ 0x50 │ │ - b.w 4ce0e │ │ + b.w 4d116 │ │ ldr r0, [sp, #136] @ 0x88 │ │ movs r2, #8 │ │ movs r3, #0 │ │ ldr r1, [r0, #28] │ │ movs r0, #8 │ │ str r0, [sp, #56] @ 0x38 │ │ movs r0, #0 │ │ str r0, [sp, #92] @ 0x5c │ │ mov r0, fp │ │ - bl 52f90 │ │ + bl 531a0 │ │ movs r0, #0 │ │ str r0, [sp, #12] │ │ - b.w 4ce0e │ │ + b.w 4d116 │ │ movs r0, #4 │ │ ldr r1, [r4, #28] │ │ str r0, [sp, #36] @ 0x24 │ │ movs r0, #0 │ │ str r0, [sp, #24] │ │ mov r0, fp │ │ movs r2, #4 │ │ movs r3, #0 │ │ - bl 52d10 │ │ + bl 52f20 │ │ movs r0, #0 │ │ str r0, [sp, #76] @ 0x4c │ │ - b.w 4ce0e │ │ + b.w 4d116 │ │ vldr d16, [r1, #16] │ │ - b.n 4c5de │ │ + b.n 4c8e6 │ │ vldr d13, [r1, #16] │ │ - b.n 4c658 │ │ + b.n 4c960 │ │ ldrd r0, r1, [r1, #16] │ │ - bl d52e8 │ │ + bl d50e8 │ │ vmov d16, r0, r1 │ │ vabs.f64 d17, d16 │ │ vcmp.f64 d17, d9 │ │ vmrs APSR_nzcv, fpscr │ │ - bhi.w 4d258 │ │ + bhi.w 4d560 │ │ vcvt.f32.f64 s26, d16 │ │ ldr.w r5, [fp, #8] │ │ add.w r4, r8, #4 │ │ cmp r4, r5 │ │ - bls.n 4c62e │ │ + bls.n 4c936 │ │ ldr.w r0, [fp] │ │ subs r7, r4, r5 │ │ subs r0, r0, r5 │ │ cmp r7, r0 │ │ - bhi.w 4cfa0 │ │ + bhi.w 4d2a8 │ │ ldr.w r6, [fp, #4] │ │ cmp r7, #2 │ │ add.w r0, r6, r5 │ │ - bcc.n 4c624 │ │ + bcc.n 4c92c │ │ subs r7, #1 │ │ mov r1, r7 │ │ - bl d5370 │ │ + bl d5242 │ │ add r5, r7 │ │ adds r0, r6, r5 │ │ adds r5, #1 │ │ movs r1, #0 │ │ str.w r5, [fp, #8] │ │ strb r1, [r0, #0] │ │ cmn.w r8, #5 │ │ it ls │ │ cmpls r4, r5 │ │ - bhi.w 4d36e │ │ + bhi.w 4d676 │ │ vmov r0, s26 │ │ ldr.w r1, [fp, #4] │ │ vmov.f32 s22, s26 │ │ str.w r0, [r1, r8] │ │ - b.n 4ce0e │ │ + b.n 4d116 │ │ ldrd r0, r1, [r1, #16] │ │ - bl d52e8 │ │ + bl d50e8 │ │ vmov d13, r0, r1 │ │ ldr.w r5, [fp, #8] │ │ add.w r6, r4, #8 │ │ cmp r6, r5 │ │ - bls.n 4c69a │ │ + bls.n 4c9a2 │ │ ldr.w r0, [fp] │ │ sub.w r8, r6, r5 │ │ subs r0, r0, r5 │ │ cmp r8, r0 │ │ - bhi.w 4cf50 │ │ + bhi.w 4d258 │ │ ldr.w r7, [fp, #4] │ │ cmp.w r8, #2 │ │ add.w r0, r7, r5 │ │ - bcc.n 4c690 │ │ + bcc.n 4c998 │ │ sub.w r8, r8, #1 │ │ mov r1, r8 │ │ - bl d5370 │ │ + bl d5242 │ │ add r5, r8 │ │ adds r0, r7, r5 │ │ adds r5, #1 │ │ movs r1, #0 │ │ str.w r5, [fp, #8] │ │ strb r1, [r0, #0] │ │ cmn.w r4, #9 │ │ it ls │ │ cmpls r6, r5 │ │ - bhi.w 4d15e │ │ + bhi.w 4d466 │ │ ldr.w r0, [fp, #4] │ │ vmov.f64 d12, d13 │ │ vstr d13, [sp, #152] @ 0x98 │ │ ldrd r1, r2, [sp, #152] @ 0x98 │ │ str r1, [r0, r4] │ │ add r0, r4 │ │ str r2, [r0, #4] │ │ - b.n 4ce0e │ │ + b.n 4d116 │ │ movs r4, #0 │ │ movs r0, #32 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 4d3ea │ │ + beq.w 4d6f2 │ │ mov r9, r0 │ │ movs r0, #1 │ │ strd r9, r0, [sp, #176] @ 0xb0 │ │ movs r0, #4 │ │ cmp r5, #1 │ │ strd r4, r6, [r9] │ │ str r0, [sp, #172] @ 0xac │ │ - bne.n 4c73c │ │ + bne.n 4ca44 │ │ ldr r0, [sp, #136] @ 0x88 │ │ mov r2, r9 │ │ movs r3, #1 │ │ ldr r1, [r0, #28] │ │ mov r0, fp │ │ - bl 532f4 │ │ - b.n 4c8cc │ │ + bl 53504 │ │ + b.n 4cbd4 │ │ mov.w r4, #2147483648 @ 0x80000000 │ │ - b.n 4cabc │ │ + b.n 4cdc4 │ │ movs r5, #2 │ │ movs r0, #8 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 4d3e2 │ │ + beq.w 4d6ea │ │ mov r8, r0 │ │ strb r5, [r0, #0] │ │ movs r0, #1 │ │ cmp r4, #1 │ │ strd r8, r0, [sp, #176] @ 0xb0 │ │ mov.w r0, #8 │ │ str r0, [sp, #172] @ 0xac │ │ - bne.n 4c79a │ │ + bne.n 4caa2 │ │ ldr r0, [sp, #136] @ 0x88 │ │ mov r2, r8 │ │ movs r3, #1 │ │ ldr r1, [r0, #28] │ │ movs r0, #1 │ │ str r0, [sp, #32] │ │ mov r0, fp │ │ - bl 52994 │ │ + bl 52ba4 │ │ movs r0, #8 │ │ str r0, [sp, #72] @ 0x48 │ │ mov r0, r8 │ │ ldr.w r8, [sp, #132] @ 0x84 │ │ str r0, [sp, #52] @ 0x34 │ │ - blx d87c0 │ │ - b.n 4ce12 │ │ + blx d87d0 │ │ + b.n 4d11a │ │ add.w r0, r5, r5, lsl #1 │ │ movs r6, #1 │ │ movs r5, #0 │ │ lsls r0, r0, #3 │ │ sub.w r7, r0, #24 │ │ - b.n 4c768 │ │ + b.n 4ca70 │ │ movs r4, #0 │ │ ldr r0, [sp, #172] @ 0xac │ │ cmp r6, r0 │ │ - beq.n 4c784 │ │ + beq.n 4ca8c │ │ add.w r0, r9, r5 │ │ adds r6, #1 │ │ adds r5, #8 │ │ subs r7, #24 │ │ strd r4, sl, [r0, #8] │ │ str r6, [sp, #180] @ 0xb4 │ │ - beq.w 4c8b4 │ │ + beq.w 4cbbc │ │ add.w r0, r5, r5, lsl #1 │ │ add r0, r8 │ │ ldrb r1, [r0, #24] │ │ cmp r1, #0 │ │ - beq.n 4c74c │ │ + beq.n 4ca54 │ │ cmp r1, #3 │ │ - bne.w 4d1ec │ │ + bne.w 4d4f4 │ │ ldrd r4, sl, [r0, #32] │ │ ldr r0, [sp, #172] @ 0xac │ │ cmp r6, r0 │ │ - bne.n 4c754 │ │ + bne.n 4ca5c │ │ movs r0, #8 │ │ mov r1, r6 │ │ str r0, [sp, #0] │ │ add r0, sp, #172 @ 0xac │ │ movs r2, #1 │ │ movs r3, #4 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w r9, [sp, #176] @ 0xb0 │ │ - b.n 4c754 │ │ + b.n 4ca5c │ │ add.w r0, r4, r4, lsl #1 │ │ ldr r1, [sp, #104] @ 0x68 │ │ adds r7, #25 │ │ movs r4, #1 │ │ lsls r0, r0, #3 │ │ sub.w r5, r0, #24 │ │ ldrb.w r0, [r7, #-1] │ │ - cbz r0, 4c7c0 │ │ + cbz r0, 4cac8 │ │ cmp r0, #1 │ │ - bne.w 4d278 │ │ + bne.w 4d580 │ │ ldrb r6, [r7, #0] │ │ subs r0, r6, #3 │ │ cmp r0, #2 │ │ - bcs.n 4c7c2 │ │ - b.n 4c8d4 │ │ + bcs.n 4caca │ │ + b.n 4cbdc │ │ movs r6, #2 │ │ ldr r0, [sp, #172] @ 0xac │ │ cmp r4, r0 │ │ - beq.n 4c7d8 │ │ + beq.n 4cae0 │ │ strb.w r6, [r8, r4] │ │ adds r4, #1 │ │ adds r7, #24 │ │ subs r5, #24 │ │ str r4, [sp, #180] @ 0xb4 │ │ - bne.n 4c7aa │ │ - b.n 4c8d4 │ │ + bne.n 4cab2 │ │ + b.n 4cbdc │ │ movs r0, #1 │ │ mov r1, r4 │ │ str r0, [sp, #0] │ │ add r0, sp, #172 @ 0xac │ │ movs r2, #1 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [sp, #104] @ 0x68 │ │ ldr.w r8, [sp, #176] @ 0xb0 │ │ - b.n 4c7c8 │ │ + b.n 4cad0 │ │ movs r0, #12 │ │ movt r0, #32768 @ 0x8000 │ │ adds r0, #5 │ │ cmp r4, r0 │ │ - bne.w 4d2fa │ │ + bne.w 4d602 │ │ ldr r0, [sp, #136] @ 0x88 │ │ movs r2, #4 │ │ movs r3, #0 │ │ ldr r1, [r0, #28] │ │ ldr r0, [sp, #280] @ 0x118 │ │ - bl 5372c │ │ - b.n 4ce0e │ │ + bl 5393c │ │ + b.n 4d116 │ │ movs r0, #64 @ 0x40 │ │ ldrd r7, r9, [sp, #184] @ 0xb8 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 4d3f2 │ │ + beq.w 4d6fa │ │ strd r7, r9, [r0, #8] │ │ mov.w sl, #1 │ │ ldr r7, [sp, #140] @ 0x8c │ │ mov r9, r0 │ │ strd r4, r8, [r0] │ │ str r0, [sp, #164] @ 0xa4 │ │ movs r0, #4 │ │ cmp fp, r7 │ │ str.w sl, [sp, #168] @ 0xa8 │ │ str r0, [sp, #160] @ 0xa0 │ │ - beq.w 4ce1c │ │ + beq.w 4d124 │ │ ldr r2, [sp, #108] @ 0x6c │ │ add r0, sp, #172 @ 0xac │ │ mov r1, fp │ │ strd r6, r5, [sp] │ │ - bl 53210 │ │ + bl 53420 │ │ add.w r8, sp, #172 @ 0xac │ │ ldmia.w r8, {r0, r4, r8} │ │ lsls r0, r0, #31 │ │ - bne.w 4ce2a │ │ + bne.w 4d132 │ │ mvn.w r0, #2147483648 @ 0x80000000 │ │ add.w fp, fp, #24 │ │ add r0, r4 │ │ cmp r0, #1 │ │ - bhi.n 4c86e │ │ + bhi.n 4cb76 │ │ cmp fp, r7 │ │ - bne.n 4c83e │ │ - b.n 4ce3c │ │ + bne.n 4cb46 │ │ + b.n 4d144 │ │ ldrd r7, r2, [sp, #184] @ 0xb8 │ │ ldr r0, [sp, #160] @ 0xa0 │ │ cmp sl, r0 │ │ - beq.n 4c89a │ │ + beq.n 4cba2 │ │ mov.w r0, sl, lsl #4 │ │ str.w r4, [r9, r0] │ │ add.w r0, r9, sl, lsl #4 │ │ add.w sl, sl, #1 │ │ strd r8, r7, [r0, #4] │ │ ldr r7, [sp, #140] @ 0x8c │ │ str r2, [r0, #12] │ │ str.w sl, [sp, #168] @ 0xa8 │ │ cmp fp, r7 │ │ - bne.n 4c83e │ │ - b.n 4ce3c │ │ + bne.n 4cb46 │ │ + b.n 4d144 │ │ movs r0, #16 │ │ mov r9, r2 │ │ str r0, [sp, #0] │ │ add r0, sp, #160 @ 0xa0 │ │ mov r1, sl │ │ movs r2, #1 │ │ movs r3, #4 │ │ - bl 4eddc │ │ + bl 4efec │ │ mov r2, r9 │ │ ldr.w r9, [sp, #164] @ 0xa4 │ │ - b.n 4c878 │ │ + b.n 4cb80 │ │ ldr r0, [sp, #136] @ 0x88 │ │ mov r3, r6 │ │ ldrd r4, r9, [sp, #172] @ 0xac │ │ mov r2, r9 │ │ ldr r1, [r0, #28] │ │ mov r0, fp │ │ - bl 532f4 │ │ + bl 53504 │ │ cmp r4, #0 │ │ - beq.w 4ce0e │ │ + beq.w 4d116 │ │ mov r0, r9 │ │ - blx d87c0 │ │ - b.n 4ce0e │ │ + blx d87d0 │ │ + b.n 4d116 │ │ ldr r1, [sp, #136] @ 0x88 │ │ mov r3, r4 │ │ ldrd r5, r0, [sp, #172] @ 0xac │ │ ldr r1, [r1, #28] │ │ subs.w r2, r5, #2147483648 @ 0x80000000 │ │ str r0, [sp, #52] @ 0x34 │ │ it ne │ │ movne r2, r0 │ │ mov r0, fp │ │ - bl 52994 │ │ + bl 52ba4 │ │ lsls r0, r5, #1 │ │ str r5, [sp, #72] @ 0x48 │ │ - bne.w 4ced0 │ │ + bne.w 4d1d8 │ │ str r4, [sp, #32] │ │ - b.n 4ce0e │ │ + b.n 4d116 │ │ ldr r5, [r6, #20] │ │ cmp.w r5, #4294967295 @ 0xffffffff │ │ - ble.w 4d1d8 │ │ + ble.w 4d4e0 │ │ ldr r7, [r6, #16] │ │ movs r0, #32 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 4d3d2 │ │ + beq.w 4d6da │ │ mov r8, r0 │ │ movs r0, #1 │ │ strd r8, r0, [sp, #176] @ 0xb0 │ │ movs r0, #4 │ │ cmp r4, #1 │ │ strd r7, r5, [r8] │ │ str r0, [sp, #172] @ 0xac │ │ - bne.n 4c94a │ │ + bne.n 4cc52 │ │ ldr r0, [sp, #136] @ 0x88 │ │ mov r2, r8 │ │ movs r3, #1 │ │ ldr r1, [r0, #28] │ │ movs r0, #1 │ │ str r0, [sp, #16] │ │ mov r0, fp │ │ - bl 52f90 │ │ + bl 531a0 │ │ movs r0, #4 │ │ str r0, [sp, #88] @ 0x58 │ │ mov r0, r8 │ │ ldr.w r8, [sp, #132] @ 0x84 │ │ str r0, [sp, #48] @ 0x30 │ │ - blx d87c0 │ │ - b.n 4ce12 │ │ + blx d87d0 │ │ + b.n 4d11a │ │ add.w r0, r4, r4, lsl #1 │ │ ldr r1, [sp, #104] @ 0x68 │ │ add.w r7, r6, #40 @ 0x28 │ │ movs r4, #1 │ │ lsls r0, r0, #3 │ │ sub.w r9, r0, #24 │ │ movs r6, #8 │ │ ldrb.w r0, [r7, #-16] │ │ mov.w sl, #0 │ │ mov.w r5, #2147483648 @ 0x80000000 │ │ - cbz r0, 4c992 │ │ + cbz r0, 4cc9a │ │ cmp r0, #2 │ │ - bne.w 4d1cc │ │ + bne.w 4d4d4 │ │ ldr.w r0, [r7, #-8] │ │ - cbz r0, 4c984 │ │ + cbz r0, 4cc8c │ │ cmp r0, #1 │ │ - bne.w 4d1cc │ │ + bne.w 4d4d4 │ │ ldrd sl, r5, [r7] │ │ - b.n 4c992 │ │ + b.n 4cc9a │ │ ldr r5, [r7, #4] │ │ cmp.w r5, #4294967295 @ 0xffffffff │ │ - ble.w 4d1cc │ │ + ble.w 4d4d4 │ │ ldr.w sl, [r7] │ │ ldr r0, [sp, #172] @ 0xac │ │ cmp r4, r0 │ │ - beq.n 4c9b2 │ │ + beq.n 4ccba │ │ add.w r0, r8, r6 │ │ str.w sl, [r8, r6] │ │ adds r4, #1 │ │ adds r7, #24 │ │ adds r6, #8 │ │ subs.w r9, r9, #24 │ │ str r5, [r0, #4] │ │ str r4, [sp, #180] @ 0xb4 │ │ - bne.n 4c95e │ │ - b.n 4cb7e │ │ + bne.n 4cc66 │ │ + b.n 4ce86 │ │ movs r0, #8 │ │ mov r1, r4 │ │ str r0, [sp, #0] │ │ add r0, sp, #172 @ 0xac │ │ movs r2, #1 │ │ movs r3, #8 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [sp, #104] @ 0x68 │ │ ldr.w r8, [sp, #176] @ 0xb0 │ │ - b.n 4c998 │ │ + b.n 4cca0 │ │ ldr r0, [r7, #20] │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - ble.w 4d196 │ │ + ble.w 4d49e │ │ ldr r5, [r7, #16] │ │ rsbs r1, r5, #255 @ 0xff │ │ mov.w r1, #0 │ │ sbcs.w r0, r1, r0 │ │ - bcc.w 4d196 │ │ + bcc.w 4d49e │ │ movs r0, #8 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 4d3e2 │ │ + beq.w 4d6ea │ │ mov r8, r0 │ │ strb r5, [r0, #0] │ │ movs r0, #1 │ │ cmp r4, #1 │ │ strd r8, r0, [sp, #176] @ 0xb0 │ │ mov.w r0, #8 │ │ str r0, [sp, #172] @ 0xac │ │ - bne.n 4ca2a │ │ + bne.n 4cd32 │ │ ldr r0, [sp, #136] @ 0x88 │ │ mov r2, r8 │ │ movs r3, #1 │ │ ldr r1, [r0, #28] │ │ movs r0, #1 │ │ str r0, [sp, #28] │ │ mov r0, fp │ │ - bl 52a9c │ │ + bl 52cac │ │ movs r0, #8 │ │ str r0, [sp, #80] @ 0x50 │ │ mov r0, r8 │ │ ldr.w r8, [sp, #132] @ 0x84 │ │ str r0, [sp, #40] @ 0x28 │ │ - blx d87c0 │ │ - b.n 4ce12 │ │ + blx d87d0 │ │ + b.n 4d11a │ │ add.w r0, r4, r4, lsl #1 │ │ ldr r1, [sp, #104] @ 0x68 │ │ adds r7, #40 @ 0x28 │ │ movs r4, #1 │ │ lsls r0, r0, #3 │ │ sub.w r5, r0, #24 │ │ ldrb.w r6, [r7, #-16] │ │ - cbz r6, 4ca76 │ │ + cbz r6, 4cd7e │ │ cmp r6, #2 │ │ - bne.w 4d18c │ │ + bne.w 4d494 │ │ ldr.w r0, [r7, #-8] │ │ - cbz r0, 4ca58 │ │ + cbz r0, 4cd60 │ │ cmp r0, #1 │ │ - bne.w 4d18c │ │ + bne.w 4d494 │ │ ldrd r6, r0, [r7] │ │ - b.n 4ca64 │ │ + b.n 4cd6c │ │ ldr r0, [r7, #4] │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - ble.w 4d18c │ │ + ble.w 4d494 │ │ ldr r6, [r7, #0] │ │ rsbs r1, r6, #255 @ 0xff │ │ mov.w r1, #0 │ │ sbcs.w r0, r1, r0 │ │ ldr r1, [sp, #104] @ 0x68 │ │ - bcc.w 4d18c │ │ + bcc.w 4d494 │ │ ldr r0, [sp, #172] @ 0xac │ │ cmp r4, r0 │ │ - beq.n 4ca8c │ │ + beq.n 4cd94 │ │ strb.w r6, [r8, r4] │ │ adds r4, #1 │ │ adds r7, #24 │ │ subs r5, #24 │ │ str r4, [sp, #180] @ 0xb4 │ │ - bne.n 4ca3a │ │ - b.n 4cba4 │ │ + bne.n 4cd42 │ │ + b.n 4ceac │ │ movs r0, #1 │ │ mov r1, r4 │ │ str r0, [sp, #0] │ │ add r0, sp, #172 @ 0xac │ │ movs r2, #1 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [sp, #104] @ 0x68 │ │ ldr.w r8, [sp, #176] @ 0xb0 │ │ - b.n 4ca7c │ │ + b.n 4cd84 │ │ ldr r0, [r6, #20] │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - ble.w 4d176 │ │ + ble.w 4d47e │ │ ldr r4, [r6, #16] │ │ adds.w r1, r4, #2147483648 @ 0x80000000 │ │ adcs.w r0, r0, #0 │ │ - bne.w 4d176 │ │ + bne.w 4d47e │ │ movs r0, #16 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 4d3da │ │ + beq.w 4d6e2 │ │ mov r8, r0 │ │ str r4, [r0, #0] │ │ movs r0, #1 │ │ cmp r5, #1 │ │ strd r8, r0, [sp, #176] @ 0xb0 │ │ mov.w r0, #4 │ │ str r0, [sp, #172] @ 0xac │ │ - bne.n 4cb00 │ │ + bne.n 4ce08 │ │ ldr r0, [sp, #136] @ 0x88 │ │ mov r2, r8 │ │ movs r3, #1 │ │ ldr r1, [r0, #28] │ │ movs r0, #1 │ │ str r0, [sp, #24] │ │ mov r0, fp │ │ - bl 52d10 │ │ + bl 52f20 │ │ movs r0, #4 │ │ str r0, [sp, #76] @ 0x4c │ │ mov r0, r8 │ │ ldr.w r8, [sp, #132] @ 0x84 │ │ str r0, [sp, #36] @ 0x24 │ │ - blx d87c0 │ │ - b.n 4ce12 │ │ + blx d87d0 │ │ + b.n 4d11a │ │ add.w r0, r5, r5, lsl #1 │ │ ldr r1, [sp, #104] @ 0x68 │ │ add.w r7, r6, #40 @ 0x28 │ │ movs r6, #1 │ │ lsls r0, r0, #3 │ │ sub.w r5, r0, #24 │ │ ldrb.w r0, [r7, #-16] │ │ - cbz r0, 4cb30 │ │ + cbz r0, 4ce38 │ │ cmp r0, #2 │ │ - bne.w 4d16c │ │ + bne.w 4d474 │ │ ldr.w r0, [r7, #-8] │ │ - cbz r0, 4cb36 │ │ + cbz r0, 4ce3e │ │ cmp r0, #1 │ │ - bne.w 4d16c │ │ + bne.w 4d474 │ │ ldrd r4, r0, [r7] │ │ - b.n 4cb42 │ │ + b.n 4ce4a │ │ mov.w r4, #2147483648 @ 0x80000000 │ │ - b.n 4cb50 │ │ + b.n 4ce58 │ │ ldr r0, [r7, #4] │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - ble.w 4d16c │ │ + ble.w 4d474 │ │ ldr r4, [r7, #0] │ │ adds.w r1, r4, #2147483648 @ 0x80000000 │ │ ldr r1, [sp, #104] @ 0x68 │ │ adcs.w r0, r0, #0 │ │ - bne.w 4d16c │ │ + bne.w 4d474 │ │ ldr r0, [sp, #172] @ 0xac │ │ cmp r6, r0 │ │ - beq.n 4cb66 │ │ + beq.n 4ce6e │ │ str.w r4, [r8, r6, lsl #2] │ │ adds r6, #1 │ │ adds r7, #24 │ │ subs r5, #24 │ │ str r6, [sp, #180] @ 0xb4 │ │ - bne.n 4cb12 │ │ - b.n 4cbca │ │ + bne.n 4ce1a │ │ + b.n 4ced2 │ │ movs r0, #4 │ │ mov r1, r6 │ │ str r0, [sp, #0] │ │ add r0, sp, #172 @ 0xac │ │ movs r2, #1 │ │ movs r3, #4 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [sp, #104] @ 0x68 │ │ ldr.w r8, [sp, #176] @ 0xb0 │ │ - b.n 4cb56 │ │ + b.n 4ce5e │ │ ldr r1, [sp, #136] @ 0x88 │ │ mov r3, r4 │ │ ldrd r5, r0, [sp, #172] @ 0xac │ │ ldr r1, [r1, #28] │ │ subs.w r2, r5, #2147483648 @ 0x80000000 │ │ str r0, [sp, #48] @ 0x30 │ │ it ne │ │ movne r2, r0 │ │ mov r0, fp │ │ - bl 52f90 │ │ + bl 531a0 │ │ lsls r0, r5, #1 │ │ str r5, [sp, #88] @ 0x58 │ │ - bne.w 4cee6 │ │ + bne.w 4d1ee │ │ str r4, [sp, #16] │ │ - b.n 4ce0e │ │ + b.n 4d116 │ │ ldr r1, [sp, #136] @ 0x88 │ │ mov r3, r4 │ │ ldrd r5, r0, [sp, #172] @ 0xac │ │ ldr r1, [r1, #28] │ │ subs.w r2, r5, #2147483648 @ 0x80000000 │ │ str r0, [sp, #40] @ 0x28 │ │ it ne │ │ movne r2, r0 │ │ mov r0, fp │ │ - bl 52a9c │ │ + bl 52cac │ │ lsls r0, r5, #1 │ │ str r5, [sp, #80] @ 0x50 │ │ - bne.w 4cef0 │ │ + bne.w 4d1f8 │ │ str r4, [sp, #28] │ │ - b.n 4ce0e │ │ + b.n 4d116 │ │ ldr r1, [sp, #136] @ 0x88 │ │ mov r3, r6 │ │ ldrd r4, r0, [sp, #172] @ 0xac │ │ ldr r1, [r1, #28] │ │ subs.w r2, r4, #2147483648 @ 0x80000000 │ │ str r0, [sp, #36] @ 0x24 │ │ it ne │ │ movne r2, r0 │ │ mov r0, fp │ │ - bl 52d10 │ │ + bl 52f20 │ │ lsls r0, r4, #1 │ │ str r4, [sp, #76] @ 0x4c │ │ - bne.w 4cefa │ │ + bne.w 4d202 │ │ str r6, [sp, #24] │ │ - b.n 4ce0e │ │ + b.n 4d116 │ │ vldr d16, [r0, #16] │ │ - b.n 4cc02 │ │ + b.n 4cf0a │ │ ldrd r0, r1, [r0, #16] │ │ - bl d52e8 │ │ + bl d50e8 │ │ vmov d16, r0, r1 │ │ vabs.f64 d17, d16 │ │ vcmp.f64 d17, d9 │ │ vmrs APSR_nzcv, fpscr │ │ - bhi.w 4d1b6 │ │ + bhi.w 4d4be │ │ vcvt.f32.f64 s26, d16 │ │ movs r0, #16 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 4d3da │ │ + beq.w 4d6e2 │ │ mov r8, r0 │ │ vstr s26, [r0] │ │ movs r0, #1 │ │ cmp r4, #1 │ │ strd r8, r0, [sp, #176] @ 0xb0 │ │ mov.w r0, #4 │ │ str r0, [sp, #172] @ 0xac │ │ - bne.n 4cc5c │ │ + bne.n 4cf64 │ │ ldr r0, [sp, #136] @ 0x88 │ │ mov r2, r8 │ │ movs r3, #1 │ │ ldr r1, [r0, #28] │ │ movs r0, #1 │ │ str r0, [sp, #20] │ │ mov r0, fp │ │ - bl 52d10 │ │ + bl 52f20 │ │ movs r0, #4 │ │ str r0, [sp, #84] @ 0x54 │ │ mov r0, r8 │ │ ldr.w r8, [sp, #132] @ 0x84 │ │ str r0, [sp, #44] @ 0x2c │ │ - blx d87c0 │ │ - b.n 4ce12 │ │ + blx d87d0 │ │ + b.n 4d11a │ │ add.w r0, r4, r4, lsl #1 │ │ ldr r1, [sp, #104] @ 0x68 │ │ movs r4, #1 │ │ movs r7, #4 │ │ lsls r0, r0, #3 │ │ sub.w r6, r0, #24 │ │ mov sl, r5 │ │ vmov.f32 s26, s16 │ │ ldrb.w r0, [sl], #24 │ │ - cbz r0, 4ccba │ │ + cbz r0, 4cfc2 │ │ cmp r0, #2 │ │ - bne.w 4d1ac │ │ + bne.w 4d4b4 │ │ ldr r0, [r5, #8] │ │ cmp r0, #2 │ │ - beq.n 4cc92 │ │ + beq.n 4cf9a │ │ cmp r0, #1 │ │ - bne.n 4cc98 │ │ + bne.n 4cfa0 │ │ ldrd r0, r1, [r5, #16] │ │ - bl d523a │ │ - b.n 4cca0 │ │ + bl d534a │ │ + b.n 4cfa8 │ │ vldr d16, [r5, #16] │ │ - b.n 4cca6 │ │ + b.n 4cfae │ │ ldrd r0, r1, [r5, #16] │ │ - bl d52e8 │ │ + bl d50e8 │ │ vmov d16, r0, r1 │ │ ldr r1, [sp, #104] @ 0x68 │ │ vabs.f64 d17, d16 │ │ vcmp.f64 d17, d9 │ │ vmrs APSR_nzcv, fpscr │ │ - bhi.w 4d1ac │ │ + bhi.w 4d4b4 │ │ vcvt.f32.f64 s26, d16 │ │ ldr r0, [sp, #172] @ 0xac │ │ cmp r4, r0 │ │ - beq.n 4ccd6 │ │ + beq.n 4cfde │ │ add.w r0, r8, r7 │ │ adds r4, #1 │ │ adds r7, #4 │ │ subs r6, #24 │ │ mov r5, sl │ │ vstr s26, [r0] │ │ str r4, [sp, #180] @ 0xb4 │ │ - bne.n 4cc6e │ │ - b.n 4ccee │ │ + bne.n 4cf76 │ │ + b.n 4cff6 │ │ movs r0, #4 │ │ mov r1, r4 │ │ str r0, [sp, #0] │ │ add r0, sp, #172 @ 0xac │ │ movs r2, #1 │ │ movs r3, #4 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [sp, #104] @ 0x68 │ │ ldr.w r8, [sp, #176] @ 0xb0 │ │ - b.n 4ccc0 │ │ + b.n 4cfc8 │ │ ldr r1, [sp, #136] @ 0x88 │ │ mov r3, r4 │ │ ldrd r5, r0, [sp, #172] @ 0xac │ │ ldr r1, [r1, #28] │ │ subs.w r2, r5, #2147483648 @ 0x80000000 │ │ str r0, [sp, #44] @ 0x2c │ │ it ne │ │ movne r2, r0 │ │ mov r0, fp │ │ - bl 52d10 │ │ + bl 52f20 │ │ lsls r0, r5, #1 │ │ str r5, [sp, #84] @ 0x54 │ │ - bne.w 4cedc │ │ + bne.w 4d1e4 │ │ str r4, [sp, #20] │ │ - b.n 4ce0e │ │ + b.n 4d116 │ │ vldr d13, [r0, #16] │ │ - b.n 4cd26 │ │ + b.n 4d02e │ │ ldrd r0, r1, [r0, #16] │ │ - bl d52e8 │ │ + bl d50e8 │ │ vmov d13, r0, r1 │ │ movs r0, #32 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 4d3d2 │ │ + beq.w 4d6da │ │ mov r8, r0 │ │ vstr d13, [r0] │ │ movs r0, #1 │ │ cmp r4, #1 │ │ strd r8, r0, [sp, #176] @ 0xb0 │ │ mov.w r0, #4 │ │ str r0, [sp, #172] @ 0xac │ │ - bne.n 4cd6c │ │ + bne.n 4d074 │ │ ldr r0, [sp, #136] @ 0x88 │ │ mov r2, r8 │ │ movs r3, #1 │ │ ldr r1, [r0, #28] │ │ movs r0, #1 │ │ str r0, [sp, #12] │ │ mov r0, fp │ │ - bl 52f90 │ │ + bl 531a0 │ │ movs r0, #4 │ │ str r0, [sp, #92] @ 0x5c │ │ mov r0, r8 │ │ ldr.w r8, [sp, #132] @ 0x84 │ │ str r0, [sp, #56] @ 0x38 │ │ - blx d87c0 │ │ - b.n 4ce12 │ │ + blx d87d0 │ │ + b.n 4d11a │ │ add.w r0, r4, r4, lsl #1 │ │ ldr r1, [sp, #104] @ 0x68 │ │ movs r6, #1 │ │ movs r4, #8 │ │ lsls r0, r0, #3 │ │ sub.w r7, r0, #24 │ │ mov sl, r5 │ │ - b.n 4cd9e │ │ + b.n 4d0a6 │ │ vldr d13, [r5, #16] │ │ ldr r0, [sp, #172] @ 0xac │ │ cmp r6, r0 │ │ - beq.n 4cdd4 │ │ + beq.n 4d0dc │ │ add.w r0, r8, r4 │ │ adds r6, #1 │ │ adds r4, #8 │ │ subs r7, #24 │ │ mov r5, sl │ │ vstr d13, [r0] │ │ str r6, [sp, #180] @ 0xb4 │ │ - beq.n 4cdec │ │ + beq.n 4d0f4 │ │ vmov.f64 d13, d10 │ │ ldrb.w r0, [sl], #24 │ │ cmp r0, #0 │ │ - beq.n 4cd84 │ │ + beq.n 4d08c │ │ cmp r0, #2 │ │ - bne.w 4d1fa │ │ + bne.w 4d502 │ │ ldr r0, [r5, #8] │ │ cmp r0, #2 │ │ - beq.n 4cd80 │ │ + beq.n 4d088 │ │ cmp r0, #1 │ │ - bne.n 4cdc4 │ │ + bne.n 4d0cc │ │ ldrd r0, r1, [r5, #16] │ │ - bl d523a │ │ - b.n 4cdcc │ │ + bl d534a │ │ + b.n 4d0d4 │ │ ldrd r0, r1, [r5, #16] │ │ - bl d52e8 │ │ + bl d50e8 │ │ vmov d13, r0, r1 │ │ ldr r1, [sp, #104] @ 0x68 │ │ - b.n 4cd84 │ │ + b.n 4d08c │ │ movs r0, #8 │ │ mov r1, r6 │ │ str r0, [sp, #0] │ │ add r0, sp, #172 @ 0xac │ │ movs r2, #1 │ │ movs r3, #8 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [sp, #104] @ 0x68 │ │ ldr.w r8, [sp, #176] @ 0xb0 │ │ - b.n 4cd8a │ │ + b.n 4d092 │ │ ldr r1, [sp, #136] @ 0x88 │ │ mov r3, r6 │ │ ldrd r4, r0, [sp, #172] @ 0xac │ │ ldr r1, [r1, #28] │ │ subs.w r2, r4, #2147483648 @ 0x80000000 │ │ str r0, [sp, #56] @ 0x38 │ │ it ne │ │ movne r2, r0 │ │ mov r0, fp │ │ - bl 52f90 │ │ + bl 531a0 │ │ lsls r0, r4, #1 │ │ str r4, [sp, #92] @ 0x5c │ │ - bne.n 4ce20 │ │ + bne.n 4d128 │ │ str r6, [sp, #12] │ │ ldr.w r8, [sp, #132] @ 0x84 │ │ ldr r0, [sp, #120] @ 0x78 │ │ cmp r8, r0 │ │ - bne.w 4bc04 │ │ - b.n 4d146 │ │ + bne.w 4bf0c │ │ + b.n 4d44e │ │ mov fp, r0 │ │ - b.n 4ce40 │ │ + b.n 4d148 │ │ str r6, [sp, #12] │ │ ldr.w r8, [sp, #132] @ 0x84 │ │ ldr r0, [sp, #56] @ 0x38 │ │ - b.n 4cd64 │ │ + b.n 4d06c │ │ movs r0, #12 │ │ ldrd fp, r9, [sp, #160] @ 0xa0 │ │ movt r0, #32768 @ 0x8000 │ │ adds r0, #5 │ │ cmp r4, r0 │ │ - beq.n 4ce40 │ │ - b.n 4d330 │ │ + beq.n 4d148 │ │ + b.n 4d638 │ │ ldrd fp, r9, [sp, #160] @ 0xa0 │ │ add.w r0, sl, sl, lsl #1 │ │ movs r1, #4 │ │ ldr r5, [sp, #280] @ 0x118 │ │ lsls r6, r0, #2 │ │ ldr.w r8, [sp, #132] @ 0x84 │ │ mov r0, r6 │ │ - bl 4191c │ │ + bl 41c24 │ │ cmp r0, #0 │ │ - beq.w 4d3fa │ │ + beq.w 4d702 │ │ mov r4, r0 │ │ add.w r0, r9, #8 │ │ adds r1, r4, #4 │ │ mov r3, sl │ │ - b.n 4ce76 │ │ + b.n 4d17e │ │ movs r7, #0 │ │ str.w r7, [r1, #-4] │ │ adds r0, #16 │ │ strd r2, r6, [r1], #12 │ │ subs r3, #1 │ │ - beq.n 4ce90 │ │ + beq.n 4d198 │ │ ldr.w r2, [r0, #-8] │ │ cmp.w r2, #2147483648 @ 0x80000000 │ │ - beq.n 4ce66 │ │ + beq.n 4d16e │ │ ldr r2, [r0, #0] │ │ cmp r2, #1 │ │ - bls.w 4d398 │ │ + bls.w 4d6a0 │ │ ldr.w r7, [r0, #-4] │ │ ldrh r6, [r7, #0] │ │ - b.n 4ce68 │ │ + b.n 4d170 │ │ ldr r0, [sp, #136] @ 0x88 │ │ mov r2, r4 │ │ mov r3, sl │ │ ldr r1, [r0, #28] │ │ mov r0, r5 │ │ - bl 5372c │ │ + bl 5393c │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add.w r4, r9, #4 │ │ - b.n 4ceb2 │ │ + b.n 4d1ba │ │ adds r4, #16 │ │ subs.w sl, sl, #1 │ │ - beq.n 4cec2 │ │ + beq.n 4d1ca │ │ ldr.w r0, [r4, #-4] │ │ lsls r0, r0, #1 │ │ - beq.n 4ceaa │ │ + beq.n 4d1b2 │ │ ldr r0, [r4, #0] │ │ - blx d87c0 │ │ - b.n 4ceaa │ │ + blx d87d0 │ │ + b.n 4d1b2 │ │ cmp.w fp, #0 │ │ - beq.n 4ce12 │ │ + beq.n 4d11a │ │ mov r0, r9 │ │ - blx d87c0 │ │ - b.n 4ce12 │ │ + blx d87d0 │ │ + b.n 4d11a │ │ str r4, [sp, #32] │ │ ldr.w r8, [sp, #132] @ 0x84 │ │ ldr r0, [sp, #52] @ 0x34 │ │ - b.w 4c734 │ │ + b.w 4ca3c │ │ str r4, [sp, #20] │ │ ldr.w r8, [sp, #132] @ 0x84 │ │ ldr r0, [sp, #44] @ 0x2c │ │ - b.n 4cc54 │ │ + b.n 4cf5c │ │ str r4, [sp, #16] │ │ ldr.w r8, [sp, #132] @ 0x84 │ │ ldr r0, [sp, #48] @ 0x30 │ │ - b.n 4c942 │ │ + b.n 4cc4a │ │ str r4, [sp, #28] │ │ ldr.w r8, [sp, #132] @ 0x84 │ │ ldr r0, [sp, #40] @ 0x28 │ │ - b.n 4ca22 │ │ + b.n 4cd2a │ │ str r6, [sp, #24] │ │ ldr.w r8, [sp, #132] @ 0x84 │ │ ldr r0, [sp, #36] @ 0x24 │ │ - b.n 4caf8 │ │ + b.n 4ce00 │ │ movs r0, #1 │ │ mov r1, r5 │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ mov r2, r6 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w r5, [fp, #8] │ │ ldr.w r7, [fp, #4] │ │ cmp r6, #2 │ │ add.w r0, r7, r5 │ │ - bcs.w 4c1c6 │ │ - b.w 4c1d2 │ │ + bcs.w 4c4ce │ │ + b.w 4c4da │ │ movs r0, #1 │ │ mov r1, r6 │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ mov r2, r7 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w r6, [fp, #8] │ │ ldr.w r5, [fp, #4] │ │ cmp r7, #2 │ │ add.w r0, r5, r6 │ │ - bcs.w 4c2ce │ │ - b.w 4c2da │ │ + bcs.w 4c5d6 │ │ + b.w 4c5e2 │ │ movs r0, #1 │ │ mov r1, r5 │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ mov r2, r8 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w r5, [fp, #8] │ │ ldr.w r7, [fp, #4] │ │ cmp.w r8, #2 │ │ add.w r0, r7, r5 │ │ - bcs.w 4c682 │ │ - b.w 4c690 │ │ + bcs.w 4c98a │ │ + b.w 4c998 │ │ movs r0, #1 │ │ mov r1, r5 │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ mov r2, r9 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w r5, [fp, #8] │ │ ldr.w r7, [fp, #4] │ │ cmp.w r9, #2 │ │ add.w r0, r7, r5 │ │ - bcs.w 4c408 │ │ - b.w 4c416 │ │ + bcs.w 4c710 │ │ + b.w 4c71e │ │ movs r0, #1 │ │ mov r1, r5 │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ mov r2, r7 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w r5, [fp, #8] │ │ ldr.w r6, [fp, #4] │ │ cmp r7, #2 │ │ add.w r0, r6, r5 │ │ - bcs.w 4c618 │ │ - b.w 4c624 │ │ + bcs.w 4c920 │ │ + b.w 4c92c │ │ movs r0, #1 │ │ mov r1, r5 │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ mov r2, r7 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w r5, [fp, #8] │ │ ldr.w r4, [fp, #4] │ │ cmp r7, #2 │ │ add.w r0, r4, r5 │ │ - bcs.w 4c482 │ │ - b.w 4c48e │ │ + bcs.w 4c78a │ │ + b.w 4c796 │ │ movs r0, #1 │ │ mov r1, r6 │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ mov r2, r7 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w r6, [fp, #8] │ │ ldr.w r4, [fp, #4] │ │ cmp r7, #2 │ │ add.w r0, r4, r6 │ │ - bcs.w 4c4f8 │ │ - b.w 4c504 │ │ + bcs.w 4c800 │ │ + b.w 4c80c │ │ movs r0, #1 │ │ mov r1, r5 │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ mov r2, r6 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w r5, [fp, #8] │ │ ldr.w r7, [fp, #4] │ │ cmp r6, #2 │ │ add.w r0, r7, r5 │ │ - bcs.w 4bd54 │ │ - b.w 4bd60 │ │ + bcs.w 4c05c │ │ + b.w 4c068 │ │ movs r0, #1 │ │ mov r1, r5 │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ mov r2, r6 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w r5, [fp, #8] │ │ ldr.w r7, [fp, #4] │ │ cmp r6, #2 │ │ add.w r0, r7, r5 │ │ - bcs.w 4bde6 │ │ - b.w 4bdf2 │ │ + bcs.w 4c0ee │ │ + b.w 4c0fa │ │ movs r0, #1 │ │ mov r1, r5 │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ mov r2, r6 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w r5, [fp, #8] │ │ ldr.w r7, [fp, #4] │ │ cmp r6, #2 │ │ add.w r0, r7, r5 │ │ - bcs.w 4be54 │ │ - b.w 4be60 │ │ + bcs.w 4c15c │ │ + b.w 4c168 │ │ movs r0, #1 │ │ mov r1, r5 │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ mov r2, r6 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w r5, [fp, #8] │ │ ldr.w r7, [fp, #4] │ │ cmp r6, #2 │ │ add.w r0, r7, r5 │ │ - bcs.w 4c074 │ │ - b.w 4c080 │ │ + bcs.w 4c37c │ │ + b.w 4c388 │ │ movs r0, #1 │ │ mov r1, r5 │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ mov r2, r6 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w r5, [fp, #8] │ │ ldr.w r7, [fp, #4] │ │ cmp r6, #2 │ │ add.w r0, r7, r5 │ │ - bcs.w 4c0f8 │ │ - b.w 4c104 │ │ + bcs.w 4c400 │ │ + b.w 4c40c │ │ movs r0, #1 │ │ mov r1, r5 │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ mov r2, r6 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w r5, [fp, #8] │ │ ldr.w r7, [fp, #4] │ │ cmp r6, #2 │ │ add.w r0, r7, r5 │ │ - bcs.w 4c166 │ │ - b.w 4c172 │ │ + bcs.w 4c46e │ │ + b.w 4c47a │ │ movs r0, #1 │ │ mov r6, r1 │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ mov r1, r4 │ │ mov r2, r5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w r4, [fp, #8] │ │ mov r1, r6 │ │ ldr.w r6, [fp, #4] │ │ cmp r5, #2 │ │ add.w r0, r6, r4 │ │ - bcs.w 4bfb6 │ │ - b.w 4bfc6 │ │ + bcs.w 4c2be │ │ + b.w 4c2ce │ │ str r2, [r0, #0] │ │ add sp, #192 @ 0xc0 │ │ vpop {d8-d13} │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add.w r5, r8, #32 │ │ lsls r4, r0, #3 │ │ ldrb r2, [r5, #0] │ │ mov r0, r6 │ │ ldr.w r1, [r5, #-4] │ │ - bl 52638 │ │ + bl 52848 │ │ adds r5, #40 @ 0x28 │ │ subs r4, #40 @ 0x28 │ │ - bne.n 4d134 │ │ + bne.n 4d43c │ │ ldr r1, [sp, #104] @ 0x68 │ │ movs r0, #12 │ │ movt r0, #32768 @ 0x8000 │ │ adds r0, #5 │ │ str r0, [r1, #0] │ │ add sp, #192 @ 0xc0 │ │ vpop {d8-d13} │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r3, [pc, #688] @ (4d410 ) │ │ + ldr r3, [pc, #688] @ (4d718 ) │ │ mov r0, r4 │ │ add r3, pc │ │ mov r1, r6 │ │ mov r2, r5 │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ ldr r0, [sp, #172] @ 0xac │ │ - cbz r0, 4d178 │ │ + cbz r0, 4d480 │ │ ldr r0, [sp, #176] @ 0xb0 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r1, [sp, #104] @ 0x68 │ │ movs r0, #12 │ │ movt r0, #32768 @ 0x8000 │ │ str r0, [r1, #0] │ │ ldr r0, [sp, #76] @ 0x4c │ │ str r0, [r1, #4] │ │ ldr r0, [sp, #36] @ 0x24 │ │ str r0, [r1, #8] │ │ ldr r0, [sp, #24] │ │ - b.n 4d296 │ │ + b.n 4d59e │ │ ldr r0, [sp, #172] @ 0xac │ │ - cbz r0, 4d198 │ │ + cbz r0, 4d4a0 │ │ ldr r0, [sp, #176] @ 0xb0 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r1, [sp, #104] @ 0x68 │ │ movs r0, #12 │ │ movt r0, #32768 @ 0x8000 │ │ str r0, [r1, #0] │ │ ldr r0, [sp, #80] @ 0x50 │ │ str r0, [r1, #4] │ │ ldr r0, [sp, #40] @ 0x28 │ │ str r0, [r1, #8] │ │ ldr r0, [sp, #28] │ │ - b.n 4d296 │ │ + b.n 4d59e │ │ ldr r0, [sp, #172] @ 0xac │ │ - cbz r0, 4d1b8 │ │ + cbz r0, 4d4c0 │ │ ldr r0, [sp, #176] @ 0xb0 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r1, [sp, #104] @ 0x68 │ │ movs r0, #12 │ │ movt r0, #32768 @ 0x8000 │ │ str r0, [r1, #0] │ │ ldr r0, [sp, #84] @ 0x54 │ │ str r0, [r1, #4] │ │ ldr r0, [sp, #44] @ 0x2c │ │ str r0, [r1, #8] │ │ ldr r0, [sp, #20] │ │ - b.n 4d296 │ │ + b.n 4d59e │ │ ldr r0, [sp, #172] @ 0xac │ │ - cbz r0, 4d1d8 │ │ + cbz r0, 4d4e0 │ │ ldr r0, [sp, #176] @ 0xb0 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r1, [sp, #104] @ 0x68 │ │ movs r0, #12 │ │ movt r0, #32768 @ 0x8000 │ │ str r0, [r1, #0] │ │ ldr r0, [sp, #88] @ 0x58 │ │ str r0, [r1, #4] │ │ ldr r0, [sp, #48] @ 0x30 │ │ str r0, [r1, #8] │ │ ldr r0, [sp, #16] │ │ - b.n 4d296 │ │ + b.n 4d59e │ │ ldr r0, [sp, #172] @ 0xac │ │ - cbz r0, 4d1f6 │ │ + cbz r0, 4d4fe │ │ ldr r0, [sp, #176] @ 0xb0 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #104] @ 0x68 │ │ - b.n 4d2cc │ │ + b.n 4d5d4 │ │ ldr r0, [sp, #172] @ 0xac │ │ - cbz r0, 4d206 │ │ + cbz r0, 4d50e │ │ ldr r0, [sp, #176] @ 0xb0 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r1, [sp, #104] @ 0x68 │ │ movs r0, #12 │ │ movt r0, #32768 @ 0x8000 │ │ str r0, [r1, #0] │ │ ldr r0, [sp, #92] @ 0x5c │ │ str r0, [r1, #4] │ │ ldr r0, [sp, #56] @ 0x38 │ │ str r0, [r1, #8] │ │ ldr r0, [sp, #12] │ │ - b.n 4d296 │ │ + b.n 4d59e │ │ ldr r0, [sp, #104] @ 0x68 │ │ movs r1, #12 │ │ ldr r2, [sp, #64] @ 0x40 │ │ movt r1, #32768 @ 0x8000 │ │ strd r1, r2, [r0] │ │ add sp, #192 @ 0xc0 │ │ vpop {d8-d13} │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r0, [sp, #104] @ 0x68 │ │ ldr r1, [sp, #68] @ 0x44 │ │ - b.n 4d2ca │ │ + b.n 4d5d2 │ │ ldr r0, [sp, #104] @ 0x68 │ │ movs r1, #12 │ │ ldr r2, [sp, #60] @ 0x3c │ │ movt r1, #32768 @ 0x8000 │ │ str r1, [r0, #0] │ │ ldr r1, [sp, #96] @ 0x60 │ │ strd r1, r2, [r0, #8] │ │ add sp, #192 @ 0xc0 │ │ vpop {d8-d13} │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r0, [sp, #104] @ 0x68 │ │ vstr s22, [r0, #4] │ │ - b.n 4d2cc │ │ + b.n 4d5d4 │ │ ldr r1, [sp, #104] @ 0x68 │ │ ldr r0, [sp, #188] @ 0xbc │ │ strd r5, r4, [r1] │ │ strd r3, r0, [r1, #8] │ │ add sp, #192 @ 0xc0 │ │ vpop {d8-d13} │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r0, [sp, #172] @ 0xac │ │ - cbz r0, 4d284 │ │ + cbz r0, 4d58c │ │ ldr r0, [sp, #176] @ 0xb0 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r1, [sp, #104] @ 0x68 │ │ movs r0, #12 │ │ movt r0, #32768 @ 0x8000 │ │ str r0, [r1, #0] │ │ ldr r0, [sp, #72] @ 0x48 │ │ str r0, [r1, #4] │ │ ldr r0, [sp, #52] @ 0x34 │ │ @@ -55505,190 +55698,190 @@ │ │ ldr r0, [sp, #104] @ 0x68 │ │ strd r4, r8, [r0] │ │ strd r5, r6, [r0, #8] │ │ add sp, #192 @ 0xc0 │ │ vpop {d8-d13} │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #280] @ (4d430 ) │ │ + ldr r0, [pc, #280] @ (4d738 ) │ │ movs r1, #37 @ 0x25 │ │ - ldr r2, [pc, #280] @ (4d434 ) │ │ + ldr r2, [pc, #280] @ (4d73c ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r3, [pc, #248] @ (4d41c ) │ │ + bl 3fd54 │ │ + ldr r3, [pc, #248] @ (4d724 ) │ │ mov r0, r4 │ │ mov r1, r5 │ │ mov r2, r5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ ldrd r5, r6, [sp, #184] @ 0xb8 │ │ add.w r7, r9, #4 │ │ - b.n 4d342 │ │ + b.n 4d64a │ │ adds r7, #16 │ │ subs.w sl, sl, #1 │ │ - beq.n 4d352 │ │ + beq.n 4d65a │ │ ldr.w r0, [r7, #-4] │ │ lsls r0, r0, #1 │ │ - beq.n 4d33a │ │ + beq.n 4d642 │ │ ldr r0, [r7, #0] │ │ - blx d87c0 │ │ - b.n 4d33a │ │ + blx d87d0 │ │ + b.n 4d642 │ │ cmp.w fp, #0 │ │ - beq.n 4d2fe │ │ + beq.n 4d606 │ │ mov r0, r9 │ │ - blx d87c0 │ │ - b.n 4d2fe │ │ - ldr r3, [pc, #160] @ (4d404 ) │ │ + blx d87d0 │ │ + b.n 4d606 │ │ + ldr r3, [pc, #160] @ (4d70c ) │ │ mov r0, r4 │ │ add r3, pc │ │ mov r1, r8 │ │ mov r2, r6 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #156] @ (4d40c ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #156] @ (4d714 ) │ │ mov r0, r8 │ │ mov r1, r4 │ │ mov r2, r5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #148] @ (4d414 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #148] @ (4d71c ) │ │ mov r0, r9 │ │ add r3, pc │ │ mov r1, r8 │ │ mov r2, r6 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #124] @ (4d408 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #124] @ (4d710 ) │ │ mov r0, r9 │ │ add r3, pc │ │ mov r1, r6 │ │ mov r2, r5 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #144] @ (4d42c ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #144] @ (4d734 ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #112] @ (4d418 ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #112] @ (4d720 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r3, [pc, #116] @ (4d424 ) │ │ + bl 3fd40 │ │ + ldr r3, [pc, #116] @ (4d72c ) │ │ mov r0, r1 │ │ mov r1, r4 │ │ mov r2, r4 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r4, [pc, #108] @ (4d428 ) │ │ + bl 3fcb0 │ │ + ldr r4, [pc, #108] @ (4d730 ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ mov r2, r3 │ │ add r4, pc │ │ mov r3, r4 │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #84] @ (4d420 ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #84] @ (4d728 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ movs r0, #8 │ │ movs r1, #32 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #4 │ │ movs r1, #16 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #8 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #4 │ │ movs r1, #32 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #4 │ │ movs r1, #64 @ 0x40 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #4 │ │ mov r1, r6 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - bgt.n 4d3b8 │ │ + bls.n 4d6d0 │ │ movs r0, r1 │ │ - bgt.n 4d368 │ │ + bls.n 4d680 │ │ movs r0, r1 │ │ - bgt.n 4d39c │ │ + bls.n 4d6b4 │ │ movs r0, r1 │ │ - udf #218 @ 0xda │ │ + blt.n 4d6e0 │ │ movs r0, r1 │ │ - bgt.n 4d390 │ │ + bls.n 4d6a8 │ │ movs r0, r1 │ │ - bgt.n 4d3c8 │ │ + bls.n 4d6e0 │ │ movs r0, r1 │ │ - ble.n 4d464 │ │ + bge.n 4d77c │ │ movs r0, r1 │ │ - bgt.n 4d3a4 │ │ + bls.n 4d6bc │ │ movs r0, r1 │ │ - bgt.n 4d358 │ │ + bls.n 4d670 │ │ movs r0, r1 │ │ - bvs.n 4d500 │ │ + bcc.n 4d818 │ │ movs r0, r1 │ │ - bvs.n 4d34c │ │ + bcc.n 4d664 │ │ movs r0, r1 │ │ - str r2, [sp, #832] @ 0x340 │ │ - vqabs.s d29, d0 │ │ + ldrh r0, [r1, #62] @ 0x3e │ │ + vcls.s d29, d8 │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #212 @ 0xd4 │ │ mov r8, r0 │ │ ldr r0, [sp, #264] @ 0x108 │ │ str r2, [sp, #60] @ 0x3c │ │ ldrd r9, r5, [r0] │ │ cmp.w r5, #33554432 @ 0x2000000 │ │ str r3, [sp, #76] @ 0x4c │ │ - bls.n 4d480 │ │ + bls.n 4d788 │ │ movs r0, #26 │ │ movs r5, #26 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 4dcee │ │ - ldr r1, [pc, #828] @ (4d79c ) │ │ + beq.w 4dff6 │ │ + ldr r1, [pc, #828] @ (4daa4 ) │ │ movs r2, #26 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #17 │ │ strd r4, r5, [r8, #8] │ │ movt r0, #32768 @ 0x8000 │ │ subs r0, #7 │ │ strd r0, r5, [r8] │ │ add sp, #212 @ 0xd4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r0, [sp, #248] @ 0xf8 │ │ movw fp, #17 │ │ mov r6, r1 │ │ movt fp, #32768 @ 0x8000 │ │ lsls r0, r0, #31 │ │ - beq.n 4d4c2 │ │ + beq.n 4d7ca │ │ ldr r2, [sp, #60] @ 0x3c │ │ add r0, sp, #136 @ 0x88 │ │ ldrd r7, r4, [sp, #256] @ 0x100 │ │ mov r1, r6 │ │ str r3, [sp, #0] │ │ movs r3, #0 │ │ strd r7, r4, [sp, #8] │ │ - bl 4e084 │ │ + bl 4e294 │ │ ldr r0, [sp, #136] @ 0x88 │ │ cmp r0, fp │ │ - bne.n 4d4e0 │ │ + bne.n 4d7e8 │ │ ldrd r0, r1, [r6, #56] @ 0x38 │ │ strd r9, r5, [sp, #36] @ 0x24 │ │ subs r0, r0, r7 │ │ sbcs.w r0, r1, r4 │ │ it lt │ │ strdlt r7, r4, [r6, #56] @ 0x38 │ │ - b.n 4d516 │ │ + b.n 4d81e │ │ ldrd r1, r0, [r6, #56] @ 0x38 │ │ mvn.w r2, #2147483648 @ 0x80000000 │ │ eors r2, r0 │ │ orn r2, r2, r1 │ │ - cbnz r2, 4d508 │ │ + cbnz r2, 4d810 │ │ sub.w r0, fp, #11 │ │ str.w r0, [r8] │ │ add sp, #212 @ 0xd4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr.w r1, [sp, #145] @ 0x91 │ │ ldrb.w r3, [sp, #140] @ 0x8c │ │ ldr.w r7, [sp, #141] @ 0x8d │ │ @@ -55704,57 +55897,57 @@ │ │ strd r9, r5, [sp, #36] @ 0x24 │ │ adc.w r4, r0, #0 │ │ strd r7, r4, [r6, #56] @ 0x38 │ │ ldr r0, [r6, #96] @ 0x60 │ │ ldr r5, [sp, #60] @ 0x3c │ │ cmp r0, #0 │ │ strd r6, r7, [sp, #52] @ 0x34 │ │ - beq.w 4db94 │ │ + beq.w 4de9c │ │ ldr.w r9, [r6, #92] @ 0x5c │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r0, r9, r0, lsl #4 │ │ str r0, [sp, #64] @ 0x40 │ │ add r0, sp, #136 @ 0x88 │ │ adds r1, r0, #5 │ │ adds r0, #9 │ │ str r1, [sp, #28] │ │ add r1, sp, #112 @ 0x70 │ │ adds r1, #9 │ │ str r1, [sp, #48] @ 0x30 │ │ strd r4, r0, [sp, #68] @ 0x44 │ │ - b.n 4d56a │ │ + b.n 4d872 │ │ ldrd r0, r1, [sp, #176] @ 0xb0 │ │ cmp sl, fp │ │ ldr.w r2, [sp, #183] @ 0xb7 │ │ strd r0, r1, [sp, #80] @ 0x50 │ │ str.w r2, [sp, #87] @ 0x57 │ │ - bne.w 4dc6e │ │ + bne.w 4df76 │ │ ldr r4, [sp, #68] @ 0x44 │ │ add.w r9, r9, #48 @ 0x30 │ │ ldr r0, [sp, #64] @ 0x40 │ │ cmp r9, r0 │ │ - beq.w 4db94 │ │ + beq.w 4de9c │ │ add r0, sp, #76 @ 0x4c │ │ strd r0, r7, [sp, #100] @ 0x64 │ │ strd r6, r5, [sp, #92] @ 0x5c │ │ add r0, sp, #136 @ 0x88 │ │ str r4, [sp, #108] @ 0x6c │ │ mov r1, r5 │ │ ldr.w r2, [r9] │ │ - bl 49d00 │ │ + bl 4a008 │ │ ldr r0, [sp, #72] @ 0x48 │ │ ldrb.w r4, [sp, #144] @ 0x90 │ │ ldr r1, [r0, #0] │ │ ldr r2, [r0, #4] │ │ ldr.w r3, [r0, #7] │ │ ldrd r0, sl, [sp, #136] @ 0x88 │ │ strd r1, r2, [sp, #176] @ 0xb0 │ │ cmp r0, #2 │ │ str.w r3, [sp, #183] @ 0xb7 │ │ - beq.n 4d546 │ │ + beq.n 4d84e │ │ ldr r6, [sp, #48] @ 0x30 │ │ ldrd r2, r3, [sp, #176] @ 0xb0 │ │ ldr r1, [sp, #156] @ 0x9c │ │ strd r0, sl, [sp, #112] @ 0x70 │ │ add r0, sp, #92 @ 0x5c │ │ str r0, [sp, #188] @ 0xbc │ │ add r0, sp, #104 @ 0x68 │ │ @@ -55765,1158 +55958,1061 @@ │ │ ldr.w r7, [sp, #183] @ 0xb7 │ │ str r0, [sp, #184] @ 0xb8 │ │ add r0, sp, #112 @ 0x70 │ │ str r3, [r6, #4] │ │ str.w r7, [r6, #7] │ │ strb.w r4, [sp, #120] @ 0x78 │ │ strd r9, r0, [sp, #176] @ 0xb0 │ │ - beq.w 4dc90 │ │ + beq.w 4df98 │ │ ldrb.w r4, [r1, #32] │ │ cmp r4, #8 │ │ - bcc.n 4d5e6 │ │ + bcc.n 4d8ee │ │ ldrb.w r6, [r1, #41] @ 0x29 │ │ cmp r6, #1 │ │ - bne.n 4d62a │ │ + bne.n 4d932 │ │ ldr r3, [sp, #264] @ 0x108 │ │ add r0, sp, #200 @ 0xc8 │ │ - bl 4e950 │ │ + bl 4eb60 │ │ ldrd r7, r3, [sp, #204] @ 0xcc │ │ add r0, sp, #136 @ 0x88 │ │ add r1, sp, #176 @ 0xb0 │ │ mov r2, r7 │ │ - bl 4ec9c │ │ + bl 4eeac │ │ ldr.w sl, [sp, #136] @ 0x88 │ │ cmp sl, fp │ │ - bne.w 4dc2c │ │ + bne.w 4df34 │ │ ldr r0, [sp, #200] @ 0xc8 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r7 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r6, r7, [sp, #52] @ 0x34 │ │ add r0, sp, #112 @ 0x70 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #112] @ 0x70 │ │ cmp r0, #0 │ │ - beq.n 4d55c │ │ + beq.n 4d864 │ │ ldr r0, [sp, #116] @ 0x74 │ │ - blx 9ca04 │ │ - b.n 4d55c │ │ + blx 9ca10 │ │ + b.n 4d864 │ │ cmp r2, #1 │ │ str r2, [sp, #196] @ 0xc4 │ │ - bne.w 4dc98 │ │ + bne.w 4dfa0 │ │ movs r0, #1 │ │ ldr r7, [r1, #28] │ │ str r0, [sp, #204] @ 0xcc │ │ movs r0, #0 │ │ str r0, [sp, #200] @ 0xc8 │ │ mov r5, r1 │ │ ldr r0, [sp, #264] @ 0x108 │ │ mov r1, r7 │ │ mov r2, r4 │ │ - bl 49978 │ │ - cbz r0, 4d65a │ │ + bl 49c80 │ │ + cbz r0, 4d962 │ │ movw fp, #17 │ │ ldrd r6, r7, [sp, #52] @ 0x34 │ │ movt fp, #32768 @ 0x8000 │ │ ldr r5, [sp, #60] @ 0x3c │ │ - b.n 4d616 │ │ + b.n 4d91e │ │ sub.w r0, r4, #8 │ │ cmp r0, #6 │ │ - bhi.w 4dcb8 │ │ + bhi.w 4dfc0 │ │ tbh [pc, r0, lsl #1] │ │ movs r7, r0 │ │ movs r7, r0 │ │ lsls r4, r3, #2 │ │ lsls r3, r0, #1 │ │ lsls r5, r6, #6 │ │ lsls r3, r4, #3 │ │ lsls r0, r1, #5 │ │ ldr r1, [sp, #264] @ 0x108 │ │ add r0, sp, #136 @ 0x88 │ │ mov r2, r7 │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r0, [sp, #136] @ 0x88 │ │ cmp r0, #1 │ │ - bne.w 4dcf6 │ │ + bne.w 4dffe │ │ ldrd r0, r6, [sp, #140] @ 0x8c │ │ adds r1, r6, r0 │ │ - bcs.w 4dca6 │ │ + bcs.w 4dfae │ │ ldr r2, [sp, #40] @ 0x28 │ │ cmp r1, r2 │ │ - bhi.w 4dca6 │ │ + bhi.w 4dfae │ │ cmp r6, #0 │ │ - beq.w 4da90 │ │ + beq.w 4dd98 │ │ ldr r1, [sp, #36] @ 0x24 │ │ movs r7, #1 │ │ adds r5, r1, r0 │ │ ldrb.w r4, [r5], #1 │ │ movs r1, #0 │ │ ldr r0, [sp, #200] @ 0xc8 │ │ str r1, [sp, #208] @ 0xd0 │ │ - cbz r0, 4d6e4 │ │ + cbz r0, 4d9ec │ │ movs r0, #1 │ │ strb r4, [r7, #0] │ │ str r0, [sp, #208] @ 0xd0 │ │ add r0, sp, #136 @ 0x88 │ │ add r1, sp, #176 @ 0xb0 │ │ mov r2, r7 │ │ movs r3, #1 │ │ - bl 4ec9c │ │ + bl 4eeac │ │ ldrb.w r4, [sp, #140] @ 0x8c │ │ movs r0, #17 │ │ ldr.w sl, [sp, #136] @ 0x88 │ │ movt r0, #32768 @ 0x8000 │ │ cmp sl, r0 │ │ - bne.w 4dac0 │ │ + bne.w 4ddc8 │ │ lsls r0, r4, #31 │ │ - beq.w 4db04 │ │ + beq.w 4de0c │ │ subs r6, #1 │ │ - bne.n 4d6a6 │ │ - b.n 4da90 │ │ + bne.n 4d9ae │ │ + b.n 4dd98 │ │ add r0, sp, #200 @ 0xc8 │ │ - bl 3ec24 │ │ + bl 3ef2c │ │ ldr r7, [sp, #204] @ 0xcc │ │ - b.n 4d6b2 │ │ + b.n 4d9ba │ │ ldr r1, [sp, #264] @ 0x108 │ │ add r0, sp, #136 @ 0x88 │ │ mov r2, r7 │ │ str.w r8, [sp, #32] │ │ - bl 42814 │ │ + bl 42b1c │ │ ldr r0, [sp, #136] @ 0x88 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 4dcce │ │ + beq.w 4dfd6 │ │ mov fp, r0 │ │ ldrd r5, r0, [sp, #140] @ 0x8c │ │ cmp r0, #0 │ │ - beq.w 4d828 │ │ + beq.w 4db30 │ │ lsls r6, r0, #2 │ │ movs r7, #1 │ │ mov.w r8, #0 │ │ add.w r0, r5, r8 │ │ vldr s0, [r0] │ │ movs r0, #0 │ │ str r0, [sp, #208] @ 0xd0 │ │ vcmp.f32 s0, s0 │ │ vmrs APSR_nzcv, fpscr │ │ - bvs.n 4d77c │ │ + bvs.n 4da84 │ │ vmov r0, s0 │ │ eor.w r1, r0, #2147483648 @ 0x80000000 │ │ cmp r0, #0 │ │ it mi │ │ mvnmi r1, r0 │ │ rev r4, r1 │ │ ldr r0, [sp, #200] @ 0xc8 │ │ cmp r0, #3 │ │ - bls.n 4d784 │ │ + bls.n 4da8c │ │ movs r0, #0 │ │ str r4, [r7, r0] │ │ adds r3, r0, #4 │ │ add r0, sp, #136 @ 0x88 │ │ add r1, sp, #176 @ 0xb0 │ │ mov r2, r7 │ │ str r3, [sp, #208] @ 0xd0 │ │ - bl 4ec9c │ │ + bl 4eeac │ │ ldrb.w r4, [sp, #140] @ 0x8c │ │ movs r0, #17 │ │ ldr.w sl, [sp, #136] @ 0x88 │ │ movt r0, #32768 @ 0x8000 │ │ cmp sl, r0 │ │ - bne.w 4daac │ │ + bne.w 4ddb4 │ │ lsls r0, r4, #31 │ │ - beq.w 4dadc │ │ + beq.w 4dde4 │ │ add.w r8, r8, #4 │ │ cmp r6, r8 │ │ - bne.n 4d71a │ │ - b.n 4d828 │ │ + bne.n 4da22 │ │ + b.n 4db30 │ │ movs r4, #0 │ │ ldr r0, [sp, #200] @ 0xc8 │ │ cmp r0, #3 │ │ - bhi.n 4d746 │ │ + bhi.n 4da4e │ │ movs r0, #1 │ │ movs r1, #0 │ │ str r0, [sp, #0] │ │ add r0, sp, #200 @ 0xc8 │ │ movs r2, #4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd r7, r0, [sp, #204] @ 0xcc │ │ - b.n 4d748 │ │ + b.n 4da50 │ │ nop │ │ - str r5, [sp, #480] @ 0x1e0 │ │ + str r2, [sp, #448] @ 0x1c0 │ │ vtbx.8 d25, {d12-d13}, d2 │ │ add r0, sp, #136 @ 0x88 │ │ mov r2, r7 │ │ str.w r8, [sp, #32] │ │ - bl 498b8 │ │ + bl 49bc0 │ │ ldr r0, [sp, #136] @ 0x88 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 4dcd6 │ │ + beq.w 4dfde │ │ mov fp, r0 │ │ ldrd r5, r0, [sp, #140] @ 0x8c │ │ - cbz r0, 4d828 │ │ + cbz r0, 4db30 │ │ lsls r6, r0, #2 │ │ movs r7, #1 │ │ mov.w r8, #0 │ │ ldr.w r4, [r5, r8] │ │ movs r1, #0 │ │ ldr r0, [sp, #200] @ 0xc8 │ │ str r1, [sp, #208] @ 0xd0 │ │ cmp r0, #3 │ │ mov.w r0, #0 │ │ - bls.n 4d814 │ │ + bls.n 4db1c │ │ eor.w r1, r4, #2147483648 @ 0x80000000 │ │ adds r3, r0, #4 │ │ rev r1, r1 │ │ str r1, [r7, r0] │ │ add r0, sp, #136 @ 0x88 │ │ add r1, sp, #176 @ 0xb0 │ │ mov r2, r7 │ │ str r3, [sp, #208] @ 0xd0 │ │ - bl 4ec9c │ │ + bl 4eeac │ │ ldrb.w r4, [sp, #140] @ 0x8c │ │ movs r0, #17 │ │ ldr.w sl, [sp, #136] @ 0x88 │ │ movt r0, #32768 @ 0x8000 │ │ cmp sl, r0 │ │ - bne.w 4daac │ │ + bne.w 4ddb4 │ │ lsls r0, r4, #31 │ │ - beq.w 4dadc │ │ + beq.w 4dde4 │ │ add.w r8, r8, #4 │ │ cmp r6, r8 │ │ - bne.n 4d7c8 │ │ - b.n 4d828 │ │ + bne.n 4dad0 │ │ + b.n 4db30 │ │ movs r0, #1 │ │ movs r2, #4 │ │ str r0, [sp, #0] │ │ add r0, sp, #200 @ 0xc8 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd r7, r0, [sp, #204] @ 0xcc │ │ - b.n 4d7da │ │ + b.n 4dae2 │ │ cmp.w fp, #0 │ │ - b.n 4da84 │ │ + b.n 4dd8c │ │ ldr r1, [sp, #264] @ 0x108 │ │ add r0, sp, #136 @ 0x88 │ │ mov r2, r7 │ │ str.w r8, [sp, #32] │ │ - bl 428d4 │ │ + bl 42bdc │ │ ldr r0, [sp, #136] @ 0x88 │ │ str r0, [sp, #20] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 4dce6 │ │ + beq.w 4dfee │ │ ldrd r5, r0, [sp, #140] @ 0x8c │ │ cmp r0, #0 │ │ - beq.w 4da70 │ │ + beq.w 4dd78 │ │ lsls r0, r0, #3 │ │ mov.w r8, #1 │ │ movs r6, #0 │ │ str r0, [sp, #24] │ │ str r5, [sp, #44] @ 0x2c │ │ adds r0, r5, r6 │ │ vldr d16, [r0] │ │ movs r0, #0 │ │ str r0, [sp, #208] @ 0xd0 │ │ vcmp.f64 d16, d16 │ │ vmrs APSR_nzcv, fpscr │ │ - bvs.n 4d8d8 │ │ + bvs.n 4dbe0 │ │ vmov r1, r0, d16 │ │ cmp r0, #0 │ │ it mi │ │ mvnmi r1, r1 │ │ rev r4, r1 │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ it mi │ │ movmi.w r1, #4294967295 @ 0xffffffff │ │ eors r0, r1 │ │ rev r7, r0 │ │ ldr r0, [sp, #200] @ 0xc8 │ │ cmp r0, #7 │ │ - bls.n 4d8e2 │ │ + bls.n 4dbea │ │ movs r0, #0 │ │ add.w r1, r8, r0 │ │ str.w r7, [r8, r0] │ │ add.w r3, r0, #8 │ │ str r4, [r1, #4] │ │ add r0, sp, #136 @ 0x88 │ │ add r1, sp, #176 @ 0xb0 │ │ mov r2, r8 │ │ str r3, [sp, #208] @ 0xd0 │ │ - bl 4ec9c │ │ + bl 4eeac │ │ ldrb.w r4, [sp, #140] @ 0x8c │ │ movw fp, #17 │ │ ldr.w sl, [sp, #136] @ 0x88 │ │ movt fp, #32768 @ 0x8000 │ │ cmp sl, fp │ │ - bne.w 4db18 │ │ + bne.w 4de20 │ │ ldr r5, [sp, #60] @ 0x3c │ │ lsls r0, r4, #31 │ │ - beq.w 4db5c │ │ + beq.w 4de64 │ │ ldr r5, [sp, #44] @ 0x2c │ │ adds r6, #8 │ │ ldr r0, [sp, #24] │ │ cmp r0, r6 │ │ - bne.n 4d85e │ │ - b.n 4da70 │ │ + bne.n 4db66 │ │ + b.n 4dd78 │ │ movs r7, #0 │ │ movs r4, #0 │ │ ldr r0, [sp, #200] @ 0xc8 │ │ cmp r0, #7 │ │ - bhi.n 4d892 │ │ + bhi.n 4db9a │ │ movs r0, #1 │ │ movs r1, #0 │ │ str r0, [sp, #0] │ │ add r0, sp, #200 @ 0xc8 │ │ movs r2, #8 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd r8, r0, [sp, #204] @ 0xcc │ │ - b.n 4d894 │ │ + b.n 4db9c │ │ ldr r1, [sp, #264] @ 0x108 │ │ add r0, sp, #136 @ 0x88 │ │ mov r2, r7 │ │ str.w r8, [sp, #32] │ │ - bl 4299c │ │ + bl 42ca4 │ │ ldr r0, [sp, #136] @ 0x88 │ │ str r0, [sp, #16] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 4dcde │ │ + beq.w 4dfe6 │ │ ldr r0, [sp, #140] @ 0x8c │ │ str r0, [sp, #44] @ 0x2c │ │ ldr r0, [sp, #144] @ 0x90 │ │ cmp r0, #0 │ │ - beq.w 4da74 │ │ + beq.w 4dd7c │ │ ldr.w r8, [sp, #44] @ 0x2c │ │ movs r7, #1 │ │ add.w r0, r8, r0, lsl #3 │ │ str r0, [sp, #20] │ │ ldrb.w r0, [r5, #40] @ 0x28 │ │ str r0, [sp, #24] │ │ ldrd r1, r2, [r8] │ │ movs r0, #0 │ │ cmp r6, #2 │ │ str r0, [sp, #208] @ 0xd0 │ │ - bne.n 4d96c │ │ + bne.n 4dc74 │ │ mov r0, r1 │ │ mov r1, r2 │ │ ldr r2, [sp, #24] │ │ movs r4, #0 │ │ strd r4, r4, [sp] │ │ - bl 4ee30 │ │ + bl 4f040 │ │ movw fp, #17 │ │ ldr r2, [sp, #200] @ 0xc8 │ │ movt fp, #32768 @ 0x8000 │ │ cmp r2, #7 │ │ - bls.n 4d9ac │ │ + bls.n 4dcb4 │ │ rev r1, r1 │ │ str r1, [r7, r4] │ │ adds r1, r7, r4 │ │ rev r0, r0 │ │ add.w r3, r4, #8 │ │ str r0, [r1, #4] │ │ str r3, [sp, #208] @ 0xd0 │ │ - b.n 4d97e │ │ + b.n 4dc86 │ │ ldr r3, [sp, #24] │ │ add r0, sp, #200 @ 0xc8 │ │ - bl 4fbac │ │ + bl 4fdbc │ │ ldr r3, [sp, #208] @ 0xd0 │ │ movw fp, #17 │ │ movt fp, #32768 @ 0x8000 │ │ ldr r7, [sp, #204] @ 0xcc │ │ add r0, sp, #136 @ 0x88 │ │ add r1, sp, #176 @ 0xb0 │ │ ldr r5, [sp, #60] @ 0x3c │ │ mov r2, r7 │ │ - bl 4ec9c │ │ + bl 4eeac │ │ ldr.w sl, [sp, #136] @ 0x88 │ │ ldrb.w r4, [sp, #140] @ 0x8c │ │ cmp sl, fp │ │ - bne.w 4db30 │ │ + bne.w 4de38 │ │ lsls r0, r4, #31 │ │ - beq.w 4db64 │ │ + beq.w 4de6c │ │ add.w r8, r8, #8 │ │ ldr r0, [sp, #20] │ │ cmp r8, r0 │ │ - bne.n 4d930 │ │ - b.n 4da74 │ │ + bne.n 4dc38 │ │ + b.n 4dd7c │ │ movs r2, #1 │ │ mov r4, r0 │ │ add r0, sp, #200 @ 0xc8 │ │ str r2, [sp, #0] │ │ mov r5, r1 │ │ movs r1, #0 │ │ movs r2, #8 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ mov r0, r4 │ │ ldrd r7, r4, [sp, #204] @ 0xcc │ │ movw fp, #17 │ │ mov r1, r5 │ │ movt fp, #32768 @ 0x8000 │ │ - b.n 4d95a │ │ + b.n 4dc62 │ │ ldr r1, [sp, #264] @ 0x108 │ │ add r0, sp, #136 @ 0x88 │ │ mov r2, r7 │ │ str.w r8, [sp, #32] │ │ - bl 42384 │ │ + bl 4268c │ │ ldr r0, [sp, #136] @ 0x88 │ │ str r0, [sp, #24] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 4dcc6 │ │ + beq.w 4dfce │ │ ldrd r5, r0, [sp, #140] @ 0x8c │ │ cmp r0, #0 │ │ - beq.n 4da80 │ │ + beq.n 4dd88 │ │ lsls r6, r0, #3 │ │ movs r7, #1 │ │ mov.w r8, #0 │ │ str r5, [sp, #44] @ 0x2c │ │ add.w r1, r5, r8 │ │ ldr.w r4, [r5, r8] │ │ ldr r0, [sp, #200] @ 0xc8 │ │ ldr r5, [r1, #4] │ │ movs r1, #0 │ │ cmp r0, #7 │ │ mov.w r0, #0 │ │ str r1, [sp, #208] @ 0xd0 │ │ - bls.n 4da5c │ │ + bls.n 4dd64 │ │ eor.w r1, r5, #2147483648 @ 0x80000000 │ │ rev r2, r4 │ │ rev r1, r1 │ │ str r1, [r7, r0] │ │ adds r1, r7, r0 │ │ add.w r3, r0, #8 │ │ add r0, sp, #136 @ 0x88 │ │ str r2, [r1, #4] │ │ add r1, sp, #176 @ 0xb0 │ │ mov r2, r7 │ │ str r3, [sp, #208] @ 0xd0 │ │ - bl 4ec9c │ │ + bl 4eeac │ │ ldrb.w r4, [sp, #140] @ 0x8c │ │ movw fp, #17 │ │ ldr.w sl, [sp, #136] @ 0x88 │ │ movt fp, #32768 @ 0x8000 │ │ cmp sl, fp │ │ - bne.n 4db46 │ │ + bne.n 4de4e │ │ ldr r5, [sp, #60] @ 0x3c │ │ lsls r0, r4, #31 │ │ - beq.w 4db6c │ │ + beq.w 4de74 │ │ ldr r5, [sp, #44] @ 0x2c │ │ add.w r8, r8, #8 │ │ cmp r6, r8 │ │ - bne.n 4d9fe │ │ - b.n 4da80 │ │ + bne.n 4dd06 │ │ + b.n 4dd88 │ │ movs r0, #1 │ │ movs r2, #8 │ │ str r0, [sp, #0] │ │ add r0, sp, #200 @ 0xc8 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd r7, r0, [sp, #204] @ 0xcc │ │ - b.n 4da16 │ │ + b.n 4dd1e │ │ ldr r0, [sp, #20] │ │ - b.n 4da82 │ │ + b.n 4dd8a │ │ ldr.w r8, [sp, #32] │ │ ldr r5, [sp, #44] @ 0x2c │ │ ldr r0, [sp, #16] │ │ - cbnz r0, 4da8a │ │ - b.n 4da90 │ │ + cbnz r0, 4dd92 │ │ + b.n 4dd98 │ │ ldr r0, [sp, #24] │ │ cmp r0, #0 │ │ ldr.w r8, [sp, #32] │ │ - beq.n 4da90 │ │ + beq.n 4dd98 │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #200] @ 0xc8 │ │ cmp r0, #0 │ │ - beq.w 4d64a │ │ + beq.w 4d952 │ │ movw fp, #17 │ │ movs r4, #1 │ │ movt fp, #32768 @ 0x8000 │ │ ldrd r6, r7, [sp, #52] @ 0x34 │ │ mov sl, fp │ │ ldr r5, [sp, #60] @ 0x3c │ │ - b.n 4db86 │ │ + b.n 4de8e │ │ ldr r2, [sp, #28] │ │ ldr r1, [r2, #4] │ │ ldr r0, [r2, #0] │ │ ldr.w r2, [r2, #7] │ │ str.w r2, [sp, #167] @ 0xa7 │ │ strd r0, r1, [sp, #160] @ 0xa0 │ │ - b.n 4dae6 │ │ + b.n 4ddee │ │ ldr r2, [sp, #28] │ │ movw fp, #17 │ │ movt fp, #32768 @ 0x8000 │ │ ldr r1, [r2, #4] │ │ ldr r0, [r2, #0] │ │ ldr.w r2, [r2, #7] │ │ str.w r2, [sp, #167] @ 0xa7 │ │ strd r0, r1, [sp, #160] @ 0xa0 │ │ - b.n 4db10 │ │ + b.n 4de18 │ │ movw sl, #17 │ │ movs r4, #0 │ │ movt sl, #32768 @ 0x8000 │ │ cmp.w fp, #0 │ │ ldr.w r8, [sp, #32] │ │ ldrd r6, r7, [sp, #52] @ 0x34 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ movw fp, #17 │ │ movt fp, #32768 @ 0x8000 │ │ - b.n 4db14 │ │ + b.n 4de1c │ │ movw fp, #17 │ │ movs r4, #0 │ │ movt fp, #32768 @ 0x8000 │ │ mov sl, fp │ │ ldrd r6, r7, [sp, #52] @ 0x34 │ │ ldr r5, [sp, #60] @ 0x3c │ │ - b.n 4db82 │ │ + b.n 4de8a │ │ ldr r2, [sp, #28] │ │ ldr r5, [sp, #60] @ 0x3c │ │ ldr r1, [r2, #4] │ │ ldr r0, [r2, #0] │ │ ldr.w r2, [r2, #7] │ │ str.w r2, [sp, #167] @ 0xa7 │ │ strd r0, r1, [sp, #160] @ 0xa0 │ │ ldr r0, [sp, #20] │ │ - b.n 4db72 │ │ + b.n 4de7a │ │ ldr r2, [sp, #28] │ │ ldr r1, [r2, #4] │ │ ldr r0, [r2, #0] │ │ ldr.w r2, [r2, #7] │ │ str.w r2, [sp, #167] @ 0xa7 │ │ strd r0, r1, [sp, #160] @ 0xa0 │ │ ldr r0, [sp, #16] │ │ - b.n 4db72 │ │ + b.n 4de7a │ │ ldr r2, [sp, #28] │ │ ldr r5, [sp, #60] @ 0x3c │ │ ldr r1, [r2, #4] │ │ ldr r0, [r2, #0] │ │ ldr.w r2, [r2, #7] │ │ str.w r2, [sp, #167] @ 0xa7 │ │ strd r0, r1, [sp, #160] @ 0xa0 │ │ - b.n 4db70 │ │ + b.n 4de78 │ │ movs r4, #0 │ │ mov sl, fp │ │ ldr r0, [sp, #20] │ │ - b.n 4db72 │ │ + b.n 4de7a │ │ movs r4, #0 │ │ mov sl, fp │ │ ldr r0, [sp, #16] │ │ - b.n 4db72 │ │ + b.n 4de7a │ │ movs r4, #0 │ │ mov sl, fp │ │ ldr r0, [sp, #24] │ │ ldr.w r8, [sp, #32] │ │ ldrd r6, r7, [sp, #52] @ 0x34 │ │ - cbz r0, 4db82 │ │ + cbz r0, 4de8a │ │ ldr r0, [sp, #44] @ 0x2c │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #200] @ 0xc8 │ │ - cbz r0, 4db8c │ │ + cbz r0, 4de94 │ │ ldr r0, [sp, #204] @ 0xcc │ │ - blx d87c0 │ │ + blx d87d0 │ │ cmp sl, fp │ │ - beq.w 4d616 │ │ - b.n 4dc4c │ │ + beq.w 4d91e │ │ + b.n 4df54 │ │ ldr r2, [r6, #32] │ │ add r0, sp, #136 @ 0x88 │ │ mov r1, r5 │ │ - bl 49d00 │ │ + bl 4a008 │ │ add r7, sp, #136 @ 0x88 │ │ add.w ip, sp, #176 @ 0xb0 │ │ ldmia r7, {r0, r1, r2, r3, r7} │ │ cmp r0, #2 │ │ stmia.w ip, {r1, r2, r3, r7} │ │ - bne.n 4dbbc │ │ + bne.n 4dec4 │ │ add r3, sp, #176 @ 0xb0 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w r8, {r0, r1, r2, r3} │ │ add sp, #212 @ 0xd4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add r7, sp, #176 @ 0xb0 │ │ ldr r6, [sp, #156] @ 0x9c │ │ add.w ip, sp, #112 @ 0x70 │ │ str r6, [sp, #132] @ 0x84 │ │ ldmia r7, {r1, r2, r3, r7} │ │ stmia.w ip, {r0, r1, r2, r3, r7} │ │ lsls r0, r0, #31 │ │ - beq.n 4dcb0 │ │ + beq.n 4dfb8 │ │ ldr r6, [sp, #56] @ 0x38 │ │ mov r3, r4 │ │ ldrd r2, r0, [sp, #36] @ 0x24 │ │ ldr r1, [sp, #116] @ 0x74 │ │ strd r2, r0, [sp] │ │ add r0, sp, #136 @ 0x88 │ │ mov r2, r6 │ │ - bl 4fcfc │ │ + bl 4ff0c │ │ ldr r0, [sp, #136] @ 0x88 │ │ cmp r0, fp │ │ - bne.n 4dc0c │ │ + bne.n 4df14 │ │ ldr r0, [sp, #76] @ 0x4c │ │ - cbz r0, 4dc02 │ │ + cbz r0, 4df0a │ │ ldr r1, [sp, #52] @ 0x34 │ │ ldrd r2, r3, [r1, #40] @ 0x28 │ │ ldr r1, [sp, #264] @ 0x108 │ │ strd r6, r4, [sp] │ │ str r1, [sp, #8] │ │ - bl 4fde0 │ │ + bl 4fff0 │ │ str.w fp, [r8] │ │ strd r6, r4, [r8, #8] │ │ - b.n 4dc14 │ │ + b.n 4df1c │ │ add r3, sp, #136 @ 0x88 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w r8, {r0, r1, r2, r3} │ │ add r0, sp, #112 @ 0x70 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #112] @ 0x70 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #116] @ 0x74 │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ add sp, #212 @ 0xd4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr.w r1, [sp, #145] @ 0x91 │ │ ldrb.w r4, [sp, #140] @ 0x8c │ │ ldr r2, [sp, #200] @ 0xc8 │ │ ldr.w r0, [sp, #141] @ 0x8d │ │ ldr r3, [sp, #148] @ 0x94 │ │ strd r0, r1, [sp, #160] @ 0xa0 │ │ str.w r3, [sp, #167] @ 0xa7 │ │ - cbz r2, 4dc4c │ │ + cbz r2, 4df54 │ │ mov r0, r7 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr.w r2, [sp, #167] @ 0xa7 │ │ ldrd r0, r1, [sp, #160] @ 0xa0 │ │ str.w r2, [sp, #87] @ 0x57 │ │ strd r0, r1, [sp, #80] @ 0x50 │ │ add r0, sp, #112 @ 0x70 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #112] @ 0x70 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #116] @ 0x74 │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ ldrd r0, r1, [sp, #80] @ 0x50 │ │ ldr.w r2, [sp, #87] @ 0x57 │ │ str.w r2, [r8, #12] │ │ str.w r1, [r8, #9] │ │ str.w r0, [r8, #5] │ │ strb.w r4, [r8, #4] │ │ str.w sl, [r8] │ │ add sp, #212 @ 0xd4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #132] @ (4dd18 ) │ │ + ldr r0, [pc, #132] @ (4e020 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r1, [pc, #116] @ (4dd10 ) │ │ + bl 3fd40 │ │ + ldr r1, [pc, #116] @ (4e018 ) │ │ add r0, sp, #196 @ 0xc4 │ │ - ldr r2, [pc, #116] @ (4dd14 ) │ │ + ldr r2, [pc, #116] @ (4e01c ) │ │ add r1, pc │ │ add r2, pc │ │ - bl 40ff4 │ │ - ldr r3, [pc, #136] @ (4dd30 ) │ │ + bl 412fc │ │ + ldr r3, [pc, #136] @ (4e038 ) │ │ ldr r2, [sp, #40] @ 0x28 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #120] @ (4dd2c ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #120] @ (4e034 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #68] @ (4dd00 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #68] @ (4e008 ) │ │ movs r1, #40 @ 0x28 │ │ - ldr r2, [pc, #68] @ (4dd04 ) │ │ + ldr r2, [pc, #68] @ (4e00c ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r0, [pc, #88] @ (4dd20 ) │ │ + bl 3fd54 │ │ + ldr r0, [pc, #88] @ (4e028 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #60] @ (4dd0c ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #60] @ (4e014 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #48] @ (4dd08 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #48] @ (4e010 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #72] @ (4dd28 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #72] @ (4e030 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #60] @ (4dd24 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #60] @ (4e02c ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ movs r0, #1 │ │ movs r1, #26 │ │ - bl 3dfa4 │ │ - ldr r0, [pc, #36] @ (4dd1c ) │ │ + bl 3e2ac │ │ + ldr r0, [pc, #36] @ (4e024 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ nop │ │ - @ instruction: 0xb78f │ │ - vshr.u64 , q6, #4 │ │ + push {r0, r1, r2, r7} │ │ + vqrdmulh.s q14, q14, d20[0] │ │ movs r0, r1 │ │ - beq.n 4ddf4 │ │ + ldmia r5, {r2, r3, r4, r5, r6} │ │ movs r0, r1 │ │ - beq.n 4dc28 │ │ + ldmia r5!, {r2, r4, r7} │ │ movs r0, r1 │ │ - strh r6, [r4, #44] @ 0x2c │ │ - vrev32. d29, d12 │ │ + strh r6, [r3, #20] │ │ + @ instruction: 0xfffccd94 │ │ movs r0, r1 │ │ - beq.n 4dc30 │ │ + ldmia r5!, {r1, r4, r7} │ │ movs r0, r1 │ │ - beq.n 4dda8 │ │ + ldmia r5!, {r2, r3, r6} │ │ movs r0, r1 │ │ - beq.n 4dc6c │ │ + ldmia r5, {r2, r3, r5, r7} │ │ movs r0, r1 │ │ - beq.n 4dc50 │ │ + ldmia r5!, {r2, r3, r4, r7} │ │ movs r0, r1 │ │ - beq.n 4dc84 │ │ + ldmia r5, {r2, r4, r5, r7} │ │ movs r0, r1 │ │ - ldmia r6!, {r1, r3, r4, r7} │ │ + ldmia r3!, {r1, r5, r7} │ │ movs r0, r1 │ │ - bcc.n 4dd38 │ │ + beq.n 4e050 │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #100 @ 0x64 │ │ ldrb r1, [r0, #0] │ │ cmp r1, #3 │ │ - bcs.n 4dd46 │ │ + bcs.n 4e04e │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - beq.n 4dd74 │ │ + beq.n 4e07c │ │ cmp r1, #4 │ │ - bne.n 4dd86 │ │ + bne.n 4e08e │ │ ldrd r4, r7, [r0, #8] │ │ mov r6, r0 │ │ - cbz r7, 4dd62 │ │ + cbz r7, 4e06a │ │ mov r5, r4 │ │ mov r0, r5 │ │ - bl 4dd34 │ │ + bl 4e03c │ │ adds r5, #24 │ │ subs r7, #1 │ │ - bne.n 4dd56 │ │ + bne.n 4e05e │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ - beq.n 4dd40 │ │ + beq.n 4e048 │ │ mov r0, r4 │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ ldr r1, [r0, #4] │ │ cmp r1, #0 │ │ - beq.n 4dd40 │ │ + beq.n 4e048 │ │ ldr r0, [r0, #8] │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ ldr r1, [r0, #4] │ │ mov.w r9, #0 │ │ - cbz r1, 4dda2 │ │ + cbz r1, 4e0aa │ │ ldrd r2, r0, [r0, #8] │ │ strd r9, r1, [sp, #24] │ │ strd r9, r1, [sp, #8] │ │ movs r1, #1 │ │ str r2, [sp, #32] │ │ str r2, [sp, #16] │ │ - b.n 4dda6 │ │ + b.n 4e0ae │ │ movs r1, #0 │ │ movs r0, #0 │ │ add.w r8, sp, #40 @ 0x28 │ │ add.w sl, sp, #4 │ │ add.w fp, sp, #88 @ 0x58 │ │ add r7, sp, #52 @ 0x34 │ │ str r0, [sp, #36] @ 0x24 │ │ str r1, [sp, #20] │ │ str r1, [sp, #4] │ │ mov r0, r8 │ │ mov r1, sl │ │ - bl 4de98 │ │ + bl 331f8 │ │ ldr r4, [sp, #40] @ 0x28 │ │ cmp r4, #0 │ │ - beq.n 4dd40 │ │ + beq.n 4e048 │ │ ldr r0, [sp, #48] @ 0x30 │ │ add.w r5, r0, r0, lsl #1 │ │ add.w r0, r4, r5, lsl #2 │ │ ldr.w r1, [r0, #268] @ 0x10c │ │ cmp r1, #0 │ │ ittt ne │ │ addne.w r0, r0, #268 @ 0x10c │ │ ldrne r0, [r0, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r5, r4, r5, lsl #3 │ │ ldrb r0, [r5, #0] │ │ cmp r0, #3 │ │ - bcc.n 4ddba │ │ - beq.n 4de06 │ │ + bcc.n 4e0c2 │ │ + beq.n 4e10e │ │ cmp r0, #4 │ │ - bne.n 4de14 │ │ + bne.n 4e11c │ │ ldr r6, [r5, #12] │ │ - cbz r6, 4de06 │ │ + cbz r6, 4e10e │ │ ldr r4, [r5, #8] │ │ mov r0, r4 │ │ - bl 4dd34 │ │ + bl 4e03c │ │ adds r4, #24 │ │ subs r6, #1 │ │ - bne.n 4ddfa │ │ + bne.n 4e102 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ - beq.n 4ddba │ │ + beq.n 4e0c2 │ │ ldr r0, [r5, #8] │ │ - blx d87c0 │ │ - b.n 4ddba │ │ + blx d87d0 │ │ + b.n 4e0c2 │ │ ldr r1, [r5, #4] │ │ - cbz r1, 4de2c │ │ + cbz r1, 4e134 │ │ ldrd r2, r0, [r5, #8] │ │ strd r9, r1, [sp, #72] @ 0x48 │ │ strd r9, r1, [sp, #56] @ 0x38 │ │ movs r1, #1 │ │ str r2, [sp, #80] @ 0x50 │ │ str r2, [sp, #64] @ 0x40 │ │ - b.n 4de30 │ │ + b.n 4e138 │ │ movs r1, #0 │ │ movs r0, #0 │ │ str r0, [sp, #84] @ 0x54 │ │ str r1, [sp, #68] @ 0x44 │ │ str r1, [sp, #52] @ 0x34 │ │ - b.n 4de3e │ │ + b.n 4e146 │ │ adds r0, r5, #4 │ │ - bl 4df90 │ │ + bl 4e1a0 │ │ mov r0, fp │ │ mov r1, r7 │ │ - bl 4de98 │ │ + bl 331f8 │ │ ldr r4, [sp, #88] @ 0x58 │ │ cmp r4, #0 │ │ - beq.n 4ddba │ │ + beq.n 4e0c2 │ │ ldr r0, [sp, #96] @ 0x60 │ │ add.w r5, r0, r0, lsl #1 │ │ add.w r0, r4, r5, lsl #2 │ │ ldr.w r1, [r0, #268] @ 0x10c │ │ cmp r1, #0 │ │ ittt ne │ │ addne.w r0, r0, #268 @ 0x10c │ │ ldrne r0, [r0, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r5, r4, r5, lsl #3 │ │ ldrb r0, [r5, #0] │ │ cmp r0, #3 │ │ - bcc.n 4de3e │ │ - beq.n 4de8a │ │ + bcc.n 4e146 │ │ + beq.n 4e192 │ │ cmp r0, #4 │ │ - bne.n 4de38 │ │ + bne.n 4e140 │ │ ldr r6, [r5, #12] │ │ - cbz r6, 4de8a │ │ + cbz r6, 4e192 │ │ ldr r4, [r5, #8] │ │ mov r0, r4 │ │ - bl 4dd34 │ │ + bl 4e03c │ │ adds r4, #24 │ │ subs r6, #1 │ │ - bne.n 4de7e │ │ + bne.n 4e186 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ - beq.n 4de3e │ │ + beq.n 4e146 │ │ ldr r0, [r5, #8] │ │ - blx d87c0 │ │ - b.n 4de3e │ │ - stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ - mov r4, r0 │ │ - ldr r0, [r1, #32] │ │ - cbz r0, 4deda │ │ - ldr r2, [r1, #0] │ │ - subs r0, #1 │ │ - str r0, [r1, #32] │ │ - cmp r2, #1 │ │ - bne.n 4df80 │ │ - ldr r0, [r1, #4] │ │ - cbz r0, 4df10 │ │ - ldrd r5, r6, [r1, #8] │ │ - ldrh.w r2, [r0, #402] @ 0x192 │ │ - cmp r6, r2 │ │ - bcs.n 4df2e │ │ - mov r7, r0 │ │ - cmp r5, #0 │ │ - beq.n 4df50 │ │ - add.w r0, r7, r6, lsl #2 │ │ - mov r3, r5 │ │ - add.w r2, r0, #412 @ 0x19c │ │ - ldr r0, [r2, #0] │ │ - subs r3, #1 │ │ - add.w r2, r0, #408 @ 0x198 │ │ - bne.n 4decc │ │ - movs r2, #0 │ │ - b.n 4df54 │ │ - ldrd r7, r0, [r1] │ │ - movs r6, #0 │ │ - ldrd r3, r2, [r1, #8] │ │ - str r6, [r1, #0] │ │ - lsls r1, r7, #31 │ │ - beq.n 4df6e │ │ - cbnz r0, 4def8 │ │ - mov r0, r3 │ │ - cbz r2, 4def8 │ │ - ldr.w r0, [r0, #408] @ 0x198 │ │ - subs r2, #1 │ │ - bne.n 4def0 │ │ - ldr.w r1, [r0, #264] @ 0x108 │ │ - cbz r1, 4df66 │ │ - mov r5, r1 │ │ - blx d87c0 │ │ - ldr.w r1, [r5, #264] @ 0x108 │ │ - mov r0, r5 │ │ - cmp r1, #0 │ │ - bne.n 4defe │ │ - b.n 4df68 │ │ - ldrd r0, r2, [r1, #8] │ │ - cbz r2, 4df1e │ │ - ldr.w r0, [r0, #408] @ 0x198 │ │ - subs r2, #1 │ │ - bne.n 4df16 │ │ - movs r2, #1 │ │ - movs r6, #0 │ │ - movs r5, #0 │ │ - str r2, [r1, #0] │ │ - ldrh.w r2, [r0, #402] @ 0x192 │ │ - cmp r6, r2 │ │ - bcc.n 4debc │ │ - mov r8, r1 │ │ - ldr.w r7, [r0, #264] @ 0x108 │ │ - cbz r7, 4df74 │ │ - ldrh.w r6, [r0, #400] @ 0x190 │ │ - blx d87c0 │ │ - ldrh.w r0, [r7, #402] @ 0x192 │ │ - adds r5, #1 │ │ - cmp r6, r0 │ │ - mov r0, r7 │ │ - bcs.n 4df30 │ │ - mov r1, r8 │ │ - cmp r5, #0 │ │ - bne.n 4dec2 │ │ - adds r2, r6, #1 │ │ - mov r0, r7 │ │ - movs r3, #0 │ │ - str r2, [r1, #12] │ │ - strd r0, r3, [r1, #4] │ │ - strd r7, r5, [r4] │ │ - str r6, [r4, #8] │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ - mov r5, r0 │ │ - mov r0, r5 │ │ - blx d87c0 │ │ - str r6, [r4, #0] │ │ - ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ - blx d87c0 │ │ - ldr r0, [pc, #12] @ (4df88 ) │ │ - add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #8] @ (4df8c ) │ │ - add r0, pc │ │ - bl 3fa38 │ │ - udf #34 @ 0x22 │ │ - movs r0, r1 │ │ - udf #42 @ 0x2a │ │ - movs r0, r1 │ │ + blx d87d0 │ │ + b.n 4e146 │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #48 @ 0x30 │ │ ldr r2, [r0, #0] │ │ movs r1, #0 │ │ - cbz r2, 4dfb4 │ │ + cbz r2, 4e1c4 │ │ add.w ip, sp, #20 │ │ ldrd r3, r0, [r0, #4] │ │ stmia.w ip, {r1, r2, r3} │ │ add.w ip, sp, #4 │ │ stmia.w ip, {r1, r2, r3} │ │ movs r1, #1 │ │ - b.n 4dfb6 │ │ + b.n 4e1c6 │ │ movs r0, #0 │ │ add.w r8, sp, #36 @ 0x24 │ │ mov r5, sp │ │ str r0, [sp, #32] │ │ str r1, [sp, #16] │ │ str r1, [sp, #0] │ │ - b.n 4dfca │ │ + b.n 4e1da │ │ adds r0, r7, #4 │ │ - bl 4df90 │ │ + bl 4e1a0 │ │ mov r0, r8 │ │ mov r1, r5 │ │ - bl 4de98 │ │ + bl 331f8 │ │ ldr r4, [sp, #36] @ 0x24 │ │ - cbz r4, 4e022 │ │ + cbz r4, 4e232 │ │ ldr r0, [sp, #44] @ 0x2c │ │ add.w r6, r0, r0, lsl #1 │ │ add.w r0, r4, r6, lsl #2 │ │ ldr.w r1, [r0, #268] @ 0x10c │ │ cmp r1, #0 │ │ ittt ne │ │ addne.w r0, r0, #268 @ 0x10c │ │ ldrne r0, [r0, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r7, r4, r6, lsl #3 │ │ ldrb r0, [r7, #0] │ │ cmp r0, #3 │ │ - bcc.n 4dfca │ │ - beq.n 4e014 │ │ + bcc.n 4e1da │ │ + beq.n 4e224 │ │ cmp r0, #4 │ │ - bne.n 4dfc4 │ │ + bne.n 4e1d4 │ │ ldr r4, [r7, #12] │ │ - cbz r4, 4e014 │ │ + cbz r4, 4e224 │ │ ldr r6, [r7, #8] │ │ mov r0, r6 │ │ - bl 4dd34 │ │ + bl 4e03c │ │ adds r6, #24 │ │ subs r4, #1 │ │ - bne.n 4e008 │ │ + bne.n 4e218 │ │ ldr r0, [r7, #4] │ │ cmp r0, #0 │ │ - beq.n 4dfca │ │ + beq.n 4e1da │ │ ldr r0, [r7, #8] │ │ - blx d87c0 │ │ - b.n 4dfca │ │ + blx d87d0 │ │ + b.n 4e1da │ │ add sp, #48 @ 0x30 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ push {r4, r5, r6, lr} │ │ add.w r2, r1, r1, lsl #1 │ │ add.w r1, r0, r2, lsl #2 │ │ add.w r5, r0, r2, lsl #3 │ │ ldr.w r3, [r1, #268] @ 0x10c │ │ cmp r3, #0 │ │ ittt ne │ │ addne.w r0, r1, #268 @ 0x10c │ │ ldrne r0, [r0, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrb r0, [r5, #0] │ │ cmp r0, #3 │ │ it cc │ │ popcc {r4, r5, r6, pc} │ │ - beq.n 4e068 │ │ + beq.n 4e278 │ │ cmp r0, #4 │ │ - bne.n 4e076 │ │ + bne.n 4e286 │ │ ldr r6, [r5, #12] │ │ - cbz r6, 4e068 │ │ + cbz r6, 4e278 │ │ ldr r4, [r5, #8] │ │ mov r0, r4 │ │ - bl 4dd34 │ │ + bl 4e03c │ │ adds r4, #24 │ │ subs r6, #1 │ │ - bne.n 4e05c │ │ + bne.n 4e26c │ │ ldr r0, [r5, #4] │ │ - cbz r0, 4e080 │ │ + cbz r0, 4e290 │ │ ldr r0, [r5, #8] │ │ ldmia.w sp!, {r4, r5, r6, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ adds r0, r5, #4 │ │ ldmia.w sp!, {r4, r5, r6, lr} │ │ - b.w 4df90 │ │ + b.w 4e1a0 │ │ pop {r4, r5, r6, pc} │ │ - bmi.n 4e02e │ │ + bmi.n 4e23e │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #228 @ 0xe4 │ │ mov sl, r2 │ │ ldr r2, [r1, #32] │ │ mov fp, r0 │ │ add r0, sp, #160 @ 0xa0 │ │ mov r4, r1 │ │ mov r1, sl │ │ mov r9, r3 │ │ - bl 49d00 │ │ + bl 4a008 │ │ add r7, sp, #160 @ 0xa0 │ │ add.w ip, sp, #136 @ 0x88 │ │ ldmia r7, {r0, r1, r2, r3, r7} │ │ cmp r0, #2 │ │ stmia.w ip, {r1, r2, r3, r7} │ │ - bne.n 4e0ba │ │ + bne.n 4e2ca │ │ add r3, sp, #136 @ 0x88 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w fp, {r0, r1, r2, r3} │ │ add sp, #228 @ 0xe4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add r7, sp, #136 @ 0x88 │ │ ldr r6, [sp, #180] @ 0xb4 │ │ add.w ip, sp, #72 @ 0x48 │ │ str r6, [sp, #92] @ 0x5c │ │ ldmia r7, {r1, r2, r3, r7} │ │ stmia.w ip, {r0, r1, r2, r3, r7} │ │ lsls r0, r0, #31 │ │ - beq.w 4e8a6 │ │ + beq.w 4eab6 │ │ movs r0, #8 │ │ movs r5, #8 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 4e908 │ │ + beq.w 4eb18 │ │ ldrd r3, r2, [sp, #272] @ 0x110 │ │ add.w r8, sp, #160 @ 0xa0 │ │ eor.w r2, r2, #2147483648 @ 0x80000000 │ │ str r2, [r0, #4] │ │ movs r2, #0 │ │ ldr r1, [sp, #76] @ 0x4c │ │ strd r5, r2, [sp] │ │ mov r5, r0 │ │ str r3, [r0, #0] │ │ mov r0, r8 │ │ movs r2, #16 │ │ mov r3, r5 │ │ - bl 49e28 │ │ + bl 4a130 │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrd r1, r0, [sp, #160] @ 0xa0 │ │ cmp r1, #1 │ │ - bne.n 4e116 │ │ + bne.n 4e326 │ │ add r3, sp, #168 @ 0xa8 │ │ ldmia r3, {r1, r2, r3} │ │ - b.n 4e81a │ │ + b.n 4ea2a │ │ cmp r0, #0 │ │ - beq.w 4e804 │ │ + beq.w 4ea14 │ │ ldr r2, [sp, #176] @ 0xb0 │ │ strd r9, fp, [sp, #44] @ 0x2c │ │ cmp r2, #1 │ │ - bls.w 4e8bc │ │ + bls.w 4eacc │ │ ldr r3, [sp, #172] @ 0xac │ │ ldrd fp, r0, [r4, #92] @ 0x5c │ │ cmp r0, #0 │ │ str r4, [sp, #40] @ 0x28 │ │ ldrh r1, [r3, #0] │ │ strd r3, r2, [sp, #100] @ 0x64 │ │ strd r3, r2, [sp, #32] │ │ str r1, [sp, #108] @ 0x6c │ │ - beq.w 4e75e │ │ + beq.w 4e96e │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r6, r8, #9 │ │ str.w sl, [sp, #64] @ 0x40 │ │ add.w r5, fp, r0, lsl #4 │ │ add.w r0, r8, #5 │ │ str r0, [sp, #28] │ │ add r0, sp, #136 @ 0x88 │ │ adds r0, #9 │ │ str r0, [sp, #68] @ 0x44 │ │ strd r6, r5, [sp, #56] @ 0x38 │ │ - b.n 4e18a │ │ + b.n 4e39a │ │ ldrd r0, r1, [sp, #216] @ 0xd8 │ │ strd r0, r1, [sp, #112] @ 0x70 │ │ movs r0, #17 │ │ ldr.w r2, [sp, #223] @ 0xdf │ │ movt r0, #32768 @ 0x8000 │ │ cmp r4, r0 │ │ str.w r2, [sp, #119] @ 0x77 │ │ - bne.w 4e884 │ │ + bne.w 4ea94 │ │ add.w fp, fp, #48 @ 0x30 │ │ cmp fp, r5 │ │ - beq.w 4e75e │ │ + beq.w 4e96e │ │ ldr r0, [sp, #276] @ 0x114 │ │ mov r1, sl │ │ str r0, [sp, #132] @ 0x84 │ │ ldr r0, [sp, #272] @ 0x110 │ │ str r0, [sp, #128] @ 0x80 │ │ mov r0, r8 │ │ ldr.w r2, [fp] │ │ - bl 49d00 │ │ + bl 4a008 │ │ ldrd r0, r4, [sp, #160] @ 0xa0 │ │ ldr r2, [r6, #4] │ │ ldrb.w r7, [sp, #168] @ 0xa8 │ │ cmp r0, #2 │ │ ldr r1, [r6, #0] │ │ ldr.w r3, [r6, #7] │ │ strd r1, r2, [sp, #216] @ 0xd8 │ │ str.w r3, [sp, #223] @ 0xdf │ │ - beq.n 4e164 │ │ + beq.n 4e374 │ │ ldr r5, [sp, #68] @ 0x44 │ │ ldrd r2, r3, [sp, #216] @ 0xd8 │ │ ldr r1, [sp, #180] @ 0xb4 │ │ strd r0, r4, [sp, #136] @ 0x88 │ │ add r0, sp, #128 @ 0x80 │ │ str r2, [r5, #0] │ │ str r1, [sp, #156] @ 0x9c │ │ @@ -56925,1212 +57021,1212 @@ │ │ str r0, [sp, #208] @ 0xd0 │ │ add r0, sp, #136 @ 0x88 │ │ ldr.w r6, [sp, #223] @ 0xdf │ │ str r3, [r5, #4] │ │ str.w r6, [r5, #7] │ │ strb.w r7, [sp, #144] @ 0x90 │ │ strd fp, r0, [sp, #200] @ 0xc8 │ │ - beq.w 4e89e │ │ + beq.w 4eaae │ │ ldrb.w r7, [r1, #32] │ │ mov r9, r8 │ │ cmp r7, #8 │ │ - bcc.n 4e200 │ │ + bcc.n 4e410 │ │ ldrb.w sl, [r1, #41] @ 0x29 │ │ cmp.w sl, #1 │ │ - bne.n 4e232 │ │ + bne.n 4e442 │ │ add r0, sp, #216 @ 0xd8 │ │ add r3, sp, #100 @ 0x64 │ │ - bl 4e950 │ │ + bl 4eb60 │ │ ldrd r5, r3, [sp, #220] @ 0xdc │ │ add r1, sp, #200 @ 0xc8 │ │ mov r0, r9 │ │ mov r8, r9 │ │ mov r2, r5 │ │ - bl 5259c │ │ + bl 527ac │ │ ldr r4, [sp, #160] @ 0xa0 │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r4, r0 │ │ - bne.w 4e842 │ │ + bne.w 4ea52 │ │ ldr r0, [sp, #216] @ 0xd8 │ │ - cbz r0, 4e254 │ │ + cbz r0, 4e464 │ │ mov r0, r5 │ │ - blx d87c0 │ │ - b.n 4e254 │ │ + blx d87d0 │ │ + b.n 4e464 │ │ cmp r2, #1 │ │ str r2, [sp, #212] @ 0xd4 │ │ - bne.w 4e8ae │ │ + bne.w 4eabe │ │ movs r0, #1 │ │ ldr r5, [r1, #28] │ │ str r0, [sp, #220] @ 0xdc │ │ movs r0, #0 │ │ str r0, [sp, #216] @ 0xd8 │ │ add r0, sp, #100 @ 0x64 │ │ mov r4, r1 │ │ mov r1, r5 │ │ mov r2, r7 │ │ mov r8, r9 │ │ - bl 49978 │ │ - cbz r0, 4e270 │ │ + bl 49c80 │ │ + cbz r0, 4e480 │ │ ldr.w sl, [sp, #64] @ 0x40 │ │ ldrd r6, r5, [sp, #56] @ 0x38 │ │ add r0, sp, #136 @ 0x88 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #136] @ 0x88 │ │ cmp r0, #0 │ │ - beq.n 4e180 │ │ + beq.n 4e390 │ │ ldr r0, [sp, #140] @ 0x8c │ │ - blx 9ca04 │ │ - b.n 4e180 │ │ + blx 9ca10 │ │ + b.n 4e390 │ │ sub.w r0, r7, #8 │ │ cmp r0, #6 │ │ - bhi.w 4e8d2 │ │ + bhi.w 4eae2 │ │ tbh [pc, r0, lsl #1] │ │ movs r7, r0 │ │ movs r7, r0 │ │ lsls r1, r3, #2 │ │ lsls r5, r0, #1 │ │ lsls r7, r3, #6 │ │ lsls r1, r4, #3 │ │ lsls r1, r0, #5 │ │ add r1, sp, #100 @ 0x64 │ │ mov r0, r8 │ │ mov r2, r5 │ │ - bl 42308 │ │ + bl 42610 │ │ ldr.w sl, [sp, #64] @ 0x40 │ │ ldr r0, [sp, #160] @ 0xa0 │ │ cmp r0, #1 │ │ - bne.w 4e910 │ │ + bne.w 4eb20 │ │ ldrd r0, r6, [sp, #164] @ 0xa4 │ │ adds r1, r6, r0 │ │ - bcs.w 4e8c8 │ │ + bcs.w 4ead8 │ │ ldr r2, [sp, #36] @ 0x24 │ │ cmp r1, r2 │ │ - bhi.w 4e8c8 │ │ + bhi.w 4ead8 │ │ cmp r6, #0 │ │ - beq.w 4e668 │ │ + beq.w 4e878 │ │ ldr r1, [sp, #32] │ │ movs r5, #1 │ │ add.w r8, r1, r0 │ │ ldrb.w r4, [r8], #1 │ │ movs r1, #0 │ │ ldr r0, [sp, #216] @ 0xd8 │ │ str r1, [sp, #224] @ 0xe0 │ │ - cbz r0, 4e2fe │ │ + cbz r0, 4e50e │ │ movs r0, #1 │ │ add r1, sp, #200 @ 0xc8 │ │ strb r4, [r5, #0] │ │ mov r2, r5 │ │ str r0, [sp, #224] @ 0xe0 │ │ mov r0, r9 │ │ movs r3, #1 │ │ - bl 5259c │ │ + bl 527ac │ │ ldrb.w r7, [sp, #164] @ 0xa4 │ │ movs r0, #17 │ │ ldr r4, [sp, #160] @ 0xa0 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r4, r0 │ │ - bne.w 4e694 │ │ + bne.w 4e8a4 │ │ lsls r0, r7, #31 │ │ - beq.w 4e6c4 │ │ + beq.w 4e8d4 │ │ subs r6, #1 │ │ - bne.n 4e2c2 │ │ - b.n 4e668 │ │ + bne.n 4e4d2 │ │ + b.n 4e878 │ │ add r0, sp, #216 @ 0xd8 │ │ - bl 3ec24 │ │ + bl 3ef2c │ │ ldr r5, [sp, #220] @ 0xdc │ │ - b.n 4e2ce │ │ + b.n 4e4de │ │ add r1, sp, #100 @ 0x64 │ │ mov r0, r8 │ │ mov r2, r5 │ │ - bl 42814 │ │ + bl 42b1c │ │ ldr r0, [sp, #160] @ 0xa0 │ │ str r0, [sp, #24] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 4e8e8 │ │ + beq.w 4eaf8 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ str r0, [sp, #52] @ 0x34 │ │ ldr r0, [sp, #168] @ 0xa8 │ │ cmp r0, #0 │ │ - beq.w 4e650 │ │ + beq.w 4e860 │ │ lsls r6, r0, #2 │ │ movs r5, #1 │ │ mov.w sl, #0 │ │ ldr r0, [sp, #52] @ 0x34 │ │ add r0, sl │ │ vldr s0, [r0] │ │ movs r0, #0 │ │ str r0, [sp, #224] @ 0xe0 │ │ vcmp.f32 s0, s0 │ │ vmrs APSR_nzcv, fpscr │ │ - bvs.n 4e392 │ │ + bvs.n 4e5a2 │ │ vmov r0, s0 │ │ eor.w r1, r0, #2147483648 @ 0x80000000 │ │ cmp r0, #0 │ │ it mi │ │ mvnmi r1, r0 │ │ rev r4, r1 │ │ ldr r0, [sp, #216] @ 0xd8 │ │ cmp r0, #3 │ │ - bls.n 4e39a │ │ + bls.n 4e5aa │ │ movs r0, #0 │ │ adds r3, r0, #4 │ │ add r1, sp, #200 @ 0xc8 │ │ str r4, [r5, r0] │ │ mov r0, r8 │ │ mov r2, r5 │ │ str r3, [sp, #224] @ 0xe0 │ │ - bl 5259c │ │ + bl 527ac │ │ ldrb.w r7, [sp, #164] @ 0xa4 │ │ movs r0, #17 │ │ ldr r4, [sp, #160] @ 0xa0 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r4, r0 │ │ - bne.w 4e6d4 │ │ + bne.w 4e8e4 │ │ lsls r0, r7, #31 │ │ - beq.w 4e714 │ │ + beq.w 4e924 │ │ add.w sl, sl, #4 │ │ cmp r6, sl │ │ - bne.n 4e332 │ │ - b.n 4e650 │ │ + bne.n 4e542 │ │ + b.n 4e860 │ │ movs r4, #0 │ │ ldr r0, [sp, #216] @ 0xd8 │ │ cmp r0, #3 │ │ - bhi.n 4e35e │ │ + bhi.n 4e56e │ │ movs r0, #1 │ │ movs r1, #0 │ │ str r0, [sp, #0] │ │ add r0, sp, #216 @ 0xd8 │ │ movs r2, #4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd r5, r0, [sp, #220] @ 0xdc │ │ - b.n 4e360 │ │ + b.n 4e570 │ │ add r1, sp, #100 @ 0x64 │ │ mov r0, r8 │ │ mov r2, r5 │ │ - bl 498b8 │ │ + bl 49bc0 │ │ ldr r0, [sp, #160] @ 0xa0 │ │ str r0, [sp, #24] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 4e8f0 │ │ + beq.w 4eb00 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ str r0, [sp, #52] @ 0x34 │ │ ldr r0, [sp, #168] @ 0xa8 │ │ cmp r0, #0 │ │ - beq.w 4e650 │ │ + beq.w 4e860 │ │ lsls r6, r0, #2 │ │ movs r5, #1 │ │ mov.w r8, #0 │ │ mov.w sl, #0 │ │ ldr r0, [sp, #52] @ 0x34 │ │ str.w r8, [sp, #224] @ 0xe0 │ │ ldr.w r4, [r0, sl] │ │ ldr r0, [sp, #216] @ 0xd8 │ │ cmp r0, #3 │ │ mov.w r0, #0 │ │ - bls.n 4e42a │ │ + bls.n 4e63a │ │ eor.w r1, r4, #2147483648 @ 0x80000000 │ │ adds r3, r0, #4 │ │ rev r1, r1 │ │ str r1, [r5, r0] │ │ add r1, sp, #200 @ 0xc8 │ │ mov r0, r9 │ │ mov r2, r5 │ │ str r3, [sp, #224] @ 0xe0 │ │ - bl 5259c │ │ + bl 527ac │ │ ldrb.w r7, [sp, #164] @ 0xa4 │ │ movs r0, #17 │ │ ldr r4, [sp, #160] @ 0xa0 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r4, r0 │ │ - bne.w 4e680 │ │ + bne.w 4e890 │ │ lsls r0, r7, #31 │ │ - beq.w 4e6a8 │ │ + beq.w 4e8b8 │ │ add.w sl, sl, #4 │ │ cmp r6, sl │ │ - bne.n 4e3de │ │ - b.n 4e650 │ │ + bne.n 4e5ee │ │ + b.n 4e860 │ │ movs r0, #1 │ │ movs r1, #0 │ │ str r0, [sp, #0] │ │ add r0, sp, #216 @ 0xd8 │ │ movs r2, #4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd r5, r0, [sp, #220] @ 0xdc │ │ - b.n 4e3f2 │ │ + b.n 4e602 │ │ add r1, sp, #100 @ 0x64 │ │ mov r0, r8 │ │ mov r2, r5 │ │ - bl 428d4 │ │ + bl 42bdc │ │ ldr r0, [sp, #160] @ 0xa0 │ │ str r0, [sp, #20] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 4e900 │ │ + beq.w 4eb10 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ str r0, [sp, #52] @ 0x34 │ │ ldr r0, [sp, #168] @ 0xa8 │ │ cmp r0, #0 │ │ - beq.w 4e654 │ │ + beq.w 4e864 │ │ lsls r0, r0, #3 │ │ movs r5, #1 │ │ mov.w sl, #0 │ │ str r0, [sp, #24] │ │ ldr r0, [sp, #52] @ 0x34 │ │ add r0, sl │ │ vldr d16, [r0] │ │ movs r0, #0 │ │ str r0, [sp, #224] @ 0xe0 │ │ vcmp.f64 d16, d16 │ │ vmrs APSR_nzcv, fpscr │ │ - bvs.n 4e4e0 │ │ + bvs.n 4e6f0 │ │ vmov r1, r0, d16 │ │ cmp r0, #0 │ │ it mi │ │ mvnmi r1, r1 │ │ rev r4, r1 │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ it mi │ │ movmi.w r1, #4294967295 @ 0xffffffff │ │ eors r0, r1 │ │ rev r6, r0 │ │ ldr r0, [sp, #216] @ 0xd8 │ │ cmp r0, #7 │ │ - bls.n 4e4ea │ │ + bls.n 4e6fa │ │ movs r0, #0 │ │ adds r1, r5, r0 │ │ add.w r3, r0, #8 │ │ str r6, [r5, r0] │ │ mov r0, r9 │ │ mov r2, r5 │ │ str r4, [r1, #4] │ │ add r1, sp, #200 @ 0xc8 │ │ str r3, [sp, #224] @ 0xe0 │ │ mov r8, r9 │ │ - bl 5259c │ │ + bl 527ac │ │ ldrb.w r7, [sp, #164] @ 0xa4 │ │ movs r0, #17 │ │ ldr r4, [sp, #160] @ 0xa0 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r4, r0 │ │ - bne.w 4e6ea │ │ + bne.w 4e8fa │ │ lsls r0, r7, #31 │ │ - beq.w 4e720 │ │ + beq.w 4e930 │ │ add.w sl, sl, #8 │ │ ldr r0, [sp, #24] │ │ cmp r0, sl │ │ - bne.n 4e46c │ │ - b.n 4e654 │ │ + bne.n 4e67c │ │ + b.n 4e864 │ │ movs r6, #0 │ │ movs r4, #0 │ │ ldr r0, [sp, #216] @ 0xd8 │ │ cmp r0, #7 │ │ - bhi.n 4e4a2 │ │ + bhi.n 4e6b2 │ │ movs r0, #1 │ │ movs r1, #0 │ │ str r0, [sp, #0] │ │ add r0, sp, #216 @ 0xd8 │ │ movs r2, #8 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd r5, r0, [sp, #220] @ 0xdc │ │ - b.n 4e4a4 │ │ + b.n 4e6b4 │ │ add r1, sp, #100 @ 0x64 │ │ mov r0, r8 │ │ mov r2, r5 │ │ - bl 4299c │ │ + bl 42ca4 │ │ ldr r0, [sp, #160] @ 0xa0 │ │ str r0, [sp, #16] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 4e8f8 │ │ + beq.w 4eb08 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ str r0, [sp, #52] @ 0x34 │ │ ldr r0, [sp, #168] @ 0xa8 │ │ cmp r0, #0 │ │ - beq.w 4e658 │ │ + beq.w 4e868 │ │ ldr r6, [sp, #52] @ 0x34 │ │ movs r5, #1 │ │ add.w r0, r6, r0, lsl #3 │ │ str r0, [sp, #20] │ │ ldrb.w r0, [r4, #40] @ 0x28 │ │ str r0, [sp, #24] │ │ ldrd r1, r2, [r6] │ │ movs r0, #0 │ │ cmp.w sl, #2 │ │ str r0, [sp, #224] @ 0xe0 │ │ - bne.n 4e56a │ │ + bne.n 4e77a │ │ mov r0, r1 │ │ mov r1, r2 │ │ ldr r2, [sp, #24] │ │ movs r4, #0 │ │ strd r4, r4, [sp] │ │ - bl 4ee30 │ │ + bl 4f040 │ │ mov r7, r0 │ │ ldr r0, [sp, #216] @ 0xd8 │ │ cmp r0, #7 │ │ - bls.n 4e5a2 │ │ + bls.n 4e7b2 │ │ rev r0, r1 │ │ str r0, [r5, r4] │ │ adds r0, r5, r4 │ │ rev r1, r7 │ │ add.w r3, r4, #8 │ │ str r1, [r0, #4] │ │ str r3, [sp, #224] @ 0xe0 │ │ - b.n 4e574 │ │ + b.n 4e784 │ │ ldr r3, [sp, #24] │ │ add r0, sp, #216 @ 0xd8 │ │ - bl 4fbac │ │ + bl 4fdbc │ │ ldr r3, [sp, #224] @ 0xe0 │ │ ldr r5, [sp, #220] @ 0xdc │ │ add r1, sp, #200 @ 0xc8 │ │ mov r0, r8 │ │ mov r2, r5 │ │ - bl 5259c │ │ + bl 527ac │ │ ldrb.w r7, [sp, #164] @ 0xa4 │ │ movs r0, #17 │ │ ldr r4, [sp, #160] @ 0xa0 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r4, r0 │ │ - bne.w 4e700 │ │ + bne.w 4e910 │ │ lsls r0, r7, #31 │ │ - beq.w 4e72c │ │ + beq.w 4e93c │ │ adds r6, #8 │ │ ldr r0, [sp, #20] │ │ cmp r6, r0 │ │ - bne.n 4e532 │ │ - b.n 4e658 │ │ + bne.n 4e742 │ │ + b.n 4e868 │ │ movs r0, #1 │ │ mov r4, r1 │ │ str r0, [sp, #0] │ │ add r0, sp, #216 @ 0xd8 │ │ movs r1, #0 │ │ movs r2, #8 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ mov r1, r4 │ │ ldrd r5, r4, [sp, #220] @ 0xdc │ │ - b.n 4e558 │ │ + b.n 4e768 │ │ add r1, sp, #100 @ 0x64 │ │ mov r0, r8 │ │ mov r2, r5 │ │ - bl 42384 │ │ + bl 4268c │ │ ldr r0, [sp, #160] @ 0xa0 │ │ str r0, [sp, #24] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 4e8e0 │ │ + beq.w 4eaf0 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ str r0, [sp, #52] @ 0x34 │ │ ldr r0, [sp, #168] @ 0xa8 │ │ - cbz r0, 4e650 │ │ + cbz r0, 4e860 │ │ mov.w r8, r0, lsl #3 │ │ movs r5, #1 │ │ movs r6, #0 │ │ mov.w sl, #0 │ │ ldr r1, [sp, #52] @ 0x34 │ │ ldr r0, [sp, #216] @ 0xd8 │ │ str r6, [sp, #224] @ 0xe0 │ │ ldr.w r4, [r1, sl] │ │ add r1, sl │ │ cmp r0, #7 │ │ ldr r7, [r1, #4] │ │ mov.w r0, #0 │ │ - bls.n 4e63a │ │ + bls.n 4e84a │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ rev r2, r4 │ │ eors r1, r7 │ │ add.w r3, r0, #8 │ │ rev r1, r1 │ │ str r1, [r5, r0] │ │ adds r1, r5, r0 │ │ mov r0, r9 │ │ str r2, [r1, #4] │ │ add r1, sp, #200 @ 0xc8 │ │ mov r2, r5 │ │ str r3, [sp, #224] @ 0xe0 │ │ - bl 5259c │ │ + bl 527ac │ │ ldrb.w r7, [sp, #164] @ 0xa4 │ │ movs r0, #17 │ │ ldr r4, [sp, #160] @ 0xa0 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r4, r0 │ │ - bne.n 4e680 │ │ + bne.n 4e890 │ │ lsls r0, r7, #31 │ │ - beq.n 4e6a8 │ │ + beq.n 4e8b8 │ │ add.w sl, sl, #8 │ │ cmp r8, sl │ │ - bne.n 4e5e6 │ │ - b.n 4e650 │ │ + bne.n 4e7f6 │ │ + b.n 4e860 │ │ movs r0, #1 │ │ movs r1, #0 │ │ str r0, [sp, #0] │ │ add r0, sp, #216 @ 0xd8 │ │ movs r2, #8 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd r5, r0, [sp, #220] @ 0xdc │ │ - b.n 4e5fc │ │ + b.n 4e80c │ │ ldr r0, [sp, #24] │ │ - b.n 4e65a │ │ + b.n 4e86a │ │ ldr r0, [sp, #20] │ │ - b.n 4e65a │ │ + b.n 4e86a │ │ ldr r0, [sp, #16] │ │ cmp r0, #0 │ │ ldr.w sl, [sp, #64] @ 0x40 │ │ itt ne │ │ ldrne r0, [sp, #52] @ 0x34 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #216] @ 0xd8 │ │ - cbz r0, 4e67c │ │ + cbz r0, 4e88c │ │ movs r4, #17 │ │ movs r7, #1 │ │ movt r4, #32768 @ 0x8000 │ │ mov r8, r9 │ │ ldrd r6, r5, [sp, #56] @ 0x38 │ │ - b.n 4e74a │ │ + b.n 4e95a │ │ mov r8, r9 │ │ - b.n 4e258 │ │ + b.n 4e468 │ │ ldr r2, [sp, #28] │ │ ldr r1, [r2, #4] │ │ ldr r0, [r2, #0] │ │ ldr.w r2, [r2, #7] │ │ str.w r2, [sp, #191] @ 0xbf │ │ strd r0, r1, [sp, #184] @ 0xb8 │ │ - b.n 4e6b0 │ │ + b.n 4e8c0 │ │ ldr r2, [sp, #28] │ │ ldr r1, [r2, #4] │ │ ldr r0, [r2, #0] │ │ ldr.w r2, [r2, #7] │ │ str.w r2, [sp, #191] @ 0xbf │ │ strd r0, r1, [sp, #184] @ 0xb8 │ │ - b.n 4e6cc │ │ + b.n 4e8dc │ │ movs r4, #17 │ │ movs r7, #0 │ │ movt r4, #32768 @ 0x8000 │ │ ldr.w sl, [sp, #64] @ 0x40 │ │ mov r8, r9 │ │ ldr r5, [sp, #60] @ 0x3c │ │ ldr r0, [sp, #24] │ │ - cbz r0, 4e6d0 │ │ + cbz r0, 4e8e0 │ │ ldr r0, [sp, #52] @ 0x34 │ │ - blx d87c0 │ │ - b.n 4e6d0 │ │ + blx d87d0 │ │ + b.n 4e8e0 │ │ movs r4, #17 │ │ movs r7, #0 │ │ movt r4, #32768 @ 0x8000 │ │ ldr r5, [sp, #60] @ 0x3c │ │ mov r8, r9 │ │ ldr r6, [sp, #56] @ 0x38 │ │ - b.n 4e746 │ │ + b.n 4e956 │ │ ldr r2, [sp, #28] │ │ ldr r1, [r2, #4] │ │ ldr r0, [r2, #0] │ │ ldr.w r2, [r2, #7] │ │ str.w r2, [sp, #191] @ 0xbf │ │ strd r0, r1, [sp, #184] @ 0xb8 │ │ ldr r0, [sp, #24] │ │ - b.n 4e736 │ │ + b.n 4e946 │ │ ldr r2, [sp, #28] │ │ ldr r1, [r2, #4] │ │ ldr r0, [r2, #0] │ │ ldr.w r2, [r2, #7] │ │ str.w r2, [sp, #191] @ 0xbf │ │ strd r0, r1, [sp, #184] @ 0xb8 │ │ ldr r0, [sp, #20] │ │ - b.n 4e736 │ │ + b.n 4e946 │ │ ldr r2, [sp, #28] │ │ ldr r1, [r2, #4] │ │ ldr r0, [r2, #0] │ │ ldr.w r2, [r2, #7] │ │ str.w r2, [sp, #191] @ 0xbf │ │ strd r0, r1, [sp, #184] @ 0xb8 │ │ - b.n 4e734 │ │ + b.n 4e944 │ │ movs r4, #17 │ │ movs r7, #0 │ │ movt r4, #32768 @ 0x8000 │ │ ldr r0, [sp, #24] │ │ - b.n 4e736 │ │ + b.n 4e946 │ │ movs r4, #17 │ │ movs r7, #0 │ │ movt r4, #32768 @ 0x8000 │ │ ldr r0, [sp, #20] │ │ - b.n 4e736 │ │ + b.n 4e946 │ │ movs r4, #17 │ │ movs r7, #0 │ │ movt r4, #32768 @ 0x8000 │ │ ldr r0, [sp, #16] │ │ ldr.w sl, [sp, #64] @ 0x40 │ │ ldrd r6, r5, [sp, #56] @ 0x38 │ │ - cbz r0, 4e746 │ │ + cbz r0, 4e956 │ │ ldr r0, [sp, #52] @ 0x34 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #216] @ 0xd8 │ │ - cbz r0, 4e750 │ │ + cbz r0, 4e960 │ │ ldr r0, [sp, #220] @ 0xdc │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r4, r0 │ │ - beq.w 4e25c │ │ - b.n 4e862 │ │ + beq.w 4e46c │ │ + b.n 4ea72 │ │ ldr r7, [sp, #40] @ 0x28 │ │ ldr.w fp, [sp, #48] @ 0x30 │ │ ldr r0, [sp, #44] @ 0x2c │ │ - cbz r0, 4e7d4 │ │ + cbz r0, 4e9e4 │ │ ldr r0, [r7, #108] @ 0x6c │ │ - cbz r0, 4e79e │ │ + cbz r0, 4e9ae │ │ ldr r4, [r7, #104] @ 0x68 │ │ rsb r0, r0, r0, lsl #3 │ │ add r5, sp, #160 @ 0xa0 │ │ add.w r6, r4, r0, lsl #3 │ │ ldr r1, [r4, #0] │ │ ldr r2, [r4, #8] │ │ ldrd r3, r0, [sp, #272] @ 0x110 │ │ strd r3, r0, [sp] │ │ mov r0, r5 │ │ mov r3, sl │ │ - bl 4b4c8 │ │ + bl 4b7d0 │ │ ldr r0, [sp, #160] @ 0xa0 │ │ movs r1, #17 │ │ movt r1, #32768 @ 0x8000 │ │ cmp r0, r1 │ │ - bne.n 4e816 │ │ + bne.n 4ea26 │ │ adds r4, #56 @ 0x38 │ │ cmp r4, r6 │ │ - bne.n 4e778 │ │ + bne.n 4e988 │ │ ldr r0, [r7, #120] @ 0x78 │ │ - cbz r0, 4e7d4 │ │ + cbz r0, 4e9e4 │ │ ldr r4, [r7, #116] @ 0x74 │ │ rsb r0, r0, r0, lsl #3 │ │ add r5, sp, #160 @ 0xa0 │ │ add.w r6, r4, r0, lsl #3 │ │ ldr r1, [r4, #0] │ │ ldr r2, [r4, #8] │ │ ldrd r3, r0, [sp, #272] @ 0x110 │ │ strd r3, r0, [sp] │ │ mov r0, r5 │ │ mov r3, sl │ │ - bl 4b4c8 │ │ + bl 4b7d0 │ │ ldr r0, [sp, #160] @ 0xa0 │ │ movs r1, #17 │ │ movt r1, #32768 @ 0x8000 │ │ cmp r0, r1 │ │ - bne.n 4e816 │ │ + bne.n 4ea26 │ │ adds r4, #56 @ 0x38 │ │ cmp r4, r6 │ │ - bne.n 4e7ae │ │ + bne.n 4e9be │ │ ldr r0, [sp, #264] @ 0x108 │ │ - cbz r0, 4e7ec │ │ + cbz r0, 4e9fc │ │ ldrd r2, r3, [r7, #40] @ 0x28 │ │ add r1, sp, #100 @ 0x64 │ │ ldr r7, [sp, #272] @ 0x110 │ │ str r7, [sp, #0] │ │ ldr r7, [sp, #276] @ 0x114 │ │ strd r7, r1, [sp, #4] │ │ - bl 4fde0 │ │ + bl 4fff0 │ │ ldr r1, [sp, #76] @ 0x4c │ │ add r0, sp, #160 @ 0xa0 │ │ - bl 4ba20 │ │ + bl 4bd28 │ │ ldr r0, [sp, #160] @ 0xa0 │ │ movs r1, #17 │ │ movt r1, #32768 @ 0x8000 │ │ cmp r0, r1 │ │ - bne.n 4e816 │ │ + bne.n 4ea26 │ │ movs r0, #1 │ │ - b.n 4e806 │ │ + b.n 4ea16 │ │ movs r0, #0 │ │ movs r1, #17 │ │ strb.w r0, [fp, #4] │ │ movt r1, #32768 @ 0x8000 │ │ str.w r1, [fp] │ │ - b.n 4e82a │ │ + b.n 4ea3a │ │ add r3, sp, #160 @ 0xa0 │ │ ldmia r3, {r0, r1, r2, r3} │ │ str.w r1, [fp, #4] │ │ str.w r2, [fp, #8] │ │ str.w r0, [fp] │ │ str.w r3, [fp, #12] │ │ add r0, sp, #72 @ 0x48 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #72] @ 0x48 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #76] @ 0x4c │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ add sp, #228 @ 0xe4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr.w r1, [sp, #169] @ 0xa9 │ │ ldrb.w r7, [sp, #164] @ 0xa4 │ │ ldr r2, [sp, #216] @ 0xd8 │ │ ldr.w r0, [sp, #165] @ 0xa5 │ │ ldr r3, [sp, #172] @ 0xac │ │ strd r0, r1, [sp, #184] @ 0xb8 │ │ str.w r3, [sp, #191] @ 0xbf │ │ - cbz r2, 4e862 │ │ + cbz r2, 4ea72 │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr.w r2, [sp, #191] @ 0xbf │ │ ldrd r0, r1, [sp, #184] @ 0xb8 │ │ str.w r2, [sp, #119] @ 0x77 │ │ strd r0, r1, [sp, #112] @ 0x70 │ │ add r0, sp, #136 @ 0x88 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #136] @ 0x88 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #140] @ 0x8c │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ ldr r3, [sp, #48] @ 0x30 │ │ ldrd r0, r1, [sp, #112] @ 0x70 │ │ ldr.w r2, [sp, #119] @ 0x77 │ │ str r2, [r3, #12] │ │ str.w r1, [r3, #9] │ │ str.w r0, [r3, #5] │ │ strb r7, [r3, #4] │ │ str r4, [r3, #0] │ │ - b.n 4e82a │ │ - ldr r0, [pc, #152] @ (4e938 ) │ │ + b.n 4ea3a │ │ + ldr r0, [pc, #152] @ (4eb48 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #136] @ (4e930 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #136] @ (4eb40 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r1, [pc, #120] @ (4e928 ) │ │ + bl 3fd40 │ │ + ldr r1, [pc, #120] @ (4eb38 ) │ │ add r0, sp, #212 @ 0xd4 │ │ - ldr r2, [pc, #120] @ (4e92c ) │ │ + ldr r2, [pc, #120] @ (4eb3c ) │ │ add r1, pc │ │ add r2, pc │ │ - bl 40ff4 │ │ - ldr r3, [pc, #116] @ (4e934 ) │ │ + bl 412fc │ │ + ldr r3, [pc, #116] @ (4eb44 ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #128] @ (4e94c ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #128] @ (4eb5c ) │ │ ldr r2, [sp, #36] @ 0x24 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #68] @ (4e918 ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #68] @ (4eb28 ) │ │ movs r1, #40 @ 0x28 │ │ - ldr r2, [pc, #68] @ (4e91c ) │ │ + ldr r2, [pc, #68] @ (4eb2c ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r0, [pc, #92] @ (4e940 ) │ │ + bl 3fd54 │ │ + ldr r0, [pc, #92] @ (4eb50 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #56] @ (4e924 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #56] @ (4eb34 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #44] @ (4e920 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #44] @ (4eb30 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #76] @ (4e948 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #76] @ (4eb58 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #64] @ (4e944 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #64] @ (4eb54 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ movs r0, #1 │ │ movs r1, #8 │ │ - bl 3dfa4 │ │ - ldr r0, [pc, #40] @ (4e93c ) │ │ + bl 3e2ac │ │ + ldr r0, [pc, #40] @ (4eb4c ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - add r3, sp, #468 @ 0x1d4 │ │ - vclz.i q14, q1 │ │ + bl 3fd40 │ │ + add r1, sp, #404 @ 0x194 │ │ + vpaddl.u q14, q1 │ │ movs r0, r1 │ │ - stmia r4!, {r1, r3, r4, r6} │ │ - movs r0, r1 │ │ - stmia r4!, {r1, r4, r5, r6} │ │ - movs r0, r1 │ │ - ldrb r0, [r2, #6] │ │ - vsri.32 q14, q11, #4 │ │ + stmia r2!, {r1, r3, r4, r6} │ │ movs r0, r1 │ │ - stmia r2!, {r2, r5, r7} │ │ + stmia r2!, {r1, r4, r5, r6} │ │ movs r0, r1 │ │ - stmia r1!, {r1, r3, r5, r6} │ │ + strb r0, [r0, #30] │ │ + vrshr.u32 q14, q11, #4 │ │ movs r0, r1 │ │ - stmia r4!, {r2, r3, r4, r5, r6} │ │ + stmia r0!, {r2, r5, r7} │ │ movs r0, r1 │ │ - stmia r4!, {r1, r3, r5} │ │ + itet vs │ │ + movvs r0, r1 │ │ + stmiavc r2!, {r2, r3, r4, r5, r6} │ │ + movvs r0, r1 │ │ + stmia r2!, {r1, r3, r5} │ │ movs r0, r1 │ │ - stmia r4!, {r1, r3, r7} │ │ + stmia r2!, {r1, r3, r7} │ │ movs r0, r1 │ │ - stmia r4!, {r1, r3, r4, r5, r6} │ │ + stmia r2!, {r1, r3, r4, r5, r6} │ │ movs r0, r1 │ │ - stmia r4!, {r1, r4, r7} │ │ + stmia r2!, {r1, r4, r7} │ │ movs r0, r1 │ │ - stmia r6!, {r5, r6, r7} │ │ + stmia r4!, {r5, r6, r7} │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #60 @ 0x3c │ │ str r0, [sp, #8] │ │ mov.w r8, #0 │ │ movs r0, #1 │ │ cmp r2, #0 │ │ str.w r8, [sp, #40] @ 0x28 │ │ strd r8, r0, [sp, #32] │ │ - beq.w 4ebfc │ │ + beq.w 4ee0c │ │ ldrd fp, sl, [r3] │ │ add.w r0, r2, r2, lsl #1 │ │ ldr r7, [r3, #8] │ │ add.w r9, r1, #28 │ │ mov r6, r3 │ │ lsls r5, r0, #4 │ │ strd fp, sl, [sp, #12] │ │ str r7, [sp, #20] │ │ - b.n 4e9c6 │ │ + b.n 4ebd6 │ │ ldrb.w r3, [r9, #12] │ │ mov r0, r6 │ │ ldrb.w r2, [r9, #4] │ │ ldr.w r1, [r9] │ │ strd r8, r8, [sp] │ │ - bl 51b84 │ │ + bl 51d94 │ │ mov r2, r1 │ │ ldr r3, [sp, #32] │ │ ldr r1, [sp, #40] @ 0x28 │ │ subs r3, r3, r1 │ │ cmp r3, #7 │ │ - bls.w 4eb9a │ │ + bls.w 4edaa │ │ ldr r3, [sp, #36] @ 0x24 │ │ rev r2, r2 │ │ rev r0, r0 │ │ str r2, [r3, r1] │ │ adds r2, r3, r1 │ │ str r0, [r2, #4] │ │ add.w r0, r1, #8 │ │ str r0, [sp, #40] @ 0x28 │ │ add.w r9, r9, #48 @ 0x30 │ │ subs r5, #48 @ 0x30 │ │ - beq.w 4ebfc │ │ + beq.w 4ee0c │ │ ldrb.w r0, [r9, #13] │ │ cmp r0, #1 │ │ - beq.n 4e986 │ │ + beq.n 4eb96 │ │ ldrb.w r0, [r9, #4] │ │ cmp r0, #6 │ │ - bhi.w 4ec0a │ │ + bhi.w 4ee1a │ │ tbb [pc, r0] │ │ lsls r4, r0, #16 │ │ subs r2, r7, #0 │ │ - ldr r3, [pc, #544] @ (4ec04 ) │ │ + ldr r3, [pc, #544] @ (4ee14 ) │ │ lsls r4, r6, #1 │ │ ldr.w r0, [r9] │ │ cmp r7, r0 │ │ - bls.n 4ea06 │ │ + bls.n 4ec16 │ │ cmp r0, sl │ │ - bcs.w 4ec6a │ │ + bcs.w 4ee7a │ │ ldrb.w r4, [fp, r0] │ │ ldr r7, [sp, #40] @ 0x28 │ │ ldr r0, [sp, #32] │ │ cmp r7, r0 │ │ - bne.n 4ea10 │ │ + bne.n 4ec20 │ │ add r0, sp, #32 │ │ - bl 3ec24 │ │ - b.n 4ea10 │ │ + bl 3ef2c │ │ + b.n 4ec20 │ │ movs r4, #0 │ │ ldr r7, [sp, #40] @ 0x28 │ │ ldr r0, [sp, #32] │ │ cmp r7, r0 │ │ - beq.n 4e9fe │ │ + beq.n 4ec0e │ │ ldr r0, [sp, #36] @ 0x24 │ │ strb r4, [r0, r7] │ │ adds r0, r7, #1 │ │ - b.n 4eb94 │ │ + b.n 4eda4 │ │ ldr.w r0, [r9] │ │ cmp r7, r0 │ │ - bls.n 4eb14 │ │ + bls.n 4ed24 │ │ cmp sl, r0 │ │ - bcc.w 4ec52 │ │ + bcc.w 4ee62 │ │ sub.w r2, sl, r0 │ │ cmp r2, #3 │ │ - bls.w 4ec22 │ │ + bls.w 4ee32 │ │ ldr.w r0, [fp, r0] │ │ vmov s0, r0 │ │ vcmp.f32 s0, s0 │ │ vmrs APSR_nzcv, fpscr │ │ - bvs.n 4eb14 │ │ + bvs.n 4ed24 │ │ eor.w r1, r0, #2147483648 @ 0x80000000 │ │ cmp r0, #0 │ │ it mi │ │ mvnmi r1, r0 │ │ rev r4, r1 │ │ - b.n 4eb16 │ │ + b.n 4ed26 │ │ ldr.w r0, [r9] │ │ cmp r7, r0 │ │ - bls.n 4eb52 │ │ + bls.n 4ed62 │ │ cmp sl, r0 │ │ - bcc.w 4ec46 │ │ + bcc.w 4ee56 │ │ sub.w r2, sl, r0 │ │ cmp r2, #3 │ │ - bls.w 4ec22 │ │ + bls.w 4ee32 │ │ ldr.w r0, [fp, r0] │ │ eor.w r4, r0, #2147483648 @ 0x80000000 │ │ - b.n 4eb54 │ │ + b.n 4ed64 │ │ ldr.w r0, [r9] │ │ cmp r7, r0 │ │ - bls.n 4eb28 │ │ + bls.n 4ed38 │ │ cmp sl, r0 │ │ - bcc.w 4ec5e │ │ + bcc.w 4ee6e │ │ sub.w r2, sl, r0 │ │ cmp r2, #7 │ │ - bls.w 4ec2e │ │ + bls.w 4ee3e │ │ ldr.w r1, [fp, r0] │ │ add r0, fp │ │ ldr r0, [r0, #4] │ │ strd r1, r0, [sp, #24] │ │ vldr d16, [sp, #24] │ │ vcmp.f64 d16, d16 │ │ vmrs APSR_nzcv, fpscr │ │ - bvs.n 4eb28 │ │ + bvs.n 4ed38 │ │ vmov r1, r0, d16 │ │ cmp r0, #0 │ │ it mi │ │ mvnmi r1, r1 │ │ rev.w sl, r1 │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ it mi │ │ movmi.w r1, #4294967295 @ 0xffffffff │ │ eors r0, r1 │ │ rev.w fp, r0 │ │ - b.n 4eb30 │ │ + b.n 4ed40 │ │ ldr.w r2, [r9] │ │ add r0, sp, #48 @ 0x30 │ │ mov r1, r6 │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r0, [sp, #48] @ 0x30 │ │ cmp r0, #1 │ │ - bne.n 4eb68 │ │ + bne.n 4ed78 │ │ ldrd r0, r2, [sp, #52] @ 0x34 │ │ adds r1, r2, r0 │ │ - bcs.w 4ec18 │ │ + bcs.w 4ee28 │ │ cmp r1, sl │ │ - bhi.w 4ec18 │ │ + bhi.w 4ee28 │ │ add.w r1, fp, r0 │ │ - b.n 4eb6a │ │ + b.n 4ed7a │ │ ldr.w r0, [r9] │ │ cmp r7, r0 │ │ - bls.n 4eb76 │ │ + bls.n 4ed86 │ │ cmp sl, r0 │ │ - bcc.w 4ec3a │ │ + bcc.w 4ee4a │ │ sub.w r2, sl, r0 │ │ cmp r2, #7 │ │ - bls.w 4ec2e │ │ + bls.w 4ee3e │ │ add.w r1, fp, r0 │ │ ldr.w r4, [fp, r0] │ │ ldr r1, [r1, #4] │ │ eor.w r7, r1, #2147483648 @ 0x80000000 │ │ - b.n 4eb7a │ │ + b.n 4ed8a │ │ movs r4, #0 │ │ ldr r0, [sp, #32] │ │ ldr r1, [sp, #40] @ 0x28 │ │ subs r0, r0, r1 │ │ cmp r0, #3 │ │ - bls.n 4ebb4 │ │ + bls.n 4edc4 │ │ ldr r0, [sp, #36] @ 0x24 │ │ str r4, [r0, r1] │ │ adds r0, r1, #4 │ │ - b.n 4e9ba │ │ + b.n 4ebca │ │ mov.w fp, #0 │ │ mov.w sl, #0 │ │ ldr r0, [sp, #32] │ │ ldr r1, [sp, #40] @ 0x28 │ │ subs r0, r0, r1 │ │ cmp r0, #7 │ │ - bls.n 4ebd8 │ │ + bls.n 4ede8 │ │ ldr r0, [sp, #36] @ 0x24 │ │ str.w fp, [r0, r1] │ │ add r0, r1 │ │ str.w sl, [r0, #4] │ │ add.w r0, r1, #8 │ │ str r0, [sp, #40] @ 0x28 │ │ ldrd fp, sl, [sp, #12] │ │ - b.n 4e9bc │ │ + b.n 4ebcc │ │ movs r4, #0 │ │ ldr r0, [sp, #32] │ │ ldr r1, [sp, #40] @ 0x28 │ │ subs r0, r0, r1 │ │ cmp r0, #3 │ │ - bls.n 4ebc6 │ │ + bls.n 4edd6 │ │ ldr r0, [sp, #36] @ 0x24 │ │ rev r2, r4 │ │ str r2, [r0, r1] │ │ adds r0, r1, #4 │ │ - b.n 4e9ba │ │ + b.n 4ebca │ │ movs r1, #0 │ │ ldrb.w r3, [r9, #12] │ │ add r0, sp, #32 │ │ - bl 4fbac │ │ - b.n 4e9bc │ │ + bl 4fdbc │ │ + b.n 4ebcc │ │ movs r4, #0 │ │ movs r7, #0 │ │ ldr r0, [sp, #32] │ │ ldr r1, [sp, #40] @ 0x28 │ │ subs r0, r0, r1 │ │ cmp r0, #7 │ │ - bls.n 4ebea │ │ + bls.n 4edfa │ │ ldr r0, [sp, #36] @ 0x24 │ │ rev r2, r7 │ │ str r2, [r0, r1] │ │ add r0, r1 │ │ rev r2, r4 │ │ str r2, [r0, #4] │ │ add.w r0, r1, #8 │ │ str r0, [sp, #40] @ 0x28 │ │ ldr r7, [sp, #20] │ │ - b.n 4e9bc │ │ + b.n 4ebcc │ │ mov r4, r0 │ │ add r0, sp, #32 │ │ movs r3, #1 │ │ mov r7, r2 │ │ movs r2, #8 │ │ str r3, [sp, #0] │ │ - bl 4eddc │ │ + bl 4efec │ │ mov r2, r7 │ │ ldr r7, [sp, #20] │ │ ldr r1, [sp, #40] @ 0x28 │ │ mov r0, r4 │ │ - b.n 4e9aa │ │ + b.n 4ebba │ │ movs r0, #1 │ │ movs r2, #4 │ │ str r0, [sp, #0] │ │ add r0, sp, #32 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [sp, #40] @ 0x28 │ │ - b.n 4eb20 │ │ + b.n 4ed30 │ │ movs r0, #1 │ │ movs r2, #4 │ │ str r0, [sp, #0] │ │ add r0, sp, #32 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [sp, #40] @ 0x28 │ │ - b.n 4eb5e │ │ + b.n 4ed6e │ │ movs r0, #1 │ │ movs r2, #8 │ │ str r0, [sp, #0] │ │ add r0, sp, #32 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [sp, #40] @ 0x28 │ │ - b.n 4eb3a │ │ + b.n 4ed4a │ │ movs r0, #1 │ │ movs r2, #8 │ │ str r0, [sp, #0] │ │ add r0, sp, #32 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [sp, #40] @ 0x28 │ │ - b.n 4eb84 │ │ + b.n 4ed94 │ │ add r2, sp, #32 │ │ ldr r3, [sp, #8] │ │ ldmia r2, {r0, r1, r2} │ │ stmia r3!, {r0, r1, r2} │ │ add sp, #60 @ 0x3c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #104] @ (4ec74 ) │ │ + ldr r0, [pc, #104] @ (4ee84 ) │ │ movs r1, #40 @ 0x28 │ │ - ldr r2, [pc, #104] @ (4ec78 ) │ │ + ldr r2, [pc, #104] @ (4ee88 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r3, [pc, #100] @ (4ec80 ) │ │ + bl 3fd54 │ │ + ldr r3, [pc, #100] @ (4ee90 ) │ │ mov r2, sl │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #100] @ (4ec88 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #100] @ (4ee98 ) │ │ movs r0, #0 │ │ movs r1, #4 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #96] @ (4ec90 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #96] @ (4eea0 ) │ │ movs r0, #0 │ │ movs r1, #8 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #88] @ (4ec94 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #88] @ (4eea4 ) │ │ add r3, pc │ │ mov r1, sl │ │ mov r2, sl │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #52] @ (4ec7c ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #52] @ (4ee8c ) │ │ add r3, pc │ │ mov r1, sl │ │ mov r2, sl │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #56] @ (4ec8c ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #56] @ (4ee9c ) │ │ add r3, pc │ │ mov r1, sl │ │ mov r2, sl │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #56] @ (4ec98 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #56] @ (4eea8 ) │ │ add r3, pc │ │ mov r1, sl │ │ mov r2, sl │ │ - bl 3f9a8 │ │ - ldr r2, [pc, #24] @ (4ec84 ) │ │ + bl 3fcb0 │ │ + ldr r2, [pc, #24] @ (4ee94 ) │ │ mov r1, sl │ │ add r2, pc │ │ - bl 3fa74 │ │ - add r0, sp, #244 @ 0xf4 │ │ - vsra.u64 d28, d10, #4 │ │ + bl 3fd7c │ │ + add r6, pc, #180 @ (adr r6, 4ef3c ) │ │ + @ instruction: 0xfffcbf9a │ │ movs r0, r1 │ │ - stmia r3!, {r2, r6, r7} │ │ + stmia r1!, {r2, r6, r7} │ │ movs r0, r1 │ │ - stmia r3!, {r4, r7} │ │ + stmia r1!, {r4, r7} │ │ movs r0, r1 │ │ - bkpt 0x00fe │ │ + pop {r1, r2, r3, r4, r5, r6, r7} │ │ movs r0, r1 │ │ - bkpt 0x0014 │ │ + pop {r2, r4} │ │ movs r0, r1 │ │ - stmia r2!, {r3, r4, r5, r6, r7} │ │ + stmia r0!, {r3, r4, r5, r6, r7} │ │ movs r0, r1 │ │ - bkpt 0x0018 │ │ + pop {r3, r4} │ │ movs r0, r1 │ │ - stmia r3!, {r4, r5, r6, r7} │ │ + stmia r1!, {r4, r5, r6, r7} │ │ movs r0, r1 │ │ - stmia r2!, {r2, r3, r4, r5, r6, r7} │ │ + stmia r0!, {r2, r3, r4, r5, r6, r7} │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ sub sp, #52 @ 0x34 │ │ ldr r5, [r1, #0] │ │ mov r4, r0 │ │ mov r9, r2 │ │ mov r6, r1 │ │ ldrb.w r0, [r5, #40] @ 0x28 │ │ - cbz r0, 4ecda │ │ + cbz r0, 4eeea │ │ ldr r7, [r6, #4] │ │ ldr r0, [r7, #0] │ │ cmp r0, #0 │ │ - beq.n 4ed8a │ │ + beq.n 4ef9a │ │ ldr r1, [r7, #4] │ │ movs r0, #0 │ │ strd r3, r0, [sp] │ │ add r0, sp, #16 │ │ mov r8, r3 │ │ movs r2, #16 │ │ mov r3, r9 │ │ - bl 49e28 │ │ + bl 4a130 │ │ ldrd r1, r0, [sp, #16] │ │ cmp r1, #1 │ │ - bne.n 4ed2c │ │ + bne.n 4ef3c │ │ add r3, sp, #24 │ │ ldmia r3, {r1, r2, r3} │ │ - b.n 4ed1e │ │ + b.n 4ef2e │ │ ldr r7, [r6, #4] │ │ ldr r0, [r7, #0] │ │ cmp r0, #0 │ │ - beq.n 4ed8a │ │ + beq.n 4ef9a │ │ ldr r0, [r6, #8] │ │ add r2, sp, #40 @ 0x28 │ │ ldrd r0, r1, [r0] │ │ eor.w r1, r1, #2147483648 @ 0x80000000 │ │ str r1, [sp, #44] @ 0x2c │ │ str r0, [sp, #40] @ 0x28 │ │ movs r0, #8 │ │ ldr r1, [r7, #4] │ │ strd r2, r0, [sp] │ │ add r0, sp, #16 │ │ mov r2, r9 │ │ - bl 51ac8 │ │ + bl 51cd8 │ │ movs r0, #17 │ │ ldr r1, [sp, #16] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - bne.n 4ed1a │ │ + bne.n 4ef2a │ │ str r0, [r4, #0] │ │ movs r0, #1 │ │ strb r0, [r4, #4] │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ add r3, sp, #16 │ │ ldmia r3, {r0, r1, r2, r3} │ │ str r1, [r4, #4] │ │ str r2, [r4, #8] │ │ str r0, [r4, #0] │ │ str r3, [r4, #12] │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ - cbz r0, 4ed82 │ │ + cbz r0, 4ef92 │ │ ldr r0, [sp, #32] │ │ cmp r0, #8 │ │ - bne.n 4edb4 │ │ + bne.n 4efc4 │ │ ldrb.w r0, [r5, #41] @ 0x29 │ │ - cbz r0, 4ed52 │ │ + cbz r0, 4ef62 │ │ ldr r1, [sp, #28] │ │ ldr r0, [r1, #0] │ │ ldr r1, [r1, #4] │ │ eor.w r3, r1, #2147483648 @ 0x80000000 │ │ ldr r1, [r6, #8] │ │ ldrd r1, r2, [r1] │ │ eors r2, r3 │ │ eors r1, r0 │ │ orrs r1, r2 │ │ - bne.n 4ed62 │ │ + bne.n 4ef72 │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ subs r0, #13 │ │ str r0, [r4, #0] │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ ldr r5, [r6, #12] │ │ ldmia r5, {r1, r2, r5} │ │ ldr r5, [r5, #0] │ │ strd r0, r3, [sp, #8] │ │ add r0, sp, #16 │ │ movs r3, #1 │ │ str r5, [sp, #0] │ │ - bl 4e084 │ │ + bl 4e294 │ │ ldr r0, [sp, #16] │ │ movs r1, #17 │ │ movt r1, #32768 @ 0x8000 │ │ cmp r0, r1 │ │ - bne.n 4ed92 │ │ + bne.n 4efa2 │ │ mov r3, r8 │ │ ldr r0, [r7, #0] │ │ cmp r0, #0 │ │ - bne.n 4ece2 │ │ - ldr r0, [pc, #64] @ (4edcc ) │ │ + bne.n 4eef2 │ │ + ldr r0, [pc, #64] @ (4efdc ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ ldr.w r1, [sp, #25] │ │ ldrb.w r3, [sp, #20] │ │ ldr.w r7, [sp, #21] │ │ ldr r2, [sp, #28] │ │ str.w r1, [r4, #9] │ │ str.w r7, [r4, #5] │ │ str r2, [r4, #12] │ │ strb r3, [r4, #4] │ │ str r0, [r4, #0] │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ - ldr r0, [pc, #24] @ (4edd0 ) │ │ + ldr r0, [pc, #24] @ (4efe0 ) │ │ add r2, sp, #16 │ │ - ldr r3, [pc, #24] @ (4edd4 ) │ │ - ldr r1, [pc, #28] @ (4edd8 ) │ │ + ldr r3, [pc, #24] @ (4efe4 ) │ │ + ldr r1, [pc, #28] @ (4efe8 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ nop │ │ - pop {r6, r7, pc} │ │ + cbnz r0, 4f050 │ │ movs r0, r1 │ │ - add r6, pc, #796 @ (adr r6, 4f0f0 ) │ │ - vtbl.8 d27, {d28-d31}, d14 │ │ + add r4, pc, #732 @ (adr r4, 4f2c0 ) │ │ + vqrshrn.u64 d27, q7, #4 │ │ movs r0, r1 │ │ - pop {r2, r3, r5, r7} │ │ + hlt 0x002c │ │ movs r0, r1 │ │ push {r4, r5, r7, lr} │ │ sub sp, #24 │ │ mov r4, r0 │ │ adds r0, r2, r1 │ │ - bcs.n 4ee2a │ │ + bcs.n 4f03a │ │ ldrd r1, r2, [r4] │ │ movs r5, #4 │ │ ldr.w ip, [sp, #40] @ 0x28 │ │ cmp.w r0, r1, lsl #1 │ │ strd r3, ip, [sp] │ │ it ls │ │ lslls r0, r1, #1 │ │ @@ -58138,39 +58234,39 @@ │ │ it eq │ │ moveq r5, #8 │ │ cmp r0, r5 │ │ it hi │ │ movhi r5, r0 │ │ add r0, sp, #12 │ │ mov r3, r5 │ │ - bl 47876 │ │ + bl 47b7e │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #0 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #36 @ 0x24 │ │ ldrd sl, r4, [sp, #72] @ 0x48 │ │ cmp r0, #0 │ │ - beq.w 4f3ba │ │ + beq.w 4f5ca │ │ mov r3, r1 │ │ mov r1, r0 │ │ cmp r2, #0 │ │ - beq.n 4eed8 │ │ + beq.n 4f0e8 │ │ cmp r3, #17 │ │ - bcs.w 4ef78 │ │ + bcs.w 4f188 │ │ cmp r3, #8 │ │ - bls.w 4f616 │ │ + bls.w 4f826 │ │ adds r7, r1, r3 │ │ movw r2, #21050 @ 0x523a │ │ movw r0, #48187 @ 0xbc3b │ │ movt r2, #2454 @ 0x996 │ │ ldr.w r6, [r7, #-8] │ │ subs.w r2, r2, sl │ │ movt r0, #44886 @ 0xaf56 │ │ @@ -58203,23 +58299,23 @@ │ │ adc.w r3, r7, #0 │ │ adds r1, r1, r2 │ │ adcs r0, r3 │ │ eor.w r5, r5, lr │ │ eors r6, r4 │ │ adds r1, r1, r5 │ │ adcs r0, r6 │ │ - b.n 4f396 │ │ + b.n 4f5a6 │ │ add r0, sp, #24 │ │ mov r2, r3 │ │ - bl 3e320 │ │ + bl 3e628 │ │ ldrd fp, r1, [sp, #28] │ │ cmp r1, #17 │ │ - bcs.w 4f3c4 │ │ + bcs.w 4f5d4 │ │ cmp r1, #8 │ │ - bls.w 4f6b6 │ │ + bls.w 4f8c6 │ │ add.w r3, fp, r1 │ │ movw r2, #21050 @ 0x523a │ │ movw r0, #48187 @ 0xbc3b │ │ movt r2, #2454 @ 0x996 │ │ ldr.w r7, [r3, #-8] │ │ subs.w r2, r2, sl │ │ movt r0, #44886 @ 0xaf56 │ │ @@ -58252,31 +58348,31 @@ │ │ adds r1, r1, r5 │ │ eor.w r6, r6, lr │ │ adc.w r3, r3, #0 │ │ adds r1, r1, r2 │ │ adcs r0, r3 │ │ adds r1, r1, r6 │ │ adcs r0, r7 │ │ - b.w 4faca │ │ + b.w 4fcda │ │ cmp r3, #129 @ 0x81 │ │ - bcs.w 4f75a │ │ + bcs.w 4f96a │ │ movw r0, #51847 @ 0xca87 │ │ movw r2, #31153 @ 0x79b1 │ │ movt r0, #34283 @ 0x85eb │ │ movt r2, #40503 @ 0x9e37 │ │ umull fp, r0, r3, r0 │ │ cmp r3, #33 @ 0x21 │ │ mla r0, r3, r2, r0 │ │ str r0, [sp, #20] │ │ - bcc.w 4f2b4 │ │ + bcc.w 4f4c4 │ │ cmp r3, #64 @ 0x40 │ │ str.w fp, [sp, #16] │ │ - bls.w 4f1b2 │ │ + bls.w 4f3c2 │ │ cmp r3, #96 @ 0x60 │ │ - bls.w 4f0b0 │ │ + bls.w 4f2c0 │ │ movw r2, #40904 @ 0x9fc8 │ │ adds r7, r1, r3 │ │ movw r0, #30937 @ 0x78d9 │ │ movt r2, #51582 @ 0xc97e │ │ subs.w ip, r2, sl │ │ movt r0, #25715 @ 0x6473 │ │ ldr.w r2, [r7, #-56] │ │ @@ -58578,28 +58674,28 @@ │ │ mla r4, r0, r2, r1 │ │ eor.w sl, r4, r3 │ │ mov r0, sl │ │ mov r1, r4 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ cmp r1, #129 @ 0x81 │ │ - bcs.w 4f778 │ │ + bcs.w 4f988 │ │ movw r0, #51847 @ 0xca87 │ │ movw r2, #31153 @ 0x79b1 │ │ movt r0, #34283 @ 0x85eb │ │ movt r2, #40503 @ 0x9e37 │ │ umull r5, r0, r1, r0 │ │ cmp r1, #33 @ 0x21 │ │ mla r0, r1, r2, r0 │ │ strd r0, fp, [sp, #16] │ │ - bcc.w 4f790 │ │ + bcc.w 4f9a0 │ │ cmp r1, #64 @ 0x40 │ │ - bls.w 4f8d8 │ │ + bls.w 4fae8 │ │ cmp r1, #96 @ 0x60 │ │ - bls.w 4f504 │ │ + bls.w 4f714 │ │ add.w r3, fp, r1 │ │ movw r2, #40904 @ 0x9fc8 │ │ movw r0, #30937 @ 0x78d9 │ │ movt r2, #51582 @ 0xc97e │ │ movt r0, #25715 @ 0x6473 │ │ subs.w r2, r2, sl │ │ ldr.w r6, [r3, #-56] │ │ @@ -58749,17 +58845,17 @@ │ │ eors r3, r7 │ │ ldr r7, [sp, #12] │ │ eor.w r7, r7, r8 │ │ adds r2, r2, r7 │ │ str r2, [sp, #12] │ │ adcs r0, r3 │ │ str r0, [sp, #16] │ │ - b.n 4f8da │ │ + b.n 4faea │ │ cmp r3, #3 │ │ - bls.w 4f794 │ │ + bls.w 4f9a4 │ │ movw r2, #54690 @ 0xd5a2 │ │ ldr r7, [r1, #0] │ │ add r1, r3 │ │ movw r0, #45428 @ 0xb174 │ │ movt r2, #50668 @ 0xc5ec │ │ rev.w r6, sl │ │ movt r0, #51002 @ 0xc73a │ │ @@ -58801,15 +58897,15 @@ │ │ eor.w r4, r0, r0, lsr #28 │ │ eor.w sl, r1, r2 │ │ mov r0, sl │ │ mov r1, r4 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ cmp r1, #3 │ │ - bls.w 4f81e │ │ + bls.w 4fa2e │ │ movw r2, #54690 @ 0xd5a2 │ │ add.w r6, fp, r1 │ │ movw r0, #45428 @ 0xb174 │ │ movt r2, #50668 @ 0xc5ec │ │ rev.w r7, sl │ │ movt r0, #51002 @ 0xc73a │ │ ldr.w r3, [fp] │ │ @@ -58848,50 +58944,50 @@ │ │ mla r0, r0, r7, r1 │ │ lsrs r1, r2, #28 │ │ orr.w r1, r1, r0, lsl #4 │ │ eor.w r4, r0, r0, lsr #28 │ │ eor.w sl, r1, r2 │ │ ldr r0, [sp, #24] │ │ cmp r0, #0 │ │ - bne.w 4faf6 │ │ - b.n 4f3ba │ │ + bne.w 4fd06 │ │ + b.n 4f5ca │ │ cmp r3, #241 @ 0xf1 │ │ - bcs.w 4f8ae │ │ - ldr r0, [pc, #932] @ (4fb08 ) │ │ + bcs.w 4fabe │ │ + ldr r0, [pc, #932] @ (4fd18 ) │ │ mov r2, sl │ │ add r0, pc │ │ str r0, [sp, #72] @ 0x48 │ │ mov r0, r1 │ │ mov r1, r3 │ │ mov r3, r4 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w 996ec │ │ + b.w 996f8 │ │ cmp r1, #241 @ 0xf1 │ │ - bcs.w 4f8c0 │ │ - ldr r0, [pc, #908] @ (4fb0c ) │ │ + bcs.w 4fad0 │ │ + ldr r0, [pc, #908] @ (4fd1c ) │ │ mov r2, sl │ │ mov r3, r4 │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ - bl 996ec │ │ - b.n 4f8ca │ │ + bl 996f8 │ │ + b.n 4fada │ │ str r5, [sp, #12] │ │ - b.n 4f9da │ │ + b.n 4fbea │ │ movw ip, #26513 @ 0x6791 │ │ movw r0, #31225 @ 0x79f9 │ │ movw lr, #44605 @ 0xae3d │ │ movw r7, #60239 @ 0xeb4f │ │ movt ip, #5718 @ 0x1656 │ │ movt r0, #40503 @ 0x9e37 │ │ movt lr, #49842 @ 0xc2b2 │ │ movt r7, #10196 @ 0x27d4 │ │ cmp r3, #0 │ │ - beq.w 4fb10 │ │ + beq.w 4fd20 │ │ lsrs r2, r3, #1 │ │ ldrb r6, [r1, #0] │ │ ldrb r2, [r1, r2] │ │ add r1, r3 │ │ ldrb.w r1, [r1, #-1] │ │ lsls r2, r2, #24 │ │ orr.w r2, r2, r6, lsl #16 │ │ @@ -58924,15 +59020,15 @@ │ │ movw lr, #44605 @ 0xae3d │ │ movw r3, #60239 @ 0xeb4f │ │ movt ip, #5718 @ 0x1656 │ │ movt r0, #40503 @ 0x9e37 │ │ movt lr, #49842 @ 0xc2b2 │ │ movt r3, #10196 @ 0x27d4 │ │ cmp r1, #0 │ │ - beq.w 4fb5e │ │ + beq.w 4fd6e │ │ lsrs r2, r1, #1 │ │ ldrb.w r6, [fp] │ │ ldrb.w r2, [fp, r2] │ │ add.w r7, fp, r1 │ │ lsls r6, r6, #16 │ │ orr.w r1, r6, r1, lsl #8 │ │ ldrb.w r7, [r7, #-1] │ │ @@ -58954,33 +59050,33 @@ │ │ eors r2, r3 │ │ umull r3, r7, r2, r0 │ │ mla r2, r2, r6, r7 │ │ mla r4, r1, r0, r2 │ │ eor.w sl, r4, r3 │ │ ldr r0, [sp, #24] │ │ cmp r0, #0 │ │ - bne.w 4faf6 │ │ - b.n 4f3ba │ │ + bne.w 4fd06 │ │ + b.n 4f5ca │ │ mov r0, r1 │ │ mov r1, r3 │ │ mov r2, sl │ │ mov r3, r4 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w 99110 │ │ + b.w 9911c │ │ mov r0, fp │ │ mov r2, sl │ │ mov r3, r4 │ │ - bl 99110 │ │ + bl 9911c │ │ mov sl, r0 │ │ mov r4, r1 │ │ ldr r0, [sp, #24] │ │ cmp r0, #0 │ │ - bne.w 4faf6 │ │ - b.n 4f3ba │ │ + bne.w 4fd06 │ │ + b.n 4f5ca │ │ str r5, [sp, #12] │ │ add.w r3, fp, r1 │ │ movw r2, #13792 @ 0x35e0 │ │ movw r0, #14977 @ 0x3a81 │ │ movt r2, #59024 @ 0xe690 │ │ movt r0, #19494 @ 0x4c26 │ │ subs.w r2, r2, sl │ │ @@ -59133,24 +59229,24 @@ │ │ umull r3, r7, r1, r2 │ │ movt r6, #5718 @ 0x1656 │ │ mla r1, r1, r6, r7 │ │ mla r4, r0, r2, r1 │ │ eor.w sl, r4, r3 │ │ ldr r0, [sp, #24] │ │ cmp r0, #0 │ │ - beq.w 4f3ba │ │ + beq.w 4f5ca │ │ mov r0, fp │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, sl │ │ mov r1, r4 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ nop │ │ - b.n 4fb3c │ │ - @ instruction: 0xfffcdff8 │ │ + udf #8 │ │ + vqrdmulh.s , q14, d24[0] │ │ vpadal.s , │ │ asrs r0, r2, #4 │ │ movw r5, #7644 @ 0x1ddc │ │ movt r1, #34598 @ 0x8726 │ │ movt r5, #24002 @ 0x5dc2 │ │ eors r1, r4 │ │ add.w r2, ip, #32 │ │ @@ -59188,553 +59284,553 @@ │ │ eors r3, r5 │ │ umull r7, r6, r3, r0 │ │ mla r2, r3, r2, r6 │ │ mla r4, r1, r0, r2 │ │ eor.w sl, r4, r7 │ │ ldr r0, [sp, #24] │ │ cmp r0, #0 │ │ - bne.n 4faf6 │ │ - b.w 4f3ba │ │ + bne.n 4fd06 │ │ + b.w 4f5ca │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ sub sp, #20 │ │ mov r4, r0 │ │ - cbz r1, 4fbc4 │ │ + cbz r1, 4fdd4 │ │ mov r6, r2 │ │ - cbz r3, 4fbdc │ │ + cbz r3, 4fdec │ │ cmp.w r6, #4294967295 @ 0xffffffff │ │ - bgt.n 4fc32 │ │ - bl 3e03c │ │ + bgt.n 4fe42 │ │ + bl 3e344 │ │ ldr r5, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r5, r0 │ │ - beq.n 4fc98 │ │ + beq.n 4fea8 │ │ ldr r0, [r4, #4] │ │ movs r1, #0 │ │ strb r1, [r0, r5] │ │ adds r0, r5, #1 │ │ str r0, [r4, #8] │ │ add sp, #20 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ add r0, sp, #8 │ │ mov r2, r6 │ │ - bl 3e320 │ │ + bl 3e628 │ │ ldrd r8, r6, [sp, #12] │ │ movs r0, #0 │ │ cmp.w r0, r6, lsr #10 │ │ - beq.n 4fc5c │ │ + beq.n 4fe6c │ │ ldr.w r9, [r4] │ │ ldr r7, [r4, #8] │ │ sub.w r1, r9, r7 │ │ cmp.w r0, r1, lsr #10 │ │ - beq.n 4fca8 │ │ + beq.n 4feb8 │ │ ldr r5, [r4, #4] │ │ mov r1, r8 │ │ mov.w r2, #1024 @ 0x400 │ │ adds r0, r5, r7 │ │ - bl d53c6 │ │ + bl d52ea │ │ mov r0, r8 │ │ mov r1, r6 │ │ add.w r7, r7, #1024 @ 0x400 │ │ str r7, [r4, #8] │ │ - bl 98f20 │ │ + bl 98f2c │ │ sub.w r2, r9, r7 │ │ cmp r2, #7 │ │ - bls.n 4fcc2 │ │ + bls.n 4fed2 │ │ str r0, [r5, r7] │ │ add.w r0, r7, #8 │ │ str r0, [r4, #8] │ │ adds r0, r5, r7 │ │ str r1, [r0, #4] │ │ - b.n 4fc86 │ │ - cbz r6, 4fc46 │ │ + b.n 4fe96 │ │ + cbz r6, 4fe56 │ │ mov r0, r6 │ │ mov r5, r1 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 4fcf4 │ │ + beq.n 4ff04 │ │ mov r8, r0 │ │ mov r1, r5 │ │ - b.n 4fc4a │ │ + b.n 4fe5a │ │ mov.w r8, #1 │ │ mov r0, r8 │ │ mov r2, r6 │ │ - bl d53c6 │ │ + bl d52ea │ │ str r6, [sp, #8] │ │ movs r0, #0 │ │ cmp.w r0, r6, lsr #10 │ │ - bne.n 4fbf0 │ │ + bne.n 4fe00 │ │ ldr r0, [r4, #0] │ │ ldr r7, [r4, #8] │ │ - cbz r6, 4fc78 │ │ + cbz r6, 4fe88 │ │ subs r0, r0, r7 │ │ cmp r6, r0 │ │ - bhi.n 4fce0 │ │ + bhi.n 4fef0 │ │ ldr r0, [r4, #4] │ │ mov r1, r8 │ │ mov r2, r6 │ │ add r0, r7 │ │ - bl d53c6 │ │ + bl d52ea │ │ adds r0, r7, r6 │ │ - b.n 4fc84 │ │ + b.n 4fe94 │ │ cmp r0, r7 │ │ - beq.n 4fca0 │ │ + beq.n 4feb0 │ │ ldr r0, [r4, #4] │ │ movs r1, #1 │ │ strb r1, [r0, r7] │ │ adds r0, r7, #1 │ │ str r0, [r4, #8] │ │ ldr r0, [sp, #8] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add sp, #20 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ mov r0, r4 │ │ - bl 3ec24 │ │ - b.n 4fbcc │ │ + bl 3ef2c │ │ + b.n 4fddc │ │ mov r0, r4 │ │ - bl 3ec24 │ │ - b.n 4fc7c │ │ + bl 3ef2c │ │ + b.n 4fe8c │ │ movs r0, #1 │ │ mov r1, r7 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ mov.w r2, #1024 @ 0x400 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w r9, [r4] │ │ ldr r7, [r4, #8] │ │ - b.n 4fc00 │ │ + b.n 4fe10 │ │ movs r2, #1 │ │ mov r5, r0 │ │ str r2, [sp, #0] │ │ mov r6, r1 │ │ mov r0, r4 │ │ mov r1, r7 │ │ movs r2, #8 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ mov r0, r5 │ │ ldrd r5, r7, [r4, #4] │ │ mov r1, r6 │ │ - b.n 4fc24 │ │ + b.n 4fe34 │ │ movs r0, #1 │ │ mov r1, r7 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ mov r2, r6 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r7, [r4, #8] │ │ - b.n 4fc68 │ │ + b.n 4fe78 │ │ movs r0, #1 │ │ mov r1, r6 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ sub sp, #32 │ │ mov r9, r0 │ │ movs r0, #8 │ │ mov r7, r3 │ │ mov r4, r2 │ │ mov r6, r1 │ │ mov.w r8, #8 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 4fdca │ │ + beq.n 4ffda │ │ mov r5, r0 │ │ ldrd r1, r0, [sp, #64] @ 0x40 │ │ eor.w r2, r7, #2147483648 @ 0x80000000 │ │ strd r1, r0, [sp, #12] │ │ str r2, [r5, #4] │ │ add r1, sp, #4 │ │ add r2, sp, #12 │ │ mov r0, r6 │ │ movs r3, #0 │ │ str r4, [r5, #0] │ │ strd r5, r8, [sp, #4] │ │ - blx 9df00 │ │ + blx 9df0c │ │ movs r6, #3 │ │ adds r1, r0, #1 │ │ movt r6, #32768 @ 0x8000 │ │ cmp r1, #2 │ │ - bcs.n 4fd5a │ │ + bcs.n 4ff6a │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add.w r0, r6, #14 │ │ str.w r0, [r9] │ │ add sp, #32 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ movw r1, #34744 @ 0x87b8 │ │ movt r1, #65535 @ 0xffff │ │ cmp r0, r1 │ │ - bne.n 4fd68 │ │ - b.n 4fdb6 │ │ + bne.n 4ff78 │ │ + b.n 4ffc6 │ │ mov sl, r0 │ │ - blx a96f8 │ │ + blx a9704 │ │ mov r4, r0 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #20 │ │ mov r1, r4 │ │ - bl 402e0 │ │ + bl 405e8 │ │ add r6, sp, #20 │ │ ldmia r6, {r0, r1, r6} │ │ - ldr r7, [pc, #88] @ (4fddc ) │ │ + ldr r7, [pc, #88] @ (4ffec ) │ │ cmp r0, #0 │ │ add r7, pc │ │ ite eq │ │ moveq r7, r1 │ │ movne r6, #27 │ │ cmp.w r6, #4294967295 @ 0xffffffff │ │ - bgt.n 4fd98 │ │ - bl 3e03c │ │ - cbz r6, 4fda6 │ │ + bgt.n 4ffa8 │ │ + bl 3e344 │ │ + cbz r6, 4ffb6 │ │ mov r0, r6 │ │ - blx d87f0 │ │ - cbz r0, 4fdd2 │ │ + blx d8810 │ │ + cbz r0, 4ffe2 │ │ mov r8, r0 │ │ - b.n 4fdaa │ │ + b.n 4ffba │ │ mov.w r8, #1 │ │ mov r0, r8 │ │ mov r1, r7 │ │ mov r2, r6 │ │ - bl d53c6 │ │ + bl d52ea │ │ mov r0, sl │ │ strd r6, r0, [r9, #8] │ │ mov r0, r5 │ │ strd r6, r8, [r9] │ │ - blx d87c0 │ │ + blx d87d0 │ │ add sp, #32 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ movs r0, #1 │ │ movs r1, #8 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r1, r6 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - ldr r7, [r3, #80] @ 0x50 │ │ + ldr r7, [r1, #48] @ 0x30 │ │ vtbl.8 d30, {d12-d13}, d29 │ │ - ldr r7, [pc, #960] @ (501a4 ) │ │ + ldr r7, [pc, #960] @ (503b4 ) │ │ sub sp, #100 @ 0x64 │ │ mov sl, r0 │ │ ldr r0, [r0, #32] │ │ adds r0, #8 │ │ - bl 50818 │ │ + bl 50a28 │ │ mov r9, r0 │ │ ldr r0, [r0, #40] @ 0x28 │ │ movw fp, #31829 @ 0x7c55 │ │ movt fp, #32586 @ 0x7f4a │ │ cmp r0, #0 │ │ - beq.n 4fe88 │ │ + beq.n 50098 │ │ ldr.w r4, [r9, #36] @ 0x24 │ │ add.w r8, r4, r0, lsl #2 │ │ ldr.w r6, [r4], #4 │ │ ldr.w r3, [sl] │ │ ldr.w r1, [sl, #16] │ │ ldr r2, [r6, #16] │ │ mul.w r0, r2, fp │ │ ands r0, r3 │ │ cmp r1, r0 │ │ - bls.w 507d2 │ │ + bls.w 509e2 │ │ ldr.w r1, [sl, #12] │ │ add.w r0, r0, r0, lsl #1 │ │ ldr r3, [r6, #20] │ │ add.w r0, r1, r0, lsl #2 │ │ ldrd r0, r1, [r0, #4] │ │ lsls r1, r1, #4 │ │ - cbz r1, 4fe48 │ │ + cbz r1, 50058 │ │ ldrd r5, r7, [r0], #16 │ │ subs r1, #16 │ │ eors r7, r3 │ │ eors r5, r2 │ │ orrs r7, r5 │ │ - bne.n 4fe36 │ │ - b.n 4fe88 │ │ + bne.n 50046 │ │ + b.n 50098 │ │ ldrex r0, [r6] │ │ adds r1, r0, #1 │ │ strex r7, r1, [r6] │ │ cmp r7, #0 │ │ - bne.n 4fe48 │ │ + bne.n 50058 │ │ cmp r0, #0 │ │ - bmi.w 507da │ │ + bmi.w 509ea │ │ mov r0, sl │ │ str r6, [sp, #0] │ │ - bl 50c74 │ │ - cbz r0, 4fe84 │ │ + bl 50e84 │ │ + cbz r0, 50094 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 4fe6a │ │ + bne.n 5007a │ │ cmp r1, #1 │ │ itt eq │ │ dmbeq ish │ │ - bleq 476ec │ │ + bleq 46a1c │ │ cmp r4, r8 │ │ - bne.n 4fe08 │ │ + bne.n 50018 │ │ ldr r0, [sp, #136] @ 0x88 │ │ ldr.w r2, [r9] │ │ ldr.w r1, [r9, #16] │ │ mul.w r0, r0, fp │ │ ands r0, r2 │ │ cmp r1, r0 │ │ - bls.w 507d2 │ │ + bls.w 509e2 │ │ ldr.w r1, [r9, #12] │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r0, r1, r0, lsl #2 │ │ ldrd r0, r1, [r0, #4] │ │ add.w r1, r1, r1, lsl #1 │ │ subs r0, #24 │ │ lsls r1, r1, #3 │ │ cmp r1, #0 │ │ - beq.n 4ff5a │ │ + beq.n 5016a │ │ ldr.w r2, [r0, #24]! │ │ subs r1, #24 │ │ ldr r7, [sp, #136] @ 0x88 │ │ ldr r3, [r0, #4] │ │ eors r2, r7 │ │ ldr r7, [sp, #140] @ 0x8c │ │ eors r3, r7 │ │ orrs r2, r3 │ │ - bne.n 4feb6 │ │ + bne.n 500c6 │ │ ldr r1, [r0, #16] │ │ cmp r1, #0 │ │ - beq.n 4ff5a │ │ + beq.n 5016a │ │ ldr r4, [r0, #12] │ │ add.w r8, r4, r1, lsl #2 │ │ ldr.w r6, [r4], #4 │ │ ldr.w r3, [sl] │ │ ldr.w r1, [sl, #16] │ │ ldr r2, [r6, #16] │ │ mul.w r0, r2, fp │ │ ands r0, r3 │ │ cmp r1, r0 │ │ - bls.w 507d2 │ │ + bls.w 509e2 │ │ ldr.w r1, [sl, #12] │ │ add.w r0, r0, r0, lsl #1 │ │ ldr r3, [r6, #20] │ │ add.w r0, r1, r0, lsl #2 │ │ ldrd r0, r1, [r0, #4] │ │ lsls r1, r1, #4 │ │ - cbz r1, 4ff1a │ │ + cbz r1, 5012a │ │ ldrd r7, r5, [r0], #16 │ │ subs r1, #16 │ │ eors r5, r3 │ │ eors r7, r2 │ │ orrs r7, r5 │ │ - bne.n 4ff08 │ │ - b.n 4ff5a │ │ + bne.n 50118 │ │ + b.n 5016a │ │ ldrex r0, [r6] │ │ adds r1, r0, #1 │ │ strex r7, r1, [r6] │ │ cmp r7, #0 │ │ - bne.n 4ff1a │ │ + bne.n 5012a │ │ cmp r0, #0 │ │ - bmi.w 507da │ │ + bmi.w 509ea │ │ mov r0, sl │ │ str r6, [sp, #0] │ │ - bl 50c74 │ │ - cbz r0, 4ff56 │ │ + bl 50e84 │ │ + cbz r0, 50166 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 4ff3c │ │ + bne.n 5014c │ │ cmp r1, #1 │ │ itt eq │ │ dmbeq ish │ │ - bleq 476ec │ │ + bleq 46a1c │ │ cmp r4, r8 │ │ - bne.n 4feda │ │ + bne.n 500ea │ │ ldr.w r0, [r9, #52] @ 0x34 │ │ ldr.w r8, [sp, #136] @ 0x88 │ │ cmp r0, #0 │ │ - beq.w 50776 │ │ + beq.w 50986 │ │ ldr.w r2, [r9, #48] @ 0x30 │ │ add.w r0, r0, r0, lsl #4 │ │ str.w sl, [sp, #32] │ │ add.w r0, r2, r0, lsl #3 │ │ str r0, [sp, #52] @ 0x34 │ │ ldr r0, [sp, #144] @ 0x90 │ │ ldrd r1, r0, [r0] │ │ strd r1, r0, [sp, #16] │ │ movs r0, #1 │ │ movt r0, #32768 @ 0x8000 │ │ adds r0, #16 │ │ str r0, [sp, #24] │ │ - b.n 4ff9a │ │ + b.n 501aa │ │ ldrd r0, r2, [sp, #52] @ 0x34 │ │ cmp r2, r0 │ │ - beq.w 50776 │ │ + beq.w 50986 │ │ ldr.w r3, [r2, #128] @ 0x80 │ │ mov r6, r2 │ │ ldr.w r7, [sl] │ │ ldr.w r1, [sl, #16] │ │ ldr r2, [r3, #16] │ │ mul.w r0, r2, fp │ │ ands r0, r7 │ │ cmp r1, r0 │ │ - bls.w 507d2 │ │ + bls.w 509e2 │ │ ldr r1, [r3, #20] │ │ add.w r3, r6, #136 @ 0x88 │ │ str r3, [sp, #56] @ 0x38 │ │ add.w r0, r0, r0, lsl #1 │ │ ldr.w r3, [sl, #12] │ │ str r6, [sp, #60] @ 0x3c │ │ add.w r0, r3, r0, lsl #2 │ │ ldrd r0, r3, [r0, #4] │ │ lsls r3, r3, #4 │ │ - cbz r3, 4ffe4 │ │ + cbz r3, 501f4 │ │ ldrd r7, r6, [r0], #16 │ │ subs r3, #16 │ │ eors r6, r1 │ │ eors r7, r2 │ │ orrs r7, r6 │ │ - bne.n 4ffd2 │ │ - b.n 4ff90 │ │ + bne.n 501e2 │ │ + b.n 501a0 │ │ ldr r0, [sp, #60] @ 0x3c │ │ ldr r0, [r0, #96] @ 0x60 │ │ cmp r0, #0 │ │ - beq.n 4ff90 │ │ + beq.n 501a0 │ │ ldr r1, [sp, #60] @ 0x3c │ │ ldr.w r9, [r1, #92] @ 0x5c │ │ movs r1, #88 @ 0x58 │ │ mla r2, r0, r1, r9 │ │ str r2, [sp, #64] @ 0x40 │ │ - b.n 50018 │ │ + b.n 50228 │ │ ldr r0, [sp, #68] @ 0x44 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r2, [sp, #64] @ 0x40 │ │ cmp r6, #0 │ │ - bne.w 506e4 │ │ + bne.w 508f4 │ │ add.w r9, r9, #88 @ 0x58 │ │ cmp r9, r2 │ │ - beq.n 4ff90 │ │ + beq.n 501a0 │ │ ldr.w r1, [r9, #16] │ │ movs r0, #1 │ │ cmp r1, #0 │ │ it mi │ │ eormi.w r0, r1, #2147483648 @ 0x80000000 │ │ cmp r0, #0 │ │ - beq.n 500be │ │ + beq.n 502ce │ │ cmp r0, #1 │ │ - bne.w 506e4 │ │ + bne.w 508f4 │ │ ldr.w r2, [r9, #36] @ 0x24 │ │ cmp r2, #0 │ │ - beq.w 5077c │ │ + beq.w 5098c │ │ ldr.w r1, [r9, #32] │ │ ldrb.w r5, [r1, #32] │ │ cmp r5, #8 │ │ - bcc.n 5004e │ │ + bcc.n 5025e │ │ ldrb.w r6, [r1, #41] @ 0x29 │ │ cmp r6, #1 │ │ - bne.n 500de │ │ + bne.n 502ee │ │ ldr r3, [sp, #144] @ 0x90 │ │ add r0, sp, #68 @ 0x44 │ │ - bl 4e950 │ │ + bl 4eb60 │ │ ldrd r4, r5, [sp, #72] @ 0x48 │ │ ldrd r1, r7, [r9, #60] @ 0x3c │ │ mov r2, r5 │ │ cmp r7, r5 │ │ it cc │ │ movcc r2, r7 │ │ mov r0, r4 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ mov.w r1, #0 │ │ it gt │ │ movgt r1, #1 │ │ cmp r5, r7 │ │ mov.w r2, #0 │ │ mov.w r6, #0 │ │ it cs │ │ movcs r2, #1 │ │ cmp r0, #0 │ │ it ne │ │ movne r2, r1 │ │ cmp r2, #1 │ │ - bne.n 4fffc │ │ + bne.n 5020c │ │ ldrd r1, r6, [r9, #72] @ 0x48 │ │ mov r2, r5 │ │ mov r0, r4 │ │ cmp r6, r5 │ │ it cc │ │ movcc r2, r6 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #1 │ │ mov.w r1, #0 │ │ it lt │ │ movlt r1, #1 │ │ cmp r5, r6 │ │ mov.w r6, #0 │ │ it ls │ │ movls r6, #1 │ │ cmp r0, #0 │ │ it ne │ │ movne r6, r1 │ │ - b.n 4fffc │ │ + b.n 5020c │ │ ldrd r0, r1, [r9, #32] │ │ subs.w r0, r8, r0 │ │ ldr r0, [sp, #140] @ 0x8c │ │ sbcs r0, r1 │ │ - blt.n 50010 │ │ + blt.n 50220 │ │ ldrd r0, r1, [r9, #40] @ 0x28 │ │ subs.w r0, r0, r8 │ │ ldr r0, [sp, #140] @ 0x8c │ │ sbcs.w r0, r1, r0 │ │ - blt.n 50010 │ │ - b.n 506e4 │ │ + blt.n 50220 │ │ + b.n 508f4 │ │ cmp r2, #1 │ │ str r2, [sp, #84] @ 0x54 │ │ - bne.w 50784 │ │ + bne.w 50994 │ │ movs r0, #1 │ │ ldr r4, [r1, #28] │ │ str r0, [sp, #92] @ 0x5c │ │ movs r0, #0 │ │ str r0, [sp, #88] @ 0x58 │ │ mov r7, r1 │ │ ldr r0, [sp, #144] @ 0x90 │ │ mov r1, r4 │ │ mov r2, r5 │ │ - bl 49978 │ │ + bl 49c80 │ │ cmp r0, #0 │ │ - bne.w 506b0 │ │ + bne.w 508c0 │ │ sub.w r0, r5, #8 │ │ cmp r0, #6 │ │ - bhi.w 5079c │ │ + bhi.w 509ac │ │ tbh [pc, r0, lsl #1] │ │ movs r7, r0 │ │ movs r7, r0 │ │ lsls r3, r4, #3 │ │ lsls r7, r5, #1 │ │ lsls r7, r1, #9 │ │ lsls r1, r1, #5 │ │ lsls r2, r1, #7 │ │ ldr r1, [sp, #144] @ 0x90 │ │ add r0, sp, #68 @ 0x44 │ │ mov r2, r4 │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r0, [sp, #68] @ 0x44 │ │ cmp r0, #1 │ │ - bne.w 507dc │ │ + bne.w 509ec │ │ ldrd r0, fp, [sp, #72] @ 0x48 │ │ adds.w r1, fp, r0 │ │ - bcs.w 50792 │ │ + bcs.w 509a2 │ │ ldr r2, [sp, #20] │ │ cmp r1, r2 │ │ - bhi.w 50792 │ │ + bhi.w 509a2 │ │ cmp.w fp, #0 │ │ - beq.w 50694 │ │ + beq.w 508a4 │ │ ldr r1, [sp, #16] │ │ movs r6, #1 │ │ add.w sl, r1, r0 │ │ ldrd r0, r8, [r9, #60] @ 0x3c │ │ str r0, [sp, #48] @ 0x30 │ │ mov r4, r8 │ │ ldrd r0, r7, [r9, #72] @ 0x48 │ │ @@ -59743,790 +59839,790 @@ │ │ mov r0, r7 │ │ it ne │ │ movne r0, #1 │ │ str r0, [sp, #40] @ 0x28 │ │ cmp.w r8, #0 │ │ it ne │ │ movne r4, #1 │ │ - b.n 5017e │ │ + b.n 5038e │ │ subs.w fp, fp, #1 │ │ - beq.w 50694 │ │ + beq.w 508a4 │ │ ldrb.w r5, [sl], #1 │ │ movs r1, #0 │ │ ldr r0, [sp, #88] @ 0x58 │ │ str r1, [sp, #96] @ 0x60 │ │ - cbz r0, 501e4 │ │ + cbz r0, 503f4 │ │ ldr r1, [sp, #48] @ 0x30 │ │ movs r0, #1 │ │ strb r5, [r6, #0] │ │ mov r2, r4 │ │ str r0, [sp, #96] @ 0x60 │ │ mov r0, r6 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ mov.w r1, #0 │ │ it gt │ │ movgt r1, #1 │ │ cmp.w r8, #2 │ │ mov.w r2, #0 │ │ it cc │ │ movcc r2, #1 │ │ cmp r0, #0 │ │ it ne │ │ movne r2, r1 │ │ cmp r2, #1 │ │ - bne.n 50176 │ │ + bne.n 50386 │ │ ldrd r2, r1, [sp, #40] @ 0x28 │ │ mov r0, r6 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #1 │ │ mov.w r1, #0 │ │ it lt │ │ movlt r1, #1 │ │ cmp r7, #0 │ │ mov r2, r7 │ │ it ne │ │ movne r2, #1 │ │ cmp r0, #0 │ │ it ne │ │ movne r2, r1 │ │ cmp r2, #0 │ │ - beq.n 50176 │ │ - b.n 506c8 │ │ + beq.n 50386 │ │ + b.n 508d8 │ │ add r0, sp, #88 @ 0x58 │ │ - bl 3ec24 │ │ + bl 3ef2c │ │ ldr r6, [sp, #92] @ 0x5c │ │ - b.n 5018a │ │ + b.n 5039a │ │ ldr r1, [sp, #144] @ 0x90 │ │ add r0, sp, #68 @ 0x44 │ │ mov r2, r4 │ │ - bl 42814 │ │ + bl 42b1c │ │ ldr r0, [sp, #68] @ 0x44 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 507ba │ │ + beq.w 509ca │ │ str r0, [sp, #40] @ 0x28 │ │ add.w fp, sp, #88 @ 0x58 │ │ ldr r0, [sp, #72] @ 0x48 │ │ str r0, [sp, #36] @ 0x24 │ │ ldr r0, [sp, #76] @ 0x4c │ │ cmp r0, #0 │ │ - beq.w 50680 │ │ + beq.w 50890 │ │ ldr r6, [sp, #36] @ 0x24 │ │ lsls r4, r0, #2 │ │ ldrd r0, sl, [r9, #60] @ 0x3c │ │ movs r5, #1 │ │ str r0, [sp, #48] @ 0x30 │ │ ldrd r0, r8, [r9, #72] @ 0x48 │ │ str r0, [sp, #44] @ 0x2c │ │ - b.n 50230 │ │ + b.n 50440 │ │ adds r6, #4 │ │ subs r4, #4 │ │ - beq.w 50680 │ │ + beq.w 50890 │ │ vldr s0, [r6] │ │ movs r7, #0 │ │ str r7, [sp, #96] @ 0x60 │ │ vcmp.f32 s0, s0 │ │ vmrs APSR_nzcv, fpscr │ │ - bvs.n 50252 │ │ + bvs.n 50462 │ │ vmov r0, s0 │ │ eor.w r1, r0, #2147483648 @ 0x80000000 │ │ cmp r0, #0 │ │ it mi │ │ mvnmi r1, r0 │ │ rev r7, r1 │ │ ldr r0, [sp, #88] @ 0x58 │ │ cmp r0, #3 │ │ - bls.n 502c0 │ │ + bls.n 504d0 │ │ movs r0, #0 │ │ str r7, [r5, r0] │ │ adds r7, r0, #4 │ │ cmp sl, r7 │ │ mov r2, r7 │ │ str r7, [sp, #96] @ 0x60 │ │ it cc │ │ movcc r2, sl │ │ ldr r1, [sp, #48] @ 0x30 │ │ mov r0, r5 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ mov.w r1, #0 │ │ it gt │ │ movgt r1, #1 │ │ cmp r7, sl │ │ mov.w r2, #0 │ │ it cs │ │ movcs r2, #1 │ │ cmp r0, #0 │ │ it ne │ │ movne r2, r1 │ │ cmp r2, #1 │ │ - bne.n 50228 │ │ + bne.n 50438 │ │ mov r2, r7 │ │ cmp r8, r7 │ │ it cc │ │ movcc r2, r8 │ │ ldr r1, [sp, #44] @ 0x2c │ │ mov r0, r5 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #1 │ │ mov.w r1, #0 │ │ it lt │ │ movlt r1, #1 │ │ cmp r7, r8 │ │ mov.w r2, #0 │ │ it ls │ │ movls r2, #1 │ │ cmp r0, #0 │ │ it ne │ │ movne r2, r1 │ │ cmp r2, #0 │ │ - beq.n 50228 │ │ - b.n 506b4 │ │ + beq.n 50438 │ │ + b.n 508c4 │ │ movs r0, #1 │ │ movs r1, #0 │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ movs r2, #4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd r5, r0, [sp, #92] @ 0x5c │ │ - b.n 5025a │ │ + b.n 5046a │ │ ldr r1, [sp, #144] @ 0x90 │ │ add r0, sp, #68 @ 0x44 │ │ mov r2, r4 │ │ - bl 498b8 │ │ + bl 49bc0 │ │ ldr r0, [sp, #68] @ 0x44 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 507b2 │ │ + beq.w 509c2 │ │ str r0, [sp, #44] @ 0x2c │ │ ldr r0, [sp, #72] @ 0x48 │ │ str r0, [sp, #36] @ 0x24 │ │ ldr r0, [sp, #76] @ 0x4c │ │ cmp r0, #0 │ │ - beq.w 50684 │ │ + beq.w 50894 │ │ ldrd r8, r6, [r9, #60] @ 0x3c │ │ lsls r4, r0, #2 │ │ ldr.w fp, [sp, #36] @ 0x24 │ │ movs r7, #1 │ │ ldrd r0, sl, [r9, #72] @ 0x48 │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n 50312 │ │ + b.n 50522 │ │ subs r4, #4 │ │ - beq.w 50684 │ │ + beq.w 50894 │ │ ldr.w r5, [fp], #4 │ │ movs r0, #0 │ │ ldr r1, [sp, #88] @ 0x58 │ │ str r0, [sp, #96] @ 0x60 │ │ cmp r1, #3 │ │ - bls.n 5038c │ │ + bls.n 5059c │ │ eor.w r1, r5, #2147483648 @ 0x80000000 │ │ adds r5, r0, #4 │ │ rev r1, r1 │ │ str r1, [r7, r0] │ │ mov r2, r5 │ │ mov r0, r7 │ │ mov r1, r8 │ │ str r5, [sp, #96] @ 0x60 │ │ cmp r6, r5 │ │ it cc │ │ movcc r2, r6 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ mov.w r1, #0 │ │ it gt │ │ movgt r1, #1 │ │ cmp r5, r6 │ │ mov.w r2, #0 │ │ it cs │ │ movcs r2, #1 │ │ cmp r0, #0 │ │ it ne │ │ movne r2, r1 │ │ cmp r2, #1 │ │ - bne.n 5030c │ │ + bne.n 5051c │ │ mov r2, r5 │ │ cmp sl, r5 │ │ it cc │ │ movcc r2, sl │ │ ldr r1, [sp, #48] @ 0x30 │ │ mov r0, r7 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #1 │ │ mov.w r1, #0 │ │ it lt │ │ movlt r1, #1 │ │ cmp r5, sl │ │ mov.w r2, #0 │ │ it ls │ │ movls r2, #1 │ │ cmp r0, #0 │ │ it ne │ │ movne r2, r1 │ │ cmp r2, #0 │ │ - beq.n 5030c │ │ - b.n 506bc │ │ + beq.n 5051c │ │ + b.n 508cc │ │ movs r0, #1 │ │ movs r1, #0 │ │ str r0, [sp, #0] │ │ add r0, sp, #88 @ 0x58 │ │ movs r2, #4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd r7, r0, [sp, #92] @ 0x5c │ │ - b.n 50320 │ │ + b.n 50530 │ │ ldr r1, [sp, #144] @ 0x90 │ │ add r0, sp, #68 @ 0x44 │ │ mov r2, r4 │ │ - bl 428d4 │ │ + bl 42bdc │ │ ldr r0, [sp, #68] @ 0x44 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 507ca │ │ + beq.w 509da │ │ str r0, [sp, #40] @ 0x28 │ │ ldr r0, [sp, #72] @ 0x48 │ │ str r0, [sp, #36] @ 0x24 │ │ ldr r0, [sp, #76] @ 0x4c │ │ cmp r0, #0 │ │ - beq.w 50680 │ │ + beq.w 50890 │ │ ldr r7, [sp, #36] @ 0x24 │ │ lsls r4, r0, #3 │ │ ldrd r0, sl, [r9, #60] @ 0x3c │ │ mov.w fp, #1 │ │ str r0, [sp, #48] @ 0x30 │ │ ldrd r0, r8, [r9, #72] @ 0x48 │ │ str r0, [sp, #44] @ 0x2c │ │ - b.n 503e2 │ │ + b.n 505f2 │ │ adds r7, #8 │ │ subs r4, #8 │ │ - beq.w 50680 │ │ + beq.w 50890 │ │ vldr d16, [r7] │ │ movs r6, #0 │ │ str r6, [sp, #96] @ 0x60 │ │ vcmp.f64 d16, d16 │ │ vmrs APSR_nzcv, fpscr │ │ - bvs.n 50486 │ │ + bvs.n 50696 │ │ vmov r1, r0, d16 │ │ cmp r0, #0 │ │ it mi │ │ mvnmi r1, r1 │ │ rev r5, r1 │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ it mi │ │ movmi.w r1, #4294967295 @ 0xffffffff │ │ eors r0, r1 │ │ rev r6, r0 │ │ ldr r0, [sp, #88] @ 0x58 │ │ cmp r0, #7 │ │ - bls.n 5048e │ │ + bls.n 5069e │ │ movs r0, #0 │ │ add.w r1, fp, r0 │ │ str.w r6, [fp, r0] │ │ str r5, [r1, #4] │ │ add.w r5, r0, #8 │ │ str r5, [sp, #96] @ 0x60 │ │ cmp sl, r5 │ │ mov r2, r5 │ │ mov r0, fp │ │ it cc │ │ movcc r2, sl │ │ ldr r1, [sp, #48] @ 0x30 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ mov.w r1, #0 │ │ it gt │ │ movgt r1, #1 │ │ cmp r5, sl │ │ mov.w r2, #0 │ │ it cs │ │ movcs r2, #1 │ │ cmp r0, #0 │ │ it ne │ │ movne r2, r1 │ │ cmp r2, #0 │ │ - beq.n 503da │ │ + beq.n 505ea │ │ mov r2, r5 │ │ cmp r8, r5 │ │ it cc │ │ movcc r2, r8 │ │ ldr r1, [sp, #44] @ 0x2c │ │ mov r0, fp │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #1 │ │ mov.w r1, #0 │ │ it lt │ │ movlt r1, #1 │ │ cmp r5, r8 │ │ mov.w r2, #0 │ │ it ls │ │ movls r2, #1 │ │ cmp r0, #0 │ │ it ne │ │ movne r2, r1 │ │ cmp r2, #0 │ │ - beq.n 503da │ │ - b.n 506b4 │ │ + beq.n 505ea │ │ + b.n 508c4 │ │ movs r5, #0 │ │ ldr r0, [sp, #88] @ 0x58 │ │ cmp r0, #7 │ │ - bhi.n 50414 │ │ + bhi.n 50624 │ │ movs r0, #1 │ │ movs r1, #0 │ │ str r0, [sp, #0] │ │ add r0, sp, #88 @ 0x58 │ │ movs r2, #8 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd fp, r0, [sp, #92] @ 0x5c │ │ - b.n 50416 │ │ + b.n 50626 │ │ ldr r1, [sp, #144] @ 0x90 │ │ add r0, sp, #68 @ 0x44 │ │ mov r2, r4 │ │ - bl 4299c │ │ + bl 42ca4 │ │ ldr r0, [sp, #68] @ 0x44 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 507c2 │ │ + beq.w 509d2 │ │ str r0, [sp, #12] │ │ add.w fp, sp, #88 @ 0x58 │ │ ldr r0, [sp, #72] @ 0x48 │ │ str r0, [sp, #36] @ 0x24 │ │ ldr r0, [sp, #76] @ 0x4c │ │ cmp r0, #0 │ │ - beq.w 50688 │ │ + beq.w 50898 │ │ ldr r4, [sp, #36] @ 0x24 │ │ movs r5, #1 │ │ add.w r0, r4, r0, lsl #3 │ │ str r0, [sp, #40] @ 0x28 │ │ ldrd r0, sl, [r9, #60] @ 0x3c │ │ str r0, [sp, #44] @ 0x2c │ │ ldrd r0, r8, [r9, #72] @ 0x48 │ │ str r0, [sp, #28] │ │ ldrb.w r0, [r7, #40] @ 0x28 │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n 504f2 │ │ + b.n 50702 │ │ adds r4, #8 │ │ ldr r0, [sp, #40] @ 0x28 │ │ cmp r4, r0 │ │ - beq.w 50688 │ │ + beq.w 50898 │ │ ldrd r1, r2, [r4] │ │ movs r0, #0 │ │ cmp r6, #2 │ │ str r0, [sp, #96] @ 0x60 │ │ - bne.n 50524 │ │ + bne.n 50734 │ │ mov r0, r1 │ │ mov r1, r2 │ │ ldr r2, [sp, #48] @ 0x30 │ │ movs r7, #0 │ │ strd r7, r7, [sp] │ │ - bl 4ee30 │ │ + bl 4f040 │ │ ldr r2, [sp, #88] @ 0x58 │ │ cmp r2, #7 │ │ - bls.n 50590 │ │ + bls.n 507a0 │ │ rev r1, r1 │ │ str r1, [r5, r7] │ │ adds r1, r5, r7 │ │ rev r0, r0 │ │ adds r7, #8 │ │ str r0, [r1, #4] │ │ str r7, [sp, #96] @ 0x60 │ │ - b.n 5052e │ │ + b.n 5073e │ │ ldr r3, [sp, #48] @ 0x30 │ │ mov r0, fp │ │ - bl 4fbac │ │ + bl 4fdbc │ │ ldr r7, [sp, #96] @ 0x60 │ │ ldr r5, [sp, #92] @ 0x5c │ │ mov r2, r7 │ │ cmp sl, r7 │ │ it cc │ │ movcc r2, sl │ │ ldr r1, [sp, #44] @ 0x2c │ │ mov r0, r5 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ mov.w r1, #0 │ │ it gt │ │ movgt r1, #1 │ │ cmp r7, sl │ │ mov.w r2, #0 │ │ it cs │ │ movcs r2, #1 │ │ cmp r0, #0 │ │ it ne │ │ movne r2, r1 │ │ cmp r2, #1 │ │ - bne.n 504e8 │ │ + bne.n 506f8 │ │ mov r2, r7 │ │ cmp r8, r7 │ │ it cc │ │ movcc r2, r8 │ │ ldr r1, [sp, #28] │ │ mov r0, r5 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #1 │ │ mov.w r1, #0 │ │ it lt │ │ movlt r1, #1 │ │ cmp r7, r8 │ │ mov.w r2, #0 │ │ it ls │ │ movls r2, #1 │ │ cmp r0, #0 │ │ it ne │ │ movne r2, r1 │ │ cmp r2, #0 │ │ - beq.n 504e8 │ │ - b.n 506b8 │ │ + beq.n 506f8 │ │ + b.n 508c8 │ │ movs r2, #1 │ │ mov r5, r0 │ │ str r2, [sp, #0] │ │ mov r7, r1 │ │ mov r0, fp │ │ movs r1, #0 │ │ movs r2, #8 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ mov r1, r7 │ │ mov r0, r5 │ │ ldrd r5, r7, [sp, #92] @ 0x5c │ │ - b.n 50514 │ │ + b.n 50724 │ │ ldr r1, [sp, #144] @ 0x90 │ │ add r0, sp, #68 @ 0x44 │ │ mov r2, r4 │ │ - bl 42384 │ │ + bl 4268c │ │ ldr r0, [sp, #68] @ 0x44 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 507aa │ │ + beq.w 509ba │ │ str r0, [sp, #40] @ 0x28 │ │ ldr r0, [sp, #72] @ 0x48 │ │ str r0, [sp, #36] @ 0x24 │ │ ldr r0, [sp, #76] @ 0x4c │ │ cmp r0, #0 │ │ - beq.n 50680 │ │ + beq.n 50890 │ │ ldr r5, [sp, #36] @ 0x24 │ │ lsls r4, r0, #3 │ │ ldrd r0, sl, [r9, #60] @ 0x3c │ │ movs r7, #1 │ │ str r0, [sp, #48] @ 0x30 │ │ ldrd r0, r8, [r9, #72] @ 0x48 │ │ str r0, [sp, #44] @ 0x2c │ │ - b.n 505e8 │ │ + b.n 507f8 │ │ adds r5, #8 │ │ subs r4, #8 │ │ - beq.n 50680 │ │ + beq.n 50890 │ │ ldrd r6, fp, [r5] │ │ movs r0, #0 │ │ ldr r1, [sp, #88] @ 0x58 │ │ str r0, [sp, #96] @ 0x60 │ │ cmp r1, #7 │ │ - bls.n 5066a │ │ + bls.n 5087a │ │ eor.w r1, fp, #2147483648 @ 0x80000000 │ │ rev r2, r6 │ │ rev r1, r1 │ │ str r1, [r7, r0] │ │ adds r1, r7, r0 │ │ add.w r6, r0, #8 │ │ mov r0, r7 │ │ str r2, [r1, #4] │ │ cmp sl, r6 │ │ mov r2, r6 │ │ str r6, [sp, #96] @ 0x60 │ │ it cc │ │ movcc r2, sl │ │ ldr r1, [sp, #48] @ 0x30 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ mov.w r1, #0 │ │ it gt │ │ movgt r1, #1 │ │ cmp r6, sl │ │ mov.w r2, #0 │ │ it cs │ │ movcs r2, #1 │ │ cmp r0, #0 │ │ it ne │ │ movne r2, r1 │ │ cmp r2, #0 │ │ - beq.n 505e2 │ │ + beq.n 507f2 │ │ mov r2, r6 │ │ cmp r8, r6 │ │ it cc │ │ movcc r2, r8 │ │ ldr r1, [sp, #44] @ 0x2c │ │ mov r0, r7 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #1 │ │ mov.w r1, #0 │ │ it lt │ │ movlt r1, #1 │ │ cmp r6, r8 │ │ mov.w r2, #0 │ │ it ls │ │ movls r2, #1 │ │ cmp r0, #0 │ │ it ne │ │ movne r2, r1 │ │ cmp r2, #0 │ │ - beq.n 505e2 │ │ - b.n 506b4 │ │ + beq.n 507f2 │ │ + b.n 508c4 │ │ movs r0, #1 │ │ movs r1, #0 │ │ str r0, [sp, #0] │ │ add r0, sp, #88 @ 0x58 │ │ movs r2, #8 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd r7, r0, [sp, #92] @ 0x5c │ │ - b.n 505f6 │ │ + b.n 50806 │ │ ldr r0, [sp, #40] @ 0x28 │ │ - b.n 5068a │ │ + b.n 5089a │ │ ldr r0, [sp, #44] @ 0x2c │ │ - b.n 5068a │ │ + b.n 5089a │ │ ldr r0, [sp, #12] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #36] @ 0x24 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #88] @ 0x58 │ │ movw fp, #31829 @ 0x7c55 │ │ ldr.w sl, [sp, #32] │ │ movt fp, #32586 @ 0x7f4a │ │ cmp r0, #0 │ │ ldr.w r8, [sp, #136] @ 0x88 │ │ itt ne │ │ ldrne r0, [sp, #92] @ 0x5c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r2, [sp, #64] @ 0x40 │ │ - b.n 50010 │ │ + b.n 50220 │ │ ldr r0, [sp, #40] @ 0x28 │ │ - b.n 506be │ │ + b.n 508ce │ │ ldr r0, [sp, #12] │ │ - b.n 506be │ │ + b.n 508ce │ │ ldr r0, [sp, #44] @ 0x2c │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #36] @ 0x24 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #88] @ 0x58 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #92] @ 0x5c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w sl, [sp, #32] │ │ movw fp, #31829 @ 0x7c55 │ │ ldr.w r8, [sp, #136] @ 0x88 │ │ movt fp, #32586 @ 0x7f4a │ │ ldr r1, [sp, #60] @ 0x3c │ │ ldrb.w r0, [r1, #8]! │ │ cmp r0, #32 │ │ - beq.n 50724 │ │ + beq.n 50934 │ │ ldr r0, [sp, #144] @ 0x90 │ │ movs r2, #0 │ │ ldr r3, [sp, #140] @ 0x8c │ │ strd r0, r2, [sp] │ │ add r0, sp, #68 @ 0x44 │ │ mov r2, r8 │ │ - bl 483e0 │ │ + bl 486e8 │ │ ldr r0, [sp, #68] @ 0x44 │ │ ldr r1, [sp, #24] │ │ ldrb.w r4, [sp, #72] @ 0x48 │ │ subs r5, r0, r1 │ │ it ne │ │ movne r5, #1 │ │ cmp r0, r1 │ │ itt ne │ │ addne.w r0, sp, #68 @ 0x44 │ │ - blne 31e14 │ │ + blne 31ee0 │ │ orr.w r0, r5, r4 │ │ lsls r0, r0, #31 │ │ - beq.w 4ff90 │ │ + beq.w 501a0 │ │ ldr r5, [sp, #60] @ 0x3c │ │ ldr.w r0, [r5, #128] @ 0x80 │ │ ldrd r2, r3, [r0, #16] │ │ ldrex r1, [r0] │ │ adds r7, r1, #1 │ │ strex r6, r7, [r0] │ │ cmp r6, #0 │ │ - bne.n 5072e │ │ + bne.n 5093e │ │ cmp r1, #0 │ │ - bmi.n 507da │ │ + bmi.n 509ea │ │ ldr.w r0, [r5, #128] @ 0x80 │ │ str r0, [sp, #0] │ │ mov r0, sl │ │ - bl 50c74 │ │ + bl 50e84 │ │ cmp r0, #0 │ │ - beq.w 4ff90 │ │ + beq.w 501a0 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 50756 │ │ + bne.n 50966 │ │ cmp r1, #1 │ │ - bne.w 4ff90 │ │ + bne.w 501a0 │ │ dmb ish │ │ - bl 476ec │ │ - b.w 4ff90 │ │ + bl 46a1c │ │ + b.w 501a0 │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #124] @ (507fc ) │ │ + ldr r0, [pc, #124] @ (50a0c ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r1, [pc, #108] @ (507f4 ) │ │ + bl 3fd40 │ │ + ldr r1, [pc, #108] @ (50a04 ) │ │ add r0, sp, #84 @ 0x54 │ │ - ldr r2, [pc, #108] @ (507f8 ) │ │ + ldr r2, [pc, #108] @ (50a08 ) │ │ add r1, pc │ │ add r2, pc │ │ - bl 40ff4 │ │ - ldr r3, [pc, #124] @ (50810 ) │ │ + bl 412fc │ │ + ldr r3, [pc, #124] @ (50a20 ) │ │ ldr r2, [sp, #20] │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #72] @ (507e8 ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #72] @ (509f8 ) │ │ movs r1, #40 @ 0x28 │ │ - ldr r2, [pc, #72] @ (507ec ) │ │ + ldr r2, [pc, #72] @ (509fc ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r0, [pc, #88] @ (50804 ) │ │ + bl 3fd54 │ │ + ldr r0, [pc, #88] @ (50a14 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #96] @ (50814 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #96] @ (50a24 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #52] @ (507f0 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #52] @ (50a00 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #72] @ (5080c ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #72] @ (50a1c ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #60] @ (50808 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #60] @ (50a18 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r2, [pc, #16] @ (507e4 ) │ │ + bl 3fd40 │ │ + ldr r2, [pc, #16] @ (509f4 ) │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ udf #254 @ 0xfe │ │ - ldr r0, [pc, #32] @ (50800 ) │ │ + ldr r0, [pc, #32] @ (50a10 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - add r2, pc, #864 @ (adr r2, 50b48 ) │ │ + bl 3fd40 │ │ + add r0, pc, #864 @ (adr r0, 50d58 ) │ │ movs r0, r1 │ │ - ldrh r3, [r5, #36] @ 0x24 │ │ - vsli.64 q13, q12, #60 @ 0x3c │ │ + ldrh r3, [r3, #20] │ │ + vrsra.u64 q13, q12, #4 │ │ movs r0, r1 │ │ - add r5, pc, #640 @ (adr r5, 50a74 ) │ │ + add r3, pc, #640 @ (adr r3, 50c84 ) │ │ movs r0, r1 │ │ - ldrh r2, [r7, r2] │ │ - vabal.u q13, d28, d16 │ │ + ldr r2, [r5, r2] │ │ + vsubw.u q13, q14, d16 │ │ movs r0, r1 │ │ - add r5, pc, #632 @ (adr r5, 50a78 ) │ │ + add r3, pc, #632 @ (adr r3, 50c88 ) │ │ movs r0, r1 │ │ - add r5, pc, #376 @ (adr r5, 5097c ) │ │ + add r3, pc, #376 @ (adr r3, 50b8c ) │ │ movs r0, r1 │ │ - add r5, pc, #768 @ (adr r5, 50b08 ) │ │ + add r3, pc, #768 @ (adr r3, 50d18 ) │ │ movs r0, r1 │ │ - add r5, pc, #704 @ (adr r5, 50acc ) │ │ + add r3, pc, #704 @ (adr r3, 50cdc ) │ │ movs r0, r1 │ │ - add r5, pc, #800 @ (adr r5, 50b30 ) │ │ + add r3, pc, #800 @ (adr r3, 50d40 ) │ │ movs r0, r1 │ │ - add r0, sp, #88 @ 0x58 │ │ + add r6, pc, #88 @ (adr r6, 50a7c ) │ │ movs r0, r1 │ │ - add r5, pc, #608 @ (adr r5, 50a78 ) │ │ + add r3, pc, #608 @ (adr r3, 50c88 ) │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #92 @ 0x5c │ │ mov fp, r0 │ │ movw r0, #31829 @ 0x7c55 │ │ movt r0, #32586 @ 0x7f4a │ │ mov r9, fp │ │ umull r5, r0, r2, r0 │ │ ldr.w r0, [r9, #8]! │ │ ldr.w r1, [r9, #16] │ │ ands r0, r5 │ │ cmp r1, r0 │ │ - bls.w 50ba6 │ │ + bls.w 50db6 │ │ mov r4, r3 │ │ ldr.w r3, [fp, #20] │ │ add.w r0, r0, r0, lsl #1 │ │ add.w ip, r3, r0, lsl #2 │ │ ldrd r0, r3, [ip, #4] │ │ lsls r6, r3, #6 │ │ - cbz r6, 50864 │ │ + cbz r6, 50a74 │ │ ldrd r3, r7, [r0], #64 @ 0x40 │ │ subs r6, #64 @ 0x40 │ │ eors r7, r4 │ │ eors r3, r2 │ │ orrs r3, r7 │ │ - bne.n 50852 │ │ - b.n 50af2 │ │ + bne.n 50a62 │ │ + b.n 50d02 │ │ movs r0, #0 │ │ strd r1, ip, [sp, #48] @ 0x30 │ │ movs r1, #4 │ │ add r7, sp, #56 @ 0x38 │ │ strd r0, r1, [sp, #64] @ 0x40 │ │ movw r1, #909 @ 0x38d │ │ str r5, [sp, #24] │ │ strd r4, r2, [sp, #32] │ │ strd r0, r0, [sp, #56] @ 0x38 │ │ strd r0, r0, [sp, #72] @ 0x48 │ │ strd r0, r1, [sp, #80] @ 0x50 │ │ - b.n 5088e │ │ + b.n 50a9e │ │ lsrs r0, r2, #2 │ │ - bne.n 508cc │ │ + bne.n 50adc │ │ mov r0, r7 │ │ - bl 50fc4 │ │ + bl 511d4 │ │ ldr r0, [sp, #76] @ 0x4c │ │ cmp r0, #0 │ │ - beq.n 5088e │ │ + beq.n 50a9e │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r4, #1 │ │ movs r5, #0 │ │ - b.n 508b4 │ │ + b.n 50ac4 │ │ umull r2, r6, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r6, r3, r5, r6 │ │ mla r5, r3, r5, r6 │ │ mov r3, r2 │ │ lsls r2, r0, #31 │ │ - beq.n 508a4 │ │ + beq.n 50ab4 │ │ umull r2, r6, r3, r4 │ │ cmp r0, #1 │ │ - beq.n 5088a │ │ + beq.n 50a9a │ │ mla r1, r3, r1, r6 │ │ mla r1, r5, r4, r1 │ │ mov r4, r2 │ │ - b.n 508a4 │ │ + b.n 50ab4 │ │ ldr.w ip, [sp, #52] @ 0x34 │ │ str.w fp, [sp, #28] │ │ ldrd fp, r4, [sp, #32] │ │ ldr.w lr, [ip, #8] │ │ cmp.w lr, #0 │ │ - beq.n 50906 │ │ + beq.n 50b16 │ │ ldr.w r1, [ip, #4] │ │ mov.w r0, lr, lsl #6 │ │ movs r2, #0 │ │ mov r3, r1 │ │ ldrd r6, r5, [r3] │ │ eor.w r5, r5, fp │ │ eors r6, r4 │ │ orrs r6, r5 │ │ - beq.w 50b30 │ │ + beq.w 50d40 │ │ adds r2, #1 │ │ adds r3, #64 @ 0x40 │ │ subs r0, #64 @ 0x40 │ │ - bne.n 508ee │ │ + bne.n 50afe │ │ ldr r1, [sp, #28] │ │ ldr r0, [r1, #32] │ │ adds r0, #1 │ │ str r0, [r1, #32] │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str r0, [sp, #20] │ │ ldr r1, [sp, #48] @ 0x30 │ │ ldr.w r0, [ip] │ │ cmp lr, r0 │ │ - beq.w 50b8c │ │ + beq.w 50d9c │ │ ldr.w r0, [ip, #4] │ │ mov.w r2, lr, lsl #6 │ │ str r4, [r0, r2] │ │ add.w r2, r0, lr, lsl #6 │ │ add.w r0, r2, #8 │ │ str.w fp, [r2, #4] │ │ ldmia r7!, {r3, r4, r5, r6} │ │ @@ -60541,178 +60637,178 @@ │ │ strd r3, r6, [r2, #40] @ 0x28 │ │ ldr.w r0, [fp, #32] │ │ strd r3, r3, [r2, #48] @ 0x30 │ │ strd r7, r3, [r2, #56] @ 0x38 │ │ add.w r2, lr, #1 │ │ str.w r2, [ip, #8] │ │ lsls r2, r0, #29 │ │ - bmi.n 509b0 │ │ + bmi.n 50bc0 │ │ ldrd r4, r2, [sp, #32] │ │ ldr r0, [sp, #20] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 50af2 │ │ + beq.w 50d02 │ │ cmp.w sl, #0 │ │ - beq.n 509dc │ │ + beq.n 50bec │ │ movs r4, #0 │ │ - b.n 50984 │ │ + b.n 50b94 │ │ cmp r4, sl │ │ - beq.n 509dc │ │ + beq.n 50bec │ │ ldr.w r1, [r8, r4, lsl #2] │ │ mov r0, r4 │ │ adds r4, #1 │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r7, r3, [r1] │ │ cmp r7, #0 │ │ - bne.n 50990 │ │ + bne.n 50ba0 │ │ cmp r2, #1 │ │ - bne.n 50980 │ │ + bne.n 50b90 │ │ dmb ish │ │ ldr.w r0, [r8, r0, lsl #2] │ │ - bl 476ec │ │ - b.n 50980 │ │ + bl 46a1c │ │ + b.n 50b90 │ │ mov.w r4, #1000 @ 0x3e8 │ │ muls r0, r4 │ │ - blx d5af0 │ │ + blx d5b00 │ │ ldr.w r1, [fp, #36] @ 0x24 │ │ cmp r0, r1 │ │ - bls.n 50968 │ │ + bls.n 50b78 │ │ mov r0, r9 │ │ - bl 51544 │ │ + bl 51754 │ │ ldr.w r1, [fp, #24] │ │ ldr.w r0, [fp, #32] │ │ cmp r1, #0 │ │ - bne.n 509b4 │ │ - ldr r0, [pc, #484] @ (50bbc ) │ │ + bne.n 50bc4 │ │ + ldr r0, [pc, #484] @ (50dcc ) │ │ add r0, pc │ │ - bl 409c4 │ │ + bl 40ccc │ │ ldr r0, [sp, #4] │ │ lsls r0, r0, #31 │ │ itt eq │ │ moveq r0, r8 │ │ - blxeq d87c0 │ │ + blxeq d87d0 │ │ ldr r0, [sp, #44] @ 0x2c │ │ cmp r0, #0 │ │ - beq.n 50a86 │ │ + beq.n 50c96 │ │ movs r1, #0 │ │ - b.n 50a0a │ │ + b.n 50c1a │ │ ldr r0, [sp, #48] @ 0x30 │ │ ldr r0, [r0, #0] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r7 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r1, [sp, #52] @ 0x34 │ │ ldr r0, [sp, #44] @ 0x2c │ │ adds r1, #1 │ │ cmp r1, r0 │ │ - beq.n 50a86 │ │ + beq.n 50c96 │ │ str r1, [sp, #52] @ 0x34 │ │ add.w r0, r1, r1, lsl #1 │ │ ldr r1, [sp, #40] @ 0x28 │ │ add.w r0, r1, r0, lsl #2 │ │ str r0, [sp, #48] @ 0x30 │ │ ldrd r7, r5, [r0, #4] │ │ cmp r5, #0 │ │ - beq.n 509f2 │ │ + beq.n 50c02 │ │ mov.w fp, #0 │ │ - b.n 50a3c │ │ + b.n 50c4c │ │ ldr.w r0, [sl, #8] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w fp, fp, #1 │ │ cmp fp, r5 │ │ - beq.n 509f2 │ │ + beq.n 50c02 │ │ add.w r0, fp, fp, lsl #1 │ │ add.w sl, r7, r0, lsl #3 │ │ ldrd r6, r9, [sl, #12] │ │ cmp.w r9, #0 │ │ - beq.n 50a26 │ │ + beq.n 50c36 │ │ mov.w r8, #0 │ │ - b.n 50a58 │ │ + b.n 50c68 │ │ cmp r8, r9 │ │ - beq.n 50a26 │ │ + beq.n 50c36 │ │ ldr.w r1, [r6, r8, lsl #2] │ │ mov r0, r8 │ │ add.w r8, r8, #1 │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r4, r3, [r1] │ │ cmp r4, #0 │ │ - bne.n 50a66 │ │ + bne.n 50c76 │ │ cmp r2, #1 │ │ - bne.n 50a54 │ │ + bne.n 50c64 │ │ dmb ish │ │ ldr.w r0, [r6, r0, lsl #2] │ │ - bl 476ec │ │ - b.n 50a54 │ │ + bl 46a1c │ │ + b.n 50c64 │ │ ldr r0, [sp, #20] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #40] @ 0x28 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r5, [sp, #12] │ │ ldrd r8, fp, [sp, #24] │ │ ldr r7, [sp, #16] │ │ - cbz r5, 50adc │ │ + cbz r5, 50cec │ │ movs r4, #0 │ │ - b.n 50aa4 │ │ + b.n 50cb4 │ │ cmp r4, r5 │ │ - beq.n 50adc │ │ + beq.n 50cec │ │ add.w r0, r4, r4, lsl #4 │ │ add.w r6, r7, r0, lsl #3 │ │ mov r0, r6 │ │ - bl 519c0 │ │ + bl 51bd0 │ │ ldr.w r0, [r6, #128] @ 0x80 │ │ adds r4, #1 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 50abc │ │ + bne.n 50ccc │ │ cmp r1, #1 │ │ - bne.n 50aa0 │ │ + bne.n 50cb0 │ │ dmb ish │ │ ldr.w r0, [r6, #128] @ 0x80 │ │ - bl 476ec │ │ - b.n 50aa0 │ │ + bl 46a1c │ │ + b.n 50cb0 │ │ ldr r0, [sp, #8] │ │ mov r5, r8 │ │ ldrd r4, r2, [sp, #32] │ │ lsls r0, r0, #31 │ │ - bne.n 50af2 │ │ + bne.n 50d02 │ │ ldr r0, [sp, #16] │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r2, [sp, #36] @ 0x24 │ │ mov r5, r8 │ │ ldr.w r0, [fp, #8] │ │ ldr.w r1, [fp, #24] │ │ ands r0, r5 │ │ cmp r1, r0 │ │ - bls.n 50bae │ │ + bls.n 50dbe │ │ ldr.w r1, [fp, #20] │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r0, r1, r0, lsl #2 │ │ ldrd r0, r1, [r0, #4] │ │ lsls r1, r1, #6 │ │ subs r0, #64 @ 0x40 │ │ cmp r1, #0 │ │ - beq.n 50b9e │ │ + beq.n 50dae │ │ ldr.w r7, [r0, #64]! │ │ subs r1, #64 @ 0x40 │ │ ldr r3, [r0, #4] │ │ eors r7, r2 │ │ eors r3, r4 │ │ orrs r3, r7 │ │ - bne.n 50b14 │ │ + bne.n 50d24 │ │ adds r0, #8 │ │ add sp, #92 @ 0x5c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add.w r0, r1, r2, lsl #6 │ │ sub.w r4, lr, #1 │ │ add.w sl, r0, #40 @ 0x28 │ │ ldr r2, [r0, #16] │ │ @@ -60724,184 +60820,184 @@ │ │ str r2, [sp, #44] @ 0x2c │ │ ldrd r6, r2, [r0, #52] @ 0x34 │ │ ldmia.w sl, {r5, r8, sl} │ │ str r2, [sp, #16] │ │ ldr r2, [r0, #60] @ 0x3c │ │ str r2, [sp, #12] │ │ movs r2, #64 @ 0x40 │ │ - bl d53c2 │ │ + bl d51f6 │ │ clz r0, r6 │ │ ldr.w ip, [sp, #52] @ 0x34 │ │ mov lr, r4 │ │ ldr r4, [sp, #36] @ 0x24 │ │ lsrs r0, r0, #5 │ │ ldr.w fp, [sp, #32] │ │ str r0, [sp, #8] │ │ clz r0, r5 │ │ str.w lr, [ip, #8] │ │ lsrs r0, r0, #5 │ │ str r0, [sp, #4] │ │ ldr r1, [sp, #48] @ 0x30 │ │ ldr.w r0, [ip] │ │ cmp lr, r0 │ │ - bne.w 50920 │ │ + bne.w 50b30 │ │ mov r0, ip │ │ mov r4, lr │ │ - bl 479a6 │ │ + bl 47e86 │ │ mov lr, r4 │ │ ldr r4, [sp, #36] @ 0x24 │ │ ldrd r1, ip, [sp, #48] @ 0x30 │ │ - b.n 50920 │ │ - ldr r0, [pc, #32] @ (50bc0 ) │ │ + b.n 50b30 │ │ + ldr r0, [pc, #32] @ (50dd0 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r2, [pc, #16] @ (50bb8 ) │ │ + bl 3fd40 │ │ + ldr r2, [pc, #16] @ (50dc8 ) │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r2, [pc, #20] @ (50bc4 ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #20] @ (50dd4 ) │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ nop │ │ - ldr r7, [sp, #16] │ │ + ldr r5, [sp, #16] │ │ movs r0, r1 │ │ - add r0, pc, #792 @ (adr r0, 50ed8 ) │ │ + ldr r6, [sp, #792] @ 0x318 │ │ movs r0, r1 │ │ - add r2, pc, #368 @ (adr r2, 50d34 ) │ │ + add r0, pc, #368 @ (adr r0, 50f44 ) │ │ movs r0, r1 │ │ - ldr r7, [sp, #176] @ 0xb0 │ │ + ldr r5, [sp, #176] @ 0xb0 │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ sub sp, #8 │ │ cmp r2, #0 │ │ - beq.n 50c5e │ │ + beq.n 50e6e │ │ movw r8, #31829 @ 0x7c55 │ │ add.w r9, r1, r2, lsl #2 │ │ mov r4, r1 │ │ mov sl, r0 │ │ movt r8, #32586 @ 0x7f4a │ │ ldr.w r7, [r4], #4 │ │ ldr.w r3, [sl] │ │ ldr.w r1, [sl, #16] │ │ ldr r2, [r7, #16] │ │ mul.w r0, r2, r8 │ │ ands r0, r3 │ │ cmp r1, r0 │ │ - bls.n 50c64 │ │ + bls.n 50e74 │ │ ldr.w r1, [sl, #12] │ │ add.w r0, r0, r0, lsl #1 │ │ ldr r3, [r7, #20] │ │ add.w r0, r1, r0, lsl #2 │ │ ldrd r0, r1, [r0, #4] │ │ lsls r1, r1, #4 │ │ - cbz r1, 50c20 │ │ + cbz r1, 50e30 │ │ ldrd r6, r5, [r0], #16 │ │ subs r1, #16 │ │ eors r5, r3 │ │ eors r6, r2 │ │ orrs r6, r5 │ │ - bne.n 50c0e │ │ - b.n 50c5e │ │ + bne.n 50e1e │ │ + b.n 50e6e │ │ ldrex r0, [r7] │ │ adds r1, r0, #1 │ │ strex r6, r1, [r7] │ │ cmp r6, #0 │ │ - bne.n 50c20 │ │ + bne.n 50e30 │ │ cmp r0, #0 │ │ - bmi.n 50c6c │ │ + bmi.n 50e7c │ │ mov r0, sl │ │ str r7, [sp, #0] │ │ - bl 50c74 │ │ - cbz r0, 50c5a │ │ + bl 50e84 │ │ + cbz r0, 50e6a │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 50c40 │ │ + bne.n 50e50 │ │ cmp r1, #1 │ │ itt eq │ │ dmbeq ish │ │ - bleq 476ec │ │ + bleq 46a1c │ │ cmp r4, r9 │ │ - bne.n 50be2 │ │ + bne.n 50df2 │ │ add sp, #8 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ - ldr r2, [pc, #8] @ (50c70 ) │ │ + ldr r2, [pc, #8] @ (50e80 ) │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ udf #254 @ 0xfe │ │ nop │ │ - ldr r6, [sp, #280] @ 0x118 │ │ + ldr r4, [sp, #280] @ 0x118 │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #4 │ │ mov sl, r0 │ │ movw r0, #31829 @ 0x7c55 │ │ movt r0, #32586 @ 0x7f4a │ │ ldr.w r7, [sl] │ │ muls r0, r2 │ │ ldr.w r1, [sl, #16] │ │ ands r0, r7 │ │ cmp r1, r0 │ │ - bls.n 50d80 │ │ + bls.n 50f90 │ │ ldr.w r7, [sl, #12] │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r8, r7, r0, lsl #2 │ │ ldr.w r9, [r8, #8] │ │ cmp.w r9, #0 │ │ - beq.n 50cca │ │ + beq.n 50eda │ │ ldr.w ip, [r8, #4] │ │ mov.w r0, r9, lsl #4 │ │ movs r6, #0 │ │ mov r5, ip │ │ ldrd r7, r4, [r5] │ │ eors r4, r3 │ │ eors r7, r2 │ │ orrs r7, r4 │ │ - beq.n 50d36 │ │ + beq.n 50f46 │ │ adds r6, #1 │ │ adds r5, #16 │ │ subs r0, #16 │ │ - bne.n 50cb6 │ │ + bne.n 50ec6 │ │ ldr.w r0, [sl, #24] │ │ movs r6, #0 │ │ adds r0, #1 │ │ str.w r0, [sl, #24] │ │ ldr r5, [sp, #40] @ 0x28 │ │ ldr.w r0, [r8] │ │ cmp r9, r0 │ │ - beq.n 50d6c │ │ + beq.n 50f7c │ │ ldr.w r7, [r8, #4] │ │ mov.w r4, r9, lsl #4 │ │ ldr.w r0, [sl, #24] │ │ str r2, [r7, r4] │ │ add.w r2, r9, #1 │ │ str.w r2, [r8, #8] │ │ add.w r2, r7, r9, lsl #4 │ │ strd r3, r5, [r2, #4] │ │ lsls r2, r0, #29 │ │ - bmi.n 50d0a │ │ + bmi.n 50f1a │ │ mov r0, r6 │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov.w r5, #1000 @ 0x3e8 │ │ muls r0, r5 │ │ - blx d5af0 │ │ + blx d5b00 │ │ ldr.w r1, [sl, #28] │ │ cmp r0, r1 │ │ - bls.n 50d02 │ │ + bls.n 50f12 │ │ mov r0, sl │ │ - bl 50d90 │ │ + bl 50fa0 │ │ ldr.w r1, [sl, #16] │ │ ldr.w r0, [sl, #24] │ │ cmp r1, #0 │ │ - bne.n 50d0e │ │ - ldr r0, [pc, #92] @ (50d8c ) │ │ + bne.n 50f1e │ │ + ldr r0, [pc, #92] @ (50f9c ) │ │ add r0, pc │ │ - bl 409c4 │ │ + bl 40ccc │ │ sub.w r9, r9, #1 │ │ lsls r4, r6, #4 │ │ str.w r9, [r8, #8] │ │ mov.w r0, r9, lsl #4 │ │ add.w r7, ip, r9, lsl #4 │ │ ldr.w lr, [ip, r0] │ │ add.w r0, ip, r6, lsl #4 │ │ @@ -60910,466 +61006,466 @@ │ │ ldr r7, [r7, #12] │ │ str.w lr, [ip, r4] │ │ strd r5, fp, [r0, #4] │ │ str r7, [r0, #12] │ │ ldr r5, [sp, #40] @ 0x28 │ │ ldr.w r0, [r8] │ │ cmp r9, r0 │ │ - bne.n 50ce0 │ │ + bne.n 50ef0 │ │ mov r0, r8 │ │ mov r7, r1 │ │ mov fp, r3 │ │ mov r4, r2 │ │ - bl 4796a │ │ + bl 47dd2 │ │ mov r2, r4 │ │ mov r3, fp │ │ mov r1, r7 │ │ - b.n 50ce0 │ │ - ldr r2, [pc, #4] @ (50d88 ) │ │ + b.n 50ef0 │ │ + ldr r2, [pc, #4] @ (50f98 ) │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r5, [sp, #232] @ 0xe8 │ │ + bl 3fd7c │ │ + ldr r3, [sp, #232] @ 0xe8 │ │ movs r0, r1 │ │ - ldr r5, [sp, #432] @ 0x1b0 │ │ + ldr r3, [sp, #432] @ 0x1b0 │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #36 @ 0x24 │ │ mov r8, r0 │ │ ldr r0, [r0, #20] │ │ adds r0, #1 │ │ str.w r0, [r8, #20] │ │ - bcc.w 50ebe │ │ + bcc.w 510ce │ │ movs r0, #0 │ │ movs r4, #1 │ │ mov r7, r0 │ │ str.w r0, [r8] │ │ str.w r0, [r8, #4] │ │ add.w r0, r4, r4, lsl #1 │ │ lsls r5, r0, #2 │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 50fac │ │ + beq.w 511bc │ │ adds r1, r0, #4 │ │ movs r2, #0 │ │ movs r3, #8 │ │ mov r6, r4 │ │ str.w r2, [r1, #-4] │ │ subs r6, #1 │ │ strd r3, r2, [r1], #12 │ │ - bne.n 50dcc │ │ + bne.n 50fdc │ │ mov r1, r4 │ │ ldr.w r2, [r8, #8] │ │ mov ip, r7 │ │ str r2, [sp, #20] │ │ ldrd r7, r2, [r8, #12] │ │ strd r1, r0, [r8, #8] │ │ add.w r0, r2, r2, lsl #1 │ │ str.w r8, [sp, #28] │ │ add.w r5, r7, r0, lsl #2 │ │ str.w r4, [r8, #16] │ │ movs r0, #0 │ │ mov r6, r7 │ │ str r7, [sp, #32] │ │ - cbz r7, 50e36 │ │ - cbz r0, 50e12 │ │ + cbz r7, 51046 │ │ + cbz r0, 51022 │ │ cmp fp, r9 │ │ - bne.n 50e42 │ │ + bne.n 51052 │ │ cmp.w r8, #0 │ │ it ne │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ cmp r6, r5 │ │ - beq.w 50f82 │ │ + beq.w 51192 │ │ mov sl, r6 │ │ ldr.w r8, [sl], #12 │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ - beq.n 50f0c │ │ + beq.n 5111c │ │ ldrd fp, r0, [r6, #4] │ │ mov r6, sl │ │ add.w r9, fp, r0, lsl #4 │ │ mov r0, fp │ │ cmp r0, #0 │ │ - bne.n 50e04 │ │ - b.n 50e12 │ │ + bne.n 51014 │ │ + b.n 51022 │ │ cmp r0, #0 │ │ - beq.w 50f9a │ │ + beq.w 511aa │ │ cmp fp, r9 │ │ - bne.n 50e4a │ │ - b.n 50f92 │ │ + bne.n 5105a │ │ + b.n 511a2 │ │ ldr r1, [sp, #28] │ │ ldr.w ip, [r1] │ │ ldr r4, [r1, #16] │ │ ldr.w sl, [fp] │ │ movw r1, #31829 @ 0x7c55 │ │ movt r1, #32586 @ 0x7f4a │ │ mul.w r1, sl, r1 │ │ and.w r1, r1, ip │ │ cmp r4, r1 │ │ - bls.w 50fa0 │ │ + bls.w 511b0 │ │ ldrd lr, r2, [fp, #4] │ │ add.w r1, r1, r1, lsl #1 │ │ str r2, [sp, #24] │ │ ldr r2, [sp, #28] │ │ ldr r2, [r2, #12] │ │ ldr.w r3, [r2, r1, lsl #2] │ │ add.w r1, r2, r1, lsl #2 │ │ ldr r7, [r1, #8] │ │ cmp r7, r3 │ │ - beq.n 50ea4 │ │ + beq.n 510b4 │ │ mov r3, r1 │ │ ldr r1, [r1, #4] │ │ lsls r2, r7, #4 │ │ add.w fp, fp, #16 │ │ str.w sl, [r1, r2] │ │ adds r2, r7, #1 │ │ add.w r1, r1, r7, lsl #4 │ │ str r2, [r3, #8] │ │ ldr r2, [sp, #24] │ │ ldr r7, [sp, #32] │ │ strd lr, r2, [r1, #4] │ │ cmp r7, #0 │ │ - bne.n 50e02 │ │ - b.n 50e36 │ │ + bne.n 51012 │ │ + b.n 51046 │ │ str r0, [sp, #16] │ │ mov r0, r1 │ │ str.w ip, [sp, #12] │ │ strd r1, lr, [sp, #4] │ │ - bl 4796a │ │ + bl 47dd2 │ │ ldrd r1, lr, [sp, #4] │ │ ldrd ip, r0, [sp, #12] │ │ - b.n 50e80 │ │ + b.n 51090 │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r2, #1 │ │ movs r7, #0 │ │ - b.n 50ee2 │ │ + b.n 510f2 │ │ mla r1, r3, r1, r6 │ │ mla r1, r7, r2, r1 │ │ mov r2, r4 │ │ umull r6, r5, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r5, r3, r7, r5 │ │ mla r7, r3, r7, r5 │ │ mov r3, r6 │ │ lsls r6, r0, #31 │ │ - beq.n 50ed2 │ │ + beq.n 510e2 │ │ umull r4, r6, r3, r2 │ │ cmp r0, #1 │ │ - bne.n 50ec8 │ │ + bne.n 510d8 │ │ subs r7, r4, #1 │ │ mov.w r0, #0 │ │ sbc.w r0, r0, #0 │ │ strd r7, r0, [r8] │ │ movw r0, #43690 @ 0xaaaa │ │ movt r0, #2730 @ 0xaaa │ │ cmp r4, r0 │ │ - bls.n 50fb4 │ │ - bl 3e03c │ │ + bls.n 511c4 │ │ + bl 3e344 │ │ subs.w r0, r5, sl │ │ - beq.n 50f82 │ │ + beq.n 51192 │ │ movw r1, #43691 @ 0xaaab │ │ lsrs r0, r0, #2 │ │ movt r1, #43690 @ 0xaaaa │ │ mov.w fp, #0 │ │ mul.w r8, r0, r1 │ │ - b.n 50f3e │ │ + b.n 5114e │ │ ldr.w r0, [r9] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r7, [sp, #32] │ │ add.w fp, fp, #1 │ │ cmp fp, r8 │ │ - beq.n 50f82 │ │ + beq.n 51192 │ │ add.w r0, fp, fp, lsl #1 │ │ add.w r9, sl, r0, lsl #2 │ │ ldrd r4, r5, [r9, #4] │ │ cmp r5, #0 │ │ - beq.n 50f26 │ │ + beq.n 51136 │ │ movs r7, #0 │ │ - b.n 50f56 │ │ + b.n 51166 │ │ cmp r7, r5 │ │ - beq.n 50f26 │ │ + beq.n 51136 │ │ add.w r0, r4, r7, lsl #4 │ │ adds r7, #1 │ │ ldr.w r1, [r0, #8]! │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r6, r3, [r1] │ │ cmp r6, #0 │ │ - bne.n 50f64 │ │ + bne.n 51174 │ │ cmp r2, #1 │ │ - bne.n 50f52 │ │ + bne.n 51162 │ │ dmb ish │ │ ldr r0, [r0, #0] │ │ - bl 476ec │ │ - b.n 50f52 │ │ + bl 46a1c │ │ + b.n 51162 │ │ ldr r0, [sp, #20] │ │ - cbz r0, 50f9a │ │ + cbz r0, 511aa │ │ mov r0, r7 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ mov r7, r0 │ │ cmp.w r8, #0 │ │ - bne.n 50f86 │ │ + bne.n 51196 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r2, [pc, #28] @ (50fc0 ) │ │ + ldr r2, [pc, #28] @ (511d0 ) │ │ mov r0, r1 │ │ mov r1, r4 │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ movs r0, #4 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ cmp r4, #0 │ │ - bne.w 50db2 │ │ + bne.w 50fc2 │ │ movs r1, #0 │ │ movs r0, #4 │ │ - b.n 50dda │ │ - ldr r2, [sp, #856] @ 0x358 │ │ + b.n 50fea │ │ + ldr r0, [sp, #856] @ 0x358 │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #44 @ 0x2c │ │ mov sl, r0 │ │ ldr r0, [r0, #20] │ │ str.w sl, [sp, #12] │ │ adds r0, #1 │ │ str.w r0, [sl, #20] │ │ - bcc.w 512a8 │ │ + bcc.w 514b8 │ │ mov.w r8, #0 │ │ mov.w r9, #1 │ │ strd r8, r8, [sl] │ │ add.w r0, r9, r9, lsl #1 │ │ lsls r4, r0, #2 │ │ mov r0, r4 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 51516 │ │ + beq.w 51726 │ │ adds r1, r0, #4 │ │ movs r2, #0 │ │ movs r3, #8 │ │ mov r6, r9 │ │ str.w r2, [r1, #-4] │ │ subs r6, #1 │ │ strd r3, r2, [r1], #12 │ │ - bne.n 51002 │ │ + bne.n 51212 │ │ mov r1, r9 │ │ ldr.w r2, [sl, #8] │ │ mov.w fp, #0 │ │ str r2, [sp, #0] │ │ ldrd r3, r2, [sl, #12] │ │ strd r1, r0, [sl, #8] │ │ add.w r0, r2, r2, lsl #1 │ │ str.w r9, [sl, #16] │ │ add.w r0, r3, r0, lsl #2 │ │ mov r1, r3 │ │ str r0, [sp, #16] │ │ str r3, [sp, #4] │ │ cmp r3, #0 │ │ - beq.w 511e8 │ │ + beq.w 513f8 │ │ clz r0, fp │ │ ldr r7, [sp, #28] │ │ lsrs r2, r0, #5 │ │ mov r9, r6 │ │ lsls r0, r2, #31 │ │ str r7, [sp, #36] @ 0x24 │ │ - beq.n 51056 │ │ + beq.n 51266 │ │ str r4, [sp, #40] @ 0x28 │ │ mov r5, fp │ │ ldr r0, [sp, #16] │ │ cmp r1, r0 │ │ - bne.n 5111e │ │ - b.n 512fc │ │ + bne.n 5132e │ │ + b.n 5150c │ │ cmp r4, r9 │ │ - beq.n 5110c │ │ + beq.n 5131c │ │ ldr r5, [r4, #8] │ │ add.w r0, r4, #24 │ │ str r0, [sp, #40] @ 0x28 │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ - bne.w 51208 │ │ + bne.w 51418 │ │ cmp.w fp, #0 │ │ - beq.n 51114 │ │ + beq.n 51324 │ │ str.w fp, [sp, #32] │ │ mov fp, r1 │ │ ldr r0, [sp, #40] @ 0x28 │ │ str.w r9, [sp, #8] │ │ subs.w r0, r9, r0 │ │ - beq.n 510f2 │ │ + beq.n 51302 │ │ movw r1, #43691 @ 0xaaab │ │ lsrs r0, r0, #3 │ │ movt r1, #43690 @ 0xaaaa │ │ mov.w sl, #0 │ │ mul.w r8, r0, r1 │ │ - b.n 510ac │ │ + b.n 512bc │ │ ldr.w r0, [r9, #8] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w sl, sl, #1 │ │ cmp sl, r8 │ │ - beq.n 510f2 │ │ + beq.n 51302 │ │ add.w r0, sl, sl, lsl #1 │ │ ldr r1, [sp, #40] @ 0x28 │ │ add.w r9, r1, r0, lsl #3 │ │ ldrd r6, r4, [r9, #12] │ │ cmp r4, #0 │ │ - beq.n 51096 │ │ + beq.n 512a6 │ │ movs r7, #0 │ │ - b.n 510c6 │ │ + b.n 512d6 │ │ cmp r7, r4 │ │ - beq.n 51096 │ │ + beq.n 512a6 │ │ ldr.w r1, [r6, r7, lsl #2] │ │ mov r0, r7 │ │ adds r7, #1 │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r5, r3, [r1] │ │ cmp r5, #0 │ │ - bne.n 510d2 │ │ + bne.n 512e2 │ │ cmp r2, #1 │ │ - bne.n 510c2 │ │ + bne.n 512d2 │ │ dmb ish │ │ ldr.w r0, [r6, r0, lsl #2] │ │ - bl 476ec │ │ - b.n 510c2 │ │ + bl 46a1c │ │ + b.n 512d2 │ │ ldr r0, [sp, #36] @ 0x24 │ │ - cbz r0, 510fc │ │ + cbz r0, 5130c │ │ ldr r0, [sp, #32] │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r5, #0 │ │ mov r1, fp │ │ ldrd r9, sl, [sp, #8] │ │ ldr r0, [sp, #16] │ │ cmp r1, r0 │ │ - bne.n 5111e │ │ - b.n 512fc │ │ + bne.n 5132e │ │ + b.n 5150c │ │ str r4, [sp, #40] @ 0x28 │ │ cmp.w fp, #0 │ │ - bne.n 51070 │ │ + bne.n 51280 │ │ movs r5, #0 │ │ ldr r0, [sp, #16] │ │ cmp r1, r0 │ │ - beq.w 512fc │ │ + beq.w 5150c │ │ mov r8, r1 │ │ ldr.w r7, [r8], #12 │ │ cmp.w r7, #2147483648 @ 0x80000000 │ │ - beq.w 51300 │ │ + beq.w 51510 │ │ ldrd r4, r0, [r1, #4] │ │ movs r2, #0 │ │ add.w r0, r0, r0, lsl #1 │ │ mov r1, r8 │ │ cmp r5, #0 │ │ add.w r6, r4, r0, lsl #3 │ │ mov fp, r4 │ │ - beq.w 51042 │ │ + beq.w 51252 │ │ add r0, sp, #20 │ │ str r6, [sp, #32] │ │ stmia r0!, {r4, r5, r7} │ │ ldr r0, [sp, #40] @ 0x28 │ │ subs.w r0, r9, r0 │ │ - beq.n 511c2 │ │ + beq.n 513d2 │ │ movw r1, #43691 @ 0xaaab │ │ lsrs r0, r0, #3 │ │ movt r1, #43690 @ 0xaaaa │ │ movs r5, #0 │ │ mul.w fp, r0, r1 │ │ - b.n 51176 │ │ + b.n 51386 │ │ ldr r0, [r6, #8] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r7 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #1 │ │ cmp r5, fp │ │ - beq.n 511c2 │ │ + beq.n 513d2 │ │ add.w r0, r5, r5, lsl #1 │ │ ldr r1, [sp, #40] @ 0x28 │ │ add.w r6, r1, r0, lsl #3 │ │ ldrd r7, sl, [r6, #12] │ │ cmp.w sl, #0 │ │ - beq.n 51164 │ │ + beq.n 51374 │ │ mov.w r9, #0 │ │ - b.n 51194 │ │ + b.n 513a4 │ │ cmp r9, sl │ │ - beq.n 51164 │ │ + beq.n 51374 │ │ ldr.w r1, [r7, r9, lsl #2] │ │ mov r0, r9 │ │ add.w r9, r9, #1 │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r4, r3, [r1] │ │ cmp r4, #0 │ │ - bne.n 511a2 │ │ + bne.n 513b2 │ │ cmp r2, #1 │ │ - bne.n 51190 │ │ + bne.n 513a0 │ │ dmb ish │ │ ldr.w r0, [r7, r0, lsl #2] │ │ - bl 476ec │ │ - b.n 51190 │ │ + bl 46a1c │ │ + b.n 513a0 │ │ ldr r0, [sp, #36] @ 0x24 │ │ movs r2, #0 │ │ ldr r4, [sp, #20] │ │ mov r1, r8 │ │ cmp r0, #0 │ │ ldr.w sl, [sp, #12] │ │ ldr r6, [sp, #32] │ │ ldrd r0, r7, [sp, #24] │ │ mov fp, r4 │ │ - beq.w 51042 │ │ - blx d87c0 │ │ + beq.w 51252 │ │ + blx d87d0 │ │ movs r2, #0 │ │ mov fp, r4 │ │ mov r1, r8 │ │ - b.n 51042 │ │ + b.n 51252 │ │ cmp.w fp, #0 │ │ - beq.w 5145c │ │ + beq.w 5166c │ │ mov r0, r4 │ │ cmp r4, r6 │ │ str r1, [sp, #20] │ │ - beq.w 5146e │ │ + beq.w 5167e │ │ ldr r5, [r0, #8] │ │ adds r0, #24 │ │ str r0, [sp, #40] @ 0x28 │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ - bne.n 51218 │ │ - b.n 51470 │ │ + bne.n 51428 │ │ + b.n 51680 │ │ mov r6, r9 │ │ ldr.w r8, [sl] │ │ ldr.w r9, [sl, #16] │ │ str r1, [sp, #20] │ │ ldr r0, [sp, #36] @ 0x24 │ │ str r0, [sp, #28] │ │ mov r1, r4 │ │ ldr r4, [r4, #0] │ │ movw r0, #31829 @ 0x7c55 │ │ str r6, [sp, #32] │ │ movt r0, #32586 @ 0x7f4a │ │ muls r0, r4 │ │ and.w r0, r0, r8 │ │ cmp r9, r0 │ │ - bls.w 5151e │ │ + bls.w 5172e │ │ ldr.w sl, [r1, #4] │ │ add.w r0, r0, r0, lsl #1 │ │ ldrd lr, ip, [r1, #12] │ │ mov r7, r8 │ │ ldr r3, [r1, #20] │ │ ldr r1, [sp, #12] │ │ ldr r1, [r1, #12] │ │ add.w r8, r1, r0, lsl #2 │ │ ldr.w r2, [r1, r0, lsl #2] │ │ ldr.w r6, [r8, #8] │ │ cmp r6, r2 │ │ - beq.n 5128c │ │ + beq.n 5149c │ │ ldr.w r0, [r8, #4] │ │ add.w r1, r6, r6, lsl #1 │ │ adds r2, r6, #1 │ │ str.w r2, [r8, #8] │ │ ldr r6, [sp, #32] │ │ mov r8, r7 │ │ str.w r4, [r0, r1, lsl #3] │ │ @@ -61378,291 +61474,291 @@ │ │ str r3, [r0, #20] │ │ strd lr, ip, [r0, #12] │ │ ldr r4, [sp, #40] @ 0x28 │ │ ldr r3, [sp, #4] │ │ ldr.w sl, [sp, #12] │ │ ldr r1, [sp, #20] │ │ cmp r3, #0 │ │ - bne.w 5103a │ │ - b.n 511e8 │ │ + bne.w 5124a │ │ + b.n 513f8 │ │ mov r0, r8 │ │ str r3, [sp, #36] @ 0x24 │ │ str.w ip, [sp, #24] │ │ str.w lr, [sp, #8] │ │ - bl 479e2 │ │ + bl 47c38 │ │ ldr.w lr, [sp, #8] │ │ ldr.w ip, [sp, #24] │ │ ldr r3, [sp, #36] @ 0x24 │ │ - b.n 51256 │ │ + b.n 51466 │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r2, #1 │ │ movs r7, #0 │ │ - b.n 512c2 │ │ + b.n 514d2 │ │ umull r6, r5, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r5, r3, r7, r5 │ │ mla r7, r3, r7, r5 │ │ mov r3, r6 │ │ lsls r6, r0, #31 │ │ - beq.n 512b2 │ │ + beq.n 514c2 │ │ umull r9, r6, r3, r2 │ │ cmp r0, #1 │ │ - beq.n 512da │ │ + beq.n 514ea │ │ mla r1, r3, r1, r6 │ │ mla r1, r7, r2, r1 │ │ mov r2, r9 │ │ - b.n 512b2 │ │ + b.n 514c2 │ │ subs.w r8, r9, #1 │ │ mov.w r0, #0 │ │ sbc.w r0, r0, #0 │ │ strd r8, r0, [sl] │ │ movw r0, #43690 @ 0xaaaa │ │ movt r0, #2730 @ 0xaaa │ │ cmp r9, r0 │ │ - bls.w 51528 │ │ - bl 3e03c │ │ + bls.w 51738 │ │ + bl 3e344 │ │ ldr.w r8, [sp, #16] │ │ ldr r0, [sp, #36] @ 0x24 │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ str r0, [sp, #12] │ │ ldr r0, [sp, #4] │ │ cmp r0, #0 │ │ - beq.n 513da │ │ + beq.n 515ea │ │ str.w r9, [sp, #8] │ │ str r5, [sp, #24] │ │ ldr r0, [sp, #16] │ │ subs.w r0, r0, r8 │ │ - beq.n 513ca │ │ + beq.n 515da │ │ movw r1, #43691 @ 0xaaab │ │ lsrs r0, r0, #2 │ │ movt r1, #43690 @ 0xaaaa │ │ muls r0, r1 │ │ movs r1, #0 │ │ str r0, [sp, #28] │ │ str.w r8, [sp, #20] │ │ - b.n 51350 │ │ + b.n 51560 │ │ ldr r0, [sp, #32] │ │ ldr r0, [r0, #0] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r1, [sp, #36] @ 0x24 │ │ ldr.w r8, [sp, #20] │ │ adds r1, #1 │ │ ldr r0, [sp, #28] │ │ cmp r1, r0 │ │ - beq.n 513ca │ │ + beq.n 515da │ │ add.w r0, r1, r1, lsl #1 │ │ str r1, [sp, #36] @ 0x24 │ │ add.w r0, r8, r0, lsl #2 │ │ str r0, [sp, #32] │ │ ldrd r5, r4, [r0, #4] │ │ cmp r4, #0 │ │ - beq.n 51334 │ │ + beq.n 51544 │ │ mov.w r9, #0 │ │ - b.n 51380 │ │ + b.n 51590 │ │ ldr.w r0, [r8, #8] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r7 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r9, r9, #1 │ │ cmp r9, r4 │ │ - beq.n 51334 │ │ + beq.n 51544 │ │ add.w r0, r9, r9, lsl #1 │ │ add.w r8, r5, r0, lsl #3 │ │ ldrd r7, sl, [r8, #12] │ │ cmp.w sl, #0 │ │ - beq.n 5136a │ │ + beq.n 5157a │ │ mov.w fp, #0 │ │ - b.n 5139c │ │ + b.n 515ac │ │ cmp fp, sl │ │ - beq.n 5136a │ │ + beq.n 5157a │ │ ldr.w r1, [r7, fp, lsl #2] │ │ mov r0, fp │ │ add.w fp, fp, #1 │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r6, r3, [r1] │ │ cmp r6, #0 │ │ - bne.n 513aa │ │ + bne.n 515ba │ │ cmp r2, #1 │ │ - bne.n 51398 │ │ + bne.n 515a8 │ │ dmb ish │ │ ldr.w r0, [r7, r0, lsl #2] │ │ - bl 476ec │ │ - b.n 51398 │ │ + bl 46a1c │ │ + b.n 515a8 │ │ ldr r0, [sp, #0] │ │ ldr r5, [sp, #24] │ │ cmp r0, #0 │ │ ldrd r0, r9, [sp, #4] │ │ it ne │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ cmp r5, #0 │ │ - beq.n 5145c │ │ + beq.n 5166c │ │ ldr r0, [sp, #40] @ 0x28 │ │ mov fp, r5 │ │ subs.w r0, r9, r0 │ │ - beq.n 51458 │ │ + beq.n 51668 │ │ movw r1, #43691 @ 0xaaab │ │ lsrs r0, r0, #3 │ │ movt r1, #43690 @ 0xaaaa │ │ mov.w sl, #0 │ │ mul.w r8, r0, r1 │ │ - b.n 51412 │ │ + b.n 51622 │ │ ldr.w r0, [r9, #8] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w sl, sl, #1 │ │ cmp sl, r8 │ │ - beq.n 51458 │ │ + beq.n 51668 │ │ add.w r0, sl, sl, lsl #1 │ │ ldr r1, [sp, #40] @ 0x28 │ │ add.w r9, r1, r0, lsl #3 │ │ ldrd r4, r5, [r9, #12] │ │ cmp r5, #0 │ │ - beq.n 513fc │ │ + beq.n 5160c │ │ movs r7, #0 │ │ - b.n 5142c │ │ + b.n 5163c │ │ cmp r7, r5 │ │ - beq.n 513fc │ │ + beq.n 5160c │ │ ldr.w r1, [r4, r7, lsl #2] │ │ mov r0, r7 │ │ adds r7, #1 │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r6, r3, [r1] │ │ cmp r6, #0 │ │ - bne.n 51438 │ │ + bne.n 51648 │ │ cmp r2, #1 │ │ - bne.n 51428 │ │ + bne.n 51638 │ │ dmb ish │ │ ldr.w r0, [r4, r0, lsl #2] │ │ - bl 476ec │ │ - b.n 51428 │ │ + bl 46a1c │ │ + b.n 51638 │ │ ldr r0, [sp, #12] │ │ - cbz r0, 51462 │ │ + cbz r0, 51672 │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r0, fp │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ str r0, [sp, #40] @ 0x28 │ │ str.w fp, [sp, #32] │ │ mov fp, r6 │ │ ldr r0, [sp, #40] @ 0x28 │ │ subs r0, r6, r0 │ │ - beq.n 514ec │ │ + beq.n 516fc │ │ movw r1, #43691 @ 0xaaab │ │ lsrs r0, r0, #3 │ │ movt r1, #43690 @ 0xaaaa │ │ mov.w sl, #0 │ │ mul.w r8, r0, r1 │ │ - b.n 514a6 │ │ + b.n 516b6 │ │ ldr.w r0, [r9, #8] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w sl, sl, #1 │ │ cmp sl, r8 │ │ - beq.n 514ec │ │ + beq.n 516fc │ │ add.w r0, sl, sl, lsl #1 │ │ ldr r1, [sp, #40] @ 0x28 │ │ add.w r9, r1, r0, lsl #3 │ │ ldrd r5, r7, [r9, #12] │ │ cmp r7, #0 │ │ - beq.n 51490 │ │ + beq.n 516a0 │ │ movs r4, #0 │ │ - b.n 514c0 │ │ + b.n 516d0 │ │ cmp r4, r7 │ │ - beq.n 51490 │ │ + beq.n 516a0 │ │ ldr.w r1, [r5, r4, lsl #2] │ │ mov r0, r4 │ │ adds r4, #1 │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r6, r3, [r1] │ │ cmp r6, #0 │ │ - bne.n 514cc │ │ + bne.n 516dc │ │ cmp r2, #1 │ │ - bne.n 514bc │ │ + bne.n 516cc │ │ dmb ish │ │ ldr.w r0, [r5, r0, lsl #2] │ │ - bl 476ec │ │ - b.n 514bc │ │ + bl 46a1c │ │ + b.n 516cc │ │ ldr r0, [sp, #28] │ │ - cbz r0, 51500 │ │ + cbz r0, 51710 │ │ ldr r0, [sp, #32] │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r0, #0 │ │ mov r9, fp │ │ str r0, [sp, #12] │ │ movs r5, #0 │ │ - b.n 51508 │ │ + b.n 51718 │ │ movs r0, #1 │ │ movs r5, #0 │ │ mov r9, fp │ │ str r0, [sp, #12] │ │ ldr r0, [sp, #4] │ │ ldr.w r8, [sp, #20] │ │ cmp r0, #0 │ │ - bne.w 51310 │ │ - b.n 513da │ │ + bne.w 51520 │ │ + b.n 515ea │ │ movs r0, #4 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ - ldr r2, [pc, #32] @ (51540 ) │ │ + bl 3e2ac │ │ + ldr r2, [pc, #32] @ (51750 ) │ │ mov r1, r9 │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ cmp.w r9, #0 │ │ - beq.n 51534 │ │ + beq.n 51744 │ │ ldr.w sl, [sp, #12] │ │ - b.n 50fe8 │ │ + b.n 511f8 │ │ movs r1, #0 │ │ movs r0, #4 │ │ ldr.w sl, [sp, #12] │ │ - b.n 51010 │ │ + b.n 51220 │ │ nop │ │ - str r5, [sp, #360] @ 0x168 │ │ + str r3, [sp, #360] @ 0x168 │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #108 @ 0x6c │ │ ldr r1, [r0, #20] │ │ str r0, [sp, #16] │ │ adds r4, r1, #1 │ │ mov.w r1, #0 │ │ str r4, [r0, #20] │ │ - bcc.w 51926 │ │ + bcc.w 51b36 │ │ movs r6, #1 │ │ strd r1, r1, [r0] │ │ add.w r0, r6, r6, lsl #1 │ │ lsls r4, r0, #2 │ │ mov r0, r4 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 519a8 │ │ + beq.w 51bb8 │ │ adds r1, r0, #4 │ │ movs r2, #0 │ │ movs r3, #8 │ │ mov r5, r6 │ │ str.w r2, [r1, #-4] │ │ subs r5, #1 │ │ strd r3, r2, [r1], #12 │ │ - bne.n 5157a │ │ + bne.n 5178a │ │ mov r1, r6 │ │ ldr r3, [sp, #16] │ │ ldr r2, [r3, #8] │ │ str r2, [sp, #4] │ │ ldrd r7, r2, [r3, #12] │ │ strd r1, r0, [r3, #8] │ │ add.w r0, r2, r2, lsl #1 │ │ @@ -61675,15 +61771,15 @@ │ │ str r7, [sp, #24] │ │ ldr r0, [sp, #16] │ │ ldr r2, [r0, #0] │ │ str r2, [sp, #52] @ 0x34 │ │ ldrd r2, r0, [r0, #12] │ │ str r2, [sp, #48] @ 0x30 │ │ str r0, [sp, #56] @ 0x38 │ │ - b.n 515ea │ │ + b.n 517fa │ │ ldr.w r0, [fp, #4] │ │ mov.w r1, sl, lsl #6 │ │ str.w r9, [r0, r1] │ │ add.w r0, r0, sl, lsl #6 │ │ add r1, sp, #64 @ 0x40 │ │ strd r7, r6, [r0, #4] │ │ strd r8, r4, [r0, #12] │ │ @@ -61693,551 +61789,551 @@ │ │ ldmia.w r1, {r2, r3, r4, r5, r6, r7} │ │ stmia r0!, {r2, r3, r4, r5, r6, r7} │ │ add.w r0, sl, #1 │ │ str.w r0, [fp, #8] │ │ ldr r1, [sp, #40] @ 0x28 │ │ ldr r0, [sp, #28] │ │ cmp r0, #0 │ │ - beq.w 518fa │ │ + beq.w 51b0a │ │ ldr r0, [sp, #60] @ 0x3c │ │ cmp r1, r0 │ │ - beq.n 5164e │ │ + beq.n 5185e │ │ ldr r4, [r1, #16] │ │ add.w r2, r1, #64 @ 0x40 │ │ cmp.w r4, #2147483648 @ 0x80000000 │ │ - beq.n 51650 │ │ + beq.n 51860 │ │ ldrd r9, r7, [r1] │ │ add r0, sp, #64 @ 0x40 │ │ ldrd r6, r8, [r1, #8] │ │ adds r1, #20 │ │ str r2, [sp, #40] @ 0x28 │ │ movs r2, #44 @ 0x2c │ │ - bl d53ca │ │ + bl d509e │ │ movw r0, #31829 @ 0x7c55 │ │ ldr r1, [sp, #52] @ 0x34 │ │ movt r0, #32586 @ 0x7f4a │ │ mul.w r0, r9, r0 │ │ ands r0, r1 │ │ ldr r1, [sp, #56] @ 0x38 │ │ cmp r1, r0 │ │ - bls.w 5199e │ │ + bls.w 51bae │ │ add.w r0, r0, r0, lsl #1 │ │ ldr r2, [sp, #48] @ 0x30 │ │ add.w fp, r2, r0, lsl #2 │ │ ldr.w r1, [r2, r0, lsl #2] │ │ ldr.w sl, [fp, #8] │ │ cmp sl, r1 │ │ - bne.n 515ba │ │ + bne.n 517ca │ │ mov r0, fp │ │ - bl 479a6 │ │ - b.n 515ba │ │ + bl 47e86 │ │ + b.n 517ca │ │ mov r2, r1 │ │ ldr r0, [sp, #60] @ 0x3c │ │ subs r0, r0, r2 │ │ - beq.w 518ee │ │ + beq.w 51afe │ │ lsrs r0, r0, #6 │ │ movs r1, #0 │ │ str r0, [sp, #32] │ │ str r2, [sp, #40] @ 0x28 │ │ - b.n 5167e │ │ + b.n 5188e │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldr r0, [r0, #44] @ 0x2c │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #52] @ 0x34 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r1, [sp, #36] @ 0x24 │ │ ldr r2, [sp, #40] @ 0x28 │ │ adds r1, #1 │ │ ldr r0, [sp, #32] │ │ cmp r1, r0 │ │ - beq.w 518ee │ │ + beq.w 51afe │ │ add.w r8, r2, r1, lsl #6 │ │ str r1, [sp, #36] @ 0x24 │ │ ldrd r4, r6, [r8, #44] @ 0x2c │ │ - cbz r6, 516be │ │ + cbz r6, 518ce │ │ movs r7, #0 │ │ - b.n 51692 │ │ + b.n 518a2 │ │ cmp r7, r6 │ │ - beq.n 516be │ │ + beq.n 518ce │ │ ldr.w r1, [r4, r7, lsl #2] │ │ mov r0, r7 │ │ adds r7, #1 │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r5, r3, [r1] │ │ cmp r5, #0 │ │ - bne.n 5169e │ │ + bne.n 518ae │ │ cmp r2, #1 │ │ - bne.n 5168e │ │ + bne.n 5189e │ │ dmb ish │ │ ldr.w r0, [r4, r0, lsl #2] │ │ - bl 476ec │ │ - b.n 5168e │ │ + bl 46a1c │ │ + b.n 5189e │ │ add.w r5, r8, #8 │ │ ldr r0, [r5, #32] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r0, r1, [r5, #12] │ │ cmp r1, #0 │ │ str r5, [sp, #44] @ 0x2c │ │ strd r1, r0, [sp, #48] @ 0x30 │ │ - beq.n 51774 │ │ + beq.n 51984 │ │ movs r1, #0 │ │ - b.n 516f8 │ │ + b.n 51908 │ │ ldr r0, [sp, #56] @ 0x38 │ │ ldr r0, [r0, #0] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r1, [sp, #60] @ 0x3c │ │ ldr r0, [sp, #48] @ 0x30 │ │ adds r1, #1 │ │ cmp r1, r0 │ │ - beq.n 51774 │ │ + beq.n 51984 │ │ str r1, [sp, #60] @ 0x3c │ │ add.w r0, r1, r1, lsl #1 │ │ ldr r1, [sp, #52] @ 0x34 │ │ add.w r0, r1, r0, lsl #2 │ │ str r0, [sp, #56] @ 0x38 │ │ ldrd r5, r7, [r0, #4] │ │ cmp r7, #0 │ │ - beq.n 516e0 │ │ + beq.n 518f0 │ │ mov.w r8, #0 │ │ - b.n 5172a │ │ + b.n 5193a │ │ ldr.w r0, [r9, #8] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r8, r8, #1 │ │ cmp r8, r7 │ │ - beq.n 516e0 │ │ + beq.n 518f0 │ │ add.w r0, r8, r8, lsl #1 │ │ add.w r9, r5, r0, lsl #3 │ │ ldrd r6, fp, [r9, #12] │ │ cmp.w fp, #0 │ │ - beq.n 51714 │ │ + beq.n 51924 │ │ mov.w sl, #0 │ │ - b.n 51746 │ │ + b.n 51956 │ │ cmp sl, fp │ │ - beq.n 51714 │ │ + beq.n 51924 │ │ ldr.w r1, [r6, sl, lsl #2] │ │ mov r0, sl │ │ add.w sl, sl, #1 │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r4, r3, [r1] │ │ cmp r4, #0 │ │ - bne.n 51754 │ │ + bne.n 51964 │ │ cmp r2, #1 │ │ - bne.n 51742 │ │ + bne.n 51952 │ │ dmb ish │ │ ldr.w r0, [r6, r0, lsl #2] │ │ - bl 476ec │ │ - b.n 51742 │ │ + bl 46a1c │ │ + b.n 51952 │ │ ldr r4, [sp, #44] @ 0x2c │ │ ldr r0, [r4, #8] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #52] @ 0x34 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r0, r1, [r4, #48] @ 0x30 │ │ mov.w fp, #88 @ 0x58 │ │ cmp r1, #0 │ │ strd r1, r0, [sp, #48] @ 0x30 │ │ - beq.w 51662 │ │ + beq.w 51872 │ │ movs r4, #0 │ │ - b.n 517a0 │ │ + b.n 519b0 │ │ ldr r0, [sp, #48] @ 0x30 │ │ cmp r4, r0 │ │ - beq.w 51662 │ │ + beq.w 51872 │ │ str r4, [sp, #60] @ 0x3c │ │ add.w r0, r4, r4, lsl #4 │ │ ldr r1, [sp, #52] @ 0x34 │ │ add.w r0, r1, r0, lsl #3 │ │ str r0, [sp, #56] @ 0x38 │ │ ldrd r4, sl, [r0, #92] @ 0x5c │ │ cmp.w sl, #0 │ │ - beq.n 5184c │ │ + beq.n 51a5c │ │ movs r5, #0 │ │ - b.n 517ca │ │ + b.n 519da │ │ ldr.w r0, [r8, r0] │ │ - blx d87c0 │ │ + blx d87d0 │ │ adds r5, #1 │ │ cmp r5, sl │ │ - beq.n 5184c │ │ + beq.n 51a5c │ │ mla r8, r5, fp, r4 │ │ movs r1, #1 │ │ ldr.w r0, [r8, #16] │ │ cmp r0, #0 │ │ it mi │ │ eormi.w r1, r0, #2147483648 @ 0x80000000 │ │ cmp r1, #0 │ │ - beq.n 517c4 │ │ + beq.n 519d4 │ │ cmp r1, #1 │ │ - bne.n 51840 │ │ + bne.n 51a50 │ │ cmp r0, #0 │ │ mov.w fp, #88 @ 0x58 │ │ itt ne │ │ ldrne.w r0, [r8, #20] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r6, r7, [r8, #32] │ │ - cbz r7, 51816 │ │ + cbz r7, 51a26 │ │ add.w r9, r6, #16 │ │ ldr.w r0, [r9] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r9, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r9, r9, #48 @ 0x30 │ │ subs r7, #1 │ │ - bne.n 517fe │ │ + bne.n 51a0e │ │ ldr.w r0, [r8, #28] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [r8, #56] @ 0x38 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r8, #60] @ 0x3c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [r8, #68] @ 0x44 │ │ cmp r0, #0 │ │ - beq.n 517c4 │ │ + beq.n 519d4 │ │ movs r0, #72 @ 0x48 │ │ - b.n 517bc │ │ + b.n 519cc │ │ ldr.w r0, [r8, #72] @ 0x48 │ │ cmp r0, #0 │ │ - beq.n 517c4 │ │ + beq.n 519d4 │ │ movs r0, #76 @ 0x4c │ │ - b.n 517bc │ │ + b.n 519cc │ │ ldr.w r8, [sp, #56] @ 0x38 │ │ ldr.w r0, [r8, #88] @ 0x58 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r8 │ │ ldrb.w r1, [r0, #8]! │ │ cmp r1, #32 │ │ it ne │ │ - blne 42fcc │ │ + blne 432d4 │ │ ldrd r4, r5, [r8, #104] @ 0x68 │ │ - cbz r5, 51888 │ │ + cbz r5, 51a98 │ │ add.w r6, r4, #16 │ │ ldr r0, [r6, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #48 @ 0x30 │ │ subs r5, #1 │ │ - bne.n 51876 │ │ + bne.n 51a86 │ │ ldr.w r0, [r8, #100] @ 0x64 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r4, r5, [r8, #116] @ 0x74 │ │ - cbz r5, 518b2 │ │ + cbz r5, 51ac2 │ │ add.w r6, r4, #16 │ │ ldr r0, [r6, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #48 @ 0x30 │ │ subs r5, #1 │ │ - bne.n 518a0 │ │ + bne.n 51ab0 │ │ ldr.w r0, [r8, #112] @ 0x70 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r4, [sp, #60] @ 0x3c │ │ ldr.w r0, [r8, #128] @ 0x80 │ │ dmb ish │ │ adds r4, #1 │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 518cc │ │ + bne.n 51adc │ │ cmp r1, #1 │ │ - bne.w 51798 │ │ + bne.w 519a8 │ │ dmb ish │ │ ldr.w r0, [r8, #128] @ 0x80 │ │ - bl 476ec │ │ - b.n 51798 │ │ + bl 46a1c │ │ + b.n 519a8 │ │ ldr r0, [sp, #20] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #28] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #12] │ │ cmp r0, #0 │ │ - beq.n 51998 │ │ + beq.n 51ba8 │ │ ldr r1, [sp, #8] │ │ ldr r2, [sp, #24] │ │ cmp r2, r1 │ │ - beq.n 51974 │ │ + beq.n 51b84 │ │ mov r0, r2 │ │ ldr.w r3, [r0], #12 │ │ str r3, [sp, #20] │ │ cmp.w r3, #2147483648 @ 0x80000000 │ │ - beq.n 51976 │ │ + beq.n 51b86 │ │ ldrd r1, r2, [r2, #4] │ │ add.w r2, r1, r2, lsl #6 │ │ str r2, [sp, #60] @ 0x3c │ │ strd r0, r1, [sp, #24] │ │ - b.n 515aa │ │ + b.n 517ba │ │ movs r3, #2 │ │ movs r2, #1 │ │ movs r7, #0 │ │ - b.n 51948 │ │ + b.n 51b58 │ │ mla r1, r3, r1, r5 │ │ mla r1, r7, r2, r1 │ │ mov r2, r6 │ │ umull r6, r5, r3, r3 │ │ lsrs r4, r4, #1 │ │ mla r5, r3, r7, r5 │ │ mla r7, r3, r7, r5 │ │ mov r3, r6 │ │ lsls r6, r4, #31 │ │ - beq.n 51938 │ │ + beq.n 51b48 │ │ umull r6, r5, r3, r2 │ │ cmp r4, #1 │ │ - bne.n 5192e │ │ + bne.n 51b3e │ │ subs r0, r6, #1 │ │ mov.w r1, #0 │ │ ldr r2, [sp, #16] │ │ sbc.w r1, r1, #0 │ │ strd r0, r1, [r2] │ │ movw r0, #43690 @ 0xaaaa │ │ movt r0, #2730 @ 0xaaa │ │ cmp r6, r0 │ │ - bls.n 519b0 │ │ - bl 3e03c │ │ + bls.n 51bc0 │ │ + bl 3e344 │ │ mov r0, r1 │ │ subs r1, r1, r0 │ │ movw r2, #43691 @ 0xaaab │ │ movt r2, #43690 @ 0xaaaa │ │ lsrs r1, r1, #2 │ │ muls r1, r2 │ │ - bl 472ca │ │ + bl 4761e │ │ ldr r0, [sp, #4] │ │ - cbz r0, 51998 │ │ + cbz r0, 51ba8 │ │ ldr r0, [sp, #12] │ │ add sp, #108 @ 0x6c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #108 @ 0x6c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r2, [pc, #28] @ (519bc ) │ │ + ldr r2, [pc, #28] @ (51bcc ) │ │ ldr r1, [sp, #56] @ 0x38 │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ movs r0, #4 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ cmp r6, #0 │ │ - bne.w 51560 │ │ + bne.w 51770 │ │ movs r1, #0 │ │ movs r0, #4 │ │ - b.n 51588 │ │ - str r0, [sp, #872] @ 0x368 │ │ + b.n 51798 │ │ + ldrh r2, [r3, #54] @ 0x36 │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #4 │ │ ldrd sl, fp, [r0, #92] @ 0x5c │ │ cmp.w fp, #0 │ │ str r0, [sp, #0] │ │ - beq.n 51a52 │ │ + beq.n 51c62 │ │ movs r4, #0 │ │ mov.w r9, #88 @ 0x58 │ │ - b.n 519ec │ │ + b.n 51bfc │ │ ldr r0, [r5, #72] @ 0x48 │ │ - cbz r0, 519e6 │ │ + cbz r0, 51bf6 │ │ movs r0, #76 @ 0x4c │ │ ldr r0, [r5, r0] │ │ - blx d87c0 │ │ + blx d87d0 │ │ adds r4, #1 │ │ cmp r4, fp │ │ - beq.n 51a52 │ │ + beq.n 51c62 │ │ mla r5, r4, r9, sl │ │ movs r1, #1 │ │ ldr r0, [r5, #16] │ │ cmp r0, #0 │ │ it mi │ │ eormi.w r1, r0, #2147483648 @ 0x80000000 │ │ cmp r1, #0 │ │ - beq.n 519e6 │ │ + beq.n 51bf6 │ │ cmp r1, #1 │ │ - bne.n 519da │ │ + bne.n 51bea │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #20] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r6, r7, [r5, #32] │ │ - cbz r7, 51a30 │ │ + cbz r7, 51c40 │ │ add.w r8, r6, #16 │ │ ldr.w r0, [r8] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r8, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r8, r8, #48 @ 0x30 │ │ subs r7, #1 │ │ - bne.n 51a18 │ │ + bne.n 51c28 │ │ ldr r0, [r5, #28] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r5, #56] @ 0x38 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #60] @ 0x3c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r5, #68] @ 0x44 │ │ cmp r0, #0 │ │ - beq.n 519e6 │ │ + beq.n 51bf6 │ │ movs r0, #72 @ 0x48 │ │ - b.n 519e0 │ │ + b.n 51bf0 │ │ ldr r7, [sp, #0] │ │ ldr r0, [r7, #88] @ 0x58 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, sl │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r7 │ │ ldrb.w r1, [r0, #8]! │ │ cmp r1, #32 │ │ it ne │ │ - blne 42fcc │ │ + blne 432d4 │ │ ldrd r5, r4, [r7, #104] @ 0x68 │ │ - cbz r4, 51a8a │ │ + cbz r4, 51c9a │ │ add.w r6, r5, #16 │ │ ldr r0, [r6, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #48 @ 0x30 │ │ subs r4, #1 │ │ - bne.n 51a78 │ │ + bne.n 51c88 │ │ ldr r0, [r7, #100] @ 0x64 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r5, r4, [r7, #116] @ 0x74 │ │ - cbz r4, 51ab2 │ │ + cbz r4, 51cc2 │ │ add.w r6, r5, #16 │ │ ldr r0, [r6, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #48 @ 0x30 │ │ subs r4, #1 │ │ - bne.n 51aa0 │ │ + bne.n 51cb0 │ │ ldr r0, [r7, #112] @ 0x70 │ │ - cbz r0, 51ac2 │ │ + cbz r0, 51cd2 │ │ mov r0, r5 │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #32 │ │ mov r7, r1 │ │ mov r4, r0 │ │ ldrd r0, r1, [sp, #56] @ 0x38 │ │ strd r2, r3, [sp, #4] │ │ add r2, sp, #12 │ │ strd r0, r1, [sp, #12] │ │ add r1, sp, #4 │ │ mov r0, r7 │ │ movs r3, #0 │ │ - blx 9df00 │ │ + blx 9df0c │ │ movs r5, #3 │ │ adds r1, r0, #1 │ │ movt r5, #32768 @ 0x8000 │ │ cmp r1, #2 │ │ - bcs.n 51b02 │ │ + bcs.n 51d12 │ │ add.w r0, r5, #14 │ │ str r0, [r4, #0] │ │ add sp, #32 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movw r1, #34744 @ 0x87b8 │ │ movt r1, #65535 @ 0xffff │ │ cmp r0, r1 │ │ - bne.n 51b1c │ │ + bne.n 51d2c │ │ strd r5, r7, [r4] │ │ strd r5, r0, [r4, #8] │ │ add sp, #32 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ mov r8, r0 │ │ - blx a96f8 │ │ + blx a9704 │ │ mov r5, r0 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #20 │ │ mov r1, r5 │ │ - bl 402e0 │ │ + bl 405e8 │ │ add r5, sp, #20 │ │ ldmia r5, {r0, r1, r5} │ │ - ldr r6, [pc, #72] @ (51b80 ) │ │ + ldr r6, [pc, #72] @ (51d90 ) │ │ cmp r0, #0 │ │ add r6, pc │ │ ite eq │ │ moveq r6, r1 │ │ movne r5, #27 │ │ cmp.w r5, #4294967295 @ 0xffffffff │ │ - bgt.n 51b4c │ │ - bl 3e03c │ │ - cbz r5, 51b5a │ │ + bgt.n 51d5c │ │ + bl 3e344 │ │ + cbz r5, 51d6a │ │ mov r0, r5 │ │ - blx d87f0 │ │ - cbz r0, 51b76 │ │ + blx d8810 │ │ + cbz r0, 51d86 │ │ mov r7, r0 │ │ - b.n 51b5c │ │ + b.n 51d6c │ │ movs r7, #1 │ │ mov r0, r7 │ │ mov r1, r6 │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ mov r0, r8 │ │ strd r5, r7, [r4] │ │ strd r5, r0, [r4, #8] │ │ add sp, #32 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movs r0, #1 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - ldr r7, [pc, #428] @ (51d30 ) │ │ + ldr r5, [pc, #364] @ (51f00 ) │ │ vtbl.8 d30, {d12-d13}, d29 │ │ - ldr r7, [pc, #960] @ (51f48 ) │ │ + ldr r7, [pc, #960] @ (52158 ) │ │ sub sp, #36 @ 0x24 │ │ mov r4, r0 │ │ ldrd r6, r0, [sp, #72] @ 0x48 │ │ mov r7, r2 │ │ uxtb r2, r2 │ │ cmp r2, #14 │ │ - bhi.n 51bde │ │ + bhi.n 51dee │ │ mov r5, r3 │ │ tbh [pc, r2, lsl #1] │ │ movs r7, r1 │ │ movs r7, r1 │ │ lsls r7, r0, #4 │ │ lsls r3, r2, #4 │ │ lsls r1, r4, #4 │ │ @@ -62249,56 +62345,56 @@ │ │ movs r0, r4 │ │ movs r0, r4 │ │ movs r0, r4 │ │ movs r0, r4 │ │ lsls r6, r6, #3 │ │ ldr r2, [r4, #8] │ │ cmp r2, r1 │ │ - bls.w 51cf8 │ │ + bls.w 51f08 │ │ ldr r3, [r4, #4] │ │ cmp r1, r3 │ │ - bcs.w 52562 │ │ + bcs.w 52772 │ │ ldr r2, [r4, #0] │ │ ldrb r1, [r2, r1] │ │ movs r2, #1 │ │ movt r2, #257 @ 0x101 │ │ muls r1, r2 │ │ add.w r1, r1, #256 @ 0x100 │ │ - b.n 51cfc │ │ + b.n 51f0c │ │ mov r5, r0 │ │ add r0, sp, #24 │ │ mov r2, r1 │ │ mov r1, r4 │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r0, [sp, #24] │ │ cmp r0, #1 │ │ - bne.w 51e00 │ │ + bne.w 52010 │ │ sub.w r0, r7, #8 │ │ uxtb r1, r0 │ │ cmp r1, #8 │ │ - bcs.w 5256e │ │ + bcs.w 5277e │ │ ldr r0, [sp, #28] │ │ - ldr r2, [pc, #856] @ (51f5c ) │ │ + ldr r2, [pc, #856] @ (5216c ) │ │ add r2, pc │ │ ldr.w r1, [r2, r1, lsl #2] │ │ ldr r2, [sp, #32] │ │ muls r1, r2 │ │ ldr r2, [r4, #4] │ │ adds r7, r1, r0 │ │ - bcs.w 52528 │ │ + bcs.w 52738 │ │ cmp r7, r2 │ │ - bhi.w 52528 │ │ + bhi.w 52738 │ │ ldr r2, [r4, #0] │ │ mov ip, r5 │ │ mov fp, r6 │ │ cmp r1, #17 │ │ add r0, r2 │ │ - bcs.w 51f68 │ │ + bcs.w 52178 │ │ cmp r1, #8 │ │ - bls.w 523c8 │ │ + bls.w 525d8 │ │ movw r7, #21050 @ 0x523a │ │ adds r6, r0, r1 │ │ movw r2, #48187 @ 0xbc3b │ │ movt r7, #2454 @ 0x996 │ │ ldr.w r5, [r6, #-8] │ │ subs.w r7, r7, fp │ │ movt r2, #44886 @ 0xaf56 │ │ @@ -62345,23 +62441,23 @@ │ │ mla r0, r0, r6, r7 │ │ mla r1, r1, r2, r0 │ │ eor.w r0, r1, r3 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r2, [r4, #8] │ │ cmp r2, r1 │ │ - bls.w 51e0a │ │ + bls.w 5201a │ │ ldr r2, [r4, #4] │ │ cmp r2, r1 │ │ - bcs.w 51dee │ │ - ldr r3, [pc, #624] @ (51f60 ) │ │ + bcs.w 51ffe │ │ + ldr r3, [pc, #624] @ (52170 ) │ │ add r3, pc │ │ mov r0, r1 │ │ mov r1, r2 │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ mov.w r1, #256 @ 0x100 │ │ movw r2, #23195 @ 0x5a9b │ │ movt r2, #34599 @ 0x8727 │ │ adds r2, r2, r6 │ │ movw r6, #44605 @ 0xae3d │ │ adc.w r0, r0, #0 │ │ movt r6, #49842 @ 0xc2b2 │ │ @@ -62386,119 +62482,119 @@ │ │ eor.w r0, r1, r3 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r7, r0 │ │ add r0, sp, #24 │ │ mov r2, r1 │ │ mov r1, r4 │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r0, [sp, #24] │ │ cmp r0, #1 │ │ - bne.n 51e18 │ │ + bne.n 52028 │ │ ldrd r0, r1, [sp, #28] │ │ ldr r2, [r4, #4] │ │ adds.w ip, r1, r0 │ │ - bcs.w 5251e │ │ + bcs.w 5272e │ │ cmp ip, r2 │ │ - bhi.w 5251e │ │ + bhi.w 5272e │ │ ldr r2, [r4, #0] │ │ add r0, r2 │ │ - b.n 51e1a │ │ + b.n 5202a │ │ mov sl, r6 │ │ mov r6, r0 │ │ add r0, sp, #24 │ │ mov r2, r1 │ │ mov r1, r4 │ │ - bl 4299c │ │ + bl 42ca4 │ │ ldr.w r9, [sp, #24] │ │ cmp.w r9, #2147483648 @ 0x80000000 │ │ - bne.n 51e2a │ │ + bne.n 5203a │ │ mov r1, r6 │ │ mov r0, sl │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r2, [r4, #8] │ │ cmp r2, r1 │ │ - bls.n 51e6e │ │ + bls.n 5207e │ │ ldr r2, [r4, #4] │ │ cmp r2, r1 │ │ - bcs.n 51dd2 │ │ - ldr r3, [pc, #424] @ (51f64 ) │ │ + bcs.n 51fe2 │ │ + ldr r3, [pc, #424] @ (52174 ) │ │ add r3, pc │ │ mov r0, r1 │ │ mov r1, r2 │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ ldr r2, [r4, #8] │ │ cmp r2, r1 │ │ - bls.n 51e74 │ │ + bls.n 52084 │ │ ldr r2, [r4, #4] │ │ cmp r2, r1 │ │ - bcc.w 5254a │ │ + bcc.w 5275a │ │ subs r2, r2, r1 │ │ cmp r2, #3 │ │ - bls.w 5253e │ │ + bls.w 5274e │ │ ldr r2, [r4, #0] │ │ ldr r1, [r2, r1] │ │ - b.n 51e7a │ │ + b.n 5208a │ │ ldr r2, [r4, #8] │ │ cmp r2, r1 │ │ - bls.n 51ed4 │ │ + bls.n 520e4 │ │ ldr r2, [r4, #4] │ │ cmp r2, r1 │ │ - bcc.w 52556 │ │ + bcc.w 52766 │ │ subs r2, r2, r1 │ │ cmp r2, #7 │ │ - bls.w 52532 │ │ + bls.w 52742 │ │ ldr r3, [r4, #0] │ │ ldr r2, [r3, r1] │ │ add r1, r3 │ │ ldr r1, [r1, #4] │ │ - b.n 51eda │ │ + b.n 520ea │ │ mov r1, r5 │ │ mov r0, r6 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r1, #0 │ │ movs r2, #0 │ │ movt r1, #32704 @ 0x7fc0 │ │ add.w r1, r1, #3670016 @ 0x380000 │ │ - b.n 51eda │ │ + b.n 520ea │ │ movs r0, #0 │ │ strd r6, r7, [sp, #72] @ 0x48 │ │ mov r2, r5 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w 4ee30 │ │ + b.w 4f040 │ │ ldrd r8, r0, [sp, #28] │ │ cmp r0, #0 │ │ - beq.w 523ba │ │ + beq.w 525ca │ │ add.w r7, r8, r0, lsl #3 │ │ mov r4, r8 │ │ mov r1, r6 │ │ mov r0, sl │ │ ldrd r2, r3, [r4], #8 │ │ strd r0, r1, [sp] │ │ mov r1, r3 │ │ mov r0, r2 │ │ mov r2, r5 │ │ - bl 4ee30 │ │ + bl 4f040 │ │ cmp r4, r7 │ │ - bne.n 51e3e │ │ + bne.n 5204e │ │ cmp.w r9, #0 │ │ - beq.n 51e68 │ │ + beq.n 52078 │ │ mov r4, r0 │ │ mov r0, r8 │ │ mov r5, r1 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ mov r1, r5 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ - b.n 51e7a │ │ + b.n 5208a │ │ movs r1, #0 │ │ movt r1, #32704 @ 0x7fc0 │ │ movw r3, #54690 @ 0xd5a2 │ │ rev r2, r6 │ │ movt r3, #50668 @ 0xc5ec │ │ eors r0, r2 │ │ movw r2, #45428 @ 0xb174 │ │ @@ -62522,15 +62618,15 @@ │ │ movw r4, #7269 @ 0x1c65 │ │ orr.w r5, r5, r0, lsr #15 │ │ movt r4, #40882 @ 0x9fb2 │ │ eors r1, r5 │ │ mla r2, r2, r4, r6 │ │ eors r0, r1 │ │ movs r1, #4 │ │ - b.n 51f32 │ │ + b.n 52142 │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ movs r2, #0 │ │ movw r7, #54690 @ 0xd5a2 │ │ rev r3, r6 │ │ movt r7, #50668 @ 0xc5ec │ │ eors r0, r3 │ │ movw r3, #45428 @ 0xb174 │ │ @@ -62567,34 +62663,34 @@ │ │ lsrs r0, r2, #28 │ │ orr.w r0, r0, r1, lsl #4 │ │ eor.w r1, r1, r1, lsr #28 │ │ eors r0, r2 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ nop │ │ - cmp sl, r6 │ │ - vpaddl.s , q15 │ │ + bics r2, r4 │ │ + vrev64. , q15 │ │ movs r0, r1 │ │ - str r2, [sp, #328] @ 0x148 │ │ + str r0, [sp, #328] @ 0x148 │ │ movs r0, r1 │ │ cmp r1, #129 @ 0x81 │ │ - bcs.w 52452 │ │ + bcs.w 52662 │ │ movw r2, #51847 @ 0xca87 │ │ movw r7, #31153 @ 0x79b1 │ │ movt r2, #34283 @ 0x85eb │ │ movt r7, #40503 @ 0x9e37 │ │ umull r3, r2, r1, r2 │ │ cmp r1, #33 @ 0x21 │ │ mla r2, r1, r7, r2 │ │ strd r2, r3, [sp, #16] │ │ - bcc.w 522a6 │ │ + bcc.w 524b6 │ │ cmp r1, #64 @ 0x40 │ │ - bls.w 521a0 │ │ + bls.w 523b0 │ │ cmp r1, #96 @ 0x60 │ │ - bls.w 5209e │ │ + bls.w 522ae │ │ adds r7, r0, r1 │ │ movw r3, #40904 @ 0x9fc8 │ │ movw r2, #30937 @ 0x78d9 │ │ movt r3, #51582 @ 0xc97e │ │ movt r2, #25715 @ 0x6473 │ │ subs.w r3, r3, fp │ │ ldr.w r5, [r7, #-56] │ │ @@ -62895,18 +62991,18 @@ │ │ mla r1, r0, r2, r1 │ │ eor.w r0, r1, r3 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r1, r6 │ │ mov r0, sl │ │ cmp.w r9, #0 │ │ - bne.w 51e5a │ │ - b.n 51e68 │ │ + bne.w 5206a │ │ + b.n 52078 │ │ cmp r1, #3 │ │ - bls.n 5246a │ │ + bls.n 5267a │ │ ldr r6, [r0, #0] │ │ add r0, r1 │ │ movw r2, #45428 @ 0xb174 │ │ movw r7, #54690 @ 0xd5a2 │ │ rev.w r5, fp │ │ movt r7, #50668 @ 0xc5ec │ │ eor.w r5, r5, ip │ │ @@ -62939,34 +63035,34 @@ │ │ eor.w r1, r1, r6 │ │ mov.w r6, #0 │ │ umull r2, r3, r1, r7 │ │ mla r1, r1, ip, r3 │ │ adc.w r3, r6, #0 │ │ eors r0, r3 │ │ mla r1, r0, r7, r1 │ │ - b.n 51f48 │ │ + b.n 52158 │ │ cmp r1, #241 @ 0xf1 │ │ - bcs.n 524d8 │ │ - ldr r2, [pc, #308] @ (5258c ) │ │ + bcs.n 526e8 │ │ + ldr r2, [pc, #308] @ (5279c ) │ │ mov r3, r5 │ │ add r2, pc │ │ str r2, [sp, #0] │ │ mov r2, r6 │ │ - bl 996ec │ │ + bl 996f8 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movw lr, #26545 @ 0x67b1 │ │ movw r2, #31225 @ 0x79f9 │ │ movw r5, #44605 @ 0xae3d │ │ movw r6, #60239 @ 0xeb4f │ │ movt lr, #5718 @ 0x1656 │ │ movt r2, #40503 @ 0x9e37 │ │ movt r5, #49842 @ 0xc2b2 │ │ movt r6, #10196 @ 0x27d4 │ │ - cbz r1, 524e6 │ │ + cbz r1, 526f6 │ │ lsrs r4, r1, #1 │ │ ldrb r7, [r0, #0] │ │ ldrb r4, [r0, r4] │ │ add r0, r1 │ │ ldrb.w r0, [r0, #-1] │ │ lsls r4, r4, #24 │ │ orr.w r4, r4, r7, lsl #16 │ │ @@ -62982,18 +63078,18 @@ │ │ mla r0, r0, r5, r7 │ │ mla r0, r3, r6, r0 │ │ lsrs r3, r1, #29 │ │ orr.w r3, r3, r0, lsl #3 │ │ eors r1, r3 │ │ umull r3, r7, r1, r2 │ │ mla r1, r1, lr, r7 │ │ - b.n 51d4c │ │ + b.n 51f5c │ │ mov r2, r6 │ │ mov r3, r5 │ │ - bl 99110 │ │ + bl 9911c │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movw r0, #63760 @ 0xf910 │ │ movw r3, #7644 @ 0x1ddc │ │ movt r0, #34598 @ 0x8726 │ │ movt r3, #24002 @ 0x5dc2 │ │ eor.w r0, r0, ip │ │ @@ -63003,137 +63099,137 @@ │ │ mla r1, r1, r5, r4 │ │ mla r0, r0, r6, r1 │ │ lsrs r1, r3, #29 │ │ orr.w r1, r1, r0, lsl #3 │ │ eors r1, r3 │ │ umull r3, r6, r1, r2 │ │ mla r1, r1, lr, r6 │ │ - b.n 51d4c │ │ - ldr r3, [pc, #100] @ (52584 ) │ │ + b.n 51f5c │ │ + ldr r3, [pc, #100] @ (52794 ) │ │ mov r1, ip │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #100] @ (52590 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #100] @ (527a0 ) │ │ mov r1, r7 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #76] @ (52580 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #76] @ (52790 ) │ │ movs r0, #0 │ │ movs r1, #8 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #60] @ (5257c ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #60] @ (5278c ) │ │ movs r0, #0 │ │ movs r1, #4 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #44] @ (52578 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #44] @ (52788 ) │ │ add r3, pc │ │ mov r0, r1 │ │ mov r1, r2 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #60] @ (52594 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #60] @ (527a4 ) │ │ add r3, pc │ │ mov r0, r1 │ │ mov r1, r2 │ │ - bl 3f9a8 │ │ - ldr r2, [pc, #36] @ (52588 ) │ │ + bl 3fcb0 │ │ + ldr r2, [pc, #36] @ (52798 ) │ │ mov r0, r1 │ │ mov r1, r3 │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r0, [pc, #40] @ (52598 ) │ │ + bl 3fd7c │ │ + ldr r0, [pc, #40] @ (527a8 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ nop │ │ - ldrh r0, [r0, #16] │ │ + ldrh r0, [r0, #0] │ │ movs r0, r1 │ │ - strh r0, [r7, #38] @ 0x26 │ │ + strh r0, [r7, #22] │ │ movs r0, r1 │ │ - strh r4, [r2, #40] @ 0x28 │ │ + strh r4, [r2, #24] │ │ movs r0, r1 │ │ - ldrh r2, [r1, #20] │ │ + ldrh r2, [r1, #4] │ │ movs r0, r1 │ │ - strh r4, [r0, #48] @ 0x30 │ │ + strh r4, [r0, #32] │ │ movs r0, r1 │ │ - cbz r2, 525d8 │ │ - vtbx.8 d24, {d12-d14}, d0 │ │ + cbz r2, 527a4 │ │ + vtbx.8 d24, {d12}, d0 │ │ movs r0, r1 │ │ - ldrh r4, [r2, #22] │ │ + ldrh r4, [r2, #6] │ │ movs r0, r1 │ │ - ldrh r4, [r1, #16] │ │ + ldrh r4, [r1, #0] │ │ movs r0, r1 │ │ push {r4, r5, r6, lr} │ │ sub sp, #40 @ 0x28 │ │ mov r4, r0 │ │ ldr r0, [r1, #0] │ │ mov ip, r2 │ │ ldrb.w r0, [r0, #40] @ 0x28 │ │ - cbz r0, 525c0 │ │ + cbz r0, 527d0 │ │ ldr r5, [r1, #4] │ │ ldr r0, [r5, #0] │ │ - cbz r0, 5262a │ │ + cbz r0, 5283a │ │ movs r0, #0 │ │ ldr r1, [r5, #4] │ │ strd r3, r0, [sp] │ │ add r0, sp, #8 │ │ movs r2, #16 │ │ - b.n 525e0 │ │ + b.n 527f0 │ │ ldr r5, [r1, #4] │ │ ldr r0, [r5, #0] │ │ - cbz r0, 5262a │ │ + cbz r0, 5283a │ │ ldr r0, [r1, #8] │ │ movs r2, #2 │ │ ldrd r0, r1, [r0] │ │ eor.w r1, r1, #2147483648 @ 0x80000000 │ │ str r1, [sp, #36] @ 0x24 │ │ str r0, [sp, #32] │ │ add r0, sp, #32 │ │ ldr r1, [r5, #4] │ │ strd r3, r0, [sp] │ │ add r0, sp, #8 │ │ mov r3, ip │ │ - bl 49e28 │ │ + bl 4a130 │ │ ldr r1, [sp, #8] │ │ ldr r0, [sp, #12] │ │ lsls r1, r1, #31 │ │ - beq.n 525f6 │ │ + beq.n 52806 │ │ ldr r1, [sp, #16] │ │ ldr r2, [sp, #20] │ │ ldr r3, [sp, #24] │ │ - b.n 5261e │ │ + b.n 5282e │ │ movs r6, #17 │ │ movt r6, #32768 @ 0x8000 │ │ - cbz r0, 52610 │ │ + cbz r0, 52820 │ │ ldr r0, [r5, #0] │ │ - cbz r0, 5262a │ │ + cbz r0, 5283a │ │ ldr r1, [r5, #4] │ │ add r0, sp, #8 │ │ - bl 4ba20 │ │ + bl 4bd28 │ │ ldr r0, [sp, #8] │ │ cmp r0, r6 │ │ - bne.n 5261a │ │ + bne.n 5282a │ │ movs r0, #1 │ │ str r6, [r4, #0] │ │ strb r0, [r4, #4] │ │ add sp, #40 @ 0x28 │ │ pop {r4, r5, r6, pc} │ │ add r3, sp, #8 │ │ ldmia r3, {r0, r1, r2, r3} │ │ str r1, [r4, #4] │ │ str r2, [r4, #8] │ │ str r0, [r4, #0] │ │ str r3, [r4, #12] │ │ add sp, #40 @ 0x28 │ │ pop {r4, r5, r6, pc} │ │ - ldr r0, [pc, #8] @ (52634 ) │ │ + ldr r0, [pc, #8] @ (52844 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ nop │ │ - strh r0, [r4, #40] @ 0x28 │ │ + strh r0, [r4, #24] │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ sub sp, #4 │ │ uxtb r2, r2 │ │ tbh [pc, r2, lsl #1] │ │ lsls r4, r0, #1 │ │ lsls r4, r0, #1 │ │ @@ -63150,76 +63246,76 @@ │ │ movs r0, r2 │ │ movs r0, r2 │ │ movs r0, r2 │ │ movs r0, r2 │ │ ldr r4, [r0, #8] │ │ adds r2, r1, #3 │ │ cmp r2, r4 │ │ - bls.n 526a0 │ │ + bls.n 528b0 │ │ ldr r3, [r0, #0] │ │ subs r5, r2, r4 │ │ subs r2, r3, r4 │ │ cmp r5, r2 │ │ - bhi.w 5289e │ │ + bhi.w 52aae │ │ ldr r6, [r0, #4] │ │ cmp r5, #2 │ │ add.w r2, r6, r4 │ │ - bcc.n 52698 │ │ + bcc.n 528a8 │ │ subs r5, #1 │ │ mov r8, r0 │ │ mov r7, r1 │ │ mov r0, r2 │ │ mov r1, r5 │ │ - bl d5370 │ │ + bl d5242 │ │ add r4, r5 │ │ mov r0, r8 │ │ adds r2, r6, r4 │ │ mov r1, r7 │ │ adds r4, #1 │ │ movs r3, #0 │ │ str r4, [r0, #8] │ │ strb r3, [r2, #0] │ │ cmp r4, r1 │ │ - bcc.w 52890 │ │ + bcc.w 52aa0 │ │ subs r2, r4, r1 │ │ cmp r2, #2 │ │ itttt hi │ │ ldrhi r0, [r0, #4] │ │ movhi r2, #0 │ │ strhhi r2, [r0, r1] │ │ addhi r0, r1 │ │ ittt hi │ │ strbhi r2, [r0, #2] │ │ addhi sp, #4 │ │ ldmiahi.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ - ldr r0, [pc, #712] @ (52988 ) │ │ + ldr r0, [pc, #712] @ (52b98 ) │ │ movs r1, #37 @ 0x25 │ │ - ldr r2, [pc, #712] @ (5298c ) │ │ + ldr r2, [pc, #712] @ (52b9c ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ + bl 3fd54 │ │ ldr r5, [r0, #8] │ │ adds r4, r1, #1 │ │ cmp r4, r5 │ │ - bls.n 52708 │ │ + bls.n 52918 │ │ ldr r2, [r0, #0] │ │ subs r6, r4, r5 │ │ subs r2, r2, r5 │ │ cmp r6, r2 │ │ - bhi.w 528c4 │ │ + bhi.w 52ad4 │ │ ldr r7, [r0, #4] │ │ cmp r6, #2 │ │ add.w r2, r7, r5 │ │ - bcc.n 52700 │ │ + bcc.n 52910 │ │ subs r6, #1 │ │ mov r8, r0 │ │ mov r9, r1 │ │ mov r0, r2 │ │ mov r1, r6 │ │ - bl d5370 │ │ + bl d5242 │ │ add r5, r6 │ │ mov r0, r8 │ │ adds r2, r7, r5 │ │ mov r1, r9 │ │ adds r5, #1 │ │ movs r3, #0 │ │ str r5, [r0, #8] │ │ @@ -63228,1226 +63324,1226 @@ │ │ itttt cc │ │ ldrcc r0, [r0, #4] │ │ movcc r2, #0 │ │ strbcc r2, [r0, r1] │ │ addcc sp, #4 │ │ it cc │ │ ldmiacc.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ - ldr r3, [pc, #616] @ (52984 ) │ │ + ldr r3, [pc, #616] @ (52b94 ) │ │ mov r0, r1 │ │ mov r1, r4 │ │ mov r2, r5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ ldr r5, [r0, #8] │ │ add.w r4, r1, #8 │ │ cmp r4, r5 │ │ - bls.n 52766 │ │ + bls.n 52976 │ │ ldr r2, [r0, #0] │ │ subs r6, r4, r5 │ │ subs r2, r2, r5 │ │ cmp r6, r2 │ │ - bhi.w 528ea │ │ + bhi.w 52afa │ │ ldr r7, [r0, #4] │ │ cmp r6, #2 │ │ add.w r2, r7, r5 │ │ - bcc.n 5275e │ │ + bcc.n 5296e │ │ subs r6, #1 │ │ mov r8, r0 │ │ mov r9, r1 │ │ mov r0, r2 │ │ mov r1, r6 │ │ - bl d5370 │ │ + bl d5242 │ │ add r5, r6 │ │ mov r0, r8 │ │ adds r2, r7, r5 │ │ mov r1, r9 │ │ adds r5, #1 │ │ movs r3, #0 │ │ str r5, [r0, #8] │ │ strb r3, [r2, #0] │ │ cmn.w r1, #9 │ │ it ls │ │ cmpls r4, r5 │ │ - bhi.n 5271a │ │ + bhi.n 5292a │ │ ldr r0, [r0, #4] │ │ movs r2, #0 │ │ str r2, [r0, r1] │ │ add r0, r1 │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ str r1, [r0, #4] │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ ldr r5, [r0, #8] │ │ adds r4, r1, #4 │ │ cmp r4, r5 │ │ - bls.n 527c0 │ │ + bls.n 529d0 │ │ ldr r2, [r0, #0] │ │ subs r6, r4, r5 │ │ subs r2, r2, r5 │ │ cmp r6, r2 │ │ - bhi.w 52910 │ │ + bhi.w 52b20 │ │ ldr r7, [r0, #4] │ │ cmp r6, #2 │ │ add.w r2, r7, r5 │ │ - bcc.n 527b8 │ │ + bcc.n 529c8 │ │ subs r6, #1 │ │ mov r8, r0 │ │ mov r9, r1 │ │ mov r0, r2 │ │ mov r1, r6 │ │ - bl d5370 │ │ + bl d5242 │ │ add r5, r6 │ │ mov r0, r8 │ │ adds r2, r7, r5 │ │ mov r1, r9 │ │ adds r5, #1 │ │ movs r3, #0 │ │ str r5, [r0, #8] │ │ strb r3, [r2, #0] │ │ cmn.w r1, #5 │ │ it ls │ │ cmpls r4, r5 │ │ - bhi.n 5271a │ │ + bhi.n 5292a │ │ ldr r0, [r0, #4] │ │ mov.w r2, #2147483648 @ 0x80000000 │ │ str r2, [r0, r1] │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ ldr r5, [r0, #8] │ │ adds r4, r1, #4 │ │ cmp r4, r5 │ │ - bls.n 52814 │ │ + bls.n 52a24 │ │ ldr r2, [r0, #0] │ │ subs r6, r4, r5 │ │ subs r2, r2, r5 │ │ cmp r6, r2 │ │ - bhi.w 52936 │ │ + bhi.w 52b46 │ │ ldr r7, [r0, #4] │ │ cmp r6, #2 │ │ add.w r2, r7, r5 │ │ - bcc.n 5280c │ │ + bcc.n 52a1c │ │ subs r6, #1 │ │ mov r8, r0 │ │ mov r9, r1 │ │ mov r0, r2 │ │ mov r1, r6 │ │ - bl d5370 │ │ + bl d5242 │ │ add r5, r6 │ │ mov r0, r8 │ │ adds r2, r7, r5 │ │ mov r1, r9 │ │ adds r5, #1 │ │ movs r3, #0 │ │ str r5, [r0, #8] │ │ strb r3, [r2, #0] │ │ cmn.w r1, #5 │ │ it ls │ │ cmpls r4, r5 │ │ - bhi.w 5271a │ │ + bhi.w 5292a │ │ movs r2, #0 │ │ ldr r0, [r0, #4] │ │ movt r2, #32704 @ 0x7fc0 │ │ str r2, [r0, r1] │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ ldr r5, [r0, #8] │ │ add.w r4, r1, #8 │ │ cmp r4, r5 │ │ - bls.n 5286e │ │ + bls.n 52a7e │ │ ldr r2, [r0, #0] │ │ subs r6, r4, r5 │ │ subs r2, r2, r5 │ │ cmp r6, r2 │ │ - bhi.w 5295c │ │ + bhi.w 52b6c │ │ ldr r7, [r0, #4] │ │ cmp r6, #2 │ │ add.w r2, r7, r5 │ │ - bcc.n 52866 │ │ + bcc.n 52a76 │ │ subs r6, #1 │ │ mov r8, r0 │ │ mov r9, r1 │ │ mov r0, r2 │ │ mov r1, r6 │ │ - bl d5370 │ │ + bl d5242 │ │ add r5, r6 │ │ mov r0, r8 │ │ adds r2, r7, r5 │ │ mov r1, r9 │ │ adds r5, #1 │ │ movs r3, #0 │ │ str r5, [r0, #8] │ │ strb r3, [r2, #0] │ │ cmn.w r1, #9 │ │ it ls │ │ cmpls r4, r5 │ │ - bhi.w 5271a │ │ + bhi.w 5292a │ │ ldr r0, [r0, #4] │ │ movs r2, #0 │ │ str r2, [r0, r1] │ │ add r0, r1 │ │ movs r1, #0 │ │ movt r1, #32760 @ 0x7ff8 │ │ str r1, [r0, #4] │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ - ldr r3, [pc, #252] @ (52990 ) │ │ + ldr r3, [pc, #252] @ (52ba0 ) │ │ mov r0, r1 │ │ mov r1, r4 │ │ mov r2, r4 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ movs r2, #1 │ │ mov r7, r1 │ │ str r2, [sp, #0] │ │ mov r1, r4 │ │ mov r2, r5 │ │ movs r3, #1 │ │ mov r6, r0 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r4, [r6, #8] │ │ mov r0, r6 │ │ mov r1, r7 │ │ ldr r6, [r0, #4] │ │ cmp r5, #2 │ │ add.w r2, r6, r4 │ │ - bcs.w 52682 │ │ - b.n 52698 │ │ + bcs.w 52892 │ │ + b.n 528a8 │ │ movs r2, #1 │ │ mov r8, r1 │ │ str r2, [sp, #0] │ │ mov r1, r5 │ │ mov r2, r6 │ │ movs r3, #1 │ │ mov r7, r0 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r5, [r7, #8] │ │ mov r0, r7 │ │ mov r1, r8 │ │ ldr r7, [r0, #4] │ │ cmp r6, #2 │ │ add.w r2, r7, r5 │ │ - bcs.w 526ea │ │ - b.n 52700 │ │ + bcs.w 528fa │ │ + b.n 52910 │ │ movs r2, #1 │ │ mov r8, r1 │ │ str r2, [sp, #0] │ │ mov r1, r5 │ │ mov r2, r6 │ │ movs r3, #1 │ │ mov r7, r0 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r5, [r7, #8] │ │ mov r0, r7 │ │ mov r1, r8 │ │ ldr r7, [r0, #4] │ │ cmp r6, #2 │ │ add.w r2, r7, r5 │ │ - bcs.w 52748 │ │ - b.n 5275e │ │ + bcs.w 52958 │ │ + b.n 5296e │ │ movs r2, #1 │ │ mov r8, r1 │ │ str r2, [sp, #0] │ │ mov r1, r5 │ │ mov r2, r6 │ │ movs r3, #1 │ │ mov r7, r0 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r5, [r7, #8] │ │ mov r0, r7 │ │ mov r1, r8 │ │ ldr r7, [r0, #4] │ │ cmp r6, #2 │ │ add.w r2, r7, r5 │ │ - bcs.w 527a2 │ │ - b.n 527b8 │ │ + bcs.w 529b2 │ │ + b.n 529c8 │ │ movs r2, #1 │ │ mov r8, r1 │ │ str r2, [sp, #0] │ │ mov r1, r5 │ │ mov r2, r6 │ │ movs r3, #1 │ │ mov r7, r0 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r5, [r7, #8] │ │ mov r0, r7 │ │ mov r1, r8 │ │ ldr r7, [r0, #4] │ │ cmp r6, #2 │ │ add.w r2, r7, r5 │ │ - bcs.w 527f6 │ │ - b.n 5280c │ │ + bcs.w 52a06 │ │ + b.n 52a1c │ │ movs r2, #1 │ │ mov r8, r1 │ │ str r2, [sp, #0] │ │ mov r1, r5 │ │ mov r2, r6 │ │ movs r3, #1 │ │ mov r7, r0 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r5, [r7, #8] │ │ mov r0, r7 │ │ mov r1, r8 │ │ ldr r7, [r0, #4] │ │ cmp r6, #2 │ │ add.w r2, r7, r5 │ │ - bcs.w 52850 │ │ - b.n 52866 │ │ + bcs.w 52a60 │ │ + b.n 52a76 │ │ nop │ │ - ldrh r2, [r3, #8] │ │ + strh r2, [r3, #56] @ 0x38 │ │ movs r0, r1 │ │ - subs r7, #38 @ 0x26 │ │ - vrsra.u32 q12, q3, #4 │ │ + subs r5, #22 │ │ + vsra.u32 q12, q3, #4 │ │ movs r0, r1 │ │ - strh r4, [r6, #60] @ 0x3c │ │ + strh r4, [r6, #44] @ 0x2c │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #8 │ │ - cbz r2, 529a6 │ │ + cbz r2, 52bb6 │ │ cmp.w r3, #4294967295 @ 0xffffffff │ │ - bgt.n 52a0a │ │ - bl 3e03c │ │ + bgt.n 52c1a │ │ + bl 3e344 │ │ ldr r4, [r0, #8] │ │ adds r2, r1, #3 │ │ cmp r2, r4 │ │ - bls.n 529e0 │ │ + bls.n 52bf0 │ │ ldr r3, [r0, #0] │ │ subs r5, r2, r4 │ │ subs r2, r3, r4 │ │ cmp r5, r2 │ │ - bhi.n 52a64 │ │ + bhi.n 52c74 │ │ ldr r6, [r0, #4] │ │ cmp r5, #2 │ │ add.w r2, r6, r4 │ │ - bcc.n 529d8 │ │ + bcc.n 52be8 │ │ subs r5, #1 │ │ mov r8, r0 │ │ mov r7, r1 │ │ mov r0, r2 │ │ mov r1, r5 │ │ - bl d5370 │ │ + bl d5242 │ │ add r4, r5 │ │ mov r0, r8 │ │ adds r2, r6, r4 │ │ mov r1, r7 │ │ adds r4, #1 │ │ movs r3, #0 │ │ str r4, [r0, #8] │ │ strb r3, [r2, #0] │ │ cmp r4, r1 │ │ - bcc.n 52a56 │ │ + bcc.n 52c66 │ │ subs r2, r4, r1 │ │ cmp r2, #2 │ │ itttt hi │ │ ldrhi r0, [r0, #4] │ │ movhi r2, #0 │ │ strhhi r2, [r0, r1] │ │ addhi r0, r1 │ │ ittt hi │ │ strbhi r2, [r0, #2] │ │ addhi sp, #8 │ │ ldmiahi.w sp!, {r4, r5, r6, r7, r8, pc} │ │ - ldr r0, [pc, #144] @ (52a90 ) │ │ + ldr r0, [pc, #144] @ (52ca0 ) │ │ movs r1, #37 @ 0x25 │ │ - ldr r2, [pc, #144] @ (52a94 ) │ │ + ldr r2, [pc, #144] @ (52ca4 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - cbz r3, 52a48 │ │ + bl 3fd54 │ │ + cbz r3, 52c58 │ │ mov r7, r0 │ │ mov r0, r3 │ │ mov r6, r2 │ │ mov r5, r1 │ │ mov r8, r3 │ │ - blx d87f0 │ │ - cbz r0, 52a88 │ │ + blx d8810 │ │ + cbz r0, 52c98 │ │ mov r4, r0 │ │ movs r2, #0 │ │ mov r1, r5 │ │ mov r0, r7 │ │ ldrb r7, [r6, r2] │ │ subs r5, r7, #2 │ │ it ne │ │ addne r5, r7, #1 │ │ strb r5, [r4, r2] │ │ adds r2, #1 │ │ cmp r8, r2 │ │ - bne.n 52a24 │ │ + bne.n 52c34 │ │ mov r2, r4 │ │ mov r3, r8 │ │ - bl 52a9c │ │ + bl 52cac │ │ mov r0, r4 │ │ add sp, #8 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ movs r2, #1 │ │ movs r3, #0 │ │ add sp, #8 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, lr} │ │ - b.w 52a9c │ │ - ldr r3, [pc, #64] @ (52a98 ) │ │ + b.w 52cac │ │ + ldr r3, [pc, #64] @ (52ca8 ) │ │ mov r0, r1 │ │ mov r1, r4 │ │ mov r2, r4 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ movs r2, #1 │ │ mov r7, r1 │ │ str r2, [sp, #0] │ │ mov r1, r4 │ │ mov r2, r5 │ │ movs r3, #1 │ │ mov r6, r0 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r4, [r6, #8] │ │ mov r0, r6 │ │ mov r1, r7 │ │ ldr r6, [r0, #4] │ │ cmp r5, #2 │ │ add.w r2, r6, r4 │ │ - bcs.n 529c2 │ │ - b.n 529d8 │ │ + bcs.n 52bd2 │ │ + b.n 52be8 │ │ movs r0, #1 │ │ mov r1, r8 │ │ - bl 3dfa4 │ │ - subs r3, #232 @ 0xe8 │ │ - vshr.u32 d24, d8, #4 │ │ + bl 3e2ac │ │ + subs r1, #216 @ 0xd8 │ │ + vcvt.f32.u32 d23, d8, #4 │ │ movs r0, r1 │ │ - strh r6, [r5, #46] @ 0x2e │ │ + strh r6, [r5, #30] │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #4 │ │ mov r4, r0 │ │ adds r0, r1, #3 │ │ cmp r2, #0 │ │ - beq.w 52bc0 │ │ + beq.w 52dd0 │ │ ldrd r7, sl, [r4, #8] │ │ mov r9, r3 │ │ mov r8, r2 │ │ cmp r0, r7 │ │ - bls.n 52ae6 │ │ + bls.n 52cf6 │ │ ldr r2, [r4, #0] │ │ subs r6, r0, r7 │ │ subs r0, r2, r7 │ │ cmp r6, r0 │ │ - bhi.w 52c54 │ │ + bhi.w 52e64 │ │ ldr r5, [r4, #4] │ │ cmp r6, #2 │ │ add.w r0, r5, r7 │ │ - bcc.n 52ade │ │ + bcc.n 52cee │ │ subs r6, #1 │ │ mov fp, r1 │ │ mov r1, r6 │ │ - bl d5370 │ │ + bl d5242 │ │ add r7, r6 │ │ mov r1, fp │ │ adds r0, r5, r7 │ │ adds r7, #1 │ │ movs r2, #0 │ │ str r7, [r4, #8] │ │ strb r2, [r0, #0] │ │ cmp r7, r1 │ │ - bcc.w 52c2a │ │ + bcc.w 52e3a │ │ cmp.w sl, #16777216 @ 0x1000000 │ │ - bcs.w 52ce0 │ │ + bcs.w 52ef0 │ │ subs r0, r7, r1 │ │ cmp r0, #2 │ │ - bls.w 52c0e │ │ + bls.w 52e1e │ │ ldr r5, [r4, #4] │ │ ldr r6, [r4, #12] │ │ adds r0, r5, r1 │ │ strh.w sl, [r5, r1] │ │ mov.w r1, sl, lsr #16 │ │ strb r1, [r0, #2] │ │ adds r0, r6, #3 │ │ cmp r0, r7 │ │ - bls.n 52b3e │ │ + bls.n 52d4e │ │ ldr r1, [r4, #0] │ │ sub.w sl, r0, r7 │ │ subs r0, r1, r7 │ │ cmp sl, r0 │ │ - bhi.w 52c78 │ │ + bhi.w 52e88 │ │ adds r0, r5, r7 │ │ cmp.w sl, #2 │ │ - bcc.n 52b36 │ │ + bcc.n 52d46 │ │ sub.w sl, sl, #1 │ │ mov r1, sl │ │ - bl d5370 │ │ + bl d5242 │ │ add r7, sl │ │ adds r0, r5, r7 │ │ adds r7, #1 │ │ movs r1, #0 │ │ str r7, [r4, #8] │ │ strb r1, [r0, #0] │ │ cmp r7, r6 │ │ - bcc.n 52c38 │ │ + bcc.n 52e48 │ │ cmp.w r9, #16777216 @ 0x1000000 │ │ - bcs.w 52ce0 │ │ + bcs.w 52ef0 │ │ subs r0, r7, r6 │ │ cmp r0, #2 │ │ - bls.n 52c0e │ │ + bls.n 52e1e │ │ adds r0, r5, r6 │ │ mov.w r1, r9, lsr #16 │ │ strh.w r9, [r5, r6] │ │ strb r1, [r0, #2] │ │ ldrd r5, r0, [r4, #8] │ │ adds r6, r0, #3 │ │ add.w r7, r6, r9 │ │ cmp r7, r5 │ │ - bls.n 52b9e │ │ + bls.n 52dae │ │ ldr r0, [r4, #0] │ │ sub.w sl, r7, r5 │ │ subs r0, r0, r5 │ │ cmp sl, r0 │ │ - bhi.w 52c98 │ │ + bhi.w 52ea8 │ │ ldr.w fp, [r4, #4] │ │ cmp.w sl, #2 │ │ add.w r0, fp, r5 │ │ - bcc.n 52b96 │ │ + bcc.n 52da6 │ │ sub.w sl, sl, #1 │ │ mov r1, sl │ │ - bl d5370 │ │ + bl d5242 │ │ add r5, sl │ │ add.w r0, fp, r5 │ │ adds r5, #1 │ │ movs r1, #0 │ │ str r5, [r4, #8] │ │ strb r1, [r0, #0] │ │ cmp r7, r6 │ │ - bcc.n 52c1c │ │ + bcc.n 52e2c │ │ cmp r7, r5 │ │ - bhi.n 52c1c │ │ + bhi.n 52e2c │ │ ldr r0, [r4, #4] │ │ mov r1, r8 │ │ mov r2, r9 │ │ add r0, r6 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r0, [r4, #12] │ │ add r0, r9 │ │ adds r0, #3 │ │ str r0, [r4, #12] │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r5, [r4, #8] │ │ cmp r0, r5 │ │ - bls.n 52bf2 │ │ + bls.n 52e02 │ │ ldr r2, [r4, #0] │ │ subs r6, r0, r5 │ │ subs r0, r2, r5 │ │ cmp r6, r0 │ │ - bhi.n 52cbc │ │ + bhi.n 52ecc │ │ ldr r7, [r4, #4] │ │ cmp r6, #2 │ │ add.w r0, r7, r5 │ │ - bcc.n 52bea │ │ + bcc.n 52dfa │ │ subs r6, #1 │ │ mov r8, r1 │ │ mov r1, r6 │ │ - bl d5370 │ │ + bl d5242 │ │ add r5, r6 │ │ mov r1, r8 │ │ adds r0, r7, r5 │ │ adds r5, #1 │ │ movs r2, #0 │ │ str r5, [r4, #8] │ │ strb r2, [r0, #0] │ │ cmp r5, r1 │ │ - bcc.n 52c46 │ │ + bcc.n 52e56 │ │ subs r0, r5, r1 │ │ cmp r0, #2 │ │ itttt hi │ │ ldrhi r0, [r4, #4] │ │ movhi r2, #0 │ │ strhhi r2, [r0, r1] │ │ addhi r0, r1 │ │ ittt hi │ │ strbhi r2, [r0, #2] │ │ addhi sp, #4 │ │ ldmiahi.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #224] @ (52cf0 ) │ │ + ldr r0, [pc, #224] @ (52f00 ) │ │ movs r1, #37 @ 0x25 │ │ - ldr r2, [pc, #224] @ (52cf4 ) │ │ + ldr r2, [pc, #224] @ (52f04 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r3, [pc, #232] @ (52d08 ) │ │ + bl 3fd54 │ │ + ldr r3, [pc, #232] @ (52f18 ) │ │ mov r0, r6 │ │ mov r1, r7 │ │ mov r2, r5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #204] @ (52cf8 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #204] @ (52f08 ) │ │ mov r0, r1 │ │ add r3, pc │ │ mov r1, r7 │ │ mov r2, r7 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #200] @ (52d04 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #200] @ (52f14 ) │ │ mov r0, r6 │ │ add r3, pc │ │ mov r1, r7 │ │ mov r2, r7 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #196] @ (52d0c ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #196] @ (52f1c ) │ │ mov r0, r1 │ │ mov r1, r5 │ │ mov r2, r5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ movs r0, #1 │ │ mov r5, r1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ mov r1, r7 │ │ mov r2, r6 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r7, [r4, #8] │ │ mov r1, r5 │ │ ldr r5, [r4, #4] │ │ cmp r6, #2 │ │ add.w r0, r5, r7 │ │ - bcs.w 52ace │ │ - b.n 52ade │ │ + bcs.w 52cde │ │ + b.n 52cee │ │ movs r0, #1 │ │ mov r1, r7 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ mov r2, sl │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd r5, r7, [r4, #4] │ │ adds r0, r5, r7 │ │ cmp.w sl, #2 │ │ - bcs.w 52b28 │ │ - b.n 52b36 │ │ + bcs.w 52d38 │ │ + b.n 52d46 │ │ movs r0, #1 │ │ mov r1, r5 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ mov r2, sl │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r5, [r4, #8] │ │ ldr.w fp, [r4, #4] │ │ cmp.w sl, #2 │ │ add.w r0, fp, r5 │ │ - bcs.w 52b86 │ │ - b.n 52b96 │ │ + bcs.w 52d96 │ │ + b.n 52da6 │ │ movs r0, #1 │ │ mov r7, r1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ mov r1, r5 │ │ mov r2, r6 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r5, [r4, #8] │ │ mov r1, r7 │ │ ldr r7, [r4, #4] │ │ cmp r6, #2 │ │ add.w r0, r7, r5 │ │ - bcs.w 52bda │ │ - b.n 52bea │ │ - ldr r0, [pc, #24] @ (52cfc ) │ │ + bcs.w 52dea │ │ + b.n 52dfa │ │ + ldr r0, [pc, #24] @ (52f0c ) │ │ movs r1, #62 @ 0x3e │ │ - ldr r2, [pc, #24] @ (52d00 ) │ │ + ldr r2, [pc, #24] @ (52f10 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ + bl 3fd54 │ │ nop │ │ - subs r1, #214 @ 0xd6 │ │ - @ instruction: 0xfffc7e06 │ │ + adds r7, #198 @ 0xc6 │ │ + vdup.32 d23, d6[1] │ │ movs r0, r1 │ │ - strh r6, [r3, #32] │ │ + strh r6, [r3, #16] │ │ movs r0, r1 │ │ - subs r0, #198 @ 0xc6 │ │ - @ instruction: 0xfffc7d24 │ │ + adds r6, #182 @ 0xb6 │ │ + vtbl.8 d23, {d12-d15}, d20 │ │ movs r0, r1 │ │ - strh r0, [r2, #32] │ │ + strh r0, [r2, #16] │ │ movs r0, r1 │ │ - strh r0, [r3, #32] │ │ + strh r0, [r3, #16] │ │ movs r0, r1 │ │ - strh r6, [r7, #30] │ │ + strh r6, [r7, #14] │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #4 │ │ mov r4, r0 │ │ adds r0, r1, #3 │ │ cmp r2, #0 │ │ - beq.w 52e38 │ │ + beq.w 53048 │ │ ldrd r6, r9, [r4, #8] │ │ mov r8, r2 │ │ cmp r0, r6 │ │ - bls.n 52d5c │ │ + bls.n 52f6c │ │ ldr r2, [r4, #0] │ │ subs r7, r0, r6 │ │ subs r0, r2, r6 │ │ cmp r7, r0 │ │ - bhi.w 52ecc │ │ + bhi.w 530dc │ │ ldr r5, [r4, #4] │ │ cmp r7, #2 │ │ add.w r0, r5, r6 │ │ - bcc.n 52d54 │ │ + bcc.n 52f64 │ │ subs r7, #1 │ │ mov sl, r1 │ │ mov fp, r3 │ │ mov r1, r7 │ │ - bl d5370 │ │ + bl d5242 │ │ add r6, r7 │ │ mov r1, sl │ │ adds r0, r5, r6 │ │ mov r3, fp │ │ adds r6, #1 │ │ movs r2, #0 │ │ str r6, [r4, #8] │ │ strb r2, [r0, #0] │ │ cmp r6, r1 │ │ - bcc.w 52ea2 │ │ + bcc.w 530b2 │ │ cmp.w r9, #16777216 @ 0x1000000 │ │ - bcs.w 52f60 │ │ + bcs.w 53170 │ │ subs r0, r6, r1 │ │ cmp r0, #2 │ │ - bls.w 52e86 │ │ + bls.w 53096 │ │ ldr r5, [r4, #4] │ │ ldr r7, [r4, #12] │ │ adds r0, r5, r1 │ │ strh.w r9, [r5, r1] │ │ mov.w r1, r9, lsr #16 │ │ strb r1, [r0, #2] │ │ adds r0, r7, #3 │ │ cmp r0, r6 │ │ - bls.n 52db8 │ │ + bls.n 52fc8 │ │ ldr r1, [r4, #0] │ │ sub.w r9, r0, r6 │ │ subs r0, r1, r6 │ │ cmp r9, r0 │ │ - bhi.w 52ef4 │ │ + bhi.w 53104 │ │ adds r0, r5, r6 │ │ cmp.w r9, #2 │ │ - bcc.n 52db0 │ │ + bcc.n 52fc0 │ │ sub.w r9, r9, #1 │ │ mov sl, r3 │ │ mov r1, r9 │ │ - bl d5370 │ │ + bl d5242 │ │ add r6, r9 │ │ mov r3, sl │ │ adds r0, r5, r6 │ │ adds r6, #1 │ │ movs r1, #0 │ │ str r6, [r4, #8] │ │ strb r1, [r0, #0] │ │ cmp r6, r7 │ │ - bcc.n 52eb0 │ │ + bcc.n 530c0 │ │ cmp.w r3, #16777216 @ 0x1000000 │ │ - bcs.w 52f60 │ │ + bcs.w 53170 │ │ subs r0, r6, r7 │ │ cmp r0, #2 │ │ - bls.n 52e86 │ │ + bls.n 53096 │ │ ldr r0, [r4, #12] │ │ adds r1, r5, r7 │ │ strh r3, [r5, r7] │ │ mov.w r9, r3, lsl #2 │ │ adds r7, r0, #3 │ │ add.w r5, r7, r9 │ │ lsrs r2, r3, #16 │ │ cmp r5, r6 │ │ strb r2, [r1, #2] │ │ - bls.n 52e16 │ │ + bls.n 53026 │ │ ldr r0, [r4, #0] │ │ sub.w sl, r5, r6 │ │ subs r0, r0, r6 │ │ cmp sl, r0 │ │ - bhi.w 52f18 │ │ + bhi.w 53128 │ │ ldr.w fp, [r4, #4] │ │ cmp.w sl, #2 │ │ add.w r0, fp, r6 │ │ - bcc.n 52e0e │ │ + bcc.n 5301e │ │ sub.w sl, sl, #1 │ │ mov r1, sl │ │ - bl d5370 │ │ + bl d5242 │ │ add r6, sl │ │ add.w r0, fp, r6 │ │ adds r6, #1 │ │ movs r1, #0 │ │ str r6, [r4, #8] │ │ strb r1, [r0, #0] │ │ cmp r5, r7 │ │ - bcc.n 52e94 │ │ + bcc.n 530a4 │ │ cmp r5, r6 │ │ - bhi.n 52e94 │ │ + bhi.n 530a4 │ │ ldr r0, [r4, #4] │ │ mov r1, r8 │ │ mov r2, r9 │ │ add r0, r7 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r0, [r4, #12] │ │ add r0, r9 │ │ adds r0, #3 │ │ str r0, [r4, #12] │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r5, [r4, #8] │ │ cmp r0, r5 │ │ - bls.n 52e6a │ │ + bls.n 5307a │ │ ldr r2, [r4, #0] │ │ subs r6, r0, r5 │ │ subs r0, r2, r5 │ │ cmp r6, r0 │ │ - bhi.n 52f3c │ │ + bhi.n 5314c │ │ ldr r7, [r4, #4] │ │ cmp r6, #2 │ │ add.w r0, r7, r5 │ │ - bcc.n 52e62 │ │ + bcc.n 53072 │ │ subs r6, #1 │ │ mov r8, r1 │ │ mov r1, r6 │ │ - bl d5370 │ │ + bl d5242 │ │ add r5, r6 │ │ mov r1, r8 │ │ adds r0, r7, r5 │ │ adds r5, #1 │ │ movs r2, #0 │ │ str r5, [r4, #8] │ │ strb r2, [r0, #0] │ │ cmp r5, r1 │ │ - bcc.n 52ebe │ │ + bcc.n 530ce │ │ subs r0, r5, r1 │ │ cmp r0, #2 │ │ itttt hi │ │ ldrhi r0, [r4, #4] │ │ movhi r2, #0 │ │ strhhi r2, [r0, r1] │ │ addhi r0, r1 │ │ ittt hi │ │ strbhi r2, [r0, #2] │ │ addhi sp, #4 │ │ ldmiahi.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #232] @ (52f70 ) │ │ + ldr r0, [pc, #232] @ (53180 ) │ │ movs r1, #37 @ 0x25 │ │ - ldr r2, [pc, #232] @ (52f74 ) │ │ + ldr r2, [pc, #232] @ (53184 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r3, [pc, #240] @ (52f88 ) │ │ + bl 3fd54 │ │ + ldr r3, [pc, #240] @ (53198 ) │ │ mov r0, r7 │ │ mov r1, r5 │ │ mov r2, r6 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #212] @ (52f78 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #212] @ (53188 ) │ │ mov r0, r1 │ │ add r3, pc │ │ mov r1, r6 │ │ mov r2, r6 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #208] @ (52f84 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #208] @ (53194 ) │ │ mov r0, r7 │ │ add r3, pc │ │ mov r1, r6 │ │ mov r2, r6 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #204] @ (52f8c ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #204] @ (5319c ) │ │ mov r0, r1 │ │ mov r1, r5 │ │ mov r2, r5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ movs r0, #1 │ │ mov r5, r1 │ │ str r0, [sp, #0] │ │ mov r1, r6 │ │ mov r6, r3 │ │ mov r0, r4 │ │ mov r2, r7 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ mov r3, r6 │ │ ldr r6, [r4, #8] │ │ mov r1, r5 │ │ ldr r5, [r4, #4] │ │ cmp r7, #2 │ │ add.w r0, r5, r6 │ │ - bcs.w 52d40 │ │ - b.n 52d54 │ │ + bcs.w 52f50 │ │ + b.n 52f64 │ │ movs r0, #1 │ │ mov r5, r3 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ mov r1, r6 │ │ mov r2, r9 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ mov r3, r5 │ │ ldrd r5, r6, [r4, #4] │ │ adds r0, r5, r6 │ │ cmp.w r9, #2 │ │ - bcs.w 52d9e │ │ - b.n 52db0 │ │ + bcs.w 52fae │ │ + b.n 52fc0 │ │ movs r0, #1 │ │ mov r1, r6 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ mov r2, sl │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r6, [r4, #8] │ │ ldr.w fp, [r4, #4] │ │ cmp.w sl, #2 │ │ add.w r0, fp, r6 │ │ - bcs.w 52dfe │ │ - b.n 52e0e │ │ + bcs.w 5300e │ │ + b.n 5301e │ │ movs r0, #1 │ │ mov r7, r1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ mov r1, r5 │ │ mov r2, r6 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r5, [r4, #8] │ │ mov r1, r7 │ │ ldr r7, [r4, #4] │ │ cmp r6, #2 │ │ add.w r0, r7, r5 │ │ - bcs.w 52e52 │ │ - b.n 52e62 │ │ - ldr r0, [pc, #24] @ (52f7c ) │ │ + bcs.w 53062 │ │ + b.n 53072 │ │ + ldr r0, [pc, #24] @ (5318c ) │ │ movs r1, #62 @ 0x3e │ │ - ldr r2, [pc, #24] @ (52f80 ) │ │ + ldr r2, [pc, #24] @ (53190 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ + bl 3fd54 │ │ nop │ │ - adds r7, #94 @ 0x5e │ │ - vtbl.8 d23, {d28-d31}, d14 │ │ + adds r5, #78 @ 0x4e │ │ + vtbl.8 d23, {d28-d29}, d14 │ │ movs r0, r1 │ │ - strh r6, [r4, #12] │ │ + ldrb r6, [r4, #30] │ │ movs r0, r1 │ │ - adds r6, #70 @ 0x46 │ │ - vtbl.8 d23, {d28-d30}, d20 │ │ + adds r4, #54 @ 0x36 │ │ + vtbl.8 d23, {d28}, d20 │ │ movs r0, r1 │ │ - strh r0, [r3, #12] │ │ + ldrb r0, [r3, #30] │ │ movs r0, r1 │ │ - strh r0, [r4, #12] │ │ + ldrb r0, [r4, #30] │ │ movs r0, r1 │ │ - strh r6, [r0, #12] │ │ + ldrb r6, [r0, #30] │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #4 │ │ mov r4, r0 │ │ adds r0, r1, #3 │ │ cmp r2, #0 │ │ - beq.w 530b8 │ │ + beq.w 532c8 │ │ ldrd r6, r9, [r4, #8] │ │ mov r8, r2 │ │ cmp r0, r6 │ │ - bls.n 52fdc │ │ + bls.n 531ec │ │ ldr r2, [r4, #0] │ │ subs r7, r0, r6 │ │ subs r0, r2, r6 │ │ cmp r7, r0 │ │ - bhi.w 5314c │ │ + bhi.w 5335c │ │ ldr r5, [r4, #4] │ │ cmp r7, #2 │ │ add.w r0, r5, r6 │ │ - bcc.n 52fd4 │ │ + bcc.n 531e4 │ │ subs r7, #1 │ │ mov sl, r1 │ │ mov fp, r3 │ │ mov r1, r7 │ │ - bl d5370 │ │ + bl d5242 │ │ add r6, r7 │ │ mov r1, sl │ │ adds r0, r5, r6 │ │ mov r3, fp │ │ adds r6, #1 │ │ movs r2, #0 │ │ str r6, [r4, #8] │ │ strb r2, [r0, #0] │ │ cmp r6, r1 │ │ - bcc.w 53122 │ │ + bcc.w 53332 │ │ cmp.w r9, #16777216 @ 0x1000000 │ │ - bcs.w 531e0 │ │ + bcs.w 533f0 │ │ subs r0, r6, r1 │ │ cmp r0, #2 │ │ - bls.w 53106 │ │ + bls.w 53316 │ │ ldr r5, [r4, #4] │ │ ldr r7, [r4, #12] │ │ adds r0, r5, r1 │ │ strh.w r9, [r5, r1] │ │ mov.w r1, r9, lsr #16 │ │ strb r1, [r0, #2] │ │ adds r0, r7, #3 │ │ cmp r0, r6 │ │ - bls.n 53038 │ │ + bls.n 53248 │ │ ldr r1, [r4, #0] │ │ sub.w r9, r0, r6 │ │ subs r0, r1, r6 │ │ cmp r9, r0 │ │ - bhi.w 53174 │ │ + bhi.w 53384 │ │ adds r0, r5, r6 │ │ cmp.w r9, #2 │ │ - bcc.n 53030 │ │ + bcc.n 53240 │ │ sub.w r9, r9, #1 │ │ mov sl, r3 │ │ mov r1, r9 │ │ - bl d5370 │ │ + bl d5242 │ │ add r6, r9 │ │ mov r3, sl │ │ adds r0, r5, r6 │ │ adds r6, #1 │ │ movs r1, #0 │ │ str r6, [r4, #8] │ │ strb r1, [r0, #0] │ │ cmp r6, r7 │ │ - bcc.n 53130 │ │ + bcc.n 53340 │ │ cmp.w r3, #16777216 @ 0x1000000 │ │ - bcs.w 531e0 │ │ + bcs.w 533f0 │ │ subs r0, r6, r7 │ │ cmp r0, #2 │ │ - bls.n 53106 │ │ + bls.n 53316 │ │ ldr r0, [r4, #12] │ │ adds r1, r5, r7 │ │ strh r3, [r5, r7] │ │ mov.w r9, r3, lsl #3 │ │ adds r7, r0, #3 │ │ add.w r5, r7, r9 │ │ lsrs r2, r3, #16 │ │ cmp r5, r6 │ │ strb r2, [r1, #2] │ │ - bls.n 53096 │ │ + bls.n 532a6 │ │ ldr r0, [r4, #0] │ │ sub.w sl, r5, r6 │ │ subs r0, r0, r6 │ │ cmp sl, r0 │ │ - bhi.w 53198 │ │ + bhi.w 533a8 │ │ ldr.w fp, [r4, #4] │ │ cmp.w sl, #2 │ │ add.w r0, fp, r6 │ │ - bcc.n 5308e │ │ + bcc.n 5329e │ │ sub.w sl, sl, #1 │ │ mov r1, sl │ │ - bl d5370 │ │ + bl d5242 │ │ add r6, sl │ │ add.w r0, fp, r6 │ │ adds r6, #1 │ │ movs r1, #0 │ │ str r6, [r4, #8] │ │ strb r1, [r0, #0] │ │ cmp r5, r7 │ │ - bcc.n 53114 │ │ + bcc.n 53324 │ │ cmp r5, r6 │ │ - bhi.n 53114 │ │ + bhi.n 53324 │ │ ldr r0, [r4, #4] │ │ mov r1, r8 │ │ mov r2, r9 │ │ add r0, r7 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r0, [r4, #12] │ │ add r0, r9 │ │ adds r0, #3 │ │ str r0, [r4, #12] │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r5, [r4, #8] │ │ cmp r0, r5 │ │ - bls.n 530ea │ │ + bls.n 532fa │ │ ldr r2, [r4, #0] │ │ subs r6, r0, r5 │ │ subs r0, r2, r5 │ │ cmp r6, r0 │ │ - bhi.n 531bc │ │ + bhi.n 533cc │ │ ldr r7, [r4, #4] │ │ cmp r6, #2 │ │ add.w r0, r7, r5 │ │ - bcc.n 530e2 │ │ + bcc.n 532f2 │ │ subs r6, #1 │ │ mov r8, r1 │ │ mov r1, r6 │ │ - bl d5370 │ │ + bl d5242 │ │ add r5, r6 │ │ mov r1, r8 │ │ adds r0, r7, r5 │ │ adds r5, #1 │ │ movs r2, #0 │ │ str r5, [r4, #8] │ │ strb r2, [r0, #0] │ │ cmp r5, r1 │ │ - bcc.n 5313e │ │ + bcc.n 5334e │ │ subs r0, r5, r1 │ │ cmp r0, #2 │ │ itttt hi │ │ ldrhi r0, [r4, #4] │ │ movhi r2, #0 │ │ strhhi r2, [r0, r1] │ │ addhi r0, r1 │ │ ittt hi │ │ strbhi r2, [r0, #2] │ │ addhi sp, #4 │ │ ldmiahi.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #232] @ (531f0 ) │ │ + ldr r0, [pc, #232] @ (53400 ) │ │ movs r1, #37 @ 0x25 │ │ - ldr r2, [pc, #232] @ (531f4 ) │ │ + ldr r2, [pc, #232] @ (53404 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r3, [pc, #240] @ (53208 ) │ │ + bl 3fd54 │ │ + ldr r3, [pc, #240] @ (53418 ) │ │ mov r0, r7 │ │ mov r1, r5 │ │ mov r2, r6 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #212] @ (531f8 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #212] @ (53408 ) │ │ mov r0, r1 │ │ add r3, pc │ │ mov r1, r6 │ │ mov r2, r6 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #208] @ (53204 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #208] @ (53414 ) │ │ mov r0, r7 │ │ add r3, pc │ │ mov r1, r6 │ │ mov r2, r6 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #204] @ (5320c ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #204] @ (5341c ) │ │ mov r0, r1 │ │ mov r1, r5 │ │ mov r2, r5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ movs r0, #1 │ │ mov r5, r1 │ │ str r0, [sp, #0] │ │ mov r1, r6 │ │ mov r6, r3 │ │ mov r0, r4 │ │ mov r2, r7 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ mov r3, r6 │ │ ldr r6, [r4, #8] │ │ mov r1, r5 │ │ ldr r5, [r4, #4] │ │ cmp r7, #2 │ │ add.w r0, r5, r6 │ │ - bcs.w 52fc0 │ │ - b.n 52fd4 │ │ + bcs.w 531d0 │ │ + b.n 531e4 │ │ movs r0, #1 │ │ mov r5, r3 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ mov r1, r6 │ │ mov r2, r9 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ mov r3, r5 │ │ ldrd r5, r6, [r4, #4] │ │ adds r0, r5, r6 │ │ cmp.w r9, #2 │ │ - bcs.w 5301e │ │ - b.n 53030 │ │ + bcs.w 5322e │ │ + b.n 53240 │ │ movs r0, #1 │ │ mov r1, r6 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ mov r2, sl │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r6, [r4, #8] │ │ ldr.w fp, [r4, #4] │ │ cmp.w sl, #2 │ │ add.w r0, fp, r6 │ │ - bcs.w 5307e │ │ - b.n 5308e │ │ + bcs.w 5328e │ │ + b.n 5329e │ │ movs r0, #1 │ │ mov r7, r1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ mov r1, r5 │ │ mov r2, r6 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r5, [r4, #8] │ │ mov r1, r7 │ │ ldr r7, [r4, #4] │ │ cmp r6, #2 │ │ add.w r0, r7, r5 │ │ - bcs.w 530d2 │ │ - b.n 530e2 │ │ - ldr r0, [pc, #24] @ (531fc ) │ │ + bcs.w 532e2 │ │ + b.n 532f2 │ │ + ldr r0, [pc, #24] @ (5340c ) │ │ movs r1, #62 @ 0x3e │ │ - ldr r2, [pc, #24] @ (53200 ) │ │ + ldr r2, [pc, #24] @ (53410 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ + bl 3fd54 │ │ nop │ │ - adds r4, #222 @ 0xde │ │ - vtbl.8 d23, {d12-d13}, d14 │ │ + adds r2, #206 @ 0xce │ │ + vqabs.s d23, d14 │ │ movs r0, r1 │ │ - ldrb r6, [r4, #28] │ │ + ldrb r6, [r4, #20] │ │ movs r0, r1 │ │ - adds r3, #198 @ 0xc6 │ │ - vtbl.8 d23, {d12}, d20 │ │ + adds r1, #182 @ 0xb6 │ │ + vpadal.s d23, d20 │ │ movs r0, r1 │ │ - ldrb r0, [r3, #28] │ │ + ldrb r0, [r3, #20] │ │ movs r0, r1 │ │ - ldrb r0, [r4, #28] │ │ + ldrb r0, [r4, #20] │ │ movs r0, r1 │ │ - ldrb r6, [r0, #28] │ │ + ldrb r6, [r0, #20] │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ sub sp, #44 @ 0x2c │ │ mov r4, r0 │ │ ldrb r0, [r1, #0] │ │ cmp r0, #0 │ │ - beq.n 532aa │ │ + beq.n 534ba │ │ mov r5, r2 │ │ ldr r2, [sp, #72] @ 0x48 │ │ movw r0, #31829 @ 0x7c55 │ │ ldr r3, [r5, #0] │ │ movt r0, #32586 @ 0x7f4a │ │ mov r9, r1 │ │ muls r0, r2 │ │ ldr r1, [r5, #16] │ │ ands r0, r3 │ │ cmp r1, r0 │ │ - bls.n 532e4 │ │ + bls.n 534f4 │ │ ldr r3, [r5, #12] │ │ add.w r0, r0, r0, lsl #1 │ │ ldr r1, [sp, #76] @ 0x4c │ │ add.w r0, r3, r0, lsl #2 │ │ ldrd r0, r3, [r0, #4] │ │ sub.w r7, r0, #24 │ │ add.w r0, r3, r3, lsl #1 │ │ lsls r0, r0, #3 │ │ cmp r0, #0 │ │ - beq.n 532dc │ │ + beq.n 534ec │ │ ldr.w r3, [r7, #24]! │ │ subs r0, #24 │ │ ldr r6, [r7, #4] │ │ eors r3, r2 │ │ eors r6, r1 │ │ orrs r3, r6 │ │ - bne.n 53252 │ │ + bne.n 53462 │ │ add.w r8, sp, #8 │ │ ldrd r1, r2, [r7, #12] │ │ mov.w r3, #2147483648 @ 0x80000000 │ │ mov r0, r8 │ │ - bl 4bac8 │ │ + bl 4bdd0 │ │ ldrd r1, r2, [r7, #12] │ │ add r0, sp, #24 │ │ mov r3, r5 │ │ strd r8, r9, [sp] │ │ - bl 4bba8 │ │ + bl 4beb0 │ │ ldr r0, [sp, #24] │ │ movs r1, #17 │ │ movt r1, #32768 @ 0x8000 │ │ cmp r0, r1 │ │ - bne.n 532ba │ │ + bne.n 534ca │ │ add r3, sp, #8 │ │ movs r7, #0 │ │ ldmia r3, {r0, r1, r2, r3} │ │ strd r7, r0, [r4] │ │ add.w r0, r4, #8 │ │ stmia r0!, {r1, r2, r3} │ │ add sp, #44 @ 0x2c │ │ @@ -64461,168 +64557,168 @@ │ │ ldr r7, [sp, #8] │ │ movs r6, #1 │ │ ldmia r3, {r0, r1, r2, r3} │ │ cmp r7, #0 │ │ strd r6, r0, [r4] │ │ add.w r0, r4, #8 │ │ stmia r0!, {r1, r2, r3} │ │ - beq.n 532a4 │ │ + beq.n 534b4 │ │ ldr r0, [sp, #12] │ │ - blx d87c0 │ │ + blx d87d0 │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ - ldr r0, [pc, #16] @ (532f0 ) │ │ + ldr r0, [pc, #16] @ (53500 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r2, [pc, #4] @ (532ec ) │ │ + bl 3fd40 │ │ + ldr r2, [pc, #4] @ (534fc ) │ │ add r2, pc │ │ - bl 3fa74 │ │ - strb r6, [r0, #31] │ │ + bl 3fd7c │ │ + strb r6, [r0, #23] │ │ movs r0, r1 │ │ - ldrb r6, [r1, #22] │ │ + ldrb r6, [r1, #14] │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #20 │ │ mov r6, r0 │ │ cmp r2, #0 │ │ str r0, [sp, #12] │ │ - beq.w 535c4 │ │ + beq.w 537d4 │ │ ldrd r5, fp, [r6, #8] │ │ adds r0, r1, #3 │ │ cmp r0, r5 │ │ - bls.n 5334a │ │ + bls.n 5355a │ │ ldr r6, [r6, #0] │ │ subs r4, r0, r5 │ │ subs r0, r6, r5 │ │ cmp r4, r0 │ │ - bhi.w 53678 │ │ + bhi.w 53888 │ │ ldr r6, [sp, #12] │ │ ldr r6, [r6, #4] │ │ cmp r4, #2 │ │ add.w r0, r6, r5 │ │ - bcc.n 5333e │ │ + bcc.n 5354e │ │ subs r4, #1 │ │ mov r8, r1 │ │ mov r9, r2 │ │ mov sl, r3 │ │ mov r1, r4 │ │ - bl d5370 │ │ + bl d5242 │ │ add r5, r4 │ │ mov r1, r8 │ │ adds r0, r6, r5 │ │ mov r3, sl │ │ mov r2, r9 │ │ ldr r7, [sp, #12] │ │ adds r5, #1 │ │ movs r6, #0 │ │ strb r6, [r0, #0] │ │ mov r6, r7 │ │ str r5, [r7, #8] │ │ cmp r5, r1 │ │ - bcc.w 5364e │ │ + bcc.w 5385e │ │ cmp.w fp, #16777216 @ 0x1000000 │ │ - bcs.w 536f4 │ │ + bcs.w 53904 │ │ subs r0, r5, r1 │ │ cmp r0, #2 │ │ - bls.w 53616 │ │ + bls.w 53826 │ │ ldr r4, [r6, #4] │ │ ldr r7, [r6, #12] │ │ adds r0, r4, r1 │ │ strh.w fp, [r4, r1] │ │ mov.w r1, fp, lsr #16 │ │ strb r1, [r0, #2] │ │ adds r0, r7, #3 │ │ cmp r0, r5 │ │ - bls.n 533a6 │ │ + bls.n 535b6 │ │ ldr r1, [r6, #0] │ │ subs r6, r0, r5 │ │ subs r0, r1, r5 │ │ cmp r6, r0 │ │ - bhi.w 536a6 │ │ + bhi.w 538b6 │ │ adds r0, r4, r5 │ │ cmp r6, #2 │ │ - bcc.n 5339c │ │ + bcc.n 535ac │ │ subs r6, #1 │ │ mov r8, r2 │ │ mov r9, r3 │ │ mov r1, r6 │ │ - bl d5370 │ │ + bl d5242 │ │ add r5, r6 │ │ mov r3, r9 │ │ adds r0, r4, r5 │ │ mov r2, r8 │ │ ldr r1, [sp, #12] │ │ adds r5, #1 │ │ str r5, [r1, #8] │ │ movs r1, #0 │ │ strb r1, [r0, #0] │ │ cmp r5, r7 │ │ - bcc.w 5365c │ │ + bcc.w 5386c │ │ cmp.w r3, #16777216 @ 0x1000000 │ │ - bcs.w 536f4 │ │ + bcs.w 53904 │ │ subs r0, r5, r7 │ │ cmp r0, #2 │ │ - bls.w 53616 │ │ + bls.w 53826 │ │ ldr r6, [sp, #12] │ │ adds r1, r4, r7 │ │ strh r3, [r4, r7] │ │ lsrs r7, r3, #16 │ │ cmp r3, #0 │ │ ldr r0, [r6, #12] │ │ strb r7, [r1, #2] │ │ add.w r1, r3, r3, lsl #1 │ │ add r1, r0 │ │ add.w r1, r1, #3 │ │ str r1, [r6, #12] │ │ - beq.w 535be │ │ + beq.w 537ce │ │ mvn.w r1, #2 │ │ sub.w r9, r1, r0 │ │ add.w sl, r0, #6 │ │ add.w fp, r2, #4 │ │ lsls r3, r3, #3 │ │ - b.n 53416 │ │ + b.n 53626 │ │ add.w r0, r8, r4 │ │ mov r1, ip │ │ mov r2, r3 │ │ mov r4, r3 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r0, [r6, #12] │ │ ldr r3, [sp, #16] │ │ add r0, r4 │ │ str r0, [r6, #12] │ │ sub.w r9, r9, #3 │ │ add.w sl, sl, #3 │ │ add.w fp, fp, #8 │ │ subs r3, #8 │ │ - beq.w 535be │ │ + beq.w 537ce │ │ ldr.w ip, [fp, #-4] │ │ sub.w r8, sl, #3 │ │ cmp.w ip, #0 │ │ - beq.n 534ee │ │ + beq.n 536fe │ │ str r3, [sp, #16] │ │ ldr r7, [r6, #8] │ │ ldr.w r3, [fp] │ │ cmp sl, r7 │ │ - bls.n 5347a │ │ + bls.n 5368a │ │ ldr r0, [r6, #0] │ │ sub.w r4, sl, r7 │ │ mov r5, r7 │ │ subs r0, r0, r7 │ │ cmp r4, r0 │ │ - bhi.w 5354e │ │ + bhi.w 5375e │ │ ldr r6, [r6, #4] │ │ cmp r4, #2 │ │ add.w r0, r6, r5 │ │ - bcc.n 53470 │ │ + bcc.n 53680 │ │ mvns r1, r7 │ │ str.w r8, [sp, #8] │ │ add r1, sl │ │ mov r4, ip │ │ mov r8, r3 │ │ - bl d5370 │ │ + bl d5242 │ │ subs r0, r5, r7 │ │ mov r3, r8 │ │ add.w r1, sl, r0 │ │ add r0, r6 │ │ add r0, sl │ │ ldr.w r8, [sp, #8] │ │ subs r5, r1, #1 │ │ @@ -64630,438 +64726,438 @@ │ │ mov ip, r4 │ │ ldr r6, [sp, #12] │ │ adds r7, r5, #1 │ │ movs r1, #0 │ │ strb r1, [r0, #0] │ │ str r7, [r6, #8] │ │ cmp r8, r7 │ │ - bhi.w 53632 │ │ + bhi.w 53842 │ │ adds r0, r3, #1 │ │ cmp.w r0, #16777216 @ 0x1000000 │ │ - bcs.w 536f4 │ │ + bcs.w 53904 │ │ add.w r1, r7, r9 │ │ cmp r1, #2 │ │ - bls.w 53616 │ │ + bls.w 53826 │ │ ldr.w r8, [r6, #4] │ │ lsrs r2, r0, #16 │ │ ldr r4, [r6, #12] │ │ add.w r1, r8, sl │ │ adds r5, r4, r3 │ │ cmp r5, r7 │ │ strb.w r2, [r1, #-1] │ │ strh.w r0, [r1, #-3] │ │ - bls.n 534e0 │ │ + bls.n 536f0 │ │ ldr r0, [r6, #0] │ │ subs r6, r5, r7 │ │ subs r0, r0, r7 │ │ cmp r6, r0 │ │ - bhi.n 53576 │ │ + bhi.n 53786 │ │ add.w r0, r8, r7 │ │ cmp r6, #2 │ │ - bcc.n 534d6 │ │ + bcc.n 536e6 │ │ subs r6, #1 │ │ strd ip, r3, [sp, #4] │ │ mov r1, r6 │ │ - bl d5370 │ │ + bl d5242 │ │ add r7, r6 │ │ ldrd ip, r3, [sp, #4] │ │ add.w r0, r8, r7 │ │ ldr r6, [sp, #12] │ │ adds r7, #1 │ │ movs r1, #0 │ │ strb r1, [r0, #0] │ │ str r7, [r6, #8] │ │ cmp r5, r4 │ │ - bcc.w 53624 │ │ + bcc.w 53834 │ │ cmp r5, r7 │ │ - bls.w 533ee │ │ - b.n 53624 │ │ + bls.w 535fe │ │ + b.n 53834 │ │ ldr r4, [r6, #8] │ │ cmp sl, r4 │ │ - bls.n 53530 │ │ + bls.n 53740 │ │ ldr r0, [r6, #0] │ │ sub.w r5, sl, r4 │ │ mov r7, r4 │ │ str r3, [sp, #16] │ │ subs r0, r0, r4 │ │ cmp r5, r0 │ │ - bhi.n 535a0 │ │ + bhi.n 537b0 │ │ ldr r6, [r6, #4] │ │ cmp r5, #2 │ │ add.w r0, r6, r7 │ │ - bcc.n 53524 │ │ + bcc.n 53734 │ │ mvns r1, r4 │ │ add r1, sl │ │ - bl d5370 │ │ + bl d5242 │ │ subs r0, r7, r4 │ │ add.w r1, sl, r0 │ │ add r0, r6 │ │ add r0, sl │ │ subs r7, r1, #1 │ │ subs r0, #1 │ │ ldr r6, [sp, #12] │ │ adds r4, r7, #1 │ │ ldr r3, [sp, #16] │ │ movs r1, #0 │ │ strb r1, [r0, #0] │ │ str r4, [r6, #8] │ │ cmp r8, r4 │ │ - bhi.w 53640 │ │ + bhi.w 53850 │ │ add.w r0, r4, r9 │ │ cmp r0, #2 │ │ - bls.n 53616 │ │ + bls.n 53826 │ │ ldr r0, [r6, #4] │ │ movs r1, #0 │ │ add r0, sl │ │ strb.w r1, [r0, #-1] │ │ strh.w r1, [r0, #-3] │ │ - b.n 53404 │ │ + b.n 53614 │ │ movs r0, #1 │ │ str r3, [sp, #8] │ │ str r0, [sp, #0] │ │ mov r0, r6 │ │ mov r1, r7 │ │ mov r2, r4 │ │ movs r3, #1 │ │ mov r5, ip │ │ - bl 4eddc │ │ + bl 4efec │ │ mov ip, r5 │ │ ldr r3, [sp, #8] │ │ ldr r5, [r6, #8] │ │ ldr r6, [r6, #4] │ │ cmp r4, #2 │ │ add.w r0, r6, r5 │ │ - bcs.w 5344a │ │ - b.n 53470 │ │ + bcs.w 5365a │ │ + b.n 53680 │ │ ldr.w r8, [sp, #12] │ │ movs r0, #1 │ │ str r0, [sp, #0] │ │ mov r1, r7 │ │ str r3, [sp, #8] │ │ mov r2, r6 │ │ mov r0, r8 │ │ movs r3, #1 │ │ mov r7, ip │ │ - bl 4eddc │ │ + bl 4efec │ │ mov ip, r7 │ │ ldr r3, [sp, #8] │ │ ldrd r8, r7, [r8, #4] │ │ add.w r0, r8, r7 │ │ cmp r6, #2 │ │ - bcs.n 534c0 │ │ - b.n 534d6 │ │ + bcs.n 536d0 │ │ + b.n 536e6 │ │ movs r0, #1 │ │ mov r1, r4 │ │ str r0, [sp, #0] │ │ mov r0, r6 │ │ mov r2, r5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r7, [r6, #8] │ │ ldr r6, [r6, #4] │ │ cmp r5, #2 │ │ add.w r0, r6, r7 │ │ - bcs.n 5350e │ │ - b.n 53524 │ │ + bcs.n 5371e │ │ + b.n 53734 │ │ add sp, #20 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r4, [r6, #8] │ │ adds r0, r1, #3 │ │ cmp r0, r4 │ │ - bls.n 535fa │ │ + bls.n 5380a │ │ ldr r2, [r6, #0] │ │ subs r5, r0, r4 │ │ subs r0, r2, r4 │ │ cmp r5, r0 │ │ - bhi.n 536ce │ │ + bhi.n 538de │ │ ldr r6, [r6, #4] │ │ cmp r5, #2 │ │ add.w r0, r6, r4 │ │ - bcc.n 535f0 │ │ + bcc.n 53800 │ │ subs r5, #1 │ │ mov r7, r1 │ │ mov r1, r5 │ │ - bl d5370 │ │ + bl d5242 │ │ add r4, r5 │ │ mov r1, r7 │ │ adds r0, r6, r4 │ │ ldr r6, [sp, #12] │ │ adds r4, #1 │ │ movs r2, #0 │ │ strb r2, [r0, #0] │ │ str r4, [r6, #8] │ │ cmp r4, r1 │ │ - bcc.n 5366a │ │ + bcc.n 5387a │ │ subs r0, r4, r1 │ │ cmp r0, #2 │ │ itttt hi │ │ ldrhi r0, [r6, #4] │ │ movhi r2, #0 │ │ strhhi r2, [r0, r1] │ │ addhi r0, r1 │ │ ittt hi │ │ strbhi r2, [r0, #2] │ │ addhi sp, #20 │ │ ldmiahi.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #236] @ (53704 ) │ │ + ldr r0, [pc, #236] @ (53914 ) │ │ movs r1, #37 @ 0x25 │ │ - ldr r2, [pc, #236] @ (53708 ) │ │ + ldr r2, [pc, #236] @ (53918 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r3, [pc, #252] @ (53724 ) │ │ + bl 3fd54 │ │ + ldr r3, [pc, #252] @ (53934 ) │ │ mov r0, r4 │ │ mov r1, r5 │ │ mov r2, r7 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #236] @ (53720 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #236] @ (53930 ) │ │ mov r0, r8 │ │ mov r1, r7 │ │ mov r2, r7 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #228] @ (53728 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #228] @ (53938 ) │ │ mov r0, r8 │ │ add r3, pc │ │ mov r1, r4 │ │ mov r2, r4 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #188] @ (5370c ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #188] @ (5391c ) │ │ mov r0, r1 │ │ add r3, pc │ │ mov r1, r5 │ │ mov r2, r5 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #188] @ (5371c ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #188] @ (5392c ) │ │ mov r0, r7 │ │ add r3, pc │ │ mov r1, r5 │ │ mov r2, r5 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #164] @ (53710 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #164] @ (53920 ) │ │ mov r0, r1 │ │ add r3, pc │ │ mov r1, r4 │ │ mov r2, r4 │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ ldr r6, [sp, #12] │ │ movs r0, #1 │ │ str r0, [sp, #0] │ │ mov r8, r1 │ │ mov r1, r5 │ │ mov r9, r2 │ │ mov r5, r3 │ │ mov r0, r6 │ │ mov r2, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ mov r3, r5 │ │ ldr r5, [r6, #8] │ │ mov r1, r8 │ │ mov r2, r9 │ │ ldr r6, [r6, #4] │ │ cmp r4, #2 │ │ add.w r0, r6, r5 │ │ - bcs.w 53326 │ │ - b.n 5333e │ │ + bcs.w 53536 │ │ + b.n 5354e │ │ ldr r4, [sp, #12] │ │ movs r0, #1 │ │ str r0, [sp, #0] │ │ mov r1, r5 │ │ mov r8, r2 │ │ mov r5, r3 │ │ mov r0, r4 │ │ mov r2, r6 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ mov r3, r5 │ │ ldrd r4, r5, [r4, #4] │ │ mov r2, r8 │ │ adds r0, r4, r5 │ │ cmp r6, #2 │ │ - bcs.w 53388 │ │ - b.n 5339c │ │ + bcs.w 53598 │ │ + b.n 535ac │ │ movs r0, #1 │ │ mov r2, r5 │ │ str r0, [sp, #0] │ │ mov r0, r6 │ │ mov r6, r1 │ │ mov r1, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ mov r1, r6 │ │ ldr r6, [sp, #12] │ │ ldr r4, [r6, #8] │ │ ldr r6, [r6, #4] │ │ cmp r5, #2 │ │ add.w r0, r6, r4 │ │ - bcs.w 535e0 │ │ - b.n 535f0 │ │ - ldr r0, [pc, #28] @ (53714 ) │ │ + bcs.w 537f0 │ │ + b.n 53800 │ │ + ldr r0, [pc, #28] @ (53924 ) │ │ movs r1, #62 @ 0x3e │ │ - ldr r2, [pc, #28] @ (53718 ) │ │ + ldr r2, [pc, #28] @ (53928 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ + bl 3fd54 │ │ nop │ │ - cmp r7, #206 @ 0xce │ │ - vrsra.u64 , q15, #4 │ │ + cmp r5, #190 @ 0xbe │ │ + vsra.u64 , q15, #4 │ │ movs r0, r1 │ │ - ldrb r2, [r7, #7] │ │ + strb r2, [r7, #31] │ │ movs r0, r1 │ │ - ldrb r6, [r3, #7] │ │ + strb r6, [r3, #31] │ │ movs r0, r1 │ │ - cmp r6, #178 @ 0xb2 │ │ - vrsra.u32 d23, d0, #4 │ │ + cmp r4, #162 @ 0xa2 │ │ + vsra.u32 d23, d0, #4 │ │ movs r0, r1 │ │ - ldrb r4, [r5, #7] │ │ + strb r4, [r5, #31] │ │ movs r0, r1 │ │ - ldrb r2, [r2, #8] │ │ + ldrb r2, [r2, #0] │ │ movs r0, r1 │ │ - ldrb r0, [r2, #8] │ │ + ldrb r0, [r2, #0] │ │ movs r0, r1 │ │ - ldrb r0, [r1, #8] │ │ + ldrb r0, [r1, #0] │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #28 │ │ mov ip, r0 │ │ cmp r2, #0 │ │ str r0, [sp, #24] │ │ - beq.w 53a4a │ │ + beq.w 53c5a │ │ ldrd r6, r7, [ip, #8] │ │ adds r0, r1, #3 │ │ str r2, [sp, #16] │ │ cmp r0, r6 │ │ - bls.n 53784 │ │ + bls.n 53994 │ │ ldr.w r2, [ip] │ │ subs r4, r0, r6 │ │ subs r0, r2, r6 │ │ cmp r4, r0 │ │ - bhi.w 53b04 │ │ + bhi.w 53d14 │ │ ldr.w r5, [ip, #4] │ │ cmp r4, #2 │ │ add.w r0, r5, r6 │ │ - bcc.n 5377a │ │ + bcc.n 5398a │ │ subs r4, #1 │ │ mov r8, r1 │ │ mov r9, r3 │ │ mov r1, r4 │ │ - bl d5370 │ │ + bl d5242 │ │ add r6, r4 │ │ ldr.w ip, [sp, #24] │ │ adds r0, r5, r6 │ │ mov r1, r8 │ │ mov r3, r9 │ │ adds r6, #1 │ │ movs r2, #0 │ │ str.w r6, [ip, #8] │ │ strb r2, [r0, #0] │ │ cmp r6, r1 │ │ - bcc.w 53ada │ │ + bcc.w 53cea │ │ cmp.w r7, #16777216 @ 0x1000000 │ │ - bcs.w 53b86 │ │ + bcs.w 53d96 │ │ subs r0, r6, r1 │ │ cmp r0, #2 │ │ - bls.w 53ab4 │ │ + bls.w 53cc4 │ │ ldr.w r4, [ip, #4] │ │ ldr.w r5, [ip, #12] │ │ adds r0, r4, r1 │ │ strh r7, [r4, r1] │ │ lsrs r1, r7, #16 │ │ strb r1, [r0, #2] │ │ adds r0, r5, #3 │ │ cmp r0, r6 │ │ - bls.n 537e2 │ │ + bls.n 539f2 │ │ ldr.w r1, [ip] │ │ subs r7, r0, r6 │ │ subs r0, r1, r6 │ │ cmp r7, r0 │ │ - bhi.w 53b34 │ │ + bhi.w 53d44 │ │ adds r0, r4, r6 │ │ cmp r7, #2 │ │ - bcc.n 537d8 │ │ + bcc.n 539e8 │ │ subs r7, #1 │ │ mov r8, r3 │ │ mov r1, r7 │ │ - bl d5370 │ │ + bl d5242 │ │ add r6, r7 │ │ ldr.w ip, [sp, #24] │ │ adds r0, r4, r6 │ │ mov r3, r8 │ │ adds r6, #1 │ │ movs r1, #0 │ │ str.w r6, [ip, #8] │ │ strb r1, [r0, #0] │ │ cmp r6, r5 │ │ - bcc.w 53ae8 │ │ + bcc.w 53cf8 │ │ cmp.w r3, #16777216 @ 0x1000000 │ │ - bcs.w 53b86 │ │ + bcs.w 53d96 │ │ subs r0, r6, r5 │ │ cmp r0, #2 │ │ - bls.w 53ab4 │ │ + bls.w 53cc4 │ │ adds r0, r4, r5 │ │ lsrs r1, r3, #16 │ │ ldr.w r2, [ip, #12] │ │ cmp r3, #0 │ │ strb r1, [r0, #2] │ │ add.w r0, r3, r3, lsl #1 │ │ add.w r1, r0, r2 │ │ strh r3, [r4, r5] │ │ add.w r1, r1, #3 │ │ str.w r1, [ip, #12] │ │ ldr r1, [sp, #16] │ │ - beq.w 53aa0 │ │ + beq.w 53cb0 │ │ mov.w r9, r0, lsl #2 │ │ mvn.w r0, #2 │ │ sub.w sl, r0, r2 │ │ mov.w fp, #0 │ │ str r2, [sp, #12] │ │ - b.n 53860 │ │ + b.n 53a70 │ │ add.w r0, r8, r4 │ │ mov r1, r3 │ │ mov r2, lr │ │ mov r4, lr │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr.w ip, [sp, #24] │ │ ldrd r2, r1, [sp, #12] │ │ ldr.w r0, [ip, #12] │ │ add r0, r4 │ │ str.w r0, [ip, #12] │ │ sub.w sl, sl, #3 │ │ add.w fp, fp, #3 │ │ subs.w r9, r9, #12 │ │ - beq.w 53aa0 │ │ + beq.w 53cb0 │ │ ldr.w r3, [r1, fp, lsl #2] │ │ add.w r7, r2, fp │ │ adds r0, r7, #3 │ │ cmp r3, #0 │ │ - beq.n 5394c │ │ + beq.n 53b5c │ │ add.w r1, r1, fp, lsl #2 │ │ ldr.w r5, [ip, #8] │ │ ldr.w lr, [r1, #4] │ │ adds r1, r7, #6 │ │ cmp r1, r5 │ │ - bls.n 538cc │ │ + bls.n 53adc │ │ str r0, [sp, #20] │ │ subs r1, r7, r5 │ │ ldr.w r0, [ip] │ │ adds r4, r1, #6 │ │ mov r6, r5 │ │ subs r0, r0, r5 │ │ cmp r4, r0 │ │ - bhi.w 539bc │ │ + bhi.w 53bcc │ │ ldr.w r8, [ip, #4] │ │ cmp r4, #2 │ │ add.w r0, r8, r6 │ │ - bcc.n 538c0 │ │ + bcc.n 53ad0 │ │ adds r1, #5 │ │ str r3, [sp, #8] │ │ mov r4, lr │ │ - bl d5370 │ │ + bl d5242 │ │ subs r0, r6, r5 │ │ ldrd r3, r2, [sp, #8] │ │ adds r1, r7, r0 │ │ add r0, r8 │ │ add r0, r7 │ │ ldr.w ip, [sp, #24] │ │ adds r6, r1, #5 │ │ @@ -65069,75 +65165,75 @@ │ │ mov lr, r4 │ │ movs r1, #0 │ │ adds r5, r6, #1 │ │ strb r1, [r0, #0] │ │ ldr r0, [sp, #20] │ │ str.w r5, [ip, #8] │ │ cmp r0, r5 │ │ - bhi.w 53ac2 │ │ + bhi.w 53cd2 │ │ add.w r0, lr, #1 │ │ cmp.w r0, #16777216 @ 0x1000000 │ │ - bcs.w 53b86 │ │ + bcs.w 53d96 │ │ add.w r1, r5, sl │ │ cmp r1, #2 │ │ - bls.w 53ab4 │ │ + bls.w 53cc4 │ │ ldr.w r8, [ip, #4] │ │ ldr.w r4, [ip, #12] │ │ add.w r1, r8, r2 │ │ lsrs r2, r0, #16 │ │ add r1, fp │ │ add.w r6, r4, lr │ │ cmp r6, r5 │ │ strb r2, [r1, #5] │ │ strh.w r0, [r1, #3] │ │ - bls.n 5393e │ │ + bls.n 53b4e │ │ ldr.w r0, [ip] │ │ subs r7, r6, r5 │ │ subs r0, r0, r5 │ │ cmp r7, r0 │ │ - bhi.n 539f2 │ │ + bhi.n 53c02 │ │ add.w r0, r8, r5 │ │ cmp r7, #2 │ │ - bcc.n 53934 │ │ + bcc.n 53b44 │ │ subs r7, #1 │ │ str r3, [sp, #8] │ │ str.w lr, [sp, #20] │ │ mov r1, r7 │ │ - bl d5370 │ │ + bl d5242 │ │ add r5, r7 │ │ ldr r3, [sp, #8] │ │ ldrd lr, ip, [sp, #20] │ │ add.w r0, r8, r5 │ │ adds r5, #1 │ │ movs r1, #0 │ │ str.w r5, [ip, #8] │ │ strb r1, [r0, #0] │ │ cmp r6, r4 │ │ - bcc.w 53aa6 │ │ + bcc.w 53cb6 │ │ cmp r6, r5 │ │ - bls.w 53830 │ │ - b.n 53aa6 │ │ + bls.w 53a40 │ │ + b.n 53cb6 │ │ ldr.w r4, [ip, #8] │ │ adds r3, r7, #6 │ │ cmp r3, r4 │ │ - bls.n 5399a │ │ + bls.n 53baa │ │ str r0, [sp, #20] │ │ subs r1, r7, r4 │ │ ldr.w r0, [ip] │ │ adds r5, r1, #6 │ │ mov r6, r4 │ │ subs r0, r0, r4 │ │ cmp r5, r0 │ │ - bhi.n 53a1e │ │ + bhi.n 53c2e │ │ ldr.w r8, [ip, #4] │ │ cmp r5, #2 │ │ add.w r0, r8, r6 │ │ - bcc.n 5398c │ │ + bcc.n 53b9c │ │ adds r1, #5 │ │ - bl d5370 │ │ + bl d5242 │ │ subs r0, r6, r4 │ │ ldr r2, [sp, #12] │ │ adds r1, r7, r0 │ │ add r0, r8 │ │ add r0, r7 │ │ ldr.w ip, [sp, #24] │ │ adds r6, r1, #5 │ │ @@ -65145,270 +65241,270 @@ │ │ movs r3, #0 │ │ ldr r1, [sp, #16] │ │ strb r3, [r0, #0] │ │ adds r4, r6, #1 │ │ ldr r0, [sp, #20] │ │ str.w r4, [ip, #8] │ │ cmp r0, r4 │ │ - bhi.w 53ace │ │ + bhi.w 53cde │ │ add.w r0, r4, sl │ │ cmp r0, #2 │ │ - bls.w 53ab4 │ │ + bls.w 53cc4 │ │ ldr.w r0, [ip, #4] │ │ movs r3, #0 │ │ add r0, r2 │ │ add r0, fp │ │ strb r3, [r0, #5] │ │ strh.w r3, [r0, #3] │ │ - b.n 53850 │ │ + b.n 53a60 │ │ movs r0, #1 │ │ str r1, [sp, #8] │ │ str r0, [sp, #0] │ │ mov r8, r3 │ │ mov r0, ip │ │ mov r1, r5 │ │ mov r2, r4 │ │ movs r3, #1 │ │ mov r6, lr │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w ip, [sp, #24] │ │ mov lr, r6 │ │ ldr r1, [sp, #8] │ │ mov r3, r8 │ │ ldr r2, [sp, #12] │ │ ldr.w r6, [ip, #8] │ │ ldr.w r8, [ip, #4] │ │ cmp r4, #2 │ │ add.w r0, r8, r6 │ │ - bcs.w 538a0 │ │ - b.n 538c0 │ │ + bcs.w 53ab0 │ │ + b.n 53ad0 │ │ movs r0, #1 │ │ mov r1, r5 │ │ str r0, [sp, #0] │ │ mov r8, r3 │ │ mov r0, ip │ │ mov r2, r7 │ │ movs r3, #1 │ │ mov r5, lr │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w ip, [sp, #24] │ │ mov lr, r5 │ │ mov r3, r8 │ │ ldrd r8, r5, [ip, #4] │ │ add.w r0, r8, r5 │ │ cmp r7, #2 │ │ - bcs.w 5391a │ │ - b.n 53934 │ │ + bcs.w 53b2a │ │ + b.n 53b44 │ │ movs r0, #1 │ │ mov r6, r1 │ │ str r0, [sp, #0] │ │ mov r0, ip │ │ mov r1, r4 │ │ mov r2, r5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w ip, [sp, #24] │ │ mov r1, r6 │ │ ldr r2, [sp, #12] │ │ ldr.w r6, [ip, #8] │ │ ldr.w r8, [ip, #4] │ │ cmp r5, #2 │ │ add.w r0, r8, r6 │ │ - bcs.n 53974 │ │ - b.n 5398c │ │ + bcs.n 53b84 │ │ + b.n 53b9c │ │ ldr.w r4, [ip, #8] │ │ adds r0, r1, #3 │ │ cmp r0, r4 │ │ - bls.n 53a8a │ │ + bls.n 53c9a │ │ ldr.w r2, [ip] │ │ subs r5, r0, r4 │ │ subs r0, r2, r4 │ │ cmp r5, r0 │ │ - bhi.n 53b5a │ │ + bhi.n 53d6a │ │ ldr.w r6, [ip, #4] │ │ cmp r5, #2 │ │ add.w r0, r6, r4 │ │ - bcc.n 53a80 │ │ + bcc.n 53c90 │ │ subs r5, #1 │ │ mov r7, r1 │ │ mov r1, r5 │ │ - bl d5370 │ │ + bl d5242 │ │ add r4, r5 │ │ ldr.w ip, [sp, #24] │ │ adds r0, r6, r4 │ │ mov r1, r7 │ │ adds r4, #1 │ │ movs r2, #0 │ │ str.w r4, [ip, #8] │ │ strb r2, [r0, #0] │ │ cmp r4, r1 │ │ - bcc.n 53af6 │ │ + bcc.n 53d06 │ │ subs r0, r4, r1 │ │ cmp r0, #2 │ │ - bls.n 53ab4 │ │ + bls.n 53cc4 │ │ ldr.w r0, [ip, #4] │ │ movs r2, #0 │ │ strh r2, [r0, r1] │ │ add r0, r1 │ │ strb r2, [r0, #2] │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r3, [pc, #272] @ (53bb8 ) │ │ + ldr r3, [pc, #272] @ (53dc8 ) │ │ mov r0, r4 │ │ mov r1, r6 │ │ mov r2, r5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #220] @ (53b94 ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #220] @ (53da4 ) │ │ movs r1, #37 @ 0x25 │ │ - ldr r2, [pc, #220] @ (53b98 ) │ │ + ldr r2, [pc, #220] @ (53da8 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r3, [pc, #240] @ (53bb4 ) │ │ + bl 3fd54 │ │ + ldr r3, [pc, #240] @ (53dc4 ) │ │ mov r1, r5 │ │ mov r2, r5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #208] @ (53ba0 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #208] @ (53db0 ) │ │ add r3, pc │ │ mov r1, r4 │ │ mov r2, r4 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #192] @ (53b9c ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #192] @ (53dac ) │ │ mov r0, r1 │ │ add r3, pc │ │ mov r1, r6 │ │ mov r2, r6 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #192] @ (53bac ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #192] @ (53dbc ) │ │ mov r0, r5 │ │ add r3, pc │ │ mov r1, r6 │ │ mov r2, r6 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #184] @ (53bb0 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #184] @ (53dc0 ) │ │ mov r0, r1 │ │ add r3, pc │ │ mov r1, r4 │ │ mov r2, r4 │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ movs r0, #1 │ │ mov r5, r1 │ │ str r0, [sp, #0] │ │ mov r1, r6 │ │ mov r6, r3 │ │ mov r0, ip │ │ mov r2, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w ip, [sp, #24] │ │ mov r3, r6 │ │ mov r1, r5 │ │ ldr.w r6, [ip, #8] │ │ ldr.w r5, [ip, #4] │ │ cmp r4, #2 │ │ add.w r0, r5, r6 │ │ - bcs.w 53762 │ │ - b.n 5377a │ │ + bcs.w 53972 │ │ + b.n 5398a │ │ movs r0, #1 │ │ mov r4, r3 │ │ str r0, [sp, #0] │ │ mov r0, ip │ │ mov r1, r6 │ │ mov r2, r7 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w ip, [sp, #24] │ │ mov r3, r4 │ │ ldrd r4, r6, [ip, #4] │ │ adds r0, r4, r6 │ │ cmp r7, #2 │ │ - bcs.w 537c4 │ │ - b.n 537d8 │ │ + bcs.w 539d4 │ │ + b.n 539e8 │ │ movs r0, #1 │ │ mov r6, r1 │ │ str r0, [sp, #0] │ │ mov r0, ip │ │ mov r1, r4 │ │ mov r2, r5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w ip, [sp, #24] │ │ mov r1, r6 │ │ ldr.w r4, [ip, #8] │ │ ldr.w r6, [ip, #4] │ │ cmp r5, #2 │ │ add.w r0, r6, r4 │ │ - bcs.w 53a6c │ │ - b.n 53a80 │ │ - ldr r0, [pc, #28] @ (53ba4 ) │ │ + bcs.w 53c7c │ │ + b.n 53c90 │ │ + ldr r0, [pc, #28] @ (53db4 ) │ │ movs r1, #62 @ 0x3e │ │ - ldr r2, [pc, #28] @ (53ba8 ) │ │ + ldr r2, [pc, #28] @ (53db8 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - cmp r3, #48 @ 0x30 │ │ - vqrdmlsh.s q11, q6, d16[0] │ │ + bl 3fd54 │ │ + cmp r1, #32 │ │ + vqrdmulh.s q11, q6, d16[0] │ │ movs r0, r1 │ │ - strb r6, [r5, #21] │ │ + strb r6, [r5, #13] │ │ movs r0, r1 │ │ - strb r4, [r7, #21] │ │ + strb r4, [r7, #13] │ │ movs r0, r1 │ │ - cmp r2, #32 │ │ - vcvt.f32.u32 q11, q15, #4 │ │ + cmp r0, #16 │ │ + vcvt.f16.u16 q11, q15, #4 │ │ movs r0, r1 │ │ - strb r0, [r4, #21] │ │ + strb r0, [r4, #13] │ │ movs r0, r1 │ │ - strb r2, [r2, #21] │ │ + strb r2, [r2, #13] │ │ movs r0, r1 │ │ - strb r4, [r0, #22] │ │ + strb r4, [r0, #14] │ │ movs r0, r1 │ │ - strb r6, [r1, #22] │ │ + strb r6, [r1, #14] │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #212 @ 0xd4 │ │ mov sl, r1 │ │ ldrd r3, r1, [r1, #92] @ 0x5c │ │ add.w r7, r1, r1, lsl #1 │ │ mov r4, r2 │ │ mov fp, r0 │ │ ldrd r2, r0, [sp, #248] @ 0xf8 │ │ movs r5, #11 │ │ add.w r1, r3, r7, lsl #4 │ │ add.w r8, r3, #8 │ │ lsls r3, r7, #4 │ │ movt r5, #32768 @ 0x8000 │ │ - cbz r3, 53c3c │ │ + cbz r3, 53e4c │ │ ldrd r7, r6, [r8], #48 @ 0x30 │ │ subs r3, #48 @ 0x30 │ │ eors r6, r0 │ │ eors r7, r2 │ │ orrs r7, r6 │ │ - bne.n 53be4 │ │ + bne.n 53df4 │ │ add.w r9, sp, #96 @ 0x60 │ │ str r5, [sp, #96] @ 0x60 │ │ mov r0, r9 │ │ - bl 31e14 │ │ + bl 31ee0 │ │ ldrd r0, r1, [sl, #48] @ 0x30 │ │ ldrd r2, r3, [r4, #8] │ │ eors r1, r3 │ │ eors r0, r2 │ │ orrs r0, r1 │ │ - bne.n 53c4c │ │ + bne.n 53e5c │ │ ldr r0, [r4, #64] @ 0x40 │ │ cmp r0, #0 │ │ - bne.w 53ebc │ │ + bne.w 540cc │ │ mov r1, r4 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ ldr.w r2, [r1, #68]! │ │ ldrd r3, r7, [r1, #4] │ │ cmp.w r2, #2147483648 @ 0x80000000 │ │ str r0, [r1, #0] │ │ - bne.n 53c5a │ │ + bne.n 53e6a │ │ movs r0, #1 │ │ subs r1, r5, #2 │ │ strd r0, r1, [fp] │ │ add sp, #212 @ 0xd4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #1 │ │ str.w r1, [fp, #8] │ │ @@ -65427,41 +65523,41 @@ │ │ add r4, sp, #160 @ 0xa0 │ │ strd r0, r1, [sp, #168] @ 0xa8 │ │ movw r1, #909 @ 0x38d │ │ strd r3, r2, [sp, #20] │ │ strd r0, r0, [sp, #160] @ 0xa0 │ │ strd r0, r0, [sp, #176] @ 0xb0 │ │ strd r0, r1, [sp, #184] @ 0xb8 │ │ - b.n 53c84 │ │ + b.n 53e94 │ │ lsrs r0, r2, #2 │ │ - bne.n 53cc2 │ │ + bne.n 53ed2 │ │ mov r0, r4 │ │ - bl 481dc │ │ + bl 484e4 │ │ ldr r0, [sp, #180] @ 0xb4 │ │ cmp r0, #0 │ │ - beq.n 53c84 │ │ + beq.n 53e94 │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r6, #1 │ │ movs r5, #0 │ │ - b.n 53caa │ │ + b.n 53eba │ │ umull r2, r7, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r7, r3, r5, r7 │ │ mla r5, r3, r5, r7 │ │ mov r3, r2 │ │ lsls r2, r0, #31 │ │ - beq.n 53c9a │ │ + beq.n 53eaa │ │ umull r2, r7, r3, r6 │ │ cmp r0, #1 │ │ - beq.n 53c80 │ │ + beq.n 53e90 │ │ mla r1, r3, r1, r7 │ │ mla r1, r5, r6, r1 │ │ mov r6, r2 │ │ - b.n 53c9a │ │ + b.n 53eaa │ │ ldmia r4!, {r1, r2, r3, r7} │ │ add.w r0, r9, #4 │ │ add r5, sp, #32 │ │ stmia r0!, {r1, r2, r3, r7} │ │ ldmia.w r4, {r1, r2, r3, r7} │ │ stmia r0!, {r1, r2, r3, r7} │ │ ldr r0, [sp, #16] │ │ @@ -65482,370 +65578,370 @@ │ │ stmia r0!, {r1, r2, r3, r6, r7} │ │ ldrb.w r2, [r8, #-52] │ │ ldr.w r1, [r8, #-56] │ │ ldrd r3, r0, [sp, #256] @ 0x100 │ │ strd r3, r0, [sp] │ │ mov r0, r9 │ │ mov r3, r5 │ │ - bl 53f08 │ │ + bl 54118 │ │ ldr r0, [sp, #96] @ 0x60 │ │ cmp r0, #1 │ │ - bne.n 53d2c │ │ + bne.n 53f3c │ │ add r3, sp, #100 @ 0x64 │ │ movs r7, #1 │ │ ldmia r3, {r0, r1, r2, r3} │ │ strd r7, r0, [fp] │ │ add.w r0, fp, #8 │ │ stmia r0!, {r1, r2, r3} │ │ - b.n 53e5a │ │ + b.n 5406a │ │ ldr r0, [sp, #104] @ 0x68 │ │ lsls r0, r0, #31 │ │ - beq.n 53d5a │ │ + beq.n 53f6a │ │ ldr.w r2, [sl, #32] │ │ add r0, sp, #96 @ 0x60 │ │ add r1, sp, #32 │ │ ldrd r8, r6, [sp, #112] @ 0x70 │ │ - bl 49d00 │ │ + bl 4a008 │ │ add r7, sp, #96 @ 0x60 │ │ add.w ip, sp, #192 @ 0xc0 │ │ ldmia r7, {r0, r1, r2, r3, r7} │ │ cmp r0, #2 │ │ stmia.w ip, {r1, r2, r3, r7} │ │ - bne.n 53d66 │ │ + bne.n 53f76 │ │ add r3, sp, #192 @ 0xc0 │ │ movs r7, #1 │ │ add r5, sp, #32 │ │ - b.n 53d1e │ │ + b.n 53f2e │ │ movs r0, #0 │ │ str.w r0, [fp] │ │ str.w r0, [fp, #16] │ │ - b.n 53e5a │ │ + b.n 5406a │ │ add r7, sp, #192 @ 0xc0 │ │ ldr r4, [sp, #116] @ 0x74 │ │ add.w ip, sp, #160 @ 0xa0 │ │ str r4, [sp, #180] @ 0xb4 │ │ ldmia r7, {r1, r2, r3, r7} │ │ stmia.w ip, {r0, r1, r2, r3, r7} │ │ lsls r0, r0, #31 │ │ - beq.w 53ecc │ │ + beq.w 540dc │ │ movs r0, #8 │ │ movs r4, #8 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 53ee2 │ │ + beq.w 540f2 │ │ eor.w r2, r6, #2147483648 @ 0x80000000 │ │ str r2, [r0, #4] │ │ movs r2, #0 │ │ ldr r1, [sp, #164] @ 0xa4 │ │ strd r4, r2, [sp] │ │ add r2, sp, #96 @ 0x60 │ │ mov r4, r0 │ │ str.w r8, [r0] │ │ mov r0, r2 │ │ movs r2, #16 │ │ mov r3, r4 │ │ - bl 49e28 │ │ + bl 4a130 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrd r0, r4, [sp, #96] @ 0x60 │ │ cmp r0, #1 │ │ - bne.n 53dc0 │ │ + bne.n 53fd0 │ │ ldrd r0, r7, [sp, #104] @ 0x68 │ │ ldr r1, [sp, #112] @ 0x70 │ │ - b.n 53e36 │ │ + b.n 54046 │ │ movs r0, #19 │ │ str r6, [sp, #24] │ │ ldrd r5, sl, [sp, #108] @ 0x6c │ │ movs r6, #19 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 53eea │ │ - ldr r1, [pc, #284] @ (53ef4 ) │ │ + beq.w 540fa │ │ + ldr r1, [pc, #284] @ (54104 ) │ │ movs r2, #19 │ │ mov r7, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #11 │ │ str r6, [sp, #108] @ 0x6c │ │ movt r0, #32768 @ 0x8000 │ │ adds r1, r0, #2 │ │ strd r6, r7, [sp, #100] @ 0x64 │ │ str r1, [sp, #96] @ 0x60 │ │ - cbz r4, 53e30 │ │ + cbz r4, 54040 │ │ add r0, sp, #96 @ 0x60 │ │ - bl 31e14 │ │ + bl 31ee0 │ │ cmp.w sl, #1 │ │ - bls.n 53ed4 │ │ + bls.n 540e4 │ │ movs r0, #0 │ │ ldr r1, [sp, #24] │ │ str.w r0, [fp] │ │ add.w r2, fp, #12 │ │ ldrh r0, [r5, #0] │ │ str.w r0, [fp, #24] │ │ add r0, sp, #160 @ 0xa0 │ │ str.w r8, [fp, #8] │ │ stmia.w r2, {r1, r5, sl} │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #160] @ 0xa0 │ │ ldr r4, [sp, #28] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #164] @ 0xa4 │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ add r5, sp, #32 │ │ - b.n 53e5a │ │ + b.n 5406a │ │ mov r4, r1 │ │ movs r0, #19 │ │ movs r1, #19 │ │ strd r0, r7, [fp, #8] │ │ add r0, sp, #160 @ 0xa0 │ │ movs r2, #1 │ │ str.w r1, [fp, #16] │ │ strd r2, r4, [fp] │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #160] @ 0xa0 │ │ add r5, sp, #32 │ │ ldr r4, [sp, #28] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #164] @ 0xa4 │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ ldr r0, [r4, #64] @ 0x40 │ │ - cbnz r0, 53ec4 │ │ + cbnz r0, 540d4 │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ mov sl, r4 │ │ str r0, [r4, #64] @ 0x40 │ │ mov r0, r9 │ │ ldmia r5!, {r1, r2, r3, r4, r7} │ │ stmia r0!, {r1, r2, r3, r4, r7} │ │ ldmia r5!, {r1, r2, r3, r4, r7} │ │ stmia r0!, {r1, r2, r3, r4, r7} │ │ ldmia.w r5, {r1, r2, r3, r4, r6, r7} │ │ stmia r0!, {r1, r2, r3, r4, r6, r7} │ │ add r0, sp, #160 @ 0xa0 │ │ mov r1, r9 │ │ - bl 4b6b4 │ │ + bl 4b9bc │ │ add r2, sp, #160 @ 0xa0 │ │ ldrd r4, r8, [sl, #68] @ 0x44 │ │ ldr.w r6, [sl, #76] @ 0x4c │ │ ldmia r2, {r0, r1, r2} │ │ cmp.w r4, #2147483648 @ 0x80000000 │ │ ldr r3, [sp, #12] │ │ stmia r3!, {r0, r1, r2} │ │ - beq.n 53eae │ │ - cbz r6, 53ea4 │ │ + beq.n 540be │ │ + cbz r6, 540b4 │ │ mov r7, r8 │ │ ldr.w r0, [r7], #4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r6, #1 │ │ - bne.n 53e98 │ │ + bne.n 540a8 │ │ cmp r4, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r1, [sp, #28] │ │ ldr r0, [r1, #64] @ 0x40 │ │ adds r0, #1 │ │ str r0, [r1, #64] @ 0x40 │ │ add sp, #212 @ 0xd4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #60] @ (53efc ) │ │ + ldr r0, [pc, #60] @ (5410c ) │ │ add r0, pc │ │ - bl 4132c │ │ - ldr r0, [pc, #48] @ (53ef8 ) │ │ + bl 41634 │ │ + ldr r0, [pc, #48] @ (54108 ) │ │ add r0, pc │ │ - bl 4132c │ │ - ldr r0, [pc, #48] @ (53f00 ) │ │ + bl 41634 │ │ + ldr r0, [pc, #48] @ (54110 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r3, [pc, #44] @ (53f04 ) │ │ + bl 3fd40 │ │ + ldr r3, [pc, #44] @ (54114 ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ mov r2, sl │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ movs r0, #1 │ │ movs r1, #8 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #19 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - cmp r3, #194 @ 0xc2 │ │ - vqrdmulh.s q11, q14, d22[0] │ │ + cmp r1, #178 @ 0xb2 │ │ + vtbx.8 d22, {d28-d31}, d22 │ │ movs r0, r1 │ │ - ldr r6, [r3, #92] @ 0x5c │ │ + ldr r6, [r3, #60] @ 0x3c │ │ movs r0, r1 │ │ - ldr r6, [r7, #68] @ 0x44 │ │ + ldr r6, [r7, #36] @ 0x24 │ │ movs r0, r1 │ │ - ldr r0, [r2, #52] @ 0x34 │ │ + ldr r0, [r2, #20] │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #68 @ 0x44 │ │ mov r4, r0 │ │ add r0, sp, #40 @ 0x28 │ │ mov r2, r1 │ │ mov r1, r3 │ │ - bl 49d00 │ │ + bl 4a008 │ │ add r7, sp, #40 @ 0x28 │ │ ldrd r6, sl, [sp, #52] @ 0x34 │ │ movs r1, #17 │ │ ldmia r7, {r0, r5, r7} │ │ movt r1, #32768 @ 0x8000 │ │ cmp r0, #2 │ │ - bne.n 53f4e │ │ + bne.n 5415e │ │ mov.w r9, r7, lsr #8 │ │ mov.w fp, #0 │ │ mov.w r8, #0 │ │ cmp r5, r1 │ │ - bne.n 53fe4 │ │ + bne.n 541f4 │ │ strd r0, r2, [r4, #16] │ │ movs r0, #0 │ │ strd fp, r8, [r4, #8] │ │ str r0, [r4, #0] │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r1, [sp, #60] @ 0x3c │ │ str r1, [sp, #36] @ 0x24 │ │ add r1, sp, #16 │ │ stmia r1!, {r0, r5, r7} │ │ lsls r0, r0, #31 │ │ strd r6, sl, [sp, #28] │ │ - beq.n 54020 │ │ + beq.n 54230 │ │ ldrd r9, r8, [sp, #104] @ 0x68 │ │ movs r0, #0 │ │ mov r1, r5 │ │ movs r2, #17 │ │ strd r8, r0, [sp] │ │ add r0, sp, #40 @ 0x28 │ │ mov r3, r9 │ │ - bl 49e28 │ │ + bl 4a130 │ │ add r7, sp, #40 @ 0x28 │ │ ldrd r6, sl, [sp, #52] @ 0x34 │ │ ldmia r7, {r0, r5, r7} │ │ - cbz r0, 53f88 │ │ + cbz r0, 54198 │ │ mov.w r9, r7, lsr #8 │ │ mov.w fp, #0 │ │ - b.n 53fc0 │ │ + b.n 541d0 │ │ mov.w fp, #0 │ │ - cbz r5, 53fb8 │ │ + cbz r5, 541c8 │ │ mov r2, r8 │ │ mov r0, r9 │ │ mov r1, r5 │ │ cmp r7, r8 │ │ it cc │ │ movcc r2, r7 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r8, r7 │ │ mov.w r1, #0 │ │ it cc │ │ movcc r1, #1 │ │ cmp r0, #0 │ │ mov.w r0, #0 │ │ it mi │ │ movmi r0, #1 │ │ it eq │ │ moveq r0, r1 │ │ - cbz r0, 54000 │ │ + cbz r0, 54210 │ │ movs r5, #17 │ │ movs r7, #1 │ │ movt r5, #32768 @ 0x8000 │ │ add r0, sp, #16 │ │ mov.w r8, #0 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #16] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #20] │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ ldrd r2, r0, [sp, #8] │ │ movs r1, #17 │ │ movt r1, #32768 @ 0x8000 │ │ cmp r5, r1 │ │ - beq.n 53f3c │ │ + beq.n 5414c │ │ mov.w r0, r9, lsr #16 │ │ strh.w r9, [r4, #9] │ │ strb r0, [r4, #11] │ │ movs r0, #1 │ │ strd r6, sl, [r4, #12] │ │ strb r7, [r4, #8] │ │ str r5, [r4, #4] │ │ str r0, [r4, #0] │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r5, #17 │ │ cmp.w sl, #8 │ │ movt r5, #32768 @ 0x8000 │ │ - bne.n 54028 │ │ + bne.n 54238 │ │ ldr r0, [r6, #0] │ │ movs r7, #0 │ │ str r0, [sp, #12] │ │ mov.w fp, #1 │ │ ldr r0, [r6, #4] │ │ eor.w r0, r0, #2147483648 @ 0x80000000 │ │ str r0, [sp, #8] │ │ - b.n 53fc0 │ │ - ldr r0, [pc, #28] @ (54040 ) │ │ + b.n 541d0 │ │ + ldr r0, [pc, #28] @ (54250 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #24] @ (54044 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #24] @ (54254 ) │ │ add r2, sp, #40 @ 0x28 │ │ - ldr r3, [pc, #24] @ (54048 ) │ │ - ldr r1, [pc, #28] @ (5404c ) │ │ + ldr r3, [pc, #24] @ (54258 ) │ │ + ldr r1, [pc, #28] @ (5425c ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ nop │ │ - ldr r2, [r5, #48] @ 0x30 │ │ + ldr r2, [r5, #16] │ │ movs r0, r1 │ │ - strb r3, [r2, r1] │ │ - vqshrn.u64 d22, q5, #4 │ │ + strh r3, [r0, r1] │ │ + vpadal.u q11, q13 │ │ movs r0, r1 │ │ - ldr r0, [r7, #32] │ │ + ldr r0, [r7, #0] │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #276 @ 0x114 │ │ mov r8, r1 │ │ ldrd r3, r1, [r1, #92] @ 0x5c │ │ add.w r7, r1, r1, lsl #1 │ │ mov r4, r2 │ │ mov sl, r0 │ │ ldrd r2, r0, [sp, #312] @ 0x138 │ │ add.w r1, r3, r7, lsl #4 │ │ add.w fp, r3, #8 │ │ lsls r3, r7, #4 │ │ - cbz r3, 540c6 │ │ + cbz r3, 542d6 │ │ ldrd r7, r6, [fp], #48 @ 0x30 │ │ subs r3, #48 @ 0x30 │ │ eors r6, r0 │ │ eors r7, r2 │ │ orrs r7, r6 │ │ - bne.n 54072 │ │ + bne.n 54282 │ │ movs r5, #17 │ │ add.w r9, sp, #176 @ 0xb0 │ │ movt r5, #32768 @ 0x8000 │ │ subs r0, r5, #6 │ │ str r0, [sp, #176] @ 0xb0 │ │ mov r0, r9 │ │ - bl 31e14 │ │ + bl 31ee0 │ │ ldrb.w r0, [fp, #-14] │ │ - cbz r0, 540d8 │ │ + cbz r0, 542e8 │ │ movs r0, #33 @ 0x21 │ │ movs r6, #33 @ 0x21 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 543c8 │ │ - ldr r1, [pc, #804] @ (543d0 ) │ │ + beq.w 545d8 │ │ + ldr r1, [pc, #804] @ (545e0 ) │ │ movs r2, #33 @ 0x21 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ subs r0, r5, #7 │ │ strd r0, r6, [sl] │ │ strd r4, r6, [sl, #8] │ │ add sp, #276 @ 0x114 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ @@ -65854,28 +65950,28 @@ │ │ add sp, #276 @ 0x114 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd r0, r1, [r8, #48] @ 0x30 │ │ ldrd r2, r3, [r4, #8] │ │ eors r1, r3 │ │ eors r0, r2 │ │ orrs r0, r1 │ │ - bne.n 54120 │ │ + bne.n 54330 │ │ ldrb.w r0, [r4, #80] @ 0x50 │ │ - cbz r0, 5412c │ │ + cbz r0, 5433c │ │ ldr r0, [r4, #64] @ 0x40 │ │ cmp r0, #0 │ │ - bne.w 543b0 │ │ + bne.w 545c0 │ │ mov r1, r4 │ │ ldrd r3, r2, [fp, #-24] │ │ ldr.w r7, [r1, #68]! │ │ mov.w ip, #2147483648 @ 0x80000000 │ │ ldrd r6, r0, [r1, #4] │ │ cmp.w r7, #2147483648 @ 0x80000000 │ │ str.w ip, [r1] │ │ - bne.n 5413a │ │ + bne.n 5434a │ │ sub.w r0, r5, #8 │ │ str.w r0, [sl] │ │ add sp, #276 @ 0x114 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ subs r0, r5, #1 │ │ str.w r0, [sl] │ │ add sp, #276 @ 0x114 │ │ @@ -65885,15 +65981,15 @@ │ │ add sp, #276 @ 0x114 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ strd r1, r0, [sp, #28] │ │ ldr r0, [r4, #16] │ │ strd r6, r7, [sp, #36] @ 0x24 │ │ cmp r0, #0 │ │ strd r3, r2, [sp, #44] @ 0x2c │ │ - bne.w 543b0 │ │ + bne.w 545c0 │ │ add.w r1, r4, #24 │ │ str r5, [sp, #20] │ │ str r1, [sp, #24] │ │ add r0, sp, #56 @ 0x38 │ │ ldmia r1!, {r2, r3, r5, r6, r7} │ │ stmia r0!, {r2, r3, r5, r6, r7} │ │ ldmia.w r1, {r2, r3, r5, r6, r7} │ │ @@ -65905,41 +66001,41 @@ │ │ str r4, [sp, #52] @ 0x34 │ │ add r4, sp, #240 @ 0xf0 │ │ strd r0, r1, [sp, #248] @ 0xf8 │ │ movw r1, #909 @ 0x38d │ │ strd r0, r0, [sp, #240] @ 0xf0 │ │ strd r0, r0, [sp, #256] @ 0x100 │ │ strd r0, r1, [sp, #264] @ 0x108 │ │ - b.n 5418a │ │ + b.n 5439a │ │ lsrs r0, r2, #2 │ │ - bne.n 541c8 │ │ + bne.n 543d8 │ │ mov r0, r4 │ │ - bl 481dc │ │ + bl 484e4 │ │ ldr r0, [sp, #260] @ 0x104 │ │ cmp r0, #0 │ │ - beq.n 5418a │ │ + beq.n 5439a │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r6, #1 │ │ movs r7, #0 │ │ - b.n 541b0 │ │ + b.n 543c0 │ │ umull r2, r5, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r5, r3, r7, r5 │ │ mla r7, r3, r7, r5 │ │ mov r3, r2 │ │ lsls r2, r0, #31 │ │ - beq.n 541a0 │ │ + beq.n 543b0 │ │ umull r2, r5, r3, r6 │ │ cmp r0, #1 │ │ - beq.n 54186 │ │ + beq.n 54396 │ │ mla r1, r3, r1, r5 │ │ mla r1, r7, r6, r1 │ │ mov r6, r2 │ │ - b.n 541a0 │ │ + b.n 543b0 │ │ ldmia r4!, {r1, r2, r3, r7} │ │ add.w r0, r9, #4 │ │ stmia r0!, {r1, r2, r3, r7} │ │ ldmia.w r4, {r1, r2, r3, r7} │ │ add r4, sp, #96 @ 0x60 │ │ ldr r5, [sp, #320] @ 0x140 │ │ stmia r0!, {r1, r2, r3, r7} │ │ @@ -65958,125 +66054,125 @@ │ │ stmia r0!, {r1, r2, r3, r7} │ │ ldmia.w r9, {r1, r2, r3, r6, r7} │ │ stmia r0!, {r1, r2, r3, r6, r7} │ │ add r0, sp, #240 @ 0xf0 │ │ mov r3, r5 │ │ ldrd r1, r2, [sp, #44] @ 0x2c │ │ ldr r7, [sp, #64] @ 0x40 │ │ - bl 4e950 │ │ + bl 4eb60 │ │ ldrb.w r2, [fp, #-52] │ │ mov r3, r4 │ │ ldr.w r1, [fp, #-56] │ │ add.w fp, sp, #176 @ 0xb0 │ │ ldrd r6, r0, [sp, #244] @ 0xf4 │ │ strd r6, r0, [sp] │ │ mov r0, fp │ │ - bl 53f08 │ │ + bl 54118 │ │ ldrd r1, r0, [sp, #184] @ 0xb8 │ │ ldr r2, [sp, #176] @ 0xb0 │ │ cmp r2, #1 │ │ - bne.n 54244 │ │ + bne.n 54454 │ │ ldr r2, [sp, #192] @ 0xc0 │ │ ldr.w r8, [sp, #180] @ 0xb4 │ │ strd r8, r1, [sl] │ │ strd r0, r2, [sl, #8] │ │ - b.n 542ae │ │ + b.n 544be │ │ ldrd r2, r3, [sp, #192] @ 0xc0 │ │ add.w r9, sp, #176 @ 0xb0 │ │ strd r1, r0, [sp] │ │ add r0, sp, #8 │ │ stmia r0!, {r2, r3, r5} │ │ subs.w r3, r7, #2147483648 @ 0x80000000 │ │ add r7, sp, #96 @ 0x60 │ │ add r0, sp, #56 @ 0x38 │ │ it ne │ │ movne r3, r0 │ │ mov r0, r9 │ │ mov r1, r8 │ │ mov r2, r7 │ │ - bl 4d438 │ │ + bl 4d740 │ │ ldr r0, [sp, #176] @ 0xb0 │ │ movs r1, #17 │ │ movt r1, #32768 @ 0x8000 │ │ cmp r0, r1 │ │ - bne.n 542a4 │ │ + bne.n 544b4 │ │ ldr.w r8, [sp, #20] │ │ ldr r2, [sp, #240] @ 0xf0 │ │ ldrd r0, r1, [sp, #184] @ 0xb8 │ │ strd r0, r1, [sl, #8] │ │ str.w r8, [sl] │ │ - cbnz r2, 542b2 │ │ + cbnz r2, 544c2 │ │ ldmia r7!, {r1, r2, r3, r5, r6} │ │ mov r0, r9 │ │ stmia r0!, {r1, r2, r3, r5, r6} │ │ ldmia r7!, {r1, r2, r3, r5, r6} │ │ stmia r0!, {r1, r2, r3, r5, r6} │ │ ldmia.w r7, {r1, r2, r3, r4, r5, r6} │ │ stmia r0!, {r1, r2, r3, r4, r5, r6} │ │ add r0, sp, #160 @ 0xa0 │ │ mov r1, r9 │ │ - bl 4b6b4 │ │ - b.n 542da │ │ + bl 4b9bc │ │ + b.n 544ea │ │ add r3, sp, #180 @ 0xb4 │ │ mov r8, r0 │ │ ldmia r3, {r1, r2, r3} │ │ stmia.w sl, {r0, r1, r2, r3} │ │ ldr r0, [sp, #240] @ 0xf0 │ │ - cbz r0, 542b8 │ │ + cbz r0, 544c8 │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldmia r4!, {r1, r2, r3, r6, r7} │ │ mov r0, fp │ │ stmia r0!, {r1, r2, r3, r6, r7} │ │ ldmia r4!, {r1, r2, r3, r6, r7} │ │ stmia r0!, {r1, r2, r3, r6, r7} │ │ ldmia.w r4, {r1, r2, r3, r5, r6, r7} │ │ stmia r0!, {r1, r2, r3, r5, r6, r7} │ │ add r0, sp, #160 @ 0xa0 │ │ mov r1, fp │ │ - bl 4b6b4 │ │ + bl 4b9bc │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r8, r0 │ │ - bne.n 54368 │ │ + bne.n 54578 │ │ ldr r3, [sp, #52] @ 0x34 │ │ ldr r0, [r3, #64] @ 0x40 │ │ cmp r0, #0 │ │ - bne.n 543b8 │ │ + bne.n 545c8 │ │ add r2, sp, #160 @ 0xa0 │ │ ldr r5, [r3, #68] @ 0x44 │ │ mov r7, r3 │ │ ldrd r4, r6, [r3, #72] @ 0x48 │ │ mov.w r3, #4294967295 @ 0xffffffff │ │ ldmia r2, {r0, r1, r2} │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ str r3, [r7, #64] @ 0x40 │ │ ldr r3, [sp, #28] │ │ stmia r3!, {r0, r1, r2} │ │ - beq.n 54318 │ │ - cbz r6, 5430e │ │ + beq.n 54528 │ │ + cbz r6, 5451e │ │ mov r7, r4 │ │ ldr.w r0, [r7], #4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r6, #1 │ │ - bne.n 54302 │ │ + bne.n 54512 │ │ cmp r5, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r4, [sp, #52] @ 0x34 │ │ ldr r1, [sp, #64] @ 0x40 │ │ ldr r0, [r4, #64] @ 0x40 │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ add.w r0, r0, #1 │ │ str r0, [r4, #64] @ 0x40 │ │ - beq.w 540c0 │ │ + beq.w 542d0 │ │ ldr r0, [r4, #16] │ │ cmp r0, #0 │ │ - bne.n 543c0 │ │ + bne.n 545d0 │ │ ldr r5, [sp, #24] │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ str r0, [r4, #16] │ │ mov r0, r5 │ │ ldmia r0!, {r1, r2, r3, r6, r7} │ │ stmia.w fp!, {r1, r2, r3, r6, r7} │ │ ldmia.w r0, {r1, r2, r3, r6, r7} │ │ @@ -66084,126 +66180,126 @@ │ │ add r6, sp, #56 @ 0x38 │ │ ldmia r6!, {r0, r1, r2, r3, r7} │ │ stmia r5!, {r0, r1, r2, r3, r7} │ │ ldmia.w r6, {r0, r1, r2, r3, r7} │ │ stmia r5!, {r0, r1, r2, r3, r7} │ │ ldr r0, [sp, #184] @ 0xb8 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.n 5439e │ │ + bne.n 545ae │ │ movs r0, #0 │ │ str r0, [r4, #16] │ │ add sp, #276 @ 0x114 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd r4, r5, [sp, #164] @ 0xa4 │ │ - cbz r5, 5437c │ │ + cbz r5, 5458c │ │ mov r6, r4 │ │ ldr.w r0, [r6], #4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r5, #1 │ │ - bne.n 54370 │ │ + bne.n 54580 │ │ ldr r0, [sp, #160] @ 0xa0 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #64] @ 0x40 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 540c0 │ │ + beq.w 542d0 │ │ add r0, sp, #56 @ 0x38 │ │ - bl 4b7a0 │ │ + bl 4baa8 │ │ add sp, #276 @ 0x114 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add r0, sp, #176 @ 0xb0 │ │ - bl 4b7a0 │ │ + bl 4baa8 │ │ ldr r0, [r4, #16] │ │ adds r0, #1 │ │ str r0, [r4, #16] │ │ add sp, #276 @ 0x114 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #32] @ (543d4 ) │ │ + ldr r0, [pc, #32] @ (545e4 ) │ │ add r0, pc │ │ - bl 4132c │ │ - ldr r0, [pc, #28] @ (543d8 ) │ │ + bl 41634 │ │ + ldr r0, [pc, #28] @ (545e8 ) │ │ add r0, pc │ │ - bl 4132c │ │ - ldr r0, [pc, #24] @ (543dc ) │ │ + bl 41634 │ │ + ldr r0, [pc, #24] @ (545ec ) │ │ add r0, pc │ │ - bl 4132c │ │ + bl 41634 │ │ movs r0, #1 │ │ movs r1, #33 @ 0x21 │ │ - bl 3dfa4 │ │ - cmp r1, #4 │ │ - vtbx.8 d22, {d28}, d26 │ │ + bl 3e2ac │ │ + movs r6, #244 @ 0xf4 │ │ + vpadal.u q11, q13 │ │ movs r0, r1 │ │ - ldr r2, [r2, #16] │ │ + str r2, [r2, #112] @ 0x70 │ │ movs r0, r1 │ │ - ldr r2, [r7, #12] │ │ + str r2, [r7, #108] @ 0x6c │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #244 @ 0xf4 │ │ mov r4, r2 │ │ ldrd r3, r2, [r1, #92] @ 0x5c │ │ add.w r7, r2, r2, lsl #1 │ │ mov r9, r1 │ │ mov sl, r0 │ │ ldrd r1, r0, [sp, #280] @ 0x118 │ │ add.w r2, r3, r7, lsl #4 │ │ add.w fp, r3, #8 │ │ lsls r3, r7, #4 │ │ - cbz r3, 54460 │ │ + cbz r3, 54670 │ │ ldrd r7, r6, [fp], #48 @ 0x30 │ │ subs r3, #48 @ 0x30 │ │ eors r6, r0 │ │ eors r7, r1 │ │ orrs r7, r6 │ │ - bne.n 54402 │ │ + bne.n 54612 │ │ movs r5, #17 │ │ add.w r8, sp, #144 @ 0x90 │ │ movt r5, #32768 @ 0x8000 │ │ subs r0, r5, #6 │ │ str r0, [sp, #144] @ 0x90 │ │ mov r0, r8 │ │ - bl 31e14 │ │ + bl 31ee0 │ │ ldrd r0, r1, [r9, #48] @ 0x30 │ │ ldrd r2, r3, [r4, #8] │ │ eors r1, r3 │ │ eors r0, r2 │ │ orrs r0, r1 │ │ - bne.n 54472 │ │ + bne.n 54682 │ │ ldrb.w r0, [r4, #80] @ 0x50 │ │ - cbz r0, 54476 │ │ + cbz r0, 54686 │ │ ldr r0, [r4, #64] @ 0x40 │ │ cmp r0, #0 │ │ - bne.w 5470c │ │ + bne.w 5491c │ │ mov r1, r4 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ ldr.w r2, [r1, #68]! │ │ ldrd r3, r7, [r1, #4] │ │ cmp.w r2, #2147483648 @ 0x80000000 │ │ str r0, [r1, #0] │ │ - bne.n 54484 │ │ + bne.n 54694 │ │ sub.w r0, r5, #8 │ │ - b.n 5447a │ │ + b.n 5468a │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ subs r0, #6 │ │ strd r0, r2, [sl] │ │ add sp, #244 @ 0xf4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ subs r0, r5, #1 │ │ - b.n 5447a │ │ + b.n 5468a │ │ sub.w r0, r5, #12 │ │ str.w r0, [sl] │ │ add sp, #244 @ 0xf4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r0, [r4, #16] │ │ strd r3, r2, [sp, #28] │ │ cmp r0, #0 │ │ strd r1, r7, [sp, #20] │ │ - bne.w 5470c │ │ + bne.w 5491c │ │ add.w r0, r4, #24 │ │ str r0, [sp, #16] │ │ add r1, sp, #40 @ 0x28 │ │ ldmia r0!, {r2, r3, r5, r6, r7} │ │ stmia r1!, {r2, r3, r5, r6, r7} │ │ ldmia.w r0, {r2, r3, r5, r6, r7} │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ @@ -66214,41 +66310,41 @@ │ │ str r4, [sp, #36] @ 0x24 │ │ add r4, sp, #208 @ 0xd0 │ │ strd r0, r1, [sp, #216] @ 0xd8 │ │ movw r1, #909 @ 0x38d │ │ strd r0, r0, [sp, #208] @ 0xd0 │ │ strd r0, r0, [sp, #224] @ 0xe0 │ │ strd r0, r1, [sp, #232] @ 0xe8 │ │ - b.n 544ce │ │ + b.n 546de │ │ lsrs r0, r2, #2 │ │ - bne.n 5450c │ │ + bne.n 5471c │ │ mov r0, r4 │ │ - bl 481dc │ │ + bl 484e4 │ │ ldr r0, [sp, #228] @ 0xe4 │ │ cmp r0, #0 │ │ - beq.n 544ce │ │ + beq.n 546de │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r7, #1 │ │ movs r5, #0 │ │ - b.n 544f4 │ │ + b.n 54704 │ │ umull r2, r6, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r6, r3, r5, r6 │ │ mla r5, r3, r5, r6 │ │ mov r3, r2 │ │ lsls r2, r0, #31 │ │ - beq.n 544e4 │ │ + beq.n 546f4 │ │ umull r2, r6, r3, r7 │ │ cmp r0, #1 │ │ - beq.n 544ca │ │ + beq.n 546da │ │ mla r1, r3, r1, r6 │ │ mla r1, r5, r7, r1 │ │ mov r7, r2 │ │ - b.n 544e4 │ │ + b.n 546f4 │ │ ldmia r4!, {r1, r2, r3, r7} │ │ add.w r0, r8, #4 │ │ add r5, sp, #80 @ 0x50 │ │ stmia r0!, {r1, r2, r3, r7} │ │ ldmia.w r4, {r1, r2, r3, r7} │ │ stmia r0!, {r1, r2, r3, r7} │ │ ldr r0, [sp, #24] │ │ @@ -66270,110 +66366,110 @@ │ │ ldr.w r1, [fp, #-56] │ │ add.w fp, sp, #144 @ 0x90 │ │ ldrd r3, r0, [sp, #288] @ 0x120 │ │ strd r3, r0, [sp] │ │ mov r0, fp │ │ mov r3, r5 │ │ ldr r4, [sp, #48] @ 0x30 │ │ - bl 53f08 │ │ + bl 54118 │ │ ldr r1, [sp, #144] @ 0x90 │ │ subs.w r0, r4, #2147483648 @ 0x80000000 │ │ add r2, sp, #40 @ 0x28 │ │ it ne │ │ movne r0, r2 │ │ cmp r1, #1 │ │ - bne.n 545a4 │ │ + bne.n 547b4 │ │ ldrd r8, r0, [sp, #148] @ 0x94 │ │ ldrd r1, r2, [sp, #156] @ 0x9c │ │ strd r8, r0, [sl] │ │ mov r0, fp │ │ strd r1, r2, [sl, #8] │ │ ldmia r5!, {r1, r2, r3, r6, r7} │ │ stmia r0!, {r1, r2, r3, r6, r7} │ │ ldmia r5!, {r1, r2, r3, r6, r7} │ │ stmia r0!, {r1, r2, r3, r6, r7} │ │ ldmia.w r5, {r1, r2, r3, r4, r6, r7} │ │ stmia r0!, {r1, r2, r3, r4, r6, r7} │ │ add r0, sp, #208 @ 0xd0 │ │ mov r1, fp │ │ - bl 4b6b4 │ │ + bl 4b9bc │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r8, r0 │ │ - beq.n 545fe │ │ - b.n 546d6 │ │ + beq.n 5480e │ │ + b.n 548e6 │ │ ldr r1, [sp, #152] @ 0x98 │ │ lsls r1, r1, #31 │ │ - beq.n 545d6 │ │ + beq.n 547e6 │ │ add.w r8, sp, #144 @ 0x90 │ │ add r4, sp, #80 @ 0x50 │ │ ldrd r1, r2, [sp, #160] @ 0xa0 │ │ movs r3, #1 │ │ strd r1, r2, [sp, #8] │ │ mov r1, r9 │ │ str r0, [sp, #0] │ │ mov r0, r8 │ │ mov r2, r4 │ │ - bl 4e084 │ │ + bl 4e294 │ │ ldr r0, [sp, #144] @ 0x90 │ │ movs r1, #17 │ │ movt r1, #32768 @ 0x8000 │ │ cmp r0, r1 │ │ - bne.n 5469c │ │ + bne.n 548ac │ │ movs r0, #1 │ │ - b.n 545de │ │ + b.n 547ee │ │ movs r1, #17 │ │ movs r0, #0 │ │ movt r1, #32768 @ 0x8000 │ │ strb.w r0, [sl, #4] │ │ mov r0, fp │ │ str.w r1, [sl] │ │ ldmia r5!, {r1, r2, r3, r6, r7} │ │ stmia r0!, {r1, r2, r3, r6, r7} │ │ ldmia r5!, {r1, r2, r3, r6, r7} │ │ stmia r0!, {r1, r2, r3, r6, r7} │ │ ldmia.w r5, {r1, r2, r3, r4, r6, r7} │ │ stmia r0!, {r1, r2, r3, r4, r6, r7} │ │ add r0, sp, #208 @ 0xd0 │ │ mov r1, fp │ │ - bl 4b6b4 │ │ + bl 4b9bc │ │ ldr r4, [sp, #36] @ 0x24 │ │ ldr r0, [r4, #64] @ 0x40 │ │ cmp r0, #0 │ │ - bne.w 54714 │ │ + bne.w 54924 │ │ add r2, sp, #208 @ 0xd0 │ │ ldrd r5, r8, [r4, #68] @ 0x44 │ │ mov.w r3, #4294967295 @ 0xffffffff │ │ ldr r6, [r4, #76] @ 0x4c │ │ ldmia r2, {r0, r1, r2} │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ str r3, [r4, #64] @ 0x40 │ │ ldr r3, [sp, #20] │ │ stmia r3!, {r0, r1, r2} │ │ - beq.n 5463e │ │ - cbz r6, 54632 │ │ + beq.n 5484e │ │ + cbz r6, 54842 │ │ mov r4, r8 │ │ ldr.w r0, [r4], #4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r6, #1 │ │ - bne.n 54626 │ │ + bne.n 54836 │ │ cmp r5, #0 │ │ ldr r4, [sp, #36] @ 0x24 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r4, #64] @ 0x40 │ │ ldr r1, [sp, #48] @ 0x30 │ │ adds r0, #1 │ │ str r0, [r4, #64] @ 0x40 │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ - beq.w 5447e │ │ + beq.w 5468e │ │ ldr r0, [r4, #16] │ │ cmp r0, #0 │ │ - bne.n 5471c │ │ + bne.n 5492c │ │ ldr r5, [sp, #16] │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ str r0, [r4, #16] │ │ mov r0, r5 │ │ ldmia r0!, {r1, r2, r3, r6, r7} │ │ stmia.w fp!, {r1, r2, r3, r6, r7} │ │ ldmia.w r0, {r1, r2, r3, r6, r7} │ │ @@ -66381,21 +66477,21 @@ │ │ add r6, sp, #40 @ 0x28 │ │ ldmia r6!, {r0, r1, r2, r3, r7} │ │ stmia r5!, {r0, r1, r2, r3, r7} │ │ ldmia.w r6, {r0, r1, r2, r3, r7} │ │ stmia r5!, {r0, r1, r2, r3, r7} │ │ ldr r0, [sp, #152] @ 0x98 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.n 5468a │ │ + bne.n 5489a │ │ movs r0, #0 │ │ str r0, [r4, #16] │ │ add sp, #244 @ 0xf4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add r0, sp, #144 @ 0x90 │ │ - bl 4b7a0 │ │ + bl 4baa8 │ │ ldr r0, [r4, #16] │ │ adds r0, #1 │ │ str r0, [r4, #16] │ │ add sp, #244 @ 0xf4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr.w r1, [sp, #153] @ 0x99 │ │ ldrb.w r3, [sp, #148] @ 0x94 │ │ @@ -66411,68 +66507,68 @@ │ │ stmia r0!, {r1, r2, r3, r6, r7} │ │ ldmia r4!, {r1, r2, r3, r6, r7} │ │ stmia r0!, {r1, r2, r3, r6, r7} │ │ ldmia.w r4, {r1, r2, r3, r5, r6, r7} │ │ stmia r0!, {r1, r2, r3, r5, r6, r7} │ │ add r0, sp, #208 @ 0xd0 │ │ mov r1, r8 │ │ - bl 4b6b4 │ │ + bl 4b9bc │ │ ldrd r4, r5, [sp, #212] @ 0xd4 │ │ - cbz r5, 546ea │ │ + cbz r5, 548fa │ │ mov r6, r4 │ │ ldr.w r0, [r6], #4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r5, #1 │ │ - bne.n 546de │ │ + bne.n 548ee │ │ ldr r0, [sp, #208] @ 0xd0 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #48] @ 0x30 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 5447e │ │ + beq.w 5468e │ │ add r0, sp, #40 @ 0x28 │ │ - bl 4b7a0 │ │ + bl 4baa8 │ │ add sp, #244 @ 0xf4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #20] @ (54724 ) │ │ + ldr r0, [pc, #20] @ (54934 ) │ │ add r0, pc │ │ - bl 4132c │ │ - ldr r0, [pc, #16] @ (54728 ) │ │ + bl 41634 │ │ + ldr r0, [pc, #16] @ (54938 ) │ │ add r0, pc │ │ - bl 4132c │ │ - ldr r0, [pc, #12] @ (5472c ) │ │ + bl 41634 │ │ + ldr r0, [pc, #12] @ (5493c ) │ │ add r0, pc │ │ - bl 4132c │ │ - str r6, [r1, #88] @ 0x58 │ │ + bl 41634 │ │ + str r6, [r1, #56] @ 0x38 │ │ movs r0, r1 │ │ - str r6, [r6, #88] @ 0x58 │ │ + str r6, [r6, #56] @ 0x38 │ │ movs r0, r1 │ │ - str r6, [r3, #88] @ 0x58 │ │ + str r6, [r3, #56] @ 0x38 │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #204 @ 0xcc │ │ mov sl, r2 │ │ ldrd r2, r3, [r1, #48] @ 0x30 │ │ ldrd r7, r6, [sl, #8] │ │ eors r3, r6 │ │ eors r2, r7 │ │ orrs r2, r3 │ │ - bne.n 54778 │ │ + bne.n 54988 │ │ ldr.w r2, [sl, #64] @ 0x40 │ │ cmp r2, #0 │ │ - bne.w 5493e │ │ + bne.w 54b4e │ │ mov fp, sl │ │ mov.w r2, #2147483648 @ 0x80000000 │ │ ldr.w r9, [fp, #68]! │ │ ldrd r3, r8, [fp, #4] │ │ cmp.w r9, #2147483648 @ 0x80000000 │ │ str.w r2, [fp] │ │ - bne.n 54788 │ │ + bne.n 54998 │ │ movs r1, #9 │ │ movt r1, #32768 @ 0x8000 │ │ str r1, [r0, #0] │ │ add sp, #204 @ 0xcc │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r1, #9 │ │ movt r1, #32768 @ 0x8000 │ │ @@ -66486,41 +66582,41 @@ │ │ movs r0, #0 │ │ movs r1, #4 │ │ strd r0, r0, [sp, #152] @ 0x98 │ │ strd r0, r1, [sp, #160] @ 0xa0 │ │ movw r1, #909 @ 0x38d │ │ strd r0, r0, [sp, #168] @ 0xa8 │ │ strd r0, r1, [sp, #176] @ 0xb0 │ │ - b.n 547ae │ │ + b.n 549be │ │ lsrs r0, r2, #2 │ │ - bne.n 547ec │ │ + bne.n 549fc │ │ mov r0, r5 │ │ - bl 481dc │ │ + bl 484e4 │ │ ldr r0, [sp, #172] @ 0xac │ │ cmp r0, #0 │ │ - beq.n 547ae │ │ + beq.n 549be │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r6, #1 │ │ movs r7, #0 │ │ - b.n 547d4 │ │ + b.n 549e4 │ │ umull r2, r4, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r4, r3, r7, r4 │ │ mla r7, r3, r7, r4 │ │ mov r3, r2 │ │ lsls r2, r0, #31 │ │ - beq.n 547c4 │ │ + beq.n 549d4 │ │ umull r2, r4, r3, r6 │ │ cmp r0, #1 │ │ - beq.n 547aa │ │ + beq.n 549ba │ │ mla r1, r3, r1, r4 │ │ mla r1, r7, r6, r1 │ │ mov r6, r2 │ │ - b.n 547c4 │ │ + b.n 549d4 │ │ ldmia r5!, {r2, r3, r6, r7} │ │ add r0, sp, #88 @ 0x58 │ │ adds r1, r0, #4 │ │ stmia r1!, {r2, r3, r6, r7} │ │ ldmia.w r5, {r2, r3, r6, r7} │ │ add r5, sp, #24 │ │ stmia r1!, {r2, r3, r6, r7} │ │ @@ -66537,184 +66633,184 @@ │ │ stmia r1!, {r2, r3, r6, r7} │ │ ldmia.w r0, {r2, r3, r4, r6, r7} │ │ stmia r1!, {r2, r3, r4, r6, r7} │ │ mov r1, r5 │ │ ldr r0, [sp, #20] │ │ ldr r2, [r0, #32] │ │ mov r0, r8 │ │ - bl 49d00 │ │ + bl 4a008 │ │ add r7, sp, #88 @ 0x58 │ │ add.w ip, sp, #184 @ 0xb8 │ │ ldmia r7, {r0, r1, r2, r3, r7} │ │ cmp r0, #2 │ │ stmia.w ip, {r1, r2, r3, r7} │ │ - bne.n 54848 │ │ + bne.n 54a58 │ │ add r3, sp, #184 @ 0xb8 │ │ ldr r7, [sp, #12] │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia r7!, {r0, r1, r2, r3} │ │ - b.n 548d8 │ │ + b.n 54ae8 │ │ add r7, sp, #184 @ 0xb8 │ │ ldr r6, [sp, #108] @ 0x6c │ │ add.w ip, sp, #152 @ 0x98 │ │ str r6, [sp, #172] @ 0xac │ │ ldmia r7, {r1, r2, r3, r7} │ │ stmia.w ip, {r0, r1, r2, r3, r7} │ │ lsls r0, r0, #31 │ │ - beq.n 5494e │ │ + beq.n 54b5e │ │ movs r0, #8 │ │ movs r7, #8 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 54962 │ │ + beq.n 54b72 │ │ ldr r2, [sp, #240] @ 0xf0 │ │ str r2, [r0, #0] │ │ ldr r2, [sp, #244] @ 0xf4 │ │ ldr r1, [sp, #156] @ 0x9c │ │ eor.w r2, r2, #2147483648 @ 0x80000000 │ │ str r2, [r0, #4] │ │ movs r2, #0 │ │ strd r7, r2, [sp] │ │ add r2, sp, #88 @ 0x58 │ │ mov r7, r0 │ │ mov r0, r2 │ │ movs r2, #16 │ │ mov r3, r7 │ │ - bl 49e28 │ │ + bl 4a130 │ │ mov r0, r7 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrd r1, r0, [sp, #88] @ 0x58 │ │ cmp r1, #1 │ │ - bne.n 548a2 │ │ + bne.n 54ab2 │ │ add r3, sp, #96 @ 0x60 │ │ ldr r7, [sp, #12] │ │ ldmia r3, {r1, r2, r3} │ │ stmia r7!, {r0, r1, r2, r3} │ │ - b.n 548c6 │ │ + b.n 54ad6 │ │ cmp r0, #0 │ │ ldr r0, [sp, #12] │ │ - beq.n 548b4 │ │ + beq.n 54ac4 │ │ ldr r2, [sp, #104] @ 0x68 │ │ cmp r2, #1 │ │ - bls.n 54956 │ │ + bls.n 54b66 │ │ ldr r1, [sp, #100] @ 0x64 │ │ ldrh r3, [r1, #0] │ │ - b.n 548b6 │ │ + b.n 54ac6 │ │ movs r1, #0 │ │ movs r7, #9 │ │ strd r2, r3, [r0, #8] │ │ movt r7, #32768 @ 0x8000 │ │ adds r7, #8 │ │ strd r7, r1, [r0] │ │ add r0, sp, #152 @ 0x98 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #152] @ 0x98 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #156] @ 0x9c │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ ldr.w r0, [sl, #64] @ 0x40 │ │ - cbnz r0, 54946 │ │ + cbnz r0, 54b56 │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ str.w r0, [sl, #64] @ 0x40 │ │ mov r0, r8 │ │ ldmia r5!, {r1, r2, r3, r6, r7} │ │ stmia r0!, {r1, r2, r3, r6, r7} │ │ ldmia r5!, {r1, r2, r3, r6, r7} │ │ stmia r0!, {r1, r2, r3, r6, r7} │ │ ldmia.w r5, {r1, r2, r3, r4, r6, r7} │ │ stmia r0!, {r1, r2, r3, r4, r6, r7} │ │ add r0, sp, #152 @ 0x98 │ │ mov r1, r8 │ │ - bl 4b6b4 │ │ + bl 4b9bc │ │ add r2, sp, #152 @ 0x98 │ │ ldrd r7, r8, [sl, #68] @ 0x44 │ │ ldr.w r5, [sl, #76] @ 0x4c │ │ ldmia r2, {r0, r1, r2} │ │ cmp.w r7, #2147483648 @ 0x80000000 │ │ stmia.w fp, {r0, r1, r2} │ │ - beq.n 5492e │ │ - cbz r5, 54924 │ │ + beq.n 54b3e │ │ + cbz r5, 54b34 │ │ mov r6, r8 │ │ ldr.w r0, [r6], #4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r5, #1 │ │ - bne.n 54918 │ │ + bne.n 54b28 │ │ cmp r7, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [sl, #64] @ 0x40 │ │ adds r0, #1 │ │ str.w r0, [sl, #64] @ 0x40 │ │ add sp, #204 @ 0xcc │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #48] @ (54970 ) │ │ + ldr r0, [pc, #48] @ (54b80 ) │ │ add r0, pc │ │ - bl 4132c │ │ - ldr r0, [pc, #36] @ (5496c ) │ │ + bl 41634 │ │ + ldr r0, [pc, #36] @ (54b7c ) │ │ add r0, pc │ │ - bl 4132c │ │ - ldr r0, [pc, #36] @ (54974 ) │ │ + bl 41634 │ │ + ldr r0, [pc, #36] @ (54b84 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r3, [pc, #32] @ (54978 ) │ │ + bl 3fd40 │ │ + ldr r3, [pc, #32] @ (54b88 ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ movs r0, #1 │ │ movs r1, #8 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - str r4, [r4, #52] @ 0x34 │ │ + str r4, [r4, #20] │ │ movs r0, r1 │ │ - str r4, [r3, #52] @ 0x34 │ │ + str r4, [r3, #20] │ │ movs r0, r1 │ │ - str r4, [r7, #28] │ │ + ldrsh r4, [r7, r7] │ │ movs r0, r1 │ │ - str r0, [r2, #12] │ │ + ldrsh r0, [r2, r3] │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #244 @ 0xf4 │ │ ldrd r3, r7, [r1, #48] @ 0x30 │ │ ldrd r6, r5, [r2, #8] │ │ eors r7, r5 │ │ eors r3, r6 │ │ orrs r3, r7 │ │ - bne.n 549c2 │ │ + bne.n 54bd2 │ │ ldrb.w r3, [r2, #80] @ 0x50 │ │ - cbz r3, 549cc │ │ + cbz r3, 54bdc │ │ ldr r3, [r2, #64] @ 0x40 │ │ cmp r3, #0 │ │ - bne.w 54bc2 │ │ + bne.w 54dd2 │ │ mov fp, r2 │ │ mov.w r3, #2147483648 @ 0x80000000 │ │ ldr.w r9, [fp, #68]! │ │ ldrd r7, r8, [fp, #4] │ │ cmp.w r9, #2147483648 @ 0x80000000 │ │ str.w r3, [fp] │ │ - bne.n 549da │ │ + bne.n 54bea │ │ movs r1, #5 │ │ movt r1, #32768 @ 0x8000 │ │ adds r1, #4 │ │ - b.n 549d2 │ │ + b.n 54be2 │ │ movs r1, #5 │ │ movt r1, #32768 @ 0x8000 │ │ adds r1, #11 │ │ - b.n 549d2 │ │ + b.n 54be2 │ │ movs r1, #5 │ │ movt r1, #32768 @ 0x8000 │ │ str r1, [r0, #0] │ │ add sp, #244 @ 0xf4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ strd r0, r1, [sp, #28] │ │ ldr r0, [r2, #16] │ │ cmp r0, #0 │ │ - bne.w 54bc2 │ │ + bne.w 54dd2 │ │ add.w r0, r2, #24 │ │ str r7, [sp, #24] │ │ str r0, [sp, #20] │ │ add r1, sp, #40 @ 0x28 │ │ ldmia r0!, {r3, r4, r5, r6, r7} │ │ stmia r1!, {r3, r4, r5, r6, r7} │ │ ldmia.w r0, {r3, r4, r5, r6, r7} │ │ @@ -66726,41 +66822,41 @@ │ │ movs r0, #0 │ │ strd r0, r1, [sp, #216] @ 0xd8 │ │ movw r1, #909 @ 0x38d │ │ str r2, [sp, #36] @ 0x24 │ │ strd r0, r0, [sp, #208] @ 0xd0 │ │ strd r0, r0, [sp, #224] @ 0xe0 │ │ strd r0, r1, [sp, #232] @ 0xe8 │ │ - b.n 54a22 │ │ + b.n 54c32 │ │ lsrs r0, r2, #2 │ │ - bne.n 54a60 │ │ + bne.n 54c70 │ │ mov r0, r6 │ │ - bl 481dc │ │ + bl 484e4 │ │ ldr r0, [sp, #228] @ 0xe4 │ │ cmp r0, #0 │ │ - beq.n 54a22 │ │ + beq.n 54c32 │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r7, #1 │ │ movs r5, #0 │ │ - b.n 54a48 │ │ + b.n 54c58 │ │ umull r2, r4, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r4, r3, r5, r4 │ │ mla r5, r3, r5, r4 │ │ mov r3, r2 │ │ lsls r2, r0, #31 │ │ - beq.n 54a38 │ │ + beq.n 54c48 │ │ umull r2, r4, r3, r7 │ │ cmp r0, #1 │ │ - beq.n 54a1e │ │ + beq.n 54c2e │ │ mla r1, r3, r1, r4 │ │ mla r1, r5, r7, r1 │ │ mov r7, r2 │ │ - b.n 54a38 │ │ + b.n 54c48 │ │ ldmia r6!, {r1, r2, r3, r7} │ │ add.w sl, sp, #144 @ 0x90 │ │ add.w r0, sl, #4 │ │ stmia r0!, {r1, r2, r3, r7} │ │ ldmia.w r6, {r1, r2, r3, r7} │ │ add r6, sp, #80 @ 0x50 │ │ stmia r0!, {r1, r2, r3, r7} │ │ @@ -66793,64 +66889,64 @@ │ │ ldr r1, [sp, #296] @ 0x128 │ │ str r1, [sp, #16] │ │ it ne │ │ movne r3, r0 │ │ ldr.w r8, [sp, #28] │ │ ldr r1, [sp, #32] │ │ mov r0, r8 │ │ - bl 4d438 │ │ + bl 4d740 │ │ ldmia r6!, {r1, r2, r3, r4, r5} │ │ mov r0, sl │ │ stmia r0!, {r1, r2, r3, r4, r5} │ │ ldmia r6!, {r1, r2, r3, r4, r5} │ │ stmia r0!, {r1, r2, r3, r4, r5} │ │ ldmia.w r6, {r1, r2, r3, r4, r5, r7} │ │ stmia r0!, {r1, r2, r3, r4, r5, r7} │ │ add r0, sp, #208 @ 0xd0 │ │ mov r1, sl │ │ - bl 4b6b4 │ │ + bl 4b9bc │ │ movs r1, #5 │ │ ldr.w r0, [r8] │ │ movt r1, #32768 @ 0x8000 │ │ adds r1, #12 │ │ cmp r0, r1 │ │ - bne.n 54b78 │ │ + bne.n 54d88 │ │ ldr r0, [sp, #36] @ 0x24 │ │ ldr r1, [r0, #64] @ 0x40 │ │ cmp r1, #0 │ │ - bne.n 54bca │ │ + bne.n 54dda │ │ add r3, sp, #208 @ 0xd0 │ │ ldrd r7, r9, [r0, #68] @ 0x44 │ │ ldr r6, [r0, #76] @ 0x4c │ │ mov.w r5, #4294967295 @ 0xffffffff │ │ ldmia r3, {r1, r2, r3} │ │ cmp.w r7, #2147483648 @ 0x80000000 │ │ str r5, [r0, #64] @ 0x40 │ │ stmia.w fp, {r1, r2, r3} │ │ - beq.n 54b2c │ │ - cbz r6, 54b20 │ │ + beq.n 54d3c │ │ + cbz r6, 54d30 │ │ mov r4, r9 │ │ ldr.w r0, [r4], #4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r6, #1 │ │ - bne.n 54b14 │ │ + bne.n 54d24 │ │ ldr r0, [sp, #36] @ 0x24 │ │ - cbz r7, 54b2c │ │ + cbz r7, 54d3c │ │ mov r0, r9 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #36] @ 0x24 │ │ ldr r1, [r0, #64] @ 0x40 │ │ ldr r2, [sp, #48] @ 0x30 │ │ adds r1, #1 │ │ str r1, [r0, #64] @ 0x40 │ │ cmp.w r2, #2147483648 @ 0x80000000 │ │ - beq.w 549d4 │ │ + beq.w 54be4 │ │ ldr r1, [r0, #16] │ │ cmp r1, #0 │ │ - bne.n 54bd2 │ │ + bne.n 54de2 │ │ ldr r4, [sp, #20] │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ str r1, [r0, #16] │ │ mov r1, r4 │ │ ldmia r1!, {r2, r3, r5, r6, r7} │ │ stmia.w sl!, {r2, r3, r5, r6, r7} │ │ ldmia.w r1, {r2, r3, r5, r6, r7} │ │ @@ -66858,131 +66954,131 @@ │ │ add r5, sp, #40 @ 0x28 │ │ ldmia r5!, {r1, r2, r3, r6, r7} │ │ stmia r4!, {r1, r2, r3, r6, r7} │ │ ldmia.w r5, {r1, r2, r3, r6, r7} │ │ stmia r4!, {r1, r2, r3, r6, r7} │ │ ldr r1, [sp, #152] @ 0x98 │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ - bne.n 54bae │ │ + bne.n 54dbe │ │ movs r1, #0 │ │ str r1, [r0, #16] │ │ add sp, #244 @ 0xf4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd r4, r5, [sp, #212] @ 0xd4 │ │ - cbz r5, 54b8c │ │ + cbz r5, 54d9c │ │ mov r6, r4 │ │ ldr.w r0, [r6], #4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r5, #1 │ │ - bne.n 54b80 │ │ + bne.n 54d90 │ │ ldr r0, [sp, #208] @ 0xd0 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #48] @ 0x30 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 549d4 │ │ + beq.w 54be4 │ │ add r0, sp, #40 @ 0x28 │ │ - bl 4b7a0 │ │ + bl 4baa8 │ │ add sp, #244 @ 0xf4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add r0, sp, #144 @ 0x90 │ │ - bl 4b7a0 │ │ + bl 4baa8 │ │ ldr r0, [sp, #36] @ 0x24 │ │ ldr r1, [r0, #16] │ │ adds r1, #1 │ │ str r1, [r0, #16] │ │ add sp, #244 @ 0xf4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #24] @ (54bdc ) │ │ + ldr r0, [pc, #24] @ (54dec ) │ │ add r0, pc │ │ - bl 4132c │ │ - ldr r0, [pc, #20] @ (54be0 ) │ │ + bl 41634 │ │ + ldr r0, [pc, #20] @ (54df0 ) │ │ add r0, pc │ │ - bl 4132c │ │ - ldr r0, [pc, #16] @ (54be4 ) │ │ + bl 41634 │ │ + ldr r0, [pc, #16] @ (54df4 ) │ │ add r0, pc │ │ - bl 4132c │ │ + bl 41634 │ │ nop │ │ - str r0, [r3, #12] │ │ + ldrsh r0, [r3, r3] │ │ movs r0, r1 │ │ - str r0, [r0, #16] │ │ + ldrsh r0, [r0, r4] │ │ movs r0, r1 │ │ - str r0, [r5, #12] │ │ + ldrsh r0, [r5, r3] │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #324 @ 0x144 │ │ ldrd r3, r6, [r1, #104] @ 0x68 │ │ mov r8, r0 │ │ ldr r0, [sp, #364] @ 0x16c │ │ add.w r7, r3, #32 │ │ rsb r3, r6, r6, lsl #3 │ │ lsls r6, r3, #3 │ │ ldr r3, [sp, #360] @ 0x168 │ │ - cbz r6, 54c14 │ │ + cbz r6, 54e24 │ │ ldrd r5, r4, [r7], #56 @ 0x38 │ │ subs r6, #56 @ 0x38 │ │ eors r4, r0 │ │ eors r5, r3 │ │ orrs r5, r4 │ │ - bne.n 54c02 │ │ - b.n 54c30 │ │ + bne.n 54e12 │ │ + b.n 54e40 │ │ ldrd r7, r6, [r1, #116] @ 0x74 │ │ rsb r6, r6, r6, lsl #3 │ │ adds r7, #32 │ │ lsls r6, r6, #3 │ │ - cbz r6, 54c8c │ │ + cbz r6, 54e9c │ │ ldrd r5, r4, [r7], #56 @ 0x38 │ │ subs r6, #56 @ 0x38 │ │ eors r4, r0 │ │ eors r5, r3 │ │ orrs r5, r4 │ │ - bne.n 54c20 │ │ + bne.n 54e30 │ │ sub.w fp, r7, #88 @ 0x58 │ │ ldrd r0, r1, [r1, #48] @ 0x30 │ │ ldrd r3, r7, [r2, #8] │ │ eors r1, r7 │ │ eors r0, r3 │ │ orrs r0, r1 │ │ - bne.n 54c7a │ │ + bne.n 54e8a │ │ ldrb.w r0, [r2, #80] @ 0x50 │ │ - cbz r0, 54cbc │ │ + cbz r0, 54ecc │ │ ldr r0, [r2, #64] @ 0x40 │ │ cmp r0, #0 │ │ - bne.w 550f2 │ │ + bne.w 55302 │ │ mov r1, r2 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ ldr.w sl, [r1, #68]! │ │ ldrd r3, r9, [r1, #4] │ │ cmp.w sl, #2147483648 @ 0x80000000 │ │ str r0, [r1, #0] │ │ - bne.n 54cce │ │ + bne.n 54ede │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ subs r0, #8 │ │ str.w r0, [r8] │ │ add sp, #324 @ 0x144 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ subs r0, #1 │ │ str.w r0, [r8] │ │ add sp, #324 @ 0x144 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #23 │ │ movs r6, #23 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 55112 │ │ - ldr r1, [pc, #900] @ (55020 ) │ │ + beq.w 55322 │ │ + ldr r1, [pc, #900] @ (55230 ) │ │ movs r2, #23 │ │ mov r5, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #17 │ │ strd r5, r6, [r8, #8] │ │ movt r0, #32768 @ 0x8000 │ │ subs r0, #7 │ │ strd r0, r6, [r8] │ │ add sp, #324 @ 0x144 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ @@ -66991,15 +67087,15 @@ │ │ subs r0, #12 │ │ str.w r0, [r8] │ │ add sp, #324 @ 0x144 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r0, [r2, #16] │ │ strd r1, r3, [sp, #20] │ │ cmp r0, #0 │ │ - bne.w 550f2 │ │ + bne.w 55302 │ │ add.w r1, r2, #24 │ │ str r1, [sp, #16] │ │ add r0, sp, #32 │ │ ldmia r1!, {r3, r4, r5, r6, r7} │ │ stmia r0!, {r3, r4, r5, r6, r7} │ │ ldmia.w r1, {r3, r4, r5, r6, r7} │ │ movs r1, #4 │ │ @@ -67010,41 +67106,41 @@ │ │ movs r0, #0 │ │ strd r0, r1, [sp, #208] @ 0xd0 │ │ movw r1, #909 @ 0x38d │ │ str r2, [sp, #28] │ │ strd r0, r0, [sp, #200] @ 0xc8 │ │ strd r0, r0, [sp, #216] @ 0xd8 │ │ strd r0, r1, [sp, #224] @ 0xe0 │ │ - b.n 54d14 │ │ + b.n 54f24 │ │ lsrs r0, r2, #2 │ │ - bne.n 54d52 │ │ + bne.n 54f62 │ │ mov r0, r5 │ │ - bl 481dc │ │ + bl 484e4 │ │ ldr r0, [sp, #220] @ 0xdc │ │ cmp r0, #0 │ │ - beq.n 54d14 │ │ + beq.n 54f24 │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r6, #1 │ │ movs r7, #0 │ │ - b.n 54d3a │ │ + b.n 54f4a │ │ umull r2, r4, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r4, r3, r7, r4 │ │ mla r7, r3, r7, r4 │ │ mov r3, r2 │ │ lsls r2, r0, #31 │ │ - beq.n 54d2a │ │ + beq.n 54f3a │ │ umull r2, r4, r3, r6 │ │ cmp r0, #1 │ │ - beq.n 54d10 │ │ + beq.n 54f20 │ │ mla r1, r3, r1, r4 │ │ mla r1, r7, r6, r1 │ │ mov r6, r2 │ │ - b.n 54d2a │ │ + b.n 54f3a │ │ mov r2, r5 │ │ add r1, sp, #136 @ 0x88 │ │ ldmia r2!, {r3, r4, r6, r7} │ │ adds r0, r1, #4 │ │ stmia r0!, {r3, r4, r6, r7} │ │ ldmia.w r2, {r3, r4, r6, r7} │ │ stmia r0!, {r3, r4, r6, r7} │ │ @@ -67062,183 +67158,183 @@ │ │ ldmia r1!, {r2, r3, r4, r7} │ │ stmia r0!, {r2, r3, r4, r7} │ │ ldmia.w r1, {r2, r3, r4, r6, r7} │ │ mov r1, sl │ │ stmia r0!, {r2, r3, r4, r6, r7} │ │ mov r0, r9 │ │ ldr.w r2, [fp, #16] │ │ - bl 49d00 │ │ + bl 4a008 │ │ ldrd r7, r0, [sp, #136] @ 0x88 │ │ add r3, sp, #144 @ 0x90 │ │ movs r4, #17 │ │ add.w ip, sp, #200 @ 0xc8 │ │ movt r4, #32768 @ 0x8000 │ │ ldmia r3, {r1, r2, r3} │ │ cmp r7, #2 │ │ stmia.w ip, {r0, r1, r2, r3} │ │ - bne.n 54dbc │ │ + bne.n 54fcc │ │ add r3, sp, #200 @ 0xc8 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w r8, {r0, r1, r2, r3} │ │ - b.n 54ee0 │ │ + b.n 550f0 │ │ add r3, sp, #200 @ 0xc8 │ │ add.w ip, sp, #240 @ 0xf0 │ │ ldr r6, [sp, #156] @ 0x9c │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3, r6} │ │ add r1, sp, #72 @ 0x48 │ │ ldr.w r2, [fp, #24] │ │ strd r7, r0, [sp, #232] @ 0xe8 │ │ add r0, sp, #136 @ 0x88 │ │ - bl 49d00 │ │ + bl 4a008 │ │ ldrd r4, r0, [sp, #136] @ 0x88 │ │ add r3, sp, #144 @ 0x90 │ │ add.w ip, sp, #200 @ 0xc8 │ │ ldmia r3, {r1, r2, r3} │ │ cmp r4, #2 │ │ stmia.w ip, {r0, r1, r2, r3} │ │ - bne.n 54dfe │ │ + bne.n 5500e │ │ add r3, sp, #200 @ 0xc8 │ │ movs r4, #17 │ │ movt r4, #32768 @ 0x8000 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w r8, {r0, r1, r2, r3} │ │ - b.n 54ed0 │ │ + b.n 550e0 │ │ add r3, sp, #200 @ 0xc8 │ │ add.w ip, sp, #264 @ 0x108 │ │ ldr r6, [sp, #156] @ 0x9c │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r1, r2, r3, r6} │ │ strd r4, r0, [sp, #256] @ 0x100 │ │ lsls r0, r7, #31 │ │ - beq.w 55102 │ │ + beq.w 55312 │ │ movs r0, #8 │ │ movs r7, #8 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 5511a │ │ + beq.w 5532a │ │ ldr r2, [sp, #368] @ 0x170 │ │ str r2, [r0, #0] │ │ ldr r2, [sp, #372] @ 0x174 │ │ ldr r1, [sp, #236] @ 0xec │ │ eor.w r6, r2, #2147483648 @ 0x80000000 │ │ movs r2, #0 │ │ strd r7, r2, [sp] │ │ add r2, sp, #136 @ 0x88 │ │ mov r7, r0 │ │ str r6, [r0, #4] │ │ mov r0, r2 │ │ movs r2, #16 │ │ mov r3, r7 │ │ - bl 49e28 │ │ + bl 4a130 │ │ mov r0, r7 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrd r0, r7, [sp, #136] @ 0x88 │ │ lsls r0, r0, #31 │ │ - beq.n 54e62 │ │ + beq.n 55072 │ │ add r2, sp, #144 @ 0x90 │ │ ldmia r2, {r0, r1, r2} │ │ strd r1, r2, [r8, #8] │ │ strd r7, r0, [r8] │ │ - b.n 54eb8 │ │ + b.n 550c8 │ │ lsls r0, r4, #31 │ │ str r6, [sp, #12] │ │ - beq.w 55102 │ │ + beq.w 55312 │ │ movs r0, #8 │ │ mov r6, r9 │ │ mov.w r9, #8 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 5511a │ │ + beq.w 5532a │ │ ldr r3, [sp, #376] @ 0x178 │ │ mov.w r2, #2147483648 @ 0x80000000 │ │ str r3, [r0, #0] │ │ mov r4, r0 │ │ ldr r3, [sp, #380] @ 0x17c │ │ ldr r1, [sp, #260] @ 0x104 │ │ eors r2, r3 │ │ str r2, [r0, #4] │ │ str r2, [sp, #24] │ │ movs r2, #0 │ │ add r0, sp, #136 @ 0x88 │ │ strd r9, r2, [sp] │ │ movs r2, #16 │ │ mov r3, r4 │ │ - bl 49e28 │ │ + bl 4a130 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #136] @ 0x88 │ │ lsls r0, r0, #31 │ │ - beq.w 54fdc │ │ + beq.w 551ec │ │ add r3, sp, #140 @ 0x8c │ │ mov r9, r6 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w r8, {r0, r1, r2, r3} │ │ movs r4, #17 │ │ movt r4, #32768 @ 0x8000 │ │ add r0, sp, #256 @ 0x100 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #256] @ 0x100 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #260] @ 0x104 │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ add r0, sp, #232 @ 0xe8 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #232] @ 0xe8 │ │ - cbz r0, 54ee0 │ │ + cbz r0, 550f0 │ │ ldr r0, [sp, #236] @ 0xec │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ ldmia.w sl!, {r1, r2, r3, r6, r7} │ │ mov r0, r9 │ │ stmia r0!, {r1, r2, r3, r6, r7} │ │ ldmia.w sl!, {r1, r2, r3, r6, r7} │ │ stmia r0!, {r1, r2, r3, r6, r7} │ │ ldmia.w sl, {r1, r2, r3, r5, r6, r7} │ │ stmia r0!, {r1, r2, r3, r5, r6, r7} │ │ add r0, sp, #200 @ 0xc8 │ │ mov r1, r9 │ │ - bl 4b6b4 │ │ + bl 4b9bc │ │ ldr.w r0, [r8] │ │ cmp r0, r4 │ │ - bne.n 54f92 │ │ + bne.n 551a2 │ │ ldr r0, [sp, #28] │ │ ldr r1, [r0, #64] @ 0x40 │ │ cmp r1, #0 │ │ - bne.w 550fa │ │ + bne.w 5530a │ │ add r3, sp, #200 @ 0xc8 │ │ ldrd r5, r4, [r0, #68] @ 0x44 │ │ mov.w r7, #4294967295 @ 0xffffffff │ │ ldr r6, [r0, #76] @ 0x4c │ │ ldmia r3, {r1, r2, r3} │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ str r7, [r0, #64] @ 0x40 │ │ ldr r7, [sp, #20] │ │ stmia r7!, {r1, r2, r3} │ │ - beq.n 54f44 │ │ - cbz r6, 54f38 │ │ + beq.n 55154 │ │ + cbz r6, 55148 │ │ mov r7, r4 │ │ ldr.w r0, [r7], #4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r6, #1 │ │ - bne.n 54f2c │ │ + bne.n 5513c │ │ ldr r0, [sp, #28] │ │ - cbz r5, 54f44 │ │ + cbz r5, 55154 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #28] │ │ ldr r1, [r0, #64] @ 0x40 │ │ ldr r2, [sp, #40] @ 0x28 │ │ adds r1, #1 │ │ str r1, [r0, #64] @ 0x40 │ │ cmp.w r2, #2147483648 @ 0x80000000 │ │ - beq.w 54cb6 │ │ + beq.w 54ec6 │ │ ldr r1, [r0, #16] │ │ cmp r1, #0 │ │ - bne.w 5510a │ │ + bne.w 5531a │ │ ldr r4, [sp, #16] │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ str r1, [r0, #16] │ │ mov r1, r4 │ │ ldmia r1!, {r2, r3, r5, r6, r7} │ │ stmia.w r9!, {r2, r3, r5, r6, r7} │ │ ldmia.w r1, {r2, r3, r5, r6, r7} │ │ @@ -67246,290 +67342,290 @@ │ │ add r5, sp, #32 │ │ ldmia r5!, {r1, r2, r3, r6, r7} │ │ stmia r4!, {r1, r2, r3, r6, r7} │ │ ldmia.w r5, {r1, r2, r3, r6, r7} │ │ stmia r4!, {r1, r2, r3, r6, r7} │ │ ldr r1, [sp, #144] @ 0x90 │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ - bne.n 54fc8 │ │ + bne.n 551d8 │ │ movs r1, #0 │ │ str r1, [r0, #16] │ │ add sp, #324 @ 0x144 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd r4, r5, [sp, #204] @ 0xcc │ │ - cbz r5, 54fa6 │ │ + cbz r5, 551b6 │ │ mov r6, r4 │ │ ldr.w r0, [r6], #4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r5, #1 │ │ - bne.n 54f9a │ │ + bne.n 551aa │ │ ldr r0, [sp, #200] @ 0xc8 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #40] @ 0x28 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 54cb6 │ │ + beq.w 54ec6 │ │ add r0, sp, #32 │ │ - bl 4b7a0 │ │ + bl 4baa8 │ │ add sp, #324 @ 0x144 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add r0, sp, #136 @ 0x88 │ │ - bl 4b7a0 │ │ + bl 4baa8 │ │ ldr r0, [sp, #28] │ │ ldr r1, [r0, #16] │ │ adds r1, #1 │ │ str r1, [r0, #16] │ │ add sp, #324 @ 0x144 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r4, #17 │ │ cmp r7, #0 │ │ mov r9, r6 │ │ movt r4, #32768 @ 0x8000 │ │ itt ne │ │ ldrne r0, [sp, #140] @ 0x8c │ │ cmpne r0, #0 │ │ - bne.n 54ffa │ │ + bne.n 5520a │ │ movs r0, #0 │ │ str.w r4, [r8] │ │ strb.w r0, [r8, #4] │ │ - b.n 54ebe │ │ + b.n 550ce │ │ ldr.w r2, [fp] │ │ add r0, sp, #136 @ 0x88 │ │ add r1, sp, #72 @ 0x48 │ │ - bl 49d00 │ │ + bl 4a008 │ │ add r7, sp, #136 @ 0x88 │ │ add.w ip, sp, #200 @ 0xc8 │ │ ldmia r7, {r0, r1, r2, r3, r7} │ │ cmp r0, #2 │ │ stmia.w ip, {r1, r2, r3, r7} │ │ - bne.n 55024 │ │ + bne.n 55234 │ │ add r3, sp, #200 @ 0xc8 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w r8, {r0, r1, r2, r3} │ │ - b.n 54ebe │ │ - adds r4, r3, #5 │ │ + b.n 550ce │ │ + subs r4, r1, r5 │ │ vcvt.u32.f32 d26, d18, #4 │ │ ldr r6, [sp, #156] @ 0x9c │ │ add.w ip, sp, #280 @ 0x118 │ │ str r6, [sp, #300] @ 0x12c │ │ ldmia r7, {r1, r2, r3, r7} │ │ stmia.w ip, {r0, r1, r2, r3, r7} │ │ lsls r0, r0, #31 │ │ - beq.n 55102 │ │ + beq.n 55312 │ │ ldr r0, [sp, #376] @ 0x178 │ │ str r0, [sp, #200] @ 0xc8 │ │ ldr r0, [sp, #24] │ │ str r0, [sp, #204] @ 0xcc │ │ movs r0, #8 │ │ ldr r1, [sp, #284] @ 0x11c │ │ ldrd r2, r3, [sp, #368] @ 0x170 │ │ strd r5, r0, [sp] │ │ add r0, sp, #136 @ 0x88 │ │ - bl 4fcfc │ │ + bl 4ff0c │ │ ldr r0, [sp, #136] @ 0x88 │ │ cmp r0, r4 │ │ - bne.n 55078 │ │ + bne.n 55288 │ │ ldr.w r2, [fp, #8] │ │ add r0, sp, #136 @ 0x88 │ │ add r1, sp, #72 @ 0x48 │ │ - bl 49d00 │ │ + bl 4a008 │ │ add r7, sp, #136 @ 0x88 │ │ add.w ip, sp, #304 @ 0x130 │ │ ldmia r7, {r0, r1, r2, r3, r7} │ │ cmp r0, #2 │ │ stmia.w ip, {r1, r2, r3, r7} │ │ - bne.n 55088 │ │ + bne.n 55298 │ │ add r3, sp, #304 @ 0x130 │ │ - b.n 5507a │ │ + b.n 5528a │ │ add r3, sp, #136 @ 0x88 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w r8, {r0, r1, r2, r3} │ │ add r0, sp, #280 @ 0x118 │ │ - bl 55134 │ │ - b.n 54ebe │ │ + bl 55344 │ │ + b.n 550ce │ │ add r7, sp, #304 @ 0x130 │ │ ldr r6, [sp, #156] @ 0x9c │ │ add.w ip, sp, #200 @ 0xc8 │ │ str r6, [sp, #220] @ 0xdc │ │ ldmia r7, {r1, r2, r3, r7} │ │ stmia.w ip, {r0, r1, r2, r3, r7} │ │ lsls r0, r0, #31 │ │ - beq.n 55102 │ │ + beq.n 55312 │ │ ldr r0, [sp, #368] @ 0x170 │ │ add r2, sp, #304 @ 0x130 │ │ str r0, [sp, #304] @ 0x130 │ │ ldr r0, [sp, #12] │ │ str r0, [sp, #308] @ 0x134 │ │ movs r0, #8 │ │ strd r2, r0, [sp] │ │ add r0, sp, #136 @ 0x88 │ │ ldr r1, [sp, #204] @ 0xcc │ │ ldrd r2, r3, [sp, #376] @ 0x178 │ │ - bl 4fcfc │ │ + bl 4ff0c │ │ ldr r0, [sp, #136] @ 0x88 │ │ cmp r0, r4 │ │ - bne.n 550e2 │ │ + bne.n 552f2 │ │ movs r0, #1 │ │ str.w r4, [r8] │ │ strb.w r0, [r8, #4] │ │ add r0, sp, #200 @ 0xc8 │ │ - bl 55134 │ │ + bl 55344 │ │ add r0, sp, #280 @ 0x118 │ │ - bl 55134 │ │ + bl 55344 │ │ add r0, sp, #256 @ 0x100 │ │ - bl 55134 │ │ + bl 55344 │ │ add r0, sp, #232 @ 0xe8 │ │ - bl 55134 │ │ - b.n 54ee0 │ │ + bl 55344 │ │ + b.n 550f0 │ │ add r3, sp, #136 @ 0x88 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w r8, {r0, r1, r2, r3} │ │ add r0, sp, #200 @ 0xc8 │ │ - bl 55134 │ │ - b.n 55080 │ │ - ldr r0, [pc, #52] @ (55128 ) │ │ + bl 55344 │ │ + b.n 55290 │ │ + ldr r0, [pc, #52] @ (55338 ) │ │ add r0, pc │ │ - bl 4132c │ │ - ldr r0, [pc, #52] @ (55130 ) │ │ + bl 41634 │ │ + ldr r0, [pc, #52] @ (55340 ) │ │ add r0, pc │ │ - bl 4132c │ │ - ldr r0, [pc, #40] @ (5512c ) │ │ + bl 41634 │ │ + ldr r0, [pc, #40] @ (5533c ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #24] @ (55124 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #24] @ (55334 ) │ │ add r0, pc │ │ - bl 4132c │ │ + bl 41634 │ │ movs r0, #1 │ │ movs r1, #23 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #8 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - ldrh r0, [r6, r6] │ │ + ldr r0, [r6, r6] │ │ movs r0, r1 │ │ - ldrh r0, [r5, r6] │ │ + ldr r0, [r5, r6] │ │ movs r0, r1 │ │ - ldrh r0, [r1, r1] │ │ + ldr r0, [r1, r1] │ │ movs r0, r1 │ │ - ldrh r0, [r2, r7] │ │ + ldr r0, [r2, r7] │ │ movs r0, r1 │ │ push {r4, lr} │ │ mov r4, r0 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [r4, #0] │ │ cmp r0, #0 │ │ it eq │ │ popeq {r4, pc} │ │ ldr r0, [r4, #4] │ │ ldmia.w sp!, {r4, lr} │ │ - b.w d873c │ │ - bmi.n 550fa │ │ + b.w d874c │ │ + bmi.n 5530a │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #16 │ │ mov r4, r0 │ │ mov r0, r2 │ │ movs r2, #0 │ │ - blx 9fd18 │ │ + blx 9fd24 │ │ movs r5, #3 │ │ adds r1, r0, #1 │ │ movt r5, #32768 @ 0x8000 │ │ cmp r1, #2 │ │ - bcs.n 55178 │ │ + bcs.n 55388 │ │ add.w r0, r5, #14 │ │ str r0, [r4, #0] │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movw r1, #34744 @ 0x87b8 │ │ movt r1, #65535 @ 0xffff │ │ cmp r0, r1 │ │ - bne.n 55192 │ │ + bne.n 553a2 │ │ strd r5, r7, [r4] │ │ strd r5, r0, [r4, #8] │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ mov r8, r0 │ │ - blx a96f8 │ │ + blx a9704 │ │ mov r5, r0 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #4 │ │ mov r1, r5 │ │ - bl 402e0 │ │ + bl 405e8 │ │ add r5, sp, #4 │ │ ldmia r5, {r0, r1, r5} │ │ - ldr r6, [pc, #68] @ (551f4 ) │ │ + ldr r6, [pc, #68] @ (55404 ) │ │ cmp r0, #0 │ │ add r6, pc │ │ ite eq │ │ moveq r6, r1 │ │ movne r5, #27 │ │ cmp.w r5, #4294967295 @ 0xffffffff │ │ - bgt.n 551c2 │ │ - bl 3e03c │ │ - cbz r5, 551d0 │ │ + bgt.n 553d2 │ │ + bl 3e344 │ │ + cbz r5, 553e0 │ │ mov r0, r5 │ │ - blx d87f0 │ │ - cbz r0, 551ec │ │ + blx d8810 │ │ + cbz r0, 553fc │ │ mov r7, r0 │ │ - b.n 551d2 │ │ + b.n 553e2 │ │ movs r7, #1 │ │ mov r0, r7 │ │ mov r1, r6 │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ mov r0, r8 │ │ strd r5, r7, [r4] │ │ strd r5, r0, [r4, #8] │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movs r0, #1 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ - adds r5, r6, r3 │ │ + bl 3e2ac │ │ + asrs r5, r4, #27 │ │ vtbl.8 d30, {d12-d13}, d29 │ │ - ldr r7, [pc, #960] @ (555bc ) │ │ + ldr r7, [pc, #960] @ (557cc ) │ │ sub sp, #244 @ 0xf4 │ │ ldrd r3, r7, [r1, #48] @ 0x30 │ │ ldrd r6, r5, [r2, #8] │ │ eors r7, r5 │ │ eors r3, r6 │ │ orrs r3, r7 │ │ - bne.n 5523e │ │ + bne.n 5544e │ │ ldrb.w r3, [r2, #80] @ 0x50 │ │ - cbz r3, 55248 │ │ + cbz r3, 55458 │ │ ldr r3, [r2, #64] @ 0x40 │ │ cmp r3, #0 │ │ - bne.w 55438 │ │ + bne.w 55648 │ │ mov fp, r2 │ │ mov.w r3, #2147483648 @ 0x80000000 │ │ ldr.w r9, [fp, #68]! │ │ ldrd r7, sl, [fp, #4] │ │ cmp.w r9, #2147483648 @ 0x80000000 │ │ str.w r3, [fp] │ │ - bne.n 55256 │ │ + bne.n 55466 │ │ movs r1, #5 │ │ movt r1, #32768 @ 0x8000 │ │ adds r1, #4 │ │ - b.n 5524e │ │ + b.n 5545e │ │ movs r1, #5 │ │ movt r1, #32768 @ 0x8000 │ │ adds r1, #11 │ │ - b.n 5524e │ │ + b.n 5545e │ │ movs r1, #5 │ │ movt r1, #32768 @ 0x8000 │ │ str r1, [r0, #0] │ │ add sp, #244 @ 0xf4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ strd r0, r1, [sp, #28] │ │ ldr r0, [r2, #16] │ │ cmp r0, #0 │ │ - bne.w 55438 │ │ + bne.w 55648 │ │ add.w r0, r2, #24 │ │ str r7, [sp, #24] │ │ str r0, [sp, #20] │ │ add r1, sp, #40 @ 0x28 │ │ ldmia r0!, {r3, r4, r5, r6, r7} │ │ stmia r1!, {r3, r4, r5, r6, r7} │ │ ldmia.w r0, {r3, r4, r5, r6, r7} │ │ @@ -67541,41 +67637,41 @@ │ │ movs r0, #0 │ │ strd r0, r1, [sp, #216] @ 0xd8 │ │ movw r1, #909 @ 0x38d │ │ str r2, [sp, #36] @ 0x24 │ │ strd r0, r0, [sp, #208] @ 0xd0 │ │ strd r0, r0, [sp, #224] @ 0xe0 │ │ strd r0, r1, [sp, #232] @ 0xe8 │ │ - b.n 5529e │ │ + b.n 554ae │ │ lsrs r0, r2, #2 │ │ - bne.n 552dc │ │ + bne.n 554ec │ │ mov r0, r6 │ │ - bl 481dc │ │ + bl 484e4 │ │ ldr r0, [sp, #228] @ 0xe4 │ │ cmp r0, #0 │ │ - beq.n 5529e │ │ + beq.n 554ae │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r7, #1 │ │ movs r4, #0 │ │ - b.n 552c4 │ │ + b.n 554d4 │ │ umull r2, r5, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r5, r3, r4, r5 │ │ mla r4, r3, r4, r5 │ │ mov r3, r2 │ │ lsls r2, r0, #31 │ │ - beq.n 552b4 │ │ + beq.n 554c4 │ │ umull r2, r5, r3, r7 │ │ cmp r0, #1 │ │ - beq.n 5529a │ │ + beq.n 554aa │ │ mla r1, r3, r1, r5 │ │ mla r1, r4, r7, r1 │ │ mov r7, r2 │ │ - b.n 552b4 │ │ + b.n 554c4 │ │ ldmia r6!, {r1, r2, r3, r7} │ │ add.w r8, sp, #144 @ 0x90 │ │ add.w r0, r8, #4 │ │ stmia r0!, {r1, r2, r3, r7} │ │ ldmia.w r6, {r1, r2, r3, r7} │ │ add r6, sp, #80 @ 0x50 │ │ stmia r0!, {r1, r2, r3, r7} │ │ @@ -67602,194 +67698,194 @@ │ │ it ne │ │ movne r0, sl │ │ ldr.w r9, [sp, #28] │ │ ldr r1, [sp, #32] │ │ mov r2, r6 │ │ str r0, [sp, #0] │ │ mov r0, r9 │ │ - bl 4e084 │ │ + bl 4e294 │ │ ldmia r6!, {r1, r2, r3, r4, r5} │ │ mov r0, r8 │ │ stmia r0!, {r1, r2, r3, r4, r5} │ │ ldmia r6!, {r1, r2, r3, r4, r5} │ │ stmia r0!, {r1, r2, r3, r4, r5} │ │ ldmia.w r6, {r1, r2, r3, r4, r5, r7} │ │ stmia r0!, {r1, r2, r3, r4, r5, r7} │ │ add r0, sp, #208 @ 0xd0 │ │ mov r1, r8 │ │ - bl 4b6b4 │ │ + bl 4b9bc │ │ movs r1, #5 │ │ ldr.w r0, [r9] │ │ movt r1, #32768 @ 0x8000 │ │ adds r1, #12 │ │ cmp r0, r1 │ │ - bne.n 553ee │ │ + bne.n 555fe │ │ ldr r0, [sp, #36] @ 0x24 │ │ ldr r1, [r0, #64] @ 0x40 │ │ cmp r1, #0 │ │ - bne.n 55440 │ │ + bne.n 55650 │ │ add r3, sp, #208 @ 0xd0 │ │ ldrd r7, r4, [r0, #68] @ 0x44 │ │ ldr r6, [r0, #76] @ 0x4c │ │ mov.w r5, #4294967295 @ 0xffffffff │ │ ldmia r3, {r1, r2, r3} │ │ cmp.w r7, #2147483648 @ 0x80000000 │ │ str r5, [r0, #64] @ 0x40 │ │ stmia.w fp, {r1, r2, r3} │ │ - beq.n 553a2 │ │ - cbz r6, 55396 │ │ + beq.n 555b2 │ │ + cbz r6, 555a6 │ │ mov r5, r4 │ │ ldr.w r0, [r5], #4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r6, #1 │ │ - bne.n 5538a │ │ + bne.n 5559a │ │ ldr r0, [sp, #36] @ 0x24 │ │ - cbz r7, 553a2 │ │ + cbz r7, 555b2 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #36] @ 0x24 │ │ ldr r1, [r0, #64] @ 0x40 │ │ ldr r2, [sp, #48] @ 0x30 │ │ adds r1, #1 │ │ str r1, [r0, #64] @ 0x40 │ │ cmp.w r2, #2147483648 @ 0x80000000 │ │ - beq.w 55250 │ │ + beq.w 55460 │ │ ldr r1, [r0, #16] │ │ cmp r1, #0 │ │ - bne.n 55448 │ │ + bne.n 55658 │ │ ldr r4, [sp, #20] │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ str r1, [r0, #16] │ │ mov r1, r4 │ │ ldmia r1!, {r2, r3, r5, r6, r7} │ │ stmia.w r8!, {r2, r3, r5, r6, r7} │ │ ldmia.w r1, {r2, r3, r5, r6, r7} │ │ stmia.w r8, {r2, r3, r5, r6, r7} │ │ ldmia.w sl!, {r1, r2, r3, r6, r7} │ │ stmia r4!, {r1, r2, r3, r6, r7} │ │ ldmia.w sl, {r1, r2, r3, r6, r7} │ │ stmia r4!, {r1, r2, r3, r6, r7} │ │ ldr r1, [sp, #152] @ 0x98 │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ - bne.n 55424 │ │ + bne.n 55634 │ │ movs r1, #0 │ │ str r1, [r0, #16] │ │ add sp, #244 @ 0xf4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd r4, r5, [sp, #212] @ 0xd4 │ │ - cbz r5, 55402 │ │ + cbz r5, 55612 │ │ mov r6, r4 │ │ ldr.w r0, [r6], #4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r5, #1 │ │ - bne.n 553f6 │ │ + bne.n 55606 │ │ ldr r0, [sp, #208] @ 0xd0 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #48] @ 0x30 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 55250 │ │ + beq.w 55460 │ │ add r0, sp, #40 @ 0x28 │ │ - bl 4b7a0 │ │ + bl 4baa8 │ │ add sp, #244 @ 0xf4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add r0, sp, #144 @ 0x90 │ │ - bl 4b7a0 │ │ + bl 4baa8 │ │ ldr r0, [sp, #36] @ 0x24 │ │ ldr r1, [r0, #16] │ │ adds r1, #1 │ │ str r1, [r0, #16] │ │ add sp, #244 @ 0xf4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #20] @ (55450 ) │ │ + ldr r0, [pc, #20] @ (55660 ) │ │ add r0, pc │ │ - bl 4132c │ │ - ldr r0, [pc, #16] @ (55454 ) │ │ + bl 41634 │ │ + ldr r0, [pc, #16] @ (55664 ) │ │ add r0, pc │ │ - bl 4132c │ │ - ldr r0, [pc, #12] @ (55458 ) │ │ + bl 41634 │ │ + ldr r0, [pc, #12] @ (55668 ) │ │ add r0, pc │ │ - bl 4132c │ │ - ldr r2, [r4, r1] │ │ + bl 41634 │ │ + ldrsb r2, [r4, r1] │ │ movs r0, r1 │ │ - ldr r2, [r1, r2] │ │ + ldrsb r2, [r1, r2] │ │ movs r0, r1 │ │ - ldr r2, [r6, r1] │ │ + ldrsb r2, [r6, r1] │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #268 @ 0x10c │ │ ldrd r3, r6, [r1, #104] @ 0x68 │ │ mov sl, r0 │ │ ldr r0, [sp, #308] @ 0x134 │ │ add.w r7, r3, #32 │ │ rsb r3, r6, r6, lsl #3 │ │ lsls r6, r3, #3 │ │ ldr r3, [sp, #304] @ 0x130 │ │ - cbz r6, 55488 │ │ + cbz r6, 55698 │ │ ldrd r5, r4, [r7], #56 @ 0x38 │ │ subs r6, #56 @ 0x38 │ │ eors r4, r0 │ │ eors r5, r3 │ │ orrs r5, r4 │ │ - bne.n 55476 │ │ - b.n 554a4 │ │ + bne.n 55686 │ │ + b.n 556b4 │ │ ldrd r7, r6, [r1, #116] @ 0x74 │ │ rsb r6, r6, r6, lsl #3 │ │ adds r7, #32 │ │ lsls r6, r6, #3 │ │ - cbz r6, 55500 │ │ + cbz r6, 55710 │ │ ldrd r5, r4, [r7], #56 @ 0x38 │ │ subs r6, #56 @ 0x38 │ │ eors r4, r0 │ │ eors r5, r3 │ │ orrs r5, r4 │ │ - bne.n 55494 │ │ + bne.n 556a4 │ │ sub.w fp, r7, #88 @ 0x58 │ │ ldrd r0, r1, [r1, #48] @ 0x30 │ │ ldrd r3, r7, [r2, #8] │ │ eors r1, r7 │ │ eors r0, r3 │ │ orrs r0, r1 │ │ - bne.n 554ee │ │ + bne.n 556fe │ │ ldrb.w r0, [r2, #80] @ 0x50 │ │ - cbz r0, 55530 │ │ + cbz r0, 55740 │ │ ldr r0, [r2, #64] @ 0x40 │ │ cmp r0, #0 │ │ - bne.w 558d6 │ │ + bne.w 55ae6 │ │ mov r1, r2 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ ldr.w r9, [r1, #68]! │ │ ldrd r3, r8, [r1, #4] │ │ cmp.w r9, #2147483648 @ 0x80000000 │ │ str r0, [r1, #0] │ │ - bne.n 55542 │ │ + bne.n 55752 │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ subs r0, #8 │ │ str.w r0, [sl] │ │ add sp, #268 @ 0x10c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ subs r0, #1 │ │ str.w r0, [sl] │ │ add sp, #268 @ 0x10c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #23 │ │ movs r6, #23 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 558f6 │ │ - ldr r1, [pc, #888] @ (55888 ) │ │ + beq.w 55b06 │ │ + ldr r1, [pc, #888] @ (55a98 ) │ │ movs r2, #23 │ │ mov r5, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #17 │ │ strd r5, r6, [sl, #8] │ │ movt r0, #32768 @ 0x8000 │ │ subs r0, #7 │ │ strd r0, r6, [sl] │ │ add sp, #268 @ 0x10c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ @@ -67798,15 +67894,15 @@ │ │ subs r0, #12 │ │ str.w r0, [sl] │ │ add sp, #268 @ 0x10c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r0, [r2, #16] │ │ strd r1, r3, [sp, #12] │ │ cmp r0, #0 │ │ - bne.w 558d6 │ │ + bne.w 55ae6 │ │ add.w r0, r2, #24 │ │ str r0, [sp, #8] │ │ add r1, sp, #24 │ │ ldmia r0!, {r3, r4, r5, r6, r7} │ │ stmia r1!, {r3, r4, r5, r6, r7} │ │ ldmia.w r0, {r3, r4, r5, r6, r7} │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ @@ -67817,41 +67913,41 @@ │ │ movs r0, #0 │ │ strd r0, r1, [sp, #200] @ 0xc8 │ │ movw r1, #909 @ 0x38d │ │ str r2, [sp, #20] │ │ strd r0, r0, [sp, #192] @ 0xc0 │ │ strd r0, r0, [sp, #208] @ 0xd0 │ │ strd r0, r1, [sp, #216] @ 0xd8 │ │ - b.n 55588 │ │ + b.n 55798 │ │ lsrs r0, r2, #2 │ │ - bne.n 555c6 │ │ + bne.n 557d6 │ │ mov r0, r7 │ │ - bl 481dc │ │ + bl 484e4 │ │ ldr r0, [sp, #212] @ 0xd4 │ │ cmp r0, #0 │ │ - beq.n 55588 │ │ + beq.n 55798 │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r6, #1 │ │ movs r5, #0 │ │ - b.n 555ae │ │ + b.n 557be │ │ umull r2, r4, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r4, r3, r5, r4 │ │ mla r5, r3, r5, r4 │ │ mov r3, r2 │ │ lsls r2, r0, #31 │ │ - beq.n 5559e │ │ + beq.n 557ae │ │ umull r2, r4, r3, r6 │ │ cmp r0, #1 │ │ - beq.n 55584 │ │ + beq.n 55794 │ │ mla r1, r3, r1, r4 │ │ mla r1, r5, r6, r1 │ │ mov r6, r2 │ │ - b.n 5559e │ │ + b.n 557ae │ │ mov r2, r7 │ │ add r1, sp, #128 @ 0x80 │ │ ldmia r2!, {r3, r4, r5, r6} │ │ adds r0, r1, #4 │ │ stmia r0!, {r3, r4, r5, r6} │ │ ldmia.w r2, {r3, r4, r5, r6} │ │ stmia r0!, {r3, r4, r5, r6} │ │ @@ -67869,233 +67965,233 @@ │ │ ldmia r1!, {r2, r3, r4, r5} │ │ stmia r0!, {r2, r3, r4, r5} │ │ ldmia.w r1, {r2, r3, r4, r5, r6} │ │ mov r1, r9 │ │ stmia r0!, {r2, r3, r4, r5, r6} │ │ mov r0, r8 │ │ ldr.w r2, [fp] │ │ - bl 49d00 │ │ + bl 4a008 │ │ add r6, sp, #128 @ 0x80 │ │ movs r4, #17 │ │ add.w ip, sp, #192 @ 0xc0 │ │ movt r4, #32768 @ 0x8000 │ │ ldmia r6, {r0, r1, r2, r3, r6} │ │ cmp r0, #2 │ │ stmia.w ip, {r1, r2, r3, r6} │ │ - bne.n 5562c │ │ + bne.n 5583c │ │ add r3, sp, #192 @ 0xc0 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w sl, {r0, r1, r2, r3} │ │ - b.n 557da │ │ + b.n 559ea │ │ add r6, sp, #192 @ 0xc0 │ │ ldr r5, [sp, #148] @ 0x94 │ │ add.w ip, sp, #224 @ 0xe0 │ │ str r5, [sp, #244] @ 0xf4 │ │ ldmia r6, {r1, r2, r3, r6} │ │ stmia.w ip, {r0, r1, r2, r3, r6} │ │ lsls r0, r0, #31 │ │ - beq.w 558de │ │ + beq.w 55aee │ │ ldr r0, [sp, #320] @ 0x140 │ │ movs r5, #8 │ │ str r0, [sp, #192] @ 0xc0 │ │ ldr r0, [sp, #324] @ 0x144 │ │ eor.w r8, r0, #2147483648 @ 0x80000000 │ │ movs r0, #8 │ │ str.w r8, [sp, #196] @ 0xc4 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 558fe │ │ + beq.w 55b0e │ │ ldr r2, [sp, #312] @ 0x138 │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ str r2, [r0, #0] │ │ ldr r2, [sp, #316] @ 0x13c │ │ ldr r6, [sp, #228] @ 0xe4 │ │ eor.w r4, r2, r1 │ │ add r1, sp, #128 @ 0x80 │ │ strd r5, r7, [sp] │ │ mov r7, r0 │ │ str r4, [r0, #4] │ │ mov r0, r1 │ │ mov r1, r6 │ │ movs r2, #2 │ │ mov r3, r7 │ │ - bl 49e28 │ │ + bl 4a130 │ │ mov r0, r7 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrd r1, r0, [sp, #128] @ 0x80 │ │ lsls r1, r1, #31 │ │ - beq.n 55698 │ │ + beq.n 558a8 │ │ add r3, sp, #136 @ 0x88 │ │ ldmia r3, {r1, r2, r3} │ │ - b.n 556ba │ │ - cbz r0, 556d6 │ │ + b.n 558ca │ │ + cbz r0, 558e6 │ │ ldr.w r2, [fp, #8] │ │ add r0, sp, #128 @ 0x80 │ │ add r1, sp, #64 @ 0x40 │ │ - bl 49d00 │ │ + bl 4a008 │ │ add r7, sp, #128 @ 0x80 │ │ add.w ip, sp, #248 @ 0xf8 │ │ ldmia r7, {r0, r1, r2, r3, r7} │ │ cmp r0, #2 │ │ stmia.w ip, {r1, r2, r3, r7} │ │ - bne.n 556ec │ │ + bne.n 558fc │ │ add r3, sp, #248 @ 0xf8 │ │ ldmia r3, {r0, r1, r2, r3} │ │ movs r4, #17 │ │ str.w r1, [sl, #4] │ │ str.w r2, [sl, #8] │ │ add.w r8, sp, #128 @ 0x80 │ │ str.w r0, [sl] │ │ movt r4, #32768 @ 0x8000 │ │ str.w r3, [sl, #12] │ │ - b.n 557c8 │ │ + b.n 559d8 │ │ movs r4, #17 │ │ add.w r8, sp, #128 @ 0x80 │ │ movt r4, #32768 @ 0x8000 │ │ movs r0, #0 │ │ str.w r4, [sl] │ │ strb.w r0, [sl, #4] │ │ - b.n 557c8 │ │ + b.n 559d8 │ │ add r7, sp, #248 @ 0xf8 │ │ mov r5, r6 │ │ ldr r6, [sp, #148] @ 0x94 │ │ add.w ip, sp, #192 @ 0xc0 │ │ ldmia r7, {r1, r2, r3, r7} │ │ stmia.w ip, {r0, r1, r2, r3, r7} │ │ lsls r0, r0, #31 │ │ str r6, [sp, #212] @ 0xd4 │ │ - beq.w 558de │ │ + beq.w 55aee │ │ ldr r0, [sp, #312] @ 0x138 │ │ strd r0, r4, [sp, #248] @ 0xf8 │ │ movs r0, #8 │ │ movs r4, #8 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 558fe │ │ + beq.w 55b0e │ │ ldr r1, [sp, #320] @ 0x140 │ │ mov r6, r5 │ │ str r1, [r0, #0] │ │ add r1, sp, #248 @ 0xf8 │ │ ldr r5, [sp, #196] @ 0xc4 │ │ mov r7, r0 │ │ strd r4, r1, [sp] │ │ add r1, sp, #128 @ 0x80 │ │ str.w r8, [r0, #4] │ │ movs r2, #2 │ │ mov r0, r1 │ │ mov r1, r5 │ │ mov r3, r7 │ │ - bl 49e28 │ │ + bl 4a130 │ │ mov r0, r7 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrd r1, r0, [sp, #128] @ 0x80 │ │ movs r4, #17 │ │ movt r4, #32768 @ 0x8000 │ │ lsls r1, r1, #31 │ │ - beq.n 5575c │ │ + beq.n 5596c │ │ add r3, sp, #136 @ 0x88 │ │ add.w r8, sp, #128 @ 0x80 │ │ ldmia r3, {r1, r2, r3} │ │ stmia.w sl, {r0, r1, r2, r3} │ │ - b.n 557b8 │ │ + b.n 559c8 │ │ add.w r8, sp, #128 @ 0x80 │ │ - cbz r0, 55794 │ │ + cbz r0, 559a4 │ │ add r0, sp, #128 @ 0x80 │ │ mov r1, r6 │ │ - bl 4ba20 │ │ + bl 4bd28 │ │ ldr r0, [sp, #128] @ 0x80 │ │ cmp r0, r4 │ │ - bne.n 5578a │ │ + bne.n 5599a │ │ add r0, sp, #128 @ 0x80 │ │ mov r1, r5 │ │ - bl 4ba20 │ │ + bl 4bd28 │ │ ldr r0, [sp, #128] @ 0x80 │ │ cmp r0, r4 │ │ - bne.n 5578a │ │ + bne.n 5599a │ │ movs r0, #1 │ │ str.w r4, [sl] │ │ strb.w r0, [sl, #4] │ │ - b.n 557b8 │ │ + b.n 559c8 │ │ add r3, sp, #128 @ 0x80 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w sl, {r0, r1, r2, r3} │ │ - b.n 557b8 │ │ + b.n 559c8 │ │ movs r0, #23 │ │ movs r5, #23 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 558f6 │ │ - ldr r1, [pc, #356] @ (55908 ) │ │ + beq.w 55b06 │ │ + ldr r1, [pc, #356] @ (55b18 ) │ │ movs r2, #23 │ │ mov r7, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ subs r0, r4, #4 │ │ str.w r5, [sl, #12] │ │ stmia.w sl, {r0, r5, r7} │ │ add r0, sp, #192 @ 0xc0 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #192] @ 0xc0 │ │ - cbz r0, 557c8 │ │ + cbz r0, 559d8 │ │ ldr r0, [sp, #196] @ 0xc4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ add r0, sp, #224 @ 0xe0 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #224] @ 0xe0 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #228] @ 0xe4 │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ ldmia.w r9!, {r1, r2, r3, r6, r7} │ │ mov r0, r8 │ │ stmia r0!, {r1, r2, r3, r6, r7} │ │ ldmia.w r9!, {r1, r2, r3, r6, r7} │ │ stmia r0!, {r1, r2, r3, r6, r7} │ │ ldmia.w r9, {r1, r2, r3, r5, r6, r7} │ │ stmia r0!, {r1, r2, r3, r5, r6, r7} │ │ add r0, sp, #192 @ 0xc0 │ │ mov r1, r8 │ │ - bl 4b6b4 │ │ + bl 4b9bc │ │ ldr.w r0, [sl] │ │ cmp r0, r4 │ │ - bne.n 5588c │ │ + bne.n 55a9c │ │ ldr r0, [sp, #20] │ │ ldr r1, [r0, #64] @ 0x40 │ │ cmp r1, #0 │ │ - bne.n 558e6 │ │ + bne.n 55af6 │ │ add r3, sp, #192 @ 0xc0 │ │ ldrd r5, r4, [r0, #68] @ 0x44 │ │ mov.w r7, #4294967295 @ 0xffffffff │ │ ldr r6, [r0, #76] @ 0x4c │ │ ldmia r3, {r1, r2, r3} │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ str r7, [r0, #64] @ 0x40 │ │ ldr r7, [sp, #12] │ │ stmia r7!, {r1, r2, r3} │ │ - beq.n 5583c │ │ - cbz r6, 55830 │ │ + beq.n 55a4c │ │ + cbz r6, 55a40 │ │ mov r7, r4 │ │ ldr.w r0, [r7], #4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r6, #1 │ │ - bne.n 55824 │ │ + bne.n 55a34 │ │ ldr r0, [sp, #20] │ │ - cbz r5, 5583c │ │ + cbz r5, 55a4c │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #20] │ │ ldr r1, [r0, #64] @ 0x40 │ │ ldr r2, [sp, #32] │ │ adds r1, #1 │ │ str r1, [r0, #64] @ 0x40 │ │ cmp.w r2, #2147483648 @ 0x80000000 │ │ - beq.w 5552a │ │ + beq.w 5573a │ │ ldr r1, [r0, #16] │ │ cmp r1, #0 │ │ - bne.n 558ee │ │ + bne.n 55afe │ │ ldr r4, [sp, #8] │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ str r1, [r0, #16] │ │ mov r1, r4 │ │ ldmia r1!, {r2, r3, r5, r6, r7} │ │ stmia.w r8!, {r2, r3, r5, r6, r7} │ │ ldmia.w r1, {r2, r3, r5, r6, r7} │ │ @@ -68103,84 +68199,84 @@ │ │ add r5, sp, #24 │ │ ldmia r5!, {r1, r2, r3, r6, r7} │ │ stmia r4!, {r1, r2, r3, r6, r7} │ │ ldmia.w r5, {r1, r2, r3, r6, r7} │ │ stmia r4!, {r1, r2, r3, r6, r7} │ │ ldr r1, [sp, #136] @ 0x88 │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ - bne.n 558c2 │ │ + bne.n 55ad2 │ │ movs r1, #0 │ │ str r1, [r0, #16] │ │ add sp, #268 @ 0x10c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - asrs r0, r5, #19 │ │ + asrs r0, r3, #11 │ │ @ instruction: 0xfffce9dd │ │ cmp r1, r6 │ │ - cbz r5, 558a0 │ │ + cbz r5, 55ab0 │ │ mov r6, r4 │ │ ldr.w r0, [r6], #4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r5, #1 │ │ - bne.n 55894 │ │ + bne.n 55aa4 │ │ ldr r0, [sp, #192] @ 0xc0 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #32] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 5552a │ │ + beq.w 5573a │ │ add r0, sp, #24 │ │ - bl 4b7a0 │ │ + bl 4baa8 │ │ add sp, #268 @ 0x10c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add r0, sp, #128 @ 0x80 │ │ - bl 4b7a0 │ │ + bl 4baa8 │ │ ldr r0, [sp, #20] │ │ ldr r1, [r0, #16] │ │ adds r1, #1 │ │ str r1, [r0, #16] │ │ add sp, #268 @ 0x10c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #56] @ (55910 ) │ │ + ldr r0, [pc, #56] @ (55b20 ) │ │ add r0, pc │ │ - bl 4132c │ │ - ldr r0, [pc, #52] @ (55914 ) │ │ + bl 41634 │ │ + ldr r0, [pc, #52] @ (55b24 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #48] @ (55918 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #48] @ (55b28 ) │ │ add r0, pc │ │ - bl 4132c │ │ - ldr r0, [pc, #28] @ (5590c ) │ │ + bl 41634 │ │ + ldr r0, [pc, #28] @ (55b1c ) │ │ add r0, pc │ │ - bl 4132c │ │ + bl 41634 │ │ movs r0, #1 │ │ movs r1, #23 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #8 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - asrs r4, r5, #10 │ │ - @ instruction: 0xfffc53cc │ │ + asrs r4, r3, #2 │ │ + @ instruction: 0xfffc51cc │ │ movs r0, r1 │ │ - strh r4, [r0, r7] │ │ + str r4, [r0, r7] │ │ movs r0, r1 │ │ - strh r4, [r5, r1] │ │ + str r4, [r5, r1] │ │ movs r0, r1 │ │ - strh r4, [r4, r7] │ │ + str r4, [r4, r7] │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #96 @ 0x60 │ │ cmp r3, #8 │ │ - bne.w 55b1c │ │ + bne.w 55d2c │ │ mov r6, r2 │ │ ldr r2, [sp, #124] @ 0x7c │ │ cmp r2, #1 │ │ - bls.w 55b10 │ │ + bls.w 55d20 │ │ mov r8, r0 │ │ ldr r0, [sp, #120] @ 0x78 │ │ mov r5, r1 │ │ ldr r7, [r6, #0] │ │ ldr r4, [r6, #4] │ │ add r3, sp, #12 │ │ ldr r6, [r5, #0] │ │ @@ -68188,292 +68284,292 @@ │ │ strd r0, r2, [sp, #12] │ │ movs r0, #0 │ │ str r1, [sp, #20] │ │ ldrd r1, r2, [r6, #80] @ 0x50 │ │ strd r3, r0, [sp] │ │ add r0, sp, #24 │ │ mov r3, r6 │ │ - bl 55b60 │ │ + bl 55d70 │ │ movw r0, #31829 @ 0x7c55 │ │ ldr r2, [r5, #4] │ │ movt r0, #32586 @ 0x7f4a │ │ muls r0, r7 │ │ ldr r3, [r2, #0] │ │ ldr r1, [r2, #16] │ │ ands r0, r3 │ │ cmp r1, r0 │ │ - bls.w 55b32 │ │ + bls.w 55d42 │ │ ldr r1, [r2, #12] │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r0, r1, r0, lsl #2 │ │ ldrd r0, r1, [r0, #4] │ │ add.w r1, r1, r1, lsl #1 │ │ subs r0, #24 │ │ lsls r1, r1, #3 │ │ cmp r1, #0 │ │ - beq.n 55a86 │ │ + beq.n 55c96 │ │ ldr.w r2, [r0, #24]! │ │ subs r1, #24 │ │ ldr r3, [r0, #4] │ │ eors r2, r7 │ │ eors r3, r4 │ │ eor.w r3, r3, #2147483648 @ 0x80000000 │ │ orrs r2, r3 │ │ - bne.n 55988 │ │ + bne.n 55b98 │ │ ldrd r3, r7, [r0, #8] │ │ ldr r0, [r0, #16] │ │ strd r3, r7, [sp, #48] @ 0x30 │ │ add r7, sp, #36 @ 0x24 │ │ ldrd r1, r2, [r6, #80] @ 0x50 │ │ add r3, sp, #48 @ 0x30 │ │ str r0, [sp, #56] @ 0x38 │ │ movs r0, #0 │ │ strd r3, r0, [sp] │ │ mov r0, r7 │ │ mov r3, r6 │ │ - bl 55b60 │ │ + bl 55d70 │ │ add r1, sp, #24 │ │ mov r0, r7 │ │ - bl 57084 │ │ - cbz r0, 55a08 │ │ + bl 57294 │ │ + cbz r0, 55c18 │ │ ldr r0, [r5, #8] │ │ movs r2, #1 │ │ strb.w r2, [r8, #4] │ │ movs r2, #13 │ │ movt r2, #32768 @ 0x8000 │ │ ldr r1, [sp, #36] @ 0x24 │ │ ldr r3, [r0, #0] │ │ adds r2, #4 │ │ str.w r2, [r8] │ │ add.w r2, r3, #1 │ │ str r2, [r0, #0] │ │ mov.w r0, #0 │ │ - cbz r1, 55a26 │ │ + cbz r1, 55c36 │ │ add.w ip, sp, #68 @ 0x44 │ │ ldrd r3, r2, [sp, #40] @ 0x28 │ │ stmia.w ip, {r0, r1, r3} │ │ add.w ip, sp, #52 @ 0x34 │ │ stmia.w ip, {r0, r1, r3} │ │ movs r0, #1 │ │ - b.n 55a28 │ │ + b.n 55c38 │ │ ldr r2, [sp, #36] @ 0x24 │ │ movs r0, #0 │ │ - cbz r2, 55a66 │ │ + cbz r2, 55c76 │ │ add.w ip, sp, #68 @ 0x44 │ │ ldrd r3, r1, [sp, #40] @ 0x28 │ │ stmia.w ip, {r0, r2, r3} │ │ add.w ip, sp, #52 @ 0x34 │ │ stmia.w ip, {r0, r2, r3} │ │ movs r0, #1 │ │ - b.n 55a68 │ │ + b.n 55c78 │ │ movs r2, #0 │ │ add r4, sp, #84 @ 0x54 │ │ add r5, sp, #48 @ 0x30 │ │ str r2, [sp, #80] @ 0x50 │ │ str r0, [sp, #64] @ 0x40 │ │ str r0, [sp, #48] @ 0x30 │ │ mov r0, r4 │ │ mov r1, r5 │ │ - bl 4de98 │ │ + bl 331f8 │ │ ldr r0, [sp, #84] @ 0x54 │ │ - cbz r0, 55a46 │ │ + cbz r0, 55c56 │ │ ldr r1, [sp, #92] @ 0x5c │ │ - bl 4e028 │ │ - b.n 55a32 │ │ + bl 4e238 │ │ + b.n 55c42 │ │ ldr r2, [sp, #24] │ │ movs r0, #0 │ │ cmp r2, #0 │ │ - beq.n 55aea │ │ + beq.n 55cfa │ │ add.w ip, sp, #68 @ 0x44 │ │ ldrd r3, r1, [sp, #28] │ │ stmia.w ip, {r0, r2, r3} │ │ add.w ip, sp, #52 @ 0x34 │ │ stmia.w ip, {r0, r2, r3} │ │ movs r0, #1 │ │ - b.n 55aec │ │ + b.n 55cfc │ │ movs r1, #0 │ │ add r5, sp, #84 @ 0x54 │ │ add r6, sp, #48 @ 0x30 │ │ str r1, [sp, #80] @ 0x50 │ │ str r0, [sp, #64] @ 0x40 │ │ str r0, [sp, #48] @ 0x30 │ │ mov r0, r5 │ │ mov r1, r6 │ │ - bl 4de98 │ │ + bl 331f8 │ │ ldr r0, [sp, #84] @ 0x54 │ │ - cbz r0, 55a86 │ │ + cbz r0, 55c96 │ │ ldr r1, [sp, #92] @ 0x5c │ │ - bl 4e028 │ │ - b.n 55a72 │ │ + bl 4e238 │ │ + b.n 55c82 │ │ movs r0, #27 │ │ movs r4, #27 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 55b3a │ │ - ldr r1, [pc, #176] @ (55b44 ) │ │ + beq.n 55d4a │ │ + ldr r1, [pc, #176] @ (55d54 ) │ │ movs r2, #27 │ │ mov r5, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #13 │ │ ldr r2, [sp, #24] │ │ movt r0, #32768 @ 0x8000 │ │ str.w r4, [r8, #12] │ │ stmia.w r8, {r0, r4, r5} │ │ movs r0, #0 │ │ - cbz r2, 55aca │ │ + cbz r2, 55cda │ │ add.w ip, sp, #68 @ 0x44 │ │ ldrd r3, r1, [sp, #28] │ │ stmia.w ip, {r0, r2, r3} │ │ add.w ip, sp, #52 @ 0x34 │ │ stmia.w ip, {r0, r2, r3} │ │ movs r0, #1 │ │ - b.n 55acc │ │ + b.n 55cdc │ │ movs r1, #0 │ │ add r4, sp, #84 @ 0x54 │ │ add r5, sp, #48 @ 0x30 │ │ str r1, [sp, #80] @ 0x50 │ │ str r0, [sp, #64] @ 0x40 │ │ str r0, [sp, #48] @ 0x30 │ │ mov r0, r4 │ │ mov r1, r5 │ │ - bl 4de98 │ │ + bl 331f8 │ │ ldr r0, [sp, #84] @ 0x54 │ │ - cbz r0, 55b0a │ │ + cbz r0, 55d1a │ │ ldr r1, [sp, #92] @ 0x5c │ │ - bl 4e028 │ │ - b.n 55ad6 │ │ + bl 4e238 │ │ + b.n 55ce6 │ │ movs r1, #0 │ │ add r4, sp, #84 @ 0x54 │ │ add r5, sp, #48 @ 0x30 │ │ str r1, [sp, #80] @ 0x50 │ │ str r0, [sp, #64] @ 0x40 │ │ str r0, [sp, #48] @ 0x30 │ │ mov r0, r4 │ │ mov r1, r5 │ │ - bl 4de98 │ │ + bl 331f8 │ │ ldr r0, [sp, #84] @ 0x54 │ │ - cbz r0, 55b0a │ │ + cbz r0, 55d1a │ │ ldr r1, [sp, #92] @ 0x5c │ │ - bl 4e028 │ │ - b.n 55af6 │ │ + bl 4e238 │ │ + b.n 55d06 │ │ add sp, #96 @ 0x60 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ - ldr r3, [pc, #64] @ (55b54 ) │ │ + ldr r3, [pc, #64] @ (55d64 ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #40] @ (55b48 ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #40] @ (55d58 ) │ │ add r2, sp, #48 @ 0x30 │ │ - ldr r3, [pc, #40] @ (55b4c ) │ │ - ldr r1, [pc, #44] @ (55b50 ) │ │ + ldr r3, [pc, #40] @ (55d5c ) │ │ + ldr r1, [pc, #44] @ (55d60 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ - ldr r2, [pc, #36] @ (55b58 ) │ │ + bl 417b8 │ │ + ldr r2, [pc, #36] @ (55d68 ) │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ movs r0, #1 │ │ movs r1, #27 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - lsrs r4, r3, #30 │ │ - vqrshrn.u64 d19, , #4 │ │ - @ instruction: 0xfffc4e26 │ │ + lsrs r4, r1, #22 │ │ + vqabs.s , │ │ + @ instruction: 0xfffc4bf6 │ │ movs r0, r1 │ │ - ldr r7, [pc, #272] @ (55c64 ) │ │ + ldr r5, [pc, #272] @ (55e74 ) │ │ movs r0, r1 │ │ - ldr r7, [pc, #88] @ (55bb0 ) │ │ + ldr r5, [pc, #88] @ (55dc0 ) │ │ movs r0, r1 │ │ - ldr r7, [pc, #480] @ (55d3c ) │ │ + ldr r5, [pc, #480] @ (55f4c ) │ │ movs r0, r1 │ │ - bmi.n 55b08 │ │ - bmi.n 55b0a │ │ + bmi.n 55d18 │ │ + bmi.n 55d1a │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #4 │ │ vpush {d8-d12} │ │ sub sp, #360 @ 0x168 │ │ mov r8, r0 │ │ movs r0, #0 │ │ cmp r2, #0 │ │ str r3, [sp, #192] @ 0xc0 │ │ str r0, [sp, #216] @ 0xd8 │ │ str r0, [sp, #208] @ 0xd0 │ │ - beq.w 56eac │ │ + beq.w 570bc │ │ mov r9, r0 │ │ add.w r0, r2, r2, lsl #2 │ │ mov r7, r1 │ │ ldrd r1, fp, [sp, #440] @ 0x1b8 │ │ add.w r0, r7, r0, lsl #3 │ │ str r0, [sp, #196] @ 0xc4 │ │ ldr r0, [sp, #192] @ 0xc0 │ │ add r5, sp, #264 @ 0x108 │ │ - vldr s16, [pc, #936] @ 55f3c │ │ - vldr d9, [pc, #936] @ 55f40 │ │ + vldr s16, [pc, #936] @ 5614c │ │ + vldr d9, [pc, #936] @ 56150 │ │ ldr r2, [r0, #0] │ │ str r2, [sp, #156] @ 0x9c │ │ ldrd r0, r2, [r0, #12] │ │ str r0, [sp, #152] @ 0x98 │ │ ldr r0, [r1, #0] │ │ str r0, [sp, #180] @ 0xb4 │ │ ldr r0, [r1, #4] │ │ str r0, [sp, #184] @ 0xb8 │ │ ldr r0, [r1, #8] │ │ str r0, [sp, #188] @ 0xbc │ │ adds r0, r5, #1 │ │ str r0, [sp, #176] @ 0xb0 │ │ str r2, [sp, #160] @ 0xa0 │ │ - b.n 55bf0 │ │ + b.n 55e00 │ │ movs r6, #1 │ │ mov r0, r6 │ │ mov r1, r5 │ │ mov r2, r4 │ │ - bl d53c6 │ │ + bl d52ea │ │ add r5, sp, #264 @ 0x108 │ │ add r1, sp, #208 @ 0xd0 │ │ add r2, sp, #344 @ 0x158 │ │ add r3, sp, #224 @ 0xe0 │ │ mov r0, r5 │ │ str r4, [sp, #352] @ 0x160 │ │ strd r4, r6, [sp, #344] @ 0x158 │ │ - bl 57320 │ │ + bl 57530 │ │ ldrb.w r0, [sp, #264] @ 0x108 │ │ cmp r0, #6 │ │ itt ne │ │ movne r0, r5 │ │ - blne 4dd34 │ │ + blne 4e03c │ │ adds r7, #40 @ 0x28 │ │ ldr r0, [sp, #196] @ 0xc4 │ │ cmp r7, r0 │ │ - beq.w 56eac │ │ + beq.w 570bc │ │ mov.w sl, #2147483648 @ 0x80000000 │ │ cmp.w fp, #0 │ │ - beq.n 55c2c │ │ + beq.n 55e3c │ │ ldrb.w r4, [r7, #32] │ │ ldr r1, [r7, #28] │ │ ldr r0, [sp, #440] @ 0x1b8 │ │ mov r2, r4 │ │ - bl 49978 │ │ - cbz r0, 55c30 │ │ + bl 49c80 │ │ + cbz r0, 55e40 │ │ movs r0, #0 │ │ strb.w r0, [sp, #224] @ 0xe0 │ │ ldrd r5, r4, [r7, #20] │ │ mov.w r9, #0 │ │ cmp r4, #0 │ │ - beq.n 55bb8 │ │ + beq.n 55dc8 │ │ mov r0, r4 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 56f9c │ │ + beq.w 571ac │ │ mov r6, r0 │ │ - b.n 55bba │ │ + b.n 55dca │ │ ldrb.w r4, [r7, #32] │ │ tbh [pc, r4, lsl #1] │ │ movs r0, r2 │ │ lsls r2, r1, #6 │ │ lsls r7, r5, #2 │ │ lsls r1, r7, #3 │ │ lsls r4, r2, #1 │ │ @@ -68487,359 +68583,359 @@ │ │ lsls r7, r4, #1 │ │ lsls r4, r0, #7 │ │ movs r6, r4 │ │ lsls r2, r0, #3 │ │ ldr r0, [r7, #28] │ │ ldr r1, [sp, #188] @ 0xbc │ │ cmp r1, r0 │ │ - bls.w 56232 │ │ + bls.w 56442 │ │ ldr r2, [sp, #136] @ 0x88 │ │ ldr r1, [sp, #184] @ 0xb8 │ │ cmp r0, r1 │ │ - bcs.w 56fe4 │ │ + bcs.w 571f4 │ │ ldr r1, [sp, #180] @ 0xb4 │ │ ldrb r0, [r1, r0] │ │ cmp r0, #0 │ │ - beq.w 56642 │ │ + beq.w 56852 │ │ subs r0, #2 │ │ clz r0, r0 │ │ lsrs r2, r0, #5 │ │ movs r0, #1 │ │ - b.w 56644 │ │ + b.w 56854 │ │ ldr r2, [r7, #28] │ │ add r0, sp, #344 @ 0x158 │ │ ldr r1, [sp, #440] @ 0x1b8 │ │ - bl 4299c │ │ + bl 42ca4 │ │ ldr r6, [sp, #344] @ 0x158 │ │ cmp.w r6, #2147483648 @ 0x80000000 │ │ - bne.w 56168 │ │ + bne.w 56378 │ │ ldr r0, [sp, #120] @ 0x78 │ │ str r0, [sp, #232] @ 0xe8 │ │ ldr r0, [sp, #124] @ 0x7c │ │ str r0, [sp, #228] @ 0xe4 │ │ movs r0, #0 │ │ strb.w r0, [sp, #224] @ 0xe0 │ │ ldr r0, [sp, #116] @ 0x74 │ │ str r0, [sp, #236] @ 0xec │ │ - b.n 55c10 │ │ + b.n 55e20 │ │ cmp.w fp, #0 │ │ - beq.w 561aa │ │ + beq.w 563ba │ │ ldr r2, [r7, #28] │ │ mov r0, r5 │ │ ldr r1, [sp, #440] @ 0x1b8 │ │ str r7, [sp, #172] @ 0xac │ │ - bl 42814 │ │ + bl 42b1c │ │ ldr r7, [sp, #264] @ 0x108 │ │ ldrd r1, r0, [sp, #20] │ │ cmp.w r7, #2147483648 @ 0x80000000 │ │ - bne.w 56462 │ │ + bne.w 56672 │ │ str r0, [sp, #232] @ 0xe8 │ │ ldr r0, [sp, #12] │ │ str r0, [sp, #228] @ 0xe4 │ │ movs r0, #0 │ │ strb.w r0, [sp, #224] @ 0xe0 │ │ str r1, [sp, #236] @ 0xec │ │ ldr r7, [sp, #172] @ 0xac │ │ - b.n 55c10 │ │ + b.n 55e20 │ │ ldr r0, [r7, #28] │ │ ldr r1, [sp, #188] @ 0xbc │ │ cmp r1, r0 │ │ - bls.w 561ce │ │ + bls.w 563de │ │ ldr r1, [sp, #184] @ 0xb8 │ │ cmp r1, r0 │ │ - bcc.w 56f24 │ │ + bcc.w 57134 │ │ subs r2, r1, r0 │ │ cmp r2, #7 │ │ - bls.w 56f02 │ │ + bls.w 57112 │ │ ldr r2, [sp, #180] @ 0xb4 │ │ ldr r1, [r2, r0] │ │ add r0, r2 │ │ ldr r0, [r0, #4] │ │ lsrs r2, r0, #31 │ │ - b.n 561d6 │ │ + b.n 563e6 │ │ cmp.w fp, #0 │ │ - beq.w 561e8 │ │ + beq.w 563f8 │ │ ldr r2, [r7, #28] │ │ mov r0, r5 │ │ ldr r1, [sp, #440] @ 0x1b8 │ │ - bl 42384 │ │ + bl 4268c │ │ ldr r6, [sp, #264] @ 0x108 │ │ ldr r0, [sp, #48] @ 0x30 │ │ ldrd r2, r1, [sp, #40] @ 0x28 │ │ cmp.w r6, #2147483648 @ 0x80000000 │ │ - bne.w 564f8 │ │ + bne.w 56708 │ │ strd r1, r0, [sp, #228] @ 0xe4 │ │ - b.n 56264 │ │ + b.n 56474 │ │ ldr r2, [r7, #28] │ │ mov r0, r5 │ │ ldr r1, [sp, #440] @ 0x1b8 │ │ mov sl, r8 │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r0, [sp, #264] @ 0x108 │ │ cmp r0, #1 │ │ - bne.w 56fc2 │ │ + bne.w 571d2 │ │ ldrd r4, r8, [sp, #268] @ 0x10c │ │ adds.w r1, r8, r4 │ │ - bcs.w 56eda │ │ + bcs.w 570ea │ │ ldr r0, [sp, #184] @ 0xb8 │ │ cmp r1, r0 │ │ - bhi.w 56eda │ │ + bhi.w 570ea │ │ movw r0, #21845 @ 0x5555 │ │ movt r0, #1365 @ 0x555 │ │ cmp r8, r0 │ │ - bhi.w 56ea8 │ │ + bhi.w 570b8 │ │ add.w r0, r8, r8, lsl #1 │ │ str r7, [sp, #172] @ 0xac │ │ lsls r5, r0, #3 │ │ - beq.w 5667c │ │ + beq.w 5688c │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 56fd2 │ │ + beq.w 571e2 │ │ mov r1, r8 │ │ mov.w r9, #0 │ │ cmp.w r8, #0 │ │ str.w r9, [sp, #272] @ 0x110 │ │ strd r1, r0, [sp, #264] @ 0x108 │ │ - bne.w 5668e │ │ - b.w 566c4 │ │ + bne.w 5689e │ │ + b.w 568d4 │ │ ldr r0, [r7, #28] │ │ ldr r1, [sp, #188] @ 0xbc │ │ cmp r1, r0 │ │ - bls.w 56216 │ │ + bls.w 56426 │ │ ldr r1, [sp, #184] @ 0xb8 │ │ cmp r1, r0 │ │ - bcc.w 56f38 │ │ + bcc.w 57148 │ │ subs r2, r1, r0 │ │ cmp r2, #3 │ │ - bls.w 56f0e │ │ + bls.w 5711e │ │ ldr r1, [sp, #180] @ 0xb4 │ │ movs r2, #0 │ │ ldr r0, [r1, r0] │ │ lsrs r3, r0, #31 │ │ asrs r1, r0, #31 │ │ - b.n 56222 │ │ + b.n 56432 │ │ ldr r0, [r7, #0] │ │ lsls r0, r0, #31 │ │ - beq.w 56ef2 │ │ + beq.w 57102 │ │ ldr r1, [r7, #8] │ │ movw r0, #31829 @ 0x7c55 │ │ movt r0, #32586 @ 0x7f4a │ │ ldr r2, [sp, #156] @ 0x9c │ │ muls r0, r1 │ │ ands r0, r2 │ │ ldr r2, [sp, #160] @ 0xa0 │ │ cmp r2, r0 │ │ - bls.w 56fb8 │ │ + bls.w 571c8 │ │ add.w r0, r0, r0, lsl #1 │ │ ldr r3, [sp, #152] @ 0x98 │ │ str r7, [sp, #172] @ 0xac │ │ add.w r0, r3, r0, lsl #2 │ │ ldr r2, [r7, #12] │ │ ldrd r0, r3, [r0, #4] │ │ sub.w r7, r0, #24 │ │ add.w r0, r3, r3, lsl #1 │ │ lsls r0, r0, #3 │ │ cmp r0, #0 │ │ - beq.w 56f94 │ │ + beq.w 571a4 │ │ ldr.w r3, [r7, #24]! │ │ subs r0, #24 │ │ ldr r6, [r7, #4] │ │ eors r3, r1 │ │ eors r6, r2 │ │ orrs r3, r6 │ │ - bne.n 55df4 │ │ + bne.n 56004 │ │ ldr r0, [sp, #172] @ 0xac │ │ ldr r1, [sp, #440] @ 0x1b8 │ │ ldr r2, [r0, #28] │ │ add r0, sp, #252 @ 0xfc │ │ - bl 4a0f8 │ │ + bl 4a400 │ │ ldr r2, [sp, #252] @ 0xfc │ │ cmp.w r2, #2147483648 @ 0x80000000 │ │ - bne.w 562c2 │ │ + bne.w 564d2 │ │ movs r0, #0 │ │ ldr r7, [sp, #172] @ 0xac │ │ - b.n 55c0c │ │ + b.n 55e1c │ │ vmov.f32 s24, s16 │ │ ldr r0, [r7, #28] │ │ ldr r1, [sp, #188] @ 0xbc │ │ cmp r1, r0 │ │ - bls.n 55e4a │ │ + bls.n 5605a │ │ ldr r1, [sp, #184] @ 0xb8 │ │ cmp r1, r0 │ │ - bcc.w 56f2e │ │ + bcc.w 5713e │ │ subs r2, r1, r0 │ │ cmp r2, #3 │ │ - bls.w 56f0e │ │ + bls.w 5711e │ │ ldr r1, [sp, #180] @ 0xb4 │ │ ldr r0, [r1, r0] │ │ vmov s24, r0 │ │ vmov r0, s24 │ │ bic.w r0, r0, #2147483648 @ 0x80000000 │ │ cmp.w r0, #2139095040 @ 0x7f800000 │ │ - blt.w 562a4 │ │ + blt.w 564b4 │ │ movs r0, #0 │ │ - b.n 562b4 │ │ + b.n 564c4 │ │ ldr r0, [r7, #0] │ │ lsls r0, r0, #31 │ │ - beq.w 56efa │ │ + beq.w 5710a │ │ ldr r1, [r7, #8] │ │ movw r0, #31829 @ 0x7c55 │ │ movt r0, #32586 @ 0x7f4a │ │ ldr r2, [sp, #156] @ 0x9c │ │ muls r0, r1 │ │ ands r0, r2 │ │ ldr r2, [sp, #160] @ 0xa0 │ │ cmp r2, r0 │ │ - bls.w 56fb8 │ │ + bls.w 571c8 │ │ add.w r0, r0, r0, lsl #1 │ │ ldr r3, [sp, #152] @ 0x98 │ │ ldr r2, [r7, #12] │ │ mov sl, r8 │ │ add.w r0, r3, r0, lsl #2 │ │ mov r8, r7 │ │ ldrd r0, r3, [r0, #4] │ │ add.w r3, r3, r3, lsl #1 │ │ subs r0, #24 │ │ lsls r3, r3, #3 │ │ cmp r3, #0 │ │ - beq.w 56f8c │ │ + beq.w 5719c │ │ ldr.w r7, [r0, #24]! │ │ subs r3, #24 │ │ ldr r6, [r0, #4] │ │ eors r7, r1 │ │ eors r6, r2 │ │ orrs r7, r6 │ │ - bne.n 55e9a │ │ + bne.n 560aa │ │ ldr.w r2, [r8, #28] │ │ mov r7, r8 │ │ ldr r1, [sp, #440] @ 0x1b8 │ │ ldrd r5, r4, [r0, #12] │ │ add r0, sp, #264 @ 0x108 │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r0, [sp, #264] @ 0x108 │ │ cmp r0, #1 │ │ - bne.w 5645a │ │ + bne.w 5666a │ │ ldrd r0, r2, [sp, #268] @ 0x10c │ │ adds r1, r2, r0 │ │ - bcs.w 56f1a │ │ + bcs.w 5712a │ │ ldr r3, [sp, #184] @ 0xb8 │ │ cmp r1, r3 │ │ - bhi.w 56f1a │ │ + bhi.w 5712a │ │ cmp r2, #1 │ │ - bls.w 56f4c │ │ + bls.w 5715c │ │ ldr r3, [sp, #180] @ 0xb4 │ │ add r6, sp, #332 @ 0x14c │ │ ldrh r1, [r3, r0] │ │ add r0, r3 │ │ ldr r3, [sp, #192] @ 0xc0 │ │ str r0, [sp, #252] @ 0xfc │ │ add r0, sp, #252 @ 0xfc │ │ strd r0, fp, [sp] │ │ mov r0, r6 │ │ strd r2, r1, [sp, #256] @ 0x100 │ │ mov r1, r5 │ │ mov r2, r4 │ │ - bl 55b60 │ │ + bl 55d70 │ │ add r4, sp, #264 @ 0x108 │ │ mov r1, r6 │ │ mov r0, r4 │ │ - bl 57a80 │ │ + bl 57c90 │ │ ldrb.w r0, [sp, #264] @ 0x108 │ │ cmp r0, #6 │ │ - beq.w 56f58 │ │ + beq.w 57168 │ │ mov r0, r4 │ │ add r1, sp, #224 @ 0xe0 │ │ ldmia.w r0, {r2, r3, r4, r5, r6, r7} │ │ stmia r1!, {r2, r3, r4, r5, r6, r7} │ │ ldr r1, [sp, #332] @ 0x14c │ │ cmp r1, #0 │ │ - beq.w 566e0 │ │ + beq.w 568f0 │ │ ldrd r2, r0, [sp, #336] @ 0x150 │ │ strd r9, r1, [sp, #284] @ 0x11c │ │ strd r9, r1, [sp, #268] @ 0x10c │ │ movs r1, #1 │ │ str r2, [sp, #292] @ 0x124 │ │ str r2, [sp, #276] @ 0x114 │ │ - b.n 566e4 │ │ + b.n 568f4 │ │ movs r0, r0 │ │ ldrb r0, [r0, #31] │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ ldrb r0, [r7, #31] │ │ ldr r0, [r7, #28] │ │ ldr r1, [sp, #188] @ 0xbc │ │ cmp r1, r0 │ │ - bls.w 56238 │ │ + bls.w 56448 │ │ ldr r1, [sp, #184] @ 0xb8 │ │ cmp r0, r1 │ │ - bcs.w 56fda │ │ + bcs.w 571ea │ │ ldr r1, [sp, #180] @ 0xb4 │ │ ldrb r0, [r1, r0] │ │ - b.n 5623a │ │ + b.n 5644a │ │ vmov.f64 d12, d9 │ │ ldr r0, [r7, #28] │ │ ldr r1, [sp, #188] @ 0xbc │ │ cmp r1, r0 │ │ - bls.n 55f8c │ │ + bls.n 5619c │ │ ldr r1, [sp, #184] @ 0xb8 │ │ cmp r1, r0 │ │ - bcc.w 56f42 │ │ + bcc.w 57152 │ │ subs r2, r1, r0 │ │ cmp r2, #7 │ │ - bls.w 56f02 │ │ + bls.w 57112 │ │ ldr r2, [sp, #180] @ 0xb4 │ │ ldr r1, [r2, r0] │ │ add r0, r2 │ │ ldr r0, [r0, #4] │ │ strd r1, r0, [sp, #200] @ 0xc8 │ │ vldr d12, [sp, #200] @ 0xc8 │ │ vmov r0, r1, d12 │ │ movw r2, #65535 @ 0xffff │ │ movs r0, #0 │ │ movt r2, #32751 @ 0x7fef │ │ strb.w r0, [sp, #264] @ 0x108 │ │ bic.w r1, r1, #2147483648 @ 0x80000000 │ │ cmp r1, r2 │ │ - bgt.n 55fae │ │ + bgt.n 561be │ │ mov r0, r5 │ │ - bl 75052 │ │ + bl 75106 │ │ movs r0, #2 │ │ movs r1, #2 │ │ str.w r9, [sp, #236] @ 0xec │ │ str r1, [sp, #232] @ 0xe8 │ │ vstr d12, [sp, #240] @ 0xf0 │ │ - b.n 55c0c │ │ + b.n 55e1c │ │ cmp.w fp, #0 │ │ - beq.w 56246 │ │ + beq.w 56456 │ │ ldr r2, [r7, #28] │ │ mov r0, r5 │ │ ldr r1, [sp, #440] @ 0x1b8 │ │ - bl 428d4 │ │ + bl 42bdc │ │ ldr r6, [sp, #264] @ 0x108 │ │ ldr r0, [sp, #36] @ 0x24 │ │ ldrd r2, r1, [sp, #28] │ │ cmp.w r6, #2147483648 @ 0x80000000 │ │ - beq.w 56260 │ │ + beq.w 56470 │ │ mov sl, r8 │ │ ldr.w r8, [sp, #272] @ 0x110 │ │ cmp.w r8, #134217728 @ 0x8000000 │ │ - bcs.w 56ea8 │ │ + bcs.w 570b8 │ │ ldr.w fp, [sp, #268] @ 0x10c │ │ cmp.w r8, #0 │ │ str r7, [sp, #172] @ 0xac │ │ - beq.w 56a1c │ │ + beq.w 56c2c │ │ mov.w r5, r8, lsl #4 │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ movw r4, #21845 @ 0x5555 │ │ cmp r0, #0 │ │ movt r4, #1365 @ 0x555 │ │ - beq.w 56fd2 │ │ + beq.w 571e2 │ │ mov.w r5, r8, lsl #3 │ │ sub.w r1, r5, #8 │ │ movs r2, #1 │ │ add.w r7, r2, r1, lsr #3 │ │ add.w r1, r0, #8 │ │ mov r2, fp │ │ vldmia r2!, {d16} │ │ @@ -68848,406 +68944,406 @@ │ │ vmrs APSR_nzcv, fpscr │ │ vstr d16, [r1] │ │ it vc │ │ movvc r3, #1 │ │ strd r3, r9, [r1, #-8] │ │ adds r1, #16 │ │ subs r5, #8 │ │ - bne.n 56026 │ │ + bne.n 56236 │ │ mov.w r9, #0 │ │ mov r5, r0 │ │ - b.w 56a2c │ │ + b.w 56c3c │ │ ldr r2, [r7, #28] │ │ mov r0, r5 │ │ ldr r1, [sp, #440] @ 0x1b8 │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r0, [sp, #264] @ 0x108 │ │ cmp r0, #1 │ │ - bne.w 5626a │ │ + bne.w 5647a │ │ ldrd r4, r5, [sp, #268] @ 0x10c │ │ adds r1, r5, r4 │ │ - bcs.w 56eda │ │ + bcs.w 570ea │ │ ldr r0, [sp, #184] @ 0xb8 │ │ cmp r1, r0 │ │ - bhi.w 56eda │ │ + bhi.w 570ea │ │ cmp r5, #0 │ │ - beq.w 5665e │ │ + beq.w 5686e │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ mov r6, r0 │ │ cmp r0, #0 │ │ - bne.w 56660 │ │ - b.w 56fb0 │ │ + bne.w 56870 │ │ + b.w 571c0 │ │ cmp.w fp, #0 │ │ - beq.w 56272 │ │ + beq.w 56482 │ │ ldr r2, [r7, #28] │ │ mov r0, r5 │ │ ldr r1, [sp, #440] @ 0x1b8 │ │ str r7, [sp, #172] @ 0xac │ │ - bl 498b8 │ │ + bl 49bc0 │ │ ldr r7, [sp, #264] @ 0x108 │ │ ldr r0, [sp, #60] @ 0x3c │ │ ldrd r2, r1, [sp, #52] @ 0x34 │ │ cmp.w r7, #2147483648 @ 0x80000000 │ │ - bne.w 565cc │ │ + bne.w 567dc │ │ strd r0, r1, [sp, #228] @ 0xe4 │ │ movs r0, #0 │ │ strb.w r0, [sp, #224] @ 0xe0 │ │ str r2, [sp, #236] @ 0xec │ │ ldr r7, [sp, #172] @ 0xac │ │ - b.n 55c10 │ │ + b.n 55e20 │ │ ldr r2, [r7, #28] │ │ mov r0, r5 │ │ ldr r1, [sp, #440] @ 0x1b8 │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r0, [sp, #264] @ 0x108 │ │ cmp r0, #1 │ │ - bne.w 56fca │ │ + bne.w 571da │ │ ldr r6, [sp, #272] @ 0x110 │ │ cmp.w r6, #4294967295 @ 0xffffffff │ │ - ble.w 56ea8 │ │ + ble.w 570b8 │ │ cmp r6, #0 │ │ - beq.w 5664e │ │ + beq.w 5685e │ │ mov r0, r6 │ │ mov sl, r8 │ │ ldr r5, [sp, #268] @ 0x10c │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 56ff6 │ │ + beq.w 57206 │ │ subs r1, r6, #1 │ │ mov r8, r0 │ │ mov r9, r7 │ │ - beq.n 56108 │ │ + beq.n 56318 │ │ mov r0, r8 │ │ movs r2, #2 │ │ - bl d50b2 │ │ + bl d5294 │ │ add.w r0, r8, r6 │ │ subs r0, #1 │ │ movs r1, #2 │ │ strb r1, [r0, #0] │ │ ldr r0, [sp, #184] @ 0xb8 │ │ subs r1, r0, r5 │ │ mov.w r0, #0 │ │ it cc │ │ movcc r1, r0 │ │ ldr r2, [sp, #180] @ 0xb4 │ │ add r2, r5 │ │ cmp r1, r0 │ │ - beq.w 56fa4 │ │ + beq.w 571b4 │ │ ldrb r3, [r2, r0] │ │ subs r7, r3, #2 │ │ cmp r3, #0 │ │ clz r7, r7 │ │ mov.w r7, r7, lsr #5 │ │ it eq │ │ moveq r7, #2 │ │ strb.w r7, [r8, r0] │ │ adds r0, #1 │ │ cmp r6, r0 │ │ - bne.n 5611c │ │ + bne.n 5632c │ │ movw r0, #21845 @ 0x5555 │ │ movt r0, #1365 @ 0x555 │ │ cmp r6, r0 │ │ - bhi.w 56ea8 │ │ + bhi.w 570b8 │ │ add.w r0, r6, r6, lsl #1 │ │ movs r7, #0 │ │ lsls r5, r0, #3 │ │ - beq.w 5683a │ │ + beq.w 56a4a │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 56fd2 │ │ + beq.w 571e2 │ │ mov r1, r6 │ │ - b.n 5683e │ │ + b.n 56a4e │ │ ldr r5, [sp, #352] @ 0x160 │ │ movw r0, #21845 @ 0x5555 │ │ movt r0, #1365 @ 0x555 │ │ cmp r5, r0 │ │ - bhi.w 56ea8 │ │ + bhi.w 570b8 │ │ ldr r0, [sp, #348] @ 0x15c │ │ str r0, [sp, #168] @ 0xa8 │ │ add.w r0, r5, r5, lsl #1 │ │ str.w r8, [sp, #144] @ 0x90 │ │ lsls r4, r0, #3 │ │ - beq.w 5670c │ │ + beq.w 5691c │ │ mov r0, r4 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 56fee │ │ + beq.w 571fe │ │ mov fp, r0 │ │ mov r2, r5 │ │ movs r1, #0 │ │ cmp r5, #0 │ │ str r1, [sp, #272] @ 0x110 │ │ strd r2, fp, [sp, #264] @ 0x108 │ │ - bne.w 5671e │ │ - b.n 567aa │ │ + bne.w 5692e │ │ + b.n 569ba │ │ ldr r2, [r7, #28] │ │ add r0, sp, #332 @ 0x14c │ │ ldr r1, [sp, #440] @ 0x1b8 │ │ mov r6, r8 │ │ - bl 42814 │ │ + bl 42b1c │ │ ldr.w r8, [sp, #332] @ 0x14c │ │ ldr r0, [sp, #80] @ 0x50 │ │ ldrd r2, r1, [sp, #72] @ 0x48 │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ - bne.w 564c4 │ │ + bne.w 566d4 │ │ strd r0, r1, [sp, #228] @ 0xe4 │ │ - b.n 5620a │ │ + b.n 5641a │ │ movs r1, #0 │ │ movs r2, #1 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ movs r3, #0 │ │ str r1, [sp, #240] @ 0xf0 │ │ movs r1, #2 │ │ str r2, [sp, #232] @ 0xe8 │ │ strb.w r1, [sp, #224] @ 0xe0 │ │ str r0, [sp, #244] @ 0xf4 │ │ str r3, [sp, #236] @ 0xec │ │ - b.n 55c10 │ │ + b.n 55e20 │ │ ldr r2, [r7, #28] │ │ add r0, sp, #344 @ 0x158 │ │ ldr r1, [sp, #440] @ 0x1b8 │ │ mov r6, r8 │ │ - bl 42384 │ │ + bl 4268c │ │ ldr.w r8, [sp, #344] @ 0x158 │ │ ldr r0, [sp, #104] @ 0x68 │ │ ldrd r2, r1, [sp, #92] @ 0x5c │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ - bne.w 56562 │ │ + bne.w 56772 │ │ strd r1, r0, [sp, #228] @ 0xe4 │ │ movs r0, #0 │ │ str r2, [sp, #236] @ 0xec │ │ strb.w r0, [sp, #224] @ 0xe0 │ │ mov r8, r6 │ │ - b.n 55c10 │ │ + b.n 55e20 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ orn r1, r0, #2147483648 @ 0x80000000 │ │ movs r2, #0 │ │ movs r3, #1 │ │ str r0, [sp, #240] @ 0xf0 │ │ movs r0, #2 │ │ str r3, [sp, #232] @ 0xe8 │ │ strb.w r0, [sp, #224] @ 0xe0 │ │ str r1, [sp, #244] @ 0xf4 │ │ str r2, [sp, #236] @ 0xec │ │ - b.n 55c10 │ │ + b.n 55e20 │ │ movs r0, #0 │ │ ldr r2, [sp, #136] @ 0x88 │ │ - b.n 56644 │ │ + b.n 56854 │ │ movs r0, #0 │ │ strd r0, r9, [sp, #240] @ 0xf0 │ │ movs r0, #2 │ │ strd r9, r9, [sp, #232] @ 0xe8 │ │ - b.n 55c0c │ │ + b.n 55e1c │ │ ldr r2, [r7, #28] │ │ add r0, sp, #332 @ 0x14c │ │ ldr r1, [sp, #440] @ 0x1b8 │ │ - bl 428d4 │ │ + bl 42bdc │ │ ldr r6, [sp, #332] @ 0x14c │ │ ldr r0, [sp, #84] @ 0x54 │ │ ldrd r2, r1, [sp, #64] @ 0x40 │ │ cmp.w r6, #2147483648 @ 0x80000000 │ │ - bne.w 56594 │ │ + bne.w 567a4 │ │ str r1, [sp, #232] @ 0xe8 │ │ str r0, [sp, #228] @ 0xe4 │ │ movs r0, #0 │ │ str r2, [sp, #236] @ 0xec │ │ - b.n 55c0c │ │ + b.n 55e1c │ │ ldrd r6, r5, [sp, #128] @ 0x80 │ │ movs r0, #0 │ │ - b.n 5666e │ │ + b.n 5687e │ │ ldr r2, [r7, #28] │ │ add r0, sp, #344 @ 0x158 │ │ ldr r1, [sp, #440] @ 0x1b8 │ │ str.w r8, [sp, #144] @ 0x90 │ │ - bl 498b8 │ │ + bl 49bc0 │ │ ldr.w r8, [sp, #344] @ 0x158 │ │ ldr r0, [sp, #108] @ 0x6c │ │ ldr r1, [sp, #100] @ 0x64 │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ ldr r2, [sp, #88] @ 0x58 │ │ - bne.w 56610 │ │ + bne.w 56820 │ │ strd r0, r1, [sp, #228] @ 0xe4 │ │ movs r0, #0 │ │ strb.w r0, [sp, #224] @ 0xe0 │ │ str r2, [sp, #236] @ 0xec │ │ ldr.w r8, [sp, #144] @ 0x90 │ │ - b.n 55c10 │ │ + b.n 55e20 │ │ mov r0, r5 │ │ strb.w r9, [sp, #264] @ 0x108 │ │ - bl 75052 │ │ + bl 75106 │ │ vcvt.f64.f32 d16, s24 │ │ movs r0, #2 │ │ movs r1, #2 │ │ str.w r9, [sp, #236] @ 0xec │ │ str r1, [sp, #232] @ 0xe8 │ │ vstr d16, [sp, #240] @ 0xf0 │ │ - b.n 55c0c │ │ + b.n 55e1c │ │ ldr r1, [sp, #260] @ 0x104 │ │ movw r0, #21845 @ 0x5555 │ │ movt r0, #1365 @ 0x555 │ │ cmp r1, r0 │ │ - bhi.w 56ea8 │ │ + bhi.w 570b8 │ │ ldr r6, [sp, #256] @ 0x100 │ │ cmp r1, #0 │ │ str r6, [sp, #16] │ │ - beq.w 567d0 │ │ + beq.w 569e0 │ │ add.w r5, r1, r1, lsl #1 │ │ str r2, [sp, #8] │ │ str r1, [sp, #112] @ 0x70 │ │ lsls r4, r5, #3 │ │ mov r0, r4 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ str r0, [sp, #164] @ 0xa4 │ │ - beq.w 56fee │ │ + beq.w 571fe │ │ add r4, sp, #264 @ 0x108 │ │ mov.w sl, #0 │ │ add.w r0, r6, r5, lsl #2 │ │ str r0, [sp, #148] @ 0x94 │ │ str.w r8, [sp, #144] @ 0x90 │ │ - b.n 5632c │ │ + b.n 5653c │ │ movs r5, #0 │ │ add.w r0, sl, sl, lsl #1 │ │ ldr r1, [sp, #164] @ 0xa4 │ │ movs r2, #23 │ │ adds r6, #12 │ │ add.w r0, r1, r0, lsl #3 │ │ add r1, sp, #304 @ 0x130 │ │ strb.w r5, [r0], #1 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r0, [sp, #148] @ 0x94 │ │ add.w sl, sl, #1 │ │ cmp r6, r0 │ │ - beq.w 56708 │ │ + beq.w 56918 │ │ ldr r0, [r6, #0] │ │ cmp r0, #0 │ │ - beq.n 56306 │ │ + beq.n 56516 │ │ str r6, [sp, #168] @ 0xa8 │ │ add.w ip, sp, #332 @ 0x14c │ │ ldrd r3, r6, [r6, #4] │ │ add r5, sp, #344 @ 0x158 │ │ ldrd r1, r2, [r7, #12] │ │ stmia.w ip, {r0, r3, r6} │ │ add r0, sp, #332 @ 0x14c │ │ ldr r3, [sp, #192] @ 0xc0 │ │ strd r0, fp, [sp] │ │ mov r0, r5 │ │ - bl 55b60 │ │ + bl 55d70 │ │ mov r0, r4 │ │ mov r1, r5 │ │ - bl 57a80 │ │ + bl 57c90 │ │ ldrb.w r5, [sp, #264] @ 0x108 │ │ cmp r5, #6 │ │ - beq.w 56ec0 │ │ + beq.w 570d0 │ │ ldr r1, [sp, #176] @ 0xb0 │ │ add r0, sp, #304 @ 0x130 │ │ movs r2, #23 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r0, [sp, #344] @ 0x158 │ │ cmp r0, #0 │ │ - beq.n 56456 │ │ + beq.n 56666 │ │ str r5, [sp, #140] @ 0x8c │ │ ldrd fp, r5, [sp, #348] @ 0x15c │ │ cmp r5, #0 │ │ - beq.n 5640e │ │ + beq.n 5661e │ │ movs r4, #0 │ │ - b.n 5639a │ │ + b.n 565aa │ │ add.w fp, r9, #1 │ │ mov r4, r6 │ │ mov r0, r6 │ │ mov r1, r9 │ │ subs r5, #1 │ │ - bl 4e028 │ │ + bl 4e238 │ │ movs r0, #0 │ │ cmp r5, #0 │ │ - beq.n 56420 │ │ - cbz r4, 563ae │ │ + beq.n 56630 │ │ + cbz r4, 565be │ │ mov r8, r0 │ │ mov r0, r4 │ │ ldrh.w r1, [r0, #402] @ 0x192 │ │ cmp fp, r1 │ │ - bcs.n 563ce │ │ + bcs.n 565de │ │ mov r9, fp │ │ mov r6, r0 │ │ - b.n 563ee │ │ + b.n 565fe │ │ cmp.w fp, #0 │ │ - beq.n 563be │ │ + beq.n 565ce │ │ ldr.w r0, [r0, #408] @ 0x198 │ │ subs.w fp, fp, #1 │ │ - bne.n 563b4 │ │ + bne.n 565c4 │ │ mov.w fp, #0 │ │ mov.w r8, #0 │ │ ldrh.w r1, [r0, #402] @ 0x192 │ │ cmp fp, r1 │ │ - bcc.n 563a8 │ │ + bcc.n 565b8 │ │ ldr.w r6, [r0, #264] @ 0x108 │ │ cmp r6, #0 │ │ - beq.w 56ee6 │ │ + beq.w 570f6 │ │ ldrh.w r9, [r0, #400] @ 0x190 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrh.w r0, [r6, #402] @ 0x192 │ │ add.w r8, r8, #1 │ │ cmp r9, r0 │ │ mov r0, r6 │ │ - bcs.n 563ce │ │ + bcs.n 565de │ │ cmp.w r8, #0 │ │ - beq.n 56384 │ │ + beq.n 56594 │ │ add.w r0, r6, r9, lsl #2 │ │ add.w r0, r0, #412 @ 0x19c │ │ ldr r4, [r0, #0] │ │ subs.w r8, r8, #1 │ │ add.w r0, r4, #408 @ 0x198 │ │ - bne.n 563fc │ │ + bne.n 5660c │ │ mov.w fp, #0 │ │ - b.n 5638a │ │ + b.n 5659a │ │ mov r4, r0 │ │ cmp.w fp, #0 │ │ - beq.n 56420 │ │ + beq.n 56630 │ │ ldr.w r4, [r4, #408] @ 0x198 │ │ subs.w fp, fp, #1 │ │ - bne.n 56416 │ │ + bne.n 56626 │ │ ldr.w r0, [r4, #264] @ 0x108 │ │ - cbz r0, 56442 │ │ + cbz r0, 56652 │ │ ldr.w r8, [sp, #144] @ 0x90 │ │ ldr.w fp, [sp, #444] @ 0x1bc │ │ mov r5, r0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr.w r0, [r5, #264] @ 0x108 │ │ mov r4, r5 │ │ cmp r0, #0 │ │ - bne.n 5642e │ │ - b.n 5644c │ │ + bne.n 5663e │ │ + b.n 5665c │ │ mov r5, r4 │ │ ldr.w r8, [sp, #144] @ 0x90 │ │ ldr.w fp, [sp, #444] @ 0x1bc │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r5, [sp, #140] @ 0x8c │ │ add r4, sp, #264 @ 0x108 │ │ ldr r6, [sp, #168] @ 0xa8 │ │ - b.n 56308 │ │ + b.n 56518 │ │ movs r0, #0 │ │ mov r8, sl │ │ - b.w 55c0c │ │ + b.w 55e1c │ │ ldr r4, [sp, #272] @ 0x110 │ │ cmp.w r4, #268435456 @ 0x10000000 │ │ - bcs.w 56ea8 │ │ + bcs.w 570b8 │ │ ldr.w fp, [sp, #268] @ 0x10c │ │ cmp r4, #0 │ │ - beq.w 56894 │ │ + beq.w 56aa4 │ │ lsls r5, r4, #3 │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ movw r6, #21845 @ 0x5555 │ │ cmp r0, #0 │ │ movt r6, #1365 @ 0x555 │ │ - beq.w 56ffe │ │ + beq.w 5720e │ │ mov sl, r0 │ │ lsls r0, r4, #2 │ │ subs r1, r0, #4 │ │ movs r2, #1 │ │ add.w r5, r2, r1, lsr #2 │ │ add.w r1, sl, #4 │ │ mov r2, fp │ │ @@ -69257,49 +69353,49 @@ │ │ vstr s0, [r1] │ │ vmrs APSR_nzcv, fpscr │ │ it vc │ │ movvc r3, #1 │ │ str.w r3, [r1, #-4] │ │ adds r1, #8 │ │ subs r0, #4 │ │ - bne.n 5649e │ │ + bne.n 566ae │ │ mov.w r9, #0 │ │ - b.n 568a4 │ │ + b.n 56ab4 │ │ ldr r4, [sp, #340] @ 0x154 │ │ movw r0, #21845 @ 0x5555 │ │ movt r0, #1365 @ 0x555 │ │ cmp r4, r0 │ │ - bhi.w 56ea8 │ │ + bhi.w 570b8 │ │ mov r1, r9 │ │ add.w r0, r4, r4, lsl #1 │ │ ldr.w r9, [sp, #336] @ 0x150 │ │ lsls r5, r0, #3 │ │ - beq.w 568dc │ │ + beq.w 56aec │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 56fd2 │ │ + beq.w 571e2 │ │ mov sl, r0 │ │ mov r0, r4 │ │ movs r1, #0 │ │ - b.n 568e2 │ │ + b.n 56af2 │ │ ldr r4, [sp, #272] @ 0x110 │ │ cmp.w r4, #134217728 @ 0x8000000 │ │ - bcs.w 56ea8 │ │ + bcs.w 570b8 │ │ ldr r0, [sp, #268] @ 0x10c │ │ cmp r4, #0 │ │ str r0, [sp, #168] @ 0xa8 │ │ str.w r8, [sp, #144] @ 0x90 │ │ - beq.w 5696c │ │ + beq.w 56b7c │ │ lsls r5, r4, #4 │ │ mov r8, r7 │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 56fd2 │ │ + beq.w 571e2 │ │ lsls r5, r4, #3 │ │ sub.w r1, r5, #8 │ │ movs r2, #1 │ │ str r0, [sp, #164] @ 0xa4 │ │ add.w lr, r2, r1, lsr #3 │ │ add.w r1, r0, #8 │ │ ldr r0, [sp, #168] @ 0xa8 │ │ @@ -69309,1084 +69405,1084 @@ │ │ eor.w r4, r7, sl │ │ orrs r4, r3 │ │ it ne │ │ movne r4, #1 │ │ strd r4, r9, [r1, #-8] │ │ strd r3, r7, [r1], #16 │ │ subs r5, #8 │ │ - bne.n 56538 │ │ + bne.n 56748 │ │ mov r7, r8 │ │ ldr.w r8, [sp, #144] @ 0x90 │ │ mov.w r9, #0 │ │ mov r4, ip │ │ mov r5, lr │ │ - b.n 56976 │ │ + b.n 56b86 │ │ ldr r4, [sp, #352] @ 0x160 │ │ movw r0, #21845 @ 0x5555 │ │ movt r0, #1365 @ 0x555 │ │ cmp r4, r0 │ │ - bhi.w 56ea8 │ │ + bhi.w 570b8 │ │ add.w r0, r4, r4, lsl #1 │ │ ldr.w sl, [sp, #348] @ 0x15c │ │ lsls r5, r0, #3 │ │ - beq.w 569ac │ │ + beq.w 56bbc │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 56fd2 │ │ + beq.w 571e2 │ │ mov r1, r4 │ │ mov.w r9, #0 │ │ - b.n 569b0 │ │ + b.n 56bc0 │ │ ldr r4, [sp, #340] @ 0x154 │ │ movw r0, #21845 @ 0x5555 │ │ movt r0, #1365 @ 0x555 │ │ cmp r4, r0 │ │ - bhi.w 56ea8 │ │ + bhi.w 570b8 │ │ str.w r8, [sp, #144] @ 0x90 │ │ add.w r0, r4, r4, lsl #1 │ │ ldr.w r8, [sp, #336] @ 0x150 │ │ lsls r5, r0, #3 │ │ - beq.w 56a62 │ │ + beq.w 56c72 │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 56fd2 │ │ + beq.w 571e2 │ │ mov fp, r0 │ │ mov r0, r4 │ │ mov.w r9, #0 │ │ - b.n 56a68 │ │ + b.n 56c78 │ │ ldr r6, [sp, #272] @ 0x110 │ │ cmp.w r6, #268435456 @ 0x10000000 │ │ - bcs.w 56ea8 │ │ + bcs.w 570b8 │ │ ldr r4, [sp, #268] @ 0x10c │ │ cmp r6, #0 │ │ - beq.w 56af2 │ │ + beq.w 56d02 │ │ lsls r5, r6, #3 │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 56ffe │ │ + beq.w 5720e │ │ mov sl, r0 │ │ lsls r0, r6, #2 │ │ movs r5, #0 │ │ ldr.w r1, [r4, r5, lsl #2] │ │ subs.w r2, r1, #2147483648 @ 0x80000000 │ │ it ne │ │ movne r2, #1 │ │ str.w r2, [sl, r5, lsl #3] │ │ add.w r2, sl, r5, lsl #3 │ │ adds r5, #1 │ │ subs r0, #4 │ │ str r1, [r2, #4] │ │ - bne.n 565f2 │ │ - b.n 56afa │ │ + bne.n 56802 │ │ + b.n 56d0a │ │ ldr r6, [sp, #352] @ 0x160 │ │ movw r0, #21845 @ 0x5555 │ │ movt r0, #1365 @ 0x555 │ │ cmp r6, r0 │ │ - bhi.w 56ea8 │ │ + bhi.w 570b8 │ │ add.w r0, r6, r6, lsl #1 │ │ ldr.w sl, [sp, #348] @ 0x15c │ │ lsls r5, r0, #3 │ │ - beq.w 56b30 │ │ + beq.w 56d40 │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 56fd2 │ │ + beq.w 571e2 │ │ mov r1, r6 │ │ mov.w r9, #0 │ │ - b.n 56b34 │ │ + b.n 56d44 │ │ movs r0, #0 │ │ str r2, [sp, #136] @ 0x88 │ │ strb.w r2, [sp, #225] @ 0xe1 │ │ - b.w 55c0c │ │ + b.w 55e1c │ │ movs r0, #8 │ │ str.w r9, [sp, #236] @ 0xec │ │ strd r9, r0, [sp, #228] @ 0xe4 │ │ movs r0, #4 │ │ - b.w 55c0c │ │ + b.w 55e1c │ │ movs r6, #1 │ │ ldr r0, [sp, #180] @ 0xb4 │ │ mov r2, r5 │ │ adds r1, r0, r4 │ │ mov r0, r6 │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #3 │ │ str r5, [sp, #236] @ 0xec │ │ strd r6, r5, [sp, #128] @ 0x80 │ │ strd r5, r6, [sp, #228] @ 0xe4 │ │ - b.w 55c0c │ │ + b.w 55e1c │ │ movs r0, #8 │ │ movs r1, #0 │ │ cmp.w r8, #0 │ │ str.w r9, [sp, #272] @ 0x110 │ │ strd r1, r0, [sp, #264] @ 0x108 │ │ - beq.n 566c4 │ │ + beq.n 568d4 │ │ ldr r1, [sp, #180] @ 0xb4 │ │ movs r5, #0 │ │ movs r7, #0 │ │ add r4, r1 │ │ - b.n 566b0 │ │ + b.n 568c0 │ │ movs r1, #2 │ │ adds r7, #1 │ │ strb r1, [r0, r5] │ │ adds r1, r0, r5 │ │ adds r5, #24 │ │ cmp r8, r7 │ │ strd r9, r9, [r1, #8] │ │ strd r6, r9, [r1, #16] │ │ str r7, [sp, #272] @ 0x110 │ │ - beq.n 566c2 │ │ + beq.n 568d2 │ │ ldrb r6, [r4, r7] │ │ ldr r1, [sp, #264] @ 0x108 │ │ cmp r7, r1 │ │ - bne.n 56698 │ │ + bne.n 568a8 │ │ add r0, sp, #264 @ 0x108 │ │ - bl 760fc │ │ + bl 76164 │ │ ldr r0, [sp, #268] @ 0x10c │ │ - b.n 56698 │ │ + b.n 568a8 │ │ ldr r1, [sp, #264] @ 0x108 │ │ ldrd r0, r2, [sp, #268] @ 0x10c │ │ mov r8, sl │ │ ldr r7, [sp, #172] @ 0xac │ │ str r2, [sp, #236] @ 0xec │ │ strd r1, r0, [sp, #228] @ 0xe4 │ │ movs r0, #4 │ │ strb.w r0, [sp, #224] @ 0xe0 │ │ ldr.w fp, [sp, #444] @ 0x1bc │ │ - b.w 55c10 │ │ + b.w 55e20 │ │ movs r1, #0 │ │ movs r0, #0 │ │ add r4, sp, #264 @ 0x108 │ │ mov r7, r8 │ │ mov r8, sl │ │ str r0, [sp, #296] @ 0x128 │ │ str r1, [sp, #280] @ 0x118 │ │ str r1, [sp, #264] @ 0x108 │ │ add r0, sp, #344 @ 0x158 │ │ mov r1, r4 │ │ - bl 4de98 │ │ + bl 331f8 │ │ ldr r0, [sp, #344] @ 0x158 │ │ cmp r0, #0 │ │ - beq.w 55c10 │ │ + beq.w 55e20 │ │ ldr r1, [sp, #352] @ 0x160 │ │ - bl 4e028 │ │ - b.n 566f0 │ │ + bl 4e238 │ │ + b.n 56900 │ │ ldr r2, [sp, #8] │ │ - b.n 567de │ │ + b.n 569ee │ │ mov.w fp, #8 │ │ movs r2, #0 │ │ mov r1, r9 │ │ cmp r5, #0 │ │ str r1, [sp, #272] @ 0x110 │ │ strd r2, fp, [sp, #264] @ 0x108 │ │ - beq.n 567aa │ │ + beq.n 569ba │ │ ldr r0, [sp, #168] @ 0xa8 │ │ mov.w r9, #0 │ │ str r6, [sp, #148] @ 0x94 │ │ movs r6, #0 │ │ add.w r0, r0, r5, lsl #3 │ │ str r0, [sp, #164] @ 0xa4 │ │ - b.n 5675c │ │ + b.n 5696c │ │ movs r4, #0 │ │ ldr r0, [sp, #264] @ 0x108 │ │ cmp r9, r0 │ │ - beq.n 56796 │ │ + beq.n 569a6 │ │ add.w r0, fp, r6 │ │ strb.w r4, [fp, r6] │ │ add.w r9, r9, #1 │ │ adds r6, #24 │ │ ldr r2, [sp, #164] @ 0xa4 │ │ strd r5, r7, [r0, #4] │ │ mov r7, r8 │ │ str r5, [r0, #12] │ │ add.w r0, sl, #8 │ │ cmp r0, r2 │ │ str.w r9, [sp, #272] @ 0x110 │ │ - beq.n 567a6 │ │ + beq.n 569b6 │ │ ldr r0, [sp, #168] @ 0xa8 │ │ mov r8, r7 │ │ add.w sl, r0, r9, lsl #3 │ │ ldr.w r4, [r0, r9, lsl #3] │ │ cmp r4, #0 │ │ - beq.n 56730 │ │ + beq.n 56940 │ │ ldr.w r5, [sl, #4] │ │ - cbz r5, 56780 │ │ + cbz r5, 56990 │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ mov r7, r0 │ │ - cbnz r0, 56782 │ │ - b.w 56fb0 │ │ + cbnz r0, 56992 │ │ + b.w 571c0 │ │ movs r7, #1 │ │ mov r0, r7 │ │ mov r1, r4 │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r4, #3 │ │ movs r1, #0 │ │ ldr r0, [sp, #264] @ 0x108 │ │ cmp r9, r0 │ │ - bne.n 56738 │ │ + bne.n 56948 │ │ add r0, sp, #264 @ 0x108 │ │ mov fp, r1 │ │ - bl 760fc │ │ + bl 76164 │ │ mov r1, fp │ │ ldr.w fp, [sp, #268] @ 0x10c │ │ - b.n 56738 │ │ + b.n 56948 │ │ ldr r2, [sp, #264] @ 0x108 │ │ ldr r6, [sp, #148] @ 0x94 │ │ ldrd r1, r3, [sp, #268] @ 0x10c │ │ movs r0, #4 │ │ ldr.w r8, [sp, #144] @ 0x90 │ │ ldr.w fp, [sp, #444] @ 0x1bc │ │ strb.w r0, [sp, #224] @ 0xe0 │ │ lsls r0, r6, #1 │ │ str r3, [sp, #236] @ 0xec │ │ strd r2, r1, [sp, #228] @ 0xe4 │ │ str r2, [sp, #124] @ 0x7c │ │ strd r3, r1, [sp, #116] @ 0x74 │ │ - beq.w 55c10 │ │ - b.n 56c1e │ │ + beq.w 55e20 │ │ + b.n 56e2e │ │ movs r0, #0 │ │ add r4, sp, #264 @ 0x108 │ │ str r0, [sp, #112] @ 0x70 │ │ movs r0, #8 │ │ mov.w sl, #0 │ │ str r0, [sp, #164] @ 0xa4 │ │ cmp r2, #0 │ │ itt ne │ │ ldrne r0, [sp, #16] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ add r1, sp, #344 @ 0x158 │ │ str r0, [sp, #348] @ 0x15c │ │ ldr r0, [sp, #112] @ 0x70 │ │ str r0, [sp, #344] @ 0x158 │ │ mov r0, r4 │ │ str.w sl, [sp, #352] @ 0x160 │ │ - bl 57bdc │ │ + bl 57dec │ │ ldrb.w r0, [sp, #264] @ 0x108 │ │ cmp r0, #6 │ │ - beq.w 56f72 │ │ + beq.w 57182 │ │ mov r0, r4 │ │ add r1, sp, #224 @ 0xe0 │ │ ldmia.w r0, {r2, r3, r4, r5, r6, r7} │ │ cmp.w sl, #0 │ │ stmia r1!, {r2, r3, r4, r5, r6, r7} │ │ - beq.n 56826 │ │ + beq.n 56a36 │ │ ldr r4, [sp, #164] @ 0xa4 │ │ mov r0, r4 │ │ - bl 4dd34 │ │ + bl 4e03c │ │ adds r4, #24 │ │ subs.w sl, sl, #1 │ │ - bne.n 56818 │ │ + bne.n 56a28 │ │ ldr r7, [sp, #172] @ 0xac │ │ ldr r0, [sp, #112] @ 0x70 │ │ cmp r0, #0 │ │ - beq.w 55c10 │ │ + beq.w 55e20 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ - blx d87c0 │ │ - b.w 55c10 │ │ + blx d87d0 │ │ + b.w 55e20 │ │ movs r0, #8 │ │ movs r1, #0 │ │ movs r5, #0 │ │ str r7, [sp, #272] @ 0x110 │ │ strd r1, r0, [sp, #264] @ 0x108 │ │ - b.n 56860 │ │ + b.n 56a70 │ │ subs r1, r4, #2 │ │ add.w r5, r5, #1 │ │ it ne │ │ movne r1, #1 │ │ strb r1, [r0, r7] │ │ adds r1, r0, r7 │ │ adds r7, #24 │ │ cmp r6, r5 │ │ strb r4, [r1, #1] │ │ str r5, [sp, #272] @ 0x110 │ │ - beq.n 56874 │ │ + beq.n 56a84 │ │ ldrb.w r4, [r8, r5] │ │ ldr r1, [sp, #264] @ 0x108 │ │ cmp r5, r1 │ │ - bne.n 56848 │ │ + bne.n 56a58 │ │ add r0, sp, #264 @ 0x108 │ │ - bl 760fc │ │ + bl 76164 │ │ ldr r0, [sp, #268] @ 0x10c │ │ - b.n 56848 │ │ + b.n 56a58 │ │ add r2, sp, #264 @ 0x108 │ │ add r3, sp, #228 @ 0xe4 │ │ ldmia r2, {r0, r1, r2} │ │ stmia r3!, {r0, r1, r2} │ │ mov.w r0, #4 │ │ strb.w r0, [sp, #224] @ 0xe0 │ │ - cbz r6, 5688c │ │ + cbz r6, 56a9c │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r7, r9 │ │ mov r8, sl │ │ - b.w 55c10 │ │ + b.w 55e20 │ │ movw r6, #21845 @ 0x5555 │ │ movs r4, #0 │ │ mov.w sl, #4 │ │ movs r5, #0 │ │ movt r6, #1365 @ 0x555 │ │ cmp r7, #0 │ │ itt ne │ │ movne r0, fp │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ cmp r5, r6 │ │ - bhi.w 56ea8 │ │ + bhi.w 570b8 │ │ add.w r0, r5, r5, lsl #1 │ │ str.w r8, [sp, #144] @ 0x90 │ │ str r4, [sp, #168] @ 0xa8 │ │ movs.w r8, r0, lsl #3 │ │ - beq.w 56c28 │ │ + beq.w 56e38 │ │ mov r0, r8 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 57006 │ │ + beq.w 57216 │ │ mov fp, r0 │ │ mov r0, r5 │ │ mov.w r9, #0 │ │ - b.n 56c2e │ │ + b.n 56e3e │ │ mov.w sl, #8 │ │ movs r0, #0 │ │ cmp r4, #0 │ │ str r1, [sp, #352] @ 0x160 │ │ strd r0, sl, [sp, #344] @ 0x158 │ │ - beq.w 56bb0 │ │ + beq.w 56dc0 │ │ str r7, [sp, #172] @ 0xac │ │ lsls r5, r4, #2 │ │ str r6, [sp, #144] @ 0x90 │ │ movs r4, #0 │ │ movs r7, #0 │ │ mov r6, r9 │ │ - b.n 56938 │ │ + b.n 56b48 │ │ add r0, sp, #264 @ 0x108 │ │ strb.w r1, [sp, #264] @ 0x108 │ │ - bl 75052 │ │ + bl 75106 │ │ vcvt.f64.f32 d12, s24 │ │ mov.w fp, #2 │ │ ldr r0, [sp, #344] @ 0x158 │ │ cmp r7, r0 │ │ - beq.n 56954 │ │ + beq.n 56b64 │ │ add.w r0, sl, r4 │ │ strb.w fp, [sl, r4] │ │ adds r6, #4 │ │ adds r7, #1 │ │ adds r4, #24 │ │ subs r5, #4 │ │ mov.w r1, #0 │ │ mov.w r2, #2 │ │ vstr d12, [r0, #16] │ │ strd r2, r1, [r0, #8] │ │ str r7, [sp, #352] @ 0x160 │ │ - beq.n 56960 │ │ + beq.n 56b70 │ │ vldr s24, [r6] │ │ vmov r0, s24 │ │ bic.w r0, r0, #2147483648 @ 0x80000000 │ │ cmp.w r0, #2139095040 @ 0x7f800000 │ │ - blt.n 568fc │ │ + blt.n 56b0c │ │ mov.w fp, #0 │ │ ldr r0, [sp, #344] @ 0x158 │ │ cmp r7, r0 │ │ - bne.n 56914 │ │ + bne.n 56b24 │ │ add r0, sp, #344 @ 0x158 │ │ - bl 760fc │ │ + bl 76164 │ │ ldr.w sl, [sp, #348] @ 0x15c │ │ - b.n 56914 │ │ + b.n 56b24 │ │ ldr r1, [sp, #344] @ 0x158 │ │ ldr r6, [sp, #144] @ 0x90 │ │ ldr r7, [sp, #172] @ 0xac │ │ ldr.w fp, [sp, #444] @ 0x1bc │ │ - b.n 56bb2 │ │ + b.n 56dc2 │ │ movs r0, #8 │ │ movs r4, #0 │ │ str r0, [sp, #164] @ 0xa4 │ │ movs r5, #0 │ │ ldr r0, [sp, #168] @ 0xa8 │ │ cmp r6, #0 │ │ it ne │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ movw r0, #21845 @ 0x5555 │ │ movt r0, #1365 @ 0x555 │ │ cmp r5, r0 │ │ - bhi.w 56ea8 │ │ + bhi.w 570b8 │ │ add.w r0, r5, r5, lsl #1 │ │ str r4, [sp, #168] @ 0xa8 │ │ lsls r4, r0, #3 │ │ - beq.w 56cd8 │ │ + beq.w 56ee8 │ │ mov r0, r4 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 56fee │ │ + beq.w 571fe │ │ mov r2, r5 │ │ mov.w r9, #0 │ │ - b.n 56cdc │ │ + b.n 56eec │ │ movs r0, #8 │ │ movs r1, #0 │ │ cmp r4, #0 │ │ str.w r9, [sp, #272] @ 0x110 │ │ strd r1, r0, [sp, #264] @ 0x108 │ │ - beq.w 56bd0 │ │ + beq.w 56de0 │ │ str r7, [sp, #172] @ 0xac │ │ lsls r5, r4, #3 │ │ str r6, [sp, #144] @ 0x90 │ │ movs r7, #1 │ │ movs r4, #0 │ │ mov r6, sl │ │ str.w sl, [sp, #168] @ 0xa8 │ │ - b.n 569f4 │ │ + b.n 56c04 │ │ movs r1, #2 │ │ mov.w r2, sl, lsr #31 │ │ strb r1, [r0, r4] │ │ adds r1, r0, r4 │ │ add.w r3, r1, #8 │ │ adds r6, #8 │ │ stmia.w r3, {r2, r9, fp} │ │ adds r4, #24 │ │ str.w sl, [r1, #20] │ │ subs r5, #8 │ │ str r7, [sp, #272] @ 0x110 │ │ add.w r7, r7, #1 │ │ - beq.n 56a0e │ │ + beq.n 56c1e │ │ ldrd fp, sl, [r6] │ │ mov.w r9, #0 │ │ ldr r1, [sp, #264] @ 0x108 │ │ subs r2, r7, #1 │ │ cmp r2, r1 │ │ - bne.n 569d0 │ │ + bne.n 56be0 │ │ add r0, sp, #264 @ 0x108 │ │ - bl 760fc │ │ + bl 76164 │ │ ldr r0, [sp, #268] @ 0x10c │ │ - b.n 569d0 │ │ + b.n 56be0 │ │ ldr r2, [sp, #264] @ 0x108 │ │ ldr r6, [sp, #144] @ 0x90 │ │ ldr.w fp, [sp, #444] @ 0x1bc │ │ ldrd sl, r7, [sp, #168] @ 0xa8 │ │ - b.n 56bd2 │ │ + b.n 56de2 │ │ movw r4, #21845 @ 0x5555 │ │ mov.w r8, #0 │ │ movs r5, #8 │ │ movs r7, #0 │ │ movt r4, #1365 @ 0x555 │ │ cmp r6, #0 │ │ itt ne │ │ movne r0, fp │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ cmp r7, r4 │ │ - bhi.w 56ea8 │ │ + bhi.w 570b8 │ │ add.w r0, r7, r7, lsl #1 │ │ str r5, [sp, #168] @ 0xa8 │ │ str.w sl, [sp, #144] @ 0x90 │ │ lsls r5, r0, #3 │ │ - beq.w 56d66 │ │ + beq.w 56f76 │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 56fd2 │ │ + beq.w 571e2 │ │ mov fp, r0 │ │ mov r1, r7 │ │ mov.w r9, #0 │ │ - b.n 56d6c │ │ + b.n 56f7c │ │ mov.w fp, #8 │ │ movs r0, #0 │ │ cmp r4, #0 │ │ str.w r9, [sp, #352] @ 0x160 │ │ strd r0, fp, [sp, #344] @ 0x158 │ │ str.w r8, [sp, #168] @ 0xa8 │ │ - beq.w 56bfa │ │ + beq.w 56e0a │ │ str r6, [sp, #164] @ 0xa4 │ │ lsls r5, r4, #3 │ │ str r7, [sp, #172] @ 0xac │ │ mov.w sl, #0 │ │ movs r7, #0 │ │ movs r4, #0 │ │ mov r6, r8 │ │ - b.n 56ab2 │ │ + b.n 56cc2 │ │ ldr r0, [sp, #344] @ 0x158 │ │ cmp r4, r0 │ │ - beq.n 56ade │ │ + beq.n 56cee │ │ add.w r0, fp, r7 │ │ strb.w r8, [fp, r7] │ │ adds r6, #8 │ │ adds r4, #1 │ │ adds r7, #24 │ │ subs r5, #8 │ │ mov.w r1, #2 │ │ strd r1, r9, [r0, #8] │ │ vstr d12, [r0, #16] │ │ str r4, [sp, #352] @ 0x160 │ │ - beq.n 56aea │ │ + beq.n 56cfa │ │ vldr d12, [r6] │ │ mov.w r8, #0 │ │ strb.w sl, [sp, #264] @ 0x108 │ │ vmov r0, r1, d12 │ │ bic.w r0, r1, #2147483648 @ 0x80000000 │ │ movw r1, #65535 @ 0xffff │ │ movt r1, #32751 @ 0x7fef │ │ cmp r0, r1 │ │ - bgt.n 56a8c │ │ + bgt.n 56c9c │ │ add r0, sp, #264 @ 0x108 │ │ - bl 75052 │ │ + bl 75106 │ │ mov.w r8, #2 │ │ - b.n 56a8c │ │ + b.n 56c9c │ │ add r0, sp, #344 @ 0x158 │ │ - bl 760fc │ │ + bl 76164 │ │ ldr.w fp, [sp, #348] @ 0x15c │ │ - b.n 56a92 │ │ + b.n 56ca2 │ │ ldr r1, [sp, #344] @ 0x158 │ │ ldr r7, [sp, #172] @ 0xac │ │ ldr r6, [sp, #164] @ 0xa4 │ │ - b.n 56bfc │ │ + b.n 56e0c │ │ movs r6, #0 │ │ mov.w sl, #4 │ │ movs r5, #0 │ │ cmp r7, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ movw r0, #21845 @ 0x5555 │ │ movt r0, #1365 @ 0x555 │ │ cmp r5, r0 │ │ - bhi.w 56ea8 │ │ + bhi.w 570b8 │ │ add.w r0, r5, r5, lsl #1 │ │ lsls r4, r0, #3 │ │ - beq.w 56e14 │ │ + beq.w 57024 │ │ mov r0, r4 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 56fee │ │ + beq.w 571fe │ │ mov r1, r5 │ │ mov.w r9, #0 │ │ - b.n 56e18 │ │ + b.n 57028 │ │ movs r0, #8 │ │ movs r1, #0 │ │ str.w r9, [sp, #272] @ 0x110 │ │ strd r1, r0, [sp, #264] @ 0x108 │ │ - cbz r6, 56b84 │ │ + cbz r6, 56d94 │ │ str r7, [sp, #172] @ 0xac │ │ lsls r5, r6, #2 │ │ mov.w r9, #0 │ │ movs r7, #0 │ │ movs r6, #0 │ │ - b.n 56b6c │ │ + b.n 56d7c │ │ movs r1, #2 │ │ adds r6, #1 │ │ strb r1, [r0, r7] │ │ adds r1, r0, r7 │ │ adds r7, #24 │ │ subs r5, #4 │ │ mov.w r2, r4, asr #31 │ │ mov.w r3, r4, lsr #31 │ │ strd r4, r2, [r1, #16] │ │ strd r3, r9, [r1, #8] │ │ str r6, [sp, #272] @ 0x110 │ │ - beq.n 56b80 │ │ + beq.n 56d90 │ │ ldr.w r4, [sl, r6, lsl #2] │ │ ldr r1, [sp, #264] @ 0x108 │ │ cmp r6, r1 │ │ - bne.n 56b4c │ │ + bne.n 56d5c │ │ add r0, sp, #264 @ 0x108 │ │ - bl 760fc │ │ + bl 76164 │ │ ldr r0, [sp, #268] @ 0x10c │ │ - b.n 56b4c │ │ + b.n 56d5c │ │ ldr r1, [sp, #264] @ 0x108 │ │ ldr r7, [sp, #172] @ 0xac │ │ ldrd r2, r3, [sp, #268] @ 0x10c │ │ add r0, sp, #228 @ 0xe4 │ │ stmia r0!, {r1, r2, r3} │ │ movs r0, #4 │ │ strb.w r0, [sp, #224] @ 0xe0 │ │ movs.w r0, r8, lsl #1 │ │ str r1, [sp, #108] @ 0x6c │ │ str r2, [sp, #100] @ 0x64 │ │ str r3, [sp, #88] @ 0x58 │ │ - beq.n 56ba4 │ │ + beq.n 56db4 │ │ mov r0, sl │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr.w fp, [sp, #444] @ 0x1bc │ │ ldr.w r8, [sp, #144] @ 0x90 │ │ - b.w 55c10 │ │ + b.w 55e20 │ │ mov r1, r0 │ │ ldrd r2, r3, [sp, #348] @ 0x15c │ │ add r0, sp, #228 @ 0xe4 │ │ stmia r0!, {r1, r2, r3} │ │ movs r0, #4 │ │ strb.w r0, [sp, #224] @ 0xe0 │ │ movs.w r0, r8, lsl #1 │ │ str r1, [sp, #80] @ 0x50 │ │ strd r3, r2, [sp, #72] @ 0x48 │ │ - beq.n 56bf4 │ │ + beq.n 56e04 │ │ mov r0, r9 │ │ - b.n 56bf0 │ │ + b.n 56e00 │ │ mov r2, r1 │ │ ldrd r1, r3, [sp, #268] @ 0x10c │ │ movs r0, #4 │ │ strb.w r0, [sp, #224] @ 0xe0 │ │ movs.w r0, r8, lsl #1 │ │ str r3, [sp, #236] @ 0xec │ │ strd r2, r1, [sp, #228] @ 0xe4 │ │ str r1, [sp, #104] @ 0x68 │ │ strd r3, r2, [sp, #92] @ 0x5c │ │ - beq.n 56bf4 │ │ + beq.n 56e04 │ │ mov r0, sl │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r8, r6 │ │ - b.w 55c10 │ │ + b.w 55e20 │ │ mov r1, r0 │ │ ldrd r2, r3, [sp, #348] @ 0x15c │ │ add r0, sp, #228 @ 0xe4 │ │ ldr.w r8, [sp, #144] @ 0x90 │ │ ldr.w fp, [sp, #444] @ 0x1bc │ │ stmia r0!, {r1, r2, r3} │ │ movs r0, #4 │ │ strb.w r0, [sp, #224] @ 0xe0 │ │ lsls r0, r6, #1 │ │ str r1, [sp, #84] @ 0x54 │ │ strd r3, r2, [sp, #64] @ 0x40 │ │ - beq.w 55c10 │ │ + beq.w 55e20 │ │ ldr r0, [sp, #168] @ 0xa8 │ │ - blx d87c0 │ │ - b.w 55c10 │ │ + blx d87d0 │ │ + b.w 55e20 │ │ mov.w fp, #8 │ │ movs r0, #0 │ │ str.w r9, [sp, #352] @ 0x160 │ │ strd r0, fp, [sp, #344] @ 0x158 │ │ - cbz r5, 56cb0 │ │ + cbz r5, 56ec0 │ │ add.w r8, sl, r5, lsl #3 │ │ movs r7, #0 │ │ movs r5, #0 │ │ - b.n 56c6e │ │ + b.n 56e7e │ │ movs r4, #0 │ │ ldr r0, [sp, #344] @ 0x158 │ │ cmp r5, r0 │ │ - beq.n 56ca2 │ │ + beq.n 56eb2 │ │ add.w r0, fp, r7 │ │ strb.w r4, [fp, r7] │ │ mov.w r9, #0 │ │ movs r1, #2 │ │ adds r5, #1 │ │ adds r7, #24 │ │ strd r1, r9, [r0, #8] │ │ vstr d11, [r0, #16] │ │ add.w r0, r6, #8 │ │ cmp r0, r8 │ │ str r5, [sp, #352] @ 0x160 │ │ - beq.n 56cae │ │ + beq.n 56ebe │ │ ldr.w r0, [sl, r5, lsl #3] │ │ add.w r6, sl, r5, lsl #3 │ │ cmp r0, #1 │ │ - bne.n 56c42 │ │ + bne.n 56e52 │ │ vldr s22, [r6, #4] │ │ vmov r0, s22 │ │ bic.w r0, r0, #2147483648 @ 0x80000000 │ │ cmp.w r0, #2139095040 @ 0x7f800000 │ │ - blt.n 56c90 │ │ + blt.n 56ea0 │ │ movs r4, #0 │ │ - b.n 56c44 │ │ + b.n 56e54 │ │ add r0, sp, #264 @ 0x108 │ │ strb.w r9, [sp, #264] @ 0x108 │ │ - bl 75052 │ │ + bl 75106 │ │ vcvt.f64.f32 d11, s22 │ │ movs r4, #2 │ │ - b.n 56c44 │ │ + b.n 56e54 │ │ add r0, sp, #344 @ 0x158 │ │ - bl 760fc │ │ + bl 76164 │ │ ldr.w fp, [sp, #348] @ 0x15c │ │ - b.n 56c4a │ │ + b.n 56e5a │ │ ldr r0, [sp, #344] @ 0x158 │ │ add r3, sp, #228 @ 0xe4 │ │ ldrd r1, r2, [sp, #348] @ 0x15c │ │ str r0, [sp, #12] │ │ stmia r3!, {r0, r1, r2} │ │ movs r0, #4 │ │ strb.w r0, [sp, #224] @ 0xe0 │ │ ldr r0, [sp, #168] @ 0xa8 │ │ ldr.w r8, [sp, #144] @ 0x90 │ │ ldr r7, [sp, #172] @ 0xac │ │ ldr.w fp, [sp, #444] @ 0x1bc │ │ lsls r0, r0, #1 │ │ strd r2, r1, [sp, #20] │ │ - beq.w 55c10 │ │ - b.n 56e9e │ │ + beq.w 55e20 │ │ + b.n 570ae │ │ movs r0, #8 │ │ movs r2, #0 │ │ str.w r9, [sp, #272] @ 0x110 │ │ strd r2, r0, [sp, #264] @ 0x108 │ │ - cbz r5, 56d46 │ │ + cbz r5, 56f56 │ │ str r7, [sp, #172] @ 0xac │ │ movs r6, #0 │ │ ldr r7, [sp, #164] @ 0xa4 │ │ add.w sl, r7, r5, lsl #4 │ │ movs r5, #1 │ │ - b.n 56d1c │ │ + b.n 56f2c │ │ ands.w r1, r8, #1 │ │ mov.w r2, r4, lsr #31 │ │ it ne │ │ movne r1, #2 │ │ strb r1, [r0, r6] │ │ adds r1, r0, r6 │ │ add.w r3, r1, #8 │ │ adds r7, #16 │ │ stmia.w r3, {r2, r9, fp} │ │ adds r6, #24 │ │ cmp r7, sl │ │ str r4, [r1, #20] │ │ str r5, [sp, #272] @ 0x110 │ │ add.w r5, r5, #1 │ │ - beq.n 56d3a │ │ + beq.n 56f4a │ │ ldr.w r8, [r7] │ │ mov.w r9, #0 │ │ ldrd fp, r4, [r7, #8] │ │ subs r2, r5, #1 │ │ ldr r1, [sp, #264] @ 0x108 │ │ cmp r2, r1 │ │ - bne.n 56cf4 │ │ + bne.n 56f04 │ │ add r0, sp, #264 @ 0x108 │ │ - bl 760fc │ │ + bl 76164 │ │ ldr r0, [sp, #268] @ 0x10c │ │ - b.n 56cf4 │ │ + b.n 56f04 │ │ ldr r2, [sp, #264] @ 0x108 │ │ ldr.w r8, [sp, #144] @ 0x90 │ │ ldr r7, [sp, #172] @ 0xac │ │ ldr.w fp, [sp, #444] @ 0x1bc │ │ movs r0, #4 │ │ ldrd r1, r3, [sp, #268] @ 0x10c │ │ strb.w r0, [sp, #224] @ 0xe0 │ │ ldr r0, [sp, #168] @ 0xa8 │ │ str r3, [sp, #236] @ 0xec │ │ strd r2, r1, [sp, #228] @ 0xe4 │ │ lsls r0, r0, #1 │ │ str r1, [sp, #48] @ 0x30 │ │ strd r3, r2, [sp, #40] @ 0x28 │ │ - beq.w 55c10 │ │ - b.n 56830 │ │ + beq.w 55e20 │ │ + b.n 56a40 │ │ mov.w fp, #8 │ │ movs r1, #0 │ │ ldr r5, [sp, #168] @ 0xa8 │ │ str.w r9, [sp, #352] @ 0x160 │ │ strd r1, fp, [sp, #344] @ 0x158 │ │ - cbz r7, 56de4 │ │ + cbz r7, 56ff4 │ │ add.w sl, r5, r7, lsl #4 │ │ movs r7, #0 │ │ movs r6, #0 │ │ - b.n 56da6 │ │ + b.n 56fb6 │ │ ldr r0, [sp, #344] @ 0x158 │ │ cmp r6, r0 │ │ - beq.n 56dd4 │ │ + beq.n 56fe4 │ │ add.w r0, fp, r7 │ │ strb.w r4, [fp, r7] │ │ adds r5, #16 │ │ adds r6, #1 │ │ adds r7, #24 │ │ movs r1, #2 │ │ cmp r5, sl │ │ strd r1, r9, [r0, #8] │ │ vstr d10, [r0, #16] │ │ str r6, [sp, #352] @ 0x160 │ │ - beq.n 56de0 │ │ + beq.n 56ff0 │ │ ldr r0, [r5, #0] │ │ movs r4, #0 │ │ lsls r0, r0, #31 │ │ - beq.n 56d82 │ │ + beq.n 56f92 │ │ vldr d10, [r5, #8] │ │ strb.w r4, [sp, #264] @ 0x108 │ │ vmov r0, r1, d10 │ │ bic.w r0, r1, #2147483648 @ 0x80000000 │ │ movw r1, #65535 @ 0xffff │ │ movt r1, #32751 @ 0x7fef │ │ cmp r0, r1 │ │ - bgt.n 56d82 │ │ + bgt.n 56f92 │ │ add r0, sp, #264 @ 0x108 │ │ - bl 75052 │ │ + bl 75106 │ │ movs r4, #2 │ │ - b.n 56d82 │ │ + b.n 56f92 │ │ add r0, sp, #344 @ 0x158 │ │ - bl 760fc │ │ + bl 76164 │ │ ldr.w fp, [sp, #348] @ 0x15c │ │ - b.n 56d88 │ │ + b.n 56f98 │ │ ldr r1, [sp, #344] @ 0x158 │ │ ldr r5, [sp, #168] @ 0xa8 │ │ add r0, sp, #228 @ 0xe4 │ │ ldrd r2, r3, [sp, #348] @ 0x15c │ │ stmia r0!, {r1, r2, r3} │ │ movs r0, #4 │ │ strb.w r0, [sp, #224] @ 0xe0 │ │ movs.w r0, r8, lsl #1 │ │ ldr.w r8, [sp, #144] @ 0x90 │ │ ldr r7, [sp, #172] @ 0xac │ │ ldr.w fp, [sp, #444] @ 0x1bc │ │ str r1, [sp, #36] @ 0x24 │ │ strd r3, r2, [sp, #28] │ │ - beq.w 55c10 │ │ + beq.w 55e20 │ │ mov r0, r5 │ │ - blx d87c0 │ │ - b.w 55c10 │ │ + blx d87d0 │ │ + b.w 55e20 │ │ movs r0, #8 │ │ movs r1, #0 │ │ str.w r9, [sp, #272] @ 0x110 │ │ strd r1, r0, [sp, #264] @ 0x108 │ │ - cbz r5, 56e82 │ │ + cbz r5, 57092 │ │ add.w r9, sl, r5, lsl #3 │ │ mov r1, r8 │ │ mov.w r8, #0 │ │ movs r5, #0 │ │ movs r7, #0 │ │ str r6, [sp, #168] @ 0xa8 │ │ str r1, [sp, #144] @ 0x90 │ │ - b.n 56e5a │ │ + b.n 5706a │ │ adds r1, r0, r5 │ │ cmp r4, #0 │ │ it ne │ │ movne r4, #2 │ │ strb r4, [r0, r5] │ │ asrs r2, r6, #31 │ │ lsrs r3, r6, #31 │ │ adds r7, #1 │ │ adds r5, #24 │ │ strd r3, r8, [r1, #8] │ │ strd r6, r2, [r1, #16] │ │ add.w r1, fp, #8 │ │ cmp r1, r9 │ │ str r7, [sp, #272] @ 0x110 │ │ - beq.n 56e76 │ │ + beq.n 57086 │ │ add.w fp, sl, r7, lsl #3 │ │ ldr.w r4, [sl, r7, lsl #3] │ │ ldr r1, [sp, #264] @ 0x108 │ │ ldr.w r6, [fp, #4] │ │ cmp r7, r1 │ │ - bne.n 56e36 │ │ + bne.n 57046 │ │ add r0, sp, #264 @ 0x108 │ │ - bl 760fc │ │ + bl 76164 │ │ ldr r0, [sp, #268] @ 0x10c │ │ - b.n 56e36 │ │ + b.n 57046 │ │ ldr r1, [sp, #264] @ 0x108 │ │ ldr.w r8, [sp, #144] @ 0x90 │ │ ldr.w fp, [sp, #444] @ 0x1bc │ │ ldr r6, [sp, #168] @ 0xa8 │ │ ldrd r2, r3, [sp, #268] @ 0x10c │ │ add r0, sp, #228 @ 0xe4 │ │ ldr r7, [sp, #172] @ 0xac │ │ stmia r0!, {r1, r2, r3} │ │ movs r0, #4 │ │ strb.w r0, [sp, #224] @ 0xe0 │ │ lsls r0, r6, #1 │ │ str r1, [sp, #60] @ 0x3c │ │ strd r3, r2, [sp, #52] @ 0x34 │ │ - beq.w 55c10 │ │ + beq.w 55e20 │ │ mov r0, sl │ │ - blx d87c0 │ │ - b.w 55c10 │ │ - bl 3e03c │ │ + blx d87d0 │ │ + b.w 55e20 │ │ + bl 3e344 │ │ add r2, sp, #208 @ 0xd0 │ │ ldmia r2, {r0, r1, r2} │ │ stmia.w r8, {r0, r1, r2} │ │ add sp, #360 @ 0x168 │ │ vpop {d8-d12} │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r1, [pc, #424] @ (5706c ) │ │ - ldr r0, [pc, #428] @ (57070 ) │ │ - ldr r3, [pc, #428] @ (57074 ) │ │ + ldr r1, [pc, #424] @ (5727c ) │ │ + ldr r0, [pc, #428] @ (57280 ) │ │ + ldr r3, [pc, #428] @ (57284 ) │ │ add r1, pc │ │ ldr r2, [sp, #268] @ 0x10c │ │ add r0, pc │ │ str r2, [sp, #356] @ 0x164 │ │ add r3, pc │ │ add r2, sp, #356 @ 0x164 │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ - ldr r3, [pc, #328] @ (57024 ) │ │ + bl 417b8 │ │ + ldr r3, [pc, #328] @ (57234 ) │ │ mov r0, r4 │ │ ldr r2, [sp, #184] @ 0xb8 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - blx d87c0 │ │ - ldr r0, [pc, #344] @ (57044 ) │ │ + bl 3fcb0 │ │ + blx d87d0 │ │ + ldr r0, [pc, #344] @ (57254 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #328] @ (5703c ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #328] @ (5724c ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #304] @ (5702c ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #304] @ (5723c ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r3, [pc, #280] @ (5701c ) │ │ + bl 3fd40 │ │ + ldr r3, [pc, #280] @ (5722c ) │ │ movs r0, #0 │ │ movs r1, #8 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #260] @ (57014 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #260] @ (57224 ) │ │ movs r0, #0 │ │ movs r1, #4 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #316] @ (57058 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #316] @ (57268 ) │ │ ldr r2, [sp, #184] @ 0xb8 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #248] @ (57020 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #248] @ (57230 ) │ │ mov r2, r1 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #284] @ (5704c ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #284] @ (5725c ) │ │ mov r2, r1 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #220] @ (57018 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #220] @ (57228 ) │ │ mov r2, r1 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #268] @ (57050 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #268] @ (57260 ) │ │ mov r2, r1 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #268] @ (5705c ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #268] @ (5726c ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r1, [pc, #260] @ (57060 ) │ │ - ldr r0, [pc, #264] @ (57064 ) │ │ - ldr r3, [pc, #264] @ (57068 ) │ │ + bl 3fcb0 │ │ + ldr r1, [pc, #260] @ (57270 ) │ │ + ldr r0, [pc, #264] @ (57274 ) │ │ + ldr r3, [pc, #264] @ (57278 ) │ │ add r1, pc │ │ ldr r2, [sp, #268] @ 0x10c │ │ add r0, pc │ │ str r2, [sp, #344] @ 0x158 │ │ add r3, pc │ │ add r2, sp, #344 @ 0x158 │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ - ldr r1, [pc, #260] @ (57078 ) │ │ - ldr r0, [pc, #260] @ (5707c ) │ │ - ldr r3, [pc, #264] @ (57080 ) │ │ + bl 417b8 │ │ + ldr r1, [pc, #260] @ (57288 ) │ │ + ldr r0, [pc, #260] @ (5728c ) │ │ + ldr r3, [pc, #264] @ (57290 ) │ │ add r1, pc │ │ ldr r2, [sp, #268] @ 0x10c │ │ add r0, pc │ │ str r2, [sp, #332] @ 0x14c │ │ add r3, pc │ │ add r2, sp, #332 @ 0x14c │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ - ldr r0, [pc, #160] @ (57030 ) │ │ + bl 417b8 │ │ + ldr r0, [pc, #160] @ (57240 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #168] @ (57040 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #168] @ (57250 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ movs r0, #1 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ - ldr r2, [pc, #128] @ (57028 ) │ │ + bl 3e2ac │ │ + ldr r2, [pc, #128] @ (57238 ) │ │ add r0, r5 │ │ ldr r1, [sp, #184] @ 0xb8 │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ movs r0, #1 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ - ldr r2, [pc, #124] @ (57038 ) │ │ + bl 3e2ac │ │ + ldr r2, [pc, #124] @ (57248 ) │ │ ldr r1, [sp, #160] @ 0xa0 │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r0, [pc, #112] @ (57034 ) │ │ + bl 3fd7c │ │ + ldr r0, [pc, #112] @ (57244 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #136] @ (57054 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #136] @ (57264 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ movs r0, #8 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ - ldr r2, [pc, #108] @ (57048 ) │ │ + bl 3e2ac │ │ + ldr r2, [pc, #108] @ (57258 ) │ │ ldr r1, [sp, #184] @ 0xb8 │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r2, [pc, #40] @ (57010 ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #40] @ (57220 ) │ │ ldr r1, [sp, #184] @ 0xb8 │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ movs r0, #8 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r1, r6 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #4 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #8 │ │ mov r1, r8 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - ands r4, r2 │ │ + subs r6, #20 │ │ movs r0, r1 │ │ - subs r3, #40 @ 0x28 │ │ + subs r1, #40 @ 0x28 │ │ movs r0, r1 │ │ - lsrs r0, r2 │ │ + subs r6, #208 @ 0xd0 │ │ movs r0, r1 │ │ - subs r3, #68 @ 0x44 │ │ + subs r1, #68 @ 0x44 │ │ movs r0, r1 │ │ - asrs r4, r0 │ │ + subs r7, #4 │ │ movs r0, r1 │ │ - lsrs r4, r1 │ │ + subs r6, #204 @ 0xcc │ │ movs r0, r1 │ │ - subs r7, #242 @ 0xf2 │ │ + subs r5, #242 @ 0xf2 │ │ movs r0, r1 │ │ - sbcs r0, r4 │ │ + subs r7, #160 @ 0xa0 │ │ movs r0, r1 │ │ - asrs r6, r3 │ │ + subs r7, #30 │ │ movs r0, r1 │ │ - asrs r0, r1 │ │ + subs r7, #8 │ │ movs r0, r1 │ │ - subs r2, #240 @ 0xf0 │ │ + subs r0, #240 @ 0xf0 │ │ movs r0, r1 │ │ - rors r0, r5 │ │ + subs r7, #232 @ 0xe8 │ │ movs r0, r1 │ │ - adcs r6, r2 │ │ + subs r7, #86 @ 0x56 │ │ movs r0, r1 │ │ - ldr r6, [pc, #704] @ (57308 ) │ │ + ldr r4, [pc, #704] @ (57518 ) │ │ movs r0, r1 │ │ - subs r3, #142 @ 0x8e │ │ + subs r1, #142 @ 0x8e │ │ movs r0, r1 │ │ - ands r2, r3 │ │ + subs r6, #26 │ │ movs r0, r1 │ │ - ands r6, r2 │ │ + subs r6, #22 │ │ movs r0, r1 │ │ - lsrs r0, r6 │ │ + subs r6, #240 @ 0xf0 │ │ movs r0, r1 │ │ - lsls r6, r1 │ │ + subs r6, #142 @ 0x8e │ │ movs r0, r1 │ │ - subs r2, #218 @ 0xda │ │ + subs r0, #218 @ 0xda │ │ movs r0, r1 │ │ - lsrs r6, r7 │ │ + subs r6, #254 @ 0xfe │ │ movs r0, r1 │ │ - movs r5, #33 @ 0x21 │ │ - vtbx.8 d19, {d28-d29}, d6 │ │ + movs r3, #17 │ │ + vqshrun.s64 d19, q3, #4 │ │ movs r0, r1 │ │ - sbcs r6, r2 │ │ + subs r7, #150 @ 0x96 │ │ movs r0, r1 │ │ - movs r5, #185 @ 0xb9 │ │ - @ instruction: 0xfffc3a5e │ │ + movs r3, #169 @ 0xa9 │ │ + vtbl.8 d19, {d28}, d30 │ │ movs r0, r1 │ │ - sbcs r4, r0 │ │ + subs r7, #132 @ 0x84 │ │ movs r0, r1 │ │ - movs r5, #7 │ │ - vtbl.8 d19, {d28-d29}, d28 │ │ + movs r2, #247 @ 0xf7 │ │ + vqshl.u64 , q14, #60 @ 0x3c │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #12 │ │ ldr.w ip, [r0, #8] │ │ mov r2, r0 │ │ ldr r0, [r1, #8] │ │ cmp ip, r0 │ │ - bne.w 57220 │ │ + bne.w 57430 │ │ ldrd r0, sl, [r1] │ │ movs r7, #0 │ │ ldrd r4, fp, [r2] │ │ mov.w r8, #0 │ │ cmp r0, #0 │ │ mov r1, r0 │ │ mov r2, r0 │ │ @@ -70398,230 +70494,230 @@ │ │ movne r2, #1 │ │ cmp r4, #0 │ │ it eq │ │ moveq ip, r4 │ │ it ne │ │ movne r1, #1 │ │ cmp.w ip, #0 │ │ - beq.w 57228 │ │ + beq.w 57438 │ │ lsls r1, r1, #31 │ │ - beq.w 57238 │ │ + beq.w 57448 │ │ cmp.w r8, #0 │ │ - beq.n 570e8 │ │ + beq.n 572f8 │ │ mov r3, r4 │ │ mov r4, r8 │ │ ldrh.w r1, [r4, #402] @ 0x192 │ │ cmp fp, r1 │ │ - bcs.n 57106 │ │ + bcs.n 57316 │ │ mov r6, r4 │ │ mov r1, fp │ │ - b.n 57120 │ │ + b.n 57330 │ │ cmp.w fp, #0 │ │ - beq.n 570f8 │ │ + beq.n 57308 │ │ ldr.w r4, [r4, #408] @ 0x198 │ │ subs.w fp, fp, #1 │ │ - bne.n 570ee │ │ + bne.n 572fe │ │ mov.w fp, #0 │ │ movs r3, #0 │ │ ldrh.w r1, [r4, #402] @ 0x192 │ │ cmp fp, r1 │ │ - bcc.n 570e2 │ │ + bcc.n 572f2 │ │ ldr.w r6, [r4, #264] @ 0x108 │ │ cmp r6, #0 │ │ - beq.w 57230 │ │ + beq.w 57440 │ │ ldrh.w r1, [r4, #400] @ 0x190 │ │ adds r3, #1 │ │ ldrh.w r5, [r6, #402] @ 0x192 │ │ mov r4, r6 │ │ cmp r1, r5 │ │ - bcs.n 57106 │ │ - cbz r3, 57140 │ │ + bcs.n 57316 │ │ + cbz r3, 57350 │ │ add.w r5, r6, r1, lsl #2 │ │ add.w r5, r5, #412 @ 0x19c │ │ ldr.w r8, [r5] │ │ subs r3, #1 │ │ add.w r5, r8, #408 @ 0x198 │ │ - bne.n 5712a │ │ + bne.n 5733a │ │ mov.w fp, #0 │ │ ldr r3, [sp, #8] │ │ - cbnz r3, 5714c │ │ - b.n 57228 │ │ + cbnz r3, 5735c │ │ + b.n 57438 │ │ add.w fp, r1, #1 │ │ mov r8, r6 │ │ ldr r3, [sp, #8] │ │ cmp r3, #0 │ │ - beq.n 57228 │ │ + beq.n 57438 │ │ lsls r2, r2, #31 │ │ - beq.n 57238 │ │ - cbz r7, 57164 │ │ + beq.n 57448 │ │ + cbz r7, 57374 │ │ mov r2, r0 │ │ mov r0, r7 │ │ ldrh.w r3, [r0, #402] @ 0x192 │ │ cmp sl, r3 │ │ - bcs.n 57182 │ │ + bcs.n 57392 │ │ mov r5, r0 │ │ mov r3, sl │ │ - b.n 5719a │ │ + b.n 573aa │ │ cmp.w sl, #0 │ │ - beq.n 57174 │ │ + beq.n 57384 │ │ ldr.w r0, [r0, #408] @ 0x198 │ │ subs.w sl, sl, #1 │ │ - bne.n 5716a │ │ + bne.n 5737a │ │ mov.w sl, #0 │ │ movs r2, #0 │ │ ldrh.w r3, [r0, #402] @ 0x192 │ │ cmp sl, r3 │ │ - bcc.n 5715e │ │ + bcc.n 5736e │ │ ldr.w r5, [r0, #264] @ 0x108 │ │ cmp r5, #0 │ │ - beq.n 57230 │ │ + beq.n 57440 │ │ ldrh.w r3, [r0, #400] @ 0x190 │ │ adds r2, #1 │ │ ldrh.w r0, [r5, #402] @ 0x192 │ │ cmp r3, r0 │ │ mov r0, r5 │ │ - bcs.n 57182 │ │ - cbz r2, 571b4 │ │ + bcs.n 57392 │ │ + cbz r2, 573c4 │ │ add.w r0, r5, r3, lsl #2 │ │ add.w r0, r0, #412 @ 0x19c │ │ ldr r7, [r0, #0] │ │ subs r2, #1 │ │ add.w r0, r7, #408 @ 0x198 │ │ - bne.n 571a4 │ │ + bne.n 573b4 │ │ mov.w sl, #0 │ │ - b.n 571ba │ │ + b.n 573ca │ │ add.w sl, r3, #1 │ │ mov r7, r5 │ │ add.w r4, r1, r1, lsl #1 │ │ add.w r9, r3, r3, lsl #1 │ │ add.w r0, r6, r4, lsl #2 │ │ add.w r1, r5, r9, lsl #2 │ │ add.w r0, r0, #268 @ 0x10c │ │ ldr.w r3, [r1, #276] @ 0x114 │ │ ldr r2, [r0, #8] │ │ cmp r2, r3 │ │ - bne.n 57220 │ │ + bne.n 57430 │ │ add.w r1, r1, #268 @ 0x10c │ │ ldr r0, [r0, #4] │ │ str r4, [sp, #4] │ │ mov r4, ip │ │ ldr r1, [r1, #4] │ │ - blx d8860 │ │ - cbnz r0, 57220 │ │ + blx d8870 │ │ + cbnz r0, 57430 │ │ ldr r0, [sp, #4] │ │ subs r4, #1 │ │ ldr r1, [sp, #8] │ │ subs r1, #1 │ │ str r1, [sp, #8] │ │ add.w r0, r6, r0, lsl #3 │ │ add.w r1, r5, r9, lsl #3 │ │ - bl 57248 │ │ + bl 57458 │ │ mov r1, r0 │ │ mov ip, r4 │ │ cmp r1, #0 │ │ mov.w r0, #0 │ │ mov.w r2, #1 │ │ mov.w r4, #0 │ │ mov.w r1, #1 │ │ - bne.w 570c2 │ │ + bne.w 572d2 │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #0 │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #1 │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #12] @ (57240 ) │ │ + ldr r0, [pc, #12] @ (57450 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #8] @ (57244 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #8] @ (57454 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - adds r7, #202 @ 0xca │ │ + bl 3fd40 │ │ + adds r5, #202 @ 0xca │ │ movs r0, r1 │ │ - adds r4, #250 @ 0xfa │ │ + adds r2, #250 @ 0xfa │ │ movs r0, r1 │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #4 │ │ ldrb r2, [r0, #0] │ │ mov r3, r0 │ │ ldrb r0, [r1, #0] │ │ cmp r2, r0 │ │ - bne.n 572ec │ │ + bne.n 574fc │ │ movs r0, #1 │ │ tbb [pc, r2] │ │ lsls r2, r4, #12 │ │ subs r3, #36 @ 0x24 │ │ - ldr r3, [pc, #44] @ (57290 ) │ │ + ldr r3, [pc, #44] @ (574a0 ) │ │ ldrb r0, [r1, #1] │ │ ldrb r1, [r3, #1] │ │ subs r0, r1, r0 │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ add sp, #4 │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r0, [r3, #12] │ │ ldr r2, [r1, #12] │ │ cmp r0, r2 │ │ - bne.n 572ec │ │ + bne.n 574fc │ │ cmp r0, #0 │ │ - beq.n 57300 │ │ + beq.n 57510 │ │ ldr r4, [r1, #8] │ │ subs r6, r0, #1 │ │ ldr r5, [r3, #8] │ │ movs r7, #0 │ │ mov r0, r5 │ │ mov r1, r4 │ │ - bl 57248 │ │ + bl 57458 │ │ subs r6, #1 │ │ adc.w r1, r7, #0 │ │ cmp r0, #0 │ │ ittt ne │ │ addne r5, #24 │ │ addne r4, #24 │ │ cmpne r1, #0 │ │ - bne.n 57286 │ │ + bne.n 57496 │ │ add sp, #4 │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r0, [r3, #8] │ │ ldr r2, [r1, #8] │ │ cmp r0, r2 │ │ - bne.n 572ec │ │ + bne.n 574fc │ │ cmp r0, #2 │ │ - beq.n 57306 │ │ + beq.n 57516 │ │ cmp r0, #1 │ │ ldrd r0, r1, [r1, #16] │ │ ldrd r2, r3, [r3, #16] │ │ eor.w r1, r1, r3 │ │ eor.w r0, r0, r2 │ │ orr.w r0, r0, r1 │ │ clz r0, r0 │ │ mov.w r0, r0, lsr #5 │ │ add sp, #4 │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r2, [r3, #12] │ │ ldr r0, [r1, #12] │ │ cmp r2, r0 │ │ - bne.n 572ec │ │ + bne.n 574fc │ │ ldr r0, [r3, #8] │ │ ldr r1, [r1, #8] │ │ - blx d8860 │ │ + blx d8870 │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ add sp, #4 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #0 │ │ add sp, #4 │ │ pop {r4, r5, r6, r7, pc} │ │ adds r0, r3, #4 │ │ adds r1, #4 │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 57084 │ │ + b.w 57294 │ │ movs r0, #1 │ │ add sp, #4 │ │ pop {r4, r5, r6, r7, pc} │ │ vldr d16, [r1, #16] │ │ movs r0, #0 │ │ vldr d17, [r3, #16] │ │ vcmp.f64 d17, d16 │ │ @@ -70633,36 +70729,36 @@ │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #188 @ 0xbc │ │ mov fp, r0 │ │ ldr r0, [r1, #0] │ │ mov r9, r3 │ │ mov r8, r1 │ │ cmp r0, #0 │ │ - beq.n 573d4 │ │ + beq.n 575e4 │ │ str.w fp, [sp, #52] @ 0x34 │ │ ldrd r6, fp, [r2, #4] │ │ ldr.w r7, [r8, #4] │ │ strd r9, r2, [sp, #44] @ 0x2c │ │ str.w r8, [sp, #40] @ 0x28 │ │ ldrh.w r8, [r0, #402] @ 0x192 │ │ add.w r5, r0, #268 @ 0x10c │ │ str r0, [sp, #60] @ 0x3c │ │ mov.w sl, #4294967295 @ 0xffffffff │ │ str r5, [sp, #56] @ 0x38 │ │ add.w r0, r8, r8, lsl #1 │ │ mov.w r9, r0, lsl #2 │ │ cmp.w r9, #0 │ │ - beq.n 573a6 │ │ + beq.n 575b6 │ │ ldrd r1, r4, [r5, #4] │ │ mov r0, r6 │ │ mov r2, r4 │ │ cmp fp, r4 │ │ it cc │ │ movcc r2, fp │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ subeq.w r0, fp, r4 │ │ cmp r0, #0 │ │ mov.w r0, #0 │ │ it mi │ │ movmi r0, #1 │ │ @@ -70671,37 +70767,37 @@ │ │ movgt r1, #1 │ │ subs r0, r1, r0 │ │ sub.w r9, r9, #12 │ │ add.w sl, sl, #1 │ │ adds r5, #12 │ │ uxtb r0, r0 │ │ cmp r0, #1 │ │ - beq.n 5735e │ │ - cbz r0, 573bc │ │ - b.n 573a8 │ │ + beq.n 5756e │ │ + cbz r0, 575cc │ │ + b.n 575b8 │ │ mov sl, r8 │ │ ldr.w r9, [sp, #60] @ 0x3c │ │ cmp r7, #0 │ │ - beq.n 5744c │ │ + beq.n 5765c │ │ add.w r0, r9, sl, lsl #2 │ │ subs r7, #1 │ │ ldr.w r0, [r0, #408] @ 0x198 │ │ - b.n 57346 │ │ + b.n 57556 │ │ ldr r0, [sp, #48] @ 0x30 │ │ ldr r7, [sp, #60] @ 0x3c │ │ ldr r0, [r0, #0] │ │ - cbz r0, 573ca │ │ + cbz r0, 575da │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr.w fp, [sp, #52] @ 0x34 │ │ ldr.w r9, [sp, #44] @ 0x2c │ │ - b.n 573e0 │ │ + b.n 575f0 │ │ ldrd r5, r7, [r2] │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ - bne.n 5740a │ │ + bne.n 5761a │ │ mov sl, r8 │ │ add.w r0, sl, sl, lsl #1 │ │ add.w lr, sp, #160 @ 0xa0 │ │ add.w r0, r7, r0, lsl #3 │ │ mov r3, lr │ │ mov ip, r0 │ │ ldmia.w ip, {r1, r2, r4, r5, r6, r7} │ │ @@ -70710,17 +70806,17 @@ │ │ stmia r0!, {r1, r2, r3, r5, r6, r7} │ │ ldmia.w lr, {r0, r1, r2, r3, r6, r7} │ │ stmia.w fp, {r0, r1, r2, r3, r6, r7} │ │ add sp, #188 @ 0xbc │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov.w r0, #408 @ 0x198 │ │ ldr r4, [r2, #8] │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 57a06 │ │ + beq.w 57c16 │ │ movs r2, #1 │ │ movs r1, #0 │ │ strh.w r2, [r0, #402] @ 0x192 │ │ add.w r2, r0, #264 @ 0x108 │ │ strd r0, r1, [r8] │ │ stmia r2!, {r1, r5, r7} │ │ str.w r4, [r0, #276] @ 0x114 │ │ @@ -70732,106 +70828,106 @@ │ │ adds r0, r1, #1 │ │ str.w r0, [r8, #8] │ │ add sp, #188 @ 0xbc │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r0, [sp, #48] @ 0x30 │ │ ldr r5, [r0, #0] │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ - bne.n 5745e │ │ + bne.n 5766e │ │ mov r7, r6 │ │ ldr.w sl, [sp, #40] @ 0x28 │ │ - b.n 573ca │ │ + b.n 575da │ │ cmp.w r8, #11 │ │ - bcs.n 574b2 │ │ + bcs.n 576c2 │ │ add.w ip, sl, sl, lsl #1 │ │ ldr r0, [sp, #56] @ 0x38 │ │ cmp r8, sl │ │ add.w r4, r0, ip, lsl #2 │ │ - bls.n 574be │ │ + bls.n 576ce │ │ sub.w r1, r8, sl │ │ add.w r0, r4, #12 │ │ mov sl, ip │ │ add.w r9, r1, r1, lsl #1 │ │ mov r1, r4 │ │ mov.w r2, r9, lsl #2 │ │ - bl d53ca │ │ + bl d509e │ │ ldr r7, [sp, #44] @ 0x2c │ │ add r0, sp, #96 @ 0x60 │ │ stmia.w r4, {r5, r6, fp} │ │ ldmia.w r7, {r1, r2, r3, r4, r5, r6} │ │ stmia r0!, {r1, r2, r3, r4, r5, r6} │ │ mov.w r2, r9, lsl #3 │ │ ldr r0, [sp, #60] @ 0x3c │ │ ldr.w r9, [sp, #60] @ 0x3c │ │ add.w r1, r0, sl, lsl #3 │ │ add.w r0, r1, #24 │ │ - bl d53c2 │ │ + bl d51f6 │ │ mov ip, sl │ │ - b.n 574cc │ │ + b.n 576dc │ │ cmp.w sl, #5 │ │ - bcs.n 574e6 │ │ + bcs.n 576f6 │ │ movs r7, #4 │ │ movs r4, #0 │ │ - b.n 57504 │ │ + b.n 57714 │ │ ldr r7, [sp, #44] @ 0x2c │ │ add r0, sp, #96 @ 0x60 │ │ stmia.w r4, {r5, r6, fp} │ │ ldmia.w r7, {r1, r2, r3, r4, r5, r6} │ │ stmia r0!, {r1, r2, r3, r4, r5, r6} │ │ add r1, sp, #96 @ 0x60 │ │ add.w r0, r9, ip, lsl #3 │ │ ldmia.w r1, {r2, r3, r4, r5, r6, r7} │ │ stmia r0!, {r2, r3, r4, r5, r6, r7} │ │ add.w r0, r8, #1 │ │ ldr.w fp, [sp, #52] @ 0x34 │ │ strh.w r0, [r9, #402] @ 0x192 │ │ - b.n 5763a │ │ - beq.n 574f6 │ │ + b.n 5784a │ │ + beq.n 57706 │ │ cmp.w sl, #6 │ │ - bne.n 574fc │ │ + bne.n 5770c │ │ movs r7, #5 │ │ mov.w sl, #0 │ │ - b.n 57502 │ │ + b.n 57712 │ │ movs r4, #0 │ │ mov r7, sl │ │ - b.n 57504 │ │ + b.n 57714 │ │ sub.w sl, sl, #7 │ │ movs r7, #6 │ │ movs r4, #1 │ │ mov.w r0, #408 @ 0x198 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 57a06 │ │ + beq.w 57c16 │ │ ldr.w r9, [sp, #60] @ 0x3c │ │ mov r8, r0 │ │ movs r0, #0 │ │ mvns r1, r7 │ │ str.w r0, [r8, #264] @ 0x108 │ │ ldrh.w r0, [r9, #402] @ 0x192 │ │ strd r5, r4, [sp, #28] │ │ add r1, r0 │ │ strh.w r1, [r8, #402] @ 0x192 │ │ cmp r1, #12 │ │ - bcs.w 57a10 │ │ + bcs.w 57c20 │ │ add.w r5, r7, r7, lsl #1 │ │ ldr r0, [sp, #56] @ 0x38 │ │ str r7, [sp, #36] @ 0x24 │ │ add.w r7, r1, r1, lsl #1 │ │ add.w r4, r0, r5, lsl #2 │ │ add.w r0, r8, #268 @ 0x10c │ │ add.w r3, r4, #12 │ │ lsls r2, r7, #2 │ │ mov r1, r3 │ │ - bl d52ca │ │ + bl d4c3c │ │ lsls r2, r7, #3 │ │ mov r7, r9 │ │ add.w r9, r9, r5, lsl #3 │ │ mov r0, r8 │ │ add.w r1, r9, #24 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldrd r0, ip, [r4, #4] │ │ mov lr, r7 │ │ ldr r1, [sp, #56] @ 0x38 │ │ str r0, [sp, #48] @ 0x30 │ │ ldr r0, [sp, #36] @ 0x24 │ │ strh.w r0, [r7, #402] @ 0x192 │ │ add r0, sp, #160 @ 0xa0 │ │ @@ -70847,37 +70943,37 @@ │ │ cmp r0, #0 │ │ it eq │ │ moveq r8, lr │ │ add.w r0, r8, #268 @ 0x10c │ │ ldrh.w r1, [r8, #402] @ 0x192 │ │ add.w r4, r0, r9, lsl #2 │ │ cmp r1, sl │ │ - bls.n 575f2 │ │ + bls.n 57802 │ │ str r1, [sp, #24] │ │ sub.w r1, r1, sl │ │ add.w r0, r4, #12 │ │ str.w ip, [sp, #32] │ │ add.w sl, r1, r1, lsl #1 │ │ mov r1, r4 │ │ mov.w r2, sl, lsl #2 │ │ - bl d53ca │ │ + bl d509e │ │ ldr r0, [sp, #28] │ │ ldr r7, [sp, #44] @ 0x2c │ │ stmia.w r4, {r0, r6, fp} │ │ add r0, sp, #96 @ 0x60 │ │ ldmia.w r7, {r1, r2, r3, r4, r5, r6} │ │ stmia r0!, {r1, r2, r3, r4, r5, r6} │ │ add.w r1, r8, r9, lsl #3 │ │ add.w r0, r1, #24 │ │ mov.w r2, sl, lsl #3 │ │ ldr.w sl, [sp, #24] │ │ - bl d53c2 │ │ + bl d51f6 │ │ ldr.w lr, [sp, #48] @ 0x30 │ │ ldr.w ip, [sp, #32] │ │ - b.n 57608 │ │ + b.n 57818 │ │ ldr r0, [sp, #28] │ │ mov sl, r1 │ │ ldr r7, [sp, #44] @ 0x2c │ │ stmia.w r4, {r0, r6, fp} │ │ add r0, sp, #96 @ 0x60 │ │ ldmia.w r7, {r1, r2, r3, r4, r5, r6} │ │ stmia r0!, {r1, r2, r3, r4, r5, r6} │ │ @@ -70894,29 +70990,29 @@ │ │ mov r0, r4 │ │ stmia r0!, {r2, r3, r7} │ │ ldmia.w r1, {r2, r3, r6, r7} │ │ stmia r0!, {r2, r3, r6, r7} │ │ ldr.w sl, [sp, #36] @ 0x24 │ │ ldr.w fp, [sp, #52] @ 0x34 │ │ cmp.w sl, #2147483648 @ 0x80000000 │ │ - bne.n 57640 │ │ + bne.n 57850 │ │ ldr.w r8, [sp, #40] @ 0x28 │ │ - b.n 57436 │ │ + b.n 57646 │ │ mov r0, r4 │ │ add r5, sp, #64 @ 0x40 │ │ ldmia r0!, {r2, r3, r7} │ │ mov r1, r5 │ │ stmia r1!, {r2, r3, r7} │ │ ldmia.w r0, {r2, r3, r6, r7} │ │ stmia r1!, {r2, r3, r6, r7} │ │ ldr r1, [sp, #60] @ 0x3c │ │ ldr.w r8, [sp, #40] @ 0x28 │ │ ldr.w r0, [r1, #264] @ 0x108 │ │ cmp r0, #0 │ │ - beq.w 578be │ │ + beq.w 57ace │ │ adds r2, r5, #4 │ │ ldr r4, [sp, #56] @ 0x38 │ │ str r2, [sp, #0] │ │ movs r2, #0 │ │ str r2, [sp, #44] @ 0x2c │ │ mov r3, lr │ │ mov r7, ip │ │ @@ -70924,106 +71020,106 @@ │ │ ldrh.w ip, [r0, #402] @ 0x192 │ │ mov r9, r0 │ │ ldrh.w sl, [r1, #400] @ 0x190 │ │ add r0, sp, #16 │ │ cmp.w ip, #11 │ │ str r4, [sp, #28] │ │ stmia.w r0, {r2, r7, ip} │ │ - bcc.w 57940 │ │ + bcc.w 57b50 │ │ cmp.w sl, #5 │ │ str r3, [sp, #12] │ │ - bcs.n 5769a │ │ + bcs.n 578aa │ │ movs r5, #0 │ │ mov.w fp, #4 │ │ - b.n 576be │ │ - beq.n 576ae │ │ + b.n 578ce │ │ + beq.n 578be │ │ cmp.w sl, #6 │ │ - bne.n 576b4 │ │ + bne.n 578c4 │ │ movs r5, #1 │ │ mov.w sl, #0 │ │ mov.w fp, #5 │ │ - b.n 576be │ │ + b.n 578ce │ │ movs r5, #0 │ │ mov fp, sl │ │ - b.n 576be │ │ + b.n 578ce │ │ sub.w sl, sl, #7 │ │ movs r5, #1 │ │ mov.w fp, #6 │ │ mov.w r0, #456 @ 0x1c8 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 57a28 │ │ + beq.w 57c38 │ │ mov r8, r0 │ │ movs r0, #0 │ │ str.w r0, [r8, #264] @ 0x108 │ │ mvn.w r1, fp │ │ ldrh.w r0, [r9, #402] @ 0x192 │ │ str r5, [sp, #8] │ │ add r1, r0 │ │ strh.w r1, [r8, #402] @ 0x192 │ │ cmp r1, #12 │ │ - bcs.w 57a10 │ │ + bcs.w 57c20 │ │ add.w r4, fp, fp, lsl #1 │ │ add.w r5, r1, r1, lsl #1 │ │ add.w r0, r8, #268 @ 0x10c │ │ add.w r7, r9, r4, lsl #2 │ │ lsls r2, r5, #2 │ │ add.w r3, r7, #280 @ 0x118 │ │ mov r1, r3 │ │ - bl d52ca │ │ + bl d4c3c │ │ add.w r0, r9, r4, lsl #3 │ │ str r0, [sp, #48] @ 0x30 │ │ add.w r1, r0, #24 │ │ lsls r2, r5, #3 │ │ mov r0, r8 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr r5, [sp, #48] @ 0x30 │ │ str.w r9, [sp, #60] @ 0x3c │ │ strh.w fp, [r9, #402] @ 0x192 │ │ str.w r8, [sp, #56] @ 0x38 │ │ ldrd ip, lr, [r7, #272] @ 0x110 │ │ ldr.w r9, [r7, #268] @ 0x10c │ │ ldr r0, [sp, #4] │ │ ldmia.w r5, {r1, r2, r3, r4, r6, r7} │ │ stmia r0!, {r1, r2, r3, r4, r6, r7} │ │ ldr r6, [sp, #56] @ 0x38 │ │ ldrh.w r7, [r6, #402] @ 0x192 │ │ adds r1, r7, #1 │ │ cmp r7, #12 │ │ - bcs.w 57a1c │ │ + bcs.w 57c2c │ │ ldr r0, [sp, #24] │ │ str.w ip, [sp, #48] @ 0x30 │ │ sub.w r0, r0, fp │ │ strd lr, r9, [sp, #32] │ │ cmp r0, r1 │ │ - bne.w 57a32 │ │ + bne.w 57c42 │ │ ldr r0, [sp, #44] @ 0x2c │ │ add.w r4, r8, #408 @ 0x198 │ │ ldr.w r9, [sp, #60] @ 0x3c │ │ lsls r2, r1, #2 │ │ adds r0, #1 │ │ str r0, [sp, #44] @ 0x2c │ │ add.w r0, r9, fp, lsl #2 │ │ add.w r3, r0, #412 @ 0x19c │ │ mov r0, r4 │ │ mov r1, r3 │ │ - bl d52ca │ │ + bl d4c3c │ │ ldr r5, [sp, #8] │ │ movs r0, #0 │ │ ldr.w r1, [r4, r0, lsl #2] │ │ cmp r0, r7 │ │ strh.w r0, [r1, #400] @ 0x190 │ │ str.w r6, [r1, #264] @ 0x108 │ │ mov.w r1, #0 │ │ it cc │ │ movcc r1, #1 │ │ - bcs.n 5779a │ │ + bcs.n 579aa │ │ add r0, r1 │ │ cmp r0, r7 │ │ - bls.n 5777c │ │ + bls.n 5798c │ │ add r1, sp, #160 @ 0xa0 │ │ add r0, sp, #128 @ 0x80 │ │ cmp r5, #0 │ │ ldmia r1!, {r2, r3, r7} │ │ stmia r0!, {r2, r3, r7} │ │ ldmia.w r1, {r2, r3, r6, r7} │ │ stmia r0!, {r2, r3, r6, r7} │ │ @@ -71031,45 +71127,45 @@ │ │ it eq │ │ moveq r8, r9 │ │ add.w r0, r8, #268 @ 0x10c │ │ ldrh.w r5, [r8, #402] @ 0x192 │ │ add.w r4, r0, r7, lsl #2 │ │ add.w r9, sl, #1 │ │ cmp r5, sl │ │ - bls.n 5781e │ │ + bls.n 57a2e │ │ sub.w r1, r5, sl │ │ add.w fp, r9, r9, lsl #1 │ │ str r1, [sp, #24] │ │ add.w r6, r1, r1, lsl #1 │ │ add.w r0, r0, fp, lsl #2 │ │ mov r1, r4 │ │ lsls r2, r6, #2 │ │ - bl d53ca │ │ + bl d509e │ │ ldr r0, [sp, #16] │ │ lsls r2, r6, #3 │ │ str r0, [r4, #0] │ │ ldr r0, [sp, #12] │ │ str r0, [r4, #4] │ │ ldr r0, [sp, #20] │ │ str r0, [r4, #8] │ │ add.w r0, r8, fp, lsl #3 │ │ add.w fp, r8, r7, lsl #3 │ │ mov r1, fp │ │ - bl d53c2 │ │ + bl d51f6 │ │ ldr r0, [sp, #0] │ │ ldmia.w r0, {r1, r2, r3, r4, r6, r7} │ │ add.w r0, r8, #408 @ 0x198 │ │ stmia.w fp, {r1, r2, r3, r4, r6, r7} │ │ add.w r1, r0, r9, lsl #2 │ │ add.w r0, r0, sl, lsl #2 │ │ ldr r2, [sp, #24] │ │ adds r0, #8 │ │ lsls r2, r2, #2 │ │ - bl d53ca │ │ - b.n 57838 │ │ + bl d509e │ │ + b.n 57a48 │ │ ldr r0, [sp, #16] │ │ add.w ip, r8, r7, lsl #3 │ │ str r0, [r4, #0] │ │ ldr r0, [sp, #12] │ │ ldr r1, [sp, #0] │ │ str r0, [r4, #4] │ │ ldr r0, [sp, #20] │ │ @@ -71082,34 +71178,34 @@ │ │ adds r0, r5, #1 │ │ ldr r2, [sp, #28] │ │ add.w ip, sp, #96 @ 0x60 │ │ str.w r2, [r1, #408] @ 0x198 │ │ adds r1, r5, #2 │ │ cmp r9, r1 │ │ strh.w r0, [r8, #402] @ 0x192 │ │ - bcs.n 57872 │ │ + bcs.n 57a82 │ │ add.w r1, r8, sl, lsl #2 │ │ add.w sl, sl, #1 │ │ cmp r0, sl │ │ ldr.w r1, [r1, #412] @ 0x19c │ │ strh.w sl, [r1, #400] @ 0x190 │ │ str.w r8, [r1, #264] @ 0x108 │ │ - bne.n 5785a │ │ + bne.n 57a6a │ │ add r0, sp, #128 @ 0x80 │ │ mov r1, ip │ │ add r5, sp, #64 @ 0x40 │ │ ldmia r0!, {r2, r3, r7} │ │ stmia r1!, {r2, r3, r7} │ │ ldmia.w r0, {r2, r3, r6, r7} │ │ stmia r1!, {r2, r3, r6, r7} │ │ ldr.w sl, [sp, #36] @ 0x24 │ │ ldr.w r8, [sp, #40] @ 0x28 │ │ ldr r4, [sp, #60] @ 0x3c │ │ cmp.w sl, #2147483648 @ 0x80000000 │ │ - beq.w 57436 │ │ + beq.w 57646 │ │ mov r0, ip │ │ mov r1, r5 │ │ ldmia r0!, {r2, r3, r7} │ │ stmia r1!, {r2, r3, r7} │ │ ldmia.w r0, {r2, r3, r6, r7} │ │ stmia r1!, {r2, r3, r6, r7} │ │ mov r3, lr │ │ @@ -71117,169 +71213,169 @@ │ │ ldr.w ip, [sp, #32] │ │ mov r2, sl │ │ ldr r6, [sp, #56] @ 0x38 │ │ ldr.w r0, [r4, #264] @ 0x108 │ │ mov r7, ip │ │ mov r4, r6 │ │ cmp r0, #0 │ │ - bne.w 57670 │ │ - b.n 578c4 │ │ + bne.w 57880 │ │ + b.n 57ad4 │ │ ldr r6, [sp, #56] @ 0x38 │ │ movs r0, #0 │ │ str r0, [sp, #44] @ 0x2c │ │ ldr.w r4, [r8] │ │ str.w ip, [sp, #32] │ │ cmp r4, #0 │ │ - beq.w 57a40 │ │ + beq.w 57c50 │ │ mov.w r0, #456 @ 0x1c8 │ │ mov r9, lr │ │ ldr.w r7, [r8, #4] │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 57a28 │ │ + beq.w 57c38 │ │ adds r2, r7, #1 │ │ mov.w r1, #0 │ │ str.w r4, [r0, #408] @ 0x198 │ │ strh.w r1, [r0, #402] @ 0x192 │ │ str.w r1, [r0, #264] @ 0x108 │ │ - bcs.w 57a48 │ │ + bcs.w 57c58 │ │ strh.w r1, [r4, #400] @ 0x190 │ │ ldr r1, [sp, #44] @ 0x2c │ │ str.w r0, [r4, #264] @ 0x108 │ │ cmp r1, r7 │ │ strd r0, r2, [r8] │ │ - bne.w 57a50 │ │ + bne.w 57c60 │ │ mov r3, r9 │ │ mov.w ip, #1 │ │ ldr r1, [sp, #32] │ │ add.w lr, r5, #4 │ │ strd sl, r3, [r0, #268] @ 0x10c │ │ mov r9, r6 │ │ strh.w ip, [r0, #402] @ 0x192 │ │ mov r3, r0 │ │ str.w r1, [r0, #276] @ 0x114 │ │ ldmia.w lr, {r1, r2, r4, r5, r6, r7} │ │ stmia r3!, {r1, r2, r4, r5, r6, r7} │ │ strh.w ip, [r9, #400] @ 0x190 │ │ str.w r0, [r9, #264] @ 0x108 │ │ str.w r9, [r0, #412] @ 0x19c │ │ - b.n 57436 │ │ + b.n 57646 │ │ add.w r4, sl, sl, lsl #1 │ │ add.w r0, r9, #268 @ 0x10c │ │ add.w r5, sl, #1 │ │ add.w lr, ip, #1 │ │ add.w r6, r0, r4, lsl #2 │ │ cmp sl, ip │ │ str r5, [sp, #60] @ 0x3c │ │ - bcs.n 579c4 │ │ + bcs.n 57bd4 │ │ add.w r1, r5, r5, lsl #1 │ │ str r1, [sp, #48] @ 0x30 │ │ mov r5, r3 │ │ str.w lr, [sp, #56] @ 0x38 │ │ add.w r0, r0, r1, lsl #2 │ │ sub.w r1, ip, sl │ │ str r1, [sp, #52] @ 0x34 │ │ add.w r7, r1, r1, lsl #1 │ │ mov r1, r6 │ │ lsls r2, r7, #2 │ │ - bl d53ca │ │ + bl d509e │ │ ldr r0, [sp, #16] │ │ add.w r1, r9, r4, lsl #3 │ │ strd r0, r5, [r6] │ │ lsls r2, r7, #3 │ │ ldr r0, [sp, #20] │ │ str r0, [r6, #8] │ │ ldr r0, [sp, #48] @ 0x30 │ │ str r1, [sp, #48] @ 0x30 │ │ add.w r0, r9, r0, lsl #3 │ │ - bl d53c2 │ │ + bl d51f6 │ │ ldr r6, [sp, #0] │ │ ldr r5, [sp, #48] @ 0x30 │ │ ldmia.w r6, {r0, r1, r2, r3, r4, r7} │ │ stmia r5!, {r0, r1, r2, r3, r4, r7} │ │ add.w r0, r9, #408 @ 0x198 │ │ ldr r4, [sp, #60] @ 0x3c │ │ ldr r2, [sp, #52] @ 0x34 │ │ add.w r1, r0, r4, lsl #2 │ │ add.w r0, r0, sl, lsl #2 │ │ adds r0, #8 │ │ lsls r2, r2, #2 │ │ - bl d53ca │ │ + bl d509e │ │ ldr.w lr, [sp, #56] @ 0x38 │ │ ldr.w ip, [sp, #24] │ │ - b.n 579d4 │ │ + b.n 57be4 │ │ ldr r5, [sp, #0] │ │ add.w r0, r9, r4, lsl #3 │ │ stmia r6!, {r2, r3, r7} │ │ ldmia.w r5, {r1, r2, r3, r4, r6, r7} │ │ stmia r0!, {r1, r2, r3, r4, r6, r7} │ │ ldr r4, [sp, #60] @ 0x3c │ │ add.w r0, r9, r4, lsl #2 │ │ ldr r1, [sp, #28] │ │ strh.w lr, [r9, #402] @ 0x192 │ │ str.w r1, [r0, #408] @ 0x198 │ │ add.w r0, ip, #2 │ │ cmp r4, r0 │ │ - bcs.w 57436 │ │ + bcs.w 57646 │ │ add.w r0, r9, #412 @ 0x19c │ │ ldr.w r1, [r0, sl, lsl #2] │ │ add.w sl, sl, #1 │ │ cmp lr, sl │ │ strh.w sl, [r1, #400] @ 0x190 │ │ str.w r9, [r1, #264] @ 0x108 │ │ - bne.n 579f0 │ │ - b.n 57436 │ │ + bne.n 57c00 │ │ + b.n 57646 │ │ movs r0, #8 │ │ mov.w r1, #408 @ 0x198 │ │ - bl 3de2a │ │ - ldr r3, [pc, #88] @ (57a6c ) │ │ + bl 3e132 │ │ + ldr r3, [pc, #88] @ (57c7c ) │ │ movs r0, #0 │ │ movs r2, #11 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #84] @ (57a74 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #84] @ (57c84 ) │ │ movs r0, #0 │ │ movs r2, #12 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ movs r0, #8 │ │ mov.w r1, #456 @ 0x1c8 │ │ - bl 3de2a │ │ - ldr r0, [pc, #68] @ (57a78 ) │ │ + bl 3e132 │ │ + ldr r0, [pc, #68] @ (57c88 ) │ │ movs r1, #40 @ 0x28 │ │ - ldr r2, [pc, #68] @ (57a7c ) │ │ + ldr r2, [pc, #68] @ (57c8c ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r0, [pc, #36] @ (57a68 ) │ │ + bl 3fd54 │ │ + ldr r0, [pc, #36] @ (57c78 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #36] @ (57a70 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #36] @ (57c80 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #12] @ (57a60 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #12] @ (57c70 ) │ │ movs r1, #48 @ 0x30 │ │ - ldr r2, [pc, #12] @ (57a64 ) │ │ + ldr r2, [pc, #12] @ (57c74 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ + bl 3fd54 │ │ nop │ │ - @ instruction: 0xeafefffb │ │ - cmp r7, #84 @ 0x54 │ │ + strd pc, pc, [lr], #1004 @ 0x3ec │ │ + cmp r5, #84 @ 0x54 │ │ movs r0, r1 │ │ - cmp r7, #90 @ 0x5a │ │ + cmp r5, #90 @ 0x5a │ │ movs r0, r1 │ │ - cmp r7, #198 @ 0xc6 │ │ + cmp r5, #198 @ 0xc6 │ │ movs r0, r1 │ │ - cmp r7, #114 @ 0x72 │ │ + cmp r5, #114 @ 0x72 │ │ movs r0, r1 │ │ - cmp r7, #202 @ 0xca │ │ + cmp r5, #202 @ 0xca │ │ movs r0, r1 │ │ - @ instruction: 0xeb4cfffb │ │ - cmp r7, #146 @ 0x92 │ │ + ldmdb ip!, {r0, r1, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ + cmp r5, #146 @ 0x92 │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #72 @ 0x48 │ │ ldmia.w r1, {r2, r4, r6} │ │ movs r7, #0 │ │ mov r8, r0 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ @@ -71288,68 +71384,68 @@ │ │ str r7, [sp, #20] │ │ str r7, [sp, #12] │ │ cmp r2, #0 │ │ str r0, [sp, #0] │ │ ite eq │ │ moveq r6, r2 │ │ movne r1, #1 │ │ - b.n 57aca │ │ + b.n 57cda │ │ adds r4, r2, #1 │ │ mov r7, r1 │ │ add.w r0, r2, r2, lsl #1 │ │ subs r6, #1 │ │ add.w r2, r1, r0, lsl #3 │ │ add.w r0, r1, r0, lsl #2 │ │ add.w r1, r0, #268 @ 0x10c │ │ mov r0, r5 │ │ - bl 57f10 │ │ + bl 58120 │ │ movs r2, #0 │ │ movs r1, #1 │ │ cmp r0, #0 │ │ - bne.n 57b6a │ │ - cbz r6, 57b2c │ │ + bne.n 57d7a │ │ + cbz r6, 57d3c │ │ lsls r0, r1, #31 │ │ - beq.n 57bcc │ │ - cbz r7, 57ae2 │ │ + beq.n 57ddc │ │ + cbz r7, 57cf2 │ │ mov r0, r2 │ │ ldrh.w r1, [r7, #402] @ 0x192 │ │ cmp r4, r1 │ │ - bcs.n 57afa │ │ + bcs.n 57d0a │ │ mov r1, r7 │ │ mov r2, r4 │ │ - b.n 57b12 │ │ - cbz r4, 57aec │ │ + b.n 57d22 │ │ + cbz r4, 57cfc │ │ ldr.w r2, [r2, #408] @ 0x198 │ │ subs r4, #1 │ │ - bne.n 57ae4 │ │ + bne.n 57cf4 │ │ movs r0, #0 │ │ mov r7, r2 │ │ movs r4, #0 │ │ ldrh.w r1, [r7, #402] @ 0x192 │ │ cmp r4, r1 │ │ - bcc.n 57adc │ │ + bcc.n 57cec │ │ ldr.w r1, [r7, #264] @ 0x108 │ │ cmp r1, #0 │ │ - beq.n 57bc4 │ │ + beq.n 57dd4 │ │ ldrh.w r2, [r7, #400] @ 0x190 │ │ adds r0, #1 │ │ ldrh.w r3, [r1, #402] @ 0x192 │ │ mov r7, r1 │ │ cmp r2, r3 │ │ - bcs.n 57afa │ │ + bcs.n 57d0a │ │ cmp r0, #0 │ │ - beq.n 57aa6 │ │ + beq.n 57cb6 │ │ add.w r3, r1, r2, lsl #2 │ │ add.w r3, r3, #412 @ 0x19c │ │ ldr r7, [r3, #0] │ │ subs r0, #1 │ │ add.w r3, r7, #408 @ 0x198 │ │ - bne.n 57b1e │ │ + bne.n 57d2e │ │ movs r4, #0 │ │ - b.n 57aaa │ │ + b.n 57cba │ │ add r7, sp, #12 │ │ ldrd r1, r0, [sp] │ │ movs r6, #5 │ │ ldmia r7, {r2, r3, r7} │ │ lsls r1, r1, #1 │ │ str.w r7, [sp, #35] @ 0x23 │ │ str.w r3, [sp, #31] │ │ @@ -71359,118 +71455,118 @@ │ │ ldr r5, [sp, #24] │ │ str.w r7, [r8, #12] │ │ strb.w r6, [r8] │ │ str.w r5, [r8, #1] │ │ str.w r2, [r8, #5] │ │ str.w r3, [r8, #9] │ │ it ne │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add sp, #72 @ 0x48 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ ldr r2, [sp, #12] │ │ movs r1, #6 │ │ str.w r0, [r8, #4] │ │ movs r0, #0 │ │ strb.w r1, [r8] │ │ - cbz r2, 57b92 │ │ + cbz r2, 57da2 │ │ add.w ip, sp, #44 @ 0x2c │ │ ldrd r3, r1, [sp, #16] │ │ stmia.w ip, {r0, r2, r3} │ │ add.w ip, sp, #28 │ │ stmia.w ip, {r0, r2, r3} │ │ movs r0, #1 │ │ - b.n 57b94 │ │ + b.n 57da4 │ │ movs r1, #0 │ │ add r4, sp, #60 @ 0x3c │ │ add r5, sp, #24 │ │ str r1, [sp, #56] @ 0x38 │ │ str r0, [sp, #40] @ 0x28 │ │ str r0, [sp, #24] │ │ mov r0, r4 │ │ mov r1, r5 │ │ - bl 4de98 │ │ + bl 331f8 │ │ ldr r0, [sp, #60] @ 0x3c │ │ - cbz r0, 57bb2 │ │ + cbz r0, 57dc2 │ │ ldr r1, [sp, #68] @ 0x44 │ │ - bl 4e028 │ │ - b.n 57b9e │ │ + bl 4e238 │ │ + b.n 57dae │ │ ldr r0, [sp, #0] │ │ lsls r0, r0, #1 │ │ - beq.n 57b64 │ │ + beq.n 57d74 │ │ ldr r0, [sp, #4] │ │ - blx d87c0 │ │ + blx d87d0 │ │ add sp, #72 @ 0x48 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ - ldr r0, [pc, #12] @ (57bd4 ) │ │ + ldr r0, [pc, #12] @ (57de4 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #8] @ (57bd8 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #8] @ (57de8 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - cmp r6, #54 @ 0x36 │ │ + bl 3fd40 │ │ + cmp r4, #54 @ 0x36 │ │ movs r0, r1 │ │ - cmp r3, #102 @ 0x66 │ │ + cmp r1, #102 @ 0x66 │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #52 @ 0x34 │ │ ldr r4, [r1, #8] │ │ movw r2, #21846 @ 0x5556 │ │ movt r2, #1365 @ 0x555 │ │ cmp r4, r2 │ │ - bcc.n 57bf4 │ │ - bl 3e03c │ │ + bcc.n 57e04 │ │ + bl 3e344 │ │ str r0, [sp, #0] │ │ movs r6, #0 │ │ ldr r0, [r1, #4] │ │ str r0, [sp, #4] │ │ add.w r0, r4, r4, lsl #1 │ │ movs.w fp, r0, lsl #3 │ │ - beq.n 57c1e │ │ + beq.n 57e2e │ │ mov r0, fp │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 57cd4 │ │ + beq.n 57ee4 │ │ mov r8, r0 │ │ mov r0, r4 │ │ str r6, [sp, #16] │ │ strd r0, r8, [sp, #8] │ │ - cbnz r4, 57c2c │ │ - b.n 57c78 │ │ + cbnz r4, 57e3c │ │ + b.n 57e88 │ │ mov.w r8, #8 │ │ movs r0, #0 │ │ str r6, [sp, #16] │ │ strd r0, r8, [sp, #8] │ │ - cbz r4, 57c78 │ │ + cbz r4, 57e88 │ │ add.w r9, sp, #24 │ │ mov.w sl, #0 │ │ movs r6, #0 │ │ ldr r0, [sp, #4] │ │ add.w r1, r0, sl │ │ mov r0, r9 │ │ - bl 57cdc │ │ + bl 57eec │ │ ldrb.w r0, [sp, #24] │ │ cmp r0, #6 │ │ - beq.n 57ca8 │ │ + beq.n 57eb8 │ │ ldr r0, [sp, #8] │ │ cmp r6, r0 │ │ - beq.n 57c6c │ │ + beq.n 57e7c │ │ mov r1, r9 │ │ add.w ip, r8, sl │ │ ldmia.w r1, {r0, r2, r3, r4, r5, r7} │ │ add.w sl, sl, #24 │ │ adds r6, #1 │ │ cmp fp, sl │ │ stmia.w ip, {r0, r2, r3, r4, r5, r7} │ │ str r6, [sp, #16] │ │ - bne.n 57c36 │ │ - b.n 57c78 │ │ + bne.n 57e46 │ │ + b.n 57e88 │ │ add r0, sp, #8 │ │ - bl 760fc │ │ + bl 76164 │ │ ldr.w r8, [sp, #12] │ │ - b.n 57c50 │ │ + b.n 57e60 │ │ add r2, sp, #8 │ │ ldr r6, [sp, #0] │ │ movs r3, #4 │ │ ldmia r2, {r0, r1, r2} │ │ str.w r2, [sp, #35] @ 0x23 │ │ str.w r1, [sp, #31] │ │ ldr r1, [sp, #32] │ │ @@ -71485,31 +71581,31 @@ │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r2, [sp, #0] │ │ movs r1, #6 │ │ ldr r0, [sp, #28] │ │ strb r1, [r2, #0] │ │ str r0, [r2, #4] │ │ - cbz r6, 57cc2 │ │ + cbz r6, 57ed2 │ │ mov r4, r8 │ │ mov r0, r4 │ │ - bl 4dd34 │ │ + bl 4e03c │ │ adds r4, #24 │ │ subs r6, #1 │ │ - bne.n 57cb6 │ │ + bne.n 57ec6 │ │ ldr r0, [sp, #8] │ │ cmp r0, #0 │ │ - beq.n 57ca2 │ │ + beq.n 57eb2 │ │ mov r0, r8 │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ movs r0, #8 │ │ mov r1, fp │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #72 @ 0x48 │ │ mov r4, r0 │ │ ldrb r0, [r1, #0] │ │ tbb [pc, r0] │ │ adds r5, #3 │ │ movs r5, #15 │ │ @@ -71518,18 +71614,18 @@ │ │ strb r0, [r4, #0] │ │ add sp, #72 @ 0x48 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ adds r1, #4 │ │ mov r0, r4 │ │ add sp, #72 @ 0x48 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, lr} │ │ - b.w 57bdc │ │ + b.w 57dec │ │ ldr r0, [r1, #8] │ │ cmp r0, #2 │ │ - beq.w 57e80 │ │ + beq.w 58090 │ │ ldrd r1, r2, [r1, #16] │ │ cmp r0, #1 │ │ mov.w r3, #2 │ │ mov.w r0, #0 │ │ strb r3, [r4, #0] │ │ itee ne │ │ strne r0, [r4, #8] │ │ @@ -71538,23 +71634,23 @@ │ │ str r1, [r4, #16] │ │ str r0, [r4, #12] │ │ str r2, [r4, #20] │ │ add sp, #72 @ 0x48 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ ldrd r6, r5, [r1, #8] │ │ cmp r5, #0 │ │ - beq.w 57e64 │ │ + beq.w 58074 │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ mov r7, r0 │ │ cmp r0, #0 │ │ - bne.w 57e66 │ │ + bne.w 58076 │ │ movs r0, #1 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ ldrb r1, [r1, #1] │ │ strb r0, [r4, #0] │ │ strb r1, [r4, #1] │ │ add sp, #72 @ 0x48 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ adds r6, r1, #4 │ │ @@ -71566,68 +71662,68 @@ │ │ cmp r2, #0 │ │ mov r1, r2 │ │ str r7, [sp, #12] │ │ str r0, [sp, #0] │ │ ite eq │ │ moveq r6, r2 │ │ movne r1, #1 │ │ - b.n 57da4 │ │ + b.n 57fb4 │ │ adds r5, r2, #1 │ │ mov r7, r1 │ │ add.w r0, r2, r2, lsl #1 │ │ subs r6, #1 │ │ add.w r2, r1, r0, lsl #3 │ │ add.w r0, r1, r0, lsl #2 │ │ add.w r1, r0, #268 @ 0x10c │ │ mov r0, r8 │ │ - bl 57f10 │ │ + bl 58120 │ │ movs r2, #0 │ │ movs r1, #1 │ │ cmp r0, #0 │ │ - bne.n 57e40 │ │ - cbz r6, 57e0a │ │ + bne.n 58050 │ │ + cbz r6, 5801a │ │ lsls r0, r1, #31 │ │ - beq.w 57efe │ │ - cbz r7, 57dbe │ │ + beq.w 5810e │ │ + cbz r7, 57fce │ │ mov r0, r2 │ │ ldrh.w r1, [r7, #402] @ 0x192 │ │ cmp r5, r1 │ │ - bcs.n 57dd6 │ │ + bcs.n 57fe6 │ │ mov r1, r7 │ │ mov r2, r5 │ │ - b.n 57df0 │ │ - cbz r5, 57dc8 │ │ + b.n 58000 │ │ + cbz r5, 57fd8 │ │ ldr.w r2, [r2, #408] @ 0x198 │ │ subs r5, #1 │ │ - bne.n 57dc0 │ │ + bne.n 57fd0 │ │ movs r0, #0 │ │ mov r7, r2 │ │ movs r5, #0 │ │ ldrh.w r1, [r7, #402] @ 0x192 │ │ cmp r5, r1 │ │ - bcc.n 57db8 │ │ + bcc.n 57fc8 │ │ ldr.w r1, [r7, #264] @ 0x108 │ │ cmp r1, #0 │ │ - beq.w 57ef6 │ │ + beq.w 58106 │ │ ldrh.w r2, [r7, #400] @ 0x190 │ │ adds r0, #1 │ │ ldrh.w r3, [r1, #402] @ 0x192 │ │ mov r7, r1 │ │ cmp r2, r3 │ │ - bcs.n 57dd6 │ │ + bcs.n 57fe6 │ │ cmp r0, #0 │ │ - beq.n 57d80 │ │ + beq.n 57f90 │ │ add.w r3, r1, r2, lsl #2 │ │ add.w r3, r3, #412 @ 0x19c │ │ ldr r7, [r3, #0] │ │ subs r0, #1 │ │ add.w r3, r7, #408 @ 0x198 │ │ - bne.n 57dfc │ │ + bne.n 5800c │ │ movs r5, #0 │ │ - b.n 57d84 │ │ + b.n 57f94 │ │ add r7, sp, #12 │ │ ldrd r1, r0, [sp] │ │ movs r6, #5 │ │ ldmia r7, {r2, r3, r7} │ │ lsls r1, r1, #1 │ │ str.w r7, [sp, #35] @ 0x23 │ │ str.w r3, [sp, #31] │ │ @@ -71636,221 +71732,221 @@ │ │ ldr r2, [sp, #28] │ │ ldr r5, [sp, #24] │ │ str r7, [r4, #12] │ │ strb r6, [r4, #0] │ │ str.w r5, [r4, #1] │ │ str.w r2, [r4, #5] │ │ str.w r3, [r4, #9] │ │ - bne.n 57ed4 │ │ + bne.n 580e4 │ │ add sp, #72 @ 0x48 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ ldr r2, [sp, #12] │ │ movs r1, #6 │ │ str r0, [r4, #4] │ │ movs r0, #0 │ │ strb r1, [r4, #0] │ │ - cbz r2, 57eac │ │ + cbz r2, 580bc │ │ add.w ip, sp, #44 @ 0x2c │ │ ldrd r3, r1, [sp, #16] │ │ stmia.w ip, {r0, r2, r3} │ │ add.w ip, sp, #28 │ │ stmia.w ip, {r0, r2, r3} │ │ movs r0, #1 │ │ - b.n 57eae │ │ + b.n 580be │ │ movs r7, #1 │ │ mov r0, r7 │ │ mov r1, r6 │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ strd r5, r7, [r4, #4] │ │ movs r0, #3 │ │ str r5, [r4, #12] │ │ strb r0, [r4, #0] │ │ add sp, #72 @ 0x48 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ vldr d16, [r1, #16] │ │ movw r2, #65535 @ 0xffff │ │ movt r2, #32751 @ 0x7fef │ │ vmov r0, r1, d16 │ │ movs r0, #0 │ │ strb.w r0, [sp, #24] │ │ bic.w r1, r1, #2147483648 @ 0x80000000 │ │ cmp r1, r2 │ │ - ble.n 57ede │ │ + ble.n 580ee │ │ add r0, sp, #24 │ │ ldmia.w r0, {r1, r2, r3, r5, r6, r7} │ │ stmia r4!, {r1, r2, r3, r5, r6, r7} │ │ add sp, #72 @ 0x48 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movs r1, #0 │ │ add r4, sp, #60 @ 0x3c │ │ add r5, sp, #24 │ │ str r1, [sp, #56] @ 0x38 │ │ str r0, [sp, #40] @ 0x28 │ │ str r0, [sp, #24] │ │ mov r0, r4 │ │ mov r1, r5 │ │ - bl 4de98 │ │ + bl 331f8 │ │ ldr r0, [sp, #60] @ 0x3c │ │ - cbz r0, 57ecc │ │ + cbz r0, 580dc │ │ ldr r1, [sp, #68] @ 0x44 │ │ - bl 4e028 │ │ - b.n 57eb8 │ │ + bl 4e238 │ │ + b.n 580c8 │ │ ldr r0, [sp, #0] │ │ lsls r0, r0, #1 │ │ - beq.n 57e3a │ │ + beq.n 5804a │ │ ldr r0, [sp, #4] │ │ - blx d87c0 │ │ + blx d87d0 │ │ add sp, #72 @ 0x48 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movs r1, #2 │ │ vstr d16, [r4, #16] │ │ strd r1, r0, [r4, #8] │ │ add r0, sp, #24 │ │ strb r1, [r4, #0] │ │ - bl 75052 │ │ + bl 75106 │ │ add sp, #72 @ 0x48 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ - ldr r0, [pc, #16] @ (57f08 ) │ │ + ldr r0, [pc, #16] @ (58118 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #12] @ (57f0c ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #12] @ (5811c ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ nop │ │ - cmp r3, #4 │ │ + cmp r1, #4 │ │ movs r0, r1 │ │ - cmp r0, #52 @ 0x34 │ │ + movs r6, #52 @ 0x34 │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #64 @ 0x40 │ │ ldr r5, [r1, #8] │ │ mov r8, r2 │ │ mov r6, r0 │ │ - cbz r5, 57f42 │ │ + cbz r5, 58152 │ │ mov r0, r5 │ │ ldr r7, [r1, #4] │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 57fbe │ │ + beq.n 581ce │ │ mov r1, r7 │ │ mov r2, r5 │ │ mov r4, r0 │ │ - bl d53c6 │ │ + bl d52ea │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ - bne.n 57f44 │ │ + bne.n 58154 │ │ mov r0, r4 │ │ add sp, #64 @ 0x40 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movs r4, #1 │ │ ldr r0, [r6, #0] │ │ lsls r0, r0, #1 │ │ - beq.n 57f50 │ │ + beq.n 58160 │ │ ldr r0, [r6, #4] │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ stmia.w r6, {r0, r4, r5} │ │ - beq.n 57fb0 │ │ + beq.n 581c0 │ │ add r0, sp, #40 @ 0x28 │ │ mov r1, r8 │ │ str r5, [sp, #36] @ 0x24 │ │ strd r5, r4, [sp, #28] │ │ - bl 57cdc │ │ + bl 57eec │ │ ldrb.w r0, [sp, #40] @ 0x28 │ │ cmp r0, #6 │ │ - bne.n 57f8a │ │ + bne.n 5819a │ │ cmp r5, #0 │ │ ldr r6, [sp, #44] @ 0x2c │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r4, r6 │ │ mov r0, r4 │ │ add sp, #64 @ 0x40 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ add.w r1, r6, #12 │ │ add r2, sp, #28 │ │ add r3, sp, #40 @ 0x28 │ │ mov r0, sp │ │ - bl 57320 │ │ + bl 57530 │ │ ldrb.w r0, [sp] │ │ cmp r0, #6 │ │ itt ne │ │ movne r0, sp │ │ - blne 4dd34 │ │ + blne 4e03c │ │ movs r4, #0 │ │ mov r0, r4 │ │ add sp, #64 @ 0x40 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ - ldr r0, [pc, #20] @ (57fc8 ) │ │ + ldr r0, [pc, #20] @ (581d8 ) │ │ movs r1, #43 @ 0x2b │ │ - ldr r2, [pc, #20] @ (57fcc ) │ │ + ldr r2, [pc, #20] @ (581dc ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 41488 │ │ + bl 41790 │ │ movs r0, #1 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - @ instruction: 0xe9bafffb │ │ - cmp r3, #164 @ 0xa4 │ │ + b.n 58130 │ │ + vtbl.8 d18, {d27-d28}, d20 │ │ movs r0, r1 │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #4 │ │ ldr r4, [r0, #0] │ │ ldr r0, [r4, #0] │ │ cmp r0, #1 │ │ - beq.n 57fe6 │ │ - cbnz r0, 5800e │ │ + beq.n 581f6 │ │ + cbnz r0, 5821e │ │ ldr r0, [r4, #8] │ │ - cbz r0, 5800e │ │ + cbz r0, 5821e │ │ ldr r5, [r4, #4] │ │ - b.n 58008 │ │ + b.n 58218 │ │ ldrb r0, [r4, #4] │ │ cmp r0, #3 │ │ - bne.n 5800e │ │ + bne.n 5821e │ │ ldr r5, [r4, #8] │ │ ldrd r6, r7, [r5] │ │ ldr r1, [r7, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r6 │ │ blxne r1 │ │ ldr r0, [r7, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ - bmi.n 57fc6 │ │ + b.w d871c │ │ + bmi.n 581d6 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #148 @ 0x94 │ │ mov r9, r2 │ │ ldrd r5, r2, [r1, #48] @ 0x30 │ │ ldrd r7, r6, [r9, #8] │ │ eors r2, r6 │ │ eors r7, r5 │ │ orrs r2, r7 │ │ - bne.n 58062 │ │ + bne.n 58272 │ │ ldr.w r2, [r9, #64] @ 0x40 │ │ cmp r2, #0 │ │ - bne.w 58262 │ │ + bne.w 58472 │ │ mov r2, r9 │ │ mov.w r4, #2147483648 @ 0x80000000 │ │ ldr.w r7, [r2, #68]! │ │ ldrd r6, r5, [r2, #4] │ │ cmp.w r7, #2147483648 @ 0x80000000 │ │ str r4, [r2, #0] │ │ - bne.n 58072 │ │ + bne.n 58282 │ │ movs r1, #9 │ │ movt r1, #32768 @ 0x8000 │ │ str r1, [r0, #0] │ │ add sp, #148 @ 0x94 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r1, #9 │ │ movt r1, #32768 @ 0x8000 │ │ @@ -71868,60 +71964,60 @@ │ │ mov sl, r3 │ │ strd r0, r1, [sp, #40] @ 0x28 │ │ movw r1, #909 @ 0x38d │ │ str r2, [sp, #16] │ │ strd r0, r0, [sp, #32] │ │ strd r0, r0, [sp, #48] @ 0x30 │ │ strd r0, r1, [sp, #56] @ 0x38 │ │ - b.n 5809e │ │ + b.n 582ae │ │ lsrs r0, r2, #2 │ │ - bne.n 580dc │ │ + bne.n 582ec │ │ mov r0, r6 │ │ - bl 481dc │ │ + bl 484e4 │ │ ldr r0, [sp, #52] @ 0x34 │ │ cmp r0, #0 │ │ - beq.n 5809e │ │ + beq.n 582ae │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r4, #1 │ │ movs r7, #0 │ │ - b.n 580c4 │ │ + b.n 582d4 │ │ umull r2, r5, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r5, r3, r7, r5 │ │ mla r7, r3, r7, r5 │ │ mov r3, r2 │ │ lsls r2, r0, #31 │ │ - beq.n 580b4 │ │ + beq.n 582c4 │ │ umull r2, r5, r3, r4 │ │ cmp r0, #1 │ │ - beq.n 5809a │ │ + beq.n 582aa │ │ mla r1, r3, r1, r5 │ │ mla r1, r7, r4, r1 │ │ mov r4, r2 │ │ - b.n 580b4 │ │ + b.n 582c4 │ │ ldmia r6!, {r1, r2, r3, r7} │ │ add r0, sp, #112 @ 0x70 │ │ adds r0, #4 │ │ add r5, sp, #32 │ │ stmia r0!, {r1, r2, r3, r7} │ │ ldmia.w r6, {r1, r2, r3, r7} │ │ stmia r0!, {r1, r2, r3, r7} │ │ mov r0, r5 │ │ movs r1, #48 @ 0x30 │ │ ldr r4, [sp, #28] │ │ ldr.w r7, [r9] │ │ ldr r6, [r4, #32] │ │ - bl d518e │ │ + bl d521e │ │ mov r0, r7 │ │ mov r1, r6 │ │ mov r2, r5 │ │ movs r3, #48 @ 0x30 │ │ str r7, [sp, #0] │ │ - blx a0ecc │ │ + blx a0ed8 │ │ add r7, sp, #40 @ 0x28 │ │ ldrd r6, r5, [sp, #56] @ 0x38 │ │ ldr r0, [sp, #32] │ │ ldmia r7, {r1, r2, r3, r7} │ │ adds r1, r1, r3 │ │ str.w r9, [sp, #20] │ │ adcs r2, r7 │ │ @@ -71929,76 +72025,76 @@ │ │ adcs r2, r5 │ │ cmp.w sl, #0 │ │ umull fp, r1, r1, r0 │ │ mla r8, r2, r0, r1 │ │ itt ne │ │ ldrne r0, [r4, #96] @ 0x60 │ │ cmpne r0, #0 │ │ - beq.n 58182 │ │ + beq.n 58392 │ │ ldr.w sl, [r4, #92] @ 0x5c │ │ add.w r0, r0, r0, lsl #1 │ │ ldr.w r9, [sp] │ │ lsls r4, r0, #4 │ │ add r6, sp, #32 │ │ movs r1, #48 @ 0x30 │ │ ldr.w r5, [sl], #48 │ │ mov r0, r6 │ │ - bl d518e │ │ + bl d521e │ │ mov r0, r9 │ │ mov r1, r5 │ │ mov r2, r6 │ │ movs r3, #48 @ 0x30 │ │ - blx a0ecc │ │ + blx a0ed8 │ │ add r7, sp, #40 @ 0x28 │ │ ldrd r5, r6, [sp, #56] @ 0x38 │ │ ldr r0, [sp, #32] │ │ ldmia r7, {r1, r2, r3, r7} │ │ adds r1, r1, r3 │ │ adcs r2, r7 │ │ adds r1, r1, r5 │ │ adcs r2, r6 │ │ umull r1, r3, r1, r0 │ │ mla r0, r2, r0, r3 │ │ adds.w fp, fp, r1 │ │ adc.w r8, r8, r0 │ │ subs r4, #48 @ 0x30 │ │ - bne.n 58142 │ │ + bne.n 58352 │ │ ldr r0, [sp, #184] @ 0xb8 │ │ - cbz r0, 581e0 │ │ + cbz r0, 583f0 │ │ ldr r1, [sp, #28] │ │ ldr r0, [r1, #108] @ 0x6c │ │ - cbz r0, 581e0 │ │ + cbz r0, 583f0 │ │ rsb r0, r0, r0, lsl #3 │ │ ldr r4, [r1, #104] @ 0x68 │ │ ldr.w sl, [sp] │ │ add.w r9, sp, #32 │ │ lsls r7, r0, #3 │ │ mov r0, r9 │ │ movs r1, #48 @ 0x30 │ │ ldr.w r6, [r4], #56 │ │ - bl d518e │ │ + bl d521e │ │ mov r0, sl │ │ mov r1, r6 │ │ mov r2, r9 │ │ movs r3, #48 @ 0x30 │ │ - blx a0ecc │ │ + blx a0ed8 │ │ ldrd ip, r2, [sp, #40] @ 0x28 │ │ ldrd r3, r6, [sp, #48] @ 0x30 │ │ ldrd r5, r1, [sp, #56] @ 0x38 │ │ adds.w r3, r3, ip │ │ ldr r0, [sp, #32] │ │ adcs r2, r6 │ │ adds r3, r3, r5 │ │ adcs r1, r2 │ │ umull r3, r6, r3, r0 │ │ mla r0, r1, r0, r6 │ │ adds.w fp, fp, r3 │ │ adc.w r8, r8, r0 │ │ subs r7, #56 @ 0x38 │ │ - bne.n 5819c │ │ + bne.n 583ac │ │ movs r0, #9 │ │ ldr r1, [sp, #24] │ │ movt r0, #32768 @ 0x8000 │ │ ldr r5, [sp, #20] │ │ adds r0, #8 │ │ add r4, sp, #112 @ 0x70 │ │ str r0, [r1, #0] │ │ @@ -72018,265 +72114,265 @@ │ │ ldmia r4!, {r1, r2, r3, r7} │ │ stmia r0!, {r1, r2, r3, r7} │ │ ldmia.w r4, {r1, r2, r3, r6, r7} │ │ stmia r0!, {r1, r2, r3, r6, r7} │ │ add r0, sp, #96 @ 0x60 │ │ mov r1, ip │ │ str r5, [sp, #88] @ 0x58 │ │ - bl 4b6b4 │ │ + bl 4b9bc │ │ add r2, sp, #96 @ 0x60 │ │ ldrd r4, r8, [r5, #68] @ 0x44 │ │ ldr r6, [r5, #76] @ 0x4c │ │ ldmia r2, {r0, r1, r2} │ │ cmp.w r4, #2147483648 @ 0x80000000 │ │ ldr r3, [sp, #16] │ │ stmia r3!, {r0, r1, r2} │ │ - beq.n 58256 │ │ - cbz r6, 5824c │ │ + beq.n 58466 │ │ + cbz r6, 5845c │ │ mov r7, r8 │ │ ldr.w r0, [r7], #4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r6, #1 │ │ - bne.n 58240 │ │ + bne.n 58450 │ │ cmp r4, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r5, #64] @ 0x40 │ │ adds r0, #1 │ │ str r0, [r5, #64] @ 0x40 │ │ add sp, #148 @ 0x94 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #8] @ (5826c ) │ │ + ldr r0, [pc, #8] @ (5847c ) │ │ add r0, pc │ │ - bl 4132c │ │ + bl 41634 │ │ nop │ │ - cmp r2, #56 @ 0x38 │ │ + cmp r0, #56 @ 0x38 │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #60 @ 0x3c │ │ mov sl, r0 │ │ ldr r0, [r1, #64] @ 0x40 │ │ mov r4, r1 │ │ mvn.w r1, #2147483648 @ 0x80000000 │ │ cmp r0, r1 │ │ - bcs.w 583c4 │ │ + bcs.w 585d4 │ │ ldr.w r9, [r4, #68] @ 0x44 │ │ cmp.w r9, #2147483648 @ 0x80000000 │ │ - bne.n 582ac │ │ + bne.n 584bc │ │ ldr r0, [r4, #0] │ │ movs r1, #17 │ │ movt r1, #32768 @ 0x8000 │ │ subs r1, #8 │ │ cmp r0, #0 │ │ str.w r1, [sl] │ │ - beq.n 58328 │ │ - blx 9bb60 │ │ + beq.n 58538 │ │ + blx 9bb6c │ │ movs r0, #0 │ │ str r0, [r4, #0] │ │ - b.n 58328 │ │ + b.n 58538 │ │ ldrb.w r0, [r4, #80] @ 0x50 │ │ - cbz r0, 58308 │ │ + cbz r0, 58518 │ │ ldr r1, [r4, #0] │ │ mov r0, sp │ │ - bl 583dc │ │ + bl 585ec │ │ movw r8, #17 │ │ ldr r0, [sp, #0] │ │ movt r8, #32768 @ 0x8000 │ │ cmp r0, r8 │ │ - bne.n 58320 │ │ + bne.n 58530 │ │ ldr r0, [r4, #16] │ │ cmp r0, #0 │ │ - bne.n 583cc │ │ + bne.n 585dc │ │ ldr r2, [r4, #32] │ │ mov.w r3, #2147483648 @ 0x80000000 │ │ ldrd r1, r0, [r4, #24] │ │ cmp.w r2, #2147483648 @ 0x80000000 │ │ str r3, [r4, #32] │ │ - beq.n 58384 │ │ + beq.n 58594 │ │ strd r1, r0, [sp, #16] │ │ add.w r0, r4, #36 @ 0x24 │ │ str r2, [sp, #24] │ │ add r1, sp, #16 │ │ ldmia r0!, {r2, r3, r7} │ │ adds r1, #12 │ │ movs r5, #0 │ │ stmia r1!, {r2, r3, r7} │ │ ldmia.w r0, {r2, r3, r6, r7} │ │ stmia r1!, {r2, r3, r6, r7} │ │ ldrd r7, r0, [sp, #28] │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r6, r7, r0, lsl #2 │ │ - b.n 58368 │ │ + b.n 58578 │ │ ldr r0, [r4, #0] │ │ movs r1, #17 │ │ movt r1, #32768 @ 0x8000 │ │ str.w r1, [sl] │ │ - cbz r0, 58388 │ │ - blx 9bb60 │ │ + cbz r0, 58598 │ │ + blx 9bb6c │ │ movs r0, #0 │ │ str r0, [r4, #0] │ │ - b.n 58388 │ │ + b.n 58598 │ │ ldmia.w sp, {r0, r1, r2, r3} │ │ stmia.w sl, {r0, r1, r2, r3} │ │ ldr r0, [r4, #32] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ itt ne │ │ addne.w r0, r4, #24 │ │ - blne 4b7a0 │ │ + blne 4baa8 │ │ cmp.w r9, #2147483648 @ 0x80000000 │ │ - beq.n 583be │ │ + beq.n 585ce │ │ ldrd r4, r5, [r4, #72] @ 0x48 │ │ - cbz r5, 583ac │ │ + cbz r5, 585bc │ │ mov r6, r4 │ │ ldr.w r0, [r6], #4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r5, #1 │ │ - bne.n 58346 │ │ - b.n 583ac │ │ + bne.n 58556 │ │ + b.n 585bc │ │ ldr.w r5, [r7, #-8] │ │ add.w fp, r5, r0, lsl #4 │ │ ldr r0, [r5, #8] │ │ ldrd r0, r1, [r0, #8] │ │ ldr r1, [r1, #20] │ │ blx r1 │ │ adds r5, #16 │ │ cmp r5, #0 │ │ it ne │ │ cmpne r5, fp │ │ - bne.n 5835c │ │ + bne.n 5856c │ │ cmp r7, r6 │ │ - beq.n 5837e │ │ + beq.n 5858e │ │ ldr r0, [r7, #8] │ │ adds r7, #12 │ │ cmp r0, #0 │ │ - beq.n 58370 │ │ - b.n 58354 │ │ + beq.n 58580 │ │ + b.n 58564 │ │ add r0, sp, #16 │ │ - bl 4b7a0 │ │ + bl 4baa8 │ │ str.w r8, [sl] │ │ ldr r0, [r4, #32] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ itt ne │ │ addne.w r0, r4, #24 │ │ - blne 4b7a0 │ │ + blne 4baa8 │ │ ldrd r4, r5, [r4, #72] @ 0x48 │ │ - cbz r5, 583ac │ │ + cbz r5, 585bc │ │ mov r6, r4 │ │ ldr.w r0, [r6], #4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r5, #1 │ │ - bne.n 583a0 │ │ + bne.n 585b0 │ │ cmp.w r9, #0 │ │ - beq.n 583be │ │ + beq.n 585ce │ │ mov r0, r4 │ │ add sp, #60 @ 0x3c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #60 @ 0x3c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #12] @ (583d4 ) │ │ + ldr r0, [pc, #12] @ (585e4 ) │ │ add r0, pc │ │ - bl 41360 │ │ - ldr r0, [pc, #8] @ (583d8 ) │ │ + bl 41668 │ │ + ldr r0, [pc, #8] @ (585e8 ) │ │ add r0, pc │ │ - bl 4132c │ │ - cmp r1, #38 @ 0x26 │ │ + bl 41634 │ │ + movs r7, #38 @ 0x26 │ │ movs r0, r1 │ │ - cmp r0, #206 @ 0xce │ │ + movs r6, #206 @ 0xce │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #16 │ │ mov r4, r0 │ │ mov r0, r1 │ │ movs r1, #0 │ │ - blx adda0 │ │ + blx addb0 │ │ movs r5, #3 │ │ adds r1, r0, #1 │ │ movt r5, #32768 @ 0x8000 │ │ cmp r1, #2 │ │ - bcs.n 58404 │ │ + bcs.n 58614 │ │ add.w r0, r5, #14 │ │ str r0, [r4, #0] │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movw r1, #34744 @ 0x87b8 │ │ movt r1, #65535 @ 0xffff │ │ cmp r0, r1 │ │ - bne.n 5841e │ │ + bne.n 5862e │ │ strd r5, r7, [r4] │ │ strd r5, r0, [r4, #8] │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ mov r8, r0 │ │ - blx a96f8 │ │ + blx a9704 │ │ mov r5, r0 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #4 │ │ mov r1, r5 │ │ - bl 402e0 │ │ + bl 405e8 │ │ add r5, sp, #4 │ │ ldmia r5, {r0, r1, r5} │ │ - ldr r6, [pc, #68] @ (58480 ) │ │ + ldr r6, [pc, #68] @ (58690 ) │ │ cmp r0, #0 │ │ add r6, pc │ │ ite eq │ │ moveq r6, r1 │ │ movne r5, #27 │ │ cmp.w r5, #4294967295 @ 0xffffffff │ │ - bgt.n 5844e │ │ - bl 3e03c │ │ - cbz r5, 5845c │ │ + bgt.n 5865e │ │ + bl 3e344 │ │ + cbz r5, 5866c │ │ mov r0, r5 │ │ - blx d87f0 │ │ - cbz r0, 58478 │ │ + blx d8810 │ │ + cbz r0, 58688 │ │ mov r7, r0 │ │ - b.n 5845e │ │ + b.n 5866e │ │ movs r7, #1 │ │ mov r0, r7 │ │ mov r1, r6 │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ mov r0, r8 │ │ strd r5, r7, [r4] │ │ strd r5, r0, [r4, #8] │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movs r0, #1 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ - b.n 58156 │ │ + bl 3e2ac │ │ + b.n 57f46 │ │ vtbl.8 d30, {d11-d12}, d29 │ │ - ldr r7, [pc, #960] @ (58848 ) │ │ + ldr r7, [pc, #960] @ (58a58 ) │ │ sub sp, #36 @ 0x24 │ │ mov r8, r0 │ │ ldr r0, [r0, #20] │ │ adds r0, #1 │ │ str.w r0, [r8, #20] │ │ - bcc.w 585b6 │ │ + bcc.w 587c6 │ │ movs r0, #0 │ │ movs r4, #1 │ │ mov r7, r0 │ │ str.w r0, [r8] │ │ str.w r0, [r8, #4] │ │ add.w r0, r4, r4, lsl #1 │ │ lsls r5, r0, #2 │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 5865a │ │ + beq.w 5886a │ │ adds r1, r0, #4 │ │ movs r2, #0 │ │ movs r3, #8 │ │ mov r6, r4 │ │ str.w r2, [r1, #-4] │ │ subs r6, #1 │ │ strd r3, r2, [r1], #12 │ │ - bne.n 584c0 │ │ + bne.n 586d0 │ │ mov r1, r4 │ │ ldr.w r2, [r8, #8] │ │ mov ip, r7 │ │ str r2, [sp, #20] │ │ ldrd r7, r2, [r8, #12] │ │ strd r1, r0, [r8, #8] │ │ add.w r0, r2, r2, lsl #1 │ │ @@ -72284,763 +72380,763 @@ │ │ add.w r5, r7, r0, lsl #2 │ │ str.w r4, [r8, #16] │ │ sub.w r0, r5, #12 │ │ str r0, [sp, #28] │ │ movs r0, #0 │ │ mov sl, r7 │ │ str r7, [sp, #24] │ │ - cbz r7, 58538 │ │ + cbz r7, 58748 │ │ ldr r1, [sp, #28] │ │ sub.w r6, r1, sl │ │ - cbz r0, 58512 │ │ + cbz r0, 58722 │ │ cmp r9, r8 │ │ - bne.n 58544 │ │ + bne.n 58754 │ │ cmp.w fp, #0 │ │ it ne │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ cmp sl, r5 │ │ - beq.w 58630 │ │ + beq.w 58840 │ │ mov r1, sl │ │ ldr.w fp, [r1], #12 │ │ cmp.w fp, #2147483648 @ 0x80000000 │ │ - beq.n 58606 │ │ + beq.n 58816 │ │ ldrd r0, r2, [sl, #4] │ │ subs r6, #12 │ │ mov sl, r1 │ │ add.w r8, r0, r2, lsl #3 │ │ mov r9, r0 │ │ cmp r0, #0 │ │ - bne.n 58504 │ │ - b.n 58512 │ │ + bne.n 58714 │ │ + b.n 58722 │ │ cmp r0, #0 │ │ - beq.w 58648 │ │ + beq.w 58858 │ │ cmp r9, r8 │ │ - bne.n 5854c │ │ - b.n 58640 │ │ + bne.n 5875c │ │ + b.n 58850 │ │ ldr r1, [sp, #32] │ │ ldr.w ip, [r1] │ │ ldr r4, [r1, #16] │ │ ldr.w r6, [r9] │ │ movw r1, #31829 @ 0x7c55 │ │ movt r1, #32586 @ 0x7f4a │ │ muls r1, r6 │ │ and.w r1, r1, ip │ │ cmp r4, r1 │ │ - bls.n 5864e │ │ + bls.n 5885e │ │ ldr r2, [sp, #32] │ │ add.w r1, r1, r1, lsl #1 │ │ ldr.w lr, [r9, #4] │ │ ldr r2, [r2, #12] │ │ ldr.w r3, [r2, r1, lsl #2] │ │ add.w r1, r2, r1, lsl #2 │ │ ldr r7, [r1, #8] │ │ cmp r7, r3 │ │ - beq.n 5859c │ │ + beq.n 587ac │ │ mov r3, r1 │ │ ldr r1, [r1, #4] │ │ adds r2, r7, #1 │ │ add.w r9, r9, #8 │ │ str r2, [r3, #8] │ │ str.w r6, [r1, r7, lsl #3] │ │ add.w r1, r1, r7, lsl #3 │ │ str.w lr, [r1, #4] │ │ ldr r7, [sp, #24] │ │ cmp r7, #0 │ │ - bne.n 584fc │ │ - b.n 58538 │ │ + bne.n 5870c │ │ + b.n 58748 │ │ str r0, [sp, #16] │ │ mov r0, r1 │ │ str.w ip, [sp, #12] │ │ strd r1, lr, [sp, #4] │ │ - bl 47b0a │ │ + bl 47f36 │ │ ldrd r1, lr, [sp, #4] │ │ ldrd ip, r0, [sp, #12] │ │ - b.n 5857c │ │ + b.n 5878c │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r2, #1 │ │ movs r7, #0 │ │ - b.n 585d0 │ │ + b.n 587e0 │ │ umull r6, r5, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r5, r3, r7, r5 │ │ mla r7, r3, r7, r5 │ │ mov r3, r6 │ │ lsls r6, r0, #31 │ │ - beq.n 585c0 │ │ + beq.n 587d0 │ │ umull r4, r6, r3, r2 │ │ cmp r0, #1 │ │ - beq.n 585e8 │ │ + beq.n 587f8 │ │ mla r1, r3, r1, r6 │ │ mla r1, r7, r2, r1 │ │ mov r2, r4 │ │ - b.n 585c0 │ │ + b.n 587d0 │ │ subs r7, r4, #1 │ │ mov.w r0, #0 │ │ sbc.w r0, r0, #0 │ │ strd r7, r0, [r8] │ │ movw r0, #43690 @ 0xaaaa │ │ movt r0, #2730 @ 0xaaa │ │ cmp r4, r0 │ │ - bls.n 58662 │ │ - bl 3e03c │ │ + bls.n 58872 │ │ + bl 3e344 │ │ cmp r5, r1 │ │ - beq.n 58630 │ │ + beq.n 58840 │ │ movw r0, #43691 @ 0xaaab │ │ add.w r4, sl, #16 │ │ movt r0, #43690 @ 0xaaaa │ │ umull r0, r1, r6, r0 │ │ lsrs r5, r1, #3 │ │ ldr.w r0, [r4, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r4, #12 │ │ subs r5, #1 │ │ - bne.n 5861c │ │ + bne.n 5882c │ │ ldr r0, [sp, #20] │ │ - cbz r0, 58648 │ │ + cbz r0, 58858 │ │ mov r0, r7 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ mov r7, r0 │ │ cmp.w fp, #0 │ │ - bne.n 58634 │ │ + bne.n 58844 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r2, [pc, #32] @ (58670 ) │ │ + ldr r2, [pc, #32] @ (58880 ) │ │ mov r0, r1 │ │ mov r1, r4 │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ movs r0, #4 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ cmp r4, #0 │ │ - bne.w 584a6 │ │ + bne.w 586b6 │ │ movs r1, #0 │ │ movs r0, #4 │ │ - b.n 584ce │ │ + b.n 586de │ │ nop │ │ - movs r4, #40 @ 0x28 │ │ + movs r2, #40 @ 0x28 │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #28 │ │ ldrd sl, r9, [sp, #64] @ 0x40 │ │ mov r4, r0 │ │ ldr r0, [sp, #72] @ 0x48 │ │ mov r8, r3 │ │ mov r6, r2 │ │ mov r7, r1 │ │ movs r5, #8 │ │ - cbz r0, 586f2 │ │ + cbz r0, 58902 │ │ movs r0, #8 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 58800 │ │ + beq.w 58a10 │ │ eor.w r1, r8, #2147483648 @ 0x80000000 │ │ str r1, [r0, #4] │ │ movs r1, #0 │ │ str r6, [r0, #0] │ │ strd r5, r1, [sp] │ │ add r1, sp, #8 │ │ mov r5, r0 │ │ movs r2, #17 │ │ mov r0, r1 │ │ mov r1, r7 │ │ mov r3, r5 │ │ - bl 49e28 │ │ + bl 4a130 │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrd r3, r0, [sp, #16] │ │ ldr r1, [sp, #24] │ │ ldrd r7, r2, [sp, #8] │ │ - cbnz r7, 58730 │ │ - cbz r2, 586e6 │ │ + cbnz r7, 58940 │ │ + cbz r2, 588f6 │ │ cmp r3, #8 │ │ - bne.w 58808 │ │ + bne.w 58a18 │ │ ldr r7, [r2, #0] │ │ mov.w r3, #2147483648 @ 0x80000000 │ │ ldr r6, [r2, #4] │ │ subs.w r7, sl, r7 │ │ eor.w r3, r3, r6 │ │ sbcs.w r3, r9, r3 │ │ - bge.n 5877e │ │ + bge.n 5898e │ │ movs r0, #0 │ │ str r0, [r4, #4] │ │ str r0, [r4, #0] │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #8 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 58800 │ │ + beq.w 58a10 │ │ eor.w r1, r9, #2147483648 @ 0x80000000 │ │ str r1, [r0, #4] │ │ movs r1, #0 │ │ str.w sl, [r0] │ │ strd r5, r1, [sp] │ │ add r1, sp, #8 │ │ mov r5, r0 │ │ movs r2, #17 │ │ mov r0, r1 │ │ mov r1, r7 │ │ mov r3, r5 │ │ - bl 49e28 │ │ + bl 4a130 │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrd r3, r0, [sp, #16] │ │ ldr r1, [sp, #24] │ │ ldrd r5, r2, [sp, #8] │ │ - cbz r5, 58742 │ │ + cbz r5, 58952 │ │ str r0, [r4, #12] │ │ movs r0, #1 │ │ str r2, [r4, #4] │ │ str r3, [r4, #8] │ │ str r1, [r4, #16] │ │ str r0, [r4, #0] │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov.w fp, #2147483648 @ 0x80000000 │ │ - cbz r2, 58792 │ │ + cbz r2, 589a2 │ │ cmp r3, #8 │ │ - bne.n 58808 │ │ + bne.n 58a18 │ │ ldr r3, [r2, #4] │ │ ldr.w ip, [r2] │ │ eor.w r5, r3, fp │ │ subs.w r3, sl, ip │ │ sbcs.w r3, r9, r5 │ │ - bge.n 5877e │ │ + bge.n 5898e │ │ movs r0, #0 │ │ mov r1, r7 │ │ str r0, [sp, #4] │ │ add r0, sp, #8 │ │ movs r2, #14 │ │ movs r3, #0 │ │ - bl 49e28 │ │ + bl 4a130 │ │ add r7, sp, #8 │ │ ldrd r2, r3, [sp, #20] │ │ ldmia r7, {r0, r1, r7} │ │ - cbz r0, 587d0 │ │ + cbz r0, 589e0 │ │ movs r0, #1 │ │ - b.n 587f0 │ │ + b.n 58a00 │ │ movs r3, #8 │ │ strd r0, r1, [r4, #12] │ │ strd r2, r3, [r4, #4] │ │ movs r0, #0 │ │ str r0, [r4, #0] │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #0 │ │ mov r1, r7 │ │ str r0, [sp, #4] │ │ add r0, sp, #8 │ │ movs r2, #6 │ │ movs r3, #0 │ │ - bl 49e28 │ │ + bl 4a130 │ │ ldrd r3, r0, [sp, #16] │ │ ldr r1, [sp, #24] │ │ ldrd r5, r2, [sp, #8] │ │ cmp r5, #1 │ │ - beq.n 58730 │ │ + beq.n 58940 │ │ cmp r2, #0 │ │ - beq.n 586e6 │ │ + beq.n 588f6 │ │ cmp r3, #8 │ │ - bne.n 58808 │ │ + bne.n 58a18 │ │ ldr r5, [r2, #4] │ │ ldr.w ip, [r2] │ │ eor.w r5, r5, fp │ │ subs.w r3, ip, r6 │ │ sbcs.w r3, r5, r8 │ │ - blt.w 586e6 │ │ - b.n 58756 │ │ + blt.w 588f6 │ │ + b.n 58966 │ │ cmp r1, #0 │ │ - beq.w 586e6 │ │ + beq.w 588f6 │ │ cmp r7, #8 │ │ - bne.n 58808 │ │ + bne.n 58a18 │ │ ldr r0, [r1, #0] │ │ ldr r7, [r1, #4] │ │ subs r0, r0, r6 │ │ eor.w r7, r7, fp │ │ sbcs.w r0, r7, r8 │ │ - blt.w 586e6 │ │ + blt.w 588f6 │ │ movs r0, #0 │ │ movs r7, #8 │ │ strd r1, r7, [r4, #4] │ │ strd r2, r3, [r4, #12] │ │ str r0, [r4, #0] │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #1 │ │ movs r1, #8 │ │ - bl 3dfa4 │ │ - ldr r0, [pc, #20] @ (58820 ) │ │ + bl 3e2ac │ │ + ldr r0, [pc, #20] @ (58a30 ) │ │ add r2, sp, #8 │ │ - ldr r3, [pc, #20] @ (58824 ) │ │ - ldr r1, [pc, #24] @ (58828 ) │ │ + ldr r3, [pc, #20] @ (58a34 ) │ │ + ldr r1, [pc, #24] @ (58a38 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ nop │ │ - lsrs r3, r6, #17 │ │ - vsra.u32 d18, d26, #4 │ │ + lsrs r3, r4, #9 │ │ + @ instruction: 0xfffc1f0a │ │ movs r0, r1 │ │ - movs r2, #88 @ 0x58 │ │ + movs r0, #88 @ 0x58 │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #4 │ │ mov r4, r0 │ │ movw r0, #31829 @ 0x7c55 │ │ movt r0, #32586 @ 0x7f4a │ │ ldr r7, [r4, #0] │ │ muls r0, r2 │ │ ldr r1, [r4, #16] │ │ ands r0, r7 │ │ cmp r1, r0 │ │ - bls.n 588ea │ │ + bls.n 58afa │ │ ldr r7, [r4, #12] │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r8, r7, r0, lsl #2 │ │ movs r7, #0 │ │ ldrd r0, r9, [r8, #4] │ │ mov.w sl, r9, lsl #3 │ │ mov r6, r7 │ │ cmp sl, r7 │ │ - beq.n 58876 │ │ + beq.n 58a86 │ │ adds r5, r0, r6 │ │ ldr r7, [r0, r6] │ │ ldr r5, [r5, #4] │ │ eors r7, r2 │ │ eors r5, r3 │ │ orrs r7, r5 │ │ add.w r7, r6, #8 │ │ - bne.n 5885c │ │ - b.n 5889a │ │ + bne.n 58a6c │ │ + b.n 58aaa │ │ ldr r7, [r4, #24] │ │ ldr.w ip, [r8] │ │ adds r5, r7, #1 │ │ str r5, [r4, #24] │ │ cmp r9, ip │ │ - beq.n 588d2 │ │ + beq.n 58ae2 │ │ str.w r2, [r0, r9, lsl #3] │ │ add.w r0, r0, r9, lsl #3 │ │ add.w r2, r9, #1 │ │ str r3, [r0, #4] │ │ lsls r0, r5, #29 │ │ str.w r2, [r8, #8] │ │ - bmi.n 588aa │ │ + bmi.n 58aba │ │ sub.w r0, sl, r6 │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov.w r8, #1000 @ 0x3e8 │ │ mul.w r0, r5, r8 │ │ - blx d5af0 │ │ + blx d5b00 │ │ ldr r1, [r4, #28] │ │ cmp r0, r1 │ │ - bls.n 5889a │ │ + bls.n 58aaa │ │ mov r0, r4 │ │ - bl 58484 │ │ + bl 58694 │ │ ldr r1, [r4, #16] │ │ ldr r5, [r4, #24] │ │ cmp r1, #0 │ │ - bne.n 588ae │ │ - ldr r0, [pc, #44] @ (588f8 ) │ │ + bne.n 58abe │ │ + ldr r0, [pc, #44] @ (58b08 ) │ │ add r0, pc │ │ - bl 409c4 │ │ + bl 40ccc │ │ mov r0, r8 │ │ str r1, [sp, #0] │ │ mov r7, r3 │ │ mov fp, r2 │ │ - bl 47b0a │ │ + bl 47f36 │ │ ldr r1, [sp, #0] │ │ mov r2, fp │ │ ldr.w r0, [r8, #4] │ │ mov r3, r7 │ │ - b.n 58884 │ │ - ldr r2, [pc, #8] @ (588f4 ) │ │ + b.n 58a94 │ │ + ldr r2, [pc, #8] @ (58b04 ) │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ nop │ │ - movs r1, #160 @ 0xa0 │ │ + subs r0, r4, #6 │ │ movs r0, r1 │ │ - movs r1, #208 @ 0xd0 │ │ + subs r0, r2, #7 │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ sub sp, #92 @ 0x5c │ │ mov r9, r3 │ │ mov r4, r0 │ │ ldrd r3, r0, [r0] │ │ mov r8, r2 │ │ ldrb r0, [r0, #0] │ │ ldrd r1, r2, [r3, #80] @ 0x50 │ │ ldr r7, [sp, #120] @ 0x78 │ │ strd r7, r0, [sp] │ │ add r0, sp, #8 │ │ - bl 55b60 │ │ + bl 55d70 │ │ ldr r0, [r4, #8] │ │ ldr r6, [r0, #0] │ │ - cbz r6, 58982 │ │ + cbz r6, 58b92 │ │ ldr r7, [r0, #4] │ │ cmp.w r7, #4294967295 @ 0xffffffff │ │ - bgt.n 58930 │ │ - bl 3e03c │ │ - cbz r7, 58940 │ │ + bgt.n 58b40 │ │ + bl 3e344 │ │ + cbz r7, 58b50 │ │ mov r0, r7 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 589c0 │ │ + beq.n 58bd0 │ │ mov r5, r0 │ │ - b.n 58942 │ │ + b.n 58b52 │ │ movs r5, #1 │ │ mov r0, r5 │ │ mov r1, r6 │ │ mov r2, r7 │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #0 │ │ add r1, sp, #8 │ │ str r0, [sp, #76] @ 0x4c │ │ mov.w r0, r9, lsr #31 │ │ str r0, [sp, #72] @ 0x48 │ │ movs r0, #2 │ │ strb.w r0, [sp, #64] @ 0x40 │ │ add r0, sp, #24 │ │ add r2, sp, #52 @ 0x34 │ │ add r3, sp, #64 @ 0x40 │ │ str r7, [sp, #60] @ 0x3c │ │ strd r7, r5, [sp, #52] @ 0x34 │ │ strd r8, r9, [sp, #80] @ 0x50 │ │ - bl 57320 │ │ + bl 57530 │ │ ldrb.w r0, [sp, #24] │ │ cmp r0, #6 │ │ itt ne │ │ addne.w r0, sp, #24 │ │ - blne 4dd34 │ │ + blne 4e03c │ │ ldr r4, [r4, #12] │ │ add r2, sp, #8 │ │ add.w ip, sp, #64 @ 0x40 │ │ ldmia r2, {r0, r1, r2} │ │ ldr r5, [r4, #8] │ │ ldr r3, [r4, #0] │ │ stmia.w ip, {r0, r1, r2} │ │ cmp r5, r3 │ │ - beq.n 589b8 │ │ + beq.n 58bc8 │ │ add r2, sp, #64 @ 0x40 │ │ ldr r3, [r4, #4] │ │ add.w r7, r5, r5, lsl #1 │ │ ldmia r2, {r0, r1, r2} │ │ str.w r0, [r3, r7, lsl #2] │ │ adds r0, r5, #1 │ │ str r0, [r4, #8] │ │ add.w r0, r3, r7, lsl #2 │ │ strd r1, r2, [r0, #4] │ │ add sp, #92 @ 0x5c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ mov r0, r4 │ │ - bl 47c6a │ │ - b.n 58998 │ │ + bl 47cb0 │ │ + b.n 58ba8 │ │ movs r0, #1 │ │ mov r1, r7 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #36 @ 0x24 │ │ ldrd r9, fp, [sp, #72] @ 0x48 │ │ mov r4, r0 │ │ ldr r0, [sp, #80] @ 0x50 │ │ mov r5, r2 │ │ - cbz r0, 58a32 │ │ + cbz r0, 58c42 │ │ movs r0, #0 │ │ movs r2, #17 │ │ strd r3, r0, [sp] │ │ add r0, sp, #16 │ │ mov r3, r5 │ │ - bl 49e28 │ │ + bl 4a130 │ │ add.w r8, sp, #16 │ │ ldrd r7, sl, [sp, #28] │ │ ldmia.w r8, {r0, r6, r8} │ │ - cbnz r0, 58a54 │ │ - cbz r6, 58a26 │ │ + cbnz r0, 58c64 │ │ + cbz r6, 58c36 │ │ mov r2, fp │ │ mov r0, r9 │ │ mov r1, r6 │ │ cmp r8, fp │ │ it cc │ │ movcc r2, r8 │ │ - blx d8860 │ │ + blx d8870 │ │ movs r1, #0 │ │ cmp fp, r8 │ │ mov.w r2, #0 │ │ it cc │ │ movcc r2, #1 │ │ cmp r0, #0 │ │ it mi │ │ movmi r1, #1 │ │ it eq │ │ moveq r1, r2 │ │ cmp r1, #0 │ │ - beq.w 58b4a │ │ + beq.w 58d5a │ │ movs r1, #0 │ │ str r1, [r4, #4] │ │ str r1, [r4, #0] │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #0 │ │ str r3, [sp, #8] │ │ strd fp, r0, [sp] │ │ add r0, sp, #16 │ │ movs r2, #17 │ │ mov r3, r9 │ │ str r1, [sp, #12] │ │ - bl 49e28 │ │ + bl 4a130 │ │ add.w r8, sp, #16 │ │ ldrd r7, sl, [sp, #28] │ │ ldmia.w r8, {r0, r6, r8} │ │ - cbz r0, 58a6a │ │ + cbz r0, 58c7a │ │ str r7, [r4, #12] │ │ movs r1, #1 │ │ str r6, [r4, #4] │ │ str.w r8, [r4, #8] │ │ str.w sl, [r4, #16] │ │ str r1, [r4, #0] │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - cbz r6, 58aa2 │ │ + cbz r6, 58cb2 │ │ ldr r0, [sp, #84] @ 0x54 │ │ cmp r0, #0 │ │ - beq.n 58b00 │ │ + beq.n 58d10 │ │ movs r0, #0 │ │ ldr r1, [sp, #12] │ │ str r0, [sp, #4] │ │ add r0, sp, #16 │ │ movs r2, #7 │ │ movs r3, #0 │ │ - bl 49e28 │ │ + bl 4a130 │ │ ldrd ip, r3, [sp, #24] │ │ ldr r2, [sp, #32] │ │ ldrd r1, r0, [sp, #16] │ │ cmp r1, #1 │ │ - bne.n 58af4 │ │ + bne.n 58d04 │ │ strd r0, ip, [r4, #4] │ │ movs r1, #1 │ │ strd r3, r2, [r4, #12] │ │ str r1, [r4, #0] │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #0 │ │ ldr r1, [sp, #12] │ │ str r0, [sp, #4] │ │ add r0, sp, #16 │ │ movs r2, #6 │ │ movs r3, #0 │ │ - bl 49e28 │ │ + bl 4a130 │ │ add.w r8, sp, #16 │ │ ldrd r7, sl, [sp, #28] │ │ ldmia.w r8, {r0, r6, r8} │ │ cmp r0, #0 │ │ - bne.n 58a54 │ │ + bne.n 58c64 │ │ cmp r6, #0 │ │ - beq.n 58a26 │ │ + beq.n 58c36 │ │ ldr r2, [sp, #8] │ │ mov r0, r5 │ │ mov r1, r6 │ │ cmp r8, r2 │ │ it cc │ │ movcc r2, r8 │ │ - blx d8860 │ │ + blx d8870 │ │ ldr r2, [sp, #8] │ │ movs r1, #0 │ │ cmp r2, r8 │ │ mov.w r2, #0 │ │ it hi │ │ movhi r2, #1 │ │ cmp r0, #0 │ │ it gt │ │ movgt r1, #1 │ │ it eq │ │ moveq r1, r2 │ │ cmp r1, #0 │ │ - bne.n 58a26 │ │ - b.n 58b00 │ │ + bne.n 58c36 │ │ + b.n 58d10 │ │ cmp r0, #0 │ │ itttt ne │ │ movne r7, r3 │ │ movne sl, r2 │ │ movne r8, ip │ │ movne r6, r0 │ │ mov r2, fp │ │ mov r0, r9 │ │ mov r1, r6 │ │ cmp r8, fp │ │ it cc │ │ movcc r2, r8 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp fp, r8 │ │ mov.w r2, #0 │ │ it cc │ │ movcc r2, #1 │ │ cmp r0, #0 │ │ mov.w r0, #0 │ │ mov.w r1, #0 │ │ it mi │ │ movmi r0, #1 │ │ it eq │ │ moveq r0, r2 │ │ - cbz r0, 58b4a │ │ + cbz r0, 58d5a │ │ str r1, [sp, #4] │ │ add r0, sp, #16 │ │ ldr r1, [sp, #12] │ │ movs r2, #14 │ │ movs r3, #0 │ │ - bl 49e28 │ │ + bl 4a130 │ │ add.w r9, sp, #16 │ │ ldmia.w r9, {r0, r6, r7, r8, r9} │ │ - cbz r0, 58b5c │ │ + cbz r0, 58d6c │ │ movs r1, #1 │ │ - b.n 58b98 │ │ + b.n 58da8 │ │ strd r6, r8, [r4, #4] │ │ movs r1, #0 │ │ strd r7, sl, [r4, #12] │ │ str r1, [r4, #0] │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ cmp r6, #0 │ │ - beq.w 58a26 │ │ + beq.w 58c36 │ │ ldr.w sl, [sp, #8] │ │ mov r0, r5 │ │ mov r1, r6 │ │ cmp r7, sl │ │ mov r2, sl │ │ it cc │ │ movcc r2, r7 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp sl, r7 │ │ mov.w r2, #0 │ │ it hi │ │ movhi r2, #1 │ │ cmp r0, #0 │ │ mov.w r0, #0 │ │ mov.w r1, #0 │ │ it gt │ │ movgt r0, #1 │ │ it eq │ │ moveq r0, r2 │ │ cmp r0, #0 │ │ - bne.w 58a26 │ │ + bne.w 58c36 │ │ adds r0, r4, #4 │ │ stmia.w r0, {r6, r7, r8, r9} │ │ str r1, [r4, #0] │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - bmi.n 58b52 │ │ + bmi.n 58d62 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #68 @ 0x44 │ │ cmp r3, #8 │ │ - bne.w 58d52 │ │ + bne.w 58f62 │ │ mov r4, r0 │ │ ldr r0, [r1, #0] │ │ ldr r6, [r2, #4] │ │ mov r7, r1 │ │ ldr.w r8, [r2] │ │ ldr r0, [r0, #0] │ │ eor.w r9, r6, #2147483648 @ 0x80000000 │ │ - cbz r0, 58bd4 │ │ + cbz r0, 58de4 │ │ mov r2, r8 │ │ mov r3, r9 │ │ - bl 5882c │ │ + bl 58a3c │ │ cmp r0, #0 │ │ - beq.n 58cc0 │ │ + beq.n 58ed0 │ │ ldr r5, [r7, #4] │ │ ldr r0, [r5, #0] │ │ cmp r0, #0 │ │ - beq.w 58d3e │ │ + beq.w 58f4e │ │ movs r0, #8 │ │ mov.w sl, #8 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 58d68 │ │ + beq.w 58f78 │ │ str r6, [r0, #4] │ │ movs r2, #0 │ │ str.w r8, [r0] │ │ mov r6, r0 │ │ ldr r1, [r5, #4] │ │ mov r3, r6 │ │ strd sl, r2, [sp] │ │ add r2, sp, #40 @ 0x28 │ │ mov r0, r2 │ │ movs r2, #16 │ │ - bl 49e28 │ │ + bl 4a130 │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrd r0, sl, [sp, #40] @ 0x28 │ │ - cbz r0, 58c28 │ │ + cbz r0, 58e38 │ │ add r2, sp, #48 @ 0x30 │ │ ldmia r2, {r0, r1, r2} │ │ strd r1, r2, [r4, #8] │ │ strd sl, r0, [r4] │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd fp, r0, [sp, #52] @ 0x34 │ │ movs r5, #41 @ 0x29 │ │ str r0, [sp, #12] │ │ movs r0, #41 @ 0x29 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 58d70 │ │ - ldr r1, [pc, #312] @ (58d78 ) │ │ + beq.w 58f80 │ │ + ldr r1, [pc, #312] @ (58f88 ) │ │ movs r2, #41 @ 0x29 │ │ mov r6, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r1, #17 │ │ str r5, [sp, #52] @ 0x34 │ │ movt r1, #32768 @ 0x8000 │ │ subs r0, r1, #4 │ │ cmp.w sl, #0 │ │ strd r5, r6, [sp, #44] @ 0x2c │ │ str r0, [sp, #40] @ 0x28 │ │ - beq.n 58cd2 │ │ + beq.n 58ee2 │ │ add r0, sp, #40 @ 0x28 │ │ mov sl, r1 │ │ - bl 31e14 │ │ + bl 31ee0 │ │ ldr r2, [sp, #12] │ │ cmp r2, #1 │ │ - bls.n 58d46 │ │ + bls.n 58f56 │ │ ldrh.w r0, [fp] │ │ add r5, sp, #40 @ 0x28 │ │ ldr r7, [r7, #8] │ │ mov r3, r9 │ │ strd r2, r0, [sp, #28] │ │ add r0, sp, #16 │ │ stmia.w r0, {r8, r9, fp} │ │ add r2, sp, #16 │ │ add.w r6, r2, #8 │ │ ldrd r1, r0, [r7] │ │ mov r2, r8 │ │ strd r6, r0, [sp] │ │ mov r0, r5 │ │ - bl 483e0 │ │ + bl 486e8 │ │ ldr r1, [sp, #40] @ 0x28 │ │ ldrb.w r0, [sp, #44] @ 0x2c │ │ cmp r1, sl │ │ - bne.n 58ce0 │ │ + bne.n 58ef0 │ │ mov r3, sl │ │ lsls r0, r0, #31 │ │ - beq.n 58cfe │ │ + beq.n 58f0e │ │ ldr r0, [r7, #8] │ │ ldrd r1, r2, [r0, #4] │ │ adds r1, #1 │ │ str r1, [r0, #4] │ │ cmp r1, r2 │ │ - bls.n 58d0a │ │ + bls.n 58f1a │ │ movs r0, #0 │ │ str r3, [r4, #0] │ │ strb r0, [r4, #4] │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ @@ -73067,164 +73163,164 @@ │ │ str r3, [r4, #0] │ │ movs r0, #1 │ │ strb r0, [r4, #4] │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r2, [r0, #12] │ │ cmp r1, r2 │ │ - bls.n 58d32 │ │ + bls.n 58f42 │ │ str.w r8, [sp, #40] @ 0x28 │ │ ldmia.w r6, {r1, r2, r3} │ │ ldr r0, [r0, #0] │ │ strd r2, r3, [sp, #52] @ 0x34 │ │ mov r2, r8 │ │ mov r3, r9 │ │ strd r9, r1, [sp, #44] @ 0x2c │ │ add.w r1, r5, #8 │ │ str r1, [sp, #0] │ │ - bl 588fc │ │ + bl 58b0c │ │ mov r3, sl │ │ movs r0, #1 │ │ str r3, [r4, #0] │ │ strb r0, [r4, #4] │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #72] @ (58d88 ) │ │ + ldr r0, [pc, #72] @ (58f98 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r3, [pc, #68] @ (58d8c ) │ │ + bl 3fd40 │ │ + ldr r3, [pc, #68] @ (58f9c ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #40] @ (58d7c ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #40] @ (58f8c ) │ │ add r2, sp, #40 @ 0x28 │ │ - ldr r3, [pc, #40] @ (58d80 ) │ │ - ldr r1, [pc, #40] @ (58d84 ) │ │ + ldr r3, [pc, #40] @ (58f90 ) │ │ + ldr r1, [pc, #40] @ (58f94 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ movs r0, #1 │ │ movs r1, #8 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #41 @ 0x29 │ │ - bl 3dfa4 │ │ - udf #250 @ 0xfa │ │ - vcvt.s32.f32 d16, d25 │ │ - @ instruction: 0xfffc1bf0 │ │ + bl 3e2ac │ │ + bgt.n 58f60 │ │ + vsli.32 d16, d9, #27 │ │ + vtbx.8 d17, {d28-d29}, d0 │ │ movs r0, r1 │ │ - adds r6, r1, #4 │ │ + subs r6, r1, r4 │ │ movs r0, r1 │ │ - subs r4, r1, #0 │ │ + adds r4, r1, #0 │ │ movs r0, r1 │ │ - adds r0, r4, #3 │ │ + subs r0, r4, r3 │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #60 @ 0x3c │ │ mov fp, r0 │ │ ldr r0, [sp, #96] @ 0x60 │ │ cmp r0, #8 │ │ - bne.w 58f48 │ │ + bne.w 59158 │ │ ldr r0, [r1, #0] │ │ mov r5, r1 │ │ cmp r0, #0 │ │ - beq.w 58f32 │ │ + beq.w 59142 │ │ movs r0, #8 │ │ mov r9, r2 │ │ ldr r4, [r3, #0] │ │ movs r7, #8 │ │ ldr r6, [r3, #4] │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 58f5e │ │ + beq.w 5916e │ │ movs r2, #0 │ │ ldr r1, [r5, #4] │ │ strd r7, r2, [sp] │ │ add r2, sp, #32 │ │ mov r5, r0 │ │ str r4, [r0, #0] │ │ str r6, [r0, #4] │ │ mov r0, r2 │ │ movs r2, #16 │ │ mov r3, r5 │ │ - bl 49e28 │ │ + bl 4a130 │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrd r1, r7, [sp, #40] @ 0x28 │ │ ldr r5, [sp, #48] @ 0x30 │ │ ldrd r2, r0, [sp, #32] │ │ cmp r2, #1 │ │ - bne.n 58dfa │ │ + bne.n 5900a │ │ stmia.w fp, {r0, r1, r7} │ │ str.w r5, [fp, #12] │ │ add sp, #60 @ 0x3c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ cmp r0, #0 │ │ - beq.n 58e80 │ │ + beq.n 59090 │ │ cmp r1, #8 │ │ - bne.w 58f48 │ │ + bne.w 59158 │ │ cmp r5, #1 │ │ - bls.w 58f3a │ │ + bls.w 5914a │ │ ldr.w r8, [r0] │ │ ldr r0, [r0, #4] │ │ ldrh r6, [r7, #0] │ │ eor.w sl, r0, #2147483648 @ 0x80000000 │ │ ldrd r0, r9, [r9] │ │ ldr r0, [r0, #0] │ │ - cbz r0, 58e2a │ │ + cbz r0, 5903a │ │ mov r2, r8 │ │ mov r3, sl │ │ - bl 5882c │ │ + bl 58a3c │ │ cmp r0, #0 │ │ - beq.n 58ed2 │ │ + beq.n 590e2 │ │ add r2, sp, #8 │ │ ldrd r1, r0, [r9] │ │ add r4, sp, #32 │ │ adds r2, #8 │ │ strd r2, r0, [sp] │ │ mov r2, r8 │ │ mov r0, r4 │ │ mov r3, sl │ │ str r6, [sp, #24] │ │ strd r7, r5, [sp, #16] │ │ strd r8, sl, [sp, #8] │ │ - bl 483e0 │ │ + bl 486e8 │ │ ldrb.w r0, [sp, #36] @ 0x24 │ │ movs r3, #17 │ │ ldr r1, [sp, #32] │ │ movt r3, #32768 @ 0x8000 │ │ cmp r1, r3 │ │ - bne.n 58eae │ │ + bne.n 590be │ │ lsls r0, r0, #31 │ │ - beq.n 58ee8 │ │ + beq.n 590f8 │ │ ldr.w r0, [r9, #8] │ │ ldrd r1, r2, [r0, #4] │ │ adds r1, #1 │ │ str r1, [r0, #4] │ │ cmp r1, r2 │ │ - bls.n 58ef8 │ │ + bls.n 59108 │ │ movs r0, #0 │ │ str.w r3, [fp] │ │ strb.w r0, [fp, #4] │ │ add sp, #60 @ 0x3c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #28 │ │ movs r6, #28 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 58f66 │ │ - ldr r1, [pc, #224] @ (58f70 ) │ │ + beq.n 59176 │ │ + ldr r1, [pc, #224] @ (59180 ) │ │ movs r2, #28 │ │ mov r5, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #17 │ │ strd r5, r6, [fp, #8] │ │ movt r0, #32768 @ 0x8000 │ │ subs r0, #4 │ │ strd r0, r6, [fp] │ │ add sp, #60 @ 0x3c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ @@ -73248,150 +73344,150 @@ │ │ str.w r3, [fp] │ │ movs r0, #1 │ │ strb.w r0, [fp, #4] │ │ add sp, #60 @ 0x3c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r2, [r0, #12] │ │ cmp r1, r2 │ │ - bls.n 58f22 │ │ + bls.n 59132 │ │ str.w r8, [sp, #32] │ │ mov r2, r8 │ │ str r6, [sp, #48] @ 0x30 │ │ mov r3, sl │ │ strd r7, r5, [sp, #40] @ 0x28 │ │ add.w r1, r4, #8 │ │ ldr r0, [r0, #0] │ │ str.w sl, [sp, #36] @ 0x24 │ │ str r1, [sp, #0] │ │ - bl 588fc │ │ + bl 58b0c │ │ movs r3, #17 │ │ movt r3, #32768 @ 0x8000 │ │ movs r0, #1 │ │ str.w r3, [fp] │ │ strb.w r0, [fp, #4] │ │ add sp, #60 @ 0x3c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #76] @ (58f80 ) │ │ + ldr r0, [pc, #76] @ (59190 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r3, [pc, #72] @ (58f84 ) │ │ + bl 3fd40 │ │ + ldr r3, [pc, #72] @ (59194 ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ mov r2, r5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #40] @ (58f74 ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #40] @ (59184 ) │ │ add r2, sp, #32 │ │ - ldr r3, [pc, #40] @ (58f78 ) │ │ - ldr r1, [pc, #44] @ (58f7c ) │ │ + ldr r3, [pc, #40] @ (59188 ) │ │ + ldr r1, [pc, #44] @ (5918c ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ movs r0, #1 │ │ movs r1, #8 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #28 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - blt.n 58f28 │ │ - vsli.32 d16, d19, #27 │ │ - @ instruction: 0xfffc19fa │ │ + bls.n 59118 │ │ + vcvtm.s32.f32 d16, d19 │ │ + vqneg.s , q5 │ │ movs r0, r1 │ │ - subs r0, r3, r4 │ │ + adds r0, r3, r4 │ │ movs r0, r1 │ │ - adds r0, r3, #0 │ │ + subs r0, r3, r0 │ │ movs r0, r1 │ │ - subs r2, r5, r3 │ │ + adds r2, r5, r3 │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #44 @ 0x2c │ │ cmp r3, #8 │ │ - bne.w 590a0 │ │ + bne.w 592b0 │ │ mov r4, r0 │ │ ldr r0, [r1, #0] │ │ ldr r6, [r2, #4] │ │ mov r7, r1 │ │ ldr.w fp, [r2] │ │ ldr r0, [r0, #0] │ │ eor.w r9, r6, #2147483648 @ 0x80000000 │ │ - cbz r0, 58fb4 │ │ + cbz r0, 591c4 │ │ mov r2, fp │ │ mov r3, r9 │ │ - bl 5882c │ │ + bl 58a3c │ │ cmp r0, #0 │ │ - beq.n 5906a │ │ + beq.n 5927a │ │ ldr r5, [r7, #4] │ │ ldr r0, [r5, #0] │ │ cmp r0, #0 │ │ - beq.n 5908c │ │ + beq.n 5929c │ │ movs r0, #8 │ │ mov.w r8, #8 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 590b6 │ │ + beq.n 592c6 │ │ str r6, [r0, #4] │ │ movs r2, #0 │ │ str.w fp, [r0] │ │ mov r6, r0 │ │ ldr r1, [r5, #4] │ │ mov r3, r6 │ │ strd r8, r2, [sp] │ │ add r2, sp, #16 │ │ mov r0, r2 │ │ movs r2, #16 │ │ - bl 49e28 │ │ + bl 4a130 │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrd r0, r5, [sp, #16] │ │ - cbz r0, 59004 │ │ + cbz r0, 59214 │ │ add r2, sp, #24 │ │ ldmia r2, {r0, r1, r2} │ │ strd r1, r2, [r4, #8] │ │ strd r5, r0, [r4] │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd sl, r0, [sp, #28] │ │ mov.w r8, #41 @ 0x29 │ │ str r0, [sp, #12] │ │ movs r0, #41 @ 0x29 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 590be │ │ - ldr r1, [pc, #172] @ (590c8 ) │ │ + beq.n 592ce │ │ + ldr r1, [pc, #172] @ (592d8 ) │ │ movs r2, #41 @ 0x29 │ │ mov r6, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #13 │ │ str.w r8, [sp, #28] │ │ movt r0, #32768 @ 0x8000 │ │ strd r8, r6, [sp, #20] │ │ str r0, [sp, #16] │ │ - cbz r5, 5907e │ │ + cbz r5, 5928e │ │ add r6, sp, #16 │ │ mov r0, r6 │ │ - bl 31e14 │ │ + bl 31ee0 │ │ ldr r2, [sp, #12] │ │ cmp r2, #1 │ │ - bls.n 59094 │ │ + bls.n 592a4 │ │ ldrh.w r0, [sl] │ │ mov r3, r9 │ │ ldr r1, [r7, #8] │ │ str r0, [sp, #32] │ │ add.w r0, r6, #8 │ │ strd sl, r2, [sp, #24] │ │ mov r2, fp │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ strd fp, r9, [sp, #16] │ │ - bl 5a392 │ │ + bl 5a5a2 │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #13 │ │ movt r0, #32768 @ 0x8000 │ │ adds r0, #4 │ │ str r0, [r4, #0] │ │ movs r0, #1 │ │ @@ -73399,226 +73495,226 @@ │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r1, #41 @ 0x29 │ │ stmia.w r4, {r0, r1, r6} │ │ str r1, [r4, #12] │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #72] @ (590d8 ) │ │ + ldr r0, [pc, #72] @ (592e8 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r3, [pc, #68] @ (590dc ) │ │ + bl 3fd40 │ │ + ldr r3, [pc, #68] @ (592ec ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #40] @ (590cc ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #40] @ (592dc ) │ │ add r2, sp, #16 │ │ - ldr r3, [pc, #40] @ (590d0 ) │ │ - ldr r1, [pc, #44] @ (590d4 ) │ │ + ldr r3, [pc, #40] @ (592e0 ) │ │ + ldr r1, [pc, #44] @ (592e4 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ movs r0, #1 │ │ movs r1, #8 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #41 @ 0x29 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - blt.n 59108 │ │ - vrsra.u64 q8, , #5 │ │ - vtbl.8 d17, {d28}, d18 │ │ + bls.n 592f8 │ │ + vcvtn.u32.f32 q8, │ │ + vqshlu.s32 , q9, #28 │ │ movs r0, r1 │ │ - adds r0, r0, r7 │ │ + asrs r0, r0, #31 │ │ movs r0, r1 │ │ - subs r6, r7, r2 │ │ + adds r6, r7, r2 │ │ movs r0, r1 │ │ - adds r2, r2, r6 │ │ + asrs r2, r2, #30 │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #36 @ 0x24 │ │ mov r4, r0 │ │ ldr r0, [sp, #72] @ 0x48 │ │ cmp r0, #8 │ │ - bne.n 591e0 │ │ + bne.n 593f0 │ │ ldr r0, [r1, #0] │ │ mov r5, r1 │ │ cmp r0, #0 │ │ - beq.n 591ca │ │ + beq.n 593da │ │ movs r0, #8 │ │ mov r9, r2 │ │ ldr r6, [r3, #0] │ │ mov.w r8, #8 │ │ ldr r7, [r3, #4] │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 591f6 │ │ + beq.n 59406 │ │ movs r2, #0 │ │ ldr r1, [r5, #4] │ │ strd r8, r2, [sp] │ │ add.w r8, sp, #8 │ │ mov r5, r0 │ │ str r6, [r0, #0] │ │ str r7, [r0, #4] │ │ mov r0, r8 │ │ movs r2, #16 │ │ mov r3, r5 │ │ - bl 49e28 │ │ + bl 4a130 │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add r7, sp, #16 │ │ ldrd r2, r0, [sp, #8] │ │ ldmia r7, {r1, r6, r7} │ │ cmp r2, #1 │ │ - bne.n 59140 │ │ + bne.n 59350 │ │ stmia r4!, {r0, r1, r6, r7} │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - cbz r0, 5918c │ │ + cbz r0, 5939c │ │ cmp r1, #8 │ │ - bne.n 591e0 │ │ + bne.n 593f0 │ │ cmp r7, #1 │ │ - bls.n 591d2 │ │ + bls.n 593e2 │ │ ldr.w sl, [r0] │ │ ldr r0, [r0, #4] │ │ ldrh.w fp, [r6] │ │ eor.w r5, r0, #2147483648 @ 0x80000000 │ │ ldrd r0, r9, [r9] │ │ ldr r0, [r0, #0] │ │ - cbz r0, 5916a │ │ + cbz r0, 5937a │ │ mov r2, sl │ │ mov r3, r5 │ │ - bl 5882c │ │ - cbz r0, 591b6 │ │ + bl 58a3c │ │ + cbz r0, 593c6 │ │ add r0, sp, #16 │ │ mov r1, r9 │ │ stmia.w r0, {r6, r7, fp} │ │ add.w r0, r8, #8 │ │ mov r2, sl │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ mov r3, r5 │ │ strd sl, r5, [sp, #8] │ │ - bl 5a392 │ │ + bl 5a5a2 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #28 │ │ movs r6, #28 │ │ - blx d87f0 │ │ - cbz r0, 591fe │ │ - ldr r1, [pc, #112] @ (59208 ) │ │ + blx d8810 │ │ + cbz r0, 5940e │ │ + ldr r1, [pc, #112] @ (59418 ) │ │ movs r2, #28 │ │ mov r5, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #13 │ │ strd r5, r6, [r4, #8] │ │ movt r0, #32768 @ 0x8000 │ │ strd r0, r6, [r4] │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #13 │ │ movt r0, #32768 @ 0x8000 │ │ adds r0, #4 │ │ str r0, [r4, #0] │ │ movs r0, #1 │ │ strb r0, [r4, #4] │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #76] @ (59218 ) │ │ + ldr r0, [pc, #76] @ (59428 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r3, [pc, #72] @ (5921c ) │ │ + bl 3fd40 │ │ + ldr r3, [pc, #72] @ (5942c ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ mov r2, r7 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #40] @ (5920c ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #40] @ (5941c ) │ │ add r2, sp, #8 │ │ - ldr r3, [pc, #40] @ (59210 ) │ │ - ldr r1, [pc, #44] @ (59214 ) │ │ + ldr r3, [pc, #40] @ (59420 ) │ │ + ldr r1, [pc, #44] @ (59424 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ movs r0, #1 │ │ movs r1, #8 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #28 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - bhi.n 591ac │ │ - vrshr.u64 d16, d11, #5 │ │ - vqabs.s , q9 │ │ + bvs.n 5939c │ │ + vcvta.u32.f32 d16, d11 │ │ + vsli.32 d17, d18, #28 │ │ movs r0, r1 │ │ - adds r0, r0, r2 │ │ + asrs r0, r0, #26 │ │ movs r0, r1 │ │ - adds r0, r0, r6 │ │ + asrs r0, r0, #30 │ │ movs r0, r1 │ │ - adds r2, r2, r1 │ │ + asrs r2, r2, #25 │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #316 @ 0x13c │ │ mov r8, r1 │ │ str r0, [sp, #36] @ 0x24 │ │ movs r0, #0 │ │ movs r1, #8 │ │ strd r0, r1, [sp, #88] @ 0x58 │ │ add r1, sp, #88 @ 0x58 │ │ str r1, [sp, #100] @ 0x64 │ │ ldrb.w r1, [r8, #124] @ 0x7c │ │ str r0, [sp, #96] @ 0x60 │ │ str r2, [sp, #64] @ 0x40 │ │ - cbz r1, 5929c │ │ + cbz r1, 594ac │ │ movs r1, #4 │ │ add r5, sp, #104 @ 0x68 │ │ strd r0, r1, [sp, #112] @ 0x70 │ │ movw r1, #909 @ 0x38d │ │ strd r0, r0, [sp, #104] @ 0x68 │ │ strd r0, r0, [sp, #120] @ 0x78 │ │ strd r0, r1, [sp, #128] @ 0x80 │ │ - b.n 5925e │ │ + b.n 5946e │ │ lsrs r0, r2, #2 │ │ - bne.n 592a6 │ │ + bne.n 594b6 │ │ mov r0, r5 │ │ - bl 58484 │ │ + bl 58694 │ │ ldr r0, [sp, #124] @ 0x7c │ │ cmp r0, #0 │ │ - beq.n 5925e │ │ + beq.n 5946e │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r6, #1 │ │ movs r7, #0 │ │ - b.n 59284 │ │ + b.n 59494 │ │ umull r2, r4, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r4, r3, r7, r4 │ │ mla r7, r3, r7, r4 │ │ mov r3, r2 │ │ lsls r2, r0, #31 │ │ - beq.n 59274 │ │ + beq.n 59484 │ │ umull r2, r4, r3, r6 │ │ cmp r0, #1 │ │ - beq.n 5925a │ │ + beq.n 5946a │ │ mla r1, r3, r1, r4 │ │ mla r1, r7, r6, r1 │ │ mov r6, r2 │ │ - b.n 59274 │ │ + b.n 59484 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ mov r6, r2 │ │ str r0, [sp, #264] @ 0x108 │ │ - b.n 592b4 │ │ + b.n 594c4 │ │ ldmia r5!, {r1, r2, r3, r7} │ │ add r0, sp, #256 @ 0x100 │ │ stmia r0!, {r1, r2, r3, r7} │ │ ldmia.w r5, {r1, r2, r3, r7} │ │ stmia r0!, {r1, r2, r3, r7} │ │ ldr r6, [sp, #64] @ 0x40 │ │ str.w r8, [sp, #40] @ 0x28 │ │ @@ -73642,81 +73738,81 @@ │ │ add.w r0, fp, #8 │ │ str r0, [sp, #52] @ 0x34 │ │ add.w r0, fp, #5 │ │ str r0, [sp, #24] │ │ str.w r8, [sp, #80] @ 0x50 │ │ ldr r0, [sp, #76] @ 0x4c │ │ cmp sl, r0 │ │ - beq.w 59b0e │ │ + beq.w 59d1e │ │ add r0, sp, #100 @ 0x64 │ │ ldr.w r8, [sp, #264] @ 0x108 │ │ ldr.w r2, [sl, #16] │ │ add r1, sp, #256 @ 0x100 │ │ strd r6, r0, [sp, #184] @ 0xb8 │ │ ldr r0, [sp, #80] @ 0x50 │ │ str r0, [sp, #180] @ 0xb4 │ │ subs.w r0, r8, #2147483648 @ 0x80000000 │ │ it ne │ │ movne r0, r1 │ │ cmp r2, #0 │ │ mov.w r1, #1 │ │ it mi │ │ eormi.w r1, r2, #2147483648 @ 0x80000000 │ │ - cbz r1, 59358 │ │ + cbz r1, 59568 │ │ cmp r1, #1 │ │ - bne.n 5937c │ │ + bne.n 5958c │ │ ldr.w r2, [sl, #48] @ 0x30 │ │ mov r1, r6 │ │ str r0, [sp, #204] @ 0xcc │ │ mov r0, fp │ │ - bl 49d00 │ │ + bl 4a008 │ │ ldrd r1, r5, [sp, #288] @ 0x120 │ │ ldrd r4, r0, [sp, #296] @ 0x128 │ │ ldr r2, [sp, #304] @ 0x130 │ │ cmp r1, #2 │ │ - bne.n 593ae │ │ + bne.n 595be │ │ lsrs r1, r4, #8 │ │ str r2, [sp, #84] @ 0x54 │ │ str r1, [sp, #72] @ 0x48 │ │ mov r7, r0 │ │ - b.n 59abc │ │ + b.n 59ccc │ │ ldr.w r2, [sl, #24] │ │ mov r0, fp │ │ mov r1, r6 │ │ - bl 49d00 │ │ + bl 4a008 │ │ ldrd r0, r5, [sp, #288] @ 0x120 │ │ ldrd r4, r1, [sp, #296] @ 0x128 │ │ ldr r2, [sp, #304] @ 0x130 │ │ cmp r0, #2 │ │ - bne.n 59402 │ │ + bne.n 59612 │ │ lsrs r0, r4, #8 │ │ str r2, [sp, #84] @ 0x54 │ │ str r0, [sp, #72] @ 0x48 │ │ mov r7, r1 │ │ - b.n 59abc │ │ + b.n 59ccc │ │ str r0, [sp, #204] @ 0xcc │ │ add r0, sp, #180 @ 0xb4 │ │ ldr.w r2, [sl, #56] @ 0x38 │ │ mov r1, r6 │ │ str r0, [sp, #196] @ 0xc4 │ │ add r0, sp, #204 @ 0xcc │ │ str r0, [sp, #192] @ 0xc0 │ │ mov r0, fp │ │ str r7, [sp, #68] @ 0x44 │ │ ldrd r5, r8, [sl, #24] │ │ - bl 49d00 │ │ + bl 4a008 │ │ ldr r0, [sp, #288] @ 0x120 │ │ cmp r0, #2 │ │ - bne.n 5942e │ │ + bne.n 5963e │ │ ldrd r7, r0, [sp, #300] @ 0x12c │ │ ldrd r5, r4, [sp, #292] @ 0x124 │ │ str r0, [sp, #84] @ 0x54 │ │ lsrs r0, r4, #8 │ │ str r0, [sp, #72] @ 0x48 │ │ - b.n 59abc │ │ + b.n 59ccc │ │ ldr r3, [sp, #308] @ 0x134 │ │ strd r4, r0, [sp, #216] @ 0xd8 │ │ ldrd r0, r8, [sl, #60] @ 0x3c │ │ strd r1, r5, [sp, #208] @ 0xd0 │ │ mov r1, r6 │ │ str r0, [sp, #60] @ 0x3c │ │ ldrd r0, r5, [sl, #72] @ 0x48 │ │ @@ -73730,215 +73826,215 @@ │ │ ldr.w r2, [sl] │ │ str r0, [sp, #196] @ 0xc4 │ │ add r0, sp, #204 @ 0xcc │ │ str r0, [sp, #192] @ 0xc0 │ │ mov r0, fp │ │ str r7, [sp, #68] @ 0x44 │ │ ldrb.w r7, [sl, #81] @ 0x51 │ │ - bl 49d00 │ │ + bl 4a008 │ │ add.w fp, sp, #288 @ 0x120 │ │ ldr r6, [sp, #304] @ 0x130 │ │ ldmia.w fp, {r0, r2, r4, fp} │ │ cmp r0, #2 │ │ - bne.n 59462 │ │ + bne.n 59672 │ │ lsrs r0, r4, #8 │ │ mov r5, r2 │ │ str r0, [sp, #72] @ 0x48 │ │ - b.n 59aa0 │ │ + b.n 59cb0 │ │ ldr r3, [sp, #308] @ 0x134 │ │ strd r0, r5, [sp, #232] @ 0xe8 │ │ lsls r0, r0, #31 │ │ strd r4, r1, [sp, #240] @ 0xf0 │ │ str r5, [sp, #60] @ 0x3c │ │ strd r2, r3, [sp, #248] @ 0xf8 │ │ - beq.w 59e2a │ │ + beq.w 5a03a │ │ ldrd r2, r3, [sl, #32] │ │ ldrd r1, r4, [sl, #40] @ 0x28 │ │ subs r0, r1, r2 │ │ sbcs.w r0, r4, r3 │ │ - bge.n 59514 │ │ + bge.n 59724 │ │ movs r4, #1 │ │ mov fp, r9 │ │ - b.n 599cc │ │ + b.n 59bdc │ │ ldrd r4, r2, [sp, #292] @ 0x124 │ │ mov r1, r6 │ │ strd r4, r2, [sp, #212] @ 0xd4 │ │ ldr.w r2, [sl, #32] │ │ ldrd r3, r7, [sp, #300] @ 0x12c │ │ ldr r6, [sp, #308] @ 0x134 │ │ str r0, [sp, #208] @ 0xd0 │ │ mov r0, fp │ │ strd r3, r7, [sp, #220] @ 0xdc │ │ str r6, [sp, #228] @ 0xe4 │ │ - bl 49d00 │ │ + bl 4a008 │ │ add r7, sp, #288 @ 0x120 │ │ ldr r6, [sp, #304] @ 0x130 │ │ ldmia r7, {r0, r2, r4, r7} │ │ cmp r0, #2 │ │ - bne.n 594b4 │ │ + bne.n 596c4 │ │ lsrs r0, r4, #8 │ │ mov r5, r2 │ │ str r0, [sp, #72] @ 0x48 │ │ - b.n 59988 │ │ + b.n 59b98 │ │ ldr r1, [sp, #308] @ 0x134 │ │ strd r6, r1, [sp, #248] @ 0xf8 │ │ add r1, sp, #232 @ 0xe8 │ │ stmia.w r1, {r0, r2, r4, fp} │ │ lsls r0, r0, #31 │ │ - beq.w 59e2a │ │ + beq.w 5a03a │ │ mov fp, r2 │ │ mov r2, r5 │ │ str r7, [sp, #44] @ 0x2c │ │ cmp r8, r5 │ │ ldrb.w r4, [sl, #40] @ 0x28 │ │ it cc │ │ movcc r2, r8 │ │ mov r7, r8 │ │ ldr.w r8, [sp, #56] @ 0x38 │ │ ldr r6, [sp, #60] @ 0x3c │ │ mov r0, r8 │ │ mov r1, r6 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r5, r7 │ │ mov.w r1, #0 │ │ it cc │ │ movcc r1, #1 │ │ cmp r0, #0 │ │ mov.w r0, #0 │ │ it mi │ │ movmi r0, #1 │ │ it eq │ │ moveq r0, r1 │ │ cmp r0, #0 │ │ - beq.n 5954c │ │ + beq.n 5975c │ │ movs r4, #1 │ │ - b.n 59a7e │ │ + b.n 59c8e │ │ ldr r1, [sp, #308] @ 0x134 │ │ strd r6, r1, [sp, #248] @ 0xf8 │ │ add r1, sp, #232 @ 0xe8 │ │ stmia r1!, {r0, r2, r4, r7} │ │ lsls r0, r0, #31 │ │ - beq.w 59e2a │ │ + beq.w 5a03a │ │ movs r0, #8 │ │ mov r6, r2 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 59e84 │ │ + beq.w 5a094 │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ str r5, [r0, #0] │ │ eor.w r1, r1, r8 │ │ str r1, [r0, #4] │ │ mov r5, r0 │ │ movs r1, #0 │ │ movs r2, #8 │ │ mov r0, fp │ │ strd r2, r1, [sp] │ │ mov r1, r6 │ │ movs r2, #16 │ │ mov r3, r5 │ │ - bl 49e28 │ │ + bl 4a130 │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrd r0, r5, [sp, #288] @ 0x120 │ │ cmp r0, #1 │ │ - bne.w 59718 │ │ + bne.w 59928 │ │ ldr r4, [sp, #296] @ 0x128 │ │ ldr r0, [sp, #300] @ 0x12c │ │ str r0, [sp, #68] @ 0x44 │ │ ldr r0, [sp, #304] @ 0x130 │ │ str r0, [sp, #84] @ 0x54 │ │ lsrs r0, r4, #8 │ │ str r0, [sp, #72] @ 0x48 │ │ - b.n 59972 │ │ + b.n 59b82 │ │ ldrb.w r9, [sl, #48] @ 0x30 │ │ strd r4, r1, [sp, #28] │ │ strd r1, r4, [sp] │ │ eor.w r0, r9, #1 │ │ ldr r1, [sp, #60] @ 0x3c │ │ str r0, [sp, #8] │ │ mov r0, fp │ │ str r7, [sp, #68] @ 0x44 │ │ strd r3, r2, [sp, #44] @ 0x2c │ │ - bl 58674 │ │ + bl 58884 │ │ add r7, sp, #296 @ 0x128 │ │ ldrd r0, fp, [sp, #288] @ 0x120 │ │ ldmia r7, {r4, r6, r7} │ │ cmp r0, #1 │ │ - bne.n 59586 │ │ + bne.n 59796 │ │ lsrs r0, r4, #8 │ │ str r7, [sp, #84] @ 0x54 │ │ mov r7, r6 │ │ str r0, [sp, #72] @ 0x48 │ │ ldr r6, [sp, #64] @ 0x40 │ │ - b.n 599c4 │ │ + b.n 59bd4 │ │ ldr r1, [sp, #44] @ 0x2c │ │ mov r2, r6 │ │ eor.w r0, r4, #1 │ │ add r6, sp, #288 @ 0x120 │ │ eor.w r1, r1, #1 │ │ mov r3, r7 │ │ strd r1, r0, [sp, #8] │ │ mov r0, r6 │ │ mov r1, fp │ │ strd r8, r5, [sp] │ │ - bl 589c8 │ │ + bl 58bd8 │ │ ldrd r2, r3, [sp, #300] @ 0x12c │ │ ldrd r0, r9, [sp, #288] @ 0x120 │ │ cmp r0, #1 │ │ - bne.w 59782 │ │ + bne.w 59992 │ │ ldr r4, [sp, #296] @ 0x128 │ │ mov r7, r2 │ │ str r3, [sp, #84] @ 0x54 │ │ lsrs r0, r4, #8 │ │ str r0, [sp, #72] @ 0x48 │ │ - b.n 59a80 │ │ + b.n 59c90 │ │ cmp.w fp, #0 │ │ - beq.w 5994a │ │ + beq.w 59b5a │ │ cmp r4, #8 │ │ - bne.w 59e6e │ │ + bne.w 5a07e │ │ ldr.w r0, [fp, #4] │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ ldr.w r4, [fp] │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ eor.w r5, r0, r1 │ │ - beq.n 595b6 │ │ + beq.n 597c6 │ │ add r0, sp, #256 @ 0x100 │ │ mov r2, r4 │ │ mov r3, r5 │ │ - bl 5882c │ │ - cbz r0, 59626 │ │ + bl 58a3c │ │ + cbz r0, 59836 │ │ cmp r7, #1 │ │ - bls.w 59e58 │ │ + bls.w 5a068 │ │ ldrh r0, [r6, #0] │ │ mov r2, r4 │ │ str r0, [sp, #304] @ 0x130 │ │ add r0, sp, #288 @ 0x120 │ │ stmia r0!, {r4, r5, r6, r7} │ │ mov r3, r5 │ │ ldr r6, [sp, #64] @ 0x40 │ │ ldr r0, [sp, #52] @ 0x34 │ │ ldr r1, [sp, #80] @ 0x50 │ │ strd r0, r6, [sp] │ │ add r0, sp, #208 @ 0xd0 │ │ str r4, [sp, #56] @ 0x38 │ │ str r5, [sp, #16] │ │ - bl 483e0 │ │ + bl 486e8 │ │ ldrb.w r4, [sp, #212] @ 0xd4 │ │ movs r0, #17 │ │ ldr.w fp, [sp, #208] @ 0xd0 │ │ movt r0, #32768 @ 0x8000 │ │ cmp fp, r0 │ │ - bne.w 5995c │ │ + bne.w 59b6c │ │ lsls r0, r4, #31 │ │ - beq.n 59626 │ │ + beq.n 59836 │ │ ldr r7, [sp, #100] @ 0x64 │ │ ldr r4, [r7, #8] │ │ ldr r0, [r7, #0] │ │ cmp r4, r0 │ │ - beq.w 59b06 │ │ + beq.w 59d16 │ │ ldr r3, [sp, #52] @ 0x34 │ │ add.w r6, r4, r4, lsl #1 │ │ ldr r0, [r7, #4] │ │ ldrd ip, r2, [r3] │ │ ldr r3, [r3, #8] │ │ ldr r1, [sp, #56] @ 0x38 │ │ str.w r1, [r0, r6, lsl #3] │ │ @@ -73950,226 +74046,226 @@ │ │ str r0, [r7, #8] │ │ add r4, sp, #288 @ 0x120 │ │ movs r0, #12 │ │ cmp.w r9, #0 │ │ it eq │ │ moveq r0, #8 │ │ str r0, [sp, #56] @ 0x38 │ │ - beq.w 5989c │ │ + beq.w 59aac │ │ ldrd r2, r1, [sp, #56] @ 0x38 │ │ movs r0, #0 │ │ str r0, [sp, #4] │ │ mov r0, r4 │ │ movs r3, #0 │ │ - bl 49e28 │ │ + bl 4a130 │ │ ldrd r4, r9, [sp, #296] @ 0x128 │ │ ldr r5, [sp, #304] @ 0x130 │ │ ldrd r0, fp, [sp, #288] @ 0x120 │ │ cmp r0, #1 │ │ - beq.w 5999e │ │ + beq.w 59bae │ │ ldr r6, [sp, #64] @ 0x40 │ │ cmp.w fp, #0 │ │ - beq.w 599a4 │ │ + beq.w 59bb4 │ │ cmp r4, #8 │ │ - bne.w 59e6e │ │ + bne.w 5a07e │ │ ldr.w r0, [fp, #4] │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ ldr.w r6, [fp] │ │ add r4, sp, #288 @ 0x120 │ │ eor.w r7, r0, r1 │ │ ldr r0, [sp, #48] @ 0x30 │ │ subs r0, r6, r0 │ │ ldr r0, [sp, #44] @ 0x2c │ │ sbcs.w r0, r7, r0 │ │ - blt.n 59638 │ │ + blt.n 59848 │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ - beq.n 5969a │ │ + beq.n 598aa │ │ add r0, sp, #256 @ 0x100 │ │ mov r2, r6 │ │ mov r3, r7 │ │ - bl 5882c │ │ + bl 58a3c │ │ cmp r0, #0 │ │ - beq.n 59638 │ │ + beq.n 59848 │ │ cmp r5, #1 │ │ - bls.w 59e3c │ │ + bls.w 5a04c │ │ ldrh.w r0, [r9] │ │ mov r2, r6 │ │ ldr r1, [sp, #52] @ 0x34 │ │ mov r3, r7 │ │ strd r5, r0, [sp, #300] @ 0x12c │ │ add r0, sp, #288 @ 0x120 │ │ stmia.w r0, {r6, r7, r9} │ │ ldr r0, [sp, #64] @ 0x40 │ │ strd r1, r0, [sp] │ │ add r0, sp, #208 @ 0xd0 │ │ ldr r1, [sp, #80] @ 0x50 │ │ - bl 483e0 │ │ + bl 486e8 │ │ ldrb.w r4, [sp, #212] @ 0xd4 │ │ movw r9, #17 │ │ ldr.w fp, [sp, #208] @ 0xd0 │ │ movt r9, #32768 @ 0x8000 │ │ cmp fp, r9 │ │ - bne.w 599e6 │ │ + bne.w 59bf6 │ │ lsls r0, r4, #31 │ │ add r4, sp, #288 @ 0x120 │ │ - beq.n 59638 │ │ + beq.n 59848 │ │ ldr r5, [sp, #100] @ 0x64 │ │ ldr.w r9, [r5, #8] │ │ ldr r0, [r5, #0] │ │ cmp r9, r0 │ │ - beq.n 59710 │ │ + beq.n 59920 │ │ ldr r1, [sp, #52] @ 0x34 │ │ ldr r0, [r5, #4] │ │ ldrd ip, r2, [r1] │ │ ldr r3, [r1, #8] │ │ add.w r1, r9, r9, lsl #1 │ │ str.w r6, [r0, r1, lsl #3] │ │ add.w r0, r0, r1, lsl #3 │ │ strd r7, ip, [r0, #4] │ │ strd r2, r3, [r0, #12] │ │ add.w r0, r9, #1 │ │ str r0, [r5, #8] │ │ - b.n 59638 │ │ + b.n 59848 │ │ mov r0, r5 │ │ - bl 479e2 │ │ - b.n 596ea │ │ + bl 47c38 │ │ + b.n 598fa │ │ cmp r5, #0 │ │ - beq.w 59850 │ │ + beq.w 59a60 │ │ ldrd r3, r0, [sp, #300] @ 0x12c │ │ add r1, sp, #208 @ 0xd0 │ │ add r2, sp, #192 @ 0xc0 │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ - bl 5a094 │ │ + bl 5a2a4 │ │ ldr r5, [sp, #288] @ 0x120 │ │ ldrb.w r4, [sp, #292] @ 0x124 │ │ cmp r5, r9 │ │ - bne.w 59854 │ │ + bne.w 59a64 │ │ lsls r0, r4, #31 │ │ - beq.w 5996e │ │ + beq.w 59b7e │ │ movs r0, #0 │ │ mov r1, r6 │ │ str r0, [sp, #4] │ │ mov r0, fp │ │ movs r2, #9 │ │ movs r3, #0 │ │ - bl 49e28 │ │ + bl 4a130 │ │ ldrd r0, r5, [sp, #288] @ 0x120 │ │ cmp r0, #1 │ │ - beq.w 59504 │ │ + beq.w 59714 │ │ cmp r5, #0 │ │ - beq.n 59850 │ │ + beq.n 59a60 │ │ ldrd r3, r0, [sp, #300] @ 0x12c │ │ add r1, sp, #208 @ 0xd0 │ │ add r2, sp, #192 @ 0xc0 │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ - bl 5a094 │ │ + bl 5a2a4 │ │ ldr r5, [sp, #288] @ 0x120 │ │ ldrb.w r4, [sp, #292] @ 0x124 │ │ cmp r5, r9 │ │ - bne.n 59854 │ │ + bne.n 59a64 │ │ lsls r0, r4, #31 │ │ mov.w r4, #0 │ │ - bne.n 59740 │ │ - b.n 59970 │ │ + bne.n 59950 │ │ + b.n 59b80 │ │ cmp.w r9, #0 │ │ - beq.w 59a74 │ │ + beq.w 59c84 │ │ add r1, sp, #192 @ 0xc0 │ │ mov r0, r6 │ │ - bl 59eb8 │ │ + bl 5a0c8 │ │ ldrb.w r4, [sp, #292] @ 0x124 │ │ movs r0, #17 │ │ ldr.w r9, [sp, #288] @ 0x120 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r9, r0 │ │ - bne.w 59acc │ │ + bne.w 59cdc │ │ lsls r0, r4, #31 │ │ - beq.w 599b4 │ │ + beq.w 59bc4 │ │ ldr r0, [sp, #48] @ 0x30 │ │ movs r1, #12 │ │ str r7, [sp, #32] │ │ cmp r0, #0 │ │ mov.w r0, #8 │ │ it ne │ │ movne r0, #11 │ │ it ne │ │ movne r1, #14 │ │ ldr r2, [sp, #44] @ 0x2c │ │ cmp r2, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #48] @ 0x30 │ │ - beq.w 599f0 │ │ + beq.w 59c00 │ │ ldr r2, [sp, #48] @ 0x30 │ │ movs r0, #0 │ │ str r0, [sp, #4] │ │ mov r0, r6 │ │ mov r1, fp │ │ movs r3, #0 │ │ - bl 49e28 │ │ + bl 4a130 │ │ add.w r8, sp, #296 @ 0x128 │ │ ldrd r0, r9, [sp, #288] @ 0x120 │ │ ldmia.w r8, {r4, r7, r8} │ │ cmp r0, #1 │ │ - beq.w 59af4 │ │ + beq.w 59d04 │ │ cmp.w r9, #0 │ │ - beq.w 59a74 │ │ + beq.w 59c84 │ │ ldr r5, [sp, #32] │ │ mov r1, r9 │ │ cmp r4, r5 │ │ mov r2, r5 │ │ it cc │ │ movcc r2, r4 │ │ ldr r0, [sp, #60] @ 0x3c │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r5, r4 │ │ mov.w r1, #0 │ │ it hi │ │ movhi r1, #1 │ │ cmp r0, #0 │ │ mov.w r0, #0 │ │ it gt │ │ movgt r0, #1 │ │ it eq │ │ moveq r0, r1 │ │ cmp r0, #1 │ │ - beq.n 597ce │ │ + beq.n 599de │ │ add r1, sp, #192 @ 0xc0 │ │ mov r0, r6 │ │ mov r2, r7 │ │ mov r3, r8 │ │ - bl 59eb8 │ │ + bl 5a0c8 │ │ ldrb.w r4, [sp, #292] @ 0x124 │ │ movs r0, #17 │ │ ldr.w r9, [sp, #288] @ 0x120 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r9, r0 │ │ - bne.w 59acc │ │ + bne.w 59cdc │ │ lsls r0, r4, #31 │ │ mov.w r4, #0 │ │ - bne.n 597ce │ │ - b.n 59a76 │ │ + bne.n 599de │ │ + b.n 59c86 │ │ movs r4, #1 │ │ - b.n 59970 │ │ + b.n 59b80 │ │ ldr r1, [sp, #24] │ │ ldr r2, [sp, #296] @ 0x128 │ │ str r2, [sp, #68] @ 0x44 │ │ ldrb r0, [r1, #2] │ │ ldrh r1, [r1, #0] │ │ ldr r2, [sp, #300] @ 0x12c │ │ orr.w r0, r1, r0, lsl #16 │ │ str r2, [sp, #84] @ 0x54 │ │ str r0, [sp, #72] @ 0x48 │ │ - b.n 59972 │ │ + b.n 59b82 │ │ ldr r5, [sp, #100] @ 0x64 │ │ ldr.w fp, [r5, #8] │ │ ldr r0, [r5, #0] │ │ cmp fp, r0 │ │ - beq.n 59942 │ │ + beq.n 59b52 │ │ ldr r3, [sp, #52] @ 0x34 │ │ add.w r6, fp, fp, lsl #1 │ │ ldr r0, [r5, #4] │ │ ldrd ip, r2, [r3] │ │ ldr r3, [r3, #8] │ │ ldr r1, [sp, #48] @ 0x30 │ │ str.w r1, [r0, r6, lsl #3] │ │ @@ -74179,343 +74275,343 @@ │ │ add.w r0, fp, #1 │ │ str r0, [r5, #8] │ │ ldrd r2, r1, [sp, #56] @ 0x38 │ │ movs r0, #0 │ │ str r0, [sp, #4] │ │ mov r0, r4 │ │ movs r3, #0 │ │ - bl 49e28 │ │ + bl 4a130 │ │ add.w r9, sp, #296 @ 0x128 │ │ ldrd r0, fp, [sp, #288] @ 0x120 │ │ ldmia.w r9, {r4, r6, r9} │ │ cmp r0, #0 │ │ - bne.n 599b8 │ │ + bne.n 59bc8 │ │ cmp.w fp, #0 │ │ - beq.n 5994a │ │ + beq.n 59b5a │ │ cmp r4, #8 │ │ - bne.w 59e6e │ │ + bne.w 5a07e │ │ ldr.w r0, [fp, #4] │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ ldr.w r7, [fp] │ │ add r4, sp, #288 @ 0x120 │ │ eor.w r5, r0, r1 │ │ ldr r0, [sp, #32] │ │ subs r0, r0, r7 │ │ ldr r0, [sp, #28] │ │ sbcs r0, r5 │ │ - blt.n 5989c │ │ + blt.n 59aac │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ - beq.n 598f8 │ │ + beq.n 59b08 │ │ add r0, sp, #256 @ 0x100 │ │ mov r2, r7 │ │ mov r3, r5 │ │ - bl 5882c │ │ + bl 58a3c │ │ cmp r0, #0 │ │ - beq.n 5989c │ │ + beq.n 59aac │ │ cmp.w r9, #1 │ │ - bls.w 59e4a │ │ + bls.w 5a05a │ │ ldrh r0, [r6, #0] │ │ mov r2, r7 │ │ strd r6, r9, [sp, #296] @ 0x128 │ │ mov r3, r5 │ │ ldr r6, [sp, #64] @ 0x40 │ │ str r0, [sp, #304] @ 0x130 │ │ ldr r0, [sp, #52] @ 0x34 │ │ ldr r1, [sp, #80] @ 0x50 │ │ strd r0, r6, [sp] │ │ add r0, sp, #208 @ 0xd0 │ │ strd r7, r5, [sp, #288] @ 0x120 │ │ str r7, [sp, #48] @ 0x30 │ │ mov r7, r5 │ │ - bl 483e0 │ │ + bl 486e8 │ │ ldrb.w r4, [sp, #212] @ 0xd4 │ │ movw r9, #17 │ │ ldr.w fp, [sp, #208] @ 0xd0 │ │ movt r9, #32768 @ 0x8000 │ │ cmp fp, r9 │ │ - bne.w 59ae0 │ │ + bne.w 59cf0 │ │ lsls r0, r4, #31 │ │ add r4, sp, #288 @ 0x120 │ │ - beq.n 5989c │ │ - b.n 5986a │ │ + beq.n 59aac │ │ + b.n 59a7a │ │ mov r0, r5 │ │ - bl 479e2 │ │ - b.n 59876 │ │ + bl 47c38 │ │ + b.n 59a86 │ │ movw r9, #17 │ │ movs r4, #1 │ │ movt r9, #32768 @ 0x8000 │ │ ldrd r6, r7, [sp, #64] @ 0x40 │ │ mov fp, r9 │ │ - b.n 599cc │ │ + b.n 59bdc │ │ ldr r1, [sp, #20] │ │ ldrd r7, r2, [sp, #216] @ 0xd8 │ │ ldrb r0, [r1, #2] │ │ ldrh r1, [r1, #0] │ │ str r2, [sp, #84] @ 0x54 │ │ orr.w r0, r1, r0, lsl #16 │ │ - b.n 599c2 │ │ + b.n 59bd2 │ │ movs r4, #0 │ │ mov r5, r9 │ │ add r0, sp, #232 @ 0xe8 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #232] @ 0xe8 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #236] @ 0xec │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ ldr r6, [sp, #84] @ 0x54 │ │ ldr r7, [sp, #68] @ 0x44 │ │ add r0, sp, #208 @ 0xd0 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #208] @ 0xd0 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #212] @ 0xd4 │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ str r6, [sp, #84] @ 0x54 │ │ - b.n 59aba │ │ + b.n 59cca │ │ mov r7, r9 │ │ str r5, [sp, #84] @ 0x54 │ │ - b.n 599be │ │ + b.n 59bce │ │ movw r9, #17 │ │ movs r4, #1 │ │ movt r9, #32768 @ 0x8000 │ │ ldr r7, [sp, #68] @ 0x44 │ │ mov fp, r9 │ │ - b.n 599cc │ │ + b.n 59bdc │ │ movs r4, #0 │ │ - b.n 59a76 │ │ + b.n 59c86 │ │ mov r7, r6 │ │ str.w r9, [sp, #84] @ 0x54 │ │ ldr r6, [sp, #64] @ 0x40 │ │ lsrs r0, r4, #8 │ │ str r0, [sp, #72] @ 0x48 │ │ movw r9, #17 │ │ movt r9, #32768 @ 0x8000 │ │ add r0, sp, #232 @ 0xe8 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #232] @ 0xe8 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #236] @ 0xec │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ mov r5, fp │ │ add.w fp, sp, #288 @ 0x120 │ │ - b.n 59abc │ │ + b.n 59ccc │ │ ldr r1, [sp, #20] │ │ ldrd r7, r2, [sp, #216] @ 0xd8 │ │ ldr r6, [sp, #64] @ 0x40 │ │ - b.n 59ae6 │ │ + b.n 59cf6 │ │ mov r7, r5 │ │ mov r8, fp │ │ - b.n 599f8 │ │ + b.n 59c08 │ │ add r6, sp, #288 @ 0x120 │ │ ldr r2, [sp, #48] @ 0x30 │ │ movs r0, #0 │ │ str r0, [sp, #4] │ │ mov r0, r6 │ │ mov r1, r8 │ │ movs r3, #0 │ │ - bl 49e28 │ │ + bl 4a130 │ │ add.w fp, sp, #296 @ 0x128 │ │ ldrd r0, r9, [sp, #288] @ 0x120 │ │ ldmia.w fp, {r4, r5, fp} │ │ cmp r0, #0 │ │ - bne.n 59afa │ │ + bne.n 59d0a │ │ cmp.w r9, #0 │ │ - beq.n 59a74 │ │ + beq.n 59c84 │ │ mov r2, r7 │ │ cmp r4, r7 │ │ it cc │ │ movcc r2, r4 │ │ ldr r0, [sp, #56] @ 0x38 │ │ mov r1, r9 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r7, r4 │ │ mov.w r1, #0 │ │ it cc │ │ movcc r1, #1 │ │ cmp r0, #0 │ │ mov.w r0, #0 │ │ it mi │ │ movmi r0, #1 │ │ it eq │ │ moveq r0, r1 │ │ cmp r0, #0 │ │ - bne.n 599f6 │ │ + bne.n 59c06 │ │ add r0, sp, #288 @ 0x120 │ │ add r1, sp, #192 @ 0xc0 │ │ mov r2, r5 │ │ mov r3, fp │ │ - bl 59eb8 │ │ + bl 5a0c8 │ │ ldrb.w r4, [sp, #292] @ 0x124 │ │ movs r0, #17 │ │ ldr.w r9, [sp, #288] @ 0x120 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r9, r0 │ │ - bne.n 59acc │ │ + bne.n 59cdc │ │ add r6, sp, #288 @ 0x120 │ │ lsls r0, r4, #31 │ │ mov.w r4, #0 │ │ - bne.n 599f8 │ │ - b.n 59a76 │ │ + bne.n 59c08 │ │ + b.n 59c86 │ │ movs r4, #1 │ │ movw r9, #17 │ │ movt r9, #32768 @ 0x8000 │ │ ldr r7, [sp, #68] @ 0x44 │ │ add r0, sp, #232 @ 0xe8 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #232] @ 0xe8 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #236] @ 0xec │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ ldr r6, [sp, #84] @ 0x54 │ │ mov r5, r9 │ │ movw r9, #17 │ │ mov fp, r7 │ │ movt r9, #32768 @ 0x8000 │ │ add r0, sp, #208 @ 0xd0 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #208] @ 0xd0 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #212] @ 0xd4 │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ mov r7, fp │ │ str r6, [sp, #84] @ 0x54 │ │ add.w fp, sp, #288 @ 0x120 │ │ ldr r6, [sp, #64] @ 0x40 │ │ cmp r5, r9 │ │ - bne.n 59b46 │ │ + bne.n 59d56 │ │ add.w sl, sl, #88 @ 0x58 │ │ lsls r0, r4, #31 │ │ - bne.w 592fc │ │ - b.n 59b4c │ │ + bne.w 5950c │ │ + b.n 59d5c │ │ ldr r1, [sp, #24] │ │ ldr r2, [sp, #300] @ 0x12c │ │ ldr r7, [sp, #296] @ 0x128 │ │ ldrb r0, [r1, #2] │ │ ldrh r1, [r1, #0] │ │ str r2, [sp, #84] @ 0x54 │ │ orr.w r0, r1, r0, lsl #16 │ │ str r0, [sp, #72] @ 0x48 │ │ - b.n 59a80 │ │ + b.n 59c90 │ │ ldr r1, [sp, #20] │ │ ldrd r7, r2, [sp, #216] @ 0xd8 │ │ ldrb r0, [r1, #2] │ │ ldrh r1, [r1, #0] │ │ str r2, [sp, #84] @ 0x54 │ │ orr.w r0, r1, r0, lsl #16 │ │ str r0, [sp, #72] @ 0x48 │ │ - b.n 599cc │ │ + b.n 59bdc │ │ str.w r8, [sp, #84] @ 0x54 │ │ - b.n 59b00 │ │ + b.n 59d10 │ │ mov r7, r5 │ │ str.w fp, [sp, #84] @ 0x54 │ │ lsrs r0, r4, #8 │ │ str r0, [sp, #72] @ 0x48 │ │ - b.n 59a80 │ │ + b.n 59c90 │ │ mov r0, r7 │ │ - bl 479e2 │ │ - b.n 59600 │ │ + bl 47c38 │ │ + b.n 59810 │ │ add r0, sp, #104 @ 0x68 │ │ - bl 42fcc │ │ + bl 432d4 │ │ ldr r4, [sp, #264] @ 0x108 │ │ ldr.w fp, [sp, #40] @ 0x28 │ │ cmp.w r4, #2147483648 @ 0x80000000 │ │ - beq.n 59bac │ │ + beq.n 59dbc │ │ ldr r6, [sp, #272] @ 0x110 │ │ ldr r0, [sp, #268] @ 0x10c │ │ str r0, [sp, #80] @ 0x50 │ │ - cbz r6, 59b40 │ │ + cbz r6, 59d50 │ │ ldr r0, [sp, #80] @ 0x50 │ │ adds r7, r0, #4 │ │ ldr.w r0, [r7, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r7, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r7, #12 │ │ subs r6, #1 │ │ - bne.n 59b2c │ │ - cbz r4, 59bac │ │ + bne.n 59d3c │ │ + cbz r4, 59dbc │ │ mov r5, r9 │ │ - b.n 59ba0 │ │ + b.n 59db0 │ │ ldr.w r8, [sp, #72] @ 0x48 │ │ - b.n 59b4e │ │ + b.n 59d5e │ │ mov r5, r9 │ │ add r0, sp, #104 @ 0x68 │ │ - bl 42fcc │ │ + bl 432d4 │ │ ldr r6, [sp, #264] @ 0x108 │ │ ldr.w fp, [sp, #40] @ 0x28 │ │ cmp.w r6, #2147483648 @ 0x80000000 │ │ - bne.n 59b66 │ │ + bne.n 59d76 │ │ ldr.w sl, [sp, #84] @ 0x54 │ │ - b.n 59ba6 │ │ + b.n 59db6 │ │ str.w r8, [sp, #72] @ 0x48 │ │ mov r8, r9 │ │ mov r9, r7 │ │ ldr r7, [sp, #272] @ 0x110 │ │ ldr.w sl, [sp, #84] @ 0x54 │ │ ldr r0, [sp, #268] @ 0x10c │ │ str r5, [sp, #60] @ 0x3c │ │ str r0, [sp, #80] @ 0x50 │ │ - cbz r7, 59b94 │ │ + cbz r7, 59da4 │ │ ldr r0, [sp, #80] @ 0x50 │ │ adds r5, r0, #4 │ │ ldr.w r0, [r5, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #12 │ │ subs r7, #1 │ │ - bne.n 59b80 │ │ + bne.n 59d90 │ │ mov r7, r9 │ │ mov r9, r8 │ │ ldr r5, [sp, #60] @ 0x3c │ │ ldr.w r8, [sp, #72] @ 0x48 │ │ - cbz r6, 59ba6 │ │ + cbz r6, 59db6 │ │ ldr r0, [sp, #80] @ 0x50 │ │ - blx d87c0 │ │ + blx d87d0 │ │ cmp r5, r9 │ │ - bne.w 59df0 │ │ + bne.w 5a000 │ │ ldrd r0, r1, [sp, #92] @ 0x5c │ │ add r2, sp, #256 @ 0x100 │ │ cmp r1, #2 │ │ str.w fp, [sp, #256] @ 0x100 │ │ str r2, [sp, #104] @ 0x68 │ │ - bcs.w 59e32 │ │ + bcs.w 5a042 │ │ ldr.w sl, [fp, #120] @ 0x78 │ │ cmp.w sl, #0 │ │ - beq.w 59e16 │ │ + beq.w 5a026 │ │ ldrd r5, r0, [sp, #88] @ 0x58 │ │ ldr r6, [sp, #96] @ 0x60 │ │ str r0, [sp, #76] @ 0x4c │ │ add.w r0, sl, sl, lsl #1 │ │ ldr.w r4, [fp, #116] @ 0x74 │ │ lsls r0, r0, #4 │ │ str r0, [sp, #80] @ 0x50 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ str r0, [sp, #60] @ 0x3c │ │ - beq.w 59e8c │ │ + beq.w 5a09c │ │ str r6, [sp, #84] @ 0x54 │ │ movs r6, #0 │ │ str r5, [sp, #56] @ 0x38 │ │ mov r5, sl │ │ - b.n 59c42 │ │ + b.n 59e52 │ │ movs r7, #1 │ │ mov r0, r7 │ │ mov r1, r9 │ │ mov r2, fp │ │ add.w r8, r4, #48 @ 0x30 │ │ subs r5, #1 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r1, [sp, #60] @ 0x3c │ │ ldrd r0, ip, [r4] │ │ ldrd r2, r3, [r4, #8] │ │ str r0, [r1, r6] │ │ add.w r0, r1, r6 │ │ add.w r6, r6, #48 @ 0x30 │ │ ldrb.w r1, [r4, #32] │ │ @@ -74524,89 +74620,89 @@ │ │ strb.w r4, [r0, #40] @ 0x28 │ │ mov r4, r8 │ │ strb.w r1, [r0, #32] │ │ strd ip, r2, [r0, #4] │ │ strd r3, fp, [r0, #12] │ │ add.w r0, r0, #20 │ │ stmia.w r0, {r7, fp, lr} │ │ - cbz r5, 59c62 │ │ + cbz r5, 59e72 │ │ ldr r0, [sp, #80] @ 0x50 │ │ cmp r0, r6 │ │ - beq.n 59c62 │ │ + beq.n 59e72 │ │ ldrd r9, fp, [r4, #20] │ │ cmp.w fp, #0 │ │ - beq.n 59bf4 │ │ + beq.n 59e04 │ │ mov r0, fp │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 59e66 │ │ + beq.w 5a076 │ │ mov r7, r0 │ │ - b.n 59bf6 │ │ + b.n 59e06 │ │ movs r0, #0 │ │ movs r1, #4 │ │ add r5, sp, #256 @ 0x100 │ │ add.w r8, sp, #288 @ 0x120 │ │ strd r0, r1, [sp, #264] @ 0x108 │ │ movw r1, #909 @ 0x38d │ │ strd r0, r0, [sp, #256] @ 0x100 │ │ strd r0, r0, [sp, #272] @ 0x110 │ │ strd r0, r1, [sp, #280] @ 0x118 │ │ mov r0, r5 │ │ - bl 58484 │ │ + bl 58694 │ │ ldr r0, [sp, #276] @ 0x114 │ │ cmp r0, #0 │ │ - beq.n 59c80 │ │ + beq.n 59e90 │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r6, #1 │ │ movs r7, #0 │ │ - b.n 59cb0 │ │ + b.n 59ec0 │ │ mla r1, r3, r1, r4 │ │ mla r1, r7, r6, r1 │ │ mov r6, r2 │ │ umull r2, r4, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r4, r3, r7, r4 │ │ mla r7, r3, r7, r4 │ │ mov r3, r2 │ │ lsls r2, r0, #31 │ │ - beq.n 59ca0 │ │ + beq.n 59eb0 │ │ umull r2, r4, r3, r6 │ │ cmp r0, #1 │ │ - bne.n 59c96 │ │ + bne.n 59ea6 │ │ lsrs r0, r2, #2 │ │ - beq.n 59c80 │ │ + beq.n 59e90 │ │ ldr r0, [sp, #84] @ 0x54 │ │ ldr.w fp, [sp, #76] @ 0x4c │ │ cmp r0, #0 │ │ - beq.n 59d76 │ │ + beq.n 59f86 │ │ ldr.w fp, [sp, #76] @ 0x4c │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r0, fp, r0, lsl #3 │ │ str r0, [sp, #72] @ 0x48 │ │ ldr r0, [sp, #60] @ 0x3c │ │ mov r9, fp │ │ adds r0, #28 │ │ str r0, [sp, #68] @ 0x44 │ │ add r0, sp, #104 @ 0x68 │ │ add.w r5, r0, #16 │ │ adds r0, #8 │ │ str r0, [sp, #64] @ 0x40 │ │ - b.n 59d0c │ │ + b.n 59f1c │ │ ldr.w fp, [sp, #84] @ 0x54 │ │ add.w r8, sp, #288 @ 0x120 │ │ movs r2, #24 │ │ mov r1, r8 │ │ mov r0, fp │ │ - bl d53c2 │ │ + bl d51f6 │ │ add.w fp, fp, #24 │ │ add.w r9, r9, #24 │ │ ldr r0, [sp, #72] @ 0x48 │ │ cmp r9, r0 │ │ - beq.n 59d76 │ │ + beq.n 59f86 │ │ mov ip, r9 │ │ ldmia.w ip, {r0, r2, r3, r4, r6, r7} │ │ mov ip, r9 │ │ stmia.w r8, {r0, r2, r3, r4, r6, r7} │ │ ldr r0, [sp, #76] @ 0x4c │ │ str.w fp, [sp, #84] @ 0x54 │ │ str.w fp, [sp, #108] @ 0x6c │ │ @@ -74620,66 +74716,66 @@ │ │ ldr.w r8, [sp, #68] @ 0x44 │ │ ldrb.w r3, [r8, #12] │ │ ldrb.w r2, [r8, #4] │ │ ldr.w r4, [r8], #48 │ │ strd r0, r1, [sp] │ │ mov r0, r5 │ │ mov r1, r4 │ │ - bl 51b84 │ │ + bl 51d94 │ │ subs.w fp, fp, #48 @ 0x30 │ │ - bne.n 59d38 │ │ + bne.n 59f48 │ │ mov r2, r0 │ │ add r0, sp, #256 @ 0x100 │ │ mov r3, r1 │ │ - bl 5882c │ │ + bl 58a3c │ │ cmp r0, #0 │ │ - bne.n 59cec │ │ + bne.n 59efc │ │ add.w r8, sp, #288 @ 0x120 │ │ ldr.w fp, [sp, #84] @ 0x54 │ │ add.w r9, r9, #24 │ │ ldr r0, [sp, #72] @ 0x48 │ │ cmp r9, r0 │ │ - bne.n 59d0c │ │ + bne.n 59f1c │ │ ldr r0, [sp, #76] @ 0x4c │ │ movw r8, #43691 @ 0xaaab │ │ ldrd r5, r7, [sp, #268] @ 0x10c │ │ movw r9, #17 │ │ sub.w r0, fp, r0 │ │ movt r8, #43690 @ 0xaaaa │ │ movt r9, #32768 @ 0x8000 │ │ mov.w r4, r0, lsr #3 │ │ - cbz r7, 59dac │ │ + cbz r7, 59fbc │ │ adds r6, r5, #4 │ │ ldr.w r0, [r6, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #12 │ │ subs r7, #1 │ │ - bne.n 59d98 │ │ + bne.n 59fa8 │ │ ldr r0, [sp, #264] @ 0x108 │ │ mul.w r4, r4, r8 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #60] @ 0x3c │ │ ldr r6, [sp, #56] @ 0x38 │ │ add.w r5, r0, #16 │ │ ldr r0, [r5, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #48 @ 0x30 │ │ subs.w sl, sl, #1 │ │ - bne.n 59dc4 │ │ + bne.n 59fd4 │ │ ldr r0, [sp, #60] @ 0x3c │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #36] @ 0x24 │ │ ldr r1, [sp, #76] @ 0x4c │ │ strd r9, r6, [r0] │ │ strd r1, r4, [r0, #8] │ │ add sp, #316 @ 0x13c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r2, [sp, #36] @ 0x24 │ │ @@ -74687,184 +74783,184 @@ │ │ ldr r0, [sp, #88] @ 0x58 │ │ cmp r0, #0 │ │ strh.w r8, [r2, #5] │ │ strd r7, sl, [r2, #8] │ │ strb r4, [r2, #4] │ │ str r5, [r2, #0] │ │ strb r1, [r2, #7] │ │ - beq.n 59dea │ │ + beq.n 59ffa │ │ ldr r0, [sp, #92] @ 0x5c │ │ - blx d87c0 │ │ + blx d87d0 │ │ add sp, #316 @ 0x13c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add r2, sp, #88 @ 0x58 │ │ ldr r3, [sp, #36] @ 0x24 │ │ ldmia r2, {r0, r1, r2} │ │ strd r1, r2, [r3, #8] │ │ strd r9, r0, [r3] │ │ add sp, #316 @ 0x13c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #112] @ (59e9c ) │ │ + ldr r0, [pc, #112] @ (5a0ac ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ cmp r1, #21 │ │ - bcs.n 59e94 │ │ - bl 5a284 │ │ - b.n 59bbe │ │ - ldr r3, [pc, #116] @ (59eb4 ) │ │ + bcs.n 5a0a4 │ │ + bl 5a494 │ │ + b.n 59dce │ │ + ldr r3, [pc, #116] @ (5a0c4 ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ mov r2, r5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #100] @ (59eb0 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #100] @ (5a0c0 ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ mov r2, r9 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #80] @ (59eac ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #80] @ (5a0bc ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ mov r2, r7 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ movs r0, #1 │ │ mov r1, fp │ │ - bl 3dfa4 │ │ - ldr r0, [pc, #48] @ (59ea0 ) │ │ + bl 3e2ac │ │ + ldr r0, [pc, #48] @ (5a0b0 ) │ │ add r2, sp, #288 @ 0x120 │ │ - ldr r3, [pc, #48] @ (59ea4 ) │ │ - ldr r1, [pc, #48] @ (59ea8 ) │ │ + ldr r3, [pc, #48] @ (5a0b4 ) │ │ + ldr r1, [pc, #48] @ (5a0b8 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ movs r0, #1 │ │ movs r1, #8 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ ldr r1, [sp, #80] @ 0x50 │ │ movs r0, #8 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ add r2, sp, #104 @ 0x68 │ │ - bl 450da │ │ - b.n 59bbe │ │ - lsrs r0, r4, #20 │ │ + bl 453e4 │ │ + b.n 59dce │ │ + lsrs r0, r4, #12 │ │ movs r0, r1 │ │ - bl ffe67e9a │ │ - lsrs r4, r2, #11 │ │ + bl 4580aa │ │ + lsrs r4, r4, #2 │ │ movs r0, r1 │ │ - lsrs r2, r6, #15 │ │ + lsrs r2, r6, #7 │ │ movs r0, r1 │ │ - lsrs r4, r1, #15 │ │ + lsrs r4, r1, #7 │ │ movs r0, r1 │ │ - lsrs r2, r3, #15 │ │ + lsrs r2, r3, #7 │ │ movs r0, r1 │ │ - lsrs r0, r5, #15 │ │ + lsrs r0, r5, #7 │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #60 @ 0x3c │ │ cmp r3, #8 │ │ - bne.w 5a054 │ │ + bne.w 5a264 │ │ mov r4, r0 │ │ ldr r0, [r1, #0] │ │ ldr r5, [r2, #4] │ │ mov r7, r1 │ │ ldr.w r8, [r2] │ │ ldr r0, [r0, #0] │ │ eor.w r9, r5, #2147483648 @ 0x80000000 │ │ - cbz r0, 59ee6 │ │ + cbz r0, 5a0f6 │ │ mov r2, r8 │ │ mov r3, r9 │ │ - bl 5882c │ │ + bl 58a3c │ │ cmp r0, #0 │ │ - beq.w 59fee │ │ + beq.w 5a1fe │ │ ldr r6, [r7, #4] │ │ ldr r0, [r6, #0] │ │ cmp r0, #0 │ │ - beq.w 5a040 │ │ + beq.w 5a250 │ │ movs r0, #8 │ │ mov.w sl, #8 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 5a06a │ │ + beq.w 5a27a │ │ str r5, [r0, #4] │ │ movs r2, #0 │ │ str.w r8, [r0] │ │ mov r5, r0 │ │ ldr r1, [r6, #4] │ │ mov r3, r5 │ │ strd sl, r2, [sp] │ │ add r2, sp, #16 │ │ mov r0, r2 │ │ movs r2, #16 │ │ - bl 49e28 │ │ + bl 4a130 │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrd r0, sl, [sp, #16] │ │ - cbz r0, 59f3a │ │ + cbz r0, 5a14a │ │ add r2, sp, #24 │ │ ldmia r2, {r0, r1, r2} │ │ strd r1, r2, [r4, #8] │ │ strd sl, r0, [r4] │ │ add sp, #60 @ 0x3c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd fp, r0, [sp, #28] │ │ movs r6, #41 @ 0x29 │ │ str r0, [sp, #12] │ │ movs r0, #41 @ 0x29 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 5a072 │ │ - ldr r1, [pc, #300] @ (5a07c ) │ │ + beq.w 5a282 │ │ + ldr r1, [pc, #300] @ (5a28c ) │ │ movs r2, #41 @ 0x29 │ │ mov r5, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ str r6, [sp, #28] │ │ cmp.w sl, #0 │ │ strd r6, r5, [sp, #20] │ │ movw r6, #17 │ │ movt r6, #32768 @ 0x8000 │ │ sub.w r0, r6, #4 │ │ str r0, [sp, #16] │ │ - beq.n 5a000 │ │ + beq.n 5a210 │ │ add r5, sp, #16 │ │ mov r0, r5 │ │ - bl 31e14 │ │ + bl 31ee0 │ │ ldr r2, [sp, #12] │ │ cmp r2, #1 │ │ - bls.n 5a048 │ │ + bls.n 5a258 │ │ ldrh.w r0, [fp] │ │ adds r5, #8 │ │ ldr r7, [r7, #8] │ │ mov r3, r9 │ │ strd r2, r0, [sp, #28] │ │ add r0, sp, #16 │ │ stmia.w r0, {r8, r9, fp} │ │ mov r2, r8 │ │ ldrd r1, r0, [r7] │ │ strd r5, r0, [sp] │ │ add r0, sp, #44 @ 0x2c │ │ - bl 483e0 │ │ + bl 486e8 │ │ ldr r1, [sp, #44] @ 0x2c │ │ ldrb.w r0, [sp, #48] @ 0x30 │ │ cmp r1, r6 │ │ - bne.n 5a00e │ │ + bne.n 5a21e │ │ lsls r0, r0, #31 │ │ - beq.n 5a02c │ │ + beq.n 5a23c │ │ ldr r0, [r7, #8] │ │ mov sl, r6 │ │ ldr r7, [r0, #0] │ │ ldr r6, [r7, #8] │ │ ldr r0, [r7, #0] │ │ cmp r6, r0 │ │ - beq.n 5a038 │ │ + beq.n 5a248 │ │ ldr r0, [r7, #4] │ │ ldmia.w r5, {r1, r2, r3} │ │ add.w r5, r6, r6, lsl #1 │ │ str.w r8, [r0, r5, lsl #3] │ │ add.w r0, r0, r5, lsl #3 │ │ movs r5, #1 │ │ strb r5, [r4, #4] │ │ @@ -74899,133 +74995,133 @@ │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ str r6, [r4, #0] │ │ movs r0, #1 │ │ strb r0, [r4, #4] │ │ add sp, #60 @ 0x3c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r0, r7 │ │ - bl 479e2 │ │ - b.n 59fc2 │ │ - ldr r0, [pc, #72] @ (5a08c ) │ │ + bl 47c38 │ │ + b.n 5a1d2 │ │ + ldr r0, [pc, #72] @ (5a29c ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r3, [pc, #68] @ (5a090 ) │ │ + bl 3fd40 │ │ + ldr r3, [pc, #68] @ (5a2a0 ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #40] @ (5a080 ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #40] @ (5a290 ) │ │ add r2, sp, #16 │ │ - ldr r3, [pc, #40] @ (5a084 ) │ │ - ldr r1, [pc, #44] @ (5a088 ) │ │ + ldr r3, [pc, #40] @ (5a294 ) │ │ + ldr r1, [pc, #44] @ (5a298 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ movs r0, #1 │ │ movs r1, #8 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #41 @ 0x29 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - ldmia r3, {r3, r5, r6, r7} │ │ - vrecpe.u32 d31, d23 │ │ - vtbx.8 d16, {d27}, d30 │ │ + ldmia r1!, {r3, r4, r6, r7} │ │ + vrshr.u32 d31, d7, #5 │ │ + vqshlu.s64 d16, d30, #59 @ 0x3b │ │ movs r0, r1 │ │ - lsrs r4, r1, #8 │ │ + lsrs r4, r1, #32 │ │ movs r0, r1 │ │ - lsrs r2, r1, #12 │ │ + lsrs r2, r1, #4 │ │ movs r0, r1 │ │ - lsrs r6, r3, #7 │ │ + lsls r6, r3, #31 │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #52 @ 0x34 │ │ mov r8, r0 │ │ ldr r0, [sp, #88] @ 0x58 │ │ cmp r0, #8 │ │ - bne.w 5a244 │ │ + bne.w 5a454 │ │ ldr r0, [r1, #0] │ │ mov r5, r1 │ │ cmp r0, #0 │ │ - beq.w 5a22e │ │ + beq.w 5a43e │ │ movs r0, #8 │ │ mov fp, r2 │ │ ldr r4, [r3, #0] │ │ movs r6, #8 │ │ ldr r7, [r3, #4] │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 5a25a │ │ + beq.w 5a46a │ │ ldr r1, [r5, #4] │ │ add.w sl, sp, #8 │ │ movs r2, #0 │ │ mov r5, r0 │ │ strd r6, r2, [sp] │ │ movs r2, #16 │ │ str r4, [r0, #0] │ │ mov r3, r5 │ │ str r7, [r0, #4] │ │ mov r0, sl │ │ - bl 49e28 │ │ + bl 4a130 │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrd r1, r6, [sp, #16] │ │ ldr r5, [sp, #24] │ │ ldrd r2, r0, [sp, #8] │ │ cmp r2, #1 │ │ - bne.n 5a100 │ │ + bne.n 5a310 │ │ stmia.w r8, {r0, r1, r6} │ │ str.w r5, [r8, #12] │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ cmp r0, #0 │ │ - beq.n 5a1a8 │ │ + beq.n 5a3b8 │ │ cmp r1, #8 │ │ - bne.w 5a244 │ │ + bne.w 5a454 │ │ cmp r5, #1 │ │ - bls.w 5a236 │ │ + bls.w 5a446 │ │ ldr.w r9, [r0] │ │ ldr r0, [r0, #4] │ │ ldrh r7, [r6, #0] │ │ eor.w r4, r0, #2147483648 @ 0x80000000 │ │ ldrd r0, fp, [fp] │ │ ldr r0, [r0, #0] │ │ - cbz r0, 5a130 │ │ + cbz r0, 5a340 │ │ mov r2, r9 │ │ mov r3, r4 │ │ - bl 5882c │ │ + bl 58a3c │ │ cmp r0, #0 │ │ - beq.n 5a1fa │ │ + beq.n 5a40a │ │ str r7, [sp, #24] │ │ add.w r2, sl, #8 │ │ strd r6, r5, [sp, #16] │ │ mov r3, r4 │ │ strd r9, r4, [sp, #8] │ │ ldrd r1, r0, [fp] │ │ strd r2, r0, [sp] │ │ add r0, sp, #36 @ 0x24 │ │ mov r2, r9 │ │ - bl 483e0 │ │ + bl 486e8 │ │ ldrb.w r0, [sp, #40] @ 0x28 │ │ movs r3, #17 │ │ ldr r1, [sp, #36] @ 0x24 │ │ movt r3, #32768 @ 0x8000 │ │ cmp r1, r3 │ │ - bne.n 5a1d6 │ │ + bne.n 5a3e6 │ │ lsls r0, r0, #31 │ │ - beq.n 5a210 │ │ + beq.n 5a420 │ │ ldr.w r0, [fp, #8] │ │ ldr.w sl, [r0] │ │ ldr.w fp, [sl, #8] │ │ ldr.w r0, [sl] │ │ cmp fp, r0 │ │ - beq.n 5a220 │ │ + beq.n 5a430 │ │ ldr.w r0, [sl, #4] │ │ add.w r1, fp, fp, lsl #1 │ │ movs r2, #1 │ │ str.w r3, [r8] │ │ strb.w r2, [r8, #4] │ │ str.w r9, [r0, r1, lsl #3] │ │ add.w r0, r0, r1, lsl #3 │ │ @@ -75033,22 +75129,22 @@ │ │ strd r5, r7, [r0, #12] │ │ add.w r0, fp, #1 │ │ str.w r0, [sl, #8] │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #28 │ │ movs r6, #28 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 5a262 │ │ - ldr r1, [pc, #180] @ (5a26c ) │ │ + beq.n 5a472 │ │ + ldr r1, [pc, #180] @ (5a47c ) │ │ movs r2, #28 │ │ mov r5, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #17 │ │ strd r5, r6, [r8, #8] │ │ movt r0, #32768 @ 0x8000 │ │ subs r0, #4 │ │ strd r0, r6, [r8] │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ @@ -75071,181 +75167,181 @@ │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ str.w r3, [r8] │ │ movs r0, #1 │ │ strb.w r0, [r8, #4] │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r0, sl │ │ - bl 479e2 │ │ + bl 47c38 │ │ movs r3, #17 │ │ movt r3, #32768 @ 0x8000 │ │ - b.n 5a178 │ │ - ldr r0, [pc, #76] @ (5a27c ) │ │ + b.n 5a388 │ │ + ldr r0, [pc, #76] @ (5a48c ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r3, [pc, #72] @ (5a280 ) │ │ + bl 3fd40 │ │ + ldr r3, [pc, #72] @ (5a490 ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ mov r2, r5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #40] @ (5a270 ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #40] @ (5a480 ) │ │ add r2, sp, #8 │ │ - ldr r3, [pc, #40] @ (5a274 ) │ │ - ldr r1, [pc, #44] @ (5a278 ) │ │ + ldr r3, [pc, #40] @ (5a484 ) │ │ + ldr r1, [pc, #44] @ (5a488 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ movs r0, #1 │ │ movs r1, #8 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #28 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - ldmia r0!, {r1, r4, r5, r7} │ │ - vrshr.u32 d31, d23, #5 │ │ - vqshlu.s64 q8, q15, #59 @ 0x3b │ │ + stmia r6!, {r1, r5, r7} │ │ + vcvta.s32.f32 d31, d23 │ │ + vrsqrte.u32 q8, q7 │ │ movs r0, r1 │ │ - lsrs r4, r3, #32 │ │ + lsls r4, r3, #24 │ │ movs r0, r1 │ │ - lsrs r4, r3, #4 │ │ + lsls r4, r3, #28 │ │ movs r0, r1 │ │ - lsls r6, r5, #31 │ │ + lsls r6, r5, #23 │ │ movs r0, r1 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #36 @ 0x24 │ │ str r0, [sp, #4] │ │ ldr r0, [r2, #0] │ │ ldr r0, [r0, #108] @ 0x6c │ │ cmp r0, #0 │ │ - beq.n 5a38c │ │ + beq.n 5a59c │ │ add.w r0, r1, r1, lsl #1 │ │ ldr.w r9, [sp, #4] │ │ mov r4, r2 │ │ add.w r6, r9, r0, lsl #3 │ │ add r0, sp, #8 │ │ add.w fp, r0, #8 │ │ add.w r0, r9, #24 │ │ str r6, [sp, #0] │ │ - b.n 5a2ca │ │ + b.n 5a4da │ │ ldr.w sl, [sp, #4] │ │ add r0, sp, #8 │ │ mov r4, r8 │ │ ldmia.w r0, {r1, r2, r3, r5, r6, r7} │ │ stmia.w sl, {r1, r2, r3, r5, r6, r7} │ │ ldr r6, [sp, #0] │ │ add.w r0, r9, #24 │ │ cmp r0, r6 │ │ - beq.n 5a38c │ │ + beq.n 5a59c │ │ ldr r2, [r4, #0] │ │ mov r1, r9 │ │ mov r9, r0 │ │ ldr r0, [r2, #108] @ 0x6c │ │ cmp r0, #0 │ │ - beq.n 5a2c2 │ │ + beq.n 5a4d2 │ │ add.w r0, r0, r0, lsl #1 │ │ ldr.w sl, [r2, #104] @ 0x68 │ │ add.w r7, r1, #8 │ │ add.w r5, r1, #32 │ │ mov.w r8, r0, lsl #4 │ │ ldrb.w r3, [sl, #32] │ │ mov r0, r5 │ │ ldr.w r2, [sl, #28] │ │ mov r1, r7 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 5a30a │ │ + bne.n 5a51a │ │ add.w sl, sl, #48 @ 0x30 │ │ subs.w r8, r8, #48 @ 0x30 │ │ - bne.n 5a2ea │ │ - b.n 5a2c2 │ │ + bne.n 5a4fa │ │ + b.n 5a4d2 │ │ ldrb.w r1, [sl, #40] @ 0x28 │ │ - cbz r1, 5a318 │ │ + cbz r1, 5a528 │ │ uxtb r0, r0 │ │ cmp r0, #1 │ │ - bne.n 5a2c2 │ │ - b.n 5a31e │ │ + bne.n 5a4d2 │ │ + b.n 5a52e │ │ mvns r0, r0 │ │ lsls r0, r0, #24 │ │ - bne.n 5a2c2 │ │ + bne.n 5a4d2 │ │ mov r1, r9 │ │ mov r8, r4 │ │ ldmia.w r1, {r0, r2, r3, r4, r5, r7} │ │ add.w ip, sp, #8 │ │ stmia.w ip, {r0, r2, r3, r4, r5, r7} │ │ mov ip, r9 │ │ sub.w sl, ip, #24 │ │ mov r2, ip │ │ mov r1, sl │ │ ldmia.w r1, {r0, r3, r4, r5, r6, r7} │ │ stmia r2!, {r0, r3, r4, r5, r6, r7} │ │ ldr r0, [sp, #4] │ │ cmp sl, r0 │ │ - beq.n 5a2b0 │ │ + beq.n 5a4c0 │ │ ldr.w r2, [r8] │ │ ldr r1, [r2, #108] @ 0x6c │ │ cmp r1, #0 │ │ - beq.n 5a2b4 │ │ + beq.n 5a4c4 │ │ add.w r0, r1, r1, lsl #1 │ │ ldr r7, [r2, #104] @ 0x68 │ │ sub.w r5, ip, #40 @ 0x28 │ │ lsls r4, r0, #4 │ │ ldrb.w r3, [r7, #32] │ │ mov r0, fp │ │ ldr r2, [r7, #28] │ │ mov r1, r5 │ │ - bl 452a4 │ │ + bl 455ac │ │ lsls r1, r0, #24 │ │ - bne.n 5a374 │ │ + bne.n 5a584 │ │ adds r7, #48 @ 0x30 │ │ subs r4, #48 @ 0x30 │ │ - bne.n 5a35a │ │ - b.n 5a2b4 │ │ + bne.n 5a56a │ │ + b.n 5a4c4 │ │ ldrb.w r1, [r7, #40] @ 0x28 │ │ - cbz r1, 5a382 │ │ + cbz r1, 5a592 │ │ uxtb r0, r0 │ │ cmp r0, #1 │ │ - bne.n 5a2b4 │ │ + bne.n 5a4c4 │ │ movs r0, #255 @ 0xff │ │ mvns r0, r0 │ │ mov ip, sl │ │ lsls r0, r0, #24 │ │ - beq.n 5a330 │ │ - b.n 5a2b4 │ │ + beq.n 5a540 │ │ + b.n 5a4c4 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #60 @ 0x3c │ │ mov r7, r1 │ │ mov r4, r0 │ │ ldrd r1, r0, [r1] │ │ mov sl, r3 │ │ ldr r5, [sp, #96] @ 0x60 │ │ mov r6, r2 │ │ strd r5, r0, [sp] │ │ add r0, sp, #32 │ │ - bl 483e0 │ │ + bl 486e8 │ │ ldr r1, [sp, #32] │ │ movs r2, #17 │ │ ldrb.w r0, [sp, #36] @ 0x24 │ │ movt r2, #32768 @ 0x8000 │ │ cmp r1, r2 │ │ - bne.n 5a3e2 │ │ + bne.n 5a5f2 │ │ lsls r0, r0, #31 │ │ - beq.n 5a400 │ │ + beq.n 5a610 │ │ ldr.w r9, [r7, #8] │ │ ldrd r0, r1, [r9, #48] @ 0x30 │ │ adds r0, #1 │ │ str.w r0, [r9, #48] @ 0x30 │ │ cmp r0, r1 │ │ - bls.n 5a40c │ │ + bls.n 5a61c │ │ movs r0, #0 │ │ str r2, [r4, #0] │ │ strb r0, [r4, #4] │ │ add sp, #60 @ 0x3c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr.w r2, [sp, #37] @ 0x25 │ │ ldr r7, [sp, #44] @ 0x2c │ │ @@ -75260,62 +75356,62 @@ │ │ str r2, [r4, #0] │ │ movs r0, #1 │ │ strb r0, [r4, #4] │ │ add sp, #60 @ 0x3c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr.w r1, [r9, #56] @ 0x38 │ │ cmp r0, r1 │ │ - bls.n 5a460 │ │ + bls.n 5a670 │ │ ldrd r0, r1, [r9, #36] @ 0x24 │ │ add.w ip, sp, #16 │ │ ldmia.w r5, {r2, r3, r7} │ │ strd r6, sl, [sp, #8] │ │ stmia.w ip, {r2, r3, r7} │ │ - cbz r1, 5a46c │ │ + cbz r1, 5a67c │ │ add r2, sp, #8 │ │ add.w r1, r1, r1, lsl #1 │ │ add.w r8, r0, #28 │ │ add.w r7, r2, #8 │ │ mov.w fp, r1, lsl #4 │ │ movs r0, #0 │ │ movs r1, #0 │ │ ldrb.w r3, [r8, #12] │ │ ldrb.w r2, [r8, #4] │ │ ldr.w r5, [r8], #48 │ │ strd r0, r1, [sp] │ │ mov r0, r7 │ │ mov r1, r5 │ │ - bl 51b84 │ │ + bl 51d94 │ │ subs.w fp, fp, #48 @ 0x30 │ │ - bne.n 5a440 │ │ - b.n 5a470 │ │ + bne.n 5a650 │ │ + b.n 5a680 │ │ movs r0, #1 │ │ str r2, [r4, #0] │ │ strb r0, [r4, #4] │ │ add sp, #60 @ 0x3c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #0 │ │ movs r1, #0 │ │ mov r2, r0 │ │ mov r0, r9 │ │ mov r3, r1 │ │ - bl 5882c │ │ - cbz r0, 5a49e │ │ + bl 58a3c │ │ + cbz r0, 5a6ae │ │ ldr r0, [sp, #96] @ 0x60 │ │ str r6, [sp, #32] │ │ ldmia.w r0, {r1, r2, r3} │ │ ldr.w r0, [r9, #44] @ 0x2c │ │ strd r2, r3, [sp, #44] @ 0x2c │ │ mov r2, r6 │ │ strd sl, r1, [sp, #36] @ 0x24 │ │ add r1, sp, #32 │ │ mov r3, sl │ │ adds r1, #8 │ │ str r1, [sp, #0] │ │ - bl 588fc │ │ + bl 58b0c │ │ movs r2, #17 │ │ movs r0, #1 │ │ movt r2, #32768 @ 0x8000 │ │ str r2, [r4, #0] │ │ strb r0, [r4, #4] │ │ add sp, #60 @ 0x3c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ @@ -75334,310 +75430,310 @@ │ │ movs r0, #0 │ │ ldrb r3, [r7, #12] │ │ ldrb r2, [r7, #4] │ │ ldr.w r4, [r7], #48 │ │ strd r0, r1, [sp] │ │ mov r0, r5 │ │ mov r1, r4 │ │ - bl 51b84 │ │ + bl 51d94 │ │ subs r6, #48 @ 0x30 │ │ - bne.n 5a4ce │ │ + bne.n 5a6de │ │ add sp, #12 │ │ pop {r4, r5, r6, r7, pc} │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #12 │ │ mov r4, r0 │ │ - cbz r3, 5a510 │ │ - cbz r1, 5a524 │ │ + cbz r3, 5a720 │ │ + cbz r1, 5a734 │ │ cmp.w r2, #4294967295 @ 0xffffffff │ │ - ble.n 5a520 │ │ - cbz r2, 5a53e │ │ + ble.n 5a730 │ │ + cbz r2, 5a74e │ │ mov r0, r2 │ │ mov r7, r1 │ │ mov r6, r2 │ │ - blx d87f0 │ │ - cbz r0, 5a574 │ │ + blx d8810 │ │ + cbz r0, 5a784 │ │ mov r5, r0 │ │ mov r2, r6 │ │ mov r1, r7 │ │ - b.n 5a540 │ │ - cbz r1, 5a524 │ │ + b.n 5a750 │ │ + cbz r1, 5a734 │ │ mov r0, sp │ │ - bl 3e320 │ │ + bl 3e628 │ │ ldr r5, [sp, #8] │ │ cmp.w r5, #4294967295 @ 0xffffffff │ │ - bgt.n 5a52e │ │ - bl 3e03c │ │ + bgt.n 5a73e │ │ + bl 3e344 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str r0, [r4, #0] │ │ add sp, #12 │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r6, [sp, #4] │ │ - cbz r5, 5a552 │ │ + cbz r5, 5a762 │ │ mov r0, r5 │ │ - blx d87f0 │ │ - cbz r0, 5a57c │ │ + blx d8810 │ │ + cbz r0, 5a78c │ │ mov r7, r0 │ │ - b.n 5a554 │ │ + b.n 5a764 │ │ movs r5, #1 │ │ mov r0, r5 │ │ mov r6, r2 │ │ - bl d53c6 │ │ + bl d52ea │ │ strd r6, r5, [r4] │ │ str r6, [r4, #8] │ │ add sp, #12 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r7, #1 │ │ mov r0, r7 │ │ mov r1, r6 │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r0, [sp, #0] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ strd r5, r7, [r4] │ │ str r5, [r4, #8] │ │ add sp, #12 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #1 │ │ mov r1, r6 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #4 │ │ mov r8, r0 │ │ mov r5, r2 │ │ ldr.w r2, [r8, #8] │ │ ldr r0, [r0, #0] │ │ cmp r0, r2 │ │ - beq.w 5a6fc │ │ + beq.w 5a90c │ │ ldr.w r0, [r8, #4] │ │ movs r3, #34 @ 0x22 │ │ adds r6, r2, #1 │ │ str.w r6, [r8, #8] │ │ movw ip, #30044 @ 0x755c │ │ mov.w lr, #92 @ 0x5c │ │ strb r3, [r0, r2] │ │ movt ip, #12336 @ 0x3030 │ │ - ldr r4, [pc, #400] @ (5a748 ) │ │ + ldr r4, [pc, #400] @ (5a958 ) │ │ add r4, pc │ │ movs r0, #0 │ │ cmp r5, r0 │ │ - beq.w 5a6c2 │ │ + beq.w 5a8d2 │ │ ldrb.w sl, [r1, r0] │ │ mov r7, r0 │ │ adds r0, #1 │ │ ldrb.w fp, [r4, sl] │ │ cmp.w fp, #0 │ │ - beq.n 5a5ba │ │ - cbz r7, 5a600 │ │ + beq.n 5a7ca │ │ + cbz r7, 5a810 │ │ ldr.w r0, [r8] │ │ subs r0, r0, r6 │ │ cmp r7, r0 │ │ - bhi.n 5a664 │ │ + bhi.n 5a874 │ │ ldr.w r0, [r8, #4] │ │ mov r2, r7 │ │ mov r9, r1 │ │ add r0, r6 │ │ - bl d53c6 │ │ + bl d52ea │ │ movw ip, #30044 @ 0x755c │ │ add r6, r7 │ │ mov r1, r9 │ │ movt ip, #12336 @ 0x3030 │ │ mov.w lr, #92 @ 0x5c │ │ str.w r6, [r8, #8] │ │ mvns r0, r7 │ │ add r5, r0 │ │ adds r0, r1, r7 │ │ cmp.w fp, #117 @ 0x75 │ │ add.w r1, r0, #1 │ │ - bne.n 5a644 │ │ - ldr r0, [pc, #312] @ (5a74c ) │ │ + bne.n 5a854 │ │ + ldr r0, [pc, #312] @ (5a95c ) │ │ and.w r3, sl, #15 │ │ ldr.w r2, [r8] │ │ add r0, pc │ │ ldrb.w r9, [r0, r3] │ │ mov.w r3, sl, lsr #4 │ │ ldrb r7, [r0, r3] │ │ subs r0, r2, r6 │ │ cmp r0, #5 │ │ - bls.n 5a67e │ │ + bls.n 5a88e │ │ ldr.w r0, [r8, #4] │ │ str.w ip, [r0, r6] │ │ add r0, r6 │ │ adds r6, #6 │ │ strb.w r9, [r0, #5] │ │ strb r7, [r0, #4] │ │ str.w r6, [r8, #8] │ │ - b.n 5a5b8 │ │ + b.n 5a7c8 │ │ ldr.w r0, [r8] │ │ subs r0, r0, r6 │ │ cmp r0, #1 │ │ - bls.n 5a6a0 │ │ + bls.n 5a8b0 │ │ ldr.w r0, [r8, #4] │ │ strb.w lr, [r0, r6] │ │ add r0, r6 │ │ adds r6, #2 │ │ strb.w fp, [r0, #1] │ │ str.w r6, [r8, #8] │ │ - b.n 5a5b8 │ │ + b.n 5a7c8 │ │ movs r0, #1 │ │ mov r9, r1 │ │ str r0, [sp, #0] │ │ mov r0, r8 │ │ mov r1, r6 │ │ mov r2, r7 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w r6, [r8, #8] │ │ mov r1, r9 │ │ - b.n 5a5de │ │ + b.n 5a7ee │ │ movs r0, #1 │ │ mov sl, r1 │ │ str r0, [sp, #0] │ │ mov r1, r6 │ │ mov r0, r8 │ │ movs r2, #6 │ │ movs r3, #1 │ │ mov r6, ip │ │ mov fp, lr │ │ - bl 4eddc │ │ + bl 4efec │ │ mov ip, r6 │ │ ldr.w r6, [r8, #8] │ │ mov lr, fp │ │ mov r1, sl │ │ - b.n 5a62c │ │ + b.n 5a83c │ │ movs r0, #1 │ │ mov r9, r1 │ │ str r0, [sp, #0] │ │ mov r1, r6 │ │ mov r0, r8 │ │ movs r2, #2 │ │ movs r3, #1 │ │ mov r6, ip │ │ mov r7, lr │ │ - bl 4eddc │ │ + bl 4efec │ │ mov ip, r6 │ │ ldr.w r6, [r8, #8] │ │ mov lr, r7 │ │ mov r1, r9 │ │ - b.n 5a64e │ │ - cbz r5, 5a6e0 │ │ + b.n 5a85e │ │ + cbz r5, 5a8f0 │ │ ldr.w r0, [r8] │ │ subs r0, r0, r6 │ │ cmp r5, r0 │ │ - bhi.n 5a72c │ │ + bhi.n 5a93c │ │ ldr.w r0, [r8, #4] │ │ mov r2, r5 │ │ add r0, r6 │ │ - bl d53c6 │ │ + bl d52ea │ │ add r6, r5 │ │ str.w r6, [r8, #8] │ │ ldr.w r0, [r8] │ │ cmp r0, r6 │ │ - beq.n 5a716 │ │ + beq.n 5a926 │ │ ldr.w r0, [r8, #4] │ │ movs r1, #34 @ 0x22 │ │ strb r1, [r0, r6] │ │ adds r0, r6, #1 │ │ str.w r0, [r8, #8] │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #1 │ │ mov r4, r1 │ │ str r0, [sp, #0] │ │ mov r1, r2 │ │ mov r0, r8 │ │ movs r2, #1 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w r2, [r8, #8] │ │ mov r1, r4 │ │ - b.n 5a59a │ │ + b.n 5a7aa │ │ movs r0, #1 │ │ mov r1, r6 │ │ str r0, [sp, #0] │ │ mov r0, r8 │ │ movs r2, #1 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w r6, [r8, #8] │ │ - b.n 5a6e8 │ │ + b.n 5a8f8 │ │ movs r0, #1 │ │ mov r4, r1 │ │ str r0, [sp, #0] │ │ mov r0, r8 │ │ mov r1, r6 │ │ mov r2, r5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w r6, [r8, #8] │ │ mov r1, r4 │ │ - b.n 5a6ce │ │ + b.n 5a8de │ │ nop │ │ - ldmia r6!, {r0, r1, r4, r7} │ │ - vrsra.u64 q12, q9, #5 │ │ + ldmia r4!, {r1, r7} │ │ + vcvtn.u32.f32 q12, q9 │ │ vtbl.8 d30, {d11-d12}, d29 │ │ blx lr │ │ sub sp, #8 │ │ ldr r7, [r0, #0] │ │ mov sl, r3 │ │ ldrb r6, [r0, #4] │ │ ldr r3, [r7, #0] │ │ cmp r6, #1 │ │ - beq.n 5a776 │ │ + beq.n 5a986 │ │ ldr r5, [r3, #8] │ │ ldr r6, [r3, #0] │ │ cmp r6, r5 │ │ - beq.n 5a7f4 │ │ + beq.n 5aa04 │ │ ldr r6, [r3, #4] │ │ movs r4, #44 @ 0x2c │ │ strb r4, [r6, r5] │ │ adds r6, r5, #1 │ │ str r6, [r3, #8] │ │ ldr r3, [r7, #0] │ │ movs r6, #2 │ │ strb r6, [r0, #4] │ │ mov r0, r3 │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr r5, [r7, #0] │ │ ldr r1, [r5, #8] │ │ ldr r0, [r5, #0] │ │ cmp r0, r1 │ │ - beq.n 5a7e2 │ │ + beq.n 5a9f2 │ │ ldr r0, [r5, #4] │ │ movs r2, #58 @ 0x3a │ │ strb r2, [r0, r1] │ │ adds r0, r1, #1 │ │ str r0, [r5, #8] │ │ movs.w r0, sl, lsl #31 │ │ ldr r5, [r7, #0] │ │ - beq.n 5a7bc │ │ + beq.n 5a9cc │ │ ldr r0, [r5, #0] │ │ ldr r1, [r5, #8] │ │ subs r0, r0, r1 │ │ cmp r0, #3 │ │ - bls.n 5a818 │ │ + bls.n 5aa28 │ │ ldr r0, [r5, #4] │ │ movw r2, #29300 @ 0x7274 │ │ movt r2, #25973 @ 0x6575 │ │ str r2, [r0, r1] │ │ adds r0, r1, #4 │ │ str r0, [r5, #8] │ │ add sp, #8 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ ldr r0, [r5, #0] │ │ ldr r1, [r5, #8] │ │ subs r0, r0, r1 │ │ cmp r0, #4 │ │ - bls.n 5a82a │ │ + bls.n 5aa3a │ │ ldr r0, [r5, #4] │ │ movw r2, #24934 @ 0x6166 │ │ movt r2, #29548 @ 0x736c │ │ str r2, [r0, r1] │ │ add r0, r1 │ │ movs r2, #101 @ 0x65 │ │ strb r2, [r0, #4] │ │ @@ -75646,186 +75742,186 @@ │ │ add sp, #8 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r5, #8] │ │ - b.n 5a78a │ │ + b.n 5a99a │ │ movs r6, #1 │ │ mov r8, r0 │ │ str r6, [sp, #0] │ │ mov r9, r1 │ │ mov r1, r5 │ │ mov r5, r2 │ │ mov r6, r3 │ │ mov r0, r3 │ │ movs r2, #1 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ mov r2, r5 │ │ ldr r5, [r6, #8] │ │ mov r3, r6 │ │ mov r0, r8 │ │ mov r1, r9 │ │ - b.n 5a76a │ │ + b.n 5a97a │ │ movs r0, #1 │ │ movs r2, #4 │ │ str r0, [sp, #0] │ │ mov r0, r5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r5, #8] │ │ - b.n 5a7a6 │ │ + b.n 5a9b6 │ │ movs r0, #1 │ │ movs r2, #5 │ │ str r0, [sp, #0] │ │ mov r0, r5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r5, #8] │ │ - b.n 5a7c6 │ │ + b.n 5a9d6 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ sub sp, #8 │ │ ldr r7, [r0, #0] │ │ mov sl, r3 │ │ ldrb r6, [r0, #4] │ │ ldr r3, [r7, #0] │ │ cmp r6, #1 │ │ - beq.n 5a862 │ │ + beq.n 5aa72 │ │ ldr r5, [r3, #8] │ │ ldr r6, [r3, #0] │ │ cmp r6, r5 │ │ - beq.n 5a8cc │ │ + beq.n 5aadc │ │ ldr r6, [r3, #4] │ │ movs r4, #44 @ 0x2c │ │ strb r4, [r6, r5] │ │ adds r6, r5, #1 │ │ str r6, [r3, #8] │ │ ldr r3, [r7, #0] │ │ movs r6, #2 │ │ strb r6, [r0, #4] │ │ mov r0, r3 │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr r5, [r7, #0] │ │ ldr r1, [r5, #8] │ │ ldr r0, [r5, #0] │ │ cmp r0, r1 │ │ - beq.n 5a8ba │ │ + beq.n 5aaca │ │ ldr r0, [r5, #4] │ │ movs r2, #58 @ 0x3a │ │ ldr.w r3, [sl] │ │ strb r2, [r0, r1] │ │ adds r0, r1, #1 │ │ cmp.w r3, #2147483648 @ 0x80000000 │ │ str r0, [r5, #8] │ │ ldr r0, [r7, #0] │ │ - bne.n 5a8ac │ │ + bne.n 5aabc │ │ ldr r2, [r0, #0] │ │ ldr r1, [r0, #8] │ │ subs r2, r2, r1 │ │ cmp r2, #3 │ │ - bls.n 5a8f0 │ │ + bls.n 5ab00 │ │ ldr r2, [r0, #4] │ │ movw r3, #30062 @ 0x756e │ │ movt r3, #27756 @ 0x6c6c │ │ str r3, [r2, r1] │ │ adds r1, #4 │ │ str r1, [r0, #8] │ │ add sp, #8 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ ldrd r1, r2, [sl, #4] │ │ add sp, #8 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ - b.w 5a584 │ │ + b.w 5a794 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r5, #8] │ │ - b.n 5a876 │ │ + b.n 5aa86 │ │ movs r6, #1 │ │ mov r8, r0 │ │ str r6, [sp, #0] │ │ mov r9, r1 │ │ mov r1, r5 │ │ mov r5, r2 │ │ mov r6, r3 │ │ mov r0, r3 │ │ movs r2, #1 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ mov r2, r5 │ │ ldr r5, [r6, #8] │ │ mov r3, r6 │ │ mov r0, r8 │ │ mov r1, r9 │ │ - b.n 5a856 │ │ + b.n 5aa66 │ │ movs r2, #1 │ │ movs r3, #1 │ │ str r2, [sp, #0] │ │ movs r2, #4 │ │ mov r4, r0 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ mov r0, r4 │ │ - b.n 5a896 │ │ + b.n 5aaa6 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #68 @ 0x44 │ │ movs r7, #0 │ │ movs r3, #8 │ │ cmp r2, #0 │ │ str r7, [sp, #64] @ 0x40 │ │ strd r7, r3, [sp, #56] @ 0x38 │ │ - beq.w 5afc2 │ │ + beq.w 5b1d2 │ │ str r0, [sp, #24] │ │ rsb r0, r2, r2, lsl #3 │ │ add.w sl, r1, #12 │ │ mov.w fp, #2 │ │ add.w r3, r1, r0, lsl #2 │ │ movs r6, #8 │ │ movs r0, #0 │ │ str r3, [sp, #40] @ 0x28 │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n 5a94e │ │ - ldr r1, [pc, #256] @ (5aa38 ) │ │ + b.n 5ab5e │ │ + ldr r1, [pc, #256] @ (5ac48 ) │ │ add r1, pc │ │ ldr.w r0, [r1, r0, lsl #2] │ │ add fp, r0 │ │ add.w sl, sl, #28 │ │ add.w r0, r9, #28 │ │ cmp r0, r3 │ │ - beq.w 5afba │ │ + beq.w 5b1ca │ │ mov r9, sl │ │ ldr.w r0, [r9, #-12]! │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 5af9c │ │ + beq.w 5b1ac │ │ ldrd r4, r0, [sl, #-8] │ │ str r0, [sp, #52] @ 0x34 │ │ ldrd r1, r0, [sl] │ │ subs.w r7, r1, #2147483648 @ 0x80000000 │ │ it ne │ │ movne r7, r0 │ │ ldrb.w r2, [sl, #12] │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ str r2, [sp, #44] @ 0x2c │ │ - bne.n 5a982 │ │ + bne.n 5ab92 │ │ movs r5, #0 │ │ mov.w r8, #0 │ │ - b.n 5af38 │ │ + b.n 5b148 │ │ ldr.w r1, [sl, #8] │ │ cmp r1, #17 │ │ - bcs.n 5aa3c │ │ + bcs.n 5ac4c │ │ cmp r1, #8 │ │ str r6, [sp, #28] │ │ - bls.w 5ae06 │ │ + bls.w 5b016 │ │ ldr r2, [r0, #0] │ │ movw r3, #14777 @ 0x39b9 │ │ ldr.w lr, [r0, #4] │ │ add r0, r1 │ │ movt r3, #59970 @ 0xea42 │ │ eors r2, r3 │ │ ldr.w r7, [r0, #-8] │ │ @@ -75867,33 +75963,33 @@ │ │ movt r7, #40503 @ 0x9e37 │ │ adc.w r0, r0, ip │ │ eor.w r1, r1, r0, lsr #5 │ │ umull r2, r3, r1, r7 │ │ mla r1, r1, r6, r3 │ │ mla r1, r0, r7, r1 │ │ eor.w r0, r1, r2 │ │ - b.n 5af34 │ │ - ldrsh r0, [r6, r3] │ │ + b.n 5b144 │ │ + ldrb r0, [r4, r3] │ │ vtbl.8 d18, {d28-d29}, d1 │ │ - bcs.w 5ae90 │ │ + bcs.w 5b0a0 │ │ movw r2, #51847 @ 0xca87 │ │ movw r5, #31153 @ 0x79b1 │ │ movt r2, #34283 @ 0x85eb │ │ movt r5, #40503 @ 0x9e37 │ │ umull ip, r2, r1, r2 │ │ cmp r1, #33 @ 0x21 │ │ str r4, [sp, #20] │ │ mla r2, r1, r5, r2 │ │ str.w ip, [sp, #36] @ 0x24 │ │ strd r6, r2, [sp, #28] │ │ - bcc.w 5ad0a │ │ + bcc.w 5af1a │ │ cmp r1, #64 @ 0x40 │ │ - bls.w 5ac30 │ │ + bls.w 5ae40 │ │ cmp r1, #96 @ 0x60 │ │ - bls.n 5ab52 │ │ + bls.n 5ad62 │ │ adds r2, r7, r1 │ │ movw r6, #20874 @ 0x518a │ │ movt r6, #19424 @ 0x4be0 │ │ ldr.w ip, [r0, #48] @ 0x30 │ │ ldr.w r3, [r2, #-64] │ │ ldr.w r5, [r2, #-56] │ │ eors r3, r6 │ │ @@ -76174,18 +76270,18 @@ │ │ umull r2, r3, r1, r7 │ │ mla r1, r1, r6, r3 │ │ ldr r6, [sp, #28] │ │ mla r1, r0, r7, r1 │ │ ldr r7, [sp, #52] @ 0x34 │ │ eor.w r0, r1, r2 │ │ cmp.w r7, #4294967295 @ 0xffffffff │ │ - ble.w 5afb6 │ │ - b.n 5af40 │ │ + ble.w 5b1c6 │ │ + b.n 5b150 │ │ cmp r1, #3 │ │ - bls.n 5aea8 │ │ + bls.n 5b0b8 │ │ adds r2, r0, r1 │ │ movw r3, #45428 @ 0xb174 │ │ ldr r0, [r0, #0] │ │ movt r3, #51002 @ 0xc73a │ │ ldr.w r2, [r2, #-4] │ │ movw ip, #7269 @ 0x1c65 │ │ eors r0, r3 │ │ @@ -76218,26 +76314,26 @@ │ │ adc.w r3, r8, #0 │ │ eors r0, r3 │ │ mla r3, r0, r7, r1 │ │ lsrs r1, r2, #28 │ │ orr.w r1, r1, r3, lsl #4 │ │ eor.w r0, r1, r2 │ │ eor.w r1, r3, r3, lsr #28 │ │ - b.n 5af34 │ │ + b.n 5b144 │ │ cmp r1, #241 @ 0xf1 │ │ - bcs.n 5af14 │ │ - ldr r2, [pc, #348] @ (5aff4 ) │ │ + bcs.n 5b124 │ │ + ldr r2, [pc, #348] @ (5b204 ) │ │ movs r3, #0 │ │ mov.w r8, #0 │ │ add r2, pc │ │ str r2, [sp, #0] │ │ movs r2, #0 │ │ - bl 996ec │ │ - b.n 5af1c │ │ - cbz r1, 5af20 │ │ + bl 996f8 │ │ + b.n 5b12c │ │ + cbz r1, 5b130 │ │ lsrs r2, r1, #1 │ │ ldrb r3, [r0, #0] │ │ ldrb r2, [r0, r2] │ │ add r0, r1 │ │ movw r6, #31225 @ 0x79f9 │ │ ldrb.w r0, [r0, #-1] │ │ movw r7, #26513 @ 0x6791 │ │ @@ -76261,47 +76357,47 @@ │ │ orr.w r2, r2, r0, lsl #3 │ │ eor.w r0, r0, r0, lsr #29 │ │ eors r1, r2 │ │ umull r2, r3, r1, r6 │ │ mla r1, r1, r7, r3 │ │ mla r1, r0, r6, r1 │ │ eor.w r0, r1, r2 │ │ - b.n 5af30 │ │ - bl 98f20 │ │ + b.n 5b140 │ │ + bl 98f2c │ │ mov.w r8, #0 │ │ movs r5, #1 │ │ - b.n 5af38 │ │ + b.n 5b148 │ │ movw r1, #32773 @ 0x8005 │ │ movw r0, #38082 @ 0x94c2 │ │ movt r1, #11526 @ 0x2d06 │ │ movt r0, #14547 @ 0x38d3 │ │ mov.w r8, #0 │ │ movs r5, #1 │ │ ldr r6, [sp, #28] │ │ ldr r7, [sp, #52] @ 0x34 │ │ cmp.w r7, #4294967295 @ 0xffffffff │ │ - ble.n 5afb6 │ │ + ble.n 5b1c6 │ │ str r1, [sp, #52] @ 0x34 │ │ strd r8, r0, [sp, #32] │ │ - cbz r7, 5af56 │ │ + cbz r7, 5b166 │ │ mov r0, r7 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 5afe4 │ │ + beq.n 5b1f4 │ │ mov r8, r0 │ │ - b.n 5af5a │ │ + b.n 5b16a │ │ mov.w r8, #1 │ │ mov r0, r8 │ │ mov r1, r4 │ │ mov r2, r7 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r1, [sp, #48] @ 0x30 │ │ ldr r0, [sp, #56] @ 0x38 │ │ cmp r1, r0 │ │ - beq.n 5afaa │ │ + beq.n 5b1ba │ │ add.w r0, r1, r1, lsl #2 │ │ ldr r2, [sp, #44] @ 0x2c │ │ adds r1, #1 │ │ str r1, [sp, #48] @ 0x30 │ │ str.w r5, [r6, r0, lsl #3] │ │ add.w r0, r6, r0, lsl #3 │ │ add.w r3, r0, #12 │ │ @@ -76313,86 +76409,86 @@ │ │ ldr r2, [sp, #52] @ 0x34 │ │ strd r7, fp, [r0, #24] │ │ stmia.w r3, {r2, r7, r8} │ │ ldr r3, [sp, #40] @ 0x28 │ │ str r1, [sp, #64] @ 0x40 │ │ ldrb.w r0, [r9, #24] │ │ cmp r0, #5 │ │ - bls.w 5a936 │ │ + bls.w 5ab46 │ │ movs r0, #3 │ │ - b.n 5a93e │ │ + b.n 5ab4e │ │ add r0, sp, #56 @ 0x38 │ │ - bl 4783a │ │ + bl 47e4a │ │ ldr r1, [sp, #48] @ 0x30 │ │ ldr r6, [sp, #60] @ 0x3c │ │ - b.n 5af6c │ │ - bl 3e03c │ │ + b.n 5b17c │ │ + bl 3e344 │ │ ldr r1, [sp, #48] @ 0x30 │ │ ldr r0, [sp, #24] │ │ cmp r1, #2 │ │ - bcs.n 5afd4 │ │ + bcs.n 5b1e4 │ │ ldrd r3, r1, [sp, #56] @ 0x38 │ │ ldr r2, [sp, #64] @ 0x40 │ │ strd r3, r1, [r0] │ │ str r2, [r0, #8] │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r0, r6 │ │ cmp r1, #21 │ │ - bcs.n 5afec │ │ + bcs.n 5b1fc │ │ ldr r1, [sp, #48] @ 0x30 │ │ - bl 5aff8 │ │ + bl 5b208 │ │ ldr r0, [sp, #24] │ │ - b.n 5afc2 │ │ + b.n 5b1d2 │ │ movs r0, #1 │ │ mov r1, r7 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ ldr r1, [sp, #48] @ 0x30 │ │ - bl 44238 │ │ - b.n 5afe0 │ │ - cmp r0, #224 @ 0xe0 │ │ + bl 433da │ │ + b.n 5b1f0 │ │ + movs r6, #208 @ 0xd0 │ │ vtbl.8 d30, {d12-d13}, d29 │ │ - ldr r7, [pc, #960] @ (5b3bc ) │ │ + ldr r7, [pc, #960] @ (5b5cc ) │ │ sub sp, #52 @ 0x34 │ │ mov r7, r0 │ │ add.w r0, r1, r1, lsl #2 │ │ mov.w fp, #0 │ │ str r7, [sp, #12] │ │ add.w r5, r7, r0, lsl #3 │ │ add.w r0, r7, #40 @ 0x28 │ │ str r5, [sp, #0] │ │ - b.n 5b03e │ │ + b.n 5b24e │ │ ldr r0, [sp, #12] │ │ add r1, sp, #32 │ │ ldmia.w r1, {r2, r3, r5, r6, r7} │ │ stmia r0!, {r2, r3, r5, r6, r7} │ │ add r2, sp, #16 │ │ ldmia r2, {r0, r1, r2} │ │ ldmia.w sp, {r5, r6, fp} │ │ strd sl, r8, [r9, #-20] │ │ stmdb r9, {r0, r1, r2} │ │ add.w r0, r6, #40 @ 0x28 │ │ add.w fp, fp, #40 @ 0x28 │ │ mov r7, r6 │ │ cmp r0, r5 │ │ - beq.n 5b0c8 │ │ + beq.n 5b2d8 │ │ ldrd sl, r8, [r7, #60] @ 0x3c │ │ mov r6, r0 │ │ ldrd r1, r4, [r7, #20] │ │ cmp r8, r4 │ │ mov r2, r4 │ │ mov r0, sl │ │ it cc │ │ movcc r2, r8 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ subeq.w r0, r8, r4 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 5b030 │ │ + bgt.n 5b240 │ │ str r6, [sp, #4] │ │ mov r1, r6 │ │ ldmia.w r1, {r0, r2, r3, r4, r5} │ │ add.w ip, sp, #32 │ │ stmia.w ip, {r0, r2, r3, r4, r5} │ │ add.w r2, r7, #68 @ 0x44 │ │ add r3, sp, #16 │ │ @@ -76405,59 +76501,59 @@ │ │ add.w r9, r0, #40 @ 0x28 │ │ mov r1, r0 │ │ ldmia r1!, {r3, r4, r5, r6, r7} │ │ mov r2, r9 │ │ stmia r2!, {r3, r4, r5, r6, r7} │ │ ldmia.w r1, {r3, r4, r5, r6, r7} │ │ stmia r2!, {r3, r4, r5, r6, r7} │ │ - beq.n 5b016 │ │ + beq.n 5b226 │ │ ldrd r1, r4, [r0, #-20] │ │ mov r0, sl │ │ mov r2, r4 │ │ cmp r8, r4 │ │ it cc │ │ movcc r2, r8 │ │ - blx d8860 │ │ + blx d8870 │ │ sub.w fp, fp, #40 @ 0x28 │ │ cmp r0, #0 │ │ it eq │ │ subeq.w r0, r8, r4 │ │ cmp r0, #0 │ │ - bmi.n 5b082 │ │ + bmi.n 5b292 │ │ ldr r0, [sp, #12] │ │ add r0, fp │ │ adds r0, #40 @ 0x28 │ │ - b.n 5b018 │ │ + b.n 5b228 │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - bmi.n 5b07a │ │ + bmi.n 5b28a │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #132 @ 0x84 │ │ mov fp, r1 │ │ mov r9, r0 │ │ ldrd r8, sl, [r1, #4] │ │ - bl 5b98c │ │ + bl 5bb9c │ │ cmp r0, #0 │ │ - beq.w 5b786 │ │ - ldr r1, [pc, #868] @ (5b450 ) │ │ + beq.w 5b996 │ │ + ldr r1, [pc, #868] @ (5b660 ) │ │ add.w ip, sp, #112 @ 0x70 │ │ ldmia.w r0, {r2, r3, r5, r6} │ │ add r1, pc │ │ adds r4, r2, #1 │ │ adc.w r7, r3, #0 │ │ cmp.w sl, #0 │ │ strd r4, r7, [r0] │ │ ldrd r0, r7, [r1] │ │ ldrd r4, r1, [r1, #8] │ │ stmia.w ip, {r2, r3, r5, r6} │ │ movw r3, #14 │ │ movt r3, #32768 @ 0x8000 │ │ strd r4, r1, [sp, #104] @ 0x68 │ │ strd r0, r7, [sp, #96] @ 0x60 │ │ - bne.n 5b134 │ │ + bne.n 5b344 │ │ ldmia.w fp, {r0, r1, r2} │ │ adds r3, #3 │ │ strd r1, r2, [r9, #8] │ │ strd r3, r0, [r9] │ │ add sp, #132 @ 0x84 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add r2, sp, #64 @ 0x40 │ │ @@ -76469,162 +76565,162 @@ │ │ add.w r2, r4, #16 │ │ str r3, [sp, #84] @ 0x54 │ │ mul.w r7, sl, r0 │ │ mov r0, r4 │ │ str r2, [sp, #56] @ 0x38 │ │ str r1, [sp, #60] @ 0x3c │ │ mov r1, sl │ │ - bl 4ac24 │ │ + bl 4af2c │ │ str.w r8, [sp, #88] @ 0x58 │ │ mov r5, r8 │ │ mov r8, sl │ │ mov r0, r4 │ │ mov r1, r5 │ │ - bl 5bc48 │ │ + bl 5be58 │ │ adds r5, #52 @ 0x34 │ │ subs.w r8, r8, #1 │ │ - bne.n 5b160 │ │ + bne.n 5b370 │ │ ldr r0, [sp, #100] @ 0x64 │ │ ldr r5, [sp, #108] @ 0x6c │ │ cmp r0, #0 │ │ itt ne │ │ addne.w r1, r0, r0, lsl #2 │ │ addsne.w r1, r1, #9 │ │ - beq.n 5b18e │ │ + beq.n 5b39e │ │ ldr r1, [sp, #96] @ 0x60 │ │ lsls r0, r0, #2 │ │ subs r0, r1, r0 │ │ subs r0, #4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r6, [sp, #88] @ 0x58 │ │ cmp r5, sl │ │ str.w sl, [sp, #80] @ 0x50 │ │ - bne.w 5b66e │ │ + bne.w 5b87e │ │ movs r3, #14 │ │ cmp.w sl, #0 │ │ movt r3, #32768 @ 0x8000 │ │ - beq.n 5b120 │ │ + beq.n 5b330 │ │ add.w r0, r6, #48 @ 0x30 │ │ str r0, [sp, #52] @ 0x34 │ │ ldr r0, [r6, #8] │ │ cmp r0, #0 │ │ - beq.w 5b6f8 │ │ + beq.w 5b908 │ │ ldr r0, [r6, #4] │ │ ldrb r0, [r0, #0] │ │ cmp r0, #95 @ 0x5f │ │ - beq.w 5b716 │ │ + beq.w 5b926 │ │ ldrb.w r0, [r6, #48] @ 0x30 │ │ - cbz r0, 5b1d2 │ │ + cbz r0, 5b3e2 │ │ ldr r0, [r6, #44] @ 0x2c │ │ cmp r0, #0 │ │ itt eq │ │ ldreq r0, [r6, #32] │ │ cmpeq r0, #0 │ │ - bne.w 5b736 │ │ + bne.w 5b946 │ │ ldrd r0, r1, [r6, #16] │ │ cmp r1, #0 │ │ str r0, [sp, #48] @ 0x30 │ │ rsb r0, r1, r1, lsl #3 │ │ str r6, [sp, #40] @ 0x28 │ │ str r0, [sp, #44] @ 0x2c │ │ str r1, [sp, #36] @ 0x24 │ │ - beq.n 5b268 │ │ + beq.n 5b478 │ │ ldrd r1, r0, [sp, #44] @ 0x2c │ │ mov r6, r0 │ │ add.w r4, r0, r1, lsl #2 │ │ ldr.w r1, [r6], #28 │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ - beq.n 5b20c │ │ + beq.n 5b41c │ │ ldr r1, [r0, #8] │ │ cmp r1, #0 │ │ - beq.w 5b6f8 │ │ + beq.w 5b908 │ │ ldr r1, [r0, #4] │ │ ldrb r1, [r1, #0] │ │ cmp r1, #95 @ 0x5f │ │ - beq.w 5b716 │ │ + beq.w 5b926 │ │ ldrb r1, [r0, #24] │ │ orr.w r1, r1, #8 │ │ cmp r1, #15 │ │ - bne.n 5b254 │ │ + bne.n 5b464 │ │ ldr r1, [r0, #12] │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ - beq.w 5b754 │ │ + beq.w 5b964 │ │ ldr r5, [sp, #52] @ 0x34 │ │ mov sl, r7 │ │ ldrd r0, r8, [r0, #16] │ │ str r0, [sp, #92] @ 0x5c │ │ - b.n 5b234 │ │ + b.n 5b444 │ │ adds r5, #52 @ 0x34 │ │ subs r7, #52 @ 0x34 │ │ - beq.w 5b68c │ │ + beq.w 5b89c │ │ ldr.w r0, [r5, #-40] │ │ cmp r0, r8 │ │ - bne.n 5b22c │ │ + bne.n 5b43c │ │ ldr.w r0, [r5, #-44] │ │ mov r2, r8 │ │ ldr r1, [sp, #92] @ 0x5c │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.n 5b22c │ │ + bne.n 5b43c │ │ ldrb r0, [r5, #0] │ │ cmp r0, #0 │ │ - beq.n 5b22c │ │ - b.n 5b260 │ │ + beq.n 5b43c │ │ + b.n 5b470 │ │ ldr r0, [r0, #12] │ │ mov sl, r7 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.w 5b772 │ │ + bne.w 5b982 │ │ mov r0, r6 │ │ mov r7, sl │ │ cmp r6, r4 │ │ - bne.n 5b1f0 │ │ + bne.n 5b400 │ │ ldr r0, [sp, #40] @ 0x28 │ │ str r7, [sp, #32] │ │ ldrd r6, r0, [r0, #40] @ 0x28 │ │ str r0, [sp, #28] │ │ - cbz r0, 5b2d2 │ │ + cbz r0, 5b4e2 │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r0, r6, r0, lsl #3 │ │ str r0, [sp, #92] @ 0x5c │ │ mov r0, r6 │ │ ldr r1, [r0, #8] │ │ cmp r1, #0 │ │ - beq.w 5b6f8 │ │ + beq.w 5b908 │ │ ldr r1, [r0, #4] │ │ ldrb r1, [r1, #0] │ │ cmp r1, #95 @ 0x5f │ │ - beq.w 5b716 │ │ + beq.w 5b926 │ │ ldrd sl, r7, [r0, #16] │ │ add.w r4, r0, #24 │ │ ldr.w r8, [sp, #32] │ │ ldr r5, [sp, #52] @ 0x34 │ │ - b.n 5b2ac │ │ + b.n 5b4bc │ │ adds r5, #52 @ 0x34 │ │ subs.w r8, r8, #52 @ 0x34 │ │ - beq.w 5b68c │ │ + beq.w 5b89c │ │ ldr.w r0, [r5, #-40] │ │ cmp r0, r7 │ │ - bne.n 5b2a2 │ │ + bne.n 5b4b2 │ │ ldr.w r0, [r5, #-44] │ │ mov r1, sl │ │ mov r2, r7 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ itt eq │ │ ldrbeq r0, [r5, #0] │ │ cmpeq r0, #0 │ │ - bne.n 5b2a2 │ │ + bne.n 5b4b2 │ │ ldr r1, [sp, #92] @ 0x5c │ │ mov r0, r4 │ │ cmp r4, r1 │ │ - bne.n 5b280 │ │ + bne.n 5b490 │ │ str r6, [sp, #24] │ │ - bl 5b98c │ │ + bl 5bb9c │ │ cmp r0, #0 │ │ - beq.w 5b786 │ │ + beq.w 5b996 │ │ ldmia.w r0, {r1, r2, ip} │ │ adds r5, r1, #1 │ │ ldr r6, [r0, #12] │ │ adc.w r3, r2, #0 │ │ strd r5, r3, [r0] │ │ add r0, sp, #112 @ 0x70 │ │ stmia.w r0, {r1, r2, ip} │ │ @@ -76635,25 +76731,25 @@ │ │ ldr r0, [sp, #72] @ 0x48 │ │ str r0, [sp, #100] @ 0x64 │ │ ldr r0, [sp, #76] @ 0x4c │ │ str r0, [sp, #96] @ 0x60 │ │ ldr r0, [sp, #36] @ 0x24 │ │ str r6, [sp, #124] @ 0x7c │ │ cmp r0, #0 │ │ - bne.w 5b5a6 │ │ + bne.w 5b7b6 │ │ movs r5, #0 │ │ ldr r0, [sp, #36] @ 0x24 │ │ cmp r5, r0 │ │ - bne.w 5b78e │ │ + bne.w 5b99e │ │ ldr r0, [sp, #40] @ 0x28 │ │ ldrd r0, r4, [r0, #28] │ │ str r0, [sp, #92] @ 0x5c │ │ - bl 5b98c │ │ + bl 5bb9c │ │ cmp r0, #0 │ │ - beq.w 5b786 │ │ + beq.w 5b996 │ │ ldmia.w r0, {r1, r2, ip} │ │ adds r5, r1, #1 │ │ ldr r6, [r0, #12] │ │ adc.w r3, r2, #0 │ │ cmp r4, #0 │ │ strd r5, r3, [r0] │ │ add r0, sp, #112 @ 0x70 │ │ @@ -76663,21 +76759,21 @@ │ │ ldr r0, [sp, #68] @ 0x44 │ │ str r0, [sp, #104] @ 0x68 │ │ ldr r0, [sp, #72] @ 0x48 │ │ str r0, [sp, #100] @ 0x64 │ │ ldr r0, [sp, #76] @ 0x4c │ │ str r6, [sp, #124] @ 0x7c │ │ str r0, [sp, #96] @ 0x60 │ │ - bne.w 5b5ee │ │ + bne.w 5b7fe │ │ movs r5, #0 │ │ cmp r5, r4 │ │ - bne.w 5b7ac │ │ - bl 5b98c │ │ + bne.w 5b9bc │ │ + bl 5bb9c │ │ cmp r0, #0 │ │ - beq.w 5b786 │ │ + beq.w 5b996 │ │ ldmia.w r0, {r1, r2, ip} │ │ adds r5, r1, #1 │ │ ldr r6, [r0, #12] │ │ adc.w r3, r2, #0 │ │ strd r5, r3, [r0] │ │ add r0, sp, #112 @ 0x70 │ │ stmia.w r0, {r1, r2, ip} │ │ @@ -76688,69 +76784,69 @@ │ │ ldr r0, [sp, #72] @ 0x48 │ │ str r0, [sp, #100] @ 0x64 │ │ ldr r0, [sp, #76] @ 0x4c │ │ str r0, [sp, #96] @ 0x60 │ │ ldr r0, [sp, #28] │ │ str r6, [sp, #124] @ 0x7c │ │ cmp r0, #0 │ │ - bne.w 5b62e │ │ + bne.w 5b83e │ │ movs r5, #0 │ │ ldr r0, [sp, #28] │ │ cmp r5, r0 │ │ - bne.w 5b7ca │ │ + bne.w 5b9da │ │ cmp r4, #0 │ │ - beq.w 5b590 │ │ + beq.w 5b7a0 │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldr r1, [sp, #92] @ 0x5c │ │ lsls r0, r0, #2 │ │ str r0, [sp, #20] │ │ rsb r0, r4, r4, lsl #3 │ │ add.w r0, r1, r0, lsl #2 │ │ str r0, [sp, #12] │ │ ldr r0, [sp, #92] @ 0x5c │ │ ldr r0, [r0, #20] │ │ cmp r0, #0 │ │ - beq.w 5b7e8 │ │ + beq.w 5b9f8 │ │ cmp r0, #3 │ │ - bls.n 5b3e6 │ │ - ldr r1, [pc, #136] @ (5b454 ) │ │ + bls.n 5b5f6 │ │ + ldr r1, [pc, #136] @ (5b664 ) │ │ add r0, sp, #96 @ 0x60 │ │ movs r2, #62 @ 0x3e │ │ add r1, pc │ │ - bl 5be9a │ │ + bl 5c0aa │ │ movs r0, #14 │ │ ldr r1, [sp, #96] @ 0x60 │ │ movt r0, #32768 @ 0x8000 │ │ adds r0, #3 │ │ cmp r1, r0 │ │ - bne.w 5b808 │ │ + bne.w 5ba18 │ │ ldr r0, [sp, #92] @ 0x5c │ │ ldrb r0, [r0, #24] │ │ - cbnz r0, 5b40e │ │ + cbnz r0, 5b61e │ │ ldr r0, [sp, #92] @ 0x5c │ │ ldrb r0, [r0, #25] │ │ - cbz r0, 5b40e │ │ - ldr r1, [pc, #100] @ (5b458 ) │ │ + cbz r0, 5b61e │ │ + ldr r1, [pc, #100] @ (5b668 ) │ │ add r0, sp, #96 @ 0x60 │ │ movs r2, #31 │ │ add r1, pc │ │ - bl 5be9a │ │ + bl 5c0aa │ │ movs r0, #14 │ │ ldr r1, [sp, #96] @ 0x60 │ │ movt r0, #32768 @ 0x8000 │ │ adds r0, #3 │ │ cmp r1, r0 │ │ - bne.w 5b808 │ │ + bne.w 5ba18 │ │ ldr r0, [sp, #92] @ 0x5c │ │ ldr r0, [r0, #20] │ │ cmp r0, #0 │ │ - beq.w 5b582 │ │ + beq.w 5b792 │ │ ldr r1, [sp, #36] @ 0x24 │ │ cmp r1, #0 │ │ - beq.w 5b6e4 │ │ + beq.w 5b8f4 │ │ ldr r1, [sp, #92] @ 0x5c │ │ ldr r1, [r1, #16] │ │ str r1, [sp, #28] │ │ add.w r0, r1, r0, lsl #4 │ │ str r0, [sp, #4] │ │ movs r0, #0 │ │ str r0, [sp, #24] │ │ @@ -76761,591 +76857,591 @@ │ │ str r0, [sp, #8] │ │ adds r0, #1 │ │ str r0, [sp, #24] │ │ add.w r0, r6, #16 │ │ str r1, [sp, #44] @ 0x2c │ │ str r6, [sp, #16] │ │ str r0, [sp, #28] │ │ - b.n 5b462 │ │ + b.n 5b672 │ │ nop │ │ - smull r0, r0, sl, r7 │ │ - cbnz r4, 5b47c │ │ - vtbl.8 d27, {d27-d28}, d26 │ │ + vst1.8 {d0[0]}, [sl], r7 │ │ + @ instruction: 0xb784 │ │ + vqshl.u64 d27, d10, #59 @ 0x3b │ │ vcvt.u16.f16 d19, d12, #5 │ │ - beq.w 5b6e4 │ │ + beq.w 5b8f4 │ │ mov r4, r7 │ │ ldr.w r0, [r7], #28 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.n 5b45c │ │ + beq.n 5b66c │ │ ldr r0, [r4, #8] │ │ cmp r0, r2 │ │ - bne.n 5b45c │ │ + bne.n 5b66c │ │ ldr r0, [r4, #4] │ │ mov r6, r2 │ │ ldr r1, [sp, #44] @ 0x2c │ │ - blx d8860 │ │ + blx d8870 │ │ mov r2, r6 │ │ cmp r0, #0 │ │ - bne.n 5b45c │ │ + bne.n 5b66c │ │ ldrb.w r0, [r4, #24]! │ │ orr.w r1, r0, #8 │ │ cmp r1, #15 │ │ - beq.w 5b812 │ │ + beq.w 5ba22 │ │ subs r1, r0, #3 │ │ mov.w r1, r1, ror #1 │ │ cmp r1, #5 │ │ - bhi.n 5b4c0 │ │ + bhi.n 5b6d0 │ │ movs r2, #1 │ │ lsl.w r1, r2, r1 │ │ tst.w r1, #51 @ 0x33 │ │ - beq.n 5b4c0 │ │ + beq.n 5b6d0 │ │ ldr r1, [sp, #16] │ │ ldrb r1, [r1, #13] │ │ cmp r1, #1 │ │ - beq.w 5b824 │ │ + beq.w 5ba34 │ │ ldr r1, [sp, #92] @ 0x5c │ │ ldr r2, [sp, #8] │ │ ldr r1, [r1, #20] │ │ subs r1, #1 │ │ cmp r2, r1 │ │ - bne.w 5b840 │ │ + bne.w 5ba50 │ │ sub.w r1, r0, #8 │ │ cmp r1, #7 │ │ - bcs.n 5b4da │ │ + bcs.n 5b6ea │ │ ldr r1, [sp, #92] @ 0x5c │ │ ldr r1, [r1, #20] │ │ cmp r1, #2 │ │ - bcc.n 5b514 │ │ + bcc.n 5b724 │ │ ldr r1, [sp, #16] │ │ ldrb r1, [r1, #13] │ │ cmp r1, #1 │ │ - beq.n 5b514 │ │ - b.n 5b878 │ │ + beq.n 5b724 │ │ + b.n 5ba88 │ │ cmp r0, #6 │ │ - bne.n 5b514 │ │ + bne.n 5b724 │ │ ldr r0, [sp, #92] @ 0x5c │ │ ldr r1, [sp, #8] │ │ ldr r0, [r0, #20] │ │ subs r0, #1 │ │ cmp r1, r0 │ │ - beq.n 5b4f2 │ │ + beq.n 5b702 │ │ ldr r0, [sp, #16] │ │ ldrb r0, [r0, #13] │ │ cmp r0, #1 │ │ - bne.n 5b4f6 │ │ + bne.n 5b706 │ │ movs r0, #6 │ │ - b.n 5b55c │ │ - ldr r1, [pc, #924] @ (5b894 ) │ │ + b.n 5b76c │ │ + ldr r1, [pc, #924] @ (5baa4 ) │ │ add r0, sp, #96 @ 0x60 │ │ movs r2, #71 @ 0x47 │ │ add r1, pc │ │ - bl 5be9a │ │ + bl 5c0aa │ │ movs r0, #14 │ │ ldr r1, [sp, #96] @ 0x60 │ │ movt r0, #32768 @ 0x8000 │ │ adds r0, #3 │ │ cmp r1, r0 │ │ - bne.w 5b808 │ │ + bne.w 5ba18 │ │ ldrb r0, [r4, #0] │ │ subs r1, r0, #6 │ │ uxtb r2, r1 │ │ cmp r2, #10 │ │ - bcs.n 5b532 │ │ + bcs.n 5b742 │ │ movw r3, #1021 @ 0x3fd │ │ lsr.w r2, r3, r2 │ │ lsls r2, r2, #31 │ │ - beq.n 5b532 │ │ - ldr r0, [pc, #876] @ (5b898 ) │ │ + beq.n 5b742 │ │ + ldr r0, [pc, #876] @ (5baa8 ) │ │ add r0, pc │ │ uxtab r4, r0, r1 │ │ - b.n 5b556 │ │ + b.n 5b766 │ │ ldr r1, [sp, #16] │ │ ldrb r1, [r1, #13] │ │ cmp r1, #1 │ │ - bne.n 5b560 │ │ - ldr r1, [pc, #864] @ (5b89c ) │ │ + bne.n 5b770 │ │ + ldr r1, [pc, #864] @ (5baac ) │ │ add r0, sp, #96 @ 0x60 │ │ movs r2, #42 @ 0x2a │ │ add r1, pc │ │ - bl 5be9a │ │ + bl 5c0aa │ │ movs r0, #14 │ │ ldr r1, [sp, #96] @ 0x60 │ │ movt r0, #32768 @ 0x8000 │ │ adds r0, #3 │ │ cmp r1, r0 │ │ - bne.w 5b808 │ │ + bne.w 5ba18 │ │ ldrb r0, [r4, #0] │ │ cmp r0, #14 │ │ - beq.n 5b578 │ │ + beq.n 5b788 │ │ ldr r1, [sp, #16] │ │ ldrb r1, [r1, #13] │ │ cmp r1, #2 │ │ - beq.w 5b85c │ │ + beq.w 5ba6c │ │ and.w r0, r0, #7 │ │ cmp r0, #6 │ │ - beq.n 5b578 │ │ + beq.n 5b788 │ │ ldr r0, [sp, #16] │ │ ldrb r0, [r0, #12] │ │ cmp r0, #1 │ │ - beq.w 5b8a0 │ │ + beq.w 5bab0 │ │ ldr r0, [sp, #4] │ │ ldr r1, [sp, #28] │ │ cmp r1, r0 │ │ - bne.w 5b430 │ │ + bne.w 5b640 │ │ ldr r0, [sp, #92] @ 0x5c │ │ ldr r1, [sp, #12] │ │ adds r0, #28 │ │ str r0, [sp, #92] @ 0x5c │ │ cmp r0, r1 │ │ - bne.w 5b3bc │ │ + bne.w 5b5cc │ │ ldr r6, [sp, #40] @ 0x28 │ │ movs r3, #14 │ │ ldr r7, [sp, #32] │ │ movt r3, #32768 @ 0x8000 │ │ adds r6, #52 @ 0x34 │ │ ldr r0, [sp, #60] @ 0x3c │ │ cmp r6, r0 │ │ - bne.w 5b1ac │ │ - b.n 5b120 │ │ + bne.w 5b3bc │ │ + b.n 5b330 │ │ ldr r6, [sp, #36] @ 0x24 │ │ add r0, sp, #96 @ 0x60 │ │ ldr r2, [sp, #56] @ 0x38 │ │ mov r1, r6 │ │ - bl 4ac24 │ │ + bl 4af2c │ │ ldr r5, [sp, #48] @ 0x30 │ │ ldr r0, [r5, #0] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 5b8c4 │ │ + beq.w 5bad4 │ │ add r0, sp, #96 @ 0x60 │ │ mov r1, r5 │ │ - bl 5bc48 │ │ + bl 5be58 │ │ adds r5, #28 │ │ subs r6, #1 │ │ - bne.n 5b5b4 │ │ + bne.n 5b7c4 │ │ ldr r0, [sp, #100] @ 0x64 │ │ ldr r5, [sp, #108] @ 0x6c │ │ cmp r0, #0 │ │ itt ne │ │ addne.w r1, r0, r0, lsl #2 │ │ addsne.w r1, r1, #9 │ │ - beq.w 5b310 │ │ + beq.w 5b520 │ │ ldr r1, [sp, #96] @ 0x60 │ │ lsls r0, r0, #2 │ │ subs r0, r1, r0 │ │ subs r0, #4 │ │ - blx d87c0 │ │ - b.n 5b310 │ │ + blx d87d0 │ │ + b.n 5b520 │ │ ldr r2, [sp, #56] @ 0x38 │ │ add r0, sp, #96 @ 0x60 │ │ mov r1, r4 │ │ mov r6, r4 │ │ - bl 4a230 │ │ + bl 4a538 │ │ ldr r0, [sp, #92] @ 0x5c │ │ adds r5, r0, #4 │ │ ldrd r1, r2, [r5], #28 │ │ add r0, sp, #96 @ 0x60 │ │ - bl 5bd72 │ │ + bl 5bf82 │ │ subs r6, #1 │ │ - bne.n 5b5fe │ │ + bne.n 5b80e │ │ ldr r0, [sp, #100] @ 0x64 │ │ ldr r5, [sp, #108] @ 0x6c │ │ cmp r0, #0 │ │ itt ne │ │ addne.w r1, r0, r0, lsl #3 │ │ addsne.w r1, r1, #13 │ │ - beq.w 5b35a │ │ + beq.w 5b56a │ │ ldr r1, [sp, #96] @ 0x60 │ │ lsls r0, r0, #3 │ │ subs r0, r1, r0 │ │ subs r0, #8 │ │ - blx d87c0 │ │ - b.n 5b35a │ │ + blx d87d0 │ │ + b.n 5b56a │ │ ldr r6, [sp, #28] │ │ add r0, sp, #96 @ 0x60 │ │ ldr r2, [sp, #56] @ 0x38 │ │ mov r1, r6 │ │ - bl 4a230 │ │ + bl 4a538 │ │ ldr r0, [sp, #24] │ │ adds r5, r0, #4 │ │ ldrd r1, r2, [r5], #24 │ │ add r0, sp, #96 @ 0x60 │ │ - bl 5bd72 │ │ + bl 5bf82 │ │ subs r6, #1 │ │ - bne.n 5b63e │ │ + bne.n 5b84e │ │ ldr r0, [sp, #100] @ 0x64 │ │ ldr r5, [sp, #108] @ 0x6c │ │ cmp r0, #0 │ │ itt ne │ │ addne.w r1, r0, r0, lsl #3 │ │ addsne.w r1, r1, #13 │ │ - beq.w 5b39c │ │ + beq.w 5b5ac │ │ ldr r1, [sp, #96] @ 0x60 │ │ lsls r0, r0, #3 │ │ subs r0, r1, r0 │ │ subs r0, #8 │ │ - blx d87c0 │ │ - b.n 5b39c │ │ + blx d87d0 │ │ + b.n 5b5ac │ │ movs r0, #25 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 5b8bc │ │ - ldr r1, [pc, #708] @ (5b940 ) │ │ + beq.w 5bacc │ │ + ldr r1, [pc, #708] @ (5bb50 ) │ │ movs r2, #25 │ │ mov r5, r0 │ │ movs r4, #25 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #25 │ │ - b.n 5b6ac │ │ + b.n 5b8bc │ │ movs r0, #33 @ 0x21 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 5b8cc │ │ - ldr r1, [pc, #688] @ (5b94c ) │ │ + beq.w 5badc │ │ + ldr r1, [pc, #688] @ (5bb5c ) │ │ mov r5, r0 │ │ add r1, pc │ │ mov r0, r5 │ │ movs r2, #33 @ 0x21 │ │ movs r4, #33 @ 0x21 │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #33 @ 0x21 │ │ ldr r6, [sp, #88] @ 0x58 │ │ ldr.w r8, [sp, #80] @ 0x50 │ │ ldr r1, [sp, #84] @ 0x54 │ │ cmp.w r8, #0 │ │ str.w r0, [r9, #12] │ │ stmia.w r9, {r1, r4, r5} │ │ - beq.n 5b6d0 │ │ + beq.n 5b8e0 │ │ mov r5, r6 │ │ mov r0, r5 │ │ - bl 5becc │ │ + bl 5c0dc │ │ adds r5, #52 @ 0x34 │ │ subs.w r8, r8, #1 │ │ - bne.n 5b6c2 │ │ + bne.n 5b8d2 │ │ ldr.w r0, [fp] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add sp, #132 @ 0x84 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #33 @ 0x21 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 5b8cc │ │ - ldr r1, [pc, #616] @ (5b95c ) │ │ + beq.w 5badc │ │ + ldr r1, [pc, #616] @ (5bb6c ) │ │ mov r5, r0 │ │ add r1, pc │ │ - b.n 5b69e │ │ + b.n 5b8ae │ │ movs r0, #28 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 5b8d4 │ │ - ldr r1, [pc, #564] @ (5b93c ) │ │ + beq.w 5bae4 │ │ + ldr r1, [pc, #564] @ (5bb4c ) │ │ movs r2, #28 │ │ mov r5, r0 │ │ movs r4, #28 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #28 │ │ - b.n 5b6aa │ │ + b.n 5b8ba │ │ movs r0, #40 @ 0x28 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 5b8dc │ │ - ldr r1, [pc, #544] @ (5b944 ) │ │ + beq.w 5baec │ │ + ldr r1, [pc, #544] @ (5bb54 ) │ │ mov r5, r0 │ │ add r1, pc │ │ mov r0, r5 │ │ movs r2, #40 @ 0x28 │ │ movs r4, #40 @ 0x28 │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #40 @ 0x28 │ │ - b.n 5b6aa │ │ + b.n 5b8ba │ │ movs r0, #48 @ 0x30 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 5b8e4 │ │ - ldr r1, [pc, #516] @ (5b948 ) │ │ + beq.w 5baf4 │ │ + ldr r1, [pc, #516] @ (5bb58 ) │ │ movs r2, #48 @ 0x30 │ │ mov r5, r0 │ │ movs r4, #48 @ 0x30 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #48 @ 0x30 │ │ - b.n 5b6aa │ │ + b.n 5b8ba │ │ movs r0, #46 @ 0x2e │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 5b8ec │ │ - ldr r1, [pc, #532] @ (5b978 ) │ │ + beq.w 5bafc │ │ + ldr r1, [pc, #532] @ (5bb88 ) │ │ movs r2, #46 @ 0x2e │ │ mov r5, r0 │ │ movs r4, #46 @ 0x2e │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #46 @ 0x2e │ │ - b.n 5b6aa │ │ + b.n 5b8ba │ │ movs r0, #56 @ 0x38 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 5b8f4 │ │ - ldr r1, [pc, #464] @ (5b950 ) │ │ + beq.w 5bb04 │ │ + ldr r1, [pc, #464] @ (5bb60 ) │ │ mov r5, r0 │ │ add r1, pc │ │ - b.n 5b7fa │ │ - ldr r0, [pc, #500] @ (5b97c ) │ │ + b.n 5ba0a │ │ + ldr r0, [pc, #500] @ (5bb8c ) │ │ add r0, pc │ │ - bl 774bc │ │ + bl 77524 │ │ movs r0, #23 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 5b8fc │ │ - ldr r1, [pc, #488] @ (5b984 ) │ │ + beq.w 5bb0c │ │ + ldr r1, [pc, #488] @ (5bb94 ) │ │ movs r2, #23 │ │ mov r5, r0 │ │ movs r4, #23 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #23 │ │ - b.n 5b6aa │ │ + b.n 5b8ba │ │ movs r0, #20 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 5b904 │ │ - ldr r1, [pc, #460] @ (5b988 ) │ │ + beq.w 5bb14 │ │ + ldr r1, [pc, #460] @ (5bb98 ) │ │ movs r2, #20 │ │ mov r5, r0 │ │ movs r4, #20 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #20 │ │ - b.n 5b6aa │ │ + b.n 5b8ba │ │ movs r0, #19 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 5b90c │ │ - ldr r1, [pc, #380] @ (5b954 ) │ │ + beq.w 5bb1c │ │ + ldr r1, [pc, #380] @ (5bb64 ) │ │ movs r2, #19 │ │ mov r5, r0 │ │ movs r4, #19 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #19 │ │ - b.n 5b6aa │ │ + b.n 5b8ba │ │ movs r0, #56 @ 0x38 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 5b8f4 │ │ - ldr r1, [pc, #352] @ (5b958 ) │ │ + beq.w 5bb04 │ │ + ldr r1, [pc, #352] @ (5bb68 ) │ │ mov r5, r0 │ │ add r1, pc │ │ mov r0, r5 │ │ movs r2, #56 @ 0x38 │ │ movs r4, #56 @ 0x38 │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #56 @ 0x38 │ │ - b.n 5b6aa │ │ + b.n 5b8ba │ │ ldr r4, [sp, #100] @ 0x64 │ │ ldr r5, [sp, #104] @ 0x68 │ │ ldr r0, [sp, #108] @ 0x6c │ │ str r1, [sp, #84] @ 0x54 │ │ - b.n 5b6aa │ │ + b.n 5b8ba │ │ movs r0, #40 @ 0x28 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 5b8dc │ │ - ldr r1, [pc, #320] @ (5b960 ) │ │ + beq.n 5baec │ │ + ldr r1, [pc, #320] @ (5bb70 ) │ │ mov r5, r0 │ │ add r1, pc │ │ - b.n 5b728 │ │ + b.n 5b938 │ │ movs r0, #30 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 5b914 │ │ - ldr r1, [pc, #312] @ (5b968 ) │ │ + beq.n 5bb24 │ │ + ldr r1, [pc, #312] @ (5bb78 ) │ │ movs r2, #30 │ │ mov r5, r0 │ │ movs r4, #30 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #30 │ │ - b.n 5b6aa │ │ + b.n 5b8ba │ │ movs r0, #59 @ 0x3b │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 5b91c │ │ - ldr r1, [pc, #288] @ (5b96c ) │ │ + beq.n 5bb2c │ │ + ldr r1, [pc, #288] @ (5bb7c ) │ │ movs r2, #59 @ 0x3b │ │ mov r5, r0 │ │ movs r4, #59 @ 0x3b │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #59 @ 0x3b │ │ - b.n 5b6aa │ │ + b.n 5b8ba │ │ movs r0, #49 @ 0x31 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 5b924 │ │ - ldr r1, [pc, #252] @ (5b964 ) │ │ + beq.n 5bb34 │ │ + ldr r1, [pc, #252] @ (5bb74 ) │ │ movs r2, #49 @ 0x31 │ │ mov r5, r0 │ │ movs r4, #49 @ 0x31 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #49 @ 0x31 │ │ - b.n 5b6aa │ │ + b.n 5b8ba │ │ movs r0, #41 @ 0x29 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 5b92c │ │ - ldr r1, [pc, #236] @ (5b970 ) │ │ + beq.n 5bb3c │ │ + ldr r1, [pc, #236] @ (5bb80 ) │ │ movs r2, #41 @ 0x29 │ │ mov r5, r0 │ │ movs r4, #41 @ 0x29 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #41 @ 0x29 │ │ - b.n 5b6aa │ │ - cbnz r1, 5b8c0 │ │ - vrsra.u32 d21, d6, #5 │ │ - vtbl.8 d27, {d28-d29}, d20 │ │ + b.n 5b8ba │ │ + @ instruction: 0xb791 │ │ + vcvtn.s32.f32 d21, d6 │ │ + vqshl.u64 d27, d4, #60 @ 0x3c │ │ vshr.u32 d18, d25, #5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 5b934 │ │ - ldr r1, [pc, #200] @ (5b974 ) │ │ + beq.n 5bb44 │ │ + ldr r1, [pc, #200] @ (5bb84 ) │ │ movs r2, #57 @ 0x39 │ │ mov r5, r0 │ │ movs r4, #57 @ 0x39 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #57 @ 0x39 │ │ - b.n 5b6aa │ │ + b.n 5b8ba │ │ movs r0, #1 │ │ movs r1, #25 │ │ - bl 3dfa4 │ │ - ldr r0, [pc, #184] @ (5b980 ) │ │ + bl 3e2ac │ │ + ldr r0, [pc, #184] @ (5bb90 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ movs r0, #1 │ │ movs r1, #33 @ 0x21 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #28 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #40 @ 0x28 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #48 @ 0x30 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #46 @ 0x2e │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #56 @ 0x38 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #23 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #20 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #19 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #30 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #59 @ 0x3b │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #49 @ 0x31 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #41 @ 0x29 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #57 @ 0x39 │ │ - bl 3dfa4 │ │ - push {r3, r4, r6, r7} │ │ - vqshrn.u64 d27, q9, #5 │ │ - vsri.64 , q7, #5 │ │ - vrecpe.f32 d27, d2 │ │ - @ instruction: 0xfffbb8f0 │ │ - vrecpe.f32 d27, d26 │ │ - vsli.32 d27, d22, #27 │ │ - vsli.32 d27, d20, #27 │ │ - vqshlu.s64 , q0, #59 @ 0x3b │ │ - vrsqrte.f32 , q6 │ │ - vcvt.f32.u32 d27, d22 │ │ - vsli.64 , q7, #59 @ 0x3b │ │ - vrsqrte.f32 , q9 │ │ - vrsqrte.f32 , q13 │ │ - vqshlu.s64 d27, d10, #59 @ 0x3b │ │ - vsli.32 d27, d4, #27 │ │ - vtbl.8 d16, {d27-d28}, d0 │ │ - movs r0, r1 │ │ - strh.w r0, [r6, #7] │ │ - push {r1, r6, lr} │ │ - vsli.32 d27, d28, #27 │ │ + bl 3e2ac │ │ + uxtb r0, r1 │ │ + vcvt.s32.f32 d27, d18 │ │ + vcvtp.u32.f32 , q7 │ │ + vrshr.u64 , q9, #5 │ │ + vcvt.f32.u32 , q8 │ │ + vrsra.u32 d27, d10, #5 │ │ + vcvtm.s32.f32 d27, d22 │ │ + vcvtm.s32.f32 d27, d20 │ │ + vrsqrte.u32 , q0 │ │ + vrsra.u64 d27, d28, #5 │ │ + vsri.64 d27, d6, #5 │ │ + vcvtm.u32.f32 , q7 │ │ + vrsra.u64 , q1, #5 │ │ + vrsra.u64 , q5, #5 │ │ + vrsqrte.u32 d27, d10 │ │ + vcvtm.s32.f32 d27, d4 │ │ + vcvt.u32.f32 d16, d0 │ │ + movs r0, r1 │ │ + subw r0, r6, #2055 @ 0x807 │ │ + cbz r2, 5bbe4 │ │ + vcvtm.s32.f32 d27, d28 │ │ vtbl.8 d30, {d11-d12}, d29 │ │ blx lr │ │ sub sp, #32 │ │ - ldr r7, [pc, #652] @ (5bc20 ) │ │ + ldr r7, [pc, #652] @ (5be30 ) │ │ add r7, pc │ │ ldr.w sl, [r7, #12] │ │ dmb ish │ │ cmp.w sl, #0 │ │ - beq.n 5b9b4 │ │ + beq.n 5bbc4 │ │ mov r0, sl │ │ - blx d8830 │ │ + blx d8840 │ │ cmp r0, #1 │ │ - bls.n 5b9c8 │ │ + bls.n 5bbd8 │ │ add sp, #32 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ add.w r0, r7, #12 │ │ - bl 7740c │ │ + bl 77474 │ │ mov sl, r0 │ │ mov r0, sl │ │ - blx d8830 │ │ + blx d8840 │ │ cmp r0, #1 │ │ - bhi.n 5b9ae │ │ + bhi.n 5bbbe │ │ mov.w r0, #0 │ │ - beq.n 5b9ae │ │ + beq.n 5bbbe │ │ strd r0, r0, [sp, #16] │ │ strd r0, r0, [sp, #8] │ │ ldrb r0, [r7, #0] │ │ cmp r0, #0 │ │ - beq.n 5ba80 │ │ - ldr r0, [pc, #580] @ (5bc24 ) │ │ + beq.n 5bc90 │ │ + ldr r0, [pc, #580] @ (5be34 ) │ │ add r6, sp, #8 │ │ movs r5, #16 │ │ mov.w r8, #0 │ │ add r0, pc │ │ ldr r0, [r0, #0] │ │ cmp r0, #0 │ │ - beq.w 5baa8 │ │ + beq.w 5bcb8 │ │ ldrb r4, [r7, #1] │ │ movs r2, #4 │ │ mov r0, r6 │ │ mov r1, r5 │ │ cmp r4, #0 │ │ it eq │ │ moveq r2, #1 │ │ - blx d88f0 │ │ + blx d8900 │ │ adds r1, r0, #1 │ │ - bne.n 5ba72 │ │ - blx d8850 │ │ + bne.n 5bc82 │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ subs r0, #1 │ │ cmp r0, #37 @ 0x25 │ │ - bhi.w 5bbbe │ │ + bhi.w 5bdce │ │ tbh [pc, r0, lsl #1] │ │ lsls r5, r6, #1 │ │ lsls r3, r2, #3 │ │ lsls r3, r2, #3 │ │ movs r6, r4 │ │ lsls r3, r2, #3 │ │ lsls r3, r2, #3 │ │ @@ -77377,55 +77473,55 @@ │ │ lsls r3, r2, #3 │ │ lsls r3, r2, #3 │ │ lsls r3, r2, #3 │ │ lsls r3, r2, #3 │ │ lsls r3, r2, #3 │ │ lsls r3, r2, #3 │ │ lsls r5, r6, #1 │ │ - b.n 5b9f0 │ │ + b.n 5bc00 │ │ cmp r4, #0 │ │ - beq.w 5bbbe │ │ + beq.w 5bdce │ │ strb.w r8, [r7, #1] │ │ - b.n 5b9f0 │ │ + b.n 5bc00 │ │ cmp r5, r0 │ │ - bcc.w 5bbcc │ │ + bcc.w 5bddc │ │ add r6, r0 │ │ subs r5, r5, r0 │ │ - bne.n 5b9f0 │ │ - b.n 5bb5a │ │ + bne.n 5bc00 │ │ + b.n 5bd6a │ │ add r6, sp, #8 │ │ movs r5, #16 │ │ - b.n 5bb12 │ │ + b.n 5bd22 │ │ clz r0, r4 │ │ - b.n 5bb0c │ │ + b.n 5bd1c │ │ cmp.w r9, #0 │ │ - beq.w 5bbbe │ │ + beq.w 5bdce │ │ strb.w r8, [r7, #1] │ │ - b.n 5baa8 │ │ + b.n 5bcb8 │ │ cmp r5, r0 │ │ - bcc.w 5bbcc │ │ + bcc.w 5bddc │ │ add r6, r0 │ │ subs r5, r5, r0 │ │ - beq.w 5bb5a │ │ + beq.w 5bd6a │ │ ldrb.w r9, [r7, #1] │ │ movs r3, #4 │ │ mov.w r0, #384 @ 0x180 │ │ mov r1, r6 │ │ mov r2, r5 │ │ cmp.w r9, #0 │ │ it eq │ │ moveq r3, #1 │ │ - blx d87d0 │ │ + blx d87e0 │ │ adds r1, r0, #1 │ │ - bne.n 5ba9a │ │ - blx d8850 │ │ + bne.n 5bcaa │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ subs r0, #1 │ │ cmp r0, #37 @ 0x25 │ │ - bhi.w 5bbbe │ │ + bhi.w 5bdce │ │ tbb [pc, r0] │ │ strb r5, [r2, #12] │ │ asrs r3, r6, #17 │ │ strb r3, [r6, #13] │ │ strb r3, [r6, #13] │ │ strb r3, [r6, #13] │ │ strb r0, [r3, #12] │ │ @@ -77438,222 +77534,222 @@ │ │ strb r3, [r6, #13] │ │ strb r3, [r6, #13] │ │ strb r3, [r6, #13] │ │ strb r3, [r6, #13] │ │ strb r3, [r6, #13] │ │ strb r3, [r6, #13] │ │ asrs r3, r6, #21 │ │ - b.n 5ba8c │ │ - b.n 5baa8 │ │ + b.n 5bc9c │ │ + b.n 5bcb8 │ │ movs r0, #0 │ │ strb r0, [r7, #0] │ │ - b.n 5bb12 │ │ + b.n 5bd22 │ │ clz r0, r9 │ │ lsrs r0, r0, #5 │ │ cmp r0, #0 │ │ - beq.n 5bbbe │ │ + beq.n 5bdce │ │ ldr r0, [r7, #4] │ │ adds r7, #8 │ │ dmb ish │ │ cmp r0, #0 │ │ - bne.n 5bb9c │ │ + bne.n 5bdac │ │ ldr r7, [r7, #0] │ │ - b.n 5bb2e │ │ - blx d8850 │ │ + b.n 5bd3e │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ cmp r0, #4 │ │ - bne.n 5bbd8 │ │ - cbz r5, 5bb5a │ │ + bne.n 5bde8 │ │ + cbz r5, 5bd6a │ │ mov r0, r7 │ │ mov r1, r6 │ │ mov r2, r5 │ │ - blx d8900 │ │ + blx d8910 │ │ adds r1, r0, #1 │ │ - beq.n 5bb22 │ │ - cbz r0, 5bb4c │ │ + beq.n 5bd32 │ │ + cbz r0, 5bd5c │ │ cmp r5, r0 │ │ - bcc.n 5bb90 │ │ + bcc.n 5bda0 │ │ add r6, r0 │ │ subs r5, r5, r0 │ │ cmp r5, #0 │ │ - bne.n 5bb2e │ │ - b.n 5bb5a │ │ - ldr r0, [pc, #232] @ (5bc38 ) │ │ + bne.n 5bd3e │ │ + b.n 5bd6a │ │ + ldr r0, [pc, #232] @ (5be48 ) │ │ add r0, pc │ │ ldrd r0, r7, [r0] │ │ uxtb r1, r0 │ │ cmp r1, #4 │ │ - bne.n 5bc04 │ │ + bne.n 5be14 │ │ add r7, sp, #8 │ │ movs r0, #24 │ │ ldmia r7, {r4, r5, r6, r7} │ │ - blx d87f0 │ │ - cbz r0, 5bbb6 │ │ + blx d8810 │ │ + cbz r0, 5bdc6 │ │ stmia.w r0, {r4, r5, r6, r7, sl} │ │ mov r5, r0 │ │ mov r0, sl │ │ - blx d8830 │ │ + blx d8840 │ │ mov r6, r0 │ │ mov r0, sl │ │ mov r1, r5 │ │ mov r4, r5 │ │ - blx d8840 │ │ + blx d8850 │ │ cmp r6, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ add sp, #32 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ - ldr r3, [pc, #160] @ (5bc34 ) │ │ + ldr r3, [pc, #160] @ (5be44 ) │ │ add r3, pc │ │ mov r1, r5 │ │ mov r2, r5 │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ add r0, sp, #24 │ │ - bl 9578c │ │ + bl 957f8 │ │ ldrb.w r0, [sp, #24] │ │ cmp r0, #4 │ │ - beq.n 5bb1e │ │ + beq.n 5bd2e │ │ ldrd r0, r7, [sp, #24] │ │ uxtb r1, r0 │ │ cmp r1, #4 │ │ - beq.n 5bb1e │ │ - b.n 5bb56 │ │ + beq.n 5bd2e │ │ + b.n 5bd66 │ │ movs r0, #8 │ │ movs r1, #24 │ │ - bl 3de2a │ │ - ldr r0, [pc, #108] @ (5bc2c ) │ │ + bl 3e132 │ │ + ldr r0, [pc, #108] @ (5be3c ) │ │ movs r1, #61 @ 0x3d │ │ - ldr r2, [pc, #108] @ (5bc30 ) │ │ + ldr r2, [pc, #108] @ (5be40 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ - ldr r3, [pc, #88] @ (5bc28 ) │ │ + bl 3fd60 │ │ + ldr r3, [pc, #88] @ (5be38 ) │ │ add r3, pc │ │ mov r1, r5 │ │ mov r2, r5 │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ lsrs r7, r0, #8 │ │ lsls r2, r0, #24 │ │ movs r1, #0 │ │ - ldr r0, [pc, #92] @ (5bc3c ) │ │ + ldr r0, [pc, #92] @ (5be4c ) │ │ orr.w r1, r1, r2, lsl #8 │ │ - ldr r3, [pc, #88] @ (5bc40 ) │ │ - ldr r4, [pc, #92] @ (5bc44 ) │ │ + ldr r3, [pc, #88] @ (5be50 ) │ │ + ldr r4, [pc, #92] @ (5be54 ) │ │ add r0, pc │ │ str r1, [sp, #24] │ │ lsls r1, r7, #8 │ │ orr.w r1, r1, r2, lsr #24 │ │ add r3, pc │ │ add r4, pc │ │ str r1, [sp, #28] │ │ add r2, sp, #24 │ │ movs r1, #30 │ │ str r4, [sp, #0] │ │ - bl 414b0 │ │ + bl 417b8 │ │ udf #254 @ 0xfe │ │ lsrs r0, r0, #8 │ │ orr.w r2, r0, r7, lsl #24 │ │ lsrs r7, r7, #8 │ │ - b.n 5bbde │ │ + b.n 5bdee │ │ mov r4, r0 │ │ add r0, sp, #24 │ │ - bl 777de │ │ + bl 77846 │ │ mov r0, r4 │ │ - blx d6dd0 │ │ - bl 416fe │ │ - movs r5, #40 @ 0x28 │ │ - movs r0, r1 │ │ - lsrs r6, r0, #18 │ │ + blx d6de0 │ │ + bl 41a06 │ │ + movs r3, #40 @ 0x28 │ │ movs r0, r1 │ │ - vhadd.u d16, d14, d7 │ │ - beq.n 5bb42 │ │ - vcvt.u32.f32 , q11, #5 │ │ - movs r7, r0 │ │ - cdp2 0, 8, cr0, cr10, cr7, {0} │ │ - cdp2 0, 12, cr0, cr6, cr7, {0} │ │ - beq.n 5bd0a │ │ - vsra.u32 q8, q13, #5 │ │ + lsrs r6, r0, #10 │ │ movs r0, r1 │ │ - vhadd.u d0, d8, d7 │ │ + ldc2l 0, cr0, [lr, #-28]! @ 0xffffffe4 │ │ + ldmia r6, {r0, r3, r4, r5, r6} │ │ + vcvt.u16.f16 , q11, #5 │ │ + movs r7, r0 │ │ + stc2 0, cr0, [sl], {7} │ │ + stc2l 0, cr0, [r6], {7} │ │ + ldmia r6, {r0, r2, r4, r6} │ │ + @ instruction: 0xfffbff8a │ │ + movs r7, r0 │ │ + ldc2 0, cr0, [r8, #-28]! @ 0xffffffe4 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #44 @ 0x2c │ │ mov r5, r0 │ │ add.w r3, r5, #20 │ │ ldr r0, [r0, #16] │ │ mov r7, r1 │ │ ldmia r3, {r1, r2, r3} │ │ ldrd r6, sl, [r7, #4] │ │ str r7, [sp, #36] @ 0x24 │ │ str r6, [sp, #40] @ 0x28 │ │ strd r6, sl, [sp] │ │ - bl 4af60 │ │ + bl 4b268 │ │ ldr r1, [r5, #8] │ │ cmp r1, #0 │ │ - beq.n 5bd4e │ │ + beq.n 5bf5e │ │ mov.w lr, r0, lsr #25 │ │ mov.w r1, #16843009 @ 0x1010101 │ │ mul.w r2, lr, r1 │ │ ldrd r4, r6, [r5] │ │ and.w r8, r6, r0 │ │ sub.w ip, r4, #4 │ │ movs r3, #0 │ │ movs r7, #0 │ │ ldr.w r9, [r4, r8] │ │ eor.w r0, r9, r2 │ │ sub.w r1, r0, #16843009 @ 0x1010101 │ │ bic.w r0, r1, r0 │ │ bics.w fp, r0, #2139062143 @ 0x7f7f7f7f │ │ - beq.n 5bce8 │ │ + beq.n 5bef8 │ │ add r0, sp, #16 │ │ strd r2, lr, [sp, #28] │ │ stmia.w r0, {r3, r6, ip} │ │ rev.w r0, fp │ │ clz r0, r0 │ │ add.w r0, r8, r0, lsr #3 │ │ ands r0, r6 │ │ sub.w r0, ip, r0, lsl #2 │ │ ldr r0, [r0, #0] │ │ ldr r1, [r0, #8] │ │ cmp sl, r1 │ │ - bne.n 5bcd2 │ │ + bne.n 5bee2 │ │ ldr r1, [r0, #4] │ │ mov r2, sl │ │ ldr r0, [sp, #40] @ 0x28 │ │ - blx d8860 │ │ - cbz r0, 5bd48 │ │ + blx d8870 │ │ + cbz r0, 5bf58 │ │ add.w ip, sp, #16 │ │ sub.w r0, fp, #1 │ │ ldrd r2, lr, [sp, #28] │ │ ands.w fp, fp, r0 │ │ ldmia.w ip, {r3, r6, ip} │ │ - bne.n 5bcac │ │ + bne.n 5bebc │ │ bic.w r0, r9, #2139062143 @ 0x7f7f7f7f │ │ cmp r3, #1 │ │ - beq.n 5bd00 │ │ - cbz r0, 5bd0a │ │ + beq.n 5bf10 │ │ + cbz r0, 5bf1a │ │ rev r1, r0 │ │ clz r1, r1 │ │ add.w r1, r8, r1, lsr #3 │ │ ands r1, r6 │ │ str r1, [sp, #12] │ │ tst.w r0, r9, lsl #1 │ │ - bne.n 5bd18 │ │ + bne.n 5bf28 │ │ movs r3, #1 │ │ - b.n 5bd0c │ │ + b.n 5bf1c │ │ movs r3, #0 │ │ adds r7, #4 │ │ add.w r0, r7, r8 │ │ and.w r8, r0, r6 │ │ - b.n 5bc8c │ │ + b.n 5be9c │ │ ldr r7, [sp, #12] │ │ ldrsb r0, [r4, r7] │ │ cmp r0, #0 │ │ - bpl.n 5bd60 │ │ + bpl.n 5bf70 │ │ ldrd r1, r2, [r5, #8] │ │ and.w r0, r0, #1 │ │ strb.w lr, [r4, r7] │ │ subs r0, r1, r0 │ │ adds r1, r2, #1 │ │ strd r0, r1, [r5, #8] │ │ subs r0, r7, #4 │ │ @@ -77665,94 +77761,94 @@ │ │ str.w r1, [r0, #-4] │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add.w r2, r5, #16 │ │ mov r4, r0 │ │ mov r0, r5 │ │ movs r1, #1 │ │ - bl 4ac24 │ │ + bl 4af2c │ │ mov r0, r4 │ │ - b.n 5bc70 │ │ + b.n 5be80 │ │ ldr r0, [r4, #0] │ │ bic.w r0, r0, #2139062143 @ 0x7f7f7f7f │ │ rev r0, r0 │ │ clz r0, r0 │ │ lsrs r7, r0, #3 │ │ ldrb r0, [r4, r7] │ │ - b.n 5bd20 │ │ + b.n 5bf30 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #36 @ 0x24 │ │ mov r6, r0 │ │ add.w r3, r6, #20 │ │ ldr r0, [r0, #16] │ │ mov r5, r2 │ │ mov r7, r1 │ │ ldmia r3, {r1, r2, r3} │ │ strd r7, r5, [sp, #28] │ │ strd r7, r5, [sp] │ │ - bl 4a65c │ │ + bl 4a964 │ │ ldr r1, [r6, #8] │ │ cmp r1, #0 │ │ - beq.n 5be72 │ │ + beq.n 5c082 │ │ mov.w lr, r0, lsr #25 │ │ mov.w r1, #16843009 @ 0x1010101 │ │ mul.w r5, lr, r1 │ │ ldrd fp, r3, [r6] │ │ ldr r2, [sp, #32] │ │ and.w sl, r3, r0 │ │ movs r4, #0 │ │ movs r7, #0 │ │ ldr.w r8, [fp, sl] │ │ eor.w r0, r8, r5 │ │ sub.w r1, r0, #16843009 @ 0x1010101 │ │ bic.w r0, r1, r0 │ │ bics.w r9, r0, #2139062143 @ 0x7f7f7f7f │ │ - beq.n 5be08 │ │ + beq.n 5c018 │ │ add r0, sp, #16 │ │ stmia.w r0, {r3, r7, lr} │ │ rev.w r0, r9 │ │ clz r0, r0 │ │ add.w r0, sl, r0, lsr #3 │ │ ands r0, r3 │ │ sub.w r0, fp, r0, lsl #3 │ │ ldr.w r1, [r0, #-4] │ │ cmp r2, r1 │ │ - bne.n 5bdf6 │ │ + bne.n 5c006 │ │ ldr.w r1, [r0, #-8] │ │ ldr r0, [sp, #28] │ │ - blx d8860 │ │ + blx d8870 │ │ ldr r2, [sp, #32] │ │ - cbz r0, 5be6c │ │ + cbz r0, 5c07c │ │ add.w lr, sp, #16 │ │ sub.w r0, r9, #1 │ │ ands.w r9, r9, r0 │ │ ldmia.w lr, {r3, r7, lr} │ │ - bne.n 5bdce │ │ + bne.n 5bfde │ │ bic.w r0, r8, #2139062143 @ 0x7f7f7f7f │ │ cmp r4, #1 │ │ - beq.n 5be20 │ │ - cbz r0, 5be2a │ │ + beq.n 5c030 │ │ + cbz r0, 5c03a │ │ rev r1, r0 │ │ clz r1, r1 │ │ add.w r1, sl, r1, lsr #3 │ │ ands r1, r3 │ │ str r1, [sp, #12] │ │ tst.w r0, r8, lsl #1 │ │ - bne.n 5be38 │ │ + bne.n 5c048 │ │ movs r4, #1 │ │ - b.n 5be2c │ │ + b.n 5c03c │ │ movs r4, #0 │ │ adds r7, #4 │ │ add.w r0, r7, sl │ │ and.w sl, r0, r3 │ │ - b.n 5bdb2 │ │ + b.n 5bfc2 │ │ ldr r7, [sp, #12] │ │ ldrsb.w r0, [fp, r7] │ │ cmp r0, #0 │ │ - bpl.n 5be84 │ │ + bpl.n 5c094 │ │ ldrd r1, ip, [r6, #8] │ │ and.w r0, r0, #1 │ │ strb.w lr, [fp, r7] │ │ subs r0, r1, r0 │ │ add.w r1, ip, #1 │ │ strd r0, r1, [r6, #8] │ │ subs r0, r7, #4 │ │ @@ -77764,197 +77860,197 @@ │ │ strd r1, r2, [r0, #-8] │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add.w r2, r6, #16 │ │ mov r5, r0 │ │ mov r0, r6 │ │ movs r1, #1 │ │ - bl 4a230 │ │ + bl 4a538 │ │ mov r0, r5 │ │ - b.n 5bd98 │ │ + b.n 5bfa8 │ │ ldr.w r0, [fp] │ │ bic.w r0, r0, #2139062143 @ 0x7f7f7f7f │ │ rev r0, r0 │ │ clz r0, r0 │ │ lsrs r7, r0, #3 │ │ ldrb.w r0, [fp, r7] │ │ - b.n 5be42 │ │ + b.n 5c052 │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #4 │ │ mov r5, r0 │ │ mov r0, r2 │ │ mov r4, r2 │ │ mov r7, r1 │ │ - blx d87f0 │ │ - cbz r0, 5bec4 │ │ + blx d8810 │ │ + cbz r0, 5c0d4 │ │ mov r1, r7 │ │ mov r2, r4 │ │ mov r6, r0 │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #14 │ │ str r4, [r5, #12] │ │ movt r0, #32768 @ 0x8000 │ │ stmia r5!, {r0, r4, r6} │ │ add sp, #4 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #1 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #4 │ │ mov r4, r0 │ │ ldr r0, [r0, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r5, r6, [r4, #16] │ │ - cbz r6, 5bf1a │ │ + cbz r6, 5c12a │ │ add.w r7, r5, #16 │ │ - b.n 5bef0 │ │ + b.n 5c100 │ │ adds r7, #28 │ │ subs r6, #1 │ │ - beq.n 5bf1a │ │ + beq.n 5c12a │ │ ldr.w r0, [r7, #-16] │ │ lsls r0, r0, #1 │ │ - bne.n 5bf02 │ │ + bne.n 5c112 │ │ ldr.w r0, [r7, #-4] │ │ lsls r0, r0, #1 │ │ - beq.n 5beea │ │ - b.n 5bf12 │ │ + beq.n 5c0fa │ │ + b.n 5c122 │ │ ldr.w r0, [r7, #-12] │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr.w r0, [r7, #-4] │ │ lsls r0, r0, #1 │ │ - beq.n 5beea │ │ + beq.n 5c0fa │ │ ldr r0, [r7, #0] │ │ - blx d87c0 │ │ - b.n 5beea │ │ + blx d87d0 │ │ + b.n 5c0fa │ │ ldr r0, [r4, #12] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r0, r4, #24 │ │ - bl 5bf70 │ │ + bl 5c180 │ │ ldrd r5, r6, [r4, #40] @ 0x28 │ │ - cbz r6, 5bf5c │ │ + cbz r6, 5c16c │ │ add.w r7, r5, #16 │ │ ldr.w r0, [r7, #-16] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r7, #-12] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [r7, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r7, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r7, #24 │ │ subs r6, #1 │ │ - bne.n 5bf38 │ │ + bne.n 5c148 │ │ ldr r0, [r4, #36] @ 0x24 │ │ - cbz r0, 5bf6c │ │ + cbz r0, 5c17c │ │ mov r0, r5 │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #4 │ │ pop {r4, r5, r6, r7, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #4 │ │ ldrd sl, r9, [r0, #4] │ │ mov r8, r0 │ │ cmp.w r9, #0 │ │ - beq.n 5bfd0 │ │ + beq.n 5c1e0 │ │ movs r5, #0 │ │ - b.n 5bf98 │ │ + b.n 5c1a8 │ │ ldr r0, [r7, #12] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, fp │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #1 │ │ cmp r5, r9 │ │ - beq.n 5bfd0 │ │ + beq.n 5c1e0 │ │ rsb r0, r5, r5, lsl #3 │ │ ldr.w r1, [sl, r0, lsl #2] │ │ add.w r7, sl, r0, lsl #2 │ │ cmp r1, #0 │ │ itt ne │ │ ldrne r0, [r7, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd fp, r4, [r7, #16] │ │ cmp r4, #0 │ │ - beq.n 5bf86 │ │ + beq.n 5c196 │ │ add.w r6, fp, #4 │ │ ldr.w r0, [r6, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #16 │ │ subs r4, #1 │ │ - bne.n 5bfba │ │ - b.n 5bf86 │ │ + bne.n 5c1ca │ │ + b.n 5c196 │ │ ldr.w r0, [r8] │ │ - cbz r0, 5bfe2 │ │ + cbz r0, 5c1f2 │ │ mov r0, sl │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #140 @ 0x8c │ │ mov r4, r1 │ │ mov r8, r0 │ │ ldrd r0, r1, [r1, #12] │ │ ldr r2, [r4, #20] │ │ cmp r2, r1 │ │ - bcs.n 5c020 │ │ + bcs.n 5c230 │ │ movs r7, #19 │ │ movs r3, #1 │ │ movt r7, #128 @ 0x80 │ │ ldrb r6, [r0, r2] │ │ sub.w r5, r6, #9 │ │ cmp r5, #23 │ │ - bhi.n 5c04c │ │ + bhi.n 5c25c │ │ lsl.w r5, r3, r5 │ │ tst r5, r7 │ │ - beq.n 5c04c │ │ + beq.n 5c25c │ │ adds r2, #1 │ │ str r2, [r4, #20] │ │ cmp r1, r2 │ │ - bne.n 5c004 │ │ + bne.n 5c214 │ │ mov r2, r1 │ │ movs r3, #5 │ │ adds r2, #1 │ │ str r3, [sp, #88] @ 0x58 │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #88 @ 0x58 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ strd r1, r0, [r8] │ │ add sp, #140 @ 0x8c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ cmp r6, #91 @ 0x5b │ │ - bne.w 5c204 │ │ + bne.w 5c414 │ │ ldrb r3, [r4, #24] │ │ subs r3, #1 │ │ strb r3, [r4, #24] │ │ lsls r3, r3, #24 │ │ - beq.w 5c224 │ │ + beq.w 5c434 │ │ adds r0, r2, #1 │ │ str r0, [r4, #20] │ │ movs r0, #1 │ │ add.w r9, sp, #88 @ 0x58 │ │ str.w r8, [sp, #8] │ │ mov.w sl, #0 │ │ strb.w r0, [sp, #24] │ │ @@ -77963,15 +78059,15 @@ │ │ str r4, [sp, #4] │ │ str r4, [sp, #20] │ │ str.w sl, [sp, #36] @ 0x24 │ │ str r0, [sp, #16] │ │ strd sl, r0, [sp, #28] │ │ add.w r0, r9, #8 │ │ str r0, [sp, #12] │ │ - b.n 5c0b6 │ │ + b.n 5c2c6 │ │ ldr r0, [sp, #16] │ │ mov r1, lr │ │ add.w r8, r8, #1 │ │ str.w fp, [r0, sl] │ │ add r0, sl │ │ add.w sl, sl, #52 @ 0x34 │ │ str.w ip, [r0, #4] │ │ @@ -77979,170 +78075,171 @@ │ │ ldmia r1!, {r2, r3, r5, r6, r7} │ │ stmia r0!, {r2, r3, r5, r6, r7} │ │ ldmia.w r1, {r2, r3, r4, r5, r6, r7} │ │ stmia r0!, {r2, r3, r4, r5, r6, r7} │ │ str.w r8, [sp, #36] @ 0x24 │ │ add r1, sp, #20 │ │ mov r0, r9 │ │ - bl 5c49e │ │ + bl 5c67a │ │ ldrb.w r0, [sp, #88] @ 0x58 │ │ cmp r0, #1 │ │ - beq.n 5c10c │ │ + beq.n 5c31c │ │ ldrb.w r0, [sp, #89] @ 0x59 │ │ cmp r0, #1 │ │ - bne.n 5c11e │ │ + bne.n 5c32e │ │ ldr r1, [sp, #20] │ │ mov r0, r9 │ │ - bl 5c5ac │ │ + bl 5c788 │ │ ldrd fp, ip, [sp, #88] @ 0x58 │ │ cmp.w fp, #2147483648 @ 0x80000000 │ │ - beq.n 5c128 │ │ + beq.n 5c338 │ │ ldr r0, [sp, #12] │ │ add.w lr, sp, #40 @ 0x28 │ │ mov r1, lr │ │ ldmia r0!, {r2, r3, r4, r5, r6} │ │ stmia r1!, {r2, r3, r4, r5, r6} │ │ ldmia.w r0, {r2, r3, r4, r5, r6, r7} │ │ stmia r1!, {r2, r3, r4, r5, r6, r7} │ │ ldr r0, [sp, #28] │ │ cmp r8, r0 │ │ - bne.n 5c090 │ │ + bne.n 5c2a0 │ │ add r0, sp, #28 │ │ mov r4, ip │ │ - bl 47a1e │ │ + bl 47ec2 │ │ add.w lr, sp, #40 @ 0x28 │ │ mov ip, r4 │ │ ldr r0, [sp, #32] │ │ str r0, [sp, #16] │ │ - b.n 5c090 │ │ + b.n 5c2a0 │ │ ldr.w sl, [sp, #92] @ 0x5c │ │ ldr r6, [sp, #32] │ │ cmp.w r8, #0 │ │ ldrd r4, r9, [sp, #4] │ │ - bne.n 5c136 │ │ - b.n 5c146 │ │ + bne.n 5c346 │ │ + b.n 5c356 │ │ ldrd r7, sl, [sp, #28] │ │ ldrd r4, r9, [sp, #4] │ │ - b.n 5c154 │ │ + b.n 5c364 │ │ mov sl, ip │ │ ldr r6, [sp, #32] │ │ cmp.w r8, #0 │ │ ldrd r4, r9, [sp, #4] │ │ - beq.n 5c146 │ │ + beq.n 5c356 │ │ mov r7, r6 │ │ mov r5, r8 │ │ mov r0, r7 │ │ - bl 5becc │ │ + bl 5c0dc │ │ adds r7, #52 @ 0x34 │ │ subs r5, #1 │ │ - bne.n 5c13a │ │ + bne.n 5c34a │ │ ldr r0, [sp, #28] │ │ - cbz r0, 5c150 │ │ + cbz r0, 5c360 │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov.w r7, #2147483648 @ 0x80000000 │ │ ldrb r0, [r4, #24] │ │ adds r0, #1 │ │ strb r0, [r4, #24] │ │ mov r0, r4 │ │ - bl 5cf84 │ │ + bl 5d160 │ │ cmp.w r7, #2147483648 @ 0x80000000 │ │ - beq.n 5c1b4 │ │ + beq.n 5c3c4 │ │ cmp r0, #0 │ │ itttt eq │ │ strdeq r7, sl, [r9] │ │ streq.w r8, [r9, #8] │ │ addeq sp, #140 @ 0x8c │ │ ldmiaeq.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r5, r0 │ │ cmp.w r8, #0 │ │ - beq.n 5c190 │ │ + beq.n 5c3a0 │ │ mov r6, sl │ │ mov r0, r6 │ │ - bl 5becc │ │ + bl 5c0dc │ │ adds r6, #52 @ 0x34 │ │ subs.w r8, r8, #1 │ │ - bne.n 5c182 │ │ + bne.n 5c392 │ │ mov r1, sl │ │ mov r0, r5 │ │ - cbz r7, 5c1a0 │ │ + cbz r7, 5c3b0 │ │ mov r5, r0 │ │ mov r0, r1 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r5 │ │ mov r1, r4 │ │ - bl 5c46a │ │ + bl 22434 │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ strd r1, r0, [r9] │ │ add sp, #140 @ 0x8c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r2, sl │ │ - cbnz r0, 5c1bc │ │ + cbnz r0, 5c3cc │ │ mov r0, r2 │ │ - b.n 5c1a0 │ │ + b.n 5c3b0 │ │ ldr r1, [r0, #0] │ │ cmp r1, #1 │ │ - beq.n 5c1ce │ │ - cbnz r1, 5c1fe │ │ + beq.n 5c3de │ │ + cbnz r1, 5c40e │ │ ldr r1, [r0, #8] │ │ - cbz r1, 5c1fe │ │ + cbz r1, 5c40e │ │ mov r5, r0 │ │ ldr r6, [r0, #4] │ │ - b.n 5c1f2 │ │ + b.n 5c402 │ │ ldrb r1, [r0, #4] │ │ cmp r1, #3 │ │ - bne.n 5c1fe │ │ + bne.n 5c40e │ │ ldr r6, [r0, #8] │ │ mov r5, r0 │ │ ldrd r8, r7, [r6] │ │ ldr r1, [r7, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r8 │ │ blxne r1 │ │ ldr r0, [r7, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r1, r5 │ │ mov r0, sl │ │ - b.n 5c196 │ │ + b.n 5c3a6 │ │ mov r1, r0 │ │ mov r0, r2 │ │ - b.n 5c196 │ │ - ldr r2, [pc, #32] @ (5c228 ) │ │ + b.n 5c3a6 │ │ + ldr r2, [pc, #32] @ (5c438 ) │ │ add r1, sp, #88 @ 0x58 │ │ mov r0, r4 │ │ add r2, pc │ │ - bl 5c22c │ │ + bl 5c43c │ │ mov r1, r4 │ │ - bl 5c46a │ │ + bl 22434 │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ strd r1, r0, [r8] │ │ add sp, #140 @ 0x8c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r3, #24 │ │ - b.n 5c022 │ │ - @ instruction: 0xe9a20007 │ │ + b.n 5c232 │ │ + b.n 5c320 │ │ + movs r7, r0 │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #68 @ 0x44 │ │ mov r3, r0 │ │ mov r4, r0 │ │ ldr.w r0, [r3, #12]! │ │ mov ip, r1 │ │ ldrd r1, r5, [r3, #4] │ │ cmp r5, r1 │ │ - bcs.w 5c440 │ │ + bcs.w 5c650 │ │ ldrb r7, [r0, r5] │ │ sub.w r6, r7, #91 @ 0x5b │ │ cmp r6, #32 │ │ - bhi.n 5c2e4 │ │ + bhi.n 5c4f4 │ │ tbh [pc, r6, lsl #1] │ │ lsls r0, r1, #3 │ │ lsls r7, r3, #3 │ │ lsls r7, r3, #3 │ │ lsls r7, r3, #3 │ │ lsls r7, r3, #3 │ │ lsls r7, r3, #3 │ │ @@ -78172,408 +78269,386 @@ │ │ lsls r7, r3, #3 │ │ lsls r7, r3, #3 │ │ lsls r7, r3, #3 │ │ lsls r6, r0, #3 │ │ adds r6, r5, #1 │ │ str r6, [r4, #20] │ │ cmp r6, r1 │ │ - bcs.n 5c36e │ │ + bcs.n 5c57e │ │ ldrb r7, [r0, r6] │ │ adds r3, r5, #2 │ │ str r3, [r4, #20] │ │ cmp r7, #97 @ 0x61 │ │ - bne.w 5c3d6 │ │ + bne.w 5c5e6 │ │ mov r6, r1 │ │ cmp r1, r3 │ │ - beq.n 5c36e │ │ + beq.n 5c57e │ │ ldrb r7, [r0, r3] │ │ adds r3, r5, #3 │ │ str r3, [r4, #20] │ │ cmp r7, #108 @ 0x6c │ │ - bne.w 5c3d6 │ │ + bne.w 5c5e6 │ │ mov r6, r1 │ │ cmp r3, r1 │ │ - beq.n 5c36e │ │ + beq.n 5c57e │ │ ldrb r7, [r0, r3] │ │ adds r3, r5, #4 │ │ str r3, [r4, #20] │ │ cmp r7, #115 @ 0x73 │ │ - bne.w 5c3d6 │ │ + bne.w 5c5e6 │ │ mov r6, r1 │ │ cmp r3, r1 │ │ - beq.n 5c36e │ │ + beq.n 5c57e │ │ ldrb r7, [r0, r3] │ │ adds r3, r5, #5 │ │ str r3, [r4, #20] │ │ cmp r7, #101 @ 0x65 │ │ - bne.n 5c3d6 │ │ + bne.n 5c5e6 │ │ movs r0, #0 │ │ strh.w r0, [sp, #48] @ 0x30 │ │ - b.n 5c3c2 │ │ + b.n 5c5d2 │ │ cmp r7, #34 @ 0x22 │ │ - bne.n 5c38a │ │ + bne.n 5c59a │ │ movs r0, #0 │ │ mov r7, r2 │ │ str r0, [r4, #8] │ │ adds r0, r5, #1 │ │ str r0, [r4, #20] │ │ add r0, sp, #36 @ 0x24 │ │ mov r1, r3 │ │ mov r2, r4 │ │ mov r6, ip │ │ - bl 767d4 │ │ + bl 7683c │ │ ldrd r1, r0, [sp, #36] @ 0x24 │ │ cmp r1, #2 │ │ - bne.n 5c3e6 │ │ + bne.n 5c5f6 │ │ add sp, #68 @ 0x44 │ │ pop {r4, r5, r6, r7, pc} │ │ adds r6, r5, #1 │ │ str r6, [r4, #20] │ │ cmp r6, r1 │ │ - bcs.n 5c36e │ │ + bcs.n 5c57e │ │ ldrb r7, [r0, r6] │ │ adds r3, r5, #2 │ │ str r3, [r4, #20] │ │ cmp r7, #114 @ 0x72 │ │ - bne.n 5c3d6 │ │ + bne.n 5c5e6 │ │ mov r6, r1 │ │ cmp r1, r3 │ │ - beq.n 5c36e │ │ + beq.n 5c57e │ │ ldrb r7, [r0, r3] │ │ adds r3, r5, #3 │ │ str r3, [r4, #20] │ │ cmp r7, #117 @ 0x75 │ │ - bne.n 5c3d6 │ │ + bne.n 5c5e6 │ │ mov r6, r1 │ │ cmp r3, r1 │ │ - beq.n 5c36e │ │ + beq.n 5c57e │ │ ldrb r7, [r0, r3] │ │ adds r3, r5, #4 │ │ str r3, [r4, #20] │ │ cmp r7, #101 @ 0x65 │ │ - bne.n 5c3d6 │ │ + bne.n 5c5e6 │ │ mov.w r0, #256 @ 0x100 │ │ strh.w r0, [sp, #48] @ 0x30 │ │ - b.n 5c3c2 │ │ + b.n 5c5d2 │ │ adds r6, r5, #1 │ │ str r6, [r4, #20] │ │ cmp r6, r1 │ │ - bcs.n 5c36e │ │ + bcs.n 5c57e │ │ ldrb r7, [r0, r6] │ │ adds r3, r5, #2 │ │ str r3, [r4, #20] │ │ cmp r7, #117 @ 0x75 │ │ - bne.n 5c3d6 │ │ + bne.n 5c5e6 │ │ mov r6, r1 │ │ cmp r1, r3 │ │ - beq.n 5c36e │ │ + beq.n 5c57e │ │ ldrb r7, [r0, r3] │ │ adds r3, r5, #3 │ │ str r3, [r4, #20] │ │ cmp r7, #108 @ 0x6c │ │ - bne.n 5c3d6 │ │ + bne.n 5c5e6 │ │ mov r6, r1 │ │ cmp r3, r1 │ │ - bne.n 5c3b2 │ │ + bne.n 5c5c2 │ │ movs r2, #5 │ │ str r2, [sp, #48] @ 0x30 │ │ mov r2, r6 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #48 @ 0x30 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ add sp, #68 @ 0x44 │ │ pop {r4, r5, r6, r7, pc} │ │ cmp r7, #45 @ 0x2d │ │ - bne.n 5c410 │ │ + bne.n 5c620 │ │ adds r0, r5, #1 │ │ mov r7, r2 │ │ str r0, [r4, #20] │ │ mov r0, sp │ │ mov r1, r4 │ │ movs r2, #0 │ │ mov r6, ip │ │ - bl 5f412 │ │ + bl 5f502 │ │ ldrd r0, r1, [sp] │ │ eor.w r0, r0, #3 │ │ orrs r0, r1 │ │ - bne.n 5c3fa │ │ + bne.n 5c60a │ │ ldr r0, [sp, #8] │ │ add sp, #68 @ 0x44 │ │ pop {r4, r5, r6, r7, pc} │ │ ldrb r7, [r0, r3] │ │ adds r3, r5, #4 │ │ str r3, [r4, #20] │ │ cmp r7, #108 @ 0x6c │ │ - bne.n 5c3d6 │ │ + bne.n 5c5e6 │ │ movs r0, #7 │ │ strb.w r0, [sp, #48] @ 0x30 │ │ add r0, sp, #48 @ 0x30 │ │ mov r1, ip │ │ - bl 7528c │ │ + bl 75340 │ │ mov r1, r4 │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 5c46a │ │ + b.w 22434 │ │ movs r2, #9 │ │ str r2, [sp, #48] @ 0x30 │ │ mov r2, r3 │ │ - b.n 5c374 │ │ + b.n 5c584 │ │ movs r0, #11 │ │ - b.n 5c3be │ │ + b.n 5c5ce │ │ movs r0, #10 │ │ - b.n 5c3be │ │ + b.n 5c5ce │ │ ldr r1, [sp, #44] @ 0x2c │ │ mov r2, r7 │ │ strd r0, r1, [sp, #52] @ 0x34 │ │ movs r0, #5 │ │ strb.w r0, [sp, #48] @ 0x30 │ │ add r0, sp, #48 @ 0x30 │ │ mov r1, r6 │ │ - b.n 5c3c6 │ │ + b.n 5c5d6 │ │ mov r0, sp │ │ mov r1, r6 │ │ mov r2, r7 │ │ - bl 7524e │ │ + bl 75302 │ │ mov r1, r4 │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 5c46a │ │ + b.w 22434 │ │ sub.w r3, r7, #48 @ 0x30 │ │ cmp r3, #10 │ │ - bcs.n 5c440 │ │ + bcs.n 5c650 │ │ add r0, sp, #16 │ │ mov r5, r2 │ │ mov r1, r4 │ │ movs r2, #1 │ │ mov r6, ip │ │ - bl 5f412 │ │ + bl 5f502 │ │ ldrd r0, r1, [sp, #16] │ │ eor.w r0, r0, #3 │ │ orrs r0, r1 │ │ ittt eq │ │ ldreq r0, [sp, #24] │ │ addeq sp, #68 @ 0x44 │ │ popeq {r4, r5, r6, r7, pc} │ │ add r0, sp, #16 │ │ mov r1, r6 │ │ mov r2, r5 │ │ - b.n 5c400 │ │ + b.n 5c610 │ │ movs r2, #10 │ │ str r2, [sp, #48] @ 0x30 │ │ adds r2, r5, #1 │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #48 @ 0x30 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ mov r1, r4 │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 5c46a │ │ - ldr r2, [r0, #12] │ │ - cmp r2, #0 │ │ - it ne │ │ - bxne lr │ │ - push {r4, r5, r7, lr} │ │ - ldrd ip, r3, [r1, #12] │ │ - mov r4, r0 │ │ - ldr r2, [r1, #20] │ │ - mov r1, r3 │ │ - mov r0, ip │ │ - bl 75b28 │ │ - mov r2, r0 │ │ - mov r3, r1 │ │ - mov r1, r2 │ │ - mov r0, r4 │ │ - mov r2, r3 │ │ - bl 75c44 │ │ - mov r5, r0 │ │ - mov r0, r4 │ │ - blx d87c0 │ │ - mov r0, r5 │ │ - pop {r4, r5, r7, pc} │ │ + b.w 22434 │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #12 │ │ ldr r2, [r1, #0] │ │ mov ip, r1 │ │ ldrd r3, r1, [r2, #12] │ │ ldr r4, [r2, #20] │ │ cmp r4, r1 │ │ - bcs.n 5c542 │ │ + bcs.n 5c71e │ │ movw lr, #19 │ │ movs r5, #1 │ │ movt lr, #128 @ 0x80 │ │ ldrb r6, [r3, r4] │ │ sub.w r7, r6, #9 │ │ cmp r7, #23 │ │ - bhi.n 5c4dc │ │ + bhi.n 5c6b8 │ │ lsl.w r7, r5, r7 │ │ tst.w r7, lr │ │ - beq.n 5c4dc │ │ + beq.n 5c6b8 │ │ adds r4, #1 │ │ str r4, [r2, #20] │ │ cmp r1, r4 │ │ - bne.n 5c4ba │ │ + bne.n 5c696 │ │ mov r5, r0 │ │ mov r4, r1 │ │ - b.n 5c544 │ │ + b.n 5c720 │ │ cmp r6, #93 @ 0x5d │ │ - bne.n 5c4ea │ │ + bne.n 5c6c6 │ │ movs r1, #0 │ │ strb r1, [r0, #1] │ │ strb r1, [r0, #0] │ │ add sp, #12 │ │ pop {r4, r5, r6, r7, pc} │ │ ldrb.w r5, [ip, #4] │ │ - cbz r5, 5c500 │ │ + cbz r5, 5c6dc │ │ movs r1, #1 │ │ strb r1, [r0, #1] │ │ movs r1, #0 │ │ strb.w r1, [ip, #4] │ │ strb r1, [r0, #0] │ │ add sp, #12 │ │ pop {r4, r5, r6, r7, pc} │ │ cmp r6, #44 @ 0x2c │ │ - bne.n 5c578 │ │ + bne.n 5c754 │ │ adds r4, #1 │ │ str r4, [r2, #20] │ │ cmp r4, r1 │ │ - bcs.n 5c572 │ │ + bcs.n 5c74e │ │ movs r5, #1 │ │ ldrb r6, [r3, r4] │ │ sub.w r7, r6, #9 │ │ cmp r7, #23 │ │ - bhi.n 5c532 │ │ + bhi.n 5c70e │ │ lsl.w r7, r5, r7 │ │ tst.w r7, lr │ │ - beq.n 5c532 │ │ + beq.n 5c70e │ │ adds r4, #1 │ │ str r4, [r2, #20] │ │ cmp r1, r4 │ │ - bne.n 5c50e │ │ + bne.n 5c6ea │ │ mov r5, r0 │ │ mov r4, r1 │ │ movs r0, #5 │ │ - b.n 5c546 │ │ + b.n 5c722 │ │ cmp r6, #93 @ 0x5d │ │ - beq.n 5c57c │ │ + beq.n 5c758 │ │ movs r1, #1 │ │ strb r1, [r0, #1] │ │ movs r1, #0 │ │ strb r1, [r0, #0] │ │ add sp, #12 │ │ pop {r4, r5, r6, r7, pc} │ │ mov r5, r0 │ │ movs r0, #2 │ │ str r0, [sp, #0] │ │ adds r2, r4, #1 │ │ mov r0, r3 │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ mov r1, r2 │ │ mov r0, sp │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ mov r1, r0 │ │ mov r0, r5 │ │ str r1, [r5, #4] │ │ movs r1, #1 │ │ strb r1, [r0, #0] │ │ add sp, #12 │ │ pop {r4, r5, r6, r7, pc} │ │ mov r5, r0 │ │ movs r0, #5 │ │ - b.n 5c546 │ │ + b.n 5c722 │ │ movs r2, #7 │ │ - b.n 5c57e │ │ + b.n 5c75a │ │ movs r2, #21 │ │ str r2, [sp, #0] │ │ adds r2, r4, #1 │ │ mov r4, r0 │ │ mov r0, r3 │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ mov r1, r2 │ │ mov r0, sp │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ mov r1, r0 │ │ mov r0, r4 │ │ str r1, [r4, #4] │ │ movs r1, #1 │ │ strb r1, [r0, #0] │ │ add sp, #12 │ │ pop {r4, r5, r6, r7, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #228 @ 0xe4 │ │ mov fp, r1 │ │ mov r4, r0 │ │ ldrd r0, r1, [r1, #12] │ │ ldr.w r2, [fp, #20] │ │ cmp r2, r1 │ │ - bcs.n 5c5e8 │ │ + bcs.n 5c7c4 │ │ movs r7, #19 │ │ movs r3, #1 │ │ movt r7, #128 @ 0x80 │ │ ldrb r6, [r0, r2] │ │ sub.w r5, r6, #9 │ │ cmp r5, #23 │ │ - bhi.n 5c614 │ │ + bhi.n 5c7f0 │ │ lsl.w r5, r3, r5 │ │ tst r5, r7 │ │ - beq.n 5c614 │ │ + beq.n 5c7f0 │ │ adds r2, #1 │ │ str.w r2, [fp, #20] │ │ cmp r1, r2 │ │ - bne.n 5c5ca │ │ + bne.n 5c7a6 │ │ mov r2, r1 │ │ movs r3, #5 │ │ adds r2, #1 │ │ str r3, [sp, #136] @ 0x88 │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #136 @ 0x88 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ strd r1, r0, [r4] │ │ add sp, #228 @ 0xe4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ cmp r6, #91 @ 0x5b │ │ str r4, [sp, #48] @ 0x30 │ │ - beq.w 5c87e │ │ + beq.w 5ca5a │ │ cmp r6, #123 @ 0x7b │ │ - bne.w 5cc0e │ │ + bne.w 5cdea │ │ ldrb.w r3, [fp, #24] │ │ subs r3, #1 │ │ strb.w r3, [fp, #24] │ │ lsls r3, r3, #24 │ │ - beq.w 5cbd8 │ │ + beq.w 5cdb4 │ │ adds r0, r2, #1 │ │ str.w r0, [fp, #20] │ │ movs r0, #1 │ │ add r5, sp, #136 @ 0x88 │ │ strb.w r0, [sp, #204] @ 0xcc │ │ movs r0, #2 │ │ str r0, [sp, #12] │ │ @@ -78586,243 +78661,243 @@ │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str r0, [sp, #44] @ 0x2c │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str r0, [sp, #40] @ 0x28 │ │ movs r0, #0 │ │ str r0, [sp, #8] │ │ str r1, [sp, #32] │ │ - b.n 5c688 │ │ + b.n 5c864 │ │ ldr.w r0, [r8] │ │ movw r1, #24942 @ 0x616e │ │ movt r1, #25965 @ 0x656d │ │ cmp r0, r1 │ │ - beq.w 5c812 │ │ + beq.w 5c9ee │ │ mov r0, sl │ │ - bl 5ed3c │ │ + bl 5edd8 │ │ cmp r0, #0 │ │ - bne.w 5cd18 │ │ + bne.w 5cef4 │ │ mov r0, r5 │ │ mov r1, r4 │ │ - bl 5ebfc │ │ + bl 34854 │ │ ldrb.w r0, [sp, #136] @ 0x88 │ │ cmp r0, #1 │ │ - beq.w 5c8d6 │ │ + beq.w 5cab2 │ │ ldrb.w r0, [sp, #137] @ 0x89 │ │ cmp r0, #1 │ │ - bne.w 5c8dc │ │ + bne.w 5cab8 │ │ ldr.w sl, [sp, #200] @ 0xc8 │ │ movs r1, #0 │ │ ldr.w r0, [sl, #20] │ │ mov r2, sl │ │ str.w r1, [sl, #8] │ │ add.w r1, sl, #12 │ │ adds r0, #1 │ │ str.w r0, [sl, #20] │ │ mov r0, r5 │ │ - bl 767d4 │ │ + bl 7683c │ │ ldrd r0, r8, [sp, #136] @ 0x88 │ │ cmp r0, #2 │ │ - beq.w 5cd1a │ │ + beq.w 5cef6 │ │ ldr r0, [sp, #144] @ 0x90 │ │ subs r0, #4 │ │ cmp r0, #6 │ │ - bhi.n 5c67c │ │ + bhi.n 5c858 │ │ tbb [pc, r0] │ │ lsls r5, r0, #24 │ │ asrs r4, r0, #32 │ │ lsls r3, r7, #16 │ │ lsls r4, r3, #1 │ │ - b.n 5c67c │ │ - b.n 5c66a │ │ - ldr r7, [pc, #920] @ (5ca80 ) │ │ + b.n 5c858 │ │ + b.n 5c846 │ │ + ldr r7, [pc, #920] @ (5cc5c ) │ │ mov r0, r8 │ │ movs r2, #5 │ │ add r7, pc │ │ mov r1, r7 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.n 5c67c │ │ - b.n 5c846 │ │ - ldr r7, [pc, #904] @ (5ca84 ) │ │ + bne.n 5c858 │ │ + b.n 5ca22 │ │ + ldr r7, [pc, #904] @ (5cc60 ) │ │ mov r0, r8 │ │ movs r2, #7 │ │ add r7, pc │ │ mov r1, r7 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - beq.n 5c7dc │ │ - ldr r7, [pc, #888] @ (5ca88 ) │ │ + beq.n 5c9b8 │ │ + ldr r7, [pc, #888] @ (5cc64 ) │ │ mov r0, r8 │ │ movs r2, #7 │ │ add r7, pc │ │ mov r1, r7 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.n 5c67c │ │ + bne.n 5c858 │ │ ldr r0, [sp, #8] │ │ lsls r0, r0, #31 │ │ - bne.w 5cca2 │ │ + bne.w 5ce7e │ │ mov r0, sl │ │ - bl 5f174 │ │ + bl 5f264 │ │ cmp r0, #0 │ │ - bne.w 5cd18 │ │ + bne.w 5cef4 │ │ mov r0, r5 │ │ mov r1, sl │ │ - bl 5ea68 │ │ + bl 5ec44 │ │ ldrb.w r0, [sp, #136] @ 0x88 │ │ cmp r0, #1 │ │ - beq.w 5c8d6 │ │ + beq.w 5cab2 │ │ ldrb.w r0, [sp, #137] @ 0x89 │ │ str r0, [sp, #0] │ │ movs r0, #1 │ │ str r0, [sp, #8] │ │ - b.n 5c688 │ │ - ldr r7, [pc, #824] @ (5ca8c ) │ │ + b.n 5c864 │ │ + ldr r7, [pc, #824] @ (5cc68 ) │ │ mov r0, r8 │ │ movs r2, #8 │ │ add r7, pc │ │ mov r1, r7 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.w 5c67c │ │ + bne.w 5c858 │ │ ldr r0, [sp, #12] │ │ cmp r0, #2 │ │ - bne.w 5ccfe │ │ + bne.w 5ceda │ │ mov r0, sl │ │ - bl 5f174 │ │ + bl 5f264 │ │ cmp r0, #0 │ │ - bne.w 5cd18 │ │ + bne.w 5cef4 │ │ mov r0, r5 │ │ mov r1, sl │ │ - bl 5d148 │ │ + bl 5d324 │ │ ldrb.w r0, [sp, #136] @ 0x88 │ │ cmp r0, #1 │ │ - beq.w 5c8d6 │ │ + beq.w 5cab2 │ │ ldrb.w r0, [sp, #137] @ 0x89 │ │ str r0, [sp, #12] │ │ - b.n 5c688 │ │ - ldr r7, [pc, #764] @ (5ca90 ) │ │ + b.n 5c864 │ │ + ldr r7, [pc, #764] @ (5cc6c ) │ │ mov r0, r8 │ │ movs r2, #10 │ │ add r7, pc │ │ mov r1, r7 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.w 5c67c │ │ + bne.w 5c858 │ │ ldr r0, [sp, #44] @ 0x2c │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.w 5ccae │ │ + bne.w 5ce8a │ │ mov r0, sl │ │ - bl 5f174 │ │ + bl 5f264 │ │ cmp r0, #0 │ │ - bne.w 5cba4 │ │ + bne.w 5cd80 │ │ mov r0, r5 │ │ mov r1, sl │ │ - bl 5d2b0 │ │ + bl 5d48c │ │ ldrd r0, r8, [sp, #136] @ 0x88 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 5cba6 │ │ + beq.w 5cd82 │ │ ldr r1, [sp, #144] @ 0x90 │ │ strd r1, r8, [sp, #16] │ │ str r0, [sp, #44] @ 0x2c │ │ ldr r1, [sp, #32] │ │ - b.n 5c666 │ │ + b.n 5c842 │ │ ldr r0, [sp, #36] @ 0x24 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.w 5cca2 │ │ + bne.w 5ce7e │ │ mov r0, sl │ │ - bl 5f174 │ │ + bl 5f264 │ │ cmp r0, #0 │ │ - bne.w 5cbb0 │ │ + bne.w 5cd8c │ │ mov r0, r5 │ │ mov r1, sl │ │ - bl 5d9ec │ │ + bl 5dbc8 │ │ ldrd r0, r8, [sp, #136] @ 0x88 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 5cbb2 │ │ + beq.w 5cd8e │ │ ldr r1, [sp, #144] @ 0x90 │ │ mov r6, r8 │ │ str r1, [sp, #52] @ 0x34 │ │ str r0, [sp, #36] @ 0x24 │ │ ldr r1, [sp, #32] │ │ - b.n 5c666 │ │ + b.n 5c842 │ │ ldr r0, [sp, #40] @ 0x28 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.w 5ccea │ │ + bne.w 5cec6 │ │ mov r0, sl │ │ - bl 5f174 │ │ + bl 5f264 │ │ cmp r0, #0 │ │ - bne.w 5cc4c │ │ + bne.w 5ce28 │ │ mov r0, r5 │ │ mov r1, sl │ │ - bl 5d044 │ │ + bl 5d220 │ │ ldrd r1, r8, [sp, #136] @ 0x88 │ │ str r1, [sp, #40] @ 0x28 │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ - beq.w 5cc4e │ │ + beq.w 5ce2a │ │ ldr r1, [sp, #144] @ 0x90 │ │ str.w r8, [sp, #4] │ │ - b.n 5c666 │ │ + b.n 5c842 │ │ ldr r0, [sp, #28] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.w 5ccba │ │ + bne.w 5ce96 │ │ mov r0, sl │ │ - bl 5f174 │ │ + bl 5f264 │ │ cmp r0, #0 │ │ - bne.w 5cbc0 │ │ + bne.w 5cd9c │ │ mov r0, r5 │ │ mov r1, sl │ │ - bl 5e3d4 │ │ + bl 5e5b0 │ │ ldrd r1, r8, [sp, #136] @ 0x88 │ │ str r1, [sp, #28] │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ - beq.w 5cbc2 │ │ + beq.w 5cd9e │ │ str.w r8, [sp, #24] │ │ ldr.w r9, [sp, #144] @ 0x90 │ │ ldr r1, [sp, #32] │ │ - b.n 5c666 │ │ + b.n 5c842 │ │ ldrb.w r3, [fp, #24] │ │ subs r3, #1 │ │ strb.w r3, [fp, #24] │ │ lsls r3, r3, #24 │ │ - beq.w 5cbd8 │ │ + beq.w 5cdb4 │ │ adds r0, r2, #1 │ │ str.w r0, [fp, #20] │ │ movs r0, #1 │ │ add r1, sp, #192 @ 0xc0 │ │ strb.w r0, [sp, #196] @ 0xc4 │ │ add r0, sp, #136 @ 0x88 │ │ str.w fp, [sp, #192] @ 0xc0 │ │ - bl 5c49e │ │ + bl 5c67a │ │ ldrb.w r0, [sp, #136] @ 0x88 │ │ cmp r0, #1 │ │ - bne.n 5c8b4 │ │ + bne.n 5ca90 │ │ ldr.w r9, [sp, #140] @ 0x8c │ │ - b.n 5c8d0 │ │ + b.n 5caac │ │ ldrb.w r0, [sp, #137] @ 0x89 │ │ cmp r0, #1 │ │ - bne.w 5c9c8 │ │ + bne.w 5cba4 │ │ ldr r1, [sp, #192] @ 0xc0 │ │ add r0, sp, #136 @ 0x88 │ │ - bl 5d044 │ │ + bl 5d220 │ │ ldrd r6, r9, [sp, #136] @ 0x88 │ │ cmp.w r6, #2147483648 @ 0x80000000 │ │ - bne.n 5c940 │ │ + bne.n 5cb1c │ │ mov.w sl, #2147483648 @ 0x80000000 │ │ - b.n 5caf8 │ │ + b.n 5ccd4 │ │ ldr.w r8, [sp, #140] @ 0x8c │ │ - b.n 5cd1a │ │ + b.n 5cef6 │ │ ldr r5, [sp, #40] @ 0x28 │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ - beq.w 5cc2e │ │ + beq.w 5ce0a │ │ ldr r0, [sp, #44] @ 0x2c │ │ mov sl, r6 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ ldr r0, [sp, #52] @ 0x34 │ │ - beq.w 5cc5a │ │ + beq.w 5ce36 │ │ ldr r1, [sp, #8] │ │ ands.w r6, r1, #1 │ │ ldr r1, [sp, #0] │ │ it ne │ │ movne r6, r1 │ │ ldr r2, [sp, #28] │ │ subs.w r1, r2, #2147483648 @ 0x80000000 │ │ @@ -78844,186 +78919,186 @@ │ │ str r2, [sp, #24] │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ it eq │ │ moveq.w sl, #4 │ │ ldr r1, [sp, #12] │ │ ldr.w r8, [sp, #4] │ │ and.w r4, r1, #1 │ │ - b.n 5ce4c │ │ + b.n 5d028 │ │ add r0, sp, #136 @ 0x88 │ │ add r1, sp, #192 @ 0xc0 │ │ ldr r5, [sp, #144] @ 0x90 │ │ - bl 5c49e │ │ + bl 5c67a │ │ ldrb.w r0, [sp, #136] @ 0x88 │ │ cmp r0, #1 │ │ - bne.n 5c956 │ │ + bne.n 5cb32 │ │ ldr r5, [sp, #140] @ 0x8c │ │ - b.n 5cae6 │ │ + b.n 5ccc2 │ │ ldrb.w r0, [sp, #137] @ 0x89 │ │ cmp r0, #1 │ │ - bne.n 5c976 │ │ + bne.n 5cb52 │ │ ldr r1, [sp, #192] @ 0xc0 │ │ add r0, sp, #136 @ 0x88 │ │ - bl 5d148 │ │ + bl 5d324 │ │ ldrb.w r0, [sp, #136] @ 0x88 │ │ cmp r0, #1 │ │ - beq.n 5c952 │ │ + beq.n 5cb2e │ │ str r6, [sp, #40] @ 0x28 │ │ ldrb.w r6, [sp, #137] @ 0x89 │ │ - b.n 5c97a │ │ + b.n 5cb56 │ │ str r6, [sp, #40] @ 0x28 │ │ movs r6, #0 │ │ add r0, sp, #136 @ 0x88 │ │ add r1, sp, #192 @ 0xc0 │ │ - bl 5c49e │ │ + bl 5c67a │ │ ldrb.w r0, [sp, #136] @ 0x88 │ │ cmp r0, #1 │ │ - bne.n 5c98e │ │ + bne.n 5cb6a │ │ ldr r5, [sp, #140] @ 0x8c │ │ - b.n 5cae4 │ │ + b.n 5ccc0 │ │ ldrb.w r0, [sp, #137] @ 0x89 │ │ cmp r0, #1 │ │ - bne.n 5ca36 │ │ + bne.n 5cc12 │ │ ldr r1, [sp, #192] @ 0xc0 │ │ add r0, sp, #136 @ 0x88 │ │ str r5, [sp, #24] │ │ - bl 5d2b0 │ │ + bl 5d48c │ │ ldrd r0, r5, [sp, #136] @ 0x88 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 5cae4 │ │ + beq.w 5ccc0 │ │ str r0, [sp, #36] @ 0x24 │ │ add r1, sp, #192 @ 0xc0 │ │ ldr r0, [sp, #144] @ 0x90 │ │ str r0, [sp, #44] @ 0x2c │ │ add r0, sp, #136 @ 0x88 │ │ - bl 5c49e │ │ + bl 5c67a │ │ ldrb.w r0, [sp, #136] @ 0x88 │ │ cmp r0, #1 │ │ - bne.n 5c9d6 │ │ + bne.n 5cbb2 │ │ ldr.w r8, [sp, #140] @ 0x8c │ │ - b.n 5ca74 │ │ - ldr r1, [pc, #200] @ (5ca94 ) │ │ + b.n 5cc50 │ │ + ldr r1, [pc, #200] @ (5cc70 ) │ │ movs r0, #0 │ │ add r1, pc │ │ - bl 5d26c │ │ + bl 5d448 │ │ mov r9, r0 │ │ - b.n 5c8d0 │ │ + b.n 5caac │ │ ldrb.w r0, [sp, #137] @ 0x89 │ │ cmp r0, #1 │ │ - bne.n 5c9f4 │ │ + bne.n 5cbd0 │ │ ldr r1, [sp, #192] @ 0xc0 │ │ add r0, sp, #136 @ 0x88 │ │ - bl 5d9ec │ │ + bl 5dbc8 │ │ ldrd r0, r8, [sp, #136] @ 0x88 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.n 5ca74 │ │ + beq.n 5cc50 │ │ ldr r1, [sp, #144] @ 0x90 │ │ - b.n 5c9fc │ │ + b.n 5cbd8 │ │ mov.w r8, #4 │ │ movs r0, #0 │ │ movs r1, #0 │ │ str r1, [sp, #208] @ 0xd0 │ │ add r1, sp, #192 @ 0xc0 │ │ strd r0, r8, [sp, #200] @ 0xc8 │ │ add r0, sp, #136 @ 0x88 │ │ - bl 5c49e │ │ + bl 5c67a │ │ ldrb.w r0, [sp, #136] @ 0x88 │ │ cmp r0, #1 │ │ - bne.n 5ca18 │ │ + bne.n 5cbf4 │ │ ldr.w r8, [sp, #140] @ 0x8c │ │ - b.n 5ca6e │ │ + b.n 5cc4a │ │ ldrb.w r0, [sp, #137] @ 0x89 │ │ cmp r0, #1 │ │ - bne.n 5ca44 │ │ + bne.n 5cc20 │ │ ldr r1, [sp, #192] @ 0xc0 │ │ add r0, sp, #136 @ 0x88 │ │ - bl 5e3d4 │ │ + bl 5e5b0 │ │ ldrd r0, r8, [sp, #136] @ 0x88 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.n 5ca6e │ │ + beq.n 5cc4a │ │ ldr r1, [sp, #144] @ 0x90 │ │ - b.n 5ca4c │ │ - ldr r1, [pc, #96] @ (5ca98 ) │ │ + b.n 5cc28 │ │ + ldr r1, [pc, #96] @ (5cc74 ) │ │ movs r0, #2 │ │ add r1, pc │ │ - bl 5d26c │ │ + bl 5d448 │ │ mov r5, r0 │ │ - b.n 5cae4 │ │ + b.n 5ccc0 │ │ mov.w r8, #4 │ │ movs r0, #0 │ │ movs r1, #0 │ │ str r1, [sp, #224] @ 0xe0 │ │ add r1, sp, #192 @ 0xc0 │ │ strd r0, r8, [sp, #216] @ 0xd8 │ │ add r0, sp, #136 @ 0x88 │ │ - bl 5c49e │ │ + bl 5c67a │ │ ldrb.w r0, [sp, #136] @ 0x88 │ │ cmp r0, #1 │ │ - bne.w 5cb84 │ │ + bne.w 5cd60 │ │ add r0, sp, #216 @ 0xd8 │ │ ldr.w r8, [sp, #140] @ 0x8c │ │ - bl 5ebb4 │ │ + bl 5ed90 │ │ add r0, sp, #200 @ 0xc8 │ │ - bl 5bf70 │ │ + bl 5c180 │ │ ldr r1, [sp, #44] @ 0x2c │ │ - cbz r1, 5cad6 │ │ + cbz r1, 5ccb2 │ │ add.w r6, r5, #16 │ │ - b.n 5cab6 │ │ + b.n 5cc92 │ │ nop │ │ - ldr r6, [sp, #212] @ 0xd4 │ │ - vcvt.f32.u32 d25, d10, #5 │ │ - vcvt.f32.u32 d25, d4, #5 │ │ - @ instruction: 0xfffb9bda │ │ - @ instruction: 0xfffb9c96 │ │ - @ instruction: 0xfffbdf28 │ │ + ldr r4, [sp, #356] @ 0x164 │ │ + vcvt.f16.u16 d25, d30, #5 │ │ + vcvt.f16.u16 d25, d24, #5 │ │ + @ instruction: 0xfffb99fe │ │ + @ instruction: 0xfffb9aba │ │ + vcvt.u16.f16 , q6, #5 │ │ movs r7, r0 │ │ - udf #186 @ 0xba │ │ + bgt.n 5cc54 │ │ movs r7, r0 │ │ ldr.w r0, [r6, #-12] │ │ mov r7, r1 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r1, r7 │ │ ldr.w r0, [r6, #-4] │ │ lsls r0, r0, #1 │ │ - bne.n 5cac6 │ │ + bne.n 5cca2 │ │ adds r6, #28 │ │ subs r1, #1 │ │ - beq.n 5cad6 │ │ + beq.n 5ccb2 │ │ ldr.w r0, [r6, #-16] │ │ lsls r0, r0, #1 │ │ - bne.n 5ca9c │ │ + bne.n 5cc78 │ │ ldr.w r0, [r6, #-4] │ │ lsls r0, r0, #1 │ │ - beq.n 5cab0 │ │ + beq.n 5cc8c │ │ ldr r0, [r6, #0] │ │ mov r7, r1 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r1, r7 │ │ adds r6, #28 │ │ subs r1, #1 │ │ - bne.n 5cab6 │ │ + bne.n 5cc92 │ │ ldr r0, [sp, #36] @ 0x24 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r5, r8 │ │ ldr r6, [sp, #40] @ 0x28 │ │ cmp r6, #0 │ │ str r5, [sp, #52] @ 0x34 │ │ itt ne │ │ movne r0, r9 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov.w sl, #2147483648 @ 0x80000000 │ │ mov r9, r5 │ │ ldrb.w r0, [fp, #24] │ │ adds r0, #1 │ │ strb.w r0, [fp, #24] │ │ mov r0, fp │ │ - bl 5cf84 │ │ + bl 5d160 │ │ add r3, sp, #104 @ 0x68 │ │ ldr r7, [sp, #44] @ 0x2c │ │ str r7, [sp, #156] @ 0x9c │ │ mov ip, r9 │ │ ldmia r3, {r1, r2, r3} │ │ cmp.w sl, #2147483648 @ 0x80000000 │ │ ldr r7, [sp, #52] @ 0x34 │ │ @@ -79037,72 +79112,72 @@ │ │ ldr r1, [sp, #32] │ │ strd r8, r7, [sp, #144] @ 0x90 │ │ strd sl, r9, [sp, #136] @ 0x88 │ │ strd r5, r4, [sp, #160] @ 0xa0 │ │ strd r2, r3, [sp, #176] @ 0xb0 │ │ str r0, [sp, #188] @ 0xbc │ │ strb.w r1, [sp, #184] @ 0xb8 │ │ - bne.n 5cb5c │ │ + bne.n 5cd38 │ │ ldr.w r8, [sp, #48] @ 0x30 │ │ - cbz r0, 5cb70 │ │ + cbz r0, 5cd4c │ │ ldr r1, [r0, #0] │ │ cmp r1, #1 │ │ - beq.n 5cb78 │ │ + beq.n 5cd54 │ │ mov r9, ip │ │ cmp r1, #0 │ │ - beq.w 5cea4 │ │ - b.n 5cf00 │ │ + beq.w 5d080 │ │ + b.n 5d0dc │ │ ldr.w r8, [sp, #48] @ 0x30 │ │ cmp r0, #0 │ │ - bne.w 5ceb4 │ │ + bne.w 5d090 │ │ add r0, sp, #136 @ 0x88 │ │ add r1, sp, #56 @ 0x38 │ │ adds r0, #8 │ │ mov r9, ip │ │ - b.n 5cec8 │ │ + b.n 5d0a4 │ │ mov.w sl, #2147483648 @ 0x80000000 │ │ mov r9, ip │ │ - b.n 5cf08 │ │ + b.n 5d0e4 │ │ ldrb r1, [r0, #4] │ │ mov r9, ip │ │ cmp r1, #3 │ │ - bne.w 5cf00 │ │ - b.n 5ceda │ │ + bne.w 5d0dc │ │ + b.n 5d0b6 │ │ ldrb.w r0, [sp, #137] @ 0x89 │ │ cmp r0, #1 │ │ - bne.n 5cbdc │ │ + bne.n 5cdb8 │ │ ldr r1, [sp, #192] @ 0xc0 │ │ add r0, sp, #136 @ 0x88 │ │ - bl 5ea68 │ │ + bl 5ec44 │ │ ldrb.w r0, [sp, #136] @ 0x88 │ │ cmp r0, #1 │ │ - beq.w 5ca64 │ │ + beq.w 5cc40 │ │ ldrb.w r0, [sp, #137] @ 0x89 │ │ - b.n 5cbde │ │ + b.n 5cdba │ │ mov r8, r0 │ │ mov.w sl, #1 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ - b.n 5cd20 │ │ + b.n 5cefc │ │ mov r8, r0 │ │ ldr r0, [sp, #44] @ 0x2c │ │ mov.w sl, #1 │ │ mov.w r7, #2147483648 @ 0x80000000 │ │ str r0, [sp, #32] │ │ - b.n 5cd24 │ │ + b.n 5cf00 │ │ mov r8, r0 │ │ ldr r0, [sp, #44] @ 0x2c │ │ mov.w sl, #1 │ │ str r0, [sp, #32] │ │ ldr r7, [sp, #36] @ 0x24 │ │ ldr r5, [sp, #40] @ 0x28 │ │ cmp.w r7, #2147483648 @ 0x80000000 │ │ - bne.w 5cd70 │ │ - b.n 5cdde │ │ + bne.w 5cf4c │ │ + b.n 5cfba │ │ movs r3, #24 │ │ - b.n 5c5ea │ │ + b.n 5c7c6 │ │ movs r0, #0 │ │ ldr.w sl, [sp, #40] @ 0x28 │ │ ldr.w r8, [sp, #24] │ │ ldrd ip, r1, [sp, #200] @ 0xc8 │ │ str r0, [sp, #28] │ │ ldrd r3, r0, [sp, #216] @ 0xd8 │ │ ldr r2, [sp, #208] @ 0xd0 │ │ @@ -79110,249 +79185,249 @@ │ │ strd r3, r0, [sp, #104] @ 0x68 │ │ and.w r0, r6, #1 │ │ str r5, [sp, #52] @ 0x34 │ │ str r2, [sp, #128] @ 0x80 │ │ strd ip, r1, [sp, #120] @ 0x78 │ │ str.w lr, [sp, #112] @ 0x70 │ │ str r0, [sp, #32] │ │ - b.n 5caf8 │ │ - ldr r2, [pc, #812] @ (5cf3c ) │ │ + b.n 5ccd4 │ │ + ldr r2, [pc, #812] @ (5d118 ) │ │ add r1, sp, #136 @ 0x88 │ │ mov r0, fp │ │ add r2, pc │ │ - bl 5c22c │ │ + bl 5c43c │ │ mov r1, fp │ │ - bl 5c46a │ │ + bl 22434 │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ strd r1, r0, [r4] │ │ add sp, #228 @ 0xe4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r1, [pc, #840] @ (5cf78 ) │ │ + ldr r1, [pc, #840] @ (5d154 ) │ │ movs r3, #4 │ │ - ldr r0, [pc, #840] @ (5cf7c ) │ │ + ldr r0, [pc, #840] @ (5d158 ) │ │ add r1, pc │ │ - ldr r2, [pc, #840] @ (5cf80 ) │ │ + ldr r2, [pc, #840] @ (5d15c ) │ │ str r1, [sp, #140] @ 0x8c │ │ add r1, sp, #216 @ 0xd8 │ │ str r1, [sp, #136] @ 0x88 │ │ add r0, pc │ │ add r1, sp, #136 @ 0x88 │ │ add r2, pc │ │ strd r2, r3, [sp, #216] @ 0xd8 │ │ - bl 754ec │ │ + bl 5f210 │ │ mov r8, r0 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ mov.w sl, #1 │ │ str r0, [sp, #40] @ 0x28 │ │ - b.n 5cd1e │ │ - ldr r1, [pc, #784] @ (5cf6c ) │ │ + b.n 5cefa │ │ + ldr r1, [pc, #784] @ (5d148 ) │ │ movs r3, #10 │ │ - ldr r0, [pc, #784] @ (5cf70 ) │ │ + ldr r0, [pc, #784] @ (5d14c ) │ │ add r1, pc │ │ - ldr r2, [pc, #784] @ (5cf74 ) │ │ + ldr r2, [pc, #784] @ (5d150 ) │ │ str r1, [sp, #140] @ 0x8c │ │ add r1, sp, #216 @ 0xd8 │ │ str r1, [sp, #136] @ 0x88 │ │ add r0, pc │ │ add r1, sp, #136 @ 0x88 │ │ add r2, pc │ │ strd r2, r3, [sp, #216] @ 0xd8 │ │ - bl 754ec │ │ + bl 5f210 │ │ mov r8, r0 │ │ - cbz r5, 5cc8e │ │ + cbz r5, 5ce6a │ │ ldr r0, [sp, #4] │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r7, [sp, #36] @ 0x24 │ │ movs r0, #0 │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ str r1, [sp, #32] │ │ - b.n 5cc9c │ │ + b.n 5ce78 │ │ movs r0, #0 │ │ ldr r7, [sp, #36] @ 0x24 │ │ str r0, [sp, #40] @ 0x28 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str r0, [sp, #32] │ │ movs r0, #0 │ │ mov r6, sl │ │ mov sl, r0 │ │ - b.n 5cd24 │ │ - ldr r1, [pc, #704] @ (5cf64 ) │ │ + b.n 5cf00 │ │ + ldr r1, [pc, #704] @ (5d140 ) │ │ movs r2, #7 │ │ - ldr r0, [pc, #704] @ (5cf68 ) │ │ + ldr r0, [pc, #704] @ (5d144 ) │ │ add r1, pc │ │ add r0, pc │ │ - b.n 5cd08 │ │ - ldr r1, [pc, #664] @ (5cf48 ) │ │ + b.n 5cee4 │ │ + ldr r1, [pc, #664] @ (5d124 ) │ │ movs r2, #10 │ │ - ldr r0, [pc, #664] @ (5cf4c ) │ │ + ldr r0, [pc, #664] @ (5d128 ) │ │ add r1, pc │ │ add r0, pc │ │ - b.n 5cd08 │ │ - ldr r1, [pc, #660] @ (5cf50 ) │ │ + b.n 5cee4 │ │ + ldr r1, [pc, #660] @ (5d12c ) │ │ mov r5, r0 │ │ - ldr r0, [pc, #660] @ (5cf54 ) │ │ + ldr r0, [pc, #660] @ (5d130 ) │ │ movs r2, #5 │ │ add r1, pc │ │ str r1, [sp, #140] @ 0x8c │ │ add r1, sp, #216 @ 0xd8 │ │ str r1, [sp, #136] @ 0x88 │ │ add r0, pc │ │ add r1, sp, #136 @ 0x88 │ │ strd r7, r2, [sp, #216] @ 0xd8 │ │ - bl 754ec │ │ + bl 5f210 │ │ mov r8, r0 │ │ ldr r0, [sp, #44] @ 0x2c │ │ mov.w sl, #1 │ │ str r0, [sp, #32] │ │ ldr r7, [sp, #36] @ 0x24 │ │ cmp.w r9, #0 │ │ - bne.n 5cd32 │ │ - b.n 5cd5e │ │ - ldr r1, [pc, #620] @ (5cf58 ) │ │ + bne.n 5cf0e │ │ + b.n 5cf3a │ │ + ldr r1, [pc, #620] @ (5d134 ) │ │ movs r3, #4 │ │ - ldr r0, [pc, #620] @ (5cf5c ) │ │ - ldr r2, [pc, #620] @ (5cf60 ) │ │ + ldr r0, [pc, #620] @ (5d138 ) │ │ + ldr r2, [pc, #620] @ (5d13c ) │ │ add r1, pc │ │ add r0, pc │ │ add r2, pc │ │ strd r2, r3, [sp, #216] @ 0xd8 │ │ - b.n 5cd0c │ │ - ldr r1, [pc, #576] @ (5cf40 ) │ │ + b.n 5cee8 │ │ + ldr r1, [pc, #576] @ (5d11c ) │ │ movs r2, #8 │ │ - ldr r0, [pc, #576] @ (5cf44 ) │ │ + ldr r0, [pc, #576] @ (5d120 ) │ │ add r1, pc │ │ add r0, pc │ │ str r2, [sp, #220] @ 0xdc │ │ str r7, [sp, #216] @ 0xd8 │ │ str r1, [sp, #140] @ 0x8c │ │ add r1, sp, #216 @ 0xd8 │ │ str r1, [sp, #136] @ 0x88 │ │ add r1, sp, #136 @ 0x88 │ │ - bl 754ec │ │ + bl 5f210 │ │ mov r8, r0 │ │ mov.w sl, #1 │ │ ldr r0, [sp, #44] @ 0x2c │ │ str r0, [sp, #32] │ │ ldr r7, [sp, #36] @ 0x24 │ │ ldr r5, [sp, #28] │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ - beq.n 5cd68 │ │ + beq.n 5cf44 │ │ cmp.w r9, #0 │ │ - beq.n 5cd5e │ │ + beq.n 5cf3a │ │ ldr r0, [sp, #24] │ │ add.w r4, r0, #16 │ │ ldr.w r0, [r4, #-16] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r4, #-12] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [r4, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r4, #24 │ │ subs.w r9, r9, #1 │ │ - bne.n 5cd38 │ │ + bne.n 5cf14 │ │ cmp r5, #0 │ │ itt ne │ │ ldrne r0, [sp, #24] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r5, [sp, #40] @ 0x28 │ │ cmp.w r7, #2147483648 @ 0x80000000 │ │ - beq.n 5cdde │ │ + beq.n 5cfba │ │ ldr r0, [sp, #52] @ 0x34 │ │ str.w sl, [sp, #28] │ │ - cbz r0, 5cdcc │ │ + cbz r0, 5cfa8 │ │ movs r4, #0 │ │ - b.n 5cd92 │ │ + b.n 5cf6e │ │ ldr r0, [r6, #12] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r9 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r4, #1 │ │ ldr r0, [sp, #52] @ 0x34 │ │ mov r6, sl │ │ cmp r4, r0 │ │ - beq.n 5cdcc │ │ + beq.n 5cfa8 │ │ rsb r0, r4, r4, lsl #3 │ │ mov sl, r6 │ │ ldr.w r1, [r6, r0, lsl #2] │ │ add.w r6, r6, r0, lsl #2 │ │ cmp r1, #0 │ │ itt ne │ │ ldrne r0, [r6, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r9, r5, [r6, #16] │ │ cmp r5, #0 │ │ - beq.n 5cd7c │ │ + beq.n 5cf58 │ │ add.w r7, r9, #4 │ │ ldr.w r0, [r7, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r7, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r7, #16 │ │ subs r5, #1 │ │ - bne.n 5cdb6 │ │ - b.n 5cd7c │ │ + bne.n 5cf92 │ │ + b.n 5cf58 │ │ ldr r0, [sp, #36] @ 0x24 │ │ ldr r5, [sp, #40] @ 0x28 │ │ cmp r0, #0 │ │ ldr.w sl, [sp, #28] │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r9, [sp, #4] │ │ ldr r7, [sp, #20] │ │ ldr r0, [sp, #32] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.n 5ce32 │ │ + beq.n 5d00e │ │ ldr r6, [sp, #16] │ │ - cbz r6, 5ce28 │ │ + cbz r6, 5d004 │ │ add.w r4, r7, #16 │ │ - b.n 5ce0c │ │ + b.n 5cfe8 │ │ ldr.w r0, [r4, #-12] │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr.w r0, [r4, #-4] │ │ lsls r0, r0, #1 │ │ - bne.n 5ce1c │ │ + bne.n 5cff8 │ │ adds r4, #28 │ │ subs r6, #1 │ │ - beq.n 5ce28 │ │ + beq.n 5d004 │ │ ldr.w r0, [r4, #-16] │ │ lsls r0, r0, #1 │ │ - bne.n 5cdf6 │ │ + bne.n 5cfd2 │ │ ldr.w r0, [r4, #-4] │ │ lsls r0, r0, #1 │ │ - beq.n 5ce06 │ │ + beq.n 5cfe2 │ │ ldr r0, [r4, #0] │ │ - blx d87c0 │ │ + blx d87d0 │ │ adds r4, #28 │ │ subs r6, #1 │ │ - bne.n 5ce0c │ │ + bne.n 5cfe8 │ │ ldr r0, [sp, #32] │ │ - cbz r0, 5ce32 │ │ + cbz r0, 5d00e │ │ mov r0, r7 │ │ - blx d87c0 │ │ + blx d87d0 │ │ bics.w r0, r5, #2147483648 @ 0x80000000 │ │ it ne │ │ movne r0, #1 │ │ tst.w r0, sl │ │ itt ne │ │ movne r0, r9 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ movs r4, #0 │ │ mov.w r5, #2147483648 @ 0x80000000 │ │ ldrb.w r0, [fp, #24] │ │ adds r0, #1 │ │ strb.w r0, [fp, #24] │ │ mov r0, fp │ │ - bl 5f20c │ │ + bl 5f2fc │ │ ldr r1, [sp, #24] │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ str r1, [sp, #176] @ 0xb0 │ │ ldr r1, [sp, #8] │ │ str r1, [sp, #172] @ 0xac │ │ ldr r1, [sp, #52] @ 0x34 │ │ str r1, [sp, #168] @ 0xa8 │ │ @@ -79367,118 +79442,118 @@ │ │ ldr r1, [sp, #32] │ │ str r0, [sp, #188] @ 0xbc │ │ strb.w r6, [sp, #185] @ 0xb9 │ │ strb.w r4, [sp, #184] @ 0xb8 │ │ strd r7, sl, [sp, #160] @ 0xa0 │ │ str r1, [sp, #144] @ 0x90 │ │ strd r5, r8, [sp, #136] @ 0x88 │ │ - bne.n 5ceae │ │ + bne.n 5d08a │ │ ldr.w r8, [sp, #48] @ 0x30 │ │ - cbz r0, 5cf04 │ │ + cbz r0, 5d0e0 │ │ ldr r1, [r0, #0] │ │ cmp r1, #1 │ │ - beq.n 5ced4 │ │ - cbnz r1, 5cf00 │ │ + beq.n 5d0b0 │ │ + cbnz r1, 5d0dc │ │ ldr r1, [r0, #8] │ │ - cbz r1, 5cf00 │ │ + cbz r1, 5d0dc │ │ mov r7, r0 │ │ ldr r4, [r0, #4] │ │ - b.n 5cef8 │ │ + b.n 5d0d4 │ │ ldr.w r8, [sp, #48] @ 0x30 │ │ - cbz r0, 5cec0 │ │ + cbz r0, 5d09c │ │ add r1, sp, #136 @ 0x88 │ │ mov r9, r0 │ │ mov r0, r1 │ │ - bl 5becc │ │ - b.n 5cf04 │ │ + bl 5c0dc │ │ + b.n 5d0e0 │ │ add r0, sp, #136 @ 0x88 │ │ mov sl, r5 │ │ adds r0, #8 │ │ add r1, sp, #56 @ 0x38 │ │ ldmia r0!, {r2, r3, r5, r6, r7} │ │ stmia r1!, {r2, r3, r5, r6, r7} │ │ ldmia.w r0, {r2, r3, r4, r5, r6, r7} │ │ stmia r1!, {r2, r3, r4, r5, r6, r7} │ │ - b.n 5cf08 │ │ + b.n 5d0e4 │ │ ldrb r1, [r0, #4] │ │ cmp r1, #3 │ │ - bne.n 5cf00 │ │ + bne.n 5d0dc │ │ ldr r4, [r0, #8] │ │ mov r7, r0 │ │ ldrd r6, r5, [r4] │ │ ldr r1, [r5, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r6 │ │ blxne r1 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r7 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov.w sl, #2147483648 @ 0x80000000 │ │ cmp.w sl, #2147483648 @ 0x80000000 │ │ - beq.n 5cf28 │ │ + beq.n 5d104 │ │ add r1, sp, #56 @ 0x38 │ │ add.w r0, r8, #8 │ │ ldmia r1!, {r2, r3, r5, r6, r7} │ │ stmia r0!, {r2, r3, r5, r6, r7} │ │ ldmia.w r1, {r2, r3, r4, r5, r6, r7} │ │ stmia r0!, {r2, r3, r4, r5, r6, r7} │ │ strd sl, r9, [r8] │ │ add sp, #228 @ 0xe4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r0, r9 │ │ mov r1, fp │ │ - bl 5c46a │ │ + bl 22434 │ │ mov r9, r0 │ │ strd sl, r9, [r8] │ │ add sp, #228 @ 0xe4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - b.n 5cf90 │ │ + udf #108 @ 0x6c │ │ movs r7, r0 │ │ - movs r4, #97 @ 0x61 │ │ - movs r0, r0 │ │ - stmia r1!, {r0, r1, r2, r5, r7} │ │ - vsri.64 d18, d17, #6 │ │ - movs r0, r0 │ │ - stmia r1!, {r0, r1, r2, r4, r5, r6, r7} │ │ - vrintx.f32 d18, d19 │ │ - movs r0, r0 │ │ - stmia r1!, {r0, r1, r5, r6, r7} │ │ - vsri.32 q9, , #6 │ │ - movs r0, r0 │ │ - stmia r1!, {r0, r3, r4, r5, r7} │ │ - vrinta.f32 , q13 │ │ - vsri.64 d18, d29, #5 │ │ - movs r0, r0 │ │ - stmia r2!, {r0, r1} │ │ - vrinta.f32 d18, d5 │ │ + movs r3, #33 @ 0x21 │ │ movs r0, r0 │ │ - pop {r0, r2, r4, r5, r6} │ │ - vrintp.f32 , q0 │ │ - vsli.32 d18, d17, #27 │ │ + ittee ne │ │ + vrsrane.u32 q9, , #6 │ │ + movne r0, r0 │ │ + itett vs @ unpredictable │ │ + @ instruction: 0xfffa2363 │ │ + movvc r0, r0 │ │ + itete pl @ unpredictable │ │ + vrsrapl.u32 d18, d19, #6 │ │ + movmi r0, r0 │ │ + itete cs @ unpredictable │ │ + sha1su1cs.32 , q7 @ │ │ + vrsracc.u32 q9, , #5 │ │ + movcs r0, r0 │ │ + itete vc @ unpredictable │ │ + sha256su0vc.32 q9, @ │ │ + movvs r0, r0 │ │ + hlt 0x001d │ │ + vrintzvs.f32 , q10 @ │ │ + vrsra.u64 q9, , #5 │ │ movs r0, r0 │ │ - pop {r0, r5, r7} │ │ - vqshlu.s32 d25, d14, #26 │ │ + revsh r1, r1 │ │ + vrintn.f32 , q1 │ │ vsli.64 d27, d16, #59 @ 0x3b │ │ sub sp, #16 │ │ mov r5, r0 │ │ ldr r0, [r0, #12] │ │ ldrd r1, r3, [r5, #16] │ │ cmp r3, r1 │ │ - bcs.n 5cfd0 │ │ + bcs.n 5d1ac │ │ ldrb r2, [r0, r3] │ │ sub.w r4, r2, #9 │ │ cmp r4, #35 @ 0x23 │ │ - bhi.n 5d010 │ │ + bhi.n 5d1ec │ │ tbb [pc, r4] │ │ asrs r2, r2, #8 │ │ subs r7, #63 @ 0x3f │ │ subs r7, #18 │ │ subs r7, #63 @ 0x3f │ │ subs r7, #63 @ 0x3f │ │ subs r7, #63 @ 0x3f │ │ @@ -79493,390 +79568,390 @@ │ │ subs r7, #63 @ 0x3f │ │ subs r7, #63 @ 0x3f │ │ subs r7, #63 @ 0x3f │ │ adds r7, r7, r4 │ │ adds r3, #1 │ │ str r3, [r5, #20] │ │ cmp r1, r3 │ │ - bne.n 5cf94 │ │ + bne.n 5d170 │ │ mov r3, r1 │ │ movs r2, #2 │ │ - b.n 5d022 │ │ + b.n 5d1fe │ │ adds r3, #1 │ │ str r3, [r5, #20] │ │ cmp r3, r1 │ │ - bcs.n 5d020 │ │ + bcs.n 5d1fc │ │ movw lr, #19 │ │ mov.w ip, #1 │ │ movt lr, #128 @ 0x80 │ │ ldrb r4, [r0, r3] │ │ sub.w r2, r4, #9 │ │ cmp r2, #23 │ │ - bhi.n 5d008 │ │ + bhi.n 5d1e4 │ │ lsl.w r2, ip, r2 │ │ tst.w r2, lr │ │ - beq.n 5d008 │ │ + beq.n 5d1e4 │ │ adds r3, #1 │ │ str r3, [r5, #20] │ │ cmp r1, r3 │ │ - bne.n 5cfe8 │ │ + bne.n 5d1c4 │ │ mov r3, r1 │ │ - b.n 5d020 │ │ + b.n 5d1fc │ │ cmp r4, #93 @ 0x5d │ │ - bne.n 5d020 │ │ + bne.n 5d1fc │ │ movs r2, #21 │ │ - b.n 5d022 │ │ + b.n 5d1fe │ │ cmp r2, #93 @ 0x5d │ │ itttt eq │ │ addeq r0, r3, #1 │ │ streq r0, [r5, #20] │ │ moveq r0, #0 │ │ addeq sp, #16 │ │ it eq │ │ popeq {r4, r5, r7, pc} │ │ movs r2, #22 │ │ str r2, [sp, #4] │ │ adds r2, r3, #1 │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #4 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ add sp, #16 │ │ pop {r4, r5, r7, pc} │ │ - bmi.n 5cfee │ │ + bmi.n 5d1ca │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #16 │ │ mov r2, r1 │ │ mov r8, r0 │ │ ldr.w r0, [r2, #12]! │ │ mov r5, r1 │ │ ldrd r1, r3, [r2, #4] │ │ cmp r3, r1 │ │ - bcs.n 5d080 │ │ + bcs.n 5d25c │ │ movs r6, #19 │ │ mov.w ip, #1 │ │ movt r6, #128 @ 0x80 │ │ ldrb r4, [r0, r3] │ │ subs r4, #9 │ │ cmp r4, #25 │ │ - bhi.n 5d11a │ │ + bhi.n 5d2f6 │ │ lsl.w r7, ip, r4 │ │ tst r7, r6 │ │ - beq.n 5d0ac │ │ + beq.n 5d288 │ │ adds r3, #1 │ │ str r3, [r5, #20] │ │ cmp r1, r3 │ │ - bne.n 5d066 │ │ + bne.n 5d242 │ │ mov r3, r1 │ │ movs r2, #5 │ │ str r2, [sp, #4] │ │ adds r2, r3, #1 │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #4 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ strd r1, r0, [r8] │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ cmp r4, #25 │ │ - bne.n 5d11a │ │ + bne.n 5d2f6 │ │ movs r0, #0 │ │ mov r1, r2 │ │ str r0, [r5, #8] │ │ adds r0, r3, #1 │ │ str r0, [r5, #20] │ │ add r0, sp, #4 │ │ mov r2, r5 │ │ - bl 767d4 │ │ + bl 7683c │ │ ldrd r0, r6, [sp, #4] │ │ cmp r0, #2 │ │ - bne.n 5d0d8 │ │ + bne.n 5d2b4 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ strd r0, r6, [r8] │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ ldr r5, [sp, #12] │ │ lsls r0, r0, #31 │ │ - beq.n 5d0f2 │ │ + beq.n 5d2ce │ │ cmp.w r5, #4294967295 @ 0xffffffff │ │ - ble.n 5d0f8 │ │ - cbz r5, 5d100 │ │ + ble.n 5d2d4 │ │ + cbz r5, 5d2dc │ │ mov r0, r5 │ │ - blx d87f0 │ │ - cbz r0, 5d13a │ │ + blx d8810 │ │ + cbz r0, 5d316 │ │ mov r7, r0 │ │ - b.n 5d102 │ │ + b.n 5d2de │ │ cmp.w r5, #4294967295 @ 0xffffffff │ │ - bgt.n 5d0fc │ │ - bl 3e03c │ │ + bgt.n 5d2d8 │ │ + bl 3e344 │ │ cmp r5, #0 │ │ - bne.n 5d0e6 │ │ + bne.n 5d2c2 │ │ movs r7, #1 │ │ mov r0, r7 │ │ mov r1, r6 │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ strd r5, r7, [r8] │ │ str.w r5, [r8, #8] │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ - ldr r2, [pc, #40] @ (5d144 ) │ │ + ldr r2, [pc, #40] @ (5d320 ) │ │ add r1, sp, #4 │ │ mov r0, r5 │ │ add r2, pc │ │ - bl 5c22c │ │ + bl 5c43c │ │ mov r1, r5 │ │ - bl 5c46a │ │ + bl 22434 │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ strd r1, r0, [r8] │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movs r0, #1 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - bge.n 5d0e0 │ │ + bls.n 5d324 │ │ movs r7, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #16 │ │ mov r5, r1 │ │ mov r8, r0 │ │ ldrd r0, r1, [r1, #12] │ │ ldr r4, [r5, #20] │ │ cmp r4, r1 │ │ - bcs.n 5d180 │ │ + bcs.n 5d35c │ │ movs r3, #19 │ │ movs r2, #1 │ │ movt r3, #128 @ 0x80 │ │ ldrb r6, [r0, r4] │ │ sub.w r7, r6, #9 │ │ cmp r7, #23 │ │ - bhi.n 5d18e │ │ + bhi.n 5d36a │ │ lsl.w r7, r2, r7 │ │ tst r7, r3 │ │ - beq.n 5d18e │ │ + beq.n 5d36a │ │ adds r4, #1 │ │ str r4, [r5, #20] │ │ cmp r1, r4 │ │ - bne.n 5d164 │ │ + bne.n 5d340 │ │ mov r4, r1 │ │ movs r2, #5 │ │ str r2, [sp, #4] │ │ adds r2, r4, #1 │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - b.n 5d22a │ │ + b.n 5d406 │ │ cmp r6, #102 @ 0x66 │ │ - beq.n 5d1ce │ │ + beq.n 5d3aa │ │ cmp r6, #116 @ 0x74 │ │ - bne.n 5d252 │ │ + bne.n 5d42e │ │ adds r2, r4, #1 │ │ mov r3, r1 │ │ str r2, [r5, #20] │ │ cmp r2, r1 │ │ it hi │ │ movhi r3, r2 │ │ - bcs.n 5d222 │ │ + bcs.n 5d3fe │ │ ldrb r7, [r0, r2] │ │ adds r2, r4, #2 │ │ str r2, [r5, #20] │ │ cmp r7, #114 @ 0x72 │ │ - bne.n 5d24c │ │ + bne.n 5d428 │ │ cmp r2, r3 │ │ - beq.n 5d224 │ │ + beq.n 5d400 │ │ ldrb r7, [r0, r2] │ │ adds r2, r4, #3 │ │ str r2, [r5, #20] │ │ cmp r7, #117 @ 0x75 │ │ - bne.n 5d24c │ │ + bne.n 5d428 │ │ cmp r2, r3 │ │ - beq.n 5d224 │ │ + beq.n 5d400 │ │ ldrb r3, [r0, r2] │ │ adds r2, r4, #4 │ │ str r2, [r5, #20] │ │ cmp r3, #101 @ 0x65 │ │ - bne.n 5d24c │ │ + bne.n 5d428 │ │ movs r0, #1 │ │ - b.n 5d212 │ │ + b.n 5d3ee │ │ adds r2, r4, #1 │ │ mov r3, r1 │ │ str r2, [r5, #20] │ │ cmp r2, r1 │ │ it hi │ │ movhi r3, r2 │ │ - bcs.n 5d222 │ │ + bcs.n 5d3fe │ │ ldrb r7, [r0, r2] │ │ adds r2, r4, #2 │ │ str r2, [r5, #20] │ │ cmp r7, #97 @ 0x61 │ │ - bne.n 5d24c │ │ + bne.n 5d428 │ │ cmp r2, r3 │ │ - beq.n 5d224 │ │ + beq.n 5d400 │ │ ldrb r7, [r0, r2] │ │ adds r2, r4, #3 │ │ str r2, [r5, #20] │ │ cmp r7, #108 @ 0x6c │ │ - bne.n 5d24c │ │ + bne.n 5d428 │ │ cmp r2, r3 │ │ - beq.n 5d224 │ │ + beq.n 5d400 │ │ ldrb r7, [r0, r2] │ │ adds r2, r4, #4 │ │ str r2, [r5, #20] │ │ cmp r7, #115 @ 0x73 │ │ - bne.n 5d24c │ │ + bne.n 5d428 │ │ cmp r2, r3 │ │ - beq.n 5d224 │ │ + beq.n 5d400 │ │ ldrb r3, [r0, r2] │ │ adds r2, r4, #5 │ │ str r2, [r5, #20] │ │ cmp r3, #101 @ 0x65 │ │ - bne.n 5d24c │ │ + bne.n 5d428 │ │ movs r0, #0 │ │ strb.w r0, [r8, #1] │ │ movs r0, #0 │ │ strb.w r0, [r8] │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ mov r3, r2 │ │ movs r2, #5 │ │ str r2, [sp, #4] │ │ mov r2, r3 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #4 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ str.w r0, [r8, #4] │ │ movs r0, #1 │ │ strb.w r0, [r8] │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movs r3, #9 │ │ str r3, [sp, #4] │ │ - b.n 5d22a │ │ - ldr r2, [pc, #20] @ (5d268 ) │ │ + b.n 5d406 │ │ + ldr r2, [pc, #20] @ (5d444 ) │ │ add r1, sp, #4 │ │ mov r0, r5 │ │ add r2, pc │ │ - bl 5c22c │ │ + bl 5c43c │ │ mov r1, r5 │ │ - bl 5c46a │ │ - b.n 5d23c │ │ + bl 22434 │ │ + b.n 5d418 │ │ nop │ │ - bls.n 5d1b4 │ │ + bvc.n 5d3f8 │ │ movs r7, r0 │ │ push {r4, r5, r7, lr} │ │ sub sp, #32 │ │ - ldr r3, [pc, #44] @ (5d2a0 ) │ │ + ldr r3, [pc, #44] @ (5d47c ) │ │ add.w ip, sp, #4 │ │ - ldr r4, [pc, #44] @ (5d2a4 ) │ │ - ldr r2, [pc, #44] @ (5d2a8 ) │ │ + ldr r4, [pc, #44] @ (5d480 ) │ │ + ldr r2, [pc, #44] @ (5d484 ) │ │ add r3, pc │ │ - ldr r5, [pc, #44] @ (5d2ac ) │ │ + ldr r5, [pc, #44] @ (5d488 ) │ │ add r4, pc │ │ add r2, pc │ │ str r3, [sp, #28] │ │ add r5, pc │ │ stmia.w ip, {r0, r1, r5} │ │ add r0, sp, #8 │ │ add r1, sp, #16 │ │ strd r4, r0, [sp, #20] │ │ add r0, sp, #4 │ │ str r0, [sp, #16] │ │ mov r0, r2 │ │ - bl 754ec │ │ + bl 5f210 │ │ add sp, #32 │ │ pop {r4, r5, r7, pc} │ │ - adds r4, #91 @ 0x5b │ │ - movs r0, r0 │ │ - adds r5, #243 @ 0xf3 │ │ - vqshrun.s64 d17, , #2 │ │ - vsri.64 , q12, #5 │ │ + strh r7, [r0, #10] │ │ + movs r1, r0 │ │ + adds r7, #31 │ │ + vqshrun.s64 d17, q3, #2 │ │ + vcvtm.s32.f32 d29, d28 │ │ movs r7, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #84 @ 0x54 │ │ mov r9, r1 │ │ mov r8, r0 │ │ ldrd r0, r1, [r1, #12] │ │ ldr.w r2, [r9, #20] │ │ cmp r2, r1 │ │ - bcs.n 5d2ec │ │ + bcs.n 5d4c8 │ │ movs r4, #19 │ │ movs r3, #1 │ │ movt r4, #128 @ 0x80 │ │ ldrb r7, [r0, r2] │ │ sub.w r6, r7, #9 │ │ cmp r6, #23 │ │ - bhi.n 5d318 │ │ + bhi.n 5d4f4 │ │ lsl.w r6, r3, r6 │ │ tst r6, r4 │ │ - beq.n 5d318 │ │ + beq.n 5d4f4 │ │ adds r2, #1 │ │ str.w r2, [r9, #20] │ │ cmp r1, r2 │ │ - bne.n 5d2ce │ │ + bne.n 5d4aa │ │ mov r2, r1 │ │ movs r3, #5 │ │ adds r2, #1 │ │ str r3, [sp, #60] @ 0x3c │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #60 @ 0x3c │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ strd r1, r0, [r8] │ │ add sp, #84 @ 0x54 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ cmp r7, #91 @ 0x5b │ │ - bne.w 5d998 │ │ + bne.w 5db74 │ │ ldrb.w r3, [r9, #24] │ │ subs r3, #1 │ │ strb.w r3, [r9, #24] │ │ lsls r3, r3, #24 │ │ - beq.w 5d9aa │ │ + beq.w 5db86 │ │ adds r0, r2, #1 │ │ str.w r8, [sp] │ │ str.w r0, [r9, #20] │ │ mov.w r8, #1 │ │ movs r0, #0 │ │ movs r1, #4 │ │ mov.w fp, #0 │ │ movs r7, #4 │ │ strb.w r8, [sp, #36] @ 0x24 │ │ str.w r9, [sp, #4] │ │ str.w r9, [sp, #32] │ │ str r0, [sp, #48] @ 0x30 │ │ strd r0, r1, [sp, #40] @ 0x28 │ │ - b.n 5d398 │ │ + b.n 5d574 │ │ ldr r5, [sp, #48] @ 0x30 │ │ ldr r0, [sp, #40] @ 0x28 │ │ cmp r5, r0 │ │ - beq.w 5d622 │ │ + beq.w 5d7fe │ │ ldr r7, [sp, #44] @ 0x2c │ │ rsb r0, r5, r5, lsl #3 │ │ ldr r1, [sp, #12] │ │ movs r4, #19 │ │ add.w fp, r5, #1 │ │ str.w fp, [sp, #48] @ 0x30 │ │ str.w r8, [r7, r0, lsl #2] │ │ @@ -79888,710 +79963,710 @@ │ │ str r1, [r0, #16] │ │ ldr r1, [sp, #28] │ │ strb r6, [r0, #24] │ │ str.w sl, [r0, #4] │ │ str r1, [r0, #20] │ │ add r0, sp, #60 @ 0x3c │ │ add r1, sp, #32 │ │ - bl 5c49e │ │ + bl 5c67a │ │ ldrb.w r0, [sp, #60] @ 0x3c │ │ cmp r0, #1 │ │ - beq.w 5d798 │ │ + beq.w 5d974 │ │ ldrb.w r0, [sp, #61] @ 0x3d │ │ cmp r0, #1 │ │ - bne.w 5d7a8 │ │ + bne.w 5d984 │ │ ldr r7, [sp, #32] │ │ add.w r2, r7, #12 │ │ ldmia r2, {r0, r1, r2} │ │ cmp r2, r1 │ │ - bcs.w 5d7be │ │ + bcs.w 5d99a │ │ ldrb r3, [r0, r2] │ │ sub.w r6, r3, #9 │ │ cmp r6, #23 │ │ - bhi.n 5d3de │ │ + bhi.n 5d5ba │ │ lsl.w r6, r8, r6 │ │ tst r6, r4 │ │ - beq.n 5d3de │ │ + beq.n 5d5ba │ │ adds r2, #1 │ │ str r2, [r7, #20] │ │ cmp r1, r2 │ │ - bne.n 5d3c2 │ │ - b.n 5d7bc │ │ + bne.n 5d59e │ │ + b.n 5d998 │ │ cmp r3, #91 @ 0x5b │ │ - beq.w 5d53c │ │ + beq.w 5d718 │ │ movs r5, #1 │ │ movs r4, #0 │ │ movt r5, #32768 @ 0x8000 │ │ cmp r3, #123 @ 0x7b │ │ - bne.w 5d952 │ │ + bne.w 5db2e │ │ ldrb r3, [r7, #24] │ │ subs r3, #1 │ │ strb r3, [r7, #24] │ │ lsls r3, r3, #24 │ │ - beq.w 5d92a │ │ + beq.w 5db06 │ │ adds r0, r2, #1 │ │ str r0, [r7, #20] │ │ movs r0, #16 │ │ str r5, [sp, #16] │ │ str r0, [sp, #20] │ │ mov sl, r5 │ │ add r5, sp, #60 @ 0x3c │ │ strb.w r8, [sp, #56] @ 0x38 │ │ str r7, [sp, #52] @ 0x34 │ │ - b.n 5d430 │ │ - ldr r1, [pc, #924] @ (5d7b4 ) │ │ + b.n 5d60c │ │ + ldr r1, [pc, #924] @ (5d990 ) │ │ mov r0, r6 │ │ movs r2, #6 │ │ add r1, pc │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - beq.n 5d500 │ │ + beq.n 5d6dc │ │ mov r0, r9 │ │ - bl 5ed3c │ │ + bl 5edd8 │ │ cmp r0, #0 │ │ - bne.w 5d72c │ │ + bne.w 5d908 │ │ add r1, sp, #52 @ 0x34 │ │ mov r0, r5 │ │ - bl 5ebfc │ │ + bl 34854 │ │ ldrb.w r0, [sp, #60] @ 0x3c │ │ cmp r0, #1 │ │ - beq.w 5d5a6 │ │ + beq.w 5d782 │ │ ldrb.w r0, [sp, #61] @ 0x3d │ │ cmp r0, #1 │ │ - bne.w 5d5aa │ │ + bne.w 5d786 │ │ ldr.w r9, [sp, #52] @ 0x34 │ │ add.w r1, r9, #12 │ │ ldr.w r0, [r9, #20] │ │ mov r2, r9 │ │ str.w r4, [r9, #8] │ │ adds r0, #1 │ │ str.w r0, [r9, #20] │ │ mov r0, r5 │ │ - bl 767d4 │ │ + bl 7683c │ │ ldrd r1, r6, [sp, #60] @ 0x3c │ │ cmp r1, #2 │ │ - beq.w 5d72e │ │ + beq.w 5d90a │ │ ldr r0, [sp, #68] @ 0x44 │ │ lsls r1, r1, #31 │ │ cmp r0, #6 │ │ - beq.n 5d414 │ │ + beq.n 5d5f0 │ │ cmp r0, #4 │ │ - bne.n 5d424 │ │ + bne.n 5d600 │ │ ldr r0, [r6, #0] │ │ movw r1, #24942 @ 0x616e │ │ movt r1, #25965 @ 0x656d │ │ cmp r0, r1 │ │ - beq.n 5d4c8 │ │ + beq.n 5d6a4 │ │ ldr r0, [r6, #0] │ │ movw r1, #31092 @ 0x7974 │ │ movt r1, #25968 @ 0x6570 │ │ cmp r0, r1 │ │ - bne.n 5d424 │ │ + bne.n 5d600 │ │ ldr r0, [sp, #20] │ │ cmp r0, #16 │ │ - bne.w 5d70e │ │ + bne.w 5d8ea │ │ mov r0, r9 │ │ - bl 5f174 │ │ + bl 5f264 │ │ cmp r0, #0 │ │ - bne.w 5d72c │ │ + bne.w 5d908 │ │ mov r0, r5 │ │ mov r1, r9 │ │ - bl 60248 │ │ + bl 60338 │ │ ldrb.w r0, [sp, #60] @ 0x3c │ │ cmp r0, #1 │ │ - beq.n 5d5a6 │ │ + beq.n 5d782 │ │ ldrb.w r0, [sp, #61] @ 0x3d │ │ str r0, [sp, #20] │ │ - b.n 5d430 │ │ + b.n 5d60c │ │ movs r0, #1 │ │ movt r0, #32768 @ 0x8000 │ │ cmp sl, r0 │ │ - bne.w 5d700 │ │ + bne.w 5d8dc │ │ mov r0, r9 │ │ - bl 5f174 │ │ + bl 5f264 │ │ cmp r0, #0 │ │ - bne.w 5d686 │ │ + bne.w 5d862 │ │ mov r0, r5 │ │ mov r1, r9 │ │ - bl 60178 │ │ + bl 60268 │ │ ldrd sl, r6, [sp, #60] @ 0x3c │ │ movs r0, #1 │ │ movt r0, #32768 @ 0x8000 │ │ cmp sl, r0 │ │ - beq.w 5d688 │ │ + beq.w 5d864 │ │ ldr r0, [sp, #68] @ 0x44 │ │ strd r6, r0, [sp, #8] │ │ - b.n 5d430 │ │ + b.n 5d60c │ │ ldr r0, [sp, #16] │ │ movs r1, #1 │ │ movt r1, #32768 @ 0x8000 │ │ cmp r0, r1 │ │ - bne.w 5d6d8 │ │ + bne.w 5d8b4 │ │ mov r0, r9 │ │ - bl 5f174 │ │ + bl 5f264 │ │ cmp r0, #0 │ │ - bne.w 5d67e │ │ + bne.w 5d85a │ │ mov r0, r5 │ │ mov r1, r9 │ │ - bl 60178 │ │ + bl 60268 │ │ ldrd r1, r0, [sp, #60] @ 0x3c │ │ str r0, [sp, #24] │ │ movs r0, #1 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.w 5d696 │ │ + beq.w 5d872 │ │ ldr r0, [sp, #68] @ 0x44 │ │ str r1, [sp, #16] │ │ str r0, [sp, #28] │ │ - b.n 5d430 │ │ + b.n 5d60c │ │ ldrb r3, [r7, #24] │ │ movs r4, #1 │ │ movt r4, #32768 @ 0x8000 │ │ subs r3, #1 │ │ strb r3, [r7, #24] │ │ lsls r3, r3, #24 │ │ - beq.w 5d92a │ │ + beq.w 5db06 │ │ add r5, sp, #60 @ 0x3c │ │ adds r0, r2, #1 │ │ add r1, sp, #72 @ 0x48 │ │ str r0, [r7, #20] │ │ mov r0, r5 │ │ strb.w r8, [sp, #76] @ 0x4c │ │ str r7, [sp, #72] @ 0x48 │ │ - bl 5c49e │ │ + bl 5c67a │ │ ldrb.w r0, [sp, #60] @ 0x3c │ │ cmp r0, #1 │ │ - bne.n 5d570 │ │ + bne.n 5d74c │ │ ldr.w sl, [sp, #64] @ 0x40 │ │ - b.n 5d588 │ │ + b.n 5d764 │ │ ldrb.w r0, [sp, #61] @ 0x3d │ │ cmp r0, #1 │ │ - bne.n 5d636 │ │ + bne.n 5d812 │ │ ldr r1, [sp, #72] @ 0x48 │ │ mov r0, r5 │ │ - bl 60178 │ │ + bl 60268 │ │ ldrd r8, sl, [sp, #60] @ 0x3c │ │ cmp r8, r4 │ │ - bne.n 5d5d2 │ │ + bne.n 5d7ae │ │ movs r6, #0 │ │ mov r8, r4 │ │ ldrb r0, [r7, #24] │ │ adds r0, #1 │ │ strb r0, [r7, #24] │ │ mov r0, r7 │ │ - bl 5cf84 │ │ + bl 5d160 │ │ cmp r8, r4 │ │ - beq.w 5d8c8 │ │ + beq.w 5daa4 │ │ cmp r0, #0 │ │ - beq.w 5d35a │ │ - b.n 5d8ce │ │ + beq.w 5d536 │ │ + b.n 5daaa │ │ ldr r6, [sp, #64] @ 0x40 │ │ - b.n 5d72e │ │ + b.n 5d90a │ │ movs r4, #1 │ │ mov r8, sl │ │ movt r4, #32768 @ 0x8000 │ │ cmp sl, r4 │ │ it eq │ │ moveq.w r8, #2147483648 @ 0x80000000 │ │ ldr r0, [sp, #20] │ │ cmp r0, #16 │ │ - beq.n 5d69e │ │ + beq.n 5d87a │ │ ldr.w r9, [sp, #16] │ │ cmp r9, r4 │ │ it eq │ │ moveq.w r9, #2147483648 @ 0x80000000 │ │ ldr.w sl, [sp, #8] │ │ - b.n 5d76c │ │ + b.n 5d948 │ │ add r1, sp, #72 @ 0x48 │ │ mov r0, r5 │ │ ldr r6, [sp, #68] @ 0x44 │ │ - bl 5c49e │ │ + bl 5c67a │ │ ldrb.w r0, [sp, #60] @ 0x3c │ │ cmp r0, #1 │ │ - beq.n 5d612 │ │ + beq.n 5d7ee │ │ ldrb.w r0, [sp, #61] @ 0x3d │ │ cmp r0, #1 │ │ - bne.n 5d670 │ │ + bne.n 5d84c │ │ ldr r1, [sp, #72] @ 0x48 │ │ mov r0, r5 │ │ - bl 60248 │ │ + bl 60338 │ │ ldrb.w r0, [sp, #60] @ 0x3c │ │ cmp r0, #1 │ │ - beq.n 5d612 │ │ + beq.n 5d7ee │ │ add r1, sp, #72 @ 0x48 │ │ mov r0, r5 │ │ str r6, [sp, #12] │ │ ldrb.w r6, [sp, #61] @ 0x3d │ │ - bl 5c49e │ │ + bl 5c67a │ │ ldrb.w r0, [sp, #60] @ 0x3c │ │ cmp r0, #1 │ │ - bne.n 5d646 │ │ + bne.n 5d822 │ │ ldr r1, [sp, #64] @ 0x40 │ │ movs.w r0, r8, lsl #1 │ │ str r1, [sp, #24] │ │ - bne.n 5d62a │ │ + bne.n 5d806 │ │ movs r6, #0 │ │ mov sl, r1 │ │ - b.n 5d58a │ │ + b.n 5d766 │ │ add r0, sp, #40 @ 0x28 │ │ - bl 47ad0 │ │ - b.n 5d364 │ │ + bl 47d26 │ │ + b.n 5d540 │ │ mov r0, sl │ │ mov sl, r1 │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r6, #0 │ │ - b.n 5d58a │ │ - ldr r1, [pc, #384] @ (5d7b8 ) │ │ + b.n 5d766 │ │ + ldr r1, [pc, #384] @ (5d994 ) │ │ movs r0, #0 │ │ movs r6, #0 │ │ add r1, pc │ │ - bl 5d26c │ │ + bl 5d448 │ │ mov sl, r0 │ │ - b.n 5d58a │ │ + b.n 5d766 │ │ ldrb.w r0, [sp, #61] @ 0x3d │ │ mov r9, r4 │ │ cmp r0, #1 │ │ - bne.n 5d666 │ │ + bne.n 5d842 │ │ ldr r1, [sp, #72] @ 0x48 │ │ mov r0, r5 │ │ - bl 60178 │ │ + bl 60268 │ │ ldrd r9, r1, [sp, #60] @ 0x3c │ │ cmp r9, r4 │ │ - beq.n 5d614 │ │ + beq.n 5d7f0 │ │ str r1, [sp, #24] │ │ ldr r1, [sp, #68] @ 0x44 │ │ str r1, [sp, #28] │ │ cmp r9, r4 │ │ it eq │ │ moveq.w r9, #2147483648 @ 0x80000000 │ │ - b.n 5d58c │ │ - ldr r1, [pc, #836] @ (5d9b8 ) │ │ + b.n 5d768 │ │ + ldr r1, [pc, #836] @ (5db94 ) │ │ movs r0, #1 │ │ add r1, pc │ │ - bl 5d26c │ │ + bl 5d448 │ │ mov r1, r0 │ │ - b.n 5d614 │ │ + b.n 5d7f0 │ │ mov r6, r0 │ │ mov.w r9, #1 │ │ - b.n 5d748 │ │ + b.n 5d924 │ │ mov r6, r0 │ │ movw sl, #1 │ │ mov.w r9, #1 │ │ movt sl, #32768 @ 0x8000 │ │ - b.n 5d732 │ │ + b.n 5d90e │ │ ldr r6, [sp, #24] │ │ mov.w r9, #1 │ │ - b.n 5d748 │ │ + b.n 5d924 │ │ sub.w r0, sl, r4 │ │ - ldr r1, [pc, #828] @ (5d9e0 ) │ │ + ldr r1, [pc, #828] @ (5dbbc ) │ │ clz r0, r0 │ │ movs r3, #4 │ │ add r1, pc │ │ mov.w r9, r0, lsr #5 │ │ - ldr r0, [pc, #816] @ (5d9e4 ) │ │ - ldr r2, [pc, #820] @ (5d9e8 ) │ │ + ldr r0, [pc, #816] @ (5dbc0 ) │ │ + ldr r2, [pc, #820] @ (5dbc4 ) │ │ str r1, [sp, #64] @ 0x40 │ │ add r1, sp, #72 @ 0x48 │ │ add r0, pc │ │ str r1, [sp, #60] @ 0x3c │ │ mov r1, r5 │ │ add r2, pc │ │ strd r2, r3, [sp, #72] @ 0x48 │ │ - bl 754ec │ │ + bl 5f210 │ │ mov r6, r0 │ │ movs.w r0, r8, lsl #1 │ │ - beq.n 5d732 │ │ + beq.n 5d90e │ │ ldr r0, [sp, #8] │ │ - blx d87c0 │ │ - b.n 5d732 │ │ - ldr r1, [pc, #760] @ (5d9d4 ) │ │ + blx d87d0 │ │ + b.n 5d90e │ │ + ldr r1, [pc, #760] @ (5dbb0 ) │ │ movs r3, #6 │ │ - ldr r0, [pc, #760] @ (5d9d8 ) │ │ + ldr r0, [pc, #760] @ (5dbb4 ) │ │ add r1, pc │ │ - ldr r2, [pc, #760] @ (5d9dc ) │ │ + ldr r2, [pc, #760] @ (5dbb8 ) │ │ str r1, [sp, #64] @ 0x40 │ │ add r1, sp, #72 @ 0x48 │ │ add r0, pc │ │ str r1, [sp, #60] @ 0x3c │ │ mov r1, r5 │ │ add r2, pc │ │ strd r2, r3, [sp, #72] @ 0x48 │ │ - bl 754ec │ │ + bl 5f210 │ │ ldr r1, [sp, #16] │ │ mov r6, r0 │ │ mov.w r9, #1 │ │ - b.n 5d734 │ │ - ldr r1, [pc, #708] @ (5d9c8 ) │ │ - ldr r0, [pc, #712] @ (5d9cc ) │ │ - ldr r2, [pc, #712] @ (5d9d0 ) │ │ + b.n 5d910 │ │ + ldr r1, [pc, #708] @ (5dba4 ) │ │ + ldr r0, [pc, #712] @ (5dba8 ) │ │ + ldr r2, [pc, #712] @ (5dbac ) │ │ add r1, pc │ │ add r0, pc │ │ add r2, pc │ │ - b.n 5d71a │ │ - ldr r1, [pc, #684] @ (5d9bc ) │ │ - ldr r0, [pc, #684] @ (5d9c0 ) │ │ - ldr r2, [pc, #688] @ (5d9c4 ) │ │ + b.n 5d8f6 │ │ + ldr r1, [pc, #684] @ (5db98 ) │ │ + ldr r0, [pc, #684] @ (5db9c ) │ │ + ldr r2, [pc, #688] @ (5dba0 ) │ │ add r1, pc │ │ add r0, pc │ │ add r2, pc │ │ str r1, [sp, #64] @ 0x40 │ │ add r1, sp, #72 @ 0x48 │ │ movs r3, #4 │ │ str r1, [sp, #60] @ 0x3c │ │ mov r1, r5 │ │ str r3, [sp, #76] @ 0x4c │ │ str r2, [sp, #72] @ 0x48 │ │ - bl 754ec │ │ + bl 5f210 │ │ mov r6, r0 │ │ mov.w r9, #1 │ │ ldr r1, [sp, #16] │ │ movs r0, #2 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - blt.n 5d748 │ │ + blt.n 5d924 │ │ cmp r1, #0 │ │ itt ne │ │ ldrne r0, [sp, #24] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ movs r0, #1 │ │ movt r0, #32768 @ 0x8000 │ │ cmp sl, r0 │ │ - beq.n 5d75e │ │ + beq.n 5d93a │ │ cmp.w r9, #0 │ │ it ne │ │ movsne.w r0, sl, lsl #1 │ │ - bne.n 5d790 │ │ + bne.n 5d96c │ │ movs r4, #1 │ │ movs r0, #0 │ │ movt r4, #32768 @ 0x8000 │ │ str r0, [sp, #28] │ │ mov sl, r6 │ │ mov r8, r4 │ │ ldrb r0, [r7, #24] │ │ ldr r6, [sp, #20] │ │ adds r0, #1 │ │ strb r0, [r7, #24] │ │ mov r0, r7 │ │ - bl 5f20c │ │ + bl 5f2fc │ │ cmp r8, r4 │ │ - beq.w 5d8c8 │ │ + beq.w 5daa4 │ │ cmp r0, #0 │ │ - bne.w 5d8ce │ │ + bne.w 5daaa │ │ adds r0, r4, #1 │ │ cmp r8, r0 │ │ - bne.w 5d35a │ │ - b.n 5d7de │ │ + bne.w 5d536 │ │ + b.n 5d9ba │ │ ldr r0, [sp, #8] │ │ - blx d87c0 │ │ - b.n 5d75e │ │ + blx d87d0 │ │ + b.n 5d93a │ │ ldr.w sl, [sp, #64] @ 0x40 │ │ ldrd r4, r6, [sp, #44] @ 0x2c │ │ ldr.w r8, [sp] │ │ - cbnz r6, 5d7e8 │ │ - b.n 5d820 │ │ + cbnz r6, 5d9c4 │ │ + b.n 5d9fc │ │ ldr r6, [sp, #40] @ 0x28 │ │ mov sl, r7 │ │ ldr.w r8, [sp] │ │ - b.n 5d82e │ │ + b.n 5da0a │ │ nop │ │ - ldrh r3, [r3, #62] @ 0x3e │ │ - vrshr.u64 d29, d16, #5 │ │ + ldrh r7, [r7, #46] @ 0x2e │ │ + vcvta.u32.f32 , q10 │ │ movs r7, r0 │ │ mov r2, r1 │ │ movs r3, #5 │ │ adds r2, #1 │ │ str r3, [sp, #60] @ 0x3c │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #60 @ 0x3c │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ mov sl, r0 │ │ ldrd r4, r6, [sp, #44] @ 0x2c │ │ ldr.w r8, [sp] │ │ - cbz r6, 5d820 │ │ + cbz r6, 5d9fc │ │ add.w r7, r4, #16 │ │ - b.n 5d804 │ │ + b.n 5d9e0 │ │ ldr.w r0, [r7, #-12] │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr.w r0, [r7, #-4] │ │ lsls r0, r0, #1 │ │ - bne.n 5d814 │ │ + bne.n 5d9f0 │ │ adds r7, #28 │ │ subs r6, #1 │ │ - beq.n 5d820 │ │ + beq.n 5d9fc │ │ ldr.w r0, [r7, #-16] │ │ lsls r0, r0, #1 │ │ - bne.n 5d7ee │ │ + bne.n 5d9ca │ │ ldr.w r0, [r7, #-4] │ │ lsls r0, r0, #1 │ │ - beq.n 5d7fe │ │ + beq.n 5d9da │ │ ldr r0, [r7, #0] │ │ - blx d87c0 │ │ + blx d87d0 │ │ adds r7, #28 │ │ subs r6, #1 │ │ - bne.n 5d804 │ │ + bne.n 5d9e0 │ │ ldr r0, [sp, #40] @ 0x28 │ │ - cbz r0, 5d82a │ │ + cbz r0, 5da06 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov.w r6, #2147483648 @ 0x80000000 │ │ ldr r0, [sp, #4] │ │ ldrb r1, [r0, #24] │ │ adds r1, #1 │ │ strb r1, [r0, #24] │ │ - bl 5cf84 │ │ + bl 5d160 │ │ mov r4, r0 │ │ cmp.w r6, #2147483648 @ 0x80000000 │ │ - beq.n 5d8b2 │ │ + beq.n 5da8e │ │ cmp r4, #0 │ │ ittt eq │ │ stmiaeq.w r8, {r6, sl, fp} │ │ addeq sp, #84 @ 0x54 │ │ ldmiaeq.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ cmp.w fp, #0 │ │ - beq.n 5d892 │ │ + beq.n 5da6e │ │ add.w r7, sl, #16 │ │ - b.n 5d874 │ │ + b.n 5da50 │ │ ldr.w r0, [r7, #-12] │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr.w r0, [r7, #-4] │ │ lsls r0, r0, #1 │ │ - bne.n 5d884 │ │ + bne.n 5da60 │ │ adds r7, #28 │ │ subs.w fp, fp, #1 │ │ - beq.n 5d892 │ │ + beq.n 5da6e │ │ ldr.w r0, [r7, #-16] │ │ lsls r0, r0, #1 │ │ - bne.n 5d85c │ │ + bne.n 5da38 │ │ ldr.w r0, [r7, #-4] │ │ lsls r0, r0, #1 │ │ - beq.n 5d86c │ │ + beq.n 5da48 │ │ ldr r0, [r7, #0] │ │ - blx d87c0 │ │ + blx d87d0 │ │ adds r7, #28 │ │ subs.w fp, fp, #1 │ │ - bne.n 5d874 │ │ + bne.n 5da50 │ │ cmp r6, #0 │ │ mov r0, sl │ │ it ne │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r1, [sp, #4] │ │ mov r0, r4 │ │ - bl 5c46a │ │ + bl 22434 │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ strd r1, r0, [r8] │ │ add sp, #84 @ 0x54 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - cbnz r4, 5d8b8 │ │ + cbnz r4, 5da94 │ │ mov r4, sl │ │ - b.n 5d89c │ │ + b.n 5da78 │ │ ldr r0, [r4, #0] │ │ cmp r0, #1 │ │ - beq.n 5d8f8 │ │ - cbnz r0, 5d920 │ │ + beq.n 5dad4 │ │ + cbnz r0, 5dafc │ │ ldr r0, [r4, #8] │ │ - cbz r0, 5d920 │ │ + cbz r0, 5dafc │ │ ldr r6, [r4, #4] │ │ - b.n 5d91a │ │ - cbnz r0, 5d8e6 │ │ + b.n 5daf6 │ │ + cbnz r0, 5dac2 │ │ mov r0, sl │ │ - b.n 5d980 │ │ + b.n 5db5c │ │ movs.w r1, r8, lsl #1 │ │ - beq.n 5d8de │ │ + beq.n 5daba │ │ mov r4, r0 │ │ mov r0, sl │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ movs.w r1, r9, lsl #1 │ │ - beq.n 5d980 │ │ - b.n 5d976 │ │ + beq.n 5db5c │ │ + b.n 5db52 │ │ ldr r1, [r0, #0] │ │ mov r5, sl │ │ cmp r1, #1 │ │ - beq.n 5d92e │ │ - cbnz r1, 5d94e │ │ + beq.n 5db0a │ │ + cbnz r1, 5db2a │ │ ldr r1, [r0, #8] │ │ - cbz r1, 5d94e │ │ + cbz r1, 5db2a │ │ ldr r4, [r0, #4] │ │ - b.n 5d94a │ │ + b.n 5db26 │ │ ldrb r0, [r4, #4] │ │ cmp r0, #3 │ │ - bne.n 5d920 │ │ + bne.n 5dafc │ │ ldr r6, [r4, #8] │ │ ldrd r7, r5, [r6] │ │ ldr r1, [r5, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r7 │ │ blxne r1 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r7 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ mov r4, sl │ │ - blx d87c0 │ │ - b.n 5d89c │ │ + blx d87d0 │ │ + b.n 5da78 │ │ movs r3, #24 │ │ - b.n 5d7c0 │ │ + b.n 5d99c │ │ ldrb r1, [r0, #4] │ │ cmp r1, #3 │ │ - bne.n 5d94e │ │ + bne.n 5db2a │ │ ldr r4, [r0, #8] │ │ ldrd r8, r6, [r4] │ │ ldr r1, [r6, #0] │ │ - cbz r1, 5d946 │ │ + cbz r1, 5db22 │ │ mov r9, r0 │ │ mov r0, r8 │ │ blx r1 │ │ mov r0, r9 │ │ ldr r1, [r6, #4] │ │ - cbnz r1, 5d962 │ │ + cbnz r1, 5db3e │ │ str r0, [sp, #24] │ │ - b.n 5d96e │ │ + b.n 5db4a │ │ str r0, [sp, #24] │ │ - b.n 5d974 │ │ - ldr r2, [pc, #96] @ (5d9b4 ) │ │ + b.n 5db50 │ │ + ldr r2, [pc, #96] @ (5db90 ) │ │ add.w r1, sp, #83 @ 0x53 │ │ mov r0, r7 │ │ add r2, pc │ │ - bl 5c22c │ │ - b.n 5d980 │ │ + bl 5c43c │ │ + b.n 5db5c │ │ mov sl, r0 │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ str.w sl, [sp, #24] │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r5 │ │ mov r4, r0 │ │ ldr r0, [sp, #24] │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ mov r1, r7 │ │ - bl 5c46a │ │ + bl 22434 │ │ mov sl, r0 │ │ ldrd r4, r6, [sp, #44] @ 0x2c │ │ cmp r6, #0 │ │ ldr.w r8, [sp] │ │ - bne.w 5d7e8 │ │ - b.n 5d820 │ │ - ldr r2, [pc, #20] @ (5d9b0 ) │ │ + bne.w 5d9c4 │ │ + b.n 5d9fc │ │ + ldr r2, [pc, #20] @ (5db8c ) │ │ add.w r1, sp, #83 @ 0x53 │ │ mov r0, r9 │ │ add r2, pc │ │ - bl 5c22c │ │ + bl 5c43c │ │ mov r1, r9 │ │ - b.n 5d8a0 │ │ + b.n 5da7c │ │ movs r3, #24 │ │ - b.n 5d2ee │ │ + b.n 5d4ca │ │ nop │ │ - bcs.n 5d9ec │ │ + beq.n 5dc30 │ │ movs r7, r0 │ │ - bcs.n 5d93c │ │ + bne.n 5dc00 │ │ movs r7, r0 │ │ - bcs.n 5daac │ │ + beq.n 5daf0 │ │ movs r7, r0 │ │ - subs r1, r2, r1 │ │ - movs r0, r0 │ │ - @ instruction: 0xb797 │ │ - @ instruction: 0xfffa8b50 │ │ - @ instruction: 0xfffb1a5f │ │ - movs r0, r0 │ │ - @ instruction: 0xb7a5 │ │ - @ instruction: 0xfffa8b56 │ │ - vtbl.8 d17, {d27-d29}, d7 │ │ + adds r1, r2, r4 │ │ movs r0, r0 │ │ - @ instruction: 0xb7c7 │ │ - @ instruction: 0xfffa8d09 │ │ - @ instruction: 0xfffb1abb │ │ + push {r0, r3, lr} │ │ + vqrshrn.u64 d24, q10, #6 │ │ + vqshrn.u64 d17, , #5 │ │ + movs r0, r0 │ │ + push {r0, r1, r2, r4, lr} │ │ + vqrshrn.u64 d24, q13, #6 │ │ + vtbx.8 d17, {d11-d12}, d7 │ │ + movs r0, r0 │ │ + push {r0, r3, r4, r5, lr} │ │ + vtbl.8 d24, {d10-d13}, d29 │ │ + vqrshrn.u64 d17, , #5 │ │ movs r0, r0 │ │ - sxth r7, r4 │ │ - vtbl.8 d24, {d26-d29}, d26 │ │ + add sp, #316 @ 0x13c │ │ + vtbx.8 d24, {d26-d27}, d14 │ │ vtbl.8 d30, {d11-d12}, d29 │ │ - ldr r7, [pc, #960] @ (5ddb0 ) │ │ + ldr r7, [pc, #960] @ (5df8c ) │ │ sub sp, #108 @ 0x6c │ │ mov r7, r1 │ │ mov r4, r0 │ │ ldrd r0, r1, [r1, #12] │ │ ldr r2, [r7, #20] │ │ cmp r2, r1 │ │ - bcs.n 5da30 │ │ + bcs.n 5dc0c │ │ movw r8, #19 │ │ movs r3, #1 │ │ movt r8, #128 @ 0x80 │ │ str r4, [sp, #0] │ │ str r7, [sp, #20] │ │ ldrb r7, [r0, r2] │ │ sub.w r6, r7, #9 │ │ cmp r6, #23 │ │ - bhi.n 5da5c │ │ + bhi.n 5dc38 │ │ lsl.w r6, r3, r6 │ │ tst.w r6, r8 │ │ - beq.n 5da5c │ │ + beq.n 5dc38 │ │ ldr r7, [sp, #20] │ │ adds r2, #1 │ │ cmp r1, r2 │ │ str r2, [r7, #20] │ │ - bne.n 5da0e │ │ + bne.n 5dbea │ │ ldr r4, [sp, #0] │ │ mov r2, r1 │ │ movs r3, #5 │ │ adds r2, #1 │ │ str r3, [sp, #76] @ 0x4c │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #76 @ 0x4c │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ strd r1, r0, [r4] │ │ add sp, #108 @ 0x6c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ cmp r7, #91 @ 0x5b │ │ - bne.w 5e384 │ │ + bne.w 5e560 │ │ ldr r7, [sp, #20] │ │ ldrb r3, [r7, #24] │ │ subs r3, #1 │ │ strb r3, [r7, #24] │ │ lsls r3, r3, #24 │ │ - beq.w 5e39c │ │ + beq.w 5e578 │ │ adds r0, r2, #1 │ │ str r0, [r7, #20] │ │ movs r0, #0 │ │ add.w sl, sp, #76 @ 0x4c │ │ str r0, [sp, #64] @ 0x40 │ │ mov r4, r0 │ │ str r0, [sp, #56] @ 0x38 │ │ movs r5, #1 │ │ str r7, [sp, #48] @ 0x30 │ │ movs r1, #4 │ │ mov.w fp, #0 │ │ movs r7, #4 │ │ strb.w r5, [sp, #52] @ 0x34 │ │ str r1, [sp, #60] @ 0x3c │ │ - b.n 5dad8 │ │ + b.n 5dcb4 │ │ ldr r6, [sp, #64] @ 0x40 │ │ ldr r0, [sp, #56] @ 0x38 │ │ cmp r6, r0 │ │ - beq.w 5de42 │ │ + beq.w 5e01e │ │ ldr r7, [sp, #60] @ 0x3c │ │ rsb r0, r6, r6, lsl #3 │ │ ldr r1, [sp, #40] @ 0x28 │ │ str.w r8, [r7, r0, lsl #2] │ │ add.w r0, r7, r0, lsl #2 │ │ movw r8, #19 │ │ strb r1, [r0, #24] │ │ @@ -80604,930 +80679,930 @@ │ │ strd r1, fp, [r0, #8] │ │ add.w fp, r6, #1 │ │ strb.w r9, [r0, #25] │ │ add.w sl, sp, #76 @ 0x4c │ │ str.w fp, [sp, #64] @ 0x40 │ │ add r1, sp, #48 @ 0x30 │ │ mov r0, sl │ │ - bl 5c49e │ │ + bl 5c67a │ │ ldrb.w r0, [sp, #76] @ 0x4c │ │ str.w fp, [sp, #32] │ │ cmp r0, #1 │ │ - beq.w 5e078 │ │ + beq.w 5e254 │ │ ldrb.w r0, [sp, #77] @ 0x4d │ │ cmp r0, #1 │ │ - bne.w 5e08a │ │ + bne.w 5e266 │ │ ldr r7, [sp, #48] @ 0x30 │ │ add.w r2, r7, #12 │ │ ldmia r2, {r0, r1, r2} │ │ cmp r2, r1 │ │ - bcs.w 5e098 │ │ + bcs.w 5e274 │ │ ldrb r3, [r0, r2] │ │ sub.w r6, r3, #9 │ │ cmp r6, #23 │ │ - bhi.n 5db24 │ │ + bhi.n 5dd00 │ │ lsl.w r6, r5, r6 │ │ tst.w r6, r8 │ │ - beq.n 5db24 │ │ + beq.n 5dd00 │ │ adds r2, #1 │ │ str r2, [r7, #20] │ │ cmp r1, r2 │ │ - bne.n 5db06 │ │ - b.n 5e096 │ │ + bne.n 5dce2 │ │ + b.n 5e272 │ │ cmp r3, #91 @ 0x5b │ │ - beq.w 5dcde │ │ + beq.w 5deba │ │ add.w fp, sp, #68 @ 0x44 │ │ cmp r3, #123 @ 0x7b │ │ - bne.w 5e186 │ │ + bne.w 5e362 │ │ ldrb r3, [r7, #24] │ │ subs r3, #1 │ │ strb r3, [r7, #24] │ │ lsls r3, r3, #24 │ │ - beq.w 5e15c │ │ + beq.w 5e338 │ │ adds r0, r2, #1 │ │ str r0, [r7, #20] │ │ movs r0, #2 │ │ strb.w r5, [sp, #72] @ 0x48 │ │ str r0, [sp, #40] @ 0x28 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str r0, [sp, #36] @ 0x24 │ │ mov.w r8, #2147483648 @ 0x80000000 │ │ str r7, [sp, #68] @ 0x44 │ │ movs r0, #2 │ │ str r0, [sp, #16] │ │ - b.n 5db7c │ │ - ldr r1, [pc, #856] @ (5deb8 ) │ │ + b.n 5dd58 │ │ + ldr r1, [pc, #856] @ (5e094 ) │ │ mov r0, r6 │ │ movs r2, #7 │ │ add r1, pc │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - beq.w 5dcb2 │ │ + beq.w 5de8e │ │ mov r0, r9 │ │ - bl 5ed3c │ │ + bl 5edd8 │ │ cmp r0, #0 │ │ - bne.w 5dfd4 │ │ + bne.w 5e1b0 │ │ mov r0, sl │ │ mov r1, fp │ │ - bl 5ebfc │ │ + bl 34854 │ │ ldrb.w r0, [sp, #76] @ 0x4c │ │ cmp r0, #1 │ │ - beq.w 5dd32 │ │ + beq.w 5df0e │ │ ldrb.w r0, [sp, #77] @ 0x4d │ │ cmp r0, #1 │ │ - bne.w 5dd36 │ │ + bne.w 5df12 │ │ ldr.w r9, [sp, #68] @ 0x44 │ │ add.w r1, r9, #12 │ │ ldr.w r0, [r9, #20] │ │ mov r2, r9 │ │ str.w r4, [r9, #8] │ │ adds r0, #1 │ │ str.w r0, [r9, #20] │ │ mov r0, sl │ │ - bl 767d4 │ │ + bl 7683c │ │ ldrd r0, r6, [sp, #76] @ 0x4c │ │ cmp r0, #2 │ │ - beq.w 5dfd6 │ │ + beq.w 5e1b2 │ │ ldr r1, [sp, #84] @ 0x54 │ │ lsls r0, r0, #31 │ │ - beq.n 5dbdc │ │ + beq.n 5ddb8 │ │ subs r0, r1, #4 │ │ cmp r0, #6 │ │ - bhi.n 5db70 │ │ + bhi.n 5dd4c │ │ tbb [pc, r0] │ │ lsls r1, r2, #20 │ │ lsls r0, r6, #16 │ │ lsls r5, r0, #20 │ │ lsls r7, r1, #1 │ │ - b.n 5db5e │ │ - b.n 5db70 │ │ + b.n 5dd3a │ │ + b.n 5dd4c │ │ subs r0, r1, #4 │ │ cmp r0, #6 │ │ - bhi.n 5db70 │ │ + bhi.n 5dd4c │ │ tbb [pc, r0] │ │ lsls r6, r0, #20 │ │ lsls r5, r4, #16 │ │ lsls r5, r0, #20 │ │ lsls r4, r0, #1 │ │ - b.n 5db5e │ │ - b.n 5db70 │ │ + b.n 5dd3a │ │ + b.n 5dd4c │ │ ldr r0, [r6, #0] │ │ movw r1, #24942 @ 0x616e │ │ movt r1, #25965 @ 0x656d │ │ cmp r0, r1 │ │ - bne.n 5db70 │ │ + bne.n 5dd4c │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ - bne.w 5df66 │ │ + bne.w 5e142 │ │ mov r0, r9 │ │ - bl 5f174 │ │ + bl 5f264 │ │ cmp r0, #0 │ │ - bne.w 5deee │ │ + bne.w 5e0ca │ │ mov r0, sl │ │ mov r1, r9 │ │ - bl 5d044 │ │ + bl 5d220 │ │ ldrd r8, r6, [sp, #76] @ 0x4c │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ - beq.w 5def0 │ │ + beq.w 5e0cc │ │ ldr r0, [sp, #84] @ 0x54 │ │ str r0, [sp, #28] │ │ str r6, [sp, #44] @ 0x2c │ │ - b.n 5db7c │ │ - ldr r1, [pc, #648] @ (5debc ) │ │ + b.n 5dd58 │ │ + ldr r1, [pc, #648] @ (5e098 ) │ │ mov r0, r6 │ │ movs r2, #6 │ │ add r1, pc │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.w 5db70 │ │ + bne.w 5dd4c │ │ ldr r0, [sp, #40] @ 0x28 │ │ cmp r0, #2 │ │ - bne.w 5dfa6 │ │ + bne.w 5e182 │ │ mov r0, r9 │ │ - bl 5f174 │ │ + bl 5f264 │ │ cmp r0, #0 │ │ - bne.w 5dfd4 │ │ + bne.w 5e1b0 │ │ mov r0, sl │ │ mov r1, r9 │ │ - bl 5d148 │ │ + bl 5d324 │ │ ldrb.w r0, [sp, #76] @ 0x4c │ │ cmp r0, #1 │ │ - beq.n 5dd32 │ │ + beq.n 5df0e │ │ ldrb.w r0, [sp, #77] @ 0x4d │ │ str r0, [sp, #40] @ 0x28 │ │ - b.n 5db7c │ │ - ldr r1, [pc, #592] @ (5dec0 ) │ │ + b.n 5dd58 │ │ + ldr r1, [pc, #592] @ (5e09c ) │ │ mov r0, r6 │ │ movs r2, #10 │ │ add r1, pc │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.w 5db70 │ │ + bne.w 5dd4c │ │ ldr r0, [sp, #36] @ 0x24 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.w 5df76 │ │ + bne.w 5e152 │ │ mov r0, r9 │ │ - bl 5f174 │ │ + bl 5f264 │ │ cmp r0, #0 │ │ - bne.w 5dea8 │ │ + bne.w 5e084 │ │ mov r0, sl │ │ mov r1, r9 │ │ - bl 5f65c │ │ + bl 5f738 │ │ ldrd r1, r0, [sp, #76] @ 0x4c │ │ str r1, [sp, #36] @ 0x24 │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ str r0, [sp, #4] │ │ - beq.w 5deb0 │ │ + beq.w 5e08c │ │ ldr r5, [sp, #84] @ 0x54 │ │ - b.n 5db7c │ │ + b.n 5dd58 │ │ ldr r0, [sp, #16] │ │ uxtb r0, r0 │ │ cmp r0, #2 │ │ - bne.w 5dfb6 │ │ + bne.w 5e192 │ │ mov r0, r9 │ │ - bl 5f174 │ │ + bl 5f264 │ │ cmp r0, #0 │ │ - bne.w 5dfd4 │ │ + bne.w 5e1b0 │ │ mov r0, sl │ │ mov r1, r9 │ │ - bl 5d148 │ │ + bl 5d324 │ │ ldrb.w r0, [sp, #76] @ 0x4c │ │ cmp r0, #1 │ │ - beq.n 5dd32 │ │ + beq.n 5df0e │ │ ldrb.w r0, [sp, #77] @ 0x4d │ │ - b.n 5db5a │ │ + b.n 5dd36 │ │ ldrb r3, [r7, #24] │ │ subs r3, #1 │ │ strb r3, [r7, #24] │ │ lsls r3, r3, #24 │ │ - beq.w 5e15c │ │ + beq.w 5e338 │ │ adds r0, r2, #1 │ │ add r1, sp, #96 @ 0x60 │ │ str r0, [r7, #20] │ │ mov r0, sl │ │ strb.w r5, [sp, #100] @ 0x64 │ │ str r7, [sp, #96] @ 0x60 │ │ - bl 5c49e │ │ + bl 5c67a │ │ ldrb.w r0, [sp, #76] @ 0x4c │ │ cmp r0, #1 │ │ - bne.n 5dd0a │ │ + bne.n 5dee6 │ │ ldr r0, [sp, #80] @ 0x50 │ │ str r0, [sp, #44] @ 0x2c │ │ - b.n 5dd28 │ │ + b.n 5df04 │ │ ldrb.w r0, [sp, #77] @ 0x4d │ │ cmp r0, #1 │ │ - bne.w 5de4a │ │ + bne.w 5e026 │ │ ldr r1, [sp, #96] @ 0x60 │ │ mov r0, sl │ │ - bl 5d044 │ │ + bl 5d220 │ │ ldrd r8, r0, [sp, #76] @ 0x4c │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ str r0, [sp, #44] @ 0x2c │ │ - bne.n 5dd66 │ │ + bne.n 5df42 │ │ mov.w r8, #2147483648 @ 0x80000000 │ │ movs r0, #0 │ │ str r0, [sp, #40] @ 0x28 │ │ - b.n 5de26 │ │ + b.n 5e002 │ │ ldr r6, [sp, #80] @ 0x50 │ │ - b.n 5dfd6 │ │ + b.n 5e1b2 │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ - beq.w 5ded0 │ │ + beq.w 5e0ac │ │ ldr r4, [sp, #36] @ 0x24 │ │ ldr.w fp, [sp, #4] │ │ cmp.w r4, #2147483648 @ 0x80000000 │ │ - beq.w 5defa │ │ + beq.w 5e0d6 │ │ ldr r0, [sp, #40] @ 0x28 │ │ str r5, [sp, #84] @ 0x54 │ │ cmp r0, #2 │ │ strd r4, fp, [sp, #76] @ 0x4c │ │ - beq.w 5df1c │ │ + beq.w 5e0f8 │ │ ldr r0, [sp, #16] │ │ strd r4, fp, [sp, #8] │ │ and.w r9, r0, #1 │ │ - b.n 5e040 │ │ + b.n 5e21c │ │ add r1, sp, #96 @ 0x60 │ │ mov r0, sl │ │ ldr r6, [sp, #84] @ 0x54 │ │ - bl 5c49e │ │ + bl 5c67a │ │ ldrb.w r0, [sp, #76] @ 0x4c │ │ cmp r0, #1 │ │ - bne.n 5dd7e │ │ + bne.n 5df5a │ │ ldr.w sl, [sp, #80] @ 0x50 │ │ - b.n 5de0e │ │ + b.n 5dfea │ │ ldrb.w r0, [sp, #77] @ 0x4d │ │ cmp r0, #1 │ │ - bne.n 5de5e │ │ + bne.n 5e03a │ │ ldr r1, [sp, #96] @ 0x60 │ │ mov r0, sl │ │ - bl 5f65c │ │ + bl 5f738 │ │ ldr.w fp, [sp, #76] @ 0x4c │ │ mov r0, sl │ │ ldr.w sl, [sp, #80] @ 0x50 │ │ cmp.w fp, #2147483648 @ 0x80000000 │ │ - beq.n 5de0e │ │ + beq.n 5dfea │ │ add r1, sp, #96 @ 0x60 │ │ ldr r5, [sp, #84] @ 0x54 │ │ - bl 5c49e │ │ + bl 5c67a │ │ ldrb.w r0, [sp, #76] @ 0x4c │ │ cmp r0, #1 │ │ - beq.n 5dde0 │ │ + beq.n 5dfbc │ │ ldrb.w r0, [sp, #77] @ 0x4d │ │ cmp r0, #1 │ │ - bne.n 5de96 │ │ + bne.n 5e072 │ │ str r6, [sp, #28] │ │ add r6, sp, #76 @ 0x4c │ │ ldr r1, [sp, #96] @ 0x60 │ │ mov r0, r6 │ │ - bl 5d148 │ │ + bl 5d324 │ │ ldrb.w r0, [sp, #76] @ 0x4c │ │ cmp r0, #1 │ │ - beq.n 5dde0 │ │ + beq.n 5dfbc │ │ ldrb.w r0, [sp, #77] @ 0x4d │ │ add r1, sp, #96 @ 0x60 │ │ str r0, [sp, #40] @ 0x28 │ │ mov r0, r6 │ │ - bl 5c49e │ │ + bl 5c67a │ │ ldrb.w r0, [sp, #76] @ 0x4c │ │ cmp r0, #1 │ │ - bne.n 5de6c │ │ + bne.n 5e048 │ │ ldr r6, [sp, #80] @ 0x50 │ │ - cbz r5, 5de00 │ │ + cbz r5, 5dfdc │ │ add.w r9, sl, #4 │ │ ldr.w r0, [r9, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r9] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r9, r9, #16 │ │ subs r5, #1 │ │ - bne.n 5dde8 │ │ + bne.n 5dfc4 │ │ cmp.w fp, #0 │ │ itt ne │ │ movne r0, sl │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov sl, r6 │ │ cmp.w r8, #0 │ │ itt ne │ │ ldrne r0, [sp, #44] @ 0x2c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ movs r0, #0 │ │ mov.w r8, #2147483648 @ 0x80000000 │ │ str r0, [sp, #40] @ 0x28 │ │ str.w sl, [sp, #44] @ 0x2c │ │ ldrb r0, [r7, #24] │ │ adds r0, #1 │ │ strb r0, [r7, #24] │ │ mov r0, r7 │ │ - bl 5cf84 │ │ + bl 5d160 │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ - beq.w 5e0c6 │ │ + beq.w 5e2a2 │ │ cmp r0, #0 │ │ - beq.w 5da94 │ │ - b.n 5e0e0 │ │ + beq.w 5dc70 │ │ + b.n 5e2bc │ │ add r0, sp, #56 @ 0x38 │ │ - bl 47ad0 │ │ - b.n 5da9e │ │ - ldr r1, [pc, #120] @ (5dec4 ) │ │ + bl 47d26 │ │ + b.n 5dc7a │ │ + ldr r1, [pc, #120] @ (5e0a0 ) │ │ movs r0, #0 │ │ str r0, [sp, #40] @ 0x28 │ │ add r1, pc │ │ - bl 5d26c │ │ + bl 5d448 │ │ str r0, [sp, #44] @ 0x2c │ │ mov.w r8, #2147483648 @ 0x80000000 │ │ - b.n 5dd30 │ │ - ldr r1, [pc, #104] @ (5dec8 ) │ │ + b.n 5df0c │ │ + ldr r1, [pc, #104] @ (5e0a4 ) │ │ movs r0, #1 │ │ add r1, pc │ │ - bl 5d26c │ │ + bl 5d448 │ │ mov sl, r0 │ │ - b.n 5de0e │ │ + b.n 5dfea │ │ ldrb.w r0, [sp, #77] @ 0x4d │ │ cmp r0, #1 │ │ - bne.n 5de8e │ │ + bne.n 5e06a │ │ ldr r1, [sp, #96] @ 0x60 │ │ add r0, sp, #76 @ 0x4c │ │ - bl 5d148 │ │ + bl 5d324 │ │ ldrb.w r0, [sp, #76] @ 0x4c │ │ cmp r0, #1 │ │ - beq.n 5dde0 │ │ + beq.n 5dfbc │ │ ldrb.w r0, [sp, #77] @ 0x4d │ │ and.w r9, r0, #1 │ │ - b.n 5de26 │ │ + b.n 5e002 │ │ movs r0, #0 │ │ and.w r9, r0, #1 │ │ - b.n 5de26 │ │ - ldr r1, [pc, #52] @ (5decc ) │ │ + b.n 5e002 │ │ + ldr r1, [pc, #52] @ (5e0a8 ) │ │ movs r0, #2 │ │ add r1, pc │ │ - bl 5d26c │ │ + bl 5d448 │ │ mov r6, r0 │ │ cmp r5, #0 │ │ - bne.n 5dde4 │ │ - b.n 5de00 │ │ + bne.n 5dfc0 │ │ + b.n 5dfdc │ │ mov r6, r0 │ │ mov.w sl, #1 │ │ - b.n 5e014 │ │ + b.n 5e1f0 │ │ ldr r6, [sp, #4] │ │ mov.w sl, #1 │ │ - b.n 5e014 │ │ - ldrh r2, [r3, #6] │ │ - vtbl.8 d24, {d11}, d2 │ │ - vqshl.u64 d24, d26, #59 @ 0x3b │ │ - @ instruction: 0xfffbca74 │ │ + b.n 5e1f0 │ │ + strh r6, [r7, #54] @ 0x36 │ │ + vcvt.f32.s32 d24, d22 │ │ + vsli.64 q12, q7, #59 @ 0x3b │ │ + vtbl.8 d28, {d27}, d24 │ │ movs r7, r0 │ │ - ldmia r2!, {r1, r5, r6} │ │ + ldmia r0!, {r1, r2, r4, r7} │ │ movs r7, r0 │ │ - ldmia r2!, {r1, r3, r5} │ │ + ldmia r0!, {r1, r2, r3, r4, r6} │ │ movs r7, r0 │ │ - ldr r1, [pc, #832] @ (5e214 ) │ │ + ldr r1, [pc, #832] @ (5e3f0 ) │ │ movs r3, #4 │ │ - ldr r0, [pc, #832] @ (5e218 ) │ │ + ldr r0, [pc, #832] @ (5e3f4 ) │ │ add r1, pc │ │ - ldr r2, [pc, #832] @ (5e21c ) │ │ + ldr r2, [pc, #832] @ (5e3f8 ) │ │ str r1, [sp, #80] @ 0x50 │ │ add r1, sp, #96 @ 0x60 │ │ add r0, pc │ │ str r1, [sp, #76] @ 0x4c │ │ mov r1, sl │ │ add r2, pc │ │ strd r2, r3, [sp, #96] @ 0x60 │ │ - bl 754ec │ │ + bl 5f210 │ │ mov r6, r0 │ │ mov.w r9, #1 │ │ mov.w r8, #2147483648 @ 0x80000000 │ │ - b.n 5dfda │ │ - ldr r1, [pc, #804] @ (5e220 ) │ │ + b.n 5e1b6 │ │ + ldr r1, [pc, #804] @ (5e3fc ) │ │ movs r3, #10 │ │ - ldr r0, [pc, #804] @ (5e224 ) │ │ + ldr r0, [pc, #804] @ (5e400 ) │ │ add r1, pc │ │ - ldr r2, [pc, #804] @ (5e228 ) │ │ + ldr r2, [pc, #804] @ (5e404 ) │ │ str r1, [sp, #100] @ 0x64 │ │ add r1, sp, #88 @ 0x58 │ │ str r1, [sp, #96] @ 0x60 │ │ add r0, pc │ │ add r1, sp, #96 @ 0x60 │ │ add r2, pc │ │ strd r2, r3, [sp, #88] @ 0x58 │ │ - bl 754ec │ │ + bl 5f210 │ │ mov r6, r0 │ │ - b.n 5df42 │ │ - ldr r1, [pc, #780] @ (5e22c ) │ │ + b.n 5e11e │ │ + ldr r1, [pc, #780] @ (5e408 ) │ │ movs r3, #6 │ │ - ldr r0, [pc, #780] @ (5e230 ) │ │ + ldr r0, [pc, #780] @ (5e40c ) │ │ add r1, pc │ │ - ldr r2, [pc, #780] @ (5e234 ) │ │ + ldr r2, [pc, #780] @ (5e410 ) │ │ str r1, [sp, #100] @ 0x64 │ │ add r1, sp, #88 @ 0x58 │ │ str r1, [sp, #96] @ 0x60 │ │ add r0, pc │ │ add r1, sp, #96 @ 0x60 │ │ add r2, pc │ │ strd r2, r3, [sp, #88] @ 0x58 │ │ - bl 754ec │ │ + bl 5f210 │ │ mov r6, r0 │ │ mov r0, sl │ │ - bl 5fd30 │ │ + bl 5fe0c │ │ add.w r0, r4, #2147483648 @ 0x80000000 │ │ cmp.w r8, #0 │ │ clz r0, r0 │ │ mov.w r9, r0, lsr #5 │ │ - beq.n 5df5c │ │ + beq.n 5e138 │ │ ldr r0, [sp, #44] @ 0x2c │ │ - blx d87c0 │ │ - b.n 5df60 │ │ + blx d87d0 │ │ + b.n 5e13c │ │ mov.w r8, #0 │ │ mov.w sl, #0 │ │ - b.n 5dfe4 │ │ - ldr r1, [pc, #720] @ (5e238 ) │ │ + b.n 5e1c0 │ │ + ldr r1, [pc, #720] @ (5e414 ) │ │ movs r3, #4 │ │ - ldr r0, [pc, #720] @ (5e23c ) │ │ - ldr r2, [pc, #720] @ (5e240 ) │ │ + ldr r0, [pc, #720] @ (5e418 ) │ │ + ldr r2, [pc, #720] @ (5e41c ) │ │ add r1, pc │ │ add r0, pc │ │ add r2, pc │ │ - b.n 5dfc4 │ │ - ldr r1, [pc, #716] @ (5e244 ) │ │ + b.n 5e1a0 │ │ + ldr r1, [pc, #716] @ (5e420 ) │ │ mov r4, r0 │ │ - ldr r0, [pc, #716] @ (5e248 ) │ │ + ldr r0, [pc, #716] @ (5e424 ) │ │ movs r3, #10 │ │ add r1, pc │ │ - ldr r2, [pc, #712] @ (5e24c ) │ │ + ldr r2, [pc, #712] @ (5e428 ) │ │ str r1, [sp, #80] @ 0x50 │ │ add r1, sp, #96 @ 0x60 │ │ add r0, pc │ │ str r1, [sp, #76] @ 0x4c │ │ mov r1, sl │ │ add r2, pc │ │ strd r2, r3, [sp, #96] @ 0x60 │ │ - bl 754ec │ │ + bl 5f210 │ │ mov r6, r0 │ │ mov.w r9, #1 │ │ mov.w sl, #1 │ │ ldr.w fp, [sp, #4] │ │ - b.n 5dfe4 │ │ - ldr r1, [pc, #680] @ (5e250 ) │ │ + b.n 5e1c0 │ │ + ldr r1, [pc, #680] @ (5e42c ) │ │ movs r3, #6 │ │ - ldr r0, [pc, #680] @ (5e254 ) │ │ - ldr r2, [pc, #680] @ (5e258 ) │ │ + ldr r0, [pc, #680] @ (5e430 ) │ │ + ldr r2, [pc, #680] @ (5e434 ) │ │ add r1, pc │ │ add r0, pc │ │ add r2, pc │ │ - b.n 5dfc4 │ │ - ldr r1, [pc, #676] @ (5e25c ) │ │ + b.n 5e1a0 │ │ + ldr r1, [pc, #676] @ (5e438 ) │ │ movs r3, #7 │ │ - ldr r0, [pc, #676] @ (5e260 ) │ │ - ldr r2, [pc, #676] @ (5e264 ) │ │ + ldr r0, [pc, #676] @ (5e43c ) │ │ + ldr r2, [pc, #676] @ (5e440 ) │ │ add r1, pc │ │ add r0, pc │ │ add r2, pc │ │ str r1, [sp, #80] @ 0x50 │ │ add r1, sp, #96 @ 0x60 │ │ str r1, [sp, #76] @ 0x4c │ │ mov r1, sl │ │ str r3, [sp, #100] @ 0x64 │ │ str r2, [sp, #96] @ 0x60 │ │ - bl 754ec │ │ + bl 5f210 │ │ mov r6, r0 │ │ mov.w r9, #1 │ │ mov.w sl, #1 │ │ ldr.w fp, [sp, #4] │ │ ldr r4, [sp, #36] @ 0x24 │ │ cmp.w r4, #2147483648 @ 0x80000000 │ │ it ne │ │ cmpne.w r9, #0 │ │ - beq.n 5e014 │ │ - cbz r5, 5e00a │ │ + beq.n 5e1f0 │ │ + cbz r5, 5e1e6 │ │ add.w r4, fp, #4 │ │ ldr.w r0, [r4, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r4, #16 │ │ subs r5, #1 │ │ - bne.n 5dff6 │ │ + bne.n 5e1d2 │ │ ldr r0, [sp, #36] @ 0x24 │ │ - cbz r0, 5e014 │ │ + cbz r0, 5e1f0 │ │ mov r0, fp │ │ - blx d87c0 │ │ + blx d87d0 │ │ cmp.w sl, #0 │ │ - beq.n 5e038 │ │ + beq.n 5e214 │ │ ldr r5, [sp, #24] │ │ bics.w r0, r8, #2147483648 @ 0x80000000 │ │ - beq.n 5e030 │ │ + beq.n 5e20c │ │ ldr r0, [sp, #44] @ 0x2c │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov.w r8, #2147483648 @ 0x80000000 │ │ str r6, [sp, #44] @ 0x2c │ │ - b.n 5e036 │ │ + b.n 5e212 │ │ str r6, [sp, #44] @ 0x2c │ │ mov.w r8, #2147483648 @ 0x80000000 │ │ - b.n 5e040 │ │ + b.n 5e21c │ │ str r6, [sp, #44] @ 0x2c │ │ mov.w r8, #2147483648 @ 0x80000000 │ │ ldr r5, [sp, #24] │ │ ldrb r0, [r7, #24] │ │ adds r0, #1 │ │ strb r0, [r7, #24] │ │ mov r0, r7 │ │ - bl 5f20c │ │ + bl 5f2fc │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ - beq.n 5e0c6 │ │ + beq.n 5e2a2 │ │ cmp r0, #0 │ │ - bne.n 5e0fa │ │ + bne.n 5e2d6 │ │ ldrd fp, sl, [sp, #8] │ │ movs r0, #1 │ │ movs r4, #0 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r8, r0 │ │ str r5, [sp, #24] │ │ - bne.w 5da94 │ │ + bne.w 5dc70 │ │ ldrd r9, r8, [sp, #60] @ 0x3c │ │ cmp.w r8, #0 │ │ - bne.w 5e1c4 │ │ - b.n 5e268 │ │ + bne.w 5e3a0 │ │ + b.n 5e444 │ │ ldr r0, [sp, #80] @ 0x50 │ │ str r0, [sp, #44] @ 0x2c │ │ ldrd r9, r8, [sp, #60] @ 0x3c │ │ cmp.w r8, #0 │ │ - bne.w 5e1c4 │ │ - b.n 5e268 │ │ + bne.w 5e3a0 │ │ + b.n 5e444 │ │ ldr.w r9, [sp, #56] @ 0x38 │ │ ldr r4, [sp, #0] │ │ ldr r5, [sp, #20] │ │ str r7, [sp, #44] @ 0x2c │ │ - b.n 5e27e │ │ + b.n 5e45a │ │ mov r2, r1 │ │ movs r3, #5 │ │ adds r2, #1 │ │ str r3, [sp, #76] @ 0x4c │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #76 @ 0x4c │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ str r0, [sp, #44] @ 0x2c │ │ ldrd r9, r8, [sp, #60] @ 0x3c │ │ cmp.w r8, #0 │ │ - bne.w 5e1c4 │ │ - b.n 5e268 │ │ - cbnz r0, 5e0cc │ │ + bne.w 5e3a0 │ │ + b.n 5e444 │ │ + cbnz r0, 5e2a8 │ │ ldr r0, [sp, #44] @ 0x2c │ │ - b.n 5e1b2 │ │ + b.n 5e38e │ │ ldr r1, [r0, #0] │ │ cmp r1, #1 │ │ - beq.n 5e160 │ │ + beq.n 5e33c │ │ cmp r1, #0 │ │ - bne.n 5e180 │ │ + bne.n 5e35c │ │ ldr r1, [r0, #8] │ │ cmp r1, #0 │ │ - beq.n 5e180 │ │ + beq.n 5e35c │ │ ldr r4, [r0, #4] │ │ - b.n 5e17c │ │ + b.n 5e358 │ │ cmp.w r8, #0 │ │ - beq.n 5e0f0 │ │ + beq.n 5e2cc │ │ mov r6, r0 │ │ ldr r0, [sp, #44] @ 0x2c │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r6 │ │ - cbnz r5, 5e118 │ │ + cbnz r5, 5e2f4 │ │ cmp.w fp, #0 │ │ - bne.n 5e1a8 │ │ - b.n 5e1b2 │ │ + bne.n 5e384 │ │ + b.n 5e38e │ │ cmp.w r8, #0 │ │ - beq.n 5e10a │ │ + beq.n 5e2e6 │ │ mov r4, r0 │ │ ldr r0, [sp, #44] @ 0x2c │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ - cbnz r5, 5e13a │ │ + cbnz r5, 5e316 │ │ ldr.w sl, [sp, #12] │ │ ldr r1, [sp, #8] │ │ cmp r1, #0 │ │ - bne.n 5e1a8 │ │ - b.n 5e1b2 │ │ + bne.n 5e384 │ │ + b.n 5e38e │ │ add.w r6, sl, #4 │ │ - b.n 5e124 │ │ + b.n 5e300 │ │ adds r6, #16 │ │ subs r5, #1 │ │ - beq.n 5e0f2 │ │ + beq.n 5e2ce │ │ ldr.w r1, [r6, #-4] │ │ cmp r1, #0 │ │ - beq.n 5e11e │ │ + beq.n 5e2fa │ │ ldr r1, [r6, #0] │ │ mov r4, r0 │ │ mov r0, r1 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ - b.n 5e11e │ │ + b.n 5e2fa │ │ ldr r1, [sp, #12] │ │ adds r4, r1, #4 │ │ - b.n 5e146 │ │ + b.n 5e322 │ │ adds r4, #16 │ │ subs r5, #1 │ │ - beq.n 5e10c │ │ + beq.n 5e2e8 │ │ ldr.w r1, [r4, #-4] │ │ cmp r1, #0 │ │ - beq.n 5e140 │ │ + beq.n 5e31c │ │ ldr r1, [r4, #0] │ │ mov r6, r0 │ │ mov r0, r1 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r6 │ │ - b.n 5e140 │ │ + b.n 5e31c │ │ movs r3, #24 │ │ - b.n 5e09a │ │ + b.n 5e276 │ │ ldrb r1, [r0, #4] │ │ cmp r1, #3 │ │ - bne.n 5e180 │ │ + bne.n 5e35c │ │ ldr r4, [r0, #8] │ │ ldrd r6, r5, [r4] │ │ ldr r1, [r5, #0] │ │ - cbz r1, 5e178 │ │ + cbz r1, 5e354 │ │ mov r8, r0 │ │ mov r0, r6 │ │ blx r1 │ │ mov r0, r8 │ │ ldr r1, [r5, #4] │ │ - cbnz r1, 5e196 │ │ + cbnz r1, 5e372 │ │ mov sl, r0 │ │ - b.n 5e19e │ │ + b.n 5e37a │ │ mov sl, r0 │ │ ldr r0, [sp, #44] @ 0x2c │ │ - b.n 5e1a8 │ │ - ldr r2, [pc, #584] @ (5e3d0 ) │ │ + b.n 5e384 │ │ + ldr r2, [pc, #584] @ (5e5ac ) │ │ add.w r1, sp, #107 @ 0x6b │ │ mov r0, r7 │ │ add r2, pc │ │ - bl 5c22c │ │ - b.n 5e1b2 │ │ + bl 5c43c │ │ + b.n 5e38e │ │ mov sl, r0 │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ ldr r5, [sp, #44] @ 0x2c │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r5 │ │ mov r4, r0 │ │ mov r0, sl │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ mov r1, r7 │ │ - bl 5c46a │ │ + bl 22434 │ │ str r0, [sp, #44] @ 0x2c │ │ ldrd r9, r8, [sp, #60] @ 0x3c │ │ cmp.w r8, #0 │ │ - beq.n 5e268 │ │ + beq.n 5e444 │ │ movs r7, #0 │ │ - b.n 5e1da │ │ + b.n 5e3b6 │ │ ldr r0, [r5, #12] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, sl │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r7, #1 │ │ cmp r7, r8 │ │ - beq.n 5e268 │ │ + beq.n 5e444 │ │ rsb r0, r7, r7, lsl #3 │ │ ldr.w r1, [r9, r0, lsl #2] │ │ add.w r5, r9, r0, lsl #2 │ │ cmp r1, #0 │ │ itt ne │ │ ldrne r0, [r5, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd sl, r4, [r5, #16] │ │ cmp r4, #0 │ │ - beq.n 5e1c8 │ │ + beq.n 5e3a4 │ │ add.w r6, sl, #4 │ │ ldr.w r0, [r6, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #16 │ │ subs r4, #1 │ │ - bne.n 5e1fc │ │ - b.n 5e1c8 │ │ + bne.n 5e3d8 │ │ + b.n 5e3a4 │ │ nop │ │ - asrs r7, r1, #10 │ │ + asrs r7, r1, #5 │ │ movs r0, r0 │ │ - add r2, sp, #4 │ │ - vrsra.u32 q12, q14, #6 │ │ - vcvtp.s32.f32 , │ │ + add r0, sp, #164 @ 0xa4 │ │ + vzip.32 d24, d16 │ │ + vcvtn.s32.f32 d17, d21 │ │ movs r0, r0 │ │ - add r1, sp, #852 @ 0x354 │ │ - vrinta.f32 d24, d16 │ │ - vcvtp.s32.f32 , │ │ - movs r0, r0 │ │ - add r1, sp, #716 @ 0x2cc │ │ - vrinta.f32 d24, d8 │ │ - vsra.u64 , , #5 │ │ + add r7, pc, #1012 @ (adr r7, 5e7f8 ) │ │ + @ instruction: 0xfffa8344 │ │ + vcvtn.s32.f32 d17, d3 │ │ movs r0, r0 │ │ - add r7, sp, #244 @ 0xf4 │ │ - vqmovn.u64 d24, q15 │ │ - vcvtn.u32.f32 , │ │ + add r7, pc, #876 @ (adr r7, 5e77c ) │ │ + vshll.i32 q12, d28, #32 │ │ + vshr.u64 d17, d23, #5 │ │ + movs r0, r0 │ │ + add r4, sp, #700 @ 0x2bc │ │ + vsra.u32 d24, d2, #6 │ │ + vcvta.u32.f32 d17, d23 │ │ movs r0, r0 │ │ - add r7, sp, #156 @ 0x9c │ │ - vrintx.f32 d24, d18 │ │ - vsra.u64 d17, d23, #5 │ │ - movs r0, r0 │ │ - add r6, sp, #1012 @ 0x3f4 │ │ - vrintx.f32 d24, d6 │ │ - vcvtn.u32.f32 d17, d23 │ │ + add r4, sp, #612 @ 0x264 │ │ + vqmovn.u64 d24, q3 │ │ + vshr.u32 , , #5 │ │ movs r0, r0 │ │ - add r6, sp, #948 @ 0x3b4 │ │ - vsri.32 q12, q14, #6 │ │ + add r4, sp, #444 @ 0x1bc │ │ + vqmovn.s64 d24, q13 │ │ + vcvta.s32.f32 , │ │ + movs r0, r0 │ │ + add r4, sp, #380 @ 0x17c │ │ + vqmovn.s64 d24, q8 │ │ vtbl.8 d25, {d11}, d14 │ │ - cbz r0, 5e272 │ │ + cbz r0, 5e44e │ │ mov r0, r9 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov.w r9, #2147483648 @ 0x80000000 │ │ ldr r4, [sp, #0] │ │ ldr r5, [sp, #20] │ │ ldr.w fp, [sp, #32] │ │ ldrb r0, [r5, #24] │ │ adds r0, #1 │ │ strb r0, [r5, #24] │ │ mov r0, r5 │ │ - bl 5cf84 │ │ + bl 5d160 │ │ mov r8, r0 │ │ cmp.w r9, #2147483648 @ 0x80000000 │ │ - beq.n 5e326 │ │ + beq.n 5e502 │ │ cmp.w r8, #0 │ │ itttt eq │ │ streq.w r9, [r4] │ │ ldreq r0, [sp, #44] @ 0x2c │ │ strdeq r0, fp, [r4, #4] │ │ addeq sp, #108 @ 0x6c │ │ it eq │ │ ldmiaeq.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ cmp.w fp, #0 │ │ - bne.n 5e2d6 │ │ + bne.n 5e4b2 │ │ ldr r0, [sp, #44] @ 0x2c │ │ cmp.w r9, #0 │ │ ldr r4, [sp, #0] │ │ ldr r5, [sp, #20] │ │ it ne │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r8 │ │ mov r1, r5 │ │ - bl 5c46a │ │ + bl 22434 │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ strd r1, r0, [r4] │ │ add sp, #108 @ 0x6c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r7, #0 │ │ - b.n 5e2ec │ │ + b.n 5e4c8 │ │ ldr r0, [r4, #12] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, sl │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r7, #1 │ │ cmp r7, fp │ │ - beq.n 5e2b0 │ │ + beq.n 5e48c │ │ ldr r2, [sp, #44] @ 0x2c │ │ rsb r0, r7, r7, lsl #3 │ │ add.w r4, r2, r0, lsl #2 │ │ ldr.w r1, [r2, r0, lsl #2] │ │ cmp r1, #0 │ │ itt ne │ │ ldrne r0, [r4, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd sl, r5, [r4, #16] │ │ cmp r5, #0 │ │ - beq.n 5e2da │ │ + beq.n 5e4b6 │ │ add.w r6, sl, #4 │ │ ldr.w r0, [r6, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #16 │ │ subs r5, #1 │ │ - bne.n 5e310 │ │ - b.n 5e2da │ │ + bne.n 5e4ec │ │ + b.n 5e4b6 │ │ cmp.w r8, #0 │ │ - bne.n 5e332 │ │ + bne.n 5e50e │ │ ldr.w r8, [sp, #44] @ 0x2c │ │ - b.n 5e2c0 │ │ + b.n 5e49c │ │ ldr.w r0, [r8] │ │ cmp r0, #1 │ │ - beq.n 5e348 │ │ - cbnz r0, 5e378 │ │ + beq.n 5e524 │ │ + cbnz r0, 5e554 │ │ ldr.w r0, [r8, #8] │ │ - cbz r0, 5e378 │ │ + cbz r0, 5e554 │ │ ldr.w r6, [r8, #4] │ │ - b.n 5e372 │ │ + b.n 5e54e │ │ ldrb.w r0, [r8, #4] │ │ cmp r0, #3 │ │ - bne.n 5e378 │ │ + bne.n 5e554 │ │ ldr.w r6, [r8, #8] │ │ ldrd r7, r4, [r6] │ │ ldr r1, [r4, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r7 │ │ blxne r1 │ │ ldr r0, [r4, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r7 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r4, [sp, #0] │ │ ldr r5, [sp, #20] │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r8 │ │ ldr.w r8, [sp, #44] @ 0x2c │ │ - blx d87c0 │ │ - b.n 5e2c0 │ │ - ldr r2, [pc, #68] @ (5e3cc ) │ │ + blx d87d0 │ │ + b.n 5e49c │ │ + ldr r2, [pc, #68] @ (5e5a8 ) │ │ add.w r1, sp, #107 @ 0x6b │ │ ldr r4, [sp, #20] │ │ add r2, pc │ │ mov r0, r4 │ │ - bl 5c22c │ │ + bl 5c43c │ │ mov r1, r4 │ │ - bl 5c46a │ │ - b.n 5e3ba │ │ + bl 22434 │ │ + b.n 5e596 │ │ movs r3, #24 │ │ adds r2, #1 │ │ str r3, [sp, #76] @ 0x4c │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #76 @ 0x4c │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ ldr r2, [sp, #0] │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ strd r1, r0, [r2] │ │ add sp, #108 @ 0x6c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ nop │ │ - ldmia r0!, {r4} │ │ + stmia r6!, {r2, r4, r6} │ │ movs r7, r0 │ │ - ldmia r2, {r1, r2, r3, r6, r7} │ │ + ldmia r0!, {r1, r4, r6, r7} │ │ movs r7, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #76 @ 0x4c │ │ mov r9, r1 │ │ mov r8, r0 │ │ ldrd r0, r1, [r1, #12] │ │ ldr.w r2, [r9, #20] │ │ cmp r2, r1 │ │ - bcs.n 5e410 │ │ + bcs.n 5e5ec │ │ movs r4, #19 │ │ movs r3, #1 │ │ movt r4, #128 @ 0x80 │ │ ldrb r7, [r0, r2] │ │ sub.w r6, r7, #9 │ │ cmp r6, #23 │ │ - bhi.n 5e43c │ │ + bhi.n 5e618 │ │ lsl.w r6, r3, r6 │ │ tst r6, r4 │ │ - beq.n 5e43c │ │ + beq.n 5e618 │ │ adds r2, #1 │ │ str.w r2, [r9, #20] │ │ cmp r1, r2 │ │ - bne.n 5e3f2 │ │ + bne.n 5e5ce │ │ mov r2, r1 │ │ movs r3, #5 │ │ adds r2, #1 │ │ str r3, [sp, #52] @ 0x34 │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #52 @ 0x34 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ strd r1, r0, [r8] │ │ add sp, #76 @ 0x4c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ cmp r7, #91 @ 0x5b │ │ - bne.w 5ea02 │ │ + bne.w 5ebde │ │ ldrb.w r3, [r9, #24] │ │ subs r3, #1 │ │ strb.w r3, [r9, #24] │ │ lsls r3, r3, #24 │ │ - beq.w 5ea24 │ │ + beq.w 5ec00 │ │ adds r0, r2, #1 │ │ str.w r8, [sp] │ │ str.w r0, [r9, #20] │ │ movs r0, #0 │ │ add.w r8, sp, #52 @ 0x34 │ │ movs r5, #1 │ │ movs r1, #4 │ │ @@ -81536,20 +81611,20 @@ │ │ mov r9, r0 │ │ mov.w sl, #0 │ │ movs r6, #4 │ │ strb.w r5, [sp, #28] │ │ str r0, [sp, #40] @ 0x28 │ │ str r1, [sp, #36] @ 0x24 │ │ str r0, [sp, #32] │ │ - b.n 5e4be │ │ + b.n 5e69a │ │ ldr r5, [sp, #40] @ 0x28 │ │ mov.w r9, #0 │ │ ldr r0, [sp, #32] │ │ cmp r5, r0 │ │ - beq.w 5e6e2 │ │ + beq.w 5e8be │ │ ldr r6, [sp, #36] @ 0x24 │ │ add.w r0, r5, r5, lsl #1 │ │ ldr r1, [sp, #12] │ │ add.w sl, r5, #1 │ │ str.w sl, [sp, #40] @ 0x28 │ │ movs r5, #1 │ │ str.w fp, [r6, r0, lsl #3] │ │ @@ -81560,579 +81635,579 @@ │ │ ldr r1, [sp, #16] │ │ strd r1, r4, [r0, #16] │ │ movs r4, #19 │ │ str r7, [r0, #4] │ │ movt r4, #128 @ 0x80 │ │ add r1, sp, #24 │ │ mov r0, r8 │ │ - bl 5c49e │ │ + bl 5c67a │ │ ldrb.w r0, [sp, #52] @ 0x34 │ │ cmp r0, #1 │ │ - beq.w 5e7fc │ │ + beq.w 5e9d8 │ │ ldrb.w r0, [sp, #53] @ 0x35 │ │ cmp r0, #1 │ │ - bne.w 5e806 │ │ + bne.w 5e9e2 │ │ ldr r6, [sp, #24] │ │ add.w r2, r6, #12 │ │ ldmia r2, {r0, r1, r2} │ │ cmp r2, r1 │ │ - bcs.w 5e812 │ │ + bcs.w 5e9ee │ │ ldrb r3, [r0, r2] │ │ sub.w r7, r3, #9 │ │ cmp r7, #23 │ │ - bhi.n 5e504 │ │ + bhi.n 5e6e0 │ │ lsl.w r7, r5, r7 │ │ tst r7, r4 │ │ - beq.n 5e504 │ │ + beq.n 5e6e0 │ │ adds r2, #1 │ │ str r2, [r6, #20] │ │ cmp r1, r2 │ │ - bne.n 5e4e8 │ │ - b.n 5e810 │ │ + bne.n 5e6c4 │ │ + b.n 5e9ec │ │ cmp r3, #91 @ 0x5b │ │ - beq.w 5e610 │ │ + beq.w 5e7ec │ │ cmp r3, #123 @ 0x7b │ │ - bne.w 5e99e │ │ + bne.w 5eb7a │ │ ldrb r3, [r6, #24] │ │ subs r3, #1 │ │ strb r3, [r6, #24] │ │ lsls r3, r3, #24 │ │ - beq.w 5e99a │ │ + beq.w 5eb76 │ │ adds r0, r2, #1 │ │ str r0, [r6, #20] │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ strb.w r5, [sp, #48] @ 0x30 │ │ str r0, [sp, #20] │ │ mov.w fp, #2147483648 @ 0x80000000 │ │ mov r5, r9 │ │ str r6, [sp, #44] @ 0x2c │ │ - b.n 5e550 │ │ - ldr r1, [pc, #724] @ (5e80c ) │ │ + b.n 5e72c │ │ + ldr r1, [pc, #724] @ (5e9e8 ) │ │ mov r0, r7 │ │ movs r2, #6 │ │ add r1, pc │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - beq.n 5e5de │ │ + beq.n 5e7ba │ │ mov r0, r9 │ │ - bl 5ed3c │ │ + bl 5edd8 │ │ cmp r0, #0 │ │ - bne.w 5e78e │ │ + bne.w 5e96a │ │ add r1, sp, #44 @ 0x2c │ │ mov r0, r8 │ │ - bl 5ebfc │ │ + bl 34854 │ │ ldrb.w r0, [sp, #52] @ 0x34 │ │ cmp r0, #1 │ │ - beq.w 5e674 │ │ + beq.w 5e850 │ │ ldrb.w r0, [sp, #53] @ 0x35 │ │ cmp r0, #1 │ │ - bne.w 5e678 │ │ + bne.w 5e854 │ │ ldr.w r9, [sp, #44] @ 0x2c │ │ add.w r1, r9, #12 │ │ ldr.w r0, [r9, #20] │ │ mov r2, r9 │ │ str.w r5, [r9, #8] │ │ adds r0, #1 │ │ str.w r0, [r9, #20] │ │ mov r0, r8 │ │ - bl 767d4 │ │ + bl 7683c │ │ ldrd r1, r7, [sp, #52] @ 0x34 │ │ cmp r1, #2 │ │ - beq.w 5e790 │ │ + beq.w 5e96c │ │ ldr r0, [sp, #60] @ 0x3c │ │ lsls r1, r1, #31 │ │ cmp r0, #6 │ │ - beq.n 5e534 │ │ + beq.n 5e710 │ │ cmp r0, #4 │ │ - bne.n 5e544 │ │ + bne.n 5e720 │ │ ldr r0, [r7, #0] │ │ movw r1, #24942 @ 0x616e │ │ movt r1, #25965 @ 0x656d │ │ cmp r0, r1 │ │ - bne.n 5e544 │ │ + bne.n 5e720 │ │ cmp.w fp, #2147483648 @ 0x80000000 │ │ - bne.w 5e770 │ │ + bne.w 5e94c │ │ mov r0, r9 │ │ - bl 5f174 │ │ + bl 5f264 │ │ cmp r0, #0 │ │ - bne.w 5e73a │ │ + bne.w 5e916 │ │ mov r0, r8 │ │ mov r1, r9 │ │ - bl 5d044 │ │ + bl 5d220 │ │ ldrd fp, r7, [sp, #52] @ 0x34 │ │ cmp.w fp, #2147483648 @ 0x80000000 │ │ - beq.w 5e73c │ │ + beq.w 5e918 │ │ ldr r0, [sp, #60] @ 0x3c │ │ strd r7, r0, [sp, #8] │ │ - b.n 5e550 │ │ + b.n 5e72c │ │ ldr r0, [sp, #20] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.w 5e7ce │ │ + bne.w 5e9aa │ │ mov r0, r9 │ │ - bl 5f174 │ │ + bl 5f264 │ │ cmp r0, #0 │ │ - bne.w 5e714 │ │ + bne.w 5e8f0 │ │ mov r0, r8 │ │ mov r1, r9 │ │ - bl 5d044 │ │ + bl 5d220 │ │ ldrd r0, r1, [sp, #52] @ 0x34 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ str r1, [sp, #16] │ │ - beq.w 5e718 │ │ + beq.w 5e8f4 │ │ ldr r4, [sp, #60] @ 0x3c │ │ str r0, [sp, #20] │ │ - b.n 5e550 │ │ + b.n 5e72c │ │ ldrb r3, [r6, #24] │ │ subs r3, #1 │ │ strb r3, [r6, #24] │ │ lsls r3, r3, #24 │ │ - beq.w 5e99a │ │ + beq.w 5eb76 │ │ adds r0, r2, #1 │ │ add r1, sp, #64 @ 0x40 │ │ str r0, [r6, #20] │ │ mov r0, r8 │ │ strb.w r5, [sp, #68] @ 0x44 │ │ str r6, [sp, #64] @ 0x40 │ │ - bl 5c49e │ │ + bl 5c67a │ │ ldrb.w r0, [sp, #52] @ 0x34 │ │ cmp r0, #1 │ │ - bne.n 5e63a │ │ + bne.n 5e816 │ │ ldr r7, [sp, #56] @ 0x38 │ │ - b.n 5e654 │ │ + b.n 5e830 │ │ ldrb.w r0, [sp, #53] @ 0x35 │ │ cmp r0, #1 │ │ - bne.n 5e6f2 │ │ + bne.n 5e8ce │ │ ldr r1, [sp, #64] @ 0x40 │ │ mov r0, r8 │ │ - bl 5d044 │ │ + bl 5d220 │ │ ldrd fp, r7, [sp, #52] @ 0x34 │ │ cmp.w fp, #2147483648 @ 0x80000000 │ │ - bne.n 5e68a │ │ + bne.n 5e866 │ │ mov.w fp, #2147483648 @ 0x80000000 │ │ ldrb r0, [r6, #24] │ │ adds r0, #1 │ │ strb r0, [r6, #24] │ │ mov r0, r6 │ │ - bl 5cf84 │ │ + bl 5d160 │ │ cmp.w fp, #2147483648 @ 0x80000000 │ │ - beq.w 5e920 │ │ + beq.w 5eafc │ │ cmp r0, #0 │ │ - beq.w 5e482 │ │ - b.n 5e908 │ │ + beq.w 5e65e │ │ + b.n 5eae4 │ │ ldr r7, [sp, #56] @ 0x38 │ │ - b.n 5e790 │ │ + b.n 5e96c │ │ cmp.w fp, #2147483648 @ 0x80000000 │ │ - beq.n 5e71c │ │ + beq.n 5e8f8 │ │ ldr r0, [sp, #20] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.n 5e742 │ │ + beq.n 5e91e │ │ ldr r7, [sp, #8] │ │ - b.n 5e7a6 │ │ + b.n 5e982 │ │ add r1, sp, #64 @ 0x40 │ │ mov r0, r8 │ │ ldr r5, [sp, #60] @ 0x3c │ │ - bl 5c49e │ │ + bl 5c67a │ │ ldrb.w r0, [sp, #52] @ 0x34 │ │ cmp r0, #1 │ │ - bne.n 5e6ae │ │ + bne.n 5e88a │ │ ldr r0, [sp, #56] @ 0x38 │ │ cmp.w fp, #0 │ │ str r0, [sp, #16] │ │ - bne.n 5e6d2 │ │ + bne.n 5e8ae │ │ mov.w fp, #2147483648 @ 0x80000000 │ │ mov r7, r0 │ │ - b.n 5e658 │ │ + b.n 5e834 │ │ ldrb.w r0, [sp, #53] @ 0x35 │ │ cmp r0, #1 │ │ - bne.n 5e700 │ │ + bne.n 5e8dc │ │ ldr r1, [sp, #64] @ 0x40 │ │ mov r0, r8 │ │ - bl 5d044 │ │ + bl 5d220 │ │ ldrd r2, r0, [sp, #52] @ 0x34 │ │ str r2, [sp, #20] │ │ cmp.w r2, #2147483648 @ 0x80000000 │ │ - bne.n 5e6ea │ │ + bne.n 5e8c6 │ │ cmp.w fp, #0 │ │ str r0, [sp, #16] │ │ - beq.n 5e6a6 │ │ + beq.n 5e882 │ │ mov r5, r0 │ │ mov r0, r7 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov.w fp, #2147483648 @ 0x80000000 │ │ mov r7, r5 │ │ - b.n 5e658 │ │ + b.n 5e834 │ │ add r0, sp, #32 │ │ - bl 47930 │ │ - b.n 5e490 │ │ + bl 47efc │ │ + b.n 5e66c │ │ strd r5, r0, [sp, #12] │ │ ldr r4, [sp, #60] @ 0x3c │ │ - b.n 5e658 │ │ - ldr r1, [pc, #880] @ (5ea64 ) │ │ + b.n 5e834 │ │ + ldr r1, [pc, #880] @ (5ec40 ) │ │ movs r0, #0 │ │ add r1, pc │ │ - bl 5d26c │ │ + bl 5d448 │ │ mov r7, r0 │ │ - b.n 5e654 │ │ - ldr r1, [pc, #812] @ (5ea30 ) │ │ + b.n 5e830 │ │ + ldr r1, [pc, #812] @ (5ec0c ) │ │ movs r0, #1 │ │ add r1, pc │ │ - bl 5d26c │ │ + bl 5d448 │ │ cmp.w fp, #0 │ │ str r0, [sp, #16] │ │ - bne.n 5e6d2 │ │ - b.n 5e6a6 │ │ + bne.n 5e8ae │ │ + b.n 5e882 │ │ mov r7, r0 │ │ - b.n 5e796 │ │ + b.n 5e972 │ │ ldr r7, [sp, #16] │ │ - b.n 5e796 │ │ - ldr r1, [pc, #824] @ (5ea58 ) │ │ + b.n 5e972 │ │ + ldr r1, [pc, #824] @ (5ec34 ) │ │ movs r3, #4 │ │ - ldr r0, [pc, #824] @ (5ea5c ) │ │ + ldr r0, [pc, #824] @ (5ec38 ) │ │ add r1, pc │ │ - ldr r2, [pc, #824] @ (5ea60 ) │ │ + ldr r2, [pc, #824] @ (5ec3c ) │ │ str r1, [sp, #56] @ 0x38 │ │ add r1, sp, #64 @ 0x40 │ │ add r0, pc │ │ str r1, [sp, #52] @ 0x34 │ │ mov r1, r8 │ │ add r2, pc │ │ strd r2, r3, [sp, #64] @ 0x40 │ │ - bl 754ec │ │ + bl 5f210 │ │ mov r7, r0 │ │ mov.w fp, #2147483648 @ 0x80000000 │ │ - b.n 5e790 │ │ - ldr r1, [pc, #776] @ (5ea4c ) │ │ + b.n 5e96c │ │ + ldr r1, [pc, #776] @ (5ec28 ) │ │ movs r3, #6 │ │ - ldr r0, [pc, #776] @ (5ea50 ) │ │ + ldr r0, [pc, #776] @ (5ec2c ) │ │ add r1, pc │ │ - ldr r2, [pc, #776] @ (5ea54 ) │ │ + ldr r2, [pc, #776] @ (5ec30 ) │ │ str r1, [sp, #56] @ 0x38 │ │ add r1, sp, #64 @ 0x40 │ │ add r0, pc │ │ str r1, [sp, #52] @ 0x34 │ │ mov r1, r8 │ │ add r2, pc │ │ strd r2, r3, [sp, #64] @ 0x40 │ │ - bl 754ec │ │ + bl 5f210 │ │ mov r7, r0 │ │ cmp.w fp, #0 │ │ - beq.n 5e7a2 │ │ + beq.n 5e97e │ │ ldr r0, [sp, #8] │ │ - blx d87c0 │ │ - b.n 5e7a2 │ │ - ldr r1, [pc, #704] @ (5ea34 ) │ │ + blx d87d0 │ │ + b.n 5e97e │ │ + ldr r1, [pc, #704] @ (5ec10 ) │ │ movs r3, #4 │ │ - ldr r0, [pc, #704] @ (5ea38 ) │ │ + ldr r0, [pc, #704] @ (5ec14 ) │ │ add r1, pc │ │ - ldr r2, [pc, #704] @ (5ea3c ) │ │ + ldr r2, [pc, #704] @ (5ec18 ) │ │ str r1, [sp, #56] @ 0x38 │ │ add r1, sp, #64 @ 0x40 │ │ add r0, pc │ │ str r1, [sp, #52] @ 0x34 │ │ mov r1, r8 │ │ add r2, pc │ │ strd r2, r3, [sp, #64] @ 0x40 │ │ - bl 754ec │ │ + bl 5f210 │ │ mov r7, r0 │ │ ldr r0, [sp, #20] │ │ lsls r0, r0, #1 │ │ - bne.n 5e7f4 │ │ + bne.n 5e9d0 │ │ ldr r0, [sp, #8] │ │ movs.w r1, fp, lsl #1 │ │ it ne │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov.w fp, #2147483648 @ 0x80000000 │ │ ldrb r0, [r6, #24] │ │ adds r0, #1 │ │ strb r0, [r6, #24] │ │ mov r0, r6 │ │ - bl 5f20c │ │ + bl 5f2fc │ │ cmp.w fp, #2147483648 @ 0x80000000 │ │ - beq.w 5e94a │ │ + beq.w 5eb26 │ │ cmp r0, #0 │ │ - bne.w 5e908 │ │ + bne.w 5eae4 │ │ movs r0, #1 │ │ movt r0, #32768 @ 0x8000 │ │ cmp fp, r0 │ │ - bne.w 5e482 │ │ - b.n 5e832 │ │ - ldr r1, [pc, #624] @ (5ea40 ) │ │ + bne.w 5e65e │ │ + b.n 5ea0e │ │ + ldr r1, [pc, #624] @ (5ec1c ) │ │ movs r3, #6 │ │ - ldr r0, [pc, #624] @ (5ea44 ) │ │ + ldr r0, [pc, #624] @ (5ec20 ) │ │ add r1, pc │ │ - ldr r2, [pc, #624] @ (5ea48 ) │ │ + ldr r2, [pc, #624] @ (5ec24 ) │ │ str r1, [sp, #56] @ 0x38 │ │ add r1, sp, #64 @ 0x40 │ │ add r0, pc │ │ str r1, [sp, #52] @ 0x34 │ │ mov r1, r8 │ │ add r2, pc │ │ strd r2, r3, [sp, #64] @ 0x40 │ │ - bl 754ec │ │ + bl 5f210 │ │ mov r7, r0 │ │ ldr r0, [sp, #20] │ │ cmp r0, #0 │ │ - beq.n 5e796 │ │ + beq.n 5e972 │ │ ldr r0, [sp, #16] │ │ - blx d87c0 │ │ - b.n 5e796 │ │ + blx d87d0 │ │ + b.n 5e972 │ │ ldr r7, [sp, #56] @ 0x38 │ │ ldrd r4, r5, [sp, #36] @ 0x24 │ │ - cbnz r5, 5e838 │ │ - b.n 5e860 │ │ + cbnz r5, 5ea14 │ │ + b.n 5ea3c │ │ ldr r5, [sp, #32] │ │ mov r7, r6 │ │ - b.n 5e86e │ │ - ldrb r3, [r7, #26] │ │ + b.n 5ea4a │ │ + ldrb r7, [r3, #19] │ │ vcvt.f32.s32 d20, d10 │ │ movs r3, #5 │ │ adds r2, #1 │ │ str r3, [sp, #52] @ 0x34 │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #52 @ 0x34 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ mov r7, r0 │ │ ldrd r4, r5, [sp, #36] @ 0x24 │ │ - cbz r5, 5e860 │ │ + cbz r5, 5ea3c │ │ add.w r6, r4, #16 │ │ ldr.w r0, [r6, #-16] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r6, #-12] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [r6, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #24 │ │ subs r5, #1 │ │ - bne.n 5e83c │ │ + bne.n 5ea18 │ │ ldr r0, [sp, #32] │ │ - cbz r0, 5e86a │ │ + cbz r0, 5ea46 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov.w r5, #2147483648 @ 0x80000000 │ │ ldr r0, [sp, #4] │ │ ldrb r1, [r0, #24] │ │ adds r1, #1 │ │ strb r1, [r0, #24] │ │ - bl 5cf84 │ │ + bl 5d160 │ │ mov r4, r0 │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ - beq.n 5e8e6 │ │ + beq.n 5eac2 │ │ cmp r4, #0 │ │ itttt eq │ │ ldreq r0, [sp, #0] │ │ stmiaeq.w r0, {r5, r7, sl} │ │ addeq sp, #76 @ 0x4c │ │ ldmiaeq.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ cmp.w sl, #0 │ │ - beq.n 5e8c2 │ │ + beq.n 5ea9e │ │ add.w r6, r7, #16 │ │ ldr.w r0, [r6, #-16] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r6, #-12] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [r6, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #24 │ │ subs.w sl, sl, #1 │ │ - bne.n 5e89c │ │ + bne.n 5ea78 │ │ cmp r5, #0 │ │ mov r0, r7 │ │ ldrd r5, r6, [sp] │ │ it ne │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ mov r1, r6 │ │ - bl 5c46a │ │ + bl 22434 │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ strd r1, r0, [r5] │ │ add sp, #76 @ 0x4c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - cbnz r4, 5e8f0 │ │ + cbnz r4, 5eacc │ │ mov r4, r7 │ │ ldrd r5, r6, [sp] │ │ - b.n 5e8d0 │ │ + b.n 5eaac │ │ ldr r0, [r4, #0] │ │ ldrd r5, r6, [sp] │ │ cmp r0, #1 │ │ - beq.n 5e950 │ │ + beq.n 5eb2c │ │ cmp r0, #0 │ │ - bne.n 5e97e │ │ + bne.n 5eb5a │ │ ldr r0, [r4, #8] │ │ - cbz r0, 5e97e │ │ + cbz r0, 5eb5a │ │ ldr.w sl, [r4, #4] │ │ - b.n 5e978 │ │ + b.n 5eb54 │ │ cmp.w fp, #0 │ │ - beq.n 5e918 │ │ + beq.n 5eaf4 │ │ mov r5, r0 │ │ mov r0, r7 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r5 │ │ ldr r1, [sp, #20] │ │ cmp r1, #0 │ │ - bne.n 5e9e4 │ │ - b.n 5e9ee │ │ - cbz r0, 5e94c │ │ + bne.n 5ebc0 │ │ + b.n 5ebca │ │ + cbz r0, 5eb28 │ │ ldr r1, [r0, #0] │ │ cmp r1, #1 │ │ - bne.n 5e98e │ │ + bne.n 5eb6a │ │ ldrb r1, [r0, #4] │ │ cmp r1, #3 │ │ - bne.n 5e9e0 │ │ + bne.n 5ebbc │ │ ldr r4, [r0, #8] │ │ ldrd r8, r5, [r4] │ │ ldr r1, [r5, #0] │ │ - cbz r1, 5e940 │ │ + cbz r1, 5eb1c │ │ mov r9, r0 │ │ mov r0, r8 │ │ blx r1 │ │ mov r0, r9 │ │ ldr r1, [r5, #4] │ │ cmp r1, #0 │ │ - bne.n 5e9cc │ │ + bne.n 5eba8 │ │ str r0, [sp, #16] │ │ - b.n 5e9d8 │ │ - cbnz r0, 5e988 │ │ + b.n 5ebb4 │ │ + cbnz r0, 5eb64 │ │ mov r0, r7 │ │ - b.n 5e9ee │ │ + b.n 5ebca │ │ ldrb r0, [r4, #4] │ │ cmp r0, #3 │ │ - bne.n 5e97e │ │ + bne.n 5eb5a │ │ ldr.w sl, [r4, #8] │ │ ldrd r8, r9, [sl] │ │ ldr.w r1, [r9] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r8 │ │ blxne r1 │ │ ldr.w r0, [r9, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, sl │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ mov r4, r7 │ │ - blx d87c0 │ │ - b.n 5e8d0 │ │ + blx d87d0 │ │ + b.n 5eaac │ │ ldr r1, [r0, #0] │ │ cmp r1, #1 │ │ - beq.n 5e9ae │ │ - cbnz r1, 5e9e0 │ │ + beq.n 5eb8a │ │ + cbnz r1, 5ebbc │ │ ldr r1, [r0, #8] │ │ - cbz r1, 5e9e0 │ │ + cbz r1, 5ebbc │ │ ldr r4, [r0, #4] │ │ str r0, [sp, #16] │ │ - b.n 5e9d8 │ │ + b.n 5ebb4 │ │ movs r3, #24 │ │ - b.n 5e814 │ │ - ldr r2, [pc, #140] @ (5ea2c ) │ │ + b.n 5e9f0 │ │ + ldr r2, [pc, #140] @ (5ec08 ) │ │ add.w r1, sp, #75 @ 0x4b │ │ mov r0, r6 │ │ add r2, pc │ │ - bl 5c22c │ │ - b.n 5e9ee │ │ + bl 5c43c │ │ + b.n 5ebca │ │ ldrb r1, [r0, #4] │ │ cmp r1, #3 │ │ - bne.n 5e9e0 │ │ + bne.n 5ebbc │ │ ldr r4, [r0, #8] │ │ ldrd r8, r5, [r4] │ │ ldr r1, [r5, #0] │ │ - cbz r1, 5e9c6 │ │ + cbz r1, 5eba2 │ │ mov r9, r0 │ │ mov r0, r8 │ │ blx r1 │ │ mov r0, r9 │ │ ldr r1, [r5, #4] │ │ cmp r1, #0 │ │ - beq.n 5e946 │ │ + beq.n 5eb22 │ │ mov r9, r0 │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ str.w r9, [sp, #16] │ │ mov r0, r4 │ │ - blx d87c0 │ │ - b.n 5e9e2 │ │ + blx d87d0 │ │ + b.n 5ebbe │ │ str r0, [sp, #16] │ │ mov r0, r7 │ │ mov r4, r0 │ │ ldr r0, [sp, #16] │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ mov r1, r6 │ │ - bl 5c46a │ │ + bl 22434 │ │ mov r7, r0 │ │ ldrd r4, r5, [sp, #36] @ 0x24 │ │ cmp r5, #0 │ │ - bne.w 5e838 │ │ - b.n 5e860 │ │ - ldr r2, [pc, #36] @ (5ea28 ) │ │ + bne.w 5ea14 │ │ + b.n 5ea3c │ │ + ldr r2, [pc, #36] @ (5ec04 ) │ │ add.w r1, sp, #75 @ 0x4b │ │ mov r0, r9 │ │ add r2, pc │ │ - bl 5c22c │ │ + bl 5c43c │ │ mov r1, r9 │ │ - bl 5c46a │ │ + bl 22434 │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ strd r1, r0, [r8] │ │ add sp, #76 @ 0x4c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r3, #24 │ │ - b.n 5e412 │ │ - stmia r1!, {r1, r4, r5, r6} │ │ - movs r7, r0 │ │ - stmia r2!, {r1, r2, r6, r7} │ │ - movs r7, r0 │ │ - stmia r1!, {r3, r4, r5, r7} │ │ - movs r7, r0 │ │ - lsrs r7, r5, #7 │ │ - movs r0, r0 │ │ - add r7, pc, #188 @ (adr r7, 5eaf8 ) │ │ - @ instruction: 0xfffa7adc │ │ - @ instruction: 0xfffb0991 │ │ - movs r0, r0 │ │ - add r6, pc, #836 @ (adr r6, 5ed8c ) │ │ - vcvt.f16.u16 d23, d3, #6 │ │ - vshll.u32 q8, d13, #27 │ │ - movs r0, r0 │ │ - add r1, pc, #572 @ (adr r1, 5ec90 ) │ │ - @ instruction: 0xfffa7c9f │ │ - vtbx.8 d16, {d11-d13}, d3 │ │ - movs r0, r0 │ │ - add r1, pc, #724 @ (adr r1, 5ed34 ) │ │ - @ instruction: 0xfffa7b30 │ │ - vcvtn.u32.f32 q14, q3 │ │ + b.n 5e5ee │ │ + itet lt │ │ + movlt r7, r0 │ │ + stmiage r0!, {r1, r3, r4, r5, r6, r7} │ │ + movlt r7, r0 │ │ + ite al │ │ + moval r7, r0 │ │ + lsr r7, r5, #2 │ │ + movs r0, r0 │ │ + add r4, pc, #644 @ (adr r4, 5ee9c ) │ │ + vtbl.8 d23, {d10-d11}, d0 │ │ + vqrshrun.s64 d16, , #5 │ │ + movs r0, r0 │ │ + add r4, pc, #268 @ (adr r4, 5ed30 ) │ │ + vshll.u32 , d23, #26 │ │ + @ instruction: 0xfffb08dd │ │ + movs r0, r0 │ │ + ldr r7, [sp, #732] @ 0x2dc │ │ + vtbx.8 d23, {d26-d28}, d3 │ │ + vtbl.8 d16, {d11-d12}, d3 │ │ + movs r0, r0 │ │ + ldr r7, [sp, #884] @ 0x374 │ │ + vqrshrn.u64 d23, q2, #6 │ │ + @ instruction: 0xfffbbffa │ │ movs r7, r0 │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #36 @ 0x24 │ │ mov r5, r1 │ │ mov r7, r0 │ │ ldrd r0, r1, [r1, #12] │ │ ldr r2, [r5, #20] │ │ cmp r2, r1 │ │ - bcs.n 5eab8 │ │ + bcs.n 5ec94 │ │ ldrb r3, [r0, r2] │ │ sub.w r6, r3, #9 │ │ cmp r6, #36 @ 0x24 │ │ - bhi.n 5eae0 │ │ + bhi.n 5ecbc │ │ tbb [pc, r6] │ │ asrs r3, r2, #12 │ │ cmp r4, #44 @ 0x2c │ │ cmp r4, #19 │ │ cmp r4, #44 @ 0x2c │ │ cmp r4, #44 @ 0x2c │ │ cmp r4, #44 @ 0x2c │ │ @@ -82148,316 +82223,174 @@ │ │ cmp r4, #44 @ 0x2c │ │ cmp r4, #44 @ 0x2c │ │ cmp r4, #44 @ 0x2c │ │ lsls r3, r0, #1 │ │ adds r2, #1 │ │ str r2, [r5, #20] │ │ cmp r1, r2 │ │ - bne.n 5ea7a │ │ + bne.n 5ec56 │ │ mov r2, r1 │ │ movs r3, #5 │ │ adds r2, #1 │ │ str r3, [sp, #16] │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #16 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ movs r1, #1 │ │ str r0, [r7, #4] │ │ strb r1, [r7, #0] │ │ add sp, #36 @ 0x24 │ │ pop {r4, r5, r6, r7, pc} │ │ sub.w r0, r3, #48 @ 0x30 │ │ cmp r0, #10 │ │ - bcs.n 5eb84 │ │ + bcs.n 5ed60 │ │ mov r0, sp │ │ mov r1, r5 │ │ movs r2, #1 │ │ movs r6, #1 │ │ - bl 5f412 │ │ + bl 5f502 │ │ ldrd r2, r0, [sp] │ │ eor.w r1, r2, #3 │ │ orrs r0, r1 │ │ itttt eq │ │ ldreq r0, [sp, #8] │ │ streq r0, [r7, #4] │ │ strbeq r6, [r7, #0] │ │ addeq sp, #36 @ 0x24 │ │ it eq │ │ popeq {r4, r5, r6, r7, pc} │ │ - b.n 5eb34 │ │ + b.n 5ed10 │ │ adds r0, r2, #1 │ │ str r0, [r5, #20] │ │ mov r0, sp │ │ mov r1, r5 │ │ movs r2, #0 │ │ - bl 5f412 │ │ + bl 5f502 │ │ ldrd r2, r0, [sp] │ │ eor.w r1, r2, #3 │ │ orrs r0, r1 │ │ - bne.n 5eb34 │ │ + bne.n 5ed10 │ │ ldr r0, [sp, #8] │ │ str r0, [r7, #4] │ │ movs r0, #1 │ │ strb r0, [r7, #0] │ │ add sp, #36 @ 0x24 │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r0, [sp, #8] │ │ cmp r2, #1 │ │ ldr r1, [sp, #12] │ │ - beq.n 5eb50 │ │ + beq.n 5ed2c │ │ cmp r2, #2 │ │ - bne.n 5eb64 │ │ + bne.n 5ed40 │ │ subs.w r2, r0, #256 @ 0x100 │ │ sbcs.w r2, r1, #0 │ │ - bcc.n 5eb5a │ │ + bcc.n 5ed36 │ │ str r0, [sp, #24] │ │ movs r0, #2 │ │ - b.n 5eb98 │ │ + b.n 5ed74 │ │ subs.w r2, r0, #256 @ 0x100 │ │ sbcs.w r2, r1, #0 │ │ - bcs.n 5eb94 │ │ + bcs.n 5ed70 │ │ strb r0, [r7, #1] │ │ movs r0, #0 │ │ strb r0, [r7, #0] │ │ add sp, #36 @ 0x24 │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r2, [pc, #68] @ (5ebac ) │ │ + ldr r2, [pc, #68] @ (5ed88 ) │ │ str r0, [sp, #24] │ │ movs r0, #3 │ │ strb.w r0, [sp, #16] │ │ add r2, pc │ │ str r1, [sp, #28] │ │ add r0, sp, #16 │ │ add.w r1, sp, #35 @ 0x23 │ │ - bl 7528c │ │ + bl 75340 │ │ mov r1, r5 │ │ - bl 5c46a │ │ - b.n 5eb2a │ │ - ldr r2, [pc, #40] @ (5ebb0 ) │ │ + bl 22434 │ │ + b.n 5ed06 │ │ + ldr r2, [pc, #40] @ (5ed8c ) │ │ add.w r1, sp, #35 @ 0x23 │ │ mov r0, r5 │ │ add r2, pc │ │ - bl 5c22c │ │ - b.n 5eb7c │ │ + bl 5c43c │ │ + b.n 5ed58 │ │ str r0, [sp, #24] │ │ movs r0, #1 │ │ strb.w r0, [sp, #16] │ │ add r0, sp, #16 │ │ str r1, [sp, #28] │ │ add.w r1, sp, #35 @ 0x23 │ │ - bl 76598 │ │ - b.n 5eb7c │ │ + bl 76600 │ │ + b.n 5ed58 │ │ nop │ │ - cbnz r6, 5ec24 │ │ + rev r2, r1 │ │ movs r7, r0 │ │ - cbnz r0, 5ec22 │ │ + cbnz r4, 5edca │ │ movs r7, r0 │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #4 │ │ ldrd r4, r6, [r0, #4] │ │ mov r5, r0 │ │ - cbz r6, 5ebe8 │ │ + cbz r6, 5edc4 │ │ add.w r7, r4, #16 │ │ ldr.w r0, [r7, #-16] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r7, #-12] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [r7, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r7, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r7, #24 │ │ subs r6, #1 │ │ - bne.n 5ebc4 │ │ + bne.n 5eda0 │ │ ldr r0, [r5, #0] │ │ - cbz r0, 5ebf8 │ │ + cbz r0, 5edd4 │ │ mov r0, r4 │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - push {r4, r5, r6, r7, lr} │ │ - sub sp, #12 │ │ - ldr r2, [r1, #0] │ │ - mov ip, r1 │ │ - ldrd r3, r1, [r2, #12] │ │ - ldr r4, [r2, #20] │ │ - cmp r4, r1 │ │ - bcs.n 5eca0 │ │ - movw lr, #19 │ │ - movs r6, #1 │ │ - movt lr, #128 @ 0x80 │ │ - ldrb r5, [r3, r4] │ │ - sub.w r7, r5, #9 │ │ - cmp r7, #23 │ │ - bhi.n 5ec3a │ │ - lsl.w r7, r6, r7 │ │ - tst.w r7, lr │ │ - beq.n 5ec3a │ │ - adds r4, #1 │ │ - str r4, [r2, #20] │ │ - cmp r1, r4 │ │ - bne.n 5ec18 │ │ - mov r5, r0 │ │ - mov r4, r1 │ │ - b.n 5eca2 │ │ - cmp r5, #125 @ 0x7d │ │ - bne.n 5ec48 │ │ - movs r1, #0 │ │ - strb r1, [r0, #1] │ │ - strb r1, [r0, #0] │ │ - add sp, #12 │ │ - pop {r4, r5, r6, r7, pc} │ │ - ldrb.w r6, [ip, #4] │ │ - cbz r6, 5ec5c │ │ - movs r2, #0 │ │ - cmp r5, #34 @ 0x22 │ │ - strb.w r2, [ip, #4] │ │ - beq.n 5ec94 │ │ - movs r2, #17 │ │ - b.n 5ed0e │ │ - cmp r5, #44 @ 0x2c │ │ - bne.n 5ed0c │ │ - adds r4, #1 │ │ - str r4, [r2, #20] │ │ - cmp r4, r1 │ │ - bcs.n 5ecd0 │ │ - mov.w ip, #1 │ │ - ldrb r5, [r3, r4] │ │ - sub.w r6, r5, #9 │ │ - cmp r6, #25 │ │ - bhi.n 5ecd6 │ │ - lsl.w r7, ip, r6 │ │ - tst.w r7, lr │ │ - beq.n 5ec90 │ │ - adds r4, #1 │ │ - str r4, [r2, #20] │ │ - cmp r1, r4 │ │ - bne.n 5ec6c │ │ - mov r5, r0 │ │ - mov r4, r1 │ │ - movs r0, #5 │ │ - b.n 5eca4 │ │ - cmp r6, #25 │ │ - bne.n 5ecd6 │ │ - movs r1, #1 │ │ - strb r1, [r0, #1] │ │ - movs r1, #0 │ │ - strb r1, [r0, #0] │ │ - add sp, #12 │ │ - pop {r4, r5, r6, r7, pc} │ │ - mov r5, r0 │ │ - movs r0, #3 │ │ - str r0, [sp, #0] │ │ - adds r2, r4, #1 │ │ - mov r0, r3 │ │ - cmp r2, r1 │ │ - it cs │ │ - movcs r2, r1 │ │ - bl 75b28 │ │ - mov r2, r0 │ │ - mov r3, r1 │ │ - mov r1, r2 │ │ - mov r0, sp │ │ - mov r2, r3 │ │ - bl 75c44 │ │ - mov r1, r0 │ │ - mov r0, r5 │ │ - str r1, [r5, #4] │ │ - movs r1, #1 │ │ - strb r1, [r0, #0] │ │ - add sp, #12 │ │ - pop {r4, r5, r6, r7, pc} │ │ - mov r5, r0 │ │ - movs r0, #5 │ │ - b.n 5eca4 │ │ - mov r6, r0 │ │ - cmp r5, #125 @ 0x7d │ │ - ite ne │ │ - movne r0, #17 │ │ - moveq r0, #21 │ │ - str r0, [sp, #0] │ │ - adds r2, r4, #1 │ │ - mov r0, r3 │ │ - cmp r2, r1 │ │ - it cs │ │ - movcs r2, r1 │ │ - bl 75b28 │ │ - mov r2, r0 │ │ - mov r3, r1 │ │ - mov r1, r2 │ │ - mov r0, sp │ │ - mov r2, r3 │ │ - bl 75c44 │ │ - mov r1, r0 │ │ - mov r0, r6 │ │ - str r1, [r6, #4] │ │ - movs r1, #1 │ │ - strb r1, [r0, #0] │ │ - add sp, #12 │ │ - pop {r4, r5, r6, r7, pc} │ │ - movs r2, #8 │ │ - str r2, [sp, #0] │ │ - adds r2, r4, #1 │ │ - mov r4, r0 │ │ - mov r0, r3 │ │ - cmp r2, r1 │ │ - it cs │ │ - movcs r2, r1 │ │ - bl 75b28 │ │ - mov r2, r0 │ │ - mov r3, r1 │ │ - mov r1, r2 │ │ - mov r0, sp │ │ - mov r2, r3 │ │ - bl 75c44 │ │ - mov r1, r0 │ │ - mov r0, r4 │ │ - str r1, [r4, #4] │ │ - movs r1, #1 │ │ - strb r1, [r0, #0] │ │ - add sp, #12 │ │ - pop {r4, r5, r6, r7, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #20 │ │ mov r5, r0 │ │ - bl 5f174 │ │ - cbz r0, 5ed50 │ │ + bl 5f264 │ │ + cbz r0, 5edec │ │ add sp, #20 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd r1, r6, [r5, #16] │ │ add.w r8, r5, #12 │ │ movs r0, #0 │ │ cmp r6, r1 │ │ str r0, [r5, #8] │ │ - bcs.w 5f0c2 │ │ + bcs.w 5f15e │ │ ldr r0, [r5, #12] │ │ movw sl, #19 │ │ mov.w fp, #0 │ │ mov.w r9, #1 │ │ movt sl, #128 @ 0x80 │ │ movs r7, #0 │ │ - b.n 5ed80 │ │ + b.n 5ee1c │ │ movs r7, #1 │ │ cmp r6, r1 │ │ - bcs.w 5f0b6 │ │ + bcs.w 5f152 │ │ ldrb r4, [r0, r6] │ │ sub.w r2, r4, #9 │ │ cmp r2, #36 @ 0x24 │ │ - bhi.n 5ede2 │ │ + bhi.n 5ee7e │ │ tbh [pc, r2, lsl #1] │ │ movs r5, r4 │ │ movs r5, r4 │ │ lsls r2, r1, #3 │ │ lsls r2, r1, #3 │ │ movs r5, r4 │ │ lsls r2, r1, #3 │ │ @@ -82491,19 +82424,19 @@ │ │ lsls r2, r1, #3 │ │ lsls r2, r1, #3 │ │ lsls r2, r1, #3 │ │ lsls r7, r0, #3 │ │ adds r6, #1 │ │ str r6, [r5, #20] │ │ cmp r1, r6 │ │ - bne.n 5ed80 │ │ - b.n 5f0b4 │ │ + bne.n 5ee1c │ │ + b.n 5f150 │ │ sub.w r2, r4, #91 @ 0x5b │ │ cmp r2, #32 │ │ - bhi.w 5ef22 │ │ + bhi.w 5efbe │ │ tbb [pc, r2] │ │ ldr r1, [sp, #68] @ 0x44 │ │ ldr r1, [sp, #612] @ 0x264 │ │ ldr r1, [sp, #612] @ 0x264 │ │ ldr r1, [sp, #612] @ 0x264 │ │ ldr r1, [sp, #612] @ 0x264 │ │ cmp r2, #153 @ 0x99 │ │ @@ -82519,156 +82452,156 @@ │ │ ldr r1, [sp, #612] @ 0x264 │ │ movs r1, r2 │ │ ldr r0, [r5, #0] │ │ and.w r2, r7, #1 │ │ ldr r1, [r5, #8] │ │ subs r0, r0, r1 │ │ cmp r0, r2 │ │ - bcc.w 5f092 │ │ + bcc.w 5f12e │ │ lsls r0, r7, #31 │ │ ittt ne │ │ ldrne r0, [r5, #4] │ │ strbne.w fp, [r0, r1] │ │ addne r1, #1 │ │ ldr r0, [r5, #20] │ │ movs r2, #0 │ │ str r1, [r5, #8] │ │ adds r0, #1 │ │ str r0, [r5, #20] │ │ ldrd r1, r6, [r5, #16] │ │ cmp r6, r1 │ │ - bcc.w 5ef66 │ │ - b.n 5f0dc │ │ + bcc.w 5f002 │ │ + b.n 5f178 │ │ adds r2, r6, #1 │ │ mov r3, r1 │ │ str r2, [r5, #20] │ │ cmp r2, r1 │ │ it hi │ │ movhi r3, r2 │ │ - bcs.w 5f10c │ │ + bcs.w 5f1a8 │ │ ldrb r4, [r0, r2] │ │ adds r2, r6, #2 │ │ str r2, [r5, #20] │ │ cmp r4, #97 @ 0x61 │ │ - bne.w 5f116 │ │ + bne.w 5f1b2 │ │ cmp r2, r3 │ │ - beq.w 5f10e │ │ + beq.w 5f1aa │ │ ldrb r4, [r0, r2] │ │ adds r2, r6, #3 │ │ str r2, [r5, #20] │ │ cmp r4, #108 @ 0x6c │ │ - bne.w 5f116 │ │ + bne.w 5f1b2 │ │ cmp r2, r3 │ │ - beq.w 5f10e │ │ + beq.w 5f1aa │ │ ldrb r4, [r0, r2] │ │ adds r2, r6, #4 │ │ str r2, [r5, #20] │ │ cmp r4, #115 @ 0x73 │ │ - bne.w 5f116 │ │ + bne.w 5f1b2 │ │ cmp r2, r3 │ │ - beq.w 5f10e │ │ + beq.w 5f1aa │ │ ldrb r3, [r0, r2] │ │ adds r2, r6, #5 │ │ - b.n 5eec8 │ │ + b.n 5ef64 │ │ adds r2, r6, #1 │ │ mov r3, r1 │ │ str r2, [r5, #20] │ │ cmp r2, r1 │ │ it hi │ │ movhi r3, r2 │ │ - bcs.w 5f10c │ │ + bcs.w 5f1a8 │ │ ldrb r4, [r0, r2] │ │ adds r2, r6, #2 │ │ str r2, [r5, #20] │ │ cmp r4, #114 @ 0x72 │ │ - bne.w 5f116 │ │ + bne.w 5f1b2 │ │ cmp r2, r3 │ │ - beq.w 5f10e │ │ + beq.w 5f1aa │ │ ldrb r4, [r0, r2] │ │ adds r2, r6, #3 │ │ str r2, [r5, #20] │ │ cmp r4, #117 @ 0x75 │ │ - bne.w 5f116 │ │ + bne.w 5f1b2 │ │ cmp r2, r3 │ │ - beq.w 5f10e │ │ + beq.w 5f1aa │ │ ldrb r3, [r0, r2] │ │ adds r2, r6, #4 │ │ cmp r3, #101 @ 0x65 │ │ str r2, [r5, #20] │ │ - beq.n 5ef38 │ │ - b.n 5f116 │ │ + beq.n 5efd4 │ │ + b.n 5f1b2 │ │ adds r2, r6, #1 │ │ mov r3, r1 │ │ str r2, [r5, #20] │ │ cmp r2, r1 │ │ it hi │ │ movhi r3, r2 │ │ - bcs.w 5f10c │ │ + bcs.w 5f1a8 │ │ ldrb r4, [r0, r2] │ │ adds r2, r6, #2 │ │ str r2, [r5, #20] │ │ cmp r4, #117 @ 0x75 │ │ - bne.w 5f116 │ │ + bne.w 5f1b2 │ │ cmp r2, r3 │ │ - beq.w 5f10e │ │ + beq.w 5f1aa │ │ ldrb r4, [r0, r2] │ │ adds r2, r6, #3 │ │ str r2, [r5, #20] │ │ cmp r4, #108 @ 0x6c │ │ - bne.w 5f116 │ │ + bne.w 5f1b2 │ │ cmp r2, r3 │ │ - beq.w 5f10e │ │ + beq.w 5f1aa │ │ ldrb r3, [r0, r2] │ │ adds r2, r6, #4 │ │ str r2, [r5, #20] │ │ cmp r3, #108 @ 0x6c │ │ - beq.n 5ef38 │ │ - b.n 5f116 │ │ + beq.n 5efd4 │ │ + b.n 5f1b2 │ │ adds r0, r6, #1 │ │ str r0, [r5, #20] │ │ mov r0, r8 │ │ - bl 765e8 │ │ - b.n 5ef32 │ │ + bl 76650 │ │ + b.n 5efce │ │ adds r0, r6, #1 │ │ str r0, [r5, #20] │ │ - b.n 5ef2c │ │ + b.n 5efc8 │ │ sub.w r2, r4, #48 @ 0x30 │ │ cmp r2, #10 │ │ - bcs.w 5f138 │ │ + bcs.w 5f1d4 │ │ mov r0, r5 │ │ - bl 5f29e │ │ + bl 5f38e │ │ cmp r0, #0 │ │ - bne.w 5ed4a │ │ + bne.w 5ede6 │ │ lsls r0, r7, #31 │ │ - beq.n 5ef4a │ │ + beq.n 5efe6 │ │ movs r2, #1 │ │ mov r4, fp │ │ ldrd r1, r6, [r5, #16] │ │ cmp r6, r1 │ │ - bcc.n 5ef66 │ │ - b.n 5f0dc │ │ + bcc.n 5f002 │ │ + b.n 5f178 │ │ ldr r0, [r5, #8] │ │ cmp r0, #0 │ │ - beq.w 5f0ba │ │ + beq.w 5f156 │ │ ldr r1, [r5, #4] │ │ subs r0, #1 │ │ str r0, [r5, #8] │ │ movs r2, #1 │ │ ldrb r4, [r1, r0] │ │ ldrd r1, r6, [r5, #16] │ │ cmp r6, r1 │ │ - bcs.w 5f0dc │ │ + bcs.w 5f178 │ │ ldr.w ip, [r5, #4] │ │ mov fp, r4 │ │ ldr r7, [r5, #8] │ │ ldr r0, [r5, #12] │ │ ldrb r4, [r0, r6] │ │ sub.w r3, r4, #9 │ │ cmp r3, #35 @ 0x23 │ │ - bhi.n 5efac │ │ + bhi.n 5f048 │ │ tbb [pc, r3] │ │ asrs r2, r2, #8 │ │ cmp r7, #47 @ 0x2f │ │ cmp r7, #18 │ │ cmp r7, #47 @ 0x2f │ │ cmp r7, #47 @ 0x2f │ │ cmp r7, #47 @ 0x2f │ │ @@ -82683,77 +82616,77 @@ │ │ cmp r7, #47 @ 0x2f │ │ cmp r7, #47 @ 0x2f │ │ cmp r7, #47 @ 0x2f │ │ adds r7, #47 @ 0x2f │ │ adds r6, #1 │ │ str r6, [r5, #20] │ │ cmp r1, r6 │ │ - bne.n 5ef70 │ │ - b.n 5f0a2 │ │ + bne.n 5f00c │ │ + b.n 5f13e │ │ cmp r4, #93 @ 0x5d │ │ - beq.n 5efbc │ │ + beq.n 5f058 │ │ cmp r4, #125 @ 0x7d │ │ - bne.n 5efdc │ │ + bne.n 5f078 │ │ cmp.w fp, #123 @ 0x7b │ │ - beq.n 5efc2 │ │ - b.n 5efdc │ │ + beq.n 5f05e │ │ + b.n 5f078 │ │ cmp.w fp, #91 @ 0x5b │ │ - bne.n 5efdc │ │ + bne.n 5f078 │ │ adds r6, #1 │ │ cmp r7, #0 │ │ str r6, [r5, #20] │ │ - beq.w 5f0ba │ │ + beq.w 5f156 │ │ subs r7, #1 │ │ str r7, [r5, #8] │ │ movs r2, #1 │ │ cmp r6, r1 │ │ ldrb.w fp, [ip, r7] │ │ - bcc.n 5ef70 │ │ - b.n 5f0a4 │ │ + bcc.n 5f00c │ │ + b.n 5f140 │ │ lsls r2, r2, #31 │ │ - bne.w 5f11c │ │ + bne.w 5f1b8 │ │ cmp.w fp, #123 @ 0x7b │ │ - bne.w 5ed78 │ │ - b.n 5effc │ │ + bne.w 5ee14 │ │ + b.n 5f098 │ │ lsls r2, r2, #31 │ │ itt ne │ │ addne r6, #1 │ │ strne r6, [r5, #20] │ │ cmp.w fp, #123 @ 0x7b │ │ - bne.w 5ed78 │ │ + bne.w 5ee14 │ │ cmp r6, r1 │ │ - bcs.w 5f0cc │ │ + bcs.w 5f168 │ │ ldrb r2, [r0, r6] │ │ subs r2, #9 │ │ cmp r2, #25 │ │ - bhi.w 5f12c │ │ + bhi.w 5f1c8 │ │ lsl.w r3, r9, r2 │ │ tst.w r3, sl │ │ - beq.n 5f020 │ │ + beq.n 5f0bc │ │ adds r6, #1 │ │ str r6, [r5, #20] │ │ cmp r1, r6 │ │ - bne.n 5f002 │ │ - b.n 5f0ca │ │ + bne.n 5f09e │ │ + b.n 5f166 │ │ cmp r2, #25 │ │ - bne.w 5f12c │ │ + bne.w 5f1c8 │ │ adds r0, r6, #1 │ │ str r0, [r5, #20] │ │ mov r0, r8 │ │ - bl 765e8 │ │ + bl 76650 │ │ cmp r0, #0 │ │ - bne.w 5ed4a │ │ + bne.w 5ede6 │ │ add.w r2, r5, #12 │ │ ldmia r2, {r0, r1, r2} │ │ cmp r2, r1 │ │ - bcs.w 5f0d4 │ │ + bcs.w 5f170 │ │ ldrb r3, [r0, r2] │ │ subs r3, #9 │ │ cmp r3, #49 @ 0x31 │ │ - bhi.w 5f130 │ │ + bhi.w 5f1cc │ │ tbb [pc, r3] │ │ adds r4, r3, #0 │ │ strb r0, [r6, #1] │ │ strb r4, [r3, #0] │ │ strb r0, [r6, #1] │ │ strb r0, [r6, #1] │ │ strb r0, [r6, #1] │ │ @@ -82774,125 +82707,160 @@ │ │ strb r0, [r6, #1] │ │ strb r0, [r6, #1] │ │ strb r0, [r6, #1] │ │ strb r0, [r6, #1] │ │ adds r0, r6, r5 │ │ adds r6, r2, #1 │ │ str r6, [r5, #20] │ │ - b.n 5ed78 │ │ + b.n 5ee14 │ │ adds r2, #1 │ │ str r2, [r5, #20] │ │ cmp r1, r2 │ │ - bne.n 5f042 │ │ - b.n 5f0d2 │ │ + bne.n 5f0de │ │ + b.n 5f16e │ │ mov r0, r5 │ │ movs r3, #1 │ │ str.w r9, [sp] │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r5, #8] │ │ - b.n 5ee22 │ │ + b.n 5eebe │ │ mov r6, r1 │ │ cmp.w fp, #91 @ 0x5b │ │ - beq.n 5f0e4 │ │ + beq.n 5f180 │ │ cmp.w fp, #123 @ 0x7b │ │ - bne.n 5f13c │ │ + bne.n 5f1d8 │ │ movs r0, #3 │ │ - b.n 5f0e6 │ │ + b.n 5f182 │ │ mov r6, r1 │ │ movs r2, #5 │ │ - b.n 5f0ce │ │ + b.n 5f16a │ │ movs r0, #0 │ │ add sp, #20 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr.w r0, [r8] │ │ movs r2, #5 │ │ - b.n 5f0ce │ │ + b.n 5f16a │ │ mov r6, r1 │ │ movs r2, #3 │ │ str r2, [sp, #8] │ │ - b.n 5f0ec │ │ + b.n 5f188 │ │ mov r2, r1 │ │ movs r3, #3 │ │ str r3, [sp, #8] │ │ adds r2, #1 │ │ - b.n 5f0ee │ │ + b.n 5f18a │ │ mov fp, r4 │ │ cmp.w fp, #91 @ 0x5b │ │ - bne.n 5f0aa │ │ + bne.n 5f146 │ │ movs r0, #2 │ │ str r0, [sp, #8] │ │ ldr.w r0, [r8] │ │ adds r2, r6, #1 │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #8 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ add sp, #20 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r3, r2 │ │ movs r2, #5 │ │ str r2, [sp, #8] │ │ mov r2, r3 │ │ - b.n 5f0f4 │ │ + b.n 5f190 │ │ movs r3, #9 │ │ str r3, [sp, #8] │ │ - b.n 5f0f4 │ │ + b.n 5f190 │ │ cmp.w fp, #91 @ 0x5b │ │ - beq.n 5f134 │ │ + beq.n 5f1d0 │ │ cmp.w fp, #123 @ 0x7b │ │ - bne.n 5f14a │ │ + bne.n 5f1e6 │ │ movs r2, #8 │ │ - b.n 5f0ce │ │ + b.n 5f16a │ │ movs r2, #17 │ │ - b.n 5f0ce │ │ + b.n 5f16a │ │ movs r3, #6 │ │ - b.n 5f0d6 │ │ + b.n 5f172 │ │ movs r2, #7 │ │ - b.n 5f0ce │ │ + b.n 5f16a │ │ movs r2, #10 │ │ - b.n 5f0ce │ │ - ldr r0, [pc, #24] @ (5f158 ) │ │ + b.n 5f16a │ │ + ldr r0, [pc, #24] @ (5f1f4 ) │ │ movs r1, #40 @ 0x28 │ │ - ldr r2, [pc, #24] @ (5f15c ) │ │ + ldr r2, [pc, #24] @ (5f1f8 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r0, [pc, #20] @ (5f160 ) │ │ + bl 3fd54 │ │ + ldr r0, [pc, #20] @ (5f1fc ) │ │ movs r1, #40 @ 0x28 │ │ - ldr r2, [pc, #20] @ (5f164 ) │ │ + ldr r2, [pc, #20] @ (5f200 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - add r3, pc, #44 @ (adr r3, 5f188 ) │ │ - vqshlu.s32 d27, d0, #27 │ │ + bl 3fd54 │ │ + add r2, pc, #444 @ (adr r2, 5f3b4 ) │ │ + vrsqrte.f32 d27, d4 │ │ movs r7, r0 │ │ - add r2, pc, #1012 @ (adr r2, 5f558 ) │ │ - vqshlu.s32 d27, d2, #27 │ │ + add r2, pc, #388 @ (adr r2, 5f384 ) │ │ + vrsqrte.f32 d27, d6 │ │ movs r7, r0 │ │ mov r3, r1 │ │ ldrd r1, r2, [r0] │ │ mov r0, r3 │ │ - b.w 3ffd4 │ │ + b.w 402dc │ │ + push {r4, r5, r6, lr} │ │ + sub sp, #16 │ │ + mov r5, r0 │ │ + mov r2, r1 │ │ + lsls r0, r1, #31 │ │ + bne.n 5f22e │ │ + add r0, sp, #4 │ │ + mov r1, r5 │ │ + bl 3e3f4 │ │ + add r0, sp, #4 │ │ + bl 755a8 │ │ + add sp, #16 │ │ + pop {r4, r5, r6, pc} │ │ + lsrs r4, r2, #1 │ │ + cmp r2, #2 │ │ + bcs.n 5f238 │ │ + movs r6, #1 │ │ + b.n 5f242 │ │ + mov r0, r4 │ │ + blx d8810 │ │ + mov r6, r0 │ │ + cbz r0, 5f25c │ │ + mov r0, r6 │ │ + mov r1, r5 │ │ + mov r2, r4 │ │ + bl d52ea │ │ + str r4, [sp, #12] │ │ + strd r4, r6, [sp, #4] │ │ + add r0, sp, #4 │ │ + bl 755a8 │ │ + add sp, #16 │ │ + pop {r4, r5, r6, pc} │ │ + movs r0, #1 │ │ + mov r1, r4 │ │ + bl 3e2ac │ │ push {r7, lr} │ │ sub sp, #16 │ │ mov ip, r0 │ │ ldr r0, [r0, #12] │ │ ldrd r1, lr, [ip, #16] │ │ cmp lr, r1 │ │ - bcs.n 5f1d4 │ │ + bcs.n 5f2c4 │ │ ldrb.w r2, [r0, lr] │ │ subs r2, #9 │ │ cmp r2, #49 @ 0x31 │ │ - bhi.w 5f206 │ │ + bhi.w 5f2f6 │ │ tbb [pc, r2] │ │ adds r1, r3, r4 │ │ subs r1, #57 @ 0x39 │ │ subs r1, #25 │ │ subs r1, #57 @ 0x39 │ │ subs r1, #57 @ 0x39 │ │ subs r1, #57 @ 0x39 │ │ @@ -82914,50 +82882,50 @@ │ │ subs r1, #57 @ 0x39 │ │ subs r1, #57 @ 0x39 │ │ subs r1, #57 @ 0x39 │ │ adds r2, #57 @ 0x39 │ │ add.w lr, lr, #1 │ │ str.w lr, [ip, #20] │ │ cmp r1, lr │ │ - bne.n 5f184 │ │ + bne.n 5f274 │ │ mov lr, r1 │ │ movs r2, #3 │ │ str r2, [sp, #4] │ │ add.w r2, lr, #1 │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #4 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ add sp, #16 │ │ pop {r7, pc} │ │ add.w r0, lr, #1 │ │ str.w r0, [ip, #20] │ │ movs r0, #0 │ │ add sp, #16 │ │ pop {r7, pc} │ │ movs r2, #6 │ │ - b.n 5f1d6 │ │ - bmi.n 5f1b6 │ │ + b.n 5f2c6 │ │ + bmi.n 5f2a6 │ │ push {r7, lr} │ │ sub sp, #16 │ │ mov ip, r0 │ │ ldr r0, [r0, #12] │ │ ldrd r1, lr, [ip, #16] │ │ cmp lr, r1 │ │ - bcs.n 5f25e │ │ + bcs.n 5f34e │ │ ldrb.w r3, [r0, lr] │ │ sub.w r2, r3, #9 │ │ cmp r2, #35 @ 0x23 │ │ - bhi.n 5f262 │ │ + bhi.n 5f352 │ │ tbb [pc, r2] │ │ asrs r2, r2, #8 │ │ movs r5, #37 @ 0x25 │ │ movs r5, #18 │ │ movs r5, #37 @ 0x25 │ │ movs r5, #37 @ 0x25 │ │ movs r5, #37 @ 0x25 │ │ @@ -82972,337 +82940,337 @@ │ │ movs r5, #37 @ 0x25 │ │ movs r5, #37 @ 0x25 │ │ movs r5, #37 @ 0x25 │ │ adds r7, #37 @ 0x25 │ │ add.w lr, lr, #1 │ │ str.w lr, [ip, #20] │ │ cmp r1, lr │ │ - bne.n 5f21c │ │ + bne.n 5f30c │ │ mov lr, r1 │ │ movs r2, #3 │ │ - b.n 5f278 │ │ + b.n 5f368 │ │ cmp r3, #125 @ 0x7d │ │ itttt eq │ │ addeq.w r0, lr, #1 │ │ streq.w r0, [ip, #20] │ │ moveq r0, #0 │ │ addeq sp, #16 │ │ it eq │ │ popeq {r7, pc} │ │ movs r2, #22 │ │ str r2, [sp, #4] │ │ add.w r2, lr, #1 │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #4 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ add sp, #16 │ │ pop {r7, pc} │ │ movs r2, #21 │ │ - b.n 5f278 │ │ + b.n 5f368 │ │ push {r4, lr} │ │ sub sp, #16 │ │ mov lr, r0 │ │ ldr r0, [r0, #12] │ │ ldrd r1, r2, [lr, #16] │ │ cmp r2, r1 │ │ - bcs.w 5f3f4 │ │ + bcs.w 5f4e4 │ │ ldrb.w ip, [r0, r2] │ │ adds r4, r2, #1 │ │ str.w r4, [lr, #20] │ │ cmp.w ip, #48 @ 0x30 │ │ - bne.n 5f2da │ │ + bne.n 5f3ca │ │ cmp r4, r1 │ │ - bcs.n 5f2fc │ │ + bcs.n 5f3ec │ │ ldrb r3, [r0, r4] │ │ subs r3, #48 @ 0x30 │ │ cmp r3, #9 │ │ - bhi.n 5f2fc │ │ + bhi.n 5f3ec │ │ adds r2, #2 │ │ movs r3, #13 │ │ str r3, [sp, #4] │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - b.n 5f3f8 │ │ + b.n 5f4e8 │ │ sub.w r2, ip, #49 @ 0x31 │ │ cmp r2, #8 │ │ - bhi.w 5f3f2 │ │ + bhi.w 5f4e2 │ │ cmp r4, r1 │ │ - bcs.n 5f2fc │ │ + bcs.n 5f3ec │ │ ldrb r2, [r0, r4] │ │ subs r2, #48 @ 0x30 │ │ cmp r2, #9 │ │ - bhi.n 5f2fc │ │ + bhi.n 5f3ec │ │ adds r4, #1 │ │ str.w r4, [lr, #20] │ │ cmp r1, r4 │ │ - bne.n 5f2e8 │ │ - b.n 5f3e0 │ │ + bne.n 5f3d8 │ │ + b.n 5f4d0 │ │ cmp r4, r1 │ │ - bcs.n 5f3e0 │ │ + bcs.n 5f4d0 │ │ ldrb r2, [r0, r4] │ │ cmp r2, #101 @ 0x65 │ │ it ne │ │ cmpne r2, #69 @ 0x45 │ │ - bne.n 5f354 │ │ + bne.n 5f444 │ │ adds r2, r4, #1 │ │ str.w r2, [lr, #20] │ │ cmp r2, r1 │ │ - bcs.n 5f32a │ │ + bcs.n 5f41a │ │ ldrb.w ip, [r0, r2] │ │ cmp.w ip, #43 @ 0x2b │ │ it ne │ │ cmpne.w ip, #45 @ 0x2d │ │ - bne.n 5f32a │ │ + bne.n 5f41a │ │ adds r2, r4, #2 │ │ str.w r2, [lr, #20] │ │ cmp r2, r1 │ │ - bcs.n 5f3f4 │ │ + bcs.n 5f4e4 │ │ ldrb r3, [r0, r2] │ │ adds r2, #1 │ │ str.w r2, [lr, #20] │ │ subs r3, #48 @ 0x30 │ │ cmp r3, #9 │ │ - bhi.n 5f3f4 │ │ + bhi.n 5f4e4 │ │ cmp r2, r1 │ │ - bcs.n 5f3e0 │ │ + bcs.n 5f4d0 │ │ ldrb r3, [r0, r2] │ │ subs r3, #48 @ 0x30 │ │ cmp r3, #9 │ │ - bhi.n 5f3e0 │ │ + bhi.n 5f4d0 │ │ adds r2, #1 │ │ str.w r2, [lr, #20] │ │ cmp r1, r2 │ │ - bne.n 5f340 │ │ - b.n 5f3e0 │ │ + bne.n 5f430 │ │ + b.n 5f4d0 │ │ cmp r2, #46 @ 0x2e │ │ - bne.n 5f3e0 │ │ + bne.n 5f4d0 │ │ adds r2, r4, #1 │ │ str.w r2, [lr, #20] │ │ cmp r2, r1 │ │ - bcs.n 5f3ea │ │ + bcs.n 5f4da │ │ ldrb r2, [r0, r2] │ │ subs r2, #48 @ 0x30 │ │ cmp r2, #9 │ │ - bhi.n 5f3ea │ │ + bhi.n 5f4da │ │ adds r3, r4, #2 │ │ cmp r1, r3 │ │ - beq.n 5f3dc │ │ + beq.n 5f4cc │ │ ldrb.w ip, [r0, r3] │ │ mov r2, r3 │ │ adds r3, #1 │ │ sub.w r4, ip, #48 @ 0x30 │ │ cmp r4, #10 │ │ - bcc.n 5f36c │ │ + bcc.n 5f45c │ │ orr.w r3, ip, #32 │ │ str.w r2, [lr, #20] │ │ cmp r3, #101 @ 0x65 │ │ - bne.n 5f3e0 │ │ + bne.n 5f4d0 │ │ subs r3, r2, #1 │ │ adds r2, r3, #2 │ │ str.w r2, [lr, #20] │ │ cmp r2, r1 │ │ - bcs.n 5f3ae │ │ + bcs.n 5f49e │ │ ldrb.w ip, [r0, r2] │ │ cmp.w ip, #43 @ 0x2b │ │ it ne │ │ cmpne.w ip, #45 @ 0x2d │ │ - bne.n 5f3ae │ │ + bne.n 5f49e │ │ adds r2, r3, #3 │ │ str.w r2, [lr, #20] │ │ cmp r2, r1 │ │ - bcs.n 5f3f4 │ │ + bcs.n 5f4e4 │ │ ldrb r3, [r0, r2] │ │ adds r2, #1 │ │ str.w r2, [lr, #20] │ │ subs r3, #48 @ 0x30 │ │ cmp r3, #9 │ │ - bhi.n 5f3f4 │ │ + bhi.n 5f4e4 │ │ cmp r2, r1 │ │ - bcs.n 5f3e0 │ │ + bcs.n 5f4d0 │ │ mov.w ip, #0 │ │ ldrb r3, [r0, r2] │ │ subs r3, #48 @ 0x30 │ │ cmp r3, #9 │ │ - bhi.n 5f3e0 │ │ + bhi.n 5f4d0 │ │ adds r2, #1 │ │ str.w r2, [lr, #20] │ │ cmp r1, r2 │ │ - bne.n 5f3c8 │ │ - b.n 5f3e4 │ │ + bne.n 5f4b8 │ │ + b.n 5f4d4 │ │ str.w r1, [lr, #20] │ │ mov.w ip, #0 │ │ mov r0, ip │ │ add sp, #16 │ │ pop {r4, pc} │ │ movs r2, #13 │ │ str r2, [sp, #4] │ │ adds r2, r4, #2 │ │ - b.n 5f2d2 │ │ + b.n 5f3c2 │ │ mov r2, r4 │ │ movs r3, #13 │ │ str r3, [sp, #4] │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #4 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ mov ip, r0 │ │ mov r0, ip │ │ add sp, #16 │ │ pop {r4, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ sub sp, #32 │ │ ldrd r9, r3, [r1, #16] │ │ mov r8, r0 │ │ cmp r3, r9 │ │ - bcs.w 5f564 │ │ + bcs.w 5f654 │ │ ldr r0, [r1, #12] │ │ adds r6, r3, #1 │ │ str r6, [r1, #20] │ │ ldrb r7, [r0, r3] │ │ cmp r7, #48 @ 0x30 │ │ - bne.n 5f474 │ │ + bne.n 5f564 │ │ cmp r6, r9 │ │ - bcs.w 5f5e8 │ │ + bcs.w 5f6d8 │ │ ldrb r7, [r0, r6] │ │ sub.w r6, r7, #48 @ 0x30 │ │ cmp r6, #10 │ │ - bcs.w 5f5cc │ │ + bcs.w 5f6bc │ │ movs r1, #13 │ │ adds r2, r3, #2 │ │ str r1, [sp, #16] │ │ cmp r2, r9 │ │ it cs │ │ movcs r2, r9 │ │ mov r1, r9 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #16 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ movs r1, #0 │ │ movs r2, #3 │ │ strd r2, r1, [r8] │ │ str.w r0, [r8, #8] │ │ add sp, #32 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ sub.w r3, r7, #49 @ 0x31 │ │ uxtb r3, r3 │ │ cmp r3, #9 │ │ - bcs.w 5f5c4 │ │ + bcs.w 5f6b4 │ │ sub.w r3, r7, #48 @ 0x30 │ │ cmp r6, r9 │ │ uxtb r7, r3 │ │ mov.w r3, #0 │ │ - bcs.n 5f4fc │ │ + bcs.n 5f5ec │ │ movw ip, #39321 @ 0x9999 │ │ mov.w lr, #10 │ │ movt ip, #6553 @ 0x1999 │ │ - b.n 5f4b2 │ │ + b.n 5f5a2 │ │ add.w r3, r3, r3, lsl #2 │ │ adds r6, #1 │ │ str r6, [r1, #20] │ │ cmp r9, r6 │ │ mov.w r3, r3, lsl #1 │ │ umlal r5, r3, r7, lr │ │ mov r7, r5 │ │ - beq.n 5f524 │ │ + beq.n 5f614 │ │ ldrb r5, [r0, r6] │ │ subs r5, #48 @ 0x30 │ │ uxtb r5, r5 │ │ cmp r5, #10 │ │ - bcs.n 5f4fc │ │ + bcs.n 5f5ec │ │ subs.w r4, r7, #2576980377 @ 0x99999999 │ │ sbcs.w r4, r3, ip │ │ - bcc.n 5f49c │ │ + bcc.n 5f58c │ │ eor.w sl, r3, ip │ │ eor.w r4, r7, #2576980377 @ 0x99999999 │ │ orrs.w r4, r4, sl │ │ - bne.n 5f4d8 │ │ + bne.n 5f5c8 │ │ cmp r5, #5 │ │ - bls.n 5f49c │ │ + bls.n 5f58c │ │ add r0, sp, #16 │ │ strd r7, r3, [sp] │ │ - bl 42b9c │ │ + bl 42ea4 │ │ ldr r0, [sp, #16] │ │ cmp r0, #1 │ │ - bne.n 5f5ae │ │ + bne.n 5f69e │ │ ldr r0, [sp, #20] │ │ movs r1, #0 │ │ str.w r0, [r8, #8] │ │ movs r0, #3 │ │ strd r0, r1, [r8] │ │ add sp, #32 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ cmp r6, r9 │ │ - bcs.n 5f522 │ │ + bcs.n 5f612 │ │ ldrb r0, [r0, r6] │ │ cmp r0, #46 @ 0x2e │ │ - beq.n 5f570 │ │ + beq.n 5f660 │ │ cmp r0, #69 @ 0x45 │ │ it ne │ │ cmpne r0, #101 @ 0x65 │ │ - bne.n 5f522 │ │ + bne.n 5f612 │ │ add r0, sp, #16 │ │ movs r4, #0 │ │ strd r7, r3, [sp] │ │ str r4, [sp, #8] │ │ - bl 42df4 │ │ + bl 430fc │ │ ldr r0, [sp, #16] │ │ - cbz r0, 5f598 │ │ - b.n 5f582 │ │ + cbz r0, 5f688 │ │ + b.n 5f672 │ │ mov r5, r7 │ │ movs r1, #0 │ │ - cbz r2, 5f538 │ │ + cbz r2, 5f628 │ │ movs r0, #1 │ │ stmia.w r8, {r0, r1, r5} │ │ str.w r3, [r8, #12] │ │ add sp, #32 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ negs r2, r5 │ │ sbcs.w r7, r1, r3 │ │ - bmi.n 5f550 │ │ + bmi.n 5f640 │ │ mov r0, r5 │ │ mov r1, r3 │ │ - bl d52e8 │ │ + bl d50e8 │ │ mov r5, r0 │ │ orr.w r3, r1, #2147483648 @ 0x80000000 │ │ - b.n 5f59c │ │ + b.n 5f68c │ │ movs r0, #2 │ │ mov r5, r2 │ │ mov r3, r7 │ │ stmia.w r8, {r0, r1, r5} │ │ str.w r3, [r8, #12] │ │ add sp, #32 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ ldr r0, [r1, #12] │ │ movs r1, #5 │ │ str r1, [sp, #16] │ │ mov r1, r9 │ │ mov r2, r3 │ │ - b.n 5f450 │ │ + b.n 5f540 │ │ add r0, sp, #16 │ │ movs r4, #0 │ │ strd r7, r3, [sp] │ │ str r4, [sp, #8] │ │ - bl 42cdc │ │ + bl 42fe4 │ │ ldr r0, [sp, #16] │ │ - cbz r0, 5f598 │ │ + cbz r0, 5f688 │ │ ldr r0, [sp, #20] │ │ movs r1, #3 │ │ str.w r1, [r8] │ │ str.w r4, [r8, #4] │ │ str.w r0, [r8, #8] │ │ add sp, #32 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ @@ -83320,849 +83288,840 @@ │ │ vstr d16, [r8, #8] │ │ strd r0, r1, [r8] │ │ add sp, #32 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ movs r1, #13 │ │ mov r2, r6 │ │ str r1, [sp, #16] │ │ - b.n 5f44e │ │ + b.n 5f53e │ │ cmp r7, #46 @ 0x2e │ │ - beq.n 5f604 │ │ + beq.n 5f6f4 │ │ cmp r7, #69 @ 0x45 │ │ it ne │ │ cmpne r7, #101 @ 0x65 │ │ - bne.n 5f5e8 │ │ + bne.n 5f6d8 │ │ add r0, sp, #16 │ │ movs r4, #0 │ │ strd r4, r4, [sp] │ │ str r4, [sp, #8] │ │ - bl 42df4 │ │ - b.n 5f612 │ │ + bl 430fc │ │ + b.n 5f702 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ cmp r2, #0 │ │ it ne │ │ movne r0, #0 │ │ movs r1, #0 │ │ movs r3, #0 │ │ strd r1, r0, [r8, #8] │ │ strd r2, r3, [r8] │ │ add sp, #32 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ add r0, sp, #16 │ │ movs r4, #0 │ │ strd r4, r4, [sp] │ │ str r4, [sp, #8] │ │ - bl 42cdc │ │ + bl 42fe4 │ │ ldr r0, [sp, #16] │ │ cmp r0, #0 │ │ - bne.n 5f582 │ │ + bne.n 5f672 │ │ ldr r1, [sp, #24] │ │ movs r2, #0 │ │ ldr r0, [sp, #28] │ │ - b.n 5f5f4 │ │ + b.n 5f6e4 │ │ ldrd r0, r2, [r1] │ │ - ldr r1, [pc, #8] @ (5f630 ) │ │ + ldr r1, [pc, #8] @ (5f720 ) │ │ ldr r3, [r2, #12] │ │ movs r2, #2 │ │ add r1, pc │ │ bx r3 │ │ nop │ │ - ldrb r0, [r4, #22] │ │ + ldrb r7, [r5, #18] │ │ @ instruction: 0xfffbe9d1 │ │ lsls r0, r0, #8 │ │ - ldr r1, [pc, #8] @ (5f644 ) │ │ + ldr r1, [pc, #8] @ (5f734 ) │ │ ldr r3, [r2, #12] │ │ movs r2, #17 │ │ add r1, pc │ │ bx r3 │ │ nop │ │ - ldr r6, [r4, #88] @ 0x58 │ │ - @ instruction: 0xfffbe9d1 │ │ - lsls r0, r0, #8 │ │ - ldr r1, [pc, #8] @ (5f658 ) │ │ - ldr r3, [r2, #12] │ │ - movs r2, #10 │ │ - add r1, pc │ │ - bx r3 │ │ - nop │ │ - ldr r2, [r7, #68] @ 0x44 │ │ + ldr r6, [r6, #72] @ 0x48 │ │ vtbl.8 d30, {d11-d12}, d29 │ │ - ldr r7, [pc, #960] @ (5fa20 ) │ │ + ldr r7, [pc, #960] @ (5fafc ) │ │ sub sp, #84 @ 0x54 │ │ mov r5, r1 │ │ mov r4, r0 │ │ ldrd r0, r1, [r1, #12] │ │ ldr r2, [r5, #20] │ │ cmp r2, r1 │ │ - bcs.n 5f698 │ │ + bcs.n 5f774 │ │ movw fp, #19 │ │ movs r3, #1 │ │ movt fp, #128 @ 0x80 │ │ ldrb r7, [r0, r2] │ │ sub.w r6, r7, #9 │ │ cmp r6, #23 │ │ - bhi.n 5f6c4 │ │ + bhi.n 5f7a0 │ │ lsl.w r6, r3, r6 │ │ tst.w r6, fp │ │ - beq.n 5f6c4 │ │ + beq.n 5f7a0 │ │ adds r2, #1 │ │ str r2, [r5, #20] │ │ cmp r1, r2 │ │ - bne.n 5f67a │ │ + bne.n 5f756 │ │ mov r2, r1 │ │ movs r3, #5 │ │ adds r2, #1 │ │ str r3, [sp, #60] @ 0x3c │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #60 @ 0x3c │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ strd r1, r0, [r4] │ │ add sp, #84 @ 0x54 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ cmp r7, #91 @ 0x5b │ │ - bne.w 5fcae │ │ + bne.w 5fd8a │ │ ldrb r3, [r5, #24] │ │ subs r3, #1 │ │ strb r3, [r5, #24] │ │ lsls r3, r3, #24 │ │ - beq.w 5fcd0 │ │ + beq.w 5fdac │ │ adds r0, r2, #1 │ │ str r0, [r5, #20] │ │ movs r0, #4 │ │ str r5, [sp, #4] │ │ str r5, [sp, #32] │ │ add r5, sp, #60 @ 0x3c │ │ str r0, [sp, #44] @ 0x2c │ │ movs r0, #0 │ │ str r4, [sp, #0] │ │ movs r4, #1 │ │ str r0, [sp, #40] @ 0x28 │ │ movs r6, #4 │ │ mov.w r8, #0 │ │ strb.w r4, [sp, #36] @ 0x24 │ │ - b.n 5f71a │ │ + b.n 5f7f6 │ │ add r0, sp, #40 @ 0x28 │ │ - bl 47b44 │ │ + bl 47d60 │ │ ldr r6, [sp, #44] @ 0x2c │ │ lsls r0, r7, #4 │ │ ldr r1, [sp, #20] │ │ add.w r8, r7, #1 │ │ str r4, [r6, r0] │ │ add.w r0, r6, r7, lsl #4 │ │ movs r4, #1 │ │ strd r1, r5, [r0, #8] │ │ add r5, sp, #60 @ 0x3c │ │ str.w sl, [r0, #4] │ │ add r1, sp, #32 │ │ mov r0, r5 │ │ str.w r8, [sp, #48] @ 0x30 │ │ - bl 5c49e │ │ + bl 5c67a │ │ ldrb.w r0, [sp, #60] @ 0x3c │ │ cmp r0, #1 │ │ - beq.w 5fafa │ │ + beq.w 5fbd6 │ │ ldrb.w r0, [sp, #61] @ 0x3d │ │ cmp r0, #1 │ │ - bne.w 5fb06 │ │ + bne.w 5fbe2 │ │ ldr r6, [sp, #32] │ │ add.w r2, r6, #12 │ │ ldmia r2, {r0, r1, r2} │ │ cmp r2, r1 │ │ - bcs.w 5fb1e │ │ + bcs.w 5fbfa │ │ mov.w ip, #0 │ │ ldrb r3, [r0, r2] │ │ sub.w r7, r3, #9 │ │ cmp r7, #23 │ │ - bhi.n 5f76a │ │ + bhi.n 5f846 │ │ lsl.w r7, r4, r7 │ │ tst.w r7, fp │ │ - beq.n 5f76a │ │ + beq.n 5f846 │ │ adds r2, #1 │ │ str r2, [r6, #20] │ │ cmp r1, r2 │ │ - bne.n 5f74c │ │ - b.n 5fb1c │ │ + bne.n 5f828 │ │ + b.n 5fbf8 │ │ cmp r3, #91 @ 0x5b │ │ - beq.w 5f8b4 │ │ + beq.w 5f990 │ │ cmp r3, #123 @ 0x7b │ │ - bne.w 5fc9e │ │ + bne.w 5fd7a │ │ ldrb r3, [r6, #24] │ │ subs r3, #1 │ │ strb r3, [r6, #24] │ │ lsls r3, r3, #24 │ │ - beq.w 5fb72 │ │ + beq.w 5fc4e │ │ adds r0, r2, #1 │ │ str r0, [r6, #20] │ │ movs r0, #2 │ │ strb.w r4, [sp, #56] @ 0x38 │ │ str r0, [sp, #28] │ │ movs r0, #3 │ │ str r0, [sp, #24] │ │ mov r7, ip │ │ mov.w r4, #2147483648 @ 0x80000000 │ │ str r6, [sp, #52] @ 0x34 │ │ - b.n 5f7b8 │ │ - ldr r1, [pc, #888] @ (5fb18 ) │ │ + b.n 5f894 │ │ + ldr r1, [pc, #888] @ (5fbf4 ) │ │ mov r0, sl │ │ movs r2, #13 │ │ add r1, pc │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - beq.n 5f888 │ │ + beq.n 5f964 │ │ mov r0, r9 │ │ - bl 5ed3c │ │ + bl 5edd8 │ │ cmp r0, #0 │ │ - bne.w 5faaa │ │ + bne.w 5fb86 │ │ add r5, sp, #60 @ 0x3c │ │ add r1, sp, #52 @ 0x34 │ │ mov r0, r5 │ │ - bl 5ebfc │ │ + bl 34854 │ │ ldrb.w r0, [sp, #60] @ 0x3c │ │ cmp r0, #1 │ │ - beq.w 5f900 │ │ + beq.w 5f9dc │ │ ldrb.w r0, [sp, #61] @ 0x3d │ │ cmp r0, #1 │ │ - bne.w 5f90e │ │ + bne.w 5f9ea │ │ ldr.w r9, [sp, #52] @ 0x34 │ │ add.w r1, r9, #12 │ │ ldr.w r0, [r9, #20] │ │ mov r2, r9 │ │ str.w r7, [r9, #8] │ │ adds r0, #1 │ │ str.w r0, [r9, #20] │ │ mov r0, r5 │ │ - bl 767d4 │ │ + bl 7683c │ │ ldrd r1, sl, [sp, #60] @ 0x3c │ │ cmp r1, #2 │ │ - beq.w 5f904 │ │ + beq.w 5f9e0 │ │ ldr r0, [sp, #68] @ 0x44 │ │ lsls r1, r1, #31 │ │ cmp r0, #13 │ │ - beq.n 5f79c │ │ + beq.n 5f878 │ │ cmp r0, #4 │ │ - bne.n 5f7ac │ │ + bne.n 5f888 │ │ ldr.w r0, [sl] │ │ movw r1, #24942 @ 0x616e │ │ movt r1, #25965 @ 0x656d │ │ cmp r0, r1 │ │ - beq.n 5f856 │ │ + beq.n 5f932 │ │ ldr.w r0, [sl] │ │ movw r1, #31092 @ 0x7974 │ │ movt r1, #25968 @ 0x6570 │ │ cmp r0, r1 │ │ - bne.n 5f7ac │ │ + bne.n 5f888 │ │ ldr r0, [sp, #24] │ │ cmp r0, #3 │ │ - bne.w 5fa8c │ │ + bne.w 5fb68 │ │ mov r0, r9 │ │ - bl 5f174 │ │ + bl 5f264 │ │ cmp r0, #0 │ │ - bne.w 5faaa │ │ + bne.w 5fb86 │ │ add r0, sp, #60 @ 0x3c │ │ mov r1, r9 │ │ - bl 5fd66 │ │ + bl 5fe42 │ │ ldrb.w r0, [sp, #60] @ 0x3c │ │ cmp r0, #1 │ │ - beq.n 5f900 │ │ + beq.n 5f9dc │ │ ldrb.w r0, [sp, #61] @ 0x3d │ │ str r0, [sp, #24] │ │ - b.n 5f7b8 │ │ + b.n 5f894 │ │ cmp.w r4, #2147483648 @ 0x80000000 │ │ - bne.w 5fa6e │ │ + bne.w 5fb4a │ │ mov r0, r9 │ │ - bl 5f174 │ │ + bl 5f264 │ │ cmp r0, #0 │ │ - bne.w 5fa28 │ │ + bne.w 5fb04 │ │ add r0, sp, #60 @ 0x3c │ │ mov r1, r9 │ │ - bl 5d044 │ │ + bl 5d220 │ │ ldrd r4, sl, [sp, #60] @ 0x3c │ │ cmp.w r4, #2147483648 @ 0x80000000 │ │ - beq.w 5fa2a │ │ + beq.w 5fb06 │ │ ldr r0, [sp, #68] @ 0x44 │ │ str.w sl, [sp, #8] │ │ str r0, [sp, #20] │ │ - b.n 5f7b8 │ │ + b.n 5f894 │ │ ldr r0, [sp, #28] │ │ cmp r0, #2 │ │ - bne.w 5fa7c │ │ + bne.w 5fb58 │ │ mov r0, r9 │ │ - bl 5f174 │ │ + bl 5f264 │ │ cmp r0, #0 │ │ - bne.w 5faaa │ │ + bne.w 5fb86 │ │ add r0, sp, #60 @ 0x3c │ │ mov r1, r9 │ │ - bl 5d148 │ │ + bl 5d324 │ │ ldrb.w r0, [sp, #60] @ 0x3c │ │ cmp r0, #1 │ │ - beq.n 5f900 │ │ + beq.n 5f9dc │ │ ldrb.w r0, [sp, #61] @ 0x3d │ │ str r0, [sp, #28] │ │ - b.n 5f7b8 │ │ + b.n 5f894 │ │ ldrb r3, [r6, #24] │ │ subs r3, #1 │ │ strb r3, [r6, #24] │ │ lsls r3, r3, #24 │ │ - beq.w 5fb72 │ │ + beq.w 5fc4e │ │ adds r0, r2, #1 │ │ add r1, sp, #72 @ 0x48 │ │ str r0, [r6, #20] │ │ mov r0, r5 │ │ strb.w r4, [sp, #76] @ 0x4c │ │ str r6, [sp, #72] @ 0x48 │ │ - bl 5c49e │ │ + bl 5c67a │ │ ldrb.w r0, [sp, #60] @ 0x3c │ │ cmp r0, #1 │ │ - bne.n 5f8e0 │ │ + bne.n 5f9bc │ │ ldr.w sl, [sp, #64] @ 0x40 │ │ - b.n 5f8fa │ │ + b.n 5f9d6 │ │ ldrb.w r0, [sp, #61] @ 0x3d │ │ cmp r0, #1 │ │ - bne.n 5f9e0 │ │ + bne.n 5fabc │ │ ldr r1, [sp, #72] @ 0x48 │ │ mov r0, r5 │ │ - bl 5d044 │ │ + bl 5d220 │ │ ldrd r4, sl, [sp, #60] @ 0x3c │ │ cmp.w r4, #2147483648 @ 0x80000000 │ │ - bne.n 5f92c │ │ + bne.n 5fa08 │ │ mov.w r4, #2147483648 @ 0x80000000 │ │ - b.n 5f99a │ │ + b.n 5fa76 │ │ ldr.w sl, [sp, #64] @ 0x40 │ │ ldr r7, [sp, #12] │ │ lsls r0, r4, #1 │ │ - beq.w 5fab8 │ │ - b.n 5fab2 │ │ + beq.w 5fb94 │ │ + b.n 5fb8e │ │ cmp.w r4, #2147483648 @ 0x80000000 │ │ - beq.n 5fa0a │ │ + beq.n 5fae6 │ │ ldr r7, [sp, #12] │ │ ldr r0, [sp, #24] │ │ cmp r0, #3 │ │ - beq.w 5fa32 │ │ + beq.w 5fb0e │ │ ldr r0, [sp, #28] │ │ cmp r0, #2 │ │ - beq.w 5fa42 │ │ + beq.w 5fb1e │ │ ldr.w sl, [sp, #8] │ │ - b.n 5fabc │ │ + b.n 5fb98 │ │ add r1, sp, #72 @ 0x48 │ │ mov r0, r5 │ │ ldr r5, [sp, #68] @ 0x44 │ │ - bl 5c49e │ │ + bl 5c67a │ │ ldrb.w r0, [sp, #60] @ 0x3c │ │ cmp r0, #1 │ │ - beq.n 5f986 │ │ + beq.n 5fa62 │ │ ldrb.w r0, [sp, #61] @ 0x3d │ │ cmp r0, #1 │ │ - bne.n 5f9f4 │ │ + bne.n 5fad0 │ │ add r7, sp, #60 @ 0x3c │ │ ldr r1, [sp, #72] @ 0x48 │ │ str r5, [sp, #20] │ │ mov r0, r7 │ │ - bl 5fd66 │ │ + bl 5fe42 │ │ ldrb.w r0, [sp, #60] @ 0x3c │ │ cmp r0, #1 │ │ - beq.n 5f986 │ │ + beq.n 5fa62 │ │ add r1, sp, #72 @ 0x48 │ │ mov r0, r7 │ │ ldrb.w r5, [sp, #61] @ 0x3d │ │ - bl 5c49e │ │ + bl 5c67a │ │ ldrb.w r0, [sp, #60] @ 0x3c │ │ cmp r0, #1 │ │ - beq.n 5f986 │ │ + beq.n 5fa62 │ │ ldrb.w r0, [sp, #61] @ 0x3d │ │ cmp r0, #1 │ │ - bne.n 5fa02 │ │ + bne.n 5fade │ │ ldr r1, [sp, #72] @ 0x48 │ │ add r0, sp, #60 @ 0x3c │ │ - bl 5d148 │ │ + bl 5d324 │ │ ldrb.w r0, [sp, #60] @ 0x3c │ │ cmp r0, #1 │ │ - bne.n 5f9ee │ │ + bne.n 5faca │ │ ldr.w r9, [sp, #64] @ 0x40 │ │ cmp r4, #0 │ │ itt ne │ │ movne r0, sl │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov.w r4, #2147483648 @ 0x80000000 │ │ mov sl, r9 │ │ ldrb r0, [r6, #24] │ │ adds r0, #1 │ │ strb r0, [r6, #24] │ │ mov r0, r6 │ │ - bl 5cf84 │ │ + bl 5d160 │ │ cmp.w r4, #2147483648 @ 0x80000000 │ │ - beq.w 5fb5e │ │ + beq.w 5fc3a │ │ cmp r0, #0 │ │ - bne.w 5fb46 │ │ + bne.w 5fc22 │ │ ldr r1, [sp, #16] │ │ movw r0, #65535 @ 0xffff │ │ bic.w r0, r1, r0 │ │ uxtb.w r1, fp │ │ movw fp, #19 │ │ add r0, r1 │ │ uxtb r1, r5 │ │ movt fp, #128 @ 0x80 │ │ orr.w r5, r0, r1, lsl #8 │ │ str r5, [sp, #16] │ │ ldr r7, [sp, #48] @ 0x30 │ │ ldr r0, [sp, #40] @ 0x28 │ │ cmp r7, r0 │ │ - bne.w 5f6fe │ │ - b.n 5f6f8 │ │ - ldr r1, [pc, #760] @ (5fcdc ) │ │ + bne.w 5f7da │ │ + b.n 5f7d4 │ │ + ldr r1, [pc, #760] @ (5fdb8 ) │ │ movs r0, #0 │ │ add r1, pc │ │ - bl 5d26c │ │ + bl 5d448 │ │ mov sl, r0 │ │ - b.n 5f8fa │ │ + b.n 5f9d6 │ │ ldrb.w fp, [sp, #61] @ 0x3d │ │ - b.n 5f99a │ │ - ldr r1, [pc, #744] @ (5fce0 ) │ │ + b.n 5fa76 │ │ + ldr r1, [pc, #744] @ (5fdbc ) │ │ movs r0, #1 │ │ add r1, pc │ │ - bl 5d26c │ │ + bl 5d448 │ │ mov r9, r0 │ │ - b.n 5f98a │ │ - ldr r1, [pc, #736] @ (5fce4 ) │ │ + b.n 5fa66 │ │ + ldr r1, [pc, #736] @ (5fdc0 ) │ │ movs r0, #2 │ │ add r1, pc │ │ - b.n 5f9fa │ │ - ldr r1, [pc, #792] @ (5fd24 ) │ │ + b.n 5fad6 │ │ + ldr r1, [pc, #792] @ (5fe00 ) │ │ movs r3, #4 │ │ - ldr r0, [pc, #792] @ (5fd28 ) │ │ + ldr r0, [pc, #792] @ (5fe04 ) │ │ add r1, pc │ │ - ldr r2, [pc, #792] @ (5fd2c ) │ │ + ldr r2, [pc, #792] @ (5fe08 ) │ │ str r1, [sp, #64] @ 0x40 │ │ add r1, sp, #72 @ 0x48 │ │ add r0, pc │ │ str r1, [sp, #60] @ 0x3c │ │ mov r1, r5 │ │ add r2, pc │ │ strd r2, r3, [sp, #72] @ 0x48 │ │ - bl 754ec │ │ + bl 5f210 │ │ mov sl, r0 │ │ ldr r7, [sp, #12] │ │ mov.w r4, #2147483648 @ 0x80000000 │ │ - b.n 5fabc │ │ - ldr r1, [pc, #728] @ (5fd0c ) │ │ + b.n 5fb98 │ │ + ldr r1, [pc, #728] @ (5fde8 ) │ │ movs r3, #4 │ │ - ldr r0, [pc, #728] @ (5fd10 ) │ │ - ldr r2, [pc, #728] @ (5fd14 ) │ │ + ldr r0, [pc, #728] @ (5fdec ) │ │ + ldr r2, [pc, #728] @ (5fdf0 ) │ │ add r1, pc │ │ add r0, pc │ │ add r2, pc │ │ - b.n 5fa50 │ │ - ldr r1, [pc, #724] @ (5fd18 ) │ │ + b.n 5fb2c │ │ + ldr r1, [pc, #724] @ (5fdf4 ) │ │ movs r3, #13 │ │ - ldr r0, [pc, #724] @ (5fd1c ) │ │ - ldr r2, [pc, #724] @ (5fd20 ) │ │ + ldr r0, [pc, #724] @ (5fdf8 ) │ │ + ldr r2, [pc, #724] @ (5fdfc ) │ │ add r1, pc │ │ add r0, pc │ │ add r2, pc │ │ str r1, [sp, #64] @ 0x40 │ │ add r1, sp, #72 @ 0x48 │ │ str r1, [sp, #60] @ 0x3c │ │ mov r1, r5 │ │ str r3, [sp, #76] @ 0x4c │ │ str r2, [sp, #72] @ 0x48 │ │ - bl 754ec │ │ + bl 5f210 │ │ mov sl, r0 │ │ ldr r0, [sp, #8] │ │ cmp r4, #0 │ │ it ne │ │ - blxne d87c0 │ │ - b.n 5fab8 │ │ - ldr r1, [pc, #644] @ (5fcf4 ) │ │ - ldr r0, [pc, #644] @ (5fcf8 ) │ │ - ldr r2, [pc, #648] @ (5fcfc ) │ │ + blxne d87d0 │ │ + b.n 5fb94 │ │ + ldr r1, [pc, #644] @ (5fdd0 ) │ │ + ldr r0, [pc, #644] @ (5fdd4 ) │ │ + ldr r2, [pc, #648] @ (5fdd8 ) │ │ add r1, pc │ │ add r0, pc │ │ add r2, pc │ │ - b.n 5fa98 │ │ - ldr r1, [pc, #640] @ (5fd00 ) │ │ + b.n 5fb74 │ │ + ldr r1, [pc, #640] @ (5fddc ) │ │ movs r3, #13 │ │ - ldr r0, [pc, #640] @ (5fd04 ) │ │ - ldr r2, [pc, #644] @ (5fd08 ) │ │ + ldr r0, [pc, #640] @ (5fde0 ) │ │ + ldr r2, [pc, #644] @ (5fde4 ) │ │ add r1, pc │ │ add r0, pc │ │ add r2, pc │ │ - b.n 5fa9a │ │ - ldr r1, [pc, #600] @ (5fce8 ) │ │ - ldr r0, [pc, #604] @ (5fcec ) │ │ - ldr r2, [pc, #604] @ (5fcf0 ) │ │ + b.n 5fb76 │ │ + ldr r1, [pc, #600] @ (5fdc4 ) │ │ + ldr r0, [pc, #604] @ (5fdc8 ) │ │ + ldr r2, [pc, #604] @ (5fdcc ) │ │ add r1, pc │ │ add r0, pc │ │ add r2, pc │ │ movs r3, #4 │ │ str r1, [sp, #64] @ 0x40 │ │ add r1, sp, #72 @ 0x48 │ │ str r1, [sp, #60] @ 0x3c │ │ add r1, sp, #60 @ 0x3c │ │ str r3, [sp, #76] @ 0x4c │ │ str r2, [sp, #72] @ 0x48 │ │ - bl 754ec │ │ + bl 5f210 │ │ mov sl, r0 │ │ ldr r7, [sp, #12] │ │ lsls r0, r4, #1 │ │ - beq.n 5fab8 │ │ + beq.n 5fb94 │ │ ldr r0, [sp, #8] │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov.w r4, #2147483648 @ 0x80000000 │ │ ldrb r0, [r6, #24] │ │ adds r0, #1 │ │ strb r0, [r6, #24] │ │ mov r0, r6 │ │ - bl 5f20c │ │ + bl 5f2fc │ │ cmp.w r4, #2147483648 @ 0x80000000 │ │ - beq.n 5fb4e │ │ - cbnz r0, 5fb46 │ │ + beq.n 5fc2a │ │ + cbnz r0, 5fc22 │ │ movs r0, #1 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r4, r0 │ │ - beq.n 5fb0a │ │ + beq.n 5fbe6 │ │ movw r0, #65535 @ 0xffff │ │ ldr r1, [sp, #28] │ │ bic.w r0, r7, r0 │ │ orrs r0, r1 │ │ ldr r1, [sp, #24] │ │ orr.w r5, r0, r1, lsl #8 │ │ str r5, [sp, #12] │ │ ldr r7, [sp, #48] @ 0x30 │ │ ldr r0, [sp, #40] @ 0x28 │ │ cmp r7, r0 │ │ - bne.w 5f6fe │ │ - b.n 5f6f8 │ │ + bne.w 5f7da │ │ + b.n 5f7d4 │ │ ldr r6, [sp, #64] @ 0x40 │ │ ldrd r4, r5, [sp, #44] @ 0x2c │ │ cmp r5, #0 │ │ - bne.n 5fbbc │ │ - b.n 5fbd2 │ │ + bne.n 5fc98 │ │ + b.n 5fcae │ │ ldr r5, [sp, #40] @ 0x28 │ │ - b.n 5fbe0 │ │ + b.n 5fcbc │ │ mov r6, sl │ │ ldrd r4, r5, [sp, #44] @ 0x2c │ │ cmp r5, #0 │ │ - bne.n 5fbbc │ │ - b.n 5fbd2 │ │ + bne.n 5fc98 │ │ + b.n 5fcae │ │ nop │ │ - ldr r0, [r6, #76] @ 0x4c │ │ + ldr r4, [r2, #64] @ 0x40 │ │ vcvt.f32.s32 d20, d10 │ │ movs r3, #5 │ │ adds r2, #1 │ │ str r3, [sp, #60] @ 0x3c │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #60 @ 0x3c │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ mov r6, r0 │ │ ldrd r4, r5, [sp, #44] @ 0x2c │ │ - cbnz r5, 5fbbc │ │ - b.n 5fbd2 │ │ + cbnz r5, 5fc98 │ │ + b.n 5fcae │ │ mov r1, sl │ │ mov sl, r0 │ │ - cbnz r4, 5fba6 │ │ - b.n 5fbac │ │ - cbz r0, 5fbac │ │ + cbnz r4, 5fc82 │ │ + b.n 5fc88 │ │ + cbz r0, 5fc88 │ │ ldr r1, [r0, #0] │ │ cmp r1, #1 │ │ - beq.n 5fb76 │ │ - cbnz r1, 5fba4 │ │ + beq.n 5fc52 │ │ + cbnz r1, 5fc80 │ │ ldr r1, [r0, #8] │ │ - cbnz r1, 5fb6c │ │ - b.n 5fba4 │ │ - cbz r0, 5fbac │ │ + cbnz r1, 5fc48 │ │ + b.n 5fc80 │ │ + cbz r0, 5fc88 │ │ ldr r1, [r0, #0] │ │ cmp r1, #1 │ │ - beq.n 5fb76 │ │ - cbnz r1, 5fba4 │ │ + beq.n 5fc52 │ │ + cbnz r1, 5fc80 │ │ ldr r1, [r0, #8] │ │ - cbz r1, 5fba4 │ │ + cbz r1, 5fc80 │ │ mov r7, r0 │ │ ldr r4, [r0, #4] │ │ - b.n 5fb9a │ │ + b.n 5fc76 │ │ movs r3, #24 │ │ - b.n 5fb20 │ │ + b.n 5fbfc │ │ ldrb r1, [r0, #4] │ │ cmp r1, #3 │ │ - bne.n 5fba4 │ │ + bne.n 5fc80 │ │ ldr r4, [r0, #8] │ │ mov r7, r0 │ │ ldrd r9, r5, [r4] │ │ ldr r1, [r5, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r9 │ │ blxne r1 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r9 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r1, r7 │ │ - b.n 5fba6 │ │ + b.n 5fc82 │ │ mov r1, r0 │ │ mov r0, r1 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, sl │ │ mov r1, r6 │ │ - bl 5c46a │ │ + bl 22434 │ │ mov r6, r0 │ │ ldrd r4, r5, [sp, #44] @ 0x2c │ │ - cbz r5, 5fbd2 │ │ + cbz r5, 5fcae │ │ adds r7, r4, #4 │ │ ldr.w r0, [r7, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r7, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r7, #16 │ │ subs r5, #1 │ │ - bne.n 5fbbe │ │ + bne.n 5fc9a │ │ ldr r0, [sp, #40] @ 0x28 │ │ - cbz r0, 5fbdc │ │ + cbz r0, 5fcb8 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov.w r5, #2147483648 @ 0x80000000 │ │ ldr r0, [sp, #4] │ │ ldrb r1, [r0, #24] │ │ adds r1, #1 │ │ strb r1, [r0, #24] │ │ - bl 5cf84 │ │ + bl 5d160 │ │ mov r4, r0 │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ - beq.n 5fc46 │ │ + beq.n 5fd22 │ │ cmp r4, #0 │ │ itttt eq │ │ ldreq r0, [sp, #0] │ │ stmiaeq.w r0, {r5, r6, r8} │ │ addeq sp, #84 @ 0x54 │ │ ldmiaeq.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ cmp.w r8, #0 │ │ - beq.n 5fc22 │ │ + beq.n 5fcfe │ │ adds r7, r6, #4 │ │ ldr.w r0, [r7, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r7, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r7, #16 │ │ subs.w r8, r8, #1 │ │ - bne.n 5fc0c │ │ + bne.n 5fce8 │ │ cmp r5, #0 │ │ mov r0, r6 │ │ ldrd r7, r5, [sp] │ │ it ne │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ mov r1, r5 │ │ - bl 5c46a │ │ + bl 22434 │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ strd r1, r0, [r7] │ │ add sp, #84 @ 0x54 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - cbnz r4, 5fc50 │ │ + cbnz r4, 5fd2c │ │ mov r4, r6 │ │ ldrd r7, r5, [sp] │ │ - b.n 5fc30 │ │ + b.n 5fd0c │ │ ldr r0, [r4, #0] │ │ ldrd r7, r5, [sp] │ │ cmp r0, #1 │ │ - beq.n 5fc66 │ │ - cbnz r0, 5fc94 │ │ + beq.n 5fd42 │ │ + cbnz r0, 5fd70 │ │ ldr r0, [r4, #8] │ │ - cbz r0, 5fc94 │ │ + cbz r0, 5fd70 │ │ ldr.w r9, [r4, #4] │ │ - b.n 5fc8e │ │ + b.n 5fd6a │ │ ldrb r0, [r4, #4] │ │ cmp r0, #3 │ │ - bne.n 5fc94 │ │ + bne.n 5fd70 │ │ ldr.w r9, [r4, #8] │ │ ldrd r8, r7, [r9] │ │ ldr r1, [r7, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r8 │ │ blxne r1 │ │ ldr r0, [r7, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r7, r5, [sp] │ │ mov r0, r9 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ mov r4, r6 │ │ - blx d87c0 │ │ - b.n 5fc30 │ │ - ldr r2, [pc, #56] @ (5fcd8 ) │ │ + blx d87d0 │ │ + b.n 5fd0c │ │ + ldr r2, [pc, #56] @ (5fdb4 ) │ │ add.w r1, sp, #83 @ 0x53 │ │ mov r0, r6 │ │ add r2, pc │ │ - bl 5c22c │ │ - b.n 5fbae │ │ - ldr r2, [pc, #36] @ (5fcd4 ) │ │ + bl 5c43c │ │ + b.n 5fc8a │ │ + ldr r2, [pc, #36] @ (5fdb0 ) │ │ add.w r1, sp, #83 @ 0x53 │ │ mov r0, r5 │ │ add r2, pc │ │ - bl 5c22c │ │ + bl 5c43c │ │ mov r1, r5 │ │ - bl 5c46a │ │ + bl 22434 │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ strd r1, r0, [r4] │ │ add sp, #84 @ 0x54 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r3, #24 │ │ - b.n 5f69a │ │ - add r6, sp, #856 @ 0x358 │ │ + b.n 5f776 │ │ + add r6, sp, #104 @ 0x68 │ │ movs r7, r0 │ │ - add r7, sp, #664 @ 0x298 │ │ + add r6, sp, #808 @ 0x328 │ │ movs r7, r0 │ │ - add r7, sp, #0 │ │ + add r6, sp, #208 @ 0xd0 │ │ movs r7, r0 │ │ - add r6, sp, #944 @ 0x3b0 │ │ + add r6, sp, #128 @ 0x80 │ │ movs r7, r0 │ │ - add r6, sp, #888 @ 0x378 │ │ + add r6, sp, #72 @ 0x48 │ │ movs r7, r0 │ │ - bl fff33cea │ │ - str r4, [sp, #100] @ 0x64 │ │ - vqshl.u64 q11, q1, #58 @ 0x3a │ │ - vqshlu.s64 , , #59 @ 0x3b │ │ - vsri.32 d25, d23, #1 │ │ - vrintp.f32 q11, q12 │ │ - vcvt.f32.u32 , │ │ - vraddhn.i d25, , │ │ - vtbl.8 d22, {d10-d12}, d10 │ │ - vcvt.s32.f32 d31, d27 │ │ - @ instruction: 0xffff8ea3 │ │ - vtbl.8 d22, {d10}, d26 │ │ - vqshl.u32 d31, d11, #27 │ │ - @ instruction: 0xffff8e93 │ │ - vtbx.8 d22, {d10-d12}, d4 │ │ - vqshl.u32 , , #27 │ │ - vqrdmlah.s q12, , d7[0] │ │ - vtbx.8 d22, {d10}, d2 │ │ + bl ffef3dc6 │ │ + str r2, [sp, #556] @ 0x22c │ │ + vqshlu.s64 q11, q11, #58 @ 0x3a │ │ + vqshlu.s64 d31, d17, #59 @ 0x3b │ │ + vsubl.u , d31, d25 │ │ + vrint?.f32 d22, d12 │ │ + vcvt.f32.u32 d31, d17 │ │ + vrshr.u64 d25, d9, #1 │ │ + vtbl.8 d22, {d10-d11}, d30 │ │ + vcvt.f32.u32 , │ │ + vqrdmulh.s q12, , d11[0] │ │ + vrint?.f32 q11, q7 │ │ + vqshlu.s64 , , #59 @ 0x3b │ │ + @ instruction: 0xffff8dbb │ │ + vtbx.8 d22, {d10-d11}, d24 │ │ + vqshl.u32 d31, d5, #27 │ │ + vqrdmulh.s q12, , d31[0] │ │ + vrint?.f32 q11, q11 │ │ vsli.64 , q8, #59 @ 0x3b │ │ sub sp, #4 │ │ ldrd r4, r6, [r0, #4] │ │ mov r5, r0 │ │ - cbz r6, 5fd52 │ │ + cbz r6, 5fe2e │ │ adds r7, r4, #4 │ │ ldr.w r0, [r7, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r7, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r7, #16 │ │ subs r6, #1 │ │ - bne.n 5fd3e │ │ + bne.n 5fe1a │ │ ldr r0, [r5, #0] │ │ - cbz r0, 5fd62 │ │ + cbz r0, 5fe3e │ │ mov r0, r4 │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #4 │ │ pop {r4, r5, r6, r7, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ sub sp, #12 │ │ mov r5, r1 │ │ mov r8, r0 │ │ ldrd r0, r1, [r1, #12] │ │ ldr r2, [r5, #20] │ │ cmp r2, r1 │ │ - bcs.n 5fda2 │ │ + bcs.n 5fe7e │ │ movw r9, #19 │ │ movs r3, #1 │ │ movt r9, #128 @ 0x80 │ │ ldrb r7, [r0, r2] │ │ sub.w r4, r7, #9 │ │ cmp r4, #25 │ │ - bhi.n 5fdd6 │ │ + bhi.n 5feb2 │ │ lsl.w r6, r3, r4 │ │ tst.w r6, r9 │ │ - beq.n 5fdb0 │ │ + beq.n 5fe8c │ │ adds r2, #1 │ │ str r2, [r5, #20] │ │ cmp r1, r2 │ │ - bne.n 5fd84 │ │ + bne.n 5fe60 │ │ mov r2, r1 │ │ movs r3, #5 │ │ adds r2, #1 │ │ str r3, [sp, #0] │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - b.n 5feac │ │ + b.n 5ff88 │ │ cmp r4, #25 │ │ - bne.n 5fdd6 │ │ + bne.n 5feb2 │ │ mov r0, sp │ │ mov r1, r5 │ │ - bl 5fed8 │ │ + bl 5ffb4 │ │ ldrb.w r0, [sp] │ │ cmp r0, #1 │ │ - bne.n 5fdfc │ │ + bne.n 5fed8 │ │ ldr r0, [sp, #4] │ │ str.w r0, [r8, #4] │ │ movs r0, #1 │ │ strb.w r0, [r8] │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ cmp r7, #123 @ 0x7b │ │ - bne.n 5fece │ │ + bne.n 5ffaa │ │ ldrb r3, [r5, #24] │ │ subs r3, #1 │ │ strb r3, [r5, #24] │ │ lsls r3, r3, #24 │ │ - beq.n 5fed2 │ │ + beq.n 5ffae │ │ adds r0, r2, #1 │ │ str r0, [r5, #20] │ │ mov r0, sp │ │ mov r1, r5 │ │ - bl 5fed8 │ │ + bl 5ffb4 │ │ ldrb.w r0, [sp] │ │ cmp r0, #1 │ │ - bne.n 5fe1a │ │ + bne.n 5fef6 │ │ ldr r0, [sp, #4] │ │ - b.n 5fe34 │ │ + b.n 5ff10 │ │ ldrb.w r0, [sp, #1] │ │ - cbz r0, 5fe4a │ │ + cbz r0, 5ff26 │ │ cmp r0, #1 │ │ ite eq │ │ moveq r0, #1 │ │ movne r0, #2 │ │ strb.w r0, [r8, #1] │ │ movs r0, #0 │ │ strb.w r0, [r8] │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ mov r0, r5 │ │ ldrb.w r7, [sp, #1] │ │ - bl 5f174 │ │ - cbnz r0, 5fe34 │ │ + bl 5f264 │ │ + cbnz r0, 5ff10 │ │ mov r0, r5 │ │ - bl 60040 │ │ + bl 6011c │ │ cmp r7, #2 │ │ it ne │ │ cmpne r7, #1 │ │ - cbz r0, 5fe5a │ │ + cbz r0, 5ff36 │ │ movs r1, #1 │ │ str.w r0, [r8, #4] │ │ strb.w r1, [r8] │ │ ldrb r1, [r5, #24] │ │ adds r0, r1, #1 │ │ strb r0, [r5, #24] │ │ add sp, #12 │ │ @@ -84175,484 +84134,493 @@ │ │ add.w r2, r5, #12 │ │ ldrb r3, [r5, #24] │ │ strb.w r7, [r8, #1] │ │ ldmia r2, {r0, r1, r2} │ │ adds r3, #1 │ │ cmp r2, r1 │ │ strb r3, [r5, #24] │ │ - bcs.n 5fe8e │ │ + bcs.n 5ff6a │ │ movs r3, #1 │ │ ldrb r7, [r0, r2] │ │ sub.w r4, r7, #9 │ │ cmp r4, #23 │ │ - bhi.n 5fe92 │ │ + bhi.n 5ff6e │ │ lsl.w r6, r3, r4 │ │ tst.w r6, r9 │ │ - beq.n 5fe92 │ │ + beq.n 5ff6e │ │ adds r2, #1 │ │ str r2, [r5, #20] │ │ cmp r1, r2 │ │ - bne.n 5fe70 │ │ + bne.n 5ff4c │ │ mov r2, r1 │ │ movs r3, #3 │ │ - b.n 5feaa │ │ + b.n 5ff86 │ │ cmp r7, #125 @ 0x7d │ │ itttt eq │ │ moveq r0, #0 │ │ strbeq.w r0, [r8] │ │ addeq r0, r2, #1 │ │ streq r0, [r5, #20] │ │ itt eq │ │ addeq sp, #12 │ │ ldmiaeq.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ movs r3, #10 │ │ str r3, [sp, #0] │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ mov r1, r2 │ │ mov r0, sp │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ movs r1, #1 │ │ str.w r0, [r8, #4] │ │ strb.w r1, [r8] │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ movs r3, #10 │ │ - b.n 5fda4 │ │ + b.n 5fe80 │ │ movs r3, #24 │ │ - b.n 5fda4 │ │ - bmi.n 5fe82 │ │ + b.n 5fe80 │ │ + bmi.n 5ff5e │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ sub sp, #12 │ │ mov r2, r1 │ │ mov r8, r0 │ │ ldr.w r0, [r2, #12]! │ │ mov r9, r1 │ │ ldrd r1, r3, [r2, #4] │ │ cmp r3, r1 │ │ - bcs.n 5ff14 │ │ + bcs.n 5fff0 │ │ movs r6, #19 │ │ movs r7, #1 │ │ movt r6, #128 @ 0x80 │ │ ldrb r4, [r0, r3] │ │ subs r4, #9 │ │ cmp r4, #25 │ │ - bhi.n 5fff6 │ │ + bhi.n 600d2 │ │ lsl.w r5, r7, r4 │ │ tst r5, r6 │ │ - beq.n 5ff42 │ │ + beq.n 6001e │ │ adds r3, #1 │ │ str.w r3, [r9, #20] │ │ cmp r1, r3 │ │ - bne.n 5fef8 │ │ + bne.n 5ffd4 │ │ mov r3, r1 │ │ movs r2, #5 │ │ str r2, [sp, #0] │ │ adds r2, r3, #1 │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ mov r1, r2 │ │ mov r0, sp │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ movs r1, #1 │ │ str.w r0, [r8, #4] │ │ strb.w r1, [r8] │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ cmp r4, #25 │ │ - bne.n 5fff6 │ │ + bne.n 600d2 │ │ movs r0, #0 │ │ mov r1, r2 │ │ str.w r0, [r9, #8] │ │ adds r0, r3, #1 │ │ str.w r0, [r9, #20] │ │ mov r0, sp │ │ mov r2, r9 │ │ - bl 767d4 │ │ + bl 7683c │ │ ldrd r0, r6, [sp] │ │ cmp r0, #2 │ │ - bne.n 5ff74 │ │ + bne.n 60050 │ │ movs r0, #1 │ │ str.w r6, [r8, #4] │ │ strb.w r0, [r8] │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ ldr r7, [sp, #8] │ │ lsls r0, r0, #31 │ │ - beq.n 5ff92 │ │ + beq.n 6006e │ │ cmp r7, #4 │ │ - beq.n 5ffac │ │ + beq.n 60088 │ │ cmp r7, #5 │ │ - bne.n 5ffbe │ │ - ldr r1, [pc, #172] @ (60030 ) │ │ + bne.n 6009a │ │ + ldr r1, [pc, #172] @ (6010c ) │ │ mov r0, r6 │ │ movs r2, #5 │ │ add r1, pc │ │ - blx d8860 │ │ - cbz r0, 5ffa8 │ │ - b.n 60004 │ │ + blx d8870 │ │ + cbz r0, 60084 │ │ + b.n 600e0 │ │ cmp r7, #4 │ │ - beq.n 5ffac │ │ + beq.n 60088 │ │ cmp r7, #5 │ │ - bne.n 5ffd2 │ │ - ldr r1, [pc, #160] @ (6003c ) │ │ + bne.n 600ae │ │ + ldr r1, [pc, #160] @ (60118 ) │ │ mov r0, r6 │ │ movs r2, #5 │ │ add r1, pc │ │ - blx d8860 │ │ - cbnz r0, 60004 │ │ + blx d8870 │ │ + cbnz r0, 600e0 │ │ movs r0, #0 │ │ - b.n 5ffe6 │ │ + b.n 600c2 │ │ ldr r0, [r6, #0] │ │ movw r1, #24904 @ 0x6148 │ │ movt r1, #26739 @ 0x6873 │ │ cmp r0, r1 │ │ - bne.n 60004 │ │ + bne.n 600e0 │ │ movs r0, #1 │ │ - b.n 5ffe6 │ │ + b.n 600c2 │ │ cmp r7, #12 │ │ - bne.n 60004 │ │ - ldr r1, [pc, #104] @ (6002c ) │ │ + bne.n 600e0 │ │ + ldr r1, [pc, #104] @ (60108 ) │ │ mov r0, r6 │ │ movs r2, #12 │ │ add r1, pc │ │ - blx d8860 │ │ - cbz r0, 5ffe4 │ │ - b.n 60004 │ │ + blx d8870 │ │ + cbz r0, 600c0 │ │ + b.n 600e0 │ │ cmp r7, #12 │ │ - bne.n 60004 │ │ - ldr r1, [pc, #96] @ (60038 ) │ │ + bne.n 600e0 │ │ + ldr r1, [pc, #96] @ (60114 ) │ │ mov r0, r6 │ │ movs r2, #12 │ │ add r1, pc │ │ - blx d8860 │ │ - cbnz r0, 60004 │ │ + blx d8870 │ │ + cbnz r0, 600e0 │ │ movs r0, #2 │ │ strb.w r0, [r8, #1] │ │ movs r0, #0 │ │ strb.w r0, [r8] │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ - ldr r2, [pc, #48] @ (60028 ) │ │ + ldr r2, [pc, #48] @ (60104 ) │ │ mov r1, sp │ │ mov r0, r9 │ │ add r2, pc │ │ - bl 5c22c │ │ - b.n 60012 │ │ - ldr r2, [pc, #44] @ (60034 ) │ │ + bl 5c43c │ │ + b.n 600ee │ │ + ldr r2, [pc, #44] @ (60110 ) │ │ mov r0, r6 │ │ mov r1, r7 │ │ movs r3, #3 │ │ add r2, pc │ │ - bl 60118 │ │ + bl 601f4 │ │ mov r1, r9 │ │ - bl 5c46a │ │ + bl 22434 │ │ str.w r0, [r8, #4] │ │ movs r0, #1 │ │ strb.w r0, [r8] │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ - add r3, sp, #896 @ 0x380 │ │ + add r3, sp, #16 │ │ movs r7, r0 │ │ - str r4, [r4, #72] @ 0x48 │ │ - vsri.64 q11, , #5 │ │ - vtbx.8 d26, {d27}, d0 │ │ + str r0, [r1, #60] @ 0x3c │ │ + vrecpe.u32 d22, d3 │ │ + vqshl.u64 q13, q10, #59 @ 0x3b │ │ movs r7, r0 │ │ - str r0, [r2, #72] @ 0x48 │ │ - vrsqrte.u32 q11, │ │ + str r4, [r6, #56] @ 0x38 │ │ + vcvtm.u32.f32 q11, │ │ vsli.64 d27, d16, #59 @ 0x3b │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [r0, #12] │ │ ldrd r1, r3, [r4, #16] │ │ cmp r3, r1 │ │ - bcs.n 6007a │ │ + bcs.n 60156 │ │ movw lr, #19 │ │ mov.w ip, #1 │ │ movt lr, #128 @ 0x80 │ │ ldrb r2, [r0, r3] │ │ sub.w r5, r2, #9 │ │ cmp r5, #23 │ │ - bhi.n 60088 │ │ + bhi.n 60164 │ │ lsl.w r5, ip, r5 │ │ tst.w r5, lr │ │ - beq.n 60088 │ │ + beq.n 60164 │ │ adds r3, #1 │ │ str r3, [r4, #20] │ │ cmp r1, r3 │ │ - bne.n 6005c │ │ + bne.n 60138 │ │ mov r3, r1 │ │ movs r2, #5 │ │ str r2, [sp, #4] │ │ adds r2, r3, #1 │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - b.n 600ca │ │ + b.n 601a6 │ │ cmp r2, #110 @ 0x6e │ │ - bne.n 600ea │ │ + bne.n 601c6 │ │ adds r2, r3, #1 │ │ mov ip, r1 │ │ str r2, [r4, #20] │ │ cmp r2, r1 │ │ it hi │ │ movhi ip, r2 │ │ - bcs.n 600e0 │ │ + bcs.n 601bc │ │ ldrb r5, [r0, r2] │ │ adds r2, r3, #2 │ │ str r2, [r4, #20] │ │ cmp r5, #117 @ 0x75 │ │ - bne.n 600c6 │ │ + bne.n 601a2 │ │ cmp r2, ip │ │ - beq.n 600e2 │ │ + beq.n 601be │ │ ldrb r5, [r0, r2] │ │ adds r2, r3, #3 │ │ str r2, [r4, #20] │ │ cmp r5, #108 @ 0x6c │ │ - bne.n 600c6 │ │ + bne.n 601a2 │ │ cmp r2, ip │ │ - beq.n 600e2 │ │ + beq.n 601be │ │ ldrb r5, [r0, r2] │ │ adds r2, r3, #4 │ │ str r2, [r4, #20] │ │ cmp r5, #108 @ 0x6c │ │ ittt eq │ │ moveq r0, #0 │ │ addeq sp, #16 │ │ popeq {r4, r5, r7, pc} │ │ movs r3, #9 │ │ str r3, [sp, #4] │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #4 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ add sp, #16 │ │ pop {r4, r5, r7, pc} │ │ mov ip, r2 │ │ movs r2, #5 │ │ str r2, [sp, #4] │ │ mov r2, ip │ │ - b.n 600ca │ │ - ldr r2, [pc, #20] @ (60100 ) │ │ + b.n 601a6 │ │ + ldr r2, [pc, #20] @ (601dc ) │ │ add r1, sp, #4 │ │ mov r0, r4 │ │ add r2, pc │ │ - bl 5c22c │ │ + bl 5c43c │ │ mov r1, r4 │ │ - bl 5c46a │ │ + bl 22434 │ │ add sp, #16 │ │ pop {r4, r5, r7, pc} │ │ - add r3, sp, #112 @ 0x70 │ │ + add r2, sp, #320 @ 0x140 │ │ movs r7, r0 │ │ ldrd r0, r2, [r1] │ │ - ldr r1, [pc, #8] @ (60114 ) │ │ + ldr r1, [pc, #8] @ (601f0 ) │ │ ldr r3, [r2, #12] │ │ movs r2, #4 │ │ add r1, pc │ │ bx r3 │ │ nop │ │ - str r6, [r5, #12] │ │ + str r2, [r2, #0] │ │ vsli.32 , q8, #27 │ │ sub sp, #32 │ │ - ldr r5, [pc, #36] @ (60144 ) │ │ - ldr r4, [pc, #40] @ (60148 ) │ │ - ldr r6, [pc, #40] @ (6014c ) │ │ + ldr r5, [pc, #36] @ (60220 ) │ │ + ldr r4, [pc, #40] @ (60224 ) │ │ + ldr r6, [pc, #40] @ (60228 ) │ │ add r5, pc │ │ stmia.w sp, {r0, r1, r2, r3} │ │ add r0, sp, #8 │ │ add r4, pc │ │ strd r5, r0, [sp, #20] │ │ mov r0, sp │ │ add r1, sp, #16 │ │ str r0, [sp, #16] │ │ mov r0, r4 │ │ add r6, pc │ │ str r6, [sp, #28] │ │ - bl 754ec │ │ + bl 5f210 │ │ add sp, #32 │ │ pop {r4, r5, r6, pc} │ │ - bl a4146 │ │ - str r7, [sp, #616] @ 0x268 │ │ - @ instruction: 0xfffa4df1 │ │ + bl 64222 │ │ + str r7, [sp, #644] @ 0x284 │ │ + vqrdmulh.s q10, q13, d9[0] │ │ movs r1, r0 │ │ ldrd r0, r2, [r1] │ │ - ldr r1, [pc, #8] @ (60160 ) │ │ + ldr r1, [pc, #8] @ (6023c ) │ │ ldr r3, [r2, #12] │ │ movs r2, #26 │ │ add r1, pc │ │ bx r3 │ │ nop │ │ - str r6, [r3, #48] @ 0x30 │ │ + str r2, [r0, #36] @ 0x24 │ │ @ instruction: 0xfffbe9d1 │ │ lsls r0, r0, #8 │ │ - ldr r1, [pc, #8] @ (60174 ) │ │ + ldr r1, [pc, #8] @ (60250 ) │ │ ldr r3, [r2, #12] │ │ movs r2, #18 │ │ add r1, pc │ │ bx r3 │ │ nop │ │ - str r6, [r5, #40] @ 0x28 │ │ + str r2, [r2, #28] │ │ + @ instruction: 0xfffbe9d1 │ │ + lsls r0, r0, #8 │ │ + ldr r1, [pc, #8] @ (60264 ) │ │ + ldr r3, [r2, #12] │ │ + movs r2, #10 │ │ + add r1, pc │ │ + bx r3 │ │ + nop │ │ + str r6, [r5, #4] │ │ vtbl.8 d30, {d11-d12}, d29 │ │ rors r0, r6 │ │ sub sp, #16 │ │ mov r3, r1 │ │ ldrd r1, r4, [r1, #16] │ │ mov r8, r0 │ │ cmp r4, r1 │ │ - bcs.n 6020e │ │ + bcs.n 602fe │ │ ldr r0, [r3, #12] │ │ movs r5, #19 │ │ movs r2, #1 │ │ movt r5, #128 @ 0x80 │ │ ldrb r6, [r0, r4] │ │ sub.w r7, r6, #9 │ │ cmp r7, #23 │ │ - bhi.n 601b0 │ │ + bhi.n 602a0 │ │ lsl.w r7, r2, r7 │ │ tst r7, r5 │ │ - beq.n 601b0 │ │ + beq.n 602a0 │ │ adds r4, #1 │ │ str r4, [r3, #20] │ │ cmp r1, r4 │ │ - bne.n 60194 │ │ - b.n 6020e │ │ + bne.n 60284 │ │ + b.n 602fe │ │ cmp r6, #110 @ 0x6e │ │ - bne.n 6020e │ │ + bne.n 602fe │ │ adds r2, r4, #1 │ │ mov ip, r1 │ │ str r2, [r3, #20] │ │ cmp r2, r1 │ │ it hi │ │ movhi ip, r2 │ │ - bcs.n 6023e │ │ + bcs.n 6032e │ │ ldrb r7, [r0, r2] │ │ adds r2, r4, #2 │ │ str r2, [r3, #20] │ │ cmp r7, #117 @ 0x75 │ │ - bne.n 601f6 │ │ + bne.n 602e6 │ │ cmp r2, ip │ │ - beq.n 60240 │ │ + beq.n 60330 │ │ ldrb r7, [r0, r2] │ │ adds r2, r4, #3 │ │ str r2, [r3, #20] │ │ cmp r7, #108 @ 0x6c │ │ - bne.n 601f6 │ │ + bne.n 602e6 │ │ cmp r2, ip │ │ - beq.n 60240 │ │ + beq.n 60330 │ │ ldrb r7, [r0, r2] │ │ adds r2, r4, #4 │ │ str r2, [r3, #20] │ │ cmp r7, #108 @ 0x6c │ │ itttt eq │ │ moveq.w r0, #2147483648 @ 0x80000000 │ │ streq.w r0, [r8] │ │ addeq sp, #16 │ │ ldmiaeq.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movs r3, #9 │ │ str r3, [sp, #0] │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ mov r1, r2 │ │ mov r0, sp │ │ mov r2, r3 │ │ - bl 75c44 │ │ - b.n 60220 │ │ + bl 75cac │ │ + b.n 60310 │ │ mov r0, sp │ │ mov r1, r3 │ │ - bl 5d044 │ │ + bl 5d220 │ │ ldr r0, [sp, #0] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.n 60230 │ │ + bne.n 60320 │ │ ldr r0, [sp, #4] │ │ movs r1, #1 │ │ movt r1, #32768 @ 0x8000 │ │ strd r1, r0, [r8] │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ ldmia.w sp, {r0, r1, r2} │ │ stmia.w r8, {r0, r1, r2} │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ mov ip, r2 │ │ movs r2, #5 │ │ str r2, [sp, #0] │ │ mov r2, ip │ │ - b.n 601fa │ │ + b.n 602ea │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ sub sp, #12 │ │ mov r5, r1 │ │ mov r8, r0 │ │ ldrd r0, r1, [r1, #12] │ │ ldr r2, [r5, #20] │ │ cmp r2, r1 │ │ - bcs.n 60284 │ │ + bcs.n 60374 │ │ movw r9, #19 │ │ movs r3, #1 │ │ movt r9, #128 @ 0x80 │ │ ldrb r7, [r0, r2] │ │ sub.w r4, r7, #9 │ │ cmp r4, #25 │ │ - bhi.n 602b8 │ │ + bhi.n 603a8 │ │ lsl.w r6, r3, r4 │ │ tst.w r6, r9 │ │ - beq.n 60292 │ │ + beq.n 60382 │ │ adds r2, #1 │ │ str r2, [r5, #20] │ │ cmp r1, r2 │ │ - bne.n 60266 │ │ + bne.n 60356 │ │ mov r2, r1 │ │ movs r3, #5 │ │ adds r2, #1 │ │ str r3, [sp, #0] │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - b.n 603a2 │ │ + b.n 60492 │ │ cmp r4, #25 │ │ - bne.n 602b8 │ │ + bne.n 603a8 │ │ mov r0, sp │ │ mov r1, r5 │ │ - bl 60418 │ │ + bl 60508 │ │ ldrb.w r0, [sp] │ │ cmp r0, #1 │ │ - bne.n 602e2 │ │ + bne.n 603d2 │ │ ldr r0, [sp, #4] │ │ str.w r0, [r8, #4] │ │ movs r0, #1 │ │ strb.w r0, [r8] │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ cmp r7, #123 @ 0x7b │ │ - bne.w 6040e │ │ + bne.w 604fe │ │ ldrb r3, [r5, #24] │ │ subs r3, #1 │ │ strb r3, [r5, #24] │ │ lsls r3, r3, #24 │ │ - beq.w 60412 │ │ + beq.w 60502 │ │ adds r0, r2, #1 │ │ str r0, [r5, #20] │ │ mov r0, sp │ │ mov r1, r5 │ │ - bl 60418 │ │ + bl 60508 │ │ ldrb.w r0, [sp] │ │ cmp r0, #1 │ │ - bne.n 6030a │ │ + bne.n 603fa │ │ ldr r0, [sp, #4] │ │ - b.n 60332 │ │ + b.n 60422 │ │ ldrb.w r0, [sp, #1] │ │ tbb [pc, r0] │ │ ldrb r0, [r1, #28] │ │ ldrb r7, [r6, #13] │ │ strh r1, [r6, #10] │ │ ldrb r5, [r0, #22] │ │ strb r1, [r1, #22] │ │ @@ -84662,28 +84630,28 @@ │ │ movs r0, #0 │ │ strb.w r0, [r8, #1] │ │ strb.w r0, [r8] │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ mov r0, r5 │ │ ldrb.w r7, [sp, #1] │ │ - bl 5f174 │ │ - cbnz r0, 60332 │ │ + bl 5f264 │ │ + cbnz r0, 60422 │ │ mov r0, r5 │ │ - bl 60040 │ │ + bl 6011c │ │ tbb [pc, r7] │ │ lsrs r0, r1, #32 │ │ lsrs r0, r1, #32 │ │ lsrs r0, r1, #32 │ │ lsrs r0, r1, #32 │ │ lsrs r0, r1, #32 │ │ lsrs r0, r1, #32 │ │ lsrs r0, r1, #32 │ │ lsrs r0, r1, #32 │ │ - cbz r0, 60348 │ │ + cbz r0, 60438 │ │ movs r1, #1 │ │ str.w r0, [r8, #4] │ │ strb.w r1, [r8] │ │ ldrb r1, [r5, #24] │ │ adds r0, r1, #1 │ │ strb r0, [r5, #24] │ │ add sp, #12 │ │ @@ -84693,1770 +84661,1767 @@ │ │ movs r3, #0 │ │ strb.w r7, [r8, #1] │ │ ldmia r2, {r0, r1, r2} │ │ cmp r2, r1 │ │ strb.w r3, [r8] │ │ add.w r3, r6, #1 │ │ strb r3, [r5, #24] │ │ - bcs.n 60384 │ │ + bcs.n 60474 │ │ movs r3, #1 │ │ ldrb r7, [r0, r2] │ │ sub.w r4, r7, #9 │ │ cmp r4, #23 │ │ - bhi.n 60388 │ │ + bhi.n 60478 │ │ lsl.w r6, r3, r4 │ │ tst.w r6, r9 │ │ - beq.n 60388 │ │ + beq.n 60478 │ │ adds r2, #1 │ │ str r2, [r5, #20] │ │ cmp r1, r2 │ │ - bne.n 60366 │ │ + bne.n 60456 │ │ mov r2, r1 │ │ movs r3, #3 │ │ - b.n 603a0 │ │ + b.n 60490 │ │ cmp r7, #125 @ 0x7d │ │ itttt eq │ │ moveq r0, #0 │ │ strbeq.w r0, [r8] │ │ addeq r0, r2, #1 │ │ streq r0, [r5, #20] │ │ itt eq │ │ addeq sp, #12 │ │ ldmiaeq.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ movs r3, #10 │ │ str r3, [sp, #0] │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ mov r1, r2 │ │ mov r0, sp │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ movs r1, #1 │ │ str.w r0, [r8, #4] │ │ strb.w r1, [r8] │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ movs r0, #14 │ │ - b.n 603fe │ │ + b.n 604ee │ │ movs r0, #11 │ │ - b.n 603fe │ │ + b.n 604ee │ │ movs r0, #4 │ │ - b.n 603fe │ │ + b.n 604ee │ │ movs r0, #12 │ │ - b.n 603fe │ │ + b.n 604ee │ │ movs r0, #9 │ │ - b.n 603fe │ │ + b.n 604ee │ │ movs r0, #2 │ │ - b.n 603fe │ │ + b.n 604ee │ │ movs r0, #15 │ │ - b.n 603fe │ │ + b.n 604ee │ │ movs r0, #3 │ │ - b.n 603fe │ │ + b.n 604ee │ │ movs r0, #7 │ │ - b.n 603fe │ │ + b.n 604ee │ │ movs r0, #1 │ │ - b.n 603fe │ │ + b.n 604ee │ │ movs r0, #5 │ │ - b.n 603fe │ │ + b.n 604ee │ │ movs r0, #13 │ │ - b.n 603fe │ │ + b.n 604ee │ │ movs r0, #6 │ │ - b.n 603fe │ │ + b.n 604ee │ │ movs r0, #10 │ │ - b.n 603fe │ │ + b.n 604ee │ │ movs r0, #8 │ │ strb.w r0, [r8, #1] │ │ movs r0, #0 │ │ strb.w r0, [r8] │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ movs r3, #10 │ │ - b.n 60286 │ │ + b.n 60376 │ │ movs r3, #24 │ │ - b.n 60286 │ │ - bmi.n 603c2 │ │ + b.n 60376 │ │ + bmi.n 604b2 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ sub sp, #16 │ │ mov r2, r1 │ │ mov r9, r0 │ │ ldr.w r0, [r2, #12]! │ │ mov sl, r1 │ │ ldrd r1, r3, [r2, #4] │ │ cmp r3, r1 │ │ - bcs.n 60456 │ │ + bcs.n 60546 │ │ movs r6, #19 │ │ movs r7, #1 │ │ movt r6, #128 @ 0x80 │ │ ldrb r4, [r0, r3] │ │ subs r4, #9 │ │ cmp r4, #25 │ │ - bhi.w 6065e │ │ + bhi.w 6074e │ │ lsl.w r5, r7, r4 │ │ tst r5, r6 │ │ - beq.n 60484 │ │ + beq.n 60574 │ │ adds r3, #1 │ │ str.w r3, [sl, #20] │ │ cmp r1, r3 │ │ - bne.n 60438 │ │ + bne.n 60528 │ │ mov r3, r1 │ │ movs r2, #5 │ │ str r2, [sp, #4] │ │ adds r2, r3, #1 │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #4 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ movs r1, #1 │ │ str.w r0, [r9, #4] │ │ strb.w r1, [r9] │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ cmp r4, #25 │ │ - bne.w 6065e │ │ + bne.w 6074e │ │ movs r0, #0 │ │ mov r1, r2 │ │ str.w r0, [sl, #8] │ │ adds r0, r3, #1 │ │ str.w r0, [sl, #20] │ │ add r0, sp, #4 │ │ mov r2, sl │ │ - bl 767d4 │ │ + bl 7683c │ │ ldrd r0, r6, [sp, #4] │ │ cmp r0, #2 │ │ - bne.n 604b8 │ │ + bne.n 605a8 │ │ movs r0, #1 │ │ str.w r6, [r9, #4] │ │ strb.w r0, [r9] │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ ldr.w r8, [sp, #12] │ │ sub.w r0, r8, #3 │ │ cmp r0, #9 │ │ - bhi.w 60620 │ │ + bhi.w 60710 │ │ tbb [pc, r0] │ │ adds r7, #5 │ │ ldrh r0, [r2, #24] │ │ - ldr r5, [pc, #520] @ (606d8 ) │ │ + ldr r5, [pc, #520] @ (607c8 ) │ │ subs r7, r5, r5 │ │ ldrb r3, [r5, #2] │ │ - ldr r1, [pc, #408] @ (60670 ) │ │ + ldr r1, [pc, #408] @ (60760 ) │ │ mov r0, r6 │ │ movs r2, #3 │ │ add r1, pc │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.w 60620 │ │ + bne.w 60710 │ │ movs r7, #2 │ │ - b.n 6064e │ │ - ldr r1, [pc, #392] @ (60674 ) │ │ + b.n 6073e │ │ + ldr r1, [pc, #392] @ (60764 ) │ │ mov r0, r6 │ │ movs r2, #5 │ │ add r1, pc │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.w 60620 │ │ + bne.w 60710 │ │ movs r7, #3 │ │ - b.n 6064e │ │ - ldr r1, [pc, #408] @ (6069c ) │ │ + b.n 6073e │ │ + ldr r1, [pc, #408] @ (6078c ) │ │ mov r0, r6 │ │ movs r2, #10 │ │ add r1, pc │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - beq.w 60614 │ │ - ldr r1, [pc, #396] @ (606a0 ) │ │ + beq.w 60704 │ │ + ldr r1, [pc, #396] @ (60790 ) │ │ mov r0, r6 │ │ movs r2, #10 │ │ add r1, pc │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - beq.w 60644 │ │ - ldr r1, [pc, #380] @ (606a4 ) │ │ + beq.w 60734 │ │ + ldr r1, [pc, #380] @ (60794 ) │ │ mov r0, r6 │ │ movs r2, #10 │ │ add r1, pc │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.n 60620 │ │ + bne.n 60710 │ │ movs r7, #15 │ │ - b.n 6064e │ │ + b.n 6073e │ │ ldr r0, [r6, #0] │ │ movw r1, #28482 @ 0x6f42 │ │ movt r1, #27759 @ 0x6c6f │ │ cmp r0, r1 │ │ - beq.n 60618 │ │ + beq.n 60708 │ │ ldr r0, [r6, #0] │ │ movw r1, #31042 @ 0x7942 │ │ movt r1, #25972 @ 0x6574 │ │ cmp r0, r1 │ │ - beq.n 60648 │ │ + beq.n 60738 │ │ ldr r0, [r6, #0] │ │ movw r1, #28492 @ 0x6f4c │ │ movt r1, #26478 @ 0x676e │ │ cmp r0, r1 │ │ - beq.n 60610 │ │ - b.n 60620 │ │ - ldr r1, [pc, #272] @ (60678 ) │ │ + beq.n 60700 │ │ + b.n 60710 │ │ + ldr r1, [pc, #272] @ (60768 ) │ │ mov r0, r6 │ │ movs r2, #8 │ │ add r1, pc │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - beq.n 60610 │ │ - ldr r1, [pc, #272] @ (60688 ) │ │ + beq.n 60700 │ │ + ldr r1, [pc, #272] @ (60778 ) │ │ mov r0, r6 │ │ movs r2, #8 │ │ movs r7, #8 │ │ add r1, pc │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - beq.n 6064e │ │ - ldr r1, [pc, #260] @ (6068c ) │ │ + beq.n 6073e │ │ + ldr r1, [pc, #260] @ (6077c ) │ │ mov r0, r6 │ │ movs r2, #8 │ │ add r1, pc │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - beq.n 6064c │ │ - ldr r1, [pc, #256] @ (60698 ) │ │ + beq.n 6073c │ │ + ldr r1, [pc, #256] @ (60788 ) │ │ mov r0, r6 │ │ movs r2, #8 │ │ add r1, pc │ │ - blx d8860 │ │ - cbnz r0, 60620 │ │ + blx d8870 │ │ + cbnz r0, 60710 │ │ movs r7, #12 │ │ - b.n 6064e │ │ - ldr r1, [pc, #232] @ (60694 ) │ │ + b.n 6073e │ │ + ldr r1, [pc, #232] @ (60784 ) │ │ mov r0, r6 │ │ movs r2, #9 │ │ add r1, pc │ │ - blx d8860 │ │ - cbnz r0, 60620 │ │ + blx d8870 │ │ + cbnz r0, 60710 │ │ movs r7, #11 │ │ - b.n 6064e │ │ - ldr r1, [pc, #240] @ (606ac ) │ │ + b.n 6073e │ │ + ldr r1, [pc, #240] @ (6079c ) │ │ mov r0, r6 │ │ movs r2, #12 │ │ movs r7, #12 │ │ add r1, pc │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - beq.n 6064e │ │ - b.n 60620 │ │ - ldr r1, [pc, #192] @ (60690 ) │ │ + beq.n 6073e │ │ + b.n 60710 │ │ + ldr r1, [pc, #192] @ (60780 ) │ │ mov r0, r6 │ │ movs r2, #7 │ │ add r1, pc │ │ - blx d8860 │ │ - cbnz r0, 60620 │ │ + blx d8870 │ │ + cbnz r0, 60710 │ │ movs r7, #10 │ │ - b.n 6064e │ │ - ldr r1, [pc, #152] @ (6067c ) │ │ + b.n 6073e │ │ + ldr r1, [pc, #152] @ (6076c ) │ │ mov r0, r6 │ │ movs r2, #6 │ │ add r1, pc │ │ - blx d8860 │ │ - cbz r0, 6061c │ │ - ldr r1, [pc, #144] @ (60680 ) │ │ + blx d8870 │ │ + cbz r0, 6070c │ │ + ldr r1, [pc, #144] @ (60770 ) │ │ mov r0, r6 │ │ movs r2, #6 │ │ movs r7, #6 │ │ add r1, pc │ │ - blx d8860 │ │ - cbz r0, 6064e │ │ - ldr r1, [pc, #132] @ (60684 ) │ │ + blx d8870 │ │ + cbz r0, 6073e │ │ + ldr r1, [pc, #132] @ (60774 ) │ │ mov r0, r6 │ │ movs r2, #6 │ │ add r1, pc │ │ - blx d8860 │ │ - cbnz r0, 60620 │ │ + blx d8870 │ │ + cbnz r0, 60710 │ │ movs r7, #7 │ │ - b.n 6064e │ │ + b.n 6073e │ │ movs r7, #4 │ │ - b.n 6064e │ │ + b.n 6073e │ │ movs r7, #13 │ │ - b.n 6064e │ │ + b.n 6073e │ │ movs r7, #0 │ │ - b.n 6064e │ │ + b.n 6073e │ │ movs r7, #5 │ │ - b.n 6064e │ │ - ldr r2, [pc, #132] @ (606a8 ) │ │ + b.n 6073e │ │ + ldr r2, [pc, #132] @ (60798 ) │ │ mov r0, r6 │ │ mov r1, r8 │ │ movs r3, #18 │ │ add r2, pc │ │ - bl 60118 │ │ + bl 601f4 │ │ mov r1, sl │ │ - bl 5c46a │ │ + bl 22434 │ │ str.w r0, [r9, #4] │ │ movs r0, #1 │ │ strb.w r0, [r9] │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ movs r7, #14 │ │ - b.n 6064e │ │ + b.n 6073e │ │ movs r7, #1 │ │ - b.n 6064e │ │ + b.n 6073e │ │ movs r7, #9 │ │ movs r0, #0 │ │ strb.w r7, [r9, #1] │ │ strb.w r0, [r9] │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ - ldr r2, [pc, #12] @ (6066c ) │ │ + ldr r2, [pc, #12] @ (6075c ) │ │ add r1, sp, #4 │ │ mov r0, sl │ │ add r2, pc │ │ - bl 5c22c │ │ - b.n 6062e │ │ - add r5, pc, #416 @ (adr r5, 60810 ) │ │ - movs r7, r0 │ │ - ldrsh r6, [r1, r0] │ │ - @ instruction: 0xfffb5dfb │ │ - @ instruction: 0xfffb5e06 │ │ - @ instruction: 0xfffb5db2 │ │ - @ instruction: 0xfffb5da8 │ │ - @ instruction: 0xfffb5da0 │ │ - @ instruction: 0xfffb5dbc │ │ - vqrdmulh.s , , d20[0] │ │ - @ instruction: 0xfffb5dd6 │ │ - @ instruction: 0xfffb5e03 │ │ - vqrdmulh.s , , d20[0] │ │ - vqrdmlah.s , , d0[0] │ │ - @ instruction: 0xfffb5eb8 │ │ - @ instruction: 0xfffb5eb0 │ │ - vcvtp.s32.f32 d26, d4 │ │ + bl 5c43c │ │ + b.n 6071e │ │ + add r4, pc, #608 @ (adr r4, 609c0 ) │ │ + movs r7, r0 │ │ + ldrb r6, [r3, r4] │ │ + @ instruction: 0xfffb5d0b │ │ + vcvt.u16.f16 d21, d6, #5 │ │ + vqdmulh.s , , d2[0] │ │ + @ instruction: 0xfffb5cb8 │ │ + @ instruction: 0xfffb5cb0 │ │ + vqdmulh.s , , d12[0] │ │ + vcvt.f16.u16 , q10, #5 │ │ + vqdmulh.s , , d22[0] │ │ + vcvt.u16.f16 d21, d3, #5 │ │ + @ instruction: 0xfffb5cf4 │ │ + @ instruction: 0xfffb5dd0 │ │ + vqrdmulh.s , , d8[0] │ │ + vqrdmulh.s , , d0[0] │ │ + vcvtn.s32.f32 d26, d20 │ │ movs r7, r0 │ │ - ldrb r0, [r7, r7] │ │ + ldrb r0, [r1, r4] │ │ @ instruction: 0xfffbe9d1 │ │ lsls r0, r0, #8 │ │ - ldr r1, [pc, #8] @ (606c0 ) │ │ + ldr r1, [pc, #8] @ (607b0 ) │ │ ldr r3, [r2, #12] │ │ movs r2, #18 │ │ add r1, pc │ │ bx r3 │ │ nop │ │ - ldrb r4, [r3, r0] │ │ + ldrh r4, [r5, r4] │ │ @ instruction: 0xfffbe9d1 │ │ lsls r0, r0, #8 │ │ - ldr r1, [pc, #8] @ (606d4 ) │ │ + ldr r1, [pc, #8] @ (607c4 ) │ │ ldr r3, [r2, #12] │ │ movs r2, #21 │ │ add r1, pc │ │ bx r3 │ │ nop │ │ - ldrb r3, [r7, r7] │ │ - @ instruction: 0xfffbe9d0 │ │ + ldrb r3, [r1, r4] │ │ + @ instruction: 0xfffbe9d1 │ │ lsls r0, r0, #8 │ │ - ldr r2, [r2, #12] │ │ - bx r2 │ │ - ldrd r0, r2, [r1] │ │ - ldr r1, [pc, #8] @ (606f0 ) │ │ + ldr r1, [pc, #8] @ (607d8 ) │ │ ldr r3, [r2, #12] │ │ movs r2, #9 │ │ add r1, pc │ │ bx r3 │ │ nop │ │ - ldr r6, [r2, #84] @ 0x54 │ │ + ldr r5, [r5, #68] @ 0x44 │ │ @ instruction: 0xfffbe9d1 │ │ lsls r0, r0, #8 │ │ - ldr r1, [pc, #8] @ (60704 ) │ │ + ldr r1, [pc, #8] @ (607ec ) │ │ ldr r3, [r2, #12] │ │ movs r2, #8 │ │ add r1, pc │ │ bx r3 │ │ nop │ │ - ldrb r2, [r7, r1] │ │ + ldrh r2, [r2, r6] │ │ @ instruction: 0xfffbe9d1 │ │ lsls r0, r0, #8 │ │ - ldr r1, [pc, #8] @ (60718 ) │ │ + ldr r1, [pc, #8] @ (60800 ) │ │ ldr r3, [r2, #12] │ │ movs r2, #23 │ │ add r1, pc │ │ bx r3 │ │ nop │ │ - ldrb r1, [r6, r7] │ │ + ldrb r1, [r1, r4] │ │ vsli.32 , q8, #27 │ │ sub sp, #40 @ 0x28 │ │ mov r6, r3 │ │ mov r3, r1 │ │ ldrd r1, r4, [r0] │ │ mov r5, r0 │ │ add r0, sp, #8 │ │ str r2, [sp, #0] │ │ mov r2, r4 │ │ - bl 607dc │ │ + bl 608c4 │ │ ldr r0, [sp, #8] │ │ cmp r0, #2 │ │ - bne.n 607a2 │ │ + bne.n 6088a │ │ ldrd r5, r4, [r5] │ │ - cbz r5, 60770 │ │ + cbz r5, 60858 │ │ cmp r5, #1 │ │ - bne.n 60758 │ │ + bne.n 60840 │ │ add.w r0, r4, #128 @ 0x80 │ │ ldrex r1, [r0] │ │ adds r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 60748 │ │ - b.n 60782 │ │ + bne.n 60830 │ │ + b.n 6086a │ │ ldrex r0, [r4] │ │ adds r1, r0, #1 │ │ strex r2, r1, [r4] │ │ cmp r2, #0 │ │ - bne.n 60758 │ │ + bne.n 60840 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 60788 │ │ - bl 773ce │ │ + bgt.n 60870 │ │ + bl 77436 │ │ add.w r0, r4, #160 @ 0xa0 │ │ ldrex r1, [r0] │ │ adds r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 60774 │ │ + bne.n 6085c │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ - ble.n 6076c │ │ + ble.n 60854 │ │ movs r0, #16 │ │ - blx d87f0 │ │ - cbz r0, 607c4 │ │ + blx d8810 │ │ + cbz r0, 608ac │ │ ldr r2, [sp, #56] @ 0x38 │ │ - ldr r1, [pc, #56] @ (607cc ) │ │ + ldr r1, [pc, #56] @ (608b4 ) │ │ strd r5, r4, [r0] │ │ add r1, pc │ │ strd r6, r2, [r0, #8] │ │ add sp, #40 @ 0x28 │ │ pop {r4, r5, r6, pc} │ │ add r6, sp, #8 │ │ add.w ip, sp, #24 │ │ ldmia r6, {r1, r2, r6} │ │ - ldr r0, [pc, #36] @ (607d0 ) │ │ - ldr r3, [pc, #36] @ (607d4 ) │ │ - ldr r4, [pc, #40] @ (607d8 ) │ │ + ldr r0, [pc, #36] @ (608b8 ) │ │ + ldr r3, [pc, #36] @ (608bc ) │ │ + ldr r4, [pc, #40] @ (608c0 ) │ │ add r0, pc │ │ stmia.w ip, {r1, r2, r6} │ │ add r3, pc │ │ add r2, sp, #24 │ │ movs r1, #43 @ 0x2b │ │ add r4, pc │ │ str r4, [sp, #0] │ │ - bl 414b0 │ │ + bl 417b8 │ │ movs r0, #4 │ │ movs r1, #16 │ │ - bl 3de2a │ │ - add r1, sp, #976 @ 0x3d0 │ │ + bl 3e132 │ │ + add r1, sp, #112 @ 0x70 │ │ movs r7, r0 │ │ - ldrh r3, [r2, #38] @ 0x26 │ │ - vsra.u64 d26, d22, #5 │ │ + ldrh r3, [r5, #30] │ │ + vcvta.u32.f32 d26, d30 │ │ movs r7, r0 │ │ - add r1, sp, #768 @ 0x300 │ │ + add r0, sp, #928 @ 0x3a0 │ │ movs r7, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #28 │ │ ldr.w r9, [sp, #64] @ 0x40 │ │ mov sl, r3 │ │ mov r7, r2 │ │ mov fp, r0 │ │ cmp r1, #0 │ │ - beq.w 6094e │ │ + beq.w 60a36 │ │ cmp r1, #1 │ │ - bne.w 6096c │ │ + bne.w 60a54 │ │ str.w sl, [sp, #12] │ │ ldr.w sl, [r7, #32] │ │ dmb ish │ │ ldr.w r8, [r7, #36] @ 0x24 │ │ dmb ish │ │ movs.w r0, sl, lsl #31 │ │ - bne.w 60a62 │ │ + bne.w 60b4a │ │ add.w r4, r7, #36 @ 0x24 │ │ add.w r6, r7, #32 │ │ str.w fp, [sp, #8] │ │ movs r5, #0 │ │ mov.w fp, #0 │ │ ubfx r9, sl, #1, #5 │ │ cmp.w r9, #31 │ │ - bne.n 60868 │ │ + bne.n 60950 │ │ cmp r5, #6 │ │ - bhi.n 60846 │ │ + bhi.n 6092e │ │ movs r0, #1 │ │ lsrs.w r1, r0, r5 │ │ add.w r0, r0, #1 │ │ yield │ │ - beq.n 60836 │ │ + beq.n 6091e │ │ adds r5, #1 │ │ - b.n 60850 │ │ - blx d8810 │ │ + b.n 60938 │ │ + blx d8820 │ │ cmp r5, #11 │ │ it cc │ │ addcc r5, #1 │ │ ldr.w sl, [r6] │ │ dmb ish │ │ ldr.w r8, [r4] │ │ dmb ish │ │ movs.w r0, sl, lsl #31 │ │ - beq.n 60826 │ │ - b.n 60a18 │ │ + beq.n 6090e │ │ + b.n 60b00 │ │ cmp.w r9, #30 │ │ it eq │ │ cmpeq.w fp, #0 │ │ - bne.n 60886 │ │ + bne.n 6096e │ │ mov.w r0, #376 @ 0x178 │ │ movs r1, #1 │ │ - blx d8820 │ │ + blx d8830 │ │ mov fp, r0 │ │ cmp r0, #0 │ │ - beq.w 60c00 │ │ + beq.w 60ce8 │ │ cmp.w r8, #0 │ │ - beq.n 608ac │ │ + beq.n 60994 │ │ ldrex r0, [r6] │ │ cmp r0, sl │ │ - bne.n 608ec │ │ + bne.n 609d4 │ │ add.w r1, sl, #2 │ │ dmb ish │ │ strex r2, r1, [r6] │ │ movs r1, #0 │ │ cmp r2, #0 │ │ it eq │ │ moveq.w r1, #4294967295 @ 0xffffffff │ │ - b.n 608f2 │ │ + b.n 609da │ │ mov.w r0, #376 @ 0x178 │ │ movs r1, #1 │ │ - blx d8820 │ │ + blx d8830 │ │ cmp r0, #0 │ │ - beq.w 60c00 │ │ + beq.w 60ce8 │ │ ldrex r1, [r4] │ │ - cbnz r1, 608d4 │ │ + cbnz r1, 609bc │ │ dmb ish │ │ strex r1, r0, [r4] │ │ - cbz r1, 60924 │ │ + cbz r1, 60a0c │ │ ldrex r1, [r4] │ │ cmp r1, #0 │ │ - beq.n 608c6 │ │ + beq.n 609ae │ │ movs r1, #0 │ │ clrex │ │ - cbz r1, 6092a │ │ + cbz r1, 60a12 │ │ mov r8, r0 │ │ dmb ish │ │ str r0, [r7, #4] │ │ ldrex r0, [r6] │ │ cmp r0, sl │ │ - beq.n 60894 │ │ + beq.n 6097c │ │ movs r1, #0 │ │ clrex │ │ lsls r1, r1, #31 │ │ dmb ish │ │ - bne.w 60bc6 │ │ + bne.w 60cae │ │ ldr.w r8, [r4] │ │ mov r1, r5 │ │ movs r2, #1 │ │ cmp r5, #6 │ │ it cs │ │ movcs r1, #6 │ │ dmb ish │ │ lsrs.w r3, r2, r1 │ │ add.w r2, r2, #1 │ │ yield │ │ - beq.n 6090e │ │ + beq.n 609f6 │ │ mov sl, r0 │ │ cmp r5, #7 │ │ it cc │ │ addcc r5, #1 │ │ - b.n 60860 │ │ + b.n 60948 │ │ movs r1, #1 │ │ cmp r1, #0 │ │ - bne.n 608dc │ │ + bne.n 609c4 │ │ cmp.w fp, #0 │ │ - beq.n 6093a │ │ + beq.n 60a22 │ │ mov r8, r0 │ │ mov r0, fp │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r8 │ │ ldr.w sl, [r6] │ │ dmb ish │ │ ldr.w r8, [r4] │ │ dmb ish │ │ mov fp, r0 │ │ - b.n 60860 │ │ + b.n 60948 │ │ ldr r0, [r7, #32] │ │ ldr r1, [r7, #72] @ 0x48 │ │ tst r1, r0 │ │ - beq.w 60a7a │ │ + beq.w 60b62 │ │ movs r0, #1 │ │ str.w r0, [fp] │ │ str.w sl, [fp, #4] │ │ str.w r9, [fp, #8] │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add.w r5, r7, #8 │ │ movs r0, #1 │ │ ldrex r1, [r5] │ │ cmp r1, #0 │ │ - bne.w 60bb6 │ │ + bne.w 60c9e │ │ strex r1, r0, [r5] │ │ cmp r1, #0 │ │ - bne.n 60972 │ │ + bne.n 60a5a │ │ dmb ish │ │ - ldr r6, [pc, #788] @ (60ca0 ) │ │ + ldr r6, [pc, #788] @ (60d88 ) │ │ add r6, pc │ │ ldr r0, [r6, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 60c0a │ │ + bne.w 60cf2 │ │ movs r4, #0 │ │ ldrb r0, [r7, #12] │ │ cmp r0, #0 │ │ - bne.w 60c1a │ │ + bne.w 60d02 │ │ add.w r1, r7, #40 @ 0x28 │ │ add r0, sp, #16 │ │ - bl 60f38 │ │ + bl 61020 │ │ ldr r0, [sp, #16] │ │ cmp r0, #0 │ │ - beq.w 60b86 │ │ + beq.w 60c6e │ │ ldr.w r8, [sp, #24] │ │ - cbnz r4, 609be │ │ + cbnz r4, 60aa6 │ │ ldr r1, [r6, #4] │ │ lsls r1, r1, #1 │ │ - bne.w 60c70 │ │ + bne.w 60d58 │ │ movs r1, #0 │ │ dmb ish │ │ ldrex r2, [r5] │ │ strex r3, r1, [r5] │ │ cmp r3, #0 │ │ - bne.n 609c4 │ │ + bne.n 60aac │ │ cmp r2, #2 │ │ - beq.w 60c36 │ │ + beq.w 60d1e │ │ cmp.w r8, #0 │ │ - beq.w 60c4e │ │ + beq.w 60d36 │ │ strd sl, r9, [r8] │ │ movs r1, #1 │ │ dmb ish │ │ strb.w r1, [r8, #8] │ │ movs r1, #2 │ │ str.w r1, [fp] │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 609f6 │ │ + bne.n 60ade │ │ cmp r1, #1 │ │ - bne.w 60bb0 │ │ + bne.w 60c98 │ │ dmb ish │ │ - bl 418c8 │ │ + bl 41bd0 │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov.w r8, #0 │ │ mov.w r9, #0 │ │ cmp.w fp, #0 │ │ itt ne │ │ movne r0, fp │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w fp, [sp, #8] │ │ cmp.w r8, #0 │ │ - beq.n 60a62 │ │ + beq.n 60b4a │ │ add.w r0, r9, r9, lsl #1 │ │ ldr r1, [sp, #64] @ 0x40 │ │ ldr r2, [sp, #12] │ │ add.w r0, r8, r0, lsl #2 │ │ strd r2, r1, [r0, #4] │ │ adds r0, #12 │ │ dmb ish │ │ ldrex r1, [r0] │ │ orr.w r1, r1, #1 │ │ strex r2, r1, [r0] │ │ cmp r2, #0 │ │ - bne.n 60a4c │ │ + bne.n 60b34 │ │ add.w r0, r7, #64 @ 0x40 │ │ - b.n 60b76 │ │ + b.n 60c5e │ │ movs r0, #1 │ │ str.w r0, [fp] │ │ ldr r0, [sp, #12] │ │ str.w r0, [fp, #4] │ │ ldr r0, [sp, #64] @ 0x40 │ │ str.w r0, [fp, #8] │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add.w r4, r7, #32 │ │ movs r5, #0 │ │ - b.n 60a96 │ │ - blx d8810 │ │ + b.n 60b7e │ │ + blx d8820 │ │ cmp r5, #11 │ │ it cc │ │ addcc r5, #1 │ │ ldr r0, [r4, #0] │ │ ldr r1, [r7, #72] @ 0x48 │ │ tst r1, r0 │ │ - bne.w 60958 │ │ + bne.w 60a40 │ │ subs r1, #1 │ │ ldr.w r6, [r7, #148] @ 0x94 │ │ and.w r3, r1, r0 │ │ ldr r2, [r7, #68] @ 0x44 │ │ add.w r1, r3, r3, lsl #1 │ │ add.w r1, r6, r1, lsl #2 │ │ ldr r6, [r1, #8] │ │ dmb ish │ │ cmp r0, r6 │ │ - bne.n 60ad0 │ │ + bne.n 60bb8 │ │ ldr r6, [r7, #64] @ 0x40 │ │ adds r3, #1 │ │ cmp r3, r6 │ │ - bcs.n 60b08 │ │ + bcs.n 60bf0 │ │ adds r3, r0, #1 │ │ ldrex r2, [r4] │ │ cmp r2, r0 │ │ - beq.n 60b18 │ │ + beq.n 60c00 │ │ clrex │ │ movs r3, #0 │ │ - cbz r3, 60b26 │ │ - b.n 60b66 │ │ + cbz r3, 60c0e │ │ + b.n 60c4e │ │ ldr r1, [r7, #68] @ 0x44 │ │ adds r2, r0, #1 │ │ add r1, r6 │ │ cmp r1, r2 │ │ - bne.n 60b46 │ │ + bne.n 60c2e │ │ dmb ish │ │ ldr r1, [r7, #0] │ │ ldr r2, [r7, #68] @ 0x44 │ │ add r1, r2 │ │ cmp r1, r0 │ │ - beq.n 60bc2 │ │ + beq.n 60caa │ │ movs r0, #6 │ │ movs r1, #1 │ │ cmp r5, #6 │ │ it cc │ │ movcc r0, r5 │ │ lsrs.w r2, r1, r0 │ │ add.w r1, r1, #1 │ │ yield │ │ - beq.n 60af2 │ │ + beq.n 60bda │ │ ldr r0, [r4, #0] │ │ cmp r5, #7 │ │ it cc │ │ addcc r5, #1 │ │ - b.n 60a8e │ │ + b.n 60b76 │ │ negs r2, r2 │ │ ldr r3, [r7, #68] @ 0x44 │ │ ands r2, r0 │ │ add r3, r2 │ │ ldrex r2, [r4] │ │ cmp r2, r0 │ │ - bne.n 60ac6 │ │ + bne.n 60bae │ │ dmb ish │ │ strex r6, r3, [r4] │ │ - cbz r6, 60b5c │ │ + cbz r6, 60c44 │ │ movs r3, #0 │ │ - cbnz r3, 60b66 │ │ + cbnz r3, 60c4e │ │ movs r0, #6 │ │ movs r1, #1 │ │ cmp r5, #6 │ │ it cc │ │ movcc r0, r5 │ │ lsrs.w r3, r1, r0 │ │ add.w r1, r1, #1 │ │ yield │ │ - beq.n 60b30 │ │ + beq.n 60c18 │ │ cmp r5, #7 │ │ it cc │ │ addcc r5, #1 │ │ mov r0, r2 │ │ - b.n 60a8e │ │ + b.n 60b76 │ │ cmp r5, #6 │ │ - bhi.n 60a82 │ │ + bhi.n 60b6a │ │ movs r0, #1 │ │ lsrs.w r1, r0, r5 │ │ add.w r0, r0, #1 │ │ yield │ │ - beq.n 60b4c │ │ + beq.n 60c34 │ │ adds r5, #1 │ │ - b.n 60a8c │ │ + b.n 60b74 │ │ dmb ish │ │ movs r3, #1 │ │ cmp r3, #0 │ │ - beq.n 60b26 │ │ + beq.n 60c0e │ │ strd sl, r9, [r1] │ │ adds r0, #1 │ │ dmb ish │ │ str r0, [r1, #8] │ │ add.w r0, r7, #112 @ 0x70 │ │ - bl 60d70 │ │ + bl 60e58 │ │ movs r0, #2 │ │ str.w r0, [fp] │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrb.w r0, [r7, #64] @ 0x40 │ │ strd r0, sl, [fp] │ │ str.w r9, [fp, #8] │ │ - cbnz r4, 60b9a │ │ + cbnz r4, 60c82 │ │ ldr r0, [r6, #4] │ │ lsls r0, r0, #1 │ │ - bne.n 60c84 │ │ + bne.n 60d6c │ │ movs r0, #0 │ │ dmb ish │ │ ldrex r1, [r5] │ │ strex r2, r0, [r5] │ │ cmp r2, #0 │ │ - bne.n 60ba0 │ │ + bne.n 60c88 │ │ cmp r1, #2 │ │ - beq.n 60c5e │ │ + beq.n 60d46 │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r0, r5 │ │ clrex │ │ - bl 778fe │ │ - b.n 60988 │ │ + bl 77966 │ │ + b.n 60a70 │ │ movs r0, #0 │ │ - b.n 6095a │ │ + b.n 60a42 │ │ cmp.w r9, #30 │ │ - bne.w 60a20 │ │ + bne.w 60b08 │ │ cmp.w fp, #0 │ │ - beq.n 60c92 │ │ + beq.n 60d7a │ │ dmb ish │ │ str.w fp, [r4] │ │ dmb ish │ │ ldrex r0, [r6] │ │ adds r0, #2 │ │ strex r1, r0, [r6] │ │ cmp r1, #0 │ │ - bne.n 60be0 │ │ + bne.n 60cc8 │ │ dmb ish │ │ str.w fp, [r8] │ │ mov.w r9, #30 │ │ ldr.w fp, [sp, #8] │ │ - b.n 60a36 │ │ + b.n 60b1e │ │ movs r0, #4 │ │ mov.w r1, #376 @ 0x178 │ │ - bl 3de2a │ │ - bl 7770c │ │ + bl 3e132 │ │ + bl 77774 │ │ eor.w r4, r0, #1 │ │ ldrb r0, [r7, #12] │ │ cmp r0, #0 │ │ - beq.w 6099e │ │ - ldr r0, [pc, #140] @ (60ca8 ) │ │ + beq.w 60a86 │ │ + ldr r0, [pc, #140] @ (60d90 ) │ │ add r2, sp, #16 │ │ - ldr r3, [pc, #140] @ (60cac ) │ │ - ldr r1, [pc, #140] @ (60cb0 ) │ │ + ldr r3, [pc, #140] @ (60d94 ) │ │ + ldr r1, [pc, #140] @ (60d98 ) │ │ add r0, pc │ │ add r3, pc │ │ strb.w r4, [sp, #20] │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ str r5, [sp, #16] │ │ - bl 414b0 │ │ + bl 417b8 │ │ mov r4, r0 │ │ movs r0, #240 @ 0xf0 │ │ mov r1, r5 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ + blx d87e0 │ │ mov r0, r4 │ │ cmp.w r8, #0 │ │ - bne.w 609de │ │ + bne.w 60ac6 │ │ mov r0, sl │ │ mov r1, r9 │ │ - bl 61168 │ │ - ldr r0, [pc, #76] @ (60ca4 ) │ │ + bl 61250 │ │ + ldr r0, [pc, #76] @ (60d8c ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ movs r0, #240 @ 0xf0 │ │ mov r1, r5 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ + blx d87e0 │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r4, r0 │ │ - bl 7770c │ │ + bl 77774 │ │ mov r1, r0 │ │ mov r0, r4 │ │ cmp r1, #0 │ │ itt eq │ │ moveq r1, #1 │ │ strbeq r1, [r7, #12] │ │ - b.n 609be │ │ - bl 7770c │ │ + b.n 60aa6 │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq r0, [r7, #12] │ │ - b.n 60b9a │ │ - ldr r0, [pc, #8] @ (60c9c ) │ │ + b.n 60c82 │ │ + ldr r0, [pc, #8] @ (60d84 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ nop │ │ - ldr r3, [sp, #160] @ 0xa0 │ │ + ldr r2, [sp, #320] @ 0x140 │ │ movs r7, r0 │ │ - udf #10 │ │ + ble.n 60e10 │ │ movs r7, r0 │ │ - ldr r3, [sp, #784] @ 0x310 │ │ + ldr r2, [sp, #944] @ 0x3b0 │ │ movs r7, r0 │ │ - ldrh r1, [r4, #2] │ │ - vcvt.u16.f16 d25, d8, #5 │ │ + strh r1, [r7, #58] @ 0x3a │ │ + vcvt.f16.u16 , q0, #5 │ │ movs r7, r0 │ │ - ldr r3, [sp, #904] @ 0x388 │ │ + ldr r3, [sp, #40] @ 0x28 │ │ movs r7, r0 │ │ push {r4, r5, r7, lr} │ │ mov r4, r0 │ │ ldrd r0, r1, [r0] │ │ - bl 4759e │ │ + bl 478f2 │ │ ldrd r4, r5, [r4, #8] │ │ ldr r1, [r5, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r4 │ │ blxne r1 │ │ ldr r0, [r5, #4] │ │ - cbz r0, 60cdc │ │ + cbz r0, 60dc4 │ │ mov r0, r4 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ pop {r4, r5, r7, pc} │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #20 │ │ ldrd r4, r5, [r0] │ │ ldrd r3, r0, [r0, #8] │ │ mov r2, r5 │ │ str r0, [sp, #0] │ │ add r0, sp, #8 │ │ mov r1, r4 │ │ - bl 607dc │ │ + bl 608c4 │ │ ldr r0, [sp, #8] │ │ cmp r0, #2 │ │ - beq.n 60d18 │ │ + beq.n 60e00 │ │ ldrd r6, r7, [sp, #12] │ │ cmp r0, #0 │ │ ldr r1, [r7, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r6 │ │ blxne r1 │ │ ldr r0, [r7, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ mov r1, r5 │ │ add sp, #20 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 4759e │ │ + b.w 478f2 │ │ push {r4, r5, r7, lr} │ │ ldmia.w r0, {r2, r4, r5} │ │ ldr r1, [r5, #0] │ │ cmp r2, #0 │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r4 │ │ blxne r1 │ │ ldr r0, [r5, #4] │ │ - cbz r0, 60d46 │ │ + cbz r0, 60e2e │ │ mov r0, r4 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ pop {r4, r5, r7, pc} │ │ ldrd r2, r3, [r1] │ │ ldr r0, [r0, #0] │ │ cmp r0, #1 │ │ - bne.n 60d5c │ │ - ldr r0, [pc, #20] @ (60d68 ) │ │ + bne.n 60e44 │ │ + ldr r0, [pc, #20] @ (60e50 ) │ │ movs r1, #16 │ │ add r0, pc │ │ - b.w 3faa0 │ │ - ldr r0, [pc, #12] @ (60d6c ) │ │ + b.w 3fda8 │ │ + ldr r0, [pc, #12] @ (60e54 ) │ │ movs r1, #8 │ │ add r0, pc │ │ - b.w 3faa0 │ │ + b.w 3fda8 │ │ nop │ │ - adds r6, r4, #2 │ │ - vsli.64 d21, d24, #59 @ 0x3b │ │ + subs r6, r7, r6 │ │ + vsri.64 , q0, #5 │ │ vtbl.8 d30, {d11-d12}, d29 │ │ blx lr │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldrb.w r0, [r0, #32] │ │ dmb ish │ │ cmp r0, #0 │ │ - bne.w 60ec8 │ │ + bne.w 60fb0 │ │ movs r0, #1 │ │ ldrex r1, [r4] │ │ cmp r1, #0 │ │ - bne.w 60ece │ │ + bne.w 60fb6 │ │ strex r1, r0, [r4] │ │ cmp r1, #0 │ │ - bne.n 60d88 │ │ + bne.n 60e70 │ │ dmb ish │ │ - ldr r5, [pc, #392] @ (60f28 ) │ │ + ldr r5, [pc, #392] @ (61010 ) │ │ add r5, pc │ │ ldr r0, [r5, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 60eda │ │ + bne.w 60fc2 │ │ mov.w r8, #0 │ │ ldrb r0, [r4, #4] │ │ cmp r0, #0 │ │ - bne.w 60eea │ │ + bne.w 60fd2 │ │ ldrb.w r0, [r4, #32] │ │ dmb ish │ │ - cbz r0, 60dc8 │ │ + cbz r0, 60eb0 │ │ cmp.w r8, #0 │ │ - beq.n 60eac │ │ - b.n 60eb2 │ │ + beq.n 60f94 │ │ + b.n 60f9a │ │ add.w r1, r4, #8 │ │ add r0, sp, #4 │ │ - bl 60f38 │ │ + bl 61020 │ │ ldr r0, [sp, #4] │ │ - cbz r0, 60df6 │ │ + cbz r0, 60ede │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 60dda │ │ + bne.n 60ec2 │ │ cmp r1, #1 │ │ - bne.n 60df6 │ │ + bne.n 60ede │ │ dmb ish │ │ ldr r0, [sp, #4] │ │ - bl 418c8 │ │ + bl 41bd0 │ │ ldrd r7, r0, [r4, #24] │ │ movs r1, #0 │ │ mov sl, r5 │ │ cmp r0, #0 │ │ str r1, [r4, #28] │ │ - beq.n 60e88 │ │ + beq.n 60f70 │ │ add.w r0, r0, r0, lsl #1 │ │ movs r5, #1 │ │ add.w r6, r7, r0, lsl #2 │ │ ldrd r0, r1, [r7] │ │ ldrex r2, [r0, #20] │ │ - cbnz r2, 60e2e │ │ + cbnz r2, 60f16 │ │ add.w r2, r0, #20 │ │ dmb ish │ │ strex r3, r1, [r2] │ │ - cbz r3, 60e5c │ │ + cbz r3, 60f44 │ │ ldrex r3, [r2] │ │ cmp r3, #0 │ │ - beq.n 60e20 │ │ + beq.n 60f08 │ │ clrex │ │ dmb ish │ │ adds r7, #12 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 60e3c │ │ + bne.n 60f24 │ │ cmp r1, #1 │ │ itt eq │ │ dmbeq ish │ │ - bleq 418c8 │ │ + bleq 41bd0 │ │ cmp r7, r6 │ │ - bne.n 60e0e │ │ - b.n 60e88 │ │ + bne.n 60ef6 │ │ + b.n 60f70 │ │ dmb ish │ │ ldr r1, [r0, #16] │ │ dmb ish │ │ adds r1, #24 │ │ ldrex r2, [r1] │ │ strex r3, r5, [r1] │ │ cmp r3, #0 │ │ - bne.n 60e68 │ │ + bne.n 60f50 │ │ adds r2, #1 │ │ - bne.n 60e36 │ │ + bne.n 60f1e │ │ mov r9, r0 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ + blx d87e0 │ │ mov r0, r9 │ │ - b.n 60e36 │ │ + b.n 60f1e │ │ ldr r0, [r4, #16] │ │ - cbz r0, 60e90 │ │ + cbz r0, 60f78 │ │ movs r0, #0 │ │ - b.n 60e98 │ │ + b.n 60f80 │ │ ldr r0, [r4, #28] │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ mov r5, sl │ │ dmb ish │ │ strb.w r0, [r4, #32] │ │ dmb ish │ │ cmp.w r8, #0 │ │ - bne.n 60eb2 │ │ + bne.n 60f9a │ │ ldr r0, [r5, #4] │ │ lsls r0, r0, #1 │ │ - bne.n 60f18 │ │ + bne.n 61000 │ │ movs r0, #0 │ │ dmb ish │ │ ldrex r1, [r4] │ │ strex r2, r0, [r4] │ │ cmp r2, #0 │ │ - bne.n 60eb8 │ │ + bne.n 60fa0 │ │ cmp r1, #2 │ │ - beq.n 60f06 │ │ + beq.n 60fee │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ mov r0, r4 │ │ clrex │ │ - bl 778fe │ │ - b.n 60d9e │ │ - bl 7770c │ │ + bl 77966 │ │ + b.n 60e86 │ │ + bl 77774 │ │ eor.w r8, r0, #1 │ │ ldrb r0, [r4, #4] │ │ cmp r0, #0 │ │ - beq.w 60db6 │ │ - ldr r0, [pc, #64] @ (60f2c ) │ │ + beq.w 60e9e │ │ + ldr r0, [pc, #64] @ (61014 ) │ │ add r2, sp, #4 │ │ - ldr r3, [pc, #64] @ (60f30 ) │ │ - ldr r1, [pc, #64] @ (60f34 ) │ │ + ldr r3, [pc, #64] @ (61018 ) │ │ + ldr r1, [pc, #64] @ (6101c ) │ │ add r0, pc │ │ add r3, pc │ │ strb.w r8, [sp, #8] │ │ add r1, pc │ │ strd r1, r4, [sp] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ movs r0, #240 @ 0xf0 │ │ mov r1, r4 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ - b.w d8700 │ │ - bl 7770c │ │ + b.w d8710 │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq r0, [r4, #4] │ │ - b.n 60eb2 │ │ + b.n 60f9a │ │ nop │ │ - bls.n 60f14 │ │ + bls.n 6106c │ │ movs r7, r0 │ │ - strh r1, [r2, #44] @ 0x2c │ │ - vtbl.8 d25, {d11-d13}, d24 │ │ + strh r1, [r5, #36] @ 0x24 │ │ + vtbx.8 d25, {d11-d12}, d0 │ │ movs r7, r0 │ │ - ldr r0, [sp, #712] @ 0x2c8 │ │ + str r7, [sp, #872] @ 0x368 │ │ movs r7, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #4 │ │ ldr r5, [r1, #8] │ │ mov r8, r0 │ │ cmp r5, #0 │ │ - beq.w 61138 │ │ - ldr r0, [pc, #528] @ (6115c ) │ │ + beq.w 61220 │ │ + ldr r0, [pc, #528] @ (61244 ) │ │ mov r9, r1 │ │ add r0, pc │ │ ldr r6, [r0, #0] │ │ dmb ish │ │ - cbnz r6, 60f5c │ │ - bl 7740c │ │ + cbnz r6, 61044 │ │ + bl 77474 │ │ mov r6, r0 │ │ mov r0, r6 │ │ - blx d8830 │ │ + blx d8840 │ │ mov r1, r0 │ │ cmp r0, #1 │ │ - bhi.n 60ffa │ │ - ldr r2, [pc, #500] @ (61160 ) │ │ + bhi.n 610e2 │ │ + ldr r2, [pc, #500] @ (61248 ) │ │ cmp r1, #1 │ │ add r2, pc │ │ ldr r0, [r2, #56] @ 0x38 │ │ dmb ish │ │ - beq.w 610dc │ │ + beq.w 611c4 │ │ cmp r0, #0 │ │ itt eq │ │ addeq.w r0, r2, #56 @ 0x38 │ │ - bleq 7740c │ │ - blx d8830 │ │ + bleq 77474 │ │ + blx d8840 │ │ cmp r0, #2 │ │ - bls.w 61144 │ │ + bls.w 6122c │ │ subs r0, #8 │ │ ldrex r1, [r0] │ │ adds r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 60f90 │ │ + bne.n 61078 │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ - ble.w 61158 │ │ + ble.w 61240 │ │ ldrd r7, r4, [r0, #8] │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 60fae │ │ + bne.n 61096 │ │ cmp r1, #1 │ │ itt eq │ │ dmbeq ish │ │ - bleq 77604 │ │ + bleq 7766c │ │ movs r0, #16 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 6114a │ │ + beq.w 61232 │ │ strd r7, r4, [r0] │ │ mov r7, r0 │ │ str r6, [r0, #8] │ │ mov r0, r6 │ │ - blx d8830 │ │ + blx d8840 │ │ mov r4, r0 │ │ mov r0, r6 │ │ mov r1, r7 │ │ mov r6, r7 │ │ - blx d8840 │ │ + blx d8850 │ │ cmp r4, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r1, r6 │ │ ldrd sl, fp, [r1] │ │ add.w r0, r5, r5, lsl #1 │ │ ldr.w r1, [r9, #4] │ │ add.w r0, r1, r0, lsl #2 │ │ movs r6, #0 │ │ mov r2, r1 │ │ - b.n 61022 │ │ + b.n 6110a │ │ clrex │ │ dmb ish │ │ adds r6, #1 │ │ mov r1, r2 │ │ cmp r2, r0 │ │ - beq.w 61138 │ │ + beq.w 61220 │ │ ldr.w r3, [r2], #12 │ │ ldrd r5, r4, [r3, #8] │ │ eor.w r4, r4, fp │ │ eor.w r5, r5, sl │ │ orrs r5, r4 │ │ - beq.n 61018 │ │ + beq.n 61100 │ │ ldr r5, [r1, #4] │ │ ldrex r4, [r3, #20] │ │ cmp r4, #0 │ │ - bne.n 61010 │ │ + bne.n 610f8 │ │ add.w r4, r3, #20 │ │ dmb ish │ │ strex r7, r5, [r4] │ │ - cbz r7, 61058 │ │ + cbz r7, 61140 │ │ ldrex r7, [r4] │ │ cmp r7, #0 │ │ - beq.n 61048 │ │ - b.n 61010 │ │ + beq.n 61130 │ │ + b.n 610f8 │ │ dmb ish │ │ ldr r0, [r1, #8] │ │ cmp r0, #0 │ │ itt ne │ │ dmbne ish │ │ strne r0, [r3, #24] │ │ ldr r0, [r3, #16] │ │ dmb ish │ │ add.w r1, r0, #24 │ │ movs r0, #1 │ │ ldrex r2, [r1] │ │ strex r3, r0, [r1] │ │ cmp r3, #0 │ │ - bne.n 61074 │ │ + bne.n 6115c │ │ adds r0, r2, #1 │ │ - bne.n 6108e │ │ + bne.n 61176 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ + blx d87e0 │ │ ldr.w r7, [r9, #8] │ │ cmp r6, r7 │ │ - bcs.n 610d0 │ │ + bcs.n 611b8 │ │ mvns r3, r6 │ │ ldr.w r1, [r9, #4] │ │ add.w r2, r6, r6, lsl #1 │ │ add r3, r7 │ │ add.w r0, r1, r2, lsl #2 │ │ ldr.w r4, [r1, r2, lsl #2] │ │ add.w r1, r3, r3, lsl #1 │ │ ldrd r5, sl, [r0, #4] │ │ lsls r2, r1, #2 │ │ add.w r1, r0, #12 │ │ - bl d53ca │ │ + bl d509e │ │ subs r7, #1 │ │ cmp r4, #0 │ │ str.w r7, [r9, #8] │ │ ittt ne │ │ stmiane.w r8, {r4, r5, sl} │ │ addne sp, #4 │ │ ldmiane.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r2, [pc, #144] @ (61164 ) │ │ + ldr r2, [pc, #144] @ (6124c ) │ │ mov r0, r6 │ │ mov r1, r7 │ │ add r2, pc │ │ - bl 3ebf8 │ │ + bl 3ef00 │ │ cmp r0, #0 │ │ itt eq │ │ addeq.w r0, r2, #56 @ 0x38 │ │ - bleq 7740c │ │ - blx d8830 │ │ + bleq 77474 │ │ + blx d8840 │ │ cmp r0, #2 │ │ - bls.n 61152 │ │ + bls.n 6123a │ │ subs r0, #8 │ │ ldrex r1, [r0] │ │ adds r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 610f2 │ │ + bne.n 611da │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ - ble.n 61158 │ │ + ble.n 61240 │ │ ldrd sl, fp, [r0, #8] │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 6110e │ │ + bne.n 611f6 │ │ cmp r1, #1 │ │ itt eq │ │ dmbeq ish │ │ - bleq 77604 │ │ + bleq 7766c │ │ ldr.w r0, [r9, #8] │ │ - cbz r0, 61138 │ │ + cbz r0, 61220 │ │ ldr.w r1, [r9, #4] │ │ add.w r0, r0, r0, lsl #1 │ │ - b.n 61006 │ │ + b.n 610ee │ │ movs r0, #0 │ │ str.w r0, [r8] │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - bl 95ee4 │ │ - b.n 60fa6 │ │ + bl 95f50 │ │ + b.n 6108e │ │ movs r0, #8 │ │ movs r1, #16 │ │ - bl 3de2a │ │ - bl 95ee4 │ │ - b.n 61106 │ │ + bl 3e132 │ │ + bl 95f50 │ │ + b.n 611ee │ │ udf #254 @ 0xfe │ │ nop │ │ - ldmia r1!, {r3, r7} │ │ + ldmia r0!, {r4, r5, r7} │ │ movs r7, r0 │ │ - bhi.n 611b4 │ │ + bvc.n 6130c │ │ movs r7, r0 │ │ - str r6, [sp, #728] @ 0x2d8 │ │ + str r5, [sp, #888] @ 0x378 │ │ movs r7, r0 │ │ push {r4, r5, r7, lr} │ │ mov r5, r1 │ │ ldr r1, [r1, #0] │ │ mov r4, r0 │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r4 │ │ blxne r1 │ │ ldr r0, [r5, #4] │ │ - cbz r0, 61186 │ │ + cbz r0, 6126e │ │ mov r0, r4 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ pop {r4, r5, r7, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #276 @ 0x114 │ │ ldmia.w r0, {r2, r3, r6} │ │ ldr r4, [r0, #12] │ │ mov r0, r1 │ │ - bl 50818 │ │ + bl 50a28 │ │ ldr.w sl, [r0, #52] @ 0x34 │ │ cmp.w sl, #0 │ │ - beq.n 611cc │ │ + beq.n 612b4 │ │ ldr.w ip, [r0, #48] @ 0x30 │ │ add.w r1, sl, sl, lsl #4 │ │ mov r8, r0 │ │ movs r5, #0 │ │ add.w r2, ip, #128 @ 0x80 │ │ lsls r1, r1, #3 │ │ ldr.w r3, [r2], #136 │ │ ldrd r3, r0, [r3, #16] │ │ eors r0, r4 │ │ eors r3, r6 │ │ orrs r0, r3 │ │ - beq.n 611d4 │ │ + beq.n 612bc │ │ adds r5, #1 │ │ subs r1, #136 @ 0x88 │ │ - bne.n 611b6 │ │ - ldr r0, [pc, #164] @ (61274 ) │ │ + bne.n 6129e │ │ + ldr r0, [pc, #164] @ (6135c ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ add.w r0, r5, r5, lsl #4 │ │ movs r2, #112 @ 0x70 │ │ add.w r6, ip, r0, lsl #3 │ │ add r0, sp, #160 @ 0xa0 │ │ mov r1, r6 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add.w ip, r6, #116 @ 0x74 │ │ ldr.w r9, [r6, #112] @ 0x70 │ │ add.w fp, sp, #136 @ 0x88 │ │ ldmia.w ip, {r0, r2, r3, r4, r7} │ │ mov r1, fp │ │ stmia r1!, {r0, r2, r3, r4, r7} │ │ mvns r0, r5 │ │ add r0, sl │ │ add.w r1, r6, #136 @ 0x88 │ │ add.w r0, r0, r0, lsl #4 │ │ lsls r2, r0, #3 │ │ mov r0, r6 │ │ - bl d53c2 │ │ + bl d51f6 │ │ sub.w r1, sl, #1 │ │ cmp.w r9, #2147483648 @ 0x80000000 │ │ str.w r1, [r8, #52] @ 0x34 │ │ - beq.n 6126a │ │ + beq.n 61352 │ │ mov r5, sp │ │ add r1, sp, #160 @ 0xa0 │ │ mov r0, r5 │ │ movs r2, #112 @ 0x70 │ │ - bl d4c50 │ │ + bl d50a2 │ │ str.w r9, [sp, #112] @ 0x70 │ │ add.w r0, r5, #116 @ 0x74 │ │ ldmia.w fp, {r1, r2, r3, r6, r7} │ │ stmia r0!, {r1, r2, r3, r6, r7} │ │ mov r0, r5 │ │ - bl 519c0 │ │ + bl 51bd0 │ │ ldr r0, [sp, #128] @ 0x80 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 61242 │ │ + bne.n 6132a │ │ cmp r1, #1 │ │ - bne.n 61264 │ │ + bne.n 6134c │ │ dmb ish │ │ ldr r0, [sp, #128] @ 0x80 │ │ add sp, #276 @ 0x114 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w 476ec │ │ + b.w 46a1c │ │ add sp, #276 @ 0x114 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r2, [pc, #12] @ (61278 ) │ │ + ldr r2, [pc, #12] @ (61360 ) │ │ mov r0, r5 │ │ add r2, pc │ │ - bl 3ebf8 │ │ - ldr r4, [sp, #312] @ 0x138 │ │ + bl 3ef00 │ │ + ldr r3, [sp, #472] @ 0x1d8 │ │ movs r7, r0 │ │ - ldr r3, [sp, #760] @ 0x2f8 │ │ + ldr r2, [sp, #920] @ 0x398 │ │ movs r7, r0 │ │ push {r4, r5, r7, lr} │ │ mov r4, r0 │ │ adds r0, #24 │ │ - bl 519c0 │ │ + bl 51bd0 │ │ ldrd r4, r5, [r4, #16] │ │ ldr r1, [r5, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r4 │ │ blxne r1 │ │ ldr r0, [r5, #4] │ │ - cbz r0, 612a2 │ │ + cbz r0, 6138a │ │ mov r0, r4 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ pop {r4, r5, r7, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #4 │ │ ldrd r2, r3, [r0] │ │ mov r4, r0 │ │ mov r0, r1 │ │ - bl 50818 │ │ + bl 50a28 │ │ mov r8, r0 │ │ movs r0, #24 │ │ ldrd sl, r9, [r4, #8] │ │ ldrd r7, fp, [r4, #16] │ │ - blx d87f0 │ │ - cbz r0, 61316 │ │ + blx d8810 │ │ + cbz r0, 613fe │ │ ldr.w r5, [r8, #52] @ 0x34 │ │ mov r6, r0 │ │ ldr.w r0, [r8, #44] @ 0x2c │ │ movs r1, #1 │ │ strd r1, r1, [r6] │ │ cmp r5, r0 │ │ strd r7, fp, [r6, #8] │ │ strd sl, r9, [r6, #16] │ │ - beq.n 6130c │ │ + beq.n 613f4 │ │ ldr.w r0, [r8, #48] @ 0x30 │ │ add.w r1, r5, r5, lsl #4 │ │ movs r2, #128 @ 0x80 │ │ add.w r7, r0, r1, lsl #3 │ │ add.w r1, r4, #24 │ │ mov r0, r7 │ │ - bl d4c50 │ │ + bl d50a2 │ │ adds r0, r5, #1 │ │ str.w r0, [r8, #52] @ 0x34 │ │ str.w r6, [r7, #128] @ 0x80 │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add.w r0, r8, #44 @ 0x2c │ │ - bl 47a94 │ │ - b.n 612e4 │ │ + bl 47c74 │ │ + b.n 613cc │ │ movs r0, #8 │ │ movs r1, #24 │ │ - bl 3de2a │ │ - bmi.n 612ca │ │ + bl 3e132 │ │ + bmi.n 613b2 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ sub sp, #16 │ │ mov r6, r1 │ │ mov r4, r0 │ │ mov r1, r2 │ │ mov r0, sp │ │ mov r2, r3 │ │ - bl 3edda │ │ + bl 3f0e2 │ │ ldrd r7, sl, [sp] │ │ cmp.w r7, #2147483648 @ 0x80000000 │ │ - bne.n 6135a │ │ + bne.n 61442 │ │ mov r0, r6 │ │ mov r1, sl │ │ movs r2, #1 │ │ ldr r7, [sp, #8] │ │ - blx 9bf9c │ │ + blx 9bfa8 │ │ adds r1, r0, #1 │ │ cmp r1, #2 │ │ - bcs.n 6138e │ │ + bcs.n 61476 │ │ movs r0, #3 │ │ movt r0, #32768 @ 0x8000 │ │ adds r0, #14 │ │ - b.n 613a0 │ │ + b.n 61488 │ │ movs r0, #23 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 6141a │ │ - ldr r1, [pc, #196] @ (6142c ) │ │ + beq.n 61502 │ │ + ldr r1, [pc, #196] @ (61514 ) │ │ movs r2, #23 │ │ mov r6, r0 │ │ movs r5, #23 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ cmp r7, #0 │ │ itt ne │ │ movne r0, sl │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ movs r0, #3 │ │ str r5, [r4, #12] │ │ movt r0, #32768 @ 0x8000 │ │ adds r0, #7 │ │ stmia r4!, {r0, r5, r6} │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ movw r1, #34744 @ 0x87b8 │ │ movt r1, #65535 @ 0xffff │ │ cmp r0, r1 │ │ - bne.n 613b6 │ │ + bne.n 6149e │ │ movs r0, #3 │ │ movt r0, #32768 @ 0x8000 │ │ str r0, [r4, #0] │ │ movs r0, #0 │ │ strb.w r0, [sl] │ │ - cbz r7, 61414 │ │ + cbz r7, 614fc │ │ mov r0, sl │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ mov r9, r0 │ │ - blx a96f8 │ │ + blx a9704 │ │ mov r6, r0 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ mov r0, sp │ │ mov r1, r6 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldmia.w sp, {r0, r1, r6} │ │ - ldr r5, [pc, #92] @ (61430 ) │ │ + ldr r5, [pc, #92] @ (61518 ) │ │ cmp r0, #0 │ │ add r5, pc │ │ ite eq │ │ moveq r5, r1 │ │ movne r6, #27 │ │ cmp.w r6, #4294967295 @ 0xffffffff │ │ - bgt.n 613e6 │ │ - bl 3e03c │ │ - cbz r6, 613f4 │ │ + bgt.n 614ce │ │ + bl 3e344 │ │ + cbz r6, 614dc │ │ mov r0, r6 │ │ - blx d87f0 │ │ - cbz r0, 61422 │ │ + blx d8810 │ │ + cbz r0, 6150a │ │ mov r8, r0 │ │ - b.n 613f8 │ │ + b.n 614e0 │ │ mov.w r8, #1 │ │ mov r0, r8 │ │ mov r1, r5 │ │ mov r2, r6 │ │ - bl d53c6 │ │ + bl d52ea │ │ strd r6, r8, [r4] │ │ strd r6, r9, [r4, #8] │ │ movs r0, #0 │ │ cmp r7, #0 │ │ strb.w r0, [sl] │ │ - bne.n 613aa │ │ + bne.n 61492 │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ movs r0, #1 │ │ movs r1, #23 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r1, r6 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - ldrsb r0, [r3, r5] │ │ - vqshlu.s64 , , #59 @ 0x3b │ │ + ldrsb r0, [r6, r1] │ │ + vrsqrte.f32 , │ │ vrsqrte.f32 d27, d0 │ │ sub sp, #24 │ │ - ldr r0, [pc, #36] @ (61460 ) │ │ + ldr r0, [pc, #36] @ (61548 ) │ │ add.w r1, sp, #23 │ │ - ldr r2, [pc, #36] @ (61464 ) │ │ + ldr r2, [pc, #36] @ (6154c ) │ │ add r0, pc │ │ str r1, [sp, #16] │ │ add r1, sp, #4 │ │ str r1, [sp, #12] │ │ mov r1, sp │ │ strd r0, r0, [sp] │ │ str r1, [sp, #8] │ │ add r2, pc │ │ adds r0, #56 @ 0x38 │ │ add r1, sp, #8 │ │ - bl 70aa8 │ │ + bl 70b5c │ │ add sp, #24 │ │ pop {r7, pc} │ │ nop │ │ - stmia r4!, {r2, r3, r4, r7} │ │ + stmia r3!, {r2, r6, r7} │ │ movs r7, r0 │ │ - ldr r6, [sp, #0] │ │ + ldr r5, [sp, #160] @ 0xa0 │ │ movs r7, r0 │ │ push {r7, lr} │ │ - bl 61474 │ │ + bl 6155c │ │ movs r0, #1 │ │ pop {r7, pc} │ │ - bmi.n 6141e │ │ + bmi.n 61506 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #108 @ 0x6c │ │ mov r8, r0 │ │ ldr r0, [r0, #0] │ │ movs r3, #0 │ │ ldr r2, [r0, #0] │ │ str r3, [r0, #0] │ │ ldr r1, [r2, #64] @ 0x40 │ │ str r3, [r2, #64] @ 0x40 │ │ cmp r1, #0 │ │ - beq.n 61550 │ │ + beq.n 61638 │ │ add r5, sp, #8 │ │ mov r0, r5 │ │ blx r1 │ │ add.w r9, sp, #56 @ 0x38 │ │ ldmia r5!, {r1, r2, r3, r4, r6, r7} │ │ mov r0, r9 │ │ stmia r0!, {r1, r2, r3, r4, r6, r7} │ │ ldmia.w r5, {r1, r2, r3, r4, r6, r7} │ │ stmia r0!, {r1, r2, r3, r4, r6, r7} │ │ ldr.w r4, [r8, #4] │ │ ldr r2, [r4, #0] │ │ ldrd r0, r1, [r2] │ │ orrs r0, r1 │ │ - beq.n 61532 │ │ + beq.n 6161a │ │ ldrd fp, sl, [r2, #36] @ 0x24 │ │ cmp.w sl, #0 │ │ strd r2, r4, [sp] │ │ - beq.n 6151e │ │ + beq.n 61606 │ │ movs r6, #0 │ │ - b.n 614d4 │ │ + b.n 615bc │ │ ldr r0, [r4, #0] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #1 │ │ cmp r6, sl │ │ - beq.n 6151e │ │ + beq.n 61606 │ │ add.w r0, r6, r6, lsl #1 │ │ add.w r4, fp, r0, lsl #2 │ │ ldrd r5, r8, [r4, #4] │ │ cmp.w r8, #0 │ │ - beq.n 614c2 │ │ + beq.n 615aa │ │ mov.w r9, #0 │ │ - b.n 614f0 │ │ + b.n 615d8 │ │ cmp r9, r8 │ │ - beq.n 614c2 │ │ + beq.n 615aa │ │ add.w r0, r5, r9, lsl #4 │ │ add.w r9, r9, #1 │ │ ldr.w r1, [r0, #8]! │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r7, r3, [r1] │ │ cmp r7, #0 │ │ - bne.n 61500 │ │ + bne.n 615e8 │ │ cmp r2, #1 │ │ - bne.n 614ec │ │ + bne.n 615d4 │ │ dmb ish │ │ ldr r0, [r0, #0] │ │ - bl 46714 │ │ - b.n 614ec │ │ + bl 46a68 │ │ + b.n 615d4 │ │ ldr r0, [sp, #0] │ │ add.w r9, sp, #56 @ 0x38 │ │ ldr r4, [sp, #4] │ │ ldr r0, [r0, #32] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, fp │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r4, #0] │ │ movs r1, #0 │ │ movs r2, #1 │ │ strd r2, r1, [r0], #8 │ │ ldmia.w r9!, {r1, r2, r3, r5, r6, r7} │ │ stmia r0!, {r1, r2, r3, r5, r6, r7} │ │ ldmia.w r9, {r1, r2, r3, r5, r6, r7} │ │ stmia r0!, {r1, r2, r3, r5, r6, r7} │ │ movs r0, #1 │ │ add sp, #108 @ 0x6c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #12] @ (61560 ) │ │ + ldr r0, [pc, #12] @ (61648 ) │ │ movs r1, #85 @ 0x55 │ │ - ldr r2, [pc, #12] @ (61564 ) │ │ + ldr r2, [pc, #12] @ (6164c ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ nop │ │ - ldrh r1, [r7, r2] │ │ - @ instruction: 0xfffb9d0c │ │ + ldr r1, [r2, r7] │ │ + vcvt.f16.u16 d25, d20, #5 │ │ movs r7, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #32 │ │ mov r8, r0 │ │ movs r0, #0 │ │ movs r1, #4 │ │ mov r5, sp │ │ strd r0, r1, [sp, #8] │ │ movw r1, #909 @ 0x38d │ │ strd r0, r0, [sp] │ │ strd r0, r0, [sp, #16] │ │ strd r0, r1, [sp, #24] │ │ - b.n 61590 │ │ + b.n 61678 │ │ lsrs r0, r2, #2 │ │ - bne.n 615ce │ │ + bne.n 616b6 │ │ mov r0, r5 │ │ - bl 615ec │ │ + bl 616d4 │ │ ldr r0, [sp, #20] │ │ cmp r0, #0 │ │ - beq.n 61590 │ │ + beq.n 61678 │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r6, #1 │ │ movs r4, #0 │ │ - b.n 615b6 │ │ + b.n 6169e │ │ umull r2, r7, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r7, r3, r4, r7 │ │ mla r4, r3, r4, r7 │ │ mov r3, r2 │ │ lsls r2, r0, #31 │ │ - beq.n 615a6 │ │ + beq.n 6168e │ │ umull r2, r7, r3, r6 │ │ cmp r0, #1 │ │ - beq.n 6158c │ │ + beq.n 61674 │ │ mla r1, r3, r1, r7 │ │ mla r1, r4, r6, r1 │ │ mov r6, r2 │ │ - b.n 615a6 │ │ + b.n 6168e │ │ movs r0, #0 │ │ strb.w r0, [r8, #8] │ │ strd r0, r0, [r8] │ │ add.w r0, r8, #16 │ │ ldmia r5!, {r1, r2, r3, r7} │ │ stmia r0!, {r1, r2, r3, r7} │ │ ldmia.w r5, {r1, r2, r3, r7} │ │ @@ -86465,557 +86430,557 @@ │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #36 @ 0x24 │ │ mov r8, r0 │ │ ldr r0, [r0, #20] │ │ adds r0, #1 │ │ str.w r0, [r8, #20] │ │ - bcc.w 6171a │ │ + bcc.w 61802 │ │ movs r0, #0 │ │ movs r4, #1 │ │ mov r7, r0 │ │ str.w r0, [r8] │ │ str.w r0, [r8, #4] │ │ add.w r0, r4, r4, lsl #1 │ │ lsls r5, r0, #2 │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 61808 │ │ + beq.w 618f0 │ │ adds r1, r0, #4 │ │ movs r2, #0 │ │ movs r3, #8 │ │ mov r6, r4 │ │ str.w r2, [r1, #-4] │ │ subs r6, #1 │ │ strd r3, r2, [r1], #12 │ │ - bne.n 61628 │ │ + bne.n 61710 │ │ mov r1, r4 │ │ ldr.w r2, [r8, #8] │ │ mov ip, r7 │ │ str r2, [sp, #20] │ │ ldrd r7, r2, [r8, #12] │ │ strd r1, r0, [r8, #8] │ │ add.w r0, r2, r2, lsl #1 │ │ str.w r8, [sp, #28] │ │ add.w r5, r7, r0, lsl #2 │ │ str.w r4, [r8, #16] │ │ movs r0, #0 │ │ mov r6, r7 │ │ str r7, [sp, #32] │ │ - cbz r7, 61692 │ │ - cbz r0, 6166e │ │ + cbz r7, 6177a │ │ + cbz r0, 61756 │ │ cmp fp, r9 │ │ - bne.n 6169e │ │ + bne.n 61786 │ │ cmp.w r8, #0 │ │ it ne │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ cmp r6, r5 │ │ - beq.w 617de │ │ + beq.w 618c6 │ │ mov sl, r6 │ │ ldr.w r8, [sl], #12 │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ - beq.n 61768 │ │ + beq.n 61850 │ │ ldrd fp, r0, [r6, #4] │ │ mov r6, sl │ │ add.w r9, fp, r0, lsl #4 │ │ mov r0, fp │ │ cmp r0, #0 │ │ - bne.n 61660 │ │ - b.n 6166e │ │ + bne.n 61748 │ │ + b.n 61756 │ │ cmp r0, #0 │ │ - beq.w 617f6 │ │ + beq.w 618de │ │ cmp fp, r9 │ │ - bne.n 616a6 │ │ - b.n 617ee │ │ + bne.n 6178e │ │ + b.n 618d6 │ │ ldr r1, [sp, #28] │ │ ldr.w ip, [r1] │ │ ldr r4, [r1, #16] │ │ ldr.w sl, [fp] │ │ movw r1, #31829 @ 0x7c55 │ │ movt r1, #32586 @ 0x7f4a │ │ mul.w r1, sl, r1 │ │ and.w r1, r1, ip │ │ cmp r4, r1 │ │ - bls.w 617fc │ │ + bls.w 618e4 │ │ ldrd lr, r2, [fp, #4] │ │ add.w r1, r1, r1, lsl #1 │ │ str r2, [sp, #24] │ │ ldr r2, [sp, #28] │ │ ldr r2, [r2, #12] │ │ ldr.w r3, [r2, r1, lsl #2] │ │ add.w r1, r2, r1, lsl #2 │ │ ldr r7, [r1, #8] │ │ cmp r7, r3 │ │ - beq.n 61700 │ │ + beq.n 617e8 │ │ mov r3, r1 │ │ ldr r1, [r1, #4] │ │ lsls r2, r7, #4 │ │ add.w fp, fp, #16 │ │ str.w sl, [r1, r2] │ │ adds r2, r7, #1 │ │ add.w r1, r1, r7, lsl #4 │ │ str r2, [r3, #8] │ │ ldr r2, [sp, #24] │ │ ldr r7, [sp, #32] │ │ strd lr, r2, [r1, #4] │ │ cmp r7, #0 │ │ - bne.n 6165e │ │ - b.n 61692 │ │ + bne.n 61746 │ │ + b.n 6177a │ │ str r0, [sp, #16] │ │ mov r0, r1 │ │ str.w ip, [sp, #12] │ │ strd r1, lr, [sp, #4] │ │ - bl 4796a │ │ + bl 47dd2 │ │ ldrd r1, lr, [sp, #4] │ │ ldrd ip, r0, [sp, #12] │ │ - b.n 616dc │ │ + b.n 617c4 │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r2, #1 │ │ movs r7, #0 │ │ - b.n 6173e │ │ + b.n 61826 │ │ mla r1, r3, r1, r6 │ │ mla r1, r7, r2, r1 │ │ mov r2, r4 │ │ umull r6, r5, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r5, r3, r7, r5 │ │ mla r7, r3, r7, r5 │ │ mov r3, r6 │ │ lsls r6, r0, #31 │ │ - beq.n 6172e │ │ + beq.n 61816 │ │ umull r4, r6, r3, r2 │ │ cmp r0, #1 │ │ - bne.n 61724 │ │ + bne.n 6180c │ │ subs r7, r4, #1 │ │ mov.w r0, #0 │ │ sbc.w r0, r0, #0 │ │ strd r7, r0, [r8] │ │ movw r0, #43690 @ 0xaaaa │ │ movt r0, #2730 @ 0xaaa │ │ cmp r4, r0 │ │ - bls.n 61810 │ │ - bl 3e03c │ │ + bls.n 618f8 │ │ + bl 3e344 │ │ subs.w r0, r5, sl │ │ - beq.n 617de │ │ + beq.n 618c6 │ │ movw r1, #43691 @ 0xaaab │ │ lsrs r0, r0, #2 │ │ movt r1, #43690 @ 0xaaaa │ │ mov.w fp, #0 │ │ mul.w r8, r0, r1 │ │ - b.n 6179a │ │ + b.n 61882 │ │ ldr.w r0, [r9] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r7, [sp, #32] │ │ add.w fp, fp, #1 │ │ cmp fp, r8 │ │ - beq.n 617de │ │ + beq.n 618c6 │ │ add.w r0, fp, fp, lsl #1 │ │ add.w r9, sl, r0, lsl #2 │ │ ldrd r4, r5, [r9, #4] │ │ cmp r5, #0 │ │ - beq.n 61782 │ │ + beq.n 6186a │ │ movs r7, #0 │ │ - b.n 617b2 │ │ + b.n 6189a │ │ cmp r7, r5 │ │ - beq.n 61782 │ │ + beq.n 6186a │ │ add.w r0, r4, r7, lsl #4 │ │ adds r7, #1 │ │ ldr.w r1, [r0, #8]! │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r6, r3, [r1] │ │ cmp r6, #0 │ │ - bne.n 617c0 │ │ + bne.n 618a8 │ │ cmp r2, #1 │ │ - bne.n 617ae │ │ + bne.n 61896 │ │ dmb ish │ │ ldr r0, [r0, #0] │ │ - bl 46714 │ │ - b.n 617ae │ │ + bl 46a68 │ │ + b.n 61896 │ │ ldr r0, [sp, #20] │ │ - cbz r0, 617f6 │ │ + cbz r0, 618de │ │ mov r0, r7 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ mov r7, r0 │ │ cmp.w r8, #0 │ │ - bne.n 617e2 │ │ + bne.n 618ca │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r2, [pc, #28] @ (6181c ) │ │ + ldr r2, [pc, #28] @ (61904 ) │ │ mov r0, r1 │ │ mov r1, r4 │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ movs r0, #4 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ cmp r4, #0 │ │ - bne.w 6160e │ │ + bne.w 616f6 │ │ movs r1, #0 │ │ movs r0, #4 │ │ - b.n 61636 │ │ - str r2, [sp, #488] @ 0x1e8 │ │ + b.n 6171e │ │ + str r1, [sp, #648] @ 0x288 │ │ movs r7, r0 │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #4 │ │ ldrd r2, r3, [r0] │ │ mov r4, r0 │ │ mov r0, r1 │ │ - bl 50818 │ │ + bl 50a28 │ │ ldr r6, [r4, #8] │ │ movw r1, #31829 @ 0x7c55 │ │ movt r1, #32586 @ 0x7f4a │ │ ldr r3, [r0, #0] │ │ mul.w r2, r6, r1 │ │ ldr r1, [r0, #16] │ │ and.w r5, r3, r2 │ │ cmp r1, r5 │ │ - bls.n 618ee │ │ + bls.n 619d6 │ │ ldr r0, [r0, #12] │ │ add.w r5, r5, r5, lsl #1 │ │ ldrd r3, ip, [r4, #12] │ │ add.w r0, r0, r5, lsl #2 │ │ ldr r2, [r4, #20] │ │ ldrd r0, r4, [r0, #4] │ │ sub.w r5, r0, #24 │ │ add.w r0, r4, r4, lsl #1 │ │ lsls r0, r0, #3 │ │ - cbz r0, 618e6 │ │ + cbz r0, 619ce │ │ ldr.w r4, [r5, #24]! │ │ subs r0, #24 │ │ ldr r1, [r5, #4] │ │ eors r4, r6 │ │ eors r1, r3 │ │ orrs r1, r4 │ │ - bne.n 61868 │ │ + bne.n 61950 │ │ ldr r7, [r5, #16] │ │ - cbz r7, 6189c │ │ + cbz r7, 61984 │ │ ldr r0, [r5, #12] │ │ lsls r4, r7, #2 │ │ movs r3, #0 │ │ ldr.w r1, [r0, r3, lsl #2] │ │ ldrd r1, r6, [r1, #16] │ │ eors r6, r2 │ │ eor.w r1, r1, ip │ │ orrs r1, r6 │ │ - beq.n 618a4 │ │ + beq.n 6198c │ │ adds r3, #1 │ │ subs r4, #4 │ │ - bne.n 61884 │ │ - ldr r0, [pc, #88] @ (618f8 ) │ │ + bne.n 6196c │ │ + ldr r0, [pc, #88] @ (619e0 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ add.w r0, r0, r3, lsl #2 │ │ mvns r1, r3 │ │ adds r2, r7, r1 │ │ mov r1, r0 │ │ ldr.w r4, [r1], #4 │ │ lsls r2, r2, #2 │ │ - bl d53ca │ │ + bl d509e │ │ subs r0, r7, #1 │ │ str r0, [r5, #16] │ │ dmb ish │ │ ldrex r0, [r4] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r4] │ │ cmp r2, #0 │ │ - bne.n 618c0 │ │ + bne.n 619a8 │ │ cmp r0, #1 │ │ - bne.n 618e2 │ │ + bne.n 619ca │ │ dmb ish │ │ mov r0, r4 │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 476ec │ │ + b.w 46a1c │ │ add sp, #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #20] @ (618fc ) │ │ + ldr r0, [pc, #20] @ (619e4 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r2, [pc, #16] @ (61900 ) │ │ + bl 3fd40 │ │ + ldr r2, [pc, #16] @ (619e8 ) │ │ mov r0, r5 │ │ add r2, pc │ │ - bl 3fa74 │ │ - str r5, [sp, #696] @ 0x2b8 │ │ + bl 3fd7c │ │ + str r4, [sp, #856] @ 0x358 │ │ movs r7, r0 │ │ - str r5, [sp, #336] @ 0x150 │ │ + str r4, [sp, #496] @ 0x1f0 │ │ movs r7, r0 │ │ - str r1, [sp, #936] @ 0x3a8 │ │ + str r1, [sp, #72] @ 0x48 │ │ movs r7, r0 │ │ push {r4, r5, r7, lr} │ │ ldrd r4, r5, [r0] │ │ ldr r1, [r5, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r4 │ │ blxne r1 │ │ ldr r0, [r5, #4] │ │ - cbz r0, 61922 │ │ + cbz r0, 61a0a │ │ mov r0, r4 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ pop {r4, r5, r7, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #12 │ │ ldrd r2, r3, [r0, #8] │ │ mov r5, r0 │ │ mov r0, r1 │ │ - bl 50818 │ │ + bl 50a28 │ │ mov r4, r0 │ │ ldr r0, [r5, #16] │ │ str r0, [sp, #8] │ │ movs r0, #24 │ │ ldrd r8, r7, [r5] │ │ ldrd r9, r6, [r5, #20] │ │ ldr.w sl, [r5, #28] │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 61b0e │ │ + beq.w 61bf6 │ │ movw r2, #31829 @ 0x7c55 │ │ mov fp, r0 │ │ movt r2, #32586 @ 0x7f4a │ │ ldr r0, [r4, #0] │ │ muls r2, r6 │ │ ldr r1, [r4, #16] │ │ movs r3, #1 │ │ strd r3, r3, [fp] │ │ ldr r3, [sp, #8] │ │ strd r8, r7, [fp, #8] │ │ ands r0, r2 │ │ strd r3, r9, [fp, #16] │ │ cmp r1, r0 │ │ - bls.w 61b1e │ │ + bls.w 61c06 │ │ ldr r2, [r4, #12] │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r8, r2, r0, lsl #2 │ │ ldrd r7, r0, [r8, #4] │ │ str r0, [sp, #8] │ │ add.w r0, r0, r0, lsl #1 │ │ sub.w r9, r7, #24 │ │ lsls r5, r0, #3 │ │ mov r0, r5 │ │ - cbz r0, 619d0 │ │ + cbz r0, 61ab8 │ │ ldr.w r2, [r9, #24]! │ │ subs r0, #24 │ │ ldr.w r3, [r9, #4] │ │ eors r2, r6 │ │ eor.w r3, r3, sl │ │ orrs r2, r3 │ │ - bne.n 61998 │ │ + bne.n 61a80 │ │ ldr.w r4, [r9, #16] │ │ ldr.w r0, [r9, #8] │ │ cmp r4, r0 │ │ - beq.w 61b04 │ │ + beq.w 61bec │ │ ldr.w r0, [r9, #12] │ │ str.w fp, [r0, r4, lsl #2] │ │ adds r0, r4, #1 │ │ str.w r0, [r9, #16] │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #4 │ │ str r1, [sp, #4] │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 61b16 │ │ + beq.w 61bfe │ │ mov r9, r8 │ │ ldr.w r8, [sp, #8] │ │ ldr r1, [sp, #4] │ │ mov ip, r0 │ │ cmp.w r8, #0 │ │ str.w fp, [r0] │ │ - beq.n 61a0e │ │ + beq.n 61af6 │ │ mov lr, r7 │ │ movs r0, #0 │ │ mov r2, r7 │ │ ldrd r3, r7, [r2] │ │ eor.w r7, r7, sl │ │ eors r3, r6 │ │ orrs r3, r7 │ │ - beq.n 61ac2 │ │ + beq.n 61baa │ │ adds r0, #1 │ │ adds r2, #24 │ │ subs r5, #24 │ │ - bne.n 619f8 │ │ + bne.n 61ae0 │ │ ldr r0, [r4, #24] │ │ mov r7, r9 │ │ adds r0, #1 │ │ str r0, [r4, #24] │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str r0, [sp, #0] │ │ ldr r0, [r7, #0] │ │ cmp r8, r0 │ │ - beq.n 61af6 │ │ + beq.n 61bde │ │ ldr r2, [r7, #4] │ │ add.w r3, r8, r8, lsl #1 │ │ ldr r0, [r4, #24] │ │ str.w r6, [r2, r3, lsl #3] │ │ add.w r2, r2, r3, lsl #3 │ │ movs r3, #1 │ │ strd sl, r3, [r2, #4] │ │ strd ip, r3, [r2, #12] │ │ add.w r2, r8, #1 │ │ str r2, [r7, #8] │ │ lsls r2, r0, #29 │ │ - bmi.n 61a88 │ │ + bmi.n 61b70 │ │ ldr r6, [sp, #0] │ │ cmp.w r6, #2147483648 @ 0x80000000 │ │ - beq.n 61abc │ │ + beq.n 61ba4 │ │ cmp.w fp, #0 │ │ - beq.n 61aae │ │ + beq.n 61b96 │ │ movs r4, #0 │ │ - b.n 61a5c │ │ + b.n 61b44 │ │ cmp r4, fp │ │ - beq.n 61aae │ │ + beq.n 61b96 │ │ ldr.w r1, [r5, r4, lsl #2] │ │ mov r0, r4 │ │ adds r4, #1 │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r7, r3, [r1] │ │ cmp r7, #0 │ │ - bne.n 61a68 │ │ + bne.n 61b50 │ │ cmp r2, #1 │ │ - bne.n 61a58 │ │ + bne.n 61b40 │ │ dmb ish │ │ ldr.w r0, [r5, r0, lsl #2] │ │ - bl 476ec │ │ - b.n 61a58 │ │ + bl 46a1c │ │ + b.n 61b40 │ │ mov.w r6, #1000 @ 0x3e8 │ │ muls r0, r6 │ │ - blx d5af0 │ │ + blx d5b00 │ │ ldr r1, [r4, #28] │ │ cmp r0, r1 │ │ - bls.n 61a46 │ │ + bls.n 61b2e │ │ mov r0, r4 │ │ - bl 50fc4 │ │ + bl 511d4 │ │ ldr r1, [r4, #16] │ │ ldr r0, [r4, #24] │ │ cmp r1, #0 │ │ - bne.n 61a8c │ │ - ldr r0, [pc, #128] @ (61b28 ) │ │ + bne.n 61b74 │ │ + ldr r0, [pc, #128] @ (61c10 ) │ │ add r0, pc │ │ - bl 409c4 │ │ - cbz r6, 61abc │ │ + bl 40ccc │ │ + cbz r6, 61ba4 │ │ mov r0, r5 │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add.w r0, r0, r0, lsl #1 │ │ sub.w r8, r8, #1 │ │ movs r2, #24 │ │ mov r7, ip │ │ add.w r0, lr, r0, lsl #3 │ │ ldrd r5, fp, [r0, #12] │ │ ldr r1, [r0, #8] │ │ str r1, [sp, #0] │ │ add.w r1, r8, r8, lsl #1 │ │ add.w r1, lr, r1, lsl #3 │ │ - bl d53c2 │ │ + bl d51f6 │ │ mov ip, r7 │ │ ldr r1, [sp, #4] │ │ mov r7, r9 │ │ str.w r8, [r9, #8] │ │ ldr r0, [r7, #0] │ │ cmp r8, r0 │ │ - bne.n 61a22 │ │ + bne.n 61b0a │ │ mov r0, r7 │ │ mov r9, ip │ │ - bl 479e2 │ │ + bl 47c38 │ │ ldr r1, [sp, #4] │ │ mov ip, r9 │ │ - b.n 61a22 │ │ + b.n 61b0a │ │ add.w r0, r9, #8 │ │ - bl 47bba │ │ - b.n 619bc │ │ + bl 47d9a │ │ + b.n 61aa4 │ │ movs r0, #8 │ │ movs r1, #24 │ │ - bl 3de2a │ │ + bl 3e132 │ │ movs r0, #4 │ │ movs r1, #4 │ │ - bl 3de2a │ │ - ldr r2, [pc, #12] @ (61b2c ) │ │ + bl 3e132 │ │ + ldr r2, [pc, #12] @ (61c14 ) │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ nop │ │ - ldrh r4, [r6, #62] @ 0x3e │ │ + ldrh r4, [r3, #56] @ 0x38 │ │ movs r7, r0 │ │ - ldrh r4, [r7, #60] @ 0x3c │ │ + ldrh r4, [r4, #54] @ 0x36 │ │ movs r7, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #28 │ │ ldr r2, [r0, #0] │ │ cmp r2, #2 │ │ - bne.w 61d3c │ │ - ldr r6, [pc, #952] @ (61ef8 ) │ │ + bne.w 61e24 │ │ + ldr r6, [pc, #952] @ (61fe0 ) │ │ add r6, pc │ │ ldr r2, [r6, #56] @ 0x38 │ │ dmb ish │ │ cmp r2, #2 │ │ - bne.w 61e1e │ │ + bne.w 61f06 │ │ ldrex r2, [r6, #8] │ │ cmp r2, #0 │ │ - bne.w 61e34 │ │ + bne.w 61f1c │ │ mvn.w r2, #3221225472 @ 0xc0000000 │ │ strex r3, r2, [r6, #8] │ │ cmp r3, #0 │ │ - bne.w 61e38 │ │ + bne.w 61f20 │ │ dmb ish │ │ - ldr r3, [pc, #912] @ (61efc ) │ │ + ldr r3, [pc, #912] @ (61fe4 ) │ │ add r3, pc │ │ ldr r2, [r3, #4] │ │ lsls r2, r2, #1 │ │ - bne.w 61e46 │ │ + bne.w 61f2e │ │ mov.w r9, #0 │ │ ldrb r2, [r6, #16] │ │ cmp r2, #0 │ │ - bne.w 61e64 │ │ + bne.w 61f4c │ │ ldr r2, [r0, #0] │ │ cmp r2, #2 │ │ - bne.w 61d0e │ │ + bne.w 61df6 │ │ ldr.w lr, [r0, #16] │ │ movw r2, #31829 @ 0x7c55 │ │ movt r2, #32586 @ 0x7f4a │ │ ldr r7, [r6, #24] │ │ mov fp, r3 │ │ ldr r3, [r6, #40] @ 0x28 │ │ mul.w r2, lr, r2 │ │ ands r7, r2 │ │ cmp r3, r7 │ │ - bls.w 61eea │ │ + bls.w 61fd2 │ │ ldr r2, [r6, #36] @ 0x24 │ │ add.w r3, r7, r7, lsl #1 │ │ ldr.w r8, [r0, #20] │ │ add.w sl, r2, r3, lsl #2 │ │ movs r2, #16 │ │ ldr.w ip, [sl, #8] │ │ add.w r4, r2, ip, lsl #4 │ │ movs r2, #0 │ │ add.w r5, r2, #16 │ │ cmp r4, r5 │ │ - beq.n 61c3a │ │ + beq.n 61d22 │ │ ldr.w r7, [sl, #4] │ │ ldr r3, [r7, r2] │ │ add r2, r7 │ │ ldr r2, [r2, #4] │ │ eor.w r3, r3, lr │ │ eor.w r2, r2, r8 │ │ orrs r2, r3 │ │ mov r2, r5 │ │ - bne.n 61bc2 │ │ + bne.n 61caa │ │ adds r2, r7, r5 │ │ sub.w r3, r2, #16 │ │ sub.w r2, ip, #1 │ │ lsls r5, r2, #4 │ │ ldr.w ip, [r7, r5] │ │ str.w r2, [sl, #8] │ │ add.w r2, r7, r2, lsl #4 │ │ @@ -87028,659 +86993,659 @@ │ │ strd ip, r7, [r3] │ │ strd r5, lr, [r3, #8] │ │ dmb ish │ │ ldrex r3, [r2] │ │ subs r7, r3, #1 │ │ strex r5, r7, [r2] │ │ cmp r5, #0 │ │ - bne.n 61c16 │ │ + bne.n 61cfe │ │ cmp r3, #1 │ │ - bne.n 61c3a │ │ + bne.n 61d22 │ │ mov r4, r0 │ │ mov r0, r2 │ │ dmb ish │ │ mov r5, r1 │ │ - bl 46714 │ │ + bl 46a68 │ │ mov r1, r5 │ │ mov r0, r4 │ │ cmp r1, #0 │ │ - beq.w 61d62 │ │ + beq.w 61e4a │ │ ldrd r3, r7, [r0, #88] @ 0x58 │ │ mov r4, r0 │ │ ldrd r1, r2, [r0, #76] @ 0x4c │ │ str r7, [sp, #0] │ │ add r7, sp, #8 │ │ mov r0, r7 │ │ - bl 61f10 │ │ + bl 61ff8 │ │ mov r0, r4 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 61c5a │ │ + bne.n 61d42 │ │ cmp r1, #1 │ │ itt eq │ │ dmbeq ish │ │ - bleq 46714 │ │ + bleq 46a68 │ │ ldrd r4, r5, [sp, #12] │ │ add r0, sp, #20 │ │ mov r2, r5 │ │ mov r1, r4 │ │ - bl 950a8 │ │ + bl 95114 │ │ ldrb.w r0, [sp, #20] │ │ ldr r7, [sp, #24] │ │ cmp r0, #4 │ │ - bhi.w 61db8 │ │ + bhi.w 61ea0 │ │ cmp r0, #3 │ │ - beq.w 61db8 │ │ + beq.w 61ea0 │ │ ldr r0, [sp, #8] │ │ subs r0, r0, r5 │ │ cmp r0, #4 │ │ - bls.w 61de6 │ │ + bls.w 61ece │ │ movw r0, #27694 @ 0x6c2e │ │ movs r1, #107 @ 0x6b │ │ movt r0, #25455 @ 0x636f │ │ adds r2, r5, #5 │ │ str r0, [r4, r5] │ │ adds r0, r4, r5 │ │ strb r1, [r0, #4] │ │ add r0, sp, #20 │ │ mov r1, r4 │ │ - bl 950a8 │ │ + bl 95114 │ │ ldrb.w r0, [sp, #20] │ │ ldr r5, [sp, #24] │ │ cmp r0, #4 │ │ - bhi.w 61dfc │ │ + bhi.w 61ee4 │ │ cmp r0, #3 │ │ - beq.w 61dfc │ │ + beq.w 61ee4 │ │ ldr r0, [sp, #8] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ cmp.w r9, #0 │ │ - bne.n 61ce6 │ │ + bne.n 61dce │ │ ldr.w r0, [fp, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 61ec8 │ │ + bne.w 61fb0 │ │ movs r0, #1 │ │ dmb ish │ │ movt r0, #49152 @ 0xc000 │ │ ldrex r1, [r6, #8] │ │ add r1, r0 │ │ strex r2, r1, [r6, #8] │ │ cmp r2, #0 │ │ - bne.n 61cf0 │ │ + bne.n 61dd8 │ │ cmp.w r1, #1073741824 @ 0x40000000 │ │ - bcs.w 61e94 │ │ + bcs.w 61f7c │ │ movs r0, #1 │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ cmp.w r9, #0 │ │ - bne.n 61d1c │ │ + bne.n 61e04 │ │ ldr r1, [r3, #4] │ │ lsls r1, r1, #1 │ │ - bne.w 61eb4 │ │ + bne.w 61f9c │ │ movs r2, #1 │ │ dmb ish │ │ movt r2, #49152 @ 0xc000 │ │ ldrex r1, [r6, #8] │ │ add r1, r2 │ │ strex r3, r1, [r6, #8] │ │ cmp r3, #0 │ │ - bne.n 61d26 │ │ + bne.n 61e0e │ │ cmp.w r1, #1073741824 @ 0x40000000 │ │ - bcs.w 61e84 │ │ + bcs.w 61f6c │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 61d40 │ │ + bne.n 61e28 │ │ cmp r1, #1 │ │ - bne.n 61d5a │ │ + bne.n 61e42 │ │ dmb ish │ │ - bl 46714 │ │ + bl 46a68 │ │ movs r0, #0 │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ cmp.w r9, #0 │ │ - bne.n 61d72 │ │ + bne.n 61e5a │ │ ldr.w r1, [fp, #4] │ │ lsls r1, r1, #1 │ │ - bne.w 61ed6 │ │ + bne.w 61fbe │ │ movs r2, #1 │ │ dmb ish │ │ movt r2, #49152 @ 0xc000 │ │ ldrex r1, [r6, #8] │ │ add r1, r2 │ │ strex r3, r1, [r6, #8] │ │ cmp r3, #0 │ │ - bne.n 61d7c │ │ + bne.n 61e64 │ │ cmp.w r1, #1073741824 @ 0x40000000 │ │ - bcs.w 61ea4 │ │ + bcs.w 61f8c │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 61d96 │ │ + bne.n 61e7e │ │ cmp r1, #1 │ │ - bne.n 61d06 │ │ + bne.n 61dee │ │ dmb ish │ │ - bl 46714 │ │ + bl 46a68 │ │ movs r0, #1 │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd r8, sl, [r7] │ │ ldr.w r1, [sl] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r8 │ │ blxne r1 │ │ ldr.w r0, [sl, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r7 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #8] │ │ subs r0, r0, r5 │ │ cmp r0, #4 │ │ - bhi.w 61c9e │ │ + bhi.w 61d86 │ │ movs r0, #1 │ │ mov r1, r5 │ │ str r0, [sp, #0] │ │ add r0, sp, #8 │ │ movs r2, #5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd r4, r5, [sp, #12] │ │ - b.n 61c9e │ │ + b.n 61d86 │ │ ldrd r8, r7, [r5] │ │ ldr r1, [r7, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r8 │ │ blxne r1 │ │ ldr r0, [r7, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r5 │ │ - blx d87c0 │ │ - b.n 61cca │ │ + blx d87d0 │ │ + b.n 61db2 │ │ mov r4, r0 │ │ mov r5, r1 │ │ - bl 61434 │ │ + bl 6151c │ │ mov r1, r5 │ │ mov r0, r4 │ │ ldrex r2, [r6, #8] │ │ cmp r2, #0 │ │ - beq.w 61b58 │ │ + beq.w 61c40 │ │ clrex │ │ mov r4, r0 │ │ mov r5, r1 │ │ - bl 95668 │ │ + bl 956d4 │ │ mov r1, r5 │ │ mov r0, r4 │ │ - b.n 61b6a │ │ + b.n 61c52 │ │ mov r4, r0 │ │ mov r5, r1 │ │ mov r7, r3 │ │ - bl 7770c │ │ + bl 77774 │ │ mov r2, r0 │ │ eor.w r9, r2, #1 │ │ mov r3, r7 │ │ mov r1, r5 │ │ mov r0, r4 │ │ ldrb r2, [r6, #16] │ │ cmp r2, #0 │ │ - beq.w 61b82 │ │ - ldr r0, [pc, #152] @ (61f00 ) │ │ + beq.w 61c6a │ │ + ldr r0, [pc, #152] @ (61fe8 ) │ │ add.w r2, r6, #8 │ │ - ldr r3, [pc, #152] @ (61f04 ) │ │ - ldr r1, [pc, #152] @ (61f08 ) │ │ + ldr r3, [pc, #152] @ (61fec ) │ │ + ldr r1, [pc, #152] @ (61ff0 ) │ │ add r0, pc │ │ str r2, [sp, #8] │ │ add r3, pc │ │ add r1, pc │ │ add r2, sp, #8 │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ strb.w r9, [sp, #12] │ │ - bl 414b0 │ │ + bl 417b8 │ │ add.w r2, r6, #8 │ │ mov r4, r0 │ │ mov r0, r2 │ │ - bl 9311c │ │ + bl 93188 │ │ mov r0, r4 │ │ - b.n 61d3c │ │ + b.n 61e24 │ │ add.w r0, r6, #8 │ │ - bl 9311c │ │ + bl 93188 │ │ movs r0, #1 │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add.w r2, r6, #8 │ │ mov r4, r0 │ │ mov r0, r2 │ │ - bl 9311c │ │ + bl 93188 │ │ mov r0, r4 │ │ - b.n 61d92 │ │ + b.n 61e7a │ │ mov r4, r0 │ │ - bl 7770c │ │ + bl 77774 │ │ mov r1, r0 │ │ mov r0, r4 │ │ cmp r1, #0 │ │ itt eq │ │ moveq r1, #1 │ │ strbeq r1, [r6, #16] │ │ - b.n 61d1c │ │ - bl 7770c │ │ + b.n 61e04 │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq r0, [r6, #16] │ │ - b.n 61ce6 │ │ + b.n 61dce │ │ mov r4, r0 │ │ - bl 7770c │ │ + bl 77774 │ │ mov r1, r0 │ │ mov r0, r4 │ │ cmp r1, #0 │ │ itt eq │ │ moveq r1, #1 │ │ strbeq r1, [r6, #16] │ │ - b.n 61d72 │ │ - ldr r2, [pc, #32] @ (61f0c ) │ │ + b.n 61e5a │ │ + ldr r2, [pc, #32] @ (61ff4 ) │ │ mov r0, r7 │ │ mov r1, r3 │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ nop │ │ - pop {r2, r3, r4, r7, pc} │ │ + pop {r2, r6, r7} │ │ movs r7, r0 │ │ - ldmia r4!, {r3, r5} │ │ + ldmia r3!, {r5, r6} │ │ movs r7, r0 │ │ - strb r5, [r2, #24] │ │ - @ instruction: 0xfffb8b1a │ │ + strb r5, [r5, #20] │ │ + vtbl.8 d24, {d11-d13}, d18 │ │ movs r7, r0 │ │ - str r3, [sp, #480] @ 0x1e0 │ │ + str r2, [sp, #640] @ 0x280 │ │ movs r7, r0 │ │ - ldrh r4, [r3, #30] │ │ + ldrh r4, [r0, #24] │ │ movs r7, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ sub sp, #40 @ 0x28 │ │ cmp.w r2, #4294967295 @ 0xffffffff │ │ - ble.n 61ffc │ │ + ble.n 620e4 │ │ ldr r6, [sp, #72] @ 0x48 │ │ mov r4, r2 │ │ mov r8, r3 │ │ mov r9, r0 │ │ mov.w sl, #1 │ │ movs r5, #1 │ │ - cbz r2, 61f3e │ │ + cbz r2, 62026 │ │ mov r0, r4 │ │ mov r7, r1 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 6208a │ │ + beq.w 62172 │ │ mov r5, r0 │ │ mov r1, r7 │ │ mov r0, r5 │ │ mov r2, r4 │ │ - bl d53c6 │ │ + bl d52ea │ │ add r0, sp, #4 │ │ mov r1, r4 │ │ movs r2, #5 │ │ movs r3, #1 │ │ strd r5, r4, [sp, #8] │ │ strd sl, r4, [sp] │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd r5, r7, [sp, #8] │ │ movw r0, #26926 @ 0x692e │ │ movt r0, #24947 @ 0x6173 │ │ movs r1, #114 @ 0x72 │ │ cmp.w r6, #4294967295 @ 0xffffffff │ │ str r0, [r5, r7] │ │ add.w r0, r5, r7 │ │ strb r1, [r0, #4] │ │ - ble.n 61ffc │ │ - cbz r6, 61f88 │ │ + ble.n 620e4 │ │ + cbz r6, 62070 │ │ mov r0, r6 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 62092 │ │ + beq.w 6217a │ │ mov r4, r0 │ │ - b.n 61f8a │ │ + b.n 62072 │ │ movs r4, #1 │ │ mov r1, r8 │ │ mov r0, r4 │ │ mov r2, r6 │ │ add.w r8, r7, #5 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldrb r0, [r5, #0] │ │ ldr.w sl, [sp, #4] │ │ strd r4, r6, [sp, #20] │ │ str r6, [sp, #16] │ │ - cbz r6, 61fb6 │ │ + cbz r6, 6209e │ │ cmp r0, #47 @ 0x2f │ │ - bne.n 62012 │ │ + bne.n 620fa │ │ movs r7, #0 │ │ str r7, [sp, #24] │ │ subs r0, r6, r7 │ │ cmp r8, r0 │ │ - bls.n 61fc8 │ │ - b.n 62024 │ │ + bls.n 620b0 │ │ + b.n 6210c │ │ movs r6, #0 │ │ cmp r0, #47 @ 0x2f │ │ mov.w r7, #0 │ │ it eq │ │ streq r7, [sp, #24] │ │ subs r0, r6, r7 │ │ cmp r8, r0 │ │ - bhi.n 62024 │ │ + bhi.n 6210c │ │ adds r0, r4, r7 │ │ mov r1, r5 │ │ mov r2, r8 │ │ - bl d53c6 │ │ + bl d52ea │ │ cmp.w sl, #0 │ │ add.w r6, r7, r8 │ │ str r6, [sp, #24] │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add r0, sp, #28 │ │ mov r1, r4 │ │ mov r2, r6 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #28] │ │ cmp r0, #1 │ │ - beq.n 62082 │ │ + beq.n 6216a │ │ ldr r5, [sp, #36] @ 0x24 │ │ cmp.w r5, #4294967295 @ 0xffffffff │ │ - bgt.n 62000 │ │ - bl 3e03c │ │ + bgt.n 620e8 │ │ + bl 3e344 │ │ ldr r6, [sp, #32] │ │ - cbz r5, 6203a │ │ + cbz r5, 62122 │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 6209a │ │ + beq.n 62182 │ │ mov r7, r0 │ │ - b.n 6203c │ │ + b.n 62124 │ │ adds r0, r4, r6 │ │ ldrb.w r0, [r0, #-1] │ │ cmp r0, #47 @ 0x2f │ │ - bne.n 62064 │ │ + bne.n 6214c │ │ mov r7, r6 │ │ subs r0, r6, r7 │ │ cmp r8, r0 │ │ - bls.n 61fc8 │ │ + bls.n 620b0 │ │ movs r0, #1 │ │ mov r1, r7 │ │ str r0, [sp, #0] │ │ add r0, sp, #16 │ │ mov r2, r8 │ │ movs r3, #1 │ │ - bl 77788 │ │ + bl 777f0 │ │ ldrd r4, r7, [sp, #20] │ │ - b.n 61fc8 │ │ + b.n 620b0 │ │ movs r7, #1 │ │ mov r0, r7 │ │ mov r1, r6 │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r0, [sp, #16] │ │ strd r5, r7, [r9] │ │ str.w r5, [r9, #8] │ │ - cbz r0, 6205e │ │ + cbz r0, 62146 │ │ mov r0, r4 │ │ add sp, #40 @ 0x28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #40 @ 0x28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ movs r0, #1 │ │ mov r1, r6 │ │ str r0, [sp, #0] │ │ add r0, sp, #16 │ │ movs r2, #1 │ │ movs r3, #1 │ │ - bl 77788 │ │ + bl 777f0 │ │ ldr r0, [sp, #24] │ │ movs r1, #47 @ 0x2f │ │ ldrd r6, r4, [sp, #16] │ │ adds r7, r0, #1 │ │ strb r1, [r4, r0] │ │ - b.n 61fac │ │ - ldr r0, [pc, #32] @ (620a4 ) │ │ + b.n 62094 │ │ + ldr r0, [pc, #32] @ (6218c ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ movs r0, #1 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r1, r6 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - str r1, [sp, #352] @ 0x160 │ │ + str r0, [sp, #512] @ 0x200 │ │ movs r7, r0 │ │ push {r4, lr} │ │ ldrb r1, [r0, #4] │ │ ldr r0, [r0, #0] │ │ - cbnz r1, 620ba │ │ - ldr r1, [pc, #68] @ (620f8 ) │ │ + cbnz r1, 621a2 │ │ + ldr r1, [pc, #68] @ (621e0 ) │ │ add r1, pc │ │ ldr r1, [r1, #4] │ │ lsls r1, r1, #1 │ │ - bne.n 620e2 │ │ + bne.n 621ca │ │ movs r2, #1 │ │ dmb ish │ │ movt r2, #49152 @ 0xc000 │ │ ldrex r1, [r0] │ │ add r1, r2 │ │ strex r3, r1, [r0] │ │ cmp r3, #0 │ │ - bne.n 620c4 │ │ + bne.n 621ac │ │ cmp.w r1, #1073741824 @ 0x40000000 │ │ it cc │ │ popcc {r4, pc} │ │ ldmia.w sp!, {r4, lr} │ │ - b.w 9311c │ │ + b.w 93188 │ │ mov r4, r0 │ │ - bl 7770c │ │ + bl 77774 │ │ mov r1, r0 │ │ mov r0, r4 │ │ cmp r1, #0 │ │ itt eq │ │ moveq r1, #1 │ │ strbeq r1, [r0, #8] │ │ - b.n 620ba │ │ + b.n 621a2 │ │ nop │ │ - stmia r6!, {r1, r5, r6, r7} │ │ + stmia r6!, {r1, r3, r4} │ │ movs r7, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ ldmia.w r0, {r2, r3, r5, r7} │ │ mov r0, r1 │ │ - bl 50818 │ │ + bl 50a28 │ │ ldr r6, [r0, #40] @ 0x28 │ │ - cbz r6, 6212c │ │ + cbz r6, 62214 │ │ mov r8, r0 │ │ ldr r0, [r0, #36] @ 0x24 │ │ lsls r2, r6, #2 │ │ movs r1, #0 │ │ ldr.w r3, [r0, r1, lsl #2] │ │ ldrd r3, r4, [r3, #16] │ │ eors r4, r7 │ │ eors r3, r5 │ │ orrs r3, r4 │ │ - beq.n 62134 │ │ + beq.n 6221c │ │ adds r1, #1 │ │ subs r2, #4 │ │ - bne.n 62116 │ │ - ldr r0, [pc, #72] @ (62178 ) │ │ + bne.n 621fe │ │ + ldr r0, [pc, #72] @ (62260 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ add.w r0, r0, r1, lsl #2 │ │ mvns r2, r1 │ │ add r2, r6 │ │ mov r1, r0 │ │ ldr.w r5, [r1], #4 │ │ lsls r2, r2, #2 │ │ - bl d53ca │ │ + bl d509e │ │ subs r0, r6, #1 │ │ str.w r0, [r8, #40] @ 0x28 │ │ dmb ish │ │ ldrex r0, [r5] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r5] │ │ cmp r2, #0 │ │ - bne.n 62152 │ │ + bne.n 6223a │ │ cmp r0, #1 │ │ - bne.n 62172 │ │ + bne.n 6225a │ │ dmb ish │ │ mov r0, r5 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, lr} │ │ - b.w 476ec │ │ + b.w 46a1c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ nop │ │ - ldrh r6, [r3, #38] @ 0x26 │ │ + ldrh r6, [r0, #32] │ │ movs r7, r0 │ │ push {r4, r5, r7, lr} │ │ ldrd r4, r5, [r0] │ │ ldr r1, [r5, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r4 │ │ blxne r1 │ │ ldr r0, [r5, #4] │ │ - cbz r0, 6219a │ │ + cbz r0, 62282 │ │ mov r0, r4 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ pop {r4, r5, r7, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ sub sp, #4 │ │ ldrd r2, r3, [r0, #8] │ │ mov r5, r0 │ │ mov r0, r1 │ │ - bl 50818 │ │ + bl 50a28 │ │ mov r4, r0 │ │ movs r0, #24 │ │ ldrd r6, r7, [r5] │ │ ldrd r9, r8, [r5, #16] │ │ - blx d87f0 │ │ - cbz r0, 621fa │ │ + blx d8810 │ │ + cbz r0, 622e2 │ │ ldr r5, [r4, #40] @ 0x28 │ │ movs r2, #1 │ │ ldr r1, [r4, #32] │ │ strd r2, r2, [r0] │ │ add.w r2, r0, #8 │ │ cmp r5, r1 │ │ stmia.w r2, {r6, r7, r9} │ │ str.w r8, [r0, #20] │ │ - beq.n 621ea │ │ + beq.n 622d2 │ │ ldr r1, [r4, #36] @ 0x24 │ │ str.w r0, [r1, r5, lsl #2] │ │ adds r0, r5, #1 │ │ str r0, [r4, #40] @ 0x28 │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ add.w r1, r4, #32 │ │ mov r6, r0 │ │ mov r0, r1 │ │ - bl 47bba │ │ + bl 47d9a │ │ mov r0, r6 │ │ - b.n 621da │ │ + b.n 622c2 │ │ movs r0, #8 │ │ movs r1, #24 │ │ - bl 3de2a │ │ - bmi.n 621ae │ │ + bl 3e132 │ │ + bmi.n 62296 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ subw sp, sp, #1100 @ 0x44c │ │ str r0, [sp, #236] @ 0xec │ │ add r0, sp, #244 @ 0xf4 │ │ ldr.w r6, [sp, #1136] @ 0x470 │ │ mov r5, r3 │ │ mov r7, r2 │ │ mov r4, r1 │ │ str r6, [sp, #0] │ │ - bl 61f10 │ │ + bl 61ff8 │ │ ldrd r9, r8, [sp, #248] @ 0xf8 │ │ mov r0, r4 │ │ mov r1, r7 │ │ mov r2, r5 │ │ mov r3, r6 │ │ strd r9, r8, [sp] │ │ str r4, [sp, #220] @ 0xdc │ │ str r7, [sp, #228] @ 0xe4 │ │ str r5, [sp, #224] @ 0xe0 │ │ - bl 650a8 │ │ + bl 65190 │ │ ldr.w sl, [sp, #1152] @ 0x480 │ │ movs r1, #52 @ 0x34 │ │ ldr.w r5, [sp, #1156] @ 0x484 │ │ movs r6, #0 │ │ ldrd r0, fp, [sl, #4] │ │ cmp.w fp, #0 │ │ mul.w r1, fp, r1 │ │ str r0, [sp, #240] @ 0xf0 │ │ str r1, [sp, #232] @ 0xe8 │ │ - beq.n 62274 │ │ + beq.n 6235c │ │ adds r0, #32 │ │ movs r7, #0 │ │ ldr r2, [r0, #0] │ │ subs r1, #52 @ 0x34 │ │ ldr r3, [r0, #12] │ │ add.w r0, r0, #52 @ 0x34 │ │ add r2, r7 │ │ add.w r2, r2, r3, lsl #1 │ │ add.w r7, r2, #1 │ │ - bne.n 6225c │ │ - b.n 62276 │ │ + bne.n 62344 │ │ + b.n 6235e │ │ movs r7, #0 │ │ add r0, sp, #896 @ 0x380 │ │ mov r1, r9 │ │ mov r2, r8 │ │ - bl 3edda │ │ + bl 3f0e2 │ │ cmp r5, #1 │ │ it ls │ │ movls r5, #1 │ │ adds r4, r7, #3 │ │ ldrd r7, r8, [sp, #896] @ 0x380 │ │ movw r9, #17 │ │ adc.w r6, r6, #0 │ │ movt r9, #32768 @ 0x8000 │ │ cmp.w r7, #2147483648 @ 0x80000000 │ │ - bne.w 62684 │ │ + bne.w 6276c │ │ movs r0, #0 │ │ ldr.w sl, [sp, #904] @ 0x388 │ │ str r0, [sp, #352] @ 0x160 │ │ add r0, sp, #352 @ 0x160 │ │ - blx a188c │ │ + blx a1898 │ │ mov r1, r9 │ │ sub.w r7, r1, #14 │ │ mov r9, r0 │ │ adds r0, #1 │ │ cmp r0, #2 │ │ - bcs.w 626bc │ │ + bcs.w 627a4 │ │ ldr r0, [sp, #352] @ 0x160 │ │ movs r1, #0 │ │ mov r2, r4 │ │ mov r3, r6 │ │ - blx a9760 │ │ + blx a976c │ │ mov r9, r0 │ │ adds r0, #1 │ │ cmp r0, #2 │ │ - bcs.w 62704 │ │ + bcs.w 627ec │ │ sub.w r0, r5, #2048 @ 0x800 │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ cmn.w r0, #4096 @ 0x1000 │ │ itte cc │ │ mvncc.w r0, #2147483648 @ 0x80000000 │ │ eorcc.w r4, r0, r5, asr #31 │ │ lslcs r4, r5, #20 │ │ @@ -87691,30 +87656,30 @@ │ │ strd r3, r2, [sp] │ │ mov r3, r4 │ │ mov.w r1, #1048576 @ 0x100000 │ │ movs r2, #0 │ │ cmp.w r4, #10485760 @ 0xa00000 │ │ it le │ │ movle.w r3, #10485760 @ 0xa00000 │ │ - blx a558c │ │ + blx a5598 │ │ mov r9, r0 │ │ adds r0, #1 │ │ cmp r0, #2 │ │ - bcs.w 62740 │ │ + bcs.w 62828 │ │ movw r5, #16384 @ 0x4000 │ │ ldr.w r0, [sp, #1160] @ 0x488 │ │ movt r5, #544 @ 0x220 │ │ mov r1, r8 │ │ bfi r5, r0, #18, #1 │ │ ldr r0, [sp, #352] @ 0x160 │ │ mov.w r3, #384 @ 0x180 │ │ mov r2, r5 │ │ - blx a30cc │ │ + blx a30d8 │ │ cmp r0, #0 │ │ - beq.w 625b6 │ │ + beq.w 6269e │ │ mov.w r0, #2576980377 @ 0x99999999 │ │ mov.w r2, #20971520 @ 0x1400000 │ │ smmul r0, r4, r0 │ │ mov.w r3, #5242880 @ 0x500000 │ │ strd r3, r2, [sp] │ │ movs r2, #0 │ │ asrs r1, r0, #2 │ │ @@ -87723,1060 +87688,1060 @@ │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ str r1, [sp, #8] │ │ adds r3, r6, r4 │ │ mov.w r1, #1048576 @ 0x100000 │ │ cmp.w r3, #10485760 @ 0xa00000 │ │ it le │ │ movle.w r3, #10485760 @ 0xa00000 │ │ - blx a558c │ │ + blx a5598 │ │ mov r9, r0 │ │ adds r0, #1 │ │ cmp r0, #2 │ │ - bcs.w 62740 │ │ + bcs.w 62828 │ │ ldr r0, [sp, #352] @ 0x160 │ │ mov r1, r8 │ │ mov r2, r5 │ │ mov.w r3, #384 @ 0x180 │ │ - blx a30cc │ │ + blx a30d8 │ │ cmp r0, #0 │ │ - beq.w 625b6 │ │ + beq.w 6269e │ │ ldr r0, [sp, #352] @ 0x160 │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ mov.w r2, #20971520 @ 0x1400000 │ │ mov.w r3, #5242880 @ 0x500000 │ │ strd r3, r2, [sp] │ │ add.w r3, r4, r6, lsl #1 │ │ str r1, [sp, #8] │ │ mov.w r1, #1048576 @ 0x100000 │ │ movs r2, #0 │ │ cmp.w r3, #10485760 @ 0xa00000 │ │ it le │ │ movle.w r3, #10485760 @ 0xa00000 │ │ - blx a558c │ │ + blx a5598 │ │ mov r9, r0 │ │ adds r0, #1 │ │ cmp r0, #2 │ │ - bcs.w 62740 │ │ + bcs.w 62828 │ │ ldr r0, [sp, #352] @ 0x160 │ │ mov r1, r8 │ │ mov r2, r5 │ │ mov.w r3, #384 @ 0x180 │ │ - blx a30cc │ │ + blx a30d8 │ │ cmp r0, #0 │ │ - beq.w 625b6 │ │ + beq.w 6269e │ │ ldr r0, [sp, #352] @ 0x160 │ │ mov.w r2, #20971520 @ 0x1400000 │ │ mov.w r3, #5242880 @ 0x500000 │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ strd r3, r2, [sp] │ │ add.w r2, r6, r6, lsl #1 │ │ str r1, [sp, #8] │ │ adds r3, r2, r4 │ │ str r2, [sp, #216] @ 0xd8 │ │ mov.w r1, #1048576 @ 0x100000 │ │ movs r2, #0 │ │ cmp.w r3, #10485760 @ 0xa00000 │ │ it le │ │ movle.w r3, #10485760 @ 0xa00000 │ │ - blx a558c │ │ + blx a5598 │ │ mov r9, r0 │ │ adds r0, #1 │ │ cmp r0, #2 │ │ - bcs.w 62740 │ │ + bcs.w 62828 │ │ ldr r0, [sp, #352] @ 0x160 │ │ mov r1, r8 │ │ mov r2, r5 │ │ mov.w r3, #384 @ 0x180 │ │ - blx a30cc │ │ + blx a30d8 │ │ cmp r0, #0 │ │ - beq.w 625b6 │ │ + beq.w 6269e │ │ ldr r0, [sp, #352] @ 0x160 │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ mov.w r2, #20971520 @ 0x1400000 │ │ mov.w r3, #5242880 @ 0x500000 │ │ strd r3, r2, [sp] │ │ add.w r3, r4, r6, lsl #2 │ │ str r1, [sp, #8] │ │ mov.w r1, #1048576 @ 0x100000 │ │ movs r2, #0 │ │ cmp.w r3, #10485760 @ 0xa00000 │ │ it le │ │ movle.w r3, #10485760 @ 0xa00000 │ │ - blx a558c │ │ + blx a5598 │ │ mov r9, r0 │ │ adds r0, #1 │ │ cmp r0, #2 │ │ - bcs.w 62740 │ │ + bcs.w 62828 │ │ ldr r0, [sp, #352] @ 0x160 │ │ mov r1, r8 │ │ mov r2, r5 │ │ mov.w r3, #384 @ 0x180 │ │ - blx a30cc │ │ + blx a30d8 │ │ cmp r0, #0 │ │ - beq.w 625b6 │ │ + beq.w 6269e │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ ldr r0, [sp, #352] @ 0x160 │ │ str r1, [sp, #8] │ │ mov.w r2, #20971520 @ 0x1400000 │ │ mov.w r3, #5242880 @ 0x500000 │ │ add.w r1, r6, r6, lsl #2 │ │ strd r3, r2, [sp] │ │ adds r3, r1, r4 │ │ mov.w r1, #1048576 @ 0x100000 │ │ movs r2, #0 │ │ cmp.w r3, #10485760 @ 0xa00000 │ │ it le │ │ movle.w r3, #10485760 @ 0xa00000 │ │ - blx a558c │ │ + blx a5598 │ │ mov r9, r0 │ │ adds r0, #1 │ │ cmp r0, #2 │ │ - bcs.w 62740 │ │ + bcs.w 62828 │ │ ldr r0, [sp, #352] @ 0x160 │ │ mov r1, r8 │ │ mov r2, r5 │ │ mov.w r3, #384 @ 0x180 │ │ - blx a30cc │ │ + blx a30d8 │ │ cmp r0, #0 │ │ - beq.n 625b6 │ │ + beq.n 6269e │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ ldr r0, [sp, #352] @ 0x160 │ │ str r1, [sp, #8] │ │ mov.w r2, #20971520 @ 0x1400000 │ │ ldr r1, [sp, #216] @ 0xd8 │ │ mov.w r3, #5242880 @ 0x500000 │ │ strd r3, r2, [sp] │ │ movs r2, #0 │ │ add.w r3, r4, r1, lsl #1 │ │ mov.w r1, #1048576 @ 0x100000 │ │ cmp.w r3, #10485760 @ 0xa00000 │ │ it le │ │ movle.w r3, #10485760 @ 0xa00000 │ │ - blx a558c │ │ + blx a5598 │ │ mov r9, r0 │ │ adds r0, #1 │ │ cmp r0, #2 │ │ - bcs.w 62740 │ │ + bcs.w 62828 │ │ ldr r0, [sp, #352] @ 0x160 │ │ mov r1, r8 │ │ mov r2, r5 │ │ mov.w r3, #384 @ 0x180 │ │ - blx a30cc │ │ + blx a30d8 │ │ cmp r0, #0 │ │ - beq.n 625b6 │ │ + beq.n 6269e │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ ldr r0, [sp, #352] @ 0x160 │ │ str r1, [sp, #8] │ │ mov.w r2, #20971520 @ 0x1400000 │ │ mov.w r3, #5242880 @ 0x500000 │ │ rsb r1, r6, r6, lsl #3 │ │ strd r3, r2, [sp] │ │ adds r3, r1, r4 │ │ mov.w r1, #1048576 @ 0x100000 │ │ movs r2, #0 │ │ cmp.w r3, #10485760 @ 0xa00000 │ │ it le │ │ movle.w r3, #10485760 @ 0xa00000 │ │ - blx a558c │ │ + blx a5598 │ │ mov r9, r0 │ │ adds r0, #1 │ │ cmp r0, #2 │ │ - bcs.w 62740 │ │ + bcs.w 62828 │ │ ldr r0, [sp, #352] @ 0x160 │ │ mov r1, r8 │ │ mov r2, r5 │ │ mov.w r3, #384 @ 0x180 │ │ - blx a30cc │ │ - cbz r0, 625b6 │ │ + blx a30d8 │ │ + cbz r0, 6269e │ │ ldr r0, [sp, #352] @ 0x160 │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ mov.w r2, #20971520 @ 0x1400000 │ │ mov.w r3, #5242880 @ 0x500000 │ │ strd r3, r2, [sp] │ │ add.w r3, r4, r6, lsl #3 │ │ str r1, [sp, #8] │ │ mov.w r1, #1048576 @ 0x100000 │ │ movs r2, #0 │ │ cmp.w r3, #10485760 @ 0xa00000 │ │ it le │ │ movle.w r3, #10485760 @ 0xa00000 │ │ - blx a558c │ │ + blx a5598 │ │ mov r9, r0 │ │ adds r0, #1 │ │ cmp r0, #2 │ │ - bcs.w 62740 │ │ + bcs.w 62828 │ │ ldr r0, [sp, #352] @ 0x160 │ │ mov r1, r8 │ │ mov r2, r5 │ │ mov.w r3, #384 @ 0x180 │ │ - blx a30cc │ │ + blx a30d8 │ │ mov r9, r0 │ │ cmp r0, #0 │ │ - bgt.w 64ba2 │ │ + bgt.w 64c8a │ │ movw r0, #34744 @ 0x87b8 │ │ movt r0, #65535 @ 0xffff │ │ cmp r9, r0 │ │ - beq.w 6274c │ │ + beq.w 62834 │ │ cmp.w r9, #0 │ │ - bne.w 64d3a │ │ + bne.w 64e22 │ │ movs r6, #17 │ │ ldr r5, [sp, #352] @ 0x160 │ │ movt r6, #32768 @ 0x8000 │ │ movs r4, #1 │ │ mov r7, r6 │ │ movs r0, #0 │ │ cmp.w sl, #0 │ │ strb.w r0, [r8] │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w sl, [sp, #1152] @ 0x480 │ │ cmp r4, #0 │ │ - beq.w 627f6 │ │ + beq.w 628de │ │ add r0, sp, #896 @ 0x380 │ │ mov r1, r5 │ │ movs r2, #1 │ │ - bl 65258 │ │ + bl 65340 │ │ ldrd r0, r4, [sp, #896] @ 0x380 │ │ cmp r0, r6 │ │ - bne.w 62808 │ │ + bne.w 628f0 │ │ str r5, [sp, #216] @ 0xd8 │ │ movs r0, #0 │ │ - ldr r2, [pc, #932] @ (6299c ) │ │ + ldr r2, [pc, #932] @ (62a84 ) │ │ mov r1, r4 │ │ strd r0, r0, [sp] │ │ movs r3, #5 │ │ str r0, [sp, #8] │ │ add r2, pc │ │ add r0, sp, #896 @ 0x380 │ │ - bl 6531c │ │ + bl 65404 │ │ ldrd r5, r8, [sp, #896] @ 0x380 │ │ ldrb.w r2, [sp, #904] @ 0x388 │ │ cmp r5, r6 │ │ - bne.w 62828 │ │ + bne.w 62910 │ │ movs r0, #0 │ │ str r2, [sp, #208] @ 0xd0 │ │ - blx 9c0d4 │ │ + blx 9c0e0 │ │ mov r1, r0 │ │ add r0, sp, #896 @ 0x380 │ │ mov r2, r4 │ │ mov r3, r8 │ │ - bl 49f18 │ │ + bl 4a220 │ │ ldrd r5, r7, [sp, #896] @ 0x380 │ │ cmp r5, r6 │ │ - bne.w 62840 │ │ + bne.w 62928 │ │ str r4, [sp, #204] @ 0xcc │ │ - ldr r4, [pc, #868] @ (629a0 ) │ │ + ldr r4, [pc, #868] @ (62a88 ) │ │ add r4, pc │ │ ldr r0, [r4, #48] @ 0x30 │ │ dmb ish │ │ cmp r0, #2 │ │ - bne.w 64c36 │ │ + bne.w 64d1e │ │ ldrd r3, r0, [r4, #56] @ 0x38 │ │ movs r1, #0 │ │ movs r2, #16 │ │ str.w r8, [sp, #196] @ 0xc4 │ │ strd r0, r1, [sp] │ │ add r0, sp, #896 @ 0x380 │ │ mov r1, r7 │ │ - bl 49e28 │ │ + bl 4a130 │ │ ldrd r0, r5, [sp, #896] @ 0x380 │ │ str r7, [sp, #212] @ 0xd4 │ │ cmp r0, #1 │ │ - bne.w 6284c │ │ + bne.w 62934 │ │ ldr.w r8, [sp, #904] @ 0x388 │ │ movs r0, #17 │ │ ldr r6, [sp, #908] @ 0x38c │ │ movt r0, #32768 @ 0x8000 │ │ ldr.w r9, [sp, #912] @ 0x390 │ │ cmp r5, r0 │ │ - bne.w 62920 │ │ - b.n 62c8c │ │ + bne.w 62a08 │ │ + b.n 62d74 │ │ movs r0, #23 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 64dba │ │ - ldr r1, [pc, #784] @ (629a4 ) │ │ + beq.w 64ea2 │ │ + ldr r1, [pc, #784] @ (62a8c ) │ │ movs r2, #23 │ │ mov r4, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ cmp r7, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ sub.w r7, r9, #7 │ │ movs r5, #23 │ │ mov.w r9, #23 │ │ movs r0, #16 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - bne.n 6276e │ │ - b.n 62800 │ │ + bne.n 62856 │ │ + b.n 628e8 │ │ movw r0, #34744 @ 0x87b8 │ │ movt r0, #65535 @ 0xffff │ │ cmp r9, r0 │ │ - beq.n 6274c │ │ + beq.n 62834 │ │ mov r0, r9 │ │ - blx a96f8 │ │ + blx a9704 │ │ mov r4, r0 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #896 @ 0x380 │ │ mov r1, r4 │ │ - bl 402e0 │ │ + bl 405e8 │ │ add r7, sp, #896 @ 0x380 │ │ ldmia r7, {r0, r1, r7} │ │ - ldr r4, [pc, #708] @ (629a8 ) │ │ + ldr r4, [pc, #708] @ (62a90 ) │ │ cmp r0, #0 │ │ add r4, pc │ │ ite eq │ │ moveq r4, r1 │ │ movne r7, #27 │ │ cmp.w r7, #4294967295 @ 0xffffffff │ │ - ble.n 627f2 │ │ + ble.n 628da │ │ cmp r7, #0 │ │ - beq.w 64d84 │ │ + beq.w 64e6c │ │ mov r0, r7 │ │ - blx d87f0 │ │ - b.w 64d7a │ │ + blx d8810 │ │ + b.w 64e62 │ │ movw r0, #34744 @ 0x87b8 │ │ movt r0, #65535 @ 0xffff │ │ cmp r9, r0 │ │ - beq.n 6274c │ │ + beq.n 62834 │ │ mov r0, r9 │ │ - blx a96f8 │ │ + blx a9704 │ │ mov r4, r0 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #896 @ 0x380 │ │ mov r1, r4 │ │ - bl 402e0 │ │ + bl 405e8 │ │ add r7, sp, #896 @ 0x380 │ │ ldmia r7, {r0, r1, r7} │ │ - ldr r4, [pc, #640] @ (629ac ) │ │ + ldr r4, [pc, #640] @ (62a94 ) │ │ cmp r0, #0 │ │ add r4, pc │ │ ite eq │ │ moveq r4, r1 │ │ movne r7, #27 │ │ cmp.w r7, #4294967295 @ 0xffffffff │ │ - ble.n 627f2 │ │ - b.w 64d70 │ │ + ble.n 628da │ │ + b.w 64e58 │ │ movw r0, #34744 @ 0x87b8 │ │ movt r0, #65535 @ 0xffff │ │ cmp r9, r0 │ │ - bne.n 627c4 │ │ + bne.n 628ac │ │ movs r0, #0 │ │ cmp.w sl, #0 │ │ strb.w r0, [r8] │ │ - beq.n 6275e │ │ + beq.n 62846 │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r4, r7 │ │ ldr.w sl, [sp, #1152] @ 0x480 │ │ movs r0, #16 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 62800 │ │ + beq.n 628e8 │ │ movs r1, #17 │ │ ldr r3, [sp, #236] @ 0xec │ │ movt r1, #32768 @ 0x8000 │ │ movs r2, #3 │ │ subs r1, #15 │ │ strd r7, r5, [r0] │ │ str r0, [r3, #8] │ │ strd r2, r1, [r3] │ │ strd r4, r9, [r0, #8] │ │ ldr r6, [sp, #240] @ 0xf0 │ │ ldr r0, [sp, #244] @ 0xf4 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #248] @ 0xf8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ cmp.w fp, #0 │ │ - beq.n 627ac │ │ + beq.n 62894 │ │ mov r4, r6 │ │ mov r0, r4 │ │ - bl 5becc │ │ + bl 5c0dc │ │ adds r4, #52 @ 0x34 │ │ subs.w fp, fp, #1 │ │ - bne.n 6279e │ │ + bne.n 62886 │ │ ldr.w r0, [sl] │ │ cmp r0, #0 │ │ - beq.w 64c04 │ │ + beq.w 64cec │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ addw sp, sp, #1100 @ 0x44c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r0, r9 │ │ - blx a96f8 │ │ + blx a9704 │ │ mov r4, r0 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #896 @ 0x380 │ │ mov r1, r4 │ │ - bl 402e0 │ │ + bl 405e8 │ │ add r7, sp, #896 @ 0x380 │ │ ldmia r7, {r0, r1, r7} │ │ - ldr r4, [pc, #464] @ (629b0 ) │ │ + ldr r4, [pc, #464] @ (62a98 ) │ │ cmp r0, #0 │ │ add r4, pc │ │ ite eq │ │ moveq r4, r1 │ │ movne r7, #27 │ │ cmp.w r7, #4294967295 @ 0xffffffff │ │ - bgt.w 64d70 │ │ - bl 3e03c │ │ + bgt.w 64e58 │ │ + bl 3e344 │ │ movs r0, #16 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - bne.n 6276e │ │ + bne.n 62856 │ │ movs r0, #4 │ │ movs r1, #16 │ │ - bl 3de2a │ │ + bl 3e132 │ │ ldr r7, [sp, #236] @ 0xec │ │ ldr r6, [sp, #240] @ 0xf0 │ │ ldr.w r3, [sp, #905] @ 0x389 │ │ ldr r1, [sp, #908] @ 0x38c │ │ ldrb.w r2, [sp, #904] @ 0x388 │ │ str.w r3, [r7, #13] │ │ str r1, [r7, #16] │ │ movs r1, #3 │ │ strb r2, [r7, #12] │ │ strd r1, r0, [r7] │ │ str r4, [r7, #8] │ │ - b.n 6295c │ │ + b.n 62a44 │ │ ldrb.w r0, [sp, #907] @ 0x38b │ │ mov.w sl, r8, lsr #8 │ │ ldrh.w r1, [sp, #905] @ 0x389 │ │ mov r6, r2 │ │ ldr.w r9, [sp, #908] @ 0x38c │ │ orr.w r0, r1, r0, lsl #16 │ │ - b.n 6292e │ │ + b.n 62a16 │ │ ldrd r6, r9, [sp, #904] @ 0x388 │ │ mov.w sl, r7, lsr #8 │ │ mov r8, r7 │ │ - b.n 6292c │ │ + b.n 62a14 │ │ cmp r5, #0 │ │ - beq.w 62c8c │ │ + beq.w 62d74 │ │ ldr r0, [sp, #912] @ 0x390 │ │ cmp r0, #8 │ │ - bne.w 64ff0 │ │ + bne.w 650d8 │ │ ldr r0, [sp, #908] @ 0x38c │ │ mov r1, r7 │ │ ldr r6, [r0, #0] │ │ add r0, sp, #896 @ 0x380 │ │ - bl 4ba20 │ │ + bl 4bd28 │ │ ldr r5, [sp, #896] @ 0x380 │ │ movw r9, #17 │ │ movt r9, #32768 @ 0x8000 │ │ cmp r5, r9 │ │ - bne.n 62918 │ │ + bne.n 62a00 │ │ str r6, [sp, #192] @ 0xc0 │ │ ldr r0, [r4, #28] │ │ dmb ish │ │ cmp r0, #2 │ │ - bne.w 64e6c │ │ + bne.w 64f54 │ │ ldrd r3, r0, [r4, #36] @ 0x24 │ │ add.w r8, sp, #896 @ 0x380 │ │ movs r1, #0 │ │ movs r2, #16 │ │ strd r0, r1, [sp] │ │ mov r0, r8 │ │ mov r1, r7 │ │ - bl 49e28 │ │ + bl 4a130 │ │ ldrd r0, r5, [sp, #896] @ 0x380 │ │ cmp r0, #1 │ │ - beq.w 6266c │ │ + beq.w 62754 │ │ cmp r5, #0 │ │ - beq.w 62a40 │ │ + beq.w 62b28 │ │ ldrd r0, r1, [sp, #908] @ 0x38c │ │ add r2, sp, #908 @ 0x38c │ │ movs r3, #0 │ │ stmia r2!, {r0, r1, r3} │ │ mov.w r2, #128 @ 0x80 │ │ strb.w r2, [sp, #920] @ 0x398 │ │ mov.w r2, #1 │ │ str r3, [sp, #904] @ 0x388 │ │ strd r3, r2, [sp, #896] @ 0x380 │ │ - cbz r1, 628ee │ │ + cbz r1, 629d6 │ │ movw sl, #19 │ │ movt sl, #128 @ 0x80 │ │ ldrb r7, [r0, r3] │ │ sub.w r6, r7, #9 │ │ cmp r6, #23 │ │ - bhi.n 6296c │ │ + bhi.n 62a54 │ │ lsl.w r6, r2, r6 │ │ tst.w r6, sl │ │ - beq.n 6296c │ │ + beq.n 62a54 │ │ adds r3, #1 │ │ str r3, [sp, #916] @ 0x394 │ │ cmp r1, r3 │ │ - bne.n 628d0 │ │ + bne.n 629b8 │ │ adds r2, r1, #1 │ │ movs r3, #5 │ │ cmp r2, r1 │ │ str r3, [sp, #352] @ 0x160 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #352 @ 0x160 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ str.w r0, [sp, #1028] @ 0x404 │ │ str.w r1, [sp, #1024] @ 0x400 │ │ - b.n 62bd6 │ │ + b.n 62cbe │ │ ldrd r8, r6, [sp, #900] @ 0x384 │ │ ldr.w r9, [sp, #908] @ 0x38c │ │ mov.w sl, r8, lsr #8 │ │ ldr r0, [sp, #212] @ 0xd4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ ldr r4, [sp, #204] @ 0xcc │ │ lsrs r0, r6, #8 │ │ ldr r3, [sp, #236] @ 0xec │ │ uxtb r1, r6 │ │ orr.w r0, r1, r0, lsl #8 │ │ uxtb.w r1, r8 │ │ movs r2, #3 │ │ orr.w r1, r1, sl, lsl #8 │ │ strd r2, r5, [r3] │ │ ldr.w sl, [sp, #1152] @ 0x480 │ │ ldr r6, [sp, #240] @ 0xf0 │ │ ldr r5, [sp, #216] @ 0xd8 │ │ strd r1, r0, [r3, #8] │ │ str.w r9, [r3, #16] │ │ - cbz r4, 6295c │ │ + cbz r4, 62a44 │ │ mov r0, r4 │ │ - blx 9bb60 │ │ + blx 9bb6c │ │ cmp r5, #0 │ │ - beq.w 6278a │ │ + beq.w 62872 │ │ mov r0, r5 │ │ movs r1, #0 │ │ - blx a46fc │ │ - b.n 6278a │ │ + blx a4708 │ │ + b.n 62872 │ │ cmp r7, #91 @ 0x5b │ │ - beq.n 62a64 │ │ + beq.n 62b4c │ │ cmp r7, #123 @ 0x7b │ │ - bne.w 64f56 │ │ + bne.w 6503e │ │ adds r0, r3, #1 │ │ str r0, [sp, #916] @ 0x394 │ │ movs r0, #127 @ 0x7f │ │ str.w r8, [sp, #1072] @ 0x430 │ │ strb.w r0, [sp, #920] @ 0x398 │ │ movs r0, #1 │ │ strb.w r0, [sp, #1076] @ 0x434 │ │ add.w r6, sp, #1072 @ 0x430 │ │ - ldr r7, [pc, #36] @ (629b4 ) │ │ + ldr r7, [pc, #36] @ (62a9c ) │ │ mov.w r8, #2147483648 @ 0x80000000 │ │ movs r5, #0 │ │ add r7, pc │ │ - b.n 629c2 │ │ + b.n 62aaa │ │ nop │ │ - cmp fp, fp │ │ - vtbl.8 d27, {d27}, d2 │ │ + add fp, lr │ │ + vcvt.u32.f32 d27, d26 │ │ movs r7, r0 │ │ - add r6, r5 │ │ - vrsra.u64 d20, d31, #5 │ │ - vrsra.u32 q10, , #5 │ │ - vcvtp.u32.f32 q10, │ │ - vtbl.8 d19, {d11-d12}, d15 │ │ + muls r6, r0 │ │ + vrshr.u64 q10, , #5 │ │ + vcvtp.u32.f32 d20, d15 │ │ + vsra.u64 q10, , #5 │ │ + vtbl.8 d19, {d11}, d23 │ │ vcvt.f32.s32 d20, d16 │ │ - bl 5ed3c │ │ + bl 5edd8 │ │ cmp r0, #0 │ │ - bne.n 62ab4 │ │ + bne.n 62b9c │ │ add r0, sp, #352 @ 0x160 │ │ mov r1, r6 │ │ - bl 5ebfc │ │ + bl 34854 │ │ ldrb.w r0, [sp, #352] @ 0x160 │ │ cmp r0, #1 │ │ - beq.n 62ab8 │ │ + beq.n 62ba0 │ │ ldrb.w r0, [sp, #353] @ 0x161 │ │ cmp r0, #1 │ │ - bne.w 62aea │ │ + bne.w 62bd2 │ │ ldr.w r4, [sp, #1072] @ 0x430 │ │ add.w r1, r4, #12 │ │ ldr r0, [r4, #20] │ │ mov r2, r4 │ │ str r5, [r4, #8] │ │ adds r0, #1 │ │ str r0, [r4, #20] │ │ add r0, sp, #352 @ 0x160 │ │ - bl 767d4 │ │ + bl 7683c │ │ ldrd r1, r0, [sp, #352] @ 0x160 │ │ cmp r1, #2 │ │ - beq.n 62ab4 │ │ + beq.n 62b9c │ │ ldr r1, [sp, #360] @ 0x168 │ │ cmp r1, #11 │ │ - bne.n 629b8 │ │ + bne.n 62aa0 │ │ mov r1, r7 │ │ movs r2, #11 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.n 629b8 │ │ + bne.n 62aa0 │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ - bne.w 64fac │ │ + bne.w 65094 │ │ mov r0, r4 │ │ - bl 5f174 │ │ + bl 5f264 │ │ cmp r0, #0 │ │ str r0, [sp, #200] @ 0xc8 │ │ - bne.w 64e1a │ │ + bne.w 64f02 │ │ add r0, sp, #352 @ 0x160 │ │ mov r1, r4 │ │ - bl 5bfe8 │ │ + bl 5c1f8 │ │ ldrd r8, r0, [sp, #352] @ 0x160 │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ str r0, [sp, #200] @ 0xc8 │ │ - beq.w 64e1a │ │ + beq.w 64f02 │ │ ldr.w r9, [sp, #360] @ 0x168 │ │ - b.n 629c2 │ │ + b.n 62aaa │ │ movs r0, #0 │ │ movs r1, #4 │ │ strd r0, r1, [sp, #896] @ 0x380 │ │ add r1, sp, #896 @ 0x380 │ │ str r0, [sp, #904] @ 0x388 │ │ add r0, sp, #768 @ 0x300 │ │ - bl 5b0d0 │ │ + bl 5b2e0 │ │ ldr r5, [sp, #768] @ 0x300 │ │ cmp r5, r9 │ │ - beq.w 62c30 │ │ + beq.w 62d18 │ │ ldrd r8, r6, [sp, #772] @ 0x304 │ │ ldr.w r9, [sp, #780] @ 0x30c │ │ - b.n 62920 │ │ + b.n 62a08 │ │ adds r0, r3, #1 │ │ str r0, [sp, #916] @ 0x394 │ │ movs r0, #127 @ 0x7f │ │ add r6, sp, #352 @ 0x160 │ │ strb.w r0, [sp, #920] @ 0x398 │ │ movs r0, #1 │ │ add r1, sp, #296 @ 0x128 │ │ strb.w r0, [sp, #300] @ 0x12c │ │ mov r0, r6 │ │ str.w r8, [sp, #296] @ 0x128 │ │ - bl 5c49e │ │ + bl 5c67a │ │ ldrb.w r0, [sp, #352] @ 0x160 │ │ cmp r0, #1 │ │ - bne.n 62a90 │ │ + bne.n 62b78 │ │ ldr r0, [sp, #356] @ 0x164 │ │ str r0, [sp, #200] @ 0xc8 │ │ - b.n 62aae │ │ + b.n 62b96 │ │ ldrb.w r0, [sp, #353] @ 0x161 │ │ cmp r0, #1 │ │ - bne.w 64c0c │ │ + bne.w 64cf4 │ │ ldr r1, [sp, #296] @ 0x128 │ │ add r0, sp, #352 @ 0x160 │ │ - bl 5bfe8 │ │ + bl 5c1f8 │ │ ldrd r8, r0, [sp, #352] @ 0x160 │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ str r0, [sp, #200] @ 0xc8 │ │ - bne.n 62b36 │ │ + bne.n 62c1e │ │ mov.w r8, #2147483648 @ 0x80000000 │ │ - b.n 62b3a │ │ + b.n 62c22 │ │ mov r6, r0 │ │ - b.n 62aba │ │ + b.n 62ba2 │ │ ldr r6, [sp, #356] @ 0x164 │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ - beq.n 62ae2 │ │ + beq.n 62bca │ │ cmp.w r9, #0 │ │ - beq.n 62ad6 │ │ + beq.n 62bbe │ │ ldr r4, [sp, #200] @ 0xc8 │ │ mov r0, r4 │ │ - bl 5becc │ │ + bl 5c0dc │ │ adds r4, #52 @ 0x34 │ │ subs.w r9, r9, #1 │ │ - bne.n 62ac8 │ │ + bne.n 62bb0 │ │ cmp.w r8, #0 │ │ itt ne │ │ ldrne r0, [sp, #200] @ 0xc8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov.w r8, #2147483648 @ 0x80000000 │ │ str r6, [sp, #200] @ 0xc8 │ │ - b.n 62af2 │ │ + b.n 62bda │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ - beq.w 64f80 │ │ + beq.w 65068 │ │ ldrb.w r0, [sp, #920] @ 0x398 │ │ adds r0, #1 │ │ strb.w r0, [sp, #920] @ 0x398 │ │ add r0, sp, #896 @ 0x380 │ │ - bl 5f20c │ │ + bl 5f2fc │ │ mov r4, r0 │ │ strd r9, r0, [sp, #360] @ 0x168 │ │ ldr r0, [sp, #200] @ 0xc8 │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ strd r8, r0, [sp, #352] @ 0x160 │ │ - bne.n 62b1c │ │ - cbz r4, 62b66 │ │ + bne.n 62c04 │ │ + cbz r4, 62c4e │ │ add r0, sp, #352 @ 0x160 │ │ adds r0, #12 │ │ - b.n 62b62 │ │ - cbz r4, 62b96 │ │ + b.n 62c4a │ │ + cbz r4, 62c7e │ │ cmp.w r9, #0 │ │ - beq.n 62b84 │ │ + beq.n 62c6c │ │ ldr r6, [sp, #200] @ 0xc8 │ │ mov r0, r6 │ │ - bl 5becc │ │ + bl 5c0dc │ │ adds r6, #52 @ 0x34 │ │ subs.w r9, r9, #1 │ │ - bne.n 62b26 │ │ - b.n 62b84 │ │ + bne.n 62c0e │ │ + b.n 62c6c │ │ ldr.w r9, [sp, #360] @ 0x168 │ │ ldrb.w r0, [sp, #920] @ 0x398 │ │ adds r0, #1 │ │ strb.w r0, [sp, #920] @ 0x398 │ │ add r0, sp, #896 @ 0x380 │ │ - bl 5cf84 │ │ + bl 5d160 │ │ mov r4, r0 │ │ strd r9, r0, [sp, #360] @ 0x168 │ │ ldr r0, [sp, #200] @ 0xc8 │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ strd r8, r0, [sp, #352] @ 0x160 │ │ - bne.n 62b6c │ │ - cbz r4, 62b66 │ │ + bne.n 62c54 │ │ + cbz r4, 62c4e │ │ add.w r0, r6, #12 │ │ - bl 57fd0 │ │ + bl 581e0 │ │ mov.w r8, #2147483648 @ 0x80000000 │ │ - b.n 62b96 │ │ - cbz r4, 62b96 │ │ + b.n 62c7e │ │ + cbz r4, 62c7e │ │ cmp.w r9, #0 │ │ - beq.n 62b84 │ │ + beq.n 62c6c │ │ ldr r6, [sp, #200] @ 0xc8 │ │ mov r0, r6 │ │ - bl 5becc │ │ + bl 5c0dc │ │ adds r6, #52 @ 0x34 │ │ subs.w r9, r9, #1 │ │ - bne.n 62b76 │ │ + bne.n 62c5e │ │ cmp.w r8, #0 │ │ itt ne │ │ ldrne r0, [sp, #200] @ 0xc8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov.w r8, #2147483648 @ 0x80000000 │ │ str r4, [sp, #200] @ 0xc8 │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ - beq.w 64f4a │ │ + beq.w 65032 │ │ ldrd r1, r2, [sp, #912] @ 0x390 │ │ ldr r0, [sp, #200] @ 0xc8 │ │ cmp r2, r1 │ │ str.w r9, [sp, #1032] @ 0x408 │ │ str.w r0, [sp, #1028] @ 0x404 │ │ str.w r8, [sp, #1024] @ 0x400 │ │ - bcs.n 62bd6 │ │ + bcs.n 62cbe │ │ ldr r0, [sp, #908] @ 0x38c │ │ movs r3, #1 │ │ ldrb r7, [r0, r2] │ │ subs r7, #9 │ │ cmp r7, #23 │ │ - bhi.w 64cce │ │ + bhi.w 64db6 │ │ lsl.w r7, r3, r7 │ │ tst.w r7, sl │ │ - beq.w 64cce │ │ + beq.w 64db6 │ │ adds r2, #1 │ │ str r2, [sp, #916] @ 0x394 │ │ cmp r1, r2 │ │ - bne.n 62bb8 │ │ + bne.n 62ca0 │ │ ldr r0, [sp, #896] @ 0x380 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #900] @ 0x384 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [sp, #1024] @ 0x400 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.n 62c1e │ │ + bne.n 62d06 │ │ movs r0, #33 @ 0x21 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 65008 │ │ - ldr r1, [pc, #716] @ (62ec8 ) │ │ + beq.w 650f0 │ │ + ldr r1, [pc, #716] @ (62fb0 ) │ │ movs r2, #33 @ 0x21 │ │ mov r6, r0 │ │ mov.w r9, #33 @ 0x21 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ add.w r0, sp, #1024 @ 0x400 │ │ - bl 65514 │ │ + bl 655fc │ │ movs r0, #17 │ │ mov.w r8, #33 @ 0x21 │ │ movt r0, #32768 @ 0x8000 │ │ subs r5, r0, #3 │ │ - b.n 62920 │ │ + b.n 62a08 │ │ add.w r2, sp, #1024 @ 0x400 │ │ movw r9, #17 │ │ movt r9, #32768 @ 0x8000 │ │ add r3, sp, #772 @ 0x304 │ │ ldmia r2, {r0, r1, r2} │ │ stmia r3!, {r0, r1, r2} │ │ ldrd r1, r0, [sp, #772] @ 0x304 │ │ str r1, [sp, #188] @ 0xbc │ │ strd r1, r0, [sp, #848] @ 0x350 │ │ ldr r1, [sp, #212] @ 0xd4 │ │ str r0, [sp, #200] @ 0xc8 │ │ add r0, sp, #896 @ 0x380 │ │ ldr.w sl, [sp, #780] @ 0x30c │ │ str.w sl, [sp, #856] @ 0x358 │ │ - bl 4ba20 │ │ + bl 4bd28 │ │ ldr r5, [sp, #896] @ 0x380 │ │ cmp r5, r9 │ │ - bne.w 62e98 │ │ + bne.w 62f80 │ │ ldr r4, [sp, #192] @ 0xc0 │ │ cmp.w sl, #0 │ │ - beq.n 62c84 │ │ + beq.n 62d6c │ │ movs r0, #52 @ 0x34 │ │ ldr r6, [sp, #200] @ 0xc8 │ │ mul.w r7, sl, r0 │ │ add.w r8, sp, #896 @ 0x380 │ │ ldr r1, [sp, #212] @ 0xd4 │ │ mov r0, r8 │ │ mov r2, r6 │ │ strb.w r4, [r6, #49] @ 0x31 │ │ - bl 6558c │ │ + bl 65674 │ │ ldr r5, [sp, #896] @ 0x380 │ │ cmp r5, r9 │ │ - bne.w 62e98 │ │ + bne.w 62f80 │ │ adds r6, #52 @ 0x34 │ │ subs r7, #52 @ 0x34 │ │ - bne.n 62c68 │ │ + bne.n 62d50 │ │ add r0, sp, #848 @ 0x350 │ │ - bl 663ec │ │ + bl 664d4 │ │ ldr r7, [sp, #212] @ 0xd4 │ │ movs r0, #0 │ │ movs r1, #4 │ │ strd r0, r1, [sp, #352] @ 0x160 │ │ mov r1, r7 │ │ str r0, [sp, #360] @ 0x168 │ │ movs r2, #0 │ │ str r0, [sp, #4] │ │ add r0, sp, #896 @ 0x380 │ │ movs r3, #0 │ │ - bl 49e28 │ │ + bl 4a130 │ │ ldrd r2, r9, [sp, #908] @ 0x38c │ │ ldrd r0, r5, [sp, #896] @ 0x380 │ │ - cbz r0, 62cc4 │ │ + cbz r0, 62dac │ │ str r2, [sp, #200] @ 0xc8 │ │ ldr.w r8, [sp, #904] @ 0x388 │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r5, r0 │ │ - beq.n 62d32 │ │ + beq.n 62e1a │ │ mov.w sl, r8, lsr #8 │ │ - b.n 62d5c │ │ - cbz r5, 62d32 │ │ + b.n 62e44 │ │ + cbz r5, 62e1a │ │ add r0, sp, #896 @ 0x380 │ │ add r1, sp, #352 @ 0x160 │ │ mov r3, r9 │ │ - bl 6641c │ │ + bl 66504 │ │ ldrb.w r8, [sp, #900] @ 0x384 │ │ movs r0, #17 │ │ ldr r5, [sp, #896] @ 0x380 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r5, r0 │ │ - bne.n 62d48 │ │ + bne.n 62e30 │ │ movs.w r0, r8, lsl #31 │ │ - beq.n 62d32 │ │ + beq.n 62e1a │ │ add r4, sp, #896 @ 0x380 │ │ add r6, sp, #352 @ 0x160 │ │ mov.w sl, #0 │ │ ldr r1, [sp, #212] @ 0xd4 │ │ mov r0, r4 │ │ movs r2, #8 │ │ movs r3, #0 │ │ str.w sl, [sp, #4] │ │ - bl 49e28 │ │ + bl 4a130 │ │ ldr.w r9, [sp, #912] @ 0x390 │ │ ldrd r0, r5, [sp, #896] @ 0x380 │ │ ldr r1, [sp, #908] @ 0x38c │ │ cmp r0, #0 │ │ str r1, [sp, #200] @ 0xc8 │ │ - bne.n 62cb0 │ │ - cbz r5, 62d32 │ │ + bne.n 62d98 │ │ + cbz r5, 62e1a │ │ ldr r2, [sp, #200] @ 0xc8 │ │ mov r0, r4 │ │ mov r1, r6 │ │ mov r3, r9 │ │ - bl 6641c │ │ + bl 66504 │ │ ldrb.w r8, [sp, #900] @ 0x384 │ │ movs r0, #17 │ │ ldr r5, [sp, #896] @ 0x380 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r5, r0 │ │ - bne.n 62d48 │ │ + bne.n 62e30 │ │ movs.w r0, r8, lsl #31 │ │ - bne.n 62cee │ │ + bne.n 62dd6 │ │ ldrb.w r0, [sp, #355] @ 0x163 │ │ ldrh.w r1, [sp, #353] @ 0x161 │ │ ldrb.w r8, [sp, #352] @ 0x160 │ │ ldrd r6, r9, [sp, #356] @ 0x164 │ │ orr.w sl, r1, r0, lsl #16 │ │ - b.n 62d8a │ │ + b.n 62e72 │ │ ldrb.w r0, [sp, #903] @ 0x387 │ │ ldrh.w r1, [sp, #901] @ 0x385 │ │ ldr.w r9, [sp, #908] @ 0x38c │ │ orr.w sl, r1, r0, lsl #16 │ │ ldr r2, [sp, #904] @ 0x388 │ │ str r2, [sp, #200] @ 0xc8 │ │ ldrd r7, r4, [sp, #356] @ 0x164 │ │ - cbz r4, 62d70 │ │ + cbz r4, 62e58 │ │ mov r6, r7 │ │ mov r0, r6 │ │ - bl 5becc │ │ + bl 5c0dc │ │ adds r6, #52 @ 0x34 │ │ subs r4, #1 │ │ - bne.n 62d64 │ │ + bne.n 62e4c │ │ ldr r0, [sp, #352] @ 0x160 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r7 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r6, [sp, #200] @ 0xc8 │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r5, r0 │ │ - bne.w 62924 │ │ + bne.w 62a0c │ │ ldr r0, [sp, #212] @ 0xd4 │ │ str r6, [sp, #200] @ 0xc8 │ │ ldr.w r4, [sp, #1148] @ 0x47c │ │ ldr.w r6, [sp, #1144] @ 0x478 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ uxtb.w r0, r8 │ │ orr.w r5, r0, sl, lsl #8 │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ - bne.n 62db6 │ │ + bne.n 62e9e │ │ mov r9, r4 │ │ ldr r5, [sp, #196] @ 0xc4 │ │ ldr.w r8, [sp, #208] @ 0xd0 │ │ lsrs r0, r6, #8 │ │ ldr r4, [sp, #204] @ 0xcc │ │ - b.n 6292e │ │ + b.n 62a16 │ │ ldr r0, [sp, #200] @ 0xc8 │ │ ldr r1, [sp, #204] @ 0xcc │ │ str.w r9, [sp, #280] @ 0x118 │ │ strd r5, r0, [sp, #272] @ 0x110 │ │ ldr r0, [sp, #208] @ 0xd0 │ │ str r0, [sp, #260] @ 0x104 │ │ ldr r0, [sp, #196] @ 0xc4 │ │ str r0, [sp, #256] @ 0x100 │ │ add r0, sp, #896 @ 0x380 │ │ strd r6, r4, [sp, #264] @ 0x108 │ │ - bl 583dc │ │ + bl 585ec │ │ movs r4, #17 │ │ ldr r0, [sp, #896] @ 0x380 │ │ movt r4, #32768 @ 0x8000 │ │ cmp r0, r4 │ │ - bne.n 62e40 │ │ + bne.n 62f28 │ │ ldr r1, [sp, #216] @ 0xd8 │ │ add r0, sp, #896 @ 0x380 │ │ movs r2, #1 │ │ - bl 65258 │ │ + bl 65340 │ │ ldrd r0, sl, [sp, #896] @ 0x380 │ │ ldrb.w r1, [sp, #904] @ 0x388 │ │ cmp r0, r4 │ │ - bne.n 62e54 │ │ + bne.n 62f3c │ │ ldr r3, [sp, #240] @ 0xf0 │ │ add r0, sp, #896 @ 0x380 │ │ strb.w r1, [sp, #292] @ 0x124 │ │ add r1, sp, #256 @ 0x100 │ │ add r2, sp, #288 @ 0x120 │ │ str.w sl, [sp, #288] @ 0x120 │ │ str.w fp, [sp] │ │ - bl 665d8 │ │ + bl 666c0 │ │ ldr r0, [sp, #904] @ 0x388 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.n 62ecc │ │ + bne.n 62fb4 │ │ add r3, sp, #908 @ 0x38c │ │ ldr r6, [sp, #236] @ 0xec │ │ add.w ip, sp, #352 @ 0x160 │ │ movs r7, #3 │ │ ldmia r3, {r0, r1, r2, r3} │ │ cmp.w sl, #0 │ │ stmia.w ip, {r0, r1, r2, r3} │ │ strd r7, r0, [r6] │ │ add.w r0, r6, #8 │ │ stmia r0!, {r1, r2, r3} │ │ itt ne │ │ movne r0, sl │ │ - blxne 9bb60 │ │ - b.w 64f30 │ │ + blxne 9bb6c │ │ + b.w 65018 │ │ add r3, sp, #896 @ 0x380 │ │ ldr r6, [sp, #236] @ 0xec │ │ movs r7, #3 │ │ ldmia r3, {r0, r1, r2, r3} │ │ strd r7, r0, [r6] │ │ add.w r0, r6, #8 │ │ stmia r0!, {r1, r2, r3} │ │ - b.n 62e6e │ │ + b.n 62f56 │ │ ldr r7, [sp, #236] @ 0xec │ │ ldr r3, [sp, #908] @ 0x38c │ │ ldr.w r2, [sp, #905] @ 0x389 │ │ strb r1, [r7, #12] │ │ movs r1, #3 │ │ str r3, [r7, #16] │ │ str.w r2, [r7, #13] │ │ strd r1, r0, [r7] │ │ str.w sl, [r7, #8] │ │ ldr.w sl, [sp, #1152] @ 0x480 │ │ cmp.w r9, #0 │ │ ldr r6, [sp, #240] @ 0xf0 │ │ - beq.n 62e8a │ │ + beq.n 62f72 │ │ ldr r4, [sp, #200] @ 0xc8 │ │ mov r0, r4 │ │ - bl 5becc │ │ + bl 5c0dc │ │ adds r4, #52 @ 0x34 │ │ subs.w r9, r9, #1 │ │ - bne.n 62e7c │ │ + bne.n 62f64 │ │ cmp r5, #0 │ │ itt ne │ │ ldrne r0, [sp, #200] @ 0xc8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r5, [sp, #216] @ 0xd8 │ │ - b.n 6295c │ │ + b.n 62a44 │ │ ldr.w r8, [sp, #900] @ 0x384 │ │ cmp.w sl, #0 │ │ ldr r6, [sp, #904] @ 0x388 │ │ ldr.w r9, [sp, #908] @ 0x38c │ │ - beq.n 62eb8 │ │ + beq.n 62fa0 │ │ ldr r4, [sp, #200] @ 0xc8 │ │ mov r0, r4 │ │ - bl 5becc │ │ + bl 5c0dc │ │ adds r4, #52 @ 0x34 │ │ subs.w sl, sl, #1 │ │ - bne.n 62eaa │ │ + bne.n 62f92 │ │ ldr r0, [sp, #188] @ 0xbc │ │ cmp r0, #0 │ │ - beq.w 62920 │ │ + beq.w 62a08 │ │ ldr r0, [sp, #200] @ 0xc8 │ │ - blx d87c0 │ │ - b.n 62920 │ │ - subs r7, #186 @ 0xba │ │ + blx d87d0 │ │ + b.n 62a08 │ │ + subs r6, #210 @ 0xd2 │ │ @ instruction: 0xfffbe9dd │ │ rors r0, r4 │ │ add r7, sp, #908 @ 0x38c │ │ strd r4, r1, [sp, #296] @ 0x128 │ │ add r1, sp, #304 @ 0x130 │ │ ldmia r7, {r2, r3, r7} │ │ stmia r1!, {r0, r2, r3, r7} │ │ add r0, sp, #896 @ 0x380 │ │ mov r1, sl │ │ ldrd r6, r5, [sp, #920] @ 0x398 │ │ strd r2, r3, [sp, #352] @ 0x160 │ │ str r4, [sp, #152] @ 0x98 │ │ strd r6, r5, [sp, #320] @ 0x140 │ │ - bl 583dc │ │ + bl 585ec │ │ ldr r0, [sp, #896] @ 0x380 │ │ movs r1, #17 │ │ movt r1, #32768 @ 0x8000 │ │ cmp r0, r1 │ │ - bne.w 64a32 │ │ + bne.w 64b1a │ │ movs r1, #0 │ │ movs r0, #8 │ │ cmp.w fp, #0 │ │ str r1, [sp, #336] @ 0x150 │ │ strd r1, r0, [sp, #328] @ 0x148 │ │ - beq.w 64a4c │ │ + beq.w 64b34 │ │ add.w r0, sp, #1024 @ 0x400 │ │ mov sl, r1 │ │ add.w r3, r0, #9 │ │ movs r0, #52 @ 0x34 │ │ ldr r1, [sp, #240] @ 0xf0 │ │ mla r0, fp, r0, r1 │ │ add r2, sp, #896 @ 0x380 │ │ @@ -88807,30 +88772,30 @@ │ │ adds r0, #20 │ │ str r0, [sp, #128] @ 0x80 │ │ adds r0, r2, #4 │ │ str r0, [sp, #124] @ 0x7c │ │ ldr r1, [sp, #216] @ 0xd8 │ │ add r0, sp, #896 @ 0x380 │ │ movs r2, #1 │ │ - bl 65258 │ │ + bl 65340 │ │ ldrd r0, r2, [sp, #896] @ 0x380 │ │ movs r1, #17 │ │ ldrb.w r3, [sp, #904] @ 0x388 │ │ movt r1, #32768 @ 0x8000 │ │ cmp r0, r1 │ │ - bne.w 64d20 │ │ + bne.w 64e08 │ │ ldr r0, [sp, #180] @ 0xb4 │ │ strb.w r3, [sp, #348] @ 0x15c │ │ str r2, [sp, #344] @ 0x158 │ │ ldr r1, [r0, #8] │ │ ldr r0, [r0, #4] │ │ cmp r1, #17 │ │ - bcs.n 63010 │ │ + bcs.n 630f8 │ │ cmp r1, #8 │ │ - bls.w 63e9e │ │ + bls.w 63f86 │ │ movw r6, #14777 @ 0x39b9 │ │ ldr r2, [r0, #0] │ │ ldr r3, [r0, #4] │ │ add r0, r1 │ │ movt r6, #59970 @ 0xea42 │ │ eors r2, r6 │ │ movw r6, #21050 @ 0x523a │ │ @@ -88859,31 +88824,31 @@ │ │ adds r1, r1, r7 │ │ adcs r0, r2 │ │ eor.w r6, r6, ip │ │ eors r5, r4 │ │ adds r1, r1, r6 │ │ adcs r0, r5 │ │ eor.w r1, r1, r0, lsr #5 │ │ - b.n 63384 │ │ + b.n 6346c │ │ cmp r1, #129 @ 0x81 │ │ - bcs.w 63f24 │ │ + bcs.w 6400c │ │ movw r2, #51847 @ 0xca87 │ │ cmp r1, #33 @ 0x21 │ │ movt r2, #34283 @ 0x85eb │ │ umull r2, r3, r1, r2 │ │ str r2, [sp, #212] @ 0xd4 │ │ movw r2, #31153 @ 0x79b1 │ │ movt r2, #40503 @ 0x9e37 │ │ mla r2, r1, r2, r3 │ │ str r2, [sp, #208] @ 0xd0 │ │ - bcc.w 632b8 │ │ + bcc.w 633a0 │ │ cmp r1, #64 @ 0x40 │ │ - bls.w 631e2 │ │ + bls.w 632ca │ │ cmp r1, #96 @ 0x60 │ │ - bls.n 63112 │ │ + bls.n 631fa │ │ adds r2, r0, r1 │ │ movw r5, #20874 @ 0x518a │ │ movt r5, #19424 @ 0x4be0 │ │ mov.w ip, #0 │ │ ldr.w r3, [r2, #-64] │ │ ldr.w r7, [r2, #-56] │ │ eors r3, r5 │ │ @@ -89146,37 +89111,37 @@ │ │ movw r2, #31829 @ 0x7c55 │ │ ldr r7, [sp, #152] @ 0x98 │ │ movt r2, #32586 @ 0x7f4a │ │ ldr r3, [sp, #312] @ 0x138 │ │ muls r2, r0 │ │ and.w r6, r2, r7 │ │ cmp r3, r6 │ │ - bls.w 65010 │ │ + bls.w 650f8 │ │ ldr r2, [sp, #180] @ 0xb4 │ │ add.w r3, r6, r6, lsl #1 │ │ adds r2, #52 @ 0x34 │ │ str r2, [sp, #108] @ 0x6c │ │ ldr r2, [sp, #308] @ 0x134 │ │ add.w r2, r2, r3, lsl #2 │ │ ldrd r2, r3, [r2, #4] │ │ add.w r3, r3, r3, lsl #1 │ │ subs r2, #24 │ │ lsls r3, r3, #3 │ │ - cbz r3, 633f4 │ │ + cbz r3, 634dc │ │ ldr.w r7, [r2, #24]! │ │ subs r3, #24 │ │ ldr r6, [r2, #4] │ │ eors r7, r0 │ │ eors r6, r1 │ │ orrs r7, r6 │ │ - bne.n 633d8 │ │ + bne.n 634c0 │ │ ldrd r1, r0, [r2, #12] │ │ str r1, [sp, #104] @ 0x68 │ │ str r0, [sp, #120] @ 0x78 │ │ - b.n 633fc │ │ + b.n 634e4 │ │ movs r0, #0 │ │ str r0, [sp, #120] @ 0x78 │ │ movs r0, #8 │ │ str r0, [sp, #104] @ 0x68 │ │ ldr r0, [sp, #264] @ 0x108 │ │ add.w r4, sp, #1024 @ 0x400 │ │ str r0, [sp, #116] @ 0x74 │ │ @@ -89189,41 +89154,41 @@ │ │ str.w sl, [sp, #1028] @ 0x404 │ │ str.w sl, [sp, #1024] @ 0x400 │ │ str.w sl, [sp, #1044] @ 0x414 │ │ str.w sl, [sp, #1040] @ 0x410 │ │ str.w sl, [sp, #1032] @ 0x408 │ │ str.w r0, [sp, #1052] @ 0x41c │ │ str.w sl, [sp, #1048] @ 0x418 │ │ - b.n 63436 │ │ + b.n 6351e │ │ lsrs r0, r2, #2 │ │ - bne.n 63476 │ │ + bne.n 6355e │ │ mov r0, r4 │ │ - bl 481dc │ │ + bl 484e4 │ │ ldr.w r0, [sp, #1044] @ 0x414 │ │ cmp r0, #0 │ │ - beq.n 63436 │ │ + beq.n 6351e │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r7, #1 │ │ movs r6, #0 │ │ - b.n 6345e │ │ + b.n 63546 │ │ umull r2, r5, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r5, r3, r6, r5 │ │ mla r6, r3, r6, r5 │ │ mov r3, r2 │ │ lsls r2, r0, #31 │ │ - beq.n 6344e │ │ + beq.n 63536 │ │ umull r2, r5, r3, r7 │ │ cmp r0, #1 │ │ - beq.n 63432 │ │ + beq.n 6351a │ │ mla r1, r3, r1, r5 │ │ mla r1, r6, r7, r1 │ │ mov r7, r2 │ │ - b.n 6344e │ │ + b.n 63536 │ │ ldr r0, [sp, #124] @ 0x7c │ │ ldmia r4!, {r2, r3, r6, r7} │ │ stmia r0!, {r2, r3, r6, r7} │ │ ldmia.w r4, {r2, r3, r6, r7} │ │ stmia r0!, {r2, r3, r6, r7} │ │ movs r0, #4 │ │ str r0, [sp, #776] @ 0x308 │ │ @@ -89245,169 +89210,169 @@ │ │ movs r1, #1 │ │ strd r1, r8, [sp] │ │ mov r1, r7 │ │ str.w r8, [sp, #8] │ │ str r7, [sp, #200] @ 0xc8 │ │ str r2, [sp, #212] @ 0xd4 │ │ str r3, [sp, #192] @ 0xc0 │ │ - bl 6531c │ │ + bl 65404 │ │ ldrd r1, r0, [sp, #896] @ 0x380 │ │ str r1, [sp, #204] @ 0xcc │ │ str r0, [sp, #188] @ 0xbc │ │ ldrb.w r0, [sp, #904] @ 0x388 │ │ str r0, [sp, #184] @ 0xb8 │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - bne.w 64da2 │ │ + bne.w 64e8a │ │ ldr r0, [sp, #180] @ 0xb4 │ │ ldrd r1, r2, [r0, #16] │ │ add r0, sp, #832 @ 0x340 │ │ - bl 5a904 │ │ + bl 5ab14 │ │ movs r0, #4 │ │ add r4, sp, #896 @ 0x380 │ │ strd r5, r0, [sp, #904] @ 0x388 │ │ movw r0, #909 @ 0x38d │ │ strd r5, r5, [sp, #896] @ 0x380 │ │ strd r5, r5, [sp, #912] @ 0x390 │ │ strd r5, r0, [sp, #920] @ 0x398 │ │ mov r0, r4 │ │ - bl 68d5c │ │ + bl 68e44 │ │ ldr r0, [sp, #916] @ 0x394 │ │ cmp r0, #0 │ │ - beq.n 63506 │ │ + beq.n 635ee │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r7, #1 │ │ movs r6, #0 │ │ - b.n 63536 │ │ + b.n 6361e │ │ mla r1, r3, r1, r5 │ │ mla r1, r6, r7, r1 │ │ mov r7, r2 │ │ umull r2, r5, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r5, r3, r6, r5 │ │ mla r6, r3, r6, r5 │ │ mov r3, r2 │ │ lsls r2, r0, #31 │ │ - beq.n 63526 │ │ + beq.n 6360e │ │ umull r2, r5, r3, r7 │ │ cmp r0, #1 │ │ - bne.n 6351c │ │ + bne.n 63604 │ │ lsrs r0, r2, #2 │ │ - beq.n 63506 │ │ + beq.n 635ee │ │ add r3, sp, #848 @ 0x350 │ │ ldmia r4!, {r2, r5, r6, r7} │ │ mov r0, r3 │ │ stmia r0!, {r2, r5, r6, r7} │ │ ldmia.w r4, {r2, r5, r6, r7} │ │ stmia r0!, {r2, r5, r6, r7} │ │ ldrd r1, r2, [sp, #836] @ 0x344 │ │ ldr.w r0, [sp, #1152] @ 0x480 │ │ str r1, [sp, #172] @ 0xac │ │ str r2, [sp, #136] @ 0x88 │ │ - bl 69214 │ │ + bl 692fc │ │ ldr r0, [sp, #180] @ 0xb4 │ │ movs r1, #0 │ │ str.w r1, [sp, #1068] @ 0x42c │ │ ldrd r2, r0, [r0, #28] │ │ cmp r0, #0 │ │ str r2, [sp, #156] @ 0x9c │ │ mov.w r2, #8 │ │ str r2, [sp, #160] @ 0xa0 │ │ str.w r2, [sp, #1064] @ 0x428 │ │ str r1, [sp, #132] @ 0x84 │ │ str.w r1, [sp, #1060] @ 0x424 │ │ - beq.w 63d30 │ │ + beq.w 63e18 │ │ rsb r0, r0, r0, lsl #3 │ │ ldr r1, [sp, #156] @ 0x9c │ │ add.w r0, r1, r0, lsl #2 │ │ str r0, [sp, #64] @ 0x40 │ │ ldr r0, [sp, #136] @ 0x88 │ │ add.w r0, r0, r0, lsl #2 │ │ lsls r0, r0, #3 │ │ str r0, [sp, #168] @ 0xa8 │ │ movs r0, #0 │ │ str r0, [sp, #140] @ 0x8c │ │ movs r0, #8 │ │ str r0, [sp, #68] @ 0x44 │ │ - ldr r1, [pc, #496] @ (63798 ) │ │ + ldr r1, [pc, #496] @ (63880 ) │ │ add r2, sp, #896 @ 0x380 │ │ - ldr r0, [pc, #496] @ (6379c ) │ │ + ldr r0, [pc, #496] @ (63884 ) │ │ ldr r6, [sp, #156] @ 0x9c │ │ add r1, pc │ │ add r0, pc │ │ str r0, [sp, #908] @ 0x38c │ │ strd r0, r6, [sp, #900] @ 0x384 │ │ ldr r0, [sp, #180] @ 0xb4 │ │ str r0, [sp, #896] @ 0x380 │ │ add.w r0, sp, #1072 @ 0x430 │ │ - bl 3e0ec │ │ + bl 3e3f4 │ │ ldrb r0, [r6, #24] │ │ movs r1, #1 │ │ ldr.w r4, [sp, #1076] @ 0x434 │ │ bic.w r0, r1, r0 │ │ movs r1, #0 │ │ ldr.w r3, [sp, #1080] @ 0x438 │ │ strd r1, r0, [sp] │ │ add.w r0, sp, #1024 @ 0x400 │ │ str r1, [sp, #8] │ │ mov r2, r4 │ │ ldr r1, [sp, #200] @ 0xc8 │ │ ldr.w r5, [sp, #1072] @ 0x430 │ │ - bl 6531c │ │ + bl 65404 │ │ cmp r5, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r1, [sp, #1024] @ 0x400 │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ str r1, [sp, #204] @ 0xcc │ │ cmp r1, r0 │ │ - bne.w 64de0 │ │ + bne.w 64ec8 │ │ ldr r0, [sp, #156] @ 0x9c │ │ ldr r2, [r0, #20] │ │ movw r0, #43691 @ 0xaaab │ │ movt r0, #682 @ 0x2aa │ │ str r2, [sp, #196] @ 0xc4 │ │ cmp r2, r0 │ │ - bcs.w 627f2 │ │ + bcs.w 628da │ │ ldrb.w r0, [sp, #1032] @ 0x408 │ │ str r0, [sp, #56] @ 0x38 │ │ ldr.w r0, [sp, #1028] @ 0x404 │ │ str r0, [sp, #52] @ 0x34 │ │ ldr r0, [sp, #156] @ 0x9c │ │ ldr r0, [r0, #16] │ │ str r0, [sp, #164] @ 0xa4 │ │ ldr r0, [sp, #196] @ 0xc4 │ │ add.w r0, r0, r0, lsl #1 │ │ lsls r4, r0, #4 │ │ - beq.n 6364e │ │ + beq.n 63736 │ │ mov r0, r4 │ │ movs r1, #8 │ │ - bl 4191c │ │ + bl 41c24 │ │ cmp r0, #0 │ │ str r0, [sp, #176] @ 0xb0 │ │ ldr r0, [sp, #196] @ 0xc4 │ │ str r0, [sp, #48] @ 0x30 │ │ - bne.n 63656 │ │ - b.w 65024 │ │ + bne.n 6373e │ │ + b.w 6510c │ │ movs r0, #8 │ │ str r0, [sp, #176] @ 0xb0 │ │ movs r0, #0 │ │ str r0, [sp, #48] @ 0x30 │ │ ldr r0, [sp, #196] @ 0xc4 │ │ cmp r0, #0 │ │ - beq.n 63706 │ │ + beq.n 637ee │ │ ldr r0, [sp, #136] @ 0x88 │ │ cmp r0, #0 │ │ - beq.w 64f70 │ │ + beq.w 65058 │ │ mov.w r8, #0 │ │ - b.n 636b8 │ │ + b.n 637a0 │ │ ldrd r0, r1, [r7, #8] │ │ mov.w sl, #0 │ │ mov.w lr, #1 │ │ strd r1, r0, [sp, #204] @ 0xcc │ │ add.w r0, r8, r8, lsl #1 │ │ ldr.w ip, [sp, #176] @ 0xb0 │ │ ldrd r4, r2, [sp, #896] @ 0x380 │ │ @@ -89425,55 +89390,55 @@ │ │ strb.w r9, [r0, #32] │ │ str.w sl, [r0, #4] │ │ strd r1, r4, [r0, #12] │ │ adds r0, #20 │ │ stmia r0!, {r2, r3, r7} │ │ ldr r0, [sp, #196] @ 0xc4 │ │ cmp r8, r0 │ │ - beq.n 63706 │ │ + beq.n 637ee │ │ ldr r0, [sp, #164] @ 0xa4 │ │ ldrd sl, r7, [sp, #168] @ 0xa8 │ │ add.w r5, r0, r8, lsl #4 │ │ ldrd r9, r4, [r5, #4] │ │ - b.n 636d2 │ │ + b.n 637ba │ │ adds r7, #40 @ 0x28 │ │ subs.w sl, sl, #40 @ 0x28 │ │ - beq.w 64f70 │ │ + beq.w 65058 │ │ ldr r0, [r7, #24] │ │ cmp r4, r0 │ │ - bne.n 636c8 │ │ + bne.n 637b0 │ │ ldr r6, [r7, #20] │ │ mov r0, r9 │ │ mov r2, r4 │ │ mov r1, r6 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.n 636c8 │ │ + bne.n 637b0 │ │ add r0, sp, #896 @ 0x380 │ │ mov r1, r6 │ │ mov r2, r4 │ │ - bl 3ec5a │ │ + bl 3ef62 │ │ ldr r0, [r7, #0] │ │ ldrb.w r9, [r7, #32] │ │ lsls r0, r0, #31 │ │ - bne.n 6366a │ │ + bne.n 63752 │ │ mov.w lr, #0 │ │ mov.w sl, #0 │ │ - b.n 6367a │ │ + b.n 63762 │ │ ldr r0, [sp, #156] @ 0x9c │ │ ldrd r1, r9, [r0, #4] │ │ cmp.w r9, #17 │ │ str r1, [sp, #208] @ 0xd0 │ │ ldrb r1, [r0, #25] │ │ ldrb r0, [r0, #24] │ │ str r1, [sp, #204] @ 0xcc │ │ str r0, [sp, #164] @ 0xa4 │ │ - bcs.n 637a0 │ │ + bcs.n 63888 │ │ cmp.w r9, #8 │ │ - bls.w 63b2e │ │ + bls.w 63c16 │ │ ldr r2, [sp, #208] @ 0xd0 │ │ movw r7, #14777 @ 0x39b9 │ │ movt r7, #59970 @ 0xea42 │ │ movs r5, #0 │ │ ldr r0, [r2, #0] │ │ ldr r1, [r2, #4] │ │ add r2, r9 │ │ @@ -89503,35 +89468,35 @@ │ │ adc.w r0, r0, #0 │ │ adds r1, r1, r3 │ │ adcs r0, r2 │ │ eor.w r7, r7, ip │ │ eors r6, r5 │ │ adds r1, r1, r7 │ │ adcs r0, r6 │ │ - b.n 63afe │ │ + b.n 63be6 │ │ nop │ │ - str r1, [r2, #12] │ │ + str r0, [r4, #0] │ │ vsri.64 d22, d5, #6 │ │ movs r0, r0 │ │ cmp.w r9, #129 @ 0x81 │ │ - bcs.w 63bc6 │ │ + bcs.w 63cae │ │ movw r0, #51847 @ 0xca87 │ │ cmp.w r9, #33 @ 0x21 │ │ movt r0, #34283 @ 0x85eb │ │ umull r0, r1, r9, r0 │ │ str r0, [sp, #44] @ 0x2c │ │ movw r0, #31153 @ 0x79b1 │ │ movt r0, #40503 @ 0x9e37 │ │ mla r0, r9, r0, r1 │ │ str r0, [sp, #40] @ 0x28 │ │ - bcc.w 63a3a │ │ + bcc.w 63b22 │ │ cmp.w r9, #64 @ 0x40 │ │ - bls.w 6396a │ │ + bls.w 63a52 │ │ cmp.w r9, #96 @ 0x60 │ │ - bls.n 638a2 │ │ + bls.n 6398a │ │ ldr r4, [sp, #208] @ 0xd0 │ │ movw r7, #20874 @ 0x518a │ │ movt r7, #19424 @ 0x4be0 │ │ movs r5, #0 │ │ add.w r0, r4, r9 │ │ mov.w lr, #0 │ │ ldr.w r1, [r0, #-64] │ │ @@ -89785,18 +89750,18 @@ │ │ umull r2, r3, r1, r6 │ │ movt r7, #5718 @ 0x1656 │ │ mla r1, r1, r7, r3 │ │ mla r8, r0, r6, r1 │ │ eor.w sl, r8, r2 │ │ ldr r0, [sp, #196] @ 0xc4 │ │ cmp r0, #0 │ │ - bne.w 63c5e │ │ - b.w 64fa4 │ │ + bne.w 63d46 │ │ + b.w 6508c │ │ cmp.w r9, #3 │ │ - bls.n 63be0 │ │ + bls.n 63cc8 │ │ ldr r1, [sp, #208] @ 0xd0 │ │ movw r2, #45428 @ 0xb174 │ │ movt r2, #51002 @ 0xc73a │ │ movw r5, #57125 @ 0xdf25 │ │ add.w r0, r1, r9 │ │ movt r5, #7832 @ 0x1e98 │ │ ldr r1, [r1, #0] │ │ @@ -89832,29 +89797,29 @@ │ │ mla r0, r0, r5, r1 │ │ lsrs r1, r2, #28 │ │ orr.w r1, r1, r0, lsl #4 │ │ eor.w r8, r0, r0, lsr #28 │ │ eor.w sl, r1, r2 │ │ ldr r0, [sp, #196] @ 0xc4 │ │ cmp r0, #0 │ │ - bne.n 63c5e │ │ - b.w 64fa4 │ │ + bne.n 63d46 │ │ + b.w 6508c │ │ cmp.w r9, #241 @ 0xf1 │ │ - bcs.n 63c4a │ │ - ldr r0, [pc, #980] @ (63fa4 ) │ │ + bcs.n 63d32 │ │ + ldr r0, [pc, #980] @ (6408c ) │ │ mov r1, r9 │ │ movs r2, #0 │ │ movs r3, #0 │ │ add r0, pc │ │ str r0, [sp, #0] │ │ ldr r0, [sp, #208] @ 0xd0 │ │ - bl 996ec │ │ - b.n 63c52 │ │ + bl 996f8 │ │ + b.n 63d3a │ │ cmp.w r9, #0 │ │ - beq.w 63d06 │ │ + beq.w 63dee │ │ ldr r2, [sp, #208] @ 0xd0 │ │ mov.w r1, r9, lsr #1 │ │ movw r3, #44605 @ 0xae3d │ │ movw r6, #31225 @ 0x79f9 │ │ movt r3, #49842 @ 0xc2b2 │ │ movw r7, #26513 @ 0x6791 │ │ ldrb r0, [r2, #0] │ │ @@ -89876,54 +89841,54 @@ │ │ umull r1, r2, r0, r1 │ │ mla r0, r0, r3, r2 │ │ lsrs r2, r1, #29 │ │ orr.w r2, r2, r0, lsl #3 │ │ eor.w r0, r0, r0, lsr #29 │ │ eors r1, r2 │ │ umull r2, r3, r1, r6 │ │ - b.n 63b16 │ │ + b.n 63bfe │ │ ldr r0, [sp, #208] @ 0xd0 │ │ mov r1, r9 │ │ - bl 98f20 │ │ + bl 98f2c │ │ mov sl, r0 │ │ mov r8, r1 │ │ ldr r0, [sp, #196] @ 0xc4 │ │ cmp r0, #0 │ │ - beq.w 64fa4 │ │ + beq.w 6508c │ │ ldr r0, [sp, #176] @ 0xb0 │ │ ldrb.w r0, [r0, #32] │ │ cmp r0, #8 │ │ - bcs.n 63c6c │ │ + bcs.n 63d54 │ │ movs r5, #0 │ │ - b.n 63c78 │ │ + b.n 63d60 │ │ ldr r0, [sp, #176] @ 0xb0 │ │ ldrb.w r0, [r0, #41] @ 0x29 │ │ subs r5, r0, #1 │ │ it ne │ │ movne r5, #1 │ │ cmp.w r9, #4294967295 @ 0xffffffff │ │ - ble.w 627f2 │ │ + ble.w 628da │ │ cmp.w r9, #0 │ │ - beq.n 63c98 │ │ + beq.n 63d80 │ │ mov r0, r9 │ │ movs r1, #1 │ │ - bl 4191c │ │ + bl 41c24 │ │ cmp r0, #0 │ │ - beq.w 6502c │ │ + beq.w 65114 │ │ mov r4, r0 │ │ - b.n 63c9a │ │ + b.n 63d82 │ │ movs r4, #1 │ │ ldr r1, [sp, #208] @ 0xd0 │ │ mov r0, r4 │ │ mov r2, r9 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr.w r0, [sp, #1060] @ 0x424 │ │ ldr r1, [sp, #140] @ 0x8c │ │ cmp r1, r0 │ │ - beq.n 63d20 │ │ + beq.n 63e08 │ │ ldr r2, [sp, #140] @ 0x8c │ │ ldr r7, [sp, #68] @ 0x44 │ │ ldr r6, [sp, #52] @ 0x34 │ │ add.w r0, r2, r2, lsl #1 │ │ ldr r3, [sp, #156] @ 0x9c │ │ adds r2, #1 │ │ str r2, [sp, #140] @ 0x8c │ │ @@ -89947,29 +89912,29 @@ │ │ strd r9, r4, [r0, #16] │ │ str.w r9, [r0, #24] │ │ strb r1, [r0, #4] │ │ ldr r0, [sp, #64] @ 0x40 │ │ str.w r2, [sp, #1068] @ 0x42c │ │ cmp r3, r0 │ │ str r3, [sp, #156] @ 0x9c │ │ - bne.w 635a6 │ │ - b.w 64a1c │ │ + bne.w 6368e │ │ + b.w 64b04 │ │ movw r8, #32773 @ 0x8005 │ │ movw sl, #38082 @ 0x94c2 │ │ movt r8, #11526 @ 0x2d06 │ │ movt sl, #14547 @ 0x38d3 │ │ ldr r0, [sp, #196] @ 0xc4 │ │ cmp r0, #0 │ │ - bne.n 63c5e │ │ - b.w 64fa4 │ │ + bne.n 63d46 │ │ + b.w 6508c │ │ addw r0, sp, #1060 @ 0x424 │ │ - bl 47a58 │ │ + bl 47e0e │ │ ldr.w r0, [sp, #1064] @ 0x428 │ │ str r0, [sp, #68] @ 0x44 │ │ - b.n 63cae │ │ + b.n 63d96 │ │ movs r0, #0 │ │ movs r2, #0 │ │ str r0, [sp, #140] @ 0x8c │ │ movs r0, #8 │ │ ldr r3, [sp, #96] @ 0x60 │ │ strb.w r0, [sp, #884] @ 0x374 │ │ ldr r0, [sp, #180] @ 0xb4 │ │ @@ -89982,76 +89947,76 @@ │ │ str r2, [sp, #888] @ 0x378 │ │ mov.w r2, #8 │ │ str r1, [sp, #880] @ 0x370 │ │ mov.w r1, #0 │ │ str.w r1, [sp, #1080] @ 0x438 │ │ str.w r2, [sp, #1076] @ 0x434 │ │ str.w r1, [sp, #1072] @ 0x430 │ │ - beq.w 63f3a │ │ + beq.w 64022 │ │ add.w r0, r0, r0, lsl #1 │ │ movs r5, #0 │ │ add.w r0, r8, r0, lsl #3 │ │ str r0, [sp, #164] @ 0xa4 │ │ movs r0, #8 │ │ str r0, [sp, #160] @ 0xa0 │ │ ldr r1, [sp, #200] @ 0xc8 │ │ add.w r0, sp, #1024 @ 0x400 │ │ ldr r2, [sp, #180] @ 0xb4 │ │ mov r3, r8 │ │ - bl 69a54 │ │ + bl 69b3c │ │ ldr.w r0, [sp, #1024] @ 0x400 │ │ ldr.w r1, [sp, #1036] @ 0x40c │ │ cmp r0, #0 │ │ str r1, [sp, #208] @ 0xd0 │ │ - bne.w 63fb4 │ │ + bne.w 6409c │ │ add.w r0, r8, #24 │ │ str r0, [sp, #196] @ 0xc4 │ │ ldrb.w r0, [sp, #1040] @ 0x410 │ │ ldrd r9, r4, [r8, #16] │ │ ldr.w sl, [sp, #232] @ 0xe8 │ │ ldr r7, [sp, #148] @ 0x94 │ │ str r0, [sp, #172] @ 0xac │ │ ldrb.w r0, [sp, #1032] @ 0x408 │ │ str r0, [sp, #168] @ 0xa8 │ │ ldr.w r0, [sp, #1028] @ 0x404 │ │ str r0, [sp, #176] @ 0xb0 │ │ - b.n 63dc6 │ │ + b.n 63eae │ │ adds r7, #52 @ 0x34 │ │ subs.w sl, sl, #52 @ 0x34 │ │ - beq.w 64f78 │ │ + beq.w 65060 │ │ ldr.w r0, [r7, #-40] │ │ cmp r0, r4 │ │ - bne.n 63dbc │ │ + bne.n 63ea4 │ │ ldr.w r6, [r7, #-44] │ │ mov r1, r9 │ │ mov r2, r4 │ │ mov r0, r6 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ itt eq │ │ ldrbeq r0, [r7, #0] │ │ cmpeq r0, #0 │ │ - bne.n 63dbc │ │ + bne.n 63ea4 │ │ movs r0, #1 │ │ ldr r1, [sp, #200] @ 0xc8 │ │ str r0, [sp, #0] │ │ movs r0, #0 │ │ strd r0, r0, [sp, #4] │ │ add.w r0, sp, #1024 @ 0x400 │ │ mov r2, r6 │ │ mov r3, r4 │ │ - bl 6531c │ │ + bl 65404 │ │ ldr.w r1, [sp, #1028] @ 0x404 │ │ movs r2, #17 │ │ ldrb.w r0, [sp, #1032] @ 0x408 │ │ movt r2, #32768 @ 0x8000 │ │ ldr.w r3, [sp, #1024] @ 0x400 │ │ str r3, [sp, #204] @ 0xcc │ │ cmp r3, r2 │ │ - bne.w 63fe2 │ │ + bne.w 640ca │ │ and.w r0, r0, #1 │ │ ldrd r3, r2, [r8, #4] │ │ ldr r7, [sp, #168] @ 0xa8 │ │ strd r1, r0, [sp, #32] │ │ ldr r1, [sp, #172] @ 0xac │ │ and.w r7, r7, #1 │ │ ldr r0, [sp, #184] @ 0xb8 │ │ @@ -90065,18 +90030,18 @@ │ │ ldr r2, [sp, #208] @ 0xd0 │ │ strd r2, r1, [sp, #16] │ │ ldr r1, [sp, #188] @ 0xbc │ │ strd r1, r0, [sp, #24] │ │ add r0, sp, #896 @ 0x380 │ │ ldr r1, [sp, #212] @ 0xd4 │ │ ldr r2, [sp, #192] @ 0xc0 │ │ - bl 69b50 │ │ + bl 69c38 │ │ ldr.w r0, [sp, #1072] @ 0x430 │ │ cmp r5, r0 │ │ - beq.n 63e8e │ │ + beq.n 63f76 │ │ rsb r0, r5, r5, lsl #3 │ │ ldr r1, [sp, #160] @ 0xa0 │ │ adds r5, #1 │ │ add.w r0, r1, r0, lsl #3 │ │ add r1, sp, #896 @ 0x380 │ │ ldmia r1!, {r2, r3, r6, r7} │ │ stmia r0!, {r2, r3, r6, r7} │ │ @@ -90084,23 +90049,23 @@ │ │ stmia r0!, {r2, r3, r4, r6, r7} │ │ ldmia.w r1, {r2, r3, r4, r6, r7} │ │ stmia r0!, {r2, r3, r4, r6, r7} │ │ ldr.w r8, [sp, #196] @ 0xc4 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ str.w r5, [sp, #1080] @ 0x438 │ │ cmp r8, r0 │ │ - bne.w 63d7a │ │ - b.n 6404c │ │ + bne.w 63e62 │ │ + b.n 64134 │ │ add.w r0, sp, #1072 @ 0x430 │ │ - bl 47c2e │ │ + bl 47f70 │ │ ldr.w r0, [sp, #1076] @ 0x434 │ │ str r0, [sp, #160] @ 0xa0 │ │ - b.n 63e60 │ │ + b.n 63f48 │ │ cmp r1, #3 │ │ - bls.n 63f40 │ │ + bls.n 64028 │ │ adds r2, r0, r1 │ │ movw r3, #45428 @ 0xb174 │ │ ldr r0, [r0, #0] │ │ movt r3, #51002 @ 0xc73a │ │ ldr.w r2, [r2, #-4] │ │ movw r4, #57125 @ 0xdf25 │ │ eors r0, r3 │ │ @@ -90132,29 +90097,29 @@ │ │ adc.w r3, sl, #0 │ │ eors r0, r3 │ │ mla r1, r0, r4, r1 │ │ lsrs r0, r2, #28 │ │ orr.w r0, r0, r1, lsl #4 │ │ eor.w r1, r1, r1, lsr #28 │ │ eors r0, r2 │ │ - b.w 633a4 │ │ + b.w 6348c │ │ cmp r1, #241 @ 0xf1 │ │ - bcs.n 63fac │ │ - ldr r2, [pc, #124] @ (63fa8 ) │ │ + bcs.n 64094 │ │ + ldr r2, [pc, #124] @ (64090 ) │ │ movs r3, #0 │ │ add r2, pc │ │ str r2, [sp, #0] │ │ movs r2, #0 │ │ - bl 996ec │ │ - b.w 633a4 │ │ + bl 996f8 │ │ + b.w 6348c │ │ movs r5, #0 │ │ movs r0, #0 │ │ - b.n 64054 │ │ + b.n 6413c │ │ cmp r1, #0 │ │ - beq.w 64746 │ │ + beq.w 6482e │ │ lsrs r3, r1, #1 │ │ ldrb r2, [r0, #0] │ │ ldrb r3, [r0, r3] │ │ add r0, r1 │ │ movw r6, #31225 @ 0x79f9 │ │ lsls r2, r2, #16 │ │ orr.w r1, r2, r1, lsl #8 │ │ @@ -90174,21 +90139,21 @@ │ │ movt r7, #5718 @ 0x1656 │ │ adds r7, #32 │ │ mla r0, r0, r3, r2 │ │ lsrs r2, r1, #29 │ │ orr.w r2, r2, r0, lsl #3 │ │ eor.w r0, r0, r0, lsr #29 │ │ eors r1, r2 │ │ - b.w 63394 │ │ + b.w 6347c │ │ nop │ │ - ldr r3, [sp, #672] @ 0x2a0 │ │ - vqrshrun.s64 d25, q0, #5 │ │ + ldr r2, [sp, #768] @ 0x300 │ │ + vcvt.s32.f32 , q12 │ │ vshr.u32 d31, d20, #5 │ │ - vqshl.u64 , , #56 @ 0x38 │ │ - cbnz r0, 63ff4 │ │ + vaba.u8 , q13, │ │ + cbnz r0, 640dc │ │ ldr r2, [sp, #100] @ 0x64 │ │ ldr r3, [sp, #72] @ 0x48 │ │ ldr.w r7, [sp, #1028] @ 0x404 │ │ ldrb r0, [r2, #2] │ │ ldrb r1, [r3, #2] │ │ ldrh r2, [r2, #0] │ │ ldrh r3, [r3, #0] │ │ @@ -90198,15 +90163,15 @@ │ │ str r0, [sp, #132] @ 0x84 │ │ ldr r0, [sp, #208] @ 0xd0 │ │ ldrb.w r7, [sp, #1040] @ 0x410 │ │ ldrb.w r9, [sp, #1032] @ 0x408 │ │ lsrs r0, r0, #8 │ │ str r7, [sp, #180] @ 0xb4 │ │ str r0, [sp, #196] @ 0xc4 │ │ - b.n 6400c │ │ + b.n 640f4 │ │ ldr r7, [sp, #76] @ 0x4c │ │ mov.w r8, r1, lsr #8 │ │ ldr r6, [sp, #100] @ 0x64 │ │ uxtb.w r9, r1 │ │ ldrb.w r2, [sp, #1036] @ 0x40c │ │ ldrb.w ip, [r7, #2] │ │ ldrb r3, [r6, #2] │ │ @@ -90214,39 +90179,39 @@ │ │ ldrh r6, [r6, #0] │ │ str r2, [sp, #180] @ 0xb4 │ │ orr.w r2, r7, ip, lsl #16 │ │ str r2, [sp, #132] @ 0x84 │ │ orr.w r2, r6, r3, lsl #16 │ │ str r2, [sp, #196] @ 0xc4 │ │ str r0, [sp, #208] @ 0xd0 │ │ - cbz r5, 64028 │ │ + cbz r5, 64110 │ │ ldr r0, [sp, #160] @ 0xa0 │ │ add.w r6, r0, #44 @ 0x2c │ │ ldr.w r0, [r6, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #56 @ 0x38 │ │ subs r5, #1 │ │ - bne.n 64014 │ │ + bne.n 640fc │ │ ldr.w r0, [sp, #1072] @ 0x430 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #160] @ 0xa0 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r1, [sp, #204] @ 0xcc │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - bne.w 64ea0 │ │ + bne.w 64f88 │ │ ldr r0, [sp, #208] @ 0xd0 │ │ ldr r5, [sp, #180] @ 0xb4 │ │ str r0, [sp, #160] @ 0xa0 │ │ - b.n 64062 │ │ + b.n 6414a │ │ ldr.w r0, [sp, #1072] @ 0x430 │ │ lsrs r1, r5, #8 │ │ str r1, [sp, #132] @ 0x84 │ │ ldr r1, [sp, #160] @ 0xa0 │ │ mov.w r8, r0, lsr #8 │ │ uxtb.w r9, r0 │ │ lsrs r1, r1, #8 │ │ @@ -90269,31 +90234,31 @@ │ │ orr.w r0, r9, r8, lsl #8 │ │ str r0, [sp, #160] @ 0xa0 │ │ movs r0, #0 │ │ mov.w r9, #0 │ │ str r0, [sp, #180] @ 0xb4 │ │ ldr r0, [sp, #240] @ 0xf0 │ │ str r0, [sp, #196] @ 0xc4 │ │ - b.n 640ae │ │ + b.n 64196 │ │ ldr r1, [sp, #196] @ 0xc4 │ │ ldr r0, [sp, #144] @ 0x90 │ │ adds r1, #52 @ 0x34 │ │ str r1, [sp, #196] @ 0xc4 │ │ cmp r1, r0 │ │ - beq.w 64370 │ │ + beq.w 64458 │ │ ldr r0, [sp, #196] @ 0xc4 │ │ ldr r0, [r0, #44] @ 0x2c │ │ cmp r0, #0 │ │ - beq.n 640a0 │ │ + beq.n 64188 │ │ ldr r1, [sp, #196] @ 0xc4 │ │ add.w r0, r0, r0, lsl #1 │ │ ldr r4, [sp, #192] @ 0xc0 │ │ mov.w r8, r0, lsl #3 │ │ ldr.w sl, [r1, #40] @ 0x28 │ │ - b.n 640fe │ │ + b.n 641e6 │ │ rsb r0, r9, r9, lsl #3 │ │ ldr r1, [sp, #176] @ 0xb0 │ │ ldmia r4!, {r2, r3, r6, r7} │ │ add.w r9, r9, #1 │ │ add.w r0, r1, r0, lsl #3 │ │ stmia r0!, {r2, r3, r6, r7} │ │ ldmia r4!, {r2, r3, r5, r6, r7} │ │ @@ -90303,54 +90268,54 @@ │ │ mov.w r0, r9, lsr #8 │ │ str.w r9, [sp, #1080] @ 0x438 │ │ str r0, [sp, #172] @ 0xac │ │ str.w r9, [sp, #180] @ 0xb4 │ │ ldr r4, [sp, #192] @ 0xc0 │ │ add.w sl, sl, #24 │ │ subs.w r8, r8, #24 │ │ - beq.n 640a0 │ │ + beq.n 64188 │ │ ldr.w r0, [sl, #20] │ │ cmp r0, r4 │ │ - bne.n 640f4 │ │ + bne.n 641dc │ │ ldr.w r0, [sl, #16] │ │ mov r2, r4 │ │ ldr r1, [sp, #212] @ 0xd4 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.n 640f4 │ │ + bne.n 641dc │ │ ldr r4, [sp, #196] @ 0xc4 │ │ movs r0, #1 │ │ ldr r7, [sp, #200] @ 0xc8 │ │ add.w r5, sp, #1024 @ 0x400 │ │ ldrd r2, r3, [r4, #4] │ │ str r0, [sp, #0] │ │ movs r0, #0 │ │ strd r0, r0, [sp, #4] │ │ mov r0, r5 │ │ mov r1, r7 │ │ - bl 6531c │ │ + bl 65404 │ │ ldr.w r6, [sp, #1028] @ 0x404 │ │ ldr.w r1, [sp, #1024] @ 0x400 │ │ ldrb.w r0, [sp, #1032] @ 0x408 │ │ str r0, [sp, #208] @ 0xd0 │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ str r1, [sp, #204] @ 0xcc │ │ - bne.n 641c4 │ │ + bne.n 642ac │ │ mov r0, r5 │ │ mov r1, r7 │ │ mov r2, r4 │ │ mov r3, sl │ │ - bl 69a54 │ │ + bl 69b3c │ │ ldr.w r0, [sp, #1036] @ 0x40c │ │ ldrb.w r7, [sp, #1040] @ 0x410 │ │ ldr.w r1, [sp, #1024] @ 0x400 │ │ cmp r1, #1 │ │ - beq.n 641ec │ │ + beq.n 642d4 │ │ ldrd r1, r2, [r4, #4] │ │ ldr r4, [sp, #208] @ 0xd0 │ │ ldr.w lr, [sp, #1028] @ 0x404 │ │ and.w r4, r4, #1 │ │ ldrd r3, r5, [sl, #4] │ │ ldrb.w ip, [sp, #1032] @ 0x408 │ │ strd r6, r4, [sp, #32] │ │ @@ -90362,23 +90327,23 @@ │ │ and.w r6, r6, #1 │ │ add r4, sp, #896 @ 0x380 │ │ strd r5, r0, [sp, #4] │ │ ldr r0, [sp, #188] @ 0xbc │ │ strd r0, r6, [sp, #24] │ │ mov r0, r4 │ │ str.w ip, [sp, #20] │ │ - bl 69b50 │ │ + bl 69c38 │ │ ldr.w r0, [sp, #1072] @ 0x430 │ │ cmp r9, r0 │ │ - bne.n 640c8 │ │ + bne.n 641b0 │ │ add.w r0, sp, #1072 @ 0x430 │ │ - bl 47c2e │ │ + bl 47f70 │ │ ldr.w r0, [sp, #1076] @ 0x434 │ │ str r0, [sp, #176] @ 0xb0 │ │ - b.n 640c8 │ │ + b.n 641b0 │ │ ldr r2, [sp, #76] @ 0x4c │ │ ldr r3, [sp, #100] @ 0x64 │ │ ldrb.w r7, [sp, #1036] @ 0x40c │ │ ldrb r0, [r2, #2] │ │ ldrb r1, [r3, #2] │ │ ldrh r2, [r2, #0] │ │ ldrh r3, [r3, #0] │ │ @@ -90387,15 +90352,15 @@ │ │ orr.w r0, r3, r1, lsl #16 │ │ str r0, [sp, #196] @ 0xc4 │ │ lsrs r0, r6, #8 │ │ str r7, [sp, #180] @ 0xb4 │ │ str r0, [sp, #156] @ 0x9c │ │ uxtb r0, r6 │ │ str r0, [sp, #200] @ 0xc8 │ │ - b.n 64218 │ │ + b.n 64300 │ │ ldr r3, [sp, #72] @ 0x48 │ │ str r7, [sp, #180] @ 0xb4 │ │ ldr r7, [sp, #100] @ 0x64 │ │ ldrb r1, [r3, #2] │ │ ldrh r3, [r3, #0] │ │ ldrb r2, [r7, #2] │ │ ldrh r7, [r7, #0] │ │ @@ -90407,43 +90372,43 @@ │ │ ldr.w r6, [sp, #1028] @ 0x404 │ │ str r1, [sp, #156] @ 0x9c │ │ lsrs r1, r0, #8 │ │ str r6, [sp, #204] @ 0xcc │ │ str r1, [sp, #196] @ 0xc4 │ │ str r0, [sp, #208] @ 0xd0 │ │ cmp.w r9, #0 │ │ - beq.n 6423a │ │ + beq.n 64322 │ │ ldr r0, [sp, #176] @ 0xb0 │ │ add.w r6, r0, #44 @ 0x2c │ │ ldr.w r0, [r6, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #56 @ 0x38 │ │ subs.w r9, r9, #1 │ │ - bne.n 64224 │ │ + bne.n 6430c │ │ ldr.w r0, [sp, #1072] @ 0x430 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #176] @ 0xb0 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r1, [sp, #204] @ 0xcc │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - bne.w 64e30 │ │ + bne.w 64f18 │ │ ldr r0, [sp, #208] @ 0xd0 │ │ str r0, [sp, #176] @ 0xb0 │ │ ldr r0, [sp, #192] @ 0xc0 │ │ cmp r0, #17 │ │ - bcs.w 6438a │ │ + bcs.w 64472 │ │ ldr r0, [sp, #192] @ 0xc0 │ │ cmp r0, #8 │ │ - bls.n 642de │ │ + bls.n 643c6 │ │ ldr r2, [sp, #212] @ 0xd4 │ │ movw r7, #14777 @ 0x39b9 │ │ ldr.w lr, [sp, #192] @ 0xc0 │ │ movt r7, #59970 @ 0xea42 │ │ movs r5, #0 │ │ ldr r0, [r2, #0] │ │ ldr r1, [r2, #4] │ │ @@ -90474,18 +90439,18 @@ │ │ adc.w r0, r0, #0 │ │ adds r1, r1, r3 │ │ adcs r0, r2 │ │ eor.w r7, r7, ip │ │ eors r6, r5 │ │ adds r1, r1, r7 │ │ adcs r0, r6 │ │ - b.n 64706 │ │ + b.n 647ee │ │ ldr r0, [sp, #192] @ 0xc0 │ │ cmp r0, #3 │ │ - bls.w 6475a │ │ + bls.w 64842 │ │ ldr r4, [sp, #192] @ 0xc0 │ │ movw r2, #45428 @ 0xb174 │ │ ldr r1, [sp, #212] @ 0xd4 │ │ movt r2, #51002 @ 0xc73a │ │ movw r5, #57125 @ 0xdf25 │ │ movw ip, #7269 @ 0x1c65 │ │ adds r0, r1, r4 │ │ @@ -90520,45 +90485,45 @@ │ │ adc.w r3, r3, #0 │ │ eors r0, r3 │ │ mla r0, r0, r5, r1 │ │ lsrs r1, r2, #28 │ │ orr.w r1, r1, r0, lsl #4 │ │ eor.w r9, r0, r0, lsr #28 │ │ eor.w sl, r1, r2 │ │ - b.n 647d0 │ │ + b.n 648b8 │ │ ldr r1, [sp, #176] @ 0xb0 │ │ ldr.w r0, [sp, #1072] @ 0x430 │ │ lsrs r1, r1, #8 │ │ str r1, [sp, #196] @ 0xc4 │ │ lsrs r1, r0, #8 │ │ uxtb r0, r0 │ │ str r1, [sp, #156] @ 0x9c │ │ str r0, [sp, #200] @ 0xc8 │ │ ldr r0, [sp, #192] @ 0xc0 │ │ cmp r0, #17 │ │ - bcc.w 64262 │ │ + bcc.w 6434a │ │ ldr r0, [sp, #192] @ 0xc0 │ │ cmp r0, #129 @ 0x81 │ │ - bcs.w 6472c │ │ + bcs.w 64814 │ │ ldr r2, [sp, #192] @ 0xc0 │ │ movw r0, #51847 @ 0xca87 │ │ movt r0, #34283 @ 0x85eb │ │ cmp r2, #33 @ 0x21 │ │ umull r0, r1, r2, r0 │ │ str r0, [sp, #208] @ 0xd0 │ │ movw r0, #31153 @ 0x79b1 │ │ movt r0, #40503 @ 0x9e37 │ │ mla lr, r2, r0, r1 │ │ - bcc.w 64634 │ │ + bcc.w 6471c │ │ ldr r0, [sp, #192] @ 0xc0 │ │ cmp r0, #64 @ 0x40 │ │ - bls.w 64566 │ │ + bls.w 6464e │ │ ldr r0, [sp, #192] @ 0xc0 │ │ cmp r0, #96 @ 0x60 │ │ - bls.n 64490 │ │ + bls.n 64578 │ │ ldr r0, [sp, #192] @ 0xc0 │ │ movw r7, #20874 @ 0x518a │ │ ldr r5, [sp, #212] @ 0xd4 │ │ movt r7, #19424 @ 0x4be0 │ │ movs r6, #0 │ │ mov.w ip, #0 │ │ add r0, r5 │ │ @@ -90807,35 +90772,35 @@ │ │ movt r6, #40503 @ 0x9e37 │ │ movw r7, #26513 @ 0x6791 │ │ umull r2, r3, r1, r6 │ │ movt r7, #5718 @ 0x1656 │ │ mla r1, r1, r7, r3 │ │ mla r9, r0, r6, r1 │ │ eor.w sl, r9, r2 │ │ - b.n 647d0 │ │ + b.n 648b8 │ │ ldr r0, [sp, #192] @ 0xc0 │ │ cmp r0, #241 @ 0xf1 │ │ - bcs.n 647c4 │ │ - ldr r0, [pc, #788] @ (64a48 ) │ │ + bcs.n 648ac │ │ + ldr r0, [pc, #788] @ (64b30 ) │ │ movs r2, #0 │ │ ldr r1, [sp, #192] @ 0xc0 │ │ movs r3, #0 │ │ add r0, pc │ │ str r0, [sp, #0] │ │ ldr r0, [sp, #212] @ 0xd4 │ │ - bl 996ec │ │ - b.n 647cc │ │ + bl 996f8 │ │ + b.n 648b4 │ │ movw r1, #32773 @ 0x8005 │ │ movw r0, #38082 @ 0x94c2 │ │ movt r1, #11526 @ 0x2d06 │ │ movt r0, #14547 @ 0x38d3 │ │ - b.w 633a4 │ │ + b.w 6348c │ │ ldr r0, [sp, #192] @ 0xc0 │ │ cmp r0, #0 │ │ - beq.w 64a08 │ │ + beq.w 64af0 │ │ ldr r2, [sp, #212] @ 0xd4 │ │ movw r6, #31225 @ 0x79f9 │ │ ldr r3, [sp, #192] @ 0xc0 │ │ movw r7, #26513 @ 0x6791 │ │ movt r6, #40503 @ 0x9e37 │ │ movt r7, #5718 @ 0x1656 │ │ ldrb r0, [r2, #0] │ │ @@ -90858,38 +90823,38 @@ │ │ umull r1, r2, r0, r1 │ │ mla r0, r0, r3, r2 │ │ lsrs r2, r1, #29 │ │ orr.w r2, r2, r0, lsl #3 │ │ eor.w r0, r0, r0, lsr #29 │ │ eors r1, r2 │ │ umull r2, r3, r1, r6 │ │ - b.n 6471e │ │ + b.n 64806 │ │ ldr r0, [sp, #212] @ 0xd4 │ │ ldr r1, [sp, #192] @ 0xc0 │ │ - bl 98f20 │ │ + bl 98f2c │ │ mov sl, r0 │ │ mov r9, r1 │ │ ldr r0, [sp, #192] @ 0xc0 │ │ movs r1, #1 │ │ - bl 4191c │ │ + bl 41c24 │ │ cmp r0, #0 │ │ - beq.w 6501c │ │ + beq.w 65104 │ │ mov r4, r0 │ │ ldr r0, [sp, #176] @ 0xb0 │ │ ldr r1, [sp, #196] @ 0xc4 │ │ ldr r6, [sp, #192] @ 0xc0 │ │ uxtb r0, r0 │ │ orr.w r8, r0, r1, lsl #8 │ │ ldr r1, [sp, #156] @ 0x9c │ │ ldr r0, [sp, #200] @ 0xc8 │ │ mov r2, r6 │ │ orr.w r5, r0, r1, lsl #8 │ │ ldr r1, [sp, #212] @ 0xd4 │ │ mov r0, r4 │ │ - bl d53c6 │ │ + bl d52ea │ │ add r2, sp, #832 @ 0x340 │ │ ldr r3, [sp, #84] @ 0x54 │ │ strd sl, r9, [sp, #936] @ 0x3a8 │ │ ldmia r2, {r0, r1, r2} │ │ str r6, [sp, #968] @ 0x3c8 │ │ stmia r3!, {r0, r1, r2} │ │ add r1, sp, #848 @ 0x350 │ │ @@ -90927,129 +90892,129 @@ │ │ ldr r2, [sp, #188] @ 0xbc │ │ str r0, [sp, #1000] @ 0x3e8 │ │ ldr r0, [sp, #160] @ 0xa0 │ │ str r0, [sp, #996] @ 0x3e4 │ │ add.w r0, sp, #1024 @ 0x400 │ │ str r2, [sp, #928] @ 0x3a0 │ │ strd r5, r8, [sp, #1008] @ 0x3f0 │ │ - bl 49d00 │ │ + bl 4a008 │ │ ldr.w r1, [sp, #1028] @ 0x404 │ │ ldr.w r0, [sp, #1024] @ 0x400 │ │ str r1, [sp, #204] @ 0xcc │ │ ldr.w r1, [sp, #1032] @ 0x408 │ │ cmp r0, #2 │ │ str r1, [sp, #188] @ 0xbc │ │ ldr.w r1, [sp, #1036] @ 0x40c │ │ str r1, [sp, #184] @ 0xb8 │ │ ldr.w r1, [sp, #1040] @ 0x410 │ │ str r1, [sp, #180] @ 0xb4 │ │ - beq.n 648fe │ │ + beq.n 649e6 │ │ ldr r2, [sp, #184] @ 0xb8 │ │ ldr.w r1, [sp, #1044] @ 0x414 │ │ str.w r2, [sp, #1084] @ 0x43c │ │ ldr r2, [sp, #188] @ 0xbc │ │ str.w r2, [sp, #1080] @ 0x438 │ │ ldr r2, [sp, #204] @ 0xcc │ │ str.w r1, [sp, #1092] @ 0x444 │ │ ldr r1, [sp, #180] @ 0xb4 │ │ str.w r0, [sp, #1072] @ 0x430 │ │ lsls r0, r0, #31 │ │ str.w r2, [sp, #1076] @ 0x434 │ │ str.w r1, [sp, #1088] @ 0x440 │ │ - beq.w 64fe8 │ │ + beq.w 650d0 │ │ ldr r1, [sp, #204] @ 0xcc │ │ add.w r0, sp, #1024 @ 0x400 │ │ movs r2, #6 │ │ movs r3, #0 │ │ str.w sl, [sp, #4] │ │ - bl 49e28 │ │ + bl 4a130 │ │ ldr.w r0, [sp, #1024] @ 0x400 │ │ ldr.w r1, [sp, #1028] @ 0x404 │ │ str r1, [sp, #204] @ 0xcc │ │ cmp r0, #1 │ │ ldr.w r1, [sp, #1032] @ 0x408 │ │ str r1, [sp, #188] @ 0xbc │ │ - bne.n 6490c │ │ + bne.n 649f4 │ │ ldr.w r0, [sp, #1036] @ 0x40c │ │ str r0, [sp, #184] @ 0xb8 │ │ ldr.w r0, [sp, #1040] @ 0x410 │ │ str r0, [sp, #180] @ 0xb4 │ │ add.w r0, sp, #1072 @ 0x430 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr.w r0, [sp, #1072] @ 0x430 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [sp, #1076] @ 0x434 │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ ldr r1, [sp, #204] @ 0xcc │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - beq.n 64946 │ │ - b.n 64e8c │ │ + beq.n 64a2e │ │ + b.n 64f74 │ │ ldr r0, [sp, #204] @ 0xcc │ │ - cbz r0, 6492e │ │ + cbz r0, 64a16 │ │ ldr r0, [sp, #188] @ 0xbc │ │ cmp r0, #8 │ │ - bne.w 65042 │ │ + bne.w 6512a │ │ ldr r1, [sp, #204] @ 0xcc │ │ ldr r0, [r1, #0] │ │ ldr r1, [r1, #4] │ │ negs r2, r0 │ │ eor.w r1, r1, #2147483648 @ 0x80000000 │ │ sbcs.w r2, sl, r1 │ │ it lt │ │ strdlt r0, r1, [sp, #952] @ 0x3b8 │ │ add.w r0, sp, #1072 @ 0x430 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr.w r0, [sp, #1072] @ 0x430 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [sp, #1076] @ 0x434 │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ ldr r0, [sp, #120] @ 0x78 │ │ - cbz r0, 6496e │ │ + cbz r0, 64a56 │ │ add r0, sp, #768 @ 0x300 │ │ ldr r2, [sp, #104] @ 0x68 │ │ ldr r3, [sp, #120] @ 0x78 │ │ add r1, sp, #896 @ 0x380 │ │ str r0, [sp, #0] │ │ add.w r0, sp, #1024 @ 0x400 │ │ - bl 6accc │ │ + bl 6adb4 │ │ ldr.w r1, [sp, #1024] @ 0x400 │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ str r1, [sp, #204] @ 0xcc │ │ cmp r1, r0 │ │ - bne.w 64e7a │ │ + bne.w 64f62 │ │ ldrd r5, r0, [sp, #904] @ 0x388 │ │ movs r2, #100 @ 0x64 │ │ ldr r1, [sp, #80] @ 0x50 │ │ str r0, [sp, #204] @ 0xcc │ │ ldr r0, [sp, #920] @ 0x398 │ │ str r0, [sp, #180] @ 0xb4 │ │ ldr r0, [sp, #916] @ 0x394 │ │ str r0, [sp, #184] @ 0xb8 │ │ ldr r0, [sp, #912] @ 0x390 │ │ str r0, [sp, #188] @ 0xbc │ │ add r0, sp, #352 @ 0x160 │ │ ldrd r9, r8, [sp, #896] @ 0x380 │ │ - bl d52ca │ │ + bl d4c3c │ │ add r0, sp, #768 @ 0x300 │ │ - bl 4b880 │ │ + bl 4bb88 │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ - beq.w 64e22 │ │ + beq.w 64f0a │ │ add r0, sp, #456 @ 0x1c8 │ │ add r1, sp, #352 @ 0x160 │ │ movs r2, #100 @ 0x64 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr r6, [sp, #336] @ 0x150 │ │ ldr r0, [sp, #328] @ 0x148 │ │ cmp r6, r0 │ │ - beq.n 64a00 │ │ + beq.n 64ae8 │ │ ldr r0, [sp, #332] @ 0x14c │ │ lsls r1, r6, #7 │ │ movs r2, #100 @ 0x64 │ │ str.w r9, [r0, r1] │ │ add.w r0, r0, r6, lsl #7 │ │ ldr r1, [sp, #204] @ 0xcc │ │ str r1, [r0, #12] │ │ @@ -91058,130 +91023,130 @@ │ │ ldr r1, [sp, #184] @ 0xb8 │ │ str r1, [r0, #20] │ │ ldr r1, [sp, #180] @ 0xb4 │ │ str r1, [r0, #24] │ │ add r1, sp, #456 @ 0x1c8 │ │ strd r8, r5, [r0, #4] │ │ adds r0, #28 │ │ - bl d52ca │ │ + bl d4c3c │ │ adds r0, r6, #1 │ │ ldr r1, [sp, #344] @ 0x158 │ │ str r0, [sp, #336] @ 0x150 │ │ add r0, sp, #896 @ 0x380 │ │ - bl 583dc │ │ + bl 585ec │ │ ldr r0, [sp, #896] @ 0x380 │ │ movs r1, #17 │ │ movt r1, #32768 @ 0x8000 │ │ cmp r0, r1 │ │ - bne.w 64cba │ │ + bne.w 64da2 │ │ ldr r1, [sp, #108] @ 0x6c │ │ ldr r0, [sp, #144] @ 0x90 │ │ str r1, [sp, #180] @ 0xb4 │ │ cmp r1, r0 │ │ - bne.w 62f6c │ │ - b.n 64a4c │ │ + bne.w 63054 │ │ + b.n 64b34 │ │ add r0, sp, #328 @ 0x148 │ │ - bl 47b7e │ │ - b.n 649ae │ │ + bl 47b42 │ │ + b.n 64a96 │ │ movw r9, #32773 @ 0x8005 │ │ movw sl, #38082 @ 0x94c2 │ │ movt r9, #11526 @ 0x2d06 │ │ movt sl, #14547 @ 0x38d3 │ │ movs r4, #1 │ │ - b.n 647e0 │ │ + b.n 648c8 │ │ ldr r0, [sp, #60] @ 0x3c │ │ ldr.w r1, [sp, #1060] @ 0x424 │ │ ldrb r2, [r0, #2] │ │ ldrh r3, [r0, #0] │ │ ldrb.w r0, [sp, #1064] @ 0x428 │ │ orr.w r2, r3, r2, lsl #16 │ │ - b.w 63d38 │ │ + b.w 63e20 │ │ add r3, sp, #896 @ 0x380 │ │ ldr r6, [sp, #236] @ 0xec │ │ movs r7, #3 │ │ ldmia r3, {r0, r1, r2, r3} │ │ strd r7, r0, [r6] │ │ add.w r0, r6, #8 │ │ stmia r0!, {r1, r2, r3} │ │ - b.n 64f2a │ │ + b.n 65012 │ │ nop │ │ - str r0, [sp, #264] @ 0x108 │ │ + ldrh r2, [r3, #58] @ 0x3a │ │ vtbx.8 d25, {d11}, d6 │ │ - cbz r0, 64a98 │ │ + cbz r0, 64b80 │ │ ldr r1, [sp, #216] @ 0xd8 │ │ add r0, sp, #896 @ 0x380 │ │ movs r2, #1 │ │ - bl 65258 │ │ + bl 65340 │ │ ldrd r0, r4, [sp, #896] @ 0x380 │ │ movs r1, #17 │ │ movt r1, #32768 @ 0x8000 │ │ cmp r0, r1 │ │ - bne.w 64bbc │ │ + bne.w 64ca4 │ │ add r0, sp, #896 @ 0x380 │ │ add r1, sp, #256 @ 0x100 │ │ mov r2, r4 │ │ - bl 6af82 │ │ + bl 6b06a │ │ ldr r0, [sp, #896] @ 0x380 │ │ movs r1, #17 │ │ movt r1, #32768 @ 0x8000 │ │ cmp r0, r1 │ │ - bne.w 64c1a │ │ + bne.w 64d02 │ │ add r0, sp, #896 @ 0x380 │ │ mov r1, r4 │ │ - bl 583dc │ │ + bl 585ec │ │ ldr r0, [sp, #896] @ 0x380 │ │ movs r1, #17 │ │ movt r1, #32768 @ 0x8000 │ │ cmp r0, r1 │ │ - bne.w 64cba │ │ + bne.w 64da2 │ │ add r0, sp, #896 @ 0x380 │ │ - bl 6aed0 │ │ + bl 6afb8 │ │ ldr r0, [sp, #896] @ 0x380 │ │ str r0, [sp, #212] @ 0xd4 │ │ ldr r0, [sp, #900] @ 0x384 │ │ ldr r1, [sp, #228] @ 0xe4 │ │ str r0, [sp, #208] @ 0xd0 │ │ add r0, sp, #896 @ 0x380 │ │ ldrd r7, sl, [sp, #904] @ 0x388 │ │ - bl 6af34 │ │ + bl 6b01c │ │ ldrd r0, r1, [sp, #896] @ 0x380 │ │ cmp r0, #0 │ │ str r1, [sp, #232] @ 0xe8 │ │ - bne.w 64fd8 │ │ + bne.w 650c0 │ │ ldr r6, [sp, #904] @ 0x388 │ │ ldr r1, [sp, #220] @ 0xdc │ │ ldr r2, [sp, #228] @ 0xe4 │ │ mov r0, r6 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr.w r1, [sp, #1136] @ 0x470 │ │ add r0, sp, #896 @ 0x380 │ │ - bl 6af34 │ │ + bl 6b01c │ │ ldrd r0, r4, [sp, #896] @ 0x380 │ │ cmp r0, #1 │ │ - beq.w 64fe0 │ │ + beq.w 650c8 │ │ ldr.w r8, [sp, #904] @ 0x388 │ │ ldr.w r5, [sp, #1136] @ 0x470 │ │ ldr r1, [sp, #224] @ 0xe0 │ │ mov r0, r8 │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ add r2, sp, #328 @ 0x148 │ │ add.w r9, sp, #352 @ 0x160 │ │ add r3, sp, #648 @ 0x288 │ │ ldmia r2, {r0, r1, r2} │ │ stmia r3!, {r0, r1, r2} │ │ mov r0, r9 │ │ mov r1, r7 │ │ mov r2, sl │ │ - bl 6b24c │ │ + bl 6b334 │ │ add r7, sp, #896 @ 0x380 │ │ mov r1, r9 │ │ adds r0, r7, #3 │ │ movs r2, #40 @ 0x28 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr.w r0, [sp, #1148] @ 0x47c │ │ mov r1, r7 │ │ str r0, [sp, #572] @ 0x23c │ │ movs r2, #43 @ 0x2b │ │ ldr.w r0, [sp, #1144] @ 0x478 │ │ str r0, [sp, #568] @ 0x238 │ │ ldr r0, [sp, #228] @ 0xe4 │ │ @@ -91193,115 +91158,115 @@ │ │ ldr r0, [sp, #216] @ 0xd8 │ │ str r0, [sp, #660] @ 0x294 │ │ movs r0, #0 │ │ strb.w r0, [sp, #580] @ 0x244 │ │ str r0, [sp, #576] @ 0x240 │ │ add r0, sp, #560 @ 0x230 │ │ adds r0, #21 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r0, [sp, #208] @ 0xd0 │ │ str r0, [sp, #564] @ 0x234 │ │ ldr r0, [sp, #212] @ 0xd4 │ │ str r0, [sp, #560] @ 0x230 │ │ ldr.w r0, [sp, #1164] @ 0x48c │ │ mov r1, r0 │ │ ldr r0, [r0, #0] │ │ lsls r0, r0, #31 │ │ - beq.n 64bda │ │ + beq.n 64cc2 │ │ add r4, sp, #896 @ 0x380 │ │ add.w r2, r1, #8 │ │ add r1, sp, #560 @ 0x230 │ │ mov r0, r4 │ │ - bl 6b2d0 │ │ + bl 6b3b8 │ │ ldrd r5, r0, [sp, #896] @ 0x380 │ │ add r3, sp, #904 @ 0x388 │ │ add.w ip, sp, #352 @ 0x160 │ │ ldmia r3, {r1, r2, r3} │ │ cmp r5, #4 │ │ stmia.w ip, {r0, r1, r2, r3} │ │ - bne.n 64c44 │ │ + bne.n 64d2c │ │ add r3, sp, #352 @ 0x160 │ │ ldr r6, [sp, #236] @ 0xec │ │ movs r7, #3 │ │ ldmia r3, {r0, r1, r2, r3} │ │ strd r7, r0, [r6] │ │ add.w r0, r6, #8 │ │ stmia r0!, {r1, r2, r3} │ │ add r0, sp, #296 @ 0x128 │ │ - bl 68cf2 │ │ + bl 68dda │ │ add r0, sp, #256 @ 0x100 │ │ - bl 68cc4 │ │ + bl 68dac │ │ ldr.w sl, [sp, #1152] @ 0x480 │ │ - b.w 62788 │ │ + b.w 62870 │ │ sub.w r0, r9, #1 │ │ cmp r0, #2 │ │ - bcs.w 64d42 │ │ + bcs.w 64e2a │ │ movs r6, #17 │ │ movs r4, #0 │ │ movt r6, #32768 @ 0x8000 │ │ sub.w r7, r6, #16 │ │ - b.w 625c2 │ │ + b.w 626aa │ │ ldr r7, [sp, #236] @ 0xec │ │ ldr.w r3, [sp, #905] @ 0x389 │ │ ldr r1, [sp, #908] @ 0x38c │ │ ldrb.w r2, [sp, #904] @ 0x388 │ │ str.w r3, [r7, #13] │ │ str r1, [r7, #16] │ │ movs r1, #3 │ │ strb r2, [r7, #12] │ │ strd r1, r0, [r7] │ │ str r4, [r7, #8] │ │ - b.n 64f24 │ │ + b.n 6500c │ │ ldr r0, [sp, #236] @ 0xec │ │ add r1, sp, #560 @ 0x230 │ │ movs r2, #104 @ 0x68 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add r0, sp, #296 @ 0x128 │ │ - bl 68cf2 │ │ + bl 68dda │ │ add r0, sp, #256 @ 0x100 │ │ - bl 68cc4 │ │ + bl 68dac │ │ ldr r0, [sp, #244] @ 0xf4 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #248] @ 0xf8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [sp, #1152] @ 0x480 │ │ - bl 663ec │ │ + bl 664d4 │ │ addw sp, sp, #1100 @ 0x44c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r1, [pc, #964] @ (64fd4 ) │ │ + ldr r1, [pc, #964] @ (650bc ) │ │ movs r0, #0 │ │ add r1, pc │ │ - bl 5d26c │ │ - b.w 62a8c │ │ + bl 5d448 │ │ + b.w 62b74 │ │ add r3, sp, #896 @ 0x380 │ │ ldr r6, [sp, #236] @ 0xec │ │ movs r7, #3 │ │ cmp r4, #0 │ │ ldmia r3, {r0, r1, r2, r3} │ │ strd r7, r0, [r6] │ │ add.w r0, r6, #8 │ │ stmia r0!, {r1, r2, r3} │ │ - beq.w 64f24 │ │ + beq.w 6500c │ │ mov r0, r4 │ │ - b.n 64f20 │ │ + b.n 65008 │ │ add.w r0, r4, #48 @ 0x30 │ │ mov r1, r0 │ │ - bl 654e8 │ │ - b.w 62648 │ │ + bl 655d0 │ │ + b.w 62730 │ │ add.w r1, r4, #20 │ │ add r0, sp, #664 @ 0x298 │ │ movs r2, #84 @ 0x54 │ │ - bl d52ca │ │ + bl d4c3c │ │ add r3, sp, #352 @ 0x160 │ │ add.w ip, sp, #752 @ 0x2f0 │ │ cmp r5, #3 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r0, r1, r2, r3} │ │ - bne.w 64dc2 │ │ + bne.w 64eaa │ │ movs r0, #0 │ │ ldr r2, [sp, #228] @ 0xe4 │ │ strd r0, r0, [sp, #896] @ 0x380 │ │ ldr.w r0, [sp, #1144] @ 0x478 │ │ str r0, [sp, #8] │ │ ldr.w r0, [sp, #1148] @ 0x47c │ │ str r0, [sp, #12] │ │ @@ -91311,240 +91276,240 @@ │ │ str r0, [sp, #20] │ │ ldr.w r0, [sp, #1160] @ 0x488 │ │ strd r0, r4, [sp, #24] │ │ ldr.w r0, [sp, #1136] @ 0x470 │ │ str r0, [sp, #0] │ │ ldr r0, [sp, #236] @ 0xec │ │ ldrd r1, r3, [sp, #220] @ 0xdc │ │ - bl 62204 │ │ + bl 622ec │ │ add r0, sp, #296 @ 0x128 │ │ - bl 68cf2 │ │ + bl 68dda │ │ add r0, sp, #256 @ 0x100 │ │ - bl 68cc4 │ │ + bl 68dac │ │ ldr r0, [sp, #244] @ 0xf4 │ │ cmp r0, #0 │ │ - beq.n 64c04 │ │ + beq.n 64cec │ │ ldr r0, [sp, #248] @ 0xf8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ addw sp, sp, #1100 @ 0x44c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add r3, sp, #896 @ 0x380 │ │ ldr r6, [sp, #236] @ 0xec │ │ movs r7, #3 │ │ ldmia r3, {r0, r1, r2, r3} │ │ str r0, [r6, #4] │ │ str r1, [r6, #8] │ │ str r2, [r6, #12] │ │ str r7, [r6, #0] │ │ str r3, [r6, #16] │ │ - b.n 64f24 │ │ + b.n 6500c │ │ movs r3, #22 │ │ adds r2, #1 │ │ str r3, [sp, #352] @ 0x160 │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #352 @ 0x160 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ str.w r0, [sp, #1028] @ 0x404 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ cmp.w r9, #0 │ │ str.w r0, [sp, #1024] @ 0x400 │ │ - beq.n 64d0e │ │ + beq.n 64df6 │ │ ldr r4, [sp, #200] @ 0xc8 │ │ mov r0, r4 │ │ - bl 5becc │ │ + bl 5c0dc │ │ adds r4, #52 @ 0x34 │ │ subs.w r9, r9, #1 │ │ - bne.n 64d00 │ │ + bne.n 64de8 │ │ cmp.w r8, #0 │ │ - beq.w 62bd6 │ │ + beq.w 62cbe │ │ ldr r0, [sp, #200] @ 0xc8 │ │ - blx d87c0 │ │ - b.w 62bd6 │ │ + blx d87d0 │ │ + b.w 62cbe │ │ ldr r6, [sp, #236] @ 0xec │ │ ldr r7, [sp, #908] @ 0x38c │ │ ldr.w r1, [sp, #905] @ 0x389 │ │ str r7, [r6, #16] │ │ str.w r1, [r6, #13] │ │ movs r1, #3 │ │ strb r3, [r6, #12] │ │ strd r1, r0, [r6] │ │ str r2, [r6, #8] │ │ - b.n 64f24 │ │ + b.n 6500c │ │ adds.w r0, r9, #1 │ │ - beq.w 65034 │ │ + beq.w 6511c │ │ mov r0, r9 │ │ - blx a96f8 │ │ + blx a9704 │ │ mov r4, r0 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #896 @ 0x380 │ │ mov r1, r4 │ │ - bl 402e0 │ │ + bl 405e8 │ │ add r7, sp, #896 @ 0x380 │ │ ldmia r7, {r0, r1, r7} │ │ - ldr r4, [pc, #772] @ (65064 ) │ │ + ldr r4, [pc, #772] @ (6514c ) │ │ cmp r0, #0 │ │ add r4, pc │ │ ite eq │ │ moveq r4, r1 │ │ movne r7, #27 │ │ cmp.w r7, #4294967295 @ 0xffffffff │ │ - ble.w 627f2 │ │ - cbz r7, 64d84 │ │ + ble.w 628da │ │ + cbz r7, 64e6c │ │ mov r0, r7 │ │ movs r1, #1 │ │ - bl 4191c │ │ + bl 41c24 │ │ cmp r0, #0 │ │ - beq.w 64f42 │ │ + beq.w 6502a │ │ mov r5, r0 │ │ - b.n 64d86 │ │ + b.n 64e6e │ │ movs r5, #1 │ │ mov r0, r5 │ │ mov r1, r4 │ │ mov r2, r7 │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #0 │ │ cmp.w sl, #0 │ │ strb.w r0, [r8] │ │ - bne.w 62758 │ │ - b.w 6275e │ │ + bne.w 62840 │ │ + b.w 62846 │ │ ldrb.w r0, [sp, #907] @ 0x38b │ │ ldr r2, [sp, #908] @ 0x38c │ │ ldrh.w r1, [sp, #905] @ 0x389 │ │ str r2, [sp, #180] @ 0xb4 │ │ orr.w r0, r1, r0, lsl #16 │ │ str r0, [sp, #196] @ 0xc4 │ │ lsrs r0, r2, #8 │ │ str r0, [sp, #132] @ 0x84 │ │ - b.n 64eee │ │ + b.n 64fd6 │ │ movs r0, #1 │ │ movs r1, #23 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ add r3, sp, #752 @ 0x2f0 │ │ ldr r4, [sp, #236] @ 0xec │ │ ldmia r3, {r0, r1, r2, r3} │ │ add.w ip, r4, #4 │ │ stmia.w ip, {r0, r1, r2, r3} │ │ add.w r0, r4, #20 │ │ add r1, sp, #664 @ 0x298 │ │ movs r2, #84 @ 0x54 │ │ - bl d52ca │ │ + bl d4c3c │ │ str r5, [r4, #0] │ │ - b.n 64be4 │ │ + b.n 64ccc │ │ ldrb.w r0, [sp, #1032] @ 0x408 │ │ str r0, [sp, #208] @ 0xd0 │ │ ldr.w r0, [sp, #1028] @ 0x404 │ │ str r0, [sp, #188] @ 0xbc │ │ addw r0, sp, #1060 @ 0x424 │ │ ldrb.w r6, [sp, #1035] @ 0x40b │ │ ldrh.w r7, [sp, #1033] @ 0x409 │ │ ldr.w r5, [sp, #1036] @ 0x40c │ │ - bl 477c6 │ │ + bl 47ace │ │ ldrd r8, r1, [sp, #860] @ 0x35c │ │ mov r0, r8 │ │ - bl 47738 │ │ + bl 47a40 │ │ orr.w r1, r7, r6, lsl #16 │ │ str r1, [sp, #196] @ 0xc4 │ │ lsrs r1, r5, #8 │ │ ldr r0, [sp, #856] @ 0x358 │ │ str r5, [sp, #180] @ 0xb4 │ │ str r1, [sp, #132] @ 0x84 │ │ - b.n 64eb8 │ │ + b.n 64fa0 │ │ mov.w r8, #2147483648 @ 0x80000000 │ │ - b.w 62ae8 │ │ + b.w 62bd0 │ │ ldr r0, [sp, #180] @ 0xb4 │ │ lsrs r0, r0, #8 │ │ str r0, [sp, #132] @ 0x84 │ │ ldr r0, [sp, #184] @ 0xb8 │ │ lsrs r0, r0, #8 │ │ str r0, [sp, #196] @ 0xc4 │ │ - b.n 64ef4 │ │ + b.n 64fdc │ │ ldr r1, [sp, #156] @ 0x9c │ │ ldr r0, [sp, #200] @ 0xc8 │ │ orr.w r0, r0, r1, lsl #8 │ │ str r0, [sp, #188] @ 0xbc │ │ ldr r0, [sp, #168] @ 0xa8 │ │ - cbz r0, 64e5c │ │ + cbz r0, 64f44 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ add.w r5, r0, #44 @ 0x2c │ │ ldr.w r0, [r5, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #168] @ 0xa8 │ │ adds r5, #56 @ 0x38 │ │ subs r0, #1 │ │ str r0, [sp, #168] @ 0xa8 │ │ - bne.n 64e44 │ │ + bne.n 64f2c │ │ ldr r0, [sp, #160] @ 0xa0 │ │ - cbz r0, 64e66 │ │ + cbz r0, 64f4e │ │ ldr r0, [sp, #164] @ 0xa4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #172] @ 0xac │ │ str r0, [sp, #132] @ 0x84 │ │ - b.n 64ea6 │ │ + b.n 64f8e │ │ add.w r0, r4, #28 │ │ mov r1, r0 │ │ - bl 654e8 │ │ - b.w 62882 │ │ + bl 655d0 │ │ + b.w 6296a │ │ ldr.w r0, [sp, #1028] @ 0x404 │ │ str r0, [sp, #188] @ 0xbc │ │ ldr.w r0, [sp, #1032] @ 0x408 │ │ str r0, [sp, #184] @ 0xb8 │ │ ldr.w r0, [sp, #1036] @ 0x40c │ │ str r0, [sp, #180] @ 0xb4 │ │ add r0, sp, #896 @ 0x380 │ │ - bl 46ae0 │ │ + bl 46e34 │ │ ldr r0, [sp, #184] @ 0xb8 │ │ lsrs r0, r0, #8 │ │ str r0, [sp, #196] @ 0xc4 │ │ ldr r0, [sp, #180] @ 0xb4 │ │ lsrs r0, r0, #8 │ │ str r0, [sp, #132] @ 0x84 │ │ - b.n 64eee │ │ + b.n 64fd6 │ │ orr.w r0, r9, r8, lsl #8 │ │ str r0, [sp, #188] @ 0xbc │ │ add r0, sp, #880 @ 0x370 │ │ - bl 477c6 │ │ + bl 47ace │ │ ldrd r8, r1, [sp, #860] @ 0x35c │ │ mov r0, r8 │ │ - bl 47738 │ │ + bl 47a40 │ │ ldr r0, [sp, #856] @ 0x358 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r5, r6, [sp, #836] @ 0x344 │ │ - cbz r6, 64ede │ │ + cbz r6, 64fc6 │ │ add.w r7, r5, #16 │ │ ldr r0, [r7, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r7, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r7, #40 @ 0x28 │ │ subs r6, #1 │ │ - bne.n 64ecc │ │ + bne.n 64fb4 │ │ ldr r0, [sp, #832] @ 0x340 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #208] @ 0xd0 │ │ str r0, [sp, #184] @ 0xb8 │ │ add r0, sp, #768 @ 0x300 │ │ - bl 4b880 │ │ + bl 4bb88 │ │ ldr r1, [sp, #180] @ 0xb4 │ │ ldr r2, [sp, #132] @ 0x84 │ │ ldr r3, [sp, #196] @ 0xc4 │ │ uxtb r1, r1 │ │ ldr r7, [sp, #236] @ 0xec │ │ orr.w r1, r1, r2, lsl #8 │ │ ldr r2, [sp, #184] @ 0xb8 │ │ @@ -91554,341 +91519,341 @@ │ │ orr.w r2, r2, r3, lsl #8 │ │ mov.w r3, #3 │ │ str r3, [r7, #0] │ │ ldr r3, [sp, #204] @ 0xcc │ │ str r3, [r7, #4] │ │ ldr r3, [sp, #188] @ 0xbc │ │ strd r3, r2, [r7, #8] │ │ - cbz r0, 64f24 │ │ - blx 9bb60 │ │ + cbz r0, 6500c │ │ + blx 9bb6c │ │ add r0, sp, #328 @ 0x148 │ │ - bl 6b7b4 │ │ + bl 6b89c │ │ add r0, sp, #296 @ 0x128 │ │ - bl 68cf2 │ │ + bl 68dda │ │ add r0, sp, #256 @ 0x100 │ │ - bl 68cc4 │ │ + bl 68dac │ │ ldr.w sl, [sp, #1152] @ 0x480 │ │ ldr r6, [sp, #240] @ 0xf0 │ │ ldr r5, [sp, #216] @ 0xd8 │ │ - b.w 6295c │ │ + b.w 62a44 │ │ movs r0, #1 │ │ mov r1, r7 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ ldr r0, [sp, #200] @ 0xc8 │ │ add r1, sp, #896 @ 0x380 │ │ - bl 5c46a │ │ - b.w 6290a │ │ - ldr r2, [pc, #284] @ (65074 ) │ │ + bl 22434 │ │ + b.w 629f2 │ │ + ldr r2, [pc, #284] @ (6515c ) │ │ add r4, sp, #896 @ 0x380 │ │ addw r1, sp, #1060 @ 0x424 │ │ add r2, pc │ │ mov r0, r4 │ │ - bl 5c22c │ │ + bl 5c43c │ │ mov r1, r4 │ │ - bl 5c46a │ │ - b.w 6290a │ │ - ldr r0, [pc, #280] @ (6508c ) │ │ + bl 22434 │ │ + b.w 629f2 │ │ + ldr r0, [pc, #280] @ (65174 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #276] @ (65090 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #276] @ (65178 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r1, [pc, #252] @ (65080 ) │ │ + bl 3fd40 │ │ + ldr r1, [pc, #252] @ (65168 ) │ │ movs r2, #11 │ │ - ldr r0, [pc, #252] @ (65084 ) │ │ + ldr r0, [pc, #252] @ (6516c ) │ │ add r1, pc │ │ str r1, [sp, #356] @ 0x164 │ │ add r1, sp, #296 @ 0x128 │ │ str r1, [sp, #352] @ 0x160 │ │ add r0, pc │ │ add r1, sp, #352 @ 0x160 │ │ strd r7, r2, [sp, #296] @ 0x128 │ │ - bl 754ec │ │ + bl 5f210 │ │ str r0, [sp, #200] @ 0xc8 │ │ mov.w r8, #2147483648 @ 0x80000000 │ │ - b.w 62ae8 │ │ - ldr r0, [pc, #248] @ (650a0 ) │ │ + b.w 62bd0 │ │ + ldr r0, [pc, #248] @ (65188 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r1, [pc, #200] @ (65078 ) │ │ + bl 3fd40 │ │ + ldr r1, [pc, #200] @ (65160 ) │ │ movs r2, #11 │ │ - ldr r0, [pc, #200] @ (6507c ) │ │ + ldr r0, [pc, #200] @ (65164 ) │ │ add r1, pc │ │ str r1, [sp, #356] @ 0x164 │ │ add r1, sp, #296 @ 0x128 │ │ str r1, [sp, #352] @ 0x160 │ │ add r0, pc │ │ add r1, sp, #352 @ 0x160 │ │ strd r7, r2, [sp, #296] @ 0x128 │ │ - bl 754ec │ │ + bl 5f210 │ │ mov r6, r0 │ │ cmp.w r9, #0 │ │ - bne.w 62ac6 │ │ - b.w 62ad6 │ │ - ldrh r4, [r4, r5] │ │ + bne.w 62bae │ │ + b.w 62bbe │ │ + ldrh r4, [r1, r2] │ │ movs r7, r0 │ │ ldr r1, [sp, #904] @ 0x388 │ │ ldr r0, [sp, #232] @ 0xe8 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ ldr r1, [sp, #904] @ 0x388 │ │ mov r0, r4 │ │ - bl 3dfa4 │ │ - ldr r0, [pc, #184] @ (650a4 ) │ │ + bl 3e2ac │ │ + ldr r0, [pc, #184] @ (6518c ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #116] @ (65068 ) │ │ - ldr r3, [pc, #120] @ (6506c ) │ │ - ldr r1, [pc, #120] @ (65070 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #116] @ (65150 ) │ │ + ldr r3, [pc, #120] @ (65154 ) │ │ + ldr r1, [pc, #120] @ (65158 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ addw r2, sp, #1060 @ 0x424 │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ movs r0, #1 │ │ movs r1, #33 @ 0x21 │ │ - bl 3dfa4 │ │ - ldr r2, [pc, #116] @ (65088 ) │ │ + bl 3e2ac │ │ + ldr r2, [pc, #116] @ (65170 ) │ │ mov r0, r6 │ │ mov r1, r3 │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ ldr r1, [sp, #192] @ 0xc0 │ │ movs r0, #1 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #8 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r1, r9 │ │ - bl 3dfa4 │ │ - ldr r0, [pc, #36] @ (6505c ) │ │ + bl 3e2ac │ │ + ldr r0, [pc, #36] @ (65144 ) │ │ movs r1, #40 @ 0x28 │ │ - ldr r2, [pc, #36] @ (65060 ) │ │ + ldr r2, [pc, #36] @ (65148 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r0, [pc, #80] @ (65094 ) │ │ - ldr r3, [pc, #80] @ (65098 ) │ │ - ldr r1, [pc, #84] @ (6509c ) │ │ + bl 3fd54 │ │ + ldr r0, [pc, #80] @ (6517c ) │ │ + ldr r3, [pc, #80] @ (65180 ) │ │ + ldr r1, [pc, #84] @ (65184 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ addw r2, sp, #1060 @ 0x424 │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ nop │ │ - add r3, r2 │ │ - @ instruction: 0xfffb5cd0 │ │ + orrs r3, r5 │ │ + @ instruction: 0xfffb5bf8 │ │ movs r7, r0 │ │ - adds r5, r0, #5 │ │ - vrsqrte.u32 d20, d13 │ │ - vqrshrn.u64 d21, q2, #5 │ │ + adds r5, r3, #1 │ │ + vcvtm.u32.f32 d20, d21 │ │ + vtbx.8 d21, {d11}, d12 │ │ movs r7, r0 │ │ - str r2, [r2, #20] │ │ + str r2, [r7, #4] │ │ movs r7, r0 │ │ - ldrb r6, [r1, r3] │ │ + ldrh r6, [r4, r7] │ │ movs r7, r0 │ │ - add r1, pc, #716 @ (adr r1, 65348 ) │ │ - @ instruction: 0xffff3ef3 │ │ - vsra.u64 q13, , #6 │ │ - vqrshrn.u64 d19, , #1 │ │ - @ instruction: 0xfffa5a96 │ │ + add r1, pc, #412 @ (adr r1, 65300 ) │ │ + vcvt.u16.f16 , , #1 │ │ + vsra.u64 d26, d3, #6 │ │ + vtbx.8 d19, {d15}, d29 │ │ + @ instruction: 0xfffa59be │ │ movs r7, r0 │ │ - str r2, [r5, #24] │ │ + str r2, [r2, #12] │ │ movs r7, r0 │ │ - str r2, [r6, #24] │ │ + str r2, [r3, #12] │ │ movs r7, r0 │ │ - add r3, r7 │ │ - vtbl.8 d21, {d11-d12}, d2 │ │ + muls r3, r2 │ │ + vqshl.u64 , q13, #59 @ 0x3b │ │ movs r7, r0 │ │ - ldrh r0, [r4, r0] │ │ + ldr r0, [r1, r5] │ │ movs r7, r0 │ │ - ldrsh r6, [r2, r0] │ │ + ldrb r6, [r7, r4] │ │ movs r7, r0 │ │ - ldrh r2, [r4, r5] │ │ + ldrh r2, [r1, r2] │ │ movs r7, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ sub sp, #28 │ │ cmp.w r3, #4294967295 @ 0xffffffff │ │ - bgt.n 650b8 │ │ - bl 3e03c │ │ + bgt.n 651a0 │ │ + bl 3e344 │ │ mov r6, r3 │ │ mov r8, r2 │ │ mov r7, r1 │ │ mov r9, r0 │ │ - cbz r3, 650f2 │ │ + cbz r3, 651da │ │ mov r0, r6 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 65246 │ │ + beq.w 6532e │ │ mov r1, r8 │ │ mov r2, r6 │ │ mov r5, r0 │ │ - bl d53c6 │ │ + bl d52ea │ │ adds r0, r5, r6 │ │ str r6, [sp, #16] │ │ strd r6, r5, [sp, #8] │ │ ldrb.w r0, [r0, #-1] │ │ subs.w r1, r0, #47 @ 0x2f │ │ mov r0, r6 │ │ it ne │ │ movne r1, #1 │ │ - cbnz r7, 65100 │ │ - b.n 6510e │ │ + cbnz r7, 651e8 │ │ + b.n 651f6 │ │ movs r0, #0 │ │ movs r5, #1 │ │ str r0, [sp, #16] │ │ movs r1, #0 │ │ strd r0, r5, [sp, #8] │ │ - cbz r7, 6510e │ │ + cbz r7, 651f6 │ │ ldrb.w r2, [r9] │ │ cmp r2, #47 @ 0x2f │ │ - bne.n 6510e │ │ + bne.n 651f6 │ │ movs r4, #0 │ │ str r4, [sp, #16] │ │ - b.n 65114 │ │ + b.n 651fc │ │ mov r4, r6 │ │ cmp r1, #0 │ │ - bne.n 651ec │ │ + bne.n 652d4 │ │ subs r0, r0, r4 │ │ cmp r7, r0 │ │ - bhi.n 6520a │ │ + bhi.n 652f2 │ │ adds r0, r5, r4 │ │ mov r1, r9 │ │ mov r2, r7 │ │ - bl d53c6 │ │ + bl d52ea │ │ adds r1, r4, r7 │ │ str r1, [sp, #16] │ │ - beq.n 65146 │ │ + beq.n 6522e │ │ ldr r0, [sp, #12] │ │ adds r2, r0, r1 │ │ ldrb.w r2, [r2, #-1] │ │ cmp r2, #47 @ 0x2f │ │ - beq.n 65148 │ │ + beq.n 65230 │ │ ldr r2, [sp, #8] │ │ cmp r2, r1 │ │ - beq.n 65232 │ │ + beq.n 6531a │ │ movs r2, #47 @ 0x2f │ │ strb r2, [r0, r1] │ │ adds r1, #1 │ │ str r1, [sp, #16] │ │ - b.n 65148 │ │ + b.n 65230 │ │ movs r1, #0 │ │ ldr r0, [sp, #8] │ │ ldrd r5, r4, [sp, #56] @ 0x38 │ │ subs r0, r0, r1 │ │ cmp r0, #7 │ │ - bls.n 65220 │ │ + bls.n 65308 │ │ ldr r3, [sp, #12] │ │ movw r0, #25709 @ 0x646d │ │ movt r0, #30818 @ 0x7862 │ │ movw r2, #25646 @ 0x642e │ │ movt r2, #29793 @ 0x7461 │ │ str r0, [r3, r1] │ │ adds r0, r3, r1 │ │ str r2, [r0, #4] │ │ add.w r2, r1, #8 │ │ add r0, sp, #20 │ │ mov r1, r3 │ │ mov r3, r5 │ │ str r4, [sp, #0] │ │ - bl 95230 │ │ + bl 9529c │ │ cmp r7, #7 │ │ - bne.n 651aa │ │ - ldr r1, [pc, #204] @ (65250 ) │ │ + bne.n 65292 │ │ + ldr r1, [pc, #204] @ (65338 ) │ │ mov r0, r9 │ │ movs r2, #7 │ │ add r1, pc │ │ - blx d8860 │ │ + blx d8870 │ │ ldrb.w r7, [sp, #20] │ │ - cbnz r0, 651ae │ │ + cbnz r0, 65296 │ │ cmp r7, #4 │ │ - beq.n 651ae │ │ - ldr r0, [pc, #188] @ (65254 ) │ │ + beq.n 65296 │ │ + ldr r0, [pc, #188] @ (6533c ) │ │ movs r1, #4 │ │ mov r2, r8 │ │ mov r3, r6 │ │ add r0, pc │ │ strd r5, r4, [sp] │ │ - bl 650a8 │ │ - b.n 651ae │ │ + bl 65190 │ │ + b.n 65296 │ │ ldrb.w r7, [sp, #20] │ │ ldr r4, [sp, #24] │ │ cmp r7, #4 │ │ - bhi.n 651ca │ │ + bhi.n 652b2 │ │ cmp r7, #3 │ │ - beq.n 651ca │ │ + beq.n 652b2 │ │ ldr r0, [sp, #8] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #12] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ ldrd r5, r6, [r4] │ │ ldr r1, [r6, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r5 │ │ blxne r1 │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ - b.n 651b8 │ │ + blx d87d0 │ │ + b.n 652a0 │ │ movs r0, #1 │ │ mov r1, r6 │ │ str r0, [sp, #0] │ │ add r0, sp, #8 │ │ movs r2, #1 │ │ movs r3, #1 │ │ - bl 77788 │ │ + bl 777f0 │ │ ldr r1, [sp, #16] │ │ movs r2, #47 @ 0x2f │ │ ldrd r0, r5, [sp, #8] │ │ adds r4, r1, #1 │ │ strb r2, [r5, r1] │ │ - b.n 6510a │ │ + b.n 651f2 │ │ movs r0, #1 │ │ mov r1, r4 │ │ str r0, [sp, #0] │ │ add r0, sp, #8 │ │ mov r2, r7 │ │ movs r3, #1 │ │ - bl 77788 │ │ + bl 777f0 │ │ ldrd r5, r4, [sp, #12] │ │ - b.n 6511a │ │ + b.n 65202 │ │ movs r0, #1 │ │ movs r2, #8 │ │ str r0, [sp, #0] │ │ add r0, sp, #8 │ │ movs r3, #1 │ │ - bl 77788 │ │ + bl 777f0 │ │ ldr r1, [sp, #16] │ │ - b.n 65154 │ │ + b.n 6523c │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ add r0, sp, #8 │ │ movs r3, #1 │ │ - bl 77788 │ │ + bl 777f0 │ │ ldrd r0, r1, [sp, #12] │ │ - b.n 6513c │ │ + b.n 65224 │ │ movs r0, #1 │ │ mov r1, r6 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - subs r7, r0, #1 │ │ - vshr.u64 d17, d6, #5 │ │ + adds r7, r3, #5 │ │ + @ instruction: 0xfffb0fae │ │ vtbl.8 d30, {d11-d12}, d29 │ │ rors r0, r6 │ │ sub sp, #24 │ │ mov r4, r0 │ │ movs r0, #0 │ │ add r3, sp, #8 │ │ mov r6, r2 │ │ @@ -91896,74 +91861,74 @@ │ │ mov.w r2, #131072 @ 0x20000 │ │ str r0, [sp, #0] │ │ mov r0, r1 │ │ movs r1, #0 │ │ cmp r6, #0 │ │ it ne │ │ movne r2, #0 │ │ - blx ad180 │ │ + blx ad190 │ │ movs r5, #3 │ │ adds r1, r0, #1 │ │ movt r5, #32768 @ 0x8000 │ │ cmp r1, #2 │ │ - bcs.n 6529a │ │ + bcs.n 65382 │ │ ldr r0, [sp, #8] │ │ add.w r1, r5, #14 │ │ strb r6, [r4, #8] │ │ strd r1, r0, [r4] │ │ add sp, #24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movw r1, #34744 @ 0x87b8 │ │ movt r1, #65535 @ 0xffff │ │ cmp r0, r1 │ │ - bne.n 652b4 │ │ + bne.n 6539c │ │ strd r5, r7, [r4] │ │ strd r5, r0, [r4, #8] │ │ add sp, #24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ mov r8, r0 │ │ - blx a96f8 │ │ + blx a9704 │ │ mov r5, r0 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #12 │ │ mov r1, r5 │ │ - bl 402e0 │ │ + bl 405e8 │ │ add r5, sp, #12 │ │ ldmia r5, {r0, r1, r5} │ │ - ldr r6, [pc, #72] @ (65318 ) │ │ + ldr r6, [pc, #72] @ (65400 ) │ │ cmp r0, #0 │ │ add r6, pc │ │ ite eq │ │ moveq r6, r1 │ │ movne r5, #27 │ │ cmp.w r5, #4294967295 @ 0xffffffff │ │ - bgt.n 652e4 │ │ - bl 3e03c │ │ - cbz r5, 652f2 │ │ + bgt.n 653cc │ │ + bl 3e344 │ │ + cbz r5, 653da │ │ mov r0, r5 │ │ - blx d87f0 │ │ - cbz r0, 6530e │ │ + blx d8810 │ │ + cbz r0, 653f6 │ │ mov r7, r0 │ │ - b.n 652f4 │ │ + b.n 653dc │ │ movs r7, #1 │ │ mov r0, r7 │ │ mov r1, r6 │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ mov r0, r8 │ │ strd r5, r7, [r4] │ │ strd r5, r0, [r4, #8] │ │ add sp, #24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movs r0, #1 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - asrs r3, r2, #31 │ │ + asrs r3, r5, #27 │ │ vtbl.8 d30, {d11-d12}, d29 │ │ blx lr │ │ sub sp, #40 @ 0x28 │ │ mov r7, r1 │ │ ldrd r1, sl, [sp, #72] @ 0x48 │ │ mov r8, r0 │ │ ldr r0, [sp, #80] @ 0x50 │ │ @@ -91979,428 +91944,428 @@ │ │ cmp r0, #0 │ │ it ne │ │ movne r6, #52 @ 0x34 │ │ cmp.w sl, #0 │ │ movt r5, #32768 @ 0x8000 │ │ it ne │ │ addne r4, r6 │ │ - cbz r2, 65394 │ │ + cbz r2, 6547c │ │ add r0, sp, #8 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 3edda │ │ + bl 3f0e2 │ │ ldr r0, [sp, #8] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.w 654a4 │ │ + bne.w 6558c │ │ ldrd r6, r9, [sp, #12] │ │ add r3, sp, #4 │ │ mov r0, r7 │ │ mov r2, r4 │ │ mov r1, r6 │ │ - blx 9fc88 │ │ + blx 9fc94 │ │ adds r1, r0, #1 │ │ cmp r1, #2 │ │ - bcs.n 653ba │ │ + bcs.n 654a2 │ │ movs r0, #0 │ │ cmp.w r9, #0 │ │ strb r0, [r6, #0] │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ - b.n 653a6 │ │ + blxne d87d0 │ │ + b.n 6548e │ │ add r3, sp, #4 │ │ mov r0, r7 │ │ movs r1, #0 │ │ movs r2, #0 │ │ - blx 9fc88 │ │ + blx 9fc94 │ │ adds r1, r0, #1 │ │ cmp r1, #2 │ │ - bcs.n 653c8 │ │ + bcs.n 654b0 │ │ ldr r0, [sp, #4] │ │ add.w r1, r5, #14 │ │ strb.w sl, [r8, #8] │ │ strd r1, r0, [r8] │ │ add sp, #40 @ 0x28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ movw r1, #34744 @ 0x87b8 │ │ movt r1, #65535 @ 0xffff │ │ cmp r0, r1 │ │ - bne.n 653e2 │ │ - b.n 6546a │ │ + bne.n 654ca │ │ + b.n 65552 │ │ movw r1, #34744 @ 0x87b8 │ │ movt r1, #65535 @ 0xffff │ │ cmp r0, r1 │ │ - bne.n 6541e │ │ + bne.n 65506 │ │ strd r5, r6, [r8] │ │ strd r5, r0, [r8, #8] │ │ add sp, #40 @ 0x28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ mov sl, r0 │ │ - blx a96f8 │ │ + blx a9704 │ │ mov r4, r0 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #24 │ │ mov r1, r4 │ │ - bl 402e0 │ │ + bl 405e8 │ │ add r5, sp, #24 │ │ ldmia r5, {r0, r1, r5} │ │ - ldr r4, [pc, #212] @ (654d4 ) │ │ + ldr r4, [pc, #212] @ (655bc ) │ │ cmp r0, #0 │ │ add r4, pc │ │ ite eq │ │ moveq r4, r1 │ │ movne r5, #27 │ │ cmp.w r5, #4294967295 @ 0xffffffff │ │ - ble.n 6544a │ │ - cbz r5, 6545c │ │ + ble.n 65532 │ │ + cbz r5, 65544 │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 654ca │ │ + beq.n 655b2 │ │ mov r7, r0 │ │ - b.n 6545e │ │ + b.n 65546 │ │ mov r7, r0 │ │ - blx a96f8 │ │ + blx a9704 │ │ mov r4, r0 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #24 │ │ mov r1, r4 │ │ - bl 402e0 │ │ + bl 405e8 │ │ add r5, sp, #24 │ │ ldmia r5, {r0, r1, r5} │ │ - ldr r4, [pc, #156] @ (654d8 ) │ │ + ldr r4, [pc, #156] @ (655c0 ) │ │ cmp r0, #0 │ │ add r4, pc │ │ ite eq │ │ moveq r4, r1 │ │ movne r5, #27 │ │ cmp.w r5, #4294967295 @ 0xffffffff │ │ - bgt.n 6544e │ │ - bl 3e03c │ │ - cbz r5, 65488 │ │ + bgt.n 65536 │ │ + bl 3e344 │ │ + cbz r5, 65570 │ │ mov r0, r5 │ │ - blx d87f0 │ │ - cbz r0, 654ca │ │ + blx d8810 │ │ + cbz r0, 655b2 │ │ mov r6, r0 │ │ - b.n 6548a │ │ + b.n 65572 │ │ movs r7, #1 │ │ mov r0, r7 │ │ mov r1, r4 │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ mov r0, sl │ │ strd r5, r0, [r8, #8] │ │ movs r0, #0 │ │ cmp.w r9, #0 │ │ strd r5, r7, [r8] │ │ strb r0, [r6, #0] │ │ - beq.n 653b4 │ │ + beq.n 6549c │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add sp, #40 @ 0x28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ movs r6, #1 │ │ mov r0, r6 │ │ mov r1, r4 │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ mov r0, r7 │ │ strd r5, r6, [r8] │ │ strd r5, r0, [r8, #8] │ │ add sp, #40 @ 0x28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ add r7, sp, #8 │ │ ldr r6, [sp, #20] │ │ add.w ip, sp, #24 │ │ ldmia r7, {r1, r2, r7} │ │ - ldr r0, [pc, #44] @ (654dc ) │ │ - ldr r3, [pc, #44] @ (654e0 ) │ │ - ldr r4, [pc, #48] @ (654e4 ) │ │ + ldr r0, [pc, #44] @ (655c4 ) │ │ + ldr r3, [pc, #44] @ (655c8 ) │ │ + ldr r4, [pc, #48] @ (655cc ) │ │ add r0, pc │ │ stmia.w ip, {r1, r2, r7} │ │ add r3, pc │ │ add r2, sp, #24 │ │ movs r1, #43 @ 0x2b │ │ add r4, pc │ │ str r6, [sp, #36] @ 0x24 │ │ str r4, [sp, #0] │ │ - bl 414b0 │ │ + bl 417b8 │ │ movs r0, #1 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - asrs r5, r4, #26 │ │ - vcvt.f32.s32 , │ │ - vqrdmlsh.s , , d15[0] │ │ - vsri.32 , q1, #5 │ │ + asrs r5, r7, #22 │ │ + vrsqrte.f32 d17, d1 │ │ + vqrdmlah.s , , d23[0] │ │ + vcvtm.s32.f32 , q13 │ │ movs r7, r0 │ │ - ldr r4, [r7, r0] │ │ + ldrsb r4, [r4, r5] │ │ movs r7, r0 │ │ push {r7, lr} │ │ sub sp, #24 │ │ - ldr r2, [pc, #32] @ (65510 ) │ │ + ldr r2, [pc, #32] @ (655f8 ) │ │ str r1, [sp, #0] │ │ adds r1, r0, #4 │ │ str r1, [sp, #4] │ │ add.w r1, sp, #23 │ │ str r1, [sp, #16] │ │ add r1, sp, #4 │ │ str r1, [sp, #12] │ │ mov r1, sp │ │ str r1, [sp, #8] │ │ add r2, pc │ │ add r1, sp, #8 │ │ - bl 70aa8 │ │ + bl 70b5c │ │ add sp, #24 │ │ pop {r7, pc} │ │ nop │ │ - ldrb r2, [r7, r4] │ │ + ldrb r2, [r4, r1] │ │ movs r7, r0 │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #4 │ │ ldr r6, [r0, #0] │ │ cmp.w r6, #2147483648 @ 0x80000000 │ │ - bne.n 65532 │ │ + bne.n 6561a │ │ ldr r4, [r0, #4] │ │ ldr r0, [r4, #0] │ │ cmp r0, #1 │ │ - beq.n 65558 │ │ - cbnz r0, 65548 │ │ + beq.n 65640 │ │ + cbnz r0, 65630 │ │ ldr r0, [r4, #8] │ │ - cbz r0, 65548 │ │ + cbz r0, 65630 │ │ ldr r5, [r4, #4] │ │ - b.n 6557a │ │ + b.n 65662 │ │ ldrd r4, r7, [r0, #4] │ │ - cbz r7, 65546 │ │ + cbz r7, 6562e │ │ mov r5, r4 │ │ mov r0, r5 │ │ - bl 5becc │ │ + bl 5c0dc │ │ adds r5, #52 @ 0x34 │ │ subs r7, #1 │ │ - bne.n 6553a │ │ - cbz r6, 65554 │ │ + bne.n 65622 │ │ + cbz r6, 6563c │ │ mov r0, r4 │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #4 │ │ pop {r4, r5, r6, r7, pc} │ │ ldrb r0, [r4, #4] │ │ cmp r0, #3 │ │ - bne.n 65548 │ │ + bne.n 65630 │ │ ldr r5, [r4, #8] │ │ ldrd r6, r7, [r5] │ │ ldr r1, [r7, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r6 │ │ blxne r1 │ │ ldr r0, [r7, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #108 @ 0x6c │ │ ldr r7, [r2, #8] │ │ cmp.w r7, #4294967295 @ 0xffffffff │ │ - bgt.n 6559e │ │ - bl 3e03c │ │ + bgt.n 65686 │ │ + bl 3e344 │ │ ldr.w r9, [r2, #4] │ │ mov sl, r1 │ │ mov r4, r0 │ │ - cbz r7, 655bc │ │ + cbz r7, 656a4 │ │ mov r0, r7 │ │ mov r5, r2 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 663d4 │ │ + beq.w 664bc │ │ mov r6, r0 │ │ mov r2, r5 │ │ - b.n 655be │ │ + b.n 656a6 │ │ movs r6, #1 │ │ str r2, [sp, #24] │ │ mov r0, r6 │ │ mov r1, r9 │ │ mov r2, r7 │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #128 @ 0x80 │ │ movs r5, #128 @ 0x80 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 663cc │ │ - ldr r1, [pc, #876] @ (65948 ) │ │ + beq.w 664b4 │ │ + ldr r1, [pc, #876] @ (65a30 ) │ │ movs r3, #123 @ 0x7b │ │ add r2, sp, #40 @ 0x28 │ │ strd r5, r0, [sp, #40] @ 0x28 │ │ strb r3, [r0, #0] │ │ movs r0, #2 │ │ strb.w r0, [sp, #60] @ 0x3c │ │ add r0, sp, #52 @ 0x34 │ │ add r1, pc │ │ mov.w r8, #1 │ │ str r0, [sp, #56] @ 0x38 │ │ mov r0, r2 │ │ str r2, [sp, #52] @ 0x34 │ │ movs r2, #4 │ │ str.w r8, [sp, #48] @ 0x30 │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr r5, [sp, #52] @ 0x34 │ │ str r6, [sp, #16] │ │ strd sl, r4, [sp, #8] │ │ ldr r1, [r5, #8] │ │ ldr r0, [r5, #0] │ │ cmp r0, r1 │ │ - beq.w 66208 │ │ + beq.w 662f0 │ │ ldr r0, [r5, #4] │ │ movs r2, #58 @ 0x3a │ │ str r7, [sp, #20] │ │ strb r2, [r0, r1] │ │ adds r1, #1 │ │ mov r2, r7 │ │ ldr r0, [sp, #52] @ 0x34 │ │ str r1, [r5, #8] │ │ mov r1, r9 │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr r7, [sp, #24] │ │ add r0, sp, #56 @ 0x38 │ │ movs r2, #8 │ │ ldrb.w r3, [r7, #48] @ 0x30 │ │ - ldr r1, [pc, #788] @ (6594c ) │ │ + ldr r1, [pc, #788] @ (65a34 ) │ │ add r1, pc │ │ - bl 5a750 │ │ + bl 5a960 │ │ ldr.w fp, [sp, #56] @ 0x38 │ │ ldrd r5, r6, [r7, #16] │ │ ldrb.w r1, [sp, #60] @ 0x3c │ │ ldr.w r0, [fp] │ │ cmp r1, #1 │ │ - beq.n 65668 │ │ + beq.n 65750 │ │ ldr r1, [r0, #8] │ │ ldr r2, [r0, #0] │ │ cmp r2, r1 │ │ - beq.w 66392 │ │ + beq.w 6647a │ │ ldr r2, [r0, #4] │ │ movs r3, #44 @ 0x2c │ │ strb r3, [r2, r1] │ │ adds r1, #1 │ │ str r1, [r0, #8] │ │ ldr.w r0, [fp] │ │ - ldr r1, [pc, #740] @ (65950 ) │ │ + ldr r1, [pc, #740] @ (65a38 ) │ │ movs r2, #10 │ │ add r1, pc │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr.w r4, [fp] │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.w 6621c │ │ + beq.w 66304 │ │ ldr r0, [r4, #4] │ │ movs r2, #58 @ 0x3a │ │ strb r2, [r0, r1] │ │ adds r0, r1, #1 │ │ str r0, [r4, #8] │ │ ldr.w r4, [fp] │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.w 66230 │ │ + beq.w 66318 │ │ ldr r0, [r4, #4] │ │ movs r2, #91 @ 0x5b │ │ cmp r6, #0 │ │ strb r2, [r0, r1] │ │ add.w r1, r1, #1 │ │ str r1, [r4, #8] │ │ - beq.w 658ae │ │ + beq.w 65996 │ │ rsb r0, r6, r6, lsl #3 │ │ add r6, sp, #64 @ 0x40 │ │ add.w r0, r5, r0, lsl #2 │ │ str r0, [sp, #36] @ 0x24 │ │ - ldr r0, [pc, #668] @ (65954 ) │ │ + ldr r0, [pc, #668] @ (65a3c ) │ │ add r0, pc │ │ mov r8, r0 │ │ - ldr r0, [pc, #664] @ (65958 ) │ │ + ldr r0, [pc, #664] @ (65a40 ) │ │ add r0, pc │ │ mov sl, r0 │ │ movs r0, #1 │ │ - b.n 656dc │ │ + b.n 657c4 │ │ ldr r0, [r4, #4] │ │ movs r2, #125 @ 0x7d │ │ strb r2, [r0, r1] │ │ adds r0, r1, #1 │ │ str r0, [r4, #8] │ │ adds r5, #16 │ │ ldr r1, [sp, #36] @ 0x24 │ │ movs r0, #0 │ │ cmp r5, r1 │ │ - beq.w 6589c │ │ + beq.w 65984 │ │ ldr.w r9, [fp] │ │ lsls r0, r0, #31 │ │ - bne.n 65704 │ │ + bne.n 657ec │ │ ldr.w r1, [r9, #8] │ │ ldr.w r0, [r9] │ │ cmp r0, r1 │ │ - beq.w 65876 │ │ + beq.w 6595e │ │ ldr.w r0, [r9, #4] │ │ movs r2, #44 @ 0x2c │ │ strb r2, [r0, r1] │ │ adds r0, r1, #1 │ │ str.w r0, [r9, #8] │ │ ldr.w r9, [fp] │ │ ldr.w r1, [r9, #8] │ │ ldr.w r0, [r9] │ │ cmp r0, r1 │ │ - beq.w 65850 │ │ + beq.w 65938 │ │ ldr.w r0, [r9, #4] │ │ movs r2, #123 @ 0x7b │ │ mov r3, r5 │ │ str.w fp, [sp, #64] @ 0x40 │ │ strb r2, [r0, r1] │ │ adds r0, r1, #1 │ │ mov r1, r8 │ │ str.w r0, [r9, #8] │ │ movs r0, #1 │ │ strb.w r0, [sp, #68] @ 0x44 │ │ mov r0, r6 │ │ movs r2, #4 │ │ mov r9, r6 │ │ - bl 5a83c │ │ + bl 5aa4c │ │ ldr r7, [sp, #64] @ 0x40 │ │ ldrb r6, [r5, #24] │ │ ldrb.w r1, [sp, #68] @ 0x44 │ │ ldr r0, [r7, #0] │ │ cmp r1, #1 │ │ - beq.n 6575c │ │ + beq.n 65844 │ │ ldr r1, [r0, #8] │ │ ldr r2, [r0, #0] │ │ cmp r2, r1 │ │ - beq.w 6588a │ │ + beq.w 65972 │ │ ldr r2, [r0, #4] │ │ movs r3, #44 @ 0x2c │ │ strb r3, [r2, r1] │ │ adds r1, #1 │ │ str r1, [r0, #8] │ │ ldr r0, [r7, #0] │ │ movs r1, #2 │ │ movs r2, #4 │ │ strb.w r1, [sp, #68] @ 0x44 │ │ mov r1, sl │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr r4, [r7, #0] │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.w 65864 │ │ + beq.w 6594c │ │ ldr r0, [r4, #4] │ │ movs r2, #58 @ 0x3a │ │ strb r2, [r0, r1] │ │ adds r0, r1, #1 │ │ str r0, [r4, #8] │ │ ldr r0, [r7, #0] │ │ tbb [pc, r6] │ │ @@ -92408,1306 +92373,1306 @@ │ │ movs r6, #31 │ │ adds r2, #19 │ │ cmp r2, #58 @ 0x3a │ │ subs r2, r0, r5 │ │ lsrs r6, r7, #28 │ │ adds r6, #23 │ │ movs r3, #12 │ │ - ldr r1, [pc, #452] @ (6595c ) │ │ + ldr r1, [pc, #452] @ (65a44 ) │ │ movs r2, #4 │ │ add r1, pc │ │ - b.n 65810 │ │ - ldr r1, [pc, #448] @ (65960 ) │ │ + b.n 658f8 │ │ + ldr r1, [pc, #448] @ (65a48 ) │ │ add r1, pc │ │ - b.n 657f6 │ │ - ldr r1, [pc, #444] @ (65964 ) │ │ + b.n 658de │ │ + ldr r1, [pc, #444] @ (65a4c ) │ │ movs r2, #9 │ │ add r1, pc │ │ - b.n 65810 │ │ - ldr r1, [pc, #440] @ (65968 ) │ │ + b.n 658f8 │ │ + ldr r1, [pc, #440] @ (65a50 ) │ │ movs r2, #4 │ │ add r1, pc │ │ - b.n 65810 │ │ - ldr r1, [pc, #436] @ (6596c ) │ │ + b.n 658f8 │ │ + ldr r1, [pc, #436] @ (65a54 ) │ │ movs r2, #8 │ │ add r1, pc │ │ - b.n 65810 │ │ - ldr r1, [pc, #432] @ (65970 ) │ │ + b.n 658f8 │ │ + ldr r1, [pc, #432] @ (65a58 ) │ │ movs r2, #8 │ │ add r1, pc │ │ - b.n 65810 │ │ - ldr r1, [pc, #428] @ (65974 ) │ │ + b.n 658f8 │ │ + ldr r1, [pc, #428] @ (65a5c ) │ │ movs r2, #3 │ │ add r1, pc │ │ - b.n 65810 │ │ - ldr r1, [pc, #424] @ (65978 ) │ │ + b.n 658f8 │ │ + ldr r1, [pc, #424] @ (65a60 ) │ │ add r1, pc │ │ - b.n 657f6 │ │ - ldr r1, [pc, #424] @ (6597c ) │ │ + b.n 658de │ │ + ldr r1, [pc, #424] @ (65a64 ) │ │ movs r2, #5 │ │ add r1, pc │ │ - b.n 65810 │ │ - ldr r1, [pc, #420] @ (65980 ) │ │ + b.n 658f8 │ │ + ldr r1, [pc, #420] @ (65a68 ) │ │ movs r2, #6 │ │ add r1, pc │ │ - b.n 65810 │ │ - ldr r1, [pc, #416] @ (65984 ) │ │ + b.n 658f8 │ │ + ldr r1, [pc, #416] @ (65a6c ) │ │ movs r2, #4 │ │ add r1, pc │ │ - b.n 65810 │ │ - ldr r1, [pc, #412] @ (65988 ) │ │ + b.n 658f8 │ │ + ldr r1, [pc, #412] @ (65a70 ) │ │ movs r2, #6 │ │ add r1, pc │ │ - b.n 65810 │ │ - ldr r1, [pc, #408] @ (6598c ) │ │ + b.n 658f8 │ │ + ldr r1, [pc, #408] @ (65a74 ) │ │ add r1, pc │ │ movs r2, #10 │ │ - b.n 65810 │ │ - ldr r1, [pc, #404] @ (65990 ) │ │ + b.n 658f8 │ │ + ldr r1, [pc, #404] @ (65a78 ) │ │ movs r2, #6 │ │ add r1, pc │ │ - b.n 65810 │ │ - ldr r1, [pc, #400] @ (65994 ) │ │ + b.n 658f8 │ │ + ldr r1, [pc, #400] @ (65a7c ) │ │ movs r2, #7 │ │ add r1, pc │ │ - b.n 65810 │ │ - ldr r1, [pc, #396] @ (65998 ) │ │ + b.n 658f8 │ │ + ldr r1, [pc, #396] @ (65a80 ) │ │ movs r2, #8 │ │ add r1, pc │ │ - bl 5a584 │ │ - ldr r1, [pc, #388] @ (6599c ) │ │ + bl 5a794 │ │ + ldr r1, [pc, #388] @ (65a84 ) │ │ adds r5, #12 │ │ mov r0, r9 │ │ movs r2, #6 │ │ add r1, pc │ │ mov r3, r5 │ │ mov r6, r9 │ │ - bl 5a83c │ │ + bl 5aa4c │ │ ldrb.w r0, [sp, #68] @ 0x44 │ │ cmp r0, #0 │ │ - beq.w 656d0 │ │ + beq.w 657b8 │ │ ldr r0, [sp, #64] @ 0x40 │ │ ldr r4, [r0, #0] │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - bne.w 656c6 │ │ + bne.w 657ae │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.n 656c6 │ │ + b.n 657ae │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r9 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w r1, [r9, #8] │ │ - b.n 65712 │ │ + b.n 657fa │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.n 65776 │ │ + b.n 6585e │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r9 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr.w r1, [r9, #8] │ │ - b.n 656f2 │ │ + b.n 657da │ │ movs r2, #1 │ │ movs r3, #1 │ │ str r2, [sp, #0] │ │ mov r4, r0 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ mov r0, r4 │ │ - b.n 65750 │ │ + b.n 65838 │ │ ldr.w r4, [fp] │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.w 66312 │ │ + beq.w 663fa │ │ ldr r7, [sp, #24] │ │ - b.n 658b6 │ │ + b.n 6599e │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.w 663a6 │ │ + beq.w 6648e │ │ ldr r0, [r4, #4] │ │ movs r2, #93 @ 0x5d │ │ ldrd r5, r6, [r7, #28] │ │ strb r2, [r0, r1] │ │ adds r0, r1, #1 │ │ str r0, [r4, #8] │ │ ldr.w r4, [fp] │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.w 66244 │ │ + beq.w 6632c │ │ ldr r0, [r4, #4] │ │ movs r3, #44 @ 0x2c │ │ - ldr r2, [pc, #200] @ (659a0 ) │ │ + ldr r2, [pc, #200] @ (65a88 ) │ │ strb r3, [r0, r1] │ │ adds r0, r1, #1 │ │ add r2, pc │ │ str r0, [r4, #8] │ │ movs r1, #2 │ │ ldr.w r0, [fp] │ │ strb.w r1, [sp, #60] @ 0x3c │ │ mov r1, r2 │ │ movs r2, #7 │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr.w r4, [fp] │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.w 66258 │ │ + beq.w 66340 │ │ ldr r0, [r4, #4] │ │ movs r2, #58 @ 0x3a │ │ strb r2, [r0, r1] │ │ adds r0, r1, #1 │ │ str r0, [r4, #8] │ │ ldr.w r4, [fp] │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.w 6626c │ │ + beq.w 66354 │ │ ldr r0, [r4, #4] │ │ movs r2, #91 @ 0x5b │ │ cmp r6, #0 │ │ strb r2, [r0, r1] │ │ add.w r1, r1, #1 │ │ str r1, [r4, #8] │ │ - beq.w 65df8 │ │ + beq.w 65ee0 │ │ rsb r0, r6, r6, lsl #3 │ │ mov.w r8, #58 @ 0x3a │ │ mov.w r9, #44 @ 0x2c │ │ add.w r0, r5, r0, lsl #2 │ │ str r0, [sp, #32] │ │ - ldr r0, [pc, #100] @ (659a4 ) │ │ + ldr r0, [pc, #100] @ (65a8c ) │ │ add r0, pc │ │ str r0, [sp, #28] │ │ movs r0, #1 │ │ - b.n 659be │ │ + b.n 65aa6 │ │ nop │ │ - lsrs r4, r6, #17 │ │ - @ instruction: 0xfffb0cfa │ │ - vqrdmulh.s q8, , d2[0] │ │ - vtbl.8 d16, {d27-d30}, d24 │ │ - vtbl.8 d16, {d27-d30}, d26 │ │ - vtbx.8 d16, {d11-d13}, d22 │ │ - vcvt.f16.u16 d16, d16, #5 │ │ - vdup.8 d16, d9[5] │ │ - vtbx.8 d16, {d11-d13}, d16 │ │ - vtbx.8 d16, {d27-d30}, d8 │ │ - @ instruction: 0xfffb0b30 │ │ - vtbl.8 d16, {d11-d14}, d16 │ │ - vdup.8 d16, d12[5] │ │ - @ instruction: 0xfffb0b15 │ │ - vtbx.8 d16, {d27-d30}, d6 │ │ - vtbx.8 d16, {d11-d13}, d26 │ │ - vtbl.8 d16, {d27-d30}, d26 │ │ - @ instruction: 0xfffb0bd2 │ │ - vtbl.8 d16, {d27-d30}, d16 │ │ - vtbl.8 d16, {d27-d30}, d20 │ │ - vtbl.8 d16, {d11-d14}, d26 │ │ - @ instruction: 0xfffb0bd9 │ │ - vcvt.f16.u16 d16, d30, #5 │ │ - vtbl.8 d16, {d11-d12}, d18 │ │ + lsrs r4, r1, #14 │ │ + vcvt.f16.u16 d16, d2, #5 │ │ + @ instruction: 0xfffb0cda │ │ + vtbx.8 d16, {d27-d29}, d0 │ │ + vtbx.8 d16, {d27-d29}, d2 │ │ + vqrshrn.u64 d16, q15, #5 │ │ + vtbx.8 d16, {d11-d14}, d8 │ │ + vtbl.8 d16, {d11-d14}, d17 │ │ + vqrshrn.u64 d16, q12, #5 │ │ + vtbx.8 d16, {d27-d29}, d16 │ │ + vtbx.8 d16, {d11-d13}, d8 │ │ + vshll.u32 q8, d24, #27 │ │ + vtbl.8 d16, {d11-d14}, d20 │ │ + vtbl.8 d16, {d11-d13}, d29 │ │ + @ instruction: 0xfffb0ade │ │ + vtbl.8 d16, {d27-d28}, d2 │ │ + vtbx.8 d16, {d27-d29}, d2 │ │ + vtbx.8 d16, {d27-d29}, d26 │ │ + @ instruction: 0xfffb0ab8 │ │ + @ instruction: 0xfffb0abc │ │ + vtbx.8 d16, {d11-d13}, d2 │ │ + @ instruction: 0xfffb0af1 │ │ + @ instruction: 0xfffb0b56 │ │ + vqshrun.s64 d16, q13, #5 │ │ vtbx.8 d22, {d11}, d16 │ │ movs r2, #125 @ 0x7d │ │ strb r2, [r0, r1] │ │ adds r0, r1, #1 │ │ str r0, [r4, #8] │ │ adds r5, #28 │ │ ldr r1, [sp, #32] │ │ movs r0, #0 │ │ cmp r5, r1 │ │ - beq.w 65dc2 │ │ + beq.w 65eaa │ │ ldr.w r4, [fp] │ │ lsls r0, r0, #31 │ │ - bne.n 659de │ │ + bne.n 65ac6 │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.w 65d9e │ │ + beq.w 65e86 │ │ ldr r0, [r4, #4] │ │ strb.w r9, [r0, r1] │ │ adds r0, r1, #1 │ │ str r0, [r4, #8] │ │ ldr.w r4, [fp] │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.w 65d32 │ │ + beq.w 65e1a │ │ ldr r0, [r4, #4] │ │ movs r2, #123 @ 0x7b │ │ ldrd r6, r7, [r5, #4] │ │ str.w fp, [sp, #64] @ 0x40 │ │ strb r2, [r0, r1] │ │ adds r0, r1, #1 │ │ movs r2, #4 │ │ str r0, [r4, #8] │ │ ldr.w r0, [fp] │ │ ldr r1, [sp, #28] │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr.w r4, [fp] │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.w 65d44 │ │ + beq.w 65e2c │ │ ldr r0, [r4, #4] │ │ mov r2, r7 │ │ strb.w r8, [r0, r1] │ │ adds r0, r1, #1 │ │ mov r1, r6 │ │ str r0, [r4, #8] │ │ ldr.w r0, [fp] │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr.w r4, [fp] │ │ ldrd r6, r7, [r5, #16] │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.w 65d56 │ │ + beq.w 65e3e │ │ ldr r0, [r4, #4] │ │ - ldr r2, [pc, #916] @ (65dd4 ) │ │ + ldr r2, [pc, #916] @ (65ebc ) │ │ strb.w r9, [r0, r1] │ │ adds r0, r1, #1 │ │ add r2, pc │ │ str r0, [r4, #8] │ │ movs r1, #2 │ │ ldr.w r0, [fp] │ │ strb.w r1, [sp, #68] @ 0x44 │ │ mov r1, r2 │ │ movs r2, #10 │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr.w r4, [fp] │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.w 65d68 │ │ + beq.w 65e50 │ │ ldr r0, [r4, #4] │ │ strb.w r8, [r0, r1] │ │ adds r0, r1, #1 │ │ str r0, [r4, #8] │ │ ldr.w r4, [fp] │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.w 65d7a │ │ + beq.w 65e62 │ │ ldr r0, [r4, #4] │ │ movs r2, #91 @ 0x5b │ │ cmp r7, #0 │ │ strb r2, [r0, r1] │ │ add.w r1, r1, #1 │ │ str r1, [r4, #8] │ │ - beq.w 65cda │ │ + beq.w 65dc2 │ │ add.w sl, r6, #8 │ │ str r5, [sp, #36] @ 0x24 │ │ lsls r5, r7, #4 │ │ movs r1, #1 │ │ ldr.w r0, [fp] │ │ lsls r1, r1, #31 │ │ - bne.n 65abe │ │ + bne.n 65ba6 │ │ ldr r1, [r0, #8] │ │ ldr r2, [r0, #0] │ │ cmp r2, r1 │ │ - beq.w 65c94 │ │ + beq.w 65d7c │ │ ldr r2, [r0, #4] │ │ strb.w r9, [r2, r1] │ │ adds r1, #1 │ │ str r1, [r0, #8] │ │ ldr.w r0, [fp] │ │ ldr r1, [r0, #8] │ │ ldr r2, [r0, #0] │ │ cmp r2, r1 │ │ - beq.w 65c16 │ │ - ldr r2, [pc, #780] @ (65dd8 ) │ │ + beq.w 65cfe │ │ + ldr r2, [pc, #780] @ (65ec0 ) │ │ movs r7, #123 @ 0x7b │ │ ldr r3, [r0, #4] │ │ add r2, pc │ │ ldrd r6, r4, [sl, #-4] │ │ strb r7, [r3, r1] │ │ adds r1, #1 │ │ str r1, [r0, #8] │ │ mov r1, r2 │ │ movs r2, #4 │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr.w r7, [fp] │ │ ldr r1, [r7, #8] │ │ ldr r0, [r7, #0] │ │ cmp r0, r1 │ │ - beq.w 65c28 │ │ + beq.w 65d10 │ │ ldr r0, [r7, #4] │ │ mov r2, r4 │ │ strb.w r8, [r0, r1] │ │ adds r0, r1, #1 │ │ mov r1, r6 │ │ str r0, [r7, #8] │ │ ldr.w r0, [fp] │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr.w r4, [fp] │ │ ldrb.w r6, [sl, #5] │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.w 65c3a │ │ + beq.w 65d22 │ │ ldr r0, [r4, #4] │ │ movs r2, #4 │ │ strb.w r9, [r0, r1] │ │ adds r0, r1, #1 │ │ str r0, [r4, #8] │ │ ldr.w r0, [fp] │ │ - ldr r1, [pc, #688] @ (65ddc ) │ │ + ldr r1, [pc, #688] @ (65ec4 ) │ │ add r1, pc │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr.w r4, [fp] │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.w 65c4c │ │ + beq.w 65d34 │ │ ldr r0, [r4, #4] │ │ strb.w r8, [r0, r1] │ │ add.w r0, r1, #1 │ │ str r0, [r4, #8] │ │ ldr.w r0, [fp] │ │ - cbz r6, 65b5c │ │ + cbz r6, 65c44 │ │ cmp r6, #1 │ │ - bne.n 65b64 │ │ - ldr r1, [pc, #648] @ (65de0 ) │ │ + bne.n 65c4c │ │ + ldr r1, [pc, #648] @ (65ec8 ) │ │ movs r2, #4 │ │ add r1, pc │ │ - b.n 65b6a │ │ - ldr r1, [pc, #644] @ (65de4 ) │ │ + b.n 65c52 │ │ + ldr r1, [pc, #644] @ (65ecc ) │ │ movs r2, #5 │ │ add r1, pc │ │ - b.n 65b6a │ │ - ldr r1, [pc, #640] @ (65de8 ) │ │ + b.n 65c52 │ │ + ldr r1, [pc, #640] @ (65ed0 ) │ │ movs r2, #12 │ │ add r1, pc │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr.w r4, [fp] │ │ ldrb.w r6, [sl, #4] │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.n 65c5e │ │ + beq.n 65d46 │ │ ldr r0, [r4, #4] │ │ movs r2, #13 │ │ strb.w r9, [r0, r1] │ │ adds r0, r1, #1 │ │ str r0, [r4, #8] │ │ ldr.w r0, [fp] │ │ - ldr r1, [pc, #604] @ (65dec ) │ │ + ldr r1, [pc, #604] @ (65ed4 ) │ │ add r1, pc │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr.w r4, [fp] │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.n 65c70 │ │ + beq.n 65d58 │ │ ldr r0, [r4, #4] │ │ strb.w r8, [r0, r1] │ │ adds r0, r1, #1 │ │ str r0, [r4, #8] │ │ lsls r0, r6, #31 │ │ ldr.w r4, [fp] │ │ - beq.n 65bce │ │ + beq.n 65cb6 │ │ ldr r0, [r4, #0] │ │ ldr r1, [r4, #8] │ │ subs r0, r0, r1 │ │ cmp r0, #3 │ │ - bls.n 65ca6 │ │ + bls.n 65d8e │ │ ldr r0, [r4, #4] │ │ movw r2, #29300 @ 0x7274 │ │ movt r2, #25973 @ 0x6575 │ │ str r2, [r0, r1] │ │ adds r0, r1, #4 │ │ - b.n 65bec │ │ + b.n 65cd4 │ │ ldr r0, [r4, #0] │ │ ldr r1, [r4, #8] │ │ subs r0, r0, r1 │ │ cmp r0, #4 │ │ - bls.n 65cb8 │ │ + bls.n 65da0 │ │ ldr r0, [r4, #4] │ │ movw r2, #24934 @ 0x6166 │ │ movt r2, #29548 @ 0x736c │ │ str r2, [r0, r1] │ │ add r0, r1 │ │ movs r2, #101 @ 0x65 │ │ strb r2, [r0, #4] │ │ adds r0, r1, #5 │ │ str r0, [r4, #8] │ │ ldr.w r4, [fp] │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.n 65c82 │ │ + beq.n 65d6a │ │ ldr r0, [r4, #4] │ │ movs r2, #125 @ 0x7d │ │ add.w sl, sl, #16 │ │ subs r5, #16 │ │ strb r2, [r0, r1] │ │ add.w r0, r1, #1 │ │ mov.w r1, #0 │ │ str r0, [r4, #8] │ │ - bne.w 65a9e │ │ - b.n 65cca │ │ + bne.w 65b86 │ │ + b.n 65db2 │ │ movs r2, #1 │ │ movs r3, #1 │ │ str r2, [sp, #0] │ │ mov r4, r0 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ mov r0, r4 │ │ - b.n 65ac8 │ │ + b.n 65bb0 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r7 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r7, #8] │ │ - b.n 65af0 │ │ + b.n 65bd8 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.n 65b18 │ │ + b.n 65c00 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.n 65b3e │ │ + b.n 65c26 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.n 65b7e │ │ + b.n 65c66 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.n 65ba2 │ │ + b.n 65c8a │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.n 65bfa │ │ + b.n 65ce2 │ │ movs r2, #1 │ │ movs r3, #1 │ │ str r2, [sp, #0] │ │ mov r4, r0 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ mov r0, r4 │ │ - b.n 65ab0 │ │ + b.n 65b98 │ │ movs r0, #1 │ │ movs r2, #4 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.n 65bbe │ │ + b.n 65ca6 │ │ movs r0, #1 │ │ movs r2, #5 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.n 65bd8 │ │ + b.n 65cc0 │ │ ldr.w r4, [fp] │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.n 65d8c │ │ + beq.n 65e74 │ │ ldr r5, [sp, #36] @ 0x24 │ │ - b.n 65ce0 │ │ + b.n 65dc8 │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.n 65db0 │ │ + beq.n 65e98 │ │ ldr r0, [r4, #4] │ │ movs r2, #93 @ 0x5d │ │ strb r2, [r0, r1] │ │ adds r0, r1, #1 │ │ movs r2, #6 │ │ str r0, [r4, #8] │ │ add r4, sp, #64 @ 0x40 │ │ ldrb r3, [r5, #24] │ │ - ldr r1, [pc, #252] @ (65df0 ) │ │ + ldr r1, [pc, #252] @ (65ed8 ) │ │ mov r0, r4 │ │ add r1, pc │ │ - bl 5a750 │ │ - ldr r1, [pc, #248] @ (65df4 ) │ │ + bl 5a960 │ │ + ldr r1, [pc, #248] @ (65edc ) │ │ mov r0, r4 │ │ ldrb r3, [r5, #25] │ │ movs r2, #7 │ │ add r1, pc │ │ - bl 5a750 │ │ + bl 5a960 │ │ ldrb.w r0, [sp, #68] @ 0x44 │ │ cmp r0, #0 │ │ - beq.w 659b2 │ │ + beq.w 65a9a │ │ ldr r0, [sp, #64] @ 0x40 │ │ ldr r4, [r0, #0] │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - bne.w 659a8 │ │ + bne.w 65a90 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.n 659a8 │ │ + b.n 65a90 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.n 659e8 │ │ + b.n 65ad0 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.n 65a14 │ │ + b.n 65afc │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.n 65a3c │ │ + b.n 65b24 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.n 65a6a │ │ + b.n 65b52 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.n 65a82 │ │ + b.n 65b6a │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.n 65cd6 │ │ + b.n 65dbe │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.n 659d0 │ │ + b.n 65ab8 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.n 65ce0 │ │ + b.n 65dc8 │ │ ldr.w r4, [fp] │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.w 66326 │ │ + beq.w 6640e │ │ ldr r7, [sp, #24] │ │ - b.n 65e00 │ │ - lsrs r0, r5, #7 │ │ - vqshl.u64 d16, d2, #59 @ 0x3b │ │ - vqshl.u32 d16, d30, #27 │ │ - vqshlu.s64 d16, d16, #59 @ 0x3b │ │ - vtbl.8 d16, {d11-d12}, d7 │ │ - vtbl.8 d16, {d11-d12}, d4 │ │ - vtbl.8 d16, {d11-d12}, d2 │ │ - vcvt.s32.f32 q8, q2 │ │ - vqshl.u32 d16, d28, #27 │ │ + b.n 65ee8 │ │ + lsrs r0, r0, #4 │ │ + vcvt.f32.u32 d16, d26 │ │ + vqshlu.s32 q8, q3, #27 │ │ + vrsqrte.f32 q8, q4 │ │ + vqshrun.s64 d16, , #5 │ │ + vqshrun.s64 d16, q6, #5 │ │ + vqshrun.s64 d16, q5, #5 │ │ + vqshlu.s32 q8, q6, #27 │ │ + vqshlu.s32 q8, q2, #27 │ │ vtbl.8 d22, {d11}, d16 │ │ cmp r0, r1 │ │ - beq.w 663ba │ │ + beq.w 664a2 │ │ ldr r0, [r4, #4] │ │ movs r2, #93 @ 0x5d │ │ ldrd r8, r9, [r7, #40] @ 0x28 │ │ strb r2, [r0, r1] │ │ adds r0, r1, #1 │ │ str r0, [r4, #8] │ │ ldr.w r4, [fp] │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.w 66280 │ │ + beq.w 66368 │ │ ldr r0, [r4, #4] │ │ movs r3, #44 @ 0x2c │ │ - ldr r2, [pc, #892] @ (661a0 ) │ │ + ldr r2, [pc, #892] @ (66288 ) │ │ strb r3, [r0, r1] │ │ adds r0, r1, #1 │ │ add r2, pc │ │ str r0, [r4, #8] │ │ movs r1, #2 │ │ ldr.w r0, [fp] │ │ strb.w r1, [sp, #60] @ 0x3c │ │ mov r1, r2 │ │ movs r2, #5 │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr.w r4, [fp] │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.w 66292 │ │ + beq.w 6637a │ │ ldr r0, [r4, #4] │ │ movs r2, #58 @ 0x3a │ │ strb r2, [r0, r1] │ │ adds r0, r1, #1 │ │ str r0, [r4, #8] │ │ ldr.w r5, [fp] │ │ ldr r1, [r5, #8] │ │ ldr r0, [r5, #0] │ │ cmp r0, r1 │ │ - beq.w 662a4 │ │ + beq.w 6638c │ │ ldr r0, [r5, #4] │ │ movs r2, #91 @ 0x5b │ │ cmp.w r9, #0 │ │ strb r2, [r0, r1] │ │ add.w r1, r1, #1 │ │ str r1, [r5, #8] │ │ - beq.n 65f18 │ │ + beq.n 66000 │ │ ldr r0, [r5, #0] │ │ cmp r0, r1 │ │ - beq.w 66338 │ │ + beq.w 66420 │ │ ldr r0, [r5, #4] │ │ movs r3, #123 @ 0x7b │ │ - ldr r2, [pc, #800] @ (661a4 ) │ │ + ldr r2, [pc, #800] @ (6628c ) │ │ ldrd r6, r4, [r8, #4] │ │ add r2, pc │ │ strb r3, [r0, r1] │ │ adds r0, r1, #1 │ │ str r0, [r5, #8] │ │ mov r1, r2 │ │ mov r0, r5 │ │ movs r2, #4 │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr r1, [r5, #8] │ │ ldr r0, [r5, #0] │ │ cmp r0, r1 │ │ - beq.w 6634a │ │ + beq.w 66432 │ │ ldr r0, [r5, #4] │ │ movs r2, #58 @ 0x3a │ │ strb r2, [r0, r1] │ │ adds r0, r1, #1 │ │ mov r1, r6 │ │ str r0, [r5, #8] │ │ mov r0, r5 │ │ mov r2, r4 │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr r1, [r5, #8] │ │ ldrd r6, r4, [r8, #16] │ │ ldr r0, [r5, #0] │ │ cmp r0, r1 │ │ - beq.w 6635c │ │ + beq.w 66444 │ │ ldr r0, [r5, #4] │ │ movs r3, #44 @ 0x2c │ │ - ldr r2, [pc, #732] @ (661a8 ) │ │ + ldr r2, [pc, #732] @ (66290 ) │ │ add r2, pc │ │ strb r3, [r0, r1] │ │ adds r0, r1, #1 │ │ str r0, [r5, #8] │ │ mov r1, r2 │ │ mov r0, r5 │ │ movs r2, #6 │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr r1, [r5, #8] │ │ ldr r0, [r5, #0] │ │ cmp r0, r1 │ │ - beq.w 6636e │ │ + beq.w 66456 │ │ ldr r0, [r5, #4] │ │ movs r2, #58 @ 0x3a │ │ strb r2, [r0, r1] │ │ adds r0, r1, #1 │ │ mov r1, r6 │ │ str r0, [r5, #8] │ │ mov r0, r5 │ │ mov r2, r4 │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr r1, [r5, #8] │ │ ldr r0, [r5, #0] │ │ cmp r0, r1 │ │ - beq.w 66380 │ │ + beq.w 66468 │ │ ldr r0, [r5, #4] │ │ movs r2, #125 @ 0x7d │ │ cmp.w r9, #1 │ │ strb r2, [r0, r1] │ │ add.w r1, r1, #1 │ │ str r1, [r5, #8] │ │ - bne.w 66050 │ │ + bne.w 66138 │ │ ldr r0, [r5, #0] │ │ cmp r0, r1 │ │ - beq.w 662b6 │ │ + beq.w 6639e │ │ ldr r0, [r5, #4] │ │ movs r2, #93 @ 0x5d │ │ strb r2, [r0, r1] │ │ adds r0, r1, #1 │ │ str r0, [r5, #8] │ │ ldr.w r4, [fp] │ │ ldr r2, [sp, #24] │ │ ldr r1, [r4, #8] │ │ ldrb.w r5, [r2, #49] @ 0x31 │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.w 662c8 │ │ + beq.w 663b0 │ │ ldr r0, [r4, #4] │ │ movs r2, #44 @ 0x2c │ │ strb r2, [r0, r1] │ │ adds r0, r1, #1 │ │ movs r2, #7 │ │ str r0, [r4, #8] │ │ ldr.w r0, [fp] │ │ - ldr r1, [pc, #604] @ (661ac ) │ │ + ldr r1, [pc, #604] @ (66294 ) │ │ add r1, pc │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr.w r4, [fp] │ │ ldr r1, [r4, #8] │ │ ldr r0, [r4, #0] │ │ cmp r0, r1 │ │ - beq.w 662da │ │ + beq.w 663c2 │ │ ldr r0, [r4, #4] │ │ movs r2, #58 @ 0x3a │ │ cmp r5, #10 │ │ strb r2, [r0, r1] │ │ add.w r0, r1, #1 │ │ str r0, [r4, #8] │ │ - bcc.n 65f9a │ │ + bcc.n 66082 │ │ movw r0, #5243 @ 0x147b │ │ mvn.w r1, #99 @ 0x63 │ │ muls r0, r5 │ │ - ldr r2, [pc, #560] @ (661b0 ) │ │ + ldr r2, [pc, #560] @ (66298 ) │ │ movs r7, #1 │ │ add r2, pc │ │ lsrs r0, r0, #19 │ │ smlabb r1, r0, r1, r5 │ │ ldrh.w r1, [r2, r1, lsl #1] │ │ strh.w r1, [sp, #65] @ 0x41 │ │ ldr.w r4, [fp] │ │ - cbnz r5, 65fa4 │ │ - b.n 65fa6 │ │ + cbnz r5, 6608c │ │ + b.n 6608e │ │ movs r7, #3 │ │ mov r0, r5 │ │ ldr.w r4, [fp] │ │ - cbz r5, 65fa6 │ │ - cbz r0, 65fae │ │ + cbz r5, 6608e │ │ + cbz r0, 66096 │ │ subs r7, #1 │ │ add r1, sp, #64 @ 0x40 │ │ adds r0, #48 @ 0x30 │ │ strb r0, [r1, r7] │ │ ldr r0, [r4, #0] │ │ eor.w r5, r7, #3 │ │ ldr r6, [r4, #8] │ │ subs r0, r0, r6 │ │ cmp r5, r0 │ │ - bhi.w 662ec │ │ + bhi.w 663d4 │ │ ldr r2, [r4, #4] │ │ add r0, sp, #64 @ 0x40 │ │ adds r1, r0, r7 │ │ adds r0, r2, r6 │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ adds r0, r6, r5 │ │ str r0, [r4, #8] │ │ ldr.w r5, [fp] │ │ ldr r1, [r5, #8] │ │ ldr r0, [r5, #0] │ │ cmp r0, r1 │ │ - beq.w 66300 │ │ + beq.w 663e8 │ │ ldr r0, [r5, #4] │ │ movs r2, #125 @ 0x7d │ │ add.w fp, sp, #12 │ │ strb r2, [r0, r1] │ │ adds r0, r1, #1 │ │ ldrd r6, r4, [sp, #40] @ 0x28 │ │ ldmia.w fp, {r7, sl, fp} │ │ cmp.w r6, #2147483648 @ 0x80000000 │ │ str r0, [r5, #8] │ │ - bne.n 6602c │ │ + bne.n 66114 │ │ movs r0, #27 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 663dc │ │ - ldr r1, [pc, #428] @ (661b4 ) │ │ + beq.w 664c4 │ │ + ldr r1, [pc, #428] @ (6629c ) │ │ movs r2, #27 │ │ mov r5, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r0, [r4, #0] │ │ cmp r0, #1 │ │ - beq.w 661b8 │ │ + beq.w 662a0 │ │ cmp r0, #0 │ │ - bne.w 661e4 │ │ + bne.w 662cc │ │ ldr r0, [r4, #8] │ │ cmp r0, #0 │ │ - beq.w 661e4 │ │ + beq.w 662cc │ │ ldr r6, [r4, #4] │ │ - b.n 661de │ │ + b.n 662c6 │ │ ldr r0, [sp, #48] @ 0x30 │ │ mov r2, sl │ │ mov r3, fp │ │ strd r4, r0, [sp] │ │ add r0, sp, #64 @ 0x40 │ │ ldr r1, [sp, #8] │ │ - bl 51ac8 │ │ + bl 51cd8 │ │ movs r0, #17 │ │ ldr r1, [sp, #64] @ 0x40 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - bne.w 6617e │ │ + bne.w 66266 │ │ str r0, [r7, #0] │ │ - b.n 66184 │ │ + b.n 6626c │ │ add.w r0, r9, r9, lsl #1 │ │ add.w r7, r8, #28 │ │ mov.w r8, #44 @ 0x2c │ │ mov.w sl, #58 @ 0x3a │ │ lsls r0, r0, #3 │ │ sub.w r9, r0, #24 │ │ ldr r0, [r5, #0] │ │ cmp r0, r1 │ │ - beq.n 66112 │ │ + beq.n 661fa │ │ ldr r0, [r5, #4] │ │ strb.w r8, [r0, r1] │ │ adds r1, #1 │ │ ldr r0, [r5, #0] │ │ str r1, [r5, #8] │ │ cmp r0, r1 │ │ - beq.n 66124 │ │ + beq.n 6620c │ │ ldr r0, [r5, #4] │ │ movs r3, #123 @ 0x7b │ │ - ldr r2, [pc, #864] @ (663e4 ) │ │ + ldr r2, [pc, #864] @ (664cc ) │ │ ldrd r6, r4, [r7] │ │ add r2, pc │ │ strb r3, [r0, r1] │ │ adds r0, r1, #1 │ │ str r0, [r5, #8] │ │ mov r1, r2 │ │ mov r0, r5 │ │ movs r2, #4 │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr r1, [r5, #8] │ │ ldr r0, [r5, #0] │ │ cmp r0, r1 │ │ - beq.n 66136 │ │ + beq.n 6621e │ │ ldr r0, [r5, #4] │ │ mov r2, r4 │ │ strb.w sl, [r0, r1] │ │ adds r0, r1, #1 │ │ mov r1, r6 │ │ str r0, [r5, #8] │ │ mov r0, r5 │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr r1, [r5, #8] │ │ ldrd r6, r4, [r7, #12] │ │ ldr r0, [r5, #0] │ │ cmp r0, r1 │ │ - beq.n 66148 │ │ + beq.n 66230 │ │ ldr r0, [r5, #4] │ │ - ldr r2, [pc, #804] @ (663e8 ) │ │ + ldr r2, [pc, #804] @ (664d0 ) │ │ add r2, pc │ │ strb.w r8, [r0, r1] │ │ adds r0, r1, #1 │ │ str r0, [r5, #8] │ │ mov r1, r2 │ │ mov r0, r5 │ │ movs r2, #6 │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr r1, [r5, #8] │ │ ldr r0, [r5, #0] │ │ cmp r0, r1 │ │ - beq.n 6615a │ │ + beq.n 66242 │ │ ldr r0, [r5, #4] │ │ mov r2, r4 │ │ strb.w sl, [r0, r1] │ │ adds r0, r1, #1 │ │ mov r1, r6 │ │ str r0, [r5, #8] │ │ mov r0, r5 │ │ - bl 5a584 │ │ + bl 5a794 │ │ ldr r1, [r5, #8] │ │ ldr r0, [r5, #0] │ │ cmp r0, r1 │ │ - beq.n 6616c │ │ + beq.n 66254 │ │ ldr r0, [r5, #4] │ │ movs r2, #125 @ 0x7d │ │ adds r7, #24 │ │ subs.w r9, r9, #24 │ │ strb r2, [r0, r1] │ │ add.w r1, r1, #1 │ │ str r1, [r5, #8] │ │ - bne.n 66066 │ │ - b.n 65f18 │ │ + bne.n 6614e │ │ + b.n 66000 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r5, #8] │ │ - b.n 6606c │ │ + b.n 66154 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r5, #8] │ │ - b.n 6607c │ │ + b.n 66164 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r5, #8] │ │ - b.n 660a0 │ │ + b.n 66188 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r5, #8] │ │ - b.n 660c0 │ │ + b.n 661a8 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r5, #8] │ │ - b.n 660e0 │ │ + b.n 661c8 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r5, #8] │ │ - b.n 660fc │ │ + b.n 661e4 │ │ add r3, sp, #64 @ 0x40 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia r7!, {r0, r1, r2, r3} │ │ cmp r6, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ cmp.w fp, #0 │ │ - beq.n 66202 │ │ + beq.n 662ea │ │ mov r0, sl │ │ add sp, #108 @ 0x6c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ - lsls r3, r7, #27 │ │ - vrsra.u64 q8, q5, #5 │ │ - vrecpe.f32 d16, d27 │ │ - vsli.64 q8, q3, #59 @ 0x3b │ │ - vqshl.u64 d26, d26, #59 @ 0x3b │ │ - vdup.8 d16, d16[5] │ │ + b.w d871c │ │ + lsls r3, r2, #24 │ │ + vrshr.u64 q8, q9, #5 │ │ + vrecpe.u32 q8, │ │ + vrsqrte.u32 q8, q15 │ │ + vqshlu.s64 q13, q1, #59 @ 0x3b │ │ + @ instruction: 0xfffb0b38 │ │ vtbl.8 d23, {d11-d12}, d16 │ │ cmp r0, #3 │ │ - bne.n 661e4 │ │ + bne.n 662cc │ │ ldr r6, [r4, #8] │ │ ldrd r8, r9, [r6] │ │ ldr.w r1, [r9] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r8 │ │ blxne r1 │ │ ldr.w r0, [r9, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r1, #17 │ │ movs r0, #27 │ │ movt r1, #32768 @ 0x8000 │ │ strd r5, r0, [r7, #8] │ │ subs r1, #3 │ │ strd r1, r0, [r7] │ │ cmp.w fp, #0 │ │ - bne.n 66194 │ │ + bne.n 6627c │ │ add sp, #108 @ 0x6c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r0, r5 │ │ movs r2, #1 │ │ movs r3, #1 │ │ str.w r8, [sp] │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r5, #8] │ │ - b.w 65614 │ │ + b.w 656fc │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.w 65680 │ │ + b.w 65768 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.w 65698 │ │ + b.w 65780 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.w 658d2 │ │ + b.w 659ba │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.w 65900 │ │ + b.w 659e8 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.w 65918 │ │ + b.w 65a00 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.n 65e1c │ │ + b.n 65f04 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.n 65e4a │ │ + b.n 65f32 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r5, #8] │ │ - b.n 65e62 │ │ + b.n 65f4a │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r5, #8] │ │ - b.n 65f20 │ │ + b.n 66008 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.n 65f3e │ │ + b.n 66026 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.n 65f64 │ │ + b.n 6604c │ │ movs r0, #1 │ │ mov r1, r6 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ mov r2, r5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r6, [r4, #8] │ │ - b.n 65fbe │ │ + b.n 660a6 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r5, #8] │ │ - b.n 65fde │ │ + b.n 660c6 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.w 658aa │ │ + b.w 65992 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.n 65dd0 │ │ + b.n 65eb8 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r5, #8] │ │ - b.n 65e7c │ │ + b.n 65f64 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r5, #8] │ │ - b.n 65ea2 │ │ + b.n 65f8a │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r5, #8] │ │ - b.n 65ec4 │ │ + b.n 65fac │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r5, #8] │ │ - b.n 65ee6 │ │ + b.n 65fce │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r5 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r5, #8] │ │ - b.n 65f04 │ │ + b.n 65fec │ │ movs r2, #1 │ │ movs r3, #1 │ │ str r2, [sp, #0] │ │ mov r4, r0 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ mov r0, r4 │ │ - b.w 6565a │ │ + b.w 65742 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.w 658b6 │ │ + b.w 6599e │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r1, [r4, #8] │ │ - b.n 65e00 │ │ + b.n 65ee8 │ │ movs r0, #1 │ │ movs r1, #128 @ 0x80 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r1, r7 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ movs r1, #27 │ │ - bl 3dfa4 │ │ - lsls r2, r3, #7 │ │ - vrsra.u32 d16, d17, #5 │ │ + bl 3e2ac │ │ + lsls r2, r6, #3 │ │ + vcvtp.s32.f32 q8, │ │ vsli.64 , q8, #59 @ 0x3b │ │ sub sp, #4 │ │ ldrd r4, r7, [r0, #4] │ │ mov r5, r0 │ │ - cbz r7, 66406 │ │ + cbz r7, 664ee │ │ mov r6, r4 │ │ mov r0, r6 │ │ - bl 5becc │ │ + bl 5c0dc │ │ adds r6, #52 @ 0x34 │ │ subs r7, #1 │ │ - bne.n 663fa │ │ + bne.n 664e2 │ │ ldr r0, [r5, #0] │ │ - cbz r0, 66416 │ │ + cbz r0, 664fe │ │ mov r0, r4 │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - bmi.n 663c6 │ │ + bmi.n 664ae │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #196 @ 0xc4 │ │ mov sl, r1 │ │ movs r1, #128 @ 0x80 │ │ mov r9, r0 │ │ movs r0, #0 │ │ strb.w r1, [sp, #124] @ 0x7c │ │ @@ -93715,88 +93680,88 @@ │ │ add.w r8, sp, #8 │ │ strd r0, r1, [sp, #100] @ 0x64 │ │ add r1, sp, #100 @ 0x64 │ │ str r0, [sp, #120] @ 0x78 │ │ str r0, [sp, #108] @ 0x6c │ │ mov r0, r8 │ │ strd r2, r3, [sp, #112] @ 0x70 │ │ - bl 5c5ac │ │ + bl 5c788 │ │ ldr r7, [sp, #8] │ │ cmp.w r7, #2147483648 @ 0x80000000 │ │ - bne.n 6645a │ │ + bne.n 66542 │ │ ldr r0, [sp, #100] @ 0x64 │ │ - cbz r0, 664ac │ │ + cbz r0, 66594 │ │ mov.w r7, #2147483648 @ 0x80000000 │ │ - b.n 664a0 │ │ + b.n 66588 │ │ mov r1, r8 │ │ add r0, sp, #128 @ 0x80 │ │ ldmia r1!, {r2, r3, r4, r5} │ │ stmia r0!, {r2, r3, r4, r5} │ │ ldmia r1!, {r2, r3, r4, r5} │ │ stmia r0!, {r2, r3, r4, r5} │ │ ldmia.w r1, {r2, r3, r4, r5, r6} │ │ stmia r0!, {r2, r3, r4, r5, r6} │ │ ldrd r1, r2, [sp, #116] @ 0x74 │ │ cmp r2, r1 │ │ - bcs.n 6649c │ │ + bcs.n 66584 │ │ ldr r0, [sp, #112] @ 0x70 │ │ movs r5, #19 │ │ movs r3, #1 │ │ movt r5, #128 @ 0x80 │ │ ldrb r6, [r0, r2] │ │ sub.w r4, r6, #9 │ │ cmp r4, #23 │ │ - bhi.w 6659a │ │ + bhi.w 66682 │ │ lsl.w r6, r3, r4 │ │ tst r6, r5 │ │ - beq.w 6659a │ │ + beq.w 66682 │ │ adds r2, #1 │ │ str r2, [sp, #120] @ 0x78 │ │ cmp r1, r2 │ │ - bne.n 6647e │ │ + bne.n 66566 │ │ ldr r0, [sp, #100] @ 0x64 │ │ - cbz r0, 664a6 │ │ + cbz r0, 6658e │ │ ldr r0, [sp, #104] @ 0x68 │ │ - blx d87c0 │ │ + blx d87d0 │ │ cmp.w r7, #2147483648 @ 0x80000000 │ │ - bne.n 664da │ │ + bne.n 665c2 │ │ movs r0, #38 @ 0x26 │ │ ldr r6, [sp, #12] │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 665ca │ │ - ldr r1, [pc, #280] @ (665d4 ) │ │ + beq.w 666b2 │ │ + ldr r1, [pc, #280] @ (666bc ) │ │ movs r2, #38 @ 0x26 │ │ mov r5, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r0, [r6, #0] │ │ cmp r0, #1 │ │ - beq.n 66546 │ │ + beq.n 6662e │ │ cmp r0, #0 │ │ - bne.n 6656e │ │ + bne.n 66656 │ │ ldr r0, [r6, #8] │ │ cmp r0, #0 │ │ - beq.n 6656e │ │ + beq.n 66656 │ │ ldr r7, [r6, #4] │ │ - b.n 66568 │ │ + b.n 66650 │ │ add.w r0, r8, #20 │ │ str.w r9, [sp, #4] │ │ add r6, sp, #64 @ 0x40 │ │ ldrd ip, r9, [sp, #12] │ │ ldrd lr, fp, [sp, #20] │ │ ldmia r0!, {r2, r3, r4, r5} │ │ mov r1, r6 │ │ stmia r1!, {r2, r3, r4, r5} │ │ ldmia.w r0, {r2, r3, r4, r5} │ │ stmia r1!, {r2, r3, r4, r5} │ │ ldr.w r8, [sl, #8] │ │ ldr.w r0, [sl] │ │ cmp r8, r0 │ │ - beq.n 6658a │ │ + beq.n 66672 │ │ movs r0, #52 @ 0x34 │ │ ldr.w r2, [sl, #4] │ │ mul.w r1, r8, r0 │ │ mla r0, r8, r0, r2 │ │ str r7, [r2, r1] │ │ strd ip, r9, [r0, #4] │ │ strd lr, fp, [r0, #12] │ │ @@ -93814,110 +93779,110 @@ │ │ movt r0, #32768 @ 0x8000 │ │ adds r0, #4 │ │ str r0, [r1, #0] │ │ add sp, #196 @ 0xc4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrb r0, [r6, #4] │ │ cmp r0, #3 │ │ - bne.n 6656e │ │ + bne.n 66656 │ │ ldr r7, [r6, #8] │ │ ldrd r8, r4, [r7] │ │ ldr r1, [r4, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r8 │ │ blxne r1 │ │ ldr r0, [r4, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r7 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r1, #13 │ │ movs r0, #38 @ 0x26 │ │ movt r1, #32768 @ 0x8000 │ │ strd r5, r0, [r9, #8] │ │ strd r1, r0, [r9] │ │ add sp, #196 @ 0xc4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r0, sl │ │ mov r4, ip │ │ mov r5, lr │ │ - bl 47a1e │ │ + bl 47ec2 │ │ mov lr, r5 │ │ mov ip, r4 │ │ - b.n 66504 │ │ + b.n 665ec │ │ movs r3, #22 │ │ adds r2, #1 │ │ str r3, [sp, #184] @ 0xb8 │ │ cmp r2, r1 │ │ it cs │ │ movcs r2, r1 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #184 @ 0xb8 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ str r0, [sp, #12] │ │ add r0, sp, #128 @ 0x80 │ │ - bl 5becc │ │ + bl 5c0dc │ │ ldr r0, [sp, #100] @ 0x64 │ │ cmp r0, #0 │ │ - bne.w 66454 │ │ - b.n 664ac │ │ + bne.w 6653c │ │ + b.n 66594 │ │ movs r0, #1 │ │ movs r1, #38 @ 0x26 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - lsls r4, r2, #27 │ │ + lsls r4, r5, #23 │ │ vtbl.8 d30, {d11-d12}, d29 │ │ - ldr r7, [pc, #960] @ (6699c ) │ │ + ldr r7, [pc, #960] @ (66a84 ) │ │ sub.w sp, sp, #508 @ 0x1fc │ │ ldr.w r8, [sp, #544] @ 0x220 │ │ mov r4, r1 │ │ str r0, [sp, #44] @ 0x2c │ │ movs r0, #0 │ │ movs r1, #4 │ │ str r3, [sp, #124] @ 0x7c │ │ strd r0, r1, [sp, #272] @ 0x110 │ │ movw r1, #909 @ 0x38d │ │ str r2, [sp, #56] @ 0x38 │ │ strd r0, r0, [sp, #264] @ 0x108 │ │ strd r0, r0, [sp, #280] @ 0x118 │ │ strd r0, r1, [sp, #288] @ 0x120 │ │ add r0, sp, #264 @ 0x108 │ │ - bl 481dc │ │ + bl 484e4 │ │ ldr r0, [sp, #284] @ 0x11c │ │ cmp r0, #0 │ │ - beq.n 66604 │ │ + beq.n 666ec │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r6, #1 │ │ movs r7, #0 │ │ - b.n 66634 │ │ + b.n 6671c │ │ mla r1, r3, r1, r5 │ │ mla r1, r7, r6, r1 │ │ mov r6, r2 │ │ umull r2, r5, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r5, r3, r7, r5 │ │ mla r7, r3, r7, r5 │ │ mov r3, r2 │ │ lsls r2, r0, #31 │ │ - beq.n 66624 │ │ + beq.n 6670c │ │ umull r2, r5, r3, r6 │ │ cmp r0, #1 │ │ - bne.n 6661a │ │ + bne.n 66702 │ │ lsrs r0, r2, #2 │ │ - beq.n 66604 │ │ + beq.n 666ec │ │ add.w r9, sp, #320 @ 0x140 │ │ add r1, sp, #264 @ 0x108 │ │ add.w r0, r9, #4 │ │ str r4, [sp, #64] @ 0x40 │ │ str r0, [sp, #96] @ 0x60 │ │ mov.w ip, #4 │ │ ldmia r1!, {r2, r3, r6, r7} │ │ @@ -93939,47 +93904,47 @@ │ │ stmia r2!, {r1, r4, r5, r6, r7} │ │ movw r1, #909 @ 0x38d │ │ strd r0, r0, [sp, #320] @ 0x140 │ │ strd r0, r0, [sp, #336] @ 0x150 │ │ strd r0, ip, [sp, #328] @ 0x148 │ │ strd r0, r1, [sp, #344] @ 0x158 │ │ mov r0, r9 │ │ - bl 6c2d4 │ │ + bl 6c3bc │ │ ldr r0, [sp, #340] @ 0x154 │ │ cmp r0, #0 │ │ - beq.n 66696 │ │ + beq.n 6677e │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r6, #1 │ │ movs r7, #0 │ │ - b.n 666c6 │ │ + b.n 667ae │ │ mla r1, r3, r1, r5 │ │ mla r1, r7, r6, r1 │ │ mov r6, r2 │ │ umull r2, r5, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r5, r3, r7, r5 │ │ mla r7, r3, r7, r5 │ │ mov r3, r2 │ │ lsls r2, r0, #31 │ │ - beq.n 666b6 │ │ + beq.n 6679e │ │ umull r2, r5, r3, r6 │ │ cmp r0, #1 │ │ - bne.n 666ac │ │ + bne.n 66794 │ │ lsrs r0, r2, #2 │ │ - beq.n 66696 │ │ + beq.n 6677e │ │ mov r0, r9 │ │ add r1, sp, #232 @ 0xe8 │ │ ldmia r0!, {r2, r3, r6, r7} │ │ cmp.w r8, #0 │ │ stmia r1!, {r2, r3, r6, r7} │ │ ldmia.w r0, {r2, r3, r6, r7} │ │ stmia r1!, {r2, r3, r6, r7} │ │ ldr r4, [sp, #64] @ 0x40 │ │ - beq.w 68b44 │ │ + beq.w 68c2c │ │ movs r1, #52 @ 0x34 │ │ ldr r0, [sp, #124] @ 0x7c │ │ mla r0, r8, r1, r0 │ │ str r0, [sp, #88] @ 0x58 │ │ add r0, sp, #424 @ 0x1a8 │ │ adds r1, r0, #4 │ │ adds r0, #5 │ │ @@ -94000,36 +93965,36 @@ │ │ add.w r1, r9, #17 │ │ str r1, [sp, #76] @ 0x4c │ │ add.w r1, r9, #9 │ │ str r2, [sp, #84] @ 0x54 │ │ str r1, [sp, #72] @ 0x48 │ │ ldr.w r9, [r4, #24] │ │ cmp.w r9, #0 │ │ - beq.w 668cc │ │ + beq.w 669b4 │ │ movs r0, #52 @ 0x34 │ │ ldr.w r8, [r4, #20] │ │ mul.w r7, r9, r0 │ │ ldr r0, [sp, #124] @ 0x7c │ │ add.w r6, r8, #4 │ │ ldrd sl, r5, [r0, #4] │ │ mov.w fp, #0 │ │ - b.n 6675e │ │ + b.n 66846 │ │ adds r6, #52 @ 0x34 │ │ add.w fp, fp, #1 │ │ subs r7, #52 @ 0x34 │ │ - beq.w 668cc │ │ + beq.w 669b4 │ │ ldr r0, [r6, #4] │ │ cmp r0, r5 │ │ - bne.n 66752 │ │ + bne.n 6683a │ │ ldr r0, [r6, #0] │ │ mov r1, sl │ │ mov r2, r5 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.n 66752 │ │ + bne.n 6683a │ │ movs r2, #52 @ 0x34 │ │ mvn.w r1, fp │ │ mla r0, fp, r2, r8 │ │ add r1, r9 │ │ add.w r8, sp, #320 @ 0x140 │ │ muls r2, r1 │ │ mov r7, r8 │ │ @@ -94037,341 +94002,341 @@ │ │ mov r1, r0 │ │ ldr.w r3, [r1], #52 │ │ str r3, [sp, #164] @ 0xa4 │ │ ldmia.w ip!, {r3, r4, r5, r6, sl, lr} │ │ stmia.w r7!, {r3, r4, r5, r6, sl, lr} │ │ ldmia.w ip, {r3, r4, r5, r6, sl, lr} │ │ stmia.w r7, {r3, r4, r5, r6, sl, lr} │ │ - bl d53ca │ │ + bl d509e │ │ ldr.w ip, [sp, #164] @ 0xa4 │ │ sub.w r1, r9, #1 │ │ ldr r0, [sp, #64] @ 0x40 │ │ cmp.w ip, #2147483648 @ 0x80000000 │ │ str r1, [r0, #24] │ │ - beq.w 68ca0 │ │ + beq.w 68d88 │ │ mov r0, r8 │ │ ldr r1, [sp, #40] @ 0x28 │ │ ldmia r0!, {r2, r3, r4, r5, r6, r7} │ │ add.w r9, sp, #424 @ 0x1a8 │ │ mov fp, r8 │ │ mov.w sl, #1000 @ 0x3e8 │ │ stmia r1!, {r2, r3, r4, r5, r6, r7} │ │ ldmia.w r0, {r2, r3, r4, r5, r6, r7} │ │ stmia r1!, {r2, r3, r4, r5, r6, r7} │ │ ldrb.w r0, [sp, #313] @ 0x139 │ │ str.w ip, [sp, #264] @ 0x108 │ │ cmp r0, #1 │ │ - beq.w 66ad6 │ │ + beq.w 66bbe │ │ cmp r0, #2 │ │ - bne.w 68ba6 │ │ + bne.w 68c8e │ │ ldr.w r8, [sp, #284] @ 0x11c │ │ cmp.w r8, #0 │ │ - beq.w 66e7a │ │ + beq.w 66f62 │ │ rsb r0, r8, r8, lsl #3 │ │ ldr r7, [sp, #280] @ 0x118 │ │ lsls r6, r0, #2 │ │ mov r0, r6 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 68c7e │ │ + beq.w 68d66 │ │ mov ip, r0 │ │ mov.w sl, #0 │ │ str r7, [sp, #164] @ 0xa4 │ │ strd r8, r0, [sp, #156] @ 0x9c │ │ - b.n 6683a │ │ + b.n 66922 │ │ mov.w r4, #2147483648 @ 0x80000000 │ │ add.w r0, ip, sl │ │ str.w r5, [ip, sl] │ │ subs.w r8, r8, #1 │ │ add.w sl, sl, #28 │ │ strd r4, r7, [r0, #12] │ │ mov r7, fp │ │ strb r1, [r0, #24] │ │ strd r9, r5, [r0, #4] │ │ str r4, [r0, #20] │ │ - beq.w 66968 │ │ + beq.w 66a50 │ │ cmp r6, sl │ │ - beq.w 66968 │ │ + beq.w 66a50 │ │ mov fp, r7 │ │ ldr.w r0, [fp], #28 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.n 6685c │ │ + bne.n 66944 │ │ mov.w r5, #2147483648 @ 0x80000000 │ │ ldrb r1, [r7, #24] │ │ ldr r0, [r7, #12] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.n 66814 │ │ - b.n 66892 │ │ + beq.n 668fc │ │ + b.n 6697a │ │ ldr r0, [sp, #164] @ 0xa4 │ │ add r0, sl │ │ ldrd r4, r5, [r0, #4] │ │ - cbz r5, 66876 │ │ + cbz r5, 6695e │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 68c6e │ │ + beq.w 68d56 │ │ mov r9, r0 │ │ - b.n 6687a │ │ + b.n 66962 │ │ mov.w r9, #1 │ │ mov r0, r9 │ │ mov r1, r4 │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr.w ip, [sp, #160] @ 0xa0 │ │ ldrb r1, [r7, #24] │ │ ldr r0, [r7, #12] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.n 66814 │ │ + beq.n 668fc │ │ ldr r0, [sp, #164] @ 0xa4 │ │ str r1, [sp, #152] @ 0x98 │ │ add r0, sl │ │ ldrd r1, r4, [r0, #16] │ │ - cbz r4, 668ba │ │ + cbz r4, 669a2 │ │ mov r0, r4 │ │ str r5, [sp, #148] @ 0x94 │ │ mov r5, r9 │ │ mov r9, r1 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 68c66 │ │ + beq.w 68d4e │ │ mov r1, r9 │ │ mov r9, r5 │ │ ldr r5, [sp, #148] @ 0x94 │ │ mov r7, r0 │ │ - b.n 668bc │ │ + b.n 669a4 │ │ movs r7, #1 │ │ mov r0, r7 │ │ mov r2, r4 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr.w ip, [sp, #160] @ 0xa0 │ │ ldr r1, [sp, #152] @ 0x98 │ │ - b.n 66818 │ │ + b.n 66900 │ │ movw r8, #17 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str r0, [sp, #264] @ 0x108 │ │ add.w fp, sp, #320 @ 0x140 │ │ add.w r9, sp, #424 @ 0x1a8 │ │ movt r8, #32768 @ 0x8000 │ │ ldr r2, [r4, #0] │ │ add r1, sp, #168 @ 0xa8 │ │ mov r0, fp │ │ - bl 49d00 │ │ + bl 4a008 │ │ ldr r0, [sp, #96] @ 0x60 │ │ add.w ip, sp, #464 @ 0x1d0 │ │ ldmia.w r0, {r1, r2, r3, r7} │ │ ldr r0, [sp, #320] @ 0x140 │ │ stmia.w ip, {r1, r2, r3, r7} │ │ cmp r0, #2 │ │ - beq.w 68b54 │ │ + beq.w 68c3c │ │ add r7, sp, #464 @ 0x1d0 │ │ ldr r5, [sp, #100] @ 0x64 │ │ ldr r1, [sp, #340] @ 0x154 │ │ ldmia r7, {r2, r3, r7} │ │ ldr r6, [sp, #476] @ 0x1dc │ │ stmia.w r5, {r2, r3, r7} │ │ ldr r2, [sp, #124] @ 0x7c │ │ str r1, [sp, #444] @ 0x1bc │ │ movs r1, #2 │ │ str r0, [sp, #424] @ 0x1a8 │ │ lsls r0, r0, #31 │ │ str r6, [r5, #12] │ │ strb.w r1, [r2, #49] @ 0x31 │ │ - beq.w 68c4a │ │ + beq.w 68d32 │ │ ldr r1, [sp, #428] @ 0x1ac │ │ mov r0, fp │ │ - bl 6558c │ │ + bl 65674 │ │ ldr r0, [sp, #320] @ 0x140 │ │ cmp r0, r8 │ │ - bne.w 68b6a │ │ + bne.w 68c52 │ │ mov r0, r9 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #424] @ 0x1a8 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #428] @ 0x1ac │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ ldr r0, [sp, #264] @ 0x108 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ itt ne │ │ addne.w r0, sp, #264 @ 0x108 │ │ - blne 5becc │ │ + blne 5c0dc │ │ ldr r0, [sp, #124] @ 0x7c │ │ ldr r1, [sp, #88] @ 0x58 │ │ adds r0, #52 @ 0x34 │ │ str r0, [sp, #124] @ 0x7c │ │ cmp r0, r1 │ │ - bne.w 6672c │ │ - b.w 68b44 │ │ + bne.w 66814 │ │ + b.w 68c2c │ │ ldr r0, [sp, #124] @ 0x7c │ │ movs r1, #4 │ │ ldr.w r8, [sp, #156] @ 0x9c │ │ ldrd r0, r2, [r0, #16] │ │ cmp r2, #0 │ │ str r0, [sp, #164] @ 0xa4 │ │ mov.w r0, #0 │ │ str.w r8, [sp, #472] @ 0x1d8 │ │ strd r8, ip, [sp, #464] @ 0x1d0 │ │ str r0, [sp, #432] @ 0x1b0 │ │ strd r0, r1, [sp, #424] @ 0x1a8 │ │ - beq.w 66cc2 │ │ + beq.w 66daa │ │ rsb r0, r2, r2, lsl #3 │ │ add.w r1, ip, r6 │ │ add.w fp, sp, #320 @ 0x140 │ │ mov r9, ip │ │ lsls r4, r0, #2 │ │ movs r0, #0 │ │ str r0, [sp, #152] @ 0x98 │ │ movs r0, #4 │ │ str r2, [sp, #140] @ 0x8c │ │ str r0, [sp, #144] @ 0x90 │ │ str r1, [sp, #148] @ 0x94 │ │ - b.n 669e8 │ │ + b.n 66ad0 │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ ldrd r6, r7, [r5, #4] │ │ str r1, [r5, #0] │ │ ldr r5, [sp, #152] @ 0x98 │ │ ldr r0, [sp, #424] @ 0x1a8 │ │ cmp r5, r0 │ │ - beq.w 66ac6 │ │ + beq.w 66bae │ │ ldr r1, [sp, #144] @ 0x90 │ │ add.w r0, r5, r5, lsl #1 │ │ adds r5, #1 │ │ str r5, [sp, #152] @ 0x98 │ │ str.w sl, [r1, r0, lsl #2] │ │ add.w r0, r1, r0, lsl #2 │ │ strd r6, r7, [r0, #4] │ │ str r5, [sp, #432] @ 0x1b0 │ │ ldr.w r8, [sp, #156] @ 0x9c │ │ add.w fp, sp, #320 @ 0x140 │ │ ldr r1, [sp, #148] @ 0x94 │ │ cmp r9, r1 │ │ - beq.w 66c4a │ │ + beq.w 66d32 │ │ mov r5, r9 │ │ ldr.w sl, [r9], #28 │ │ cmp.w sl, #2147483648 @ 0x80000000 │ │ - beq.n 669e2 │ │ + beq.n 66aca │ │ mov.w r8, #0 │ │ - b.n 66a0e │ │ + b.n 66af6 │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ it eq │ │ cmpeq.w r0, #2147483648 @ 0x80000000 │ │ - beq.n 669d8 │ │ + beq.n 66ac0 │ │ add.w r8, r8, #28 │ │ cmp r4, r8 │ │ - beq.n 669ac │ │ + beq.n 66a94 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ add.w fp, r0, r8 │ │ ldrb.w r0, [fp, #24] │ │ cmp r0, #1 │ │ - bhi.n 66a34 │ │ + bhi.n 66b1c │ │ ldrb r1, [r5, #24] │ │ movs r3, #0 │ │ movs r7, #0 │ │ cmp r1, #2 │ │ it cc │ │ movcc r3, #1 │ │ ldr.w r2, [fp] │ │ cmp.w r2, #2147483648 @ 0x80000000 │ │ - beq.n 66a06 │ │ - b.n 66a66 │ │ + beq.n 66aee │ │ + b.n 66b4e │ │ ldrb r1, [r5, #24] │ │ and.w r2, r0, #14 │ │ cmp r2, #8 │ │ - bne.n 66a58 │ │ + bne.n 66b40 │ │ and.w r2, r1, #14 │ │ movs r3, #0 │ │ subs r2, #8 │ │ clz r2, r2 │ │ lsrs r7, r2, #5 │ │ ldr.w r2, [fp] │ │ cmp.w r2, #2147483648 @ 0x80000000 │ │ - beq.n 66a06 │ │ - b.n 66a66 │ │ + beq.n 66aee │ │ + b.n 66b4e │ │ movs r3, #0 │ │ movs r7, #0 │ │ ldr.w r2, [fp] │ │ cmp.w r2, #2147483648 @ 0x80000000 │ │ - beq.n 66a06 │ │ + beq.n 66aee │ │ ldr.w r2, [fp, #8] │ │ ldr r6, [r5, #8] │ │ cmp r2, r6 │ │ - bne.n 66a06 │ │ + bne.n 66aee │ │ subs r0, r0, r1 │ │ ldr r1, [r5, #4] │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ orrs r0, r3 │ │ orr.w r6, r7, r0 │ │ ldr.w r0, [fp, #4] │ │ - blx d8860 │ │ + blx d8870 │ │ ldr.w ip, [sp, #160] @ 0xa0 │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ tst r6, r0 │ │ - beq.n 66a06 │ │ + beq.n 66aee │ │ ldr.w r1, [fp, #12] │ │ ldr r0, [r5, #12] │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ it ne │ │ cmpne.w r0, #2147483648 @ 0x80000000 │ │ - beq.n 669fa │ │ + beq.n 66ae2 │ │ ldr.w r2, [fp, #20] │ │ ldr r0, [r5, #20] │ │ cmp r2, r0 │ │ - bne.n 66a06 │ │ + bne.n 66aee │ │ ldr r1, [r5, #16] │ │ ldr.w r0, [fp, #16] │ │ - blx d8860 │ │ + blx d8870 │ │ ldr.w ip, [sp, #160] @ 0xa0 │ │ cmp r0, #0 │ │ - bne.n 66a06 │ │ - b.n 669d8 │ │ + bne.n 66aee │ │ + b.n 66ac0 │ │ add r0, sp, #424 @ 0x1a8 │ │ - bl 82a2c │ │ + bl 82a94 │ │ ldr.w ip, [sp, #160] @ 0xa0 │ │ ldr r0, [sp, #428] @ 0x1ac │ │ str r0, [sp, #144] @ 0x90 │ │ - b.n 669c0 │ │ + b.n 66aa8 │ │ movs r0, #0 │ │ movs r1, #4 │ │ add r4, sp, #464 @ 0x1d0 │ │ strd r0, r1, [sp, #472] @ 0x1d8 │ │ movw r1, #909 @ 0x38d │ │ mov r8, r0 │ │ strd r0, r0, [sp, #464] @ 0x1d0 │ │ strd r0, r0, [sp, #480] @ 0x1e0 │ │ str r1, [sp, #492] @ 0x1ec │ │ str r0, [sp, #488] @ 0x1e8 │ │ - b.n 66af8 │ │ + b.n 66be0 │ │ lsrs r0, r2, #2 │ │ - bne.n 66b36 │ │ + bne.n 66c1e │ │ mov r0, r4 │ │ - bl 481dc │ │ + bl 484e4 │ │ ldr r0, [sp, #484] @ 0x1e4 │ │ cmp r0, #0 │ │ - beq.n 66af8 │ │ + beq.n 66be0 │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r6, #1 │ │ movs r7, #0 │ │ - b.n 66b1e │ │ + b.n 66c06 │ │ umull r2, r5, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r5, r3, r7, r5 │ │ mla r7, r3, r7, r5 │ │ mov r3, r2 │ │ lsls r2, r0, #31 │ │ - beq.n 66b0e │ │ + beq.n 66bf6 │ │ umull r2, r5, r3, r6 │ │ cmp r0, #1 │ │ - beq.n 66af4 │ │ + beq.n 66bdc │ │ mla r1, r3, r1, r5 │ │ mla r1, r7, r6, r1 │ │ mov r6, r2 │ │ - b.n 66b0e │ │ + b.n 66bf6 │ │ ldr r0, [sp, #100] @ 0x64 │ │ movs r1, #1 │ │ ldmia r4!, {r2, r3, r6, r7} │ │ stmia r0!, {r2, r3, r6, r7} │ │ ldmia.w r4, {r2, r3, r6, r7} │ │ stmia r0!, {r2, r3, r6, r7} │ │ movs r0, #4 │ │ @@ -94385,586 +94350,586 @@ │ │ stmia r0!, {r2, r3, r6, r7} │ │ ldmia.w r9, {r2, r3, r5, r6, r7} │ │ stmia r0!, {r2, r3, r5, r6, r7} │ │ ldrd r7, r0, [sp, #292] @ 0x124 │ │ cmp r0, #0 │ │ str.w r8, [sp, #396] @ 0x18c │ │ strd r8, r1, [sp, #388] @ 0x184 │ │ - beq.n 66c5e │ │ + beq.n 66d46 │ │ rsb r0, r0, r0, lsl #3 │ │ add.w r9, sp, #424 @ 0x1a8 │ │ mov.w sl, #1000 @ 0x3e8 │ │ add.w r8, r7, r0, lsl #2 │ │ - ldr r1, [pc, #912] @ (66f14 ) │ │ + ldr r1, [pc, #912] @ (66ffc ) │ │ mov r2, r9 │ │ - ldr r0, [pc, #912] @ (66f18 ) │ │ + ldr r0, [pc, #912] @ (67000 ) │ │ add r1, pc │ │ add r0, pc │ │ str r0, [sp, #436] @ 0x1b4 │ │ strd r0, r7, [sp, #428] @ 0x1ac │ │ add r0, sp, #264 @ 0x108 │ │ str r0, [sp, #424] @ 0x1a8 │ │ add r0, sp, #496 @ 0x1f0 │ │ - bl 3e0ec │ │ + bl 3e3f4 │ │ ldrb r0, [r7, #24] │ │ movs r1, #1 │ │ ldr r3, [sp, #504] @ 0x1f8 │ │ bic.w r0, r1, r0 │ │ movs r1, #0 │ │ str r1, [sp, #8] │ │ strd r1, r0, [sp] │ │ add r0, sp, #464 @ 0x1d0 │ │ ldr r1, [sp, #128] @ 0x80 │ │ ldrd r5, r4, [sp, #496] @ 0x1f0 │ │ mov r2, r4 │ │ - bl 6531c │ │ + bl 65404 │ │ cmp r5, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r6, r5, [sp, #464] @ 0x1d0 │ │ movs r4, #17 │ │ movt r4, #32768 @ 0x8000 │ │ cmp r6, r4 │ │ - bne.w 66e34 │ │ + bne.w 66f1c │ │ ldr r2, [sp, #128] @ 0x80 │ │ mov r0, r9 │ │ mov r1, r5 │ │ - bl 55150 │ │ + bl 55360 │ │ ldr r6, [sp, #424] @ 0x1a8 │ │ cmp r6, r4 │ │ - bne.w 66e3a │ │ + bne.w 66f22 │ │ adds r7, #28 │ │ cmp r7, r8 │ │ - bne.n 66b82 │ │ + bne.n 66c6a │ │ ldrd r9, r8, [sp, #292] @ 0x124 │ │ movs r0, #0 │ │ cmp.w r8, #0 │ │ str r0, [sp, #296] @ 0x128 │ │ - beq.n 66c5e │ │ + beq.n 66d46 │ │ movs r7, #0 │ │ - b.n 66c12 │ │ + b.n 66cfa │ │ ldr r0, [r6, #12] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, sl │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r7, #1 │ │ cmp r7, r8 │ │ - beq.n 66c5e │ │ + beq.n 66d46 │ │ rsb r0, r7, r7, lsl #3 │ │ ldr.w r1, [r9, r0, lsl #2] │ │ add.w r6, r9, r0, lsl #2 │ │ cmp r1, #0 │ │ itt ne │ │ ldrne r0, [r6, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd sl, r5, [r6, #16] │ │ cmp r5, #0 │ │ - beq.n 66c00 │ │ + beq.n 66ce8 │ │ add.w r4, sl, #4 │ │ ldr.w r0, [r4, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r4, #16 │ │ subs r5, #1 │ │ - bne.n 66c34 │ │ - b.n 66c00 │ │ + bne.n 66d1c │ │ + b.n 66ce8 │ │ add.w r9, sp, #424 @ 0x1a8 │ │ mov.w sl, #1000 @ 0x3e8 │ │ ldr r2, [sp, #140] @ 0x8c │ │ cmp r2, #0 │ │ str r2, [sp, #140] @ 0x8c │ │ - bne.w 66ea2 │ │ - b.n 67144 │ │ + bne.w 66f8a │ │ + b.n 6722c │ │ ldrd r1, r2, [sp, #280] @ 0x118 │ │ add r0, sp, #400 @ 0x190 │ │ - bl 5a904 │ │ + bl 5ab14 │ │ ldr.w r9, [sp, #284] @ 0x11c │ │ cmp.w r9, #0 │ │ - beq.n 66d1e │ │ + beq.n 66e06 │ │ mov.w r4, r9, lsl #3 │ │ ldr r6, [sp, #280] @ 0x118 │ │ mov r0, r4 │ │ - blx d87f0 │ │ + blx d8810 │ │ ldr r1, [sp, #128] @ 0x80 │ │ mov.w sl, #1000 @ 0x3e8 │ │ cmp r0, #0 │ │ - beq.w 68c98 │ │ + beq.w 68d80 │ │ add.w r5, r6, #24 │ │ add.w r8, sp, #424 @ 0x1a8 │ │ movs r2, #0 │ │ movs r3, #2 │ │ - b.n 66cb2 │ │ - ldr r4, [pc, #640] @ (66f1c ) │ │ + b.n 66d9a │ │ + ldr r4, [pc, #640] @ (67004 ) │ │ add r4, pc │ │ ldr.w r6, [r4, r6, lsl #2] │ │ str.w r3, [r0, r2, lsl #3] │ │ add.w r4, r0, r2, lsl #3 │ │ adds r2, #1 │ │ add r3, r6 │ │ cmp r9, r2 │ │ strb r7, [r4, #4] │ │ - beq.n 66d2a │ │ + beq.n 66e12 │ │ ldrb.w r7, [r5], #28 │ │ subs r6, r7, #1 │ │ uxtb r6, r6 │ │ cmp r6, #2 │ │ - bls.n 66c98 │ │ + bls.n 66d80 │ │ movs r6, #8 │ │ - b.n 66ca0 │ │ + b.n 66d88 │ │ add.w r4, ip, #4 │ │ add.w r9, sp, #424 @ 0x1a8 │ │ movs r5, #0 │ │ movs r0, #4 │ │ mov.w sl, #1000 @ 0x3e8 │ │ - b.n 66cf0 │ │ + b.n 66dd8 │ │ add.w r1, r5, r5, lsl #1 │ │ adds r5, #1 │ │ str.w r6, [r0, r1, lsl #2] │ │ add.w r1, r0, r1, lsl #2 │ │ strd r7, r8, [r1, #4] │ │ str r5, [sp, #432] @ 0x1b0 │ │ adds r4, #28 │ │ subs.w r6, fp, #28 │ │ - beq.n 66d18 │ │ + beq.n 66e00 │ │ mov fp, r6 │ │ ldr.w r6, [r4, #-4] │ │ cmp.w r6, #2147483648 @ 0x80000000 │ │ - beq.n 66ce8 │ │ + beq.n 66dd0 │ │ ldrd r7, r8, [r4] │ │ mov.w r2, #2147483648 @ 0x80000000 │ │ ldr r1, [sp, #424] @ 0x1a8 │ │ str.w r2, [r4, #-4] │ │ cmp r5, r1 │ │ - bne.n 66cd4 │ │ + bne.n 66dbc │ │ mov r0, r9 │ │ - bl 82a2c │ │ + bl 82a94 │ │ ldr r0, [sp, #428] @ 0x1ac │ │ - b.n 66cd4 │ │ + b.n 66dbc │ │ add.w fp, sp, #320 @ 0x140 │ │ - b.n 67144 │ │ + b.n 6722c │ │ movs r0, #4 │ │ add.w r8, sp, #424 @ 0x1a8 │ │ ldr r1, [sp, #128] @ 0x80 │ │ mov.w sl, #1000 @ 0x3e8 │ │ strd r9, r0, [sp, #412] @ 0x19c │ │ movs r0, #1 │ │ ldrd r2, r3, [sp, #268] @ 0x10c │ │ str r0, [sp, #0] │ │ movs r0, #0 │ │ strd r0, r0, [sp, #4] │ │ mov r0, r8 │ │ str.w r9, [sp, #420] @ 0x1a4 │ │ - bl 6531c │ │ + bl 65404 │ │ ldrd r6, r5, [sp, #424] @ 0x1a8 │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r6, r0 │ │ - bne.n 66dec │ │ + bne.n 66ed4 │ │ mov r0, r8 │ │ mov r1, fp │ │ mov r2, r5 │ │ - bl 49d00 │ │ + bl 4a008 │ │ add.w r9, sp, #432 @ 0x1b0 │ │ ldrd r0, r6, [sp, #424] @ 0x1a8 │ │ ldmia.w r9, {r5, r8, r9} │ │ cmp r0, #2 │ │ - beq.n 66df0 │ │ + beq.n 66ed8 │ │ ldr r1, [sp, #444] @ 0x1bc │ │ add r2, sp, #472 @ 0x1d8 │ │ strd r0, r6, [sp, #464] @ 0x1d0 │ │ lsls r0, r0, #31 │ │ stmia.w r2, {r5, r8, r9} │ │ str r1, [sp, #484] @ 0x1e4 │ │ - beq.w 68c4a │ │ + beq.w 68d32 │ │ add r0, sp, #412 @ 0x19c │ │ str r0, [sp, #504] @ 0x1f8 │ │ add r0, sp, #388 @ 0x184 │ │ str r0, [sp, #500] @ 0x1f4 │ │ add r0, sp, #400 @ 0x190 │ │ str r0, [sp, #496] @ 0x1f0 │ │ movs r0, #0 │ │ mov r1, r6 │ │ str r0, [sp, #4] │ │ add r0, sp, #424 @ 0x1a8 │ │ movs r2, #0 │ │ movs r3, #0 │ │ - bl 49e28 │ │ + bl 4a130 │ │ ldr r4, [sp, #428] @ 0x1ac │ │ ldr r5, [sp, #432] @ 0x1b0 │ │ ldr.w r8, [sp, #436] @ 0x1b4 │ │ ldr.w r9, [sp, #440] @ 0x1b8 │ │ ldr r0, [sp, #424] @ 0x1a8 │ │ cmp r0, #0 │ │ - bne.w 68a92 │ │ + bne.w 68b7a │ │ cmp r4, #0 │ │ - beq.w 68aa0 │ │ + beq.w 68b88 │ │ add r0, sp, #424 @ 0x1a8 │ │ add r1, sp, #496 @ 0x1f0 │ │ mov r2, r6 │ │ mov r3, r4 │ │ stmia.w sp, {r5, r8, r9} │ │ - bl 6c5a0 │ │ + bl 6c688 │ │ ldrb.w r5, [sp, #428] @ 0x1ac │ │ movs r0, #17 │ │ ldr r4, [sp, #424] @ 0x1a8 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r4, r0 │ │ - bne.w 68b08 │ │ + bne.w 68bf0 │ │ lsls r0, r5, #31 │ │ - beq.w 68aa0 │ │ + beq.w 68b88 │ │ movs r0, #0 │ │ mov r1, r6 │ │ str r0, [sp, #4] │ │ add r0, sp, #424 @ 0x1a8 │ │ movs r2, #8 │ │ - b.n 66d98 │ │ + b.n 66e80 │ │ ldrd r8, r9, [sp, #432] @ 0x1b0 │ │ lsrs r0, r5, #8 │ │ str r0, [sp, #24] │ │ ldr r0, [sp, #412] @ 0x19c │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #416] @ 0x1a0 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd sl, r7, [sp, #404] @ 0x194 │ │ - cbz r7, 66e1c │ │ + cbz r7, 66f04 │ │ add.w r4, sl, #16 │ │ ldr r0, [r4, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r4, #40 @ 0x28 │ │ subs r7, #1 │ │ - bne.n 66e0a │ │ + bne.n 66ef2 │ │ ldr r0, [sp, #400] @ 0x190 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, sl │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov.w sl, #1000 @ 0x3e8 │ │ ldr r0, [sp, #388] @ 0x184 │ │ lsls r0, r0, #1 │ │ - beq.n 66e52 │ │ - b.n 66e4c │ │ + beq.n 66f3a │ │ + b.n 66f34 │ │ ldrd r8, r9, [sp, #472] @ 0x1d8 │ │ - b.n 66e42 │ │ + b.n 66f2a │ │ add.w r9, sp, #428 @ 0x1ac │ │ ldmia.w r9, {r5, r8, r9} │ │ lsrs r0, r5, #8 │ │ str r0, [sp, #24] │ │ ldr r0, [sp, #388] @ 0x184 │ │ lsls r0, r0, #1 │ │ - beq.n 66e52 │ │ + beq.n 66f3a │ │ ldr r0, [sp, #392] @ 0x188 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, fp │ │ - bl 4b880 │ │ + bl 4bb88 │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r6, r0 │ │ - bne.w 68bb2 │ │ + bne.w 68c9a │ │ strd r8, r9, [sp, #16] │ │ add.w r9, sp, #424 @ 0x1a8 │ │ str r5, [sp, #28] │ │ ldr.w r8, [sp, #284] @ 0x11c │ │ cmp.w r8, #0 │ │ - bne.w 667f2 │ │ + bne.w 668da │ │ ldr r0, [sp, #124] @ 0x7c │ │ movs r1, #0 │ │ mov.w ip, #4 │ │ str r1, [sp, #472] @ 0x1d8 │ │ ldrd r0, r2, [r0, #16] │ │ str r0, [sp, #164] @ 0xa4 │ │ rsb r0, r2, r2, lsl #3 │ │ strd r1, ip, [sp, #464] @ 0x1d0 │ │ lsls r4, r0, #2 │ │ str r1, [sp, #432] @ 0x1b0 │ │ strd r1, ip, [sp, #424] @ 0x1a8 │ │ cmp r2, #0 │ │ str r2, [sp, #140] @ 0x8c │ │ - beq.w 67144 │ │ + beq.w 6722c │ │ ldr.w r9, [sp, #164] @ 0xa4 │ │ add.w r0, r9, r4 │ │ str r0, [sp, #148] @ 0x94 │ │ - b.n 66eec │ │ + b.n 66fd4 │ │ mov.w r5, #2147483648 @ 0x80000000 │ │ ldr r0, [sp, #464] @ 0x1d0 │ │ cmp r8, r0 │ │ - beq.w 67138 │ │ + beq.w 67220 │ │ ldr r0, [sp, #152] @ 0x98 │ │ add.w r8, r8, #1 │ │ str.w r4, [ip, r0, lsl #2] │ │ add.w r0, ip, r0, lsl #2 │ │ strd fp, r4, [r0, #4] │ │ add.w fp, sp, #320 @ 0x140 │ │ strb.w sl, [r0, #24] │ │ mov sl, r6 │ │ strd r5, r7, [r0, #12] │ │ str r5, [r0, #20] │ │ str.w r8, [sp, #472] @ 0x1d8 │ │ add.w r9, r9, #28 │ │ ldr r0, [sp, #148] @ 0x94 │ │ cmp r9, r0 │ │ - beq.w 6714e │ │ + beq.w 67236 │ │ rsb r0, r8, r8, lsl #3 │ │ cmp.w r8, #0 │ │ strd r0, r8, [sp, #152] @ 0x98 │ │ str.w ip, [sp, #160] @ 0xa0 │ │ - beq.w 6709e │ │ + beq.w 67186 │ │ ldr r0, [sp, #152] @ 0x98 │ │ movs r5, #0 │ │ mov.w r8, r0, lsl #2 │ │ ldr.w r0, [r9] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.n 66fd8 │ │ - b.n 66f36 │ │ - cmp r2, #247 @ 0xf7 │ │ + bne.n 670c0 │ │ + b.n 6701e │ │ + cmp r2, #70 @ 0x46 │ │ @ instruction: 0xfffa2ebb │ │ movs r0, r0 │ │ - ldr r3, [sp, #712] @ 0x2c8 │ │ + ldr r2, [sp, #808] @ 0x328 │ │ vsra.u64 d31, d18, #5 │ │ - ldr r7, [pc, #0] @ (66f24 ) │ │ + ldr r7, [pc, #0] @ (6700c ) │ │ it eq │ │ cmpeq.w r1, #2147483648 @ 0x80000000 │ │ - beq.w 6708c │ │ + beq.w 67174 │ │ adds r5, #28 │ │ cmp r8, r5 │ │ - beq.w 6709e │ │ + beq.w 67186 │ │ add.w r0, ip, r5 │ │ ldrb r1, [r0, #24] │ │ cmp r1, #2 │ │ - bcs.n 66f58 │ │ + bcs.n 67040 │ │ ldrb.w r2, [r9, #24] │ │ movs r7, #0 │ │ movs r3, #0 │ │ cmp r2, #2 │ │ it cc │ │ movcc r3, #1 │ │ ldr r6, [r0, #0] │ │ cmp.w r6, #2147483648 @ 0x80000000 │ │ - beq.n 66f88 │ │ - b.n 66f2e │ │ + beq.n 67070 │ │ + b.n 67016 │ │ ldrb.w r2, [r9, #24] │ │ and.w r3, r1, #14 │ │ cmp r3, #8 │ │ - bne.n 66f7c │ │ + bne.n 67064 │ │ and.w r3, r2, #14 │ │ subs r3, #8 │ │ clz r3, r3 │ │ lsrs r7, r3, #5 │ │ movs r3, #0 │ │ ldr r6, [r0, #0] │ │ cmp.w r6, #2147483648 @ 0x80000000 │ │ - beq.n 66f88 │ │ - b.n 66f2e │ │ + beq.n 67070 │ │ + b.n 67016 │ │ movs r3, #0 │ │ movs r7, #0 │ │ ldr r6, [r0, #0] │ │ cmp.w r6, #2147483648 @ 0x80000000 │ │ - bne.n 66f2e │ │ + bne.n 67016 │ │ subs r1, r1, r2 │ │ clz r1, r1 │ │ lsrs r1, r1, #5 │ │ orrs r1, r3 │ │ orrs r1, r7 │ │ - beq.n 66f2e │ │ + beq.n 67016 │ │ ldr r2, [r0, #12] │ │ ldr.w r1, [r9, #12] │ │ cmp.w r2, #2147483648 @ 0x80000000 │ │ it ne │ │ cmpne.w r1, #2147483648 @ 0x80000000 │ │ - beq.n 66f20 │ │ + beq.n 67008 │ │ ldr r2, [r0, #20] │ │ ldr.w r1, [r9, #20] │ │ cmp r2, r1 │ │ - bne.n 66f2e │ │ + bne.n 67016 │ │ ldr.w r1, [r9, #16] │ │ ldr r0, [r0, #16] │ │ - blx d8860 │ │ + blx d8870 │ │ ldr.w ip, [sp, #160] @ 0xa0 │ │ cmp r0, #0 │ │ - bne.n 66f2e │ │ - b.n 6708c │ │ + bne.n 67016 │ │ + b.n 67174 │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ it eq │ │ cmpeq.w r0, #2147483648 @ 0x80000000 │ │ - beq.n 6708c │ │ + beq.n 67174 │ │ adds r5, #28 │ │ cmp r8, r5 │ │ - beq.n 6709e │ │ + beq.n 67186 │ │ add.w r7, ip, r5 │ │ ldrb r0, [r7, #24] │ │ cmp r0, #1 │ │ - bhi.n 66ffa │ │ + bhi.n 670e2 │ │ ldrb.w r1, [r9, #24] │ │ movs r3, #0 │ │ movs r6, #0 │ │ cmp r1, #2 │ │ it cc │ │ movcc r3, #1 │ │ ldr r2, [r7, #0] │ │ cmp.w r2, #2147483648 @ 0x80000000 │ │ - beq.n 66fd2 │ │ - b.n 6702a │ │ + beq.n 670ba │ │ + b.n 67112 │ │ ldrb.w r1, [r9, #24] │ │ and.w r2, r0, #14 │ │ cmp r2, #8 │ │ - bne.n 6701e │ │ + bne.n 67106 │ │ and.w r2, r1, #14 │ │ movs r3, #0 │ │ subs r2, #8 │ │ clz r2, r2 │ │ lsrs r6, r2, #5 │ │ ldr r2, [r7, #0] │ │ cmp.w r2, #2147483648 @ 0x80000000 │ │ - beq.n 66fd2 │ │ - b.n 6702a │ │ + beq.n 670ba │ │ + b.n 67112 │ │ movs r3, #0 │ │ movs r6, #0 │ │ ldr r2, [r7, #0] │ │ cmp.w r2, #2147483648 @ 0x80000000 │ │ - beq.n 66fd2 │ │ + beq.n 670ba │ │ ldr r2, [r7, #8] │ │ ldr.w r4, [r9, #8] │ │ cmp r2, r4 │ │ - bne.n 66fd2 │ │ + bne.n 670ba │ │ subs r0, r0, r1 │ │ ldr.w r1, [r9, #4] │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ orrs r0, r3 │ │ orr.w r4, r6, r0 │ │ ldr r0, [r7, #4] │ │ - blx d8860 │ │ + blx d8870 │ │ ldr.w ip, [sp, #160] @ 0xa0 │ │ cmp r0, #0 │ │ it ne │ │ movne r0, #1 │ │ eor.w r1, r4, #1 │ │ orrs r0, r1 │ │ - bne.n 66fd2 │ │ + bne.n 670ba │ │ ldr r1, [r7, #12] │ │ ldr.w r0, [r9, #12] │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ it ne │ │ cmpne.w r0, #2147483648 @ 0x80000000 │ │ - beq.n 66fc6 │ │ + beq.n 670ae │ │ ldr r2, [r7, #20] │ │ ldr.w r0, [r9, #20] │ │ cmp r2, r0 │ │ - bne.n 66fd2 │ │ + bne.n 670ba │ │ ldr.w r1, [r9, #16] │ │ ldr r0, [r7, #16] │ │ - blx d8860 │ │ + blx d8870 │ │ ldr.w ip, [sp, #160] @ 0xa0 │ │ cmp r0, #0 │ │ - bne.n 66fd2 │ │ + bne.n 670ba │ │ ldr.w r8, [sp, #156] @ 0x9c │ │ add.w r9, r9, #28 │ │ ldr r0, [sp, #148] @ 0x94 │ │ cmp r9, r0 │ │ - bne.w 66eec │ │ - b.n 6714e │ │ + bne.w 66fd4 │ │ + b.n 67236 │ │ ldr.w r0, [r9] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.n 670c6 │ │ + bne.n 671ae │ │ mov.w r6, #1000 @ 0x3e8 │ │ mov.w r4, #2147483648 @ 0x80000000 │ │ ldr.w r8, [sp, #156] @ 0x9c │ │ ldrb.w sl, [r9, #24] │ │ ldr.w r0, [r9, #12] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 66eae │ │ - b.n 6710a │ │ + beq.w 66f96 │ │ + b.n 671f2 │ │ ldrd r5, r4, [r9, #4] │ │ - cbz r4, 670e0 │ │ + cbz r4, 671c8 │ │ mov r0, r4 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 68c66 │ │ + beq.w 68d4e │ │ mov fp, r0 │ │ mov.w r6, #1000 @ 0x3e8 │ │ - b.n 670e8 │ │ + b.n 671d0 │ │ mov.w r6, #1000 @ 0x3e8 │ │ mov.w fp, #1 │ │ mov r0, fp │ │ mov r1, r5 │ │ mov r2, r4 │ │ ldr.w r8, [sp, #156] @ 0x9c │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr.w ip, [sp, #160] @ 0xa0 │ │ ldrb.w sl, [r9, #24] │ │ ldr.w r0, [r9, #12] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 66eae │ │ + beq.w 66f96 │ │ ldrd r8, r5, [r9, #16] │ │ - cbz r5, 67120 │ │ + cbz r5, 67208 │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 68c6e │ │ + beq.w 68d56 │ │ mov r7, r0 │ │ - b.n 67122 │ │ + b.n 6720a │ │ movs r7, #1 │ │ mov r0, r7 │ │ mov r1, r8 │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldrd r8, ip, [sp, #156] @ 0x9c │ │ ldr r0, [sp, #464] @ 0x1d0 │ │ cmp r8, r0 │ │ - bne.w 66eba │ │ + bne.w 66fa2 │ │ add r0, sp, #464 @ 0x1d0 │ │ - bl 47ad0 │ │ + bl 47d26 │ │ ldr.w ip, [sp, #468] @ 0x1d4 │ │ - b.n 66eba │ │ + b.n 66fa2 │ │ add r2, sp, #464 @ 0x1d0 │ │ add r3, sp, #320 @ 0x140 │ │ ldmia r2, {r0, r1, r2} │ │ stmia r3!, {r0, r1, r2} │ │ - b.n 67196 │ │ + b.n 6727e │ │ add r2, sp, #464 @ 0x1d0 │ │ add r3, sp, #320 @ 0x140 │ │ ldr r5, [sp, #140] @ 0x8c │ │ add.w r9, sp, #424 @ 0x1a8 │ │ ldmia r2, {r0, r1, r2} │ │ stmia r3!, {r0, r1, r2} │ │ ldr r0, [sp, #164] @ 0xa4 │ │ add.w r4, r0, #16 │ │ - b.n 6717a │ │ + b.n 67262 │ │ ldr.w r0, [r4, #-12] │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr.w r0, [r4, #-4] │ │ lsls r0, r0, #1 │ │ - bne.n 6718a │ │ + bne.n 67272 │ │ adds r4, #28 │ │ subs r5, #1 │ │ - beq.n 67196 │ │ + beq.n 6727e │ │ ldr.w r0, [r4, #-16] │ │ lsls r0, r0, #1 │ │ - bne.n 67164 │ │ + bne.n 6724c │ │ ldr.w r0, [r4, #-4] │ │ lsls r0, r0, #1 │ │ - beq.n 67174 │ │ + beq.n 6725c │ │ ldr r0, [r4, #0] │ │ - blx d87c0 │ │ + blx d87d0 │ │ adds r4, #28 │ │ subs r5, #1 │ │ - bne.n 6717a │ │ + bne.n 67262 │ │ ldr r4, [sp, #124] @ 0x7c │ │ ldr.w r0, [r4, #12]! │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #164] @ 0xa4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #424] @ 0x1a8 │ │ add r2, sp, #320 @ 0x140 │ │ str r0, [sp, #52] @ 0x34 │ │ ldr r0, [sp, #428] @ 0x1ac │ │ str r0, [sp, #60] @ 0x3c │ │ ldr r0, [sp, #432] @ 0x1b0 │ │ str r0, [sp, #112] @ 0x70 │ │ @@ -94973,41 +94938,41 @@ │ │ movs r0, #0 │ │ movs r1, #4 │ │ strd r0, r1, [sp, #328] @ 0x148 │ │ movw r1, #909 @ 0x38d │ │ strd r0, r0, [sp, #320] @ 0x140 │ │ strd r0, r0, [sp, #336] @ 0x150 │ │ strd r0, r1, [sp, #344] @ 0x158 │ │ - b.n 671d6 │ │ + b.n 672be │ │ lsrs r0, r2, #2 │ │ - bne.n 67214 │ │ + bne.n 672fc │ │ mov r0, fp │ │ - bl 58484 │ │ + bl 58694 │ │ ldr r0, [sp, #340] @ 0x154 │ │ cmp r0, #0 │ │ - beq.n 671d6 │ │ + beq.n 672be │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r6, #1 │ │ movs r7, #0 │ │ - b.n 671fc │ │ + b.n 672e4 │ │ umull r2, r5, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r5, r3, r7, r5 │ │ mla r7, r3, r7, r5 │ │ mov r3, r2 │ │ lsls r2, r0, #31 │ │ - beq.n 671ec │ │ + beq.n 672d4 │ │ umull r2, r5, r3, r6 │ │ cmp r0, #1 │ │ - beq.n 671d2 │ │ + beq.n 672ba │ │ mla r1, r3, r1, r5 │ │ mla r1, r7, r6, r1 │ │ mov r6, r2 │ │ - b.n 671ec │ │ + b.n 672d4 │ │ mov r0, fp │ │ mov r1, r9 │ │ ldmia r0!, {r2, r3, r6, r7} │ │ stmia r1!, {r2, r3, r6, r7} │ │ ldmia.w r0, {r2, r3, r6, r7} │ │ stmia r1!, {r2, r3, r6, r7} │ │ ldr r0, [sp, #124] @ 0x7c │ │ @@ -95022,74 +94987,74 @@ │ │ str r0, [sp, #160] @ 0xa0 │ │ rsb r0, r3, r3, lsl #3 │ │ str r2, [sp, #48] @ 0x30 │ │ str r3, [sp, #120] @ 0x78 │ │ mov.w r0, r0, lsl #2 │ │ str r1, [sp, #116] @ 0x74 │ │ str r0, [sp, #108] @ 0x6c │ │ - ldr r0, [pc, #404] @ (673e4 ) │ │ + ldr r0, [pc, #404] @ (674cc ) │ │ add r0, pc │ │ str r0, [sp, #68] @ 0x44 │ │ - beq.w 679d6 │ │ + beq.w 67abe │ │ ldr r0, [sp, #144] @ 0x90 │ │ ldr r1, [sp, #108] @ 0x6c │ │ add r1, r0 │ │ str r1, [sp, #164] @ 0xa4 │ │ ldr r1, [sp, #104] @ 0x68 │ │ adds r0, #20 │ │ str r0, [sp, #92] @ 0x5c │ │ - b.n 67276 │ │ + b.n 6735e │ │ ldr r1, [sp, #136] @ 0x88 │ │ add.w fp, sp, #320 @ 0x140 │ │ ldr r0, [sp, #160] @ 0xa0 │ │ adds r1, #28 │ │ cmp r1, r0 │ │ - beq.w 679d6 │ │ + beq.w 67abe │ │ ldr r0, [sp, #120] @ 0x78 │ │ str r1, [sp, #136] @ 0x88 │ │ cmp r0, #0 │ │ - beq.w 673e8 │ │ + beq.w 674d0 │ │ ldrb r4, [r1, #25] │ │ ldrb.w fp, [r1, #24] │ │ ldrd r0, ip, [r1, #4] │ │ ldr r2, [r1, #20] │ │ str r0, [sp, #152] @ 0x98 │ │ cmp r2, #0 │ │ str r2, [sp, #132] @ 0x84 │ │ str.w ip, [sp, #156] @ 0x9c │ │ - beq.w 67834 │ │ + beq.w 6791c │ │ ldr.w r8, [sp, #144] @ 0x90 │ │ mov.w r5, #1000 @ 0x3e8 │ │ ldr r0, [r1, #16] │ │ str r0, [sp, #148] @ 0x94 │ │ - b.n 672b2 │ │ + b.n 6739a │ │ add.w r8, r8, #28 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ cmp r8, r0 │ │ - beq.n 67348 │ │ + beq.n 67430 │ │ ldrb.w r0, [r8, #24] │ │ cmp r0, fp │ │ - bne.n 672a8 │ │ + bne.n 67390 │ │ ldrb.w r0, [r8, #25] │ │ cmp r0, r4 │ │ itt eq │ │ ldreq.w r0, [r8, #8] │ │ cmpeq r0, ip │ │ - bne.n 672a8 │ │ + bne.n 67390 │ │ ldr.w r0, [r8, #4] │ │ mov r2, ip │ │ ldr r1, [sp, #152] @ 0x98 │ │ - blx d8860 │ │ + blx d8870 │ │ ldr.w ip, [sp, #156] @ 0x9c │ │ cmp r0, #0 │ │ - bne.n 672a8 │ │ + bne.n 67390 │ │ ldr.w r0, [r8, #20] │ │ ldr r1, [sp, #132] @ 0x84 │ │ cmp r0, r1 │ │ - bne.n 672a8 │ │ + bne.n 67390 │ │ ldr.w r0, [r8, #16] │ │ movs r6, #0 │ │ str r0, [sp, #140] @ 0x8c │ │ ldr r7, [sp, #132] @ 0x84 │ │ ldr r0, [sp, #148] @ 0x94 │ │ mov.w r5, #1000 @ 0x3e8 │ │ ldr r1, [sp, #140] @ 0x8c │ │ @@ -95098,38 +95063,38 @@ │ │ ldrb.w r0, [r9, #12] │ │ ldrb.w r1, [sl, #12] │ │ cmp r1, r0 │ │ ittt eq │ │ ldreq.w r2, [sl, #8] │ │ ldreq.w r0, [r9, #8] │ │ cmpeq r2, r0 │ │ - bne.n 672a8 │ │ + bne.n 67390 │ │ ldr.w r0, [sl, #4] │ │ ldr.w r1, [r9, #4] │ │ - blx d8860 │ │ + blx d8870 │ │ ldr.w ip, [sp, #156] @ 0x9c │ │ cmp r0, #0 │ │ ittt eq │ │ ldrbeq.w r0, [r9, #13] │ │ ldrbeq.w r1, [sl, #13] │ │ cmpeq r1, r0 │ │ - bne.n 672a8 │ │ + bne.n 67390 │ │ adds r6, #16 │ │ subs r7, #1 │ │ add.w r9, sp, #424 @ 0x1a8 │ │ mov sl, r5 │ │ - bne.n 672f2 │ │ - b.n 67266 │ │ + bne.n 673da │ │ + b.n 6734e │ │ mov sl, r5 │ │ ldr r4, [sp, #152] @ 0x98 │ │ mov.w fp, #0 │ │ cmp.w ip, #17 │ │ - bcs.n 673f6 │ │ + bcs.n 674de │ │ cmp.w ip, #8 │ │ - bls.w 67792 │ │ + bls.w 6787a │ │ movw r7, #14777 @ 0x39b9 │ │ add.w r2, r4, ip │ │ ldr r0, [r4, #0] │ │ movt r7, #59970 @ 0xea42 │ │ ldr.w r3, [r2, #-8] │ │ mov r5, ip │ │ eors r0, r7 │ │ @@ -95163,37 +95128,37 @@ │ │ adds r1, r1, r7 │ │ movw r7, #26513 @ 0x6791 │ │ adcs r0, r6 │ │ movw r6, #31225 @ 0x79f9 │ │ movt r6, #40503 @ 0x9e37 │ │ movt r7, #5718 @ 0x1656 │ │ eor.w r1, r1, r0, lsr #5 │ │ - b.n 678f2 │ │ + b.n 679da │ │ nop │ │ - str r6, [r5, #80] @ 0x50 │ │ + str r6, [r0, #68] @ 0x44 │ │ @ instruction: 0xfffbe9d1 │ │ - ldr r4, [pc, #4] @ (673f0 ) │ │ + ldr r4, [pc, #4] @ (674d8 ) │ │ mov.w fp, #0 │ │ cmp.w ip, #17 │ │ - bcc.n 67356 │ │ + bcc.n 6743e │ │ cmp.w ip, #129 @ 0x81 │ │ - bcs.w 6781a │ │ + bcs.w 67902 │ │ movw r0, #51847 @ 0xca87 │ │ cmp.w ip, #33 @ 0x21 │ │ movt r0, #34283 @ 0x85eb │ │ umull r2, r1, ip, r0 │ │ movw r0, #31153 @ 0x79b1 │ │ movt r0, #40503 @ 0x9e37 │ │ mla r0, ip, r0, r1 │ │ strd r0, r2, [sp, #152] @ 0x98 │ │ - bcc.w 676b4 │ │ + bcc.w 6779c │ │ cmp.w ip, #64 @ 0x40 │ │ - bls.w 675de │ │ + bls.w 676c6 │ │ cmp.w ip, #96 @ 0x60 │ │ - bls.n 67504 │ │ + bls.n 675ec │ │ add.w r0, r4, ip │ │ mov r5, r4 │ │ movw r4, #20874 @ 0x518a │ │ movs r7, #0 │ │ ldr.w r1, [r0, #-64] │ │ movt r4, #19424 @ 0x4be0 │ │ ldr.w r2, [r0, #-56] │ │ @@ -95454,17 +95419,17 @@ │ │ adds r1, r1, r2 │ │ ldr r2, [sp, #152] @ 0x98 │ │ adcs r0, r2 │ │ eor.w r2, r4, r9 │ │ adds r1, r1, r3 │ │ adcs r0, r2 │ │ eor.w r1, r1, r0, lsr #5 │ │ - b.n 678f2 │ │ + b.n 679da │ │ cmp.w ip, #3 │ │ - bls.n 67880 │ │ + bls.n 67968 │ │ add.w r1, r4, ip │ │ movw r2, #45428 @ 0xb174 │ │ ldr r0, [r4, #0] │ │ movt r2, #51002 @ 0xc73a │ │ ldr.w r1, [r1, #-4] │ │ movw r4, #57125 @ 0xdf25 │ │ eors r0, r2 │ │ @@ -95496,62 +95461,62 @@ │ │ adc.w r3, fp, #0 │ │ eors r0, r3 │ │ mla r1, r0, r4, r1 │ │ lsrs r0, r2, #28 │ │ orr.w r0, r0, r1, lsl #4 │ │ eor.w r1, r1, r1, lsr #28 │ │ eors r0, r2 │ │ - b.n 67902 │ │ + b.n 679ea │ │ cmp.w ip, #241 @ 0xf1 │ │ - bcs.w 679cc │ │ + bcs.w 67ab4 │ │ ldr r0, [sp, #68] @ 0x44 │ │ mov r1, ip │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ movs r2, #0 │ │ movs r3, #0 │ │ - bl 996ec │ │ - b.n 67902 │ │ + bl 996f8 │ │ + b.n 679ea │ │ ldr r6, [sp, #108] @ 0x6c │ │ ldr r7, [sp, #92] @ 0x5c │ │ - b.n 67840 │ │ + b.n 67928 │ │ adds r7, #28 │ │ subs r6, #28 │ │ - beq.n 67870 │ │ + beq.n 67958 │ │ ldrb r0, [r7, #4] │ │ cmp r0, fp │ │ - bne.n 6783a │ │ + bne.n 67922 │ │ ldrb r0, [r7, #5] │ │ cmp r0, r4 │ │ itt eq │ │ ldreq.w r0, [r7, #-12] │ │ cmpeq r0, ip │ │ - bne.n 6783a │ │ + bne.n 67922 │ │ ldr.w r0, [r7, #-16] │ │ mov r2, ip │ │ ldr r1, [sp, #152] @ 0x98 │ │ - blx d8860 │ │ + blx d8870 │ │ ldr.w ip, [sp, #156] @ 0x9c │ │ cmp r0, #0 │ │ itt eq │ │ ldreq r0, [r7, #0] │ │ cmpeq r0, #0 │ │ - bne.n 6783a │ │ - b.n 67266 │ │ + bne.n 67922 │ │ + b.n 6734e │ │ ldr r4, [sp, #152] @ 0x98 │ │ mov.w fp, #0 │ │ cmp.w ip, #17 │ │ - bcc.w 67356 │ │ - b.n 673f6 │ │ + bcc.w 6743e │ │ + b.n 674de │ │ movw r0, #38082 @ 0x94c2 │ │ movw r1, #32773 @ 0x8005 │ │ movt r0, #14547 @ 0x38d3 │ │ movt r1, #11526 @ 0x2d06 │ │ cmp.w ip, #0 │ │ - beq.n 67902 │ │ + beq.n 679ea │ │ ldrb r0, [r4, #0] │ │ mov.w r1, ip, lsr #1 │ │ ldrb r1, [r4, r1] │ │ add.w r2, r4, ip │ │ movw r3, #44605 @ 0xae3d │ │ lsls r0, r0, #16 │ │ ldrb.w r2, [r2, #-1] │ │ @@ -95583,88 +95548,88 @@ │ │ ldr r7, [sp, #440] @ 0x1b8 │ │ movt r2, #32586 @ 0x7f4a │ │ ldr r3, [sp, #424] @ 0x1a8 │ │ muls r2, r0 │ │ mov r8, r7 │ │ ands r3, r2 │ │ cmp r7, r3 │ │ - bls.w 68c5a │ │ + bls.w 68d42 │ │ ldr r2, [sp, #436] @ 0x1b4 │ │ add.w r3, r3, r3, lsl #1 │ │ add.w r9, r2, r3, lsl #2 │ │ ldr.w r6, [r9, #8] │ │ - cbz r6, 67948 │ │ + cbz r6, 67a30 │ │ ldr.w ip, [r9, #4] │ │ lsls r7, r6, #3 │ │ movs r3, #0 │ │ mov r2, ip │ │ ldrd r4, r5, [r2] │ │ eors r5, r1 │ │ eors r4, r0 │ │ orrs r5, r4 │ │ - beq.n 6799a │ │ + beq.n 67a82 │ │ adds r3, #1 │ │ adds r2, #8 │ │ subs r7, #8 │ │ - bne.n 67934 │ │ + bne.n 67a1c │ │ ldr r2, [sp, #448] @ 0x1c0 │ │ adds r2, #1 │ │ str r2, [sp, #448] @ 0x1c0 │ │ ldr.w r2, [r9] │ │ cmp r6, r2 │ │ - beq.n 679bc │ │ + beq.n 67aa4 │ │ ldr.w r3, [r9, #4] │ │ ldr r2, [sp, #448] @ 0x1c0 │ │ str.w r0, [r3, r6, lsl #3] │ │ adds r0, r6, #1 │ │ str.w r0, [r9, #8] │ │ add.w r0, r3, r6, lsl #3 │ │ add.w r9, sp, #424 @ 0x1a8 │ │ str r1, [r0, #4] │ │ lsls r0, r2, #29 │ │ - bpl.w 67266 │ │ + bpl.w 6734e │ │ mov r1, r8 │ │ mul.w r0, r2, sl │ │ - blx d5af0 │ │ + blx d5b00 │ │ ldr r1, [sp, #452] @ 0x1c4 │ │ cmp r0, r1 │ │ - bls.w 67266 │ │ + bls.w 6734e │ │ mov r0, r9 │ │ - bl 58484 │ │ + bl 58694 │ │ ldr r1, [sp, #440] @ 0x1b8 │ │ ldr r2, [sp, #448] @ 0x1c0 │ │ cmp r1, #0 │ │ - bne.n 67978 │ │ - b.w 68c52 │ │ + bne.n 67a60 │ │ + b.w 68d3a │ │ subs r6, #1 │ │ ldr.w r2, [ip, r6, lsl #3] │ │ str.w r2, [ip, r3, lsl #3] │ │ add.w r2, ip, r6, lsl #3 │ │ add.w r3, ip, r3, lsl #3 │ │ str.w r6, [r9, #8] │ │ ldr r2, [r2, #4] │ │ str r2, [r3, #4] │ │ ldr.w r2, [r9] │ │ cmp r6, r2 │ │ - bne.n 67956 │ │ + bne.n 67a3e │ │ mov r4, r0 │ │ mov r0, r9 │ │ mov r7, r1 │ │ - bl 47b0a │ │ + bl 47f36 │ │ mov r0, r4 │ │ mov r1, r7 │ │ - b.n 67956 │ │ + b.n 67a3e │ │ mov r0, r4 │ │ mov r1, ip │ │ - bl 98f20 │ │ - b.n 67902 │ │ + bl 98f2c │ │ + b.n 679ea │ │ ldr r1, [sp, #144] @ 0x90 │ │ ldr r0, [sp, #120] @ 0x78 │ │ cmp r0, #0 │ │ - beq.w 68194 │ │ + beq.w 6827c │ │ ldr r0, [sp, #48] @ 0x30 │ │ lsls r0, r0, #2 │ │ str r0, [sp, #120] @ 0x78 │ │ ldr r0, [sp, #108] @ 0x6c │ │ add r0, r1 │ │ str r0, [sp, #140] @ 0x8c │ │ ldr r0, [sp, #60] @ 0x3c │ │ @@ -95673,69 +95638,69 @@ │ │ ldr r0, [sp, #104] @ 0x68 │ │ adds r0, #20 │ │ str r0, [sp, #108] @ 0x6c │ │ ldr r0, [sp, #112] @ 0x70 │ │ add.w r0, r0, r0, lsl #1 │ │ lsls r0, r0, #2 │ │ str r0, [sp, #132] @ 0x84 │ │ - b.n 67a2c │ │ + b.n 67b14 │ │ ldr r1, [sp, #128] @ 0x80 │ │ add r2, sp, #264 @ 0x108 │ │ ldr r3, [sp, #144] @ 0x90 │ │ mov r0, fp │ │ - bl 6b88c │ │ + bl 6b974 │ │ ldr r4, [sp, #320] @ 0x140 │ │ movw r8, #17 │ │ movt r8, #32768 @ 0x8000 │ │ cmp r4, r8 │ │ - bne.w 6837e │ │ + bne.w 68466 │ │ ldr r1, [sp, #144] @ 0x90 │ │ ldr r0, [sp, #140] @ 0x8c │ │ adds r1, #28 │ │ cmp r1, r0 │ │ - beq.w 68194 │ │ + beq.w 6827c │ │ ldr r0, [sp, #116] @ 0x74 │ │ str r1, [sp, #144] @ 0x90 │ │ cmp r0, #0 │ │ - beq.n 67af4 │ │ + beq.n 67bdc │ │ ldrd r0, r4, [r1, #4] │ │ str r0, [sp, #164] @ 0xa4 │ │ ldr r0, [r1, #20] │ │ ldrb.w sl, [r1, #25] │ │ ldrb.w r8, [r1, #24] │ │ cmp r0, #0 │ │ - beq.w 67bf0 │ │ + beq.w 67cd8 │ │ ldr r5, [sp, #104] @ 0x68 │ │ str r0, [sp, #148] @ 0x94 │ │ ldr r0, [r1, #16] │ │ str r0, [sp, #156] @ 0x9c │ │ - b.n 67a5c │ │ + b.n 67b44 │ │ adds r5, #28 │ │ ldr r0, [sp, #160] @ 0xa0 │ │ cmp r5, r0 │ │ - beq.n 67ae2 │ │ + beq.n 67bca │ │ ldrb r0, [r5, #24] │ │ cmp r0, r8 │ │ - bne.n 67a54 │ │ + bne.n 67b3c │ │ ldrb r0, [r5, #25] │ │ cmp r0, sl │ │ itt eq │ │ ldreq r0, [r5, #8] │ │ cmpeq r0, r4 │ │ - bne.n 67a54 │ │ + bne.n 67b3c │ │ ldr r0, [r5, #4] │ │ mov r2, r4 │ │ ldr r1, [sp, #164] @ 0xa4 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.n 67a54 │ │ + bne.n 67b3c │ │ ldr r0, [r5, #20] │ │ ldr r1, [sp, #148] @ 0x94 │ │ cmp r0, r1 │ │ - bne.n 67a54 │ │ + bne.n 67b3c │ │ ldr.w fp, [sp, #148] @ 0x94 │ │ mov.w r9, #0 │ │ ldr r0, [r5, #16] │ │ str r0, [sp, #152] @ 0x98 │ │ ldr r0, [sp, #156] @ 0x9c │ │ ldr r1, [sp, #152] @ 0x98 │ │ add.w r6, r0, r9 │ │ @@ -95743,89 +95708,89 @@ │ │ ldrb r0, [r6, #12] │ │ ldrb r1, [r7, #12] │ │ cmp r1, r0 │ │ ittt eq │ │ ldreq r2, [r7, #8] │ │ ldreq r0, [r6, #8] │ │ cmpeq r2, r0 │ │ - bne.n 67a54 │ │ + bne.n 67b3c │ │ ldr r0, [r7, #4] │ │ ldr r1, [r6, #4] │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ ittt eq │ │ ldrbeq r0, [r6, #13] │ │ ldrbeq r1, [r7, #13] │ │ cmpeq r1, r0 │ │ - bne.n 67a54 │ │ + bne.n 67b3c │ │ add.w r9, r9, #16 │ │ subs.w fp, fp, #1 │ │ - bne.n 67a90 │ │ + bne.n 67b78 │ │ ldr r0, [sp, #148] @ 0x94 │ │ add.w fp, sp, #320 @ 0x140 │ │ ldr.w sl, [sp, #156] @ 0x9c │ │ mov.w r8, #1 │ │ add.w r9, sl, r0, lsl #4 │ │ ldr r0, [sp, #112] @ 0x70 │ │ - cbnz r0, 67b1c │ │ - b.n 67b0a │ │ + cbnz r0, 67c04 │ │ + b.n 67bf2 │ │ add.w fp, sp, #320 @ 0x140 │ │ add.w r9, sp, #424 @ 0x1a8 │ │ ldr.w sl, [sp, #156] @ 0x9c │ │ ldr r0, [sp, #148] @ 0x94 │ │ - cbnz r0, 67afe │ │ - b.n 67a04 │ │ + cbnz r0, 67be6 │ │ + b.n 67aec │ │ ldrd sl, r0, [r1, #16] │ │ cmp r0, #0 │ │ - beq.w 67a04 │ │ + beq.w 67aec │ │ add.w r9, sl, r0, lsl #4 │ │ mov.w r8, #0 │ │ ldr r0, [sp, #112] @ 0x70 │ │ - cbnz r0, 67b1c │ │ + cbnz r0, 67c04 │ │ add.w r9, sp, #424 @ 0x1a8 │ │ cmp.w r8, #0 │ │ - beq.w 67a04 │ │ - b.n 67a20 │ │ + beq.w 67aec │ │ + b.n 67b08 │ │ cmp sl, r9 │ │ - beq.n 67b0a │ │ + beq.n 67bf2 │ │ ldrd r4, r5, [sl, #4] │ │ add.w sl, sl, #16 │ │ ldrd r7, r6, [sp, #132] @ 0x84 │ │ - b.n 67b30 │ │ + b.n 67c18 │ │ adds r6, #12 │ │ subs r7, #12 │ │ - beq.n 67b18 │ │ + beq.n 67c00 │ │ ldr r0, [r6, #4] │ │ cmp r0, r5 │ │ - bne.n 67b2a │ │ + bne.n 67c12 │ │ ldr r0, [r6, #0] │ │ mov r1, r4 │ │ mov r2, r5 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.n 67b2a │ │ + bne.n 67c12 │ │ add.w r9, sp, #424 @ 0x1a8 │ │ cmp.w r8, #0 │ │ - beq.w 67a04 │ │ + beq.w 67aec │ │ ldr r5, [sp, #144] @ 0x90 │ │ add r2, sp, #264 @ 0x108 │ │ ldr r1, [sp, #128] @ 0x80 │ │ mov r0, fp │ │ mov r3, r5 │ │ - bl 6b88c │ │ + bl 6b974 │ │ ldr r4, [sp, #320] @ 0x140 │ │ movw r8, #17 │ │ movt r8, #32768 @ 0x8000 │ │ cmp r4, r8 │ │ - bne.w 6837e │ │ + bne.w 68466 │ │ ldrd r0, r1, [r5, #4] │ │ cmp r1, #17 │ │ - bcs.n 67c2a │ │ + bcs.n 67d12 │ │ cmp r1, #8 │ │ - bls.w 67df4 │ │ + bls.w 67edc │ │ movw r6, #14777 @ 0x39b9 │ │ ldr r2, [r0, #0] │ │ ldr r3, [r0, #4] │ │ add r0, r1 │ │ movt r6, #59970 @ 0xea42 │ │ eors r2, r6 │ │ movw r6, #21050 @ 0x523a │ │ @@ -95855,57 +95820,57 @@ │ │ adds r1, r1, r7 │ │ adcs r0, r2 │ │ eor.w r6, r6, ip │ │ eors r5, r4 │ │ adds r1, r1, r6 │ │ adcs r0, r5 │ │ eor.w r1, r1, r0, lsr #5 │ │ - b.n 680ac │ │ + b.n 68194 │ │ ldr r5, [sp, #120] @ 0x78 │ │ ldr r6, [sp, #108] @ 0x6c │ │ - b.n 67bfe │ │ + b.n 67ce6 │ │ adds r6, #28 │ │ subs r5, #28 │ │ - beq.w 67a04 │ │ + beq.w 67aec │ │ ldrb r0, [r6, #4] │ │ cmp r0, r8 │ │ - bne.n 67bf6 │ │ + bne.n 67cde │ │ ldrb r0, [r6, #5] │ │ cmp r0, sl │ │ itt eq │ │ ldreq.w r0, [r6, #-12] │ │ cmpeq r0, r4 │ │ - bne.n 67bf6 │ │ + bne.n 67cde │ │ ldr.w r0, [r6, #-16] │ │ mov r2, r4 │ │ ldr r1, [sp, #164] @ 0xa4 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ itt eq │ │ ldreq r0, [r6, #0] │ │ cmpeq r0, #0 │ │ - bne.n 67bf6 │ │ - b.n 67a20 │ │ + bne.n 67cde │ │ + b.n 67b08 │ │ cmp r1, #129 @ 0x81 │ │ - bcs.w 67e7e │ │ + bcs.w 67f66 │ │ movw r2, #51847 @ 0xca87 │ │ cmp r1, #33 @ 0x21 │ │ movt r2, #34283 @ 0x85eb │ │ umull sl, r3, r1, r2 │ │ movw r2, #31153 @ 0x79b1 │ │ movt r2, #40503 @ 0x9e37 │ │ mla r2, r1, r2, r3 │ │ str r2, [sp, #164] @ 0xa4 │ │ - bcc.w 67e90 │ │ + bcc.w 67f78 │ │ cmp r1, #64 @ 0x40 │ │ str.w sl, [sp, #156] @ 0x9c │ │ - bls.w 67f10 │ │ + bls.w 67ff8 │ │ mov.w fp, #0 │ │ cmp r1, #96 @ 0x60 │ │ - bls.n 67d2a │ │ + bls.n 67e12 │ │ adds r2, r0, r1 │ │ movw r5, #20874 @ 0x518a │ │ movt r5, #19424 @ 0x4be0 │ │ ldr.w r9, [r0, #52] @ 0x34 │ │ ldr.w r3, [r2, #-64] │ │ ldr.w r7, [r2, #-56] │ │ eors r3, r5 │ │ @@ -96020,17 +95985,17 @@ │ │ adds r3, r3, r4 │ │ ldr r4, [sp, #164] @ 0xa4 │ │ adcs r2, r4 │ │ adds r3, r3, r6 │ │ adcs r2, r7 │ │ str r3, [sp, #156] @ 0x9c │ │ str r2, [sp, #164] @ 0xa4 │ │ - b.n 67f14 │ │ + b.n 67ffc │ │ cmp r1, #3 │ │ - bls.n 67e96 │ │ + bls.n 67f7e │ │ ldr r2, [r0, #0] │ │ add r0, r1 │ │ movw r3, #45428 @ 0xb174 │ │ movw r4, #57125 @ 0xdf25 │ │ movt r3, #51002 @ 0xc73a │ │ ldr.w r0, [r0, #-4] │ │ eors r2, r3 │ │ @@ -96063,31 +96028,31 @@ │ │ adc.w r3, r3, #0 │ │ eors r0, r3 │ │ mla r0, r0, r4, r1 │ │ lsrs r1, r2, #28 │ │ orr.w r1, r1, r0, lsl #4 │ │ eor.w sl, r0, r0, lsr #28 │ │ eor.w r5, r1, r2 │ │ - b.n 680cc │ │ + b.n 681b4 │ │ cmp r1, #241 @ 0xf1 │ │ - bcs.n 67f06 │ │ + bcs.n 67fee │ │ ldr r2, [sp, #68] @ 0x44 │ │ movs r3, #0 │ │ str r2, [sp, #0] │ │ movs r2, #0 │ │ - bl 996ec │ │ - b.n 67f0a │ │ + bl 996f8 │ │ + b.n 67ff2 │ │ mov.w r9, #0 │ │ - b.n 67fe8 │ │ + b.n 680d0 │ │ movw r5, #38082 @ 0x94c2 │ │ movw sl, #32773 @ 0x8005 │ │ movt r5, #14547 @ 0x38d3 │ │ movt sl, #11526 @ 0x2d06 │ │ cmp r1, #0 │ │ - beq.w 680cc │ │ + beq.w 681b4 │ │ lsrs r3, r1, #1 │ │ ldrb r2, [r0, #0] │ │ ldrb r3, [r0, r3] │ │ add r0, r1 │ │ movw r6, #31225 @ 0x79f9 │ │ lsls r2, r2, #16 │ │ orr.w r1, r2, r1, lsl #8 │ │ @@ -96107,19 +96072,19 @@ │ │ movt r7, #5718 @ 0x1656 │ │ adds r7, #32 │ │ mla r0, r0, r3, r2 │ │ lsrs r2, r1, #29 │ │ orr.w r2, r2, r0, lsl #3 │ │ eor.w r0, r0, r0, lsr #29 │ │ eors r1, r2 │ │ - b.n 680bc │ │ - bl 98f20 │ │ + b.n 681a4 │ │ + bl 98f2c │ │ mov r5, r0 │ │ mov sl, r1 │ │ - b.n 680cc │ │ + b.n 681b4 │ │ mov.w fp, #0 │ │ adds r7, r0, r1 │ │ movw r3, #2232 @ 0x8b8 │ │ movt r3, #29766 @ 0x7446 │ │ mov.w ip, #0 │ │ ldr.w r6, [r7, #-32] │ │ mov r9, fp │ │ @@ -96251,93 +96216,93 @@ │ │ movw r0, #31829 @ 0x7c55 │ │ ldr r2, [sp, #424] @ 0x1a8 │ │ movt r0, #32586 @ 0x7f4a │ │ ldr r1, [sp, #440] @ 0x1b8 │ │ muls r0, r5 │ │ ands r0, r2 │ │ cmp r1, r0 │ │ - bls.w 68c76 │ │ + bls.w 68d5e │ │ ldr r2, [sp, #436] @ 0x1b4 │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r9, r2, r0, lsl #2 │ │ ldr.w r7, [r9, #8] │ │ - cbz r7, 68112 │ │ + cbz r7, 681fa │ │ ldr.w ip, [r9, #4] │ │ lsls r3, r7, #3 │ │ movs r2, #0 │ │ mov r0, ip │ │ ldrd r6, r4, [r0] │ │ eor.w r4, r4, sl │ │ eors r6, r5 │ │ orrs r6, r4 │ │ - beq.n 68166 │ │ + beq.n 6824e │ │ adds r2, #1 │ │ adds r0, #8 │ │ subs r3, #8 │ │ - bne.n 680fc │ │ + bne.n 681e4 │ │ ldr r0, [sp, #448] @ 0x1c0 │ │ adds r0, #1 │ │ str r0, [sp, #448] @ 0x1c0 │ │ ldr.w r0, [r9] │ │ cmp r7, r0 │ │ - beq.n 68188 │ │ + beq.n 68270 │ │ ldr.w r2, [r9, #4] │ │ adds r3, r7, #1 │ │ ldr r0, [sp, #448] @ 0x1c0 │ │ str.w r5, [r2, r7, lsl #3] │ │ add.w r2, r2, r7, lsl #3 │ │ str.w r3, [r9, #8] │ │ add.w r9, sp, #424 @ 0x1a8 │ │ str.w sl, [r2, #4] │ │ lsls r2, r0, #29 │ │ - bpl.w 67a20 │ │ + bpl.w 67b08 │ │ mov.w r2, #1000 @ 0x3e8 │ │ muls r0, r2 │ │ - blx d5af0 │ │ + blx d5b00 │ │ ldr r1, [sp, #452] @ 0x1c4 │ │ cmp r0, r1 │ │ - bls.w 67a20 │ │ + bls.w 67b08 │ │ mov r0, r9 │ │ - bl 58484 │ │ + bl 58694 │ │ ldr r1, [sp, #440] @ 0x1b8 │ │ ldr r0, [sp, #448] @ 0x1c0 │ │ cmp r1, #0 │ │ - bne.n 68142 │ │ - b.w 68c52 │ │ + bne.n 6822a │ │ + b.w 68d3a │ │ subs r7, #1 │ │ ldr.w r0, [ip, r7, lsl #3] │ │ str.w r0, [ip, r2, lsl #3] │ │ add.w r0, ip, r7, lsl #3 │ │ add.w r2, ip, r2, lsl #3 │ │ str.w r7, [r9, #8] │ │ ldr r0, [r0, #4] │ │ str r0, [r2, #4] │ │ ldr.w r0, [r9] │ │ cmp r7, r0 │ │ - bne.n 68120 │ │ + bne.n 68208 │ │ mov r0, r9 │ │ mov r8, r1 │ │ - bl 47b0a │ │ + bl 47f36 │ │ mov r1, r8 │ │ - b.n 68120 │ │ + b.n 68208 │ │ ldr r0, [sp, #308] @ 0x134 │ │ cmp r0, #0 │ │ - beq.w 682c8 │ │ + beq.w 683b0 │ │ ldr r5, [sp, #304] @ 0x130 │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r0, r5, r0, lsl #3 │ │ str r0, [sp, #164] @ 0xa4 │ │ ldr r0, [sp, #124] @ 0x7c │ │ ldrd r0, sl, [r0, #40] @ 0x28 │ │ adds r0, #16 │ │ str r0, [sp, #160] @ 0xa0 │ │ add.w r0, sl, sl, lsl #1 │ │ lsls r0, r0, #3 │ │ str r0, [sp, #156] @ 0x9c │ │ - b.n 68206 │ │ + b.n 682ee │ │ ldr r0, [sp, #76] @ 0x4c │ │ movw r8, #17 │ │ ldr r1, [sp, #72] @ 0x48 │ │ movt r8, #32768 @ 0x8000 │ │ ldrb.w r3, [sp, #336] @ 0x150 │ │ ldrh.w lr, [r0] │ │ ldrb r2, [r0, #2] │ │ @@ -96352,260 +96317,260 @@ │ │ strb.w r3, [sp, #476] @ 0x1dc │ │ strh.w lr, [r0] │ │ strb r2, [r0, #2] │ │ str r7, [sp, #472] @ 0x1d8 │ │ strb.w r6, [sp, #468] @ 0x1d4 │ │ str r4, [sp, #464] @ 0x1d0 │ │ cmp r4, r8 │ │ - bne.n 682ae │ │ + bne.n 68396 │ │ adds r5, #24 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ cmp r5, r0 │ │ - beq.n 682c8 │ │ + beq.n 683b0 │ │ cmp.w sl, #0 │ │ - beq.n 68256 │ │ + beq.n 6833e │ │ ldrd r6, r4, [r5, #4] │ │ ldrd r9, r7, [r5, #16] │ │ ldrd fp, r8, [sp, #156] @ 0x9c │ │ - b.n 68224 │ │ + b.n 6830c │ │ add.w r8, r8, #24 │ │ subs.w fp, fp, #24 │ │ - beq.n 68256 │ │ + beq.n 6833e │ │ ldr.w r0, [r8, #-8] │ │ cmp r0, r4 │ │ - bne.n 6821a │ │ + bne.n 68302 │ │ ldr.w r0, [r8, #-12] │ │ mov r1, r6 │ │ mov r2, r4 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ itt eq │ │ ldreq.w r0, [r8, #4] │ │ cmpeq r0, r7 │ │ - bne.n 6821a │ │ + bne.n 68302 │ │ ldr.w r0, [r8] │ │ mov r1, r9 │ │ mov r2, r7 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.n 6821a │ │ - b.n 681fe │ │ + bne.n 68302 │ │ + b.n 682e6 │ │ ldr r7, [sp, #128] @ 0x80 │ │ add.w fp, sp, #320 @ 0x140 │ │ add r2, sp, #264 @ 0x108 │ │ mov r3, r5 │ │ mov r0, fp │ │ mov r1, r7 │ │ - bl 69a54 │ │ + bl 69b3c │ │ ldrd r0, r4, [sp, #320] @ 0x140 │ │ cmp r0, #1 │ │ - beq.n 681bc │ │ + beq.n 682a4 │ │ mov r0, fp │ │ mov r1, r4 │ │ mov r2, r7 │ │ ldr r6, [sp, #332] @ 0x14c │ │ - bl 6b7e4 │ │ + bl 6b8cc │ │ movw r8, #17 │ │ ldr r0, [sp, #320] @ 0x140 │ │ movt r8, #32768 @ 0x8000 │ │ cmp r0, r8 │ │ - bne.n 6829c │ │ + bne.n 68384 │ │ add r0, sp, #464 @ 0x1d0 │ │ mov r1, r6 │ │ mov r2, r7 │ │ - bl 6b7e4 │ │ + bl 6b8cc │ │ ldr r4, [sp, #464] @ 0x1d0 │ │ cmp r4, r8 │ │ - beq.n 681fe │ │ - b.n 682ae │ │ + beq.n 682e6 │ │ + b.n 68396 │ │ add r3, sp, #320 @ 0x140 │ │ add.w ip, sp, #464 @ 0x1d0 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r0, r1, r2, r3} │ │ ldr r4, [sp, #464] @ 0x1d0 │ │ cmp r4, r8 │ │ - beq.n 681fe │ │ + beq.n 682e6 │ │ ldr r0, [sp, #468] @ 0x1d4 │ │ add.w r9, sp, #424 @ 0x1a8 │ │ str r0, [sp, #164] @ 0xa4 │ │ ldr r0, [sp, #472] @ 0x1d8 │ │ str r0, [sp, #160] @ 0xa0 │ │ ldr.w sl, [sp, #476] @ 0x1dc │ │ ldrd r5, r6, [sp, #436] @ 0x1b4 │ │ cmp r6, #0 │ │ - bne.n 68390 │ │ - b.n 683a6 │ │ + bne.n 68478 │ │ + b.n 6848e │ │ ldrd r4, r6, [sp, #436] @ 0x1b4 │ │ add.w r9, sp, #424 @ 0x1a8 │ │ add.w r0, r6, r6, lsl #1 │ │ add.w r8, r4, r0, lsl #2 │ │ lsls r0, r0, #2 │ │ mov r7, r4 │ │ cmp r0, #0 │ │ - beq.n 683d8 │ │ + beq.n 684c0 │ │ ldr r5, [r7, #8] │ │ subs r0, #12 │ │ adds r7, #12 │ │ cmp r5, #0 │ │ - beq.n 682dc │ │ + beq.n 683c4 │ │ ldr.w r4, [r7, #-8] │ │ movs r0, #32 │ │ ldrd r6, r9, [r4] │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 68c90 │ │ + beq.w 68d78 │ │ strd r6, r9, [r0] │ │ add.w r9, r4, r5, lsl #3 │ │ add.w fp, sp, #320 @ 0x140 │ │ mov.w sl, #1 │ │ movs r1, #4 │ │ strd r0, sl, [sp, #324] @ 0x144 │ │ str r1, [sp, #320] @ 0x140 │ │ adds r4, #8 │ │ cmp r4, r9 │ │ - bne.n 6835a │ │ + bne.n 68442 │ │ add.w r9, sp, #424 @ 0x1a8 │ │ cmp r7, r8 │ │ - beq.n 683f4 │ │ + beq.n 684dc │ │ ldr r2, [r7, #8] │ │ add.w r1, r7, #12 │ │ - cbnz r2, 68334 │ │ + cbnz r2, 6841c │ │ mov r7, r1 │ │ cmp r1, r8 │ │ - bne.n 68324 │ │ - b.n 683f4 │ │ + bne.n 6840c │ │ + b.n 684dc │ │ ldr r4, [r7, #4] │ │ mov r7, r1 │ │ add.w r9, r4, r2, lsl #3 │ │ ldrd r6, r5, [r4] │ │ ldr r1, [sp, #320] @ 0x140 │ │ cmp sl, r1 │ │ - bne.n 68364 │ │ + bne.n 6844c │ │ movs r0, #8 │ │ mov r1, sl │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ movs r2, #1 │ │ movs r3, #8 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r0, [sp, #324] @ 0x144 │ │ - b.n 68364 │ │ + b.n 6844c │ │ ldrd r6, r5, [r4] │ │ ldr r1, [sp, #320] @ 0x140 │ │ cmp sl, r1 │ │ - beq.n 68346 │ │ + beq.n 6842e │ │ add.w r1, r0, sl, lsl #3 │ │ str.w r6, [r0, sl, lsl #3] │ │ add.w sl, sl, #1 │ │ str r5, [r1, #4] │ │ str.w sl, [sp, #328] @ 0x148 │ │ adds r4, #8 │ │ cmp r4, r9 │ │ - bne.n 6835a │ │ - b.n 6831c │ │ + bne.n 68442 │ │ + b.n 68404 │ │ ldr.w sl, [sp, #332] @ 0x14c │ │ ldr r0, [sp, #324] @ 0x144 │ │ str r0, [sp, #164] @ 0xa4 │ │ ldr r0, [sp, #328] @ 0x148 │ │ str r0, [sp, #160] @ 0xa0 │ │ ldrd r5, r6, [sp, #436] @ 0x1b4 │ │ - cbz r6, 683a6 │ │ + cbz r6, 6848e │ │ adds r7, r5, #4 │ │ ldr.w r0, [r7, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r7, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r7, #12 │ │ subs r6, #1 │ │ - bne.n 68392 │ │ + bne.n 6847a │ │ ldr r0, [sp, #432] @ 0x1b0 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r6, [sp, #112] @ 0x70 │ │ - cbz r6, 683ce │ │ + cbz r6, 684b6 │ │ ldr r0, [sp, #60] @ 0x3c │ │ adds r5, r0, #4 │ │ ldr.w r0, [r5, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #12 │ │ subs r6, #1 │ │ - bne.n 683ba │ │ + bne.n 684a2 │ │ ldr r0, [sp, #52] @ 0x34 │ │ cmp r0, #0 │ │ ldr r0, [sp, #124] @ 0x7c │ │ - bne.n 68452 │ │ - b.n 6845a │ │ + bne.n 6853a │ │ + b.n 68542 │ │ movs r0, #8 │ │ mov.w sl, #0 │ │ str r0, [sp, #160] @ 0xa0 │ │ movs r0, #0 │ │ str r0, [sp, #164] @ 0xa4 │ │ add.w fp, sp, #320 @ 0x140 │ │ movw r8, #17 │ │ movt r8, #32768 @ 0x8000 │ │ - cbnz r6, 6840a │ │ - b.n 68420 │ │ + cbnz r6, 684f2 │ │ + b.n 68508 │ │ ldrd r4, r6, [sp, #436] @ 0x1b4 │ │ ldr r0, [sp, #320] @ 0x140 │ │ str r0, [sp, #164] @ 0xa4 │ │ ldr r0, [sp, #324] @ 0x144 │ │ str r0, [sp, #160] @ 0xa0 │ │ movw r8, #17 │ │ movt r8, #32768 @ 0x8000 │ │ - cbz r6, 68420 │ │ + cbz r6, 68508 │ │ adds r5, r4, #4 │ │ ldr.w r0, [r5, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #12 │ │ subs r6, #1 │ │ - bne.n 6840c │ │ + bne.n 684f4 │ │ ldr r0, [sp, #432] @ 0x1b0 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r5, [sp, #112] @ 0x70 │ │ - cbz r5, 68448 │ │ + cbz r5, 68530 │ │ ldr r0, [sp, #60] @ 0x3c │ │ adds r4, r0, #4 │ │ ldr.w r0, [r4, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r4, #12 │ │ subs r5, #1 │ │ - bne.n 68434 │ │ + bne.n 6851c │ │ ldr r0, [sp, #52] @ 0x34 │ │ mov r4, r8 │ │ cmp r0, #0 │ │ ldr r0, [sp, #124] @ 0x7c │ │ - beq.n 68460 │ │ + beq.n 68548 │ │ ldr r0, [sp, #60] @ 0x3c │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #124] @ 0x7c │ │ cmp r4, r8 │ │ - bne.w 68b90 │ │ + bne.w 68c78 │ │ cmp.w sl, #0 │ │ - beq.n 684e8 │ │ + beq.n 685d0 │ │ ldrd r0, r1, [r0, #4] │ │ cmp r1, #17 │ │ - bcs.n 684fa │ │ + bcs.n 685e2 │ │ mov.w r8, #0 │ │ cmp r1, #8 │ │ - bls.w 68888 │ │ + bls.w 68970 │ │ movw r6, #14777 @ 0x39b9 │ │ ldr r2, [r0, #0] │ │ ldr r3, [r0, #4] │ │ add r0, r1 │ │ movt r6, #59970 @ 0xea42 │ │ eors r2, r6 │ │ movw r6, #21050 @ 0x523a │ │ @@ -96634,39 +96599,39 @@ │ │ adds r1, r1, r7 │ │ adcs r0, r2 │ │ eor.w r6, r6, ip │ │ eors r5, r4 │ │ adds r1, r1, r6 │ │ adcs r0, r5 │ │ eor.w r1, r1, r0, lsr #5 │ │ - b.n 68866 │ │ + b.n 6894e │ │ ldr r0, [sp, #164] @ 0xa4 │ │ ldr r4, [sp, #64] @ 0x40 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #160] @ 0xa0 │ │ - blxne d87c0 │ │ - b.w 668e2 │ │ + blxne d87d0 │ │ + b.w 669ca │ │ mov.w fp, #0 │ │ cmp r1, #129 @ 0x81 │ │ - bcs.w 6890e │ │ + bcs.w 689f6 │ │ movw r2, #51847 @ 0xca87 │ │ cmp r1, #33 @ 0x21 │ │ movt r2, #34283 @ 0x85eb │ │ umull r9, r3, r1, r2 │ │ movw r2, #31153 @ 0x79b1 │ │ movt r2, #40503 @ 0x9e37 │ │ mla r2, r1, r2, r3 │ │ str r2, [sp, #156] @ 0x9c │ │ - bcc.w 687a2 │ │ + bcc.w 6888a │ │ cmp r1, #64 @ 0x40 │ │ str.w r9, [sp, #152] @ 0x98 │ │ - bls.w 686d2 │ │ + bls.w 687ba │ │ cmp r1, #96 @ 0x60 │ │ - bls.n 68602 │ │ + bls.n 686ea │ │ adds r2, r0, r1 │ │ movw r5, #20874 @ 0x518a │ │ movt r5, #19424 @ 0x4be0 │ │ mov.w ip, #0 │ │ ldr.w r3, [r2, #-64] │ │ ldr.w r7, [r2, #-56] │ │ eors r3, r5 │ │ @@ -96918,17 +96883,17 @@ │ │ movw r7, #26513 @ 0x6791 │ │ movt r6, #40503 @ 0x9e37 │ │ movt r7, #5718 @ 0x1656 │ │ umull r2, r3, r1, r6 │ │ mla r1, r1, r7, r3 │ │ mla r4, r0, r6, r1 │ │ eor.w r5, r4, r2 │ │ - b.n 68994 │ │ + b.n 68a7c │ │ cmp r1, #3 │ │ - bls.n 68920 │ │ + bls.n 68a08 │ │ ldr r2, [r0, #0] │ │ add r0, r1 │ │ movw r3, #45428 @ 0xb174 │ │ movw r4, #57125 @ 0xdf25 │ │ movt r3, #51002 @ 0xc73a │ │ ldr.w r0, [r0, #-4] │ │ eors r2, r3 │ │ @@ -96960,28 +96925,28 @@ │ │ adc.w r3, r8, #0 │ │ eors r0, r3 │ │ mla r0, r0, r4, r1 │ │ lsrs r1, r2, #28 │ │ orr.w r1, r1, r0, lsl #4 │ │ eor.w r4, r0, r0, lsr #28 │ │ eor.w r5, r1, r2 │ │ - b.n 68994 │ │ + b.n 68a7c │ │ cmp r1, #241 @ 0xf1 │ │ - bcs.n 6898c │ │ + bcs.n 68a74 │ │ ldr r2, [sp, #68] @ 0x44 │ │ movs r3, #0 │ │ str r2, [sp, #0] │ │ movs r2, #0 │ │ - bl 996ec │ │ - b.n 68990 │ │ + bl 996f8 │ │ + b.n 68a78 │ │ movw r5, #38082 @ 0x94c2 │ │ movw r4, #32773 @ 0x8005 │ │ movt r5, #14547 @ 0x38d3 │ │ movt r4, #11526 @ 0x2d06 │ │ - cbz r1, 68994 │ │ + cbz r1, 68a7c │ │ lsrs r3, r1, #1 │ │ ldrb r2, [r0, #0] │ │ ldrb r3, [r0, r3] │ │ add r0, r1 │ │ movw r6, #31225 @ 0x79f9 │ │ lsls r2, r2, #16 │ │ orr.w r1, r2, r1, lsl #8 │ │ @@ -97001,52 +96966,52 @@ │ │ movt r7, #5718 @ 0x1656 │ │ adds r7, #32 │ │ mla r0, r0, r3, r2 │ │ lsrs r2, r1, #29 │ │ orr.w r2, r2, r0, lsl #3 │ │ eor.w r0, r0, r0, lsr #29 │ │ eors r1, r2 │ │ - b.n 68876 │ │ - bl 98f20 │ │ + b.n 6895e │ │ + bl 98f2c │ │ mov r5, r0 │ │ mov r4, r1 │ │ movw r0, #31829 @ 0x7c55 │ │ ldr r1, [sp, #232] @ 0xe8 │ │ movt r0, #32586 @ 0x7f4a │ │ ldr.w r9, [sp, #248] @ 0xf8 │ │ muls r0, r5 │ │ ands r0, r1 │ │ cmp r9, r0 │ │ - bls.w 68c86 │ │ + bls.w 68d6e │ │ ldr r1, [sp, #244] @ 0xf4 │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r8, r1, r0, lsl #2 │ │ ldr.w r6, [r8, #8] │ │ - cbz r6, 689de │ │ + cbz r6, 68ac6 │ │ ldr.w ip, [r8, #4] │ │ add.w r0, r6, r6, lsl #1 │ │ movs r2, #0 │ │ lsls r0, r0, #3 │ │ mov r3, ip │ │ ldrd r1, r7, [r3] │ │ eors r7, r4 │ │ eors r1, r5 │ │ orrs r1, r7 │ │ - beq.n 68a60 │ │ + beq.n 68b48 │ │ adds r2, #1 │ │ adds r3, #24 │ │ subs r0, #24 │ │ - bne.n 689ca │ │ + bne.n 68ab2 │ │ ldr r0, [sp, #256] @ 0x100 │ │ mov.w fp, #2147483648 @ 0x80000000 │ │ adds r0, #1 │ │ str r0, [sp, #256] @ 0x100 │ │ ldr.w r0, [r8] │ │ cmp r6, r0 │ │ - beq.n 68a8a │ │ + beq.n 68b72 │ │ ldr.w r1, [r8, #4] │ │ add.w r2, r6, r6, lsl #1 │ │ ldr r0, [sp, #256] @ 0x100 │ │ str.w r5, [r1, r2, lsl #3] │ │ add.w r1, r1, r2, lsl #3 │ │ mov.w r5, #1000 @ 0x3e8 │ │ ldr r2, [sp, #164] @ 0xa4 │ │ @@ -97056,509 +97021,509 @@ │ │ ldr r4, [sp, #64] @ 0x40 │ │ strd r2, sl, [r1, #12] │ │ adds r1, r6, #1 │ │ str.w r1, [r8, #8] │ │ movw r8, #17 │ │ movt r8, #32768 @ 0x8000 │ │ lsls r1, r0, #29 │ │ - bmi.n 68a3e │ │ + bmi.n 68b26 │ │ movs.w r0, fp, lsl #1 │ │ - beq.n 68a32 │ │ + beq.n 68b1a │ │ ldr r0, [sp, #12] │ │ - blx d87c0 │ │ + blx d87d0 │ │ add.w fp, sp, #320 @ 0x140 │ │ add.w r9, sp, #424 @ 0x1a8 │ │ - b.w 668e2 │ │ + b.w 669ca │ │ muls r0, r5 │ │ mov r1, r9 │ │ - blx d5af0 │ │ + blx d5b00 │ │ ldr r1, [sp, #260] @ 0x104 │ │ cmp r0, r1 │ │ - bls.n 68a26 │ │ + bls.n 68b0e │ │ add r0, sp, #232 @ 0xe8 │ │ - bl 6c2d4 │ │ + bl 6c3bc │ │ ldr.w r9, [sp, #248] @ 0xf8 │ │ ldr r0, [sp, #256] @ 0x100 │ │ cmp.w r9, #0 │ │ - bne.n 68a3e │ │ - b.n 68c52 │ │ + bne.n 68b26 │ │ + b.n 68d3a │ │ add.w r0, r2, r2, lsl #1 │ │ subs r6, #1 │ │ movs r2, #24 │ │ add.w r0, ip, r0, lsl #3 │ │ ldrd fp, r1, [r0, #8] │ │ str r1, [sp, #12] │ │ add.w r1, r6, r6, lsl #1 │ │ add.w r1, ip, r1, lsl #3 │ │ - bl d53c2 │ │ + bl d51f6 │ │ str.w r6, [r8, #8] │ │ ldr.w r0, [r8] │ │ cmp r6, r0 │ │ - bne.n 689f0 │ │ + bne.n 68ad8 │ │ mov r0, r8 │ │ - bl 479e2 │ │ - b.n 689f0 │ │ + bl 47c38 │ │ + b.n 68ad8 │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r4, r0 │ │ - beq.n 68aa0 │ │ + beq.n 68b88 │ │ lsrs r0, r5, #8 │ │ - b.n 68b1a │ │ + b.n 68c02 │ │ add r0, sp, #464 @ 0x1d0 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #464] @ 0x1d0 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #468] @ 0x1d4 │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ ldr r0, [sp, #412] @ 0x19c │ │ add.w r9, sp, #424 @ 0x1a8 │ │ ldr r7, [sp, #28] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #416] @ 0x1a0 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r4, r5, [sp, #404] @ 0x194 │ │ - cbz r5, 68ae0 │ │ + cbz r5, 68bc8 │ │ add.w r6, r4, #16 │ │ ldr r0, [r6, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #40 @ 0x28 │ │ subs r5, #1 │ │ - bne.n 68ace │ │ + bne.n 68bb6 │ │ ldr r0, [sp, #400] @ 0x190 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #388] @ 0x184 │ │ lsls r0, r0, #1 │ │ - bne.n 68b34 │ │ + bne.n 68c1c │ │ mov r0, fp │ │ - bl 4b880 │ │ + bl 4bb88 │ │ ldr.w r8, [sp, #284] @ 0x11c │ │ cmp.w r8, #0 │ │ - bne.w 667f2 │ │ - b.w 66e7a │ │ + bne.w 668da │ │ + b.w 66f62 │ │ ldr r1, [sp, #32] │ │ ldr.w r8, [sp, #432] @ 0x1b0 │ │ ldr.w r9, [sp, #436] @ 0x1b4 │ │ ldrb r0, [r1, #2] │ │ ldrh r1, [r1, #0] │ │ orr.w r0, r1, r0, lsl #16 │ │ str r0, [sp, #24] │ │ add r0, sp, #464 @ 0x1d0 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #464] @ 0x1d0 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #468] @ 0x1d4 │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ mov r6, r4 │ │ - b.w 66df4 │ │ + b.w 66edc │ │ movs r6, #17 │ │ mov r5, r7 │ │ ldrd r8, r9, [sp, #16] │ │ movt r6, #32768 @ 0x8000 │ │ - b.w 66e4c │ │ + b.w 66f34 │ │ add r6, sp, #232 @ 0xe8 │ │ ldr r7, [sp, #44] @ 0x2c │ │ ldmia r6!, {r0, r1, r2, r3} │ │ stmia r7!, {r0, r1, r2, r3} │ │ ldmia.w r6, {r0, r1, r2, r3} │ │ stmia r7!, {r0, r1, r2, r3} │ │ - b.n 68c3c │ │ + b.n 68d24 │ │ add r3, sp, #464 @ 0x1d0 │ │ ldr r6, [sp, #44] @ 0x2c │ │ mov.w r7, #2147483648 @ 0x80000000 │ │ ldmia r3, {r0, r1, r2, r3} │ │ strd r7, r0, [r6, #8] │ │ add.w r0, r6, #16 │ │ stmia r0!, {r1, r2, r3} │ │ - b.n 68bcc │ │ + b.n 68cb4 │ │ add r3, sp, #320 @ 0x140 │ │ ldr r6, [sp, #44] @ 0x2c │ │ mov.w r7, #2147483648 @ 0x80000000 │ │ ldmia r3, {r0, r1, r2, r3} │ │ strd r7, r0, [r6, #8] │ │ add.w r0, r6, #16 │ │ stmia r0!, {r1, r2, r3} │ │ add r0, sp, #424 @ 0x1a8 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #424] @ 0x1a8 │ │ - cbz r0, 68bcc │ │ + cbz r0, 68cb4 │ │ ldr r0, [sp, #428] @ 0x1ac │ │ - blx 9ca04 │ │ - b.n 68bcc │ │ + blx 9ca10 │ │ + b.n 68cb4 │ │ ldr r1, [sp, #44] @ 0x2c │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ strd r0, r4, [r1, #8] │ │ ldr r0, [sp, #164] @ 0xa4 │ │ str r0, [r1, #16] │ │ ldr r0, [sp, #160] @ 0xa0 │ │ strd r0, sl, [r1, #20] │ │ - b.n 68bcc │ │ + b.n 68cb4 │ │ ldr r1, [sp, #44] @ 0x2c │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ strd r0, r0, [r1, #8] │ │ - b.n 68bcc │ │ + b.n 68cb4 │ │ ldr r1, [sp, #24] │ │ uxtb r0, r5 │ │ ldr r2, [sp, #44] @ 0x2c │ │ orr.w r0, r0, r1, lsl #8 │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ strd r1, r6, [r2, #8] │ │ add.w r1, r2, #16 │ │ stmia.w r1, {r0, r8, r9} │ │ ldr r0, [sp, #264] @ 0x108 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ itt ne │ │ addne.w r0, sp, #264 @ 0x108 │ │ - blne 5becc │ │ + blne 5c0dc │ │ ldrd r8, r9, [sp, #244] @ 0xf4 │ │ cmp.w r9, #0 │ │ - beq.n 68c24 │ │ + beq.n 68d0c │ │ movs r7, #0 │ │ - b.n 68bfc │ │ + b.n 68ce4 │ │ ldr r0, [r4, #0] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, sl │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r7, #1 │ │ cmp r7, r9 │ │ - beq.n 68c24 │ │ + beq.n 68d0c │ │ add.w r0, r7, r7, lsl #1 │ │ add.w r4, r8, r0, lsl #2 │ │ ldrd sl, r6, [r4, #4] │ │ cmp r6, #0 │ │ - beq.n 68bea │ │ + beq.n 68cd2 │ │ add.w r5, sl, #8 │ │ ldr r0, [r5, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #24 │ │ subs r6, #1 │ │ - bne.n 68c10 │ │ - b.n 68bea │ │ + bne.n 68cf8 │ │ + b.n 68cd2 │ │ ldr r0, [sp, #240] @ 0xf0 │ │ - cbz r0, 68c3c │ │ + cbz r0, 68d24 │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add r0, sp, #168 @ 0xa8 │ │ - bl 4b880 │ │ + bl 4bb88 │ │ add.w sp, sp, #508 @ 0x1fc │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add r0, sp, #168 @ 0xa8 │ │ - bl 4b880 │ │ + bl 4bb88 │ │ add.w sp, sp, #508 @ 0x1fc │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #112] @ (68cbc ) │ │ + ldr r0, [pc, #112] @ (68da4 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #92] @ (68cb0 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #92] @ (68d98 ) │ │ add r0, pc │ │ - bl 409c4 │ │ - ldr r2, [pc, #80] @ (68cac ) │ │ + bl 40ccc │ │ + ldr r2, [pc, #80] @ (68d94 ) │ │ mov r0, r3 │ │ mov r1, r8 │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ movs r0, #1 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ - ldr r2, [pc, #60] @ (68cb4 ) │ │ + bl 3e2ac │ │ + ldr r2, [pc, #60] @ (68d9c ) │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ movs r0, #4 │ │ mov r1, r6 │ │ - bl 3dfa4 │ │ - ldr r2, [pc, #48] @ (68cb8 ) │ │ + bl 3e2ac │ │ + ldr r2, [pc, #48] @ (68da0 ) │ │ mov r1, r9 │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ movs r0, #8 │ │ movs r1, #32 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #4 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ - ldr r2, [pc, #28] @ (68cc0 ) │ │ + bl 3e2ac │ │ + ldr r2, [pc, #28] @ (68da8 ) │ │ mov r0, fp │ │ add r2, pc │ │ - bl 3ebf8 │ │ + bl 3ef00 │ │ nop │ │ - subs r4, r3, #1 │ │ + adds r4, r0, #6 │ │ movs r7, r0 │ │ - subs r0, r1, #1 │ │ + adds r0, r6, #5 │ │ movs r7, r0 │ │ - subs r4, r0, #1 │ │ + adds r4, r5, #5 │ │ movs r7, r0 │ │ - subs r2, r6, #0 │ │ + adds r2, r3, #5 │ │ movs r7, r0 │ │ - subs r0, r0, #4 │ │ + subs r0, r5, #0 │ │ movs r7, r0 │ │ - movs r4, #152 @ 0x98 │ │ + movs r3, #192 @ 0xc0 │ │ movs r7, r0 │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #4 │ │ ldrd r4, r7, [r0, #20] │ │ mov r5, r0 │ │ - cbz r7, 68cde │ │ + cbz r7, 68dc6 │ │ mov r6, r4 │ │ mov r0, r6 │ │ - bl 5becc │ │ + bl 5c0dc │ │ adds r6, #52 @ 0x34 │ │ subs r7, #1 │ │ - bne.n 68cd2 │ │ + bne.n 68dba │ │ ldr r0, [r5, #16] │ │ - cbz r0, 68cee │ │ + cbz r0, 68dd6 │ │ mov r0, r4 │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #4 │ │ pop {r4, r5, r6, r7, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #4 │ │ ldrd r9, sl, [r0, #12] │ │ mov r8, r0 │ │ cmp.w sl, #0 │ │ - beq.n 68d42 │ │ + beq.n 68e2a │ │ movs r5, #0 │ │ - b.n 68d1a │ │ + b.n 68e02 │ │ ldr r0, [r4, #0] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, fp │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #1 │ │ cmp r5, sl │ │ - beq.n 68d42 │ │ + beq.n 68e2a │ │ add.w r0, r5, r5, lsl #1 │ │ add.w r4, r9, r0, lsl #2 │ │ ldrd fp, r7, [r4, #4] │ │ cmp r7, #0 │ │ - beq.n 68d08 │ │ + beq.n 68df0 │ │ add.w r6, fp, #8 │ │ ldr r0, [r6, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #24 │ │ subs r7, #1 │ │ - bne.n 68d2e │ │ - b.n 68d08 │ │ + bne.n 68e16 │ │ + b.n 68df0 │ │ ldr.w r0, [r8, #8] │ │ - cbz r0, 68d54 │ │ + cbz r0, 68e3c │ │ mov r0, r9 │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - bmi.n 68d06 │ │ + bmi.n 68dee │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #52 @ 0x34 │ │ mov r8, r0 │ │ ldr r0, [r0, #20] │ │ adds r0, #1 │ │ str.w r0, [r8, #20] │ │ - bcc.w 68fea │ │ + bcc.w 690d2 │ │ movs r7, #0 │ │ movs r4, #1 │ │ strd r7, r7, [r8] │ │ add.w r0, r4, r4, lsl #1 │ │ lsls r5, r0, #2 │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 691ee │ │ + beq.w 692d6 │ │ adds r1, r0, #4 │ │ movs r2, #0 │ │ movs r3, #8 │ │ mov r6, r4 │ │ str.w r2, [r1, #-4] │ │ subs r6, #1 │ │ strd r3, r2, [r1], #12 │ │ - bne.n 68d92 │ │ + bne.n 68e7a │ │ mov r1, r4 │ │ ldr.w r2, [r8, #8] │ │ str r2, [sp, #16] │ │ ldrd r9, r2, [r8, #12] │ │ strd r1, r0, [r8, #8] │ │ add.w r0, r2, r2, lsl #1 │ │ movs r2, #0 │ │ str.w r8, [sp, #20] │ │ add.w r0, r9, r0, lsl #2 │ │ mov fp, r9 │ │ str r0, [sp, #28] │ │ str.w r4, [r8, #16] │ │ str.w r9, [sp, #24] │ │ cmp.w r9, #0 │ │ - beq.w 68f32 │ │ + beq.w 6901a │ │ clz r0, r2 │ │ ldr r4, [sp, #36] @ 0x24 │ │ lsrs r1, r0, #5 │ │ mov r7, r6 │ │ lsls r0, r1, #31 │ │ str r4, [sp, #44] @ 0x2c │ │ - beq.n 68dec │ │ + beq.n 68ed4 │ │ str r5, [sp, #48] @ 0x30 │ │ mov sl, r2 │ │ ldr r0, [sp, #28] │ │ cmp fp, r0 │ │ - bne.n 68e86 │ │ - b.n 6903c │ │ + bne.n 68f6e │ │ + b.n 69124 │ │ cmp r5, r7 │ │ - beq.n 68e74 │ │ + beq.n 68f5c │ │ mov r1, r5 │ │ ldr r5, [r5, #8] │ │ add.w r0, r1, #24 │ │ str r0, [sp, #48] @ 0x30 │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ - bne.w 68f56 │ │ - cbz r2, 68e7a │ │ + bne.w 6903e │ │ + cbz r2, 68f62 │ │ str r2, [sp, #32] │ │ mov r9, r7 │ │ ldr r0, [sp, #48] @ 0x30 │ │ subs r0, r7, r0 │ │ - beq.n 68e5c │ │ + beq.n 68f44 │ │ movw r1, #43691 @ 0xaaab │ │ lsrs r0, r0, #3 │ │ movt r1, #43690 @ 0xaaaa │ │ movs r7, #0 │ │ mul.w r8, r0, r1 │ │ - b.n 68e32 │ │ + b.n 68f1a │ │ ldr r0, [r4, #8] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, sl │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r7, #1 │ │ cmp r7, r8 │ │ - beq.n 68e5c │ │ + beq.n 68f44 │ │ add.w r0, r7, r7, lsl #1 │ │ ldr r1, [sp, #48] @ 0x30 │ │ add.w r4, r1, r0, lsl #3 │ │ ldrd sl, r5, [r4, #12] │ │ cmp r5, #0 │ │ - beq.n 68e20 │ │ + beq.n 68f08 │ │ add.w r6, sl, #16 │ │ ldr r0, [r6, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #40 @ 0x28 │ │ subs r5, #1 │ │ - bne.n 68e48 │ │ - b.n 68e20 │ │ + bne.n 68f30 │ │ + b.n 68f08 │ │ ldr r0, [sp, #44] @ 0x2c │ │ - cbz r0, 68e66 │ │ + cbz r0, 68f4e │ │ ldr r0, [sp, #32] │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov.w sl, #0 │ │ mov r7, r9 │ │ ldr r0, [sp, #28] │ │ cmp fp, r0 │ │ - bne.n 68e86 │ │ - b.n 6903c │ │ + bne.n 68f6e │ │ + b.n 69124 │ │ str r5, [sp, #48] @ 0x30 │ │ cmp r2, #0 │ │ - bne.n 68e04 │ │ + bne.n 68eec │ │ mov.w sl, #0 │ │ ldr r0, [sp, #28] │ │ cmp fp, r0 │ │ - beq.w 6903c │ │ + beq.w 69124 │ │ mov r8, fp │ │ ldr.w r4, [r8], #12 │ │ cmp.w r4, #2147483648 @ 0x80000000 │ │ - beq.w 69042 │ │ + beq.w 6912a │ │ ldrd r5, r0, [fp, #4] │ │ movs r1, #0 │ │ add.w r0, r0, r0, lsl #1 │ │ mov fp, r8 │ │ cmp.w sl, #0 │ │ add.w r6, r5, r0, lsl #3 │ │ mov r2, r5 │ │ - beq.n 68dd8 │ │ + beq.n 68ec0 │ │ str r6, [sp, #40] @ 0x28 │ │ mov r9, r5 │ │ strd sl, r4, [sp, #32] │ │ ldr r0, [sp, #48] @ 0x30 │ │ subs r0, r7, r0 │ │ - beq.n 68f12 │ │ + beq.n 68ffa │ │ movw r1, #43691 @ 0xaaab │ │ lsrs r0, r0, #3 │ │ movt r1, #43690 @ 0xaaaa │ │ movs r6, #0 │ │ mul.w r5, r0, r1 │ │ - b.n 68ede │ │ + b.n 68fc6 │ │ ldr r0, [r4, #8] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r7 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #1 │ │ cmp r6, r5 │ │ - beq.n 68f12 │ │ + beq.n 68ffa │ │ add.w r0, r6, r6, lsl #1 │ │ ldr r1, [sp, #48] @ 0x30 │ │ add.w r4, r1, r0, lsl #3 │ │ ldrd r7, fp, [r4, #12] │ │ cmp.w fp, #0 │ │ - beq.n 68ecc │ │ + beq.n 68fb4 │ │ add.w sl, r7, #16 │ │ ldr.w r0, [sl] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [sl, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w sl, sl, #40 @ 0x28 │ │ subs.w fp, fp, #1 │ │ - bne.n 68ef6 │ │ - b.n 68ecc │ │ + bne.n 68fde │ │ + b.n 68fb4 │ │ ldr r0, [sp, #44] @ 0x2c │ │ add r6, sp, #32 │ │ movs r1, #0 │ │ mov r5, r9 │ │ cmp r0, #0 │ │ ldmia r6, {r0, r4, r6} │ │ mov r2, r9 │ │ mov fp, r8 │ │ - beq.w 68dd8 │ │ - blx d87c0 │ │ + beq.w 68ec0 │ │ + blx d87d0 │ │ movs r1, #0 │ │ mov r2, r5 │ │ mov fp, r8 │ │ - b.n 68dd8 │ │ + b.n 68ec0 │ │ cmp r2, #0 │ │ - beq.w 69162 │ │ + beq.w 6924a │ │ cmp r5, r6 │ │ str r2, [sp, #32] │ │ - beq.w 69174 │ │ + beq.w 6925c │ │ mov r0, r5 │ │ ldr r5, [r5, #8] │ │ mov r1, r0 │ │ adds r0, #24 │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ str r0, [sp, #48] @ 0x30 │ │ - beq.w 69176 │ │ + beq.w 6925e │ │ str r6, [sp, #40] @ 0x28 │ │ - b.n 68f66 │ │ + b.n 6904e │ │ str r2, [sp, #32] │ │ ldr r0, [sp, #20] │ │ str r7, [sp, #40] @ 0x28 │ │ ldr r2, [r0, #0] │ │ ldr r4, [r0, #16] │ │ ldr r0, [sp, #44] @ 0x2c │ │ mov r7, r2 │ │ @@ -97566,28 +97531,28 @@ │ │ ldr r6, [r1, #0] │ │ movw r0, #31829 @ 0x7c55 │ │ movt r0, #32586 @ 0x7f4a │ │ ldr.w r9, [sp, #24] │ │ muls r0, r6 │ │ ands r0, r7 │ │ cmp r4, r0 │ │ - bls.w 691f6 │ │ + bls.w 692de │ │ ldr r2, [r1, #4] │ │ add.w r0, r0, r0, lsl #1 │ │ str r2, [sp, #44] @ 0x2c │ │ mov sl, r7 │ │ ldrd lr, ip, [r1, #12] │ │ ldr r3, [r1, #20] │ │ ldr r1, [sp, #20] │ │ ldr r1, [r1, #12] │ │ add.w r8, r1, r0, lsl #2 │ │ ldr.w r2, [r1, r0, lsl #2] │ │ ldr.w r7, [r8, #8] │ │ cmp r7, r2 │ │ - beq.n 68fd6 │ │ + beq.n 690be │ │ ldr.w r0, [r8, #4] │ │ add.w r1, r7, r7, lsl #1 │ │ adds r2, r7, #1 │ │ str.w r2, [r8, #8] │ │ mov r7, sl │ │ str.w r6, [r0, r1, lsl #3] │ │ add.w r0, r0, r1, lsl #3 │ │ @@ -97595,237 +97560,237 @@ │ │ ldr r1, [sp, #44] @ 0x2c │ │ strd ip, r3, [r0, #16] │ │ stmia.w r2, {r1, r5, lr} │ │ ldr r5, [sp, #48] @ 0x30 │ │ ldr r2, [sp, #32] │ │ ldr r6, [sp, #40] @ 0x28 │ │ cmp.w r9, #0 │ │ - bne.w 68dd0 │ │ - b.n 68f32 │ │ + bne.w 68eb8 │ │ + b.n 6901a │ │ mov r0, r8 │ │ str r3, [sp, #12] │ │ strd lr, ip, [sp, #4] │ │ - bl 479e2 │ │ + bl 47c38 │ │ ldrd lr, ip, [sp, #4] │ │ ldr r3, [sp, #12] │ │ - b.n 68fa2 │ │ + b.n 6908a │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r2, #1 │ │ movs r7, #0 │ │ - b.n 69004 │ │ + b.n 690ec │ │ umull r6, r5, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r5, r3, r7, r5 │ │ mla r7, r3, r7, r5 │ │ mov r3, r6 │ │ lsls r6, r0, #31 │ │ - beq.n 68ff4 │ │ + beq.n 690dc │ │ umull r4, r6, r3, r2 │ │ cmp r0, #1 │ │ - beq.n 6901c │ │ + beq.n 69104 │ │ mla r1, r3, r1, r6 │ │ mla r1, r7, r2, r1 │ │ mov r2, r4 │ │ - b.n 68ff4 │ │ + b.n 690dc │ │ subs r2, r4, #1 │ │ mov.w r0, #0 │ │ sbc.w r0, r0, #0 │ │ strd r2, r0, [r8] │ │ movw r0, #43690 @ 0xaaaa │ │ movt r0, #2730 @ 0xaaa │ │ cmp r4, r0 │ │ - bls.w 69200 │ │ - bl 3e03c │ │ + bls.w 692e8 │ │ + bl 3e344 │ │ ldr.w fp, [sp, #28] │ │ - b.n 69044 │ │ + b.n 6912c │ │ mov fp, r8 │ │ ldr r0, [sp, #44] @ 0x2c │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ str r0, [sp, #20] │ │ ldr r0, [sp, #24] │ │ cmp r0, #0 │ │ - beq.n 69104 │ │ + beq.n 691ec │ │ str r7, [sp, #12] │ │ str.w sl, [sp, #32] │ │ ldr r0, [sp, #28] │ │ subs.w r0, r0, fp │ │ - beq.n 690f2 │ │ + beq.n 691da │ │ movw r1, #43691 @ 0xaaab │ │ lsrs r0, r0, #2 │ │ movt r1, #43690 @ 0xaaaa │ │ movs r6, #0 │ │ muls r0, r1 │ │ str r0, [sp, #36] @ 0x24 │ │ str.w fp, [sp, #40] @ 0x28 │ │ - b.n 69092 │ │ + b.n 6917a │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldr r0, [r0, #0] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w fp, [sp, #40] @ 0x28 │ │ adds r6, #1 │ │ ldr r0, [sp, #36] @ 0x24 │ │ cmp r6, r0 │ │ - beq.n 690f2 │ │ + beq.n 691da │ │ add.w r0, r6, r6, lsl #1 │ │ add.w r0, fp, r0, lsl #2 │ │ str r0, [sp, #44] @ 0x2c │ │ ldrd r5, sl, [r0, #4] │ │ cmp.w sl, #0 │ │ - beq.n 69078 │ │ + beq.n 69160 │ │ mov.w r8, #0 │ │ - b.n 690c0 │ │ + b.n 691a8 │ │ ldr r0, [r4, #8] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r7 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r8, r8, #1 │ │ cmp r8, sl │ │ - beq.n 69078 │ │ + beq.n 69160 │ │ add.w r0, r8, r8, lsl #1 │ │ add.w r4, r5, r0, lsl #3 │ │ ldrd r7, fp, [r4, #12] │ │ cmp.w fp, #0 │ │ - beq.n 690ac │ │ + beq.n 69194 │ │ add.w r9, r7, #16 │ │ ldr.w r0, [r9] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r9, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r9, r9, #40 @ 0x28 │ │ subs.w fp, fp, #1 │ │ - bne.n 690d6 │ │ - b.n 690ac │ │ + bne.n 691be │ │ + b.n 69194 │ │ ldr r0, [sp, #16] │ │ ldr.w sl, [sp, #32] │ │ cmp r0, #0 │ │ ldr r0, [sp, #24] │ │ ldr r7, [sp, #12] │ │ it ne │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ cmp.w sl, #0 │ │ - beq.n 69162 │ │ + beq.n 6924a │ │ ldr r0, [sp, #48] @ 0x30 │ │ subs r0, r7, r0 │ │ - beq.n 6915e │ │ + beq.n 69246 │ │ movw r1, #43691 @ 0xaaab │ │ lsrs r0, r0, #3 │ │ movt r1, #43690 @ 0xaaaa │ │ movs r7, #0 │ │ mul.w r8, r0, r1 │ │ - b.n 69134 │ │ + b.n 6921c │ │ ldr r0, [r4, #8] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r9 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r7, #1 │ │ cmp r7, r8 │ │ - beq.n 6915e │ │ + beq.n 69246 │ │ add.w r0, r7, r7, lsl #1 │ │ ldr r1, [sp, #48] @ 0x30 │ │ add.w r4, r1, r0, lsl #3 │ │ ldrd r9, r6, [r4, #12] │ │ cmp r6, #0 │ │ - beq.n 69122 │ │ + beq.n 6920a │ │ add.w r5, r9, #16 │ │ ldr r0, [r5, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #40 @ 0x28 │ │ subs r6, #1 │ │ - bne.n 6914a │ │ - b.n 69122 │ │ + bne.n 69232 │ │ + b.n 6920a │ │ ldr r0, [sp, #20] │ │ - cbz r0, 69168 │ │ + cbz r0, 69250 │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r0, sl │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ str r5, [sp, #48] @ 0x30 │ │ ldr r0, [sp, #48] @ 0x30 │ │ mov r9, r6 │ │ subs r0, r6, r0 │ │ - beq.n 691cc │ │ + beq.n 692b4 │ │ movw r1, #43691 @ 0xaaab │ │ lsrs r0, r0, #3 │ │ movt r1, #43690 @ 0xaaaa │ │ movs r6, #0 │ │ mul.w r8, r0, r1 │ │ - b.n 691a2 │ │ + b.n 6928a │ │ ldr r0, [r7, #8] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, sl │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #1 │ │ cmp r6, r8 │ │ - beq.n 691cc │ │ + beq.n 692b4 │ │ add.w r0, r6, r6, lsl #1 │ │ ldr r1, [sp, #48] @ 0x30 │ │ add.w r7, r1, r0, lsl #3 │ │ ldrd sl, r4, [r7, #12] │ │ cmp r4, #0 │ │ - beq.n 69190 │ │ + beq.n 69278 │ │ add.w r5, sl, #16 │ │ ldr r0, [r5, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #40 @ 0x28 │ │ subs r4, #1 │ │ - bne.n 691b8 │ │ - b.n 69190 │ │ + bne.n 692a0 │ │ + b.n 69278 │ │ ldr r0, [sp, #36] @ 0x24 │ │ - cbz r0, 691e2 │ │ + cbz r0, 692ca │ │ ldr r0, [sp, #32] │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r0, #0 │ │ mov r7, r9 │ │ str r0, [sp, #20] │ │ mov.w sl, #0 │ │ - b.n 6904e │ │ + b.n 69136 │ │ movs r0, #1 │ │ mov.w sl, #0 │ │ str r0, [sp, #20] │ │ mov r7, r9 │ │ - b.n 6904e │ │ + b.n 69136 │ │ movs r0, #4 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ - ldr r2, [pc, #24] @ (69210 ) │ │ + bl 3e2ac │ │ + ldr r2, [pc, #24] @ (692f8 ) │ │ mov r1, r4 │ │ add r2, pc │ │ - bl 3fa74 │ │ - cbz r4, 69206 │ │ + bl 3fd7c │ │ + cbz r4, 692ee │ │ mov r7, r2 │ │ - b.n 68d78 │ │ + b.n 68e60 │ │ movs r1, #0 │ │ movs r0, #4 │ │ mov r7, r2 │ │ - b.n 68da0 │ │ + b.n 68e88 │ │ nop │ │ - adds r2, r0, r2 │ │ + asrs r2, r5, #30 │ │ movs r7, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #84 @ 0x54 │ │ cmp r2, #0 │ │ str r0, [sp, #24] │ │ - beq.w 69a0a │ │ + beq.w 69af2 │ │ add.w r0, r2, r2, lsl #2 │ │ mov r9, r1 │ │ movs r2, #52 @ 0x34 │ │ movw sl, #26513 @ 0x6791 │ │ add.w r0, r1, r0, lsl #3 │ │ str r0, [sp, #40] @ 0x28 │ │ ldr r0, [sp, #24] │ │ @@ -97834,66 +97799,66 @@ │ │ mov.w fp, #0 │ │ ldrd r0, r1, [r0, #4] │ │ muls r1, r2 │ │ str r3, [sp, #8] │ │ adds r0, #8 │ │ str r0, [sp, #12] │ │ str r1, [sp, #16] │ │ - b.n 69258 │ │ + b.n 69340 │ │ ldr r0, [sp, #40] @ 0x28 │ │ cmp r9, r0 │ │ - beq.w 69a0a │ │ + beq.w 69af2 │ │ mov r1, r9 │ │ ldr.w r0, [r9], #40 │ │ lsls r0, r0, #31 │ │ - beq.n 69250 │ │ + beq.n 69338 │ │ ldr r4, [r1, #8] │ │ movw r0, #31829 @ 0x7c55 │ │ movt r0, #32586 @ 0x7f4a │ │ ldr.w r2, [r8] │ │ ldr.w r3, [r8, #16] │ │ muls r0, r4 │ │ str r3, [sp, #32] │ │ ands r0, r2 │ │ cmp r3, r0 │ │ - bls.w 69a28 │ │ + bls.w 69b10 │ │ ldr r5, [r1, #12] │ │ add.w r0, r0, r0, lsl #1 │ │ ldr.w r1, [r8, #12] │ │ add.w r0, r1, r0, lsl #2 │ │ str r0, [sp, #52] @ 0x34 │ │ ldrd r0, r1, [r0, #4] │ │ add.w r1, r1, r1, lsl #1 │ │ lsls r1, r1, #3 │ │ - cbz r1, 692ac │ │ + cbz r1, 69394 │ │ ldrd r2, r3, [r0], #24 │ │ subs r1, #24 │ │ eors r3, r5 │ │ eors r2, r4 │ │ orrs r2, r3 │ │ - bne.n 6929a │ │ - b.n 69250 │ │ + bne.n 69382 │ │ + b.n 69338 │ │ str.w r9, [sp, #28] │ │ ldrd r9, r8, [sp, #12] │ │ strd r5, r4, [sp, #64] @ 0x40 │ │ - b.n 692d0 │ │ - bl 98f20 │ │ + b.n 693b8 │ │ + bl 98f2c │ │ sub.w r8, r8, #52 @ 0x34 │ │ add.w r9, r9, #52 @ 0x34 │ │ eors r0, r4 │ │ eors r1, r5 │ │ orrs r0, r1 │ │ - beq.w 69810 │ │ + beq.w 698f8 │ │ cmp.w r8, #0 │ │ - beq.w 69a10 │ │ + beq.w 69af8 │ │ ldrd r0, r1, [r9, #-4] │ │ cmp r1, #17 │ │ - bcs.n 69362 │ │ + bcs.n 6944a │ │ cmp r1, #8 │ │ - bls.w 6953e │ │ + bls.w 69626 │ │ ldr r2, [r0, #0] │ │ movw r3, #14777 @ 0x39b9 │ │ ldr.w lr, [r0, #4] │ │ add r0, r1 │ │ movt r3, #59970 @ 0xea42 │ │ eors r2, r3 │ │ ldr.w r7, [r0, #-8] │ │ @@ -97925,32 +97890,32 @@ │ │ movt r7, #40503 @ 0x9e37 │ │ eor.w r3, r3, ip │ │ eors r5, r4 │ │ adds r1, r1, r3 │ │ ldr r4, [sp, #68] @ 0x44 │ │ adcs r0, r5 │ │ ldr r5, [sp, #64] @ 0x40 │ │ - b.n 697e8 │ │ + b.n 698d0 │ │ cmp r1, #129 @ 0x81 │ │ - bcs.w 695c6 │ │ + bcs.w 696ae │ │ movw r2, #51847 @ 0xca87 │ │ movw r3, #31153 @ 0x79b1 │ │ movt r2, #34283 @ 0x85eb │ │ movt r3, #40503 @ 0x9e37 │ │ umull fp, r2, r1, r2 │ │ movs r7, #0 │ │ cmp r1, #33 @ 0x21 │ │ mla r2, r1, r3, r2 │ │ strd r2, fp, [sp, #56] @ 0x38 │ │ - bcc.w 695dc │ │ + bcc.w 696c4 │ │ cmp r1, #64 @ 0x40 │ │ - bls.w 69646 │ │ + bls.w 6972e │ │ mov fp, r7 │ │ cmp r1, #96 @ 0x60 │ │ - bls.n 6946a │ │ + bls.n 69552 │ │ adds r2, r0, r1 │ │ movw r5, #20874 @ 0x518a │ │ movt r5, #19424 @ 0x4be0 │ │ ldr.w r3, [r2, #-64] │ │ ldr.w r6, [r2, #-56] │ │ eors r3, r5 │ │ movw r5, #40904 @ 0x9fc8 │ │ @@ -98077,17 +98042,17 @@ │ │ eors r7, r6 │ │ ldr r6, [sp, #48] @ 0x30 │ │ eor.w r6, r6, sl │ │ adds r2, r2, r6 │ │ str r2, [sp, #60] @ 0x3c │ │ adc.w r2, r3, r7 │ │ str r2, [sp, #56] @ 0x38 │ │ - b.n 6964a │ │ + b.n 69732 │ │ cmp r1, #3 │ │ - bls.n 695e0 │ │ + bls.n 696c8 │ │ adds r2, r0, r1 │ │ movw r3, #45428 @ 0xb174 │ │ ldr r0, [r0, #0] │ │ movt r3, #51002 @ 0xc73a │ │ ldr.w r2, [r2, #-4] │ │ movw r4, #57125 @ 0xdf25 │ │ eors r0, r3 │ │ @@ -98121,28 +98086,28 @@ │ │ eors r0, r3 │ │ mla r1, r0, r4, r1 │ │ lsrs r0, r2, #28 │ │ ldr r4, [sp, #68] @ 0x44 │ │ orr.w r0, r0, r1, lsl #4 │ │ eor.w r1, r1, r1, lsr #28 │ │ eors r0, r2 │ │ - b.n 692be │ │ + b.n 693a6 │ │ cmp r1, #241 @ 0xf1 │ │ - bcs.w 692ba │ │ - ldr r2, [pc, #836] @ (69914 ) │ │ + bcs.w 693a2 │ │ + ldr r2, [pc, #836] @ (699fc ) │ │ movs r3, #0 │ │ add r2, pc │ │ str r2, [sp, #0] │ │ movs r2, #0 │ │ - bl 996ec │ │ - b.n 692be │ │ + bl 996f8 │ │ + b.n 693a6 │ │ mov fp, r7 │ │ - b.n 69718 │ │ + b.n 69800 │ │ cmp r1, #0 │ │ - beq.w 697fe │ │ + beq.w 698e6 │ │ lsrs r3, r1, #1 │ │ ldrb r2, [r0, #0] │ │ ldrb r3, [r0, r3] │ │ add r0, r1 │ │ movw r6, #31225 @ 0x79f9 │ │ lsls r2, r2, #16 │ │ orr.w r1, r2, r1, lsl #8 │ │ @@ -98163,15 +98128,15 @@ │ │ lsrs r2, r1, #29 │ │ orr.w r2, r2, r0, lsl #3 │ │ eor.w r0, r0, r0, lsr #29 │ │ eors r1, r2 │ │ umull r2, r3, r1, r6 │ │ mla r1, r1, r7, r3 │ │ mla r1, r0, r6, r1 │ │ - b.n 697f8 │ │ + b.n 698e0 │ │ mov.w lr, #0 │ │ adds r2, r0, r1 │ │ movw r3, #2232 @ 0x8b8 │ │ movt r3, #29766 @ 0x7446 │ │ mov fp, lr │ │ ldr.w r7, [r2, #-32] │ │ ldr.w r5, [r2, #-24] │ │ @@ -98300,49 +98265,49 @@ │ │ ldrd r5, r4, [sp, #64] @ 0x40 │ │ adcs r0, r2 │ │ eor.w r1, r1, r0, lsr #5 │ │ umull r2, r3, r1, r7 │ │ mla r1, r1, sl, r3 │ │ mla r1, r0, r7, r1 │ │ eor.w r0, r1, r2 │ │ - b.n 692be │ │ + b.n 693a6 │ │ movw r1, #32773 @ 0x8005 │ │ movw r0, #38082 @ 0x94c2 │ │ movt r1, #11526 @ 0x2d06 │ │ movt r0, #14547 @ 0x38d3 │ │ - b.n 692be │ │ + b.n 693a6 │ │ ldrd r1, r2, [r9, #-44] @ 0x2c │ │ add r0, sp, #72 @ 0x48 │ │ - bl 5a904 │ │ + bl 5ab14 │ │ ldr r4, [sp, #80] @ 0x50 │ │ ldr r0, [sp, #76] @ 0x4c │ │ cmp r4, #0 │ │ str r0, [sp, #36] @ 0x24 │ │ - beq.n 698c6 │ │ + beq.n 699ae │ │ add.w r0, r4, r4, lsl #2 │ │ lsls r0, r0, #3 │ │ str r0, [sp, #48] @ 0x30 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ str r0, [sp, #56] @ 0x38 │ │ - beq.w 69a32 │ │ + beq.w 69b1a │ │ ldr.w r9, [sp, #36] @ 0x24 │ │ mov.w sl, #0 │ │ ldr r0, [sp, #52] @ 0x34 │ │ mov r8, r4 │ │ str r4, [sp, #44] @ 0x2c │ │ - b.n 6989c │ │ + b.n 69984 │ │ movs r6, #1 │ │ add.w r0, r9, #40 @ 0x28 │ │ str r0, [sp, #60] @ 0x3c │ │ mov r0, r6 │ │ mov r1, r5 │ │ mov r2, fp │ │ sub.w r8, r8, #1 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r4, [sp, #56] @ 0x38 │ │ cmp.w r8, #0 │ │ ldmia.w r9, {r2, r3, r5, r7} │ │ ldrb.w r0, [r9, #32] │ │ ldr.w r1, [r9, #28] │ │ str.w r2, [r4, sl] │ │ add.w r2, r4, sl │ │ @@ -98352,81 +98317,81 @@ │ │ stmia.w r0, {r3, r5, r7, fp} │ │ ldr.w r9, [sp, #60] @ 0x3c │ │ ldr r0, [sp, #52] @ 0x34 │ │ ldr r4, [sp, #44] @ 0x2c │ │ strd r6, fp, [r2, #20] │ │ mov.w fp, #0 │ │ str r1, [r2, #28] │ │ - beq.n 698bc │ │ + beq.n 699a4 │ │ ldr r1, [sp, #48] @ 0x30 │ │ cmp r1, sl │ │ - beq.n 698bc │ │ + beq.n 699a4 │ │ ldrd r5, fp, [r9, #20] │ │ cmp.w fp, #0 │ │ - beq.n 69848 │ │ + beq.n 69930 │ │ mov r0, fp │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 69a20 │ │ + beq.w 69b08 │ │ mov r6, r0 │ │ - b.n 6984a │ │ + b.n 69932 │ │ movw sl, #26513 @ 0x6791 │ │ movt sl, #5718 @ 0x1656 │ │ - b.n 698cc │ │ + b.n 699b4 │ │ movs r0, #8 │ │ str r0, [sp, #56] @ 0x38 │ │ ldr r0, [sp, #52] @ 0x34 │ │ ldr r6, [r0, #8] │ │ ldr.w r8, [sp, #8] │ │ ldr.w r9, [sp, #28] │ │ - cbz r6, 69900 │ │ + cbz r6, 699e8 │ │ ldr r0, [sp, #52] @ 0x34 │ │ movs r2, #0 │ │ ldr.w ip, [r0, #4] │ │ add.w r0, r6, r6, lsl #1 │ │ lsls r0, r0, #3 │ │ mov r3, ip │ │ ldr r1, [sp, #64] @ 0x40 │ │ ldrd r7, r5, [r3] │ │ eors r5, r1 │ │ ldr r1, [sp, #68] @ 0x44 │ │ eors r7, r1 │ │ orrs r7, r5 │ │ - beq.n 69918 │ │ + beq.n 69a00 │ │ adds r2, #1 │ │ adds r3, #24 │ │ subs r0, #24 │ │ - bne.n 698e8 │ │ + bne.n 699d0 │ │ ldr.w r0, [r8, #24] │ │ mov.w r5, #2147483648 @ 0x80000000 │ │ adds r0, #1 │ │ str.w r0, [r8, #24] │ │ ldr r0, [sp, #52] @ 0x34 │ │ - b.n 6993e │ │ + b.n 69a26 │ │ nop │ │ - sbcs r4, r5 │ │ + lsrs r4, r0 │ │ vtbl.8 d30, {d11-d14}, d2 │ │ lsls r2, r0, #1 │ │ subs r6, #1 │ │ add.w r0, ip, r0, lsl #3 │ │ ldrd r5, r2, [r0, #8] │ │ str r2, [sp, #4] │ │ ldr r2, [r0, #16] │ │ str r2, [sp, #20] │ │ add.w r2, r6, r6, lsl #1 │ │ add.w r1, ip, r2, lsl #3 │ │ movs r2, #24 │ │ - bl d53c2 │ │ + bl d51f6 │ │ ldr r0, [sp, #52] @ 0x34 │ │ str r6, [r0, #8] │ │ ldr r3, [sp, #32] │ │ ldr r1, [r0, #0] │ │ str r5, [sp, #60] @ 0x3c │ │ cmp r6, r1 │ │ - beq.n 69a00 │ │ + beq.n 69ae8 │ │ ldr r1, [r0, #4] │ │ add.w r2, r6, r6, lsl #1 │ │ ldr r7, [sp, #68] @ 0x44 │ │ mov r5, r0 │ │ ldr.w r0, [r8, #24] │ │ str.w r7, [r1, r2, lsl #3] │ │ add.w r1, r1, r2, lsl #3 │ │ @@ -98434,207 +98399,207 @@ │ │ strd r2, r4, [r1, #4] │ │ ldr r2, [sp, #56] @ 0x38 │ │ strd r2, r4, [r1, #12] │ │ adds r1, r6, #1 │ │ str r1, [r5, #8] │ │ lsls r1, r0, #29 │ │ ldr r5, [sp, #60] @ 0x3c │ │ - bmi.n 699d8 │ │ + bmi.n 69ac0 │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ - beq.n 699a2 │ │ + beq.n 69a8a │ │ ldr r0, [sp, #20] │ │ - cbz r0, 69998 │ │ + cbz r0, 69a80 │ │ ldr r0, [sp, #4] │ │ ldr r7, [sp, #20] │ │ add.w r6, r0, #16 │ │ ldr r0, [r6, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #40 @ 0x28 │ │ subs r7, #1 │ │ - bne.n 69986 │ │ + bne.n 69a6e │ │ cmp r5, #0 │ │ itt ne │ │ ldrne r0, [sp, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #24] │ │ mov r2, r4 │ │ ldr r1, [sp, #36] @ 0x24 │ │ mov r3, r8 │ │ - bl 69214 │ │ - cbz r4, 699c8 │ │ + bl 692fc │ │ + cbz r4, 69ab0 │ │ ldr r0, [sp, #36] @ 0x24 │ │ add.w r5, r0, #16 │ │ ldr r0, [r5, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #40 @ 0x28 │ │ subs r4, #1 │ │ - bne.n 699b6 │ │ + bne.n 69a9e │ │ ldr r0, [sp, #72] @ 0x48 │ │ cmp r0, #0 │ │ - beq.w 69250 │ │ + beq.w 69338 │ │ ldr r0, [sp, #36] @ 0x24 │ │ - blx d87c0 │ │ - b.n 69250 │ │ + blx d87d0 │ │ + b.n 69338 │ │ mov.w r1, #1000 @ 0x3e8 │ │ muls r0, r1 │ │ mov r1, r3 │ │ - blx d5af0 │ │ + blx d5b00 │ │ ldr.w r1, [r8, #28] │ │ cmp r0, r1 │ │ - bls.n 69974 │ │ + bls.n 69a5c │ │ mov r0, r8 │ │ - bl 68d5c │ │ + bl 68e44 │ │ ldr.w r3, [r8, #16] │ │ ldr.w r0, [r8, #24] │ │ cmp r3, #0 │ │ - bne.n 699d8 │ │ - b.n 69a18 │ │ - bl 479e2 │ │ + bne.n 69ac0 │ │ + b.n 69b00 │ │ + bl 47c38 │ │ ldr r0, [sp, #52] @ 0x34 │ │ ldr r3, [sp, #32] │ │ - b.n 69948 │ │ + b.n 69a30 │ │ add sp, #84 @ 0x54 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #44] @ (69a40 ) │ │ + ldr r0, [pc, #44] @ (69b28 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #32] @ (69a3c ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #32] @ (69b24 ) │ │ add r0, pc │ │ - bl 409c4 │ │ + bl 40ccc │ │ movs r0, #1 │ │ mov r1, fp │ │ - bl 3dfa4 │ │ - ldr r2, [pc, #24] @ (69a44 ) │ │ + bl 3e2ac │ │ + ldr r2, [pc, #24] @ (69b2c ) │ │ ldr r1, [sp, #32] │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ ldr r1, [sp, #48] @ 0x30 │ │ movs r0, #8 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - asrs r2, r0, #2 │ │ + lsrs r2, r5, #30 │ │ movs r7, r0 │ │ - asrs r2, r1, #29 │ │ + asrs r2, r6, #25 │ │ movs r7, r0 │ │ - asrs r0, r0, #2 │ │ + lsrs r0, r5, #30 │ │ movs r7, r0 │ │ mov r3, r1 │ │ ldrd r1, r2, [r0, #4] │ │ mov r0, r3 │ │ - b.w 3ffd4 │ │ + b.w 402dc │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #52 @ 0x34 │ │ mov r8, r1 │ │ - ldr r1, [pc, #228] @ (69b44 ) │ │ - ldr r6, [pc, #232] @ (69b48 ) │ │ + ldr r1, [pc, #228] @ (69c2c ) │ │ + ldr r6, [pc, #232] @ (69c30 ) │ │ mov r5, r0 │ │ mov r7, r2 │ │ add r1, pc │ │ add r6, pc │ │ add r0, sp, #24 │ │ mov r4, r3 │ │ strd r2, r6, [sp, #36] @ 0x24 │ │ add r2, sp, #36 @ 0x24 │ │ strd r3, r6, [sp, #44] @ 0x2c │ │ - bl 3e0ec │ │ + bl 3e3f4 │ │ ldr r0, [sp, #24] │ │ mov.w r9, #1 │ │ ldrd r2, r3, [sp, #28] │ │ mov r1, r8 │ │ str r0, [sp, #20] │ │ add r0, sp, #36 @ 0x24 │ │ strd r9, r9, [sp] │ │ str.w r9, [sp, #8] │ │ str r2, [sp, #16] │ │ - bl 6531c │ │ + bl 65404 │ │ ldrd r0, sl, [sp, #36] @ 0x24 │ │ movs r1, #17 │ │ ldrb.w fp, [sp, #44] @ 0x2c │ │ movt r1, #32768 @ 0x8000 │ │ cmp r0, r1 │ │ - bne.n 69af8 │ │ - ldr r1, [pc, #160] @ (69b4c ) │ │ + bne.n 69be0 │ │ + ldr r1, [pc, #160] @ (69c34 ) │ │ add r0, sp, #24 │ │ add r2, sp, #36 @ 0x24 │ │ strd r4, r6, [sp, #44] @ 0x2c │ │ add r1, pc │ │ strd r7, r6, [sp, #36] @ 0x24 │ │ - bl 3e0ec │ │ + bl 3e3f4 │ │ ldr r3, [sp, #32] │ │ add r0, sp, #36 @ 0x24 │ │ ldrd r4, r7, [sp, #24] │ │ mov r1, r8 │ │ mov r2, r7 │ │ strd r9, r9, [sp] │ │ str.w r9, [sp, #8] │ │ - bl 6531c │ │ + bl 65404 │ │ ldrd r1, r0, [sp, #36] @ 0x24 │ │ movs r3, #17 │ │ ldrb.w r2, [sp, #44] @ 0x2c │ │ movt r3, #32768 @ 0x8000 │ │ cmp r1, r3 │ │ - bne.n 69b12 │ │ + bne.n 69bfa │ │ str r0, [r5, #12] │ │ movs r0, #0 │ │ strb r2, [r5, #16] │ │ strb.w fp, [r5, #8] │ │ strd r0, sl, [r5] │ │ - b.n 69b28 │ │ + b.n 69c10 │ │ ldr r2, [sp, #48] @ 0x30 │ │ ldr.w r1, [sp, #45] @ 0x2d │ │ str r2, [r5, #16] │ │ str.w r1, [r5, #13] │ │ strb.w fp, [r5, #12] │ │ strd r9, r0, [r5] │ │ str.w sl, [r5, #8] │ │ - b.n 69b32 │ │ + b.n 69c1a │ │ ldr r6, [sp, #48] @ 0x30 │ │ strb r2, [r5, #12] │ │ movs r2, #1 │ │ ldr.w r3, [sp, #45] @ 0x2d │ │ str r6, [r5, #16] │ │ str.w r3, [r5, #13] │ │ strd r2, r1, [r5] │ │ str r0, [r5, #8] │ │ cmp r4, #0 │ │ itt ne │ │ movne r0, r7 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #20] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #16] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - cmp r2, r3 │ │ + cmp r6, r4 │ │ @ instruction: 0xfffaffdf │ │ - vabdl.u q15, d15, d1 │ │ + vqshlu.s32 d30, d9, #31 │ │ vtbl.8 d30, {d9-d10}, d29 │ │ - ldr r7, [pc, #960] @ (69f14 ) │ │ + ldr r7, [pc, #960] @ (69ffc ) │ │ sub sp, #28 │ │ ldr.w fp, [sp, #64] @ 0x40 │ │ movw r9, #31225 @ 0x79f9 │ │ str r0, [sp, #20] │ │ mov sl, r3 │ │ ldr r0, [sp, #68] @ 0x44 │ │ movt r9, #40503 @ 0x9e37 │ │ str r3, [sp, #24] │ │ cmp r0, #0 │ │ - beq.n 69bfc │ │ + beq.n 69ce4 │ │ cmp r2, #17 │ │ - bcs.w 69c8e │ │ + bcs.w 69d76 │ │ cmp r2, #8 │ │ - bls.w 6a31c │ │ + bls.w 6a404 │ │ ldr r7, [r1, #0] │ │ movw r3, #21050 @ 0x523a │ │ ldr.w lr, [r1, #4] │ │ add r1, r2 │ │ movw r4, #14777 @ 0x39b9 │ │ movt r3, #2454 @ 0x996 │ │ movt r4, #59970 @ 0xea42 │ │ @@ -98666,19 +98631,19 @@ │ │ adc.w r7, r7, #0 │ │ adds r2, r2, r3 │ │ adcs r0, r7 │ │ eor.w r1, r1, r8 │ │ eors r5, r4 │ │ adds r1, r1, r2 │ │ adcs r0, r5 │ │ - b.n 69c7e │ │ + b.n 69d66 │ │ cmp r2, #17 │ │ - bcs.w 6a062 │ │ + bcs.w 6a14a │ │ cmp r2, #8 │ │ - bls.w 6a346 │ │ + bls.w 6a42e │ │ movw r7, #14777 @ 0x39b9 │ │ ldr r0, [r1, #0] │ │ ldr.w sl, [r1, #4] │ │ add r1, r2 │ │ movt r7, #59970 @ 0xea42 │ │ eors r0, r7 │ │ movw r7, #21050 @ 0x523a │ │ @@ -98711,30 +98676,30 @@ │ │ eor.w r5, r5, ip │ │ eors r6, r4 │ │ adds r1, r2, r5 │ │ adcs r0, r6 │ │ eor.w r1, r1, r0, lsr #5 │ │ movw r7, #26513 @ 0x6791 │ │ movt r7, #5718 @ 0x1656 │ │ - b.w 6a56a │ │ + b.w 6a652 │ │ cmp r2, #129 @ 0x81 │ │ - bcs.w 6a3d2 │ │ + bcs.w 6a4ba │ │ movw r0, #51847 @ 0xca87 │ │ movw r3, #31153 @ 0x79b1 │ │ movt r0, #34283 @ 0x85eb │ │ movt r3, #40503 @ 0x9e37 │ │ umull r7, r0, r2, r0 │ │ cmp r2, #33 @ 0x21 │ │ mla r0, r2, r3, r0 │ │ strd r0, r7, [sp, #12] │ │ - bcc.w 69f8c │ │ + bcc.w 6a074 │ │ cmp r2, #64 @ 0x40 │ │ - bls.w 69e98 │ │ + bls.w 69f80 │ │ cmp r2, #96 @ 0x60 │ │ - bls.n 69dac │ │ + bls.n 69e94 │ │ adds r7, r1, r2 │ │ movw r3, #40904 @ 0x9fc8 │ │ movw r5, #20874 @ 0x518a │ │ movt r3, #51582 @ 0xc97e │ │ movt r5, #19424 @ 0x4be0 │ │ ldr.w r6, [r7, #-64] │ │ ldr.w r4, [r7, #-56] │ │ @@ -99002,31 +98967,31 @@ │ │ ldr r2, [sp, #12] │ │ adcs r0, r2 │ │ eor.w r2, r3, r8 │ │ eor.w r3, r6, lr │ │ adds r1, r1, r3 │ │ adcs r0, r2 │ │ eor.w r1, r1, r0, lsr #5 │ │ - b.n 6a4c8 │ │ + b.n 6a5b0 │ │ cmp r2, #129 @ 0x81 │ │ - bcs.w 6a3e6 │ │ + bcs.w 6a4ce │ │ movw r0, #51847 @ 0xca87 │ │ movw r3, #31153 @ 0x79b1 │ │ movt r0, #34283 @ 0x85eb │ │ movt r3, #40503 @ 0x9e37 │ │ umull r9, r0, r2, r0 │ │ cmp r2, #33 @ 0x21 │ │ mla r0, r2, r3, r0 │ │ str r0, [sp, #16] │ │ - bcc.w 6a400 │ │ + bcc.w 6a4e8 │ │ cmp r2, #64 @ 0x40 │ │ - bls.w 6a23c │ │ + bls.w 6a324 │ │ cmp r2, #96 @ 0x60 │ │ str.w r9, [sp, #12] │ │ - bls.n 6a16a │ │ + bls.n 6a252 │ │ adds r0, r1, r2 │ │ mov.w ip, #0 │ │ ldr.w r9, [r1, #52] @ 0x34 │ │ ldr.w r3, [r0, #-64] │ │ ldr.w r7, [r0, #-60] │ │ ldr.w r6, [r0, #-56] │ │ ldr.w r5, [r0, #-52] │ │ @@ -99213,31 +99178,31 @@ │ │ eors r0, r6 │ │ ldr r6, [sp, #12] │ │ eors r6, r5 │ │ adds r7, r7, r6 │ │ str r7, [sp, #12] │ │ adcs r0, r3 │ │ str r0, [sp, #16] │ │ - b.n 6a404 │ │ + b.n 6a4ec │ │ cmp r2, #3 │ │ - bls.w 6a4ea │ │ + bls.w 6a5d2 │ │ adds r0, r1, r2 │ │ movw r7, #54690 @ 0xd5a2 │ │ movw r3, #45428 @ 0xb174 │ │ movt r7, #50668 @ 0xc5ec │ │ movt r3, #51002 @ 0xc73a │ │ subs r7, #1 │ │ ldr.w r0, [r0, #-4] │ │ sbc.w r3, r3, #16777216 @ 0x1000000 │ │ ldr r1, [r1, #0] │ │ eors r0, r7 │ │ eors r1, r3 │ │ - b.n 6a368 │ │ + b.n 6a450 │ │ cmp r2, #3 │ │ - bls.w 6a514 │ │ + bls.w 6a5fc │ │ adds r0, r1, r2 │ │ movw r3, #45428 @ 0xb174 │ │ ldr r1, [r1, #0] │ │ movt r3, #51002 @ 0xc73a │ │ ldr.w r0, [r0, #-4] │ │ eors r1, r3 │ │ movw r3, #54690 @ 0xd5a2 │ │ @@ -99270,35 +99235,35 @@ │ │ adc.w r3, r6, #0 │ │ eors r0, r3 │ │ mla r0, r0, r7, r1 │ │ lsrs r1, r2, #28 │ │ orr.w r1, r1, r0, lsl #4 │ │ eor.w r8, r0, r0, lsr #28 │ │ eor.w r9, r1, r2 │ │ - b.n 6a594 │ │ + b.n 6a67c │ │ cmp r2, #241 @ 0xf1 │ │ - bcs.w 6a57c │ │ - ldr r0, [pc, #596] @ (6a630 ) │ │ + bcs.w 6a664 │ │ + ldr r0, [pc, #596] @ (6a718 ) │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, r1 │ │ mov r1, r2 │ │ movs r2, #1 │ │ - b.n 6a3f8 │ │ + b.n 6a4e0 │ │ cmp r2, #241 @ 0xf1 │ │ - bcs.w 6a584 │ │ - ldr r0, [pc, #580] @ (6a634 ) │ │ + bcs.w 6a66c │ │ + ldr r0, [pc, #580] @ (6a71c ) │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, r1 │ │ mov r1, r2 │ │ movs r2, #0 │ │ movs r3, #0 │ │ - bl 996ec │ │ - b.n 6a590 │ │ + bl 996f8 │ │ + b.n 6a678 │ │ str.w r9, [sp, #12] │ │ adds r0, r1, r2 │ │ movw r6, #54494 @ 0xd4de │ │ movt r6, #59757 @ 0xe96d │ │ movw r5, #46007 @ 0xb3b7 │ │ ldr.w r2, [r0, #-16] │ │ movt r5, #8039 @ 0x1f67 │ │ @@ -99361,32 +99326,32 @@ │ │ movw r6, #26513 @ 0x6791 │ │ movt r7, #40503 @ 0x9e37 │ │ movt r6, #5718 @ 0x1656 │ │ umull r2, r3, r1, r7 │ │ mla r1, r1, r6, r3 │ │ mla r8, r0, r7, r1 │ │ eor.w r9, r8, r2 │ │ - b.n 6a594 │ │ + b.n 6a67c │ │ cmp r2, #0 │ │ - beq.w 6ac9a │ │ + beq.w 6ad82 │ │ lsrs r0, r2, #1 │ │ ldrb r3, [r1, #0] │ │ ldrb r0, [r1, r0] │ │ add r1, r2 │ │ ldrb.w r1, [r1, #-1] │ │ lsls r0, r0, #24 │ │ orr.w r0, r0, r3, lsl #16 │ │ add r0, r1 │ │ movw r1, #23195 @ 0x5a9b │ │ movt r1, #34599 @ 0x8727 │ │ orr.w r0, r0, r2, lsl #8 │ │ adds r1, #1 │ │ - b.n 6a53a │ │ + b.n 6a622 │ │ cmp r2, #0 │ │ - beq.w 6acac │ │ + beq.w 6ad94 │ │ lsrs r0, r2, #1 │ │ ldrb r3, [r1, #0] │ │ ldrb r0, [r1, r0] │ │ add r1, r2 │ │ ldrb.w r1, [r1, #-1] │ │ lsls r0, r0, #24 │ │ orr.w r0, r0, r3, lsl #16 │ │ @@ -99408,30 +99373,30 @@ │ │ orr.w r2, r2, r0, lsl #3 │ │ eor.w r0, r0, r0, lsr #29 │ │ eors r1, r2 │ │ umull r2, r3, r1, r9 │ │ mla r1, r1, r7, r3 │ │ mla r8, r0, r9, r1 │ │ eor.w r9, r8, r2 │ │ - b.n 6a594 │ │ + b.n 6a67c │ │ mov r0, r1 │ │ mov r1, r2 │ │ movs r2, #1 │ │ - b.n 6a58a │ │ + b.n 6a672 │ │ mov r0, r1 │ │ mov r1, r2 │ │ movs r2, #0 │ │ movs r3, #0 │ │ - bl 99110 │ │ + bl 9911c │ │ mov r9, r0 │ │ mov r8, r1 │ │ cmp.w fp, #17 │ │ - bcs.n 6a638 │ │ + bcs.n 6a720 │ │ cmp.w fp, #8 │ │ - bls.w 6a86e │ │ + bls.w 6a956 │ │ movw r1, #21050 @ 0x523a │ │ add.w r7, sl, fp │ │ movw r0, #48187 @ 0xbc3b │ │ movt r1, #2454 @ 0x996 │ │ ldr.w r6, [r7, #-8] │ │ subs.w r1, r1, r9 │ │ movt r0, #44886 @ 0xaf56 │ │ @@ -99465,34 +99430,34 @@ │ │ adds r1, r1, r3 │ │ adcs r0, r2 │ │ eor.w r6, r4, lr │ │ eors r7, r5 │ │ adds r1, r1, r6 │ │ adcs r0, r7 │ │ eor.w r1, r1, r0, lsr #5 │ │ - b.n 6abca │ │ + b.n 6acb2 │ │ nop │ │ - adds r3, #162 @ 0xa2 │ │ - vcvtm.u32.f32 d19, d14 │ │ + adds r2, #186 @ 0xba │ │ + vcvtp.u32.f32 d19, d22 │ │ vsra.u64 d31, d27, #5 │ │ lsrs r1, r0, #30 │ │ - bcs.w 6a90a │ │ + bcs.w 6a9f2 │ │ movw r0, #51847 @ 0xca87 │ │ movw r1, #31153 @ 0x79b1 │ │ movt r0, #34283 @ 0x85eb │ │ movt r1, #40503 @ 0x9e37 │ │ umull lr, r0, fp, r0 │ │ cmp.w fp, #33 @ 0x21 │ │ mla r0, fp, r1, r0 │ │ - bcc.w 6a924 │ │ + bcc.w 6aa0c │ │ cmp.w fp, #64 @ 0x40 │ │ - bls.w 6a9c2 │ │ + bls.w 6aaaa │ │ cmp.w fp, #96 @ 0x60 │ │ str r0, [sp, #12] │ │ - bls.w 6a774 │ │ + bls.w 6a85c │ │ add.w r2, sl, fp │ │ movw r1, #40904 @ 0x9fc8 │ │ movw r0, #30937 @ 0x78d9 │ │ movt r1, #51582 @ 0xc97e │ │ movt r0, #25715 @ 0x6473 │ │ subs.w r1, r1, r9 │ │ ldr.w r3, [r2, #-64] │ │ @@ -99634,17 +99599,17 @@ │ │ adds.w r0, r0, lr │ │ adcs r1, r2 │ │ eor.w r2, ip, sl │ │ adds r0, r0, r3 │ │ ldr.w sl, [sp, #24] │ │ str r0, [sp, #16] │ │ adc.w fp, r1, r2 │ │ - b.n 6a9c8 │ │ + b.n 6aab0 │ │ cmp.w fp, #3 │ │ - bls.n 6a92a │ │ + bls.n 6aa12 │ │ movw r1, #54690 @ 0xd5a2 │ │ add.w r6, sl, fp │ │ movw r0, #45428 @ 0xb174 │ │ movt r1, #50668 @ 0xc5ec │ │ rev.w r7, r9 │ │ movt r0, #51002 @ 0xc73a │ │ ldr.w r3, [sl] │ │ @@ -99682,34 +99647,34 @@ │ │ eors r0, r7 │ │ mla r0, r0, r3, r1 │ │ lsrs r1, r2, #28 │ │ eor.w r7, r0, r0, lsr #28 │ │ orr.w r1, r1, r0, lsl #4 │ │ eors r1, r2 │ │ str r1, [sp, #16] │ │ - b.n 6abec │ │ + b.n 6acd4 │ │ cmp.w fp, #241 @ 0xf1 │ │ - bcs.n 6a9b0 │ │ - ldr r0, [pc, #948] @ (6acc8 ) │ │ + bcs.n 6aa98 │ │ + ldr r0, [pc, #948] @ (6adb0 ) │ │ mov r1, fp │ │ mov r2, r9 │ │ mov r3, r8 │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, sl │ │ - bl 996ec │ │ - b.n 6a9bc │ │ + bl 996f8 │ │ + b.n 6aaa4 │ │ str.w lr, [sp, #16] │ │ - b.n 6aad0 │ │ + b.n 6abb8 │ │ movw r1, #44605 @ 0xae3d │ │ movw r0, #60239 @ 0xeb4f │ │ movt r1, #49842 @ 0xc2b2 │ │ movt r0, #10196 @ 0x27d4 │ │ cmp.w fp, #0 │ │ - beq.w 6ac40 │ │ + beq.w 6ad28 │ │ mov.w r3, fp, lsr #1 │ │ ldrb.w r7, [sl] │ │ ldrb.w r3, [sl, r3] │ │ add.w r6, sl, fp │ │ ldrb.w r6, [r6, #-1] │ │ lsls r3, r3, #24 │ │ orr.w r3, r3, r7, lsl #16 │ │ @@ -99732,23 +99697,23 @@ │ │ adds r7, #32 │ │ orr.w r1, r1, r0, lsl #3 │ │ eor.w r0, r0, r0, lsr #29 │ │ eors r1, r3 │ │ umull r2, r3, r1, r6 │ │ mla r1, r1, r7, r3 │ │ mla r7, r0, r6, r1 │ │ - b.n 6abe6 │ │ + b.n 6acce │ │ mov r0, sl │ │ mov r1, fp │ │ mov r2, r9 │ │ mov r3, r8 │ │ - bl 99110 │ │ + bl 9911c │ │ str r0, [sp, #16] │ │ mov r7, r1 │ │ - b.n 6abec │ │ + b.n 6acd4 │ │ mov fp, r0 │ │ str.w lr, [sp, #16] │ │ ldr r2, [sp, #64] @ 0x40 │ │ movw r1, #13792 @ 0x35e0 │ │ movw r0, #14977 @ 0x3a81 │ │ movt r1, #59024 @ 0xe690 │ │ add.w r3, sl, r2 │ │ @@ -99903,25 +99868,25 @@ │ │ movt r6, #5718 @ 0x1656 │ │ umull r2, r3, r1, r7 │ │ mla r1, r1, r6, r3 │ │ mla r7, r0, r7, r1 │ │ eor.w r0, r7, r2 │ │ str r0, [sp, #16] │ │ mov r0, fp │ │ - blx d87f0 │ │ + blx d8810 │ │ mov r6, r0 │ │ cmp r0, #0 │ │ - beq.n 6acbe │ │ + beq.n 6ada6 │ │ ldr r1, [sp, #24] │ │ mov r0, r6 │ │ mov r2, fp │ │ ldrd r5, r4, [sp, #96] @ 0x60 │ │ ldrd sl, r9, [sp, #88] @ 0x58 │ │ ldr.w r8, [sp, #80] @ 0x50 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldrd r1, r0, [sp, #16] │ │ add.w r2, r0, #32 │ │ strd r6, fp, [r0, #44] @ 0x2c │ │ stmia.w r2, {r1, r7, fp} │ │ ldr r1, [sp, #84] @ 0x54 │ │ strb r1, [r0, #12] │ │ ldr r1, [sp, #76] @ 0x4c │ │ @@ -99956,237 +99921,237 @@ │ │ umull r2, r3, r1, r6 │ │ adds r7, #32 │ │ mla r1, r1, r7, r3 │ │ mla r7, r0, r6, r1 │ │ movs r6, #1 │ │ eor.w r0, r7, r2 │ │ str r0, [sp, #16] │ │ - b.n 6abf8 │ │ + b.n 6ace0 │ │ movw r8, #45260 @ 0xb0cc │ │ movw r9, #26371 @ 0x6703 │ │ movt r8, #19909 @ 0x4dc5 │ │ movt r9, #33391 @ 0x826f │ │ - b.n 6a594 │ │ + b.n 6a67c │ │ movw r8, #32773 @ 0x8005 │ │ movw r9, #38082 @ 0x94c2 │ │ movt r8, #11526 @ 0x2d06 │ │ movt r9, #14547 @ 0x38d3 │ │ - b.n 6a594 │ │ + b.n 6a67c │ │ movs r0, #1 │ │ mov r1, fp │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - cmp r6, #100 @ 0x64 │ │ + cmp r5, #124 @ 0x7c │ │ vtbl.8 d30, {d11-d12}, d29 │ │ - ldr r7, [pc, #960] @ (6b090 ) │ │ + ldr r7, [pc, #960] @ (6b178 ) │ │ sub sp, #100 @ 0x64 │ │ mov.w r8, r3, lsl #2 │ │ strd r0, r1, [sp, #12] │ │ mov r0, r8 │ │ mov fp, r3 │ │ mov r9, r2 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 6aeb6 │ │ + beq.w 6af9e │ │ mov sl, r0 │ │ mov.w r8, #0 │ │ ldr r1, [sp, #16] │ │ add.w r3, r9, r8, lsl #3 │ │ ldr.w r0, [r9, r8, lsl #3] │ │ ldrd r1, r2, [r1, #92] @ 0x5c │ │ add.w r2, r2, r2, lsl #1 │ │ ldr r3, [r3, #4] │ │ add.w r4, r1, #8 │ │ lsls r5, r2, #4 │ │ cmp r5, #0 │ │ - beq.w 6ae88 │ │ + beq.w 6af70 │ │ mov r7, r4 │ │ ldrd r4, r6, [r4] │ │ eors r6, r3 │ │ subs r5, #48 @ 0x30 │ │ eors r4, r0 │ │ orrs r6, r4 │ │ add.w r4, r7, #48 @ 0x30 │ │ - bne.n 6ad0a │ │ + bne.n 6adf2 │ │ movs r5, #17 │ │ sub.w r4, r7, #8 │ │ movt r5, #32768 @ 0x8000 │ │ subs r0, r5, #6 │ │ str r0, [sp, #72] @ 0x48 │ │ add r0, sp, #72 @ 0x48 │ │ - bl 31e14 │ │ + bl 31ee0 │ │ str.w r4, [sl, r8, lsl #2] │ │ add.w r8, r8, #1 │ │ cmp r8, fp │ │ - bne.n 6acf0 │ │ + bne.n 6add8 │ │ ldr r0, [sp, #16] │ │ ldr r4, [sp, #136] @ 0x88 │ │ str.w fp, [sp, #28] │ │ ldr r2, [r0, #32] │ │ add r0, sp, #72 @ 0x48 │ │ mov r1, r4 │ │ strd fp, sl, [sp, #20] │ │ - bl 49d00 │ │ + bl 4a008 │ │ add r7, sp, #72 @ 0x48 │ │ add.w ip, sp, #56 @ 0x38 │ │ ldmia r7, {r0, r1, r2, r3, r7} │ │ cmp r0, #2 │ │ stmia.w ip, {r1, r2, r3, r7} │ │ - bne.n 6ad74 │ │ + bne.n 6ae5c │ │ add r3, sp, #56 @ 0x38 │ │ ldr r7, [sp, #12] │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia r7!, {r0, r1, r2, r3} │ │ - b.n 6ae6a │ │ + b.n 6af52 │ │ add r7, sp, #56 @ 0x38 │ │ ldr r6, [sp, #92] @ 0x5c │ │ add.w ip, sp, #32 │ │ str r6, [sp, #52] @ 0x34 │ │ ldmia r7, {r1, r2, r3, r7} │ │ stmia.w ip, {r0, r1, r2, r3, r7} │ │ lsls r0, r0, #31 │ │ - beq.w 6aeae │ │ + beq.w 6af96 │ │ ldr r0, [sp, #16] │ │ movs r2, #0 │ │ ldr r1, [sp, #36] @ 0x24 │ │ movs r3, #0 │ │ strd r4, r0, [sp, #60] @ 0x3c │ │ add r0, sp, #20 │ │ str r0, [sp, #56] @ 0x38 │ │ movs r0, #0 │ │ str r0, [sp, #4] │ │ add r0, sp, #72 @ 0x48 │ │ - bl 49e28 │ │ + bl 4a130 │ │ ldrd r0, r2, [sp, #80] @ 0x50 │ │ ldr r1, [sp, #88] @ 0x58 │ │ ldrd r7, r3, [sp, #72] @ 0x48 │ │ - cbz r7, 6adb8 │ │ + cbz r7, 6aea0 │ │ cmp r3, r5 │ │ - beq.n 6ae30 │ │ + beq.n 6af18 │ │ lsrs r7, r0, #8 │ │ - b.n 6ae46 │ │ - cbz r3, 6ae2a │ │ + b.n 6af2e │ │ + cbz r3, 6af12 │ │ add r7, sp, #32 │ │ strd r0, r2, [sp] │ │ adds r5, r7, #4 │ │ str r1, [sp, #8] │ │ add r0, sp, #72 @ 0x48 │ │ add r1, sp, #56 @ 0x38 │ │ mov r2, r5 │ │ - bl 6b91c │ │ + bl 6ba04 │ │ ldrb.w r0, [sp, #76] @ 0x4c │ │ movs r1, #17 │ │ ldr r3, [sp, #72] @ 0x48 │ │ movt r1, #32768 @ 0x8000 │ │ cmp r3, r1 │ │ - bne.n 6ae36 │ │ + bne.n 6af1e │ │ lsls r0, r0, #31 │ │ - beq.n 6ae2a │ │ + beq.n 6af12 │ │ add r4, sp, #72 @ 0x48 │ │ add.w r8, sp, #56 @ 0x38 │ │ movs r7, #0 │ │ ldr r1, [sp, #36] @ 0x24 │ │ mov r0, r4 │ │ movs r2, #8 │ │ movs r3, #0 │ │ str r7, [sp, #4] │ │ - bl 49e28 │ │ + bl 4a130 │ │ ldrd r0, r2, [sp, #80] @ 0x50 │ │ ldr r1, [sp, #88] @ 0x58 │ │ ldrd r6, r3, [sp, #72] @ 0x48 │ │ - cbnz r6, 6ae7c │ │ - cbz r3, 6ae2a │ │ + cbnz r6, 6af64 │ │ + cbz r3, 6af12 │ │ strd r0, r2, [sp] │ │ mov r0, r4 │ │ str r1, [sp, #8] │ │ mov r1, r8 │ │ mov r2, r5 │ │ - bl 6b91c │ │ + bl 6ba04 │ │ ldrb.w r0, [sp, #76] @ 0x4c │ │ movs r1, #17 │ │ ldr r3, [sp, #72] @ 0x48 │ │ movt r1, #32768 @ 0x8000 │ │ cmp r3, r1 │ │ - bne.n 6ae36 │ │ + bne.n 6af1e │ │ lsls r0, r0, #31 │ │ - bne.n 6adea │ │ + bne.n 6aed2 │ │ movs r5, #17 │ │ movt r5, #32768 @ 0x8000 │ │ ldr r0, [sp, #12] │ │ str r5, [r0, #0] │ │ - b.n 6ae58 │ │ + b.n 6af40 │ │ ldrb.w r7, [sp, #79] @ 0x4f │ │ ldrh.w r6, [sp, #77] @ 0x4d │ │ ldr r1, [sp, #84] @ 0x54 │ │ ldr r2, [sp, #80] @ 0x50 │ │ orr.w r7, r6, r7, lsl #16 │ │ ldr r6, [sp, #12] │ │ strb r0, [r6, #4] │ │ lsrs r0, r7, #16 │ │ strh.w r7, [r6, #5] │ │ strd r2, r1, [r6, #8] │ │ str r3, [r6, #0] │ │ strb r0, [r6, #7] │ │ add r0, sp, #32 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #32] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #36] @ 0x24 │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ ldr r0, [sp, #20] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #24] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r5, #17 │ │ movt r5, #32768 @ 0x8000 │ │ cmp r3, r5 │ │ - bne.n 6adb4 │ │ - b.n 6ae30 │ │ - ldr r4, [pc, #52] @ (6aec0 ) │ │ + bne.n 6ae9c │ │ + b.n 6af18 │ │ + ldr r4, [pc, #52] @ (6afa8 ) │ │ movs r7, #17 │ │ - ldr r0, [pc, #52] @ (6aec4 ) │ │ + ldr r0, [pc, #52] @ (6afac ) │ │ add.w r1, r1, r2, lsl #4 │ │ - ldr r3, [pc, #52] @ (6aec8 ) │ │ + ldr r3, [pc, #52] @ (6afb0 ) │ │ add r2, sp, #72 @ 0x48 │ │ add r0, pc │ │ movt r7, #32768 @ 0x8000 │ │ add r3, pc │ │ str r1, [sp, #76] @ 0x4c │ │ movs r1, #43 @ 0x2b │ │ add r4, pc │ │ subs r7, #6 │ │ str r7, [sp, #72] @ 0x48 │ │ str r4, [sp, #0] │ │ - bl 414b0 │ │ - ldr r0, [pc, #28] @ (6aecc ) │ │ + bl 417b8 │ │ + ldr r0, [pc, #28] @ (6afb4 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ movs r0, #4 │ │ mov r1, r8 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ nop │ │ - stc2l 0, cr0, [sl, #24]! │ │ - b.n 6aaa2 │ │ - vtbx.8 d31, {d26-d28}, d16 │ │ + ldc2 0, cr0, [r2, #-24] @ 0xffffffe8 │ │ + b.n 6a9ba │ │ + @ instruction: 0xfffaf9b8 │ │ movs r6, r0 │ │ - ldc2 0, cr0, [ip], {6} │ │ + smlal r0, r0, r4, r6 │ │ push {r4, lr} │ │ sub sp, #8 │ │ mov r4, r0 │ │ movs r0, #0 │ │ str r0, [sp, #4] │ │ add r0, sp, #4 │ │ movs r1, #32 │ │ movs r2, #160 @ 0xa0 │ │ - blx d8880 │ │ - cbnz r0, 6af2c │ │ + blx d8890 │ │ + cbnz r0, 6b014 │ │ ldr r0, [sp, #4] │ │ cmp r0, #0 │ │ itttt ne │ │ movne r1, #0 │ │ strbne.w r1, [r0, #136] @ 0x88 │ │ movne r2, #1 │ │ strdne r2, r2, [r0, #128] @ 0x80 │ │ @@ -100205,29 +100170,29 @@ │ │ strdne r2, r0, [r4] │ │ strdne r2, r0, [r4, #8] │ │ addne sp, #8 │ │ it ne │ │ popne {r4, pc} │ │ movs r0, #32 │ │ movs r1, #160 @ 0xa0 │ │ - bl 3de2a │ │ + bl 3e132 │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ - bgt.n 6af44 │ │ + bgt.n 6b02c │ │ movs r1, #0 │ │ str r1, [r0, #4] │ │ movs r1, #1 │ │ str r1, [r0, #0] │ │ bx lr │ │ - cbz r1, 6af66 │ │ + cbz r1, 6b04e │ │ push {r4, r5, r7, lr} │ │ mov r4, r0 │ │ mov r0, r1 │ │ mov r5, r1 │ │ - blx d87f0 │ │ - cbz r0, 6af72 │ │ + blx d8810 │ │ + cbz r0, 6b05a │ │ mov r1, r0 │ │ mov r0, r4 │ │ strd r5, r1, [r0, #4] │ │ movs r1, #0 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ str r1, [r0, #0] │ │ bx lr │ │ @@ -100244,29 +100209,29 @@ │ │ bx lr │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #100 @ 0x64 │ │ mov sl, r0 │ │ movs r0, #0 │ │ mov r8, r2 │ │ mov r4, r1 │ │ - blx 9c0d4 │ │ + blx 9c0e0 │ │ ldr r3, [r4, #0] │ │ add r5, sp, #80 @ 0x50 │ │ mov r1, r0 │ │ mov r2, r8 │ │ mov r0, r5 │ │ - bl 49f18 │ │ + bl 4a220 │ │ ldrd r0, r3, [sp, #80] @ 0x50 │ │ movs r6, #17 │ │ movt r6, #32768 @ 0x8000 │ │ cmp r0, r6 │ │ - bne.w 6b1c2 │ │ + bne.w 6b2aa │ │ ldr r0, [r4, #24] │ │ cmp r0, #0 │ │ - beq.w 6b1b2 │ │ + beq.w 6b29a │ │ movs r1, #52 @ 0x34 │ │ ldr.w r9, [r4, #20] │ │ mla fp, r0, r1, r9 │ │ add.w r0, r5, #8 │ │ str r0, [sp, #28] │ │ adds r0, r5, #4 │ │ str r0, [sp, #20] │ │ @@ -100283,51 +100248,51 @@ │ │ movs r0, #1 │ │ str r3, [sp, #36] @ 0x24 │ │ ldrd r2, r3, [r9, #4] │ │ mov r1, r8 │ │ strd r0, r4, [sp] │ │ mov r0, r5 │ │ str r4, [sp, #8] │ │ - bl 6531c │ │ + bl 65404 │ │ ldrd r1, r2, [sp, #80] @ 0x50 │ │ cmp r1, r6 │ │ - bne.w 6b220 │ │ + bne.w 6b308 │ │ mov r1, r2 │ │ mov r0, r5 │ │ mov r2, r8 │ │ - bl 6b7e4 │ │ + bl 6b8cc │ │ ldr r1, [sp, #80] @ 0x50 │ │ cmp r1, r6 │ │ - bne.w 6b1d4 │ │ + bne.w 6b2bc │ │ ldr.w r0, [r9, #32] │ │ - cbz r0, 6b044 │ │ + cbz r0, 6b12c │ │ rsb r0, r0, r0, lsl #3 │ │ ldr.w r4, [r9, #28] │ │ lsls r7, r0, #2 │ │ mov r0, r5 │ │ mov r1, r8 │ │ mov r2, r9 │ │ mov r3, r4 │ │ - bl 6b88c │ │ + bl 6b974 │ │ ldr r1, [sp, #80] @ 0x50 │ │ cmp r1, r6 │ │ - bne.w 6b1d4 │ │ + bne.w 6b2bc │ │ adds r4, #28 │ │ subs r7, #28 │ │ - bne.n 6b02a │ │ + bne.n 6b112 │ │ ldr.w r0, [r9, #44] @ 0x2c │ │ str.w fp, [sp, #24] │ │ mov fp, r6 │ │ cmp r0, #0 │ │ str.w sl, [sp, #32] │ │ - beq.n 6b0f4 │ │ + beq.n 6b1dc │ │ add.w r0, r0, r0, lsl #1 │ │ ldr.w r4, [r9, #40] @ 0x28 │ │ mov.w sl, r0, lsl #3 │ │ - b.n 6b0a8 │ │ + b.n 6b190 │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldr r2, [sp, #40] @ 0x28 │ │ ldrb.w r7, [sp, #96] @ 0x60 │ │ ldrh.w lr, [r0] │ │ ldrb r3, [r0, #2] │ │ ldrb.w ip, [r2, #2] │ │ ldrh r0, [r2, #0] │ │ @@ -100340,141 +100305,141 @@ │ │ strb.w r7, [sp, #76] @ 0x4c │ │ strh.w lr, [r0] │ │ strb r3, [r0, #2] │ │ str r5, [sp, #72] @ 0x48 │ │ strb.w r6, [sp, #68] @ 0x44 │ │ str r1, [sp, #64] @ 0x40 │ │ cmp r1, fp │ │ - bne.w 6b1e6 │ │ + bne.w 6b2ce │ │ adds r4, #24 │ │ subs.w sl, sl, #24 │ │ - beq.n 6b0f4 │ │ + beq.n 6b1dc │ │ add r5, sp, #80 @ 0x50 │ │ mov r1, r8 │ │ mov r2, r9 │ │ mov r3, r4 │ │ mov r0, r5 │ │ - bl 69a54 │ │ + bl 69b3c │ │ ldrd r0, r1, [sp, #80] @ 0x50 │ │ cmp r0, #1 │ │ - beq.n 6b064 │ │ + beq.n 6b14c │ │ mov r0, r5 │ │ mov r2, r8 │ │ ldr r7, [sp, #92] @ 0x5c │ │ - bl 6b7e4 │ │ + bl 6b8cc │ │ ldr r0, [sp, #80] @ 0x50 │ │ cmp r0, fp │ │ - bne.n 6b0e0 │ │ + bne.n 6b1c8 │ │ add r0, sp, #64 @ 0x40 │ │ mov r1, r7 │ │ mov r2, r8 │ │ - bl 6b7e4 │ │ + bl 6b8cc │ │ ldr r1, [sp, #64] @ 0x40 │ │ cmp r1, fp │ │ - beq.n 6b0a0 │ │ - b.n 6b1e6 │ │ + beq.n 6b188 │ │ + b.n 6b2ce │ │ add r3, sp, #80 @ 0x50 │ │ add.w ip, sp, #64 @ 0x40 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r0, r1, r2, r3} │ │ ldr r1, [sp, #64] @ 0x40 │ │ cmp r1, fp │ │ - beq.n 6b0a0 │ │ - b.n 6b1e6 │ │ + beq.n 6b188 │ │ + b.n 6b2ce │ │ ldr.w r4, [r9, #8] │ │ cmp.w r4, #4294967295 @ 0xffffffff │ │ - ble.n 6b1e2 │ │ - cbz r4, 6b134 │ │ + ble.n 6b2ca │ │ + cbz r4, 6b21c │ │ mov r0, r4 │ │ ldr.w r7, [r9, #4] │ │ - blx d87f0 │ │ + blx d8810 │ │ ldrd sl, r5, [sp, #32] │ │ cmp r0, #0 │ │ - beq.w 6b244 │ │ + beq.w 6b32c │ │ mov r1, r7 │ │ mov r2, r4 │ │ mov r6, r0 │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #0 │ │ mov r1, r5 │ │ strd r4, r0, [sp] │ │ add r0, sp, #80 @ 0x50 │ │ movs r2, #16 │ │ mov r3, r6 │ │ str r6, [sp, #16] │ │ - bl 49e28 │ │ - b.n 6b14e │ │ + bl 4a130 │ │ + b.n 6b236 │ │ movs r0, #0 │ │ movs r2, #16 │ │ strd r0, r0, [sp] │ │ movs r0, #1 │ │ str r0, [sp, #16] │ │ add r0, sp, #80 @ 0x50 │ │ ldr r1, [sp, #36] @ 0x24 │ │ movs r3, #1 │ │ - bl 49e28 │ │ + bl 4a130 │ │ ldr.w sl, [sp, #32] │ │ ldrd r0, r7, [sp, #80] @ 0x50 │ │ mov r6, fp │ │ ldr.w fp, [sp, #24] │ │ add r5, sp, #80 @ 0x50 │ │ lsls r0, r0, #31 │ │ - beq.n 6b162 │ │ + beq.n 6b24a │ │ ldr r2, [sp, #28] │ │ - b.n 6b18a │ │ + b.n 6b272 │ │ ldr r3, [sp, #36] @ 0x24 │ │ - cbz r7, 6b176 │ │ + cbz r7, 6b25e │ │ mov r0, r5 │ │ mov r1, r3 │ │ - bl 4ba20 │ │ + bl 4bd28 │ │ ldr r7, [sp, #80] @ 0x50 │ │ cmp r7, r6 │ │ - bne.n 6b188 │ │ + bne.n 6b270 │ │ ldr r3, [sp, #36] @ 0x24 │ │ cmp r4, #0 │ │ mov.w r4, #0 │ │ - beq.n 6b1a6 │ │ + beq.n 6b28e │ │ ldr r0, [sp, #16] │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r3, [sp, #36] @ 0x24 │ │ - b.n 6b1a6 │ │ + b.n 6b28e │ │ ldr r2, [sp, #20] │ │ ldr r0, [r2, #0] │ │ add r3, sp, #64 @ 0x40 │ │ ldr r1, [r2, #4] │ │ ldr r2, [r2, #8] │ │ stmia r3!, {r0, r1, r2} │ │ ldr r3, [sp, #36] @ 0x24 │ │ - cbz r4, 6b1a0 │ │ + cbz r4, 6b288 │ │ ldr r0, [sp, #16] │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r3, [sp, #36] @ 0x24 │ │ movs r4, #0 │ │ cmp r7, r6 │ │ - bne.n 6b22c │ │ + bne.n 6b314 │ │ add.w r9, r9, #52 @ 0x34 │ │ movs r0, #1 │ │ cmp r9, fp │ │ - bne.w 6afec │ │ + bne.w 6b0d4 │ │ str.w r6, [sl] │ │ mov r0, r3 │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d873c │ │ + b.w d874c │ │ ldrd r1, r2, [sp, #88] @ 0x58 │ │ strd r0, r3, [sl] │ │ strd r1, r2, [sl, #8] │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr.w r3, [sp, #89] @ 0x59 │ │ ldr r7, [sp, #92] @ 0x5c │ │ ldrb.w r0, [sp, #88] @ 0x58 │ │ ldr r2, [sp, #84] @ 0x54 │ │ - b.n 6b1f6 │ │ - bl 3e03c │ │ + b.n 6b2de │ │ + bl 3e344 │ │ ldrb.w r0, [sp, #72] @ 0x48 │ │ ldr r2, [sp, #68] @ 0x44 │ │ ldr.w sl, [sp, #32] │ │ ldr.w r3, [sp, #73] @ 0x49 │ │ ldr r7, [sp, #76] @ 0x4c │ │ str r3, [sp, #56] @ 0x38 │ │ str.w r7, [sp, #59] @ 0x3b │ │ @@ -100484,114 +100449,114 @@ │ │ ldr r3, [sp, #36] @ 0x24 │ │ strb.w r0, [sl, #8] │ │ strd r1, r2, [sl] │ │ str.w r7, [sl, #12] │ │ mov r0, r3 │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d873c │ │ + b.w d874c │ │ ldr.w r3, [sp, #89] @ 0x59 │ │ ldr r7, [sp, #92] @ 0x5c │ │ ldrb.w r0, [sp, #88] @ 0x58 │ │ - b.n 6b1f6 │ │ + b.n 6b2de │ │ add r2, sp, #64 @ 0x40 │ │ ldmia r2, {r0, r1, r2} │ │ strd r1, r2, [sl, #8] │ │ strd r7, r0, [sl] │ │ mov r0, r3 │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d873c │ │ + b.w d874c │ │ movs r0, #1 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ sub sp, #32 │ │ mov r9, r1 │ │ mov sl, r0 │ │ movs r0, #0 │ │ movs r1, #4 │ │ strd r0, r1, [sp, #8] │ │ movw r1, #909 @ 0x38d │ │ mov r8, r2 │ │ mov r7, sp │ │ strd r0, r0, [sp] │ │ strd r0, r0, [sp, #16] │ │ strd r0, r1, [sp, #24] │ │ - b.n 6b278 │ │ + b.n 6b360 │ │ lsrs r0, r2, #2 │ │ - bne.n 6b2b6 │ │ + bne.n 6b39e │ │ mov r0, r7 │ │ - bl 51544 │ │ + bl 51754 │ │ ldr r0, [sp, #20] │ │ cmp r0, #0 │ │ - beq.n 6b278 │ │ + beq.n 6b360 │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r6, #1 │ │ movs r4, #0 │ │ - b.n 6b29e │ │ + b.n 6b386 │ │ umull r2, r5, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r5, r3, r4, r5 │ │ mla r4, r3, r4, r5 │ │ mov r3, r2 │ │ lsls r2, r0, #31 │ │ - beq.n 6b28e │ │ + beq.n 6b376 │ │ umull r2, r5, r3, r6 │ │ cmp r0, #1 │ │ - beq.n 6b274 │ │ + beq.n 6b35c │ │ mla r1, r3, r1, r5 │ │ mla r1, r4, r6, r1 │ │ mov r6, r2 │ │ - b.n 6b28e │ │ + b.n 6b376 │ │ strd r9, r8, [sl] │ │ add.w r0, sl, #8 │ │ ldmia r7!, {r1, r2, r3, r6} │ │ stmia r0!, {r1, r2, r3, r6} │ │ ldmia.w r7, {r1, r2, r3, r6} │ │ stmia r0!, {r1, r2, r3, r6} │ │ add sp, #32 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ - bmi.n 6b27a │ │ + bmi.n 6b362 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #4 │ │ vpush {d8} │ │ sub.w sp, sp, #728 @ 0x2d8 │ │ ldr r4, [r1, #100] @ 0x64 │ │ mov r9, r0 │ │ add r0, sp, #240 @ 0xf0 │ │ mov r5, r2 │ │ mov r8, r1 │ │ movs r2, #0 │ │ mov r1, r4 │ │ - bl 65258 │ │ + bl 65340 │ │ ldrd r0, r1, [sp, #240] @ 0xf0 │ │ movs r3, #17 │ │ ldrb.w r2, [sp, #248] @ 0xf8 │ │ movt r3, #32768 @ 0x8000 │ │ cmp r0, r3 │ │ - bne.n 6b310 │ │ + bne.n 6b3f8 │ │ ldrd r0, r3, [r8, #8] │ │ movs r7, #0 │ │ cmp r2, #2 │ │ - bne.n 6b344 │ │ + bne.n 6b42c │ │ mov r1, r3 │ │ - b.n 6b322 │ │ + b.n 6b40a │ │ ldrb.w r7, [sp, #251] @ 0xfb │ │ ldrh.w r6, [sp, #249] @ 0xf9 │ │ ldr r3, [sp, #252] @ 0xfc │ │ orr.w r7, r6, r7, lsl #16 │ │ orr.w r7, r2, r7, lsl #8 │ │ movs r2, #4 │ │ strd r1, r7, [r9, #8] │ │ strd r2, r0, [r9] │ │ str.w r3, [r9, #16] │ │ mov r0, r8 │ │ - bl 4674c │ │ + bl 46aa0 │ │ add.w sp, sp, #728 @ 0x2d8 │ │ vpop {d8} │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add.w ip, sp, #12 │ │ strb.w r7, [sp, #104] @ 0x68 │ │ stmia.w ip, {r4, r5, r8} │ │ @@ -100602,578 +100567,578 @@ │ │ mov.w r5, #2147483648 @ 0x80000000 │ │ str r7, [sp, #100] @ 0x64 │ │ strd r7, r7, [sp, #88] @ 0x58 │ │ str r5, [sp, #56] @ 0x38 │ │ stmia.w ip, {r0, r3, r7} │ │ strb.w r2, [sp, #28] │ │ str r1, [sp, #24] │ │ - cbz r6, 6b3ba │ │ + cbz r6, 6b4a2 │ │ add.w fp, sp, #240 @ 0xf0 │ │ add r5, sp, #24 │ │ add r0, sp, #24 │ │ mov.w sl, r6, lsl #7 │ │ mov.w r8, #1 │ │ movs r6, #0 │ │ adds r0, #24 │ │ str r0, [sp, #8] │ │ mov r0, fp │ │ mov r1, r4 │ │ mov r2, r5 │ │ movs r3, #1 │ │ str.w r8, [sp] │ │ - bl 5801c │ │ + bl 5822c │ │ ldr r1, [sp, #240] @ 0xf0 │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - bne.w 6b4ec │ │ + bne.w 6b5d4 │ │ ldrd r0, r1, [sp, #248] @ 0xf8 │ │ adds r4, #128 @ 0x80 │ │ adds r7, r7, r0 │ │ adcs r6, r1 │ │ subs.w sl, sl, #128 @ 0x80 │ │ - bne.n 6b38a │ │ - b.n 6b3bc │ │ + bne.n 6b472 │ │ + b.n 6b4a4 │ │ movs r6, #0 │ │ add.w sl, sp, #240 @ 0xf0 │ │ add r1, sp, #24 │ │ movs r2, #88 @ 0x58 │ │ mov r0, sl │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr r0, [sp, #240] @ 0xf0 │ │ cmp r0, #0 │ │ it ne │ │ - blxne 9bb60 │ │ + blxne 9bb6c │ │ ldr r0, [sp, #272] @ 0x110 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ itt ne │ │ addne.w r0, sl, #24 │ │ - blne 4b7a0 │ │ + blne 4baa8 │ │ ldr.w fp, [sp, #308] @ 0x134 │ │ cmp.w fp, #2147483648 @ 0x80000000 │ │ - beq.n 6b40e │ │ + beq.n 6b4f6 │ │ ldrd r8, r4, [sp, #312] @ 0x138 │ │ - cbz r4, 6b402 │ │ + cbz r4, 6b4ea │ │ mov r5, r8 │ │ ldr.w r0, [r5], #4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r4, #1 │ │ - bne.n 6b3f6 │ │ + bne.n 6b4de │ │ cmp.w fp, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r8, [sp, #20] │ │ ldrd r3, r0, [r8, #80] @ 0x50 │ │ ldrd r1, r2, [r8, #68] @ 0x44 │ │ str r0, [sp, #0] │ │ add r0, sp, #116 @ 0x74 │ │ - bl 61f10 │ │ + bl 61ff8 │ │ ldrd r1, fp, [sp, #120] @ 0x78 │ │ mov.w r0, fp, lsr #7 │ │ cmp r0, #2 │ │ - bhi.w 6b628 │ │ + bhi.w 6b710 │ │ mov r0, sl │ │ mov r2, fp │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #0 │ │ cmp.w fp, #7 │ │ strb.w r0, [sl, fp] │ │ - bcs.n 6b4b8 │ │ + bcs.n 6b5a0 │ │ ldrb.w r0, [sp, #240] @ 0xf0 │ │ cmp r0, #0 │ │ - beq.w 6b570 │ │ + beq.w 6b658 │ │ cmp.w fp, #0 │ │ - beq.w 6b5bc │ │ + beq.w 6b6a4 │ │ ldrb.w r0, [sp, #241] @ 0xf1 │ │ cmp r0, #0 │ │ - beq.w 6b578 │ │ + beq.w 6b660 │ │ cmp.w fp, #1 │ │ - beq.w 6b5bc │ │ + beq.w 6b6a4 │ │ ldrb.w r0, [sp, #242] @ 0xf2 │ │ cmp r0, #0 │ │ - beq.w 6b57c │ │ + beq.w 6b664 │ │ cmp.w fp, #2 │ │ - beq.w 6b5bc │ │ + beq.w 6b6a4 │ │ ldrb.w r0, [sp, #243] @ 0xf3 │ │ cmp r0, #0 │ │ - beq.n 6b580 │ │ + beq.n 6b668 │ │ cmp.w fp, #3 │ │ - beq.w 6b5bc │ │ + beq.w 6b6a4 │ │ ldrb.w r0, [sp, #244] @ 0xf4 │ │ cmp r0, #0 │ │ - beq.n 6b584 │ │ + beq.n 6b66c │ │ cmp.w fp, #4 │ │ - beq.w 6b5bc │ │ + beq.w 6b6a4 │ │ ldrb.w r0, [sp, #245] @ 0xf5 │ │ cmp r0, #0 │ │ - beq.n 6b588 │ │ + beq.n 6b670 │ │ cmp.w fp, #5 │ │ - beq.w 6b5bc │ │ + beq.w 6b6a4 │ │ ldrb.w r0, [sp, #246] @ 0xf6 │ │ cmp r0, #0 │ │ - bne.w 6b5bc │ │ + bne.w 6b6a4 │ │ movs r1, #6 │ │ - b.n 6b58a │ │ + b.n 6b672 │ │ cmp sl, sl │ │ - bne.n 6b542 │ │ + bne.n 6b62a │ │ sub.w r1, fp, #7 │ │ movw r2, #256 @ 0x100 │ │ movt r2, #257 @ 0x101 │ │ add.w r5, sl, r0 │ │ ldr.w r3, [sl, r0] │ │ ldr r5, [r5, #4] │ │ subs r4, r2, r5 │ │ orrs r5, r4 │ │ subs r4, r2, r3 │ │ orrs r3, r4 │ │ ands r3, r5 │ │ mvns r3, r3 │ │ tst.w r3, #2155905152 @ 0x80808080 │ │ - bne.n 6b556 │ │ + bne.n 6b63e │ │ adds r0, #8 │ │ cmp r0, r1 │ │ - bls.n 6b4c8 │ │ - b.n 6b556 │ │ + bls.n 6b5b0 │ │ + b.n 6b63e │ │ add r7, sp, #244 @ 0xf4 │ │ ldr r0, [sp, #24] │ │ movs r6, #4 │ │ ldmia r7, {r2, r3, r7} │ │ strd r6, r1, [r9] │ │ add.w r1, r9, #8 │ │ stmia r1!, {r2, r3, r7} │ │ - cbz r0, 6b508 │ │ - blx 9bb60 │ │ + cbz r0, 6b5f0 │ │ + blx 9bb6c │ │ movs r0, #0 │ │ str r0, [sp, #24] │ │ ldr r0, [sp, #56] @ 0x38 │ │ ldr.w r8, [sp, #20] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ itt ne │ │ ldrne r0, [sp, #8] │ │ - blne 4b7a0 │ │ + blne 4baa8 │ │ ldr r5, [sp, #92] @ 0x5c │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ - beq.w 6b330 │ │ + beq.w 6b418 │ │ ldrd r4, r6, [sp, #96] @ 0x60 │ │ - cbz r6, 6b538 │ │ + cbz r6, 6b620 │ │ mov r7, r4 │ │ ldr.w r0, [r7], #4 │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ subs r6, #1 │ │ - bne.n 6b52c │ │ + bne.n 6b614 │ │ cmp r5, #0 │ │ - beq.w 6b330 │ │ + beq.w 6b418 │ │ mov r0, r4 │ │ - b.n 6b612 │ │ + b.n 6b6fa │ │ movs r1, #0 │ │ ldrb.w r2, [sl, r1] │ │ - cbz r2, 6b58a │ │ + cbz r2, 6b672 │ │ adds r1, #1 │ │ - bne.n 6b544 │ │ + bne.n 6b62c │ │ sub.w r1, fp, #7 │ │ cmp r1, #0 │ │ - bcs.n 6b4c0 │ │ + bcs.n 6b5a8 │ │ add.w r1, fp, #1 │ │ subs r1, r1, r0 │ │ - beq.n 6b5bc │ │ + beq.n 6b6a4 │ │ add.w r3, sl, r0 │ │ movs r2, #0 │ │ ldrb r5, [r3, r2] │ │ - cbz r5, 6b574 │ │ + cbz r5, 6b65c │ │ adds r2, #1 │ │ cmp r1, r2 │ │ - bne.n 6b564 │ │ - b.n 6b5bc │ │ + bne.n 6b64c │ │ + b.n 6b6a4 │ │ movs r1, #0 │ │ - b.n 6b58a │ │ + b.n 6b672 │ │ adds r1, r2, r0 │ │ - b.n 6b58a │ │ + b.n 6b672 │ │ movs r1, #1 │ │ - b.n 6b58a │ │ + b.n 6b672 │ │ movs r1, #2 │ │ - b.n 6b58a │ │ + b.n 6b672 │ │ movs r1, #3 │ │ - b.n 6b58a │ │ + b.n 6b672 │ │ movs r1, #4 │ │ - b.n 6b58a │ │ + b.n 6b672 │ │ movs r1, #5 │ │ cmp r1, fp │ │ - bne.n 6b5bc │ │ + bne.n 6b6a4 │ │ add r4, sp, #624 @ 0x270 │ │ movs r1, #104 @ 0x68 │ │ mov r0, r4 │ │ - bl d518e │ │ + bl d521e │ │ add r0, sp, #240 @ 0xf0 │ │ mov r1, r4 │ │ - blx d8910 │ │ + blx d8920 │ │ adds r0, #1 │ │ - beq.n 6b618 │ │ + beq.n 6b700 │ │ add r0, sp, #128 @ 0x80 │ │ add r1, sp, #624 @ 0x270 │ │ adds r0, #8 │ │ movs r2, #104 @ 0x68 │ │ - bl d4c50 │ │ + bl d50a2 │ │ movs r0, #0 │ │ ldr.w fp, [sp, #16] │ │ cmp r0, #0 │ │ - beq.n 6b63a │ │ - b.n 6b5d0 │ │ - ldr r0, [pc, #488] @ (6b7a8 ) │ │ + beq.n 6b722 │ │ + b.n 6b6b8 │ │ + ldr r0, [pc, #488] @ (6b890 ) │ │ add r0, pc │ │ ldrd r0, r1, [r0] │ │ strd r0, r1, [sp, #132] @ 0x84 │ │ movs r0, #1 │ │ ldr.w fp, [sp, #16] │ │ - cbz r0, 6b63a │ │ + cbz r0, 6b722 │ │ ldrb.w r0, [sp, #132] @ 0x84 │ │ cmp r0, #3 │ │ - bcc.n 6b5fa │ │ + bcc.n 6b6e2 │ │ ldr r4, [sp, #136] @ 0x88 │ │ ldrd r5, r6, [r4] │ │ ldr r1, [r6, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r5 │ │ blxne r1 │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r1, #17 │ │ movs r0, #4 │ │ movt r1, #32768 @ 0x8000 │ │ subs r1, #16 │ │ strd r0, r1, [r9] │ │ ldr r0, [sp, #116] @ 0x74 │ │ cmp r0, #0 │ │ - beq.w 6b330 │ │ + beq.w 6b418 │ │ ldr r0, [sp, #120] @ 0x78 │ │ - blx d87c0 │ │ - b.n 6b330 │ │ - blx d8850 │ │ + blx d87d0 │ │ + b.n 6b418 │ │ + blx d8860 │ │ movs r1, #0 │ │ strb.w r1, [sp, #132] @ 0x84 │ │ ldr r0, [r0, #0] │ │ str r0, [sp, #136] @ 0x88 │ │ - b.n 6b5c8 │ │ + b.n 6b6b0 │ │ add r0, sp, #128 @ 0x80 │ │ mov r2, fp │ │ - bl 8e068 │ │ + bl 8e0d4 │ │ ldr r0, [sp, #128] @ 0x80 │ │ ldr.w fp, [sp, #16] │ │ cmp r0, #0 │ │ - bne.n 6b5d0 │ │ + bne.n 6b6b8 │ │ mov r0, r7 │ │ mov r1, r6 │ │ - bl d52e8 │ │ + bl d50e8 │ │ ldrd r4, r5, [sp, #184] @ 0xb8 │ │ orr.w r8, r7, r6 │ │ vmov d8, r0, r1 │ │ mov r1, r5 │ │ subs r7, r4, r7 │ │ mov.w r2, #0 │ │ sbcs.w r6, r5, r6 │ │ mov r0, r4 │ │ adc.w sl, r2, #0 │ │ - bl d52e8 │ │ + bl d50e8 │ │ vmov d16, r0, r1 │ │ ldrd r2, r3, [fp] │ │ cmp.w r8, #0 │ │ - vldr d17, [pc, #300] @ 6b7a0 │ │ + vldr d17, [pc, #300] @ 6b888 │ │ vdiv.f64 d16, d16, d8 │ │ it eq │ │ vmoveq.f64 d16, d17 │ │ teq sl, #1 │ │ itt ne │ │ movne r6, #0 │ │ movne r7, #0 │ │ subs r0, r4, r2 │ │ sbcs.w r0, r5, r3 │ │ - bcc.n 6b726 │ │ + bcc.n 6b80e │ │ ldrd r0, r1, [fp, #8] │ │ subs r0, r7, r0 │ │ sbcs.w r0, r6, r1 │ │ - bcc.n 6b726 │ │ + bcc.n 6b80e │ │ vldr d17, [fp, #16] │ │ vcmp.f64 d16, d17 │ │ vmrs APSR_nzcv, fpscr │ │ - blt.n 6b726 │ │ - ldr r1, [pc, #256] @ (6b7ac ) │ │ + blt.n 6b80e │ │ + ldr r1, [pc, #256] @ (6b894 ) │ │ add r2, sp, #116 @ 0x74 │ │ - ldr r0, [pc, #256] @ (6b7b0 ) │ │ + ldr r0, [pc, #256] @ (6b898 ) │ │ str r2, [sp, #624] @ 0x270 │ │ add r1, pc │ │ add r0, pc │ │ str r0, [sp, #132] @ 0x84 │ │ add r0, sp, #624 @ 0x270 │ │ str r0, [sp, #128] @ 0x80 │ │ add r0, sp, #240 @ 0xf0 │ │ add r2, sp, #128 @ 0x80 │ │ - bl 3e0ec │ │ + bl 3e3f4 │ │ ldr r4, [sp, #248] @ 0xf8 │ │ add r0, sp, #240 @ 0xf0 │ │ ldr r1, [sp, #12] │ │ ldrd r7, r6, [sp, #240] @ 0xf0 │ │ mov r2, r6 │ │ mov r3, r4 │ │ - bl 61320 │ │ + bl 61408 │ │ ldr.w r8, [sp, #20] │ │ movs r1, #17 │ │ ldr r0, [sp, #240] @ 0xf0 │ │ movt r1, #32768 @ 0x8000 │ │ cmp r0, r1 │ │ - bne.n 6b74c │ │ + bne.n 6b834 │ │ add r5, sp, #240 @ 0xf0 │ │ mov r1, r8 │ │ movs r2, #104 @ 0x68 │ │ mov r0, r5 │ │ - bl d4c50 │ │ + bl d50a2 │ │ mov r0, r5 │ │ - bl 4674c │ │ + bl 46aa0 │ │ ldrd r3, r0, [sp, #120] @ 0x78 │ │ mov r1, r6 │ │ mov r2, r4 │ │ str r0, [sp, #0] │ │ add r0, sp, #240 @ 0xf0 │ │ - bl 95230 │ │ + bl 9529c │ │ ldrb.w r0, [sp, #240] @ 0xf0 │ │ ldr r4, [sp, #244] @ 0xf4 │ │ cmp r0, #4 │ │ - bhi.n 6b770 │ │ + bhi.n 6b858 │ │ cmp r0, #3 │ │ - beq.n 6b770 │ │ + beq.n 6b858 │ │ movs r0, #3 │ │ str.w r0, [r9] │ │ - cbz r7, 6b730 │ │ + cbz r7, 6b818 │ │ mov r0, r6 │ │ - blx d87c0 │ │ - b.n 6b730 │ │ + blx d87d0 │ │ + b.n 6b818 │ │ ldr r1, [sp, #20] │ │ mov r0, r9 │ │ movs r2, #104 @ 0x68 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr r0, [sp, #116] @ 0x74 │ │ cmp r0, #0 │ │ - beq.w 6b336 │ │ + beq.w 6b41e │ │ ldr r0, [sp, #120] @ 0x78 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add.w sp, sp, #728 @ 0x2d8 │ │ vpop {d8} │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add r3, sp, #240 @ 0xf0 │ │ movs r5, #4 │ │ cmp r7, #0 │ │ ldmia r3, {r0, r1, r2, r3} │ │ strd r5, r0, [r9] │ │ add.w r0, r9, #8 │ │ stmia r0!, {r1, r2, r3} │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #116] @ 0x74 │ │ cmp r0, #0 │ │ - bne.w 6b610 │ │ - b.n 6b330 │ │ + bne.w 6b6f8 │ │ + b.n 6b418 │ │ ldrd r8, r5, [r4] │ │ ldr r1, [r5, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r8 │ │ blxne r1 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r0, #3 │ │ cmp r7, #0 │ │ str.w r0, [r9] │ │ - bne.n 6b71e │ │ - b.n 6b730 │ │ + bne.n 6b806 │ │ + b.n 6b818 │ │ nop │ │ nop │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ ldrb r0, [r6, #31] │ │ - lsls r6, r4, #23 │ │ + lsls r6, r1, #20 │ │ movs r7, r0 │ │ - asrs r2, r5, #32 │ │ - vqshl.u64 q14, , #58 @ 0x3a │ │ + lsrs r5, r3, #29 │ │ + @ instruction: 0xfffac9f1 │ │ vsli.64 , q8, #61 @ 0x3d │ │ sub sp, #4 │ │ ldrd r4, r7, [r0, #4] │ │ mov r5, r0 │ │ - cbz r7, 6b7ce │ │ + cbz r7, 6b8b6 │ │ mov r6, r4 │ │ mov r0, r6 │ │ - bl 46ae0 │ │ + bl 46e34 │ │ adds r6, #128 @ 0x80 │ │ subs r7, #1 │ │ - bne.n 6b7c2 │ │ + bne.n 6b8aa │ │ ldr r0, [r5, #0] │ │ - cbz r0, 6b7de │ │ + cbz r0, 6b8c6 │ │ mov r0, r4 │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - bmi.n 6b78e │ │ + bmi.n 6b876 │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #16 │ │ mov r4, r0 │ │ mov r0, r2 │ │ movs r2, #1 │ │ - blx 9fd18 │ │ + blx 9fd24 │ │ movs r5, #3 │ │ adds r1, r0, #1 │ │ movt r5, #32768 @ 0x8000 │ │ cmp r1, #2 │ │ - bcs.n 6b80c │ │ + bcs.n 6b8f4 │ │ add.w r0, r5, #14 │ │ str r0, [r4, #0] │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movw r1, #34744 @ 0x87b8 │ │ movt r1, #65535 @ 0xffff │ │ cmp r0, r1 │ │ - bne.n 6b826 │ │ + bne.n 6b90e │ │ strd r5, r7, [r4] │ │ strd r5, r0, [r4, #8] │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ mov r8, r0 │ │ - blx a96f8 │ │ + blx a9704 │ │ mov r5, r0 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #4 │ │ mov r1, r5 │ │ - bl 402e0 │ │ + bl 405e8 │ │ add r5, sp, #4 │ │ ldmia r5, {r0, r1, r5} │ │ - ldr r6, [pc, #68] @ (6b888 ) │ │ + ldr r6, [pc, #68] @ (6b970 ) │ │ cmp r0, #0 │ │ add r6, pc │ │ ite eq │ │ moveq r6, r1 │ │ movne r5, #27 │ │ cmp.w r5, #4294967295 @ 0xffffffff │ │ - bgt.n 6b856 │ │ - bl 3e03c │ │ - cbz r5, 6b864 │ │ + bgt.n 6b93e │ │ + bl 3e344 │ │ + cbz r5, 6b94c │ │ mov r0, r5 │ │ - blx d87f0 │ │ - cbz r0, 6b880 │ │ + blx d8810 │ │ + cbz r0, 6b968 │ │ mov r7, r0 │ │ - b.n 6b866 │ │ + b.n 6b94e │ │ movs r7, #1 │ │ mov r0, r7 │ │ mov r1, r6 │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ mov r0, r8 │ │ strd r5, r7, [r4] │ │ strd r5, r0, [r4, #8] │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ movs r0, #1 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ - sxtb r1, r4 │ │ + bl 3e2ac │ │ + cbz r1, 6b992 │ │ vtbl.8 d30, {d10-d11}, d29 │ │ rors r0, r6 │ │ sub sp, #56 @ 0x38 │ │ mov r8, r1 │ │ - ldr r1, [pc, #124] @ (6b914 ) │ │ + ldr r1, [pc, #124] @ (6b9fc ) │ │ mov r4, r0 │ │ - ldr r0, [pc, #124] @ (6b918 ) │ │ + ldr r0, [pc, #124] @ (6ba00 ) │ │ add r1, pc │ │ mov r7, r3 │ │ add r0, pc │ │ strd r2, r0, [sp, #40] @ 0x28 │ │ add r2, sp, #40 @ 0x28 │ │ strd r3, r0, [sp, #48] @ 0x30 │ │ add r0, sp, #28 │ │ - bl 3e0ec │ │ + bl 3e3f4 │ │ ldrb r0, [r7, #24] │ │ movs r2, #1 │ │ movs r1, #0 │ │ ldr r3, [sp, #36] @ 0x24 │ │ bic.w r0, r2, r0 │ │ ldrd r5, r6, [sp, #28] │ │ str r1, [sp, #8] │ │ mov r2, r6 │ │ strd r1, r0, [sp] │ │ add r0, sp, #12 │ │ mov r1, r8 │ │ - bl 6531c │ │ + bl 65404 │ │ cmp r5, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r0, r1, [sp, #12] │ │ movs r2, #17 │ │ movt r2, #32768 @ 0x8000 │ │ cmp r0, r2 │ │ - bne.n 6b8f6 │ │ + bne.n 6b9de │ │ mov r0, r4 │ │ mov r2, r8 │ │ - bl 6b7e4 │ │ + bl 6b8cc │ │ add sp, #56 @ 0x38 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ ldrb.w r3, [sp, #20] │ │ ldr.w r7, [sp, #21] │ │ ldr r2, [sp, #24] │ │ str.w r7, [r4, #9] │ │ str r2, [r4, #12] │ │ strb r3, [r4, #8] │ │ strd r0, r1, [r4] │ │ add sp, #56 @ 0x38 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ nop │ │ - ble.n 6b8e2 │ │ + ble.n 6ba68 │ │ vcle.s32 d30, d23, #0 │ │ vtbl.8 d30, {d15-d16}, d29 │ │ - ldr r7, [pc, #960] @ (6bce0 ) │ │ + ldr r7, [pc, #960] @ (6bdc8 ) │ │ sub sp, #220 @ 0xdc │ │ mov r4, r1 │ │ ldr r1, [sp, #256] @ 0x100 │ │ str r2, [sp, #68] @ 0x44 │ │ cmp r1, #8 │ │ - bne.w 6c0bc │ │ + bne.w 6c1a4 │ │ ldr r6, [sp, #264] @ 0x108 │ │ cmp r6, #0 │ │ - beq.w 6c0d2 │ │ + beq.w 6c1ba │ │ str r0, [sp, #28] │ │ ldr r0, [r3, #0] │ │ str r0, [sp, #64] @ 0x40 │ │ mov r0, r6 │ │ ldr r5, [r3, #4] │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 6c0e0 │ │ + beq.w 6c1c8 │ │ ldr r1, [sp, #260] @ 0x104 │ │ mov r2, r6 │ │ mov r8, r0 │ │ - bl d53c6 │ │ + bl d52ea │ │ cmp r6, #1 │ │ - beq.w 6c0f0 │ │ + beq.w 6c1d8 │ │ ldr r1, [r4, #0] │ │ ldr r0, [r1, #8] │ │ cmp r0, #0 │ │ - beq.w 6bfde │ │ + beq.w 6c0c6 │ │ ldr.w sl, [r1, #4] │ │ eor.w r2, r5, #2147483648 @ 0x80000000 │ │ ldrh.w r1, [r8] │ │ str r2, [sp, #60] @ 0x3c │ │ add.w r0, sl, r0, lsl #2 │ │ str r1, [sp, #56] @ 0x38 │ │ ldrd r1, r2, [r4, #4] │ │ @@ -101183,27 +101148,27 @@ │ │ str.w r8, [sp, #40] @ 0x28 │ │ strd r2, r1, [sp, #48] @ 0x30 │ │ adds r1, r0, #5 │ │ str r1, [sp, #24] │ │ add r1, sp, #120 @ 0x78 │ │ adds r1, #9 │ │ str r1, [sp, #36] @ 0x24 │ │ - b.n 6b9c0 │ │ + b.n 6baa8 │ │ ldrd r0, r1, [sp, #184] @ 0xb8 │ │ strd r0, r1, [sp, #72] @ 0x48 │ │ movs r0, #17 │ │ ldr.w r2, [sp, #191] @ 0xbf │ │ movt r0, #32768 @ 0x8000 │ │ cmp r5, r0 │ │ str.w r2, [sp, #79] @ 0x4f │ │ - bne.w 6c040 │ │ + bne.w 6c128 │ │ add.w sl, sl, #4 │ │ ldr r0, [sp, #44] @ 0x2c │ │ cmp sl, r0 │ │ - beq.w 6bfde │ │ + beq.w 6c0c6 │ │ ldr r0, [sp, #68] @ 0x44 │ │ ldr.w r4, [sl] │ │ str r0, [sp, #96] @ 0x60 │ │ ldr r0, [sp, #48] @ 0x30 │ │ str r0, [sp, #88] @ 0x58 │ │ ldr r0, [sp, #56] @ 0x38 │ │ str r0, [sp, #108] @ 0x6c │ │ @@ -101212,24 +101177,24 @@ │ │ str r0, [sp, #116] @ 0x74 │ │ ldr r0, [sp, #64] @ 0x40 │ │ str r0, [sp, #112] @ 0x70 │ │ add r0, sp, #144 @ 0x90 │ │ str r1, [sp, #92] @ 0x5c │ │ ldr r2, [r4, #0] │ │ strd r8, r6, [sp, #100] @ 0x64 │ │ - bl 49d00 │ │ + bl 4a008 │ │ ldrd r0, r5, [sp, #144] @ 0x90 │ │ ldr r2, [r7, #4] │ │ ldrb.w fp, [sp, #152] @ 0x98 │ │ cmp r0, #2 │ │ ldr r1, [r7, #0] │ │ ldr.w r3, [r7, #7] │ │ strd r1, r2, [sp, #184] @ 0xb8 │ │ str.w r3, [sp, #191] @ 0xbf │ │ - beq.n 6b998 │ │ + beq.n 6ba80 │ │ mov r9, r7 │ │ ldr r7, [sp, #36] @ 0x24 │ │ ldrd r2, r3, [sp, #184] @ 0xb8 │ │ ldr r1, [sp, #164] @ 0xa4 │ │ strd r0, r5, [sp, #120] @ 0x78 │ │ add r0, sp, #88 @ 0x58 │ │ str r0, [sp, #196] @ 0xc4 │ │ @@ -101241,954 +101206,955 @@ │ │ ldr.w r6, [sp, #191] @ 0xbf │ │ str r0, [sp, #192] @ 0xc0 │ │ add r0, sp, #120 @ 0x78 │ │ str r3, [r7, #4] │ │ str.w r6, [r7, #7] │ │ strb.w fp, [sp, #128] @ 0x80 │ │ strd r4, r0, [sp, #184] @ 0xb8 │ │ - beq.w 6c066 │ │ + beq.w 6c14e │ │ ldrb.w r7, [r1, #32] │ │ cmp r7, #8 │ │ - bcc.n 6ba4e │ │ + bcc.n 6bb36 │ │ ldrb.w r8, [r1, #41] @ 0x29 │ │ cmp.w r8, #1 │ │ - bne.n 6ba80 │ │ + bne.n 6bb68 │ │ add r0, sp, #208 @ 0xd0 │ │ add r3, sp, #100 @ 0x64 │ │ - bl 4e950 │ │ + bl 4eb60 │ │ ldrd r4, r3, [sp, #212] @ 0xd4 │ │ add r0, sp, #144 @ 0x90 │ │ add r1, sp, #184 @ 0xb8 │ │ mov r2, r4 │ │ - bl 6c144 │ │ + bl 6c22c │ │ ldr r5, [sp, #144] @ 0x90 │ │ movs r0, #17 │ │ ldr r6, [sp, #264] @ 0x108 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r5, r0 │ │ - bne.w 6bff8 │ │ + bne.w 6c0e0 │ │ ldr r0, [sp, #208] @ 0xd0 │ │ - cbz r0, 6baa2 │ │ + cbz r0, 6bb8a │ │ mov r0, r4 │ │ - blx d87c0 │ │ - b.n 6baa2 │ │ + blx d87d0 │ │ + b.n 6bb8a │ │ ldr r6, [sp, #264] @ 0x108 │ │ cmp r2, #1 │ │ str r2, [sp, #204] @ 0xcc │ │ - bne.w 6c06e │ │ + bne.w 6c156 │ │ movs r0, #1 │ │ ldr r4, [r1, #28] │ │ str r0, [sp, #212] @ 0xd4 │ │ movs r0, #0 │ │ str r0, [sp, #208] @ 0xd0 │ │ add r0, sp, #100 @ 0x64 │ │ mov r5, r1 │ │ mov r1, r4 │ │ mov r2, r7 │ │ - bl 49978 │ │ - cbz r0, 6babe │ │ + bl 49c80 │ │ + cbz r0, 6bba6 │ │ ldr.w r8, [sp, #40] @ 0x28 │ │ mov r7, r9 │ │ add r0, sp, #120 @ 0x78 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #120] @ 0x78 │ │ cmp r0, #0 │ │ - beq.w 6b9b4 │ │ + beq.w 6ba9c │ │ ldr r0, [sp, #124] @ 0x7c │ │ - blx 9ca04 │ │ - b.n 6b9b4 │ │ + blx 9ca10 │ │ + b.n 6ba9c │ │ sub.w r0, r7, #8 │ │ cmp r0, #6 │ │ - bhi.w 6c086 │ │ + bhi.w 6c16e │ │ tbh [pc, r0, lsl #1] │ │ movs r7, r0 │ │ movs r7, r0 │ │ lsls r3, r3, #2 │ │ lsls r5, r0, #1 │ │ lsls r1, r7, #6 │ │ lsls r5, r4, #3 │ │ lsls r0, r3, #5 │ │ add r0, sp, #144 @ 0x90 │ │ add r1, sp, #100 @ 0x64 │ │ mov r2, r4 │ │ - bl 42308 │ │ + bl 42610 │ │ ldr r0, [sp, #144] @ 0x90 │ │ cmp r0, #1 │ │ - bne.w 6c0e8 │ │ + bne.w 6c1d0 │ │ ldrd r0, r6, [sp, #148] @ 0x94 │ │ adds r1, r6, r0 │ │ - bcs.w 6c07c │ │ + bcs.w 6c164 │ │ ldr r2, [sp, #264] @ 0x108 │ │ cmp r1, r2 │ │ - bhi.w 6c07c │ │ + bhi.w 6c164 │ │ mov r7, r9 │ │ cmp r6, #0 │ │ - beq.w 6bd5e │ │ + beq.w 6be46 │ │ ldr r1, [sp, #40] @ 0x28 │ │ movs r4, #1 │ │ add.w r8, r1, r0 │ │ ldrb.w r5, [r8], #1 │ │ movs r1, #0 │ │ ldr r0, [sp, #208] @ 0xd0 │ │ str r1, [sp, #216] @ 0xd8 │ │ - cbz r0, 6bb4c │ │ + cbz r0, 6bc34 │ │ movs r0, #1 │ │ strb r5, [r4, #0] │ │ str r0, [sp, #216] @ 0xd8 │ │ add r0, sp, #144 @ 0x90 │ │ add r1, sp, #184 @ 0xb8 │ │ mov r2, r4 │ │ movs r3, #1 │ │ - bl 6c144 │ │ + bl 6c22c │ │ ldrb.w fp, [sp, #148] @ 0x94 │ │ movs r0, #17 │ │ ldr r5, [sp, #144] @ 0x90 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r5, r0 │ │ - bne.w 6bf06 │ │ + bne.w 6bfee │ │ movs.w r0, fp, lsl #31 │ │ - beq.w 6bf32 │ │ + beq.w 6c01a │ │ subs r6, #1 │ │ - bne.n 6bb0e │ │ - b.n 6bd5e │ │ + bne.n 6bbf6 │ │ + b.n 6be46 │ │ add r0, sp, #208 @ 0xd0 │ │ - bl 3ec24 │ │ + bl 3ef2c │ │ ldr r4, [sp, #212] @ 0xd4 │ │ - b.n 6bb1a │ │ + b.n 6bc02 │ │ add r0, sp, #144 @ 0x90 │ │ add r1, sp, #100 @ 0x64 │ │ mov r2, r4 │ │ - bl 42814 │ │ + bl 42b1c │ │ ldr r6, [sp, #144] @ 0x90 │ │ cmp.w r6, #2147483648 @ 0x80000000 │ │ - beq.w 6c09c │ │ + beq.w 6c184 │ │ ldr r0, [sp, #148] @ 0x94 │ │ mov r7, r9 │ │ str r0, [sp, #32] │ │ ldr r0, [sp, #152] @ 0x98 │ │ cmp r0, #0 │ │ - beq.w 6bed4 │ │ + beq.w 6bfbc │ │ mov.w r9, r0, lsl #2 │ │ movs r4, #1 │ │ mov.w r8, #0 │ │ ldr r0, [sp, #32] │ │ add r0, r8 │ │ vldr s0, [r0] │ │ movs r0, #0 │ │ str r0, [sp, #216] @ 0xd8 │ │ vcmp.f32 s0, s0 │ │ vmrs APSR_nzcv, fpscr │ │ - bvs.n 6bbe4 │ │ + bvs.n 6bccc │ │ vmov r0, s0 │ │ eor.w r1, r0, #2147483648 @ 0x80000000 │ │ cmp r0, #0 │ │ it mi │ │ mvnmi r1, r0 │ │ rev r5, r1 │ │ ldr r0, [sp, #208] @ 0xd0 │ │ cmp r0, #3 │ │ - bls.n 6bbec │ │ + bls.n 6bcd4 │ │ movs r0, #0 │ │ str r5, [r4, r0] │ │ adds r3, r0, #4 │ │ add r0, sp, #144 @ 0x90 │ │ add r1, sp, #184 @ 0xb8 │ │ mov r2, r4 │ │ str r3, [sp, #216] @ 0xd8 │ │ - bl 6c144 │ │ + bl 6c22c │ │ ldrb.w fp, [sp, #148] @ 0x94 │ │ movs r0, #17 │ │ ldr r5, [sp, #144] @ 0x90 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r5, r0 │ │ - bne.w 6bf42 │ │ + bne.w 6c02a │ │ movs.w r0, fp, lsl #31 │ │ - beq.w 6bf7e │ │ + beq.w 6c066 │ │ add.w r8, r8, #4 │ │ cmp r9, r8 │ │ - bne.n 6bb82 │ │ - b.n 6bed4 │ │ + bne.n 6bc6a │ │ + b.n 6bfbc │ │ movs r5, #0 │ │ ldr r0, [sp, #208] @ 0xd0 │ │ cmp r0, #3 │ │ - bhi.n 6bbae │ │ + bhi.n 6bc96 │ │ movs r0, #1 │ │ movs r1, #0 │ │ str r0, [sp, #0] │ │ add r0, sp, #208 @ 0xd0 │ │ movs r2, #4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd r4, r0, [sp, #212] @ 0xd4 │ │ - b.n 6bbb0 │ │ + b.n 6bc98 │ │ add r0, sp, #144 @ 0x90 │ │ add r1, sp, #100 @ 0x64 │ │ mov r2, r4 │ │ - bl 498b8 │ │ + bl 49bc0 │ │ ldr r0, [sp, #144] @ 0x90 │ │ str r0, [sp, #20] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 6c0a4 │ │ + beq.w 6c18c │ │ ldr r0, [sp, #148] @ 0x94 │ │ mov r7, r9 │ │ str r0, [sp, #32] │ │ ldr r0, [sp, #152] @ 0x98 │ │ cmp r0, #0 │ │ - beq.w 6bd54 │ │ + beq.w 6be3c │ │ lsls r6, r0, #2 │ │ movs r4, #1 │ │ mov.w r9, #0 │ │ mov.w r8, #0 │ │ ldr r0, [sp, #32] │ │ str.w r9, [sp, #216] @ 0xd8 │ │ ldr.w r5, [r0, r8] │ │ ldr r0, [sp, #208] @ 0xd0 │ │ cmp r0, #3 │ │ mov.w r0, #0 │ │ - bls.n 6bc80 │ │ + bls.n 6bd68 │ │ eor.w r1, r5, #2147483648 @ 0x80000000 │ │ adds r3, r0, #4 │ │ rev r1, r1 │ │ str r1, [r4, r0] │ │ add r0, sp, #144 @ 0x90 │ │ add r1, sp, #184 @ 0xb8 │ │ mov r2, r4 │ │ str r3, [sp, #216] @ 0xd8 │ │ - bl 6c144 │ │ + bl 6c22c │ │ ldrb.w fp, [sp, #148] @ 0x94 │ │ movs r0, #17 │ │ ldr r5, [sp, #144] @ 0x90 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r5, r0 │ │ - bne.w 6bef2 │ │ + bne.w 6bfda │ │ movs.w r0, fp, lsl #31 │ │ - beq.w 6bf1a │ │ + beq.w 6c002 │ │ add.w r8, r8, #4 │ │ cmp r6, r8 │ │ - bne.n 6bc32 │ │ - b.n 6bd54 │ │ + bne.n 6bd1a │ │ + b.n 6be3c │ │ movs r0, #1 │ │ movs r1, #0 │ │ str r0, [sp, #0] │ │ add r0, sp, #208 @ 0xd0 │ │ movs r2, #4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd r4, r0, [sp, #212] @ 0xd4 │ │ - b.n 6bc46 │ │ + b.n 6bd2e │ │ add r0, sp, #144 @ 0x90 │ │ add r1, sp, #100 @ 0x64 │ │ mov r2, r4 │ │ - bl 428d4 │ │ + bl 42bdc │ │ ldr r0, [sp, #144] @ 0x90 │ │ str r0, [sp, #20] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 6c0b4 │ │ + beq.w 6c19c │ │ ldr r0, [sp, #148] @ 0x94 │ │ mov r7, r9 │ │ str r0, [sp, #32] │ │ ldr r0, [sp, #152] @ 0x98 │ │ cmp r0, #0 │ │ - beq.n 6bd54 │ │ + beq.n 6be3c │ │ mov.w r9, r0, lsl #3 │ │ movs r4, #1 │ │ mov.w r8, #0 │ │ ldr r0, [sp, #32] │ │ add r0, r8 │ │ vldr d16, [r0] │ │ movs r0, #0 │ │ str r0, [sp, #216] @ 0xd8 │ │ vcmp.f64 d16, d16 │ │ vmrs APSR_nzcv, fpscr │ │ - bvs.n 6bd34 │ │ + bvs.n 6be1c │ │ vmov r1, r0, d16 │ │ cmp r0, #0 │ │ it mi │ │ mvnmi r1, r1 │ │ rev r5, r1 │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ it mi │ │ movmi.w r1, #4294967295 @ 0xffffffff │ │ eors r0, r1 │ │ rev r6, r0 │ │ ldr r0, [sp, #208] @ 0xd0 │ │ cmp r0, #7 │ │ - bls.n 6bd3e │ │ + bls.n 6be26 │ │ movs r0, #0 │ │ adds r1, r4, r0 │ │ str r6, [r4, r0] │ │ add.w r3, r0, #8 │ │ str r5, [r1, #4] │ │ add r0, sp, #144 @ 0x90 │ │ add r1, sp, #184 @ 0xb8 │ │ mov r2, r4 │ │ str r3, [sp, #216] @ 0xd8 │ │ - bl 6c144 │ │ + bl 6c22c │ │ ldrb.w fp, [sp, #148] @ 0x94 │ │ movs r0, #17 │ │ ldr r5, [sp, #144] @ 0x90 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r5, r0 │ │ - bne.w 6bef2 │ │ + bne.w 6bfda │ │ movs.w r0, fp, lsl #31 │ │ - beq.w 6bf1a │ │ + beq.w 6c002 │ │ add.w r8, r8, #8 │ │ cmp r9, r8 │ │ - bne.n 6bcc2 │ │ - b.n 6bd54 │ │ + bne.n 6bdaa │ │ + b.n 6be3c │ │ movs r6, #0 │ │ movs r5, #0 │ │ ldr r0, [sp, #208] @ 0xd0 │ │ cmp r0, #7 │ │ - bhi.n 6bcf8 │ │ + bhi.n 6bde0 │ │ movs r0, #1 │ │ movs r1, #0 │ │ str r0, [sp, #0] │ │ add r0, sp, #208 @ 0xd0 │ │ movs r2, #8 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd r4, r0, [sp, #212] @ 0xd4 │ │ - b.n 6bcfa │ │ + b.n 6bde2 │ │ ldr r0, [sp, #20] │ │ - cbz r0, 6bd5e │ │ + cbz r0, 6be46 │ │ ldr r0, [sp, #32] │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #208] @ 0xd0 │ │ - cbz r0, 6bd74 │ │ + cbz r0, 6be5c │ │ movs r5, #17 │ │ mov.w fp, #1 │ │ movt r5, #32768 @ 0x8000 │ │ ldr.w r8, [sp, #40] @ 0x28 │ │ ldr r6, [sp, #264] @ 0x108 │ │ - b.n 6bfca │ │ + b.n 6c0b2 │ │ ldr.w r8, [sp, #40] @ 0x28 │ │ ldr r6, [sp, #264] @ 0x108 │ │ - b.n 6baa8 │ │ + b.n 6bb90 │ │ add r0, sp, #144 @ 0x90 │ │ add r1, sp, #100 @ 0x64 │ │ mov r2, r4 │ │ - bl 4299c │ │ + bl 42ca4 │ │ ldr r0, [sp, #144] @ 0x90 │ │ str r0, [sp, #12] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 6c0ac │ │ + beq.w 6c194 │ │ ldr r0, [sp, #148] @ 0x94 │ │ mov r7, r9 │ │ str r0, [sp, #32] │ │ ldr r0, [sp, #152] @ 0x98 │ │ cmp r0, #0 │ │ - beq.w 6bedc │ │ + beq.w 6bfc4 │ │ ldr r6, [sp, #32] │ │ movs r4, #1 │ │ add.w r0, r6, r0, lsl #3 │ │ str r0, [sp, #16] │ │ ldrb.w r0, [r5, #40] @ 0x28 │ │ str r0, [sp, #20] │ │ ldrd r1, r2, [r6] │ │ movs r0, #0 │ │ cmp.w r8, #2 │ │ str r0, [sp, #216] @ 0xd8 │ │ - bne.n 6bdea │ │ + bne.n 6bed2 │ │ mov r0, r1 │ │ mov r1, r2 │ │ ldr r2, [sp, #20] │ │ movs r5, #0 │ │ strd r5, r5, [sp] │ │ - bl 4ee30 │ │ + bl 4f040 │ │ mov r7, r0 │ │ ldr r0, [sp, #208] @ 0xd0 │ │ cmp r0, #7 │ │ - bls.n 6be24 │ │ + bls.n 6bf0c │ │ rev r0, r1 │ │ str r0, [r4, r5] │ │ adds r0, r4, r5 │ │ rev r1, r7 │ │ add.w r3, r5, #8 │ │ str r1, [r0, #4] │ │ mov r7, r9 │ │ str r3, [sp, #216] @ 0xd8 │ │ - b.n 6bdf4 │ │ + b.n 6bedc │ │ ldr r3, [sp, #20] │ │ add r0, sp, #208 @ 0xd0 │ │ - bl 4fbac │ │ + bl 4fdbc │ │ ldr r3, [sp, #216] @ 0xd8 │ │ ldr r4, [sp, #212] @ 0xd4 │ │ add r0, sp, #144 @ 0x90 │ │ add r1, sp, #184 @ 0xb8 │ │ mov r2, r4 │ │ - bl 6c144 │ │ + bl 6c22c │ │ ldrb.w fp, [sp, #148] @ 0x94 │ │ movs r0, #17 │ │ ldr r5, [sp, #144] @ 0x90 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r5, r0 │ │ - bne.w 6bf56 │ │ + bne.w 6c03e │ │ movs.w r0, fp, lsl #31 │ │ - beq.w 6bf8c │ │ + beq.w 6c074 │ │ adds r6, #8 │ │ ldr r0, [sp, #16] │ │ cmp r6, r0 │ │ - bne.n 6bdb0 │ │ - b.n 6bedc │ │ + bne.n 6be98 │ │ + b.n 6bfc4 │ │ movs r0, #1 │ │ mov r4, r1 │ │ str r0, [sp, #0] │ │ add r0, sp, #208 @ 0xd0 │ │ movs r1, #0 │ │ movs r2, #8 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ mov r1, r4 │ │ ldrd r4, r5, [sp, #212] @ 0xd4 │ │ - b.n 6bdd6 │ │ + b.n 6bebe │ │ add r0, sp, #144 @ 0x90 │ │ add r1, sp, #100 @ 0x64 │ │ mov r2, r4 │ │ - bl 42384 │ │ + bl 4268c │ │ ldr r0, [sp, #144] @ 0x90 │ │ str r0, [sp, #20] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 6c094 │ │ + beq.w 6c17c │ │ ldr r0, [sp, #148] @ 0x94 │ │ str r0, [sp, #32] │ │ ldr r0, [sp, #152] @ 0x98 │ │ cmp r0, #0 │ │ - beq.n 6bee6 │ │ + beq.n 6bfce │ │ lsls r6, r0, #3 │ │ movs r4, #1 │ │ mov.w r8, #0 │ │ ldr r1, [sp, #32] │ │ ldr r0, [sp, #208] @ 0xd0 │ │ ldr.w r5, [r1, r8] │ │ add r1, r8 │ │ cmp r0, #7 │ │ ldr r7, [r1, #4] │ │ mov.w r1, #0 │ │ mov.w r0, #0 │ │ str r1, [sp, #216] @ 0xd8 │ │ - bls.n 6bec0 │ │ + bls.n 6bfa8 │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ rev r2, r5 │ │ eors r1, r7 │ │ add.w r3, r0, #8 │ │ rev r1, r1 │ │ str r1, [r4, r0] │ │ adds r1, r4, r0 │ │ add r0, sp, #144 @ 0x90 │ │ str r2, [r1, #4] │ │ add r1, sp, #184 @ 0xb8 │ │ mov r2, r4 │ │ str r3, [sp, #216] @ 0xd8 │ │ - bl 6c144 │ │ + bl 6c22c │ │ ldrb.w fp, [sp, #148] @ 0x94 │ │ movs r0, #17 │ │ ldr r5, [sp, #144] @ 0x90 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r5, r0 │ │ - bne.n 6bf6a │ │ + bne.n 6c052 │ │ movs.w r0, fp, lsl #31 │ │ - beq.n 6bfaa │ │ + beq.n 6c092 │ │ add.w r8, r8, #8 │ │ cmp r6, r8 │ │ - bne.n 6be66 │ │ - b.n 6bee6 │ │ + bne.n 6bf4e │ │ + b.n 6bfce │ │ movs r0, #1 │ │ movs r2, #8 │ │ str r0, [sp, #0] │ │ add r0, sp, #208 @ 0xd0 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd r4, r0, [sp, #212] @ 0xd4 │ │ - b.n 6be80 │ │ + b.n 6bf68 │ │ cmp r6, #0 │ │ - bne.w 6bd58 │ │ - b.n 6bd5e │ │ + bne.w 6be40 │ │ + b.n 6be46 │ │ ldr r0, [sp, #12] │ │ cmp r0, #0 │ │ - bne.w 6bd58 │ │ - b.n 6bd5e │ │ + bne.w 6be40 │ │ + b.n 6be46 │ │ ldr r0, [sp, #20] │ │ mov r7, r9 │ │ cmp r0, #0 │ │ - bne.w 6bd58 │ │ - b.n 6bd5e │ │ + bne.w 6be40 │ │ + b.n 6be46 │ │ ldr r2, [sp, #24] │ │ ldr r1, [r2, #4] │ │ ldr r0, [r2, #0] │ │ ldr.w r2, [r2, #7] │ │ str.w r2, [sp, #175] @ 0xaf │ │ strd r0, r1, [sp, #168] @ 0xa8 │ │ - b.n 6bf24 │ │ + b.n 6c00c │ │ ldr r2, [sp, #24] │ │ ldr r1, [r2, #4] │ │ ldr r0, [r2, #0] │ │ ldr.w r2, [r2, #7] │ │ str.w r2, [sp, #175] @ 0xaf │ │ strd r0, r1, [sp, #168] @ 0xa8 │ │ - b.n 6bf3c │ │ + b.n 6c024 │ │ movs r5, #17 │ │ mov.w fp, #0 │ │ movt r5, #32768 @ 0x8000 │ │ ldr.w r8, [sp, #40] @ 0x28 │ │ ldr r6, [sp, #264] @ 0x108 │ │ ldr r0, [sp, #20] │ │ cmp r0, #0 │ │ - bne.n 6bfc0 │ │ - b.n 6bfc6 │ │ + bne.n 6c0a8 │ │ + b.n 6c0ae │ │ movs r5, #17 │ │ mov.w fp, #0 │ │ movt r5, #32768 @ 0x8000 │ │ ldr.w r8, [sp, #40] @ 0x28 │ │ - b.n 6bfa6 │ │ + b.n 6c08e │ │ ldr r2, [sp, #24] │ │ ldr r1, [r2, #4] │ │ ldr r0, [r2, #0] │ │ ldr.w r2, [r2, #7] │ │ str.w r2, [sp, #175] @ 0xaf │ │ strd r0, r1, [sp, #168] @ 0xa8 │ │ - b.n 6bf88 │ │ + b.n 6c070 │ │ ldr r2, [sp, #24] │ │ ldr r1, [r2, #4] │ │ ldr r0, [r2, #0] │ │ ldr.w r2, [r2, #7] │ │ str.w r2, [sp, #175] @ 0xaf │ │ strd r0, r1, [sp, #168] @ 0xa8 │ │ - b.n 6bf96 │ │ + b.n 6c07e │ │ ldr r2, [sp, #24] │ │ ldr r1, [r2, #4] │ │ ldr r0, [r2, #0] │ │ ldr.w r2, [r2, #7] │ │ str.w r2, [sp, #175] @ 0xaf │ │ strd r0, r1, [sp, #168] @ 0xa8 │ │ - b.n 6bfb4 │ │ + b.n 6c09c │ │ movs r5, #17 │ │ mov.w fp, #0 │ │ movt r5, #32768 @ 0x8000 │ │ cmp r6, #0 │ │ - b.n 6bf9a │ │ + b.n 6c082 │ │ movs r5, #17 │ │ mov.w fp, #0 │ │ movt r5, #32768 @ 0x8000 │ │ ldr r0, [sp, #12] │ │ cmp r0, #0 │ │ ldr.w r8, [sp, #40] @ 0x28 │ │ - beq.n 6bfa6 │ │ + beq.n 6c08e │ │ ldr r0, [sp, #32] │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r6, [sp, #264] @ 0x108 │ │ - b.n 6bfc6 │ │ + b.n 6c0ae │ │ movs r5, #17 │ │ mov.w fp, #0 │ │ movt r5, #32768 @ 0x8000 │ │ ldr.w r8, [sp, #40] @ 0x28 │ │ mov r7, r9 │ │ ldr r6, [sp, #264] @ 0x108 │ │ ldr r0, [sp, #20] │ │ - cbz r0, 6bfc6 │ │ + cbz r0, 6c0ae │ │ ldr r0, [sp, #32] │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #208] @ 0xd0 │ │ - cbz r0, 6bfd0 │ │ + cbz r0, 6c0b8 │ │ ldr r0, [sp, #212] @ 0xd4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r5, r0 │ │ - beq.w 6baa8 │ │ - b.n 6c01e │ │ + beq.w 6bb90 │ │ + b.n 6c106 │ │ ldr r1, [sp, #28] │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ str r0, [r1, #0] │ │ movs r0, #1 │ │ strb r0, [r1, #4] │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add sp, #220 @ 0xdc │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r2, [sp, #208] @ 0xd0 │ │ ldr.w r1, [sp, #153] @ 0x99 │ │ ldr.w r0, [sp, #149] @ 0x95 │ │ cmp r2, #0 │ │ ldr r3, [sp, #156] @ 0x9c │ │ strd r0, r1, [sp, #168] @ 0xa8 │ │ ldrb.w fp, [sp, #148] @ 0x94 │ │ str.w r3, [sp, #175] @ 0xaf │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r8, [sp, #40] @ 0x28 │ │ ldr.w r2, [sp, #175] @ 0xaf │ │ ldrd r0, r1, [sp, #168] @ 0xa8 │ │ str.w r2, [sp, #79] @ 0x4f │ │ strd r0, r1, [sp, #72] @ 0x48 │ │ add r0, sp, #120 @ 0x78 │ │ - bl 47f98 │ │ + bl 482a0 │ │ ldr r0, [sp, #120] @ 0x78 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #124] @ 0x7c │ │ - blxne 9ca04 │ │ + blxne 9ca10 │ │ ldr r3, [sp, #28] │ │ ldrd r0, r1, [sp, #72] @ 0x48 │ │ ldr.w r2, [sp, #79] @ 0x4f │ │ str r2, [r3, #12] │ │ str.w r1, [r3, #9] │ │ str.w r0, [r3, #5] │ │ strb.w fp, [r3, #4] │ │ str r5, [r3, #0] │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add sp, #220 @ 0xdc │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #196] @ (6c12c ) │ │ + ldr r0, [pc, #196] @ (6c214 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r1, [pc, #160] @ (6c110 ) │ │ + bl 3fd40 │ │ + ldr r1, [pc, #160] @ (6c1f8 ) │ │ add r0, sp, #204 @ 0xcc │ │ - ldr r2, [pc, #160] @ (6c114 ) │ │ + ldr r2, [pc, #160] @ (6c1fc ) │ │ add r1, pc │ │ add r2, pc │ │ - bl 40ff4 │ │ - ldr r3, [pc, #192] @ (6c140 ) │ │ + bl 412fc │ │ + ldr r3, [pc, #192] @ (6c228 ) │ │ ldr r2, [sp, #264] @ 0x108 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #120] @ (6c100 ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #120] @ (6c1e8 ) │ │ movs r1, #40 @ 0x28 │ │ - ldr r2, [pc, #120] @ (6c104 ) │ │ + ldr r2, [pc, #120] @ (6c1ec ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r0, [pc, #156] @ (6c134 ) │ │ + bl 3fd54 │ │ + ldr r0, [pc, #156] @ (6c21c ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #108] @ (6c10c ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #108] @ (6c1f4 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #96] @ (6c108 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #96] @ (6c1f0 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #140] @ (6c13c ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #140] @ (6c224 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #128] @ (6c138 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #128] @ (6c220 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #88] @ (6c118 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #88] @ (6c200 ) │ │ add r2, sp, #144 @ 0x90 │ │ - ldr r3, [pc, #88] @ (6c11c ) │ │ - ldr r1, [pc, #92] @ (6c120 ) │ │ + ldr r3, [pc, #88] @ (6c204 ) │ │ + ldr r1, [pc, #92] @ (6c208 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ - ldr r3, [pc, #80] @ (6c124 ) │ │ + bl 417b8 │ │ + ldr r3, [pc, #80] @ (6c20c ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ movs r2, #0 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ movs r0, #1 │ │ mov r1, r6 │ │ - bl 3dfa4 │ │ - ldr r0, [pc, #68] @ (6c130 ) │ │ + bl 3e2ac │ │ + ldr r0, [pc, #68] @ (6c218 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r3, [pc, #52] @ (6c128 ) │ │ + bl 3fd40 │ │ + ldr r3, [pc, #52] @ (6c210 ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ movs r2, #1 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ nop │ │ - bcc.n 6c086 │ │ - @ instruction: 0xfffaed0e │ │ + bcs.n 6c19e │ │ + vcvt.f16.u16 d30, d22, #6 │ │ movs r6, r0 │ │ - stc 0, cr0, [r6], #24 │ │ - ldc 0, cr0, [lr], #24 │ │ - add r1, pc, #832 @ (adr r1, 6c454 ) │ │ - @ instruction: 0xfffaecb6 │ │ - movs r6, r0 │ │ - bcc.n 6c09a │ │ - vtbl.8 d30, {d26}, d6 │ │ - movs r6, r0 │ │ - @ instruction: 0xe9a40006 │ │ - ldrd r0, r0, [r2, #-24] │ │ - ldmdb r4!, {r1, r2} │ │ - ldc 0, cr0, [r4], #24 │ │ - mrrc 0, 0, r0, r2, cr6 │ │ - ldcl 0, cr0, [r6], {6} │ │ - stcl 0, cr0, [r6], {6} │ │ - ldcl 0, cr0, [lr], {6} │ │ - vhadd.s32 d0, d12, d6 │ │ + rsb r0, lr, r6 │ │ + @ instruction: 0xebe60006 │ │ + add r0, pc, #928 @ (adr r0, 6c59c ) │ │ + @ instruction: 0xfffaebde │ │ + movs r6, r0 │ │ + bcs.n 6c1b2 │ │ + vqshl.u32 q15, q15, #26 │ │ + movs r6, r0 │ │ + @ instruction: 0xe8cc0006 │ │ + ldrd r0, r0, [sl], #-24 │ │ + @ instruction: 0xe85c0006 │ │ + rsbs r0, ip, r6 │ │ + sbcs.w r0, sl, r6 │ │ + @ instruction: 0xebfe0006 │ │ + @ instruction: 0xebee0006 │ │ + stc 0, cr0, [r6], {6} │ │ + cdp 0, 5, cr0, cr4, cr6, {0} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ sub sp, #56 @ 0x38 │ │ ldr r5, [r1, #0] │ │ mov r4, r0 │ │ mov r9, r2 │ │ mov r6, r1 │ │ ldrb.w r0, [r5, #40] @ 0x28 │ │ - cbz r0, 6c184 │ │ + cbz r0, 6c26c │ │ ldr r7, [r6, #4] │ │ ldr r0, [r7, #0] │ │ cmp r0, #0 │ │ - beq.w 6c276 │ │ + beq.w 6c35e │ │ ldr r1, [r7, #4] │ │ movs r0, #0 │ │ strd r3, r0, [sp] │ │ add r0, sp, #32 │ │ mov r8, r3 │ │ movs r2, #16 │ │ mov r3, r9 │ │ - bl 49e28 │ │ + bl 4a130 │ │ ldrd r1, r0, [sp, #32] │ │ cmp r1, #1 │ │ - bne.n 6c1d6 │ │ + bne.n 6c2be │ │ add r3, sp, #40 @ 0x28 │ │ ldmia r3, {r1, r2, r3} │ │ - b.n 6c1c8 │ │ + b.n 6c2b0 │ │ ldr r7, [r6, #4] │ │ ldr r0, [r7, #0] │ │ cmp r0, #0 │ │ - beq.n 6c276 │ │ + beq.n 6c35e │ │ ldr r0, [r6, #8] │ │ add r2, sp, #16 │ │ ldrd r0, r1, [r0] │ │ eor.w r1, r1, #2147483648 @ 0x80000000 │ │ str r1, [sp, #20] │ │ str r0, [sp, #16] │ │ movs r0, #8 │ │ ldr r1, [r7, #4] │ │ strd r2, r0, [sp] │ │ add r0, sp, #32 │ │ mov r2, r9 │ │ - bl 51ac8 │ │ + bl 51cd8 │ │ movs r0, #17 │ │ ldr r1, [sp, #32] │ │ movt r0, #32768 @ 0x8000 │ │ cmp r1, r0 │ │ - bne.n 6c1c4 │ │ + bne.n 6c2ac │ │ str r0, [r4, #0] │ │ movs r0, #1 │ │ strb r0, [r4, #4] │ │ add sp, #56 @ 0x38 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ add r3, sp, #32 │ │ ldmia r3, {r0, r1, r2, r3} │ │ str r1, [r4, #4] │ │ str r2, [r4, #8] │ │ str r0, [r4, #0] │ │ str r3, [r4, #12] │ │ add sp, #56 @ 0x38 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ cmp r0, #0 │ │ - beq.n 6c26c │ │ + beq.n 6c354 │ │ ldr r0, [sp, #48] @ 0x30 │ │ cmp r0, #8 │ │ - bne.n 6c2ac │ │ + bne.n 6c394 │ │ ldrb.w r0, [r5, #41] @ 0x29 │ │ - cbz r0, 6c1fe │ │ + cbz r0, 6c2e6 │ │ ldr r1, [sp, #44] @ 0x2c │ │ ldr r0, [r1, #0] │ │ ldr r1, [r1, #4] │ │ eor.w r3, r1, #2147483648 @ 0x80000000 │ │ ldr r1, [r6, #8] │ │ ldrd r1, r2, [r1] │ │ eors r2, r3 │ │ eors r1, r0 │ │ orrs r1, r2 │ │ - bne.n 6c20e │ │ + bne.n 6c2f6 │ │ movs r0, #17 │ │ movt r0, #32768 @ 0x8000 │ │ subs r0, #13 │ │ str r0, [r4, #0] │ │ add sp, #56 @ 0x38 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ ldr r5, [r6, #12] │ │ ldrd r1, r2, [r5] │ │ strd r0, r3, [sp, #8] │ │ movs r0, #0 │ │ str r0, [sp, #0] │ │ add r0, sp, #32 │ │ movs r3, #1 │ │ - bl 4e084 │ │ + bl 4e294 │ │ ldr r1, [sp, #32] │ │ movw sl, #17 │ │ ldrb.w r0, [sp, #36] @ 0x24 │ │ movt sl, #32768 @ 0x8000 │ │ cmp r1, sl │ │ - bne.n 6c27e │ │ + bne.n 6c366 │ │ lsls r0, r0, #31 │ │ - beq.n 6c26c │ │ + beq.n 6c354 │ │ ldr r0, [r5, #8] │ │ movs r2, #8 │ │ movs r3, #0 │ │ ldr r1, [r0, #0] │ │ movs r0, #0 │ │ str r0, [sp, #4] │ │ add r0, sp, #32 │ │ - bl 49e28 │ │ + bl 4a130 │ │ ldr r0, [sp, #32] │ │ - cbz r0, 6c26c │ │ + cbz r0, 6c354 │ │ ldr r1, [sp, #36] @ 0x24 │ │ ldr.w r3, [sp, #45] @ 0x2d │ │ ldrb.w r0, [sp, #40] @ 0x28 │ │ cmp r1, sl │ │ ldr.w r2, [sp, #41] @ 0x29 │ │ ldr r5, [sp, #48] @ 0x30 │ │ strd r2, r3, [sp, #16] │ │ str.w r5, [sp, #23] │ │ - bne.n 6c290 │ │ + bne.n 6c378 │ │ mov r3, r8 │ │ ldr r0, [r7, #0] │ │ cmp r0, #0 │ │ - bne.w 6c18c │ │ - ldr r0, [pc, #76] @ (6c2c4 ) │ │ + bne.w 6c274 │ │ + ldr r0, [pc, #76] @ (6c3ac ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ ldr.w r3, [sp, #41] @ 0x29 │ │ ldr r7, [sp, #44] @ 0x2c │ │ ldr.w r2, [sp, #37] @ 0x25 │ │ str.w r7, [sp, #23] │ │ strd r2, r3, [sp, #16] │ │ ldrd r2, r3, [sp, #16] │ │ ldr.w r7, [sp, #23] │ │ str r7, [r4, #12] │ │ str.w r3, [r4, #9] │ │ str.w r2, [r4, #5] │ │ strb r0, [r4, #4] │ │ str r1, [r4, #0] │ │ add sp, #56 @ 0x38 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ - ldr r0, [pc, #24] @ (6c2c8 ) │ │ + ldr r0, [pc, #24] @ (6c3b0 ) │ │ add r2, sp, #32 │ │ - ldr r3, [pc, #24] @ (6c2cc ) │ │ - ldr r1, [pc, #28] @ (6c2d0 ) │ │ + ldr r3, [pc, #24] @ (6c3b4 ) │ │ + ldr r1, [pc, #28] @ (6c3b8 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ nop │ │ - @ instruction: 0xe8d40006 │ │ - bne.n 6c26a │ │ - vqshlu.s64 d30, d6, #58 @ 0x3a │ │ + b.n 6c3a8 │ │ movs r6, r0 │ │ - b.n 6c23c │ │ + beq.n 6c382 │ │ + vrintz.f32 d30, d14 │ │ + movs r6, r0 │ │ + b.n 6c174 │ │ movs r6, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #44 @ 0x2c │ │ mov r8, r0 │ │ ldr r0, [r0, #20] │ │ adds r0, #1 │ │ str.w r0, [r8, #20] │ │ - bcc.w 6c470 │ │ + bcc.w 6c558 │ │ movs r0, #0 │ │ movs r4, #1 │ │ mov r6, r0 │ │ str.w r0, [r8] │ │ str.w r0, [r8, #4] │ │ add.w r0, r4, r4, lsl #1 │ │ lsls r5, r0, #2 │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 6c57c │ │ + beq.w 6c664 │ │ adds r1, r0, #4 │ │ movs r2, #0 │ │ movs r3, #8 │ │ mov r7, r4 │ │ str.w r2, [r1, #-4] │ │ subs r7, #1 │ │ strd r3, r2, [r1], #12 │ │ - bne.n 6c310 │ │ + bne.n 6c3f8 │ │ mov r1, r4 │ │ ldr.w r2, [r8, #8] │ │ mov lr, r6 │ │ str r2, [sp, #28] │ │ movs r6, #0 │ │ ldrd r3, r2, [r8, #12] │ │ strd r1, r0, [r8, #8] │ │ add.w r0, r2, r2, lsl #1 │ │ str.w r8, [sp, #32] │ │ add.w r7, r3, r0, lsl #2 │ │ str.w r4, [r8, #16] │ │ mov r8, r3 │ │ strd r3, r7, [sp, #36] @ 0x24 │ │ cmp r3, #0 │ │ - beq.n 6c3d0 │ │ - cbnz r6, 6c352 │ │ + beq.n 6c4b8 │ │ + cbnz r6, 6c43a │ │ cmp r8, r7 │ │ - bne.n 6c3a2 │ │ - b.n 6c4c0 │ │ + bne.n 6c48a │ │ + b.n 6c5a8 │ │ cmp r1, r5 │ │ - beq.n 6c368 │ │ + beq.n 6c450 │ │ ldr.w fp, [r1, #8] │ │ add.w sl, r1, #24 │ │ cmp.w fp, #2147483648 @ 0x80000000 │ │ - bne.n 6c3c6 │ │ + bne.n 6c4ae │ │ ldr r7, [sp, #40] @ 0x28 │ │ mov r1, sl │ │ subs r0, r5, r1 │ │ - beq.n 6c390 │ │ + beq.n 6c478 │ │ movw r2, #43691 @ 0xaaab │ │ add.w r5, r1, #8 │ │ movt r2, #43690 @ 0xaaaa │ │ umull r0, r2, r0, r2 │ │ lsrs r4, r2, #4 │ │ ldr r0, [r5, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #24 │ │ subs r4, #1 │ │ - bne.n 6c37e │ │ + bne.n 6c466 │ │ cmp.w r9, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ cmp r8, r7 │ │ - beq.w 6c4c0 │ │ + beq.w 6c5a8 │ │ mov r0, r8 │ │ ldr.w r9, [r0], #12 │ │ cmp.w r9, #2147483648 @ 0x80000000 │ │ - beq.w 6c4c8 │ │ + beq.w 6c5b0 │ │ ldrd r1, r2, [r8, #4] │ │ mov r8, r0 │ │ add.w r2, r2, r2, lsl #1 │ │ add.w r5, r1, r2, lsl #3 │ │ mov r6, r1 │ │ cmp r6, #0 │ │ - bne.n 6c352 │ │ - b.n 6c34c │ │ + bne.n 6c43a │ │ + b.n 6c434 │ │ ldr r0, [sp, #32] │ │ ldr.w lr, [r0] │ │ ldr r4, [r0, #16] │ │ - b.n 6c3ec │ │ + b.n 6c4d4 │ │ cmp r6, #0 │ │ - beq.w 6c576 │ │ + beq.w 6c65e │ │ cmp r1, r5 │ │ - beq.w 6c536 │ │ + beq.w 6c61e │ │ ldr.w fp, [r1, #8] │ │ add.w sl, r1, #24 │ │ cmp.w fp, #2147483648 @ 0x80000000 │ │ - beq.w 6c538 │ │ + beq.w 6c620 │ │ ldr r3, [r1, #0] │ │ movw r0, #31829 @ 0x7c55 │ │ movt r0, #32586 @ 0x7f4a │ │ muls r0, r3 │ │ and.w r0, r0, lr │ │ cmp r4, r0 │ │ - bls.w 6c584 │ │ + bls.w 6c66c │ │ ldr r2, [r1, #4] │ │ add.w r0, r0, r0, lsl #1 │ │ str r2, [sp, #12] │ │ ldr r2, [r1, #12] │ │ str r2, [sp, #24] │ │ ldr r2, [r1, #16] │ │ ldr r1, [r1, #20] │ │ @@ -102196,15 +102162,15 @@ │ │ str r1, [sp, #16] │ │ ldr r1, [sp, #32] │ │ ldr r1, [r1, #12] │ │ ldr.w r2, [r1, r0, lsl #2] │ │ add.w r0, r1, r0, lsl #2 │ │ ldr r7, [r0, #8] │ │ cmp r7, r2 │ │ - beq.n 6c45c │ │ + beq.n 6c544 │ │ ldr.w ip, [r0, #4] │ │ add.w r1, r7, r7, lsl #1 │ │ adds r2, r7, #1 │ │ str r2, [r0, #8] │ │ add.w r0, ip, r1, lsl #3 │ │ str.w r3, [ip, r1, lsl #3] │ │ ldr r1, [sp, #12] │ │ @@ -102214,205 +102180,205 @@ │ │ ldr r1, [sp, #20] │ │ str r1, [r0, #16] │ │ ldr r1, [sp, #16] │ │ str r1, [r0, #20] │ │ mov r1, sl │ │ ldrd r3, r7, [sp, #36] @ 0x24 │ │ cmp r3, #0 │ │ - bne.w 6c34a │ │ - b.n 6c3d0 │ │ + bne.w 6c432 │ │ + b.n 6c4b8 │ │ str r0, [sp, #8] │ │ ldr r0, [sp, #8] │ │ strd r3, lr, [sp] │ │ - bl 479e2 │ │ + bl 47c38 │ │ ldr r0, [sp, #8] │ │ ldrd r3, lr, [sp] │ │ - b.n 6c428 │ │ + b.n 6c510 │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r2, #1 │ │ movs r6, #0 │ │ - b.n 6c48a │ │ + b.n 6c572 │ │ umull r7, r5, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r5, r3, r6, r5 │ │ mla r6, r3, r6, r5 │ │ mov r3, r7 │ │ lsls r7, r0, #31 │ │ - beq.n 6c47a │ │ + beq.n 6c562 │ │ umull r4, r7, r3, r2 │ │ cmp r0, #1 │ │ - beq.n 6c4a2 │ │ + beq.n 6c58a │ │ mla r1, r3, r1, r7 │ │ mla r1, r6, r2, r1 │ │ mov r2, r4 │ │ - b.n 6c47a │ │ + b.n 6c562 │ │ subs r6, r4, #1 │ │ mov.w r0, #0 │ │ sbc.w r0, r0, #0 │ │ strd r6, r0, [r8] │ │ movw r0, #43690 @ 0xaaaa │ │ movt r0, #2730 @ 0xaaa │ │ cmp r4, r0 │ │ - bls.n 6c58e │ │ - bl 3e03c │ │ + bls.n 6c676 │ │ + bl 3e344 │ │ mov r8, r7 │ │ ldr r0, [sp, #36] @ 0x24 │ │ - cbnz r0, 6c4d0 │ │ - b.n 6c576 │ │ + cbnz r0, 6c5b8 │ │ + b.n 6c65e │ │ mov r8, r0 │ │ ldr r0, [sp, #36] @ 0x24 │ │ cmp r0, #0 │ │ - beq.n 6c576 │ │ + beq.n 6c65e │ │ ldr.w fp, [sp, #36] @ 0x24 │ │ subs.w r0, r7, r8 │ │ - beq.n 6c526 │ │ + beq.n 6c60e │ │ movw r1, #43691 @ 0xaaab │ │ lsrs r0, r0, #2 │ │ movt r1, #43690 @ 0xaaaa │ │ movs r7, #0 │ │ mul.w r9, r0, r1 │ │ - b.n 6c4fe │ │ + b.n 6c5e6 │ │ ldr r0, [r6, #0] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, sl │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r7, #1 │ │ cmp r7, r9 │ │ - beq.n 6c526 │ │ + beq.n 6c60e │ │ add.w r0, r7, r7, lsl #1 │ │ add.w r6, r8, r0, lsl #2 │ │ ldrd sl, r5, [r6, #4] │ │ cmp r5, #0 │ │ - beq.n 6c4ec │ │ + beq.n 6c5d4 │ │ add.w r4, sl, #8 │ │ ldr r0, [r4, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r4, #24 │ │ subs r5, #1 │ │ - bne.n 6c512 │ │ - b.n 6c4ec │ │ + bne.n 6c5fa │ │ + b.n 6c5d4 │ │ ldr r0, [sp, #28] │ │ - cbz r0, 6c576 │ │ + cbz r0, 6c65e │ │ mov r0, fp │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ mov sl, r1 │ │ subs.w r0, r5, sl │ │ - beq.n 6c562 │ │ + beq.n 6c64a │ │ movw r1, #43691 @ 0xaaab │ │ add.w r5, sl, #8 │ │ movt r1, #43690 @ 0xaaaa │ │ umull r0, r1, r0, r1 │ │ lsrs r4, r1, #4 │ │ ldr r0, [r5, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #24 │ │ subs r4, #1 │ │ - bne.n 6c550 │ │ + bne.n 6c638 │ │ cmp.w r9, #0 │ │ - beq.n 6c56e │ │ + beq.n 6c656 │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r7, [sp, #40] @ 0x28 │ │ ldr r0, [sp, #36] @ 0x24 │ │ cmp r0, #0 │ │ - bne.n 6c4d0 │ │ + bne.n 6c5b8 │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #4 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ - ldr r2, [pc, #20] @ (6c59c ) │ │ + bl 3e2ac │ │ + ldr r2, [pc, #20] @ (6c684 ) │ │ mov r1, r4 │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ cmp r4, #0 │ │ - bne.w 6c2f6 │ │ + bne.w 6c3de │ │ movs r1, #0 │ │ movs r0, #4 │ │ - b.n 6c31e │ │ + b.n 6c406 │ │ nop │ │ - b.n 6bf88 │ │ + b.n 6bec0 │ │ movs r6, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #4 │ │ vpush {d8-d10} │ │ sub sp, #128 @ 0x80 │ │ mov r6, r0 │ │ ldr r0, [sp, #192] @ 0xc0 │ │ cmp r0, #8 │ │ - bne.w 6d398 │ │ + bne.w 6d480 │ │ ldr.w fp, [sp, #200] @ 0xc8 │ │ cmp.w fp, #0 │ │ - beq.w 6d3ae │ │ + beq.w 6d496 │ │ ldr r0, [r3, #4] │ │ mov r7, r2 │ │ ldr r4, [sp, #196] @ 0xc4 │ │ mov r8, r1 │ │ str r0, [sp, #40] @ 0x28 │ │ mov r0, fp │ │ ldr r5, [r3, #0] │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 6d3bc │ │ + beq.w 6d4a4 │ │ mov r1, r4 │ │ mov r2, fp │ │ strd r5, r7, [sp, #28] │ │ mov sl, r0 │ │ str r6, [sp, #36] @ 0x24 │ │ - bl d53c6 │ │ + bl d52ea │ │ cmp.w fp, #1 │ │ - beq.w 6d3e6 │ │ + beq.w 6d4ce │ │ ldrd r4, r6, [r8] │ │ mov.w r7, #2147483648 @ 0x80000000 │ │ ldrh.w r0, [sl] │ │ str r0, [sp, #60] @ 0x3c │ │ ldrd r3, r0, [r6] │ │ ldrd r1, r2, [r4, #4] │ │ str r6, [sp, #24] │ │ str r7, [r6, #0] │ │ str r0, [sp, #0] │ │ add r0, sp, #96 @ 0x60 │ │ - bl 4bac8 │ │ + bl 4bdd0 │ │ ldr.w r0, [r8, #8] │ │ ldr r3, [r4, #8] │ │ ldr r1, [r0, #8] │ │ cmp r1, r3 │ │ it cc │ │ movcc r3, r1 │ │ cmp r3, #0 │ │ - beq.w 6d1d0 │ │ + beq.w 6d2b8 │ │ ldr.w lr, [r0, #4] │ │ mov.w r8, #0 │ │ ldr.w ip, [r4, #4] │ │ add.w r0, sl, #4 │ │ - vldr s16, [pc, #840] @ 6c984 │ │ - vldr d9, [pc, #840] @ 6c988 │ │ + vldr s16, [pc, #840] @ 6ca6c │ │ + vldr d9, [pc, #840] @ 6ca70 │ │ str r0, [sp, #20] │ │ strd ip, r3, [sp, #52] @ 0x34 │ │ strd sl, lr, [sp, #44] @ 0x2c │ │ - b.n 6c65a │ │ + b.n 6c742 │ │ ldr.w sl, [sp, #44] @ 0x2c │ │ add.w r8, r8, #1 │ │ cmp r8, r3 │ │ - beq.w 6d1d0 │ │ + beq.w 6d2b8 │ │ add.w r0, r8, r8, lsl #2 │ │ add.w r4, ip, r0, lsl #3 │ │ ldrb.w r1, [r4, #32] │ │ cmp r1, #14 │ │ - bhi.w 6d336 │ │ + bhi.w 6d41e │ │ add.w r0, lr, r8, lsl #3 │ │ tbh [pc, r1, lsl #1] │ │ movs r7, r1 │ │ lsls r3, r2, #5 │ │ lsls r0, r6, #1 │ │ lsls r1, r1, #2 │ │ lsls r4, r1, #4 │ │ @@ -102426,1366 +102392,1366 @@ │ │ lsls r3, r7, #10 │ │ lsls r1, r7, #8 │ │ lsls r6, r1, #6 │ │ ldrb r1, [r0, #4] │ │ ldr r0, [r0, #0] │ │ subs r1, #1 │ │ cmp r1, #4 │ │ - bhi.w 6ce22 │ │ + bhi.w 6cf0a │ │ tbh [pc, r1, lsl #1] │ │ movs r5, r0 │ │ lsls r7, r5, #14 │ │ lsls r4, r0, #14 │ │ lsls r1, r3, #14 │ │ lsls r6, r4, #13 │ │ ldr r1, [sp, #60] @ 0x3c │ │ cmp r0, r1 │ │ - bcs.w 6cea6 │ │ + bcs.w 6cf8e │ │ cmp fp, r0 │ │ - bls.w 6d3c4 │ │ + bls.w 6d4ac │ │ ldrb.w r6, [sl, r0] │ │ cmp r6, #0 │ │ - bne.w 6ce46 │ │ - b.n 6cea6 │ │ + bne.w 6cf2e │ │ + b.n 6cf8e │ │ ldr r0, [r0, #0] │ │ ldr r1, [sp, #60] @ 0x3c │ │ cmp r0, r1 │ │ - bcs.w 6ccba │ │ + bcs.w 6cda2 │ │ cmp fp, r0 │ │ - bcc.w 6d260 │ │ + bcc.w 6d348 │ │ sub.w r2, fp, r0 │ │ cmp r2, #3 │ │ ittt hi │ │ addhi r1, r0, #4 │ │ subhi.w r2, fp, r1 │ │ cmphi r2, #3 │ │ - bls.w 6d21e │ │ + bls.w 6d306 │ │ ldr.w r7, [sl, r0] │ │ cmp r7, #0 │ │ - beq.w 6ccba │ │ + beq.w 6cda2 │ │ ldr.w r5, [sl, r1] │ │ adds r1, r5, r7 │ │ - bcs.w 6d380 │ │ + bcs.w 6d468 │ │ cmp r1, fp │ │ - bhi.w 6d380 │ │ + bhi.w 6d468 │ │ cmp.w r5, #4294967295 @ 0xffffffff │ │ - ble.w 6d25c │ │ + ble.w 6d344 │ │ cmp r5, #0 │ │ - beq.w 6d090 │ │ + beq.w 6d178 │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 6d3de │ │ + beq.w 6d4c6 │ │ mov r6, r0 │ │ add.w r0, sl, r7 │ │ movs r1, #0 │ │ ldrb r2, [r0, r1] │ │ subs r3, r2, #2 │ │ cmp r2, #0 │ │ clz r3, r3 │ │ mov.w r3, r3, lsr #5 │ │ it eq │ │ moveq r3, #2 │ │ strb r3, [r6, r1] │ │ adds r1, #1 │ │ cmp r5, r1 │ │ - bne.n 6c726 │ │ + bne.n 6c80e │ │ ldr r1, [r4, #28] │ │ add r0, sp, #96 @ 0x60 │ │ mov r2, r6 │ │ mov r3, r5 │ │ - bl 52994 │ │ + bl 52ba4 │ │ mov r0, r6 │ │ - blx d87c0 │ │ - b.n 6ccc6 │ │ + blx d87d0 │ │ + b.n 6cdae │ │ ldr.w sl, [r4, #28] │ │ ldr r0, [r0, #0] │ │ ldr r1, [sp, #60] @ 0x3c │ │ cmp r0, r1 │ │ - bcs.w 6ccce │ │ + bcs.w 6cdb6 │ │ cmp fp, r0 │ │ - bcc.w 6d35c │ │ + bcc.w 6d444 │ │ sub.w r2, fp, r0 │ │ cmp r2, #3 │ │ - bls.w 6d21e │ │ + bls.w 6d306 │ │ ldr r1, [sp, #44] @ 0x2c │ │ ldr.w r9, [r1, r0] │ │ ldr r7, [sp, #104] @ 0x68 │ │ add.w r6, sl, #4 │ │ cmp r6, r7 │ │ - bhi.w 6ccdc │ │ - b.n 6cd0c │ │ + bhi.w 6cdc4 │ │ + b.n 6cdf4 │ │ vmov.f32 s20, s16 │ │ ldr.w r9, [r4, #28] │ │ ldr r0, [r0, #0] │ │ ldr r1, [sp, #60] @ 0x3c │ │ cmp r0, r1 │ │ - bcs.n 6c7ae │ │ + bcs.n 6c896 │ │ cmp fp, r0 │ │ - bcc.w 6d350 │ │ + bcc.w 6d438 │ │ sub.w r2, fp, r0 │ │ cmp r2, #3 │ │ - bls.w 6d21e │ │ + bls.w 6d306 │ │ ldr.w r0, [sl, r0] │ │ vmov s20, r0 │ │ ldr r7, [sp, #104] @ 0x68 │ │ add.w r6, r9, #4 │ │ cmp r6, r7 │ │ - bls.n 6c7e8 │ │ + bls.n 6c8d0 │ │ ldr r0, [sp, #96] @ 0x60 │ │ subs r4, r6, r7 │ │ subs r0, r0, r7 │ │ cmp r4, r0 │ │ - bhi.w 6d106 │ │ + bhi.w 6d1ee │ │ ldr r5, [sp, #100] @ 0x64 │ │ cmp r4, #2 │ │ add.w r0, r5, r7 │ │ - bcc.n 6c7e0 │ │ + bcc.n 6c8c8 │ │ subs r4, #1 │ │ mov r1, r4 │ │ - bl d5370 │ │ + bl d5242 │ │ add r7, r4 │ │ ldrd lr, ip, [sp, #48] @ 0x30 │ │ ldr r3, [sp, #56] @ 0x38 │ │ adds r0, r5, r7 │ │ adds r7, #1 │ │ movs r1, #0 │ │ strb r1, [r0, #0] │ │ str r7, [sp, #104] @ 0x68 │ │ cmn.w r9, #5 │ │ it ls │ │ cmpls r6, r7 │ │ - bhi.w 6d2bc │ │ + bhi.w 6d3a4 │ │ vmov r0, s20 │ │ ldr r1, [sp, #100] @ 0x64 │ │ str.w r0, [r1, r9] │ │ - b.n 6c650 │ │ + b.n 6c738 │ │ vmov.f64 d10, d9 │ │ ldr r5, [r4, #28] │ │ ldr r0, [r0, #0] │ │ ldr r1, [sp, #60] @ 0x3c │ │ cmp r0, r1 │ │ - bcs.n 6c82e │ │ + bcs.n 6c916 │ │ cmp fp, r0 │ │ - bcc.w 6d368 │ │ + bcc.w 6d450 │ │ sub.w r2, fp, r0 │ │ cmp r2, #7 │ │ - bls.w 6d26c │ │ + bls.w 6d354 │ │ ldr.w r1, [sl, r0] │ │ add r0, sl │ │ ldr r0, [r0, #4] │ │ strd r1, r0, [sp, #80] @ 0x50 │ │ vldr d10, [sp, #80] @ 0x50 │ │ ldr r7, [sp, #104] @ 0x68 │ │ add.w r6, r5, #8 │ │ cmp r6, r7 │ │ - bls.n 6c86e │ │ + bls.n 6c956 │ │ ldr r0, [sp, #96] @ 0x60 │ │ sub.w r9, r6, r7 │ │ subs r0, r0, r7 │ │ cmp r9, r0 │ │ - bhi.w 6d12e │ │ + bhi.w 6d216 │ │ ldr r4, [sp, #100] @ 0x64 │ │ cmp.w r9, #2 │ │ add.w r0, r4, r7 │ │ - bcc.n 6c866 │ │ + bcc.n 6c94e │ │ sub.w r9, r9, #1 │ │ mov r1, r9 │ │ - bl d5370 │ │ + bl d5242 │ │ add r7, r9 │ │ ldrd lr, ip, [sp, #48] @ 0x30 │ │ ldr r3, [sp, #56] @ 0x38 │ │ adds r0, r4, r7 │ │ adds r7, #1 │ │ movs r1, #0 │ │ strb r1, [r0, #0] │ │ str r7, [sp, #104] @ 0x68 │ │ cmn.w r5, #9 │ │ it ls │ │ cmpls r6, r7 │ │ - bhi.w 6d24e │ │ + bhi.w 6d336 │ │ ldr r0, [sp, #100] @ 0x64 │ │ vstr d10, [sp, #72] @ 0x48 │ │ ldrd r1, r2, [sp, #72] @ 0x48 │ │ str r1, [r0, r5] │ │ add r0, r5 │ │ str r2, [r0, #4] │ │ - b.n 6c650 │ │ + b.n 6c738 │ │ ldr r5, [r4, #28] │ │ mov.w r9, #0 │ │ ldr r0, [r0, #0] │ │ mov.w sl, #2147483648 @ 0x80000000 │ │ ldr r1, [sp, #60] @ 0x3c │ │ cmp r0, r1 │ │ - bcs.n 6c8ba │ │ + bcs.n 6c9a2 │ │ cmp fp, r0 │ │ - bcc.w 6d344 │ │ + bcc.w 6d42c │ │ ldr r1, [sp, #44] @ 0x2c │ │ sub.w r2, fp, r0 │ │ cmp r2, #7 │ │ - bls.w 6d26c │ │ + bls.w 6d354 │ │ ldr.w r9, [r1, r0] │ │ add r0, r1 │ │ ldr.w sl, [r0, #4] │ │ ldr r7, [sp, #104] @ 0x68 │ │ add.w r6, r5, #8 │ │ cmp r6, r7 │ │ - bls.n 6c900 │ │ + bls.n 6c9e8 │ │ ldr r0, [sp, #96] @ 0x60 │ │ subs r4, r6, r7 │ │ str.w fp, [sp, #16] │ │ subs r0, r0, r7 │ │ cmp r4, r0 │ │ - bhi.w 6d158 │ │ + bhi.w 6d240 │ │ ldr.w fp, [sp, #100] @ 0x64 │ │ cmp r4, #2 │ │ add.w r0, fp, r7 │ │ - bcc.n 6c8f4 │ │ + bcc.n 6c9dc │ │ subs r4, #1 │ │ mov r1, r4 │ │ - bl d5370 │ │ + bl d5242 │ │ add r7, r4 │ │ ldrd lr, ip, [sp, #48] @ 0x30 │ │ ldr r3, [sp, #56] @ 0x38 │ │ add.w r0, fp, r7 │ │ ldr.w fp, [sp, #16] │ │ adds r7, #1 │ │ movs r1, #0 │ │ strb r1, [r0, #0] │ │ str r7, [sp, #104] @ 0x68 │ │ cmn.w r5, #9 │ │ it ls │ │ cmpls r6, r7 │ │ - bhi.w 6d24e │ │ + bhi.w 6d336 │ │ ldr r0, [sp, #100] @ 0x64 │ │ str.w r9, [r0, r5] │ │ add r0, r5 │ │ str.w sl, [r0, #4] │ │ - b.n 6c64c │ │ + b.n 6c734 │ │ ldr r5, [r4, #28] │ │ ldr r0, [r0, #0] │ │ ldr r1, [sp, #60] @ 0x3c │ │ cmp r0, r1 │ │ - bcs.w 6cd20 │ │ + bcs.w 6ce08 │ │ cmp r0, fp │ │ - bcs.w 6d3c4 │ │ + bcs.w 6d4ac │ │ ldrb.w r9, [sl, r0] │ │ ldr r7, [sp, #104] @ 0x68 │ │ add.w sl, r5, #1 │ │ cmp sl, r7 │ │ - bhi.w 6cd2e │ │ - b.n 6cd60 │ │ + bhi.w 6ce16 │ │ + b.n 6ce48 │ │ ldr r1, [r4, #28] │ │ ldr r0, [r0, #0] │ │ ldr r2, [sp, #60] @ 0x3c │ │ cmp r0, r2 │ │ - bcs.w 6cadc │ │ + bcs.w 6cbc4 │ │ cmp fp, r0 │ │ - bcc.w 6d260 │ │ + bcc.w 6d348 │ │ sub.w r2, fp, r0 │ │ cmp r2, #3 │ │ ittt hi │ │ addhi r3, r0, #4 │ │ subhi.w r2, fp, r3 │ │ cmphi r2, #3 │ │ - bls.w 6d21e │ │ + bls.w 6d306 │ │ ldr.w r0, [sl, r0] │ │ cmp r0, #0 │ │ - beq.w 6cadc │ │ + beq.w 6cbc4 │ │ ldr.w r3, [sl, r3] │ │ adds r2, r3, r0 │ │ - bcs.w 6d374 │ │ + bcs.w 6d45c │ │ cmp r2, fp │ │ - bls.w 6cad6 │ │ - b.w 6d374 │ │ + bls.w 6cbbe │ │ + b.w 6d45c │ │ nop │ │ movs r0, r0 │ │ ldrb r0, [r0, #31] │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ ldrb r0, [r7, #31] │ │ ldr r7, [r4, #28] │ │ ldr r0, [r0, #0] │ │ ldr r1, [sp, #60] @ 0x3c │ │ cmp r0, r1 │ │ - bcs.w 6cc68 │ │ + bcs.w 6cd50 │ │ cmp fp, r0 │ │ - bcc.w 6d260 │ │ + bcc.w 6d348 │ │ sub.w r2, fp, r0 │ │ cmp r2, #3 │ │ ittt hi │ │ addhi r1, r0, #4 │ │ subhi.w r2, fp, r1 │ │ cmphi r2, #3 │ │ - bls.w 6d21e │ │ + bls.w 6d306 │ │ ldr.w r5, [sl, r0] │ │ cmp r5, #0 │ │ - beq.w 6cc68 │ │ + beq.w 6cd50 │ │ ldr.w r0, [sl, r1] │ │ movs r2, #0 │ │ add.w r6, r5, r0, lsl #3 │ │ subs r0, r6, r5 │ │ it cc │ │ movcc r0, r2 │ │ lsls r1, r0, #29 │ │ mov.w r9, r0, lsr #3 │ │ mov.w r1, #1 │ │ it ne │ │ addne.w r9, r1, r0, lsr #3 │ │ cmp.w r2, r9, lsr #29 │ │ - bne.w 6d25c │ │ + bne.w 6d344 │ │ movw r0, #65532 @ 0xfffc │ │ mov.w r4, r9, lsl #3 │ │ movt r0, #32767 @ 0x7fff │ │ cmp r4, r0 │ │ - bhi.w 6d25c │ │ + bhi.w 6d344 │ │ cmp r4, #0 │ │ str r7, [sp, #12] │ │ - beq.w 6cef4 │ │ + beq.w 6cfdc │ │ mov r0, r4 │ │ - blx d87f0 │ │ + blx d8810 │ │ ldr r7, [sp, #20] │ │ mov ip, r0 │ │ mov lr, r9 │ │ cmp r0, #0 │ │ - bne.w 6cefe │ │ - b.w 6d3ce │ │ + bne.w 6cfe6 │ │ + b.w 6d4b6 │ │ ldr r7, [r4, #28] │ │ ldr r0, [r0, #0] │ │ ldr r1, [sp, #60] @ 0x3c │ │ cmp r0, r1 │ │ - bcs.w 6cc68 │ │ + bcs.w 6cd50 │ │ cmp fp, r0 │ │ - bcc.w 6d260 │ │ + bcc.w 6d348 │ │ sub.w r2, fp, r0 │ │ cmp r2, #3 │ │ ittt hi │ │ addhi r1, r0, #4 │ │ subhi.w r2, fp, r1 │ │ cmphi r2, #3 │ │ - bls.w 6d21e │ │ + bls.w 6d306 │ │ ldr.w r5, [sl, r0] │ │ cmp r5, #0 │ │ - beq.w 6cc68 │ │ + beq.w 6cd50 │ │ ldr.w r0, [sl, r1] │ │ movs r2, #0 │ │ add.w sl, r5, r0, lsl #2 │ │ subs.w r0, sl, r5 │ │ it cc │ │ movcc r0, r2 │ │ lsls r1, r0, #30 │ │ mov.w r6, r0, lsr #2 │ │ mov.w r1, #1 │ │ it ne │ │ addne.w r6, r1, r0, lsr #2 │ │ cmp.w r2, r6, lsr #30 │ │ - bne.w 6d25c │ │ + bne.w 6d344 │ │ movw r0, #65532 @ 0xfffc │ │ lsls r4, r6, #2 │ │ movt r0, #32767 @ 0x7fff │ │ cmp r4, r0 │ │ - bhi.w 6d25c │ │ + bhi.w 6d344 │ │ cmp r4, #0 │ │ - beq.w 6cf6e │ │ + beq.w 6d056 │ │ mov r0, r4 │ │ - blx d87f0 │ │ + blx d8810 │ │ mov r9, r0 │ │ mov ip, r6 │ │ cmp r0, #0 │ │ - bne.w 6cf76 │ │ - b.w 6d3ce │ │ + bne.w 6d05e │ │ + b.w 6d4b6 │ │ ldr r1, [r4, #28] │ │ ldr r0, [r0, #0] │ │ ldr r2, [sp, #60] @ 0x3c │ │ cmp r0, r2 │ │ - bcs.n 6cadc │ │ + bcs.n 6cbc4 │ │ cmp fp, r0 │ │ - bcc.w 6d260 │ │ + bcc.w 6d348 │ │ sub.w r2, fp, r0 │ │ cmp r2, #3 │ │ ittt hi │ │ addhi r3, r0, #4 │ │ subhi.w r2, fp, r3 │ │ cmphi r2, #3 │ │ - bls.w 6d21e │ │ + bls.w 6d306 │ │ ldr.w r0, [sl, r0] │ │ - cbz r0, 6cadc │ │ + cbz r0, 6cbc4 │ │ ldr.w r3, [sl, r3] │ │ adds r2, r3, r0 │ │ - bcs.w 6d38c │ │ + bcs.w 6d474 │ │ cmp r2, fp │ │ - bhi.w 6d38c │ │ + bhi.w 6d474 │ │ add.w r2, sl, r0 │ │ - b.n 6cade │ │ + b.n 6cbc6 │ │ movs r2, #0 │ │ add r0, sp, #96 @ 0x60 │ │ - bl 52a9c │ │ - b.n 6ccc6 │ │ + bl 52cac │ │ + b.n 6cdae │ │ ldr r7, [r4, #28] │ │ ldr r0, [r0, #0] │ │ ldr r1, [sp, #60] @ 0x3c │ │ cmp r0, r1 │ │ - bcs.w 6cc68 │ │ + bcs.w 6cd50 │ │ cmp fp, r0 │ │ - bcc.w 6d260 │ │ + bcc.w 6d348 │ │ sub.w r2, fp, r0 │ │ cmp r2, #3 │ │ ittt hi │ │ addhi r1, r0, #4 │ │ subhi.w r2, fp, r1 │ │ cmphi r2, #3 │ │ - bls.w 6d21e │ │ + bls.w 6d306 │ │ ldr.w r5, [sl, r0] │ │ cmp r5, #0 │ │ - beq.w 6cc68 │ │ + beq.w 6cd50 │ │ ldr.w r0, [sl, r1] │ │ movs r2, #0 │ │ add.w sl, r5, r0, lsl #3 │ │ subs.w r0, sl, r5 │ │ it cc │ │ movcc r0, r2 │ │ lsls r1, r0, #29 │ │ mov.w r6, r0, lsr #3 │ │ mov.w r1, #1 │ │ it ne │ │ addne.w r6, r1, r0, lsr #3 │ │ cmp.w r2, r6, lsr #29 │ │ - bne.w 6d25c │ │ + bne.w 6d344 │ │ movw r0, #65532 @ 0xfffc │ │ lsls r4, r6, #3 │ │ movt r0, #32767 @ 0x7fff │ │ subs r0, #4 │ │ cmp r4, r0 │ │ - bhi.w 6d25c │ │ + bhi.w 6d344 │ │ cmp r4, #0 │ │ - beq.w 6cfa4 │ │ + beq.w 6d08c │ │ mov r0, r4 │ │ - blx d87f0 │ │ + blx d8810 │ │ mov r9, r0 │ │ mov ip, r6 │ │ cmp r0, #0 │ │ - bne.w 6cfac │ │ - b.w 6d3d6 │ │ + bne.w 6d094 │ │ + b.w 6d4be │ │ ldr r7, [r4, #28] │ │ ldr r0, [r0, #0] │ │ ldr r1, [sp, #60] @ 0x3c │ │ cmp r0, r1 │ │ - bcs.n 6cc68 │ │ + bcs.n 6cd50 │ │ cmp fp, r0 │ │ - bcc.w 6d260 │ │ + bcc.w 6d348 │ │ sub.w r2, fp, r0 │ │ cmp r2, #3 │ │ ittt hi │ │ addhi r1, r0, #4 │ │ subhi.w r2, fp, r1 │ │ cmphi r2, #3 │ │ - bls.w 6d21e │ │ + bls.w 6d306 │ │ ldr.w r5, [sl, r0] │ │ cmp r5, #0 │ │ - beq.n 6cc68 │ │ + beq.n 6cd50 │ │ ldr.w r0, [sl, r1] │ │ movs r2, #0 │ │ add.w sl, r5, r0, lsl #2 │ │ subs.w r0, sl, r5 │ │ it cc │ │ movcc r0, r2 │ │ lsls r1, r0, #30 │ │ mov.w r6, r0, lsr #2 │ │ mov.w r1, #1 │ │ it ne │ │ addne.w r6, r1, r0, lsr #2 │ │ cmp.w r2, r6, lsr #30 │ │ - bne.w 6d25c │ │ + bne.w 6d344 │ │ movw r0, #65532 @ 0xfffc │ │ lsls r4, r6, #2 │ │ movt r0, #32767 @ 0x7fff │ │ cmp r4, r0 │ │ - bhi.w 6d25c │ │ + bhi.w 6d344 │ │ cmp r4, #0 │ │ - beq.w 6cfe8 │ │ + beq.w 6d0d0 │ │ mov r0, r4 │ │ - blx d87f0 │ │ + blx d8810 │ │ mov r9, r0 │ │ mov ip, r6 │ │ cmp r0, #0 │ │ - bne.w 6cff0 │ │ - b.n 6d3ce │ │ + bne.w 6d0d8 │ │ + b.n 6d4b6 │ │ ldr r7, [r4, #28] │ │ ldr r0, [r0, #0] │ │ ldr r1, [sp, #60] @ 0x3c │ │ cmp r0, r1 │ │ - bcs.n 6cc68 │ │ + bcs.n 6cd50 │ │ cmp fp, r0 │ │ - bcc.w 6d260 │ │ + bcc.w 6d348 │ │ sub.w r2, fp, r0 │ │ cmp r2, #3 │ │ ittt hi │ │ addhi r1, r0, #4 │ │ subhi.w r2, fp, r1 │ │ cmphi r2, #3 │ │ - bls.w 6d21e │ │ + bls.w 6d306 │ │ ldr.w r5, [sl, r0] │ │ - cbz r5, 6cc68 │ │ + cbz r5, 6cd50 │ │ ldr.w r0, [sl, r1] │ │ movs r2, #0 │ │ add.w sl, r5, r0, lsl #3 │ │ subs.w r0, sl, r5 │ │ it cc │ │ movcc r0, r2 │ │ lsls r1, r0, #29 │ │ mov.w r6, r0, lsr #3 │ │ mov.w r1, #1 │ │ it ne │ │ addne.w r6, r1, r0, lsr #3 │ │ cmp.w r2, r6, lsr #29 │ │ - bne.w 6d25c │ │ + bne.w 6d344 │ │ movw r0, #65532 @ 0xfffc │ │ lsls r4, r6, #3 │ │ movt r0, #32767 @ 0x7fff │ │ subs r0, #4 │ │ cmp r4, r0 │ │ - bhi.w 6d25c │ │ + bhi.w 6d344 │ │ cmp r4, #0 │ │ - beq.w 6d02c │ │ + beq.w 6d114 │ │ mov r0, r4 │ │ - blx d87f0 │ │ + blx d8810 │ │ mov r9, r0 │ │ mov ip, r6 │ │ cmp r0, #0 │ │ - bne.w 6d034 │ │ - b.n 6d3d6 │ │ + bne.w 6d11c │ │ + b.n 6d4be │ │ ldr r5, [sp, #104] @ 0x68 │ │ adds r0, r7, #3 │ │ cmp r0, r5 │ │ - bls.n 6cca0 │ │ + bls.n 6cd88 │ │ ldr r1, [sp, #96] @ 0x60 │ │ subs r6, r0, r5 │ │ subs r0, r1, r5 │ │ cmp r6, r0 │ │ - bhi.w 6d094 │ │ + bhi.w 6d17c │ │ ldr r4, [sp, #100] @ 0x64 │ │ cmp r6, #2 │ │ add.w r0, r4, r5 │ │ - bcc.n 6cc98 │ │ + bcc.n 6cd80 │ │ subs r6, #1 │ │ mov r1, r6 │ │ - bl d5370 │ │ + bl d5242 │ │ add r5, r6 │ │ ldrd lr, ip, [sp, #48] @ 0x30 │ │ ldr r3, [sp, #56] @ 0x38 │ │ adds r0, r4, r5 │ │ adds r5, #1 │ │ movs r1, #0 │ │ strb r1, [r0, #0] │ │ str r5, [sp, #104] @ 0x68 │ │ cmp r5, r7 │ │ - bcc.w 6d278 │ │ + bcc.w 6d360 │ │ subs r0, r5, r7 │ │ cmp r0, #2 │ │ - bls.w 6d286 │ │ + bls.w 6d36e │ │ ldr r0, [sp, #100] @ 0x64 │ │ movs r1, #0 │ │ strh r1, [r0, r7] │ │ add r0, r7 │ │ strb r1, [r0, #2] │ │ - b.n 6c650 │ │ + b.n 6c738 │ │ movs r2, #0 │ │ ldr r1, [r4, #28] │ │ add r0, sp, #96 @ 0x60 │ │ movs r3, #0 │ │ - bl 52994 │ │ + bl 52ba4 │ │ ldr r3, [sp, #56] @ 0x38 │ │ ldrd lr, ip, [sp, #48] @ 0x30 │ │ - b.n 6c650 │ │ + b.n 6c738 │ │ mov.w r9, #2147483648 @ 0x80000000 │ │ ldr r7, [sp, #104] @ 0x68 │ │ add.w r6, sl, #4 │ │ cmp r6, r7 │ │ - bls.n 6cd0c │ │ + bls.n 6cdf4 │ │ ldr r0, [sp, #96] @ 0x60 │ │ subs r4, r6, r7 │ │ subs r0, r0, r7 │ │ cmp r4, r0 │ │ - bhi.w 6d0e0 │ │ + bhi.w 6d1c8 │ │ ldr r5, [sp, #100] @ 0x64 │ │ cmp r4, #2 │ │ add.w r0, r5, r7 │ │ - bcc.n 6cd04 │ │ + bcc.n 6cdec │ │ subs r4, #1 │ │ mov r1, r4 │ │ - bl d5370 │ │ + bl d5242 │ │ add r7, r4 │ │ ldrd lr, ip, [sp, #48] @ 0x30 │ │ ldr r3, [sp, #56] @ 0x38 │ │ adds r0, r5, r7 │ │ adds r7, #1 │ │ movs r1, #0 │ │ strb r1, [r0, #0] │ │ str r7, [sp, #104] @ 0x68 │ │ cmn.w sl, #5 │ │ it ls │ │ cmpls r6, r7 │ │ - bhi.w 6d2ca │ │ + bhi.w 6d3b2 │ │ ldr r0, [sp, #100] @ 0x64 │ │ str.w r9, [r0, sl] │ │ - b.n 6c64c │ │ + b.n 6c734 │ │ mov.w r9, #0 │ │ ldr r7, [sp, #104] @ 0x68 │ │ add.w sl, r5, #1 │ │ cmp sl, r7 │ │ - bls.n 6cd60 │ │ + bls.n 6ce48 │ │ ldr r0, [sp, #96] @ 0x60 │ │ sub.w r4, sl, r7 │ │ subs r0, r0, r7 │ │ cmp r4, r0 │ │ - bhi.w 6d0ba │ │ + bhi.w 6d1a2 │ │ ldr r6, [sp, #100] @ 0x64 │ │ cmp r4, #2 │ │ add.w r0, r6, r7 │ │ - bcc.n 6cd58 │ │ + bcc.n 6ce40 │ │ subs r4, #1 │ │ mov r1, r4 │ │ - bl d5370 │ │ + bl d5242 │ │ add r7, r4 │ │ ldrd lr, ip, [sp, #48] @ 0x30 │ │ ldr r3, [sp, #56] @ 0x38 │ │ adds r0, r6, r7 │ │ adds r7, #1 │ │ movs r1, #0 │ │ strb r1, [r0, #0] │ │ str r7, [sp, #104] @ 0x68 │ │ cmp r5, r7 │ │ - bcs.w 6d2a0 │ │ + bcs.w 6d388 │ │ ldr r0, [sp, #100] @ 0x64 │ │ strb.w r9, [r0, r5] │ │ - b.n 6c64c │ │ + b.n 6c734 │ │ ldr r1, [sp, #60] @ 0x3c │ │ cmp r0, r1 │ │ - bcs.w 6cea6 │ │ + bcs.w 6cf8e │ │ cmp fp, r0 │ │ - bcc.w 6d368 │ │ + bcc.w 6d450 │ │ sub.w r2, fp, r0 │ │ cmp r2, #7 │ │ - bls.w 6d26c │ │ + bls.w 6d354 │ │ add.w r2, sl, r0 │ │ ldr.w r1, [sl, r0] │ │ ldr r2, [r2, #4] │ │ strd r1, r2, [sp, #64] @ 0x40 │ │ vldr d16, [sp, #64] @ 0x40 │ │ vcmp.f64 d16, d16 │ │ vmrs APSR_nzcv, fpscr │ │ - bvs.w 6cea6 │ │ + bvs.w 6cf8e │ │ vmov r1, r2, d16 │ │ - b.n 6ce44 │ │ + b.n 6cf2c │ │ ldr r1, [sp, #60] @ 0x3c │ │ cmp r0, r1 │ │ - bcs.n 6cea6 │ │ + bcs.n 6cf8e │ │ cmp fp, r0 │ │ - bcc.w 6d350 │ │ + bcc.w 6d438 │ │ sub.w r2, fp, r0 │ │ cmp r2, #3 │ │ - bls.w 6d21e │ │ + bls.w 6d306 │ │ ldr.w r1, [sl, r0] │ │ vmov s0, r1 │ │ vcmp.f32 s0, s0 │ │ vmrs APSR_nzcv, fpscr │ │ - bvc.n 6ce44 │ │ - b.n 6cea6 │ │ + bvc.n 6cf2c │ │ + b.n 6cf8e │ │ ldr r1, [sp, #60] @ 0x3c │ │ cmp r0, r1 │ │ - bcs.n 6cea6 │ │ + bcs.n 6cf8e │ │ cmp fp, r0 │ │ - bcc.w 6d344 │ │ + bcc.w 6d42c │ │ sub.w r2, fp, r0 │ │ cmp r2, #7 │ │ - bls.w 6d26c │ │ + bls.w 6d354 │ │ add.w r2, sl, r0 │ │ ldr.w r1, [sl, r0] │ │ mov.w r7, #2147483648 @ 0x80000000 │ │ ldr r2, [r2, #4] │ │ eors r2, r7 │ │ orrs r2, r1 │ │ - bne.n 6ce44 │ │ - b.n 6cea6 │ │ + bne.n 6cf2c │ │ + b.n 6cf8e │ │ ldr r1, [sp, #60] @ 0x3c │ │ cmp r0, r1 │ │ - bcs.n 6cea6 │ │ + bcs.n 6cf8e │ │ cmp fp, r0 │ │ - bcc.w 6d35c │ │ + bcc.w 6d444 │ │ sub.w r2, fp, r0 │ │ cmp r2, #3 │ │ - bls.w 6d21e │ │ + bls.w 6d306 │ │ ldr.w r1, [sl, r0] │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ - beq.n 6cea6 │ │ - b.n 6ce44 │ │ + beq.n 6cf8e │ │ + b.n 6cf2c │ │ ldr r1, [sp, #60] @ 0x3c │ │ cmp r0, r1 │ │ - bcs.n 6cea6 │ │ + bcs.n 6cf8e │ │ cmp fp, r0 │ │ - bcc.w 6d260 │ │ + bcc.w 6d348 │ │ sub.w r2, fp, r0 │ │ cmp r2, #3 │ │ itt hi │ │ subhi r2, #4 │ │ cmphi r2, #3 │ │ - bls.w 6d21e │ │ + bls.w 6d306 │ │ ldr.w r1, [sl, r0] │ │ - cbz r1, 6cea6 │ │ + cbz r1, 6cf8e │ │ uxtb r6, r1 │ │ cmp fp, r0 │ │ - bls.w 6d3c4 │ │ + bls.w 6d4ac │ │ ldr r5, [r4, #28] │ │ cmp r6, #2 │ │ ldr r7, [sp, #104] @ 0x68 │ │ it ne │ │ movne r6, #1 │ │ add.w r9, r5, #1 │ │ cmp r9, r7 │ │ - bls.n 6ce98 │ │ + bls.n 6cf80 │ │ ldr r0, [sp, #96] @ 0x60 │ │ sub.w sl, r9, r7 │ │ subs r0, r0, r7 │ │ cmp sl, r0 │ │ - bhi.w 6d1a8 │ │ + bhi.w 6d290 │ │ ldr r4, [sp, #100] @ 0x64 │ │ cmp.w sl, #2 │ │ add.w r0, r4, r7 │ │ - bcc.n 6ce8c │ │ + bcc.n 6cf74 │ │ sub.w sl, sl, #1 │ │ mov r1, sl │ │ - bl d5370 │ │ + bl d5242 │ │ add r7, sl │ │ ldrd lr, ip, [sp, #48] @ 0x30 │ │ ldr r3, [sp, #56] @ 0x38 │ │ adds r0, r4, r7 │ │ ldr.w sl, [sp, #44] @ 0x2c │ │ adds r7, #1 │ │ movs r1, #0 │ │ strb r1, [r0, #0] │ │ str r7, [sp, #104] @ 0x68 │ │ cmp r5, r7 │ │ - bcs.w 6d2ae │ │ + bcs.w 6d396 │ │ ldr r0, [sp, #100] @ 0x64 │ │ strb r6, [r0, r5] │ │ - b.w 6c650 │ │ + b.w 6c738 │ │ ldr r5, [r4, #28] │ │ ldr r7, [sp, #104] @ 0x68 │ │ add.w r9, r5, #1 │ │ cmp r9, r7 │ │ - bls.n 6cee4 │ │ + bls.n 6cfcc │ │ ldr r0, [sp, #96] @ 0x60 │ │ sub.w r4, r9, r7 │ │ subs r0, r0, r7 │ │ cmp r4, r0 │ │ - bhi.w 6d182 │ │ + bhi.w 6d26a │ │ ldr r6, [sp, #100] @ 0x64 │ │ cmp r4, #2 │ │ add.w r0, r6, r7 │ │ - bcc.n 6cedc │ │ + bcc.n 6cfc4 │ │ subs r4, #1 │ │ mov r1, r4 │ │ - bl d5370 │ │ + bl d5242 │ │ add r7, r4 │ │ ldrd lr, ip, [sp, #48] @ 0x30 │ │ ldr r3, [sp, #56] @ 0x38 │ │ adds r0, r6, r7 │ │ adds r7, #1 │ │ movs r1, #0 │ │ strb r1, [r0, #0] │ │ str r7, [sp, #104] @ 0x68 │ │ cmp r5, r7 │ │ - bcs.w 6d2ae │ │ + bcs.w 6d396 │ │ ldr r0, [sp, #100] @ 0x64 │ │ movs r1, #0 │ │ strb r1, [r0, r5] │ │ - b.w 6c650 │ │ + b.w 6c738 │ │ mov.w ip, #4 │ │ mov.w lr, #0 │ │ ldr r7, [sp, #20] │ │ cmp r6, r5 │ │ - bls.n 6cf4e │ │ + bls.n 6d036 │ │ sub.w r2, fp, r5 │ │ add.w r3, ip, #4 │ │ mov r4, r9 │ │ - b.n 6cf1e │ │ + b.n 6d006 │ │ movs r0, #0 │ │ strd r0, r6, [r3, #-4] │ │ subs r2, #8 │ │ adds r3, #8 │ │ adds r5, #8 │ │ subs r4, #1 │ │ - beq.n 6cf4e │ │ + beq.n 6d036 │ │ cmp r5, fp │ │ - bhi.w 6d31a │ │ + bhi.w 6d402 │ │ cmp r2, #3 │ │ - bls.w 6d21e │ │ + bls.w 6d306 │ │ subs r6, r2, #4 │ │ cmp r6, #3 │ │ - bls.w 6d328 │ │ + bls.w 6d410 │ │ adds r0, r7, r5 │ │ ldr.w r0, [r0, #-4] │ │ cmp r0, #0 │ │ - beq.n 6cf0e │ │ + beq.n 6cff6 │ │ ldr r6, [r7, r5] │ │ adds r1, r6, r0 │ │ - bcs.w 6d2d8 │ │ + bcs.w 6d3c0 │ │ cmp r1, fp │ │ - bhi.w 6d2d8 │ │ + bhi.w 6d3c0 │ │ add r0, sl │ │ - b.n 6cf10 │ │ + b.n 6cff8 │ │ ldr r1, [sp, #12] │ │ add r0, sp, #96 @ 0x60 │ │ mov r2, ip │ │ mov r3, r9 │ │ mov r4, ip │ │ mov r5, lr │ │ - bl 532f4 │ │ + bl 53504 │ │ ldr r3, [sp, #56] @ 0x38 │ │ cmp r5, #0 │ │ ldrd lr, ip, [sp, #48] @ 0x30 │ │ - beq.w 6c650 │ │ + beq.w 6c738 │ │ mov r0, r4 │ │ - b.n 6d082 │ │ + b.n 6d16a │ │ mov.w r9, #4 │ │ mov.w ip, #0 │ │ cmp sl, r5 │ │ ldr.w sl, [sp, #44] @ 0x2c │ │ - bls.n 6d01c │ │ + bls.n 6d104 │ │ sub.w r2, fp, r5 │ │ mov r0, r6 │ │ mov r1, r9 │ │ cmp r5, fp │ │ - bhi.w 6d2e2 │ │ + bhi.w 6d3ca │ │ cmp r2, #3 │ │ - bls.w 6d21e │ │ + bls.w 6d306 │ │ ldr.w r3, [sl, r5] │ │ subs r2, #4 │ │ adds r5, #4 │ │ str.w r3, [r1], #4 │ │ subs r0, #1 │ │ - bne.n 6cf86 │ │ - b.n 6d01c │ │ + bne.n 6d06e │ │ + b.n 6d104 │ │ mov.w r9, #8 │ │ mov.w ip, #0 │ │ cmp sl, r5 │ │ ldr.w sl, [sp, #44] @ 0x2c │ │ - bls.n 6d066 │ │ + bls.n 6d14e │ │ sub.w r2, fp, r5 │ │ mov r0, r6 │ │ mov r1, r9 │ │ cmp r5, fp │ │ - bhi.w 6d30c │ │ + bhi.w 6d3f4 │ │ cmp r2, #7 │ │ - bls.w 6d26c │ │ + bls.w 6d354 │ │ add.w r4, sl, r5 │ │ ldr.w r3, [sl, r5] │ │ subs r2, #8 │ │ ldr r4, [r4, #4] │ │ adds r5, #8 │ │ subs r0, #1 │ │ strd r3, r4, [sp, #88] @ 0x58 │ │ vldr d16, [sp, #88] @ 0x58 │ │ vstmia r1!, {d16} │ │ - bne.n 6cfbc │ │ - b.n 6d066 │ │ + bne.n 6d0a4 │ │ + b.n 6d14e │ │ mov.w r9, #4 │ │ mov.w ip, #0 │ │ cmp sl, r5 │ │ ldr.w sl, [sp, #44] @ 0x2c │ │ - bls.n 6d01c │ │ + bls.n 6d104 │ │ sub.w r2, fp, r5 │ │ mov r0, r6 │ │ mov r1, r9 │ │ cmp r5, fp │ │ - bhi.w 6d2f0 │ │ + bhi.w 6d3d8 │ │ cmp r2, #3 │ │ - bls.w 6d21e │ │ + bls.w 6d306 │ │ ldr.w r3, [sl, r5] │ │ subs r2, #4 │ │ adds r5, #4 │ │ str.w r3, [r1], #4 │ │ subs r0, #1 │ │ - bne.n 6d000 │ │ + bne.n 6d0e8 │ │ add r0, sp, #96 @ 0x60 │ │ mov r1, r7 │ │ mov r2, r9 │ │ mov r3, r6 │ │ mov r4, ip │ │ - bl 52d10 │ │ - b.n 6d074 │ │ + bl 52f20 │ │ + b.n 6d15c │ │ mov.w r9, #8 │ │ mov.w ip, #0 │ │ cmp sl, r5 │ │ ldr.w sl, [sp, #44] @ 0x2c │ │ - bls.n 6d066 │ │ + bls.n 6d14e │ │ sub.w r2, fp, r5 │ │ mov r0, r6 │ │ mov r1, r9 │ │ cmp r5, fp │ │ - bhi.w 6d2fe │ │ + bhi.w 6d3e6 │ │ cmp r2, #7 │ │ - bls.w 6d26c │ │ + bls.w 6d354 │ │ add.w r4, sl, r5 │ │ ldr.w r3, [sl, r5] │ │ subs r2, #8 │ │ ldr r4, [r4, #4] │ │ adds r5, #8 │ │ subs r0, #1 │ │ strd r3, r4, [r1], #8 │ │ - bne.n 6d044 │ │ + bne.n 6d12c │ │ add r0, sp, #96 @ 0x60 │ │ mov r1, r7 │ │ mov r2, r9 │ │ mov r3, r6 │ │ mov r4, ip │ │ - bl 52f90 │ │ + bl 531a0 │ │ ldr r3, [sp, #56] @ 0x38 │ │ cmp r4, #0 │ │ ldrd lr, ip, [sp, #48] @ 0x30 │ │ - beq.w 6c650 │ │ + beq.w 6c738 │ │ mov r0, r9 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrd lr, ip, [sp, #48] @ 0x30 │ │ ldr r3, [sp, #56] @ 0x38 │ │ - b.w 6c650 │ │ + b.w 6c738 │ │ movs r2, #1 │ │ - b.n 6ccbc │ │ + b.n 6cda4 │ │ movs r0, #1 │ │ mov r1, r5 │ │ str r0, [sp, #0] │ │ add r0, sp, #96 @ 0x60 │ │ mov r2, r6 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd lr, ip, [sp, #48] @ 0x30 │ │ ldr r3, [sp, #56] @ 0x38 │ │ ldr r5, [sp, #104] @ 0x68 │ │ ldr r4, [sp, #100] @ 0x64 │ │ cmp r6, #2 │ │ add.w r0, r4, r5 │ │ - bcs.w 6cc86 │ │ - b.n 6cc98 │ │ + bcs.w 6cd6e │ │ + b.n 6cd80 │ │ movs r0, #1 │ │ mov r1, r7 │ │ str r0, [sp, #0] │ │ add r0, sp, #96 @ 0x60 │ │ mov r2, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd lr, ip, [sp, #48] @ 0x30 │ │ ldr r3, [sp, #56] @ 0x38 │ │ ldr r7, [sp, #104] @ 0x68 │ │ ldr r6, [sp, #100] @ 0x64 │ │ cmp r4, #2 │ │ add.w r0, r6, r7 │ │ - bcs.w 6cd46 │ │ - b.n 6cd58 │ │ + bcs.w 6ce2e │ │ + b.n 6ce40 │ │ movs r0, #1 │ │ mov r1, r7 │ │ str r0, [sp, #0] │ │ add r0, sp, #96 @ 0x60 │ │ mov r2, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd lr, ip, [sp, #48] @ 0x30 │ │ ldr r3, [sp, #56] @ 0x38 │ │ ldr r7, [sp, #104] @ 0x68 │ │ ldr r5, [sp, #100] @ 0x64 │ │ cmp r4, #2 │ │ add.w r0, r5, r7 │ │ - bcs.w 6ccf2 │ │ - b.n 6cd04 │ │ + bcs.w 6cdda │ │ + b.n 6cdec │ │ movs r0, #1 │ │ mov r1, r7 │ │ str r0, [sp, #0] │ │ add r0, sp, #96 @ 0x60 │ │ mov r2, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd lr, ip, [sp, #48] @ 0x30 │ │ ldr r3, [sp, #56] @ 0x38 │ │ ldr r7, [sp, #104] @ 0x68 │ │ ldr r5, [sp, #100] @ 0x64 │ │ cmp r4, #2 │ │ add.w r0, r5, r7 │ │ - bcs.w 6c7ce │ │ - b.w 6c7e0 │ │ + bcs.w 6c8b6 │ │ + b.w 6c8c8 │ │ movs r0, #1 │ │ mov r1, r7 │ │ str r0, [sp, #0] │ │ add r0, sp, #96 @ 0x60 │ │ mov r2, r9 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd lr, ip, [sp, #48] @ 0x30 │ │ ldr r3, [sp, #56] @ 0x38 │ │ ldr r7, [sp, #104] @ 0x68 │ │ ldr r4, [sp, #100] @ 0x64 │ │ cmp.w r9, #2 │ │ add.w r0, r4, r7 │ │ - bcs.w 6c852 │ │ - b.w 6c866 │ │ + bcs.w 6c93a │ │ + b.w 6c94e │ │ movs r0, #1 │ │ mov r1, r7 │ │ str r0, [sp, #0] │ │ add r0, sp, #96 @ 0x60 │ │ mov r2, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd lr, ip, [sp, #48] @ 0x30 │ │ ldr r3, [sp, #56] @ 0x38 │ │ ldr r7, [sp, #104] @ 0x68 │ │ ldr.w fp, [sp, #100] @ 0x64 │ │ cmp r4, #2 │ │ add.w r0, fp, r7 │ │ - bcs.w 6c8e0 │ │ - b.w 6c8f4 │ │ + bcs.w 6c9c8 │ │ + b.w 6c9dc │ │ movs r0, #1 │ │ mov r1, r7 │ │ str r0, [sp, #0] │ │ add r0, sp, #96 @ 0x60 │ │ mov r2, r4 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd lr, ip, [sp, #48] @ 0x30 │ │ ldr r3, [sp, #56] @ 0x38 │ │ ldr r7, [sp, #104] @ 0x68 │ │ ldr r6, [sp, #100] @ 0x64 │ │ cmp r4, #2 │ │ add.w r0, r6, r7 │ │ - bcs.w 6ceca │ │ - b.n 6cedc │ │ + bcs.w 6cfb2 │ │ + b.n 6cfc4 │ │ movs r0, #1 │ │ mov r1, r7 │ │ str r0, [sp, #0] │ │ add r0, sp, #96 @ 0x60 │ │ mov r2, sl │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldrd lr, ip, [sp, #48] @ 0x30 │ │ ldr r3, [sp, #56] @ 0x38 │ │ ldr r7, [sp, #104] @ 0x68 │ │ ldr r4, [sp, #100] @ 0x64 │ │ cmp.w sl, #2 │ │ add.w r0, r4, r7 │ │ - bcs.w 6ce78 │ │ - b.n 6ce8c │ │ + bcs.w 6cf60 │ │ + b.n 6cf74 │ │ ldr r2, [sp, #104] @ 0x68 │ │ cmp r2, #1 │ │ - bls.n 6d294 │ │ + bls.n 6d37c │ │ ldr r4, [sp, #100] @ 0x64 │ │ ldr r0, [sp, #40] @ 0x28 │ │ strd r4, r2, [sp] │ │ ldrd r2, r1, [sp, #28] │ │ eor.w r3, r0, #2147483648 @ 0x80000000 │ │ add r0, sp, #112 @ 0x70 │ │ - bl 4fcfc │ │ + bl 4ff0c │ │ movw r1, #65532 @ 0xfffc │ │ ldr r0, [sp, #112] @ 0x70 │ │ movt r1, #32767 @ 0x7fff │ │ add.w r5, r1, #21 │ │ cmp r0, r5 │ │ - bne.n 6d22a │ │ + bne.n 6d312 │ │ ldr r6, [sp, #24] │ │ movs r7, #0 │ │ ldrd r1, r2, [sp, #96] @ 0x60 │ │ ldrd r3, r0, [r6] │ │ stmia r6!, {r1, r2, r7} │ │ lsls r1, r3, #1 │ │ it ne │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r1, [sp, #36] @ 0x24 │ │ movs r0, #1 │ │ str r5, [r1, #0] │ │ strb r0, [r1, #4] │ │ - b.n 6d23c │ │ - ldr r3, [pc, #476] @ (6d3fc ) │ │ + b.n 6d324 │ │ + ldr r3, [pc, #476] @ (6d4e4 ) │ │ movs r0, #0 │ │ movs r1, #4 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ add r3, sp, #112 @ 0x70 │ │ ldr r7, [sp, #96] @ 0x60 │ │ ldr r6, [sp, #36] @ 0x24 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia r6!, {r0, r1, r2, r3} │ │ - cbz r7, 6d23c │ │ + cbz r7, 6d324 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, sl │ │ add sp, #128 @ 0x80 │ │ vpop {d8-d10} │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ - ldr r3, [pc, #444] @ (6d40c ) │ │ + b.w d871c │ │ + ldr r3, [pc, #444] @ (6d4f4 ) │ │ mov r0, r5 │ │ add r3, pc │ │ mov r1, r6 │ │ mov r2, r7 │ │ - bl 3f9a8 │ │ - bl 3e03c │ │ - ldr r3, [pc, #412] @ (6d400 ) │ │ + bl 3fcb0 │ │ + bl 3e344 │ │ + ldr r3, [pc, #412] @ (6d4e8 ) │ │ add r3, pc │ │ mov r1, fp │ │ mov r2, fp │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #468] @ (6d444 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #468] @ (6d52c ) │ │ movs r0, #0 │ │ movs r1, #8 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #424] @ (6d424 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #424] @ (6d50c ) │ │ mov r0, r7 │ │ mov r1, r5 │ │ mov r2, r5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #404] @ (6d41c ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #404] @ (6d504 ) │ │ movs r1, #37 @ 0x25 │ │ - ldr r2, [pc, #404] @ (6d420 ) │ │ + ldr r2, [pc, #404] @ (6d508 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r3, [pc, #424] @ (6d440 ) │ │ + bl 3fd54 │ │ + ldr r3, [pc, #424] @ (6d528 ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #468] @ (6d478 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #468] @ (6d560 ) │ │ mov r0, r5 │ │ mov r1, sl │ │ mov r2, r7 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #452] @ (6d474 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #452] @ (6d55c ) │ │ mov r0, r5 │ │ mov r1, r9 │ │ mov r2, r7 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #328] @ (6d408 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #328] @ (6d4f0 ) │ │ mov r0, r9 │ │ add r3, pc │ │ mov r1, r6 │ │ mov r2, r7 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #312] @ (6d404 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #312] @ (6d4ec ) │ │ mov r0, sl │ │ add r3, pc │ │ mov r1, r6 │ │ mov r2, r7 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #404] @ (6d470 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #404] @ (6d558 ) │ │ mov r2, fp │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #308] @ (6d418 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #308] @ (6d500 ) │ │ mov r0, r5 │ │ add r3, pc │ │ mov r1, fp │ │ mov r2, fp │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #360] @ (6d45c ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #360] @ (6d544 ) │ │ mov r0, r5 │ │ add r3, pc │ │ mov r1, fp │ │ mov r2, fp │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #352] @ (6d460 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #352] @ (6d548 ) │ │ mov r0, r5 │ │ add r3, pc │ │ mov r1, fp │ │ mov r2, fp │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #340] @ (6d464 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #340] @ (6d54c ) │ │ mov r0, r5 │ │ add r3, pc │ │ mov r1, fp │ │ mov r2, fp │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #332] @ (6d468 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #332] @ (6d550 ) │ │ mov r0, r5 │ │ add r3, pc │ │ mov r1, fp │ │ mov r2, fp │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #320] @ (6d46c ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #320] @ (6d554 ) │ │ movs r0, #0 │ │ movs r1, #4 │ │ mov r2, r6 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #188] @ (6d3f4 ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #188] @ (6d4dc ) │ │ movs r1, #40 @ 0x28 │ │ - ldr r2, [pc, #188] @ (6d3f8 ) │ │ + ldr r2, [pc, #188] @ (6d4e0 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r3, [pc, #264] @ (6d450 ) │ │ + bl 3fd54 │ │ + ldr r3, [pc, #264] @ (6d538 ) │ │ add r3, pc │ │ mov r1, fp │ │ mov r2, fp │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #248] @ (6d44c ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #248] @ (6d534 ) │ │ add r3, pc │ │ mov r1, fp │ │ mov r2, fp │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #232] @ (6d448 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #232] @ (6d530 ) │ │ add r3, pc │ │ mov r1, fp │ │ mov r2, fp │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #232] @ (6d454 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #232] @ (6d53c ) │ │ add r3, pc │ │ mov r1, fp │ │ mov r2, fp │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #152] @ (6d410 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #152] @ (6d4f8 ) │ │ add r3, pc │ │ mov r1, r2 │ │ mov r2, fp │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #212] @ (6d458 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #212] @ (6d540 ) │ │ mov r0, r7 │ │ mov r2, fp │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #132] @ (6d414 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #132] @ (6d4fc ) │ │ add r3, pc │ │ mov r1, r2 │ │ mov r2, fp │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #144] @ (6d42c ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #144] @ (6d514 ) │ │ add r2, sp, #112 @ 0x70 │ │ - ldr r3, [pc, #144] @ (6d430 ) │ │ - ldr r1, [pc, #148] @ (6d434 ) │ │ + ldr r3, [pc, #144] @ (6d518 ) │ │ + ldr r1, [pc, #148] @ (6d51c ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ - ldr r3, [pc, #136] @ (6d438 ) │ │ + bl 417b8 │ │ + ldr r3, [pc, #136] @ (6d520 ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ movs r2, #0 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ movs r0, #1 │ │ mov r1, fp │ │ - bl 3dfa4 │ │ - ldr r2, [pc, #96] @ (6d428 ) │ │ + bl 3e2ac │ │ + ldr r2, [pc, #96] @ (6d510 ) │ │ mov r1, fp │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ movs r0, #4 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #8 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ - ldr r3, [pc, #84] @ (6d43c ) │ │ + bl 3e2ac │ │ + ldr r3, [pc, #84] @ (6d524 ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ movs r2, #1 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - stmia r1!, {r0, r4} │ │ - vqrdmulh.s , q13, d14[0] │ │ - movs r6, r0 │ │ - bhi.n 6d430 │ │ + bl 3fcb0 │ │ + stmia r0!, {r0, r3, r5} │ │ + @ instruction: 0xfffadcf6 │ │ movs r6, r0 │ │ - bgt.n 6d358 │ │ + bvc.n 6d568 │ │ movs r6, r0 │ │ - ble.n 6d4e4 │ │ + blt.n 6d490 │ │ movs r6, r0 │ │ - ble.n 6d504 │ │ + bgt.n 6d41c │ │ movs r6, r0 │ │ - ble.n 6d3e4 │ │ + bgt.n 6d43c │ │ movs r6, r0 │ │ - blt.n 6d4e0 │ │ + ble.n 6d51c │ │ movs r6, r0 │ │ - blt.n 6d474 │ │ + bge.n 6d418 │ │ movs r6, r0 │ │ - blt.n 6d3a8 │ │ + bge.n 6d5ac │ │ movs r6, r0 │ │ - str r3, [sp, #376] @ 0x178 │ │ - vrintp.f32 d29, d14 │ │ + bge.n 6d4e0 │ │ movs r6, r0 │ │ - ble.n 6d3c0 │ │ + str r2, [sp, #472] @ 0x1d8 │ │ + vqshlu.s64 d29, d22, #58 @ 0x3a │ │ movs r6, r0 │ │ - blt.n 6d4d4 │ │ + bgt.n 6d4f8 │ │ movs r6, r0 │ │ - stmia r0!, {r0, r1, r5, r6, r7} │ │ - vrintz.f32 d29, d26 │ │ + bge.n 6d60c │ │ movs r6, r0 │ │ - bvs.n 6d3c8 │ │ + ittet │ │ + vrintx.f32 d29, d18 @ │ │ + mov r6, r0 │ │ + bpl.n 6d500 @ unpredictable │ │ + mov r6, r0 │ │ + bpl.n 6d460 │ │ movs r6, r0 │ │ - bvs.n 6d528 │ │ + bpl.n 6d5f4 │ │ movs r6, r0 │ │ - bvs.n 6d4bc │ │ + bvs.n 6d4a0 │ │ movs r6, r0 │ │ - bvc.n 6d368 │ │ + bvc.n 6d534 │ │ movs r6, r0 │ │ - bvc.n 6d3fc │ │ + bge.n 6d520 │ │ movs r6, r0 │ │ - blt.n 6d3e8 │ │ + bge.n 6d5fc │ │ movs r6, r0 │ │ - blt.n 6d4c4 │ │ + blt.n 6d578 │ │ movs r6, r0 │ │ - blt.n 6d440 │ │ + bge.n 6d5f4 │ │ movs r6, r0 │ │ - blt.n 6d4bc │ │ + bge.n 6d600 │ │ movs r6, r0 │ │ - blt.n 6d4c8 │ │ + blt.n 6d588 │ │ movs r6, r0 │ │ - blt.n 6d450 │ │ + bge.n 6d530 │ │ movs r6, r0 │ │ - blt.n 6d3f8 │ │ + blt.n 6d578 │ │ movs r6, r0 │ │ - blt.n 6d440 │ │ + blt.n 6d580 │ │ movs r6, r0 │ │ - blt.n 6d448 │ │ + bvs.n 6d5c0 │ │ movs r6, r0 │ │ - bvc.n 6d488 │ │ + blt.n 6d5ac │ │ movs r6, r0 │ │ - bgt.n 6d474 │ │ + bgt.n 6d4bc │ │ movs r6, r0 │ │ - ble.n 6d384 │ │ - movs r6, r0 │ │ - ble.n 6d3a4 │ │ + bgt.n 6d4dc │ │ movs r6, r0 │ │ ldrd r0, r2, [r1] │ │ - ldr r1, [pc, #8] @ (6d48c ) │ │ + ldr r1, [pc, #8] @ (6d574 ) │ │ ldr r3, [r2, #12] │ │ movs r2, #13 │ │ add r1, pc │ │ bx r3 │ │ nop │ │ - ldrh r2, [r2, #48] @ 0x30 │ │ + ldrh r2, [r5, #40] @ 0x28 │ │ vsli.32 d27, d0, #26 │ │ sub sp, #24 │ │ mov r4, r0 │ │ movs r0, #0 │ │ movs r1, #1 │ │ str r0, [sp, #16] │ │ strd r0, r1, [sp, #8] │ │ add r0, sp, #8 │ │ str r1, [sp, #0] │ │ movs r1, #0 │ │ movs r2, #6 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ add r2, sp, #8 │ │ ldmia r2, {r0, r1, r2} │ │ adds r3, r2, #6 │ │ stmia r4!, {r0, r1, r3} │ │ movw r0, #25459 @ 0x6373 │ │ movt r0, #25960 @ 0x6568 │ │ str r0, [r1, r2] │ │ @@ -103798,86 +103764,86 @@ │ │ sub sp, #16 │ │ ldrd r0, r4, [r0] │ │ movs r3, #0 │ │ ldr r2, [r0, #0] │ │ str r3, [r0, #0] │ │ ldr r1, [r2, #16] │ │ str r3, [r2, #16] │ │ - cbz r1, 6d500 │ │ + cbz r1, 6d5e8 │ │ mov r0, sp │ │ blx r1 │ │ ldr r0, [r4, #0] │ │ ldr r1, [r0, #0] │ │ lsls r1, r1, #1 │ │ - beq.n 6d4f4 │ │ + beq.n 6d5dc │ │ ldr r0, [r0, #4] │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [r4, #0] │ │ ldmia.w sp, {r1, r2, r3} │ │ stmia r0!, {r1, r2, r3} │ │ movs r0, #1 │ │ add sp, #16 │ │ pop {r4, pc} │ │ - ldr r0, [pc, #12] @ (6d510 ) │ │ + ldr r0, [pc, #12] @ (6d5f8 ) │ │ movs r1, #85 @ 0x55 │ │ - ldr r2, [pc, #12] @ (6d514 ) │ │ + ldr r2, [pc, #12] @ (6d5fc ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ nop │ │ - ldr r3, [sp, #36] @ 0x24 │ │ - vcvt.u16.f16 , q6, #6 │ │ + ldr r2, [sp, #132] @ 0x84 │ │ + vmull.u , d26, d4 │ │ movs r6, r0 │ │ push {r4, lr} │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [r0, #0] │ │ movs r3, #0 │ │ ldr r2, [r0, #0] │ │ str r3, [r0, #0] │ │ ldr r1, [r2, #16] │ │ str r3, [r2, #16] │ │ - cbz r1, 6d54e │ │ + cbz r1, 6d636 │ │ mov r0, sp │ │ blx r1 │ │ ldr r4, [r4, #4] │ │ ldr r0, [r4, #0] │ │ ldr r1, [r0, #0] │ │ lsls r1, r1, #1 │ │ - beq.n 6d542 │ │ + beq.n 6d62a │ │ ldr r0, [r0, #4] │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [r4, #0] │ │ ldmia.w sp, {r1, r2, r3} │ │ stmia r0!, {r1, r2, r3} │ │ movs r0, #1 │ │ add sp, #16 │ │ pop {r4, pc} │ │ - ldr r0, [pc, #12] @ (6d55c ) │ │ + ldr r0, [pc, #12] @ (6d644 ) │ │ movs r1, #85 @ 0x55 │ │ - ldr r2, [pc, #12] @ (6d560 ) │ │ + ldr r2, [pc, #12] @ (6d648 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ - ldr r2, [sp, #748] @ 0x2ec │ │ - @ instruction: 0xfffadd0e │ │ + bl 3fd60 │ │ + ldr r1, [sp, #844] @ 0x34c │ │ + vcvt.f16.u16 d29, d22, #6 │ │ movs r6, r0 │ │ push {r4, lr} │ │ sub sp, #24 │ │ mov r4, r0 │ │ movs r0, #0 │ │ movs r1, #1 │ │ str r0, [sp, #16] │ │ strd r0, r1, [sp, #8] │ │ add r0, sp, #8 │ │ str r1, [sp, #0] │ │ movs r1, #0 │ │ movs r2, #7 │ │ movs r3, #1 │ │ - bl 4eddc │ │ + bl 4efec │ │ add r2, sp, #8 │ │ ldmia r2, {r0, r1, r2} │ │ adds r3, r2, #7 │ │ stmia r4!, {r0, r1, r3} │ │ movw r0, #25974 @ 0x6576 │ │ movt r0, #29554 @ 0x7372 │ │ str r0, [r1, r2] │ │ @@ -103887,1259 +103853,1259 @@ │ │ str.w r1, [r0, #3] │ │ add sp, #24 │ │ pop {r4, pc} │ │ ldr r1, [r0, #0] │ │ cmp r1, #0 │ │ itt ne │ │ ldrne r0, [r0, #4] │ │ - bne.w d870c │ │ + bne.w d871c │ │ bx lr │ │ push {r4, lr} │ │ sub sp, #16 │ │ mov ip, r1 │ │ - ldr r1, [pc, #32] @ (6d5dc ) │ │ - ldr r3, [pc, #32] @ (6d5e0 ) │ │ + ldr r1, [pc, #32] @ (6d6c4 ) │ │ + ldr r3, [pc, #32] @ (6d6c8 ) │ │ add r2, sp, #12 │ │ - ldr r4, [pc, #32] @ (6d5e4 ) │ │ + ldr r4, [pc, #32] @ (6d6cc ) │ │ add r1, pc │ │ add r3, pc │ │ str r0, [sp, #12] │ │ add r4, pc │ │ strd r2, r4, [sp] │ │ add.w r2, r0, #12 │ │ mov r0, ip │ │ - bl 40df8 │ │ + bl 41100 │ │ add sp, #16 │ │ pop {r4, pc} │ │ - ldrh r6, [r0, #46] @ 0x2e │ │ - @ instruction: 0xfffa9eb1 │ │ + ldrh r6, [r3, #38] @ 0x26 │ │ + @ instruction: 0xfffa9dfd │ │ vshr.u32 d16, d13, #5 │ │ movs r0, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #36 @ 0x24 │ │ mov r4, r1 │ │ ldr r1, [r0, #0] │ │ ldrd r0, r2, [r4] │ │ ldr r3, [r2, #12] │ │ movs r2, #1 │ │ ldrd r5, r7, [r1, #4] │ │ - ldr r1, [pc, #276] @ (6d714 ) │ │ + ldr r1, [pc, #276] @ (6d7fc ) │ │ add r1, pc │ │ blx r3 │ │ cmp r7, #0 │ │ - beq.n 6d6f6 │ │ - cbz r0, 6d60e │ │ + beq.n 6d7de │ │ + cbz r0, 6d6f6 │ │ movs r0, #1 │ │ - b.n 6d674 │ │ + b.n 6d75c │ │ ldrb r0, [r4, #10] │ │ lsls r0, r0, #24 │ │ - bmi.n 6d61e │ │ + bmi.n 6d706 │ │ mov r0, r5 │ │ mov r1, r4 │ │ - bl 271a8 │ │ - b.n 6d674 │ │ + bl 271dc │ │ + b.n 6d75c │ │ ldrd r8, r6, [r4] │ │ movs r2, #1 │ │ ldr r3, [r6, #12] │ │ mov.w r9, #1 │ │ - ldr r1, [pc, #236] @ (6d718 ) │ │ + ldr r1, [pc, #236] @ (6d800 ) │ │ mov r0, r8 │ │ add r1, pc │ │ blx r3 │ │ mov r1, r0 │ │ mov r0, r9 │ │ - cbnz r1, 6d674 │ │ - ldr r1, [pc, #224] @ (6d71c ) │ │ + cbnz r1, 6d75c │ │ + ldr r1, [pc, #224] @ (6d804 ) │ │ add.w r2, sp, #19 │ │ str r2, [sp, #12] │ │ add r1, pc │ │ str r1, [sp, #24] │ │ add r1, sp, #4 │ │ strb.w r0, [sp, #19] │ │ ldrd r0, r2, [r4, #8] │ │ str r1, [sp, #20] │ │ add r1, sp, #20 │ │ strd r0, r2, [sp, #28] │ │ mov r0, r5 │ │ str r6, [sp, #8] │ │ str.w r8, [sp, #4] │ │ - bl 271a8 │ │ + bl 271dc │ │ cmp r0, #0 │ │ - bne.n 6d60a │ │ + bne.n 6d6f2 │ │ ldrd r0, r1, [sp, #20] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #176] @ (6d720 ) │ │ + ldr r1, [pc, #176] @ (6d808 ) │ │ add r1, pc │ │ blx r3 │ │ subs r7, #1 │ │ - beq.n 6d6f6 │ │ - ldr r1, [pc, #168] @ (6d724 ) │ │ + beq.n 6d7de │ │ + ldr r1, [pc, #168] @ (6d80c ) │ │ adds r5, #1 │ │ add.w fp, sp, #4 │ │ add.w r8, sp, #20 │ │ add r1, pc │ │ mov r9, r1 │ │ - ldr r1, [pc, #156] @ (6d728 ) │ │ + ldr r1, [pc, #156] @ (6d810 ) │ │ add r1, pc │ │ mov sl, r1 │ │ - b.n 6d698 │ │ + b.n 6d780 │ │ movs r0, #1 │ │ adds r5, #1 │ │ subs r7, #1 │ │ - beq.n 6d6f6 │ │ + beq.n 6d7de │ │ lsls r0, r0, #31 │ │ - bne.n 6d690 │ │ + bne.n 6d778 │ │ ldrb r0, [r4, #10] │ │ lsls r0, r0, #24 │ │ - bmi.n 6d6bc │ │ + bmi.n 6d7a4 │ │ ldrd r0, r1, [r4] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ mov r1, r9 │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.n 6d690 │ │ + bne.n 6d778 │ │ mov r0, r5 │ │ mov r1, r4 │ │ - bl 271a8 │ │ - b.n 6d692 │ │ + bl 271dc │ │ + b.n 6d77a │ │ ldmia.w r4, {r0, r1, r2, r3} │ │ movs r6, #1 │ │ add.w ip, sp, #4 │ │ strb.w r6, [sp, #19] │ │ add.w r6, sp, #19 │ │ stmia.w ip, {r0, r1, r6} │ │ mov r0, r5 │ │ mov r1, r8 │ │ strd fp, sl, [sp, #20] │ │ strd r2, r3, [sp, #28] │ │ - bl 271a8 │ │ + bl 271dc │ │ cmp r0, #0 │ │ - bne.n 6d690 │ │ + bne.n 6d778 │ │ ldrd r0, r1, [sp, #20] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #60] @ (6d72c ) │ │ + ldr r1, [pc, #60] @ (6d814 ) │ │ add r1, pc │ │ blx r3 │ │ - b.n 6d692 │ │ - cbz r0, 6d700 │ │ + b.n 6d77a │ │ + cbz r0, 6d7e8 │ │ movs r0, #1 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd r0, r1, [r4] │ │ movs r2, #1 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #36] @ (6d730 ) │ │ + ldr r1, [pc, #36] @ (6d818 ) │ │ add r1, pc │ │ blx r3 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r4, [sp, #484] @ 0x1e4 │ │ - @ instruction: 0xfffaafdc │ │ - @ instruction: 0xfffacfdc │ │ - movs r6, r0 │ │ - strh r4, [r7, r6] │ │ - vcvt.u16.f16 , , #6 │ │ - @ instruction: 0xfffacf92 │ │ + ldr r3, [sp, #576] @ 0x240 │ │ + @ instruction: 0xfffaaef4 │ │ + @ instruction: 0xfffacf04 │ │ movs r6, r0 │ │ - strh r4, [r7, r4] │ │ - @ instruction: 0xfffa9b70 │ │ + strh r4, [r2, r3] │ │ + vcvt.f16.u16 , q10, #6 │ │ + @ instruction: 0xfffaceba │ │ + movs r6, r0 │ │ + strh r4, [r2, r1] │ │ + vtbl.8 d25, {d26-d28}, d7 │ │ vtbl.8 d30, {d10-d11}, d29 │ │ - ldr r7, [pc, #960] @ (6daf8 ) │ │ + ldr r7, [pc, #960] @ (6dbe0 ) │ │ sub sp, #132 @ 0x84 │ │ mov r4, r1 │ │ mov r7, r0 │ │ movs r0, #0 │ │ movs r1, #4 │ │ str r0, [sp, #52] @ 0x34 │ │ movs r6, #5 │ │ strd r0, r1, [sp, #44] @ 0x2c │ │ movs r0, #5 │ │ str r2, [sp, #20] │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 6dbfe │ │ + beq.w 6dce6 │ │ mov r5, r0 │ │ movs r0, #111 @ 0x6f │ │ strb r0, [r5, #4] │ │ movw r0, #26975 @ 0x695f │ │ movt r0, #26222 @ 0x666e │ │ str r0, [r5, #0] │ │ add r0, sp, #44 @ 0x2c │ │ - bl 82a2c │ │ + bl 82a94 │ │ ldr.w fp, [sp, #48] @ 0x30 │ │ mov.w sl, #1 │ │ str.w sl, [sp, #52] @ 0x34 │ │ str r7, [sp, #16] │ │ strd r6, r5, [fp] │ │ str.w r6, [fp, #8] │ │ ldrd r9, r0, [r4, #92] @ 0x5c │ │ cmp r0, #0 │ │ - beq.w 6d920 │ │ + beq.w 6da08 │ │ add.w r0, r9, r0, lsl #7 │ │ str r0, [sp, #24] │ │ - b.n 6d7ac │ │ + b.n 6d894 │ │ ldr r0, [sp, #32] │ │ ldr.w r9, [sp, #28] │ │ add.w sl, r0, #2 │ │ add.w r9, r9, #128 @ 0x80 │ │ ldr r0, [sp, #24] │ │ cmp r9, r0 │ │ - beq.w 6d920 │ │ + beq.w 6da08 │ │ ldrd r4, r7, [r9, #68] @ 0x44 │ │ - cbz r7, 6d7c2 │ │ + cbz r7, 6d8aa │ │ mov r0, r7 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 6dc06 │ │ + beq.w 6dcee │ │ mov r8, r0 │ │ - b.n 6d7c6 │ │ + b.n 6d8ae │ │ mov.w r8, #1 │ │ mov r0, r8 │ │ mov r1, r4 │ │ mov r2, r7 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r0, [sp, #44] @ 0x2c │ │ cmp sl, r0 │ │ - beq.w 6d914 │ │ + beq.w 6d9fc │ │ add.w r0, r9, #64 @ 0x40 │ │ str r0, [sp, #36] @ 0x24 │ │ add.w r0, sl, sl, lsl #1 │ │ add.w sl, sl, #1 │ │ add.w r1, fp, r0, lsl #2 │ │ str.w r7, [fp, r0, lsl #2] │ │ strd r8, r7, [r1, #4] │ │ str.w sl, [sp, #52] @ 0x34 │ │ ldrd r1, r2, [r9, #92] @ 0x5c │ │ - ldr r3, [pc, #872] @ (6db64 ) │ │ + ldr r3, [pc, #872] @ (6dc4c ) │ │ add r3, pc │ │ str r3, [sp, #40] @ 0x28 │ │ - cbz r2, 6d864 │ │ + cbz r2, 6d94c │ │ add.w r2, r2, r2, lsl #1 │ │ ldr r6, [sp, #36] @ 0x24 │ │ add.w r7, r1, #16 │ │ add.w r8, sp, #56 @ 0x38 │ │ lsls r4, r2, #4 │ │ movs r2, #12 │ │ add.w r5, r2, r0, lsl #2 │ │ - b.n 6d842 │ │ + b.n 6d92a │ │ add r2, sp, #56 @ 0x38 │ │ ldr.w fp, [sp, #48] @ 0x30 │ │ ldr r3, [sp, #40] @ 0x28 │ │ add.w sl, sl, #1 │ │ ldmia r2, {r0, r1, r2} │ │ adds r7, #48 @ 0x30 │ │ subs r4, #48 @ 0x30 │ │ str.w r0, [fp, r5] │ │ add.w r0, fp, r5 │ │ add.w r5, r5, #12 │ │ strd r1, r2, [r0, #4] │ │ str.w sl, [sp, #52] @ 0x34 │ │ - beq.n 6d864 │ │ - ldr r1, [pc, #804] @ (6db68 ) │ │ + beq.n 6d94c │ │ + ldr r1, [pc, #804] @ (6dc50 ) │ │ add r2, sp, #112 @ 0x70 │ │ mov r0, r8 │ │ strd r7, r3, [sp, #120] @ 0x78 │ │ add r1, pc │ │ strd r6, r3, [sp, #112] @ 0x70 │ │ - bl 3e0ec │ │ + bl 3e3f4 │ │ ldr r0, [sp, #44] @ 0x2c │ │ cmp sl, r0 │ │ - bne.n 6d81a │ │ + bne.n 6d902 │ │ add r0, sp, #44 @ 0x2c │ │ - bl 82a2c │ │ - b.n 6d81a │ │ + bl 82a94 │ │ + b.n 6d902 │ │ ldr.w r0, [r9, #108] @ 0x6c │ │ cmp r0, #0 │ │ - beq.n 6d7a0 │ │ + beq.n 6d888 │ │ rsb r0, r0, r0, lsl #3 │ │ ldr.w r1, [r9, #104] @ 0x68 │ │ str.w r9, [sp, #28] │ │ mov.w r9, r0, lsl #3 │ │ add.w r0, sl, sl, lsl #1 │ │ add.w r5, r1, #40 @ 0x28 │ │ lsls r7, r0, #2 │ │ - b.n 6d8aa │ │ + b.n 6d992 │ │ add r2, sp, #88 @ 0x58 │ │ add.w r3, fp, r7 │ │ adds r3, #12 │ │ add.w sl, r6, #1 │ │ ldmia r2, {r0, r1, r2} │ │ adds r5, #56 @ 0x38 │ │ adds r7, #24 │ │ subs.w r9, r9, #56 @ 0x38 │ │ str.w sl, [sp, #52] @ 0x34 │ │ stmia r3!, {r0, r1, r2} │ │ ldr r3, [sp, #40] @ 0x28 │ │ - beq.w 6d796 │ │ - ldr r1, [pc, #704] @ (6db6c ) │ │ + beq.w 6d87e │ │ + ldr r1, [pc, #704] @ (6dc54 ) │ │ add r0, sp, #72 @ 0x48 │ │ add r2, sp, #112 @ 0x70 │ │ ldr.w r8, [sp, #36] @ 0x24 │ │ add r1, pc │ │ mov r6, sl │ │ str r5, [sp, #120] @ 0x78 │ │ mov sl, r3 │ │ str r3, [sp, #124] @ 0x7c │ │ strd r8, r3, [sp, #112] @ 0x70 │ │ - bl 3e0ec │ │ + bl 3e3f4 │ │ ldr r4, [sp, #44] @ 0x2c │ │ cmp r6, r4 │ │ - beq.n 6d90a │ │ + beq.n 6d9f2 │ │ ldr.w fp, [sp, #48] @ 0x30 │ │ add r3, sp, #72 @ 0x48 │ │ - ldr r1, [pc, #908] @ (6dc60 ) │ │ + ldr r1, [pc, #908] @ (6dd48 ) │ │ ldmia r3, {r0, r2, r3} │ │ add r1, pc │ │ str.w r0, [fp, r7] │ │ add.w r0, fp, r7 │ │ strd r2, r3, [r0, #4] │ │ add r0, sp, #88 @ 0x58 │ │ add r2, sp, #112 @ 0x70 │ │ str r6, [sp, #32] │ │ adds r6, #1 │ │ str r6, [sp, #52] @ 0x34 │ │ strd r5, sl, [sp, #120] @ 0x78 │ │ strd r8, sl, [sp, #112] @ 0x70 │ │ - bl 3e0ec │ │ + bl 3e3f4 │ │ cmp r6, r4 │ │ - bne.n 6d888 │ │ + bne.n 6d970 │ │ add r0, sp, #44 @ 0x2c │ │ - bl 82a2c │ │ + bl 82a94 │ │ ldr.w fp, [sp, #48] @ 0x30 │ │ - b.n 6d888 │ │ + b.n 6d970 │ │ add r0, sp, #44 @ 0x2c │ │ - bl 82a2c │ │ + bl 82a94 │ │ ldr r4, [sp, #44] @ 0x2c │ │ - b.n 6d8cc │ │ + b.n 6d9b4 │ │ add r0, sp, #44 @ 0x2c │ │ - bl 82a2c │ │ + bl 82a94 │ │ ldr.w fp, [sp, #48] @ 0x30 │ │ - b.n 6d7d8 │ │ + b.n 6d8c0 │ │ ldr r5, [sp, #20] │ │ movs r0, #0 │ │ strd r0, r0, [sp] │ │ movs r2, #0 │ │ str r0, [sp, #8] │ │ add r0, sp, #112 @ 0x70 │ │ mov r1, r5 │ │ - bl 6531c │ │ + bl 65404 │ │ ldrd r7, r6, [sp, #112] @ 0x70 │ │ movw r9, #17 │ │ movt r9, #32768 @ 0x8000 │ │ cmp r7, r9 │ │ - bne.n 6d9a4 │ │ + bne.n 6da8c │ │ movs r0, #0 │ │ movs r4, #0 │ │ - blx 9c0d4 │ │ + blx 9c0e0 │ │ mov r1, r0 │ │ add r0, sp, #112 @ 0x70 │ │ mov r2, r5 │ │ mov r3, r6 │ │ - bl 49f18 │ │ + bl 4a220 │ │ ldrd r7, fp, [sp, #112] @ 0x70 │ │ cmp r7, r9 │ │ - bne.n 6d9ba │ │ + bne.n 6daa2 │ │ movs r0, #4 │ │ mov r1, fp │ │ strd r4, r0, [sp, #100] @ 0x64 │ │ add r0, sp, #112 @ 0x70 │ │ movs r2, #0 │ │ movs r3, #0 │ │ str r4, [sp, #108] @ 0x6c │ │ str r4, [sp, #4] │ │ - bl 49e28 │ │ + bl 4a130 │ │ ldr r6, [sp, #120] @ 0x78 │ │ ldrd r0, r7, [sp, #112] @ 0x70 │ │ cmp r0, #0 │ │ - beq.n 6da0a │ │ + beq.n 6daf2 │ │ cmp r7, r9 │ │ - beq.n 6da0c │ │ + beq.n 6daf4 │ │ ldrd r4, r8, [sp, #124] @ 0x7c │ │ ldr r0, [sp, #104] @ 0x68 │ │ mov.w r9, r4, lsr #8 │ │ ldr r1, [sp, #100] @ 0x64 │ │ cmp r1, #0 │ │ it ne │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, fp │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ ldr.w sl, [sp, #52] @ 0x34 │ │ - b.n 6d9c4 │ │ + b.n 6daac │ │ ldrb.w r0, [sp, #123] @ 0x7b │ │ ldrh.w r1, [sp, #121] @ 0x79 │ │ ldrb.w r4, [sp, #120] @ 0x78 │ │ ldr.w r8, [sp, #124] @ 0x7c │ │ orr.w r9, r1, r0, lsl #16 │ │ - b.n 6d9c4 │ │ + b.n 6daac │ │ ldrd r4, r8, [sp, #120] @ 0x78 │ │ mov r6, fp │ │ mov.w r9, r4, lsr #8 │ │ ldr r1, [sp, #16] │ │ uxtb r0, r4 │ │ ldr.w fp, [sp, #48] @ 0x30 │ │ orr.w r0, r0, r9, lsl #8 │ │ cmp.w sl, #0 │ │ strd r7, r6, [r1] │ │ strd r0, r8, [r1, #8] │ │ - beq.n 6d9f8 │ │ + beq.n 6dae0 │ │ add.w r4, fp, #4 │ │ ldr.w r0, [r4, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r4, #12 │ │ subs.w sl, sl, #1 │ │ - bne.n 6d9e2 │ │ + bne.n 6daca │ │ ldr r0, [sp, #44] @ 0x2c │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, fp │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add sp, #132 @ 0x84 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - cbnz r7, 6da66 │ │ + cbnz r7, 6db4e │ │ movs r5, #0 │ │ ldrd r8, r0, [sp, #100] @ 0x64 │ │ str r0, [sp, #40] @ 0x28 │ │ mov r0, fp │ │ - blx 9ca04 │ │ + blx 9ca10 │ │ ldrd fp, r6, [sp, #48] @ 0x30 │ │ cmp r6, #2 │ │ - bcs.w 6db70 │ │ + bcs.w 6dc58 │ │ cmp r5, #2 │ │ - bcs.w 6db82 │ │ + bcs.w 6dc6a │ │ cmp r6, r5 │ │ - bne.w 6db94 │ │ - cbz r5, 6da5e │ │ + bne.w 6dc7c │ │ + cbz r5, 6db46 │ │ ldr r0, [sp, #40] @ 0x28 │ │ add.w r4, fp, #4 │ │ mov sl, r5 │ │ adds r7, r0, #4 │ │ ldr r2, [r4, #4] │ │ ldr r0, [r7, #4] │ │ cmp r2, r0 │ │ - bne.w 6db94 │ │ + bne.w 6dc7c │ │ ldr r0, [r4, #0] │ │ ldr r1, [r7, #0] │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.w 6db94 │ │ + bne.w 6dc7c │ │ adds r4, #12 │ │ adds r7, #12 │ │ subs.w sl, sl, #1 │ │ - bne.n 6da3c │ │ + bne.n 6db24 │ │ ldr r0, [sp, #16] │ │ str.w r9, [r0] │ │ - b.n 6dbb8 │ │ - cbnz r6, 6da72 │ │ + b.n 6dca0 │ │ + cbnz r6, 6db5a │ │ movs r0, #0 │ │ movs r4, #1 │ │ str r0, [sp, #120] @ 0x78 │ │ str r4, [sp, #116] @ 0x74 │ │ - b.n 6da9c │ │ + b.n 6db84 │ │ mov r0, r6 │ │ movs r1, #1 │ │ - bl 4191c │ │ + bl 41c24 │ │ cmp r0, #0 │ │ - beq.w 6dc0e │ │ + beq.w 6dcf6 │ │ mov r1, r7 │ │ mov r2, r6 │ │ mov r4, r0 │ │ - bl d53c6 │ │ + bl d52ea │ │ add r0, sp, #112 @ 0x70 │ │ mov r1, r4 │ │ mov r2, r6 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #112] @ 0x70 │ │ cmp r0, #1 │ │ - beq.w 6dc16 │ │ + beq.w 6dcfe │ │ add r0, sp, #100 @ 0x64 │ │ - bl 82a2c │ │ + bl 82a94 │ │ ldr.w r8, [sp, #104] @ 0x68 │ │ movs r5, #1 │ │ mov.w sl, #0 │ │ str r5, [sp, #108] @ 0x6c │ │ strd r6, r4, [r8] │ │ str.w r6, [r8, #8] │ │ - b.n 6dad8 │ │ + b.n 6dbc0 │ │ movs r0, #0 │ │ movs r4, #1 │ │ str r0, [sp, #120] @ 0x78 │ │ str r4, [sp, #116] @ 0x74 │ │ ldr r0, [sp, #100] @ 0x64 │ │ cmp r5, r0 │ │ - beq.n 6db20 │ │ + beq.n 6dc08 │ │ add.w r0, r8, sl │ │ adds r5, #1 │ │ add.w sl, sl, #12 │ │ strd r6, r4, [r0, #12] │ │ str r6, [r0, #20] │ │ str r5, [sp, #108] @ 0x6c │ │ movs r0, #0 │ │ mov r1, fp │ │ str r0, [sp, #4] │ │ add r0, sp, #112 @ 0x70 │ │ movs r2, #8 │ │ movs r3, #0 │ │ - bl 49e28 │ │ + bl 4a130 │ │ ldr r6, [sp, #120] @ 0x78 │ │ ldrd r0, r7, [sp, #112] @ 0x70 │ │ - cbnz r0, 6db2c │ │ + cbnz r0, 6dc14 │ │ cmp r7, #0 │ │ - beq.n 6da0e │ │ + beq.n 6daf6 │ │ cmp r6, #0 │ │ - beq.n 6dab8 │ │ + beq.n 6dba0 │ │ mov r0, r6 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 6dc0e │ │ + beq.w 6dcf6 │ │ mov r1, r7 │ │ mov r2, r6 │ │ mov r4, r0 │ │ - bl d53c6 │ │ + bl d52ea │ │ add r0, sp, #112 @ 0x70 │ │ mov r1, r4 │ │ mov r2, r6 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #112] @ 0x70 │ │ cmp r0, #1 │ │ - bne.n 6dac0 │ │ - b.n 6dc16 │ │ + bne.n 6dba8 │ │ + b.n 6dcfe │ │ add r0, sp, #100 @ 0x64 │ │ - bl 82a2c │ │ + bl 82a94 │ │ ldr.w r8, [sp, #104] @ 0x68 │ │ - b.n 6dac6 │ │ + b.n 6dbae │ │ cmp r7, r9 │ │ - beq.w 6da0e │ │ + beq.w 6daf6 │ │ ldrd r4, r8, [sp, #124] @ 0x7c │ │ cmp r5, #0 │ │ ldr r0, [sp, #104] @ 0x68 │ │ mov.w r9, r4, lsr #8 │ │ - beq.w 6d98e │ │ + beq.w 6da76 │ │ add.w sl, r0, #4 │ │ str r0, [sp, #40] @ 0x28 │ │ ldr.w r0, [sl, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [sl] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w sl, sl, #12 │ │ subs r5, #1 │ │ - bne.n 6db48 │ │ + bne.n 6dc30 │ │ ldr r0, [sp, #40] @ 0x28 │ │ - b.n 6d98e │ │ + b.n 6da76 │ │ stmia r2!, {r0, r3, r6} │ │ - vcvt.f32.u32 d27, d19, #1 │ │ - vmlsl.u q8, d25, d10[0] │ │ + @ instruction: 0xffffbd82 │ │ + vqshlu.s64 q8, q3, #57 @ 0x39 │ │ vqshlu.s32 q10, q4, #26 │ │ mov r1, r6 │ │ cmp r6, #21 │ │ - bcs.n 6dc42 │ │ - bl 6dc74 │ │ + bcs.n 6dd2a │ │ + bl 6dd5c │ │ cmp r5, #2 │ │ - bcc.w 6da2a │ │ + bcc.w 6db12 │ │ cmp r5, #21 │ │ - bcs.n 6dc4e │ │ + bcs.n 6dd36 │ │ ldr r0, [sp, #40] @ 0x28 │ │ mov r1, r5 │ │ - bl 6dc74 │ │ + bl 6dd5c │ │ cmp r6, r5 │ │ - beq.w 6da30 │ │ + beq.w 6db18 │ │ movs r0, #19 │ │ movs r4, #19 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 6dc3a │ │ - ldr r1, [pc, #192] @ (6dc64 ) │ │ + beq.n 6dd22 │ │ + ldr r1, [pc, #192] @ (6dd4c ) │ │ movs r2, #19 │ │ mov r7, r0 │ │ add r1, pc │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r1, [sp, #16] │ │ sub.w r0, r9, #4 │ │ stmia.w r1, {r0, r4, r7} │ │ str r4, [r1, #12] │ │ - cbz r5, 6dbd2 │ │ + cbz r5, 6dcba │ │ ldr r0, [sp, #40] @ 0x28 │ │ adds r4, r0, #4 │ │ ldr.w r0, [r4, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r4, #12 │ │ subs r5, #1 │ │ - bne.n 6dbbe │ │ + bne.n 6dca6 │ │ cmp.w r8, #0 │ │ itt ne │ │ ldrne r0, [sp, #40] @ 0x28 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ cmp r6, #0 │ │ - beq.w 6d9f8 │ │ + beq.w 6dae0 │ │ add.w r4, fp, #4 │ │ ldr.w r0, [r4, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r4, #12 │ │ subs r6, #1 │ │ - bne.n 6dbe8 │ │ - b.n 6d9f8 │ │ + bne.n 6dcd0 │ │ + b.n 6dae0 │ │ movs r0, #1 │ │ movs r1, #5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r1, r7 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r1, r6 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ ldr r1, [sp, #116] @ 0x74 │ │ ldr r2, [sp, #120] @ 0x78 │ │ - ldr r0, [pc, #76] @ (6dc68 ) │ │ - ldr r3, [pc, #76] @ (6dc6c ) │ │ - ldr r5, [pc, #80] @ (6dc70 ) │ │ + ldr r0, [pc, #76] @ (6dd50 ) │ │ + ldr r3, [pc, #76] @ (6dd54 ) │ │ + ldr r5, [pc, #80] @ (6dd58 ) │ │ add r0, pc │ │ str r2, [sp, #128] @ 0x80 │ │ add r3, pc │ │ add r2, sp, #112 @ 0x70 │ │ str r1, [sp, #124] @ 0x7c │ │ movs r1, #43 @ 0x2b │ │ add r5, pc │ │ str r6, [sp, #120] @ 0x78 │ │ str r4, [sp, #116] @ 0x74 │ │ str r6, [sp, #112] @ 0x70 │ │ str r5, [sp, #0] │ │ - bl 414b0 │ │ + bl 417b8 │ │ movs r0, #1 │ │ movs r1, #19 │ │ - bl 3dfa4 │ │ - bl 430d2 │ │ + bl 3e2ac │ │ + bl 4427e │ │ cmp r5, #2 │ │ - bcc.w 6da2a │ │ - b.n 6db82 │ │ + bcc.w 6db12 │ │ + b.n 6dc6a │ │ ldr r0, [sp, #40] @ 0x28 │ │ mov r1, r5 │ │ - bl 430d2 │ │ + bl 4427e │ │ cmp r6, r5 │ │ - beq.w 6da30 │ │ - b.n 6db94 │ │ + beq.w 6db18 │ │ + b.n 6dc7c │ │ nop │ │ - add r0, sp, #892 @ 0x37c │ │ - vsri.32 , q3, #7 │ │ - vtbx.8 d27, {d10}, d19 │ │ - @ instruction: 0xfffaccd8 │ │ + add r7, pc, #988 @ (adr r7, 6e128 ) │ │ + vabs.s32 , q15 │ │ + vqshl.u32 , , #26 │ │ + @ instruction: 0xfffacc90 │ │ movs r6, r0 │ │ - beq.n 6dbd4 │ │ + ldmia r7, {r3, r4, r6, r7} │ │ movs r6, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #12 │ │ mov r4, r0 │ │ add.w r0, r1, r1, lsl #1 │ │ mov.w fp, #0 │ │ mov r7, r4 │ │ add.w r8, r4, r0, lsl #2 │ │ add.w r0, r4, #12 │ │ str.w r8, [sp, #4] │ │ - b.n 6dcb4 │ │ + b.n 6dd9c │ │ add.w r0, r8, #12 │ │ mov r1, r4 │ │ ldr.w r8, [sp, #4] │ │ ldr r2, [sp, #8] │ │ str r2, [r1, #0] │ │ strd sl, r6, [r0, #-8] │ │ add.w r0, r9, #12 │ │ add.w fp, fp, #12 │ │ mov r7, r9 │ │ cmp r0, r8 │ │ - beq.n 6dd1c │ │ + beq.n 6de04 │ │ ldrd sl, r6, [r7, #16] │ │ mov r9, r0 │ │ ldrd r1, r5, [r7, #4] │ │ cmp r6, r5 │ │ mov r2, r5 │ │ mov r0, sl │ │ it cc │ │ movcc r2, r6 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ it eq │ │ subeq r0, r6, r5 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 6dca6 │ │ + bgt.n 6dd8e │ │ ldr r0, [r7, #12] │ │ mov r7, fp │ │ str r0, [sp, #8] │ │ add.w r8, r4, r7 │ │ ldr r0, [r4, r7] │ │ add.w r3, r8, #12 │ │ ldrd r1, r2, [r8, #4] │ │ cmp r7, #0 │ │ stmia r3!, {r0, r1, r2} │ │ - beq.n 6dc94 │ │ + beq.n 6dd7c │ │ ldrd r1, r5, [r8, #-8] │ │ mov r0, sl │ │ mov r2, r5 │ │ cmp r6, r5 │ │ it cc │ │ movcc r2, r6 │ │ - blx d8860 │ │ + blx d8870 │ │ subs r7, #12 │ │ cmp r0, #0 │ │ it eq │ │ subeq r0, r6, r5 │ │ cmp r0, #0 │ │ - bmi.n 6dcde │ │ + bmi.n 6ddc6 │ │ adds r0, r4, r7 │ │ add.w r1, r0, #12 │ │ add.w r0, r8, #12 │ │ - b.n 6dc9a │ │ + b.n 6dd82 │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r1, [r0, #0] │ │ cmp r1, #0 │ │ itt ne │ │ ldrne r0, [r0, #4] │ │ - bne.w d870c │ │ + bne.w d871c │ │ bx lr │ │ push {r4, r5, r7, lr} │ │ sub sp, #16 │ │ mov r5, r0 │ │ adds r0, #12 │ │ mov r4, r1 │ │ str r0, [sp, #4] │ │ ldrd r0, r1, [r1] │ │ movs r2, #13 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #136] @ (6ddd0 ) │ │ + ldr r1, [pc, #136] @ (6deb8 ) │ │ add r1, pc │ │ blx r3 │ │ - ldr r1, [pc, #136] @ (6ddd4 ) │ │ + ldr r1, [pc, #136] @ (6debc ) │ │ movs r3, #0 │ │ - ldr r2, [pc, #136] @ (6ddd8 ) │ │ + ldr r2, [pc, #136] @ (6dec0 ) │ │ strb.w r0, [sp, #12] │ │ add r1, pc │ │ add r2, pc │ │ add r0, sp, #8 │ │ strb.w r3, [sp, #13] │ │ mov r3, r5 │ │ str r2, [sp, #0] │ │ movs r2, #5 │ │ str r4, [sp, #8] │ │ - bl 40bfc │ │ - ldr r1, [pc, #112] @ (6dddc ) │ │ + bl 40f04 │ │ + ldr r1, [pc, #112] @ (6dec4 ) │ │ add r3, sp, #4 │ │ - ldr r2, [pc, #112] @ (6dde0 ) │ │ + ldr r2, [pc, #112] @ (6dec8 ) │ │ add r1, pc │ │ add r2, pc │ │ str r2, [sp, #0] │ │ movs r2, #5 │ │ - bl 40bfc │ │ + bl 40f04 │ │ ldrb.w r2, [sp, #13] │ │ ldrb.w r1, [sp, #12] │ │ cmp r2, #1 │ │ orr.w r0, r2, r1 │ │ it eq │ │ movseq.w r1, r1, lsl #31 │ │ - beq.n 6dd9a │ │ + beq.n 6de82 │ │ and.w r0, r0, #1 │ │ add sp, #16 │ │ pop {r4, r5, r7, pc} │ │ ldr r0, [sp, #8] │ │ ldrb r1, [r0, #10] │ │ lsls r1, r1, #24 │ │ - bmi.n 6ddb8 │ │ + bmi.n 6dea0 │ │ ldrd r0, r1, [r0] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #56] @ (6dde4 ) │ │ + ldr r1, [pc, #56] @ (6decc ) │ │ add r1, pc │ │ blx r3 │ │ and.w r0, r0, #1 │ │ add sp, #16 │ │ pop {r4, r5, r7, pc} │ │ ldrd r0, r1, [r0] │ │ movs r2, #1 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #36] @ (6dde8 ) │ │ + ldr r1, [pc, #36] @ (6ded0 ) │ │ add r1, pc │ │ blx r3 │ │ and.w r0, r0, #1 │ │ add sp, #16 │ │ pop {r4, r5, r7, pc} │ │ nop │ │ - ldrh r2, [r5, #14] │ │ - vtbx.8 d24, {d26-d27}, d25 │ │ + ldrh r2, [r0, #8] │ │ + vtbl.8 d24, {d10-d11}, d1 │ │ vrshr.u32 d16, d27, #6 │ │ movs r0, r0 │ │ - add r2, sp, #436 @ 0x1b4 │ │ + add r1, sp, #532 @ 0x214 │ │ vshr.u32 q8, , #6 │ │ movs r0, r0 │ │ - str r5, [sp, #136] @ 0x88 │ │ - vrintx.f32 , │ │ + str r4, [sp, #228] @ 0xe4 │ │ + vrsra.u64 , q12, #6 │ │ vsli.64 d27, d16, #58 @ 0x3a │ │ sub sp, #16 │ │ ldr r5, [r0, #0] │ │ mov r4, r1 │ │ movs r2, #9 │ │ adds r0, r5, #4 │ │ str r0, [sp, #4] │ │ ldrd r0, r1, [r1] │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #136] @ (6de8c ) │ │ + ldr r1, [pc, #136] @ (6df74 ) │ │ add r1, pc │ │ blx r3 │ │ - ldr r1, [pc, #136] @ (6de90 ) │ │ + ldr r1, [pc, #136] @ (6df78 ) │ │ movs r3, #0 │ │ - ldr r2, [pc, #136] @ (6de94 ) │ │ + ldr r2, [pc, #136] @ (6df7c ) │ │ strb.w r0, [sp, #12] │ │ add r1, pc │ │ add r2, pc │ │ add r0, sp, #8 │ │ strb.w r3, [sp, #13] │ │ mov r3, r5 │ │ str r2, [sp, #0] │ │ movs r2, #11 │ │ str r4, [sp, #8] │ │ - bl 40bfc │ │ - ldr r1, [pc, #112] @ (6de98 ) │ │ + bl 40f04 │ │ + ldr r1, [pc, #112] @ (6df80 ) │ │ add r3, sp, #4 │ │ - ldr r2, [pc, #112] @ (6de9c ) │ │ + ldr r2, [pc, #112] @ (6df84 ) │ │ add r1, pc │ │ add r2, pc │ │ str r2, [sp, #0] │ │ movs r2, #9 │ │ - bl 40bfc │ │ + bl 40f04 │ │ ldrb.w r2, [sp, #13] │ │ ldrb.w r1, [sp, #12] │ │ cmp r2, #1 │ │ orr.w r0, r2, r1 │ │ it eq │ │ movseq.w r1, r1, lsl #31 │ │ - beq.n 6de56 │ │ + beq.n 6df3e │ │ and.w r0, r0, #1 │ │ add sp, #16 │ │ pop {r4, r5, r7, pc} │ │ ldr r0, [sp, #8] │ │ ldrb r1, [r0, #10] │ │ lsls r1, r1, #24 │ │ - bmi.n 6de74 │ │ + bmi.n 6df5c │ │ ldrd r0, r1, [r0] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #56] @ (6dea0 ) │ │ + ldr r1, [pc, #56] @ (6df88 ) │ │ add r1, pc │ │ blx r3 │ │ and.w r0, r0, #1 │ │ add sp, #16 │ │ pop {r4, r5, r7, pc} │ │ ldrd r0, r1, [r0] │ │ movs r2, #1 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #36] @ (6dea4 ) │ │ + ldr r1, [pc, #36] @ (6df8c ) │ │ add r1, pc │ │ blx r3 │ │ and.w r0, r0, #1 │ │ add sp, #16 │ │ pop {r4, r5, r7, pc} │ │ nop │ │ - ldrh r0, [r3, #2] │ │ - vqrshrun.s64 d24, , #6 │ │ - vrint?.f32 , │ │ - vtbx.8 d24, {d11}, d2 │ │ + strh r0, [r6, #58] @ 0x3a │ │ + vrint?.f32 q12, │ │ + vrintz.f32 d25, d31 │ │ + vqshl.u32 q12, q5, #27 │ │ vshr.u32 q8, , #6 │ │ movs r0, r0 │ │ - str r4, [sp, #408] @ 0x198 │ │ - vrintn.f32 d25, d21 │ │ + str r3, [sp, #500] @ 0x1f4 │ │ + vrsra.u32 d25, d28, #6 │ │ vtbl.8 d30, {d10-d11}, d29 │ │ mvns r0, r6 │ │ sub sp, #36 @ 0x24 │ │ ldr r7, [r0, #0] │ │ mov r5, r1 │ │ ldrb r0, [r7, #0] │ │ cmp r0, #1 │ │ - bne.n 6ded4 │ │ + bne.n 6dfbc │ │ ldrd r4, r6, [r5] │ │ movs r2, #4 │ │ ldr.w r9, [r6, #12] │ │ - ldr r1, [pc, #180] @ (6df78 ) │ │ + ldr r1, [pc, #180] @ (6e060 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx r9 │ │ - cbz r0, 6dee8 │ │ + cbz r0, 6dfd0 │ │ movs r0, #1 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ ldrd r0, r2, [r5] │ │ - ldr r1, [pc, #180] @ (6df90 ) │ │ + ldr r1, [pc, #180] @ (6e078 ) │ │ ldr r3, [r2, #12] │ │ movs r2, #4 │ │ add r1, pc │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ bx r3 │ │ ldrb r0, [r5, #10] │ │ add.w r8, r7, #1 │ │ lsls r0, r0, #24 │ │ - bmi.n 6df1a │ │ - ldr r1, [pc, #136] @ (6df7c ) │ │ + bmi.n 6e002 │ │ + ldr r1, [pc, #136] @ (6e064 ) │ │ mov r0, r4 │ │ movs r2, #1 │ │ movs r6, #1 │ │ add r1, pc │ │ blx r9 │ │ mov r1, r0 │ │ mov r0, r6 │ │ - cbnz r1, 6df72 │ │ + cbnz r1, 6e05a │ │ mov r0, r8 │ │ mov r1, r5 │ │ - bl 271a8 │ │ + bl 271dc │ │ cmp r0, #0 │ │ - bne.n 6decc │ │ + bne.n 6dfb4 │ │ ldrd r4, r0, [r5] │ │ ldr.w r9, [r0, #12] │ │ - b.n 6df68 │ │ - ldr r1, [pc, #100] @ (6df80 ) │ │ + b.n 6e050 │ │ + ldr r1, [pc, #100] @ (6e068 ) │ │ mov r0, r4 │ │ movs r2, #2 │ │ add r1, pc │ │ blx r9 │ │ mov r1, r0 │ │ movs r0, #1 │ │ - cbnz r1, 6df72 │ │ - ldr r1, [pc, #88] @ (6df84 ) │ │ + cbnz r1, 6e05a │ │ + ldr r1, [pc, #88] @ (6e06c ) │ │ add.w r2, sp, #19 │ │ str r2, [sp, #12] │ │ add r1, pc │ │ str r1, [sp, #24] │ │ add r1, sp, #4 │ │ strb.w r0, [sp, #19] │ │ ldrd r0, r2, [r5, #8] │ │ str r1, [sp, #20] │ │ add r1, sp, #20 │ │ strd r0, r2, [sp, #28] │ │ mov r0, r8 │ │ str r6, [sp, #8] │ │ str r4, [sp, #4] │ │ - bl 271a8 │ │ + bl 271dc │ │ cmp r0, #0 │ │ - bne.n 6decc │ │ + bne.n 6dfb4 │ │ ldrd r0, r1, [sp, #20] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #40] @ (6df88 ) │ │ + ldr r1, [pc, #40] @ (6e070 ) │ │ add r1, pc │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.n 6decc │ │ - ldr r1, [pc, #32] @ (6df8c ) │ │ + bne.n 6dfb4 │ │ + ldr r1, [pc, #32] @ (6e074 ) │ │ mov r0, r4 │ │ movs r2, #1 │ │ add r1, pc │ │ blx r9 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ - strh r2, [r6, #26] │ │ - vrsra.u64 d25, d23, #6 │ │ - vtbl.8 d20, {d10-d13}, d14 │ │ - vrintm.f32 q14, q13 │ │ - movs r6, r0 │ │ - ldr r2, [pc, #816] @ (6e2bc ) │ │ - @ instruction: 0xfffa9345 │ │ - vrsra.u32 q12, q13, #6 │ │ + strh r2, [r1, #20] │ │ + vqmovn.u64 d25, q7 │ │ + vtbl.8 d20, {d10-d12}, d22 │ │ + vqshlu.s32 d28, d2, #26 │ │ + movs r6, r0 │ │ + ldr r1, [pc, #912] @ (6e404 ) │ │ + vrshr.u32 , q6, #6 │ │ + vrshr.u64 d24, d2, #6 │ │ vtbl.8 d30, {d10-d11}, d29 │ │ - ldr r7, [pc, #960] @ (6e358 ) │ │ + ldr r7, [pc, #960] @ (6e440 ) │ │ sub sp, #36 @ 0x24 │ │ mov r4, r1 │ │ ldrd r2, r1, [r1] │ │ ldrd r5, r7, [r0, #4] │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #280] @ (6e0c0 ) │ │ + ldr r1, [pc, #280] @ (6e1a8 ) │ │ mov r0, r2 │ │ movs r2, #1 │ │ add r1, pc │ │ blx r3 │ │ cmp r7, #0 │ │ - beq.n 6e0a2 │ │ - cbz r0, 6dfba │ │ + beq.n 6e18a │ │ + cbz r0, 6e0a2 │ │ movs r0, #1 │ │ - b.n 6e020 │ │ + b.n 6e108 │ │ ldrb r0, [r4, #10] │ │ lsls r0, r0, #24 │ │ - bmi.n 6dfca │ │ + bmi.n 6e0b2 │ │ mov r0, r5 │ │ mov r1, r4 │ │ - bl 271a8 │ │ - b.n 6e020 │ │ + bl 271dc │ │ + b.n 6e108 │ │ ldrd r8, r6, [r4] │ │ movs r2, #1 │ │ ldr r3, [r6, #12] │ │ mov.w r9, #1 │ │ - ldr r1, [pc, #236] @ (6e0c4 ) │ │ + ldr r1, [pc, #236] @ (6e1ac ) │ │ mov r0, r8 │ │ add r1, pc │ │ blx r3 │ │ mov r1, r0 │ │ mov r0, r9 │ │ - cbnz r1, 6e020 │ │ - ldr r1, [pc, #224] @ (6e0c8 ) │ │ + cbnz r1, 6e108 │ │ + ldr r1, [pc, #224] @ (6e1b0 ) │ │ add.w r2, sp, #19 │ │ str r2, [sp, #12] │ │ add r1, pc │ │ str r1, [sp, #24] │ │ add r1, sp, #4 │ │ strb.w r0, [sp, #19] │ │ ldrd r0, r2, [r4, #8] │ │ str r1, [sp, #20] │ │ add r1, sp, #20 │ │ strd r0, r2, [sp, #28] │ │ mov r0, r5 │ │ str r6, [sp, #8] │ │ str.w r8, [sp, #4] │ │ - bl 271a8 │ │ + bl 271dc │ │ cmp r0, #0 │ │ - bne.n 6dfb6 │ │ + bne.n 6e09e │ │ ldrd r0, r1, [sp, #20] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #176] @ (6e0cc ) │ │ + ldr r1, [pc, #176] @ (6e1b4 ) │ │ add r1, pc │ │ blx r3 │ │ subs r7, #1 │ │ - beq.n 6e0a2 │ │ - ldr r1, [pc, #168] @ (6e0d0 ) │ │ + beq.n 6e18a │ │ + ldr r1, [pc, #168] @ (6e1b8 ) │ │ adds r5, #1 │ │ add.w fp, sp, #4 │ │ add.w r8, sp, #20 │ │ add r1, pc │ │ mov r9, r1 │ │ - ldr r1, [pc, #156] @ (6e0d4 ) │ │ + ldr r1, [pc, #156] @ (6e1bc ) │ │ add r1, pc │ │ mov sl, r1 │ │ - b.n 6e044 │ │ + b.n 6e12c │ │ movs r0, #1 │ │ adds r5, #1 │ │ subs r7, #1 │ │ - beq.n 6e0a2 │ │ + beq.n 6e18a │ │ lsls r0, r0, #31 │ │ - bne.n 6e03c │ │ + bne.n 6e124 │ │ ldrb r0, [r4, #10] │ │ lsls r0, r0, #24 │ │ - bmi.n 6e068 │ │ + bmi.n 6e150 │ │ ldrd r0, r1, [r4] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ mov r1, r9 │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.n 6e03c │ │ + bne.n 6e124 │ │ mov r0, r5 │ │ mov r1, r4 │ │ - bl 271a8 │ │ - b.n 6e03e │ │ + bl 271dc │ │ + b.n 6e126 │ │ ldmia.w r4, {r0, r1, r2, r3} │ │ movs r6, #1 │ │ add.w ip, sp, #4 │ │ strb.w r6, [sp, #19] │ │ add.w r6, sp, #19 │ │ stmia.w ip, {r0, r1, r6} │ │ mov r0, r5 │ │ mov r1, r8 │ │ strd fp, sl, [sp, #20] │ │ strd r2, r3, [sp, #28] │ │ - bl 271a8 │ │ + bl 271dc │ │ cmp r0, #0 │ │ - bne.n 6e03c │ │ + bne.n 6e124 │ │ ldrd r0, r1, [sp, #20] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #60] @ (6e0d8 ) │ │ + ldr r1, [pc, #60] @ (6e1c0 ) │ │ add r1, pc │ │ blx r3 │ │ - b.n 6e03e │ │ - cbz r0, 6e0ac │ │ + b.n 6e126 │ │ + cbz r0, 6e194 │ │ movs r0, #1 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd r0, r1, [r4] │ │ movs r2, #1 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #36] @ (6e0dc ) │ │ + ldr r1, [pc, #36] @ (6e1c4 ) │ │ add r1, pc │ │ blx r3 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - str r2, [sp, #820] @ 0x334 │ │ - vqshlu.s32 d26, d16, #26 │ │ - vqshlu.s32 d28, d16, #26 │ │ + str r1, [sp, #912] @ 0x390 │ │ + vrinta.f32 q13, q4 │ │ + vsli.32 q14, q4, #26 │ │ + movs r6, r0 │ │ + ldr r1, [pc, #160] @ (6e258 ) │ │ + vqmovn.u64 d25, q4 │ │ + vrinta.f32 d28, d14 │ │ movs r6, r0 │ │ - ldr r2, [pc, #64] @ (6e110 ) │ │ - vrsra.u64 d25, d17, #6 │ │ - vrintz.f32 q14, q11 │ │ - movs r6, r0 │ │ - ldr r1, [pc, #576] @ (6e31c ) │ │ - vzip.32 , q2 │ │ + ldr r0, [pc, #672] @ (6e464 ) │ │ + vshr.u64 , , #6 │ │ vtbl.8 d30, {d10-d11}, d29 │ │ - ldr r7, [pc, #960] @ (6e4a4 ) │ │ + ldr r7, [pc, #960] @ (6e58c ) │ │ sub sp, #164 @ 0xa4 │ │ mov sl, r2 │ │ mov r6, r1 │ │ mov fp, r0 │ │ cmp r3, #0 │ │ - bne.n 6e1a6 │ │ + bne.n 6e28e │ │ cmp.w sl, #0 │ │ - beq.n 6e1a6 │ │ + beq.n 6e28e │ │ str.w fp, [sp, #16] │ │ add.w fp, r6, #16 │ │ movs r0, #1 │ │ ldrex r1, [fp] │ │ cmp r1, #0 │ │ - bne.w 6e2fe │ │ + bne.w 6e3e6 │ │ strex r1, r0, [fp] │ │ cmp r1, #0 │ │ - bne.n 6e100 │ │ + bne.n 6e1e8 │ │ dmb ish │ │ - ldr r0, [pc, #552] @ (6e340 ) │ │ + ldr r0, [pc, #552] @ (6e428 ) │ │ add r0, pc │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 6e30a │ │ + bne.w 6e3f2 │ │ movs r4, #0 │ │ ldrb r0, [r6, #20] │ │ cmp r0, #0 │ │ - bne.w 6e31a │ │ + bne.w 6e402 │ │ mov r1, r6 │ │ ldr.w r0, [r1, #24]! │ │ str r1, [sp, #20] │ │ ldr r1, [r1, #4] │ │ - bl 6e350 │ │ + bl 6e438 │ │ cmp r0, #0 │ │ strd r4, r6, [sp, #8] │ │ - beq.n 6e1e4 │ │ + beq.n 6e2cc │ │ mov r5, r0 │ │ movs r0, #32 │ │ mov r8, r1 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 6e338 │ │ + beq.w 6e420 │ │ mov r4, r0 │ │ movs r0, #1 │ │ strd r4, r0, [sp, #68] @ 0x44 │ │ movs r0, #4 │ │ mov r7, sl │ │ mov.w r9, #0 │ │ strd r5, r8, [r4] │ │ str r0, [sp, #64] @ 0x40 │ │ - b.n 6e17a │ │ + b.n 6e262 │ │ add.w r0, r4, r9, lsl #3 │ │ strd sl, r8, [r0, #8] │ │ add.w r0, r9, #2 │ │ str r0, [sp, #72] @ 0x48 │ │ mov r9, r5 │ │ ldrd r0, r1, [r6, #24] │ │ add.w r5, r9, #1 │ │ - bl 6e350 │ │ - cbz r0, 6e1ae │ │ + bl 6e438 │ │ + cbz r0, 6e296 │ │ mov sl, r0 │ │ ldr r0, [sp, #64] @ 0x40 │ │ mov r8, r1 │ │ cmp r5, r0 │ │ - bne.n 6e16a │ │ + bne.n 6e252 │ │ movs r0, #8 │ │ mov r1, r5 │ │ str r0, [sp, #0] │ │ add r0, sp, #64 @ 0x40 │ │ movs r2, #1 │ │ movs r3, #4 │ │ - bl 4eddc │ │ + bl 4efec │ │ ldr r4, [sp, #68] @ 0x44 │ │ - b.n 6e16a │ │ + b.n 6e252 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str r0, [sp, #32] │ │ - b.n 6e25c │ │ + b.n 6e344 │ │ ldrd r8, r9, [sp, #64] @ 0x40 │ │ add.w r4, r9, r5, lsl #3 │ │ mov r6, r9 │ │ mov sl, r7 │ │ ldrd r5, r7, [r6] │ │ ldr r1, [sp, #20] │ │ ldr r2, [r7, #12] │ │ mov r0, r5 │ │ blx r2 │ │ ldr r0, [r7, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #8 │ │ cmp r6, r4 │ │ - bne.n 6e1ba │ │ + bne.n 6e2a2 │ │ cmp.w r8, #0 │ │ itt ne │ │ movne r0, r9 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ movs r0, #0 │ │ movs r1, #4 │ │ add r6, sp, #128 @ 0x80 │ │ strd r0, r1, [sp, #136] @ 0x88 │ │ movw r1, #909 @ 0x38d │ │ strd r0, r0, [sp, #128] @ 0x80 │ │ strd r0, r0, [sp, #144] @ 0x90 │ │ strd r0, r1, [sp, #152] @ 0x98 │ │ - b.n 6e204 │ │ + b.n 6e2ec │ │ lsrs r0, r2, #2 │ │ - bne.n 6e242 │ │ + bne.n 6e32a │ │ mov r0, r6 │ │ - bl 50d90 │ │ + bl 50fa0 │ │ ldr r0, [sp, #148] @ 0x94 │ │ cmp r0, #0 │ │ - beq.n 6e204 │ │ + beq.n 6e2ec │ │ movs r1, #0 │ │ movs r3, #2 │ │ movs r4, #1 │ │ movs r5, #0 │ │ - b.n 6e22a │ │ + b.n 6e312 │ │ umull r2, r7, r3, r3 │ │ lsrs r0, r0, #1 │ │ mla r7, r3, r5, r7 │ │ mla r5, r3, r5, r7 │ │ mov r3, r2 │ │ lsls r2, r0, #31 │ │ - beq.n 6e21a │ │ + beq.n 6e302 │ │ umull r2, r7, r3, r4 │ │ cmp r0, #1 │ │ - beq.n 6e200 │ │ + beq.n 6e2e8 │ │ mla r1, r3, r1, r7 │ │ mla r1, r5, r4, r1 │ │ mov r4, r2 │ │ - b.n 6e21a │ │ + b.n 6e302 │ │ ldmia r6!, {r1, r2, r3, r7} │ │ add r0, sp, #24 │ │ stmia r0!, {r1, r2, r3, r7} │ │ ldmia.w r6, {r1, r2, r3, r7} │ │ stmia r0!, {r1, r2, r3, r7} │ │ str.w fp, [sp, #56] @ 0x38 │ │ ldrd r6, fp, [sp, #12] │ │ ldr r0, [sp, #8] │ │ strb.w r0, [sp, #60] @ 0x3c │ │ ldr r1, [r6, #100] @ 0x64 │ │ add r0, sp, #64 @ 0x40 │ │ mov r2, sl │ │ - bl 65258 │ │ + bl 65340 │ │ ldrd r2, r8, [sp, #64] @ 0x40 │ │ movs r3, #17 │ │ ldrb.w r9, [sp, #72] @ 0x48 │ │ movt r3, #32768 @ 0x8000 │ │ cmp r2, r3 │ │ - bne.n 6e2c8 │ │ + bne.n 6e3b0 │ │ add r5, sp, #24 │ │ ldrd lr, ip, [r6, #8] │ │ add r2, sp, #80 @ 0x50 │ │ ldmia r5!, {r0, r1, r3, r4, r7} │ │ adds r6, r2, #4 │ │ stmia r6!, {r0, r1, r3, r4, r7} │ │ ldmia.w r5, {r0, r1, r3, r4, r7} │ │ @@ -105168,365 +105134,365 @@ │ │ ldr.w r3, [sp, #73] @ 0x49 │ │ cmp.w r6, #2147483648 @ 0x80000000 │ │ str.w r7, [fp, #20] │ │ str.w r3, [fp, #17] │ │ strb.w r9, [fp, #16] │ │ strd r2, r8, [fp, #8] │ │ strb.w r0, [fp, #4] │ │ - bne.n 6e2f2 │ │ + bne.n 6e3da │ │ add sp, #164 @ 0xa4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add r0, sp, #24 │ │ - bl 4b7a0 │ │ + bl 4baa8 │ │ add sp, #164 @ 0xa4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r0, fp │ │ clrex │ │ - bl 778fe │ │ - b.n 6e116 │ │ - bl 7770c │ │ + bl 77966 │ │ + b.n 6e1fe │ │ + bl 77774 │ │ eor.w r4, r0, #1 │ │ ldrb r0, [r6, #20] │ │ cmp r0, #0 │ │ - beq.w 6e12c │ │ - ldr r0, [pc, #40] @ (6e344 ) │ │ + beq.w 6e214 │ │ + ldr r0, [pc, #40] @ (6e42c ) │ │ add r2, sp, #64 @ 0x40 │ │ - ldr r3, [pc, #40] @ (6e348 ) │ │ - ldr r1, [pc, #40] @ (6e34c ) │ │ + ldr r3, [pc, #40] @ (6e430 ) │ │ + ldr r1, [pc, #40] @ (6e434 ) │ │ add r0, pc │ │ add r3, pc │ │ strb.w r4, [sp, #68] @ 0x44 │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ str.w fp, [sp, #64] @ 0x40 │ │ - bl 414b0 │ │ + bl 417b8 │ │ movs r0, #4 │ │ movs r1, #32 │ │ - bl 3dfa4 │ │ - lsls r4, r7, #25 │ │ + bl 3e2ac │ │ + lsls r4, r6, #22 │ │ movs r7, r0 │ │ - cbz r1, 6e360 │ │ - vqshlu.s32 d28, d24, #26 │ │ + add sp, #484 @ 0x1e4 │ │ + vrinta.f32 q14, q8 │ │ movs r6, r0 │ │ - ldmia r7!, {r1} │ │ + ldmia r6!, {r1, r3, r5} │ │ movs r6, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #44 @ 0x2c │ │ mov r4, r1 │ │ movs r6, #0 │ │ tbh [pc, r0, lsl #1] │ │ movs r6, r0 │ │ movs r6, r1 │ │ lsls r1, r5, #3 │ │ lsls r2, r4, #3 │ │ lsls r4, r6, #4 │ │ lsls r2, r0, #15 │ │ ldr r0, [r4, #0] │ │ movs r5, #0 │ │ - b.n 6e45e │ │ - blx d8810 │ │ + b.n 6e546 │ │ + blx d8820 │ │ cmp r6, #11 │ │ it cc │ │ addcc r6, #1 │ │ ldr r0, [r4, #0] │ │ dmb ish │ │ ldr.w r9, [r4, #4] │ │ dmb ish │ │ ubfx r5, r0, #1, #5 │ │ cmp r5, #31 │ │ - beq.n 6e41a │ │ + beq.n 6e502 │ │ adds r7, r0, #2 │ │ lsls r1, r0, #31 │ │ - bne.n 6e3b0 │ │ + bne.n 6e498 │ │ dmb ish │ │ lsrs r2, r0, #1 │ │ ldr r1, [r4, #32] │ │ cmp.w r2, r1, lsr #1 │ │ - beq.w 6e7d6 │ │ + beq.w 6e8be │ │ eors r1, r0 │ │ cmp r1, #63 @ 0x3f │ │ it hi │ │ orrhi.w r7, r7, #1 │ │ cmp.w r9, #0 │ │ - beq.n 6e430 │ │ + beq.n 6e518 │ │ ldrex r1, [r4] │ │ cmp r1, r0 │ │ - bne.n 6e3dc │ │ + bne.n 6e4c4 │ │ dmb ish │ │ strex r0, r7, [r4] │ │ cmp r0, #0 │ │ mov.w r0, #0 │ │ it eq │ │ moveq.w r0, #4294967295 @ 0xffffffff │ │ lsls r0, r0, #31 │ │ dmb ish │ │ - beq.n 6e3ec │ │ - b.n 6e802 │ │ + beq.n 6e4d4 │ │ + b.n 6e8ea │ │ movs r0, #0 │ │ clrex │ │ lsls r0, r0, #31 │ │ dmb ish │ │ - bne.w 6e802 │ │ + bne.w 6e8ea │ │ ldr.w r9, [r4, #4] │ │ mov r0, r6 │ │ movs r2, #1 │ │ cmp r6, #6 │ │ it cs │ │ movcs r0, #6 │ │ dmb ish │ │ lsrs.w r3, r2, r0 │ │ add.w r2, r2, #1 │ │ yield │ │ - beq.n 6e3fe │ │ + beq.n 6e4e6 │ │ cmp r6, #7 │ │ it cc │ │ addcc r6, #1 │ │ mov r0, r1 │ │ ubfx r5, r0, #1, #5 │ │ cmp r5, #31 │ │ - bne.n 6e390 │ │ + bne.n 6e478 │ │ cmp r6, #6 │ │ - bhi.n 6e370 │ │ + bhi.n 6e458 │ │ movs r0, #1 │ │ lsrs.w r1, r0, r6 │ │ add.w r0, r0, #1 │ │ yield │ │ - beq.n 6e420 │ │ + beq.n 6e508 │ │ adds r6, #1 │ │ - b.n 6e37a │ │ + b.n 6e462 │ │ cmp r6, #6 │ │ - bhi.n 6e446 │ │ + bhi.n 6e52e │ │ movs r0, #1 │ │ lsrs.w r1, r0, r6 │ │ add.w r0, r0, #1 │ │ yield │ │ - beq.n 6e436 │ │ + beq.n 6e51e │ │ adds r6, #1 │ │ - b.n 6e37a │ │ - blx d8810 │ │ + b.n 6e462 │ │ + blx d8820 │ │ cmp r6, #11 │ │ it cc │ │ addcc r6, #1 │ │ - b.n 6e37a │ │ - blx d8810 │ │ + b.n 6e462 │ │ + blx d8820 │ │ cmp r5, #11 │ │ it cc │ │ addcc r5, #1 │ │ ldr r0, [r4, #0] │ │ ldrd r2, r1, [r4, #68] @ 0x44 │ │ adds r6, r0, #1 │ │ subs r1, #1 │ │ ldr.w r3, [r4, #148] @ 0x94 │ │ and.w r7, r1, r0 │ │ add.w r1, r7, r7, lsl #1 │ │ add.w r1, r3, r1, lsl #2 │ │ ldr r3, [r1, #8] │ │ dmb ish │ │ cmp r6, r3 │ │ - bne.n 6e4ac │ │ + bne.n 6e594 │ │ ldr r6, [r4, #64] @ 0x40 │ │ adds r7, #1 │ │ cmp r7, r6 │ │ itttt cs │ │ negcs r2, r2 │ │ andcs r2, r0 │ │ ldrcs r3, [r4, #68] @ 0x44 │ │ addcs r3, r2 │ │ ldrex r2, [r4] │ │ cmp r2, r0 │ │ - bne.n 6e4e0 │ │ + bne.n 6e5c8 │ │ dmb ish │ │ strex r7, r3, [r4] │ │ - cbnz r7, 6e4e4 │ │ + cbnz r7, 6e5cc │ │ dmb ish │ │ movs r3, #1 │ │ - cbz r3, 6e4ec │ │ - b.n 6e7e2 │ │ + cbz r3, 6e5d4 │ │ + b.n 6e8ca │ │ cmp r3, r0 │ │ - bne.n 6e50c │ │ + bne.n 6e5f4 │ │ dmb ish │ │ ldr r1, [r4, #32] │ │ ldr r2, [r4, #72] @ 0x48 │ │ bics r1, r2 │ │ cmp r1, r0 │ │ - beq.w 6e7d6 │ │ + beq.w 6e8be │ │ movs r0, #6 │ │ movs r1, #1 │ │ cmp r5, #6 │ │ it cc │ │ movcc r0, r5 │ │ lsrs.w r2, r1, r0 │ │ add.w r1, r1, #1 │ │ yield │ │ - beq.n 6e4ca │ │ + beq.n 6e5b2 │ │ ldr r0, [r4, #0] │ │ cmp r5, #7 │ │ it cc │ │ addcc r5, #1 │ │ - b.n 6e45e │ │ + b.n 6e546 │ │ clrex │ │ movs r3, #0 │ │ cmp r3, #0 │ │ - bne.w 6e7e2 │ │ + bne.w 6e8ca │ │ movs r0, #6 │ │ movs r1, #1 │ │ cmp r5, #6 │ │ it cc │ │ movcc r0, r5 │ │ lsrs.w r3, r1, r0 │ │ add.w r1, r1, #1 │ │ yield │ │ - beq.n 6e4f6 │ │ + beq.n 6e5de │ │ cmp r5, #7 │ │ it cc │ │ addcc r5, #1 │ │ mov r0, r2 │ │ - b.n 6e45e │ │ + b.n 6e546 │ │ cmp r5, #6 │ │ - bhi.n 6e452 │ │ + bhi.n 6e53a │ │ movs r0, #1 │ │ lsrs.w r1, r0, r5 │ │ add.w r0, r0, #1 │ │ yield │ │ - beq.n 6e512 │ │ + beq.n 6e5fa │ │ adds r5, #1 │ │ - b.n 6e45c │ │ + b.n 6e544 │ │ ldrb r0, [r4, #24] │ │ cmp r0, #0 │ │ - beq.w 6e906 │ │ + beq.w 6e9ee │ │ mov.w sl, #0 │ │ - b.n 6eae2 │ │ + b.n 6ebca │ │ add.w r6, r4, #8 │ │ movs r0, #1 │ │ ldrex r1, [r6] │ │ cmp r1, #0 │ │ - bne.w 6ea68 │ │ + bne.w 6eb50 │ │ strex r1, r0, [r6] │ │ cmp r1, #0 │ │ - bne.n 6e536 │ │ + bne.n 6e61e │ │ dmb ish │ │ - ldr r5, [pc, #884] @ (6e8c4 ) │ │ + ldr r5, [pc, #884] @ (6e9ac ) │ │ add r5, pc │ │ ldr r0, [r5, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 6ea74 │ │ + bne.w 6eb5c │ │ mov.w r8, #0 │ │ ldrb r0, [r4, #12] │ │ cmp r0, #0 │ │ - bne.w 6ea84 │ │ + bne.w 6eb6c │ │ add.w r1, r4, #16 │ │ add r0, sp, #24 │ │ - bl 60f38 │ │ + bl 61020 │ │ ldr r7, [sp, #24] │ │ cmp r7, #0 │ │ - beq.w 6e92e │ │ + beq.w 6ea16 │ │ mov r0, r5 │ │ ldr r5, [sp, #32] │ │ cmp.w r8, #0 │ │ - bne.n 6e588 │ │ + bne.n 6e670 │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 6eaec │ │ + bne.w 6ebd4 │ │ movs r0, #0 │ │ dmb ish │ │ ldrex r1, [r6] │ │ strex r2, r0, [r6] │ │ cmp r2, #0 │ │ - bne.n 6e58e │ │ + bne.n 6e676 │ │ cmp r1, #2 │ │ - beq.w 6eaa0 │ │ + beq.w 6eb88 │ │ cmp r5, #0 │ │ - beq.w 6eab2 │ │ + beq.w 6eb9a │ │ ldrb r0, [r5, #9] │ │ cmp r0, #0 │ │ - beq.w 6e9d6 │ │ + beq.w 6eabe │ │ ldrd r6, sl, [r5] │ │ movs r0, #0 │ │ str r0, [r5, #0] │ │ cmp r6, #0 │ │ - beq.w 6eafa │ │ + beq.w 6ebe2 │ │ movs r0, #1 │ │ dmb ish │ │ strb r0, [r5, #8] │ │ - b.n 6eab8 │ │ + b.n 6eba0 │ │ movw r0, #19563 @ 0x4c6b │ │ add.w r2, r4, #8 │ │ movt r0, #1956 @ 0x7a4 │ │ str r2, [sp, #8] │ │ umull r0, r1, r2, r0 │ │ movs r5, #1 │ │ lsrs r0, r1, #1 │ │ movs r1, #67 @ 0x43 │ │ mls r0, r0, r1, r2 │ │ - ldr r1, [pc, #740] @ (6e8c8 ) │ │ + ldr r1, [pc, #740] @ (6e9b0 ) │ │ add r1, pc │ │ add.w sl, r1, r0, lsl #5 │ │ str.w sl, [sp, #12] │ │ add.w r7, sl, #4 │ │ - b.n 6e5fe │ │ + b.n 6e6e6 │ │ dmb ish │ │ str r0, [r7, #0] │ │ ldr.w sl, [sp, #12] │ │ add r0, sp, #24 │ │ - bl 94744 │ │ + bl 947b0 │ │ ldr r0, [sp, #32] │ │ str r0, [sp, #20] │ │ ldrd fp, r9, [sp, #24] │ │ ldr.w r1, [sl] │ │ dmb ish │ │ ldr.w r0, [sl, #4] │ │ dmb ish │ │ cmp r0, #1 │ │ - beq.n 6e642 │ │ + beq.n 6e72a │ │ ldr r2, [sp, #8] │ │ ldrd r6, r8, [r2] │ │ ldrd ip, r2, [r2, #8] │ │ dmb ish │ │ ldr.w r2, [sl, #4] │ │ dmb ish │ │ ldr.w r3, [sl] │ │ cmp r3, r1 │ │ it eq │ │ cmpeq r2, r0 │ │ - beq.n 6e69e │ │ + beq.n 6e786 │ │ ldrex r0, [r7] │ │ strex r1, r5, [r7] │ │ cmp r1, #0 │ │ - bne.n 6e642 │ │ + bne.n 6e72a │ │ cmp r0, #1 │ │ dmb ish │ │ - bne.n 6e68c │ │ + bne.n 6e774 │ │ movs r6, #0 │ │ cmp r6, #6 │ │ - bhi.n 6e66e │ │ + bhi.n 6e756 │ │ movs r0, #1 │ │ lsrs.w r1, r0, r6 │ │ add.w r0, r0, #1 │ │ yield │ │ - beq.n 6e65e │ │ + beq.n 6e746 │ │ adds r6, #1 │ │ - b.n 6e678 │ │ - blx d8810 │ │ + b.n 6e760 │ │ + blx d8820 │ │ cmp r6, #11 │ │ it cc │ │ addcc r6, #1 │ │ ldrex r0, [r7] │ │ strex r1, r5, [r7] │ │ cmp r1, #0 │ │ - bne.n 6e678 │ │ + bne.n 6e760 │ │ cmp r0, #1 │ │ dmb ish │ │ - beq.n 6e658 │ │ + beq.n 6e740 │ │ dmb ish │ │ ldrd r6, r8, [r4, #8] │ │ ldr r2, [r4, #16] │ │ dmb ish │ │ str r0, [r7, #0] │ │ - b.n 6e6a0 │ │ + b.n 6e788 │ │ mov r2, ip │ │ eor.w r0, fp, r6 │ │ eor.w r1, r9, r8 │ │ orrs r0, r1 │ │ subs.w r1, fp, r6 │ │ sbcs.w r1, r9, r8 │ │ mov.w r1, #0 │ │ @@ -105538,150 +105504,150 @@ │ │ mov.w r2, #0 │ │ it cc │ │ movcc r2, #1 │ │ cmp r0, #0 │ │ it ne │ │ movne r2, r1 │ │ cmp r2, #0 │ │ - bne.w 6ea4a │ │ + bne.w 6eb32 │ │ ldrd r0, r1, [r4, #24] │ │ eor.w r2, r9, r1 │ │ adds.w fp, fp, r0 │ │ adc.w sl, r9, r1 │ │ eor.w r0, r9, sl │ │ bics r0, r2 │ │ mov.w r0, #0 │ │ it mi │ │ movmi r0, #1 │ │ cmp r1, #0 │ │ mov.w r1, #0 │ │ it mi │ │ movmi r1, #1 │ │ eors r1, r0 │ │ - bne.n 6e7c8 │ │ + bne.n 6e8b0 │ │ ldr r0, [r4, #32] │ │ ldr r1, [sp, #20] │ │ add.w r9, r0, r1 │ │ movw r0, #51712 @ 0xca00 │ │ movt r0, #15258 @ 0x3b9a │ │ cmp r9, r0 │ │ - bcc.n 6e732 │ │ + bcc.n 6e81a │ │ adds.w fp, fp, #1 │ │ adc.w r0, sl, #0 │ │ eor.w r1, sl, r0 │ │ bics.w r1, r1, sl │ │ - bmi.n 6e7c8 │ │ + bmi.n 6e8b0 │ │ movw r1, #13824 @ 0x3600 │ │ mov sl, r0 │ │ movt r1, #50277 @ 0xc465 │ │ add r9, r1 │ │ ldrex r0, [r7] │ │ strex r1, r5, [r7] │ │ cmp r1, #0 │ │ - bne.n 6e732 │ │ + bne.n 6e81a │ │ cmp r0, #1 │ │ dmb ish │ │ - bne.n 6e780 │ │ + bne.n 6e868 │ │ str r6, [sp, #20] │ │ movs r6, #0 │ │ cmp r6, #6 │ │ - bhi.n 6e760 │ │ + bhi.n 6e848 │ │ movs r0, #1 │ │ lsrs.w r1, r0, r6 │ │ add.w r0, r0, #1 │ │ yield │ │ - beq.n 6e750 │ │ + beq.n 6e838 │ │ adds r6, #1 │ │ - b.n 6e76a │ │ - blx d8810 │ │ + b.n 6e852 │ │ + blx d8820 │ │ cmp r6, #11 │ │ it cc │ │ addcc r6, #1 │ │ ldrex r0, [r7] │ │ strex r1, r5, [r7] │ │ cmp r1, #0 │ │ - bne.n 6e76a │ │ + bne.n 6e852 │ │ cmp r0, #1 │ │ dmb ish │ │ - beq.n 6e74a │ │ + beq.n 6e832 │ │ ldr r6, [sp, #20] │ │ dmb ish │ │ ldrd r1, r2, [r4, #8] │ │ eor.w r2, r2, r8 │ │ eors r1, r6 │ │ orrs r1, r2 │ │ - bne.w 6e5f4 │ │ + bne.w 6e6dc │ │ ldr r1, [r4, #16] │ │ ldr r2, [sp, #16] │ │ cmp r1, r2 │ │ - bne.w 6e5f4 │ │ + bne.w 6e6dc │ │ adds r0, #2 │ │ strd fp, sl, [r4, #8] │ │ str.w r9, [r4, #16] │ │ - bne.n 6e7b6 │ │ + bne.n 6e89e │ │ ldr r2, [sp, #12] │ │ ldr r1, [r2, #0] │ │ dmb ish │ │ adds r1, #1 │ │ str r1, [r2, #0] │ │ mov sl, r8 │ │ dmb ish │ │ str r0, [r7, #0] │ │ mov r0, r6 │ │ mov r1, sl │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #864] @ (6eb2c ) │ │ + ldr r0, [pc, #864] @ (6ec14 ) │ │ movs r1, #40 @ 0x28 │ │ - ldr r2, [pc, #864] @ (6eb30 ) │ │ + ldr r2, [pc, #864] @ (6ec18 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 41488 │ │ + bl 41790 │ │ movs r6, #0 │ │ mov r0, r6 │ │ mov r1, sl │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r2, [r4, #68] @ 0x44 │ │ ldrd r6, sl, [r1] │ │ dmb ish │ │ add r0, r2 │ │ str r0, [r1, #8] │ │ add.w r0, r4, #76 @ 0x4c │ │ - bl 60d70 │ │ + bl 60e58 │ │ mov r0, r6 │ │ mov r1, sl │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ cmp r5, #30 │ │ - bne.n 6e862 │ │ + bne.n 6e94a │ │ ldr.w r0, [r9] │ │ dmb ish │ │ - cbnz r0, 6e848 │ │ + cbnz r0, 6e930 │ │ movs r6, #0 │ │ - b.n 6e828 │ │ - blx d8810 │ │ + b.n 6e910 │ │ + blx d8820 │ │ cmp r6, #11 │ │ it cc │ │ addcc r6, #1 │ │ ldr.w r0, [r9] │ │ dmb ish │ │ - cbnz r0, 6e848 │ │ + cbnz r0, 6e930 │ │ cmp r6, #6 │ │ - bhi.n 6e814 │ │ + bhi.n 6e8fc │ │ movs r0, #1 │ │ lsrs.w r1, r0, r6 │ │ add.w r0, r0, #1 │ │ yield │ │ - beq.n 6e82e │ │ + beq.n 6e916 │ │ adds r6, #1 │ │ ldr.w r0, [r9] │ │ dmb ish │ │ cmp r0, #0 │ │ - beq.n 6e828 │ │ + beq.n 6e910 │ │ ldr r1, [r0, #0] │ │ dmb ish │ │ str r0, [r4, #4] │ │ bic.w r0, r7, #1 │ │ cmp r1, #0 │ │ it ne │ │ addne r0, #1 │ │ @@ -105691,406 +105657,383 @@ │ │ add.w r0, r5, r5, lsl #1 │ │ add.w r0, r9, r0, lsl #2 │ │ add.w r4, r0, #12 │ │ adds r6, r0, #4 │ │ ldr r1, [r0, #12] │ │ dmb ish │ │ lsls r0, r1, #31 │ │ - bne.n 6e8b0 │ │ + bne.n 6e998 │ │ movs r7, #0 │ │ - b.n 6e892 │ │ - blx d8810 │ │ + b.n 6e97a │ │ + blx d8820 │ │ cmp r7, #11 │ │ it cc │ │ addcc r7, #1 │ │ ldr r0, [r4, #0] │ │ dmb ish │ │ lsls r0, r0, #31 │ │ - bne.n 6e8b0 │ │ + bne.n 6e998 │ │ cmp r7, #6 │ │ - bhi.n 6e87e │ │ + bhi.n 6e966 │ │ movs r0, #1 │ │ lsrs.w r1, r0, r7 │ │ add.w r0, r0, #1 │ │ yield │ │ - beq.n 6e898 │ │ + beq.n 6e980 │ │ adds r7, #1 │ │ ldr r0, [r4, #0] │ │ dmb ish │ │ lsls r0, r0, #31 │ │ - beq.n 6e892 │ │ + beq.n 6e97a │ │ ldrd r6, sl, [r6] │ │ adds r0, r5, #1 │ │ cmp r0, #31 │ │ mov ip, r6 │ │ - bne.n 6e964 │ │ + bne.n 6ea4c │ │ add.w r0, r9, #12 │ │ movs r1, #0 │ │ - b.n 6e8d2 │ │ - lsls r6, r0, #9 │ │ + b.n 6e9ba │ │ + lsls r6, r7, #5 │ │ movs r7, r0 │ │ - ldrsh.w r0, [r8, r6] │ │ + ldr??.w r0, [r0, r6] │ │ adds r1, #1 │ │ cmp r1, #30 │ │ - beq.n 6e9c6 │ │ + beq.n 6eaae │ │ add.w r2, r1, r1, lsl #1 │ │ ldr.w r3, [r0, r2, lsl #2] │ │ dmb ish │ │ lsls r3, r3, #30 │ │ - bmi.n 6e8cc │ │ + bmi.n 6e9b4 │ │ add.w r2, r0, r2, lsl #2 │ │ dmb ish │ │ ldrex r3, [r2] │ │ orr.w r7, r3, #4 │ │ strex r6, r7, [r2] │ │ cmp r6, #0 │ │ - bne.n 6e8ea │ │ + bne.n 6e9d2 │ │ mov r6, ip │ │ lsls r2, r3, #30 │ │ dmb ish │ │ - bmi.n 6e8cc │ │ - b.n 6eae2 │ │ + bmi.n 6e9b4 │ │ + b.n 6ebca │ │ add r0, sp, #24 │ │ - bl 94744 │ │ + bl 947b0 │ │ ldrd r0, r1, [sp, #24] │ │ ldrd r3, r2, [r4, #8] │ │ eor.w r7, r1, r2 │ │ eor.w r6, r0, r3 │ │ orrs r7, r6 │ │ - bne.w 6ea26 │ │ + bne.w 6eb0e │ │ ldr r0, [sp, #32] │ │ ldr r1, [r4, #16] │ │ cmp r0, r1 │ │ - bcs.w 6ea2e │ │ - b.n 6ea4a │ │ + bcs.w 6eb16 │ │ + b.n 6eb32 │ │ ldrb.w sl, [r4, #64] @ 0x40 │ │ cmp.w r8, #0 │ │ - bne.n 6e940 │ │ + bne.n 6ea28 │ │ ldr r0, [r5, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 6eb0a │ │ + bne.w 6ebf2 │ │ movs r0, #0 │ │ dmb ish │ │ ldrex r1, [r6] │ │ strex r2, r0, [r6] │ │ cmp r2, #0 │ │ - bne.n 6e946 │ │ + bne.n 6ea2e │ │ cmp r1, #2 │ │ - bne.n 6ea4e │ │ + bne.n 6eb36 │ │ movs r0, #240 @ 0xf0 │ │ mov r1, r6 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ - b.n 6ea4e │ │ + blx d87e0 │ │ + b.n 6eb36 │ │ dmb ish │ │ ldrex r1, [r4] │ │ orr.w r2, r1, #2 │ │ strex r3, r2, [r4] │ │ cmp r3, #0 │ │ - bne.n 6e968 │ │ + bne.n 6ea50 │ │ lsls r1, r1, #29 │ │ dmb ish │ │ - bpl.w 6eae2 │ │ + bpl.w 6ebca │ │ cmp r5, #28 │ │ - bhi.n 6e9c6 │ │ + bhi.n 6eaae │ │ add.w r1, r9, #12 │ │ - b.n 6e992 │ │ + b.n 6ea7a │ │ adds r0, #1 │ │ cmp r0, #30 │ │ - beq.n 6e9c6 │ │ + beq.n 6eaae │ │ add.w r2, r0, r0, lsl #1 │ │ ldr.w r3, [r1, r2, lsl #2] │ │ dmb ish │ │ lsls r3, r3, #30 │ │ - bmi.n 6e98c │ │ + bmi.n 6ea74 │ │ add.w r2, r1, r2, lsl #2 │ │ dmb ish │ │ ldrex r3, [r2] │ │ orr.w r7, r3, #4 │ │ strex r6, r7, [r2] │ │ cmp r6, #0 │ │ - bne.n 6e9aa │ │ + bne.n 6ea92 │ │ mov r6, ip │ │ lsls r2, r3, #30 │ │ dmb ish │ │ - bmi.n 6e98c │ │ - b.n 6eae2 │ │ + bmi.n 6ea74 │ │ + b.n 6ebca │ │ mov r0, r9 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r6 │ │ mov r1, sl │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrb r0, [r5, #8] │ │ dmb ish │ │ - cbnz r0, 6ea12 │ │ + cbnz r0, 6eafa │ │ movs r4, #0 │ │ - b.n 6e9f4 │ │ - blx d8810 │ │ + b.n 6eadc │ │ + blx d8820 │ │ cmp r4, #11 │ │ it cc │ │ addcc r4, #1 │ │ ldrb r0, [r5, #8] │ │ dmb ish │ │ - cbnz r0, 6ea12 │ │ + cbnz r0, 6eafa │ │ cmp r4, #6 │ │ - bhi.n 6e9e2 │ │ + bhi.n 6eaca │ │ movs r0, #1 │ │ lsrs.w r1, r0, r4 │ │ add.w r0, r0, #1 │ │ yield │ │ - beq.n 6e9fa │ │ + beq.n 6eae2 │ │ adds r4, #1 │ │ ldrb r0, [r5, #8] │ │ dmb ish │ │ cmp r0, #0 │ │ - beq.n 6e9f4 │ │ + beq.n 6eadc │ │ ldrd r6, sl, [r5] │ │ movs r0, #0 │ │ str r0, [r5, #0] │ │ cmp r6, #0 │ │ - beq.n 6eb02 │ │ + beq.n 6ebea │ │ mov r0, r5 │ │ - blx d87c0 │ │ - b.n 6eab8 │ │ + blx d87d0 │ │ + b.n 6eba0 │ │ subs r0, r0, r3 │ │ sbcs.w r0, r1, r2 │ │ - blt.n 6ea4a │ │ + blt.n 6eb32 │ │ add.w r0, r4, #24 │ │ movs r2, #1 │ │ dmb ish │ │ ldrexb r1, [r0] │ │ strexb r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 6ea38 │ │ + bne.n 6eb20 │ │ dmb ish │ │ - cbz r1, 6ea5a │ │ + cbz r1, 6eb42 │ │ mov.w sl, #0 │ │ movs r6, #0 │ │ mov r0, r6 │ │ mov r1, sl │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrd r6, sl, [r4, #8] │ │ mov r0, r6 │ │ mov r1, sl │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r0, r6 │ │ clrex │ │ - bl 778fe │ │ - b.n 6e54c │ │ - bl 7770c │ │ + bl 77966 │ │ + b.n 6e634 │ │ + bl 77774 │ │ eor.w r8, r0, #1 │ │ ldrb r0, [r4, #12] │ │ cmp r0, #0 │ │ - beq.w 6e564 │ │ - ldr r0, [pc, #152] @ (6eb20 ) │ │ + beq.w 6e64c │ │ + ldr r0, [pc, #152] @ (6ec08 ) │ │ add r2, sp, #24 │ │ - ldr r3, [pc, #152] @ (6eb24 ) │ │ - ldr r1, [pc, #156] @ (6eb28 ) │ │ + ldr r3, [pc, #152] @ (6ec0c ) │ │ + ldr r1, [pc, #156] @ (6ec10 ) │ │ add r0, pc │ │ add r3, pc │ │ strb.w r8, [sp, #28] │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ str r6, [sp, #24] │ │ - bl 414b0 │ │ + bl 417b8 │ │ movs r0, #240 @ 0xf0 │ │ mov r1, r6 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ + blx d87e0 │ │ cmp r5, #0 │ │ - bne.w 6e5a6 │ │ + bne.w 6e68e │ │ movs r6, #0 │ │ mov.w sl, #1 │ │ dmb ish │ │ ldrex r0, [r7] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r7] │ │ cmp r2, #0 │ │ - bne.n 6eabc │ │ + bne.n 6eba4 │ │ cmp r0, #1 │ │ - bne.n 6eae2 │ │ + bne.n 6ebca │ │ mov r0, r7 │ │ dmb ish │ │ - bl 418c8 │ │ + bl 41bd0 │ │ mov r0, r6 │ │ mov r1, sl │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r0, r6 │ │ mov r1, sl │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - bl 7770c │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq r0, [r4, #12] │ │ - b.n 6e588 │ │ - ldr r0, [pc, #32] @ (6eb1c ) │ │ + b.n 6e670 │ │ + ldr r0, [pc, #32] @ (6ec04 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #20] @ (6eb18 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #20] @ (6ec00 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - bl 7770c │ │ + bl 3fd40 │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq r0, [r4, #12] │ │ - b.n 6e940 │ │ - pop {r3, r4, r6, r7} │ │ + b.n 6ea28 │ │ + pop {} │ │ movs r6, r0 │ │ - pop {r4, r5, r6, r7} │ │ + pop {r3, r4} │ │ movs r6, r0 │ │ - add r1, sp, #988 @ 0x3dc │ │ - @ instruction: 0xfffabeae │ │ + add r1, sp, #60 @ 0x3c │ │ + vqrdmulh.s , q13, d22[0] │ │ movs r6, r0 │ │ - pop {r3, r5, r6, pc} │ │ + pop {r4, r7} │ │ movs r6, r0 │ │ - add r4, sp, #40 @ 0x28 │ │ - vrint?.f32 d29, d8 │ │ + add r3, sp, #136 @ 0x88 │ │ + vqshlu.s32 d29, d16, #26 │ │ movs r6, r0 │ │ push {r4, lr} │ │ ldr r4, [r0, #0] │ │ ldrb r1, [r0, #4] │ │ - cbnz r1, 6eb46 │ │ - ldr r0, [pc, #60] @ (6eb7c ) │ │ + cbnz r1, 6ec2e │ │ + ldr r0, [pc, #60] @ (6ec64 ) │ │ add r0, pc │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.n 6eb6e │ │ + bne.n 6ec56 │ │ movs r0, #0 │ │ dmb ish │ │ ldrex r1, [r4] │ │ strex r2, r0, [r4] │ │ cmp r2, #0 │ │ - bne.n 6eb4c │ │ + bne.n 6ec34 │ │ cmp r1, #2 │ │ it ne │ │ popne {r4, pc} │ │ movs r0, #240 @ 0xf0 │ │ mov r1, r4 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ ldmia.w sp!, {r4, lr} │ │ - b.w d8700 │ │ - bl 7770c │ │ + b.w d8710 │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq r0, [r4, #4] │ │ - b.n 6eb46 │ │ - mrrc2 0, 0, r0, r6, cr6 │ │ - push {r4, r5, r7, lr} │ │ - ldrd r4, r0, [r1] │ │ - movs r2, #11 │ │ - ldr r3, [r0, #12] │ │ - ldr r1, [pc, #32] @ (6ebac ) │ │ - mov r0, r4 │ │ - add r1, pc │ │ - mov r5, r3 │ │ - blx r3 │ │ - cbz r0, 6eb9a │ │ - movs r0, #1 │ │ - pop {r4, r5, r7, pc} │ │ - ldr r1, [pc, #20] @ (6ebb0 ) │ │ - mov r0, r4 │ │ - movs r2, #7 │ │ - mov r3, r5 │ │ - add r1, pc │ │ - ldmia.w sp!, {r4, r5, r7, lr} │ │ - bx r3 │ │ - nop │ │ - add r1, sp, #128 @ 0x80 │ │ - @ instruction: 0xfffa3e91 │ │ - vtbl.8 d30, {d10-d11}, d29 │ │ - blx lr │ │ + b.n 6ec2e │ │ + smull r0, r0, lr, r6 │ │ + stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ mov r6, r0 │ │ subs.w r0, r0, #1000 @ 0x3e8 │ │ mov r4, r2 │ │ mov r5, r1 │ │ sbcs.w r0, r1, #0 │ │ - bcc.w 6ed2e │ │ + bcc.w 6ede2 │ │ mov r0, r6 │ │ mov r1, r5 │ │ movw r2, #10000 @ 0x2710 │ │ movs r3, #0 │ │ movw r7, #10000 @ 0x2710 │ │ mov.w sl, #0 │ │ - bl d53d0 │ │ + bl d53dc │ │ mls r2, r0, r7, r6 │ │ movw r8, #5243 @ 0x147b │ │ mvn.w r9, #99 @ 0x63 │ │ - ldr r7, [pc, #480] @ (6edd0 ) │ │ + ldr r7, [pc, #480] @ (6ee84 ) │ │ add r7, pc │ │ mul.w r3, r2, r8 │ │ lsrs r3, r3, #19 │ │ smlabb r2, r3, r9, r2 │ │ ldrh.w r3, [r7, r3, lsl #1] │ │ strh r3, [r4, #16] │ │ ldrh.w r2, [r7, r2, lsl #1] │ │ strh r2, [r4, #18] │ │ movw r2, #38527 @ 0x967f │ │ movt r2, #152 @ 0x98 │ │ subs r2, r2, r6 │ │ sbcs.w r2, sl, r5 │ │ - bcs.w 6ed40 │ │ + bcs.w 6edf4 │ │ movw r2, #10000 @ 0x2710 │ │ movs r3, #0 │ │ - bl d53d0 │ │ + bl d53dc │ │ mul.w r0, r2, r8 │ │ movs r3, #0 │ │ lsrs r0, r0, #19 │ │ smlabb r1, r0, r9, r2 │ │ ldrh.w r0, [r7, r0, lsl #1] │ │ movw r2, #57600 @ 0xe100 │ │ strh r0, [r4, #12] │ │ movt r2, #1525 @ 0x5f5 │ │ mov r0, r6 │ │ ldrh.w r1, [r7, r1, lsl #1] │ │ strh r1, [r4, #14] │ │ mov r1, r5 │ │ - bl d53d0 │ │ + bl d53dc │ │ movw r2, #59392 @ 0xe800 │ │ movt r2, #18550 @ 0x4876 │ │ subs r2, r6, r2 │ │ sbcs.w r2, r5, #23 │ │ - bcc.n 6ed4e │ │ + bcc.n 6ee02 │ │ movw r2, #10000 @ 0x2710 │ │ movs r3, #0 │ │ movw r8, #10000 @ 0x2710 │ │ - bl d53d0 │ │ + bl d53dc │ │ movw r9, #5243 @ 0x147b │ │ mvn.w sl, #99 @ 0x63 │ │ mul.w r0, r2, r9 │ │ movs r3, #232 @ 0xe8 │ │ lsrs r0, r0, #19 │ │ smlabb r1, r0, sl, r2 │ │ ldrh.w r0, [r7, r0, lsl #1] │ │ movw r2, #4096 @ 0x1000 │ │ strh r0, [r4, #8] │ │ movt r2, #54437 @ 0xd4a5 │ │ mov r0, r6 │ │ ldrh.w r1, [r7, r1, lsl #1] │ │ strh r1, [r4, #10] │ │ mov r1, r5 │ │ - bl d53d0 │ │ + bl d53dc │ │ movw r3, #32768 @ 0x8000 │ │ movw r2, #36222 @ 0x8d7e │ │ movt r3, #42182 @ 0xa4c6 │ │ movt r2, #3 │ │ subs r3, r6, r3 │ │ sbcs.w r2, r5, r2 │ │ - bcc.n 6ed5c │ │ + bcc.n 6ee10 │ │ movw r1, #5977 @ 0x1759 │ │ movw r3, #34546 @ 0x86f2 │ │ movt r1, #53687 @ 0xd1b7 │ │ movt r3, #35 @ 0x23 │ │ umull r1, r2, r0, r1 │ │ lsrs r1, r2, #13 │ │ movs r2, #0 │ │ @@ -106101,105 +106044,105 @@ │ │ smlabb r0, r1, sl, r0 │ │ ldrh.w r1, [r7, r1, lsl #1] │ │ strh r1, [r4, #4] │ │ mov r1, r5 │ │ ldrh.w r0, [r7, r0, lsl #1] │ │ strh r0, [r4, #6] │ │ mov r0, r6 │ │ - bl d53d0 │ │ + bl d53dc │ │ movs r3, #0 │ │ movw r2, #8964 @ 0x2304 │ │ movt r3, #35304 @ 0x89e8 │ │ movt r2, #35527 @ 0x8ac7 │ │ subs r3, r6, r3 │ │ sbcs.w r2, r5, r2 │ │ - bcc.n 6ed8e │ │ + bcc.n 6ee42 │ │ movw r1, #5243 @ 0x147b │ │ mvn.w r2, #99 @ 0x63 │ │ muls r1, r0 │ │ movs r3, #0 │ │ lsrs r1, r1, #19 │ │ smlabb r0, r1, r2, r0 │ │ ldrh.w r1, [r7, r1, lsl #1] │ │ movs r2, #0 │ │ strh r1, [r4, #0] │ │ movs r1, #0 │ │ ldrh.w r0, [r7, r0, lsl #1] │ │ strh r0, [r4, #2] │ │ orrs.w r0, r6, r5 │ │ - bne.n 6eda2 │ │ - b.n 6edae │ │ + bne.n 6ee56 │ │ + b.n 6ee62 │ │ movs r2, #20 │ │ mov r0, r6 │ │ mov r1, r5 │ │ movs r3, #0 │ │ rsbs r7, r0, #9 │ │ sbcs r3, r1 │ │ - bcc.n 6ed68 │ │ - b.n 6ed9a │ │ + bcc.n 6ee1c │ │ + b.n 6ee4e │ │ movs r2, #16 │ │ movs r3, #0 │ │ rsbs r7, r0, #9 │ │ sbcs r3, r1 │ │ - bcc.n 6ed68 │ │ - b.n 6ed9a │ │ + bcc.n 6ee1c │ │ + b.n 6ee4e │ │ movs r2, #12 │ │ movs r3, #0 │ │ rsbs r7, r0, #9 │ │ sbcs r3, r1 │ │ - bcc.n 6ed68 │ │ - b.n 6ed9a │ │ + bcc.n 6ee1c │ │ + b.n 6ee4e │ │ movs r2, #8 │ │ movs r3, #0 │ │ rsbs r7, r0, #9 │ │ sbcs r3, r1 │ │ - bcs.n 6ed9a │ │ + bcs.n 6ee4e │ │ movw r1, #5243 @ 0x147b │ │ subs r2, #2 │ │ muls r1, r0 │ │ lsrs r3, r1, #19 │ │ mvn.w r1, #99 @ 0x63 │ │ smlabb r0, r3, r1, r0 │ │ - ldr r1, [pc, #92] @ (6edd8 ) │ │ + ldr r1, [pc, #92] @ (6ee8c ) │ │ add r1, pc │ │ ldrh.w r0, [r1, r0, lsl #1] │ │ movs r1, #0 │ │ strh r0, [r4, r2] │ │ orrs.w r0, r6, r5 │ │ - bne.n 6eda2 │ │ - b.n 6edae │ │ + bne.n 6ee56 │ │ + b.n 6ee62 │ │ movs r2, #4 │ │ movs r3, #0 │ │ rsbs r7, r0, #9 │ │ sbcs r3, r1 │ │ - bcc.n 6ed68 │ │ + bcc.n 6ee1c │ │ mov r3, r0 │ │ orrs.w r0, r6, r5 │ │ - beq.n 6edae │ │ + beq.n 6ee62 │ │ orrs.w r0, r3, r1 │ │ - bne.n 6edae │ │ + bne.n 6ee62 │ │ mov r0, r2 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ subs r2, #1 │ │ cmp r2, #20 │ │ - bcs.n 6edc0 │ │ + bcs.n 6ee74 │ │ orr.w r0, r3, #48 @ 0x30 │ │ strb r0, [r4, r2] │ │ mov r0, r2 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ - ldr r2, [pc, #16] @ (6edd4 ) │ │ + ldr r2, [pc, #16] @ (6ee88 ) │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ movs r1, #20 │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ nop │ │ - subs r6, r1, r5 │ │ - vrsqrte.u32 d28, d28 │ │ + subs r2, r3, r2 │ │ + vrecpe.u32 d28, d8 │ │ movs r6, r0 │ │ - adds r0, r0, r7 │ │ + adds r4, r1, r4 │ │ vsli.64 , q8, #59 @ 0x3b │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #124 @ 0x7c │ │ str r0, [sp, #48] @ 0x30 │ │ movw r0, #10392 @ 0x2898 │ │ add.w lr, r1, r0 │ │ @@ -106250,15 +106193,15 @@ │ │ ldr.w sl, [r7, #12] │ │ str.w fp, [sp, #52] @ 0x34 │ │ str.w r8, [sp, #20] │ │ str.w lr, [sp, #60] @ 0x3c │ │ uxtb r0, r6 │ │ mov r9, r6 │ │ cmp r0, #24 │ │ - bhi.w 702e0 │ │ + bhi.w 70394 │ │ movs r6, #0 │ │ tbh [pc, r0, lsl #1] │ │ movs r1, r3 │ │ lsls r4, r3, #7 │ │ lsls r5, r3, #8 │ │ lsls r3, r1, #9 │ │ lsls r7, r1, #7 │ │ @@ -106281,396 +106224,396 @@ │ │ lsls r6, r1, #17 │ │ movs r0, r5 │ │ lsls r0, r5, #7 │ │ lsrs r0, r3, #1 │ │ add r0, sp, #88 @ 0x58 │ │ movs r1, #17 │ │ mov r4, ip │ │ - bl d518e │ │ + bl d521e │ │ ldr.w lr, [sp, #60] @ 0x3c │ │ movs r6, #1 │ │ movs r0, #0 │ │ mov ip, r4 │ │ strd r0, r0, [lr, #44] @ 0x2c │ │ strd r6, r6, [lr, #52] @ 0x34 │ │ - b.n 6ee82 │ │ + b.n 6ef36 │ │ ldr r3, [sp, #96] @ 0x60 │ │ movs r6, #30 │ │ cmp ip, r3 │ │ - bcc.n 6ee82 │ │ + bcc.n 6ef36 │ │ cmp r3, sl │ │ - bhi.n 6ee82 │ │ + bhi.n 6ef36 │ │ ldr r0, [sp, #100] @ 0x64 │ │ add.w r4, r0, ip │ │ cmp r4, sl │ │ - bhi.w 6f9d4 │ │ + bhi.w 6fa88 │ │ sub.w r1, ip, r3 │ │ cmp r1, ip │ │ itt cs │ │ negcs r1, r3 │ │ cmpcs r0, r1 │ │ - bhi.w 6f9d4 │ │ + bhi.w 6fa88 │ │ str r0, [sp, #0] │ │ mov r1, sl │ │ ldr r0, [r7, #8] │ │ mov r2, ip │ │ - bl 70968 │ │ + bl 70a1c │ │ ldr.w lr, [sp, #60] @ 0x3c │ │ movs r6, #12 │ │ mov ip, r4 │ │ - b.n 6ee82 │ │ + b.n 6ef36 │ │ cmp sl, ip │ │ - beq.w 6fe9c │ │ - bls.w 703a2 │ │ + beq.w 6ff50 │ │ + bls.w 70456 │ │ add r2, sp, #92 @ 0x5c │ │ ldr r3, [r7, #8] │ │ movs r6, #17 │ │ ldmia r2, {r0, r1, r2} │ │ strb.w r1, [r3, ip] │ │ subs r1, r2, #1 │ │ cmp r0, #0 │ │ str r1, [sp, #100] @ 0x64 │ │ it eq │ │ moveq r6, #6 │ │ cmp r1, #0 │ │ it eq │ │ moveq r6, #6 │ │ add.w ip, ip, #1 │ │ - b.n 6ee82 │ │ + b.n 6ef36 │ │ ldr r0, [sp, #100] @ 0x64 │ │ movs r6, #21 │ │ cmp r0, #255 @ 0xff │ │ - bhi.w 6ee82 │ │ + bhi.w 6ef36 │ │ cmp sl, ip │ │ - beq.w 6fe9c │ │ - bls.w 703a2 │ │ + beq.w 6ff50 │ │ + bls.w 70456 │ │ ldr r1, [r7, #8] │ │ strb.w r0, [r1, ip] │ │ add.w ip, ip, #1 │ │ - b.n 6f5aa │ │ + b.n 6f65e │ │ ldr.w r9, [sp, #56] @ 0x38 │ │ mov r5, fp │ │ ldrh.w r2, [lr, #76] @ 0x4c │ │ ldrh.w r0, [lr, #78] @ 0x4e │ │ ldr r1, [sp, #100] @ 0x64 │ │ add r0, r2 │ │ cmp r1, r0 │ │ - bcs.n 6f014 │ │ + bcs.n 6f0c8 │ │ ldr r0, [sp, #92] @ 0x5c │ │ cmp r0, #15 │ │ - bcs.n 6f080 │ │ + bcs.n 6f134 │ │ cmp r5, #1 │ │ - bhi.n 6f084 │ │ + bhi.n 6f138 │ │ ldr r2, [sp, #88] @ 0x58 │ │ mov r4, r5 │ │ mov r3, r0 │ │ mov r0, r2 │ │ ldr r6, [sp, #80] @ 0x50 │ │ bfc r0, #10, #22 │ │ ldrsh.w r0, [r6, r0, lsl #1] │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - ble.n 6efb4 │ │ + ble.n 6f068 │ │ uxth r6, r0 │ │ cmp.w r6, #512 @ 0x200 │ │ itt cs │ │ lsrcs r0, r0, #9 │ │ cmpcs r3, r0 │ │ - bcc.n 6efe6 │ │ - b.n 6f09a │ │ + bcc.n 6f09a │ │ + b.n 6f14e │ │ cmp r3, #11 │ │ - bcc.n 6efe6 │ │ + bcc.n 6f09a │ │ movs r6, #11 │ │ subs r5, r6, #1 │ │ mvns r0, r0 │ │ and.w r5, r5, #31 │ │ lsr.w r5, r2, r5 │ │ and.w r5, r5, #1 │ │ add r0, r5 │ │ lsrs r5, r0, #6 │ │ cmp r5, #8 │ │ - bhi.w 70360 │ │ + bhi.w 70414 │ │ ldr r5, [sp, #84] @ 0x54 │ │ ldrsh.w r0, [r5, r0, lsl #1] │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 6f09a │ │ + bgt.n 6f14e │ │ adds r6, #1 │ │ cmp r3, r6 │ │ - bcs.n 6efba │ │ + bcs.n 6f06e │ │ cmp r4, #0 │ │ - beq.w 6f132 │ │ + beq.w 6f1e6 │ │ ldrb.w r6, [r8], #1 │ │ add.w r0, r3, #8 │ │ mov.w fp, #0 │ │ cmp r3, #7 │ │ mov.w r4, #0 │ │ mov.w r5, #0 │ │ lsl.w r6, r6, r3 │ │ orr.w r2, r2, r6 │ │ mov r3, r0 │ │ str r0, [sp, #92] @ 0x5c │ │ str r2, [sp, #88] @ 0x58 │ │ - bcc.n 6ef92 │ │ - b.n 6f09e │ │ - bne.w 6fa9a │ │ + bcc.n 6f046 │ │ + b.n 6f152 │ │ + bne.w 6fb4e │ │ cmp.w r2, #288 @ 0x120 │ │ - bhi.w 702e4 │ │ + bhi.w 70398 │ │ ldr r0, [sp, #68] @ 0x44 │ │ mov r1, r9 │ │ mov r4, ip │ │ - bl d52ca │ │ + bl d4c3c │ │ ldr r3, [sp, #60] @ 0x3c │ │ ldrh.w r0, [r3, #76] @ 0x4c │ │ ldrh.w r2, [r3, #78] @ 0x4e │ │ adds r1, r2, r0 │ │ bfc r0, #9, #23 │ │ bfc r1, #9, #23 │ │ cmp r1, r0 │ │ - bcc.w 702f4 │ │ + bcc.w 703a8 │ │ and.w r2, r2, #31 │ │ subs r1, r1, r0 │ │ cmp r1, r2 │ │ - bne.w 70300 │ │ + bne.w 703b4 │ │ add.w r1, r9, r0 │ │ ldr r0, [sp, #64] @ 0x40 │ │ mov r6, r3 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldrb.w r0, [r6, #83] @ 0x53 │ │ add r1, sp, #88 @ 0x58 │ │ subs r0, #1 │ │ strb.w r0, [r6, #83] @ 0x53 │ │ mov r0, r9 │ │ - bl 703e4 │ │ + bl 70498 │ │ mov r6, r1 │ │ uxtb r1, r0 │ │ cmp r1, #3 │ │ - beq.w 6ff3a │ │ + beq.w 6ffee │ │ ldr.w lr, [sp, #60] @ 0x3c │ │ mov ip, r4 │ │ - b.n 6f138 │ │ + b.n 6f1ec │ │ ldr r2, [sp, #88] @ 0x58 │ │ - b.n 6f09e │ │ + b.n 6f152 │ │ ldrh.w r2, [r8], #2 │ │ sub.w fp, r5, #2 │ │ ldr r3, [sp, #88] @ 0x58 │ │ mov r5, fp │ │ lsls r2, r0 │ │ orr.w r0, r0, #16 │ │ orrs r2, r3 │ │ - b.n 6f09e │ │ + b.n 6f152 │ │ mov r5, r4 │ │ mov r0, r3 │ │ mov r3, r2 │ │ ldr r6, [sp, #80] @ 0x50 │ │ bfc r3, #10, #22 │ │ ldrsh.w r3, [r6, r3, lsl #1] │ │ cmp.w r3, #4294967295 @ 0xffffffff │ │ - ble.n 6f0b8 │ │ + ble.n 6f16c │ │ lsrs r6, r3, #9 │ │ bfc r3, #9, #23 │ │ - b.n 6f0e6 │ │ + b.n 6f19a │ │ movs r6, #10 │ │ and.w r4, r6, #31 │ │ mvns r3, r3 │ │ lsr.w r4, r2, r4 │ │ and.w r4, r4, #1 │ │ add r3, r4 │ │ cmp.w r3, #576 @ 0x240 │ │ - bcs.n 6f0de │ │ + bcs.n 6f192 │ │ ldr r4, [sp, #84] @ 0x54 │ │ adds r6, #1 │ │ ldrsh.w r3, [r4, r3, lsl #1] │ │ cmp r3, #0 │ │ - bmi.n 6f0ba │ │ - b.n 6f0e4 │ │ + bmi.n 6f16e │ │ + b.n 6f198 │ │ adds r6, #1 │ │ movw r3, #32767 @ 0x7fff │ │ uxtb r6, r6 │ │ subs r0, r0, r6 │ │ str r0, [sp, #92] @ 0x5c │ │ and.w r0, r6, #31 │ │ cmp r3, #16 │ │ str r3, [sp, #96] @ 0x60 │ │ lsr.w r0, r2, r0 │ │ str r0, [sp, #88] @ 0x58 │ │ - bcs.n 6f10a │ │ + bcs.n 6f1be │ │ adds r0, r1, #1 │ │ bfc r1, #9, #23 │ │ str r0, [sp, #100] @ 0x64 │ │ movs r0, #0 │ │ strb.w r3, [r9, r1] │ │ - b.n 6f138 │ │ - cbnz r1, 6f116 │ │ + b.n 6f1ec │ │ + cbnz r1, 6f1ca │ │ cmp r3, #16 │ │ - bne.n 6f116 │ │ + bne.n 6f1ca │ │ movs r0, #1 │ │ movs r6, #32 │ │ - b.n 6f138 │ │ + b.n 6f1ec │ │ movw r0, #770 @ 0x302 │ │ add r1, sp, #112 @ 0x70 │ │ movt r0, #7 │ │ movs r6, #11 │ │ str r0, [sp, #112] @ 0x70 │ │ and.w r0, r3, #3 │ │ ldrb r0, [r1, r0] │ │ strb.w r0, [sp, #104] @ 0x68 │ │ movs r0, #1 │ │ - b.n 6f138 │ │ + b.n 6f1ec │ │ movs r0, #2 │ │ movs r6, #252 @ 0xfc │ │ movs r5, #0 │ │ uxtb r0, r0 │ │ cmp r0, #0 │ │ - beq.w 6ef72 │ │ + beq.w 6f026 │ │ cmp r0, #2 │ │ - bne.w 6ee82 │ │ - b.w 6fee0 │ │ + bne.w 6ef36 │ │ + b.w 6ff94 │ │ ldr r6, [sp, #56] @ 0x38 │ │ mov r4, fp │ │ ldr.w r9, [sp, #44] @ 0x2c │ │ ldr r0, [sp, #100] @ 0x64 │ │ ldrh.w r1, [lr, #80] @ 0x50 │ │ cmp r0, r1 │ │ - bcs.n 6f17a │ │ + bcs.n 6f22e │ │ ldr r1, [sp, #92] @ 0x5c │ │ cmp r1, #3 │ │ - bcs.n 6f19a │ │ - cbz r4, 6f1ce │ │ + bcs.n 6f24e │ │ + cbz r4, 6f282 │ │ ldrb.w r2, [r8], #1 │ │ sub.w fp, r4, #1 │ │ ldr r3, [sp, #88] @ 0x58 │ │ mov r4, fp │ │ lsls r2, r1 │ │ orr.w r1, r1, #8 │ │ orrs r2, r3 │ │ - b.n 6f19c │ │ + b.n 6f250 │ │ movs r0, #19 │ │ add r1, sp, #88 @ 0x58 │ │ strh.w r0, [lr, #80] @ 0x50 │ │ mov r0, r6 │ │ mov r5, ip │ │ - bl 703e4 │ │ + bl 70498 │ │ uxtb r2, r0 │ │ cmp r2, #3 │ │ - beq.w 6ff30 │ │ + beq.w 6ffe4 │ │ mov ip, r5 │ │ ldr.w lr, [sp, #60] @ 0x3c │ │ - b.n 6f1c6 │ │ + b.n 6f27a │ │ ldr r2, [sp, #88] @ 0x58 │ │ subs r1, #3 │ │ str r1, [sp, #92] @ 0x5c │ │ lsrs r1, r2, #3 │ │ cmp r0, #18 │ │ str r1, [sp, #88] @ 0x58 │ │ - bhi.w 7037a │ │ - ldr r1, [pc, #948] @ (6f560 ) │ │ + bhi.w 7042e │ │ + ldr r1, [pc, #948] @ (6f614 ) │ │ add r1, pc │ │ ldrb r1, [r1, r0] │ │ cmp r1, #19 │ │ - bcs.w 70384 │ │ + bcs.w 70438 │ │ adds r0, #1 │ │ str r0, [sp, #100] @ 0x64 │ │ movs r0, #0 │ │ and.w r2, r2, #7 │ │ strb.w r2, [r9, r1] │ │ movs r1, #252 @ 0xfc │ │ uxtb r0, r0 │ │ cmp r0, #0 │ │ - beq.n 6f152 │ │ - b.n 6f772 │ │ + beq.n 6f206 │ │ + b.n 6f826 │ │ movs r0, #2 │ │ movs r4, #0 │ │ - b.n 6f1c4 │ │ + b.n 6f278 │ │ ldrb.w r0, [lr, #82] @ 0x52 │ │ movs r6, #3 │ │ cmp r0, #0 │ │ - beq.w 6ee82 │ │ + beq.w 6ef36 │ │ ldr r1, [sp, #52] @ 0x34 │ │ ldrd r5, r2, [sp, #88] @ 0x58 │ │ bic.w r3, r2, #7 │ │ sub.w r6, r1, fp │ │ cmp.w r6, r2, lsr #3 │ │ mov r0, r6 │ │ it cs │ │ lsrcs r0, r2, #3 │ │ sub.w r3, r3, r0, lsl #3 │ │ subs r0, r6, r0 │ │ str r3, [sp, #92] @ 0x5c │ │ cmp r1, r0 │ │ - bcc.w 70356 │ │ + bcc.w 7040a │ │ and.w r2, r2, #7 │ │ movs r6, #0 │ │ sub.w fp, r1, r0 │ │ ldr r1, [sp, #20] │ │ and.w r3, r3, #24 │ │ str r6, [sp, #100] @ 0x64 │ │ mov.w r6, #4294967295 @ 0xffffffff │ │ lsr.w r2, r5, r2 │ │ lsl.w r3, r6, r3 │ │ bics r2, r3 │ │ str r2, [sp, #88] @ 0x58 │ │ add.w r8, r1, r0 │ │ movs r6, #23 │ │ - b.n 6ee82 │ │ + b.n 6ef36 │ │ movs r2, #0 │ │ ldrd r0, r1, [sp, #88] @ 0x58 │ │ str r2, [sp, #100] @ 0x64 │ │ bic.w r2, r1, #7 │ │ and.w r1, r1, #7 │ │ str r2, [sp, #92] @ 0x5c │ │ movs r6, #5 │ │ lsrs r0, r1 │ │ str r0, [sp, #88] @ 0x58 │ │ - b.n 6ee82 │ │ + b.n 6ef36 │ │ cmp.w fp, #0 │ │ - beq.w 6ff6e │ │ + beq.w 70022 │ │ ldrb.w r0, [r8], #1 │ │ sub.w fp, fp, #1 │ │ str.w r0, [lr, #44] @ 0x2c │ │ movs r6, #2 │ │ - b.n 6ee82 │ │ + b.n 6ef36 │ │ ldr r0, [sp, #100] @ 0x64 │ │ ldrd r5, r3, [sp, #88] @ 0x58 │ │ ldr.w r1, [lr, #52] @ 0x34 │ │ cmp r0, #4 │ │ mov r2, r0 │ │ it ls │ │ movls r2, #4 │ │ cmp r2, r0 │ │ - beq.w 6f77e │ │ - cbz r3, 6f29a │ │ + beq.w 6f832 │ │ + cbz r3, 6f34e │ │ cmp r3, #7 │ │ - bhi.n 6f2b2 │ │ + bhi.n 6f366 │ │ cmp.w fp, #0 │ │ - beq.w 6fec0 │ │ + beq.w 6ff74 │ │ ldrb.w r6, [r8], #1 │ │ sub.w fp, fp, #1 │ │ lsls r6, r3 │ │ orr.w r3, r3, #8 │ │ orrs r6, r5 │ │ - b.n 6f2b4 │ │ + b.n 6f368 │ │ cmp.w fp, #0 │ │ - beq.w 6fec0 │ │ + beq.w 6ff74 │ │ ldrb.w r3, [r8], #1 │ │ sub.w fp, fp, #1 │ │ orr.w r1, r3, r1, lsl #8 │ │ movs r3, #0 │ │ - b.n 6f2c2 │ │ + b.n 6f376 │ │ mov r6, r5 │ │ lsrs r5, r6, #8 │ │ subs r3, #8 │ │ uxtb r6, r6 │ │ str r3, [sp, #92] @ 0x5c │ │ str r5, [sp, #88] @ 0x58 │ │ orr.w r1, r6, r1, lsl #8 │ │ adds r0, #1 │ │ str.w r1, [lr, #52] @ 0x34 │ │ str r0, [sp, #100] @ 0x64 │ │ - b.n 6f274 │ │ + b.n 6f328 │ │ cmp.w fp, #0 │ │ - beq.w 6ff6e │ │ + beq.w 70022 │ │ ldr.w r0, [lr, #44] @ 0x2c │ │ movw r3, #4229 @ 0x1085 │ │ ldrb.w r1, [r8], #1 │ │ movt r3, #2114 @ 0x842 │ │ str.w r1, [lr, #48] @ 0x30 │ │ sub.w fp, fp, #1 │ │ orr.w r2, r1, r0, lsl #8 │ │ @@ -106689,198 +106632,198 @@ │ │ and.w r0, r0, #15 │ │ and.w r2, r2, #16 │ │ eor.w r0, r0, #8 │ │ orrs r1, r2 │ │ orrs r0, r1 │ │ it ne │ │ movne r6, #29 │ │ - b.n 6ee82 │ │ + b.n 6ef36 │ │ ldr r0, [sp, #92] @ 0x5c │ │ cmp r0, #3 │ │ - bcs.w 6f7b0 │ │ + bcs.w 6f864 │ │ cmp.w fp, #0 │ │ - beq.w 6ff6e │ │ + beq.w 70022 │ │ ldrb.w r1, [r8], #1 │ │ sub.w fp, fp, #1 │ │ ldr r2, [sp, #88] @ 0x58 │ │ lsls r1, r0 │ │ orr.w r0, r0, #8 │ │ orrs r1, r2 │ │ - b.n 6f7b2 │ │ + b.n 6f866 │ │ ldr r0, [sp, #92] @ 0x5c │ │ cmp r0, #8 │ │ - bcs.w 6f7e2 │ │ + bcs.w 6f896 │ │ cmp.w fp, #0 │ │ - beq.w 6ff6e │ │ + beq.w 70022 │ │ ldrb.w r1, [r8], #1 │ │ sub.w fp, fp, #1 │ │ ldr r2, [sp, #88] @ 0x58 │ │ lsls r1, r0 │ │ orr.w r0, r0, #8 │ │ orrs r1, r2 │ │ - b.n 6f7e4 │ │ + b.n 6f898 │ │ cmp.w fp, #0 │ │ - beq.w 6ff6e │ │ + beq.w 70022 │ │ mov r5, sl │ │ sub.w sl, sl, ip │ │ ldr r4, [sp, #100] @ 0x64 │ │ cmp fp, sl │ │ it cc │ │ movcc sl, fp │ │ cmp r4, sl │ │ it cc │ │ movcc sl, r4 │ │ adds.w r6, sl, ip │ │ - bcs.w 7033c │ │ + bcs.w 703f0 │ │ cmp r6, r5 │ │ - bhi.w 7033c │ │ + bhi.w 703f0 │ │ ldr r0, [r7, #8] │ │ mov r1, r8 │ │ mov r2, sl │ │ mov r9, lr │ │ add r0, ip │ │ - bl d53c6 │ │ + bl d52ea │ │ sub.w r0, r4, sl │ │ str r0, [sp, #100] @ 0x64 │ │ movs r0, #6 │ │ mov ip, r6 │ │ add r8, sl │ │ sub.w fp, fp, sl │ │ mov r6, r0 │ │ mov lr, r9 │ │ mov sl, r5 │ │ - b.n 6ee82 │ │ + b.n 6ef36 │ │ ldr r2, [sp, #100] @ 0x64 │ │ ldrd r1, r0, [sp, #88] @ 0x58 │ │ cmp r2, #4 │ │ mov r3, r2 │ │ it ls │ │ movls r3, #4 │ │ ldr r5, [sp, #24] │ │ cmp r3, r2 │ │ - beq.w 6f784 │ │ - cbz r0, 6f400 │ │ + beq.w 6f838 │ │ + cbz r0, 6f4b4 │ │ cmp r0, #7 │ │ - bhi.n 6f3f4 │ │ + bhi.n 6f4a8 │ │ cmp.w fp, #0 │ │ - beq.w 6fecc │ │ + beq.w 6ff80 │ │ ldrb.w r6, [r8], #1 │ │ sub.w fp, fp, #1 │ │ lsls r6, r0 │ │ orrs r1, r6 │ │ orr.w r0, r0, #8 │ │ strb r1, [r5, r2] │ │ lsrs r1, r1, #8 │ │ subs r0, #8 │ │ str r0, [sp, #92] @ 0x5c │ │ str r1, [sp, #88] @ 0x58 │ │ - b.n 6f414 │ │ + b.n 6f4c8 │ │ cmp.w fp, #0 │ │ - beq.w 6fecc │ │ + beq.w 6ff80 │ │ ldrb.w r0, [r8], #1 │ │ sub.w fp, fp, #1 │ │ strb r0, [r5, r2] │ │ movs r0, #0 │ │ adds r2, #1 │ │ str r2, [sp, #100] @ 0x64 │ │ - b.n 6f3d0 │ │ + b.n 6f484 │ │ ldr r0, [sp, #100] @ 0x64 │ │ movs r6, #20 │ │ cmp r0, #0 │ │ - beq.w 6ee82 │ │ + beq.w 6ef36 │ │ movs r6, #7 │ │ cmp sl, ip │ │ - bne.w 6ee82 │ │ - b.w 6fe9c │ │ + bne.w 6ef36 │ │ + b.w 6ff50 │ │ ldr.w sl, [sp, #92] @ 0x5c │ │ cmp.w fp, #4 │ │ - bcs.w 6f7f6 │ │ + bcs.w 6f8aa │ │ ldr r4, [sp, #72] @ 0x48 │ │ cmp.w sl, #15 │ │ - bcs.w 6f9d0 │ │ + bcs.w 6fa84 │ │ cmp.w fp, #1 │ │ - bhi.w 6fa84 │ │ + bhi.w 6fb38 │ │ clz r0, fp │ │ ldr r1, [sp, #88] @ 0x58 │ │ mov r2, sl │ │ lsrs r3, r0, #5 │ │ mov r0, r1 │ │ ldr r6, [sp, #76] @ 0x4c │ │ bfc r0, #10, #22 │ │ ldrsh.w r0, [r6, r0, lsl #1] │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - ble.n 6f47a │ │ + ble.n 6f52e │ │ uxth r6, r0 │ │ cmp.w r6, #512 @ 0x200 │ │ itt cs │ │ lsrcs r0, r0, #9 │ │ cmpcs r2, r0 │ │ - bcc.n 6f4ac │ │ - b.n 6fb32 │ │ + bcc.n 6f560 │ │ + b.n 6fbe6 │ │ cmp r2, #11 │ │ - bcc.n 6f4ac │ │ + bcc.n 6f560 │ │ movs r6, #11 │ │ subs r5, r6, #1 │ │ mvns r0, r0 │ │ and.w r5, r5, #31 │ │ lsr.w r5, r1, r5 │ │ and.w r5, r5, #1 │ │ add r0, r5 │ │ lsrs r5, r0, #6 │ │ cmp r5, #8 │ │ - bhi.w 70360 │ │ + bhi.w 70414 │ │ ldrsh.w r0, [r4, r0, lsl #1] │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.w 6fb32 │ │ + bgt.w 6fbe6 │ │ adds r6, #1 │ │ cmp r2, r6 │ │ - bcs.n 6f480 │ │ + bcs.n 6f534 │ │ lsls r0, r3, #31 │ │ - bne.w 702bc │ │ + bne.w 70370 │ │ ldrb.w r0, [r8], #1 │ │ add.w sl, r2, #8 │ │ movs r3, #1 │ │ mov.w fp, #0 │ │ cmp r2, #7 │ │ str.w sl, [sp, #92] @ 0x5c │ │ lsl.w r0, r0, r2 │ │ orr.w r1, r1, r0 │ │ mov r2, sl │ │ str r1, [sp, #88] @ 0x58 │ │ - bcc.n 6f458 │ │ - b.n 6fb34 │ │ + bcc.n 6f50c │ │ + b.n 6fbe8 │ │ ldr.w lr, [sp, #100] @ 0x64 │ │ cmp.w lr, #2 │ │ - bhi.w 6f924 │ │ + bhi.w 6f9d8 │ │ ldrd r1, r6, [sp, #88] @ 0x58 │ │ ldr r0, [sp, #44] @ 0x2c │ │ movs r2, #4 │ │ str r2, [sp, #120] @ 0x78 │ │ movs r2, #5 │ │ strd r2, r2, [sp, #112] @ 0x70 │ │ add r2, sp, #112 @ 0x70 │ │ ldr.w r3, [r2, lr, lsl #2] │ │ cmp r6, r3 │ │ - bcs.n 6f528 │ │ + bcs.n 6f5dc │ │ cmp.w fp, #0 │ │ - beq.w 6feb4 │ │ + beq.w 6ff68 │ │ ldrb.w r5, [r8], #1 │ │ add.w r2, r6, #8 │ │ and.w r6, r6, #31 │ │ sub.w fp, fp, #1 │ │ str r2, [sp, #92] @ 0x5c │ │ cmp r2, r3 │ │ lsl.w r6, r5, r6 │ │ orr.w r1, r1, r6 │ │ mov r6, r2 │ │ str r1, [sp, #88] @ 0x58 │ │ - bcc.n 6f4fc │ │ - b.n 6f52a │ │ + bcc.n 6f5b0 │ │ + b.n 6f5de │ │ mov r2, r6 │ │ - ldr r4, [pc, #56] @ (6f564 ) │ │ + ldr r4, [pc, #56] @ (6f618 ) │ │ and.w r5, r3, #31 │ │ add r4, pc │ │ ldrh.w r6, [r4, lr, lsl #1] │ │ mov.w r4, #4294967295 @ 0xffffffff │ │ lsls r4, r5 │ │ bic.w r4, r1, r4 │ │ lsrs r1, r5 │ │ @@ -106889,221 +106832,221 @@ │ │ str r1, [sp, #88] @ 0x58 │ │ strh.w r6, [r4, lr, lsl #1] │ │ add.w lr, lr, #1 │ │ subs r6, r2, r3 │ │ cmp.w lr, #3 │ │ str r6, [sp, #92] @ 0x5c │ │ str.w lr, [sp, #100] @ 0x64 │ │ - bne.n 6f4e8 │ │ - b.n 6f926 │ │ - ldrb r6, [r1, #27] │ │ - @ instruction: 0xfffa7b9a │ │ + bne.n 6f59c │ │ + b.n 6f9da │ │ + ldrb r4, [r3, #25] │ │ + @ instruction: 0xfffa7ad2 │ │ @ instruction: 0xfffae9dd │ │ str r5, [sp, #96] @ 0x60 │ │ cmp sl, ip │ │ - beq.w 6fe98 │ │ + beq.w 6ff4c │ │ sub.w r4, sl, ip │ │ ldr r0, [r7, #8] │ │ sub.w r2, ip, r9 │ │ mov r1, sl │ │ mov r3, ip │ │ mov r6, r4 │ │ cmp r5, r4 │ │ it cc │ │ movcc r6, r5 │ │ mov sl, fp │ │ str r6, [sp, #0] │ │ mov fp, ip │ │ - bl 706a0 │ │ + bl 70754 │ │ mov ip, fp │ │ mov fp, sl │ │ ldr.w lr, [sp, #60] @ 0x3c │ │ cmp r5, r4 │ │ ldr.w sl, [r7, #12] │ │ sub.w r5, r5, r6 │ │ add ip, r6 │ │ str r5, [sp, #100] @ 0x64 │ │ - bhi.n 6f56c │ │ + bhi.n 6f620 │ │ movs r6, #12 │ │ - b.n 6ee82 │ │ + b.n 6ef36 │ │ ldrd r1, r5, [sp, #88] @ 0x58 │ │ ldrb.w r2, [sp, #104] @ 0x68 │ │ ldr r4, [sp, #56] @ 0x38 │ │ cmp r5, r2 │ │ - bcs.n 6f5e6 │ │ + bcs.n 6f69a │ │ cmp.w fp, #0 │ │ - beq.w 6fefc │ │ + beq.w 6ffb0 │ │ ldrb.w r0, [r8], #1 │ │ and.w r6, r5, #31 │ │ add.w r3, r5, #8 │ │ sub.w fp, fp, #1 │ │ str r3, [sp, #92] @ 0x5c │ │ cmp r3, r2 │ │ lsl.w r0, r0, r6 │ │ orr.w r1, r1, r0 │ │ mov r5, r3 │ │ str r1, [sp, #88] @ 0x58 │ │ - bcc.n 6f5bc │ │ + bcc.n 6f670 │ │ subs r3, r5, r2 │ │ str r3, [sp, #92] @ 0x5c │ │ and.w r3, r2, #31 │ │ ldrd r6, r0, [sp, #96] @ 0x60 │ │ lsr.w r2, r1, r3 │ │ cmp r6, #16 │ │ str r2, [sp, #88] @ 0x58 │ │ mov.w r2, #11 │ │ str r2, [sp, #120] @ 0x78 │ │ mov.w r2, #3 │ │ strd r2, r2, [sp, #112] @ 0x70 │ │ - bne.w 6f98a │ │ + bne.w 6fa3e │ │ subs r2, r0, #1 │ │ bfc r2, #9, #23 │ │ ldrb r2, [r4, r2] │ │ - b.n 6f98c │ │ + b.n 6fa40 │ │ ldr r0, [sp, #92] @ 0x5c │ │ cmp r0, #15 │ │ - bcs.w 6f958 │ │ + bcs.w 6fa0c │ │ ldrd lr, r4, [sp, #28] │ │ cmp.w fp, #1 │ │ - bhi.w 6f9e0 │ │ + bhi.w 6fa94 │ │ clz r2, fp │ │ ldr r1, [sp, #88] @ 0x58 │ │ lsrs r3, r2, #5 │ │ mov r2, r0 │ │ mov r0, r1 │ │ bfc r0, #10, #22 │ │ ldrsh.w r0, [lr, r0, lsl #1] │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - ble.n 6f654 │ │ + ble.n 6f708 │ │ uxth r6, r0 │ │ cmp.w r6, #512 @ 0x200 │ │ itt cs │ │ lsrcs r0, r0, #9 │ │ cmpcs r2, r0 │ │ - bcc.n 6f686 │ │ - b.n 6faa0 │ │ + bcc.n 6f73a │ │ + b.n 6fb54 │ │ cmp r2, #11 │ │ - bcc.n 6f686 │ │ + bcc.n 6f73a │ │ movs r6, #11 │ │ subs r5, r6, #1 │ │ mvns r0, r0 │ │ and.w r5, r5, #31 │ │ lsr.w r5, r1, r5 │ │ and.w r5, r5, #1 │ │ add r0, r5 │ │ lsrs r5, r0, #6 │ │ cmp r5, #8 │ │ - bhi.w 70360 │ │ + bhi.w 70414 │ │ ldrsh.w r0, [r4, r0, lsl #1] │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.w 6faa0 │ │ + bgt.w 6fb54 │ │ adds r6, #1 │ │ cmp r2, r6 │ │ - bcs.n 6f65a │ │ + bcs.n 6f70e │ │ lsls r0, r3, #31 │ │ - bne.w 702b0 │ │ + bne.w 70364 │ │ ldrb.w r3, [r8], #1 │ │ add.w r0, r2, #8 │ │ mov.w fp, #0 │ │ cmp r2, #7 │ │ str r0, [sp, #92] @ 0x5c │ │ lsl.w r3, r3, r2 │ │ orr.w r1, r1, r3 │ │ mov.w r3, #1 │ │ mov r2, r0 │ │ str r1, [sp, #88] @ 0x58 │ │ - bcc.n 6f634 │ │ - b.n 6faa2 │ │ + bcc.n 6f6e8 │ │ + b.n 6fb56 │ │ ldrd r0, r2, [sp, #88] @ 0x58 │ │ ldrb.w r1, [sp, #104] @ 0x68 │ │ cmp r2, r1 │ │ - bcs.w 6f960 │ │ + bcs.w 6fa14 │ │ cmp.w fp, #0 │ │ - beq.w 6ff08 │ │ + beq.w 6ffbc │ │ ldrb.w r6, [r8], #1 │ │ add.w r3, r2, #8 │ │ and.w r2, r2, #31 │ │ sub.w fp, fp, #1 │ │ str r3, [sp, #92] @ 0x5c │ │ cmp r3, r1 │ │ lsl.w r2, r6, r2 │ │ orr.w r0, r0, r2 │ │ mov r2, r3 │ │ str r0, [sp, #88] @ 0x58 │ │ - bcc.n 6f6be │ │ - b.n 6f962 │ │ + bcc.n 6f772 │ │ + b.n 6fa16 │ │ ldr r0, [sp, #92] @ 0x5c │ │ ldrb.w r1, [sp, #104] @ 0x68 │ │ cmp r0, r1 │ │ - bcs.w 6f986 │ │ + bcs.w 6fa3a │ │ cmp.w fp, #0 │ │ - beq.w 6ff24 │ │ + beq.w 6ffd8 │ │ ldr r2, [sp, #88] @ 0x58 │ │ rsb r3, fp, #1 │ │ add.w r8, r8, #1 │ │ ldrb.w r6, [r8, #-1] │ │ and.w r5, r0, #31 │ │ adds r0, #8 │ │ cmp r0, r1 │ │ lsl.w r6, r6, r5 │ │ orr.w r2, r2, r6 │ │ - bcs.w 6fa5a │ │ + bcs.w 6fb0e │ │ adds r3, #1 │ │ add.w r8, r8, #1 │ │ cmp r3, #1 │ │ - bne.n 6f708 │ │ - b.w 6ff20 │ │ + bne.n 6f7bc │ │ + b.w 6ffd4 │ │ ldr r0, [sp, #100] @ 0x64 │ │ movs r6, #20 │ │ mov r1, r0 │ │ bfc r1, #9, #23 │ │ str r1, [sp, #100] @ 0x64 │ │ cmp.w r1, #256 @ 0x100 │ │ - beq.w 6ee82 │ │ + beq.w 6ef36 │ │ movs r6, #33 @ 0x21 │ │ lsrs r1, r1, #1 │ │ cmp r1, #142 @ 0x8e │ │ - bhi.w 6ee82 │ │ - ldr r1, [pc, #920] @ (6fae8 ) │ │ + bhi.w 6ef36 │ │ + ldr r1, [pc, #920] @ (6fb9c ) │ │ subs r0, #1 │ │ - ldr r2, [pc, #920] @ (6faec ) │ │ + ldr r2, [pc, #920] @ (6fba0 ) │ │ and.w r0, r0, #31 │ │ add r1, pc │ │ movs r6, #14 │ │ add r2, pc │ │ ldrh.w r2, [r2, r0, lsl #1] │ │ ldrb r0, [r1, r0] │ │ str r2, [sp, #100] @ 0x64 │ │ strb.w r0, [sp, #104] @ 0x68 │ │ cmp r0, #0 │ │ it eq │ │ moveq r6, #15 │ │ - b.w 6ee82 │ │ + b.w 6ef36 │ │ cmp r0, #1 │ │ - bne.w 6fed8 │ │ + bne.w 6ff8c │ │ mov r6, r1 │ │ - b.w 6ee82 │ │ + b.w 6ef36 │ │ movs r6, #24 │ │ - b.w 6ee82 │ │ + b.w 6ef36 │ │ ldrh.w r1, [lr, #72] @ 0x48 │ │ movs r6, #31 │ │ ldrh.w r2, [lr, #74] @ 0x4a │ │ movw r3, #65535 @ 0xffff │ │ str r1, [sp, #100] @ 0x64 │ │ eors r2, r1 │ │ cmp r2, r3 │ │ - bne.w 6ee82 │ │ + bne.w 6ef36 │ │ movs r6, #20 │ │ cmp r1, #0 │ │ - beq.w 6ee82 │ │ + beq.w 6ef36 │ │ movs r6, #17 │ │ cmp r0, #0 │ │ it eq │ │ moveq r6, #6 │ │ - b.w 6ee82 │ │ + b.w 6ef36 │ │ ldr r1, [sp, #88] @ 0x58 │ │ subs r0, #3 │ │ ubfx r2, r1, #1, #2 │ │ str r0, [sp, #92] @ 0x5c │ │ lsrs r0, r1, #3 │ │ and.w r3, r1, #1 │ │ strb.w r2, [lr, #83] @ 0x53 │ │ @@ -107111,134 +107054,134 @@ │ │ movs r6, #25 │ │ str r0, [sp, #88] @ 0x58 │ │ tbh [pc, r2, lsl #1] │ │ movs r6, r0 │ │ lsls r7, r2, #4 │ │ lsls r2, r2, #4 │ │ movs r4, r0 │ │ - b.w 6ee82 │ │ + b.w 6ef36 │ │ movs r6, #4 │ │ - b.w 6ee82 │ │ + b.w 6ef36 │ │ ldr r1, [sp, #88] @ 0x58 │ │ subs r0, #8 │ │ str r0, [sp, #92] @ 0x5c │ │ uxtb r0, r1 │ │ movs r6, #18 │ │ str r0, [sp, #96] @ 0x60 │ │ lsrs r0, r1, #8 │ │ str r0, [sp, #88] @ 0x58 │ │ - b.w 6ee82 │ │ + b.w 6ef36 │ │ ldr r6, [sp, #88] @ 0x58 │ │ ldr r4, [sp, #72] @ 0x48 │ │ ldr r0, [r7, #12] │ │ sub.w r0, r0, ip │ │ cmp r0, #2 │ │ - bcc.w 6f43e │ │ + bcc.w 6f4f2 │ │ cmp.w fp, #14 │ │ it cs │ │ cmpcs.w r0, #258 @ 0x102 │ │ - bhi.w 6fb9a │ │ + bhi.w 6fc4e │ │ cmp.w sl, #14 │ │ - bhi.n 6f82c │ │ + bhi.n 6f8e0 │ │ ldrh.w r0, [r8], #2 │ │ sub.w fp, fp, #2 │ │ lsl.w r0, r0, sl │ │ orrs r6, r0 │ │ orr.w sl, sl, #16 │ │ mov r0, r6 │ │ ldr r1, [sp, #76] @ 0x4c │ │ bfc r0, #10, #22 │ │ ldrsh.w r0, [r1, r0, lsl #1] │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - ble.n 6f842 │ │ + ble.n 6f8f6 │ │ lsrs r2, r0, #9 │ │ - b.n 6f86e │ │ + b.n 6f922 │ │ movs r1, #10 │ │ and.w r2, r1, #31 │ │ mvns r0, r0 │ │ lsr.w r2, r6, r2 │ │ and.w r2, r2, #1 │ │ add r0, r2 │ │ cmp.w r0, #576 @ 0x240 │ │ - bcs.n 6f866 │ │ + bcs.n 6f91a │ │ ldrsh.w r0, [r4, r0, lsl #1] │ │ adds r1, #1 │ │ cmp r0, #0 │ │ - bmi.n 6f844 │ │ - b.n 6f86c │ │ + bmi.n 6f8f8 │ │ + b.n 6f920 │ │ adds r1, #1 │ │ movw r0, #32767 @ 0x7fff │ │ uxtb r2, r1 │ │ sub.w r1, sl, r2 │ │ and.w r2, r2, #31 │ │ str r1, [sp, #92] @ 0x5c │ │ lsls r3, r0, #23 │ │ lsr.w r2, r6, r2 │ │ str r0, [sp, #100] @ 0x64 │ │ str r2, [sp, #88] @ 0x58 │ │ - bmi.w 6fe84 │ │ + bmi.w 6ff38 │ │ cmp r1, #14 │ │ - bhi.n 6f89a │ │ + bhi.n 6f94e │ │ ldrh.w r3, [r8], #2 │ │ sub.w fp, fp, #2 │ │ lsls r3, r1 │ │ orrs r2, r3 │ │ orr.w r1, r1, #16 │ │ mov r3, r2 │ │ ldr r6, [sp, #76] @ 0x4c │ │ bfc r3, #10, #22 │ │ ldr r4, [sp, #72] @ 0x48 │ │ ldrsh.w r3, [r6, r3, lsl #1] │ │ cmp.w r3, #4294967295 @ 0xffffffff │ │ - ble.n 6f8b2 │ │ + ble.n 6f966 │ │ lsrs r6, r3, #9 │ │ - b.n 6f8de │ │ + b.n 6f992 │ │ movs r6, #10 │ │ and.w r5, r6, #31 │ │ mvns r3, r3 │ │ lsr.w r5, r2, r5 │ │ and.w r5, r5, #1 │ │ add r3, r5 │ │ cmp.w r3, #576 @ 0x240 │ │ - bcs.n 6f8d6 │ │ + bcs.n 6f98a │ │ ldrsh.w r3, [r4, r3, lsl #1] │ │ adds r6, #1 │ │ cmp r3, #0 │ │ - bmi.n 6f8b4 │ │ - b.n 6f8dc │ │ + bmi.n 6f968 │ │ + b.n 6f990 │ │ adds r6, #1 │ │ movw r3, #32767 @ 0x7fff │ │ uxtb r6, r6 │ │ sub.w sl, r1, r6 │ │ and.w r1, r6, #31 │ │ str.w sl, [sp, #92] @ 0x5c │ │ lsr.w r6, r2, r1 │ │ ldr r1, [r7, #12] │ │ str r6, [sp, #88] @ 0x58 │ │ cmp r1, ip │ │ - bls.w 70390 │ │ + bls.w 70444 │ │ ldr r1, [r7, #8] │ │ strb.w r0, [r1, ip] │ │ add.w r0, ip, #1 │ │ lsls r1, r3, #23 │ │ - bmi.w 6fe88 │ │ + bmi.w 6ff3c │ │ ldr r1, [r7, #12] │ │ cmp r0, r1 │ │ - bcs.w 7039a │ │ + bcs.w 7044e │ │ ldr r1, [r7, #8] │ │ add.w ip, ip, #2 │ │ ldr r4, [sp, #72] @ 0x48 │ │ cmp.w fp, #3 │ │ strb r3, [r1, r0] │ │ - bhi.w 6f7fa │ │ - b.n 6f43e │ │ + bhi.w 6f8ae │ │ + b.n 6f4f2 │ │ ldr r0, [sp, #44] @ 0x2c │ │ movs r1, #19 │ │ mov r4, ip │ │ - bl d5370 │ │ + bl d5242 │ │ ldr.w lr, [sp, #60] @ 0x3c │ │ movs r0, #0 │ │ str r0, [sp, #100] @ 0x64 │ │ movs r6, #27 │ │ mov ip, r4 │ │ movs r2, #27 │ │ ldrh.w r0, [lr, #78] @ 0x4e │ │ @@ -107246,543 +107189,543 @@ │ │ uxth r0, r0 │ │ cmp r0, #31 │ │ it cc │ │ movcc r6, #9 │ │ cmp.w r1, #286 @ 0x11e │ │ it hi │ │ movhi r6, r2 │ │ - b.w 6ee82 │ │ + b.w 6ef36 │ │ ldr r1, [sp, #88] @ 0x58 │ │ ldrd lr, r4, [sp, #28] │ │ - b.n 6faa2 │ │ + b.n 6fb56 │ │ mov r3, r2 │ │ subs r3, r3, r1 │ │ and.w r1, r1, #31 │ │ str r3, [sp, #92] @ 0x5c │ │ movs r6, #15 │ │ lsr.w r3, r0, r1 │ │ ldr r2, [sp, #100] @ 0x64 │ │ str r3, [sp, #88] @ 0x58 │ │ mov.w r3, #4294967295 @ 0xffffffff │ │ lsl.w r1, r3, r1 │ │ bics r0, r1 │ │ add r0, r2 │ │ str r0, [sp, #100] @ 0x64 │ │ - b.w 6ee82 │ │ + b.w 6ef36 │ │ ldr r2, [sp, #88] @ 0x58 │ │ - b.n 6fa5e │ │ + b.n 6fb12 │ │ movs r2, #0 │ │ and.w r6, r6, #2 │ │ add r5, sp, #112 @ 0x70 │ │ ldr.w r6, [r5, r6, lsl #2] │ │ mov.w r5, #4294967295 @ 0xffffffff │ │ lsl.w r3, r5, r3 │ │ bics r1, r3 │ │ add r1, r6 │ │ adds r4, r1, r0 │ │ bfc r0, #9, #23 │ │ mov r1, r4 │ │ bfc r1, #9, #23 │ │ cmp r1, r0 │ │ - bcc.w 7034a │ │ + bcc.w 703fe │ │ ldr r3, [sp, #56] @ 0x38 │ │ subs r1, r1, r0 │ │ mov r9, ip │ │ add r3, r0 │ │ mov r0, r3 │ │ - bl d50b2 │ │ + bl d5294 │ │ str r4, [sp, #100] @ 0x64 │ │ movs r6, #10 │ │ mov ip, r9 │ │ ldr.w lr, [sp, #60] @ 0x3c │ │ - b.w 6ee82 │ │ + b.w 6ef36 │ │ ldr r1, [sp, #88] @ 0x58 │ │ - b.n 6fb34 │ │ + b.n 6fbe8 │ │ movs r6, #19 │ │ cmp r0, #0 │ │ it eq │ │ moveq r6, #12 │ │ - b.w 6ee82 │ │ + b.w 6ef36 │ │ ldrh.w r1, [r8], #2 │ │ sub.w fp, fp, #2 │ │ ldr r2, [sp, #88] @ 0x58 │ │ lsls r1, r0 │ │ orr.w r0, r0, #16 │ │ orrs r1, r2 │ │ - b.n 6faa2 │ │ + b.n 6fb56 │ │ movs r0, #0 │ │ movs r6, #8 │ │ str r0, [sp, #100] @ 0x64 │ │ - b.w 6ee82 │ │ + b.w 6ef36 │ │ movw r0, #288 @ 0x120 │ │ movs r1, #144 @ 0x90 │ │ movt r0, #32 │ │ movs r2, #8 │ │ str.w r0, [lr, #76] @ 0x4c │ │ mov r4, ip │ │ ldr r0, [sp, #68] @ 0x44 │ │ mov r5, lr │ │ - bl d51b2 │ │ + bl d52ee │ │ ldr r0, [sp, #16] │ │ movs r1, #112 @ 0x70 │ │ movs r2, #9 │ │ - bl d51b2 │ │ + bl d52ee │ │ ldr r0, [sp, #12] │ │ movs r1, #24 │ │ movs r2, #7 │ │ - bl d51b2 │ │ + bl d52ee │ │ mov.w r0, #134744072 @ 0x8080808 │ │ movs r1, #32 │ │ strd r0, r0, [r5] │ │ movs r2, #5 │ │ ldr r0, [sp, #64] @ 0x40 │ │ - bl d51b2 │ │ + bl d52ee │ │ ldr r0, [sp, #56] @ 0x38 │ │ add r1, sp, #88 @ 0x58 │ │ - bl 703e4 │ │ + bl 70498 │ │ uxtb r0, r0 │ │ mov r6, r1 │ │ cmp r0, #1 │ │ - bne.w 702d4 │ │ + bne.w 70388 │ │ mov ip, r4 │ │ ldr.w lr, [sp, #60] @ 0x3c │ │ - b.w 6ee82 │ │ + b.w 6ef36 │ │ rsb fp, r3, #0 │ │ subs r0, r0, r1 │ │ str r0, [sp, #92] @ 0x5c │ │ and.w r0, r1, #31 │ │ ldr r3, [sp, #96] @ 0x60 │ │ movs r6, #22 │ │ lsr.w r1, r2, r0 │ │ str r1, [sp, #88] @ 0x58 │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ lsl.w r0, r1, r0 │ │ bic.w r0, r2, r0 │ │ add r0, r3 │ │ str r0, [sp, #96] @ 0x60 │ │ - b.w 6ee82 │ │ + b.w 6ef36 │ │ ldrh.w r0, [r8], #2 │ │ sub.w fp, fp, #2 │ │ ldr r1, [sp, #88] @ 0x58 │ │ lsl.w r0, r0, sl │ │ orrs r1, r0 │ │ orr.w sl, sl, #16 │ │ - b.n 6fb34 │ │ + b.n 6fbe8 │ │ movs r6, #26 │ │ - b.w 6ee82 │ │ + b.w 6ef36 │ │ mov r0, r2 │ │ mov r2, r1 │ │ bfc r2, #10, #22 │ │ ldrsh.w r2, [lr, r2, lsl #1] │ │ cmp.w r2, #4294967295 @ 0xffffffff │ │ - ble.n 6fabe │ │ + ble.n 6fb72 │ │ lsrs r3, r2, #9 │ │ bfc r2, #9, #23 │ │ ldr.w lr, [sp, #60] @ 0x3c │ │ - b.n 6faf8 │ │ + b.n 6fbac │ │ ldr.w lr, [sp, #60] @ 0x3c │ │ movs r3, #10 │ │ and.w r6, r3, #31 │ │ mvns r2, r2 │ │ lsr.w r6, r1, r6 │ │ and.w r6, r6, #1 │ │ add r2, r6 │ │ cmp.w r2, #576 @ 0x240 │ │ - bcs.n 6faf0 │ │ + bcs.n 6fba4 │ │ ldrsh.w r2, [r4, r2, lsl #1] │ │ adds r3, #1 │ │ cmp r2, #0 │ │ - bmi.n 6fac4 │ │ - b.n 6faf6 │ │ + bmi.n 6fb78 │ │ + b.n 6fbaa │ │ nop │ │ - ldr r6, [r7, #32] │ │ - vtbx.8 d23, {d26}, d16 │ │ + ldr r2, [r1, #24] │ │ + vtbl.8 d23, {d10}, d28 │ │ vshll.i32 , d1, #32 │ │ movw r2, #32767 @ 0x7fff │ │ uxtb r3, r3 │ │ subs r0, r0, r3 │ │ str r0, [sp, #92] @ 0x5c │ │ and.w r0, r3, #31 │ │ movs r6, #34 @ 0x22 │ │ cmp r2, #29 │ │ lsr.w r0, r1, r0 │ │ str r0, [sp, #88] @ 0x58 │ │ - bhi.w 6ee82 │ │ - ldr r0, [pc, #916] @ (6fea4 ) │ │ + bhi.w 6ef36 │ │ + ldr r0, [pc, #916] @ (6ff58 ) │ │ uxtb r1, r2 │ │ lsrs r1, r1, #1 │ │ movs r3, #1 │ │ add r0, pc │ │ uqsub8 r1, r1, r3 │ │ movs r6, #16 │ │ strb.w r1, [sp, #104] @ 0x68 │ │ ldrh.w r0, [r0, r2, lsl #1] │ │ cmp r2, #4 │ │ str r0, [sp, #96] @ 0x60 │ │ it cc │ │ movcc r6, #22 │ │ - b.w 6ee82 │ │ + b.w 6ef36 │ │ mov sl, r2 │ │ mov r0, r1 │ │ ldr r2, [sp, #76] @ 0x4c │ │ bfc r0, #10, #22 │ │ ldrsh.w r0, [r2, r0, lsl #1] │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - ble.n 6fb4e │ │ + ble.n 6fc02 │ │ lsrs r2, r0, #9 │ │ bfc r0, #9, #23 │ │ - b.n 6fb7a │ │ + b.n 6fc2e │ │ movs r2, #10 │ │ and.w r3, r2, #31 │ │ mvns r0, r0 │ │ lsr.w r3, r1, r3 │ │ and.w r3, r3, #1 │ │ add r0, r3 │ │ cmp.w r0, #576 @ 0x240 │ │ - bcs.n 6fb72 │ │ + bcs.n 6fc26 │ │ ldrsh.w r0, [r4, r0, lsl #1] │ │ adds r2, #1 │ │ cmp r0, #0 │ │ - bmi.n 6fb50 │ │ - b.n 6fb78 │ │ + bmi.n 6fc04 │ │ + b.n 6fc2c │ │ adds r2, #1 │ │ movw r0, #32767 @ 0x7fff │ │ uxtb r2, r2 │ │ str r0, [sp, #100] @ 0x64 │ │ sub.w r0, sl, r2 │ │ str r0, [sp, #92] @ 0x5c │ │ and.w r0, r2, #31 │ │ movs r6, #13 │ │ lsr.w r0, r1, r0 │ │ str r0, [sp, #88] @ 0x58 │ │ ldr.w lr, [sp, #60] @ 0x3c │ │ ldr.w sl, [r7, #12] │ │ - b.w 6ee82 │ │ + b.w 6ef36 │ │ ldr.w lr, [sp, #96] @ 0x60 │ │ cmp.w fp, #14 │ │ ldrb.w r9, [sp, #104] @ 0x68 │ │ - bcs.n 6fbc2 │ │ + bcs.n 6fc76 │ │ ldr r4, [sp, #100] @ 0x64 │ │ movs r1, #12 │ │ add r0, sp, #88 @ 0x58 │ │ strb.w r9, [sp, #104] @ 0x68 │ │ stmia.w r0, {r6, sl, lr} │ │ str r4, [sp, #100] @ 0x64 │ │ ldr.w lr, [sp, #60] @ 0x3c │ │ ldr.w sl, [r7, #12] │ │ - b.n 6f778 │ │ + b.n 6f82c │ │ ldr r5, [sp, #72] @ 0x48 │ │ cmp.w sl, #14 │ │ - bhi.n 6fbdc │ │ + bhi.n 6fc90 │ │ ldrh.w r0, [r8], #2 │ │ sub.w fp, fp, #2 │ │ lsl.w r0, r0, sl │ │ orrs r6, r0 │ │ orr.w sl, sl, #16 │ │ mov r0, r6 │ │ ldr r1, [sp, #76] @ 0x4c │ │ bfc r0, #10, #22 │ │ ldrsh.w r4, [r1, r0, lsl #1] │ │ cmp.w r4, #4294967295 @ 0xffffffff │ │ - ble.n 6fbf2 │ │ + ble.n 6fca6 │ │ lsrs r0, r4, #9 │ │ - b.n 6fc1e │ │ + b.n 6fcd2 │ │ movs r0, #10 │ │ and.w r1, r0, #31 │ │ mvns r2, r4 │ │ lsr.w r1, r6, r1 │ │ and.w r1, r1, #1 │ │ add r1, r2 │ │ cmp.w r1, #576 @ 0x240 │ │ - bcs.n 6fc16 │ │ + bcs.n 6fcca │ │ ldrsh.w r4, [r5, r1, lsl #1] │ │ adds r0, #1 │ │ cmp r4, #0 │ │ - bmi.n 6fbf4 │ │ - b.n 6fc1c │ │ + bmi.n 6fca8 │ │ + b.n 6fcd0 │ │ adds r0, #1 │ │ movw r4, #32767 @ 0x7fff │ │ uxtb r0, r0 │ │ sub.w sl, sl, r0 │ │ and.w r0, r0, #31 │ │ lsrs r6, r0 │ │ lsls r0, r4, #23 │ │ - bmi.n 6fcd2 │ │ + bmi.n 6fd86 │ │ cmp.w sl, #14 │ │ - bhi.n 6fc44 │ │ + bhi.n 6fcf8 │ │ ldrh.w r0, [r8], #2 │ │ sub.w fp, fp, #2 │ │ lsl.w r0, r0, sl │ │ orrs r6, r0 │ │ orr.w sl, sl, #16 │ │ mov r0, r6 │ │ ldr r1, [sp, #76] @ 0x4c │ │ bfc r0, #10, #22 │ │ ldrsh.w r3, [r1, r0, lsl #1] │ │ cmp.w r3, #4294967295 @ 0xffffffff │ │ - ble.n 6fc5a │ │ + ble.n 6fd0e │ │ lsrs r0, r3, #9 │ │ - b.n 6fc86 │ │ + b.n 6fd3a │ │ movs r0, #10 │ │ and.w r2, r0, #31 │ │ mvns r1, r3 │ │ lsr.w r2, r6, r2 │ │ and.w r2, r2, #1 │ │ add r1, r2 │ │ cmp.w r1, #576 @ 0x240 │ │ - bcs.n 6fc7e │ │ + bcs.n 6fd32 │ │ ldrsh.w r3, [r5, r1, lsl #1] │ │ adds r0, #1 │ │ cmp r3, #0 │ │ - bmi.n 6fc5c │ │ - b.n 6fc84 │ │ + bmi.n 6fd10 │ │ + b.n 6fd38 │ │ adds r0, #1 │ │ movw r3, #32767 @ 0x7fff │ │ uxtb r0, r0 │ │ ldr r1, [r7, #12] │ │ cmp ip, r1 │ │ - bcs.w 70390 │ │ + bcs.w 70444 │ │ sub.w sl, sl, r0 │ │ and.w r0, r0, #31 │ │ lsls r2, r3, #23 │ │ lsr.w r6, r6, r0 │ │ ldr r0, [r7, #8] │ │ strb.w r4, [r0, ip] │ │ add.w r0, ip, #1 │ │ - bmi.n 6fcce │ │ + bmi.n 6fd82 │ │ cmp r0, r1 │ │ - bcs.w 7039a │ │ + bcs.w 7044e │ │ ldr r2, [r7, #8] │ │ add.w ip, ip, #2 │ │ strb r3, [r2, r0] │ │ sub.w r0, r1, ip │ │ movs r1, #12 │ │ cmp.w r0, #258 @ 0x102 │ │ - bls.w 6fbac │ │ + bls.w 6fc60 │ │ cmp.w fp, #14 │ │ - bcs.w 6fbc4 │ │ - b.n 6fbac │ │ + bcs.w 6fc78 │ │ + b.n 6fc60 │ │ mov ip, r0 │ │ mov r4, r3 │ │ mov r0, r4 │ │ bfc r0, #9, #23 │ │ cmp.w r0, #256 @ 0x100 │ │ - beq.w 6fe90 │ │ + beq.w 6ff44 │ │ lsrs r1, r0, #1 │ │ cmp r1, #142 @ 0x8e │ │ - bhi.w 70306 │ │ + bhi.w 703ba │ │ cmp.w sl, #14 │ │ - bhi.n 6fd00 │ │ + bhi.n 6fdb4 │ │ ldrh.w r0, [r8], #2 │ │ sub.w fp, fp, #2 │ │ lsl.w r0, r0, sl │ │ orrs r6, r0 │ │ orr.w sl, sl, #16 │ │ ldrd r9, r3, [sp, #28] │ │ subs r2, r4, #1 │ │ - ldr r0, [pc, #416] @ (6fea8 ) │ │ + ldr r0, [pc, #416] @ (6ff5c ) │ │ and.w r2, r2, #31 │ │ - ldr r1, [pc, #412] @ (6feac ) │ │ + ldr r1, [pc, #412] @ (6ff60 ) │ │ add r0, pc │ │ add r1, pc │ │ ldrb r5, [r0, r2] │ │ ldrh.w r4, [r1, r2, lsl #1] │ │ - cbz r5, 6fd52 │ │ + cbz r5, 6fe06 │ │ and.w r1, r5, #31 │ │ mov.w r2, #4294967295 @ 0xffffffff │ │ sub.w sl, sl, r5 │ │ lsr.w r0, r6, r1 │ │ lsl.w r1, r2, r1 │ │ bic.w r1, r6, r1 │ │ cmp.w sl, #14 │ │ add r4, r1 │ │ - bhi.n 6fd50 │ │ + bhi.n 6fe04 │ │ ldrh.w r1, [r8], #2 │ │ sub.w fp, fp, #2 │ │ lsl.w r1, r1, sl │ │ orr.w r6, r1, r0 │ │ orr.w sl, sl, #16 │ │ - b.n 6fd52 │ │ + b.n 6fe06 │ │ mov r6, r0 │ │ mov r0, r6 │ │ bfc r0, #10, #22 │ │ ldrsh.w r0, [r9, r0, lsl #1] │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - ble.n 6fd66 │ │ + ble.n 6fe1a │ │ lsrs r1, r0, #9 │ │ - b.n 6fd92 │ │ + b.n 6fe46 │ │ movs r1, #10 │ │ and.w r2, r1, #31 │ │ mvns r0, r0 │ │ lsr.w r2, r6, r2 │ │ and.w r2, r2, #1 │ │ add r0, r2 │ │ cmp.w r0, #576 @ 0x240 │ │ - bcs.n 6fd8a │ │ + bcs.n 6fe3e │ │ ldrsh.w r0, [r3, r0, lsl #1] │ │ adds r1, #1 │ │ cmp r0, #0 │ │ - bmi.n 6fd68 │ │ - b.n 6fd90 │ │ + bmi.n 6fe1c │ │ + b.n 6fe44 │ │ adds r1, #1 │ │ movw r0, #32767 @ 0x7fff │ │ uxtb r1, r1 │ │ sub.w sl, sl, r1 │ │ and.w r1, r1, #31 │ │ lsrs r6, r1 │ │ mov r1, r0 │ │ bfc r1, #9, #23 │ │ cmp r1, #29 │ │ - bhi.w 7031e │ │ - ldr r2, [pc, #260] @ (6feb0 ) │ │ + bhi.w 703d2 │ │ + ldr r2, [pc, #260] @ (6ff64 ) │ │ uxtb r0, r0 │ │ lsrs r3, r0, #1 │ │ movs r5, #1 │ │ add r2, pc │ │ cmp r0, #4 │ │ ldrh.w lr, [r2, r1, lsl #1] │ │ uqsub8 r1, r3, r5 │ │ str r1, [sp, #8] │ │ - bcc.n 6fdfa │ │ + bcc.n 6feae │ │ cmp.w sl, #15 │ │ - bcs.n 6fde2 │ │ + bcs.n 6fe96 │ │ cmp.w fp, #1 │ │ - bls.w 7036c │ │ + bls.w 70420 │ │ ldrh.w r0, [r8], #2 │ │ sub.w fp, fp, #2 │ │ lsl.w r0, r0, sl │ │ orr.w sl, sl, #16 │ │ orrs r0, r6 │ │ - b.n 6fde4 │ │ + b.n 6fe98 │ │ mov r0, r6 │ │ uxtb r1, r1 │ │ mov.w r2, #4294967295 @ 0xffffffff │ │ sub.w sl, sl, r1 │ │ lsr.w r6, r0, r1 │ │ lsl.w r1, r2, r1 │ │ bics r0, r1 │ │ add lr, r0 │ │ ldr r0, [r7, #12] │ │ mov.w r9, #30 │ │ cmp lr, r0 │ │ - bhi.w 70324 │ │ + bhi.w 703d8 │ │ cmp ip, lr │ │ - bcc.w 70324 │ │ + bcc.w 703d8 │ │ sub.w r2, ip, lr │ │ cmp r4, #3 │ │ - bne.n 6fe4e │ │ + bne.n 6ff02 │ │ ldr r5, [r7, #12] │ │ cmn.w ip, #4 │ │ ldr.w r9, [sp, #8] │ │ - bhi.n 6fe6c │ │ + bhi.n 6ff20 │ │ add.w r0, ip, #3 │ │ cmp r0, r5 │ │ itt ls │ │ addls r0, r2, #2 │ │ cmpls r0, r5 │ │ - bcs.n 6fe6c │ │ + bcs.n 6ff20 │ │ cmp r2, r5 │ │ itt cc │ │ addcc r1, r2, #1 │ │ cmpcc r1, r5 │ │ - bcs.n 6fe6c │ │ + bcs.n 6ff20 │ │ ldr r3, [r7, #8] │ │ ldrb r2, [r3, r2] │ │ strb.w r2, [r3, ip] │ │ add.w r2, r3, ip │ │ ldrb r1, [r3, r1] │ │ strb r1, [r2, #1] │ │ ldrb r0, [r3, r0] │ │ strb r0, [r2, #2] │ │ - b.n 6fe6c │ │ + b.n 6ff20 │ │ ldrd r0, r5, [r7, #8] │ │ mov r3, ip │ │ mov r1, r5 │ │ str r4, [sp, #0] │ │ str.w ip, [sp, #40] @ 0x28 │ │ mov r9, lr │ │ - bl 706a0 │ │ + bl 70754 │ │ mov lr, r9 │ │ ldr.w ip, [sp, #40] @ 0x28 │ │ ldr.w r9, [sp, #8] │ │ add ip, r4 │ │ movs r1, #12 │ │ sub.w r0, r5, ip │ │ cmp.w r0, #258 @ 0x102 │ │ it hi │ │ cmphi.w fp, #13 │ │ - bhi.w 6fbc2 │ │ - b.n 6fbac │ │ + bhi.w 6fc76 │ │ + b.n 6fc60 │ │ movs r6, #21 │ │ - b.n 6fb8e │ │ + b.n 6fc42 │ │ str r3, [sp, #100] @ 0x64 │ │ movs r6, #21 │ │ mov ip, r0 │ │ - b.n 6fb8e │ │ + b.n 6fc42 │ │ mov.w r4, #256 @ 0x100 │ │ movs r1, #20 │ │ - b.n 6fbac │ │ + b.n 6fc60 │ │ mov.w r9, #19 │ │ movs r6, #2 │ │ mov ip, sl │ │ - b.n 6ff42 │ │ + b.n 6fff6 │ │ nop │ │ - strb r0, [r7, #21] │ │ - vrintx.f32 d22, d6 │ │ - vshll.i32 , d26, #32 │ │ - vrshr.u64 , q7, #6 │ │ + strb r0, [r6, #18] │ │ + vrsra.u64 q11, q1, #6 │ │ + vrshr.u32 , q11, #6 │ │ + vrshr.u32 d23, d6, #6 │ │ vsli.64 q9, q14, #58 @ 0x3a │ │ mov.w r8, #1 │ │ mov.w r9, #8 │ │ - b.n 6ff78 │ │ + b.n 7002c │ │ movs r5, #252 @ 0xfc │ │ mov.w r8, #1 │ │ mov.w r9, #23 │ │ - b.n 6ff74 │ │ + b.n 70028 │ │ movs r5, #252 @ 0xfc │ │ mov.w r8, #1 │ │ mov.w r9, #5 │ │ - b.n 6ff78 │ │ + b.n 7002c │ │ mov.w r9, #9 │ │ mov r6, r1 │ │ - b.n 6fee4 │ │ + b.n 6ff98 │ │ mov.w r9, #10 │ │ ldr.w lr, [sp, #52] @ 0x34 │ │ uxtb r0, r6 │ │ mov.w r8, #1 │ │ cmp r0, #1 │ │ - beq.n 6ff14 │ │ + beq.n 6ffc8 │ │ cmp r0, #252 @ 0xfc │ │ - bne.n 6ff42 │ │ + bne.n 6fff6 │ │ movs r0, #0 │ │ mov r5, r6 │ │ - b.n 6ff7e │ │ + b.n 70032 │ │ movs r5, #252 @ 0xfc │ │ mov.w r8, #1 │ │ mov.w r9, #11 │ │ - b.n 6ff74 │ │ + b.n 70028 │ │ movs r5, #252 @ 0xfc │ │ mov.w r8, #1 │ │ mov.w r9, #14 │ │ - b.n 6ff74 │ │ + b.n 70028 │ │ movs r5, #1 │ │ movs r0, #0 │ │ cmp sl, ip │ │ it eq │ │ moveq r5, #2 │ │ - b.n 6ff7e │ │ + b.n 70032 │ │ strd r2, r0, [sp, #88] @ 0x58 │ │ movs r5, #252 @ 0xfc │ │ mov.w r8, #1 │ │ mov.w r9, #16 │ │ - b.n 6ff74 │ │ + b.n 70028 │ │ mov.w r9, #9 │ │ movs r6, #255 @ 0xff │ │ mov ip, r5 │ │ - b.n 6ff42 │ │ + b.n 6fff6 │ │ mov.w r9, #10 │ │ movs r6, #255 @ 0xff │ │ mov ip, r4 │ │ ldr.w lr, [sp, #52] @ 0x34 │ │ uxtb.w r8, r6 │ │ ldr r0, [sp, #92] @ 0x5c │ │ mov r5, r6 │ │ @@ -107792,15 +107735,15 @@ │ │ lsrcs r1, r0, #3 │ │ sub.w r0, r0, r1, lsl #3 │ │ str r1, [sp, #44] @ 0x2c │ │ str r0, [sp, #92] @ 0x5c │ │ cmp.w r8, #0 │ │ it ne │ │ movne.w r8, #1 │ │ - b.n 6ff80 │ │ + b.n 70034 │ │ movs r5, #252 @ 0xfc │ │ mov.w r8, #1 │ │ mov.w fp, #0 │ │ movs r0, #0 │ │ ldr.w lr, [sp, #52] @ 0x34 │ │ str r0, [sp, #44] @ 0x2c │ │ add r3, sp, #88 @ 0x58 │ │ @@ -107814,17 +107757,17 @@ │ │ lsl.w r1, r6, r1 │ │ bics r0, r1 │ │ str r0, [r4, #68] @ 0x44 │ │ sxtb r0, r5 │ │ cmp r0, #0 │ │ strb.w r9, [r4, #104] @ 0x68 │ │ strd r2, r3, [r4, #60] @ 0x3c │ │ - bmi.w 70296 │ │ + bmi.w 7034a │ │ cmp ip, sl │ │ - bhi.w 70310 │ │ + bhi.w 703c4 │ │ movw r0, #65532 @ 0xfffc │ │ str.w fp, [sp, #24] │ │ movt r0, #32767 @ 0x7fff │ │ and.w r2, ip, r0 │ │ movw r0, #43439 @ 0xa9af │ │ movw fp, #22208 @ 0x56c0 │ │ movt r0, #24174 @ 0x5e6e │ │ @@ -107842,25 +107785,25 @@ │ │ ldr r0, [sp, #60] @ 0x3c │ │ str r1, [sp, #8] │ │ cmp r1, fp │ │ ldr r0, [r0, #56] @ 0x38 │ │ uxth r2, r0 │ │ mov.w ip, r0, lsr #16 │ │ str r2, [sp, #36] @ 0x24 │ │ - bcs.n 70020 │ │ + bcs.n 700d4 │ │ movs r0, #0 │ │ movs r4, #0 │ │ movs r5, #0 │ │ movs r6, #0 │ │ mov.w r8, #0 │ │ movs r2, #0 │ │ movs r3, #0 │ │ mov.w lr, #0 │ │ str r0, [sp, #68] @ 0x44 │ │ - b.n 70112 │ │ + b.n 701c6 │ │ mul.w r0, r2, fp │ │ movs r6, #0 │ │ movs r5, #0 │ │ movs r4, #0 │ │ mov.w r8, #0 │ │ movs r2, #0 │ │ mov.w lr, #0 │ │ @@ -107891,15 +107834,15 @@ │ │ add r1, sl │ │ add r4, r2 │ │ add r8, r3 │ │ add r5, r1 │ │ add r6, r8 │ │ str.w r9, [sp, #84] @ 0x54 │ │ str r1, [sp, #80] @ 0x50 │ │ - bne.n 70050 │ │ + bne.n 70104 │ │ movw r9, #32881 @ 0x8071 │ │ movw lr, #65521 @ 0xfff1 │ │ movt r9, #32775 @ 0x8007 │ │ umull r0, r1, r6, r9 │ │ umull r0, r3, r5, r9 │ │ umull r0, sl, r4, r9 │ │ lsrs r0, r1, #15 │ │ @@ -107936,23 +107879,23 @@ │ │ lsrs r0, r1, #15 │ │ ldr r1, [sp, #64] @ 0x40 │ │ mls lr, r0, lr, sl │ │ ldr r0, [sp, #76] @ 0x4c │ │ sub.w r1, r1, fp │ │ add r0, fp │ │ cmp r1, fp │ │ - bcs.n 7003e │ │ + bcs.n 700f2 │ │ ldr r0, [sp, #40] @ 0x28 │ │ mov r1, ip │ │ str r3, [sp, #84] @ 0x54 │ │ and.w r0, r0, #3 │ │ str r0, [sp, #80] @ 0x50 │ │ ldr r0, [sp, #32] │ │ cmp r0, #0 │ │ - beq.n 701cc │ │ + beq.n 70280 │ │ str r1, [sp, #72] @ 0x48 │ │ mov r9, r2 │ │ ldr r1, [sp, #12] │ │ ldr r0, [r7, #8] │ │ ldr r3, [sp, #8] │ │ mla r1, r1, fp, r0 │ │ ldr r0, [sp, #28] │ │ @@ -107970,15 +107913,15 @@ │ │ add r8, r2 │ │ add ip, sl │ │ add r5, r8 │ │ add lr, r0 │ │ add r6, ip │ │ add r4, r9 │ │ add fp, lr │ │ - bne.n 7013e │ │ + bne.n 701f2 │ │ movw r2, #32881 @ 0x8071 │ │ movt r2, #32775 @ 0x8007 │ │ umull r0, r1, r6, r2 │ │ umull r0, r3, r5, r2 │ │ umull r0, sl, r4, r2 │ │ lsrs r0, r1, #15 │ │ movw r1, #65521 @ 0xfff1 │ │ @@ -108000,15 +107943,15 @@ │ │ umull r0, r3, r9, r2 │ │ lsrs r0, r3, #15 │ │ mls r9, r0, r1, r9 │ │ umull r0, r3, lr, r2 │ │ lsrs r0, r3, #15 │ │ mls lr, r0, r1, lr │ │ ldr r1, [sp, #72] @ 0x48 │ │ - b.n 701d8 │ │ + b.n 7028c │ │ mov sl, r9 │ │ ldr.w ip, [sp, #68] @ 0x44 │ │ mov r9, r2 │ │ ldr.w fp, [sp, #84] @ 0x54 │ │ ldrd r0, r2, [sp, #32] │ │ mla r1, r0, r2, r1 │ │ add.w r2, fp, r6 │ │ @@ -108030,45 +107973,45 @@ │ │ add r1, r2 │ │ ldr r2, [sp, #36] @ 0x24 │ │ add r2, ip │ │ add r2, r8 │ │ ldr.w r8, [sp, #60] @ 0x3c │ │ add r2, r9 │ │ add r2, lr │ │ - cbz r5, 7024c │ │ + cbz r5, 70300 │ │ ldr r3, [r7, #8] │ │ ldr r6, [sp, #28] │ │ ldr.w lr, [sp, #52] @ 0x34 │ │ ldr.w ip, [sp, #40] @ 0x28 │ │ add r3, r6 │ │ ldr.w fp, [sp, #24] │ │ ldr r4, [sp, #16] │ │ ldrb.w r6, [r3], #1 │ │ subs r5, #1 │ │ add r2, r6 │ │ add r1, r2 │ │ - bne.n 7023e │ │ - b.n 7025a │ │ + bne.n 702f2 │ │ + b.n 7030e │ │ ldr.w lr, [sp, #52] @ 0x34 │ │ ldr.w ip, [sp, #40] @ 0x28 │ │ ldr.w fp, [sp, #24] │ │ ldr r4, [sp, #16] │ │ movw r5, #32881 @ 0x8071 │ │ movt r5, #32775 @ 0x8007 │ │ umull r3, r6, r1, r5 │ │ umull r3, r5, r2, r5 │ │ mov.w r3, r6, lsr #15 │ │ mls r1, r3, r0, r1 │ │ mov.w r3, r5, lsr #15 │ │ mls r0, r3, r0, r2 │ │ orr.w r0, r0, r1, lsl #16 │ │ str.w r0, [r8, #56] @ 0x38 │ │ - cbz r4, 70288 │ │ + cbz r4, 7033c │ │ ldr r5, [sp, #20] │ │ - b.n 70296 │ │ + b.n 7034a │ │ ldr.w r1, [r8, #52] @ 0x34 │ │ ldr r5, [sp, #20] │ │ cmp r0, r1 │ │ it ne │ │ mvnne.w r5, #1 │ │ ldr r1, [sp, #48] @ 0x30 │ │ ldr r0, [sp, #44] @ 0x2c │ │ @@ -108079,133 +108022,133 @@ │ │ str r0, [r1, #0] │ │ add sp, #124 @ 0x7c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r5, #252 @ 0xfc │ │ mov.w r8, #1 │ │ mov.w r9, #15 │ │ - b.n 6ff78 │ │ + b.n 7002c │ │ movs r0, #0 │ │ movs r5, #252 @ 0xfc │ │ mov.w r8, #1 │ │ mov.w r9, #12 │ │ str r0, [sp, #44] @ 0x2c │ │ ldr.w lr, [sp, #52] @ 0x34 │ │ ldr.w sl, [r7, #12] │ │ - b.n 6ff80 │ │ + b.n 70034 │ │ mov ip, r4 │ │ cmp r0, #2 │ │ - bne.n 702e0 │ │ + bne.n 70394 │ │ mov.w r9, #3 │ │ - b.n 6fee4 │ │ + b.n 6ff98 │ │ movs r6, #255 @ 0xff │ │ - b.n 6ff42 │ │ - ldr r3, [pc, #228] @ (703cc ) │ │ + b.n 6fff6 │ │ + ldr r3, [pc, #228] @ (70480 ) │ │ mov r1, r2 │ │ movs r0, #0 │ │ mov.w r2, #288 @ 0x120 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #216] @ (703d0 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #216] @ (70484 ) │ │ mov.w r2, #512 @ 0x200 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ mov r0, r2 │ │ - bl 41394 │ │ + bl 4169c │ │ str.w r9, [sp, #8] │ │ mov.w r9, #33 @ 0x21 │ │ - b.n 70326 │ │ - ldr r3, [pc, #172] @ (703c0 ) │ │ + b.n 703da │ │ + ldr r3, [pc, #172] @ (70474 ) │ │ movs r0, #0 │ │ mov r1, ip │ │ mov r2, sl │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ str r5, [sp, #8] │ │ mov.w r9, #34 @ 0x22 │ │ mov r0, r4 │ │ ldr r1, [sp, #8] │ │ str r0, [sp, #100] @ 0x64 │ │ add r0, sp, #88 @ 0x58 │ │ stmia.w r0, {r6, sl, lr} │ │ movs r6, #255 @ 0xff │ │ strb.w r1, [sp, #104] @ 0x68 │ │ ldr.w sl, [r7, #12] │ │ - b.n 6ff42 │ │ - ldr r3, [pc, #112] @ (703b0 ) │ │ + b.n 6fff6 │ │ + ldr r3, [pc, #112] @ (70464 ) │ │ mov r0, ip │ │ mov r1, r6 │ │ mov r2, r5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #104] @ (703b4 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #104] @ (70468 ) │ │ mov.w r2, #512 @ 0x200 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #136] @ (703e0 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #136] @ (70494 ) │ │ mov r2, r1 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r2, [pc, #88] @ (703bc ) │ │ + bl 3fcb0 │ │ + ldr r2, [pc, #88] @ (70470 ) │ │ mov.w r1, #576 @ 0x240 │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r3, [pc, #100] @ (703d4 ) │ │ + bl 3fd7c │ │ + ldr r3, [pc, #100] @ (70488 ) │ │ movs r0, #0 │ │ movs r1, #2 │ │ mov r2, fp │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r2, [pc, #72] @ (703c4 ) │ │ + bl 3fcb0 │ │ + ldr r2, [pc, #72] @ (70478 ) │ │ movs r1, #19 │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r2, [pc, #64] @ (703c8 ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #64] @ (7047c ) │ │ mov r0, r1 │ │ movs r1, #19 │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r2, [pc, #68] @ (703d8 ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #68] @ (7048c ) │ │ mov r0, ip │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r2, [pc, #28] @ (703b8 ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #28] @ (7046c ) │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r2, [pc, #56] @ (703dc ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #56] @ (70490 ) │ │ mov r0, ip │ │ mov r1, sl │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ nop │ │ - add r7, sp, #320 @ 0x140 │ │ + add r6, sp, #688 @ 0x2b0 │ │ movs r6, r0 │ │ - add r7, sp, #784 @ 0x310 │ │ + add r7, sp, #128 @ 0x80 │ │ movs r6, r0 │ │ - add r6, sp, #928 @ 0x3a0 │ │ + add r6, sp, #272 @ 0x110 │ │ movs r6, r0 │ │ - add r7, sp, #824 @ 0x338 │ │ + add r7, sp, #168 @ 0xa8 │ │ movs r6, r0 │ │ - add r7, sp, #816 @ 0x330 │ │ + add r7, sp, #160 @ 0xa0 │ │ movs r6, r0 │ │ - add r7, sp, #472 @ 0x1d8 │ │ + add r6, sp, #840 @ 0x348 │ │ movs r6, r0 │ │ - add r7, sp, #488 @ 0x1e8 │ │ + add r6, sp, #856 @ 0x358 │ │ movs r6, r0 │ │ - add r7, sp, #856 @ 0x358 │ │ + add r7, sp, #200 @ 0xc8 │ │ movs r6, r0 │ │ - add r7, sp, #744 @ 0x2e8 │ │ + add r7, sp, #88 @ 0x58 │ │ movs r6, r0 │ │ - add r7, sp, #704 @ 0x2c0 │ │ + add r7, sp, #48 @ 0x30 │ │ movs r6, r0 │ │ - add r6, sp, #960 @ 0x3c0 │ │ + add r6, sp, #304 @ 0x130 │ │ movs r6, r0 │ │ - add r6, sp, #880 @ 0x370 │ │ + add r6, sp, #224 @ 0xe0 │ │ movs r6, r0 │ │ - add r7, sp, #488 @ 0x1e8 │ │ + add r6, sp, #856 @ 0x358 │ │ movs r6, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #140 @ 0x8c │ │ str r1, [sp, #4] │ │ movw r1, #10468 @ 0x28e4 │ │ @@ -108226,963 +108169,963 @@ │ │ ldrb.w r0, [sl, #363] @ 0x16b │ │ add.w fp, sp, #40 @ 0x28 │ │ movw r5, #798 @ 0x31e │ │ str r1, [sp, #24] │ │ strd r6, sl, [sp, #16] │ │ uxtb.w r8, r0 │ │ cmp.w r8, #0 │ │ - beq.n 70478 │ │ + beq.n 7052c │ │ cmp.w r8, #2 │ │ - beq.n 7044e │ │ + beq.n 70502 │ │ cmp.w r8, #1 │ │ - bne.w 70672 │ │ + bne.w 70726 │ │ ldr.w sl, [sp, #12] │ │ mov.w r9, #32 │ │ - b.n 7047c │ │ + b.n 70530 │ │ mov r0, fp │ │ movs r1, #32 │ │ mov r4, r3 │ │ - bl d518e │ │ + bl d521e │ │ mov r0, r4 │ │ movs r1, #68 @ 0x44 │ │ - bl d518e │ │ + bl d521e │ │ movs r0, #0 │ │ strh r5, [r6, r0] │ │ adds r0, #2 │ │ cmp.w r0, #2048 @ 0x800 │ │ - bne.n 70462 │ │ + bne.n 70516 │ │ ldr.w sl, [sp, #8] │ │ mov.w r9, #19 │ │ mov r4, r6 │ │ - b.n 704ae │ │ + b.n 70562 │ │ mov.w r9, #288 @ 0x120 │ │ mov r0, fp │ │ movs r1, #32 │ │ - bl d518e │ │ + bl d521e │ │ add r0, sp, #72 @ 0x48 │ │ movs r1, #68 @ 0x44 │ │ - bl d518e │ │ + bl d521e │ │ ldr r0, [sp, #24] │ │ mov.w r1, #3200 @ 0xc80 │ │ smlabb r4, r8, r1, r0 │ │ movs r0, #0 │ │ strh r5, [r4, r0] │ │ adds r0, #2 │ │ cmp.w r0, #2048 @ 0x800 │ │ - bne.n 70498 │ │ + bne.n 7054c │ │ add.w r0, r4, #2048 @ 0x800 │ │ mov.w r1, #1152 @ 0x480 │ │ - bl d4c2c │ │ + bl d51fa │ │ ldrd ip, r0, [sp, #28] │ │ mov lr, r8 │ │ ldrh.w r8, [r0, r8, lsl #1] │ │ cmp r9, r8 │ │ - bcc.w 7067c │ │ + bcc.w 70730 │ │ mov r0, r8 │ │ mov r1, sl │ │ mov.w r9, #0 │ │ cmp.w r8, #0 │ │ - beq.n 704e6 │ │ + beq.n 7059a │ │ ldrb r2, [r1, #0] │ │ cmp r2, #15 │ │ - bhi.w 70672 │ │ + bhi.w 70726 │ │ ldrh.w r3, [fp, r2, lsl #1] │ │ adds r1, #1 │ │ subs r0, #1 │ │ add.w r3, r3, #1 │ │ strh.w r3, [fp, r2, lsl #1] │ │ - bne.n 704cc │ │ + bne.n 70580 │ │ movs r5, #0 │ │ movs r6, #1 │ │ movs r2, #0 │ │ movs r0, #0 │ │ movs r3, #0 │ │ lsls r1, r2, #31 │ │ - beq.n 70514 │ │ + beq.n 705c8 │ │ mov r1, r5 │ │ cmp r5, #16 │ │ it cc │ │ addcc r1, #1 │ │ - bcs.n 7052e │ │ + bcs.n 705e2 │ │ ldrh.w r2, [fp, r5, lsl #1] │ │ movs r6, #0 │ │ add r0, r2 │ │ add r3, r2 │ │ movs r2, #1 │ │ lsls r0, r0, #1 │ │ str.w r0, [ip, r5, lsl #2] │ │ mov r5, r1 │ │ - b.n 704f0 │ │ + b.n 705a4 │ │ rsb r1, r5, #16 │ │ cmp r1, r6 │ │ it cc │ │ movcc r6, r1 │ │ adds r1, r6, r5 │ │ cmp r5, r1 │ │ it ls │ │ movls r5, r1 │ │ cmp r5, #15 │ │ - bhi.n 7052e │ │ + bhi.n 705e2 │ │ adds r1, r5, #1 │ │ - b.n 704fe │ │ + b.n 705b2 │ │ mov.w ip, #4294967295 @ 0xffffffff │ │ cmp.w r0, #65536 @ 0x10000 │ │ - beq.n 7054c │ │ + beq.n 70600 │ │ movs r0, #1 │ │ movs r1, #28 │ │ cmp.w lr, #2 │ │ - beq.w 7068c │ │ + beq.w 70740 │ │ uxth r2, r3 │ │ cmp r2, #1 │ │ - bhi.w 7068c │ │ + bhi.w 70740 │ │ add.w r0, r4, #2048 @ 0x800 │ │ str r0, [sp, #36] @ 0x24 │ │ movw lr, #65535 @ 0xffff │ │ movs r0, #0 │ │ add r3, sp, #72 @ 0x48 │ │ cmp r0, r8 │ │ - bcs.n 70656 │ │ + bcs.n 7070a │ │ mov r1, r0 │ │ ldrb.w r0, [sl, r0] │ │ ands.w r5, r0, #15 │ │ add.w r0, r1, #1 │ │ - beq.n 705b4 │ │ + beq.n 70668 │ │ ldr.w r2, [r3, r5, lsl #2] │ │ cmp r5, #10 │ │ add.w r6, r2, #1 │ │ str.w r6, [r3, r5, lsl #2] │ │ rsb r6, r5, #32 │ │ lsr.w r6, ip, r6 │ │ and.w r2, r2, r6 │ │ rbit r2, r2 │ │ rsb r6, r5, #16 │ │ mov.w r2, r2, lsr #16 │ │ lsr.w r6, r2, r6 │ │ - bhi.n 705ba │ │ + bhi.n 7066e │ │ cmp.w r9, r6, lsr #10 │ │ - bne.n 705b4 │ │ + bne.n 70668 │ │ movs r2, #1 │ │ orr.w r1, r1, r5, lsl #9 │ │ lsls r2, r5 │ │ strh.w r1, [r4, r6, lsl #1] │ │ add r6, r2 │ │ cmp.w r6, #1024 @ 0x400 │ │ - bcc.n 705a8 │ │ + bcc.n 7065c │ │ cmp r0, r8 │ │ - bne.n 7055e │ │ - b.n 70656 │ │ + bne.n 70612 │ │ + b.n 7070a │ │ mov r2, r6 │ │ movw r3, #798 @ 0x31e │ │ bfc r2, #10, #22 │ │ ldrh.w ip, [r4, r2, lsl #1] │ │ cmp ip, r3 │ │ - bne.n 705d6 │ │ + bne.n 7068a │ │ strh.w lr, [r4, r2, lsl #1] │ │ sub.w r9, lr, #2 │ │ - b.n 705da │ │ + b.n 7068e │ │ mov r9, lr │ │ mov lr, ip │ │ lsrs r6, r6, #9 │ │ cmp r5, #11 │ │ - bne.n 705e4 │ │ + bne.n 70698 │ │ mov r3, r9 │ │ - b.n 7062a │ │ + b.n 706de │ │ mov.w ip, #11 │ │ ubfx r2, r6, #1, #1 │ │ sub.w r3, lr, r2 │ │ mvns r3, r3 │ │ uxth r3, r3 │ │ lsrs r3, r3, #6 │ │ cmp r3, #8 │ │ - bhi.n 70676 │ │ + bhi.n 7072a │ │ mvn.w r3, lr │ │ add r2, r3 │ │ ldr r3, [sp, #36] @ 0x24 │ │ uxth r2, r2 │ │ ldrh.w lr, [r3, r2, lsl #1] │ │ cmp.w lr, #0 │ │ - beq.n 70612 │ │ + beq.n 706c6 │ │ mov r3, r9 │ │ - b.n 7061e │ │ + b.n 706d2 │ │ strh.w r9, [r3, r2, lsl #1] │ │ sub.w r3, r9, #2 │ │ mov lr, r9 │ │ mov r9, r3 │ │ add.w ip, ip, #1 │ │ ubfx r6, r6, #1, #15 │ │ cmp ip, r5 │ │ - bcc.n 705e8 │ │ + bcc.n 7069c │ │ ubfx r2, r6, #1, #1 │ │ sub.w r6, lr, r2 │ │ mvns r6, r6 │ │ uxth r6, r6 │ │ lsrs r6, r6, #6 │ │ cmp r6, #8 │ │ - bhi.n 70676 │ │ + bhi.n 7072a │ │ mvn.w r6, lr │ │ add r2, r6 │ │ ldr r6, [sp, #36] @ 0x24 │ │ mov lr, r3 │ │ uxth r2, r2 │ │ mov.w ip, #4294967295 @ 0xffffffff │ │ mov.w r9, #0 │ │ strh.w r1, [r6, r2, lsl #1] │ │ - b.n 70558 │ │ + b.n 7060c │ │ ldr.w sl, [sp, #20] │ │ ldrb.w r0, [sl, #363] @ 0x16b │ │ - cbz r0, 70682 │ │ + cbz r0, 70736 │ │ cmp r0, #2 │ │ - beq.n 70694 │ │ + beq.n 70748 │ │ subs r0, #1 │ │ strb.w r0, [sl, #363] @ 0x16b │ │ ldr r6, [sp, #16] │ │ movw r5, #798 @ 0x31e │ │ - b.n 7042c │ │ + b.n 704e0 │ │ movs r0, #3 │ │ - b.n 7068c │ │ + b.n 70740 │ │ movs r0, #3 │ │ movs r1, #10 │ │ - b.n 7068c │ │ + b.n 70740 │ │ movs r0, #3 │ │ movs r1, #28 │ │ - b.n 7068c │ │ + b.n 70740 │ │ ldr r1, [sp, #4] │ │ movs r0, #0 │ │ str r0, [r1, #12] │ │ movs r0, #1 │ │ movs r1, #12 │ │ add sp, #140 @ 0x8c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r1, [sp, #4] │ │ movs r0, #0 │ │ str r0, [r1, #12] │ │ movs r0, #1 │ │ - b.n 70678 │ │ - bmi.n 7064a │ │ + b.n 7072c │ │ + bmi.n 706fe │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ ldr.w r8, [r7, #8] │ │ mov sl, r1 │ │ mov r9, r0 │ │ subs r0, r3, r2 │ │ bic.w r1, r8, #3 │ │ subs r5, r2, r3 │ │ add.w r6, r1, r3 │ │ it ls │ │ movls r5, r0 │ │ cmp r3, r2 │ │ - bls.n 706ee │ │ + bls.n 707a2 │ │ cmp r5, #1 │ │ - bne.n 706ee │ │ + bne.n 707a2 │ │ subs r0, r3, #1 │ │ cmp r0, sl │ │ - bcs.w 708bc │ │ + bcs.w 70970 │ │ cmp r6, r3 │ │ - bcc.w 70854 │ │ + bcc.w 70908 │ │ cmp r6, sl │ │ - bhi.w 70854 │ │ + bhi.w 70908 │ │ ldrb.w r2, [r9, r0] │ │ add.w r0, r9, r3 │ │ - bl d50b2 │ │ + bl d5294 │ │ subs r1, r6, #1 │ │ - b.n 70798 │ │ + b.n 7084c │ │ subs.w ip, sl, #3 │ │ it cc │ │ movcc.w ip, #0 │ │ cmp ip, r6 │ │ it cs │ │ movcs ip, r6 │ │ cmp r3, r2 │ │ it hi │ │ cmphi r0, #3 │ │ - bhi.n 70766 │ │ + bhi.n 7081a │ │ cmp r3, ip │ │ - bcs.n 70794 │ │ + bcs.n 70848 │ │ add.w lr, r9, r3 │ │ add.w fp, r9, r2 │ │ movs r4, #0 │ │ adds r0, r3, r4 │ │ adds r0, #3 │ │ cmp r0, sl │ │ - bcs.w 70812 │ │ + bcs.w 708c6 │ │ adds r0, r2, r4 │ │ adds r1, r0, #3 │ │ cmp r1, sl │ │ - bcs.w 70820 │ │ + bcs.w 708d4 │ │ cmp r0, sl │ │ - bcs.w 708b2 │ │ + bcs.w 70966 │ │ ldrb.w r1, [fp, r4] │ │ strb.w r1, [lr, r4] │ │ adds r1, r0, #1 │ │ cmp r1, sl │ │ - bcs.w 708a6 │ │ + bcs.w 7095a │ │ add.w r1, fp, r4 │ │ adds r0, #2 │ │ add.w r6, lr, r4 │ │ cmp r0, sl │ │ ldrb r5, [r1, #1] │ │ strb r5, [r6, #1] │ │ - bcs.w 7089c │ │ + bcs.w 70950 │ │ ldrb r0, [r1, #2] │ │ adds r4, #4 │ │ strb r0, [r6, #2] │ │ ldrb r0, [r1, #3] │ │ strb r0, [r6, #3] │ │ adds r6, r3, r4 │ │ cmp r6, ip │ │ - bcc.n 70714 │ │ + bcc.n 707c8 │ │ adds r1, r2, r4 │ │ - b.n 70798 │ │ + b.n 7084c │ │ cmp r3, ip │ │ - bcs.n 70794 │ │ + bcs.n 70848 │ │ sub.w r0, sl, #4 │ │ mov r6, r3 │ │ adds r1, r2, #3 │ │ cmp r1, sl │ │ - bcs.n 7082e │ │ + bcs.n 708e2 │ │ adds r1, r2, #4 │ │ cmn.w r2, #4 │ │ - bcs.n 7083a │ │ + bcs.n 708ee │ │ cmp r6, r0 │ │ - bhi.n 70846 │ │ + bhi.n 708fa │ │ ldr.w r2, [r9, r2] │ │ str.w r2, [r9, r6] │ │ adds r6, #4 │ │ mov r2, r1 │ │ cmp r6, ip │ │ - bcs.n 70798 │ │ - b.n 70770 │ │ + bcs.n 7084c │ │ + b.n 70824 │ │ mov r6, r3 │ │ mov r1, r2 │ │ and.w r0, r8, #3 │ │ tbb [pc, r0] │ │ lsls r5, r6, #8 │ │ adds r3, r1, r4 │ │ cmp r1, sl │ │ - bcs.w 708c6 │ │ + bcs.w 7097a │ │ cmp r6, sl │ │ - bcs.w 708cc │ │ + bcs.w 70980 │ │ mov r2, r1 │ │ mov r0, r6 │ │ - b.n 70802 │ │ + b.n 708b6 │ │ adds r0, r6, #1 │ │ cmp r0, sl │ │ - bcs.n 70864 │ │ + bcs.n 70918 │ │ adds r2, r1, #1 │ │ cmp r2, sl │ │ - bcs.n 70880 │ │ + bcs.n 70934 │ │ cmp r1, sl │ │ - bcs.w 708d2 │ │ + bcs.w 70986 │ │ cmp r6, sl │ │ - bcc.n 707fa │ │ - ldr r2, [pc, #304] @ (70900 ) │ │ + bcc.n 708ae │ │ + ldr r2, [pc, #304] @ (709b4 ) │ │ add r2, pc │ │ - b.n 708ee │ │ + b.n 709a2 │ │ adds r0, r6, #2 │ │ cmp r0, sl │ │ - bcs.n 70872 │ │ + bcs.n 70926 │ │ adds r2, r1, #2 │ │ cmp r2, sl │ │ - bcs.n 7088e │ │ + bcs.n 70942 │ │ cmp r1, sl │ │ - bcs.n 708d8 │ │ + bcs.n 7098c │ │ cmp r6, sl │ │ - bcs.n 708de │ │ + bcs.n 70992 │ │ ldrb.w r3, [r9, r1] │ │ adds r1, #1 │ │ cmp r1, sl │ │ strb.w r3, [r9, r6] │ │ - bcs.n 708e4 │ │ + bcs.n 70998 │ │ adds r6, #1 │ │ cmp r6, sl │ │ - bcs.n 708ea │ │ + bcs.n 7099e │ │ ldrb.w r1, [r9, r1] │ │ strb.w r1, [r9, r6] │ │ ldrb.w r1, [r9, r2] │ │ strb.w r1, [r9, r0] │ │ add sp, #4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #252] @ (70910 ) │ │ + ldr r0, [pc, #252] @ (709c4 ) │ │ movs r1, #47 @ 0x2f │ │ - ldr r2, [pc, #252] @ (70914 ) │ │ + ldr r2, [pc, #252] @ (709c8 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r0, [pc, #244] @ (70918 ) │ │ + bl 3fd54 │ │ + ldr r0, [pc, #244] @ (709cc ) │ │ movs r1, #72 @ 0x48 │ │ - ldr r2, [pc, #244] @ (7091c ) │ │ + ldr r2, [pc, #244] @ (709d0 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r3, [pc, #248] @ (70928 ) │ │ + bl 3fd54 │ │ + ldr r3, [pc, #248] @ (709dc ) │ │ movs r0, #0 │ │ mov r2, sl │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #240] @ (7092c ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #240] @ (709e0 ) │ │ mov r0, r2 │ │ mov r2, sl │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #232] @ (70930 ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #232] @ (709e4 ) │ │ movs r1, #43 @ 0x2b │ │ - ldr r2, [pc, #232] @ (70934 ) │ │ + ldr r2, [pc, #232] @ (709e8 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ - ldr r5, [pc, #180] @ (7090c ) │ │ + bl 3fd60 │ │ + ldr r5, [pc, #180] @ (709c0 ) │ │ mov r0, r3 │ │ mov r1, r6 │ │ mov r2, sl │ │ add r5, pc │ │ mov r3, r5 │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #208] @ (70938 ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #208] @ (709ec ) │ │ movs r1, #47 @ 0x2f │ │ - ldr r2, [pc, #208] @ (7093c ) │ │ + ldr r2, [pc, #208] @ (709f0 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r0, [pc, #216] @ (7094c ) │ │ + bl 3fd54 │ │ + ldr r0, [pc, #216] @ (70a00 ) │ │ movs r1, #47 @ 0x2f │ │ - ldr r2, [pc, #216] @ (70950 ) │ │ + ldr r2, [pc, #216] @ (70a04 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r0, [pc, #188] @ (70940 ) │ │ + bl 3fd54 │ │ + ldr r0, [pc, #188] @ (709f4 ) │ │ movs r1, #72 @ 0x48 │ │ - ldr r2, [pc, #188] @ (70944 ) │ │ + ldr r2, [pc, #188] @ (709f8 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r0, [pc, #196] @ (70954 ) │ │ + bl 3fd54 │ │ + ldr r0, [pc, #196] @ (70a08 ) │ │ movs r1, #72 @ 0x48 │ │ - ldr r2, [pc, #196] @ (70958 ) │ │ + ldr r2, [pc, #196] @ (70a0c ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r2, [pc, #132] @ (70924 ) │ │ + bl 3fd54 │ │ + ldr r2, [pc, #132] @ (709d8 ) │ │ mov r1, sl │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r2, [pc, #76] @ (708f4 ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #76] @ (709a8 ) │ │ add r2, pc │ │ mov r0, r1 │ │ mov r1, sl │ │ - bl 3fa74 │ │ - ldr r2, [pc, #108] @ (70920 ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #108] @ (709d4 ) │ │ mov r1, sl │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r2, [pc, #72] @ (70908 ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #72] @ (709bc ) │ │ mov r1, sl │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r2, [pc, #48] @ (708f8 ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #48] @ (709ac ) │ │ add r2, pc │ │ - b.n 708aa │ │ - ldr r2, [pc, #44] @ (708fc ) │ │ + b.n 7095e │ │ + ldr r2, [pc, #44] @ (709b0 ) │ │ add r2, pc │ │ - b.n 708ee │ │ - ldr r2, [pc, #116] @ (70948 ) │ │ + b.n 709a2 │ │ + ldr r2, [pc, #116] @ (709fc ) │ │ add r2, pc │ │ - b.n 708aa │ │ - ldr r2, [pc, #128] @ (7095c ) │ │ + b.n 7095e │ │ + ldr r2, [pc, #128] @ (70a10 ) │ │ add r2, pc │ │ - b.n 708aa │ │ - ldr r2, [pc, #128] @ (70960 ) │ │ + b.n 7095e │ │ + ldr r2, [pc, #128] @ (70a14 ) │ │ add r2, pc │ │ - b.n 708ee │ │ - ldr r2, [pc, #124] @ (70964 ) │ │ + b.n 709a2 │ │ + ldr r2, [pc, #124] @ (70a18 ) │ │ add r2, pc │ │ - b.n 708aa │ │ - ldr r2, [pc, #24] @ (70904 ) │ │ + b.n 7095e │ │ + ldr r2, [pc, #24] @ (709b8 ) │ │ add r2, pc │ │ mov r0, r6 │ │ - b.n 708ac │ │ + b.n 70960 │ │ nop │ │ - add r2, sp, #944 @ 0x3b0 │ │ + add r2, sp, #288 @ 0x120 │ │ movs r6, r0 │ │ - add r2, sp, #944 @ 0x3b0 │ │ + add r2, sp, #288 @ 0x120 │ │ movs r6, r0 │ │ - add r2, sp, #984 @ 0x3d8 │ │ + add r2, sp, #328 @ 0x148 │ │ movs r6, r0 │ │ - add r4, sp, #216 @ 0xd8 │ │ + add r3, sp, #584 @ 0x248 │ │ movs r6, r0 │ │ - add r3, sp, #480 @ 0x1e0 │ │ + add r2, sp, #848 @ 0x350 │ │ movs r6, r0 │ │ - add r2, sp, #528 @ 0x210 │ │ + add r1, sp, #896 @ 0x380 │ │ movs r6, r0 │ │ - add r2, sp, #992 @ 0x3e0 │ │ + add r2, sp, #336 @ 0x150 │ │ movs r6, r0 │ │ - ldr r0, [r7, #8] │ │ - vtbx.8 d26, {d10-d13}, d10 │ │ + ldr r3, [r0, #0] │ │ + vtbl.8 d26, {d26-d28}, d22 │ │ movs r6, r0 │ │ - ldr r1, [r3, #12] │ │ - vtbx.8 d26, {d10-d13}, d12 │ │ + ldr r4, [r4, #0] │ │ + vtbl.8 d26, {d26-d28}, d24 │ │ movs r6, r0 │ │ - add r2, sp, #824 @ 0x338 │ │ + add r2, sp, #168 @ 0xa8 │ │ movs r6, r0 │ │ - add r3, sp, #16 │ │ + add r2, sp, #384 @ 0x180 │ │ movs r6, r0 │ │ - add r4, sp, #256 @ 0x100 │ │ + add r3, sp, #624 @ 0x270 │ │ movs r6, r0 │ │ - add r4, sp, #208 @ 0xd0 │ │ + add r3, sp, #576 @ 0x240 │ │ movs r6, r0 │ │ - ldr r1, [r5, #28] │ │ - vdup.16 d26, d22[2] │ │ + ldr r4, [r6, #16] │ │ + vtbl.8 d26, {d26-d29}, d2 │ │ movs r6, r0 │ │ - ldr r5, [r3, #12] │ │ - vtbx.8 d26, {d10-d13}, d24 │ │ + ldr r0, [r5, #0] │ │ + vtbx.8 d26, {d26-d28}, d4 │ │ movs r6, r0 │ │ - ldr r0, [r6, #12] │ │ - @ instruction: 0xfffaab5c │ │ + ldr r3, [r7, #0] │ │ + @ instruction: 0xfffaaab8 │ │ movs r6, r0 │ │ - add r3, sp, #128 @ 0x80 │ │ + add r2, sp, #496 @ 0x1f0 │ │ movs r6, r0 │ │ - ldr r6, [r0, #20] │ │ - @ instruction: 0xfffaab9a │ │ + ldr r1, [r2, #8] │ │ + @ instruction: 0xfffaaaf6 │ │ movs r6, r0 │ │ - ldr r1, [r3, #20] │ │ - vtbl.8 d26, {d26-d29}, d14 │ │ + ldr r4, [r4, #8] │ │ + vtbx.8 d26, {d26-d28}, d26 │ │ movs r6, r0 │ │ - add r3, sp, #360 @ 0x168 │ │ + add r2, sp, #728 @ 0x2d8 │ │ movs r6, r0 │ │ - add r3, sp, #400 @ 0x190 │ │ + add r2, sp, #768 @ 0x300 │ │ movs r6, r0 │ │ - add r3, sp, #440 @ 0x1b8 │ │ + add r2, sp, #808 @ 0x328 │ │ movs r6, r0 │ │ push {r7, lr} │ │ ldr.w lr, [sp, #8] │ │ mov ip, r2 │ │ subs r2, r2, r3 │ │ cmp.w lr, #3 │ │ - bne.n 70988 │ │ + bne.n 70a3c │ │ cmn.w ip, #4 │ │ itt ls │ │ addls.w r3, ip, #3 │ │ cmpls r3, r1 │ │ - bls.n 70996 │ │ + bls.n 70a4a │ │ pop {r7, pc} │ │ str.w lr, [sp, #8] │ │ mov r3, ip │ │ ldmia.w sp!, {r7, lr} │ │ - b.w 706a0 │ │ + b.w 70754 │ │ adds r3, r2, #2 │ │ cmp r3, r1 │ │ it cc │ │ cmpcc r2, r1 │ │ - bcs.n 70986 │ │ + bcs.n 70a3a │ │ add.w lr, r2, #1 │ │ cmp lr, r1 │ │ itttt cc │ │ ldrbcc r1, [r0, r2] │ │ strbcc.w r1, [r0, ip] │ │ ldrbcc.w r1, [r0, lr] │ │ addcc.w r2, r0, ip │ │ ittt cc │ │ strbcc r1, [r2, #1] │ │ ldrbcc r0, [r0, r3] │ │ strbcc r0, [r2, #2] │ │ pop {r7, pc} │ │ - cbz r3, 709c6 │ │ + cbz r3, 70a7a │ │ movs r0, #0 │ │ bx lr │ │ push {r4, r5, r7, lr} │ │ ldr r3, [sp, #20] │ │ - cbnz r3, 709da │ │ + cbnz r3, 70a8e │ │ ldr r5, [sp, #16] │ │ cmp r5, r2 │ │ - bcc.n 709da │ │ + bcc.n 70a8e │ │ cmp r1, r5 │ │ it cs │ │ cmpcs r5, r2 │ │ - bhi.n 709de │ │ + bhi.n 70a92 │ │ movs r0, #0 │ │ pop {r4, r5, r7, pc} │ │ sub.w ip, r5, r2 │ │ add.w lr, r0, r2 │ │ cmp.w ip, #3 │ │ - bhi.n 70a02 │ │ + bhi.n 70ab6 │ │ mov r2, ip │ │ mov r3, lr │ │ ldrb r0, [r3, #0] │ │ cmp r0, #0 │ │ - beq.n 70a98 │ │ + beq.n 70b4c │ │ adds r3, #1 │ │ subs r2, #1 │ │ mov.w r0, #0 │ │ - bne.n 709f0 │ │ - b.n 70aa6 │ │ + bne.n 70aa4 │ │ + b.n 70b5a │ │ ldr.w r3, [lr] │ │ movw r1, #256 @ 0x100 │ │ movt r1, #257 @ 0x101 │ │ subs r4, r1, r3 │ │ orrs r3, r4 │ │ mvns r3, r3 │ │ tst.w r3, #2155905152 @ 0x80808080 │ │ - bne.n 70a46 │ │ + bne.n 70afa │ │ adds r4, r0, r5 │ │ bic.w r0, lr, #3 │ │ adds r3, r0, #4 │ │ cmp.w ip, #9 │ │ - bcs.n 70a5a │ │ + bcs.n 70b0e │ │ cmp r3, r4 │ │ - bcs.n 709da │ │ + bcs.n 70a8e │ │ and.w r0, lr, #3 │ │ add r0, r5 │ │ subs r0, r0, r2 │ │ subs r2, r0, #4 │ │ ldrb r0, [r3, #0] │ │ - cbz r0, 70a98 │ │ + cbz r0, 70b4c │ │ adds r3, #1 │ │ subs r2, #1 │ │ mov.w r0, #0 │ │ - bne.n 70a36 │ │ - b.n 70aa6 │ │ + bne.n 70aea │ │ + b.n 70b5a │ │ mov r2, ip │ │ mov r3, lr │ │ ldrb r0, [r3, #0] │ │ - cbz r0, 70a98 │ │ + cbz r0, 70b4c │ │ adds r3, #1 │ │ subs r2, #1 │ │ mov.w r0, #0 │ │ - bne.n 70a4a │ │ - b.n 70aa6 │ │ + bne.n 70afe │ │ + b.n 70b5a │ │ sub.w r0, r4, #8 │ │ cmp r3, r0 │ │ - bhi.n 70a86 │ │ + bhi.n 70b3a │ │ ldr r2, [r3, #0] │ │ subs r5, r1, r2 │ │ orrs r2, r5 │ │ mvns r2, r2 │ │ tst.w r2, #2155905152 @ 0x80808080 │ │ itttt eq │ │ ldreq r2, [r3, #4] │ │ subeq r5, r1, r2 │ │ orreq r2, r5 │ │ mvneq r2, r2 │ │ it eq │ │ tsteq.w r2, #2155905152 @ 0x80808080 │ │ - bne.n 70a86 │ │ + bne.n 70b3a │ │ adds r3, #8 │ │ cmp r3, r0 │ │ - bls.n 70a62 │ │ + bls.n 70b16 │ │ cmp r3, r4 │ │ - bcs.n 709da │ │ + bcs.n 70a8e │ │ ldrb r0, [r3, #0] │ │ - cbz r0, 70a98 │ │ + cbz r0, 70b4c │ │ adds r3, #1 │ │ movs r0, #0 │ │ cmp r3, r4 │ │ - bne.n 70a8a │ │ - b.n 70aa6 │ │ + bne.n 70b3e │ │ + b.n 70b5a │ │ sub.w r1, r3, lr │ │ cmp r1, ip │ │ it hi │ │ movhi.w lr, #0 │ │ mov r0, lr │ │ pop {r4, r5, r7, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #44 @ 0x2c │ │ strd r2, r1, [sp, #12] │ │ mov r4, r0 │ │ ldr r5, [r0, #0] │ │ add r0, sp, #20 │ │ dmb ish │ │ adds r6, r0, #1 │ │ - ldr r0, [pc, #736] @ (70da0 ) │ │ + ldr r0, [pc, #736] @ (70e54 ) │ │ add.w sl, sp, #32 │ │ mov.w fp, #0 │ │ mov.w r8, #4294967295 @ 0xffffffff │ │ add r0, pc │ │ mov r9, r0 │ │ - b.n 70ad8 │ │ + b.n 70b8c │ │ ldr r5, [r4, #0] │ │ dmb ish │ │ and.w r0, r5, #3 │ │ tbh [pc, r0, lsl #1] │ │ movs r4, r0 │ │ movs r5, r2 │ │ lsls r4, r1, #5 │ │ lsls r5, r0, #4 │ │ adds r1, r5, #1 │ │ ldrex r0, [r4] │ │ cmp r0, r5 │ │ - bne.w 70caa │ │ + bne.w 70d5e │ │ strex r2, r1, [r4] │ │ cmp r2, #0 │ │ - bne.n 70aea │ │ + bne.n 70b9e │ │ movs r1, #1 │ │ mov r5, r0 │ │ cmp r1, #0 │ │ dmb ish │ │ - beq.n 70ad8 │ │ - b.n 70cec │ │ + beq.n 70b8c │ │ + b.n 70da0 │ │ ldr.w r0, [r9, #56] @ 0x38 │ │ dmb ish │ │ cmp r0, #0 │ │ itt eq │ │ addeq.w r0, r9, #56 @ 0x38 │ │ - bleq 7740c │ │ - blx d8830 │ │ + bleq 77474 │ │ + blx d8840 │ │ cmp r0, #2 │ │ - bls.n 70bac │ │ + bls.n 70c60 │ │ subs r0, #8 │ │ ldrex r1, [r0] │ │ adds r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 70b28 │ │ + bne.n 70bdc │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ - ble.w 70d98 │ │ + ble.w 70e4c │ │ str r0, [sp, #20] │ │ bic.w r0, r5, #3 │ │ strb.w fp, [sp, #28] │ │ str r0, [sp, #24] │ │ ldrex r0, [r4] │ │ cmp r0, r5 │ │ - bne.n 70b64 │ │ + bne.n 70c18 │ │ dmb ish │ │ strex r1, r6, [r4] │ │ - cbz r1, 70b70 │ │ + cbz r1, 70c24 │ │ ldrex r0, [r4] │ │ cmp r0, r5 │ │ - beq.n 70b56 │ │ + beq.n 70c0a │ │ movs r1, #0 │ │ clrex │ │ mov r5, r0 │ │ - cbz r1, 70b7a │ │ - b.n 70c82 │ │ + cbz r1, 70c2e │ │ + b.n 70d36 │ │ movs r1, #1 │ │ mov r5, r0 │ │ cmp r1, #0 │ │ - bne.w 70c82 │ │ + bne.w 70d36 │ │ and.w r0, r5, #3 │ │ cmp r0, #1 │ │ - bne.w 70cbe │ │ + bne.w 70d72 │ │ ldr r0, [sp, #20] │ │ cmp r0, #0 │ │ - beq.n 70b0a │ │ + beq.n 70bbe │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 70b8e │ │ + bne.n 70c42 │ │ cmp r1, #1 │ │ - bne.n 70b0a │ │ + bne.n 70bbe │ │ dmb ish │ │ ldr r0, [sp, #20] │ │ - bl 77604 │ │ - b.n 70b0a │ │ - bl 95ee4 │ │ - b.n 70b3e │ │ + bl 7766c │ │ + b.n 70bbe │ │ + bl 95f50 │ │ + b.n 70bf2 │ │ ldr.w r0, [r9, #56] @ 0x38 │ │ dmb ish │ │ - cbnz r0, 70bc4 │ │ + cbnz r0, 70c78 │ │ add.w r0, r9, #56 @ 0x38 │ │ - bl 7740c │ │ - blx d8830 │ │ + bl 77474 │ │ + blx d8840 │ │ cmp r0, #2 │ │ - bls.n 70c7a │ │ + bls.n 70d2e │ │ sub.w r7, r0, #8 │ │ ldrex r0, [r7] │ │ adds r1, r0, #1 │ │ strex r2, r1, [r7] │ │ cmp r2, #0 │ │ - bne.n 70bd0 │ │ + bne.n 70c84 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - ble.w 70d98 │ │ + ble.w 70e4c │ │ add.w r5, r7, #24 │ │ ldrex r0, [r5] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r5] │ │ cmp r2, #0 │ │ - bne.n 70bea │ │ + bne.n 70c9e │ │ cmp r0, #1 │ │ dmb ish │ │ - bne.n 70c0a │ │ - b.n 70c58 │ │ + bne.n 70cbe │ │ + b.n 70d0c │ │ clrex │ │ dmb ish │ │ str.w fp, [sp, #32] │ │ ldr r0, [r5, #0] │ │ adds r0, #1 │ │ - bne.n 70c44 │ │ + bne.n 70cf8 │ │ ldr r0, [sp, #32] │ │ mov r1, r5 │ │ movs r2, #137 @ 0x89 │ │ mov.w r3, #4294967295 @ 0xffffffff │ │ cmp r0, #0 │ │ it ne │ │ addne.w r0, sl, #4 │ │ strd r0, fp, [sp] │ │ movs r0, #240 @ 0xf0 │ │ str.w r8, [sp, #8] │ │ - blx d87d0 │ │ + blx d87e0 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 70c44 │ │ - blx d8850 │ │ + bgt.n 70cf8 │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ cmp r0, #4 │ │ - beq.n 70c0e │ │ + beq.n 70cc2 │ │ ldrex r0, [r5] │ │ cmp r0, #1 │ │ - bne.n 70c02 │ │ + bne.n 70cb6 │ │ strex r0, fp, [r5] │ │ cmp r0, #0 │ │ - bne.n 70c44 │ │ + bne.n 70cf8 │ │ dmb ish │ │ dmb ish │ │ ldrex r0, [r7] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r7] │ │ cmp r2, #0 │ │ - bne.n 70c5c │ │ + bne.n 70d10 │ │ cmp r0, #1 │ │ - bne.n 70c82 │ │ + bne.n 70d36 │ │ mov r0, r7 │ │ dmb ish │ │ - bl 77604 │ │ - b.n 70c82 │ │ - bl 95ee4 │ │ + bl 7766c │ │ + b.n 70d36 │ │ + bl 95f50 │ │ mov r7, r0 │ │ - b.n 70be6 │ │ + b.n 70c9a │ │ ldrb.w r0, [sp, #28] │ │ dmb ish │ │ cmp r0, #0 │ │ - beq.n 70bb2 │ │ + beq.n 70c66 │ │ ldr r0, [sp, #20] │ │ cmp r0, #0 │ │ - beq.w 70ad2 │ │ + beq.w 70b86 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 70c9a │ │ - b.n 70cd8 │ │ + bne.n 70d4e │ │ + b.n 70d8c │ │ movs r1, #0 │ │ clrex │ │ mov r5, r0 │ │ cmp r1, #0 │ │ dmb ish │ │ - beq.w 70ad8 │ │ - b.n 70cec │ │ + beq.w 70b8c │ │ + b.n 70da0 │ │ ldr r0, [sp, #20] │ │ cmp r0, #0 │ │ - beq.w 70ad2 │ │ + beq.w 70b86 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 70cca │ │ + bne.n 70d7e │ │ cmp r1, #1 │ │ - bne.w 70ad2 │ │ + bne.w 70b86 │ │ dmb ish │ │ ldr r0, [sp, #20] │ │ - bl 77604 │ │ - b.n 70ad2 │ │ - b.n 70cea │ │ + bl 7766c │ │ + b.n 70b86 │ │ + b.n 70d9e │ │ ldr r0, [sp, #12] │ │ ldr r1, [r0, #16] │ │ ldr r0, [sp, #16] │ │ blx r1 │ │ cmp r0, #0 │ │ it ne │ │ movne r0, #2 │ │ dmb ish │ │ ldrex r1, [r4] │ │ strex r2, r0, [r4] │ │ cmp r2, #0 │ │ - bne.n 70cfe │ │ + bne.n 70db2 │ │ and.w r0, r1, #3 │ │ dmb ish │ │ cmp r0, #1 │ │ str r0, [sp, #32] │ │ - bne.n 70d86 │ │ + bne.n 70e3a │ │ subs r0, r1, #1 │ │ - beq.n 70d78 │ │ + beq.n 70e2c │ │ movs r5, #0 │ │ movs r6, #1 │ │ - b.n 70d26 │ │ + b.n 70dda │ │ mov r0, r7 │ │ - cbz r7, 70d78 │ │ + cbz r7, 70e2c │ │ ldrd r4, r7, [r0] │ │ str r5, [r0, #0] │ │ - cbz r4, 70d7e │ │ + cbz r4, 70e32 │ │ add.w r1, r4, #24 │ │ dmb ish │ │ strb r6, [r0, #8] │ │ dmb ish │ │ ldrex r0, [r1] │ │ strex r2, r6, [r1] │ │ cmp r2, #0 │ │ - bne.n 70d3c │ │ + bne.n 70df0 │ │ adds r0, #1 │ │ - bne.n 70d56 │ │ + bne.n 70e0a │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ + blx d87e0 │ │ dmb ish │ │ ldrex r0, [r4] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r4] │ │ cmp r2, #0 │ │ - bne.n 70d5a │ │ + bne.n 70e0e │ │ cmp r0, #1 │ │ - bne.n 70d22 │ │ + bne.n 70dd6 │ │ mov r0, r4 │ │ dmb ish │ │ - bl 77604 │ │ - b.n 70d22 │ │ + bl 7766c │ │ + b.n 70dd6 │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #44] @ (70dac ) │ │ + ldr r0, [pc, #44] @ (70e60 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r1, [pc, #28] @ (70da4 ) │ │ + bl 3fd40 │ │ + ldr r1, [pc, #28] @ (70e58 ) │ │ add r0, sp, #32 │ │ - ldr r2, [pc, #28] @ (70da8 ) │ │ + ldr r2, [pc, #28] @ (70e5c ) │ │ add r1, pc │ │ add r2, pc │ │ - bl 40ff4 │ │ - bl 962a4 │ │ + bl 412fc │ │ + bl 96310 │ │ udf #254 @ 0xfe │ │ - bl 416fe │ │ + bl 41a06 │ │ nop │ │ - bgt.n 70d34 │ │ + bgt.n 70ec0 │ │ movs r6, r0 │ │ - strb r0, [r7, r2] │ │ - vrint?.f32 d26, d6 │ │ + strb r4, [r0, r0] │ │ + vrint?.f32 q13, q9 │ │ movs r6, r0 │ │ - add r7, pc, #16 @ (adr r7, 70dc0 ) │ │ + add r6, pc, #384 @ (adr r6, 70fe4 ) │ │ movs r6, r0 │ │ push {r7, lr} │ │ mov r7, sp │ │ - bl 70dbc │ │ - bl 93d40 │ │ + bl 70e70 │ │ + bl 93dac │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #16 │ │ mov r5, r1 │ │ - ldr r1, [pc, #204] @ (70e98 ) │ │ + ldr r1, [pc, #204] @ (70f4c ) │ │ mov r6, r0 │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ add r1, pc │ │ - blx d8920 │ │ - cbz r0, 70e24 │ │ + blx d8930 │ │ + cbz r0, 70ed8 │ │ mov r9, r0 │ │ mov r0, r6 │ │ blx r5 │ │ mov r5, r0 │ │ ldr r6, [r1, #12] │ │ mov r0, sp │ │ mov r1, r5 │ │ @@ -109199,105 +109142,105 @@ │ │ movt r3, #22438 @ 0x57a6 │ │ eors r2, r3 │ │ movw r3, #23917 @ 0x5d6d │ │ movt r3, #54987 @ 0xd6cb │ │ eors r0, r3 │ │ orrs r0, r2 │ │ orrs r0, r1 │ │ - bne.n 70e2c │ │ + bne.n 70ee0 │ │ movs r1, #4 │ │ mov r0, r5 │ │ ldr r5, [r5, r1] │ │ - cbnz r5, 70e70 │ │ + cbnz r5, 70f24 │ │ add sp, #16 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, sp │ │ mov r1, r5 │ │ blx r6 │ │ - movw r6, #9574 @ 0x2566 │ │ + movw r6, #48918 @ 0xbf16 │ │ ldmia.w sp, {r0, r1, r2, r3} │ │ - movt r6, #52115 @ 0xcb93 │ │ + movt r6, #25389 @ 0x632d │ │ eors r3, r6 │ │ - movw r6, #5028 @ 0x13a4 │ │ - movt r6, #2835 @ 0xb13 │ │ + movw r6, #10731 @ 0x29eb │ │ + movt r6, #58959 @ 0xe64f │ │ eors r1, r6 │ │ orrs r1, r3 │ │ - movw r3, #50617 @ 0xc5b9 │ │ - movt r3, #17825 @ 0x45a1 │ │ + movw r3, #15858 @ 0x3df2 │ │ + movt r3, #39903 @ 0x9bdf │ │ eors r2, r3 │ │ - movw r3, #34390 @ 0x8656 │ │ - movt r3, #21060 @ 0x5244 │ │ + movw r3, #49478 @ 0xc146 │ │ + movt r3, #16102 @ 0x3ee6 │ │ eors r0, r3 │ │ orrs r0, r2 │ │ orrs r0, r1 │ │ - bne.n 70e24 │ │ + bne.n 70ed8 │ │ adds r0, r5, #4 │ │ movs r1, #8 │ │ ldr r5, [r5, r1] │ │ cmp r5, #0 │ │ - beq.n 70e24 │ │ + beq.n 70ed8 │ │ ldr.w r8, [r0] │ │ adds r0, r5, #1 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.n 70e24 │ │ + beq.n 70ed8 │ │ mov r1, r8 │ │ mov r2, r5 │ │ mov r6, r0 │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #0 │ │ strb r0, [r6, r5] │ │ mov r0, r6 │ │ blx r9 │ │ add sp, #16 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - bkpt 0x00a4 │ │ + bkpt 0x0015 │ │ vcle.f32 d27, d0, #0 │ │ mov r7, sp │ │ - ldr r0, [pc, #12] @ (70eb0 ) │ │ + ldr r0, [pc, #12] @ (70f64 ) │ │ movs r1, #40 @ 0x28 │ │ - ldr r2, [pc, #12] @ (70eb4 ) │ │ + ldr r2, [pc, #12] @ (70f68 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ + bl 3fd54 │ │ nop │ │ - strh r7, [r4, #44] @ 0x2c │ │ - vsli.64 q13, q14, #58 @ 0x3a │ │ + strh r3, [r6, #38] @ 0x26 │ │ + vsli.32 q13, q4, #26 │ │ movs r6, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #116 @ 0x74 │ │ str r0, [sp, #32] │ │ movs r0, #6 │ │ - ldr r3, [pc, #844] @ (71214 ) │ │ + ldr r3, [pc, #844] @ (712c8 ) │ │ mov fp, r2 │ │ str r0, [sp, #0] │ │ add r0, sp, #40 @ 0x28 │ │ add r3, pc │ │ mov r8, r1 │ │ - bl 41018 │ │ + bl 41320 │ │ ldr r0, [sp, #40] @ 0x28 │ │ str.w r8, [sp, #36] @ 0x24 │ │ cmp r0, #0 │ │ - beq.n 70fc4 │ │ + beq.n 71078 │ │ ldr r2, [sp, #76] @ 0x4c │ │ ldrd r4, sl, [sp, #96] @ 0x60 │ │ sub.w r6, sl, #1 │ │ ldrd lr, r1, [sp, #88] @ 0x58 │ │ adds r0, r2, #1 │ │ str.w fp, [sp, #28] │ │ str r6, [sp, #24] │ │ - beq.n 70fe2 │ │ + beq.n 71096 │ │ ldr r3, [sp, #68] @ 0x44 │ │ adds r0, r3, r6 │ │ cmp r0, r1 │ │ - bcs.w 71082 │ │ + bcs.w 71136 │ │ ldrd ip, r8, [sp, #48] @ 0x30 │ │ ldr.w r9, [sp, #56] @ 0x38 │ │ ldr r5, [sp, #64] @ 0x40 │ │ str r5, [sp, #8] │ │ sub.w r5, sl, r5 │ │ str r5, [sp, #4] │ │ strd r8, ip, [sp, #12] │ │ @@ -109308,85 +109251,85 @@ │ │ lsr.w r5, ip, r0 │ │ subs r0, #32 │ │ lsl.w r6, r8, r6 │ │ orr.w r5, r5, r6 │ │ it pl │ │ lsrpl.w r5, r8, r0 │ │ lsls r0, r5, #31 │ │ - beq.n 70f82 │ │ + beq.n 71036 │ │ add.w r6, lr, r3 │ │ cmp r2, r9 │ │ it hi │ │ movhi r9, r2 │ │ mov r5, sl │ │ mov r0, r9 │ │ cmp r9, sl │ │ it hi │ │ movhi r5, r9 │ │ cmp r5, r0 │ │ - beq.n 70f88 │ │ + beq.n 7103c │ │ mov fp, r0 │ │ add r0, r3 │ │ cmp r0, r1 │ │ - bcs.w 715aa │ │ + bcs.w 7165e │ │ ldrb.w ip, [r6, fp] │ │ add.w r0, fp, #1 │ │ ldrb.w r8, [r4, fp] │ │ cmp r8, ip │ │ - beq.n 70f54 │ │ + beq.n 71008 │ │ ldr.w r9, [sp, #20] │ │ movs r2, #0 │ │ sub.w r0, r3, r9 │ │ add r0, fp │ │ adds r3, r0, #1 │ │ - b.n 70fb6 │ │ + b.n 7106a │ │ add r3, sl │ │ movs r2, #0 │ │ - b.n 70fba │ │ + b.n 7106e │ │ ldr.w r9, [sp, #20] │ │ ldr.w fp, [sp, #28] │ │ mov r0, r9 │ │ cmp r2, r0 │ │ - bcs.n 71090 │ │ + bcs.n 71144 │ │ subs r0, #1 │ │ cmp r0, sl │ │ - bcs.w 715b4 │ │ + bcs.w 71668 │ │ adds r6, r0, r3 │ │ cmp r6, r1 │ │ - bcs.w 715be │ │ + bcs.w 71672 │ │ ldrb.w r5, [lr, r6] │ │ ldrb r6, [r4, r0] │ │ cmp r6, r5 │ │ - beq.n 70f92 │ │ + beq.n 71046 │ │ ldr r0, [sp, #8] │ │ ldr r2, [sp, #4] │ │ add r3, r0 │ │ ldrd r8, ip, [sp, #12] │ │ ldr r0, [sp, #24] │ │ add r0, r3 │ │ cmp r0, r1 │ │ - bcc.n 70f1c │ │ - b.n 71082 │ │ + bcc.n 70fd0 │ │ + b.n 71136 │ │ add r5, sp, #104 @ 0x68 │ │ add r6, sp, #40 @ 0x28 │ │ mov r0, r5 │ │ mov r1, r6 │ │ - bl 71670 │ │ + bl 71724 │ │ ldr r0, [sp, #104] @ 0x68 │ │ cmp r0, #1 │ │ - beq.n 70fc8 │ │ - cbnz r0, 70fdc │ │ + beq.n 7107c │ │ + cbnz r0, 71090 │ │ ldr r3, [sp, #108] @ 0x6c │ │ - b.n 71094 │ │ + b.n 71148 │ │ str.w fp, [sp, #28] │ │ - b.n 71082 │ │ + b.n 71136 │ │ ldr r3, [sp, #68] @ 0x44 │ │ adds r0, r3, r6 │ │ cmp r0, r1 │ │ - bcs.n 71082 │ │ + bcs.n 71136 │ │ ldr r2, [sp, #48] @ 0x30 │ │ str r2, [sp, #16] │ │ ldrd ip, r2, [sp, #52] @ 0x34 │ │ sub.w fp, r2, #1 │ │ ldr r5, [sp, #64] @ 0x40 │ │ cmp r2, sl │ │ str r5, [sp, #12] │ │ @@ -109401,479 +109344,479 @@ │ │ lsrs r2, r0 │ │ subs r0, #32 │ │ lsl.w r6, ip, r6 │ │ orr.w r2, r2, r6 │ │ it pl │ │ lsrpl.w r2, ip, r0 │ │ lsls r0, r2, #31 │ │ - beq.n 71054 │ │ + beq.n 71108 │ │ ldr r2, [sp, #20] │ │ add.w r0, lr, r3 │ │ cmp r5, r2 │ │ - beq.n 71058 │ │ + beq.n 7110c │ │ mov r6, r2 │ │ add r2, r3 │ │ cmp r2, r1 │ │ - bcs.w 715c8 │ │ + bcs.w 7167c │ │ ldrb.w r9, [r0, r6] │ │ adds r2, r6, #1 │ │ ldrb.w r8, [r4, r6] │ │ cmp r8, r9 │ │ - beq.n 7102e │ │ + beq.n 710e2 │ │ ldr r0, [sp, #20] │ │ subs r0, r3, r0 │ │ add r0, r6 │ │ adds r3, r0, #1 │ │ - b.n 7107a │ │ + b.n 7112e │ │ add r3, sl │ │ - b.n 7107a │ │ + b.n 7112e │ │ ldr r0, [sp, #20] │ │ - cbz r0, 7108c │ │ + cbz r0, 71140 │ │ subs r0, #1 │ │ cmp fp, sl │ │ - bcs.w 715b4 │ │ + bcs.w 71668 │ │ adds r6, r0, r3 │ │ cmp r6, r1 │ │ - bcs.w 715be │ │ + bcs.w 71672 │ │ ldrb.w r2, [lr, r6] │ │ ldrb r6, [r4, r0] │ │ cmp r6, r2 │ │ - beq.n 7105a │ │ + beq.n 7110e │ │ ldr r0, [sp, #12] │ │ add r3, r0 │ │ ldr r0, [sp, #24] │ │ add r0, r3 │ │ cmp r0, r1 │ │ - bcc.n 71004 │ │ + bcc.n 710b8 │ │ ldr.w fp, [sp, #28] │ │ ldr.w r8, [sp, #36] @ 0x24 │ │ - b.n 71144 │ │ + b.n 711f8 │ │ ldr.w fp, [sp, #28] │ │ ldr.w r8, [sp, #36] @ 0x24 │ │ adds r2, r3, #6 │ │ - beq.n 710b2 │ │ + beq.n 71166 │ │ cmp r2, fp │ │ - bcs.n 710b0 │ │ + bcs.n 71164 │ │ ldrsb.w r0, [r8, r2] │ │ cmn.w r0, #65 @ 0x41 │ │ - bgt.n 710b2 │ │ - ldr r0, [pc, #368] @ (71218 ) │ │ + bgt.n 71166 │ │ + ldr r0, [pc, #368] @ (712cc ) │ │ mov r1, fp │ │ mov r3, fp │ │ add r0, pc │ │ - b.n 715ee │ │ - bne.n 710a6 │ │ + b.n 716a2 │ │ + bne.n 7115a │ │ add.w r0, r8, fp │ │ add.w r6, r8, r2 │ │ cmp r6, r0 │ │ - beq.n 71126 │ │ + beq.n 711da │ │ mov r2, r6 │ │ ldrsb.w r5, [r6], #1 │ │ cmp.w r5, #4294967295 @ 0xffffffff │ │ uxtb r1, r5 │ │ - bgt.n 71112 │ │ + bgt.n 711c6 │ │ ldrb r5, [r2, #1] │ │ and.w r6, r1, #31 │ │ cmp r1, #224 @ 0xe0 │ │ and.w r5, r5, #63 @ 0x3f │ │ - bcc.n 71104 │ │ + bcc.n 711b8 │ │ ldrb r4, [r2, #2] │ │ cmp r1, #240 @ 0xf0 │ │ and.w r4, r4, #63 @ 0x3f │ │ orr.w r5, r4, r5, lsl #6 │ │ - bcc.n 7110c │ │ + bcc.n 711c0 │ │ ldrb r1, [r2, #3] │ │ and.w r6, r6, #7 │ │ and.w r1, r1, #63 @ 0x3f │ │ orr.w r1, r1, r5, lsl #6 │ │ orr.w r1, r1, r6, lsl #18 │ │ cmp.w r1, #1114112 @ 0x110000 │ │ - beq.n 71126 │ │ + beq.n 711da │ │ adds r6, r2, #4 │ │ - b.n 71112 │ │ + b.n 711c6 │ │ orr.w r1, r5, r6, lsl #6 │ │ adds r6, r2, #2 │ │ - b.n 71112 │ │ + b.n 711c6 │ │ orr.w r1, r5, r6, lsl #12 │ │ adds r6, r2, #3 │ │ sub.w r2, r1, #71 @ 0x47 │ │ cmn.w r2, #8 │ │ - bhi.n 710ba │ │ + bhi.n 7116e │ │ subs r1, #58 @ 0x3a │ │ cmn.w r1, #10 │ │ - bcs.n 710ba │ │ - b.n 71144 │ │ + bcs.n 7116e │ │ + b.n 711f8 │ │ cmp r3, #0 │ │ - beq.w 71560 │ │ + beq.w 71614 │ │ cmp r3, fp │ │ - bcs.n 71140 │ │ + bcs.n 711f4 │ │ ldrsb.w r0, [r8, r3] │ │ cmn.w r0, #65 @ 0x41 │ │ - ble.w 715e6 │ │ + ble.w 7169a │ │ mov fp, r3 │ │ - b.n 71144 │ │ - bne.w 715e6 │ │ + b.n 711f8 │ │ + bne.w 7169a │ │ cmp.w fp, #3 │ │ - bcs.n 7116c │ │ + bcs.n 71220 │ │ cmp.w fp, #2 │ │ - bne.w 71560 │ │ + bne.w 71614 │ │ ldrh.w r0, [r8] │ │ movw r1, #20058 @ 0x4e5a │ │ cmp r0, r1 │ │ - bne.w 713ce │ │ + bne.w 71482 │ │ mvn.w r0, #1 │ │ mov.w fp, #2 │ │ movs r1, #2 │ │ - b.n 711f6 │ │ - ldr r0, [pc, #172] @ (7121c ) │ │ + b.n 712aa │ │ + ldr r0, [pc, #172] @ (712d0 ) │ │ mov r1, r8 │ │ movs r2, #3 │ │ add r0, pc │ │ - blx d8860 │ │ - cbz r0, 71192 │ │ + blx d8870 │ │ + cbz r0, 71246 │ │ ldrh.w r0, [r8] │ │ movw r1, #20058 @ 0x4e5a │ │ cmp r0, r1 │ │ - beq.n 711a4 │ │ + beq.n 71258 │ │ cmp.w fp, #3 │ │ - bne.n 711b8 │ │ + bne.n 7126c │ │ mov.w fp, #3 │ │ - b.n 7138a │ │ + b.n 7143e │ │ cmp.w fp, #3 │ │ - bne.n 711e4 │ │ + bne.n 71298 │ │ mvn.w r0, #2 │ │ mov.w fp, #3 │ │ movs r1, #3 │ │ - b.n 711f6 │ │ + b.n 712aa │ │ ldrsb.w r0, [r8, #2] │ │ cmn.w r0, #65 @ 0x41 │ │ - ble.w 715fc │ │ + ble.w 716b0 │ │ movs r1, #2 │ │ mvn.w r0, #1 │ │ - b.n 711f6 │ │ + b.n 712aa │ │ ldr.w r0, [r8] │ │ movw r1, #24415 @ 0x5f5f │ │ movt r1, #20058 @ 0x4e5a │ │ cmp r0, r1 │ │ - bne.w 7138a │ │ + bne.w 7143e │ │ cmp.w fp, #5 │ │ - bcc.n 71278 │ │ + bcc.n 7132c │ │ ldrsb.w r0, [r8, #4] │ │ cmn.w r0, #65 @ 0x41 │ │ - ble.w 71622 │ │ + ble.w 716d6 │ │ movs r1, #4 │ │ mvn.w r0, #3 │ │ - b.n 711f6 │ │ + b.n 712aa │ │ ldrsb.w r0, [r8, #3] │ │ cmn.w r0, #65 @ 0x41 │ │ - ble.w 7160a │ │ + ble.w 716be │ │ movs r1, #3 │ │ mvn.w r0, #2 │ │ add.w r9, r8, r1 │ │ add.w r5, r0, fp │ │ add.w r8, r9, r5 │ │ mov r1, r5 │ │ mov r2, r9 │ │ - cbz r1, 71220 │ │ + cbz r1, 712d4 │ │ ldrsb.w r0, [r2], #1 │ │ subs r1, #1 │ │ cmp r0, #0 │ │ - bpl.n 71206 │ │ - b.n 71380 │ │ - str r2, [r3, #68] @ 0x44 │ │ - vrinta.f32 q13, q12 │ │ + bpl.n 712ba │ │ + b.n 71434 │ │ + str r5, [r4, #56] @ 0x38 │ │ + vrintx.f32 q13, q2 │ │ movs r6, r0 │ │ - str r3, [r6, #24] │ │ + str r6, [r7, #12] │ │ @ instruction: 0xfffa2d00 │ │ - beq.w 71380 │ │ + beq.w 71434 │ │ mov lr, r9 │ │ ldrsb.w r0, [lr], #1 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ uxtb r4, r0 │ │ - bgt.n 7128c │ │ + bgt.n 71340 │ │ ldrb.w r0, [r9, #1] │ │ and.w r1, r4, #31 │ │ cmp r4, #224 @ 0xe0 │ │ and.w r0, r0, #63 @ 0x3f │ │ - bcc.n 7126e │ │ + bcc.n 71322 │ │ ldrb.w r2, [r9, #2] │ │ cmp r4, #240 @ 0xf0 │ │ and.w r2, r2, #63 @ 0x3f │ │ orr.w r0, r2, r0, lsl #6 │ │ - bcc.n 71284 │ │ + bcc.n 71338 │ │ ldrb.w r2, [r9, #3] │ │ and.w r1, r1, #7 │ │ add.w lr, r9, #4 │ │ and.w r2, r2, #63 @ 0x3f │ │ orr.w r0, r2, r0, lsl #6 │ │ orr.w r4, r0, r1, lsl #18 │ │ - b.n 7128c │ │ + b.n 71340 │ │ orr.w r4, r0, r1, lsl #6 │ │ add.w lr, r9, #2 │ │ - b.n 7128c │ │ + b.n 71340 │ │ mvn.w r0, #3 │ │ mov.w fp, #4 │ │ movs r1, #4 │ │ - b.n 711f6 │ │ + b.n 712aa │ │ orr.w r4, r0, r1, lsl #12 │ │ add.w lr, r9, #3 │ │ mov.w sl, #0 │ │ cmp r4, #69 @ 0x45 │ │ - bne.n 7129a │ │ + bne.n 7134e │ │ sub.w ip, r8, lr │ │ - b.n 714b6 │ │ + b.n 7156a │ │ mov.w ip, #10 │ │ sub.w r2, r4, #48 @ 0x30 │ │ cmp r2, #9 │ │ - bhi.n 71380 │ │ + bhi.n 71434 │ │ movs r3, #0 │ │ umull r0, r3, r3, ip │ │ cmp r3, #0 │ │ - bne.n 71380 │ │ + bne.n 71434 │ │ adds r3, r0, r2 │ │ - bcs.n 71380 │ │ + bcs.n 71434 │ │ mov r1, lr │ │ cmp lr, r8 │ │ - beq.n 71380 │ │ + beq.n 71434 │ │ mov lr, r1 │ │ ldrsb.w r0, [lr], #1 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ uxtb r4, r0 │ │ - bgt.n 7130e │ │ + bgt.n 713c2 │ │ ldrb r0, [r1, #1] │ │ and.w lr, r4, #31 │ │ cmp r4, #224 @ 0xe0 │ │ and.w r0, r0, #63 @ 0x3f │ │ - bcc.n 712fc │ │ + bcc.n 713b0 │ │ ldrb r2, [r1, #2] │ │ cmp r4, #240 @ 0xf0 │ │ and.w r2, r2, #63 @ 0x3f │ │ orr.w r0, r2, r0, lsl #6 │ │ - bcc.n 71306 │ │ + bcc.n 713ba │ │ ldrb r2, [r1, #3] │ │ and.w r2, r2, #63 @ 0x3f │ │ orr.w r0, r2, r0, lsl #6 │ │ and.w r2, lr, #7 │ │ add.w lr, r1, #4 │ │ orr.w r4, r0, r2, lsl #18 │ │ - b.n 7130e │ │ + b.n 713c2 │ │ orr.w r4, r0, lr, lsl #6 │ │ add.w lr, r1, #2 │ │ - b.n 7130e │ │ + b.n 713c2 │ │ orr.w r4, r0, lr, lsl #12 │ │ add.w lr, r1, #3 │ │ sub.w r2, r4, #48 @ 0x30 │ │ cmp r2, #10 │ │ - bcc.n 712a8 │ │ - cbz r3, 71374 │ │ + bcc.n 7135c │ │ + cbz r3, 71428 │ │ cmp lr, r8 │ │ - beq.n 71380 │ │ + beq.n 71434 │ │ mov r1, lr │ │ ldrsb.w r0, [lr], #1 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ uxtb r4, r0 │ │ - bgt.n 71370 │ │ + bgt.n 71424 │ │ ldrb r0, [r1, #1] │ │ and.w lr, r4, #31 │ │ cmp r4, #224 @ 0xe0 │ │ and.w r0, r0, #63 @ 0x3f │ │ - bcc.n 7135e │ │ + bcc.n 71412 │ │ ldrb r2, [r1, #2] │ │ cmp r4, #240 @ 0xf0 │ │ and.w r2, r2, #63 @ 0x3f │ │ orr.w r0, r2, r0, lsl #6 │ │ - bcc.n 71368 │ │ + bcc.n 7141c │ │ ldrb r2, [r1, #3] │ │ and.w r2, r2, #63 @ 0x3f │ │ orr.w r0, r2, r0, lsl #6 │ │ and.w r2, lr, #7 │ │ add.w lr, r1, #4 │ │ orr.w r4, r0, r2, lsl #18 │ │ - b.n 71370 │ │ + b.n 71424 │ │ orr.w r4, r0, lr, lsl #6 │ │ add.w lr, r1, #2 │ │ - b.n 71370 │ │ + b.n 71424 │ │ orr.w r4, r0, lr, lsl #12 │ │ add.w lr, r1, #3 │ │ subs r3, #1 │ │ - bne.n 71318 │ │ + bne.n 713cc │ │ add.w sl, sl, #1 │ │ cmp r4, #69 @ 0x45 │ │ - bne.w 7129e │ │ - b.n 71294 │ │ + bne.w 71352 │ │ + b.n 71348 │ │ ldr.w r8, [sp, #36] @ 0x24 │ │ cmp.w fp, #3 │ │ - bcc.n 713ce │ │ + bcc.n 71482 │ │ ldrh.w r0, [r8] │ │ movw r1, #21087 @ 0x525f │ │ cmp r0, r1 │ │ - beq.n 713f2 │ │ + beq.n 714a6 │ │ ldrb.w r0, [r8] │ │ cmp r0, #82 @ 0x52 │ │ - beq.n 713dc │ │ + beq.n 71490 │ │ cmp.w fp, #3 │ │ - beq.w 71560 │ │ - ldr r0, [pc, #672] @ (71648 ) │ │ + beq.w 71614 │ │ + ldr r0, [pc, #672] @ (716fc ) │ │ mov r1, r8 │ │ movs r2, #3 │ │ add r0, pc │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.w 71560 │ │ + bne.w 71614 │ │ mov r5, r8 │ │ ldrsb.w r0, [r5, #3]! │ │ cmn.w r0, #65 @ 0x41 │ │ - ble.w 7161c │ │ + ble.w 716d0 │ │ uxtb r1, r0 │ │ mvn.w r0, #2 │ │ - b.n 71406 │ │ + b.n 714ba │ │ ldrb.w r0, [r8] │ │ mov.w fp, #2 │ │ cmp r0, #82 @ 0x52 │ │ - bne.w 71564 │ │ + bne.w 71618 │ │ mov r5, r8 │ │ ldrsb.w r0, [r5, #1]! │ │ cmn.w r0, #65 @ 0x41 │ │ - ble.w 715da │ │ + ble.w 7168e │ │ uxtb r1, r0 │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ - b.n 71406 │ │ + b.n 714ba │ │ mov r5, r8 │ │ ldrsb.w r0, [r5, #2]! │ │ cmn.w r0, #65 @ 0x41 │ │ - ble.w 715f6 │ │ + ble.w 716aa │ │ uxtb r1, r0 │ │ mvn.w r0, #1 │ │ subs r1, #65 @ 0x41 │ │ cmp r1, #25 │ │ - bhi.w 71560 │ │ + bhi.w 71614 │ │ add.w sl, r0, fp │ │ movs r0, #0 │ │ cmp sl, r0 │ │ - beq.n 71422 │ │ + beq.n 714d6 │ │ ldrsb r1, [r5, r0] │ │ adds r0, #1 │ │ cmp r1, #0 │ │ - bpl.n 71414 │ │ - b.n 71560 │ │ + bpl.n 714c8 │ │ + b.n 71614 │ │ movs r0, #0 │ │ movs r1, #0 │ │ strd r0, r0, [sp, #48] @ 0x30 │ │ strd r0, r0, [sp, #56] @ 0x38 │ │ add r0, sp, #40 @ 0x28 │ │ strd r5, sl, [sp, #40] @ 0x28 │ │ - bl 71920 │ │ + bl 719d4 │ │ cmp r0, #0 │ │ - bne.w 71594 │ │ + bne.w 71648 │ │ ldr r0, [sp, #40] @ 0x28 │ │ cmp r0, #0 │ │ - beq.w 71560 │ │ + beq.w 71614 │ │ ldrb.w r1, [sp, #47] @ 0x2f │ │ ldrh.w r3, [sp, #45] @ 0x2d │ │ ldrb.w r4, [sp, #44] @ 0x2c │ │ orr.w r1, r3, r1, lsl #16 │ │ ldr r2, [sp, #48] @ 0x30 │ │ orr.w r1, r4, r1, lsl #8 │ │ cmp r2, r1 │ │ - bcs.n 7148e │ │ + bcs.n 71542 │ │ ldrb r3, [r0, r2] │ │ subs r3, #65 @ 0x41 │ │ cmp r3, #26 │ │ - bcs.n 7148e │ │ + bcs.n 71542 │ │ add.w ip, sp, #40 @ 0x28 │ │ movs r4, #0 │ │ ldr r3, [sp, #52] @ 0x34 │ │ stmia.w ip, {r0, r1, r2, r3, r4} │ │ add r0, sp, #40 @ 0x28 │ │ movs r1, #0 │ │ str r4, [sp, #60] @ 0x3c │ │ - bl 71920 │ │ + bl 719d4 │ │ cmp r0, #0 │ │ - bne.w 71594 │ │ + bne.w 71648 │ │ ldr r0, [sp, #40] @ 0x28 │ │ cmp r0, #0 │ │ - beq.n 71560 │ │ + beq.n 71614 │ │ ldrd r1, r2, [sp, #44] @ 0x2c │ │ - cbz r2, 714aa │ │ + cbz r2, 7155e │ │ cmp r1, r2 │ │ - bls.n 714a8 │ │ + bls.n 7155c │ │ ldrsb r3, [r0, r2] │ │ cmn.w r3, #65 @ 0x41 │ │ - bgt.n 714aa │ │ - ldr r3, [pc, #440] @ (71658 ) │ │ + bgt.n 7155e │ │ + ldr r3, [pc, #440] @ (7170c ) │ │ add r3, pc │ │ str r3, [sp, #0] │ │ mov r3, r1 │ │ - bl 3fd1c │ │ - bne.n 7149c │ │ + bl 40024 │ │ + bne.n 71550 │ │ sub.w ip, r1, r2 │ │ add.w lr, r0, r2 │ │ mov.w r9, #0 │ │ cmp.w ip, #0 │ │ - beq.n 71572 │ │ + beq.n 71626 │ │ ldrb.w r0, [lr] │ │ cmp r0, #46 @ 0x2e │ │ - bne.n 71560 │ │ + bne.n 71614 │ │ movw r8, #65503 @ 0xffdf │ │ add.w r2, lr, ip │ │ movs r3, #46 @ 0x2e │ │ movt r8, #31 │ │ mov r1, lr │ │ sxtb r0, r3 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - ble.n 714e0 │ │ + ble.n 71594 │ │ adds r1, #1 │ │ - b.n 71526 │ │ + b.n 715da │ │ ldrb r4, [r1, #1] │ │ and.w r0, r3, #31 │ │ cmp r3, #224 @ 0xe0 │ │ and.w r4, r4, #63 @ 0x3f │ │ - bcc.n 71518 │ │ + bcc.n 715cc │ │ ldrb r6, [r1, #2] │ │ cmp r3, #240 @ 0xf0 │ │ and.w r6, r6, #63 @ 0x3f │ │ orr.w r4, r6, r4, lsl #6 │ │ - bcc.n 71520 │ │ + bcc.n 715d4 │ │ ldrb r3, [r1, #3] │ │ and.w r0, r0, #7 │ │ and.w r3, r3, #63 @ 0x3f │ │ orr.w r3, r3, r4, lsl #6 │ │ orr.w r3, r3, r0, lsl #18 │ │ cmp.w r3, #1114112 @ 0x110000 │ │ - beq.n 71576 │ │ + beq.n 7162a │ │ adds r1, #4 │ │ - b.n 71526 │ │ + b.n 715da │ │ orr.w r3, r4, r0, lsl #6 │ │ adds r1, #2 │ │ - b.n 71526 │ │ + b.n 715da │ │ orr.w r3, r4, r0, lsl #12 │ │ adds r1, #3 │ │ and.w r0, r3, r8 │ │ subs r0, #65 @ 0x41 │ │ cmp r0, #26 │ │ - bcc.n 71550 │ │ + bcc.n 71604 │ │ sub.w r0, r3, #48 @ 0x30 │ │ cmp r0, #10 │ │ itt cs │ │ subcs.w r0, r3, #33 @ 0x21 │ │ cmpcs r0, #15 │ │ - bcc.n 71550 │ │ + bcc.n 71604 │ │ sub.w r0, r3, #58 @ 0x3a │ │ cmp r0, #7 │ │ itt cs │ │ subcs.w r0, r3, #91 @ 0x5b │ │ cmpcs r0, #6 │ │ - bcs.n 71558 │ │ + bcs.n 7160c │ │ cmp r1, r2 │ │ - beq.n 71576 │ │ + beq.n 7162a │ │ ldrb r3, [r1, #0] │ │ - b.n 714d4 │ │ + b.n 71588 │ │ sub.w r0, r3, #123 @ 0x7b │ │ cmp r0, #3 │ │ - bls.n 71550 │ │ + bls.n 71604 │ │ mov.w fp, #2 │ │ ldr r0, [sp, #32] │ │ str.w fp, [r0] │ │ add sp, #116 @ 0x74 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov.w ip, #0 │ │ @@ -109881,136 +109824,136 @@ │ │ ldr r1, [sp, #36] @ 0x24 │ │ add.w r2, r0, #16 │ │ stmia.w r2, {r1, fp, lr} │ │ mov.w fp, #1 │ │ strd r9, r5, [r0, #4] │ │ str.w sl, [r0, #12] │ │ str.w ip, [r0, #28] │ │ - b.n 71564 │ │ - ldr r0, [pc, #204] @ (71664 ) │ │ + b.n 71618 │ │ + ldr r0, [pc, #204] @ (71718 ) │ │ add r2, sp, #104 @ 0x68 │ │ - ldr r3, [pc, #204] @ (71668 ) │ │ - ldr r1, [pc, #208] @ (7166c ) │ │ + ldr r3, [pc, #204] @ (7171c ) │ │ + ldr r1, [pc, #208] @ (71720 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #61 @ 0x3d │ │ - bl 414b0 │ │ - ldr r2, [pc, #132] @ (71630 ) │ │ + bl 417b8 │ │ + ldr r2, [pc, #132] @ (716e4 ) │ │ add.w r0, r9, r3 │ │ add r2, pc │ │ - b.n 715d0 │ │ - ldr r2, [pc, #164] @ (7165c ) │ │ + b.n 71684 │ │ + ldr r2, [pc, #164] @ (71710 ) │ │ mov r1, sl │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r2, [pc, #160] @ (71660 ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #160] @ (71714 ) │ │ mov r0, r6 │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r2, [pc, #104] @ (71634 ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #104] @ (716e8 ) │ │ ldr r0, [sp, #20] │ │ add r2, pc │ │ add r0, r3 │ │ cmp r1, r0 │ │ it hi │ │ movhi r0, r1 │ │ - bl 3fa74 │ │ - ldr r0, [pc, #116] @ (71650 ) │ │ + bl 3fd7c │ │ + ldr r0, [pc, #116] @ (71704 ) │ │ mov r1, fp │ │ movs r2, #1 │ │ mov r3, fp │ │ add r0, pc │ │ - b.n 715ee │ │ - ldr r0, [pc, #92] @ (71644 ) │ │ + b.n 716a2 │ │ + ldr r0, [pc, #92] @ (716f8 ) │ │ mov r1, fp │ │ movs r2, #0 │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, r8 │ │ - bl 3fd1c │ │ - ldr r0, [pc, #92] @ (71654 ) │ │ + bl 40024 │ │ + ldr r0, [pc, #92] @ (71708 ) │ │ add r0, pc │ │ - b.n 71600 │ │ - ldr r0, [pc, #60] @ (7163c ) │ │ + b.n 716b4 │ │ + ldr r0, [pc, #60] @ (716f0 ) │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, r8 │ │ mov r1, fp │ │ movs r2, #2 │ │ - b.n 71616 │ │ - ldr r0, [pc, #52] @ (71640 ) │ │ + b.n 716ca │ │ + ldr r0, [pc, #52] @ (716f4 ) │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, r8 │ │ mov r1, fp │ │ movs r2, #3 │ │ mov r3, fp │ │ - bl 3fd1c │ │ - ldr r0, [pc, #44] @ (7164c ) │ │ + bl 40024 │ │ + ldr r0, [pc, #44] @ (71700 ) │ │ add r0, pc │ │ - b.n 7160e │ │ - ldr r0, [pc, #20] @ (71638 ) │ │ + b.n 716c2 │ │ + ldr r0, [pc, #20] @ (716ec ) │ │ mov r1, fp │ │ movs r2, #4 │ │ mov r3, fp │ │ add r0, pc │ │ - b.n 715ee │ │ + b.n 716a2 │ │ nop │ │ - add r7, pc, #432 @ (adr r7, 717e4 ) │ │ + add r6, pc, #800 @ (adr r6, 71a08 ) │ │ movs r6, r0 │ │ - add r7, pc, #320 @ (adr r7, 71778 ) │ │ + add r6, pc, #688 @ (adr r6, 7199c ) │ │ movs r6, r0 │ │ - ldr r7, [sp, #744] @ 0x2e8 │ │ + ldr r7, [sp, #88] @ 0x58 │ │ movs r6, r0 │ │ - ldr r7, [sp, #984] @ 0x3d8 │ │ + ldr r7, [sp, #328] @ 0x148 │ │ movs r6, r0 │ │ - ldr r7, [sp, #992] @ 0x3e0 │ │ + ldr r7, [sp, #336] @ 0x150 │ │ movs r6, r0 │ │ - add r0, pc, #224 @ (adr r0, 71728 ) │ │ + ldr r7, [sp, #592] @ 0x250 │ │ movs r6, r0 │ │ - ldrsh r6, [r6, r5] │ │ - vqrdmlsh.s , q5, d22[0] │ │ + ldrsh r1, [r0, r3] │ │ + vqrdmlah.s , q13, d2[0] │ │ movs r6, r0 │ │ - ldr r7, [sp, #712] @ 0x2c8 │ │ + ldr r7, [sp, #56] @ 0x38 │ │ movs r6, r0 │ │ - ldr r7, [sp, #688] @ 0x2b0 │ │ + ldr r7, [sp, #32] │ │ movs r6, r0 │ │ - add r1, pc, #152 @ (adr r1, 716f4 ) │ │ + add r0, pc, #520 @ (adr r0, 71918 ) │ │ movs r6, r0 │ │ - add r7, pc, #272 @ (adr r7, 71770 ) │ │ + add r6, pc, #640 @ (adr r6, 71994 ) │ │ movs r6, r0 │ │ - add r7, pc, #296 @ (adr r7, 7178c ) │ │ + add r6, pc, #664 @ (adr r6, 719b0 ) │ │ movs r6, r0 │ │ - ldrb r3, [r7, r4] │ │ - vtrn.32 d26, d22 │ │ + ldrb r6, [r0, r2] │ │ + vshr.u32 d26, d2, #6 │ │ movs r6, r0 │ │ - add r0, pc, #80 @ (adr r0, 716c0 ) │ │ + ldr r7, [sp, #448] @ 0x1c0 │ │ movs r6, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #52 @ 0x34 │ │ ldr r2, [r1, #0] │ │ cmp r2, #1 │ │ - bne.w 717b8 │ │ + bne.w 7186c │ │ ldr r5, [r1, #28] │ │ ldr.w lr, [r1, #52] @ 0x34 │ │ cmp r5, lr │ │ - beq.w 717bc │ │ + beq.w 71870 │ │ ldr.w ip, [r1, #60] @ 0x3c │ │ mov r8, lr │ │ str r0, [sp, #16] │ │ sub.w r0, ip, #1 │ │ ldr.w sl, [r1, #48] @ 0x30 │ │ adds r4, r5, r0 │ │ str r0, [sp, #40] @ 0x28 │ │ cmp r4, lr │ │ - bcs.w 717ec │ │ + bcs.w 718a0 │ │ ldr r0, [r1, #8] │ │ add.w r2, r5, ip │ │ str r0, [sp, #32] │ │ add.w r9, sl, r5 │ │ ldr r0, [r1, #12] │ │ ldr.w r8, [r1, #36] @ 0x24 │ │ str r0, [sp, #28] │ │ @@ -110025,30 +109968,30 @@ │ │ strd r8, r8, [sp, #44] @ 0x2c │ │ mov r8, r5 │ │ adds r0, #1 │ │ str r2, [sp, #8] │ │ str r3, [sp, #24] │ │ str r0, [sp, #12] │ │ cmp r5, r8 │ │ - bne.w 717ec │ │ + bne.w 718a0 │ │ ldrb.w r0, [sl, r4] │ │ ldr r2, [sp, #32] │ │ and.w r0, r0, #63 @ 0x3f │ │ rsb r4, r0, #32 │ │ lsr.w r3, r2, r0 │ │ ldr r2, [sp, #28] │ │ subs r0, #32 │ │ lsl.w r4, r2, r4 │ │ orr.w r3, r3, r4 │ │ it pl │ │ lsrpl.w r3, r2, r0 │ │ lsls r0, r3, #31 │ │ ldr r0, [sp, #44] @ 0x2c │ │ add.w r3, r0, #1 │ │ - beq.n 7175a │ │ + beq.n 7180e │ │ ldr r0, [sp, #24] │ │ ldr r2, [sp, #48] @ 0x30 │ │ mov r8, r0 │ │ cmp r2, r0 │ │ it hi │ │ movhi r8, r2 │ │ str r3, [sp, #36] @ 0x24 │ │ @@ -110057,936 +110000,936 @@ │ │ moveq r8, r0 │ │ mov r0, ip │ │ mov r3, r8 │ │ cmp r8, ip │ │ it hi │ │ movhi r0, r8 │ │ cmp r0, r3 │ │ - beq.n 7177a │ │ + beq.n 7182e │ │ mov r4, r3 │ │ add r3, r5 │ │ cmp r3, lr │ │ - bcs.w 718e4 │ │ + bcs.w 71998 │ │ ldrb.w r2, [r9, r4] │ │ adds r3, r4, #1 │ │ ldrb.w fp, [r6, r4] │ │ cmp fp, r2 │ │ - beq.n 7172e │ │ + beq.n 717e2 │ │ ldr r0, [sp, #12] │ │ add.w r8, r0, r4 │ │ ldr r0, [sp, #36] @ 0x24 │ │ str.w r8, [r1, #28] │ │ - cbz r0, 7176e │ │ - b.n 71768 │ │ + cbz r0, 71822 │ │ + b.n 7181c │ │ ldr.w r8, [sp, #20] │ │ str.w r8, [r1, #28] │ │ - cbz r3, 7176e │ │ + cbz r3, 71822 │ │ ldr.w r8, [sp, #20] │ │ movs r0, #0 │ │ str r0, [r1, #36] @ 0x24 │ │ str r0, [sp, #48] @ 0x30 │ │ ldr r0, [sp, #40] @ 0x28 │ │ add.w r4, r8, r0 │ │ cmp r4, lr │ │ - bcc.n 716dc │ │ - b.n 7189a │ │ + bcc.n 71790 │ │ + b.n 7194e │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldr r2, [sp, #48] @ 0x30 │ │ subs.w r0, r0, #4294967295 @ 0xffffffff │ │ it ne │ │ movne r0, r2 │ │ ldr r3, [sp, #24] │ │ cmp r0, r3 │ │ - bcs.n 7181c │ │ + bcs.n 718d0 │ │ subs r3, #1 │ │ cmp r3, ip │ │ - bcs.w 71904 │ │ + bcs.w 719b8 │ │ adds r4, r3, r5 │ │ cmp r4, lr │ │ - bcs.w 718f8 │ │ + bcs.w 719ac │ │ ldrb.w r4, [sl, r4] │ │ ldrb r2, [r6, r3] │ │ cmp r2, r4 │ │ - beq.n 71788 │ │ + beq.n 7183c │ │ ldr r0, [sp, #36] @ 0x24 │ │ ldr.w r8, [sp, #4] │ │ cmp r0, #0 │ │ ldr r0, [sp, #8] │ │ str.w r8, [r1, #28] │ │ - beq.n 7176e │ │ - b.n 7176a │ │ + beq.n 71822 │ │ + b.n 7181e │ │ ldrb r2, [r1, #14] │ │ - cbz r2, 717c0 │ │ + cbz r2, 71874 │ │ movs r1, #2 │ │ - b.n 718da │ │ + b.n 7198e │ │ ldrb r4, [r1, #12] │ │ ldr r2, [r1, #4] │ │ ldrd ip, r3, [r1, #48] @ 0x30 │ │ eor.w r6, r4, #1 │ │ strb r6, [r1, #12] │ │ - cbz r2, 71834 │ │ + cbz r2, 718e8 │ │ cmp r2, r3 │ │ - bcs.n 71832 │ │ + bcs.n 718e6 │ │ ldrsb.w r6, [ip, r2] │ │ cmn.w r6, #64 @ 0x40 │ │ - bge.n 71834 │ │ - ldr r0, [pc, #304] @ (71910 ) │ │ + bge.n 718e8 │ │ + ldr r0, [pc, #304] @ (719c4 ) │ │ mov r1, r3 │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, ip │ │ - bl 3fd1c │ │ + bl 40024 │ │ ldr r0, [sp, #16] │ │ cmp.w r8, #0 │ │ add.w r6, r0, #8 │ │ add.w r4, r0, #4 │ │ - beq.n 71816 │ │ + beq.n 718ca │ │ mov r3, r8 │ │ cmp r3, lr │ │ - bcs.n 7180e │ │ + bcs.n 718c2 │ │ ldrsb.w r2, [sl, r3] │ │ cmn.w r2, #65 @ 0x41 │ │ - ble.n 71812 │ │ - b.n 71880 │ │ + ble.n 718c6 │ │ + b.n 71934 │ │ cmp lr, r3 │ │ - beq.n 71882 │ │ + beq.n 71936 │ │ adds r3, #1 │ │ - bcc.n 717fe │ │ + bcc.n 718b2 │ │ mov.w lr, #0 │ │ - b.n 71882 │ │ + b.n 71936 │ │ ldr r0, [sp, #20] │ │ str r0, [r1, #28] │ │ ldr r0, [sp, #36] @ 0x24 │ │ - cbz r0, 71828 │ │ + cbz r0, 718dc │ │ movs r0, #0 │ │ str r0, [r1, #36] @ 0x24 │ │ ldrd r0, r1, [sp, #16] │ │ strd r5, r1, [r0, #4] │ │ - b.n 718b0 │ │ - bne.n 717de │ │ + b.n 71964 │ │ + bne.n 71892 │ │ cmp r2, r3 │ │ - bne.n 71840 │ │ - cbnz r4, 718ac │ │ + bne.n 718f4 │ │ + cbnz r4, 71960 │ │ movs r2, #1 │ │ strb r2, [r1, #14] │ │ - b.n 717bc │ │ + b.n 71870 │ │ add.w r6, ip, r2 │ │ ldrsb.w r5, [r6] │ │ cmp.w r5, #4294967295 @ 0xffffffff │ │ uxtb r3, r5 │ │ - bgt.n 718aa │ │ + bgt.n 7195e │ │ ldrb r5, [r6, #1] │ │ and.w ip, r3, #31 │ │ cmp r3, #224 @ 0xe0 │ │ and.w lr, r5, #63 @ 0x3f │ │ - bcc.n 71894 │ │ + bcc.n 71948 │ │ ldrb r5, [r6, #2] │ │ cmp r3, #240 @ 0xf0 │ │ and.w r5, r5, #63 @ 0x3f │ │ orr.w r5, r5, lr, lsl #6 │ │ - bcc.n 718a6 │ │ + bcc.n 7195a │ │ ldrb r3, [r6, #3] │ │ and.w r6, ip, #7 │ │ and.w r3, r3, #63 @ 0x3f │ │ orr.w r3, r3, r5, lsl #6 │ │ orr.w r3, r3, r6, lsl #18 │ │ - b.n 718aa │ │ + b.n 7195e │ │ mov lr, r3 │ │ cmp r8, lr │ │ it ls │ │ movls r8, lr │ │ str.w r8, [r1, #28] │ │ str.w lr, [r6] │ │ str r5, [r4, #0] │ │ - b.n 718d8 │ │ + b.n 7198c │ │ orr.w r3, lr, ip, lsl #6 │ │ - b.n 718aa │ │ + b.n 7195e │ │ ldr r0, [sp, #16] │ │ mov r8, lr │ │ add.w r6, r0, #8 │ │ adds r4, r0, #4 │ │ - b.n 717fc │ │ + b.n 718b0 │ │ orr.w r3, r5, ip, lsl #12 │ │ - cbz r4, 718b4 │ │ + cbz r4, 71968 │ │ strd r2, r2, [r0, #4] │ │ movs r1, #0 │ │ - b.n 718da │ │ + b.n 7198e │ │ cmp r3, #128 @ 0x80 │ │ - bcs.n 718bc │ │ + bcs.n 71970 │ │ movs r6, #1 │ │ - b.n 718d0 │ │ + b.n 71984 │ │ cmp.w r3, #2048 @ 0x800 │ │ - bcs.n 718c6 │ │ + bcs.n 7197a │ │ movs r6, #2 │ │ - b.n 718d0 │ │ + b.n 71984 │ │ movs r6, #4 │ │ cmp.w r3, #65536 @ 0x10000 │ │ it cc │ │ movcc r6, #3 │ │ adds r3, r6, r2 │ │ str r3, [r1, #4] │ │ strd r2, r3, [r0, #4] │ │ movs r1, #1 │ │ str r1, [r0, #0] │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r2, [pc, #48] @ (71918 ) │ │ + ldr r2, [pc, #48] @ (719cc ) │ │ add.w r0, r8, r5 │ │ mov r1, lr │ │ cmp lr, r0 │ │ add r2, pc │ │ it hi │ │ movhi r0, lr │ │ - bl 3fa74 │ │ - ldr r2, [pc, #24] @ (71914 ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #24] @ (719c8 ) │ │ mov r0, r4 │ │ mov r1, lr │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r2, [pc, #20] @ (7191c ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #20] @ (719d0 ) │ │ mov r0, r3 │ │ mov r1, ip │ │ add r2, pc │ │ - bl 3fa74 │ │ - add r6, pc, #472 @ (adr r6, 71aec ) │ │ + bl 3fd7c │ │ + add r5, pc, #840 @ (adr r5, 71d10 ) │ │ movs r6, r0 │ │ - add r4, pc, #56 @ (adr r4, 71950 ) │ │ + add r3, pc, #424 @ (adr r3, 71b74 ) │ │ movs r6, r0 │ │ - add r4, pc, #184 @ (adr r4, 719d4 ) │ │ + add r3, pc, #552 @ (adr r3, 71bf8 ) │ │ movs r6, r0 │ │ - add r3, pc, #968 @ (adr r3, 71ce8 ) │ │ + add r3, pc, #312 @ (adr r3, 71b0c ) │ │ movs r6, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #48 @ 0x30 │ │ mov r4, r0 │ │ ldr r0, [r0, #0] │ │ cmp r0, #0 │ │ - beq.w 71be6 │ │ + beq.w 71c9a │ │ mov r5, r1 │ │ ldr r1, [r4, #12] │ │ adds r1, #1 │ │ str r1, [r4, #12] │ │ cmp.w r1, #500 @ 0x1f4 │ │ - bls.n 7195e │ │ + bls.n 71a12 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 71956 │ │ - ldr r1, [pc, #764] @ (71c44 ) │ │ + cbz r0, 71a0a │ │ + ldr r1, [pc, #764] @ (71cf8 ) │ │ movs r2, #25 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.w 71a7c │ │ + bne.w 71b30 │ │ movs r0, #1 │ │ strb r0, [r4, #4] │ │ movs r5, #0 │ │ - b.n 71a84 │ │ + b.n 71b38 │ │ ldrd r2, r1, [r4, #4] │ │ cmp r1, r2 │ │ - bcs.w 71a6c │ │ + bcs.w 71b20 │ │ ldrb r6, [r0, r1] │ │ adds r3, r1, #1 │ │ str r3, [r4, #8] │ │ cmp r6, #76 @ 0x4c │ │ - ble.n 71a1e │ │ + ble.n 71ad2 │ │ cmp r6, #87 @ 0x57 │ │ - bgt.n 71a64 │ │ + bgt.n 71b18 │ │ cmp r6, #77 @ 0x4d │ │ - beq.w 71a88 │ │ + beq.w 71b3c │ │ cmp r6, #78 @ 0x4e │ │ - bne.n 71a6c │ │ + bne.n 71b20 │ │ cmp r3, r2 │ │ - bcs.n 71a6c │ │ + bcs.n 71b20 │ │ ldrb r6, [r0, r3] │ │ adds r0, r1, #2 │ │ str r0, [r4, #8] │ │ sub.w r0, r6, #65 @ 0x41 │ │ cmp r0, #26 │ │ - bcc.n 7199e │ │ + bcc.n 71a52 │ │ sub.w r0, r6, #97 @ 0x61 │ │ cmp r0, #26 │ │ - bcs.n 71a6c │ │ + bcs.n 71b20 │ │ mov.w r6, #1114112 @ 0x110000 │ │ mov r0, r4 │ │ mov r1, r5 │ │ - bl 71920 │ │ + bl 719d4 │ │ cmp r0, #0 │ │ - bne.n 71a7c │ │ + bne.n 71b30 │ │ ldr r0, [r4, #0] │ │ cmp r0, #0 │ │ - beq.w 71bca │ │ + beq.w 71c7e │ │ add r0, sp, #32 │ │ mov r1, r4 │ │ movs r2, #115 @ 0x73 │ │ - bl 71dd4 │ │ + bl 71e88 │ │ ldrb.w r0, [sp, #32] │ │ cmp r0, #1 │ │ - beq.w 71b22 │ │ + beq.w 71bd6 │ │ ldr r0, [r4, #0] │ │ cmp r0, #0 │ │ - beq.w 71be6 │ │ + beq.w 71c9a │ │ add.w sl, sp, #32 │ │ mov r1, r4 │ │ ldrd r8, r9, [sp, #40] @ 0x28 │ │ mov r0, sl │ │ - bl 71e34 │ │ + bl 71ee8 │ │ ldr r0, [sp, #32] │ │ cmp r0, #0 │ │ - beq.w 71bc2 │ │ + beq.w 71c76 │ │ ldmia.w sl, {r1, r2, r3, r5} │ │ add r0, sp, #16 │ │ cmp.w r6, #1114112 @ 0x110000 │ │ stmia r0!, {r1, r2, r3, r5} │ │ - bne.w 71c0a │ │ + bne.w 71cbe │ │ ldr r0, [sp, #20] │ │ ldr r1, [sp, #28] │ │ orrs r0, r1 │ │ itt ne │ │ ldrne r0, [r4, #16] │ │ cmpne r0, #0 │ │ - beq.n 71b02 │ │ - ldr r1, [pc, #744] @ (71cf0 ) │ │ + beq.n 71bb6 │ │ + ldr r1, [pc, #744] @ (71da4 ) │ │ movs r2, #2 │ │ add r1, pc │ │ - bl 3ffd4 │ │ - cbnz r0, 71a7c │ │ + bl 402dc │ │ + cbnz r0, 71b30 │ │ ldr r1, [r4, #16] │ │ cmp r1, #0 │ │ - beq.n 71b02 │ │ + beq.n 71bb6 │ │ add r0, sp, #16 │ │ - bl 71f8c │ │ - b.n 71afe │ │ + bl 72040 │ │ + b.n 71bb2 │ │ cmp r6, #66 @ 0x42 │ │ - beq.n 71af6 │ │ + beq.n 71baa │ │ cmp r6, #67 @ 0x43 │ │ - beq.n 71b10 │ │ + beq.n 71bc4 │ │ cmp r6, #73 @ 0x49 │ │ - bne.n 71a6c │ │ + bne.n 71b20 │ │ mov r0, r4 │ │ mov r1, r5 │ │ - bl 71920 │ │ - cbnz r0, 71a7c │ │ - cbz r5, 71a46 │ │ + bl 719d4 │ │ + cbnz r0, 71b30 │ │ + cbz r5, 71afa │ │ ldr r0, [r4, #16] │ │ - cbz r0, 71a46 │ │ - ldr r1, [pc, #728] @ (71d14 ) │ │ + cbz r0, 71afa │ │ + ldr r1, [pc, #728] @ (71dc8 ) │ │ movs r2, #2 │ │ add r1, pc │ │ - bl 3ffd4 │ │ - cbnz r0, 71a7c │ │ + bl 402dc │ │ + cbnz r0, 71b30 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 71a5c │ │ - ldr r1, [pc, #648] @ (71cd4 ) │ │ + cbz r0, 71b10 │ │ + ldr r1, [pc, #648] @ (71d88 ) │ │ movs r2, #1 │ │ movs r5, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.w 71c00 │ │ + bne.w 71cb4 │ │ mov r0, r4 │ │ - bl 726a4 │ │ - b.n 71ade │ │ + bl 72758 │ │ + b.n 71b92 │ │ cmp r6, #88 @ 0x58 │ │ - beq.n 71a88 │ │ + beq.n 71b3c │ │ cmp r6, #89 @ 0x59 │ │ - beq.n 71aa0 │ │ + beq.n 71b54 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 71a80 │ │ - ldr r1, [pc, #604] @ (71cd0 ) │ │ + cbz r0, 71b34 │ │ + ldr r1, [pc, #604] @ (71d84 ) │ │ movs r2, #16 │ │ add r1, pc │ │ - bl 3ffd4 │ │ - cbz r0, 71a80 │ │ + bl 402dc │ │ + cbz r0, 71b34 │ │ movs r5, #1 │ │ - b.n 71c00 │ │ + b.n 71cb4 │ │ movs r5, #0 │ │ strb r5, [r4, #4] │ │ str r5, [r4, #0] │ │ - b.n 71c00 │ │ + b.n 71cb4 │ │ add r0, sp, #32 │ │ mov r1, r4 │ │ movs r2, #115 @ 0x73 │ │ - bl 71dd4 │ │ + bl 71e88 │ │ ldrb.w r0, [sp, #32] │ │ cmp r0, #1 │ │ - beq.n 71b22 │ │ + beq.n 71bd6 │ │ mov r0, r4 │ │ - bl 72298 │ │ + bl 7234c │ │ ldr r0, [r4, #16] │ │ - cbz r0, 71ab6 │ │ - ldr r1, [pc, #608] @ (71d08 ) │ │ + cbz r0, 71b6a │ │ + ldr r1, [pc, #608] @ (71dbc ) │ │ movs r2, #1 │ │ movs r5, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.w 71c00 │ │ + bne.w 71cb4 │ │ mov r0, r4 │ │ - bl 722dc │ │ + bl 72390 │ │ cmp r0, #0 │ │ - bne.n 71a7c │ │ + bne.n 71b30 │ │ cmp r6, #77 @ 0x4d │ │ - beq.n 71ae2 │ │ + beq.n 71b96 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 71ad6 │ │ - ldr r1, [pc, #580] @ (71d10 ) │ │ + cbz r0, 71b8a │ │ + ldr r1, [pc, #580] @ (71dc4 ) │ │ movs r2, #4 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 71a7c │ │ + bne.n 71b30 │ │ mov r0, r4 │ │ movs r1, #0 │ │ - bl 71920 │ │ + bl 719d4 │ │ cmp r0, #0 │ │ - bne.n 71a7c │ │ + bne.n 71b30 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 71b02 │ │ - ldr r1, [pc, #548] @ (71d0c ) │ │ + cbz r0, 71bb6 │ │ + ldr r1, [pc, #548] @ (71dc0 ) │ │ movs r5, #1 │ │ add r1, pc │ │ movs r2, #1 │ │ - bl 3ffd4 │ │ - cbz r0, 71b02 │ │ - b.n 71c00 │ │ + bl 402dc │ │ + cbz r0, 71bb6 │ │ + b.n 71cb4 │ │ mov r0, r4 │ │ mov r1, r5 │ │ - bl 71d2c │ │ + bl 71de0 │ │ cmp r0, #0 │ │ - bne.n 71a7c │ │ + bne.n 71b30 │ │ ldr r0, [r4, #0] │ │ cmp r0, #0 │ │ - beq.n 71bfe │ │ + beq.n 71cb2 │ │ ldr r0, [r4, #12] │ │ subs r0, #1 │ │ str r0, [r4, #12] │ │ - b.n 71bfe │ │ + b.n 71cb2 │ │ add r0, sp, #32 │ │ mov r1, r4 │ │ movs r2, #115 @ 0x73 │ │ - bl 71dd4 │ │ + bl 71e88 │ │ ldrb.w r0, [sp, #32] │ │ cmp r0, #1 │ │ - bne.n 71b4c │ │ + bne.n 71c00 │ │ ldr r0, [r4, #16] │ │ ldrb.w r5, [sp, #33] @ 0x21 │ │ - cbz r0, 71b48 │ │ - ldr r2, [pc, #436] @ (71ce0 ) │ │ + cbz r0, 71bfc │ │ + ldr r2, [pc, #436] @ (71d94 ) │ │ cmp r5, #0 │ │ - ldr r1, [pc, #436] @ (71ce4 ) │ │ + ldr r1, [pc, #436] @ (71d98 ) │ │ add r2, pc │ │ add r1, pc │ │ it eq │ │ moveq r1, r2 │ │ mov.w r2, #16 │ │ it ne │ │ movne r2, #25 │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 71a7c │ │ + bne.n 71b30 │ │ strb r5, [r4, #4] │ │ - b.n 7195a │ │ + b.n 71a0e │ │ ldr r0, [r4, #0] │ │ cmp r0, #0 │ │ - beq.n 71be6 │ │ + beq.n 71c9a │ │ add r5, sp, #32 │ │ mov r1, r4 │ │ ldrd r9, r8, [sp, #40] @ 0x28 │ │ mov r0, r5 │ │ - bl 71e34 │ │ + bl 71ee8 │ │ ldr r0, [sp, #32] │ │ - cbz r0, 71bc2 │ │ + cbz r0, 71c76 │ │ ldmia.w r5, {r1, r2, r3, r6} │ │ mov r0, sp │ │ stmia r0!, {r1, r2, r3, r6} │ │ ldr r1, [r4, #16] │ │ cmp r1, #0 │ │ - beq.n 71b02 │ │ + beq.n 71bb6 │ │ mov r0, sp │ │ - bl 71f8c │ │ + bl 72040 │ │ cmp r0, #0 │ │ - bne.w 71a7c │ │ + bne.w 71b30 │ │ ldr r0, [r4, #16] │ │ cmp r0, #0 │ │ - beq.n 71b02 │ │ + beq.n 71bb6 │ │ orrs.w r1, r9, r8 │ │ - beq.n 71b02 │ │ + beq.n 71bb6 │ │ ldr r1, [r0, #8] │ │ ands.w r1, r1, #8388608 @ 0x800000 │ │ - bne.n 71b02 │ │ + bne.n 71bb6 │ │ ldrd r0, r1, [r0] │ │ movs r2, #1 │ │ ldr r3, [r1, #12] │ │ movs r5, #1 │ │ - ldr r1, [pc, #328] @ (71ce8 ) │ │ + ldr r1, [pc, #328] @ (71d9c ) │ │ add r1, pc │ │ blx r3 │ │ - cbnz r0, 71c00 │ │ + cbnz r0, 71cb4 │ │ ldr r2, [r4, #16] │ │ mov r0, r9 │ │ mov r1, r8 │ │ - bl 40968 │ │ - cbnz r0, 71c00 │ │ + bl 40c70 │ │ + cbnz r0, 71cb4 │ │ ldr r0, [r4, #16] │ │ movs r2, #1 │ │ ldrd r0, r1, [r0] │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #304] @ (71cec ) │ │ + ldr r1, [pc, #304] @ (71da0 ) │ │ add r1, pc │ │ blx r3 │ │ - b.n 71af2 │ │ + b.n 71ba6 │ │ ldr r0, [r4, #16] │ │ ldrb.w r5, [sp, #36] @ 0x24 │ │ - b.n 71b28 │ │ + b.n 71bdc │ │ ldr r0, [r4, #16] │ │ - cbz r0, 71bfe │ │ - ldr r1, [pc, #264] @ (71cd8 ) │ │ + cbz r0, 71cb2 │ │ + ldr r1, [pc, #264] @ (71d8c ) │ │ movs r2, #2 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.w 71a7c │ │ + bne.w 71b30 │ │ ldr r0, [r4, #0] │ │ cmp r0, #0 │ │ - bne.w 719b2 │ │ + bne.w 71a66 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 71bfe │ │ - ldr r1, [pc, #224] @ (71ccc ) │ │ + cbz r0, 71cb2 │ │ + ldr r1, [pc, #224] @ (71d80 ) │ │ movs r2, #1 │ │ add r1, pc │ │ add sp, #48 @ 0x30 │ │ ldmia.w sp!, {r8, r9, sl} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 3ffd4 │ │ + b.w 402dc │ │ movs r5, #0 │ │ mov r0, r5 │ │ add sp, #48 @ 0x30 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r0, [r4, #16] │ │ - cbz r0, 71c1e │ │ - ldr r1, [pc, #204] @ (71cdc ) │ │ + cbz r0, 71cd2 │ │ + ldr r1, [pc, #204] @ (71d90 ) │ │ movs r2, #3 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.w 71a7c │ │ + bne.w 71b30 │ │ cmp r6, #67 @ 0x43 │ │ - beq.n 71c32 │ │ + beq.n 71ce6 │ │ cmp r6, #83 @ 0x53 │ │ - bne.n 71c48 │ │ + bne.n 71cfc │ │ ldr r0, [r4, #16] │ │ - cbz r0, 71c5a │ │ - ldr r1, [pc, #212] @ (71d00 ) │ │ + cbz r0, 71d0e │ │ + ldr r1, [pc, #212] @ (71db4 ) │ │ movs r2, #4 │ │ add r1, pc │ │ - b.n 71c3c │ │ + b.n 71cf0 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 71c5a │ │ - ldr r1, [pc, #188] @ (71cf4 ) │ │ + cbz r0, 71d0e │ │ + ldr r1, [pc, #188] @ (71da8 ) │ │ movs r2, #7 │ │ add r1, pc │ │ - bl 3ffd4 │ │ - b.n 71c54 │ │ + bl 402dc │ │ + b.n 71d08 │ │ nop │ │ - ldr r1, [r6, r4] │ │ + ldr r4, [r7, r1] │ │ vtbl.8 d22, {d10-d11}, d17 │ │ str r6, [sp, #32] │ │ - cbz r1, 71c5a │ │ + cbz r1, 71d0e │ │ add r0, sp, #32 │ │ - bl 40138 │ │ + bl 40440 │ │ cmp r0, #0 │ │ - bne.w 71a7c │ │ + bne.w 71b30 │ │ ldr r0, [r4, #16] │ │ ldr r1, [sp, #20] │ │ ldr r2, [sp, #28] │ │ orrs r1, r2 │ │ - bne.n 71c9e │ │ + bne.n 71d52 │ │ cmp r0, #0 │ │ - beq.w 71b02 │ │ - ldr r1, [pc, #140] @ (71cf8 ) │ │ + beq.w 71bb6 │ │ + ldr r1, [pc, #140] @ (71dac ) │ │ movs r2, #1 │ │ movs r5, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 71c00 │ │ + bne.n 71cb4 │ │ ldr r1, [r4, #16] │ │ strd r8, r9, [sp, #32] │ │ cmp r1, #0 │ │ - beq.w 71b02 │ │ + beq.w 71bb6 │ │ add r0, sp, #32 │ │ - bl 408a2 │ │ + bl 40baa │ │ cmp r0, #0 │ │ - bne.n 71c00 │ │ + bne.n 71cb4 │ │ ldr r0, [r4, #16] │ │ cmp r0, #0 │ │ - beq.w 71b02 │ │ - ldr r1, [pc, #96] @ (71cfc ) │ │ + beq.w 71bb6 │ │ + ldr r1, [pc, #96] @ (71db0 ) │ │ add r1, pc │ │ - b.n 71aec │ │ + b.n 71ba0 │ │ cmp r0, #0 │ │ - beq.w 71b02 │ │ - ldr r1, [pc, #92] @ (71d04 ) │ │ + beq.w 71bb6 │ │ + ldr r1, [pc, #92] @ (71db8 ) │ │ movs r2, #1 │ │ movs r5, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 71c00 │ │ + bne.n 71cb4 │ │ ldr r1, [r4, #16] │ │ cmp r1, #0 │ │ - beq.w 71b02 │ │ + beq.w 71bb6 │ │ add r0, sp, #16 │ │ - bl 71f8c │ │ + bl 72040 │ │ cmp r0, #0 │ │ - bne.n 71c00 │ │ + bne.n 71cb4 │ │ ldr r0, [r4, #16] │ │ - b.n 71c64 │ │ + b.n 71d18 │ │ nop │ │ - ldrsb r6, [r4, r2] │ │ - vqrdmlah.s q8, q13, d24[0] │ │ - vqrshrun.s64 d21, q2, #6 │ │ - vrintm.f32 , │ │ - vrintm.f32 d21, d5 │ │ - @ instruction: 0xfffa0e2c │ │ - vrint?.f32 , │ │ - vqshlu.s64 , , #58 @ 0x3a │ │ - vqshlu.s64 d21, d30, #58 @ 0x3a │ │ - vtbl.8 d21, {d26}, d13 │ │ - vrint?.f32 , q8 │ │ - vqshlu.s32 d21, d18, #26 │ │ + strb r1, [r6, r7] │ │ + vcvt.f32.u32 d16, d20, #6 │ │ + vqshl.u64 d21, d15, #58 @ 0x3a │ │ + vrint?.f32 d21, d14 │ │ + vsli.64 , q0, #58 @ 0x3a │ │ + vcvt.u16.f16 q8, q12, #6 │ │ + vqshlu.s64 d21, d4, #58 @ 0x3a │ │ + vrint?.f32 d21, d22 │ │ vrint?.f32 d21, d9 │ │ - vrint?.f32 d20, d30 │ │ - vsli.64 , , #58 @ 0x3a │ │ - vqshl.u64 , q13, #58 @ 0x3a │ │ - vqshl.u64 d21, d27, #58 @ 0x3a │ │ - vrintp.f32 d20, d24 │ │ - vqrshrun.s64 d21, , #6 │ │ + vqshl.u64 , q4, #58 @ 0x3a │ │ + vrintz.f32 d21, d27 │ │ + vsli.32 , , #26 │ │ + vsli.32 , q2, #26 │ │ + vsli.32 q10, q13, #26 │ │ + vrinta.f32 , q1 │ │ + vrint?.f32 , │ │ + vrint?.f32 d21, d6 │ │ + vqshlu.s64 q10, q10, #58 @ 0x3a │ │ + vrintp.f32 d21, d18 │ │ @ instruction: 0xfffae9d1 │ │ lsls r0, r0, #8 │ │ - ldr r1, [pc, #8] @ (71d28 ) │ │ + ldr r1, [pc, #8] @ (71ddc ) │ │ ldr r3, [r2, #12] │ │ movs r2, #5 │ │ add r1, pc │ │ bx r3 │ │ nop │ │ - ldr r0, [r6, #40] @ 0x28 │ │ + ldr r4, [r7, #28] │ │ vsli.64 , q8, #58 @ 0x3a │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #32 │ │ mov r4, r0 │ │ ldr r0, [r0, #0] │ │ - cbz r0, 71d78 │ │ + cbz r0, 71e2c │ │ mov r5, sp │ │ mov r8, r1 │ │ mov r0, r5 │ │ mov r1, r4 │ │ - bl 73a50 │ │ + bl 73b04 │ │ ldr r0, [sp, #0] │ │ - cbz r0, 71d90 │ │ + cbz r0, 71e44 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 71dbe │ │ + cbz r0, 71e72 │ │ mov ip, r4 │ │ add.w r9, sp, #16 │ │ ldmia.w ip, {r0, r2, r3, r6} │ │ mov r1, r9 │ │ stmia r1!, {r0, r2, r3, r6} │ │ mov r0, r4 │ │ ldmia.w r5, {r1, r2, r3, r6} │ │ stmia r0!, {r1, r2, r3, r6} │ │ and.w r1, r8, #1 │ │ mov r0, r4 │ │ - bl 71920 │ │ + bl 719d4 │ │ ldmia.w r9, {r1, r2, r3, r6} │ │ stmia r4!, {r1, r2, r3, r6} │ │ - b.n 71dc0 │ │ + b.n 71e74 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 71dbe │ │ - ldr r1, [pc, #72] @ (71dc8 ) │ │ + cbz r0, 71e72 │ │ + ldr r1, [pc, #72] @ (71e7c ) │ │ movs r2, #1 │ │ add r1, pc │ │ add sp, #32 │ │ ldmia.w sp!, {r8, r9, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 3ffd4 │ │ + b.w 402dc │ │ ldr r0, [r4, #16] │ │ - cbz r0, 71db8 │ │ + cbz r0, 71e6c │ │ ldrb.w r2, [sp, #4] │ │ - ldr r3, [pc, #48] @ (71dcc ) │ │ - ldr r1, [pc, #52] @ (71dd0 ) │ │ + ldr r3, [pc, #48] @ (71e80 ) │ │ + ldr r1, [pc, #52] @ (71e84 ) │ │ cmp r2, #0 │ │ mov.w r2, #16 │ │ add r3, pc │ │ add r1, pc │ │ it eq │ │ moveq r1, r3 │ │ it ne │ │ movne r2, #25 │ │ - bl 3ffd4 │ │ - cbz r0, 71db8 │ │ + bl 402dc │ │ + cbz r0, 71e6c │ │ movs r0, #1 │ │ - b.n 71dc0 │ │ + b.n 71e74 │ │ ldmia.w r5, {r0, r1, r2, r3} │ │ stmia r4!, {r0, r1, r2, r3} │ │ movs r0, #0 │ │ add sp, #32 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - strb r4, [r2, r4] │ │ - @ instruction: 0xfffa0bba │ │ - vsri.64 , , #6 │ │ + strb r7, [r3, r1] │ │ + vtbl.8 d16, {d10-d13}, d6 │ │ + vrintn.f32 d21, d18 │ │ vsli.64 , q0, #58 @ 0x3a │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldrd r3, r0, [r1, #4] │ │ cmp r0, r3 │ │ - bcs.n 71e08 │ │ + bcs.n 71ebc │ │ ldr r3, [r1, #0] │ │ uxtb r2, r2 │ │ ldrb r3, [r3, r0] │ │ cmp r3, r2 │ │ - bne.n 71e08 │ │ + bne.n 71ebc │ │ adds r0, #1 │ │ str r0, [r1, #8] │ │ mov r0, sp │ │ - bl 72780 │ │ + bl 72834 │ │ ldrb.w r0, [sp] │ │ - cbz r0, 71e14 │ │ + cbz r0, 71ec8 │ │ ldrb.w r0, [sp, #1] │ │ strb r0, [r4, #1] │ │ movs r0, #1 │ │ - b.n 71e0e │ │ + b.n 71ec2 │ │ movs r0, #0 │ │ strd r0, r0, [r4, #8] │ │ strb r0, [r4, #0] │ │ add sp, #16 │ │ pop {r4, r6, r7, pc} │ │ ldrd r0, r1, [sp, #8] │ │ movs r2, #0 │ │ adds r0, #1 │ │ adcs.w r1, r1, #0 │ │ adcs.w r3, r2, #0 │ │ - bne.n 71e2e │ │ + bne.n 71ee2 │ │ strd r0, r1, [r4, #8] │ │ movs r0, #0 │ │ - b.n 71e0e │ │ + b.n 71ec2 │ │ strb r2, [r4, #1] │ │ - b.n 71e04 │ │ - bmi.n 71dde │ │ + b.n 71eb8 │ │ + bmi.n 71e92 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #8 │ │ ldrd lr, r2, [r1, #4] │ │ mov r4, r1 │ │ cmp r2, lr │ │ - bcs.n 71e5a │ │ + bcs.n 71f0e │ │ ldr r1, [r4, #0] │ │ ldrb r1, [r1, r2] │ │ cmp r1, #117 @ 0x75 │ │ - bne.n 71e5a │ │ + bne.n 71f0e │ │ adds r2, #1 │ │ mov.w r8, #1 │ │ str r2, [r4, #8] │ │ - b.n 71e5e │ │ + b.n 71f12 │ │ mov.w r8, #0 │ │ cmp r2, lr │ │ - bcs.n 71ebe │ │ + bcs.n 71f72 │ │ ldr.w ip, [r4] │ │ ldrb.w r1, [ip, r2] │ │ sub.w r3, r1, #48 @ 0x30 │ │ uxtb r1, r3 │ │ cmp r1, #10 │ │ - bcs.n 71ebe │ │ + bcs.n 71f72 │ │ adds r2, #1 │ │ lsls r3, r3, #24 │ │ str r2, [r4, #8] │ │ - beq.n 71e9e │ │ + beq.n 71f52 │ │ movs r3, #10 │ │ cmp lr, r2 │ │ - beq.n 71eb2 │ │ + beq.n 71f66 │ │ ldrb.w r6, [ip, r2] │ │ subs r6, #48 @ 0x30 │ │ uxtb r6, r6 │ │ cmp r6, #9 │ │ - bhi.n 71ea0 │ │ + bhi.n 71f54 │ │ umull r1, r5, r1, r3 │ │ adds r2, #1 │ │ str r2, [r4, #8] │ │ - cbnz r5, 71ebe │ │ + cbnz r5, 71f72 │ │ adds r1, r1, r6 │ │ - bcs.n 71ebe │ │ - b.n 71e7e │ │ + bcs.n 71f72 │ │ + b.n 71f32 │ │ movs r1, #0 │ │ cmp r2, lr │ │ - bcs.n 71eb4 │ │ + bcs.n 71f68 │ │ ldrb.w r3, [ip, r2] │ │ cmp r3, #95 @ 0x5f │ │ itt eq │ │ addeq r2, #1 │ │ streq r2, [r4, #8] │ │ - b.n 71eb4 │ │ + b.n 71f68 │ │ mov r2, lr │ │ adds r3, r2, r1 │ │ - bcs.n 71ebe │ │ + bcs.n 71f72 │ │ cmp r3, lr │ │ str r3, [r4, #8] │ │ - bls.n 71ecc │ │ + bls.n 71f80 │ │ movs r1, #0 │ │ str r1, [r0, #0] │ │ strb r1, [r0, #4] │ │ add sp, #8 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - cbz r2, 71edc │ │ + cbz r2, 71f90 │ │ cmp r2, lr │ │ - bcs.n 71edc │ │ + bcs.n 71f90 │ │ ldrsb.w r4, [ip, r2] │ │ cmn.w r4, #65 @ 0x41 │ │ - ble.n 71f68 │ │ - cbz r3, 71eec │ │ + ble.n 7201c │ │ + cbz r3, 71fa0 │ │ cmp r3, lr │ │ - bcs.n 71eec │ │ + bcs.n 71fa0 │ │ ldrsb.w r4, [ip, r3] │ │ cmn.w r4, #65 @ 0x41 │ │ - ble.n 71f68 │ │ + ble.n 7201c │ │ add ip, r2 │ │ cmp.w r8, #0 │ │ - beq.n 71f18 │ │ + beq.n 71fcc │ │ sub.w r5, ip, #1 │ │ mov r3, r1 │ │ - cbz r3, 71f26 │ │ + cbz r3, 71fda │ │ ldrb r6, [r5, r3] │ │ mov r2, r3 │ │ subs r3, #1 │ │ cmp r6, #95 @ 0x5f │ │ - bne.n 71efa │ │ - cbz r3, 71f32 │ │ + bne.n 71fae │ │ + cbz r3, 71fe6 │ │ cmp r3, r1 │ │ - bcs.n 71f2e │ │ + bcs.n 71fe2 │ │ ldrsb.w r6, [ip, r3] │ │ cmn.w r6, #65 @ 0x41 │ │ - bgt.n 71f32 │ │ - b.n 71f76 │ │ + bgt.n 71fe6 │ │ + b.n 7202a │ │ movs r2, #0 │ │ movs r3, #1 │ │ strd ip, r1, [r0] │ │ strd r3, r2, [r0, #8] │ │ - b.n 71ec4 │ │ + b.n 71f78 │ │ movs r3, #0 │ │ movs r5, #1 │ │ mov r2, ip │ │ - b.n 71f5a │ │ - bne.n 71f76 │ │ - cbz r2, 71f50 │ │ + b.n 7200e │ │ + bne.n 7202a │ │ + cbz r2, 72004 │ │ cmp r2, r1 │ │ - bcs.n 71f44 │ │ + bcs.n 71ff8 │ │ ldrsb.w r6, [ip, r2] │ │ cmn.w r6, #65 @ 0x41 │ │ - ble.n 71f48 │ │ + ble.n 71ffc │ │ mov r6, r2 │ │ - b.n 71f52 │ │ + b.n 72006 │ │ mov r6, r1 │ │ - beq.n 71f52 │ │ - ldr r0, [pc, #60] @ (71f88 ) │ │ + beq.n 72006 │ │ + ldr r0, [pc, #60] @ (7203c ) │ │ mov r3, r1 │ │ add r0, pc │ │ - b.n 71f6e │ │ + b.n 72022 │ │ movs r6, #0 │ │ add.w r2, ip, r6 │ │ subs r1, r1, r6 │ │ mov r5, ip │ │ cmp r1, #0 │ │ - beq.n 71ebe │ │ + beq.n 71f72 │ │ strd r5, r3, [r0] │ │ strd r2, r1, [r0, #8] │ │ - b.n 71ec4 │ │ - ldr r0, [pc, #20] @ (71f80 ) │ │ + b.n 71f78 │ │ + ldr r0, [pc, #20] @ (72034 ) │ │ mov r1, lr │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, ip │ │ - bl 3fd1c │ │ - ldr r0, [pc, #12] @ (71f84 ) │ │ + bl 40024 │ │ + ldr r0, [pc, #12] @ (72038 ) │ │ movs r2, #0 │ │ add r0, pc │ │ - b.n 71f6e │ │ + b.n 72022 │ │ nop │ │ - str r5, [sp, #736] @ 0x2e0 │ │ + str r5, [sp, #80] @ 0x50 │ │ movs r6, r0 │ │ - str r5, [sp, #744] @ 0x2e8 │ │ + str r5, [sp, #88] @ 0x58 │ │ movs r6, r0 │ │ - str r5, [sp, #992] @ 0x3e0 │ │ + str r5, [sp, #336] @ 0x150 │ │ movs r6, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub.w sp, sp, #564 @ 0x234 │ │ mov r6, r0 │ │ add r0, sp, #48 @ 0x30 │ │ mov r4, r1 │ │ mov.w r1, #512 @ 0x200 │ │ - bl d518e │ │ + bl d521e │ │ ldr r1, [r6, #12] │ │ str r1, [sp, #40] @ 0x28 │ │ cmp r1, #0 │ │ - beq.n 72036 │ │ + beq.n 720ea │ │ ldr r0, [r6, #8] │ │ mov.w ip, #0 │ │ ldrd r3, r1, [r6] │ │ cmp r1, #0 │ │ str r4, [sp, #32] │ │ ldrb.w lr, [r0] │ │ str r0, [sp, #28] │ │ str r3, [sp, #8] │ │ str r1, [sp, #20] │ │ - beq.n 7204e │ │ + beq.n 72102 │ │ adds r0, r3, r1 │ │ add r4, sp, #48 @ 0x30 │ │ mov.w r8, #0 │ │ mov r1, r3 │ │ ldrsb.w r6, [r1], #1 │ │ cmp.w r6, #4294967295 @ 0xffffffff │ │ uxtb r2, r6 │ │ - bgt.n 7201e │ │ + bgt.n 720d2 │ │ ldrb r6, [r3, #1] │ │ and.w r1, r2, #31 │ │ cmp r2, #224 @ 0xe0 │ │ and.w r6, r6, #63 @ 0x3f │ │ - bcc.n 72010 │ │ + bcc.n 720c4 │ │ ldrb r5, [r3, #2] │ │ cmp r2, #240 @ 0xf0 │ │ and.w r5, r5, #63 @ 0x3f │ │ orr.w r6, r5, r6, lsl #6 │ │ - bcc.n 72018 │ │ + bcc.n 720cc │ │ ldrb r2, [r3, #3] │ │ and.w r1, r1, #7 │ │ and.w r2, r2, #63 @ 0x3f │ │ orr.w r2, r2, r6, lsl #6 │ │ orr.w r2, r2, r1, lsl #18 │ │ adds r1, r3, #4 │ │ - b.n 7201e │ │ + b.n 720d2 │ │ orr.w r2, r6, r1, lsl #6 │ │ adds r1, r3, #2 │ │ - b.n 7201e │ │ + b.n 720d2 │ │ orr.w r2, r6, r1, lsl #12 │ │ adds r1, r3, #3 │ │ cmp.w r8, #128 @ 0x80 │ │ - beq.w 721e6 │ │ + beq.w 7229a │ │ str.w r2, [r4, r8, lsl #2] │ │ add.w r8, r8, #1 │ │ mov r3, r1 │ │ cmp r1, r0 │ │ - beq.n 72054 │ │ - b.n 71fd2 │ │ + beq.n 72108 │ │ + b.n 72086 │ │ ldrd r0, r3, [r4] │ │ ldrd r1, r2, [r6] │ │ ldr r3, [r3, #12] │ │ add.w sp, sp, #564 @ 0x234 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ bx r3 │ │ @@ -111023,293 +110966,293 @@ │ │ cmp r3, #1 │ │ it ls │ │ movls r3, #1 │ │ cmp r3, #26 │ │ it cs │ │ movcs r3, #26 │ │ lsls r5, r5, #31 │ │ - beq.n 720bc │ │ + beq.n 72170 │ │ ldr r4, [sp, #44] @ 0x2c │ │ cmp sl, r4 │ │ - beq.w 721e6 │ │ + beq.w 7229a │ │ ldrb.w r4, [sl], #1 │ │ - b.n 720c4 │ │ + b.n 72178 │ │ mov r4, lr │ │ lsls r6, r6, #31 │ │ - beq.w 721e6 │ │ + beq.w 7229a │ │ sub.w r6, r4, #97 @ 0x61 │ │ uxtb r5, r6 │ │ cmp r5, #26 │ │ - bcc.n 720de │ │ + bcc.n 72192 │ │ sub.w r6, r4, #48 @ 0x30 │ │ uxtb r6, r6 │ │ cmp r6, #9 │ │ - bhi.w 721e6 │ │ + bhi.w 7229a │ │ sub.w r6, r4, #22 │ │ uxtb r6, r6 │ │ umull r5, r4, r6, r2 │ │ cmp r4, #0 │ │ - bne.n 721e6 │ │ + bne.n 7229a │ │ adds.w fp, fp, r5 │ │ - bcs.n 721e6 │ │ + bcs.n 7229a │ │ cmp r3, r6 │ │ - bhi.n 72106 │ │ + bhi.n 721ba │ │ rsb r3, r3, #36 @ 0x24 │ │ umull r2, r3, r2, r3 │ │ cmp r3, #0 │ │ - bne.n 721e6 │ │ + bne.n 7229a │ │ adds r1, #36 @ 0x24 │ │ movs r6, #0 │ │ movs r5, #1 │ │ - b.n 72098 │ │ + b.n 7214c │ │ adds.w r6, fp, r9 │ │ - bcs.n 721e6 │ │ + bcs.n 7229a │ │ add.w r4, r8, #1 │ │ mov r0, r6 │ │ mov r1, r4 │ │ - blx d5af0 │ │ + blx d5b00 │ │ ldr r1, [sp, #36] @ 0x24 │ │ add r5, sp, #48 @ 0x30 │ │ adds r1, r1, r0 │ │ str r1, [sp, #36] @ 0x24 │ │ - bcs.n 721e6 │ │ + bcs.n 7229a │ │ ldr r1, [sp, #36] @ 0x24 │ │ movw r2, #2048 @ 0x800 │ │ movt r2, #65519 @ 0xffef │ │ eor.w r1, r1, #55296 @ 0xd800 │ │ sub.w r1, r1, #1114112 @ 0x110000 │ │ cmp r1, r2 │ │ - bcc.n 721e6 │ │ + bcc.n 7229a │ │ ldr r1, [sp, #4] │ │ cmp r8, r1 │ │ - beq.n 721e6 │ │ + beq.n 7229a │ │ mls r9, r0, r4, r6 │ │ ldr r1, [sp, #24] │ │ mov r0, r8 │ │ cmp r8, r9 │ │ - bls.n 7215c │ │ + bls.n 72210 │ │ mov r2, r1 │ │ subs r0, #1 │ │ ldr.w r3, [r2, #-4]! │ │ cmp r0, r9 │ │ str r3, [r1, #0] │ │ mov r1, r2 │ │ - bhi.n 7214a │ │ - b.n 72164 │ │ + bhi.n 721fe │ │ + b.n 72218 │ │ cmp.w r9, #128 @ 0x80 │ │ - bcs.w 72278 │ │ + bcs.w 7232c │ │ ldr r0, [sp, #36] @ 0x24 │ │ str.w r0, [r5, r9, lsl #2] │ │ ldr r0, [sp, #44] @ 0x2c │ │ cmp sl, r0 │ │ - beq.n 7223e │ │ + beq.n 722f2 │ │ ldr r1, [sp, #12] │ │ mov r0, fp │ │ - blx d5af0 │ │ + blx d5b00 │ │ mov r1, r4 │ │ mov r6, r0 │ │ mov r8, r4 │ │ - blx d5af0 │ │ + blx d5b00 │ │ ldrb.w r5, [sl] │ │ add r0, r6 │ │ movs r6, #0 │ │ cmp.w r0, #456 @ 0x1c8 │ │ - bcc.n 721b6 │ │ + bcc.n 7226a │ │ movw r3, #16853 @ 0x41d5 │ │ mov r1, r0 │ │ movt r3, #54301 @ 0xd41d │ │ movw r4, #15959 @ 0x3e57 │ │ umull r0, r2, r1, r3 │ │ adds r6, #36 @ 0x24 │ │ cmp r1, r4 │ │ sub.w r0, r1, r2 │ │ add.w r0, r2, r0, lsr #1 │ │ mov.w r0, r0, lsr #5 │ │ mov r1, r0 │ │ - bhi.n 7219e │ │ + bhi.n 72252 │ │ add.w r1, r0, #38 @ 0x26 │ │ add.w r0, r0, r0, lsl #3 │ │ add.w r9, r9, #1 │ │ lsls r0, r0, #2 │ │ uxth r1, r1 │ │ uxth r0, r0 │ │ - blx d5af0 │ │ + blx d5b00 │ │ ldr r1, [sp, #24] │ │ add r0, r6 │ │ mov.w ip, #0 │ │ mov lr, r5 │ │ adds r1, #4 │ │ str r1, [sp, #24] │ │ ldr r1, [sp, #16] │ │ adds r1, #4 │ │ str r1, [sp, #16] │ │ movs r1, #2 │ │ str r1, [sp, #12] │ │ - b.n 72088 │ │ + b.n 7213c │ │ ldr r0, [sp, #32] │ │ movs r2, #9 │ │ ldrd r5, r0, [r0] │ │ ldr r3, [r0, #12] │ │ - ldr r1, [pc, #148] @ (72288 ) │ │ + ldr r1, [pc, #148] @ (7233c ) │ │ mov r0, r5 │ │ add r1, pc │ │ mov r4, r3 │ │ blx r3 │ │ - cbnz r0, 72224 │ │ + cbnz r0, 722d8 │ │ ldr r2, [sp, #20] │ │ - cbz r2, 72218 │ │ + cbz r2, 722cc │ │ ldr r1, [sp, #8] │ │ mov r0, r5 │ │ mov r8, r4 │ │ blx r4 │ │ - cbnz r0, 72224 │ │ - ldr r1, [pc, #128] @ (7228c ) │ │ + cbnz r0, 722d8 │ │ + ldr r1, [pc, #128] @ (72340 ) │ │ mov r0, r5 │ │ movs r2, #1 │ │ movs r6, #1 │ │ add r1, pc │ │ blx r8 │ │ - cbnz r0, 72226 │ │ + cbnz r0, 722da │ │ ldr r1, [sp, #28] │ │ mov r0, r5 │ │ ldr r2, [sp, #40] @ 0x28 │ │ mov r6, r4 │ │ blx r4 │ │ - cbz r0, 72232 │ │ + cbz r0, 722e6 │ │ movs r6, #1 │ │ mov r0, r6 │ │ add.w sp, sp, #564 @ 0x234 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r1, [pc, #92] @ (72290 ) │ │ + ldr r1, [pc, #92] @ (72344 ) │ │ mov r0, r5 │ │ movs r2, #1 │ │ mov r3, r6 │ │ add r1, pc │ │ - b.n 72040 │ │ + b.n 720f4 │ │ cmp.w r8, #128 @ 0x80 │ │ - bcs.n 7226a │ │ + bcs.n 7231e │ │ ldr.w r9, [sp, #32] │ │ add r5, sp, #48 @ 0x30 │ │ ldr r4, [sp, #16] │ │ add.w r8, sp, #560 @ 0x230 │ │ ldr r0, [r5, #0] │ │ mov r1, r9 │ │ str r0, [sp, #560] @ 0x230 │ │ mov r0, r8 │ │ - bl 40138 │ │ + bl 40440 │ │ mov r6, r0 │ │ cmp r0, #0 │ │ - bne.n 72226 │ │ + bne.n 722da │ │ adds r5, #4 │ │ subs r4, #4 │ │ - bne.n 72250 │ │ - b.n 72226 │ │ - ldr r3, [pc, #40] @ (72294 ) │ │ + bne.n 72304 │ │ + b.n 722da │ │ + ldr r3, [pc, #40] @ (72348 ) │ │ movs r0, #0 │ │ mov r1, r4 │ │ movs r2, #128 @ 0x80 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r2, [pc, #8] @ (72284 ) │ │ + bl 3fcb0 │ │ + ldr r2, [pc, #8] @ (72338 ) │ │ mov r0, r9 │ │ movs r1, #128 @ 0x80 │ │ add r2, pc │ │ - bl 3fa74 │ │ - str r2, [sp, #536] @ 0x218 │ │ + bl 3fd7c │ │ + str r1, [sp, #904] @ 0x388 │ │ movs r6, r0 │ │ - str r5, [r0, r6] │ │ - vtrn.32 d21, d31 │ │ - vmla.i , q5, d25[0] │ │ - vqmovn.s64 d25, q1 │ │ + str r0, [r2, r3] │ │ + @ instruction: 0xfffa4ffa │ │ + @ instruction: 0xfffa4fb4 │ │ + vsra.u64 , q7, #6 │ │ movs r6, r0 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r4, r0 │ │ ldr r5, [r0, #16] │ │ movs r0, #0 │ │ movs r1, #0 │ │ str r0, [r4, #16] │ │ mov r0, r4 │ │ - bl 71920 │ │ - cbnz r0, 722b6 │ │ + bl 719d4 │ │ + cbnz r0, 7236a │ │ str r5, [r4, #16] │ │ add sp, #8 │ │ pop {r4, r5, r7, pc} │ │ - ldr r0, [pc, #24] @ (722d0 ) │ │ + ldr r0, [pc, #24] @ (72384 ) │ │ sub.w r2, r7, #9 │ │ - ldr r3, [pc, #20] @ (722d4 ) │ │ - ldr r1, [pc, #24] @ (722d8 ) │ │ + ldr r3, [pc, #20] @ (72388 ) │ │ + ldr r1, [pc, #24] @ (7238c ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #61 @ 0x3d │ │ - bl 414b0 │ │ + bl 417b8 │ │ nop │ │ - str r7, [r2, r0] │ │ - sha1su1.32 , q1 │ │ + ldr r7, [pc, #392] @ (72510 ) │ │ + vqmovn.u64 d25, q15 │ │ movs r6, r0 │ │ - str r2, [sp, #704] @ 0x2c0 │ │ + str r2, [sp, #48] @ 0x30 │ │ movs r6, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #16 │ │ ldr r5, [r0, #0] │ │ mov r9, r0 │ │ - cbz r5, 7231e │ │ + cbz r5, 723d2 │ │ ldrd r4, r6, [r9, #4] │ │ cmp r6, r4 │ │ - bcs.w 725be │ │ + bcs.w 72672 │ │ ldrb.w r8, [r5, r6] │ │ add.w sl, r6, #1 │ │ str.w sl, [r9, #8] │ │ mov r0, r8 │ │ - bl 73ab4 │ │ - cbz r0, 7233c │ │ + bl 73b68 │ │ + cbz r0, 723f0 │ │ mov r2, r0 │ │ ldr.w r0, [r9, #16] │ │ cmp r0, #0 │ │ - beq.w 7264a │ │ + beq.w 726fe │ │ mov r3, r1 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - b.n 7232e │ │ + b.n 723e2 │ │ ldr.w r0, [r9, #16] │ │ cmp r0, #0 │ │ - beq.w 7264a │ │ - ldr r1, [pc, #812] @ (72658 ) │ │ + beq.w 726fe │ │ + ldr r1, [pc, #812] @ (7270c ) │ │ movs r2, #1 │ │ add r1, pc │ │ add sp, #16 │ │ ldmia.w sp!, {r8, r9, sl} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 3ffd4 │ │ + b.w 402dc │ │ ldr.w r0, [r9, #12] │ │ adds r0, #1 │ │ str.w r0, [r9, #12] │ │ cmp.w r0, #500 @ 0x1f4 │ │ - bls.n 7236c │ │ + bls.n 72420 │ │ ldr.w r0, [r9, #16] │ │ - cbz r0, 72362 │ │ - ldr r1, [pc, #780] @ (72660 ) │ │ + cbz r0, 72416 │ │ + ldr r1, [pc, #780] @ (72714 ) │ │ movs r2, #25 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.w 725d0 │ │ + bne.w 72684 │ │ movs r0, #1 │ │ strb.w r0, [r9, #4] │ │ movs r5, #0 │ │ - b.n 725da │ │ + b.n 7268e │ │ sub.w r0, r8, #65 @ 0x41 │ │ cmp r0, #22 │ │ - bhi.w 725e0 │ │ + bhi.w 72694 │ │ tbh [pc, r0, lsl #1] │ │ movs r7, r2 │ │ lsls r3, r4, #3 │ │ lsls r3, r6, #4 │ │ lsls r3, r5, #3 │ │ lsls r3, r6, #4 │ │ lsls r7, r4, #3 │ │ @@ -111327,487 +111270,487 @@ │ │ lsls r0, r4, #1 │ │ movs r7, r2 │ │ lsls r0, r4, #2 │ │ lsls r3, r6, #4 │ │ lsls r3, r6, #4 │ │ lsls r0, r2, #3 │ │ ldr.w r0, [r9, #16] │ │ - cbz r0, 723c0 │ │ - ldr r1, [pc, #712] @ (72678 ) │ │ + cbz r0, 72474 │ │ + ldr r1, [pc, #712] @ (7272c ) │ │ movs r2, #1 │ │ movs r5, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.w 7264c │ │ + bne.w 72700 │ │ mov r0, r9 │ │ - bl 722dc │ │ + bl 72390 │ │ cmp r0, #0 │ │ - bne.w 725d0 │ │ + bne.w 72684 │ │ cmp.w r8, #65 @ 0x41 │ │ - bne.n 723f8 │ │ + bne.n 724ac │ │ ldr.w r0, [r9, #16] │ │ - cbz r0, 723e8 │ │ - ldr r1, [pc, #672] @ (7267c ) │ │ + cbz r0, 7249c │ │ + ldr r1, [pc, #672] @ (72730 ) │ │ movs r2, #2 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.w 725d0 │ │ + bne.w 72684 │ │ mov r0, r9 │ │ movs r1, #1 │ │ movs r5, #1 │ │ - bl 7284c │ │ + bl 72900 │ │ cmp r0, #0 │ │ - bne.w 7264c │ │ + bne.w 72700 │ │ ldr.w r0, [r9, #16] │ │ cmp r0, #0 │ │ - beq.w 7263a │ │ - ldr r1, [pc, #636] @ (72680 ) │ │ + beq.w 726ee │ │ + ldr r1, [pc, #636] @ (72734 ) │ │ add r1, pc │ │ - b.n 7250a │ │ + b.n 725be │ │ ldr.w r0, [r9, #16] │ │ - cbz r0, 72420 │ │ - ldr r1, [pc, #608] @ (72670 ) │ │ + cbz r0, 724d4 │ │ + ldr r1, [pc, #608] @ (72724 ) │ │ movs r2, #1 │ │ movs r5, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.w 7264c │ │ + bne.w 72700 │ │ cmp.w r8, #80 @ 0x50 │ │ - bne.w 7261c │ │ + bne.w 726d0 │ │ ldr.w r0, [r9, #16] │ │ cmp r0, #0 │ │ - beq.w 72630 │ │ - ldr r1, [pc, #576] @ (72674 ) │ │ + beq.w 726e4 │ │ + ldr r1, [pc, #576] @ (72728 ) │ │ movs r2, #6 │ │ add r1, pc │ │ - b.n 72628 │ │ + b.n 726dc │ │ ldr.w r0, [r9, #16] │ │ - cbz r0, 72460 │ │ - ldr r1, [pc, #544] @ (72664 ) │ │ + cbz r0, 72514 │ │ + ldr r1, [pc, #544] @ (72718 ) │ │ movs r2, #1 │ │ movs r5, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.w 7264c │ │ + bne.w 72700 │ │ ldr.w r5, [r9] │ │ cmp r5, #0 │ │ - beq.w 72616 │ │ + beq.w 726ca │ │ ldrd r4, sl, [r9, #4] │ │ cmp sl, r4 │ │ - bcs.w 72616 │ │ + bcs.w 726ca │ │ ldrb.w r0, [r5, sl] │ │ cmp r0, #76 @ 0x4c │ │ - bne.w 72616 │ │ + bne.w 726ca │ │ add.w r0, sl, #1 │ │ str.w r0, [r9, #8] │ │ mov r0, sp │ │ mov r1, r9 │ │ - bl 72780 │ │ + bl 72834 │ │ ldrb.w r0, [sp] │ │ cmp r0, #0 │ │ - beq.w 725ee │ │ + beq.w 726a2 │ │ ldr.w r0, [r9, #16] │ │ ldrb.w r4, [sp, #1] │ │ - cbz r0, 724b4 │ │ - ldr r2, [pc, #464] @ (72668 ) │ │ + cbz r0, 72568 │ │ + ldr r2, [pc, #464] @ (7271c ) │ │ cmp r4, #0 │ │ - ldr r1, [pc, #464] @ (7266c ) │ │ + ldr r1, [pc, #464] @ (72720 ) │ │ add r2, pc │ │ add r1, pc │ │ it eq │ │ moveq r1, r2 │ │ mov.w r2, #16 │ │ it ne │ │ movne r2, #25 │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.w 725d0 │ │ + bne.w 72684 │ │ strb.w r4, [r9, #4] │ │ - b.n 72368 │ │ + b.n 7241c │ │ ldr.w r0, [r9, #16] │ │ - cbz r0, 724d2 │ │ - ldr r1, [pc, #448] @ (72684 ) │ │ + cbz r0, 72586 │ │ + ldr r1, [pc, #448] @ (72738 ) │ │ movs r2, #1 │ │ movs r5, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.w 7264c │ │ + bne.w 72700 │ │ mov r0, r9 │ │ - bl 73cac │ │ + bl 73d60 │ │ lsls r0, r0, #31 │ │ - bne.n 725d0 │ │ + bne.n 72684 │ │ cmp r1, #1 │ │ - bne.n 724fc │ │ + bne.n 725b0 │ │ ldr.w r0, [r9, #16] │ │ cmp r0, #0 │ │ - beq.w 7263a │ │ - ldr r1, [pc, #412] @ (72688 ) │ │ + beq.w 726ee │ │ + ldr r1, [pc, #412] @ (7273c ) │ │ movs r2, #1 │ │ movs r5, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.w 7264c │ │ + bne.w 72700 │ │ ldr.w r0, [r9, #16] │ │ cmp r0, #0 │ │ - beq.w 7263a │ │ - ldr r1, [pc, #388] @ (7268c ) │ │ + beq.w 726ee │ │ + ldr r1, [pc, #388] @ (72740 ) │ │ add r1, pc │ │ movs r2, #1 │ │ movs r5, #1 │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - beq.w 7263a │ │ - b.n 7264c │ │ + beq.w 726ee │ │ + b.n 72700 │ │ mov r0, r9 │ │ - bl 722dc │ │ + bl 72390 │ │ cmp r0, #0 │ │ - bne.n 725d0 │ │ + bne.n 72684 │ │ ldr.w r0, [r9, #16] │ │ - cbz r0, 72538 │ │ - ldr r1, [pc, #364] @ (72698 ) │ │ + cbz r0, 725ec │ │ + ldr r1, [pc, #364] @ (7274c ) │ │ movs r2, #4 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 725d0 │ │ + bne.n 72684 │ │ mov r0, r9 │ │ - bl 73e30 │ │ - b.n 72636 │ │ + bl 73ee4 │ │ + b.n 726ea │ │ mov r0, r9 │ │ - bl 73c08 │ │ - b.n 72636 │ │ + bl 73cbc │ │ + b.n 726ea │ │ mov r0, r9 │ │ - bl 73adc │ │ - b.n 72636 │ │ + bl 73b90 │ │ + b.n 726ea │ │ ldr.w r0, [r9, #16] │ │ - cbz r0, 72562 │ │ - ldr r1, [pc, #312] @ (72690 ) │ │ + cbz r0, 72616 │ │ + ldr r1, [pc, #312] @ (72744 ) │ │ movs r2, #4 │ │ add r1, pc │ │ - bl 3ffd4 │ │ - cbnz r0, 725d0 │ │ + bl 402dc │ │ + cbnz r0, 72684 │ │ mov r0, r9 │ │ - bl 73d08 │ │ - cbnz r0, 725d0 │ │ + bl 73dbc │ │ + cbnz r0, 72684 │ │ ldr.w r0, [r9] │ │ - cbz r0, 725be │ │ + cbz r0, 72672 │ │ ldrd r2, r1, [r9, #4] │ │ cmp r1, r2 │ │ - bcs.n 725be │ │ + bcs.n 72672 │ │ ldrb r0, [r0, r1] │ │ cmp r0, #76 @ 0x4c │ │ - bne.n 725be │ │ + bne.n 72672 │ │ adds r0, r1, #1 │ │ str.w r0, [r9, #8] │ │ mov r0, sp │ │ mov r1, r9 │ │ - bl 72780 │ │ + bl 72834 │ │ ldrb.w r0, [sp] │ │ cmp r0, #0 │ │ - bne.w 7248a │ │ + bne.w 7253e │ │ ldrd r5, r6, [sp, #8] │ │ orrs.w r0, r5, r6 │ │ - beq.n 7263a │ │ + beq.n 726ee │ │ ldr.w r0, [r9, #16] │ │ - cbz r0, 725b2 │ │ - ldr r1, [pc, #236] @ (72694 ) │ │ + cbz r0, 72666 │ │ + ldr r1, [pc, #236] @ (72748 ) │ │ movs r2, #3 │ │ add r1, pc │ │ - bl 3ffd4 │ │ - cbnz r0, 725d0 │ │ + bl 402dc │ │ + cbnz r0, 72684 │ │ mov r0, r9 │ │ mov r2, r5 │ │ mov r3, r6 │ │ - bl 72d14 │ │ - b.n 72636 │ │ + bl 72dc8 │ │ + b.n 726ea │ │ ldr.w r0, [r9, #16] │ │ - cbz r0, 725d4 │ │ - ldr r1, [pc, #148] @ (7265c ) │ │ + cbz r0, 72688 │ │ + ldr r1, [pc, #148] @ (72710 ) │ │ movs r2, #16 │ │ add r1, pc │ │ - bl 3ffd4 │ │ - cbz r0, 725d4 │ │ + bl 402dc │ │ + cbz r0, 72688 │ │ movs r5, #1 │ │ - b.n 7264c │ │ + b.n 72700 │ │ movs r5, #0 │ │ strb.w r5, [r9, #4] │ │ str.w r5, [r9] │ │ - b.n 7264c │ │ + b.n 72700 │ │ mov r0, r9 │ │ movs r1, #0 │ │ str.w r6, [r9, #8] │ │ - bl 71920 │ │ - b.n 72636 │ │ + bl 719d4 │ │ + b.n 726ea │ │ ldrd r2, r3, [sp, #8] │ │ orrs.w r0, r2, r3 │ │ - beq.n 72616 │ │ + beq.n 726ca │ │ mov r0, r9 │ │ - bl 72d14 │ │ + bl 72dc8 │ │ cmp r0, #0 │ │ - bne.n 725d0 │ │ + bne.n 72684 │ │ ldr.w r0, [r9, #16] │ │ - cbz r0, 72616 │ │ - ldr r1, [pc, #144] @ (7269c ) │ │ + cbz r0, 726ca │ │ + ldr r1, [pc, #144] @ (72750 ) │ │ movs r2, #1 │ │ movs r5, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ - cbnz r0, 7264c │ │ + bl 402dc │ │ + cbnz r0, 72700 │ │ cmp.w r8, #82 @ 0x52 │ │ - beq.n 72630 │ │ + beq.n 726e4 │ │ ldr.w r0, [r9, #16] │ │ - cbz r0, 72630 │ │ - ldr r1, [pc, #124] @ (726a0 ) │ │ + cbz r0, 726e4 │ │ + ldr r1, [pc, #124] @ (72754 ) │ │ movs r2, #4 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 725d0 │ │ + bne.n 72684 │ │ mov r0, r9 │ │ - bl 722dc │ │ + bl 72390 │ │ cmp r0, #0 │ │ - bne.n 725d0 │ │ + bne.n 72684 │ │ ldr.w r0, [r9] │ │ - cbz r0, 7264a │ │ + cbz r0, 726fe │ │ ldr.w r0, [r9, #12] │ │ subs r0, #1 │ │ str.w r0, [r9, #12] │ │ movs r5, #0 │ │ mov r0, r5 │ │ add sp, #16 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - ldr r7, [pc, #416] @ (727fc ) │ │ - vrsra.u64 d16, d4, #6 │ │ - @ instruction: 0xfffa4f25 │ │ - vqrdmlah.s q10, q5, d16[0] │ │ - vrintx.f32 q8, q1 │ │ - @ instruction: 0xfffa4ddf │ │ - @ instruction: 0xfffa4e94 │ │ - vcvt.f32.u32 q10, , #6 │ │ - vqrdmlah.s q10, q13, d5[0] │ │ - @ instruction: 0xfffa4ed3 │ │ - vcvt.f32.u32 q10, q11, #6 │ │ - vqrdmulh.s q10, q13, d27[0] │ │ - vqrdmulh.s q10, q13, d2[0] │ │ + ldr r6, [pc, #716] @ (729dc ) │ │ + vqmovn.u64 d16, q8 │ │ + vcvt.f32.u32 q10, q8, #6 │ │ @ instruction: 0xfffa4dab │ │ - vcvt.u16.f16 d19, d14, #6 │ │ - @ instruction: 0xfffa4d0a │ │ - vcvt.u16.f16 d19, d30, #6 │ │ - @ instruction: 0xfffa4c99 │ │ - @ instruction: 0xfffa3bfa │ │ + vrintn.f32 d16, d14 │ │ + @ instruction: 0xfffa4d2a │ │ + @ instruction: 0xfffa4ddf │ │ + @ instruction: 0xfffa4dbe │ │ + vcvt.f32.u32 d20, d0, #6 │ │ + vcvt.f32.u32 d20, d14, #6 │ │ + vqrdmulh.s q10, q13, d1[0] │ │ + vcvt.u16.f16 d20, d22, #6 │ │ + @ instruction: 0xfffa4d0d │ │ + @ instruction: 0xfffa4cf6 │ │ + vdup.16 , d26[2] │ │ + vcvt.f16.u16 q10, , #6 │ │ + vmull.u , d26, d10 │ │ + vtbx.8 d20, {d26-d29}, d20 │ │ + vtbx.8 d19, {d10-d13}, d6 │ │ vtbl.8 d22, {d10}, d1 │ │ cmp r1, #0 │ │ - beq.n 72730 │ │ + beq.n 727e4 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #16 │ │ mov r4, r0 │ │ movs r6, #0 │ │ mov r5, sp │ │ ldrd r3, r2, [r4, #4] │ │ cmp r2, r3 │ │ - bcs.n 726c8 │ │ + bcs.n 7277c │ │ ldrb r0, [r1, r2] │ │ cmp r0, #69 @ 0x45 │ │ - beq.n 72734 │ │ - cbz r6, 726e4 │ │ + beq.n 727e8 │ │ + cbz r6, 72798 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 726e4 │ │ - ldr r1, [pc, #164] @ (72774 ) │ │ + cbz r0, 72798 │ │ + ldr r1, [pc, #164] @ (72828 ) │ │ movs r2, #2 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 72760 │ │ + bne.n 72814 │ │ ldr r1, [r4, #0] │ │ - cbz r1, 72710 │ │ + cbz r1, 727c4 │ │ ldrd r3, r2, [r4, #4] │ │ cmp r2, r3 │ │ - bcs.n 72710 │ │ + bcs.n 727c4 │ │ ldrb r0, [r1, r2] │ │ cmp r0, #75 @ 0x4b │ │ - beq.n 72722 │ │ + beq.n 727d6 │ │ cmp r0, #76 @ 0x4c │ │ - bne.n 72710 │ │ + bne.n 727c4 │ │ adds r0, r2, #1 │ │ str r0, [r4, #8] │ │ mov r0, r5 │ │ mov r1, r4 │ │ - bl 72780 │ │ + bl 72834 │ │ ldrb.w r0, [sp] │ │ - cbnz r0, 7273c │ │ + cbnz r0, 727f0 │ │ ldrd r2, r3, [sp, #8] │ │ mov r0, r4 │ │ - bl 72d14 │ │ - b.n 72716 │ │ + bl 72dc8 │ │ + b.n 727ca │ │ mov r0, r4 │ │ - bl 722dc │ │ - cbnz r0, 72760 │ │ + bl 72390 │ │ + cbnz r0, 72814 │ │ ldr r1, [r4, #0] │ │ subs r6, #1 │ │ cmp r1, #0 │ │ - bne.n 726ba │ │ - b.n 72738 │ │ + bne.n 7276e │ │ + b.n 727ec │ │ adds r0, r2, #1 │ │ str r0, [r4, #8] │ │ mov r0, r4 │ │ movs r1, #0 │ │ - bl 7284c │ │ - b.n 72716 │ │ + bl 72900 │ │ + b.n 727ca │ │ movs r0, #0 │ │ bx lr │ │ adds r0, r2, #1 │ │ str r0, [r4, #8] │ │ movs r0, #0 │ │ - b.n 72762 │ │ + b.n 72816 │ │ ldr r0, [r4, #16] │ │ ldrb.w r5, [sp, #1] │ │ - cbz r0, 7276a │ │ - ldr r2, [pc, #48] @ (72778 ) │ │ + cbz r0, 7281e │ │ + ldr r2, [pc, #48] @ (7282c ) │ │ cmp r5, #0 │ │ - ldr r1, [pc, #48] @ (7277c ) │ │ + ldr r1, [pc, #48] @ (72830 ) │ │ add r2, pc │ │ add r1, pc │ │ it eq │ │ moveq r1, r2 │ │ mov.w r2, #16 │ │ it ne │ │ movne r2, #25 │ │ - bl 3ffd4 │ │ - cbz r0, 7276a │ │ + bl 402dc │ │ + cbz r0, 7281e │ │ movs r0, #1 │ │ add sp, #16 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #0 │ │ strb r5, [r4, #4] │ │ str r0, [r4, #0] │ │ - b.n 72762 │ │ + b.n 72816 │ │ nop │ │ - ldr r5, [pc, #60] @ (727b4 ) │ │ - vrshr.u32 d16, d2, #6 │ │ - vtbl.8 d20, {d10-d13}, d31 │ │ + ldr r4, [pc, #360] @ (72994 ) │ │ + vsra.u32 q8, q7, #6 │ │ + @ instruction: 0xfffa4a7a │ │ vsli.32 , q8, #26 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ ldrd ip, r9, [r1] │ │ ldr r2, [r1, #8] │ │ cmp r2, r9 │ │ - bcs.n 727a4 │ │ + bcs.n 72858 │ │ ldrb.w r3, [ip, r2] │ │ cmp r3, #95 @ 0x5f │ │ - bne.n 727a4 │ │ + bne.n 72858 │ │ movs r3, #0 │ │ adds r2, #1 │ │ strd r3, r3, [r0, #8] │ │ str r2, [r1, #8] │ │ - b.n 7283e │ │ + b.n 728f2 │ │ mov.w lr, #0 │ │ mov.w r8, #62 @ 0x3e │ │ mov.w sl, #0 │ │ movs r6, #0 │ │ cmp r2, r9 │ │ it hi │ │ movhi r9, r2 │ │ cmp r9, r2 │ │ - beq.n 7281c │ │ + beq.n 728d0 │ │ ldrb.w r3, [ip, r2] │ │ cmp r3, #95 @ 0x5f │ │ - beq.n 72824 │ │ + beq.n 728d8 │ │ sub.w fp, r3, #48 @ 0x30 │ │ uxtb.w r5, fp │ │ cmp r5, #10 │ │ - bcc.n 727ee │ │ + bcc.n 728a2 │ │ sub.w r4, r3, #97 @ 0x61 │ │ uxtb r4, r4 │ │ cmp r4, #26 │ │ - bcs.n 727e0 │ │ + bcs.n 72894 │ │ sub.w fp, r3, #87 @ 0x57 │ │ - b.n 727ee │ │ + b.n 728a2 │ │ sub.w r4, r3, #65 @ 0x41 │ │ uxtb r4, r4 │ │ cmp r4, #26 │ │ - bcs.n 7281c │ │ + bcs.n 728d0 │ │ sub.w fp, r3, #29 │ │ umull r3, r5, sl, r8 │ │ adds r2, #1 │ │ str r2, [r1, #8] │ │ umull r6, r4, r6, r8 │ │ adds r6, r6, r5 │ │ adc.w r5, lr, #0 │ │ cmp r4, #0 │ │ it ne │ │ movne r4, #1 │ │ orrs r4, r5 │ │ - bne.n 7281c │ │ + bne.n 728d0 │ │ uxtb.w r4, fp │ │ adds.w sl, r3, r4 │ │ adcs.w r6, r6, #0 │ │ adcs.w r3, lr, #0 │ │ - beq.n 727b8 │ │ + beq.n 7286c │ │ movs r1, #0 │ │ movs r3, #1 │ │ strb r1, [r0, #1] │ │ - b.n 7283e │ │ + b.n 728f2 │ │ adds r2, #1 │ │ str r2, [r1, #8] │ │ adds.w r1, sl, #1 │ │ mov.w r3, #0 │ │ adcs.w r2, r6, #0 │ │ adcs.w r6, r3, #0 │ │ - bne.n 72846 │ │ + bne.n 728fa │ │ strd r1, r2, [r0, #8] │ │ strb r3, [r0, #0] │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, pc} │ │ strb r3, [r0, #1] │ │ movs r3, #1 │ │ - b.n 7283e │ │ + b.n 728f2 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #24 │ │ mov r4, r0 │ │ ldr r0, [r0, #0] │ │ cmp r0, #0 │ │ - beq.w 72b14 │ │ + beq.w 72bc8 │ │ mov r8, r1 │ │ ldrd r3, r1, [r4, #4] │ │ cmp r1, r3 │ │ - bcs.w 72a3c │ │ + bcs.w 72af0 │ │ ldr r6, [r4, #12] │ │ adds r2, r1, #1 │ │ ldrb.w r9, [r0, r1] │ │ adds r6, #1 │ │ cmp.w r6, #500 @ 0x1f4 │ │ strd r2, r6, [r4, #8] │ │ - bls.n 7289c │ │ + bls.n 72950 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 72894 │ │ - ldr r1, [pc, #748] @ (72b74 ) │ │ + cbz r0, 72948 │ │ + ldr r1, [pc, #748] @ (72c28 ) │ │ movs r2, #25 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.w 72a50 │ │ + bne.w 72b04 │ │ movs r0, #1 │ │ strb r0, [r4, #4] │ │ movs r6, #0 │ │ - b.n 72b10 │ │ + b.n 72bc4 │ │ sub.w r6, r9, #81 @ 0x51 │ │ cmp r6, #40 @ 0x28 │ │ - bhi.n 7293c │ │ + bhi.n 729f0 │ │ tbh [pc, r6, lsl #1] │ │ lsls r7, r0, #2 │ │ lsls r4, r7, #1 │ │ lsls r2, r1, #3 │ │ lsls r6, r2, #3 │ │ lsls r2, r1, #3 │ │ lsls r7, r0, #4 │ │ @@ -111843,903 +111786,903 @@ │ │ movs r3, r7 │ │ lsls r2, r1, #3 │ │ lsls r2, r1, #3 │ │ lsls r2, r1, #3 │ │ movs r1, r5 │ │ movs r3, r7 │ │ cmp r2, r3 │ │ - bcs.n 7291e │ │ + bcs.n 729d2 │ │ ldrb r0, [r0, r2] │ │ cmp r0, #110 @ 0x6e │ │ - bne.n 7291e │ │ + bne.n 729d2 │ │ ldr r0, [r4, #16] │ │ adds r1, #2 │ │ str r1, [r4, #8] │ │ - cbz r0, 7291e │ │ - ldr r1, [pc, #616] @ (72b78 ) │ │ + cbz r0, 729d2 │ │ + ldr r1, [pc, #616] @ (72c2c ) │ │ movs r2, #1 │ │ movs r6, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.w 72b2e │ │ + bne.w 72be2 │ │ mov r0, r4 │ │ mov r1, r9 │ │ - bl 72df0 │ │ + bl 72ea4 │ │ cmp r0, #0 │ │ - bne.w 72a50 │ │ + bne.w 72b04 │ │ ldr r0, [r4, #0] │ │ cmp r0, #0 │ │ - beq.w 72b2c │ │ + beq.w 72be0 │ │ ldr r0, [r4, #12] │ │ subs r0, #1 │ │ str r0, [r4, #12] │ │ - b.n 72b2c │ │ + b.n 72be0 │ │ cmp.w r9, #65 @ 0x41 │ │ - beq.w 72b7c │ │ + beq.w 72c30 │ │ cmp.w r9, #66 @ 0x42 │ │ - bne.n 72a3c │ │ + bne.n 72af0 │ │ mov r0, r4 │ │ mov r1, r8 │ │ - bl 72ef8 │ │ - b.n 72926 │ │ + bl 72fac │ │ + b.n 729da │ │ add r0, sp, #16 │ │ mov r1, r4 │ │ - bl 72fa0 │ │ + bl 73054 │ │ ldr r1, [sp, #16] │ │ cmp r1, #0 │ │ - beq.w 72bf2 │ │ + beq.w 72ca6 │ │ ldr r2, [sp, #20] │ │ mov r0, sp │ │ - bl 73024 │ │ + bl 730d8 │ │ ldr r0, [sp, #0] │ │ lsls r0, r0, #31 │ │ - beq.n 72a3c │ │ + beq.n 72af0 │ │ ldrd r0, r1, [sp, #8] │ │ orrs.w r2, r0, r1 │ │ - beq.w 72c30 │ │ + beq.w 72ce4 │ │ eor.w r0, r0, #1 │ │ orrs r0, r1 │ │ - bne.n 72a3c │ │ + bne.n 72af0 │ │ ldr r0, [r4, #16] │ │ cmp r0, #0 │ │ - beq.n 7292c │ │ - ldr r1, [pc, #816] @ (72cc0 ) │ │ + beq.n 729e0 │ │ + ldr r1, [pc, #816] @ (72d74 ) │ │ movs r2, #4 │ │ add r1, pc │ │ - b.n 72c3e │ │ + b.n 72cf2 │ │ ldr r0, [r4, #16] │ │ cmp r0, #0 │ │ - beq.n 7292c │ │ - ldr r1, [pc, #792] @ (72cb4 ) │ │ + beq.n 729e0 │ │ + ldr r1, [pc, #792] @ (72d68 ) │ │ add r1, pc │ │ - b.n 72be2 │ │ + b.n 72c96 │ │ cmp r2, r3 │ │ - bcs.n 729b6 │ │ + bcs.n 72a6a │ │ ldrb r0, [r0, r2] │ │ cmp r0, #101 @ 0x65 │ │ - bne.n 729b6 │ │ + bne.n 72a6a │ │ adds r0, r1, #2 │ │ str r0, [r4, #8] │ │ mov r0, r4 │ │ - bl 7325c │ │ - b.n 72926 │ │ + bl 73310 │ │ + b.n 729da │ │ cmp.w r8, #0 │ │ - bne.n 729d2 │ │ + bne.n 72a86 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 729d2 │ │ - ldr r1, [pc, #780] @ (72cd0 ) │ │ + cbz r0, 72a86 │ │ + ldr r1, [pc, #780] @ (72d84 ) │ │ movs r2, #1 │ │ movs r6, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.w 72b2e │ │ + bne.w 72be2 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 729e8 │ │ - ldr r1, [pc, #764] @ (72cd4 ) │ │ + cbz r0, 72a9c │ │ + ldr r1, [pc, #764] @ (72d88 ) │ │ movs r2, #1 │ │ movs r6, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.w 72b2e │ │ + bne.w 72be2 │ │ cmp.w r9, #82 @ 0x52 │ │ itt ne │ │ ldrne r0, [r4, #16] │ │ cmpne r0, #0 │ │ - bne.w 72c1e │ │ + bne.w 72cd2 │ │ mov r0, r4 │ │ movs r1, #1 │ │ movs r6, #1 │ │ - bl 7284c │ │ - b.n 72bca │ │ + bl 72900 │ │ + b.n 72c7e │ │ add r0, sp, #16 │ │ mov r1, r4 │ │ - bl 72fa0 │ │ + bl 73054 │ │ ldr r1, [sp, #16] │ │ cmp r1, #0 │ │ - beq.w 72bf2 │ │ + beq.w 72ca6 │ │ ldr r2, [sp, #20] │ │ mov r0, sp │ │ - bl 73024 │ │ + bl 730d8 │ │ ldr r0, [sp, #0] │ │ lsls r0, r0, #31 │ │ - beq.n 72a3c │ │ + beq.n 72af0 │ │ ldr r0, [sp, #12] │ │ - cbnz r0, 72a3c │ │ + cbnz r0, 72af0 │ │ ldr r1, [sp, #8] │ │ movw r2, #2048 @ 0x800 │ │ movt r2, #65519 @ 0xffef │ │ eor.w r0, r1, #55296 @ 0xd800 │ │ sub.w r0, r0, #1114112 @ 0x110000 │ │ cmp r0, r2 │ │ - bcs.w 72c44 │ │ + bcs.w 72cf8 │ │ ldr r0, [r4, #16] │ │ cmp r0, #0 │ │ - beq.n 72b0c │ │ - ldr r1, [pc, #620] @ (72cb0 ) │ │ + beq.n 72bc0 │ │ + ldr r1, [pc, #620] @ (72d64 ) │ │ movs r2, #16 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - beq.n 72b0c │ │ + beq.n 72bc0 │ │ movs r6, #1 │ │ - b.n 72b2e │ │ + b.n 72be2 │ │ cmp.w r8, #0 │ │ - bne.n 72a6e │ │ + bne.n 72b22 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 72a6e │ │ - ldr r1, [pc, #652] @ (72cec ) │ │ + cbz r0, 72b22 │ │ + ldr r1, [pc, #652] @ (72da0 ) │ │ movs r2, #1 │ │ movs r6, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 72b2e │ │ + bne.n 72be2 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 72a82 │ │ - ldr r1, [pc, #636] @ (72cf0 ) │ │ + cbz r0, 72b36 │ │ + ldr r1, [pc, #636] @ (72da4 ) │ │ movs r2, #1 │ │ movs r6, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 72b2e │ │ + bne.n 72be2 │ │ mov r0, r4 │ │ - bl 73510 │ │ + bl 735c4 │ │ lsls r0, r0, #31 │ │ - bne.n 72a50 │ │ + bne.n 72b04 │ │ cmp r1, #1 │ │ - bne.n 72aa8 │ │ + bne.n 72b5c │ │ ldr r0, [r4, #16] │ │ cmp r0, #0 │ │ - beq.w 7292c │ │ - ldr r1, [pc, #600] @ (72cf4 ) │ │ + beq.w 729e0 │ │ + ldr r1, [pc, #600] @ (72da8 ) │ │ movs r2, #1 │ │ movs r6, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 72b2e │ │ + bne.n 72be2 │ │ ldr r0, [r4, #16] │ │ cmp r0, #0 │ │ - beq.w 7292c │ │ - ldr r1, [pc, #580] @ (72cf8 ) │ │ + beq.w 729e0 │ │ + ldr r1, [pc, #580] @ (72dac ) │ │ add r1, pc │ │ - b.n 72bc2 │ │ + b.n 72c76 │ │ cmp.w r8, #0 │ │ - bne.n 72ace │ │ + bne.n 72b82 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 72ace │ │ - ldr r1, [pc, #568] @ (72cfc ) │ │ + cbz r0, 72b82 │ │ + ldr r1, [pc, #568] @ (72db0 ) │ │ movs r2, #1 │ │ movs r6, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ - cbnz r0, 72b2e │ │ + bl 402dc │ │ + cbnz r0, 72be2 │ │ mov r0, r4 │ │ movs r1, #1 │ │ movs r6, #1 │ │ - bl 71920 │ │ - cbnz r0, 72b2e │ │ + bl 719d4 │ │ + cbnz r0, 72be2 │ │ ldr r0, [r4, #0] │ │ - cbz r0, 72b14 │ │ + cbz r0, 72bc8 │ │ ldrd r2, r1, [r4, #4] │ │ cmp r1, r2 │ │ - bcs.n 72afc │ │ + bcs.n 72bb0 │ │ ldrb r0, [r0, r1] │ │ adds r1, #1 │ │ str r1, [r4, #8] │ │ cmp r0, #83 @ 0x53 │ │ - beq.w 72c7a │ │ + beq.w 72d2e │ │ cmp r0, #84 @ 0x54 │ │ - beq.w 72c4c │ │ + beq.w 72d00 │ │ cmp r0, #85 @ 0x55 │ │ - beq.n 72bce │ │ + beq.n 72c82 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 72b0c │ │ - ldr r1, [pc, #508] @ (72d00 ) │ │ + cbz r0, 72bc0 │ │ + ldr r1, [pc, #508] @ (72db4 ) │ │ movs r2, #16 │ │ add r1, pc │ │ - bl 3ffd4 │ │ - cbnz r0, 72b2e │ │ + bl 402dc │ │ + cbnz r0, 72be2 │ │ movs r6, #0 │ │ strb r6, [r4, #4] │ │ str r6, [r4, #0] │ │ - b.n 72b2e │ │ + b.n 72be2 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 72b2c │ │ - ldr r1, [pc, #400] @ (72cac ) │ │ + cbz r0, 72be0 │ │ + ldr r1, [pc, #400] @ (72d60 ) │ │ movs r2, #1 │ │ add r1, pc │ │ add sp, #24 │ │ ldmia.w sp!, {r8, r9, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 3ffd4 │ │ + b.w 402dc │ │ movs r6, #0 │ │ mov r0, r6 │ │ add sp, #24 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ cmp.w r8, #0 │ │ - bne.n 72b52 │ │ + bne.n 72c06 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 72b52 │ │ - ldr r1, [pc, #388] @ (72cc8 ) │ │ + cbz r0, 72c06 │ │ + ldr r1, [pc, #388] @ (72d7c ) │ │ movs r2, #1 │ │ movs r6, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 72b2e │ │ + bne.n 72be2 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 72b66 │ │ - ldr r1, [pc, #372] @ (72ccc ) │ │ + cbz r0, 72c1a │ │ + ldr r1, [pc, #372] @ (72d80 ) │ │ movs r2, #1 │ │ movs r6, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 72b2e │ │ + bne.n 72be2 │ │ mov r0, r4 │ │ - bl 7325c │ │ + bl 73310 │ │ cmp r0, #0 │ │ - bne.w 72a50 │ │ - b.n 72bce │ │ - ldr r1, [pc, #972] @ (72f44 ) │ │ - vtbl.8 d20, {d26-d27}, d31 │ │ + bne.w 72b04 │ │ + b.n 72c82 │ │ + ldr r1, [pc, #248] @ (72d24 ) │ │ + @ instruction: 0xfffa48fa │ │ vsra.u64 d31, d24, #6 │ │ lsrs r0, r0, #28 │ │ - bne.n 72b96 │ │ + bne.n 72c4a │ │ ldr r0, [r4, #16] │ │ - cbz r0, 72b96 │ │ - ldr r1, [pc, #340] @ (72cdc ) │ │ + cbz r0, 72c4a │ │ + ldr r1, [pc, #340] @ (72d90 ) │ │ movs r2, #1 │ │ movs r6, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 72b2e │ │ + bne.n 72be2 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 72baa │ │ - ldr r1, [pc, #324] @ (72ce0 ) │ │ + cbz r0, 72c5e │ │ + ldr r1, [pc, #324] @ (72d94 ) │ │ movs r2, #1 │ │ movs r6, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 72b2e │ │ + bne.n 72be2 │ │ mov r0, r4 │ │ - bl 734b0 │ │ + bl 73564 │ │ cmp r0, #0 │ │ - bne.w 72a50 │ │ + bne.w 72b04 │ │ ldr r0, [r4, #16] │ │ cmp r0, #0 │ │ - beq.w 7292c │ │ - ldr r1, [pc, #292] @ (72ce4 ) │ │ + beq.w 729e0 │ │ + ldr r1, [pc, #292] @ (72d98 ) │ │ add r1, pc │ │ movs r6, #1 │ │ movs r2, #1 │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 72b2e │ │ + bne.n 72be2 │ │ cmp.w r8, #0 │ │ - bne.w 7292c │ │ + bne.w 729e0 │ │ ldr r0, [r4, #16] │ │ cmp r0, #0 │ │ - beq.w 7292c │ │ - ldr r1, [pc, #264] @ (72ce8 ) │ │ + beq.w 729e0 │ │ + ldr r1, [pc, #264] @ (72d9c ) │ │ add r1, pc │ │ movs r2, #1 │ │ movs r6, #1 │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - beq.w 7292c │ │ - b.n 72b2e │ │ + beq.w 729e0 │ │ + b.n 72be2 │ │ ldr r0, [r4, #16] │ │ ldrb.w r5, [sp, #20] │ │ - cbz r0, 72c1a │ │ - ldr r2, [pc, #188] @ (72cb8 ) │ │ + cbz r0, 72cce │ │ + ldr r2, [pc, #188] @ (72d6c ) │ │ cmp r5, #0 │ │ - ldr r1, [pc, #188] @ (72cbc ) │ │ + ldr r1, [pc, #188] @ (72d70 ) │ │ add r2, pc │ │ add r1, pc │ │ it eq │ │ moveq r1, r2 │ │ mov.w r2, #16 │ │ it ne │ │ movne r2, #25 │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.w 72a50 │ │ + bne.w 72b04 │ │ strb r5, [r4, #4] │ │ - b.n 72898 │ │ - ldr r1, [pc, #184] @ (72cd8 ) │ │ + b.n 7294c │ │ + ldr r1, [pc, #184] @ (72d8c ) │ │ movs r2, #4 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - beq.w 729f6 │ │ - b.n 72a50 │ │ + beq.w 72aaa │ │ + b.n 72b04 │ │ ldr r0, [r4, #16] │ │ cmp r0, #0 │ │ - beq.w 7292c │ │ - ldr r1, [pc, #136] @ (72cc4 ) │ │ + beq.w 729e0 │ │ + ldr r1, [pc, #136] @ (72d78 ) │ │ movs r2, #5 │ │ add r1, pc │ │ - bl 3ffd4 │ │ - b.n 72926 │ │ + bl 402dc │ │ + b.n 729da │ │ ldr r0, [r4, #16] │ │ - bl 7311c │ │ - b.n 72926 │ │ + bl 731d0 │ │ + b.n 729da │ │ ldr r0, [r4, #16] │ │ - cbz r0, 72c60 │ │ - ldr r1, [pc, #176] @ (72d04 ) │ │ + cbz r0, 72d14 │ │ + ldr r1, [pc, #176] @ (72db8 ) │ │ movs r2, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.w 72b2e │ │ + bne.w 72be2 │ │ mov r0, r4 │ │ - bl 734b0 │ │ + bl 73564 │ │ cmp r0, #0 │ │ - bne.w 72b2e │ │ + bne.w 72be2 │ │ ldr r0, [r4, #16] │ │ cmp r0, #0 │ │ - beq.w 7292c │ │ - ldr r1, [pc, #144] @ (72d08 ) │ │ + beq.w 729e0 │ │ + ldr r1, [pc, #144] @ (72dbc ) │ │ add r1, pc │ │ - b.n 72bc4 │ │ + b.n 72c78 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 72c8e │ │ - ldr r1, [pc, #140] @ (72d0c ) │ │ + cbz r0, 72d42 │ │ + ldr r1, [pc, #140] @ (72dc0 ) │ │ movs r2, #3 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.w 72b2e │ │ + bne.w 72be2 │ │ mov r0, r4 │ │ - bl 73574 │ │ + bl 73628 │ │ cmp r0, #0 │ │ - bne.w 72b2e │ │ + bne.w 72be2 │ │ ldr r0, [r4, #16] │ │ cmp r0, #0 │ │ - beq.w 7292c │ │ - ldr r1, [pc, #108] @ (72d10 ) │ │ + beq.w 729e0 │ │ + ldr r1, [pc, #108] @ (72dc4 ) │ │ movs r2, #2 │ │ add r1, pc │ │ - b.n 72bc6 │ │ + b.n 72c7a │ │ nop │ │ - bx pc │ │ - vcvt.u32.f32 d31, d6, #6 │ │ - @ instruction: 0xfff948d9 │ │ - vcvt.u16.f16 , q6, #6 │ │ - vqshlu.s32 q10, , #25 │ │ - vtbl.8 d19, {d26}, d28 │ │ + mov fp, r8 │ │ + vqrdmlah.s , q5, d18[0] │ │ + vtbl.8 d20, {d9}, d20 │ │ + vmull.u , d26, d24 │ │ + vcle.f32 q10, q2, #0 │ │ + vqshl.u64 , q12, #58 @ 0x3a │ │ + vsli.64 q10, q2, #58 @ 0x3a │ │ + vrintm.f32 q10, │ │ + vqshlu.s64 d20, d7, #58 @ 0x3a │ │ + vtbx.8 d20, {d10}, d15 │ │ + vqshrun.s64 d20, , #6 │ │ + vrinta.f32 , q5 │ │ vrintm.f32 d20, d9 │ │ - vrintp.f32 d20, d2 │ │ + vrint?.f32 d20, d20 │ │ + vrint?.f32 d20, d5 │ │ + vrint?.f32 d20, d14 │ │ + vqshl.u64 d20, d17, #58 @ 0x3a │ │ + vrintp.f32 d20, d4 │ │ + vqshl.u32 q10, , #26 │ │ vrint?.f32 q10, q6 │ │ - vtbl.8 d20, {d10-d11}, d4 │ │ - vtbx.8 d20, {d26}, d10 │ │ - vsli.64 , q15, #58 @ 0x3a │ │ - vqshl.u32 d20, d30, #26 │ │ - vqshlu.s64 q10, , #58 @ 0x3a │ │ - vqshlu.s64 d20, d26, #58 @ 0x3a │ │ - vrintm.f32 q10, │ │ - vtbx.8 d20, {d10}, d22 │ │ - vqshrun.s64 d20, , #6 │ │ - vqshrun.s64 d20, q2, #6 │ │ - vtbl.8 d20, {d10}, d1 │ │ - vtbl.8 d20, {d10}, d4 │ │ - vcvt.f32.u32 , q4, #6 │ │ - vqshlu.s32 q10, , #25 │ │ - vqshlu.s32 d20, d29, #26 │ │ - vrint?.f32 q10, │ │ - vrint?.f32 d20, d24 │ │ + vrint?.f32 q10, │ │ + @ instruction: 0xfffafda4 │ │ + vcle.f32 d20, d24, #0 │ │ + vrintz.f32 d20, d8 │ │ + vsli.64 d20, d4, #58 @ 0x3a │ │ + vsli.32 q10, , #26 │ │ vsli.64 , q8, #58 @ 0x3a │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #32 │ │ ldr.w r9, [r0, #16] │ │ cmp.w r9, #0 │ │ - beq.n 72d66 │ │ - ldr r1, [pc, #180] @ (72de0 ) │ │ + beq.n 72e1a │ │ + ldr r1, [pc, #180] @ (72e94 ) │ │ mov r4, r2 │ │ mov r6, r0 │ │ mov r0, r9 │ │ add r1, pc │ │ movs r2, #1 │ │ mov r8, r3 │ │ movs r5, #1 │ │ - bl 3ffd4 │ │ - cbnz r0, 72d68 │ │ + bl 402dc │ │ + cbnz r0, 72e1c │ │ orrs.w r0, r4, r8 │ │ - beq.n 72d72 │ │ + beq.n 72e26 │ │ ldr r0, [r6, #20] │ │ movs r1, #0 │ │ subs r2, r0, r4 │ │ sbcs.w r2, r1, r8 │ │ - bcs.n 72d88 │ │ - ldr r1, [pc, #148] @ (72de8 ) │ │ + bcs.n 72e3c │ │ + ldr r1, [pc, #148] @ (72e9c ) │ │ mov r0, r9 │ │ movs r2, #16 │ │ add r1, pc │ │ - bl 3ffd4 │ │ - cbnz r0, 72d68 │ │ + bl 402dc │ │ + cbnz r0, 72e1c │ │ movs r5, #0 │ │ strb r5, [r6, #4] │ │ str r5, [r6, #0] │ │ - b.n 72d68 │ │ + b.n 72e1c │ │ movs r5, #0 │ │ mov r0, r5 │ │ add sp, #32 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r1, [pc, #120] @ (72dec ) │ │ + ldr r1, [pc, #120] @ (72ea0 ) │ │ mov r0, r9 │ │ movs r2, #1 │ │ add r1, pc │ │ add sp, #32 │ │ ldmia.w sp!, {r8, r9, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 3ffd4 │ │ + b.w 402dc │ │ subs r4, r0, r4 │ │ sbc.w r6, r1, r8 │ │ subs.w r0, r4, #26 │ │ sbcs.w r0, r6, #0 │ │ - bcs.n 72da8 │ │ + bcs.n 72e5c │ │ add.w r0, r4, #97 @ 0x61 │ │ str r0, [sp, #12] │ │ add r0, sp, #12 │ │ mov r1, r9 │ │ - bl 40138 │ │ - b.n 72dda │ │ - ldr r1, [pc, #56] @ (72de4 ) │ │ + bl 40440 │ │ + b.n 72e8e │ │ + ldr r1, [pc, #56] @ (72e98 ) │ │ mov r0, r9 │ │ movs r2, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 72d68 │ │ + bne.n 72e1c │ │ add r5, sp, #12 │ │ mov r0, r4 │ │ mov r1, r6 │ │ mov r2, r5 │ │ - bl 40534 │ │ + bl 4083c │ │ rsb r1, r0, #20 │ │ add r0, r5 │ │ movs r2, #1 │ │ movs r3, #0 │ │ strd r0, r1, [sp] │ │ mov r0, r9 │ │ movs r1, #1 │ │ - bl 3f0a0 │ │ + bl 3f3a8 │ │ mov r5, r0 │ │ - b.n 72d68 │ │ + b.n 72e1c │ │ nop │ │ - cmp ip, ip │ │ - vrintx.f32 q10, │ │ - vdup.16 d31, d6[2] │ │ - vsri.64 q10, , #7 │ │ + cmp r7, r5 │ │ + vsri.32 d20, d2, #6 │ │ + @ instruction: 0xfffafb52 │ │ + vcgt.f32 q10, q4, #0 │ │ vsli.64 , q8, #58 @ 0x3a │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #48 @ 0x30 │ │ mov r5, r0 │ │ ldr r0, [r0, #0] │ │ - cbz r0, 72e4c │ │ + cbz r0, 72f00 │ │ add.w r9, sp, #28 │ │ mov r8, r1 │ │ mov r1, r5 │ │ mov r0, r9 │ │ - bl 72fa0 │ │ + bl 73054 │ │ ldr r4, [sp, #28] │ │ - cbz r4, 72e66 │ │ + cbz r4, 72f1a │ │ ldr r6, [sp, #32] │ │ add r0, sp, #8 │ │ mov r1, r4 │ │ mov r2, r6 │ │ - bl 73024 │ │ + bl 730d8 │ │ ldr r0, [sp, #8] │ │ lsls r0, r0, #31 │ │ - beq.n 72e92 │ │ + beq.n 72f46 │ │ ldr r5, [r5, #16] │ │ cmp r5, #0 │ │ - beq.n 72ed0 │ │ + beq.n 72f84 │ │ ldrd r0, r1, [sp, #16] │ │ mov r2, r9 │ │ - bl 40534 │ │ + bl 4083c │ │ rsb r1, r0, #20 │ │ add r0, r9 │ │ movs r2, #1 │ │ movs r3, #0 │ │ strd r0, r1, [sp] │ │ mov r0, r5 │ │ movs r1, #1 │ │ - bl 3f0a0 │ │ - b.n 72eae │ │ + bl 3f3a8 │ │ + b.n 72f62 │ │ ldr r0, [r5, #16] │ │ cmp r0, #0 │ │ - beq.n 72ed0 │ │ - ldr r1, [pc, #144] @ (72ee4 ) │ │ + beq.n 72f84 │ │ + ldr r1, [pc, #144] @ (72f98 ) │ │ movs r2, #1 │ │ add r1, pc │ │ add sp, #48 @ 0x30 │ │ ldmia.w sp!, {r8, r9, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 3ffd4 │ │ + b.w 402dc │ │ ldr r0, [r5, #16] │ │ ldrb.w r4, [sp, #32] │ │ - cbz r0, 72e8a │ │ - ldr r2, [pc, #120] @ (72ee8 ) │ │ + cbz r0, 72f3e │ │ + ldr r2, [pc, #120] @ (72f9c ) │ │ cmp r4, #0 │ │ - ldr r1, [pc, #120] @ (72eec ) │ │ + ldr r1, [pc, #120] @ (72fa0 ) │ │ add r2, pc │ │ add r1, pc │ │ it eq │ │ moveq r1, r2 │ │ mov.w r2, #16 │ │ it ne │ │ movne r2, #25 │ │ - bl 3ffd4 │ │ - cbnz r0, 72eb0 │ │ + bl 402dc │ │ + cbnz r0, 72f64 │ │ movs r0, #0 │ │ strb r4, [r5, #4] │ │ str r0, [r5, #0] │ │ - b.n 72ed2 │ │ + b.n 72f86 │ │ ldr r5, [r5, #16] │ │ - cbz r5, 72ed0 │ │ - ldr r1, [pc, #88] @ (72ef0 ) │ │ + cbz r5, 72f84 │ │ + ldr r1, [pc, #88] @ (72fa4 ) │ │ mov r0, r5 │ │ movs r2, #2 │ │ add r1, pc │ │ - bl 3ffd4 │ │ - cbnz r0, 72eb0 │ │ + bl 402dc │ │ + cbnz r0, 72f64 │ │ mov r0, r5 │ │ mov r1, r4 │ │ mov r2, r6 │ │ - bl 3ffd4 │ │ - cbz r0, 72eb4 │ │ + bl 402dc │ │ + cbz r0, 72f68 │ │ movs r0, #1 │ │ - b.n 72ed2 │ │ + b.n 72f86 │ │ ldrb r0, [r5, #10] │ │ lsls r0, r0, #24 │ │ - bmi.n 72ed0 │ │ + bmi.n 72f84 │ │ mov r0, r8 │ │ - bl 73ab4 │ │ - cbz r0, 72eda │ │ + bl 73b68 │ │ + cbz r0, 72f8e │ │ mov r3, r0 │ │ mov r2, r1 │ │ mov r0, r5 │ │ mov r1, r3 │ │ - bl 3ffd4 │ │ - b.n 72ed2 │ │ + bl 402dc │ │ + b.n 72f86 │ │ movs r0, #0 │ │ add sp, #48 @ 0x30 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #24] @ (72ef4 ) │ │ + ldr r0, [pc, #24] @ (72fa8 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ nop │ │ - add r6, r7 │ │ - vtbx.8 d31, {d26-d28}, d24 │ │ - vcgt.f32 d20, d5, #0 │ │ - vsri.32 d20, d25, #6 │ │ - vrintm.f32 d24, d8 │ │ + bics r1, r1 │ │ + vshll.u32 , d20, #26 │ │ + vrsra.u32 q10, q0, #7 │ │ + sha1su1.32 q10, q2 │ │ + vrintz.f32 q12, q10 │ │ movs r6, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #32 │ │ mov r4, r0 │ │ ldr r0, [r0, #0] │ │ - cbz r0, 72f44 │ │ + cbz r0, 72ff8 │ │ mov r5, sp │ │ mov r8, r1 │ │ mov r0, r5 │ │ mov r1, r4 │ │ - bl 73a50 │ │ + bl 73b04 │ │ ldr r0, [sp, #0] │ │ - cbz r0, 72f5c │ │ + cbz r0, 73010 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 72f8a │ │ + cbz r0, 7303e │ │ mov ip, r4 │ │ add.w r9, sp, #16 │ │ ldmia.w ip, {r0, r2, r3, r6} │ │ mov r1, r9 │ │ stmia r1!, {r0, r2, r3, r6} │ │ mov r0, r4 │ │ ldmia.w r5, {r1, r2, r3, r6} │ │ stmia r0!, {r1, r2, r3, r6} │ │ and.w r1, r8, #1 │ │ mov r0, r4 │ │ - bl 7284c │ │ + bl 72900 │ │ ldmia.w r9, {r1, r2, r3, r6} │ │ stmia r4!, {r1, r2, r3, r6} │ │ - b.n 72f8c │ │ + b.n 73040 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 72f8a │ │ - ldr r1, [pc, #72] @ (72f94 ) │ │ + cbz r0, 7303e │ │ + ldr r1, [pc, #72] @ (73048 ) │ │ movs r2, #1 │ │ add r1, pc │ │ add sp, #32 │ │ ldmia.w sp!, {r8, r9, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 3ffd4 │ │ + b.w 402dc │ │ ldr r0, [r4, #16] │ │ - cbz r0, 72f84 │ │ + cbz r0, 73038 │ │ ldrb.w r2, [sp, #4] │ │ - ldr r3, [pc, #48] @ (72f98 ) │ │ - ldr r1, [pc, #52] @ (72f9c ) │ │ + ldr r3, [pc, #48] @ (7304c ) │ │ + ldr r1, [pc, #52] @ (73050 ) │ │ cmp r2, #0 │ │ mov.w r2, #16 │ │ add r3, pc │ │ add r1, pc │ │ it eq │ │ moveq r1, r3 │ │ it ne │ │ movne r2, #25 │ │ - bl 3ffd4 │ │ - cbz r0, 72f84 │ │ + bl 402dc │ │ + cbz r0, 73038 │ │ movs r0, #1 │ │ - b.n 72f8c │ │ + b.n 73040 │ │ ldmia.w r5, {r0, r1, r2, r3} │ │ stmia r4!, {r0, r1, r2, r3} │ │ movs r0, #0 │ │ add sp, #32 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - muls r0, r1 │ │ - vtbx.8 d31, {d26-d27}, d30 │ │ - vabs.s32 d20, d11 │ │ + cmp r3, r2 │ │ + vqshrn.u64 d31, q13, #6 │ │ + vrshr.u32 q10, q3, #7 │ │ vsli.64 , q8, #58 @ 0x3a │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #8 │ │ mov lr, r1 │ │ mov ip, r0 │ │ ldr.w r2, [lr, #8] │ │ ldrd r0, r1, [r1] │ │ mov r8, r1 │ │ cmp r2, r1 │ │ mov r6, r2 │ │ it hi │ │ movhi r8, r2 │ │ cmp r8, r6 │ │ - beq.n 72ff4 │ │ + beq.n 730a8 │ │ ldrb r5, [r0, r6] │ │ mov r3, r6 │ │ adds r6, #1 │ │ str.w r6, [lr, #8] │ │ sub.w r4, r5, #48 @ 0x30 │ │ sub.w r9, r5, #97 @ 0x61 │ │ cmp r4, #10 │ │ it cs │ │ cmpcs.w r9, #6 │ │ - bcc.n 72fc0 │ │ + bcc.n 73074 │ │ cmp r5, #95 @ 0x5f │ │ - bne.n 72ff4 │ │ - cbz r2, 73002 │ │ + bne.n 730a8 │ │ + cbz r2, 730b6 │ │ cmp r2, r1 │ │ - bcs.n 73000 │ │ + bcs.n 730b4 │ │ ldrsb r6, [r0, r2] │ │ cmn.w r6, #64 @ 0x40 │ │ - bge.n 73002 │ │ - b.n 73016 │ │ + bge.n 730b6 │ │ + b.n 730ca │ │ movs r0, #0 │ │ str.w r0, [ip] │ │ strb.w r0, [ip, #4] │ │ - b.n 7300e │ │ - bne.n 73016 │ │ + b.n 730c2 │ │ + bne.n 730ca │ │ cmp r3, r1 │ │ - bhi.n 73016 │ │ + bhi.n 730ca │ │ subs r1, r3, r2 │ │ add r0, r2 │ │ strd r0, r1, [ip] │ │ add sp, #8 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r4, [pc, #8] @ (73020 ) │ │ + ldr r4, [pc, #8] @ (730d4 ) │ │ add r4, pc │ │ str r4, [sp, #0] │ │ - bl 3fd1c │ │ - strh r4, [r7, #38] @ 0x26 │ │ + bl 40024 │ │ + strh r0, [r3, #34] @ 0x22 │ │ movs r6, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #88 @ 0x58 │ │ - ldr r3, [pc, #228] @ (73114 ) │ │ + ldr r3, [pc, #228] @ (731c8 ) │ │ add r4, sp, #8 │ │ mov r8, r0 │ │ movs r0, #1 │ │ add r3, pc │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ mov r6, r2 │ │ mov r9, r1 │ │ - bl 41018 │ │ + bl 41320 │ │ add r5, sp, #76 @ 0x4c │ │ mov r0, r5 │ │ mov r1, r4 │ │ - bl 71670 │ │ + bl 71724 │ │ ldr r0, [sp, #76] @ 0x4c │ │ cmp r0, #0 │ │ - beq.n 73046 │ │ + beq.n 730fa │ │ cmp r0, #1 │ │ ite ne │ │ movne r1, r6 │ │ ldreq r1, [sp, #80] @ 0x50 │ │ subs r0, r6, r1 │ │ cmp r0, #16 │ │ - bls.n 73068 │ │ + bls.n 7311c │ │ movs r0, #0 │ │ movs r1, #0 │ │ - b.n 730fe │ │ + b.n 731b2 │ │ cmp r6, r1 │ │ - bne.n 73072 │ │ + bne.n 73126 │ │ movs r2, #0 │ │ movs r1, #0 │ │ - b.n 730f6 │ │ + b.n 731aa │ │ add.w r3, r9, r1 │ │ add.w ip, r9, r6 │ │ movs r4, #0 │ │ movs r1, #0 │ │ mov r6, r3 │ │ ldrsb.w r2, [r6], #1 │ │ cmp.w r2, #4294967295 @ 0xffffffff │ │ uxtb r5, r2 │ │ - bgt.n 730cc │ │ + bgt.n 73180 │ │ ldrb r6, [r3, #1] │ │ and.w r2, r5, #31 │ │ cmp r5, #224 @ 0xe0 │ │ and.w r6, r6, #63 @ 0x3f │ │ - bcc.n 730be │ │ + bcc.n 73172 │ │ ldrb r0, [r3, #2] │ │ cmp r5, #240 @ 0xf0 │ │ and.w r0, r0, #63 @ 0x3f │ │ orr.w r6, r0, r6, lsl #6 │ │ - bcc.n 730c6 │ │ + bcc.n 7317a │ │ ldrb r0, [r3, #3] │ │ and.w r2, r2, #7 │ │ and.w r0, r0, #63 @ 0x3f │ │ orr.w r0, r0, r6, lsl #6 │ │ adds r6, r3, #4 │ │ orr.w r5, r0, r2, lsl #18 │ │ - b.n 730cc │ │ + b.n 73180 │ │ orr.w r5, r6, r2, lsl #6 │ │ adds r6, r3, #2 │ │ - b.n 730cc │ │ + b.n 73180 │ │ orr.w r5, r6, r2, lsl #12 │ │ adds r6, r3, #3 │ │ sub.w r0, r5, #65 @ 0x41 │ │ sub.w r2, r5, #48 @ 0x30 │ │ cmp r5, #57 @ 0x39 │ │ bic.w r0, r0, #32 │ │ it hi │ │ addhi.w r2, r0, #10 │ │ cmp r2, #16 │ │ - bcs.n 7310a │ │ + bcs.n 731be │ │ orr.w r2, r2, r4, lsl #4 │ │ lsls r0, r1, #4 │ │ orr.w r1, r0, r4, lsr #28 │ │ mov r3, r6 │ │ mov r4, r2 │ │ cmp r6, ip │ │ - bne.n 73080 │ │ + bne.n 73134 │ │ strd r2, r1, [r8, #8] │ │ movs r1, #0 │ │ movs r0, #1 │ │ strd r0, r1, [r8] │ │ add sp, #88 @ 0x58 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #12] @ (73118 ) │ │ + ldr r0, [pc, #12] @ (731cc ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ nop │ │ - tst r4, r2 │ │ - sha1su1.32 q12, q12 │ │ + adcs r7, r3 │ │ + vshll.i32 q12, d4, #32 │ │ movs r6, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #36 @ 0x24 │ │ - cbz r0, 7313c │ │ + cbz r0, 731f0 │ │ mov r6, r1 │ │ mov r4, r0 │ │ ldrd r0, r1, [r0] │ │ ldr r2, [r1, #16] │ │ movs r1, #39 @ 0x27 │ │ blx r2 │ │ - cbz r0, 73146 │ │ + cbz r0, 731fa │ │ movs r0, #1 │ │ - b.n 7313e │ │ + b.n 731f2 │ │ movs r0, #0 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r8, sp │ │ add.w r9, r8, #2 │ │ add r5, sp, #16 │ │ cmp r6, #34 @ 0x22 │ │ - beq.n 7316e │ │ + beq.n 73222 │ │ cmp.w r6, #1114112 @ 0x110000 │ │ - beq.n 73246 │ │ + beq.n 732fa │ │ cmp r6, #12 │ │ - bgt.n 73182 │ │ - cbz r6, 73196 │ │ + bgt.n 73236 │ │ + cbz r6, 7324a │ │ cmp r6, #9 │ │ - beq.n 731c6 │ │ + beq.n 7327a │ │ cmp r6, #10 │ │ - bne.n 731a6 │ │ + bne.n 7325a │ │ movs r6, #0 │ │ movw r0, #28252 @ 0x6e5c │ │ - b.n 731d4 │ │ + b.n 73288 │ │ ldrd r0, r1, [r4] │ │ ldr r2, [r1, #16] │ │ movs r1, #34 @ 0x22 │ │ blx r2 │ │ mov.w r6, #1114112 @ 0x110000 │ │ cmp r0, #0 │ │ - bne.n 73138 │ │ - b.n 7314e │ │ + bne.n 731ec │ │ + b.n 73202 │ │ cmp r6, #13 │ │ - beq.n 7319e │ │ + beq.n 73252 │ │ cmp r6, #39 @ 0x27 │ │ - beq.n 731ce │ │ + beq.n 73282 │ │ cmp r6, #92 @ 0x5c │ │ - bne.n 731a6 │ │ + bne.n 7325a │ │ movs r6, #0 │ │ movw r0, #23644 @ 0x5c5c │ │ - b.n 731d4 │ │ + b.n 73288 │ │ movs r6, #0 │ │ movw r0, #12380 @ 0x305c │ │ - b.n 731d4 │ │ + b.n 73288 │ │ movs r6, #0 │ │ movw r0, #29276 @ 0x725c │ │ - b.n 731d4 │ │ + b.n 73288 │ │ lsrs r0, r6, #8 │ │ cmp r0, #2 │ │ - bls.n 731b4 │ │ + bls.n 73268 │ │ mov r0, r6 │ │ - bl 3f8c8 │ │ - cbnz r0, 73218 │ │ + bl 3fbd0 │ │ + cbnz r0, 732cc │ │ mov r0, r6 │ │ - bl 3f63c │ │ - cbz r0, 73218 │ │ + bl 3f944 │ │ + cbz r0, 732cc │ │ str r6, [sp, #0] │ │ movs r6, #128 @ 0x80 │ │ mov.w sl, #129 @ 0x81 │ │ - b.n 731e4 │ │ + b.n 73298 │ │ movs r6, #0 │ │ movw r0, #29788 @ 0x745c │ │ - b.n 731d4 │ │ + b.n 73288 │ │ movs r6, #0 │ │ movw r0, #10076 @ 0x275c │ │ str.w r6, [r9, #4] │ │ str.w r6, [r9] │ │ strh.w r0, [sp] │ │ mov.w sl, #2 │ │ mov r1, r8 │ │ @@ -112753,23 +112696,23 @@ │ │ cmp.w sl, #128 @ 0x80 │ │ it ls │ │ ldrbls r1, [r5, r6] │ │ ldrd r0, r2, [r4] │ │ ldr r2, [r2, #16] │ │ blx r2 │ │ cmp r0, #0 │ │ - bne.w 73138 │ │ + bne.w 731ec │ │ adds r6, #1 │ │ cmp sl, r6 │ │ - bne.n 731f4 │ │ + bne.n 732a8 │ │ mov.w r6, #1114112 @ 0x110000 │ │ - b.n 7314e │ │ + b.n 73202 │ │ mov r0, r5 │ │ mov r1, r6 │ │ - bl 738dc │ │ + bl 73990 │ │ mov r0, r5 │ │ mov r1, r8 │ │ ldmia r0!, {r2, r3} │ │ stmia r1!, {r2, r3} │ │ ldrh r0, [r0, #0] │ │ strh r0, [r1, #0] │ │ mov r1, r8 │ │ @@ -112777,105 +112720,105 @@ │ │ mov r0, r5 │ │ ldrb.w sl, [sp, #27] │ │ ldmia r1!, {r2, r3} │ │ cmp r6, sl │ │ stmia r0!, {r2, r3} │ │ ldrh r1, [r1, #0] │ │ strh r1, [r0, #0] │ │ - bcc.n 731f0 │ │ - b.n 73212 │ │ + bcc.n 732a4 │ │ + b.n 732c6 │ │ ldrd r0, r1, [r4] │ │ ldr r2, [r1, #16] │ │ movs r1, #39 @ 0x27 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ bx r2 │ │ - bmi.n 73206 │ │ + bmi.n 732ba │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #68 @ 0x44 │ │ mov r4, r0 │ │ ldr r0, [r0, #0] │ │ - cbz r0, 732ce │ │ + cbz r0, 73382 │ │ add r0, sp, #12 │ │ mov r1, r4 │ │ - bl 72fa0 │ │ + bl 73054 │ │ ldr r6, [sp, #12] │ │ - cbz r6, 732e6 │ │ + cbz r6, 7339a │ │ ldr r0, [sp, #16] │ │ lsls r1, r0, #31 │ │ - bne.n 732b8 │ │ + bne.n 7336c │ │ movs r1, #2 │ │ movw r8, #1 │ │ str r1, [sp, #28] │ │ movs r1, #0 │ │ str r1, [sp, #24] │ │ movw r1, #65534 @ 0xfffe │ │ movt r1, #32767 @ 0x7fff │ │ and.w r9, r0, r1 │ │ add.w sl, r6, r9 │ │ add r5, sp, #12 │ │ movt r8, #17 │ │ strd r6, r9, [sp, #12] │ │ str.w sl, [sp, #20] │ │ mov r0, r5 │ │ - bl 736b8 │ │ + bl 7376c │ │ cmp r0, r8 │ │ - beq.n 73312 │ │ + beq.n 733c6 │ │ cmp.w r0, #1114112 @ 0x110000 │ │ - bne.n 732a8 │ │ + bne.n 7335c │ │ ldr r0, [r4, #16] │ │ - cbz r0, 732c8 │ │ - ldr r1, [pc, #480] @ (734a0 ) │ │ + cbz r0, 7337c │ │ + ldr r1, [pc, #480] @ (73554 ) │ │ movs r2, #16 │ │ add r1, pc │ │ - bl 3ffd4 │ │ - cbnz r0, 73322 │ │ + bl 402dc │ │ + cbnz r0, 733d6 │ │ movs r0, #0 │ │ strb r0, [r4, #4] │ │ - b.n 7330e │ │ + b.n 733c2 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 73326 │ │ - ldr r1, [pc, #448] @ (73494 ) │ │ + cbz r0, 733da │ │ + ldr r1, [pc, #448] @ (73548 ) │ │ movs r2, #1 │ │ add r1, pc │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 3ffd4 │ │ + b.w 402dc │ │ ldr r0, [r4, #16] │ │ ldrb.w r5, [sp, #16] │ │ - cbz r0, 7330a │ │ - ldr r2, [pc, #424] @ (73498 ) │ │ + cbz r0, 733be │ │ + ldr r2, [pc, #424] @ (7354c ) │ │ cmp r5, #0 │ │ - ldr r1, [pc, #424] @ (7349c ) │ │ + ldr r1, [pc, #424] @ (73550 ) │ │ add r2, pc │ │ add r1, pc │ │ it eq │ │ moveq r1, r2 │ │ mov.w r2, #16 │ │ it ne │ │ movne r2, #25 │ │ - bl 3ffd4 │ │ - cbnz r0, 73322 │ │ + bl 402dc │ │ + cbnz r0, 733d6 │ │ strb r5, [r4, #4] │ │ movs r0, #0 │ │ str r0, [r4, #0] │ │ - b.n 73328 │ │ + b.n 733dc │ │ ldr r4, [r4, #16] │ │ - cbz r4, 73326 │ │ + cbz r4, 733da │ │ ldrd r0, r1, [r4] │ │ ldr r2, [r1, #16] │ │ movs r1, #34 @ 0x22 │ │ blx r2 │ │ - cbz r0, 73330 │ │ + cbz r0, 733e4 │ │ movs r0, #1 │ │ - b.n 73328 │ │ + b.n 733dc │ │ movs r0, #0 │ │ add sp, #68 @ 0x44 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #2 │ │ str r0, [sp, #28] │ │ movs r0, #0 │ │ @@ -112883,87 +112826,87 @@ │ │ add r0, sp, #12 │ │ stmia.w r0, {r6, r9, sl} │ │ add.w r9, sp, #32 │ │ add.w r0, r9, #2 │ │ str r0, [sp, #8] │ │ add r5, sp, #12 │ │ mov r0, r5 │ │ - bl 736b8 │ │ + bl 7376c │ │ cmp r0, r8 │ │ - beq.w 73470 │ │ + beq.w 73524 │ │ mov r6, r0 │ │ cmp.w r0, #1114112 @ 0x110000 │ │ - beq.w 7347c │ │ + beq.w 73530 │ │ cmp r6, #39 @ 0x27 │ │ - bne.n 73374 │ │ + bne.n 73428 │ │ ldrd r0, r1, [r4] │ │ ldr r2, [r1, #16] │ │ movs r1, #39 @ 0x27 │ │ blx r2 │ │ cmp r0, #0 │ │ - bne.n 73322 │ │ - b.n 7334a │ │ + bne.n 733d6 │ │ + b.n 733fe │ │ cmp r6, #12 │ │ - bgt.n 73392 │ │ + bgt.n 73446 │ │ add r5, sp, #48 @ 0x30 │ │ - cbz r6, 733ae │ │ + cbz r6, 73462 │ │ cmp r6, #9 │ │ - beq.n 733ea │ │ + beq.n 7349e │ │ cmp r6, #10 │ │ - bne.n 733ca │ │ + bne.n 7347e │ │ ldr r0, [sp, #8] │ │ movs r6, #0 │ │ str r6, [r0, #4] │ │ str r6, [r0, #0] │ │ movw r0, #28252 @ 0x6e5c │ │ - b.n 73404 │ │ + b.n 734b8 │ │ add r5, sp, #48 @ 0x30 │ │ cmp r6, #13 │ │ - beq.n 733bc │ │ + beq.n 73470 │ │ cmp r6, #34 @ 0x22 │ │ - beq.n 733f8 │ │ + beq.n 734ac │ │ cmp r6, #92 @ 0x5c │ │ - bne.n 733ca │ │ + bne.n 7347e │ │ ldr r0, [sp, #8] │ │ movs r6, #0 │ │ str r6, [r0, #4] │ │ str r6, [r0, #0] │ │ movw r0, #23644 @ 0x5c5c │ │ - b.n 73404 │ │ + b.n 734b8 │ │ ldr r0, [sp, #8] │ │ movs r6, #0 │ │ str r6, [r0, #4] │ │ str r6, [r0, #0] │ │ movw r0, #12380 @ 0x305c │ │ - b.n 73404 │ │ + b.n 734b8 │ │ ldr r0, [sp, #8] │ │ movs r6, #0 │ │ str r6, [r0, #4] │ │ str r6, [r0, #0] │ │ movw r0, #29276 @ 0x725c │ │ - b.n 73404 │ │ + b.n 734b8 │ │ lsrs r0, r6, #8 │ │ cmp r0, #2 │ │ - bls.n 733d8 │ │ + bls.n 7348c │ │ mov r0, r6 │ │ - bl 3f8c8 │ │ - cbnz r0, 73440 │ │ + bl 3fbd0 │ │ + cbnz r0, 734f4 │ │ mov r0, r6 │ │ - bl 3f63c │ │ - cbz r0, 73440 │ │ + bl 3f944 │ │ + cbz r0, 734f4 │ │ str r6, [sp, #32] │ │ movs r6, #128 @ 0x80 │ │ mov.w sl, #129 @ 0x81 │ │ - b.n 7340c │ │ + b.n 734c0 │ │ ldr r0, [sp, #8] │ │ movs r6, #0 │ │ str r6, [r0, #4] │ │ str r6, [r0, #0] │ │ movw r0, #29788 @ 0x745c │ │ - b.n 73404 │ │ + b.n 734b8 │ │ ldr r0, [sp, #8] │ │ movs r6, #0 │ │ str r6, [r0, #4] │ │ str r6, [r0, #0] │ │ movw r0, #8796 @ 0x225c │ │ strh.w r0, [sp, #32] │ │ mov.w sl, #2 │ │ @@ -112979,23 +112922,23 @@ │ │ cmp.w sl, #128 @ 0x80 │ │ it ls │ │ ldrbls r1, [r5, r6] │ │ ldrd r0, r2, [r4] │ │ ldr r2, [r2, #16] │ │ blx r2 │ │ cmp r0, #0 │ │ - bne.w 73322 │ │ + bne.w 733d6 │ │ adds r6, #1 │ │ cmp sl, r6 │ │ - bne.n 7341e │ │ + bne.n 734d2 │ │ mov r9, fp │ │ - b.n 73348 │ │ + b.n 733fc │ │ mov r0, r5 │ │ mov r1, r6 │ │ - bl 738dc │ │ + bl 73990 │ │ mov r1, r5 │ │ mov r0, r9 │ │ ldmia r1!, {r2, r3} │ │ mov fp, r9 │ │ stmia r0!, {r2, r3} │ │ ldrh r1, [r1, #0] │ │ strh r1, [r0, #0] │ │ @@ -113004,347 +112947,347 @@ │ │ mov r0, r5 │ │ ldrb.w sl, [sp, #59] @ 0x3b │ │ ldmia r1!, {r2, r3} │ │ cmp r6, sl │ │ stmia r0!, {r2, r3} │ │ ldrh r1, [r1, #0] │ │ strh r1, [r0, #0] │ │ - bcc.n 7341a │ │ - b.n 7343c │ │ + bcc.n 734ce │ │ + b.n 734f0 │ │ ldrd r0, r1, [r4] │ │ ldr r2, [r1, #16] │ │ movs r1, #34 @ 0x22 │ │ blx r2 │ │ - b.n 73328 │ │ - ldr r0, [pc, #36] @ (734a4 ) │ │ + b.n 733dc │ │ + ldr r0, [pc, #36] @ (73558 ) │ │ add r2, sp, #48 @ 0x30 │ │ - ldr r3, [pc, #36] @ (734a8 ) │ │ - ldr r1, [pc, #40] @ (734ac ) │ │ + ldr r3, [pc, #36] @ (7355c ) │ │ + ldr r1, [pc, #40] @ (73560 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ nop │ │ - subs r7, #190 @ 0xbe │ │ - vrint?.f32 , q12 │ │ - @ instruction: 0xfff93f85 │ │ - vqshlu.s64 d31, d12, #58 @ 0x3a │ │ - @ instruction: 0xfff95fff │ │ - vsra.u64 q12, q7, #6 │ │ + subs r7, #9 │ │ + vsli.64 d31, d20, #58 @ 0x3a │ │ + @ instruction: 0xfff93ed0 │ │ + vrintz.f32 , q12 │ │ + vqrdmlsh.s , , d11[0] │ │ + vuzp.32 q12, q5 │ │ movs r6, r0 │ │ - strh r4, [r5, #12] │ │ + strh r0, [r1, #8] │ │ movs r6, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ mov r4, r0 │ │ ldr r0, [r0, #0] │ │ - cbz r0, 734fe │ │ - ldr r1, [pc, #76] @ (7350c ) │ │ + cbz r0, 735b2 │ │ + ldr r1, [pc, #76] @ (735c0 ) │ │ movs r5, #0 │ │ movs r6, #1 │ │ add r1, pc │ │ mov r8, r1 │ │ ldrd r2, r1, [r4, #4] │ │ cmp r1, r2 │ │ - bcs.n 734d6 │ │ + bcs.n 7358a │ │ ldrb r0, [r0, r1] │ │ cmp r0, #69 @ 0x45 │ │ - beq.n 734fa │ │ - cbz r5, 734e6 │ │ + beq.n 735ae │ │ + cbz r5, 7359a │ │ ldr r0, [r4, #16] │ │ - cbz r0, 734e6 │ │ + cbz r0, 7359a │ │ mov r1, r8 │ │ movs r2, #2 │ │ - bl 3ffd4 │ │ - cbnz r0, 73508 │ │ + bl 402dc │ │ + cbnz r0, 735bc │ │ mov r0, r4 │ │ movs r1, #1 │ │ - bl 7284c │ │ - cbnz r0, 73500 │ │ + bl 72900 │ │ + cbnz r0, 735b4 │ │ ldr r0, [r4, #0] │ │ subs r5, #1 │ │ cmp r0, #0 │ │ - bne.n 734c8 │ │ - b.n 734fe │ │ + bne.n 7357c │ │ + b.n 735b2 │ │ adds r0, r1, #1 │ │ str r0, [r4, #8] │ │ movs r6, #0 │ │ mov r0, r6 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r6, #1 │ │ - b.n 73500 │ │ - subs r7, #29 │ │ + b.n 735b4 │ │ + subs r6, #104 @ 0x68 │ │ vsli.64 , q8, #58 @ 0x3a │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ mov r5, r0 │ │ ldr r0, [r0, #0] │ │ movs r4, #0 │ │ - cbz r0, 7355e │ │ - ldr r1, [pc, #76] @ (73570 ) │ │ + cbz r0, 73612 │ │ + ldr r1, [pc, #76] @ (73624 ) │ │ movs r6, #1 │ │ add r1, pc │ │ mov r8, r1 │ │ ldrd r2, r1, [r5, #4] │ │ cmp r1, r2 │ │ - bcs.n 73536 │ │ + bcs.n 735ea │ │ ldrb r0, [r0, r1] │ │ cmp r0, #69 @ 0x45 │ │ - beq.n 7355a │ │ - cbz r4, 73546 │ │ + beq.n 7360e │ │ + cbz r4, 735fa │ │ ldr r0, [r5, #16] │ │ - cbz r0, 73546 │ │ + cbz r0, 735fa │ │ mov r1, r8 │ │ movs r2, #2 │ │ - bl 3ffd4 │ │ - cbnz r0, 7356a │ │ + bl 402dc │ │ + cbnz r0, 7361e │ │ mov r0, r5 │ │ movs r1, #1 │ │ - bl 7284c │ │ - cbnz r0, 73560 │ │ + bl 72900 │ │ + cbnz r0, 73614 │ │ ldr r0, [r5, #0] │ │ adds r4, #1 │ │ cmp r0, #0 │ │ - bne.n 73528 │ │ - b.n 7355e │ │ + bne.n 735dc │ │ + b.n 73612 │ │ adds r0, r1, #1 │ │ str r0, [r5, #8] │ │ movs r6, #0 │ │ mov r0, r6 │ │ mov r1, r4 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r6, #1 │ │ - b.n 73560 │ │ + b.n 73614 │ │ nop │ │ - subs r6, #189 @ 0xbd │ │ + subs r6, #8 │ │ vsli.64 , q8, #58 @ 0x3a │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #44 @ 0x2c │ │ mov sl, r0 │ │ ldr r0, [r0, #0] │ │ cmp r0, #0 │ │ - beq.w 73692 │ │ - ldr r1, [pc, #276] @ (736a0 ) │ │ + beq.w 73746 │ │ + ldr r1, [pc, #276] @ (73754 ) │ │ add.w r9, sp, #8 │ │ add.w r8, sp, #24 │ │ movs r5, #0 │ │ add r1, pc │ │ mov fp, r1 │ │ - ldr r1, [pc, #264] @ (736a4 ) │ │ + ldr r1, [pc, #264] @ (73758 ) │ │ add r1, pc │ │ str r1, [sp, #4] │ │ ldrd r2, r1, [sl, #4] │ │ cmp r1, r2 │ │ - bcs.n 735ac │ │ + bcs.n 73660 │ │ ldrb r0, [r0, r1] │ │ cmp r0, #69 @ 0x45 │ │ - beq.n 7368c │ │ - cbz r5, 735c8 │ │ + beq.n 73740 │ │ + cbz r5, 7367c │ │ ldr.w r0, [sl, #16] │ │ - cbz r0, 735c8 │ │ - ldr r1, [pc, #240] @ (736a8 ) │ │ + cbz r0, 7367c │ │ + ldr r1, [pc, #240] @ (7375c ) │ │ movs r2, #2 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 7367c │ │ + bne.n 73730 │ │ ldr.w r0, [sl] │ │ - cbz r0, 7362c │ │ + cbz r0, 736e0 │ │ mov r0, r9 │ │ mov r1, sl │ │ movs r2, #115 @ 0x73 │ │ - bl 71dd4 │ │ + bl 71e88 │ │ ldrb.w r0, [sp, #8] │ │ cmp r0, #1 │ │ - beq.n 7364c │ │ + beq.n 73700 │ │ ldr.w r0, [sl] │ │ - cbz r0, 73620 │ │ + cbz r0, 736d4 │ │ mov r0, r9 │ │ mov r1, sl │ │ - bl 71e34 │ │ + bl 71ee8 │ │ ldr r0, [sp, #8] │ │ - cbz r0, 73656 │ │ + cbz r0, 7370a │ │ mov r1, r9 │ │ mov r0, r8 │ │ ldmia.w r1, {r2, r3, r4, r6} │ │ stmia r0!, {r2, r3, r4, r6} │ │ ldr.w r1, [sl, #16] │ │ - cbz r1, 73614 │ │ + cbz r1, 736c8 │ │ mov r0, r8 │ │ - bl 71f8c │ │ - cbnz r0, 7367c │ │ + bl 72040 │ │ + cbnz r0, 73730 │ │ ldr.w r0, [sl, #16] │ │ - cbz r0, 73614 │ │ + cbz r0, 736c8 │ │ ldr r1, [sp, #4] │ │ movs r2, #2 │ │ - bl 3ffd4 │ │ - cbnz r0, 7367c │ │ + bl 402dc │ │ + cbnz r0, 73730 │ │ mov r0, sl │ │ movs r1, #1 │ │ movs r6, #1 │ │ - bl 7284c │ │ - b.n 7363e │ │ + bl 72900 │ │ + b.n 736f2 │ │ ldr.w r0, [sl, #16] │ │ - cbz r0, 73640 │ │ + cbz r0, 736f4 │ │ movs r6, #1 │ │ mov r1, fp │ │ - b.n 73638 │ │ + b.n 736ec │ │ ldr.w r0, [sl, #16] │ │ - cbz r0, 73640 │ │ - ldr r1, [pc, #120] @ (736ac ) │ │ + cbz r0, 736f4 │ │ + ldr r1, [pc, #120] @ (73760 ) │ │ movs r6, #1 │ │ add r1, pc │ │ movs r2, #1 │ │ - bl 3ffd4 │ │ - cbnz r0, 73694 │ │ + bl 402dc │ │ + cbnz r0, 73748 │ │ ldr.w r0, [sl] │ │ subs r5, #1 │ │ cmp r0, #0 │ │ - bne.n 7359e │ │ - b.n 73692 │ │ + bne.n 73652 │ │ + b.n 73746 │ │ ldr.w r0, [sl, #16] │ │ ldrb.w r5, [sp, #9] │ │ - b.n 7365e │ │ + b.n 73712 │ │ ldr.w r0, [sl, #16] │ │ ldrb.w r5, [sp, #12] │ │ - cbz r0, 73680 │ │ - ldr r2, [pc, #76] @ (736b0 ) │ │ + cbz r0, 73734 │ │ + ldr r2, [pc, #76] @ (73764 ) │ │ cmp r5, #0 │ │ - ldr r1, [pc, #76] @ (736b4 ) │ │ + ldr r1, [pc, #76] @ (73768 ) │ │ add r2, pc │ │ add r1, pc │ │ it eq │ │ moveq r1, r2 │ │ mov.w r2, #16 │ │ it ne │ │ movne r2, #25 │ │ - bl 3ffd4 │ │ - cbz r0, 73680 │ │ + bl 402dc │ │ + cbz r0, 73734 │ │ movs r6, #1 │ │ - b.n 73694 │ │ + b.n 73748 │ │ movs r0, #0 │ │ strb.w r5, [sl, #4] │ │ str.w r0, [sl] │ │ - b.n 73692 │ │ + b.n 73746 │ │ adds r0, r1, #1 │ │ str.w r0, [sl, #8] │ │ movs r6, #0 │ │ mov r0, r6 │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - subs r5, #0 │ │ - vcvt.u16.f16 d19, d22, #6 │ │ - @ instruction: 0xfffa3e29 │ │ - vcvt.f16.u16 , q7, #6 │ │ - vrshr.u64 , q11, #6 │ │ - vcvt.f16.u16 d19, d3, #7 │ │ + subs r4, #75 @ 0x4b │ │ + vmull.u , d26, d1 │ │ + vcvt.u16.f16 , q10, #6 │ │ + vtbl.8 d19, {d26-d29}, d25 │ │ + vqmovun.s64 d31, q1 │ │ + @ instruction: 0xfff93b5e │ │ vsli.64 , q8, #58 @ 0x3a │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #52 @ 0x34 │ │ ldr r3, [r0, #4] │ │ ldr r1, [r0, #16] │ │ cmp r3, r1 │ │ - bcs.n 736d2 │ │ + bcs.n 73786 │ │ movs r2, #1 │ │ movt r2, #17 │ │ - b.n 7385e │ │ + b.n 73912 │ │ ldr r2, [r0, #0] │ │ sub.w lr, r3, r1 │ │ cmp r1, #2 │ │ add.w ip, r2, r1 │ │ strd ip, lr, [r0] │ │ - bne.w 73870 │ │ + bne.w 73924 │ │ ldrb r3, [r2, #0] │ │ sub.w r4, r3, #65 @ 0x41 │ │ sub.w r1, r3, #48 @ 0x30 │ │ cmp r3, #57 @ 0x39 │ │ bic.w r4, r4, #32 │ │ it hi │ │ addhi.w r1, r4, #10 │ │ cmp r1, #15 │ │ - bhi.w 73868 │ │ + bhi.w 7391c │ │ ldrb r3, [r2, #1] │ │ sub.w r4, r3, #65 @ 0x41 │ │ sub.w r2, r3, #48 @ 0x30 │ │ cmp r3, #57 @ 0x39 │ │ bic.w r4, r4, #32 │ │ it hi │ │ addhi.w r2, r4, #10 │ │ cmp r2, #16 │ │ - bcs.w 73868 │ │ + bcs.w 7391c │ │ orr.w r1, r2, r1, lsl #4 │ │ sxtb r2, r1 │ │ cmp.w r2, #4294967295 @ 0xffffffff │ │ - ble.n 7379e │ │ + ble.n 73852 │ │ add r0, sp, #12 │ │ movs r2, #1 │ │ str r0, [sp, #4] │ │ movs r0, #0 │ │ str r2, [sp, #8] │ │ strb.w r0, [sp, #15] │ │ strh.w r0, [sp, #13] │ │ strb.w r1, [sp, #12] │ │ add r0, sp, #28 │ │ add r1, sp, #12 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #28] │ │ - cbnz r0, 737a2 │ │ + cbnz r0, 73856 │ │ ldrd r0, r2, [sp, #32] │ │ cmp r2, #0 │ │ strd r0, r2, [sp, #16] │ │ add.w r1, r0, r2 │ │ - beq.w 73886 │ │ + beq.w 7393a │ │ mov r3, r0 │ │ ldrsb.w r6, [r3], #1 │ │ cmp.w r6, #4294967295 @ 0xffffffff │ │ uxtb r2, r6 │ │ - bgt.n 73854 │ │ + bgt.n 73908 │ │ ldrb r6, [r0, #1] │ │ and.w r3, r2, #31 │ │ cmp r2, #224 @ 0xe0 │ │ and.w r6, r6, #63 @ 0x3f │ │ - bcc.n 737b8 │ │ + bcc.n 7386c │ │ ldrb r5, [r0, #2] │ │ cmp r2, #240 @ 0xf0 │ │ and.w r5, r5, #63 @ 0x3f │ │ orr.w r6, r5, r6, lsl #6 │ │ - bcc.n 7384e │ │ + bcc.n 73902 │ │ ldrb r2, [r0, #3] │ │ and.w r3, r3, #7 │ │ and.w r2, r2, #63 @ 0x3f │ │ orr.w r2, r2, r6, lsl #6 │ │ orr.w r2, r2, r3, lsl #18 │ │ adds r3, r0, #4 │ │ - b.n 73854 │ │ + b.n 73908 │ │ cmp r1, #192 @ 0xc0 │ │ - bcs.n 737a8 │ │ + bcs.n 7385c │ │ mov.w r2, #1114112 @ 0x110000 │ │ - b.n 7385e │ │ + b.n 73912 │ │ cmp r1, #224 @ 0xe0 │ │ - bcs.n 737b0 │ │ + bcs.n 73864 │ │ movs r2, #2 │ │ - b.n 737c6 │ │ + b.n 7387a │ │ cmp r1, #240 @ 0xf0 │ │ - bcs.n 737c0 │ │ + bcs.n 73874 │ │ movs r2, #3 │ │ - b.n 737c6 │ │ + b.n 7387a │ │ orr.w r2, r6, r3, lsl #6 │ │ adds r3, r0, #2 │ │ - b.n 73854 │ │ + b.n 73908 │ │ cmp r1, #248 @ 0xf8 │ │ - bcs.n 737a2 │ │ + bcs.n 73856 │ │ movs r2, #4 │ │ add r4, sp, #12 │ │ strb.w r1, [sp, #12] │ │ mvn.w r1, #1 │ │ add.w r8, r1, r2, lsl #1 │ │ add.w r1, ip, #1 │ │ sub.w ip, lr, #2 │ │ @@ -113352,105 +113295,105 @@ │ │ mov.w fp, #0 │ │ str r2, [sp, #8] │ │ str r4, [sp, #4] │ │ strb.w fp, [sp, #15] │ │ strh.w fp, [sp, #13] │ │ add.w r4, lr, fp │ │ cmp r4, #2 │ │ - bcc.n 737a2 │ │ + bcc.n 73856 │ │ ldrb.w r4, [r1, #-1] │ │ add.w r9, ip, fp │ │ adds r6, r1, #1 │ │ sub.w r5, r4, #65 @ 0x41 │ │ strd r6, r9, [r0] │ │ sub.w r6, r4, #48 @ 0x30 │ │ cmp r4, #57 @ 0x39 │ │ bic.w r5, r5, #32 │ │ it hi │ │ addhi.w r6, r5, #10 │ │ cmp r6, #15 │ │ - bhi.n 73868 │ │ + bhi.n 7391c │ │ ldrb r5, [r1, #0] │ │ sub.w r3, r5, #65 @ 0x41 │ │ sub.w r4, r5, #48 @ 0x30 │ │ cmp r5, #57 @ 0x39 │ │ bic.w r3, r3, #32 │ │ it hi │ │ addhi.w r4, r3, #10 │ │ cmp r4, #16 │ │ - bcs.n 73868 │ │ + bcs.n 7391c │ │ orr.w r3, r4, r6, lsl #4 │ │ strb.w r3, [sl], #1 │ │ sub.w fp, fp, #2 │ │ adds r1, #2 │ │ adds.w r3, r8, fp │ │ - bne.n 737f0 │ │ - b.n 73740 │ │ + bne.n 738a4 │ │ + b.n 737f4 │ │ orr.w r2, r6, r3, lsl #12 │ │ adds r3, r0, #3 │ │ cmp r3, r1 │ │ - bne.n 7387e │ │ + bne.n 73932 │ │ cmp.w r2, #1114112 @ 0x110000 │ │ - beq.n 73886 │ │ + beq.n 7393a │ │ mov r0, r2 │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #108] @ (738d8 ) │ │ + ldr r0, [pc, #108] @ (7398c ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #92] @ (738d0 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #92] @ (73984 ) │ │ movs r1, #40 @ 0x28 │ │ - ldr r2, [pc, #92] @ (738d4 ) │ │ + ldr r2, [pc, #92] @ (73988 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ + bl 3fd54 │ │ ldrsb.w r2, [r3] │ │ cmp.w r2, #4294967295 @ 0xffffffff │ │ - bl 73988 │ │ - ldr r1, [pc, #48] @ (738bc ) │ │ - ldr r4, [pc, #48] @ (738c0 ) │ │ - ldr r5, [pc, #52] @ (738c4 ) │ │ + bl 73a3c │ │ + ldr r1, [pc, #48] @ (73970 ) │ │ + ldr r4, [pc, #48] @ (73974 ) │ │ + ldr r5, [pc, #52] @ (73978 ) │ │ add r1, pc │ │ - ldr r3, [pc, #52] @ (738c8 ) │ │ + ldr r3, [pc, #52] @ (7397c ) │ │ add r4, pc │ │ - ldr r2, [pc, #52] @ (738cc ) │ │ + ldr r2, [pc, #52] @ (73980 ) │ │ add r5, pc │ │ str r0, [sp, #24] │ │ add r0, sp, #24 │ │ add r3, pc │ │ str r1, [sp, #48] @ 0x30 │ │ strd r4, r0, [sp, #40] @ 0x28 │ │ add r0, sp, #16 │ │ add r2, pc │ │ add r1, sp, #28 │ │ strd r5, r0, [sp, #32] │ │ add r0, sp, #4 │ │ str r0, [sp, #28] │ │ mov r0, r3 │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ nop │ │ - ldmia r7, {r0, r5, r6, r7} │ │ + bcs.n 739de │ │ vsra.u64 d16, d1, #4 │ │ movs r0, r0 │ │ lsls r1, r3, #4 │ │ movs r0, r0 │ │ - ldrh r2, [r7, #50] @ 0x32 │ │ - vcvt.f16.u16 d23, d28, #7 │ │ + ldrh r1, [r4, #46] @ 0x2e │ │ + @ instruction: 0xfff97b98 │ │ movs r6, r0 │ │ - ldrh r7, [r2, r7] │ │ - vcvt.f16.u16 , q6, #6 │ │ + ldrh r3, [r4, r4] │ │ + vtbl.8 d23, {d26-d29}, d24 │ │ movs r6, r0 │ │ - ldrb r2, [r3, #17] │ │ + ldrb r6, [r0, #15] │ │ movs r6, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #16 │ │ - ldr r2, [pc, #140] @ (73974 ) │ │ + ldr r2, [pc, #140] @ (73a28 ) │ │ mov r4, r0 │ │ ubfx r0, r1, #8, #4 │ │ and.w r3, r1, #15 │ │ add r2, pc │ │ ubfx r5, r1, #16, #4 │ │ ubfx r6, r1, #12, #4 │ │ ldrb.w lr, [r2, r0] │ │ @@ -113483,2111 +113426,2111 @@ │ │ strb.w r2, [r0, #-1] │ │ movs r0, #125 @ 0x7d │ │ strb.w r0, [sp, #9] │ │ mov r0, r4 │ │ movs r2, #10 │ │ strb r3, [r1, r5] │ │ strb.w ip, [sp, #8] │ │ - bl d53c6 │ │ + bl d52ea │ │ strb r6, [r4, #11] │ │ strb r5, [r4, #10] │ │ add sp, #16 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - bl 18e96a │ │ + bl daa1e │ │ mov r0, r1 │ │ - ldr r1, [pc, #8] @ (73984 ) │ │ + ldr r1, [pc, #8] @ (73a38 ) │ │ movs r2, #2 │ │ add r1, pc │ │ - b.w 3ffd4 │ │ - subs r0, #208 @ 0xd0 │ │ + b.w 402dc │ │ + subs r0, #27 │ │ vrint?.f32 d20, d10 │ │ subs r1, r1, r0 │ │ cmp r1, #16 │ │ it cs │ │ - bcs.w 3f290 │ │ + bcs.w 3f598 │ │ cmp r2, r0 │ │ - beq.n 739ac │ │ + beq.n 73a60 │ │ movs r2, #0 │ │ ldrsb.w r3, [r0], #1 │ │ cmn.w r3, #65 @ 0x41 │ │ it gt │ │ addgt r2, #1 │ │ subs r1, #1 │ │ - bne.n 7399a │ │ - b.n 739ae │ │ + bne.n 73a4e │ │ + b.n 73a62 │ │ movs r2, #0 │ │ mov r0, r2 │ │ bx lr │ │ - bmi.n 7395e │ │ + bmi.n 73a12 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #16 │ │ mov r4, r1 │ │ ldrd r5, r6, [r0] │ │ ldrd r0, r1, [r1] │ │ movs r2, #1 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #76] @ (73a1c ) │ │ + ldr r1, [pc, #76] @ (73ad0 ) │ │ add r1, pc │ │ blx r3 │ │ movs r1, #0 │ │ strb.w r1, [sp, #9] │ │ strb.w r0, [sp, #8] │ │ str r4, [sp, #4] │ │ - cbz r6, 739fe │ │ - ldr r4, [pc, #60] @ (73a20 ) │ │ + cbz r6, 73ab2 │ │ + ldr r4, [pc, #60] @ (73ad4 ) │ │ add r0, sp, #4 │ │ add.w r8, sp, #12 │ │ add r4, pc │ │ mov r1, r8 │ │ mov r2, r4 │ │ str r5, [sp, #12] │ │ - bl 40d18 │ │ + bl 41020 │ │ adds r5, #1 │ │ subs r6, #1 │ │ - bne.n 739ea │ │ + bne.n 73a9e │ │ ldrb.w r0, [sp, #8] │ │ - cbz r0, 73a04 │ │ + cbz r0, 73ab8 │ │ movs r0, #1 │ │ - b.n 73a14 │ │ + b.n 73ac8 │ │ ldr r0, [sp, #4] │ │ movs r2, #1 │ │ ldrd r0, r1, [r0] │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #20] @ (73a24 ) │ │ + ldr r1, [pc, #20] @ (73ad8 ) │ │ add r1, pc │ │ blx r3 │ │ add sp, #16 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - subs r0, #171 @ 0xab │ │ + adds r7, #246 @ 0xf6 │ │ vmla.i q8, q5, d9[0] │ │ movs r0, r0 │ │ - subs r0, #106 @ 0x6a │ │ + adds r7, #181 @ 0xb5 │ │ @ instruction: 0xfffae9d1 │ │ movs r3, #0 │ │ ldrd r0, r1, [r0] │ │ - b.w 3faa0 │ │ + b.w 3fda8 │ │ ldr r2, [r1, #8] │ │ ldr r0, [r0, #0] │ │ lsls r3, r2, #6 │ │ itt mi │ │ ldrbmi r0, [r0, #0] │ │ - bmi.w 408d0 │ │ + bmi.w 40bd8 │ │ lsls r2, r2, #5 │ │ itt pl │ │ ldrbpl r0, [r0, #0] │ │ - bpl.w 40780 │ │ - b.w 4091c │ │ + bpl.w 40a88 │ │ + b.w 40c24 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #16 │ │ mov r4, r0 │ │ mov r0, sp │ │ mov r5, r1 │ │ ldr r6, [r1, #8] │ │ - bl 72780 │ │ + bl 72834 │ │ ldrb.w r0, [sp] │ │ cmp r0, #1 │ │ - bne.n 73a78 │ │ + bne.n 73b2c │ │ movs r1, #0 │ │ ldrb.w r0, [sp, #1] │ │ str r1, [r4, #0] │ │ - b.n 73a9c │ │ + b.n 73b50 │ │ ldrd r0, r1, [sp, #8] │ │ subs r2, r6, #1 │ │ subs r2, r0, r2 │ │ sbcs.w r1, r1, #0 │ │ - bcs.n 73a98 │ │ + bcs.n 73b4c │ │ ldr r1, [r5, #12] │ │ adds r1, #1 │ │ cmp.w r1, #500 @ 0x1f4 │ │ - bls.n 73aa6 │ │ + bls.n 73b5a │ │ movs r0, #0 │ │ str r0, [r4, #0] │ │ movs r0, #1 │ │ - b.n 73a9c │ │ + b.n 73b50 │ │ movs r0, #0 │ │ str r0, [r4, #0] │ │ strb r0, [r4, #4] │ │ add sp, #16 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ ldrd r2, r3, [r5] │ │ strd r2, r3, [r4] │ │ strd r0, r1, [r4, #8] │ │ - b.n 73a9e │ │ + b.n 73b52 │ │ subs r0, #97 @ 0x61 │ │ uxtb r1, r0 │ │ cmp r1, #25 │ │ - bhi.n 73ace │ │ - ldr r0, [pc, #20] @ (73ad4 ) │ │ - ldr r2, [pc, #24] @ (73ad8 ) │ │ + bhi.n 73b82 │ │ + ldr r0, [pc, #20] @ (73b88 ) │ │ + ldr r2, [pc, #24] @ (73b8c ) │ │ add r0, pc │ │ add r2, pc │ │ ldr.w r0, [r0, r1, lsl #2] │ │ ldr.w r1, [r2, r1, lsl #2] │ │ bx lr │ │ movs r0, #0 │ │ bx lr │ │ nop │ │ - strh r0, [r7, #54] @ 0x36 │ │ + strh r4, [r2, #50] @ 0x32 │ │ movs r6, r0 │ │ - ldmia r5!, {r1, r2, r4, r7} │ │ + ldmia r4!, {r1, r5, r6, r7} │ │ vsli.64 , q8, #58 @ 0x3a │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #20 │ │ mov r4, r0 │ │ ldr r0, [r0, #0] │ │ - cbz r0, 73b2a │ │ + cbz r0, 73bde │ │ mov r0, sp │ │ mov r1, r4 │ │ movs r2, #71 @ 0x47 │ │ - bl 71dd4 │ │ + bl 71e88 │ │ ldrb.w r0, [sp] │ │ cmp r0, #1 │ │ - bne.n 73b42 │ │ + bne.n 73bf6 │ │ ldr r0, [r4, #16] │ │ ldrb.w r5, [sp, #1] │ │ - cbz r0, 73b22 │ │ - ldr r2, [pc, #236] @ (73bf4 ) │ │ + cbz r0, 73bd6 │ │ + ldr r2, [pc, #236] @ (73ca8 ) │ │ cmp r5, #0 │ │ - ldr r1, [pc, #236] @ (73bf8 ) │ │ + ldr r1, [pc, #236] @ (73cac ) │ │ add r2, pc │ │ add r1, pc │ │ it eq │ │ moveq r1, r2 │ │ mov.w r2, #16 │ │ it ne │ │ movne r2, #25 │ │ - bl 3ffd4 │ │ - cbnz r0, 73b5c │ │ + bl 402dc │ │ + cbnz r0, 73c10 │ │ movs r6, #0 │ │ strb r5, [r4, #4] │ │ str r6, [r4, #0] │ │ - b.n 73b62 │ │ + b.n 73c16 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 73b60 │ │ - ldr r1, [pc, #192] @ (73bf0 ) │ │ + cbz r0, 73c14 │ │ + ldr r1, [pc, #192] @ (73ca4 ) │ │ movs r2, #1 │ │ add r1, pc │ │ add sp, #20 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 3ffd4 │ │ + b.w 402dc │ │ ldr r0, [r4, #16] │ │ - cbz r0, 73b6c │ │ + cbz r0, 73c20 │ │ ldrd r8, r9, [sp, #8] │ │ orrs.w r1, r8, r9 │ │ - beq.n 73bde │ │ - ldr r1, [pc, #168] @ (73bfc ) │ │ + beq.n 73c92 │ │ + ldr r1, [pc, #168] @ (73cb0 ) │ │ movs r2, #4 │ │ add r1, pc │ │ - bl 3ffd4 │ │ - cbz r0, 73b7c │ │ + bl 402dc │ │ + cbz r0, 73c30 │ │ movs r6, #1 │ │ - b.n 73b62 │ │ + b.n 73c16 │ │ movs r6, #0 │ │ mov r0, r6 │ │ add sp, #20 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, r4 │ │ add sp, #20 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 74180 │ │ - ldr r0, [pc, #128] @ (73c00 ) │ │ + b.w 74234 │ │ + ldr r0, [pc, #128] @ (73cb4 ) │ │ mov.w sl, #0 │ │ movs r5, #0 │ │ movs r6, #1 │ │ add r0, pc │ │ mov fp, r0 │ │ subs.w r2, sl, r8 │ │ sbcs.w r2, r5, r9 │ │ - bcs.n 73bcc │ │ + bcs.n 73c80 │ │ mov r1, sl │ │ mov r0, r5 │ │ adds.w sl, sl, #1 │ │ adc.w r5, r5, #0 │ │ orrs r0, r1 │ │ itt ne │ │ ldrne r0, [r4, #16] │ │ cmpne r0, #0 │ │ - beq.n 73bb6 │ │ + beq.n 73c6a │ │ mov r1, fp │ │ movs r2, #2 │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 73b5c │ │ + bne.n 73c10 │ │ ldr r0, [r4, #20] │ │ movs r2, #1 │ │ movs r3, #0 │ │ adds r0, #1 │ │ str r0, [r4, #20] │ │ mov r0, r4 │ │ - bl 72d14 │ │ + bl 72dc8 │ │ cmp r0, #0 │ │ - bne.n 73b62 │ │ - b.n 73b8a │ │ + bne.n 73c16 │ │ + b.n 73c3e │ │ ldr r0, [r4, #16] │ │ - cbz r0, 73bde │ │ - ldr r1, [pc, #48] @ (73c04 ) │ │ + cbz r0, 73c92 │ │ + ldr r1, [pc, #48] @ (73cb8 ) │ │ movs r2, #2 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 73b5c │ │ + bne.n 73c10 │ │ mov r0, r4 │ │ - bl 74180 │ │ + bl 74234 │ │ ldr r1, [r4, #20] │ │ sub.w r1, r1, r8 │ │ str r1, [r4, #20] │ │ - b.n 73b64 │ │ + b.n 73c18 │ │ nop │ │ - adds r7, #98 @ 0x62 │ │ - vcvt.f32.u32 q15, q0, #6 │ │ - vabs.f32 , │ │ - vrintm.f32 q9, q2 │ │ - vqrshrun.s64 d19, , #6 │ │ - vrint?.f32 , │ │ + adds r6, #173 @ 0xad │ │ + @ instruction: 0xfffaed9c │ │ + vqshlu.s64 d19, d24, #57 @ 0x39 │ │ + vqshlu.s32 d18, d0, #26 │ │ + vrintp.f32 d19, d22 │ │ + vrintm.f32 d19, d12 │ │ vsli.64 , q8, #58 @ 0x3a │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #32 │ │ mov r4, r0 │ │ ldr r0, [r0, #0] │ │ - cbz r0, 73c4e │ │ + cbz r0, 73d02 │ │ mov r5, sp │ │ mov r1, r4 │ │ mov r0, r5 │ │ - bl 73a50 │ │ + bl 73b04 │ │ ldr r0, [sp, #0] │ │ - cbz r0, 73c66 │ │ + cbz r0, 73d1a │ │ ldr r0, [r4, #16] │ │ - cbz r0, 73c94 │ │ + cbz r0, 73d48 │ │ mov ip, r4 │ │ add.w r8, sp, #16 │ │ ldmia.w ip, {r0, r2, r3, r6} │ │ mov r1, r8 │ │ stmia r1!, {r0, r2, r3, r6} │ │ mov r0, r4 │ │ ldmia.w r5, {r1, r2, r3, r6} │ │ stmia r0!, {r1, r2, r3, r6} │ │ mov r0, r4 │ │ - bl 722dc │ │ + bl 72390 │ │ ldmia.w r8, {r1, r2, r3, r6} │ │ stmia r4!, {r1, r2, r3, r6} │ │ - b.n 73c96 │ │ + b.n 73d4a │ │ ldr r0, [r4, #16] │ │ - cbz r0, 73c94 │ │ - ldr r1, [pc, #76] @ (73ca0 ) │ │ + cbz r0, 73d48 │ │ + ldr r1, [pc, #76] @ (73d54 ) │ │ movs r2, #1 │ │ add r1, pc │ │ add sp, #32 │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 3ffd4 │ │ + b.w 402dc │ │ ldr r0, [r4, #16] │ │ - cbz r0, 73c8e │ │ + cbz r0, 73d42 │ │ ldrb.w r2, [sp, #4] │ │ - ldr r3, [pc, #52] @ (73ca4 ) │ │ - ldr r1, [pc, #52] @ (73ca8 ) │ │ + ldr r3, [pc, #52] @ (73d58 ) │ │ + ldr r1, [pc, #52] @ (73d5c ) │ │ cmp r2, #0 │ │ mov.w r2, #16 │ │ add r3, pc │ │ add r1, pc │ │ it eq │ │ moveq r1, r3 │ │ it ne │ │ movne r2, #25 │ │ - bl 3ffd4 │ │ - cbz r0, 73c8e │ │ + bl 402dc │ │ + cbz r0, 73d42 │ │ movs r0, #1 │ │ - b.n 73c96 │ │ + b.n 73d4a │ │ ldmia.w r5, {r0, r1, r2, r3} │ │ stmia r4!, {r0, r1, r2, r3} │ │ movs r0, #0 │ │ add sp, #32 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - adds r6, #62 @ 0x3e │ │ - vqdmulh.s q15, q13, d20[0] │ │ - vclt.f32 d19, d1, #0 │ │ + adds r5, #137 @ 0x89 │ │ + vcvt.f16.u16 d30, d16, #6 │ │ + vceq.f32 , q6, #0 │ │ vsli.64 , q8, #58 @ 0x3a │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ mov r5, r0 │ │ ldr r0, [r0, #0] │ │ movs r4, #0 │ │ - cbz r0, 73cf8 │ │ - ldr r6, [pc, #68] @ (73d04 ) │ │ + cbz r0, 73dac │ │ + ldr r6, [pc, #68] @ (73db8 ) │ │ add r6, pc │ │ ldrd r2, r1, [r5, #4] │ │ cmp r1, r2 │ │ - bcs.n 73cce │ │ + bcs.n 73d82 │ │ ldrb r0, [r0, r1] │ │ cmp r0, #69 @ 0x45 │ │ - beq.n 73cf4 │ │ - cbz r4, 73cde │ │ + beq.n 73da8 │ │ + cbz r4, 73d92 │ │ ldr r0, [r5, #16] │ │ - cbz r0, 73cde │ │ + cbz r0, 73d92 │ │ mov r1, r6 │ │ movs r2, #2 │ │ - bl 3ffd4 │ │ - cbnz r0, 73cf0 │ │ + bl 402dc │ │ + cbnz r0, 73da4 │ │ mov r0, r5 │ │ - bl 722dc │ │ - cbnz r0, 73cf0 │ │ + bl 72390 │ │ + cbnz r0, 73da4 │ │ ldr r0, [r5, #0] │ │ adds r4, #1 │ │ cmp r0, #0 │ │ - bne.n 73cc0 │ │ - b.n 73cf8 │ │ + bne.n 73d74 │ │ + b.n 73dac │ │ movs r0, #1 │ │ - b.n 73cfa │ │ + b.n 73dae │ │ adds r0, r1, #1 │ │ str r0, [r5, #8] │ │ movs r0, #0 │ │ mov r1, r4 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - adds r7, #35 @ 0x23 │ │ + adds r6, #110 @ 0x6e │ │ vsli.64 , q8, #58 @ 0x3a │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #20 │ │ mov r4, r0 │ │ ldr r0, [r0, #0] │ │ - cbz r0, 73d56 │ │ + cbz r0, 73e0a │ │ mov r0, sp │ │ mov r1, r4 │ │ movs r2, #71 @ 0x47 │ │ - bl 71dd4 │ │ + bl 71e88 │ │ ldrb.w r0, [sp] │ │ cmp r0, #1 │ │ - bne.n 73d6e │ │ + bne.n 73e22 │ │ ldr r0, [r4, #16] │ │ ldrb.w r5, [sp, #1] │ │ - cbz r0, 73d4e │ │ - ldr r2, [pc, #232] @ (73e1c ) │ │ + cbz r0, 73e02 │ │ + ldr r2, [pc, #232] @ (73ed0 ) │ │ cmp r5, #0 │ │ - ldr r1, [pc, #232] @ (73e20 ) │ │ + ldr r1, [pc, #232] @ (73ed4 ) │ │ add r2, pc │ │ add r1, pc │ │ it eq │ │ moveq r1, r2 │ │ mov.w r2, #16 │ │ it ne │ │ movne r2, #25 │ │ - bl 3ffd4 │ │ - cbnz r0, 73d88 │ │ + bl 402dc │ │ + cbnz r0, 73e3c │ │ strb r5, [r4, #4] │ │ movs r5, #0 │ │ str r5, [r4, #0] │ │ - b.n 73e0c │ │ + b.n 73ec0 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 73d8c │ │ - ldr r1, [pc, #188] @ (73e18 ) │ │ + cbz r0, 73e40 │ │ + ldr r1, [pc, #188] @ (73ecc ) │ │ movs r2, #1 │ │ add r1, pc │ │ add sp, #20 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 3ffd4 │ │ + b.w 402dc │ │ ldr r0, [r4, #16] │ │ - cbz r0, 73d90 │ │ + cbz r0, 73e44 │ │ ldrd r8, r9, [sp, #8] │ │ orrs.w r1, r8, r9 │ │ - beq.n 73dfc │ │ - ldr r1, [pc, #164] @ (73e24 ) │ │ + beq.n 73eb0 │ │ + ldr r1, [pc, #164] @ (73ed8 ) │ │ movs r2, #4 │ │ add r1, pc │ │ - bl 3ffd4 │ │ - cbz r0, 73d9a │ │ + bl 402dc │ │ + cbz r0, 73e4e │ │ movs r5, #1 │ │ - b.n 73e0c │ │ + b.n 73ec0 │ │ movs r5, #0 │ │ - b.n 73e0c │ │ + b.n 73ec0 │ │ mov r0, r4 │ │ - bl 73f3c │ │ + bl 73ff0 │ │ mov r5, r0 │ │ - b.n 73e0c │ │ - ldr r0, [pc, #140] @ (73e28 ) │ │ + b.n 73ec0 │ │ + ldr r0, [pc, #140] @ (73edc ) │ │ mov.w sl, #0 │ │ movs r6, #0 │ │ movs r5, #1 │ │ add r0, pc │ │ mov fp, r0 │ │ subs.w r2, sl, r8 │ │ sbcs.w r2, r6, r9 │ │ - bcs.n 73dea │ │ + bcs.n 73e9e │ │ mov r1, sl │ │ mov r0, r6 │ │ adds.w sl, sl, #1 │ │ adc.w r6, r6, #0 │ │ orrs r0, r1 │ │ itt ne │ │ ldrne r0, [r4, #16] │ │ cmpne r0, #0 │ │ - beq.n 73dd4 │ │ + beq.n 73e88 │ │ mov r1, fp │ │ movs r2, #2 │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 73d88 │ │ + bne.n 73e3c │ │ ldr r0, [r4, #20] │ │ movs r2, #1 │ │ movs r3, #0 │ │ adds r0, #1 │ │ str r0, [r4, #20] │ │ mov r0, r4 │ │ - bl 72d14 │ │ + bl 72dc8 │ │ cmp r0, #0 │ │ - beq.n 73da8 │ │ - b.n 73e0c │ │ + beq.n 73e5c │ │ + b.n 73ec0 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 73dfc │ │ - ldr r1, [pc, #60] @ (73e2c ) │ │ + cbz r0, 73eb0 │ │ + ldr r1, [pc, #60] @ (73ee0 ) │ │ movs r2, #2 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 73d88 │ │ + bne.n 73e3c │ │ mov r0, r4 │ │ - bl 73f3c │ │ + bl 73ff0 │ │ mov r5, r0 │ │ ldr r0, [r4, #20] │ │ sub.w r0, r0, r8 │ │ str r0, [r4, #20] │ │ mov r0, r5 │ │ add sp, #20 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - adds r5, #54 @ 0x36 │ │ - vdup.16 d30, d20[2] │ │ - vceq.f32 , , #0 │ │ - vsri.64 d18, d8, #6 │ │ - vqshlu.s32 d19, d29, #26 │ │ - vrinta.f32 d19, d19 │ │ + adds r4, #129 @ 0x81 │ │ + @ instruction: 0xfffaeb70 │ │ + vcge.f32 d19, d12, #0 │ │ + sha256su0.32 q9, q10 │ │ + vrintz.f32 d19, d8 │ │ + vrintn.f32 , q15 │ │ vsli.64 d27, d16, #58 @ 0x3a │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ ldr r0, [r0, #0] │ │ - cbz r0, 73e7c │ │ + cbz r0, 73f30 │ │ ldrd r2, r1, [r4, #4] │ │ cmp r1, r2 │ │ - bcs.n 73efc │ │ + bcs.n 73fb0 │ │ ldrb r0, [r0, r1] │ │ adds r1, #1 │ │ str r1, [r4, #8] │ │ cmp r0, #78 @ 0x4e │ │ - beq.n 73eb2 │ │ + beq.n 73f66 │ │ cmp r0, #79 @ 0x4f │ │ - beq.n 73e8e │ │ + beq.n 73f42 │ │ cmp r0, #82 @ 0x52 │ │ - bne.n 73efc │ │ + bne.n 73fb0 │ │ mov r0, r4 │ │ movs r1, #0 │ │ - bl 7284c │ │ + bl 72900 │ │ cmp r0, #0 │ │ - bne.n 73f0c │ │ + bne.n 73fc0 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 73e72 │ │ - ldr r1, [pc, #196] @ (73f2c ) │ │ + cbz r0, 73f26 │ │ + ldr r1, [pc, #196] @ (73fe0 ) │ │ movs r2, #3 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 73f0c │ │ + bne.n 73fc0 │ │ mov r0, r4 │ │ movs r1, #0 │ │ - bl 7284c │ │ - b.n 73ec0 │ │ + bl 72900 │ │ + b.n 73f74 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 73ec2 │ │ - ldr r1, [pc, #160] @ (73f24 ) │ │ + cbz r0, 73f76 │ │ + ldr r1, [pc, #160] @ (73fd8 ) │ │ movs r2, #1 │ │ add r1, pc │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w 3ffd4 │ │ + b.w 402dc │ │ ldr r0, [r4, #12] │ │ adds r0, #1 │ │ str r0, [r4, #12] │ │ cmp.w r0, #500 @ 0x1f4 │ │ - bls.n 73ec6 │ │ + bls.n 73f7a │ │ ldr r0, [r4, #16] │ │ - cbz r0, 73eaa │ │ - ldr r1, [pc, #152] @ (73f38 ) │ │ + cbz r0, 73f5e │ │ + ldr r1, [pc, #152] @ (73fec ) │ │ movs r2, #25 │ │ add r1, pc │ │ - bl 3ffd4 │ │ - cbnz r0, 73f0c │ │ + bl 402dc │ │ + cbnz r0, 73fc0 │ │ movs r0, #1 │ │ strb r0, [r4, #4] │ │ movs r0, #0 │ │ - b.n 73f14 │ │ + b.n 73fc8 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 73ec2 │ │ - ldr r1, [pc, #120] @ (73f30 ) │ │ + cbz r0, 73f76 │ │ + ldr r1, [pc, #120] @ (73fe4 ) │ │ movs r2, #5 │ │ add r1, pc │ │ - bl 3ffd4 │ │ - cbnz r0, 73f0c │ │ + bl 402dc │ │ + cbnz r0, 73fc0 │ │ movs r0, #0 │ │ pop {r4, r5, r7, pc} │ │ mov r0, r4 │ │ - bl 73e30 │ │ - cbnz r0, 73f0c │ │ - ldr r5, [pc, #100] @ (73f34 ) │ │ + bl 73ee4 │ │ + cbnz r0, 73fc0 │ │ + ldr r5, [pc, #100] @ (73fe8 ) │ │ add r5, pc │ │ ldr r1, [r4, #0] │ │ - cbz r1, 73efc │ │ + cbz r1, 73fb0 │ │ ldrd r2, r0, [r4, #4] │ │ cmp r0, r2 │ │ - bcs.n 73ee4 │ │ + bcs.n 73f98 │ │ ldrb r1, [r1, r0] │ │ cmp r1, #69 @ 0x45 │ │ - beq.n 73f18 │ │ + beq.n 73fcc │ │ ldr r0, [r4, #16] │ │ - cbz r0, 73ef2 │ │ + cbz r0, 73fa6 │ │ mov r1, r5 │ │ movs r2, #3 │ │ - bl 3ffd4 │ │ - cbnz r0, 73f0c │ │ + bl 402dc │ │ + cbnz r0, 73fc0 │ │ mov r0, r4 │ │ - bl 73e30 │ │ - cbnz r0, 73f0c │ │ - b.n 73ed2 │ │ + bl 73ee4 │ │ + cbnz r0, 73fc0 │ │ + b.n 73f86 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 73f10 │ │ - ldr r1, [pc, #36] @ (73f28 ) │ │ + cbz r0, 73fc4 │ │ + ldr r1, [pc, #36] @ (73fdc ) │ │ movs r2, #16 │ │ add r1, pc │ │ - bl 3ffd4 │ │ - cbz r0, 73f10 │ │ + bl 402dc │ │ + cbz r0, 73fc4 │ │ movs r0, #1 │ │ pop {r4, r5, r7, pc} │ │ movs r0, #0 │ │ strb r0, [r4, #4] │ │ str r0, [r4, #0] │ │ pop {r4, r5, r7, pc} │ │ ldr r1, [r4, #12] │ │ adds r0, #1 │ │ subs r1, #1 │ │ strd r0, r1, [r4, #8] │ │ - b.n 73ec2 │ │ - adds r4, #16 │ │ - @ instruction: 0xfffaea58 │ │ - vcge.f32 d19, d31, #0 │ │ - vrintn.f32 , │ │ - vrintn.f32 , q5 │ │ - vrsra.u64 , , #6 │ │ + b.n 73f76 │ │ + adds r3, #91 @ 0x5b │ │ + vtbl.8 d30, {d26-d27}, d20 │ │ + vrsra.u64 , q13, #7 │ │ + sha1su1.32 , q15 │ │ + vrsra.u64 d19, d5, #6 │ │ + vshll.i32 , d20, #32 │ │ vsli.64 , q8, #58 @ 0x3a │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #36 @ 0x24 │ │ mov r4, r0 │ │ ldr r0, [r0, #0] │ │ cmp r0, #0 │ │ - beq.w 74074 │ │ - ldr r1, [pc, #300] @ (74080 ) │ │ + beq.w 74128 │ │ + ldr r1, [pc, #300] @ (74134 ) │ │ add.w r8, sp, #16 │ │ mov.w sl, #0 │ │ mov r9, sp │ │ add r1, pc │ │ mov fp, r1 │ │ ldrd r2, r1, [r4, #4] │ │ cmp r1, r2 │ │ - bcs.n 73f70 │ │ + bcs.n 74024 │ │ ldrb r0, [r0, r1] │ │ cmp r0, #69 @ 0x45 │ │ - beq.w 74070 │ │ + beq.w 74124 │ │ cmp.w sl, #0 │ │ itt ne │ │ ldrne r0, [r4, #16] │ │ cmpne r0, #0 │ │ - beq.n 73f8a │ │ - ldr r1, [pc, #260] @ (74084 ) │ │ + beq.n 7403e │ │ + ldr r1, [pc, #260] @ (74138 ) │ │ movs r2, #3 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 74064 │ │ + bne.n 74118 │ │ mov r0, r4 │ │ - bl 740a0 │ │ + bl 74154 │ │ uxtb r1, r0 │ │ cmp r1, #2 │ │ - beq.n 74064 │ │ + beq.n 74118 │ │ ldr r0, [r4, #0] │ │ - cbz r0, 74010 │ │ + cbz r0, 740c4 │ │ ldrd r3, r2, [r4, #4] │ │ cmp r2, r3 │ │ - bcs.n 74010 │ │ + bcs.n 740c4 │ │ ldrb r0, [r0, r2] │ │ cmp r0, #112 @ 0x70 │ │ - bne.n 74010 │ │ + bne.n 740c4 │ │ adds r0, r2, #1 │ │ str r0, [r4, #8] │ │ lsls r0, r1, #31 │ │ - beq.n 73fbc │ │ + beq.n 74070 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 73fce │ │ - ldr r1, [pc, #212] @ (7408c ) │ │ + cbz r0, 74082 │ │ + ldr r1, [pc, #212] @ (74140 ) │ │ movs r2, #2 │ │ add r1, pc │ │ - b.n 73fc6 │ │ + b.n 7407a │ │ ldr r0, [r4, #16] │ │ - cbz r0, 73fce │ │ - ldr r1, [pc, #196] @ (74088 ) │ │ + cbz r0, 74082 │ │ + ldr r1, [pc, #196] @ (7413c ) │ │ movs r2, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 74064 │ │ + bne.n 74118 │ │ ldr r0, [r4, #0] │ │ - cbz r0, 74020 │ │ + cbz r0, 740d4 │ │ mov r0, r9 │ │ mov r1, r4 │ │ - bl 71e34 │ │ + bl 71ee8 │ │ ldr r0, [sp, #0] │ │ - cbz r0, 74040 │ │ + cbz r0, 740f4 │ │ mov r1, r9 │ │ mov r0, r8 │ │ ldmia.w r1, {r2, r3, r5, r6} │ │ stmia r0!, {r2, r3, r5, r6} │ │ ldr r1, [r4, #16] │ │ - cbz r1, 74004 │ │ + cbz r1, 740b8 │ │ mov r0, r8 │ │ - bl 71f8c │ │ - cbnz r0, 74064 │ │ + bl 72040 │ │ + cbnz r0, 74118 │ │ ldr r0, [r4, #16] │ │ - cbz r0, 74004 │ │ - ldr r1, [pc, #160] @ (7409c ) │ │ + cbz r0, 740b8 │ │ + ldr r1, [pc, #160] @ (74150 ) │ │ movs r2, #3 │ │ add r1, pc │ │ - bl 3ffd4 │ │ - cbnz r0, 74064 │ │ + bl 402dc │ │ + cbnz r0, 74118 │ │ mov r0, r4 │ │ - bl 722dc │ │ + bl 72390 │ │ movs r1, #1 │ │ - cbnz r0, 74064 │ │ - b.n 73f96 │ │ + cbnz r0, 74118 │ │ + b.n 7404a │ │ lsls r0, r1, #31 │ │ itt ne │ │ ldrne r0, [r4, #16] │ │ cmpne r0, #0 │ │ - beq.n 74032 │ │ + beq.n 740e6 │ │ movs r5, #1 │ │ mov r1, fp │ │ - b.n 7402a │ │ + b.n 740de │ │ ldr r0, [r4, #16] │ │ - cbz r0, 74032 │ │ - ldr r1, [pc, #104] @ (74090 ) │ │ + cbz r0, 740e6 │ │ + ldr r1, [pc, #104] @ (74144 ) │ │ movs r5, #1 │ │ add r1, pc │ │ movs r2, #1 │ │ - bl 3ffd4 │ │ - cbnz r0, 74076 │ │ + bl 402dc │ │ + cbnz r0, 7412a │ │ ldr r0, [r4, #0] │ │ add.w sl, sl, #1 │ │ cmp r0, #0 │ │ - bne.w 73f60 │ │ - b.n 74074 │ │ + bne.w 74014 │ │ + b.n 74128 │ │ ldr r0, [r4, #16] │ │ ldrb.w r5, [sp, #4] │ │ - cbz r0, 74068 │ │ - ldr r2, [pc, #72] @ (74094 ) │ │ + cbz r0, 7411c │ │ + ldr r2, [pc, #72] @ (74148 ) │ │ cmp r5, #0 │ │ - ldr r1, [pc, #72] @ (74098 ) │ │ + ldr r1, [pc, #72] @ (7414c ) │ │ add r2, pc │ │ add r1, pc │ │ it eq │ │ moveq r1, r2 │ │ mov.w r2, #16 │ │ it ne │ │ movne r2, #25 │ │ - bl 3ffd4 │ │ - cbz r0, 74068 │ │ + bl 402dc │ │ + cbz r0, 7411c │ │ movs r5, #1 │ │ - b.n 74076 │ │ + b.n 7412a │ │ strb r5, [r4, #4] │ │ movs r5, #0 │ │ str r5, [r4, #0] │ │ - b.n 74076 │ │ + b.n 7412a │ │ adds r0, r1, #1 │ │ str r0, [r4, #8] │ │ movs r5, #0 │ │ mov r0, r5 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - adds r3, #73 @ 0x49 │ │ - vrsra.u32 d19, d20, #6 │ │ - vqmovn.u64 d19, q8 │ │ - vrintn.f32 d19, d25 │ │ - vqmovun.s64 d19, q14 │ │ - vtbl.8 d30, {d10-d11}, d14 │ │ - vclt.s32 d19, d27, #0 │ │ - vrshr.u64 , q3, #6 │ │ + adds r2, #148 @ 0x94 │ │ + vrshr.u32 , , #6 │ │ + vmovn.i64 d19, │ │ + vrsra.u32 , q10, #6 │ │ + vsra.u64 d19, d23, #6 │ │ + vqrshrun.s64 d30, q5, #6 │ │ + vsra.u32 , q11, #7 │ │ + vmovn.i64 d19, │ │ vsli.64 , q8, #58 @ 0x3a │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #32 │ │ ldr r1, [r0, #0] │ │ mov r4, r0 │ │ - cbz r1, 74100 │ │ + cbz r1, 741b4 │ │ ldrd r2, r0, [r4, #4] │ │ cmp r0, r2 │ │ - bcs.n 74100 │ │ + bcs.n 741b4 │ │ ldrb r1, [r1, r0] │ │ cmp r1, #73 @ 0x49 │ │ - beq.n 74116 │ │ + beq.n 741ca │ │ cmp r1, #66 @ 0x42 │ │ - bne.n 74100 │ │ + bne.n 741b4 │ │ adds r0, #1 │ │ mov r5, sp │ │ str r0, [r4, #8] │ │ mov r0, r5 │ │ mov r1, r4 │ │ - bl 73a50 │ │ + bl 73b04 │ │ ldr r0, [sp, #0] │ │ - cbz r0, 74142 │ │ + cbz r0, 741f6 │ │ ldr r0, [r4, #16] │ │ cmp r0, #0 │ │ - beq.n 74170 │ │ + beq.n 74224 │ │ mov ip, r4 │ │ add.w r8, sp, #16 │ │ ldmia.w ip, {r0, r2, r3, r6} │ │ mov r1, r8 │ │ stmia r1!, {r0, r2, r3, r6} │ │ mov r0, r4 │ │ ldmia.w r5, {r1, r2, r3, r6} │ │ stmia r0!, {r1, r2, r3, r6} │ │ mov r0, r4 │ │ - bl 740a0 │ │ + bl 74154 │ │ ldmia.w r8, {r1, r2, r3, r6} │ │ uxtb r0, r0 │ │ stmia r4!, {r1, r2, r3, r6} │ │ - b.n 7410e │ │ + b.n 741c2 │ │ mov r0, r4 │ │ movs r1, #0 │ │ - bl 71920 │ │ + bl 719d4 │ │ cmp r0, #0 │ │ it ne │ │ movne r0, #2 │ │ add sp, #32 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ adds r0, #1 │ │ str r0, [r4, #8] │ │ mov r0, r4 │ │ movs r1, #0 │ │ - bl 71920 │ │ - cbnz r0, 74166 │ │ + bl 719d4 │ │ + cbnz r0, 7421a │ │ ldr r0, [r4, #16] │ │ - cbz r0, 74134 │ │ - ldr r1, [pc, #80] @ (7417c ) │ │ + cbz r0, 741e8 │ │ + ldr r1, [pc, #80] @ (74230 ) │ │ movs r2, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ - cbnz r0, 74166 │ │ + bl 402dc │ │ + cbnz r0, 7421a │ │ mov r0, r4 │ │ - bl 726a4 │ │ + bl 72758 │ │ mov r1, r0 │ │ movs r0, #1 │ │ cmp r1, #0 │ │ - b.n 7410a │ │ + b.n 741be │ │ ldr r0, [r4, #16] │ │ - cbz r0, 7416a │ │ + cbz r0, 7421e │ │ ldrb.w r2, [sp, #4] │ │ - ldr r3, [pc, #40] @ (74174 ) │ │ - ldr r1, [pc, #40] @ (74178 ) │ │ + ldr r3, [pc, #40] @ (74228 ) │ │ + ldr r1, [pc, #40] @ (7422c ) │ │ cmp r2, #0 │ │ mov.w r2, #16 │ │ add r3, pc │ │ add r1, pc │ │ it eq │ │ moveq r1, r3 │ │ it ne │ │ movne r2, #25 │ │ - bl 3ffd4 │ │ - cbz r0, 7416a │ │ + bl 402dc │ │ + cbz r0, 7421e │ │ movs r0, #2 │ │ - b.n 7410e │ │ + b.n 741c2 │ │ ldmia.w r5, {r0, r1, r2, r3} │ │ stmia r4!, {r0, r1, r2, r3} │ │ movs r0, #0 │ │ - b.n 7410e │ │ - @ instruction: 0xe808fff9 │ │ - adds r1, #37 @ 0x25 │ │ - vsra.u32 , q12, #6 │ │ + b.n 741c2 │ │ + b.n 740d4 │ │ + vshr.u32 , q8, #7 │ │ + vtrn.32 , │ │ vsli.64 , q8, #58 @ 0x3a │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #92 @ 0x5c │ │ ldr r1, [r0, #0] │ │ mov sl, r0 │ │ cmp r1, #0 │ │ - beq.w 742de │ │ + beq.w 74392 │ │ ldrd r2, r0, [sl, #4] │ │ cmp r0, r2 │ │ - bcs.n 741ac │ │ + bcs.n 74260 │ │ ldrb r3, [r1, r0] │ │ cmp r3, #85 @ 0x55 │ │ - bne.n 741ac │ │ + bne.n 74260 │ │ adds r0, #1 │ │ movs r6, #1 │ │ str.w r0, [sl, #8] │ │ - b.n 741ae │ │ + b.n 74262 │ │ movs r6, #0 │ │ cmp r0, r2 │ │ - bcs.n 741d6 │ │ + bcs.n 7428a │ │ ldrb r3, [r1, r0] │ │ cmp r3, #75 @ 0x4b │ │ - bne.n 741d6 │ │ + bne.n 7428a │ │ adds r3, r0, #1 │ │ str.w r3, [sl, #8] │ │ cmp r3, r2 │ │ - bcs.n 741f8 │ │ + bcs.n 742ac │ │ ldrb r1, [r1, r3] │ │ cmp r1, #67 @ 0x43 │ │ - bne.n 741f8 │ │ - ldr r4, [pc, #492] @ (743b8 ) │ │ + bne.n 742ac │ │ + ldr r4, [pc, #492] @ (7446c ) │ │ movs r5, #1 │ │ adds r0, #2 │ │ str.w r0, [sl, #8] │ │ add r4, pc │ │ - b.n 74218 │ │ + b.n 742cc │ │ cmp r6, #0 │ │ - beq.w 742de │ │ + beq.w 74392 │ │ movs r4, #0 │ │ ldr.w r0, [sl, #16] │ │ - cbz r0, 741f4 │ │ - ldr r1, [pc, #468] @ (743bc ) │ │ + cbz r0, 742a8 │ │ + ldr r1, [pc, #468] @ (74470 ) │ │ movs r2, #7 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.w 742fa │ │ - cbnz r4, 7421c │ │ - b.n 742de │ │ + bne.w 743ae │ │ + cbnz r4, 742d0 │ │ + b.n 74392 │ │ add r0, sp, #48 @ 0x30 │ │ mov r1, sl │ │ - bl 71e34 │ │ + bl 71ee8 │ │ ldr r4, [sp, #48] @ 0x30 │ │ cmp r4, #0 │ │ - beq.w 7435e │ │ + beq.w 74412 │ │ ldr r5, [sp, #52] @ 0x34 │ │ cmp r5, #0 │ │ - beq.w 7438e │ │ + beq.w 74442 │ │ ldr r0, [sp, #60] @ 0x3c │ │ cmp r0, #0 │ │ - bne.w 7438e │ │ + bne.w 74442 │ │ cmp r6, #0 │ │ - bne.n 741de │ │ + bne.n 74292 │ │ ldr.w r8, [sl, #16] │ │ cmp.w r8, #0 │ │ - beq.n 74236 │ │ - ldr r1, [pc, #428] @ (743d4 ) │ │ + beq.n 742ea │ │ + ldr r1, [pc, #428] @ (74488 ) │ │ mov r0, r8 │ │ movs r2, #8 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 742fa │ │ + bne.n 743ae │ │ movs r0, #1 │ │ movs r1, #0 │ │ strh.w r0, [sp, #44] @ 0x2c │ │ strb.w r0, [sp, #32] │ │ movs r0, #95 @ 0x5f │ │ str r1, [sp, #36] @ 0x24 │ │ strd r1, r5, [sp, #20] │ │ add r1, sp, #8 │ │ stmia r1!, {r0, r4, r5} │ │ add r4, sp, #8 │ │ str r0, [sp, #28] │ │ mov r0, r4 │ │ str r5, [sp, #40] @ 0x28 │ │ - bl 743e8 │ │ + bl 7449c │ │ cmp r0, #0 │ │ - beq.w 743ae │ │ + beq.w 74462 │ │ cmp.w r8, #0 │ │ - beq.n 74276 │ │ + beq.n 7432a │ │ mov r3, r0 │ │ mov r2, r1 │ │ mov r0, r8 │ │ mov r1, r3 │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 742fa │ │ + bne.n 743ae │ │ add.w fp, sp, #48 @ 0x30 │ │ ldmia r4!, {r1, r2, r3, r5, r6} │ │ mov r9, r8 │ │ mov r0, fp │ │ stmia r0!, {r1, r2, r3, r5, r6} │ │ ldmia.w r4, {r1, r2, r3, r5, r6} │ │ stmia r0!, {r1, r2, r3, r5, r6} │ │ - ldr r0, [pc, #332] @ (743d8 ) │ │ + ldr r0, [pc, #332] @ (7448c ) │ │ add r0, pc │ │ str r0, [sp, #4] │ │ mov r0, r9 │ │ mov r6, r0 │ │ mov r0, fp │ │ - bl 743e8 │ │ - cbz r0, 742ca │ │ + bl 7449c │ │ + cbz r0, 7437e │ │ mov r5, r0 │ │ movs r0, #0 │ │ cmp r6, #0 │ │ - beq.n 74290 │ │ + beq.n 74344 │ │ mov r4, r1 │ │ ldr r1, [sp, #4] │ │ mov r0, r6 │ │ movs r2, #1 │ │ - bl 3ffd4 │ │ - cbnz r0, 742fa │ │ + bl 402dc │ │ + cbnz r0, 743ae │ │ mov.w r9, #0 │ │ cmp.w r8, #0 │ │ - beq.n 7428e │ │ + beq.n 74342 │ │ mov r0, r8 │ │ mov r1, r5 │ │ mov r2, r4 │ │ - bl 3ffd4 │ │ + bl 402dc │ │ mov r9, r8 │ │ - cbnz r0, 742fa │ │ - b.n 7428e │ │ + cbnz r0, 743ae │ │ + b.n 74342 │ │ cmp.w r9, #0 │ │ - beq.n 742de │ │ - ldr r1, [pc, #264] @ (743dc ) │ │ + beq.n 74392 │ │ + ldr r1, [pc, #264] @ (74490 ) │ │ mov r0, r9 │ │ movs r2, #2 │ │ add r1, pc │ │ - bl 3ffd4 │ │ - cbnz r0, 742fa │ │ + bl 402dc │ │ + cbnz r0, 743ae │ │ ldr.w r0, [sl, #16] │ │ - cbz r0, 742f0 │ │ - ldr r1, [pc, #216] @ (743c0 ) │ │ + cbz r0, 743a4 │ │ + ldr r1, [pc, #216] @ (74474 ) │ │ movs r2, #3 │ │ add r1, pc │ │ - bl 3ffd4 │ │ - cbnz r0, 742fa │ │ + bl 402dc │ │ + cbnz r0, 743ae │ │ mov r0, sl │ │ - bl 73cac │ │ + bl 73d60 │ │ lsls r0, r0, #31 │ │ - beq.n 74306 │ │ + beq.n 743ba │ │ movs r5, #1 │ │ mov r0, r5 │ │ add sp, #92 @ 0x5c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr.w r0, [sl, #16] │ │ - cbz r0, 7431c │ │ - ldr r1, [pc, #180] @ (743c4 ) │ │ + cbz r0, 743d0 │ │ + ldr r1, [pc, #180] @ (74478 ) │ │ movs r2, #1 │ │ movs r5, #1 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 742fc │ │ + bne.n 743b0 │ │ ldr.w r0, [sl] │ │ - cbz r0, 7433a │ │ + cbz r0, 743ee │ │ ldrd r2, r1, [sl, #4] │ │ cmp r1, r2 │ │ - bcs.n 7433a │ │ + bcs.n 743ee │ │ ldrb r0, [r0, r1] │ │ cmp r0, #117 @ 0x75 │ │ - bne.n 7433a │ │ + bne.n 743ee │ │ movs r5, #0 │ │ adds r0, r1, #1 │ │ str.w r0, [sl, #8] │ │ - b.n 742fc │ │ + b.n 743b0 │ │ ldr.w r0, [sl, #16] │ │ - cbz r0, 7434e │ │ - ldr r1, [pc, #156] @ (743e0 ) │ │ + cbz r0, 74402 │ │ + ldr r1, [pc, #156] @ (74494 ) │ │ movs r2, #4 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 742fa │ │ + bne.n 743ae │ │ mov r0, sl │ │ add sp, #92 @ 0x5c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 722dc │ │ + b.w 72390 │ │ ldr.w r0, [sl, #16] │ │ ldrb.w r4, [sp, #52] @ 0x34 │ │ - cbz r0, 74386 │ │ - ldr r2, [pc, #92] @ (743c8 ) │ │ + cbz r0, 7443a │ │ + ldr r2, [pc, #92] @ (7447c ) │ │ cmp r4, #0 │ │ - ldr r1, [pc, #92] @ (743cc ) │ │ + ldr r1, [pc, #92] @ (74480 ) │ │ add r2, pc │ │ add r1, pc │ │ it eq │ │ moveq r1, r2 │ │ mov.w r2, #16 │ │ it ne │ │ movne r2, #25 │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 742fa │ │ + bne.n 743ae │ │ strb.w r4, [sl, #4] │ │ movs r5, #0 │ │ - b.n 743a8 │ │ + b.n 7445c │ │ ldr.w r0, [sl, #16] │ │ - cbz r0, 743a2 │ │ - ldr r1, [pc, #56] @ (743d0 ) │ │ + cbz r0, 74456 │ │ + ldr r1, [pc, #56] @ (74484 ) │ │ movs r2, #16 │ │ add r1, pc │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 742fa │ │ + bne.n 743ae │ │ movs r5, #0 │ │ strb.w r5, [sl, #4] │ │ str.w r5, [sl] │ │ - b.n 742fc │ │ - ldr r0, [pc, #52] @ (743e4 ) │ │ + b.n 743b0 │ │ + ldr r0, [pc, #52] @ (74498 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ nop │ │ - adds r0, #229 @ 0xe5 │ │ - vshr.u64 , q0, #6 │ │ - @ instruction: 0xfffa2fda │ │ - @ instruction: 0xfffa2fa1 │ │ - vrintz.f32 q15, q15 │ │ - @ instruction: 0xfff92f0b │ │ - vrintz.f32 q15, q2 │ │ - vshr.u64 q9, q10, #7 │ │ - vshr.u32 d19, d23, #6 │ │ - vqrdmlsh.s q9, q13, d25[0] │ │ - @ instruction: 0xfffa1f04 │ │ - vzip.32 d23, d20 │ │ + adds r0, #48 @ 0x30 │ │ + vshr.u32 d19, d11, #6 │ │ + @ instruction: 0xfffa2f25 │ │ + vqrdmlah.s q9, q13, d28[0] │ │ + vsli.32 d30, d26, #26 │ │ + vcvt.f32.u32 q9, q3, #7 │ │ + vsli.32 d30, d0, #26 │ │ + vcgt.s32 q9, q0, #0 │ │ + @ instruction: 0xfffa2f82 │ │ + vcvt.u32.f32 d18, d20, #6 │ │ + vcvt.f32.u32 , q0, #6 │ │ + vuzp.32 d23, d0 │ │ movs r6, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #12 │ │ mov r4, r0 │ │ ldrb.w r0, [r0, #37] @ 0x25 │ │ - cbz r0, 743fe │ │ + cbz r0, 744b2 │ │ movs r0, #0 │ │ - b.n 744b0 │ │ + b.n 74564 │ │ ldrd r9, r0, [r4, #4] │ │ ldr r5, [r4, #16] │ │ str r0, [sp, #8] │ │ cmp r5, r0 │ │ - bhi.n 7448e │ │ + bhi.n 74542 │ │ ldr.w r8, [r4, #12] │ │ cmp r5, r8 │ │ - bcc.n 7448e │ │ + bcc.n 74542 │ │ ldrb.w sl, [r4, #24] │ │ add.w r0, r4, #20 │ │ str r0, [sp, #4] │ │ add r0, sl │ │ ldrb.w r6, [r0, #-1] │ │ sub.w r2, r5, r8 │ │ add.w r3, r9, r8 │ │ cmp r2, #7 │ │ - bhi.n 74444 │ │ + bhi.n 744f8 │ │ movs r1, #0 │ │ - cbz r2, 7444e │ │ + cbz r2, 74502 │ │ ldrb r0, [r3, r1] │ │ cmp r0, r6 │ │ - beq.n 74452 │ │ + beq.n 74506 │ │ adds r1, #1 │ │ cmp r2, r1 │ │ - bne.n 74432 │ │ + bne.n 744e6 │ │ movs r0, #0 │ │ mov r1, r2 │ │ - b.n 74454 │ │ + b.n 74508 │ │ mov r0, r6 │ │ mov r1, r3 │ │ - bl 413e8 │ │ - b.n 74454 │ │ + bl 416f0 │ │ + b.n 74508 │ │ movs r0, #0 │ │ - b.n 74454 │ │ + b.n 74508 │ │ movs r0, #1 │ │ lsls r0, r0, #31 │ │ - beq.n 7448c │ │ + beq.n 74540 │ │ add.w r0, r8, r1 │ │ add.w r8, r0, #1 │ │ str.w r8, [r4, #12] │ │ cmp r8, sl │ │ - bcc.n 74486 │ │ + bcc.n 7453a │ │ ldr r0, [sp, #8] │ │ cmp r8, r0 │ │ - bhi.n 74486 │ │ + bhi.n 7453a │ │ cmp.w sl, #5 │ │ - bcs.n 744c8 │ │ + bcs.n 7457c │ │ sub.w fp, r8, sl │ │ ldr r1, [sp, #4] │ │ add.w r0, r9, fp │ │ mov r2, sl │ │ - blx d8860 │ │ - cbz r0, 744b8 │ │ + blx d8870 │ │ + cbz r0, 7456c │ │ cmp r5, r8 │ │ - bcs.n 74422 │ │ - b.n 7448e │ │ + bcs.n 744d6 │ │ + b.n 74542 │ │ str r5, [r4, #12] │ │ ldrb.w r0, [r4, #36] @ 0x24 │ │ movs r1, #1 │ │ strb.w r1, [r4, #37] @ 0x25 │ │ cmp r0, #1 │ │ - bne.n 744a2 │ │ + bne.n 74556 │ │ ldrd r2, r1, [r4, #28] │ │ - b.n 744aa │ │ + b.n 7455e │ │ ldrd r2, r1, [r4, #28] │ │ cmp r1, r2 │ │ - beq.n 743fa │ │ + beq.n 744ae │ │ add.w r0, r9, r2 │ │ subs r1, r1, r2 │ │ add sp, #12 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r1, [r4, #28] │ │ str.w r8, [r4, #28] │ │ add.w r0, r9, r1 │ │ sub.w r1, fp, r1 │ │ - b.n 744b0 │ │ - ldr r3, [pc, #12] @ (744d8 ) │ │ + b.n 74564 │ │ + ldr r3, [pc, #12] @ (7458c ) │ │ movs r0, #0 │ │ mov r1, sl │ │ movs r2, #4 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ nop │ │ - ldrb r0, [r3, #7] │ │ + ldrb r4, [r6, #4] │ │ movs r6, r0 │ │ push {r4, r5, r7, lr} │ │ ldr r0, [r0, #0] │ │ - ldr r4, [pc, #28] @ (74500 ) │ │ - ldr r5, [pc, #32] @ (74504 ) │ │ + ldr r4, [pc, #28] @ (745b4 ) │ │ + ldr r5, [pc, #32] @ (745b8 ) │ │ ldrb r2, [r0, #0] │ │ add r4, pc │ │ add r5, pc │ │ ldrd r0, r3, [r1] │ │ ldr r3, [r3, #12] │ │ ldr.w r1, [r4, r2, lsl #2] │ │ ldr.w r2, [r5, r2, lsl #2] │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ bx r3 │ │ nop │ │ - ldrb r2, [r7, #20] │ │ + ldrb r6, [r2, #18] │ │ movs r6, r0 │ │ - stmia r3!, {r3, r4, r6, r7} │ │ + stmia r3!, {r2, r5} │ │ vsli.64 , q8, #58 @ 0x3a │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #60 @ 0x3c │ │ ldr r0, [r0, #0] │ │ mov r4, r1 │ │ ldr.w fp, [r0] │ │ cmp.w fp, #0 │ │ - beq.w 74c58 │ │ + beq.w 74d0c │ │ ldrd r0, r1, [r0, #4] │ │ mov.w ip, #0 │ │ str r4, [sp, #24] │ │ str r1, [sp, #12] │ │ cmp ip, r1 │ │ - beq.w 74c74 │ │ + beq.w 74d28 │ │ cmp r0, #0 │ │ - beq.w 74cc8 │ │ + beq.w 74d7c │ │ ldrb.w r8, [fp] │ │ mov r9, r0 │ │ add.w lr, ip, #1 │ │ sub.w r3, r9, #1 │ │ mov r1, r0 │ │ movs r5, #0 │ │ mov r6, r8 │ │ add.w sl, fp, r5 │ │ mov r2, r6 │ │ sxtb r0, r6 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 7459c │ │ + bgt.n 74650 │ │ ldrb.w r0, [sl, #1] │ │ and.w r2, r6, #31 │ │ cmp r6, #224 @ 0xe0 │ │ and.w r0, r0, #63 @ 0x3f │ │ - bcc.n 74592 │ │ + bcc.n 74646 │ │ ldrb.w r4, [sl, #2] │ │ cmp r6, #240 @ 0xf0 │ │ and.w r4, r4, #63 @ 0x3f │ │ orr.w r0, r4, r0, lsl #6 │ │ - bcc.n 74598 │ │ + bcc.n 7464c │ │ ldrb.w r4, [sl, #3] │ │ and.w r2, r2, #7 │ │ and.w r4, r4, #63 @ 0x3f │ │ orr.w r0, r4, r0, lsl #6 │ │ orr.w r2, r0, r2, lsl #18 │ │ - b.n 7459c │ │ + b.n 74650 │ │ orr.w r2, r0, r2, lsl #6 │ │ - b.n 7459c │ │ + b.n 74650 │ │ orr.w r2, r0, r2, lsl #12 │ │ sub.w r0, r2, #48 @ 0x30 │ │ cmp r0, #10 │ │ - bcs.n 745be │ │ + bcs.n 74672 │ │ cmp r3, r5 │ │ - beq.w 74cc8 │ │ + beq.w 74d7c │ │ ldrsb.w r0, [sl, #1] │ │ cmn.w r0, #65 @ 0x41 │ │ - ble.w 74cd0 │ │ + ble.w 74d84 │ │ uxtb r6, r0 │ │ adds r5, #1 │ │ subs r1, #1 │ │ - b.n 7454e │ │ + b.n 74602 │ │ cmp r9, r1 │ │ - beq.w 74ce6 │ │ + beq.w 74d9a │ │ sub.w r3, r9, r1 │ │ movs r2, #10 │ │ str.w lr, [sp, #20] │ │ ldrsb.w r0, [fp, r3] │ │ cmn.w r0, #65 @ 0x41 │ │ - ble.w 74cec │ │ + ble.w 74da0 │ │ cmp r3, #1 │ │ - bne.n 745f0 │ │ + bne.n 746a4 │ │ cmp.w r8, #43 @ 0x2b │ │ mov.w lr, #1 │ │ it ne │ │ cmpne.w r8, #45 @ 0x2d │ │ - beq.w 74cac │ │ + beq.w 74d60 │ │ cmp.w r8, #43 @ 0x2b │ │ mov.w r0, #0 │ │ itt eq │ │ addeq.w fp, fp, #1 │ │ subeq r3, #1 │ │ it eq │ │ moveq.w r0, #4294967295 @ 0xffffffff │ │ cmp r3, #9 │ │ - bcs.n 7465e │ │ + bcs.n 74712 │ │ ldr.w r8, [sp, #24] │ │ mov lr, r2 │ │ - cbz r3, 7468c │ │ + cbz r3, 74740 │ │ negs r0, r0 │ │ movs r3, #0 │ │ ldrb.w r2, [fp] │ │ subs r2, #48 @ 0x30 │ │ cmp r2, #9 │ │ - bhi.w 74ce0 │ │ + bhi.w 74d94 │ │ add.w r3, r3, r3, lsl #2 │ │ adds r0, #1 │ │ add.w fp, fp, #1 │ │ cmp r5, r0 │ │ add.w r3, r2, r3, lsl #1 │ │ - bne.n 74616 │ │ - cbz r3, 7468c │ │ + bne.n 746ca │ │ + cbz r3, 74740 │ │ cmp r1, r3 │ │ - bls.n 74694 │ │ + bls.n 74748 │ │ ldrsb.w r0, [sl, r3] │ │ cmn.w r0, #65 @ 0x41 │ │ - ble.w 74cfc │ │ + ble.w 74db0 │ │ ldrsb.w r0, [sl, r3] │ │ cmn.w r0, #65 @ 0x41 │ │ - ble.w 74d06 │ │ + ble.w 74dba │ │ subs r0, r1, r3 │ │ str r0, [sp, #16] │ │ add.w fp, sl, r3 │ │ mov r1, r3 │ │ - b.n 746a0 │ │ + b.n 74754 │ │ ldr.w r8, [sp, #24] │ │ negs r0, r0 │ │ movs r3, #0 │ │ mov lr, r2 │ │ cmp r5, r0 │ │ - beq.n 74634 │ │ + beq.n 746e8 │ │ umull r2, r4, r3, lr │ │ ldrb.w r3, [fp], #1 │ │ cmp r4, #0 │ │ - bne.w 74c96 │ │ + bne.w 74d4a │ │ subs r3, #48 @ 0x30 │ │ cmp r3, #10 │ │ - bcs.w 74ce0 │ │ + bcs.w 74d94 │ │ adds r3, r3, r2 │ │ add.w r0, r0, #1 │ │ - bcc.n 74668 │ │ - b.n 74ca8 │ │ + bcc.n 7471c │ │ + b.n 74d5c │ │ movs r5, #0 │ │ mov fp, sl │ │ str r1, [sp, #16] │ │ - b.n 746b8 │ │ - bne.w 74cfc │ │ + b.n 7476c │ │ + bne.w 74db0 │ │ add.w fp, sl, r3 │ │ movs r0, #0 │ │ str r0, [sp, #16] │ │ ldrb.w r0, [r8, #10] │ │ lsls r0, r0, #24 │ │ - bpl.n 746b6 │ │ + bpl.n 7476a │ │ ldr r0, [sp, #20] │ │ ldr r2, [sp, #12] │ │ cmp r0, r2 │ │ it eq │ │ cmpeq r6, #104 @ 0x68 │ │ - beq.w 74bcc │ │ + beq.w 74c80 │ │ mov r5, r1 │ │ cmp.w ip, #0 │ │ - beq.n 746d6 │ │ + beq.n 7478a │ │ ldrd r0, r1, [r8] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ mov r4, lr │ │ - ldr r1, [pc, #856] @ (74a24 ) │ │ + ldr r1, [pc, #856] @ (74ad8 ) │ │ add r1, pc │ │ blx r3 │ │ mov lr, r4 │ │ cmp r0, #0 │ │ - bne.w 74c8a │ │ + bne.w 74d3e │ │ cmp r5, #1 │ │ - bls.n 746e8 │ │ + bls.n 7479c │ │ ldrh.w r0, [sl] │ │ movw r1, #9311 @ 0x245f │ │ cmp r0, r1 │ │ - beq.w 74bba │ │ + beq.w 74c6e │ │ mov r9, sl │ │ mov r4, r5 │ │ mov sl, r9 │ │ - cbz r5, 7471e │ │ + cbz r5, 747d2 │ │ ldrb.w r0, [sl] │ │ cmp r0, #36 @ 0x24 │ │ - beq.n 747cc │ │ + beq.n 74880 │ │ cmp r0, #46 @ 0x2e │ │ - bne.n 7471e │ │ + bne.n 747d2 │ │ cmp r4, #1 │ │ - bne.w 74878 │ │ + bne.w 7492c │ │ ldrd r0, r1, [r8] │ │ movs r2, #1 │ │ ldr r3, [r1, #12] │ │ mov r6, r4 │ │ - ldr r1, [pc, #792] @ (74a28 ) │ │ + ldr r1, [pc, #792] @ (74adc ) │ │ movs r5, #10 │ │ movs r4, #1 │ │ add r1, pc │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.w 74c8c │ │ - b.n 74b3a │ │ + bne.w 74d40 │ │ + b.n 74bee │ │ add.w r0, sl, r4 │ │ str r4, [sp, #28] │ │ movs r4, #0 │ │ mov r1, sl │ │ cmp r1, r0 │ │ - beq.w 74b9c │ │ + beq.w 74c50 │ │ mov r3, r1 │ │ mov r5, r4 │ │ ldrsb.w r4, [r3], #1 │ │ cmp.w r4, #4294967295 @ 0xffffffff │ │ uxtb r2, r4 │ │ - bgt.n 7477e │ │ + bgt.n 74832 │ │ ldrb r4, [r1, #1] │ │ and.w r3, r2, #31 │ │ cmp r2, #224 @ 0xe0 │ │ and.w r4, r4, #63 @ 0x3f │ │ - bcc.n 74770 │ │ + bcc.n 74824 │ │ ldrb r6, [r1, #2] │ │ cmp r2, #240 @ 0xf0 │ │ and.w r6, r6, #63 @ 0x3f │ │ orr.w r4, r6, r4, lsl #6 │ │ - bcc.n 74778 │ │ + bcc.n 7482c │ │ ldrb r2, [r1, #3] │ │ and.w r3, r3, #7 │ │ and.w r2, r2, #63 @ 0x3f │ │ orr.w r2, r2, r4, lsl #6 │ │ orr.w r2, r2, r3, lsl #18 │ │ adds r3, r1, #4 │ │ - b.n 7477e │ │ + b.n 74832 │ │ orr.w r2, r4, r3, lsl #6 │ │ adds r3, r1, #2 │ │ - b.n 7477e │ │ + b.n 74832 │ │ orr.w r2, r4, r3, lsl #12 │ │ adds r3, r1, #3 │ │ cmp r2, #36 @ 0x24 │ │ - beq.n 7478e │ │ + beq.n 74842 │ │ subs r1, r5, r1 │ │ cmp r2, #46 @ 0x2e │ │ add.w r4, r1, r3 │ │ mov r1, r3 │ │ - bne.n 74728 │ │ + bne.n 747dc │ │ cmp r5, #0 │ │ - beq.n 74836 │ │ + beq.n 748ea │ │ ldr r4, [sp, #28] │ │ ldr.w r8, [sp, #24] │ │ cmp r5, r4 │ │ - bcs.n 74852 │ │ + bcs.n 74906 │ │ ldrsb.w r0, [sl, r5] │ │ cmn.w r0, #65 @ 0x41 │ │ - ble.w 74c78 │ │ + ble.w 74d2c │ │ ldrd r0, r1, [r8] │ │ mov r2, r5 │ │ ldr r3, [r1, #12] │ │ mov r1, sl │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.w 74c8a │ │ + bne.w 74d3e │ │ ldrsb.w r0, [sl, r5] │ │ cmn.w r0, #64 @ 0x40 │ │ - blt.w 74d0e │ │ + blt.w 74dc2 │ │ mov.w lr, #10 │ │ - b.n 74870 │ │ + b.n 74924 │ │ cmp r4, #1 │ │ - beq.n 747dc │ │ + beq.n 74890 │ │ ldrsb.w r0, [sl, #1] │ │ cmn.w r0, #65 @ 0x41 │ │ - ble.w 74d20 │ │ + ble.w 74dd4 │ │ add.w r8, sl, #1 │ │ subs r5, r4, #1 │ │ str r4, [sp, #28] │ │ movs r4, #0 │ │ subs r2, r5, r4 │ │ add.w r3, r8, r4 │ │ cmp r2, #7 │ │ - bhi.n 74806 │ │ + bhi.n 748ba │ │ movs r1, #0 │ │ - cbz r2, 74814 │ │ + cbz r2, 748c8 │ │ ldrb r0, [r3, r1] │ │ cmp r0, #36 @ 0x24 │ │ - beq.n 74818 │ │ + beq.n 748cc │ │ adds r1, #1 │ │ cmp r2, r1 │ │ - bne.n 747f4 │ │ + bne.n 748a8 │ │ movs r0, #0 │ │ mov r1, r2 │ │ - b.n 7481a │ │ + b.n 748ce │ │ movs r0, #36 @ 0x24 │ │ mov r1, r3 │ │ mov r6, lr │ │ - bl 413e8 │ │ + bl 416f0 │ │ mov lr, r6 │ │ - b.n 7481a │ │ + b.n 748ce │ │ movs r0, #0 │ │ - b.n 7481a │ │ + b.n 748ce │ │ movs r0, #1 │ │ lsls r0, r0, #31 │ │ - beq.w 74b9c │ │ + beq.w 74c50 │ │ add r1, r4 │ │ adds r4, r1, #1 │ │ cmp r1, r5 │ │ - bcs.n 74830 │ │ + bcs.n 748e4 │ │ ldrb.w r0, [r8, r1] │ │ cmp r0, #36 @ 0x24 │ │ - beq.n 748c8 │ │ + beq.n 7497c │ │ cmp r5, r4 │ │ - bcs.n 747e6 │ │ - b.n 74b9c │ │ + bcs.n 7489a │ │ + b.n 74c50 │ │ ldr.w r8, [sp, #24] │ │ movs r2, #0 │ │ movs r5, #0 │ │ mov r4, lr │ │ ldrd r0, r1, [r8] │ │ ldr r3, [r1, #12] │ │ mov r1, sl │ │ blx r3 │ │ mov lr, r4 │ │ ldr r4, [sp, #28] │ │ - cbz r0, 74870 │ │ - b.n 74c8a │ │ - bne.w 74c78 │ │ + cbz r0, 74924 │ │ + b.n 74d3e │ │ + bne.w 74d2c │ │ ldrd r0, r1, [r8] │ │ mov r2, r4 │ │ ldr r3, [r1, #12] │ │ mov r1, sl │ │ mov r4, lr │ │ blx r3 │ │ mov lr, r4 │ │ ldr r4, [sp, #28] │ │ cmp r0, #0 │ │ mov r5, r4 │ │ - bne.w 74c8a │ │ + bne.w 74d3e │ │ add.w r9, sl, r5 │ │ subs r5, r4, r5 │ │ - b.n 746ea │ │ + b.n 7479e │ │ ldrsb.w r0, [sl, #1] │ │ cmn.w r0, #65 @ 0x41 │ │ - ble.w 74d1a │ │ + ble.w 74dce │ │ uxtb r1, r0 │ │ sxtb r0, r1 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.w 74aea │ │ + bgt.w 74b9e │ │ ldrb.w r2, [sl, #2] │ │ and.w r0, r1, #31 │ │ cmp r1, #224 @ 0xe0 │ │ and.w r2, r2, #63 @ 0x3f │ │ - bcc.n 74912 │ │ + bcc.n 749c6 │ │ ldrb.w r3, [sl, #3] │ │ cmp r1, #240 @ 0xf0 │ │ and.w r3, r3, #63 @ 0x3f │ │ orr.w r2, r3, r2, lsl #6 │ │ - bcc.w 74ae6 │ │ + bcc.w 74b9a │ │ ldrb.w r1, [sl, #4] │ │ and.w r0, r0, #7 │ │ and.w r1, r1, #63 @ 0x3f │ │ orr.w r1, r1, r2, lsl #6 │ │ orr.w r1, r1, r0, lsl #18 │ │ - b.n 74aea │ │ + b.n 74b9e │ │ ldrsb.w r0, [r8] │ │ cmn.w r0, #64 @ 0x40 │ │ - blt.w 74d50 │ │ + blt.w 74e04 │ │ ldr r6, [sp, #28] │ │ adds r2, r1, #2 │ │ cmp r6, r2 │ │ - bls.n 748e8 │ │ + bls.n 7499c │ │ ldrsb.w r3, [sl, r2] │ │ cmn.w r3, #64 @ 0x40 │ │ - blt.w 74d68 │ │ + blt.w 74e1c │ │ add.w r9, sl, r2 │ │ uxtb r0, r0 │ │ subs r6, r6, r2 │ │ cmp r1, #1 │ │ str r6, [sp, #8] │ │ - beq.n 74980 │ │ + beq.n 74a34 │ │ cmp r1, #2 │ │ - beq.n 74918 │ │ + beq.n 749cc │ │ cmp r1, #0 │ │ - beq.w 74b9c │ │ + beq.w 74c50 │ │ cmp r0, #117 @ 0x75 │ │ - bne.w 74b9c │ │ + bne.w 74c50 │ │ ldrsb.w r0, [sl, #2] │ │ cmn.w r0, #64 @ 0x40 │ │ - bge.n 7498c │ │ - b.n 74d72 │ │ + bge.n 74a40 │ │ + b.n 74e26 │ │ orr.w r1, r2, r0, lsl #6 │ │ - b.n 74aea │ │ + b.n 74b9e │ │ ldrh.w r2, [r8] │ │ movw r3, #20563 @ 0x5053 │ │ cmp r2, r3 │ │ - beq.w 74b4e │ │ + beq.w 74c02 │ │ ldrh.w r2, [r8] │ │ movw r3, #20546 @ 0x5042 │ │ cmp r2, r3 │ │ - beq.w 74b56 │ │ + beq.w 74c0a │ │ ldrh.w r2, [r8] │ │ movw r3, #18002 @ 0x4652 │ │ cmp r2, r3 │ │ - beq.w 74b5e │ │ + beq.w 74c12 │ │ ldrh.w r2, [r8] │ │ movw r3, #21580 @ 0x544c │ │ cmp r2, r3 │ │ - beq.w 74b66 │ │ + beq.w 74c1a │ │ ldrh.w r2, [r8] │ │ movw r3, #21575 @ 0x5447 │ │ cmp r2, r3 │ │ - beq.w 74b74 │ │ + beq.w 74c28 │ │ ldrh.w r2, [r8] │ │ movw r3, #20556 @ 0x504c │ │ cmp r2, r3 │ │ - beq.w 74b7c │ │ + beq.w 74c30 │ │ ldrh.w r2, [r8] │ │ movw r3, #20562 @ 0x5052 │ │ cmp r2, r3 │ │ - bne.n 74900 │ │ - ldr r1, [pc, #176] @ (74a2c ) │ │ + bne.n 749b4 │ │ + ldr r1, [pc, #176] @ (74ae0 ) │ │ movs r5, #10 │ │ add r1, pc │ │ - b.n 74b82 │ │ + b.n 74c36 │ │ cmp r0, #67 @ 0x43 │ │ - beq.w 74b46 │ │ + beq.w 74bfa │ │ cmp r0, #117 @ 0x75 │ │ - bne.w 74b9c │ │ + bne.w 74c50 │ │ add.w r5, sl, #2 │ │ add.w ip, r8, r1 │ │ subs r2, r1, #1 │ │ mov r3, r5 │ │ cmp r3, ip │ │ - beq.n 74a14 │ │ + beq.n 74ac8 │ │ mov r0, r3 │ │ ldrsb.w r6, [r3], #1 │ │ cmp.w r6, #4294967295 @ 0xffffffff │ │ uxtb r4, r6 │ │ - bgt.n 749fc │ │ + bgt.n 74ab0 │ │ ldrb r3, [r0, #1] │ │ and.w lr, r4, #31 │ │ mov.w r8, #10 │ │ cmp r4, #224 @ 0xe0 │ │ and.w r3, r3, #63 @ 0x3f │ │ - bcc.n 749ec │ │ + bcc.n 74aa0 │ │ ldrb r6, [r0, #2] │ │ cmp r4, #240 @ 0xf0 │ │ and.w r6, r6, #63 @ 0x3f │ │ orr.w r3, r6, r3, lsl #6 │ │ - bcc.n 749f4 │ │ + bcc.n 74aa8 │ │ ldrb r4, [r0, #3] │ │ and.w r6, lr, #7 │ │ and.w r4, r4, #63 @ 0x3f │ │ orr.w r3, r4, r3, lsl #6 │ │ orr.w r4, r3, r6, lsl #18 │ │ cmp.w r4, #1114112 @ 0x110000 │ │ - beq.w 74b6e │ │ + beq.w 74c22 │ │ adds r3, r0, #4 │ │ mov.w lr, #10 │ │ - b.n 749fc │ │ + b.n 74ab0 │ │ orr.w r4, r3, lr, lsl #6 │ │ adds r3, r0, #2 │ │ - b.n 749fa │ │ + b.n 74aae │ │ orr.w r4, r3, lr, lsl #12 │ │ adds r3, r0, #3 │ │ mov lr, r8 │ │ sub.w r0, r4, #58 @ 0x3a │ │ cmn.w r0, #11 │ │ itt ls │ │ subls.w r0, r4, #103 @ 0x67 │ │ cmnls.w r0, #7 │ │ - bhi.n 74998 │ │ + bhi.n 74a4c │ │ movs r0, #0 │ │ - b.n 74a16 │ │ + b.n 74aca │ │ movs r0, #1 │ │ cmp r1, #2 │ │ - beq.n 74a30 │ │ + beq.n 74ae4 │ │ cmp r1, #1 │ │ - beq.w 74b9c │ │ + beq.w 74c50 │ │ ldrb r1, [r5, #0] │ │ - b.n 74a3c │ │ - cmp r3, #203 @ 0xcb │ │ - @ instruction: 0xfffa2cb7 │ │ - vqshrn.u64 d18, , #6 │ │ + b.n 74af0 │ │ + cmp r3, #22 │ │ + vdup.16 d18, d2[2] │ │ + vtbl.8 d18, {d26}, d2 │ │ vtbl.8 d23, {d10}, d25 │ │ cmp r1, #43 @ 0x2b │ │ it ne │ │ cmpne r1, #45 @ 0x2d │ │ - beq.w 74b9c │ │ + beq.w 74c50 │ │ cmp r1, #43 @ 0x2b │ │ mov.w r1, #0 │ │ itt eq │ │ addeq r5, #1 │ │ subeq r2, #1 │ │ cmp r2, #9 │ │ - bcs.n 74a76 │ │ - cbz r2, 74aba │ │ + bcs.n 74b2a │ │ + cbz r2, 74b6e │ │ ldrb r6, [r5, #0] │ │ sub.w r4, r6, #65 @ 0x41 │ │ sub.w r3, r6, #48 @ 0x30 │ │ cmp r6, #57 @ 0x39 │ │ bic.w r4, r4, #32 │ │ it hi │ │ addhi.w r3, r4, #10 │ │ cmp r3, #15 │ │ - bhi.w 74b9c │ │ + bhi.w 74c50 │ │ orr.w r1, r3, r1, lsl #4 │ │ adds r5, #1 │ │ subs r2, #1 │ │ - bne.n 74a4e │ │ - b.n 74aa6 │ │ + bne.n 74b02 │ │ + b.n 74b5a │ │ movs r3, #0 │ │ cmp.w r3, r1, lsr #28 │ │ - bne.w 74b9c │ │ + bne.w 74c50 │ │ ldrb r6, [r5, #0] │ │ sub.w r4, r6, #65 @ 0x41 │ │ sub.w r3, r6, #48 @ 0x30 │ │ cmp r6, #57 @ 0x39 │ │ bic.w r4, r4, #32 │ │ it hi │ │ addhi.w r3, r4, #10 │ │ cmp r3, #16 │ │ - bcs.w 74b9c │ │ + bcs.w 74c50 │ │ orr.w r1, r3, r1, lsl #4 │ │ adds r5, #1 │ │ subs r2, #1 │ │ - bne.n 74a76 │ │ + bne.n 74b2a │ │ eor.w r2, r1, #55296 @ 0xd800 │ │ movw r3, #2048 @ 0x800 │ │ sub.w r2, r2, #1114112 @ 0x110000 │ │ movt r3, #65519 @ 0xffef │ │ cmp r2, r3 │ │ - bcc.n 74b9c │ │ + bcc.n 74c50 │ │ cmp r0, #0 │ │ - beq.n 74b9c │ │ + beq.n 74c50 │ │ cmp r1, #32 │ │ str r1, [sp, #32] │ │ itt cs │ │ subcs.w r0, r1, #127 @ 0x7f │ │ cmpcs r0, #33 @ 0x21 │ │ - bcc.n 74b9c │ │ + bcc.n 74c50 │ │ ldr.w r8, [sp, #24] │ │ add r0, sp, #32 │ │ mov r4, lr │ │ mov r1, r8 │ │ - bl 40138 │ │ + bl 40440 │ │ ldr r5, [sp, #8] │ │ mov lr, r4 │ │ cmp r0, #0 │ │ - bne.w 74c8a │ │ - b.n 746ea │ │ + bne.w 74d3e │ │ + b.n 7479e │ │ orr.w r1, r2, r0, lsl #12 │ │ ldrd r0, r2, [r8] │ │ movs r5, #10 │ │ ldr r3, [r2, #12] │ │ cmp r1, #46 @ 0x2e │ │ - bne.n 74b1c │ │ - ldr r1, [pc, #728] @ (74dd0 ) │ │ + bne.n 74bd0 │ │ + ldr r1, [pc, #728] @ (74e84 ) │ │ movs r2, #2 │ │ add r1, pc │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.w 74c8a │ │ + bne.w 74d3e │ │ cmp r4, #3 │ │ - bcc.n 74b14 │ │ + bcc.n 74bc8 │ │ ldrsb.w r0, [sl, #2] │ │ cmn.w r0, #64 @ 0x40 │ │ - blt.w 74d5c │ │ + blt.w 74e10 │ │ add.w r9, sl, #2 │ │ subs r0, r4, #2 │ │ - b.n 74b40 │ │ - ldr r1, [pc, #684] @ (74dcc ) │ │ + b.n 74bf4 │ │ + ldr r1, [pc, #684] @ (74e80 ) │ │ movs r2, #1 │ │ mov r6, r4 │ │ movs r4, #1 │ │ add r1, pc │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.w 74c8c │ │ + bne.w 74d40 │ │ ldrsb.w r0, [sl, #1] │ │ cmn.w r0, #64 @ 0x40 │ │ - blt.w 74d3e │ │ + blt.w 74df2 │ │ add.w r9, sl, #1 │ │ subs r0, r6, #1 │ │ mov lr, r5 │ │ mov r5, r0 │ │ - b.n 746ea │ │ - ldr r1, [pc, #636] @ (74dc4 ) │ │ + b.n 7479e │ │ + ldr r1, [pc, #636] @ (74e78 ) │ │ movs r5, #10 │ │ add r1, pc │ │ - b.n 74b82 │ │ - ldr r1, [pc, #600] @ (74da8 ) │ │ + b.n 74c36 │ │ + ldr r1, [pc, #600] @ (74e5c ) │ │ movs r5, #10 │ │ add r1, pc │ │ - b.n 74b82 │ │ - ldr r1, [pc, #600] @ (74db0 ) │ │ + b.n 74c36 │ │ + ldr r1, [pc, #600] @ (74e64 ) │ │ movs r5, #10 │ │ add r1, pc │ │ - b.n 74b82 │ │ - ldr r1, [pc, #596] @ (74db4 ) │ │ + b.n 74c36 │ │ + ldr r1, [pc, #596] @ (74e68 ) │ │ movs r5, #10 │ │ add r1, pc │ │ - b.n 74b82 │ │ - ldr r1, [pc, #592] @ (74db8 ) │ │ + b.n 74c36 │ │ + ldr r1, [pc, #592] @ (74e6c ) │ │ movs r5, #10 │ │ add r1, pc │ │ - b.n 74b82 │ │ + b.n 74c36 │ │ movs r0, #1 │ │ mov lr, r8 │ │ - b.n 74a16 │ │ - ldr r1, [pc, #580] @ (74dbc ) │ │ + b.n 74aca │ │ + ldr r1, [pc, #580] @ (74e70 ) │ │ movs r5, #10 │ │ add r1, pc │ │ - b.n 74b82 │ │ - ldr r1, [pc, #576] @ (74dc0 ) │ │ + b.n 74c36 │ │ + ldr r1, [pc, #576] @ (74e74 ) │ │ movs r5, #10 │ │ add r1, pc │ │ ldr.w r8, [sp, #24] │ │ movs r4, #1 │ │ ldrd r0, r2, [r8] │ │ ldr r3, [r2, #12] │ │ movs r2, #1 │ │ blx r3 │ │ mov lr, r5 │ │ ldr r5, [sp, #8] │ │ cmp r0, #0 │ │ - bne.n 74c8c │ │ - b.n 746ea │ │ + bne.n 74d40 │ │ + b.n 7479e │ │ ldr r4, [sp, #24] │ │ ldr r2, [sp, #28] │ │ ldrd r0, r1, [r4] │ │ ldr r3, [r1, #12] │ │ mov r1, sl │ │ blx r3 │ │ cmp r0, #0 │ │ ldr.w ip, [sp, #20] │ │ ldrd r1, r0, [sp, #12] │ │ - beq.w 7452e │ │ - b.n 74c8a │ │ + beq.w 745e2 │ │ + b.n 74d3e │ │ mov r9, sl │ │ ldrsb.w r0, [r9, #1]! │ │ cmn.w r0, #64 @ 0x40 │ │ - blt.w 74d32 │ │ + blt.w 74de6 │ │ subs r5, #1 │ │ - b.n 746ea │ │ + b.n 7479e │ │ cmp r1, #1 │ │ - beq.n 74bdc │ │ + beq.n 74c90 │ │ ldrsb.w r0, [sl, #1] │ │ cmn.w r0, #64 @ 0x40 │ │ - blt.w 74d4a │ │ + blt.w 74dfe │ │ add.w r0, sl, r1 │ │ add.w r5, sl, #1 │ │ cmp r5, r0 │ │ - beq.n 74c74 │ │ + beq.n 74d28 │ │ mov r3, r5 │ │ ldrsb.w r6, [r5], #1 │ │ cmp.w r6, #4294967295 @ 0xffffffff │ │ uxtb r2, r6 │ │ - bgt.n 74c3c │ │ + bgt.n 74cf0 │ │ ldrb r5, [r3, #1] │ │ and.w r6, r2, #31 │ │ cmp r2, #224 @ 0xe0 │ │ and.w r5, r5, #63 @ 0x3f │ │ - bcc.n 74c2e │ │ + bcc.n 74ce2 │ │ ldrb r4, [r3, #2] │ │ cmp r2, #240 @ 0xf0 │ │ and.w r4, r4, #63 @ 0x3f │ │ orr.w r5, r4, r5, lsl #6 │ │ - bcc.n 74c36 │ │ + bcc.n 74cea │ │ ldrb r2, [r3, #3] │ │ and.w r6, r6, #7 │ │ and.w r2, r2, #63 @ 0x3f │ │ orr.w r2, r2, r5, lsl #6 │ │ orr.w r2, r2, r6, lsl #18 │ │ cmp.w r2, #1114112 @ 0x110000 │ │ - beq.n 74c74 │ │ + beq.n 74d28 │ │ adds r5, r3, #4 │ │ - b.n 74c3c │ │ + b.n 74cf0 │ │ orr.w r2, r5, r6, lsl #6 │ │ adds r5, r3, #2 │ │ - b.n 74c3c │ │ + b.n 74cf0 │ │ orr.w r2, r5, r6, lsl #12 │ │ adds r5, r3, #3 │ │ sub.w r6, r2, #65 @ 0x41 │ │ sub.w r3, r2, #48 @ 0x30 │ │ cmp r2, #57 @ 0x39 │ │ bic.w r6, r6, #33 @ 0x21 │ │ it hi │ │ addhi.w r3, r6, #10 │ │ cmp r3, #15 │ │ - bhi.w 746b6 │ │ - b.n 74be4 │ │ + bhi.w 7476a │ │ + b.n 74c98 │ │ ldrd r0, r1, [r0, #4] │ │ add r3, sp, #32 │ │ movs r2, #0 │ │ stmia r3!, {r0, r1, r2} │ │ add r0, sp, #32 │ │ movs r1, #1 │ │ str r2, [sp, #52] @ 0x34 │ │ strd r2, r4, [sp, #44] @ 0x2c │ │ - bl 71920 │ │ + bl 719d4 │ │ mov r4, r0 │ │ - b.n 74c8c │ │ + b.n 74d40 │ │ movs r4, #0 │ │ - b.n 74c8c │ │ - ldr r0, [pc, #288] @ (74d9c ) │ │ + b.n 74d40 │ │ + ldr r0, [pc, #288] @ (74e50 ) │ │ mov r1, r4 │ │ movs r2, #0 │ │ mov r3, r5 │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, sl │ │ - bl 3fd1c │ │ + bl 40024 │ │ movs r4, #1 │ │ mov r0, r4 │ │ add sp, #60 @ 0x3c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ sub.w r0, r3, #48 @ 0x30 │ │ mov.w lr, #1 │ │ cmp r0, #10 │ │ it cc │ │ movcc.w lr, #2 │ │ - b.n 74cac │ │ + b.n 74d60 │ │ mov.w lr, #2 │ │ - ldr r0, [pc, #208] @ (74d80 ) │ │ + ldr r0, [pc, #208] @ (74e34 ) │ │ sub.w r2, r7, #29 │ │ - ldr r3, [pc, #208] @ (74d84 ) │ │ - ldr r1, [pc, #208] @ (74d88 ) │ │ + ldr r3, [pc, #208] @ (74e38 ) │ │ + ldr r1, [pc, #208] @ (74e3c ) │ │ add r0, pc │ │ add r3, pc │ │ strb.w lr, [r7, #-29] │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ - ldr r0, [pc, #272] @ (74ddc ) │ │ + bl 417b8 │ │ + ldr r0, [pc, #272] @ (74e90 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #168] @ (74d7c ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #168] @ (74e30 ) │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, sl │ │ movs r2, #1 │ │ mov r3, r1 │ │ - bl 3fd1c │ │ + bl 40024 │ │ mov.w lr, #1 │ │ - b.n 74cac │ │ + b.n 74d60 │ │ mov.w lr, #0 │ │ - b.n 74cac │ │ - ldr r0, [pc, #156] @ (74d8c ) │ │ + b.n 74d60 │ │ + ldr r0, [pc, #156] @ (74e40 ) │ │ mov r1, r9 │ │ movs r2, #0 │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ - bl 3fd1c │ │ - ldr r0, [pc, #144] @ (74d90 ) │ │ + bl 40024 │ │ + ldr r0, [pc, #144] @ (74e44 ) │ │ mov r2, r3 │ │ mov r3, r1 │ │ add r0, pc │ │ - b.n 74c82 │ │ - ldr r0, [pc, #140] @ (74d94 ) │ │ + b.n 74d36 │ │ + ldr r0, [pc, #140] @ (74e48 ) │ │ movs r2, #0 │ │ add r0, pc │ │ - b.n 74c82 │ │ - ldr r0, [pc, #144] @ (74da0 ) │ │ + b.n 74d36 │ │ + ldr r0, [pc, #144] @ (74e54 ) │ │ mov r1, r4 │ │ mov r2, r5 │ │ mov r3, r4 │ │ add r0, pc │ │ - b.n 74c82 │ │ - ldr r0, [pc, #172] @ (74dc8 ) │ │ + b.n 74d36 │ │ + ldr r0, [pc, #172] @ (74e7c ) │ │ add r0, pc │ │ - b.n 74d24 │ │ - ldr r0, [pc, #128] @ (74da4 ) │ │ + b.n 74dd8 │ │ + ldr r0, [pc, #128] @ (74e58 ) │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, sl │ │ mov r1, r4 │ │ movs r2, #1 │ │ mov r3, r4 │ │ - bl 3fd1c │ │ - ldr r0, [pc, #172] @ (74de0 ) │ │ + bl 40024 │ │ + ldr r0, [pc, #172] @ (74e94 ) │ │ mov r1, r5 │ │ movs r2, #1 │ │ mov r3, r5 │ │ add r0, pc │ │ - b.n 74c82 │ │ - ldr r0, [pc, #152] @ (74dd8 ) │ │ + b.n 74d36 │ │ + ldr r0, [pc, #152] @ (74e8c ) │ │ mov r1, r6 │ │ movs r2, #1 │ │ mov r3, r6 │ │ add r0, pc │ │ - b.n 74c82 │ │ - ldr r0, [pc, #76] @ (74d98 ) │ │ + b.n 74d36 │ │ + ldr r0, [pc, #76] @ (74e4c ) │ │ add r0, pc │ │ - b.n 74cd4 │ │ - ldr r0, [pc, #144] @ (74de4 ) │ │ + b.n 74d88 │ │ + ldr r0, [pc, #144] @ (74e98 ) │ │ ldr r1, [sp, #28] │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, sl │ │ - b.n 74d2a │ │ - ldr r0, [pc, #116] @ (74dd4 ) │ │ + b.n 74dde │ │ + ldr r0, [pc, #116] @ (74e88 ) │ │ mov r1, r4 │ │ movs r2, #2 │ │ mov r3, r4 │ │ add r0, pc │ │ - b.n 74c82 │ │ - ldr r0, [pc, #64] @ (74dac ) │ │ + b.n 74d36 │ │ + ldr r0, [pc, #64] @ (74e60 ) │ │ mov r1, r6 │ │ mov r3, r6 │ │ add r0, pc │ │ - b.n 74c82 │ │ - ldr r0, [pc, #116] @ (74de8 ) │ │ + b.n 74d36 │ │ + ldr r0, [pc, #116] @ (74e9c ) │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, r8 │ │ - b.n 74cd8 │ │ - ldr r2, [r5, #28] │ │ + b.n 74d8c │ │ + ldr r6, [r0, #20] │ │ movs r6, r0 │ │ - @ instruction: 0x47cd │ │ - @ instruction: 0xfffa69bc │ │ + bx r3 │ │ + vtbl.8 d22, {d10-d11}, d8 │ │ movs r6, r0 │ │ - ldr r6, [r3, #32] │ │ + ldr r2, [r7, #20] │ │ movs r6, r0 │ │ - ldr r2, [r3, #28] │ │ + ldr r6, [r6, #16] │ │ movs r6, r0 │ │ - ldr r2, [r5, #28] │ │ + ldr r6, [r0, #20] │ │ movs r6, r0 │ │ - ldr r2, [r6, #28] │ │ + ldr r6, [r1, #20] │ │ movs r6, r0 │ │ - ldr r0, [r1, #8] │ │ + str r4, [r4, #124] @ 0x7c │ │ movs r6, r0 │ │ - ldr r4, [r3, #40] @ 0x28 │ │ + ldr r0, [r7, #28] │ │ movs r6, r0 │ │ - ldr r6, [r2, #32] │ │ + ldr r2, [r6, #20] │ │ movs r6, r0 │ │ - ldr r2, [r3, #32] │ │ + ldr r6, [r6, #20] │ │ movs r6, r0 │ │ - cmp r0, #118 @ 0x76 │ │ - vtbx.8 d22, {d26-d27}, d30 │ │ + movs r7, #193 @ 0xc1 │ │ + vtbx.8 d22, {d10-d11}, d10 │ │ movs r6, r0 │ │ - movs r7, #78 @ 0x4e │ │ - vrint?.f32 q9, q2 │ │ - vqshl.u32 d18, d26, #26 │ │ - vrint?.f32 d18, d29 │ │ - vqshl.u32 d18, d17, #26 │ │ - vrint?.f32 q9, q12 │ │ - vtbx.8 d22, {d10-d12}, d16 │ │ + movs r6, #153 @ 0x99 │ │ + vrintm.f32 d18, d15 │ │ + vrintm.f32 d18, d5 │ │ + vqshlu.s32 q9, q12, #26 │ │ + vqshlu.s32 q9, q14, #26 │ │ + vqshlu.s64 d18, d19, #58 @ 0x3a │ │ + @ instruction: 0xfffa69bc │ │ movs r6, r0 │ │ - cmp r0, #165 @ 0xa5 │ │ - vqshl.u64 d18, d11, #58 @ 0x3a │ │ - vtbl.8 d22, {d10-d12}, d24 │ │ + movs r7, #240 @ 0xf0 │ │ + vrintm.f32 q9, q11 │ │ + vtbl.8 d22, {d26-d27}, d4 │ │ movs r6, r0 │ │ - ldr r6, [r2, #36] @ 0x24 │ │ + ldr r2, [r6, #24] │ │ movs r6, r0 │ │ - ldr r2, [r4, #28] │ │ + ldr r6, [r7, #16] │ │ movs r6, r0 │ │ - ldr r2, [r2, #28] │ │ + ldr r6, [r5, #16] │ │ movs r6, r0 │ │ - ldr r0, [r7, #28] │ │ + ldr r4, [r2, #20] │ │ movs r6, r0 │ │ - ldr r0, [r7, #28] │ │ + ldr r4, [r2, #20] │ │ movs r6, r0 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r2, r1 │ │ - ldr r1, [pc, #36] @ (74e1c ) │ │ - ldr r3, [pc, #40] @ (74e20 ) │ │ + ldr r1, [pc, #36] @ (74ed0 ) │ │ + ldr r3, [pc, #40] @ (74ed4 ) │ │ add.w ip, sp, #12 │ │ - ldr r4, [pc, #36] @ (74e24 ) │ │ + ldr r4, [pc, #36] @ (74ed8 ) │ │ add r1, pc │ │ str r0, [sp, #12] │ │ movs r0, #4 │ │ add r3, pc │ │ strd r0, ip, [sp] │ │ mov r0, r2 │ │ movs r2, #13 │ │ add r4, pc │ │ str r4, [sp, #8] │ │ - bl 40f68 │ │ + bl 41270 │ │ add sp, #16 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ - movs r5, #171 @ 0xab │ │ - vrintn.f32 d17, d20 │ │ + movs r4, #246 @ 0xf6 │ │ + vrsra.u32 , q8, #6 │ │ vrintm.f32 , │ │ vsli.64 , q0, #63 @ 0x3f │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ movs r2, #0 │ │ cmp r1, #128 @ 0x80 │ │ str r2, [sp, #4] │ │ - bcs.n 74e3e │ │ + bcs.n 74ef2 │ │ strb.w r1, [sp, #4] │ │ movs r2, #1 │ │ - b.n 74ea2 │ │ + b.n 74f56 │ │ movw ip, #65534 @ 0xfffe │ │ mov r3, r1 │ │ movt ip, #1023 @ 0x3ff │ │ lsrs r2, r1, #6 │ │ bfi r3, ip, #6, #26 │ │ cmp.w r1, #2048 @ 0x800 │ │ - bcs.n 74e64 │ │ + bcs.n 74f18 │ │ orr.w r1, r2, #192 @ 0xc0 │ │ strb.w r3, [sp, #5] │ │ strb.w r1, [sp, #4] │ │ movs r2, #2 │ │ - b.n 74ea2 │ │ + b.n 74f56 │ │ bfi r2, ip, #6, #26 │ │ mov.w lr, r1, lsr #12 │ │ movs r4, #0 │ │ cmp.w r4, r1, lsr #16 │ │ - bne.n 74e84 │ │ + bne.n 74f38 │ │ strb.w r2, [sp, #5] │ │ orr.w r1, lr, #224 @ 0xe0 │ │ strb.w r3, [sp, #6] │ │ movs r2, #3 │ │ - b.n 74e9e │ │ + b.n 74f52 │ │ strb.w r2, [sp, #6] │ │ movs r2, #4 │ │ mvn.w r4, #15 │ │ orr.w r1, r4, r1, lsr #18 │ │ bfi lr, ip, #6, #26 │ │ strb.w r3, [sp, #7] │ │ strb.w lr, [sp, #5] │ │ @@ -115595,17 +115538,17 @@ │ │ ldrd r1, r3, [r0] │ │ movs r4, #0 │ │ subs r3, r3, r2 │ │ it cc │ │ movcc r4, #1 │ │ orrs r1, r4 │ │ strd r1, r3, [r0] │ │ - beq.n 74eba │ │ + beq.n 74f6e │ │ movs r0, #1 │ │ - b.n 74ec6 │ │ + b.n 74f7a │ │ ldr r0, [r0, #8] │ │ ldrd r0, r1, [r0] │ │ ldr r3, [r1, #12] │ │ add r1, sp, #4 │ │ blx r3 │ │ add sp, #8 │ │ pop {r4, r6, r7, pc} │ │ @@ -115623,1089 +115566,1059 @@ │ │ ldr r0, [r0, #8] │ │ ldrd r0, r3, [r0] │ │ ldr r3, [r3, #12] │ │ ldmia.w sp!, {r7, lr} │ │ bx r3 │ │ mov r3, r2 │ │ mov r2, r1 │ │ - ldr r1, [pc, #4] @ (74f04 ) │ │ + ldr r1, [pc, #4] @ (74fb8 ) │ │ add r1, pc │ │ - b.w 3ef94 │ │ - str r6, [r0, #120] @ 0x78 │ │ + b.w 3f29c │ │ + str r2, [r4, #108] @ 0x6c │ │ movs r6, r0 │ │ ldrd r0, r2, [r1] │ │ - ldr r1, [pc, #8] @ (74f18 ) │ │ + ldr r1, [pc, #8] @ (74fcc ) │ │ ldr r3, [r2, #12] │ │ movs r2, #18 │ │ add r1, pc │ │ bx r3 │ │ nop │ │ - movs r4, #164 @ 0xa4 │ │ + movs r3, #239 @ 0xef │ │ @ instruction: 0xfffae9d1 │ │ stmia r3!, {} │ │ ldrd r1, r2, [r0] │ │ ldr r3, [r3, #12] │ │ mov r0, ip │ │ bx r3 │ │ - bmi.n 74ed6 │ │ + bmi.n 74f8a │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #20 │ │ ldr r6, [r0, #4] │ │ cmp r6, #1 │ │ - beq.n 74f96 │ │ + beq.n 7504a │ │ cmp r6, #2 │ │ - beq.n 74f7e │ │ + beq.n 75032 │ │ cmp r6, #0 │ │ - beq.n 74ffc │ │ + beq.n 750b0 │ │ ldrd r4, r5, [r1] │ │ mov r7, r0 │ │ ldr.w sl, [r5, #12] │ │ movs r2, #7 │ │ - ldr r1, [pc, #188] @ (7500c ) │ │ + ldr r1, [pc, #188] @ (750c0 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx sl │ │ - cbnz r0, 74f76 │ │ + cbnz r0, 7502a │ │ ldr r7, [r7, #0] │ │ mov r3, sp │ │ - ldr r2, [pc, #204] @ (75028 ) │ │ + ldr r2, [pc, #204] @ (750dc ) │ │ mov r1, r5 │ │ - ldr r0, [pc, #204] @ (7502c ) │ │ + ldr r0, [pc, #204] @ (750e0 ) │ │ add r2, pc │ │ str r7, [sp, #16] │ │ add r0, pc │ │ str r0, [sp, #4] │ │ mov fp, r0 │ │ add r0, sp, #16 │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ - bl 3ef94 │ │ - cbz r0, 74fb4 │ │ + bl 3f29c │ │ + cbz r0, 75068 │ │ movs r0, #1 │ │ add sp, #20 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r3, [r0, #0] │ │ - ldr r4, [pc, #148] @ (75018 ) │ │ + ldr r4, [pc, #148] @ (750cc ) │ │ ldrd r0, r1, [r1] │ │ add.w r7, r3, #8 │ │ - ldr r2, [pc, #144] @ (7501c ) │ │ + ldr r2, [pc, #144] @ (750d0 ) │ │ add r4, pc │ │ str r4, [sp, #12] │ │ add r2, pc │ │ str r7, [sp, #8] │ │ - b.n 74fa4 │ │ + b.n 75058 │ │ ldr r3, [r0, #0] │ │ - ldr r4, [pc, #132] @ (75020 ) │ │ + ldr r4, [pc, #132] @ (750d4 ) │ │ ldrd r0, r1, [r1] │ │ - ldr r2, [pc, #132] @ (75024 ) │ │ + ldr r2, [pc, #132] @ (750d8 ) │ │ add r4, pc │ │ add r2, pc │ │ str r3, [sp, #0] │ │ mov r3, sp │ │ str r4, [sp, #4] │ │ - bl 3ef94 │ │ + bl 3f29c │ │ add sp, #20 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ lsls r0, r6, #3 │ │ sub.w r6, r0, #8 │ │ - ldr r0, [pc, #116] @ (75030 ) │ │ + ldr r0, [pc, #116] @ (750e4 ) │ │ adds r7, #8 │ │ add r0, pc │ │ mov r9, r0 │ │ - ldr r0, [pc, #112] @ (75034 ) │ │ + ldr r0, [pc, #112] @ (750e8 ) │ │ add r0, pc │ │ mov r8, r0 │ │ mov r0, r4 │ │ mov r1, r9 │ │ movs r2, #2 │ │ str r7, [sp, #16] │ │ blx sl │ │ cmp r0, #0 │ │ - bne.n 74f76 │ │ + bne.n 7502a │ │ add r0, sp, #16 │ │ strd r0, fp, [sp] │ │ mov r0, r4 │ │ mov r1, r5 │ │ mov r2, r8 │ │ mov r3, sp │ │ - bl 3ef94 │ │ + bl 3f29c │ │ cmp r0, #0 │ │ - bne.n 74f76 │ │ + bne.n 7502a │ │ adds r7, #8 │ │ subs r6, #8 │ │ mov.w r0, #0 │ │ - bne.n 74fc8 │ │ + bne.n 7507c │ │ add sp, #20 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #16] @ (75010 ) │ │ + ldr r0, [pc, #16] @ (750c4 ) │ │ movs r1, #14 │ │ - ldr r2, [pc, #16] @ (75014 ) │ │ + ldr r2, [pc, #16] @ (750c8 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ + bl 3fd54 │ │ nop │ │ - movs r4, #138 @ 0x8a │ │ - sha256su0.32 q9, q5 │ │ - vrintp.f32 d22, d24 │ │ + movs r3, #213 @ 0xd5 │ │ + vrsra.u32 d18, d5, #6 │ │ + vrint?.f32 d22, d4 │ │ movs r6, r0 │ │ - add r1, pc, #868 @ (adr r1, 75380 ) │ │ - vdup.16 , d13[3] │ │ - vcle.s32 q13, , #0 │ │ - vsri.64 q12, q7, #2 │ │ - vceq.f32 d24, d16, #0 │ │ + add r1, pc, #772 @ (adr r1, 753d4 ) │ │ + @ instruction: 0xfffe5b11 │ │ + vcle.s32 d26, d29, #0 │ │ + @ instruction: 0xfffe856a │ │ + vcle.f32 d24, d28, #0 │ │ vshr.u64 q8, , #7 │ │ movs r0, r0 │ │ - movs r4, #35 @ 0x23 │ │ - vsri.64 d24, d28, #6 │ │ + movs r3, #110 @ 0x6e │ │ + vrinta.f32 q12, q4 │ │ vtbl.8 d22, {d9}, d0 │ │ mov r3, r1 │ │ ldrd r1, r2, [r0] │ │ mov r0, r3 │ │ - b.w 3ffd4 │ │ + b.w 402dc │ │ ldrd r2, r3, [r1] │ │ ldrd r0, r1, [r0] │ │ - b.w 3faa0 │ │ + b.w 3fda8 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #100 @ 0x64 │ │ ldrb r1, [r0, #0] │ │ cmp r1, #3 │ │ - bcs.n 75064 │ │ + bcs.n 75118 │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - beq.n 75092 │ │ + beq.n 75146 │ │ cmp r1, #4 │ │ - bne.n 750a4 │ │ + bne.n 75158 │ │ ldrd r4, r7, [r0, #8] │ │ mov r6, r0 │ │ - cbz r7, 75080 │ │ + cbz r7, 75134 │ │ mov r5, r4 │ │ mov r0, r5 │ │ - bl 75052 │ │ + bl 75106 │ │ adds r5, #24 │ │ subs r7, #1 │ │ - bne.n 75074 │ │ + bne.n 75128 │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ - beq.n 7505e │ │ + beq.n 75112 │ │ mov r0, r4 │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ ldr r1, [r0, #4] │ │ cmp r1, #0 │ │ - beq.n 7505e │ │ + beq.n 75112 │ │ ldr r0, [r0, #8] │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ ldr r1, [r0, #4] │ │ mov.w r9, #0 │ │ - cbz r1, 750c0 │ │ + cbz r1, 75174 │ │ ldrd r2, r0, [r0, #8] │ │ strd r9, r1, [sp, #24] │ │ strd r9, r1, [sp, #8] │ │ movs r1, #1 │ │ str r2, [sp, #32] │ │ str r2, [sp, #16] │ │ - b.n 750c4 │ │ + b.n 75178 │ │ movs r1, #0 │ │ movs r0, #0 │ │ add.w r8, sp, #40 @ 0x28 │ │ add.w sl, sp, #4 │ │ add.w fp, sp, #88 @ 0x58 │ │ add r7, sp, #52 @ 0x34 │ │ str r0, [sp, #36] @ 0x24 │ │ str r1, [sp, #20] │ │ str r1, [sp, #4] │ │ mov r0, r8 │ │ mov r1, sl │ │ - bl 4de98 │ │ + bl 331f8 │ │ ldr r4, [sp, #40] @ 0x28 │ │ cmp r4, #0 │ │ - beq.n 7505e │ │ + beq.n 75112 │ │ ldr r0, [sp, #48] @ 0x30 │ │ add.w r5, r0, r0, lsl #1 │ │ add.w r0, r4, r5, lsl #2 │ │ ldr.w r1, [r0, #268] @ 0x10c │ │ cmp r1, #0 │ │ ittt ne │ │ addne.w r0, r0, #268 @ 0x10c │ │ ldrne r0, [r0, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r5, r4, r5, lsl #3 │ │ ldrb r0, [r5, #0] │ │ cmp r0, #3 │ │ - bcc.n 750d8 │ │ - beq.n 75124 │ │ + bcc.n 7518c │ │ + beq.n 751d8 │ │ cmp r0, #4 │ │ - bne.n 75132 │ │ + bne.n 751e6 │ │ ldr r6, [r5, #12] │ │ - cbz r6, 75124 │ │ + cbz r6, 751d8 │ │ ldr r4, [r5, #8] │ │ mov r0, r4 │ │ - bl 75052 │ │ + bl 75106 │ │ adds r4, #24 │ │ subs r6, #1 │ │ - bne.n 75118 │ │ + bne.n 751cc │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ - beq.n 750d8 │ │ + beq.n 7518c │ │ ldr r0, [r5, #8] │ │ - blx d87c0 │ │ - b.n 750d8 │ │ + blx d87d0 │ │ + b.n 7518c │ │ ldr r1, [r5, #4] │ │ - cbz r1, 7514a │ │ + cbz r1, 751fe │ │ ldrd r2, r0, [r5, #8] │ │ strd r9, r1, [sp, #72] @ 0x48 │ │ strd r9, r1, [sp, #56] @ 0x38 │ │ movs r1, #1 │ │ str r2, [sp, #80] @ 0x50 │ │ str r2, [sp, #64] @ 0x40 │ │ - b.n 7514e │ │ + b.n 75202 │ │ movs r1, #0 │ │ movs r0, #0 │ │ str r0, [sp, #84] @ 0x54 │ │ str r1, [sp, #68] @ 0x44 │ │ str r1, [sp, #52] @ 0x34 │ │ - b.n 7515c │ │ + b.n 75210 │ │ adds r0, r5, #4 │ │ - bl 751b6 │ │ + bl 7526a │ │ mov r0, fp │ │ mov r1, r7 │ │ - bl 4de98 │ │ + bl 331f8 │ │ ldr r4, [sp, #88] @ 0x58 │ │ cmp r4, #0 │ │ - beq.n 750d8 │ │ + beq.n 7518c │ │ ldr r0, [sp, #96] @ 0x60 │ │ add.w r5, r0, r0, lsl #1 │ │ add.w r0, r4, r5, lsl #2 │ │ ldr.w r1, [r0, #268] @ 0x10c │ │ cmp r1, #0 │ │ ittt ne │ │ addne.w r0, r0, #268 @ 0x10c │ │ ldrne r0, [r0, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r5, r4, r5, lsl #3 │ │ ldrb r0, [r5, #0] │ │ cmp r0, #3 │ │ - bcc.n 7515c │ │ - beq.n 751a8 │ │ + bcc.n 75210 │ │ + beq.n 7525c │ │ cmp r0, #4 │ │ - bne.n 75156 │ │ + bne.n 7520a │ │ ldr r6, [r5, #12] │ │ - cbz r6, 751a8 │ │ + cbz r6, 7525c │ │ ldr r4, [r5, #8] │ │ mov r0, r4 │ │ - bl 75052 │ │ + bl 75106 │ │ adds r4, #24 │ │ subs r6, #1 │ │ - bne.n 7519c │ │ + bne.n 75250 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ - beq.n 7515c │ │ + beq.n 75210 │ │ ldr r0, [r5, #8] │ │ - blx d87c0 │ │ - b.n 7515c │ │ + blx d87d0 │ │ + b.n 75210 │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #48 @ 0x30 │ │ ldr r2, [r0, #0] │ │ movs r1, #0 │ │ - cbz r2, 751da │ │ + cbz r2, 7528e │ │ add.w ip, sp, #20 │ │ ldrd r3, r0, [r0, #4] │ │ stmia.w ip, {r1, r2, r3} │ │ add.w ip, sp, #4 │ │ stmia.w ip, {r1, r2, r3} │ │ movs r1, #1 │ │ - b.n 751dc │ │ + b.n 75290 │ │ movs r0, #0 │ │ add.w r8, sp, #36 @ 0x24 │ │ mov r5, sp │ │ str r0, [sp, #32] │ │ str r1, [sp, #16] │ │ str r1, [sp, #0] │ │ - b.n 751f0 │ │ + b.n 752a4 │ │ adds r0, r7, #4 │ │ - bl 751b6 │ │ + bl 7526a │ │ mov r0, r8 │ │ mov r1, r5 │ │ - bl 4de98 │ │ + bl 331f8 │ │ ldr r4, [sp, #36] @ 0x24 │ │ - cbz r4, 75248 │ │ + cbz r4, 752fc │ │ ldr r0, [sp, #44] @ 0x2c │ │ add.w r6, r0, r0, lsl #1 │ │ add.w r0, r4, r6, lsl #2 │ │ ldr.w r1, [r0, #268] @ 0x10c │ │ cmp r1, #0 │ │ ittt ne │ │ addne.w r0, r0, #268 @ 0x10c │ │ ldrne r0, [r0, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r7, r4, r6, lsl #3 │ │ ldrb r0, [r7, #0] │ │ cmp r0, #3 │ │ - bcc.n 751f0 │ │ - beq.n 7523a │ │ + bcc.n 752a4 │ │ + beq.n 752ee │ │ cmp r0, #4 │ │ - bne.n 751ea │ │ + bne.n 7529e │ │ ldr r4, [r7, #12] │ │ - cbz r4, 7523a │ │ + cbz r4, 752ee │ │ ldr r6, [r7, #8] │ │ mov r0, r6 │ │ - bl 75052 │ │ + bl 75106 │ │ adds r6, #24 │ │ subs r4, #1 │ │ - bne.n 7522e │ │ + bne.n 752e2 │ │ ldr r0, [r7, #4] │ │ cmp r0, #0 │ │ - beq.n 751f0 │ │ + beq.n 752a4 │ │ ldr r0, [r7, #8] │ │ - blx d87c0 │ │ - b.n 751f0 │ │ + blx d87d0 │ │ + b.n 752a4 │ │ add sp, #48 @ 0x30 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ push {r7, lr} │ │ sub sp, #16 │ │ ldr r3, [r0, #0] │ │ - cbz r3, 75274 │ │ + cbz r3, 75328 │ │ cmp r3, #1 │ │ ldrd r0, r3, [r0, #8] │ │ strd r0, r3, [sp, #8] │ │ ite ne │ │ movne r0, #2 │ │ moveq r0, #1 │ │ strb.w r0, [sp] │ │ mov r0, sp │ │ - bl 7528c │ │ + bl 75340 │ │ add sp, #16 │ │ pop {r7, pc} │ │ vldr d16, [r0, #8] │ │ movs r0, #3 │ │ strb.w r0, [sp] │ │ vstr d16, [sp, #8] │ │ mov r0, sp │ │ - bl 7528c │ │ + bl 75340 │ │ add sp, #16 │ │ pop {r7, pc} │ │ push {r4, r5, r7, lr} │ │ sub sp, #40 @ 0x28 │ │ strd r1, r2, [sp] │ │ ldrd ip, r2, [r0] │ │ ldrd r3, r1, [r0, #8] │ │ - ldr r4, [pc, #40] @ (752c8 ) │ │ - ldr r5, [pc, #44] @ (752cc ) │ │ - ldr r0, [pc, #44] @ (752d0 ) │ │ + ldr r4, [pc, #40] @ (7537c ) │ │ + ldr r5, [pc, #44] @ (75380 ) │ │ + ldr r0, [pc, #44] @ (75384 ) │ │ add r4, pc │ │ strd r3, r1, [sp, #16] │ │ mov r1, sp │ │ add r5, pc │ │ strd r5, r1, [sp, #28] │ │ add r1, sp, #8 │ │ str r1, [sp, #24] │ │ add r0, pc │ │ add r1, sp, #24 │ │ strd ip, r2, [sp, #8] │ │ str r4, [sp, #36] @ 0x24 │ │ - bl 754ec │ │ + bl 5f210 │ │ add sp, #40 @ 0x28 │ │ pop {r4, r5, r7, pc} │ │ nop │ │ - push {r0, r1, r4, r5} │ │ - vaddl.u q8, d14, d23 │ │ + lsls r7, r0, #9 │ │ + movs r0, r0 │ │ + movs r7, r4 │ │ movs r0, r0 │ │ - add r4, sp, #476 @ 0x1dc │ │ + add r4, sp, #84 @ 0x54 │ │ vsli.64 d27, d16, #57 @ 0x39 │ │ sub sp, #40 @ 0x28 │ │ ldrb r2, [r0, #0] │ │ cmp r2, #3 │ │ - beq.n 752f6 │ │ + beq.n 753aa │ │ cmp r2, #7 │ │ - bne.n 75338 │ │ + bne.n 753ec │ │ ldrd r0, r2, [r1] │ │ - ldr r1, [pc, #512] @ (754e8 ) │ │ + ldr r1, [pc, #512] @ (7559c ) │ │ ldr r3, [r2, #12] │ │ add r1, pc │ │ movs r2, #4 │ │ add sp, #40 @ 0x28 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ bx r3 │ │ vldr d0, [r0, #8] │ │ movw r5, #65535 @ 0xffff │ │ movt r5, #32751 @ 0x7fef │ │ vmov r2, r3, d0 │ │ bic.w r0, r3, #2147483648 @ 0x80000000 │ │ cmp r0, r5 │ │ - ble.n 75364 │ │ - ldr r0, [pc, #452] @ (754d4 ) │ │ + ble.n 75418 │ │ + ldr r0, [pc, #452] @ (75588 ) │ │ cmp.w r3, #4294967295 @ 0xffffffff │ │ - ldr r4, [pc, #448] @ (754d8 ) │ │ + ldr r4, [pc, #448] @ (7558c ) │ │ bfc r3, #20, #12 │ │ add r0, pc │ │ - ldr r5, [pc, #444] @ (754dc ) │ │ + ldr r5, [pc, #444] @ (75590 ) │ │ add r4, pc │ │ it le │ │ movle r4, r0 │ │ mov.w r0, #4 │ │ it gt │ │ movgt r0, #3 │ │ add r5, pc │ │ orrs r2, r3 │ │ itt ne │ │ movne r4, r5 │ │ movne r0, #3 │ │ - b.n 75372 │ │ + b.n 75426 │ │ mov r3, r0 │ │ ldrd r0, r1, [r1] │ │ tbb [pc, r2] │ │ ldrh r1, [r1, #0] │ │ - add r1, pc, #292 @ (adr r1, 7546c ) │ │ + add r1, pc, #292 @ (adr r1, 75520 ) │ │ ldrb r2, [r0, #14] │ │ - add r1, pc, #312 @ (adr r1, 75484 ) │ │ + add r1, pc, #312 @ (adr r1, 75538 ) │ │ subs r5, #96 @ 0x60 │ │ adds r4, #114 @ 0x72 │ │ cmp r0, #105 @ 0x69 │ │ ldrsb r3, [r5, r4] │ │ lsls r0, r3 │ │ ldrb r3, [r3, #1] │ │ - ldr r4, [pc, #304] @ (75488 ) │ │ - ldr r2, [pc, #304] @ (7548c ) │ │ + ldr r4, [pc, #304] @ (7553c ) │ │ + ldr r2, [pc, #304] @ (75540 ) │ │ add r4, pc │ │ strb.w r3, [sp, #32] │ │ add r2, pc │ │ - b.n 75462 │ │ + b.n 75516 │ │ add r4, sp, #8 │ │ mov r5, r1 │ │ mov r0, r4 │ │ - bl 9a4e8 │ │ + bl 9a4f4 │ │ mov r1, r5 │ │ subs r0, r0, r4 │ │ - ldr r3, [pc, #364] @ (754e0 ) │ │ + ldr r3, [pc, #364] @ (75594 ) │ │ strd r4, r0, [sp] │ │ ldrd r0, r1, [r1] │ │ add r3, pc │ │ - ldr r2, [pc, #356] @ (754e4 ) │ │ + ldr r2, [pc, #356] @ (75598 ) │ │ str r3, [sp, #36] @ 0x24 │ │ mov r3, sp │ │ str r3, [sp, #32] │ │ add r2, pc │ │ add r3, sp, #32 │ │ - bl 3ef94 │ │ + bl 3f29c │ │ add sp, #40 @ 0x28 │ │ pop {r4, r5, r7, pc} │ │ - ldr r2, [pc, #304] @ (754c4 ) │ │ + ldr r2, [pc, #304] @ (75578 ) │ │ add r2, pc │ │ - b.n 75406 │ │ - ldr r2, [pc, #300] @ (754c8 ) │ │ + b.n 754ba │ │ + ldr r2, [pc, #300] @ (7557c ) │ │ ldr r3, [r1, #12] │ │ add r2, pc │ │ mov r1, r2 │ │ movs r2, #15 │ │ add sp, #40 @ 0x28 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ bx r3 │ │ - ldr r2, [pc, #272] @ (754bc ) │ │ + ldr r2, [pc, #272] @ (75570 ) │ │ ldr r3, [r1, #12] │ │ add r2, pc │ │ mov r1, r2 │ │ movs r2, #3 │ │ add sp, #40 @ 0x28 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ bx r3 │ │ - ldr r2, [pc, #244] @ (754b4 ) │ │ + ldr r2, [pc, #244] @ (75568 ) │ │ add r2, pc │ │ - b.n 75476 │ │ + b.n 7552a │ │ ldrd r3, r2, [r3, #4] │ │ ldr.w ip, [r1, #12] │ │ mov r1, r3 │ │ add sp, #40 @ 0x28 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ bx ip │ │ ldrd r3, r5, [r3, #8] │ │ - ldr r4, [pc, #188] @ (75498 ) │ │ + ldr r4, [pc, #188] @ (7554c ) │ │ add r4, pc │ │ - b.n 7545a │ │ - ldr r2, [pc, #204] @ (754ac ) │ │ + b.n 7550e │ │ + ldr r2, [pc, #204] @ (75560 ) │ │ ldr r3, [r1, #12] │ │ add r2, pc │ │ mov r1, r2 │ │ movs r2, #10 │ │ add sp, #40 @ 0x28 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ bx r3 │ │ - ldr r2, [pc, #216] @ (754cc ) │ │ + ldr r2, [pc, #216] @ (75580 ) │ │ ldr r3, [r1, #12] │ │ add r2, pc │ │ mov r1, r2 │ │ movs r2, #13 │ │ add sp, #40 @ 0x28 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ bx r3 │ │ - ldr r2, [pc, #172] @ (754b0 ) │ │ + ldr r2, [pc, #172] @ (75564 ) │ │ add r2, pc │ │ ldr r3, [r1, #12] │ │ mov r1, r2 │ │ movs r2, #12 │ │ add sp, #40 @ 0x28 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ bx r3 │ │ - ldr r2, [pc, #168] @ (754c0 ) │ │ + ldr r2, [pc, #168] @ (75574 ) │ │ ldr r3, [r1, #12] │ │ add r2, pc │ │ mov r1, r2 │ │ movs r2, #4 │ │ add sp, #40 @ 0x28 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ bx r3 │ │ - ldr r2, [pc, #144] @ (754b8 ) │ │ + ldr r2, [pc, #144] @ (7556c ) │ │ ldr r3, [r1, #12] │ │ add r2, pc │ │ mov r1, r2 │ │ movs r2, #8 │ │ add sp, #40 @ 0x28 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ bx r3 │ │ ldrd r3, r5, [r3, #4] │ │ - ldr r4, [pc, #100] @ (754a4 ) │ │ - ldr r2, [pc, #104] @ (754a8 ) │ │ + ldr r4, [pc, #100] @ (75558 ) │ │ + ldr r2, [pc, #104] @ (7555c ) │ │ add r4, pc │ │ add r2, pc │ │ - b.n 7545e │ │ + b.n 75512 │ │ ldr r3, [r3, #4] │ │ - ldr r4, [pc, #80] @ (7549c ) │ │ - ldr r2, [pc, #84] @ (754a0 ) │ │ + ldr r4, [pc, #80] @ (75550 ) │ │ + ldr r2, [pc, #84] @ (75554 ) │ │ add r4, pc │ │ add r2, pc │ │ - b.n 75460 │ │ + b.n 75514 │ │ ldrd r3, r5, [r3, #8] │ │ - ldr r4, [pc, #56] @ (75490 ) │ │ + ldr r4, [pc, #56] @ (75544 ) │ │ add r4, pc │ │ - ldr r2, [pc, #56] @ (75494 ) │ │ + ldr r2, [pc, #56] @ (75548 ) │ │ add r2, pc │ │ str r5, [sp, #36] @ 0x24 │ │ str r3, [sp, #32] │ │ add r3, sp, #32 │ │ str r3, [sp, #8] │ │ str r4, [sp, #12] │ │ add r3, sp, #8 │ │ - bl 3ef94 │ │ + bl 3f29c │ │ add sp, #40 @ 0x28 │ │ pop {r4, r5, r7, pc} │ │ - ldr r2, [pc, #92] @ (754d0 ) │ │ + ldr r2, [pc, #92] @ (75584 ) │ │ add r2, pc │ │ ldr r3, [r1, #12] │ │ mov r1, r2 │ │ movs r2, #14 │ │ add sp, #40 @ 0x28 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ bx r3 │ │ udf #254 @ 0xfe │ │ nop │ │ - add r5, sp, #716 @ 0x2cc │ │ - vabal.u q10, d28, d6 │ │ - vcgt.f32 , , #0 │ │ - vshll.u32 , d19, #28 │ │ - vcgt.f32 , , #0 │ │ - vqdmulh.s q13, q14, d25[0] │ │ - vrev32. , q5 │ │ + add sp, #28 │ │ + vsli.64 d20, d21, #60 @ 0x3c │ │ + vqshlu.s64 d27, d11, #57 @ 0x39 │ │ + vtbx.8 d25, {d28-d30}, d0 │ │ + vrsubhn.i d27, , │ │ + vcvt.u32.f32 d26, d29, #4 │ │ + vrev64. , q12 │ │ vdup.8 d31, d3[4] │ │ - vsra.u32 d22, d27, #1 │ │ - vcgt.s32 d18, d1, #0 │ │ - vqrdmlsh.s , q13, d25[0] │ │ - vshr.u32 d18, d27, #6 │ │ - vqrdmlah.s q8, q13, d14[0] │ │ - vshr.u32 q9, , #6 │ │ - vcvt.f32.u32 d16, d20, #6 │ │ - vshr.u32 q9, q11, #6 │ │ - vshr.u32 q9, q13, #6 │ │ - vshr.u32 d18, d17, #6 │ │ - @ instruction: 0xfffa1fbe │ │ - vcvt.u32.f32 d16, d26, #6 │ │ - @ instruction: 0xfffa2fdf │ │ - @ instruction: 0xfffa2fd4 │ │ - vqrdmulh.s , q13, d25[0] │ │ - vcvt.f32.u32 d18, d24, #2 │ │ - vqrdmlsh.s q8, , d6[0] │ │ - vsli.32 , q8, #26 │ │ - sub sp, #16 │ │ - mov r5, r0 │ │ - mov r2, r1 │ │ - lsls r0, r1, #31 │ │ - bne.n 7550a │ │ - add r0, sp, #4 │ │ - mov r1, r5 │ │ - bl 3e0ec │ │ - add r0, sp, #4 │ │ - bl 75540 │ │ - add sp, #16 │ │ - pop {r4, r5, r6, pc} │ │ - lsrs r4, r2, #1 │ │ - cmp r2, #2 │ │ - bcs.n 75514 │ │ - movs r6, #1 │ │ - b.n 7551e │ │ - mov r0, r4 │ │ - blx d87f0 │ │ - mov r6, r0 │ │ - cbz r0, 75538 │ │ - mov r0, r6 │ │ - mov r1, r5 │ │ - mov r2, r4 │ │ - bl d53c6 │ │ - str r4, [sp, #12] │ │ - strd r4, r6, [sp, #4] │ │ - add r0, sp, #4 │ │ - bl 75540 │ │ - add sp, #16 │ │ - pop {r4, r5, r6, pc} │ │ - movs r0, #1 │ │ - mov r1, r4 │ │ - bl 3dfa4 │ │ + vaddl.u q11, d15, d21 │ │ + vqrdmlsh.s , , d12[0] │ │ + vcvt.u32.f32 d17, d20, #6 │ │ + @ instruction: 0xfffa1f86 │ │ + vcvt.f32.u32 d16, d10, #6 │ │ + @ instruction: 0xfffa1fa4 │ │ + @ instruction: 0xfffa0d80 │ │ + vqrdmlsh.s , q13, d1[0] │ │ + vqrdmlsh.s , q13, d5[0] │ │ + vcvt.u32.f32 , q14, #6 │ │ + @ instruction: 0xfffa1f09 │ │ + @ instruction: 0xfffa0e86 │ │ + @ instruction: 0xfffa2f2b │ │ + @ instruction: 0xfffa2f20 │ │ + @ instruction: 0xfffa9dd1 │ │ + @ instruction: 0xfffe2d84 │ │ + @ instruction: 0xfff90e92 │ │ + @ instruction: 0xfffae9d0 │ │ + lsls r0, r0, #8 │ │ + ldr r2, [r2, #12] │ │ + bx r2 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #92 @ 0x5c │ │ ldrd fp, r4, [r0, #4] │ │ add r6, sp, #24 │ │ - ldr r3, [pc, #812] @ (7587c ) │ │ + ldr r3, [pc, #812] @ (758e4 ) │ │ mov r8, r0 │ │ movs r0, #9 │ │ mov r2, r4 │ │ add r3, pc │ │ str r0, [sp, #0] │ │ mov r0, r6 │ │ mov r1, fp │ │ - bl 41018 │ │ + bl 41320 │ │ ldr r0, [sp, #24] │ │ cmp r0, #1 │ │ - bne.n 7558e │ │ + bne.n 755f6 │ │ ldr r5, [sp, #60] @ 0x3c │ │ add r7, sp, #72 @ 0x48 │ │ ldr r0, [sp, #84] @ 0x54 │ │ add.w r1, r6, #8 │ │ adds r6, r5, #1 │ │ ldmia r7, {r2, r3, r7} │ │ ite eq │ │ moveq r6, #1 │ │ movne r6, #0 │ │ strd r7, r0, [sp] │ │ add r0, sp, #12 │ │ str r6, [sp, #8] │ │ - bl 75998 │ │ + bl 75a00 │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ - beq.n 75688 │ │ - b.n 75704 │ │ + beq.n 756f0 │ │ + b.n 7576c │ │ ldrb.w r0, [sp, #38] @ 0x26 │ │ - cbz r0, 755a0 │ │ + cbz r0, 75608 │ │ movs r3, #0 │ │ str r3, [sp, #12] │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ - beq.n 75688 │ │ - b.n 75704 │ │ + beq.n 756f0 │ │ + b.n 7576c │ │ ldr r3, [sp, #32] │ │ ldrb.w r2, [sp, #37] @ 0x25 │ │ - cbz r3, 755ba │ │ + cbz r3, 75622 │ │ ldrd r0, r1, [sp, #72] @ 0x48 │ │ cmp r3, r1 │ │ - bcs.n 755c2 │ │ + bcs.n 7562a │ │ ldrsb r7, [r0, r3] │ │ cmn.w r7, #64 @ 0x40 │ │ - bge.n 755c4 │ │ - b.n 75656 │ │ + bge.n 7562c │ │ + b.n 756be │ │ movs r3, #0 │ │ lsls r0, r2, #31 │ │ - bne.n 7567c │ │ - b.n 75680 │ │ - bne.n 75656 │ │ + bne.n 756e4 │ │ + b.n 756e8 │ │ + bne.n 756be │ │ adds r6, r0, r3 │ │ ldrsb.w r7, [r6, #-1] │ │ cmp.w r7, #4294967295 @ 0xffffffff │ │ - ble.n 755d6 │ │ + ble.n 7563e │ │ lsls r2, r2, #31 │ │ - beq.n 75622 │ │ - b.n 7567c │ │ + beq.n 7568a │ │ + b.n 756e4 │ │ ldrb.w lr, [r6, #-2] │ │ sxtb.w ip, lr │ │ cmn.w ip, #65 @ 0x41 │ │ - bgt.n 75604 │ │ + bgt.n 7566c │ │ ldrb.w r9, [r6, #-3] │ │ sxtb.w lr, r9 │ │ cmn.w lr, #65 @ 0x41 │ │ - bgt.n 7560a │ │ + bgt.n 75672 │ │ ldrb.w r5, [r6, #-4] │ │ and.w r6, lr, #63 @ 0x3f │ │ and.w r5, r5, #7 │ │ orr.w r6, r6, r5, lsl #6 │ │ - b.n 7560e │ │ + b.n 75676 │ │ and.w r6, lr, #31 │ │ - b.n 75616 │ │ + b.n 7567e │ │ and.w r6, r9, #15 │ │ and.w r5, ip, #63 @ 0x3f │ │ orr.w r6, r5, r6, lsl #6 │ │ and.w r7, r7, #63 @ 0x3f │ │ orr.w r7, r7, r6, lsl #6 │ │ lsls r2, r2, #31 │ │ - bne.n 7567c │ │ + bne.n 756e4 │ │ cmp r7, #128 @ 0x80 │ │ - bcs.n 7562c │ │ + bcs.n 75694 │ │ mov.w r2, #4294967295 @ 0xffffffff │ │ - b.n 75646 │ │ + b.n 756ae │ │ cmp.w r7, #2048 @ 0x800 │ │ - bcs.n 75638 │ │ + bcs.n 756a0 │ │ mvn.w r2, #1 │ │ - b.n 75646 │ │ + b.n 756ae │ │ mvn.w r2, #3 │ │ cmp.w r7, #65536 @ 0x10000 │ │ it cc │ │ mvncc.w r2, #2 │ │ adds r3, r3, r2 │ │ - beq.n 75662 │ │ + beq.n 756ca │ │ cmp r3, r1 │ │ - bcs.n 75666 │ │ + bcs.n 756ce │ │ ldrsb r2, [r0, r3] │ │ cmn.w r2, #64 @ 0x40 │ │ - bge.n 75668 │ │ - ldr r2, [pc, #796] @ (75974 ) │ │ + bge.n 756d0 │ │ + ldr r2, [pc, #796] @ (759dc ) │ │ add r2, pc │ │ str r2, [sp, #0] │ │ movs r2, #0 │ │ - bl 3fd1c │ │ + bl 40024 │ │ movs r3, #0 │ │ - b.n 7567c │ │ - bne.n 75656 │ │ + b.n 756e4 │ │ + bne.n 756be │ │ add r0, r3 │ │ ldrsb.w r1, [r0, #-1] │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ - bgt.n 7567c │ │ + bgt.n 756e4 │ │ ldrsb.w r0, [r0, #-2] │ │ cmn.w r0, #65 @ 0x41 │ │ str r3, [sp, #16] │ │ movs r3, #1 │ │ str r3, [sp, #12] │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ - bne.n 75704 │ │ + bne.n 7576c │ │ ldr r5, [sp, #16] │ │ add.w r7, r5, #9 │ │ mov r6, r7 │ │ - cbz r6, 756a8 │ │ + cbz r6, 75710 │ │ cmp r6, r4 │ │ - bcs.n 756a2 │ │ + bcs.n 7570a │ │ ldrsb.w r0, [fp, r6] │ │ cmn.w r0, #64 @ 0x40 │ │ - bge.n 756a8 │ │ - b.n 75926 │ │ + bge.n 75710 │ │ + b.n 7598e │ │ cmp r4, r6 │ │ - bne.w 75926 │ │ + bne.w 7598e │ │ cmp r4, r6 │ │ - beq.n 756be │ │ + beq.n 75726 │ │ ldrb.w r0, [fp, r6] │ │ subs r0, #48 @ 0x30 │ │ cmp r0, #10 │ │ - bcs.n 756c4 │ │ + bcs.n 7572c │ │ adds r6, #1 │ │ cmp r6, #0 │ │ - bne.n 75692 │ │ - b.n 756a8 │ │ + bne.n 756fa │ │ + b.n 75710 │ │ mov r9, r4 │ │ - cbnz r6, 756c8 │ │ - b.n 756ea │ │ + cbnz r6, 75730 │ │ + b.n 75752 │ │ mov r9, r6 │ │ - cbz r6, 756ea │ │ + cbz r6, 75752 │ │ cmp r4, r9 │ │ - bls.n 756e8 │ │ + bls.n 75750 │ │ ldrsb.w r0, [fp, r9] │ │ cmn.w r0, #65 @ 0x41 │ │ - bgt.n 756ea │ │ - ldr r0, [pc, #684] @ (75984 ) │ │ + bgt.n 75752 │ │ + ldr r0, [pc, #684] @ (759ec ) │ │ mov r1, r4 │ │ mov r2, r9 │ │ mov r3, r4 │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ - bl 3fd1c │ │ - bne.n 756d6 │ │ + bl 40024 │ │ + bne.n 7573e │ │ sub.w r0, r4, r9 │ │ cmp r0, #8 │ │ - bcc.n 75704 │ │ - ldr r0, [pc, #648] @ (7597c ) │ │ + bcc.n 7576c │ │ + ldr r0, [pc, #648] @ (759e4 ) │ │ add.w sl, fp, r9 │ │ movs r2, #8 │ │ add r0, pc │ │ mov r1, sl │ │ - blx d8860 │ │ - cbz r0, 7575c │ │ + blx d8870 │ │ + cbz r0, 757c4 │ │ movs r7, #0 │ │ ldr.w r0, [r8] │ │ cmp r0, r4 │ │ - bls.n 75720 │ │ + bls.n 75788 │ │ mov r0, fp │ │ - cbz r4, 75742 │ │ + cbz r4, 757aa │ │ mov r1, r4 │ │ - blx d8870 │ │ + blx d8880 │ │ mov fp, r0 │ │ cmp r0, #0 │ │ - beq.w 7594a │ │ + beq.w 759b2 │ │ movs r0, #20 │ │ - blx d87f0 │ │ - cbz r0, 75754 │ │ + blx d8810 │ │ + cbz r0, 757bc │ │ movs r1, #0 │ │ cmp r7, #0 │ │ itt eq │ │ moveq r6, r7 │ │ moveq sl, r7 │ │ strd r1, fp, [r0] │ │ strd r4, sl, [r0, #8] │ │ str r6, [r0, #16] │ │ add sp, #92 @ 0x5c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov.w fp, #1 │ │ movs r0, #20 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - bne.n 75728 │ │ + bne.n 75790 │ │ movs r0, #4 │ │ movs r1, #20 │ │ - bl 3de2a │ │ + bl 3e132 │ │ add.w r2, r9, #8 │ │ mov r3, r2 │ │ - cbz r3, 7577a │ │ + cbz r3, 757e2 │ │ cmp r3, r4 │ │ - bcs.n 75774 │ │ + bcs.n 757dc │ │ ldrsb.w r0, [fp, r3] │ │ cmn.w r0, #64 @ 0x40 │ │ - bge.n 7577a │ │ - b.n 75938 │ │ + bge.n 757e2 │ │ + b.n 759a0 │ │ cmp r4, r3 │ │ - bne.w 75938 │ │ + bne.w 759a0 │ │ cmp r4, r3 │ │ - beq.n 75790 │ │ + beq.n 757f8 │ │ ldrb.w r0, [fp, r3] │ │ subs r0, #48 @ 0x30 │ │ cmp r0, #10 │ │ - bcs.n 75794 │ │ + bcs.n 757fc │ │ adds r3, #1 │ │ cmp r3, #0 │ │ - bne.n 75764 │ │ - b.n 7577a │ │ + bne.n 757cc │ │ + b.n 757e2 │ │ mov r3, r4 │ │ - b.n 75798 │ │ + b.n 75800 │ │ cmp r3, r4 │ │ - bcc.n 75704 │ │ + bcc.n 7576c │ │ cmp r9, r7 │ │ - bcc.w 75960 │ │ - cbz r7, 757ac │ │ + bcc.w 759c8 │ │ + cbz r7, 75814 │ │ ldrsb.w r0, [fp, r7] │ │ cmn.w r0, #65 @ 0x41 │ │ - ble.w 75960 │ │ - cbz r6, 757ba │ │ + ble.w 759c8 │ │ + cbz r6, 75822 │ │ ldrsb.w r0, [sl] │ │ cmn.w r0, #64 @ 0x40 │ │ - blt.w 75960 │ │ + blt.w 759c8 │ │ sub.w r1, r9, r7 │ │ add.w r0, fp, r7 │ │ cmp r1, #1 │ │ - beq.n 757ce │ │ + beq.n 75836 │ │ cmp r1, #0 │ │ - beq.n 75704 │ │ + beq.n 7576c │ │ ldrb r6, [r0, #0] │ │ - b.n 757dc │ │ + b.n 75844 │ │ ldrb r6, [r0, #0] │ │ movs r7, #0 │ │ cmp r6, #43 @ 0x2b │ │ it ne │ │ cmpne r6, #45 @ 0x2d │ │ - beq.w 75706 │ │ + beq.w 7576e │ │ cmp r6, #43 @ 0x2b │ │ mov.w sl, #0 │ │ itt eq │ │ addeq r0, #1 │ │ subeq r1, #1 │ │ cmp r1, #9 │ │ - bcs.n 75824 │ │ - cbz r1, 75806 │ │ + bcs.n 7588c │ │ + cbz r1, 7586e │ │ ldrb r7, [r0, #0] │ │ subs r7, #48 @ 0x30 │ │ cmp r7, #9 │ │ - bhi.w 75704 │ │ + bhi.w 7576c │ │ add.w r6, sl, sl, lsl #2 │ │ adds r0, #1 │ │ subs r1, #1 │ │ add.w sl, r7, r6, lsl #1 │ │ - bne.n 757ee │ │ + bne.n 75856 │ │ cmp r2, r3 │ │ - bhi.n 75816 │ │ + bhi.n 7587e │ │ cmp r2, #0 │ │ it ne │ │ cmpne r4, r2 │ │ - bhi.n 7585a │ │ + bhi.n 758c2 │ │ cmp r3, r4 │ │ - beq.n 75868 │ │ - ldr r0, [pc, #368] @ (75988 ) │ │ + beq.n 758d0 │ │ + ldr r0, [pc, #368] @ (759f0 ) │ │ mov r1, r4 │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ - bl 3fd1c │ │ + bl 40024 │ │ mov.w ip, #10 │ │ cmp r1, #0 │ │ - beq.n 75806 │ │ + beq.n 7586e │ │ umull r6, r7, sl, ip │ │ cmp r7, #0 │ │ mov.w r7, #0 │ │ - bne.w 75706 │ │ + bne.w 7576e │ │ mov lr, r5 │ │ ldrb.w r5, [r0], #1 │ │ subs r5, #48 @ 0x30 │ │ adds.w sl, r5, r6 │ │ adc.w r6, r7, #0 │ │ cmp r5, #9 │ │ - bhi.w 75706 │ │ + bhi.w 7576e │ │ subs r1, #1 │ │ mov r5, lr │ │ cmp r6, #0 │ │ - beq.n 75828 │ │ - b.n 75706 │ │ + beq.n 75890 │ │ + b.n 7576e │ │ cmp r3, r4 │ │ - bne.n 75816 │ │ + bne.n 7587e │ │ ldrsb.w r0, [fp, r2] │ │ cmn.w r0, #64 @ 0x40 │ │ - blt.n 75816 │ │ + blt.n 7587e │ │ subs r1, r4, r2 │ │ add.w r0, fp, r2 │ │ cmp r1, #1 │ │ - beq.n 75880 │ │ + beq.n 758e8 │ │ cmp r1, #0 │ │ - beq.w 75704 │ │ + beq.w 7576c │ │ ldrb r2, [r0, #0] │ │ - b.n 7588e │ │ - cmp r5, #160 @ 0xa0 │ │ + b.n 758f6 │ │ + cmp r5, #56 @ 0x38 │ │ vtbl.8 d23, {d10}, d2 │ │ movs r7, #0 │ │ cmp r2, #43 @ 0x2b │ │ it ne │ │ cmpne r2, #45 @ 0x2d │ │ - beq.w 75706 │ │ + beq.w 7576e │ │ cmp r2, #43 @ 0x2b │ │ mov.w r2, #0 │ │ itt eq │ │ addeq r0, #1 │ │ subeq r1, #1 │ │ it eq │ │ moveq.w r2, #4294967295 @ 0xffffffff │ │ cmp r1, #9 │ │ - bcs.n 758ca │ │ - cbz r1, 75908 │ │ + bcs.n 75932 │ │ + cbz r1, 75970 │ │ sub.w r1, r9, r2 │ │ movs r6, #0 │ │ adds r1, #8 │ │ ldrb r2, [r0, #0] │ │ subs r2, #48 @ 0x30 │ │ cmp r2, #9 │ │ - bhi.w 75704 │ │ + bhi.w 7576c │ │ add.w r3, r6, r6, lsl #2 │ │ adds r1, #1 │ │ adds r0, #1 │ │ cmp r4, r1 │ │ add.w r6, r2, r3, lsl #1 │ │ - bne.n 758ae │ │ - b.n 7590a │ │ + bne.n 75916 │ │ + b.n 75972 │ │ sub.w r1, r9, r2 │ │ movs r6, #0 │ │ adds r1, #8 │ │ mov.w ip, #10 │ │ cmp r4, r1 │ │ - beq.n 7590a │ │ + beq.n 75972 │ │ umull r3, r7, r6, ip │ │ cmp r7, #0 │ │ mov.w r7, #0 │ │ - bne.w 75706 │ │ + bne.w 7576e │ │ ldrb.w r6, [r0], #1 │ │ mov r2, r5 │ │ sub.w r5, r6, #48 @ 0x30 │ │ adds r6, r5, r3 │ │ adc.w r3, r7, #0 │ │ cmp r5, #9 │ │ - bhi.w 75706 │ │ + bhi.w 7576e │ │ adds r1, #1 │ │ mov r5, r2 │ │ cmp r3, #0 │ │ - beq.n 758d6 │ │ - b.n 75706 │ │ + beq.n 7593e │ │ + b.n 7576e │ │ movs r6, #0 │ │ movs r7, #1 │ │ cmp r5, r4 │ │ - bhi.w 75706 │ │ - cbz r5, 75922 │ │ + bhi.w 7576e │ │ + cbz r5, 7598a │ │ cmp r5, r4 │ │ - bcs.n 75922 │ │ + bcs.n 7598a │ │ ldrsb.w r0, [fp, r5] │ │ cmn.w r0, #65 @ 0x41 │ │ - ble.n 75952 │ │ + ble.n 759ba │ │ mov r4, r5 │ │ - b.n 75706 │ │ - ldr r0, [pc, #80] @ (75978 ) │ │ + b.n 7576e │ │ + ldr r0, [pc, #80] @ (759e0 ) │ │ mov r1, r4 │ │ mov r2, r6 │ │ mov r3, r4 │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ - bl 3fd1c │ │ - ldr r0, [pc, #68] @ (75980 ) │ │ + bl 40024 │ │ + ldr r0, [pc, #68] @ (759e8 ) │ │ mov r2, r3 │ │ mov r1, r4 │ │ mov r3, r4 │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ - bl 3fd1c │ │ + bl 40024 │ │ movs r0, #1 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ - ldr r0, [pc, #60] @ (75990 ) │ │ + bl 3e2ac │ │ + ldr r0, [pc, #60] @ (759f8 ) │ │ movs r1, #48 @ 0x30 │ │ - ldr r2, [pc, #60] @ (75994 ) │ │ + ldr r2, [pc, #60] @ (759fc ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r0, [pc, #40] @ (7598c ) │ │ + bl 3fd54 │ │ + ldr r0, [pc, #40] @ (759f4 ) │ │ mov r1, r4 │ │ mov r2, r7 │ │ mov r3, r9 │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ - bl 3fd1c │ │ + bl 40024 │ │ nop │ │ - str r4, [r1, #44] @ 0x2c │ │ + str r4, [r6, #36] @ 0x24 │ │ movs r6, r0 │ │ - ldrsh r6, [r7, r3] │ │ + ldrsh r6, [r4, r2] │ │ movs r6, r0 │ │ - lsrs r6, r3, #17 │ │ - @ instruction: 0xfffa5f0c │ │ + lsrs r6, r6, #15 │ │ + @ instruction: 0xfffa5eb4 │ │ movs r6, r0 │ │ - str r6, [r3, #20] │ │ + str r6, [r0, #16] │ │ movs r6, r0 │ │ - str r2, [r2, #4] │ │ + ldrsh r2, [r7, r7] │ │ movs r6, r0 │ │ - ldrsh r4, [r6, r3] │ │ + ldrsh r4, [r3, r2] │ │ movs r6, r0 │ │ - cmp r1, #226 @ 0xe2 │ │ - @ instruction: 0xfffa5f22 │ │ + cmp r1, #122 @ 0x7a │ │ + vqrdmlah.s , q13, d10[0] │ │ movs r6, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #44 @ 0x2c │ │ mov lr, r1 │ │ ldr r1, [sp, #84] @ 0x54 │ │ ldr.w r9, [lr, #24] │ │ sub.w fp, r9, r1 │ │ cmp fp, r3 │ │ - bcs.w 75abc │ │ + bcs.w 75b24 │ │ ldrd ip, r4, [lr, #12] │ │ ldr.w r8, [sp, #80] @ 0x50 │ │ ldrd r7, r6, [lr] │ │ cmp ip, r1 │ │ str r4, [sp, #12] │ │ ldr.w r4, [lr, #32] │ │ str r4, [sp, #40] @ 0x28 │ │ @@ -116716,68 +116629,68 @@ │ │ it hi │ │ movhi r4, ip │ │ str r4, [sp, #4] │ │ sub.w r4, r4, ip │ │ str r4, [sp, #24] │ │ rsb r4, ip, #0 │ │ strd r0, r4, [sp, #16] │ │ - b.n 759f6 │ │ + b.n 75a5e │ │ str.w r6, [lr, #32] │ │ str r6, [sp, #40] @ 0x28 │ │ sub.w fp, r9, r1 │ │ cmp fp, r3 │ │ - bcs.n 75abc │ │ + bcs.n 75b24 │ │ ldrb.w r7, [r2, fp] │ │ ldr r4, [sp, #36] @ 0x24 │ │ ldr r6, [sp, #32] │ │ and.w r7, r7, #63 @ 0x3f │ │ rsb r5, r7, #32 │ │ lsrs r4, r7 │ │ subs r7, #32 │ │ lsl.w r5, r6, r5 │ │ orr.w r4, r4, r5 │ │ it pl │ │ lsrpl.w r4, r6, r7 │ │ lsls r7, r4, #31 │ │ - beq.n 75a5c │ │ + beq.n 75ac4 │ │ ldr r5, [sp, #40] @ 0x28 │ │ mov r4, ip │ │ cmp r5, ip │ │ it cc │ │ movcc r4, r5 │ │ ldr r5, [sp, #88] @ 0x58 │ │ cmp r5, #0 │ │ it ne │ │ movne r4, ip │ │ subs r7, r4, #1 │ │ - cbz r4, 75a6c │ │ + cbz r4, 75ad4 │ │ subs r4, #1 │ │ cmp r7, r1 │ │ - bcs.n 75ae6 │ │ + bcs.n 75b4e │ │ add.w r5, r4, fp │ │ cmp r5, r3 │ │ - bcs.n 75af0 │ │ + bcs.n 75b58 │ │ ldrb r5, [r2, r5] │ │ ldrb.w r6, [r8, r4] │ │ cmp r6, r5 │ │ - beq.n 75a30 │ │ + beq.n 75a98 │ │ add.w r7, r4, r9 │ │ ldr r4, [sp, #88] @ 0x58 │ │ sub.w r9, r7, ip │ │ mov r6, r1 │ │ cmp r4, #0 │ │ - beq.n 759e8 │ │ - b.n 759ee │ │ + beq.n 75a50 │ │ + b.n 75a56 │ │ ldr r4, [sp, #88] @ 0x58 │ │ mov r6, r1 │ │ mov r9, fp │ │ str.w fp, [lr, #24] │ │ cmp r4, #0 │ │ - beq.n 759e8 │ │ - b.n 759ee │ │ + beq.n 75a50 │ │ + b.n 75a56 │ │ ldr r0, [sp, #88] @ 0x58 │ │ mov r6, r9 │ │ add.w r4, ip, fp │ │ mov r7, lr │ │ cmp r0, #0 │ │ ldr r0, [sp, #40] @ 0x28 │ │ it ne │ │ @@ -116785,34 +116698,34 @@ │ │ cmp r0, ip │ │ it ls │ │ movls r0, ip │ │ ldr r5, [sp, #20] │ │ str r4, [sp, #8] │ │ add r5, r0 │ │ ldrd r0, r9, [sp, #24] │ │ - cbz r5, 75aca │ │ - cbz r0, 75b0e │ │ + cbz r5, 75b32 │ │ + cbz r0, 75b76 │ │ cmp r4, r3 │ │ - bcs.n 75afc │ │ + bcs.n 75b64 │ │ ldrb.w sl, [r2, r4] │ │ subs r5, #1 │ │ ldrb.w lr, [r9], #1 │ │ subs r0, #1 │ │ adds r4, #1 │ │ cmp lr, sl │ │ - beq.n 75a8e │ │ + beq.n 75af6 │ │ ldr r0, [sp, #88] @ 0x58 │ │ mov r9, r6 │ │ ldr r6, [sp, #12] │ │ mov lr, r7 │ │ cmp r0, #0 │ │ ldr r0, [sp, #16] │ │ sub.w r9, r9, r6 │ │ - beq.n 759e8 │ │ - b.n 759ee │ │ + beq.n 75a50 │ │ + b.n 75a56 │ │ movs r1, #0 │ │ str.w r1, [lr, #24] │ │ str r1, [r0, #0] │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r0, [sp, #88] @ 0x58 │ │ str.w fp, [r7, #24] │ │ @@ -116821,171 +116734,171 @@ │ │ streq r1, [r7, #32] │ │ ldr r0, [sp, #16] │ │ movs r1, #1 │ │ strd fp, r6, [r0, #4] │ │ str r1, [r0, #0] │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r2, [pc, #60] @ (75b24 ) │ │ + ldr r2, [pc, #60] @ (75b8c ) │ │ mov r0, r4 │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r2, [pc, #44] @ (75b20 ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #44] @ (75b88 ) │ │ mov r0, r5 │ │ mov r1, r3 │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r2, [pc, #28] @ (75b1c ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #28] @ (75b84 ) │ │ mov r1, r3 │ │ ldr r0, [sp, #8] │ │ add r2, pc │ │ cmp r3, r0 │ │ it hi │ │ movhi r0, r3 │ │ - bl 3fa74 │ │ - ldr r2, [pc, #8] @ (75b18 ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #8] @ (75b80 ) │ │ ldr r0, [sp, #4] │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldrb r2, [r4, r6] │ │ + bl 3fd7c │ │ + ldrb r2, [r1, r5] │ │ movs r6, r0 │ │ - ldrb r2, [r0, r7] │ │ + ldrb r2, [r5, r5] │ │ movs r6, r0 │ │ - ldrb r6, [r5, r7] │ │ + ldrb r6, [r2, r6] │ │ movs r6, r0 │ │ - ldrb r2, [r5, r7] │ │ + ldrb r2, [r2, r6] │ │ movs r6, r0 │ │ push {r4, r5, r7, lr} │ │ cmp r2, r1 │ │ - bhi.n 75c1e │ │ + bhi.n 75c86 │ │ cmp r2, #0 │ │ - beq.n 75c0a │ │ + beq.n 75c72 │ │ adds r3, r0, r2 │ │ cmp r2, #3 │ │ - bhi.n 75b46 │ │ + bhi.n 75bae │ │ cmp r3, r0 │ │ - bls.n 75c0a │ │ + bls.n 75c72 │ │ ldrb.w r5, [r3, #-1]! │ │ cmp r5, #10 │ │ - bne.n 75b38 │ │ - b.n 75bde │ │ + bne.n 75ba0 │ │ + b.n 75c46 │ │ ldr.w lr, [r3, #-4] │ │ movw ip, #256 @ 0x100 │ │ movt ip, #257 @ 0x101 │ │ eor.w r4, lr, #168430090 @ 0xa0a0a0a │ │ sub.w r4, ip, r4 │ │ orr.w r4, r4, lr │ │ mvns r4, r4 │ │ tst.w r4, #2155905152 @ 0x80808080 │ │ - bne.n 75b84 │ │ + bne.n 75bec │ │ and.w r3, r3, #3 │ │ cmp r2, #9 │ │ sub.w lr, r2, r3 │ │ - bcs.n 75b92 │ │ + bcs.n 75bfa │ │ add.w r3, r0, lr │ │ cmp r3, r0 │ │ - bls.n 75c0a │ │ + bls.n 75c72 │ │ ldrb.w r5, [r3, #-1]! │ │ cmp r5, #10 │ │ - bne.n 75b76 │ │ - b.n 75bde │ │ + bne.n 75bde │ │ + b.n 75c46 │ │ cmp r3, r0 │ │ - bls.n 75c0a │ │ + bls.n 75c72 │ │ ldrb.w r5, [r3, #-1]! │ │ cmp r5, #10 │ │ - bne.n 75b84 │ │ - b.n 75bde │ │ + bne.n 75bec │ │ + b.n 75c46 │ │ cmp.w lr, #8 │ │ - blt.n 75bce │ │ + blt.n 75c36 │ │ add.w r3, r0, lr │ │ ldr.w r4, [r3, #-8] │ │ eor.w r5, r4, #168430090 @ 0xa0a0a0a │ │ sub.w r5, ip, r5 │ │ orrs r4, r5 │ │ mvns r4, r4 │ │ tst.w r4, #2155905152 @ 0x80808080 │ │ - bne.n 75bce │ │ + bne.n 75c36 │ │ ldr.w r4, [r3, #-4] │ │ sub.w lr, lr, #8 │ │ eor.w r5, r4, #168430090 @ 0xa0a0a0a │ │ sub.w r5, ip, r5 │ │ orrs r4, r5 │ │ mvns r4, r4 │ │ tst.w r4, #2155905152 @ 0x80808080 │ │ - beq.n 75b92 │ │ - b.n 75bd2 │ │ + beq.n 75bfa │ │ + b.n 75c3a │ │ add.w r3, r0, lr │ │ cmp r3, r0 │ │ - bls.n 75c0a │ │ + bls.n 75c72 │ │ ldrb.w r5, [r3, #-1]! │ │ cmp r5, #10 │ │ - bne.n 75bd2 │ │ + bne.n 75c3a │ │ subs r3, r3, r0 │ │ add.w ip, r3, #1 │ │ cmp r3, r1 │ │ - bcs.n 75c2e │ │ + bcs.n 75c96 │ │ add.w r1, r0, ip │ │ cmp r0, r1 │ │ - bcs.n 75c16 │ │ + bcs.n 75c7e │ │ movs r1, #0 │ │ mov r3, ip │ │ ldrb.w r5, [r0], #1 │ │ cmp r5, #10 │ │ it eq │ │ addeq r1, #1 │ │ subs r3, #1 │ │ - bne.n 75bf4 │ │ + bne.n 75c5c │ │ adds r0, r1, #1 │ │ sub.w r1, r2, ip │ │ pop {r4, r5, r7, pc} │ │ mov.w ip, #0 │ │ add.w r1, r0, ip │ │ cmp r0, r1 │ │ - bcc.n 75bf0 │ │ + bcc.n 75c58 │ │ sub.w r1, r2, ip │ │ movs r0, #1 │ │ pop {r4, r5, r7, pc} │ │ - ldr r3, [pc, #32] @ (75c40 ) │ │ + ldr r3, [pc, #32] @ (75ca8 ) │ │ mov ip, r1 │ │ mov r1, r2 │ │ movs r0, #0 │ │ add r3, pc │ │ mov r2, ip │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #12] @ (75c3c ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #12] @ (75ca4 ) │ │ mov r2, r1 │ │ movs r0, #0 │ │ mov r1, ip │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldrh r6, [r2, r7] │ │ + bl 3fcb0 │ │ + ldrh r6, [r7, r5] │ │ movs r6, r0 │ │ - ldrh r6, [r6, r7] │ │ + ldrh r6, [r3, r6] │ │ movs r6, r0 │ │ push {r4, r5, r6, lr} │ │ mov r6, r0 │ │ movs r0, #20 │ │ mov r4, r2 │ │ mov r5, r1 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ itttt ne │ │ ldmiane.w r6, {r1, r2, r3} │ │ stmiane.w r0, {r1, r2, r3, r5} │ │ strne r4, [r0, #16] │ │ popne {r4, r5, r6, pc} │ │ movs r0, #4 │ │ movs r1, #20 │ │ - bl 3de2a │ │ - bmi.n 75c16 │ │ + bl 3e132 │ │ + bmi.n 75c7e │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #200 @ 0xc8 │ │ ldr r7, [r0, #0] │ │ mov r4, r1 │ │ - ldr r0, [pc, #668] @ (75f14 ) │ │ + ldr r0, [pc, #668] @ (75f7c ) │ │ movs r1, #0 │ │ movs r2, #1 │ │ str r1, [sp, #16] │ │ strd r1, r2, [sp, #8] │ │ add r0, pc │ │ str r1, [sp, #32] │ │ movs r1, #32 │ │ @@ -117006,396 +116919,396 @@ │ │ ldr r1, [r2, #32] │ │ stmia r1!, {r2, r7} │ │ ldrb r7, [r5, #5] │ │ stmia r6!, {r0, r4, r7} │ │ movs r5, r4 │ │ ldrd r1, r2, [r7, #4] │ │ add r0, sp, #8 │ │ - b.n 75dc4 │ │ - ldr r1, [pc, #712] @ (75f88 ) │ │ + b.n 75e2c │ │ + ldr r1, [pc, #712] @ (75ff0 ) │ │ add r0, sp, #8 │ │ movs r2, #62 @ 0x3e │ │ add r1, pc │ │ - b.n 75dc4 │ │ - ldr r1, [pc, #696] @ (75f80 ) │ │ + b.n 75e2c │ │ + ldr r1, [pc, #696] @ (75fe8 ) │ │ add r1, pc │ │ - b.n 75dc0 │ │ - ldr r1, [pc, #676] @ (75f74 ) │ │ + b.n 75e28 │ │ + ldr r1, [pc, #676] @ (75fdc ) │ │ add r1, pc │ │ - b.n 75d9c │ │ - ldr r1, [pc, #644] @ (75f58 ) │ │ + b.n 75e04 │ │ + ldr r1, [pc, #644] @ (75fc0 ) │ │ add r1, pc │ │ - b.n 75cf8 │ │ - ldr r1, [pc, #668] @ (75f78 ) │ │ + b.n 75d60 │ │ + ldr r1, [pc, #668] @ (75fe0 ) │ │ add r1, pc │ │ - b.n 75db0 │ │ - ldr r1, [pc, #652] @ (75f6c ) │ │ + b.n 75e18 │ │ + ldr r1, [pc, #652] @ (75fd4 ) │ │ add r1, pc │ │ - b.n 75db0 │ │ - ldr r1, [pc, #704] @ (75fa8 ) │ │ + b.n 75e18 │ │ + ldr r1, [pc, #704] @ (76010 ) │ │ add r1, pc │ │ - b.n 75cee │ │ - ldr r1, [pc, #612] @ (75f50 ) │ │ + b.n 75d56 │ │ + ldr r1, [pc, #612] @ (75fb8 ) │ │ add r1, pc │ │ add r0, sp, #8 │ │ movs r2, #24 │ │ - b.n 75dc4 │ │ - ldr r1, [pc, #652] @ (75f84 ) │ │ + b.n 75e2c │ │ + ldr r1, [pc, #652] @ (75fec ) │ │ add r1, pc │ │ add r0, sp, #8 │ │ movs r2, #26 │ │ - b.n 75dc4 │ │ - ldr r1, [pc, #596] @ (75f54 ) │ │ + b.n 75e2c │ │ + ldr r1, [pc, #596] @ (75fbc ) │ │ add r0, sp, #8 │ │ movs r2, #27 │ │ add r1, pc │ │ - b.n 75dc4 │ │ - ldr r1, [pc, #600] @ (75f64 ) │ │ + b.n 75e2c │ │ + ldr r1, [pc, #600] @ (75fcc ) │ │ add r1, pc │ │ - b.n 75dc0 │ │ + b.n 75e28 │ │ ldrb r0, [r7, #4] │ │ tbb [pc, r0] │ │ ldr r4, [sp, #8] │ │ str r5, [sp, #568] @ 0x238 │ │ add r6, sp, #56 @ 0x38 │ │ ldr r5, [r7, #8] │ │ movs r1, #128 @ 0x80 │ │ str r5, [sp, #36] @ 0x24 │ │ mov r0, r6 │ │ - bl d518e │ │ + bl d521e │ │ mov r0, r5 │ │ mov r1, r6 │ │ movs r2, #128 @ 0x80 │ │ - blx d8930 │ │ + blx d8940 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - ble.w 75ee8 │ │ + ble.w 75f50 │ │ add r5, sp, #56 @ 0x38 │ │ mov r0, r5 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r2, r0 │ │ add r0, sp, #184 @ 0xb8 │ │ mov r1, r5 │ │ - bl 3de50 │ │ + bl 3e158 │ │ ldr r0, [sp, #184] @ 0xb8 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.w 75e7e │ │ + bne.w 75ee6 │ │ ldrd r8, r5, [sp, #188] @ 0xbc │ │ cmp r5, #0 │ │ - beq.w 75e88 │ │ + beq.w 75ef0 │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 75ef6 │ │ + beq.w 75f5e │ │ mov r6, r0 │ │ - b.n 75e8a │ │ - ldr r1, [pc, #540] @ (75f8c ) │ │ + b.n 75ef2 │ │ + ldr r1, [pc, #540] @ (75ff4 ) │ │ add r0, sp, #8 │ │ movs r2, #20 │ │ add r1, pc │ │ - b.n 75dc4 │ │ - ldr r1, [pc, #540] @ (75f98 ) │ │ + b.n 75e2c │ │ + ldr r1, [pc, #540] @ (76000 ) │ │ add r0, sp, #8 │ │ movs r2, #36 @ 0x24 │ │ add r1, pc │ │ - b.n 75dc4 │ │ - ldr r1, [pc, #472] @ (75f5c ) │ │ + b.n 75e2c │ │ + ldr r1, [pc, #472] @ (75fc4 ) │ │ add r0, sp, #8 │ │ movs r2, #25 │ │ add r1, pc │ │ - b.n 75dc4 │ │ - ldr r1, [pc, #524] @ (75f9c ) │ │ + b.n 75e2c │ │ + ldr r1, [pc, #524] @ (76004 ) │ │ add r1, pc │ │ - b.n 75db0 │ │ - ldr r1, [pc, #488] @ (75f7c ) │ │ + b.n 75e18 │ │ + ldr r1, [pc, #488] @ (75fe4 ) │ │ add r1, pc │ │ - b.n 75db0 │ │ - ldr r1, [pc, #452] @ (75f60 ) │ │ + b.n 75e18 │ │ + ldr r1, [pc, #452] @ (75fc8 ) │ │ add r1, pc │ │ add r0, sp, #8 │ │ movs r2, #12 │ │ - b.n 75dc4 │ │ - ldr r1, [pc, #492] @ (75f90 ) │ │ + b.n 75e2c │ │ + ldr r1, [pc, #492] @ (75ff8 ) │ │ add r0, sp, #8 │ │ movs r2, #52 @ 0x34 │ │ add r1, pc │ │ - b.n 75dc4 │ │ - ldr r1, [pc, #448] @ (75f70 ) │ │ + b.n 75e2c │ │ + ldr r1, [pc, #448] @ (75fd8 ) │ │ add r1, pc │ │ add r0, sp, #8 │ │ movs r2, #14 │ │ - b.n 75dc4 │ │ - ldr r1, [pc, #432] @ (75f68 ) │ │ + b.n 75e2c │ │ + ldr r1, [pc, #432] @ (75fd0 ) │ │ add r1, pc │ │ - b.n 75dc0 │ │ - ldr r1, [pc, #480] @ (75fa0 ) │ │ + b.n 75e28 │ │ + ldr r1, [pc, #480] @ (76008 ) │ │ add r1, pc │ │ add r0, sp, #8 │ │ movs r2, #19 │ │ - bl 75fc4 │ │ + bl 7602c │ │ cmp r0, #0 │ │ - bne.w 75ed2 │ │ + bne.w 75f3a │ │ add r2, sp, #8 │ │ add.w ip, sp, #184 @ 0xb8 │ │ add.w r6, r7, #16 │ │ ldmia r2, {r0, r1, r2} │ │ - ldr r3, [pc, #464] @ (75fac ) │ │ - ldr r5, [pc, #464] @ (75fb0 ) │ │ + ldr r3, [pc, #464] @ (76014 ) │ │ + ldr r5, [pc, #464] @ (76018 ) │ │ stmia.w ip, {r0, r1, r2} │ │ add r3, pc │ │ add r5, pc │ │ ldrd r0, r1, [r4] │ │ - ldr r2, [pc, #456] @ (75fb4 ) │ │ + ldr r2, [pc, #456] @ (7601c ) │ │ str r3, [sp, #76] @ 0x4c │ │ strd r3, r6, [sp, #68] @ 0x44 │ │ add.w r3, r7, #12 │ │ add r2, pc │ │ strd r5, r3, [sp, #60] @ 0x3c │ │ add r3, sp, #184 @ 0xb8 │ │ str r3, [sp, #56] @ 0x38 │ │ add r3, sp, #56 @ 0x38 │ │ - bl 3ef94 │ │ + bl 3f29c │ │ ldr r1, [sp, #184] @ 0xb8 │ │ - cbz r1, 75e16 │ │ + cbz r1, 75e7e │ │ ldr r1, [sp, #188] @ 0xbc │ │ mov r4, r0 │ │ mov r0, r1 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ add sp, #200 @ 0xc8 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ - ldr r1, [pc, #372] @ (75f94 ) │ │ + ldr r1, [pc, #372] @ (75ffc ) │ │ add r0, sp, #8 │ │ movs r2, #44 @ 0x2c │ │ add r1, pc │ │ - b.n 75dc4 │ │ - ldr r1, [pc, #380] @ (75fa4 ) │ │ + b.n 75e2c │ │ + ldr r1, [pc, #380] @ (7600c ) │ │ add r0, sp, #8 │ │ movs r2, #28 │ │ add r1, pc │ │ - b.n 75dc4 │ │ + b.n 75e2c │ │ ldr r0, [r7, #8] │ │ ldrd r1, r2, [r0] │ │ add r0, sp, #20 │ │ - bl 3ffd4 │ │ - b.n 75dc8 │ │ + bl 402dc │ │ + b.n 75e30 │ │ ldr r0, [r7, #8] │ │ ldrd r0, r1, [r0] │ │ ldr r2, [r1, #16] │ │ add r1, sp, #20 │ │ blx r2 │ │ - b.n 75dc8 │ │ - ldr r0, [pc, #208] @ (75f20 ) │ │ + b.n 75e30 │ │ + ldr r0, [pc, #208] @ (75f88 ) │ │ ldrb r3, [r7, #5] │ │ - ldr r5, [pc, #208] @ (75f24 ) │ │ + ldr r5, [pc, #208] @ (75f8c ) │ │ add r0, pc │ │ ldr.w r0, [r0, r3, lsl #2] │ │ add r5, pc │ │ - ldr r6, [pc, #204] @ (75f28 ) │ │ - ldr r1, [pc, #204] @ (75f2c ) │ │ - ldr r2, [pc, #208] @ (75f30 ) │ │ + ldr r6, [pc, #204] @ (75f90 ) │ │ + ldr r1, [pc, #204] @ (75f94 ) │ │ + ldr r2, [pc, #208] @ (75f98 ) │ │ add r6, pc │ │ ldr.w r3, [r5, r3, lsl #2] │ │ add r1, pc │ │ add r2, pc │ │ strd r3, r0, [sp, #184] @ 0xb8 │ │ add r0, sp, #184 @ 0xb8 │ │ str r0, [sp, #56] @ 0x38 │ │ add r0, sp, #8 │ │ add r3, sp, #56 @ 0x38 │ │ str r6, [sp, #60] @ 0x3c │ │ - bl 3ef94 │ │ - b.n 75dc8 │ │ + bl 3f29c │ │ + b.n 75e30 │ │ add r2, sp, #184 @ 0xb8 │ │ add r3, sp, #40 @ 0x28 │ │ ldmia r2, {r0, r1, r2} │ │ stmia r3!, {r0, r1, r2} │ │ - b.n 75e9a │ │ + b.n 75f02 │ │ movs r6, #1 │ │ mov r0, r6 │ │ mov r1, r8 │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ str r5, [sp, #48] @ 0x30 │ │ strd r5, r6, [sp, #40] @ 0x28 │ │ - ldr r0, [pc, #152] @ (75f34 ) │ │ - ldr r1, [pc, #152] @ (75f38 ) │ │ - ldr r2, [pc, #156] @ (75f3c ) │ │ + ldr r0, [pc, #152] @ (75f9c ) │ │ + ldr r1, [pc, #152] @ (75fa0 ) │ │ + ldr r2, [pc, #156] @ (75fa4 ) │ │ add r0, pc │ │ - ldr r3, [pc, #156] @ (75f40 ) │ │ + ldr r3, [pc, #156] @ (75fa8 ) │ │ add r1, pc │ │ add r2, pc │ │ add r3, pc │ │ str r3, [sp, #68] @ 0x44 │ │ add r3, sp, #36 @ 0x24 │ │ strd r0, r3, [sp, #60] @ 0x3c │ │ add r0, sp, #40 @ 0x28 │ │ str r0, [sp, #56] @ 0x38 │ │ add r0, sp, #8 │ │ add r3, sp, #56 @ 0x38 │ │ - bl 3ef94 │ │ + bl 3f29c │ │ mov r5, r0 │ │ ldr r0, [sp, #40] @ 0x28 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #44] @ 0x2c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ cmp r5, #0 │ │ - beq.w 75dce │ │ - ldr r0, [pc, #112] @ (75f44 ) │ │ + beq.w 75e36 │ │ + ldr r0, [pc, #112] @ (75fac ) │ │ add r2, sp, #56 @ 0x38 │ │ - ldr r3, [pc, #112] @ (75f48 ) │ │ - ldr r1, [pc, #112] @ (75f4c ) │ │ + ldr r3, [pc, #112] @ (75fb0 ) │ │ + ldr r1, [pc, #112] @ (75fb4 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #55 @ 0x37 │ │ - bl 414b0 │ │ - ldr r0, [pc, #44] @ (75f18 ) │ │ + bl 417b8 │ │ + ldr r0, [pc, #44] @ (75f80 ) │ │ movs r1, #37 @ 0x25 │ │ - ldr r2, [pc, #44] @ (75f1c ) │ │ + ldr r2, [pc, #44] @ (75f84 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ movs r0, #1 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ mov r4, r0 │ │ ldr r0, [sp, #40] @ 0x28 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #44] @ 0x2c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ nop │ │ - ldrb r2, [r1, r0] │ │ + ldrh r2, [r6, r6] │ │ movs r6, r0 │ │ - cmp r4, #198 @ 0xc6 │ │ - @ instruction: 0xfffa5bd4 │ │ + cmp r4, #94 @ 0x5e │ │ + @ instruction: 0xfffa5b7c │ │ movs r6, r0 │ │ - add r2, sp, #520 @ 0x208 │ │ - vrsra.u64 q11, q6, #6 │ │ + add r2, sp, #104 @ 0x68 │ │ + sha1su1.32 q11, q2 │ │ movs r6, r0 │ │ asrs r1, r1, #17 │ │ movs r0, r0 │ │ - ldrh r6, [r4, r0] │ │ + ldr r6, [r1, r7] │ │ movs r6, r0 │ │ - ldr r5, [pc, #524] @ (76140 ) │ │ - @ instruction: 0xfff9e895 │ │ + ldr r4, [pc, #588] @ (761e8 ) │ │ + @ instruction: 0xfff9e899 │ │ movs r1, r0 │ │ - ldr r0, [r5, r7] │ │ + ldr r0, [r2, r6] │ │ + movs r6, r0 │ │ + str r6, [r5, r4] │ │ + vtbx.8 d26, {d25-d28}, d17 │ │ + @ instruction: 0xfffc23c1 │ │ + vtbx.8 d21, {d26-d27}, d0 │ │ movs r6, r0 │ │ - strh r7, [r0, r1] │ │ - vtbx.8 d26, {d9-d10}, d1 │ │ - vcls.s d18, d25 │ │ - vshll.u32 , d8, #26 │ │ - movs r6, r0 │ │ - ldr r6, [r0, r7] │ │ - movs r6, r0 │ │ - movs r6, #126 @ 0x7e │ │ - vqshlu.s32 q9, q15, #26 │ │ - vrintm.f32 q9, │ │ - vrint?.f32 d18, d31 │ │ - vqshlu.s32 d18, d22, #26 │ │ - vqshlu.s64 q9, q1, #58 @ 0x3a │ │ - vqshlu.s32 d18, d23, #26 │ │ - vrint?.f32 d18, d18 │ │ - vrint?.f32 q9, q9 │ │ - vqshl.u32 q9, q0, #26 │ │ - vqshl.u32 q9, q0, #26 │ │ - vrintm.f32 d18, d20 │ │ - vqshl.u32 q9, q15, #26 │ │ - vrint?.f32 q9, │ │ - vqshl.u64 d18, d17, #58 @ 0x3a │ │ - vqshl.u32 d18, d29, #26 │ │ - vqshl.u32 d18, d13, #26 │ │ - vqshlu.s64 q9, , #58 @ 0x3a │ │ - vrintp.f32 d18, d23 │ │ - vqshl.u64 d18, d27, #58 @ 0x3a │ │ - vqshl.u64 d18, d9, #58 @ 0x3a │ │ - vqshl.u32 d18, d30, #26 │ │ - vtbl.8 d18, {d26}, d16 │ │ - vtbl.8 d26, {d26-d28}, d15 │ │ + ldr r6, [r5, r5] │ │ + movs r6, r0 │ │ + movs r6, #22 │ │ + vqshlu.s32 d18, d6, #26 │ │ + vrint?.f32 q9, │ │ + vrintz.f32 q9, │ │ + vrintz.f32 q9, q7 │ │ + vrint?.f32 q9, q13 │ │ + vrintz.f32 q9, │ │ + vqshlu.s64 d18, d26, #58 @ 0x3a │ │ + vsli.64 q9, q13, #58 @ 0x3a │ │ + vrintm.f32 q9, q12 │ │ + vrintm.f32 q9, q12 │ │ + vqshlu.s32 d18, d28, #26 │ │ + vqshl.u32 d18, d6, #26 │ │ + vqshlu.s64 q9, , #58 @ 0x3a │ │ + vrint?.f32 q9, │ │ + vqshlu.s64 q9, , #58 @ 0x3a │ │ + vqshlu.s64 d18, d21, #58 @ 0x3a │ │ + vrint?.f32 q9, │ │ + vqshl.u32 d18, d31, #26 │ │ + vqshl.u32 q9, , #26 │ │ + vqshl.u32 d18, d17, #26 │ │ + vqshlu.s64 q9, q3, #58 @ 0x3a │ │ + vqshrun.s64 d18, q12, #6 │ │ + @ instruction: 0xfffaad2f │ │ vsra.u64 q8, , #4 │ │ movs r0, r0 │ │ - subs r0, #146 @ 0x92 │ │ + subs r0, #97 @ 0x61 │ │ @ instruction: 0xfff9e9d1 │ │ movs r3, #0 │ │ ldrd r0, r1, [r0, #4] │ │ - b.w 3faa0 │ │ + b.w 3fda8 │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #4 │ │ mov r5, r0 │ │ ldr r0, [r0, #0] │ │ ldr r6, [r5, #8] │ │ mov r4, r2 │ │ subs r0, r0, r6 │ │ cmp r2, r0 │ │ - bhi.n 75fea │ │ + bhi.n 76052 │ │ ldr r0, [r5, #4] │ │ mov r2, r4 │ │ add r0, r6 │ │ - bl d53c6 │ │ + bl d52ea │ │ adds r0, r6, r4 │ │ str r0, [r5, #8] │ │ movs r0, #0 │ │ add sp, #4 │ │ pop {r4, r5, r6, r7, pc} │ │ mov r7, r1 │ │ mov r0, r5 │ │ mov r1, r6 │ │ mov r2, r4 │ │ - bl 760b4 │ │ + bl 7611c │ │ ldr r6, [r5, #8] │ │ mov r1, r7 │ │ - b.n 75fd6 │ │ + b.n 7603e │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #4 │ │ ldr r4, [r0, #8] │ │ cmp r1, #128 @ 0x80 │ │ - bcs.n 7600a │ │ + bcs.n 76072 │ │ movs r5, #1 │ │ - b.n 7601e │ │ + b.n 76086 │ │ cmp.w r1, #2048 @ 0x800 │ │ - bcs.n 76014 │ │ + bcs.n 7607c │ │ movs r5, #2 │ │ - b.n 7601e │ │ + b.n 76086 │ │ movs r5, #4 │ │ cmp.w r1, #65536 @ 0x10000 │ │ it cc │ │ movcc r5, #3 │ │ ldr r2, [r0, #0] │ │ subs r2, r2, r4 │ │ cmp r5, r2 │ │ mov r2, r4 │ │ - bhi.n 76088 │ │ + bhi.n 760f0 │ │ ldr r3, [r0, #4] │ │ cmp r1, #128 @ 0x80 │ │ add r2, r3 │ │ - bcc.n 7607c │ │ + bcc.n 760e4 │ │ movw ip, #65534 @ 0xfffe │ │ mov r6, r1 │ │ movt ip, #1023 @ 0x3ff │ │ lsrs r3, r1, #6 │ │ bfi r6, ip, #6, #26 │ │ cmp.w r1, #2048 @ 0x800 │ │ - bcs.n 7604e │ │ + bcs.n 760b6 │ │ strb r6, [r2, #1] │ │ orr.w r1, r3, #192 @ 0xc0 │ │ - b.n 7607c │ │ + b.n 760e4 │ │ bfi r3, ip, #6, #26 │ │ mov.w lr, r1, lsr #12 │ │ movs r7, #0 │ │ cmp.w r7, r1, lsr #16 │ │ - bne.n 76068 │ │ + bne.n 760d0 │ │ strb r6, [r2, #2] │ │ orr.w r1, lr, #224 @ 0xe0 │ │ strb r3, [r2, #1] │ │ - b.n 7607c │ │ + b.n 760e4 │ │ mvn.w r7, #15 │ │ orr.w r1, r7, r1, lsr #18 │ │ bfi lr, ip, #6, #26 │ │ strb r6, [r2, #3] │ │ strb r3, [r2, #2] │ │ strb.w lr, [r2, #1] │ │ strb r1, [r2, #0] │ │ @@ -117404,198 +117317,198 @@ │ │ movs r0, #0 │ │ add sp, #4 │ │ pop {r4, r5, r6, r7, pc} │ │ mov r7, r1 │ │ mov r1, r4 │ │ mov r2, r5 │ │ mov r6, r0 │ │ - bl 760b4 │ │ + bl 7611c │ │ ldr r2, [r6, #8] │ │ mov r1, r7 │ │ mov r0, r6 │ │ ldr r3, [r0, #4] │ │ cmp r1, #128 @ 0x80 │ │ add r2, r3 │ │ - bcs.n 76030 │ │ - b.n 7607c │ │ + bcs.n 76098 │ │ + b.n 760e4 │ │ mov r3, r2 │ │ mov r2, r1 │ │ - ldr r1, [pc, #4] @ (760b0 ) │ │ + ldr r1, [pc, #4] @ (76118 ) │ │ add r1, pc │ │ - b.w 3ef94 │ │ - ldrsb r2, [r4, r7] │ │ + b.w 3f29c │ │ + ldrsb r2, [r1, r6] │ │ movs r6, r0 │ │ push {r4, r5, r7, lr} │ │ sub sp, #24 │ │ adds r5, r2, r1 │ │ - bcs.n 760f6 │ │ + bcs.n 7615e │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ movs r0, #1 │ │ strd r0, r0, [sp] │ │ add r0, sp, #12 │ │ cmp.w r5, r1, lsl #1 │ │ it ls │ │ lslls r5, r1, #1 │ │ cmp r5, #8 │ │ it ls │ │ movls r5, #8 │ │ mov r3, r5 │ │ - bl 332e6 │ │ + bl 334ae │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #0 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r7, lr} │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ movs r0, #24 │ │ movs r3, #8 │ │ strd r3, r0, [sp] │ │ movs r5, #4 │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 332e6 │ │ + bl 334ae │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r6, r7, lr} │ │ sub sp, #4 │ │ ldrd r1, r3, [r0, #4] │ │ cmp r3, r1 │ │ - beq.n 76156 │ │ - bcs.n 761c6 │ │ + beq.n 761be │ │ + bcs.n 7622e │ │ ldr r2, [r0, #0] │ │ ldrb r4, [r2, r3] │ │ cmp r4, #34 @ 0x22 │ │ - beq.n 76156 │ │ + beq.n 761be │ │ cmp r4, #92 @ 0x5c │ │ it ne │ │ cmpne r4, #31 │ │ - bhi.n 7615a │ │ + bhi.n 761c2 │ │ add sp, #4 │ │ pop {r4, r5, r6, r7, pc} │ │ add.w lr, r3, #1 │ │ sub.w ip, r1, lr │ │ movw r1, #65532 @ 0xfffc │ │ movt r1, #32767 @ 0x7fff │ │ add.w r3, r2, lr │ │ and.w r1, r1, ip │ │ negs r1, r1 │ │ - cbz r1, 761b4 │ │ + cbz r1, 7621c │ │ mov r4, r3 │ │ ldr.w r5, [r3], #4 │ │ adds r1, #4 │ │ eor.w r7, r5, #572662306 @ 0x22222222 │ │ sub.w r6, r5, #538976288 @ 0x20202020 │ │ sub.w r7, r7, #16843009 @ 0x1010101 │ │ orrs r6, r7 │ │ eor.w r7, r5, #1549556828 @ 0x5c5c5c5c │ │ sub.w r7, r7, #16843009 @ 0x1010101 │ │ orrs r6, r7 │ │ bic.w r5, r6, r5 │ │ bics.w r5, r5, #2139062143 @ 0x7f7f7f7f │ │ - beq.n 76174 │ │ + beq.n 761dc │ │ subs r1, r4, r2 │ │ rbit r2, r5 │ │ clz r2, r2 │ │ add.w r1, r1, r2, lsr #3 │ │ str r1, [r0, #8] │ │ add sp, #4 │ │ pop {r4, r5, r6, r7, pc} │ │ bic.w r1, ip, #3 │ │ add r1, lr │ │ str r1, [r0, #8] │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 76570 │ │ - ldr r2, [pc, #8] @ (761d0 ) │ │ + b.w 765d8 │ │ + ldr r2, [pc, #8] @ (76238 ) │ │ mov r0, r3 │ │ add r2, pc │ │ - bl 3fa74 │ │ - strb r2, [r6, r7] │ │ + bl 3fd7c │ │ + strb r2, [r3, r6] │ │ movs r6, r0 │ │ push {r4, r5, r7, lr} │ │ mov r4, r2 │ │ mov r5, r0 │ │ ldrd r0, r3, [r1] │ │ ldr r2, [r1, #8] │ │ mov r1, r3 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ mov r1, r2 │ │ mov r0, r4 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ movs r1, #2 │ │ strd r1, r0, [r5] │ │ pop {r4, r5, r7, pc} │ │ push {r4, r5, r7, lr} │ │ mov r4, r2 │ │ mov r5, r0 │ │ ldrd r0, r3, [r1] │ │ ldr r2, [r1, #8] │ │ mov r1, r3 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ mov r1, r2 │ │ mov r0, r4 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ str r0, [r5, #4] │ │ movs r0, #1 │ │ strb r0, [r5, #0] │ │ pop {r4, r5, r7, pc} │ │ push {r4, lr} │ │ mov r4, r1 │ │ ldrd r3, r1, [r0] │ │ ldr r2, [r0, #8] │ │ mov r0, r3 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ mov r1, r2 │ │ mov r0, r4 │ │ mov r2, r3 │ │ ldmia.w sp!, {r4, lr} │ │ - b.w 75c44 │ │ - bmi.n 761f2 │ │ + b.w 75cac │ │ + bmi.n 7625a │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #28 │ │ mov fp, r0 │ │ ldrd r9, r0, [r0, #4] │ │ cmp r9, r0 │ │ - bcc.w 764da │ │ - ldr r4, [pc, #736] @ (7653c ) │ │ + bcc.w 76542 │ │ + ldr r4, [pc, #736] @ (765a4 ) │ │ sub.w r2, r9, r0 │ │ - ldr r6, [pc, #732] @ (76540 ) │ │ + ldr r6, [pc, #732] @ (765a8 ) │ │ cmp r2, #3 │ │ add r4, pc │ │ add r6, pc │ │ - bls.n 762c2 │ │ + bls.n 7632a │ │ ldr.w r2, [fp] │ │ mov r7, r4 │ │ add.w sl, r0, #4 │ │ mov r8, r6 │ │ str.w sl, [fp, #8] │ │ ldrb r3, [r2, r0] │ │ add r2, r0 │ │ @@ -117607,80 +117520,80 @@ │ │ ldrsh.w r0, [r7, ip, lsl #1] │ │ mov r5, r7 │ │ orrs r3, r4 │ │ ldrsh.w r2, [r6, r2, lsl #1] │ │ sxth r3, r3 │ │ orr.w r0, r0, r3, lsl #8 │ │ orrs r0, r2 │ │ - bmi.w 76422 │ │ + bmi.w 7648a │ │ movs r2, #0 │ │ strh.w r0, [sp, #10] │ │ strh.w r2, [sp, #8] │ │ mov r4, r5 │ │ ldrh.w r0, [sp, #8] │ │ cmp r0, #1 │ │ - bne.n 762e4 │ │ + bne.n 7634c │ │ ldr r0, [sp, #12] │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #4 │ │ add r2, sp, #16 │ │ str r0, [sp, #16] │ │ add r0, sp, #8 │ │ mov r7, r1 │ │ mov r1, fp │ │ mov r8, r6 │ │ str.w r9, [fp, #8] │ │ - bl 76548 │ │ + bl 765b0 │ │ mov r1, r7 │ │ mov sl, r9 │ │ ldrh.w r0, [sp, #8] │ │ cmp r0, #1 │ │ - beq.n 762ba │ │ + beq.n 76322 │ │ ldrh.w r6, [sp, #10] │ │ and.w r0, r6, #64512 @ 0xfc00 │ │ cmp.w r0, #56320 @ 0xdc00 │ │ - beq.w 76436 │ │ + beq.w 7649e │ │ add.w r0, r6, #9216 @ 0x2400 │ │ uxth r0, r0 │ │ cmp.w r0, #64512 @ 0xfc00 │ │ - bcs.n 7631e │ │ + bcs.n 76386 │ │ cmp r6, #128 @ 0x80 │ │ - bcs.n 76402 │ │ + bcs.n 7646a │ │ ldr r4, [r1, #8] │ │ ldr r0, [r1, #0] │ │ cmp r4, r0 │ │ - beq.w 764ce │ │ + beq.w 76536 │ │ ldr r0, [r1, #4] │ │ strb r6, [r0, r4] │ │ adds r0, r4, #1 │ │ str r0, [r1, #8] │ │ movs r0, #0 │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr.w r5, [fp] │ │ cmp sl, r9 │ │ - bcs.w 7643a │ │ + bcs.w 764a2 │ │ ldrb.w r2, [r5, sl] │ │ add.w r0, sl, #1 │ │ cmp r2, #92 @ 0x5c │ │ str.w r0, [fp, #8] │ │ - bne.w 76498 │ │ + bne.w 76500 │ │ cmp r0, r9 │ │ - bcs.w 7646a │ │ + bcs.w 764d2 │ │ ldrb r2, [r5, r0] │ │ add.w r0, sl, #2 │ │ cmp r2, #117 @ 0x75 │ │ - bne.w 76494 │ │ + bne.w 764fc │ │ cmp r9, r0 │ │ - bcc.w 764da │ │ + bcc.w 76542 │ │ str r1, [sp, #4] │ │ sub.w r1, r9, r0 │ │ cmp r1, #3 │ │ - bls.w 764aa │ │ + bls.w 76512 │ │ ldrb r1, [r5, r0] │ │ add r0, r5 │ │ add.w r7, sl, #6 │ │ ldrb r2, [r0, #1] │ │ ldrb r3, [r0, #2] │ │ ldrh.w r1, [r4, r1, lsl #1] │ │ ldrh.w r2, [r8, r2, lsl #1] │ │ @@ -117688,38 +117601,38 @@ │ │ ldrsh.w r3, [r4, r3, lsl #1] │ │ orrs r1, r2 │ │ ldrsh.w r0, [r8, r0, lsl #1] │ │ sxth r1, r1 │ │ orr.w r1, r3, r1, lsl #8 │ │ str.w r7, [fp, #8] │ │ orrs r0, r1 │ │ - bmi.w 764b2 │ │ + bmi.w 7651a │ │ movs r1, #0 │ │ strh.w r0, [sp, #10] │ │ strh.w r1, [sp, #8] │ │ ldrh.w r0, [sp, #8] │ │ cmp r0, #1 │ │ ldr r0, [sp, #4] │ │ - beq.n 762ba │ │ + beq.n 76322 │ │ ldrh.w r5, [sp, #10] │ │ add.w r1, r5, #8192 @ 0x2000 │ │ uxth r1, r1 │ │ cmp.w r1, #64512 @ 0xfc00 │ │ - bcc.n 76436 │ │ + bcc.n 7649e │ │ add.w r7, r6, #10240 @ 0x2800 │ │ add.w r3, r5, #9216 @ 0x2400 │ │ ldr r2, [r0, #0] │ │ uxth r7, r7 │ │ ldr r1, [r0, #8] │ │ uxth r3, r3 │ │ orr.w r6, r3, r7, lsl #10 │ │ add.w r4, r6, #65536 @ 0x10000 │ │ subs r2, r2, r1 │ │ cmp r2, #3 │ │ - bls.w 7652e │ │ + bls.w 76596 │ │ ldr r2, [r0, #4] │ │ movs r3, #240 @ 0xf0 │ │ orr.w r3, r3, r4, lsr #18 │ │ strb r3, [r2, r1] │ │ adds r3, r1, #4 │ │ str r3, [r0, #8] │ │ adds r0, r2, r1 │ │ @@ -117735,109 +117648,109 @@ │ │ movs r0, #0 │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r0, [r1, #0] │ │ ldr r2, [r1, #8] │ │ subs r0, r0, r2 │ │ cmp r0, #3 │ │ - bls.n 764e6 │ │ + bls.n 7654e │ │ ldr r0, [r1, #4] │ │ cmp.w r6, #2048 @ 0x800 │ │ add r0, r2 │ │ - bcs.n 76500 │ │ + bcs.n 76568 │ │ mvn.w r3, #63 @ 0x3f │ │ orr.w r7, r3, r6, lsr #6 │ │ movs r3, #2 │ │ - b.n 76514 │ │ + b.n 7657c │ │ movs r0, #12 │ │ add r2, sp, #16 │ │ str r0, [sp, #16] │ │ add r0, sp, #8 │ │ mov r4, r1 │ │ mov r1, fp │ │ - bl 76548 │ │ + bl 765b0 │ │ mov r1, r4 │ │ - b.n 762b0 │ │ + b.n 76318 │ │ movs r0, #20 │ │ - b.n 7649a │ │ + b.n 76502 │ │ movs r0, #4 │ │ add r2, sp, #16 │ │ str r0, [sp, #16] │ │ add r0, sp, #8 │ │ mov r7, r1 │ │ mov r1, fp │ │ - bl 761fc │ │ + bl 76264 │ │ ldrb.w r0, [sp, #8] │ │ cmp r0, #1 │ │ - beq.w 762ba │ │ + beq.w 76322 │ │ ldrb.w r2, [sp, #9] │ │ mov r1, r7 │ │ add.w r0, sl, #1 │ │ cmp r2, #92 @ 0x5c │ │ str.w r0, [fp, #8] │ │ - beq.w 7633a │ │ - b.n 76498 │ │ + beq.w 763a2 │ │ + b.n 76500 │ │ movs r0, #4 │ │ add r2, sp, #16 │ │ str r0, [sp, #16] │ │ add r0, sp, #8 │ │ mov r7, r1 │ │ mov r1, fp │ │ - bl 761fc │ │ + bl 76264 │ │ ldrb.w r0, [sp, #8] │ │ cmp r0, #1 │ │ - beq.w 762ba │ │ + beq.w 76322 │ │ ldrb.w r2, [sp, #9] │ │ mov r1, r7 │ │ add.w r0, sl, #2 │ │ cmp r2, #117 @ 0x75 │ │ - beq.w 7634c │ │ + beq.w 763b4 │ │ str.w r0, [fp, #8] │ │ movs r0, #23 │ │ add r1, sp, #16 │ │ str r0, [sp, #16] │ │ mov r0, fp │ │ - bl 76224 │ │ + bl 7628c │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ str.w r9, [fp, #8] │ │ movs r0, #4 │ │ - b.n 764b4 │ │ + b.n 7651c │ │ movs r0, #12 │ │ str r0, [sp, #16] │ │ add r0, sp, #8 │ │ add r2, sp, #16 │ │ mov r1, fp │ │ - bl 76548 │ │ + bl 765b0 │ │ ldrh.w r0, [sp, #8] │ │ cmp r0, #1 │ │ ldr r0, [sp, #4] │ │ - beq.w 762ba │ │ - b.n 763a2 │ │ + beq.w 76322 │ │ + b.n 7640a │ │ mov r0, r1 │ │ mov r5, r1 │ │ - bl 3ec24 │ │ + bl 3ef2c │ │ mov r1, r5 │ │ - b.n 7630e │ │ - ldr r3, [pc, #104] @ (76544 ) │ │ + b.n 76376 │ │ + ldr r3, [pc, #104] @ (765ac ) │ │ mov r1, r9 │ │ mov r2, r9 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ mov r0, r1 │ │ mov r4, r1 │ │ mov r1, r2 │ │ movs r2, #4 │ │ - bl 760b4 │ │ + bl 7611c │ │ ldr r2, [r4, #8] │ │ mov r1, r4 │ │ ldr r0, [r1, #4] │ │ cmp.w r6, #2048 @ 0x800 │ │ add r0, r2 │ │ - bcc.n 76416 │ │ + bcc.n 7647e │ │ lsrs r3, r6, #6 │ │ movs r7, #2 │ │ bfi r3, r7, #6, #26 │ │ strb r3, [r0, #1] │ │ mvn.w r3, #31 │ │ orr.w r7, r3, r6, lsr #12 │ │ movs r3, #3 │ │ @@ -117848,118 +117761,118 @@ │ │ movs r1, #2 │ │ bfi r6, r1, #6, #26 │ │ strb.w r6, [r0, #-1] │ │ movs r0, #0 │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r2, #4 │ │ - bl 760b4 │ │ + bl 7611c │ │ ldr r0, [sp, #4] │ │ ldr r1, [r0, #8] │ │ - b.n 763d2 │ │ + b.n 7643a │ │ nop │ │ - subs r0, r2, #2 │ │ - vmull.u , d26, d14 │ │ - vsri.32 d21, d20, #6 │ │ + subs r0, r5, #0 │ │ + vdup.16 d17, d22[2] │ │ + vrsra.u64 , q6, #6 │ │ movs r6, r0 │ │ push {r4, r5, r7, lr} │ │ mov r4, r2 │ │ mov r5, r0 │ │ ldrd r0, r3, [r1] │ │ ldr r2, [r1, #8] │ │ mov r1, r3 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ mov r1, r2 │ │ mov r0, r4 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ str r0, [r5, #4] │ │ movs r0, #1 │ │ strh r0, [r5, #0] │ │ pop {r4, r5, r7, pc} │ │ ldrd r1, r2, [r0, #4] │ │ cmp r2, r1 │ │ - bcs.n 76596 │ │ + bcs.n 765fe │ │ ldr.w ip, [r0] │ │ ldrb.w r3, [ip, r2] │ │ cmp r3, #34 @ 0x22 │ │ it ne │ │ cmpne r3, #92 @ 0x5c │ │ - beq.n 76596 │ │ + beq.n 765fe │ │ cmp r3, #32 │ │ it cc │ │ bxcc lr │ │ adds r2, #1 │ │ str r2, [r0, #8] │ │ cmp r1, r2 │ │ - bne.n 7657c │ │ + bne.n 765e4 │ │ bx lr │ │ push {r4, r5, r7, lr} │ │ sub sp, #40 @ 0x28 │ │ - ldr r2, [pc, #56] @ (765d8 ) │ │ + ldr r2, [pc, #56] @ (76640 ) │ │ add r2, pc │ │ strd r1, r2, [sp] │ │ ldrd ip, r2, [r0] │ │ ldrd r3, r1, [r0, #8] │ │ - ldr r4, [pc, #44] @ (765dc ) │ │ - ldr r5, [pc, #48] @ (765e0 ) │ │ - ldr r0, [pc, #48] @ (765e4 ) │ │ + ldr r4, [pc, #44] @ (76644 ) │ │ + ldr r5, [pc, #48] @ (76648 ) │ │ + ldr r0, [pc, #48] @ (7664c ) │ │ add r4, pc │ │ strd r3, r1, [sp, #16] │ │ mov r1, sp │ │ add r5, pc │ │ strd r5, r1, [sp, #28] │ │ add r1, sp, #8 │ │ str r1, [sp, #24] │ │ add r0, pc │ │ add r1, sp, #24 │ │ strd ip, r2, [sp, #8] │ │ str r4, [sp, #36] @ 0x24 │ │ - bl 754ec │ │ + bl 5f210 │ │ add sp, #40 @ 0x28 │ │ pop {r4, r5, r7, pc} │ │ nop │ │ - sbcs r6, r4 │ │ + adcs r6, r1 │ │ movs r6, r0 │ │ - add r1, pc, #140 @ (adr r1, 7666c ) │ │ - vcvt.u16.f16 d30, d7, #2 │ │ - vsri.32 , q7, #1 │ │ + @ instruction: 0xef83ffff │ │ + stcl 15, cr15, [r3, #-1020]! @ 0xfffffc04 │ │ + strb r3, [r2, #19] │ │ vtbl.8 d30, {d9-d10}, d29 │ │ - ldr r7, [pc, #960] @ (769ac ) │ │ + ldr r7, [pc, #960] @ (76a14 ) │ │ sub sp, #20 │ │ mov r4, r0 │ │ - ldr r0, [pc, #464] @ (767c4 ) │ │ - ldr r6, [pc, #468] @ (767c8 ) │ │ + ldr r0, [pc, #464] @ (7682c ) │ │ + ldr r6, [pc, #468] @ (76830 ) │ │ add.w r9, sp, #8 │ │ add r0, pc │ │ mov.w sl, #0 │ │ add r6, pc │ │ mov r8, r0 │ │ mov r0, r4 │ │ - bl 76138 │ │ + bl 761a0 │ │ ldrd r7, r0, [r4, #4] │ │ cmp r0, r7 │ │ - beq.w 767a4 │ │ - bcs.w 767ba │ │ + beq.w 7680c │ │ + bcs.w 76822 │ │ ldr.w fp, [r4] │ │ ldrb.w r1, [fp, r0] │ │ cmp r1, #92 @ 0x5c │ │ - bne.w 76780 │ │ + bne.w 767e8 │ │ adds r5, r0, #1 │ │ str r5, [r4, #8] │ │ cmp r5, r7 │ │ - bcs.w 76736 │ │ + bcs.w 7679e │ │ ldrb.w r1, [fp, r5] │ │ adds r5, r0, #2 │ │ str r5, [r4, #8] │ │ sub.w r0, r1, #34 @ 0x22 │ │ cmp r0, #83 @ 0x53 │ │ - bhi.w 767a8 │ │ + bhi.w 76810 │ │ tbh [pc, r0, lsl #1] │ │ lsls r4, r2, #1 │ │ lsls r2, r6, #2 │ │ lsls r2, r6, #2 │ │ lsls r2, r6, #2 │ │ lsls r2, r6, #2 │ │ lsls r2, r6, #2 │ │ @@ -118037,20 +117950,20 @@ │ │ lsls r2, r6, #2 │ │ lsls r2, r6, #2 │ │ lsls r2, r6, #2 │ │ lsls r4, r2, #1 │ │ lsls r2, r6, #2 │ │ lsls r4, r2, #1 │ │ lsls r5, r2, #1 │ │ - b.n 76602 │ │ + b.n 7666a │ │ cmp r7, r5 │ │ - bcc.n 767ac │ │ + bcc.n 76814 │ │ subs r0, r7, r5 │ │ cmp r0, #3 │ │ - bls.n 7675a │ │ + bls.n 767c2 │ │ add.w r1, fp, r5 │ │ ldrb.w r0, [fp, r5] │ │ adds r7, r5, #4 │ │ ldrb r2, [r1, #1] │ │ ldrb r3, [r1, #2] │ │ ldrb r1, [r1, #3] │ │ ldrh.w r0, [r8, r0, lsl #1] │ │ @@ -118059,45 +117972,45 @@ │ │ ldrh.w r1, [r6, r1, lsl #1] │ │ orrs r0, r2 │ │ orrs r0, r3 │ │ str r7, [r4, #8] │ │ orrs r0, r1 │ │ sxth r0, r0 │ │ cmp r0, #0 │ │ - bmi.n 76760 │ │ + bmi.n 767c8 │ │ strh.w sl, [sp] │ │ ldrh.w r0, [sp] │ │ cmp r0, #1 │ │ - bne.w 76602 │ │ - b.n 76778 │ │ + bne.w 7666a │ │ + b.n 767e0 │ │ movs r0, #4 │ │ mov r1, r4 │ │ str r0, [sp, #8] │ │ mov r0, sp │ │ mov r2, r9 │ │ - bl 761fc │ │ + bl 76264 │ │ ldrb.w r0, [sp] │ │ - cbnz r0, 76778 │ │ + cbnz r0, 767e0 │ │ ldrb.w r1, [sp, #1] │ │ sub.w r0, r1, #34 @ 0x22 │ │ cmp r0, #83 @ 0x53 │ │ - bls.w 76640 │ │ - b.n 767a8 │ │ + bls.w 766a8 │ │ + b.n 76810 │ │ str r7, [r4, #8] │ │ movs r0, #4 │ │ - b.n 76762 │ │ + b.n 767ca │ │ movs r0, #12 │ │ str r0, [sp, #8] │ │ mov r0, sp │ │ mov r1, r4 │ │ mov r2, r9 │ │ - bl 76548 │ │ + bl 765b0 │ │ ldrh.w r0, [sp] │ │ cmp r0, #1 │ │ - bne.w 76602 │ │ + bne.w 7666a │ │ ldr r0, [sp, #4] │ │ add sp, #20 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ cmp r1, #34 @ 0x22 │ │ itttt eq │ │ addeq r0, #1 │ │ streq r0, [r4, #8] │ │ @@ -118105,81 +118018,81 @@ │ │ addeq sp, #20 │ │ it eq │ │ ldmiaeq.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #16 │ │ add r1, sp, #8 │ │ str r0, [sp, #8] │ │ mov r0, r4 │ │ - bl 76224 │ │ + bl 7628c │ │ add sp, #20 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #4 │ │ - b.n 76794 │ │ + b.n 767fc │ │ movs r0, #12 │ │ - b.n 76794 │ │ - ldr r3, [pc, #32] @ (767d0 ) │ │ + b.n 767fc │ │ + ldr r3, [pc, #32] @ (76838 ) │ │ mov r0, r5 │ │ mov r1, r7 │ │ mov r2, r7 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r2, [pc, #16] @ (767cc ) │ │ + bl 3fcb0 │ │ + ldr r2, [pc, #16] @ (76834 ) │ │ mov r1, r7 │ │ add r2, pc │ │ - bl 3fa74 │ │ - subs r4, r7, r3 │ │ - @ instruction: 0xfffa18f6 │ │ - vuzp.32 , q3 │ │ + bl 3fd7c │ │ + subs r4, r2, r2 │ │ + vtbl.8 d17, {d26}, d14 │ │ + vtrn.32 , q15 │ │ movs r6, r0 │ │ - str r0, [r4, r5] │ │ + str r0, [r1, r4] │ │ movs r6, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #44 @ 0x2c │ │ mov r9, r2 │ │ mov r6, r1 │ │ str r0, [sp, #4] │ │ mov r0, r6 │ │ ldr r5, [r6, #8] │ │ - bl 76138 │ │ + bl 761a0 │ │ ldrd r4, r7, [r6, #4] │ │ cmp r7, r4 │ │ - beq.w 76ac8 │ │ - bcs.w 76b58 │ │ + beq.w 76b30 │ │ + bcs.w 76bc0 │ │ ldr.w fp, [r6] │ │ ldrb.w r0, [fp, r7] │ │ cmp r0, #92 @ 0x5c │ │ - bne.w 76a4a │ │ + bne.w 76ab2 │ │ cmp r7, r5 │ │ - bcc.w 76b00 │ │ + bcc.w 76b68 │ │ ldr.w r0, [r9] │ │ mov sl, r9 │ │ ldr.w r9, [r9, #8] │ │ sub.w r8, r7, r5 │ │ sub.w r0, r0, r9 │ │ cmp r8, r0 │ │ - bhi.w 76a0a │ │ + bhi.w 76a72 │ │ ldr.w r0, [sl, #4] │ │ add.w r1, fp, r5 │ │ str r0, [sp, #8] │ │ mov r2, r8 │ │ add r0, r9 │ │ - bl d53c6 │ │ + bl d52ea │ │ add.w r5, r9, r8 │ │ adds r0, r7, #1 │ │ mov r9, sl │ │ cmp r0, r4 │ │ str.w r5, [sl, #8] │ │ str r0, [r6, #8] │ │ - bcs.w 76984 │ │ + bcs.w 769ec │ │ ldrb.w r0, [fp, r0] │ │ adds r1, r7, #2 │ │ str r1, [r6, #8] │ │ subs r0, #34 @ 0x22 │ │ cmp r0, #83 @ 0x53 │ │ - bhi.w 76a30 │ │ + bhi.w 76a98 │ │ tbh [pc, r0, lsl #1] │ │ lsls r4, r2, #1 │ │ lsls r2, r5, #3 │ │ lsls r2, r5, #3 │ │ lsls r2, r5, #3 │ │ lsls r2, r5, #3 │ │ lsls r2, r5, #3 │ │ @@ -118260,271 +118173,271 @@ │ │ lsls r6, r7, #1 │ │ lsls r2, r5, #3 │ │ lsls r5, r0, #2 │ │ lsls r2, r4, #3 │ │ ldr r1, [sp, #8] │ │ ldr.w r0, [r9] │ │ cmp r5, r0 │ │ - beq.n 769fe │ │ + beq.n 76a66 │ │ movs r0, #34 @ 0x22 │ │ - b.n 76972 │ │ + b.n 769da │ │ ldr r1, [sp, #8] │ │ ldr.w r0, [r9] │ │ cmp r5, r0 │ │ - beq.n 769aa │ │ + beq.n 76a12 │ │ movs r0, #12 │ │ - b.n 76972 │ │ + b.n 769da │ │ ldr r1, [sp, #8] │ │ ldr.w r0, [r9] │ │ cmp r5, r0 │ │ - beq.n 769b6 │ │ + beq.n 76a1e │ │ movs r0, #10 │ │ - b.n 76972 │ │ + b.n 769da │ │ ldr r1, [sp, #8] │ │ ldr.w r0, [r9] │ │ cmp r5, r0 │ │ - beq.n 769c2 │ │ + beq.n 76a2a │ │ movs r0, #8 │ │ - b.n 76972 │ │ + b.n 769da │ │ ldr r1, [sp, #8] │ │ ldr.w r0, [r9] │ │ cmp r5, r0 │ │ - beq.n 769ce │ │ + beq.n 76a36 │ │ movs r0, #92 @ 0x5c │ │ - b.n 76972 │ │ + b.n 769da │ │ ldr r1, [sp, #8] │ │ ldr.w r0, [r9] │ │ cmp r5, r0 │ │ - beq.n 769da │ │ + beq.n 76a42 │ │ movs r0, #47 @ 0x2f │ │ - b.n 76972 │ │ + b.n 769da │ │ ldr r1, [sp, #8] │ │ ldr.w r0, [r9] │ │ cmp r5, r0 │ │ - beq.n 769e6 │ │ + beq.n 76a4e │ │ movs r0, #13 │ │ - b.n 76972 │ │ + b.n 769da │ │ ldr r1, [sp, #8] │ │ ldr.w r0, [r9] │ │ cmp r5, r0 │ │ - beq.n 769f2 │ │ + beq.n 76a5a │ │ movs r0, #9 │ │ strb r0, [r1, r5] │ │ adds r0, r5, #1 │ │ str.w r0, [r9, #8] │ │ movs r0, #0 │ │ cmp r0, #0 │ │ - beq.w 767e0 │ │ - b.n 76a3c │ │ + beq.w 76848 │ │ + b.n 76aa4 │ │ movs r0, #4 │ │ add r2, sp, #32 │ │ str r0, [sp, #32] │ │ add r0, sp, #20 │ │ mov r1, r6 │ │ - bl 761fc │ │ + bl 76264 │ │ ldrb.w r0, [sp, #20] │ │ cmp r0, #0 │ │ - bne.w 76ae4 │ │ + bne.w 76b4c │ │ ldrb.w r0, [sp, #21] │ │ subs r0, #34 @ 0x22 │ │ cmp r0, #83 @ 0x53 │ │ - bls.w 76858 │ │ - b.n 76a30 │ │ + bls.w 768c0 │ │ + b.n 76a98 │ │ mov r0, r9 │ │ - bl 3ec24 │ │ + bl 3ef2c │ │ ldr.w r1, [r9, #4] │ │ - b.n 7691c │ │ + b.n 76984 │ │ mov r0, r9 │ │ - bl 3ec24 │ │ + bl 3ef2c │ │ ldr.w r1, [r9, #4] │ │ - b.n 7692a │ │ + b.n 76992 │ │ mov r0, r9 │ │ - bl 3ec24 │ │ + bl 3ef2c │ │ ldr.w r1, [r9, #4] │ │ - b.n 76938 │ │ + b.n 769a0 │ │ mov r0, r9 │ │ - bl 3ec24 │ │ + bl 3ef2c │ │ ldr.w r1, [r9, #4] │ │ - b.n 76946 │ │ + b.n 769ae │ │ mov r0, r9 │ │ - bl 3ec24 │ │ + bl 3ef2c │ │ ldr.w r1, [r9, #4] │ │ - b.n 76954 │ │ + b.n 769bc │ │ mov r0, r9 │ │ - bl 3ec24 │ │ + bl 3ef2c │ │ ldr.w r1, [r9, #4] │ │ - b.n 76962 │ │ + b.n 769ca │ │ mov r0, r9 │ │ - bl 3ec24 │ │ + bl 3ef2c │ │ ldr.w r1, [r9, #4] │ │ - b.n 76970 │ │ + b.n 769d8 │ │ mov r0, r9 │ │ - bl 3ec24 │ │ + bl 3ef2c │ │ ldr.w r1, [r9, #4] │ │ - b.n 7690e │ │ + b.n 76976 │ │ mov r0, sl │ │ mov r1, r9 │ │ mov r2, r8 │ │ str.w sl, [sp] │ │ - bl 760b4 │ │ + bl 7611c │ │ ldr r0, [sp, #0] │ │ ldr.w r9, [r0, #8] │ │ - b.n 76822 │ │ + b.n 7688a │ │ mov r0, r6 │ │ mov r1, r9 │ │ - bl 76248 │ │ + bl 762b0 │ │ cmp r0, #0 │ │ - beq.w 767e0 │ │ - b.n 76a3c │ │ + beq.w 76848 │ │ + b.n 76aa4 │ │ movs r0, #12 │ │ add r1, sp, #32 │ │ str r0, [sp, #32] │ │ mov r0, r6 │ │ - bl 76224 │ │ + bl 7628c │ │ ldr r2, [sp, #4] │ │ movs r1, #2 │ │ strd r1, r0, [r2] │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ cmp r0, #34 @ 0x22 │ │ - bne.n 76acc │ │ + bne.n 76b34 │ │ ldr.w r8, [r9, #8] │ │ cmp.w r8, #0 │ │ - beq.n 76a9c │ │ + beq.n 76b04 │ │ cmp r7, r5 │ │ - bcc.n 76b28 │ │ + bcc.n 76b90 │ │ ldr.w r0, [r9] │ │ add.w r1, fp, r5 │ │ subs r4, r7, r5 │ │ sub.w r0, r0, r8 │ │ cmp r4, r0 │ │ - bhi.n 76b44 │ │ + bhi.n 76bac │ │ ldr.w r5, [r9, #4] │ │ mov r2, r4 │ │ add.w r0, r5, r8 │ │ - bl d53c6 │ │ + bl d52ea │ │ adds r0, r7, #1 │ │ add.w r2, r8, r4 │ │ str r0, [r6, #8] │ │ add r0, sp, #20 │ │ mov r1, r5 │ │ str.w r2, [r9, #8] │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #20] │ │ - cbnz r0, 76ae8 │ │ + cbnz r0, 76b50 │ │ ldrd r0, r1, [sp, #24] │ │ movs r2, #1 │ │ - b.n 76aba │ │ + b.n 76b22 │ │ cmp r7, r5 │ │ - bcc.n 76b36 │ │ + bcc.n 76b9e │ │ adds r0, r7, #1 │ │ str r0, [r6, #8] │ │ add.w r1, fp, r5 │ │ subs r2, r7, r5 │ │ add r0, sp, #20 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #20] │ │ - cbnz r0, 76b0e │ │ + cbnz r0, 76b76 │ │ ldrd r0, r1, [sp, #24] │ │ movs r2, #0 │ │ ldr r3, [sp, #4] │ │ str r2, [r3, #0] │ │ str r0, [r3, #4] │ │ str r1, [r3, #8] │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #4 │ │ - b.n 76ad2 │ │ + b.n 76b3a │ │ adds r0, r7, #1 │ │ str r0, [r6, #8] │ │ movs r0, #16 │ │ str r0, [sp, #32] │ │ add r2, sp, #32 │ │ ldr r0, [sp, #4] │ │ mov r1, r6 │ │ - bl 761d4 │ │ + bl 7623c │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r0, [sp, #24] │ │ - b.n 76a3c │ │ + b.n 76aa4 │ │ movs r0, #15 │ │ add r2, sp, #32 │ │ str r0, [sp, #32] │ │ add r0, sp, #12 │ │ mov r1, r6 │ │ - bl 76b74 │ │ + bl 76bdc │ │ ldr r0, [sp, #12] │ │ - cbz r0, 76b24 │ │ + cbz r0, 76b8c │ │ ldr r1, [sp, #16] │ │ movs r2, #1 │ │ - b.n 76aba │ │ - ldr r3, [pc, #108] @ (76b70 ) │ │ + b.n 76b22 │ │ + ldr r3, [pc, #108] @ (76bd8 ) │ │ add r3, pc │ │ mov r0, r5 │ │ mov r1, r7 │ │ mov r2, r4 │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ movs r0, #15 │ │ add r2, sp, #32 │ │ str r0, [sp, #32] │ │ add r0, sp, #12 │ │ mov r1, r6 │ │ - bl 76b74 │ │ + bl 76bdc │ │ ldr r0, [sp, #12] │ │ - cbz r0, 76b24 │ │ + cbz r0, 76b8c │ │ ldr r1, [sp, #16] │ │ - b.n 76ab8 │ │ + b.n 76b20 │ │ ldr r0, [sp, #16] │ │ - b.n 76a3c │ │ - ldr r3, [pc, #64] @ (76b6c ) │ │ + b.n 76aa4 │ │ + ldr r3, [pc, #64] @ (76bd4 ) │ │ add r3, pc │ │ mov r0, r5 │ │ mov r1, r7 │ │ mov r2, r4 │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #48] @ (76b68 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #48] @ (76bd0 ) │ │ add r3, pc │ │ mov r0, r5 │ │ mov r1, r7 │ │ mov r2, r4 │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ mov r5, r1 │ │ mov r0, r9 │ │ mov r1, r8 │ │ mov r2, r4 │ │ - bl 760b4 │ │ + bl 7611c │ │ ldr.w r8, [r9, #8] │ │ mov r1, r5 │ │ - b.n 76a6e │ │ - ldr r2, [pc, #8] @ (76b64 ) │ │ + b.n 76ad6 │ │ + ldr r2, [pc, #8] @ (76bcc ) │ │ mov r0, r7 │ │ mov r1, r4 │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r4, [pc, #440] @ (76d20 ) │ │ + bl 3fd7c │ │ + ldr r4, [pc, #88] @ (76c28 ) │ │ movs r6, r0 │ │ - ldr r4, [pc, #656] @ (76dfc ) │ │ + ldr r4, [pc, #304] @ (76d04 ) │ │ movs r6, r0 │ │ - ldr r4, [pc, #776] @ (76e78 ) │ │ + ldr r4, [pc, #424] @ (76d80 ) │ │ movs r6, r0 │ │ - ldr r4, [pc, #1000] @ (76f5c ) │ │ + ldr r4, [pc, #648] @ (76e64 ) │ │ movs r6, r0 │ │ push {r4, r5, r7, lr} │ │ mov r4, r2 │ │ mov r5, r0 │ │ ldrd r0, r3, [r1] │ │ ldr r2, [r1, #8] │ │ mov r1, r3 │ │ - bl 75b28 │ │ + bl 75b90 │ │ mov r2, r0 │ │ mov r3, r1 │ │ mov r1, r2 │ │ mov r0, r4 │ │ mov r2, r3 │ │ - bl 75c44 │ │ + bl 75cac │ │ movs r1, #0 │ │ strd r1, r0, [r5] │ │ pop {r4, r5, r7, pc} │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #8 │ │ @@ -118533,1209 +118446,1209 @@ │ │ mov r4, r2 │ │ mov r6, r0 │ │ movs r0, #9 │ │ tbb [pc, r1] │ │ cmp r2, #2 │ │ movs r6, #111 @ 0x6f │ │ lsls r0, r6, #28 │ │ - bmi.n 76c94 │ │ + bmi.n 76cfc │ │ mov r0, r4 │ │ movs r1, #0 │ │ movs r2, #12 │ │ movs r3, #0 │ │ add r6, sp, #4 │ │ str r5, [sp, #4] │ │ str r6, [sp, #0] │ │ - blx d63b4 │ │ + blx d63c4 │ │ mov r0, r4 │ │ - bl 933c4 │ │ + bl 93430 │ │ mov r1, r0 │ │ movs r2, #1 │ │ movs r0, #9 │ │ lsl.w r1, r2, r1 │ │ lsls r2, r1, #30 │ │ - bne.n 76c94 │ │ + bne.n 76cfc │ │ tst.w r1, #12 │ │ - beq.n 76c02 │ │ + beq.n 76c6a │ │ movs r0, #0 │ │ movs r1, #0 │ │ strd r6, r0, [sp] │ │ mov r0, r4 │ │ movs r2, #13 │ │ movs r3, #0 │ │ - blx d62ac │ │ + blx d62bc │ │ ldr r0, [sp, #4] │ │ str r0, [r5, #32] │ │ movs r0, #6 │ │ add sp, #8 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, r4 │ │ movs r1, #0 │ │ movs r2, #12 │ │ movs r3, #0 │ │ add.w r9, sp, #4 │ │ str r5, [sp, #4] │ │ str.w r9, [sp] │ │ - blx d63b4 │ │ + blx d63c4 │ │ mov r0, r4 │ │ - bl 933c4 │ │ + bl 93430 │ │ mov r2, r0 │ │ mov r8, r1 │ │ movs r0, #9 │ │ tbb [pc, r2] │ │ lsls r2, r6, #16 │ │ adds r0, #4 │ │ lsls r3, r0, #12 │ │ - b.n 76c02 │ │ + b.n 76c6a │ │ mov r0, r4 │ │ movs r1, #0 │ │ movs r2, #0 │ │ movs r3, #0 │ │ strd r9, r5, [sp] │ │ movs r5, #0 │ │ - blx d63b4 │ │ + blx d63c4 │ │ mov r0, r4 │ │ movs r1, #0 │ │ movs r2, #1 │ │ movs r3, #0 │ │ strd r9, r5, [sp] │ │ - blx d63b4 │ │ + blx d63c4 │ │ mov r0, r4 │ │ movs r1, #0 │ │ movs r2, #15 │ │ movs r3, #0 │ │ strd r9, r5, [sp] │ │ - blx d62ac │ │ + blx d62bc │ │ ldr r0, [sp, #4] │ │ movs r1, #0 │ │ movs r2, #15 │ │ movs r3, #0 │ │ bic.w r0, r0, r8 │ │ and.w r0, r0, #1 │ │ add r0, r8 │ │ strd r9, r0, [sp] │ │ mov r0, r4 │ │ - blx d63b4 │ │ + blx d63c4 │ │ movs r0, #7 │ │ add sp, #8 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ lsls r0, r6, #28 │ │ - bpl.n 76c38 │ │ + bpl.n 76ca0 │ │ mov r0, r5 │ │ mov r1, r4 │ │ - blx d6fb8 │ │ + blx d6fc8 │ │ mov r1, r0 │ │ movs r0, #9 │ │ cmp r1, #0 │ │ it eq │ │ moveq r0, #8 │ │ add sp, #8 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - bl 416f6 │ │ - bmi.n 76c5e │ │ + bl 419fe │ │ + bmi.n 76cc6 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #76 @ 0x4c │ │ str r3, [sp, #12] │ │ add r3, sp, #20 │ │ stmia r3!, {r0, r1, r2} │ │ mov fp, r1 │ │ mov r9, r0 │ │ - ldr r5, [pc, #848] @ (7701c ) │ │ + ldr r5, [pc, #848] @ (77084 ) │ │ ldr.w r8, [r7, #8] │ │ add r5, pc │ │ ldrex r0, [r5, #4] │ │ adds r1, r0, #1 │ │ strex r2, r1, [r5, #4] │ │ cmp r2, #0 │ │ - bne.n 76cd0 │ │ + bne.n 76d38 │ │ cmp r0, #0 │ │ - bmi.w 76ffc │ │ - ldr r4, [pc, #904] @ (77070 ) │ │ + bmi.w 77064 │ │ + ldr r4, [pc, #904] @ (770d8 ) │ │ add r4, pc │ │ ldr r6, [r4, #20] │ │ dmb ish │ │ - cbnz r6, 76cfa │ │ + cbnz r6, 76d62 │ │ add.w r0, r4, #20 │ │ - bl 7740c │ │ + bl 77474 │ │ mov r6, r0 │ │ mov r0, r6 │ │ str r4, [sp, #16] │ │ - blx d8830 │ │ + blx d8840 │ │ mov r4, r0 │ │ cmp r0, #1 │ │ - bhi.n 76d3e │ │ - bne.n 76d12 │ │ - ldr r0, [pc, #872] @ (77074 ) │ │ + bhi.n 76da6 │ │ + bne.n 76d7a │ │ + ldr r0, [pc, #872] @ (770dc ) │ │ add r0, pc │ │ - bl 774bc │ │ + bl 77524 │ │ movs r0, #12 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 77068 │ │ + beq.w 770d0 │ │ mov r4, r0 │ │ str r6, [r0, #8] │ │ movs r0, #0 │ │ strb r0, [r4, #4] │ │ str r0, [r4, #0] │ │ mov r0, r6 │ │ - blx d8830 │ │ + blx d8840 │ │ mov sl, r0 │ │ mov r0, r6 │ │ mov r1, r4 │ │ - blx d8840 │ │ + blx d8850 │ │ mov r0, sl │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrb r0, [r4, #4] │ │ cmp r0, #0 │ │ - bne.w 77020 │ │ + bne.w 77088 │ │ movs r0, #1 │ │ - ldr r1, [pc, #880] @ (770bc ) │ │ + ldr r1, [pc, #880] @ (77124 ) │ │ strb r0, [r4, #4] │ │ ldr r0, [r4, #0] │ │ adds r0, #1 │ │ str r0, [r4, #0] │ │ ldr r0, [r5, #64] @ 0x40 │ │ cmp r0, r1 │ │ - bhi.n 76d72 │ │ + bhi.n 76dda │ │ ldrex r1, [r5, #64] @ 0x40 │ │ cmp r1, r0 │ │ - bne.n 76d6e │ │ + bne.n 76dd6 │ │ adds r0, #1 │ │ strex r1, r0, [r5, #64] @ 0x40 │ │ - cbnz r1, 76d72 │ │ + cbnz r1, 76dda │ │ dmb ish │ │ - b.n 76d7a │ │ + b.n 76de2 │ │ clrex │ │ add.w r0, r5, #64 @ 0x40 │ │ - bl 7711c │ │ + bl 77184 │ │ ldr r0, [r5, #72] @ 0x48 │ │ - cbnz r0, 76d9c │ │ + cbnz r0, 76e04 │ │ ldrd r9, r6, [sp, #20] │ │ ldr r1, [r6, #20] │ │ mov r0, r9 │ │ blx r1 │ │ mov sl, r0 │ │ ldr r0, [sp, #28] │ │ mov r4, r1 │ │ cmp.w r8, #0 │ │ str r0, [sp, #8] │ │ - beq.n 76e2a │ │ + beq.n 76e92 │ │ mov.w fp, #3 │ │ - b.n 76ea4 │ │ + b.n 76f0c │ │ ldrd r9, r6, [sp, #20] │ │ ldr r1, [r6, #20] │ │ mov r0, r9 │ │ blx r1 │ │ str r0, [sp, #56] @ 0x38 │ │ ldr r0, [sp, #12] │ │ strb.w r0, [sp, #68] @ 0x44 │ │ ldr r0, [sp, #28] │ │ strb.w r8, [sp, #69] @ 0x45 │ │ strd r1, r0, [sp, #60] @ 0x3c │ │ ldrd r0, r1, [r5, #72] @ 0x48 │ │ ldr r2, [r1, #20] │ │ add r1, sp, #56 @ 0x38 │ │ blx r2 │ │ - bl 773d8 │ │ + bl 77440 │ │ ldr r0, [sp, #16] │ │ ldr r4, [r0, #20] │ │ dmb ish │ │ - cbnz r4, 76dd8 │ │ + cbnz r4, 76e40 │ │ adds r0, #20 │ │ - bl 7740c │ │ + bl 77474 │ │ mov r4, r0 │ │ mov r0, r4 │ │ - blx d8830 │ │ + blx d8840 │ │ mov r5, r0 │ │ cmp r0, #1 │ │ - bhi.n 76e16 │ │ - beq.n 76d0a │ │ + bhi.n 76e7e │ │ + beq.n 76d72 │ │ movs r0, #12 │ │ mov r8, r6 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 77068 │ │ + beq.w 770d0 │ │ mov r5, r0 │ │ str r4, [r0, #8] │ │ movs r0, #0 │ │ strb r0, [r5, #4] │ │ str r0, [r5, #0] │ │ mov r0, r4 │ │ - blx d8830 │ │ + blx d8840 │ │ mov r6, r0 │ │ mov r0, r4 │ │ mov r1, r5 │ │ - blx d8840 │ │ + blx d8850 │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r6, r8 │ │ movs r0, #0 │ │ strb r0, [r5, #4] │ │ ldr r0, [sp, #12] │ │ cmp r0, #0 │ │ - beq.w 77078 │ │ + beq.w 770e0 │ │ ldr r1, [r6, #20] │ │ mov r0, r9 │ │ - bl 77404 │ │ + bl 7746c │ │ ldr r0, [sp, #16] │ │ ldr.w fp, [r0, #20] │ │ dmb ish │ │ cmp.w fp, #0 │ │ - bne.n 76e44 │ │ + bne.n 76eac │ │ ldr r0, [sp, #16] │ │ adds r0, #20 │ │ - bl 7740c │ │ + bl 77474 │ │ mov fp, r0 │ │ mov r0, fp │ │ mov r8, r6 │ │ - blx d8830 │ │ + blx d8840 │ │ mov r6, r0 │ │ cmp r0, #1 │ │ - bhi.n 76e8c │ │ - bne.n 76e5e │ │ - ldr r0, [pc, #672] @ (770f8 ) │ │ + bhi.n 76ef4 │ │ + bne.n 76ec6 │ │ + ldr r0, [pc, #672] @ (77160 ) │ │ add r0, pc │ │ - bl 774bc │ │ - b.n 77098 │ │ + bl 77524 │ │ + b.n 77100 │ │ movs r0, #12 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 77090 │ │ + beq.w 770f8 │ │ mov r6, r0 │ │ str.w fp, [r0, #8] │ │ movs r0, #0 │ │ strb r0, [r6, #4] │ │ str r0, [r6, #0] │ │ mov r0, fp │ │ - blx d8830 │ │ + blx d8840 │ │ str r0, [sp, #4] │ │ mov r0, fp │ │ mov r1, r6 │ │ - blx d8840 │ │ + blx d8850 │ │ ldr r0, [sp, #4] │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [r6, #0] │ │ cmp r0, #1 │ │ - bls.n 76e9a │ │ + bls.n 76f02 │ │ mov.w fp, #1 │ │ mov r6, r8 │ │ - b.n 76ea4 │ │ - bl 7764c │ │ + b.n 76f0c │ │ + bl 776b4 │ │ mov r6, r8 │ │ uxtb.w fp, r0 │ │ ldr r0, [sp, #8] │ │ str r0, [sp, #32] │ │ ldr r4, [r4, #12] │ │ add r0, sp, #56 @ 0x38 │ │ mov r1, sl │ │ blx r4 │ │ mov r8, r6 │ │ add r6, sp, #56 @ 0x38 │ │ - ldr r0, [pc, #520] @ (770c0 ) │ │ + ldr r0, [pc, #520] @ (77128 ) │ │ ldmia r6, {r1, r2, r3, r6} │ │ eors r0, r6 │ │ - ldr r6, [pc, #520] @ (770c4 ) │ │ + ldr r6, [pc, #520] @ (7712c ) │ │ eors r2, r6 │ │ orrs r0, r2 │ │ - ldr r2, [pc, #516] @ (770c8 ) │ │ + ldr r2, [pc, #516] @ (77130 ) │ │ eors r2, r3 │ │ - ldr r3, [pc, #516] @ (770cc ) │ │ + ldr r3, [pc, #516] @ (77134 ) │ │ eors r1, r3 │ │ orrs r1, r2 │ │ orrs r0, r1 │ │ - bne.n 76f24 │ │ + bne.n 76f8c │ │ movs r0, #4 │ │ mov r1, sl │ │ mov r6, r8 │ │ ldr.w r2, [sl, r0] │ │ ldr r0, [r1, #0] │ │ strd r0, r2, [sp, #36] @ 0x24 │ │ - bl 779c4 │ │ + bl 77a2c │ │ mov r1, r0 │ │ - ldr r0, [pc, #536] @ (77100 ) │ │ + ldr r0, [pc, #536] @ (77168 ) │ │ and.w sl, r1, #1 │ │ add r0, pc │ │ str r0, [sp, #68] @ 0x44 │ │ sub.w r0, r7, #29 │ │ str r0, [sp, #64] @ 0x40 │ │ add r0, sp, #36 @ 0x24 │ │ str r0, [sp, #60] @ 0x3c │ │ add r0, sp, #32 │ │ str r0, [sp, #56] @ 0x38 │ │ ldr r0, [r5, #56] @ 0x38 │ │ dmb ish │ │ ldr r4, [sp, #16] │ │ - cbnz r0, 76f0e │ │ + cbnz r0, 76f76 │ │ add.w r0, r5, #56 @ 0x38 │ │ - bl 7740c │ │ - blx d8830 │ │ + bl 77474 │ │ + blx d8840 │ │ cmp r0, #2 │ │ - bls.n 76f50 │ │ + bls.n 76fb8 │ │ subs r0, #8 │ │ str r0, [sp, #44] @ 0x2c │ │ add r0, sp, #56 @ 0x38 │ │ add r1, sp, #44 @ 0x2c │ │ - bl 77a0c │ │ - b.n 76f58 │ │ + bl 77a74 │ │ + b.n 76fc0 │ │ add r0, sp, #56 @ 0x38 │ │ mov r1, sl │ │ blx r4 │ │ add r4, sp, #56 @ 0x38 │ │ - ldr r0, [pc, #416] @ (770d0 ) │ │ + ldr r0, [pc, #416] @ (77138 ) │ │ mov r6, r8 │ │ ldmia r4, {r1, r2, r3, r4} │ │ eors r0, r4 │ │ - ldr r4, [pc, #412] @ (770d4 ) │ │ + ldr r4, [pc, #412] @ (7713c ) │ │ eors r2, r4 │ │ orrs r0, r2 │ │ - ldr r2, [pc, #412] @ (770d8 ) │ │ + ldr r2, [pc, #412] @ (77140 ) │ │ eors r2, r3 │ │ - ldr r3, [pc, #412] @ (770dc ) │ │ + ldr r3, [pc, #412] @ (77144 ) │ │ eors r1, r3 │ │ orrs r1, r2 │ │ orrs r0, r1 │ │ - bne.n 76f8e │ │ + bne.n 76ff6 │ │ add.w r1, sl, #4 │ │ movs r0, #8 │ │ - b.n 76ed4 │ │ + b.n 76f3c │ │ add r0, sp, #56 @ 0x38 │ │ movs r1, #0 │ │ - bl 77a0c │ │ + bl 77a74 │ │ tbb [pc, fp] │ │ adds r2, r0, #4 │ │ - ldr r2, [pc, #208] @ (77030 ) │ │ + ldr r2, [pc, #208] @ (77098 ) │ │ movs r0, #0 │ │ strb.w r0, [r7, #-49] │ │ - ldr r0, [pc, #412] @ (77104 ) │ │ + ldr r0, [pc, #412] @ (7716c ) │ │ add r0, pc │ │ str r0, [sp, #60] @ 0x3c │ │ sub.w r0, r7, #49 @ 0x31 │ │ str r0, [sp, #56] @ 0x38 │ │ add r0, sp, #44 @ 0x2c │ │ - ldr r2, [pc, #400] @ (77108 ) │ │ + ldr r2, [pc, #400] @ (77170 ) │ │ sub.w r1, r7, #29 │ │ add r3, sp, #56 @ 0x38 │ │ add r2, pc │ │ - bl 772b8 │ │ + bl 77320 │ │ ldr r1, [sp, #48] @ 0x30 │ │ ldrb.w r0, [sp, #44] @ 0x2c │ │ - bl 77378 │ │ - b.n 76ff0 │ │ - ldr r0, [pc, #364] @ (770fc ) │ │ + bl 773e0 │ │ + b.n 77058 │ │ + ldr r0, [pc, #364] @ (77164 ) │ │ movs r2, #12 │ │ add r0, pc │ │ - b.n 76eda │ │ + b.n 76f42 │ │ movs r0, #1 │ │ strb.w r0, [r7, #-49] │ │ - ldr r0, [pc, #364] @ (7710c ) │ │ + ldr r0, [pc, #364] @ (77174 ) │ │ add r0, pc │ │ str r0, [sp, #60] @ 0x3c │ │ sub.w r0, r7, #49 @ 0x31 │ │ str r0, [sp, #56] @ 0x38 │ │ add r0, sp, #44 @ 0x2c │ │ - ldr r2, [pc, #356] @ (77110 ) │ │ + ldr r2, [pc, #356] @ (77178 ) │ │ sub.w r1, r7, #29 │ │ add r3, sp, #56 @ 0x38 │ │ add r2, pc │ │ - bl 772b8 │ │ + bl 77320 │ │ ldr r1, [sp, #48] @ 0x30 │ │ ldrb.w r0, [sp, #44] @ 0x2c │ │ - bl 77378 │ │ - b.n 76ff0 │ │ + bl 773e0 │ │ + b.n 77058 │ │ adds r0, r4, #2 │ │ movs r1, #0 │ │ ldrexb r2, [r0] │ │ strexb r3, r1, [r0] │ │ cmp r3, #0 │ │ - bne.n 76fc8 │ │ - cbz r2, 76ff0 │ │ + bne.n 77030 │ │ + cbz r2, 77058 │ │ add r0, sp, #56 @ 0x38 │ │ - ldr r2, [pc, #312] @ (77114 ) │ │ + ldr r2, [pc, #312] @ (7717c ) │ │ sub.w r1, r7, #29 │ │ movs r3, #157 @ 0x9d │ │ add r2, pc │ │ - bl 772b8 │ │ + bl 77320 │ │ ldr r1, [sp, #60] @ 0x3c │ │ ldrb.w r0, [sp, #56] @ 0x38 │ │ - bl 77378 │ │ + bl 773e0 │ │ add.w r0, r5, #20 │ │ mov r1, sl │ │ - bl 77c3c │ │ - b.n 76dc2 │ │ - ldr r0, [pc, #236] @ (770ec ) │ │ + bl 77ca4 │ │ + b.n 76e2a │ │ + ldr r0, [pc, #236] @ (77154 ) │ │ sub.w r1, r7, #29 │ │ add r0, pc │ │ str r0, [sp, #68] @ 0x44 │ │ add r0, sp, #20 │ │ str r0, [sp, #64] @ 0x40 │ │ - ldr r0, [pc, #228] @ (770f0 ) │ │ + ldr r0, [pc, #228] @ (77158 ) │ │ add r0, pc │ │ str r0, [sp, #60] @ 0x3c │ │ add r0, sp, #28 │ │ str r0, [sp, #56] @ 0x38 │ │ add r0, sp, #44 @ 0x2c │ │ - ldr r2, [pc, #220] @ (770f4 ) │ │ + ldr r2, [pc, #220] @ (7715c ) │ │ add r2, pc │ │ - b.n 77054 │ │ - ldrb r6, [r0, #11] │ │ + b.n 770bc │ │ + ldrb r6, [r7, #9] │ │ movs r6, r0 │ │ ldr.w r1, [fp, #24] │ │ mov r0, r9 │ │ blx r1 │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #40] @ 0x28 │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #36] @ 0x24 │ │ sub.w r1, r7, #29 │ │ - ldr r0, [pc, #164] @ (770e0 ) │ │ + ldr r0, [pc, #164] @ (77148 ) │ │ add r0, pc │ │ str r0, [sp, #68] @ 0x44 │ │ add r0, sp, #36 @ 0x24 │ │ str r0, [sp, #64] @ 0x40 │ │ - ldr r0, [pc, #156] @ (770e4 ) │ │ + ldr r0, [pc, #156] @ (7714c ) │ │ add r0, pc │ │ str r0, [sp, #60] @ 0x3c │ │ add r0, sp, #28 │ │ str r0, [sp, #56] @ 0x38 │ │ add r0, sp, #44 @ 0x2c │ │ - ldr r2, [pc, #148] @ (770e8 ) │ │ + ldr r2, [pc, #148] @ (77150 ) │ │ add r2, pc │ │ add r3, sp, #56 @ 0x38 │ │ - bl 772b8 │ │ + bl 77320 │ │ ldr r1, [sp, #48] @ 0x30 │ │ ldrb.w r0, [sp, #44] @ 0x2c │ │ - bl 77378 │ │ - bl 773ce │ │ + bl 773e0 │ │ + bl 77436 │ │ movs r0, #4 │ │ movs r1, #12 │ │ - bl 3de2a │ │ - strb r6, [r2, #7] │ │ + bl 3e132 │ │ + strb r6, [r7, #5] │ │ movs r6, r0 │ │ - strh r4, [r7, r7] │ │ + strh r4, [r4, r6] │ │ movs r6, r0 │ │ add r0, sp, #56 @ 0x38 │ │ - ldr r2, [pc, #156] @ (77118 ) │ │ + ldr r2, [pc, #156] @ (77180 ) │ │ sub.w r1, r7, #29 │ │ movs r3, #91 @ 0x5b │ │ add r2, pc │ │ - bl 772b8 │ │ + bl 77320 │ │ ldr r1, [sp, #60] @ 0x3c │ │ ldrb.w r0, [sp, #56] @ 0x38 │ │ - b.n 77060 │ │ + b.n 770c8 │ │ movs r0, #4 │ │ movs r1, #12 │ │ - bl 3de2a │ │ + bl 3e132 │ │ udf #254 @ 0xfe │ │ mov r4, r0 │ │ add.w r0, r5, #20 │ │ mov r1, sl │ │ - bl 77c3c │ │ - b.n 770ae │ │ - bl 416fe │ │ + bl 77ca4 │ │ + b.n 77116 │ │ + bl 41a06 │ │ mov r4, r0 │ │ - bl 773d8 │ │ + bl 77440 │ │ mov r0, r4 │ │ - blx d6dd0 │ │ - bl 416fe │ │ + blx d6de0 │ │ + bl 41a06 │ │ @ instruction: 0xfffd3fff │ │ subs r1, r6, r5 │ │ - cbnz r3, 770e8 │ │ + cbnz r3, 77150 │ │ str r4, [r5, r0] │ │ str r3, [r5, #60] @ 0x3c │ │ adcs r0, r7 │ │ ldrsb r6, [r4, r6] │ │ ldrb r5, [r5, r5] │ │ - bvs.n 77068 │ │ - movs r5, #102 @ 0x66 │ │ - ldmia r3!, {r0, r1, r4, r7} │ │ - asrs r4, r4, #14 │ │ - lsrs r3, r2, #12 │ │ - stmia r5!, {r0, r3, r4, r5, r7} │ │ - cmp r9, r4 │ │ - strh r6, [r2, #50] @ 0x32 │ │ - strh r4, [r0, r1] │ │ + bvs.n 770d0 │ │ + itet ne │ │ + strne r5, [r5, #48] @ 0x30 │ │ + cmpeq r1, #235 @ 0xeb │ │ + bne.n 76de0 │ │ + subs r5, #242 @ 0xf2 │ │ + ldr r3, [sp, #892] @ 0x37c │ │ + stmia r1!, {r1, r2, r6} │ │ + subs r6, #230 @ 0xe6 │ │ lsls r5, r5, #9 │ │ movs r0, r0 │ │ lsls r7, r1, #8 │ │ movs r0, r0 │ │ - ldrb r3, [r1, #25] │ │ - vshll.u32 , d15, #25 │ │ + ldrb r4, [r4, #28] │ │ + @ instruction: 0xfff99cbf │ │ vpaddl.s q8, │ │ movs r0, r0 │ │ - ldr r3, [r3, #44] @ 0x2c │ │ - vrshr.u64 d21, d18, #7 │ │ + ldr r0, [r7, #56] @ 0x38 │ │ + vrshr.u32 , q5, #7 │ │ movs r6, r0 │ │ - subs r5, r7, #5 │ │ - vcvt.u16.f16 q10, q5, #6 │ │ + subs r5, r2, #4 │ │ + @ instruction: 0xfffa4d02 │ │ movs r6, r0 │ │ lsrs r5, r4, #20 │ │ movs r0, r0 │ │ - subs r4, #111 @ 0x6f │ │ + subs r3, #127 @ 0x7f │ │ vqdmulh.s q8, , d31[0] │ │ movs r0, r0 │ │ - subs r4, #57 @ 0x39 │ │ - vqrdmulh.s , , d23[0] │ │ - @ instruction: 0xfffa1e99 │ │ + subs r3, #73 @ 0x49 │ │ + @ instruction: 0xfff91cff │ │ + vcvt.f32.u32 d17, d17, #6 │ │ vsli.64 , q8, #58 @ 0x3a │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #28 │ │ mov r4, r0 │ │ ldr r0, [r0, #0] │ │ mvn.w sl, #3221225472 @ 0xc0000000 │ │ cmp r0, sl │ │ - bne.n 77146 │ │ + bne.n 771ae │ │ mvn.w r1, #98 @ 0x62 │ │ yield │ │ ldr r0, [r4, #0] │ │ cmp r0, sl │ │ - bne.n 77146 │ │ + bne.n 771ae │ │ adds r2, r1, #1 │ │ cmp r1, #0 │ │ mov r1, r2 │ │ - bne.n 77136 │ │ + bne.n 7719e │ │ movw r6, #65534 @ 0xfffe │ │ movw fp, #2 │ │ mov.w r9, #0 │ │ movt r6, #16383 @ 0x3fff │ │ movt fp, #49152 @ 0xc000 │ │ mov.w r8, #4294967295 @ 0xffffffff │ │ movs r1, #0 │ │ lsls r1, r1, #31 │ │ - b.n 7716e │ │ + b.n 771d6 │ │ movs r0, #0 │ │ clrex │ │ - cbz r0, 771d8 │ │ - b.n 771de │ │ + cbz r0, 77240 │ │ + b.n 77246 │ │ bic.w r2, r0, #3221225472 @ 0xc0000000 │ │ - cbz r1, 77184 │ │ + cbz r1, 771ec │ │ lsls r3, r0, #1 │ │ - bmi.n 77184 │ │ + bmi.n 771ec │ │ add.w r3, r2, fp │ │ add.w r5, fp, #1 │ │ cmp r3, r5 │ │ - bcs.n 77194 │ │ + bcs.n 771fc │ │ cmp r2, r6 │ │ - bcs.n 771ae │ │ + bcs.n 77216 │ │ ands.w r3, r0, #1073741824 @ 0x40000000 │ │ - bne.n 771ae │ │ + bne.n 77216 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - ble.n 771ae │ │ + ble.n 77216 │ │ ldrex r2, [r4] │ │ cmp r2, r0 │ │ - bne.n 771d0 │ │ + bne.n 77238 │ │ adds r0, #1 │ │ strex r3, r0, [r4] │ │ - cbnz r3, 771d4 │ │ + cbnz r3, 7723c │ │ dmb ish │ │ movs r0, #1 │ │ - cbz r0, 771d8 │ │ - b.n 77238 │ │ + cbz r0, 77240 │ │ + b.n 772a0 │ │ cmp r2, r6 │ │ - beq.n 77240 │ │ + beq.n 772a8 │ │ lsls r2, r0, #1 │ │ - bmi.n 771dc │ │ + bmi.n 77244 │ │ orr.w r5, r0, #1073741824 @ 0x40000000 │ │ ldrex r2, [r4] │ │ cmp r2, r0 │ │ - bne.n 77164 │ │ + bne.n 771cc │ │ strex r3, r5, [r4] │ │ cmp r3, #0 │ │ - bne.n 771ba │ │ + bne.n 77222 │ │ movs r0, #1 │ │ - cbz r0, 771d8 │ │ - b.n 771de │ │ + cbz r0, 77240 │ │ + b.n 77246 │ │ clrex │ │ movs r0, #0 │ │ - cbnz r0, 77238 │ │ + cbnz r0, 772a0 │ │ mov r0, r2 │ │ - b.n 7716e │ │ + b.n 771d6 │ │ mov r5, r0 │ │ str.w r9, [sp, #16] │ │ ldr r0, [r4, #0] │ │ cmp r0, r5 │ │ - bne.n 77216 │ │ + bne.n 7727e │ │ ldr r0, [sp, #16] │ │ add r1, sp, #16 │ │ movs r2, #137 @ 0x89 │ │ mov r3, r5 │ │ cmp r0, #0 │ │ it ne │ │ addne r0, r1, #4 │ │ strd r0, r9, [sp] │ │ movs r0, #240 @ 0xf0 │ │ mov r1, r4 │ │ str.w r8, [sp, #8] │ │ - blx d87d0 │ │ + blx d87e0 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 77216 │ │ - blx d8850 │ │ + bgt.n 7727e │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ cmp r0, #4 │ │ - beq.n 771e2 │ │ + beq.n 7724a │ │ ldr r0, [r4, #0] │ │ movs r1, #1 │ │ cmp r0, sl │ │ - bne.n 77160 │ │ + bne.n 771c8 │ │ mvn.w r2, #98 @ 0x62 │ │ yield │ │ adds r3, r2, #1 │ │ ldr r0, [r4, #0] │ │ movs r1, #1 │ │ cmp r0, sl │ │ - bne.w 77160 │ │ + bne.w 771c8 │ │ cmp r2, #0 │ │ mov r2, r3 │ │ - bne.n 77222 │ │ - b.n 77160 │ │ + bne.n 7728a │ │ + b.n 771c8 │ │ add sp, #28 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #12] @ (77250 ) │ │ + ldr r0, [pc, #12] @ (772b8 ) │ │ movs r1, #73 @ 0x49 │ │ - ldr r2, [pc, #12] @ (77254 ) │ │ + ldr r2, [pc, #12] @ (772bc ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ nop │ │ - adds r7, r7, r6 │ │ - vtbx.8 d20, {d26}, d4 │ │ + adds r7, r2, r5 │ │ + vtbx.8 d20, {d10}, d28 │ │ movs r6, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #32 │ │ ldr r3, [r0, #0] │ │ ldrd r0, r1, [r1] │ │ ldrd ip, lr, [r3] │ │ add.w r5, r3, #12 │ │ - ldr r4, [pc, #44] @ (772a0 ) │ │ + ldr r4, [pc, #44] @ (77308 ) │ │ adds r3, #8 │ │ - ldr r6, [pc, #44] @ (772a4 ) │ │ - ldr r2, [pc, #48] @ (772a8 ) │ │ + ldr r6, [pc, #44] @ (7730c ) │ │ + ldr r2, [pc, #48] @ (77310 ) │ │ add r4, pc │ │ add r6, pc │ │ strd r6, r3, [sp, #12] │ │ mov r3, sp │ │ add r2, pc │ │ str r3, [sp, #8] │ │ add r3, sp, #8 │ │ strd ip, lr, [sp] │ │ str r4, [sp, #28] │ │ strd r4, r5, [sp, #20] │ │ - bl 3ef94 │ │ + bl 3f29c │ │ add sp, #32 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - str r5, [sp, #996] @ 0x3e4 │ │ + ldr r0, [sp, #612] @ 0x264 │ │ vrev64. d16, d31 │ │ movs r0, r0 │ │ - strh r6, [r6, #22] │ │ + strh r4, [r1, #24] │ │ vclt.f32 d20, d11, #0 │ │ ldrd r1, r2, [r0] │ │ mov r0, r3 │ │ - b.w 3ffd4 │ │ + b.w 402dc │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #24 │ │ - ldr r5, [pc, #168] @ (7736c ) │ │ + ldr r5, [pc, #168] @ (773d4 ) │ │ mov r4, r0 │ │ ldr r0, [r0, #4] │ │ movs r6, #4 │ │ strb r6, [r4, #0] │ │ add r5, pc │ │ ldr r6, [r4, #0] │ │ str r1, [sp, #16] │ │ strd r6, r0, [sp, #8] │ │ add r0, sp, #8 │ │ mov r1, r5 │ │ - bl 3ef94 │ │ + bl 3f29c │ │ ldrb.w r1, [sp, #8] │ │ - cbz r0, 772f8 │ │ + cbz r0, 77360 │ │ cmp r1, #4 │ │ - beq.n 77328 │ │ + beq.n 77390 │ │ ldrd r0, r1, [sp, #8] │ │ strd r0, r1, [r4] │ │ add sp, #24 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ cmp r1, #4 │ │ - beq.n 772f0 │ │ + beq.n 77358 │ │ cmp r1, #3 │ │ - bne.n 772f0 │ │ + bne.n 77358 │ │ ldr r4, [sp, #12] │ │ ldrd r6, r5, [r4] │ │ ldr r1, [r5, #0] │ │ - cbz r1, 7730e │ │ + cbz r1, 77376 │ │ mov r0, r6 │ │ blx r1 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add sp, #24 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #68] @ (77370 ) │ │ - ldr r2, [pc, #72] @ (77374 ) │ │ + ldr r0, [pc, #68] @ (773d8 ) │ │ + ldr r2, [pc, #72] @ (773dc ) │ │ add r0, pc │ │ add r2, pc │ │ movs r1, #173 @ 0xad │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ udf #254 @ 0xfe │ │ mov r8, r0 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r8 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ mov r8, r0 │ │ ldrb.w r0, [sp, #8] │ │ cmp r0, #4 │ │ - beq.n 77362 │ │ + beq.n 773ca │ │ add r0, sp, #8 │ │ - bl 777de │ │ + bl 77846 │ │ mov r0, r8 │ │ - blx d6dd0 │ │ - bl 416fe │ │ - bxns r4 │ │ + blx d6de0 │ │ + bl 41a06 │ │ + mov ip, r4 │ │ movs r6, r0 │ │ - asrs r0, r2, #16 │ │ - vqshlu.s64 d20, d10, #58 @ 0x3a │ │ + asrs r0, r5, #14 │ │ + vqshlu.s32 q10, q5, #26 │ │ movs r6, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ uxtb r0, r0 │ │ cmp r0, #3 │ │ - bne.n 773ae │ │ + bne.n 77416 │ │ ldrd r5, r6, [r1] │ │ mov r4, r1 │ │ ldr r1, [r6, #0] │ │ - cbz r1, 77394 │ │ + cbz r1, 773fc │ │ mov r0, r5 │ │ blx r1 │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ mov r8, r0 │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r8 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ push {r7, lr} │ │ mov r7, sp │ │ - bl 931fc │ │ - bmi.n 77382 │ │ + bl 93268 │ │ + bmi.n 773ea │ │ dmb ish │ │ - ldr r0, [pc, #32] @ (77400 ) │ │ + ldr r0, [pc, #32] @ (77468 ) │ │ add r0, pc │ │ ldrex r1, [r0, #64] @ 0x40 │ │ subs r1, #1 │ │ strex r2, r1, [r0, #64] @ 0x40 │ │ cmp r2, #0 │ │ - bne.n 773e0 │ │ + bne.n 77448 │ │ bic.w r2, r1, #1073741824 @ 0x40000000 │ │ cmp.w r2, #2147483648 @ 0x80000000 │ │ it ne │ │ bxne lr │ │ adds r0, #64 @ 0x40 │ │ - b.w 9311c │ │ - strb r6, [r6, #14] │ │ + b.w 93188 │ │ + strb r6, [r5, #13] │ │ movs r6, r0 │ │ push {r7, lr} │ │ mov r7, sp │ │ - bl 70db0 │ │ + bl 70e64 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #16 │ │ ldr r1, [r0, #4] │ │ mov r4, r0 │ │ movs r0, #0 │ │ str r0, [sp, #0] │ │ mov r0, sp │ │ - blx d8940 │ │ - cbnz r0, 77488 │ │ + blx d8950 │ │ + cbnz r0, 774f0 │ │ ldr r5, [sp, #0] │ │ - cbnz r5, 77442 │ │ + cbnz r5, 774aa │ │ ldr r1, [r4, #4] │ │ movs r0, #0 │ │ str r0, [sp, #0] │ │ mov r0, sp │ │ - blx d8940 │ │ - cbnz r0, 77488 │ │ + blx d8950 │ │ + cbnz r0, 774f0 │ │ movs r0, #0 │ │ ldr r5, [sp, #0] │ │ - blx d8950 │ │ - cbz r5, 77496 │ │ + blx d8960 │ │ + cbz r5, 774fe │ │ ldrex r6, [r4] │ │ - cbnz r6, 7745a │ │ + cbnz r6, 774c2 │ │ dmb ish │ │ strex r0, r5, [r4] │ │ - cbz r0, 77472 │ │ + cbz r0, 774da │ │ ldrex r6, [r4] │ │ cmp r6, #0 │ │ - beq.n 7744c │ │ + beq.n 774b4 │ │ clrex │ │ movs r0, #0 │ │ dmb ish │ │ - cbz r0, 77478 │ │ + cbz r0, 774e0 │ │ mov r6, r5 │ │ mov r0, r6 │ │ add sp, #16 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #1 │ │ cmp r0, #0 │ │ - bne.n 77466 │ │ + bne.n 774ce │ │ mov r0, r5 │ │ - blx d8950 │ │ + blx d8960 │ │ mov r0, r6 │ │ add sp, #16 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r2, [pc, #40] @ (774b4 ) │ │ + ldr r2, [pc, #40] @ (7751c ) │ │ add r0, sp, #4 │ │ sub.w r1, r7, #17 │ │ movs r3, #95 @ 0x5f │ │ add r2, pc │ │ - b.n 774a2 │ │ - ldr r2, [pc, #32] @ (774b8 ) │ │ + b.n 7750a │ │ + ldr r2, [pc, #32] @ (77520 ) │ │ add r0, sp, #4 │ │ sub.w r1, r7, #17 │ │ movs r3, #155 @ 0x9b │ │ add r2, pc │ │ - bl 772b8 │ │ + bl 77320 │ │ ldr r1, [sp, #8] │ │ ldrb.w r0, [sp, #4] │ │ - bl 77378 │ │ - bl 773ce │ │ - asrs r4, r7, #25 │ │ - vrint?.f32 d17, d17 │ │ + bl 773e0 │ │ + bl 77436 │ │ + asrs r4, r2, #24 │ │ + vsli.64 d17, d25, #58 @ 0x3a │ │ vrintz.f32 d27, d0 │ │ mov r7, sp │ │ sub sp, #16 │ │ - ldr r1, [pc, #20] @ (774d8 ) │ │ + ldr r1, [pc, #20] @ (77540 ) │ │ mov r2, r0 │ │ - ldr r0, [pc, #20] @ (774dc ) │ │ + ldr r0, [pc, #20] @ (77544 ) │ │ subs r3, r7, #1 │ │ add r1, pc │ │ add r0, pc │ │ strd r3, r1, [sp, #4] │ │ add r1, sp, #4 │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ movs r3, r2 │ │ movs r0, r0 │ │ - str r0, [r4, #12] │ │ + str r5, [r0, #16] │ │ @ instruction: 0xfff9e9d1 │ │ lsls r0, r0, #8 │ │ - ldr r1, [pc, #8] @ (774f0 ) │ │ + ldr r1, [pc, #8] @ (77558 ) │ │ ldr r3, [r2, #12] │ │ movs r2, #11 │ │ add r1, pc │ │ bx r3 │ │ nop │ │ - subs r6, r3, #1 │ │ + adds r6, r6, #7 │ │ vsli.64 d27, d16, #58 @ 0x3a │ │ add r7, sp, #8 │ │ ldr r5, [r0, #8] │ │ mov r4, r0 │ │ movs r1, #1 │ │ mov r0, r5 │ │ - blx d8840 │ │ + blx d8850 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r5 │ │ movs r1, #0 │ │ - blx d8840 │ │ - ldr r0, [pc, #40] @ (7753c ) │ │ + blx d8850 │ │ + ldr r0, [pc, #40] @ (775a4 ) │ │ add r0, pc │ │ ldr r0, [r0, #0] │ │ dmb ish │ │ - cbnz r0, 77526 │ │ - ldr r0, [pc, #32] @ (77540 ) │ │ + cbnz r0, 7758e │ │ + ldr r0, [pc, #32] @ (775a8 ) │ │ add r0, pc │ │ - bl 7740c │ │ + bl 77474 │ │ movs r1, #1 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w d8718 │ │ - bl 77544 │ │ + b.w d8728 │ │ + bl 775ac │ │ udf #254 @ 0xfe │ │ - bl 416fe │ │ + bl 41a06 │ │ nop │ │ - ldr r0, [r1, #24] │ │ + ldr r0, [r6, #16] │ │ movs r6, r0 │ │ - ldr r4, [r7, #20] │ │ + ldr r4, [r4, #16] │ │ movs r6, r0 │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #16 │ │ - ldr r2, [pc, #28] @ (77568 ) │ │ + ldr r2, [pc, #28] @ (775d0 ) │ │ add r0, sp, #4 │ │ subs r1, r7, #1 │ │ movs r3, #123 @ 0x7b │ │ add r2, pc │ │ - bl 772b8 │ │ + bl 77320 │ │ ldr r1, [sp, #8] │ │ ldrb.w r0, [sp, #4] │ │ - bl 77378 │ │ - bl 773ce │ │ + bl 773e0 │ │ + bl 77436 │ │ nop │ │ - asrs r4, r1, #1 │ │ + lsrs r4, r4, #31 │ │ vsli.64 d27, d16, #58 @ 0x3a │ │ add r7, sp, #8 │ │ cmp r0, #1 │ │ - beq.n 775d0 │ │ - ldr r5, [pc, #128] @ (775f8 ) │ │ + beq.n 77638 │ │ + ldr r5, [pc, #128] @ (77660 ) │ │ add r5, pc │ │ ldr r0, [r5, #56] @ 0x38 │ │ dmb ish │ │ - cbnz r0, 77588 │ │ + cbnz r0, 775f0 │ │ add.w r0, r5, #56 @ 0x38 │ │ - bl 7740c │ │ - blx d8830 │ │ + bl 77474 │ │ + blx d8840 │ │ cmp r0, #3 │ │ - bcc.n 775ee │ │ + bcc.n 77656 │ │ mov r4, r0 │ │ ldr r0, [r5, #56] @ 0x38 │ │ dmb ish │ │ - cbnz r0, 775a2 │ │ + cbnz r0, 7760a │ │ add.w r0, r5, #56 @ 0x38 │ │ - bl 7740c │ │ + bl 77474 │ │ movs r1, #2 │ │ - blx d8840 │ │ + blx d8850 │ │ sub.w r0, r4, #8 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 775b0 │ │ + bne.n 77618 │ │ cmp r1, #1 │ │ it ne │ │ popne {r4, r5, r7, pc} │ │ dmb ish │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w 77604 │ │ - ldr r0, [pc, #40] @ (775fc ) │ │ + b.w 7766c │ │ + ldr r0, [pc, #40] @ (77664 ) │ │ add r0, pc │ │ ldr r0, [r0, #0] │ │ dmb ish │ │ - cbnz r0, 775e4 │ │ - ldr r0, [pc, #32] @ (77600 ) │ │ + cbnz r0, 7764c │ │ + ldr r0, [pc, #32] @ (77668 ) │ │ add r0, pc │ │ - bl 7740c │ │ + bl 77474 │ │ movs r1, #2 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w d8718 │ │ + b.w d8728 │ │ pop {r4, r5, r7, pc} │ │ - bl 416f6 │ │ - bl 70e9c │ │ - strb r6, [r3, #8] │ │ + bl 419fe │ │ + bl 70f50 │ │ + strb r6, [r2, #7] │ │ movs r6, r0 │ │ - ldr r2, [r1, #12] │ │ + ldr r2, [r6, #4] │ │ movs r6, r0 │ │ - ldr r6, [r7, #8] │ │ + ldr r6, [r4, #4] │ │ movs r6, r0 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ ldr r1, [r0, #16] │ │ - cbz r1, 7761e │ │ + cbz r1, 77686 │ │ ldr r2, [r0, #20] │ │ movs r3, #0 │ │ strb r3, [r1, #0] │ │ - cbz r2, 7761e │ │ + cbz r2, 77686 │ │ mov r4, r0 │ │ mov r0, r1 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ adds r1, r0, #1 │ │ - beq.n 77648 │ │ + beq.n 776b0 │ │ adds r1, r0, #4 │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r4, r3, [r1] │ │ cmp r4, #0 │ │ - bne.n 77628 │ │ + bne.n 77690 │ │ cmp r2, #1 │ │ it ne │ │ popne {r4, r6, r7, pc} │ │ dmb ish │ │ ldmia.w sp!, {r4, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ pop {r4, r6, r7, pc} │ │ - bmi.n 775f6 │ │ + bmi.n 7765e │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #16 │ │ - ldr r4, [pc, #172] @ (77704 ) │ │ + ldr r4, [pc, #172] @ (7776c ) │ │ add r4, pc │ │ ldrb r0, [r4, #0] │ │ subs r0, #1 │ │ uxtb r1, r0 │ │ cmp r1, #3 │ │ - bcc.n 776c6 │ │ - ldr r1, [pc, #160] @ (77708 ) │ │ + bcc.n 7772e │ │ + ldr r1, [pc, #160] @ (77770 ) │ │ add r0, sp, #4 │ │ add r1, pc │ │ - bl 92f58 │ │ + bl 92fc4 │ │ ldr r2, [sp, #4] │ │ cmp.w r2, #2147483648 @ 0x80000000 │ │ - bne.n 7767c │ │ + bne.n 776e4 │ │ movs r5, #3 │ │ movs r0, #2 │ │ - b.n 776b4 │ │ + b.n 7771c │ │ ldrd r1, r0, [sp, #8] │ │ cmp r0, #4 │ │ - beq.n 77696 │ │ + beq.n 776fe │ │ cmp r0, #1 │ │ itt eq │ │ ldrbeq r0, [r1, #0] │ │ cmpeq r0, #48 @ 0x30 │ │ - bne.n 776a4 │ │ + bne.n 7770c │ │ movs r5, #3 │ │ movs r0, #2 │ │ - cbnz r2, 776aa │ │ - b.n 776b4 │ │ + cbnz r2, 77712 │ │ + b.n 7771c │ │ ldr r0, [r1, #0] │ │ movw r3, #30054 @ 0x7566 │ │ movt r3, #27756 @ 0x6c6c │ │ cmp r0, r3 │ │ - beq.n 776fa │ │ + beq.n 77762 │ │ movs r5, #1 │ │ movs r0, #0 │ │ - cbz r2, 776b4 │ │ + cbz r2, 7771c │ │ mov r6, r0 │ │ mov r0, r1 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r6 │ │ ldrexb r1, [r4] │ │ - cbnz r1, 776ce │ │ + cbnz r1, 77736 │ │ strexb r2, r5, [r4] │ │ cmp r2, #0 │ │ - bne.n 776b4 │ │ + bne.n 7771c │ │ movs r2, #1 │ │ - cbz r2, 776d8 │ │ + cbz r2, 77740 │ │ add sp, #16 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r2, #0 │ │ clrex │ │ cmp r2, #0 │ │ - bne.n 776c6 │ │ + bne.n 7772e │ │ cmp r1, #4 │ │ - bcs.n 776f0 │ │ + bcs.n 77758 │ │ lsls r0, r1, #3 │ │ movs r1, #3 │ │ movt r1, #513 @ 0x201 │ │ lsr.w r0, r1, r0 │ │ add sp, #16 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #3 │ │ add sp, #16 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r5, #2 │ │ movs r0, #1 │ │ cmp r2, #0 │ │ - bne.n 776aa │ │ - b.n 776b4 │ │ - strb r0, [r7, #4] │ │ + bne.n 77712 │ │ + b.n 7771c │ │ + strb r0, [r6, #3] │ │ movs r6, r0 │ │ - asrs r5, r5, #28 │ │ + asrs r5, r0, #27 │ │ vsli.64 , q8, #58 @ 0x3a │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ - ldr r0, [pc, #104] @ (77780 ) │ │ + ldr r0, [pc, #104] @ (777e8 ) │ │ add r0, pc │ │ ldr r4, [r0, #20] │ │ dmb ish │ │ - cbnz r4, 77728 │ │ + cbnz r4, 77790 │ │ adds r0, #20 │ │ - bl 7740c │ │ + bl 77474 │ │ mov r4, r0 │ │ mov r0, r4 │ │ - blx d8830 │ │ + blx d8840 │ │ mov r5, r0 │ │ cmp r0, #1 │ │ - bhi.n 77762 │ │ - beq.n 77778 │ │ + bhi.n 777ca │ │ + beq.n 777e0 │ │ movs r0, #12 │ │ - blx d87f0 │ │ - cbz r0, 77770 │ │ + blx d8810 │ │ + cbz r0, 777d8 │ │ mov r5, r0 │ │ str r4, [r0, #8] │ │ movs r0, #0 │ │ strb r0, [r5, #4] │ │ str r0, [r5, #0] │ │ mov r0, r4 │ │ - blx d8830 │ │ + blx d8840 │ │ mov r6, r0 │ │ mov r0, r4 │ │ mov r1, r5 │ │ - blx d8840 │ │ + blx d8850 │ │ cmp r6, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r5, #0] │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #4 │ │ movs r1, #12 │ │ - bl 3de2a │ │ - ldr r0, [pc, #8] @ (77784 ) │ │ + bl 3e132 │ │ + ldr r0, [pc, #8] @ (777ec ) │ │ add r0, pc │ │ - bl 774bc │ │ - str r6, [r4, #120] @ 0x78 │ │ + bl 77524 │ │ + str r6, [r1, #116] @ 0x74 │ │ movs r6, r0 │ │ - ldr r1, [pc, #568] @ (779c0 ) │ │ + ldr r1, [pc, #216] @ (778c8 ) │ │ movs r6, r0 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ mov r4, r0 │ │ adds r0, r2, r1 │ │ - bcs.n 777d8 │ │ + bcs.n 77840 │ │ ldrd r1, r2, [r4] │ │ movs r5, #4 │ │ ldr.w ip, [r7, #8] │ │ cmp.w r0, r1, lsl #1 │ │ strd r3, ip, [sp] │ │ it ls │ │ lslls r0, r1, #1 │ │ @@ -119743,59 +119656,59 @@ │ │ it eq │ │ moveq r5, #8 │ │ cmp r0, r5 │ │ it hi │ │ movhi r5, r0 │ │ add r0, sp, #12 │ │ mov r3, r5 │ │ - bl 77834 │ │ + bl 7789c │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #0 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ ldrb r1, [r0, #0] │ │ cmp r1, #3 │ │ - bne.n 77814 │ │ + bne.n 7787c │ │ ldr r4, [r0, #4] │ │ ldrd r5, r6, [r4] │ │ ldr r1, [r6, #0] │ │ - cbz r1, 777fa │ │ + cbz r1, 77862 │ │ mov r0, r5 │ │ blx r1 │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ mov r8, r0 │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r8 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #8 │ │ ldrd fp, r8, [r7, #8] │ │ mov r4, r0 │ │ mov.w r9, #0 │ │ @@ -119803,73 +119716,73 @@ │ │ rsb r5, fp, #0 │ │ subs r0, #1 │ │ ands r0, r5 │ │ umull r5, r6, r0, r3 │ │ movs r0, #1 │ │ movs r3, #4 │ │ cmp r6, #0 │ │ - bne.n 778f0 │ │ + bne.n 77958 │ │ rsb r6, fp, #2147483648 @ 0x80000000 │ │ cmp r5, r6 │ │ - bhi.n 778f0 │ │ + bhi.n 77958 │ │ mov r9, r5 │ │ - cbz r1, 778a6 │ │ + cbz r1, 7790e │ │ cmp fp, r5 │ │ - bls.n 778ca │ │ + bls.n 77932 │ │ movs r0, #0 │ │ mov r5, r1 │ │ mov r6, r2 │ │ str r0, [sp, #0] │ │ mov r1, fp │ │ mov r0, sp │ │ mov r2, r9 │ │ cmp.w fp, #4 │ │ it ls │ │ movls r1, #4 │ │ - blx d8880 │ │ - cbnz r0, 778e8 │ │ + blx d8890 │ │ + cbnz r0, 77950 │ │ ldr r0, [sp, #0] │ │ - cbz r0, 778e8 │ │ + cbz r0, 77950 │ │ mul.w r2, r8, r5 │ │ mov r1, r6 │ │ mov r8, r0 │ │ - bl d53c6 │ │ + bl d52ea │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r8 │ │ - b.n 778e2 │ │ - cbz r5, 778d6 │ │ + b.n 7794a │ │ + cbz r5, 7793e │ │ cmp fp, r5 │ │ - bls.n 778da │ │ + bls.n 77942 │ │ movs r0, #0 │ │ mov r1, fp │ │ str r0, [sp, #4] │ │ add r0, sp, #4 │ │ mov r2, r9 │ │ cmp.w fp, #4 │ │ it ls │ │ movls r1, #4 │ │ - blx d8880 │ │ - cbnz r0, 778e8 │ │ + blx d8890 │ │ + cbnz r0, 77950 │ │ ldr r0, [sp, #4] │ │ - cbnz r0, 778e2 │ │ - b.n 778e8 │ │ + cbnz r0, 7794a │ │ + b.n 77950 │ │ mov r0, r2 │ │ mov r1, r9 │ │ - blx d8870 │ │ - cbnz r0, 778e2 │ │ - b.n 778e8 │ │ + blx d8880 │ │ + cbnz r0, 7794a │ │ + b.n 77950 │ │ mov r0, fp │ │ - b.n 778e2 │ │ + b.n 7794a │ │ mov r0, r9 │ │ - blx d87f0 │ │ - cbz r0, 778e8 │ │ + blx d8810 │ │ + cbz r0, 77950 │ │ str r0, [r4, #4] │ │ movs r0, #0 │ │ - b.n 778ee │ │ + b.n 77956 │ │ movs r0, #1 │ │ str.w fp, [r4, #4] │ │ movs r3, #8 │ │ str.w r9, [r4, r3] │ │ str r0, [r4, #0] │ │ add sp, #8 │ │ ldmia.w sp!, {r8, r9, fp} │ │ @@ -119877,169 +119790,169 @@ │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #24 │ │ mov r4, r0 │ │ ldr r0, [r0, #0] │ │ cmp r0, #1 │ │ - bne.n 77924 │ │ + bne.n 7798c │ │ mvn.w r1, #98 @ 0x62 │ │ yield │ │ ldr r0, [r4, #0] │ │ cmp r0, #1 │ │ - bne.n 77924 │ │ + bne.n 7798c │ │ adds r2, r1, #1 │ │ cmp r1, #0 │ │ mov r1, r2 │ │ - bne.n 77914 │ │ - cbnz r0, 77950 │ │ + bne.n 7797c │ │ + cbnz r0, 779b8 │ │ movs r1, #1 │ │ ldrex r0, [r4] │ │ - cbnz r0, 77940 │ │ + cbnz r0, 779a8 │ │ strex r2, r1, [r4] │ │ cmp r2, #0 │ │ - bne.n 77928 │ │ + bne.n 77990 │ │ dmb ish │ │ movs r1, #1 │ │ - cbnz r1, 77948 │ │ - b.n 77950 │ │ + cbnz r1, 779b0 │ │ + b.n 779b8 │ │ movs r1, #0 │ │ clrex │ │ - cbz r1, 77950 │ │ + cbz r1, 779b8 │ │ add sp, #24 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ add.w r8, sp, #12 │ │ movs r6, #0 │ │ mov.w r9, #4294967295 @ 0xffffffff │ │ movs r5, #2 │ │ cmp r0, #2 │ │ - beq.n 77974 │ │ + beq.n 779dc │ │ ldrex r0, [r4] │ │ strex r1, r5, [r4] │ │ cmp r1, #0 │ │ - bne.n 77960 │ │ + bne.n 779c8 │ │ cmp r0, #0 │ │ dmb ish │ │ - beq.n 77948 │ │ + beq.n 779b0 │ │ str r6, [sp, #12] │ │ ldr r0, [r4, #0] │ │ cmp r0, #2 │ │ - bne.n 779a6 │ │ + bne.n 77a0e │ │ ldr r0, [sp, #12] │ │ mov r1, r4 │ │ movs r2, #137 @ 0x89 │ │ movs r3, #2 │ │ cmp r0, #0 │ │ it ne │ │ addne.w r0, r8, #4 │ │ stmia.w sp, {r0, r6, r9} │ │ movs r0, #240 @ 0xf0 │ │ - blx d87d0 │ │ + blx d87e0 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 779a6 │ │ - blx d8850 │ │ + bgt.n 77a0e │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ cmp r0, #4 │ │ - beq.n 77976 │ │ + beq.n 779de │ │ ldr r0, [r4, #0] │ │ cmp r0, #1 │ │ - bne.n 7795c │ │ + bne.n 779c4 │ │ mvn.w r1, #98 @ 0x62 │ │ yield │ │ adds r2, r1, #1 │ │ ldr r0, [r4, #0] │ │ cmp r0, #1 │ │ - bne.n 7795c │ │ + bne.n 779c4 │ │ cmp r1, #0 │ │ mov r1, r2 │ │ - bne.n 779b0 │ │ - b.n 7795c │ │ - bmi.n 7796e │ │ + bne.n 77a18 │ │ + b.n 779c4 │ │ + bmi.n 779d6 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ - ldr r4, [pc, #60] @ (77a08 ) │ │ + ldr r4, [pc, #60] @ (77a70 ) │ │ movs r0, #1 │ │ add r4, pc │ │ ldrex r1, [r4, #20] │ │ - cbnz r1, 779f8 │ │ + cbnz r1, 77a60 │ │ strex r1, r0, [r4, #20] │ │ cmp r1, #0 │ │ - bne.n 779ce │ │ + bne.n 77a36 │ │ dmb ish │ │ ldr r0, [r4, #4] │ │ lsls r0, r0, #1 │ │ ittt eq │ │ moveq r0, #0 │ │ ldrbeq r1, [r4, #24] │ │ popeq {r4, r6, r7, pc} │ │ - bl 7770c │ │ + bl 77774 │ │ eor.w r0, r0, #1 │ │ ldrb r1, [r4, #24] │ │ pop {r4, r6, r7, pc} │ │ add.w r0, r4, #20 │ │ clrex │ │ - bl 778fe │ │ - b.n 779e0 │ │ + bl 77966 │ │ + b.n 77a48 │ │ nop │ │ - ldr r0, [r1, #92] @ 0x5c │ │ + ldr r0, [r0, #88] @ 0x58 │ │ movs r6, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub.w sp, sp, #604 @ 0x25c │ │ cmp r1, #0 │ │ ittt ne │ │ ldrne r2, [r1, #0] │ │ ldrne r1, [r2, #16] │ │ cmpne r1, #0 │ │ - bne.n 77a28 │ │ + bne.n 77a90 │ │ movs r1, #0 │ │ - b.n 77a2c │ │ + b.n 77a94 │ │ ldr r2, [r2, #20] │ │ subs r2, #1 │ │ - ldr r3, [pc, #480] @ (77c10 ) │ │ + ldr r3, [pc, #480] @ (77c78 ) │ │ cmp r1, #0 │ │ ldr r6, [r0, #8] │ │ ldrd fp, r8, [r0] │ │ add r3, pc │ │ ldr r0, [r0, #12] │ │ str r6, [sp, #12] │ │ str r0, [sp, #8] │ │ it eq │ │ moveq r2, #9 │ │ - ldr r0, [pc, #464] @ (77c14 ) │ │ + ldr r0, [pc, #464] @ (77c7c ) │ │ str r2, [sp, #20] │ │ ldr r2, [r3, #0] │ │ add r0, pc │ │ it ne │ │ movne r0, r1 │ │ str r0, [sp, #16] │ │ - cbz r2, 77a58 │ │ - blx d8960 │ │ - b.n 77a5e │ │ + cbz r2, 77ac0 │ │ + blx d8970 │ │ + b.n 77ac6 │ │ movs r0, #224 @ 0xe0 │ │ - blx d87d0 │ │ + blx d87e0 │ │ add r5, sp, #32 │ │ str r0, [sp, #24] │ │ asrs r0, r0, #31 │ │ mov.w r1, #512 @ 0x200 │ │ str r0, [sp, #28] │ │ mov r0, r5 │ │ mov.w r9, #512 @ 0x200 │ │ - bl d518e │ │ - ldr r6, [pc, #416] @ (77c18 ) │ │ + bl d521e │ │ + ldr r6, [pc, #416] @ (77c80 ) │ │ movs r0, #0 │ │ - ldr r3, [pc, #416] @ (77c1c ) │ │ + ldr r3, [pc, #416] @ (77c84 ) │ │ add.w sl, sp, #24 │ │ - ldr r1, [pc, #416] @ (77c20 ) │ │ + ldr r1, [pc, #416] @ (77c88 ) │ │ add r6, pc │ │ - ldr r2, [pc, #416] @ (77c24 ) │ │ + ldr r2, [pc, #416] @ (77c8c ) │ │ add r3, pc │ │ - ldr r4, [pc, #416] @ (77c28 ) │ │ + ldr r4, [pc, #416] @ (77c90 ) │ │ add r1, pc │ │ strd r0, r0, [sp, #552] @ 0x228 │ │ add r0, sp, #16 │ │ str r0, [sp, #560] @ 0x230 │ │ movs r0, #4 │ │ add r4, pc │ │ str r0, [sp, #592] @ 0x250 │ │ @@ -120051,294 +119964,294 @@ │ │ strd r8, r4, [sp, #584] @ 0x248 │ │ strd fp, r6, [sp, #576] @ 0x240 │ │ str r3, [sp, #572] @ 0x23c │ │ strd r4, sl, [sp, #564] @ 0x234 │ │ str r0, [sp, #600] @ 0x258 │ │ add r0, sp, #592 @ 0x250 │ │ add r3, sp, #560 @ 0x230 │ │ - bl 3ef94 │ │ + bl 3f29c │ │ ldrb.w r1, [sp, #592] @ 0x250 │ │ - cbz r0, 77ad6 │ │ + cbz r0, 77b3e │ │ cmp r1, #4 │ │ - beq.n 77bbc │ │ + beq.n 77c24 │ │ ldrb.w r0, [sp, #592] @ 0x250 │ │ cmp r0, #3 │ │ - beq.n 77b2e │ │ + beq.n 77b96 │ │ ldr r1, [sp, #12] │ │ cmp r0, #4 │ │ - beq.n 77b00 │ │ - b.n 77b54 │ │ + beq.n 77b68 │ │ + b.n 77bbc │ │ cmp r1, #4 │ │ - beq.n 77afe │ │ + beq.n 77b66 │ │ cmp r1, #3 │ │ - bne.n 77afe │ │ + bne.n 77b66 │ │ ldr r4, [sp, #596] @ 0x254 │ │ ldrd r6, r5, [r4] │ │ ldr r1, [r5, #0] │ │ - cbz r1, 77aec │ │ + cbz r1, 77b54 │ │ mov r0, r6 │ │ blx r1 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r1, [sp, #12] │ │ ldr r3, [sp, #552] @ 0x228 │ │ cmp.w r3, #512 @ 0x200 │ │ - bhi.n 77baa │ │ + bhi.n 77c12 │ │ ldr r0, [sp, #8] │ │ add r2, sp, #32 │ │ ldr r6, [r0, #28] │ │ add r0, sp, #560 @ 0x230 │ │ blx r6 │ │ ldrb.w r0, [sp, #560] @ 0x230 │ │ cmp r0, #4 │ │ - beq.n 77ba0 │ │ + beq.n 77c08 │ │ cmp r0, #3 │ │ - bne.n 77ba0 │ │ + bne.n 77c08 │ │ ldr r4, [sp, #564] @ 0x234 │ │ ldrd r6, r5, [r4] │ │ ldr r1, [r5, #0] │ │ - cbz r1, 77b8e │ │ + cbz r1, 77bf6 │ │ mov r0, r6 │ │ blx r1 │ │ - b.n 77b8e │ │ + b.n 77bf6 │ │ ldr r0, [sp, #596] @ 0x254 │ │ str r0, [sp, #0] │ │ ldrd r0, r6, [r0] │ │ ldr r1, [r6, #0] │ │ str r0, [sp, #4] │ │ - cbz r1, 77b40 │ │ + cbz r1, 77ba8 │ │ ldr r0, [sp, #4] │ │ blx r1 │ │ ldr r1, [r6, #4] │ │ ldr r0, [sp, #4] │ │ cmp r1, #0 │ │ it ne │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #0] │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r1, [sp, #12] │ │ ldr r0, [sp, #8] │ │ add r3, sp, #560 @ 0x230 │ │ ldr r6, [r0, #36] @ 0x24 │ │ add r0, sp, #16 │ │ - ldr r2, [pc, #216] @ (77c38 ) │ │ + ldr r2, [pc, #216] @ (77ca0 ) │ │ str r0, [sp, #560] @ 0x230 │ │ add r0, sp, #592 @ 0x250 │ │ add r2, pc │ │ str r4, [sp, #588] @ 0x24c │ │ strd r9, r8, [sp, #580] @ 0x244 │ │ strd r5, fp, [sp, #572] @ 0x23c │ │ strd r4, sl, [sp, #564] @ 0x234 │ │ blx r6 │ │ ldrb.w r0, [sp, #592] @ 0x250 │ │ cmp r0, #4 │ │ - beq.n 77ba0 │ │ + beq.n 77c08 │ │ cmp r0, #3 │ │ - bne.n 77ba0 │ │ + bne.n 77c08 │ │ ldr r4, [sp, #596] @ 0x254 │ │ ldrd r6, r5, [r4] │ │ ldr r1, [r5, #0] │ │ - cbz r1, 77b8e │ │ + cbz r1, 77bf6 │ │ mov r0, r6 │ │ blx r1 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add.w sp, sp, #604 @ 0x25c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r4, [pc, #136] @ (77c34 ) │ │ + ldr r4, [pc, #136] @ (77c9c ) │ │ movs r0, #0 │ │ mov r1, r3 │ │ mov.w r2, #512 @ 0x200 │ │ add r4, pc │ │ mov r3, r4 │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #108] @ (77c2c ) │ │ - ldr r2, [pc, #112] @ (77c30 ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #108] @ (77c94 ) │ │ + ldr r2, [pc, #112] @ (77c98 ) │ │ add r0, pc │ │ add r2, pc │ │ movs r1, #173 @ 0xad │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ udf #254 @ 0xfe │ │ - b.n 77bd0 │ │ - b.n 77bd0 │ │ + b.n 77c38 │ │ + b.n 77c38 │ │ str r4, [sp, #0] │ │ mov r4, r0 │ │ ldr r0, [r5, #4] │ │ mov r1, r6 │ │ - b.n 77be0 │ │ + b.n 77c48 │ │ mov r4, r0 │ │ ldr r1, [sp, #4] │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r1 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #0] │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ mov r4, r0 │ │ ldrb.w r0, [sp, #592] @ 0x250 │ │ cmp r0, #4 │ │ - beq.n 77c06 │ │ + beq.n 77c6e │ │ add r0, sp, #592 @ 0x250 │ │ - bl 777de │ │ + bl 77846 │ │ mov r0, r4 │ │ - blx d6dd0 │ │ - bl 416fe │ │ - ldr r4, [pc, #232] @ (77cfc ) │ │ + blx d6de0 │ │ + bl 41a06 │ │ + ldr r3, [pc, #904] @ (78004 ) │ │ movs r6, r0 │ │ - asrs r6, r7, #18 │ │ + asrs r6, r2, #17 │ │ vqshl.u64 , , #58 @ 0x3a │ │ - vcvt.f32.u32 d24, d11, #1 │ │ - vcvt.u32.f32 , q0, #4 │ │ + vshr.u64 d25, d27, #1 │ │ + vcvt.u32.f32 d19, d0, #4 │ │ movs r6, r0 │ │ - asrs r1, r5, #29 │ │ + asrs r2, r6, #27 │ │ vqshrun.s64 d31, , #7 │ │ - @ instruction: 0xffff0b7c │ │ - @ instruction: 0xfffa3e06 │ │ + @ instruction: 0xffff0b14 │ │ + vqrdmulh.s , q13, d6[0] │ │ movs r6, r0 │ │ - lsrs r0, r5 │ │ + lsls r0, r2 │ │ movs r6, r0 │ │ - asrs r1, r5, #26 │ │ + asrs r2, r6, #24 │ │ vsli.64 , q0, #57 @ 0x39 │ │ add r7, sp, #8 │ │ lsls r1, r1, #31 │ │ - bne.n 77c4e │ │ - ldr r1, [pc, #68] @ (77c8c ) │ │ + bne.n 77cb6 │ │ + ldr r1, [pc, #68] @ (77cf4 ) │ │ add r1, pc │ │ ldr r1, [r1, #4] │ │ lsls r1, r1, #1 │ │ - bne.n 77c76 │ │ + bne.n 77cde │ │ movs r1, #0 │ │ dmb ish │ │ ldrex r2, [r0] │ │ strex r3, r1, [r0] │ │ cmp r3, #0 │ │ - bne.n 77c54 │ │ + bne.n 77cbc │ │ cmp r2, #2 │ │ it ne │ │ popne {r4, r6, r7, pc} │ │ mov r1, r0 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ ldmia.w sp!, {r4, r6, r7, lr} │ │ - b.w d8700 │ │ + b.w d8710 │ │ mov r4, r0 │ │ - bl 7770c │ │ + bl 77774 │ │ mov r1, r0 │ │ mov r0, r4 │ │ cmp r1, #0 │ │ itt eq │ │ moveq r1, #1 │ │ strbeq r1, [r0, #4] │ │ - b.n 77c4e │ │ + b.n 77cb6 │ │ nop │ │ - ldr r6, [r1, #52] @ 0x34 │ │ + ldr r6, [r0, #48] @ 0x30 │ │ movs r6, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #100 @ 0x64 │ │ ldrb.w sl, [r0] │ │ mov.w r0, #512 @ 0x200 │ │ mov r8, r1 │ │ strb.w sl, [r7, #-117] │ │ mov.w r6, #512 @ 0x200 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 77e24 │ │ + beq.w 77e8c │ │ add.w fp, sp, #64 @ 0x40 │ │ mov r4, r0 │ │ movs r5, #1 │ │ strd r6, r0, [sp, #64] @ 0x40 │ │ mov r0, r4 │ │ mov r1, r6 │ │ - blx d8970 │ │ - cbnz r0, 77cec │ │ - blx d8850 │ │ + blx d8980 │ │ + cbnz r0, 77d54 │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ cmp r0, #34 @ 0x22 │ │ - bne.n 77d18 │ │ + bne.n 77d80 │ │ str r6, [sp, #72] @ 0x48 │ │ mov r0, fp │ │ mov r1, r6 │ │ movs r2, #1 │ │ movs r3, #1 │ │ str r5, [sp, #0] │ │ - bl 77788 │ │ + bl 777f0 │ │ ldrd r6, r4, [sp, #64] @ 0x40 │ │ - b.n 77cc2 │ │ + b.n 77d2a │ │ mov r0, r4 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r9, r0 │ │ cmp r6, r0 │ │ - bls.n 77d1e │ │ + bls.n 77d86 │ │ cmp.w r9, #0 │ │ - beq.w 77e18 │ │ + beq.w 77e80 │ │ mov r0, r4 │ │ mov r1, r9 │ │ - blx d8870 │ │ + blx d8880 │ │ mov r6, r9 │ │ cmp r0, #0 │ │ - beq.w 77e2e │ │ + beq.w 77e96 │ │ cmp.w r6, #2147483648 @ 0x80000000 │ │ - beq.n 77d26 │ │ - b.n 77d4e │ │ - cbz r6, 77d4a │ │ + beq.n 77d8e │ │ + b.n 77db6 │ │ + cbz r6, 77db2 │ │ mov r0, r4 │ │ - b.n 77d46 │ │ + b.n 77dae │ │ mov r0, r4 │ │ cmp.w r6, #2147483648 @ 0x80000000 │ │ - bne.n 77d4e │ │ + bne.n 77db6 │ │ uxtb r0, r0 │ │ cmp r0, #3 │ │ - bne.n 77d4a │ │ + bne.n 77db2 │ │ ldrd r4, r6, [r9] │ │ ldr r1, [r6, #0] │ │ - cbz r1, 77d38 │ │ + cbz r1, 77da0 │ │ mov r0, r4 │ │ blx r1 │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r9 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov.w r6, #2147483648 @ 0x80000000 │ │ - ldr r1, [pc, #288] @ (77e70 ) │ │ + ldr r1, [pc, #288] @ (77ed8 ) │ │ ldrd r2, r3, [r8] │ │ add r1, pc │ │ strb.w sl, [sp, #24] │ │ strd r6, r0, [sp, #12] │ │ ldr r3, [r3, #12] │ │ str.w r9, [sp, #20] │ │ mov r0, r2 │ │ movs r2, #17 │ │ blx r3 │ │ - cbnz r0, 77dd2 │ │ - ldr r2, [pc, #260] @ (77e74 ) │ │ + cbnz r0, 77e3a │ │ + ldr r2, [pc, #260] @ (77edc ) │ │ add r6, sp, #12 │ │ - ldr r1, [pc, #260] @ (77e78 ) │ │ + ldr r1, [pc, #260] @ (77ee0 ) │ │ movs r3, #0 │ │ add r2, pc │ │ - ldr r0, [pc, #260] @ (77e7c ) │ │ + ldr r0, [pc, #260] @ (77ee4 ) │ │ add r1, pc │ │ strb.w sl, [sp, #44] @ 0x2c │ │ strd r6, r2, [sp, #32] │ │ movs r2, #1 │ │ strb.w r2, [r7, #-66] │ │ sub.w r2, r7, #66 @ 0x42 │ │ str r2, [sp, #88] @ 0x58 │ │ @@ -120359,91 +120272,91 @@ │ │ str r3, [sp, #40] @ 0x28 │ │ str.w r8, [sp, #28] │ │ str r3, [sp, #48] @ 0x30 │ │ strb.w r3, [r7, #-73] │ │ str r3, [sp, #56] @ 0x38 │ │ strb.w sl, [r7, #-65] │ │ str r2, [sp, #64] @ 0x40 │ │ - blx d85ac │ │ + blx d85bc │ │ ldrb.w r0, [r7, #-73] │ │ - cbz r0, 77de2 │ │ + cbz r0, 77e4a │ │ ldr r6, [sp, #12] │ │ lsls r0, r6, #1 │ │ mov.w r0, #1 │ │ - bne.n 77e04 │ │ + bne.n 77e6c │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ cmp.w sl, #0 │ │ - bne.n 77dfa │ │ + bne.n 77e62 │ │ ldrd r0, r1, [r8] │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #144] @ (77e80 ) │ │ + ldr r1, [pc, #144] @ (77ee8 ) │ │ add r1, pc │ │ movs r2, #88 @ 0x58 │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.n 77dd0 │ │ + bne.n 77e38 │ │ ldr r0, [sp, #12] │ │ lsls r0, r0, #1 │ │ mov.w r0, #0 │ │ - beq.n 77dda │ │ + beq.n 77e42 │ │ ldr r1, [sp, #16] │ │ mov r4, r0 │ │ mov r0, r1 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r0, #1 │ │ mov r6, r9 │ │ - b.n 77d4e │ │ + b.n 77db6 │ │ movs r0, #1 │ │ mov.w r1, #512 @ 0x200 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r1, r9 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ udf #254 @ 0xfe │ │ mov r5, r0 │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r9 │ │ - b.n 77e64 │ │ + b.n 77ecc │ │ mov r5, r0 │ │ mov r0, r4 │ │ - b.n 77e64 │ │ + b.n 77ecc │ │ mov r5, r0 │ │ ldr r0, [sp, #12] │ │ lsls r0, r0, #1 │ │ - beq.n 77e68 │ │ + beq.n 77ed0 │ │ ldr r0, [sp, #16] │ │ - b.n 77e64 │ │ + b.n 77ecc │ │ mov r5, r0 │ │ ldr r0, [sp, #64] @ 0x40 │ │ - cbz r0, 77e68 │ │ + cbz r0, 77ed0 │ │ ldr r0, [sp, #68] @ 0x44 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ nop │ │ - lsrs r3, r2, #29 │ │ - vcvt.f32.u32 d19, d24, #6 │ │ + lsrs r3, r5, #27 │ │ + vqrdmulh.s , q13, d16[0] │ │ movs r6, r0 │ │ - subs r6, #72 @ 0x48 │ │ + subs r5, #240 @ 0xf0 │ │ movs r6, r0 │ │ lsls r5, r3, #3 │ │ movs r0, r0 │ │ - lsrs r0, r1, #27 │ │ + lsrs r0, r4, #25 │ │ vrintz.f32 d27, d0 │ │ mov r7, sp │ │ sub sp, #16 │ │ ldrd r2, r1, [r1] │ │ str r0, [sp, #4] │ │ movs r0, #0 │ │ ldr r3, [r1, #16] │ │ @@ -120454,42 +120367,42 @@ │ │ movs r1, #9 │ │ cmp r0, #0 │ │ it ne │ │ movne r1, #0 │ │ mov r0, r1 │ │ add sp, #16 │ │ pop {r7, pc} │ │ - bl 77eb4 │ │ + bl 77f1c │ │ udf #254 @ 0xfe │ │ - bl 416fe │ │ + bl 41a06 │ │ push {r7, lr} │ │ mov r7, sp │ │ - ldr r0, [pc, #12] @ (77ec8 ) │ │ + ldr r0, [pc, #12] @ (77f30 ) │ │ movs r1, #85 @ 0x55 │ │ - ldr r2, [pc, #12] @ (77ecc ) │ │ + ldr r2, [pc, #12] @ (77f34 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ nop │ │ - asrs r0, r6, #19 │ │ - vaddl.u q10, d10, d8 │ │ + asrs r0, r1, #18 │ │ + @ instruction: 0xfffa3fb0 │ │ movs r6, r0 │ │ - b.w 77ed4 │ │ + b.w 77f3c │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #84 @ 0x54 │ │ mov r4, r0 │ │ ldr r0, [r0, #0] │ │ ldrb r2, [r0, #0] │ │ - cbnz r2, 77efc │ │ + cbnz r2, 77f64 │ │ ldr r2, [r4, #4] │ │ ldr r2, [r2, #0] │ │ cmp r2, #100 @ 0x64 │ │ - bls.n 77efc │ │ + bls.n 77f64 │ │ movs r0, #0 │ │ and.w r0, r0, #1 │ │ add sp, #84 @ 0x54 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrd r6, fp, [r1] │ │ movs r2, #0 │ │ @@ -120504,43 +120417,43 @@ │ │ mov r1, fp │ │ str r0, [sp, #32] │ │ mov r0, r6 │ │ strd r5, r2, [sp, #40] @ 0x28 │ │ mov r2, r8 │ │ str.w r9, [sp, #56] @ 0x38 │ │ strd r3, sl, [sp, #48] @ 0x30 │ │ - bl 77fac │ │ + bl 78014 │ │ ldrb.w r0, [r7, #-89] │ │ - cbnz r0, 77f84 │ │ + cbnz r0, 77fec │ │ ldrb r0, [r5, #0] │ │ - cbz r0, 77f84 │ │ + cbz r0, 77fec │ │ movs r5, #0 │ │ lsls r0, r6, #31 │ │ strd sl, r5, [sp, #24] │ │ - bne.n 77f60 │ │ + bne.n 77fc8 │ │ mov r0, fp │ │ movs r1, #0 │ │ movs r2, #15 │ │ movs r3, #0 │ │ str r5, [sp, #32] │ │ str.w r8, [sp] │ │ - blx d62ac │ │ + blx d62bc │ │ ldr r0, [sp, #32] │ │ bic.w fp, r0, #1 │ │ movs r0, #3 │ │ str r0, [sp, #32] │ │ movs r0, #2 │ │ str r0, [sp, #72] @ 0x48 │ │ add r0, sp, #24 │ │ add r2, sp, #32 │ │ add r3, sp, #72 @ 0x48 │ │ mov r1, fp │ │ str r5, [sp, #8] │ │ str r5, [sp, #0] │ │ - bl 7a52c │ │ + bl 7a594 │ │ ldr r1, [sp, #24] │ │ strb.w r0, [r9] │ │ ldr r0, [r1, #12] │ │ adds r0, #1 │ │ str r0, [r1, #12] │ │ ldr r0, [r4, #4] │ │ ldr r1, [r0, #0] │ │ @@ -120552,43 +120465,43 @@ │ │ add sp, #84 @ 0x54 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r1, [sp, #24] │ │ ldr r2, [r1, #12] │ │ adds r2, #1 │ │ str r2, [r1, #12] │ │ - blx d6dd0 │ │ + blx d6de0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ subw sp, sp, #1980 @ 0x7bc │ │ mov r9, r1 │ │ lsls r0, r0, #31 │ │ str r2, [sp, #256] @ 0x100 │ │ - bne.n 77fda │ │ + bne.n 78042 │ │ movs r0, #0 │ │ movs r1, #0 │ │ str r0, [sp, #632] @ 0x278 │ │ add r0, sp, #632 @ 0x278 │ │ str r0, [sp, #0] │ │ mov r0, r9 │ │ movs r2, #15 │ │ movs r3, #0 │ │ - blx d62ac │ │ + blx d62bc │ │ ldr r0, [sp, #632] @ 0x278 │ │ bic.w r9, r0, #1 │ │ - ldr r4, [pc, #844] @ (78328 ) │ │ + ldr r4, [pc, #844] @ (78390 ) │ │ cmp.w r9, #0 │ │ add r4, pc │ │ ldr.w r0, [r4, #1384] @ 0x568 │ │ it ne │ │ subne.w r9, r9, #1 │ │ str r4, [sp, #288] @ 0x120 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.w 78b14 │ │ + bne.w 78b7c │ │ movs r0, #0 │ │ movs r1, #8 │ │ strd r0, r1, [sp, #1016] @ 0x3f8 │ │ mov.w r1, #438 @ 0x1b6 │ │ strh.w r1, [sp, #1444] @ 0x5a4 │ │ movs r1, #1 │ │ str.w r0, [sp, #1446] @ 0x5a6 │ │ @@ -120607,109 +120520,109 @@ │ │ str r1, [sp, #636] @ 0x27c │ │ movw r1, #28719 @ 0x702f │ │ movt r1, #28530 @ 0x6f72 │ │ strb.w r0, [sp, #647] @ 0x287 │ │ str r1, [sp, #632] @ 0x278 │ │ add r1, sp, #632 @ 0x278 │ │ cmp r1, r1 │ │ - beq.n 7805a │ │ + beq.n 780c2 │ │ movs r2, #0 │ │ ldrb r3, [r1, r2] │ │ - cbz r3, 780ac │ │ + cbz r3, 78114 │ │ adds r2, #1 │ │ - bne.n 78052 │ │ + bne.n 780ba │ │ movw r2, #256 @ 0x100 │ │ ldrd r3, r6, [sp, #632] @ 0x278 │ │ movt r2, #257 @ 0x101 │ │ subs r5, r2, r6 │ │ orrs r6, r5 │ │ subs r5, r2, r3 │ │ orrs r3, r5 │ │ ands r3, r6 │ │ mvns r3, r3 │ │ tst.w r3, #2155905152 @ 0x80808080 │ │ - bne.n 78096 │ │ + bne.n 780fe │ │ movs r0, #8 │ │ movs r3, #0 │ │ - cbnz r3, 78096 │ │ + cbnz r3, 780fe │ │ adds r6, r1, r0 │ │ ldr r3, [r1, r0] │ │ ldr r6, [r6, #4] │ │ subs r5, r2, r6 │ │ subs r2, r2, r3 │ │ orrs r6, r5 │ │ orrs r2, r3 │ │ ands r2, r6 │ │ mvns r2, r2 │ │ tst.w r2, #2155905152 @ 0x80808080 │ │ - beq.n 780b0 │ │ + beq.n 78118 │ │ add r1, r0 │ │ rsb r3, r0, #16 │ │ movs r2, #0 │ │ ldrb r6, [r1, r2] │ │ - cbz r6, 780aa │ │ + cbz r6, 78112 │ │ adds r2, #1 │ │ cmp r3, r2 │ │ - bne.n 7809e │ │ - b.n 780b0 │ │ + bne.n 78106 │ │ + b.n 78118 │ │ add r2, r0 │ │ cmp r2, #15 │ │ - beq.n 780cc │ │ - ldr r0, [pc, #632] @ (7832c ) │ │ + beq.n 78134 │ │ + ldr r0, [pc, #632] @ (78394 ) │ │ add r0, pc │ │ ldrd r0, r1, [r0] │ │ str.w r0, [sp, #1096] @ 0x448 │ │ str.w r1, [sp, #1100] @ 0x44c │ │ uxtb r0, r0 │ │ cmp r0, #4 │ │ - bne.n 780e2 │ │ + bne.n 7814a │ │ ldr.w fp, [sp, #1100] @ 0x44c │ │ - b.n 780f0 │ │ + b.n 78158 │ │ add.w r0, sp, #1096 @ 0x448 │ │ add r1, sp, #632 @ 0x278 │ │ add.w r2, sp, #1440 @ 0x5a0 │ │ - bl 7a9d4 │ │ + bl 7aa3c │ │ ldrb.w r0, [sp, #1096] @ 0x448 │ │ cmp r0, #4 │ │ - beq.n 780c6 │ │ + beq.n 7812e │ │ ldrb.w r0, [sp, #1096] @ 0x448 │ │ ldr.w fp, [sp, #1100] @ 0x44c │ │ cmp r0, #4 │ │ - bne.w 781fe │ │ + bne.w 78266 │ │ add r4, sp, #632 @ 0x278 │ │ movs r0, #0 │ │ movs r5, #1 │ │ str r0, [sp, #304] @ 0x130 │ │ strd r0, r5, [sp, #296] @ 0x128 │ │ mov r0, r4 │ │ movs r1, #104 @ 0x68 │ │ - bl d518e │ │ + bl d521e │ │ mov r0, fp │ │ mov r1, r4 │ │ - blx d8980 │ │ + blx d8990 │ │ adds r0, #1 │ │ - beq.n 78178 │ │ + beq.n 781e0 │ │ mov r0, fp │ │ movs r2, #0 │ │ movs r3, #0 │ │ str r5, [sp, #0] │ │ ldrd r4, r6, [sp, #680] @ 0x2a8 │ │ movs r5, #0 │ │ - blx d8990 │ │ + blx d89a0 │ │ and.w r2, r0, r1 │ │ adds r2, #1 │ │ - beq.n 78178 │ │ + beq.n 781e0 │ │ subs r4, r4, r0 │ │ sbcs.w r0, r6, r1 │ │ adc.w r0, r5, #0 │ │ teq r0, #1 │ │ it ne │ │ movne r4, #0 │ │ cmp r4, #0 │ │ - bne.w 78db0 │ │ + bne.w 78e18 │ │ movs r0, #1 │ │ mov.w sl, #0 │ │ str r0, [sp, #292] @ 0x124 │ │ add.w r0, r4, #1024 @ 0x400 │ │ mov r1, r0 │ │ bfc r1, #13, #19 │ │ subs r2, r4, r1 │ │ @@ -120718,21 +120631,21 @@ │ │ it cc │ │ movcc.w r2, #8192 @ 0x2000 │ │ cmp r1, #0 │ │ it eq │ │ moveq r2, r0 │ │ cmp r4, #0 │ │ str r2, [sp, #284] @ 0x11c │ │ - beq.n 78226 │ │ + beq.n 7828e │ │ movs r0, #0 │ │ movs r6, #0 │ │ mov r8, sl │ │ str r0, [sp, #268] @ 0x10c │ │ - b.n 78234 │ │ - blx d8850 │ │ + b.n 7829c │ │ + blx d8860 │ │ mov.w r0, #8192 @ 0x2000 │ │ movs r6, #1 │ │ str r0, [sp, #284] @ 0x11c │ │ movs r0, #1 │ │ mov.w sl, #0 │ │ str r0, [sp, #292] @ 0x124 │ │ add r4, sp, #632 @ 0x278 │ │ @@ -120741,81 +120654,81 @@ │ │ strd r0, r0, [sp, #656] @ 0x290 │ │ strd r0, r0, [sp, #648] @ 0x288 │ │ strd r0, r0, [sp, #640] @ 0x280 │ │ strd r0, r0, [sp, #632] @ 0x278 │ │ mov r0, fp │ │ mov r1, r4 │ │ movs r2, #32 │ │ - blx d8900 │ │ + blx d8910 │ │ mov r5, r0 │ │ adds r0, #1 │ │ - bne.n 781d2 │ │ - blx d8850 │ │ + bne.n 7823a │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ cmp r0, #4 │ │ - beq.n 781a2 │ │ + beq.n 7820a │ │ movs r5, #0 │ │ str.w r0, [sp, #1444] @ 0x5a4 │ │ strb.w r5, [sp, #1443] @ 0x5a3 │ │ strh.w r5, [sp, #1441] @ 0x5a1 │ │ strb.w r5, [sp, #1440] @ 0x5a0 │ │ ldr r6, [sp, #292] @ 0x124 │ │ - b.n 783ea │ │ + b.n 78452 │ │ ldr r6, [sp, #292] @ 0x124 │ │ cmp r5, #32 │ │ - bhi.w 7a1e6 │ │ + bhi.w 7a24e │ │ cmp r5, sl │ │ - bhi.w 7a1f6 │ │ + bhi.w 7a25e │ │ add r1, sp, #632 @ 0x278 │ │ mov r0, r6 │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ cmp r5, #0 │ │ str r5, [sp, #304] @ 0x130 │ │ - beq.w 783de │ │ + beq.w 78446 │ │ str.w r8, [sp, #268] @ 0x10c │ │ mov r6, r5 │ │ ldr.w r8, [sp, #296] @ 0x128 │ │ - b.n 78234 │ │ + b.n 7829c │ │ cmp r0, #3 │ │ - bne.n 78220 │ │ + bne.n 78288 │ │ ldrd r4, r5, [fp] │ │ ldr r1, [r5, #0] │ │ - cbz r1, 7820e │ │ + cbz r1, 78276 │ │ mov r0, r4 │ │ blx r1 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, fp │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r4, #8 │ │ - b.w 78a42 │ │ + b.w 78aaa │ │ movs r0, #0 │ │ movs r6, #0 │ │ mov r8, sl │ │ cmp.w sl, #32 │ │ str r0, [sp, #268] @ 0x10c │ │ - bcc.n 7818c │ │ + bcc.n 781f4 │ │ movs r0, #0 │ │ movs r5, #0 │ │ movs r1, #0 │ │ str.w sl, [sp, #280] @ 0x118 │ │ str r0, [sp, #276] @ 0x114 │ │ cmp r6, r8 │ │ str r1, [sp, #272] @ 0x110 │ │ itt eq │ │ ldreq r4, [sp, #280] @ 0x118 │ │ cmpeq r8, r4 │ │ - beq.n 7828e │ │ + beq.n 782f6 │ │ mov r5, r8 │ │ cmp r6, r5 │ │ - beq.n 782f2 │ │ + beq.n 7835a │ │ ldr.w r8, [sp, #296] @ 0x128 │ │ ldr r0, [sp, #284] @ 0x11c │ │ sub.w sl, r8, r6 │ │ mvn.w r5, #2147483648 @ 0x80000000 │ │ cmp r0, sl │ │ it cc │ │ movcc sl, r0 │ │ @@ -120824,180 +120737,180 @@ │ │ it cc │ │ movcc r5, sl │ │ ldr r0, [sp, #292] @ 0x124 │ │ adds r4, r0, r6 │ │ mov r0, fp │ │ mov r1, r4 │ │ mov r2, r5 │ │ - blx d8900 │ │ + blx d8910 │ │ adds r1, r0, #1 │ │ - bne.n 78330 │ │ - blx d8850 │ │ + bne.n 78398 │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ cmp r0, #4 │ │ - beq.n 78274 │ │ - b.n 783cc │ │ + beq.n 782dc │ │ + b.n 78434 │ │ ldr r6, [sp, #292] @ 0x124 │ │ strd r5, r5, [sp, #656] @ 0x290 │ │ strd r5, r5, [sp, #648] @ 0x288 │ │ strd r5, r5, [sp, #640] @ 0x280 │ │ strd r5, r5, [sp, #632] @ 0x278 │ │ add r5, sp, #632 @ 0x278 │ │ mov r0, fp │ │ mov r1, r5 │ │ movs r2, #32 │ │ - blx d8900 │ │ + blx d8910 │ │ adds r1, r0, #1 │ │ - bne.n 782bc │ │ - blx d8850 │ │ + bne.n 78324 │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ cmp r0, #4 │ │ - beq.n 782a2 │ │ - b.n 783b6 │ │ + beq.n 7830a │ │ + b.n 7841e │ │ cmp r0, #33 @ 0x21 │ │ - bcs.w 7a1e4 │ │ + bcs.w 7a24c │ │ mov r5, r0 │ │ cmp r0, #0 │ │ - beq.n 7839c │ │ + beq.n 78404 │ │ movs r0, #1 │ │ mov r1, r4 │ │ str r0, [sp, #0] │ │ add r0, sp, #296 @ 0x128 │ │ mov r2, r5 │ │ movs r3, #1 │ │ - bl 77788 │ │ + bl 777f0 │ │ ldrd r1, r6, [sp, #300] @ 0x12c │ │ mov r2, r5 │ │ str r1, [sp, #292] @ 0x124 │ │ mov r4, r5 │ │ adds r0, r1, r6 │ │ add r1, sp, #632 @ 0x278 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r5, [sp, #296] @ 0x128 │ │ add r6, r4 │ │ cmp r6, r5 │ │ - bne.n 78252 │ │ + bne.n 782ba │ │ movs r0, #1 │ │ add.w r8, r5, #32 │ │ strd r0, r0, [sp] │ │ cmp.w r8, r5, lsl #1 │ │ it ls │ │ movls.w r8, r5, lsl #1 │ │ ldr r4, [sp, #292] @ 0x124 │ │ add r0, sp, #632 @ 0x278 │ │ mov r1, r5 │ │ mov r3, r8 │ │ mov r2, r4 │ │ - bl 77834 │ │ + bl 7789c │ │ ldr r0, [sp, #632] @ 0x278 │ │ cmp r0, #1 │ │ - beq.w 7a1aa │ │ + beq.w 7a212 │ │ ldr r1, [sp, #636] @ 0x27c │ │ str r1, [sp, #300] @ 0x12c │ │ strd r1, r8, [sp, #292] @ 0x124 │ │ - b.n 78256 │ │ + b.n 782be │ │ nop │ │ - ldr r4, [r0, r5] │ │ + ldr r4, [r5, r3] │ │ movs r6, r0 │ │ - subs r2, #242 @ 0xf2 │ │ + subs r2, #154 @ 0x9a │ │ movs r6, r0 │ │ ldr r3, [sp, #276] @ 0x114 │ │ add r6, r0 │ │ str r6, [sp, #304] @ 0x130 │ │ cmp r0, r3 │ │ it hi │ │ movhi r3, r0 │ │ cmp r0, #0 │ │ - beq.w 7a130 │ │ + beq.w 7a198 │ │ subs r1, r3, r0 │ │ movs r4, #0 │ │ str r1, [sp, #276] @ 0x114 │ │ cmp r0, sl │ │ ldr r1, [sp, #272] @ 0x110 │ │ it cc │ │ addcc r4, r1, #1 │ │ ldr r2, [sp, #268] @ 0x10c │ │ mov r1, r4 │ │ movs r5, #0 │ │ cmp r2, #0 │ │ - beq.w 78240 │ │ + beq.w 782a8 │ │ mov r1, r5 │ │ ldr r5, [sp, #284] @ 0x11c │ │ cmp r4, #1 │ │ mov r2, r5 │ │ it gt │ │ movgt.w r2, #4294967295 @ 0xffffffff │ │ cmp r3, sl │ │ it eq │ │ moveq r2, r5 │ │ mov r5, r1 │ │ mov r1, r4 │ │ cmp r0, sl │ │ str r2, [sp, #284] @ 0x11c │ │ - bne.w 78240 │ │ + bne.w 782a8 │ │ mov r1, r4 │ │ cmp sl, r2 │ │ str r2, [sp, #284] @ 0x11c │ │ - bcc.w 78240 │ │ + bcc.w 782a8 │ │ lsls r0, r2, #1 │ │ mov r1, r4 │ │ cmp r2, #0 │ │ str r0, [sp, #284] @ 0x11c │ │ - bpl.w 78240 │ │ + bpl.w 782a8 │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ mov r1, r4 │ │ str r0, [sp, #284] @ 0x11c │ │ - b.n 78240 │ │ + b.n 782a8 │ │ ldr r6, [sp, #300] @ 0x12c │ │ add r1, sp, #632 @ 0x278 │ │ mov r2, r5 │ │ adds r0, r6, r4 │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #4 │ │ add r5, r4 │ │ str.w r5, [sp, #1444] @ 0x5a4 │ │ strb.w r0, [sp, #1440] @ 0x5a0 │ │ - b.n 783ea │ │ + b.n 78452 │ │ movs r1, #0 │ │ str.w r0, [sp, #1444] @ 0x5a4 │ │ strb.w r1, [sp, #1443] @ 0x5a3 │ │ mov r5, r4 │ │ strh.w r1, [sp, #1441] @ 0x5a1 │ │ strb.w r1, [sp, #1440] @ 0x5a0 │ │ - b.n 783ea │ │ + b.n 78452 │ │ str.w r0, [sp, #1444] @ 0x5a4 │ │ movs r0, #0 │ │ strb.w r0, [sp, #1440] @ 0x5a0 │ │ str r6, [sp, #304] @ 0x130 │ │ mov r5, r6 │ │ ldr r6, [sp, #292] @ 0x124 │ │ - b.n 783ea │ │ + b.n 78452 │ │ movs r0, #4 │ │ strb.w r0, [sp, #1440] @ 0x5a0 │ │ movs r0, #0 │ │ str.w r0, [sp, #1444] @ 0x5a4 │ │ add r0, sp, #632 @ 0x278 │ │ mov r1, r6 │ │ mov r2, r5 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #632] @ 0x278 │ │ - cbz r0, 7840a │ │ + cbz r0, 78472 │ │ ldrb.w r0, [sp, #1440] @ 0x5a0 │ │ movs r5, #0 │ │ cmp r0, #4 │ │ - bne.w 789dc │ │ - ldr r0, [pc, #928] @ (787a8 ) │ │ + bne.w 78a44 │ │ + ldr r0, [pc, #928] @ (78810 ) │ │ add r0, pc │ │ - b.n 7840e │ │ + b.n 78476 │ │ add.w r0, sp, #1440 @ 0x5a0 │ │ ldr r4, [r0, #4] │ │ ldrb r0, [r0, #0] │ │ cmp r0, #4 │ │ str r5, [sp, #304] @ 0x130 │ │ - bne.w 789e8 │ │ + bne.w 78a50 │ │ ldr r0, [sp, #300] @ 0x12c │ │ movs r1, #1 │ │ strb.w r1, [sp, #656] @ 0x290 │ │ movs r1, #10 │ │ strd r5, r1, [sp, #648] @ 0x288 │ │ movs r2, #0 │ │ strd r1, r0, [sp, #632] @ 0x278 │ │ @@ -121006,461 +120919,461 @@ │ │ add.w r0, sp, #1440 @ 0x5a0 │ │ add r1, sp, #632 @ 0x278 │ │ mov.w sl, #0 │ │ strh.w r2, [sp, #668] @ 0x29c │ │ strd r2, r5, [sp, #660] @ 0x294 │ │ strd r5, r2, [sp, #640] @ 0x280 │ │ ldr r4, [sp, #636] @ 0x27c │ │ - bl 7ab50 │ │ + bl 7abb8 │ │ ldr.w r0, [sp, #1440] @ 0x5a0 │ │ cmp r0, #1 │ │ - bne.n 7846c │ │ + bne.n 784d4 │ │ ldr r0, [sp, #660] @ 0x294 │ │ ldr.w r1, [sp, #1448] @ 0x5a8 │ │ str r1, [sp, #660] @ 0x294 │ │ add r4, r0 │ │ sub.w r8, r1, r0 │ │ cmp.w r8, #0 │ │ - bne.n 784a2 │ │ - b.n 784ce │ │ + bne.n 7850a │ │ + b.n 78536 │ │ ldrb.w r0, [sp, #669] @ 0x29d │ │ cmp r0, #0 │ │ - bne.w 78dec │ │ + bne.w 78e54 │ │ ldrb.w r0, [sp, #668] @ 0x29c │ │ movs r1, #1 │ │ strb.w r1, [sp, #669] @ 0x29d │ │ cmp r0, #1 │ │ - bne.n 7848a │ │ + bne.n 784f2 │ │ ldrd r0, r1, [sp, #660] @ 0x294 │ │ - b.n 78494 │ │ + b.n 784fc │ │ ldrd r0, r1, [sp, #660] @ 0x294 │ │ cmp r1, r0 │ │ - beq.w 78dec │ │ + beq.w 78e54 │ │ ldr r2, [sp, #636] @ 0x27c │ │ sub.w r8, r1, r0 │ │ adds r4, r2, r0 │ │ cmp.w r8, #0 │ │ - beq.n 784ce │ │ + beq.n 78536 │ │ sub.w r0, r8, #1 │ │ ldrb r1, [r4, r0] │ │ cmp r1, #10 │ │ - bne.n 784ce │ │ + bne.n 78536 │ │ sub.w r8, r8, #2 │ │ - cbz r0, 784c4 │ │ + cbz r0, 7852c │ │ ldrb.w r1, [r4, r8] │ │ movs r2, #0 │ │ uxtb r1, r1 │ │ cmp r1, #13 │ │ mov r1, r4 │ │ it ne │ │ movne r1, r2 │ │ - b.n 784c6 │ │ + b.n 7852e │ │ movs r1, #0 │ │ cmp r1, #0 │ │ ite eq │ │ moveq r8, r0 │ │ movne r4, r1 │ │ mov r0, r4 │ │ mov r1, r8 │ │ - bl 91abc │ │ + bl 91b28 │ │ mov r5, r0 │ │ movs r0, #0 │ │ str.w r0, [sp, #1452] @ 0x5ac │ │ movs r0, #1 │ │ strb.w r0, [sp, #1464] @ 0x5b8 │ │ movs r0, #32 │ │ mov r6, r1 │ │ str.w r1, [sp, #1456] @ 0x5b0 │ │ str.w r1, [sp, #1448] @ 0x5a8 │ │ str.w r5, [sp, #1444] @ 0x5a4 │ │ str.w r0, [sp, #1440] @ 0x5a0 │ │ str.w r0, [sp, #1460] @ 0x5b4 │ │ add.w r0, sp, #1096 @ 0x448 │ │ add.w r1, sp, #1440 @ 0x5a0 │ │ - bl 7ab50 │ │ + bl 7abb8 │ │ ldr.w r0, [sp, #1096] @ 0x448 │ │ cmp r0, #0 │ │ it ne │ │ cmpne r5, #0 │ │ - bne.n 78524 │ │ + bne.n 7858c │ │ movs r0, #0 │ │ str r0, [sp, #292] @ 0x124 │ │ movs r0, #1 │ │ str r0, [sp, #272] @ 0x110 │ │ cmp.w r8, #0 │ │ - bne.n 7853e │ │ - b.n 78a0e │ │ + bne.n 785a6 │ │ + b.n 78a76 │ │ ldr.w r8, [sp, #1100] @ 0x44c │ │ mov r4, r5 │ │ ldr.w r0, [sp, #1104] @ 0x450 │ │ subs r1, r6, r0 │ │ add r0, r5 │ │ str r1, [sp, #292] @ 0x124 │ │ str r0, [sp, #272] @ 0x110 │ │ cmp.w r8, #0 │ │ - beq.w 78a0e │ │ + beq.w 78a76 │ │ ldr r0, [sp, #272] @ 0x110 │ │ ldr r1, [sp, #292] @ 0x124 │ │ - bl 91abc │ │ + bl 91b28 │ │ mov r5, r0 │ │ movs r0, #0 │ │ str.w r0, [sp, #1452] @ 0x5ac │ │ movs r0, #1 │ │ strb.w r0, [sp, #1464] @ 0x5b8 │ │ movs r0, #32 │ │ mov r6, r1 │ │ str.w r1, [sp, #1456] @ 0x5b0 │ │ str.w r1, [sp, #1448] @ 0x5a8 │ │ str.w r5, [sp, #1444] @ 0x5a4 │ │ str.w r0, [sp, #1440] @ 0x5a0 │ │ str.w r0, [sp, #1460] @ 0x5b4 │ │ add.w r0, sp, #1096 @ 0x448 │ │ add.w r1, sp, #1440 @ 0x5a0 │ │ - bl 7ab50 │ │ + bl 7abb8 │ │ ldr.w r0, [sp, #1096] @ 0x448 │ │ cmp r0, #0 │ │ it ne │ │ cmpne r5, #0 │ │ - bne.n 78592 │ │ + bne.n 785fa │ │ movs r0, #0 │ │ str r0, [sp, #284] @ 0x11c │ │ movs r0, #1 │ │ str r0, [sp, #268] @ 0x10c │ │ ldr r0, [sp, #292] @ 0x124 │ │ - cbnz r0, 785ae │ │ - b.n 78a0e │ │ + cbnz r0, 78616 │ │ + b.n 78a76 │ │ ldr.w r0, [sp, #1100] @ 0x44c │ │ str r0, [sp, #292] @ 0x124 │ │ ldr.w r0, [sp, #1104] @ 0x450 │ │ subs r1, r6, r0 │ │ add r0, r5 │ │ str r1, [sp, #284] @ 0x11c │ │ strd r0, r5, [sp, #268] @ 0x10c │ │ ldr r0, [sp, #292] @ 0x124 │ │ cmp r0, #0 │ │ - beq.w 78a0e │ │ + beq.w 78a76 │ │ ldr r0, [sp, #268] @ 0x10c │ │ ldr r1, [sp, #284] @ 0x11c │ │ - bl 91abc │ │ + bl 91b28 │ │ mov r5, r0 │ │ movs r0, #0 │ │ str.w r0, [sp, #1452] @ 0x5ac │ │ movs r0, #1 │ │ strb.w r0, [sp, #1464] @ 0x5b8 │ │ movs r0, #32 │ │ mov r6, r1 │ │ str.w r1, [sp, #1456] @ 0x5b0 │ │ str.w r1, [sp, #1448] @ 0x5a8 │ │ str.w r5, [sp, #1444] @ 0x5a4 │ │ str.w r0, [sp, #1440] @ 0x5a0 │ │ str.w r0, [sp, #1460] @ 0x5b4 │ │ add.w r0, sp, #1096 @ 0x448 │ │ add.w r1, sp, #1440 @ 0x5a0 │ │ - bl 7ab50 │ │ + bl 7abb8 │ │ ldr.w r0, [sp, #1096] @ 0x448 │ │ cmp r0, #0 │ │ it ne │ │ cmpne r5, #0 │ │ - bne.n 78602 │ │ + bne.n 7866a │ │ movs r0, #0 │ │ str r0, [sp, #280] @ 0x118 │ │ movs r0, #1 │ │ str r0, [sp, #264] @ 0x108 │ │ ldr r0, [sp, #284] @ 0x11c │ │ - cbnz r0, 7861e │ │ - b.n 78a0e │ │ + cbnz r0, 78686 │ │ + b.n 78a76 │ │ ldr.w r0, [sp, #1100] @ 0x44c │ │ str r0, [sp, #284] @ 0x11c │ │ ldr.w r0, [sp, #1104] @ 0x450 │ │ subs r1, r6, r0 │ │ add r0, r5 │ │ str r1, [sp, #280] @ 0x118 │ │ strd r0, r5, [sp, #264] @ 0x108 │ │ ldr r0, [sp, #284] @ 0x11c │ │ cmp r0, #0 │ │ - beq.w 78a0e │ │ + beq.w 78a76 │ │ ldr r0, [sp, #264] @ 0x108 │ │ ldr r1, [sp, #280] @ 0x118 │ │ - bl 91abc │ │ + bl 91b28 │ │ mov r5, r0 │ │ movs r0, #0 │ │ str.w r0, [sp, #1452] @ 0x5ac │ │ movs r0, #1 │ │ strb.w r0, [sp, #1464] @ 0x5b8 │ │ movs r0, #32 │ │ mov r6, r1 │ │ str.w r1, [sp, #1456] @ 0x5b0 │ │ str.w r1, [sp, #1448] @ 0x5a8 │ │ str.w r5, [sp, #1444] @ 0x5a4 │ │ str.w r0, [sp, #1440] @ 0x5a0 │ │ str.w r0, [sp, #1460] @ 0x5b4 │ │ add.w r0, sp, #1096 @ 0x448 │ │ add.w r1, sp, #1440 @ 0x5a0 │ │ - bl 7ab50 │ │ + bl 7abb8 │ │ ldr.w r0, [sp, #1096] @ 0x448 │ │ cmp r0, #0 │ │ it ne │ │ cmpne r5, #0 │ │ - bne.n 78672 │ │ + bne.n 786da │ │ movs r0, #0 │ │ str r0, [sp, #276] @ 0x114 │ │ movs r0, #1 │ │ str r0, [sp, #260] @ 0x104 │ │ ldr r0, [sp, #280] @ 0x118 │ │ - cbnz r0, 7868e │ │ - b.n 78a0e │ │ + cbnz r0, 786f6 │ │ + b.n 78a76 │ │ ldr.w r0, [sp, #1100] @ 0x44c │ │ str r0, [sp, #280] @ 0x118 │ │ ldr.w r0, [sp, #1104] @ 0x450 │ │ subs r1, r6, r0 │ │ add r0, r5 │ │ str r1, [sp, #276] @ 0x114 │ │ strd r0, r5, [sp, #260] @ 0x104 │ │ ldr r0, [sp, #280] @ 0x118 │ │ cmp r0, #0 │ │ - beq.w 78a0e │ │ + beq.w 78a76 │ │ ldr r0, [sp, #260] @ 0x104 │ │ ldr r1, [sp, #276] @ 0x114 │ │ - bl 91abc │ │ + bl 91b28 │ │ mov r5, r0 │ │ movs r0, #0 │ │ str.w r0, [sp, #1452] @ 0x5ac │ │ movs r0, #1 │ │ strb.w r0, [sp, #1464] @ 0x5b8 │ │ movs r0, #32 │ │ mov r6, r1 │ │ str.w r1, [sp, #1456] @ 0x5b0 │ │ str.w r1, [sp, #1448] @ 0x5a8 │ │ str.w r5, [sp, #1444] @ 0x5a4 │ │ str.w r0, [sp, #1440] @ 0x5a0 │ │ str.w r0, [sp, #1460] @ 0x5b4 │ │ add.w r0, sp, #1096 @ 0x448 │ │ add.w r1, sp, #1440 @ 0x5a0 │ │ - bl 7ab50 │ │ + bl 7abb8 │ │ ldr.w r0, [sp, #1096] @ 0x448 │ │ cmp r0, #0 │ │ it ne │ │ cmpne r5, #0 │ │ - bne.n 786de │ │ + bne.n 78746 │ │ movs r1, #0 │ │ movs r0, #1 │ │ ldr r2, [sp, #276] @ 0x114 │ │ - cbnz r2, 786f6 │ │ - b.n 78a0e │ │ + cbnz r2, 7875e │ │ + b.n 78a76 │ │ ldr.w r0, [sp, #1100] @ 0x44c │ │ str r0, [sp, #276] @ 0x114 │ │ ldr.w r0, [sp, #1104] @ 0x450 │ │ str r5, [sp, #260] @ 0x104 │ │ subs r1, r6, r0 │ │ add r0, r5 │ │ ldr r2, [sp, #276] @ 0x114 │ │ cmp r2, #0 │ │ - beq.w 78a0e │ │ - bl 91abc │ │ + beq.w 78a76 │ │ + bl 91b28 │ │ strd r1, r0, [sp, #244] @ 0xf4 │ │ movs r0, #0 │ │ str.w r0, [sp, #1452] @ 0x5ac │ │ movs r0, #1 │ │ strb.w r0, [sp, #1464] @ 0x5b8 │ │ movs r0, #45 @ 0x2d │ │ str.w r8, [sp, #1456] @ 0x5b0 │ │ str.w r8, [sp, #1448] @ 0x5a8 │ │ str.w r4, [sp, #1444] @ 0x5a4 │ │ str.w r0, [sp, #1440] @ 0x5a0 │ │ str.w r0, [sp, #1460] @ 0x5b4 │ │ add.w r0, sp, #1096 @ 0x448 │ │ add.w r1, sp, #1440 @ 0x5a0 │ │ - bl 7ab50 │ │ + bl 7abb8 │ │ ldr.w r0, [sp, #1096] @ 0x448 │ │ cmp r0, #1 │ │ - bne.w 78a0e │ │ + bne.w 78a76 │ │ ldr.w r1, [sp, #1100] @ 0x44c │ │ ldr.w ip, [sp, #1104] @ 0x450 │ │ cmp r1, #1 │ │ - beq.n 7874c │ │ + beq.n 787b4 │ │ cmp r1, #0 │ │ - beq.w 78a0e │ │ + beq.w 78a76 │ │ ldrb r2, [r4, #0] │ │ - b.n 78758 │ │ + b.n 787c0 │ │ ldrb r2, [r4, #0] │ │ cmp r2, #43 @ 0x2b │ │ it ne │ │ cmpne r2, #45 @ 0x2d │ │ - beq.w 78a0e │ │ + beq.w 78a76 │ │ cmp r2, #43 @ 0x2b │ │ mov r2, r4 │ │ mov.w r5, #0 │ │ itt eq │ │ addeq r2, #1 │ │ subeq r1, #1 │ │ cmp r1, #9 │ │ - bcs.n 787ac │ │ - cbz r1, 78792 │ │ + bcs.n 78814 │ │ + cbz r1, 787fa │ │ ldrb r0, [r2, #0] │ │ sub.w r6, r0, #65 @ 0x41 │ │ sub.w r3, r0, #48 @ 0x30 │ │ cmp r0, #57 @ 0x39 │ │ bic.w r6, r6, #32 │ │ it hi │ │ addhi.w r3, r6, #10 │ │ cmp r3, #15 │ │ - bhi.w 78a0e │ │ + bhi.w 78a76 │ │ orr.w r5, r3, r5, lsl #4 │ │ adds r2, #1 │ │ subs r1, #1 │ │ - bne.n 7876c │ │ + bne.n 787d4 │ │ sub.w r0, r8, ip │ │ add.w r1, r4, ip │ │ cmp r0, #1 │ │ - beq.n 787ec │ │ + beq.n 78854 │ │ cmp r0, #0 │ │ - beq.w 78a0e │ │ + beq.w 78a76 │ │ ldrb r2, [r1, #0] │ │ - b.n 787f8 │ │ - adds r5, #186 @ 0xba │ │ + b.n 78860 │ │ + adds r5, #98 @ 0x62 │ │ movs r6, r0 │ │ cmp r1, #0 │ │ - beq.n 78792 │ │ + beq.n 787fa │ │ movs r0, #0 │ │ cmp.w r0, r5, lsr #28 │ │ - bne.w 78a0e │ │ + bne.w 78a76 │ │ ldrb.w r3, [r2], #1 │ │ sub.w r0, r3, #65 @ 0x41 │ │ sub.w r6, r3, #48 @ 0x30 │ │ cmp r3, #57 @ 0x39 │ │ bic.w r0, r0, #32 │ │ it hi │ │ addhi.w r6, r0, #10 │ │ adds.w r5, r6, r5, lsl #4 │ │ mov.w r0, #0 │ │ adc.w r3, r0, #0 │ │ cmp r6, #15 │ │ - bhi.w 78a0e │ │ + bhi.w 78a76 │ │ subs r1, #1 │ │ cmp r3, #0 │ │ - beq.n 787ac │ │ - b.n 78a0e │ │ + beq.n 78814 │ │ + b.n 78a76 │ │ ldrb r2, [r1, #0] │ │ cmp r2, #43 @ 0x2b │ │ it ne │ │ cmpne r2, #45 @ 0x2d │ │ - beq.w 78a0e │ │ + beq.w 78a76 │ │ cmp r2, #43 @ 0x2b │ │ mov.w r6, #0 │ │ itt eq │ │ addeq r1, #1 │ │ subeq r0, #1 │ │ cmp r0, #9 │ │ - bcs.w 7899e │ │ - cbz r0, 78832 │ │ + bcs.w 78a06 │ │ + cbz r0, 7889a │ │ ldrb r3, [r1, #0] │ │ sub.w r4, r3, #65 @ 0x41 │ │ sub.w r2, r3, #48 @ 0x30 │ │ cmp r3, #57 @ 0x39 │ │ bic.w r4, r4, #32 │ │ it hi │ │ addhi.w r2, r4, #10 │ │ cmp r2, #15 │ │ - bhi.w 78a0e │ │ + bhi.w 78a76 │ │ orr.w r6, r2, r6, lsl #4 │ │ adds r1, #1 │ │ subs r0, #1 │ │ - bne.n 7880c │ │ + bne.n 78874 │ │ ldr r1, [sp, #272] @ 0x110 │ │ add.w r4, sp, #1440 @ 0x5a0 │ │ ldr r0, [sp, #292] @ 0x124 │ │ str.w r1, [sp, #1440] @ 0x5a0 │ │ add r0, r1 │ │ str.w r0, [sp, #1444] @ 0x5a4 │ │ mov r0, r4 │ │ - bl 91b94 │ │ + bl 91c00 │ │ lsls r0, r0, #31 │ │ - beq.w 78a0e │ │ + beq.w 78a76 │ │ mov r0, r4 │ │ mov r8, r1 │ │ - bl 91b94 │ │ + bl 91c00 │ │ lsls r0, r0, #31 │ │ str r1, [sp, #292] @ 0x124 │ │ - beq.w 78a0e │ │ + beq.w 78a76 │ │ mov r0, r4 │ │ - bl 91b94 │ │ + bl 91c00 │ │ lsls r0, r0, #31 │ │ str r1, [sp, #272] @ 0x110 │ │ - beq.w 78a0e │ │ + beq.w 78a76 │ │ mov r0, r4 │ │ - bl 91b94 │ │ + bl 91c00 │ │ lsls r0, r0, #31 │ │ str r1, [sp, #240] @ 0xf0 │ │ - beq.w 78a0e │ │ + beq.w 78a76 │ │ mov r0, r4 │ │ - bl 91b94 │ │ + bl 91c00 │ │ lsls r0, r0, #31 │ │ - bne.w 78a0e │ │ + bne.w 78a76 │ │ ldr r1, [sp, #268] @ 0x10c │ │ mov r0, r4 │ │ ldr r2, [sp, #284] @ 0x11c │ │ - bl 91c04 │ │ + bl 91c70 │ │ ldrb.w r0, [sp, #1440] @ 0x5a0 │ │ cmp r0, #1 │ │ - beq.w 78a0e │ │ + beq.w 78a76 │ │ ldr.w r0, [sp, #1448] @ 0x5a8 │ │ str r0, [sp, #236] @ 0xec │ │ ldr.w r0, [sp, #1452] @ 0x5ac │ │ str.w r8, [sp, #268] @ 0x10c │ │ str r0, [sp, #232] @ 0xe8 │ │ ldr r1, [sp, #264] @ 0x108 │ │ mov r0, r4 │ │ ldr r2, [sp, #280] @ 0x118 │ │ - bl 91cde │ │ + bl 91d4a │ │ ldr.w r1, [sp, #1440] @ 0x5a0 │ │ cmp r1, #0 │ │ - beq.w 78a0e │ │ + beq.w 78a76 │ │ ldr.w r2, [sp, #1444] @ 0x5a4 │ │ add.w r4, sp, #1096 @ 0x448 │ │ ldr.w r0, [sp, #1452] @ 0x5ac │ │ str r0, [sp, #284] @ 0x11c │ │ mov r0, r4 │ │ ldr.w r8, [sp, #1448] @ 0x5a8 │ │ - bl 91d34 │ │ + bl 91da0 │ │ ldrb.w r0, [sp, #1096] @ 0x448 │ │ cmp r0, #0 │ │ - bne.w 78a0e │ │ + bne.w 78a76 │ │ ldr r2, [sp, #284] @ 0x11c │ │ mov r1, r8 │ │ ldr.w r0, [sp, #1100] @ 0x44c │ │ str r0, [sp, #280] @ 0x118 │ │ mov r0, r4 │ │ - bl 91d34 │ │ + bl 91da0 │ │ ldrb.w r0, [sp, #1096] @ 0x448 │ │ cmp r0, #1 │ │ - beq.w 78a0e │ │ + beq.w 78a76 │ │ add.w r4, sp, #1440 @ 0x5a0 │ │ ldr r1, [sp, #260] @ 0x104 │ │ ldr r2, [sp, #276] @ 0x114 │ │ mov r0, r4 │ │ ldr.w r8, [sp, #1100] @ 0x44c │ │ - bl 91d34 │ │ + bl 91da0 │ │ ldrb.w r0, [sp, #1440] @ 0x5a0 │ │ cmp r0, #1 │ │ - beq.n 78a0e │ │ + beq.n 78a76 │ │ mov r0, r4 │ │ ldr.w r4, [sp, #1444] @ 0x5a4 │ │ ldrd r2, r1, [sp, #244] @ 0xf4 │ │ - bl 91e08 │ │ + bl 91e74 │ │ ldr.w r0, [sp, #1440] @ 0x5a0 │ │ str r0, [sp, #284] @ 0x11c │ │ ldr.w r0, [sp, #1444] @ 0x5a4 │ │ str r0, [sp, #276] @ 0x114 │ │ ldr.w r0, [sp, #1448] @ 0x5a8 │ │ str r0, [sp, #264] @ 0x108 │ │ ldr r0, [sp, #1016] @ 0x3f8 │ │ cmp sl, r0 │ │ - bne.n 78946 │ │ + bne.n 789ae │ │ add r0, sp, #1016 @ 0x3f8 │ │ - bl 7ad24 │ │ + bl 7ad8c │ │ ldr r0, [sp, #1020] @ 0x3fc │ │ str r0, [sp, #252] @ 0xfc │ │ ldr r1, [sp, #252] @ 0xfc │ │ rsb r0, sl, sl, lsl #3 │ │ ldr r2, [sp, #268] @ 0x10c │ │ add.w sl, sl, #1 │ │ str.w r2, [r1, r0, lsl #3] │ │ @@ -121486,663 +121399,663 @@ │ │ ldr r1, [sp, #280] @ 0x118 │ │ str r1, [r0, #32] │ │ add r1, sp, #632 @ 0x278 │ │ ldrb.w r0, [sp, #669] @ 0x29d │ │ str.w sl, [sp, #1024] @ 0x400 │ │ cmp r0, #0 │ │ add.w r0, sp, #1440 @ 0x5a0 │ │ - beq.w 78448 │ │ - b.n 78dec │ │ + beq.w 784b0 │ │ + b.n 78e54 │ │ cmp r0, #0 │ │ - beq.w 78832 │ │ + beq.w 7889a │ │ movs r2, #0 │ │ cmp.w r2, r6, lsr #28 │ │ - bne.n 78a0e │ │ + bne.n 78a76 │ │ ldrb.w r2, [r1], #1 │ │ sub.w r4, r2, #65 @ 0x41 │ │ sub.w r3, r2, #48 @ 0x30 │ │ cmp r2, #57 @ 0x39 │ │ bic.w r4, r4, #32 │ │ it hi │ │ addhi.w r3, r4, #10 │ │ adds.w r6, r3, r6, lsl #4 │ │ mov.w r2, #0 │ │ adc.w r2, r2, #0 │ │ cmp r3, #15 │ │ - bhi.n 78a0e │ │ + bhi.n 78a76 │ │ subs r0, #1 │ │ cmp r2, #0 │ │ - beq.n 7899e │ │ - b.n 78a0e │ │ + beq.n 78a06 │ │ + b.n 78a76 │ │ ldr.w r4, [sp, #1444] @ 0x5a4 │ │ cmp r0, #4 │ │ str r5, [sp, #304] @ 0x130 │ │ - beq.w 7841a │ │ + beq.w 78482 │ │ cmp r0, #3 │ │ - bne.n 78a0a │ │ + bne.n 78a72 │ │ ldrd r5, r6, [r4] │ │ ldr r1, [r6, #0] │ │ - cbz r1, 789f8 │ │ + cbz r1, 78a60 │ │ mov r0, r5 │ │ blx r1 │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov.w sl, #0 │ │ ldr r0, [sp, #296] @ 0x128 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #300] @ 0x12c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, fp │ │ - blx d89a0 │ │ + blx d89b0 │ │ ldr r4, [sp, #1020] @ 0x3fc │ │ cmp.w sl, #0 │ │ - beq.n 78a42 │ │ + beq.n 78aaa │ │ add.w r5, r4, #44 @ 0x2c │ │ ldr.w r0, [r5, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #56 @ 0x38 │ │ subs.w sl, sl, #1 │ │ - bne.n 78a2c │ │ + bne.n 78a94 │ │ ldr r0, [sp, #1016] @ 0x3f8 │ │ - cbz r0, 78a4c │ │ + cbz r0, 78ab4 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov.w r4, #2147483648 @ 0x80000000 │ │ - ldr r0, [pc, #916] @ (78de8 ) │ │ + ldr r0, [pc, #916] @ (78e50 ) │ │ add r1, sp, #644 @ 0x284 │ │ stmia.w r1, {r4, r5, sl} │ │ movs r1, #0 │ │ movs r2, #8 │ │ add r0, pc │ │ str r1, [sp, #640] @ 0x280 │ │ strd r1, r2, [sp, #632] @ 0x278 │ │ add r1, sp, #632 @ 0x278 │ │ - blx d89b0 │ │ + blx d89c0 │ │ add r5, sp, #632 @ 0x278 │ │ add.w r3, sp, #1096 @ 0x448 │ │ ldmia r5, {r0, r1, r2, r5} │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ stmia r3!, {r0, r1, r2} │ │ - beq.n 78aa2 │ │ + beq.n 78b0a │ │ ldrd r8, r6, [sp, #648] @ 0x288 │ │ - cbz r6, 78a98 │ │ + cbz r6, 78b00 │ │ add.w r4, r8, #44 @ 0x2c │ │ ldr.w r0, [r4, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r4, #56 @ 0x38 │ │ subs r6, #1 │ │ - bne.n 78a84 │ │ + bne.n 78aec │ │ cmp r5, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r4, [sp, #288] @ 0x120 │ │ add.w r2, sp, #1096 @ 0x448 │ │ ldmia r2, {r0, r1, r2} │ │ ldr.w r5, [r4, #1384] @ 0x568 │ │ str.w r0, [sp, #1444] @ 0x5a4 │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ str.w r1, [sp, #1448] @ 0x5a8 │ │ str.w r2, [sp, #1452] @ 0x5ac │ │ - beq.n 78af8 │ │ + beq.n 78b60 │ │ ldr.w r6, [r4, #1392] @ 0x570 │ │ ldr.w r8, [r4, #1388] @ 0x56c │ │ - cbz r6, 78aec │ │ + cbz r6, 78b54 │ │ add.w r4, r8, #16 │ │ ldr r0, [r4, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r4, #12] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #16] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r4, #48 @ 0x30 │ │ subs r6, #1 │ │ - bne.n 78ace │ │ + bne.n 78b36 │ │ cmp r5, #0 │ │ ldr r4, [sp, #288] @ 0x120 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r3, sp, #1440 @ 0x5a0 │ │ movs r6, #0 │ │ str.w r6, [r4, #1376] @ 0x560 │ │ ldmia r3, {r0, r1, r2, r3} │ │ str.w r0, [r4, #1380] @ 0x564 │ │ str.w r1, [r4, #1384] @ 0x568 │ │ str.w r2, [r4, #1388] @ 0x56c │ │ str.w r3, [r4, #1392] @ 0x570 │ │ ldr.w r1, [r4, #1392] @ 0x570 │ │ cmp r1, #0 │ │ - beq.w 7a11e │ │ + beq.w 7a186 │ │ ldr r0, [sp, #288] @ 0x120 │ │ add.w r2, r1, r1, lsl #1 │ │ mov.w r8, #0 │ │ ldr.w r0, [r0, #1388] @ 0x56c │ │ add.w ip, r0, r2, lsl #4 │ │ mov r3, r0 │ │ ldrd r4, r2, [r3, #32] │ │ ldr.w sl, [r3, #40] @ 0x28 │ │ adds r3, #48 @ 0x30 │ │ lsls r6, r2, #3 │ │ - cbz r6, 78b58 │ │ + cbz r6, 78bc0 │ │ mov r5, r4 │ │ ldr.w r2, [r4], #8 │ │ subs r6, #8 │ │ add r2, sl │ │ cmp r2, r9 │ │ - bhi.n 78b3e │ │ + bhi.n 78ba6 │ │ ldr r5, [r5, #4] │ │ add r2, r5 │ │ cmp r2, r9 │ │ - bls.n 78b3e │ │ - b.n 78b64 │ │ + bls.n 78ba6 │ │ + b.n 78bcc │ │ add.w r8, r8, #1 │ │ cmp r3, ip │ │ - bne.n 78b32 │ │ - b.w 7a11e │ │ + bne.n 78b9a │ │ + b.w 7a186 │ │ ldr r2, [sp, #288] @ 0x120 │ │ ldr.w r2, [r2, #1376] @ 0x560 │ │ cmp r2, #5 │ │ - bcs.w 7a142 │ │ + bcs.w 7a1aa │ │ cmp r2, #0 │ │ - beq.n 78c72 │ │ + beq.n 78cda │ │ ldr r3, [sp, #288] @ 0x120 │ │ ldr r6, [r3, #0] │ │ cmp r6, r8 │ │ - bne.n 78c6e │ │ + bne.n 78cd6 │ │ movs r3, #0 │ │ movs r1, #0 │ │ movs r0, #0 │ │ cmp r0, r2 │ │ - bcs.w 7a11e │ │ + bcs.w 7a186 │ │ ldr.w fp, [sp, #288] @ 0x120 │ │ add.w r5, sp, #1440 @ 0x5a0 │ │ str r1, [sp, #284] @ 0x11c │ │ mov.w r1, #344 @ 0x158 │ │ smlabb r1, r0, r1, fp │ │ mov r0, r5 │ │ mov.w r2, #344 @ 0x158 │ │ str r3, [sp, #292] @ 0x124 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add r4, sp, #632 @ 0x278 │ │ mov r1, fp │ │ mov.w r2, #344 @ 0x158 │ │ mov r0, r4 │ │ - bl d4c50 │ │ + bl d50a2 │ │ mov r0, fp │ │ mov r1, r5 │ │ mov.w r2, #344 @ 0x158 │ │ - bl d4c50 │ │ + bl d50a2 │ │ mov r0, r5 │ │ mov r1, r4 │ │ mov.w r2, #344 @ 0x158 │ │ - bl d4c50 │ │ + bl d50a2 │ │ cmp r6, r8 │ │ - beq.w 78fec │ │ + beq.w 79054 │ │ add.w r4, fp, #344 @ 0x158 │ │ add r5, sp, #632 @ 0x278 │ │ mov.w r2, #344 @ 0x158 │ │ mov r0, r5 │ │ mov r1, r4 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add.w r6, sp, #1440 @ 0x5a0 │ │ mov r0, r4 │ │ mov.w r2, #344 @ 0x158 │ │ mov r1, r6 │ │ - bl d4c50 │ │ + bl d50a2 │ │ mov r0, r6 │ │ mov r1, r5 │ │ mov.w r2, #344 @ 0x158 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr r0, [sp, #292] @ 0x124 │ │ cmp r0, #0 │ │ - bne.w 78fec │ │ + bne.w 79054 │ │ add.w r4, fp, #688 @ 0x2b0 │ │ add r5, sp, #632 @ 0x278 │ │ mov.w r2, #344 @ 0x158 │ │ mov r0, r5 │ │ mov r1, r4 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add.w r6, sp, #1440 @ 0x5a0 │ │ mov r0, r4 │ │ mov.w r2, #344 @ 0x158 │ │ mov r1, r6 │ │ - bl d4c50 │ │ + bl d50a2 │ │ mov r0, r6 │ │ mov r1, r5 │ │ mov.w r2, #344 @ 0x158 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr r0, [sp, #284] @ 0x11c │ │ cmp r0, #0 │ │ - bne.w 78fec │ │ + bne.w 79054 │ │ add.w r4, fp, #1032 @ 0x408 │ │ add r5, sp, #632 @ 0x278 │ │ mov.w r2, #344 @ 0x158 │ │ mov r0, r5 │ │ mov r1, r4 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add.w r6, sp, #1440 @ 0x5a0 │ │ mov r0, r4 │ │ mov.w r2, #344 @ 0x158 │ │ mov r1, r6 │ │ - bl d4c50 │ │ + bl d50a2 │ │ mov r0, r6 │ │ mov r1, r5 │ │ mov.w r2, #344 @ 0x158 │ │ - bl d4c50 │ │ - b.n 78fec │ │ + bl d50a2 │ │ + b.n 79054 │ │ cmp r2, #1 │ │ - bne.n 78cb2 │ │ + bne.n 78d1a │ │ cmp r8, r1 │ │ - bcs.w 7a272 │ │ + bcs.w 7a2da │ │ add.w r1, r8, r8, lsl #1 │ │ lsls r2, r1, #4 │ │ ldr r2, [r0, r2] │ │ add.w r0, r0, r1, lsl #4 │ │ ldrd fp, r6, [r0, #20] │ │ lsls r1, r2, #31 │ │ - beq.w 78f3a │ │ + beq.w 78fa2 │ │ cmp r6, #2 │ │ - bcc.w 78f3a │ │ + bcc.w 78fa2 │ │ ldrd r3, r0, [r0, #8] │ │ movs r5, #0 │ │ movw r1, #12065 @ 0x2f21 │ │ str r0, [sp, #292] @ 0x124 │ │ subs r0, r6, #1 │ │ ldrh.w r2, [fp, r5] │ │ cmp r2, r1 │ │ - beq.n 78cda │ │ + beq.n 78d42 │ │ adds r5, #1 │ │ cmp r0, r5 │ │ - bne.n 78ca2 │ │ - b.n 78f3a │ │ + bne.n 78d0a │ │ + b.n 78fa2 │ │ ldr r3, [sp, #288] @ 0x120 │ │ ldr.w r3, [r3, #344] @ 0x158 │ │ cmp r3, r8 │ │ - bne.n 78cc4 │ │ + bne.n 78d2c │ │ movs r3, #1 │ │ movs r1, #0 │ │ movs r0, #1 │ │ - b.n 78b82 │ │ + b.n 78bea │ │ cmp r2, #2 │ │ - beq.n 78c72 │ │ + beq.n 78cda │ │ ldr r3, [sp, #288] @ 0x120 │ │ ldr.w r3, [r3, #688] @ 0x2b0 │ │ cmp r3, r8 │ │ - bne.n 78d66 │ │ + bne.n 78dce │ │ movs r0, #2 │ │ movs r1, #1 │ │ movs r3, #0 │ │ - b.n 78b82 │ │ + b.n 78bea │ │ cmp r5, r6 │ │ str r3, [sp, #280] @ 0x118 │ │ - bhi.w 7a226 │ │ + bhi.w 7a28e │ │ mov.w r0, #438 @ 0x1b6 │ │ movs r4, #0 │ │ strh.w r0, [sp, #1444] @ 0x5a4 │ │ movs r0, #1 │ │ str.w r4, [sp, #1446] @ 0x5a6 │ │ strb.w r0, [sp, #1446] @ 0x5a6 │ │ add.w r0, sp, #1440 @ 0x5a0 │ │ str r0, [sp, #1016] @ 0x3f8 │ │ lsrs r0, r5, #7 │ │ cmp r0, #2 │ │ str r6, [sp, #284] @ 0x11c │ │ str.w r4, [sp, #1440] @ 0x5a0 │ │ strh.w r4, [sp, #1450] @ 0x5aa │ │ - bhi.w 7a234 │ │ + bhi.w 7a29c │ │ add r6, sp, #632 @ 0x278 │ │ mov r1, fp │ │ mov r2, r5 │ │ mov r0, r6 │ │ - bl d53c6 │ │ + bl d52ea │ │ add.w ip, r5, #1 │ │ cmp r5, #6 │ │ strb r4, [r6, r5] │ │ - bhi.n 78d34 │ │ + bhi.n 78d9c │ │ movs r2, #0 │ │ ldrb r0, [r6, r2] │ │ cmp r0, #0 │ │ - beq.n 78e0e │ │ + beq.n 78e76 │ │ adds r2, #1 │ │ cmp ip, r2 │ │ - bne.n 78d26 │ │ - b.n 78e3c │ │ + bne.n 78d8e │ │ + b.n 78ea4 │ │ cmp r6, r6 │ │ - bne.n 78d80 │ │ + bne.n 78de8 │ │ sub.w lr, r5, #7 │ │ movs r1, #0 │ │ movw r3, #256 @ 0x100 │ │ movt r3, #257 @ 0x101 │ │ adds r0, r6, r1 │ │ ldr r4, [r6, r1] │ │ ldr r0, [r0, #4] │ │ subs r2, r3, r0 │ │ orrs r0, r2 │ │ subs r2, r3, r4 │ │ orrs r2, r4 │ │ ands r0, r2 │ │ mvns r0, r0 │ │ tst.w r0, #2155905152 @ 0x80808080 │ │ - bne.n 78d98 │ │ + bne.n 78e00 │ │ adds r1, #8 │ │ cmp r1, lr │ │ - bls.n 78d46 │ │ - b.n 78d98 │ │ + bls.n 78dae │ │ + b.n 78e00 │ │ cmp r2, #3 │ │ - beq.w 78c72 │ │ + beq.w 78cda │ │ ldr r3, [sp, #288] @ 0x120 │ │ ldr.w r3, [r3, #1032] @ 0x408 │ │ cmp r3, r8 │ │ - bne.w 78c72 │ │ + bne.w 78cda │ │ movs r0, #3 │ │ movs r3, #0 │ │ movs r1, #0 │ │ - b.n 78b82 │ │ + b.n 78bea │ │ movs r1, #0 │ │ movs r2, #0 │ │ ldrb r0, [r6, r2] │ │ cmp r0, #0 │ │ - beq.n 78e0e │ │ + beq.n 78e76 │ │ adds r2, #1 │ │ - bne.n 78d84 │ │ + bne.n 78dec │ │ sub.w lr, r5, #7 │ │ cmp.w lr, #0 │ │ - bcs.n 78d3e │ │ + bcs.n 78da6 │ │ cmp ip, r1 │ │ - beq.n 78e3c │ │ + beq.n 78ea4 │ │ subs r2, r5, r1 │ │ adds r0, r6, r1 │ │ adds r3, r2, #1 │ │ movs r2, #0 │ │ ldrb r6, [r0, r2] │ │ - cbz r6, 78e0c │ │ + cbz r6, 78e74 │ │ adds r2, #1 │ │ cmp r3, r2 │ │ - bne.n 78da4 │ │ - b.n 78e3c │ │ + bne.n 78e0c │ │ + b.n 78ea4 │ │ mov sl, r4 │ │ add r0, sp, #632 @ 0x278 │ │ cmp r4, #8 │ │ it ls │ │ movls.w sl, #8 │ │ movs r1, #0 │ │ movs r2, #1 │ │ mov r3, sl │ │ - bl 3dff6 │ │ + bl 3e2fe │ │ ldr r0, [sp, #632] @ 0x278 │ │ cmp r0, #1 │ │ - beq.w 78a0a │ │ + beq.w 78a72 │ │ ldr r0, [sp, #636] @ 0x27c │ │ cmn.w r4, #1024 @ 0x400 │ │ strd sl, r0, [sp, #296] @ 0x128 │ │ - bcc.w 78148 │ │ + bcc.w 781b0 │ │ str r0, [sp, #292] @ 0x124 │ │ mov.w r0, #8192 @ 0x2000 │ │ str r0, [sp, #284] @ 0x11c │ │ - b.w 7816e │ │ + b.w 781d6 │ │ movs r3, #5 │ │ movs r0, r0 │ │ ldr r0, [sp, #296] @ 0x128 │ │ ldrd r4, r5, [sp, #1016] @ 0x3f8 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #300] @ 0x12c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, fp │ │ - blx d89a0 │ │ + blx d89b0 │ │ cmp.w r4, #2147483648 @ 0x80000000 │ │ - beq.w 78a4c │ │ - b.n 78a50 │ │ + beq.w 78ab4 │ │ + b.n 78ab8 │ │ add r2, r1 │ │ cmp r2, r5 │ │ - bne.n 78e3c │ │ + bne.n 78ea4 │ │ add.w r0, sp, #1096 @ 0x448 │ │ add r1, sp, #632 @ 0x278 │ │ add.w r2, sp, #1440 @ 0x5a0 │ │ - bl 7a9d4 │ │ + bl 7aa3c │ │ ldr r6, [sp, #284] @ 0x11c │ │ ldrb.w r0, [sp, #1096] @ 0x448 │ │ cmp r0, #4 │ │ - beq.n 78e56 │ │ + beq.n 78ebe │ │ ldrb.w r0, [sp, #1096] @ 0x448 │ │ ldr.w r4, [sp, #1100] @ 0x44c │ │ cmp r0, #4 │ │ - bne.n 78f0a │ │ + bne.n 78f72 │ │ adds r0, r4, #1 │ │ - bne.n 78e5a │ │ - b.n 78f3a │ │ - ldr r0, [pc, #860] @ (7919c ) │ │ + bne.n 78ec2 │ │ + b.n 78fa2 │ │ + ldr r0, [pc, #860] @ (79204 ) │ │ add r0, pc │ │ ldrd r0, r1, [r0] │ │ str.w r0, [sp, #1096] @ 0x448 │ │ str.w r1, [sp, #1100] @ 0x44c │ │ ldr r6, [sp, #284] @ 0x11c │ │ ldrb.w r0, [sp, #1096] @ 0x448 │ │ cmp r0, #4 │ │ - bne.n 78e2a │ │ + bne.n 78e92 │ │ ldr.w r4, [sp, #1100] @ 0x44c │ │ add r0, sp, #632 @ 0x278 │ │ movs r1, #104 @ 0x68 │ │ - bl d518e │ │ + bl d521e │ │ add r1, sp, #632 @ 0x278 │ │ mov r0, r4 │ │ mov r5, r4 │ │ - blx d8980 │ │ + blx d8990 │ │ adds r0, #1 │ │ - beq.n 78f30 │ │ + beq.n 78f98 │ │ ldrd r0, r3, [sp, #680] @ 0x2a8 │ │ ldr r4, [sp, #280] @ 0x118 │ │ ldr r2, [sp, #292] @ 0x124 │ │ subs r1, r0, r4 │ │ sbcs.w r0, r3, r2 │ │ it eq │ │ orrseq.w r0, r2, r4, lsr #31 │ │ - bne.n 78f34 │ │ + bne.n 78f9c │ │ movs r0, #0 │ │ movs r2, #1 │ │ movs r3, #2 │ │ strd r5, r4, [sp] │ │ movs r4, #0 │ │ str r1, [sp, #292] @ 0x124 │ │ - blx d89c0 │ │ + blx d89d0 │ │ ldr r2, [sp, #292] @ 0x124 │ │ mov r1, r0 │ │ adds r0, #1 │ │ - beq.n 78f34 │ │ + beq.n 78f9c │ │ movs r0, #4 │ │ str.w r4, [r7, #-100] │ │ str.w r0, [r7, #-104] │ │ strd r4, r4, [r7, #-112] @ 0x70 │ │ strd r4, r0, [r7, #-120] @ 0x78 │ │ add r0, sp, #1016 @ 0x3f8 │ │ str r1, [sp, #280] @ 0x118 │ │ - bl 7b10c │ │ + bl 7b174 │ │ ldr.w r0, [sp, #1080] @ 0x438 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.n 78ef8 │ │ + beq.n 78f60 │ │ add.w r4, sp, #1096 @ 0x448 │ │ add r1, sp, #1016 @ 0x3f8 │ │ movs r2, #80 @ 0x50 │ │ mov r0, r4 │ │ - bl d4c50 │ │ + bl d50a2 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str.w r0, [sp, #1504] @ 0x5e0 │ │ add.w r3, sp, #1440 @ 0x5a0 │ │ sub.w r1, r7, #120 @ 0x78 │ │ add r0, sp, #632 @ 0x278 │ │ mov r2, r4 │ │ str r3, [sp, #0] │ │ str r1, [sp, #276] @ 0x114 │ │ - bl 7b6c4 │ │ + bl 7b72c │ │ ldr r0, [sp, #888] @ 0x378 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.w 7a150 │ │ + bne.w 7a1b8 │ │ sub.w r0, r7, #120 @ 0x78 │ │ - bl 7b660 │ │ + bl 7b6c8 │ │ ldr r0, [sp, #280] @ 0x118 │ │ ldr r1, [sp, #292] @ 0x124 │ │ - blx d89d0 │ │ - b.n 78f34 │ │ + blx d89e0 │ │ + b.n 78f9c │ │ cmp r0, #3 │ │ - bne.n 78f3a │ │ + bne.n 78fa2 │ │ str r4, [sp, #292] @ 0x124 │ │ ldrd r5, r4, [r4] │ │ ldr r1, [r4, #0] │ │ - cbz r1, 78f1c │ │ + cbz r1, 78f84 │ │ mov r0, r5 │ │ blx r1 │ │ ldr r0, [r4, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #292] @ 0x124 │ │ - blx d87c0 │ │ - b.n 78f3a │ │ - blx d8850 │ │ + blx d87d0 │ │ + b.n 78fa2 │ │ + blx d8860 │ │ mov r0, r5 │ │ - blx d89a0 │ │ + blx d89b0 │ │ add r0, sp, #296 @ 0x128 │ │ mov r1, fp │ │ mov r2, r6 │ │ - bl 7d250 │ │ + bl 7d2b8 │ │ ldr r0, [sp, #584] @ 0x248 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 7a11e │ │ + beq.w 7a186 │ │ add.w r0, sp, #1096 @ 0x448 │ │ add r1, sp, #296 @ 0x128 │ │ adds r0, #8 │ │ mov.w r2, #336 @ 0x150 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr r0, [sp, #288] @ 0x120 │ │ str.w r8, [sp, #1096] @ 0x448 │ │ ldr.w r5, [r0, #1376] @ 0x560 │ │ cmp r5, #4 │ │ - bne.n 78f80 │ │ + bne.n 78fe8 │ │ ldr r4, [sp, #288] @ 0x120 │ │ movs r0, #3 │ │ str.w r0, [r4, #1376] @ 0x560 │ │ add.w r0, r4, #1032 @ 0x408 │ │ - bl 7d936 │ │ + bl 7d99e │ │ ldr.w r5, [r4, #1376] @ 0x560 │ │ add.w r0, sp, #1440 @ 0x5a0 │ │ add.w r1, sp, #1096 @ 0x448 │ │ mov.w r2, #344 @ 0x158 │ │ mov.w r4, #344 @ 0x158 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add.w r8, r5, #1 │ │ cmp.w r8, #5 │ │ - bcs.w 7a1b8 │ │ + bcs.w 7a220 │ │ cmp.w r8, #0 │ │ - beq.n 78fe4 │ │ + beq.n 7904c │ │ mul.w r4, r8, r4 │ │ - ldr r5, [pc, #500] @ (791a0 ) │ │ + ldr r5, [pc, #500] @ (79208 ) │ │ add.w fp, sp, #632 @ 0x278 │ │ add r5, pc │ │ add.w r6, sp, #1440 @ 0x5a0 │ │ mov r0, fp │ │ mov r1, r5 │ │ mov.w r2, #344 @ 0x158 │ │ - bl d4c50 │ │ + bl d50a2 │ │ mov r0, r5 │ │ mov r1, r6 │ │ mov.w r2, #344 @ 0x158 │ │ - bl d4c50 │ │ + bl d50a2 │ │ mov r0, r6 │ │ mov r1, fp │ │ mov.w r2, #344 @ 0x158 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add.w r5, r5, #344 @ 0x158 │ │ subs.w r4, r4, #344 @ 0x158 │ │ - bne.n 78fb6 │ │ + bne.n 7901e │ │ ldr.w fp, [sp, #288] @ 0x120 │ │ str.w r8, [fp, #1376] @ 0x560 │ │ ldrd r2, r1, [fp, #316] @ 0x13c │ │ sub.w r0, r9, sl │ │ str r0, [sp, #252] @ 0xfc │ │ mov r0, r1 │ │ mov r3, r1 │ │ - cbz r1, 79058 │ │ + cbz r1, 790c0 │ │ cmp r1, #1 │ │ - bne.n 79008 │ │ + bne.n 79070 │ │ ldr.w lr, [sp, #252] @ 0xfc │ │ movs r0, #0 │ │ - b.n 79036 │ │ + b.n 7909e │ │ ldr.w lr, [sp, #252] @ 0xfc │ │ mov.w ip, #0 │ │ mov r6, r1 │ │ movs r5, #0 │ │ add.w r0, r5, r6, lsr #1 │ │ sub.w r6, r6, r6, lsr #1 │ │ add.w r4, r2, r0, lsl #5 │ │ ldrd r4, r3, [r4, #8] │ │ subs.w r4, lr, r4 │ │ sbcs.w r3, ip, r3 │ │ it cc │ │ movcc r0, r5 │ │ mov r5, r0 │ │ cmp r6, #1 │ │ - bhi.n 79014 │ │ + bhi.n 7907c │ │ add.w r3, r2, r0, lsl #5 │ │ ldrd r6, r3, [r3, #8] │ │ eor.w r5, r6, lr │ │ orrs r5, r3 │ │ - bne.n 7904a │ │ + bne.n 790b2 │ │ movs r3, #1 │ │ - b.n 79058 │ │ + b.n 790c0 │ │ subs.w r6, r6, lr │ │ sbcs.w r3, r3, #0 │ │ it cc │ │ addcc r0, #1 │ │ movs r3, #0 │ │ add r0, r3 │ │ cmp r0, r1 │ │ - bhi.w 7a1c6 │ │ + bhi.w 7a22e │ │ ldr r3, [sp, #252] @ 0xfc │ │ mov.w ip, #0 │ │ adds.w r8, r3, #1 │ │ adc.w r9, ip, #0 │ │ cmp r0, r1 │ │ - bne.n 79136 │ │ + bne.n 7919e │ │ movs r0, #3 │ │ str.w ip, [sp, #1096] @ 0x448 │ │ str.w r0, [sp, #1100] @ 0x44c │ │ ldr.w r0, [sp, #1096] @ 0x448 │ │ ldr.w fp, [sp, #252] @ 0xfc │ │ lsls r0, r0, #31 │ │ - bne.w 7a104 │ │ + bne.w 7a16c │ │ ldr.w r4, [sp, #1100] @ 0x44c │ │ ldr.w r0, [sp, #1144] @ 0x478 │ │ str r0, [sp, #240] @ 0xf0 │ │ cmp r4, #2 │ │ ldr.w r0, [sp, #1136] @ 0x470 │ │ str r0, [sp, #232] @ 0xe8 │ │ sub.w r0, r4, #3 │ │ mov r1, r0 │ │ it ls │ │ movls r1, #2 │ │ cmp r1, #0 │ │ - beq.w 79e38 │ │ + beq.w 79ea0 │ │ ldr.w r2, [sp, #1148] @ 0x47c │ │ cmp r1, #1 │ │ ldr.w r5, [sp, #1124] @ 0x464 │ │ str r2, [sp, #244] @ 0xf4 │ │ ldr.w r2, [sp, #1140] @ 0x474 │ │ add.w r6, r5, #16 │ │ ldr.w r3, [sp, #1116] @ 0x45c │ │ @@ -122158,23 +122071,23 @@ │ │ ldr.w r2, [sp, #1128] @ 0x468 │ │ ldr.w r9, [sp, #1120] @ 0x460 │ │ str r3, [sp, #220] @ 0xdc │ │ add.w r3, r5, #280 @ 0x118 │ │ str r6, [sp, #224] @ 0xe0 │ │ str r5, [sp, #248] @ 0xf8 │ │ strd r2, r3, [sp, #212] @ 0xd4 │ │ - bne.w 79e3c │ │ + bne.w 79ea4 │ │ cmp r0, #2 │ │ str.w ip, [sp, #260] @ 0x104 │ │ - bcc.n 7910e │ │ + bcc.n 79176 │ │ ldr r0, [sp, #240] @ 0xf0 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #232] @ 0xe8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ str.w r8, [sp, #280] @ 0x118 │ │ movs r0, #2 │ │ ldr.w r8, [sp, #268] @ 0x10c │ │ mov ip, r5 │ │ ldr r1, [sp, #272] @ 0x110 │ │ mov r2, r9 │ │ ldr r4, [sp, #252] @ 0xfc │ │ @@ -122183,76 +122096,76 @@ │ │ movs r0, #3 │ │ str r0, [sp, #292] @ 0x124 │ │ mov fp, r8 │ │ mov r9, r1 │ │ ldr r0, [sp, #260] @ 0x104 │ │ str r0, [sp, #284] @ 0x11c │ │ str r1, [sp, #276] @ 0x114 │ │ - b.w 79f2e │ │ + b.w 79f96 │ │ ldr r6, [sp, #252] @ 0xfc │ │ add.w sl, r2, r1, lsl #5 │ │ lsls r1, r1, #5 │ │ mov.w lr, r0, lsl #5 │ │ - b.n 7914c │ │ + b.n 791b4 │ │ subs r1, #32 │ │ adds r2, #32 │ │ cmp lr, r1 │ │ - beq.n 79072 │ │ + beq.n 790da │ │ add.w r5, r2, lr │ │ ldrd r4, r3, [r5, #16] │ │ subs r4, r6, r4 │ │ sbcs.w r3, ip, r3 │ │ - bcc.n 791a4 │ │ + bcc.n 7920c │ │ ldrd r3, r4, [r5, #8] │ │ subs r3, r6, r3 │ │ sbcs.w r3, ip, r4 │ │ - bcs.n 79144 │ │ + bcs.n 791ac │ │ ldrd r3, r4, [r5] │ │ subs r3, r6, r3 │ │ sbcs.w r3, ip, r4 │ │ - bcc.n 79144 │ │ + bcc.n 791ac │ │ ldr r2, [sp, #288] @ 0x120 │ │ ldr r0, [r5, #24] │ │ ldr.w r1, [r2, #328] @ 0x148 │ │ cmp r0, r1 │ │ - bcs.w 7a2a2 │ │ + bcs.w 7a30a │ │ mov.w r1, #352 @ 0x160 │ │ ldr.w r2, [r2, #324] @ 0x144 │ │ mla r0, r0, r1, r2 │ │ add.w r3, r5, #32 │ │ movs r1, #0 │ │ str r0, [sp, #632] @ 0x278 │ │ add.w r0, sp, #1440 @ 0x5a0 │ │ - b.n 791b2 │ │ - cmp r5, #102 @ 0x66 │ │ + b.n 7921a │ │ + cmp r5, #14 │ │ movs r6, r0 │ │ - ldr r1, [pc, #464] @ (79374 ) │ │ + ldr r1, [pc, #112] @ (7927c ) │ │ movs r6, r0 │ │ add.w r0, r2, r0, lsl #5 │ │ movs r5, #0 │ │ add.w r3, r0, #32 │ │ add r0, sp, #632 @ 0x278 │ │ movs r1, #1 │ │ str r5, [r0, #0] │ │ ldr r5, [sp, #632] @ 0x278 │ │ cmp r5, #0 │ │ - beq.w 79072 │ │ + beq.w 790da │ │ str.w sl, [sp, #292] @ 0x124 │ │ add.w r0, sp, #1440 @ 0x5a0 │ │ ldr.w sl, [sp, #252] @ 0xfc │ │ mov.w fp, #0 │ │ ldr r4, [sp, #288] @ 0x120 │ │ str r1, [sp, #284] @ 0x11c │ │ mov r1, r5 │ │ str r3, [sp, #280] @ 0x118 │ │ mov r2, sl │ │ movs r3, #0 │ │ add.w r6, r4, #312 @ 0x138 │ │ str r6, [sp, #0] │ │ - bl 7d9dc │ │ + bl 7da44 │ │ ldr r0, [sp, #284] @ 0x11c │ │ add r2, sp, #632 @ 0x278 │ │ strb.w r0, [sp, #688] @ 0x2b0 │ │ add.w r1, sp, #1440 @ 0x5a0 │ │ ldr r0, [sp, #292] @ 0x124 │ │ str r0, [sp, #668] @ 0x29c │ │ ldr r0, [sp, #280] @ 0x118 │ │ @@ -122263,18 +122176,18 @@ │ │ strd r8, r9, [sp, #680] @ 0x2a8 │ │ mov r0, r4 │ │ strd sl, fp, [sp, #672] @ 0x2a0 │ │ strd r8, r9, [sp, #648] @ 0x288 │ │ strd sl, fp, [sp, #640] @ 0x280 │ │ strd sl, fp, [sp, #632] @ 0x278 │ │ strd r5, r6, [sp, #696] @ 0x2b8 │ │ - bl 7de10 │ │ + bl 7de78 │ │ ldrb.w r0, [sp, #1216] @ 0x4c0 │ │ cmp r0, #2 │ │ - beq.w 7907c │ │ + beq.w 790e4 │ │ ldr r0, [sp, #288] @ 0x120 │ │ ldrb.w r1, [r0, #40]! │ │ str r1, [sp, #276] @ 0x114 │ │ ldr r2, [r0, #40] @ 0x28 │ │ cmp r1, #10 │ │ str r2, [sp, #136] @ 0x88 │ │ it ne │ │ @@ -122384,328 +122297,328 @@ │ │ sub.w r1, r7, #224 @ 0xe0 │ │ add r0, sp, #296 @ 0x128 │ │ stmia r1!, {r2, r3, r5, r6} │ │ ldmia.w r4, {r2, r3, r5, r6} │ │ stmia r1!, {r2, r3, r5, r6} │ │ movs r2, #104 @ 0x68 │ │ ldr r1, [sp, #272] @ 0x110 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr r0, [sp, #276] @ 0x114 │ │ mov.w sl, #0 │ │ cmp r0, #10 │ │ itt ne │ │ ldrne r0, [sp, #204] @ 0xcc │ │ cmpne r0, #0 │ │ - bne.n 793b8 │ │ + bne.n 79420 │ │ ldr.w r4, [r7, #-216] │ │ movs r0, #1 │ │ str.w sl, [r7, #-112] │ │ strd sl, r0, [r7, #-120] @ 0x78 │ │ - cbz r4, 7939a │ │ + cbz r4, 79402 │ │ ldr.w r5, [r7, #-212] │ │ cmp r5, #0 │ │ - beq.n 7942c │ │ + beq.n 79494 │ │ str r0, [sp, #0] │ │ sub.w r0, r7, #120 @ 0x78 │ │ movs r1, #0 │ │ mov r2, r5 │ │ movs r3, #1 │ │ - bl 77788 │ │ + bl 777f0 │ │ add.w r9, sp, #1440 @ 0x5a0 │ │ ldrd r8, r6, [r7, #-116] @ 0x74 │ │ - b.n 79436 │ │ + b.n 7949e │ │ ldr.w r5, [r7, #-208] │ │ cmp r5, #0 │ │ - beq.n 79466 │ │ + beq.n 794ce │ │ movs r4, #0 │ │ ldr.w r6, [r7, #-204] │ │ mov.w r8, #1 │ │ movs r0, #0 │ │ add.w r9, sp, #1440 @ 0x5a0 │ │ cmp r6, #0 │ │ - bne.n 79472 │ │ - b.n 7947c │ │ + bne.n 794da │ │ + b.n 794e4 │ │ ldr r3, [sp, #284] @ 0x11c │ │ ldrd lr, r8, [r7, #-224] @ 0xe0 │ │ and.w r0, r8, r3 │ │ ldr.w r9, [r7, #-200] │ │ orr.w ip, r0, #1 │ │ mov r0, lr │ │ ldr r1, [sp, #284] @ 0x11c │ │ and.w r6, r0, r1 │ │ cmp.w sl, r6, lsr #29 │ │ - bne.n 79368 │ │ + bne.n 793d0 │ │ ldr r0, [sp, #292] @ 0x124 │ │ cmp.w r0, r6, lsl #3 │ │ ittt cs │ │ ldrcs r0, [sp, #292] @ 0x124 │ │ subcs.w r0, r0, r6, lsl #3 │ │ cmpcs r0, #8 │ │ - bcc.n 79368 │ │ + bcc.n 793d0 │ │ lsls r0, r6, #3 │ │ add.w r2, fp, r0 │ │ ldrh.w r0, [fp, r0] │ │ ldrb r4, [r2, #2] │ │ ldr.w r5, [r2, #3] │ │ ldrb r1, [r2, #7] │ │ orr.w r0, r0, r4, lsl #16 │ │ lsrs r2, r5, #8 │ │ orr.w r5, r0, r5, lsl #24 │ │ orr.w r2, r2, r1, lsl #24 │ │ eor.w r0, r5, lr │ │ eor.w r1, r2, r8 │ │ orrs r0, r1 │ │ - beq.w 798dc │ │ + beq.w 79944 │ │ adds.w r0, r6, ip │ │ orrs.w r1, r5, r2 │ │ - beq.n 79368 │ │ + beq.n 793d0 │ │ subs r1, r3, #1 │ │ cmp r3, #0 │ │ mov r3, r1 │ │ - bne.n 793cc │ │ - b.n 79368 │ │ + bne.n 79434 │ │ + b.n 793d0 │ │ movs r6, #0 │ │ mov.w r8, #1 │ │ add.w r9, sp, #1440 @ 0x5a0 │ │ add.w r0, r8, r6 │ │ mov r1, r4 │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ adds r4, r6, r5 │ │ ldr.w r5, [r7, #-208] │ │ str.w r4, [r7, #-112] │ │ - cbz r5, 79466 │ │ + cbz r5, 794ce │ │ ldr.w r6, [r7, #-204] │ │ - cbz r4, 7946c │ │ + cbz r4, 794d4 │ │ add.w r0, r8, r4 │ │ ldrb.w r0, [r0, #-1] │ │ subs r0, #47 @ 0x2f │ │ it ne │ │ movne r0, #1 │ │ - cbnz r6, 79472 │ │ - b.n 7947c │ │ + cbnz r6, 794da │ │ + b.n 794e4 │ │ mov.w sl, #0 │ │ - b.n 7976c │ │ + b.n 797d4 │ │ movs r4, #0 │ │ movs r0, #0 │ │ - cbz r6, 7947c │ │ + cbz r6, 794e4 │ │ ldrb r1, [r5, #0] │ │ cmp r1, #47 @ 0x2f │ │ - bne.n 7947c │ │ + bne.n 794e4 │ │ movs r4, #0 │ │ - b.n 79490 │ │ + b.n 794f8 │ │ ldr.w r1, [r7, #-120] │ │ - cbz r0, 79498 │ │ + cbz r0, 79500 │ │ cmp r1, r4 │ │ - beq.w 79b72 │ │ + beq.w 79bda │ │ movs r0, #47 @ 0x2f │ │ strb.w r0, [r8, r4] │ │ adds r4, #1 │ │ ldr.w r1, [r7, #-120] │ │ str.w r4, [r7, #-112] │ │ subs r0, r1, r4 │ │ cmp r6, r0 │ │ - bhi.w 79b16 │ │ + bhi.w 79b7e │ │ add.w r0, r8, r4 │ │ mov r1, r5 │ │ mov r2, r6 │ │ - bl d53c6 │ │ + bl d52ea │ │ adds r2, r4, r6 │ │ str.w r2, [r7, #-112] │ │ add r0, sp, #1016 @ 0x3f8 │ │ mov r1, r8 │ │ - bl 7e240 │ │ + bl 7e2a8 │ │ ldr r0, [sp, #1016] @ 0x3f8 │ │ cmp r0, #1 │ │ - bne.n 79506 │ │ + bne.n 7956e │ │ ldr r4, [sp, #288] @ 0x120 │ │ ldrd r5, sl, [sp, #1020] @ 0x3fc │ │ ldr r6, [r4, #36] @ 0x24 │ │ ldr r0, [r4, #28] │ │ cmp r6, r0 │ │ - bne.n 794d6 │ │ + bne.n 7953e │ │ add.w r0, r4, #28 │ │ - bl 7e454 │ │ + bl 7e4bc │ │ ldr r1, [r4, #32] │ │ adds r0, r6, #1 │ │ str.w r5, [r1, r6, lsl #3] │ │ add.w r1, r1, r6, lsl #3 │ │ str r0, [r4, #36] @ 0x24 │ │ str.w sl, [r1, #4] │ │ - bcs.w 7a1d0 │ │ + bcs.w 7a238 │ │ ldr r1, [r4, #32] │ │ add.w r0, r1, r0, lsl #3 │ │ ldrd r1, r2, [r0, #-8] │ │ mov r0, r9 │ │ - bl 7b10c │ │ + bl 7b174 │ │ ldr.w r0, [sp, #1504] @ 0x5e0 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.n 79530 │ │ + bne.n 79598 │ │ ldr.w r0, [r7, #-120] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r1, [r7, #-200] │ │ dmb ish │ │ ldrex r0, [r1] │ │ subs r2, r0, #1 │ │ strex r3, r2, [r1] │ │ cmp r3, #0 │ │ - bne.n 7951c │ │ + bne.n 79584 │ │ mov.w sl, #0 │ │ - b.n 79792 │ │ + b.n 797fa │ │ str r0, [sp, #160] @ 0xa0 │ │ ldr.w r0, [sp, #1508] @ 0x5e4 │ │ str r0, [sp, #156] @ 0x9c │ │ - ldr r2, [pc, #884] @ (798b0 ) │ │ + ldr r2, [pc, #884] @ (79918 ) │ │ add r2, pc │ │ ldr r0, [sp, #288] @ 0x120 │ │ movs r3, #17 │ │ add.w r1, r0, #16 │ │ mov r0, r9 │ │ str r1, [sp, #280] @ 0x118 │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #232] @ 0xe8 │ │ - ldr r2, [pc, #868] @ (798b4 ) │ │ + ldr r2, [pc, #868] @ (7991c ) │ │ cmp r0, #0 │ │ ldr r1, [sp, #232] @ 0xe8 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #232] @ 0xe8 │ │ it eq │ │ moveq r0, #1 │ │ add r2, pc │ │ str r0, [sp, #192] @ 0xc0 │ │ ldr r1, [sp, #280] @ 0x118 │ │ add.w r0, sp, #1440 @ 0x5a0 │ │ movs r3, #15 │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #228] @ 0xe4 │ │ - ldr r2, [pc, #836] @ (798b8 ) │ │ + ldr r2, [pc, #836] @ (79920 ) │ │ cmp r0, #0 │ │ ldr r1, [sp, #228] @ 0xe4 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #228] @ 0xe4 │ │ it eq │ │ moveq r0, #1 │ │ add r2, pc │ │ str r0, [sp, #188] @ 0xbc │ │ ldr r1, [sp, #280] @ 0x118 │ │ add.w r0, sp, #1440 @ 0x5a0 │ │ movs r3, #15 │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #224] @ 0xe0 │ │ - ldr r2, [pc, #808] @ (798bc ) │ │ + ldr r2, [pc, #808] @ (79924 ) │ │ cmp r0, #0 │ │ ldr r1, [sp, #224] @ 0xe0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #224] @ 0xe0 │ │ it eq │ │ moveq r0, #1 │ │ add r2, pc │ │ str r0, [sp, #184] @ 0xb8 │ │ ldr r1, [sp, #280] @ 0x118 │ │ add.w r0, sp, #1440 @ 0x5a0 │ │ movs r3, #18 │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #220] @ 0xdc │ │ - ldr r2, [pc, #776] @ (798c0 ) │ │ + ldr r2, [pc, #776] @ (79928 ) │ │ cmp r0, #0 │ │ ldr r1, [sp, #220] @ 0xdc │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #220] @ 0xdc │ │ it eq │ │ moveq r0, #1 │ │ add r2, pc │ │ str r0, [sp, #180] @ 0xb4 │ │ ldr r1, [sp, #280] @ 0x118 │ │ add.w r0, sp, #1440 @ 0x5a0 │ │ movs r3, #16 │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #216] @ 0xd8 │ │ - ldr r2, [pc, #748] @ (798c4 ) │ │ + ldr r2, [pc, #748] @ (7992c ) │ │ cmp r0, #0 │ │ ldr r1, [sp, #216] @ 0xd8 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #216] @ 0xd8 │ │ it eq │ │ moveq r0, #1 │ │ add r2, pc │ │ str r0, [sp, #176] @ 0xb0 │ │ ldr r1, [sp, #280] @ 0x118 │ │ add.w r0, sp, #1440 @ 0x5a0 │ │ movs r3, #14 │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #212] @ 0xd4 │ │ - ldr r2, [pc, #716] @ (798c8 ) │ │ + ldr r2, [pc, #716] @ (79930 ) │ │ cmp r0, #0 │ │ ldr r1, [sp, #212] @ 0xd4 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #212] @ 0xd4 │ │ it eq │ │ moveq r0, #1 │ │ add r2, pc │ │ str r0, [sp, #172] @ 0xac │ │ ldr r1, [sp, #280] @ 0x118 │ │ add.w r0, sp, #1440 @ 0x5a0 │ │ movs r3, #22 │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #208] @ 0xd0 │ │ - ldr r2, [pc, #688] @ (798cc ) │ │ + ldr r2, [pc, #688] @ (79934 ) │ │ mov sl, r0 │ │ cmp r0, #0 │ │ ldr r0, [sp, #208] @ 0xd0 │ │ it eq │ │ moveq r0, sl │ │ str r0, [sp, #208] @ 0xd0 │ │ it eq │ │ moveq.w sl, #1 │ │ add r2, pc │ │ ldr r1, [sp, #280] @ 0x118 │ │ add.w r0, sp, #1440 @ 0x5a0 │ │ movs r3, #16 │ │ - bl 7e490 │ │ - ldr r2, [pc, #656] @ (798d0 ) │ │ + bl 7e4f8 │ │ + ldr r2, [pc, #656] @ (79938 ) │ │ mov fp, r0 │ │ mov r6, r1 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r6, r0 │ │ moveq.w fp, #1 │ │ add r2, pc │ │ ldr r1, [sp, #280] @ 0x118 │ │ add.w r0, sp, #1440 @ 0x5a0 │ │ movs r3, #14 │ │ - bl 7e490 │ │ - ldr r2, [pc, #632] @ (798d4 ) │ │ + bl 7e4f8 │ │ + ldr r2, [pc, #632] @ (7993c ) │ │ mov r5, r0 │ │ mov r9, r1 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r9, r0 │ │ moveq r5, #1 │ │ add r2, pc │ │ ldr r1, [sp, #280] @ 0x118 │ │ add.w r0, sp, #1440 @ 0x5a0 │ │ movs r3, #19 │ │ - bl 7e490 │ │ - ldr r2, [pc, #608] @ (798d8 ) │ │ + bl 7e4f8 │ │ + ldr r2, [pc, #608] @ (79940 ) │ │ mov r8, r0 │ │ mov r4, r1 │ │ add r2, pc │ │ ldr r1, [sp, #280] @ 0x118 │ │ add.w r0, sp, #1440 @ 0x5a0 │ │ movs r3, #19 │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ ldr.w r3, [r7, #-200] │ │ cmp r0, #0 │ │ mov r2, r4 │ │ itt eq │ │ moveq r1, r0 │ │ moveq r0, #1 │ │ cmp.w r8, #0 │ │ @@ -122716,24 +122629,24 @@ │ │ mov ip, r6 │ │ str r4, [sp, #280] @ 0x118 │ │ ldrd r4, r6, [r3, #112] @ 0x70 │ │ ldr.w r3, [r3, #128] @ 0x80 │ │ str r6, [sp, #164] @ 0xa4 │ │ mov r6, ip │ │ str r4, [sp, #168] @ 0xa8 │ │ - cbz r3, 796dc │ │ + cbz r3, 79744 │ │ str.w lr, [sp, #152] @ 0x98 │ │ ldrex ip, [r3] │ │ add.w lr, ip, #1 │ │ strex r4, lr, [r3] │ │ cmp r4, #0 │ │ - bne.n 796c0 │ │ + bne.n 79728 │ │ ldr.w lr, [sp, #152] @ 0x98 │ │ cmp.w ip, #4294967295 @ 0xffffffff │ │ - ble.w 7a2be │ │ + ble.w 7a326 │ │ str r0, [sp, #752] @ 0x2f0 │ │ mov.w ip, #1 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ movs r4, #0 │ │ str r0, [sp, #748] @ 0x2ec │ │ ldr r0, [sp, #168] @ 0xa8 │ │ str r0, [sp, #744] @ 0x2e8 │ │ @@ -122773,86 +122686,86 @@ │ │ str r1, [sp, #756] @ 0x2f4 │ │ strd r8, r2, [sp, #736] @ 0x2e0 │ │ strd r5, r9, [sp, #728] @ 0x2d8 │ │ strd fp, r6, [sp, #720] @ 0x2d0 │ │ strd ip, r4, [sp, #680] @ 0x2a8 │ │ strd ip, r4, [sp, #656] @ 0x290 │ │ strd ip, ip, [sp, #632] @ 0x278 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 7a1da │ │ + beq.w 7a242 │ │ add r1, sp, #632 @ 0x278 │ │ movs r2, #148 @ 0x94 │ │ mov sl, r0 │ │ - bl d52ca │ │ + bl d4c3c │ │ ldr r0, [sp, #160] @ 0xa0 │ │ - cbz r0, 7976c │ │ + cbz r0, 797d4 │ │ ldr r0, [sp, #156] @ 0x9c │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr.w r0, [r7, #-120] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r7, #-116] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r9, [r7, #-200] │ │ dmb ish │ │ ldrex r0, [r9] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r9] │ │ cmp r2, #0 │ │ - bne.n 79784 │ │ + bne.n 797ec │ │ cmp r0, #1 │ │ - bne.n 797a0 │ │ + bne.n 79808 │ │ dmb ish │ │ ldr r0, [sp, #200] @ 0xc8 │ │ - bl 7e154 │ │ + bl 7e1bc │ │ add.w r9, sp, #296 @ 0x128 │ │ ldr r2, [sp, #308] @ 0x134 │ │ str.w r2, [r7, #-180] │ │ sub.w r2, r7, #192 @ 0xc0 │ │ ldmia.w r9, {r0, r1, r9} │ │ str.w sl, [r7, #-168] │ │ stmia.w r2, {r0, r1, r9} │ │ ldrb.w r0, [r9, #328] @ 0x148 │ │ ldr r1, [sp, #268] @ 0x10c │ │ cmp r0, #83 @ 0x53 │ │ str.w r1, [r7, #-172] │ │ - beq.w 79ac8 │ │ + beq.w 79b30 │ │ cmp.w sl, #0 │ │ - beq.n 797f4 │ │ + beq.n 7985c │ │ dmb ish │ │ ldrex r0, [sl] │ │ subs r1, r0, #1 │ │ strex r2, r1, [sl] │ │ cmp r2, #0 │ │ - bne.n 797d4 │ │ + bne.n 7983c │ │ cmp r0, #1 │ │ - bne.n 797f0 │ │ + bne.n 79858 │ │ dmb ish │ │ ldr r0, [sp, #196] @ 0xc4 │ │ - bl 7e154 │ │ + bl 7e1bc │ │ ldrb.w r0, [r9, #328] @ 0x148 │ │ cmp r0, #82 @ 0x52 │ │ - bne.n 79808 │ │ + bne.n 79870 │ │ ldr.w r1, [r9, #332] @ 0x14c │ │ - cbz r1, 79832 │ │ + cbz r1, 7989a │ │ ldr.w r2, [r1, #280] @ 0x118 │ │ mov.w lr, #2 │ │ - b.n 7983c │ │ + b.n 798a4 │ │ ldrb.w r6, [r9, #331] @ 0x14b │ │ ldrb.w r5, [r9, #335] @ 0x14f │ │ ldrh.w r4, [r9, #329] @ 0x149 │ │ ldrh.w r2, [r9, #333] @ 0x14d │ │ ldrb.w lr, [r9, #332] @ 0x14c │ │ ldrd ip, r1, [r9, #336] @ 0x150 │ │ strb.w r6, [sp, #1442] @ 0x5a2 │ │ strh.w r4, [sp, #1440] @ 0x5a0 │ │ strh.w r2, [r7, #-120] │ │ strb.w r5, [r7, #-118] │ │ - b.n 79840 │ │ + b.n 798a8 │ │ ldrd r1, r2, [r7, #-192] @ 0xc0 │ │ mov.w lr, #0 │ │ ldr r2, [r2, #0] │ │ add.w ip, r2, #8 │ │ ldr r3, [sp, #248] @ 0xf8 │ │ ldrb.w r2, [sp, #1442] @ 0x5a2 │ │ ldrh.w r4, [sp, #1440] @ 0x5a0 │ │ @@ -122865,81 +122778,81 @@ │ │ strb r5, [r2, #2] │ │ strb.w r0, [sp, #632] @ 0x278 │ │ strb.w lr, [sp, #636] @ 0x27c │ │ strd ip, r1, [sp, #640] @ 0x280 │ │ ldr r0, [sp, #264] @ 0x108 │ │ add r2, sp, #632 @ 0x278 │ │ ldr r1, [sp, #244] @ 0xf4 │ │ - bl 80338 │ │ + bl 803a0 │ │ add.w r4, sp, #1440 @ 0x5a0 │ │ ldr r1, [sp, #240] @ 0xf0 │ │ movs r0, #0 │ │ movs r2, #72 @ 0x48 │ │ str r0, [sp, #1016] @ 0x3f8 │ │ mov r0, r4 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add r0, sp, #632 @ 0x278 │ │ add r1, sp, #1016 @ 0x3f8 │ │ mov r2, r4 │ │ - bl 7de10 │ │ + bl 7de78 │ │ add.w r4, sp, #1096 @ 0x448 │ │ add r1, sp, #632 @ 0x278 │ │ movs r2, #136 @ 0x88 │ │ mov r0, r4 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr.w fp, [sp, #236] @ 0xec │ │ ldrb.w r0, [sp, #1216] @ 0x4c0 │ │ cmp r0, #2 │ │ - bne.w 79340 │ │ - b.w 7907c │ │ + bne.w 793a8 │ │ + b.w 790e4 │ │ nop │ │ - bl 17a8a6 │ │ - bl 1768aa │ │ - bl 1638ae │ │ - bl 1718b2 │ │ - str r3, [sp, #992] @ 0x3e0 │ │ - vshr.u64 , q4, #7 │ │ - vcge.s32 , q2, #0 │ │ - vrsra.u32 d25, d30, #7 │ │ - vcgt.s32 d31, d28, #0 │ │ - vshr.u32 d31, d14, #7 │ │ - vcgt.s32 d31, d31, #0 │ │ + bl 11290e │ │ + bl 10e912 │ │ + bl fb916 │ │ + bl 10991a │ │ + str r3, [sp, #576] @ 0x240 │ │ + vshr.u32 , q8, #7 │ │ + vshr.u32 , q6, #7 │ │ + vrshr.u64 , q3, #7 │ │ + vqrdmlsh.s q15, , d4[0] │ │ + @ instruction: 0xfff9efb6 │ │ + vqrdmlsh.s q15, , d7[0] │ │ vtbl.8 d25, {d9}, d21 │ │ cmp.w r0, r6, lsl #2 │ │ ittt cs │ │ ldrcs r0, [sp, #148] @ 0x94 │ │ subcs.w r0, r0, r6, lsl #2 │ │ cmpcs r0, #4 │ │ - bcc.w 79368 │ │ + bcc.w 793d0 │ │ ldr r1, [sp, #144] @ 0x90 │ │ lsls r0, r6, #2 │ │ ldr r0, [r1, r0] │ │ cmp r0, #0 │ │ - beq.w 79368 │ │ + beq.w 793d0 │ │ subs r0, #1 │ │ ldr r1, [sp, #140] @ 0x8c │ │ cmp r0, r1 │ │ - bcs.w 79368 │ │ + bcs.w 793d0 │ │ ldr r1, [sp, #136] @ 0x88 │ │ umull r0, r1, r0, r1 │ │ lsls r1, r1, #2 │ │ orrs.w r1, r1, r0, lsr #30 │ │ - bne.w 79368 │ │ + bne.w 793d0 │ │ ldr r1, [sp, #128] @ 0x80 │ │ lsls r0, r0, #2 │ │ cmp r1, r0 │ │ itt cs │ │ ldrcs r1, [sp, #124] @ 0x7c │ │ cmpcs r1, r0 │ │ - bcc.w 79368 │ │ + bcc.w 793d0 │ │ ldr r1, [sp, #136] @ 0x88 │ │ cmp r1, #9 │ │ - bcs.w 7a294 │ │ + bcs.w 7a2fc │ │ cmp r1, #0 │ │ - beq.w 79d48 │ │ + beq.w 79db0 │ │ ldr r1, [sp, #116] @ 0x74 │ │ movs r2, #0 │ │ movs r5, #0 │ │ movs r6, #0 │ │ add.w r8, r1, r0 │ │ ldr r1, [sp, #128] @ 0x80 │ │ sub.w sl, r1, r0 │ │ @@ -122957,123 +122870,123 @@ │ │ strd r0, r0, [sp, #188] @ 0xbc │ │ strd r0, r0, [sp, #180] @ 0xb4 │ │ str r0, [sp, #176] @ 0xb0 │ │ str r0, [sp, #280] @ 0x118 │ │ cmp.w sl, #4 │ │ it cs │ │ cmpcs.w fp, #4 │ │ - bcc.n 799d6 │ │ + bcc.n 79a3e │ │ ldrb.w r0, [lr], #1 │ │ ldr.w r1, [r8], #4 │ │ ldr.w r3, [ip], #4 │ │ tbb [pc, r0] │ │ lsrs r5, r0, #32 │ │ lsrs r3, r1, #24 │ │ adds r1, r2, #0 │ │ asrs r4, r3, #16 │ │ subs r7, r2, r0 │ │ mov r5, r3 │ │ mov r2, r1 │ │ - b.n 799c8 │ │ + b.n 79a30 │ │ str r3, [sp, #224] @ 0xe0 │ │ str r1, [sp, #232] @ 0xe8 │ │ - b.n 799c8 │ │ + b.n 79a30 │ │ str r3, [sp, #216] @ 0xd8 │ │ str r1, [sp, #228] @ 0xe4 │ │ - b.n 799c8 │ │ + b.n 79a30 │ │ str r3, [sp, #208] @ 0xd0 │ │ str r1, [sp, #220] @ 0xdc │ │ - b.n 799c8 │ │ + b.n 79a30 │ │ str r3, [sp, #188] @ 0xbc │ │ str r1, [sp, #212] @ 0xd4 │ │ - b.n 799c8 │ │ + b.n 79a30 │ │ mov r6, r3 │ │ str r1, [sp, #180] @ 0xb4 │ │ - b.n 799c8 │ │ + b.n 79a30 │ │ str r3, [sp, #184] @ 0xb8 │ │ str r1, [sp, #192] @ 0xc0 │ │ - b.n 799c8 │ │ + b.n 79a30 │ │ str r3, [sp, #280] @ 0x118 │ │ str r1, [sp, #176] @ 0xb0 │ │ ldr r0, [sp, #132] @ 0x84 │ │ sub.w fp, fp, #4 │ │ sub.w sl, sl, #4 │ │ cmp lr, r0 │ │ - bne.n 79974 │ │ + bne.n 799dc │ │ ldr r0, [sp, #120] @ 0x78 │ │ mov.w sl, #0 │ │ cmp r0, r2 │ │ - bcc.w 79368 │ │ + bcc.w 793d0 │ │ ldr r0, [sp, #120] @ 0x78 │ │ subs r0, r0, r2 │ │ cmp r0, r5 │ │ ittt cs │ │ ldrcs r0, [sp, #108] @ 0x6c │ │ ldrcs r1, [sp, #232] @ 0xe8 │ │ cmpcs r0, r1 │ │ - bcc.w 79368 │ │ + bcc.w 793d0 │ │ ldr r0, [sp, #108] @ 0x6c │ │ ldr r1, [sp, #232] @ 0xe8 │ │ subs r0, r0, r1 │ │ ldr r1, [sp, #224] @ 0xe0 │ │ cmp r0, r1 │ │ ittt cs │ │ ldrcs r0, [sp, #52] @ 0x34 │ │ ldrcs r1, [sp, #228] @ 0xe4 │ │ cmpcs r0, r1 │ │ - bcc.w 79368 │ │ + bcc.w 793d0 │ │ ldr r0, [sp, #52] @ 0x34 │ │ ldr r1, [sp, #228] @ 0xe4 │ │ subs r0, r0, r1 │ │ ldr r1, [sp, #216] @ 0xd8 │ │ cmp r0, r1 │ │ ittt cs │ │ ldrcs r0, [sp, #44] @ 0x2c │ │ ldrcs r1, [sp, #220] @ 0xdc │ │ cmpcs r0, r1 │ │ - bcc.w 79368 │ │ + bcc.w 793d0 │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldr r1, [sp, #220] @ 0xdc │ │ subs r0, r0, r1 │ │ ldr r1, [sp, #208] @ 0xd0 │ │ cmp r0, r1 │ │ ittt cs │ │ ldrcs r0, [sp, #28] │ │ ldrcs r1, [sp, #212] @ 0xd4 │ │ cmpcs r0, r1 │ │ - bcc.w 79368 │ │ + bcc.w 793d0 │ │ ldr r0, [sp, #28] │ │ ldr r1, [sp, #212] @ 0xd4 │ │ subs r0, r0, r1 │ │ ldr r1, [sp, #188] @ 0xbc │ │ cmp r0, r1 │ │ ittt cs │ │ ldrcs r0, [sp, #24] │ │ ldrcs r1, [sp, #192] @ 0xc0 │ │ cmpcs r0, r1 │ │ - bcc.w 79368 │ │ + bcc.w 793d0 │ │ ldr r0, [sp, #24] │ │ ldr r1, [sp, #192] @ 0xc0 │ │ subs r0, r0, r1 │ │ ldr r1, [sp, #184] @ 0xb8 │ │ cmp r0, r1 │ │ - bcc.w 79368 │ │ + bcc.w 793d0 │ │ ldr r0, [sp, #20] │ │ ldr r1, [sp, #180] @ 0xb4 │ │ subs r0, r0, r1 │ │ it cs │ │ cmpcs r0, r6 │ │ - bcc.w 79368 │ │ + bcc.w 793d0 │ │ ldr r0, [sp, #16] │ │ ldr r1, [sp, #176] @ 0xb0 │ │ subs r0, r0, r1 │ │ itt cs │ │ ldrcs r1, [sp, #280] @ 0x118 │ │ cmpcs r0, r1 │ │ - bcc.w 79368 │ │ + bcc.w 793d0 │ │ ldr r0, [sp, #92] @ 0x5c │ │ ldr r1, [sp, #232] @ 0xe8 │ │ add.w r8, r0, r2 │ │ ldr r0, [sp, #88] @ 0x58 │ │ strd r6, r5, [sp, #168] @ 0xa8 │ │ add.w fp, r0, r1 │ │ ldr r0, [sp, #84] @ 0x54 │ │ @@ -123101,52 +123014,52 @@ │ │ add r0, r1 │ │ str r0, [sp, #220] @ 0xdc │ │ ldr r0, [sp, #60] @ 0x3c │ │ ldr r1, [sp, #180] @ 0xb4 │ │ add r0, r1 │ │ ldrd r1, r6, [sp, #184] @ 0xb8 │ │ str r0, [sp, #192] @ 0xc0 │ │ - b.n 79d76 │ │ + b.n 79dde │ │ cmp.w sl, #0 │ │ - beq.n 79b2e │ │ + beq.n 79b96 │ │ str.w sl, [r7, #-164] │ │ sub.w r3, r7, #160 @ 0xa0 │ │ ldrd r0, r1, [sl, #32] │ │ movs r2, #0 │ │ ldr.w r4, [r7, #-180] │ │ stmia r3!, {r0, r1, r2} │ │ add r0, sp, #632 @ 0x278 │ │ sub.w r1, r7, #160 @ 0xa0 │ │ - bl 7e724 │ │ + bl 7e78c │ │ ldr r0, [sp, #632] @ 0x278 │ │ cmp r0, #3 │ │ - bne.n 79b36 │ │ + bne.n 79b9e │ │ ldr r1, [sp, #56] @ 0x38 │ │ ldrd fp, r5, [sp, #648] @ 0x288 │ │ ldrb.w r4, [sp, #640] @ 0x280 │ │ ldr.w r8, [sp, #644] @ 0x284 │ │ ldrh r0, [r1, #0] │ │ ldrb r1, [r1, #2] │ │ strh.w r0, [r7, #-148] │ │ strb.w r1, [r7, #-146] │ │ strh.w r0, [sp, #1440] @ 0x5a0 │ │ strb.w r1, [sp, #1442] @ 0x5a2 │ │ - b.n 79c0c │ │ + b.n 79c74 │ │ movs r0, #1 │ │ mov r1, r4 │ │ str r0, [sp, #0] │ │ sub.w r0, r7, #120 @ 0x78 │ │ mov r2, r6 │ │ movs r3, #1 │ │ - bl 77788 │ │ + bl 777f0 │ │ ldrd r8, r4, [r7, #-116] @ 0x74 │ │ - b.n 794a0 │ │ + b.n 79508 │ │ movs r4, #82 @ 0x52 │ │ mov.w r8, #0 │ │ - b.n 79c2e │ │ + b.n 79c96 │ │ ldr r1, [sp, #56] @ 0x38 │ │ cmp r0, #2 │ │ ldr r3, [sp, #652] @ 0x28c │ │ str r3, [sp, #280] @ 0x118 │ │ ldrh r2, [r1, #0] │ │ ldrb r1, [r1, #2] │ │ ldrb.w r3, [sp, #640] @ 0x280 │ │ @@ -123158,27 +123071,27 @@ │ │ sub.w r2, r7, #144 @ 0x90 │ │ str r4, [sp, #224] @ 0xe0 │ │ str r3, [sp, #232] @ 0xe8 │ │ ldr r5, [sp, #648] @ 0x288 │ │ ldr r6, [sp, #636] @ 0x27c │ │ ldmia.w r1, {r3, r4, r8, fp, ip, lr} │ │ stmia.w r2, {r3, r4, r8, fp, ip, lr} │ │ - bne.n 79b8a │ │ + bne.n 79bf2 │ │ movs r4, #82 @ 0x52 │ │ mov.w r8, #0 │ │ - b.n 79c0c │ │ + b.n 79c74 │ │ movs r0, #1 │ │ mov r1, r4 │ │ str r0, [sp, #0] │ │ sub.w r0, r7, #120 @ 0x78 │ │ movs r2, #1 │ │ movs r3, #1 │ │ - bl 77788 │ │ + bl 777f0 │ │ ldrd r8, r4, [r7, #-116] @ 0x74 │ │ - b.n 79488 │ │ + b.n 794f0 │ │ ldr r3, [sp, #36] @ 0x24 │ │ ldrb.w r1, [r7, #-146] │ │ strd r0, r6, [r7, #-120] @ 0x78 │ │ strb r1, [r3, #2] │ │ ldr r1, [sp, #228] @ 0xe4 │ │ ldr r0, [sp, #232] @ 0xe8 │ │ ldrh.w r2, [r7, #-148] │ │ @@ -123191,64 +123104,64 @@ │ │ str.w r0, [r7, #-100] │ │ ldr.w ip, [sp, #40] @ 0x28 │ │ ldmia.w r1, {r0, r2, r3, r4, r5, r6} │ │ stmia.w ip, {r0, r2, r3, r4, r5, r6} │ │ add.w r1, sl, #8 │ │ add r0, sp, #632 @ 0x278 │ │ sub.w r2, r7, #120 @ 0x78 │ │ - bl 7ead0 │ │ + bl 7eb38 │ │ ldr r1, [sp, #56] @ 0x38 │ │ ldrd r6, r3, [sp, #632] @ 0x278 │ │ ldrd r8, fp, [sp, #644] @ 0x284 │ │ ldrb.w r4, [sp, #640] @ 0x280 │ │ ldrh r0, [r1, #0] │ │ ldrb r1, [r1, #2] │ │ ldr r2, [sp, #652] @ 0x28c │ │ strh.w r0, [r7, #-68] │ │ eor.w r0, r6, #2 │ │ orrs r0, r3 │ │ str r2, [sp, #280] @ 0x118 │ │ strb.w r1, [r7, #-66] │ │ str r6, [sp, #228] @ 0xe4 │ │ str r3, [sp, #232] @ 0xe8 │ │ - bne.n 79c5c │ │ + bne.n 79cc4 │ │ ldrh.w r0, [r7, #-68] │ │ ldrb.w r1, [r7, #-66] │ │ strh.w r0, [sp, #1440] @ 0x5a0 │ │ strb.w r1, [sp, #1442] @ 0x5a2 │ │ ldr r5, [sp, #280] @ 0x118 │ │ dmb ish │ │ ldrex r0, [sl] │ │ subs r1, r0, #1 │ │ strex r2, r1, [sl] │ │ cmp r2, #0 │ │ - bne.n 79c10 │ │ + bne.n 79c78 │ │ cmp r0, #1 │ │ - bne.n 79c2e │ │ + bne.n 79c96 │ │ dmb ish │ │ sub.w r0, r7, #164 @ 0xa4 │ │ - bl 7e154 │ │ + bl 7e1bc │ │ ldrb.w r0, [r9, #328] @ 0x148 │ │ cmp r0, #83 @ 0x53 │ │ - bne.n 79c54 │ │ + bne.n 79cbc │ │ ldrb.w r0, [sp, #1442] @ 0x5a2 │ │ ldrh.w r1, [sp, #1440] @ 0x5a0 │ │ strb.w r4, [r9, #328] @ 0x148 │ │ strh.w r1, [r9, #329] @ 0x149 │ │ strb.w r0, [r9, #331] @ 0x14b │ │ strd r8, fp, [r9, #332] @ 0x14c │ │ str.w r5, [r9, #340] @ 0x154 │ │ - b.n 797f0 │ │ + b.n 79858 │ │ cmp r4, #83 @ 0x53 │ │ - beq.w 797f0 │ │ - b.n 7a27c │ │ + beq.w 79858 │ │ + b.n 7a2e4 │ │ ldr r1, [sp, #48] @ 0x30 │ │ add.w r0, sp, #1440 @ 0x5a0 │ │ movs r2, #194 @ 0xc2 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr r1, [sp, #32] │ │ sub.w r0, r7, #64 @ 0x40 │ │ ldrh.w ip, [sp, #850] @ 0x352 │ │ ldmia r1!, {r2, r3, r6} │ │ cmp.w ip, #4 │ │ stmia r0!, {r2, r3, r6} │ │ ldmia.w r1, {r2, r3, r5, r6} │ │ @@ -123291,15 +123204,15 @@ │ │ ldr r0, [sp, #48] @ 0x30 │ │ strh r1, [r2, #0] │ │ add.w r1, sp, #1440 @ 0x5a0 │ │ movs r2, #194 @ 0xc2 │ │ strb.w r4, [sp, #640] @ 0x280 │ │ str.w sl, [sp, #912] @ 0x390 │ │ str.w r8, [sp, #644] @ 0x284 │ │ - bl d4c50 │ │ + bl d50a2 │ │ sub.w r1, r7, #64 @ 0x40 │ │ strh.w r5, [sp, #850] @ 0x352 │ │ ldr r0, [sp, #32] │ │ ldmia r1!, {r2, r3, r6} │ │ stmia r0!, {r2, r3, r6} │ │ ldmia.w r1, {r2, r3, r5, r6} │ │ stmia r0!, {r2, r3, r5, r6} │ │ @@ -123316,23 +123229,23 @@ │ │ ldr r0, [sp, #220] @ 0xdc │ │ str r0, [sp, #904] @ 0x388 │ │ ldr r0, [sp, #216] @ 0xd8 │ │ str r0, [sp, #900] @ 0x384 │ │ ldr r0, [sp, #188] @ 0xbc │ │ str r0, [sp, #896] @ 0x380 │ │ mov.w r0, #288 @ 0x120 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 7a2aa │ │ + beq.w 7a312 │ │ add r1, sp, #632 @ 0x278 │ │ mov.w r2, #288 @ 0x120 │ │ mov r8, r0 │ │ - bl d4c50 │ │ + bl d50a2 │ │ movs r4, #82 @ 0x52 │ │ - b.n 79b34 │ │ + b.n 79b9c │ │ ldr r0, [sp, #104] @ 0x68 │ │ movs r4, #0 │ │ str r0, [sp, #220] @ 0xdc │ │ movs r1, #0 │ │ ldr r0, [sp, #60] @ 0x3c │ │ movs r6, #0 │ │ str r0, [sp, #192] @ 0xc0 │ │ @@ -123354,26 +123267,26 @@ │ │ str r4, [sp, #280] @ 0x118 │ │ ldrd r0, r4, [r9, #16] │ │ ldr.w ip, [r9, #128] @ 0x80 │ │ str r0, [sp, #224] @ 0xe0 │ │ ldrd r0, sl, [r9, #112] @ 0x70 │ │ cmp.w ip, #0 │ │ str r4, [sp, #216] @ 0xd8 │ │ - beq.n 79db2 │ │ + beq.n 79e1a │ │ str.w fp, [sp, #208] @ 0xd0 │ │ mov fp, r8 │ │ ldrex lr, [ip] │ │ add.w r8, lr, #1 │ │ strex r4, r8, [ip] │ │ cmp r4, #0 │ │ - bne.n 79d94 │ │ + bne.n 79dfc │ │ mov r8, fp │ │ ldr.w fp, [sp, #208] @ 0xd0 │ │ cmp.w lr, #4294967295 @ 0xffffffff │ │ - ble.w 7a2be │ │ + ble.w 7a326 │ │ strd r6, r0, [sp, #740] @ 0x2e4 │ │ movs r4, #0 │ │ ldr r0, [sp, #212] @ 0xd4 │ │ mov.w lr, #1 │ │ str r4, [sp, #772] @ 0x304 │ │ strd ip, r4, [sp, #760] @ 0x2f8 │ │ strd r2, r0, [sp, #732] @ 0x2dc │ │ @@ -123408,30 +123321,30 @@ │ │ ldr r4, [sp, #192] @ 0xc0 │ │ strd r8, r0, [sp, #640] @ 0x280 │ │ movs r0, #148 @ 0x94 │ │ strb.w lr, [sp, #776] @ 0x308 │ │ strd sl, r4, [sp, #748] @ 0x2ec │ │ str r1, [sp, #700] @ 0x2bc │ │ strd lr, lr, [sp, #632] @ 0x278 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 7a2b6 │ │ + beq.w 7a31e │ │ add r1, sp, #632 @ 0x278 │ │ movs r2, #148 @ 0x94 │ │ mov sl, r0 │ │ - bl d52ca │ │ - b.n 79780 │ │ + bl d4c3c │ │ + b.n 797e8 │ │ movs r4, #0 │ │ - b.n 7a0f2 │ │ + b.n 7a15a │ │ ldr r0, [sp, #244] @ 0xf4 │ │ ldr r1, [sp, #236] @ 0xec │ │ str.w ip, [sp, #276] @ 0x114 │ │ cmp r1, r0 │ │ strd r4, r8, [sp, #280] @ 0x118 │ │ - beq.n 79ea0 │ │ + beq.n 79f08 │ │ ldr.w r4, [r0, #-4]! │ │ str.w r9, [sp, #264] @ 0x108 │ │ ldrd r6, r9, [r4, #28] │ │ cmp.w r9, #0 │ │ str r0, [sp, #244] @ 0xf4 │ │ mov r1, r9 │ │ ldr r0, [r4, #0] │ │ @@ -123446,64 +123359,64 @@ │ │ str r1, [sp, #292] @ 0x124 │ │ lsls r0, r0, #31 │ │ itttt ne │ │ ldrne r0, [sp, #224] @ 0xe0 │ │ ldrdne r0, r1, [r0] │ │ eorne.w r0, r0, #47 @ 0x2f │ │ orrsne.w r0, r0, r1 │ │ - bne.n 79eae │ │ + bne.n 79f16 │ │ mov.w r8, #0 │ │ ldr r0, [r4, #16] │ │ ldr r3, [sp, #272] @ 0x110 │ │ - cbz r0, 79ee8 │ │ + cbz r0, 79f50 │ │ ldr r1, [sp, #248] @ 0xf8 │ │ ldrd r5, r6, [sp, #264] @ 0x108 │ │ ldrh.w fp, [r1, #344] @ 0x158 │ │ ldr r1, [r4, #20] │ │ - b.n 79f20 │ │ + b.n 79f88 │ │ ldr r1, [sp, #228] @ 0xe4 │ │ ldr r0, [r1, #20] │ │ - cbz r0, 79ef2 │ │ + cbz r0, 79f5a │ │ ldrh.w fp, [r5, #344] @ 0x158 │ │ ldr r1, [r1, #24] │ │ - b.n 79ef6 │ │ + b.n 79f5e │ │ ldr r0, [r3, #0] │ │ ldr r6, [r4, #8] │ │ cmp r0, #2 │ │ - beq.w 7a252 │ │ + beq.w 7a2ba │ │ lsls r0, r0, #31 │ │ ldr r0, [sp, #220] @ 0xdc │ │ - beq.n 79ecc │ │ + beq.n 79f34 │ │ ldrb.w r0, [r5, #288] @ 0x120 │ │ cmp r0, #82 @ 0x52 │ │ - bne.w 7a13e │ │ + bne.w 7a1a6 │ │ ldr.w r0, [r5, #292] @ 0x124 │ │ ldr r1, [r0, #4] │ │ cmp r1, r6 │ │ - bls.n 79e88 │ │ + bls.n 79ef0 │ │ ldr r0, [r0, #0] │ │ add.w r1, r6, r6, lsl #1 │ │ add.w r0, r0, r1, lsl #2 │ │ ldrd r8, sl, [r0, #4] │ │ ldr r0, [r4, #16] │ │ ldr r3, [sp, #272] @ 0x110 │ │ cmp r0, #0 │ │ - bne.n 79e92 │ │ + bne.n 79efa │ │ mov r4, fp │ │ ldrd ip, r2, [sp, #264] @ 0x108 │ │ mov fp, r3 │ │ - b.n 79f2e │ │ + b.n 79f96 │ │ mov.w fp, #2 │ │ ldr r2, [sp, #240] @ 0xf0 │ │ str.w ip, [sp, #260] @ 0x104 │ │ - cbz r2, 79f0c │ │ + cbz r2, 79f74 │ │ mov r4, r0 │ │ ldr r0, [sp, #232] @ 0xe8 │ │ mov r5, r1 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r1, r5 │ │ mov r0, r4 │ │ ldr r6, [sp, #268] @ 0x10c │ │ movs r2, #3 │ │ ldr r3, [sp, #272] @ 0x110 │ │ mov sl, r9 │ │ str r2, [sp, #292] @ 0x124 │ │ @@ -123513,85 +123426,85 @@ │ │ mov r9, r3 │ │ str r2, [sp, #288] @ 0x120 │ │ ldr r4, [sp, #252] @ 0xfc │ │ cmp.w fp, #2 │ │ mov ip, r5 │ │ mov r2, r6 │ │ mov fp, r3 │ │ - bne.n 79f3c │ │ + bne.n 79fa4 │ │ mov r0, r4 │ │ movs r1, #0 │ │ mov r5, ip │ │ mov r6, r2 │ │ - bl 81ee0 │ │ + bl 81f48 │ │ mov r3, fp │ │ strd r0, r1, [sp, #660] @ 0x294 │ │ ldr r0, [sp, #280] @ 0x118 │ │ str r0, [sp, #632] @ 0x278 │ │ ldr r0, [sp, #276] @ 0x114 │ │ ldr r2, [sp, #284] @ 0x11c │ │ str r2, [sp, #636] @ 0x27c │ │ strd r5, r4, [sp, #652] @ 0x28c │ │ strd r3, r6, [sp, #644] @ 0x284 │ │ str r0, [sp, #640] @ 0x280 │ │ ldr r0, [sp, #256] @ 0x100 │ │ add r1, sp, #632 @ 0x278 │ │ - bl 91f40 │ │ + bl 91fac │ │ mov fp, r4 │ │ ldrd r4, r5, [sp, #288] @ 0x120 │ │ - b.n 79fba │ │ + b.n 7a022 │ │ movs r0, #2 │ │ str r4, [sp, #292] @ 0x124 │ │ str r0, [sp, #280] @ 0x118 │ │ movs r0, #3 │ │ str r0, [sp, #272] @ 0x110 │ │ mov r6, sl │ │ ldr r0, [sp, #260] @ 0x104 │ │ mov r4, r8 │ │ ldr r5, [sp, #248] @ 0xf8 │ │ str.w r9, [sp, #276] @ 0x114 │ │ strd sl, r8, [sp, #264] @ 0x108 │ │ strd r9, r0, [sp, #284] @ 0x11c │ │ mov r0, fp │ │ movs r1, #0 │ │ - bl 81ee0 │ │ + bl 81f48 │ │ mov sl, r5 │ │ mov r8, r6 │ │ mov r9, r4 │ │ strd r0, r1, [sp, #660] @ 0x294 │ │ ldr r0, [sp, #292] @ 0x124 │ │ str r0, [sp, #632] @ 0x278 │ │ ldr r0, [sp, #284] @ 0x11c │ │ ldr r2, [sp, #288] @ 0x120 │ │ str r2, [sp, #636] @ 0x27c │ │ strd sl, fp, [sp, #652] @ 0x28c │ │ strd r9, r8, [sp, #644] @ 0x284 │ │ str r0, [sp, #640] @ 0x280 │ │ ldr r0, [sp, #256] @ 0x100 │ │ add r1, sp, #632 @ 0x278 │ │ - bl 91f40 │ │ + bl 91fac │ │ ldrd sl, r8, [sp, #264] @ 0x108 │ │ ldr r4, [sp, #280] @ 0x118 │ │ ldrd r5, r9, [sp, #272] @ 0x110 │ │ subs r0, r5, #3 │ │ cmp r5, #2 │ │ mov r1, r0 │ │ it ls │ │ movls r1, #2 │ │ cmp r1, #1 │ │ - beq.n 7a030 │ │ + beq.n 7a098 │ │ cmp r1, #2 │ │ - bne.w 7a0f0 │ │ + bne.w 7a158 │ │ ldr r0, [sp, #260] @ 0x104 │ │ str r0, [sp, #284] @ 0x11c │ │ ldr r0, [sp, #244] @ 0xf4 │ │ ldr r1, [sp, #236] @ 0xec │ │ strd r4, r5, [sp, #288] @ 0x120 │ │ cmp r1, r0 │ │ - beq.n 7a042 │ │ + beq.n 7a0aa │ │ ldr.w fp, [r0, #-4]! │ │ str r0, [sp, #244] @ 0xf4 │ │ ldrd r6, r1, [fp, #28] │ │ cmp r1, #0 │ │ ldr.w r0, [fp] │ │ str r1, [sp, #276] @ 0x114 │ │ it ne │ │ @@ -123603,1082 +123516,1082 @@ │ │ movne r6, #1 │ │ lsls r0, r0, #31 │ │ itttt ne │ │ ldrne r0, [sp, #224] @ 0xe0 │ │ ldrdne r0, r1, [r0] │ │ eorne.w r0, r0, #47 @ 0x2f │ │ orrsne.w r0, r0, r1 │ │ - bne.n 7a082 │ │ + bne.n 7a0ea │ │ movs r1, #0 │ │ ldr.w r0, [fp, #16] │ │ strd r1, r6, [sp, #268] @ 0x10c │ │ cmp r0, #0 │ │ - beq.n 7a0c4 │ │ + beq.n 7a12c │ │ ldr r1, [sp, #248] @ 0xf8 │ │ ldrh.w r5, [r1, #344] @ 0x158 │ │ ldr.w r1, [fp, #20] │ │ ldr.w fp, [sp, #252] @ 0xfc │ │ - b.n 7a074 │ │ + b.n 7a0dc │ │ cmp r0, #2 │ │ - bcc.n 79f64 │ │ + bcc.n 79fcc │ │ ldr r0, [sp, #240] @ 0xf0 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #232] @ 0xe8 │ │ - blxne d87c0 │ │ - b.n 79f64 │ │ + blxne d87d0 │ │ + b.n 79fcc │ │ ldr r1, [sp, #228] @ 0xe4 │ │ ldr r0, [r1, #20] │ │ cmp r0, #0 │ │ - beq.n 7a0d0 │ │ + beq.n 7a138 │ │ ldr r2, [sp, #248] @ 0xf8 │ │ ldr r1, [r1, #24] │ │ ldrh.w r5, [r2, #344] @ 0x158 │ │ ldr r2, [sp, #240] @ 0xf0 │ │ - cbz r2, 7a068 │ │ + cbz r2, 7a0d0 │ │ mov fp, r0 │ │ ldr r0, [sp, #232] @ 0xe8 │ │ mov r6, r1 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, fp │ │ mov r1, r6 │ │ ldr.w fp, [sp, #252] @ 0xfc │ │ movs r2, #3 │ │ strd sl, r8, [sp, #264] @ 0x108 │ │ strd r2, r9, [sp, #272] @ 0x110 │ │ str r4, [sp, #280] @ 0x118 │ │ cmp r5, #2 │ │ mov r5, sl │ │ mov r6, r8 │ │ mov r4, r9 │ │ - beq.w 79f82 │ │ - b.n 79f90 │ │ + beq.w 79fea │ │ + b.n 79ff8 │ │ ldr r0, [sp, #216] @ 0xd8 │ │ ldr.w r4, [fp, #8] │ │ ldr r0, [r0, #0] │ │ cmp r0, #2 │ │ - beq.n 7a0da │ │ + beq.n 7a142 │ │ lsls r0, r0, #31 │ │ ldr r0, [sp, #220] @ 0xdc │ │ - beq.n 7a0a2 │ │ + beq.n 7a10a │ │ ldr r1, [sp, #248] @ 0xf8 │ │ ldrb.w r0, [r1, #288] @ 0x120 │ │ cmp r0, #82 @ 0x52 │ │ - bne.n 7a128 │ │ + bne.n 7a190 │ │ ldr.w r0, [r1, #292] @ 0x124 │ │ ldr r1, [r0, #4] │ │ cmp r1, r4 │ │ - bls.n 7a012 │ │ + bls.n 7a07a │ │ ldr r0, [r0, #0] │ │ add.w r1, r4, r4, lsl #1 │ │ add.w r0, r0, r1, lsl #2 │ │ ldrd r1, r0, [r0, #4] │ │ str r0, [sp, #264] @ 0x108 │ │ ldr.w r0, [fp, #16] │ │ strd r1, r6, [sp, #268] @ 0x10c │ │ cmp r0, #0 │ │ - bne.n 7a020 │ │ + bne.n 7a088 │ │ mov r5, sl │ │ mov r6, r8 │ │ mov r4, r9 │ │ ldr.w fp, [sp, #252] @ 0xfc │ │ - b.n 79f82 │ │ + b.n 79fea │ │ movs r5, #2 │ │ ldr r2, [sp, #240] @ 0xf0 │ │ cmp r2, #0 │ │ - bne.n 7a056 │ │ - b.n 7a068 │ │ + bne.n 7a0be │ │ + b.n 7a0d0 │ │ ldrd r1, r0, [sp, #212] @ 0xd4 │ │ ldr r2, [sp, #248] @ 0xf8 │ │ ldr r3, [sp, #224] @ 0xe0 │ │ - bl 8068c │ │ + bl 806f4 │ │ ldr r0, [r0, #0] │ │ lsls r0, r0, #31 │ │ ldr r0, [sp, #220] @ 0xdc │ │ - bne.n 7a094 │ │ - b.n 7a0a2 │ │ + bne.n 7a0fc │ │ + b.n 7a10a │ │ movs r4, #1 │ │ cmp r0, #2 │ │ - bcc.n 7a102 │ │ + bcc.n 7a16a │ │ ldr r0, [sp, #240] @ 0xf0 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #232] @ 0xe8 │ │ - blxne d87c0 │ │ - cbnz r4, 7a11e │ │ + blxne d87d0 │ │ + cbnz r4, 7a186 │ │ mov r0, fp │ │ movs r1, #0 │ │ - bl 81ee0 │ │ - cbz r0, 7a11e │ │ + bl 81f48 │ │ + cbz r0, 7a186 │ │ str r0, [sp, #636] @ 0x27c │ │ movs r0, #3 │ │ str r0, [sp, #632] @ 0x278 │ │ ldr r0, [sp, #256] @ 0x100 │ │ str r1, [sp, #640] @ 0x280 │ │ add r1, sp, #632 @ 0x278 │ │ - bl 91f40 │ │ + bl 91fac │ │ addw sp, sp, #1980 @ 0x7bc │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r4, #1 │ │ ldr.w fp, [sp, #252] @ 0xfc │ │ - b.n 7a0f6 │ │ + b.n 7a15e │ │ movs r0, #4 │ │ str.w r6, [sp, #1444] @ 0x5a4 │ │ strb.w r0, [sp, #1440] @ 0x5a0 │ │ - b.w 783d8 │ │ + b.w 78440 │ │ movs r4, #0 │ │ - b.n 7a0f6 │ │ - ldr r3, [pc, #880] @ (7a4b4 ) │ │ + b.n 7a15e │ │ + ldr r3, [pc, #880] @ (7a51c ) │ │ mov r1, r2 │ │ movs r0, #0 │ │ movs r2, #4 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ add r6, sp, #632 @ 0x278 │ │ add r4, sp, #296 @ 0x128 │ │ str r0, [sp, #284] @ 0x11c │ │ add.w r0, r4, #32 │ │ mov r1, r6 │ │ mov.w r2, #256 @ 0x100 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add.w ip, r6, #260 @ 0x104 │ │ add.w r1, r4, #292 @ 0x124 │ │ mov r0, r4 │ │ mov fp, r5 │ │ ldmia.w ip!, {r2, r3, r4, r5, r6} │ │ stmia r1!, {r2, r3, r4, r5, r6} │ │ ldmia.w ip, {r2, r3, r4, r5, r6, lr} │ │ add.w ip, r0, #8 │ │ stmia.w r1, {r2, r3, r4, r5, r6, lr} │ │ ldr r0, [sp, #276] @ 0x114 │ │ ldmia.w r0, {r1, r2, r3, r4, r5, r6} │ │ mov r0, fp │ │ stmia.w ip, {r1, r2, r3, r4, r5, r6} │ │ - blx d89a0 │ │ + blx d89b0 │ │ ldr r0, [sp, #284] @ 0x11c │ │ str r0, [sp, #584] @ 0x248 │ │ ldr r0, [sp, #292] @ 0x124 │ │ str r0, [sp, #300] @ 0x12c │ │ ldr r0, [sp, #280] @ 0x118 │ │ str r0, [sp, #296] @ 0x128 │ │ ldr r0, [sp, #584] @ 0x248 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.w 78f4e │ │ - b.n 7a11e │ │ + bne.w 78fb6 │ │ + b.n 7a186 │ │ movw r0, #9729 @ 0x2601 │ │ mov r6, r4 │ │ strh.w r0, [sp, #1440] @ 0x5a0 │ │ - b.w 783ea │ │ - ldr r3, [pc, #868] @ (7a520 ) │ │ + b.w 78452 │ │ + ldr r3, [pc, #868] @ (7a588 ) │ │ movs r0, #0 │ │ mov r1, r8 │ │ movs r2, #4 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #860] @ (7a524 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #860] @ (7a58c ) │ │ mov r2, r1 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #820] @ (7a508 ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #820] @ (7a570 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - b.n 7a2be │ │ + bl 3fd40 │ │ + b.n 7a326 │ │ movs r0, #4 │ │ movs r1, #148 @ 0x94 │ │ - bl 3de2a │ │ - b.n 7a2be │ │ + bl 3e132 │ │ + b.n 7a326 │ │ mov r5, r0 │ │ - ldr r3, [pc, #792] @ (7a500 ) │ │ + ldr r3, [pc, #792] @ (7a568 ) │ │ add r3, pc │ │ movs r0, #0 │ │ mov r1, r5 │ │ movs r2, #32 │ │ - bl 3f9a8 │ │ - b.n 7a2be │ │ + bl 3fcb0 │ │ + b.n 7a326 │ │ movs r0, #1 │ │ movs r1, #0 │ │ str r0, [sp, #0] │ │ add r0, sp, #296 @ 0x128 │ │ mov r2, r5 │ │ movs r3, #1 │ │ str.w r8, [sp, #268] @ 0x10c │ │ - bl 77788 │ │ + bl 777f0 │ │ ldrd r1, r4, [sp, #300] @ 0x12c │ │ mov r2, r5 │ │ str r1, [sp, #292] @ 0x124 │ │ adds r0, r1, r4 │ │ add r1, sp, #632 @ 0x278 │ │ - bl d53c6 │ │ + bl d52ea │ │ adds r6, r4, r5 │ │ str r6, [sp, #304] @ 0x130 │ │ ldr.w r8, [sp, #296] @ 0x128 │ │ - b.w 78234 │ │ - ldr r0, [pc, #748] @ (7a514 ) │ │ + b.w 7829c │ │ + ldr r0, [pc, #748] @ (7a57c ) │ │ movs r1, #19 │ │ - ldr r2, [pc, #748] @ (7a518 ) │ │ + ldr r2, [pc, #748] @ (7a580 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ add.w r0, sp, #1096 @ 0x448 │ │ add r3, sp, #1016 @ 0x3f8 │ │ mov r1, fp │ │ mov r2, r5 │ │ - bl 7b090 │ │ + bl 7b0f8 │ │ ldr r6, [sp, #284] @ 0x11c │ │ ldrb.w r0, [sp, #1096] @ 0x448 │ │ cmp r0, #4 │ │ - beq.w 78e56 │ │ - b.w 78e2a │ │ + beq.w 78ebe │ │ + b.w 78e92 │ │ mov sl, r3 │ │ mov r0, r3 │ │ ldr r3, [sp, #224] @ 0xe0 │ │ mov r1, r2 │ │ mov r2, r5 │ │ - bl 8068c │ │ + bl 806f4 │ │ ldr.w r0, [sl] │ │ ldrd r5, fp, [sp, #248] @ 0xf8 │ │ lsls r0, r0, #31 │ │ ldr r0, [sp, #220] @ 0xdc │ │ - bne.w 79ebe │ │ - b.n 79ecc │ │ - ldr r2, [pc, #680] @ (7a51c ) │ │ + bne.w 79f26 │ │ + b.n 79f34 │ │ + ldr r2, [pc, #680] @ (7a584 ) │ │ mov r0, r8 │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ mov r0, r4 │ │ mov r1, r8 │ │ - bl 8025a │ │ - ldr r0, [pc, #644] @ (7a50c ) │ │ - ldr r2, [pc, #648] @ (7a510 ) │ │ + bl 802c2 │ │ + ldr r0, [pc, #644] @ (7a574 ) │ │ + ldr r2, [pc, #648] @ (7a578 ) │ │ add r0, pc │ │ add r2, pc │ │ movs r1, #29 │ │ - bl 3fa58 │ │ - b.n 7a2be │ │ - ldr r3, [pc, #620] @ (7a504 ) │ │ + bl 3fd60 │ │ + b.n 7a326 │ │ + ldr r3, [pc, #620] @ (7a56c ) │ │ add r3, pc │ │ movs r0, #0 │ │ movs r2, #8 │ │ - bl 3f9a8 │ │ - b.n 7a2be │ │ - ldr r2, [pc, #644] @ (7a528 ) │ │ + bl 3fcb0 │ │ + b.n 7a326 │ │ + ldr r2, [pc, #644] @ (7a590 ) │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ movs r0, #8 │ │ mov.w r1, #288 @ 0x120 │ │ - bl 3de2a │ │ - b.n 7a2be │ │ + bl 3e132 │ │ + b.n 7a326 │ │ movs r0, #4 │ │ movs r1, #148 @ 0x94 │ │ - bl 3de2a │ │ + bl 3e132 │ │ udf #254 @ 0xfe │ │ mov r9, r0 │ │ - b.n 7a424 │ │ + b.n 7a48c │ │ mov r9, r0 │ │ dmb ish │ │ ldrex r0, [sl] │ │ subs r1, r0, #1 │ │ strex r2, r1, [sl] │ │ cmp r2, #0 │ │ - bne.n 7a2ca │ │ + bne.n 7a332 │ │ cmp r0, #1 │ │ - bne.w 7a482 │ │ + bne.w 7a4ea │ │ dmb ish │ │ sub.w r0, r7, #164 @ 0xa4 │ │ - bl 7e154 │ │ - b.n 7a482 │ │ - bl 416fe │ │ - b.n 7a4b8 │ │ + bl 7e1bc │ │ + b.n 7a4ea │ │ + bl 41a06 │ │ + b.n 7a520 │ │ mov r9, r0 │ │ - b.n 7a424 │ │ + b.n 7a48c │ │ mov r9, r0 │ │ sub.w r0, r7, #120 @ 0x78 │ │ - bl 7b660 │ │ + bl 7b6c8 │ │ ldr r0, [sp, #280] @ 0x118 │ │ ldr r1, [sp, #292] @ 0x124 │ │ - blx d89d0 │ │ + blx d89e0 │ │ mov r0, r5 │ │ - blx d89a0 │ │ + blx d89b0 │ │ mov r0, r9 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ mov r9, r0 │ │ ldr r0, [r4, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #292] @ 0x124 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r9 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ mov r9, r0 │ │ ldr r0, [sp, #284] @ 0x11c │ │ cmp r0, #0 │ │ - beq.w 7a4ba │ │ + beq.w 7a522 │ │ ldr r0, [sp, #276] @ 0x114 │ │ - blx d87c0 │ │ - b.n 7a4ba │ │ + blx d87d0 │ │ + b.n 7a522 │ │ mov r9, r0 │ │ add r0, sp, #632 @ 0x278 │ │ - bl 7e1f4 │ │ - b.n 7a45e │ │ - bl 416fe │ │ + bl 7e25c │ │ + b.n 7a4c6 │ │ + bl 41a06 │ │ mov r9, r0 │ │ dmb ish │ │ ldrex r0, [sl] │ │ subs r1, r0, #1 │ │ strex r2, r1, [sl] │ │ cmp r2, #0 │ │ - bne.n 7a354 │ │ + bne.n 7a3bc │ │ cmp r0, #1 │ │ - bne.n 7a370 │ │ + bne.n 7a3d8 │ │ dmb ish │ │ ldr r0, [sp, #8] │ │ - bl 7e154 │ │ + bl 7e1bc │ │ ldr r0, [sp, #888] @ 0x378 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 7a376 │ │ + bne.n 7a3de │ │ cmp r1, #1 │ │ - bne.n 7a392 │ │ + bne.n 7a3fa │ │ dmb ish │ │ ldr r0, [sp, #888] @ 0x378 │ │ - bl 801a6 │ │ + bl 8020e │ │ ldr r0, [sp, #12] │ │ - bl 8020e │ │ - b.n 7a482 │ │ + bl 80276 │ │ + b.n 7a4ea │ │ ldr r0, [sp, #12] │ │ - bl 8020e │ │ - bl 416fe │ │ + bl 80276 │ │ + bl 41a06 │ │ add r0, sp, #632 @ 0x278 │ │ - bl 8011e │ │ - bl 416fe │ │ - bl 416fe │ │ + bl 80186 │ │ + bl 41a06 │ │ + bl 41a06 │ │ mov r9, r0 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, fp │ │ - blx d87c0 │ │ - b.n 7a408 │ │ + blx d87d0 │ │ + b.n 7a470 │ │ mov r9, r0 │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ - b.n 7a4ba │ │ + blx d87d0 │ │ + b.n 7a522 │ │ mov r9, r0 │ │ - b.n 7a45e │ │ + b.n 7a4c6 │ │ mov r9, r0 │ │ add.w r0, sp, #1096 @ 0x448 │ │ - bl 7d936 │ │ - b.n 7a4ee │ │ - bl 416fe │ │ + bl 7d99e │ │ + b.n 7a556 │ │ + bl 41a06 │ │ mov r9, r0 │ │ ldr r0, [sp, #292] @ 0x124 │ │ str r0, [sp, #272] @ 0x110 │ │ - b.n 7a41c │ │ + b.n 7a484 │ │ mov r9, r0 │ │ mov r0, r5 │ │ mov r1, sl │ │ - blx d89d0 │ │ - b.n 7a450 │ │ + blx d89e0 │ │ + b.n 7a4b8 │ │ mov r9, r0 │ │ movs r4, #8 │ │ - b.n 7a4ea │ │ - b.n 7a416 │ │ - b.n 7a44e │ │ - b.n 7a4b8 │ │ + b.n 7a552 │ │ + b.n 7a47e │ │ + b.n 7a4b6 │ │ + b.n 7a520 │ │ mov r9, r0 │ │ - b.n 7a43e │ │ + b.n 7a4a6 │ │ mov r9, r0 │ │ - b.n 7a482 │ │ + b.n 7a4ea │ │ mov r9, r0 │ │ ldr r0, [sp, #272] @ 0x110 │ │ subs r0, #3 │ │ cmp r0, #2 │ │ - bcc.n 7a4ee │ │ + bcc.n 7a556 │ │ ldr r0, [sp, #240] @ 0xf0 │ │ cmp r0, #0 │ │ - beq.n 7a4ee │ │ + beq.n 7a556 │ │ ldr r0, [sp, #232] @ 0xe8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r9 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ mov r9, r0 │ │ add r0, sp, #632 @ 0x278 │ │ - bl 7e1f4 │ │ + bl 7e25c │ │ ldr r0, [sp, #160] @ 0xa0 │ │ - cbz r0, 7a450 │ │ + cbz r0, 7a4b8 │ │ ldr r0, [sp, #156] @ 0x9c │ │ - blx d87c0 │ │ - b.n 7a450 │ │ - bl 416fe │ │ + blx d87d0 │ │ + b.n 7a4b8 │ │ + bl 41a06 │ │ mov r9, r0 │ │ ldr.w r0, [r7, #-120] │ │ - cbz r0, 7a45e │ │ + cbz r0, 7a4c6 │ │ ldr.w r0, [r7, #-116] │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr.w r0, [r7, #-200] │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 7a466 │ │ + bne.n 7a4ce │ │ cmp r1, #1 │ │ - bne.n 7a482 │ │ + bne.n 7a4ea │ │ dmb ish │ │ ldr r0, [sp, #200] @ 0xc8 │ │ - bl 7e154 │ │ + bl 7e1bc │ │ ldrb.w r0, [sp, #1216] @ 0x4c0 │ │ cmp r0, #2 │ │ itt eq │ │ ldreq.w r0, [sp, #1096] @ 0x448 │ │ cmpeq r0, #0 │ │ - bne.n 7a4ee │ │ + bne.n 7a556 │ │ ldr.w r0, [sp, #1100] @ 0x44c │ │ subs r0, #3 │ │ cmp r0, #2 │ │ - bcc.n 7a4ee │ │ + bcc.n 7a556 │ │ ldr.w r0, [sp, #1144] @ 0x478 │ │ - cbz r0, 7a4ee │ │ + cbz r0, 7a556 │ │ ldr.w r0, [sp, #1136] @ 0x470 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r9 │ │ - blx d6dd0 │ │ - bl 416fe │ │ - adds r2, r7, r0 │ │ + blx d6de0 │ │ + bl 41a06 │ │ + asrs r2, r4, #31 │ │ movs r6, r0 │ │ mov r9, r0 │ │ ldr r0, [sp, #296] @ 0x128 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #300] @ 0x12c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, fp │ │ - blx d89a0 │ │ + blx d89b0 │ │ ldrd r4, r5, [sp, #1020] @ 0x3fc │ │ - cbz r5, 7a4ea │ │ + cbz r5, 7a552 │ │ add.w r6, r4, #44 @ 0x2c │ │ ldr.w r0, [r6, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #56 @ 0x38 │ │ subs r5, #1 │ │ - bne.n 7a4d6 │ │ + bne.n 7a53e │ │ ldr r0, [sp, #1016] @ 0x3f8 │ │ - cbnz r0, 7a4f4 │ │ + cbnz r0, 7a55c │ │ mov r0, r9 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r9 │ │ - blx d6dd0 │ │ - adds r4, r0, r1 │ │ + blx d6de0 │ │ + asrs r4, r5, #31 │ │ movs r6, r0 │ │ - subs r2, r6, r6 │ │ + subs r2, r3, r5 │ │ movs r6, r0 │ │ - asrs r2, r2, #31 │ │ + asrs r2, r7, #29 │ │ movs r6, r0 │ │ - stcl 15, cr15, [r0], {249} @ 0xf9 │ │ - subs r2, r4, r2 │ │ + mrrc 15, 15, pc, r8, cr9 @ │ │ + subs r2, r1, r1 │ │ movs r6, r0 │ │ - stcl 15, cr15, [fp, #-996]! @ 0xfffffc1c │ │ - asrs r6, r4, #28 │ │ + stc 15, cr15, [r3, #-996] @ 0xfffffc1c │ │ + asrs r6, r1, #27 │ │ movs r6, r0 │ │ - asrs r6, r3, #28 │ │ + asrs r6, r0, #27 │ │ movs r6, r0 │ │ - asrs r4, r6, #30 │ │ + asrs r4, r3, #29 │ │ movs r6, r0 │ │ - adds r6, r7, #5 │ │ + adds r6, r4, #4 │ │ movs r6, r0 │ │ - adds r4, r6, #2 │ │ + adds r4, r3, #1 │ │ movs r6, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #60 @ 0x3c │ │ ldrd fp, sl, [r0] │ │ cmp r1, #0 │ │ str r1, [sp, #4] │ │ ldrb.w r6, [fp, #16] │ │ it eq │ │ movseq.w r1, r6, lsl #31 │ │ - beq.w 7a6a6 │ │ + beq.w 7a70e │ │ mov r8, r0 │ │ ldr.w r0, [fp] │ │ mov r6, r2 │ │ mov r9, r3 │ │ cmp.w sl, #0 │ │ - beq.n 7a5a4 │ │ + beq.n 7a60c │ │ ldrd r0, r1, [r0] │ │ movs r2, #6 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #572] @ (7a7a4 ) │ │ + ldr r1, [pc, #572] @ (7a80c ) │ │ add r1, pc │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.w 7a688 │ │ + bne.w 7a6f0 │ │ ldrb.w r0, [fp, #16] │ │ cmp r0, #1 │ │ - bne.n 7a5f4 │ │ + bne.n 7a65c │ │ ldr.w r0, [fp] │ │ movs r3, #13 │ │ - ldr r1, [pc, #552] @ (7a7a8 ) │ │ - ldr r2, [pc, #552] @ (7a7ac ) │ │ + ldr r1, [pc, #552] @ (7a810 ) │ │ + ldr r2, [pc, #552] @ (7a814 ) │ │ strh.w r3, [sp, #20] │ │ movs r3, #0 │ │ add r1, pc │ │ strd r1, r3, [sp, #12] │ │ add r2, pc │ │ str r2, [sp, #8] │ │ ldr r1, [r0, #4] │ │ ldr r0, [r0, #0] │ │ - ldr r2, [pc, #536] @ (7a7b0 ) │ │ + ldr r2, [pc, #536] @ (7a818 ) │ │ add r2, pc │ │ add r3, sp, #8 │ │ - bl 3ef94 │ │ - cbz r0, 7a5f4 │ │ - b.n 7a688 │ │ - ldr r1, [pc, #484] @ (7a78c ) │ │ + bl 3f29c │ │ + cbz r0, 7a65c │ │ + b.n 7a6f0 │ │ + ldr r1, [pc, #484] @ (7a7f4 ) │ │ add.w r2, fp, #12 │ │ str r2, [sp, #8] │ │ add r3, sp, #8 │ │ add r1, pc │ │ str r1, [sp, #12] │ │ ldr r1, [r0, #4] │ │ ldr r0, [r0, #0] │ │ - ldr r2, [pc, #472] @ (7a790 ) │ │ + ldr r2, [pc, #472] @ (7a7f8 ) │ │ add r2, pc │ │ - bl 3ef94 │ │ + bl 3f29c │ │ cmp r0, #0 │ │ - bne.n 7a688 │ │ + bne.n 7a6f0 │ │ ldrb.w r0, [fp, #16] │ │ cmp r0, #1 │ │ - bne.n 7a5f4 │ │ + bne.n 7a65c │ │ ldr.w r0, [fp] │ │ movs r2, #10 │ │ - ldr r1, [pc, #448] @ (7a794 ) │ │ + ldr r1, [pc, #448] @ (7a7fc ) │ │ strh.w r2, [sp, #20] │ │ movs r2, #0 │ │ add r1, pc │ │ strd r1, r2, [sp, #12] │ │ add r2, sp, #4 │ │ str r2, [sp, #8] │ │ ldr r1, [r0, #4] │ │ ldr r0, [r0, #0] │ │ - ldr r2, [pc, #432] @ (7a798 ) │ │ + ldr r2, [pc, #432] @ (7a800 ) │ │ add r2, pc │ │ add r3, sp, #8 │ │ - bl 3ef94 │ │ + bl 3f29c │ │ cmp r0, #0 │ │ - bne.n 7a688 │ │ + bne.n 7a6f0 │ │ ldr r0, [r6, #0] │ │ cmp r0, #3 │ │ - bne.n 7a610 │ │ + bne.n 7a678 │ │ ldr.w r0, [fp] │ │ movs r2, #9 │ │ ldrd r0, r1, [r0] │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #428] @ (7a7b4 ) │ │ + ldr r1, [pc, #428] @ (7a81c ) │ │ add r1, pc │ │ blx r3 │ │ - cbz r0, 7a674 │ │ - b.n 7a688 │ │ + cbz r0, 7a6dc │ │ + b.n 7a6f0 │ │ ldrb.w r0, [fp, #16] │ │ - cbz r0, 7a642 │ │ - ldr r0, [pc, #388] @ (7a79c ) │ │ + cbz r0, 7a6aa │ │ + ldr r0, [pc, #388] @ (7a804 ) │ │ add.w ip, sp, #8 │ │ add r0, pc │ │ mov r1, ip │ │ mov lr, r0 │ │ ldmia r6!, {r0, r2, r3, r4, r5} │ │ stmia r1!, {r0, r2, r3, r4, r5} │ │ ldmia.w r6, {r0, r2, r3, r4, r5} │ │ stmia r1!, {r0, r2, r3, r4, r5} │ │ ldr.w r0, [fp] │ │ str.w lr, [sp, #52] @ 0x34 │ │ str.w ip, [sp, #48] @ 0x30 │ │ ldr r1, [r0, #4] │ │ ldr r0, [r0, #0] │ │ - ldr r2, [pc, #352] @ (7a7a0 ) │ │ + ldr r2, [pc, #352] @ (7a808 ) │ │ add r2, pc │ │ - b.n 7a66c │ │ - ldr r0, [pc, #408] @ (7a7dc ) │ │ + b.n 7a6d4 │ │ + ldr r0, [pc, #408] @ (7a844 ) │ │ add.w ip, sp, #8 │ │ add r0, pc │ │ mov r1, ip │ │ mov lr, r0 │ │ ldmia r6!, {r0, r2, r3, r4, r5} │ │ stmia r1!, {r0, r2, r3, r4, r5} │ │ ldmia.w r6, {r0, r2, r3, r4, r5} │ │ stmia r1!, {r0, r2, r3, r4, r5} │ │ ldr.w r0, [fp] │ │ str.w lr, [sp, #52] @ 0x34 │ │ str.w ip, [sp, #48] @ 0x30 │ │ ldr r1, [r0, #4] │ │ ldr r0, [r0, #0] │ │ - ldr r2, [pc, #372] @ (7a7e0 ) │ │ + ldr r2, [pc, #372] @ (7a848 ) │ │ add r2, pc │ │ add r3, sp, #48 @ 0x30 │ │ - bl 3ef94 │ │ - cbnz r0, 7a688 │ │ + bl 3f29c │ │ + cbnz r0, 7a6f0 │ │ ldr.w r0, [fp] │ │ movs r2, #1 │ │ ldrd r0, r1, [r0] │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #308] @ (7a7b8 ) │ │ + ldr r1, [pc, #308] @ (7a820 ) │ │ add r1, pc │ │ blx r3 │ │ - cbz r0, 7a694 │ │ + cbz r0, 7a6fc │ │ movs r4, #1 │ │ mov r0, r4 │ │ add sp, #60 @ 0x3c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr.w r0, [r9] │ │ cmp r0, #2 │ │ mov r0, r8 │ │ itt ne │ │ ldrne r1, [r7, #8] │ │ movsne.w r1, r1, lsl #31 │ │ - bne.n 7a6b8 │ │ + bne.n 7a720 │ │ movs r4, #0 │ │ add.w r1, sl, #1 │ │ str r1, [r0, #4] │ │ mov r0, r4 │ │ add sp, #60 @ 0x3c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrb.w r1, [fp, #16] │ │ ldr r0, [r7, #12] │ │ cmp r1, #1 │ │ str r0, [sp, #56] @ 0x38 │ │ - bne.n 7a6f0 │ │ + bne.n 7a758 │ │ ldr.w r0, [fp] │ │ movs r3, #10 │ │ - ldr r1, [pc, #240] @ (7a7bc ) │ │ - ldr r2, [pc, #240] @ (7a7c0 ) │ │ + ldr r1, [pc, #240] @ (7a824 ) │ │ + ldr r2, [pc, #240] @ (7a828 ) │ │ strh.w r3, [sp, #20] │ │ movs r3, #0 │ │ add r1, pc │ │ strd r1, r3, [sp, #12] │ │ add r2, pc │ │ str r2, [sp, #8] │ │ ldr r1, [r0, #4] │ │ add r3, sp, #8 │ │ ldr r0, [r0, #0] │ │ - ldr r2, [pc, #220] @ (7a7c4 ) │ │ + ldr r2, [pc, #220] @ (7a82c ) │ │ add r2, pc │ │ - bl 3ef94 │ │ + bl 3f29c │ │ cmp r0, #0 │ │ - bne.n 7a688 │ │ + bne.n 7a6f0 │ │ ldr.w r0, [fp] │ │ movs r2, #16 │ │ ldrd r0, r1, [r0] │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #200] @ (7a7c8 ) │ │ + ldr r1, [pc, #200] @ (7a830 ) │ │ add r1, pc │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.n 7a688 │ │ + bne.n 7a6f0 │ │ ldr.w r2, [fp, #8] │ │ ldrd r1, r0, [fp] │ │ ldrd r3, r6, [r9] │ │ ldr r4, [r2, #16] │ │ add r2, sp, #8 │ │ stmia r2!, {r1, r3, r6} │ │ add r2, sp, #8 │ │ adds r2, #4 │ │ ldr.w r5, [r9, #8] │ │ str r5, [sp, #20] │ │ blx r4 │ │ cmp r0, #0 │ │ - bne.n 7a688 │ │ - ldr r6, [pc, #160] @ (7a7cc ) │ │ + bne.n 7a6f0 │ │ + ldr r6, [pc, #160] @ (7a834 ) │ │ add r2, sp, #56 @ 0x38 │ │ ldr.w r0, [fp] │ │ add r3, sp, #8 │ │ add r6, pc │ │ str r6, [sp, #12] │ │ str r2, [sp, #8] │ │ ldr r1, [r0, #4] │ │ ldr r0, [r0, #0] │ │ - ldr r2, [pc, #144] @ (7a7d0 ) │ │ + ldr r2, [pc, #144] @ (7a838 ) │ │ add r2, pc │ │ - bl 3ef94 │ │ + bl 3f29c │ │ cmp r0, #0 │ │ - bne.n 7a688 │ │ + bne.n 7a6f0 │ │ ldr r0, [r7, #16] │ │ lsls r0, r0, #31 │ │ - beq.n 7a76e │ │ + beq.n 7a7d6 │ │ ldr r0, [r7, #20] │ │ add r2, sp, #48 @ 0x30 │ │ str r0, [sp, #48] @ 0x30 │ │ add r3, sp, #8 │ │ ldr.w r0, [fp] │ │ str r6, [sp, #12] │ │ str r2, [sp, #8] │ │ ldr r1, [r0, #4] │ │ ldr r0, [r0, #0] │ │ - ldr r2, [pc, #112] @ (7a7d4 ) │ │ + ldr r2, [pc, #112] @ (7a83c ) │ │ add r2, pc │ │ - bl 3ef94 │ │ + bl 3f29c │ │ cmp r0, #0 │ │ - bne.n 7a688 │ │ + bne.n 7a6f0 │ │ ldr.w r0, [fp] │ │ movs r2, #1 │ │ movs r4, #1 │ │ ldrd r0, r1, [r0] │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #88] @ (7a7d8 ) │ │ + ldr r1, [pc, #88] @ (7a840 ) │ │ add r1, pc │ │ blx r3 │ │ cmp r0, #0 │ │ mov r0, r8 │ │ - bne.w 7a68a │ │ - b.n 7a6a6 │ │ - str r3, [r0, #44] @ 0x2c │ │ - vshr.u32 q15, , #4 │ │ + bne.w 7a6f2 │ │ + b.n 7a70e │ │ + str r3, [r4, #84] @ 0x54 │ │ + vqrdmlsh.s , q14, d27[0] │ │ vclt.s32 d16, d9, #0 │ │ movs r0, r0 │ │ - b.n 7a7f8 │ │ + svc 198 @ 0xc6 │ │ vrshr.u32 d16, d29, #7 │ │ movs r0, r0 │ │ - lsls r5, r5, #22 │ │ - vshr.u64 d30, d28, #7 │ │ + lsls r5, r7, #18 │ │ + vshr.u32 q15, q2, #7 │ │ @ instruction: 0xfff9cd21 │ │ - @ instruction: 0xffffbd9a │ │ - vqrdmulh.s , , d8[0] │ │ - vcgt.s32 d30, d16, #0 │ │ - @ instruction: 0xfff9df88 │ │ + vcvt.u16.f16 d27, d18, #1 │ │ + vqrdmulh.s , , d16[0] │ │ + @ instruction: 0xfff9dfb8 │ │ + @ instruction: 0xfff9df20 │ │ @ instruction: 0xfff9cbd5 │ │ - vdup.8 , d14[7] │ │ - vcvt.f16.u16 , q13, #7 │ │ - vsubl.u q12, d25, d30 │ │ - vsra.u32 d22, d31, #7 │ │ - vsra.u64 d31, d22, #4 │ │ - vsra.u64 d31, d0, #8 │ │ - @ instruction: 0xfff8de8c │ │ + vtbx.8 d27, {d31-, #7 │ │ + vrshr.u32 d31, d17, #4 │ │ + vpaddl.s32 d31, d11 │ │ + @ instruction: 0xfff8de24 │ │ vrshr.u32 d16, d1, #7 │ │ movs r0, r0 │ │ - svc 199 @ 0xc7 │ │ + svc 95 @ 0x5f │ │ vsli.64 , q8, #57 @ 0x39 │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #16 │ │ ldrd r5, r8, [r1, #8] │ │ mov r4, r1 │ │ ldr r0, [r0, #0] │ │ lsls r1, r5, #8 │ │ mov r1, r5 │ │ - bpl.n 7a80e │ │ + bpl.n 7a876 │ │ lsls r1, r5, #4 │ │ - bmi.n 7a80a │ │ + bmi.n 7a872 │ │ movs r1, #10 │ │ strh r1, [r4, #12] │ │ orr.w r1, r5, #150994944 @ 0x9000000 │ │ - b.n 7a80e │ │ + b.n 7a876 │ │ orr.w r1, r5, #16777216 @ 0x1000000 │ │ orr.w r1, r1, #8388608 @ 0x800000 │ │ str r1, [r4, #8] │ │ - ldr r2, [pc, #60] @ (7a854 ) │ │ + ldr r2, [pc, #60] @ (7a8bc ) │ │ add r1, sp, #8 │ │ movs r6, #7 │ │ add r2, pc │ │ mov r3, r6 │ │ and.w r6, r0, #15 │ │ lsrs r0, r0, #4 │ │ ldrb r6, [r2, r6] │ │ strb r6, [r1, r3] │ │ sub.w r6, r3, #1 │ │ - bne.n 7a81c │ │ + bne.n 7a884 │ │ adds r0, r3, #1 │ │ - ldr r2, [pc, #36] @ (7a858 ) │ │ + ldr r2, [pc, #36] @ (7a8c0 ) │ │ rsb r0, r0, #9 │ │ add r1, r3 │ │ add r2, pc │ │ movs r3, #2 │ │ strd r1, r0, [sp] │ │ mov r0, r4 │ │ movs r1, #1 │ │ - bl 3f0a0 │ │ + bl 3f3a8 │ │ strd r5, r8, [r4, #8] │ │ add sp, #16 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - strh r2, [r6, #14] │ │ - @ instruction: 0xfff9ca9d │ │ + strh r2, [r1, #12] │ │ + vshll.u32 q14, d20, #25 │ │ vsli.64 , q8, #57 @ 0x39 │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #28 │ │ mov r9, r1 │ │ ldr r1, [r0, #0] │ │ cmp r1, #2 │ │ - bne.n 7a8bc │ │ + bne.n 7a924 │ │ ldr r5, [r0, #36] @ 0x24 │ │ cmp r5, #0 │ │ - beq.w 7a98e │ │ + beq.w 7a9f6 │ │ ldr.w sl, [r0, #32] │ │ - ldr r0, [pc, #336] @ (7a9cc ) │ │ + ldr r0, [pc, #336] @ (7aa34 ) │ │ add r0, pc │ │ mov r8, r0 │ │ add r0, sp, #8 │ │ mov r1, sl │ │ mov r2, r5 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #8] │ │ cmp r0, #1 │ │ - bne.n 7a978 │ │ + bne.n 7a9e0 │ │ mov r0, r9 │ │ mov r1, r8 │ │ movs r2, #3 │ │ ldrb.w fp, [sp, #17] │ │ ldrb.w r4, [sp, #16] │ │ ldr r6, [sp, #12] │ │ - bl 3ffd4 │ │ + bl 402dc │ │ cmp r0, #0 │ │ - bne.n 7a984 │ │ + bne.n 7a9ec │ │ lsls r0, r4, #31 │ │ - beq.n 7a98e │ │ + beq.n 7a9f6 │ │ add.w r0, r6, fp │ │ cmp r5, r0 │ │ - bcc.n 7a998 │ │ + bcc.n 7aa00 │ │ add sl, r0 │ │ subs r5, r5, r0 │ │ - bne.n 7a880 │ │ - b.n 7a98e │ │ + bne.n 7a8e8 │ │ + b.n 7a9f6 │ │ lsls r1, r1, #31 │ │ - beq.n 7a8ee │ │ + beq.n 7a956 │ │ mov r5, r0 │ │ adds r0, #4 │ │ str r0, [sp, #4] │ │ movw r0, #16960 @ 0x4240 │ │ ldr.w r1, [r9, #8] │ │ movt r0, #15 │ │ str r0, [sp, #12] │ │ movs r0, #0 │ │ str r0, [sp, #8] │ │ lsls r0, r1, #8 │ │ str.w r9, [sp, #16] │ │ - bmi.n 7a90a │ │ - ldr r0, [pc, #192] @ (7a9a4 ) │ │ - ldr r1, [pc, #196] @ (7a9a8 ) │ │ - ldr r2, [pc, #196] @ (7a9ac ) │ │ + bmi.n 7a972 │ │ + ldr r0, [pc, #192] @ (7aa0c ) │ │ + ldr r1, [pc, #196] @ (7aa10 ) │ │ + ldr r2, [pc, #196] @ (7aa14 ) │ │ add r0, pc │ │ add r1, pc │ │ add r2, pc │ │ - b.n 7a916 │ │ + b.n 7a97e │ │ ldrd r4, r3, [r9] │ │ mov r5, r0 │ │ ldrd r1, r2, [r0, #16] │ │ ldr r6, [r3, #12] │ │ mov r0, r4 │ │ blx r6 │ │ - cbz r0, 7a968 │ │ + cbz r0, 7a9d0 │ │ movs r0, #1 │ │ add sp, #28 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #164] @ (7a9b0 ) │ │ - ldr r1, [pc, #164] @ (7a9b4 ) │ │ - ldr r2, [pc, #168] @ (7a9b8 ) │ │ + ldr r0, [pc, #164] @ (7aa18 ) │ │ + ldr r1, [pc, #164] @ (7aa1c ) │ │ + ldr r2, [pc, #168] @ (7aa20 ) │ │ add r0, pc │ │ add r1, pc │ │ add r2, pc │ │ add r3, sp, #4 │ │ str r3, [sp, #20] │ │ str r0, [sp, #24] │ │ add r0, sp, #8 │ │ add r3, sp, #20 │ │ - bl 3ef94 │ │ + bl 3f29c │ │ ldr r1, [sp, #8] │ │ cmp r0, #0 │ │ it ne │ │ cmpne r1, #0 │ │ - bne.n 7a948 │ │ - cbnz r0, 7a958 │ │ - cbz r1, 7a962 │ │ - ldr r0, [pc, #140] @ (7a9c0 ) │ │ + bne.n 7a9b0 │ │ + cbnz r0, 7a9c0 │ │ + cbz r1, 7a9ca │ │ + ldr r0, [pc, #140] @ (7aa28 ) │ │ add r2, sp, #20 │ │ - ldr r3, [pc, #140] @ (7a9c4 ) │ │ - ldr r1, [pc, #140] @ (7a9c8 ) │ │ + ldr r3, [pc, #140] @ (7aa2c ) │ │ + ldr r1, [pc, #140] @ (7aa30 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #55 @ 0x37 │ │ - bl 414b0 │ │ + bl 417b8 │ │ ldrd r0, r1, [r9] │ │ movs r2, #20 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #104] @ (7a9bc ) │ │ + ldr r1, [pc, #104] @ (7aa24 ) │ │ add r1, pc │ │ blx r3 │ │ - cbz r0, 7a962 │ │ + cbz r0, 7a9ca │ │ movs r0, #1 │ │ add sp, #28 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrd r4, r0, [r9] │ │ ldr r6, [r0, #12] │ │ ldrd r1, r2, [r5, #24] │ │ mov r0, r4 │ │ blx r6 │ │ add sp, #28 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrd r1, r2, [sp, #12] │ │ mov r0, r9 │ │ - bl 3ffd4 │ │ - cbz r0, 7a98e │ │ + bl 402dc │ │ + cbz r0, 7a9f6 │ │ movs r0, #1 │ │ add sp, #28 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #0 │ │ add sp, #28 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r3, [pc, #52] @ (7a9d0 ) │ │ + ldr r3, [pc, #52] @ (7aa38 ) │ │ mov r1, r5 │ │ mov r2, r5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r4, [sp, #124] @ 0x7c │ │ - @ instruction: 0xffff0d9c │ │ + bl 3fcb0 │ │ + ldr r4, [sp, #428] @ 0x1ac │ │ + vqrdmulh.s q8, , d4[0] │ │ movs r6, r0 │ │ - lsls r1, r0, #12 │ │ - @ instruction: 0xfff99bf5 │ │ - vcvt.u16.f16 q8, q9, #1 │ │ + lsls r1, r2, #8 │ │ + vdup.8 , d1[4] │ │ + vcvt.u16.f16 d16, d10, #1 │ │ movs r6, r0 │ │ - ble.n 7a9f6 │ │ - @ instruction: 0xfff9c9dc │ │ - vtbl.8 d28, {d9-d11}, d8 │ │ - vcvt.u16.f16 d16, d8, #7 │ │ + bgt.n 7a98e │ │ + vqrshrn.u64 d28, , #7 │ │ + @ instruction: 0xfff9c99f │ │ + @ instruction: 0xfff90cb0 │ │ movs r6, r0 │ │ - lsrs r6, r3, #21 │ │ + lsrs r6, r0, #20 │ │ movs r6, r0 │ │ - ble.n 7a946 │ │ - @ instruction: 0xfff90fa6 │ │ + ble.n 7aade │ │ + vqrdmlsh.s q8, , d14[0] │ │ movs r6, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #12 │ │ mov r5, r1 │ │ mov r8, r0 │ │ ldrb r1, [r2, #7] │ │ ldrb r0, [r2, #8] │ │ ldrb r3, [r2, #6] │ │ - cbz r3, 7a9f2 │ │ - cbz r1, 7aa0c │ │ - cbnz r0, 7aa0e │ │ + cbz r3, 7aa5a │ │ + cbz r1, 7aa74 │ │ + cbnz r0, 7aa76 │ │ movs r4, #2 │ │ - b.n 7a9f8 │ │ - cbz r1, 7aa14 │ │ - cbnz r0, 7aa16 │ │ + b.n 7aa60 │ │ + cbz r1, 7aa7c │ │ + cbnz r0, 7aa7e │ │ movs r4, #1 │ │ ldrb r1, [r2, #9] │ │ ldrb r0, [r2, #11] │ │ ldrb r3, [r2, #10] │ │ - cbnz r3, 7aa2e │ │ + cbnz r3, 7aa96 │ │ ands.w r1, r1, #1 │ │ it ne │ │ movne.w r1, #512 @ 0x200 │ │ - b.n 7aa3a │ │ - cbz r0, 7aa42 │ │ + b.n 7aaa2 │ │ + cbz r0, 7aaaa │ │ movw r4, #1026 @ 0x402 │ │ - b.n 7aa1a │ │ - cbz r0, 7aa56 │ │ + b.n 7aa82 │ │ + cbz r0, 7aabe │ │ movw r4, #1025 @ 0x401 │ │ ldrb r1, [r2, #9] │ │ ldrb r0, [r2, #11] │ │ cmp r1, #1 │ │ it eq │ │ movseq.w r3, r0, lsl #31 │ │ - beq.n 7aab0 │ │ + beq.n 7ab18 │ │ ldrb r3, [r2, #10] │ │ cmp r3, #0 │ │ - beq.n 7aa00 │ │ + beq.n 7aa68 │ │ lsls r1, r1, #31 │ │ mov.w r1, #64 @ 0x40 │ │ it ne │ │ movne.w r1, #576 @ 0x240 │ │ lsls r0, r0, #31 │ │ it ne │ │ movne r1, #192 @ 0xc0 │ │ - b.n 7aaf0 │ │ + b.n 7ab58 │ │ ldrb.w sl, [r2, #9] │ │ movs r4, #0 │ │ ldrb r6, [r2, #10] │ │ ldrb.w r9, [r2, #11] │ │ movs.w r0, sl, lsl #31 │ │ - beq.n 7aaa6 │ │ - b.n 7aab0 │ │ + beq.n 7ab0e │ │ + b.n 7ab18 │ │ ldrb r6, [r2, #10] │ │ mov fp, r2 │ │ ldrb.w sl, [r2, #9] │ │ ldrb.w r9, [r2, #11] │ │ cmp r6, #0 │ │ it eq │ │ cmpeq.w r9, #0 │ │ - beq.n 7aa82 │ │ - ldr r1, [pc, #212] @ (7ab44 ) │ │ + beq.n 7aaea │ │ + ldr r1, [pc, #212] @ (7abac ) │ │ add r0, sp, #4 │ │ movs r2, #61 @ 0x3d │ │ add r1, pc │ │ - bl 91e40 │ │ + bl 91eac │ │ ldrb.w r0, [sp, #4] │ │ cmp r0, #4 │ │ - beq.n 7aa9c │ │ - b.n 7aacc │ │ + beq.n 7ab04 │ │ + b.n 7ab34 │ │ cmp.w sl, #0 │ │ - bne.n 7aa6c │ │ - ldr r1, [pc, #188] @ (7ab48 ) │ │ + bne.n 7aad4 │ │ + ldr r1, [pc, #188] @ (7abb0 ) │ │ add r0, sp, #4 │ │ movs r2, #58 @ 0x3a │ │ add r1, pc │ │ - bl 91e40 │ │ + bl 91eac │ │ ldrb.w r0, [sp, #4] │ │ cmp r0, #4 │ │ - bne.n 7aacc │ │ + bne.n 7ab34 │ │ ldr r4, [sp, #8] │ │ mov r2, fp │ │ movs.w r0, sl, lsl #31 │ │ - bne.n 7aab0 │ │ + bne.n 7ab18 │ │ lsls r0, r6, #31 │ │ it eq │ │ movseq.w r0, r9, lsl #31 │ │ - beq.n 7aaee │ │ - ldr r1, [pc, #152] @ (7ab4c ) │ │ + beq.n 7ab56 │ │ + ldr r1, [pc, #152] @ (7abb4 ) │ │ add r0, sp, #4 │ │ mov r6, r2 │ │ movs r2, #61 @ 0x3d │ │ add r1, pc │ │ - bl 91e40 │ │ + bl 91eac │ │ ldrb.w r0, [sp, #4] │ │ cmp r0, #4 │ │ - bne.n 7aacc │ │ + bne.n 7ab34 │ │ ldr r1, [sp, #8] │ │ mov r2, r6 │ │ - b.n 7aaf0 │ │ + b.n 7ab58 │ │ ldr r2, [sp, #8] │ │ ldrb.w r3, [sp, #7] │ │ ldrh.w r1, [sp, #5] │ │ strb.w r3, [r8, #3] │ │ strh.w r1, [r8, #1] │ │ str.w r2, [r8, #4] │ │ strb.w r0, [r8] │ │ @@ -124691,221 +124604,221 @@ │ │ ldrh r6, [r2, #4] │ │ bic.w r0, r0, #3 │ │ orrs r0, r1 │ │ orr.w r4, r0, #524288 @ 0x80000 │ │ mov r0, r5 │ │ mov r1, r4 │ │ mov r2, r6 │ │ - blx d89e0 │ │ + blx d89f0 │ │ adds r1, r0, #1 │ │ - bne.n 7ab32 │ │ - blx d8850 │ │ + bne.n 7ab9a │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ cmp r0, #4 │ │ - beq.n 7ab00 │ │ + beq.n 7ab68 │ │ movs r1, #0 │ │ str.w r0, [r8, #4] │ │ strb.w r1, [r8, #3] │ │ strh.w r1, [r8, #1] │ │ strb.w r1, [r8] │ │ add sp, #12 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r1, #4 │ │ str.w r0, [r8, #4] │ │ strb.w r1, [r8] │ │ add sp, #12 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - b.n 7ad52 │ │ - vcge.s32 d30, d31, #0 │ │ - vshr.u64 d30, d31, #7 │ │ + b.n 7acea │ │ + vcgt.s32 q15, , #0 │ │ + vshr.u32 q15, , #7 │ │ vsli.64 , q8, #57 @ 0x39 │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #20 │ │ ldrd r9, ip, [r1, #12] │ │ movs r2, #0 │ │ cmp ip, r9 │ │ - bcc.w 7ad16 │ │ + bcc.w 7ad7e │ │ ldr r3, [r1, #8] │ │ str r3, [sp, #4] │ │ cmp ip, r3 │ │ - bhi.w 7ad16 │ │ + bhi.w 7ad7e │ │ ldrb r3, [r1, #24] │ │ ldr r2, [r1, #4] │ │ str r2, [sp, #16] │ │ add.w r2, r1, #20 │ │ str r2, [sp, #0] │ │ add r2, r3 │ │ str r3, [sp, #12] │ │ cmp r3, #5 │ │ ldrb.w r8, [r2, #-1] │ │ str.w ip, [sp, #8] │ │ - bcs.w 7ac96 │ │ + bcs.w 7acfe │ │ mov.w r2, #16843009 @ 0x1010101 │ │ movw sl, #256 @ 0x100 │ │ mul.w fp, r8, r2 │ │ movt sl, #257 @ 0x101 │ │ ldr r2, [sp, #16] │ │ sub.w lr, ip, r9 │ │ cmp.w lr, #8 │ │ add r2, r9 │ │ - bcs.n 7abc2 │ │ + bcs.n 7ac2a │ │ cmp ip, r9 │ │ - beq.w 7ad10 │ │ + beq.w 7ad78 │ │ movs r4, #0 │ │ ldrb r3, [r2, r4] │ │ cmp r3, r8 │ │ - beq.n 7ac36 │ │ + beq.n 7ac9e │ │ adds r4, #1 │ │ cmp lr, r4 │ │ - bne.n 7abb4 │ │ - b.n 7ad10 │ │ + bne.n 7ac1c │ │ + b.n 7ad78 │ │ adds r6, r2, #3 │ │ bic.w r6, r6, #3 │ │ subs r6, r6, r2 │ │ - bne.n 7abd4 │ │ + bne.n 7ac3c │ │ sub.w ip, lr, #8 │ │ movs r6, #0 │ │ - b.n 7abea │ │ + b.n 7ac52 │ │ movs r4, #0 │ │ ldrb r3, [r2, r4] │ │ cmp r3, r8 │ │ - beq.n 7ac36 │ │ + beq.n 7ac9e │ │ adds r4, #1 │ │ cmp r6, r4 │ │ - bne.n 7abd6 │ │ + bne.n 7ac3e │ │ sub.w ip, lr, #8 │ │ cmp r6, ip │ │ - bhi.n 7ac12 │ │ + bhi.n 7ac7a │ │ ldr r5, [r2, r6] │ │ adds r4, r2, r6 │ │ ldr r4, [r4, #4] │ │ eor.w r5, r5, fp │ │ sub.w r3, sl, r5 │ │ eor.w r4, r4, fp │ │ orrs r3, r5 │ │ sub.w r5, sl, r4 │ │ orrs r4, r5 │ │ ands r3, r4 │ │ mvns r3, r3 │ │ tst.w r3, #2155905152 @ 0x80808080 │ │ - bne.n 7ac12 │ │ + bne.n 7ac7a │ │ adds r6, #8 │ │ - b.n 7abe6 │ │ + b.n 7ac4e │ │ ldr.w ip, [sp, #8] │ │ cmp lr, r6 │ │ - beq.n 7ad10 │ │ + beq.n 7ad78 │ │ sub.w r3, ip, r6 │ │ add r2, r6 │ │ sub.w r4, r3, r9 │ │ movs r3, #0 │ │ ldrb r5, [r2, r3] │ │ cmp r5, r8 │ │ - beq.n 7ac34 │ │ + beq.n 7ac9c │ │ adds r3, #1 │ │ cmp r4, r3 │ │ - bne.n 7ac26 │ │ - b.n 7ad10 │ │ + bne.n 7ac8e │ │ + b.n 7ad78 │ │ adds r4, r3, r6 │ │ add.w r2, r9, r4 │ │ add.w r9, r2, #1 │ │ ldr r2, [sp, #12] │ │ str.w r9, [r1, #12] │ │ cmp r9, r2 │ │ - bcc.n 7ac70 │ │ + bcc.n 7acd8 │ │ ldr r2, [sp, #4] │ │ cmp r9, r2 │ │ - bhi.n 7ac70 │ │ + bhi.n 7acd8 │ │ ldr r2, [sp, #12] │ │ mov r5, r1 │ │ ldr r3, [sp, #16] │ │ mov r6, r0 │ │ sub.w r4, r9, r2 │ │ ldr r1, [sp, #0] │ │ add r3, r4 │ │ mov r0, r3 │ │ - blx d8860 │ │ + blx d8870 │ │ ldr.w ip, [sp, #8] │ │ mov r2, r0 │ │ mov r1, r5 │ │ mov r0, r6 │ │ - cbz r2, 7ac80 │ │ + cbz r2, 7ace8 │ │ cmp ip, r9 │ │ - bcs.n 7ab9e │ │ + bcs.n 7ac06 │ │ movs r2, #0 │ │ str r2, [r0, #0] │ │ add sp, #20 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r2, #1 │ │ strd r4, r9, [r0, #4] │ │ str r2, [r0, #0] │ │ add sp, #20 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r2, #0 │ │ cmp ip, r9 │ │ - bcc.n 7ad16 │ │ + bcc.n 7ad7e │ │ ldr r3, [sp, #16] │ │ mov r2, ip │ │ sub.w r2, r2, r9 │ │ add.w ip, r3, r9 │ │ cmp r2, #7 │ │ - bhi.n 7acc0 │ │ + bhi.n 7ad28 │ │ movs r3, #0 │ │ - cbz r2, 7acd6 │ │ + cbz r2, 7ad3e │ │ ldrb.w r6, [ip, r3] │ │ cmp r6, r8 │ │ - beq.n 7acdc │ │ + beq.n 7ad44 │ │ adds r3, #1 │ │ cmp r2, r3 │ │ - bne.n 7acaa │ │ + bne.n 7ad12 │ │ mov.w ip, #0 │ │ mov r3, r2 │ │ - b.n 7ace0 │ │ + b.n 7ad48 │ │ mov r6, r0 │ │ mov r4, r1 │ │ mov r0, r8 │ │ mov r1, ip │ │ - bl 413e8 │ │ + bl 416f0 │ │ mov ip, r0 │ │ mov r3, r1 │ │ mov r0, r6 │ │ mov r1, r4 │ │ - b.n 7ace0 │ │ + b.n 7ad48 │ │ mov.w ip, #0 │ │ - b.n 7ace0 │ │ + b.n 7ad48 │ │ mov.w ip, #1 │ │ movs.w r2, ip, lsl #31 │ │ ldr.w ip, [sp, #8] │ │ - beq.n 7ad10 │ │ + beq.n 7ad78 │ │ add.w r2, r9, r3 │ │ add.w r9, r2, #1 │ │ ldr r2, [sp, #12] │ │ str.w r9, [r1, #12] │ │ cmp r9, r2 │ │ - bcc.n 7ac90 │ │ + bcc.n 7acf8 │ │ ldr r2, [sp, #4] │ │ cmp r9, r2 │ │ - bhi.n 7ac90 │ │ - ldr r3, [pc, #28] @ (7ad20 ) │ │ + bhi.n 7acf8 │ │ + ldr r3, [pc, #28] @ (7ad88 ) │ │ movs r0, #0 │ │ ldr r1, [sp, #12] │ │ movs r2, #4 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ str.w ip, [r1, #12] │ │ movs r2, #0 │ │ str r2, [r0, #0] │ │ add sp, #20 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - asrs r6, r3, #6 │ │ + asrs r6, r0, #5 │ │ movs r6, r0 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ movs r0, #56 @ 0x38 │ │ @@ -124914,183 +124827,183 @@ │ │ movs r5, #4 │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 77834 │ │ + bl 7789c │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ - bmi.n 7ad0e │ │ + bl 3e2ac │ │ + bmi.n 7ad76 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #76 @ 0x4c │ │ ldr r1, [r0, #8] │ │ mov r8, r2 │ │ ldrd r6, r4, [r0] │ │ str r1, [sp, #20] │ │ ldr r1, [r2, #8] │ │ ldrh.w sl, [r0, #12] │ │ str r6, [sp, #16] │ │ - cbz r4, 7adb4 │ │ + cbz r4, 7ae1c │ │ cmp r6, #0 │ │ - beq.n 7ae16 │ │ + beq.n 7ae7e │ │ cmp r1, #0 │ │ itt eq │ │ ldrbeq r0, [r4, #0] │ │ cmpeq r0, #0 │ │ - beq.n 7adb8 │ │ + beq.n 7ae20 │ │ mov r0, r4 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r9, r0 │ │ cmp r0, #0 │ │ - beq.w 7aea0 │ │ + beq.w 7af08 │ │ mov r0, r9 │ │ - blx d87f0 │ │ + blx d8810 │ │ mov fp, r0 │ │ cmp r0, #0 │ │ - bne.n 7aea4 │ │ + bne.n 7af0c │ │ mov r1, r9 │ │ movs r0, #1 │ │ - bl 3dfa4 │ │ - b.n 7b02c │ │ - cbz r6, 7ae16 │ │ - cbnz r1, 7ae08 │ │ + bl 3e2ac │ │ + b.n 7b094 │ │ + cbz r6, 7ae7e │ │ + cbnz r1, 7ae70 │ │ ldr.w r0, [r8, #12] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ itt ne │ │ ldrne.w r1, [r8, #20] │ │ cmpne r1, #0 │ │ - bne.w 7afc6 │ │ + bne.w 7b02e │ │ add r0, sp, #24 │ │ - bl 91698 │ │ + bl 91704 │ │ ldrd lr, fp, [sp, #24] │ │ ldr.w r9, [sp, #32] │ │ ldr r3, [sp, #20] │ │ cmp.w lr, #2147483648 @ 0x80000000 │ │ - bne.n 7ae90 │ │ + bne.n 7aef8 │ │ uxtb.w r0, fp │ │ cmp r0, #3 │ │ - bne.n 7ae84 │ │ + bne.n 7aeec │ │ ldrd r4, r5, [r9] │ │ ldr r1, [r5, #0] │ │ - cbz r1, 7adf6 │ │ + cbz r1, 7ae5e │ │ mov r0, r4 │ │ blx r1 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r9 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov.w fp, #1 │ │ mov.w r9, #0 │ │ mov.w lr, #0 │ │ - b.n 7aeb0 │ │ + b.n 7af18 │ │ add r0, sp, #24 │ │ - bl 91698 │ │ + bl 91704 │ │ ldr.w lr, [sp, #24] │ │ ldr r3, [sp, #20] │ │ cmp.w lr, #2147483648 @ 0x80000000 │ │ - bne.n 7ae70 │ │ + bne.n 7aed8 │ │ ldrb.w r0, [sp, #28] │ │ cmp r0, #3 │ │ - bne.n 7ae84 │ │ + bne.n 7aeec │ │ ldr r4, [sp, #32] │ │ ldrd r5, r6, [r4] │ │ ldr r1, [r6, #0] │ │ - cbz r1, 7ae3e │ │ + cbz r1, 7aea6 │ │ mov r0, r5 │ │ blx r1 │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov.w fp, #1 │ │ mov.w r9, #0 │ │ mov.w lr, #0 │ │ ldrd r6, r3, [sp, #16] │ │ ldr.w r0, [r8, #12] │ │ str.w r8, [sp, #12] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.n 7aec0 │ │ - b.n 7aec6 │ │ + bne.n 7af28 │ │ + b.n 7af2e │ │ ldrd fp, r9, [sp, #28] │ │ ldr.w r0, [r8, #12] │ │ str.w r8, [sp, #12] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.n 7aec0 │ │ - b.n 7aec6 │ │ + bne.n 7af28 │ │ + b.n 7af2e │ │ mov.w fp, #1 │ │ mov.w r9, #0 │ │ mov.w lr, #0 │ │ ldr.w r0, [r8, #12] │ │ str.w r8, [sp, #12] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.n 7aec6 │ │ - b.n 7aec0 │ │ + beq.n 7af2e │ │ + b.n 7af28 │ │ mov.w fp, #1 │ │ mov r0, fp │ │ mov r1, r4 │ │ mov r2, r9 │ │ - bl d53c6 │ │ + bl d52ea │ │ mov lr, r9 │ │ ldr r3, [sp, #20] │ │ ldr.w r0, [r8, #12] │ │ str.w r8, [sp, #12] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.n 7aec6 │ │ + beq.n 7af2e │ │ cmp.w r9, #2 │ │ - bcs.n 7af7c │ │ + bcs.n 7afe4 │ │ movs r5, #0 │ │ movs r6, #0 │ │ cmp.w sl, #0 │ │ mov r0, sl │ │ mov sl, r3 │ │ it eq │ │ moveq.w sl, #4 │ │ cmp r3, #0 │ │ ite ne │ │ movne r3, r0 │ │ moveq.w sl, #4 │ │ - cbz r3, 7af18 │ │ + cbz r3, 7af80 │ │ lsls r4, r3, #3 │ │ mov r8, r0 │ │ mov r0, r4 │ │ str.w fp, [sp, #20] │ │ mov fp, lr │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 7b024 │ │ + beq.w 7b08c │ │ movs r1, #0 │ │ mov lr, fp │ │ add.w r2, sl, r1, lsl #2 │ │ ldr r3, [r2, #8] │ │ ldr r2, [r2, #20] │ │ str r3, [r0, r1] │ │ adds r3, r0, r1 │ │ adds r1, #8 │ │ cmp r4, r1 │ │ str r2, [r3, #4] │ │ - bne.n 7aefe │ │ + bne.n 7af66 │ │ ldrd r3, fp, [sp, #16] │ │ - b.n 7af20 │ │ + b.n 7af88 │ │ ldr r3, [sp, #16] │ │ mov.w r8, #0 │ │ movs r0, #4 │ │ ldr r2, [sp, #12] │ │ ldr r4, [sp, #4] │ │ strd r0, r8, [sp, #56] @ 0x38 │ │ ldr.w sl, [r2, #8] │ │ @@ -125101,17 +125014,17 @@ │ │ cmp sl, r1 │ │ str r4, [sp, #32] │ │ str r5, [sp, #24] │ │ strd lr, fp, [sp, #40] @ 0x28 │ │ str r3, [sp, #64] @ 0x40 │ │ str r0, [sp, #36] @ 0x24 │ │ str r6, [sp, #28] │ │ - bne.n 7af4e │ │ + bne.n 7afb6 │ │ mov r0, r8 │ │ - bl 918c4 │ │ + bl 91930 │ │ ldr.w r0, [r8, #4] │ │ add.w r1, sl, sl, lsl #1 │ │ add.w ip, r0, r1, lsl #4 │ │ add r1, sp, #24 │ │ ldmia r1!, {r0, r2, r3, r4, r5, r6} │ │ stmia.w ip!, {r0, r2, r3, r4, r5, r6} │ │ ldmia.w r1, {r0, r2, r3, r4, r5, r6} │ │ @@ -125124,167 +125037,167 @@ │ │ pop {r4, r5, r6, r7, pc} │ │ ldrd r0, ip, [r8, #16] │ │ sub.w r3, r9, #1 │ │ movs r2, #0 │ │ movw r4, #12065 @ 0x2f21 │ │ ldrh.w r1, [fp, r2] │ │ cmp r1, r4 │ │ - beq.n 7afa0 │ │ + beq.n 7b008 │ │ adds r2, #1 │ │ cmp r3, r2 │ │ - bne.n 7af8a │ │ + bne.n 7aff2 │ │ movs r5, #0 │ │ movs r6, #0 │ │ ldr r3, [sp, #20] │ │ - b.n 7aeca │ │ + b.n 7af32 │ │ cmp r2, r9 │ │ - bhi.n 7b012 │ │ + bhi.n 7b07a │ │ ldr r3, [sp, #20] │ │ cmp.w ip, #0 │ │ - beq.n 7aec6 │ │ + beq.n 7af2e │ │ rsb r1, ip, ip, lsl #3 │ │ lsls r1, r1, #3 │ │ ldr r2, [r0, #16] │ │ cmp r2, r6 │ │ itt ls │ │ ldrls r2, [r0, #20] │ │ cmpls r6, r2 │ │ - bcc.n 7b004 │ │ + bcc.n 7b06c │ │ adds r0, #56 @ 0x38 │ │ subs r1, #56 @ 0x38 │ │ - bne.n 7afb2 │ │ - b.n 7aec6 │ │ + bne.n 7b01a │ │ + b.n 7af2e │ │ rsb r1, r1, r1, lsl #3 │ │ ldr.w r0, [r8, #16] │ │ lsls r1, r1, #3 │ │ - b.n 7afda │ │ + b.n 7b042 │ │ adds r0, #56 @ 0x38 │ │ subs r1, #56 @ 0x38 │ │ - beq.w 7adcc │ │ + beq.w 7ae34 │ │ ldr r2, [r0, #16] │ │ cmp r2, r6 │ │ itt ls │ │ ldrls r2, [r0, #20] │ │ cmpls r6, r2 │ │ - bcs.n 7afd2 │ │ + bcs.n 7b03a │ │ ldr.w r9, [r0, #48] @ 0x30 │ │ cmp.w r9, #0 │ │ - beq.n 7afd2 │ │ + beq.n 7b03a │ │ ldr r4, [r0, #44] @ 0x2c │ │ mov r0, r9 │ │ movs r1, #1 │ │ - bl 4191c │ │ + bl 41c24 │ │ cmp r0, #0 │ │ - beq.w 7adaa │ │ + beq.w 7ae12 │ │ mov fp, r0 │ │ - b.n 7aea4 │ │ + b.n 7af0c │ │ ldrd r1, r0, [r0, #24] │ │ movs r6, #0 │ │ movs r5, #1 │ │ strd r1, r0, [sp, #4] │ │ - b.n 7aeca │ │ - ldr r0, [pc, #116] @ (7b088 ) │ │ + b.n 7af32 │ │ + ldr r0, [pc, #116] @ (7b0f0 ) │ │ mov r4, lr │ │ - ldr r2, [pc, #116] @ (7b08c ) │ │ + ldr r2, [pc, #116] @ (7b0f4 ) │ │ add r0, pc │ │ add r2, pc │ │ movs r1, #19 │ │ - bl 3fa58 │ │ - b.n 7b02c │ │ + bl 3fd60 │ │ + b.n 7b094 │ │ movs r0, #4 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ udf #254 @ 0xfe │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r9 │ │ - blx d87c0 │ │ - bl 416f6 │ │ + blx d87d0 │ │ + bl 419fe │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ - bl 416f6 │ │ + blx d87d0 │ │ + bl 419fe │ │ add r0, sp, #24 │ │ - bl 91902 │ │ - bl 416f6 │ │ + bl 9196e │ │ + bl 419fe │ │ cmp.w fp, #0 │ │ - beq.n 7b07a │ │ + beq.n 7b0e2 │ │ ldr r0, [sp, #20] │ │ - blx d87c0 │ │ - bl 416f6 │ │ - bl 416f6 │ │ - cbnz r4, 7b07e │ │ - bl 416f6 │ │ + blx d87d0 │ │ + bl 419fe │ │ + bl 419fe │ │ + cbnz r4, 7b0e6 │ │ + bl 419fe │ │ mov r0, fp │ │ - blx d87c0 │ │ - bl 416f6 │ │ - svc 127 @ 0x7f │ │ - vqshrn.u64 d16, q13, #7 │ │ + blx d87d0 │ │ + bl 419fe │ │ + svc 23 │ │ + vtbx.8 d16, {d25}, d18 │ │ movs r6, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #16 │ │ mov r5, r0 │ │ mov r0, sp │ │ mov r6, r3 │ │ - bl 3edda │ │ + bl 3f0e2 │ │ ldr r0, [sp, #0] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.n 7b0c6 │ │ + bne.n 7b12e │ │ ldrd r4, r8, [sp, #4] │ │ ldr r2, [r6, #0] │ │ mov r0, r5 │ │ mov r1, r4 │ │ - bl 7a9d4 │ │ + bl 7aa3c │ │ movs r0, #0 │ │ cmp.w r8, #0 │ │ strb r0, [r4, #0] │ │ - bne.n 7b0d6 │ │ - b.n 7b0e6 │ │ - ldr r1, [pc, #64] @ (7b108 ) │ │ + bne.n 7b13e │ │ + b.n 7b14e │ │ + ldr r1, [pc, #64] @ (7b170 ) │ │ add r1, pc │ │ ldrd r1, r2, [r1] │ │ strd r1, r2, [r5] │ │ - cbz r0, 7b0e6 │ │ + cbz r0, 7b14e │ │ ldr r4, [sp, #4] │ │ mov r0, r4 │ │ add sp, #16 │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #16 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ mov r5, r0 │ │ movs r0, #0 │ │ cmp.w r8, #0 │ │ strb r0, [r4, #0] │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ nop │ │ - lsrs r4, r3, #11 │ │ + lsrs r4, r0, #10 │ │ movs r6, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #108 @ 0x6c │ │ mov r4, r0 │ │ cmp r2, #52 @ 0x34 │ │ - bcs.n 7b12c │ │ + bcs.n 7b194 │ │ mov.w r5, #2147483648 @ 0x80000000 │ │ movs r1, #64 @ 0x40 │ │ str r5, [r4, r1] │ │ add sp, #108 @ 0x6c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r0, [r1, #0] │ │ @@ -125294,85 +125207,85 @@ │ │ movt r2, #17996 @ 0x464c │ │ cmp r0, r2 │ │ mov.w r5, #2147483648 @ 0x80000000 │ │ mov.w r1, #64 @ 0x40 │ │ itt eq │ │ ldrbeq r0, [r6, #4] │ │ cmpeq r0, #1 │ │ - beq.n 7b156 │ │ + beq.n 7b1be │ │ str r5, [r4, r1] │ │ add sp, #108 @ 0x6c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrb r0, [r6, #5] │ │ subs r1, r0, #1 │ │ cmp r1, #1 │ │ - bhi.w 7b2f6 │ │ + bhi.w 7b35e │ │ ldrb r2, [r6, #6] │ │ movs r1, #64 @ 0x40 │ │ cmp r2, #1 │ │ - bne.n 7b14c │ │ + bne.n 7b1b4 │ │ cmp r0, #2 │ │ - beq.n 7b14c │ │ + beq.n 7b1b4 │ │ ldr r0, [r6, #32] │ │ cmp r0, #0 │ │ - beq.n 7b1f8 │ │ + beq.n 7b260 │ │ ldrh r3, [r6, #48] @ 0x30 │ │ - cbz r3, 7b1d8 │ │ + cbz r3, 7b240 │ │ ldrh r1, [r6, #46] @ 0x2e │ │ cmp r1, #40 @ 0x28 │ │ - bne.w 7b2f6 │ │ + bne.w 7b35e │ │ movs r1, #40 @ 0x28 │ │ umull r2, r1, r3, r1 │ │ cmp r1, #0 │ │ - bne.w 7b2f6 │ │ + bne.w 7b35e │ │ cmp r8, r0 │ │ mov.w r1, #64 @ 0x40 │ │ ittt cs │ │ strcs r3, [sp, #84] @ 0x54 │ │ subcs.w r3, r8, r0 │ │ cmpcs r3, r2 │ │ - bcc.n 7b14c │ │ + bcc.n 7b1b4 │ │ ldrh r2, [r6, #50] @ 0x32 │ │ adds r3, r6, r0 │ │ movw r0, #65535 @ 0xffff │ │ cmp r2, r0 │ │ it eq │ │ ldreq r2, [r3, #24] │ │ ldr r0, [sp, #84] @ 0x54 │ │ cmp r2, #0 │ │ - beq.n 7b14c │ │ + beq.n 7b1b4 │ │ cmp r2, r0 │ │ str r3, [sp, #80] @ 0x50 │ │ - bcs.n 7b14c │ │ + bcs.n 7b1b4 │ │ add.w r0, r2, r2, lsl #2 │ │ ldr r5, [sp, #80] @ 0x50 │ │ movs r2, #0 │ │ add.w r0, r5, r0, lsl #3 │ │ ldr r1, [r0, #4] │ │ cmp r1, #8 │ │ - bne.w 7b37a │ │ + bne.w 7b3e2 │ │ movs r0, #0 │ │ str r0, [sp, #72] @ 0x48 │ │ strd r0, r0, [sp, #56] @ 0x38 │ │ strd r0, r0, [sp, #64] @ 0x40 │ │ - b.n 7b390 │ │ + b.n 7b3f8 │ │ ldrh r1, [r6, #46] @ 0x2e │ │ cmp r1, #40 @ 0x28 │ │ - bne.w 7b2f6 │ │ + bne.w 7b35e │ │ cmp r8, r0 │ │ mov.w r1, #64 @ 0x40 │ │ itt cs │ │ subcs.w r2, r8, r0 │ │ cmpcs r2, #40 @ 0x28 │ │ - bcc.n 7b14c │ │ + bcc.n 7b1b4 │ │ adds r1, r6, r0 │ │ ldr r3, [r1, #20] │ │ cmp r3, #0 │ │ - bne.n 7b17e │ │ + bne.n 7b1e6 │ │ movs r0, #0 │ │ mov.w r9, #1 │ │ str r0, [sp, #72] @ 0x48 │ │ movs r0, #1 │ │ str r0, [sp, #80] @ 0x50 │ │ movs r0, #0 │ │ str r0, [sp, #68] @ 0x44 │ │ @@ -125381,73 +125294,73 @@ │ │ strd r0, r0, [sp, #52] @ 0x34 │ │ strd r0, r0, [sp, #44] @ 0x2c │ │ strd r0, r0, [sp, #36] @ 0x24 │ │ mov.w sl, #0 │ │ add.w fp, r9, sl, lsl #4 │ │ mov.w r0, sl, lsl #4 │ │ cmp r0, #0 │ │ - beq.n 7b302 │ │ + beq.n 7b36a │ │ ldrb.w r2, [r9, #12] │ │ mov r1, r9 │ │ subs r0, #16 │ │ add.w r9, r9, #16 │ │ and.w r2, r2, #15 │ │ subs r2, #3 │ │ cmn.w r2, #2 │ │ - bcc.n 7b226 │ │ + bcc.n 7b28e │ │ ldrh r1, [r1, #14] │ │ cmp r1, #0 │ │ - beq.n 7b226 │ │ + beq.n 7b28e │ │ ldr.w r0, [r9, #-16] │ │ str r0, [sp, #76] @ 0x4c │ │ movs r0, #96 @ 0x60 │ │ ldr.w sl, [r9, #-12] │ │ ldr.w r5, [r9, #-8] │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 7b630 │ │ + beq.w 7b698 │ │ movs r1, #0 │ │ add.w lr, sp, #88 @ 0x58 │ │ strd r5, r1, [r0, #8] │ │ movs r5, #1 │ │ strd sl, r1, [r0] │ │ mov.w ip, #24 │ │ ldr r1, [sp, #76] @ 0x4c │ │ str r1, [r0, #16] │ │ movs r1, #4 │ │ strd r0, r5, [sp, #92] @ 0x5c │ │ str r1, [sp, #88] @ 0x58 │ │ cmp r9, fp │ │ - beq.n 7b31c │ │ + beq.n 7b384 │ │ ldrb.w r2, [r9, #12] │ │ mov r1, r9 │ │ add.w r9, r9, #16 │ │ and.w r2, r2, #15 │ │ subs r2, #3 │ │ cmn.w r2, #2 │ │ - bcc.n 7b282 │ │ + bcc.n 7b2ea │ │ ldrh r1, [r1, #14] │ │ cmp r1, #0 │ │ - beq.n 7b282 │ │ + beq.n 7b2ea │ │ ldr.w r2, [r9, #-16] │ │ ldr r1, [sp, #88] @ 0x58 │ │ str r2, [sp, #76] @ 0x4c │ │ ldr.w r2, [r9, #-12] │ │ cmp r5, r1 │ │ str r2, [sp, #28] │ │ ldr.w r2, [r9, #-8] │ │ str r2, [sp, #32] │ │ - bne.n 7b2d4 │ │ + bne.n 7b33c │ │ mov r0, lr │ │ mov r1, r5 │ │ movs r2, #1 │ │ movs r3, #8 │ │ str.w ip, [sp] │ │ mov sl, lr │ │ - bl 77788 │ │ + bl 777f0 │ │ ldr r0, [sp, #92] @ 0x5c │ │ mov.w ip, #24 │ │ mov lr, sl │ │ add.w r1, r5, r5, lsl #1 │ │ ldr r2, [sp, #28] │ │ ldr r3, [sp, #32] │ │ adds r5, #1 │ │ @@ -125455,35 +125368,35 @@ │ │ add.w r1, r0, r1, lsl #3 │ │ movs r2, #0 │ │ str r2, [r1, #4] │ │ strd r3, r2, [r1, #8] │ │ ldr r2, [sp, #76] @ 0x4c │ │ str r2, [r1, #16] │ │ str r5, [sp, #96] @ 0x60 │ │ - b.n 7b282 │ │ + b.n 7b2ea │ │ movs r1, #64 @ 0x40 │ │ str r5, [r4, r1] │ │ add sp, #108 @ 0x6c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #8 │ │ ldrd fp, r9, [sp, #80] @ 0x50 │ │ str r0, [sp, #76] @ 0x4c │ │ movs r5, #0 │ │ ldr r2, [sp, #72] @ 0x48 │ │ mov.w lr, #0 │ │ ldrd sl, r3, [sp, #64] @ 0x40 │ │ ldrd r1, r0, [sp, #48] @ 0x30 │ │ - b.n 7b33c │ │ + b.n 7b3a4 │ │ ldr r0, [sp, #88] @ 0x58 │ │ cmp r5, #2 │ │ str r0, [sp, #32] │ │ ldr r0, [sp, #92] @ 0x5c │ │ str r0, [sp, #76] @ 0x4c │ │ - bcs.w 7b572 │ │ + bcs.w 7b5da │ │ ldrd fp, r9, [sp, #80] @ 0x50 │ │ ldr r2, [sp, #72] @ 0x48 │ │ ldrd sl, r3, [sp, #64] @ 0x40 │ │ ldrd r1, r0, [sp, #48] @ 0x30 │ │ ldr.w lr, [sp, #32] │ │ strd r0, r8, [r4, #40] @ 0x28 │ │ ldr r0, [sp, #40] @ 0x28 │ │ @@ -125522,188 +125435,188 @@ │ │ movs r3, #0 │ │ mov r2, r5 │ │ add.w r0, lr, lr, lsl #2 │ │ mov.w fp, r0, lsl #3 │ │ mov r0, fp │ │ ldr r1, [r2, #4] │ │ cmp r1, #2 │ │ - beq.n 7b3ce │ │ + beq.n 7b436 │ │ adds r2, #40 @ 0x28 │ │ adds r3, #1 │ │ subs r0, #40 @ 0x28 │ │ - bne.n 7b3a2 │ │ + bne.n 7b40a │ │ movs r3, #0 │ │ mov r0, fp │ │ mov r2, r5 │ │ ldr r1, [r2, #4] │ │ cmp r1, #11 │ │ - beq.n 7b3fe │ │ + beq.n 7b466 │ │ adds r2, #40 @ 0x28 │ │ adds r3, #1 │ │ subs r0, #40 @ 0x28 │ │ - bne.n 7b3b6 │ │ + bne.n 7b41e │ │ movs r0, #0 │ │ mov.w r9, #1 │ │ str r0, [sp, #52] @ 0x34 │ │ - b.n 7b212 │ │ + b.n 7b27a │ │ ldr.w ip, [r2, #20] │ │ cmp.w ip, #0 │ │ - beq.n 7b42e │ │ + beq.n 7b496 │ │ mov.w r5, #2147483648 @ 0x80000000 │ │ movs r1, #64 @ 0x40 │ │ movs.w r0, ip, lsl #28 │ │ - bne.w 7b14c │ │ + bne.w 7b1b4 │ │ ldr r0, [r2, #16] │ │ subs.w r9, r8, r0 │ │ it cs │ │ cmpcs r9, ip │ │ - bcc.w 7b14c │ │ + bcc.w 7b1b4 │ │ ldr.w lr, [sp, #84] @ 0x54 │ │ add.w r9, r6, r0 │ │ - b.n 7b432 │ │ + b.n 7b49a │ │ ldr.w ip, [r2, #20] │ │ cmp.w ip, #0 │ │ - beq.n 7b4dc │ │ + beq.n 7b544 │ │ mov.w r5, #2147483648 @ 0x80000000 │ │ movs r1, #64 @ 0x40 │ │ movs.w r0, ip, lsl #28 │ │ - bne.w 7b14c │ │ + bne.w 7b1b4 │ │ ldr r0, [r2, #16] │ │ subs.w r9, r8, r0 │ │ it cs │ │ cmpcs r9, ip │ │ - bcc.w 7b14c │ │ + bcc.w 7b1b4 │ │ ldr.w lr, [sp, #84] @ 0x54 │ │ add.w r9, r6, r0 │ │ - b.n 7b4e0 │ │ + b.n 7b548 │ │ mov.w r9, #1 │ │ ldr r0, [r2, #24] │ │ - cbz r0, 7b46a │ │ + cbz r0, 7b4d2 │ │ ldr r2, [sp, #80] @ 0x50 │ │ cmp r0, lr │ │ - bcs.w 7b11c │ │ + bcs.w 7b184 │ │ add.w r0, r0, r0, lsl #2 │ │ add.w r0, r2, r0, lsl #3 │ │ ldr r1, [r0, #4] │ │ cmp r1, #3 │ │ - bne.w 7b11c │ │ + bne.w 7b184 │ │ ldr r1, [r0, #16] │ │ movs r5, #0 │ │ ldr r0, [r0, #20] │ │ str r1, [sp, #48] @ 0x30 │ │ adds r0, r0, r1 │ │ str r0, [sp, #44] @ 0x2c │ │ mov.w r0, #0 │ │ str r6, [sp, #52] @ 0x34 │ │ str r0, [sp, #40] @ 0x28 │ │ adc.w r0, r5, #0 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n 7b478 │ │ + b.n 7b4e0 │ │ movs r0, #0 │ │ ldr r2, [sp, #80] @ 0x50 │ │ str r0, [sp, #52] @ 0x34 │ │ strd r0, r0, [sp, #44] @ 0x2c │ │ strd r0, r0, [sp, #36] @ 0x24 │ │ add.w r0, r2, #16 │ │ mov.w sl, ip, lsr #4 │ │ mov lr, fp │ │ mov.w r5, #2147483648 @ 0x80000000 │ │ str.w ip, [sp, #32] │ │ str.w fp, [sp, #76] @ 0x4c │ │ - b.n 7b498 │ │ + b.n 7b500 │ │ adds r0, #40 @ 0x28 │ │ subs.w lr, lr, #40 @ 0x28 │ │ - beq.n 7b4ca │ │ + beq.n 7b532 │ │ ldr.w r1, [r0, #-12] │ │ cmp r1, #18 │ │ itt eq │ │ ldreq r1, [r0, #8] │ │ cmpeq r1, r3 │ │ - bne.n 7b490 │ │ + bne.n 7b4f8 │ │ ldr.w fp, [r0, #4] │ │ cmp.w fp, #0 │ │ - beq.n 7b490 │ │ + beq.n 7b4f8 │ │ movs.w r1, fp, lsl #30 │ │ mov.w r1, #64 @ 0x40 │ │ - bne.w 7b14c │ │ + bne.w 7b1b4 │ │ ldr r2, [r0, #0] │ │ subs.w ip, r8, r2 │ │ it cs │ │ cmpcs ip, fp │ │ - bcs.n 7b490 │ │ - b.n 7b14c │ │ + bcs.n 7b4f8 │ │ + b.n 7b1b4 │ │ ldr.w lr, [sp, #84] @ 0x54 │ │ ldrd fp, r5, [sp, #76] @ 0x4c │ │ ldr r0, [sp, #32] │ │ cmp r0, #15 │ │ - bhi.w 7b21e │ │ - b.n 7b3b0 │ │ + bhi.w 7b286 │ │ + b.n 7b418 │ │ mov.w r9, #1 │ │ ldr r0, [r2, #24] │ │ - cbz r0, 7b518 │ │ + cbz r0, 7b580 │ │ ldr r2, [sp, #80] @ 0x50 │ │ cmp r0, lr │ │ - bcs.w 7b11c │ │ + bcs.w 7b184 │ │ add.w r0, r0, r0, lsl #2 │ │ add.w r0, r2, r0, lsl #3 │ │ ldr r1, [r0, #4] │ │ cmp r1, #3 │ │ - bne.w 7b11c │ │ + bne.w 7b184 │ │ ldr r1, [r0, #16] │ │ movs r5, #0 │ │ ldr r0, [r0, #20] │ │ str r1, [sp, #48] @ 0x30 │ │ adds r0, r0, r1 │ │ str r0, [sp, #44] @ 0x2c │ │ mov.w r0, #0 │ │ str r6, [sp, #52] @ 0x34 │ │ str r0, [sp, #40] @ 0x28 │ │ adc.w r0, r5, #0 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n 7b526 │ │ + b.n 7b58e │ │ movs r0, #0 │ │ ldr r2, [sp, #80] @ 0x50 │ │ str r0, [sp, #52] @ 0x34 │ │ strd r0, r0, [sp, #44] @ 0x2c │ │ strd r0, r0, [sp, #36] @ 0x24 │ │ add.w r0, r2, #16 │ │ mov.w sl, ip, lsr #4 │ │ mov.w r5, #2147483648 @ 0x80000000 │ │ - b.n 7b53e │ │ + b.n 7b5a6 │ │ adds r0, #40 @ 0x28 │ │ subs.w fp, fp, #40 @ 0x28 │ │ - beq.w 7b21e │ │ + beq.w 7b286 │ │ ldr.w r1, [r0, #-12] │ │ cmp r1, #18 │ │ itt eq │ │ ldreq r1, [r0, #8] │ │ cmpeq r1, r3 │ │ - bne.n 7b534 │ │ + bne.n 7b59c │ │ ldr.w ip, [r0, #4] │ │ cmp.w ip, #0 │ │ - beq.n 7b534 │ │ + beq.n 7b59c │ │ movs.w r1, ip, lsl #30 │ │ mov.w r1, #64 @ 0x40 │ │ - bne.w 7b14c │ │ + bne.w 7b1b4 │ │ ldr r2, [r0, #0] │ │ subs.w r2, r8, r2 │ │ - bcc.w 7b14c │ │ + bcc.w 7b1b4 │ │ cmp r2, ip │ │ - bcs.n 7b534 │ │ - b.n 7b14c │ │ + bcs.n 7b59c │ │ + b.n 7b1b4 │ │ cmp r5, #21 │ │ - bcs.n 7b638 │ │ + bcs.n 7b6a0 │ │ ldr.w lr, [sp, #76] @ 0x4c │ │ add.w r0, r5, r5, lsl #1 │ │ movs r3, #0 │ │ add.w r9, lr, r0, lsl #3 │ │ add.w r0, lr, #24 │ │ mov r1, lr │ │ str.w r9, [sp, #4] │ │ - b.n 7b5c4 │ │ + b.n 7b62c │ │ ldr.w lr, [sp, #76] @ 0x4c │ │ mov r1, lr │ │ ldrd r9, r2, [sp, #88] @ 0x58 │ │ ldr r0, [sp, #16] │ │ str r0, [r1, #0] │ │ ldr r0, [sp, #20] │ │ strd r0, r9, [r1, #4] │ │ @@ -125712,23 +125625,23 @@ │ │ stmia.w r0, {r2, r3, ip} │ │ ldr r3, [sp, #12] │ │ ldrd r9, sl, [sp, #4] │ │ add.w r0, sl, #24 │ │ adds r3, #24 │ │ mov r1, sl │ │ cmp r0, r9 │ │ - beq.w 7b32a │ │ + beq.w 7b392 │ │ mov sl, r0 │ │ ldrd r2, r0, [r1, #24] │ │ ldrd fp, ip, [r1] │ │ str r2, [sp, #16] │ │ subs.w r2, r2, fp │ │ str r0, [sp, #20] │ │ sbcs.w r2, r0, ip │ │ - bcs.n 7b5b6 │ │ + bcs.n 7b61e │ │ ldrd r0, ip, [r1, #32] │ │ ldrd r2, r1, [r1, #40] @ 0x28 │ │ strd r2, r1, [sp, #96] @ 0x60 │ │ mov r1, r3 │ │ str.w sl, [sp, #8] │ │ strd r0, ip, [sp, #88] @ 0x58 │ │ str r3, [sp, #12] │ │ @@ -125738,339 +125651,339 @@ │ │ str r1, [sp, #28] │ │ mov r2, r0 │ │ ldr r1, [sp, #28] │ │ ldmia.w r2, {r3, r9, sl, fp, ip, lr} │ │ stmia.w r1, {r3, r9, sl, fp, ip, lr} │ │ ldr r1, [sp, #24] │ │ cmp r1, #0 │ │ - beq.n 7b590 │ │ + beq.n 7b5f8 │ │ ldrd r0, r2, [r0, #-24] │ │ subs r1, #24 │ │ ldr r3, [sp, #16] │ │ ldr.w lr, [sp, #76] @ 0x4c │ │ subs r0, r3, r0 │ │ ldr r0, [sp, #20] │ │ sbcs r0, r2 │ │ - bcc.n 7b5f4 │ │ + bcc.n 7b65c │ │ add.w r0, lr, r1 │ │ add.w r1, r0, #24 │ │ - b.n 7b596 │ │ + b.n 7b5fe │ │ movs r0, #8 │ │ movs r1, #96 @ 0x60 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ ldr r0, [sp, #76] @ 0x4c │ │ mov r1, r5 │ │ - bl 90b34 │ │ - b.n 7b32a │ │ + bl 90ba0 │ │ + b.n 7b392 │ │ mov r4, r0 │ │ ldr r0, [sp, #32] │ │ - cbnz r0, 7b654 │ │ - b.n 7b65a │ │ + cbnz r0, 7b6bc │ │ + b.n 7b6c2 │ │ mov r4, r0 │ │ ldr r0, [sp, #88] @ 0x58 │ │ - cbz r0, 7b65a │ │ + cbz r0, 7b6c2 │ │ ldr r0, [sp, #92] @ 0x5c │ │ str r0, [sp, #76] @ 0x4c │ │ ldr r0, [sp, #76] @ 0x4c │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ ldrd r8, r6, [r0, #4] │ │ mov r4, r0 │ │ - cbz r6, 7b688 │ │ + cbz r6, 7b6f0 │ │ add.w r5, r8, #4 │ │ ldr.w r0, [r5, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #12 │ │ subs r6, #1 │ │ - bne.n 7b674 │ │ + bne.n 7b6dc │ │ ldr r0, [r4, #0] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r8, r6, [r4, #16] │ │ - cbz r6, 7b6ac │ │ + cbz r6, 7b714 │ │ add.w r5, r8, #4 │ │ ldrd r0, r1, [r5, #-4] │ │ - blx d89d0 │ │ + blx d89e0 │ │ adds r5, #8 │ │ subs r6, #1 │ │ - bne.n 7b69e │ │ + bne.n 7b706 │ │ ldr r0, [r4, #12] │ │ - cbz r0, 7b6be │ │ + cbz r0, 7b726 │ │ mov r0, r8 │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ subw sp, sp, #1340 @ 0x53c │ │ mov r6, r2 │ │ mov r9, r1 │ │ str r3, [sp, #148] @ 0x94 │ │ str r0, [sp, #96] @ 0x60 │ │ - ldr r2, [pc, #16] @ (7b6ec ) │ │ + ldr r2, [pc, #16] @ (7b754 ) │ │ mov r0, r6 │ │ movs r3, #13 │ │ str r6, [sp, #144] @ 0x90 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #196] @ 0xc4 │ │ - b.n 7b6f0 │ │ + b.n 7b758 │ │ nop │ │ - bls.n 7b684 │ │ + bls.n 7b81c │ │ vqshrn.u64 d25, , #7 │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #196] @ 0xc4 │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #140] @ 0x8c │ │ - ldr r2, [pc, #16] @ (7b714 ) │ │ + ldr r2, [pc, #16] @ (7b77c ) │ │ mov r0, r6 │ │ mov r1, r9 │ │ movs r3, #11 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #192] @ 0xc0 │ │ - b.n 7b718 │ │ + b.n 7b780 │ │ nop │ │ - bls.n 7b676 │ │ + bls.n 7b80e │ │ vqshrn.u64 d25, q8, #7 │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #192] @ 0xc0 │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #136] @ 0x88 │ │ - ldr r2, [pc, #16] @ (7b73c ) │ │ + ldr r2, [pc, #16] @ (7b7a4 ) │ │ mov r0, r6 │ │ mov r1, r9 │ │ movs r3, #14 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #188] @ 0xbc │ │ - b.n 7b740 │ │ + b.n 7b7a8 │ │ nop │ │ - bls.n 7b664 │ │ + bls.n 7b7fc │ │ vtbl.8 d25, {d9-d10}, d31 │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #188] @ 0xbc │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #132] @ 0x84 │ │ - ldr r2, [pc, #16] @ (7b764 ) │ │ + ldr r2, [pc, #16] @ (7b7cc ) │ │ mov r0, r6 │ │ mov r1, r9 │ │ movs r3, #11 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #184] @ 0xb8 │ │ - b.n 7b768 │ │ + b.n 7b7d0 │ │ nop │ │ - bls.n 7b858 │ │ + bls.n 7b7f0 │ │ vtbl.8 d25, {d9-d10}, d30 │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #184] @ 0xb8 │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #128] @ 0x80 │ │ - ldr r2, [pc, #16] @ (7b78c ) │ │ + ldr r2, [pc, #16] @ (7b7f4 ) │ │ mov r0, r6 │ │ mov r1, r9 │ │ movs r3, #11 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #180] @ 0xb4 │ │ - b.n 7b790 │ │ + b.n 7b7f8 │ │ nop │ │ - bls.n 7b846 │ │ + bhi.n 7b7de │ │ vtbl.8 d25, {d9-d10}, d29 │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #180] @ 0xb4 │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #124] @ 0x7c │ │ - ldr r2, [pc, #16] @ (7b7b4 ) │ │ + ldr r2, [pc, #16] @ (7b81c ) │ │ mov r0, r6 │ │ mov r1, r9 │ │ movs r3, #15 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #176] @ 0xb0 │ │ - b.n 7b7b8 │ │ + b.n 7b820 │ │ nop │ │ - bls.n 7b834 │ │ + bhi.n 7b7cc │ │ vtbl.8 d25, {d9-d10}, d28 │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #176] @ 0xb0 │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #120] @ 0x78 │ │ - ldr r2, [pc, #16] @ (7b7dc ) │ │ + ldr r2, [pc, #16] @ (7b844 ) │ │ mov r0, r6 │ │ mov r1, r9 │ │ movs r3, #14 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #172] @ 0xac │ │ - b.n 7b7e0 │ │ + b.n 7b848 │ │ nop │ │ - bls.n 7b85c │ │ + bhi.n 7b7f4 │ │ vtbl.8 d25, {d9-d10}, d27 │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #172] @ 0xac │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #116] @ 0x74 │ │ - ldr r2, [pc, #16] @ (7b804 ) │ │ + ldr r2, [pc, #16] @ (7b86c ) │ │ mov r0, r6 │ │ mov r1, r9 │ │ movs r3, #12 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #168] @ 0xa8 │ │ - b.n 7b808 │ │ + b.n 7b870 │ │ nop │ │ - bls.n 7b850 │ │ + bhi.n 7b7e8 │ │ vtbl.8 d25, {d9-d10}, d26 │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #168] @ 0xa8 │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #112] @ 0x70 │ │ - ldr r2, [pc, #16] @ (7b82c ) │ │ + ldr r2, [pc, #16] @ (7b894 ) │ │ mov r0, r6 │ │ mov r1, r9 │ │ movs r3, #10 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #164] @ 0xa4 │ │ - b.n 7b830 │ │ + b.n 7b898 │ │ nop │ │ - bls.n 7b878 │ │ + bhi.n 7b810 │ │ vtbl.8 d25, {d9-d10}, d25 │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #164] @ 0xa4 │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #108] @ 0x6c │ │ - ldr r2, [pc, #16] @ (7b854 ) │ │ + ldr r2, [pc, #16] @ (7b8bc ) │ │ mov r0, r6 │ │ mov r1, r9 │ │ movs r3, #18 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #160] @ 0xa0 │ │ - b.n 7b858 │ │ + b.n 7b8c0 │ │ nop │ │ - bls.n 7b864 │ │ + bhi.n 7b7fc │ │ vtbl.8 d25, {d9-d10}, d24 │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #160] @ 0xa0 │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #104] @ 0x68 │ │ - ldr r2, [pc, #16] @ (7b87c ) │ │ + ldr r2, [pc, #16] @ (7b8e4 ) │ │ mov r0, r6 │ │ mov r1, r9 │ │ movs r3, #12 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #156] @ 0x9c │ │ - b.n 7b880 │ │ + b.n 7b8e8 │ │ nop │ │ - bhi.n 7b860 │ │ + bhi.n 7b7f8 │ │ vclt.f32 d20, d4, #0 │ │ cmp r0, #0 │ │ ldr r0, [sp, #156] @ 0x9c │ │ it eq │ │ moveq r0, r4 │ │ str r0, [sp, #156] @ 0x9c │ │ it eq │ │ moveq r4, #1 │ │ - ldr r2, [pc, #16] @ (7b8a4 ) │ │ + ldr r2, [pc, #16] @ (7b90c ) │ │ mov r0, r6 │ │ mov r1, r9 │ │ movs r3, #10 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #152] @ 0x98 │ │ - b.n 7b8a8 │ │ + b.n 7b910 │ │ nop │ │ - bhi.n 7b962 │ │ + bvc.n 7b8fa │ │ vclt.f32 d20, d5, #0 │ │ cmp r0, #0 │ │ ldr r0, [sp, #152] @ 0x98 │ │ it eq │ │ moveq r0, r5 │ │ str r0, [sp, #152] @ 0x98 │ │ it eq │ │ moveq r5, #1 │ │ - ldr r2, [pc, #12] @ (7b8c8 ) │ │ + ldr r2, [pc, #12] @ (7b930 ) │ │ mov r0, r6 │ │ mov r1, r9 │ │ movs r3, #15 │ │ add r2, pc │ │ - bl 7e490 │ │ - b.n 7b8cc │ │ - bhi.n 7b94a │ │ + bl 7e4f8 │ │ + b.n 7b934 │ │ + bvc.n 7b8e2 │ │ vrsubhn.i d20, , │ │ mov r8, r1 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r8, r0 │ │ moveq.w fp, #1 │ │ - ldr r2, [pc, #16] @ (7b8ec ) │ │ + ldr r2, [pc, #16] @ (7b954 ) │ │ mov r0, r6 │ │ mov r1, r9 │ │ movs r3, #13 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #100] @ 0x64 │ │ - b.n 7b8f0 │ │ - bhi.n 7b97c │ │ + b.n 7b958 │ │ + bvc.n 7b914 │ │ vtbl.8 d20, {d9-d11}, d4 │ │ mov sl, r0 │ │ mov r0, r6 │ │ mov r1, r9 │ │ add r2, pc │ │ movs r3, #15 │ │ - bl 7e490 │ │ - b.n 7b908 │ │ + bl 7e4f8 │ │ + b.n 7b970 │ │ nop │ │ - bhi.n 7b982 │ │ + bvc.n 7b91a │ │ vclt.s32 d18, d0, #0 │ │ str.w r9, [sp, #92] @ 0x5c │ │ strb.w r2, [sp, #336] @ 0x150 │ │ cmp r0, #0 │ │ str r2, [sp, #332] @ 0x14c │ │ strd r2, r2, [sp, #320] @ 0x140 │ │ ldr r2, [sp, #152] @ 0x98 │ │ @@ -126132,243 +126045,243 @@ │ │ it eq │ │ moveq.w sl, #1 │ │ ldr.w r9, [sp, #148] @ 0x94 │ │ str.w sl, [sp, #304] @ 0x130 │ │ ldr.w r4, [r9, #64] @ 0x40 │ │ str r4, [sp, #184] @ 0xb8 │ │ cmp.w r4, #2147483648 @ 0x80000000 │ │ - beq.w 7bc62 │ │ - ldr r2, [pc, #20] @ (7b9c4 ) │ │ + beq.w 7bcca │ │ + ldr r2, [pc, #20] @ (7ba2c ) │ │ mov r0, r9 │ │ ldr r6, [sp, #92] @ 0x5c │ │ movs r3, #13 │ │ add r2, pc │ │ mov r1, r6 │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #196] @ 0xc4 │ │ - b.n 7b9c8 │ │ + b.n 7ba30 │ │ nop │ │ - bvs.n 7b9b0 │ │ + bvs.n 7b948 │ │ vqshrn.u64 d25, , #7 │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #196] @ 0xc4 │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #136] @ 0x88 │ │ - ldr r2, [pc, #16] @ (7b9ec ) │ │ + ldr r2, [pc, #16] @ (7ba54 ) │ │ mov r0, r9 │ │ mov r1, r6 │ │ movs r3, #11 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #192] @ 0xc0 │ │ - b.n 7b9f0 │ │ + b.n 7ba58 │ │ nop │ │ - bvs.n 7b99e │ │ + bvs.n 7bb36 │ │ vqshrn.u64 d25, q8, #7 │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #192] @ 0xc0 │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #132] @ 0x84 │ │ - ldr r2, [pc, #16] @ (7ba14 ) │ │ + ldr r2, [pc, #16] @ (7ba7c ) │ │ mov r0, r9 │ │ mov r1, r6 │ │ movs r3, #14 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #188] @ 0xbc │ │ - b.n 7ba18 │ │ + b.n 7ba80 │ │ nop │ │ - bvs.n 7b98c │ │ + bvs.n 7bb24 │ │ vtbl.8 d25, {d9-d10}, d31 │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #188] @ 0xbc │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #128] @ 0x80 │ │ - ldr r2, [pc, #16] @ (7ba3c ) │ │ + ldr r2, [pc, #16] @ (7baa4 ) │ │ mov r0, r9 │ │ mov r1, r6 │ │ movs r3, #11 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #180] @ 0xb4 │ │ - b.n 7ba40 │ │ + b.n 7baa8 │ │ nop │ │ - bvs.n 7b980 │ │ + bvs.n 7bb18 │ │ vtbl.8 d25, {d9-d10}, d29 │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #180] @ 0xb4 │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #124] @ 0x7c │ │ - ldr r2, [pc, #16] @ (7ba64 ) │ │ + ldr r2, [pc, #16] @ (7bacc ) │ │ mov r0, r9 │ │ mov r1, r6 │ │ movs r3, #11 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #176] @ 0xb0 │ │ - b.n 7ba68 │ │ + b.n 7bad0 │ │ nop │ │ - bvs.n 7b96e │ │ + bvs.n 7bb06 │ │ vtbl.8 d25, {d9-d10}, d28 │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #176] @ 0xb0 │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #120] @ 0x78 │ │ - ldr r2, [pc, #16] @ (7ba8c ) │ │ + ldr r2, [pc, #16] @ (7baf4 ) │ │ mov r0, r9 │ │ mov r1, r6 │ │ movs r3, #15 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #172] @ 0xac │ │ - b.n 7ba90 │ │ + b.n 7baf8 │ │ nop │ │ - bvs.n 7bb5c │ │ + bpl.n 7baf4 │ │ vtbl.8 d25, {d9-d10}, d27 │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #172] @ 0xac │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #116] @ 0x74 │ │ - ldr r2, [pc, #16] @ (7bab4 ) │ │ + ldr r2, [pc, #16] @ (7bb1c ) │ │ mov r0, r9 │ │ mov r1, r6 │ │ movs r3, #14 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #168] @ 0xa8 │ │ - b.n 7bab8 │ │ + b.n 7bb20 │ │ nop │ │ - bvs.n 7bb84 │ │ + bpl.n 7bb1c │ │ vtbl.8 d25, {d9-d10}, d26 │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #168] @ 0xa8 │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #112] @ 0x70 │ │ - ldr r2, [pc, #992] @ (7beac ) │ │ + ldr r2, [pc, #992] @ (7bf14 ) │ │ mov r0, r9 │ │ mov r1, r6 │ │ movs r3, #12 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #164] @ 0xa4 │ │ ldr r1, [sp, #164] @ 0xa4 │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #164] @ 0xa4 │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #108] @ 0x6c │ │ - ldr r2, [pc, #964] @ (7beb0 ) │ │ + ldr r2, [pc, #964] @ (7bf18 ) │ │ mov r0, r9 │ │ mov r1, r6 │ │ movs r3, #10 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #160] @ 0xa0 │ │ ldr r1, [sp, #160] @ 0xa0 │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #160] @ 0xa0 │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #104] @ 0x68 │ │ - ldr r2, [pc, #936] @ (7beb4 ) │ │ + ldr r2, [pc, #936] @ (7bf1c ) │ │ mov r0, r9 │ │ mov r1, r6 │ │ movs r3, #18 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #156] @ 0x9c │ │ ldr r1, [sp, #156] @ 0x9c │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #156] @ 0x9c │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #100] @ 0x64 │ │ - ldr r2, [pc, #908] @ (7beb8 ) │ │ + ldr r2, [pc, #908] @ (7bf20 ) │ │ mov r0, r9 │ │ mov r1, r6 │ │ movs r3, #12 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #152] @ 0x98 │ │ mov fp, r0 │ │ cmp r0, #0 │ │ ldr r0, [sp, #152] @ 0x98 │ │ it eq │ │ moveq r0, fp │ │ str r0, [sp, #152] @ 0x98 │ │ it eq │ │ moveq.w fp, #1 │ │ - ldr r2, [pc, #880] @ (7bebc ) │ │ + ldr r2, [pc, #880] @ (7bf24 ) │ │ mov r0, r9 │ │ mov r1, r6 │ │ movs r3, #10 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #140] @ 0x8c │ │ mov r5, r0 │ │ cmp r0, #0 │ │ ldr r0, [sp, #140] @ 0x8c │ │ it eq │ │ moveq r0, r5 │ │ str r0, [sp, #140] @ 0x8c │ │ it eq │ │ moveq r5, #1 │ │ - ldr r2, [pc, #852] @ (7bec0 ) │ │ + ldr r2, [pc, #852] @ (7bf28 ) │ │ mov r0, r9 │ │ mov r1, r6 │ │ movs r3, #15 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ mov r4, r0 │ │ mov sl, r1 │ │ cmp r0, #0 │ │ itt eq │ │ moveq sl, r0 │ │ moveq r4, #1 │ │ - ldr r2, [pc, #828] @ (7bec4 ) │ │ + ldr r2, [pc, #828] @ (7bf2c ) │ │ mov r0, r9 │ │ mov r1, r6 │ │ movs r3, #13 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #88] @ 0x58 │ │ - ldr r2, [pc, #816] @ (7bec8 ) │ │ + ldr r2, [pc, #816] @ (7bf30 ) │ │ mov r8, r0 │ │ mov r0, r9 │ │ mov r1, r6 │ │ add r2, pc │ │ movs r3, #15 │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ movs r2, #0 │ │ strd r4, sl, [sp, #784] @ 0x310 │ │ strb.w r2, [sp, #824] @ 0x338 │ │ str r2, [sp, #820] @ 0x334 │ │ strd r2, r2, [sp, #808] @ 0x328 │ │ ldr r2, [sp, #140] @ 0x8c │ │ strd r5, r2, [sp, #776] @ 0x308 │ │ @@ -126428,94 +126341,94 @@ │ │ it eq │ │ moveq r0, r8 │ │ str r0, [sp, #796] @ 0x31c │ │ it eq │ │ moveq.w r8, #1 │ │ movs r0, #148 @ 0x94 │ │ str.w r8, [sp, #792] @ 0x318 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 7cf48 │ │ + beq.w 7cfb0 │ │ add r1, sp, #680 @ 0x2a8 │ │ movs r2, #148 @ 0x94 │ │ mov r4, r0 │ │ - bl d52ca │ │ + bl d4c3c │ │ ldr.w r9, [sp, #148] @ 0x94 │ │ str r4, [sp, #320] @ 0x140 │ │ ldr r4, [sp, #184] @ 0xb8 │ │ ldr.w r1, [r9, #68] @ 0x44 │ │ mov r0, r4 │ │ - bl 8e2a4 │ │ + bl 8e310 │ │ add.w r0, r4, #2147483648 @ 0x80000000 │ │ movs r2, #140 @ 0x8c │ │ clz r0, r0 │ │ lsrs r6, r0, #5 │ │ add r0, sp, #680 @ 0x2a8 │ │ adds r0, #8 │ │ add r1, sp, #200 @ 0xc8 │ │ - bl d4c50 │ │ + bl d50a2 │ │ movs r0, #1 │ │ strd r0, r0, [sp, #680] @ 0x2a8 │ │ movs r0, #148 @ 0x94 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 7cf3e │ │ + beq.w 7cfa6 │ │ str r6, [sp, #160] @ 0xa0 │ │ add r1, sp, #680 @ 0x2a8 │ │ movs r2, #148 @ 0x94 │ │ mov r5, r0 │ │ - bl d52ca │ │ + bl d4c3c │ │ movs r1, #0 │ │ movs r0, #4 │ │ strd r1, r0, [sp, #508] @ 0x1fc │ │ ldrd r0, fp, [r5, #24] │ │ cmp.w fp, #0 │ │ str r5, [sp, #488] @ 0x1e8 │ │ str r1, [sp, #516] @ 0x204 │ │ str r1, [sp, #528] @ 0x210 │ │ str r0, [sp, #164] @ 0xa4 │ │ strd r0, fp, [sp, #520] @ 0x208 │ │ str r5, [sp, #188] @ 0xbc │ │ str.w fp, [sp, #168] @ 0xa8 │ │ - beq.n 7bd22 │ │ + beq.n 7bd8a │ │ add.w r9, sp, #680 @ 0x2a8 │ │ add.w sl, sp, #520 @ 0x208 │ │ movs r4, #0 │ │ mov.w r8, #4 │ │ movs r5, #0 │ │ mov r0, r9 │ │ mov r1, sl │ │ mov r2, r5 │ │ - bl 8e2b0 │ │ + bl 8e31c │ │ ldrb.w r0, [sp, #681] @ 0x2a9 │ │ cmp r0, #3 │ │ - beq.w 7c8be │ │ + beq.w 7c926 │ │ ldrd r0, r1, [sp, #524] @ 0x20c │ │ ldr r6, [sp, #700] @ 0x2bc │ │ sub.w r0, fp, r0 │ │ ldr.w fp, [sp, #692] @ 0x2b4 │ │ adds r5, r0, r1 │ │ ldr r0, [sp, #508] @ 0x1fc │ │ str r5, [sp, #528] @ 0x210 │ │ cmp r4, r0 │ │ - bne.n 7bd00 │ │ + bne.n 7bd68 │ │ add r0, sp, #508 @ 0x1fc │ │ - bl 8e4a4 │ │ + bl 8e510 │ │ ldr.w r8, [sp, #512] @ 0x200 │ │ add.w r0, r8, r4, lsl #3 │ │ str.w r6, [r8, r4, lsl #3] │ │ adds r4, #1 │ │ str.w fp, [r0, #4] │ │ ldr.w fp, [sp, #524] @ 0x20c │ │ str r4, [sp, #516] @ 0x204 │ │ cmp.w fp, #0 │ │ - bne.n 7bcca │ │ + bne.n 7bd32 │ │ ldr r5, [sp, #188] @ 0xbc │ │ cmp r4, #2 │ │ - bcs.w 7cf58 │ │ + bcs.w 7cfc0 │ │ add.w r0, r5, #8 │ │ movs r1, #0 │ │ str r0, [sp, #180] @ 0xb4 │ │ movs r0, #8 │ │ str r1, [sp, #540] @ 0x21c │ │ add.w r3, sp, #1056 @ 0x420 │ │ strd r1, r0, [sp, #532] @ 0x214 │ │ @@ -126548,37 +126461,37 @@ │ │ add.w r2, r3, #16 │ │ str r2, [sp, #116] @ 0x74 │ │ add.w r2, r3, #184 @ 0xb8 │ │ str r2, [sp, #172] @ 0xac │ │ str r1, [sp, #140] @ 0x8c │ │ add r0, sp, #680 @ 0x2a8 │ │ add r1, sp, #556 @ 0x22c │ │ - bl 7e724 │ │ + bl 7e78c │ │ ldr.w fp, [sp, #680] @ 0x2a8 │ │ cmp.w fp, #3 │ │ - beq.w 7c8c8 │ │ + beq.w 7c930 │ │ ldr.w sl, [sp, #196] @ 0xc4 │ │ cmp.w fp, #2 │ │ ldr r0, [sp, #684] @ 0x2ac │ │ ldr.w ip, [sp, #700] @ 0x2bc │ │ str r0, [sp, #192] @ 0xc0 │ │ ldrd r9, lr, [sp, #688] @ 0x2b0 │ │ ldr.w r8, [sp, #696] @ 0x2b8 │ │ add r6, sp, #568 @ 0x238 │ │ ldmia.w sl, {r0, r1, r2, r3, r4, r5} │ │ stmia r6!, {r0, r1, r2, r3, r4, r5} │ │ - beq.w 7c8d2 │ │ + beq.w 7c93a │ │ movs.w r0, fp, lsl #31 │ │ ldr.w fp, [sp, #552] @ 0x228 │ │ - bne.n 7bd8c │ │ + bne.n 7bdf4 │ │ cmp.w r9, #1 │ │ mov.w sl, #1 │ │ it ne │ │ cmpne.w r9, #5 │ │ - beq.n 7bd8c │ │ + beq.n 7bdf4 │ │ cmp.w r9, #2 │ │ it eq │ │ moveq.w sl, #0 │ │ ldr r0, [sp, #192] @ 0xc0 │ │ str r0, [sp, #596] @ 0x254 │ │ movs r0, #0 │ │ strd r8, ip, [sp, #608] @ 0x260 │ │ @@ -126587,123 +126500,123 @@ │ │ ldr.w ip, [sp, #176] @ 0xb0 │ │ add r1, sp, #568 @ 0x238 │ │ ldmia.w r1, {r0, r2, r3, r4, r5, r6} │ │ stmia.w ip, {r0, r2, r3, r4, r5, r6} │ │ add r0, sp, #680 @ 0x2a8 │ │ ldr r1, [sp, #180] @ 0xb4 │ │ add r2, sp, #592 @ 0x250 │ │ - bl 7ead0 │ │ + bl 7eb38 │ │ ldrd r0, r1, [sp, #680] @ 0x2a8 │ │ eor.w r0, r0, #2 │ │ orrs r0, r1 │ │ - beq.n 7bd8c │ │ + beq.n 7bdf4 │ │ str.w fp, [sp, #108] @ 0x6c │ │ add.w r0, sp, #1056 @ 0x420 │ │ add r1, sp, #680 @ 0x2a8 │ │ mov.w r2, #280 @ 0x118 │ │ - bl d4c50 │ │ + bl d50a2 │ │ movs r0, #0 │ │ cmp.w sl, #0 │ │ - beq.w 7bf48 │ │ + beq.w 7bfb0 │ │ str r0, [sp, #660] @ 0x294 │ │ ldr r0, [sp, #172] @ 0xac │ │ str r0, [sp, #652] @ 0x28c │ │ ldr.w r1, [sp, #1268] @ 0x4f4 │ │ ldr.w r0, [sp, #1264] @ 0x4f0 │ │ ldr.w fp, [sp, #1312] @ 0x520 │ │ cmp r1, #0 │ │ strd r0, r1, [sp, #644] @ 0x284 │ │ add.w r2, fp, #8 │ │ str r2, [sp, #656] @ 0x290 │ │ - beq.w 7c942 │ │ + beq.w 7c9aa │ │ add.w sl, r0, #1 │ │ sub.w r8, r1, #1 │ │ movs r4, #0 │ │ movs r5, #0 │ │ mov.w r9, #0 │ │ ldrb.w r6, [sl, #-1] │ │ cmp.w r9, #63 @ 0x3f │ │ - bne.n 7be7a │ │ + bne.n 7bee2 │ │ cmp r6, #1 │ │ - bhi.w 7c93e │ │ + bhi.w 7c9a6 │ │ and.w r0, r6, #127 @ 0x7f │ │ and.w r2, r9, #63 @ 0x3f │ │ movs r1, #0 │ │ - bl d520e │ │ + bl d531e │ │ orrs r4, r0 │ │ orrs r5, r1 │ │ sxtb r0, r6 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 7becc │ │ + bgt.n 7bf34 │ │ sub.w r8, r8, #1 │ │ add.w sl, sl, #1 │ │ add.w r9, r9, #7 │ │ adds.w r0, r8, #1 │ │ - beq.w 7c942 │ │ - b.n 7be6a │ │ + beq.w 7c9aa │ │ + b.n 7bed2 │ │ nop │ │ - bvs.n 7bf48 │ │ - vqshlu.s32 , q2, #25 │ │ - vqshlu.s32 d29, d30, #25 │ │ - vqshlu.s32 d29, d16, #25 │ │ - vcle.f32 d29, d19, #0 │ │ - vcle.f32 d29, d13, #0 │ │ - vsli.64 d29, d12, #57 @ 0x39 │ │ - vsli.64 d29, d9, #57 @ 0x39 │ │ + bpl.n 7bee0 │ │ + vcle.f32 , q14, #0 │ │ + vsli.64 , q3, #57 @ 0x39 │ │ + vcle.f32 , q4, #0 │ │ + vsli.32 d29, d27, #25 │ │ + vceq.f32 d29, d21, #0 │ │ + vsli.32 d29, d20, #25 │ │ + vsli.32 d29, d17, #25 │ │ @ instruction: 0xfff9ea54 │ │ movs r5, r0 │ │ strd sl, r8, [sp, #644] @ 0x284 │ │ - bne.n 7bfc4 │ │ + bne.n 7c02c │ │ dmb ish │ │ ldrex r0, [fp] │ │ subs r1, r0, #1 │ │ strex r2, r1, [fp] │ │ cmp r2, #0 │ │ - bne.n 7beda │ │ + bne.n 7bf42 │ │ cmp r0, #1 │ │ - bne.n 7bef8 │ │ + bne.n 7bf60 │ │ dmb ish │ │ ldr.w r0, [sp, #1312] @ 0x520 │ │ - bl 801a6 │ │ + bl 8020e │ │ ldr.w r0, [sp, #1072] @ 0x430 │ │ ldr.w r1, [sp, #1076] @ 0x434 │ │ eor.w r0, r0, #47 @ 0x2f │ │ orrs r0, r1 │ │ - beq.w 7bd8c │ │ + beq.w 7bdf4 │ │ ldr.w r0, [sp, #1168] @ 0x490 │ │ - cbz r0, 7bf18 │ │ + cbz r0, 7bf80 │ │ ldr.w r0, [sp, #1172] @ 0x494 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr.w r0, [sp, #1180] @ 0x49c │ │ - cbz r0, 7bf26 │ │ + cbz r0, 7bf8e │ │ ldr.w r0, [sp, #1184] @ 0x4a0 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr.w r0, [sp, #1192] @ 0x4a8 │ │ - cbz r0, 7bf34 │ │ + cbz r0, 7bf9c │ │ ldr.w r0, [sp, #1196] @ 0x4ac │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr.w r0, [sp, #1204] @ 0x4b4 │ │ cmp r0, #0 │ │ - beq.w 7bd8c │ │ + beq.w 7bdf4 │ │ ldr.w r0, [sp, #1208] @ 0x4b8 │ │ - blx d87c0 │ │ - b.n 7bd8c │ │ + blx d87d0 │ │ + b.n 7bdf4 │ │ str r0, [sp, #104] @ 0x68 │ │ mov.w fp, #2 │ │ ldr.w r9, [sp, #100] @ 0x64 │ │ ldr.w r8, [sp, #88] @ 0x58 │ │ str.w fp, [sp, #592] @ 0x250 │ │ ldr r4, [sp, #80] @ 0x50 │ │ str r4, [sp, #80] @ 0x50 │ │ add.w r1, sp, #1056 @ 0x420 │ │ str.w r8, [sp, #88] @ 0x58 │ │ mov.w r2, #280 @ 0x118 │ │ str.w r9, [sp, #100] @ 0x64 │ │ add r0, sp, #680 @ 0x2a8 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add.w ip, sp, #592 @ 0x250 │ │ ldr r1, [sp, #156] @ 0x9c │ │ ldmia.w ip, {r0, r2, r3, r4, r5, r6} │ │ stmia r1!, {r0, r2, r3, r4, r5, r6} │ │ ldr r0, [sp, #72] @ 0x48 │ │ strh.w r0, [sp, #1026] @ 0x402 │ │ ldr r0, [sp, #104] @ 0x68 │ │ @@ -126712,44 +126625,44 @@ │ │ str.w r0, [sp, #1028] @ 0x404 │ │ movs r0, #83 @ 0x53 │ │ ldr r4, [sp, #108] @ 0x6c │ │ strb.w r0, [sp, #1008] @ 0x3f0 │ │ ldr r0, [sp, #544] @ 0x220 │ │ str.w fp, [sp, #984] @ 0x3d8 │ │ cmp r4, r0 │ │ - bne.n 7bfaa │ │ + bne.n 7c012 │ │ add r0, sp, #544 @ 0x220 │ │ - bl 8e676 │ │ + bl 8e6e2 │ │ ldr r0, [sp, #548] @ 0x224 │ │ mov.w r1, #352 @ 0x160 │ │ mla r0, r4, r1, r0 │ │ add r1, sp, #680 @ 0x2a8 │ │ mov.w r2, #352 @ 0x160 │ │ - bl d4c50 │ │ + bl d50a2 │ │ adds r0, r4, #1 │ │ str r0, [sp, #552] @ 0x228 │ │ - b.n 7bd8c │ │ - cbnz r5, 7bfdc │ │ + b.n 7bdf4 │ │ + cbnz r5, 7c044 │ │ subs r0, r4, #1 │ │ ldr.w r1, [fp, #16] │ │ cmp r0, r1 │ │ - bcs.n 7bfdc │ │ + bcs.n 7c044 │ │ movs r2, #104 @ 0x68 │ │ ldr.w r1, [fp, #12] │ │ mla r0, r0, r2, r1 │ │ - b.n 7c04c │ │ + b.n 7c0b4 │ │ ldr.w r8, [fp, #20] │ │ cmp.w r8, #0 │ │ - beq.w 7c942 │ │ + beq.w 7c9aa │ │ ldr.w ip, [fp, #24] │ │ ldrh.w lr, [r8, #1238] @ 0x4d6 │ │ mov.w r9, #4294967295 @ 0xffffffff │ │ mov r0, r8 │ │ mov.w r6, lr, lsl #3 │ │ - cbz r6, 7c02c │ │ + cbz r6, 7c094 │ │ ldrd r3, r1, [r0], #8 │ │ add.w r9, r9, #1 │ │ subs r2, r4, r3 │ │ sbcs.w r2, r5, r1 │ │ mov.w r2, #0 │ │ it cc │ │ movcc r2, #1 │ │ @@ -126757,42 +126670,42 @@ │ │ sbcs r1, r5 │ │ mov.w r1, #0 │ │ it cc │ │ movcc r1, #1 │ │ subs r3, r1, r2 │ │ subs r6, #8 │ │ cmp r3, #1 │ │ - beq.n 7bffa │ │ + beq.n 7c062 │ │ uxtb r0, r3 │ │ - cbnz r0, 7c02e │ │ - b.n 7c044 │ │ + cbnz r0, 7c096 │ │ + b.n 7c0ac │ │ mov r9, lr │ │ cmp.w ip, #0 │ │ - beq.w 7c942 │ │ + beq.w 7c9aa │ │ add.w r0, r8, r9, lsl #2 │ │ sub.w ip, ip, #1 │ │ ldr.w r8, [r0, #1240] @ 0x4d8 │ │ - b.n 7bfec │ │ + b.n 7c054 │ │ movs r0, #104 @ 0x68 │ │ mla r0, r9, r0, r8 │ │ adds r0, #88 @ 0x58 │ │ ldr.w r9, [sp, #100] @ 0x64 │ │ mov.w fp, #2 │ │ ldr.w r8, [sp, #88] @ 0x58 │ │ ldrb.w r1, [r0, #98] @ 0x62 │ │ cmp r1, #1 │ │ itt eq │ │ moveq r1, #1 │ │ streq r1, [sp, #660] @ 0x294 │ │ - bl 422dc │ │ + bl 425e4 │ │ mov r5, r0 │ │ movs r0, #0 │ │ cmp r1, #0 │ │ str r0, [sp, #104] @ 0x68 │ │ - beq.w 7c37c │ │ + beq.w 7c3e4 │ │ str.w r9, [sp, #100] @ 0x64 │ │ mov.w r9, r1, lsl #4 │ │ ldr.w r1, [sp, #1272] @ 0x4f8 │ │ movs r4, #0 │ │ ldr.w r2, [sp, #1320] @ 0x528 │ │ ldr.w r3, [sp, #1328] @ 0x530 │ │ cmp.w r1, #327680 @ 0x50000 │ │ @@ -126835,62 +126748,62 @@ │ │ ldmia.w r1, {r2, r4, r5, r6} │ │ mov r0, r3 │ │ stmia r0!, {r2, r4, r5, r6} │ │ ldr r0, [sp, #652] @ 0x28c │ │ ldr r2, [r0, #32] │ │ add r0, sp, #680 @ 0x2a8 │ │ add r1, sp, #644 @ 0x284 │ │ - bl 84988 │ │ + bl 849f0 │ │ ldrd r1, r0, [sp, #680] @ 0x2a8 │ │ eor.w r2, r1, #46 @ 0x2e │ │ orrs r2, r0 │ │ - beq.w 7c942 │ │ + beq.w 7c9aa │ │ ldr r4, [sp, #700] @ 0x2bc │ │ add r5, sp, #688 @ 0x2b0 │ │ strd r1, r0, [sp, #592] @ 0x250 │ │ ldmia r5, {r2, r3, r5} │ │ add r0, sp, #600 @ 0x258 │ │ str r4, [sp, #612] @ 0x264 │ │ stmia r0!, {r2, r3, r5} │ │ uxth r0, r5 │ │ cmp r0, #85 @ 0x55 │ │ - beq.w 7c236 │ │ + beq.w 7c29e │ │ ldr r4, [sp, #84] @ 0x54 │ │ cmp r0, #18 │ │ ldr r5, [sp, #76] @ 0x4c │ │ - beq.n 7c198 │ │ + beq.n 7c200 │ │ cmp r0, #19 │ │ - beq.w 7c20e │ │ + beq.w 7c276 │ │ cmp r0, #17 │ │ - bne.w 7c320 │ │ + bne.w 7c388 │ │ add r0, sp, #680 @ 0x2a8 │ │ add r1, sp, #592 @ 0x250 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldr r0, [sp, #680] @ 0x2a8 │ │ lsls r1, r0, #26 │ │ - beq.w 7c2a2 │ │ + beq.w 7c30a │ │ cmp r0, #12 │ │ - bne.w 7c31e │ │ + bne.w 7c386 │ │ ldr r0, [sp, #152] @ 0x98 │ │ ldr r1, [sp, #48] @ 0x30 │ │ cmp r0, r1 │ │ - bcc.w 7c942 │ │ + bcc.w 7c9aa │ │ ldr r0, [sp, #688] @ 0x2b0 │ │ ldr r1, [sp, #32] │ │ umull r1, r0, r0, r1 │ │ cmp r0, #0 │ │ - bne.w 7c942 │ │ + bne.w 7c9aa │ │ ldr r0, [sp, #64] @ 0x40 │ │ cmp r0, r1 │ │ - bcc.w 7c942 │ │ + bcc.w 7c9aa │ │ ldr r2, [sp, #28] │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ uxtab r2, r0, r2 │ │ cmp r2, #7 │ │ - bhi.w 7c942 │ │ + bhi.w 7c9aa │ │ ldr r0, [sp, #24] │ │ ldr r3, [sp, #64] @ 0x40 │ │ add r0, r1 │ │ subs r3, r3, r1 │ │ tbh [pc, r2, lsl #1] │ │ movs r0, r1 │ │ lsls r4, r6, #2 │ │ @@ -126898,45 +126811,45 @@ │ │ lsls r1, r1, #3 │ │ lsls r3, r4, #15 │ │ lsls r3, r4, #15 │ │ lsls r3, r4, #15 │ │ lsls r1, r7, #2 │ │ ldr r2, [sp, #64] @ 0x40 │ │ cmp r2, r1 │ │ - beq.w 7c942 │ │ + beq.w 7c9aa │ │ ldrb r0, [r0, #0] │ │ - b.n 7c316 │ │ + b.n 7c37e │ │ add r0, sp, #680 @ 0x2a8 │ │ add r1, sp, #592 @ 0x250 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldr r0, [sp, #680] @ 0x2a8 │ │ lsls r1, r0, #26 │ │ - beq.w 7c2c8 │ │ + beq.w 7c330 │ │ mov r5, sl │ │ cmp r0, #7 │ │ - beq.w 7c2ba │ │ + beq.w 7c322 │ │ cmp r0, #12 │ │ - bne.w 7c360 │ │ + bne.w 7c3c8 │ │ ldr r0, [sp, #152] @ 0x98 │ │ ldr r1, [sp, #48] @ 0x30 │ │ cmp r0, r1 │ │ - bcc.w 7c942 │ │ + bcc.w 7c9aa │ │ ldr r0, [sp, #688] @ 0x2b0 │ │ ldr r1, [sp, #32] │ │ umull r1, r0, r0, r1 │ │ cmp r0, #0 │ │ - bne.w 7c942 │ │ + bne.w 7c9aa │ │ ldr r0, [sp, #64] @ 0x40 │ │ cmp r0, r1 │ │ - bcc.w 7c942 │ │ + bcc.w 7c9aa │ │ ldr r2, [sp, #28] │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ uxtab r2, r0, r2 │ │ cmp r2, #7 │ │ - bhi.w 7c942 │ │ + bhi.w 7c9aa │ │ ldr r0, [sp, #24] │ │ ldr r3, [sp, #64] @ 0x40 │ │ add r0, r1 │ │ subs r3, r3, r1 │ │ tbh [pc, r2, lsl #1] │ │ movs r0, r1 │ │ lsls r1, r3, #2 │ │ @@ -126944,308 +126857,308 @@ │ │ lsls r7, r5, #2 │ │ lsls r0, r5, #14 │ │ lsls r0, r5, #14 │ │ lsls r0, r5, #14 │ │ lsls r6, r3, #2 │ │ ldr r2, [sp, #64] @ 0x40 │ │ cmp r2, r1 │ │ - beq.w 7c942 │ │ + beq.w 7c9aa │ │ ldrb r4, [r0, #0] │ │ - b.n 7c358 │ │ + b.n 7c3c0 │ │ add r0, sp, #680 @ 0x2a8 │ │ add r1, sp, #592 @ 0x250 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldrd r0, r1, [sp, #680] @ 0x2a8 │ │ eor.w r0, r0, #38 @ 0x26 │ │ orrs r0, r1 │ │ ldr r1, [sp, #72] @ 0x48 │ │ ldrh.w r0, [sp, #688] @ 0x2b0 │ │ it eq │ │ moveq r1, r0 │ │ ldr r0, [sp, #104] @ 0x68 │ │ str r1, [sp, #72] @ 0x48 │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #104] @ 0x68 │ │ - b.n 7c320 │ │ + b.n 7c388 │ │ add r0, sp, #680 @ 0x2a8 │ │ add r1, sp, #592 @ 0x250 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldr r1, [sp, #680] @ 0x2a8 │ │ ldr r0, [sp, #688] @ 0x2b0 │ │ and.w r2, r1, #63 @ 0x3f │ │ cmp r2, #22 │ │ - beq.n 7c2aa │ │ + beq.n 7c312 │ │ mov r5, sl │ │ cmp r1, #24 │ │ - bne.n 7c2b6 │ │ + bne.n 7c31e │ │ ldr r1, [sp, #140] @ 0x8c │ │ ldr r2, [sp, #56] @ 0x38 │ │ cmp r1, r2 │ │ - bcc.w 7c942 │ │ + bcc.w 7c9aa │ │ ldr r1, [sp, #12] │ │ umull r1, r0, r0, r1 │ │ cmp r0, #0 │ │ - bne.w 7c942 │ │ + bne.w 7c9aa │ │ ldr r0, [sp, #52] @ 0x34 │ │ cmp r0, r1 │ │ - bcc.w 7c942 │ │ + bcc.w 7c9aa │ │ ldr r0, [sp, #8] │ │ ldr r2, [sp, #52] @ 0x34 │ │ add r0, r1 │ │ subs r1, r2, r1 │ │ ldr r2, [sp, #4] │ │ cmp.w r2, #2048 @ 0x800 │ │ - bne.n 7c2d0 │ │ + bne.n 7c338 │ │ cmp r1, #8 │ │ - bcc.w 7c942 │ │ + bcc.w 7c9aa │ │ ldrb r2, [r0, #7] │ │ ldr.w r1, [r0, #3] │ │ lsls r2, r2, #24 │ │ orrs.w r2, r2, r1, lsr #8 │ │ - bne.w 7c942 │ │ + bne.w 7c9aa │ │ ldrb r2, [r0, #2] │ │ lsls r1, r1, #24 │ │ ldrh r0, [r0, #0] │ │ orr.w r0, r0, r2, lsl #16 │ │ orrs r0, r1 │ │ - b.n 7c2d8 │ │ + b.n 7c340 │ │ ldr r0, [sp, #688] @ 0x2b0 │ │ str r0, [sp, #68] @ 0x44 │ │ ldr r5, [sp, #692] @ 0x2b4 │ │ - b.n 7c31a │ │ + b.n 7c382 │ │ ldr r1, [sp, #16] │ │ add r0, r1 │ │ str r0, [sp, #20] │ │ movs r0, #1 │ │ str r0, [sp, #60] @ 0x3c │ │ - b.n 7c320 │ │ + b.n 7c388 │ │ movs r0, #0 │ │ - b.n 7c2e0 │ │ + b.n 7c348 │ │ ldr r0, [sp, #688] @ 0x2b0 │ │ str r0, [sp, #100] @ 0x64 │ │ movs r0, #1 │ │ ldr.w r8, [sp, #692] @ 0x2b4 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n 7c360 │ │ + b.n 7c3c8 │ │ ldrd r4, r0, [sp, #688] @ 0x2b0 │ │ mov r5, sl │ │ - b.n 7c35a │ │ + b.n 7c3c2 │ │ cmp r1, #4 │ │ - bcc.w 7c942 │ │ + bcc.w 7c9aa │ │ ldr r0, [r0, #0] │ │ ldr r1, [sp, #56] @ 0x38 │ │ add r0, r1 │ │ str r0, [sp, #20] │ │ movs r0, #1 │ │ str r0, [sp, #60] @ 0x3c │ │ - b.n 7c362 │ │ + b.n 7c3ca │ │ cmp r3, #2 │ │ - bcc.w 7c942 │ │ + bcc.w 7c9aa │ │ ldrh r0, [r0, #0] │ │ - b.n 7c316 │ │ + b.n 7c37e │ │ cmp r3, #8 │ │ - bcc.w 7c942 │ │ + bcc.w 7c9aa │ │ ldrb r1, [r0, #7] │ │ ldr.w r2, [r0, #3] │ │ lsrs r3, r2, #8 │ │ orr.w r5, r3, r1, lsl #24 │ │ ldrb r1, [r0, #2] │ │ ldrh r0, [r0, #0] │ │ orr.w r0, r0, r1, lsl #16 │ │ orr.w r0, r0, r2, lsl #24 │ │ - b.n 7c318 │ │ + b.n 7c380 │ │ cmp r3, #4 │ │ - bcc.w 7c942 │ │ + bcc.w 7c9aa │ │ ldr r0, [r0, #0] │ │ movs r5, #0 │ │ str r0, [sp, #68] @ 0x44 │ │ movs r0, #1 │ │ str r0, [sp, #44] @ 0x2c │ │ str r5, [sp, #76] @ 0x4c │ │ mov r5, sl │ │ - b.n 7c362 │ │ + b.n 7c3ca │ │ cmp r3, #2 │ │ - bcc.w 7c942 │ │ + bcc.w 7c9aa │ │ ldrh r4, [r0, #0] │ │ - b.n 7c358 │ │ + b.n 7c3c0 │ │ cmp r3, #7 │ │ - bls.w 7c942 │ │ + bls.w 7c9aa │ │ ldrb r1, [r0, #7] │ │ ldr.w r2, [r0, #3] │ │ lsrs r3, r2, #8 │ │ orr.w r1, r3, r1, lsl #24 │ │ str r1, [sp, #80] @ 0x50 │ │ ldrb r1, [r0, #2] │ │ ldrh r0, [r0, #0] │ │ orr.w r0, r0, r1, lsl #16 │ │ orr.w r4, r0, r2, lsl #24 │ │ - b.n 7c35c │ │ + b.n 7c3c4 │ │ cmp r3, #4 │ │ - bcc.w 7c942 │ │ + bcc.w 7c9aa │ │ ldr r4, [r0, #0] │ │ movs r0, #0 │ │ str r0, [sp, #80] @ 0x50 │ │ movs r0, #1 │ │ str r0, [sp, #40] @ 0x28 │ │ str r4, [sp, #84] @ 0x54 │ │ adds r5, #16 │ │ subs.w r9, r9, #16 │ │ - bne.w 7c0d6 │ │ + bne.w 7c13e │ │ ldr r6, [sp, #84] @ 0x54 │ │ ldr r4, [sp, #68] @ 0x44 │ │ ldr.w r9, [sp, #100] @ 0x64 │ │ ldr r0, [sp, #60] @ 0x3c │ │ lsls r0, r0, #31 │ │ - beq.n 7c38a │ │ - b.n 7c662 │ │ + beq.n 7c3f2 │ │ + b.n 7c6ca │ │ ldr r6, [sp, #84] @ 0x54 │ │ movs r0, #0 │ │ ldr r4, [sp, #68] @ 0x44 │ │ str r0, [sp, #44] @ 0x2c │ │ strd r0, r0, [sp, #36] @ 0x24 │ │ str r0, [sp, #60] @ 0x3c │ │ ldr.w ip, [sp, #516] @ 0x204 │ │ cmp.w ip, #0 │ │ - beq.w 7c662 │ │ + beq.w 7c6ca │ │ ldr r1, [sp, #512] @ 0x200 │ │ cmp.w ip, #1 │ │ str r4, [sp, #68] @ 0x44 │ │ - bne.n 7c3a6 │ │ + bne.n 7c40e │ │ ldr r0, [sp, #192] @ 0xc0 │ │ movs r2, #0 │ │ - b.n 7c3c4 │ │ + b.n 7c42c │ │ ldr r0, [sp, #192] @ 0xc0 │ │ movs r4, #0 │ │ mov r3, ip │ │ add.w r2, r4, r3, lsr #1 │ │ sub.w r3, r3, r3, lsr #1 │ │ ldr.w r5, [r1, r2, lsl #3] │ │ cmp r5, r0 │ │ it hi │ │ movhi r2, r4 │ │ mov r4, r2 │ │ cmp r3, #1 │ │ - bhi.n 7c3ac │ │ + bhi.n 7c414 │ │ ldr.w r3, [r1, r2, lsl #3] │ │ cmp r3, r0 │ │ - bne.n 7c3e6 │ │ + bne.n 7c44e │ │ ldr r4, [sp, #68] @ 0x44 │ │ sub.w r3, r1, #8 │ │ - cbz r2, 7c3ea │ │ + cbz r2, 7c452 │ │ ldr.w r4, [r3, r2, lsl #3] │ │ subs r2, #1 │ │ ldr r0, [sp, #192] @ 0xc0 │ │ cmp r4, r0 │ │ ldr r4, [sp, #68] @ 0x44 │ │ - beq.n 7c3d2 │ │ + beq.n 7c43a │ │ adds r2, #1 │ │ - b.n 7c3ec │ │ + b.n 7c454 │ │ ldr r4, [sp, #68] @ 0x44 │ │ - b.n 7c662 │ │ + b.n 7c6ca │ │ movs r2, #0 │ │ add.w sl, r1, r2, lsl #3 │ │ add.w r0, r1, ip, lsl #3 │ │ str r0, [sp, #32] │ │ movs r0, #1 │ │ str r0, [sp, #24] │ │ strd r6, r8, [sp, #84] @ 0x54 │ │ str.w r9, [sp, #100] @ 0x64 │ │ mov r0, sl │ │ ldr.w r1, [sl], #8 │ │ ldr r2, [sp, #192] @ 0xc0 │ │ cmp r1, r2 │ │ - bne.w 7c65a │ │ + bne.w 7c6c2 │ │ ldr r2, [r0, #4] │ │ ldr r0, [sp, #168] @ 0xa8 │ │ cmp r0, r2 │ │ - bcc.w 7c942 │ │ + bcc.w 7c9aa │ │ subs r0, r0, r2 │ │ str r0, [sp, #596] @ 0x254 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ add r0, r2 │ │ str r0, [sp, #592] @ 0x250 │ │ add r0, sp, #680 @ 0x2a8 │ │ add r1, sp, #592 @ 0x250 │ │ - bl 8e2b0 │ │ + bl 8e31c │ │ ldrb.w r0, [sp, #681] @ 0x2a9 │ │ cmp r0, #3 │ │ - beq.w 7c942 │ │ + beq.w 7c9aa │ │ ldrb.w r1, [sp, #680] @ 0x2a8 │ │ str.w sl, [sp, #56] @ 0x38 │ │ orr.w r0, r1, r0, lsl #8 │ │ ldrh.w r1, [sp, #682] @ 0x2aa │ │ orr.w r1, r0, r1, lsl #16 │ │ str r1, [sp, #64] @ 0x40 │ │ lsls r0, r1, #1 │ │ uxtb.w r9, r0 │ │ negs r0, r1 │ │ movs r1, #56 @ 0x38 │ │ and.w r2, r1, r0, lsl #3 │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ - bl d51de │ │ + bl d50bc │ │ ldrd r6, r3, [sp, #684] @ 0x2ac │ │ str r0, [sp, #28] │ │ bic.w r0, r0, #1 │ │ str r1, [sp, #52] @ 0x34 │ │ str r0, [sp, #48] @ 0x30 │ │ mov lr, r9 │ │ mov ip, r3 │ │ mov r4, r6 │ │ mov r5, r3 │ │ cmp r5, #0 │ │ - beq.w 7c640 │ │ + beq.w 7c6a8 │ │ ldr r1, [sp, #64] @ 0x40 │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ uxtab r0, r0, r1 │ │ cmp r0, #7 │ │ - bhi.w 7c5fa │ │ + bhi.w 7c662 │ │ tbb [pc, r0] │ │ asrs r4, r0, #28 │ │ str r2, [r6, #72] @ 0x48 │ │ uxth r2, r6 │ │ cmp r3, #178 @ 0xb2 │ │ cmp lr, r5 │ │ - bhi.w 7c640 │ │ + bhi.w 7c6a8 │ │ cmp r5, #2 │ │ - bcc.w 7c5f4 │ │ + bcc.w 7c65c │ │ ldrb.w r3, [r4], #2 │ │ subs r5, #2 │ │ ldrb.w r1, [r4, #-1] │ │ orrs.w r0, r1, r3 │ │ - beq.n 7c49e │ │ + beq.n 7c506 │ │ mov.w lr, #0 │ │ movs r6, #0 │ │ movs r0, #0 │ │ - b.n 7c594 │ │ + b.n 7c5fc │ │ cmp lr, r5 │ │ - bhi.w 7c640 │ │ + bhi.w 7c6a8 │ │ cmp r5, #4 │ │ - bcc.w 7c5f4 │ │ + bcc.w 7c65c │ │ ldrh.w r2, [r4], #4 │ │ subs r5, #4 │ │ ldrh.w r1, [r4, #-2] │ │ orrs.w r0, r1, r2 │ │ - beq.n 7c4c4 │ │ + beq.n 7c52c │ │ lsrs r0, r2, #8 │ │ uxtb r3, r2 │ │ mov.w lr, #0 │ │ movs r6, #0 │ │ - b.n 7c594 │ │ + b.n 7c5fc │ │ cmp lr, r5 │ │ - bhi.w 7c640 │ │ + bhi.w 7c6a8 │ │ add.w r0, r4, #8 │ │ bic.w r1, r5, #7 │ │ movs r3, #0 │ │ movs r6, #1 │ │ cmp r5, #8 │ │ - bcc.n 7c476 │ │ + bcc.n 7c4de │ │ cmp r1, #8 │ │ - beq.n 7c476 │ │ + beq.n 7c4de │ │ ldr.w r2, [r4, #3] │ │ subs r5, #16 │ │ ldrb r1, [r4, #7] │ │ ldrb.w lr, [r4, #15] │ │ mov.w r8, r2, lsr #8 │ │ ldrh r3, [r0, #0] │ │ orr.w sl, r8, r1, lsl #24 │ │ @@ -127260,37 +127173,37 @@ │ │ orr.w r2, r6, r2, lsl #24 │ │ orr.w r3, r3, r4, lsl #16 │ │ add.w r4, r0, #8 │ │ orr.w r1, r3, r1, lsl #24 │ │ orr.w r3, r1, r2 │ │ orrs.w r3, r3, lr │ │ mov lr, r9 │ │ - beq.n 7c4ec │ │ + beq.n 7c554 │ │ lsrs r0, r2, #16 │ │ orr.w lr, r0, r8, lsl #16 │ │ lsrs r0, r6, #8 │ │ uxtb r3, r6 │ │ mov r6, sl │ │ - b.n 7c598 │ │ + b.n 7c600 │ │ cmp lr, r5 │ │ - bhi.n 7c640 │ │ + bhi.n 7c6a8 │ │ bic.w r0, r5, #3 │ │ movs r3, #0 │ │ movs r6, #1 │ │ cmp r5, #4 │ │ - bcc.w 7c476 │ │ + bcc.w 7c4de │ │ cmp r0, #4 │ │ - beq.w 7c476 │ │ + beq.w 7c4de │ │ add.w r2, r4, #8 │ │ ldr r3, [r4, #0] │ │ ldr r1, [r4, #4] │ │ subs r5, #8 │ │ mov r4, r2 │ │ orrs.w r0, r1, r3 │ │ - beq.n 7c55e │ │ + beq.n 7c5c6 │ │ mov.w lr, r3, lsr #16 │ │ lsrs r0, r3, #8 │ │ uxtb r3, r3 │ │ movs r6, #0 │ │ mov r4, r2 │ │ mov.w fp, #0 │ │ uxtb r0, r0 │ │ @@ -127298,50 +127211,50 @@ │ │ mov lr, r9 │ │ orr.w r0, r2, r0, lsl #8 │ │ add.w r8, r0, r3 │ │ ldr r0, [sp, #48] @ 0x30 │ │ subs.w r0, r8, r0 │ │ ldr r0, [sp, #52] @ 0x34 │ │ sbcs.w r0, r6, r0 │ │ - bcs.w 7c47c │ │ + bcs.w 7c4e4 │ │ adds.w sl, r8, r1 │ │ str r6, [sp, #16] │ │ adcs.w r2, r6, fp │ │ mov.w r0, #0 │ │ mov r6, r4 │ │ mov r3, r5 │ │ adcs.w r0, r0, #0 │ │ - bne.w 7c476 │ │ + bne.w 7c4de │ │ ldr r0, [sp, #28] │ │ mov r6, r4 │ │ mov r3, r5 │ │ subs.w r0, r0, sl │ │ ldr r0, [sp, #52] @ 0x34 │ │ sbcs r0, r2 │ │ - bcc.w 7c476 │ │ + bcc.w 7c4de │ │ mov r6, r4 │ │ mov r3, r5 │ │ orrs.w r0, r1, fp │ │ str r2, [sp, #12] │ │ - beq.w 7c476 │ │ - b.n 7c606 │ │ + beq.w 7c4de │ │ + b.n 7c66e │ │ movs r3, #0 │ │ movs r6, #1 │ │ - b.n 7c476 │ │ + b.n 7c4de │ │ movs r3, #0 │ │ movs r6, #1 │ │ cmp lr, ip │ │ - bls.w 7c476 │ │ - b.n 7c640 │ │ + bls.w 7c4de │ │ + b.n 7c6a8 │ │ ldr r6, [sp, #540] @ 0x21c │ │ ldr r0, [sp, #532] @ 0x214 │ │ cmp r6, r0 │ │ - bne.n 7c614 │ │ + bne.n 7c67c │ │ add r0, sp, #532 @ 0x214 │ │ - bl 8e638 │ │ + bl 8e6a4 │ │ ldr r1, [sp, #536] @ 0x218 │ │ lsls r0, r6, #5 │ │ ldr r2, [sp, #16] │ │ mov r3, r5 │ │ str.w r8, [r1, r0] │ │ add.w r0, r1, r6, lsl #5 │ │ movs r1, #0 │ │ @@ -127351,42 +127264,42 @@ │ │ str r1, [sp, #24] │ │ str r1, [r0, #20] │ │ ldr r1, [sp, #108] @ 0x6c │ │ str r1, [r0, #24] │ │ adds r0, r6, #1 │ │ str r0, [sp, #540] @ 0x21c │ │ mov r6, r4 │ │ - b.n 7c474 │ │ + b.n 7c4dc │ │ ldr.w sl, [sp, #56] @ 0x38 │ │ mov.w fp, #2 │ │ ldr r0, [sp, #32] │ │ cmp sl, r0 │ │ ldr.w r9, [sp, #100] @ 0x64 │ │ ldrd r6, r8, [sp, #84] @ 0x54 │ │ ldr r4, [sp, #68] @ 0x44 │ │ - bne.w 7c402 │ │ + bne.w 7c46a │ │ ldr r0, [sp, #24] │ │ lsls r0, r0, #31 │ │ - beq.w 7c8b6 │ │ + beq.w 7c91e │ │ ldr r0, [sp, #60] @ 0x3c │ │ lsls r0, r0, #31 │ │ - beq.n 7c738 │ │ + beq.n 7c7a0 │ │ ldr.w r1, [sp, #1272] @ 0x4f8 │ │ movs r2, #4 │ │ str r4, [sp, #68] @ 0x44 │ │ lsrs r0, r1, #16 │ │ strd r6, r8, [sp, #84] @ 0x54 │ │ cmp r0, #4 │ │ it hi │ │ movhi r2, #12 │ │ ldr r6, [sp, #124] @ 0x7c │ │ ldr r4, [sp, #20] │ │ ldr r2, [r6, r2] │ │ cmp r2, r4 │ │ - bcc.w 7c942 │ │ + bcc.w 7c9aa │ │ ldr r3, [sp, #120] @ 0x78 │ │ mov.w r8, #0 │ │ ldr.w r5, [sp, #1320] @ 0x528 │ │ subs r2, r2, r4 │ │ str r5, [sp, #696] @ 0x2b8 │ │ cmp r0, #4 │ │ strb.w r8, [r3, #2] │ │ @@ -127410,147 +127323,147 @@ │ │ it hi │ │ addhi r0, #8 │ │ ldr r0, [r0, #0] │ │ add r0, r4 │ │ str r0, [sp, #704] @ 0x2c0 │ │ add r0, sp, #592 @ 0x250 │ │ add r1, sp, #680 @ 0x2a8 │ │ - bl 88e20 │ │ + bl 88e4c │ │ add r5, sp, #592 @ 0x250 │ │ ldmia r5, {r0, r1, r5} │ │ eor.w r2, r0, #2 │ │ orrs r1, r2 │ │ - beq.n 7c796 │ │ + beq.n 7c7fe │ │ lsls r0, r0, #31 │ │ - beq.n 7c7a6 │ │ + beq.n 7c80e │ │ add.w r9, sp, #604 @ 0x25c │ │ ldmia.w r9, {r4, r6, r9} │ │ subs r0, r5, r6 │ │ sbcs.w r0, r4, r9 │ │ - bcs.n 7c6d8 │ │ + bcs.n 7c740 │ │ ldr.w r8, [sp, #540] @ 0x21c │ │ ldr r0, [sp, #532] @ 0x214 │ │ cmp r8, r0 │ │ - bne.n 7c710 │ │ + bne.n 7c778 │ │ add r0, sp, #532 @ 0x214 │ │ - bl 8e638 │ │ + bl 8e6a4 │ │ ldr r1, [sp, #536] @ 0x218 │ │ mov.w r0, r8, lsl #5 │ │ str r5, [r1, r0] │ │ add.w r0, r1, r8, lsl #5 │ │ adds r1, r0, #4 │ │ stmia.w r1, {r4, r6, r9} │ │ movs r1, #0 │ │ strd r1, r1, [r0, #16] │ │ ldr r1, [sp, #108] @ 0x6c │ │ str r1, [r0, #24] │ │ add.w r0, r8, #1 │ │ str r0, [sp, #540] @ 0x21c │ │ mov.w r8, #1 │ │ - b.n 7c6d8 │ │ + b.n 7c740 │ │ ldr r1, [sp, #44] @ 0x2c │ │ str r4, [sp, #68] @ 0x44 │ │ lsls r0, r1, #31 │ │ - beq.n 7c768 │ │ + beq.n 7c7d0 │ │ ldr r0, [sp, #40] @ 0x28 │ │ lsls r0, r0, #31 │ │ - beq.n 7c768 │ │ + beq.n 7c7d0 │ │ subs r0, r4, r6 │ │ ldrd r0, r4, [sp, #76] @ 0x4c │ │ sbcs r0, r4 │ │ - bcs.n 7c7b8 │ │ + bcs.n 7c820 │ │ ldr r4, [sp, #540] @ 0x21c │ │ ldr r0, [sp, #532] @ 0x214 │ │ cmp r4, r0 │ │ - bne.w 7c88c │ │ + bne.w 7c8f4 │ │ add r0, sp, #532 @ 0x214 │ │ - bl 8e638 │ │ + bl 8e6a4 │ │ mov sl, r6 │ │ mov r5, r6 │ │ ldr r6, [sp, #80] @ 0x50 │ │ - b.n 7c892 │ │ + b.n 7c8fa │ │ ldr r0, [sp, #36] @ 0x24 │ │ ands r0, r1 │ │ lsls r0, r0, #31 │ │ - beq.n 7c7ae │ │ + beq.n 7c816 │ │ ldr r1, [sp, #76] @ 0x4c │ │ mov sl, r6 │ │ adds.w r5, r4, r9 │ │ adc.w r6, r1, r8 │ │ subs r0, r4, r5 │ │ sbcs.w r0, r1, r6 │ │ - bcs.n 7c7c2 │ │ + bcs.n 7c82a │ │ ldr r4, [sp, #540] @ 0x21c │ │ ldr r0, [sp, #532] @ 0x214 │ │ cmp r4, r0 │ │ - bne.w 7c892 │ │ + bne.w 7c8fa │ │ add r0, sp, #532 @ 0x214 │ │ - bl 8e638 │ │ - b.n 7c892 │ │ + bl 8e6a4 │ │ + b.n 7c8fa │ │ uxtb r0, r5 │ │ mov.w fp, #2 │ │ cmp r0, #82 @ 0x52 │ │ - bne.w 7c942 │ │ + bne.w 7c9aa │ │ ubfx r8, r5, #8, #1 │ │ mov r9, sl │ │ ldrd r4, r6, [sp, #80] @ 0x50 │ │ - b.n 7c7ce │ │ + b.n 7c836 │ │ str.w r8, [sp, #88] @ 0x58 │ │ mov.w r8, #0 │ │ - b.n 7c7cc │ │ + b.n 7c834 │ │ str.w r8, [sp, #88] @ 0x58 │ │ mov.w r8, #0 │ │ - b.n 7c7ce │ │ + b.n 7c836 │ │ str.w r8, [sp, #88] @ 0x58 │ │ mov.w r8, #0 │ │ mov r6, sl │ │ ldr r4, [sp, #80] @ 0x50 │ │ movs.w r0, r8, lsl #31 │ │ str.w fp, [sp, #592] @ 0x250 │ │ str r6, [sp, #84] @ 0x54 │ │ - bne.n 7c884 │ │ + bne.n 7c8ec │ │ ldr.w r0, [sp, #1072] @ 0x430 │ │ ldr.w r8, [sp, #88] @ 0x58 │ │ ldr.w r1, [sp, #1076] @ 0x434 │ │ eor.w r0, r0, #47 @ 0x2f │ │ orrs r0, r1 │ │ - beq.w 7bf5c │ │ + beq.w 7bfc4 │ │ add r0, sp, #592 @ 0x250 │ │ ldr r1, [sp, #180] @ 0xb4 │ │ ldr r3, [sp, #116] @ 0x74 │ │ add.w r2, sp, #1056 @ 0x420 │ │ - bl 8068c │ │ + bl 806f4 │ │ ldr r0, [sp, #592] @ 0x250 │ │ cmp r0, #1 │ │ ldr r0, [sp, #112] @ 0x70 │ │ - bne.n 7c812 │ │ + bne.n 7c87a │ │ ldrb.w r0, [sp, #600] @ 0x258 │ │ cmp r0, #82 @ 0x52 │ │ - bne.w 7bf5c │ │ + bne.w 7bfc4 │ │ ldr r0, [sp, #604] @ 0x25c │ │ ldr r1, [r0, #12] │ │ cmp r1, #0 │ │ - beq.w 7bf5c │ │ + beq.w 7bfc4 │ │ ldr r0, [r0, #8] │ │ add.w r1, r1, r1, lsl #1 │ │ ldr r6, [sp, #540] @ 0x21c │ │ add.w r5, r0, #8 │ │ str r4, [sp, #80] @ 0x50 │ │ lsls r0, r6, #5 │ │ add.w r4, r0, #24 │ │ mov.w r8, r1, lsl #3 │ │ str.w r9, [sp, #100] @ 0x64 │ │ ldr r0, [r5, #12] │ │ str r0, [sp, #64] @ 0x40 │ │ ldr r0, [sp, #532] @ 0x214 │ │ ldmia.w r5, {r9, sl, fp} │ │ cmp r6, r0 │ │ - bne.n 7c84a │ │ + bne.n 7c8b2 │ │ add r0, sp, #532 @ 0x214 │ │ - bl 8e638 │ │ + bl 8e6a4 │ │ ldr r0, [sp, #536] @ 0x218 │ │ adds r6, #1 │ │ ldr r1, [sp, #108] @ 0x6c │ │ adds r5, #24 │ │ str r6, [sp, #540] @ 0x21c │ │ str r1, [r0, r4] │ │ add r0, r4 │ │ @@ -127558,21 +127471,21 @@ │ │ adds r4, #32 │ │ stmia.w r1, {r9, sl, fp} │ │ ldr r1, [sp, #64] @ 0x40 │ │ str.w r1, [r0, #-12] │ │ movs r1, #0 │ │ subs.w r8, r8, #24 │ │ strd r1, r1, [r0, #-8] │ │ - bne.n 7c836 │ │ + bne.n 7c89e │ │ mov.w fp, #2 │ │ ldr.w r9, [sp, #100] @ 0x64 │ │ ldr.w r8, [sp, #88] @ 0x58 │ │ - b.w 7bf5a │ │ + b.w 7bfc2 │ │ ldr.w r8, [sp, #88] @ 0x58 │ │ - b.w 7bf5c │ │ + b.w 7bfc4 │ │ mov sl, r6 │ │ mov r5, r6 │ │ ldr r6, [sp, #80] @ 0x50 │ │ ldr r1, [sp, #536] @ 0x218 │ │ lsls r0, r4, #5 │ │ ldr r2, [sp, #68] @ 0x44 │ │ str r2, [r1, r0] │ │ @@ -127586,195 +127499,195 @@ │ │ ldr r1, [sp, #108] @ 0x6c │ │ str r1, [r0, #24] │ │ adds r0, r4, #1 │ │ mov r4, r2 │ │ str r0, [sp, #540] @ 0x21c │ │ str r4, [sp, #68] @ 0x44 │ │ str r6, [sp, #84] @ 0x54 │ │ - b.w 7bf56 │ │ + b.w 7bfbe │ │ ldr.w r9, [sp, #148] @ 0x94 │ │ ldrd r5, sl, [sp, #184] @ 0xb8 │ │ - b.n 7c9e6 │ │ + b.n 7ca4e │ │ ldr.w r9, [sp, #148] @ 0x94 │ │ ldr.w sl, [sp, #188] @ 0xbc │ │ - b.n 7c9b8 │ │ + b.n 7ca20 │ │ ldrd r9, sl, [sp, #536] @ 0x218 │ │ cmp.w sl, #2 │ │ ldr r5, [sp, #92] @ 0x5c │ │ str.w sl, [sp, #164] @ 0xa4 │ │ - bcs.w 7cfb0 │ │ + bcs.w 7d018 │ │ cmp.w sl, #0 │ │ - beq.w 7ca58 │ │ + beq.w 7cac0 │ │ mov.w r8, sl, lsl #5 │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ mov r1, r8 │ │ mov.w r2, #4294967295 @ 0xffffffff │ │ add.w r3, r9, r1 │ │ ldrd r5, r6, [r3, #-32] │ │ subs r4, r5, r0 │ │ sbcs.w r4, r6, r2 │ │ itt cc │ │ movcc r2, r6 │ │ movcc r0, r5 │ │ subs r1, #32 │ │ strd r0, r2, [r3, #-16] │ │ - bne.n 7c8fa │ │ + bne.n 7c962 │ │ ldr r0, [sp, #532] @ 0x214 │ │ cmp r0, sl │ │ ldr.w sl, [sp, #188] @ 0xbc │ │ - bls.w 7ca70 │ │ + bls.w 7cad8 │ │ lsls r1, r0, #5 │ │ mov r0, r9 │ │ movs r2, #8 │ │ mov r3, r8 │ │ - bl 4194c │ │ + bl 41c54 │ │ ldr r5, [sp, #92] @ 0x5c │ │ cmp r0, #0 │ │ - beq.w 7d058 │ │ + beq.w 7d0c0 │ │ mov.w fp, #0 │ │ mov r9, r0 │ │ - b.n 7ca76 │ │ + b.n 7cade │ │ str.w sl, [sp, #644] @ 0x284 │ │ ldr.w r0, [sp, #1312] @ 0x520 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 7c94a │ │ + bne.n 7c9b2 │ │ ldr.w r9, [sp, #148] @ 0x94 │ │ cmp r1, #1 │ │ ldr.w sl, [sp, #188] @ 0xbc │ │ - bne.n 7c970 │ │ + bne.n 7c9d8 │ │ dmb ish │ │ ldr.w r0, [sp, #1312] @ 0x520 │ │ - bl 801a6 │ │ + bl 8020e │ │ ldr.w r0, [sp, #1072] @ 0x430 │ │ ldr.w r1, [sp, #1076] @ 0x434 │ │ eor.w r0, r0, #47 @ 0x2f │ │ orrs r0, r1 │ │ - beq.n 7c9b8 │ │ + beq.n 7ca20 │ │ ldr.w r0, [sp, #1168] @ 0x490 │ │ - cbz r0, 7c98e │ │ + cbz r0, 7c9f6 │ │ ldr.w r0, [sp, #1172] @ 0x494 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr.w r0, [sp, #1180] @ 0x49c │ │ - cbz r0, 7c99c │ │ + cbz r0, 7ca04 │ │ ldr.w r0, [sp, #1184] @ 0x4a0 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr.w r0, [sp, #1192] @ 0x4a8 │ │ - cbz r0, 7c9aa │ │ + cbz r0, 7ca12 │ │ ldr.w r0, [sp, #1196] @ 0x4ac │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr.w r0, [sp, #1204] @ 0x4b4 │ │ - cbz r0, 7c9b8 │ │ + cbz r0, 7ca20 │ │ ldr.w r0, [sp, #1208] @ 0x4b8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrd r4, r0, [sp, #548] @ 0x224 │ │ adds r5, r0, #1 │ │ mov r0, r4 │ │ subs r5, #1 │ │ - beq.n 7c9d0 │ │ + beq.n 7ca38 │ │ add.w r6, r0, #352 @ 0x160 │ │ - bl 8c728 │ │ + bl 8c794 │ │ mov r0, r6 │ │ - b.n 7c9c0 │ │ + b.n 7ca28 │ │ ldr r0, [sp, #544] @ 0x220 │ │ - cbz r0, 7c9da │ │ + cbz r0, 7ca42 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r5, [sp, #184] @ 0xb8 │ │ ldr r0, [sp, #532] @ 0x214 │ │ - cbz r0, 7c9e6 │ │ + cbz r0, 7ca4e │ │ ldr r0, [sp, #536] @ 0x218 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #508] @ 0x1fc │ │ - cbz r0, 7c9f0 │ │ + cbz r0, 7ca58 │ │ ldr r0, [sp, #512] @ 0x200 │ │ - blx d87c0 │ │ + blx d87d0 │ │ dmb ish │ │ ldrex r0, [sl] │ │ subs r1, r0, #1 │ │ strex r2, r1, [sl] │ │ cmp r2, #0 │ │ - bne.n 7c9f4 │ │ + bne.n 7ca5c │ │ cmp r0, #1 │ │ - bne.n 7ca12 │ │ + bne.n 7ca7a │ │ movs r4, #1 │ │ dmb ish │ │ add r0, sp, #488 @ 0x1e8 │ │ - bl 7e154 │ │ + bl 7e1bc │ │ ldr r1, [sp, #96] @ 0x60 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str.w r0, [r1, #256] @ 0x100 │ │ ldr r1, [r7, #8] │ │ ldr r0, [r1, #64] @ 0x40 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ itt ne │ │ ldrne r1, [r1, #68] @ 0x44 │ │ - blne 8e2a4 │ │ + blne 8e310 │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ - bne.n 7ca44 │ │ + bne.n 7caac │ │ ldr.w r0, [r9, #64] @ 0x40 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.n 7ca44 │ │ + beq.n 7caac │ │ ldr.w r1, [r9, #68] @ 0x44 │ │ - bl 8e2a4 │ │ + bl 8e310 │ │ ldr r0, [sp, #144] @ 0x90 │ │ ldrd r0, r1, [r0, #64] @ 0x40 │ │ - bl 8e2a4 │ │ + bl 8e310 │ │ addw sp, sp, #1340 @ 0x53c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r0, [sp, #532] @ 0x214 │ │ - cbz r0, 7ca66 │ │ + cbz r0, 7cace │ │ mov r0, r9 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov.w r9, #8 │ │ ldr.w sl, [sp, #188] @ 0xbc │ │ mov.w fp, #1 │ │ - b.n 7ca76 │ │ + b.n 7cade │ │ mov.w fp, #0 │ │ ldr r5, [sp, #92] @ 0x5c │ │ ldr r3, [sp, #552] @ 0x228 │ │ ldrd r0, r6, [sp, #544] @ 0x220 │ │ str.w r9, [sp, #132] @ 0x84 │ │ cmp r0, r3 │ │ str r3, [sp, #156] @ 0x9c │ │ - bls.n 7cab4 │ │ - cbz r3, 7caac │ │ + bls.n 7cb1c │ │ + cbz r3, 7cb14 │ │ mov.w r2, #352 @ 0x160 │ │ mul.w r4, r3, r2 │ │ mul.w r1, r0, r2 │ │ mov r0, r6 │ │ movs r2, #8 │ │ mov r3, r4 │ │ - bl 4194c │ │ + bl 41c54 │ │ mov r6, r0 │ │ - cbnz r0, 7cab4 │ │ + cbnz r0, 7cb1c │ │ movs r0, #8 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ - b.n 7d060 │ │ + bl 3e2ac │ │ + b.n 7d0c8 │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r6, #8 │ │ ldr r0, [sp, #508] @ 0x1fc │ │ - cbz r0, 7cabe │ │ + cbz r0, 7cb26 │ │ ldr r0, [sp, #512] @ 0x200 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ movs r1, #0 │ │ ldr r4, [sp, #156] @ 0x9c │ │ ldr.w r3, [sl, #128] @ 0x80 │ │ strd r9, r0, [sp, #492] @ 0x1ec │ │ movs r0, #8 │ │ cmp r3, #0 │ │ strd r6, r4, [sp, #500] @ 0x1f4 │ │ - beq.n 7cbd0 │ │ + beq.n 7cc38 │ │ str r1, [sp, #576] @ 0x240 │ │ strd r1, r0, [sp, #568] @ 0x238 │ │ str r1, [sp, #600] @ 0x258 │ │ ldrd r1, r2, [r3, #32] │ │ str r0, [sp, #136] @ 0x88 │ │ strd r1, r2, [sp, #592] @ 0x250 │ │ add r1, sp, #680 @ 0x2a8 │ │ @@ -127783,18 +127696,18 @@ │ │ add.w r0, r3, #8 │ │ str r0, [sp, #168] @ 0xa8 │ │ movs r0, #0 │ │ str r6, [sp, #140] @ 0x8c │ │ str r0, [sp, #152] @ 0x98 │ │ add r0, sp, #680 @ 0x2a8 │ │ add r1, sp, #592 @ 0x250 │ │ - bl 7e724 │ │ + bl 7e78c │ │ ldr r3, [sp, #680] @ 0x2a8 │ │ cmp r3, #3 │ │ - beq.n 7cbd6 │ │ + beq.n 7cc3e │ │ ldr r0, [sp, #192] @ 0xc0 │ │ add.w r1, sp, #1032 @ 0x408 │ │ ldrb.w r5, [sp, #688] @ 0x2b0 │ │ cmp r3, #2 │ │ ldr.w lr, [sp, #684] @ 0x2ac │ │ ldrb r6, [r0, #2] │ │ ldrh r4, [r0, #0] │ │ @@ -127803,19 +127716,19 @@ │ │ ldr r0, [sp, #696] @ 0x2b8 │ │ str r0, [sp, #172] @ 0xac │ │ ldr r0, [sp, #692] @ 0x2b4 │ │ str r0, [sp, #180] @ 0xb4 │ │ ldr r0, [sp, #196] @ 0xc4 │ │ ldmia.w r0, {r2, r8, r9, sl, fp, ip} │ │ stmia.w r1, {r2, r8, r9, sl, fp, ip} │ │ - beq.n 7cbfa │ │ + beq.n 7cc62 │ │ ldr.w sl, [sp, #188] @ 0xbc │ │ orr.w r4, r4, r6, lsl #16 │ │ lsls r0, r3, #31 │ │ - bne.n 7cafc │ │ + bne.n 7cb64 │ │ ldr r1, [sp, #192] @ 0xc0 │ │ lsrs r0, r4, #16 │ │ strb.w r5, [sp, #688] @ 0x2b0 │ │ mov r8, lr │ │ str.w lr, [sp, #684] @ 0x2ac │ │ strb r0, [r1, #2] │ │ movs r0, #0 │ │ @@ -127830,120 +127743,120 @@ │ │ str r0, [sp, #692] @ 0x2b4 │ │ ldr.w ip, [sp, #196] @ 0xc4 │ │ ldmia.w r1, {r0, r2, r3, r4, r5, r6} │ │ stmia.w ip, {r0, r2, r3, r4, r5, r6} │ │ ldr r1, [sp, #168] @ 0xa8 │ │ add.w r0, sp, #1056 @ 0x420 │ │ add r2, sp, #680 @ 0x2a8 │ │ - bl 7ead0 │ │ + bl 7eb38 │ │ ldr.w r0, [sp, #1056] @ 0x420 │ │ ldr.w r1, [sp, #1060] @ 0x424 │ │ eor.w r0, r0, #2 │ │ orrs r0, r1 │ │ - beq.n 7cafc │ │ + beq.n 7cb64 │ │ add r0, sp, #680 @ 0x2a8 │ │ add.w r1, sp, #1056 @ 0x420 │ │ mov.w r2, #280 @ 0x118 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr r4, [sp, #152] @ 0x98 │ │ ldr r1, [sp, #136] @ 0x88 │ │ ldr r0, [sp, #568] @ 0x238 │ │ str.w r8, [sp, #960] @ 0x3c0 │ │ cmp r4, r0 │ │ - bne.n 7cbb4 │ │ + bne.n 7cc1c │ │ add r0, sp, #568 @ 0x238 │ │ - bl 8e816 │ │ + bl 8e882 │ │ ldr r1, [sp, #572] @ 0x23c │ │ add.w r0, r4, r4, lsl #3 │ │ str r1, [sp, #136] @ 0x88 │ │ mov.w r2, #288 @ 0x120 │ │ add.w r0, r1, r0, lsl #5 │ │ add r1, sp, #680 @ 0x2a8 │ │ - bl d4c50 │ │ + bl d50a2 │ │ adds r4, #1 │ │ str r4, [sp, #152] @ 0x98 │ │ str r4, [sp, #576] @ 0x240 │ │ - b.n 7cafc │ │ + b.n 7cb64 │ │ mov.w fp, #0 │ │ - b.n 7cc48 │ │ + b.n 7ccb0 │ │ ldrd r8, fp, [sp, #692] @ 0x2b4 │ │ ldrb.w r4, [sp, #688] @ 0x2b0 │ │ add r0, sp, #568 @ 0x238 │ │ - bl 8e71e │ │ + bl 8e78a │ │ ldr.w r9, [sp, #148] @ 0x94 │ │ cmp r4, #82 @ 0x52 │ │ ldr r5, [sp, #92] @ 0x5c │ │ ldr r6, [sp, #140] @ 0x8c │ │ - bne.n 7cc2c │ │ + bne.n 7cc94 │ │ ldr.w r9, [sp, #132] @ 0x84 │ │ mov r0, r8 │ │ ldr r4, [sp, #156] @ 0x9c │ │ - b.n 7cc48 │ │ + b.n 7ccb0 │ │ ldr r1, [sp, #568] @ 0x238 │ │ ldr r2, [sp, #152] @ 0x98 │ │ ldr.w sl, [sp, #188] @ 0xbc │ │ ldr r4, [sp, #156] @ 0x9c │ │ cmp r1, r2 │ │ ldr r0, [sp, #136] @ 0x88 │ │ - bls.n 7cc3c │ │ - cbz r2, 7cc36 │ │ + bls.n 7cca4 │ │ + cbz r2, 7cc9e │ │ add.w r2, r2, r2, lsl #3 │ │ add.w r1, r1, r1, lsl #3 │ │ lsls r5, r2, #5 │ │ lsls r1, r1, #5 │ │ movs r2, #8 │ │ mov r3, r5 │ │ - bl 4194c │ │ - cbnz r0, 7cc3c │ │ + bl 41c54 │ │ + cbnz r0, 7cca4 │ │ movs r0, #8 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ - b.n 7d060 │ │ + bl 3e2ac │ │ + b.n 7d0c8 │ │ add r0, sp, #492 @ 0x1ec │ │ - bl 8c558 │ │ + bl 8c5c4 │ │ ldr r5, [sp, #184] @ 0xb8 │ │ - b.n 7c9f0 │ │ - blx d87c0 │ │ + b.n 7ca58 │ │ + blx d87d0 │ │ movs r0, #8 │ │ ldr.w r9, [sp, #492] @ 0x1ec │ │ ldr r5, [sp, #92] @ 0x5c │ │ ldr r6, [sp, #140] @ 0x8c │ │ ldr.w fp, [sp, #152] @ 0x98 │ │ strd r6, r4, [sp, #356] @ 0x164 │ │ ldr r4, [r7, #8] │ │ strd r0, fp, [sp, #364] @ 0x16c │ │ ldr r0, [sp, #164] @ 0xa4 │ │ str r0, [sp, #352] @ 0x160 │ │ ldr r0, [r4, #64] @ 0x40 │ │ strd sl, r9, [sp, #344] @ 0x158 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.n 7cd02 │ │ + bne.n 7cd6a │ │ movs r0, #10 │ │ str r0, [sp, #184] @ 0xb8 │ │ ldr r4, [sp, #96] @ 0x60 │ │ add r1, sp, #344 @ 0x158 │ │ movs r2, #28 │ │ add.w r0, r4, #272 @ 0x110 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r0, [sp, #184] @ 0xb8 │ │ movs r2, #55 @ 0x37 │ │ strb r0, [r4, #0] │ │ adds r0, r4, #1 │ │ add r1, sp, #432 @ 0x1b0 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r0, [sp, #168] @ 0xa8 │ │ movs r2, #23 │ │ strb.w r0, [r4, #56] @ 0x38 │ │ add.w r0, r4, #57 @ 0x39 │ │ add r1, sp, #408 @ 0x198 │ │ - bl d53c6 │ │ + bl d52ea │ │ add.w r0, r4, #80 @ 0x50 │ │ add r1, sp, #376 @ 0x178 │ │ movs r2, #32 │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #0 │ │ movs r1, #1 │ │ str.w r0, [r4, #188] @ 0xbc │ │ ldr r0, [sp, #176] @ 0xb0 │ │ strd r0, sl, [r4, #148] @ 0x94 │ │ ldr r0, [sp, #172] @ 0xac │ │ strd r0, r8, [r4, #156] @ 0x9c │ │ @@ -127969,224 +127882,224 @@ │ │ ldr r0, [sp, #180] @ 0xb4 │ │ ldr r1, [sp, #144] @ 0x90 │ │ str.w r0, [r4, #140] @ 0x8c │ │ add.w r0, r4, #192 @ 0xc0 │ │ str.w fp, [r4, #176] @ 0xb0 │ │ str.w r5, [r4, #144] @ 0x90 │ │ strd r6, r9, [r4, #164] @ 0xa4 │ │ - bl d4c50 │ │ - b.n 7ca4e │ │ + bl d50a2 │ │ + b.n 7cab6 │ │ str r0, [sp, #128] @ 0x80 │ │ mov r0, r4 │ │ - ldr r2, [pc, #952] @ (7d0c0 ) │ │ + ldr r2, [pc, #952] @ (7d128 ) │ │ mov r1, r5 │ │ movs r3, #15 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #168] @ 0xa8 │ │ mov sl, r0 │ │ cmp r0, #0 │ │ ldr r0, [sp, #168] @ 0xa8 │ │ mov r6, r5 │ │ it eq │ │ moveq r0, sl │ │ str r0, [sp, #168] @ 0xa8 │ │ it eq │ │ moveq.w sl, #1 │ │ - ldr r2, [pc, #920] @ (7d0c4 ) │ │ + ldr r2, [pc, #920] @ (7d12c ) │ │ mov r0, r4 │ │ mov r1, r5 │ │ movs r3, #15 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ strd r0, r1, [sp, #120] @ 0x78 │ │ - ldr r2, [pc, #908] @ (7d0c8 ) │ │ + ldr r2, [pc, #908] @ (7d130 ) │ │ mov r0, r4 │ │ mov r1, r6 │ │ movs r3, #17 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #196] @ 0xc4 │ │ mov r1, r0 │ │ cmp r0, #0 │ │ ldr r0, [sp, #196] @ 0xc4 │ │ it eq │ │ moveq r0, r1 │ │ str r0, [sp, #196] @ 0xc4 │ │ it eq │ │ moveq r1, #1 │ │ str r1, [sp, #156] @ 0x9c │ │ - ldr r2, [pc, #876] @ (7d0cc ) │ │ + ldr r2, [pc, #876] @ (7d134 ) │ │ mov r0, r4 │ │ mov r1, r6 │ │ movs r3, #15 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #192] @ 0xc0 │ │ ldr r1, [sp, #192] @ 0xc0 │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #192] @ 0xc0 │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #152] @ 0x98 │ │ - ldr r2, [pc, #848] @ (7d0d0 ) │ │ + ldr r2, [pc, #848] @ (7d138 ) │ │ mov r0, r4 │ │ mov r1, r6 │ │ movs r3, #15 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #188] @ 0xbc │ │ ldr r1, [sp, #188] @ 0xbc │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #188] @ 0xbc │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #140] @ 0x8c │ │ - ldr r2, [pc, #820] @ (7d0d4 ) │ │ + ldr r2, [pc, #820] @ (7d13c ) │ │ mov r0, r4 │ │ mov r1, r6 │ │ movs r3, #14 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #180] @ 0xb4 │ │ ldr r1, [sp, #180] @ 0xb4 │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #180] @ 0xb4 │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #136] @ 0x88 │ │ - ldr r2, [pc, #792] @ (7d0d8 ) │ │ + ldr r2, [pc, #792] @ (7d140 ) │ │ mov r0, r4 │ │ mov r1, r6 │ │ movs r3, #22 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #176] @ 0xb0 │ │ ldr r1, [sp, #176] @ 0xb0 │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #176] @ 0xb0 │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #116] @ 0x74 │ │ - ldr r2, [pc, #764] @ (7d0dc ) │ │ + ldr r2, [pc, #764] @ (7d144 ) │ │ mov r0, r4 │ │ mov r1, r6 │ │ movs r3, #14 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #172] @ 0xac │ │ ldr r1, [sp, #172] @ 0xac │ │ cmp r0, #0 │ │ it eq │ │ moveq r1, r0 │ │ str r1, [sp, #172] @ 0xac │ │ it eq │ │ moveq r0, #1 │ │ str r0, [sp, #112] @ 0x70 │ │ - ldr r2, [pc, #736] @ (7d0e0 ) │ │ + ldr r2, [pc, #736] @ (7d148 ) │ │ mov r0, r4 │ │ mov r1, r6 │ │ movs r3, #19 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r1, [sp, #164] @ 0xa4 │ │ mov r8, r0 │ │ cmp r0, #0 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ it eq │ │ moveq r0, r8 │ │ str r0, [sp, #164] @ 0xa4 │ │ it eq │ │ moveq.w r8, #1 │ │ - ldr r2, [pc, #708] @ (7d0e4 ) │ │ + ldr r2, [pc, #708] @ (7d14c ) │ │ mov r0, r4 │ │ mov r1, r6 │ │ movs r3, #19 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ mov r9, r0 │ │ mov r5, r1 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r5, r0 │ │ moveq.w r9, #1 │ │ - ldr r2, [pc, #684] @ (7d0e8 ) │ │ + ldr r2, [pc, #684] @ (7d150 ) │ │ mov r0, r4 │ │ mov r1, r6 │ │ movs r3, #16 │ │ add r2, pc │ │ - bl 7e490 │ │ + bl 7e4f8 │ │ str r5, [sp, #132] @ 0x84 │ │ add r4, sp, #680 @ 0x2a8 │ │ ldr r2, [sp, #168] @ 0xa8 │ │ mov fp, r0 │ │ mov r6, r1 │ │ mov r0, r4 │ │ mov r1, sl │ │ - bl 8e858 │ │ + bl 8e8c4 │ │ cmp.w fp, #0 │ │ itt eq │ │ moveq r6, fp │ │ moveq.w fp, #1 │ │ ldrb.w r5, [sp, #680] @ 0x2a8 │ │ cmp r5, #10 │ │ - beq.n 7cea6 │ │ + beq.n 7cf0e │ │ add.w sl, sp, #1032 @ 0x408 │ │ adds r1, r4, #1 │ │ movs r2, #23 │ │ mov r0, sl │ │ - bl d53c6 │ │ + bl d52ea │ │ add.w r1, r4, #24 │ │ add.w r0, sp, #1056 @ 0x420 │ │ movs r2, #32 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r1, [sp, #120] @ 0x78 │ │ ldr r2, [sp, #124] @ 0x7c │ │ cmp r1, #0 │ │ itt eq │ │ moveq r2, r1 │ │ moveq r1, #1 │ │ add r4, sp, #680 @ 0x2a8 │ │ mov r0, r4 │ │ - bl 8e858 │ │ + bl 8e8c4 │ │ ldrb.w r0, [sp, #680] @ 0x2a8 │ │ cmp r0, #10 │ │ - bne.n 7ceca │ │ + bne.n 7cf32 │ │ ldr r1, [sp, #96] @ 0x60 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str.w r0, [r1, #256] @ 0x100 │ │ ldr r0, [r7, #8] │ │ ldr r1, [r0, #68] @ 0x44 │ │ ldr r0, [sp, #128] @ 0x80 │ │ - bl 8e2a4 │ │ + bl 8e310 │ │ movs r4, #0 │ │ add r0, sp, #344 @ 0x158 │ │ ldr.w r9, [sp, #148] @ 0x94 │ │ - bl 8ee2c │ │ + bl 8ee98 │ │ ldr r5, [sp, #184] @ 0xb8 │ │ - b.n 7ca2c │ │ + b.n 7ca94 │ │ str r5, [sp, #184] @ 0xb8 │ │ add r5, sp, #592 @ 0x250 │ │ adds r1, r4, #1 │ │ str r0, [sp, #168] @ 0xa8 │ │ mov r0, r5 │ │ movs r2, #23 │ │ - bl d53c6 │ │ + bl d52ea │ │ add.w r1, r4, #24 │ │ add r0, sp, #376 @ 0x178 │ │ movs r2, #32 │ │ - bl d53c6 │ │ + bl d52ea │ │ add r0, sp, #408 @ 0x198 │ │ str r6, [sp, #160] @ 0xa0 │ │ ldmia r5!, {r1, r2, r3, r4, r6} │ │ stmia r0!, {r1, r2, r3, r4, r6} │ │ ldrh r1, [r5, #0] │ │ strh r1, [r0, #0] │ │ ldrb r1, [r5, #2] │ │ @@ -128200,109 +128113,109 @@ │ │ ldrh r1, [r5, #0] │ │ strh r1, [r0, #0] │ │ ldrb r1, [r5, #2] │ │ strb r1, [r0, #2] │ │ add r4, sp, #432 @ 0x1b0 │ │ add.w r0, r4, #23 │ │ add.w r1, sp, #1056 @ 0x420 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldmia.w sl!, {r0, r1, r2, r3, r6} │ │ stmia r4!, {r0, r1, r2, r3, r6} │ │ ldrh.w r0, [sl] │ │ strh r0, [r4, #0] │ │ ldrb.w r0, [sl, #2] │ │ strb r0, [r4, #2] │ │ ldr r0, [r7, #8] │ │ ldr r1, [r0, #68] @ 0x44 │ │ ldr r0, [sp, #128] @ 0x80 │ │ - bl 8e2a4 │ │ + bl 8e310 │ │ ldrd sl, r5, [sp, #112] @ 0x70 │ │ ldr r6, [sp, #164] @ 0xa4 │ │ - b.n 7cc66 │ │ + b.n 7ccce │ │ movs r0, #4 │ │ movs r1, #148 @ 0x94 │ │ - bl 3de2a │ │ - b.n 7d060 │ │ + bl 3e132 │ │ + b.n 7d0c8 │ │ movs r0, #4 │ │ movs r1, #148 @ 0x94 │ │ ldr.w r9, [sp, #148] @ 0x94 │ │ ldr r5, [sp, #184] @ 0xb8 │ │ - bl 3de2a │ │ - b.n 7d060 │ │ + bl 3e132 │ │ + b.n 7d0c8 │ │ ldr r0, [sp, #512] @ 0x200 │ │ cmp r4, #21 │ │ - bcs.n 7d04e │ │ + bcs.n 7d0b6 │ │ add.w ip, r0, r4, lsl #3 │ │ add.w r4, r0, #8 │ │ mov.w r9, #0 │ │ mov r3, r0 │ │ mov r8, r4 │ │ ldr r4, [r3, #8] │ │ ldr r1, [r3, #0] │ │ cmp r4, r1 │ │ - bcs.n 7cf9e │ │ + bcs.n 7d006 │ │ ldr.w lr, [r3, #12] │ │ mov r6, r9 │ │ adds r1, r0, r6 │ │ ldr r2, [r0, r6] │ │ ldr r3, [r1, #4] │ │ strd r2, r3, [r1, #8] │ │ - cbz r6, 7cf98 │ │ + cbz r6, 7d000 │ │ ldr.w r1, [r1, #-8] │ │ subs r6, #8 │ │ cmp r4, r1 │ │ - bcc.n 7cf7c │ │ + bcc.n 7cfe4 │ │ adds r1, r0, r6 │ │ adds r1, #8 │ │ - b.n 7cf9a │ │ + b.n 7d002 │ │ mov r1, r0 │ │ strd r4, lr, [r1] │ │ add.w r4, r8, #8 │ │ add.w r9, r9, #8 │ │ mov r3, r8 │ │ cmp r4, ip │ │ - bne.n 7cf6c │ │ - b.w 7bd22 │ │ + bne.n 7cfd4 │ │ + b.w 7bd8a │ │ cmp.w sl, #21 │ │ - bcs.n 7d062 │ │ + bcs.n 7d0ca │ │ add.w r3, r9, sl, lsl #5 │ │ add.w r0, r9, #32 │ │ movs r6, #0 │ │ mov r1, r9 │ │ str r3, [sp, #168] @ 0xa8 │ │ mov fp, r9 │ │ mov r4, r0 │ │ ldrd r0, r2, [r1, #8] │ │ ldrd r8, r9, [r1, #40] @ 0x28 │ │ subs.w r0, r8, r0 │ │ sbcs.w r0, r9, r2 │ │ - bcs.n 7d03e │ │ + bcs.n 7d0a6 │ │ ldrd r0, r2, [r1, #32] │ │ str r4, [sp, #180] @ 0xb4 │ │ strd r2, r0, [sp, #172] @ 0xac │ │ add.w r0, r1, #48 @ 0x30 │ │ add r1, sp, #680 @ 0x2a8 │ │ ldmia.w r0, {r2, r3, r4, r5} │ │ stmia r1!, {r2, r3, r4, r5} │ │ str r6, [sp, #192] @ 0xc0 │ │ add.w r5, fp, r6 │ │ movs r2, #32 │ │ add.w r4, r5, #32 │ │ mov r1, r5 │ │ mov r0, r4 │ │ - bl d53c6 │ │ - cbz r6, 7d01e │ │ + bl d52ea │ │ + cbz r6, 7d086 │ │ ldrd r0, r1, [r5, #-24] │ │ subs r6, #32 │ │ subs.w r0, r8, r0 │ │ sbcs.w r0, r9, r1 │ │ - bcc.n 7cff2 │ │ + bcc.n 7d05a │ │ add.w r0, fp, r6 │ │ adds r0, #32 │ │ - b.n 7d020 │ │ + b.n 7d088 │ │ mov r0, fp │ │ ldrd r2, r1, [sp, #172] @ 0xac │ │ strd r1, r2, [r0] │ │ sub.w r0, r4, #16 │ │ strd r8, r9, [r4, #-24] │ │ add r1, sp, #680 @ 0x2a8 │ │ ldmia.w r1, {r2, r3, r4, r5} │ │ @@ -128311,925 +128224,925 @@ │ │ ldr r6, [sp, #192] @ 0xc0 │ │ ldr r4, [sp, #180] @ 0xb4 │ │ adds r6, #32 │ │ add.w r0, r4, #32 │ │ mov r1, r4 │ │ mov r9, fp │ │ cmp r0, r3 │ │ - bne.n 7cfc4 │ │ - b.n 7c8ec │ │ + bne.n 7d02c │ │ + b.n 7c954 │ │ mov r1, r4 │ │ - bl 8e4e0 │ │ - b.w 7bd22 │ │ + bl 8e54c │ │ + b.w 7bd8a │ │ movs r0, #8 │ │ mov r1, r8 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ udf #254 @ 0xfe │ │ mov r0, r9 │ │ mov r1, sl │ │ - bl 8e590 │ │ - b.w 7c8ec │ │ - b.n 7d152 │ │ - b.n 7d164 │ │ - b.n 7d078 │ │ - b.n 7d078 │ │ - b.n 7d07c │ │ + bl 8e5fc │ │ + b.w 7c954 │ │ + b.n 7d1ba │ │ + b.n 7d1cc │ │ + b.n 7d0e0 │ │ + b.n 7d0e0 │ │ + b.n 7d0e4 │ │ mov r8, r0 │ │ - b.n 7d08a │ │ + b.n 7d0f2 │ │ mov r8, r0 │ │ ldr r0, [sp, #592] @ 0x250 │ │ cmp r0, #2 │ │ - beq.n 7d08a │ │ + beq.n 7d0f2 │ │ add r0, sp, #592 @ 0x250 │ │ - bl 82ad2 │ │ + bl 82b3a │ │ add.w r0, sp, #1056 @ 0x420 │ │ - bl 8011e │ │ - b.n 7d154 │ │ + bl 80186 │ │ + b.n 7d1bc │ │ mov r8, r0 │ │ add r0, sp, #680 @ 0x2a8 │ │ - bl 8c728 │ │ - b.n 7d154 │ │ - bl 416fe │ │ + bl 8c794 │ │ + b.n 7d1bc │ │ + bl 41a06 │ │ mov r8, r0 │ │ add r0, sp, #680 @ 0x2a8 │ │ - bl 8c6a0 │ │ - b.n 7d140 │ │ - bl 416fe │ │ + bl 8c70c │ │ + b.n 7d1a8 │ │ + bl 41a06 │ │ mov r8, r0 │ │ add r0, sp, #568 @ 0x238 │ │ - bl 8e71e │ │ - b.n 7d146 │ │ - bl 416fe │ │ - nop │ │ - cbnz r7, 7d0d2 │ │ - @ instruction: 0xfff9b9b2 │ │ - @ instruction: 0xfff9b8f8 │ │ - @ instruction: 0xfff9b8f6 │ │ - vtbx.8 d27, {d25}, d21 │ │ - vqshrn.u64 d27, q5, #7 │ │ - vtbl.8 d27, {d9-d10}, d8 │ │ - @ instruction: 0xfff9b894 │ │ - vtbl.8 d27, {d25}, d2 │ │ - vtbl.8 d27, {d25}, d5 │ │ - vtbl.8 d21, {d9-d12}, d26 │ │ + bl 8e78a │ │ + b.n 7d1ae │ │ + bl 41a06 │ │ + nop │ │ + @ instruction: 0xb8d7 │ │ + vtbx.8 d27, {d9-d10}, d10 │ │ + @ instruction: 0xfff9b890 │ │ + vtbl.8 d27, {d25}, d14 │ │ + vqrshrun.s64 d27, , #7 │ │ + @ instruction: 0xfff9b8b2 │ │ + vtbl.8 d27, {d25}, d16 │ │ + vtbl.8 d27, {d9}, d28 │ │ + vqshrun.s64 d27, q5, #7 │ │ + vqshrun.s64 d27, , #7 │ │ + vtbx.8 d21, {d25-d27}, d2 │ │ vrsubhn.i d20, , q0 │ │ - b.n 7d1ac │ │ + b.n 7d214 │ │ mov r8, r0 │ │ add r0, sp, #544 @ 0x220 │ │ - bl 8e6b6 │ │ + bl 8e722 │ │ cmp.w fp, #0 │ │ - bne.n 7d1a2 │ │ + bne.n 7d20a │ │ ldr r0, [sp, #132] @ 0x84 │ │ - b.n 7d19e │ │ - bl 416fe │ │ + b.n 7d206 │ │ + bl 41a06 │ │ mov r8, r0 │ │ mov r0, r9 │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r4, #0 │ │ - b.n 7d156 │ │ + b.n 7d1be │ │ mov r8, r0 │ │ - b.n 7d146 │ │ - b.n 7d118 │ │ + b.n 7d1ae │ │ + b.n 7d180 │ │ mov r8, r0 │ │ ldr r0, [sp, #116] @ 0x74 │ │ - bl 8020e │ │ - b.n 7d154 │ │ + bl 80276 │ │ + b.n 7d1bc │ │ mov r8, r0 │ │ - b.n 7d1d4 │ │ + b.n 7d23c │ │ mov r8, r0 │ │ ldr r1, [r4, #68] @ 0x44 │ │ ldr r0, [sp, #128] @ 0x80 │ │ - bl 8e2a4 │ │ + bl 8e310 │ │ add r0, sp, #344 @ 0x158 │ │ - bl 8ee2c │ │ + bl 8ee98 │ │ ldr.w r9, [sp, #148] @ 0x94 │ │ ldr r6, [sp, #160] @ 0xa0 │ │ - b.n 7d226 │ │ + b.n 7d28e │ │ mov r8, r0 │ │ add r0, sp, #568 @ 0x238 │ │ - bl 8e71e │ │ + bl 8e78a │ │ add r0, sp, #492 @ 0x1ec │ │ - bl 8c558 │ │ - b.n 7d1ac │ │ - bl 416fe │ │ + bl 8c5c4 │ │ + b.n 7d214 │ │ + bl 41a06 │ │ mov r8, r0 │ │ movs r4, #1 │ │ add r0, sp, #544 @ 0x220 │ │ - bl 8e6b6 │ │ - cbnz r4, 7d198 │ │ - b.n 7d1a2 │ │ - bl 416fe │ │ + bl 8e722 │ │ + cbnz r4, 7d200 │ │ + b.n 7d20a │ │ + bl 41a06 │ │ mov r8, r0 │ │ - b.n 7d1a2 │ │ + b.n 7d20a │ │ ldr r5, [sp, #184] @ 0xb8 │ │ mov r8, r0 │ │ - b.n 7d1e8 │ │ + b.n 7d250 │ │ ldr.w r9, [sp, #148] @ 0x94 │ │ mov r8, r0 │ │ movs r4, #1 │ │ movs r6, #1 │ │ - b.n 7d214 │ │ + b.n 7d27c │ │ mov r8, r0 │ │ subs r5, #1 │ │ - beq.n 7d18e │ │ + beq.n 7d1f6 │ │ mov r0, r6 │ │ add.w r9, r6, #352 @ 0x160 │ │ - bl 8c728 │ │ + bl 8c794 │ │ mov r6, r9 │ │ - b.n 7d17c │ │ + b.n 7d1e4 │ │ ldr r0, [sp, #544] @ 0x220 │ │ - cbz r0, 7d198 │ │ + cbz r0, 7d200 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #532] @ 0x214 │ │ - cbz r0, 7d1a2 │ │ + cbz r0, 7d20a │ │ ldr r0, [sp, #536] @ 0x218 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #508] @ 0x1fc │ │ - cbz r0, 7d1ac │ │ + cbz r0, 7d214 │ │ ldr r0, [sp, #512] @ 0x200 │ │ - blx d87c0 │ │ + blx d87d0 │ │ dmb ish │ │ ldr r3, [sp, #188] @ 0xbc │ │ ldrex r0, [r3] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r3] │ │ cmp r2, #0 │ │ - bne.n 7d1b2 │ │ + bne.n 7d21a │ │ cmp r0, #1 │ │ - bne.n 7d1ce │ │ + bne.n 7d236 │ │ dmb ish │ │ add r0, sp, #488 @ 0x1e8 │ │ - bl 7e154 │ │ + bl 7e1bc │ │ movs r4, #1 │ │ ldr.w r9, [sp, #148] @ 0x94 │ │ ldr r6, [sp, #160] @ 0xa0 │ │ - b.n 7d214 │ │ - bl 416fe │ │ - bl 416fe │ │ + b.n 7d27c │ │ + bl 41a06 │ │ + bl 41a06 │ │ mov r8, r0 │ │ add r0, sp, #680 @ 0x2a8 │ │ - bl 7e1f4 │ │ + bl 7e25c │ │ add r0, sp, #200 @ 0xc8 │ │ ldr.w r1, [r9, #68] @ 0x44 │ │ add.w r4, r0, #124 @ 0x7c │ │ mov r0, r5 │ │ - bl 8e2a4 │ │ + bl 8e310 │ │ mov r0, r4 │ │ - bl 8c2a8 │ │ + bl 8c314 │ │ movs r6, #0 │ │ - b.n 7d212 │ │ - bl 416fe │ │ - bl 416fe │ │ + b.n 7d27a │ │ + bl 41a06 │ │ + bl 41a06 │ │ mov r8, r0 │ │ add r0, sp, #680 @ 0x2a8 │ │ - bl 7e1f4 │ │ + bl 7e25c │ │ movs r4, #1 │ │ - cbz r4, 7d226 │ │ + cbz r4, 7d28e │ │ ldr r1, [r7, #8] │ │ ldr r0, [r1, #64] @ 0x40 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.n 7d226 │ │ + beq.n 7d28e │ │ ldr r1, [r1, #68] @ 0x44 │ │ - bl 8e2a4 │ │ - cbz r6, 7d23a │ │ + bl 8e310 │ │ + cbz r6, 7d2a2 │ │ ldr.w r0, [r9, #64] @ 0x40 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.n 7d23a │ │ + beq.n 7d2a2 │ │ ldr.w r1, [r9, #68] @ 0x44 │ │ - bl 8e2a4 │ │ + bl 8e310 │ │ ldr r0, [sp, #144] @ 0x90 │ │ ldrd r0, r1, [r0, #64] @ 0x40 │ │ - bl 8e2a4 │ │ + bl 8e310 │ │ mov r0, r8 │ │ - blx d6dd0 │ │ - bl 416fe │ │ - bmi.n 7d1fa │ │ + blx d6de0 │ │ + bl 41a06 │ │ + bmi.n 7d262 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ subw sp, sp, #1404 @ 0x57c │ │ mov fp, r0 │ │ add r0, sp, #1016 @ 0x3f8 │ │ mov r4, r2 │ │ mov r5, r1 │ │ - bl 7e240 │ │ + bl 7e2a8 │ │ ldr r0, [sp, #1016] @ 0x3f8 │ │ cmp r0, #1 │ │ - bne.n 7d35c │ │ + bne.n 7d3c4 │ │ ldrd sl, r9, [sp, #1020] @ 0x3fc │ │ movs r0, #0 │ │ movs r1, #4 │ │ str r0, [sp, #68] @ 0x44 │ │ str r1, [sp, #64] @ 0x40 │ │ strd r0, r0, [sp, #56] @ 0x38 │ │ strd r0, r1, [sp, #48] @ 0x30 │ │ add r0, sp, #1016 @ 0x3f8 │ │ mov r1, sl │ │ mov r2, r9 │ │ - bl 7b10c │ │ + bl 7b174 │ │ ldr.w r0, [sp, #1080] @ 0x438 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.n 7d2f8 │ │ + beq.n 7d360 │ │ str r4, [sp, #32] │ │ add r4, sp, #744 @ 0x2e8 │ │ add r1, sp, #1016 @ 0x3f8 │ │ movs r2, #80 @ 0x50 │ │ mov r0, r4 │ │ strd fp, sl, [sp, #16] │ │ strd r9, r5, [sp, #24] │ │ - bl d4c50 │ │ + bl d50a2 │ │ mov r0, r4 │ │ - bl 8c8bc │ │ + bl 8c928 │ │ ldr r0, [sp, #756] @ 0x2f4 │ │ cmp r0, #0 │ │ ittt ne │ │ ldrne r1, [sp, #760] @ 0x2f8 │ │ strne r1, [sp, #44] @ 0x2c │ │ cmpne r1, #0 │ │ - bne.n 7d3b0 │ │ + bne.n 7d418 │ │ add r4, sp, #840 @ 0x348 │ │ ldrd r1, r2, [sp, #28] │ │ add r3, sp, #48 @ 0x30 │ │ mov r0, r4 │ │ - bl 8d970 │ │ + bl 8d9dc │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str r0, [sp, #984] @ 0x3d8 │ │ add.w r8, sp, #48 @ 0x30 │ │ add r0, sp, #1016 @ 0x3f8 │ │ add r2, sp, #744 @ 0x2e8 │ │ add r3, sp, #920 @ 0x398 │ │ mov r1, r8 │ │ str r4, [sp, #0] │ │ ldrd sl, r9, [sp, #20] │ │ - bl 7b6c4 │ │ + bl 7b72c │ │ ldr.w fp, [sp, #16] │ │ ldr.w r0, [sp, #1272] @ 0x4f8 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.n 7d36e │ │ + bne.n 7d3d6 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str.w r0, [fp, #288] @ 0x120 │ │ ldrd r4, r5, [sp, #52] @ 0x34 │ │ - cbz r5, 7d31c │ │ + cbz r5, 7d384 │ │ adds r6, r4, #4 │ │ ldr.w r0, [r6, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #12 │ │ subs r5, #1 │ │ - bne.n 7d308 │ │ + bne.n 7d370 │ │ ldr r0, [sp, #48] @ 0x30 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r4, r5, [sp, #64] @ 0x40 │ │ - cbz r5, 7d33e │ │ + cbz r5, 7d3a6 │ │ adds r6, r4, #4 │ │ ldrd r0, r1, [r6, #-4] │ │ - blx d89d0 │ │ + blx d89e0 │ │ adds r6, #8 │ │ subs r5, #1 │ │ - bne.n 7d330 │ │ + bne.n 7d398 │ │ ldr r0, [sp, #60] @ 0x3c │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, sl │ │ mov r1, r9 │ │ - blx d89d0 │ │ + blx d89e0 │ │ addw sp, sp, #1404 @ 0x57c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str.w r0, [fp, #288] @ 0x120 │ │ addw sp, sp, #1404 @ 0x57c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ add r5, sp, #408 @ 0x198 │ │ add r1, sp, #1016 @ 0x3f8 │ │ mov.w r2, #304 @ 0x130 │ │ mov r0, r5 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add r6, sp, #72 @ 0x48 │ │ mov r1, r5 │ │ mov.w r2, #336 @ 0x150 │ │ mov r0, r6 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add.w r0, fp, #32 │ │ mov r1, r6 │ │ mov.w r2, #304 @ 0x130 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldmia.w r8, {r1, r2, r3, r4, r5, r6} │ │ add.w r0, fp, #8 │ │ stmia r0!, {r1, r2, r3, r4, r5, r6} │ │ strd sl, r9, [fp] │ │ addw sp, sp, #1404 @ 0x57c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ add.w r0, r0, r0, lsl #2 │ │ ldr.w fp, [sp, #752] @ 0x2f0 │ │ ldrd r9, r5, [sp, #768] @ 0x300 │ │ mov.w sl, r0, lsl #3 │ │ ldr r0, [sp, #764] @ 0x2fc │ │ ldrd r6, r4, [sp, #776] @ 0x308 │ │ str r0, [sp, #40] @ 0x28 │ │ - ldr r0, [pc, #880] @ (7d73c ) │ │ + ldr r0, [pc, #880] @ (7d7a4 ) │ │ add r0, pc │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n 7d3d8 │ │ + b.n 7d440 │ │ subs.w sl, sl, #40 @ 0x28 │ │ - beq.w 7d2c0 │ │ + beq.w 7d328 │ │ mov r8, fp │ │ ldr.w r0, [fp], #40 │ │ adds.w r2, r9, r0 │ │ mov.w r0, #0 │ │ adcs.w r3, r5, #0 │ │ adcs.w r0, r0, #0 │ │ - bne.n 7d3d0 │ │ + bne.n 7d438 │ │ ldrd r1, r0, [sp, #40] @ 0x28 │ │ strd r6, r4, [sp] │ │ - bl 709c0 │ │ + bl 70a74 │ │ cmp r0, #0 │ │ - beq.n 7d3d0 │ │ + beq.n 7d438 │ │ cmp r1, #14 │ │ - bne.n 7d3d0 │ │ + bne.n 7d438 │ │ ldr r1, [sp, #36] @ 0x24 │ │ movs r2, #14 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.n 7d3d0 │ │ + bne.n 7d438 │ │ ldr.w r0, [r8, #4] │ │ cmp r0, #8 │ │ itt ne │ │ ldrne.w r0, [r8, #20] │ │ cmpne r0, #0 │ │ - beq.w 7d2c0 │ │ + beq.w 7d328 │ │ ldr r2, [sp, #748] @ 0x2ec │ │ ldr.w r1, [r8, #16] │ │ subs r2, r2, r1 │ │ it cs │ │ cmpcs r2, r0 │ │ - bcc.w 7d2c0 │ │ + bcc.w 7d328 │ │ ldr r2, [sp, #744] @ 0x2e8 │ │ movs r6, #0 │ │ adds r5, r2, r1 │ │ ldrb r1, [r5, r6] │ │ - cbz r1, 7d444 │ │ + cbz r1, 7d4ac │ │ adds r6, #1 │ │ cmp r0, r6 │ │ - bne.n 7d438 │ │ - b.n 7d2c0 │ │ + bne.n 7d4a0 │ │ + b.n 7d328 │ │ bic.w r2, r6, #3 │ │ add.w r1, r2, #8 │ │ adds r2, #4 │ │ cmp r1, r2 │ │ - bcc.w 7d2c0 │ │ + bcc.w 7d328 │ │ cmp r1, r0 │ │ - bhi.w 7d2c0 │ │ + bhi.w 7d328 │ │ ldr r4, [sp, #32] │ │ lsrs r0, r4, #7 │ │ cmp r0, #2 │ │ - bhi.n 7d532 │ │ + bhi.n 7d59a │ │ add.w r8, sp, #1016 @ 0x3f8 │ │ ldr r1, [sp, #28] │ │ mov r2, r4 │ │ mov r0, r8 │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #0 │ │ adds r2, r4, #1 │ │ strb.w r0, [r8, r4] │ │ add r0, sp, #920 @ 0x398 │ │ mov r1, r8 │ │ - bl 401d8 │ │ + bl 404e0 │ │ ldr r0, [sp, #920] @ 0x398 │ │ cmp r0, #1 │ │ - bne.n 7d49e │ │ - ldr r0, [pc, #696] @ (7d740 ) │ │ + bne.n 7d506 │ │ + ldr r0, [pc, #696] @ (7d7a8 ) │ │ mov.w fp, #2147483648 @ 0x80000000 │ │ add r0, pc │ │ ldrd r0, r1, [r0] │ │ strd r0, r1, [sp, #1008] @ 0x3f0 │ │ cmp.w fp, #2147483648 @ 0x80000000 │ │ - beq.n 7d506 │ │ - b.n 7d546 │ │ + beq.n 7d56e │ │ + b.n 7d5ae │ │ ldr r0, [sp, #924] @ 0x39c │ │ movs r1, #0 │ │ mov.w r8, #0 │ │ - blx d89f0 │ │ - cbz r0, 7d4cc │ │ + blx d8a00 │ │ + cbz r0, 7d534 │ │ mov r4, r0 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov fp, r0 │ │ - cbz r0, 7d4e4 │ │ + cbz r0, 7d54c │ │ mov r0, fp │ │ movs r1, #1 │ │ - bl 4191c │ │ + bl 41c24 │ │ mov r8, r0 │ │ - cbnz r0, 7d4e8 │ │ + cbnz r0, 7d550 │ │ movs r0, #1 │ │ mov r1, fp │ │ - bl 3dfa4 │ │ - b.n 7d5a6 │ │ - blx d8850 │ │ + bl 3e2ac │ │ + b.n 7d60e │ │ + blx d8860 │ │ strb.w r8, [sp, #1008] @ 0x3f0 │ │ mov.w fp, #2147483648 @ 0x80000000 │ │ ldr r0, [r0, #0] │ │ str r0, [sp, #1012] @ 0x3f4 │ │ cmp.w fp, #2147483648 @ 0x80000000 │ │ - beq.n 7d506 │ │ - b.n 7d546 │ │ + beq.n 7d56e │ │ + b.n 7d5ae │ │ mov.w r8, #1 │ │ mov r0, r8 │ │ mov r1, r4 │ │ mov r2, fp │ │ - bl d53c6 │ │ + bl d52ea │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ str.w fp, [sp, #1012] @ 0x3f4 │ │ strd fp, r8, [sp, #1004] @ 0x3ec │ │ cmp.w fp, #2147483648 @ 0x80000000 │ │ - bne.n 7d546 │ │ + bne.n 7d5ae │ │ ldrb.w r0, [sp, #1008] @ 0x3f0 │ │ cmp r0, #3 │ │ - bne.w 7d2c0 │ │ + bne.w 7d328 │ │ ldr r6, [sp, #1012] @ 0x3f4 │ │ ldrd r4, r5, [r6] │ │ ldr r1, [r5, #0] │ │ - cbz r1, 7d51e │ │ + cbz r1, 7d586 │ │ mov r0, r4 │ │ blx r1 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r6 │ │ - blx d87c0 │ │ - b.n 7d2c0 │ │ + blx d87d0 │ │ + b.n 7d328 │ │ ldr r1, [sp, #28] │ │ add r0, sp, #1004 @ 0x3ec │ │ mov r2, r4 │ │ - bl 8c9f0 │ │ + bl 8ca5c │ │ ldr.w fp, [sp, #1004] @ 0x3ec │ │ cmp.w fp, #2147483648 @ 0x80000000 │ │ - beq.n 7d506 │ │ + beq.n 7d56e │ │ ldrd r1, r4, [sp, #1008] @ 0x3f0 │ │ - cbz r4, 7d558 │ │ + cbz r4, 7d5c0 │ │ ldrb r0, [r1, #0] │ │ subs r0, #47 @ 0x2f │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ - b.n 7d55a │ │ + b.n 7d5c2 │ │ movs r0, #0 │ │ ldrd sl, r9, [sp, #20] │ │ strb.w r0, [sp, #1046] @ 0x416 │ │ movs r0, #6 │ │ strb.w r0, [sp, #1024] @ 0x400 │ │ movw r0, #513 @ 0x201 │ │ str r1, [sp, #44] @ 0x2c │ │ strd r1, r4, [sp, #1016] @ 0x3f8 │ │ strh.w r0, [sp, #1044] @ 0x414 │ │ add r0, sp, #920 @ 0x398 │ │ add r1, sp, #1016 @ 0x3f8 │ │ - bl 8cacc │ │ + bl 8cb38 │ │ ldrb.w r0, [sp, #920] @ 0x398 │ │ subs r0, #7 │ │ cmp r0, #3 │ │ - bcs.n 7d5a8 │ │ + bcs.n 7d610 │ │ add r0, sp, #1016 @ 0x3f8 │ │ - bl 8ce24 │ │ + bl 8ce90 │ │ str r0, [sp, #36] @ 0x24 │ │ adds r0, r6, r1 │ │ str r1, [sp, #40] @ 0x28 │ │ add.w r8, r0, #16 │ │ cmp.w r8, #0 │ │ - bpl.n 7d5ae │ │ + bpl.n 7d616 │ │ movs r0, #0 │ │ mov r1, r8 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ udf #254 @ 0xfe │ │ mov.w r4, #2147483648 @ 0x80000000 │ │ - b.n 7d792 │ │ + b.n 7d7fa │ │ str r4, [sp, #12] │ │ - beq.n 7d5c2 │ │ + beq.n 7d62a │ │ mov r0, r8 │ │ movs r1, #1 │ │ - bl 4191c │ │ + bl 41c24 │ │ mov r4, r0 │ │ - cbnz r0, 7d5c4 │ │ + cbnz r0, 7d62c │ │ movs r0, #1 │ │ - b.n 7d5a0 │ │ + b.n 7d608 │ │ movs r4, #1 │ │ ldr r0, [sp, #40] @ 0x28 │ │ mov r9, r5 │ │ movs r5, #0 │ │ strd r8, r4, [sp, #1004] @ 0x3ec │ │ cmp r0, r8 │ │ str.w fp, [sp, #8] │ │ mov r8, r0 │ │ str r5, [sp, #1012] @ 0x3f4 │ │ - bhi.w 7d81c │ │ + bhi.w 7d884 │ │ ldr r1, [sp, #36] @ 0x24 │ │ adds r0, r4, r5 │ │ mov r2, r8 │ │ - bl d53c6 │ │ + bl d52ea │ │ adds.w fp, r5, r8 │ │ str.w fp, [sp, #1012] @ 0x3f4 │ │ - beq.n 7d600 │ │ + beq.n 7d668 │ │ add.w r0, r4, fp │ │ ldrb.w r0, [r0, #-1] │ │ subs r0, #47 @ 0x2f │ │ it ne │ │ movne r0, #1 │ │ - b.n 7d602 │ │ + b.n 7d66a │ │ movs r0, #0 │ │ - cbz r6, 7d612 │ │ + cbz r6, 7d67a │ │ ldrb.w r1, [r9] │ │ cmp r1, #47 @ 0x2f │ │ - bne.n 7d612 │ │ + bne.n 7d67a │ │ mov.w fp, #0 │ │ - b.n 7d628 │ │ + b.n 7d690 │ │ ldr r1, [sp, #1004] @ 0x3ec │ │ - cbz r0, 7d62e │ │ + cbz r0, 7d696 │ │ cmp r1, fp │ │ - beq.w 7d890 │ │ + beq.w 7d8f8 │ │ ldr r0, [sp, #1008] @ 0x3f0 │ │ movs r1, #47 @ 0x2f │ │ strb.w r1, [r0, fp] │ │ add.w fp, fp, #1 │ │ ldr r1, [sp, #1004] @ 0x3ec │ │ str.w fp, [sp, #1012] @ 0x3f4 │ │ ldr r4, [sp, #12] │ │ sub.w r0, r1, fp │ │ cmp r6, r0 │ │ - bhi.w 7d836 │ │ + bhi.w 7d89e │ │ ldr.w r8, [sp, #1008] @ 0x3f0 │ │ mov r1, r9 │ │ mov r2, r6 │ │ add.w r0, r8, fp │ │ - bl d53c6 │ │ + bl d52ea │ │ adds.w fp, fp, r6 │ │ str.w fp, [sp, #1012] @ 0x3f4 │ │ - beq.n 7d662 │ │ + beq.n 7d6ca │ │ ldrb.w r0, [r8] │ │ subs r0, #47 @ 0x2f │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ - b.n 7d664 │ │ + b.n 7d6cc │ │ movs r0, #0 │ │ strb.w r0, [sp, #950] @ 0x3b6 │ │ movs r0, #6 │ │ movw r1, #513 @ 0x201 │ │ strb.w r0, [sp, #928] @ 0x3a0 │ │ strd r8, fp, [sp, #920] @ 0x398 │ │ strh.w r1, [sp, #948] @ 0x3b4 │ │ - cbz r4, 7d68a │ │ + cbz r4, 7d6f2 │ │ ldr r3, [sp, #44] @ 0x2c │ │ ldrb r2, [r3, #0] │ │ subs r2, #47 @ 0x2f │ │ clz r2, r2 │ │ lsrs r2, r2, #5 │ │ - b.n 7d68e │ │ + b.n 7d6f6 │ │ movs r2, #0 │ │ ldr r3, [sp, #44] @ 0x2c │ │ strb.w r2, [sp, #1046] @ 0x416 │ │ strb.w r0, [sp, #1024] @ 0x400 │ │ strd r3, r4, [sp, #1016] @ 0x3f8 │ │ strh.w r1, [sp, #1044] @ 0x414 │ │ add r0, sp, #920 @ 0x398 │ │ add r1, sp, #1016 @ 0x3f8 │ │ - bl 8cf9c │ │ - cbz r0, 7d6ac │ │ + bl 8d008 │ │ + cbz r0, 7d714 │ │ ldr r4, [sp, #1004] @ 0x3ec │ │ - b.n 7d6ba │ │ + b.n 7d722 │ │ mov r0, r8 │ │ mov r1, fp │ │ - bl 8d0ec │ │ + bl 8d158 │ │ ldr r4, [sp, #1004] @ 0x3ec │ │ cmp r0, #0 │ │ - bne.n 7d78a │ │ + bne.n 7d7f2 │ │ ldr r0, [sp, #40] @ 0x28 │ │ movs r5, #0 │ │ str r5, [sp, #1012] @ 0x3f4 │ │ cmp r0, r4 │ │ mov r4, r0 │ │ - bhi.w 7d84e │ │ + bhi.w 7d8b6 │ │ ldr r1, [sp, #36] @ 0x24 │ │ add.w r0, r8, r5 │ │ mov r2, r4 │ │ - bl d53c6 │ │ + bl d52ea │ │ adds r1, r5, r4 │ │ str r1, [sp, #1012] @ 0x3f4 │ │ - beq.n 7d6fa │ │ + beq.n 7d762 │ │ add.w r0, r8, r1 │ │ ldrb.w r2, [r0, #-1] │ │ ldr r0, [sp, #1004] @ 0x3ec │ │ cmp r2, #47 @ 0x2f │ │ - beq.n 7d6fe │ │ + beq.n 7d766 │ │ cmp r0, r1 │ │ - beq.w 7d8bc │ │ + beq.w 7d924 │ │ movs r2, #47 @ 0x2f │ │ strb.w r2, [r8, r1] │ │ adds r1, #1 │ │ str r1, [sp, #1012] @ 0x3f4 │ │ - b.n 7d6fe │ │ + b.n 7d766 │ │ ldr r0, [sp, #1004] @ 0x3ec │ │ movs r1, #0 │ │ subs r0, r0, r1 │ │ cmp r0, #5 │ │ - bls.w 7d866 │ │ + bls.w 7d8ce │ │ add.w r0, r8, r1 │ │ movw r2, #26485 @ 0x6775 │ │ add.w fp, r1, #6 │ │ strh r2, [r0, #4] │ │ add.w r0, r8, fp │ │ str.w fp, [sp, #1012] @ 0x3f4 │ │ ldrb.w r2, [r0, #-1] │ │ movw r0, #25646 @ 0x642e │ │ movt r0, #25189 @ 0x6265 │ │ str.w r0, [r8, r1] │ │ - cbz r6, 7d744 │ │ + cbz r6, 7d7ac │ │ ldrb.w r0, [r9] │ │ cmp r0, #47 @ 0x2f │ │ - bne.n 7d744 │ │ + bne.n 7d7ac │ │ mov.w fp, #0 │ │ - b.n 7d75c │ │ - cbz r7, 7d788 │ │ - vqshl.u32 d30, d8, #25 │ │ + b.n 7d7c4 │ │ + uxth r7, r7 │ │ + vmlsl.u q15, d25, d0[0] │ │ movs r5, r0 │ │ ldr r0, [sp, #1004] @ 0x3ec │ │ cmp r2, #47 @ 0x2f │ │ - beq.n 7d762 │ │ + beq.n 7d7ca │ │ cmp r0, fp │ │ - beq.w 7d8a6 │ │ + beq.w 7d90e │ │ ldr r0, [sp, #1008] @ 0x3f0 │ │ movs r1, #47 @ 0x2f │ │ strb.w r1, [r0, fp] │ │ add.w fp, fp, #1 │ │ ldr r0, [sp, #1004] @ 0x3ec │ │ str.w fp, [sp, #1012] @ 0x3f4 │ │ sub.w r0, r0, fp │ │ cmp r6, r0 │ │ - bhi.w 7d87a │ │ + bhi.w 7d8e2 │ │ ldr r5, [sp, #1008] @ 0x3f0 │ │ mov r1, r9 │ │ mov r2, r6 │ │ add.w r0, r5, fp │ │ - bl d53c6 │ │ + bl d52ea │ │ add.w r1, fp, r6 │ │ str r1, [sp, #1012] @ 0x3f4 │ │ mov r0, r5 │ │ - bl 8d0ec │ │ + bl 8d158 │ │ ldr r4, [sp, #1004] @ 0x3ec │ │ - cbz r0, 7d806 │ │ + cbz r0, 7d86e │ │ ldrd r8, r6, [sp, #1008] @ 0x3f0 │ │ ldr.w fp, [sp, #8] │ │ cmp.w fp, #0 │ │ itt ne │ │ ldrne r0, [sp, #44] @ 0x2c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ cmp.w r4, #2147483648 @ 0x80000000 │ │ - beq.w 7d2c0 │ │ + beq.w 7d328 │ │ strd r4, r8, [sp, #828] @ 0x33c │ │ str r6, [sp, #836] @ 0x344 │ │ ldrd r1, r2, [sp, #28] │ │ add r0, sp, #1016 @ 0x3f8 │ │ add r3, sp, #828 @ 0x33c │ │ - bl 8d2c4 │ │ + bl 8d330 │ │ ldr.w r0, [sp, #1304] @ 0x518 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.w 7d2c0 │ │ + beq.w 7d328 │ │ add r0, sp, #408 @ 0x198 │ │ add r1, sp, #1016 @ 0x3f8 │ │ mov.w r2, #336 @ 0x150 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr r0, [sp, #808] @ 0x328 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #812] @ 0x32c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add r4, sp, #72 @ 0x48 │ │ add r1, sp, #408 @ 0x198 │ │ mov.w r2, #336 @ 0x150 │ │ mov r0, r4 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr r0, [sp, #16] │ │ mov r1, r4 │ │ mov.w r2, #336 @ 0x150 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldrd sl, r9, [sp, #20] │ │ ldrd r4, r5, [sp, #52] @ 0x34 │ │ cmp r5, #0 │ │ - bne.w 7d306 │ │ - b.n 7d31c │ │ + bne.w 7d36e │ │ + b.n 7d384 │ │ cmp r4, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #8] │ │ cmp r0, #0 │ │ - beq.w 7d2c0 │ │ + beq.w 7d328 │ │ ldr r0, [sp, #44] @ 0x2c │ │ - b.n 7d52c │ │ + b.n 7d594 │ │ movs r0, #1 │ │ movs r1, #0 │ │ str r0, [sp, #0] │ │ add r0, sp, #1004 @ 0x3ec │ │ mov r2, r8 │ │ movs r3, #1 │ │ - bl 77788 │ │ + bl 777f0 │ │ ldrd r4, r5, [sp, #1008] @ 0x3f0 │ │ ldr.w r8, [sp, #40] @ 0x28 │ │ - b.n 7d5dc │ │ + b.n 7d644 │ │ movs r0, #1 │ │ mov r1, fp │ │ str r0, [sp, #0] │ │ add r0, sp, #1004 @ 0x3ec │ │ mov r2, r6 │ │ movs r3, #1 │ │ - bl 77788 │ │ + bl 777f0 │ │ ldr.w fp, [sp, #1012] @ 0x3f4 │ │ ldr r4, [sp, #12] │ │ - b.n 7d63a │ │ + b.n 7d6a2 │ │ movs r0, #1 │ │ movs r1, #0 │ │ str r0, [sp, #0] │ │ add r0, sp, #1004 @ 0x3ec │ │ mov r2, r4 │ │ movs r3, #1 │ │ - bl 77788 │ │ + bl 777f0 │ │ ldrd r8, r5, [sp, #1008] @ 0x3f0 │ │ ldr r4, [sp, #40] @ 0x28 │ │ - b.n 7d6c8 │ │ + b.n 7d730 │ │ movs r0, #1 │ │ movs r2, #6 │ │ str r0, [sp, #0] │ │ add r0, sp, #1004 @ 0x3ec │ │ movs r3, #1 │ │ - bl 77788 │ │ + bl 777f0 │ │ ldrd r8, r1, [sp, #1008] @ 0x3f0 │ │ - b.n 7d706 │ │ + b.n 7d76e │ │ movs r0, #1 │ │ mov r1, fp │ │ str r0, [sp, #0] │ │ add r0, sp, #1004 @ 0x3ec │ │ mov r2, r6 │ │ movs r3, #1 │ │ - bl 77788 │ │ + bl 777f0 │ │ ldr.w fp, [sp, #1012] @ 0x3f4 │ │ - b.n 7d76c │ │ + b.n 7d7d4 │ │ movs r0, #1 │ │ mov r1, fp │ │ str r0, [sp, #0] │ │ add r0, sp, #1004 @ 0x3ec │ │ movs r2, #1 │ │ movs r3, #1 │ │ - bl 77788 │ │ + bl 777f0 │ │ ldr.w fp, [sp, #1012] @ 0x3f4 │ │ - b.n 7d61c │ │ + b.n 7d684 │ │ movs r0, #1 │ │ mov r1, fp │ │ str r0, [sp, #0] │ │ add r0, sp, #1004 @ 0x3ec │ │ movs r2, #1 │ │ movs r3, #1 │ │ - bl 77788 │ │ + bl 777f0 │ │ ldr.w fp, [sp, #1012] @ 0x3f4 │ │ - b.n 7d750 │ │ + b.n 7d7b8 │ │ movs r0, #1 │ │ movs r2, #1 │ │ str r0, [sp, #0] │ │ add r0, sp, #1004 @ 0x3ec │ │ movs r3, #1 │ │ - bl 77788 │ │ + bl 777f0 │ │ ldrd r0, r8, [sp, #1004] @ 0x3ec │ │ ldr r1, [sp, #1012] @ 0x3f4 │ │ - b.n 7d6ee │ │ + b.n 7d756 │ │ mov r8, r0 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r6 │ │ - blx d87c0 │ │ - b.n 7d900 │ │ + blx d87d0 │ │ + b.n 7d968 │ │ mov r8, r0 │ │ ldr r0, [sp, #1004] @ 0x3ec │ │ - cbz r0, 7d8f4 │ │ + cbz r0, 7d95c │ │ ldr r0, [sp, #1008] @ 0x3f0 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrd sl, r9, [sp, #20] │ │ ldr.w fp, [sp, #8] │ │ - b.n 7d90c │ │ + b.n 7d974 │ │ mov r8, r0 │ │ ldrd sl, r9, [sp, #20] │ │ - b.n 7d918 │ │ + b.n 7d980 │ │ mov r8, r0 │ │ - b.n 7d922 │ │ + b.n 7d98a │ │ mov r8, r0 │ │ cmp.w fp, #0 │ │ itt ne │ │ ldrne r0, [sp, #44] @ 0x2c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #808] @ 0x328 │ │ - cbz r0, 7d922 │ │ + cbz r0, 7d98a │ │ ldr r0, [sp, #812] @ 0x32c │ │ - blx d87c0 │ │ + blx d87d0 │ │ add r0, sp, #48 @ 0x30 │ │ - bl 7b660 │ │ + bl 7b6c8 │ │ mov r0, sl │ │ mov r1, r9 │ │ - blx d89d0 │ │ + blx d89e0 │ │ mov r0, r8 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ ldr.w r1, [r0, #312] @ 0x138 │ │ mov r4, r0 │ │ add.w r0, r0, #312 @ 0x138 │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r5, r3, [r1] │ │ cmp r5, #0 │ │ - bne.n 7d948 │ │ + bne.n 7d9b0 │ │ cmp r2, #1 │ │ - bne.n 7d962 │ │ + bne.n 7d9ca │ │ dmb ish │ │ - bl 7e154 │ │ + bl 7e1bc │ │ add.w r0, r4, #316 @ 0x13c │ │ - bl 8c558 │ │ + bl 8c5c4 │ │ ldrd r0, r1, [r4, #332] @ 0x14c │ │ - bl 8c5c0 │ │ + bl 8c62c │ │ ldr.w r0, [r4, #296] @ 0x128 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r4, #300] @ 0x12c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r0, r1, [r4, #8] │ │ - blx d89d0 │ │ + blx d89e0 │ │ add.w r0, r4, #16 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w 7b660 │ │ + b.w 7b6c8 │ │ mov r5, r0 │ │ add.w r0, r4, #316 @ 0x13c │ │ - bl 8c558 │ │ - b.n 7d9a8 │ │ + bl 8c5c4 │ │ + b.n 7da10 │ │ mov r5, r0 │ │ - b.n 7d9b0 │ │ + b.n 7da18 │ │ mov r5, r0 │ │ ldrd r0, r1, [r4, #332] @ 0x14c │ │ - bl 8c5c0 │ │ + bl 8c62c │ │ ldr.w r0, [r4, #296] @ 0x128 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r4, #300] @ 0x12c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r0, r1, [r4, #8] │ │ - blx d89d0 │ │ + blx d89e0 │ │ add.w r0, r4, #16 │ │ - bl 7b660 │ │ + bl 7b6c8 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ - bl 416fe │ │ - bmi.n 7d986 │ │ + blx d6de0 │ │ + bl 41a06 │ │ + bmi.n 7d9ee │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #148 @ 0x94 │ │ mov r9, r2 │ │ mov sl, r0 │ │ ldrb.w r0, [r1, #328] @ 0x148 │ │ mov fp, r3 │ │ ldr r2, [r7, #8] │ │ mov r8, r1 │ │ cmp r0, #83 @ 0x53 │ │ - bne.n 7da10 │ │ + bne.n 7da78 │ │ ldr.w r0, [r8] │ │ lsls r0, r0, #31 │ │ - beq.w 7dce0 │ │ + beq.w 7dd48 │ │ ldr.w r6, [r8, #240] @ 0xf0 │ │ - cbz r6, 7da2a │ │ + cbz r6, 7da92 │ │ ldr.w r0, [r8, #244] @ 0xf4 │ │ str r0, [sp, #24] │ │ - b.n 7da2a │ │ + b.n 7da92 │ │ cmp r0, #82 @ 0x52 │ │ - bne.w 7dd00 │ │ + bne.w 7dd68 │ │ ldr.w r1, [r8, #332] @ 0x14c │ │ cmp r1, #0 │ │ - beq.n 7daa0 │ │ + beq.n 7db08 │ │ ldr.w r2, [r1, #280] @ 0x118 │ │ movs r3, #2 │ │ add.w ip, r2, #8 │ │ - b.n 7dd28 │ │ + b.n 7dd90 │ │ ldrd r1, r0, [r8, #8] │ │ movs r3, #0 │ │ strd r1, r0, [sp, #28] │ │ add.w ip, sp, #40 @ 0x28 │ │ ldrd r0, r1, [r8, #208] @ 0xd0 │ │ add r5, sp, #112 @ 0x70 │ │ ldr.w r2, [r8, #256] @ 0x100 │ │ @@ -129238,115 +129151,115 @@ │ │ str r3, [sp, #56] @ 0x38 │ │ add.w r3, r8, #184 @ 0xb8 │ │ stmia.w ip, {r0, r1, r3} │ │ add.w r0, r2, #8 │ │ mov r1, r4 │ │ str r0, [sp, #52] @ 0x34 │ │ mov r0, r5 │ │ - bl 8b0ec │ │ + bl 8b158 │ │ ldrb.w r0, [sp, #112] @ 0x70 │ │ cmp r0, #82 @ 0x52 │ │ - bne.n 7da8e │ │ + bne.n 7daf6 │ │ ldr r0, [sp, #56] @ 0x38 │ │ - cbz r0, 7daac │ │ + cbz r0, 7db14 │ │ ldrh.w r1, [r8, #218] @ 0xda │ │ ldrd r2, r3, [sp, #60] @ 0x3c │ │ strd r6, r9, [sp, #16] │ │ mov.w r9, #118 @ 0x76 │ │ ldr r6, [r3, #0] │ │ cmp r1, #5 │ │ it cc │ │ movwcc r9, #8496 @ 0x2130 │ │ cmp r6, #1 │ │ - bne.n 7dab2 │ │ + bne.n 7db1a │ │ ldrd r6, r1, [r3, #8] │ │ - b.n 7dabe │ │ + b.n 7db26 │ │ ldrd r2, r1, [sp, #120] @ 0x78 │ │ ldrh.w r6, [sp, #118] @ 0x76 │ │ ldr.w r3, [sp, #114] @ 0x72 │ │ ldrb.w r4, [sp, #113] @ 0x71 │ │ - b.n 7dc94 │ │ + b.n 7dcfc │ │ ldr r1, [r2, #0] │ │ add.w ip, r1, #8 │ │ movs r3, #0 │ │ mov r1, r8 │ │ - b.n 7dd28 │ │ + b.n 7dd90 │ │ movs r1, #0 │ │ movs r0, #69 @ 0x45 │ │ - b.n 7dc94 │ │ + b.n 7dcfc │ │ ldr r1, [r3, #4] │ │ cmp r1, #6 │ │ - bcs.w 7ddfe │ │ + bcs.w 7de66 │ │ add.w r6, r3, #8 │ │ add.w r3, r4, #16 │ │ str r3, [sp, #12] │ │ cmp r1, #0 │ │ strd r1, r3, [sp, #100] @ 0x64 │ │ add r3, sp, #88 @ 0x58 │ │ stmia r3!, {r0, r2, r6} │ │ - beq.n 7db5e │ │ + beq.n 7dbc6 │ │ strd fp, sl, [sp, #4] │ │ add.w sl, r5, #18 │ │ sub.w fp, r1, #1 │ │ adds.w r0, fp, #1 │ │ - beq.n 7db70 │ │ + beq.n 7dbd8 │ │ ldr r0, [sp, #104] @ 0x68 │ │ add r1, sp, #88 @ 0x58 │ │ mov r3, r6 │ │ ldr r0, [r0, #12] │ │ ldr r2, [r0, #32] │ │ add r0, sp, #112 @ 0x70 │ │ - bl 84988 │ │ + bl 849f0 │ │ ldrd r0, r1, [sp, #112] @ 0x70 │ │ eor.w r2, r0, #46 @ 0x2e │ │ orrs r2, r1 │ │ - beq.w 7dc62 │ │ + beq.w 7dcca │ │ ldrd r2, r3, [sp, #120] @ 0x78 │ │ adds r6, #16 │ │ ldrh.w r4, [sl, #4] │ │ ldr.w r5, [sl] │ │ ldrh.w ip, [sp, #128] @ 0x80 │ │ str.w fp, [sp, #100] @ 0x64 │ │ sub.w fp, fp, #1 │ │ cmp ip, r9 │ │ str r6, [sp, #96] @ 0x60 │ │ - bne.n 7dadc │ │ + bne.n 7db44 │ │ add.w ip, sp, #112 @ 0x70 │ │ strh.w r4, [sp, #134] @ 0x86 │ │ stmia.w ip, {r0, r1, r2, r3} │ │ add r0, sp, #88 @ 0x58 │ │ add r1, sp, #112 @ 0x70 │ │ str.w r5, [sp, #130] @ 0x82 │ │ strh.w r9, [sp, #128] @ 0x80 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldrd r0, r5, [sp, #88] @ 0x58 │ │ ldrd r2, r6, [sp, #96] @ 0x60 │ │ lsrs r4, r5, #16 │ │ ldrd fp, sl, [sp, #4] │ │ lsrs r1, r0, #16 │ │ orr.w r3, r1, r5, lsl #16 │ │ lsrs r1, r0, #8 │ │ ldr.w r9, [sp, #20] │ │ orr.w r1, r1, r5, lsl #24 │ │ ldr r5, [r7, #8] │ │ - b.n 7db94 │ │ + b.n 7dbfc │ │ ldr r0, [sp, #76] @ 0x4c │ │ ldr r5, [r7, #8] │ │ lsls r0, r0, #31 │ │ itttt eq │ │ moveq r0, #0 │ │ streq r0, [sp, #80] @ 0x50 │ │ moveq r0, #1 │ │ streq r0, [sp, #76] @ 0x4c │ │ - b.n 7db88 │ │ + b.n 7dbf0 │ │ ldr r0, [sp, #104] @ 0x68 │ │ ldrd fp, sl, [sp, #4] │ │ ldr r5, [r7, #8] │ │ ldr r1, [r0, #20] │ │ - cbnz r1, 7db88 │ │ + cbnz r1, 7dbf0 │ │ ldr r1, [sp, #88] @ 0x58 │ │ movs r3, #1 │ │ ldr r2, [r0, #0] │ │ subs r1, r1, r2 │ │ strd r3, r1, [r0, #20] │ │ movs r1, #0 │ │ movs r0, #46 @ 0x2e │ │ @@ -129362,35 +129275,35 @@ │ │ uxtb r0, r0 │ │ ldr r4, [r5, #0] │ │ add r0, r1 │ │ str r2, [sp, #116] @ 0x74 │ │ eor.w r1, r0, #46 @ 0x2e │ │ str r0, [sp, #112] @ 0x70 │ │ orrs r1, r2 │ │ - bne.n 7dbbc │ │ + bne.n 7dc24 │ │ movs r0, #0 │ │ - b.n 7dbe0 │ │ + b.n 7dc48 │ │ ldr.w r3, [r8, #260] @ 0x104 │ │ add r0, sp, #112 @ 0x70 │ │ ldrb.w r2, [r8, #217] @ 0xd9 │ │ add.w r1, r4, #8 │ │ str r0, [sp, #0] │ │ add r0, sp, #40 @ 0x28 │ │ - bl 82b38 │ │ + bl 82ba0 │ │ ldrb.w r0, [sp, #40] @ 0x28 │ │ cmp r0, #82 @ 0x52 │ │ - bne.w 7dd54 │ │ + bne.w 7ddbc │ │ ldrd r0, r1, [sp, #44] @ 0x2c │ │ ldrex r2, [r4] │ │ adds r3, r2, #1 │ │ strex r6, r3, [r4] │ │ cmp r6, #0 │ │ - bne.n 7dbe0 │ │ + bne.n 7dc48 │ │ cmp.w r2, #4294967295 @ 0xffffffff │ │ - ble.w 7de0a │ │ + ble.w 7de72 │ │ ldr r2, [sp, #28] │ │ str r2, [sp, #56] @ 0x38 │ │ add r2, sp, #72 @ 0x48 │ │ stmia r2!, {r0, r1, r4} │ │ ldr r0, [sp, #24] │ │ str r0, [sp, #68] @ 0x44 │ │ ldr r0, [sp, #16] │ │ @@ -129446,40 +129359,40 @@ │ │ ldrb.w r1, [r8, #328] @ 0x148 │ │ strb.w r0, [sp, #112] @ 0x70 │ │ lsrs r0, r4, #16 │ │ cmp r1, #83 @ 0x53 │ │ strh.w r4, [sp, #113] @ 0x71 │ │ strd r3, r2, [sp, #116] @ 0x74 │ │ strb.w r0, [sp, #115] @ 0x73 │ │ - beq.n 7dd68 │ │ + beq.n 7ddd0 │ │ cmp r1, #82 @ 0x52 │ │ - bne.n 7dd7a │ │ + bne.n 7dde2 │ │ ldr.w r2, [r8, #332] @ 0x14c │ │ - cbz r2, 7dcd2 │ │ + cbz r2, 7dd3a │ │ ldr.w r0, [r2, #280] @ 0x118 │ │ movs r3, #2 │ │ add.w ip, r0, #8 │ │ - b.n 7dda2 │ │ + b.n 7de0a │ │ ldr r0, [r7, #8] │ │ movs r3, #0 │ │ mov r2, r8 │ │ ldr r0, [r0, #0] │ │ add.w ip, r0, #8 │ │ - b.n 7dda2 │ │ + b.n 7de0a │ │ add.w r0, r8, #328 @ 0x148 │ │ - bl 8c4c8 │ │ + bl 8c534 │ │ ldrb.w r0, [r8, #328] @ 0x148 │ │ cmp r0, #82 @ 0x52 │ │ - bne.n 7dd00 │ │ + bne.n 7dd68 │ │ ldr.w r1, [r8, #332] @ 0x14c │ │ cmp r1, #0 │ │ - bne.w 7da1e │ │ + bne.w 7da86 │ │ ldr r1, [r7, #8] │ │ ldr r1, [r1, #0] │ │ - b.n 7daa2 │ │ + b.n 7db0a │ │ ldrb.w r6, [r8, #331] @ 0x14b │ │ ldrb.w r5, [r8, #335] @ 0x14f │ │ ldrh.w r4, [r8, #329] @ 0x149 │ │ ldrh.w r2, [r8, #333] @ 0x14d │ │ ldrb.w r3, [r8, #332] @ 0x14c │ │ ldrd ip, r1, [r8, #336] @ 0x150 │ │ strb.w r6, [sp, #114] @ 0x72 │ │ @@ -129493,27 +129406,27 @@ │ │ strh.w r4, [sp, #49] @ 0x31 │ │ strh.w r6, [sp, #53] @ 0x35 │ │ strb.w r0, [sp, #48] @ 0x30 │ │ strb.w r2, [sp, #51] @ 0x33 │ │ strb.w r3, [sp, #52] @ 0x34 │ │ strb.w r5, [sp, #55] @ 0x37 │ │ str r1, [sp, #60] @ 0x3c │ │ - b.n 7ddcc │ │ + b.n 7de34 │ │ ldrb.w r6, [sp, #43] @ 0x2b │ │ ldrh.w r5, [sp, #41] @ 0x29 │ │ ldr r1, [sp, #52] @ 0x34 │ │ ldrd r3, r2, [sp, #44] @ 0x2c │ │ orr.w r4, r5, r6, lsl #16 │ │ - b.n 7dca0 │ │ + b.n 7dd08 │ │ add.w r0, r8, #328 @ 0x148 │ │ add r1, sp, #112 @ 0x70 │ │ - bl 8c4fc │ │ + bl 8c568 │ │ ldrb.w r1, [r8, #328] @ 0x148 │ │ cmp r1, #82 @ 0x52 │ │ - beq.n 7dcc0 │ │ + beq.n 7dd28 │ │ ldrb.w r6, [r8, #331] @ 0x14b │ │ ldrb.w r5, [r8, #335] @ 0x14f │ │ ldrh.w r4, [r8, #329] @ 0x149 │ │ ldrh.w r0, [r8, #333] @ 0x14d │ │ ldrb.w r3, [r8, #332] @ 0x14c │ │ ldrd ip, r2, [r8, #336] @ 0x150 │ │ strb.w r6, [sp, #90] @ 0x5a │ │ @@ -129538,36 +129451,36 @@ │ │ ldr r0, [r7, #8] │ │ add r1, sp, #88 @ 0x58 │ │ str r0, [sp, #100] @ 0x64 │ │ add.w r0, sl, #8 │ │ str.w ip, [sp, #56] @ 0x38 │ │ str.w r9, [sp, #88] @ 0x58 │ │ strd fp, r8, [sp, #92] @ 0x5c │ │ - bl 80338 │ │ + bl 803a0 │ │ movs r0, #0 │ │ str.w r0, [sl] │ │ add sp, #148 @ 0x94 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r3, [pc, #12] @ (7de0c ) │ │ + ldr r3, [pc, #12] @ (7de74 ) │ │ movs r0, #0 │ │ movs r2, #5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ udf #254 @ 0xfe │ │ - ldmia r1!, {r4} │ │ + ldmia r0!, {r3, r4, r5, r7} │ │ movs r5, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #188 @ 0xbc │ │ mov r3, r0 │ │ ldr r0, [r1, #0] │ │ mov r6, r1 │ │ - cbz r0, 7de66 │ │ + cbz r0, 7dece │ │ add.w r0, r6, #32 │ │ mov r4, r3 │ │ mov ip, r6 │ │ mov r1, r2 │ │ mov r8, r3 │ │ ldmia r0!, {r2, r3, r5, r6} │ │ stmia r4!, {r2, r3, r5, r6} │ │ @@ -129577,19 +129490,19 @@ │ │ ldmia.w ip!, {r2, r3, r4, r6} │ │ mov r0, r5 │ │ stmia r0!, {r2, r3, r4, r6} │ │ ldmia.w ip, {r2, r3, r4, r6} │ │ stmia r0!, {r2, r3, r4, r6} │ │ add.w r0, r5, #32 │ │ movs r2, #72 @ 0x48 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add.w r0, r8, #32 │ │ mov r1, r5 │ │ movs r2, #104 @ 0x68 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add sp, #188 @ 0xbc │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r0, [r2, #0] │ │ str r0, [sp, #28] │ │ ldr r0, [r2, #4] │ │ str r0, [sp, #24] │ │ @@ -129613,94 +129526,94 @@ │ │ str r1, [sp, #20] │ │ str r2, [sp, #48] @ 0x30 │ │ strd r4, r3, [sp, #36] @ 0x24 │ │ ldr r0, [r6, #8] │ │ ldrd ip, r2, [r6, #16] │ │ ldrd r3, r1, [r6, #24] │ │ lsls r0, r0, #31 │ │ - bne.w 7dfce │ │ + bne.w 7e036 │ │ ldr r0, [r6, #12] │ │ ldrd lr, r4, [r6, #32] │ │ cmp r0, #0 │ │ - bne.w 7dfd6 │ │ + bne.w 7e03e │ │ cmp.w ip, #2 │ │ - bne.w 7e0dc │ │ + bne.w 7e144 │ │ movs.w r0, r8, lsl #31 │ │ - bne.n 7df88 │ │ + bne.n 7dff0 │ │ cmp r9, fp │ │ - beq.n 7df88 │ │ + beq.n 7dff0 │ │ ldrd r4, r3, [sp, #32] │ │ mov r2, r9 │ │ - b.n 7dede │ │ + b.n 7df46 │ │ mov r2, r9 │ │ cmp r9, fp │ │ - beq.n 7df88 │ │ + beq.n 7dff0 │ │ ldrd r0, r1, [r2, #16] │ │ add.w r9, r2, #32 │ │ mov.w r8, #0 │ │ subs.w r0, r0, sl │ │ ldr r0, [sp, #60] @ 0x3c │ │ sbcs.w r0, r1, r0 │ │ it cs │ │ movcs.w r8, #1 │ │ - bcs.n 7df3a │ │ + bcs.n 7dfa2 │ │ ldrd r0, r1, [r2, #8] │ │ subs r0, r3, r0 │ │ sbcs.w r0, r4, r1 │ │ - bcs.n 7ded8 │ │ + bcs.n 7df40 │ │ ldrd r0, r1, [r2] │ │ ldr r5, [sp, #56] @ 0x38 │ │ subs r0, r0, r5 │ │ ldr r0, [sp, #52] @ 0x34 │ │ sbcs.w r0, r1, r0 │ │ - bcs.n 7ded8 │ │ + bcs.n 7df40 │ │ ldr r5, [sp, #16] │ │ ldr r0, [r2, #24] │ │ ldr r3, [sp, #48] @ 0x30 │ │ ldr r1, [r5, #12] │ │ cmp r0, r1 │ │ str.w r9, [r3, #32] │ │ - bcs.w 7e0f6 │ │ + bcs.w 7e15e │ │ mov.w r3, #352 @ 0x160 │ │ ldr r1, [r5, #8] │ │ mla r0, r0, r3, r1 │ │ str r0, [sp, #172] @ 0xac │ │ add r0, sp, #184 @ 0xb8 │ │ - b.n 7df4a │ │ + b.n 7dfb2 │ │ ldr r0, [sp, #48] @ 0x30 │ │ movs r1, #1 │ │ movs r2, #0 │ │ strb.w r1, [r0, #56] @ 0x38 │ │ str.w r9, [r0, #32] │ │ add r0, sp, #172 @ 0xac │ │ str r2, [r0, #0] │ │ ldr r1, [sp, #172] @ 0xac │ │ ldr r4, [sp, #44] @ 0x2c │ │ - cbz r1, 7df88 │ │ + cbz r1, 7dff0 │ │ ldrd r3, r2, [sp, #24] │ │ ldr r0, [sp, #20] │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ - bl 7d9dc │ │ + bl 7da44 │ │ mov ip, r4 │ │ mov r1, r6 │ │ mov lr, r6 │ │ ldmia.w ip!, {r0, r2, r3, r5, r6} │ │ stmia r1!, {r0, r2, r3, r5, r6} │ │ ldmia.w ip!, {r0, r2, r3, r5, r6} │ │ stmia r1!, {r0, r2, r3, r5, r6} │ │ ldmia.w ip, {r0, r2, r3, r4, r5, r6} │ │ stmia r1!, {r0, r2, r3, r4, r5, r6} │ │ mov r6, lr │ │ ldr r3, [sp, #40] @ 0x28 │ │ ldr r2, [sp, #48] @ 0x30 │ │ ldr.w r0, [lr] │ │ cmp r0, #0 │ │ - beq.n 7dea2 │ │ - b.n 7de22 │ │ + beq.n 7df0a │ │ + b.n 7de8a │ │ movs r0, #0 │ │ movs r3, #3 │ │ strd r8, r6, [sp, #108] @ 0x6c │ │ strd r1, r9, [sp, #100] @ 0x64 │ │ add r1, sp, #84 @ 0x54 │ │ ldr.w r8, [sp, #44] @ 0x2c │ │ stmia.w r1, {r2, sl, fp, lr} │ │ @@ -129720,15 +129633,15 @@ │ │ strb.w r0, [r4, #120] @ 0x78 │ │ add sp, #188 @ 0xbc │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov fp, r1 │ │ mov sl, r3 │ │ movs r0, #1 │ │ - b.n 7df8c │ │ + b.n 7dff4 │ │ str r1, [sp, #16] │ │ mov sl, r2 │ │ ldr r1, [r0, #0] │ │ str r1, [sp, #56] @ 0x38 │ │ ldr r1, [r0, #4] │ │ str r1, [sp, #60] @ 0x3c │ │ ldr r5, [r0, #8] │ │ @@ -129737,224 +129650,224 @@ │ │ movs r4, #0 │ │ strd r3, ip, [sp, #48] @ 0x30 │ │ mov.w ip, #4 │ │ str.w lr, [sp, #36] @ 0x24 │ │ str r0, [sp, #32] │ │ str r4, [sp, #180] @ 0xb4 │ │ strd r4, ip, [sp, #172] @ 0xac │ │ - b.n 7e022 │ │ + b.n 7e08a │ │ add.w r0, fp, fp, lsl #2 │ │ ldr r1, [sp, #56] @ 0x38 │ │ add.w r0, r1, r0, lsl #3 │ │ str.w r0, [ip, r4, lsl #2] │ │ adds r0, r6, #1 │ │ sub.w r1, r8, r0 │ │ adds r4, #1 │ │ add.w r0, r0, r0, lsl #1 │ │ str r4, [sp, #180] @ 0xb4 │ │ mov r6, r9 │ │ add.w r5, r5, r0, lsl #3 │ │ ldrd fp, lr, [sp, #24] │ │ cmp r1, #1 │ │ - beq.n 7e068 │ │ + beq.n 7e0d0 │ │ cmp r1, #0 │ │ - beq.n 7e0b6 │ │ + beq.n 7e11e │ │ mov r9, r6 │ │ movs r6, #0 │ │ mov r8, r1 │ │ - b.n 7e040 │ │ + b.n 7e0a8 │ │ mov r6, r2 │ │ lsrs r0, r1, #1 │ │ subs r1, r1, r0 │ │ cmp r1, #1 │ │ - bls.n 7e06e │ │ + bls.n 7e0d6 │ │ mov r2, r6 │ │ add.w r6, r6, r1, lsr #1 │ │ add.w r3, r6, r6, lsl #1 │ │ add.w r3, r5, r3, lsl #3 │ │ ldr r0, [r3, #16] │ │ cmp r0, r4 │ │ - bhi.n 7e036 │ │ - bcc.n 7e038 │ │ + bhi.n 7e09e │ │ + bcc.n 7e0a0 │ │ ldrd r0, r3, [r3] │ │ subs.w r0, lr, r0 │ │ sbcs.w r0, fp, r3 │ │ it cc │ │ movcc r6, r2 │ │ - b.n 7e038 │ │ + b.n 7e0a0 │ │ mov r9, r6 │ │ mov r8, r1 │ │ movs r6, #0 │ │ add.w r1, r6, r6, lsl #1 │ │ add.w r1, r5, r1, lsl #3 │ │ ldr r2, [r1, #16] │ │ cmp r2, r4 │ │ - bhi.n 7e0b6 │ │ - bcc.n 7e0b6 │ │ + bhi.n 7e11e │ │ + bcc.n 7e11e │ │ ldrd r2, r3, [r1] │ │ subs.w r2, lr, r2 │ │ sbcs.w r2, fp, r3 │ │ - bcc.n 7e0b6 │ │ + bcc.n 7e11e │ │ ldrd r2, r3, [r1, #8] │ │ subs.w r2, lr, r2 │ │ sbcs.w r2, fp, r3 │ │ - bcs.n 7e0b6 │ │ + bcs.n 7e11e │ │ ldr.w fp, [r1, #20] │ │ ldr r0, [sp, #60] @ 0x3c │ │ cmp fp, r0 │ │ - bcs.n 7e0e8 │ │ + bcs.n 7e150 │ │ ldr r0, [sp, #172] @ 0xac │ │ cmp r4, r0 │ │ - bne.n 7e000 │ │ + bne.n 7e068 │ │ add r0, sp, #172 @ 0xac │ │ - bl 8c48c │ │ + bl 8c4f8 │ │ ldr.w ip, [sp, #176] @ 0xb0 │ │ - b.n 7e000 │ │ + b.n 7e068 │ │ ldr r0, [sp, #20] │ │ mov ip, sl │ │ ldrd r5, r6, [sp, #172] @ 0xac │ │ add.w r4, r6, r4, lsl #2 │ │ ldr.w sl, [sp, #16] │ │ ldr r0, [r0, #0] │ │ ldrd lr, r1, [sp, #8] │ │ ldrd r2, r3, [sp, #48] @ 0x30 │ │ add.w r9, r0, #8 │ │ ldrd r8, fp, [sp, #32] │ │ movs r0, #0 │ │ - b.n 7df8c │ │ + b.n 7dff4 │ │ mov fp, r1 │ │ mov r1, r4 │ │ mov sl, r3 │ │ movs r0, #0 │ │ movs r3, #4 │ │ - b.n 7df8c │ │ - ldr r2, [pc, #96] @ (7e14c ) │ │ + b.n 7dff4 │ │ + ldr r2, [pc, #96] @ (7e1b4 ) │ │ add r2, pc │ │ ldr r1, [sp, #60] @ 0x3c │ │ mov r0, fp │ │ - bl 3fa74 │ │ - b.n 7e100 │ │ - ldr r2, [pc, #88] @ (7e150 ) │ │ + bl 3fd7c │ │ + b.n 7e168 │ │ + ldr r2, [pc, #88] @ (7e1b8 ) │ │ mov r9, r6 │ │ add r2, pc │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ udf #254 @ 0xfe │ │ - b.n 7e106 │ │ - b.n 7e116 │ │ + b.n 7e16e │ │ + b.n 7e17e │ │ mov r4, r0 │ │ ldr r0, [sp, #172] @ 0xac │ │ - cbz r0, 7e118 │ │ + cbz r0, 7e180 │ │ ldr r0, [sp, #176] @ 0xb0 │ │ - blx d87c0 │ │ - b.n 7e118 │ │ + blx d87d0 │ │ + b.n 7e180 │ │ mov r9, r6 │ │ mov r4, r0 │ │ ldr.w r0, [r9] │ │ - cbz r0, 7e142 │ │ + cbz r0, 7e1aa │ │ ldr.w r0, [r9, #56]! │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 7e126 │ │ + bne.n 7e18e │ │ cmp r1, #1 │ │ - bne.n 7e142 │ │ + bne.n 7e1aa │ │ dmb ish │ │ mov r0, r9 │ │ - bl 7e154 │ │ + bl 7e1bc │ │ mov r0, r4 │ │ - blx d6dd0 │ │ - bl 416fe │ │ - udf #126 @ 0x7e │ │ + blx d6de0 │ │ + bl 41a06 │ │ + udf #38 @ 0x26 │ │ movs r5, r0 │ │ - udf #94 @ 0x5e │ │ + udf #6 │ │ movs r5, r0 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ ldr r4, [r0, #0] │ │ mov r0, r4 │ │ ldr.w r1, [r0, #128]! │ │ - cbz r1, 7e180 │ │ + cbz r1, 7e1e8 │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r5, r3, [r1] │ │ cmp r5, #0 │ │ - bne.n 7e166 │ │ + bne.n 7e1ce │ │ cmp r2, #1 │ │ - bne.n 7e180 │ │ + bne.n 7e1e8 │ │ dmb ish │ │ - bl 7e154 │ │ + bl 7e1bc │ │ add.w r0, r4, #132 @ 0x84 │ │ - bl 8c2a8 │ │ + bl 8c314 │ │ adds r0, r4, #1 │ │ - beq.n 7e1b4 │ │ + beq.n 7e21c │ │ adds r0, r4, #4 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 7e192 │ │ + bne.n 7e1fa │ │ cmp r1, #1 │ │ it ne │ │ popne {r4, r5, r7, pc} │ │ dmb ish │ │ mov r0, r4 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ pop {r4, r5, r7, pc} │ │ mov r5, r0 │ │ add.w r0, r4, #132 @ 0x84 │ │ - bl 8c2a8 │ │ - b.n 7e1c8 │ │ - bl 416fe │ │ + bl 8c314 │ │ + b.n 7e230 │ │ + bl 41a06 │ │ mov r5, r0 │ │ adds r0, r4, #1 │ │ - beq.n 7e1ee │ │ + beq.n 7e256 │ │ adds r0, r4, #4 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 7e1d2 │ │ + bne.n 7e23a │ │ cmp r1, #1 │ │ - bne.n 7e1ee │ │ + bne.n 7e256 │ │ mov r0, r4 │ │ dmb ish │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ ldr.w r1, [r0, #128]! │ │ - cbz r1, 7e21e │ │ + cbz r1, 7e286 │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r5, r3, [r1] │ │ cmp r5, #0 │ │ - bne.n 7e204 │ │ + bne.n 7e26c │ │ cmp r2, #1 │ │ - bne.n 7e21e │ │ + bne.n 7e286 │ │ dmb ish │ │ - bl 7e154 │ │ + bl 7e1bc │ │ add.w r0, r4, #132 @ 0x84 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w 8c2a8 │ │ + b.w 8c314 │ │ mov r5, r0 │ │ add.w r0, r4, #132 @ 0x84 │ │ - bl 8c2a8 │ │ + bl 8c314 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ - bl 416fe │ │ - bmi.n 7e1ea │ │ + blx d6de0 │ │ + bl 41a06 │ │ + bmi.n 7e252 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #424 @ 0x1a8 │ │ mov r8, r0 │ │ mov.w r0, #438 @ 0x1b6 │ │ movs r4, #0 │ │ @@ -129965,206 +129878,206 @@ │ │ add r0, sp, #12 │ │ mov r9, r2 │ │ str r0, [sp, #36] @ 0x24 │ │ lsrs r0, r2, #7 │ │ cmp r0, #2 │ │ str r4, [sp, #12] │ │ strh.w r4, [sp, #22] │ │ - bhi.w 7e390 │ │ + bhi.w 7e3f8 │ │ add r6, sp, #40 @ 0x28 │ │ mov r2, r9 │ │ mov r0, r6 │ │ - bl d53c6 │ │ + bl d52ea │ │ cmp.w r9, #7 │ │ strb.w r4, [r6, r9] │ │ - bcs.n 7e2e8 │ │ + bcs.n 7e350 │ │ ldrb.w r0, [sp, #40] @ 0x28 │ │ cmp r0, #0 │ │ - beq.n 7e346 │ │ + beq.n 7e3ae │ │ cmp.w r9, #0 │ │ - beq.n 7e378 │ │ + beq.n 7e3e0 │ │ ldrb.w r0, [sp, #41] @ 0x29 │ │ cmp r0, #0 │ │ - beq.n 7e34e │ │ + beq.n 7e3b6 │ │ cmp.w r9, #1 │ │ - beq.n 7e378 │ │ + beq.n 7e3e0 │ │ ldrb.w r0, [sp, #42] @ 0x2a │ │ cmp r0, #0 │ │ - beq.n 7e352 │ │ + beq.n 7e3ba │ │ cmp.w r9, #2 │ │ - beq.n 7e378 │ │ + beq.n 7e3e0 │ │ ldrb.w r0, [sp, #43] @ 0x2b │ │ cmp r0, #0 │ │ - beq.n 7e356 │ │ + beq.n 7e3be │ │ cmp.w r9, #3 │ │ - beq.n 7e378 │ │ + beq.n 7e3e0 │ │ ldrb.w r0, [sp, #44] @ 0x2c │ │ cmp r0, #0 │ │ - beq.n 7e35a │ │ + beq.n 7e3c2 │ │ cmp.w r9, #4 │ │ - beq.n 7e378 │ │ + beq.n 7e3e0 │ │ ldrb.w r0, [sp, #45] @ 0x2d │ │ cmp r0, #0 │ │ - beq.n 7e35e │ │ + beq.n 7e3c6 │ │ cmp.w r9, #5 │ │ - beq.n 7e378 │ │ + beq.n 7e3e0 │ │ ldrb.w r0, [sp, #46] @ 0x2e │ │ cmp r0, #0 │ │ - bne.n 7e378 │ │ + bne.n 7e3e0 │ │ movs r1, #6 │ │ - b.n 7e360 │ │ + b.n 7e3c8 │ │ cmp r6, r6 │ │ - bne.n 7e31a │ │ + bne.n 7e382 │ │ sub.w r1, r9, #7 │ │ movs r0, #0 │ │ movw r2, #256 @ 0x100 │ │ movt r2, #257 @ 0x101 │ │ adds r4, r6, r0 │ │ ldr r3, [r6, r0] │ │ ldr r4, [r4, #4] │ │ subs r5, r2, r4 │ │ orrs r5, r4 │ │ subs r4, r2, r3 │ │ orrs r3, r4 │ │ ands r3, r5 │ │ mvns r3, r3 │ │ tst.w r3, #2155905152 @ 0x80808080 │ │ - bne.n 7e32e │ │ + bne.n 7e396 │ │ adds r0, #8 │ │ cmp r0, r1 │ │ - bls.n 7e2fa │ │ - b.n 7e32e │ │ + bls.n 7e362 │ │ + b.n 7e396 │ │ movs r0, #0 │ │ movs r1, #0 │ │ ldrb r2, [r6, r1] │ │ - cbz r2, 7e360 │ │ + cbz r2, 7e3c8 │ │ adds r1, #1 │ │ - bne.n 7e31e │ │ + bne.n 7e386 │ │ sub.w r1, r9, #7 │ │ cmp r1, #0 │ │ - bcs.n 7e2f2 │ │ + bcs.n 7e35a │ │ add.w r1, r9, #1 │ │ subs r1, r1, r0 │ │ - beq.n 7e378 │ │ + beq.n 7e3e0 │ │ adds r3, r6, r0 │ │ movs r2, #0 │ │ ldrb r6, [r3, r2] │ │ - cbz r6, 7e34a │ │ + cbz r6, 7e3b2 │ │ adds r2, #1 │ │ cmp r1, r2 │ │ - bne.n 7e33a │ │ - b.n 7e378 │ │ + bne.n 7e3a2 │ │ + b.n 7e3e0 │ │ movs r1, #0 │ │ - b.n 7e360 │ │ + b.n 7e3c8 │ │ adds r1, r2, r0 │ │ - b.n 7e360 │ │ + b.n 7e3c8 │ │ movs r1, #1 │ │ - b.n 7e360 │ │ + b.n 7e3c8 │ │ movs r1, #2 │ │ - b.n 7e360 │ │ + b.n 7e3c8 │ │ movs r1, #3 │ │ - b.n 7e360 │ │ + b.n 7e3c8 │ │ movs r1, #4 │ │ - b.n 7e360 │ │ + b.n 7e3c8 │ │ movs r1, #5 │ │ cmp r1, r9 │ │ - bne.n 7e378 │ │ + bne.n 7e3e0 │ │ add r0, sp, #24 │ │ add r1, sp, #40 @ 0x28 │ │ add r2, sp, #12 │ │ - bl 7a9d4 │ │ + bl 7aa3c │ │ ldrb.w r0, [sp, #24] │ │ cmp r0, #4 │ │ - beq.n 7e38c │ │ - b.n 7e3a2 │ │ - ldr r0, [pc, #212] @ (7e450 ) │ │ + beq.n 7e3f4 │ │ + b.n 7e40a │ │ + ldr r0, [pc, #212] @ (7e4b8 ) │ │ add r0, pc │ │ ldrd r0, r1, [r0] │ │ strd r0, r1, [sp, #24] │ │ ldrb.w r0, [sp, #24] │ │ cmp r0, #4 │ │ - bne.n 7e3a2 │ │ + bne.n 7e40a │ │ ldr r5, [sp, #28] │ │ - b.n 7e3b0 │ │ + b.n 7e418 │ │ add r0, sp, #24 │ │ add r3, sp, #36 @ 0x24 │ │ mov r2, r9 │ │ - bl 7b090 │ │ + bl 7b0f8 │ │ ldrb.w r0, [sp, #24] │ │ cmp r0, #4 │ │ - beq.n 7e38c │ │ + beq.n 7e3f4 │ │ ldrb.w r0, [sp, #24] │ │ ldr r5, [sp, #28] │ │ cmp r0, #4 │ │ - bne.n 7e3ee │ │ + bne.n 7e456 │ │ adds r0, r5, #1 │ │ - beq.n 7e410 │ │ + beq.n 7e478 │ │ add r6, sp, #40 @ 0x28 │ │ movs r1, #104 @ 0x68 │ │ mov r0, r6 │ │ - bl d518e │ │ + bl d521e │ │ mov r0, r5 │ │ mov r1, r6 │ │ - blx d8980 │ │ + blx d8990 │ │ adds r0, #1 │ │ - beq.n 7e41e │ │ + beq.n 7e486 │ │ ldr r0, [sp, #92] @ 0x5c │ │ - cbnz r0, 7e422 │ │ + cbnz r0, 7e48a │ │ ldr r6, [sp, #88] @ 0x58 │ │ movs r4, #0 │ │ movs r0, #0 │ │ movs r2, #1 │ │ movs r3, #2 │ │ strd r5, r4, [sp] │ │ mov r1, r6 │ │ - blx d89c0 │ │ + blx d89d0 │ │ adds r1, r0, #1 │ │ itt ne │ │ strdne r0, r6, [r8, #4] │ │ movne r4, #1 │ │ str.w r4, [r8] │ │ - b.n 7e428 │ │ + b.n 7e490 │ │ cmp r0, #3 │ │ - bne.n 7e410 │ │ + bne.n 7e478 │ │ ldrd r6, r4, [r5] │ │ ldr r1, [r4, #0] │ │ - cbz r1, 7e3fe │ │ + cbz r1, 7e466 │ │ mov r0, r6 │ │ blx r1 │ │ ldr r0, [r4, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r0, #0 │ │ str.w r0, [r8] │ │ add sp, #424 @ 0x1a8 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - blx d8850 │ │ + blx d8860 │ │ movs r0, #0 │ │ str.w r0, [r8] │ │ mov r0, r5 │ │ - blx d89a0 │ │ + blx d89b0 │ │ add sp, #424 @ 0x1a8 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r8, r0 │ │ ldr r0, [r4, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r8 │ │ - blx d6dd0 │ │ - bhi.n 7e4a8 │ │ + blx d6de0 │ │ + bvc.n 7e460 │ │ movs r5, r0 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ movs r0, #8 │ │ @@ -130172,24 +130085,24 @@ │ │ strd r5, r0, [sp] │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 77834 │ │ + bl 7789c │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub.w sp, sp, #10560 @ 0x2940 │ │ sub sp, #20 │ │ str r1, [sp, #16] │ │ str r0, [sp, #28] │ │ @@ -130201,301 +130114,301 @@ │ │ str r2, [sp, #40] @ 0x28 │ │ mov.w r5, r0, lsl #3 │ │ str r1, [sp, #36] @ 0x24 │ │ ittt ne │ │ ldrne r0, [sp, #28] │ │ ldrne r6, [r0, #16] │ │ cmpne r6, #0 │ │ - bne.w 7e606 │ │ - ldr r0, [pc, #592] @ (7e718 ) │ │ + bne.w 7e66e │ │ + ldr r0, [pc, #592] @ (7e780 ) │ │ movs r2, #7 │ │ ldr r4, [sp, #40] @ 0x28 │ │ add r0, pc │ │ mov r1, r4 │ │ - blx d8860 │ │ - cbz r0, 7e4e6 │ │ + blx d8870 │ │ + cbz r0, 7e54e │ │ movs r6, #0 │ │ mov r0, r6 │ │ mov r1, r4 │ │ add.w sp, sp, #10560 @ 0x2940 │ │ add sp, #20 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r1, r4 │ │ ldrsb.w r0, [r1, #7]! │ │ str r1, [sp, #12] │ │ cmn.w r0, #64 @ 0x40 │ │ - blt.w 7e704 │ │ + blt.w 7e76c │ │ ldr r0, [sp, #36] @ 0x24 │ │ cmp r0, #0 │ │ ldrd r4, r0, [sp, #24] │ │ - beq.n 7e4d4 │ │ + beq.n 7e53c │ │ ldr r1, [r0, #16] │ │ movs r6, #0 │ │ str r1, [sp, #52] @ 0x34 │ │ cmp r1, #0 │ │ - beq.n 7e4d6 │ │ + beq.n 7e53e │ │ ldr r1, [r0, #20] │ │ mov.w fp, #0 │ │ str r1, [sp, #40] @ 0x28 │ │ ldr r1, [r0, #24] │ │ str r1, [sp, #48] @ 0x30 │ │ ldr r1, [r0, #28] │ │ str r1, [sp, #44] @ 0x2c │ │ ldr r1, [r0, #32] │ │ ldr r0, [r0, #36] @ 0x24 │ │ str r1, [sp, #36] @ 0x24 │ │ str r0, [sp, #32] │ │ - ldr r0, [pc, #504] @ (7e71c ) │ │ + ldr r0, [pc, #504] @ (7e784 ) │ │ add r0, pc │ │ str r0, [sp, #20] │ │ - b.n 7e530 │ │ + b.n 7e598 │ │ subs r5, #40 @ 0x28 │ │ mov r6, fp │ │ - beq.n 7e4d4 │ │ + beq.n 7e53c │ │ mov sl, r4 │ │ ldr.w r0, [r4], #40 │ │ ldr r1, [sp, #48] @ 0x30 │ │ adds r2, r1, r0 │ │ ldr r0, [sp, #44] @ 0x2c │ │ adcs.w r3, r0, #0 │ │ adcs.w r0, r6, #0 │ │ - bne.n 7e52a │ │ + bne.n 7e592 │ │ ldrd r1, r0, [sp, #32] │ │ strd r0, r1, [sp] │ │ ldr r0, [sp, #52] @ 0x34 │ │ ldr r1, [sp, #40] @ 0x28 │ │ - bl 709c0 │ │ + bl 70a74 │ │ cmp r0, #0 │ │ - beq.n 7e52a │ │ + beq.n 7e592 │ │ mov r8, r1 │ │ cmp r1, #8 │ │ - bcc.n 7e52a │ │ + bcc.n 7e592 │ │ mov r9, r0 │ │ ldr r0, [sp, #20] │ │ mov r1, r9 │ │ movs r2, #8 │ │ - blx d8860 │ │ + blx d8870 │ │ ldr r2, [sp, #56] @ 0x38 │ │ sub.w r1, r8, #1 │ │ cmp r1, r2 │ │ it eq │ │ cmpeq r0, #0 │ │ - bne.n 7e52a │ │ + bne.n 7e592 │ │ ldr r1, [sp, #12] │ │ add.w r0, r9, #8 │ │ sub.w r2, r8, #8 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.n 7e52a │ │ + bne.n 7e592 │ │ ldr.w r0, [sl, #4] │ │ cmp r0, #8 │ │ itt ne │ │ ldrne.w r1, [sl, #20] │ │ cmpne r1, #0 │ │ - beq.n 7e4d4 │ │ + beq.n 7e53c │ │ ldr r3, [sp, #28] │ │ movs r6, #0 │ │ ldr.w r0, [sl, #16] │ │ ldr r2, [r3, #4] │ │ cmp r2, r0 │ │ - bcc.n 7e4d6 │ │ + bcc.n 7e53e │ │ subs r2, r2, r0 │ │ cmp r2, r1 │ │ - bcc.n 7e4d6 │ │ + bcc.n 7e53e │ │ subs.w r5, r1, #8 │ │ it cc │ │ movcc r5, r6 │ │ - bcc.n 7e4d6 │ │ + bcc.n 7e53e │ │ ldr r1, [r3, #0] │ │ movw r2, #19546 @ 0x4c5a │ │ movt r2, #16969 @ 0x4249 │ │ add.w r9, r1, r0 │ │ ldr.w r0, [r9] │ │ ldr.w r1, [r9, #4] │ │ eors r0, r2 │ │ orrs r0, r1 │ │ - bne.w 7e4d6 │ │ + bne.w 7e53e │ │ cmp r5, #4 │ │ - bcc.w 7e4d6 │ │ + bcc.w 7e53e │ │ ldr.w r0, [r9, #8] │ │ rev r1, r0 │ │ ldr r0, [sp, #16] │ │ - bl 8c198 │ │ + bl 8c204 │ │ mov r8, r0 │ │ mov r4, r1 │ │ add.w r0, r9, #12 │ │ subs r1, r5, #4 │ │ mov r2, r8 │ │ mov r3, r4 │ │ - bl 8c216 │ │ + bl 8c282 │ │ mov r6, r0 │ │ cmp r0, #0 │ │ it ne │ │ movne r6, r8 │ │ - b.n 7e4d6 │ │ + b.n 7e53e │ │ ldr r0, [sp, #28] │ │ mov sl, r5 │ │ ldr.w r8, [sp, #24] │ │ ldrd fp, r9, [r0, #32] │ │ ldr r1, [r0, #20] │ │ str r1, [sp, #44] @ 0x2c │ │ ldr r1, [r0, #24] │ │ str r1, [sp, #52] @ 0x34 │ │ ldr r1, [r0, #28] │ │ str r1, [sp, #48] @ 0x30 │ │ - b.n 7e628 │ │ + b.n 7e690 │ │ subs.w sl, sl, #40 @ 0x28 │ │ - beq.w 7e4c4 │ │ + beq.w 7e52c │ │ mov r4, r8 │ │ ldr.w r0, [r8], #40 │ │ ldr r1, [sp, #52] @ 0x34 │ │ adds r2, r1, r0 │ │ ldr r0, [sp, #48] @ 0x30 │ │ adcs.w r3, r0, #0 │ │ mov.w r0, #0 │ │ adcs.w r0, r0, #0 │ │ - bne.n 7e620 │ │ + bne.n 7e688 │ │ ldr r1, [sp, #44] @ 0x2c │ │ mov r0, r6 │ │ strd fp, r9, [sp] │ │ - bl 709c0 │ │ + bl 70a74 │ │ cmp r0, #0 │ │ - beq.n 7e620 │ │ + beq.n 7e688 │ │ ldr r2, [sp, #56] @ 0x38 │ │ cmp r1, r2 │ │ - bne.n 7e620 │ │ + bne.n 7e688 │ │ ldr r1, [sp, #40] @ 0x28 │ │ ldr r2, [sp, #56] @ 0x38 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.n 7e620 │ │ + bne.n 7e688 │ │ ldr r0, [r4, #4] │ │ mov r3, r4 │ │ cmp r0, #8 │ │ itt ne │ │ ldrne r5, [r3, #20] │ │ cmpne r5, #0 │ │ - bne.n 7e682 │ │ + bne.n 7e6ea │ │ ldrb r0, [r3, #9] │ │ movs r1, #1 │ │ movs r4, #0 │ │ and.w r0, r0, #8 │ │ eor.w r6, r1, r0, lsr #3 │ │ - b.n 7e4d6 │ │ + b.n 7e53e │ │ ldr r2, [sp, #28] │ │ movs r6, #0 │ │ ldr r0, [r3, #16] │ │ ldr r1, [r2, #4] │ │ cmp r1, r0 │ │ - bcc.w 7e4d6 │ │ + bcc.w 7e53e │ │ subs r1, r1, r0 │ │ cmp r1, r5 │ │ - bcc.w 7e4d6 │ │ + bcc.w 7e53e │ │ ldr r1, [r2, #0] │ │ ldrb r2, [r3, #9] │ │ add.w sl, r1, r0 │ │ lsls r0, r2, #28 │ │ - bmi.n 7e6aa │ │ + bmi.n 7e712 │ │ mov r4, r5 │ │ mov r6, sl │ │ - b.n 7e4d6 │ │ + b.n 7e53e │ │ cmp r5, #12 │ │ - bcc.w 7e4d6 │ │ + bcc.w 7e53e │ │ ldr.w r0, [sl] │ │ cmp r0, #1 │ │ - bne.w 7e4d6 │ │ + bne.w 7e53e │ │ ldr.w r1, [sl, #4] │ │ ldr r0, [sp, #16] │ │ - bl 8c198 │ │ + bl 8c204 │ │ add.w r8, sp, #72 @ 0x48 │ │ mov r9, r0 │ │ mov r4, r1 │ │ movw r1, #10497 @ 0x2901 │ │ mov r0, r8 │ │ - bl d518e │ │ + bl d521e │ │ subs r5, #12 │ │ add.w r2, sl, #12 │ │ add r0, sp, #60 @ 0x3c │ │ mov r1, r8 │ │ mov r3, r5 │ │ strd r9, r4, [sp] │ │ - bl 6eddc │ │ + bl 6ee90 │ │ ldr r0, [sp, #68] @ 0x44 │ │ ldr r1, [sp, #60] @ 0x3c │ │ ldrb.w r2, [sp, #64] @ 0x40 │ │ eors r0, r4 │ │ eors r1, r5 │ │ orrs r0, r1 │ │ it ne │ │ movne r9, r6 │ │ cmp r2, #0 │ │ it eq │ │ moveq r6, r9 │ │ - b.n 7e4d6 │ │ - ldr r0, [pc, #24] @ (7e720 ) │ │ + b.n 7e53e │ │ + ldr r0, [pc, #24] @ (7e788 ) │ │ movs r2, #7 │ │ ldr r1, [sp, #56] @ 0x38 │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ mov r3, r1 │ │ - bl 3fd1c │ │ + bl 40024 │ │ nop │ │ - add r2, pc, #280 @ (adr r2, 7e834 ) │ │ - vqrdmlah.s , , d28[0] │ │ - vrshr.u32 , q5, #7 │ │ + add r1, pc, #888 @ (adr r1, 7eafc ) │ │ + @ instruction: 0xfff97e04 │ │ + vclt.s32 d29, d2, #0 │ │ movs r5, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #60 @ 0x3c │ │ ldr r6, [r1, #4] │ │ - cbz r6, 7e742 │ │ + cbz r6, 7e7aa │ │ ldr r3, [r1, #0] │ │ cmp r6, #3 │ │ - bhi.n 7e74e │ │ + bhi.n 7e7b6 │ │ bic.w r6, r3, #255 @ 0xff │ │ mov.w lr, #19 │ │ - b.n 7e7aa │ │ + b.n 7e812 │ │ movs r1, #2 │ │ str r1, [r0, #0] │ │ add sp, #60 @ 0x3c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov ip, r3 │ │ ldr.w fp, [r1, #8] │ │ ldr.w r4, [ip], #4 │ │ subs r5, r6, #4 │ │ cmn.w r4, #16 │ │ - bcc.n 7e76e │ │ + bcc.n 7e7d6 │ │ adds r2, r4, #1 │ │ - beq.n 7e79c │ │ + beq.n 7e804 │ │ mov.w lr, #16 │ │ movs r3, #0 │ │ movs r6, #0 │ │ - b.n 7e7aa │ │ + b.n 7e812 │ │ mov.w r9, #4 │ │ mov r8, r4 │ │ cmp r5, r8 │ │ - bcc.n 7e78a │ │ + bcc.n 7e7f2 │ │ sub.w sl, r5, r8 │ │ add.w r2, ip, r8 │ │ cmp.w r8, #1 │ │ strd r2, sl, [r1] │ │ - bhi.n 7e7d6 │ │ + bhi.n 7e83e │ │ movs r6, #0 │ │ mov.w lr, #19 │ │ mov r3, ip │ │ uxtb r2, r5 │ │ lsls r4, r4, #16 │ │ orr.w r4, r4, r2, lsl #8 │ │ - b.n 7e7b4 │ │ + b.n 7e81c │ │ cmp r5, #7 │ │ - bhi.n 7e820 │ │ + bhi.n 7e888 │ │ bic.w r6, ip, #255 @ 0xff │ │ mov.w lr, #19 │ │ mov r3, ip │ │ uxtb r2, r3 │ │ orr.w ip, r2, r6 │ │ movs r6, #0 │ │ movs r4, #0 │ │ @@ -130512,147 +130425,147 @@ │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r3, ip │ │ sub.w r5, r8, #2 │ │ ldrh.w lr, [r3], #2 │ │ sub.w r2, lr, #2 │ │ cmp r2, #3 │ │ - bcs.n 7e856 │ │ + bcs.n 7e8be │ │ cmn.w r4, #16 │ │ - bcc.w 7e93c │ │ + bcc.w 7e9a4 │ │ cmp r5, #8 │ │ - bcc.w 7e940 │ │ + bcc.w 7e9a8 │ │ ldrb.w r2, [ip, #9] │ │ ldr.w r5, [ip, #5] │ │ lsls r2, r2, #24 │ │ orrs.w r2, r2, r5, lsr #8 │ │ - bne.w 7e9c4 │ │ + bne.w 7ea2c │ │ lsls r2, r5, #24 │ │ ldrb r5, [r3, #2] │ │ ldrh r3, [r3, #0] │ │ orr.w r3, r3, r5, lsl #16 │ │ sub.w r5, r8, #10 │ │ orr.w r4, r2, r3 │ │ add.w r3, ip, #10 │ │ - b.n 7e960 │ │ + b.n 7e9c8 │ │ ldrb r2, [r3, #11] │ │ ldr.w r5, [r3, #7] │ │ lsls r2, r2, #24 │ │ orrs.w r2, r2, r5, lsr #8 │ │ - bne.w 7e936 │ │ + bne.w 7e99e │ │ mov.w lr, r5, lsl #24 │ │ ldrb.w r5, [ip, #2] │ │ ldrh.w r2, [ip] │ │ add.w ip, r3, #12 │ │ mov.w r9, #8 │ │ orr.w r2, r2, r5, lsl #16 │ │ sub.w r5, r6, #12 │ │ orr.w r8, lr, r2 │ │ cmp r5, r8 │ │ - bcs.n 7e778 │ │ - b.n 7e78a │ │ + bcs.n 7e7e0 │ │ + b.n 7e7f2 │ │ cmp.w lr, #5 │ │ - bne.w 7e94a │ │ + bne.w 7e9b2 │ │ cmp r5, #0 │ │ - beq.n 7e940 │ │ + beq.n 7e9a8 │ │ add.w r3, ip, #3 │ │ cmp.w r8, #3 │ │ - beq.w 7e9bc │ │ + beq.w 7ea24 │ │ ldrb.w r5, [ip, #3] │ │ sub.w r2, r8, #4 │ │ ldrb.w r4, [ip, #2] │ │ str r2, [sp, #36] @ 0x24 │ │ add.w r2, ip, #4 │ │ cmp r5, #8 │ │ str r2, [sp, #32] │ │ - bhi.w 7e9ca │ │ + bhi.w 7ea32 │ │ movs r2, #1 │ │ lsls r2, r5 │ │ tst.w r2, #278 @ 0x116 │ │ - beq.w 7e9ca │ │ + beq.w 7ea32 │ │ strd r0, r1, [sp, #16] │ │ add r0, sp, #40 @ 0x28 │ │ add r1, sp, #32 │ │ mov r2, r9 │ │ str.w lr, [sp, #28] │ │ - bl 89da6 │ │ + bl 89dd2 │ │ ldrb.w lr, [sp, #40] @ 0x28 │ │ cmp.w lr, #82 @ 0x52 │ │ - bne.w 7eab2 │ │ + bne.w 7eb1a │ │ ldrd r0, r1, [sp, #16] │ │ subs r4, #1 │ │ cmp r4, #5 │ │ - bhi.w 7eac8 │ │ + bhi.w 7eb30 │ │ ldr r2, [sp, #44] @ 0x2c │ │ mov.w lr, #0 │ │ str r2, [sp, #24] │ │ tbb [pc, r4] │ │ lsls r5, r3, #13 │ │ - add r1, pc, #632 @ (adr r1, 7eb48 ) │ │ + add r1, pc, #632 @ (adr r1, 7ebb0 ) │ │ stmia r0!, {r2, r7} │ │ ldrd ip, r3, [sp, #32] │ │ cmp r3, #8 │ │ - bcc.w 7e78a │ │ + bcc.w 7e7f2 │ │ ldrb.w r0, [ip, #7] │ │ add r1, sp, #32 │ │ str r0, [sp, #12] │ │ mov r2, r9 │ │ ldrb.w r0, [ip, #2] │ │ str r0, [sp, #8] │ │ sub.w r0, r3, #8 │ │ str r0, [sp, #36] @ 0x24 │ │ ldrh.w r0, [ip] │ │ str r0, [sp, #4] │ │ add.w r0, ip, #8 │ │ str r0, [sp, #32] │ │ add r0, sp, #40 @ 0x28 │ │ ldr.w r4, [ip, #3] │ │ - bl 89da6 │ │ + bl 89dd2 │ │ ldrb.w lr, [sp, #40] @ 0x28 │ │ cmp.w lr, #82 @ 0x52 │ │ - bne.w 7eab2 │ │ + bne.w 7eb1a │ │ ldrd r1, r0, [sp, #4] │ │ mov.w lr, #1 │ │ ldr r2, [sp, #12] │ │ orr.w r0, r1, r0, lsl #16 │ │ ldr r1, [sp, #44] @ 0x2c │ │ str r1, [sp, #8] │ │ lsrs r1, r4, #8 │ │ bic.w r0, r0, #4278190080 @ 0xff000000 │ │ orr.w r1, r1, r2, lsl #24 │ │ str r1, [sp, #12] │ │ orr.w ip, r0, r4, lsl #24 │ │ - b.n 7eaac │ │ + b.n 7eb14 │ │ mov.w lr, #56 @ 0x38 │ │ - b.n 7e768 │ │ + b.n 7e7d0 │ │ cmp r5, #4 │ │ - bcs.n 7e954 │ │ + bcs.n 7e9bc │ │ movs r6, #0 │ │ mov.w lr, #19 │ │ mov ip, r3 │ │ - b.n 7e792 │ │ + b.n 7e7fa │ │ mov ip, lr │ │ movs r6, #0 │ │ mov.w lr, #17 │ │ - b.n 7e9c8 │ │ + b.n 7ea30 │ │ ldr.w r4, [ip, #2] │ │ add.w r3, ip, #6 │ │ sub.w r5, r8, #6 │ │ - cbz r5, 7e9bc │ │ + cbz r5, 7ea24 │ │ subs r2, r5, #1 │ │ str r2, [sp, #36] @ 0x24 │ │ mov r2, r3 │ │ ldrb.w r5, [r2], #1 │ │ str r2, [sp, #32] │ │ cmp r5, #8 │ │ - bhi.n 7e9ca │ │ + bhi.n 7ea32 │ │ movs r2, #1 │ │ lsls r2, r5 │ │ tst.w r2, #278 @ 0x116 │ │ - beq.n 7e9ca │ │ + beq.n 7ea32 │ │ strd r4, lr, [sp, #24] │ │ mov.w lr, #0 │ │ ldr r2, [sp, #24] │ │ strb.w r5, [r0, #32] │ │ movs r5, #0 │ │ strb.w r9, [r0, #33] @ 0x21 │ │ strd r8, r2, [r0, #36] @ 0x24 │ │ @@ -130669,43 +130582,43 @@ │ │ add r0, fp │ │ str r0, [r1, #8] │ │ add sp, #60 @ 0x3c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov.w lr, #19 │ │ mov ip, r3 │ │ - b.n 7e9ce │ │ + b.n 7ea36 │ │ mov.w lr, #56 @ 0x38 │ │ - b.n 7e792 │ │ + b.n 7e7fa │ │ mov.w lr, #25 │ │ movs r6, #0 │ │ - b.n 7e792 │ │ + b.n 7e7fa │ │ ldrd ip, r3, [sp, #32] │ │ cmp r3, #8 │ │ str r5, [sp, #4] │ │ - bcc.w 7e78a │ │ + bcc.w 7e7f2 │ │ ldr.w r5, [ip, #3] │ │ subs r3, #8 │ │ ldrb.w lr, [ip, #7] │ │ add.w r2, ip, #8 │ │ str r3, [sp, #36] @ 0x24 │ │ ldrb.w r3, [ip, #2] │ │ str r2, [sp, #32] │ │ lsrs r2, r5, #8 │ │ ldrh.w r4, [ip] │ │ orr.w r2, r2, lr, lsl #24 │ │ str r2, [sp, #12] │ │ mov.w lr, #4 │ │ - b.n 7ea3e │ │ + b.n 7eaa6 │ │ mov.w lr, #2 │ │ - b.n 7e984 │ │ + b.n 7e9ec │ │ ldrd ip, r3, [sp, #32] │ │ cmp r3, #8 │ │ str r5, [sp, #4] │ │ - bcc.w 7e78a │ │ + bcc.w 7e7f2 │ │ ldr.w r5, [ip, #3] │ │ subs r3, #8 │ │ ldrb.w lr, [ip, #7] │ │ add.w r2, ip, #8 │ │ str r3, [sp, #36] @ 0x24 │ │ ldrb.w r3, [ip, #2] │ │ str r2, [sp, #32] │ │ @@ -130713,79 +130626,79 @@ │ │ ldrh.w r4, [ip] │ │ orr.w r2, r2, lr, lsl #24 │ │ str r2, [sp, #12] │ │ mov.w lr, #3 │ │ orr.w r2, r4, r3, lsl #16 │ │ orr.w ip, r2, r5, lsl #24 │ │ ldr r5, [sp, #4] │ │ - b.n 7e984 │ │ + b.n 7e9ec │ │ ldrd ip, r3, [sp, #32] │ │ cmp r3, #8 │ │ - bcc.w 7e78a │ │ + bcc.w 7e7f2 │ │ ldrb.w r0, [ip, #7] │ │ add r1, sp, #32 │ │ str r0, [sp, #12] │ │ mov r2, r9 │ │ ldrb.w r0, [ip, #2] │ │ str r0, [sp, #8] │ │ sub.w r0, r3, #8 │ │ str r0, [sp, #36] @ 0x24 │ │ ldrh.w r0, [ip] │ │ str r0, [sp, #4] │ │ add.w r0, ip, #8 │ │ str r0, [sp, #32] │ │ add r0, sp, #40 @ 0x28 │ │ ldr.w r4, [ip, #3] │ │ - bl 89da6 │ │ + bl 89dd2 │ │ ldrb.w lr, [sp, #40] @ 0x28 │ │ cmp.w lr, #82 @ 0x52 │ │ - bne.n 7eab2 │ │ + bne.n 7eb1a │ │ ldrd r1, r0, [sp, #4] │ │ mov.w lr, #5 │ │ ldr r2, [sp, #12] │ │ orr.w r0, r1, r0, lsl #16 │ │ ldr r1, [sp, #44] @ 0x2c │ │ bic.w r0, r0, #4278190080 @ 0xff000000 │ │ str r1, [sp, #8] │ │ orr.w ip, r0, r4, lsl #24 │ │ lsrs r1, r4, #8 │ │ orr.w r1, r1, r2, lsl #24 │ │ str r1, [sp, #12] │ │ ldrd r0, r1, [sp, #16] │ │ - b.n 7e984 │ │ + b.n 7e9ec │ │ ldr r6, [sp, #52] @ 0x34 │ │ ldr.w ip, [sp, #48] @ 0x30 │ │ ldr r3, [sp, #44] @ 0x2c │ │ ldrh.w r4, [sp, #42] @ 0x2a │ │ ldrb.w r5, [sp, #41] @ 0x29 │ │ ldrd r0, r1, [sp, #16] │ │ - b.n 7e792 │ │ + b.n 7e7fa │ │ mov.w lr, #66 @ 0x42 │ │ - b.n 7e9c8 │ │ - bmi.n 7ea7a │ │ + b.n 7ea30 │ │ + bmi.n 7eae2 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub.w sp, sp, #932 @ 0x3a4 │ │ ldr.w r9, [r1, #124] @ 0x7c │ │ ldrd fp, ip, [r1] │ │ str r1, [sp, #172] @ 0xac │ │ cmp.w r9, #0 │ │ ldr r1, [r2, #40] @ 0x28 │ │ str r0, [sp, #168] @ 0xa8 │ │ str r2, [sp, #164] @ 0xa4 │ │ - beq.n 7eb7c │ │ + beq.n 7ebe4 │ │ ldr r0, [sp, #172] @ 0xac │ │ mov.w sl, #0 │ │ ldr.w lr, [r0, #128] @ 0x80 │ │ ldrh.w r8, [r9, #270] @ 0x10e │ │ add.w r0, r9, #176 @ 0xb0 │ │ mov.w r5, #4294967295 @ 0xffffffff │ │ mov.w r3, r8, lsl #3 │ │ - cbz r3, 7eb3e │ │ + cbz r3, 7eba6 │ │ ldrd r4, r2, [r0], #8 │ │ subs r3, #8 │ │ adds r5, #1 │ │ subs r6, r1, r4 │ │ sbcs.w r6, sl, r2 │ │ mov.w r6, #0 │ │ it cc │ │ @@ -130793,51 +130706,51 @@ │ │ subs r4, r4, r1 │ │ sbcs.w r2, r2, #0 │ │ mov.w r2, #0 │ │ it cc │ │ movcc r2, #1 │ │ subs r4, r2, r6 │ │ cmp r4, #1 │ │ - beq.n 7eb0c │ │ + beq.n 7eb74 │ │ uxtb r0, r4 │ │ - cbnz r0, 7eb40 │ │ - b.n 7eb54 │ │ + cbnz r0, 7eba8 │ │ + b.n 7ebbc │ │ mov r5, r8 │ │ cmp.w lr, #0 │ │ - beq.n 7eb7c │ │ + beq.n 7ebe4 │ │ add.w r0, r9, r5, lsl #2 │ │ sub.w lr, lr, #1 │ │ ldr.w r9, [r0, #272] @ 0x110 │ │ - b.n 7eafc │ │ + b.n 7eb64 │ │ lsls r0, r5, #4 │ │ ldrb.w r6, [r9, r0] │ │ add.w r0, r9, r5, lsl #4 │ │ cmp r6, #82 @ 0x52 │ │ - bne.n 7eb8c │ │ + bne.n 7ebf4 │ │ ldr r1, [r0, #4] │ │ ldrex r2, [r1] │ │ adds r3, r2, #1 │ │ strex r6, r3, [r1] │ │ cmp r6, #0 │ │ - bne.n 7eb64 │ │ + bne.n 7ebcc │ │ cmp r2, #0 │ │ - bmi.w 7fd08 │ │ + bmi.w 7fd70 │ │ ldr r4, [r0, #4] │ │ - b.n 7f142 │ │ + b.n 7f1aa │ │ cmp ip, r1 │ │ - bcs.n 7eb9c │ │ + bcs.n 7ec04 │ │ mov.w sl, #0 │ │ movs r6, #19 │ │ mov.w r8, #0 │ │ - b.n 7f21a │ │ + b.n 7f282 │ │ ldrd r4, fp, [r0, #4] │ │ ldr.w r8, [r0, #12] │ │ ldrh r5, [r0, #2] │ │ ldrb.w sl, [r0, #1] │ │ - b.n 7f21a │ │ + b.n 7f282 │ │ movs r2, #0 │ │ movs r0, #8 │ │ strd r2, r0, [sp, #816] @ 0x330 │ │ add r0, sp, #456 @ 0x1c8 │ │ adds r0, #24 │ │ str r0, [sp, #140] @ 0x8c │ │ add r0, sp, #368 @ 0x170 │ │ @@ -130848,29 +130761,29 @@ │ │ sub.w r6, ip, r1 │ │ adds r2, r0, #4 │ │ add.w r1, r0, #24 │ │ adds r0, #8 │ │ str r0, [sp, #152] @ 0x98 │ │ str r1, [sp, #144] @ 0x90 │ │ cmp r6, #0 │ │ - beq.w 7f072 │ │ + beq.w 7f0da │ │ str r2, [sp, #160] @ 0xa0 │ │ mov.w r9, #0 │ │ mov.w r8, #0 │ │ movs r2, #0 │ │ mov r0, r6 │ │ mov lr, r3 │ │ mov ip, r3 │ │ mov fp, r3 │ │ str r6, [sp, #156] @ 0x9c │ │ ldrb.w sl, [fp], #1 │ │ cmp r2, #63 @ 0x3f │ │ - bne.n 7ebf4 │ │ + bne.n 7ec5c │ │ cmp.w sl, #1 │ │ - bhi.w 7f046 │ │ + bhi.w 7f0ae │ │ and.w r4, r2, #63 @ 0x3f │ │ and.w r5, sl, #127 @ 0x7f │ │ rsb r1, r4, #32 │ │ subs.w r6, r4, #32 │ │ sub.w r3, r0, #1 │ │ lsr.w r1, r5, r1 │ │ it pl │ │ @@ -130878,57 +130791,57 @@ │ │ orr.w r8, r8, r1 │ │ lsl.w r1, r5, r4 │ │ it pl │ │ movpl r1, #0 │ │ orr.w r9, r9, r1 │ │ sxtb.w r1, sl │ │ cmp r1, #0 │ │ - bpl.n 7ec36 │ │ + bpl.n 7ec9e │ │ adds r2, #7 │ │ mov r0, r3 │ │ mov ip, fp │ │ cmp r3, #0 │ │ - bne.n 7ebe4 │ │ - b.n 7f050 │ │ + bne.n 7ec4c │ │ + b.n 7f0b8 │ │ ldr.w lr, [sp, #160] @ 0xa0 │ │ orrs.w r1, r9, r8 │ │ - beq.w 7f072 │ │ + beq.w 7f0da │ │ cmp r3, #0 │ │ - beq.w 7f0e0 │ │ + beq.w 7f148 │ │ ldrsb.w r1, [ip, #1] │ │ add.w fp, ip, #2 │ │ subs r2, r0, #2 │ │ and.w r3, r1, #127 @ 0x7f │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ - bgt.n 7ec96 │ │ + bgt.n 7ecfe │ │ cmp r2, #0 │ │ - beq.w 7f0e0 │ │ + beq.w 7f148 │ │ ldrsb.w r1, [ip, #2] │ │ add.w fp, ip, #3 │ │ and.w r2, r1, #127 @ 0x7f │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ orr.w r3, r3, r2, lsl #7 │ │ sub.w r2, r0, #3 │ │ - bgt.n 7ec96 │ │ + bgt.n 7ecfe │ │ cmp r2, #0 │ │ - beq.w 7f0e0 │ │ + beq.w 7f148 │ │ ldrb.w r2, [fp] │ │ cmp r2, #3 │ │ - bhi.w 7f912 │ │ + bhi.w 7f97a │ │ orr.w r3, r3, r2, lsl #14 │ │ subs r2, r0, #4 │ │ add.w fp, ip, #4 │ │ lsls r0, r3, #16 │ │ - beq.w 7f0f8 │ │ + beq.w 7f160 │ │ cmp r2, #0 │ │ - beq.w 7f0e0 │ │ + beq.w 7f148 │ │ ldrb.w r1, [fp] │ │ movs r0, #0 │ │ cmp r1, #1 │ │ - bhi.w 7f104 │ │ + bhi.w 7f16c │ │ subs r5, r2, #1 │ │ add.w fp, fp, #1 │ │ strd r1, r3, [sp, #120] @ 0x78 │ │ strd r0, r0, [sp, #440] @ 0x1b8 │ │ strd r0, r0, [sp, #424] @ 0x1a8 │ │ strd r0, r0, [sp, #408] @ 0x198 │ │ strd r0, r0, [sp, #392] @ 0x188 │ │ @@ -130938,90 +130851,90 @@ │ │ str r0, [sp, #400] @ 0x190 │ │ strd r0, r0, [sp, #368] @ 0x170 │ │ strd r0, r0, [sp, #376] @ 0x178 │ │ str r0, [sp, #148] @ 0x94 │ │ str r0, [sp, #384] @ 0x180 │ │ str r0, [sp, #136] @ 0x88 │ │ cmp r5, #0 │ │ - beq.w 7f0d4 │ │ + beq.w 7f13c │ │ mov r4, fp │ │ subs r2, r5, #1 │ │ ldrsb.w r0, [r4], #1 │ │ and.w r6, r0, #127 @ 0x7f │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 7ed2c │ │ + bgt.n 7ed94 │ │ cmp r2, #0 │ │ - beq.w 7f0da │ │ + beq.w 7f142 │ │ ldrsb.w r0, [fp, #1] │ │ add.w r4, fp, #2 │ │ subs r2, r5, #2 │ │ and.w r1, r0, #127 @ 0x7f │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ orr.w r6, r6, r1, lsl #7 │ │ - bgt.n 7ed2c │ │ + bgt.n 7ed94 │ │ cmp r2, #0 │ │ - beq.w 7f0da │ │ + beq.w 7f142 │ │ ldrb r0, [r4, #0] │ │ cmp r0, #3 │ │ - bhi.w 7f10c │ │ + bhi.w 7f174 │ │ orr.w r6, r6, r0, lsl #14 │ │ subs r2, r5, #3 │ │ add.w r4, fp, #3 │ │ lsls r0, r6, #16 │ │ - beq.w 7eefa │ │ + beq.w 7ef62 │ │ cmp r2, #0 │ │ - beq.w 7f0da │ │ + beq.w 7f142 │ │ mov fp, r4 │ │ subs r5, r2, #1 │ │ ldrsb.w r0, [fp], #1 │ │ and.w r1, r0, #127 @ 0x7f │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 7ed82 │ │ + bgt.n 7edea │ │ cmp r5, #0 │ │ - beq.w 7f0d4 │ │ + beq.w 7f13c │ │ ldrsb.w r0, [r4, #1] │ │ add.w fp, r4, #2 │ │ subs r5, r2, #2 │ │ and.w r3, r0, #127 @ 0x7f │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ orr.w r1, r1, r3, lsl #7 │ │ - bgt.n 7ed82 │ │ + bgt.n 7edea │ │ cmp r5, #0 │ │ - beq.w 7f0d4 │ │ + beq.w 7f13c │ │ ldrb.w r0, [fp] │ │ cmp r0, #3 │ │ - bhi.w 7f10c │ │ + bhi.w 7f174 │ │ orr.w r1, r1, r0, lsl #14 │ │ subs r5, r2, #3 │ │ add.w fp, r4, #3 │ │ uxth r0, r1 │ │ cmp r0, #33 @ 0x21 │ │ str.w fp, [sp, #156] @ 0x9c │ │ - beq.n 7ed9c │ │ + beq.n 7ee04 │ │ cmp r0, #0 │ │ - beq.w 7f0ec │ │ + beq.w 7f154 │ │ mov.w fp, #0 │ │ mov.w sl, #0 │ │ - b.n 7ee3e │ │ + b.n 7eea6 │ │ cmp r5, #0 │ │ - beq.w 7f0f0 │ │ + beq.w 7f158 │ │ add.w r3, fp, #1 │ │ subs r2, r5, #1 │ │ mov.w fp, #0 │ │ mov.w sl, #0 │ │ movs r0, #0 │ │ strd r6, r1, [sp, #132] @ 0x84 │ │ str r5, [sp, #128] @ 0x80 │ │ ldrb.w r5, [r3, #-1] │ │ cmp r0, #63 @ 0x3f │ │ - bne.n 7edca │ │ + bne.n 7ee32 │ │ cmp r5, #127 @ 0x7f │ │ it ne │ │ cmpne r5, #0 │ │ - bne.w 7f0c8 │ │ + bne.w 7f130 │ │ and.w r1, r0, #63 @ 0x3f │ │ and.w r4, r5, #127 @ 0x7f │ │ rsb lr, r1, #32 │ │ subs.w ip, r1, #32 │ │ lsl.w r1, r4, r1 │ │ add.w r0, r0, #7 │ │ lsr.w r6, r4, lr │ │ @@ -131029,27 +130942,27 @@ │ │ lslpl.w r6, r4, ip │ │ it pl │ │ movpl r1, #0 │ │ orr.w fp, fp, r1 │ │ orr.w sl, sl, r6 │ │ sxtb r1, r5 │ │ cmp r1, #0 │ │ - bpl.n 7ee0a │ │ + bpl.n 7ee72 │ │ subs r2, #1 │ │ adds r3, #1 │ │ mov lr, r5 │ │ adds r4, r2, #1 │ │ - bne.n 7edb8 │ │ - b.n 7f062 │ │ + bne.n 7ee20 │ │ + b.n 7f0ca │ │ ldr.w lr, [sp, #160] @ 0xa0 │ │ cmp r0, #63 @ 0x3f │ │ ldr r6, [sp, #132] @ 0x84 │ │ - bgt.n 7ee38 │ │ + bgt.n 7eea0 │ │ cmp r5, #64 @ 0x40 │ │ - bcc.n 7ee38 │ │ + bcc.n 7eea0 │ │ and.w r0, r0, #63 @ 0x3f │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ lsls r1, r0 │ │ subs r0, #32 │ │ it pl │ │ movpl r1, #0 │ │ orr.w fp, fp, r1 │ │ @@ -131065,104 +130978,104 @@ │ │ ldr r0, [sp, #368] @ 0x170 │ │ bic.w r1, fp, r1 │ │ str r1, [sp, #148] @ 0x94 │ │ ubfx r1, fp, #8, #8 │ │ cmp r0, #1 │ │ str r1, [sp, #136] @ 0x88 │ │ str r3, [sp, #132] @ 0x84 │ │ - bne.n 7ee8c │ │ + bne.n 7eef4 │ │ ldr r4, [sp, #380] @ 0x17c │ │ ldr r0, [sp, #372] @ 0x174 │ │ cmp r4, r0 │ │ - bne.n 7ee6c │ │ + bne.n 7eed4 │ │ mov r0, lr │ │ mov r6, lr │ │ - bl 41c7e │ │ + bl 41e70 │ │ mov lr, r6 │ │ ldr r0, [sp, #376] @ 0x178 │ │ lsls r1, r4, #4 │ │ str.w fp, [r0, r1] │ │ add.w r0, r0, r4, lsl #4 │ │ ldr r1, [sp, #132] @ 0x84 │ │ str.w sl, [r0, #4] │ │ str r1, [r0, #8] │ │ str r0, [r0, #12] │ │ adds r0, r4, #1 │ │ str r0, [sp, #380] @ 0x17c │ │ ldr.w fp, [sp, #156] @ 0x9c │ │ - b.n 7ecde │ │ + b.n 7ed46 │ │ ldr r0, [sp, #372] @ 0x174 │ │ cmp r0, #5 │ │ - bne.n 7eeda │ │ + bne.n 7ef42 │ │ movs r0, #80 @ 0x50 │ │ mov r4, lr │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 7fd00 │ │ + beq.w 7fd68 │ │ ldr r1, [sp, #152] @ 0x98 │ │ movs r6, #5 │ │ movs r2, #80 @ 0x50 │ │ str r0, [sp, #916] @ 0x394 │ │ str r6, [sp, #912] @ 0x390 │ │ - bl d4c50 │ │ + bl d50a2 │ │ str r6, [sp, #920] @ 0x398 │ │ add r0, sp, #912 @ 0x390 │ │ - bl 41c7e │ │ + bl 41e70 │ │ ldrd r0, r1, [sp, #912] @ 0x390 │ │ mov lr, r4 │ │ strd r0, r1, [r4] │ │ movs r0, #6 │ │ ldr r2, [sp, #132] @ 0x84 │ │ str r0, [r4, #8] │ │ str r0, [r1, #92] @ 0x5c │ │ str r0, [sp, #920] @ 0x398 │ │ movs r0, #1 │ │ strd fp, sl, [r1, #80] @ 0x50 │ │ str r2, [r1, #88] @ 0x58 │ │ str r0, [sp, #368] @ 0x170 │ │ ldr.w fp, [sp, #156] @ 0x9c │ │ - b.n 7ecde │ │ - bcs.w 7fcf4 │ │ + b.n 7ed46 │ │ + bcs.w 7fd5c │ │ ldr r2, [sp, #152] @ 0x98 │ │ lsls r1, r0, #4 │ │ str.w fp, [r2, r1] │ │ add.w r1, r2, r0, lsl #4 │ │ str r0, [r1, #12] │ │ adds r0, #1 │ │ strd sl, r3, [r1, #4] │ │ str r0, [sp, #372] @ 0x174 │ │ ldr.w fp, [sp, #156] @ 0x9c │ │ - b.n 7ecde │ │ + b.n 7ed46 │ │ cmp r2, #0 │ │ - beq.w 7f0da │ │ + beq.w 7f142 │ │ mov r3, r4 │ │ subs r6, r2, #1 │ │ ldrsb.w r1, [r3], #1 │ │ and.w r0, r1, #127 @ 0x7f │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ - bgt.n 7ef46 │ │ + bgt.n 7efae │ │ cmp r6, #0 │ │ - beq.w 7f99c │ │ + beq.w 7fa04 │ │ ldrsb.w r1, [r4, #1] │ │ subs r6, r2, #2 │ │ and.w r3, r1, #127 @ 0x7f │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ orr.w r0, r0, r3, lsl #7 │ │ add.w r3, r4, #2 │ │ - bgt.n 7ef46 │ │ + bgt.n 7efae │ │ cmp r6, #0 │ │ - beq.w 7f99c │ │ + beq.w 7fa04 │ │ ldrb r1, [r3, #0] │ │ cmp r1, #3 │ │ - bhi.w 7f10c │ │ + bhi.w 7f174 │ │ orr.w r0, r0, r1, lsl #14 │ │ subs r6, r2, #3 │ │ adds r3, r4, #3 │ │ lsls r0, r0, #16 │ │ - bne.w 7f95c │ │ + bne.w 7f9c4 │ │ ldr r0, [sp, #368] @ 0x170 │ │ add r5, sp, #304 @ 0x130 │ │ str r0, [sp, #132] @ 0x84 │ │ ldr r0, [sp, #372] @ 0x174 │ │ mov sl, r5 │ │ str r0, [sp, #116] @ 0x74 │ │ ldrd lr, r0, [sp, #376] @ 0x178 │ │ @@ -131177,30 +131090,30 @@ │ │ stmia.w sl!, {r0, r1, r2, r4, r6} │ │ ldmia r3!, {r0, r1, r2, r4, r6} │ │ stmia.w sl!, {r0, r1, r2, r4, r6} │ │ ldmia.w r3, {r0, r1, r2, r4, r6, ip} │ │ stmia.w sl, {r0, r1, r2, r4, r6, ip} │ │ ldr r0, [sp, #132] @ 0x84 │ │ cmp r0, #2 │ │ - beq.w 7f968 │ │ + beq.w 7f9d0 │ │ mov r1, r5 │ │ add.w sl, sp, #176 @ 0xb0 │ │ ldmia r1!, {r0, r2, r3, r4, r6} │ │ mov ip, sl │ │ stmia.w ip!, {r0, r2, r3, r4, r6} │ │ ldmia r1!, {r0, r2, r3, r4, r6} │ │ stmia.w ip!, {r0, r2, r3, r4, r6} │ │ ldmia.w r1, {r0, r2, r3, r4, r5, r6} │ │ stmia.w ip, {r0, r2, r3, r4, r5, r6} │ │ mov.w r5, lr, lsr #16 │ │ ubfx r0, lr, #8, #8 │ │ uxtb.w r6, lr │ │ ldr.w lr, [sp, #132] @ 0x84 │ │ cmp.w lr, #3 │ │ - beq.w 7f974 │ │ + beq.w 7f9dc │ │ mov r1, sl │ │ str r0, [sp, #148] @ 0x94 │ │ str r6, [sp, #108] @ 0x6c │ │ mov sl, r5 │ │ ldmia r1!, {r0, r2, r3, r5, r6} │ │ add.w ip, sp, #240 @ 0xf0 │ │ stmia.w ip!, {r0, r2, r3, r5, r6} │ │ @@ -131231,115 +131144,115 @@ │ │ ldr r0, [sp, #120] @ 0x78 │ │ strb.w r0, [sp, #554] @ 0x22a │ │ ldr r0, [sp, #124] @ 0x7c │ │ strd r9, r8, [sp, #544] @ 0x220 │ │ strh.w r0, [sp, #552] @ 0x228 │ │ add r0, sp, #816 @ 0x330 │ │ add r1, sp, #456 @ 0x1c8 │ │ - bl 41ca4 │ │ + bl 41fac │ │ ldr r3, [sp, #112] @ 0x70 │ │ cmp r0, #0 │ │ ldrd r6, r2, [sp, #156] @ 0x9c │ │ - beq.w 7ebc8 │ │ + beq.w 7ec30 │ │ movs r6, #14 │ │ mov.w sl, #0 │ │ - b.n 7f138 │ │ + b.n 7f1a0 │ │ movs r6, #6 │ │ mov.w r8, #0 │ │ ldr r5, [sp, #136] @ 0x88 │ │ - b.n 7f138 │ │ + b.n 7f1a0 │ │ ldr r0, [sp, #156] @ 0x9c │ │ movs r6, #19 │ │ add.w fp, lr, r0 │ │ mov.w r8, #0 │ │ mov r4, fp │ │ ldr r5, [sp, #136] @ 0x88 │ │ - b.n 7f138 │ │ + b.n 7f1a0 │ │ ldr r0, [sp, #156] @ 0x9c │ │ ldr r1, [sp, #128] @ 0x80 │ │ adds r4, r0, r1 │ │ mov fp, r4 │ │ mov.w r8, #0 │ │ movs r0, #19 │ │ - b.n 7f116 │ │ + b.n 7f17e │ │ ldr r0, [sp, #816] @ 0x330 │ │ ldrd fp, r8, [sp, #832] @ 0x340 │ │ ldrb.w r6, [sp, #824] @ 0x338 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ ldrb.w sl, [sp, #825] @ 0x339 │ │ ldrh.w r5, [sp, #826] @ 0x33a │ │ ldr r4, [sp, #828] @ 0x33c │ │ - beq.n 7f13e │ │ + beq.n 7f1a6 │ │ ldr r1, [sp, #820] @ 0x334 │ │ strd r4, fp, [sp, #476] @ 0x1dc │ │ strh.w r5, [sp, #474] @ 0x1da │ │ strd r0, r1, [sp, #464] @ 0x1d0 │ │ movs r0, #1 │ │ strd r0, r0, [sp, #456] @ 0x1c8 │ │ movs r0, #32 │ │ strb.w sl, [sp, #473] @ 0x1d9 │ │ strb.w r6, [sp, #472] @ 0x1d8 │ │ str.w r8, [sp, #484] @ 0x1e4 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 7fade │ │ + beq.w 7fb46 │ │ add r5, sp, #456 @ 0x1c8 │ │ mov r4, r0 │ │ ldmia r5!, {r1, r2, r3, r6} │ │ stmia r0!, {r1, r2, r3, r6} │ │ ldmia.w r5, {r1, r2, r3, r6} │ │ stmia r0!, {r1, r2, r3, r6} │ │ - b.n 7f142 │ │ + b.n 7f1aa │ │ movs r0, #7 │ │ mov.w lr, #0 │ │ mov.w r8, #0 │ │ - b.n 7f116 │ │ + b.n 7f17e │ │ movs r0, #19 │ │ mov r4, fp │ │ - b.n 7f10e │ │ + b.n 7f176 │ │ movs r0, #19 │ │ mov fp, r4 │ │ - b.n 7f10e │ │ + b.n 7f176 │ │ movs r6, #19 │ │ mov.w r8, #0 │ │ ldr.w sl, [sp, #148] @ 0x94 │ │ - b.n 7f05c │ │ + b.n 7f0c4 │ │ movs r0, #9 │ │ - b.n 7f10e │ │ + b.n 7f176 │ │ mov.w lr, #0 │ │ mov r4, fp │ │ - b.n 7f06a │ │ + b.n 7f0d2 │ │ movs r6, #8 │ │ mov.w r8, #0 │ │ ldr.w sl, [sp, #148] @ 0x94 │ │ - b.n 7f04c │ │ + b.n 7f0b4 │ │ ldr.w sl, [sp, #148] @ 0x94 │ │ movs r6, #10 │ │ - b.n 7f058 │ │ + b.n 7f0c0 │ │ movs r0, #6 │ │ mov.w r8, #0 │ │ ldr.w lr, [sp, #136] @ 0x88 │ │ ldr r2, [sp, #148] @ 0x94 │ │ ldr r1, [sp, #368] @ 0x170 │ │ add r0, r2 │ │ add.w r6, r0, lr, lsl #8 │ │ cmp r1, #0 │ │ itt ne │ │ ldrne r0, [sp, #372] @ 0x174 │ │ cmpne r0, #0 │ │ - beq.n 7f130 │ │ + beq.n 7f198 │ │ ldr r0, [sp, #376] @ 0x178 │ │ - blx d87c0 │ │ + blx d87d0 │ │ lsrs r5, r6, #16 │ │ ubfx sl, r6, #8, #8 │ │ uxtb r6, r6 │ │ add r0, sp, #816 @ 0x330 │ │ - bl 8af84 │ │ + bl 8aff0 │ │ cmp r6, #82 @ 0x52 │ │ - bne.n 7f21a │ │ + bne.n 7f282 │ │ ldr r6, [sp, #164] @ 0xa4 │ │ mov fp, r4 │ │ add.w lr, r6, #12 │ │ ldrd r4, r8, [r6, #4] │ │ ldr r5, [r6, #0] │ │ adds r6, #32 │ │ ldmia.w lr, {r0, r9, sl, ip, lr} │ │ @@ -131400,64 +131313,64 @@ │ │ str r0, [sp, #380] @ 0x17c │ │ add r0, sp, #456 @ 0x1c8 │ │ adds r0, #184 @ 0xb8 │ │ str r0, [sp, #376] @ 0x178 │ │ strd ip, lr, [sp, #368] @ 0x170 │ │ mov r0, r6 │ │ mov r1, r5 │ │ - bl 8b0ec │ │ + bl 8b158 │ │ ldrb.w r0, [sp, #304] @ 0x130 │ │ ldrb.w r1, [sp, #305] @ 0x131 │ │ cmp r0, #82 @ 0x52 │ │ - bne.n 7f236 │ │ + bne.n 7f29e │ │ ldr r0, [sp, #384] @ 0x180 │ │ lsls r1, r1, #31 │ │ - beq.n 7f250 │ │ + beq.n 7f2b8 │ │ cmp r0, #0 │ │ - beq.n 7f1fa │ │ - b.n 7f256 │ │ + beq.n 7f262 │ │ + b.n 7f2be │ │ ldr r2, [sp, #168] @ 0xa8 │ │ movs r0, #0 │ │ movs r1, #2 │ │ strd r1, r0, [r2] │ │ strh r5, [r2, #10] │ │ strb.w sl, [r2, #9] │ │ strb r6, [r2, #8] │ │ strd r4, fp, [r2, #12] │ │ str.w r8, [r2, #20] │ │ - b.n 7f810 │ │ + b.n 7f878 │ │ add r6, sp, #308 @ 0x134 │ │ ldrh.w r5, [sp, #306] @ 0x132 │ │ add.w ip, sl, #12 │ │ strh.w r5, [sl, #10] │ │ ldmia r6, {r2, r3, r6} │ │ strb.w r1, [sl, #9] │ │ stmia.w ip, {r2, r3, r6} │ │ - b.n 7f5d8 │ │ + b.n 7f640 │ │ cmp r0, #0 │ │ - beq.w 7f5d6 │ │ + beq.w 7f63e │ │ ldrd r2, r3, [sp, #388] @ 0x184 │ │ ldr r1, [r3, #0] │ │ cmp r1, #1 │ │ - bne.n 7f266 │ │ + bne.n 7f2ce │ │ ldrd r3, r1, [r3, #8] │ │ - b.n 7f270 │ │ + b.n 7f2d8 │ │ ldr r1, [r3, #4] │ │ cmp r1, #6 │ │ - bcs.w 7f980 │ │ + bcs.w 7f9e8 │ │ adds r3, #8 │ │ ldr r5, [sp, #456] @ 0x1c8 │ │ add.w ip, sp, #240 @ 0xf0 │ │ str r5, [sp, #140] @ 0x8c │ │ cmp r1, #0 │ │ ldr r5, [sp, #460] @ 0x1cc │ │ str r5, [sp, #136] @ 0x88 │ │ strd r1, r4, [sp, #252] @ 0xfc │ │ stmia.w ip, {r0, r2, r3} │ │ - beq.w 7f4b4 │ │ + beq.w 7f51c │ │ movs r0, #0 │ │ add.w r4, r6, #8 │ │ str r0, [sp, #160] @ 0xa0 │ │ movs r0, #46 @ 0x2e │ │ str r0, [sp, #156] @ 0x9c │ │ add.w sl, r3, #16 │ │ str r0, [sp, #128] @ 0x80 │ │ @@ -131469,52 +131382,52 @@ │ │ str r0, [sp, #144] @ 0x90 │ │ sub.w fp, r1, #1 │ │ str r0, [sp, #164] @ 0xa4 │ │ add.w r9, sp, #304 @ 0x130 │ │ add.w r8, sp, #176 @ 0xb0 │ │ movs r0, #0 │ │ str r0, [sp, #132] @ 0x84 │ │ - b.n 7f2cc │ │ + b.n 7f334 │ │ sub.w fp, fp, #1 │ │ add.w sl, sl, #16 │ │ adds.w r0, fp, #1 │ │ - beq.w 7f5be │ │ + beq.w 7f626 │ │ ldmdb sl, {r0, r1, r2, r3} │ │ add.w ip, sp, #176 @ 0xb0 │ │ ldr r5, [sp, #256] @ 0x100 │ │ stmia.w ip, {r0, r1, r2, r3} │ │ add r1, sp, #240 @ 0xf0 │ │ mov r3, r8 │ │ ldr r0, [r5, #12] │ │ ldr r2, [r0, #32] │ │ mov r0, r9 │ │ - bl 84988 │ │ + bl 849f0 │ │ ldrd r0, r1, [sp, #304] @ 0x130 │ │ eor.w r2, r0, #46 @ 0x2e │ │ orrs r2, r1 │ │ - beq.w 7f59e │ │ + beq.w 7f606 │ │ ldmia.w r4, {r2, r3, r5, r6} │ │ add.w ip, sp, #736 @ 0x2e0 │ │ strd r0, r1, [sp, #304] @ 0x130 │ │ stmia.w ip, {r2, r3, r5, r6} │ │ ldrd r0, r3, [sp, #744] @ 0x2e8 │ │ strd r0, r3, [r4, #8] │ │ ldrh.w r0, [sp, #320] @ 0x140 │ │ ldrd r1, r2, [sp, #736] @ 0x2e0 │ │ cmp r0, #113 @ 0x71 │ │ strd sl, fp, [sp, #248] @ 0xf8 │ │ strd r5, r6, [sp, #824] @ 0x338 │ │ strd r1, r2, [r4] │ │ - ble.n 7f38c │ │ + ble.n 7f3f4 │ │ movw r1, #8496 @ 0x2130 │ │ cmp r0, r1 │ │ - bgt.w 7f3ce │ │ + bgt.w 7f436 │ │ subs r0, #114 @ 0x72 │ │ cmp r0, #26 │ │ - bhi.n 7f2bc │ │ + bhi.n 7f324 │ │ tbb [pc, r0] │ │ ldrsb r4, [r3, r4] │ │ lsrs r7, r1, #24 │ │ lsrs r6, r1, #24 │ │ lsrs r6, r1, #24 │ │ lsrs r6, r1, #24 │ │ lsrs r6, r1, #24 │ │ @@ -131522,299 +131435,299 @@ │ │ lsrs r6, r1, #24 │ │ lsrs r6, r1, #24 │ │ lsrs r6, r1, #24 │ │ lsrs r6, r1, #24 │ │ lsrs r6, r1, #24 │ │ lsrs r6, r1, #24 │ │ lsls r2, r2, #2 │ │ - b.n 7f2bc │ │ + b.n 7f324 │ │ mov r0, r8 │ │ mov r1, r9 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldrd r0, r1, [sp, #176] @ 0xb0 │ │ eor.w r0, r0, #23 │ │ orrs r0, r1 │ │ itt eq │ │ ldreq r0, [sp, #184] @ 0xb8 │ │ streq r0, [sp, #728] @ 0x2d8 │ │ - b.n 7f2bc │ │ + b.n 7f324 │ │ mov r0, r8 │ │ mov r1, r9 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldrd r0, r1, [sp, #176] @ 0xb0 │ │ eor.w r0, r0, #28 │ │ orrs r0, r1 │ │ itt eq │ │ ldreq r0, [sp, #184] @ 0xb8 │ │ streq r0, [sp, #716] @ 0x2cc │ │ - b.n 7f2bc │ │ + b.n 7f324 │ │ subs r0, #3 │ │ cmp r0, #24 │ │ - bhi.w 7f2bc │ │ + bhi.w 7f324 │ │ tbb [pc, r0] │ │ lsrs r6, r1, #20 │ │ lsrs r5, r1, #20 │ │ lsrs r5, r1, #20 │ │ lsrs r5, r1, #20 │ │ lsrs r5, r1, #20 │ │ lsrs r5, r1, #20 │ │ tst r5, r1 │ │ lsrs r6, r2, #21 │ │ lsrs r5, r1, #20 │ │ lsrs r5, r1, #20 │ │ lsrs r5, r1, #20 │ │ lsrs r5, r1, #20 │ │ movs r5, r6 │ │ - b.n 7f2bc │ │ + b.n 7f324 │ │ mov r0, r8 │ │ mov r1, r9 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldr r0, [sp, #176] @ 0xb0 │ │ str r0, [sp, #156] @ 0x9c │ │ ldr r0, [sp, #180] @ 0xb4 │ │ str r0, [sp, #160] @ 0xa0 │ │ ldr r0, [sp, #184] @ 0xb8 │ │ str r0, [sp, #116] @ 0x74 │ │ ldr r0, [sp, #188] @ 0xbc │ │ str r0, [sp, #112] @ 0x70 │ │ - b.n 7f2bc │ │ + b.n 7f324 │ │ movw r1, #8497 @ 0x2131 │ │ cmp r0, r1 │ │ - beq.n 7f478 │ │ + beq.n 7f4e0 │ │ movw r1, #8498 @ 0x2132 │ │ cmp r0, r1 │ │ - beq.n 7f358 │ │ + beq.n 7f3c0 │ │ movw r1, #8499 @ 0x2133 │ │ cmp r0, r1 │ │ - bne.w 7f2bc │ │ + bne.w 7f324 │ │ mov r0, r8 │ │ mov r1, r9 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldrd r0, r1, [sp, #176] @ 0xb0 │ │ eor.w r0, r0, #11 │ │ orrs r0, r1 │ │ itt eq │ │ ldreq r0, [sp, #184] @ 0xb8 │ │ streq r0, [sp, #720] @ 0x2d0 │ │ - b.n 7f2bc │ │ + b.n 7f324 │ │ mov r0, r8 │ │ mov r1, r9 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldr r0, [sp, #176] @ 0xb0 │ │ str r0, [sp, #128] @ 0x80 │ │ ldr r0, [sp, #180] @ 0xb4 │ │ str r0, [sp, #124] @ 0x7c │ │ ldr r0, [sp, #184] @ 0xb8 │ │ str r0, [sp, #120] @ 0x78 │ │ ldr r0, [sp, #188] @ 0xbc │ │ str r0, [sp, #108] @ 0x6c │ │ - b.n 7f2bc │ │ + b.n 7f324 │ │ mov r0, r8 │ │ mov r1, r9 │ │ - bl 869d0 │ │ + bl 86a38 │ │ add r2, sp, #176 @ 0xb0 │ │ ldmia r2, {r0, r1, r2} │ │ eor.w r0, r0, #16 │ │ orrs r0, r1 │ │ ldr r1, [sp, #152] @ 0x98 │ │ it eq │ │ moveq r1, r2 │ │ clz r0, r0 │ │ str r1, [sp, #152] @ 0x98 │ │ ldr r1, [sp, #164] @ 0xa4 │ │ lsrs r0, r0, #5 │ │ orrs r1, r0 │ │ str r1, [sp, #164] @ 0xa4 │ │ - b.n 7f2bc │ │ + b.n 7f324 │ │ mov r0, r8 │ │ mov r1, r9 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldr r0, [sp, #176] @ 0xb0 │ │ str r0, [sp, #148] @ 0x94 │ │ ldr r0, [sp, #180] @ 0xb4 │ │ str r0, [sp, #144] @ 0x90 │ │ ldr r0, [sp, #184] @ 0xb8 │ │ str r0, [sp, #104] @ 0x68 │ │ ldr r0, [sp, #188] @ 0xbc │ │ str r0, [sp, #132] @ 0x84 │ │ - b.n 7f2bc │ │ + b.n 7f324 │ │ mov r0, r8 │ │ mov r1, r9 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldrd r0, r1, [sp, #176] @ 0xb0 │ │ eor.w r0, r0, #18 │ │ orrs r0, r1 │ │ itt eq │ │ ldreq r0, [sp, #184] @ 0xb8 │ │ streq r0, [sp, #724] @ 0x2d4 │ │ - b.n 7f2bc │ │ + b.n 7f324 │ │ ldrd r1, r0, [sp, #136] @ 0x88 │ │ orrs r0, r1 │ │ - bne.w 7f2bc │ │ + bne.w 7f324 │ │ mov r0, r8 │ │ mov r1, r9 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldrd r0, r1, [sp, #176] @ 0xb0 │ │ movs r2, #0 │ │ eor.w r0, r0, #45 @ 0x2d │ │ orrs r0, r1 │ │ - bne.n 7f4ac │ │ + bne.n 7f514 │ │ ldrd r0, r1, [sp, #184] @ 0xb8 │ │ str r1, [sp, #468] @ 0x1d4 │ │ strd r2, r0, [sp, #460] @ 0x1cc │ │ movs r0, #1 │ │ str r0, [sp, #140] @ 0x8c │ │ str r0, [sp, #456] @ 0x1c8 │ │ movs r0, #0 │ │ - b.n 7f4b0 │ │ + b.n 7f518 │ │ movs r0, #0 │ │ str r0, [sp, #140] @ 0x8c │ │ str r0, [sp, #136] @ 0x88 │ │ - b.n 7f2bc │ │ + b.n 7f324 │ │ movs r0, #0 │ │ movs r5, #0 │ │ str r0, [sp, #132] @ 0x84 │ │ movs r0, #46 @ 0x2e │ │ str r0, [sp, #148] @ 0x94 │ │ movs r6, #46 @ 0x2e │ │ mov.w r8, #0 │ │ movs r0, #0 │ │ str r0, [sp, #144] @ 0x90 │ │ movs r0, #46 @ 0x2e │ │ str r0, [sp, #156] @ 0x9c │ │ movs r0, #0 │ │ str r0, [sp, #160] @ 0xa0 │ │ ldr r0, [r4, #20] │ │ - cbnz r0, 7f4e0 │ │ + cbnz r0, 7f548 │ │ ldr r0, [sp, #240] @ 0xf0 │ │ movs r2, #1 │ │ ldr r1, [r4, #0] │ │ subs r0, r0, r1 │ │ strd r2, r0, [r4, #20] │ │ add r3, sp, #816 @ 0x330 │ │ add.w ip, sp, #736 @ 0x2e0 │ │ ldr r4, [sp, #156] @ 0x9c │ │ mov.w r9, #0 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r0, r1, r2, r3} │ │ eor.w r0, r4, #46 @ 0x2e │ │ ldr r1, [sp, #160] @ 0xa0 │ │ orrs r0, r1 │ │ - bne.n 7f4fe │ │ - b.n 7f52a │ │ + bne.n 7f566 │ │ + b.n 7f592 │ │ ldr r0, [sp, #116] @ 0x74 │ │ str r0, [sp, #760] @ 0x2f8 │ │ ldr r0, [sp, #112] @ 0x70 │ │ str r0, [sp, #764] @ 0x2fc │ │ add r0, sp, #752 @ 0x2f0 │ │ str r1, [sp, #756] @ 0x2f4 │ │ ldr r3, [sp, #716] @ 0x2cc │ │ ldrb.w r2, [sp, #673] @ 0x2a1 │ │ ldr r1, [sp, #172] @ 0xac │ │ str r0, [sp, #0] │ │ add r0, sp, #368 @ 0x170 │ │ str r4, [sp, #752] @ 0x2f0 │ │ - bl 82b38 │ │ + bl 82ba0 │ │ ldrb.w r0, [sp, #368] @ 0x170 │ │ ldrd r1, r4, [sp, #372] @ 0x174 │ │ cmp r0, #82 @ 0x52 │ │ it eq │ │ moveq r9, r1 │ │ ldr r1, [sp, #120] @ 0x78 │ │ eor.w r0, r6, #46 @ 0x2e │ │ lsls r5, r5, #31 │ │ orrs.w r0, r0, r8 │ │ strd r9, r4, [sp, #688] @ 0x2b0 │ │ - bne.n 7f550 │ │ + bne.n 7f5b8 │ │ mov.w fp, #0 │ │ str.w fp, [sp, #696] @ 0x2b8 │ │ - cbnz r5, 7f588 │ │ + cbnz r5, 7f5f0 │ │ mov.w sl, #47 @ 0x2f │ │ movs r0, #0 │ │ str r0, [sp, #164] @ 0xa4 │ │ - b.n 7f5f2 │ │ + b.n 7f65a │ │ strd r1, fp, [sp, #776] @ 0x308 │ │ add r0, sp, #768 @ 0x300 │ │ ldr r3, [sp, #716] @ 0x2cc │ │ ldrb.w r2, [sp, #673] @ 0x2a1 │ │ ldr r1, [sp, #172] @ 0xac │ │ str r0, [sp, #0] │ │ add r0, sp, #368 @ 0x170 │ │ strd r6, r8, [sp, #768] @ 0x300 │ │ - bl 82b38 │ │ + bl 82ba0 │ │ ldrb.w r0, [sp, #368] @ 0x170 │ │ movs r1, #0 │ │ ldr.w r8, [sp, #376] @ 0x178 │ │ ldr.w fp, [sp, #372] @ 0x174 │ │ cmp r0, #82 @ 0x52 │ │ str.w r8, [sp, #700] @ 0x2bc │ │ it ne │ │ movne fp, r1 │ │ str.w fp, [sp, #696] @ 0x2b8 │ │ - cbz r5, 7f5e6 │ │ + cbz r5, 7f64e │ │ ldr r0, [sp, #172] @ 0xac │ │ ldr r2, [sp, #152] @ 0x98 │ │ ldrd r1, r0, [r0, #32] │ │ cmp r0, r2 │ │ - bcs.w 7f70c │ │ + bcs.w 7f774 │ │ movs r0, #0 │ │ mov.w r8, #19 │ │ - b.n 7f79a │ │ + b.n 7f802 │ │ ldmia.w r4, {r0, r1, r2, r3} │ │ add.w ip, sp, #736 @ 0x2e0 │ │ movs r6, #0 │ │ ldr r4, [sp, #168] @ 0xa8 │ │ movs r5, #2 │ │ stmia.w ip, {r0, r1, r2, r3} │ │ add.w ip, r4, #8 │ │ strd r5, r6, [r4] │ │ stmia.w ip, {r0, r1, r2, r3} │ │ - b.n 7f7aa │ │ + b.n 7f812 │ │ ldr r4, [sp, #256] @ 0x100 │ │ ldrd r8, r6, [sp, #124] @ 0x7c │ │ ldrd r5, sl, [sp, #164] @ 0xa4 │ │ ldr.w fp, [sp, #108] @ 0x6c │ │ ldr r0, [r4, #20] │ │ cmp r0, #0 │ │ - beq.w 7f4d4 │ │ - b.n 7f4e0 │ │ + beq.w 7f53c │ │ + b.n 7f548 │ │ movs r0, #69 @ 0x45 │ │ strb.w r0, [sl, #8] │ │ movs r0, #0 │ │ movs r1, #2 │ │ strd r1, r0, [sl] │ │ - b.n 7f7aa │ │ + b.n 7f812 │ │ movs r0, #0 │ │ mov.w sl, #47 @ 0x2f │ │ str r0, [sp, #164] @ 0xa4 │ │ mov.w fp, #0 │ │ ldrd r0, r1, [sp, #472] @ 0x1d8 │ │ eor.w r0, r0, #47 @ 0x2f │ │ orrs r0, r1 │ │ - beq.n 7f62e │ │ + beq.n 7f696 │ │ ldr r0, [sp, #568] @ 0x238 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #572] @ 0x23c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #580] @ 0x244 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #584] @ 0x248 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #592] @ 0x250 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #596] @ 0x254 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #604] @ 0x25c │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #608] @ 0x260 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ movs r0, #0 │ │ add r1, sp, #816 @ 0x330 │ │ str r0, [sp, #492] @ 0x1ec │ │ movs r0, #46 @ 0x2e │ │ str r0, [sp, #488] @ 0x1e8 │ │ add r0, sp, #456 @ 0x1c8 │ │ strd r9, r4, [sp, #480] @ 0x1e0 │ │ @@ -131878,74 +131791,74 @@ │ │ str r4, [sp, #600] @ 0x258 │ │ ldr r4, [sp, #76] @ 0x4c │ │ str r4, [sp, #596] @ 0x254 │ │ ldr r0, [sp, #168] @ 0xa8 │ │ ldr r4, [sp, #68] @ 0x44 │ │ ldr r5, [sp, #808] @ 0x328 │ │ strd r5, r4, [sp, #588] @ 0x24c │ │ - beq.n 7f6f8 │ │ + beq.n 7f760 │ │ and.w r1, r2, #63 @ 0x3f │ │ cmp r1, #12 │ │ - beq.n 7f73a │ │ - cbnz r2, 7f6f8 │ │ + beq.n 7f7a2 │ │ + cbnz r2, 7f760 │ │ ldr r1, [sp, #104] @ 0x68 │ │ ldr r6, [sp, #132] @ 0x84 │ │ strd r1, r6, [sp, #704] @ 0x2c0 │ │ add r1, sp, #456 @ 0x1c8 │ │ mov.w r2, #280 @ 0x118 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add.w sp, sp, #932 @ 0x3a4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ subs r3, r0, r2 │ │ adds r6, r1, r2 │ │ cmp r3, #3 │ │ - bhi.n 7f71c │ │ + bhi.n 7f784 │ │ lsrs r2, r6, #8 │ │ mov.w r8, #19 │ │ - b.n 7f786 │ │ + b.n 7f7ee │ │ mov r1, r6 │ │ ldrb.w ip, [sp, #672] @ 0x2a0 │ │ ldr.w r0, [r1], #4 │ │ subs r2, r3, #4 │ │ cmn.w r0, #16 │ │ - bcc.n 7f74c │ │ + bcc.n 7f7b4 │ │ adds r5, r0, #1 │ │ - beq.n 7f778 │ │ + beq.n 7f7e0 │ │ mov.w r8, #16 │ │ movs r2, #0 │ │ - b.n 7f786 │ │ + b.n 7f7ee │ │ ldr r2, [sp, #172] @ 0xac │ │ ldr r1, [sp, #720] @ 0x2d0 │ │ ldrd r4, r2, [r2, #8] │ │ cmp r2, r1 │ │ - bcs.n 7f766 │ │ + bcs.n 7f7ce │ │ movs r1, #0 │ │ movs r2, #19 │ │ - b.n 7f776 │ │ + b.n 7f7de │ │ movs r5, #4 │ │ mov r3, r0 │ │ cmp r2, r3 │ │ it cs │ │ cmpcs r3, #1 │ │ - bhi.w 7f896 │ │ + bhi.w 7f8fe │ │ str r1, [sp, #864] @ 0x360 │ │ mov.w r8, #19 │ │ movs r0, #0 │ │ mov r6, r1 │ │ - b.n 7f798 │ │ + b.n 7f800 │ │ ldrb.w r3, [sp, #672] @ 0x2a0 │ │ ldr r6, [sp, #104] @ 0x68 │ │ umull r6, r5, r6, r3 │ │ cmp r5, #0 │ │ - beq.n 7f81a │ │ + beq.n 7f882 │ │ movs r2, #56 @ 0x38 │ │ - b.n 7f842 │ │ + b.n 7f8aa │ │ cmp r2, #7 │ │ - bhi.w 7f866 │ │ + bhi.w 7f8ce │ │ lsrs r2, r1, #8 │ │ mov.w r8, #19 │ │ mov r6, r1 │ │ movs r0, #0 │ │ str.w r2, [sp, #865] @ 0x361 │ │ strb.w r0, [sp, #871] @ 0x367 │ │ strh.w r0, [sp, #869] @ 0x365 │ │ @@ -131958,429 +131871,429 @@ │ │ strd r1, r0, [sl, #16] │ │ ldr r0, [sp, #712] @ 0x2c8 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 7f7b0 │ │ + bne.n 7f818 │ │ cmp r1, #1 │ │ - bne.n 7f7cc │ │ + bne.n 7f834 │ │ dmb ish │ │ ldr r0, [sp, #712] @ 0x2c8 │ │ - bl 801a6 │ │ + bl 8020e │ │ ldrd r0, r1, [sp, #472] @ 0x1d8 │ │ eor.w r0, r0, #47 @ 0x2f │ │ orrs r0, r1 │ │ - beq.n 7f810 │ │ + beq.n 7f878 │ │ ldr r0, [sp, #568] @ 0x238 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #572] @ 0x23c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #580] @ 0x244 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #584] @ 0x248 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #592] @ 0x250 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #596] @ 0x254 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #604] @ 0x25c │ │ - cbz r0, 7f810 │ │ + cbz r0, 7f878 │ │ ldr r0, [sp, #608] @ 0x260 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add.w sp, sp, #932 @ 0x3a4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ add.w sp, sp, #932 @ 0x3a4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ subs r5, r2, r1 │ │ add r4, r1 │ │ cmp r5, r6 │ │ - bcc.n 7f746 │ │ + bcc.n 7f7ae │ │ sub.w r8, r3, #1 │ │ movs r2, #25 │ │ cmp.w r8, #7 │ │ - bhi.w 7f95a │ │ + bhi.w 7f9c2 │ │ add r4, r6 │ │ sub.w ip, r5, r6 │ │ tbb [pc, r8] │ │ ldrsh r0, [r2, r0] │ │ ldrsb r4, [r0, r4] │ │ lsls r4, r0, #16 │ │ str r4, [r0, #80] @ 0x50 │ │ uxtb r3, r3 │ │ movs r6, #0 │ │ movs r5, #2 │ │ orr.w r2, r2, r3, lsl #8 │ │ strd r5, r6, [r0] │ │ strd r2, r4, [r0, #8] │ │ strd r4, r1, [r0, #16] │ │ - b.n 7f7aa │ │ + b.n 7f812 │ │ cmp r5, r6 │ │ - bne.n 7f934 │ │ + bne.n 7f99c │ │ movs r1, #0 │ │ movs r2, #19 │ │ movs r3, #1 │ │ - b.n 7f842 │ │ + b.n 7f8aa │ │ ldrb r5, [r6, #11] │ │ ldr.w r2, [r6, #7] │ │ lsls r5, r5, #24 │ │ orrs.w r5, r5, r2, lsr #8 │ │ - bne.n 7f8e2 │ │ + bne.n 7f94a │ │ ldrb r5, [r1, #2] │ │ lsls r2, r2, #24 │ │ ldrh r1, [r1, #0] │ │ orr.w r1, r1, r5, lsl #16 │ │ movs r5, #8 │ │ orrs r1, r2 │ │ sub.w r2, r3, #12 │ │ mov r3, r1 │ │ add.w r1, r6, #12 │ │ cmp r2, r3 │ │ it cs │ │ cmpcs r3, #1 │ │ - bls.w 7f75a │ │ + bls.w 7f7c2 │ │ ldrh.w lr, [r1] │ │ sub.w r2, lr, #6 │ │ cmn.w r2, #5 │ │ - bhi.n 7f8b0 │ │ + bhi.n 7f918 │ │ movs r0, #0 │ │ mov.w r8, #17 │ │ strd lr, r0, [sp, #864] @ 0x360 │ │ - b.n 7f798 │ │ + b.n 7f800 │ │ adds r6, r1, #2 │ │ subs r2, r3, #2 │ │ cmp.w lr, #4 │ │ - bls.n 7f9a8 │ │ - cbz r2, 7f918 │ │ + bls.n 7fa10 │ │ + cbz r2, 7f980 │ │ ldrb.w ip, [r1, #2] │ │ cmp.w ip, #8 │ │ - bhi.n 7f98e │ │ + bhi.n 7f9f6 │ │ movs r2, #1 │ │ lsl.w r2, r2, ip │ │ tst.w r2, #278 @ 0x116 │ │ - beq.n 7f98e │ │ + beq.n 7f9f6 │ │ cmp r3, #3 │ │ - bne.n 7f91e │ │ + bne.n 7f986 │ │ adds r6, r1, #3 │ │ str r6, [sp, #864] @ 0x360 │ │ mov.w r8, #19 │ │ movs r0, #0 │ │ - b.n 7f798 │ │ + b.n 7f800 │ │ mov.w r8, #56 @ 0x38 │ │ - b.n 7f736 │ │ + b.n 7f79e │ │ cmp.w ip, #4 │ │ - bcs.n 7f92e │ │ + bcs.n 7f996 │ │ movs r1, #0 │ │ movs r2, #19 │ │ movs r3, #4 │ │ - b.n 7f842 │ │ + b.n 7f8aa │ │ cmp.w ip, #2 │ │ - bcs.n 7f93a │ │ + bcs.n 7f9a2 │ │ movs r1, #0 │ │ movs r2, #19 │ │ movs r3, #2 │ │ - b.n 7f842 │ │ + b.n 7f8aa │ │ cmp.w ip, #7 │ │ - bhi.n 7f940 │ │ + bhi.n 7f9a8 │ │ movs r1, #0 │ │ movs r2, #19 │ │ movs r3, #8 │ │ - b.n 7f842 │ │ + b.n 7f8aa │ │ movs r6, #6 │ │ - b.w 7f0fa │ │ + b.w 7f162 │ │ mov.w r8, #19 │ │ - b.n 7f996 │ │ + b.n 7f9fe │ │ subs r2, r3, #4 │ │ str r2, [sp, #876] @ 0x36c │ │ ldrb r1, [r1, #3] │ │ cmp r1, #0 │ │ - beq.n 7f9a6 │ │ + beq.n 7fa0e │ │ mov.w r8, #68 @ 0x44 │ │ - b.n 7f798 │ │ + b.n 7f800 │ │ ldr r1, [r4, #0] │ │ movs r6, #0 │ │ - b.n 7f6f4 │ │ + b.n 7f75c │ │ ldrb r1, [r4, #0] │ │ movs r6, #0 │ │ - b.n 7f6f4 │ │ + b.n 7f75c │ │ ldrh r1, [r4, #0] │ │ movs r6, #0 │ │ - b.n 7f6f4 │ │ + b.n 7f75c │ │ ldr.w r1, [r4, #3] │ │ ldrb r2, [r4, #7] │ │ ldrb r3, [r4, #2] │ │ ldrh r5, [r4, #0] │ │ lsrs r6, r1, #8 │ │ orr.w r6, r6, r2, lsl #24 │ │ orr.w r2, r5, r3, lsl #16 │ │ orr.w r1, r2, r1, lsl #24 │ │ - b.n 7f6f4 │ │ - b.n 7f842 │ │ + b.n 7f75c │ │ + b.n 7f8aa │ │ movs r0, #13 │ │ mov r4, sl │ │ ldr.w fp, [sp, #132] @ 0x84 │ │ - b.w 7f112 │ │ + b.w 7f17a │ │ ldr r4, [sp, #136] @ 0x88 │ │ mov r6, lr │ │ ldr.w r8, [sp, #128] @ 0x80 │ │ - b.w 7f130 │ │ + b.w 7f198 │ │ mov sl, r0 │ │ ldr r4, [sp, #136] @ 0x88 │ │ ldr.w r8, [sp, #128] @ 0x80 │ │ - b.w 7f138 │ │ - ldr r3, [pc, #876] @ (7fcf0 ) │ │ + b.w 7f1a0 │ │ + ldr r3, [pc, #876] @ (7fd58 ) │ │ add r3, pc │ │ movs r0, #0 │ │ movs r2, #5 │ │ - bl 3f9a8 │ │ - b.n 7fd08 │ │ + bl 3fcb0 │ │ + b.n 7fd70 │ │ mov.w r0, ip, lsl #8 │ │ add.w r8, r0, #25 │ │ str r6, [sp, #864] @ 0x360 │ │ movs r0, #0 │ │ - b.n 7f798 │ │ + b.n 7f800 │ │ movs r0, #19 │ │ mov r4, r3 │ │ mov fp, r3 │ │ - b.w 7f10e │ │ + b.w 7f176 │ │ adds r6, #2 │ │ cmn.w r0, #16 │ │ - bcc.n 7f9e0 │ │ + bcc.n 7fa48 │ │ cmp r2, #8 │ │ - bcc.n 7f9e4 │ │ + bcc.n 7fa4c │ │ ldrb r1, [r6, #7] │ │ ldr.w r0, [r6, #3] │ │ str r3, [sp, #160] @ 0xa0 │ │ add.w r3, r6, #8 │ │ lsls r1, r1, #24 │ │ str r3, [sp, #60] @ 0x3c │ │ orrs.w r1, r1, r0, lsr #8 │ │ str r3, [sp, #872] @ 0x368 │ │ - bne.n 7fa4c │ │ + bne.n 7fab4 │ │ ldrb r1, [r6, #2] │ │ lsls r0, r0, #24 │ │ ldrh r3, [r6, #0] │ │ ldr r6, [sp, #60] @ 0x3c │ │ orr.w r1, r3, r1, lsl #16 │ │ ldr r3, [sp, #160] @ 0xa0 │ │ orrs r0, r1 │ │ sub.w r1, r2, #8 │ │ - b.n 7f9f8 │ │ + b.n 7fa60 │ │ cmp r2, #4 │ │ - bcs.n 7f9f0 │ │ + bcs.n 7fa58 │ │ movs r0, #0 │ │ mov.w r8, #19 │ │ strd r6, r0, [sp, #864] @ 0x360 │ │ - b.n 7f798 │ │ + b.n 7f800 │ │ ldr.w r0, [r6], #4 │ │ subs r1, r2, #4 │ │ str r6, [sp, #872] @ 0x368 │ │ cmp r1, r0 │ │ - bcs.n 7fa08 │ │ + bcs.n 7fa70 │ │ movs r0, #0 │ │ mov.w r8, #19 │ │ strd r6, r0, [sp, #864] @ 0x360 │ │ - b.n 7fada │ │ + b.n 7fb42 │ │ str r1, [sp, #56] @ 0x38 │ │ - cbz r0, 7fa52 │ │ + cbz r0, 7faba │ │ str r6, [sp, #60] @ 0x3c │ │ ldrb.w r2, [r6], #1 │ │ str r0, [sp, #156] @ 0x9c │ │ subs r0, #1 │ │ str r3, [sp, #160] @ 0xa0 │ │ strd r5, ip, [sp, #136] @ 0x88 │ │ str r4, [sp, #52] @ 0x34 │ │ str.w r8, [sp, #128] @ 0x80 │ │ str r0, [sp, #876] @ 0x36c │ │ str r2, [sp, #124] @ 0x7c │ │ - cbz r2, 7fa5e │ │ + cbz r2, 7fac6 │ │ cmp.w lr, #4 │ │ str.w lr, [sp, #164] @ 0xa4 │ │ - bcc.n 7fa64 │ │ + bcc.n 7facc │ │ cmp r0, #0 │ │ - beq.n 7facc │ │ + beq.n 7fb34 │ │ ldr r0, [sp, #156] @ 0x9c │ │ ldr r1, [sp, #60] @ 0x3c │ │ subs r0, #2 │ │ str r0, [sp, #876] @ 0x36c │ │ ldrb r2, [r1, #1] │ │ str r2, [sp, #120] @ 0x78 │ │ cmp r2, #0 │ │ - beq.n 7fac4 │ │ + beq.n 7fb2c │ │ ldr r1, [sp, #60] @ 0x3c │ │ adds r6, r1, #2 │ │ - b.n 7fa68 │ │ + b.n 7fad0 │ │ mov.w r8, #56 @ 0x38 │ │ - b.n 7f9ea │ │ + b.n 7fa52 │ │ movs r0, #0 │ │ mov.w r8, #19 │ │ strd r6, r0, [sp, #864] @ 0x360 │ │ - b.n 7fada │ │ + b.n 7fb42 │ │ mov.w r8, #28 │ │ - b.n 7fad6 │ │ + b.n 7fb3e │ │ movs r1, #1 │ │ str r1, [sp, #120] @ 0x78 │ │ - cbz r0, 7facc │ │ + cbz r0, 7fb34 │ │ mov r1, r6 │ │ cmp r0, #1 │ │ ldrb.w r2, [r1], #1 │ │ str r1, [sp, #872] @ 0x368 │ │ - bne.n 7fa84 │ │ + bne.n 7faec │ │ movs r0, #0 │ │ str r1, [sp, #864] @ 0x360 │ │ str r0, [sp, #868] @ 0x364 │ │ mov.w r8, #19 │ │ mov r6, r1 │ │ - b.n 7fad6 │ │ + b.n 7fb3e │ │ subs r1, r0, #2 │ │ str r1, [sp, #876] @ 0x36c │ │ - beq.n 7faca │ │ + beq.n 7fb32 │ │ ldrb r1, [r6, #1] │ │ ldrb r5, [r6, #2] │ │ str r1, [sp, #116] @ 0x74 │ │ adds r1, r6, #3 │ │ str r1, [sp, #872] @ 0x368 │ │ str r5, [sp, #112] @ 0x70 │ │ - cbz r5, 7faee │ │ + cbz r5, 7fb56 │ │ cmp r2, #0 │ │ it ne │ │ movne r2, #1 │ │ cmp r0, #3 │ │ str r2, [sp, #108] @ 0x6c │ │ - beq.n 7fa76 │ │ + beq.n 7fade │ │ subs r1, r0, #4 │ │ str r1, [sp, #876] @ 0x36c │ │ ldrb r3, [r6, #3] │ │ str r3, [sp, #100] @ 0x64 │ │ - cbz r3, 7faf4 │ │ + cbz r3, 7fb5c │ │ adds r2, r6, #4 │ │ str r2, [sp, #96] @ 0x60 │ │ ldr r2, [sp, #100] @ 0x64 │ │ subs r2, #1 │ │ uxtb r2, r2 │ │ cmp r1, r2 │ │ str r2, [sp, #92] @ 0x5c │ │ - bcs.n 7fafa │ │ + bcs.n 7fb62 │ │ movs r0, #0 │ │ ldr r6, [sp, #96] @ 0x60 │ │ - b.n 7face │ │ + b.n 7fb36 │ │ mov.w r8, #29 │ │ - b.n 7fad6 │ │ + b.n 7fb3e │ │ adds r6, #2 │ │ movs r0, #0 │ │ str r0, [sp, #868] @ 0x364 │ │ str r6, [sp, #864] @ 0x360 │ │ mov.w r8, #19 │ │ ldr.w sl, [sp, #168] @ 0xa8 │ │ ldr r0, [sp, #868] @ 0x364 │ │ - b.n 7f798 │ │ + b.n 7f800 │ │ add r0, sp, #456 @ 0x1c8 │ │ movs r1, #32 │ │ add.w r4, r0, #8 │ │ movs r0, #4 │ │ - bl 3de2a │ │ - b.n 7fd08 │ │ + bl 3e132 │ │ + b.n 7fd70 │ │ mov.w r8, #30 │ │ - b.n 7fad6 │ │ + b.n 7fb3e │ │ mov.w r8, #31 │ │ - b.n 7fad6 │ │ + b.n 7fb3e │ │ ldr r3, [sp, #92] @ 0x5c │ │ movs r5, #8 │ │ ldr r2, [sp, #96] @ 0x60 │ │ subs r1, r1, r3 │ │ str r1, [sp, #876] @ 0x36c │ │ add r2, r3 │ │ movs r3, #0 │ │ str r3, [sp, #888] @ 0x378 │ │ strd r3, r5, [sp, #880] @ 0x370 │ │ ldr r3, [sp, #164] @ 0xa4 │ │ str r2, [sp, #872] @ 0x368 │ │ cmp r3, #4 │ │ - bhi.n 7fb90 │ │ + bhi.n 7fbf8 │ │ cmp r1, #0 │ │ - beq.w 7fc60 │ │ + beq.w 7fcc8 │ │ adds r3, r6, r0 │ │ add r6, sp, #880 @ 0x370 │ │ movs r4, #0 │ │ movs r0, #8 │ │ movs r5, #0 │ │ str.w r8, [sp, #48] @ 0x30 │ │ mov r8, r2 │ │ mov.w sl, #0 │ │ ldrb.w r2, [r8, sl] │ │ - cbz r2, 7fb44 │ │ + cbz r2, 7fbac │ │ add.w sl, sl, #1 │ │ add.w r2, r8, sl │ │ cmp r2, r3 │ │ - bne.n 7fb30 │ │ - b.n 7fc40 │ │ + bne.n 7fb98 │ │ + b.n 7fca8 │ │ mvn.w r2, sl │ │ add r1, r2 │ │ str r1, [sp, #876] @ 0x36c │ │ add.w r1, r8, sl │ │ adds r1, #1 │ │ cmp.w sl, #0 │ │ str r1, [sp, #872] @ 0x368 │ │ - beq.w 7fed2 │ │ + beq.w 7ff3a │ │ ldr r1, [sp, #880] @ 0x370 │ │ cmp r5, r1 │ │ - bne.n 7fb6a │ │ + bne.n 7fbd2 │ │ mov r0, r6 │ │ - bl 8b79c │ │ + bl 8b808 │ │ ldr r0, [sp, #884] @ 0x374 │ │ lsls r1, r5, #4 │ │ movs r2, #31 │ │ str r2, [r0, r1] │ │ add.w r1, r0, r5, lsl #4 │ │ adds r1, #4 │ │ stmia.w r1, {r4, r8, sl} │ │ adds r5, #1 │ │ ldrd r2, r1, [sp, #872] @ 0x368 │ │ cmp r1, #0 │ │ str r5, [sp, #888] @ 0x378 │ │ add.w r3, r2, r1 │ │ str.w r8, [sp, #48] @ 0x30 │ │ - bne.n 7fb26 │ │ - b.n 7fc60 │ │ + bne.n 7fb8e │ │ + b.n 7fcc8 │ │ add r0, sp, #368 @ 0x170 │ │ add r1, sp, #872 @ 0x368 │ │ - bl 8b3d8 │ │ + bl 8b444 │ │ ldrb.w r0, [sp, #368] @ 0x170 │ │ cmp r0, #82 @ 0x52 │ │ - bne.n 7fc44 │ │ + bne.n 7fcac │ │ ldr r0, [sp, #372] @ 0x174 │ │ add r1, sp, #872 @ 0x368 │ │ str r0, [sp, #80] @ 0x50 │ │ ldr r0, [sp, #376] @ 0x178 │ │ str r0, [sp, #88] @ 0x58 │ │ ldr r0, [sp, #380] @ 0x17c │ │ str r0, [sp, #84] @ 0x54 │ │ add r0, sp, #368 @ 0x170 │ │ - bl 8b64c │ │ + bl 8b6b8 │ │ ldrb.w r0, [sp, #368] @ 0x170 │ │ cmp r0, #82 @ 0x52 │ │ - bne.n 7fc7c │ │ + bne.n 7fce4 │ │ ldrd r0, r6, [sp, #376] @ 0x178 │ │ str r0, [sp, #68] @ 0x44 │ │ orrs r0, r6 │ │ - beq.n 7fcaa │ │ + beq.n 7fd12 │ │ ldrd r1, r0, [sp, #136] @ 0x88 │ │ movs r4, #0 │ │ mov.w fp, #8 │ │ mov.w sl, #0 │ │ orr.w r0, r0, r1, lsl #8 │ │ add.w r0, r0, #327680 @ 0x50000 │ │ str r0, [sp, #64] @ 0x40 │ │ - b.n 7fc08 │ │ + b.n 7fc70 │ │ ldr.w fp, [sp, #884] @ 0x374 │ │ lsls r0, r4, #4 │ │ ldr r1, [sp, #48] @ 0x30 │ │ str.w r8, [fp, r0] │ │ add.w r0, fp, r4, lsl #4 │ │ mov r4, r5 │ │ str r1, [r0, #4] │ │ @@ -132388,150 +132301,150 @@ │ │ str r1, [r0, #8] │ │ ldr r1, [sp, #72] @ 0x48 │ │ str r1, [r0, #12] │ │ ldr r0, [sp, #68] @ 0x44 │ │ str r5, [sp, #888] @ 0x378 │ │ subs r0, r5, r0 │ │ sbcs.w r0, sl, r6 │ │ - bcs.n 7fcc2 │ │ + bcs.n 7fd2a │ │ adds r5, r4, #1 │ │ adc.w sl, sl, #0 │ │ ldr r0, [sp, #84] @ 0x54 │ │ add r1, sp, #872 @ 0x368 │ │ ldr r2, [sp, #64] @ 0x40 │ │ ldr r3, [sp, #88] @ 0x58 │ │ str r0, [sp, #0] │ │ add r0, sp, #368 @ 0x170 │ │ - bl 8b70c │ │ + bl 8b778 │ │ ldrd r8, r1, [sp, #376] @ 0x178 │ │ ldr r0, [sp, #368] @ 0x170 │ │ str r1, [sp, #48] @ 0x30 │ │ ldr r1, [sp, #384] @ 0x180 │ │ str r1, [sp, #76] @ 0x4c │ │ lsls r0, r0, #31 │ │ ldr r1, [sp, #388] @ 0x184 │ │ str r1, [sp, #72] @ 0x48 │ │ - bne.n 7fcb8 │ │ + bne.n 7fd20 │ │ ldr r0, [sp, #880] @ 0x370 │ │ cmp r0, r4 │ │ - bne.n 7fbe4 │ │ + bne.n 7fc4c │ │ add r0, sp, #880 @ 0x370 │ │ - bl 8b79c │ │ - b.n 7fbe0 │ │ + bl 8b808 │ │ + b.n 7fc48 │ │ mov r2, r8 │ │ - b.n 7fc60 │ │ + b.n 7fcc8 │ │ ldrb.w r1, [sp, #371] @ 0x173 │ │ ldrh.w r2, [sp, #369] @ 0x171 │ │ ldr r3, [sp, #380] @ 0x17c │ │ orr.w r1, r2, r1, lsl #16 │ │ ldrd r6, r5, [sp, #372] @ 0x174 │ │ orr.w r8, r0, r1, lsl #8 │ │ strd r5, r3, [sp, #864] @ 0x360 │ │ - b.n 7fad6 │ │ + b.n 7fb3e │ │ movs r0, #0 │ │ mov.w r8, #19 │ │ str r0, [sp, #80] @ 0x50 │ │ strd r2, r0, [sp, #864] @ 0x360 │ │ movs r0, #2 │ │ str r0, [sp, #88] @ 0x58 │ │ ldr r0, [sp, #880] @ 0x370 │ │ - cbz r0, 7fc98 │ │ + cbz r0, 7fd00 │ │ ldr r0, [sp, #884] @ 0x374 │ │ - blx d87c0 │ │ - b.n 7fc98 │ │ + blx d87d0 │ │ + b.n 7fd00 │ │ ldrb.w r1, [sp, #371] @ 0x173 │ │ ldrh.w r2, [sp, #369] @ 0x171 │ │ ldr r3, [sp, #380] @ 0x17c │ │ orr.w r1, r2, r1, lsl #16 │ │ ldrd r5, r6, [sp, #372] @ 0x174 │ │ str r5, [sp, #48] @ 0x30 │ │ orr.w r8, r0, r1, lsl #8 │ │ strd r6, r3, [sp, #864] @ 0x360 │ │ ldr r0, [sp, #80] @ 0x50 │ │ - cbz r0, 7fca2 │ │ + cbz r0, 7fd0a │ │ ldr r0, [sp, #88] @ 0x58 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr.w sl, [sp, #168] @ 0xa8 │ │ ldr r6, [sp, #48] @ 0x30 │ │ - b.n 7fada │ │ + b.n 7fb42 │ │ movs r1, #0 │ │ movs r0, #8 │ │ str r1, [sp, #904] @ 0x388 │ │ str r1, [sp, #64] @ 0x40 │ │ strd r1, r0, [sp, #896] @ 0x380 │ │ - b.n 7fd0e │ │ + b.n 7fd76 │ │ ldr r0, [sp, #72] @ 0x48 │ │ str r0, [sp, #868] @ 0x364 │ │ ldr r0, [sp, #76] @ 0x4c │ │ str r0, [sp, #864] @ 0x360 │ │ - b.n 7fc70 │ │ + b.n 7fcd8 │ │ mov.w fp, #0 │ │ movs r0, #0 │ │ movs r1, #8 │ │ str r0, [sp, #904] @ 0x388 │ │ strd r0, r1, [sp, #896] @ 0x380 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ cmp r0, #5 │ │ - bcs.n 7fd0a │ │ + bcs.n 7fd72 │ │ movs r0, #0 │ │ cmp.w r9, #0 │ │ str r0, [sp, #28] │ │ - beq.w 7fede │ │ + beq.w 7ff46 │ │ mov.w sl, #31 │ │ strd r0, r0, [sp, #920] @ 0x398 │ │ strd r0, r0, [sp, #912] @ 0x390 │ │ - b.n 7fee2 │ │ - add r5, sp, #584 @ 0x248 │ │ + b.n 7ff4a │ │ + add r5, sp, #232 @ 0xe8 │ │ movs r5, r0 │ │ - ldr r2, [pc, #928] @ (80098 ) │ │ + ldr r2, [pc, #928] @ (80100 ) │ │ add r2, pc │ │ movs r1, #5 │ │ - bl 3fa74 │ │ - b.n 7fd08 │ │ + bl 3fd7c │ │ + b.n 7fd70 │ │ movs r0, #8 │ │ movs r1, #80 @ 0x50 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ udf #254 @ 0xfe │ │ str.w fp, [sp, #64] @ 0x40 │ │ add r0, sp, #368 @ 0x170 │ │ add r1, sp, #872 @ 0x368 │ │ - bl 8b3d8 │ │ + bl 8b444 │ │ ldrb.w r0, [sp, #368] @ 0x170 │ │ cmp r0, #82 @ 0x52 │ │ - bne.w 7fe20 │ │ + bne.w 7fe88 │ │ ldr r0, [sp, #372] @ 0x174 │ │ add r1, sp, #872 @ 0x368 │ │ str r0, [sp, #68] @ 0x44 │ │ ldr r0, [sp, #376] @ 0x178 │ │ str r0, [sp, #76] @ 0x4c │ │ ldr r0, [sp, #380] @ 0x17c │ │ str r0, [sp, #72] @ 0x48 │ │ add r0, sp, #368 @ 0x170 │ │ - bl 8b64c │ │ + bl 8b6b8 │ │ ldrb.w r0, [sp, #368] @ 0x170 │ │ cmp r0, #82 @ 0x52 │ │ - bne.w 7fe40 │ │ + bne.w 7fea8 │ │ ldrd r0, r1, [sp, #376] @ 0x178 │ │ strd r1, r0, [sp, #16] │ │ orrs r0, r1 │ │ - beq.w 7fe5e │ │ + beq.w 7fec6 │ │ ldrd r1, r0, [sp, #136] @ 0x88 │ │ orr.w r0, r0, r1, lsl #8 │ │ add.w r0, r0, #327680 @ 0x50000 │ │ str r0, [sp, #12] │ │ add r0, sp, #368 @ 0x170 │ │ adds r0, #24 │ │ str r0, [sp, #8] │ │ movs r0, #0 │ │ str r0, [sp, #44] @ 0x2c │ │ movs r0, #8 │ │ str r0, [sp, #24] │ │ movs r0, #0 │ │ str r0, [sp, #40] @ 0x28 │ │ - b.n 7fdbc │ │ + b.n 7fe24 │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldr r1, [sp, #24] │ │ add.w r0, r0, r0, lsl #3 │ │ str.w sl, [r1, r0, lsl #3] │ │ add.w r0, r1, r0, lsl #3 │ │ add.w ip, r0, #24 │ │ ldr r1, [sp, #48] @ 0x30 │ │ @@ -132550,75 +132463,75 @@ │ │ ldr r0, [sp, #20] │ │ ldr r1, [sp, #16] │ │ subs.w r0, fp, r0 │ │ str.w fp, [sp, #904] @ 0x388 │ │ ldr r0, [sp, #40] @ 0x28 │ │ str.w fp, [sp, #44] @ 0x2c │ │ sbcs r0, r1 │ │ - bcs.n 7fe5e │ │ + bcs.n 7fec6 │ │ ldr r0, [sp, #44] @ 0x2c │ │ adds r0, #1 │ │ str r0, [sp, #28] │ │ ldr r0, [sp, #40] @ 0x28 │ │ adc.w r0, r0, #0 │ │ str r0, [sp, #40] @ 0x28 │ │ ldr r0, [sp, #72] @ 0x48 │ │ add r1, sp, #872 @ 0x368 │ │ ldr r2, [sp, #12] │ │ ldr r3, [sp, #76] @ 0x4c │ │ str r0, [sp, #0] │ │ add r0, sp, #368 @ 0x170 │ │ - bl 8b7dc │ │ + bl 8b848 │ │ ldrd r8, r0, [sp, #376] @ 0x178 │ │ ldrd sl, r1, [sp, #368] @ 0x170 │ │ str r0, [sp, #48] @ 0x30 │ │ ldr r0, [sp, #388] @ 0x184 │ │ str r0, [sp, #36] @ 0x24 │ │ ldr r0, [sp, #384] @ 0x180 │ │ str r0, [sp, #32] │ │ eor.w r0, sl, #46 @ 0x2e │ │ orrs r0, r1 │ │ - beq.w 80008 │ │ + beq.w 80070 │ │ mov fp, r1 │ │ ldr r1, [sp, #8] │ │ add.w ip, sp, #304 @ 0x130 │ │ ldmia r1!, {r0, r2, r3, r4, r5, r6} │ │ stmia.w ip!, {r0, r2, r3, r4, r5, r6} │ │ ldmia.w r1, {r0, r2, r3, r4, r5, r6} │ │ stmia.w ip, {r0, r2, r3, r4, r5, r6} │ │ ldr r0, [sp, #896] @ 0x380 │ │ ldr r1, [sp, #44] @ 0x2c │ │ cmp r0, r1 │ │ - bne.n 7fd6e │ │ + bne.n 7fdd6 │ │ add r0, sp, #896 @ 0x380 │ │ - bl 82578 │ │ + bl 825e0 │ │ ldr r0, [sp, #900] @ 0x384 │ │ str r0, [sp, #24] │ │ - b.n 7fd6e │ │ + b.n 7fdd6 │ │ ldrb.w r1, [sp, #371] @ 0x173 │ │ movs r4, #0 │ │ ldrh.w r2, [sp, #369] @ 0x171 │ │ ldr r3, [sp, #380] @ 0x17c │ │ orr.w r1, r2, r1, lsl #16 │ │ str r3, [sp, #36] @ 0x24 │ │ ldr r3, [sp, #372] @ 0x174 │ │ orr.w r8, r0, r1, lsl #8 │ │ str r3, [sp, #48] @ 0x30 │ │ ldr r3, [sp, #376] @ 0x178 │ │ str r3, [sp, #864] @ 0x360 │ │ - b.n 7ffe2 │ │ + b.n 8004a │ │ ldrb.w r1, [sp, #371] @ 0x173 │ │ ldrh.w r2, [sp, #369] @ 0x171 │ │ ldr r3, [sp, #380] @ 0x17c │ │ orr.w r1, r2, r1, lsl #16 │ │ ldrd r5, r6, [sp, #372] @ 0x174 │ │ str r5, [sp, #48] @ 0x30 │ │ orr.w r8, r0, r1, lsl #8 │ │ strd r6, r3, [sp, #864] @ 0x360 │ │ - b.n 7fff8 │ │ + b.n 80060 │ │ mov.w fp, #0 │ │ mov.w sl, #46 @ 0x2e │ │ ldr r0, [sp, #156] @ 0x9c │ │ ldr r1, [sp, #60] @ 0x3c │ │ ldr r2, [sp, #888] @ 0x378 │ │ add r1, r0 │ │ str r1, [sp, #60] @ 0x3c │ │ @@ -132645,83 +132558,83 @@ │ │ stmia r1!, {r0, r2, r3, r4, r5, r6} │ │ ldmia.w ip, {r0, r2, r3, r4, r5, r6} │ │ stmia r1!, {r0, r2, r3, r4, r5, r6} │ │ ldr r4, [sp, #52] @ 0x34 │ │ ldrd r0, r1, [sp, #472] @ 0x1d8 │ │ eor.w r0, r0, #47 @ 0x2f │ │ orrs r0, r1 │ │ - bne.w 7f5fe │ │ - b.w 7f62e │ │ + bne.w 7f666 │ │ + b.w 7f696 │ │ movs r0, #2 │ │ str r0, [sp, #88] @ 0x58 │ │ movs r0, #0 │ │ strd r0, r0, [sp, #80] @ 0x50 │ │ - b.n 7fcc6 │ │ + b.n 7fd2e │ │ mov.w sl, #46 @ 0x2e │ │ ldrd r2, r0, [sp, #872] @ 0x368 │ │ cmp r0, #0 │ │ - beq.n 7ffd0 │ │ + beq.n 80038 │ │ add r3, sp, #368 @ 0x170 │ │ adds r1, r2, r0 │ │ adds r3, #24 │ │ str r3, [sp, #64] @ 0x40 │ │ movs r3, #0 │ │ str r3, [sp, #72] @ 0x48 │ │ movs r3, #8 │ │ str r3, [sp, #68] @ 0x44 │ │ ldr r3, [sp, #76] @ 0x4c │ │ str r3, [sp, #48] @ 0x30 │ │ movs r3, #0 │ │ str r2, [sp, #76] @ 0x4c │ │ ldr r2, [sp, #76] @ 0x4c │ │ ldrb r2, [r2, r3] │ │ - cbz r2, 7ff14 │ │ + cbz r2, 7ff7c │ │ ldr r2, [sp, #76] @ 0x4c │ │ adds r3, #1 │ │ add r2, r3 │ │ cmp r2, r1 │ │ - bne.n 7ff02 │ │ - b.n 7ffcc │ │ + bne.n 7ff6a │ │ + b.n 80034 │ │ mvns r1, r3 │ │ add r0, r1 │ │ str r0, [sp, #876] @ 0x36c │ │ cmp r3, #0 │ │ ldr r0, [sp, #76] @ 0x4c │ │ add r0, r3 │ │ add.w r0, r0, #1 │ │ str r0, [sp, #872] @ 0x368 │ │ - beq.n 80010 │ │ + beq.n 80078 │ │ ldr r2, [sp, #76] @ 0x4c │ │ add r0, sp, #368 @ 0x170 │ │ add r1, sp, #872 @ 0x368 │ │ - bl 822ea │ │ + bl 82352 │ │ ldrd r8, r0, [sp, #376] @ 0x178 │ │ ldrd r2, r1, [sp, #368] @ 0x170 │ │ str r0, [sp, #48] @ 0x30 │ │ ldr r0, [sp, #388] @ 0x184 │ │ str r0, [sp, #36] @ 0x24 │ │ ldr r0, [sp, #384] @ 0x180 │ │ str r0, [sp, #44] @ 0x2c │ │ eor.w r0, r2, #46 @ 0x2e │ │ orrs r0, r1 │ │ str r2, [sp, #32] │ │ str r1, [sp, #40] @ 0x28 │ │ - beq.n 80022 │ │ + beq.n 8008a │ │ ldr.w ip, [sp, #64] @ 0x40 │ │ add r1, sp, #240 @ 0xf0 │ │ ldmia.w ip!, {r0, r2, r3, r4, r5, r6} │ │ stmia r1!, {r0, r2, r3, r4, r5, r6} │ │ ldmia.w ip, {r0, r2, r3, r4, r5, r6} │ │ stmia r1!, {r0, r2, r3, r4, r5, r6} │ │ ldr r0, [sp, #896] @ 0x380 │ │ ldr r1, [sp, #72] @ 0x48 │ │ cmp r1, r0 │ │ - bne.n 7ff74 │ │ + bne.n 7ffdc │ │ add r0, sp, #896 @ 0x380 │ │ - bl 82578 │ │ + bl 825e0 │ │ ldr r0, [sp, #900] @ 0x384 │ │ str r0, [sp, #68] @ 0x44 │ │ ldr.w lr, [sp, #72] @ 0x48 │ │ ldr r1, [sp, #68] @ 0x44 │ │ ldr r2, [sp, #32] │ │ add.w r0, lr, lr, lsl #3 │ │ add.w lr, lr, #1 │ │ @@ -132744,374 +132657,374 @@ │ │ ldrd r2, r0, [sp, #872] @ 0x368 │ │ cmp r0, #0 │ │ ldr r3, [sp, #76] @ 0x4c │ │ add.w r1, r2, r0 │ │ str.w lr, [sp, #72] @ 0x48 │ │ str.w lr, [sp, #904] @ 0x388 │ │ str r3, [sp, #48] @ 0x30 │ │ - bne.n 7fefa │ │ - b.n 7ffd0 │ │ + bne.n 7ff62 │ │ + b.n 80038 │ │ ldr r2, [sp, #76] @ 0x4c │ │ - b.n 7ffd0 │ │ + b.n 80038 │ │ movs r0, #2 │ │ str r2, [sp, #864] @ 0x360 │ │ str r0, [sp, #76] @ 0x4c │ │ movs r0, #0 │ │ movs r4, #1 │ │ mov.w r8, #19 │ │ str r0, [sp, #36] @ 0x24 │ │ str r0, [sp, #68] @ 0x44 │ │ ldr r0, [sp, #896] @ 0x380 │ │ ldr r1, [sp, #36] @ 0x24 │ │ cmp r0, #0 │ │ str r1, [sp, #868] @ 0x364 │ │ itt ne │ │ ldrne r0, [sp, #900] @ 0x384 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ cmp r4, #0 │ │ - beq.w 7fc70 │ │ + beq.w 7fcd8 │ │ ldr r0, [sp, #68] @ 0x44 │ │ cmp r0, #0 │ │ - beq.w 7fc70 │ │ + beq.w 7fcd8 │ │ ldr r0, [sp, #76] @ 0x4c │ │ - blx d87c0 │ │ - b.n 7fc70 │ │ + blx d87d0 │ │ + b.n 7fcd8 │ │ ldr r0, [sp, #32] │ │ movs r4, #1 │ │ str r0, [sp, #864] @ 0x360 │ │ - b.n 7ffe2 │ │ + b.n 8004a │ │ movs r0, #2 │ │ str r0, [sp, #76] @ 0x4c │ │ movs r0, #0 │ │ strd fp, r0, [sp, #64] @ 0x40 │ │ str r0, [sp, #72] @ 0x48 │ │ ldr.w fp, [sp, #28] │ │ - b.n 7fe66 │ │ + b.n 7fece │ │ ldr r0, [sp, #44] @ 0x2c │ │ movs r4, #1 │ │ str r0, [sp, #864] @ 0x360 │ │ movs r0, #2 │ │ str r0, [sp, #76] @ 0x4c │ │ movs r0, #0 │ │ - b.n 7ffe0 │ │ + b.n 80048 │ │ mov r6, r0 │ │ movs r0, #2 │ │ movs r4, #1 │ │ str r0, [sp, #76] @ 0x4c │ │ - b.n 80056 │ │ + b.n 800be │ │ mov r6, r0 │ │ movs r4, #1 │ │ - b.n 80056 │ │ + b.n 800be │ │ mov r6, r0 │ │ movs r0, #0 │ │ str r0, [sp, #80] @ 0x50 │ │ movs r0, #2 │ │ str r0, [sp, #88] @ 0x58 │ │ - b.n 80074 │ │ + b.n 800dc │ │ mov r6, r0 │ │ ldr r0, [sp, #68] @ 0x44 │ │ clz r0, r0 │ │ lsrs r4, r0, #5 │ │ ldr r0, [sp, #896] @ 0x380 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #900] @ 0x384 │ │ - blxne d87c0 │ │ - cbnz r4, 80074 │ │ + blxne d87d0 │ │ + cbnz r4, 800dc │ │ ldr r0, [sp, #76] @ 0x4c │ │ - blx d87c0 │ │ - b.n 80074 │ │ + blx d87d0 │ │ + b.n 800dc │ │ mov r6, r0 │ │ movs r4, #1 │ │ - b.n 80076 │ │ + b.n 800de │ │ mov r6, r0 │ │ movs r4, #0 │ │ ldr r0, [sp, #880] @ 0x370 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #884] @ 0x374 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #80] @ 0x50 │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ orrs r0, r4 │ │ - bne.n 800ea │ │ + bne.n 80152 │ │ ldr r0, [sp, #88] @ 0x58 │ │ - blx d87c0 │ │ - b.n 800ea │ │ - b.n 800c2 │ │ - add r2, sp, #56 @ 0x38 │ │ + blx d87d0 │ │ + b.n 80152 │ │ + b.n 8012a │ │ + add r1, sp, #728 @ 0x2d8 │ │ movs r5, r0 │ │ mov r6, r0 │ │ ldr r0, [sp, #368] @ 0x170 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #372] @ 0x174 │ │ cmpne r0, #0 │ │ - beq.n 800c4 │ │ + beq.n 8012c │ │ ldr r0, [sp, #376] @ 0x178 │ │ - blx d87c0 │ │ - b.n 800c4 │ │ + blx d87d0 │ │ + b.n 8012c │ │ mov r6, r0 │ │ ldrd r0, r1, [sp, #912] @ 0x390 │ │ movs r2, #8 │ │ movs r3, #16 │ │ - bl 419b6 │ │ - b.n 800c4 │ │ + bl 41cbe │ │ + b.n 8012c │ │ mov r6, r0 │ │ add r0, sp, #816 @ 0x330 │ │ - bl 8af84 │ │ - b.n 800dc │ │ - bl 416fe │ │ + bl 8aff0 │ │ + b.n 80144 │ │ + bl 41a06 │ │ mov r6, r0 │ │ - b.n 8010c │ │ + b.n 80174 │ │ mov r6, r0 │ │ mov r0, r4 │ │ - bl 8af84 │ │ + bl 8aff0 │ │ mov r0, r6 │ │ - blx d6dd0 │ │ - bl 416fe │ │ - b.n 800e8 │ │ + blx d6de0 │ │ + bl 41a06 │ │ + b.n 80150 │ │ mov r6, r0 │ │ ldr r0, [sp, #712] @ 0x2c8 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 800f0 │ │ + bne.n 80158 │ │ cmp r1, #1 │ │ - bne.n 8010c │ │ + bne.n 80174 │ │ dmb ish │ │ ldr r0, [sp, #712] @ 0x2c8 │ │ - bl 801a6 │ │ + bl 8020e │ │ add r0, sp, #456 @ 0x1c8 │ │ adds r0, #16 │ │ - bl 8020e │ │ + bl 80276 │ │ mov r0, r6 │ │ - blx d6dd0 │ │ - bl 416fe │ │ + blx d6de0 │ │ + bl 41a06 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ ldr.w r0, [r0, #256] @ 0x100 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 8012c │ │ + bne.n 80194 │ │ cmp r1, #1 │ │ - bne.n 8014a │ │ + bne.n 801b2 │ │ dmb ish │ │ ldr.w r0, [r4, #256] @ 0x100 │ │ - bl 801a6 │ │ + bl 8020e │ │ ldrd r0, r1, [r4, #16] │ │ eor.w r0, r0, #47 @ 0x2f │ │ orrs r0, r1 │ │ it eq │ │ popeq {r4, r5, r7, pc} │ │ ldr r0, [r4, #112] @ 0x70 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #116] @ 0x74 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r4, #124] @ 0x7c │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r4, #128] @ 0x80 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [r4, #136] @ 0x88 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r4, #140] @ 0x8c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [r4, #148] @ 0x94 │ │ - cbz r0, 80194 │ │ + cbz r0, 801fc │ │ ldr.w r0, [r4, #152] @ 0x98 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ pop {r4, r5, r7, pc} │ │ mov r5, r0 │ │ add.w r0, r4, #16 │ │ - bl 8020e │ │ + bl 80276 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ adds r0, #8 │ │ - bl 8af84 │ │ + bl 8aff0 │ │ adds r0, r4, #1 │ │ - beq.n 801de │ │ + beq.n 80246 │ │ adds r0, r4, #4 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 801bc │ │ + bne.n 80224 │ │ cmp r1, #1 │ │ it ne │ │ popne {r4, r5, r7, pc} │ │ dmb ish │ │ mov r0, r4 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ pop {r4, r5, r7, pc} │ │ mov r5, r0 │ │ adds r0, r4, #1 │ │ - beq.n 80208 │ │ + beq.n 80270 │ │ adds r0, r4, #4 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 801ec │ │ + bne.n 80254 │ │ cmp r1, #1 │ │ - bne.n 80208 │ │ + bne.n 80270 │ │ mov r0, r4 │ │ dmb ish │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ ldrd r0, r1, [r0] │ │ eor.w r0, r0, #47 @ 0x2f │ │ orrs r0, r1 │ │ it eq │ │ popeq {r4, r6, r7, pc} │ │ ldr r0, [r4, #96] @ 0x60 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #100] @ 0x64 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r4, #108] @ 0x6c │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #112] @ 0x70 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r4, #120] @ 0x78 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #124] @ 0x7c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [r4, #132] @ 0x84 │ │ - cbz r0, 80258 │ │ + cbz r0, 802c0 │ │ ldr.w r0, [r4, #136] @ 0x88 │ │ ldmia.w sp!, {r4, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ pop {r4, r6, r7, pc} │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ uxtb r0, r0 │ │ cmp r0, #82 @ 0x52 │ │ - bne.n 80306 │ │ + bne.n 8036e │ │ mov r4, r1 │ │ cmp r1, #0 │ │ - beq.n 80306 │ │ + beq.n 8036e │ │ ldr.w r1, [r4, #280] @ 0x118 │ │ add.w r0, r4, #280 @ 0x118 │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r5, r3, [r1] │ │ cmp r5, #0 │ │ - bne.n 80276 │ │ + bne.n 802de │ │ cmp r2, #1 │ │ - bne.n 80290 │ │ + bne.n 802f8 │ │ dmb ish │ │ - bl 7e154 │ │ + bl 7e1bc │ │ ldr.w r0, [r4, #256] @ 0x100 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 80298 │ │ + bne.n 80300 │ │ cmp r1, #1 │ │ - bne.n 802b6 │ │ + bne.n 8031e │ │ dmb ish │ │ ldr.w r0, [r4, #256] @ 0x100 │ │ - bl 801a6 │ │ + bl 8020e │ │ ldrd r0, r1, [r4, #16] │ │ eor.w r0, r0, #47 @ 0x2f │ │ orrs r0, r1 │ │ - beq.n 802fc │ │ + beq.n 80364 │ │ ldr r0, [r4, #112] @ 0x70 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #116] @ 0x74 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r4, #124] @ 0x7c │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r4, #128] @ 0x80 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [r4, #136] @ 0x88 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r4, #140] @ 0x8c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [r4, #148] @ 0x94 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r4, #152] @ 0x98 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ pop {r4, r5, r7, pc} │ │ mov r5, r0 │ │ add.w r0, r4, #16 │ │ - bl 8020e │ │ + bl 80276 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ mov r5, r0 │ │ mov r0, r4 │ │ - bl 8011e │ │ + bl 80186 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ - bl 416fe │ │ - bmi.n 802e2 │ │ + blx d6de0 │ │ + bl 41a06 │ │ + bmi.n 8034a │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #44 @ 0x2c │ │ ldrb r3, [r2, #0] │ │ cmp r3, #82 @ 0x52 │ │ - bne.n 80386 │ │ + bne.n 803ee │ │ ldr.w sl, [r1, #8] │ │ ldrd lr, r6, [r2, #8] │ │ ldrb r4, [r2, #4] │ │ ldr.w r3, [sl, #304] @ 0x130 │ │ cmp r3, #2 │ │ - beq.n 803b0 │ │ + beq.n 80418 │ │ lsls r2, r3, #31 │ │ - beq.n 803da │ │ + beq.n 80442 │ │ ldrb.w r2, [sl, #312] @ 0x138 │ │ ldr.w ip, [sl, #316] @ 0x13c │ │ cmp r2, #82 @ 0x52 │ │ - beq.n 803de │ │ + beq.n 80446 │ │ ldrd r6, r5, [sl, #320] @ 0x140 │ │ ldrh.w r1, [sl, #313] @ 0x139 │ │ ldrb.w r3, [sl, #315] @ 0x13b │ │ strb r2, [r0, #8] │ │ strd ip, r6, [r0, #12] │ │ str r5, [r0, #20] │ │ strh.w r1, [r0, #9] │ │ strb r3, [r0, #11] │ │ - b.n 803a4 │ │ + b.n 8040c │ │ ldrd r5, r6, [r2, #8] │ │ ldrb r1, [r2, #7] │ │ ldr.w r4, [r2, #1] │ │ ldrh.w r2, [r2, #5] │ │ strb r3, [r0, #8] │ │ strh.w r2, [r0, #13] │ │ strb r1, [r0, #15] │ │ @@ -133127,63 +133040,63 @@ │ │ mov r5, r1 │ │ mov r1, lr │ │ mov r0, r2 │ │ mov r2, r6 │ │ mov r8, r4 │ │ mov r4, r6 │ │ mov r6, lr │ │ - bl 83a98 │ │ + bl 83b00 │ │ ldr.w r3, [sl, #304] @ 0x130 │ │ mov lr, r6 │ │ mov r6, r4 │ │ mov r1, r5 │ │ mov r0, r9 │ │ mov r4, r8 │ │ lsls r2, r3, #31 │ │ - bne.n 8035e │ │ + bne.n 803c6 │ │ add.w ip, sl, #308 @ 0x134 │ │ ldr.w r3, [ip, #12] │ │ mov.w fp, #0 │ │ ldrd r8, r9, [r1] │ │ cmp r3, #0 │ │ - beq.n 804d6 │ │ + beq.n 8053e │ │ ldr.w r2, [ip, #8] │ │ cmp r3, #1 │ │ strd r6, r4, [sp] │ │ - beq.n 80424 │ │ + beq.n 8048c │ │ movs r6, #0 │ │ add.w fp, r6, r3, lsr #1 │ │ sub.w r3, r3, r3, lsr #1 │ │ add.w r5, fp, fp, lsl #1 │ │ ldr.w r4, [r2, r5, lsl #3] │ │ add.w r5, r2, r5, lsl #3 │ │ ldr r5, [r5, #4] │ │ subs.w r4, r8, r4 │ │ sbcs.w r5, r9, r5 │ │ it cc │ │ movcc fp, r6 │ │ mov r6, fp │ │ cmp r3, #1 │ │ - bhi.n 803fc │ │ + bhi.n 80464 │ │ add.w r3, fp, fp, lsl #1 │ │ mov.w fp, #0 │ │ ldr.w r6, [r2, r3, lsl #3] │ │ add.w r2, r2, r3, lsl #3 │ │ ldr r3, [r2, #4] │ │ subs.w r6, r8, r6 │ │ sbcs.w r3, r9, r3 │ │ - bcc.n 804d6 │ │ + bcc.n 8053e │ │ ldrd r3, r6, [r2, #8] │ │ subs.w r3, r8, r3 │ │ sbcs.w r3, r9, r6 │ │ - bcs.n 804d6 │ │ + bcs.n 8053e │ │ ldr.w r3, [ip, #4] │ │ ldr r6, [r2, #16] │ │ cmp r6, r3 │ │ - bcs.w 8066e │ │ + bcs.w 806d6 │ │ ldr r3, [r1, #12] │ │ ldr.w r2, [ip] │ │ str r3, [sp, #24] │ │ ldr r3, [sp, #0] │ │ strd lr, r3, [sp, #16] │ │ ldr r3, [sp, #4] │ │ strb.w r3, [r7, #-57] │ │ @@ -133196,193 +133109,193 @@ │ │ add r3, sp, #16 │ │ str r3, [sp, #36] @ 0x24 │ │ sub.w r3, r7, #57 @ 0x39 │ │ str r3, [sp, #32] │ │ add r3, sp, #8 │ │ cmp r2, #2 │ │ str r3, [sp, #28] │ │ - beq.n 804ba │ │ + beq.n 80522 │ │ lsls r2, r2, #31 │ │ - beq.n 804d2 │ │ + beq.n 8053a │ │ ldrb r2, [r4, #8] │ │ ldr.w fp, [r4, #12] │ │ cmp r2, #82 @ 0x52 │ │ - beq.n 804d6 │ │ + beq.n 8053e │ │ ldrd r1, r3, [r4, #16] │ │ ldrh.w r6, [r4, #9] │ │ strb r2, [r0, #8] │ │ ldrb r2, [r4, #11] │ │ strd fp, r1, [r0, #12] │ │ str r3, [r0, #20] │ │ strb r2, [r0, #11] │ │ strh.w r6, [r0, #9] │ │ - b.n 803a4 │ │ + b.n 8040c │ │ add r2, sp, #28 │ │ mov r5, r0 │ │ mov r6, r1 │ │ mov r0, r4 │ │ mov r1, r2 │ │ - bl 84470 │ │ + bl 844d8 │ │ ldr r2, [r4, #0] │ │ mov r1, r6 │ │ mov r0, r5 │ │ lsls r2, r2, #31 │ │ - bne.n 80496 │ │ + bne.n 804fe │ │ add.w fp, r4, #4 │ │ ldrd r2, r3, [sl, #16] │ │ eor.w r2, r2, #47 @ 0x2f │ │ orrs r2, r3 │ │ - bne.n 80502 │ │ + bne.n 8056a │ │ movs r3, #2 │ │ movs r1, #0 │ │ strd sl, r1, [r0, #12] │ │ movs r1, #0 │ │ strd fp, r3, [r0, #4] │ │ strd r5, r4, [r0, #20] │ │ str.w lr, [r0, #28] │ │ str r1, [r0, #0] │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr.w r2, [sl, #280] @ 0x118 │ │ cmp r2, #2 │ │ - beq.n 80538 │ │ + beq.n 805a0 │ │ lsls r1, r2, #31 │ │ - beq.n 8055a │ │ + beq.n 805c2 │ │ ldrb.w r1, [sl, #288] @ 0x120 │ │ ldr.w ip, [sl, #292] @ 0x124 │ │ cmp r1, #82 @ 0x52 │ │ - beq.n 8055e │ │ + beq.n 805c6 │ │ ldrb.w r2, [sl, #291] @ 0x123 │ │ ldrh.w r3, [sl, #289] @ 0x121 │ │ ldrd r6, r5, [sl, #296] @ 0x128 │ │ orr.w r2, r3, r2, lsl #16 │ │ strd r6, r5, [r0, #16] │ │ orr.w r1, r1, r2, lsl #8 │ │ strd r1, ip, [r0, #8] │ │ - b.n 803a4 │ │ + b.n 8040c │ │ ldr r1, [r1, #12] │ │ add.w r2, sl, #280 @ 0x118 │ │ add.w r3, sl, #16 │ │ mov r6, r0 │ │ mov r0, r2 │ │ mov r2, sl │ │ ldr r1, [r1, #0] │ │ adds r1, #8 │ │ - bl 8068c │ │ + bl 806f4 │ │ ldr.w r2, [sl, #280] @ 0x118 │ │ mov r0, r6 │ │ lsls r1, r2, #31 │ │ - bne.n 8050e │ │ + bne.n 80576 │ │ add.w ip, sl, #284 @ 0x11c │ │ ldr.w r1, [ip, #12] │ │ - cbz r1, 80570 │ │ + cbz r1, 805d8 │ │ ldr.w r2, [ip, #8] │ │ cmp r1, #1 │ │ - bne.n 80574 │ │ + bne.n 805dc │ │ movs r3, #0 │ │ - b.n 8059c │ │ + b.n 80604 │ │ movs r3, #2 │ │ - b.n 804e6 │ │ + b.n 8054e │ │ movs r6, #0 │ │ add.w r3, r6, r1, lsr #1 │ │ sub.w r1, r1, r1, lsr #1 │ │ add.w r5, r3, r3, lsl #1 │ │ add.w r5, r2, r5, lsl #3 │ │ ldrd r5, r4, [r5, #8] │ │ subs.w r5, r8, r5 │ │ sbcs.w r5, r9, r4 │ │ it cc │ │ movcc r3, r6 │ │ mov r6, r3 │ │ cmp r1, #1 │ │ - bhi.n 80576 │ │ + bhi.n 805de │ │ add.w r1, r3, r3, lsl #1 │ │ movs r3, #2 │ │ add.w r2, r2, r1, lsl #3 │ │ movs r1, #0 │ │ ldrd r6, r5, [r2, #8] │ │ subs.w r6, r8, r6 │ │ sbcs.w r6, r9, r5 │ │ - bcc.n 804e6 │ │ + bcc.n 8054e │ │ ldrd r6, r5, [r2, #16] │ │ subs.w r6, r8, r6 │ │ sbcs.w r6, r9, r5 │ │ - bcs.n 804e6 │ │ + bcs.n 8054e │ │ ldr r1, [r2, #4] │ │ cmp r1, #0 │ │ - beq.w 804e6 │ │ + beq.w 8054e │ │ ldr.w lr, [r2] │ │ cmp r1, #1 │ │ - bne.n 805d8 │ │ + bne.n 80640 │ │ movs r3, #0 │ │ - b.n 80604 │ │ + b.n 8066c │ │ movs r6, #0 │ │ mov r2, r1 │ │ add.w r3, r6, r2, lsr #1 │ │ sub.w r2, r2, r2, lsr #1 │ │ add.w r4, r3, r3, lsl #1 │ │ ldr.w r5, [lr, r4, lsl #3] │ │ add.w r4, lr, r4, lsl #3 │ │ ldr r4, [r4, #4] │ │ subs.w r5, r8, r5 │ │ sbcs.w r4, r9, r4 │ │ it cc │ │ movcc r3, r6 │ │ mov r6, r3 │ │ cmp r2, #1 │ │ - bhi.n 805dc │ │ + bhi.n 80644 │ │ add.w r4, r3, r3, lsl #1 │ │ ldr.w r2, [lr, r4, lsl #3] │ │ add.w r4, lr, r4, lsl #3 │ │ ldr r6, [r4, #4] │ │ eor.w r4, r2, r8 │ │ eor.w r5, r6, r9 │ │ orrs r4, r5 │ │ - beq.n 80632 │ │ + beq.n 8069a │ │ subs.w r2, r2, r8 │ │ sbcs.w r2, r6, r9 │ │ it cc │ │ addcc r3, #1 │ │ cmp r3, #0 │ │ - beq.w 804e2 │ │ + beq.w 8054a │ │ subs r3, #1 │ │ cmp r3, r1 │ │ - bcs.n 8067a │ │ + bcs.n 806e2 │ │ add.w r1, r3, r3, lsl #1 │ │ ldr.w r4, [ip, #4] │ │ add.w r1, lr, r1, lsl #3 │ │ ldr r2, [r1, #8] │ │ cmp r4, r2 │ │ - bls.n 8065a │ │ + bls.n 806c2 │ │ ldr.w r3, [ip] │ │ add.w r2, r2, r2, lsl #1 │ │ add.w r2, r3, r2, lsl #2 │ │ ldrd r4, lr, [r2, #4] │ │ - b.n 8065c │ │ + b.n 806c4 │ │ movs r4, #0 │ │ ldrd sl, r5, [r1, #16] │ │ cmp.w sl, #0 │ │ mov r1, sl │ │ it ne │ │ movne r1, #1 │ │ mov r3, r1 │ │ - b.n 804e6 │ │ - ldr r2, [pc, #24] @ (80688 ) │ │ + b.n 8054e │ │ + ldr r2, [pc, #24] @ (806f0 ) │ │ mov r0, r6 │ │ mov r1, r3 │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r2, [pc, #8] @ (80684 ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #8] @ (806ec ) │ │ mov r0, r3 │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r7, [sp, #24] │ │ + bl 3fd7c │ │ + ldr r6, [sp, #696] @ 0x2b8 │ │ movs r5, r0 │ │ - @ instruction: 0xb8c4 │ │ + @ instruction: 0xb86c │ │ movs r5, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub.w sp, sp, #612 @ 0x264 │ │ mov r6, r3 │ │ str r0, [sp, #80] @ 0x50 │ │ @@ -133395,96 +133308,96 @@ │ │ strd r1, r2, [sp, #44] @ 0x2c │ │ ldrd r2, r3, [r3, #144] @ 0x90 │ │ str r0, [sp, #84] @ 0x54 │ │ ldrd r0, r1, [r6, #72] @ 0x48 │ │ str r0, [sp, #108] @ 0x6c │ │ strd r2, r1, [sp, #100] @ 0x64 │ │ strd r4, r3, [sp, #92] @ 0x5c │ │ - beq.n 806dc │ │ + beq.n 80744 │ │ mov r0, r5 │ │ - blx d87f0 │ │ - cbnz r0, 806de │ │ + blx d8810 │ │ + cbnz r0, 80746 │ │ movs r0, #2 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #2 │ │ mov r1, r8 │ │ mov r2, r5 │ │ str r0, [sp, #112] @ 0x70 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r4, [r6, #116] @ 0x74 │ │ strd r4, sl, [sp, #116] @ 0x74 │ │ str r6, [sp, #124] @ 0x7c │ │ - cbz r4, 80758 │ │ + cbz r4, 807c0 │ │ mov.w fp, r4, lsl #4 │ │ ldr.w r9, [r6, #112] @ 0x70 │ │ mov r0, fp │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ str r0, [sp, #140] @ 0x8c │ │ - beq.w 81dca │ │ + beq.w 81e32 │ │ ldr r5, [sp, #140] @ 0x8c │ │ add.w r8, sp, #192 @ 0xc0 │ │ movs r6, #0 │ │ cmp fp, r6 │ │ - beq.n 80736 │ │ + beq.n 8079e │ │ add.w r1, r9, r6 │ │ mov r0, r8 │ │ - bl 81fd8 │ │ + bl 82040 │ │ add r3, sp, #192 @ 0xc0 │ │ subs r4, #1 │ │ ldmia r3, {r0, r1, r2, r3} │ │ str r0, [r5, r6] │ │ add.w r0, r5, r6 │ │ add.w r6, r6, #16 │ │ add.w r0, r0, #4 │ │ stmia r0!, {r1, r2, r3} │ │ - bne.n 80710 │ │ + bne.n 80778 │ │ ldr r6, [sp, #124] @ 0x7c │ │ ldrd r8, r4, [r6, #124] @ 0x7c │ │ mov.w r9, r4, lsl #2 │ │ - cbz r4, 80768 │ │ + cbz r4, 807d0 │ │ mov r0, r9 │ │ - blx d87f0 │ │ + blx d8810 │ │ mov r5, r0 │ │ - cbnz r0, 8076a │ │ + cbnz r0, 807d2 │ │ movs r0, #2 │ │ mov r1, r9 │ │ - bl 3dfa4 │ │ - b.w 81e0c │ │ + bl 3e2ac │ │ + b.w 81e74 │ │ movs r0, #8 │ │ str r0, [sp, #140] @ 0x8c │ │ ldrd r8, r4, [r6, #124] @ 0x7c │ │ cmp r4, #0 │ │ mov.w r9, r4, lsl #2 │ │ - bne.n 80742 │ │ + bne.n 807aa │ │ movs r5, #2 │ │ mov r0, r5 │ │ mov r1, r8 │ │ mov r2, r9 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr.w r9, [r6, #140] @ 0x8c │ │ strd r5, r4, [sp, #72] @ 0x48 │ │ cmp.w r9, #0 │ │ - beq.n 80864 │ │ + beq.n 808cc │ │ ldr.w r0, [r6, #136] @ 0x88 │ │ str r0, [sp, #128] @ 0x80 │ │ add.w r0, r9, r9, lsl #3 │ │ lsls r0, r0, #3 │ │ str r0, [sp, #132] @ 0x84 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ str r0, [sp, #136] @ 0x88 │ │ - beq.w 81dd4 │ │ + beq.w 81e3c │ │ ldr.w sl, [sp, #136] @ 0x88 │ │ mov.w r8, #0 │ │ str.w r9, [sp, #68] @ 0x44 │ │ - b.n 8081c │ │ + b.n 80884 │ │ add r0, sp, #192 @ 0xc0 │ │ - bl 81fd8 │ │ + bl 82040 │ │ ldrd lr, r1, [sp, #200] @ 0xc8 │ │ ldrd r2, r0, [sp, #192] @ 0xc0 │ │ str r1, [sp, #144] @ 0x90 │ │ ldrd r1, r5, [sp, #536] @ 0x218 │ │ subs.w r9, r9, #1 │ │ ldrd r3, ip, [sp, #544] @ 0x220 │ │ strd r1, r5, [sp, #192] @ 0xc0 │ │ @@ -133512,23 +133425,23 @@ │ │ ldr.w r2, [fp, #56] @ 0x38 │ │ ldr.w r3, [fp, #64] @ 0x40 │ │ str r0, [r1, #20] │ │ ldr.w r0, [fp, #60] @ 0x3c │ │ ldr.w r6, [fp, #68] @ 0x44 │ │ strd r2, r0, [r1, #56] @ 0x38 │ │ strd r3, r6, [r1, #64] @ 0x40 │ │ - beq.n 8085c │ │ + beq.n 808c4 │ │ ldr r0, [sp, #132] @ 0x84 │ │ cmp r0, r8 │ │ - beq.n 8085c │ │ + beq.n 808c4 │ │ ldr r0, [sp, #128] @ 0x80 │ │ add.w fp, r0, r8 │ │ add r0, sp, #536 @ 0x218 │ │ mov r1, fp │ │ - bl 81fd8 │ │ + bl 82040 │ │ mov r1, fp │ │ ldr.w r0, [r1, #16]! │ │ ldr r3, [r1, #16] │ │ eor.w r0, r0, #46 @ 0x2e │ │ str r3, [sp, #156] @ 0x9c │ │ ldr r3, [r1, #20] │ │ str r3, [sp, #164] @ 0xa4 │ │ @@ -133536,38 +133449,38 @@ │ │ str r3, [sp, #148] @ 0x94 │ │ ldr r3, [r1, #28] │ │ str r3, [sp, #160] @ 0xa0 │ │ ldrd r6, r3, [r1, #32] │ │ ldr r2, [r1, #4] │ │ str r3, [sp, #152] @ 0x98 │ │ orrs r0, r2 │ │ - bne.n 807aa │ │ + bne.n 80812 │ │ movs r0, #0 │ │ movs r2, #46 @ 0x2e │ │ - b.n 807ba │ │ + b.n 80822 │ │ ldr r6, [sp, #124] @ 0x7c │ │ ldr.w r9, [sp, #68] @ 0x44 │ │ - b.n 80868 │ │ + b.n 808d0 │ │ movs r0, #8 │ │ str r0, [sp, #136] @ 0x88 │ │ ldrd r0, r1, [r6] │ │ ldrd fp, r8, [r6, #80] @ 0x50 │ │ eor.w r0, r0, #46 @ 0x2e │ │ ldrd r5, r4, [r6, #88] @ 0x58 │ │ orrs r0, r1 │ │ add r0, sp, #156 @ 0x9c │ │ stmia.w r0, {r4, r5, r8} │ │ - bne.n 8088c │ │ + bne.n 808f4 │ │ mov sl, r9 │ │ movs r2, #46 @ 0x2e │ │ mov.w r8, #0 │ │ - b.n 808f6 │ │ + b.n 8095e │ │ add r0, sp, #536 @ 0x218 │ │ mov r1, r6 │ │ - bl 81fd8 │ │ + bl 82040 │ │ mov r1, r6 │ │ ldr.w lr, [r1, #16]! │ │ ldrd ip, r3, [r1, #16] │ │ ldr r2, [r1, #4] │ │ str r3, [sp, #148] @ 0x94 │ │ ldrd r3, r0, [r1, #24] │ │ str.w ip, [sp, #152] @ 0x98 │ │ @@ -133575,22 +133488,22 @@ │ │ ldr r0, [r1, #32] │ │ str r0, [sp, #68] @ 0x44 │ │ ldr r0, [r1, #36] @ 0x24 │ │ str r0, [sp, #60] @ 0x3c │ │ eor.w r0, lr, #46 @ 0x2e │ │ orrs r0, r2 │ │ str r3, [sp, #144] @ 0x90 │ │ - bne.n 808c8 │ │ + bne.n 80930 │ │ movs r0, #0 │ │ str r0, [sp, #64] @ 0x40 │ │ movs r0, #46 @ 0x2e │ │ str r0, [sp, #128] @ 0x80 │ │ - b.n 808de │ │ + b.n 80946 │ │ add r0, sp, #192 @ 0xc0 │ │ - bl 81fd8 │ │ + bl 82040 │ │ ldr r0, [sp, #192] @ 0xc0 │ │ str r0, [sp, #128] @ 0x80 │ │ ldr r0, [sp, #196] @ 0xc4 │ │ str r0, [sp, #64] @ 0x40 │ │ ldr r0, [sp, #200] @ 0xc8 │ │ str r0, [sp, #56] @ 0x38 │ │ ldr r0, [sp, #204] @ 0xcc │ │ @@ -133705,15 +133618,15 @@ │ │ str r2, [sp, #64] @ 0x40 │ │ strb.w r3, [sp, #352] @ 0x160 │ │ strd fp, r6, [sp, #272] @ 0x110 │ │ str.w fp, [sp, #424] @ 0x1a8 │ │ strb.w r3, [sp, #417] @ 0x1a1 │ │ str r6, [sp, #428] @ 0x1ac │ │ lsls r0, r0, #31 │ │ - beq.n 80a36 │ │ + beq.n 80a9e │ │ ldr r3, [sp, #132] @ 0x84 │ │ movs r2, #0 │ │ ldrb.w r0, [sp, #352] @ 0x160 │ │ str r2, [sp, #388] @ 0x184 │ │ strd r2, r2, [r3] │ │ strd r2, r2, [r3, #8] │ │ ldr r3, [sp, #124] @ 0x7c │ │ @@ -133727,15 +133640,15 @@ │ │ strb.w r0, [sp, #417] @ 0x1a1 │ │ ldr.w sl, [sp, #428] @ 0x1ac │ │ movs r0, #0 │ │ strd r0, r0, [sp, #408] @ 0x198 │ │ cmp.w sl, #0 │ │ strh.w r0, [sp, #420] @ 0x1a4 │ │ strb.w r0, [sp, #418] @ 0x1a2 │ │ - beq.w 81766 │ │ + beq.w 817ce │ │ str r1, [sp, #148] @ 0x94 │ │ movs r1, #0 │ │ str r1, [sp, #88] @ 0x58 │ │ str r0, [sp, #76] @ 0x4c │ │ movs r0, #0 │ │ str.w r8, [sp, #116] @ 0x74 │ │ movs r1, #0 │ │ @@ -133756,23 +133669,23 @@ │ │ mov r6, sl │ │ sub.w sl, sl, #1 │ │ str r0, [sp, #156] @ 0x9c │ │ mov r9, r1 │ │ ldrb.w lr, [r9], #1 │ │ strd r9, sl, [sp, #424] @ 0x1a8 │ │ cmp.w lr, #0 │ │ - beq.n 80b3a │ │ + beq.n 80ba2 │ │ ldr.w fp, [sp, #164] @ 0xa4 │ │ ldrb.w r0, [sp, #357] @ 0x165 │ │ cmp lr, r0 │ │ - bcs.w 80ba0 │ │ + bcs.w 80c08 │ │ sub.w r2, lr, #1 │ │ str r1, [sp, #144] @ 0x90 │ │ cmp r2, #11 │ │ - bhi.w 80e0e │ │ + bhi.w 80e76 │ │ mov.w lr, #0 │ │ movs r4, #47 @ 0x2f │ │ tbh [pc, r2, lsl #1] │ │ lsls r2, r7, #14 │ │ movs r4, r1 │ │ lsls r6, r4, #4 │ │ lsls r5, r3, #5 │ │ @@ -133781,212 +133694,212 @@ │ │ lsls r6, r2, #6 │ │ lsls r2, r2, #6 │ │ lsls r2, r3, #6 │ │ lsls r4, r4, #4 │ │ lsls r0, r3, #6 │ │ lsls r2, r7, #2 │ │ cmp.w sl, #0 │ │ - beq.w 819f6 │ │ + beq.w 81a5e │ │ sub.w sl, r6, #2 │ │ mov r4, r6 │ │ mov.w fp, #0 │ │ mov.w r8, #0 │ │ movs r2, #0 │ │ ldrb.w r3, [r9], #1 │ │ cmp r2, #63 @ 0x3f │ │ - bne.n 80af6 │ │ + bne.n 80b5e │ │ cmp r3, #1 │ │ - bhi.w 8199a │ │ + bhi.w 81a02 │ │ and.w r1, r2, #63 @ 0x3f │ │ and.w r0, r3, #127 @ 0x7f │ │ rsb r5, r1, #32 │ │ subs.w r6, r1, #32 │ │ lsr.w r5, r0, r5 │ │ it pl │ │ lslpl.w r5, r0, r6 │ │ lsl.w r0, r0, r1 │ │ it pl │ │ movpl r0, #0 │ │ orr.w fp, fp, r0 │ │ orr.w r8, r8, r5 │ │ sxtb r0, r3 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.w 81020 │ │ + bgt.w 81088 │ │ sub.w sl, sl, #1 │ │ adds r2, #7 │ │ adds.w r0, sl, #1 │ │ - bne.n 80ae8 │ │ - b.w 818f6 │ │ + bne.n 80b50 │ │ + b.w 8195e │ │ cmp.w sl, #0 │ │ - beq.w 81916 │ │ + beq.w 8197e │ │ str r6, [sp, #108] @ 0x6c │ │ subs r6, #2 │ │ mov fp, r8 │ │ mov.w lr, #0 │ │ movs r4, #0 │ │ movs r2, #0 │ │ mov r8, r9 │ │ str r1, [sp, #144] @ 0x90 │ │ ldrb.w r1, [r8], #1 │ │ cmp r2, #63 @ 0x3f │ │ - bne.n 80b62 │ │ + bne.n 80bca │ │ cmp r1, #1 │ │ - bhi.w 818cc │ │ + bhi.w 81934 │ │ and.w r0, r2, #63 @ 0x3f │ │ and.w r5, r1, #127 @ 0x7f │ │ rsb sl, r0, #32 │ │ subs.w ip, r0, #32 │ │ lsl.w r0, r5, r0 │ │ lsr.w r3, r5, sl │ │ it pl │ │ lslpl.w r3, r5, ip │ │ it pl │ │ movpl r0, #0 │ │ orr.w lr, lr, r0 │ │ orrs r4, r3 │ │ sxtb r0, r1 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 80baa │ │ + bgt.n 80c12 │ │ subs r6, #1 │ │ adds r2, #7 │ │ mov r9, r8 │ │ adds r0, r6, #1 │ │ - bne.n 80b54 │ │ - b.w 818de │ │ + bne.n 80bbc │ │ + b.w 81946 │ │ movs r0, #0 │ │ mov fp, lr │ │ movs r4, #46 @ 0x2e │ │ mov lr, r0 │ │ - b.n 8122c │ │ + b.n 81294 │ │ cmp r4, #0 │ │ - bne.w 819fe │ │ + bne.w 81a66 │ │ cmp r6, lr │ │ - bcc.w 81908 │ │ + bcc.w 81970 │ │ sub.w sl, r6, lr │ │ add.w r0, r8, lr │ │ cmp.w lr, #0 │ │ str.w sl, [sp, #428] @ 0x1ac │ │ str r0, [sp, #424] @ 0x1a8 │ │ - beq.w 81908 │ │ + beq.w 81970 │ │ ldrb.w r6, [r9, #1] │ │ add.w r8, r9, #2 │ │ sub.w ip, lr, #1 │ │ str.w r8, [sp, #528] @ 0x210 │ │ subs r2, r6, #1 │ │ cmp r2, #3 │ │ - bhi.w 80f2e │ │ + bhi.w 80f96 │ │ movs r0, #0 │ │ movs r4, #62 @ 0x3e │ │ str r0, [sp, #144] @ 0x90 │ │ tbh [pc, r2, lsl #1] │ │ lsls r2, r3, #12 │ │ movs r4, r0 │ │ lsls r0, r3, #5 │ │ lsls r4, r5, #5 │ │ ldrb.w r2, [sp, #336] @ 0x150 │ │ subs r6, r2, #1 │ │ cmp r6, #7 │ │ - bhi.w 81d86 │ │ + bhi.w 81dee │ │ tbh [pc, r6, lsl #1] │ │ movs r0, r1 │ │ lsls r3, r2, #10 │ │ lsrs r0, r0, #3 │ │ lsls r3, r0, #11 │ │ lsrs r0, r0, #3 │ │ lsrs r0, r0, #3 │ │ lsrs r0, r0, #3 │ │ lsls r4, r4, #10 │ │ cmp.w ip, #0 │ │ - beq.w 81cb2 │ │ + beq.w 81d1a │ │ ldrb.w fp, [r8] │ │ movs r0, #0 │ │ movs r4, #63 @ 0x3f │ │ str r0, [sp, #148] @ 0x94 │ │ str r0, [sp, #152] @ 0x98 │ │ - b.n 81144 │ │ + b.n 811ac │ │ cmp.w sl, #0 │ │ - beq.w 819f6 │ │ + beq.w 81a5e │ │ mov r4, r6 │ │ sub.w sl, r6, #2 │ │ mov.w fp, #0 │ │ mov.w r8, #0 │ │ movs r2, #0 │ │ ldrb.w r3, [r9], #1 │ │ cmp r2, #63 @ 0x3f │ │ - bne.n 80c52 │ │ + bne.n 80cba │ │ cmp r3, #1 │ │ - bhi.w 81984 │ │ + bhi.w 819ec │ │ and.w r1, r2, #63 @ 0x3f │ │ and.w r0, r3, #127 @ 0x7f │ │ rsb r5, r1, #32 │ │ subs.w r6, r1, #32 │ │ lsr.w r5, r0, r5 │ │ it pl │ │ lslpl.w r5, r0, r6 │ │ lsl.w r0, r0, r1 │ │ it pl │ │ movpl r0, #0 │ │ orr.w fp, fp, r0 │ │ orr.w r8, r8, r5 │ │ sxtb r0, r3 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.w 80fc0 │ │ + bgt.w 81028 │ │ sub.w sl, sl, #1 │ │ adds r2, #7 │ │ adds.w r0, sl, #1 │ │ - bne.n 80c44 │ │ - b.w 818f6 │ │ + bne.n 80cac │ │ + b.w 8195e │ │ cmp.w sl, #0 │ │ - beq.w 819f6 │ │ + beq.w 81a5e │ │ mov r4, r6 │ │ sub.w sl, r6, #2 │ │ mov.w fp, #0 │ │ mov.w r8, #0 │ │ movs r2, #0 │ │ ldrb.w r3, [r9], #1 │ │ cmp r2, #63 @ 0x3f │ │ - bne.n 80cbc │ │ + bne.n 80d24 │ │ cmp r3, #1 │ │ - bhi.w 81958 │ │ + bhi.w 819c0 │ │ and.w r1, r2, #63 @ 0x3f │ │ and.w r0, r3, #127 @ 0x7f │ │ rsb r5, r1, #32 │ │ subs.w r6, r1, #32 │ │ lsr.w r5, r0, r5 │ │ it pl │ │ lslpl.w r5, r0, r6 │ │ lsl.w r0, r0, r1 │ │ it pl │ │ movpl r0, #0 │ │ orr.w fp, fp, r0 │ │ orr.w r8, r8, r5 │ │ sxtb r0, r3 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.w 80fe0 │ │ + bgt.w 81048 │ │ sub.w sl, sl, #1 │ │ adds r2, #7 │ │ adds.w r0, sl, #1 │ │ - bne.n 80cae │ │ - b.w 818f6 │ │ + bne.n 80d16 │ │ + b.w 8195e │ │ movs r4, #56 @ 0x38 │ │ - b.n 8122c │ │ + b.n 81294 │ │ cmp.w sl, #0 │ │ - beq.w 819f6 │ │ + beq.w 81a5e │ │ sub.w sl, r6, #2 │ │ mov r4, r6 │ │ mov.w fp, #0 │ │ mov.w r8, #0 │ │ movs r3, #0 │ │ ldrb.w r6, [r9], #1 │ │ cmp r3, #63 @ 0x3f │ │ - bne.n 80d2e │ │ + bne.n 80d96 │ │ cmp r6, #127 @ 0x7f │ │ it ne │ │ cmpne r6, #0 │ │ - bne.w 81b02 │ │ + bne.w 81b6a │ │ and.w r1, r3, #63 @ 0x3f │ │ and.w r0, r6, #127 @ 0x7f │ │ rsb r5, r1, #32 │ │ subs.w r2, r1, #32 │ │ add.w r3, r3, #7 │ │ lsr.w r5, r0, r5 │ │ it pl │ │ @@ -133994,142 +133907,142 @@ │ │ lsl.w r0, r0, r1 │ │ it pl │ │ movpl r0, #0 │ │ orr.w fp, fp, r0 │ │ orr.w r8, r8, r5 │ │ sxtb r0, r6 │ │ cmp r0, #0 │ │ - bpl.w 80f68 │ │ + bpl.w 80fd0 │ │ sub.w sl, sl, #1 │ │ adds.w r0, sl, #1 │ │ - bne.n 80d1c │ │ - b.w 8191e │ │ + bne.n 80d84 │ │ + b.w 81986 │ │ cmp.w sl, #0 │ │ - beq.w 819f6 │ │ + beq.w 81a5e │ │ mov r4, r6 │ │ sub.w sl, r6, #2 │ │ mov.w fp, #0 │ │ mov.w r8, #0 │ │ movs r2, #0 │ │ ldrb.w r3, [r9], #1 │ │ cmp r2, #63 @ 0x3f │ │ - bne.n 80d98 │ │ + bne.n 80e00 │ │ cmp r3, #1 │ │ - bhi.w 8196e │ │ + bhi.w 819d6 │ │ and.w r1, r2, #63 @ 0x3f │ │ and.w r0, r3, #127 @ 0x7f │ │ rsb r5, r1, #32 │ │ subs.w r6, r1, #32 │ │ lsr.w r5, r0, r5 │ │ it pl │ │ lslpl.w r5, r0, r6 │ │ lsl.w r0, r0, r1 │ │ it pl │ │ movpl r0, #0 │ │ orr.w fp, fp, r0 │ │ orr.w r8, r8, r5 │ │ sxtb r0, r3 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.w 81000 │ │ + bgt.w 81068 │ │ sub.w sl, sl, #1 │ │ adds r2, #7 │ │ adds.w r0, sl, #1 │ │ - bne.n 80d8a │ │ - b.w 818f6 │ │ + bne.n 80df2 │ │ + b.w 8195e │ │ movs r4, #54 @ 0x36 │ │ - b.n 8122c │ │ + b.n 81294 │ │ movs r4, #52 @ 0x34 │ │ - b.n 8122c │ │ + b.n 81294 │ │ movs r4, #53 @ 0x35 │ │ - b.n 8122c │ │ + b.n 81294 │ │ movs r4, #57 @ 0x39 │ │ - b.n 8122c │ │ + b.n 81294 │ │ cmp r6, #3 │ │ - bcc.w 81c96 │ │ + bcc.w 81cfe │ │ ldr r0, [sp, #144] @ 0x90 │ │ sub.w sl, r6, #3 │ │ movs r4, #55 @ 0x37 │ │ ldrh.w fp, [r0, #1] │ │ adds r0, #3 │ │ str r0, [sp, #424] @ 0x1a8 │ │ str.w sl, [sp, #428] @ 0x1ac │ │ mov.w r0, fp, lsr #8 │ │ str r0, [sp, #152] @ 0x98 │ │ - b.n 8122c │ │ + b.n 81294 │ │ str.w r8, [sp, #108] @ 0x6c │ │ uxtb r1, r2 │ │ ldrd r8, r0, [sp, #264] @ 0x108 │ │ cmp r0, r1 │ │ - bcc.w 81c80 │ │ + bcc.w 81ce8 │ │ add r8, r1 │ │ - beq.w 81908 │ │ + beq.w 81970 │ │ ldrb.w r2, [r8] │ │ cmp r2, #0 │ │ - beq.w 81040 │ │ + beq.w 810a8 │ │ cmp r2, #1 │ │ - bne.w 8104e │ │ + bne.w 810b6 │ │ cmp.w sl, #0 │ │ - beq.w 819f6 │ │ + beq.w 81a5e │ │ sub.w sl, r6, #2 │ │ mov.w fp, #0 │ │ mov.w r8, #0 │ │ movs r2, #0 │ │ ldrb.w ip, [r9], #1 │ │ cmp r2, #63 @ 0x3f │ │ - bne.n 80e5a │ │ + bne.n 80ec2 │ │ cmp.w ip, #1 │ │ - bhi.w 81b18 │ │ + bhi.w 81b80 │ │ and.w r1, r2, #63 @ 0x3f │ │ and.w r0, ip, #127 @ 0x7f │ │ rsb r4, r1, #32 │ │ subs.w r5, r1, #32 │ │ lsr.w r4, r0, r4 │ │ it pl │ │ lslpl.w r4, r0, r5 │ │ lsl.w r0, r0, r1 │ │ it pl │ │ movpl r0, #0 │ │ orr.w fp, fp, r0 │ │ orr.w r8, r8, r4 │ │ sxtb.w r0, ip │ │ cmp r0, #0 │ │ - bpl.w 81742 │ │ + bpl.w 817aa │ │ sub.w sl, sl, #1 │ │ adds r2, #7 │ │ adds.w r0, sl, #1 │ │ - bne.n 80e4a │ │ - b.w 81b72 │ │ + bne.n 80eb2 │ │ + b.w 81bda │ │ ldrh.w r0, [sp, #338] @ 0x152 │ │ cmp r0, #5 │ │ - bcs.n 80f4a │ │ + bcs.n 80fb2 │ │ cmp.w ip, #0 │ │ - beq.w 81908 │ │ + beq.w 81970 │ │ movs r3, #0 │ │ mov r0, r8 │ │ ldrb r1, [r0, #0] │ │ cmp r1, #0 │ │ - beq.w 811ba │ │ + beq.w 81222 │ │ adds r3, #1 │ │ adds r0, #1 │ │ cmp ip, r3 │ │ - bne.n 80eb2 │ │ - b.w 81908 │ │ + bne.n 80f1a │ │ + b.w 81970 │ │ cmp.w ip, #0 │ │ - beq.w 81c7a │ │ + beq.w 81ce2 │ │ ldr.w r9, [sp, #56] @ 0x38 │ │ movs r0, #0 │ │ mov.w fp, #0 │ │ mov r2, ip │ │ mov lr, r8 │ │ str r0, [sp, #164] @ 0xa4 │ │ ldrb.w r6, [lr], #1 │ │ cmp r0, #63 @ 0x3f │ │ - bne.n 80eec │ │ + bne.n 80f54 │ │ cmp r6, #1 │ │ - bhi.w 819b0 │ │ + bhi.w 81a18 │ │ and.w r1, r0, #63 @ 0x3f │ │ and.w r5, r6, #127 @ 0x7f │ │ rsb r3, r1, #32 │ │ subs.w r4, r1, #32 │ │ lsl.w r1, r5, r1 │ │ lsr.w r3, r5, r3 │ │ it pl │ │ @@ -134138,53 +134051,53 @@ │ │ it pl │ │ movpl r1, #0 │ │ ldr r3, [sp, #164] @ 0xa4 │ │ orrs r3, r1 │ │ sxtb r1, r6 │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ str r3, [sp, #164] @ 0xa4 │ │ - bgt.w 81112 │ │ + bgt.w 8117a │ │ subs r2, #1 │ │ add.w r0, r0, #7 │ │ - bne.n 80ede │ │ - b.w 819c4 │ │ + bne.n 80f46 │ │ + b.w 81a2c │ │ mov.w r0, r8, lsr #16 │ │ movs r4, #66 @ 0x42 │ │ str r0, [sp, #160] @ 0xa0 │ │ ubfx r0, r8, #8, #8 │ │ str r0, [sp, #152] @ 0x98 │ │ movs r0, #0 │ │ str r0, [sp, #144] @ 0x90 │ │ mov fp, ip │ │ str.w r8, [sp, #164] @ 0xa4 │ │ str r6, [sp, #120] @ 0x78 │ │ - b.n 81222 │ │ + b.n 8128a │ │ mov.w r0, r8, lsr #16 │ │ movs r4, #66 @ 0x42 │ │ str r0, [sp, #160] @ 0xa0 │ │ ubfx r0, r8, #8, #8 │ │ str r0, [sp, #152] @ 0x98 │ │ movs r0, #0 │ │ str r0, [sp, #144] @ 0x90 │ │ movs r0, #3 │ │ str r0, [sp, #120] @ 0x78 │ │ mov fp, ip │ │ str.w r8, [sp, #164] @ 0xa4 │ │ - b.n 81222 │ │ + b.n 8128a │ │ mov.w r0, fp, lsr #16 │ │ mov.w lr, #0 │ │ movs r4, #49 @ 0x31 │ │ str r0, [sp, #160] @ 0xa0 │ │ ubfx r0, fp, #8, #8 │ │ cmp r3, #63 @ 0x3f │ │ strd r9, sl, [sp, #424] @ 0x1a8 │ │ str r0, [sp, #152] @ 0x98 │ │ - bgt.n 80fb6 │ │ + bgt.n 8101e │ │ cmp r6, #64 @ 0x40 │ │ - bcc.n 80fb6 │ │ + bcc.n 8101e │ │ and.w r0, r3, #63 @ 0x3f │ │ mov.w r2, #4294967295 @ 0xffffffff │ │ subs.w r1, r0, #32 │ │ it pl │ │ lslpl r2, r1 │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ orr.w r8, r8, r2 │ │ @@ -134194,82 +134107,82 @@ │ │ orr.w fp, fp, r0 │ │ mov.w r0, fp, lsr #16 │ │ str r0, [sp, #160] @ 0xa0 │ │ ubfx r0, fp, #8, #8 │ │ str r0, [sp, #152] @ 0x98 │ │ str.w fp, [sp, #20] │ │ str.w r8, [sp, #84] @ 0x54 │ │ - b.n 8122c │ │ + b.n 81294 │ │ mov.w r0, fp, lsr #16 │ │ strd r9, sl, [sp, #424] @ 0x1a8 │ │ str r0, [sp, #160] @ 0xa0 │ │ ubfx r0, fp, #8, #8 │ │ str r0, [sp, #152] @ 0x98 │ │ mov.w lr, #0 │ │ movs r4, #58 @ 0x3a │ │ str.w fp, [sp, #28] │ │ str.w r8, [sp, #92] @ 0x5c │ │ - b.n 8122c │ │ + b.n 81294 │ │ mov.w r0, fp, lsr #16 │ │ strd r9, sl, [sp, #424] @ 0x1a8 │ │ str r0, [sp, #160] @ 0xa0 │ │ ubfx r0, fp, #8, #8 │ │ str r0, [sp, #152] @ 0x98 │ │ mov.w lr, #0 │ │ movs r4, #51 @ 0x33 │ │ str.w fp, [sp, #24] │ │ str.w r8, [sp, #88] @ 0x58 │ │ - b.n 8122c │ │ + b.n 81294 │ │ mov.w r0, fp, lsr #16 │ │ strd r9, sl, [sp, #424] @ 0x1a8 │ │ str r0, [sp, #160] @ 0xa0 │ │ ubfx r0, fp, #8, #8 │ │ str r0, [sp, #152] @ 0x98 │ │ mov.w lr, #0 │ │ movs r4, #50 @ 0x32 │ │ str.w fp, [sp, #36] @ 0x24 │ │ str.w r8, [sp, #100] @ 0x64 │ │ - b.n 8122c │ │ + b.n 81294 │ │ mov.w r0, fp, lsr #16 │ │ strd r9, sl, [sp, #424] @ 0x1a8 │ │ str r0, [sp, #160] @ 0xa0 │ │ ubfx r0, fp, #8, #8 │ │ str r0, [sp, #152] @ 0x98 │ │ mov.w lr, #0 │ │ movs r4, #48 @ 0x30 │ │ str.w fp, [sp, #32] │ │ str.w r8, [sp, #96] @ 0x60 │ │ - b.n 8122c │ │ + b.n 81294 │ │ movs r0, #0 │ │ mov fp, lr │ │ movs r4, #59 @ 0x3b │ │ mov lr, r0 │ │ ldr.w r8, [sp, #108] @ 0x6c │ │ - b.n 8122c │ │ + b.n 81294 │ │ ldr r0, [sp, #52] @ 0x34 │ │ movs r5, #0 │ │ mov r8, r9 │ │ mov r4, sl │ │ str.w sl, [sp, #12] │ │ str r2, [sp, #16] │ │ cmp r4, #0 │ │ - beq.w 81c7a │ │ + beq.w 81ce2 │ │ add.w fp, r8, #1 │ │ sub.w sl, r4, #1 │ │ movs r6, #0 │ │ movs r1, #0 │ │ movs r2, #0 │ │ str r5, [sp, #144] @ 0x90 │ │ str r0, [sp, #52] @ 0x34 │ │ str r4, [sp, #120] @ 0x78 │ │ ldrb.w r5, [fp, #-1] │ │ cmp r2, #63 @ 0x3f │ │ - bne.n 81084 │ │ + bne.n 810ec │ │ cmp r5, #1 │ │ - bhi.w 81a02 │ │ + bhi.w 81a6a │ │ and.w r0, r2, #63 @ 0x3f │ │ and.w r4, r5, #127 @ 0x7f │ │ rsb ip, r0, #32 │ │ subs.w r3, r0, #32 │ │ str r3, [sp, #164] @ 0xa4 │ │ mov r3, r5 │ │ lsr.w r5, r4, ip │ │ @@ -134280,73 +134193,73 @@ │ │ lslpl.w r5, r4, r3 │ │ it pl │ │ movpl r0, #0 │ │ orrs r6, r0 │ │ orrs r1, r5 │ │ sxtb.w r0, ip │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 810d0 │ │ + bgt.n 81138 │ │ sub.w sl, sl, #1 │ │ add.w fp, fp, #1 │ │ adds r2, #7 │ │ adds.w r4, sl, #1 │ │ - bne.n 81076 │ │ - b.w 81ac8 │ │ + bne.n 810de │ │ + b.w 81b30 │ │ ldr r5, [sp, #144] @ 0x90 │ │ mov r8, fp │ │ ldr r2, [sp, #16] │ │ mov r4, sl │ │ adds r5, #1 │ │ mov r0, r6 │ │ cmp r5, r2 │ │ strd fp, sl, [sp, #424] @ 0x1a8 │ │ str r1, [sp, #76] @ 0x4c │ │ - bne.n 8105c │ │ + bne.n 810c4 │ │ sub.w r2, fp, r9 │ │ ldr r0, [sp, #12] │ │ cmp r0, r2 │ │ - bcc.w 81db6 │ │ + bcc.w 81e1e │ │ mov.w r0, r9, lsr #16 │ │ mov r3, lr │ │ str r0, [sp, #160] @ 0xa0 │ │ ubfx r0, r9, #8, #8 │ │ str r0, [sp, #152] @ 0x98 │ │ movs r0, #0 │ │ movs r4, #61 @ 0x3d │ │ mov fp, r9 │ │ mov lr, r0 │ │ str r3, [sp, #120] @ 0x78 │ │ mov r8, r2 │ │ str r6, [sp, #52] @ 0x34 │ │ str r1, [sp, #76] @ 0x4c │ │ - b.n 8122c │ │ + b.n 81294 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ movs r4, #65 @ 0x41 │ │ str r0, [sp, #56] @ 0x38 │ │ str.w fp, [sp, #72] @ 0x48 │ │ lsrs r1, r0, #16 │ │ str r1, [sp, #160] @ 0xa0 │ │ ubfx r1, r0, #8, #8 │ │ str r1, [sp, #152] @ 0x98 │ │ movs r1, #0 │ │ str r1, [sp, #144] @ 0x90 │ │ - b.n 81222 │ │ + b.n 8128a │ │ cmp.w lr, #3 │ │ - bcc.w 81cb2 │ │ + bcc.w 81d1a │ │ ldrh.w fp, [r8] │ │ movs r4, #63 @ 0x3f │ │ mov.w r0, fp, lsr #8 │ │ str r0, [sp, #152] @ 0x98 │ │ movs r0, #0 │ │ str r0, [sp, #148] @ 0x94 │ │ str.w fp, [sp, #40] @ 0x28 │ │ strd r0, fp, [sp, #160] @ 0xa0 │ │ - b.n 811b2 │ │ + b.n 8121a │ │ cmp.w lr, #8 │ │ - bls.w 81cb2 │ │ + bls.w 81d1a │ │ ldrb.w r2, [r8, #2] │ │ movs r4, #63 @ 0x3f │ │ ldrb.w r1, [r9, #9] │ │ ldrh.w r3, [r8] │ │ ldr.w r0, [r9, #5] │ │ orr.w r2, r3, r2, lsl #16 │ │ lsls r1, r1, #24 │ │ @@ -134357,48 +134270,48 @@ │ │ lsrs r0, r0, #16 │ │ str.w fp, [sp, #148] @ 0x94 │ │ str r0, [sp, #160] @ 0xa0 │ │ lsrs r0, r3, #8 │ │ str r0, [sp, #152] @ 0x98 │ │ movs r0, #0 │ │ str r0, [sp, #144] @ 0x90 │ │ - b.n 81222 │ │ + b.n 8128a │ │ cmp.w lr, #5 │ │ - bcc.w 81cb2 │ │ + bcc.w 81d1a │ │ ldr.w fp, [r8] │ │ movs r4, #63 @ 0x3f │ │ str.w fp, [sp, #40] @ 0x28 │ │ str.w fp, [sp, #164] @ 0xa4 │ │ mov.w r0, fp, lsr #16 │ │ str r0, [sp, #160] @ 0xa0 │ │ ubfx r0, fp, #8, #8 │ │ str r0, [sp, #152] @ 0x98 │ │ movs r0, #0 │ │ str r0, [sp, #148] @ 0x94 │ │ mov.w fp, #0 │ │ str r0, [sp, #144] @ 0x90 │ │ - b.n 81222 │ │ + b.n 8128a │ │ mvns r0, r3 │ │ add r1, sp, #528 @ 0x210 │ │ add r0, ip │ │ str r0, [sp, #532] @ 0x214 │ │ add.w r0, r8, r3 │ │ mov r2, r8 │ │ adds r0, #1 │ │ str r0, [sp, #528] @ 0x210 │ │ add r0, sp, #536 @ 0x218 │ │ - bl 822ea │ │ + bl 82352 │ │ add.w lr, sp, #544 @ 0x220 │ │ ldrd r2, r1, [sp, #536] @ 0x218 │ │ ldr.w r9, [sp, #556] @ 0x22c │ │ ldmia.w lr, {r8, fp, lr} │ │ eor.w r0, r2, #46 @ 0x2e │ │ orrs r0, r1 │ │ str r1, [sp, #144] @ 0x90 │ │ - beq.w 818b0 │ │ + beq.w 81918 │ │ ldr r1, [sp, #68] @ 0x44 │ │ add.w ip, sp, #480 @ 0x1e0 │ │ str.w r9, [sp, #60] @ 0x3c │ │ mov r9, r2 │ │ ldmia r1!, {r0, r2, r3, r4, r5, r6} │ │ stmia.w ip!, {r0, r2, r3, r4, r5, r6} │ │ ldmia.w r1, {r0, r2, r3, r4, r5, r6} │ │ @@ -134424,15 +134337,15 @@ │ │ stmia r1!, {r0, r2, r3, r4, r5, r6} │ │ mov r5, lr │ │ ldr r0, [sp, #160] @ 0xa0 │ │ ldr r4, [sp, #120] @ 0x78 │ │ mov.w r9, r0, lsl #16 │ │ subs.w r0, fp, #46 @ 0x2e │ │ sbcs.w r0, lr, #0 │ │ - bcc.n 812d4 │ │ + bcc.n 8133c │ │ sub.w r1, fp, #46 @ 0x2e │ │ movs r0, #0 │ │ tbh [pc, r1, lsl #1] │ │ movs r5, r2 │ │ lsls r7, r7, #8 │ │ lsls r6, r3, #4 │ │ lsls r5, r0, #3 │ │ @@ -134451,43 +134364,43 @@ │ │ lsls r1, r3, #3 │ │ lsls r1, r1, #5 │ │ movs r1, r7 │ │ lsls r5, r3, #3 │ │ lsls r5, r5, #1 │ │ ldrb.w r5, [sp, #356] @ 0x164 │ │ cmp r5, #0 │ │ - beq.w 81df2 │ │ + beq.w 81e5a │ │ ldrb.w r0, [sp, #357] @ 0x165 │ │ ldr r1, [sp, #164] @ 0xa4 │ │ subs r4, r1, r0 │ │ mov r1, r5 │ │ uxtb r0, r4 │ │ - blx d5af0 │ │ + blx d5b00 │ │ mls r1, r0, r5, r4 │ │ ldrsb.w r2, [sp, #355] @ 0x163 │ │ asrs r3, r2, #31 │ │ uxtb r1, r1 │ │ adds r1, r1, r2 │ │ adcs.w r2, r3, #0 │ │ - bmi.w 815a4 │ │ + bmi.w 8160c │ │ ldrd r3, r6, [sp, #384] @ 0x180 │ │ adds r1, r1, r3 │ │ adcs r2, r6 │ │ ldrb.w r3, [sp, #416] @ 0x1a0 │ │ strd r1, r2, [sp, #384] @ 0x180 │ │ cmp r3, #0 │ │ - beq.w 815ce │ │ - b.n 816e0 │ │ + beq.w 81636 │ │ + b.n 81748 │ │ mov r6, r8 │ │ ldr.w r8, [sp, #332] @ 0x14c │ │ ldr r0, [sp, #324] @ 0x144 │ │ cmp r8, r0 │ │ - bne.n 812e6 │ │ + bne.n 8134e │ │ ldr r0, [sp, #112] @ 0x70 │ │ - bl 82578 │ │ + bl 825e0 │ │ ldr r1, [sp, #128] @ 0x80 │ │ uxtb r0, r4 │ │ add.w r2, r8, r8, lsl #3 │ │ ldr r3, [sp, #152] @ 0x98 │ │ mov lr, r6 │ │ orr.w r0, r0, r1, lsl #8 │ │ ldr r1, [sp, #328] @ 0x148 │ │ @@ -134510,188 +134423,188 @@ │ │ stmia.w ip, {r0, r2, r3, r4, r5, r6} │ │ add.w r0, r8, #1 │ │ mov r8, lr │ │ str r0, [sp, #332] @ 0x14c │ │ ldr.w sl, [sp, #428] @ 0x1ac │ │ movs r0, #0 │ │ cmp.w sl, #0 │ │ - bne.w 80a7a │ │ - b.n 81890 │ │ + bne.w 80ae2 │ │ + b.n 818f8 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ ldr r1, [sp, #152] @ 0x98 │ │ str.w r8, [sp, #404] @ 0x194 │ │ uxtb r0, r0 │ │ orr.w r0, r0, r1, lsl #8 │ │ uxth r0, r0 │ │ orr.w r0, r0, r9 │ │ str r0, [sp, #400] @ 0x190 │ │ - b.n 8133a │ │ + b.n 813a2 │ │ movs r0, #1 │ │ strb.w r0, [sp, #420] @ 0x1a4 │ │ - b.n 8133a │ │ + b.n 813a2 │ │ movs r0, #1 │ │ strb.w r0, [sp, #418] @ 0x1a2 │ │ - b.n 8133a │ │ + b.n 813a2 │ │ ldrb.w r1, [sp, #356] @ 0x164 │ │ cmp r1, #0 │ │ - beq.w 81de8 │ │ + beq.w 81e50 │ │ ldrb.w r0, [sp, #357] @ 0x165 │ │ ldrb.w r4, [sp, #416] @ 0x1a0 │ │ eor.w r0, r0, #255 @ 0xff │ │ - blx d5af0 │ │ + blx d5b00 │ │ cmp r4, #0 │ │ - bne.n 8133a │ │ + bne.n 813a2 │ │ ldrb.w r6, [sp, #354] @ 0x162 │ │ ldrb.w r5, [sp, #353] @ 0x161 │ │ cmp r6, #1 │ │ - beq.w 81620 │ │ + beq.w 81688 │ │ cmp r6, #0 │ │ - beq.w 81df8 │ │ + beq.w 81e60 │ │ ldrd r1, r2, [sp, #368] @ 0x170 │ │ movs r3, #0 │ │ mov fp, r8 │ │ adds.w r9, r1, r0 │ │ adc.w r4, r2, #0 │ │ mov r2, r6 │ │ mov r0, r9 │ │ mov r1, r4 │ │ - bl d53d0 │ │ + bl d53dc │ │ umull r2, r3, r0, r6 │ │ mla r3, r1, r6, r3 │ │ subs.w r2, r9, r2 │ │ sbc.w r3, r4, r3 │ │ - b.n 81628 │ │ + b.n 81690 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ ldr r1, [sp, #152] @ 0x98 │ │ str.w r8, [sp, #396] @ 0x18c │ │ uxtb r0, r0 │ │ orr.w r0, r0, r1, lsl #8 │ │ uxth r0, r0 │ │ orr.w r0, r0, r9 │ │ str r0, [sp, #392] @ 0x188 │ │ - b.n 8133a │ │ + b.n 813a2 │ │ movs r0, #1 │ │ strb.w r0, [sp, #421] @ 0x1a5 │ │ - b.n 8133a │ │ + b.n 813a2 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ cmp.w r8, #0 │ │ ldr r1, [sp, #152] @ 0x98 │ │ uxtb r0, r0 │ │ orr.w r0, r0, r1, lsl #8 │ │ uxth r0, r0 │ │ orr.w r0, r0, r9 │ │ - bmi.w 81584 │ │ + bmi.w 815ec │ │ ldrd r1, r2, [sp, #384] @ 0x180 │ │ adds r0, r0, r1 │ │ str r0, [sp, #384] @ 0x180 │ │ adc.w r0, r2, r8 │ │ str r0, [sp, #388] @ 0x184 │ │ - b.n 8133a │ │ + b.n 813a2 │ │ movs r0, #1 │ │ strb.w r0, [sp, #419] @ 0x1a3 │ │ - b.n 816e0 │ │ + b.n 81748 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ ldr r1, [sp, #152] @ 0x98 │ │ str.w r8, [sp, #412] @ 0x19c │ │ uxtb r0, r0 │ │ orr.w r0, r0, r1, lsl #8 │ │ uxth r0, r0 │ │ orr.w r0, r0, r9 │ │ str r0, [sp, #408] @ 0x198 │ │ - b.n 8133a │ │ + b.n 813a2 │ │ ldrb.w r0, [sp, #416] @ 0x1a0 │ │ cmp r0, #0 │ │ - bne.w 8133a │ │ + bne.w 813a2 │ │ ldr r2, [sp, #164] @ 0xa4 │ │ mov r6, r8 │ │ ldr r3, [sp, #152] @ 0x98 │ │ ldrd r0, r1, [sp, #360] @ 0x168 │ │ uxtb r2, r2 │ │ orr.w r2, r2, r3, lsl #8 │ │ uxth r2, r2 │ │ adds.w r8, r0, r2 │ │ adcs.w r1, r1, #0 │ │ mov.w r0, #0 │ │ adcs.w r0, r0, #0 │ │ - bne.w 81d76 │ │ + bne.w 81dde │ │ ldrb.w r0, [sp, #336] @ 0x150 │ │ movs r2, #56 @ 0x38 │ │ mov.w r3, #4294967295 @ 0xffffffff │ │ negs r0, r0 │ │ and.w r0, r2, r0, lsl #3 │ │ mov.w r2, #4294967295 @ 0xffffffff │ │ lsrs r2, r0 │ │ subs r0, #32 │ │ it pl │ │ movpl r2, #0 │ │ it pl │ │ lsrpl r3, r0 │ │ subs.w r0, r3, r8 │ │ sbcs.w r0, r2, r1 │ │ - bcc.w 81d76 │ │ + bcc.w 81dde │ │ movs r0, #0 │ │ strd r8, r1, [sp, #360] @ 0x168 │ │ strd r0, r0, [sp, #368] @ 0x170 │ │ mov r8, r6 │ │ - b.n 8133c │ │ + b.n 813a4 │ │ ldrb.w r0, [sp, #416] @ 0x1a0 │ │ cmp r0, #0 │ │ - bne.w 8133a │ │ + bne.w 813a2 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ ldr r1, [sp, #152] @ 0x98 │ │ ldrb.w r6, [sp, #354] @ 0x162 │ │ uxtb r0, r0 │ │ orr.w r0, r0, r1, lsl #8 │ │ cmp r6, #1 │ │ uxth r0, r0 │ │ orr.w r0, r0, r9 │ │ ldrb.w r9, [sp, #353] @ 0x161 │ │ - beq.w 8160a │ │ + beq.w 81672 │ │ cmp r6, #0 │ │ - beq.w 81e04 │ │ + beq.w 81e6c │ │ ldrd r1, r2, [sp, #368] @ 0x170 │ │ movs r3, #0 │ │ mov fp, r8 │ │ adds r5, r1, r0 │ │ adc.w r4, r2, r8 │ │ mov r2, r6 │ │ mov r0, r5 │ │ mov r1, r4 │ │ - bl d53d0 │ │ + bl d53dc │ │ umull r2, r3, r0, r6 │ │ mla r3, r1, r6, r3 │ │ subs r2, r5, r2 │ │ sbc.w r3, r4, r3 │ │ - b.n 81612 │ │ + b.n 8167a │ │ ldr r1, [sp, #164] @ 0xa4 │ │ ldr r3, [sp, #152] @ 0x98 │ │ ldrd r0, r2, [sp, #360] @ 0x168 │ │ uxtb r1, r1 │ │ orr.w r1, r1, r3, lsl #8 │ │ uxth r1, r1 │ │ orr.w r1, r1, r9 │ │ subs r0, r1, r0 │ │ sbcs.w r0, r8, r2 │ │ - bcs.n 8153e │ │ + bcs.n 815a6 │ │ movs r0, #1 │ │ strb.w r0, [sp, #416] @ 0x1a0 │ │ - b.n 8133a │ │ + b.n 813a2 │ │ ldrb.w r0, [sp, #417] @ 0x1a1 │ │ eor.w r0, r0, #1 │ │ strb.w r0, [sp, #417] @ 0x1a1 │ │ - b.n 8133a │ │ + b.n 813a2 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ ldr r1, [sp, #152] @ 0x98 │ │ str.w r8, [sp, #380] @ 0x17c │ │ uxtb r0, r0 │ │ orr.w r0, r0, r1, lsl #8 │ │ uxth r0, r0 │ │ orr.w r0, r0, r9 │ │ str r0, [sp, #376] @ 0x178 │ │ - b.n 8133a │ │ + b.n 813a2 │ │ ldrb.w r0, [sp, #336] @ 0x150 │ │ movs r2, #56 @ 0x38 │ │ mov.w r3, #4294967295 @ 0xffffffff │ │ negs r0, r0 │ │ and.w r0, r2, r0, lsl #3 │ │ mov.w r2, #4294967295 @ 0xffffffff │ │ lsrs r2, r0 │ │ @@ -134708,136 +134621,136 @@ │ │ it cs │ │ movcs r2, #1 │ │ strb.w r2, [sp, #416] @ 0x1a0 │ │ cmp r2, #0 │ │ itt eq │ │ strdeq r0, r0, [sp, #368] @ 0x170 │ │ strdeq r1, r8, [sp, #360] @ 0x168 │ │ - b.n 8133c │ │ + b.n 813a4 │ │ ldrd r2, r1, [sp, #384] @ 0x180 │ │ negs r3, r0 │ │ mov.w r6, #0 │ │ sbc.w r6, r6, r8 │ │ subs r3, r2, r3 │ │ sbcs.w r3, r1, r6 │ │ - bcs.w 81736 │ │ + bcs.w 8179e │ │ movs r0, #0 │ │ strd r0, r0, [sp, #384] @ 0x180 │ │ - b.n 8133c │ │ + b.n 813a4 │ │ ldrd r3, r6, [sp, #384] @ 0x180 │ │ negs r5, r1 │ │ mov.w r4, #0 │ │ sbcs r4, r2 │ │ adds r1, r1, r3 │ │ adcs r2, r6 │ │ subs r3, r3, r5 │ │ sbcs.w r3, r6, r4 │ │ itt cc │ │ movcc r2, #0 │ │ movcc r1, #0 │ │ ldrb.w r3, [sp, #416] @ 0x1a0 │ │ strd r1, r2, [sp, #384] @ 0x180 │ │ cmp r3, #0 │ │ - bne.w 816e0 │ │ + bne.w 81748 │ │ ldrb.w r6, [sp, #354] @ 0x162 │ │ uxtb r0, r0 │ │ ldrb.w r9, [sp, #353] @ 0x161 │ │ cmp r6, #1 │ │ - beq.n 81682 │ │ + beq.n 816ea │ │ cmp r6, #0 │ │ - beq.w 81dfe │ │ + beq.w 81e66 │ │ ldrd r1, r2, [sp, #368] @ 0x170 │ │ movs r3, #0 │ │ mov fp, r8 │ │ adds r5, r1, r0 │ │ adc.w r4, r2, #0 │ │ mov r2, r6 │ │ mov r0, r5 │ │ mov r1, r4 │ │ - bl d53d0 │ │ + bl d53dc │ │ umull r2, r3, r0, r6 │ │ mla r3, r1, r6, r3 │ │ subs r2, r5, r2 │ │ sbc.w r3, r4, r3 │ │ - b.n 8168a │ │ + b.n 816f2 │ │ movs r2, #0 │ │ movs r3, #0 │ │ mov fp, r8 │ │ mov r1, r8 │ │ umull r0, r6, r0, r9 │ │ strd r2, r3, [sp, #368] @ 0x170 │ │ mla r1, r1, r9, r6 │ │ - b.n 81634 │ │ + b.n 8169c │ │ mov fp, r8 │ │ movs r2, #0 │ │ movs r3, #0 │ │ movs r1, #0 │ │ umull r0, r6, r0, r5 │ │ strd r2, r3, [sp, #368] @ 0x170 │ │ mla r1, r1, r5, r6 │ │ ldrd r6, r5, [sp, #360] @ 0x168 │ │ adds.w r8, r0, r6 │ │ adcs.w r0, r1, r5 │ │ mov.w r1, #0 │ │ adcs.w r1, r1, #0 │ │ - bne.w 81cae │ │ + bne.w 81d16 │ │ ldrb.w r1, [sp, #336] @ 0x150 │ │ movs r2, #56 @ 0x38 │ │ mov.w r3, #4294967295 @ 0xffffffff │ │ negs r1, r1 │ │ and.w r1, r2, r1, lsl #3 │ │ mov.w r2, #4294967295 @ 0xffffffff │ │ lsrs r2, r1 │ │ subs r1, #32 │ │ it pl │ │ movpl r2, #0 │ │ it pl │ │ lsrpl r3, r1 │ │ subs.w r1, r3, r8 │ │ sbcs.w r1, r2, r0 │ │ - bcc.w 81cae │ │ + bcc.w 81d16 │ │ str.w r8, [sp, #360] @ 0x168 │ │ mov r8, fp │ │ str r0, [sp, #364] @ 0x16c │ │ - b.n 8133a │ │ + b.n 813a2 │ │ mov fp, r8 │ │ movs r2, #0 │ │ movs r3, #0 │ │ movs r1, #0 │ │ umull r0, r6, r0, r9 │ │ strd r2, r3, [sp, #368] @ 0x170 │ │ mla r1, r1, r9, r6 │ │ ldrd r6, r5, [sp, #360] @ 0x168 │ │ adds.w r8, r0, r6 │ │ adcs.w r0, r1, r5 │ │ mov.w r1, #0 │ │ adcs.w r1, r1, #0 │ │ - bne.w 81cae │ │ + bne.w 81d16 │ │ ldrb.w r1, [sp, #336] @ 0x150 │ │ movs r2, #56 @ 0x38 │ │ mov.w r3, #4294967295 @ 0xffffffff │ │ negs r1, r1 │ │ and.w r1, r2, r1, lsl #3 │ │ mov.w r2, #4294967295 @ 0xffffffff │ │ lsrs r2, r1 │ │ subs r1, #32 │ │ it pl │ │ movpl r2, #0 │ │ it pl │ │ lsrpl r3, r1 │ │ subs.w r1, r3, r8 │ │ sbcs.w r1, r2, r0 │ │ - bcc.w 81cae │ │ + bcc.w 81d16 │ │ strd r8, r0, [sp, #360] @ 0x168 │ │ mov r8, fp │ │ ldrb.w r0, [sp, #416] @ 0x1a0 │ │ cmp r0, #0 │ │ - beq.w 818a0 │ │ + beq.w 81908 │ │ ldrb.w r0, [sp, #419] @ 0x1a3 │ │ - cbz r0, 81724 │ │ + cbz r0, 8178c │ │ ldr r0, [sp, #132] @ 0x84 │ │ movs r2, #0 │ │ ldrb.w r1, [sp, #352] @ 0x160 │ │ str r2, [sp, #388] @ 0x184 │ │ strd r2, r2, [r0] │ │ strd r2, r2, [r0, #8] │ │ ldr r0, [sp, #124] @ 0x7c │ │ @@ -134846,124 +134759,124 @@ │ │ strd r2, r2, [r0] │ │ strd r2, r2, [r0, #8] │ │ strd r2, r2, [r0, #16] │ │ strb r2, [r0, #24] │ │ movs r0, #1 │ │ str r0, [sp, #384] @ 0x180 │ │ strd r0, r2, [sp, #376] @ 0x178 │ │ - b.n 8133c │ │ + b.n 813a4 │ │ movs r0, #0 │ │ strd r0, r0, [sp, #408] @ 0x198 │ │ strh.w r0, [sp, #420] @ 0x1a4 │ │ strb.w r0, [sp, #418] @ 0x1a2 │ │ movs r0, #1 │ │ - b.n 8133c │ │ + b.n 813a4 │ │ adds r0, r0, r2 │ │ str r0, [sp, #384] @ 0x180 │ │ adc.w r0, r1, r8 │ │ str r0, [sp, #388] @ 0x184 │ │ - b.n 8133a │ │ + b.n 813a2 │ │ mov.w r0, fp, lsr #16 │ │ mov r3, lr │ │ str r0, [sp, #160] @ 0xa0 │ │ ubfx r0, fp, #8, #8 │ │ str r0, [sp, #152] @ 0x98 │ │ movs r0, #0 │ │ strd r9, sl, [sp, #424] @ 0x1a8 │ │ movs r4, #60 @ 0x3c │ │ str.w fp, [sp, #8] │ │ mov lr, r0 │ │ str.w r8, [sp, #64] @ 0x40 │ │ str r3, [sp, #120] @ 0x78 │ │ - b.n 8122c │ │ + b.n 81294 │ │ mov.w fp, #0 │ │ cmp.w fp, #0 │ │ - beq.w 8192e │ │ + beq.w 81996 │ │ ldrb.w r0, [r5, #59] @ 0x3b │ │ str.w fp, [sp, #140] @ 0x8c │ │ str r1, [sp, #148] @ 0x94 │ │ - cbz r0, 817cc │ │ + cbz r0, 81834 │ │ cmp r4, #0 │ │ - beq.n 81840 │ │ + beq.n 818a8 │ │ str.w r8, [sp, #116] @ 0x74 │ │ ldrd r0, r8, [sp, #180] @ 0xb4 │ │ ldrd r2, r1, [r5] │ │ ldrd fp, sl, [r8] │ │ cmp r0, r4 │ │ strd r2, r1, [sp, #160] @ 0xa0 │ │ mov.w r1, #0 │ │ mov.w r2, #8 │ │ str r5, [sp, #136] @ 0x88 │ │ str r1, [sp, #180] @ 0xb4 │ │ strd r2, r1, [sp, #184] @ 0xb8 │ │ - bls.n 81844 │ │ + bls.n 818ac │ │ add.w r0, r4, r4, lsl #1 │ │ mov r9, r4 │ │ lsls r6, r0, #3 │ │ mov r0, r8 │ │ mov r1, r6 │ │ - blx d8870 │ │ + blx d8880 │ │ mov r5, r0 │ │ cmp r0, #0 │ │ - beq.w 81dde │ │ + beq.w 81e46 │ │ ldr r4, [sp, #176] @ 0xb0 │ │ ldr r0, [sp, #168] @ 0xa8 │ │ cmp r4, r0 │ │ - beq.n 81850 │ │ - b.n 81856 │ │ + beq.n 818b8 │ │ + b.n 818be │ │ mov r0, r5 │ │ ldrd fp, sl, [r5] │ │ ldrd r3, r6, [r5, #16] │ │ ldr r5, [r5, #24] │ │ ldr.w ip, [r0, #32] │ │ str r0, [sp, #136] @ 0x88 │ │ - cbz r4, 81804 │ │ + cbz r4, 8186c │ │ ldr r0, [sp, #184] @ 0xb8 │ │ add.w r1, r4, r4, lsl #1 │ │ add.w r0, r0, r1, lsl #3 │ │ ldrd r1, r2, [r0, #-24] │ │ eor.w r2, r2, sl │ │ eor.w r1, r1, fp │ │ orrs r1, r2 │ │ - bne.n 81804 │ │ + bne.n 8186c │ │ strd r3, r6, [r0, #-16] │ │ strd r5, ip, [r0, #-8] │ │ - b.n 8187e │ │ + b.n 818e6 │ │ add r0, sp, #156 @ 0x9c │ │ mov r9, r4 │ │ stmia.w r0, {r3, r5, ip} │ │ ldr r0, [sp, #180] @ 0xb4 │ │ cmp r4, r0 │ │ - bne.n 81818 │ │ + bne.n 81880 │ │ add r0, sp, #180 @ 0xb4 │ │ - bl 827d8 │ │ + bl 82840 │ │ ldr r0, [sp, #184] @ 0xb8 │ │ add.w r1, r9, r9, lsl #1 │ │ add.w r4, r9, #1 │ │ str r4, [sp, #188] @ 0xbc │ │ str.w fp, [r0, r1, lsl #3] │ │ add.w r0, r0, r1, lsl #3 │ │ ldr r1, [sp, #156] @ 0x9c │ │ strd r1, r6, [r0, #8] │ │ ldr r1, [sp, #160] @ 0xa0 │ │ str r1, [r0, #16] │ │ ldr r1, [sp, #164] @ 0xa4 │ │ str.w sl, [r0, #4] │ │ str r1, [r0, #20] │ │ - b.n 8187e │ │ + b.n 818e6 │ │ movs r4, #0 │ │ - b.n 81880 │ │ + b.n 818e8 │ │ mov r9, r4 │ │ mov r5, r8 │ │ ldr r4, [sp, #176] @ 0xb0 │ │ ldr r0, [sp, #168] @ 0xa8 │ │ cmp r4, r0 │ │ - bne.n 81856 │ │ + bne.n 818be │ │ add r0, sp, #168 @ 0xa8 │ │ - bl 827d8 │ │ + bl 82840 │ │ ldr r0, [sp, #172] @ 0xac │ │ add.w r1, r4, r4, lsl #1 │ │ ldr.w r8, [sp, #116] @ 0x74 │ │ str.w r5, [r0, r1, lsl #3] │ │ add.w r0, r0, r1, lsl #3 │ │ ldr r1, [sp, #160] @ 0xa0 │ │ str r1, [r0, #16] │ │ @@ -134974,278 +134887,278 @@ │ │ adds r0, r4, #1 │ │ str r0, [sp, #176] @ 0xb0 │ │ movs r4, #0 │ │ ldr r5, [sp, #136] @ 0x88 │ │ ldrb.w r0, [sp, #419] @ 0x1a3 │ │ ldr r1, [sp, #148] @ 0x94 │ │ lsls r0, r0, #31 │ │ - bne.w 80a06 │ │ - b.w 80a36 │ │ + bne.w 80a6e │ │ + b.w 80a9e │ │ mov.w fp, #0 │ │ ldr.w r8, [sp, #116] @ 0x74 │ │ ldr r1, [sp, #148] @ 0x94 │ │ ldr r4, [sp, #104] @ 0x68 │ │ ldr r5, [sp, #136] @ 0x88 │ │ - b.n 8176a │ │ + b.n 817d2 │ │ add.w fp, sp, #192 @ 0xc0 │ │ ldr r5, [sp, #132] @ 0x84 │ │ ldr.w r8, [sp, #116] @ 0x74 │ │ ldr r1, [sp, #148] @ 0x94 │ │ ldr r4, [sp, #104] @ 0x68 │ │ - b.n 8176a │ │ + b.n 817d2 │ │ movs r0, #0 │ │ mov r5, lr │ │ str r0, [sp, #428] @ 0x1ac │ │ movs r0, #1 │ │ str r0, [sp, #424] @ 0x1a8 │ │ uxtb.w r0, r8 │ │ mov.w r4, r8, lsr #16 │ │ cmp r0, #82 @ 0x52 │ │ - bne.w 81d9a │ │ + bne.w 81e02 │ │ mov r8, r4 │ │ - b.n 818aa │ │ + b.n 81912 │ │ movs r0, #6 │ │ str r0, [sp, #164] @ 0xa4 │ │ mov.w sl, #0 │ │ ldr.w fp, [sp, #160] @ 0xa0 │ │ mov.w r9, #0 │ │ - b.n 81b8e │ │ + b.n 81bf6 │ │ ldr r0, [sp, #108] @ 0x6c │ │ mov sl, r1 │ │ ldr r2, [sp, #144] @ 0x90 │ │ add.w r8, r2, r0 │ │ mov.w r9, #0 │ │ movs r0, #19 │ │ str r0, [sp, #164] @ 0xa4 │ │ ldr.w fp, [sp, #160] @ 0xa0 │ │ - b.n 81b8a │ │ + b.n 81bf2 │ │ movs r0, #0 │ │ mov sl, r3 │ │ str r0, [sp, #428] @ 0x1ac │ │ ldr r0, [sp, #144] @ 0x90 │ │ add.w r8, r0, r4 │ │ str.w r8, [sp, #424] @ 0x1a8 │ │ - b.n 81b7e │ │ + b.n 81be6 │ │ movs r0, #19 │ │ mov.w r9, #0 │ │ str r0, [sp, #164] @ 0xa4 │ │ ldr.w sl, [sp, #152] @ 0x98 │ │ - b.n 818f0 │ │ + b.n 81958 │ │ mov.w sl, #0 │ │ mov r8, r9 │ │ - b.n 818e8 │ │ + b.n 81950 │ │ movs r0, #0 │ │ str r0, [sp, #428] @ 0x1ac │ │ ldr r0, [sp, #144] @ 0x90 │ │ add.w r8, r0, r4 │ │ str.w r8, [sp, #424] @ 0x1a8 │ │ - b.n 819c6 │ │ + b.n 81a2e │ │ ldr r1, [sp, #176] @ 0xb0 │ │ cmp r1, #2 │ │ - bcs.w 81daa │ │ + bcs.w 81e12 │ │ ldrh.w r0, [sp, #338] @ 0x152 │ │ movs r1, #0 │ │ movs r2, #4 │ │ str r1, [sp, #488] @ 0x1e8 │ │ cmp r0, #5 │ │ strd r1, r2, [sp, #480] @ 0x1e0 │ │ - bcs.n 819ca │ │ + bcs.n 81a32 │ │ ldrd r0, r1, [sp, #192] @ 0xc0 │ │ eor.w r0, r0, #46 @ 0x2e │ │ orrs r0, r1 │ │ - beq.n 81a18 │ │ + beq.n 81a80 │ │ add r3, sp, #192 @ 0xc0 │ │ - b.n 819d0 │ │ + b.n 81a38 │ │ movs r0, #6 │ │ mov.w sl, #0 │ │ str r0, [sp, #164] @ 0xa4 │ │ mov.w fp, #0 │ │ ldr.w r8, [sp, #24] │ │ ldr.w r9, [sp, #88] @ 0x58 │ │ - b.n 818dc │ │ + b.n 81944 │ │ movs r0, #6 │ │ mov.w sl, #0 │ │ str r0, [sp, #164] @ 0xa4 │ │ mov.w fp, #0 │ │ ldr.w r8, [sp, #36] @ 0x24 │ │ ldr.w r9, [sp, #100] @ 0x64 │ │ - b.n 818dc │ │ + b.n 81944 │ │ movs r0, #6 │ │ mov.w sl, #0 │ │ str r0, [sp, #164] @ 0xa4 │ │ mov.w fp, #0 │ │ ldr.w r8, [sp, #28] │ │ ldr.w r9, [sp, #92] @ 0x5c │ │ - b.n 818dc │ │ + b.n 81944 │ │ movs r0, #6 │ │ mov.w sl, #0 │ │ str r0, [sp, #164] @ 0xa4 │ │ mov.w fp, #0 │ │ ldr.w r8, [sp, #32] │ │ ldr.w r9, [sp, #96] @ 0x60 │ │ - b.n 818dc │ │ + b.n 81944 │ │ movs r0, #6 │ │ mov r8, r9 │ │ str r0, [sp, #164] @ 0xa4 │ │ mov.w sl, #0 │ │ mov.w fp, #0 │ │ ldr.w r9, [sp, #72] @ 0x48 │ │ - b.n 818dc │ │ + b.n 81944 │ │ add r8, ip │ │ mov sl, r6 │ │ - b.n 81b7e │ │ + b.n 81be6 │ │ ldr r0, [sp, #332] @ 0x14c │ │ - cbz r0, 81a18 │ │ + cbz r0, 81a80 │ │ ldr r3, [sp, #328] @ 0x148 │ │ add r0, sp, #192 @ 0xc0 │ │ ldrd r1, r2, [sp, #44] @ 0x2c │ │ str r0, [sp, #0] │ │ add r0, sp, #536 @ 0x218 │ │ - bl 82856 │ │ + bl 828be │ │ ldrb.w r0, [sp, #536] @ 0x218 │ │ cmp r0, #82 @ 0x52 │ │ - bne.w 81c52 │ │ + bne.w 81cba │ │ ldrd r5, r4, [sp, #540] @ 0x21c │ │ ldr r6, [sp, #548] @ 0x224 │ │ add r0, sp, #480 @ 0x1e0 │ │ - bl 82a2c │ │ - b.n 81a24 │ │ + bl 82a94 │ │ + b.n 81a8c │ │ mov.w sl, #0 │ │ mov r8, r9 │ │ - b.n 81b7e │ │ + b.n 81be6 │ │ movs r0, #56 @ 0x38 │ │ - b.n 818ce │ │ + b.n 81936 │ │ movs r0, #6 │ │ mov.w sl, #0 │ │ str r0, [sp, #164] @ 0xa4 │ │ mov.w fp, #0 │ │ ldr.w r8, [sp, #52] @ 0x34 │ │ ldr.w r9, [sp, #76] @ 0x4c │ │ - b.n 818dc │ │ + b.n 81944 │ │ add r0, sp, #480 @ 0x1e0 │ │ - bl 82a2c │ │ + bl 82a94 │ │ movs r4, #1 │ │ movs r5, #0 │ │ movs r6, #0 │ │ ldr.w sl, [sp, #484] @ 0x1e4 │ │ add.w r8, sp, #536 @ 0x218 │ │ mov.w r9, #0 │ │ strd r5, r4, [sl] │ │ movs r4, #1 │ │ str.w r6, [sl, #8] │ │ str r4, [sp, #488] @ 0x1e8 │ │ - b.n 81a56 │ │ + b.n 81abe │ │ add.w r0, r4, r4, lsl #1 │ │ adds r4, #1 │ │ adc.w r9, r9, #0 │ │ str.w r6, [sl, r0, lsl #2] │ │ add.w r0, sl, r0, lsl #2 │ │ strd fp, r5, [r0, #4] │ │ str r4, [sp, #488] @ 0x1e8 │ │ ldrh.w r0, [sp, #338] @ 0x152 │ │ cmp r0, #5 │ │ - bcs.n 81a78 │ │ + bcs.n 81ae0 │ │ orrs.w r0, r4, r9 │ │ - beq.n 81a8a │ │ + beq.n 81af2 │ │ ldr r1, [sp, #332] @ 0x14c │ │ subs r0, r4, #1 │ │ cmp r0, r1 │ │ - bcs.n 81b2e │ │ + bcs.n 81b96 │ │ ldr r1, [sp, #328] @ 0x148 │ │ add.w r0, r0, r0, lsl #3 │ │ add.w r3, r1, r0, lsl #3 │ │ - b.n 81a9a │ │ + b.n 81b02 │ │ ldr r0, [sp, #332] @ 0x14c │ │ cmp r0, r4 │ │ - bls.n 81b2e │ │ + bls.n 81b96 │ │ ldr r0, [sp, #328] @ 0x148 │ │ add.w r1, r4, r4, lsl #3 │ │ add.w r3, r0, r1, lsl #3 │ │ - b.n 81a9a │ │ + b.n 81b02 │ │ ldrd r0, r1, [sp, #192] @ 0xc0 │ │ eor.w r0, r0, #46 @ 0x2e │ │ orrs r0, r1 │ │ - beq.w 81cc0 │ │ + beq.w 81d28 │ │ add r3, sp, #192 @ 0xc0 │ │ ldrd r1, r2, [sp, #44] @ 0x2c │ │ add r0, sp, #192 @ 0xc0 │ │ str r0, [sp, #0] │ │ mov r0, r8 │ │ - bl 82856 │ │ + bl 828be │ │ ldrb.w r0, [sp, #536] @ 0x218 │ │ cmp r0, #82 @ 0x52 │ │ - bne.n 81ace │ │ + bne.n 81b36 │ │ ldrd r6, fp, [sp, #540] @ 0x21c │ │ ldr r5, [sp, #548] @ 0x224 │ │ ldr r0, [sp, #480] @ 0x1e0 │ │ cmp r0, r4 │ │ - bne.n 81a3e │ │ + bne.n 81aa6 │ │ add r0, sp, #480 @ 0x1e0 │ │ - bl 82a2c │ │ + bl 82a94 │ │ ldr.w sl, [sp, #484] @ 0x1e4 │ │ - b.n 81a3e │ │ + b.n 81aa6 │ │ ldr r0, [sp, #120] @ 0x78 │ │ add r8, r0 │ │ - b.n 81b78 │ │ + b.n 81be0 │ │ add.w r9, sp, #540 @ 0x21c │ │ ldrh.w fp, [sp, #538] @ 0x21a │ │ ldrb.w r6, [sp, #537] @ 0x219 │ │ cmp r4, #0 │ │ str r0, [sp, #164] @ 0xa4 │ │ ldmia.w r9, {r0, r8, r9} │ │ str r0, [sp, #140] @ 0x8c │ │ - beq.w 81c6a │ │ + beq.w 81cd2 │ │ add.w r5, sl, #4 │ │ ldr.w r0, [r5, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #12 │ │ subs r4, #1 │ │ - bne.n 81aec │ │ - b.n 81c6a │ │ + bne.n 81b54 │ │ + b.n 81cd2 │ │ ldr.w r8, [sp, #20] │ │ movs r0, #7 │ │ ldr.w r9, [sp, #84] @ 0x54 │ │ mov.w sl, #0 │ │ mov.w fp, #0 │ │ str r0, [sp, #164] @ 0xa4 │ │ - b.n 818dc │ │ + b.n 81944 │ │ movs r0, #6 │ │ mov.w sl, #0 │ │ str r0, [sp, #164] @ 0xa4 │ │ mov.w fp, #0 │ │ ldr.w r8, [sp, #8] │ │ ldr.w r9, [sp, #64] @ 0x40 │ │ - b.n 818dc │ │ + b.n 81944 │ │ ldrd r0, r6, [sp, #480] @ 0x1e0 │ │ ubfx sl, r4, #8, #8 │ │ uxtb r1, r4 │ │ mov.w fp, r4, lsr #16 │ │ cmp r0, r4 │ │ str r1, [sp, #164] @ 0xa4 │ │ - bls.w 81cf2 │ │ + bls.w 81d5a │ │ cmp r4, #0 │ │ - beq.w 81ce0 │ │ + beq.w 81d48 │ │ add.w r0, r0, r0, lsl #1 │ │ movs r2, #4 │ │ lsls r1, r0, #2 │ │ add.w r0, r4, r4, lsl #1 │ │ lsls r5, r0, #2 │ │ mov r0, r6 │ │ mov r3, r5 │ │ - bl 4194c │ │ + bl 41c54 │ │ mov r6, r0 │ │ cmp r0, #0 │ │ - bne.w 81cf2 │ │ + bne.w 81d5a │ │ movs r0, #4 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ - b.n 81e0c │ │ + bl 3e2ac │ │ + b.n 81e74 │ │ ldr r0, [sp, #144] @ 0x90 │ │ add.w r8, r0, r6 │ │ str.w r8, [sp, #424] @ 0x1a8 │ │ mov sl, ip │ │ mov.w fp, #0 │ │ movs r0, #19 │ │ str r0, [sp, #164] @ 0xa4 │ │ @@ -135255,50 +135168,50 @@ │ │ str r0, [sp, #428] @ 0x1ac │ │ movs r0, #1 │ │ str r0, [sp, #424] @ 0x1a8 │ │ ldr r0, [sp, #288] @ 0x120 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #292] @ 0x124 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #300] @ 0x12c │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #304] @ 0x130 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #312] @ 0x138 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #316] @ 0x13c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #324] @ 0x144 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #328] @ 0x148 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #180] @ 0xb4 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #184] @ 0xb8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r4, r6, [sp, #172] @ 0xac │ │ - cbz r6, 81bee │ │ + cbz r6, 81c56 │ │ adds r5, r4, #4 │ │ ldr r0, [r5, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r5, #-4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #24 │ │ subs r6, #1 │ │ - bne.n 81bda │ │ + bne.n 81c42 │ │ ldr r0, [sp, #168] @ 0xa8 │ │ - cbz r0, 81bf8 │ │ + cbz r0, 81c60 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r0, #1 │ │ ldr r4, [sp, #80] @ 0x50 │ │ mov.w r1, sl, lsl #8 │ │ ldr r3, [sp, #164] @ 0xa4 │ │ orr.w r1, r1, fp, lsl #16 │ │ ldr r2, [r4, #0] │ │ add r1, r3 │ │ @@ -135317,364 +135230,364 @@ │ │ popeq {r4, r5, r6, r7, pc} │ │ ldr r2, [sp, #140] @ 0x8c │ │ strd r0, r6, [sp, #200] @ 0xc8 │ │ add r0, sp, #192 @ 0xc0 │ │ strd r8, r9, [sp, #216] @ 0xd8 │ │ strd r1, r2, [sp, #208] @ 0xd0 │ │ str r4, [sp, #192] @ 0xc0 │ │ - bl 82a68 │ │ - ldr r0, [pc, #656] @ (81ed8 ) │ │ + bl 82ad0 │ │ + ldr r0, [pc, #656] @ (81f40 ) │ │ movs r1, #29 │ │ - ldr r2, [pc, #656] @ (81edc ) │ │ + ldr r2, [pc, #656] @ (81f44 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ add.w r9, sp, #540 @ 0x21c │ │ str r0, [sp, #164] @ 0xa4 │ │ ldrh.w fp, [sp, #538] @ 0x21a │ │ mov.w sl, #4 │ │ ldmia.w r9, {r0, r8, r9} │ │ str r0, [sp, #140] @ 0x8c │ │ ldrb.w r6, [sp, #537] @ 0x219 │ │ ldr r0, [sp, #480] @ 0x1e0 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, sl │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov sl, r6 │ │ - b.n 81b96 │ │ + b.n 81bfe │ │ mov.w sl, #0 │ │ - b.n 81b7e │ │ + b.n 81be6 │ │ ldr.w sl, [sp, #152] @ 0x98 │ │ movs r0, #19 │ │ ldr.w fp, [sp, #160] @ 0xa0 │ │ mov.w r9, #0 │ │ str r0, [sp, #164] @ 0xa4 │ │ ldr r0, [sp, #108] @ 0x6c │ │ str r0, [sp, #140] @ 0x8c │ │ - b.n 81b8e │ │ + b.n 81bf6 │ │ movs r1, #19 │ │ movs r0, #0 │ │ str r1, [sp, #164] @ 0xa4 │ │ mov r8, r9 │ │ str.w r9, [sp, #140] @ 0x8c │ │ mov r9, r0 │ │ ldr.w sl, [sp, #152] @ 0x98 │ │ ldr.w fp, [sp, #160] @ 0xa0 │ │ - b.n 81b8e │ │ + b.n 81bf6 │ │ mov r9, r0 │ │ - b.n 81d78 │ │ + b.n 81de0 │ │ movs r0, #19 │ │ mov.w sl, #0 │ │ str r0, [sp, #164] @ 0xa4 │ │ mov.w fp, #0 │ │ - b.n 81b86 │ │ + b.n 81bee │ │ ldrd r0, r6, [sp, #480] @ 0x1e0 │ │ movs r1, #0 │ │ mov.w r8, #0 │ │ movs r5, #0 │ │ cmp r0, r4 │ │ mov.w sl, #0 │ │ mov.w fp, #0 │ │ mov.w r4, #0 │ │ str r1, [sp, #164] @ 0xa4 │ │ - bhi.n 81ce4 │ │ - b.n 81cf2 │ │ + bhi.n 81d4c │ │ + b.n 81d5a │ │ mov r8, sl │ │ mov r5, fp │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r6, #4 │ │ movs r4, #0 │ │ mov sl, r8 │ │ mov fp, r5 │ │ ldrd r0, r1, [sp, #168] @ 0xa8 │ │ ldr.w r8, [sp, #176] @ 0xb0 │ │ str r1, [sp, #140] @ 0x8c │ │ cmp r0, r8 │ │ - bls.n 81d34 │ │ + bls.n 81d9c │ │ cmp.w r8, #0 │ │ - beq.n 81d2a │ │ + beq.n 81d92 │ │ add.w r0, r0, r0, lsl #1 │ │ movs r2, #8 │ │ lsls r1, r0, #3 │ │ add.w r0, r8, r8, lsl #1 │ │ lsls r5, r0, #3 │ │ ldr r0, [sp, #140] @ 0x8c │ │ mov r3, r5 │ │ - bl 4194c │ │ + bl 41c54 │ │ str r0, [sp, #140] @ 0x8c │ │ - cbnz r0, 81d34 │ │ + cbnz r0, 81d9c │ │ movs r0, #8 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ - b.n 81e0c │ │ + bl 3e2ac │ │ + b.n 81e74 │ │ ldr r0, [sp, #140] @ 0x8c │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r0, #8 │ │ str r0, [sp, #140] @ 0x8c │ │ ldr r0, [sp, #288] @ 0x120 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #292] @ 0x124 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #300] @ 0x12c │ │ ldr r4, [sp, #80] @ 0x50 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #304] @ 0x130 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #312] @ 0x138 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #316] @ 0x13c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #324] @ 0x144 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #328] @ 0x148 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #180] @ 0xb4 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #184] @ 0xb8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ movs r0, #0 │ │ - b.n 81bfc │ │ + b.n 81c64 │ │ mov r9, r1 │ │ movs r0, #52 @ 0x34 │ │ ldr.w fp, [sp, #116] @ 0x74 │ │ str r0, [sp, #164] @ 0xa4 │ │ ldr.w sl, [sp, #156] @ 0x9c │ │ - b.n 81b96 │ │ + b.n 81bfe │ │ movs r0, #25 │ │ mov.w fp, #0 │ │ str r0, [sp, #164] @ 0xa4 │ │ mov sl, r2 │ │ ldr.w r8, [sp, #40] @ 0x28 │ │ ldr.w r9, [sp, #148] @ 0x94 │ │ - b.n 81b8e │ │ + b.n 81bf6 │ │ ubfx sl, r8, #8, #8 │ │ str.w fp, [sp, #140] @ 0x8c │ │ str r0, [sp, #164] @ 0xa4 │ │ mov r8, r5 │ │ mov fp, r4 │ │ - b.n 81b96 │ │ + b.n 81bfe │ │ ldr r0, [sp, #172] @ 0xac │ │ cmp r1, #21 │ │ - bcs.n 81e0e │ │ - bl 82728 │ │ - b.n 81936 │ │ + bcs.n 81e76 │ │ + bl 82790 │ │ + b.n 8199e │ │ movs r1, #19 │ │ movs r0, #0 │ │ mov r8, r9 │ │ str r1, [sp, #164] @ 0xa4 │ │ ldr.w sl, [sp, #152] @ 0x98 │ │ mov r9, r0 │ │ ldr.w fp, [sp, #160] @ 0xa0 │ │ - b.n 81c90 │ │ + b.n 81cf8 │ │ movs r0, #8 │ │ mov r1, fp │ │ - bl 3dfa4 │ │ - b.n 81e0c │ │ + bl 3e2ac │ │ + b.n 81e74 │ │ ldr r1, [sp, #132] @ 0x84 │ │ movs r0, #8 │ │ - bl 3dfa4 │ │ - b.n 81e0c │ │ + bl 3e2ac │ │ + b.n 81e74 │ │ movs r0, #8 │ │ mov r1, r6 │ │ - bl 3dfa4 │ │ - b.n 81e0c │ │ - ldr r0, [pc, #228] @ (81ed0 ) │ │ + bl 3e2ac │ │ + b.n 81e74 │ │ + ldr r0, [pc, #228] @ (81f38 ) │ │ add r0, pc │ │ - bl 409c4 │ │ - b.n 81e0c │ │ - ldr r0, [pc, #208] @ (81ec4 ) │ │ + bl 40ccc │ │ + b.n 81e74 │ │ + ldr r0, [pc, #208] @ (81f2c ) │ │ add r0, pc │ │ - b.n 81e08 │ │ - ldr r0, [pc, #216] @ (81ed4 ) │ │ + b.n 81e70 │ │ + ldr r0, [pc, #216] @ (81f3c ) │ │ add r0, pc │ │ - b.n 81e08 │ │ - ldr r0, [pc, #200] @ (81ec8 ) │ │ + b.n 81e70 │ │ + ldr r0, [pc, #200] @ (81f30 ) │ │ add r0, pc │ │ - b.n 81e08 │ │ - ldr r0, [pc, #196] @ (81ecc ) │ │ + b.n 81e70 │ │ + ldr r0, [pc, #196] @ (81f34 ) │ │ add r0, pc │ │ - bl 416a0 │ │ + bl 419a8 │ │ udf #254 @ 0xfe │ │ - bl 8266e │ │ - b.n 81936 │ │ - b.n 81e6a │ │ + bl 826d6 │ │ + b.n 8199e │ │ + b.n 81ed2 │ │ mov r9, r0 │ │ add r0, sp, #168 @ 0xa8 │ │ - bl 825f4 │ │ + bl 8265c │ │ mov r0, r6 │ │ mov r1, r4 │ │ - bl 82634 │ │ + bl 8269c │ │ add r0, sp, #192 @ 0xc0 │ │ - bl 825b6 │ │ + bl 8261e │ │ ldr r0, [sp, #180] @ 0xb4 │ │ cmp r0, #0 │ │ - beq.n 81ebc │ │ + beq.n 81f24 │ │ ldr r0, [sp, #184] @ 0xb8 │ │ - b.n 81eb8 │ │ + b.n 81f20 │ │ mov r9, r0 │ │ - cbz r5, 81e6c │ │ + cbz r5, 81ed4 │ │ mov r0, r4 │ │ - blx d87c0 │ │ - b.n 81e6c │ │ - b.n 81e6a │ │ - b.n 81e6a │ │ + blx d87d0 │ │ + b.n 81ed4 │ │ + b.n 81ed2 │ │ + b.n 81ed2 │ │ mov r9, r0 │ │ mov r0, r8 │ │ - blx d87c0 │ │ - b.n 81e76 │ │ + blx d87d0 │ │ + b.n 81ede │ │ mov r9, r0 │ │ mov r0, r5 │ │ - blx d87c0 │ │ - b.n 81e76 │ │ - b.n 81e74 │ │ - b.n 81e74 │ │ + blx d87d0 │ │ + b.n 81ede │ │ + b.n 81edc │ │ + b.n 81edc │ │ mov r9, r0 │ │ - cbz r6, 81e6c │ │ + cbz r6, 81ed4 │ │ mov r0, fp │ │ - blx d87c0 │ │ - b.n 81e6c │ │ + blx d87d0 │ │ + b.n 81ed4 │ │ mov r9, r0 │ │ add r0, sp, #480 @ 0x1e0 │ │ - bl 82816 │ │ - b.n 81e76 │ │ + bl 8287e │ │ + b.n 81ede │ │ mov r9, r0 │ │ add r0, sp, #192 @ 0xc0 │ │ - bl 825b6 │ │ + bl 8261e │ │ ldr r0, [sp, #180] @ 0xb4 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #184] @ 0xb8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add r0, sp, #168 @ 0xa8 │ │ - bl 825f4 │ │ + bl 8265c │ │ mov r0, r9 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ mov r9, r0 │ │ ldr r0, [sp, #76] @ 0x4c │ │ - cbz r0, 81ea4 │ │ + cbz r0, 81f0c │ │ ldr r0, [sp, #72] @ 0x48 │ │ - blx d87c0 │ │ - b.n 81ea4 │ │ + blx d87d0 │ │ + b.n 81f0c │ │ mov r9, r0 │ │ ldr r0, [sp, #116] @ 0x74 │ │ - cbz r0, 81eb2 │ │ + cbz r0, 81f1a │ │ ldr r0, [sp, #140] @ 0x8c │ │ - blx d87c0 │ │ - b.n 81eb2 │ │ + blx d87d0 │ │ + b.n 81f1a │ │ mov r9, r0 │ │ ldr r0, [sp, #120] @ 0x78 │ │ - cbz r0, 81ebc │ │ + cbz r0, 81f24 │ │ ldr r0, [sp, #112] @ 0x70 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r9 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ nop │ │ - add r0, pc, #144 @ (adr r0, 81f58 ) │ │ + ldr r7, [sp, #816] @ 0x330 │ │ movs r5, r0 │ │ - add r0, pc, #160 @ (adr r0, 81f6c ) │ │ + ldr r7, [sp, #832] @ 0x340 │ │ movs r5, r0 │ │ - add r0, pc, #136 @ (adr r0, 81f58 ) │ │ + ldr r7, [sp, #808] @ 0x328 │ │ movs r5, r0 │ │ - add r0, pc, #312 @ (adr r0, 8200c ) │ │ + ldr r7, [sp, #984] @ 0x3d8 │ │ movs r5, r0 │ │ - add r0, pc, #184 @ (adr r0, 81f90 ) │ │ + ldr r7, [sp, #856] @ 0x358 │ │ movs r5, r0 │ │ - strb r6, [r7, #11] │ │ - vcge.s32 q13, q8, #0 │ │ + strb r6, [r2, #10] │ │ + vcge.s32 d26, d8, #0 │ │ movs r5, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #8 │ │ - ldr r2, [pc, #232] @ (81fd4 ) │ │ + ldr r2, [pc, #232] @ (8203c ) │ │ mov r8, r0 │ │ movs r0, #0 │ │ add r2, pc │ │ ldr.w ip, [r2, #304] @ 0x130 │ │ cmp.w ip, #0 │ │ - beq.n 81f92 │ │ + beq.n 81ffa │ │ ldr.w r3, [r2, #300] @ 0x12c │ │ mov r9, r2 │ │ cmp.w ip, #1 │ │ - beq.n 81f34 │ │ + beq.n 81f9c │ │ movs r6, #0 │ │ mov r4, ip │ │ add.w r0, r6, r4, lsr #1 │ │ sub.w r4, r4, r4, lsr #1 │ │ add.w r5, r0, r0, lsl #1 │ │ ldr.w r2, [r3, r5, lsl #3] │ │ add.w r5, r3, r5, lsl #3 │ │ ldr r5, [r5, #4] │ │ subs.w r2, r8, r2 │ │ sbcs.w r2, r1, r5 │ │ it cc │ │ movcc r0, r6 │ │ mov r6, r0 │ │ cmp r4, #1 │ │ - bhi.n 81f0c │ │ + bhi.n 81f74 │ │ add.w r4, r0, r0, lsl #1 │ │ ldr.w r6, [r3, r4, lsl #3] │ │ add.w r4, r3, r4, lsl #3 │ │ ldr r4, [r4, #4] │ │ eor.w lr, r6, r8 │ │ eor.w r5, r4, r1 │ │ orrs.w r5, r5, lr │ │ - beq.n 81f60 │ │ + beq.n 81fc8 │ │ subs.w r2, r6, r8 │ │ sbcs.w r2, r4, r1 │ │ it cc │ │ addcc r0, #1 │ │ - cbz r0, 81f90 │ │ + cbz r0, 81ff8 │ │ subs r0, #1 │ │ cmp r0, ip │ │ - bcs.n 81f90 │ │ + bcs.n 81ff8 │ │ add.w r2, r0, r0, lsl #1 │ │ ldr.w r0, [r3, r2, lsl #3] │ │ add.w r3, r3, r2, lsl #3 │ │ ldr r6, [r3, #4] │ │ subs.w r2, r8, r0 │ │ sbcs.w r2, r1, r6 │ │ - bcc.n 81f90 │ │ + bcc.n 81ff8 │ │ ldrd r2, r5, [r3, #8] │ │ adds r0, r0, r2 │ │ adc.w r2, r5, r6 │ │ subs.w r0, r0, r8 │ │ sbcs.w r0, r2, r1 │ │ - bcs.n 81f9a │ │ + bcs.n 82002 │ │ movs r0, #0 │ │ add sp, #8 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr.w ip, [r9, #272] @ 0x110 │ │ movs r0, #0 │ │ cmp.w ip, #0 │ │ - beq.n 81f92 │ │ + beq.n 81ffa │ │ ldr r1, [r3, #16] │ │ ldrd r2, r3, [r9, #280] @ 0x118 │ │ adds r2, r2, r1 │ │ adcs.w r3, r3, #0 │ │ adcs.w r1, r0, #0 │ │ - bne.n 81f92 │ │ + bne.n 81ffa │ │ ldr.w r1, [r9, #276] @ 0x114 │ │ ldrd r0, r6, [r9, #288] @ 0x120 │ │ strd r0, r6, [sp] │ │ mov r0, ip │ │ - bl 709c0 │ │ + bl 70a74 │ │ add sp, #8 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - rev r4, r6 │ │ + cbnz r4, 82076 │ │ movs r5, r0 │ │ ldr r2, [r1, #0] │ │ tbh [pc, r2, lsl #1] │ │ movs r6, r5 │ │ lsls r0, r2, #3 │ │ lsls r2, r6, #2 │ │ lsls r0, r0, #3 │ │ @@ -135997,15 +135910,15 @@ │ │ strd r2, r1, [r0] │ │ bx lr │ │ push {r4, r5, r6, lr} │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #48 @ 0x30 │ │ ldrd r9, ip, [r1] │ │ cmp.w ip, #0 │ │ - beq.n 8238c │ │ + beq.n 823f4 │ │ strd r0, r1, [sp, #28] │ │ add.w r0, r9, ip │ │ str r0, [sp, #36] @ 0x24 │ │ sub.w r0, ip, #3 │ │ strd r2, r3, [sp, #12] │ │ movs r5, #0 │ │ str r0, [sp, #20] │ │ @@ -136015,17 +135928,17 @@ │ │ str.w ip, [sp, #24] │ │ str.w r9, [sp, #44] @ 0x2c │ │ add.w lr, r9, r5 │ │ sub.w r4, ip, #1 │ │ cmp r2, #63 @ 0x3f │ │ mov r1, lr │ │ ldrb.w r8, [r1], #1 │ │ - bne.n 82338 │ │ + bne.n 823a0 │ │ cmp.w r8, #1 │ │ - bhi.n 82396 │ │ + bhi.n 823fe │ │ and.w fp, r2, #63 @ 0x3f │ │ str.w ip, [sp, #40] @ 0x28 │ │ mov ip, lr │ │ mov lr, r1 │ │ and.w r1, r8, #127 @ 0x7f │ │ rsb r9, fp, #32 │ │ subs.w sl, fp, #32 │ │ @@ -136035,30 +135948,30 @@ │ │ lsl.w r1, r1, fp │ │ it pl │ │ movpl r1, #0 │ │ orrs r0, r1 │ │ orrs r3, r6 │ │ sxtb.w r1, r8 │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ - bgt.n 823c0 │ │ + bgt.n 82428 │ │ ldr.w r9, [sp, #44] @ 0x2c │ │ adds r5, #1 │ │ adds r2, #7 │ │ mov ip, r4 │ │ cmp r4, #0 │ │ - bne.n 82320 │ │ + bne.n 82388 │ │ ldrd r1, r9, [sp, #32] │ │ movs r0, #0 │ │ strd r9, r0, [r1] │ │ ldr r0, [sp, #28] │ │ - b.n 82390 │ │ + b.n 823f8 │ │ mov.w r8, #0 │ │ movs r5, #0 │ │ movs r1, #19 │ │ - b.n 823a4 │ │ + b.n 8240c │ │ ldr r0, [sp, #32] │ │ mov.w r8, #0 │ │ strd r1, r4, [r0] │ │ movs r1, #6 │ │ ldr r0, [sp, #28] │ │ movs r2, #0 │ │ movs r6, #46 @ 0x2e │ │ @@ -136070,15 +135983,15 @@ │ │ add sp, #48 @ 0x30 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, pc} │ │ ldr r1, [sp, #32] │ │ mov r6, r4 │ │ cmp r4, #0 │ │ strd lr, r6, [r1] │ │ - beq.n 82454 │ │ + beq.n 824bc │ │ strd r3, r0, [sp] │ │ mov.w r8, #0 │ │ ldr r0, [sp, #40] @ 0x28 │ │ mov.w fp, #0 │ │ movs r3, #0 │ │ add r0, ip │ │ str r0, [sp, #8] │ │ @@ -136088,17 +136001,17 @@ │ │ ldr r0, [sp, #44] @ 0x2c │ │ sub.w sl, r6, #1 │ │ cmp r3, #63 @ 0x3f │ │ add.w ip, r0, r5 │ │ mov r1, ip │ │ ldrb.w r9, [r1, #1]! │ │ add.w r4, r1, #1 │ │ - bne.n 82404 │ │ + bne.n 8246c │ │ cmp.w r9, #1 │ │ - bhi.n 8245e │ │ + bhi.n 824c6 │ │ and.w r0, r3, #63 @ 0x3f │ │ str r6, [sp, #36] @ 0x24 │ │ and.w r6, r9, #127 @ 0x7f │ │ rsb r2, r0, #32 │ │ subs.w lr, r0, #32 │ │ lsr.w r2, r6, r2 │ │ lsl.w r0, r6, r0 │ │ @@ -136106,30 +136019,30 @@ │ │ lslpl.w r2, r6, lr │ │ it pl │ │ movpl r0, #0 │ │ orr.w r8, r8, r0 │ │ orr.w fp, fp, r2 │ │ sxtb.w r0, r9 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 82488 │ │ + bgt.n 824f0 │ │ adds r3, #7 │ │ adds r5, #1 │ │ ldr r0, [sp, #40] @ 0x28 │ │ mov r6, sl │ │ cmp r0, r5 │ │ - bne.n 823e6 │ │ + bne.n 8244e │ │ ldr.w lr, [sp, #8] │ │ movs r0, #0 │ │ ldr r1, [sp, #32] │ │ strd lr, r0, [r1] │ │ - b.n 82458 │ │ + b.n 824c0 │ │ mov.w r9, #0 │ │ movs r0, #0 │ │ movs r1, #19 │ │ - b.n 8246a │ │ + b.n 824d2 │ │ ldr r0, [sp, #32] │ │ movs r1, #6 │ │ mov.w r9, #0 │ │ strd r4, sl, [r0] │ │ ldr r6, [sp, #28] │ │ movs r5, #0 │ │ movs r3, #46 @ 0x2e │ │ @@ -136140,59 +136053,59 @@ │ │ str r0, [r6, #20] │ │ add sp, #48 @ 0x30 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, pc} │ │ ldr r0, [sp, #32] │ │ cmp.w sl, #0 │ │ strd r4, sl, [r0] │ │ - beq.n 82504 │ │ + beq.n 8256c │ │ ldr r0, [sp, #20] │ │ add.w r2, ip, #3 │ │ mov.w ip, #0 │ │ mov.w sl, #0 │ │ subs r3, r0, r5 │ │ ldr r0, [sp, #36] @ 0x24 │ │ movs r4, #0 │ │ add r0, r1 │ │ str r0, [sp, #44] @ 0x2c │ │ ldrb.w lr, [r2, #-1] │ │ cmp r4, #63 @ 0x3f │ │ - bne.n 824ba │ │ + bne.n 82522 │ │ cmp.w lr, #1 │ │ - bhi.n 82510 │ │ + bhi.n 82578 │ │ and.w r1, r4, #63 @ 0x3f │ │ and.w r0, lr, #127 @ 0x7f │ │ rsb r9, r1, #32 │ │ subs.w r5, r1, #32 │ │ lsr.w r6, r0, r9 │ │ it pl │ │ lslpl.w r6, r0, r5 │ │ lsl.w r0, r0, r1 │ │ it pl │ │ movpl r0, #0 │ │ orr.w ip, ip, r0 │ │ orr.w sl, sl, r6 │ │ sxtb.w r0, lr │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 8253a │ │ + bgt.n 825a2 │ │ subs r3, #1 │ │ adds r2, #1 │ │ adds r4, #7 │ │ adds r0, r3, #1 │ │ - bne.n 824ac │ │ + bne.n 82514 │ │ ldr r4, [sp, #44] @ 0x2c │ │ movs r0, #0 │ │ ldr r1, [sp, #32] │ │ strd r4, r0, [r1] │ │ - b.n 82508 │ │ + b.n 82570 │ │ mov.w lr, #0 │ │ ldr r6, [sp, #28] │ │ movs r0, #0 │ │ movs r1, #19 │ │ - b.n 8251e │ │ + b.n 82586 │ │ ldr r0, [sp, #32] │ │ movs r1, #6 │ │ ldr r6, [sp, #28] │ │ mov.w lr, #0 │ │ strd r2, r3, [r0] │ │ movs r2, #0 │ │ movs r3, #46 @ 0x2e │ │ @@ -136238,69 +136151,69 @@ │ │ movs r5, #4 │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 77834 │ │ + bl 7789c │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ ldr r0, [r0, #96] @ 0x60 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #100] @ 0x64 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r4, #108] @ 0x6c │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #112] @ 0x70 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r4, #120] @ 0x78 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #124] @ 0x7c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [r4, #132] @ 0x84 │ │ - cbz r0, 825f2 │ │ + cbz r0, 8265a │ │ ldr.w r0, [r4, #136] @ 0x88 │ │ ldmia.w sp!, {r4, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ pop {r4, r6, r7, pc} │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ ldrd r8, r6, [r0, #4] │ │ mov r5, r0 │ │ - cbz r6, 8261c │ │ + cbz r6, 82684 │ │ add.w r4, r8, #4 │ │ ldr r0, [r4, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r4, #-4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r4, #24 │ │ subs r6, #1 │ │ - bne.n 82608 │ │ + bne.n 82670 │ │ ldr r0, [r5, #0] │ │ - cbz r0, 8262e │ │ + cbz r0, 82696 │ │ mov r0, r8 │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ cmp r1, #0 │ │ it eq │ │ bxeq lr │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ @@ -136310,22 +136223,22 @@ │ │ movs r6, #0 │ │ lsls r5, r0, #2 │ │ ldr r0, [r4, r6] │ │ cmp r0, #0 │ │ ittt ne │ │ addne r0, r4, r6 │ │ ldrne r0, [r0, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #12 │ │ cmp r5, r6 │ │ - bne.n 8264c │ │ + bne.n 826b4 │ │ mov r0, r4 │ │ ldr.w fp, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub.w sp, sp, #4096 @ 0x1000 │ │ sub sp, #28 │ │ movw r6, #5653 @ 0x1615 │ │ sub.w r3, r1, r1, lsr #1 │ │ @@ -136337,99 +136250,99 @@ │ │ it ls │ │ movls r6, r3 │ │ cmp r6, #48 @ 0x30 │ │ mov r2, r6 │ │ it ls │ │ movls r2, #48 @ 0x30 │ │ cmp r6, #171 @ 0xab │ │ - bcs.n 826a6 │ │ + bcs.n 8270e │ │ add r4, sp, #8 │ │ movs r3, #170 @ 0xaa │ │ - b.n 826e6 │ │ + b.n 8274e │ │ movw r5, #21846 @ 0x5556 │ │ movt r5, #1365 @ 0x555 │ │ cmp r3, r5 │ │ - bcc.n 826b6 │ │ - bl 3e03c │ │ + bcc.n 8271e │ │ + bl 3e344 │ │ add.w r3, r2, r2, lsl #1 │ │ mov.w r8, #0 │ │ lsls r5, r3, #3 │ │ - beq.n 826da │ │ + beq.n 82742 │ │ mov sl, r0 │ │ mov r0, r5 │ │ mov r9, r2 │ │ mov fp, r1 │ │ - blx d87f0 │ │ - cbz r0, 8270c │ │ + blx d8810 │ │ + cbz r0, 82774 │ │ mov r4, r0 │ │ mov r1, fp │ │ mov r0, sl │ │ mov r3, r9 │ │ - b.n 826de │ │ + b.n 82746 │ │ movs r4, #8 │ │ movs r3, #0 │ │ sub.w r2, r7, #44 @ 0x2c │ │ stmia.w r2, {r3, r4, r8} │ │ movs r2, #0 │ │ cmp r1, #65 @ 0x41 │ │ it cc │ │ movcc r2, #1 │ │ str r2, [sp, #0] │ │ mov r2, r4 │ │ - bl 82c72 │ │ + bl 82cda │ │ cmp r6, #170 @ 0xaa │ │ - bls.n 82700 │ │ + bls.n 82768 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add.w sp, sp, #4096 @ 0x1000 │ │ add sp, #28 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #8 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ cmp r6, #171 @ 0xab │ │ mov r4, r0 │ │ itt cs │ │ subcs.w r0, r7, #44 @ 0x2c │ │ - blcs 825f4 │ │ + blcs 8265c │ │ mov r0, r4 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ push {r4, r5, r6, lr} │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #32 │ │ add.w r1, r1, r1, lsl #1 │ │ movs r4, #0 │ │ mov r2, r0 │ │ str r0, [sp, #28] │ │ add.w ip, r0, r1, lsl #3 │ │ add.w r1, r0, #24 │ │ str.w ip, [sp] │ │ - b.n 82776 │ │ + b.n 827de │ │ ldr r2, [sp, #28] │ │ ldrd r6, r1, [sp, #4] │ │ strd r1, r6, [r2] │ │ strd r3, r0, [ip, #-16] │ │ ldr r0, [sp, #12] │ │ str.w r0, [ip, #-8] │ │ ldr r0, [sp, #16] │ │ str.w r0, [ip, #-4] │ │ ldr.w ip, [sp] │ │ ldrd r6, r4, [sp, #20] │ │ add.w r1, r6, #24 │ │ adds r4, #24 │ │ mov r2, r6 │ │ cmp r1, ip │ │ - beq.n 827d0 │ │ + beq.n 82838 │ │ mov r6, r1 │ │ ldrd r5, r1, [r2, #8] │ │ ldrd r3, r0, [r2, #32] │ │ subs r5, r3, r5 │ │ sbcs.w r5, r0, r1 │ │ - bcs.n 8276a │ │ + bcs.n 827d2 │ │ str r6, [sp, #20] │ │ ldrd r1, r6, [r2, #24] │ │ str r4, [sp, #24] │ │ strd r6, r1, [sp, #4] │ │ ldrd r2, r1, [r2, #40] @ 0x28 │ │ strd r2, r1, [sp, #12] │ │ mov r2, r4 │ │ @@ -136437,24 +136350,24 @@ │ │ cmp r2, #0 │ │ add.w r8, r1, r2 │ │ add.w ip, r8, #24 │ │ mov r6, r8 │ │ ldmia.w r6, {r1, r4, r9, sl, fp, lr} │ │ mov r5, ip │ │ stmia.w r5, {r1, r4, r9, sl, fp, lr} │ │ - beq.n 82748 │ │ + beq.n 827b0 │ │ ldrd r1, r6, [r8, #-16] │ │ subs r2, #24 │ │ subs r1, r3, r1 │ │ sbcs.w r1, r0, r6 │ │ - bcc.n 8279e │ │ + bcc.n 82806 │ │ ldr r1, [sp, #28] │ │ add r1, r2 │ │ add.w r2, r1, #24 │ │ - b.n 8274a │ │ + b.n 827b2 │ │ add sp, #32 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, pc} │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ @@ -136465,446 +136378,446 @@ │ │ movs r5, #4 │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 77834 │ │ + bl 7789c │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ ldrd r8, r6, [r0, #4] │ │ mov r5, r0 │ │ - cbz r6, 8283e │ │ + cbz r6, 828a6 │ │ add.w r4, r8, #4 │ │ ldr.w r0, [r4, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r4, #12 │ │ subs r6, #1 │ │ - bne.n 8282a │ │ + bne.n 82892 │ │ ldr r0, [r5, #0] │ │ - cbz r0, 82850 │ │ + cbz r0, 828b8 │ │ mov r0, r8 │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #100 @ 0x64 │ │ mov fp, r1 │ │ ldr.w r1, [r2, #240] @ 0xf0 │ │ ldr.w r9, [r7, #8] │ │ mov r6, r2 │ │ mov sl, r0 │ │ - cbz r1, 828a0 │ │ + cbz r1, 82908 │ │ add r0, sp, #80 @ 0x50 │ │ ldr.w r2, [r6, #244] @ 0xf4 │ │ adds r0, #4 │ │ strd r3, fp, [sp, #8] │ │ - bl 3de50 │ │ + bl 3e158 │ │ ldrd r8, fp, [sp, #84] @ 0x54 │ │ ldr r5, [sp, #92] @ 0x5c │ │ cmp.w r8, #2147483648 @ 0x80000000 │ │ - bne.n 828aa │ │ - cbz r5, 828ae │ │ + bne.n 82912 │ │ + cbz r5, 82916 │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ mov r4, r0 │ │ - cbnz r0, 828b0 │ │ + cbnz r0, 82918 │ │ movs r0, #1 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r4, #1 │ │ mov.w r8, #0 │ │ movs r5, #0 │ │ - b.n 828c0 │ │ + b.n 82928 │ │ mov r4, fp │ │ - b.n 828bc │ │ + b.n 82924 │ │ movs r4, #1 │ │ mov r0, r4 │ │ mov r1, fp │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ mov r8, r5 │ │ ldrd r3, fp, [sp, #8] │ │ ldrd r0, r1, [r3, #32] │ │ str r5, [sp, #24] │ │ orrs r1, r0 │ │ strd r8, r4, [sp, #16] │ │ - beq.n 8294c │ │ + beq.n 829b4 │ │ ldrh.w r1, [r9, #146] @ 0x92 │ │ cmp r1, #5 │ │ - bcs.n 828e2 │ │ + bcs.n 8294a │ │ ldr.w r1, [r9, #116] @ 0x74 │ │ subs r0, #1 │ │ cmp r0, r1 │ │ - bcc.n 828ea │ │ - b.n 8294c │ │ + bcc.n 82952 │ │ + b.n 829b4 │ │ ldr.w r1, [r9, #116] @ 0x74 │ │ cmp r1, r0 │ │ - bls.n 8294c │ │ + bls.n 829b4 │ │ ldr.w r1, [r9, #112] @ 0x70 │ │ add r4, sp, #32 │ │ mov r5, r3 │ │ add.w r1, r1, r0, lsl #4 │ │ mov r0, r4 │ │ - bl 81fd8 │ │ + bl 82040 │ │ ldrd r0, r1, [sp, #32] │ │ mov r3, r5 │ │ eor.w r0, r0, #46 @ 0x2e │ │ orrs r0, r1 │ │ - beq.n 8294c │ │ + beq.n 829b4 │ │ ldr.w r3, [r6, #260] @ 0x104 │ │ add r0, sp, #80 @ 0x50 │ │ ldrb.w r2, [r6, #217] @ 0xd9 │ │ mov r1, fp │ │ str r4, [sp, #0] │ │ - bl 82b38 │ │ + bl 82ba0 │ │ ldrb.w r0, [sp, #80] @ 0x50 │ │ cmp r0, #82 @ 0x52 │ │ - bne.n 829ec │ │ + bne.n 82a54 │ │ ldrd r1, r2, [sp, #84] @ 0x54 │ │ add r0, sp, #64 @ 0x40 │ │ adds r0, #4 │ │ - bl 3de50 │ │ + bl 3e158 │ │ ldrd r4, r8, [sp, #68] @ 0x44 │ │ ldr r2, [sp, #76] @ 0x4c │ │ add r0, sp, #16 │ │ mov r1, r8 │ │ - bl 3dcb4 │ │ + bl 3dfbc │ │ mov r3, r5 │ │ lsls r0, r4, #1 │ │ - beq.n 8294c │ │ + beq.n 829b4 │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r3, r5 │ │ add r4, sp, #80 @ 0x50 │ │ mov r1, r3 │ │ mov r0, r4 │ │ - bl 81fd8 │ │ + bl 82040 │ │ ldr.w r3, [r6, #260] @ 0x104 │ │ add r0, sp, #64 @ 0x40 │ │ ldrb.w r2, [r6, #217] @ 0xd9 │ │ mov r1, fp │ │ str r4, [sp, #0] │ │ - bl 82b38 │ │ + bl 82ba0 │ │ ldrb.w r0, [sp, #64] @ 0x40 │ │ cmp r0, #82 @ 0x52 │ │ - bne.n 829a6 │ │ + bne.n 82a0e │ │ ldrd r1, r2, [sp, #68] @ 0x44 │ │ add r0, sp, #48 @ 0x30 │ │ adds r0, #4 │ │ - bl 3de50 │ │ + bl 3e158 │ │ ldrd r4, r5, [sp, #52] @ 0x34 │ │ ldr r2, [sp, #60] @ 0x3c │ │ add r0, sp, #16 │ │ mov r1, r5 │ │ - bl 3dcb4 │ │ + bl 3dfbc │ │ lsls r0, r4, #1 │ │ - beq.n 82994 │ │ + beq.n 829fc │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add r2, sp, #16 │ │ add.w r3, sl, #4 │ │ ldmia r2, {r0, r1, r2} │ │ stmia r3!, {r0, r1, r2} │ │ movs r0, #82 @ 0x52 │ │ strb.w r0, [sl] │ │ - b.n 829e4 │ │ + b.n 82a4c │ │ add r6, sp, #68 @ 0x44 │ │ ldrh.w r1, [sp, #65] @ 0x41 │ │ ldr.w r8, [sp, #16] │ │ ldmia r6, {r2, r3, r6} │ │ ldrb.w r5, [sp, #67] @ 0x43 │ │ strb.w r5, [sl, #3] │ │ cmp.w r8, #0 │ │ strh.w r1, [sl, #1] │ │ str.w r2, [sl, #4] │ │ str.w r3, [sl, #8] │ │ str.w r6, [sl, #12] │ │ strb.w r0, [sl] │ │ - beq.n 829e4 │ │ + beq.n 82a4c │ │ ldr r0, [sp, #20] │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ add r6, sp, #84 @ 0x54 │ │ ldrh.w r1, [sp, #81] @ 0x51 │ │ ldrb.w r5, [sp, #83] @ 0x53 │ │ ldmia r6, {r2, r3, r6} │ │ - b.n 829b6 │ │ + b.n 82a1e │ │ mov r6, r0 │ │ lsls r0, r4, #1 │ │ - beq.n 82a1a │ │ + beq.n 82a82 │ │ mov r0, r8 │ │ - blx d87c0 │ │ - b.n 82a1a │ │ - b.n 82a18 │ │ + blx d87d0 │ │ + b.n 82a82 │ │ + b.n 82a80 │ │ mov r6, r0 │ │ lsls r0, r4, #1 │ │ - beq.n 82a1a │ │ + beq.n 82a82 │ │ mov r0, r5 │ │ - blx d87c0 │ │ - b.n 82a1a │ │ + blx d87d0 │ │ + b.n 82a82 │ │ mov r6, r0 │ │ ldr r0, [sp, #16] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #20] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r6 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ movs r0, #12 │ │ movs r5, #4 │ │ strd r5, r0, [sp] │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 77834 │ │ + bl 7789c │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ mov r4, r0 │ │ ldr r0, [r0, #8] │ │ cmp r0, #2 │ │ - beq.n 82a7a │ │ - cbz r0, 82a80 │ │ + beq.n 82ae2 │ │ + cbz r0, 82ae8 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r6, [r4, #16] │ │ - cbz r6, 82aa6 │ │ + cbz r6, 82b0e │ │ ldr.w r8, [r4, #12] │ │ add.w r5, r8, #4 │ │ ldr.w r0, [r5, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #12 │ │ subs r6, #1 │ │ - bne.n 82a8c │ │ + bne.n 82af4 │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r5, [r4, #24] │ │ cmp r5, #0 │ │ - beq.n 82a7a │ │ + beq.n 82ae2 │ │ ldr r4, [r4, #20] │ │ adds r6, r4, #4 │ │ ldr r0, [r6, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r6, #-4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #24 │ │ subs r5, #1 │ │ - bne.n 82ab0 │ │ + bne.n 82b18 │ │ mov r0, r4 │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ mov r4, r0 │ │ ldr r0, [r0, #0] │ │ - cbz r0, 82ae6 │ │ + cbz r0, 82b4e │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r6, [r4, #8] │ │ - cbz r6, 82b0c │ │ + cbz r6, 82b74 │ │ ldr.w r8, [r4, #4] │ │ add.w r5, r8, #4 │ │ ldr.w r0, [r5, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #12 │ │ subs r6, #1 │ │ - bne.n 82af2 │ │ + bne.n 82b5a │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r5, [r4, #16] │ │ cmp r5, #0 │ │ - beq.n 82ae0 │ │ + beq.n 82b48 │ │ ldr r4, [r4, #12] │ │ adds r6, r4, #4 │ │ ldr r0, [r6, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r6, #-4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #24 │ │ subs r5, #1 │ │ - bne.n 82b16 │ │ + bne.n 82b7e │ │ mov r0, r4 │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ push {r4, r5, r7, lr} │ │ ldr.w lr, [sp, #16] │ │ ldr.w r4, [lr] │ │ sub.w ip, r4, #26 │ │ cmp.w ip, #5 │ │ - bhi.n 82bb4 │ │ + bhi.n 82c1c │ │ tbb [pc, ip] │ │ subs r3, r0, #4 │ │ asrs r2, r6, #16 │ │ - ldr r3, [pc, #212] @ (82c2c ) │ │ + ldr r3, [pc, #212] @ (82c94 ) │ │ ldrd r1, r2, [r1, #64] @ 0x40 │ │ ldr.w r3, [lr, #8] │ │ cmp r2, r3 │ │ - bcc.n 82bda │ │ + bcc.n 82c42 │ │ add r1, r3 │ │ - beq.n 82bda │ │ + beq.n 82c42 │ │ subs r3, r2, r3 │ │ movs r2, #0 │ │ ldrb r4, [r1, r2] │ │ cmp r4, #0 │ │ - beq.n 82c68 │ │ + beq.n 82cd0 │ │ adds r2, #1 │ │ cmp r3, r2 │ │ - bne.n 82b6a │ │ - b.n 82bda │ │ + bne.n 82bd2 │ │ + b.n 82c42 │ │ ldrd ip, r4, [r1, #72] @ 0x48 │ │ cmp r4, r3 │ │ - bcs.n 82bf4 │ │ + bcs.n 82c5c │ │ movs r1, #0 │ │ movs r2, #19 │ │ strb r2, [r0, #0] │ │ strd ip, ip, [r0, #4] │ │ str r1, [r0, #12] │ │ pop {r4, r5, r7, pc} │ │ ldr r1, [r1, #120] @ 0x78 │ │ - cbz r1, 82bb4 │ │ + cbz r1, 82c1c │ │ ldrd r1, r2, [r1, #72] @ 0x48 │ │ ldr.w r3, [lr, #8] │ │ cmp r2, r3 │ │ - bcc.n 82bda │ │ + bcc.n 82c42 │ │ add r1, r3 │ │ - beq.n 82bda │ │ + beq.n 82c42 │ │ subs r3, r2, r3 │ │ movs r2, #0 │ │ ldrb r5, [r1, r2] │ │ cmp r5, #0 │ │ - beq.n 82c68 │ │ + beq.n 82cd0 │ │ adds r2, #1 │ │ cmp r3, r2 │ │ - bne.n 82ba6 │ │ - b.n 82bda │ │ + bne.n 82c0e │ │ + b.n 82c42 │ │ movs r1, #72 @ 0x48 │ │ strb r1, [r0, #0] │ │ pop {r4, r5, r7, pc} │ │ ldrd r1, r2, [r1, #40] @ 0x28 │ │ ldr.w r3, [lr, #8] │ │ cmp r2, r3 │ │ - bcc.n 82bda │ │ + bcc.n 82c42 │ │ add r1, r3 │ │ - beq.n 82bda │ │ + beq.n 82c42 │ │ subs r3, r2, r3 │ │ movs r2, #0 │ │ ldrb r5, [r1, r2] │ │ cmp r5, #0 │ │ - beq.n 82c68 │ │ + beq.n 82cd0 │ │ adds r2, #1 │ │ cmp r3, r2 │ │ - bne.n 82bce │ │ + bne.n 82c36 │ │ movs r2, #0 │ │ strd r1, r2, [r0, #8] │ │ movs r1, #19 │ │ strb r1, [r0, #0] │ │ pop {r4, r5, r7, pc} │ │ ldrd r2, r3, [lr, #8] │ │ movs r1, #82 @ 0x52 │ │ strb r1, [r0, #0] │ │ strd r2, r3, [r0, #4] │ │ pop {r4, r5, r7, pc} │ │ ldr.w lr, [lr, #8] │ │ uxtb r2, r2 │ │ umull lr, r5, lr, r2 │ │ - cbz r5, 82c0c │ │ + cbz r5, 82c74 │ │ movs r2, #56 @ 0x38 │ │ strb r2, [r0, #0] │ │ strd ip, ip, [r0, #4] │ │ str r1, [r0, #12] │ │ pop {r4, r5, r7, pc} │ │ add ip, r3 │ │ subs r3, r4, r3 │ │ cmp r3, lr │ │ - bcc.n 82b80 │ │ + bcc.n 82be8 │ │ add ip, lr │ │ sub.w r3, r3, lr │ │ cmp r2, #8 │ │ - bne.n 82c44 │ │ + bne.n 82cac │ │ cmp r3, #8 │ │ - bcc.n 82b80 │ │ + bcc.n 82be8 │ │ ldrb.w r3, [ip, #7] │ │ ldr.w r2, [ip, #3] │ │ lsls r3, r3, #24 │ │ orrs.w r3, r3, r2, lsr #8 │ │ - bne.n 82c00 │ │ + bne.n 82c68 │ │ ldrb.w r3, [ip, #2] │ │ lsls r2, r2, #24 │ │ ldrh.w r5, [ip] │ │ orr.w r3, r5, r3, lsl #16 │ │ orrs r2, r3 │ │ - b.n 82c4c │ │ + b.n 82cb4 │ │ cmp r3, #4 │ │ - bcc.n 82b80 │ │ + bcc.n 82be8 │ │ ldr.w r2, [ip] │ │ ldrd r1, r3, [r1, #64] @ 0x40 │ │ cmp r3, r2 │ │ - bcc.n 82bda │ │ + bcc.n 82c42 │ │ add r1, r2 │ │ - beq.n 82bda │ │ + beq.n 82c42 │ │ subs r3, r3, r2 │ │ movs r2, #0 │ │ ldrb r5, [r1, r2] │ │ - cbz r5, 82c68 │ │ + cbz r5, 82cd0 │ │ adds r2, #1 │ │ cmp r3, r2 │ │ - bne.n 82c5c │ │ - b.n 82bda │ │ + bne.n 82cc4 │ │ + b.n 82c42 │ │ strd r1, r2, [r0, #4] │ │ movs r1, #82 @ 0x52 │ │ strb r1, [r0, #0] │ │ pop {r4, r5, r7, pc} │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -136913,34 +136826,34 @@ │ │ mov r8, r3 │ │ mov sl, r2 │ │ str r0, [sp, #56] @ 0x38 │ │ movs r0, #0 │ │ mov.w r1, #1073741824 @ 0x40000000 │ │ mov r2, r4 │ │ movs r3, #0 │ │ - bl d53d0 │ │ + bl d53dc │ │ umull r2, r3, r0, r4 │ │ adds r6, r0, #1 │ │ adc.w r5, r1, #0 │ │ mla r3, r1, r4, r3 │ │ eor.w r3, r3, #1073741824 @ 0x40000000 │ │ orrs r2, r3 │ │ it eq │ │ moveq r5, r1 │ │ str r5, [sp, #20] │ │ it eq │ │ moveq r6, r0 │ │ cmp.w r4, #4096 @ 0x1000 │ │ str r6, [sp, #24] │ │ - bhi.n 82cc4 │ │ + bhi.n 82d2c │ │ sub.w r0, r4, r4, lsr #1 │ │ cmp r0, #64 @ 0x40 │ │ it cs │ │ movcs r0, #64 @ 0x40 │ │ - b.n 82ce6 │ │ + b.n 82d4e │ │ orr.w r0, r4, #1 │ │ movs r2, #1 │ │ clz r0, r0 │ │ eor.w r0, r0, #31 │ │ and.w r1, r0, #1 │ │ add.w r0, r1, r0, lsr #1 │ │ lsr.w r1, r4, r0 │ │ @@ -136962,128 +136875,128 @@ │ │ mov r3, r4 │ │ str r0, [sp, #12] │ │ str.w sl, [sp, #80] @ 0x50 │ │ strd r4, r8, [sp, #36] @ 0x24 │ │ add.w r4, fp, fp, lsl #1 │ │ cmp r3, fp │ │ str.w fp, [sp, #64] @ 0x40 │ │ - bls.n 82d36 │ │ - b.n 82d4a │ │ + bls.n 82d9e │ │ + b.n 82db2 │ │ ldr r2, [sp, #48] @ 0x30 │ │ adds r5, #1 │ │ add.w fp, fp, r2, lsr #1 │ │ add.w r4, fp, fp, lsl #1 │ │ cmp r3, fp │ │ str.w fp, [sp, #64] @ 0x40 │ │ - bhi.n 82d4a │ │ + bhi.n 82db2 │ │ movs r0, #1 │ │ mov lr, r2 │ │ mov.w r9, #0 │ │ str r0, [sp, #48] @ 0x30 │ │ cmp r5, #2 │ │ - bcs.w 82f3c │ │ + bcs.w 82fa4 │ │ mov r2, lr │ │ - b.n 8314e │ │ + b.n 831b6 │ │ ldr r0, [sp, #56] @ 0x38 │ │ sub.w r9, r3, fp │ │ ldr r1, [sp, #28] │ │ mov r8, ip │ │ add.w r0, r0, r4, lsl #3 │ │ str r5, [sp, #52] @ 0x34 │ │ cmp r9, r1 │ │ str r4, [sp, #68] @ 0x44 │ │ - bcs.n 82d84 │ │ + bcs.n 82dec │ │ ldr r1, [r7, #8] │ │ - cbz r1, 82dac │ │ + cbz r1, 82e14 │ │ movs r1, #0 │ │ mov r4, r2 │ │ strd r1, r1, [sp] │ │ cmp.w r9, #32 │ │ it cs │ │ movcs.w r9, #32 │ │ mov r1, r9 │ │ mov r2, sl │ │ mov r3, r8 │ │ - bl 8318c │ │ + bl 831f4 │ │ mov r2, r4 │ │ - b.n 82ed2 │ │ + b.n 82f3a │ │ cmp.w r9, #2 │ │ - bcc.w 82ed2 │ │ + bcc.w 82f3a │ │ ldrd r5, r3, [r0, #8] │ │ ldrd ip, lr, [r0, #32] │ │ subs.w r1, ip, r5 │ │ sbcs.w r1, lr, r3 │ │ - bcs.n 82dba │ │ + bcs.n 82e22 │ │ cmp.w r9, #2 │ │ - bne.n 82dc6 │ │ + bne.n 82e2e │ │ movs r0, #2 │ │ mov.w sl, #1 │ │ - b.n 82e4a │ │ + b.n 82eb2 │ │ ldr r0, [sp, #28] │ │ cmp r9, r0 │ │ it cs │ │ movcs r9, r0 │ │ mov.w r3, r9, lsl #1 │ │ - b.n 82ed8 │ │ + b.n 82f40 │ │ cmp.w r9, #2 │ │ - bne.n 82df4 │ │ + bne.n 82e5c │ │ mov.w r9, #2 │ │ - b.n 82ed2 │ │ + b.n 82f3a │ │ ldr r1, [sp, #12] │ │ mov r6, ip │ │ str r3, [sp, #84] @ 0x54 │ │ mov r3, lr │ │ add.w r1, r1, r4, lsl #3 │ │ strd r5, r2, [sp, #72] @ 0x48 │ │ movs r5, #2 │ │ ldrd r2, r4, [r1] │ │ subs r6, r2, r6 │ │ sbcs.w r3, r4, r3 │ │ - bcs.n 82e26 │ │ + bcs.n 82e8e │ │ adds r5, #1 │ │ adds r1, #24 │ │ mov r6, r2 │ │ mov r3, r4 │ │ cmp r9, r5 │ │ - bne.n 82dd8 │ │ + bne.n 82e40 │ │ mov r5, r9 │ │ - b.n 82e26 │ │ + b.n 82e8e │ │ ldr r1, [sp, #12] │ │ mov sl, ip │ │ strd r5, r2, [sp, #72] @ 0x48 │ │ movs r5, #2 │ │ add.w r1, r1, r4, lsl #3 │ │ mov r4, lr │ │ str r3, [sp, #84] @ 0x54 │ │ ldrd r2, r3, [r1] │ │ subs.w r6, r2, sl │ │ sbcs.w r4, r3, r4 │ │ - bcc.n 82e22 │ │ + bcc.n 82e8a │ │ adds r5, #1 │ │ adds r1, #24 │ │ mov sl, r2 │ │ mov r4, r3 │ │ cmp r9, r5 │ │ - bne.n 82e06 │ │ + bne.n 82e6e │ │ mov r5, r9 │ │ ldr.w sl, [sp, #80] @ 0x50 │ │ ldr r2, [sp, #76] @ 0x4c │ │ ldrd fp, r4, [sp, #64] @ 0x40 │ │ ldr r1, [sp, #28] │ │ cmp r5, r1 │ │ - bcc.n 82d60 │ │ + bcc.n 82dc8 │ │ ldr r0, [sp, #72] @ 0x48 │ │ mov r3, r5 │ │ subs.w r0, ip, r0 │ │ ldr r0, [sp, #84] @ 0x54 │ │ sbcs.w r0, lr, r0 │ │ - bcs.n 82ec2 │ │ + bcs.n 82f2a │ │ mov r0, r3 │ │ movs.w sl, r3, lsr #1 │ │ - beq.n 82ec6 │ │ + beq.n 82f2e │ │ str r2, [sp, #76] @ 0x4c │ │ add.w r2, r0, r0, lsl #1 │ │ str r0, [sp, #60] @ 0x3c │ │ lsls r3, r4, #3 │ │ ldr r0, [sp, #8] │ │ ldr r6, [sp, #56] @ 0x38 │ │ add.w r2, r0, r2, lsl #3 │ │ @@ -137111,21 +137024,21 @@ │ │ ldr r0, [r4, #8] │ │ str.w fp, [r1, #4] │ │ str.w lr, [r1, #8] │ │ str.w r9, [r4, #-4] │ │ str.w ip, [r4, #4] │ │ str r0, [r1, #20] │ │ str r5, [r4, #8] │ │ - bne.n 82e5c │ │ + bne.n 82ec4 │ │ ldr.w r8, [sp, #40] @ 0x28 │ │ ldrd r9, fp, [sp, #60] @ 0x3c │ │ ldrd r2, sl, [sp, #76] @ 0x4c │ │ - b.n 82ed2 │ │ + b.n 82f3a │ │ mov r9, r3 │ │ - b.n 82ed2 │ │ + b.n 82f3a │ │ mov.w r9, #1 │ │ ldr.w sl, [sp, #80] @ 0x50 │ │ ldr.w fp, [sp, #64] @ 0x40 │ │ mov.w r0, r9, lsl #1 │ │ adds r3, r0, #1 │ │ sub.w r0, fp, r2, lsr #1 │ │ mov lr, r2 │ │ @@ -137152,126 +137065,126 @@ │ │ add.w r9, r1, #32 │ │ sub.w r1, r7, #94 @ 0x5e │ │ it ne │ │ clzne r9, r0 │ │ ldr r5, [sp, #52] @ 0x34 │ │ ldr r4, [sp, #68] @ 0x44 │ │ cmp r5, #2 │ │ - bcc.w 82d46 │ │ + bcc.w 82dae │ │ ldr r0, [sp, #16] │ │ mov r2, lr │ │ str.w r9, [sp, #60] @ 0x3c │ │ add.w r0, r0, r4, lsl #3 │ │ str r0, [sp, #32] │ │ ldr r0, [sp, #56] @ 0x38 │ │ add.w r0, r0, r4, lsl #3 │ │ str r0, [sp, #72] @ 0x48 │ │ - b.n 82f5c │ │ + b.n 82fc4 │ │ lsls r2, r4, #1 │ │ cmp r3, #1 │ │ - bls.w 8314c │ │ + bls.w 831b4 │ │ subs r3, r5, #1 │ │ ldrb r0, [r1, r3] │ │ cmp r0, r9 │ │ - bcc.w 8314e │ │ + bcc.w 831b6 │ │ add r0, sp, #88 @ 0x58 │ │ mov r5, r3 │ │ ldr.w r6, [r0, r3, lsl #2] │ │ mov.w r8, r6, lsr #1 │ │ add.w r4, r8, r2, lsr #1 │ │ cmp r4, ip │ │ - bhi.n 82f84 │ │ + bhi.n 82fec │ │ orr.w r0, r6, r2 │ │ ands.w r0, r0, #1 │ │ - beq.n 82f54 │ │ + beq.n 82fbc │ │ sub.w r0, fp, r4 │ │ ldr r1, [sp, #56] @ 0x38 │ │ str r3, [sp, #68] @ 0x44 │ │ add.w r0, r0, r0, lsl #1 │ │ str r2, [sp, #76] @ 0x4c │ │ add.w lr, r1, r0, lsl #3 │ │ lsls r0, r6, #31 │ │ - bne.n 82fd4 │ │ + bne.n 8303c │ │ orr.w r0, r8, #1 │ │ movs r1, #62 @ 0x3e │ │ clz r0, r0 │ │ mov r2, sl │ │ mov r3, ip │ │ mov fp, lr │ │ eor.w r0, r1, r0, lsl #1 │ │ movs r1, #0 │ │ strd r0, r1, [sp] │ │ mov r0, lr │ │ mov r1, r8 │ │ mov r9, ip │ │ - bl 8318c │ │ + bl 831f4 │ │ mov ip, r9 │ │ ldr.w r9, [sp, #60] @ 0x3c │ │ mov lr, fp │ │ ldr r3, [sp, #68] @ 0x44 │ │ ldr r2, [sp, #76] @ 0x4c │ │ mov.w fp, r2, lsr #1 │ │ lsls r0, r2, #31 │ │ - bne.n 83016 │ │ - b.n 82fdc │ │ + bne.n 8307e │ │ + b.n 83044 │ │ mov.w fp, r2, lsr #1 │ │ lsls r0, r2, #31 │ │ - bne.n 83016 │ │ + bne.n 8307e │ │ orr.w r0, fp, #1 │ │ movs r1, #62 @ 0x3e │ │ clz r0, r0 │ │ mov r2, sl │ │ mov r3, ip │ │ str.w lr, [sp, #84] @ 0x54 │ │ eor.w r0, r1, r0, lsl #1 │ │ movs r1, #0 │ │ strd r0, r1, [sp] │ │ add.w r0, r8, r8, lsl #1 │ │ mov r1, fp │ │ mov r9, ip │ │ add.w r0, lr, r0, lsl #3 │ │ - bl 8318c │ │ + bl 831f4 │ │ mov ip, r9 │ │ ldr.w lr, [sp, #84] @ 0x54 │ │ ldr r3, [sp, #68] @ 0x44 │ │ ldr r2, [sp, #76] @ 0x4c │ │ ldr.w r9, [sp, #60] @ 0x3c │ │ cmp r6, #2 │ │ it cs │ │ cmpcs r2, #2 │ │ - bcs.n 83030 │ │ + bcs.n 83098 │ │ lsls r0, r4, #1 │ │ adds r2, r0, #1 │ │ sub.w r1, r7, #94 @ 0x5e │ │ ldr.w fp, [sp, #64] @ 0x40 │ │ cmp r3, #1 │ │ - bhi.n 82f5c │ │ - b.n 8314c │ │ + bhi.n 82fc4 │ │ + b.n 831b4 │ │ cmp fp, r8 │ │ mov r0, r8 │ │ it cc │ │ movcc r0, fp │ │ cmp ip, r0 │ │ - bcc.n 8301e │ │ + bcc.n 83086 │ │ str r4, [sp, #44] @ 0x2c │ │ add.w r4, r0, r0, lsl #1 │ │ add.w r1, r8, r8, lsl #1 │ │ str r5, [sp, #52] @ 0x34 │ │ cmp r8, fp │ │ str.w lr, [sp, #84] @ 0x54 │ │ add.w r9, lr, r1, lsl #3 │ │ it hi │ │ movhi lr, r9 │ │ lsls r2, r4, #3 │ │ mov r0, sl │ │ mov r1, lr │ │ - bl d4c50 │ │ + bl d50a2 │ │ add.w r6, sl, r4, lsl #3 │ │ cmp r8, fp │ │ - bls.n 830c8 │ │ + bls.n 83130 │ │ ldr r4, [sp, #32] │ │ ldrd r2, r3, [r9, #-16] │ │ sub.w lr, r6, #24 │ │ ldrd r5, r1, [r6, #-16] │ │ mov.w r8, #0 │ │ mov r0, lr │ │ sub.w ip, r9, #24 │ │ @@ -137290,21 +137203,21 @@ │ │ orr.w r0, r3, r3, lsl #1 │ │ stmia.w r1, {r2, r5, r6, r9, sl, fp} │ │ orr.w r1, r8, r8, lsl #1 │ │ add.w r6, lr, r0, lsl #3 │ │ add.w r9, ip, r1, lsl #3 │ │ ldr r0, [sp, #84] @ 0x54 │ │ cmp r9, r0 │ │ - beq.n 83130 │ │ + beq.n 83198 │ │ ldr.w sl, [sp, #80] @ 0x50 │ │ subs r4, #24 │ │ cmp r6, sl │ │ - bne.n 8306a │ │ + bne.n 830d2 │ │ mov r0, r9 │ │ - b.n 83136 │ │ + b.n 8319e │ │ mov r1, sl │ │ str r6, [sp, #76] @ 0x4c │ │ ldrd r2, r3, [r1, #8] │ │ mov.w ip, #0 │ │ ldrd r5, r4, [r9, #8] │ │ mov.w sl, #0 │ │ mov r8, r1 │ │ @@ -137328,67 +137241,67 @@ │ │ str.w lr, [sp, #84] @ 0x54 │ │ cmp r1, r6 │ │ itttt ne │ │ orrne.w r0, sl, sl, lsl #1 │ │ addne.w r9, r9, r0, lsl #3 │ │ ldrne r0, [sp, #72] @ 0x48 │ │ cmpne r9, r0 │ │ - bne.n 830cc │ │ + bne.n 83134 │ │ ldrd sl, r0, [sp, #80] @ 0x50 │ │ - b.n 83138 │ │ + b.n 831a0 │ │ mov r0, r9 │ │ ldr.w sl, [sp, #80] @ 0x50 │ │ mov r1, sl │ │ subs r2, r6, r1 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr r5, [sp, #52] @ 0x34 │ │ ldr.w r9, [sp, #60] @ 0x3c │ │ ldr r3, [sp, #68] @ 0x44 │ │ ldrd ip, r4, [sp, #40] @ 0x28 │ │ - b.n 8301e │ │ + b.n 83086 │ │ movs r5, #1 │ │ ldr r3, [sp, #36] @ 0x24 │ │ add r0, sp, #88 @ 0x58 │ │ strb.w r9, [r1, r5] │ │ cmp r3, fp │ │ str.w r2, [r0, r5, lsl #2] │ │ - bhi.w 82d22 │ │ + bhi.w 82d8a │ │ lsls r0, r2, #31 │ │ - bne.n 83184 │ │ + bne.n 831ec │ │ ldr r1, [sp, #36] @ 0x24 │ │ movs r0, #0 │ │ orr.w r2, r1, #1 │ │ clz r3, r2 │ │ movs r2, #62 @ 0x3e │ │ eor.w r2, r2, r3, lsl #1 │ │ strd r2, r0, [sp] │ │ ldr r0, [sp, #56] @ 0x38 │ │ mov r2, sl │ │ mov r3, ip │ │ - bl 8318c │ │ + bl 831f4 │ │ add sp, #420 @ 0x1a4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #100 @ 0x64 │ │ mov r9, r2 │ │ mov r8, r0 │ │ cmp r1, #33 @ 0x21 │ │ str r2, [sp, #60] @ 0x3c │ │ - bcs.w 833c0 │ │ + bcs.w 83428 │ │ mov fp, r1 │ │ movs.w r0, fp, lsr #1 │ │ str r0, [sp, #48] @ 0x30 │ │ - beq.w 839aa │ │ + beq.w 83a12 │ │ cmp.w fp, #8 │ │ str.w fp, [sp, #68] @ 0x44 │ │ str.w r8, [sp, #56] @ 0x38 │ │ - bcc.w 836c6 │ │ + bcc.w 8372e │ │ ldrd r0, r1, [r8, #8] │ │ ldrd r2, r3, [r8, #32] │ │ ldrd fp, ip, [r8, #56] @ 0x38 │ │ subs r0, r2, r0 │ │ ldrd r5, sl, [r8, #80] @ 0x50 │ │ sbcs.w r0, r3, r1 │ │ mov.w r2, #0 │ │ @@ -137555,33 +137468,33 @@ │ │ add.w r0, ip, #48 @ 0x30 │ │ stmia r0!, {r1, r2, r3, r4, r5, r6} │ │ add.w r0, ip, #72 @ 0x48 │ │ ldr.w ip, [sp, #52] @ 0x34 │ │ ldmia.w ip, {r1, r2, r3, r4, r5, r6} │ │ stmia r0!, {r1, r2, r3, r4, r5, r6} │ │ movs r1, #4 │ │ - b.n 836e8 │ │ + b.n 83750 │ │ ldr r4, [r7, #8] │ │ mov sl, r3 │ │ ldr r0, [r7, #12] │ │ str r0, [sp, #40] @ 0x28 │ │ sub.w r0, r9, #24 │ │ str r1, [sp, #52] @ 0x34 │ │ strd r0, r3, [sp, #28] │ │ str.w r8, [sp, #56] @ 0x38 │ │ cmp r4, #0 │ │ - beq.w 836ae │ │ + beq.w 83716 │ │ ldr r1, [sp, #52] @ 0x34 │ │ movs r0, #168 @ 0xa8 │ │ cmp r1, #64 @ 0x40 │ │ mov.w r3, r1, lsr #3 │ │ mla r2, r3, r0, r8 │ │ add.w r0, r3, r3, lsl #1 │ │ add.w r9, r8, r0, lsl #5 │ │ - bcs.n 83442 │ │ + bcs.n 834aa │ │ ldrd lr, ip, [r2, #8] │ │ mov r1, r4 │ │ ldrd r6, r5, [r9, #8] │ │ ldrd r4, r3, [r8, #8] │ │ subs.w r0, r6, lr │ │ sbcs.w r0, r5, ip │ │ mov.w r0, #0 │ │ @@ -137600,42 +137513,42 @@ │ │ mov r4, r1 │ │ mov.w r0, #0 │ │ it cc │ │ movcc r0, #1 │ │ eors r5, r0 │ │ it ne │ │ movne r9, r8 │ │ - b.n 8344c │ │ + b.n 834b4 │ │ mov r0, r8 │ │ mov r1, r9 │ │ - bl 839f4 │ │ + bl 83a5c │ │ mov r9, r0 │ │ sub.w r0, r9, r8 │ │ movw r1, #43691 @ 0xaaab │ │ movt r1, #43690 @ 0xaaaa │ │ subs r4, #1 │ │ lsrs r0, r0, #3 │ │ str r4, [sp, #44] @ 0x2c │ │ muls r0, r1 │ │ mov r2, r9 │ │ add.w ip, sp, #72 @ 0x48 │ │ str r0, [sp, #48] @ 0x30 │ │ ldmia.w r2, {r0, r1, r3, r4, r5, r6} │ │ stmia.w ip, {r0, r1, r3, r4, r5, r6} │ │ ldr r0, [sp, #40] @ 0x28 │ │ - cbz r0, 83488 │ │ + cbz r0, 834f0 │ │ ldr r2, [sp, #40] @ 0x28 │ │ ldrd r0, r1, [r9, #8] │ │ ldrd r2, r3, [r2, #8] │ │ subs r0, r2, r0 │ │ sbcs.w r0, r3, r1 │ │ - bcs.w 835a6 │ │ + bcs.w 8360e │ │ ldr r0, [sp, #52] @ 0x34 │ │ cmp sl, r0 │ │ - bcc.w 839c4 │ │ + bcc.w 83a2c │ │ add.w r1, r0, r0, lsl #1 │ │ ldr r0, [sp, #60] @ 0x3c │ │ str r1, [sp, #36] @ 0x24 │ │ movs r2, #0 │ │ add.w lr, r0, r1, lsl #3 │ │ ldr r0, [sp, #48] @ 0x30 │ │ mov r9, r8 │ │ @@ -137644,15 +137557,15 @@ │ │ add.w sl, r1, #8 │ │ add.w r6, r0, r0, lsl #1 │ │ str r0, [sp, #64] @ 0x40 │ │ add.w r0, r8, r6, lsl #3 │ │ str r0, [sp, #68] @ 0x44 │ │ cmp r9, r0 │ │ ldr r0, [sp, #60] @ 0x3c │ │ - bcs.n 834fa │ │ + bcs.n 83562 │ │ ldrd r6, r4, [sl] │ │ sub.w lr, lr, #24 │ │ ldrd r3, r1, [r9, #8] │ │ mov fp, sl │ │ subs r3, r3, r6 │ │ sbcs r1, r4 │ │ add.w r3, r2, r2, lsl #1 │ │ @@ -137665,74 +137578,74 @@ │ │ add.w r9, r9, #24 │ │ stmia.w r1, {r4, r5, r6, r8, sl, ip} │ │ it cc │ │ addcc r2, #1 │ │ mov sl, fp │ │ ldr r1, [sp, #68] @ 0x44 │ │ cmp r9, r1 │ │ - bcc.n 834c0 │ │ + bcc.n 83528 │ │ ldr.w r8, [sp, #52] @ 0x34 │ │ add.w fp, r2, r2, lsl #1 │ │ ldr r0, [sp, #64] @ 0x40 │ │ str r2, [sp, #68] @ 0x44 │ │ cmp r0, r8 │ │ - beq.n 8352a │ │ + beq.n 83592 │ │ mov r3, r9 │ │ sub.w lr, lr, #24 │ │ ldmia.w r3, {r0, r1, r2, r4, r5, r6} │ │ add.w ip, lr, fp, lsl #3 │ │ add.w r9, r9, #24 │ │ stmia.w ip, {r0, r1, r2, r4, r5, r6} │ │ mov r0, r8 │ │ ldr.w r8, [sp, #56] @ 0x38 │ │ ldr r2, [sp, #68] @ 0x44 │ │ - b.n 834ae │ │ + b.n 83516 │ │ ldrd r0, r1, [sp, #56] @ 0x38 │ │ mov.w r2, fp, lsl #3 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr r0, [sp, #68] @ 0x44 │ │ subs.w r1, r8, r0 │ │ - beq.n 83568 │ │ + beq.n 835d0 │ │ ldr r2, [sp, #36] @ 0x24 │ │ mov lr, r1 │ │ ldr r0, [sp, #28] │ │ add.w r8, r0, r2, lsl #3 │ │ ldr r0, [sp, #56] @ 0x38 │ │ add.w r9, r0, fp, lsl #3 │ │ mov r0, r8 │ │ mov ip, r9 │ │ ldmia.w r0, {r2, r3, r4, r5, r6, sl} │ │ sub.w r8, r8, #24 │ │ add.w r9, r9, #24 │ │ subs.w lr, lr, #1 │ │ stmia.w ip, {r2, r3, r4, r5, r6, sl} │ │ - bne.n 8354e │ │ + bne.n 835b6 │ │ ldr r0, [sp, #68] @ 0x44 │ │ ldr.w r8, [sp, #56] @ 0x38 │ │ ldr.w sl, [sp, #32] │ │ - cbz r0, 835a6 │ │ + cbz r0, 8360e │ │ ldr r2, [sp, #52] @ 0x34 │ │ cmp r2, r0 │ │ - bcc.w 839b2 │ │ + bcc.w 83a1a │ │ ldr.w r9, [sp, #60] @ 0x3c │ │ add r0, sp, #72 @ 0x48 │ │ ldr r4, [sp, #44] @ 0x2c │ │ mov r3, sl │ │ strd r4, r0, [sp] │ │ add.w r0, r8, fp, lsl #3 │ │ mov r2, r9 │ │ - bl 8318c │ │ + bl 831f4 │ │ ldr.w fp, [sp, #68] @ 0x44 │ │ str.w fp, [sp, #52] @ 0x34 │ │ cmp.w fp, #33 @ 0x21 │ │ - bcs.w 833d6 │ │ - b.n 831a4 │ │ + bcs.w 8343e │ │ + b.n 8320c │ │ ldr r0, [sp, #52] @ 0x34 │ │ cmp sl, r0 │ │ - bcc.w 839c4 │ │ + bcc.w 83a2c │ │ add.w r1, r0, r0, lsl #1 │ │ ldr r0, [sp, #60] @ 0x3c │ │ str r1, [sp, #64] @ 0x40 │ │ mov.w r9, #0 │ │ add.w sl, r0, r1, lsl #3 │ │ ldr r0, [sp, #48] @ 0x30 │ │ mov fp, r8 │ │ @@ -137741,15 +137654,15 @@ │ │ adds r1, #8 │ │ str r1, [sp, #68] @ 0x44 │ │ add.w r3, r0, r0, lsl #1 │ │ ldr.w ip, [sp, #60] @ 0x3c │ │ str r0, [sp, #48] @ 0x30 │ │ add.w lr, r8, r3, lsl #3 │ │ cmp fp, lr │ │ - bcs.n 8361a │ │ + bcs.n 83682 │ │ ldr r0, [sp, #68] @ 0x44 │ │ sub.w sl, sl, #24 │ │ ldrd r6, r4, [fp, #8] │ │ ldrd r1, r3, [r0] │ │ subs r1, r1, r6 │ │ sbcs.w r1, r3, r4 │ │ add.w r3, r9, r9, lsl #1 │ │ @@ -137760,70 +137673,70 @@ │ │ mov r3, fp │ │ add.w fp, fp, #24 │ │ ldmia.w r3, {r0, r1, r2, r4, r5, r6} │ │ stmia.w r8, {r0, r1, r2, r4, r5, r6} │ │ it cs │ │ addcs.w r9, r9, #1 │ │ cmp fp, lr │ │ - bcc.n 835e0 │ │ + bcc.n 83648 │ │ ldrd r0, r8, [sp, #48] @ 0x30 │ │ add.w r5, r9, r9, lsl #1 │ │ cmp r0, r8 │ │ - beq.n 8364a │ │ + beq.n 836b2 │ │ ldr r0, [sp, #60] @ 0x3c │ │ mov r1, fp │ │ add.w fp, fp, #24 │ │ add.w r9, r9, #1 │ │ add.w lr, r0, r5, lsl #3 │ │ ldmia.w r1, {r0, r2, r3, r4, r5, r6} │ │ sub.w sl, sl, #24 │ │ stmia.w lr, {r0, r2, r3, r4, r5, r6} │ │ mov r0, r8 │ │ ldr.w r8, [sp, #56] @ 0x38 │ │ - b.n 835ce │ │ + b.n 83636 │ │ ldr r4, [sp, #56] @ 0x38 │ │ lsls r2, r5, #3 │ │ ldr r1, [sp, #60] @ 0x3c │ │ mov r0, r4 │ │ - bl d4c50 │ │ + bl d50a2 │ │ subs.w lr, r8, r9 │ │ - beq.w 839aa │ │ + beq.w 83a12 │ │ ldr r1, [sp, #64] @ 0x40 │ │ add.w r8, r4, r5, lsl #3 │ │ ldr r0, [sp, #28] │ │ mov fp, lr │ │ str.w r8, [sp, #56] @ 0x38 │ │ add.w sl, r0, r1, lsl #3 │ │ mov r0, sl │ │ mov ip, r8 │ │ ldmia.w r0, {r1, r2, r3, r4, r5, r6} │ │ sub.w sl, sl, #24 │ │ add.w r8, r8, #24 │ │ subs.w lr, lr, #1 │ │ stmia.w ip, {r1, r2, r3, r4, r5, r6} │ │ - bne.n 83670 │ │ + bne.n 836d8 │ │ ldr r1, [sp, #52] @ 0x34 │ │ cmp r1, r9 │ │ - bcc.w 839c6 │ │ + bcc.w 83a2e │ │ ldrd r8, r9, [sp, #56] @ 0x38 │ │ movs r0, #0 │ │ ldr.w sl, [sp, #32] │ │ cmp.w fp, #33 @ 0x21 │ │ ldr r4, [sp, #44] @ 0x2c │ │ str r0, [sp, #40] @ 0x28 │ │ str.w fp, [sp, #52] @ 0x34 │ │ - bcs.w 833d2 │ │ - b.n 831a4 │ │ + bcs.w 8343a │ │ + b.n 8320c │ │ ldr r1, [sp, #52] @ 0x34 │ │ movs r0, #1 │ │ str r0, [sp, #0] │ │ mov r0, r8 │ │ mov r2, r9 │ │ mov r3, sl │ │ - bl 82c72 │ │ + bl 82cda │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov ip, r8 │ │ mov r1, r9 │ │ ldmia.w ip, {r0, r2, r3, r4, r5, r6} │ │ stmia r1!, {r0, r2, r3, r4, r5, r6} │ │ @@ -137834,80 +137747,80 @@ │ │ ldmia.w ip, {r1, r2, r3, r4, r5, r6} │ │ stmia r0!, {r1, r2, r3, r4, r5, r6} │ │ movs r1, #1 │ │ ldr r0, [sp, #68] @ 0x44 │ │ cmp r1, sl │ │ sub.w r0, r0, sl │ │ strd r0, r1, [sp, #32] │ │ - bcs.n 83794 │ │ + bcs.n 837fc │ │ ldr r1, [sp, #36] @ 0x24 │ │ add.w r0, r1, r1, lsl #1 │ │ mov.w fp, r0, lsl #3 │ │ - b.n 83730 │ │ + b.n 83798 │ │ mov r0, r9 │ │ ldrd r6, r1, [sp, #24] │ │ ldr.w r8, [sp, #56] @ 0x38 │ │ ldrd sl, fp, [sp, #48] @ 0x30 │ │ strd r1, r6, [r0] │ │ ldr r0, [sp, #40] @ 0x28 │ │ str.w r0, [lr, #-8] │ │ ldr r0, [sp, #44] @ 0x2c │ │ strd r3, r2, [lr, #-16] │ │ str.w r0, [lr, #-4] │ │ ldr r1, [sp, #64] @ 0x40 │ │ add.w fp, fp, #24 │ │ adds r1, #1 │ │ cmp r1, sl │ │ - beq.n 83794 │ │ + beq.n 837fc │ │ add.w r0, r1, r1, lsl #1 │ │ str r1, [sp, #64] @ 0x40 │ │ add.w ip, r8, r0, lsl #3 │ │ add.w lr, r9, r0, lsl #3 │ │ ldmia.w ip, {r0, r1, r2, r4, r5, r6} │ │ mov r3, lr │ │ stmia r3!, {r0, r1, r2, r4, r5, r6} │ │ ldrd r0, r1, [lr, #-16] │ │ ldrd r3, r2, [lr, #8] │ │ subs r0, r3, r0 │ │ sbcs.w r0, r2, r1 │ │ - bcs.n 83724 │ │ + bcs.n 8378c │ │ ldrd r0, r1, [lr] │ │ str.w fp, [sp, #52] @ 0x34 │ │ strd r1, r0, [sp, #24] │ │ ldrd r1, r0, [lr, #16] │ │ strd r1, r0, [sp, #40] @ 0x28 │ │ mov r0, fp │ │ add.w lr, r9, r0 │ │ cmp r0, #24 │ │ sub.w r4, lr, #24 │ │ mov r5, lr │ │ ldmia.w r4, {r1, r6, r8, sl, fp, ip} │ │ stmia.w r5, {r1, r6, r8, sl, fp, ip} │ │ - beq.n 83702 │ │ + beq.n 8376a │ │ ldrd r1, r6, [lr, #-40] @ 0x28 │ │ subs r0, #24 │ │ subs r1, r3, r1 │ │ sbcs.w r1, r2, r6 │ │ - bcc.n 8376c │ │ + bcc.n 837d4 │ │ add r0, r9 │ │ - b.n 83704 │ │ + b.n 8376c │ │ add.w r0, sl, sl, lsl #1 │ │ ldrd r1, sl, [sp, #32] │ │ add.w lr, r9, r0, lsl #3 │ │ cmp sl, r1 │ │ - bcs.n 8386c │ │ + bcs.n 838d4 │ │ ldr r1, [sp, #56] @ 0x38 │ │ str.w lr, [sp, #52] @ 0x34 │ │ add.w r0, r1, r0, lsl #3 │ │ str r0, [sp, #28] │ │ add.w r0, sl, sl, lsl #1 │ │ movs r1, #24 │ │ strd lr, r1, [sp, #40] @ 0x28 │ │ lsls r0, r0, #3 │ │ - b.n 837f8 │ │ + b.n 83860 │ │ ldr.w lr, [sp, #52] @ 0x34 │ │ mov r1, lr │ │ ldrd r3, r2, [sp, #12] │ │ ldr.w sl, [sp, #36] @ 0x24 │ │ strd r2, r3, [r1] │ │ ldr r1, [sp, #64] @ 0x40 │ │ strd r1, r9, [r8, #-16] │ │ @@ -137920,52 +137833,52 @@ │ │ subs r1, #24 │ │ str r1, [sp, #44] @ 0x2c │ │ ldr r1, [sp, #40] @ 0x28 │ │ adds r1, #24 │ │ str r1, [sp, #40] @ 0x28 │ │ ldr r1, [sp, #32] │ │ cmp sl, r1 │ │ - beq.n 8386c │ │ + beq.n 838d4 │ │ add.w r1, sl, sl, lsl #1 │ │ ldr r2, [sp, #28] │ │ add.w r8, r2, r1, lsl #3 │ │ add.w r1, lr, r1, lsl #3 │ │ ldmia.w r8, {r2, r4, r5, r6, fp, ip} │ │ mov r3, r1 │ │ stmia.w r3, {r2, r4, r5, r6, fp, ip} │ │ ldrd r5, r2, [r1, #8] │ │ ldrd r3, r6, [r1, #-16] │ │ str r5, [sp, #64] @ 0x40 │ │ subs r3, r5, r3 │ │ sbcs.w r3, r2, r6 │ │ - bcs.n 837e2 │ │ + bcs.n 8384a │ │ mov r9, r2 │ │ ldrd r2, r3, [r1] │ │ str.w sl, [sp, #36] @ 0x24 │ │ strd r3, r2, [sp, #12] │ │ ldrd r2, r1, [r1, #16] │ │ strd r2, r1, [sp, #20] │ │ ldrd r3, r1, [sp, #40] @ 0x28 │ │ add.w r8, r3, r0 │ │ cmp r0, r1 │ │ sub.w r6, r8, #24 │ │ mov r4, r8 │ │ ldmia.w r6, {r2, r5, sl, fp, ip, lr} │ │ stmia.w r4, {r2, r5, sl, fp, ip, lr} │ │ - beq.n 837be │ │ + beq.n 83826 │ │ ldrd r2, r6, [r8, #-40] @ 0x28 │ │ adds r1, #24 │ │ ldr r5, [sp, #64] @ 0x40 │ │ subs r3, #24 │ │ subs r2, r5, r2 │ │ sbcs.w r2, r9, r6 │ │ - bcc.n 8383c │ │ + bcc.n 838a4 │ │ ldr.w lr, [sp, #52] @ 0x34 │ │ adds r1, r3, r0 │ │ - b.n 837c4 │ │ + b.n 8382c │ │ ldr r0, [sp, #68] @ 0x44 │ │ ldr.w fp, [sp, #60] @ 0x3c │ │ add.w r1, r0, r0, lsl #1 │ │ mvn.w r0, #23 │ │ str r1, [sp, #32] │ │ add.w r0, r0, r1, lsl #3 │ │ str r0, [sp, #44] @ 0x2c │ │ @@ -138037,22 +137950,22 @@ │ │ orr.w r0, r0, r0, lsl #1 │ │ add.w fp, fp, r0, lsl #3 │ │ orr.w r0, lr, lr, lsl #1 │ │ ldr.w lr, [sp, #52] @ 0x34 │ │ add.w lr, lr, r0, lsl #3 │ │ ldr r0, [sp, #48] @ 0x30 │ │ subs r0, #1 │ │ - bne.n 83890 │ │ + bne.n 838f8 │ │ ldr r0, [sp, #64] @ 0x40 │ │ mov r9, r1 │ │ ldr.w r8, [sp, #56] @ 0x38 │ │ add.w ip, r0, #24 │ │ ldr r0, [sp, #68] @ 0x44 │ │ lsls r1, r0, #31 │ │ - beq.n 8399a │ │ + beq.n 83a02 │ │ mov r1, lr │ │ cmp fp, ip │ │ it cc │ │ movcc r1, fp │ │ ldmia.w r1, {r0, r2, r3, r4, r5, r6} │ │ mov.w r1, #0 │ │ stmia.w r9, {r0, r2, r3, r4, r5, r6} │ │ @@ -138067,72 +137980,72 @@ │ │ add.w fp, fp, r0, lsl #3 │ │ ldr r4, [sp, #60] @ 0x3c │ │ cmp fp, ip │ │ mov r5, r8 │ │ itt eq │ │ addeq.w r0, sl, #24 │ │ cmpeq lr, r0 │ │ - bne.n 839c0 │ │ + bne.n 83a28 │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #56] @ (839ec ) │ │ + ldr r0, [pc, #56] @ (83a54 ) │ │ movs r1, #19 │ │ - ldr r2, [pc, #56] @ (839f0 ) │ │ + ldr r2, [pc, #56] @ (83a58 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ - bl 413cc │ │ + bl 3fd60 │ │ + bl 416d4 │ │ udf #254 @ 0xfe │ │ - ldr r3, [pc, #32] @ (839e8 ) │ │ + ldr r3, [pc, #32] @ (83a50 ) │ │ mov r0, r9 │ │ mov r2, r1 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ mov r6, r0 │ │ ldr r0, [sp, #32] │ │ mov r1, r4 │ │ lsls r2, r0, #3 │ │ mov r0, r5 │ │ - bl d4c50 │ │ + bl d50a2 │ │ mov r0, r6 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ nop │ │ - strh r0, [r2, #28] │ │ + strh r0, [r7, #24] │ │ movs r5, r0 │ │ - strb r7, [r3, r7] │ │ - vrsra.u64 d24, d2, #7 │ │ + strb r7, [r6, r5] │ │ + vrsra.u32 d24, d26, #7 │ │ movs r5, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ mov fp, r2 │ │ mov r4, r1 │ │ cmp r3, #8 │ │ - bcc.n 83a46 │ │ + bcc.n 83aae │ │ lsrs r6, r3, #3 │ │ mov.w r9, #168 @ 0xa8 │ │ mla r2, r6, r9, r0 │ │ add.w sl, r6, r6, lsl #1 │ │ mov r3, r6 │ │ add.w r1, r0, sl, lsl #5 │ │ - bl 839f4 │ │ + bl 83a5c │ │ mla r2, r6, r9, r4 │ │ add.w r1, r4, sl, lsl #5 │ │ mov r8, r0 │ │ mov r0, r4 │ │ mov r3, r6 │ │ - bl 839f4 │ │ + bl 83a5c │ │ mla r2, r6, r9, fp │ │ add.w r1, fp, sl, lsl #5 │ │ mov r4, r0 │ │ mov r0, fp │ │ mov r3, r6 │ │ - bl 839f4 │ │ + bl 83a5c │ │ mov fp, r0 │ │ mov r0, r8 │ │ ldrd lr, ip, [fp, #8] │ │ movs r5, #0 │ │ ldrd r3, r6, [r4, #8] │ │ ldrd r2, r8, [r0, #8] │ │ subs.w r1, r3, lr │ │ @@ -138155,15 +138068,15 @@ │ │ eors r3, r5 │ │ it ne │ │ movne r4, r0 │ │ mov r0, r4 │ │ add sp, #4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - bmi.n 83a42 │ │ + bmi.n 83aaa │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #292 @ 0x124 │ │ movs r6, #0 │ │ mov r4, r0 │ │ movs r0, #8 │ │ @@ -138176,15 +138089,15 @@ │ │ add.w r0, r3, #8 │ │ str r6, [sp, #188] @ 0xbc │ │ str r6, [sp, #200] @ 0xc8 │ │ str r6, [sp, #220] @ 0xdc │ │ add.w r6, r2, #184 @ 0xb8 │ │ str r6, [sp, #212] @ 0xd4 │ │ str r0, [sp, #216] @ 0xd8 │ │ - beq.w 841ea │ │ + beq.w 84252 │ │ movs r0, #0 │ │ ldr.w r3, [r2, #216] @ 0xd8 │ │ str r0, [sp, #104] @ 0x68 │ │ movs r5, #0 │ │ ldrd r6, r0, [r2, #248] @ 0xf8 │ │ cmp.w r3, #327680 @ 0x50000 │ │ strd r6, r0, [sp, #72] @ 0x48 │ │ @@ -138261,61 +138174,61 @@ │ │ adds r1, r3, r2 │ │ sub.w r3, lr, #1 │ │ subs r0, r0, r1 │ │ str r0, [sp, #156] @ 0x9c │ │ add.w r0, r8, #1 │ │ ldrb.w fp, [r0, #-1] │ │ cmp r6, #63 @ 0x3f │ │ - bne.n 83bc6 │ │ + bne.n 83c2e │ │ cmp.w fp, #1 │ │ - bhi.w 84140 │ │ + bhi.w 841a8 │ │ and.w r1, r6, #63 @ 0x3f │ │ and.w r4, fp, #127 @ 0x7f │ │ rsb r5, r1, #32 │ │ subs.w r2, r1, #32 │ │ lsl.w r1, r4, r1 │ │ lsr.w r5, r4, r5 │ │ it pl │ │ lslpl.w r5, r4, r2 │ │ it pl │ │ movpl r1, #0 │ │ orr.w ip, ip, r1 │ │ orr.w sl, sl, r5 │ │ sxtb.w r1, fp │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ - bgt.n 83c06 │ │ + bgt.n 83c6e │ │ subs r3, #1 │ │ adds r0, #1 │ │ adds r6, #7 │ │ adds r4, r3, #1 │ │ - bne.n 83bb6 │ │ - b.n 84148 │ │ + bne.n 83c1e │ │ + b.n 841b0 │ │ strd r0, r3, [sp, #204] @ 0xcc │ │ orrs.w r0, ip, sl │ │ - beq.n 83cc8 │ │ + beq.n 83d30 │ │ ldr r0, [sp, #216] @ 0xd8 │ │ cmp.w sl, #0 │ │ - bne.n 83c2c │ │ + bne.n 83c94 │ │ ldr r1, [r0, #8] │ │ sub.w r3, ip, #1 │ │ cmp r3, r1 │ │ - bcs.n 83c2c │ │ + bcs.n 83c94 │ │ movs r1, #104 @ 0x68 │ │ ldr r0, [r0, #4] │ │ mla r4, r3, r1, r0 │ │ - b.n 83c9e │ │ + b.n 83d06 │ │ ldr r1, [r0, #12] │ │ cmp r1, #0 │ │ - beq.w 841d4 │ │ + beq.w 8423c │ │ ldr.w lr, [r0, #16] │ │ ldrh.w r8, [r1, #1238] @ 0x4d6 │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ mov r3, r1 │ │ mov.w r6, r8, lsl #3 │ │ - cbz r6, 83c7c │ │ + cbz r6, 83ce4 │ │ ldrd r2, r4, [r3], #8 │ │ subs r6, #8 │ │ adds r0, #1 │ │ subs.w r5, ip, r2 │ │ sbcs.w r5, sl, r4 │ │ mov.w r5, #0 │ │ it cc │ │ @@ -138323,139 +138236,139 @@ │ │ subs.w r2, r2, ip │ │ sbcs.w r2, r4, sl │ │ mov.w r2, #0 │ │ it cc │ │ movcc r2, #1 │ │ subs r4, r2, r5 │ │ cmp r4, #1 │ │ - beq.n 83c46 │ │ + beq.n 83cae │ │ uxtb r2, r4 │ │ - cbnz r2, 83c7e │ │ - b.n 83c94 │ │ + cbnz r2, 83ce6 │ │ + b.n 83cfc │ │ mov r0, r8 │ │ cmp.w lr, #0 │ │ - beq.w 841d4 │ │ + beq.w 8423c │ │ add.w r0, r1, r0, lsl #2 │ │ sub.w lr, lr, #1 │ │ ldr.w r1, [r0, #1240] @ 0x4d8 │ │ - b.n 83c38 │ │ + b.n 83ca0 │ │ movs r2, #104 @ 0x68 │ │ mla r0, r0, r2, r1 │ │ add.w r4, r0, #88 @ 0x58 │ │ ldrb.w r0, [r4, #98] @ 0x62 │ │ ldr.w sl, [sp, #148] @ 0x94 │ │ cmp r0, #1 │ │ ittt eq │ │ ldreq r0, [sp, #220] @ 0xdc │ │ addeq r0, #1 │ │ streq r0, [sp, #220] @ 0xdc │ │ ldrh.w r0, [r4, #96] @ 0x60 │ │ str r4, [sp, #168] @ 0xa8 │ │ cmp r0, #46 @ 0x2e │ │ - bne.n 83cd4 │ │ + bne.n 83d3c │ │ ldr r0, [r4, #0] │ │ cmp r0, #1 │ │ - bne.n 83ce0 │ │ + bne.n 83d48 │ │ ldrd fp, r1, [r4, #8] │ │ - cbnz r1, 83cee │ │ - b.n 83d22 │ │ + cbnz r1, 83d56 │ │ + b.n 83d8a │ │ ldr r0, [sp, #220] @ 0xdc │ │ subs r0, #1 │ │ str r0, [sp, #220] @ 0xdc │ │ movs r0, #0 │ │ str r0, [sp, #168] @ 0xa8 │ │ - b.n 83d22 │ │ + b.n 83d8a │ │ ldr r0, [r4, #0] │ │ cmp r0, #1 │ │ - bne.n 83cfe │ │ + bne.n 83d66 │ │ ldrd r3, r1, [r4, #8] │ │ - b.n 83d0a │ │ + b.n 83d72 │ │ ldr r1, [r4, #4] │ │ cmp r1, #6 │ │ - bcs.w 843fe │ │ + bcs.w 84466 │ │ add.w fp, r4, #8 │ │ - cbz r1, 83d22 │ │ + cbz r1, 83d8a │ │ movs r0, #0 │ │ mov.w r8, r1, lsl #4 │ │ movs r4, #0 │ │ str r0, [sp, #44] @ 0x2c │ │ str r0, [sp, #28] │ │ str r0, [sp, #160] @ 0xa0 │ │ - b.n 83d4c │ │ + b.n 83db4 │ │ ldr r1, [r4, #4] │ │ cmp r1, #5 │ │ - bhi.w 843fe │ │ + bhi.w 84466 │ │ add.w r3, r4, #8 │ │ ldr r0, [sp, #160] @ 0xa0 │ │ ldr r2, [r0, #32] │ │ add r0, sp, #224 @ 0xe0 │ │ str r1, [sp, #0] │ │ add r1, sp, #204 @ 0xcc │ │ - bl 887dc │ │ + bl 88844 │ │ ldrb.w r0, [sp, #224] @ 0xe0 │ │ cmp r0, #82 @ 0x52 │ │ - bne.w 842b2 │ │ + bne.w 8431a │ │ ldr.w lr, [sp, #208] @ 0xd0 │ │ cmp.w lr, #0 │ │ - bne.w 83b7e │ │ - b.n 841e0 │ │ + bne.w 83be6 │ │ + b.n 84248 │ │ ldr r0, [sp, #272] @ 0x110 │ │ str r0, [sp, #16] │ │ ldr r0, [sp, #276] @ 0x114 │ │ str r0, [sp, #12] │ │ movs r0, #1 │ │ str r0, [sp, #28] │ │ strd r1, r2, [sp, #48] @ 0x30 │ │ add.w fp, fp, #16 │ │ subs.w r8, r8, #16 │ │ - beq.w 83f9c │ │ + beq.w 84004 │ │ ldr r0, [sp, #212] @ 0xd4 │ │ ldmia.w fp, {r1, r3, r6} │ │ ldr r2, [r0, #32] │ │ add r0, sp, #264 @ 0x108 │ │ ldr.w r5, [fp, #12] │ │ stmia r0!, {r1, r3, r6} │ │ add r0, sp, #224 @ 0xe0 │ │ add r1, sp, #204 @ 0xcc │ │ add r3, sp, #264 @ 0x108 │ │ str r5, [sp, #276] @ 0x114 │ │ - bl 84988 │ │ + bl 849f0 │ │ ldrd r0, r1, [sp, #224] @ 0xe0 │ │ eor.w r0, r0, #46 @ 0x2e │ │ orrs r0, r1 │ │ - beq.w 841bc │ │ + beq.w 84224 │ │ ldrh.w r0, [sp, #240] @ 0xf0 │ │ cmp r0, #85 @ 0x55 │ │ - beq.w 83e5e │ │ + beq.w 83ec6 │ │ cmp r0, #18 │ │ - beq.n 83df0 │ │ + beq.n 83e58 │ │ cmp r0, #17 │ │ - bne.n 83d40 │ │ + bne.n 83da8 │ │ add r0, sp, #264 @ 0x108 │ │ add r1, sp, #224 @ 0xe0 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldr r0, [sp, #264] @ 0x108 │ │ lsls r1, r0, #26 │ │ - beq.w 83ecc │ │ + beq.w 83f34 │ │ cmp r0, #12 │ │ - bne.n 83d40 │ │ + bne.n 83da8 │ │ ldrd r1, r0, [sp, #140] @ 0x8c │ │ cmp r1, r0 │ │ - bcc.w 842c8 │ │ + bcc.w 84330 │ │ ldr r0, [sp, #272] @ 0x110 │ │ umull r1, r0, r0, sl │ │ cmp r0, #0 │ │ - bne.w 842d2 │ │ + bne.w 8433a │ │ ldr r0, [sp, #152] @ 0x98 │ │ cmp r0, r1 │ │ - bcc.w 842de │ │ + bcc.w 84346 │ │ sub.w r2, sl, #1 │ │ movs r5, #25 │ │ cmp r2, #7 │ │ - bhi.w 842e8 │ │ + bhi.w 84350 │ │ ldr r0, [sp, #132] @ 0x84 │ │ ldr r3, [sp, #152] @ 0x98 │ │ add r0, r1 │ │ subs r3, r3, r1 │ │ tbh [pc, r2, lsl #1] │ │ movs r0, r1 │ │ lsls r1, r3, #2 │ │ @@ -138463,43 +138376,43 @@ │ │ lsls r4, r6, #2 │ │ lsls r1, r3, #10 │ │ lsls r1, r3, #10 │ │ lsls r1, r3, #10 │ │ lsls r7, r3, #2 │ │ ldr r2, [sp, #152] @ 0x98 │ │ cmp r2, r1 │ │ - beq.w 842fa │ │ + beq.w 84362 │ │ ldrb r0, [r0, #0] │ │ movs r1, #0 │ │ - b.n 83f44 │ │ + b.n 83fac │ │ add r0, sp, #264 @ 0x108 │ │ add r1, sp, #224 @ 0xe0 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldr r0, [sp, #264] @ 0x108 │ │ lsls r1, r0, #26 │ │ - beq.n 83ede │ │ + beq.n 83f46 │ │ ldrd r1, r2, [sp, #48] @ 0x30 │ │ cmp r0, #7 │ │ - beq.n 83d30 │ │ + beq.n 83d98 │ │ cmp r0, #12 │ │ - bne.n 83d3c │ │ + bne.n 83da4 │ │ ldrd r1, r0, [sp, #140] @ 0x8c │ │ cmp r1, r0 │ │ - bcc.w 84308 │ │ + bcc.w 84370 │ │ ldr r0, [sp, #272] @ 0x110 │ │ umull r1, r0, r0, sl │ │ cmp r0, #0 │ │ - bne.w 84312 │ │ + bne.w 8437a │ │ ldr r0, [sp, #152] @ 0x98 │ │ cmp r0, r1 │ │ - bcc.w 84316 │ │ + bcc.w 8437e │ │ sub.w r2, sl, #1 │ │ movs r5, #25 │ │ cmp r2, #7 │ │ - bhi.w 84320 │ │ + bhi.w 84388 │ │ ldr r0, [sp, #132] @ 0x84 │ │ ldr r3, [sp, #152] @ 0x98 │ │ add r0, r1 │ │ subs r3, r3, r1 │ │ tbh [pc, r2, lsl #1] │ │ movs r0, r1 │ │ lsls r1, r1, #2 │ │ @@ -138507,159 +138420,159 @@ │ │ lsls r3, r4, #2 │ │ lsls r6, r6, #9 │ │ lsls r6, r6, #9 │ │ lsls r6, r6, #9 │ │ lsls r7, r1, #2 │ │ ldr r2, [sp, #152] @ 0x98 │ │ cmp r2, r1 │ │ - beq.w 84322 │ │ + beq.w 8438a │ │ ldrb r1, [r0, #0] │ │ movs r2, #0 │ │ - b.n 83f90 │ │ + b.n 83ff8 │ │ add r0, sp, #264 @ 0x108 │ │ add r1, sp, #224 @ 0xe0 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldr r1, [sp, #264] @ 0x108 │ │ ldr r0, [sp, #272] @ 0x110 │ │ and.w r2, r1, #63 @ 0x3f │ │ cmp r2, #22 │ │ - beq.n 83ec8 │ │ + beq.n 83f30 │ │ cmp r1, #24 │ │ - bne.n 83ed8 │ │ + bne.n 83f40 │ │ ldr r1, [sp, #136] @ 0x88 │ │ ldr r2, [sp, #124] @ 0x7c │ │ cmp r2, r1 │ │ - bcc.w 842c2 │ │ + bcc.w 8432a │ │ ldr r1, [sp, #120] @ 0x78 │ │ umull r1, r0, r0, r1 │ │ cmp r0, #0 │ │ - bne.w 842be │ │ + bne.w 84326 │ │ ldr r0, [sp, #112] @ 0x70 │ │ cmp r0, r1 │ │ - bcc.w 842d6 │ │ + bcc.w 8433e │ │ mov r2, r0 │ │ ldr r0, [sp, #116] @ 0x74 │ │ add r0, r1 │ │ subs r1, r2, r1 │ │ ldr r2, [sp, #108] @ 0x6c │ │ cmp.w r2, #2048 @ 0x800 │ │ - bne.n 83ef0 │ │ + bne.n 83f58 │ │ cmp r1, #8 │ │ - bcc.w 842ea │ │ + bcc.w 84352 │ │ ldrb r2, [r0, #7] │ │ ldr.w r1, [r0, #3] │ │ lsls r2, r2, #24 │ │ orrs.w r2, r2, r1, lsr #8 │ │ - bne.w 842be │ │ + bne.w 84326 │ │ ldrb r2, [r0, #2] │ │ lsls r1, r1, #24 │ │ ldrh r0, [r0, #0] │ │ orr.w r0, r0, r2, lsl #16 │ │ orrs r0, r1 │ │ - b.n 83ef8 │ │ + b.n 83f60 │ │ ldr r1, [sp, #128] @ 0x80 │ │ - b.n 83efa │ │ + b.n 83f62 │ │ ldr r0, [sp, #272] @ 0x110 │ │ movs r4, #1 │ │ str r0, [sp, #36] @ 0x24 │ │ ldr r0, [sp, #276] @ 0x114 │ │ str r0, [sp, #32] │ │ - b.n 83d40 │ │ + b.n 83da8 │ │ movs r0, #0 │ │ str r0, [sp, #160] @ 0xa0 │ │ - b.n 83d40 │ │ + b.n 83da8 │ │ ldr r0, [sp, #272] @ 0x110 │ │ ldrd r1, r2, [sp, #48] @ 0x30 │ │ str r0, [sp, #20] │ │ ldr r0, [sp, #276] @ 0x114 │ │ str r0, [sp, #24] │ │ movs r0, #1 │ │ str r0, [sp, #44] @ 0x2c │ │ - b.n 83d3c │ │ + b.n 83da4 │ │ cmp r1, #4 │ │ - bcc.w 842ea │ │ + bcc.w 84352 │ │ ldr r0, [r0, #0] │ │ ldr r1, [sp, #136] @ 0x88 │ │ add r0, r1 │ │ str r0, [sp, #40] @ 0x28 │ │ movs r0, #1 │ │ str r0, [sp, #160] @ 0xa0 │ │ - b.n 83d40 │ │ + b.n 83da8 │ │ cmp r3, #2 │ │ - bcc.w 842fa │ │ + bcc.w 84362 │ │ movs r1, #0 │ │ ldrh r0, [r0, #0] │ │ - b.n 83f44 │ │ + b.n 83fac │ │ cmp r3, #7 │ │ - bls.w 842fa │ │ + bls.w 84362 │ │ ldrb r3, [r0, #2] │ │ movs r4, #1 │ │ ldr.w r1, [r0, #3] │ │ ldrb r2, [r0, #7] │ │ ldrh r0, [r0, #0] │ │ lsrs r6, r1, #8 │ │ orr.w r0, r0, r3, lsl #16 │ │ orr.w r2, r6, r2, lsl #24 │ │ orr.w r0, r0, r1, lsl #24 │ │ str r0, [sp, #176] @ 0xb0 │ │ str r2, [sp, #164] @ 0xa4 │ │ strd r2, r0, [sp, #32] │ │ - b.n 83d40 │ │ + b.n 83da8 │ │ cmp r3, #4 │ │ - bcc.w 842fa │ │ + bcc.w 84362 │ │ movs r1, #0 │ │ ldr r0, [r0, #0] │ │ str r1, [sp, #164] @ 0xa4 │ │ str r0, [sp, #176] @ 0xb0 │ │ movs r4, #1 │ │ str r0, [sp, #36] @ 0x24 │ │ movs r0, #0 │ │ str r0, [sp, #32] │ │ - b.n 83d40 │ │ + b.n 83da8 │ │ cmp r3, #2 │ │ - bcc.w 84322 │ │ + bcc.w 8438a │ │ movs r2, #0 │ │ ldrh r1, [r0, #0] │ │ - b.n 83f90 │ │ + b.n 83ff8 │ │ cmp r3, #7 │ │ - bls.w 84322 │ │ + bls.w 8438a │ │ ldr.w r1, [r0, #3] │ │ ldrb r2, [r0, #7] │ │ ldrb r3, [r0, #2] │ │ ldrh r0, [r0, #0] │ │ lsrs r6, r1, #8 │ │ orr.w r2, r6, r2, lsl #24 │ │ orr.w r0, r0, r3, lsl #16 │ │ orr.w r1, r0, r1, lsl #24 │ │ movs r0, #1 │ │ str r0, [sp, #44] @ 0x2c │ │ strd r1, r2, [sp, #20] │ │ - b.n 83d3c │ │ + b.n 83da4 │ │ cmp r3, #4 │ │ - bcc.w 84322 │ │ + bcc.w 8438a │ │ movs r2, #0 │ │ ldr r1, [r0, #0] │ │ movs r0, #1 │ │ str r1, [sp, #20] │ │ str r0, [sp, #44] @ 0x2c │ │ movs r0, #0 │ │ str r0, [sp, #24] │ │ - b.n 83d3c │ │ + b.n 83da4 │ │ ldr r0, [sp, #160] @ 0xa0 │ │ ldr r1, [sp, #16] │ │ ldrd fp, r2, [sp, #8] │ │ lsls r0, r0, #31 │ │ - beq.n 84054 │ │ + beq.n 840bc │ │ ldrd r2, r0, [sp, #88] @ 0x58 │ │ ldr r3, [sp, #40] @ 0x28 │ │ ldr r1, [r2, r0] │ │ ldr r0, [sp, #84] @ 0x54 │ │ cmp r1, r3 │ │ ldr r0, [r2, r0] │ │ - bcc.w 84338 │ │ + bcc.w 843a0 │ │ add r0, r3 │ │ str r0, [sp, #248] @ 0xf8 │ │ ldr r0, [sp, #68] @ 0x44 │ │ mov.w sl, #0 │ │ strh.w r0, [sp, #246] @ 0xf6 │ │ subs r1, r1, r3 │ │ ldr r0, [sp, #80] @ 0x50 │ │ @@ -138678,135 +138591,135 @@ │ │ strh.w sl, [r2] │ │ ldr r2, [sp, #60] @ 0x3c │ │ strb.w r2, [sp, #256] @ 0x100 │ │ str r1, [sp, #252] @ 0xfc │ │ str r0, [sp, #224] @ 0xe0 │ │ add r0, sp, #264 @ 0x108 │ │ add r1, sp, #224 @ 0xe0 │ │ - bl 88e20 │ │ + bl 88e4c │ │ add.w fp, sp, #264 @ 0x108 │ │ ldrd r5, r6, [sp, #280] @ 0x118 │ │ ldmia.w fp, {r0, r1, r8, fp} │ │ eor.w r2, r0, #2 │ │ orrs r1, r2 │ │ - beq.n 840e2 │ │ + beq.n 8414a │ │ lsls r0, r0, #31 │ │ - beq.n 840fe │ │ + beq.n 84166 │ │ subs.w r0, r8, r5 │ │ sbcs.w r0, fp, r6 │ │ - bcs.n 83ff6 │ │ + bcs.n 8405e │ │ ldr r4, [sp, #104] @ 0x68 │ │ ldr r0, [sp, #192] @ 0xc0 │ │ cmp r4, r0 │ │ - bne.n 84032 │ │ + bne.n 8409a │ │ add r0, sp, #192 @ 0xc0 │ │ - bl 827d8 │ │ + bl 82840 │ │ ldr r0, [sp, #196] @ 0xc4 │ │ str r0, [sp, #96] @ 0x60 │ │ ldr r1, [sp, #96] @ 0x60 │ │ add.w r0, r4, r4, lsl #1 │ │ adds r4, #1 │ │ str r4, [sp, #104] @ 0x68 │ │ mov.w sl, #1 │ │ str.w r8, [r1, r0, lsl #3] │ │ add.w r0, r1, r0, lsl #3 │ │ strd fp, r5, [r0, #4] │ │ strd r6, r9, [r0, #12] │ │ str r4, [sp, #200] @ 0xc8 │ │ - b.n 83ff6 │ │ + b.n 8405e │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldr.w fp, [sp, #24] │ │ ands r0, r4 │ │ lsls r0, r0, #31 │ │ - beq.n 8408c │ │ + beq.n 840f4 │ │ ldr r4, [sp, #36] @ 0x24 │ │ ldr r6, [sp, #20] │ │ ldr r5, [sp, #32] │ │ subs r0, r4, r6 │ │ sbcs.w r0, r5, fp │ │ - bcs.w 83d22 │ │ + bcs.w 83d8a │ │ ldr r0, [sp, #192] @ 0xc0 │ │ mov r8, r6 │ │ ldr r1, [sp, #104] @ 0x68 │ │ cmp r1, r0 │ │ - bne.n 840c0 │ │ + bne.n 84128 │ │ add r0, sp, #192 @ 0xc0 │ │ - bl 827d8 │ │ + bl 82840 │ │ ldr r0, [sp, #196] @ 0xc4 │ │ mov r8, r6 │ │ str r0, [sp, #96] @ 0x60 │ │ ldr.w fp, [sp, #24] │ │ - b.n 840c0 │ │ + b.n 84128 │ │ ldr r0, [sp, #28] │ │ ands r0, r4 │ │ lsls r0, r0, #31 │ │ - beq.w 83d22 │ │ + beq.w 83d8a │ │ ldr r4, [sp, #36] @ 0x24 │ │ ldr r5, [sp, #32] │ │ adds.w r8, r4, r1 │ │ adc.w fp, r5, r2 │ │ subs.w r0, r4, r8 │ │ sbcs.w r0, r5, fp │ │ - bcs.w 83d22 │ │ + bcs.w 83d8a │ │ ldr r0, [sp, #192] @ 0xc0 │ │ ldr r1, [sp, #104] @ 0x68 │ │ cmp r1, r0 │ │ - bne.n 840c0 │ │ + bne.n 84128 │ │ add r0, sp, #192 @ 0xc0 │ │ - bl 827d8 │ │ + bl 82840 │ │ ldr r0, [sp, #196] @ 0xc4 │ │ str r0, [sp, #96] @ 0x60 │ │ ldr r1, [sp, #104] @ 0x68 │ │ ldr r2, [sp, #96] @ 0x60 │ │ add.w r0, r1, r1, lsl #1 │ │ adds r1, #1 │ │ str r1, [sp, #104] @ 0x68 │ │ str.w r4, [r2, r0, lsl #3] │ │ add.w r0, r2, r0, lsl #3 │ │ adds r2, r0, #4 │ │ stmia.w r2, {r5, r8, fp} │ │ str.w r9, [r0, #16] │ │ str r1, [sp, #200] @ 0xc8 │ │ - b.n 84106 │ │ + b.n 8416e │ │ mov.w r0, r8, lsr #8 │ │ uxtb.w r2, r8 │ │ orr.w r0, r0, fp, lsl #24 │ │ cmp r2, #82 @ 0x52 │ │ - bne.w 843e8 │ │ + bne.w 84450 │ │ lsls r0, r0, #31 │ │ - beq.n 8413a │ │ + beq.n 841a2 │ │ str.w fp, [sp, #8] │ │ - b.n 84106 │ │ + b.n 8416e │ │ movs.w r0, sl, lsl #31 │ │ - beq.w 83d22 │ │ + beq.w 83d8a │ │ ldr r0, [sp, #180] @ 0xb4 │ │ movs r1, #2 │ │ str r1, [sp, #224] @ 0xe0 │ │ ldr r1, [sp, #156] @ 0x9c │ │ cmp r9, r0 │ │ str r1, [sp, #256] @ 0x100 │ │ - bne.n 8411a │ │ + bne.n 84182 │ │ add r0, sp, #180 @ 0xb4 │ │ - bl 88de2 │ │ + bl 89ff0 │ │ add.w r1, r9, r9, lsl #2 │ │ ldr r0, [sp, #184] @ 0xb8 │ │ add.w r9, r9, #1 │ │ add.w r0, r0, r1, lsl #3 │ │ add r1, sp, #224 @ 0xe0 │ │ ldmia r1!, {r2, r3, r4, r5, r6} │ │ stmia r0!, {r2, r3, r4, r5, r6} │ │ ldmia.w r1, {r2, r3, r4, r5, r6} │ │ stmia r0!, {r2, r3, r4, r5, r6} │ │ str.w r9, [sp, #188] @ 0xbc │ │ - b.n 83d22 │ │ + b.n 83d8a │ │ str.w fp, [sp, #8] │ │ - b.n 83d22 │ │ + b.n 83d8a │ │ strd r0, r3, [sp, #204] @ 0xcc │ │ movs r5, #6 │ │ - b.n 8415a │ │ + b.n 841c2 │ │ movs r0, #0 │ │ movs r5, #19 │ │ str r0, [sp, #164] @ 0xa4 │ │ str r0, [sp, #208] @ 0xd0 │ │ add.w r0, r8, lr │ │ str r0, [sp, #204] @ 0xcc │ │ str r0, [sp, #176] @ 0xb0 │ │ @@ -138814,103 +138727,103 @@ │ │ mov r8, fp │ │ ldr.w fp, [sp, #168] @ 0xa8 │ │ ldr r0, [sp, #192] @ 0xc0 │ │ mov sl, r5 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #196] @ 0xc4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r5, [sp, #184] @ 0xb8 │ │ cmp.w r9, #0 │ │ - beq.n 841a8 │ │ + beq.n 84210 │ │ add.w r6, r5, #8 │ │ - b.n 84184 │ │ + b.n 841ec │ │ adds r6, #40 @ 0x28 │ │ subs.w r9, r9, #1 │ │ - beq.n 841a8 │ │ + beq.n 84210 │ │ ldr.w r0, [r6, #-8] │ │ cmp r0, #0 │ │ - bne.n 8417c │ │ + bne.n 841e4 │ │ ldr r0, [r6, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r6, #-4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r6, #8] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #4] │ │ - blxne d87c0 │ │ - b.n 8417c │ │ + blxne d87d0 │ │ + b.n 841e4 │ │ ldr r0, [sp, #180] @ 0xb4 │ │ - cbz r0, 841b2 │ │ + cbz r0, 8421a │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r0, #1 │ │ ldr r4, [sp, #172] @ 0xac │ │ ldrd r2, r3, [sp, #160] @ 0xa0 │ │ - b.n 84264 │ │ + b.n 842cc │ │ ldr r1, [sp, #240] @ 0xf0 │ │ str r1, [sp, #176] @ 0xb0 │ │ ldrd r0, fp, [sp, #232] @ 0xe8 │ │ ldr r1, [sp, #244] @ 0xf4 │ │ str r1, [sp, #164] @ 0xa4 │ │ lsrs r1, r0, #16 │ │ str r1, [sp, #160] @ 0xa0 │ │ ubfx r8, r0, #8, #8 │ │ uxtb r5, r0 │ │ - b.n 84160 │ │ + b.n 841c8 │ │ movs r5, #18 │ │ str.w ip, [sp, #176] @ 0xb0 │ │ str.w sl, [sp, #164] @ 0xa4 │ │ - b.n 8415a │ │ + b.n 841c2 │ │ ldr r1, [sp, #104] @ 0x68 │ │ ldr r4, [sp, #172] @ 0xac │ │ cmp r1, #2 │ │ - bcs.w 8434a │ │ + bcs.w 843b2 │ │ ldr r5, [sp, #188] @ 0xbc │ │ ldrd r0, r6, [sp, #180] @ 0xb4 │ │ cmp r0, r5 │ │ - bls.n 8421c │ │ - cbz r5, 84214 │ │ + bls.n 84284 │ │ + cbz r5, 8427c │ │ add.w r0, r5, r5, lsl #2 │ │ mov.w r8, r0, lsl #3 │ │ mov r0, r6 │ │ mov r1, r8 │ │ - blx d8870 │ │ + blx d8880 │ │ mov r6, r0 │ │ - cbnz r0, 8421c │ │ + cbnz r0, 84284 │ │ movs r0, #8 │ │ mov r1, r8 │ │ - bl 3dfa4 │ │ - b.n 8440a │ │ + bl 3e2ac │ │ + b.n 84472 │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r6, #8 │ │ ldr r1, [sp, #200] @ 0xc8 │ │ ldrd r0, r9, [sp, #192] @ 0xc0 │ │ str r1, [sp, #176] @ 0xb0 │ │ cmp r0, r1 │ │ - bls.n 84248 │ │ - cbz r1, 8424c │ │ + bls.n 842b0 │ │ + cbz r1, 842b4 │ │ add.w r0, r1, r1, lsl #1 │ │ mov.w r8, r0, lsl #3 │ │ mov r0, r9 │ │ mov r1, r8 │ │ - blx d8870 │ │ + blx d8880 │ │ mov fp, r0 │ │ - cbnz r0, 84256 │ │ + cbnz r0, 842be │ │ movs r0, #8 │ │ mov r1, r8 │ │ - bl 3dfa4 │ │ - b.n 8440a │ │ + bl 3e2ac │ │ + b.n 84472 │ │ mov fp, r9 │ │ - b.n 84256 │ │ + b.n 842be │ │ mov r0, r9 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov.w fp, #8 │ │ ubfx r8, r5, #8, #8 │ │ lsrs r2, r5, #16 │ │ uxtb.w sl, r5 │ │ movs r3, #0 │ │ movs r0, #0 │ │ mov.w r1, r8, lsl #8 │ │ @@ -138930,200 +138843,200 @@ │ │ popeq {r4, r5, r6, r7, pc} │ │ strd r0, r6, [sp, #232] @ 0xe8 │ │ add r0, sp, #224 @ 0xe0 │ │ ldr r2, [sp, #176] @ 0xb0 │ │ strd r1, fp, [sp, #240] @ 0xf0 │ │ str r4, [sp, #224] @ 0xe0 │ │ strd r2, r3, [sp, #248] @ 0xf8 │ │ - bl 8a09c │ │ - ldr r0, [pc, #448] @ (84468 ) │ │ + bl 8a106 │ │ + ldr r0, [pc, #448] @ (844d0 ) │ │ movs r1, #29 │ │ - ldr r2, [pc, #448] @ (8446c ) │ │ + ldr r2, [pc, #448] @ (844d4 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ ldr r1, [sp, #232] @ 0xe8 │ │ str r1, [sp, #176] @ 0xb0 │ │ ldrd r0, fp, [sp, #224] @ 0xe0 │ │ ldr r1, [sp, #236] @ 0xec │ │ - b.n 841c6 │ │ + b.n 8422e │ │ movs r5, #56 @ 0x38 │ │ - b.n 842f0 │ │ + b.n 84358 │ │ ldr r0, [sp, #56] @ 0x38 │ │ movs r5, #19 │ │ - b.n 842da │ │ + b.n 84342 │ │ movs r0, #0 │ │ movs r5, #19 │ │ str r0, [sp, #164] @ 0xa4 │ │ ldr r0, [sp, #100] @ 0x64 │ │ - b.n 842e6 │ │ + b.n 8434e │ │ movs r5, #56 @ 0x38 │ │ - b.n 842e8 │ │ + b.n 84350 │ │ movs r5, #19 │ │ ldr r0, [sp, #116] @ 0x74 │ │ str r0, [sp, #176] @ 0xb0 │ │ - b.n 842f0 │ │ + b.n 84358 │ │ movs r0, #0 │ │ movs r5, #19 │ │ str r0, [sp, #164] @ 0xa4 │ │ ldr r0, [sp, #132] @ 0x84 │ │ str r0, [sp, #176] @ 0xb0 │ │ - b.n 84304 │ │ + b.n 8436c │ │ movs r5, #19 │ │ mov fp, r0 │ │ str r0, [sp, #176] @ 0xb0 │ │ mov.w r8, #0 │ │ movs r0, #0 │ │ str r0, [sp, #164] @ 0xa4 │ │ - b.n 84160 │ │ + b.n 841c8 │ │ movs r1, #0 │ │ movs r5, #19 │ │ str r1, [sp, #164] @ 0xa4 │ │ str r0, [sp, #176] @ 0xb0 │ │ str r0, [sp, #168] @ 0xa8 │ │ mov r8, sl │ │ - b.n 8415c │ │ + b.n 841c4 │ │ movs r0, #0 │ │ movs r5, #19 │ │ str r0, [sp, #52] @ 0x34 │ │ ldr r0, [sp, #100] @ 0x64 │ │ - b.n 8431e │ │ + b.n 84386 │ │ movs r5, #56 @ 0x38 │ │ - b.n 84320 │ │ + b.n 84388 │ │ movs r0, #0 │ │ movs r5, #19 │ │ str r0, [sp, #52] @ 0x34 │ │ ldr r0, [sp, #132] @ 0x84 │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n 8432c │ │ + b.n 84394 │ │ movs r1, #0 │ │ movs r5, #19 │ │ str r1, [sp, #52] @ 0x34 │ │ str r0, [sp, #48] @ 0x30 │ │ str r0, [sp, #168] @ 0xa8 │ │ mov r8, sl │ │ ldr r0, [sp, #48] @ 0x30 │ │ str r0, [sp, #176] @ 0xb0 │ │ ldr r0, [sp, #52] @ 0x34 │ │ str r0, [sp, #164] @ 0xa4 │ │ - b.n 8415c │ │ + b.n 841c4 │ │ movs r1, #0 │ │ str r0, [sp, #176] @ 0xb0 │ │ movs r0, #0 │ │ str r1, [sp, #164] @ 0xa4 │ │ movs r5, #19 │ │ mov.w r8, #0 │ │ str r0, [sp, #160] @ 0xa0 │ │ - b.n 84160 │ │ + b.n 841c8 │ │ ldr r0, [sp, #196] @ 0xc4 │ │ cmp r1, #21 │ │ - bcs.n 8440c │ │ + bcs.n 84474 │ │ add.w r1, r1, r1, lsl #1 │ │ add.w r2, r0, #24 │ │ movs r5, #0 │ │ mov r3, r0 │ │ add.w ip, r0, r1, lsl #3 │ │ str.w ip, [sp, #164] @ 0xa4 │ │ - b.n 84392 │ │ + b.n 843fa │ │ mov r2, r0 │ │ add r6, sp, #224 @ 0xe0 │ │ ldr r5, [sp, #236] @ 0xec │ │ add.w ip, r2, #8 │ │ str r5, [r2, #20] │ │ ldmia r6, {r1, r3, r6} │ │ ldrd r4, r5, [sp, #172] @ 0xac │ │ stmia.w ip, {r1, r3, r6} │ │ ldrd ip, r6, [sp, #164] @ 0xa4 │ │ strd fp, sl, [r2] │ │ add.w r2, r6, #24 │ │ adds r5, #24 │ │ mov r3, r6 │ │ cmp r2, ip │ │ - beq.w 841ea │ │ + beq.w 84252 │ │ mov r6, r2 │ │ ldrd r2, r1, [r3] │ │ ldrd fp, sl, [r3, #24] │ │ subs.w r2, fp, r2 │ │ sbcs.w r1, sl, r1 │ │ - bcs.n 84384 │ │ + bcs.n 843ec │ │ ldrd r8, r2, [r3, #32] │ │ ldrd r1, r3, [r3, #40] @ 0x28 │ │ strd r8, r2, [sp, #224] @ 0xe0 │ │ mov r2, r5 │ │ str r6, [sp, #168] @ 0xa8 │ │ strd r1, r3, [sp, #232] @ 0xe8 │ │ str r5, [sp, #176] @ 0xb0 │ │ adds r4, r0, r2 │ │ cmp r2, #0 │ │ add.w r8, r4, #24 │ │ mov r3, r4 │ │ ldmia.w r3, {r1, r5, r6, r9, ip, lr} │ │ stmia.w r8, {r1, r5, r6, r9, ip, lr} │ │ - beq.n 84366 │ │ + beq.n 843ce │ │ ldrd r1, r3, [r4, #-24] │ │ subs r2, #24 │ │ subs.w r1, fp, r1 │ │ sbcs.w r1, sl, r3 │ │ - bcc.n 843bc │ │ + bcc.n 84424 │ │ adds r1, r0, r2 │ │ add.w r2, r1, #24 │ │ - b.n 84368 │ │ + b.n 843d0 │ │ mov.w r1, r8, lsr #16 │ │ str r5, [sp, #176] @ 0xb0 │ │ orr.w r1, r1, fp, lsl #16 │ │ str r1, [sp, #160] @ 0xa0 │ │ uxtb.w r8, r0 │ │ str r6, [sp, #164] @ 0xa4 │ │ mov r5, r2 │ │ - b.n 84160 │ │ - ldr r3, [pc, #100] @ (84464 ) │ │ + b.n 841c8 │ │ + ldr r3, [pc, #100] @ (844cc ) │ │ add r3, pc │ │ movs r0, #0 │ │ movs r2, #5 │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ udf #254 @ 0xfe │ │ - bl 89f18 │ │ - b.n 841ea │ │ - b.n 84444 │ │ - b.n 84444 │ │ - b.n 84444 │ │ + bl 89f44 │ │ + b.n 84252 │ │ + b.n 844ac │ │ + b.n 844ac │ │ + b.n 844ac │ │ mov r8, r0 │ │ add r0, sp, #224 @ 0xe0 │ │ - bl 89fc4 │ │ - b.n 84446 │ │ + bl 8a02e │ │ + b.n 844ae │ │ mov r8, r0 │ │ mov r0, r9 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r6 │ │ mov r1, r5 │ │ - bl 8a04a │ │ + bl 8a0b4 │ │ mov r0, r8 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ mov r8, r0 │ │ add r0, sp, #180 @ 0xb4 │ │ - bl 89ff2 │ │ + bl 8a05c │ │ movs r4, #0 │ │ - b.n 84448 │ │ + b.n 844b0 │ │ mov r8, r0 │ │ movs r4, #1 │ │ ldr r0, [sp, #192] @ 0xc0 │ │ - cbz r0, 84452 │ │ + cbz r0, 844ba │ │ ldr r0, [sp, #196] @ 0xc4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ cmp r4, #0 │ │ - beq.n 84432 │ │ + beq.n 8449a │ │ add r0, sp, #180 @ 0xb4 │ │ - bl 89ff2 │ │ + bl 8a05c │ │ mov r0, r8 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ nop │ │ - str r4, [r2, #48] @ 0x30 │ │ + str r4, [r7, #40] @ 0x28 │ │ movs r5, r0 │ │ - ldr r4, [pc, #632] @ (846e4 ) │ │ - vtbl.8 d23, {d25-d27}, d0 │ │ + ldr r4, [pc, #216] @ (845ac ) │ │ + vtbl.8 d23, {d9-d11}, d24 │ │ movs r5, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #188 @ 0xbc │ │ mov r9, r0 │ │ ldr r0, [r1, #0] │ │ @@ -139143,21 +139056,21 @@ │ │ moveq r3, #12 │ │ add.w r2, r3, fp │ │ subs r4, r2, r6 │ │ cmp sl, r4 │ │ itt cs │ │ subcs.w r4, sl, r4 │ │ cmpcs r6, r4 │ │ - bhi.n 844cc │ │ + bhi.n 84534 │ │ mov.w fp, #0 │ │ mov.w sl, #0 │ │ ldr r5, [sp, #60] @ 0x3c │ │ movs r1, #59 @ 0x3b │ │ movs r4, #0 │ │ - b.n 848b2 │ │ + b.n 8491a │ │ ldr.w ip, [r1, #4] │ │ mov.w r8, #0 │ │ ldr r1, [r1, #12] │ │ str r0, [sp, #44] @ 0x2c │ │ ldr.w r0, [lr] │ │ str r0, [sp, #56] @ 0x38 │ │ ldr r0, [r1, #0] │ │ @@ -139186,74 +139099,74 @@ │ │ rsb r0, sl, #0 │ │ str.w r8, [sp, #80] @ 0x50 │ │ str r5, [sp, #40] @ 0x28 │ │ str r0, [sp, #48] @ 0x30 │ │ add.w lr, r3, sl │ │ cmp r6, #63 @ 0x3f │ │ ldrb.w fp, [lr], #1 │ │ - bne.n 84538 │ │ + bne.n 845a0 │ │ cmp.w fp, #1 │ │ - bhi.n 84588 │ │ + bhi.n 845f0 │ │ and.w r5, r6, #63 @ 0x3f │ │ and.w r4, fp, #127 @ 0x7f │ │ rsb ip, r5, #32 │ │ subs.w r1, r5, #32 │ │ lsr.w r0, r4, ip │ │ it pl │ │ lslpl.w r0, r4, r1 │ │ orr.w r9, r9, r0 │ │ lsl.w r0, r4, r5 │ │ it pl │ │ movpl r0, #0 │ │ orr.w r8, r8, r0 │ │ sxtb.w r0, fp │ │ cmp r0, #0 │ │ - bpl.n 84594 │ │ + bpl.n 845fc │ │ subs r2, #1 │ │ adds r3, #1 │ │ adds r6, #7 │ │ cmp sl, r2 │ │ - bne.n 84526 │ │ + bne.n 8458e │ │ ldr r5, [sp, #60] @ 0x3c │ │ mov.w ip, #1 │ │ ldr.w r9, [sp, #52] @ 0x34 │ │ mov.w sl, #0 │ │ movs r1, #19 │ │ mov r8, r5 │ │ - b.n 848b2 │ │ + b.n 8491a │ │ mov.w ip, #1 │ │ mov.w sl, #0 │ │ movs r1, #6 │ │ - b.n 84802 │ │ + b.n 8486a │ │ ldr r0, [sp, #48] @ 0x30 │ │ add r0, r2 │ │ subs r0, #1 │ │ strd lr, r0, [sp, #64] @ 0x40 │ │ orrs.w r0, r8, r9 │ │ - beq.w 84934 │ │ + beq.w 8499c │ │ ldr r2, [sp, #28] │ │ cmp.w r9, #0 │ │ - bne.n 845c2 │ │ + bne.n 8462a │ │ ldr r1, [r2, #16] │ │ sub.w r0, r8, #1 │ │ cmp r0, r1 │ │ - bcs.n 845c2 │ │ + bcs.n 8462a │ │ movs r1, #104 @ 0x68 │ │ ldr r2, [r2, #12] │ │ mla r0, r0, r1, r2 │ │ - b.n 84632 │ │ + b.n 8469a │ │ ldr r6, [r2, #20] │ │ cmp r6, #0 │ │ - beq.w 847fa │ │ + beq.w 84862 │ │ ldr.w ip, [r2, #24] │ │ ldrh.w lr, [r6, #1238] @ 0x4d6 │ │ mov.w r3, #4294967295 @ 0xffffffff │ │ mov r2, r6 │ │ mov.w r0, lr, lsl #3 │ │ - cbz r0, 84612 │ │ + cbz r0, 8467a │ │ ldrd r1, r4, [r2], #8 │ │ subs r0, #8 │ │ adds r3, #1 │ │ subs.w r5, r8, r1 │ │ sbcs.w r5, r9, r4 │ │ mov.w r5, #0 │ │ it cc │ │ @@ -139261,157 +139174,157 @@ │ │ subs.w r1, r1, r8 │ │ sbcs.w r1, r4, r9 │ │ mov.w r1, #0 │ │ it cc │ │ movcc r1, #1 │ │ subs r4, r1, r5 │ │ cmp r4, #1 │ │ - beq.n 845dc │ │ + beq.n 84644 │ │ uxtb r0, r4 │ │ - cbz r0, 8462a │ │ - b.n 84614 │ │ + cbz r0, 84692 │ │ + b.n 8467c │ │ mov r3, lr │ │ cmp.w ip, #0 │ │ - beq.w 847fa │ │ + beq.w 84862 │ │ add.w r0, r6, r3, lsl #2 │ │ sub.w ip, ip, #1 │ │ ldr.w r6, [r0, #1240] @ 0x4d8 │ │ - b.n 845ce │ │ + b.n 84636 │ │ movs r0, #104 @ 0x68 │ │ mla r0, r3, r0, r6 │ │ adds r0, #88 @ 0x58 │ │ ldrb.w r1, [r0, #98] @ 0x62 │ │ ldr.w r9, [sp, #52] @ 0x34 │ │ cmp r1, #1 │ │ ldr r2, [sp, #40] @ 0x28 │ │ itt eq │ │ moveq r1, #1 │ │ streq r1, [sp, #80] @ 0x50 │ │ ldr r1, [r0, #0] │ │ cmp r1, #1 │ │ - bne.w 84766 │ │ + bne.w 847ce │ │ ldrd fp, r1, [r0, #8] │ │ cmp r1, #0 │ │ - beq.w 84778 │ │ + beq.w 847e0 │ │ ldr.w r0, [r2, #260] @ 0x104 │ │ add.w r8, sp, #168 @ 0xa8 │ │ str r0, [sp, #28] │ │ movs r0, #0 │ │ lsls r6, r1, #4 │ │ str r0, [sp, #60] @ 0x3c │ │ - b.n 8467a │ │ + b.n 846e2 │ │ ldr r0, [sp, #92] @ 0x5c │ │ str r0, [sp, #60] @ 0x3c │ │ ldr r0, [sp, #96] @ 0x60 │ │ str r0, [sp, #48] @ 0x30 │ │ add.w fp, fp, #16 │ │ subs r6, #16 │ │ - beq.w 8477c │ │ + beq.w 847e4 │ │ ldr r0, [sp, #72] @ 0x48 │ │ ldmia.w fp, {r1, r3, r4, r5} │ │ ldr r2, [r0, #32] │ │ add r0, sp, #168 @ 0xa8 │ │ stmia r0!, {r1, r3, r4, r5} │ │ add r0, sp, #104 @ 0x68 │ │ add r1, sp, #64 @ 0x40 │ │ mov r3, r8 │ │ - bl 84988 │ │ + bl 849f0 │ │ ldrd r0, r1, [sp, #104] @ 0x68 │ │ eor.w r0, r0, #46 @ 0x2e │ │ orrs r0, r1 │ │ - beq.w 84838 │ │ + beq.w 848a0 │ │ ldrh.w r0, [sp, #120] @ 0x78 │ │ cmp r0, #70 @ 0x46 │ │ - ble.n 846e8 │ │ + ble.n 84750 │ │ cmp r0, #71 @ 0x47 │ │ - beq.n 846f0 │ │ + beq.n 84758 │ │ movw r1, #8199 @ 0x2007 │ │ cmp r0, r1 │ │ it ne │ │ cmpne r0, #110 @ 0x6e │ │ - bne.n 84670 │ │ + bne.n 846d8 │ │ add r1, sp, #104 @ 0x68 │ │ mov r0, r8 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldr r1, [sp, #56] @ 0x38 │ │ add r0, sp, #88 @ 0x58 │ │ ldr r2, [sp, #44] @ 0x2c │ │ ldr r3, [sp, #28] │ │ str.w r8, [sp] │ │ - bl 82b38 │ │ + bl 82ba0 │ │ ldrb.w r0, [sp, #88] @ 0x58 │ │ ldrd r2, r1, [sp, #92] @ 0x5c │ │ cmp r0, #82 @ 0x52 │ │ ldr r0, [sp, #60] @ 0x3c │ │ it eq │ │ moveq r0, r2 │ │ str r0, [sp, #60] @ 0x3c │ │ ldr r0, [sp, #48] @ 0x30 │ │ it eq │ │ moveq r0, r1 │ │ - b.n 8466e │ │ + b.n 846d6 │ │ cmp r0, #3 │ │ - beq.n 8472a │ │ + beq.n 84792 │ │ cmp r0, #49 @ 0x31 │ │ - bne.n 84670 │ │ + bne.n 846d8 │ │ ldr r0, [sp, #60] @ 0x3c │ │ cmp r0, #0 │ │ - bne.n 84670 │ │ + bne.n 846d8 │ │ add r1, sp, #104 @ 0x68 │ │ mov r0, r8 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldr r0, [sp, #176] @ 0xb0 │ │ str r0, [sp, #0] │ │ ldr r0, [sp, #32] │ │ str r0, [sp, #4] │ │ ldr r0, [sp, #56] @ 0x38 │ │ str r0, [sp, #8] │ │ ldr r0, [sp, #40] @ 0x28 │ │ str r0, [sp, #12] │ │ ldr r0, [sp, #36] @ 0x24 │ │ str r0, [sp, #16] │ │ movs r0, #16 │ │ ldrd r2, r3, [sp, #168] @ 0xa8 │ │ str r0, [sp, #20] │ │ add r0, sp, #88 @ 0x58 │ │ - bl 87016 │ │ + bl 8707e │ │ ldrb.w r1, [sp, #88] @ 0x58 │ │ cmp r1, #82 @ 0x52 │ │ - beq.n 84668 │ │ - b.n 84906 │ │ + beq.n 846d0 │ │ + b.n 8496e │ │ ldr r0, [sp, #60] @ 0x3c │ │ cmp r0, #0 │ │ - bne.n 84670 │ │ + bne.n 846d8 │ │ add r1, sp, #104 @ 0x68 │ │ mov r0, r8 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldr r1, [sp, #56] @ 0x38 │ │ add r0, sp, #88 @ 0x58 │ │ ldr r2, [sp, #44] @ 0x2c │ │ ldr r3, [sp, #28] │ │ str.w r8, [sp] │ │ - bl 82b38 │ │ + bl 82ba0 │ │ ldrb.w r0, [sp, #88] @ 0x58 │ │ ldrd r2, r1, [sp, #92] @ 0x5c │ │ cmp r0, #82 @ 0x52 │ │ mov.w r0, #0 │ │ it ne │ │ movne r2, r0 │ │ ldr r0, [sp, #24] │ │ str r2, [sp, #60] @ 0x3c │ │ it eq │ │ moveq r0, r1 │ │ str r0, [sp, #24] │ │ - b.n 8466e │ │ + b.n 846d6 │ │ ldr r1, [r0, #4] │ │ cmp r1, #6 │ │ - bcs.w 84918 │ │ + bcs.w 84980 │ │ add.w fp, r0, #8 │ │ cmp r1, #0 │ │ - bne.w 84656 │ │ + bne.w 846be │ │ movs r0, #0 │ │ str r0, [sp, #60] @ 0x3c │ │ add r2, sp, #64 @ 0x40 │ │ add r1, sp, #104 @ 0x68 │ │ add.w ip, r1, #24 │ │ ldmia.w r2, {r0, r3, r4, r5, r6} │ │ movs r2, #0 │ │ @@ -139427,101 +139340,101 @@ │ │ str r0, [sp, #152] @ 0x98 │ │ ldr r0, [sp, #56] @ 0x38 │ │ str r2, [sp, #124] @ 0x7c │ │ strd r2, r2, [sp, #112] @ 0x70 │ │ str r0, [sp, #148] @ 0x94 │ │ add r0, sp, #168 @ 0xa8 │ │ movs r3, #0 │ │ - bl 85bc4 │ │ + bl 85c2c │ │ ldrb.w r0, [sp, #168] @ 0xa8 │ │ cmp r0, #82 @ 0x52 │ │ - bne.n 8480a │ │ + bne.n 84872 │ │ ldr r1, [sp, #124] @ 0x7c │ │ cmp r1, #2 │ │ - bcs.w 84924 │ │ + bcs.w 8498c │ │ ldrd r0, r6, [sp, #104] @ 0x68 │ │ ldr r5, [sp, #112] @ 0x70 │ │ cmp r0, r5 │ │ - bls.n 8484e │ │ + bls.n 848b6 │ │ cmp r5, #0 │ │ - beq.n 84852 │ │ + beq.n 848ba │ │ add.w r0, r0, r0, lsl #2 │ │ movs r2, #8 │ │ lsls r1, r0, #3 │ │ add.w r0, r5, r5, lsl #2 │ │ mov.w r8, r0, lsl #3 │ │ mov r0, r6 │ │ mov r3, r8 │ │ - bl 4194c │ │ + bl 41c54 │ │ str r0, [sp, #56] @ 0x38 │ │ - cbnz r0, 8485c │ │ + cbnz r0, 848c4 │ │ movs r0, #8 │ │ mov r1, r8 │ │ - bl 3dfa4 │ │ - b.n 84890 │ │ + bl 3e2ac │ │ + b.n 848f8 │ │ mov.w ip, #1 │ │ movs r1, #18 │ │ mov sl, r9 │ │ ldr.w r9, [sp, #52] @ 0x34 │ │ ldr r5, [sp, #60] @ 0x3c │ │ - b.n 848b2 │ │ + b.n 8491a │ │ ldrd r6, r5, [sp, #168] @ 0xa8 │ │ ldr r0, [sp, #104] @ 0x68 │ │ ldrd r8, sl, [sp, #176] @ 0xb0 │ │ cmp r0, #0 │ │ mov.w r4, r6, lsr #16 │ │ itt ne │ │ ldrne r0, [sp, #108] @ 0x6c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #116] @ 0x74 │ │ ubfx fp, r6, #8, #8 │ │ uxtb r1, r6 │ │ - cbz r0, 84848 │ │ + cbz r0, 848b0 │ │ ldr r0, [sp, #120] @ 0x78 │ │ mov r6, r1 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r1, r6 │ │ - b.n 84848 │ │ + b.n 848b0 │ │ add.w sl, sp, #112 @ 0x70 │ │ ldmia.w sl, {r0, r5, r8, sl} │ │ lsrs r4, r0, #16 │ │ ubfx fp, r0, #8, #8 │ │ uxtb r1, r0 │ │ mov.w ip, #1 │ │ - b.n 848b2 │ │ + b.n 8491a │ │ str r6, [sp, #56] @ 0x38 │ │ - b.n 8485c │ │ + b.n 848c4 │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r0, #8 │ │ str r0, [sp, #56] @ 0x38 │ │ ldrd r0, fp, [sp, #116] @ 0x74 │ │ ldr.w r8, [sp, #124] @ 0x7c │ │ cmp r0, r8 │ │ - bls.n 84892 │ │ + bls.n 848fa │ │ cmp.w r8, #0 │ │ - beq.n 84896 │ │ + beq.n 848fe │ │ add.w r0, r0, r0, lsl #1 │ │ movs r2, #8 │ │ lsls r1, r0, #3 │ │ add.w r0, r8, r8, lsl #1 │ │ lsls r4, r0, #3 │ │ mov r0, fp │ │ mov r3, r4 │ │ - bl 4194c │ │ + bl 41c54 │ │ mov r2, r0 │ │ - cbnz r0, 8489e │ │ + cbnz r0, 84906 │ │ movs r0, #8 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ udf #254 @ 0xfe │ │ mov r2, fp │ │ - b.n 8489e │ │ + b.n 84906 │ │ mov r0, fp │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r2, #8 │ │ lsrs r4, r5, #16 │ │ ubfx fp, r5, #8, #8 │ │ uxtb r1, r5 │ │ mov r5, r2 │ │ mov.w ip, #0 │ │ ldr r3, [sp, #48] @ 0x30 │ │ @@ -139543,70 +139456,70 @@ │ │ popeq {r4, r5, r6, r7, pc} │ │ add r1, sp, #120 @ 0x78 │ │ strd r2, r3, [sp, #136] @ 0x88 │ │ stmia.w r1, {r0, r5, r8, sl} │ │ add r0, sp, #104 @ 0x68 │ │ strd ip, r6, [sp, #112] @ 0x70 │ │ str.w r9, [sp, #104] @ 0x68 │ │ - bl 873aa │ │ - ldr r0, [pc, #132] @ (84980 ) │ │ + bl 87412 │ │ + ldr r0, [pc, #132] @ (849e8 ) │ │ movs r1, #29 │ │ - ldr r2, [pc, #132] @ (84984 ) │ │ + ldr r2, [pc, #132] @ (849ec ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ add.w sl, sp, #92 @ 0x5c │ │ ldrh.w r4, [sp, #90] @ 0x5a │ │ ldrb.w fp, [sp, #89] @ 0x59 │ │ ldmia.w sl, {r5, r8, sl} │ │ - b.n 84848 │ │ - ldr r3, [pc, #96] @ (8497c ) │ │ + b.n 848b0 │ │ + ldr r3, [pc, #96] @ (849e4 ) │ │ movs r0, #0 │ │ movs r2, #5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ ldr r0, [sp, #120] @ 0x78 │ │ cmp r1, #21 │ │ - bcs.n 8493c │ │ - bl 872d4 │ │ + bcs.n 849a4 │ │ + bl 8733c │ │ ldr.w r9, [sp, #52] @ 0x34 │ │ - b.n 847c6 │ │ - ldr r0, [pc, #64] @ (84978 ) │ │ + b.n 8482e │ │ + ldr r0, [pc, #64] @ (849e0 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - bl 87228 │ │ + bl 3fd40 │ │ + bl 87290 │ │ ldr.w r9, [sp, #52] @ 0x34 │ │ - b.n 847c6 │ │ + b.n 8482e │ │ mov r8, r0 │ │ mov r0, fp │ │ - blx d87c0 │ │ - cbnz r5, 8496c │ │ - b.n 84972 │ │ + blx d87d0 │ │ + cbnz r5, 849d4 │ │ + b.n 849da │ │ mov r8, r0 │ │ - b.n 8495e │ │ + b.n 849c6 │ │ mov r8, r0 │ │ ldr r0, [sp, #104] @ 0x68 │ │ - cbz r0, 84964 │ │ + cbz r0, 849cc │ │ ldr r6, [sp, #108] @ 0x6c │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #116] @ 0x74 │ │ - cbz r0, 84972 │ │ + cbz r0, 849da │ │ ldr r0, [sp, #120] @ 0x78 │ │ str r0, [sp, #56] @ 0x38 │ │ ldr r0, [sp, #56] @ 0x38 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r8 │ │ - blx d6dd0 │ │ - strb r2, [r0, #25] │ │ + blx d6de0 │ │ + strb r2, [r5, #23] │ │ movs r5, r0 │ │ - ldrb r6, [r6, r7] │ │ + ldrb r6, [r3, r6] │ │ movs r5, r0 │ │ - mov r2, r9 │ │ - vcgt.f32 d23, d28, #0 │ │ + cmp sl, ip │ │ + vrsra.u64 , q2, #7 │ │ movs r5, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #36 @ 0x24 │ │ ldrh.w r9, [r3, #10] │ │ mov r8, r0 │ │ @@ -139619,15 +139532,15 @@ │ │ str r1, [sp, #12] │ │ str r3, [sp, #8] │ │ str r0, [sp, #4] │ │ uxtah r3, fp, r5 │ │ add.w ip, r4, #1 │ │ mov lr, sl │ │ cmp r3, #43 @ 0x2b │ │ - bhi.w 84a96 │ │ + bhi.w 84afe │ │ tbh [pc, r3, lsl #1] │ │ lsls r7, r7, #12 │ │ lsls r0, r0, #26 │ │ lsls r5, r5, #11 │ │ lsls r0, r1, #17 │ │ lsls r2, r5, #9 │ │ lsls r4, r6, #14 │ │ @@ -139667,57 +139580,57 @@ │ │ lsls r5, r3, #24 │ │ lsls r6, r2, #14 │ │ lsls r4, r3, #11 │ │ lsls r6, r1, #24 │ │ lsls r5, r4, #6 │ │ mov r6, r5 │ │ cmp.w lr, #0 │ │ - beq.w 84c12 │ │ + beq.w 84c7a │ │ ldrb r0, [r4, #0] │ │ sub.w sl, lr, #1 │ │ ldr r1, [sp, #12] │ │ mov r3, r4 │ │ and.w r5, r0, #127 @ 0x7f │ │ mov r4, ip │ │ sxtb r0, r0 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ strd ip, sl, [r1] │ │ - bgt.n 849ae │ │ + bgt.n 84a16 │ │ cmp.w sl, #0 │ │ - beq.w 8587c │ │ + beq.w 858e4 │ │ ldr r1, [sp, #12] │ │ sub.w sl, lr, #2 │ │ add.w r4, ip, #1 │ │ str.w sl, [r1, #4] │ │ ldrb r0, [r3, #1] │ │ str r4, [r1, #0] │ │ mov r1, r8 │ │ and.w r8, r0, #127 @ 0x7f │ │ sxtb r0, r0 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ orr.w r5, r5, r8, lsl #7 │ │ mov r8, r1 │ │ - bgt.w 849ae │ │ + bgt.w 84a16 │ │ cmp.w sl, #0 │ │ - beq.w 84c12 │ │ + beq.w 84c7a │ │ ldr r1, [sp, #12] │ │ sub.w sl, lr, #3 │ │ add.w r4, ip, #2 │ │ str.w sl, [r1, #4] │ │ ldrb r0, [r3, #2] │ │ str r4, [r1, #0] │ │ cmp r0, #3 │ │ - bhi.w 85a76 │ │ + bhi.w 85ade │ │ orr.w r5, r5, r0, lsl #14 │ │ - b.n 849ae │ │ + b.n 84a16 │ │ uxth r2, r5 │ │ movw r3, #7937 @ 0x1f01 │ │ subs r2, r2, r3 │ │ cmp r2, #32 │ │ - bhi.w 856c2 │ │ + bhi.w 8572a │ │ tbh [pc, r2, lsl #1] │ │ movs r1, r4 │ │ lsls r1, r7, #1 │ │ lsls r5, r1, #24 │ │ lsls r5, r1, #24 │ │ lsls r5, r1, #24 │ │ lsls r5, r1, #24 │ │ @@ -139745,83 +139658,83 @@ │ │ lsls r5, r1, #24 │ │ lsls r5, r1, #24 │ │ lsls r5, r1, #24 │ │ lsls r5, r1, #24 │ │ lsls r0, r7, #2 │ │ lsls r1, r3, #1 │ │ cmp.w lr, #0 │ │ - beq.w 856b0 │ │ + beq.w 85718 │ │ ldr.w fp, [sp, #12] │ │ add r4, lr │ │ sub.w r6, lr, #1 │ │ mov r9, r8 │ │ mov.w sl, #0 │ │ movs r3, #0 │ │ movs r5, #0 │ │ ldrb.w lr, [ip, #-1] │ │ cmp r5, #63 @ 0x3f │ │ - bne.n 84b16 │ │ + bne.n 84b7e │ │ cmp.w lr, #1 │ │ - bhi.w 856ba │ │ + bhi.w 85722 │ │ and.w r1, r5, #63 @ 0x3f │ │ and.w r0, lr, #127 @ 0x7f │ │ rsb r2, r1, #32 │ │ subs.w r8, r1, #32 │ │ lsr.w r2, r0, r2 │ │ it pl │ │ lslpl.w r2, r0, r8 │ │ lsl.w r0, r0, r1 │ │ it pl │ │ movpl r0, #0 │ │ orr.w sl, sl, r0 │ │ orrs r3, r2 │ │ sxtb.w r0, lr │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.w 8582c │ │ + bgt.w 85894 │ │ subs r6, #1 │ │ add.w ip, ip, #1 │ │ adds r5, #7 │ │ adds r0, r6, #1 │ │ - bne.n 84b06 │ │ - b.w 856a6 │ │ + bne.n 84b6e │ │ + b.w 8570e │ │ ldr r0, [sp, #4] │ │ uxtb r0, r0 │ │ cmp r0, #8 │ │ - bne.n 84c5c │ │ + bne.n 84cc4 │ │ ldr r6, [sp, #12] │ │ cmp.w lr, #8 │ │ - bcc.w 857da │ │ + bcc.w 85842 │ │ ldrb r0, [r4, #7] │ │ sub.w r1, lr, #8 │ │ ldr.w r2, [r4, #3] │ │ add.w r3, r4, #8 │ │ strd r3, r1, [r6] │ │ lsls r0, r0, #24 │ │ orrs.w r0, r0, r2, lsr #8 │ │ - bne.w 855c6 │ │ + bne.w 8562e │ │ ldrb r1, [r4, #2] │ │ lsls r0, r2, #24 │ │ ldrh r2, [r4, #0] │ │ mov r9, r8 │ │ orr.w r1, r2, r1, lsl #16 │ │ orr.w sl, r0, r1 │ │ - b.n 84c74 │ │ + b.n 84cdc │ │ cmp.w lr, #0 │ │ - beq.w 856b0 │ │ + beq.w 85718 │ │ ldr.w fp, [sp, #12] │ │ add r4, lr │ │ sub.w r6, lr, #1 │ │ mov.w sl, #0 │ │ movs r3, #0 │ │ movs r5, #0 │ │ ldrb.w lr, [ip, #-1] │ │ cmp r5, #63 @ 0x3f │ │ - bne.n 84bc4 │ │ + bne.n 84c2c │ │ cmp.w lr, #1 │ │ - bhi.w 85818 │ │ + bhi.w 85880 │ │ and.w r1, r5, #63 @ 0x3f │ │ and.w r0, lr, #127 @ 0x7f │ │ rsb r2, r1, #32 │ │ mov r9, r8 │ │ subs.w r8, r1, #32 │ │ lsr.w r2, r0, r2 │ │ it pl │ │ @@ -139829,73 +139742,73 @@ │ │ lsl.w r0, r0, r1 │ │ it pl │ │ movpl r0, #0 │ │ orr.w sl, sl, r0 │ │ orrs r3, r2 │ │ sxtb.w r0, lr │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.w 85844 │ │ + bgt.w 858ac │ │ subs r6, #1 │ │ add.w ip, ip, #1 │ │ adds r5, #7 │ │ mov r8, r9 │ │ adds r0, r6, #1 │ │ - bne.n 84bb4 │ │ + bne.n 84c1c │ │ movs r0, #0 │ │ strd r4, r0, [fp] │ │ - b.w 856b4 │ │ + b.w 8571c │ │ movs r1, #19 │ │ - b.w 85a78 │ │ + b.w 85ae0 │ │ ldr r0, [sp, #4] │ │ uxtb r0, r0 │ │ cmp r0, #8 │ │ - bne.w 856f2 │ │ + bne.w 8575a │ │ ldr r6, [sp, #12] │ │ cmp.w lr, #8 │ │ - bcc.w 857da │ │ + bcc.w 85842 │ │ ldrb r0, [r4, #7] │ │ sub.w r1, lr, #8 │ │ ldr.w r2, [r4, #3] │ │ add.w r3, r4, #8 │ │ strd r3, r1, [r6] │ │ lsls r0, r0, #24 │ │ orrs.w r0, r0, r2, lsr #8 │ │ - bne.w 855c6 │ │ + bne.w 8562e │ │ ldrb r1, [r4, #2] │ │ lsls r0, r2, #24 │ │ ldrh r2, [r4, #0] │ │ mov r9, r8 │ │ orr.w r1, r2, r1, lsl #16 │ │ orr.w sl, r0, r1 │ │ - b.w 85708 │ │ + b.w 85770 │ │ ldr r1, [sp, #12] │ │ cmp.w lr, #4 │ │ - bcc.w 857da │ │ + bcc.w 85842 │ │ ldr.w sl, [r4], #4 │ │ sub.w r0, lr, #4 │ │ mov r9, r8 │ │ strd r4, r0, [r1] │ │ mov.w r3, sl, lsr #16 │ │ mov.w r0, sl, lsr #8 │ │ movs r1, #0 │ │ movs r5, #27 │ │ - b.w 854d4 │ │ + b.w 8553c │ │ cmp.w lr, #3 │ │ - bcc.w 8561c │ │ + bcc.w 85684 │ │ ldrb r3, [r4, #2] │ │ sub.w r1, lr, #3 │ │ ldr r6, [sp, #12] │ │ mov r9, r8 │ │ ldrh r0, [r4, #0] │ │ adds r2, r4, #3 │ │ strd r2, r1, [r6] │ │ orr.w sl, r0, r3, lsl #16 │ │ - b.w 85852 │ │ + b.w 858ba │ │ cmp.w lr, #8 │ │ - bcc.w 8561c │ │ + bcc.w 85684 │ │ ldr r5, [sp, #12] │ │ sub.w r2, lr, #8 │ │ ldrb r1, [r4, #7] │ │ mov r9, r8 │ │ ldr.w r0, [r4, #3] │ │ add.w r6, r4, #8 │ │ str r2, [r5, #4] │ │ @@ -139908,176 +139821,176 @@ │ │ orr.w sl, r3, r2, lsl #16 │ │ orr.w r1, sl, r0, lsl #24 │ │ lsrs r0, r0, #8 │ │ lsrs r2, r1, #16 │ │ lsrs r1, r1, #8 │ │ orr.w r3, r2, r0, lsl #16 │ │ orr.w r0, r1, r0, lsl #24 │ │ - b.w 854d2 │ │ + b.w 8553a │ │ cmp.w lr, #4 │ │ - bcc.w 8561c │ │ + bcc.w 85684 │ │ ldr.w sl, [r4], #4 │ │ sub.w r0, lr, #4 │ │ ldr r1, [sp, #12] │ │ mov r9, r8 │ │ strd r4, r0, [r1] │ │ mov.w r3, sl, lsr #16 │ │ mov.w r0, sl, lsr #8 │ │ - b.n 84d62 │ │ + b.n 84dca │ │ cmp.w lr, #4 │ │ - bcc.w 8561c │ │ + bcc.w 85684 │ │ ldr r1, [sp, #12] │ │ sub.w r0, lr, #4 │ │ ldr.w sl, [r4], #4 │ │ mov r9, r8 │ │ strd r4, r0, [r1] │ │ - b.w 85836 │ │ + b.w 8589e │ │ cmp.w lr, #8 │ │ - bcc.w 857da │ │ + bcc.w 85842 │ │ ldrb r0, [r4, #7] │ │ sub.w r1, lr, #8 │ │ ldr.w r2, [r4, #3] │ │ add.w r3, r4, #8 │ │ ldr r6, [sp, #12] │ │ lsls r0, r0, #24 │ │ orrs.w r0, r0, r2, lsr #8 │ │ strd r3, r1, [r6] │ │ - bne.w 855c6 │ │ + bne.w 8562e │ │ ldrb r1, [r4, #2] │ │ lsls r0, r2, #24 │ │ ldrh r2, [r4, #0] │ │ mov r9, r8 │ │ orr.w sl, r2, r1, lsl #16 │ │ orr.w r0, r0, sl │ │ lsrs r3, r0, #16 │ │ lsrs r0, r0, #8 │ │ movs r1, #0 │ │ movs r5, #13 │ │ - b.w 854d4 │ │ + b.w 8553c │ │ cmp.w lr, #0 │ │ - beq.w 856b0 │ │ + beq.w 85718 │ │ ldr.w fp, [sp, #12] │ │ add r4, lr │ │ sub.w r6, lr, #1 │ │ mov r9, r8 │ │ mov.w sl, #0 │ │ movs r3, #0 │ │ movs r5, #0 │ │ ldrb.w lr, [ip, #-1] │ │ cmp r5, #63 @ 0x3f │ │ - bne.n 84d96 │ │ + bne.n 84dfe │ │ cmp.w lr, #1 │ │ - bhi.w 856ba │ │ + bhi.w 85722 │ │ and.w r1, r5, #63 @ 0x3f │ │ and.w r0, lr, #127 @ 0x7f │ │ rsb r2, r1, #32 │ │ subs.w r8, r1, #32 │ │ lsr.w r2, r0, r2 │ │ it pl │ │ lslpl.w r2, r0, r8 │ │ lsl.w r0, r0, r1 │ │ it pl │ │ movpl r0, #0 │ │ orr.w sl, sl, r0 │ │ orrs r3, r2 │ │ sxtb.w r0, lr │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.w 85952 │ │ + bgt.w 859ba │ │ subs r6, #1 │ │ add.w ip, ip, #1 │ │ adds r5, #7 │ │ adds r0, r6, #1 │ │ - bne.n 84d86 │ │ - b.w 856a6 │ │ + bne.n 84dee │ │ + b.w 8570e │ │ ldr r0, [sp, #4] │ │ uxtb r0, r0 │ │ cmp r0, #8 │ │ - bne.w 85716 │ │ + bne.w 8577e │ │ ldr r6, [sp, #12] │ │ cmp.w lr, #8 │ │ - bcc.w 857da │ │ + bcc.w 85842 │ │ ldrb r0, [r4, #7] │ │ sub.w r1, lr, #8 │ │ ldr.w r2, [r4, #3] │ │ add.w r3, r4, #8 │ │ strd r3, r1, [r6] │ │ lsls r0, r0, #24 │ │ orrs.w r0, r0, r2, lsr #8 │ │ - bne.w 855c6 │ │ + bne.w 8562e │ │ ldrb r1, [r4, #2] │ │ lsls r0, r2, #24 │ │ ldrh r2, [r4, #0] │ │ mov r9, r8 │ │ orr.w r1, r2, r1, lsl #16 │ │ orr.w sl, r0, r1 │ │ - b.w 8572c │ │ + b.w 85794 │ │ cmp.w lr, #2 │ │ - bcc.w 8561c │ │ + bcc.w 85684 │ │ ldrh.w sl, [r4], #2 │ │ sub.w r0, lr, #2 │ │ ldr r1, [sp, #12] │ │ mov r9, r8 │ │ movs r3, #0 │ │ movs r5, #13 │ │ strd r4, r0, [r1] │ │ mov.w r0, sl, lsr #8 │ │ - b.w 854d2 │ │ + b.w 8553a │ │ cmp.w lr, #0 │ │ - beq.w 8561c │ │ + beq.w 85684 │ │ ldr r1, [sp, #12] │ │ sub.w r0, lr, #1 │ │ mov r9, r8 │ │ movs r5, #2 │ │ - b.w 854c6 │ │ + b.w 8552e │ │ cmp.w lr, #8 │ │ - bcc.w 857da │ │ + bcc.w 85842 │ │ ldrb r0, [r4, #7] │ │ sub.w r1, lr, #8 │ │ ldr.w r2, [r4, #3] │ │ add.w r3, r4, #8 │ │ ldr r6, [sp, #12] │ │ lsls r0, r0, #24 │ │ orrs.w r0, r0, r2, lsr #8 │ │ strd r3, r1, [r6] │ │ - bne.w 855c6 │ │ + bne.w 8562e │ │ ldrb r1, [r4, #2] │ │ lsls r0, r2, #24 │ │ ldrh r2, [r4, #0] │ │ mov r9, r8 │ │ orr.w sl, r2, r1, lsl #16 │ │ orr.w r0, r0, sl │ │ lsrs r3, r0, #16 │ │ lsrs r0, r0, #8 │ │ - b.w 85710 │ │ + b.w 85778 │ │ cmp.w lr, #2 │ │ - bcc.w 8561c │ │ + bcc.w 85684 │ │ ldrh.w sl, [r4], #2 │ │ sub.w r0, lr, #2 │ │ ldr r1, [sp, #12] │ │ mov r9, r8 │ │ movs r3, #0 │ │ movs r5, #3 │ │ strd r4, r0, [r1] │ │ mov.w r0, sl, lsr #8 │ │ - b.w 854d2 │ │ + b.w 8553a │ │ cmp.w lr, #0 │ │ - beq.w 8585c │ │ + beq.w 858c4 │ │ add r4, lr │ │ sub.w r5, lr, #1 │ │ mov r9, r8 │ │ mov.w sl, #0 │ │ mov.w r8, #0 │ │ movs r6, #0 │ │ ldrb.w fp, [ip, #-1] │ │ cmp r6, #63 @ 0x3f │ │ - bne.n 84eea │ │ + bne.n 84f52 │ │ cmp.w fp, #127 @ 0x7f │ │ it ne │ │ cmpne.w fp, #0 │ │ - bne.w 85af2 │ │ + bne.w 85b5a │ │ and.w r1, r6, #63 @ 0x3f │ │ and.w r0, fp, #127 @ 0x7f │ │ rsb r3, r1, #32 │ │ subs.w r2, r1, #32 │ │ add.w r6, r6, #7 │ │ lsr.w r3, r0, r3 │ │ it pl │ │ @@ -140085,197 +139998,197 @@ │ │ lsl.w r0, r0, r1 │ │ it pl │ │ movpl r0, #0 │ │ orr.w sl, sl, r0 │ │ orr.w r8, r8, r3 │ │ sxtb.w r0, fp │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.w 8589e │ │ + bgt.w 85906 │ │ subs r5, #1 │ │ add.w ip, ip, #1 │ │ adds r0, r5, #1 │ │ - bne.n 84ed4 │ │ + bne.n 84f3c │ │ ldr r1, [sp, #12] │ │ movs r0, #0 │ │ mov r8, r9 │ │ strd r4, r0, [r1] │ │ - b.w 85860 │ │ + b.w 858c8 │ │ ldr r2, [sp, #12] │ │ mov r9, r8 │ │ cmp.w lr, #0 │ │ - beq.n 84f5c │ │ + beq.n 84fc4 │ │ mov.w r8, #0 │ │ ldrb.w r0, [r4, r8] │ │ cmp r0, #0 │ │ - beq.w 85882 │ │ + beq.w 858ea │ │ add.w r8, r8, #1 │ │ cmp lr, r8 │ │ - bne.n 84f4a │ │ + bne.n 84fb2 │ │ movs r0, #0 │ │ movs r1, #46 @ 0x2e │ │ strd r1, r0, [r9] │ │ str.w r0, [r9, #20] │ │ movs r0, #19 │ │ strd r4, r4, [r9, #12] │ │ strb.w r0, [r9, #8] │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ cmp.w lr, #2 │ │ - bcc.w 8561c │ │ + bcc.w 85684 │ │ ldrh.w sl, [r4], #2 │ │ sub.w r0, lr, #2 │ │ ldr r1, [sp, #12] │ │ mov r9, r8 │ │ movs r3, #0 │ │ movs r5, #12 │ │ strd r4, r0, [r1] │ │ mov.w r0, sl, lsr #8 │ │ - b.n 854d2 │ │ + b.n 8553a │ │ cmp.w lr, #2 │ │ - bcc.w 8561c │ │ + bcc.w 85684 │ │ mov r9, r8 │ │ ldrh.w r8, [r4], #2 │ │ sub.w r3, lr, #2 │ │ - b.n 85264 │ │ + b.n 852cc │ │ cmp.w lr, #0 │ │ - beq.w 8561c │ │ + beq.w 85684 │ │ mov r9, r8 │ │ ldrb.w r8, [r4], #1 │ │ sub.w r3, lr, #1 │ │ - b.n 85264 │ │ + b.n 852cc │ │ mov r9, r8 │ │ movs r0, #0 │ │ movs r5, #9 │ │ mov.w sl, #1 │ │ - b.n 854d0 │ │ + b.n 85538 │ │ cmp.w lr, #0 │ │ - beq.w 856b0 │ │ + beq.w 85718 │ │ ldr.w fp, [sp, #12] │ │ add r4, lr │ │ sub.w r6, lr, #1 │ │ mov r9, r8 │ │ mov.w sl, #0 │ │ movs r3, #0 │ │ movs r5, #0 │ │ ldrb.w lr, [ip, #-1] │ │ cmp r5, #63 @ 0x3f │ │ - bne.n 84ffc │ │ + bne.n 85064 │ │ cmp.w lr, #1 │ │ - bhi.w 856ba │ │ + bhi.w 85722 │ │ and.w r1, r5, #63 @ 0x3f │ │ and.w r0, lr, #127 @ 0x7f │ │ rsb r2, r1, #32 │ │ subs.w r8, r1, #32 │ │ lsr.w r2, r0, r2 │ │ it pl │ │ lslpl.w r2, r0, r8 │ │ lsl.w r0, r0, r1 │ │ it pl │ │ movpl r0, #0 │ │ orr.w sl, sl, r0 │ │ orrs r3, r2 │ │ sxtb.w r0, lr │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.w 85968 │ │ + bgt.w 859d0 │ │ subs r6, #1 │ │ add.w ip, ip, #1 │ │ adds r5, #7 │ │ adds r0, r6, #1 │ │ - bne.n 84fec │ │ - b.w 856a6 │ │ + bne.n 85054 │ │ + b.w 8570e │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ uxtab r5, r0, r2 │ │ movs r3, #25 │ │ cmp r5, #7 │ │ - bhi.w 85ad2 │ │ + bhi.w 85b3a │ │ tbh [pc, r5, lsl #1] │ │ movs r0, r1 │ │ lsls r1, r7, #19 │ │ lsls r7, r7, #20 │ │ lsls r1, r5, #19 │ │ lsls r7, r7, #20 │ │ lsls r7, r7, #20 │ │ lsls r7, r7, #20 │ │ lsls r3, r1, #20 │ │ cmp.w lr, #0 │ │ - beq.w 85a70 │ │ + beq.w 85ad8 │ │ ldr r1, [sp, #12] │ │ sub.w r0, lr, #1 │ │ mov r9, r8 │ │ str r0, [r1, #4] │ │ movs r0, #0 │ │ ldrb.w sl, [r4], #1 │ │ str r4, [r1, #0] │ │ - b.w 85a60 │ │ + b.w 85ac8 │ │ cmp.w lr, #0 │ │ - beq.w 856ea │ │ + beq.w 85752 │ │ ldr.w fp, [sp, #12] │ │ add.w sl, r4, lr │ │ sub.w r5, lr, #1 │ │ mov r9, r8 │ │ mov.w r8, #0 │ │ movs r3, #0 │ │ movs r6, #0 │ │ ldrb.w r4, [ip, #-1] │ │ cmp r6, #63 @ 0x3f │ │ - bne.n 850ae │ │ + bne.n 85116 │ │ cmp r4, #1 │ │ - bhi.w 85824 │ │ + bhi.w 8588c │ │ and.w r1, r6, #63 @ 0x3f │ │ and.w r0, r4, #127 @ 0x7f │ │ rsb r2, r1, #32 │ │ subs.w lr, r1, #32 │ │ lsr.w r2, r0, r2 │ │ it pl │ │ lslpl.w r2, r0, lr │ │ lsl.w r0, r0, r1 │ │ it pl │ │ movpl r0, #0 │ │ orr.w r8, r8, r0 │ │ orrs r3, r2 │ │ sxtb r0, r4 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.w 85974 │ │ + bgt.w 859dc │ │ subs r5, #1 │ │ add.w ip, ip, #1 │ │ adds r6, #7 │ │ adds r0, r5, #1 │ │ - bne.n 850a0 │ │ - b.n 852f2 │ │ + bne.n 85108 │ │ + b.n 8535a │ │ cmp.w lr, #0 │ │ - beq.w 8561c │ │ + beq.w 85684 │ │ ldr r1, [sp, #12] │ │ sub.w r0, lr, #1 │ │ mov r9, r8 │ │ movs r5, #12 │ │ - b.n 854c6 │ │ + b.n 8552e │ │ cmp.w lr, #16 │ │ - bcc.w 8561c │ │ + bcc.w 85684 │ │ ldr r2, [sp, #12] │ │ sub.w r0, lr, #16 │ │ add.w r1, r4, #16 │ │ mov r9, r8 │ │ lsrs r3, r4, #16 │ │ movs r5, #1 │ │ strd r1, r0, [r2] │ │ lsrs r0, r4, #8 │ │ movs r1, #0 │ │ mov.w r8, #16 │ │ mov sl, r4 │ │ - b.n 854d4 │ │ + b.n 8553c │ │ mov r3, r4 │ │ ldr r4, [sp, #8] │ │ and.w r0, r2, #65280 @ 0xff00 │ │ cmp.w r0, #1024 @ 0x400 │ │ - bne.w 85b2a │ │ + bne.w 85b92 │ │ ldrh r0, [r4, #8] │ │ subs r2, r0, #2 │ │ cmp r2, #119 @ 0x77 │ │ - bhi.w 85b2a │ │ + bhi.w 85b92 │ │ tbh [pc, r2, lsl #1] │ │ lsls r0, r7, #1 │ │ lsls r1, r6, #19 │ │ lsls r1, r6, #19 │ │ lsls r1, r6, #19 │ │ lsls r1, r6, #19 │ │ lsls r1, r6, #19 │ │ @@ -140391,86 +140304,86 @@ │ │ lsls r1, r6, #19 │ │ lsls r1, r6, #19 │ │ lsls r1, r6, #19 │ │ lsls r1, r6, #19 │ │ lsls r0, r7, #1 │ │ ldr r1, [sp, #12] │ │ cmp.w lr, #3 │ │ - bls.w 85b32 │ │ + bls.w 85b9a │ │ ldr.w sl, [r3], #4 │ │ sub.w r0, lr, #4 │ │ mov r9, r8 │ │ movs r5, #10 │ │ - b.w 85b50 │ │ + b.w 85bb8 │ │ cmp.w lr, #4 │ │ - bcc.w 8561c │ │ + bcc.w 85684 │ │ mov r9, r8 │ │ ldr.w r8, [r4], #4 │ │ sub.w r3, lr, #4 │ │ ldr r2, [sp, #12] │ │ cmp r3, r8 │ │ strd r4, r3, [r2] │ │ - bcs.w 856dc │ │ + bcs.w 85744 │ │ mov r8, r9 │ │ - b.n 8561c │ │ + b.n 85684 │ │ cmp.w lr, #0 │ │ - beq.w 8561c │ │ + beq.w 85684 │ │ ldr r1, [sp, #12] │ │ sub.w r0, lr, #1 │ │ mov r9, r8 │ │ movs r5, #13 │ │ - b.n 854c6 │ │ + b.n 8552e │ │ cmp.w lr, #0 │ │ - beq.w 856ea │ │ + beq.w 85752 │ │ mov r9, r8 │ │ add.w sl, r4, lr │ │ sub.w r5, lr, #1 │ │ mov.w r8, #0 │ │ movs r3, #0 │ │ movs r6, #0 │ │ ldr.w fp, [sp, #12] │ │ ldrb.w r4, [ip, #-1] │ │ cmp r6, #63 @ 0x3f │ │ - bne.n 852b4 │ │ + bne.n 8531c │ │ cmp r4, #1 │ │ - bhi.w 85824 │ │ + bhi.w 8588c │ │ and.w r1, r6, #63 @ 0x3f │ │ and.w r0, r4, #127 @ 0x7f │ │ rsb r2, r1, #32 │ │ subs.w lr, r1, #32 │ │ lsr.w r2, r0, r2 │ │ it pl │ │ lslpl.w r2, r0, lr │ │ lsl.w r0, r0, r1 │ │ it pl │ │ movpl r0, #0 │ │ orr.w r8, r8, r0 │ │ orrs r3, r2 │ │ sxtb r0, r4 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.w 8598e │ │ + bgt.w 859f6 │ │ subs r5, #1 │ │ add.w ip, ip, #1 │ │ adds r6, #7 │ │ adds r0, r5, #1 │ │ - bne.n 852a6 │ │ + bne.n 8530e │ │ movs r0, #0 │ │ mov r8, r9 │ │ strd sl, r0, [fp] │ │ movs r1, #19 │ │ - b.n 859a8 │ │ + b.n 85a10 │ │ ldr r6, [sp, #8] │ │ and.w r0, r2, #65280 @ 0xff00 │ │ mov r9, r8 │ │ cmp.w r0, #2048 @ 0x800 │ │ - bne.w 85b6c │ │ + bne.w 85bd4 │ │ ldrh r0, [r6, #8] │ │ subs r0, #2 │ │ cmp r0, #119 @ 0x77 │ │ - bhi.w 85b6c │ │ + bhi.w 85bd4 │ │ tbh [pc, r0, lsl #1] │ │ lsls r0, r7, #1 │ │ lsls r0, r5, #16 │ │ lsls r0, r5, #16 │ │ lsls r0, r5, #16 │ │ lsls r0, r5, #16 │ │ lsls r0, r5, #16 │ │ @@ -140587,70 +140500,70 @@ │ │ lsls r0, r5, #16 │ │ lsls r0, r5, #16 │ │ lsls r0, r5, #16 │ │ lsls r0, r7, #1 │ │ ldr r1, [sp, #12] │ │ add r0, sp, #16 │ │ movs r2, #8 │ │ - bl 89da6 │ │ + bl 89dd2 │ │ ldrb.w r0, [sp, #16] │ │ cmp r0, #82 @ 0x52 │ │ - bne.w 8590a │ │ + bne.w 85972 │ │ ldr.w sl, [sp, #20] │ │ movs r1, #0 │ │ movs r5, #10 │ │ mov r4, r6 │ │ mov.w r3, sl, lsr #16 │ │ mov.w r0, sl, lsr #8 │ │ - b.n 854d6 │ │ + b.n 8553e │ │ cmp.w lr, #0 │ │ - beq.w 8561c │ │ + beq.w 85684 │ │ ldr r1, [sp, #12] │ │ sub.w r0, lr, #1 │ │ ldrb.w sl, [r4], #1 │ │ mov r9, r8 │ │ movs r5, #9 │ │ strd r4, r0, [r1] │ │ cmp.w sl, #0 │ │ it ne │ │ movne.w sl, #1 │ │ movs r0, #0 │ │ - b.n 854d0 │ │ + b.n 85538 │ │ ldr r0, [sp, #4] │ │ uxtb r0, r0 │ │ cmp r0, #8 │ │ - bne.w 8573a │ │ + bne.w 857a2 │ │ ldr r6, [sp, #12] │ │ cmp.w lr, #8 │ │ - bcc.w 857da │ │ + bcc.w 85842 │ │ ldrb r0, [r4, #7] │ │ sub.w r1, lr, #8 │ │ ldr.w r2, [r4, #3] │ │ add.w r3, r4, #8 │ │ strd r3, r1, [r6] │ │ lsls r0, r0, #24 │ │ orrs.w r0, r0, r2, lsr #8 │ │ - bne.w 855c6 │ │ + bne.w 8562e │ │ ldrb r1, [r4, #2] │ │ lsls r0, r2, #24 │ │ ldrh r2, [r4, #0] │ │ mov r9, r8 │ │ orr.w r1, r2, r1, lsl #16 │ │ orr.w sl, r0, r1 │ │ - b.n 85750 │ │ + b.n 857b8 │ │ cmp.w r9, #33 @ 0x21 │ │ - bne.w 8575e │ │ + bne.w 857c6 │ │ ldr r4, [sp, #8] │ │ mov r9, r8 │ │ movs r1, #0 │ │ movs r5, #6 │ │ ldrd sl, r8, [r4] │ │ - b.n 85b86 │ │ + b.n 85bee │ │ cmp.w lr, #0 │ │ - beq.w 8561c │ │ + beq.w 85684 │ │ ldr r1, [sp, #12] │ │ sub.w r0, lr, #1 │ │ mov r9, r8 │ │ movs r5, #29 │ │ str r0, [r1, #4] │ │ movs r0, #0 │ │ ldrb.w sl, [r4], #1 │ │ @@ -140667,241 +140580,241 @@ │ │ strd r0, r8, [r9, #8] │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r4, [sp, #8] │ │ ldr r0, [sp, #0] │ │ cmp r0, #2 │ │ - bne.w 85774 │ │ + bne.w 857dc │ │ ldr r1, [sp, #12] │ │ add r0, sp, #16 │ │ - bl 89e6c │ │ - b.n 8577e │ │ + bl 89e98 │ │ + b.n 857e6 │ │ cmp.w lr, #0 │ │ - beq.w 85872 │ │ + beq.w 858da │ │ ldr.w fp, [sp, #12] │ │ add r4, lr │ │ sub.w r6, lr, #1 │ │ mov r9, r8 │ │ mov.w sl, #0 │ │ mov.w r8, #0 │ │ movs r3, #0 │ │ ldrb.w lr, [ip, #-1] │ │ cmp r3, #63 @ 0x3f │ │ - bne.n 8553a │ │ + bne.n 855a2 │ │ cmp.w lr, #1 │ │ - bhi.w 85938 │ │ + bhi.w 859a0 │ │ and.w r1, r3, #63 @ 0x3f │ │ and.w r0, lr, #127 @ 0x7f │ │ rsb r5, r1, #32 │ │ subs.w r2, r1, #32 │ │ lsr.w r5, r0, r5 │ │ it pl │ │ lslpl.w r5, r0, r2 │ │ lsl.w r0, r0, r1 │ │ it pl │ │ movpl r0, #0 │ │ orr.w sl, sl, r0 │ │ orr.w r8, r8, r5 │ │ sxtb.w r0, lr │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.w 859cc │ │ + bgt.w 85a34 │ │ subs r6, #1 │ │ add.w ip, ip, #1 │ │ adds r3, #7 │ │ adds r0, r6, #1 │ │ - bne.n 8552a │ │ + bne.n 85592 │ │ movs r0, #0 │ │ mov r8, r9 │ │ strd r4, r0, [fp] │ │ - b.n 85876 │ │ + b.n 858de │ │ ldr r0, [sp, #4] │ │ uxtb r0, r0 │ │ cmp r0, #8 │ │ - bne.w 857d0 │ │ + bne.w 85838 │ │ ldr r6, [sp, #12] │ │ cmp.w lr, #8 │ │ - bcc.w 857da │ │ + bcc.w 85842 │ │ ldrb r0, [r4, #7] │ │ sub.w r1, lr, #8 │ │ ldr.w r2, [r4, #3] │ │ add.w r3, r4, #8 │ │ strd r3, r1, [r6] │ │ lsls r0, r0, #24 │ │ orrs.w r0, r0, r2, lsr #8 │ │ - bne.n 855c6 │ │ + bne.n 8562e │ │ ldrb r1, [r4, #2] │ │ lsls r0, r2, #24 │ │ ldrh r2, [r4, #0] │ │ mov r9, r8 │ │ orr.w r1, r2, r1, lsl #16 │ │ orr.w sl, r0, r1 │ │ - b.n 858fc │ │ + b.n 85964 │ │ movs r2, #56 @ 0x38 │ │ - b.n 857de │ │ + b.n 85846 │ │ cmp.w lr, #4 │ │ - bcc.n 8561c │ │ + bcc.n 85684 │ │ mov r9, r8 │ │ ldr.w sl, [r4], #4 │ │ sub.w r0, lr, #4 │ │ ldr r1, [sp, #12] │ │ - b.n 85704 │ │ + b.n 8576c │ │ cmp.w lr, #3 │ │ - bcc.n 8561c │ │ + bcc.n 85684 │ │ ldrb r3, [r4, #2] │ │ sub.w r1, lr, #3 │ │ ldr r6, [sp, #12] │ │ mov r9, r8 │ │ ldrh r0, [r4, #0] │ │ adds r2, r4, #3 │ │ strd r2, r1, [r6] │ │ orr.w sl, r0, r3, lsl #16 │ │ - b.n 8583a │ │ + b.n 858a2 │ │ cmp.w lr, #4 │ │ - bcc.n 8561c │ │ + bcc.n 85684 │ │ ldr r1, [sp, #12] │ │ sub.w r0, lr, #4 │ │ ldr.w sl, [r4], #4 │ │ mov r9, r8 │ │ strd r4, r0, [r1] │ │ - b.n 8584e │ │ + b.n 858b6 │ │ cmp.w lr, #2 │ │ - bcs.w 857fe │ │ + bcs.w 85866 │ │ movs r0, #0 │ │ movs r1, #46 @ 0x2e │ │ strd r1, r0, [r8] │ │ str.w r4, [r8, #12] │ │ str.w r4, [r8, #16] │ │ str.w r0, [r8, #20] │ │ movs r0, #19 │ │ strb.w r0, [r8, #8] │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ cmp.w lr, #0 │ │ - beq.n 856b0 │ │ + beq.n 85718 │ │ ldr.w fp, [sp, #12] │ │ add r4, lr │ │ sub.w r6, lr, #1 │ │ mov r9, r8 │ │ mov.w sl, #0 │ │ movs r3, #0 │ │ movs r5, #0 │ │ ldrb.w lr, [ip, #-1] │ │ cmp r5, #63 @ 0x3f │ │ - bne.n 85666 │ │ + bne.n 856ce │ │ cmp.w lr, #1 │ │ - bhi.n 856ba │ │ + bhi.n 85722 │ │ and.w r1, r5, #63 @ 0x3f │ │ and.w r0, lr, #127 @ 0x7f │ │ rsb r2, r1, #32 │ │ subs.w r8, r1, #32 │ │ lsr.w r2, r0, r2 │ │ it pl │ │ lslpl.w r2, r0, r8 │ │ lsl.w r0, r0, r1 │ │ it pl │ │ movpl r0, #0 │ │ orr.w sl, sl, r0 │ │ orrs r3, r2 │ │ sxtb.w r0, lr │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.w 859e6 │ │ + bgt.w 85a4e │ │ subs r6, #1 │ │ add.w ip, ip, #1 │ │ adds r5, #7 │ │ adds r0, r6, #1 │ │ - bne.n 85658 │ │ + bne.n 856c0 │ │ movs r0, #0 │ │ mov r8, r9 │ │ strd r4, r0, [fp] │ │ - b.n 856b4 │ │ + b.n 8571c │ │ mov.w lr, #0 │ │ movs r3, #0 │ │ movs r1, #19 │ │ - b.n 85a02 │ │ + b.n 85a6a │ │ strd ip, r6, [fp] │ │ movs r1, #6 │ │ - b.n 859fc │ │ + b.n 85a64 │ │ movs r0, #0 │ │ movs r1, #46 @ 0x2e │ │ strd r1, r0, [r8] │ │ movs r0, #12 │ │ strh.w r5, [r8, #10] │ │ strb.w r0, [r8, #8] │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ sub.w r0, r3, r8 │ │ add.w r1, r4, r8 │ │ lsrs r3, r4, #16 │ │ movs r5, #1 │ │ - b.n 85892 │ │ + b.n 858fa │ │ mov sl, r4 │ │ movs r4, #0 │ │ movs r1, #19 │ │ - b.n 859a8 │ │ + b.n 85a10 │ │ ldr r1, [sp, #12] │ │ cmp.w lr, #4 │ │ - bcc.n 857da │ │ + bcc.n 85842 │ │ ldr.w sl, [r4], #4 │ │ sub.w r0, lr, #4 │ │ mov r9, r8 │ │ strd r4, r0, [r1] │ │ mov.w r3, sl, lsr #16 │ │ mov.w r0, sl, lsr #8 │ │ movs r1, #0 │ │ movs r5, #15 │ │ - b.n 854d4 │ │ + b.n 8553c │ │ ldr r1, [sp, #12] │ │ cmp.w lr, #4 │ │ - bcc.n 857da │ │ + bcc.n 85842 │ │ sub.w r0, lr, #4 │ │ ldr.w sl, [r4], #4 │ │ mov r9, r8 │ │ strd r4, r0, [r1] │ │ mov.w r3, sl, lsr #16 │ │ mov.w r0, sl, lsr #8 │ │ movs r1, #0 │ │ movs r5, #10 │ │ - b.n 854d4 │ │ + b.n 8553c │ │ ldr r1, [sp, #12] │ │ cmp.w lr, #4 │ │ - bcc.n 857da │ │ + bcc.n 85842 │ │ ldr.w sl, [r4], #4 │ │ sub.w r0, lr, #4 │ │ mov r9, r8 │ │ strd r4, r0, [r1] │ │ mov.w r3, sl, lsr #16 │ │ mov.w r0, sl, lsr #8 │ │ movs r1, #0 │ │ movs r5, #26 │ │ - b.n 854d4 │ │ + b.n 8553c │ │ movs r0, #0 │ │ movs r1, #46 @ 0x2e │ │ strd r1, r0, [r8] │ │ movs r0, #73 @ 0x49 │ │ strb.w r0, [r8, #8] │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r1, [sp, #12] │ │ add r0, sp, #16 │ │ ldr r2, [sp, #4] │ │ - bl 89da6 │ │ + bl 89dd2 │ │ ldrb.w r0, [sp, #16] │ │ cmp r0, #82 @ 0x52 │ │ - bne.n 8579a │ │ + bne.n 85802 │ │ ldr.w sl, [sp, #20] │ │ mov r9, r8 │ │ movs r1, #0 │ │ movs r5, #14 │ │ mov.w r3, sl, lsr #16 │ │ mov.w r0, sl, lsr #8 │ │ - b.n 854d6 │ │ + b.n 8553e │ │ ldrb.w r4, [sp, #19] │ │ ldrh.w r1, [sp, #17] │ │ strb.w r4, [r8, #11] │ │ movs r4, #46 @ 0x2e │ │ ldr r2, [sp, #20] │ │ ldr r3, [sp, #24] │ │ strh.w r1, [r8, #9] │ │ @@ -140913,15 +140826,15 @@ │ │ str.w r6, [r8, #20] │ │ strb.w r0, [r8, #8] │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r1, [sp, #12] │ │ cmp.w lr, #4 │ │ - bcs.w 858ee │ │ + bcs.w 85956 │ │ movs r1, #0 │ │ movs r2, #19 │ │ movs r0, #0 │ │ movs r3, #46 @ 0x2e │ │ strd r3, r0, [r8] │ │ strb.w r2, [r8, #8] │ │ str.w r4, [r8, #12] │ │ @@ -140934,98 +140847,98 @@ │ │ sub.w r0, lr, #2 │ │ ldr r1, [sp, #12] │ │ mov r9, r8 │ │ movs r3, #0 │ │ movs r5, #29 │ │ strd r4, r0, [r1] │ │ mov.w r0, sl, lsr #8 │ │ - b.n 854d2 │ │ + b.n 8553a │ │ strd ip, r6, [fp] │ │ movs r1, #6 │ │ mov.w lr, #0 │ │ - b.n 85a02 │ │ + b.n 85a6a │ │ strd ip, r5, [fp] │ │ movs r1, #6 │ │ - b.n 859a4 │ │ + b.n 85a0c │ │ cmp r3, #0 │ │ strd ip, r6, [fp] │ │ - bne.w 859fa │ │ + bne.w 85a62 │ │ mov.w r3, sl, lsr #16 │ │ mov.w r0, sl, lsr #8 │ │ movs r1, #0 │ │ movs r5, #12 │ │ - b.n 854d4 │ │ + b.n 8553c │ │ cmp r3, #0 │ │ strd ip, r6, [fp] │ │ - bne.w 859fa │ │ + bne.w 85a62 │ │ mov.w r3, sl, lsr #16 │ │ mov.w r0, sl, lsr #8 │ │ movs r1, #0 │ │ movs r5, #29 │ │ - b.n 854d4 │ │ + b.n 8553c │ │ mov.w fp, #0 │ │ movs r1, #0 │ │ movs r2, #19 │ │ movs r0, #0 │ │ movs r3, #46 @ 0x2e │ │ strd r3, r0, [r8] │ │ strb.w fp, [r8, #9] │ │ - b.n 857e6 │ │ + b.n 8584e │ │ mov.w lr, #0 │ │ movs r1, #0 │ │ movs r2, #19 │ │ - b.n 85944 │ │ + b.n 859ac │ │ movs r1, #19 │ │ mov r4, ip │ │ - b.n 85a78 │ │ + b.n 85ae0 │ │ mvn.w r0, r8 │ │ add.w r1, r4, r8 │ │ add r0, lr │ │ adds r1, #1 │ │ lsrs r3, r4, #16 │ │ movs r5, #31 │ │ strd r1, r0, [r2] │ │ lsrs r0, r4, #8 │ │ movs r1, #0 │ │ mov sl, r4 │ │ - b.n 854d4 │ │ + b.n 8553c │ │ ldr r0, [sp, #12] │ │ movs r1, #0 │ │ cmp r6, #63 @ 0x3f │ │ strd ip, r5, [r0] │ │ mov.w r0, sl, lsr #16 │ │ orr.w r3, r0, r8, lsl #16 │ │ mov.w r0, sl, lsr #8 │ │ orr.w r0, r0, r8, lsl #24 │ │ mov.w r5, #6 │ │ - bgt.w 854d4 │ │ + bgt.w 8553c │ │ ldr r4, [sp, #8] │ │ cmp.w fp, #64 @ 0x40 │ │ - bcc.w 854d6 │ │ + bcc.w 8553e │ │ and.w r0, r6, #63 @ 0x3f │ │ mov.w r2, #4294967295 @ 0xffffffff │ │ subs.w r1, r0, #32 │ │ lsl.w r0, r2, r0 │ │ it pl │ │ lslpl r2, r1 │ │ it pl │ │ movpl r0, #0 │ │ orr.w sl, sl, r0 │ │ orr.w r8, r8, r2 │ │ movs r1, #0 │ │ - b.n 85b86 │ │ + b.n 85bee │ │ ldr.w sl, [r4], #4 │ │ sub.w r0, lr, #4 │ │ mov r9, r8 │ │ strd r4, r0, [r1] │ │ mov.w r3, sl, lsr #16 │ │ mov.w r0, sl, lsr #8 │ │ movs r1, #0 │ │ movs r5, #30 │ │ - b.n 854d4 │ │ + b.n 8553c │ │ add r6, sp, #20 │ │ ldrh.w r1, [sp, #17] │ │ ldrb.w r5, [sp, #19] │ │ ldmia r6, {r2, r3, r6} │ │ strb.w r5, [r9, #11] │ │ movs r5, #46 @ 0x2e │ │ strh.w r1, [r9, #9] │ │ @@ -141041,44 +140954,44 @@ │ │ mov.w lr, #0 │ │ mov r8, r9 │ │ strd ip, r6, [fp] │ │ movs r0, #0 │ │ movs r3, #46 @ 0x2e │ │ strd r3, r0, [r8] │ │ strb.w lr, [r8, #9] │ │ - b.n 857e6 │ │ + b.n 8584e │ │ cmp r3, #0 │ │ strd ip, r6, [fp] │ │ - bne.n 859fa │ │ + bne.n 85a62 │ │ mov.w r3, sl, lsr #16 │ │ mov.w r0, sl, lsr #8 │ │ movs r1, #0 │ │ movs r5, #24 │ │ - b.n 854d4 │ │ + b.n 8553c │ │ cmp r3, #0 │ │ strd ip, r6, [fp] │ │ - beq.w 84d02 │ │ - b.n 859fa │ │ + beq.w 84d6a │ │ + b.n 85a62 │ │ strd ip, r5, [fp] │ │ - cbnz r3, 859a2 │ │ + cbnz r3, 85a0a │ │ cmp r5, r8 │ │ - bcc.n 8599a │ │ + bcc.n 85a02 │ │ sub.w r0, r5, r8 │ │ add.w r1, ip, r8 │ │ mov.w r3, ip, lsr #16 │ │ movs r5, #1 │ │ - b.n 85b10 │ │ + b.n 85b78 │ │ strd ip, r5, [fp] │ │ - cbnz r3, 859a2 │ │ + cbnz r3, 85a0a │ │ cmp r5, r8 │ │ - bcs.w 85b02 │ │ + bcs.w 85b6a │ │ movs r4, #0 │ │ movs r1, #19 │ │ mov sl, ip │ │ - b.n 859a6 │ │ + b.n 85a0e │ │ movs r1, #56 @ 0x38 │ │ movs r4, #0 │ │ mov r8, r9 │ │ movs r0, #0 │ │ movs r2, #46 @ 0x2e │ │ strd r2, r0, [r8] │ │ str.w sl, [r8, #12] │ │ @@ -141092,22 +141005,22 @@ │ │ mov.w r0, sl, lsr #16 │ │ orr.w r3, r0, r8, lsl #16 │ │ mov.w r0, sl, lsr #8 │ │ strd ip, r6, [fp] │ │ orr.w r0, r0, r8, lsl #24 │ │ movs r1, #0 │ │ movs r5, #7 │ │ - b.n 854d4 │ │ + b.n 8553c │ │ strd ip, r6, [fp] │ │ - cbnz r3, 859fa │ │ + cbnz r3, 85a62 │ │ mov.w r3, sl, lsr #16 │ │ mov.w r0, sl, lsr #8 │ │ movs r1, #0 │ │ movs r5, #19 │ │ - b.n 854d4 │ │ + b.n 8553c │ │ movs r1, #56 @ 0x38 │ │ mov.w lr, #0 │ │ mov r8, r9 │ │ movs r0, #0 │ │ movs r2, #46 @ 0x2e │ │ strb.w lr, [r8, #9] │ │ strb.w r1, [r8, #8] │ │ @@ -141115,40 +141028,40 @@ │ │ str.w r4, [r8, #16] │ │ strd r2, r0, [r8] │ │ str.w r3, [r8, #20] │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ cmp.w lr, #4 │ │ - bcc.n 85a70 │ │ + bcc.n 85ad8 │ │ ldr.w sl, [r4], #4 │ │ sub.w r0, lr, #4 │ │ ldr r1, [sp, #12] │ │ mov r9, r8 │ │ mov.w r3, sl, lsr #16 │ │ strd r4, r0, [r1] │ │ mov.w r0, sl, lsr #8 │ │ - b.n 85a62 │ │ + b.n 85aca │ │ cmp.w lr, #2 │ │ - bcc.n 85a70 │ │ + bcc.n 85ad8 │ │ ldrh.w sl, [r4], #2 │ │ sub.w r0, lr, #2 │ │ ldr r1, [sp, #12] │ │ mov r9, r8 │ │ strd r4, r0, [r1] │ │ mov.w r0, sl, lsr #8 │ │ movs r3, #0 │ │ mov.w r8, #0 │ │ movs r5, #0 │ │ - b.n 854d2 │ │ + b.n 8553a │ │ cmp.w lr, #7 │ │ - bhi.n 85a98 │ │ + bhi.n 85b00 │ │ movs r6, #0 │ │ movs r3, #19 │ │ - b.n 85ad2 │ │ + b.n 85b3a │ │ movs r1, #6 │ │ movs r0, #0 │ │ movs r2, #46 @ 0x2e │ │ strd r2, r0, [r8] │ │ strd r4, r4, [r8, #12] │ │ str.w r0, [r8, #20] │ │ strh.w r6, [r8, #10] │ │ @@ -141172,15 +141085,15 @@ │ │ orr.w sl, r6, r3, lsl #16 │ │ orr.w r1, sl, r0, lsl #24 │ │ lsrs r0, r0, #8 │ │ lsrs r3, r1, #16 │ │ lsrs r1, r1, #8 │ │ orr.w r3, r3, r0, lsl #16 │ │ orr.w r0, r1, r0, lsl #24 │ │ - b.n 854d2 │ │ + b.n 8553a │ │ movs r0, #0 │ │ movs r1, #46 @ 0x2e │ │ strd r1, r0, [r8] │ │ strb.w r2, [r8, #9] │ │ strb.w r3, [r8, #8] │ │ strd r4, r4, [r8, #12] │ │ str.w r6, [r8, #20] │ │ @@ -141188,79 +141101,79 @@ │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r0, [sp, #12] │ │ movs r2, #7 │ │ mov.w fp, #0 │ │ mov r8, r9 │ │ strd ip, r5, [r0] │ │ - b.n 85864 │ │ + b.n 858cc │ │ sub.w r0, r5, r8 │ │ add.w r1, ip, r8 │ │ mov.w r3, ip, lsr #16 │ │ movs r5, #8 │ │ strd r1, r0, [fp] │ │ mov.w r0, ip, lsr #8 │ │ movs r1, #0 │ │ mov sl, ip │ │ - b.n 854d4 │ │ + b.n 8553c │ │ ldr r0, [sp, #0] │ │ bic.w r0, r0, #1 │ │ cmp r0, #2 │ │ - beq.w 85238 │ │ + beq.w 852a0 │ │ ldr r1, [sp, #12] │ │ cmp.w lr, #3 │ │ - bhi.n 85b44 │ │ + bhi.n 85bac │ │ movs r0, #0 │ │ movs r1, #46 @ 0x2e │ │ strd r1, r0, [r8] │ │ str.w r3, [r8, #12] │ │ str.w r3, [r8, #16] │ │ - b.n 8562c │ │ + b.n 85694 │ │ ldr.w sl, [r3], #4 │ │ sub.w r0, lr, #4 │ │ mov r9, r8 │ │ movs r5, #4 │ │ strd r3, r0, [r1] │ │ movs r1, #0 │ │ mov.w r3, sl, lsr #16 │ │ mov.w r0, sl, lsr #8 │ │ - b.n 854d6 │ │ + b.n 8553e │ │ ldr r0, [sp, #0] │ │ bic.w r0, r0, #1 │ │ cmp r0, #2 │ │ - beq.w 8540c │ │ + beq.w 85474 │ │ ldr r1, [sp, #12] │ │ add r0, sp, #16 │ │ - bl 89e16 │ │ + bl 89e42 │ │ ldrb.w r0, [sp, #16] │ │ cmp r0, #82 @ 0x52 │ │ - bne.n 85b98 │ │ + bne.n 85c00 │ │ ldrd sl, r8, [sp, #24] │ │ movs r1, #0 │ │ movs r5, #5 │ │ mov r4, r6 │ │ mov.w r0, sl, lsr #16 │ │ orr.w r3, r0, r8, lsl #16 │ │ mov.w r0, sl, lsr #8 │ │ orr.w r0, r0, r8, lsl #24 │ │ - b.n 854d6 │ │ + b.n 8553e │ │ ldr r2, [sp, #20] │ │ ldr.w r1, [sp, #17] │ │ ldrd r3, r6, [sp, #24] │ │ str.w r2, [r9, #12] │ │ movs r2, #46 @ 0x2e │ │ str.w r1, [r9, #9] │ │ movs r1, #0 │ │ strd r3, r6, [r9, #16] │ │ strd r2, r1, [r9] │ │ strb.w r0, [r9, #8] │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - bmi.n 85b6e │ │ + bmi.n 85bd6 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #332 @ 0x14c │ │ mov r5, r1 │ │ adds r1, r3, #1 │ │ str r1, [sp, #184] @ 0xb8 │ │ @@ -141280,18 +141193,18 @@ │ │ adds r2, #1 │ │ str r3, [sp, #188] @ 0xbc │ │ str r2, [sp, #168] @ 0xa8 │ │ str r6, [sp, #216] @ 0xd8 │ │ ldr r2, [r5, #40] @ 0x28 │ │ str r2, [sp, #220] @ 0xdc │ │ cmp r2, r6 │ │ - ble.w 86900 │ │ + ble.w 86968 │ │ ldrd r4, r8, [r5, #24] │ │ cmp.w r8, #0 │ │ - beq.w 8690e │ │ + beq.w 86976 │ │ ldr.w lr, [r5, #32] │ │ sub.w sl, r8, #1 │ │ str.w fp, [sp, #212] @ 0xd4 │ │ add.w fp, r4, #1 │ │ ldrd r2, r1, [lr, #24] │ │ mov r0, r5 │ │ strd r2, r1, [sp, #196] @ 0xc4 │ │ @@ -141301,62 +141214,62 @@ │ │ str r1, [sp, #192] @ 0xc0 │ │ ldrb.w r1, [lr, #33] @ 0x21 │ │ str r4, [sp, #224] @ 0xe0 │ │ movs r4, #0 │ │ str r1, [sp, #204] @ 0xcc │ │ ldrb.w r5, [fp, #-1] │ │ cmp.w r9, #63 @ 0x3f │ │ - bne.n 85c52 │ │ + bne.n 85cba │ │ cmp r5, #1 │ │ - bhi.w 868d0 │ │ + bhi.w 86938 │ │ and.w r3, r9, #63 @ 0x3f │ │ and.w r1, r5, #127 @ 0x7f │ │ rsb r2, r3, #32 │ │ subs.w r6, r3, #32 │ │ lsr.w r2, r1, r2 │ │ it pl │ │ lslpl.w r2, r1, r6 │ │ lsl.w r1, r1, r3 │ │ it pl │ │ movpl r1, #0 │ │ orrs r4, r1 │ │ orr.w ip, ip, r2 │ │ sxtb r1, r5 │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ - bgt.n 85c98 │ │ + bgt.n 85d00 │ │ sub.w sl, sl, #1 │ │ add.w fp, fp, #1 │ │ add.w r9, r9, #7 │ │ adds.w r1, sl, #1 │ │ - bne.n 85c42 │ │ - b.w 868da │ │ + bne.n 85caa │ │ + b.w 86942 │ │ mov r5, r0 │ │ orrs.w r1, r4, ip │ │ strd fp, sl, [r5, #24] │ │ - beq.n 85d6c │ │ + beq.n 85dd4 │ │ ldr r3, [r5, #36] @ 0x24 │ │ cmp.w ip, #0 │ │ - bne.n 85cbe │ │ + bne.n 85d26 │ │ ldr r2, [r3, #8] │ │ subs r1, r4, #1 │ │ cmp r1, r2 │ │ - bcs.n 85cbe │ │ + bcs.n 85d26 │ │ ldr r2, [r3, #4] │ │ movs r3, #104 @ 0x68 │ │ mla fp, r1, r3, r2 │ │ - b.n 85d34 │ │ + b.n 85d9c │ │ ldr.w sl, [r3, #12] │ │ cmp.w sl, #0 │ │ - beq.w 8694e │ │ + beq.w 869b6 │ │ ldr.w r8, [r3, #16] │ │ ldrh.w r9, [sl, #1238] @ 0x4d6 │ │ mov.w fp, #4294967295 @ 0xffffffff │ │ mov r3, sl │ │ mov.w r6, r9, lsl #3 │ │ - cbz r6, 85d10 │ │ + cbz r6, 85d78 │ │ ldrd r1, r2, [r3], #8 │ │ subs r6, #8 │ │ add.w fp, fp, #1 │ │ subs r5, r4, r1 │ │ sbcs.w r5, ip, r2 │ │ mov.w r5, #0 │ │ it cc │ │ @@ -141364,141 +141277,141 @@ │ │ subs r1, r1, r4 │ │ sbcs.w r1, r2, ip │ │ mov.w r1, #0 │ │ it cc │ │ movcc r1, #1 │ │ subs r1, r1, r5 │ │ cmp r1, #1 │ │ - beq.n 85cdc │ │ + beq.n 85d44 │ │ uxtb r1, r1 │ │ - cbnz r1, 85d12 │ │ - b.n 85d28 │ │ + cbnz r1, 85d7a │ │ + b.n 85d90 │ │ mov fp, r9 │ │ cmp.w r8, #0 │ │ - beq.w 8694e │ │ + beq.w 869b6 │ │ add.w r1, sl, fp, lsl #2 │ │ sub.w r8, r8, #1 │ │ ldr.w sl, [r1, #1240] @ 0x4d8 │ │ - b.n 85cce │ │ + b.n 85d36 │ │ movs r1, #104 @ 0x68 │ │ mov r5, r0 │ │ mla r1, fp, r1, sl │ │ add.w fp, r1, #88 @ 0x58 │ │ ldrb.w r1, [fp, #98] @ 0x62 │ │ ldr.w sl, [sp, #224] @ 0xe0 │ │ cmp r1, #1 │ │ ittt eq │ │ ldreq r1, [sp, #220] @ 0xdc │ │ addeq r1, #1 │ │ streq r1, [r5, #40] @ 0x28 │ │ ldrh.w r1, [fp, #96] @ 0x60 │ │ cmp r1, #46 @ 0x2e │ │ - beq.n 85d7a │ │ + beq.n 85de2 │ │ cmp r1, #29 │ │ - beq.w 85f6c │ │ + beq.w 85fd4 │ │ ldr.w r1, [fp] │ │ cmp r1, #1 │ │ - bne.w 85f3a │ │ + bne.w 85fa2 │ │ ldr.w r9, [sp, #216] @ 0xd8 │ │ ldr.w r8, [sp, #228] @ 0xe4 │ │ ldrd r3, r4, [fp, #8] │ │ - b.n 85f50 │ │ + b.n 85fb8 │ │ ldr r1, [sp, #220] @ 0xdc │ │ mov.w fp, #0 │ │ ldr r6, [sp, #216] @ 0xd8 │ │ subs r1, #1 │ │ str r1, [r5, #40] @ 0x28 │ │ - b.n 85bfa │ │ + b.n 85c62 │ │ ldr.w r1, [fp] │ │ cmp r1, #1 │ │ - bne.n 85d8c │ │ + bne.n 85df4 │ │ ldr.w r9, [sp, #216] @ 0xd8 │ │ ldrd r3, r6, [fp, #8] │ │ - b.n 85d9e │ │ + b.n 85e06 │ │ ldr.w r6, [fp, #4] │ │ cmp r6, #6 │ │ - bcs.w 869a6 │ │ + bcs.w 86a0e │ │ ldr.w r9, [sp, #216] @ 0xd8 │ │ add.w r3, fp, #8 │ │ ldr.w r2, [lr, #32] │ │ add r0, sp, #264 @ 0x108 │ │ ldr r1, [sp, #208] @ 0xd0 │ │ str r6, [sp, #0] │ │ - bl 887dc │ │ + bl 88844 │ │ ldrb.w r1, [sp, #264] @ 0x108 │ │ cmp r1, #82 @ 0x52 │ │ - bne.w 86956 │ │ + bne.w 869be │ │ ldr r2, [r5, #40] @ 0x28 │ │ mov r6, r9 │ │ ldr r0, [sp, #220] @ 0xdc │ │ cmp r2, r0 │ │ - ble.w 85bfa │ │ + ble.w 85c62 │ │ str r5, [sp, #164] @ 0xa4 │ │ str.w fp, [sp, #212] @ 0xd4 │ │ ldrd lr, r9, [r5, #24] │ │ cmp.w r9, #0 │ │ - beq.w 8697a │ │ + beq.w 869e2 │ │ add.w r5, lr, #1 │ │ sub.w r6, r9, #1 │ │ mov r0, lr │ │ mov.w lr, #0 │ │ mov.w sl, #0 │ │ mov.w r8, #0 │ │ str r2, [sp, #224] @ 0xe0 │ │ ldrb.w fp, [r5, #-1] │ │ cmp.w r8, #63 @ 0x3f │ │ - bne.n 85dfe │ │ + bne.n 85e66 │ │ cmp.w fp, #1 │ │ - bhi.w 86912 │ │ + bhi.w 8697a │ │ and.w r2, r8, #63 @ 0x3f │ │ and.w r1, fp, #127 @ 0x7f │ │ rsb ip, r2, #32 │ │ subs.w r3, r2, #32 │ │ lsr.w r4, r1, ip │ │ it pl │ │ lslpl.w r4, r1, r3 │ │ lsl.w r1, r1, r2 │ │ it pl │ │ movpl r1, #0 │ │ orr.w lr, lr, r1 │ │ orr.w sl, sl, r4 │ │ sxtb.w r1, fp │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ - bgt.n 85e42 │ │ + bgt.n 85eaa │ │ subs r6, #1 │ │ adds r5, #1 │ │ add.w r8, r8, #7 │ │ adds r1, r6, #1 │ │ - bne.n 85dec │ │ - b.w 86920 │ │ + bne.n 85e54 │ │ + b.w 86988 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ orrs.w r1, lr, sl │ │ ldr.w fp, [sp, #212] @ 0xd4 │ │ strd r5, r6, [r0, #24] │ │ - beq.n 85f22 │ │ + beq.n 85f8a │ │ ldr r1, [r0, #36] @ 0x24 │ │ cmp.w sl, #0 │ │ - bne.n 85e6e │ │ + bne.n 85ed6 │ │ ldr r3, [r1, #8] │ │ sub.w r2, lr, #1 │ │ cmp r2, r3 │ │ - bcs.n 85e6e │ │ + bcs.n 85ed6 │ │ movs r3, #104 @ 0x68 │ │ ldr r1, [r1, #4] │ │ mla r6, r2, r3, r1 │ │ - b.n 85ee4 │ │ + b.n 85f4c │ │ ldr.w r9, [r1, #12] │ │ cmp.w r9, #0 │ │ - beq.w 86980 │ │ + beq.w 869e8 │ │ ldr.w ip, [r1, #16] │ │ ldrh.w r8, [r9, #1238] @ 0x4d6 │ │ mov.w r6, #4294967295 @ 0xffffffff │ │ mov r1, r9 │ │ mov.w r3, r8, lsl #3 │ │ - cbz r3, 85ec2 │ │ + cbz r3, 85f2a │ │ ldrd r2, r4, [r1], #8 │ │ subs r3, #8 │ │ adds r6, #1 │ │ subs.w r5, lr, r2 │ │ sbcs.w r5, sl, r4 │ │ mov.w r5, #0 │ │ it cc │ │ @@ -141506,102 +141419,102 @@ │ │ subs.w r2, r2, lr │ │ sbcs.w r2, r4, sl │ │ mov.w r2, #0 │ │ it cc │ │ movcc r2, #1 │ │ subs r2, r2, r5 │ │ cmp r2, #1 │ │ - beq.n 85e8c │ │ + beq.n 85ef4 │ │ uxtb r1, r2 │ │ - cbnz r1, 85ec4 │ │ - b.n 85eda │ │ + cbnz r1, 85f2c │ │ + b.n 85f42 │ │ mov r6, r8 │ │ cmp.w ip, #0 │ │ - beq.w 86980 │ │ + beq.w 869e8 │ │ add.w r1, r9, r6, lsl #2 │ │ sub.w ip, ip, #1 │ │ ldr.w r9, [r1, #1240] @ 0x4d8 │ │ - b.n 85e7e │ │ + b.n 85ee6 │ │ movs r1, #104 @ 0x68 │ │ mla r1, r6, r1, r9 │ │ add.w r6, r1, #88 @ 0x58 │ │ ldrb.w r0, [r6, #98] @ 0x62 │ │ ldr.w r9, [sp, #216] @ 0xd8 │ │ cmp r0, #1 │ │ ldr r0, [sp, #224] @ 0xe0 │ │ ldr r4, [sp, #164] @ 0xa4 │ │ itt eq │ │ addeq r0, #1 │ │ streq r0, [r4, #40] @ 0x28 │ │ mov r0, r6 │ │ - bl 422dc │ │ + bl 425e4 │ │ mov r3, r0 │ │ ldr r0, [r4, #32] │ │ mov r5, r4 │ │ ldr r2, [r0, #32] │ │ add r0, sp, #264 @ 0x108 │ │ str r1, [sp, #0] │ │ ldr r1, [sp, #208] @ 0xd0 │ │ - bl 887dc │ │ + bl 88844 │ │ ldrb.w r1, [sp, #264] @ 0x108 │ │ cmp r1, #82 @ 0x52 │ │ - bne.w 86956 │ │ + bne.w 869be │ │ str r6, [sp, #204] @ 0xcc │ │ mov r6, r9 │ │ ldr r2, [r5, #40] @ 0x28 │ │ - b.n 85f30 │ │ + b.n 85f98 │ │ ldr r2, [sp, #224] @ 0xe0 │ │ movs r1, #0 │ │ ldr r6, [sp, #216] @ 0xd8 │ │ mov r5, r0 │ │ subs r2, #1 │ │ str r2, [r0, #40] @ 0x28 │ │ str r1, [sp, #204] @ 0xcc │ │ ldr r1, [sp, #220] @ 0xdc │ │ cmp r2, r1 │ │ - bgt.w 85dc8 │ │ - b.n 85bfa │ │ + bgt.w 85e30 │ │ + b.n 85c62 │ │ ldr.w r4, [fp, #4] │ │ cmp r4, #6 │ │ - bcs.w 86998 │ │ + bcs.w 86a00 │ │ ldr.w r9, [sp, #216] @ 0xd8 │ │ add.w r3, fp, #8 │ │ ldr.w r8, [sp, #228] @ 0xe4 │ │ ldr.w r2, [lr, #32] │ │ add r0, sp, #264 @ 0x108 │ │ ldr r1, [sp, #208] @ 0xd0 │ │ str r4, [sp, #0] │ │ - bl 887dc │ │ + bl 88844 │ │ ldrb.w r0, [sp, #264] @ 0x108 │ │ cmp r0, #82 @ 0x52 │ │ - bne.w 8696a │ │ + bne.w 869d2 │ │ mov r6, r9 │ │ - b.n 85bfa │ │ + b.n 85c62 │ │ ldrd r0, r9, [r5, #44] @ 0x2c │ │ str r0, [sp, #136] @ 0x88 │ │ ldr r0, [sp, #204] @ 0xcc │ │ ldr.w r1, [fp] │ │ cmp r0, #8 │ │ mov.w r0, #4 │ │ it eq │ │ moveq r0, #12 │ │ cmp r1, #1 │ │ - bne.n 85f90 │ │ + bne.n 85ff8 │ │ ldrd r4, ip, [fp, #8] │ │ ldr.w lr, [sp, #160] @ 0xa0 │ │ - b.n 85fa4 │ │ + b.n 8600c │ │ ldr.w ip, [fp, #4] │ │ ldr.w lr, [sp, #160] @ 0xa0 │ │ cmp.w ip, #6 │ │ - bcs.w 869b4 │ │ + bcs.w 86a1c │ │ add.w r4, fp, #8 │ │ cmp.w ip, #0 │ │ str r5, [sp, #164] @ 0xa4 │ │ str r0, [sp, #96] @ 0x60 │ │ - beq.w 86582 │ │ + beq.w 865ea │ │ movs r0, #0 │ │ mov.w r8, ip, lsl #4 │ │ str r0, [sp, #140] @ 0x8c │ │ movs r0, #0 │ │ strd r0, r0, [sp, #124] @ 0x7c │ │ movs r0, #0 │ │ strd r0, r0, [sp, #108] @ 0x6c │ │ @@ -141615,27 +141528,27 @@ │ │ ldr r5, [r4, #12] │ │ stmia r0!, {r1, r3, r6} │ │ add r0, sp, #264 @ 0x108 │ │ add r3, sp, #304 @ 0x130 │ │ ldr r1, [sp, #208] @ 0xd0 │ │ str.w lr, [sp, #160] @ 0xa0 │ │ str r5, [sp, #316] @ 0x13c │ │ - bl 84988 │ │ + bl 849f0 │ │ ldrd r0, r1, [sp, #264] @ 0x108 │ │ eor.w r2, r0, #46 @ 0x2e │ │ orrs r1, r2 │ │ - beq.w 86670 │ │ + beq.w 866d8 │ │ ldrh.w r1, [sp, #280] @ 0x118 │ │ str.w r8, [sp, #204] @ 0xcc │ │ str r4, [sp, #144] @ 0x90 │ │ subs r2, r1, #3 │ │ ldrd r4, ip, [sp, #148] @ 0x94 │ │ cmp r2, #86 @ 0x56 │ │ ldrd r8, lr, [sp, #156] @ 0x9c │ │ - bhi.w 8610e │ │ + bhi.w 86176 │ │ ldr r5, [sp, #164] @ 0xa4 │ │ ldr r3, [sp, #204] @ 0xcc │ │ tbh [pc, r2, lsl #1] │ │ lsls r5, r4, #5 │ │ lsls r0, r5, #10 │ │ lsls r0, r5, #10 │ │ lsls r0, r5, #10 │ │ @@ -141720,223 +141633,223 @@ │ │ lsls r4, r1, #6 │ │ lsls r0, r5, #10 │ │ lsls r6, r7, #4 │ │ lsls r3, r1, #5 │ │ lsls r2, r4, #2 │ │ ldr r0, [sp, #140] @ 0x8c │ │ cmp r0, #0 │ │ - bne.w 86568 │ │ + bne.w 865d0 │ │ add r0, sp, #304 @ 0x130 │ │ add r1, sp, #264 @ 0x108 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldrb.w r1, [r5, #56] @ 0x38 │ │ ldr r0, [sp, #312] @ 0x138 │ │ ldrd r2, r3, [sp, #304] @ 0x130 │ │ strd r0, r1, [sp] │ │ ldr r0, [sp, #136] @ 0x88 │ │ strd r0, r9, [sp, #8] │ │ movs r0, #16 │ │ str r0, [sp, #20] │ │ add r0, sp, #248 @ 0xf8 │ │ ldr r6, [r5, #52] @ 0x34 │ │ str r6, [sp, #16] │ │ - bl 87016 │ │ + bl 8707e │ │ ldrb.w r0, [sp, #248] @ 0xf8 │ │ cmp r0, #82 @ 0x52 │ │ - bne.w 867dc │ │ + bne.w 86844 │ │ ldr r0, [sp, #252] @ 0xfc │ │ str r0, [sp, #140] @ 0x8c │ │ ldr r0, [sp, #256] @ 0x100 │ │ str r0, [sp, #132] @ 0x84 │ │ - b.n 8637c │ │ + b.n 863e4 │ │ cmp r1, #110 @ 0x6e │ │ itt ne │ │ movwne r0, #8199 @ 0x2007 │ │ cmpne r1, r0 │ │ - bne.w 8636c │ │ + bne.w 863d4 │ │ add r4, sp, #304 @ 0x130 │ │ add r1, sp, #264 @ 0x108 │ │ mov r0, r4 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldr.w r3, [r9, #260] @ 0x104 │ │ add r0, sp, #248 @ 0xf8 │ │ ldrb.w r2, [r9, #217] @ 0xd9 │ │ ldr r1, [sp, #136] @ 0x88 │ │ str r4, [sp, #0] │ │ - bl 82b38 │ │ + bl 82ba0 │ │ ldrb.w r0, [sp, #248] @ 0xf8 │ │ ldrd r8, lr, [sp, #156] @ 0x9c │ │ cmp r0, #82 @ 0x52 │ │ ldr r0, [sp, #140] @ 0x8c │ │ ldrd r4, ip, [sp, #148] @ 0x94 │ │ ldrd r2, r1, [sp, #252] @ 0xfc │ │ it eq │ │ moveq r0, r2 │ │ str r0, [sp, #140] @ 0x8c │ │ ldr r0, [sp, #132] @ 0x84 │ │ it eq │ │ moveq r0, r1 │ │ str r0, [sp, #132] @ 0x84 │ │ ldr r5, [sp, #164] @ 0xa4 │ │ - b.n 86568 │ │ + b.n 865d0 │ │ and.w r0, r0, #63 @ 0x3f │ │ subs r0, #2 │ │ cmp r0, #5 │ │ - bhi.w 86476 │ │ + bhi.w 864de │ │ tbh [pc, r0, lsl #1] │ │ lsls r0, r5, #5 │ │ lsls r4, r5, #5 │ │ movs r6, r0 │ │ movs r6, r0 │ │ lsls r7, r6, #5 │ │ movs r6, r0 │ │ ldr r0, [sp, #272] @ 0x110 │ │ str r0, [sp, #124] @ 0x7c │ │ - b.n 86568 │ │ + b.n 865d0 │ │ add r0, sp, #304 @ 0x130 │ │ add r1, sp, #264 @ 0x108 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldr r0, [sp, #304] @ 0x130 │ │ lsls r1, r0, #26 │ │ - beq.w 8641c │ │ + beq.w 86484 │ │ ldr r5, [sp, #164] @ 0xa4 │ │ cmp r0, #7 │ │ ldr r4, [sp, #148] @ 0x94 │ │ ldrd r8, lr, [sp, #156] @ 0x9c │ │ - beq.w 8640a │ │ + beq.w 86472 │ │ ldr.w ip, [sp, #152] @ 0x98 │ │ cmp r0, #12 │ │ - bne.w 86568 │ │ + bne.w 865d0 │ │ ldr r0, [sp, #136] @ 0x88 │ │ ldrd r1, r2, [r0, #8] │ │ ldr.w r0, [r9, #264] @ 0x108 │ │ cmp r2, r0 │ │ - bcc.w 8685a │ │ + bcc.w 868c2 │ │ str.w r9, [sp, #52] @ 0x34 │ │ ldrb.w r9, [r9, #216] @ 0xd8 │ │ ldr r3, [sp, #312] @ 0x138 │ │ umull r3, r6, r3, r9 │ │ cmp r6, #0 │ │ - bne.w 8686a │ │ + bne.w 868d2 │ │ adds r6, r1, r0 │ │ subs r1, r2, r0 │ │ cmp r1, r3 │ │ - bcc.w 86874 │ │ + bcc.w 868dc │ │ sub.w r0, r9, #1 │ │ mov.w ip, #25 │ │ cmp r0, #7 │ │ - bhi.w 86892 │ │ + bhi.w 868fa │ │ add r6, r3 │ │ subs r4, r1, r3 │ │ tbh [pc, r0, lsl #1] │ │ movs r0, r1 │ │ lsls r0, r0, #6 │ │ lsls r3, r2, #13 │ │ lsls r4, r5, #6 │ │ lsls r3, r2, #13 │ │ lsls r3, r2, #13 │ │ lsls r3, r2, #13 │ │ lsls r1, r2, #6 │ │ ldr r4, [sp, #148] @ 0x94 │ │ cmp r1, r3 │ │ ldr.w r8, [sp, #156] @ 0x9c │ │ - beq.w 86882 │ │ + beq.w 868ea │ │ ldrb.w ip, [r6] │ │ movs r0, #0 │ │ - b.n 864fe │ │ + b.n 86566 │ │ add r0, sp, #304 @ 0x130 │ │ add r1, sp, #264 @ 0x108 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldr r0, [sp, #304] @ 0x130 │ │ lsls r1, r0, #26 │ │ - beq.w 86370 │ │ + beq.w 863d8 │ │ ldr.w lr, [sp, #60] @ 0x3c │ │ cmp r0, #12 │ │ ldr.w r8, [sp, #156] @ 0x9c │ │ - bne.w 863f0 │ │ + bne.w 86458 │ │ ldr r0, [sp, #136] @ 0x88 │ │ ldr.w r6, [r9, #264] @ 0x108 │ │ ldrd r1, r0, [r0, #8] │ │ ldr r5, [sp, #164] @ 0xa4 │ │ cmp r0, r6 │ │ - bcc.w 86808 │ │ + bcc.w 86870 │ │ ldrb.w r8, [r9, #216] @ 0xd8 │ │ ldr r2, [sp, #312] @ 0x138 │ │ umull r3, r2, r2, r8 │ │ cmp r2, #0 │ │ - bne.w 86818 │ │ + bne.w 86880 │ │ adds r2, r1, r6 │ │ subs r1, r0, r6 │ │ cmp r1, r3 │ │ - bcc.w 86822 │ │ + bcc.w 8688a │ │ sub.w r6, r8, #1 │ │ mov.w ip, #25 │ │ cmp r6, #7 │ │ - bhi.w 86840 │ │ + bhi.w 868a8 │ │ add r2, r3 │ │ subs r4, r1, r3 │ │ tbh [pc, r6, lsl #1] │ │ movs r0, r1 │ │ lsls r1, r1, #4 │ │ lsls r0, r5, #11 │ │ lsls r5, r5, #4 │ │ lsls r0, r5, #11 │ │ lsls r0, r5, #11 │ │ lsls r0, r5, #11 │ │ lsls r4, r2, #4 │ │ ldrd r4, ip, [sp, #148] @ 0x94 │ │ cmp r1, r3 │ │ ldr.w lr, [sp, #160] @ 0xa0 │ │ - beq.w 86830 │ │ + beq.w 86898 │ │ movs r0, #0 │ │ str r0, [sp, #76] @ 0x4c │ │ ldrb r0, [r2, #0] │ │ - b.n 864de │ │ + b.n 86546 │ │ and.w r0, r0, #63 @ 0x3f │ │ subs r0, #2 │ │ cmp r0, #5 │ │ - bhi.w 8647c │ │ + bhi.w 864e4 │ │ tbb [pc, r0] │ │ - b.n 85e6e │ │ + b.n 85ed6 │ │ lsls r3, r0, #12 │ │ lsls r4, r2, #15 │ │ ldr r0, [sp, #272] @ 0x110 │ │ - b.n 8647e │ │ + b.n 864e6 │ │ add r0, sp, #304 @ 0x130 │ │ add r1, sp, #264 @ 0x108 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldrd r0, r1, [sp, #304] @ 0x130 │ │ eor.w r0, r0, #44 @ 0x2c │ │ orrs r0, r1 │ │ - bne.n 8637c │ │ + bne.n 863e4 │ │ ldrd r0, r1, [sp, #312] @ 0x138 │ │ orrs.w r2, r0, r1 │ │ - bne.n 862d6 │ │ + bne.n 8633e │ │ ldrh.w r2, [r9, #218] @ 0xda │ │ cmp r2, #5 │ │ - bcc.n 8637c │ │ + bcc.n 863e4 │ │ movs r2, #0 │ │ strd r1, r0, [sp, #80] @ 0x50 │ │ str r2, [sp, #112] @ 0x70 │ │ movs r2, #1 │ │ str r2, [sp, #108] @ 0x6c │ │ - b.n 8637c │ │ + b.n 863e4 │ │ ldr r0, [sp, #140] @ 0x8c │ │ cmp r0, #0 │ │ - bne.w 86568 │ │ + bne.w 865d0 │ │ add r4, sp, #304 @ 0x130 │ │ add r1, sp, #264 @ 0x108 │ │ mov r0, r4 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldr.w r3, [r9, #260] @ 0x104 │ │ add r0, sp, #248 @ 0xf8 │ │ ldrb.w r2, [r9, #217] @ 0xd9 │ │ ldr r1, [sp, #136] @ 0x88 │ │ str r4, [sp, #0] │ │ - bl 82b38 │ │ + bl 82ba0 │ │ ldrb.w r0, [sp, #248] @ 0xf8 │ │ ldrd r2, r1, [sp, #252] @ 0xfc │ │ cmp r0, #82 @ 0x52 │ │ mov.w r0, #0 │ │ ldrd r8, lr, [sp, #156] @ 0x9c │ │ ldrd r4, ip, [sp, #148] @ 0x94 │ │ ldr r5, [sp, #164] @ 0xa4 │ │ @@ -141944,217 +141857,217 @@ │ │ movne r2, r0 │ │ ldr r0, [sp, #64] @ 0x40 │ │ str r2, [sp, #140] @ 0x8c │ │ it eq │ │ moveq r0, r1 │ │ str r0, [sp, #64] @ 0x40 │ │ str r0, [sp, #132] @ 0x84 │ │ - b.n 86568 │ │ + b.n 865d0 │ │ add r0, sp, #304 @ 0x130 │ │ add r1, sp, #264 @ 0x108 │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldr r0, [sp, #304] @ 0x130 │ │ ldr r1, [sp, #312] @ 0x138 │ │ and.w r2, r0, #63 @ 0x3f │ │ cmp r2, #24 │ │ - beq.n 8638a │ │ + beq.n 863f2 │ │ cmp r0, #22 │ │ - bne.n 863fa │ │ + bne.n 86462 │ │ ldrh.w r2, [r9, #218] @ 0xda │ │ ldr r3, [sp, #136] @ 0x88 │ │ ldr.w r0, [r9, #272] @ 0x110 │ │ uxth r2, r2 │ │ cmp r2, #5 │ │ ldrb.w r3, [r3, #136] @ 0x88 │ │ mov r2, r1 │ │ it cc │ │ addcc r2, r0 │ │ movs r0, #1 │ │ cmp r3, #0 │ │ it eq │ │ moveq r2, r1 │ │ - b.n 863fe │ │ + b.n 86466 │ │ ldr r5, [sp, #164] @ 0xa4 │ │ - b.n 86568 │ │ + b.n 865d0 │ │ ldr r0, [sp, #312] @ 0x138 │ │ str r0, [sp, #72] @ 0x48 │ │ ldr r0, [sp, #316] @ 0x13c │ │ str r0, [sp, #76] @ 0x4c │ │ movs r0, #1 │ │ str r0, [sp, #104] @ 0x68 │ │ ldr r5, [sp, #164] @ 0xa4 │ │ ldr.w ip, [sp, #152] @ 0x98 │ │ ldr r4, [sp, #148] @ 0x94 │ │ ldrd r8, lr, [sp, #156] @ 0x9c │ │ - b.n 86568 │ │ + b.n 865d0 │ │ ldr r0, [sp, #136] @ 0x88 │ │ ldrd r4, r3, [r0, #112] @ 0x70 │ │ ldr.w r0, [r9, #272] @ 0x110 │ │ cmp r3, r0 │ │ - bcc.w 867d8 │ │ + bcc.w 86840 │ │ ldr.w r2, [r9, #216] @ 0xd8 │ │ ldrd ip, r8, [sp, #152] @ 0x98 │ │ ldrd lr, r5, [sp, #160] @ 0xa0 │ │ ubfx r6, r2, #8, #8 │ │ umull r1, r6, r1, r6 │ │ cmp r6, #0 │ │ - bne.w 867f6 │ │ + bne.w 8685e │ │ subs r3, r3, r0 │ │ add r4, r0 │ │ cmp r3, r1 │ │ - bcc.w 867d8 │ │ + bcc.w 86840 │ │ add r4, r1 │ │ subs r1, r3, r1 │ │ and.w r2, r2, #65280 @ 0xff00 │ │ cmp.w r2, #2048 @ 0x800 │ │ - bne.n 8642a │ │ + bne.n 86492 │ │ cmp r1, #8 │ │ - bcc.w 867d8 │ │ + bcc.w 86840 │ │ ldrb r2, [r4, #7] │ │ ldr.w r1, [r4, #3] │ │ lsls r2, r2, #24 │ │ orrs.w r2, r2, r1, lsr #8 │ │ - bne.w 867f6 │ │ + bne.w 8685e │ │ ldrb r2, [r4, #2] │ │ lsls r1, r1, #24 │ │ ldrh r3, [r4, #0] │ │ orr.w r2, r3, r2, lsl #16 │ │ orrs r1, r2 │ │ - b.n 86432 │ │ + b.n 8649a │ │ ldrd r4, ip, [sp, #148] @ 0x94 │ │ ldrd lr, r5, [sp, #160] @ 0xa0 │ │ - b.n 86568 │ │ + b.n 865d0 │ │ ldr r2, [sp, #148] @ 0x94 │ │ movs r0, #0 │ │ str r0, [sp, #120] @ 0x78 │ │ ldrd ip, r8, [sp, #152] @ 0x98 │ │ ldrd lr, r5, [sp, #160] @ 0xa0 │ │ - b.n 86438 │ │ + b.n 864a0 │ │ ldr r0, [sp, #312] @ 0x138 │ │ str r0, [sp, #44] @ 0x2c │ │ ldr r0, [sp, #316] @ 0x13c │ │ str r0, [sp, #40] @ 0x28 │ │ movs r0, #1 │ │ str r0, [sp, #92] @ 0x5c │ │ ldr.w ip, [sp, #152] @ 0x98 │ │ - b.n 86568 │ │ + b.n 865d0 │ │ ldrd ip, r0, [sp, #312] @ 0x138 │ │ ldr r5, [sp, #164] @ 0xa4 │ │ str r0, [sp, #68] @ 0x44 │ │ movs r0, #1 │ │ str r0, [sp, #100] @ 0x64 │ │ - b.n 86382 │ │ + b.n 863ea │ │ cmp r1, #4 │ │ - bcc.w 867d8 │ │ + bcc.w 86840 │ │ ldr r1, [r4, #0] │ │ adds r2, r1, r0 │ │ movs r0, #1 │ │ str r0, [sp, #120] @ 0x78 │ │ str r2, [sp, #88] @ 0x58 │ │ mov r4, r2 │ │ - b.n 86568 │ │ + b.n 865d0 │ │ ldrb.w r0, [sp, #272] @ 0x110 │ │ str r0, [sp, #124] @ 0x7c │ │ - b.n 86568 │ │ + b.n 865d0 │ │ ldrh.w r0, [sp, #272] @ 0x110 │ │ str r0, [sp, #124] @ 0x7c │ │ - b.n 86568 │ │ + b.n 865d0 │ │ ldrd r1, r0, [sp, #272] @ 0x110 │ │ cmp r0, #0 │ │ it mi │ │ movmi r1, #0 │ │ str r1, [sp, #128] @ 0x80 │ │ - b.n 86568 │ │ + b.n 865d0 │ │ ldrd r1, r0, [sp, #272] @ 0x110 │ │ cmp r0, #0 │ │ it mi │ │ movmi r1, #0 │ │ str r1, [sp, #124] @ 0x7c │ │ - b.n 86568 │ │ + b.n 865d0 │ │ ldrb.w r0, [sp, #272] @ 0x110 │ │ - b.n 8647e │ │ + b.n 864e6 │ │ ldrh.w r0, [sp, #272] @ 0x110 │ │ - b.n 8647e │ │ + b.n 864e6 │ │ movs r0, #0 │ │ str r0, [sp, #124] @ 0x7c │ │ - b.n 86568 │ │ + b.n 865d0 │ │ movs r0, #0 │ │ str r0, [sp, #128] @ 0x80 │ │ - b.n 86568 │ │ + b.n 865d0 │ │ cmp r4, #2 │ │ ldrd r4, ip, [sp, #148] @ 0x94 │ │ ldr.w lr, [sp, #160] @ 0xa0 │ │ - bcc.w 86830 │ │ + bcc.w 86898 │ │ movs r0, #0 │ │ str r0, [sp, #76] @ 0x4c │ │ ldrh r0, [r2, #0] │ │ - b.n 864de │ │ + b.n 86546 │ │ cmp r4, #7 │ │ ldrd r4, ip, [sp, #148] @ 0x94 │ │ ldr.w lr, [sp, #160] @ 0xa0 │ │ - bls.w 86830 │ │ + bls.w 86898 │ │ ldr.w r0, [r2, #3] │ │ ldrb r1, [r2, #7] │ │ ldrb r3, [r2, #2] │ │ ldrh r2, [r2, #0] │ │ lsrs r6, r0, #8 │ │ orr.w r8, r6, r1, lsl #24 │ │ orr.w r1, r2, r3, lsl #16 │ │ orr.w r0, r1, r0, lsl #24 │ │ movs r1, #1 │ │ str r1, [sp, #104] @ 0x68 │ │ str r0, [sp, #48] @ 0x30 │ │ strd r0, r8, [sp, #72] @ 0x48 │ │ - b.n 86568 │ │ + b.n 865d0 │ │ cmp r4, #4 │ │ ldrd r4, ip, [sp, #148] @ 0x94 │ │ ldr.w lr, [sp, #160] @ 0xa0 │ │ - bcc.w 86830 │ │ + bcc.w 86898 │ │ movs r0, #0 │ │ str r0, [sp, #76] @ 0x4c │ │ ldr r0, [r2, #0] │ │ movs r1, #1 │ │ str r0, [sp, #72] @ 0x48 │ │ str r1, [sp, #104] @ 0x68 │ │ mov.w r8, #0 │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n 86568 │ │ + b.n 865d0 │ │ cmp r4, #2 │ │ ldr r4, [sp, #148] @ 0x94 │ │ ldr.w r8, [sp, #156] @ 0x9c │ │ - bcc.w 86882 │ │ + bcc.w 868ea │ │ movs r0, #0 │ │ ldrh.w ip, [r6] │ │ str r0, [sp, #68] @ 0x44 │ │ movs r0, #1 │ │ str.w ip, [sp, #36] @ 0x24 │ │ str r0, [sp, #100] @ 0x64 │ │ mov.w lr, #0 │ │ - b.n 86564 │ │ + b.n 865cc │ │ cmp r4, #7 │ │ ldr r4, [sp, #148] @ 0x94 │ │ ldr.w r8, [sp, #156] @ 0x9c │ │ - bls.w 86882 │ │ + bls.w 868ea │ │ ldr.w r0, [r6, #3] │ │ ldrb r1, [r6, #7] │ │ ldrb r2, [r6, #2] │ │ ldrh r3, [r6, #0] │ │ lsrs r6, r0, #8 │ │ orr.w lr, r6, r1, lsl #24 │ │ str.w lr, [sp, #68] @ 0x44 │ │ orr.w r1, r3, r2, lsl #16 │ │ ldr.w r9, [sp, #52] @ 0x34 │ │ orr.w ip, r1, r0, lsl #24 │ │ movs r0, #1 │ │ str r0, [sp, #100] @ 0x64 │ │ str.w ip, [sp, #36] @ 0x24 │ │ - b.n 86568 │ │ + b.n 865d0 │ │ ldr.w r8, [sp, #156] @ 0x9c │ │ cmp r4, #4 │ │ - bcc.w 86882 │ │ + bcc.w 868ea │ │ movs r0, #0 │ │ ldr.w ip, [r6] │ │ str r0, [sp, #68] @ 0x44 │ │ movs r0, #1 │ │ str r0, [sp, #100] @ 0x64 │ │ mov.w lr, #0 │ │ str.w ip, [sp, #36] @ 0x24 │ │ @@ -142162,16 +142075,16 @@ │ │ ldr.w r9, [sp, #52] @ 0x34 │ │ ldr r3, [sp, #204] @ 0xcc │ │ strd r4, ip, [sp, #148] @ 0x94 │ │ ldr r4, [sp, #144] @ 0x90 │ │ str.w r8, [sp, #156] @ 0x9c │ │ subs.w r8, r3, #16 │ │ add.w r4, r4, #16 │ │ - bne.w 85fcc │ │ - b.n 8659a │ │ + bne.w 86034 │ │ + b.n 86602 │ │ movs r0, #0 │ │ strd r0, r0, [sp, #100] @ 0x64 │ │ str r0, [sp, #92] @ 0x5c │ │ str r0, [sp, #120] @ 0x78 │ │ strd r0, r0, [sp, #108] @ 0x6c │ │ movs r0, #0 │ │ strd r0, r0, [sp, #124] @ 0x7c │ │ @@ -142183,15 +142096,15 @@ │ │ ldr.w r8, [r5, #8] │ │ add r0, r1 │ │ ldrd r2, r1, [sp, #196] @ 0xc4 │ │ add r1, r2 │ │ subs r4, r0, r1 │ │ ldr r0, [r5, #0] │ │ cmp r8, r0 │ │ - beq.w 867c8 │ │ + beq.w 86830 │ │ ldr r0, [r5, #4] │ │ add.w r1, r8, r8, lsl #2 │ │ ldr r2, [sp, #108] @ 0x6c │ │ str.w lr, [sp, #160] @ 0xa0 │ │ str.w r2, [r0, r1, lsl #3] │ │ add.w r0, r0, r1, lsl #3 │ │ add.w r2, r8, #1 │ │ @@ -142208,15 +142121,15 @@ │ │ strd r1, r4, [r0, #20] │ │ ldr r1, [sp, #124] @ 0x7c │ │ str r1, [r0, #28] │ │ ldr r1, [sp, #128] @ 0x80 │ │ str r1, [r0, #32] │ │ ldr r0, [sp, #120] @ 0x78 │ │ lsls r0, r0, #31 │ │ - beq.n 8662e │ │ + beq.n 86696 │ │ ldr.w ip, [r9, #216] @ 0xd8 │ │ movs r2, #4 │ │ mov r4, r9 │ │ mov.w r0, ip, lsr #16 │ │ cmp r0, #4 │ │ it hi │ │ movhi r2, #12 │ │ @@ -142224,53 +142137,53 @@ │ │ add.w r3, r1, #104 @ 0x68 │ │ ldr r2, [r3, r2] │ │ it hi │ │ addhi.w r3, r1, #112 @ 0x70 │ │ ldr r6, [sp, #88] @ 0x58 │ │ ldr.w r9, [r3] │ │ cmp r2, r6 │ │ - bcs.n 8667e │ │ + bcs.n 866e6 │ │ ldr r6, [sp, #216] @ 0xd8 │ │ movs r1, #0 │ │ ldr r5, [sp, #56] @ 0x38 │ │ mov.w sl, #19 │ │ movs r3, #0 │ │ movs r4, #0 │ │ - b.n 8679c │ │ + b.n 86804 │ │ ldrd r0, r1, [sp, #100] @ 0x64 │ │ ldr r3, [sp, #152] @ 0x98 │ │ ands r0, r1 │ │ lsls r0, r0, #31 │ │ - beq.n 8671e │ │ + beq.n 86786 │ │ ldr r2, [sp, #72] @ 0x48 │ │ ldr r1, [sp, #68] @ 0x44 │ │ subs r0, r2, r3 │ │ ldr r0, [sp, #76] @ 0x4c │ │ sbcs r0, r1 │ │ - bcs.w 86776 │ │ + bcs.w 867de │ │ ldr r4, [r5, #20] │ │ ldr r0, [r5, #12] │ │ cmp r4, r0 │ │ - beq.w 868b6 │ │ + beq.w 8691e │ │ ldr r0, [r5, #16] │ │ add.w r1, r4, r4, lsl #1 │ │ str.w r2, [r0, r1, lsl #3] │ │ add.w r0, r0, r1, lsl #3 │ │ adds r2, r4, #1 │ │ ldr r1, [sp, #76] @ 0x4c │ │ str r2, [r5, #20] │ │ strd r1, r3, [r0, #4] │ │ ldr r1, [sp, #68] @ 0x44 │ │ str r1, [r0, #12] │ │ - b.n 86760 │ │ + b.n 867c8 │ │ ldr r3, [sp, #180] @ 0xb4 │ │ add.w ip, sp, #232 @ 0xe8 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w ip, {r0, r1, r2, r3} │ │ - b.n 86782 │ │ + b.n 867ea │ │ ldr r3, [sp, #176] @ 0xb0 │ │ movs r5, #0 │ │ ldrd r1, lr, [r1, #8] │ │ subs r2, r2, r6 │ │ str r1, [sp, #224] @ 0xe0 │ │ movs r1, #0 │ │ strb r5, [r3, #2] │ │ @@ -142288,177 +142201,177 @@ │ │ ldr r0, [sp, #224] @ 0xe0 │ │ strb.w r1, [sp, #296] @ 0x128 │ │ strd lr, r3, [sp, #276] @ 0x114 │ │ str r0, [sp, #272] @ 0x110 │ │ strd sl, r5, [sp, #264] @ 0x108 │ │ add r0, sp, #304 @ 0x130 │ │ add r1, sp, #264 @ 0x108 │ │ - bl 88e20 │ │ + bl 88e4c │ │ add.w sl, sp, #304 @ 0x130 │ │ ldr r4, [sp, #324] @ 0x144 │ │ ldrd r5, r9, [sp, #316] @ 0x13c │ │ ldmia.w sl, {r0, r1, sl} │ │ eor.w r2, r0, #2 │ │ orrs r1, r2 │ │ - beq.n 8676a │ │ + beq.n 867d2 │ │ lsls r0, r0, #31 │ │ - beq.n 86774 │ │ + beq.n 867dc │ │ subs.w r0, sl, r9 │ │ sbcs.w r0, r5, r4 │ │ - bcs.n 866be │ │ + bcs.n 86726 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ ldr r6, [r0, #20] │ │ ldr r1, [r0, #12] │ │ cmp r6, r1 │ │ - beq.n 86714 │ │ + beq.n 8677c │ │ ldr r1, [r0, #16] │ │ add.w r2, r6, r6, lsl #1 │ │ adds r3, r6, #1 │ │ str.w sl, [r1, r2, lsl #3] │ │ add.w r1, r1, r2, lsl #3 │ │ str r3, [r0, #20] │ │ ldr r0, [sp, #188] @ 0xbc │ │ strd r5, r9, [r1, #4] │ │ str r4, [r1, #12] │ │ strd r0, r8, [r1, #16] │ │ - b.n 866be │ │ + b.n 86726 │ │ adds r0, #12 │ │ - bl 827d8 │ │ + bl 82840 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ - b.n 866f4 │ │ + b.n 8675c │ │ ldr r0, [sp, #92] @ 0x5c │ │ ands r0, r1 │ │ ldr r1, [sp, #76] @ 0x4c │ │ lsls r0, r0, #31 │ │ - beq.n 86776 │ │ + beq.n 867de │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldr r2, [sp, #72] @ 0x48 │ │ adds r4, r0, r2 │ │ ldr r0, [sp, #40] @ 0x28 │ │ adc.w r9, r0, r1 │ │ subs r0, r2, r4 │ │ sbcs.w r0, r1, r9 │ │ - bcs.n 86776 │ │ + bcs.n 867de │ │ ldr r6, [r5, #20] │ │ ldr r0, [r5, #12] │ │ cmp r6, r0 │ │ - beq.w 868c4 │ │ + beq.w 8692c │ │ ldr r0, [r5, #16] │ │ add.w r1, r6, r6, lsl #1 │ │ str.w r2, [r0, r1, lsl #3] │ │ adds r2, r6, #1 │ │ add.w r0, r0, r1, lsl #3 │ │ ldr r1, [sp, #76] @ 0x4c │ │ str r2, [r5, #20] │ │ adds r2, r0, #4 │ │ stmia.w r2, {r1, r4, r9} │ │ ldr r1, [sp, #188] @ 0xbc │ │ str r1, [r0, #16] │ │ str.w r8, [r0, #20] │ │ - b.n 86776 │ │ + b.n 867de │ │ uxtb.w r0, sl │ │ cmp r0, #82 @ 0x52 │ │ - bne.n 8678a │ │ + bne.n 867f2 │ │ str r5, [sp, #56] @ 0x38 │ │ ldr r5, [sp, #164] @ 0xa4 │ │ ldr r2, [sp, #220] @ 0xdc │ │ add r0, sp, #232 @ 0xe8 │ │ ldr r3, [sp, #184] @ 0xb8 │ │ mov r1, r5 │ │ - bl 85bc4 │ │ + bl 85c2c │ │ ldr.w r8, [sp, #116] @ 0x74 │ │ ldr r6, [sp, #216] @ 0xd8 │ │ - b.n 867b4 │ │ + b.n 8681c │ │ mov.w r0, sl, lsr #16 │ │ orr.w r1, r0, r5, lsl #16 │ │ mov.w r0, sl, lsr #8 │ │ orr.w r3, r0, r5, lsl #24 │ │ ldr r6, [sp, #216] @ 0xd8 │ │ ldr.w r8, [sp, #116] @ 0x74 │ │ str r4, [sp, #244] @ 0xf4 │ │ str r5, [sp, #56] @ 0x38 │ │ strd r5, r9, [sp, #236] @ 0xec │ │ strh.w r1, [sp, #234] @ 0xea │ │ strb.w r3, [sp, #233] @ 0xe9 │ │ strb.w sl, [sp, #232] @ 0xe8 │ │ ldrb.w r1, [sp, #232] @ 0xe8 │ │ cmp r1, #82 @ 0x52 │ │ - bne.w 8698a │ │ + bne.w 869f2 │ │ str.w r8, [sp, #116] @ 0x74 │ │ ldr r5, [sp, #164] @ 0xa4 │ │ - b.w 85bfa │ │ + b.w 85c62 │ │ mov r0, r5 │ │ mov r6, r9 │ │ mov r9, lr │ │ - bl 88de2 │ │ + bl 89ff0 │ │ mov lr, r9 │ │ mov r9, r6 │ │ - b.n 865b6 │ │ + b.n 8661e │ │ movs r0, #19 │ │ - b.n 867f8 │ │ + b.n 86860 │ │ add r6, sp, #252 @ 0xfc │ │ ldr r5, [sp, #168] @ 0xa8 │ │ ldr r4, [sp, #172] @ 0xac │ │ ldmia r6, {r2, r3, r6} │ │ ldrh r1, [r5, #0] │ │ ldrb r5, [r5, #2] │ │ strh r1, [r4, #0] │ │ add r1, sp, #236 @ 0xec │ │ strb r5, [r4, #2] │ │ stmia r1!, {r2, r3, r6} │ │ strb.w r0, [sp, #232] @ 0xe8 │ │ - b.n 86782 │ │ + b.n 867ea │ │ movs r0, #56 @ 0x38 │ │ movs r1, #0 │ │ str r4, [sp, #148] @ 0x94 │ │ str r1, [sp, #244] @ 0xf4 │ │ strd r4, r4, [sp, #236] @ 0xec │ │ strb.w r0, [sp, #232] @ 0xe8 │ │ - b.n 86782 │ │ + b.n 867ea │ │ movs r0, #0 │ │ mov.w ip, #19 │ │ str r0, [sp, #156] @ 0x9c │ │ ldr.w r8, [sp, #116] @ 0x74 │ │ str r1, [sp, #48] @ 0x30 │ │ - b.n 86840 │ │ + b.n 868a8 │ │ mov.w ip, #56 @ 0x38 │ │ ldr.w r8, [sp, #116] @ 0x74 │ │ - b.n 86840 │ │ + b.n 868a8 │ │ movs r0, #0 │ │ mov.w ip, #19 │ │ str r0, [sp, #156] @ 0x9c │ │ ldr.w r8, [sp, #116] @ 0x74 │ │ - b.n 8683e │ │ + b.n 868a6 │ │ ldr.w r8, [sp, #116] @ 0x74 │ │ movs r0, #0 │ │ mov.w ip, #19 │ │ mov lr, r2 │ │ str r0, [sp, #156] @ 0x9c │ │ str r2, [sp, #48] @ 0x30 │ │ ldr r0, [sp, #48] @ 0x30 │ │ str.w lr, [sp, #60] @ 0x3c │ │ strb.w r8, [sp, #233] @ 0xe9 │ │ strd lr, r0, [sp, #236] @ 0xec │ │ ldr r0, [sp, #156] @ 0x9c │ │ strb.w ip, [sp, #232] @ 0xe8 │ │ str r0, [sp, #244] @ 0xf4 │ │ ldr r6, [sp, #216] @ 0xd8 │ │ - b.n 867b4 │ │ + b.n 8681c │ │ mov.w lr, #0 │ │ mov.w ip, #19 │ │ ldr.w r9, [sp, #32] │ │ str r1, [sp, #36] @ 0x24 │ │ - b.n 86892 │ │ + b.n 868fa │ │ mov.w ip, #56 @ 0x38 │ │ ldr.w r9, [sp, #32] │ │ - b.n 86892 │ │ + b.n 868fa │ │ mov.w lr, #0 │ │ mov.w ip, #19 │ │ ldr.w r9, [sp, #32] │ │ - b.n 86890 │ │ + b.n 868f8 │ │ ldr.w r9, [sp, #32] │ │ mov.w lr, #0 │ │ mov.w ip, #19 │ │ str r6, [sp, #28] │ │ str r6, [sp, #36] @ 0x24 │ │ ldr r1, [sp, #36] @ 0x24 │ │ str r1, [sp, #240] @ 0xf0 │ │ @@ -142467,28 +142380,28 @@ │ │ strb.w r9, [sp, #233] @ 0xe9 │ │ strb.w ip, [sp, #232] @ 0xe8 │ │ str.w lr, [sp, #160] @ 0xa0 │ │ str.w lr, [sp, #244] @ 0xf4 │ │ ldr.w r8, [sp, #116] @ 0x74 │ │ str.w r9, [sp, #32] │ │ ldr r6, [sp, #216] @ 0xd8 │ │ - b.n 867b4 │ │ + b.n 8681c │ │ add.w r0, r5, #12 │ │ - bl 827d8 │ │ + bl 82840 │ │ ldr r3, [sp, #152] @ 0x98 │ │ ldr r2, [sp, #72] @ 0x48 │ │ - b.n 86652 │ │ + b.n 866ba │ │ add.w r0, r5, #12 │ │ - bl 827d8 │ │ + bl 82840 │ │ ldr r2, [sp, #72] @ 0x48 │ │ - b.n 86746 │ │ + b.n 867ae │ │ movs r1, #6 │ │ movs r5, #0 │ │ strd fp, sl, [r0, #24] │ │ - b.n 868ec │ │ + b.n 86954 │ │ ldr r4, [sp, #224] @ 0xe0 │ │ movs r1, #0 │ │ add r4, r8 │ │ strd r4, r1, [r0, #24] │ │ mov.w ip, #0 │ │ movs r1, #19 │ │ mov r2, r4 │ │ @@ -142503,20 +142416,20 @@ │ │ ldr r0, [sp, #228] @ 0xe4 │ │ movs r1, #82 @ 0x52 │ │ strb r1, [r0, #0] │ │ add sp, #332 @ 0x14c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r5, #0 │ │ - b.n 868e4 │ │ + b.n 8694c │ │ ldr r0, [sp, #164] @ 0xa4 │ │ movs r1, #6 │ │ mov.w fp, #0 │ │ strd r5, r6, [r0, #24] │ │ - b.n 86934 │ │ + b.n 8699c │ │ add.w lr, r0, r9 │ │ ldr r0, [sp, #164] @ 0xa4 │ │ movs r1, #0 │ │ strd lr, r1, [r0, #24] │ │ mov.w sl, #0 │ │ movs r1, #19 │ │ mov r3, lr │ │ @@ -142528,73 +142441,73 @@ │ │ str.w sl, [r0, #12] │ │ add sp, #332 @ 0x14c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r1, #18 │ │ movs r5, #0 │ │ ldr r2, [sp, #212] @ 0xd4 │ │ - b.n 868ec │ │ + b.n 86954 │ │ ldr.w sl, [sp, #276] @ 0x114 │ │ ldr.w lr, [sp, #272] @ 0x110 │ │ ldr r3, [sp, #268] @ 0x10c │ │ ldrh.w r2, [sp, #266] @ 0x10a │ │ ldrb.w fp, [sp, #265] @ 0x109 │ │ - b.n 86934 │ │ + b.n 8699c │ │ add r3, sp, #264 @ 0x108 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w r8, {r0, r1, r2, r3} │ │ add sp, #332 @ 0x14c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov.w fp, #0 │ │ - b.n 8692c │ │ + b.n 86994 │ │ movs r1, #18 │ │ mov.w fp, #0 │ │ ldr r3, [sp, #204] @ 0xcc │ │ - b.n 86934 │ │ + b.n 8699c │ │ add r6, sp, #228 @ 0xe4 │ │ ldmia r6, {r0, r1, r2, r3, r6} │ │ stmia r0!, {r1, r2, r3, r6} │ │ add sp, #332 @ 0x14c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r3, [pc, #40] @ (869c4 ) │ │ + ldr r3, [pc, #40] @ (86a2c ) │ │ movs r0, #0 │ │ mov r1, r4 │ │ movs r2, #5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #32] @ (869c8 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #32] @ (86a30 ) │ │ movs r0, #0 │ │ mov r1, r6 │ │ movs r2, #5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #20] @ (869cc ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #20] @ (86a34 ) │ │ movs r0, #0 │ │ mov r1, ip │ │ movs r2, #5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ nop │ │ - subs r5, #116 @ 0x74 │ │ + subs r5, #28 │ │ movs r5, r0 │ │ - subs r5, #102 @ 0x66 │ │ + subs r5, #14 │ │ movs r5, r0 │ │ - subs r5, #88 @ 0x58 │ │ + subs r5, #0 │ │ movs r5, r0 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ ldrh r2, [r1, #16] │ │ movw r3, #8496 @ 0x2130 │ │ cmp r2, r3 │ │ - bgt.w 86b32 │ │ + bgt.w 86b9a │ │ subs r2, #2 │ │ cmp r2, #138 @ 0x8a │ │ - bhi.w 8700e │ │ + bhi.w 87076 │ │ tbh [pc, r2, lsl #1] │ │ lsls r3, r2, #2 │ │ lsls r1, r2, #12 │ │ lsls r1, r2, #12 │ │ lsls r1, r2, #12 │ │ lsls r1, r2, #12 │ │ lsls r1, r2, #12 │ │ @@ -142730,698 +142643,698 @@ │ │ lsls r1, r2, #12 │ │ lsls r1, r2, #12 │ │ lsls r1, r2, #12 │ │ lsls r6, r7, #8 │ │ ldr r2, [r1, #0] │ │ and.w r3, r2, #63 @ 0x3f │ │ cmp r3, #1 │ │ - beq.n 86b20 │ │ + beq.n 86b88 │ │ cmp r2, #8 │ │ - beq.n 86b20 │ │ - b.n 8700e │ │ + beq.n 86b88 │ │ + b.n 87076 │ │ ldr r2, [r1, #0] │ │ and.w r3, r2, #63 @ 0x3f │ │ cmp r3, #1 │ │ it ne │ │ cmpne r2, #8 │ │ - bne.n 86b8a │ │ + bne.n 86bf2 │ │ ldrd r1, r3, [r1, #8] │ │ movs r2, #0 │ │ movs r5, #8 │ │ strd r5, r2, [r0] │ │ str r1, [r0, #8] │ │ str r3, [r0, #12] │ │ pop {r4, r5, r7, pc} │ │ movw r3, #8497 @ 0x2131 │ │ cmp r2, r3 │ │ - beq.w 86f48 │ │ + beq.w 86fb0 │ │ movw r3, #8498 @ 0x2132 │ │ cmp r2, r3 │ │ - beq.n 86bc0 │ │ + beq.n 86c28 │ │ movw r3, #8499 @ 0x2133 │ │ cmp r2, r3 │ │ - bne.w 8700e │ │ + bne.w 87076 │ │ ldrd r2, r3, [r1] │ │ eor.w r2, r2, #10 │ │ orrs r2, r3 │ │ - bne.w 8700e │ │ + bne.w 87076 │ │ movs r2, #0 │ │ ldr r1, [r1, #8] │ │ movs r3, #11 │ │ strd r3, r2, [r0] │ │ str r1, [r0, #8] │ │ pop {r4, r5, r7, pc} │ │ ldr r2, [r1, #0] │ │ subs r2, #1 │ │ cmp r2, #7 │ │ - bhi.w 8700e │ │ + bhi.w 87076 │ │ tbh [pc, r2, lsl #1] │ │ movs r0, r1 │ │ lsls r7, r4, #6 │ │ lsls r1, r5, #6 │ │ lsls r5, r4, #6 │ │ lsls r2, r4, #6 │ │ lsls r2, r6, #6 │ │ lsls r2, r4, #6 │ │ movs r0, r1 │ │ - b.n 86b20 │ │ + b.n 86b88 │ │ ldr r3, [r1, #4] │ │ eor.w r2, r2, #10 │ │ orrs r2, r3 │ │ - bne.w 8700e │ │ + bne.w 87076 │ │ ldr r1, [r1, #8] │ │ movs r2, #0 │ │ movs r3, #17 │ │ strd r3, r2, [r0] │ │ str r1, [r0, #8] │ │ pop {r4, r5, r7, pc} │ │ ldrd r2, r3, [r1] │ │ eor.w r2, r2, #10 │ │ orrs r2, r3 │ │ - bne.w 8700e │ │ + bne.w 87076 │ │ movs r2, #0 │ │ ldr r1, [r1, #8] │ │ movs r3, #22 │ │ strd r3, r2, [r0] │ │ str r1, [r0, #8] │ │ pop {r4, r5, r7, pc} │ │ ldrd r2, r3, [r1] │ │ eor.w r2, r2, #10 │ │ orrs r2, r3 │ │ - bne.w 8700e │ │ + bne.w 87076 │ │ movs r2, #0 │ │ ldr r1, [r1, #8] │ │ movs r3, #23 │ │ strd r3, r2, [r0] │ │ str r1, [r0, #8] │ │ pop {r4, r5, r7, pc} │ │ ldr r2, [r1, #0] │ │ subs r2, #2 │ │ cmp r2, #5 │ │ - bhi.w 8700e │ │ + bhi.w 87076 │ │ tbh [pc, r2, lsl #1] │ │ lsls r6, r5, #5 │ │ lsls r0, r6, #5 │ │ lsls r4, r5, #5 │ │ lsls r1, r5, #5 │ │ lsls r1, r7, #5 │ │ lsls r1, r5, #5 │ │ mov r4, r0 │ │ mov r0, r1 │ │ mov r5, r1 │ │ - bl 88754 │ │ + bl 887bc │ │ mov r3, r0 │ │ mov r2, r1 │ │ mov r0, r4 │ │ mov r1, r5 │ │ lsls r3, r3, #31 │ │ - beq.w 8700e │ │ + beq.w 87076 │ │ movs r1, #0 │ │ movs r3, #40 @ 0x28 │ │ strd r3, r1, [r0] │ │ strb r2, [r0, #8] │ │ pop {r4, r5, r7, pc} │ │ ldrd r2, r3, [r1] │ │ eor.w r2, r2, #10 │ │ orrs r2, r3 │ │ - bne.w 8700e │ │ + bne.w 87076 │ │ movs r2, #0 │ │ ldr r1, [r1, #8] │ │ movs r3, #21 │ │ strd r3, r2, [r0] │ │ str r1, [r0, #8] │ │ pop {r4, r5, r7, pc} │ │ mov r4, r0 │ │ mov r0, r1 │ │ mov r5, r1 │ │ - bl 88754 │ │ + bl 887bc │ │ mov r3, r0 │ │ mov r2, r1 │ │ mov r0, r4 │ │ mov r1, r5 │ │ lsls r3, r3, #31 │ │ - beq.w 8700e │ │ + beq.w 87076 │ │ movs r1, #0 │ │ movs r3, #41 @ 0x29 │ │ strd r3, r1, [r0] │ │ strb r2, [r0, #8] │ │ pop {r4, r5, r7, pc} │ │ mov r4, r0 │ │ mov r0, r1 │ │ mov r5, r1 │ │ - bl 88754 │ │ + bl 887bc │ │ mov r3, r0 │ │ mov r2, r1 │ │ mov r0, r4 │ │ mov r1, r5 │ │ lsls r3, r3, #31 │ │ - beq.w 8700e │ │ + beq.w 87076 │ │ movs r1, #0 │ │ movs r3, #34 @ 0x22 │ │ strd r3, r1, [r0] │ │ strb r2, [r0, #8] │ │ pop {r4, r5, r7, pc} │ │ ldrd r2, r3, [r1] │ │ eor.w r2, r2, #10 │ │ orrs r2, r3 │ │ - bne.w 8700e │ │ + bne.w 87076 │ │ movs r2, #0 │ │ ldr r1, [r1, #8] │ │ movs r3, #28 │ │ strd r3, r2, [r0] │ │ str r1, [r0, #8] │ │ pop {r4, r5, r7, pc} │ │ ldr r2, [r1, #0] │ │ subs r2, #2 │ │ cmp r2, #5 │ │ - bhi.w 8700e │ │ + bhi.w 87076 │ │ tbh [pc, r2, lsl #1] │ │ lsls r7, r3, #5 │ │ lsls r2, r4, #5 │ │ lsls r4, r3, #5 │ │ lsls r5, r1, #2 │ │ lsls r5, r4, #5 │ │ lsls r5, r1, #2 │ │ mov r4, r0 │ │ mov r0, r1 │ │ mov r5, r1 │ │ - bl 88754 │ │ + bl 887bc │ │ mov r3, r0 │ │ mov r2, r1 │ │ mov r0, r4 │ │ mov r1, r5 │ │ lsls r3, r3, #31 │ │ - beq.w 8700e │ │ + beq.w 87076 │ │ movs r1, #0 │ │ movs r3, #32 │ │ strd r3, r1, [r0] │ │ strb r2, [r0, #8] │ │ pop {r4, r5, r7, pc} │ │ ldr r2, [r1, #0] │ │ subs r2, #1 │ │ cmp r2, #7 │ │ - bhi.w 8700e │ │ + bhi.w 87076 │ │ tbh [pc, r2, lsl #1] │ │ movs r0, r1 │ │ lsls r0, r6, #3 │ │ lsls r2, r6, #3 │ │ lsls r6, r5, #3 │ │ lsls r3, r5, #3 │ │ lsls r3, r7, #3 │ │ lsls r3, r5, #3 │ │ movs r0, r1 │ │ - b.n 86b20 │ │ + b.n 86b88 │ │ mov r4, r0 │ │ mov r0, r1 │ │ mov r5, r1 │ │ - bl 88798 │ │ + bl 88800 │ │ mov r3, r0 │ │ mov r2, r1 │ │ mov r0, r4 │ │ mov r1, r5 │ │ lsls r3, r3, #31 │ │ - beq.w 8700e │ │ + beq.w 87076 │ │ movs r1, #0 │ │ movs r3, #38 @ 0x26 │ │ strd r3, r1, [r0] │ │ strh r2, [r0, #8] │ │ pop {r4, r5, r7, pc} │ │ ldr r2, [r1, #0] │ │ subs r2, #2 │ │ cmp r2, #5 │ │ - bhi.w 8700e │ │ + bhi.w 87076 │ │ tbh [pc, r2, lsl #1] │ │ lsls r6, r1, #3 │ │ lsls r0, r2, #3 │ │ lsls r4, r1, #3 │ │ lsls r1, r1, #3 │ │ lsls r1, r3, #3 │ │ lsls r1, r1, #3 │ │ ldr r2, [r1, #0] │ │ subs r2, #2 │ │ cmp r2, #5 │ │ - bhi.w 8700e │ │ + bhi.w 87076 │ │ tbh [pc, r2, lsl #1] │ │ lsls r1, r0, #3 │ │ lsls r3, r0, #3 │ │ lsls r7, r7, #2 │ │ lsls r4, r7, #2 │ │ lsls r4, r1, #3 │ │ lsls r4, r7, #2 │ │ ldrd r2, r3, [r1] │ │ eor.w r2, r2, #10 │ │ orrs r2, r3 │ │ - bne.w 8700e │ │ + bne.w 87076 │ │ movs r2, #0 │ │ ldr r1, [r1, #8] │ │ movs r3, #16 │ │ strd r3, r2, [r0] │ │ str r1, [r0, #8] │ │ pop {r4, r5, r7, pc} │ │ ldr r2, [r1, #0] │ │ subs r2, #1 │ │ cmp r2, #7 │ │ - bhi.w 8700e │ │ + bhi.w 87076 │ │ tbb [pc, r2] │ │ - add r6, pc, #16 @ (adr r6, 86d8c ) │ │ - add r4, pc, #672 @ (adr r4, 87020 ) │ │ - cbz r1, 86daa │ │ + add r6, pc, #16 @ (adr r6, 86df4 ) │ │ + add r4, pc, #672 @ (adr r4, 87088 ) │ │ + cbz r1, 86e12 │ │ lsls r1, r4, #18 │ │ - b.n 86b20 │ │ + b.n 86b88 │ │ mov r4, r0 │ │ mov r0, r1 │ │ mov r5, r1 │ │ - bl 88754 │ │ + bl 887bc │ │ mov r3, r0 │ │ mov r2, r1 │ │ mov r0, r4 │ │ mov r1, r5 │ │ lsls r3, r3, #31 │ │ - beq.w 8700e │ │ + beq.w 87076 │ │ movs r1, #0 │ │ movs r3, #43 @ 0x2b │ │ strd r3, r1, [r0] │ │ strb r2, [r0, #8] │ │ pop {r4, r5, r7, pc} │ │ ldr r2, [r1, #0] │ │ subs r2, #2 │ │ cmp r2, #5 │ │ - bhi.w 8700e │ │ + bhi.w 87076 │ │ tbh [pc, r2, lsl #1] │ │ lsls r0, r3, #3 │ │ lsls r3, r3, #3 │ │ lsls r5, r2, #3 │ │ movs r6, r0 │ │ lsls r6, r3, #3 │ │ movs r6, r0 │ │ ldrd r1, r2, [r1, #8] │ │ - b.n 86f7a │ │ + b.n 86fe2 │ │ ldrd r2, r3, [r1] │ │ eor.w r2, r2, #10 │ │ orrs r2, r3 │ │ - bne.w 8700e │ │ + bne.w 87076 │ │ movs r2, #0 │ │ ldr r1, [r1, #8] │ │ movs r3, #20 │ │ strd r3, r2, [r0] │ │ str r1, [r0, #8] │ │ pop {r4, r5, r7, pc} │ │ ldrd r2, lr, [r1] │ │ subs r3, r2, #1 │ │ cmp r3, #7 │ │ - bhi.w 87002 │ │ + bhi.w 8706a │ │ tbh [pc, r3, lsl #1] │ │ movs r0, r1 │ │ lsls r2, r6, #3 │ │ lsls r6, r6, #3 │ │ lsls r6, r5, #3 │ │ movs r1, r1 │ │ lsls r2, r7, #3 │ │ movs r1, r1 │ │ movs r0, r1 │ │ - b.n 86b20 │ │ + b.n 86b88 │ │ ldrd r1, ip, [r1, #8] │ │ - b.n 86ff4 │ │ + b.n 8705c │ │ ldr r2, [r1, #0] │ │ subs r2, #2 │ │ cmp r2, #5 │ │ - bhi.w 8700e │ │ + bhi.w 87076 │ │ tbb [pc, r2] │ │ ldr r6, [r2, r1] │ │ str r4, [r2, r5] │ │ str r1, [r4, r5] │ │ mov r4, r0 │ │ mov r0, r1 │ │ mov r5, r1 │ │ - bl 88754 │ │ + bl 887bc │ │ mov r3, r0 │ │ mov r2, r1 │ │ mov r0, r4 │ │ mov r1, r5 │ │ lsls r3, r3, #31 │ │ - beq.w 8700e │ │ + beq.w 87076 │ │ movs r1, #0 │ │ movs r3, #35 @ 0x23 │ │ strd r3, r1, [r0] │ │ strb r2, [r0, #8] │ │ pop {r4, r5, r7, pc} │ │ mov r4, r0 │ │ mov r0, r1 │ │ mov r5, r1 │ │ - bl 88754 │ │ + bl 887bc │ │ mov r3, r0 │ │ mov r2, r1 │ │ mov r0, r4 │ │ mov r1, r5 │ │ lsls r3, r3, #31 │ │ - beq.w 8700e │ │ + beq.w 87076 │ │ movs r1, #0 │ │ movs r3, #36 @ 0x24 │ │ strd r3, r1, [r0] │ │ strb r2, [r0, #8] │ │ pop {r4, r5, r7, pc} │ │ ldrd r2, r3, [r1] │ │ eor.w r2, r2, #10 │ │ orrs r2, r3 │ │ - bne.w 8700e │ │ + bne.w 87076 │ │ movs r2, #0 │ │ ldr r1, [r1, #8] │ │ movs r3, #18 │ │ strd r3, r2, [r0] │ │ str r1, [r0, #8] │ │ pop {r4, r5, r7, pc} │ │ mov r4, r0 │ │ mov r0, r1 │ │ mov r5, r1 │ │ - bl 88754 │ │ + bl 887bc │ │ mov r3, r0 │ │ mov r2, r1 │ │ mov r0, r4 │ │ mov r1, r5 │ │ lsls r3, r3, #31 │ │ - beq.w 8700e │ │ + beq.w 87076 │ │ movs r1, #0 │ │ movs r3, #42 @ 0x2a │ │ strd r3, r1, [r0] │ │ strb r2, [r0, #8] │ │ pop {r4, r5, r7, pc} │ │ ldr r2, [r1, #0] │ │ subs r2, #2 │ │ cmp r2, #5 │ │ - bhi.w 8700e │ │ + bhi.w 87076 │ │ tbb [pc, r2] │ │ lsrs r0, r1, #8 │ │ lsls r6, r0, #12 │ │ lsls r3, r2, #12 │ │ ldrd r1, r2, [r1, #8] │ │ - b.n 86ece │ │ + b.n 86f36 │ │ ldr r1, [r1, #8] │ │ - b.n 86ecc │ │ + b.n 86f34 │ │ ldrb r1, [r1, #8] │ │ - b.n 86ecc │ │ + b.n 86f34 │ │ ldrh r1, [r1, #8] │ │ movs r2, #0 │ │ movs r3, #0 │ │ movs r5, #7 │ │ strd r5, r3, [r0] │ │ str r1, [r0, #8] │ │ str r2, [r0, #12] │ │ pop {r4, r5, r7, pc} │ │ ldr r2, [r1, #12] │ │ cmp r2, #0 │ │ - bmi.w 8700e │ │ + bmi.w 87076 │ │ ldr r1, [r1, #8] │ │ - b.n 86ece │ │ + b.n 86f36 │ │ ldr r2, [r1, #0] │ │ subs r2, #2 │ │ cmp r2, #5 │ │ - bhi.w 8700e │ │ + bhi.w 87076 │ │ tbb [pc, r2] │ │ strh r0, [r2, r1] │ │ lsls r1, r1, #13 │ │ lsls r3, r1, #13 │ │ ldrd r1, r2, [r1, #8] │ │ - b.n 86f9e │ │ + b.n 87006 │ │ mov r4, r0 │ │ mov r0, r1 │ │ mov r5, r1 │ │ - bl 88754 │ │ + bl 887bc │ │ mov r3, r0 │ │ mov r2, r1 │ │ mov r0, r4 │ │ mov r1, r5 │ │ lsls r3, r3, #31 │ │ - beq.w 8700e │ │ + beq.w 87076 │ │ movs r1, #0 │ │ movs r3, #33 @ 0x21 │ │ strd r3, r1, [r0] │ │ strb r2, [r0, #8] │ │ pop {r4, r5, r7, pc} │ │ mov r4, r0 │ │ mov r0, r1 │ │ mov r5, r1 │ │ - bl 88754 │ │ + bl 887bc │ │ mov r3, r0 │ │ mov r2, r1 │ │ mov r0, r4 │ │ mov r1, r5 │ │ lsls r3, r3, #31 │ │ - beq.n 8700e │ │ + beq.n 87076 │ │ movs r1, #0 │ │ movs r3, #37 @ 0x25 │ │ strd r3, r1, [r0] │ │ strb r2, [r0, #8] │ │ pop {r4, r5, r7, pc} │ │ ldr r2, [r1, #0] │ │ subs r2, #2 │ │ cmp r2, #5 │ │ - bhi.n 8700e │ │ + bhi.n 87076 │ │ tbb [pc, r2] │ │ adds r5, #51 @ 0x33 │ │ lsls r4, r5, #12 │ │ lsls r6, r5, #12 │ │ ldrd r1, r2, [r1, #8] │ │ - b.n 86fc2 │ │ + b.n 8702a │ │ ldr r1, [r1, #8] │ │ movs r2, #0 │ │ - b.n 86f7a │ │ + b.n 86fe2 │ │ ldrb r1, [r1, #8] │ │ movs r2, #0 │ │ - b.n 86f7a │ │ + b.n 86fe2 │ │ ldrh r1, [r1, #8] │ │ movs r2, #0 │ │ - b.n 86f7a │ │ + b.n 86fe2 │ │ ldr r2, [r1, #12] │ │ cmp r2, #0 │ │ - bmi.n 8700e │ │ + bmi.n 87076 │ │ ldr r1, [r1, #8] │ │ movs r3, #0 │ │ movs r5, #44 @ 0x2c │ │ strd r5, r3, [r0] │ │ str r1, [r0, #8] │ │ str r2, [r0, #12] │ │ pop {r4, r5, r7, pc} │ │ ldr r1, [r1, #8] │ │ - b.n 86f9c │ │ + b.n 87004 │ │ ldr r2, [r1, #12] │ │ cmp r2, #0 │ │ - bmi.n 8700e │ │ + bmi.n 87076 │ │ ldr r1, [r1, #8] │ │ - b.n 86f9e │ │ + b.n 87006 │ │ ldrb r1, [r1, #8] │ │ - b.n 86f9c │ │ + b.n 87004 │ │ ldrh r1, [r1, #8] │ │ movs r2, #0 │ │ movs r3, #0 │ │ movs r5, #39 @ 0x27 │ │ strd r5, r3, [r0] │ │ str r1, [r0, #8] │ │ str r2, [r0, #12] │ │ pop {r4, r5, r7, pc} │ │ ldr r1, [r1, #8] │ │ - b.n 86fc0 │ │ + b.n 87028 │ │ ldr r2, [r1, #12] │ │ cmp r2, #0 │ │ - bmi.n 8700e │ │ + bmi.n 87076 │ │ ldr r1, [r1, #8] │ │ - b.n 86fc2 │ │ + b.n 8702a │ │ ldrb r1, [r1, #8] │ │ - b.n 86fc0 │ │ + b.n 87028 │ │ ldrh r1, [r1, #8] │ │ movs r2, #0 │ │ movs r3, #0 │ │ movs r5, #45 @ 0x2d │ │ strd r5, r3, [r0] │ │ str r1, [r0, #8] │ │ str r2, [r0, #12] │ │ pop {r4, r5, r7, pc} │ │ ldr r1, [r1, #8] │ │ mov.w ip, #0 │ │ - b.n 86ff4 │ │ + b.n 8705c │ │ ldrb r1, [r1, #8] │ │ mov.w ip, #0 │ │ - b.n 86ff4 │ │ + b.n 8705c │ │ ldrh r1, [r1, #8] │ │ mov.w ip, #0 │ │ - b.n 86ff4 │ │ + b.n 8705c │ │ ldr.w ip, [r1, #12] │ │ cmp.w ip, #0 │ │ - bmi.n 87002 │ │ + bmi.n 8706a │ │ ldr r1, [r1, #8] │ │ movs r2, #0 │ │ movs r3, #7 │ │ strd r3, r2, [r0] │ │ strd r1, ip, [r0, #8] │ │ pop {r4, r5, r7, pc} │ │ eor.w r2, r2, #10 │ │ orrs.w r2, r2, lr │ │ - beq.w 86b96 │ │ + beq.w 86bfe │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w 81fd8 │ │ + b.w 82040 │ │ push {r4, r5, r6, r7, lr} │ │ stmdb sp!, {r8, r9, sl} │ │ ldr.w ip, [sp, #52] @ 0x34 │ │ cmp.w ip, #0 │ │ - beq.n 8705c │ │ + beq.n 870c4 │ │ mov r3, r2 │ │ ldr.w lr, [sp, #48] @ 0x30 │ │ ldr r2, [sp, #40] @ 0x28 │ │ and.w r5, r3, #63 @ 0x3f │ │ ldrd sl, r1, [sp, #32] │ │ cmp r5, #13 │ │ - beq.n 8708a │ │ + beq.n 870f2 │ │ cmp r3, #14 │ │ - beq.n 8706a │ │ + beq.n 870d2 │ │ cmp r3, #15 │ │ - bne.n 8705c │ │ + bne.n 870c4 │ │ ldr r1, [r2, #120] @ 0x78 │ │ - cbz r1, 8705c │ │ + cbz r1, 870c4 │ │ ldr.w r5, [lr, #24] │ │ cmp r5, #0 │ │ - beq.w 871e4 │ │ + beq.w 8724c │ │ ldr.w r2, [lr, #20] │ │ cmp r5, #1 │ │ - bne.n 870b6 │ │ + bne.n 8711e │ │ movs r3, #0 │ │ - b.n 870d8 │ │ + b.n 87140 │ │ movs r1, #82 @ 0x52 │ │ strb r1, [r0, #0] │ │ movs r1, #0 │ │ str r1, [r0, #4] │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ uxtb r3, r1 │ │ - cbz r3, 870a0 │ │ + cbz r3, 87108 │ │ cmp r3, #1 │ │ - bne.w 871e4 │ │ + bne.w 8724c │ │ ldr.w r6, [lr, #24] │ │ cmp r6, #0 │ │ - beq.w 871e4 │ │ + beq.w 8724c │ │ ldr.w r8, [lr, #20] │ │ cmp r6, #1 │ │ - bne.n 8714c │ │ + bne.n 871b4 │ │ movs r5, #0 │ │ - b.n 8716e │ │ + b.n 871d6 │ │ ldr r3, [sp, #44] @ 0x2c │ │ str.w ip, [sp, #40] @ 0x28 │ │ strd sl, lr, [sp, #32] │ │ ldmia.w sp!, {r8, r9, sl} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 88428 │ │ + b.w 88490 │ │ ldr.w r6, [lr, #16] │ │ cmp r6, #0 │ │ - beq.w 871e4 │ │ + beq.w 8724c │ │ ldr.w r9, [lr, #12] │ │ cmp r6, #1 │ │ - bne.n 87192 │ │ + bne.n 871fa │ │ movs r5, #0 │ │ - b.n 871b4 │ │ + b.n 8721c │ │ movs r6, #0 │ │ add.w r3, r6, r5, lsr #1 │ │ sub.w r5, r5, r5, lsr #1 │ │ add.w r4, r3, r3, lsl #3 │ │ add.w r4, r2, r4, lsl #5 │ │ ldr.w r4, [r4, #280] @ 0x118 │ │ cmp r4, sl │ │ it hi │ │ movhi r3, r6 │ │ mov r6, r3 │ │ cmp r5, #1 │ │ - bhi.n 870b8 │ │ + bhi.n 87120 │ │ add.w r4, r3, r3, lsl #3 │ │ add.w r4, r2, r4, lsl #5 │ │ ldr.w r4, [r4, #280] @ 0x118 │ │ cmp r4, sl │ │ - beq.n 871e4 │ │ + beq.n 8724c │ │ it cc │ │ addcc r3, #1 │ │ cmp r3, #0 │ │ - beq.n 871e4 │ │ + beq.n 8724c │ │ add.w r3, r3, r3, lsl #3 │ │ add.w r2, r2, r3, lsl #5 │ │ ldr.w r3, [r2, #-104] │ │ cmp r3, #0 │ │ - bne.n 871e4 │ │ + bne.n 8724c │ │ ldr.w r3, [r2, #-100] │ │ cmp sl, r3 │ │ - bcc.n 871e4 │ │ + bcc.n 8724c │ │ ldrb.w r5, [r2, #-71] │ │ sub.w r8, sl, r3 │ │ ldr.w r4, [r2, #-68] │ │ movs r6, #4 │ │ ldr.w r3, [r2, #-76] │ │ cmp r5, #8 │ │ it eq │ │ moveq r6, #12 │ │ add r4, r6 │ │ subs r4, r4, r3 │ │ subs.w r5, r8, r4 │ │ - bcc.n 871e4 │ │ + bcc.n 8724c │ │ cmp r5, r3 │ │ - bcs.n 871e4 │ │ + bcs.n 8724c │ │ sub.w r3, r2, #288 @ 0x120 │ │ str.w ip, [sp, #40] @ 0x28 │ │ add.w r2, r1, #8 │ │ strd r8, lr, [sp, #32] │ │ movs r1, #1 │ │ ldmia.w sp!, {r8, r9, sl} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 88428 │ │ + b.w 88490 │ │ movs r3, #0 │ │ add.w r5, r3, r6, lsr #1 │ │ sub.w r6, r6, r6, lsr #1 │ │ add.w r4, r5, r5, lsl #3 │ │ add.w r4, r8, r4, lsl #5 │ │ ldr.w r4, [r4, #280] @ 0x118 │ │ cmp r4, sl │ │ it hi │ │ movhi r5, r3 │ │ mov r3, r5 │ │ cmp r6, #1 │ │ - bhi.n 8714e │ │ + bhi.n 871b6 │ │ add.w r3, r5, r5, lsl #3 │ │ add.w r3, r8, r3, lsl #5 │ │ ldr.w r3, [r3, #280] @ 0x118 │ │ cmp r3, sl │ │ - beq.n 871e4 │ │ + beq.n 8724c │ │ it cc │ │ addcc r5, #1 │ │ - cbz r5, 871e4 │ │ + cbz r5, 8724c │ │ add.w r3, r5, r5, lsl #3 │ │ add.w r3, r8, r3, lsl #5 │ │ sub.w r3, r3, #288 @ 0x120 │ │ - b.n 871d6 │ │ + b.n 8723e │ │ movs r3, #0 │ │ mov.w r8, #352 @ 0x160 │ │ add.w r5, r3, r6, lsr #1 │ │ sub.w r6, r6, r6, lsr #1 │ │ mla r4, r5, r8, r9 │ │ ldr.w r4, [r4, #348] @ 0x15c │ │ cmp r4, sl │ │ it hi │ │ movhi r5, r3 │ │ mov r3, r5 │ │ cmp r6, #1 │ │ - bhi.n 87198 │ │ + bhi.n 87200 │ │ mov.w r3, #352 @ 0x160 │ │ mla r3, r5, r3, r9 │ │ ldr.w r3, [r3, #348] @ 0x15c │ │ cmp r3, sl │ │ - beq.n 871e4 │ │ + beq.n 8724c │ │ it cc │ │ addcc r5, #1 │ │ - cbz r5, 871e4 │ │ + cbz r5, 8724c │ │ mov.w r3, #352 @ 0x160 │ │ mla r3, r5, r3, r9 │ │ sub.w r3, r3, #352 @ 0x160 │ │ ldr.w r4, [r3, #184] @ 0xb8 │ │ - cbnz r4, 871e4 │ │ + cbnz r4, 8724c │ │ ldr.w r5, [r3, #188] @ 0xbc │ │ cmp sl, r5 │ │ - bcs.n 871ee │ │ + bcs.n 87256 │ │ movs r1, #58 @ 0x3a │ │ strb r1, [r0, #0] │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrb.w r6, [r3, #217] @ 0xd9 │ │ movs r4, #4 │ │ ldr.w r9, [r3, #220] @ 0xdc │ │ @@ -143429,22 +143342,22 @@ │ │ ldr.w r5, [r3, #212] @ 0xd4 │ │ cmp r6, #8 │ │ it eq │ │ moveq r4, #12 │ │ add r4, r9 │ │ subs r4, r4, r5 │ │ subs.w r6, r8, r4 │ │ - bcc.n 871e4 │ │ + bcc.n 8724c │ │ cmp r6, r5 │ │ - bcs.n 871e4 │ │ + bcs.n 8724c │ │ str.w ip, [sp, #40] @ 0x28 │ │ strd r8, lr, [sp, #32] │ │ ldmia.w sp!, {r8, r9, sl} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 88428 │ │ + b.w 88490 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub.w sp, sp, #4096 @ 0x1000 │ │ sub sp, #16 │ │ movw r6, #5653 @ 0x1615 │ │ sub.w r2, r1, r1, lsr #1 │ │ @@ -143456,103 +143369,103 @@ │ │ it ls │ │ movls r6, r2 │ │ cmp r6, #48 @ 0x30 │ │ mov r8, r6 │ │ it ls │ │ movls.w r8, #48 @ 0x30 │ │ cmp r6, #171 @ 0xab │ │ - bcs.n 87262 │ │ + bcs.n 872ca │ │ add r4, sp, #8 │ │ movs r3, #170 @ 0xaa │ │ - b.n 87294 │ │ + b.n 872fc │ │ movw r3, #21846 @ 0x5556 │ │ movt r3, #1365 @ 0x555 │ │ cmp r2, r3 │ │ - bcc.n 87272 │ │ - bl 3e03c │ │ + bcc.n 872da │ │ + bl 3e344 │ │ add.w r2, r8, r8, lsl #1 │ │ lsls r5, r2, #3 │ │ - beq.n 87290 │ │ + beq.n 872f8 │ │ mov r9, r0 │ │ mov r0, r5 │ │ mov sl, r1 │ │ - blx d87f0 │ │ - cbz r0, 872ba │ │ + blx d8810 │ │ + cbz r0, 87322 │ │ mov r4, r0 │ │ mov r1, sl │ │ mov r0, r9 │ │ mov r3, r8 │ │ - b.n 87294 │ │ + b.n 872fc │ │ movs r3, #0 │ │ movs r4, #8 │ │ movs r2, #0 │ │ cmp r1, #65 @ 0x41 │ │ it cc │ │ movcc r2, #1 │ │ str r2, [sp, #0] │ │ mov r2, r4 │ │ - bl 873d8 │ │ + bl 87440 │ │ cmp r6, #170 @ 0xaa │ │ - bls.n 872ae │ │ + bls.n 87316 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add.w sp, sp, #4096 @ 0x1000 │ │ add sp, #16 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #8 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ cmp r6, #171 @ 0xab │ │ mov r5, r0 │ │ itt cs │ │ movcs r0, r4 │ │ - blxcs d87c0 │ │ + blxcs d87d0 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ push {r4, r5, r6, lr} │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #28 │ │ add.w r1, r1, r1, lsl #1 │ │ mov.w r8, #0 │ │ mov r3, r0 │ │ str r0, [sp, #4] │ │ add.w r1, r0, r1, lsl #3 │ │ str r1, [sp, #0] │ │ add.w r1, r0, #24 │ │ - b.n 8731a │ │ + b.n 87382 │ │ ldr r2, [sp, #4] │ │ ldr r0, [sp, #24] │ │ strd r0, sl, [r2] │ │ ldr r0, [sp, #8] │ │ ldr r3, [sp, #20] │ │ str r0, [r2, #8] │ │ ldr r0, [sp, #12] │ │ strd r0, r9, [r2, #12] │ │ ldr r0, [sp, #16] │ │ str r0, [r2, #20] │ │ sub.w r8, r8, #24 │ │ add.w r1, r3, #24 │ │ ldr r0, [sp, #0] │ │ cmp r1, r0 │ │ - beq.n 873a2 │ │ + beq.n 8740a │ │ mov fp, r3 │ │ mov r3, r1 │ │ ldrd r0, r5, [fp, #24] │ │ str r0, [sp, #24] │ │ ldr.w r0, [fp, #40] @ 0x28 │ │ ldr.w r2, [fp, #16] │ │ cmp r0, r2 │ │ - bcc.n 87340 │ │ - bhi.n 8730c │ │ + bcc.n 873a8 │ │ + bhi.n 87374 │ │ ldrd r2, r6, [fp] │ │ ldr r1, [sp, #24] │ │ subs r2, r1, r2 │ │ sbcs.w r2, r5, r6 │ │ - bcs.n 8730c │ │ + bcs.n 87374 │ │ ldrd r2, r1, [fp, #32] │ │ mov r6, r3 │ │ strd r2, r1, [sp, #8] │ │ mov r2, fp │ │ ldr.w r1, [fp, #44] @ 0x2c │ │ str r1, [sp, #16] │ │ mov r1, r8 │ │ @@ -143561,91 +143474,91 @@ │ │ ldmia.w r2, {r0, r8, r9, sl, ip, lr} │ │ stmia.w r6, {r0, r8, r9, sl, ip, lr} │ │ mov sl, r5 │ │ mov r9, r3 │ │ ldr r2, [sp, #4] │ │ mov r8, r1 │ │ cmp fp, r2 │ │ - beq.n 872f6 │ │ + beq.n 8735e │ │ mov lr, r8 │ │ - b.n 87382 │ │ + b.n 873ea │ │ mov r0, ip │ │ adds.w lr, lr, #24 │ │ ldmia.w r0, {r1, r2, r3, r4, r5, r6} │ │ stmia.w fp, {r1, r2, r3, r4, r5, r6} │ │ mov fp, ip │ │ - beq.n 872f4 │ │ + beq.n 8735c │ │ ldr.w r0, [fp, #-8] │ │ sub.w ip, fp, #24 │ │ cmp r9, r0 │ │ - bcc.n 87370 │ │ - bhi.n 8739e │ │ + bcc.n 873d8 │ │ + bhi.n 87406 │ │ ldrd r0, r3, [ip] │ │ ldr r1, [sp, #24] │ │ subs r0, r1, r0 │ │ sbcs.w r0, sl, r3 │ │ - bcc.n 87370 │ │ + bcc.n 873d8 │ │ mov r2, fp │ │ - b.n 872f6 │ │ + b.n 8735e │ │ add sp, #28 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, pc} │ │ ldr r1, [r0, #8] │ │ cmp r1, #0 │ │ it ne │ │ bxne lr │ │ ldr r1, [r0, #16] │ │ - cbz r1, 873ca │ │ + cbz r1, 87432 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ ldr r1, [r0, #12] │ │ mov r4, r0 │ │ mov r0, r1 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ ldmia.w sp!, {r4, r6, r7, lr} │ │ ldr r1, [r0, #24] │ │ cmp r1, #0 │ │ itt ne │ │ ldrne r0, [r0, #20] │ │ - bne.w d870c │ │ + bne.w d871c │ │ bx lr │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #420 @ 0x1a4 │ │ mov r4, r1 │ │ mov fp, r3 │ │ str r2, [sp, #76] @ 0x4c │ │ mov.w r1, #1073741824 @ 0x40000000 │ │ str r0, [sp, #56] @ 0x38 │ │ movs r0, #0 │ │ mov r2, r4 │ │ movs r3, #0 │ │ - bl d53d0 │ │ + bl d53dc │ │ umull r2, r3, r0, r4 │ │ adds r6, r0, #1 │ │ adc.w r5, r1, #0 │ │ mla r3, r1, r4, r3 │ │ eor.w r3, r3, #1073741824 @ 0x40000000 │ │ orrs r2, r3 │ │ it eq │ │ moveq r5, r1 │ │ str r5, [sp, #20] │ │ it eq │ │ moveq r6, r0 │ │ cmp.w r4, #4096 @ 0x1000 │ │ str r6, [sp, #24] │ │ str r4, [sp, #40] @ 0x28 │ │ - bhi.n 8742c │ │ + bhi.n 87494 │ │ sub.w r0, r4, r4, lsr #1 │ │ cmp r0, #64 @ 0x40 │ │ it cs │ │ movcs r0, #64 @ 0x40 │ │ - b.n 8744e │ │ + b.n 874b6 │ │ orr.w r0, r4, #1 │ │ movs r2, #1 │ │ clz r0, r0 │ │ eor.w r0, r0, #31 │ │ and.w r1, r0, #1 │ │ add.w r0, r1, r0, lsr #1 │ │ lsr.w r1, r4, r0 │ │ @@ -143664,47 +143577,47 @@ │ │ adds r0, #48 @ 0x30 │ │ str r0, [sp, #12] │ │ ldr r0, [sp, #40] @ 0x28 │ │ str r1, [sp, #8] │ │ add.w r2, r9, r9, lsl #1 │ │ cmp r0, r9 │ │ str.w r9, [sp, #64] @ 0x40 │ │ - bls.n 874b0 │ │ + bls.n 87518 │ │ mov r1, r0 │ │ ldr r0, [sp, #56] @ 0x38 │ │ sub.w r4, r1, r9 │ │ ldr r1, [sp, #28] │ │ add.w r0, r0, r2, lsl #3 │ │ str r5, [sp, #52] @ 0x34 │ │ cmp r4, r1 │ │ str r2, [sp, #68] @ 0x44 │ │ - bcs.n 874bc │ │ + bcs.n 87524 │ │ ldr r1, [r7, #8] │ │ - cbz r1, 874c8 │ │ + cbz r1, 87530 │ │ movs r1, #0 │ │ cmp r4, #32 │ │ strd r1, r1, [sp] │ │ it cs │ │ movcs r4, #32 │ │ ldr r2, [sp, #76] @ 0x4c │ │ mov r1, r4 │ │ mov r3, fp │ │ - bl 87930 │ │ - b.n 874c2 │ │ + bl 87998 │ │ + b.n 8752a │ │ movs r1, #1 │ │ movs r3, #0 │ │ str r1, [sp, #48] @ 0x30 │ │ cmp r5, #2 │ │ - bcs.n 87530 │ │ - b.n 87762 │ │ + bcs.n 87598 │ │ + b.n 877ca │ │ cmp r4, #2 │ │ - bcs.w 8778e │ │ + bcs.w 877f6 │ │ lsls r0, r4, #1 │ │ adds r2, r0, #1 │ │ - b.n 874d2 │ │ + b.n 8753a │ │ ldr r0, [sp, #28] │ │ cmp r4, r0 │ │ it cs │ │ movcs r4, r0 │ │ lsls r2, r4, #1 │ │ sub.w r0, r9, r8, lsr #1 │ │ str r2, [sp, #48] @ 0x30 │ │ @@ -143729,129 +143642,129 @@ │ │ add.w r3, r1, #32 │ │ it ne │ │ clzne r3, r0 │ │ ldr r0, [sp, #40] @ 0x28 │ │ ldr r5, [sp, #52] @ 0x34 │ │ ldr r2, [sp, #68] @ 0x44 │ │ cmp r5, #2 │ │ - bcc.w 87762 │ │ + bcc.w 877ca │ │ ldr r0, [sp, #16] │ │ str r3, [sp, #60] @ 0x3c │ │ add.w r0, r0, r2, lsl #3 │ │ str r0, [sp, #32] │ │ ldr r0, [sp, #56] @ 0x38 │ │ add.w r0, r0, r2, lsl #3 │ │ str r0, [sp, #72] @ 0x48 │ │ - b.n 8754e │ │ + b.n 875b6 │ │ mov.w r8, r2, lsl #1 │ │ cmp r1, #1 │ │ - bls.w 8775e │ │ + bls.w 877c6 │ │ subs r1, r5, #1 │ │ sub.w r0, r7, #94 @ 0x5e │ │ ldrb r0, [r0, r1] │ │ cmp r0, r3 │ │ - bcc.w 87760 │ │ + bcc.w 877c8 │ │ add r0, sp, #88 @ 0x58 │ │ mov r5, r1 │ │ ldr.w r6, [r0, r1, lsl #2] │ │ lsrs r4, r6, #1 │ │ add.w r2, r4, r8, lsr #1 │ │ cmp r2, fp │ │ - bhi.n 87578 │ │ + bhi.n 875e0 │ │ orr.w r0, r6, r8 │ │ ands.w r0, r0, #1 │ │ - beq.n 87544 │ │ + beq.n 875ac │ │ sub.w r0, r9, r2 │ │ str r1, [sp, #68] @ 0x44 │ │ ldr r1, [sp, #56] @ 0x38 │ │ add.w r0, r0, r0, lsl #1 │ │ add.w sl, r1, r0, lsl #3 │ │ lsls r0, r6, #31 │ │ - bne.n 875b2 │ │ + bne.n 8761a │ │ orr.w r0, r4, #1 │ │ mov r9, r2 │ │ clz r0, r0 │ │ movs r1, #62 @ 0x3e │ │ ldr r2, [sp, #76] @ 0x4c │ │ mov r3, fp │ │ eor.w r0, r1, r0, lsl #1 │ │ movs r1, #0 │ │ strd r0, r1, [sp] │ │ mov r0, sl │ │ mov r1, r4 │ │ - bl 87930 │ │ + bl 87998 │ │ mov r2, r9 │ │ ldr r3, [sp, #60] @ 0x3c │ │ mov.w r9, r8, lsr #1 │ │ movs.w r0, r8, lsl #31 │ │ - bne.n 875f4 │ │ + bne.n 8765c │ │ orr.w r0, r9, #1 │ │ movs r1, #62 @ 0x3e │ │ clz r0, r0 │ │ str.w r8, [sp, #84] @ 0x54 │ │ mov r8, sl │ │ mov r3, fp │ │ eor.w r0, r1, r0, lsl #1 │ │ movs r1, #0 │ │ strd r0, r1, [sp] │ │ add.w r0, r4, r4, lsl #1 │ │ mov r1, r9 │ │ add.w r0, sl, r0, lsl #3 │ │ mov sl, r2 │ │ ldr r2, [sp, #76] @ 0x4c │ │ - bl 87930 │ │ + bl 87998 │ │ mov r2, sl │ │ mov sl, r8 │ │ ldr.w r8, [sp, #84] @ 0x54 │ │ ldr r3, [sp, #60] @ 0x3c │ │ ldr r1, [sp, #68] @ 0x44 │ │ cmp r6, #2 │ │ it cs │ │ cmpcs.w r8, #2 │ │ - bcs.n 87610 │ │ + bcs.n 87678 │ │ lsls r0, r2, #1 │ │ add.w r8, r0, #1 │ │ ldr.w r9, [sp, #64] @ 0x40 │ │ cmp r1, #1 │ │ - bhi.n 8754e │ │ - b.n 8775e │ │ + bhi.n 875b6 │ │ + b.n 877c6 │ │ cmp r9, r4 │ │ mov r0, r4 │ │ it cc │ │ movcc r0, r9 │ │ cmp fp, r0 │ │ - bcc.n 87600 │ │ + bcc.n 87668 │ │ ldr r6, [sp, #76] @ 0x4c │ │ add.w r8, r0, r0, lsl #1 │ │ add.w r1, r4, r4, lsl #1 │ │ str r2, [sp, #44] @ 0x2c │ │ mov r2, sl │ │ str r5, [sp, #52] @ 0x34 │ │ add.w sl, sl, r1, lsl #3 │ │ mov r1, r2 │ │ str r2, [sp, #84] @ 0x54 │ │ mov.w r2, r8, lsl #3 │ │ mov r0, r6 │ │ cmp r4, r9 │ │ it hi │ │ movhi r1, sl │ │ - bl d4c50 │ │ + bl d50a2 │ │ add.w fp, r6, r8, lsl #3 │ │ cmp r4, r9 │ │ - bls.n 876c8 │ │ + bls.n 87730 │ │ ldr.w r9, [sp, #32] │ │ ldr.w r5, [sl, #-8] │ │ sub.w r8, fp, #24 │ │ ldr.w r0, [fp, #-8] │ │ sub.w sl, sl, #24 │ │ cmp r0, r5 │ │ - bcs.n 8766c │ │ + bcs.n 876d4 │ │ mov.w ip, #1 │ │ mov lr, sl │ │ - b.n 87696 │ │ + b.n 876fe │ │ ldrd r6, ip, [sl] │ │ cmp r0, r5 │ │ ldrd r4, lr, [r8] │ │ mov.w r0, #0 │ │ it ls │ │ movls r0, #1 │ │ subs r4, r4, r6 │ │ @@ -143869,24 +143782,24 @@ │ │ eor.w r1, ip, #1 │ │ orr.w r0, ip, ip, lsl #1 │ │ orr.w r1, r1, r1, lsl #1 │ │ add.w fp, r8, r0, lsl #3 │ │ ldr r0, [sp, #84] @ 0x54 │ │ add.w sl, sl, r1, lsl #3 │ │ cmp sl, r0 │ │ - beq.n 876c2 │ │ + beq.n 8772a │ │ ldr r0, [sp, #76] @ 0x4c │ │ sub.w r9, r9, #24 │ │ cmp fp, r0 │ │ - bne.n 87650 │ │ + bne.n 876b8 │ │ mov r0, sl │ │ ldr r1, [sp, #76] @ 0x4c │ │ - b.n 87748 │ │ + b.n 877b0 │ │ mov r1, r6 │ │ - b.n 87730 │ │ + b.n 87798 │ │ ldrd r5, ip, [r1] │ │ cmp r3, r2 │ │ ldrd r4, lr, [sl] │ │ mov.w r2, #0 │ │ it ls │ │ movls r2, #1 │ │ mov r8, r1 │ │ @@ -143912,104 +143825,104 @@ │ │ itttt ne │ │ ldrne r0, [sp, #80] @ 0x50 │ │ addne.w r0, r0, r0, lsl #1 │ │ addne.w sl, sl, r0, lsl #3 │ │ ldrne r0, [sp, #72] @ 0x48 │ │ it ne │ │ cmpne sl, r0 │ │ - beq.n 87746 │ │ + beq.n 877ae │ │ ldr r2, [r1, #16] │ │ ldr.w r3, [sl, #16] │ │ cmp r3, r2 │ │ - bcs.n 876cc │ │ + bcs.n 87734 │ │ movs r0, #1 │ │ mov.w lr, #0 │ │ str r0, [sp, #80] @ 0x50 │ │ mov r8, sl │ │ - b.n 876fc │ │ + b.n 87764 │ │ ldr r0, [sp, #84] @ 0x54 │ │ sub.w r2, fp, r1 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr.w fp, [sp, #36] @ 0x24 │ │ ldr r5, [sp, #52] @ 0x34 │ │ ldr r3, [sp, #60] @ 0x3c │ │ ldr r1, [sp, #68] @ 0x44 │ │ ldr r2, [sp, #44] @ 0x2c │ │ - b.n 87600 │ │ + b.n 87668 │ │ movs r5, #1 │ │ ldr r0, [sp, #40] @ 0x28 │ │ sub.w r1, r7, #94 @ 0x5e │ │ cmp r0, r9 │ │ strb r3, [r1, r5] │ │ add r1, sp, #88 @ 0x58 │ │ str.w r8, [r1, r5, lsl #2] │ │ - bls.w 87902 │ │ + bls.w 8796a │ │ ldr.w r8, [sp, #48] @ 0x30 │ │ adds r5, #1 │ │ add.w r9, r9, r8, lsr #1 │ │ add.w r2, r9, r9, lsl #1 │ │ cmp r0, r9 │ │ str.w r9, [sp, #64] @ 0x40 │ │ - bls.w 874b0 │ │ - b.n 8747e │ │ + bls.w 87518 │ │ + b.n 874e6 │ │ ldr r1, [r0, #16] │ │ ldr r6, [r0, #40] @ 0x28 │ │ str r4, [sp, #84] @ 0x54 │ │ cmp r6, r1 │ │ - bcc.n 877ae │ │ + bcc.n 87816 │ │ ldrd lr, ip, [r0, #24] │ │ cmp r6, r1 │ │ - bhi.n 877f8 │ │ + bhi.n 87860 │ │ ldrd r1, r2, [r0] │ │ subs.w r1, lr, r1 │ │ sbcs.w r1, ip, r2 │ │ - bcs.n 877f8 │ │ + bcs.n 87860 │ │ cmp r4, #2 │ │ - bne.n 877bc │ │ + bne.n 87824 │ │ mov.w sl, #2 │ │ mov.w ip, #1 │ │ - b.n 87810 │ │ + b.n 87878 │ │ ldr r2, [sp, #68] @ 0x44 │ │ mov.w sl, #2 │ │ ldr r1, [sp, #12] │ │ add.w r5, r1, r2, lsl #3 │ │ - b.n 877d6 │ │ + b.n 8783e │ │ add.w sl, sl, #1 │ │ adds r5, #24 │ │ mov r6, r2 │ │ cmp r4, sl │ │ - beq.n 87806 │ │ + beq.n 8786e │ │ ldr r2, [r5, #16] │ │ cmp r2, r6 │ │ - bcc.n 877ca │ │ + bcc.n 87832 │ │ mov.w ip, #1 │ │ cmp r2, r6 │ │ - bhi.n 8780c │ │ + bhi.n 87874 │ │ ldrd r6, lr, [r5, #-24] │ │ ldrd r3, r4, [r5] │ │ subs r3, r3, r6 │ │ sbcs.w r3, r4, lr │ │ ldr r4, [sp, #84] @ 0x54 │ │ - bcc.n 877ca │ │ - b.n 8780c │ │ + bcc.n 87832 │ │ + b.n 87874 │ │ cmp r4, #2 │ │ - bne.n 878a4 │ │ + bne.n 8790c │ │ mov.w sl, #2 │ │ mov.w ip, #0 │ │ - b.n 87810 │ │ + b.n 87878 │ │ mov.w ip, #1 │ │ mov sl, r4 │ │ ldr.w r9, [sp, #64] @ 0x40 │ │ ldr r1, [sp, #28] │ │ cmp sl, r1 │ │ - bcc.w 87494 │ │ + bcc.w 874fc │ │ cmp.w ip, #0 │ │ - beq.n 878a0 │ │ + beq.n 87908 │ │ movs.w r0, sl, lsr #1 │ │ - beq.n 878ec │ │ + beq.n 87954 │ │ add.w r2, sl, sl, lsl #1 │ │ ldr r1, [sp, #8] │ │ ldr r6, [sp, #56] @ 0x38 │ │ add.w r2, r1, r2, lsl #3 │ │ ldr r1, [sp, #68] @ 0x44 │ │ lsls r3, r1, #3 │ │ ldr r1, [r6, r3] │ │ @@ -144039,150 +143952,150 @@ │ │ strd r1, r9, [r5, #12] │ │ ldr.w ip, [r5, #20] │ │ ldr r1, [r4, #8] │ │ str.w fp, [r5, #4] │ │ str.w lr, [r4, #4] │ │ str r1, [r5, #20] │ │ str.w ip, [r4, #8] │ │ - bne.n 87834 │ │ + bne.n 8789c │ │ mov r4, sl │ │ ldr.w fp, [sp, #36] @ 0x24 │ │ ldr.w r9, [sp, #64] @ 0x40 │ │ - b.n 874c2 │ │ + b.n 8752a │ │ mov r4, sl │ │ - b.n 874c2 │ │ + b.n 8752a │ │ ldr r2, [sp, #68] @ 0x44 │ │ mov.w sl, #2 │ │ ldr r1, [sp, #12] │ │ add.w r4, r1, r2, lsl #3 │ │ - b.n 878c8 │ │ + b.n 87930 │ │ ldr.w r9, [sp, #64] @ 0x40 │ │ adds r4, #24 │ │ add.w sl, sl, #1 │ │ ldr r1, [sp, #84] @ 0x54 │ │ mov lr, r3 │ │ mov ip, r5 │ │ mov r6, r2 │ │ cmp r1, sl │ │ - beq.n 878f8 │ │ + beq.n 87960 │ │ ldr r2, [r4, #16] │ │ cmp r2, r6 │ │ - bcc.n 878f0 │ │ + bcc.n 87958 │ │ ldrd r3, r5, [r4] │ │ cmp r2, r6 │ │ - bhi.n 878b2 │ │ + bhi.n 8791a │ │ subs.w r6, r3, lr │ │ sbcs.w r6, r5, ip │ │ - bcs.n 878b2 │ │ + bcs.n 8791a │ │ mov.w ip, #0 │ │ ldr.w r9, [sp, #64] @ 0x40 │ │ ldr r4, [sp, #84] @ 0x54 │ │ - b.n 87810 │ │ + b.n 87878 │ │ movs r4, #1 │ │ - b.n 874c2 │ │ + b.n 8752a │ │ mov.w ip, #0 │ │ ldr r4, [sp, #84] @ 0x54 │ │ - b.n 87810 │ │ + b.n 87878 │ │ ldr r4, [sp, #84] @ 0x54 │ │ mov.w ip, #0 │ │ mov sl, r4 │ │ - b.n 87810 │ │ + b.n 87878 │ │ movs.w r0, r8, lsl #31 │ │ - bne.n 87928 │ │ + bne.n 87990 │ │ ldr r1, [sp, #40] @ 0x28 │ │ movs r0, #0 │ │ orr.w r2, r1, #1 │ │ clz r3, r2 │ │ movs r2, #62 @ 0x3e │ │ eor.w r2, r2, r3, lsl #1 │ │ strd r2, r0, [sp] │ │ ldr r0, [sp, #56] @ 0x38 │ │ mov r3, fp │ │ ldr r2, [sp, #76] @ 0x4c │ │ - bl 87930 │ │ + bl 87998 │ │ add sp, #420 @ 0x1a4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #108 @ 0x6c │ │ mov r6, r1 │ │ mov r9, r0 │ │ cmp r1, #33 @ 0x21 │ │ str r3, [sp, #52] @ 0x34 │ │ str r2, [sp, #72] @ 0x48 │ │ - bcs.n 8794a │ │ + bcs.n 879b2 │ │ mov fp, r6 │ │ - b.n 87d06 │ │ + b.n 87d6e │ │ ldr r5, [r7, #8] │ │ ldr r0, [r7, #12] │ │ str r0, [sp, #48] @ 0x30 │ │ sub.w r0, r2, #24 │ │ str r0, [sp, #36] @ 0x24 │ │ str.w r9, [sp, #64] @ 0x40 │ │ cmp r5, #0 │ │ - beq.w 87cec │ │ + beq.w 87d54 │ │ lsrs r3, r6, #3 │ │ movs r0, #168 @ 0xa8 │ │ mla r2, r3, r0, r9 │ │ add.w r0, r3, r3, lsl #1 │ │ str r6, [sp, #60] @ 0x3c │ │ add.w r1, r9, r0, lsl #5 │ │ cmp r6, #64 @ 0x40 │ │ - bcs.n 879a0 │ │ + bcs.n 87a08 │ │ ldrd r0, r3, [r1] │ │ mov sl, r5 │ │ ldr r6, [r1, #16] │ │ ldr.w r5, [r9, #16] │ │ ldrd lr, ip, [r9] │ │ cmp r5, r6 │ │ str r0, [sp, #76] @ 0x4c │ │ str r3, [sp, #68] @ 0x44 │ │ - bcs.n 879a8 │ │ + bcs.n 87a10 │ │ ldr.w r8, [r2, #16] │ │ ldrd fp, r3, [r2] │ │ cmp r5, r8 │ │ - bcs.n 879e0 │ │ + bcs.n 87a48 │ │ movs r4, #1 │ │ mov r5, sl │ │ - b.n 87a20 │ │ + b.n 87a88 │ │ mov r0, r9 │ │ - bl 8830e │ │ - b.n 87a50 │ │ + bl 88376 │ │ + b.n 87ab8 │ │ ldrd r4, fp, [r2] │ │ cmp r5, r6 │ │ str r4, [sp, #56] @ 0x38 │ │ mov.w r4, #0 │ │ ldr.w r8, [r2, #16] │ │ it ls │ │ movls r4, #1 │ │ subs.w r0, lr, r0 │ │ sbcs.w r0, ip, r3 │ │ mov.w r0, #0 │ │ it cc │ │ movcc r0, #1 │ │ ands r4, r0 │ │ cmp r5, r8 │ │ - bcs.n 879f6 │ │ + bcs.n 87a5e │ │ mov r3, fp │ │ ldr.w fp, [sp, #56] @ 0x38 │ │ mov r0, r9 │ │ mov r5, sl │ │ - cbz r4, 87a50 │ │ - b.n 879f2 │ │ + cbz r4, 87ab8 │ │ + b.n 87a5a │ │ mov r0, r9 │ │ mov r5, sl │ │ - bhi.n 87a50 │ │ + bhi.n 87ab8 │ │ subs.w r0, lr, fp │ │ sbcs.w r0, ip, r3 │ │ mov r0, r9 │ │ - bcs.n 87a50 │ │ + bcs.n 87ab8 │ │ movs r4, #1 │ │ - b.n 87a20 │ │ + b.n 87a88 │ │ mov.w r0, #0 │ │ it ls │ │ movls r0, #1 │ │ ldr r3, [sp, #56] @ 0x38 │ │ subs.w r5, lr, r3 │ │ sbcs.w r5, ip, fp │ │ mov lr, r3 │ │ @@ -144191,19 +144104,19 @@ │ │ it cc │ │ movcc r5, #1 │ │ ands r0, r5 │ │ cmp r4, r0 │ │ mov r0, r9 │ │ mov r5, sl │ │ mov fp, lr │ │ - bne.n 87a50 │ │ + bne.n 87ab8 │ │ cmp r6, r8 │ │ - bcs.n 87a28 │ │ + bcs.n 87a90 │ │ movs r0, #1 │ │ - b.n 87a48 │ │ + b.n 87ab0 │ │ mov.w r0, #0 │ │ mov sl, r3 │ │ it ls │ │ movls r0, #1 │ │ ldr r3, [sp, #76] @ 0x4c │ │ subs.w r3, r3, fp │ │ ldr r3, [sp, #68] @ 0x44 │ │ @@ -144226,45 +144139,45 @@ │ │ str r0, [sp, #76] @ 0x4c │ │ muls r1, r2 │ │ str r1, [sp, #56] @ 0x38 │ │ mov r1, r0 │ │ ldmia.w r1, {r0, r2, r3, r4, r5, r6} │ │ stmia.w ip, {r0, r2, r3, r4, r5, r6} │ │ ldr r0, [sp, #48] @ 0x30 │ │ - cbz r0, 87aa2 │ │ + cbz r0, 87b0a │ │ ldr r0, [sp, #76] @ 0x4c │ │ ldr r1, [sp, #48] @ 0x30 │ │ ldr r0, [r0, #16] │ │ ldr r1, [r1, #16] │ │ cmp r1, r0 │ │ - bcc.n 87aa2 │ │ + bcc.n 87b0a │ │ cmp r1, r0 │ │ - bhi.w 87bd4 │ │ + bhi.w 87c3c │ │ ldr r0, [sp, #76] @ 0x4c │ │ ldr r2, [sp, #48] @ 0x30 │ │ ldrd r0, r1, [r0] │ │ ldrd r2, r3, [r2] │ │ subs r0, r2, r0 │ │ sbcs.w r0, r3, r1 │ │ - bcs.w 87bd4 │ │ + bcs.w 87c3c │ │ ldr r0, [sp, #52] @ 0x34 │ │ ldr r1, [sp, #60] @ 0x3c │ │ cmp r0, r1 │ │ ldr r0, [sp, #72] @ 0x48 │ │ - bcc.w 8813c │ │ + bcc.w 881a4 │ │ add.w r1, r1, r1, lsl #1 │ │ ldr.w lr, [sp, #56] @ 0x38 │ │ str r1, [sp, #40] @ 0x28 │ │ mov sl, r9 │ │ add.w fp, r0, r1, lsl #3 │ │ movs r1, #0 │ │ add.w r0, lr, lr, lsl #1 │ │ str.w lr, [sp, #68] @ 0x44 │ │ add.w lr, r9, r0, lsl #3 │ │ - b.n 87b16 │ │ + b.n 87b7e │ │ ldrd r5, r4, [r2] │ │ cmp r6, r0 │ │ ldrd r3, r9, [sl] │ │ mov.w r0, #0 │ │ it ls │ │ movls r0, #1 │ │ mov r2, r1 │ │ @@ -144283,94 +144196,94 @@ │ │ add r1, r9 │ │ add.w r0, r0, r3, lsl #3 │ │ mov r3, sl │ │ ldmia.w r3, {r2, r4, r5, r6, r8, ip} │ │ add.w sl, sl, #24 │ │ stmia.w r0, {r2, r4, r5, r6, r8, ip} │ │ cmp sl, lr │ │ - bcs.n 87b32 │ │ + bcs.n 87b9a │ │ ldr r2, [sp, #76] @ 0x4c │ │ sub.w fp, fp, #24 │ │ ldr.w r6, [sl, #16] │ │ ldr r0, [r2, #16] │ │ cmp r6, r0 │ │ - bcs.n 87ace │ │ + bcs.n 87b36 │ │ mov.w r9, #1 │ │ ldr r0, [sp, #72] @ 0x48 │ │ - b.n 87afe │ │ + b.n 87b66 │ │ ldr.w lr, [sp, #60] @ 0x3c │ │ mov r8, r1 │ │ ldr r0, [sp, #68] @ 0x44 │ │ cmp r0, lr │ │ add.w r0, r1, r1, lsl #1 │ │ - beq.n 87b60 │ │ + beq.n 87bc8 │ │ sub.w fp, fp, #24 │ │ mov r2, sl │ │ add.w ip, fp, r0, lsl #3 │ │ ldmia.w r2, {r0, r1, r3, r4, r5, r6} │ │ add.w sl, sl, #24 │ │ stmia.w ip, {r0, r1, r3, r4, r5, r6} │ │ mov r1, r8 │ │ ldr.w r9, [sp, #64] @ 0x40 │ │ - b.n 87ac0 │ │ + b.n 87b28 │ │ str r0, [sp, #68] @ 0x44 │ │ lsls r2, r0, #3 │ │ ldr r0, [sp, #64] @ 0x40 │ │ mov r4, lr │ │ ldr r1, [sp, #72] @ 0x48 │ │ - bl d4c50 │ │ + bl d50a2 │ │ subs.w r1, r4, r8 │ │ - beq.n 87ba0 │ │ + beq.n 87c08 │ │ ldrd r0, r2, [sp, #36] @ 0x24 │ │ mov lr, r1 │ │ add.w r9, r0, r2, lsl #3 │ │ ldrd r0, r2, [sp, #64] @ 0x40 │ │ add.w sl, r0, r2, lsl #3 │ │ mov ip, r9 │ │ mov r2, sl │ │ ldmia.w ip, {r0, r3, r4, r5, r6, fp} │ │ sub.w r9, r9, #24 │ │ add.w sl, sl, #24 │ │ subs.w lr, lr, #1 │ │ stmia.w r2, {r0, r3, r4, r5, r6, fp} │ │ - bne.n 87b86 │ │ + bne.n 87bee │ │ ldr.w r9, [sp, #64] @ 0x40 │ │ cmp.w r8, #0 │ │ - beq.n 87bd4 │ │ + beq.n 87c3c │ │ ldr r2, [sp, #72] @ 0x48 │ │ ldr r0, [sp, #60] @ 0x3c │ │ cmp r0, r8 │ │ - bcc.w 8812a │ │ + bcc.w 88192 │ │ add r0, sp, #80 @ 0x50 │ │ ldr r5, [sp, #44] @ 0x2c │ │ ldr r3, [sp, #52] @ 0x34 │ │ strd r5, r0, [sp] │ │ ldr r0, [sp, #68] @ 0x44 │ │ add.w r0, r9, r0, lsl #3 │ │ - bl 87930 │ │ + bl 87998 │ │ mov r6, r8 │ │ cmp.w r8, #33 @ 0x21 │ │ - bcs.w 8795a │ │ - b.n 87d04 │ │ + bcs.w 879c2 │ │ + b.n 87d6c │ │ ldr r0, [sp, #52] @ 0x34 │ │ ldr r1, [sp, #60] @ 0x3c │ │ cmp r0, r1 │ │ ldr r0, [sp, #72] @ 0x48 │ │ - bcc.w 8813c │ │ + bcc.w 881a4 │ │ add.w r1, r1, r1, lsl #1 │ │ ldr.w r8, [sp, #56] @ 0x38 │ │ mov sl, r9 │ │ mov.w r9, #0 │ │ add.w lr, r0, r1, lsl #3 │ │ str r1, [sp, #68] @ 0x44 │ │ add.w r0, r8, r8, lsl #1 │ │ ldr r1, [sp, #64] @ 0x40 │ │ str.w r8, [sp, #56] @ 0x38 │ │ add.w ip, r1, r0, lsl #3 │ │ - b.n 87c48 │ │ + b.n 87cb0 │ │ ldrd r5, r8, [sl] │ │ cmp r0, r3 │ │ ldrd r4, r2, [r1] │ │ mov.w r0, #0 │ │ it hi │ │ movhi r0, #1 │ │ subs r3, r4, r5 │ │ @@ -144387,100 +144300,100 @@ │ │ add r9, r8 │ │ add.w fp, r0, r2, lsl #3 │ │ mov r2, sl │ │ ldmia.w r2, {r0, r1, r3, r4, r5, r6} │ │ add.w sl, sl, #24 │ │ stmia.w fp, {r0, r1, r3, r4, r5, r6} │ │ cmp sl, ip │ │ - bcs.n 87c64 │ │ + bcs.n 87ccc │ │ ldr r1, [sp, #76] @ 0x4c │ │ sub.w lr, lr, #24 │ │ ldr.w r3, [sl, #16] │ │ ldr r0, [r1, #16] │ │ cmp r0, r3 │ │ - bcs.n 87c04 │ │ + bcs.n 87c6c │ │ mov.w r8, #0 │ │ mov r0, lr │ │ - b.n 87c30 │ │ + b.n 87c98 │ │ ldrd r0, r8, [sp, #56] @ 0x38 │ │ add.w r5, r9, r9, lsl #1 │ │ cmp r0, r8 │ │ - beq.n 87c8e │ │ + beq.n 87cf6 │ │ ldr r0, [sp, #72] @ 0x48 │ │ mov r1, sl │ │ add.w sl, sl, #24 │ │ add.w r9, r9, #1 │ │ add.w ip, r0, r5, lsl #3 │ │ ldmia.w r1, {r0, r2, r3, r4, r5, r6} │ │ sub.w lr, lr, #24 │ │ stmia.w ip, {r0, r2, r3, r4, r5, r6} │ │ - b.n 87bf4 │ │ + b.n 87c5c │ │ ldr.w sl, [sp, #64] @ 0x40 │ │ lsls r2, r5, #3 │ │ ldr r1, [sp, #72] @ 0x48 │ │ mov r0, sl │ │ - bl d4c50 │ │ + bl d50a2 │ │ subs.w lr, r8, r9 │ │ - beq.w 88122 │ │ + beq.w 8818a │ │ ldr r1, [sp, #68] @ 0x44 │ │ add.w sl, sl, r5, lsl #3 │ │ ldr r0, [sp, #36] @ 0x24 │ │ mov fp, lr │ │ str.w sl, [sp, #64] @ 0x40 │ │ add.w r8, r0, r1, lsl #3 │ │ mov ip, r8 │ │ mov r2, sl │ │ ldmia.w ip, {r0, r1, r3, r4, r5, r6} │ │ sub.w r8, r8, #24 │ │ add.w sl, sl, #24 │ │ subs.w lr, lr, #1 │ │ stmia r2!, {r0, r1, r3, r4, r5, r6} │ │ - bne.n 87cb6 │ │ + bne.n 87d1e │ │ ldr r1, [sp, #60] @ 0x3c │ │ cmp r1, r9 │ │ - bcc.w 8813e │ │ + bcc.w 881a6 │ │ ldr.w r9, [sp, #64] @ 0x40 │ │ movs r0, #0 │ │ ldr r5, [sp, #44] @ 0x2c │ │ mov r6, fp │ │ cmp.w fp, #33 @ 0x21 │ │ str r0, [sp, #48] @ 0x30 │ │ - bcs.w 87956 │ │ - b.n 87d06 │ │ + bcs.w 879be │ │ + b.n 87d6e │ │ ldr r2, [sp, #72] @ 0x48 │ │ movs r0, #1 │ │ ldr r3, [sp, #52] @ 0x34 │ │ mov r1, r6 │ │ str r0, [sp, #0] │ │ mov r0, r9 │ │ - bl 873d8 │ │ + bl 87440 │ │ add sp, #108 @ 0x6c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov fp, r8 │ │ movs.w r4, fp, lsr #1 │ │ - beq.w 88122 │ │ + beq.w 8818a │ │ add.w r0, r4, r4, lsl #1 │ │ ldr.w sl, [sp, #72] @ 0x48 │ │ str.w fp, [sp, #8] │ │ cmp.w fp, #8 │ │ add.w r8, sl, r0, lsl #3 │ │ add.w r5, r9, r0, lsl #3 │ │ str.w r8, [sp, #68] @ 0x44 │ │ str r5, [sp, #16] │ │ str r4, [sp, #52] @ 0x34 │ │ - bcc.n 87d44 │ │ + bcc.n 87dac │ │ mov r0, r9 │ │ mov r1, sl │ │ - bl 8816c │ │ + bl 881d4 │ │ mov r0, r5 │ │ mov r1, r8 │ │ - bl 8816c │ │ + bl 881d4 │ │ movs r1, #4 │ │ - b.n 87d5c │ │ + b.n 87dc4 │ │ mov ip, r9 │ │ mov lr, r5 │ │ ldmia.w ip, {r0, r2, r3, r4, r5, r6} │ │ mov r1, sl │ │ stmia r1!, {r0, r2, r3, r4, r5, r6} │ │ movs r1, #1 │ │ ldmia.w lr, {r0, r2, r3, r4, r5, r6} │ │ @@ -144490,27 +144403,27 @@ │ │ cmp r1, r4 │ │ str.w r9, [sp, #64] @ 0x40 │ │ sub.w r0, r0, r4 │ │ str r0, [sp, #12] │ │ add.w r0, r1, r1, lsl #1 │ │ str r1, [sp, #48] @ 0x30 │ │ str r0, [sp, #20] │ │ - bcs.w 87e8a │ │ + bcs.w 87ef2 │ │ ldr r1, [sp, #20] │ │ mvn.w r0, #47 @ 0x2f │ │ ldr.w ip, [sp, #48] @ 0x30 │ │ add.w r0, r0, r1, lsl #3 │ │ str r0, [sp, #56] @ 0x38 │ │ mvn.w r0, #31 │ │ add.w r0, r0, r1, lsl #3 │ │ str r0, [sp, #44] @ 0x2c │ │ mvn.w r0, #23 │ │ add.w r0, r0, r1, lsl #3 │ │ str r0, [sp, #40] @ 0x28 │ │ - b.n 87dde │ │ + b.n 87e46 │ │ mov lr, sl │ │ ldr.w ip, [sp, #36] @ 0x24 │ │ ldr.w r8, [sp, #24] │ │ ldr r0, [sp, #76] @ 0x4c │ │ str.w r0, [lr] │ │ ldr r0, [sp, #60] @ 0x3c │ │ str.w r0, [lr, #4] │ │ @@ -144527,15 +144440,15 @@ │ │ adds r0, #24 │ │ str r0, [sp, #44] @ 0x2c │ │ ldr r0, [sp, #40] @ 0x28 │ │ adds r0, #24 │ │ str r0, [sp, #40] @ 0x28 │ │ ldr r0, [sp, #52] @ 0x34 │ │ cmp ip, r0 │ │ - beq.n 87e8a │ │ + beq.n 87ef2 │ │ add.w r8, ip, ip, lsl #1 │ │ ldr r0, [sp, #64] @ 0x40 │ │ str.w ip, [sp, #36] @ 0x24 │ │ add.w ip, r0, r8, lsl #3 │ │ add.w r9, sl, r8, lsl #3 │ │ sub.w lr, r9, #24 │ │ ldmia.w ip, {r0, r1, r3, r4, r5, r6} │ │ @@ -144546,70 +144459,70 @@ │ │ str r0, [sp, #76] @ 0x4c │ │ ldr.w r0, [r9, #16] │ │ ldr.w r3, [r9, #-8] │ │ ldr.w r1, [r9, #4] │ │ mov fp, r0 │ │ cmp r0, r3 │ │ str r1, [sp, #60] @ 0x3c │ │ - bcc.n 87e2c │ │ - bhi.n 87dc2 │ │ + bcc.n 87e94 │ │ + bhi.n 87e2a │ │ ldrd r3, r5, [lr] │ │ ldr r0, [sp, #76] @ 0x4c │ │ subs r3, r0, r3 │ │ ldr r0, [sp, #60] @ 0x3c │ │ sbcs.w r3, r0, r5 │ │ - bcs.n 87dc2 │ │ + bcs.n 87e2a │ │ ldrd r1, r0, [r9, #8] │ │ mov r3, lr │ │ strd r1, r0, [sp, #28] │ │ cmp.w ip, #1 │ │ ldr.w r8, [r9, #20] │ │ ldmia.w r3, {r0, r1, r2, r4, r5, r6} │ │ stmia.w r9, {r0, r1, r2, r4, r5, r6} │ │ - beq.n 87da6 │ │ + beq.n 87e0e │ │ str.w r8, [sp, #24] │ │ ldr r3, [sp, #56] @ 0x38 │ │ ldrd ip, r8, [sp, #40] @ 0x28 │ │ - b.n 87e68 │ │ + b.n 87ed0 │ │ ldmia.w r9, {r0, r1, r2, r4, r5, r6} │ │ sub.w r8, r8, #24 │ │ subs r3, #24 │ │ subs.w ip, ip, #24 │ │ stmia.w lr, {r0, r1, r2, r4, r5, r6} │ │ - beq.n 87d9c │ │ + beq.n 87e04 │ │ ldr.w r0, [sl, r8] │ │ add.w r9, sl, r3 │ │ add.w lr, sl, ip │ │ cmp fp, r0 │ │ - bcc.n 87e54 │ │ - bhi.n 87d9e │ │ + bcc.n 87ebc │ │ + bhi.n 87e06 │ │ ldrd r0, r1, [r9] │ │ ldr r2, [sp, #76] @ 0x4c │ │ subs r0, r2, r0 │ │ ldr r0, [sp, #60] @ 0x3c │ │ sbcs r0, r1 │ │ - bcc.n 87e54 │ │ - b.n 87d9e │ │ + bcc.n 87ebc │ │ + b.n 87e06 │ │ ldr.w ip, [sp, #48] @ 0x30 │ │ ldr r0, [sp, #12] │ │ ldr r1, [sp, #16] │ │ cmp ip, r0 │ │ ldr r0, [sp, #68] @ 0x44 │ │ - bcs.w 87fb8 │ │ + bcs.w 88020 │ │ sub.w r2, r0, #48 @ 0x30 │ │ str r2, [sp, #32] │ │ sub.w r2, r0, #32 │ │ str r2, [sp, #44] @ 0x2c │ │ sub.w r2, r0, #24 │ │ str r2, [sp, #40] @ 0x28 │ │ ldr r2, [sp, #20] │ │ mov.w fp, r2, lsl #3 │ │ movs r2, #24 │ │ str r2, [sp, #36] @ 0x24 │ │ - b.n 87f0a │ │ + b.n 87f72 │ │ ldr.w sl, [sp, #68] @ 0x44 │ │ ldr.w ip, [sp, #48] @ 0x30 │ │ ldr r0, [sp, #60] @ 0x3c │ │ str.w r0, [sl] │ │ ldr r0, [sp, #56] @ 0x38 │ │ str.w r0, [sl, #4] │ │ ldr r0, [sp, #20] │ │ @@ -144633,15 +144546,15 @@ │ │ str r1, [sp, #44] @ 0x2c │ │ ldr r1, [sp, #40] @ 0x28 │ │ adds r1, #24 │ │ str r1, [sp, #40] @ 0x28 │ │ ldr r1, [sp, #12] │ │ cmp ip, r1 │ │ ldr r1, [sp, #16] │ │ - beq.n 87fb8 │ │ + beq.n 88020 │ │ add.w r8, ip, ip, lsl #1 │ │ str.w ip, [sp, #48] @ 0x30 │ │ add.w ip, r1, r8, lsl #3 │ │ add.w r9, r0, r8, lsl #3 │ │ sub.w sl, r9, #24 │ │ ldmia.w ip, {r0, r1, r2, r4, r5, r6} │ │ mov r3, r9 │ │ @@ -144652,68 +144565,68 @@ │ │ ldr.w r2, [r0, r8, lsl #3] │ │ ldr.w r3, [r9, #4] │ │ str r2, [sp, #60] @ 0x3c │ │ ldr.w r2, [r9, #16] │ │ str r3, [sp, #56] @ 0x38 │ │ cmp r2, r1 │ │ str r2, [sp, #76] @ 0x4c │ │ - bcc.n 87f56 │ │ - bhi.n 87ee6 │ │ + bcc.n 87fbe │ │ + bhi.n 87f4e │ │ ldrd r1, r2, [sl] │ │ ldr r3, [sp, #60] @ 0x3c │ │ subs r1, r3, r1 │ │ ldr r1, [sp, #56] @ 0x38 │ │ sbcs r1, r2 │ │ - bcs.n 87ee6 │ │ + bcs.n 87f4e │ │ ldrd r1, r0, [r9, #8] │ │ cmp.w ip, #1 │ │ strd r1, r0, [sp, #20] │ │ mov r1, sl │ │ ldr.w r0, [r9, #20] │ │ str r0, [sp, #28] │ │ ldmia.w r1, {r0, r2, r3, r4, r5, r6} │ │ stmia.w r9, {r0, r2, r3, r4, r5, r6} │ │ - beq.n 87ec0 │ │ + beq.n 87f28 │ │ ldrd r9, r5, [sp, #32] │ │ ldrd r1, r2, [sp, #40] @ 0x28 │ │ - b.n 87f94 │ │ + b.n 87ffc │ │ ldmia.w ip, {r0, r3, r4, r6, r8, lr} │ │ adds r5, #24 │ │ subs r2, #24 │ │ sub.w r9, r9, #24 │ │ subs r1, #24 │ │ cmp fp, r5 │ │ stmia.w sl, {r0, r3, r4, r6, r8, lr} │ │ - beq.n 87eb8 │ │ + beq.n 87f20 │ │ ldr.w r0, [r2, fp] │ │ add.w ip, r9, fp │ │ ldr r3, [sp, #76] @ 0x4c │ │ add.w sl, r1, fp │ │ cmp r3, r0 │ │ - bcc.n 87f7e │ │ - bhi.n 87ebc │ │ + bcc.n 87fe6 │ │ + bhi.n 87f24 │ │ ldrd r0, r4, [ip] │ │ ldr r3, [sp, #60] @ 0x3c │ │ subs r0, r3, r0 │ │ ldr r0, [sp, #56] @ 0x38 │ │ sbcs r0, r4 │ │ - bcc.n 87f7e │ │ - b.n 87ebc │ │ + bcc.n 87fe6 │ │ + b.n 87f24 │ │ mov r1, r0 │ │ ldr r0, [sp, #8] │ │ ldr.w sl, [sp, #72] @ 0x48 │ │ sub.w r8, r1, #24 │ │ ldr.w r9, [sp, #64] @ 0x40 │ │ add.w r2, r0, r0, lsl #1 │ │ mvn.w r0, #23 │ │ str r2, [sp, #44] @ 0x2c │ │ add.w r6, r0, r2, lsl #3 │ │ str.w r9, [sp, #76] @ 0x4c │ │ add.w r2, sl, r6 │ │ - b.n 88040 │ │ + b.n 880a8 │ │ ldrd r1, r2, [r8] │ │ cmp r6, r5 │ │ ldrd r3, r4, [lr] │ │ mov.w r6, #0 │ │ it ls │ │ movls r6, #1 │ │ mov r9, lr │ │ @@ -144739,24 +144652,24 @@ │ │ add.w r0, ip, ip, lsl #1 │ │ subs r6, #24 │ │ add.w r0, lr, r0, lsl #3 │ │ sub.w r2, r0, #24 │ │ ldr r0, [sp, #52] @ 0x34 │ │ subs r0, #1 │ │ str r0, [sp, #52] @ 0x34 │ │ - beq.n 880c6 │ │ + beq.n 8812e │ │ ldr.w fp, [sp, #68] @ 0x44 │ │ mov r0, r2 │ │ ldr.w r1, [sl, #16] │ │ ldr.w r5, [fp, #16] │ │ cmp r5, r1 │ │ - bcs.n 88058 │ │ + bcs.n 880c0 │ │ movs r1, #1 │ │ mov r5, fp │ │ - b.n 88084 │ │ + b.n 880ec │ │ ldrd r4, r9, [sl] │ │ cmp r5, r1 │ │ ldrd r2, ip, [fp] │ │ mov.w r1, #0 │ │ it ls │ │ movls r1, #1 │ │ mov r5, sl │ │ @@ -144782,22 +144695,22 @@ │ │ ldr r6, [r0, #16] │ │ orr.w r1, r1, r1, lsl #1 │ │ add.w fp, fp, r2, lsl #3 │ │ str.w fp, [sp, #68] @ 0x44 │ │ add.w sl, sl, r1, lsl #3 │ │ cmp r6, r5 │ │ str.w sl, [sp, #60] @ 0x3c │ │ - bcs.n 87fe0 │ │ + bcs.n 88048 │ │ mov.w ip, #1 │ │ mov r9, r8 │ │ - b.n 8800a │ │ + b.n 88072 │ │ ldr r0, [sp, #8] │ │ add.w ip, r8, #24 │ │ lsls r0, r0, #31 │ │ - beq.n 88114 │ │ + beq.n 8817c │ │ ldr.w lr, [sp, #68] @ 0x44 │ │ cmp sl, ip │ │ mov r8, r2 │ │ mov r0, lr │ │ it cc │ │ movcc r0, sl │ │ ldr.w sl, [sp, #76] @ 0x4c │ │ @@ -144817,56 +144730,56 @@ │ │ orr.w r0, r0, r0, lsl #1 │ │ add.w sl, sl, r0, lsl #3 │ │ cmp sl, ip │ │ ittt eq │ │ addeq.w r0, r2, #24 │ │ ldreq r1, [sp, #68] @ 0x44 │ │ cmpeq r1, r0 │ │ - bne.n 88138 │ │ + bne.n 881a0 │ │ add sp, #108 @ 0x6c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #56] @ (88164 ) │ │ + ldr r0, [pc, #56] @ (881cc ) │ │ movs r1, #19 │ │ - ldr r2, [pc, #56] @ (88168 ) │ │ + ldr r2, [pc, #56] @ (881d0 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ - bl 413cc │ │ + bl 3fd60 │ │ + bl 416d4 │ │ udf #254 @ 0xfe │ │ - ldr r3, [pc, #32] @ (88160 ) │ │ + ldr r3, [pc, #32] @ (881c8 ) │ │ mov r0, r9 │ │ mov r2, r1 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ mov r5, r0 │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldr r1, [sp, #72] @ 0x48 │ │ lsls r2, r0, #3 │ │ mov r0, r9 │ │ - bl d4c50 │ │ + bl d50a2 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ nop │ │ - subs r4, #24 │ │ + subs r3, #192 @ 0xc0 │ │ movs r5, r0 │ │ - lsrs r7, r4, #25 │ │ - vcvt.f16.u16 d19, d10, #7 │ │ + lsrs r7, r7, #23 │ │ + vtbx.8 d19, {d25-d28}, d2 │ │ movs r5, r0 │ │ push {r4, r5, r6, lr} │ │ stmdb sp!, {r8, r9, sl, fp} │ │ ldr r2, [r0, #16] │ │ ldr r3, [r0, #40] @ 0x28 │ │ cmp r3, r2 │ │ - bcs.n 881c0 │ │ + bcs.n 88228 │ │ movs r5, #1 │ │ ldr r2, [r0, #64] @ 0x40 │ │ ldr r6, [r0, #88] @ 0x58 │ │ cmp r6, r2 │ │ - bcc.n 881e8 │ │ + bcc.n 88250 │ │ mov r3, r0 │ │ cmp r6, r2 │ │ ldr.w ip, [r3, #48]! │ │ mov.w r6, #0 │ │ mov.w r4, #0 │ │ mov r8, r3 │ │ ldr.w r9, [r3, #4] │ │ @@ -144880,15 +144793,15 @@ │ │ movcc r4, #1 │ │ movs r2, #3 │ │ tst r6, r4 │ │ it eq │ │ moveq r8, r3 │ │ it ne │ │ movne r2, #2 │ │ - b.n 881ee │ │ + b.n 88256 │ │ ldrd r6, ip, [r0] │ │ cmp r3, r2 │ │ ldrd r4, lr, [r0, #24] │ │ mov.w r2, #0 │ │ it ls │ │ movls r2, #1 │ │ movs r5, #0 │ │ @@ -144896,33 +144809,33 @@ │ │ sbcs.w r3, lr, ip │ │ it cc │ │ movcc r5, #1 │ │ ands r5, r2 │ │ ldr r2, [r0, #64] @ 0x40 │ │ ldr r6, [r0, #88] @ 0x58 │ │ cmp r6, r2 │ │ - bcs.n 88184 │ │ + bcs.n 881ec │ │ add.w r8, r0, #72 @ 0x48 │ │ movs r2, #2 │ │ orr.w r3, r5, r5, lsl #1 │ │ add.w r2, r2, r2, lsl #1 │ │ ldr.w r4, [r8, #16] │ │ add.w ip, r0, r3, lsl #3 │ │ eor.w r3, r5, #1 │ │ add.w lr, r0, r2, lsl #3 │ │ orr.w r3, r3, r3, lsl #1 │ │ ldr.w r5, [ip, #16] │ │ add.w fp, r0, r3, lsl #3 │ │ cmp r4, r5 │ │ - bcs.n 8829e │ │ + bcs.n 88306 │ │ movs r4, #1 │ │ ldr.w r6, [fp, #16] │ │ ldr.w r0, [lr, #16] │ │ cmp r0, r6 │ │ - bcc.n 882ca │ │ + bcc.n 88332 │ │ ldrd sl, r9, [fp] │ │ cmp r4, #0 │ │ ldrd r3, r2, [lr] │ │ mov r5, r8 │ │ it ne │ │ movne r5, fp │ │ cmp r0, r6 │ │ @@ -144947,15 +144860,15 @@ │ │ movne fp, ip │ │ mov r4, fp │ │ mov fp, lr │ │ mov ip, r8 │ │ mov lr, r5 │ │ ldr r3, [r4, #16] │ │ cmp r0, r3 │ │ - bcc.n 882da │ │ + bcc.n 88342 │ │ ldrd sl, r8, [r4] │ │ cmp r0, r3 │ │ ldrd r6, r9, [lr] │ │ mov.w r0, #0 │ │ it ls │ │ movls r0, #1 │ │ movs r5, #0 │ │ @@ -144964,15 +144877,15 @@ │ │ mov r8, lr │ │ it cc │ │ movcc r5, #1 │ │ tst r0, r5 │ │ ite ne │ │ movne r8, r4 │ │ moveq lr, r4 │ │ - b.n 882dc │ │ + b.n 88344 │ │ ldrd r3, r9, [ip] │ │ cmp r4, r5 │ │ ldrd r6, sl, [r8] │ │ mov.w r4, #0 │ │ it ls │ │ movls r4, #1 │ │ movs r0, #0 │ │ @@ -144980,23 +144893,23 @@ │ │ sbcs.w r3, sl, r9 │ │ it cc │ │ movcc r0, #1 │ │ ands r4, r0 │ │ ldr.w r6, [fp, #16] │ │ ldr.w r0, [lr, #16] │ │ cmp r0, r6 │ │ - bcs.n 88224 │ │ + bcs.n 8828c │ │ cmp r4, #0 │ │ mov r4, r8 │ │ itt ne │ │ movne r4, ip │ │ movne ip, r8 │ │ ldr r3, [r4, #16] │ │ cmp r0, r3 │ │ - bcs.n 88272 │ │ + bcs.n 882da │ │ mov r8, r4 │ │ ldmia.w ip, {r0, r2, r4, r5, r6, r9} │ │ mov r3, r1 │ │ stmia.w r3, {r0, r2, r4, r5, r6, r9} │ │ add.w r0, r1, #24 │ │ ldmia.w lr, {r2, r3, r4, r5, r6, ip} │ │ stmia.w r0, {r2, r3, r4, r5, r6, ip} │ │ @@ -145011,54 +144924,54 @@ │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #12 │ │ mov r8, r2 │ │ mov r4, r1 │ │ cmp r3, #8 │ │ - bcc.n 88360 │ │ + bcc.n 883c8 │ │ lsrs r6, r3, #3 │ │ mov.w r9, #168 @ 0xa8 │ │ mla r2, r6, r9, r0 │ │ add.w r5, r6, r6, lsl #1 │ │ mov r3, r6 │ │ add.w r1, r0, r5, lsl #5 │ │ - bl 8830e │ │ + bl 88376 │ │ mla r2, r6, r9, r4 │ │ add.w r1, r4, r5, lsl #5 │ │ mov sl, r0 │ │ mov r0, r4 │ │ mov r3, r6 │ │ - bl 8830e │ │ + bl 88376 │ │ mla r2, r6, r9, r8 │ │ add.w r1, r8, r5, lsl #5 │ │ mov r4, r0 │ │ mov r0, r8 │ │ mov r3, r6 │ │ - bl 8830e │ │ + bl 88376 │ │ mov r8, r0 │ │ mov r0, sl │ │ ldrd r2, r3, [r4] │ │ ldr.w r9, [r4, #16] │ │ ldr.w ip, [r0, #16] │ │ ldrd r6, r1, [r0] │ │ cmp ip, r9 │ │ strd r2, r3, [sp, #4] │ │ - bcs.n 88394 │ │ + bcs.n 883fc │ │ ldr.w lr, [r8, #16] │ │ ldrd r5, sl, [r8] │ │ cmp ip, lr │ │ - bcc.n 8838e │ │ - bhi.n 88420 │ │ + bcc.n 883f6 │ │ + bhi.n 88488 │ │ subs r2, r6, r5 │ │ sbcs.w r1, r1, sl │ │ - bcs.n 88420 │ │ + bcs.n 88488 │ │ mov ip, r5 │ │ movs r3, #1 │ │ - b.n 883f2 │ │ + b.n 8845a │ │ ldrd sl, r5, [r8] │ │ cmp ip, r9 │ │ ldr.w lr, [r8, #16] │ │ mov.w fp, #0 │ │ str r5, [sp, #0] │ │ mov.w r5, #0 │ │ it ls │ │ @@ -145066,36 +144979,36 @@ │ │ subs r2, r6, r2 │ │ sbcs.w r2, r1, r3 │ │ mov.w r2, #0 │ │ it cc │ │ movcc r2, #1 │ │ and.w r3, r5, r2 │ │ cmp ip, lr │ │ - bcs.n 883ce │ │ + bcs.n 88436 │ │ mov ip, sl │ │ ldr.w sl, [sp] │ │ - cbz r3, 88420 │ │ + cbz r3, 88488 │ │ movs r3, #1 │ │ - b.n 883f2 │ │ + b.n 8845a │ │ mov.w r2, #0 │ │ mov ip, sl │ │ it ls │ │ movls r2, #1 │ │ subs.w r6, r6, sl │ │ ldr.w sl, [sp] │ │ sbcs.w r1, r1, sl │ │ it cc │ │ movcc.w fp, #1 │ │ and.w r1, r2, fp │ │ cmp r3, r1 │ │ - bne.n 88420 │ │ + bne.n 88488 │ │ cmp r9, lr │ │ - bcs.n 883fa │ │ + bcs.n 88462 │ │ movs r0, #1 │ │ - b.n 88418 │ │ + b.n 88480 │ │ mov.w r1, #0 │ │ mov.w r0, #0 │ │ it ls │ │ movls r1, #1 │ │ ldr r2, [sp, #4] │ │ subs.w r2, r2, ip │ │ ldr r2, [sp, #8] │ │ @@ -145122,18 +145035,18 @@ │ │ cmp r5, #8 │ │ it eq │ │ moveq r6, #12 │ │ add.w sl, r6, ip │ │ ldr.w lr, [r7, #8] │ │ sub.w r4, sl, fp │ │ cmp lr, r4 │ │ - bcc.n 884f6 │ │ + bcc.n 8855e │ │ sub.w r4, lr, r4 │ │ cmp r4, fp │ │ - bcs.n 884f6 │ │ + bcs.n 8855e │ │ str r0, [sp, #56] @ 0x38 │ │ mov.w r9, #0 │ │ ldr.w r0, [r3, #256] @ 0x100 │ │ str r1, [sp, #36] @ 0x24 │ │ sub.w r1, lr, r6 │ │ add.w r4, r0, #8 │ │ str r0, [sp, #44] @ 0x2c │ │ @@ -145147,40 +145060,40 @@ │ │ mov.w lr, #0 │ │ add.w r0, r8, fp │ │ strd r5, r2, [sp, #48] @ 0x30 │ │ str.w r9, [sp, #76] @ 0x4c │ │ add.w r8, r0, r4 │ │ cmp r6, #63 @ 0x3f │ │ ldrb.w fp, [r8], #1 │ │ - bne.n 884b2 │ │ + bne.n 8851a │ │ cmp.w fp, #1 │ │ - bhi.n 88508 │ │ + bhi.n 88570 │ │ and.w ip, r6, #63 @ 0x3f │ │ and.w r5, fp, #127 @ 0x7f │ │ rsb sl, ip, #32 │ │ subs.w r2, ip, #32 │ │ lsr.w r1, r5, sl │ │ it pl │ │ lslpl.w r1, r5, r2 │ │ orr.w lr, lr, r1 │ │ lsl.w r1, r5, ip │ │ it pl │ │ movpl r1, #0 │ │ orr.w r9, r9, r1 │ │ sxtb.w r1, fp │ │ cmp r1, #0 │ │ - bpl.n 88520 │ │ + bpl.n 88588 │ │ subs r3, #1 │ │ adds r6, #7 │ │ adds r4, #1 │ │ - bcc.n 884a0 │ │ + bcc.n 88508 │ │ mov.w lr, #0 │ │ movs r1, #19 │ │ mov r9, r0 │ │ - b.n 8850a │ │ + b.n 88572 │ │ movs r1, #0 │ │ str r1, [r0, #12] │ │ movs r1, #59 @ 0x3b │ │ strd r1, r8, [r0] │ │ add sp, #140 @ 0x8c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ @@ -145191,36 +145104,36 @@ │ │ strb.w fp, [r2, #1] │ │ stmia.w r1, {r0, r9, lr} │ │ add sp, #140 @ 0x8c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ orrs.w r1, r9, lr │ │ strd r8, r3, [sp, #60] @ 0x3c │ │ - beq.n 885b8 │ │ + beq.n 88620 │ │ ldr r3, [sp, #44] @ 0x2c │ │ cmp.w lr, #0 │ │ - bne.n 88546 │ │ + bne.n 885ae │ │ ldr r2, [r3, #16] │ │ sub.w r1, r9, #1 │ │ cmp r1, r2 │ │ - bcs.n 88546 │ │ + bcs.n 885ae │ │ movs r0, #104 @ 0x68 │ │ ldr r2, [r3, #12] │ │ mla r3, r1, r0, r2 │ │ - b.n 885d0 │ │ + b.n 88638 │ │ ldr.w sl, [r3, #20] │ │ cmp.w sl, #0 │ │ - beq.w 886ba │ │ + beq.w 88722 │ │ ldr r1, [r3, #24] │ │ str r1, [sp, #44] @ 0x2c │ │ ldrh.w r8, [sl, #1238] @ 0x4d6 │ │ mov.w r3, #4294967295 @ 0xffffffff │ │ mov r1, sl │ │ mov.w r6, r8, lsl #3 │ │ - cbz r6, 885a0 │ │ + cbz r6, 88608 │ │ ldrd r2, r4, [r1], #8 │ │ subs r6, #8 │ │ adds r3, #1 │ │ subs.w r5, r9, r2 │ │ sbcs.w r5, lr, r4 │ │ mov.w r5, #0 │ │ it cc │ │ @@ -145228,27 +145141,27 @@ │ │ subs.w r2, r2, r9 │ │ sbcs.w r2, r4, lr │ │ mov.w r2, #0 │ │ it cc │ │ movcc r2, #1 │ │ sub.w ip, r2, r5 │ │ cmp.w ip, #1 │ │ - beq.n 88564 │ │ + beq.n 885cc │ │ uxtb.w r1, ip │ │ - cbnz r1, 885a2 │ │ - b.n 885c6 │ │ + cbnz r1, 8860a │ │ + b.n 8862e │ │ mov r3, r8 │ │ ldr r2, [sp, #44] @ 0x2c │ │ cmp r2, #0 │ │ - beq.w 886ba │ │ + beq.w 88722 │ │ add.w r1, sl, r3, lsl #2 │ │ subs r2, #1 │ │ str r2, [sp, #44] @ 0x2c │ │ ldr.w sl, [r1, #1240] @ 0x4d8 │ │ - b.n 88556 │ │ + b.n 885be │ │ ldr r1, [sp, #56] @ 0x38 │ │ movs r0, #58 @ 0x3a │ │ strb r0, [r1, #0] │ │ add sp, #140 @ 0x8c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #104 @ 0x68 │ │ @@ -145259,119 +145172,119 @@ │ │ cmp r0, #1 │ │ ldr r6, [sp, #56] @ 0x38 │ │ itt eq │ │ moveq r0, #1 │ │ streq r0, [sp, #76] @ 0x4c │ │ ldr r0, [r3, #0] │ │ cmp r0, #1 │ │ - bne.n 885ee │ │ + bne.n 88656 │ │ ldrd r5, r1, [r3, #8] │ │ - cbnz r1, 885fe │ │ - b.n 886f6 │ │ + cbnz r1, 88666 │ │ + b.n 8875e │ │ ldr r1, [r3, #4] │ │ cmp r1, #6 │ │ - bcs.w 88742 │ │ + bcs.w 887aa │ │ add.w r5, r3, #8 │ │ cmp r1, #0 │ │ - beq.n 886f6 │ │ + beq.n 8875e │ │ ldr.w r0, [r2, #260] @ 0x104 │ │ add.w fp, sp, #80 @ 0x50 │ │ add r4, sp, #120 @ 0x78 │ │ str r0, [sp, #44] @ 0x2c │ │ mov.w r9, r1, lsl #4 │ │ movs r6, #0 │ │ mov.w r8, #46 @ 0x2e │ │ mov.w sl, #0 │ │ - b.n 8863a │ │ + b.n 886a2 │ │ cmp r0, #3 │ │ - beq.n 8868c │ │ + beq.n 886f4 │ │ cmp r0, #49 @ 0x31 │ │ - bne.n 88632 │ │ + bne.n 8869a │ │ mov r0, r4 │ │ mov r1, fp │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldr r0, [sp, #128] @ 0x80 │ │ ldrd r8, sl, [sp, #120] @ 0x78 │ │ str r0, [sp, #28] │ │ adds r5, #16 │ │ subs.w r9, r9, #16 │ │ - beq.n 886ce │ │ + beq.n 88736 │ │ ldr r0, [sp, #68] @ 0x44 │ │ add r1, sp, #60 @ 0x3c │ │ mov r3, r5 │ │ ldr r2, [r0, #32] │ │ mov r0, fp │ │ - bl 84988 │ │ + bl 849f0 │ │ ldrd r0, r1, [sp, #80] @ 0x50 │ │ eor.w r0, r0, #46 @ 0x2e │ │ orrs r0, r1 │ │ - beq.n 886be │ │ + beq.n 88726 │ │ ldrh.w r0, [sp, #96] @ 0x60 │ │ cmp r0, #70 @ 0x46 │ │ - ble.n 8861a │ │ + ble.n 88682 │ │ cmp r0, #71 @ 0x47 │ │ - beq.n 88622 │ │ + beq.n 8868a │ │ movw r1, #8199 @ 0x2007 │ │ cmp r0, r1 │ │ it ne │ │ cmpne r0, #110 @ 0x6e │ │ - bne.n 88632 │ │ + bne.n 8869a │ │ mov r0, r4 │ │ mov r1, fp │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldr r1, [sp, #52] @ 0x34 │ │ add r0, sp, #104 @ 0x68 │ │ ldrd r3, r2, [sp, #44] @ 0x2c │ │ str r4, [sp, #0] │ │ - bl 82b38 │ │ + bl 82ba0 │ │ ldrb.w r0, [sp, #104] @ 0x68 │ │ cmp r0, #82 @ 0x52 │ │ - bne.n 88632 │ │ - b.n 88706 │ │ + bne.n 8869a │ │ + b.n 8876e │ │ mov r0, r4 │ │ mov r1, fp │ │ - bl 869d0 │ │ + bl 86a38 │ │ ldr r1, [sp, #52] @ 0x34 │ │ add r0, sp, #104 @ 0x68 │ │ ldrd r3, r2, [sp, #44] @ 0x2c │ │ str r4, [sp, #0] │ │ - bl 82b38 │ │ + bl 82ba0 │ │ ldrb.w r0, [sp, #104] @ 0x68 │ │ ldrd r2, r1, [sp, #108] @ 0x6c │ │ cmp r0, #82 @ 0x52 │ │ it eq │ │ moveq r6, r2 │ │ ldr r0, [sp, #32] │ │ it eq │ │ moveq r0, r1 │ │ str r0, [sp, #32] │ │ - b.n 88632 │ │ + b.n 8869a │ │ movs r1, #18 │ │ - b.n 8850a │ │ + b.n 88572 │ │ add r3, sp, #88 @ 0x58 │ │ ldr r6, [sp, #56] @ 0x38 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia r6!, {r0, r1, r2, r3} │ │ add sp, #140 @ 0x8c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - cbz r6, 886e4 │ │ + cbz r6, 8874c │ │ ldr r0, [sp, #56] @ 0x38 │ │ ldr r1, [sp, #32] │ │ strd r6, r1, [r0, #4] │ │ movs r1, #82 @ 0x52 │ │ strb r1, [r0, #0] │ │ add sp, #140 @ 0x8c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrd r1, r6, [sp, #52] @ 0x34 │ │ eor.w r0, r8, #46 @ 0x2e │ │ ldrd r5, r2, [sp, #36] @ 0x24 │ │ orrs.w r0, r0, sl │ │ - bne.n 8871c │ │ + bne.n 88784 │ │ movs r0, #82 @ 0x52 │ │ strb r0, [r6, #0] │ │ movs r0, #0 │ │ str r0, [r6, #4] │ │ add sp, #140 @ 0x8c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ @@ -145389,105 +145302,105 @@ │ │ mov r2, r8 │ │ subs r0, #1 │ │ ldr r1, [r7, #12] │ │ ldr r4, [sp, #28] │ │ strd r1, r0, [sp, #16] │ │ mov r0, r6 │ │ strd r4, r5, [sp] │ │ - bl 87016 │ │ + bl 8707e │ │ add sp, #140 @ 0x8c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r3, [pc, #12] @ (88750 ) │ │ + ldr r3, [pc, #12] @ (887b8 ) │ │ movs r0, #0 │ │ movs r2, #5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ nop │ │ - subs r4, r1, #7 │ │ + subs r4, r6, #5 │ │ movs r5, r0 │ │ ldr r1, [r0, #0] │ │ subs r1, #2 │ │ cmp r1, #5 │ │ - bhi.n 8877a │ │ + bhi.n 887e2 │ │ tbb [pc, r1] │ │ asrs r7, r1, #4 │ │ lsls r6, r0, #12 │ │ lsls r0, r1, #12 │ │ ldrd r1, r2, [r0, #8] │ │ - b.n 88786 │ │ + b.n 887ee │ │ ldr r1, [r0, #8] │ │ - b.n 88784 │ │ + b.n 887ec │ │ ldr r2, [r0, #12] │ │ cmp r2, #0 │ │ - bmi.n 8877a │ │ + bmi.n 887e2 │ │ ldr r1, [r0, #8] │ │ - b.n 88786 │ │ + b.n 887ee │ │ movs r0, #0 │ │ bx lr │ │ ldrb r1, [r0, #8] │ │ - b.n 88784 │ │ + b.n 887ec │ │ ldrh r1, [r0, #8] │ │ movs r2, #0 │ │ subs.w r3, r1, #256 @ 0x100 │ │ mov.w r0, #0 │ │ sbcs.w r2, r2, #0 │ │ it cc │ │ movcc r0, #1 │ │ bx lr │ │ ldr r1, [r0, #0] │ │ subs r1, #2 │ │ cmp r1, #5 │ │ - bhi.n 887be │ │ + bhi.n 88826 │ │ tbb [pc, r1] │ │ asrs r7, r1, #4 │ │ lsls r6, r0, #12 │ │ lsls r0, r1, #12 │ │ ldrd r1, r2, [r0, #8] │ │ - b.n 887ca │ │ + b.n 88832 │ │ ldr r1, [r0, #8] │ │ - b.n 887c8 │ │ + b.n 88830 │ │ ldr r2, [r0, #12] │ │ cmp r2, #0 │ │ - bmi.n 887be │ │ + bmi.n 88826 │ │ ldr r1, [r0, #8] │ │ - b.n 887ca │ │ + b.n 88832 │ │ movs r0, #0 │ │ bx lr │ │ ldrb r1, [r0, #8] │ │ - b.n 887c8 │ │ + b.n 88830 │ │ ldrh r1, [r0, #8] │ │ movs r2, #0 │ │ subs.w r3, r1, #65536 @ 0x10000 │ │ mov.w r0, #0 │ │ sbcs.w r2, r2, #0 │ │ it cc │ │ movcc r0, #1 │ │ bx lr │ │ push {r4, r5, r6, lr} │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #56 @ 0x38 │ │ ldr r6, [sp, #88] @ 0x58 │ │ cmp r6, #0 │ │ - beq.w 88ce4 │ │ + beq.w 88d4c │ │ str r0, [sp, #52] @ 0x34 │ │ movw r0, #65535 @ 0xffff │ │ bic.w r0, r2, r0 │ │ mov.w ip, r2, lsr #8 │ │ cmp.w r0, #131072 @ 0x20000 │ │ mov r4, ip │ │ it eq │ │ moveq r4, r2 │ │ ldrd fp, sl, [r1] │ │ add.w r8, r3, r6, lsl #4 │ │ mov.w lr, #0 │ │ ldrh.w r9, [r3, #10] │ │ sub.w r6, r9, #1 │ │ cmp r6, #43 @ 0x2b │ │ - bhi.n 8887e │ │ + bhi.n 888e6 │ │ movs r5, #1 │ │ tbh [pc, r6, lsl #1] │ │ lsls r6, r2, #8 │ │ movs r4, r6 │ │ movs r4, r6 │ │ movs r4, r6 │ │ lsls r1, r7, #6 │ │ @@ -145527,31 +145440,31 @@ │ │ lsls r5, r2, #7 │ │ movs r4, r5 │ │ lsls r7, r2, #8 │ │ lsls r1, r7, #6 │ │ lsls r5, r2, #7 │ │ movs r4, r5 │ │ movs r5, #4 │ │ - b.n 88c50 │ │ + b.n 88cb8 │ │ sub.w r0, r9, #7968 @ 0x1f20 │ │ cmp r0, #2 │ │ - bcs.n 8888a │ │ + bcs.n 888f2 │ │ mov r5, ip │ │ - b.n 88c50 │ │ + b.n 88cb8 │ │ cmp.w lr, #0 │ │ - beq.n 888a0 │ │ + beq.n 88908 │ │ cmp sl, lr │ │ - bcc.w 88d3a │ │ + bcc.w 88da2 │ │ sub.w sl, sl, lr │ │ add fp, lr │ │ strd fp, sl, [r1] │ │ sub.w r0, r9, #3 │ │ mov lr, sl │ │ cmp r0, #32 │ │ - bhi.w 8896c │ │ + bhi.w 889d4 │ │ tbh [pc, r0, lsl #1] │ │ lsls r4, r7, #6 │ │ lsls r1, r3, #7 │ │ lsls r0, r2, #9 │ │ lsls r0, r2, #9 │ │ lsls r0, r2, #9 │ │ lsls r1, r3, #6 │ │ @@ -145579,110 +145492,110 @@ │ │ lsls r0, r2, #9 │ │ lsls r0, r2, #9 │ │ lsls r0, r2, #9 │ │ lsls r0, r2, #9 │ │ lsls r5, r4, #1 │ │ lsls r5, r4, #1 │ │ cmp.w lr, #0 │ │ - beq.w 88d62 │ │ + beq.w 88dca │ │ str.w fp, [sp, #28] │ │ add.w fp, fp, #1 │ │ sub.w r6, lr, #1 │ │ strd r4, ip, [sp, #36] @ 0x24 │ │ str.w lr, [sp, #32] │ │ mov.w lr, #0 │ │ movs r4, #0 │ │ movs r0, #0 │ │ strd r2, r1, [sp, #44] @ 0x2c │ │ ldrb.w r9, [fp, #-1] │ │ cmp r0, #63 @ 0x3f │ │ - bne.n 8892a │ │ + bne.n 88992 │ │ cmp.w r9, #1 │ │ - bhi.w 88cf0 │ │ + bhi.w 88d58 │ │ and.w r2, r0, #63 @ 0x3f │ │ and.w r1, r9, #127 @ 0x7f │ │ rsb sl, r2, #32 │ │ subs.w ip, r2, #32 │ │ lsr.w r5, r1, sl │ │ it pl │ │ lslpl.w r5, r1, ip │ │ lsl.w r1, r1, r2 │ │ it pl │ │ movpl r1, #0 │ │ orr.w lr, lr, r1 │ │ orrs r4, r5 │ │ sxtb.w r1, r9 │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ - bgt.w 88af4 │ │ + bgt.w 88b5c │ │ subs r6, #1 │ │ add.w fp, fp, #1 │ │ adds r0, #7 │ │ adds r1, r6, #1 │ │ - bne.n 8891a │ │ - b.n 88d04 │ │ + bne.n 88982 │ │ + b.n 88d6c │ │ movw r0, #7937 @ 0x1f01 │ │ sub.w r0, r9, r0 │ │ cmp r0, #2 │ │ - bcs.w 88d50 │ │ + bcs.w 88db8 │ │ cmp.w lr, #0 │ │ - beq.w 88d4e │ │ + beq.w 88db6 │ │ mov r5, fp │ │ add.w fp, fp, #1 │ │ sub.w sl, lr, #1 │ │ mov r9, r4 │ │ mov r6, r1 │ │ ldrsb.w r0, [fp, #-1] │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 889aa │ │ + bgt.n 88a12 │ │ sub.w sl, sl, #1 │ │ add.w fp, fp, #1 │ │ adds.w r1, sl, #1 │ │ - bne.n 88990 │ │ - b.n 88cb6 │ │ + bne.n 889f8 │ │ + b.n 88d1e │ │ mov r1, r6 │ │ mov.w lr, #0 │ │ strd fp, sl, [r1] │ │ mov r4, r9 │ │ - b.n 88c54 │ │ + b.n 88cbc │ │ cmp.w lr, #0 │ │ - beq.w 88d92 │ │ + beq.w 88dfa │ │ mov r9, fp │ │ mov r0, r1 │ │ mov r5, r9 │ │ mov fp, r4 │ │ mov r1, lr │ │ ldrb.w r4, [r5], #1 │ │ sub.w lr, lr, #1 │ │ mov sl, r0 │ │ strd r5, lr, [r0] │ │ and.w r0, r4, #127 @ 0x7f │ │ sxtb r4, r4 │ │ cmp r4, #0 │ │ - bpl.n 88a10 │ │ + bpl.n 88a78 │ │ ldr r6, [sp, #24] │ │ cmp.w lr, #0 │ │ - beq.w 88da8 │ │ + beq.w 88e10 │ │ ldrb.w r4, [r9, #1] │ │ sub.w lr, r1, #2 │ │ str r6, [sp, #24] │ │ add.w r5, r9, #2 │ │ and.w r6, r4, #127 @ 0x7f │ │ strd r5, lr, [sl] │ │ sxtb r4, r4 │ │ cmp.w r4, #4294967295 @ 0xffffffff │ │ orr.w r0, r0, r6, lsl #7 │ │ - ble.w 88b16 │ │ + ble.w 88b7e │ │ mov r9, r0 │ │ mov r4, fp │ │ mov r1, sl │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ mov fp, r5 │ │ uxtah r0, r0, r9 │ │ cmp r0, #43 @ 0x2b │ │ - bhi.w 88b58 │ │ + bhi.w 88bc0 │ │ tbh [pc, r0, lsl #1] │ │ lsls r5, r1, #4 │ │ lsls r3, r2, #6 │ │ lsls r5, r7, #3 │ │ lsls r2, r3, #4 │ │ lsls r0, r6, #2 │ │ lsls r2, r1, #2 │ │ @@ -145721,190 +145634,190 @@ │ │ lsls r4, r1, #3 │ │ lsls r2, r1, #2 │ │ lsls r0, r2, #2 │ │ lsls r0, r6, #2 │ │ lsls r4, r1, #3 │ │ lsls r2, r1, #2 │ │ cmp.w lr, #0 │ │ - beq.w 88da2 │ │ + beq.w 88e0a │ │ mov r5, fp │ │ mov sl, lr │ │ ldrb.w r0, [r5], #1 │ │ sub.w lr, lr, #1 │ │ and.w r9, r0, #127 @ 0x7f │ │ strd r5, lr, [r1] │ │ sxtb r0, r0 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 88a16 │ │ + bgt.n 88a7e │ │ cmp.w lr, #0 │ │ - beq.w 88da6 │ │ + beq.w 88e0e │ │ ldrb.w r0, [fp, #1] │ │ sub.w lr, sl, #2 │ │ add.w r5, fp, #2 │ │ and.w r6, r0, #127 @ 0x7f │ │ strd r5, lr, [r1] │ │ sxtb r0, r0 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ orr.w r9, r9, r6, lsl #7 │ │ - bgt.w 88a16 │ │ + bgt.w 88a7e │ │ cmp.w lr, #0 │ │ - beq.w 88dd2 │ │ + beq.w 88e3a │ │ ldrb.w r0, [fp, #2] │ │ sub.w lr, sl, #3 │ │ add.w r5, fp, #3 │ │ cmp r0, #3 │ │ strd r5, lr, [r1] │ │ - bhi.w 88ddc │ │ + bhi.w 88e44 │ │ orr.w r9, r9, r0, lsl #14 │ │ - b.n 88a16 │ │ + b.n 88a7e │ │ ldr r0, [sp, #48] @ 0x30 │ │ cmp r4, #0 │ │ ldr r2, [sp, #52] @ 0x34 │ │ strd fp, r6, [r0] │ │ - bne.w 88d96 │ │ + bne.w 88dfe │ │ strd lr, r4, [sp, #12] │ │ mov sl, r6 │ │ str.w lr, [sp] │ │ ldrd r2, r1, [sp, #44] @ 0x2c │ │ ldrd r4, ip, [sp, #36] @ 0x24 │ │ - b.n 88c54 │ │ + b.n 88cbc │ │ cmp.w lr, #0 │ │ - beq.w 88dc2 │ │ + beq.w 88e2a │ │ ldrb.w r4, [r9, #2] │ │ sub.w lr, r1, #3 │ │ add.w r5, r9, #3 │ │ str.w lr, [sl, #4] │ │ cmp r4, #3 │ │ str.w r5, [sl] │ │ - bhi.w 88dca │ │ + bhi.w 88e32 │ │ orr.w r9, r0, r4, lsl #14 │ │ - b.n 88a12 │ │ + b.n 88a7a │ │ mov sl, lr │ │ mov.w lr, #0 │ │ str.w r9, [sp, #24] │ │ - b.n 8887a │ │ + b.n 888e2 │ │ mov sl, lr │ │ movs r5, #1 │ │ mov.w lr, #0 │ │ str.w r9, [sp, #24] │ │ - b.n 88c50 │ │ + b.n 88cb8 │ │ movw r6, #7937 @ 0x1f01 │ │ uxth.w r0, r9 │ │ subs r6, r0, r6 │ │ cmp r6, #2 │ │ - bcc.n 88b7c │ │ + bcc.n 88be4 │ │ sub.w r0, r0, #7968 @ 0x1f20 │ │ cmp r0, #2 │ │ - bcs.w 88d50 │ │ + bcs.w 88db8 │ │ mov sl, lr │ │ mov.w lr, #0 │ │ str.w r9, [sp, #24] │ │ - b.n 88886 │ │ + b.n 888ee │ │ str.w r9, [sp, #24] │ │ cmp.w lr, #0 │ │ - bne.w 88982 │ │ - b.n 88d4e │ │ + bne.w 889ea │ │ + b.n 88db6 │ │ mov sl, lr │ │ mov.w lr, #0 │ │ str.w r9, [sp, #24] │ │ movs r5, #2 │ │ - b.n 88c50 │ │ + b.n 88cb8 │ │ mov sl, lr │ │ mov.w lr, #0 │ │ str.w r9, [sp, #24] │ │ movs r5, #8 │ │ - b.n 88c50 │ │ + b.n 88cb8 │ │ mov sl, lr │ │ mov.w lr, #0 │ │ str.w r9, [sp, #24] │ │ movs r5, #0 │ │ - b.n 88c50 │ │ + b.n 88cb8 │ │ str.w r9, [sp, #24] │ │ cmp.w lr, #0 │ │ - bne.w 888fa │ │ - b.n 88d62 │ │ + bne.w 88962 │ │ + b.n 88dca │ │ mov sl, lr │ │ mov.w lr, #0 │ │ str.w r9, [sp, #24] │ │ movs r5, #3 │ │ - b.n 88c50 │ │ + b.n 88cb8 │ │ mov sl, lr │ │ mov.w lr, #0 │ │ str.w r9, [sp, #24] │ │ mov r5, r4 │ │ - b.n 88c50 │ │ + b.n 88cb8 │ │ str.w r9, [sp, #24] │ │ ldr r5, [sp, #20] │ │ cmp.w lr, #0 │ │ - beq.w 88d2c │ │ + beq.w 88d94 │ │ movs r0, #0 │ │ ldrb.w r6, [fp, r0] │ │ - cbz r6, 88bfc │ │ + cbz r6, 88c64 │ │ adds r0, #1 │ │ cmp lr, r0 │ │ - bne.n 88bee │ │ - b.n 88d2c │ │ + bne.n 88c56 │ │ + b.n 88d94 │ │ mvns r6, r0 │ │ add lr, r6 │ │ mov r5, fp │ │ add r0, fp │ │ add.w fp, r0, #1 │ │ mov sl, lr │ │ strd fp, lr, [r1] │ │ mov.w lr, #0 │ │ str r5, [sp, #20] │ │ - b.n 88c54 │ │ + b.n 88cbc │ │ mov sl, lr │ │ mov.w lr, #0 │ │ str.w r9, [sp, #24] │ │ movs r5, #16 │ │ - b.n 88c50 │ │ + b.n 88cb8 │ │ str.w r9, [sp, #24] │ │ cmp.w lr, #2 │ │ - bcc.w 88d78 │ │ + bcc.w 88de0 │ │ mov r0, lr │ │ ldrh.w lr, [fp], #2 │ │ subs r0, #2 │ │ str.w lr, [sp, #4] │ │ mov sl, r0 │ │ strd fp, r0, [r1] │ │ - b.n 88c54 │ │ + b.n 88cbc │ │ mov sl, lr │ │ mov.w lr, #0 │ │ str.w r9, [sp, #24] │ │ mov r5, r2 │ │ uxtab lr, lr, r5 │ │ adds r3, #16 │ │ cmp r3, r8 │ │ - bne.w 88810 │ │ - b.n 88c98 │ │ + bne.w 88878 │ │ + b.n 88d00 │ │ str.w r9, [sp, #24] │ │ cmp.w lr, #4 │ │ - bcc.w 88d88 │ │ + bcc.w 88df0 │ │ mov r0, lr │ │ ldr.w lr, [fp], #4 │ │ subs r0, #4 │ │ mov sl, r0 │ │ strd fp, r0, [r1] │ │ - b.n 88c54 │ │ + b.n 88cbc │ │ str.w r9, [sp, #24] │ │ cmp.w lr, #0 │ │ - beq.n 88d68 │ │ + beq.n 88dd0 │ │ mov r0, lr │ │ ldrb.w lr, [fp], #1 │ │ subs r0, #1 │ │ str.w lr, [sp, #8] │ │ mov sl, r0 │ │ strd fp, r0, [r1] │ │ - b.n 88c54 │ │ + b.n 88cbc │ │ ldr r0, [sp, #52] @ 0x34 │ │ cmp.w lr, #0 │ │ - beq.n 88ce4 │ │ + beq.n 88d4c │ │ cmp sl, lr │ │ - bcs.n 88cd8 │ │ + bcs.n 88d40 │ │ movs r1, #0 │ │ strd fp, r1, [r0, #8] │ │ movs r1, #19 │ │ strb r1, [r0, #0] │ │ add sp, #56 @ 0x38 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, pc} │ │ @@ -145931,15 +145844,15 @@ │ │ pop {r4, r5, r6, pc} │ │ ldr r0, [sp, #48] @ 0x30 │ │ mov.w r9, #0 │ │ ldr r2, [sp, #52] @ 0x34 │ │ strd fp, r6, [r0] │ │ movs r0, #6 │ │ ldrd fp, r1, [sp, #12] │ │ - b.n 88d18 │ │ + b.n 88d80 │ │ ldrd fp, r1, [sp, #28] │ │ movs r0, #0 │ │ add fp, r1 │ │ ldr r1, [sp, #48] @ 0x30 │ │ strd fp, r0, [r1] │ │ ldr r2, [sp, #52] @ 0x34 │ │ movs r1, #0 │ │ @@ -145952,59 +145865,59 @@ │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, pc} │ │ ldr r1, [sp, #52] @ 0x34 │ │ movs r0, #0 │ │ str r5, [r1, #4] │ │ str.w fp, [r1, #8] │ │ str r0, [r1, #12] │ │ - b.n 88d42 │ │ + b.n 88daa │ │ ldr r1, [sp, #52] @ 0x34 │ │ movs r0, #0 │ │ strd fp, r0, [r1, #8] │ │ movs r0, #19 │ │ strb r0, [r1, #0] │ │ add sp, #56 @ 0x38 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, pc} │ │ - b.n 88cc0 │ │ + b.n 88d28 │ │ ldr r1, [sp, #52] @ 0x34 │ │ movs r0, #12 │ │ strh.w r9, [r1, #2] │ │ strb r0, [r1, #0] │ │ add sp, #56 @ 0x38 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, pc} │ │ mov.w r9, #0 │ │ - b.n 88d12 │ │ + b.n 88d7a │ │ ldr r1, [sp, #52] @ 0x34 │ │ movs r0, #0 │ │ str r0, [r1, #12] │ │ ldr r0, [sp, #8] │ │ strd fp, fp, [r1, #4] │ │ strb r0, [r1, #1] │ │ - b.n 88d42 │ │ + b.n 88daa │ │ ldr r1, [sp, #52] @ 0x34 │ │ movs r0, #0 │ │ str r0, [r1, #12] │ │ ldr r0, [sp, #4] │ │ strd fp, fp, [r1, #4] │ │ strh r0, [r1, #2] │ │ - b.n 88d42 │ │ + b.n 88daa │ │ ldr r1, [sp, #52] @ 0x34 │ │ movs r0, #0 │ │ str.w fp, [r1, #4] │ │ - b.n 88d32 │ │ + b.n 88d9a │ │ ldr r6, [sp, #24] │ │ - b.n 88daa │ │ + b.n 88e12 │ │ mov.w r9, #0 │ │ movs r0, #56 @ 0x38 │ │ ldr.w fp, [sp] │ │ - b.n 88d18 │ │ + b.n 88d80 │ │ movs r6, #22 │ │ - b.n 88daa │ │ + b.n 88e12 │ │ movs r6, #22 │ │ mov fp, r5 │ │ movs r0, #19 │ │ ldr r1, [sp, #52] @ 0x34 │ │ movs r3, #0 │ │ strd fp, fp, [r1, #4] │ │ str r3, [r1, #12] │ │ @@ -146012,52 +145925,28 @@ │ │ strb r0, [r1, #0] │ │ add sp, #56 @ 0x38 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, pc} │ │ mov fp, r5 │ │ ldr r1, [sp, #52] @ 0x34 │ │ ldr r6, [sp, #24] │ │ - b.n 88dd8 │ │ + b.n 88e40 │ │ movs r0, #6 │ │ ldr r1, [sp, #52] @ 0x34 │ │ ldr r6, [sp, #24] │ │ - b.n 88dae │ │ + b.n 88e16 │ │ ldr r1, [sp, #52] @ 0x34 │ │ movs r6, #22 │ │ mov fp, r5 │ │ movs r0, #19 │ │ - b.n 88dae │ │ + b.n 88e16 │ │ movs r0, #6 │ │ movs r6, #22 │ │ - b.n 88dac │ │ - push {r4, r5, r7, lr} │ │ - add r7, sp, #8 │ │ - sub sp, #24 │ │ - ldrd r1, r2, [r0] │ │ - mov r4, r0 │ │ - movs r0, #40 @ 0x28 │ │ - movs r3, #8 │ │ - strd r3, r0, [sp] │ │ - movs r5, #4 │ │ - lsls r0, r1, #1 │ │ - cmp r0, #4 │ │ - add r0, sp, #12 │ │ - it hi │ │ - lslhi r5, r1, #1 │ │ - mov r3, r5 │ │ - bl 77834 │ │ - ldr r0, [sp, #12] │ │ - cmp r0, #1 │ │ - itttt ne │ │ - ldrne r0, [sp, #16] │ │ - strdne r5, r0, [r4] │ │ - addne sp, #24 │ │ - popne {r4, r5, r7, pc} │ │ - ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + b.n 88e14 │ │ + bmi.n 88df6 │ │ push {r4, r5, r6, lr} │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #144 @ 0x90 │ │ mov sl, r0 │ │ ldr r0, [r1, #0] │ │ str r0, [sp, #104] @ 0x68 │ │ movs r4, #56 @ 0x38 │ │ @@ -146092,74 +145981,74 @@ │ │ str r3, [sp, #64] @ 0x40 │ │ str r2, [sp, #124] @ 0x7c │ │ str r1, [sp, #128] @ 0x80 │ │ str r4, [sp, #92] @ 0x5c │ │ str.w r8, [sp, #112] @ 0x70 │ │ str r6, [sp, #88] @ 0x58 │ │ cmp.w fp, #0 │ │ - beq.w 89b0a │ │ + beq.w 89b36 │ │ str.w r9, [sp, #120] @ 0x78 │ │ add.w r9, r5, #1 │ │ ldr r0, [sp, #116] @ 0x74 │ │ cmp r0, #0 │ │ - beq.n 88f32 │ │ + beq.n 88f5e │ │ ldrb r2, [r5, #0] │ │ cmp r2, #7 │ │ - bhi.w 89c10 │ │ + bhi.w 89c3c │ │ str r5, [sp, #140] @ 0x8c │ │ sub.w r1, fp, #1 │ │ str r1, [sp, #132] @ 0x84 │ │ tbh [pc, r2, lsl #1] │ │ lsls r2, r3, #25 │ │ movs r0, r1 │ │ lsls r6, r3, #6 │ │ lsls r3, r3, #4 │ │ lsls r2, r3, #5 │ │ lsls r0, r7, #3 │ │ lsls r4, r3, #7 │ │ lsls r4, r1, #8 │ │ cmp r1, #0 │ │ - beq.w 89c1c │ │ + beq.w 89c48 │ │ ldr.w ip, [sp, #140] @ 0x8c │ │ sub.w r2, fp, #2 │ │ ldr.w lr, [sp, #128] @ 0x80 │ │ mov sl, fp │ │ mov.w fp, #0 │ │ movs r0, #0 │ │ movs r6, #0 │ │ ldrb.w r8, [r9], #1 │ │ cmp r6, #63 @ 0x3f │ │ - bne.n 88ef2 │ │ + bne.n 88f1e │ │ cmp.w r8, #1 │ │ - bhi.w 89ada │ │ + bhi.w 89b06 │ │ and.w r5, r6, #63 @ 0x3f │ │ and.w r1, r8, #127 @ 0x7f │ │ rsb r4, r5, #32 │ │ subs.w r3, r5, #32 │ │ lsr.w r4, r1, r4 │ │ it pl │ │ lslpl.w r4, r1, r3 │ │ lsl.w r1, r1, r5 │ │ it pl │ │ movpl r1, #0 │ │ orr.w fp, fp, r1 │ │ orrs r0, r4 │ │ sxtb.w r1, r8 │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ - bgt.w 89396 │ │ + bgt.w 893c2 │ │ subs r2, #1 │ │ adds r6, #7 │ │ adds r1, r2, #1 │ │ - bne.n 88ee2 │ │ - b.w 89b40 │ │ + bne.n 88f0e │ │ + b.w 89b6c │ │ ldr r0, [sp, #124] @ 0x7c │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ uxtab r0, r1, r0 │ │ cmp r0, #7 │ │ - bhi.w 89be4 │ │ + bhi.w 89c10 │ │ tbh [pc, r0, lsl #1] │ │ movs r0, r1 │ │ movs r2, r4 │ │ lsls r7, r1, #25 │ │ lsls r7, r6, #1 │ │ lsls r7, r1, #25 │ │ lsls r7, r1, #25 │ │ @@ -146167,50 +146056,50 @@ │ │ lsls r1, r0, #1 │ │ mov ip, r5 │ │ ldr.w lr, [sp, #128] @ 0x80 │ │ ldrb.w r6, [ip], #1 │ │ subs.w r0, fp, #1 │ │ str.w r0, [lr, #28] │ │ str.w ip, [lr, #24] │ │ - beq.w 89bf6 │ │ + beq.w 89c22 │ │ sub.w fp, fp, #2 │ │ add.w r2, r9, #1 │ │ mov.w ip, #0 │ │ mov.w sl, #0 │ │ strd r2, fp, [lr, #24] │ │ ldrb.w lr, [r5, #1] │ │ - b.n 89070 │ │ + b.n 8909c │ │ ldr.w lr, [sp, #128] @ 0x80 │ │ cmp.w fp, #1 │ │ - beq.w 89ba0 │ │ + beq.w 89bcc │ │ mov ip, r5 │ │ sub.w r0, fp, #2 │ │ ldrh.w r6, [ip], #2 │ │ cmp r0, #2 │ │ str.w r0, [lr, #28] │ │ str.w ip, [lr, #24] │ │ - bcc.w 89bf6 │ │ + bcc.w 89c22 │ │ sub.w fp, fp, #4 │ │ add.w r2, r9, #3 │ │ mov.w ip, #0 │ │ mov.w sl, #0 │ │ strd r2, fp, [lr, #24] │ │ ldrh.w lr, [r5, #2] │ │ - b.n 89070 │ │ + b.n 8909c │ │ ldr.w lr, [sp, #128] @ 0x80 │ │ cmp.w fp, #7 │ │ - bls.w 89ba0 │ │ + bls.w 89bcc │ │ ldrb r1, [r5, #2] │ │ add.w r0, r9, #7 │ │ ldrh r2, [r5, #0] │ │ sub.w r6, fp, #8 │ │ cmp r6, #8 │ │ str.w r6, [lr, #28] │ │ str.w r0, [lr, #24] │ │ - bcc.w 89bf4 │ │ + bcc.w 89c20 │ │ ldr.w r6, [r5, #3] │ │ mov r8, r4 │ │ ldrb.w ip, [r5, #7] │ │ mov r4, r5 │ │ ldr.w r3, [r5, #11] │ │ orr.w r1, r2, r1, lsl #16 │ │ lsrs r5, r6, #8 │ │ @@ -146224,93 +146113,93 @@ │ │ orr.w sl, r1, r5, lsl #24 │ │ ldrb r1, [r0, #2] │ │ ldrh r0, [r0, #0] │ │ mov r4, r8 │ │ strd r2, fp, [lr, #24] │ │ orr.w r0, r0, r1, lsl #16 │ │ orr.w lr, r0, r3, lsl #24 │ │ - b.n 89070 │ │ + b.n 8909c │ │ ldr.w lr, [sp, #128] @ 0x80 │ │ cmp.w fp, #4 │ │ - bcc.w 89ba0 │ │ + bcc.w 89bcc │ │ mov ip, r5 │ │ sub.w r0, fp, #4 │ │ ldr.w r6, [ip], #4 │ │ cmp r0, #4 │ │ str.w r0, [lr, #28] │ │ str.w ip, [lr, #24] │ │ - bcc.w 89bf6 │ │ + bcc.w 89c22 │ │ sub.w fp, fp, #8 │ │ add.w r2, r9, #7 │ │ mov.w ip, #0 │ │ mov.w sl, #0 │ │ strd r2, fp, [lr, #24] │ │ ldr.w lr, [r5, #4] │ │ orr.w r0, lr, r6 │ │ orr.w r1, sl, ip │ │ orrs r0, r1 │ │ - beq.w 89b6a │ │ + beq.w 89b96 │ │ ldr r0, [sp, #96] @ 0x60 │ │ mov r5, r2 │ │ ldr.w r8, [sp, #112] @ 0x70 │ │ eors r0, r6 │ │ eor.w r1, ip, r8 │ │ orrs r0, r1 │ │ itt eq │ │ moveq ip, sl │ │ moveq r6, lr │ │ clz r0, r0 │ │ lsrs r1, r6, #8 │ │ orr.w r3, r1, ip, lsl #24 │ │ mov.w r9, r6, lsr #16 │ │ lsrs r0, r0, #5 │ │ - b.n 8965e │ │ + b.n 8968a │ │ ldr r0, [sp, #124] @ 0x7c │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ uxtab r2, r1, r0 │ │ movs r0, #25 │ │ cmp r2, #7 │ │ - bhi.w 89c7a │ │ + bhi.w 89ca6 │ │ ldr.w lr, [sp, #128] @ 0x80 │ │ tbh [pc, r2, lsl #1] │ │ movs r0, r1 │ │ lsls r0, r6, #7 │ │ lsls r2, r5, #23 │ │ lsls r3, r3, #8 │ │ lsls r2, r5, #23 │ │ lsls r2, r5, #23 │ │ lsls r2, r5, #23 │ │ lsls r7, r7, #7 │ │ ldr r0, [sp, #132] @ 0x84 │ │ cmp r0, #0 │ │ - beq.w 89c64 │ │ + beq.w 89c90 │ │ ldr r2, [sp, #140] @ 0x8c │ │ sub.w fp, fp, #2 │ │ add.w r5, r9, #1 │ │ movs r0, #1 │ │ strd r5, fp, [lr, #24] │ │ ldrb r6, [r2, #1] │ │ - b.n 89512 │ │ + b.n 8953e │ │ cmp r1, #0 │ │ - beq.w 89afc │ │ + beq.w 89b28 │ │ mov ip, fp │ │ sub.w fp, fp, #3 │ │ movs r0, #0 │ │ movs r6, #0 │ │ movs r3, #0 │ │ movs r5, #0 │ │ mov r9, r1 │ │ str r0, [sp, #136] @ 0x88 │ │ ldr r0, [sp, #140] @ 0x8c │ │ cmp r5, #63 @ 0x3f │ │ add.w sl, r0, r6 │ │ ldrb.w lr, [sl, #1]! │ │ - bne.n 8911a │ │ + bne.n 89146 │ │ cmp.w lr, #1 │ │ - bhi.w 89ade │ │ + bhi.w 89b0a │ │ and.w r4, r5, #63 @ 0x3f │ │ and.w r1, lr, #127 @ 0x7f │ │ rsb r0, r4, #32 │ │ subs.w r2, r4, #32 │ │ sub.w r8, r9, #1 │ │ lsr.w r0, r1, r0 │ │ it pl │ │ @@ -146320,40 +146209,40 @@ │ │ it pl │ │ movpl r0, #0 │ │ ldr r1, [sp, #136] @ 0x88 │ │ orrs r1, r0 │ │ sxtb.w r0, lr │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ str r1, [sp, #136] @ 0x88 │ │ - bgt.w 893b2 │ │ + bgt.w 893de │ │ sub.w fp, fp, #1 │ │ adds r5, #7 │ │ adds r6, #1 │ │ ldr r0, [sp, #132] @ 0x84 │ │ mov r9, r8 │ │ cmp r0, r6 │ │ - bne.n 89104 │ │ - b.w 89ae8 │ │ + bne.n 89130 │ │ + b.w 89b14 │ │ ldr.w lr, [sp, #128] @ 0x80 │ │ cmp r1, #0 │ │ - beq.w 89b36 │ │ + beq.w 89b62 │ │ sub.w r8, fp, #3 │ │ str.w fp, [sp, #60] @ 0x3c │ │ movs r3, #0 │ │ movs r6, #0 │ │ mov.w ip, #0 │ │ movs r5, #0 │ │ mov fp, r1 │ │ ldr r0, [sp, #140] @ 0x8c │ │ cmp r5, #63 @ 0x3f │ │ add r0, r3 │ │ ldrb.w sl, [r0, #1]! │ │ - bne.n 8919c │ │ + bne.n 891c8 │ │ cmp.w sl, #1 │ │ - bhi.w 89ada │ │ + bhi.w 89b06 │ │ and.w r4, r5, #63 @ 0x3f │ │ and.w r1, sl, #127 @ 0x7f │ │ rsb lr, r4, #32 │ │ str r0, [sp, #136] @ 0x88 │ │ mov r9, r6 │ │ subs.w r6, r4, #32 │ │ lsr.w r2, r1, lr │ │ @@ -146363,41 +146252,41 @@ │ │ lsl.w r1, r1, r4 │ │ it pl │ │ movpl r1, #0 │ │ orr.w r6, r1, r9 │ │ orr.w ip, ip, r2 │ │ sxtb.w r1, sl │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ - bgt.w 8942e │ │ + bgt.w 8945a │ │ ldr.w lr, [sp, #128] @ 0x80 │ │ sub.w r8, r8, #1 │ │ adds r5, #7 │ │ adds r3, #1 │ │ ldr r1, [sp, #132] @ 0x84 │ │ mov fp, r0 │ │ cmp r1, r3 │ │ - bne.n 89188 │ │ - b.w 89b22 │ │ + bne.n 891b4 │ │ + b.w 89b4e │ │ cmp r1, #0 │ │ - beq.w 89afc │ │ + beq.w 89b28 │ │ mov ip, fp │ │ sub.w fp, fp, #3 │ │ movs r0, #0 │ │ movs r6, #0 │ │ movs r3, #0 │ │ movs r5, #0 │ │ mov r9, r1 │ │ str r0, [sp, #136] @ 0x88 │ │ ldr r0, [sp, #140] @ 0x8c │ │ cmp r5, #63 @ 0x3f │ │ add.w sl, r0, r6 │ │ ldrb.w lr, [sl, #1]! │ │ - bne.n 89220 │ │ + bne.n 8924c │ │ cmp.w lr, #1 │ │ - bhi.w 89ade │ │ + bhi.w 89b0a │ │ and.w r2, r5, #63 @ 0x3f │ │ and.w r1, lr, #127 @ 0x7f │ │ rsb r0, r2, #32 │ │ subs.w r4, r2, #32 │ │ sub.w r8, r9, #1 │ │ lsr.w r0, r1, r0 │ │ it pl │ │ @@ -146407,97 +146296,97 @@ │ │ it pl │ │ movpl r0, #0 │ │ ldr r1, [sp, #136] @ 0x88 │ │ orrs r1, r0 │ │ sxtb.w r0, lr │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ str r1, [sp, #136] @ 0x88 │ │ - bgt.n 89318 │ │ + bgt.n 89344 │ │ sub.w fp, fp, #1 │ │ adds r5, #7 │ │ adds r6, #1 │ │ ldr r0, [sp, #132] @ 0x84 │ │ mov r9, r8 │ │ cmp r0, r6 │ │ - bne.n 8920a │ │ - b.w 89ae8 │ │ + bne.n 89236 │ │ + b.w 89b14 │ │ ldr r0, [sp, #124] @ 0x7c │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ uxtab r2, r1, r0 │ │ movs r0, #25 │ │ cmp r2, #7 │ │ - bhi.w 89c7a │ │ + bhi.w 89ca6 │ │ ldr.w lr, [sp, #128] @ 0x80 │ │ tbh [pc, r2, lsl #1] │ │ movs r0, r1 │ │ lsls r0, r1, #5 │ │ lsls r6, r0, #20 │ │ lsls r7, r0, #7 │ │ lsls r6, r0, #20 │ │ lsls r6, r0, #20 │ │ lsls r6, r0, #20 │ │ lsls r6, r6, #5 │ │ ldr r0, [sp, #132] @ 0x84 │ │ cmp r0, #0 │ │ - beq.w 89c64 │ │ + beq.w 89c90 │ │ subs.w r0, fp, #2 │ │ str.w r0, [lr, #28] │ │ ldr r0, [sp, #140] @ 0x8c │ │ add.w ip, r0, #2 │ │ str.w ip, [lr, #24] │ │ ldrb r6, [r0, #1] │ │ - beq.w 89c72 │ │ + beq.w 89c9e │ │ sub.w fp, fp, #3 │ │ add.w r5, r9, #2 │ │ mov.w sl, #0 │ │ strd r5, fp, [lr, #24] │ │ ldrb.w lr, [r0, #2] │ │ - b.n 8964e │ │ + b.n 8967a │ │ ldr r0, [sp, #124] @ 0x7c │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ uxtab r2, r1, r0 │ │ movs r0, #25 │ │ cmp r2, #7 │ │ - bhi.w 89c7a │ │ + bhi.w 89ca6 │ │ ldr.w lr, [sp, #128] @ 0x80 │ │ tbh [pc, r2, lsl #1] │ │ movs r0, r1 │ │ lsls r5, r6, #4 │ │ lsls r6, r2, #19 │ │ lsls r6, r1, #7 │ │ lsls r6, r2, #19 │ │ lsls r6, r2, #19 │ │ lsls r6, r2, #19 │ │ lsls r4, r7, #5 │ │ ldr r0, [sp, #132] @ 0x84 │ │ cmp r0, #0 │ │ - beq.w 89c64 │ │ + beq.w 89c90 │ │ ldr r1, [sp, #140] @ 0x8c │ │ sub.w fp, fp, #2 │ │ mov r0, lr │ │ mov.w r9, #0 │ │ add.w ip, r1, #2 │ │ strd ip, fp, [r0, #24] │ │ ldrb r0, [r1, #1] │ │ - b.n 896a4 │ │ + b.n 896d0 │ │ ldr.w lr, [sp, #128] @ 0x80 │ │ add.w r5, sl, #1 │ │ cmp r3, #0 │ │ strd r5, r8, [lr, #24] │ │ - bne.w 89c76 │ │ + bne.w 89ca2 │ │ cmp.w r8, #0 │ │ - beq.w 89cc4 │ │ + beq.w 89cf0 │ │ movs r6, #0 │ │ mov.w ip, #0 │ │ movs r1, #0 │ │ ldrb.w r8, [r5], #1 │ │ cmp r1, #63 @ 0x3f │ │ - bne.n 8934a │ │ + bne.n 89376 │ │ cmp.w r8, #1 │ │ - bhi.w 89bc2 │ │ + bhi.w 89bee │ │ and.w r3, r1, #63 @ 0x3f │ │ mov r2, r5 │ │ and.w r0, r8, #127 @ 0x7f │ │ rsb r5, r3, #32 │ │ mov r4, ip │ │ mov ip, r6 │ │ subs.w r6, r3, #32 │ │ @@ -146508,46 +146397,46 @@ │ │ mov r6, ip │ │ it pl │ │ movpl r0, #0 │ │ orrs r6, r0 │ │ orr.w ip, r5, r4 │ │ sxtb.w r0, r8 │ │ cmp r0, #0 │ │ - bpl.w 897b8 │ │ + bpl.w 897e4 │ │ sub.w fp, fp, #1 │ │ adds r1, #7 │ │ mov r5, r2 │ │ adds.w r0, fp, #1 │ │ - bne.n 8933a │ │ - b.w 89b82 │ │ + bne.n 89366 │ │ + b.w 89bae │ │ ldr r4, [sp, #92] @ 0x5c │ │ cmp r0, #0 │ │ strd r9, r2, [lr, #24] │ │ - bne.w 89c80 │ │ + bne.w 89cac │ │ str.w fp, [sp, #136] @ 0x88 │ │ movs r0, #2 │ │ mov.w ip, #0 │ │ mov fp, r2 │ │ mov r5, r9 │ │ - b.n 89654 │ │ + b.n 89680 │ │ ldr.w lr, [sp, #128] @ 0x80 │ │ add.w r2, sl, #1 │ │ cmp r3, #0 │ │ strd r2, r8, [lr, #24] │ │ - bne.w 89c76 │ │ + bne.w 89ca2 │ │ cmp.w r8, #0 │ │ - beq.w 89cc0 │ │ + beq.w 89cec │ │ movs r6, #0 │ │ mov.w ip, #0 │ │ movs r1, #0 │ │ ldrb.w r8, [r2], #1 │ │ cmp r1, #63 @ 0x3f │ │ - bne.n 893e4 │ │ + bne.n 89410 │ │ cmp.w r8, #1 │ │ - bhi.w 89bb6 │ │ + bhi.w 89be2 │ │ mov r3, r2 │ │ and.w r2, r1, #63 @ 0x3f │ │ and.w r0, r8, #127 @ 0x7f │ │ rsb r5, r2, #32 │ │ mov r4, ip │ │ mov ip, r6 │ │ subs.w r6, r2, #32 │ │ @@ -146558,35 +146447,35 @@ │ │ mov r6, ip │ │ it pl │ │ movpl r0, #0 │ │ orrs r6, r0 │ │ orr.w ip, r5, r4 │ │ sxtb.w r0, r8 │ │ cmp r0, #0 │ │ - bpl.w 897ce │ │ + bpl.w 897fa │ │ sub.w fp, fp, #1 │ │ adds r1, #7 │ │ mov r2, r3 │ │ adds.w r0, fp, #1 │ │ - bne.n 893d4 │ │ - b.n 89b82 │ │ + bne.n 89400 │ │ + b.n 89bae │ │ ldr r1, [sp, #136] @ 0x88 │ │ cmp r0, #0 │ │ ldr.w lr, [sp, #128] @ 0x80 │ │ add.w r5, r1, #1 │ │ strd r5, r0, [lr, #24] │ │ - beq.w 89c84 │ │ + beq.w 89cb0 │ │ mov.w lr, #0 │ │ movs r4, #0 │ │ movs r1, #0 │ │ ldrb.w r9, [r5], #1 │ │ cmp r1, #63 @ 0x3f │ │ - bne.n 8945a │ │ + bne.n 89486 │ │ cmp.w r9, #1 │ │ - bhi.w 89baa │ │ + bhi.w 89bd6 │ │ and.w r2, r1, #63 @ 0x3f │ │ mov r3, r4 │ │ and.w r0, r9, #127 @ 0x7f │ │ rsb r4, r2, #32 │ │ mov sl, r6 │ │ subs.w r6, r2, #32 │ │ lsr.w r4, r0, r4 │ │ @@ -146595,92 +146484,92 @@ │ │ lsl.w r0, r0, r2 │ │ it pl │ │ movpl r0, #0 │ │ orr.w lr, lr, r0 │ │ orrs r4, r3 │ │ sxtb.w r0, r9 │ │ cmp r0, #0 │ │ - bpl.w 8979c │ │ + bpl.w 897c8 │ │ sub.w r8, r8, #1 │ │ adds r1, #7 │ │ mov r6, sl │ │ adds.w r0, r8, #1 │ │ - bne.n 8944a │ │ - b.n 89bce │ │ + bne.n 89476 │ │ + b.n 89bfa │ │ cmp.w fp, #3 │ │ - bcc.w 89c50 │ │ + bcc.w 89c7c │ │ ldr r2, [sp, #140] @ 0x8c │ │ sub.w fp, fp, #3 │ │ add.w r5, r9, #2 │ │ movs r0, #1 │ │ strd r5, fp, [lr, #24] │ │ ldrh.w r6, [r2, #1] │ │ - b.n 89512 │ │ + b.n 8953e │ │ cmp.w fp, #8 │ │ - bls.w 89c5a │ │ + bls.w 89c86 │ │ ldr r1, [sp, #140] @ 0x8c │ │ sub.w fp, fp, #9 │ │ ldrb.w r2, [r9, #2] │ │ add.w r5, r9, #8 │ │ ldrh.w r3, [r9] │ │ ldr r0, [r1, #4] │ │ ldrb r1, [r1, #8] │ │ str.w fp, [lr, #28] │ │ str.w r5, [lr, #24] │ │ lsls r1, r1, #24 │ │ orr.w ip, r1, r0, lsr #8 │ │ orr.w r1, r3, r2, lsl #16 │ │ orr.w r6, r1, r0, lsl #24 │ │ movs r0, #1 │ │ - b.n 89516 │ │ + b.n 89542 │ │ cmp.w fp, #5 │ │ - bcc.w 89c46 │ │ + bcc.w 89c72 │ │ ldr r2, [sp, #140] @ 0x8c │ │ sub.w fp, fp, #5 │ │ add.w r5, r9, #4 │ │ movs r0, #1 │ │ strd r5, fp, [lr, #24] │ │ ldr.w r6, [r2, #1] │ │ mov.w ip, #0 │ │ - b.n 89654 │ │ + b.n 89680 │ │ cmp.w fp, #3 │ │ - bcc.w 89c50 │ │ + bcc.w 89c7c │ │ ldr r2, [sp, #140] @ 0x8c │ │ sub.w r0, fp, #3 │ │ str.w r0, [lr, #28] │ │ cmp r0, #2 │ │ add.w ip, r2, #3 │ │ str.w ip, [lr, #24] │ │ ldrh.w r6, [r2, #1] │ │ - bcc.w 89c72 │ │ + bcc.w 89c9e │ │ sub.w fp, fp, #5 │ │ add.w r5, r9, #4 │ │ mov.w sl, #0 │ │ strd r5, fp, [lr, #24] │ │ ldrh.w lr, [r2, #3] │ │ - b.n 8964e │ │ + b.n 8967a │ │ cmp.w fp, #3 │ │ - bcc.w 89c50 │ │ + bcc.w 89c7c │ │ ldr r1, [sp, #140] @ 0x8c │ │ sub.w fp, fp, #3 │ │ mov r0, lr │ │ mov.w r9, #0 │ │ add.w ip, r1, #3 │ │ strd ip, fp, [r0, #24] │ │ ldrh.w r0, [r1, #1] │ │ - b.n 896a4 │ │ + b.n 896d0 │ │ cmp.w fp, #8 │ │ - bls.w 89c5a │ │ + bls.w 89c86 │ │ ldrb.w r0, [r9, #2] │ │ add.w r1, r9, #8 │ │ sub.w r2, fp, #9 │ │ str.w r2, [lr, #28] │ │ cmp r2, #7 │ │ str.w r1, [lr, #24] │ │ - bls.w 89cc8 │ │ + bls.w 89cf4 │ │ ldr r3, [sp, #140] @ 0x8c │ │ mov sl, r4 │ │ ldrh.w r2, [r9] │ │ sub.w fp, fp, #17 │ │ mov r4, r3 │ │ ldrb r3, [r3, #8] │ │ ldr r6, [r4, #4] │ │ @@ -146698,41 +146587,41 @@ │ │ orr.w sl, r0, r3, lsl #24 │ │ ldrb r0, [r1, #2] │ │ ldrh r1, [r1, #0] │ │ orr.w r0, r1, r0, lsl #16 │ │ orr.w lr, r0, r5, lsl #24 │ │ movs r0, #6 │ │ mov r5, r2 │ │ - b.n 89654 │ │ + b.n 89680 │ │ cmp.w fp, #8 │ │ - bls.w 89c5a │ │ + bls.w 89c86 │ │ ldr r2, [sp, #140] @ 0x8c │ │ sub.w fp, fp, #9 │ │ ldrb.w r6, [r9, #2] │ │ ldrh.w r5, [r9] │ │ add.w ip, r2, #9 │ │ ldrb r3, [r2, #8] │ │ ldr r1, [r2, #4] │ │ str.w fp, [lr, #28] │ │ lsls r3, r3, #24 │ │ str.w ip, [lr, #24] │ │ orr.w r9, r3, r1, lsr #8 │ │ orr.w r3, r5, r6, lsl #16 │ │ orr.w r0, r3, r1, lsl #24 │ │ - b.n 896a4 │ │ + b.n 896d0 │ │ cmp.w fp, #5 │ │ - bcc.w 89c46 │ │ + bcc.w 89c72 │ │ ldr r2, [sp, #140] @ 0x8c │ │ sub.w r0, fp, #5 │ │ str.w r0, [lr, #28] │ │ cmp r0, #4 │ │ add.w ip, r2, #5 │ │ str.w ip, [lr, #24] │ │ ldr.w r6, [r2, #1] │ │ - bcc.w 89c72 │ │ + bcc.w 89c9e │ │ sub.w fp, fp, #9 │ │ add.w r5, r9, #8 │ │ mov.w sl, #0 │ │ strd r5, fp, [lr, #24] │ │ ldr.w lr, [r2, #5] │ │ movs r0, #6 │ │ mov.w ip, #0 │ │ @@ -146748,89 +146637,89 @@ │ │ movs r0, r1 │ │ lsls r0, r7, #5 │ │ lsls r5, r6, #4 │ │ ldrd r1, r0, [sp, #104] @ 0x68 │ │ subs r0, r1, r0 │ │ ldr r0, [sp, #100] @ 0x64 │ │ sbcs.w r0, r0, r8 │ │ - bcs.w 88e8c │ │ - b.n 8982a │ │ + bcs.w 88eb8 │ │ + b.n 89856 │ │ cmp.w fp, #5 │ │ - bcc.w 89c46 │ │ + bcc.w 89c72 │ │ ldr r1, [sp, #140] @ 0x8c │ │ sub.w fp, fp, #5 │ │ mov r0, lr │ │ mov.w r9, #0 │ │ add.w ip, r1, #5 │ │ strd ip, fp, [r0, #24] │ │ ldr.w r0, [r1, #1] │ │ ldr.w r8, [sp, #112] @ 0x70 │ │ cmp.w fp, #0 │ │ - beq.w 89c24 │ │ + beq.w 89c50 │ │ str r0, [sp, #132] @ 0x84 │ │ add.w r0, ip, #1 │ │ str.w r9, [sp, #60] @ 0x3c │ │ mov r9, ip │ │ sub.w ip, fp, #1 │ │ mov.w lr, #0 │ │ mov.w sl, #0 │ │ movs r3, #0 │ │ ldrb.w r4, [r0, #-1] │ │ mov r5, r0 │ │ cmp r3, #63 @ 0x3f │ │ - bne.n 896da │ │ + bne.n 89706 │ │ cmp r4, #1 │ │ - bhi.w 89b0e │ │ + bhi.w 89b3a │ │ and.w r6, r3, #63 @ 0x3f │ │ and.w r1, r4, #127 @ 0x7f │ │ rsb r0, r6, #32 │ │ subs.w r2, r6, #32 │ │ lsr.w r0, r1, r0 │ │ it pl │ │ lslpl.w r0, r1, r2 │ │ orr.w sl, sl, r0 │ │ lsl.w r0, r1, r6 │ │ it pl │ │ movpl r0, #0 │ │ orr.w lr, lr, r0 │ │ sxtb r0, r4 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 8971c │ │ + bgt.n 89748 │ │ sub.w r1, ip, #1 │ │ adds r0, r5, #1 │ │ adds r3, #7 │ │ mov ip, r1 │ │ adds r1, #1 │ │ - bne.n 896ca │ │ - b.n 89b58 │ │ + bne.n 896f6 │ │ + b.n 89b84 │ │ ldr r0, [sp, #128] @ 0x80 │ │ mov fp, ip │ │ ldr r4, [sp, #92] @ 0x5c │ │ ldr.w ip, [sp, #60] @ 0x3c │ │ ldr r6, [sp, #132] @ 0x84 │ │ strd r5, fp, [r0, #24] │ │ movs r0, #7 │ │ strd sl, lr, [sp, #52] @ 0x34 │ │ - b.n 89658 │ │ + b.n 89684 │ │ ldrd r1, r0, [sp, #68] @ 0x44 │ │ cmp r0, r1 │ │ - bcc.w 89ce4 │ │ + bcc.w 89d10 │ │ ldr r0, [sp, #80] @ 0x50 │ │ ldr r1, [sp, #136] @ 0x88 │ │ umull r1, r0, r1, r0 │ │ cmp r0, #0 │ │ - bne.w 89cf2 │ │ + bne.w 89d1e │ │ ldr r0, [sp, #84] @ 0x54 │ │ cmp r0, r1 │ │ - bcc.w 89cfc │ │ + bcc.w 89d28 │ │ ldr r0, [sp, #124] @ 0x7c │ │ mov.w r2, #4294967295 @ 0xffffffff │ │ uxtab r2, r2, r0 │ │ cmp r2, #7 │ │ - bhi.w 89d96 │ │ + bhi.w 89dc2 │ │ ldr r0, [sp, #76] @ 0x4c │ │ ldr r3, [sp, #84] @ 0x54 │ │ add r0, r1 │ │ subs r3, r3, r1 │ │ tbh [pc, r2, lsl #1] │ │ movs r0, r1 │ │ movs r7, r6 │ │ @@ -146838,74 +146727,74 @@ │ │ lsls r6, r1, #1 │ │ lsls r3, r2, #12 │ │ lsls r3, r2, #12 │ │ lsls r3, r2, #12 │ │ movs r4, r7 │ │ ldr r2, [sp, #84] @ 0x54 │ │ cmp r2, r1 │ │ - beq.w 89d30 │ │ + beq.w 89d5c │ │ ldrb r0, [r0, #0] │ │ - b.n 89814 │ │ + b.n 89840 │ │ mov.w r0, r9, lsl #16 │ │ uxtb r1, r6 │ │ bfi r0, r3, #8, #8 │ │ mov r2, ip │ │ add r0, r1 │ │ - b.n 8981c │ │ + b.n 89848 │ │ ldr r0, [sp, #128] @ 0x80 │ │ mov r6, sl │ │ ldr r1, [sp, #92] @ 0x5c │ │ mov fp, r8 │ │ strd r4, lr, [sp, #36] @ 0x24 │ │ mov sl, r4 │ │ strd r5, r8, [r0, #24] │ │ movs r0, #5 │ │ ldr.w r8, [sp, #112] @ 0x70 │ │ mov r4, r1 │ │ - b.n 89658 │ │ + b.n 89684 │ │ mov r5, r2 │ │ cmp.w ip, #0 │ │ strd r5, fp, [lr, #24] │ │ - bne.w 89d8e │ │ + bne.w 89dba │ │ movs r0, #3 │ │ strd ip, r6, [sp, #20] │ │ - b.n 897da │ │ + b.n 89806 │ │ mov r5, r3 │ │ movs r0, #4 │ │ strd r5, fp, [lr, #24] │ │ strd ip, r6, [sp, #28] │ │ ldr r4, [sp, #92] @ 0x5c │ │ - b.n 89654 │ │ + b.n 89680 │ │ cmp r3, #2 │ │ - bcc.w 89d30 │ │ + bcc.w 89d5c │ │ ldrh r0, [r0, #0] │ │ - b.n 89814 │ │ + b.n 89840 │ │ cmp r3, #7 │ │ - bls.w 89d30 │ │ + bls.w 89d5c │ │ ldrb r3, [r0, #2] │ │ ldr.w r1, [r0, #3] │ │ ldrb r2, [r0, #7] │ │ ldrh r0, [r0, #0] │ │ lsrs r6, r1, #8 │ │ orr.w r0, r0, r3, lsl #16 │ │ orr.w r2, r6, r2, lsl #24 │ │ orr.w r0, r0, r1, lsl #24 │ │ strd r2, r0, [sp] │ │ - b.n 8981c │ │ + b.n 89848 │ │ cmp r3, #4 │ │ - bcc.w 89d30 │ │ + bcc.w 89d5c │ │ ldr r0, [r0, #0] │ │ movs r1, #0 │ │ movs r2, #0 │ │ str r0, [sp, #4] │ │ str r1, [sp, #0] │ │ ldr r1, [sp, #128] @ 0x80 │ │ strd r2, r0, [sp, #100] @ 0x64 │ │ strd r0, r2, [r1] │ │ - b.w 88e8c │ │ + b.w 88eb8 │ │ str r6, [sp, #132] @ 0x84 │ │ ldr r6, [sp, #104] @ 0x68 │ │ str.w fp, [sp, #60] @ 0x3c │ │ mov fp, r4 │ │ ldr r2, [sp, #96] @ 0x60 │ │ adds.w r0, r6, lr │ │ ldr r4, [sp, #100] @ 0x64 │ │ @@ -146921,34 +146810,34 @@ │ │ add r0, r1 │ │ adds r0, r0, r6 │ │ adc.w r1, ip, r4 │ │ ands r0, r2 │ │ mov r4, fp │ │ ldr.w fp, [sp, #60] @ 0x3c │ │ and.w r2, r1, r8 │ │ - b.n 89966 │ │ + b.n 89992 │ │ ldrd r1, r0, [sp, #68] @ 0x44 │ │ cmp r0, r1 │ │ - bcc.w 89cd8 │ │ + bcc.w 89d04 │ │ ldr r0, [sp, #80] @ 0x50 │ │ ldr r1, [sp, #136] @ 0x88 │ │ umull r1, r0, r1, r0 │ │ cmp r0, #0 │ │ - bne.w 89cf8 │ │ + bne.w 89d24 │ │ ldr r0, [sp, #84] @ 0x54 │ │ cmp r0, r1 │ │ - bcc.w 89d06 │ │ + bcc.w 89d32 │ │ ldr r0, [sp, #124] @ 0x7c │ │ mov.w r2, #4294967295 @ 0xffffffff │ │ str r5, [sp, #140] @ 0x8c │ │ movs r5, #25 │ │ str r6, [sp, #132] @ 0x84 │ │ uxtab r2, r2, r0 │ │ cmp r2, #7 │ │ - bhi.w 89da2 │ │ + bhi.w 89dce │ │ ldr r6, [sp, #84] @ 0x54 │ │ ldr r0, [sp, #76] @ 0x4c │ │ subs r4, r6, r1 │ │ add r0, r1 │ │ tbh [pc, r2, lsl #1] │ │ movs r0, r1 │ │ lsls r1, r5, #1 │ │ @@ -146956,48 +146845,48 @@ │ │ lsls r2, r1, #2 │ │ lsls r3, r7, #8 │ │ lsls r3, r7, #8 │ │ lsls r3, r7, #8 │ │ lsls r6, r5, #1 │ │ ldr r6, [sp, #84] @ 0x54 │ │ cmp r6, r1 │ │ - beq.w 89d1e │ │ + beq.w 89d4a │ │ ldrb r0, [r0, #0] │ │ - b.n 899cc │ │ + b.n 899f8 │ │ mov.w r0, r9, lsl #16 │ │ uxtb r1, r6 │ │ bfi r0, r3, #8, #8 │ │ ldr r2, [sp, #96] @ 0x60 │ │ add r0, r1 │ │ adds.w r1, r0, lr │ │ and.w r3, r2, r1 │ │ adc.w r1, ip, sl │ │ and.w r1, r1, r8 │ │ str r1, [sp, #140] @ 0x8c │ │ mov r2, ip │ │ - b.n 89966 │ │ + b.n 89992 │ │ ldrd r1, r0, [sp, #68] @ 0x44 │ │ cmp r0, r1 │ │ - bcc.w 89cde │ │ + bcc.w 89d0a │ │ ldr r0, [sp, #80] @ 0x50 │ │ ldr r1, [sp, #136] @ 0x88 │ │ umull r1, r0, r1, r0 │ │ cmp r0, #0 │ │ - bne.w 89cee │ │ + bne.w 89d1a │ │ ldr r0, [sp, #84] @ 0x54 │ │ cmp r0, r1 │ │ - bcc.w 89d12 │ │ + bcc.w 89d3e │ │ ldr r0, [sp, #124] @ 0x7c │ │ mov.w r2, #4294967295 @ 0xffffffff │ │ str r5, [sp, #140] @ 0x8c │ │ movs r5, #25 │ │ str r6, [sp, #132] @ 0x84 │ │ uxtab r2, r2, r0 │ │ cmp r2, #7 │ │ - bhi.w 89da0 │ │ + bhi.w 89dcc │ │ ldr r6, [sp, #84] @ 0x54 │ │ ldr r0, [sp, #76] @ 0x4c │ │ subs r4, r6, r1 │ │ add r0, r1 │ │ tbh [pc, r2, lsl #1] │ │ movs r0, r1 │ │ lsls r5, r7, #1 │ │ @@ -147006,41 +146895,41 @@ │ │ lsls r0, r1, #8 │ │ lsls r0, r1, #8 │ │ lsls r0, r1, #8 │ │ lsls r2, r0, #2 │ │ ldr r5, [sp, #140] @ 0x8c │ │ ldr r2, [sp, #84] @ 0x54 │ │ cmp r2, r1 │ │ - beq.w 89d3a │ │ + beq.w 89d66 │ │ ldrb r6, [r0, #0] │ │ movs r2, #0 │ │ - b.n 89a62 │ │ + b.n 89a8e │ │ mov.w r0, r9, lsl #16 │ │ uxtb r1, r6 │ │ bfi r0, r3, #8, #8 │ │ mov r2, ip │ │ add r0, r1 │ │ mov r3, lr │ │ str.w sl, [sp, #140] @ 0x8c │ │ ldr r6, [sp, #88] @ 0x58 │ │ ldr r1, [sp, #108] @ 0x6c │ │ subs r1, r0, r1 │ │ sbcs.w r1, r2, r8 │ │ - bcs.w 88e8a │ │ + bcs.w 88eb6 │ │ subs r1, r0, r3 │ │ ldr r1, [sp, #140] @ 0x8c │ │ sbcs.w r1, r2, r1 │ │ - bcs.w 88e8a │ │ - b.n 89c2a │ │ + bcs.w 88eb6 │ │ + b.n 89c56 │ │ cmp r4, #2 │ │ - bcc.w 89d1e │ │ + bcc.w 89d4a │ │ ldrh r0, [r0, #0] │ │ - b.n 899cc │ │ + b.n 899f8 │ │ cmp r4, #7 │ │ - bls.w 89d1e │ │ + bls.w 89d4a │ │ str.w ip, [sp, #60] @ 0x3c │ │ ldrb.w ip, [r0, #2] │ │ ldr.w r1, [r0, #3] │ │ ldrb r6, [r0, #7] │ │ ldrh r0, [r0, #0] │ │ str.w r9, [sp, #120] @ 0x78 │ │ lsrs r4, r1, #8 │ │ @@ -147048,39 +146937,39 @@ │ │ ldr r5, [sp, #140] @ 0x8c │ │ ldr.w r9, [sp, #120] @ 0x78 │ │ orr.w r4, r4, r6, lsl #24 │ │ ldr.w ip, [sp, #60] @ 0x3c │ │ orr.w r0, r0, r1, lsl #24 │ │ str r4, [sp, #48] @ 0x30 │ │ str r0, [sp, #44] @ 0x2c │ │ - b.n 899d4 │ │ + b.n 89a00 │ │ cmp r4, #4 │ │ - bcc.w 89d1e │ │ + bcc.w 89d4a │ │ ldr r0, [r0, #0] │ │ str r0, [sp, #44] @ 0x2c │ │ movs r0, #0 │ │ str r0, [sp, #48] @ 0x30 │ │ ldr r5, [sp, #140] @ 0x8c │ │ ldr r1, [sp, #132] @ 0x84 │ │ mov.w r0, r9, lsl #16 │ │ bfi r0, r3, #8, #8 │ │ ldr r4, [sp, #92] @ 0x5c │ │ uxtb r1, r1 │ │ add r0, r1 │ │ ldr r1, [sp, #80] @ 0x50 │ │ umull r1, r0, r0, r1 │ │ cmp r0, #0 │ │ - bne.w 89d4c │ │ + bne.w 89d78 │ │ ldr r0, [sp, #84] @ 0x54 │ │ cmp r0, r1 │ │ - bcc.w 89d52 │ │ + bcc.w 89d7e │ │ movs r0, #25 │ │ cmp r2, #7 │ │ str r0, [sp, #140] @ 0x8c │ │ - bhi.w 89da4 │ │ + bhi.w 89dd0 │ │ ldr r0, [sp, #76] @ 0x4c │ │ ldr r3, [sp, #84] @ 0x54 │ │ add r0, r1 │ │ subs r3, r3, r1 │ │ tbh [pc, r2, lsl #1] │ │ movs r0, r1 │ │ movs r6, r7 │ │ @@ -147089,34 +146978,34 @@ │ │ lsls r6, r5, #6 │ │ lsls r6, r5, #6 │ │ lsls r6, r5, #6 │ │ lsls r4, r0, #1 │ │ ldr r6, [sp, #88] @ 0x58 │ │ ldr r2, [sp, #84] @ 0x54 │ │ cmp r2, r1 │ │ - beq.w 89d60 │ │ + beq.w 89d8c │ │ ldrb r3, [r0, #0] │ │ - b.n 89aca │ │ + b.n 89af6 │ │ cmp r4, #2 │ │ - bcc.w 89d3a │ │ + bcc.w 89d66 │ │ ldrh r6, [r0, #0] │ │ - b.n 89a5e │ │ + b.n 89a8a │ │ cmp r4, #7 │ │ - bls.w 89d3a │ │ + bls.w 89d66 │ │ ldrb r6, [r0, #2] │ │ ldr.w r1, [r0, #3] │ │ ldrb r2, [r0, #7] │ │ ldrh r0, [r0, #0] │ │ lsrs r4, r1, #8 │ │ orr.w r0, r0, r6, lsl #16 │ │ orr.w r2, r4, r2, lsl #24 │ │ orr.w r6, r0, r1, lsl #24 │ │ - b.n 89a60 │ │ + b.n 89a8c │ │ cmp r4, #4 │ │ - bcc.w 89d3a │ │ + bcc.w 89d66 │ │ ldr r6, [r0, #0] │ │ movs r2, #0 │ │ ldr r5, [sp, #140] @ 0x8c │ │ ldr r1, [sp, #132] @ 0x84 │ │ mov.w r0, r9, lsl #16 │ │ bfi r0, r3, #8, #8 │ │ str r2, [sp, #16] │ │ @@ -147126,98 +147015,98 @@ │ │ ldr r1, [sp, #96] @ 0x60 │ │ adds r0, r0, r6 │ │ and.w r3, r0, r1 │ │ adc.w r0, ip, r2 │ │ and.w r0, r0, r8 │ │ str r0, [sp, #140] @ 0x8c │ │ mov r0, r6 │ │ - b.n 89968 │ │ + b.n 89994 │ │ ldr r6, [sp, #88] @ 0x58 │ │ cmp r3, #2 │ │ - bcc.w 89d60 │ │ + bcc.w 89d8c │ │ ldrh r3, [r0, #0] │ │ - b.n 89aca │ │ + b.n 89af6 │ │ cmp r3, #7 │ │ - bls.w 89d60 │ │ + bls.w 89d8c │ │ ldr.w r1, [r0, #3] │ │ ldrb r2, [r0, #7] │ │ ldrb r3, [r0, #2] │ │ ldrh r0, [r0, #0] │ │ lsrs r6, r1, #8 │ │ orr.w r6, r6, r2, lsl #24 │ │ str r6, [sp, #140] @ 0x8c │ │ orr.w r0, r0, r3, lsl #16 │ │ orr.w r3, r0, r1, lsl #24 │ │ ldrd r0, r2, [sp, #44] @ 0x2c │ │ strd r3, r6, [sp, #8] │ │ - b.n 89966 │ │ + b.n 89992 │ │ ldr r6, [sp, #88] @ 0x58 │ │ cmp r3, #4 │ │ - bcc.w 89d60 │ │ + bcc.w 89d8c │ │ ldr r3, [r0, #0] │ │ movs r0, #0 │ │ movs r1, #0 │ │ str r0, [sp, #12] │ │ ldrd r0, r2, [sp, #44] @ 0x2c │ │ str r3, [sp, #8] │ │ str r1, [sp, #140] @ 0x8c │ │ - b.n 89968 │ │ + b.n 89994 │ │ movs r0, #6 │ │ - b.n 89c92 │ │ + b.n 89cbe │ │ movs r0, #6 │ │ ldr r4, [sp, #92] @ 0x5c │ │ ldr.w lr, [sp, #128] @ 0x80 │ │ - b.n 89c94 │ │ + b.n 89cc0 │ │ ldr r1, [sp, #140] @ 0x8c │ │ movs r0, #0 │ │ ldr r4, [sp, #92] @ 0x5c │ │ add.w r9, r1, ip │ │ ldr r1, [sp, #128] @ 0x80 │ │ str.w lr, [sp, #124] @ 0x7c │ │ strd r9, r0, [r1, #24] │ │ mov.w sl, #0 │ │ movs r0, #19 │ │ mov ip, r9 │ │ ldr.w lr, [sp, #128] @ 0x80 │ │ - b.n 89c94 │ │ + b.n 89cc0 │ │ movs r0, #0 │ │ - b.n 89b74 │ │ + b.n 89ba0 │ │ ldr.w lr, [sp, #128] @ 0x80 │ │ movs r1, #0 │ │ ldrd sl, r9, [sp, #52] @ 0x34 │ │ movs r0, #6 │ │ str r1, [sp, #120] @ 0x78 │ │ strd r5, ip, [lr, #24] │ │ - b.n 89c92 │ │ + b.n 89cbe │ │ ldr r1, [sp, #140] @ 0x8c │ │ movs r0, #0 │ │ ldr r2, [sp, #60] @ 0x3c │ │ ldr r4, [sp, #92] @ 0x5c │ │ add.w r9, r1, r2 │ │ strd r9, r0, [lr, #24] │ │ str.w sl, [sp, #124] @ 0x7c │ │ mov.w sl, #0 │ │ movs r0, #19 │ │ mov ip, r9 │ │ - b.n 89c94 │ │ + b.n 89cc0 │ │ add ip, sl │ │ ldr r4, [sp, #92] @ 0x5c │ │ movs r0, #0 │ │ str.w r8, [sp, #124] @ 0x7c │ │ mov r9, ip │ │ strd ip, r0, [lr, #24] │ │ mov.w sl, #0 │ │ movs r0, #19 │ │ - b.n 89c94 │ │ + b.n 89cc0 │ │ ldr.w lr, [sp, #128] @ 0x80 │ │ movs r1, #0 │ │ add.w ip, r9, fp │ │ str r4, [sp, #124] @ 0x7c │ │ strd ip, r1, [lr, #24] │ │ - b.n 89c86 │ │ + b.n 89cb2 │ │ ldr r2, [sp, #128] @ 0x80 │ │ movs r0, #0 │ │ movs r1, #1 │ │ strd r1, r0, [r2, #24] │ │ movs r1, #0 │ │ strd r0, r1, [r4] │ │ add sp, #144 @ 0x90 │ │ @@ -147229,107 +147118,107 @@ │ │ str.w r8, [sp, #124] @ 0x7c │ │ ldr r4, [sp, #92] @ 0x5c │ │ movs r0, #0 │ │ str r0, [sp, #120] @ 0x78 │ │ movs r0, #19 │ │ mov r9, ip │ │ mov.w sl, #0 │ │ - b.n 89c94 │ │ + b.n 89cc0 │ │ mov.w sl, #0 │ │ movs r0, #19 │ │ mov ip, r5 │ │ - b.n 89bea │ │ + b.n 89c16 │ │ movs r1, #0 │ │ movs r0, #6 │ │ str r1, [sp, #120] @ 0x78 │ │ ldrd sl, r9, [sp, #36] @ 0x24 │ │ - b.n 89ae0 │ │ + b.n 89b0c │ │ movs r1, #0 │ │ movs r0, #6 │ │ str r1, [sp, #120] @ 0x78 │ │ ldrd sl, r9, [sp, #28] │ │ - b.n 89c92 │ │ + b.n 89cbe │ │ movs r1, #0 │ │ movs r0, #6 │ │ str r1, [sp, #120] @ 0x78 │ │ ldrd sl, r9, [sp, #20] │ │ - b.n 89c92 │ │ + b.n 89cbe │ │ ldr r1, [sp, #136] @ 0x88 │ │ movs r0, #0 │ │ ldr.w lr, [sp, #128] @ 0x80 │ │ add.w ip, r1, fp │ │ str.w r9, [sp, #124] @ 0x7c │ │ strd ip, r0, [lr, #24] │ │ - b.n 89c86 │ │ + b.n 89cb2 │ │ ldr.w lr, [sp, #128] @ 0x80 │ │ movs r0, #25 │ │ ldr r1, [sp, #124] @ 0x7c │ │ lsls r1, r1, #8 │ │ uxth r1, r1 │ │ add r1, r0 │ │ - b.n 89c02 │ │ + b.n 89c2e │ │ mov ip, r0 │ │ ldr r0, [sp, #124] @ 0x7c │ │ movs r1, #19 │ │ mov.w sl, #0 │ │ bfi r1, r0, #8, #8 │ │ uxtb r0, r1 │ │ lsrs r1, r1, #8 │ │ str r1, [sp, #124] @ 0x7c │ │ movs r1, #0 │ │ str r1, [sp, #120] @ 0x78 │ │ mov r9, ip │ │ - b.n 89c94 │ │ + b.n 89cc0 │ │ mov r9, lr │ │ movs r0, #24 │ │ str r2, [sp, #124] @ 0x7c │ │ ldr.w lr, [sp, #128] @ 0x80 │ │ - b.n 89c94 │ │ + b.n 89cc0 │ │ mov ip, r9 │ │ ldr.w lr, [sp, #128] @ 0x80 │ │ - b.n 89b50 │ │ + b.n 89b7c │ │ ldr.w lr, [sp, #128] @ 0x80 │ │ - b.n 89c86 │ │ + b.n 89cb2 │ │ mov r6, r3 │ │ movs r1, #0 │ │ movs r3, #1 │ │ strd r3, r1, [r4] │ │ add.w r1, r4, #8 │ │ stmia r1!, {r0, r2, r6} │ │ ldr r0, [sp, #140] @ 0x8c │ │ str r0, [r4, #20] │ │ add sp, #144 @ 0x90 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, pc} │ │ mov.w sl, #0 │ │ movs r0, #19 │ │ movs r1, #4 │ │ - b.n 89c6c │ │ + b.n 89c98 │ │ mov.w sl, #0 │ │ movs r0, #19 │ │ movs r1, #2 │ │ - b.n 89c6c │ │ + b.n 89c98 │ │ mov.w sl, #0 │ │ movs r0, #19 │ │ movs r1, #8 │ │ - b.n 89c6c │ │ + b.n 89c98 │ │ mov.w sl, #0 │ │ movs r0, #19 │ │ movs r1, #1 │ │ str r1, [sp, #124] @ 0x7c │ │ mov ip, r9 │ │ - b.n 89c94 │ │ + b.n 89cc0 │ │ movs r0, #0 │ │ - b.n 89b94 │ │ + b.n 89bc0 │ │ movs r0, #56 @ 0x38 │ │ - b.n 89adc │ │ + b.n 89b08 │ │ ldr.w lr, [sp, #128] @ 0x80 │ │ - b.n 89c94 │ │ + b.n 89cc0 │ │ movs r0, #56 @ 0x38 │ │ - b.n 89c94 │ │ + b.n 89cc0 │ │ mov ip, r5 │ │ movs r0, #0 │ │ mov r9, ip │ │ str r0, [sp, #120] @ 0x78 │ │ movs r0, #19 │ │ mov.w sl, #0 │ │ ldr r4, [sp, #92] @ 0x5c │ │ @@ -147346,90 +147235,90 @@ │ │ strd r0, ip, [r4, #8] │ │ movs r0, #2 │ │ strd r0, r1, [r4] │ │ add sp, #144 @ 0x90 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, pc} │ │ mov ip, r2 │ │ - b.n 89b90 │ │ + b.n 89bbc │ │ mov ip, r5 │ │ - b.n 89b90 │ │ + b.n 89bbc │ │ movs r0, #0 │ │ mov ip, r1 │ │ str r0, [sp, #120] @ 0x78 │ │ movs r0, #19 │ │ mov r9, r1 │ │ mov.w sl, #0 │ │ - b.n 89c94 │ │ + b.n 89cc0 │ │ movs r0, #0 │ │ ldr r1, [sp, #64] @ 0x40 │ │ - b.n 89d0a │ │ + b.n 89d36 │ │ movs r0, #0 │ │ ldr r1, [sp, #64] @ 0x40 │ │ - b.n 89d16 │ │ + b.n 89d42 │ │ movs r0, #19 │ │ movs r6, #0 │ │ str r0, [sp, #140] @ 0x8c │ │ ldr r5, [sp, #64] @ 0x40 │ │ - b.n 89d6e │ │ + b.n 89d9a │ │ movs r5, #56 @ 0x38 │ │ - b.n 89d42 │ │ + b.n 89d6e │ │ movs r0, #56 @ 0x38 │ │ str r0, [sp, #140] @ 0x8c │ │ - b.n 89d6e │ │ + b.n 89d9a │ │ movs r5, #56 @ 0x38 │ │ - b.n 89d26 │ │ + b.n 89d52 │ │ movs r0, #19 │ │ movs r6, #0 │ │ str r0, [sp, #140] @ 0x8c │ │ ldr r5, [sp, #76] @ 0x4c │ │ - b.n 89d6e │ │ + b.n 89d9a │ │ movs r0, #0 │ │ ldr r1, [sp, #76] @ 0x4c │ │ str r0, [sp, #48] @ 0x30 │ │ movs r5, #19 │ │ str r1, [sp, #44] @ 0x2c │ │ - b.n 89d26 │ │ + b.n 89d52 │ │ movs r0, #0 │ │ ldr r1, [sp, #76] @ 0x4c │ │ str r0, [sp, #16] │ │ movs r5, #19 │ │ str r1, [sp, #88] @ 0x58 │ │ - b.n 89d42 │ │ + b.n 89d6e │ │ movs r1, #0 │ │ movs r5, #19 │ │ str r1, [sp, #48] @ 0x30 │ │ str r0, [sp, #44] @ 0x2c │ │ str r5, [sp, #140] @ 0x8c │ │ ldrd r5, r6, [sp, #44] @ 0x2c │ │ ldr r4, [sp, #92] @ 0x5c │ │ - b.n 89d6e │ │ + b.n 89d9a │ │ movs r1, #19 │ │ movs r6, #0 │ │ str r1, [sp, #140] @ 0x8c │ │ mov r5, r0 │ │ - b.n 89d6e │ │ + b.n 89d9a │ │ movs r1, #0 │ │ movs r5, #19 │ │ str r1, [sp, #16] │ │ str r0, [sp, #88] @ 0x58 │ │ str r5, [sp, #140] @ 0x8c │ │ ldr r6, [sp, #16] │ │ ldrd r5, r4, [sp, #88] @ 0x58 │ │ - b.n 89d6e │ │ + b.n 89d9a │ │ movs r0, #56 @ 0x38 │ │ str r0, [sp, #140] @ 0x8c │ │ - b.n 89d6a │ │ + b.n 89d96 │ │ movs r0, #0 │ │ ldr r1, [sp, #76] @ 0x4c │ │ str r0, [sp, #12] │ │ movs r0, #19 │ │ str r0, [sp, #140] @ 0x8c │ │ str r1, [sp, #8] │ │ - b.n 89d6a │ │ + b.n 89d96 │ │ movs r1, #0 │ │ str r0, [sp, #8] │ │ str r1, [sp, #12] │ │ movs r1, #19 │ │ str r1, [sp, #140] @ 0x8c │ │ ldrd r5, r6, [sp, #8] │ │ ldr r1, [sp, #80] @ 0x50 │ │ @@ -147442,29 +147331,29 @@ │ │ strd r1, r0, [r4, #8] │ │ add sp, #144 @ 0x90 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, pc} │ │ movs r1, #0 │ │ movs r0, #56 @ 0x38 │ │ str r1, [sp, #120] @ 0x78 │ │ - b.n 89adc │ │ + b.n 89b08 │ │ ldrd r6, r5, [sp] │ │ movs r0, #25 │ │ str r0, [sp, #140] @ 0x8c │ │ - b.n 89d6e │ │ - b.n 89d42 │ │ - b.n 89d26 │ │ - b.n 89d6a │ │ + b.n 89d9a │ │ + b.n 89d6e │ │ + b.n 89d52 │ │ + b.n 89d96 │ │ push {r4, lr} │ │ uxtb r2, r2 │ │ cmp r2, #8 │ │ - bne.n 89dee │ │ + bne.n 89e1a │ │ ldrd r2, r3, [r1] │ │ cmp r3, #8 │ │ - bcc.n 89df6 │ │ + bcc.n 89e22 │ │ ldrb.w lr, [r2, #7] │ │ subs r3, #8 │ │ ldr.w ip, [r2, #3] │ │ add.w r4, r2, #8 │ │ strd r4, r3, [r1] │ │ mov.w r1, lr, lsl #24 │ │ orrs.w r1, r1, ip, lsr #8 │ │ @@ -147479,15 +147368,15 @@ │ │ orrs r1, r2 │ │ str r1, [r0, #4] │ │ movs r1, #82 @ 0x52 │ │ strb r1, [r0, #0] │ │ pop {r4, pc} │ │ ldrd r2, r3, [r1] │ │ cmp r3, #4 │ │ - bcs.n 89e04 │ │ + bcs.n 89e30 │ │ movs r1, #0 │ │ str r2, [r0, #8] │ │ str r1, [r0, #12] │ │ movs r1, #19 │ │ str r2, [r0, #4] │ │ strb r1, [r0, #0] │ │ pop {r4, pc} │ │ @@ -147496,15 +147385,15 @@ │ │ str r4, [r0, #4] │ │ strd r2, r3, [r1] │ │ movs r1, #82 @ 0x52 │ │ strb r1, [r0, #0] │ │ pop {r4, pc} │ │ ldrd r2, r3, [r1] │ │ cmp r3, #7 │ │ - bhi.n 89e36 │ │ + bhi.n 89e62 │ │ movs r1, #0 │ │ strb r2, [r0, #8] │ │ str r1, [r0, #12] │ │ lsrs r1, r2, #24 │ │ strb r1, [r0, #11] │ │ lsrs r1, r2, #8 │ │ strh.w r1, [r0, #9] │ │ @@ -147530,57 +147419,57 @@ │ │ strb r1, [r0, #0] │ │ bx lr │ │ push {r4, r5, r7, lr} │ │ mov.w r3, #4294967295 @ 0xffffffff │ │ uxtab r4, r3, r2 │ │ mov.w lr, #26 │ │ cmp r4, #7 │ │ - bhi.n 89f02 │ │ + bhi.n 89f2e │ │ tbb [pc, r4] │ │ asrs r4, r0, #12 │ │ lsrs r0, r0, #13 │ │ eors r0, r0 │ │ movs r0, #64 @ 0x40 │ │ ldrd r3, r4, [r1] │ │ - cbz r4, 89eca │ │ + cbz r4, 89ef6 │ │ subs r5, r4, #1 │ │ ldrb.w r2, [r3], #1 │ │ - b.n 89eb6 │ │ + b.n 89ee2 │ │ ldrd r3, r4, [r1] │ │ cmp r4, #4 │ │ - bcc.n 89eca │ │ + bcc.n 89ef6 │ │ subs r5, r4, #4 │ │ ldr.w r2, [r3], #4 │ │ - b.n 89eb6 │ │ + b.n 89ee2 │ │ ldrd r3, r4, [r1] │ │ cmp r4, #2 │ │ - bcc.n 89eca │ │ + bcc.n 89ef6 │ │ subs r5, r4, #2 │ │ ldrh.w r2, [r3], #2 │ │ strd r3, r5, [r1] │ │ movs r1, #82 @ 0x52 │ │ str r2, [r0, #4] │ │ strb r1, [r0, #0] │ │ pop {r4, r5, r7, pc} │ │ ldrd r3, r4, [r1] │ │ cmp r4, #7 │ │ - bhi.n 89ed4 │ │ + bhi.n 89f00 │ │ mov.w ip, #0 │ │ mov.w lr, #19 │ │ - b.n 89f02 │ │ + b.n 89f2e │ │ ldrb r5, [r3, #7] │ │ subs r4, #8 │ │ ldr.w r2, [r3, #3] │ │ ldrb.w ip, [r3, #2] │ │ ldrh.w lr, [r3] │ │ adds r3, #8 │ │ strd r3, r4, [r1] │ │ lsls r1, r5, #24 │ │ orrs.w r1, r1, r2, lsr #8 │ │ - bne.n 89f12 │ │ + bne.n 89f3e │ │ orr.w r1, lr, ip, lsl #16 │ │ orr.w r2, r1, r2, lsl #24 │ │ movs r1, #82 @ 0x52 │ │ str r2, [r0, #4] │ │ strb r1, [r0, #0] │ │ pop {r4, r5, r7, pc} │ │ strb r2, [r0, #1] │ │ @@ -147606,261 +147495,286 @@ │ │ it ls │ │ movls r6, r2 │ │ cmp r6, #48 @ 0x30 │ │ mov r8, r6 │ │ it ls │ │ movls.w r8, #48 @ 0x30 │ │ cmp r6, #171 @ 0xab │ │ - bcs.n 89f52 │ │ + bcs.n 89f7e │ │ add r4, sp, #8 │ │ movs r3, #170 @ 0xaa │ │ - b.n 89f84 │ │ + b.n 89fb0 │ │ movw r3, #21846 @ 0x5556 │ │ movt r3, #1365 @ 0x555 │ │ cmp r2, r3 │ │ - bcc.n 89f62 │ │ - bl 3e03c │ │ + bcc.n 89f8e │ │ + bl 3e344 │ │ add.w r2, r8, r8, lsl #1 │ │ lsls r5, r2, #3 │ │ - beq.n 89f80 │ │ + beq.n 89fac │ │ mov r9, r0 │ │ mov r0, r5 │ │ mov sl, r1 │ │ - blx d87f0 │ │ - cbz r0, 89faa │ │ + blx d8810 │ │ + cbz r0, 89fd6 │ │ mov r4, r0 │ │ mov r1, sl │ │ mov r0, r9 │ │ mov r3, r8 │ │ - b.n 89f84 │ │ + b.n 89fb0 │ │ movs r3, #0 │ │ movs r4, #8 │ │ movs r2, #0 │ │ cmp r1, #65 @ 0x41 │ │ it cc │ │ movcc r2, #1 │ │ str r2, [sp, #0] │ │ mov r2, r4 │ │ - bl 8a16c │ │ + bl 8a1d6 │ │ cmp r6, #170 @ 0xaa │ │ - bls.n 89f9e │ │ + bls.n 89fca │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add.w sp, sp, #4096 @ 0x1000 │ │ add sp, #16 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #8 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ cmp r6, #171 @ 0xab │ │ mov r5, r0 │ │ itt cs │ │ movcs r0, r4 │ │ - blxcs d87c0 │ │ + blxcs d87d0 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ + push {r4, r5, r7, lr} │ │ + add r7, sp, #8 │ │ + sub sp, #24 │ │ + ldrd r1, r2, [r0] │ │ + mov r4, r0 │ │ + movs r0, #40 @ 0x28 │ │ + movs r3, #8 │ │ + strd r3, r0, [sp] │ │ + movs r5, #4 │ │ + lsls r0, r1, #1 │ │ + cmp r0, #4 │ │ + add r0, sp, #12 │ │ + it hi │ │ + lslhi r5, r1, #1 │ │ + mov r3, r5 │ │ + bl 7789c │ │ + ldr r0, [sp, #12] │ │ + cmp r0, #1 │ │ + itttt ne │ │ + ldrne r0, [sp, #16] │ │ + strdne r5, r0, [r4] │ │ + addne sp, #24 │ │ + popne {r4, r5, r7, pc} │ │ + ldrd r0, r1, [sp, #16] │ │ + bl 3e2ac │ │ ldr r1, [r0, #0] │ │ cmp r1, #0 │ │ it ne │ │ bxne lr │ │ ldr r1, [r0, #8] │ │ - cbz r1, 89fe4 │ │ + cbz r1, 8a04e │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ ldr r1, [r0, #4] │ │ mov r4, r0 │ │ mov r0, r1 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ ldmia.w sp!, {r4, r6, r7, lr} │ │ ldr r1, [r0, #16] │ │ cmp r1, #0 │ │ itt ne │ │ ldrne r0, [r0, #12] │ │ - bne.w d870c │ │ + bne.w d871c │ │ bx lr │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ ldrd r8, r6, [r0, #4] │ │ mov r5, r0 │ │ - cbz r6, 8a032 │ │ + cbz r6, 8a09c │ │ add.w r4, r8, #8 │ │ - b.n 8a00e │ │ + b.n 8a078 │ │ adds r4, #40 @ 0x28 │ │ subs r6, #1 │ │ - beq.n 8a032 │ │ + beq.n 8a09c │ │ ldr.w r0, [r4, #-8] │ │ cmp r0, #0 │ │ - bne.n 8a008 │ │ + bne.n 8a072 │ │ ldr r0, [r4, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r4, #-4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r4, #8] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #4] │ │ - blxne d87c0 │ │ - b.n 8a008 │ │ + blxne d87d0 │ │ + b.n 8a072 │ │ ldr r0, [r5, #0] │ │ - cbz r0, 8a044 │ │ + cbz r0, 8a0ae │ │ mov r0, r8 │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ cmp r1, #0 │ │ it eq │ │ bxeq lr │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ mov r4, r0 │ │ add.w r0, r1, r1, lsl #2 │ │ movs r6, #0 │ │ mov.w r8, r0, lsl #3 │ │ - b.n 8a06c │ │ + b.n 8a0d6 │ │ adds r6, #40 @ 0x28 │ │ cmp r8, r6 │ │ - beq.n 8a08e │ │ + beq.n 8a0f8 │ │ ldr r0, [r4, r6] │ │ cmp r0, #0 │ │ - bne.n 8a066 │ │ + bne.n 8a0d0 │ │ adds r5, r4, r6 │ │ ldr r0, [r5, #8] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r5, #16] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #12] │ │ - blxne d87c0 │ │ - b.n 8a066 │ │ + blxne d87d0 │ │ + b.n 8a0d0 │ │ mov r0, r4 │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ mov r4, r0 │ │ ldr r0, [r0, #8] │ │ cmp r0, #2 │ │ - beq.n 8a0ae │ │ - cbz r0, 8a0b4 │ │ + beq.n 8a118 │ │ + cbz r0, 8a11e │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r6, [r4, #16] │ │ - cbz r6, 8a0f2 │ │ + cbz r6, 8a15c │ │ ldr.w r8, [r4, #12] │ │ add.w r5, r8, #8 │ │ - b.n 8a0c8 │ │ + b.n 8a132 │ │ adds r5, #40 @ 0x28 │ │ subs r6, #1 │ │ - beq.n 8a0ec │ │ + beq.n 8a156 │ │ ldr.w r0, [r5, #-8] │ │ cmp r0, #0 │ │ - bne.n 8a0c2 │ │ + bne.n 8a12c │ │ ldr r0, [r5, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r5, #-4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r5, #8] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #4] │ │ - blxne d87c0 │ │ - b.n 8a0c2 │ │ + blxne d87d0 │ │ + b.n 8a12c │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [r4, #24] │ │ cmp r0, #0 │ │ - beq.n 8a0ae │ │ + beq.n 8a118 │ │ ldr r0, [r4, #20] │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ mov r4, r0 │ │ ldr r0, [r0, #0] │ │ - cbz r0, 8a11a │ │ + cbz r0, 8a184 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r6, [r4, #8] │ │ - cbz r6, 8a158 │ │ + cbz r6, 8a1c2 │ │ ldr.w r8, [r4, #4] │ │ add.w r5, r8, #8 │ │ - b.n 8a12e │ │ + b.n 8a198 │ │ adds r5, #40 @ 0x28 │ │ subs r6, #1 │ │ - beq.n 8a152 │ │ + beq.n 8a1bc │ │ ldr.w r0, [r5, #-8] │ │ cmp r0, #0 │ │ - bne.n 8a128 │ │ + bne.n 8a192 │ │ ldr r0, [r5, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r5, #-4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r5, #8] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #4] │ │ - blxne d87c0 │ │ - b.n 8a128 │ │ + blxne d87d0 │ │ + b.n 8a192 │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [r4, #16] │ │ cmp r0, #0 │ │ - beq.n 8a114 │ │ + beq.n 8a17e │ │ ldr r0, [r4, #12] │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #420 @ 0x1a4 │ │ mov r4, r1 │ │ mov r8, r3 │ │ str r2, [sp, #80] @ 0x50 │ │ mov.w r1, #1073741824 @ 0x40000000 │ │ str r0, [sp, #56] @ 0x38 │ │ movs r0, #0 │ │ mov r2, r4 │ │ movs r3, #0 │ │ - bl d53d0 │ │ + bl d53dc │ │ umull r2, r3, r0, r4 │ │ adds r6, r0, #1 │ │ adc.w r5, r1, #0 │ │ mla r3, r1, r4, r3 │ │ eor.w r3, r3, #1073741824 @ 0x40000000 │ │ orrs r2, r3 │ │ it eq │ │ moveq r5, r1 │ │ str r5, [sp, #20] │ │ it eq │ │ moveq r6, r0 │ │ cmp.w r4, #4096 @ 0x1000 │ │ str r6, [sp, #24] │ │ - bhi.n 8a1be │ │ + bhi.n 8a228 │ │ sub.w r0, r4, r4, lsr #1 │ │ cmp r0, #64 @ 0x40 │ │ it cs │ │ movcs r0, #64 @ 0x40 │ │ - b.n 8a1e0 │ │ + b.n 8a24a │ │ orr.w r0, r4, #1 │ │ movs r2, #1 │ │ clz r0, r0 │ │ eor.w r0, r0, #31 │ │ and.w r1, r0, #1 │ │ add.w r0, r1, r0, lsr #1 │ │ lsr.w r1, r4, r0 │ │ @@ -147880,112 +147794,112 @@ │ │ movs r5, #0 │ │ mov r3, r4 │ │ str r0, [sp, #12] │ │ strd r4, r8, [sp, #36] @ 0x24 │ │ add.w r4, sl, sl, lsl #1 │ │ cmp r3, sl │ │ str.w sl, [sp, #64] @ 0x40 │ │ - bls.n 8a248 │ │ + bls.n 8a2b2 │ │ ldr r0, [sp, #56] @ 0x38 │ │ sub.w fp, r3, sl │ │ ldr r2, [sp, #80] @ 0x50 │ │ ldr r1, [sp, #28] │ │ add.w r0, r0, r4, lsl #3 │ │ str r5, [sp, #52] @ 0x34 │ │ cmp fp, r1 │ │ str r4, [sp, #68] @ 0x44 │ │ - bcs.n 8a25a │ │ + bcs.n 8a2c4 │ │ ldr r1, [r7, #8] │ │ - cbz r1, 8a284 │ │ + cbz r1, 8a2ee │ │ movs r1, #0 │ │ cmp.w fp, #32 │ │ strd r1, r1, [sp] │ │ it cs │ │ movcs.w fp, #32 │ │ mov r1, fp │ │ mov r3, r8 │ │ - bl 8a684 │ │ - b.n 8a3a8 │ │ + bl 8a6f0 │ │ + b.n 8a412 │ │ movs r0, #1 │ │ mov lr, r6 │ │ mov.w fp, #0 │ │ str r0, [sp, #48] @ 0x30 │ │ cmp r5, #2 │ │ - bcs.w 8a410 │ │ - b.n 8a62e │ │ + bcs.w 8a47a │ │ + b.n 8a698 │ │ cmp.w fp, #2 │ │ - bcc.w 8a3a8 │ │ + bcc.w 8a412 │ │ ldrd r5, r3, [r0] │ │ ldrd ip, lr, [r0, #24] │ │ subs.w r1, ip, r5 │ │ sbcs.w r1, lr, r3 │ │ - bcs.n 8a292 │ │ + bcs.n 8a2fc │ │ cmp.w fp, #2 │ │ - bne.n 8a29e │ │ + bne.n 8a308 │ │ mov.w r9, #2 │ │ mov.w sl, #1 │ │ - b.n 8a324 │ │ + b.n 8a38e │ │ ldr r0, [sp, #28] │ │ cmp fp, r0 │ │ it cs │ │ movcs fp, r0 │ │ mov.w r3, fp, lsl #1 │ │ - b.n 8a3ae │ │ + b.n 8a418 │ │ cmp.w fp, #2 │ │ - bne.n 8a2ce │ │ + bne.n 8a338 │ │ mov.w fp, #2 │ │ - b.n 8a3a8 │ │ + b.n 8a412 │ │ ldr r1, [sp, #12] │ │ mov.w r9, #2 │ │ strd r5, r3, [sp, #72] @ 0x48 │ │ mov r3, lr │ │ add.w r5, r1, r4, lsl #3 │ │ str r6, [sp, #84] @ 0x54 │ │ mov r6, ip │ │ ldrd r2, r4, [r5] │ │ subs r6, r2, r6 │ │ sbcs.w r3, r4, r3 │ │ - bcs.n 8a300 │ │ + bcs.n 8a36a │ │ add.w r9, r9, #1 │ │ adds r5, #24 │ │ mov r6, r2 │ │ mov r3, r4 │ │ cmp fp, r9 │ │ - bne.n 8a2b2 │ │ - b.n 8a2fe │ │ + bne.n 8a31c │ │ + b.n 8a368 │ │ ldr r1, [sp, #12] │ │ mov.w r9, #2 │ │ strd r5, r3, [sp, #72] @ 0x48 │ │ mov sl, ip │ │ add.w r5, r1, r4, lsl #3 │ │ mov r4, lr │ │ str r6, [sp, #84] @ 0x54 │ │ ldrd r2, r3, [r5] │ │ subs.w r6, r2, sl │ │ sbcs.w r4, r3, r4 │ │ - bcc.n 8a300 │ │ + bcc.n 8a36a │ │ add.w r9, r9, #1 │ │ adds r5, #24 │ │ mov sl, r2 │ │ mov r4, r3 │ │ cmp fp, r9 │ │ - bne.n 8a2e2 │ │ + bne.n 8a34c │ │ mov r9, fp │ │ ldrd sl, r4, [sp, #64] @ 0x40 │ │ ldrd r2, r6, [sp, #80] @ 0x50 │ │ ldr r1, [sp, #28] │ │ cmp r9, r1 │ │ - bcc.w 8a22a │ │ + bcc.w 8a294 │ │ ldr r0, [sp, #72] @ 0x48 │ │ subs.w r0, ip, r0 │ │ ldr r0, [sp, #76] @ 0x4c │ │ sbcs.w r0, lr, r0 │ │ - bcs.n 8a39c │ │ + bcs.n 8a406 │ │ movs.w sl, r9, lsr #1 │ │ - beq.n 8a3a0 │ │ + beq.n 8a40a │ │ add.w r2, r9, r9, lsl #1 │ │ ldr r0, [sp, #8] │ │ str r6, [sp, #84] @ 0x54 │ │ lsls r3, r4, #3 │ │ ldr r6, [sp, #56] @ 0x38 │ │ add.w r2, r0, r2, lsl #3 │ │ str.w r9, [sp, #60] @ 0x3c │ │ @@ -148013,21 +147927,21 @@ │ │ ldr r0, [r4, #8] │ │ str.w fp, [r1, #4] │ │ str.w lr, [r1, #8] │ │ str.w r9, [r4, #-4] │ │ str.w ip, [r4, #4] │ │ str r0, [r1, #20] │ │ str r5, [r4, #8] │ │ - bne.n 8a338 │ │ + bne.n 8a3a2 │ │ ldr.w r8, [sp, #40] @ 0x28 │ │ ldrd fp, sl, [sp, #60] @ 0x3c │ │ ldr r6, [sp, #84] @ 0x54 │ │ - b.n 8a3a8 │ │ + b.n 8a412 │ │ mov fp, r9 │ │ - b.n 8a3a8 │ │ + b.n 8a412 │ │ mov.w fp, #1 │ │ ldr.w sl, [sp, #64] @ 0x40 │ │ mov.w r0, fp, lsl #1 │ │ adds r3, r0, #1 │ │ sub.w r0, sl, r6, lsr #1 │ │ add.w r2, sl, r3, lsr #1 │ │ adds.w r0, r0, sl │ │ @@ -148052,57 +147966,57 @@ │ │ add.w fp, r1, #32 │ │ sub.w r1, r7, #94 @ 0x5e │ │ it ne │ │ clzne fp, r0 │ │ ldr r5, [sp, #52] @ 0x34 │ │ ldr r4, [sp, #68] @ 0x44 │ │ cmp r5, #2 │ │ - bcc.w 8a62e │ │ + bcc.w 8a698 │ │ ldr r0, [sp, #16] │ │ str.w fp, [sp, #60] @ 0x3c │ │ add.w r0, r0, r4, lsl #3 │ │ str r0, [sp, #32] │ │ ldr r0, [sp, #56] @ 0x38 │ │ add.w r0, r0, r4, lsl #3 │ │ str r0, [sp, #72] @ 0x48 │ │ - b.n 8a55e │ │ + b.n 8a5c8 │ │ cmp r6, #2 │ │ it cs │ │ cmpcs.w lr, #2 │ │ - bcs.n 8a446 │ │ + bcs.n 8a4b0 │ │ lsls r0, r4, #1 │ │ add.w lr, r0, #1 │ │ sub.w r1, r7, #94 @ 0x5e │ │ ldr.w sl, [sp, #64] @ 0x40 │ │ cmp r3, #1 │ │ - bhi.w 8a55e │ │ - b.n 8a62c │ │ + bhi.w 8a5c8 │ │ + b.n 8a696 │ │ cmp sl, r9 │ │ mov r0, r9 │ │ it cc │ │ movcc r0, sl │ │ cmp r8, r0 │ │ - bcc.n 8a430 │ │ + bcc.n 8a49a │ │ add.w r1, r9, r9, lsl #1 │ │ str r4, [sp, #44] @ 0x2c │ │ str r5, [sp, #52] @ 0x34 │ │ cmp r9, sl │ │ add.w r8, ip, r1, lsl #3 │ │ str.w ip, [sp, #84] @ 0x54 │ │ it hi │ │ movhi ip, r8 │ │ ldr r4, [sp, #80] @ 0x50 │ │ add.w r6, r0, r0, lsl #1 │ │ mov r1, ip │ │ lsls r2, r6, #3 │ │ mov r0, r4 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add.w r6, r4, r6, lsl #3 │ │ cmp r9, sl │ │ - bls.n 8a4e0 │ │ + bls.n 8a54a │ │ ldr.w ip, [sp, #32] │ │ ldr.w r2, [r8, #-24]! │ │ mov.w lr, #0 │ │ ldr.w r3, [r6, #-24]! │ │ ldr.w r0, [r8, #4] │ │ ldr r1, [r6, #4] │ │ subs r2, r3, r2 │ │ @@ -148121,21 +148035,21 @@ │ │ mov r1, ip │ │ add.w r6, r6, r0, lsl #3 │ │ orr.w r0, lr, lr, lsl #1 │ │ stmia.w r1, {r2, r4, r5, r9, sl, fp} │ │ add.w r8, r8, r0, lsl #3 │ │ ldr r0, [sp, #84] @ 0x54 │ │ cmp r8, r0 │ │ - beq.n 8a546 │ │ + beq.n 8a5b0 │ │ ldr r1, [sp, #80] @ 0x50 │ │ sub.w ip, ip, #24 │ │ cmp r6, r1 │ │ - bne.n 8a484 │ │ + bne.n 8a4ee │ │ mov r0, r8 │ │ - b.n 8a54a │ │ + b.n 8a5b4 │ │ mov r1, r4 │ │ str r6, [sp, #76] @ 0x4c │ │ ldrd r0, r2, [r1] │ │ mov.w r9, #0 │ │ ldrd r3, r5, [r8] │ │ mov.w sl, #0 │ │ mov lr, r1 │ │ @@ -148159,146 +148073,147 @@ │ │ str.w ip, [sp, #84] @ 0x54 │ │ cmp r1, r6 │ │ itttt ne │ │ orrne.w r0, sl, sl, lsl #1 │ │ addne.w r8, r8, r0, lsl #3 │ │ ldrne r0, [sp, #72] @ 0x48 │ │ cmpne r8, r0 │ │ - bne.n 8a4e4 │ │ + bne.n 8a54e │ │ ldr r0, [sp, #84] @ 0x54 │ │ - b.n 8a54a │ │ + b.n 8a5b4 │ │ mov r0, r8 │ │ ldr r1, [sp, #80] @ 0x50 │ │ subs r2, r6, r1 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr r5, [sp, #52] @ 0x34 │ │ ldr.w fp, [sp, #60] @ 0x3c │ │ ldr r3, [sp, #68] @ 0x44 │ │ ldrd r8, r4, [sp, #40] @ 0x28 │ │ - b.n 8a430 │ │ + b.n 8a49a │ │ subs r3, r5, #1 │ │ ldrb r0, [r1, r3] │ │ cmp r0, fp │ │ - bcc.n 8a62e │ │ + bcc.n 8a698 │ │ add r0, sp, #88 @ 0x58 │ │ mov r5, r3 │ │ ldr.w r6, [r0, r3, lsl #2] │ │ mov.w r9, r6, lsr #1 │ │ add.w r4, r9, lr, lsr #1 │ │ cmp r4, r8 │ │ - bhi.n 8a58e │ │ + bhi.n 8a5f8 │ │ orr.w r0, r6, lr │ │ ands.w r0, r0, #1 │ │ - bne.n 8a58e │ │ + bne.n 8a5f8 │ │ mov.w lr, r4, lsl #1 │ │ cmp r3, #1 │ │ - bhi.n 8a55e │ │ - b.n 8a62c │ │ + bhi.n 8a5c8 │ │ + b.n 8a696 │ │ sub.w r0, sl, r4 │ │ ldr r1, [sp, #56] @ 0x38 │ │ str r3, [sp, #68] @ 0x44 │ │ add.w r0, r0, r0, lsl #1 │ │ add.w ip, r1, r0, lsl #3 │ │ lsls r0, r6, #31 │ │ - beq.n 8a5b0 │ │ + beq.n 8a61a │ │ mov.w sl, lr, lsr #1 │ │ movs.w r0, lr, lsl #31 │ │ - bne.w 8a426 │ │ - b.n 8a5ee │ │ + bne.w 8a490 │ │ + b.n 8a658 │ │ orr.w r0, r9, #1 │ │ movs r1, #62 @ 0x3e │ │ clz r0, r0 │ │ ldr r2, [sp, #80] @ 0x50 │ │ mov r3, r8 │ │ mov fp, r8 │ │ eor.w r0, r1, r0, lsl #1 │ │ movs r1, #0 │ │ strd r0, r1, [sp] │ │ mov r0, ip │ │ mov r1, r9 │ │ mov sl, lr │ │ mov r8, ip │ │ - bl 8a684 │ │ + bl 8a6f0 │ │ mov ip, r8 │ │ mov r8, fp │ │ ldr.w fp, [sp, #60] @ 0x3c │ │ mov lr, sl │ │ ldr r3, [sp, #68] @ 0x44 │ │ mov.w sl, lr, lsr #1 │ │ movs.w r0, lr, lsl #31 │ │ - bne.w 8a426 │ │ + bne.w 8a490 │ │ orr.w r0, sl, #1 │ │ movs r1, #62 @ 0x3e │ │ clz r0, r0 │ │ ldr r2, [sp, #80] @ 0x50 │ │ mov r3, r8 │ │ mov fp, r8 │ │ eor.w r0, r1, r0, lsl #1 │ │ movs r1, #0 │ │ strd r0, r1, [sp] │ │ add.w r0, r9, r9, lsl #1 │ │ mov r1, sl │ │ str.w lr, [sp, #84] @ 0x54 │ │ add.w r0, ip, r0, lsl #3 │ │ mov r8, ip │ │ - bl 8a684 │ │ + bl 8a6f0 │ │ mov ip, r8 │ │ mov r8, fp │ │ ldr r3, [sp, #68] @ 0x44 │ │ ldr.w lr, [sp, #84] @ 0x54 │ │ ldr.w fp, [sp, #60] @ 0x3c │ │ - b.n 8a426 │ │ + b.n 8a490 │ │ movs r5, #1 │ │ ldr r3, [sp, #36] @ 0x24 │ │ add r0, sp, #88 @ 0x58 │ │ strb.w fp, [r1, r5] │ │ cmp r3, sl │ │ str.w lr, [r0, r5, lsl #2] │ │ - bls.n 8a656 │ │ + bls.n 8a6c0 │ │ ldr r6, [sp, #48] @ 0x30 │ │ adds r5, #1 │ │ add.w sl, sl, r6, lsr #1 │ │ add.w r4, sl, sl, lsl #1 │ │ cmp r3, sl │ │ str.w sl, [sp, #64] @ 0x40 │ │ - bls.w 8a248 │ │ - b.n 8a214 │ │ + bls.w 8a2b2 │ │ + b.n 8a27e │ │ movs.w r0, lr, lsl #31 │ │ - bne.n 8a67c │ │ + bne.n 8a6e6 │ │ ldr r1, [sp, #36] @ 0x24 │ │ movs r0, #0 │ │ orr.w r2, r1, #1 │ │ clz r3, r2 │ │ movs r2, #62 @ 0x3e │ │ eor.w r2, r2, r3, lsl #1 │ │ strd r2, r0, [sp] │ │ ldr r0, [sp, #56] @ 0x38 │ │ mov r3, r8 │ │ ldr r2, [sp, #80] @ 0x50 │ │ - bl 8a684 │ │ + bl 8a6f0 │ │ add sp, #420 @ 0x1a4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ + bmi.n 8a69a │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #92 @ 0x5c │ │ mov r9, r2 │ │ mov fp, r0 │ │ cmp r1, #33 @ 0x21 │ │ str r2, [sp, #52] @ 0x34 │ │ - bcs.w 8a8be │ │ + bcs.w 8a92a │ │ mov r4, r1 │ │ lsrs r0, r4, #1 │ │ str.w fp, [sp, #48] @ 0x30 │ │ str r0, [sp, #44] @ 0x2c │ │ - beq.w 8ae98 │ │ + beq.w 8af04 │ │ cmp r4, #8 │ │ str r4, [sp, #28] │ │ - bcc.w 8abaa │ │ + bcc.w 8ac16 │ │ ldr.w fp, [sp, #48] @ 0x30 │ │ ldrd r0, r2, [fp, #48] @ 0x30 │ │ ldrd r3, r6, [fp, #72] @ 0x48 │ │ ldrd r5, lr, [fp] │ │ subs r0, r3, r0 │ │ ldrd r1, r8, [fp, #24] │ │ sbcs.w r0, r6, r2 │ │ @@ -148472,33 +148387,33 @@ │ │ ldmia.w r9, {r1, r2, r3, r4, r5, r6} │ │ stmia r0!, {r1, r2, r3, r4, r5, r6} │ │ add.w r0, r8, #72 @ 0x48 │ │ ldr.w r9, [sp, #44] @ 0x2c │ │ ldmia.w fp, {r1, r2, r3, r4, r5, r6} │ │ stmia r0!, {r1, r2, r3, r4, r5, r6} │ │ movs r1, #4 │ │ - b.n 8abd2 │ │ + b.n 8ac3e │ │ ldr r5, [r7, #8] │ │ mov r8, r3 │ │ ldr r0, [r7, #12] │ │ str r0, [sp, #24] │ │ sub.w r0, r9, #24 │ │ str r1, [sp, #44] @ 0x2c │ │ strd r0, r3, [sp, #12] │ │ str.w fp, [sp, #48] @ 0x30 │ │ cmp r5, #0 │ │ - beq.w 8ab92 │ │ + beq.w 8abfe │ │ ldr r1, [sp, #44] @ 0x2c │ │ movs r0, #168 @ 0xa8 │ │ cmp r1, #64 @ 0x40 │ │ mov.w r3, r1, lsr #3 │ │ mla r2, r3, r0, fp │ │ add.w r0, r3, r3, lsl #1 │ │ add.w r9, fp, r0, lsl #5 │ │ - bcs.n 8a93c │ │ + bcs.n 8a9a8 │ │ ldrd lr, ip, [r2] │ │ ldrd r3, r6, [r9] │ │ ldrd r4, r1, [fp] │ │ subs.w r0, r3, lr │ │ sbcs.w r0, r6, ip │ │ mov.w r0, #0 │ │ it cc │ │ @@ -148515,18 +148430,18 @@ │ │ sbcs.w r0, r1, ip │ │ mov.w r0, #0 │ │ it cc │ │ movcc r0, #1 │ │ eors r3, r0 │ │ it ne │ │ movne r9, fp │ │ - b.n 8a946 │ │ + b.n 8a9b2 │ │ mov r0, fp │ │ mov r1, r9 │ │ - bl 8aee0 │ │ + bl 8af4c │ │ mov r9, r0 │ │ sub.w r0, r9, fp │ │ movw r1, #43691 @ 0xaaab │ │ movt r1, #43690 @ 0xaaaa │ │ subs r5, #1 │ │ lsrs r0, r0, #3 │ │ str r5, [sp, #32] │ │ @@ -148534,38 +148449,38 @@ │ │ mov r1, r9 │ │ add.w ip, sp, #64 @ 0x40 │ │ str r0, [sp, #36] @ 0x24 │ │ ldmia.w r1, {r0, r2, r3, r4, r5, r6} │ │ stmia.w ip, {r0, r2, r3, r4, r5, r6} │ │ ldr r0, [sp, #24] │ │ str.w r9, [sp, #40] @ 0x28 │ │ - cbz r0, 8a986 │ │ + cbz r0, 8a9f2 │ │ ldr r2, [sp, #24] │ │ ldrd r0, r1, [r9] │ │ ldrd r2, r3, [r2] │ │ subs r0, r2, r0 │ │ sbcs.w r0, r3, r1 │ │ - bcs.w 8aa8e │ │ + bcs.w 8aafa │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldr r1, [sp, #52] @ 0x34 │ │ cmp r8, r0 │ │ - bcc.w 8aeb2 │ │ + bcc.w 8af1e │ │ add.w r0, r0, r0, lsl #1 │ │ str r0, [sp, #20] │ │ movs r5, #0 │ │ mov r9, fp │ │ add.w r8, r1, r0, lsl #3 │ │ ldr r0, [sp, #36] @ 0x24 │ │ add.w r3, r0, r0, lsl #1 │ │ ldr.w lr, [sp, #40] @ 0x28 │ │ str r0, [sp, #56] @ 0x38 │ │ add.w r0, fp, r3, lsl #3 │ │ str r0, [sp, #60] @ 0x3c │ │ cmp r9, r0 │ │ - bcs.n 8a9ea │ │ + bcs.n 8aa56 │ │ ldrd r6, r0, [lr] │ │ sub.w r8, r8, #24 │ │ ldrd r4, r2, [r9] │ │ subs r6, r4, r6 │ │ sbcs r2, r0 │ │ add.w r6, r5, r5, lsl #1 │ │ mov r2, r8 │ │ @@ -148576,89 +148491,89 @@ │ │ add.w r2, r2, r6, lsl #3 │ │ ldmia.w r0, {r3, r4, r6, sl, fp, ip} │ │ stmia.w r2, {r3, r4, r6, sl, fp, ip} │ │ it cc │ │ addcc r5, #1 │ │ ldr r0, [sp, #60] @ 0x3c │ │ cmp r9, r0 │ │ - bcc.n 8a9b4 │ │ + bcc.n 8aa20 │ │ ldr.w fp, [sp, #44] @ 0x2c │ │ add.w sl, r5, r5, lsl #1 │ │ ldr r0, [sp, #56] @ 0x38 │ │ cmp r0, fp │ │ - beq.n 8aa1c │ │ + beq.n 8aa88 │ │ mov r2, r9 │ │ mov lr, r5 │ │ ldmia.w r2, {r0, r1, r3, r4, r5, r6} │ │ sub.w r8, r8, #24 │ │ add.w ip, r8, sl, lsl #3 │ │ add.w r9, r9, #24 │ │ stmia.w ip, {r0, r1, r3, r4, r5, r6} │ │ mov r0, fp │ │ mov r5, lr │ │ ldr r1, [sp, #52] @ 0x34 │ │ ldr.w fp, [sp, #48] @ 0x30 │ │ - b.n 8a9a0 │ │ + b.n 8aa0c │ │ ldr r0, [sp, #48] @ 0x30 │ │ mov.w r2, sl, lsl #3 │ │ - bl d4c50 │ │ + bl d50a2 │ │ subs.w r1, fp, r5 │ │ str r5, [sp, #28] │ │ - beq.n 8aa58 │ │ + beq.n 8aac4 │ │ ldr r2, [sp, #20] │ │ mov lr, r1 │ │ ldr r0, [sp, #12] │ │ add.w r8, r0, r2, lsl #3 │ │ ldr r0, [sp, #48] @ 0x30 │ │ add.w r9, r0, sl, lsl #3 │ │ mov ip, r8 │ │ mov r2, r9 │ │ ldmia.w ip, {r0, r3, r4, r5, r6, fp} │ │ sub.w r8, r8, #24 │ │ add.w r9, r9, #24 │ │ subs.w lr, lr, #1 │ │ stmia.w r2, {r0, r3, r4, r5, r6, fp} │ │ - bne.n 8aa3e │ │ + bne.n 8aaaa │ │ ldr r4, [sp, #28] │ │ ldr.w fp, [sp, #48] @ 0x30 │ │ ldr.w r8, [sp, #16] │ │ - cbz r4, 8aa8e │ │ + cbz r4, 8aafa │ │ ldr.w r9, [sp, #52] @ 0x34 │ │ ldr r0, [sp, #44] @ 0x2c │ │ cmp r0, r4 │ │ - bcc.w 8aea0 │ │ + bcc.w 8af0c │ │ add r0, sp, #64 @ 0x40 │ │ ldr r5, [sp, #32] │ │ mov r2, r9 │ │ mov r3, r8 │ │ strd r5, r0, [sp] │ │ add.w r0, fp, sl, lsl #3 │ │ - bl 8a684 │ │ + bl 8a6f0 │ │ cmp r4, #33 @ 0x21 │ │ str r4, [sp, #44] @ 0x2c │ │ - bcs.w 8a8d4 │ │ - b.n 8a69c │ │ + bcs.w 8a940 │ │ + b.n 8a708 │ │ ldr r1, [sp, #44] @ 0x2c │ │ ldr r0, [sp, #52] @ 0x34 │ │ cmp r8, r1 │ │ - bcc.w 8aeb2 │ │ + bcc.w 8af1e │ │ add.w r1, r1, r1, lsl #1 │ │ ldr.w sl, [sp, #36] @ 0x24 │ │ mov.w r8, #0 │ │ mov r9, fp │ │ add.w lr, r0, r1, lsl #3 │ │ str r1, [sp, #56] @ 0x38 │ │ add.w r2, sl, sl, lsl #1 │ │ ldr.w ip, [sp, #40] @ 0x28 │ │ str.w sl, [sp, #36] @ 0x24 │ │ add.w r0, fp, r2, lsl #3 │ │ ldr.w fp, [sp, #52] @ 0x34 │ │ cmp r9, r0 │ │ str r0, [sp, #60] @ 0x3c │ │ - bcs.n 8aafe │ │ + bcs.n 8ab6a │ │ ldrd r3, r5, [r9] │ │ sub.w lr, lr, #24 │ │ ldrd r4, r2, [ip] │ │ subs r3, r4, r3 │ │ sbcs r2, r5 │ │ add.w r3, r8, r8, lsl #1 │ │ mov r2, lr │ │ @@ -148669,71 +148584,71 @@ │ │ add.w r9, r9, #24 │ │ ldmia.w r3, {r0, r1, r2, r4, r5, r6} │ │ stmia.w sl, {r0, r1, r2, r4, r5, r6} │ │ it cs │ │ addcs.w r8, r8, #1 │ │ ldr r0, [sp, #60] @ 0x3c │ │ cmp r9, r0 │ │ - bcc.n 8aac6 │ │ + bcc.n 8ab32 │ │ ldr.w sl, [sp, #44] @ 0x2c │ │ add.w r4, r8, r8, lsl #1 │ │ ldr r0, [sp, #36] @ 0x24 │ │ cmp r0, sl │ │ - beq.n 8ab2e │ │ + beq.n 8ab9a │ │ ldr r0, [sp, #52] @ 0x34 │ │ mov r1, r9 │ │ add.w r9, r9, #24 │ │ add.w r8, r8, #1 │ │ add.w ip, r0, r4, lsl #3 │ │ ldmia.w r1, {r0, r2, r3, r4, r5, r6} │ │ sub.w lr, lr, #24 │ │ stmia.w ip, {r0, r2, r3, r4, r5, r6} │ │ ldr.w fp, [sp, #48] @ 0x30 │ │ - b.n 8aaac │ │ + b.n 8ab18 │ │ ldr.w fp, [sp, #48] @ 0x30 │ │ lsls r2, r4, #3 │ │ ldr r1, [sp, #52] @ 0x34 │ │ mov r0, fp │ │ - bl d4c50 │ │ + bl d50a2 │ │ subs.w lr, sl, r8 │ │ - beq.w 8ae98 │ │ + beq.w 8af04 │ │ ldr r1, [sp, #56] @ 0x38 │ │ add.w fp, fp, r4, lsl #3 │ │ ldr r0, [sp, #12] │ │ mov sl, fp │ │ str.w lr, [sp, #28] │ │ add.w r9, r0, r1, lsl #3 │ │ mov r0, r9 │ │ mov ip, sl │ │ ldmia.w r0, {r1, r2, r3, r4, r5, r6} │ │ sub.w r9, r9, #24 │ │ add.w sl, sl, #24 │ │ subs.w lr, lr, #1 │ │ stmia.w ip, {r1, r2, r3, r4, r5, r6} │ │ - bne.n 8ab56 │ │ + bne.n 8abc2 │ │ ldr r1, [sp, #44] @ 0x2c │ │ cmp r1, r8 │ │ - bcc.w 8aeb4 │ │ + bcc.w 8af20 │ │ ldr r4, [sp, #28] │ │ movs r0, #0 │ │ ldr.w r9, [sp, #52] @ 0x34 │ │ ldr.w r8, [sp, #16] │ │ cmp r4, #33 @ 0x21 │ │ ldr r5, [sp, #32] │ │ str r0, [sp, #24] │ │ str r4, [sp, #44] @ 0x2c │ │ - bcs.w 8a8d0 │ │ - b.n 8a69c │ │ + bcs.w 8a93c │ │ + b.n 8a708 │ │ ldr r1, [sp, #44] @ 0x2c │ │ movs r0, #1 │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ mov r2, r9 │ │ mov r3, r8 │ │ - bl 8a16c │ │ + bl 8a1d6 │ │ add sp, #92 @ 0x5c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr.w r8, [sp, #48] @ 0x30 │ │ mov r1, r9 │ │ mov lr, r9 │ │ mov ip, r8 │ │ @@ -148748,33 +148663,33 @@ │ │ movs r1, #1 │ │ ldr r5, [sp, #52] @ 0x34 │ │ cmp r1, r9 │ │ ldr r0, [sp, #28] │ │ str r1, [sp, #32] │ │ sub.w r0, r0, r9 │ │ str r0, [sp, #20] │ │ - bcs.n 8ac88 │ │ + bcs.n 8acf4 │ │ ldr r1, [sp, #32] │ │ add.w r0, r1, r1, lsl #1 │ │ lsls r0, r0, #3 │ │ str r0, [sp, #60] @ 0x3c │ │ - b.n 8ac0c │ │ + b.n 8ac78 │ │ ldr r5, [sp, #52] @ 0x34 │ │ mov r0, r5 │ │ add r6, sp, #64 @ 0x40 │ │ strd fp, lr, [r0], #8 │ │ ldmia r6, {r1, r2, r3, r6} │ │ stmia r0!, {r1, r2, r3, r6} │ │ ldr r0, [sp, #60] @ 0x3c │ │ add.w r1, r9, #1 │ │ adds r0, #24 │ │ str r0, [sp, #60] @ 0x3c │ │ ldr r0, [sp, #44] @ 0x2c │ │ cmp r1, r0 │ │ - beq.n 8ac88 │ │ + beq.n 8acf4 │ │ add.w r2, r1, r1, lsl #1 │ │ ldr r0, [sp, #48] @ 0x30 │ │ mov r9, r1 │ │ add.w r8, r0, r2, lsl #3 │ │ add.w r4, r5, r2, lsl #3 │ │ mov sl, r8 │ │ mov r3, r4 │ │ @@ -148782,15 +148697,15 @@ │ │ stmia.w r3, {r0, r1, r5, r6, ip, lr} │ │ ldr r5, [sp, #52] @ 0x34 │ │ ldrd r0, r1, [r4, #-24] │ │ ldr.w lr, [r4, #4] │ │ ldr.w r2, [r5, r2, lsl #3] │ │ subs r0, r2, r0 │ │ sbcs.w r0, lr, r1 │ │ - bcs.n 8abfc │ │ + bcs.n 8ac68 │ │ add.w r6, r8, #8 │ │ ldr.w r5, [r8, #20] │ │ str r5, [sp, #76] @ 0x4c │ │ mov fp, r2 │ │ ldmia r6, {r0, r1, r6} │ │ add r2, sp, #64 @ 0x40 │ │ ldr r5, [sp, #52] @ 0x34 │ │ @@ -148798,41 +148713,41 @@ │ │ stmia r2!, {r0, r1, r6} │ │ add.w r6, r5, sl │ │ cmp.w sl, #24 │ │ sub.w r8, r6, #24 │ │ mov r5, r6 │ │ ldmia.w r8, {r0, r1, r2, r3, r4, ip} │ │ stmia.w r5, {r0, r1, r2, r3, r4, ip} │ │ - beq.n 8abee │ │ + beq.n 8ac5a │ │ ldrd r0, r1, [r6, #-48] @ 0x30 │ │ sub.w sl, sl, #24 │ │ ldr r5, [sp, #52] @ 0x34 │ │ subs.w r0, fp, r0 │ │ sbcs.w r0, lr, r1 │ │ - bcc.n 8ac56 │ │ + bcc.n 8acc2 │ │ add.w r0, r5, sl │ │ - b.n 8abf2 │ │ + b.n 8ac5e │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldr r2, [sp, #32] │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r1, r5, r0, lsl #3 │ │ str r1, [sp, #56] @ 0x38 │ │ ldr r1, [sp, #20] │ │ cmp r2, r1 │ │ - bcs.n 8ad5e │ │ + bcs.n 8adca │ │ ldr r1, [sp, #48] @ 0x30 │ │ add.w r0, r1, r0, lsl #3 │ │ str r0, [sp, #16] │ │ add.w r0, r2, r2, lsl #1 │ │ mov.w fp, r0, lsl #3 │ │ movs r0, #24 │ │ str r0, [sp, #40] @ 0x28 │ │ ldr r0, [sp, #56] @ 0x38 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n 8ace4 │ │ + b.n 8ad50 │ │ ldr r1, [sp, #56] @ 0x38 │ │ add r6, sp, #64 @ 0x40 │ │ ldr r5, [sp, #60] @ 0x3c │ │ str.w r9, [r1] │ │ ldmia r6, {r0, r2, r3, r6} │ │ strd r5, r0, [r1, #4] │ │ add.w r0, r1, #12 │ │ @@ -148844,15 +148759,15 @@ │ │ str r0, [sp, #40] @ 0x28 │ │ ldr r0, [sp, #36] @ 0x24 │ │ adds r2, #1 │ │ adds r0, #24 │ │ str r0, [sp, #36] @ 0x24 │ │ ldr r0, [sp, #20] │ │ cmp r2, r0 │ │ - beq.n 8ad5e │ │ + beq.n 8adca │ │ add.w r0, r2, r2, lsl #1 │ │ ldr r1, [sp, #16] │ │ mov r9, fp │ │ ldr.w fp, [sp, #56] @ 0x38 │ │ add.w r3, r1, r0, lsl #3 │ │ str r2, [sp, #32] │ │ str r3, [sp, #24] │ │ @@ -148863,15 +148778,15 @@ │ │ ldr.w r0, [fp, r0, lsl #3] │ │ mov fp, r9 │ │ ldrd r1, r3, [r2, #-24] │ │ ldr r2, [r2, #4] │ │ subs r1, r0, r1 │ │ str r2, [sp, #60] @ 0x3c │ │ sbcs.w r1, r2, r3 │ │ - bcs.n 8acce │ │ + bcs.n 8ad3a │ │ mov r9, r0 │ │ ldr r0, [sp, #24] │ │ add.w r6, r0, #8 │ │ ldr r4, [r0, #20] │ │ add r0, sp, #64 @ 0x40 │ │ ldmia r6, {r1, r3, r6} │ │ str r4, [sp, #76] @ 0x4c │ │ @@ -148879,24 +148794,24 @@ │ │ ldrd r1, r3, [sp, #36] @ 0x24 │ │ add.w sl, r1, fp │ │ cmp fp, r3 │ │ sub.w r8, sl, #24 │ │ mov r4, sl │ │ ldmia.w r8, {r0, r2, r5, r6, ip, lr} │ │ stmia.w r4, {r0, r2, r5, r6, ip, lr} │ │ - beq.n 8acb6 │ │ + beq.n 8ad22 │ │ ldrd r0, r2, [sl, #-48] @ 0x30 │ │ adds r3, #24 │ │ subs r1, #24 │ │ subs.w r0, r9, r0 │ │ ldr r0, [sp, #60] @ 0x3c │ │ sbcs r0, r2 │ │ - bcc.n 8ad32 │ │ + bcc.n 8ad9e │ │ add r1, fp │ │ - b.n 8acb8 │ │ + b.n 8ad24 │ │ ldr r0, [sp, #28] │ │ mov r8, r5 │ │ ldr.w fp, [sp, #56] @ 0x38 │ │ ldr.w sl, [sp, #48] @ 0x30 │ │ add.w r1, r0, r0, lsl #1 │ │ mvn.w r0, #23 │ │ str r1, [sp, #24] │ │ @@ -148971,20 +148886,20 @@ │ │ orr.w r0, r0, r0, lsl #1 │ │ add.w r8, r8, r0, lsl #3 │ │ ldr r0, [sp, #32] │ │ orr.w r0, r0, r0, lsl #1 │ │ add.w fp, fp, r0, lsl #3 │ │ ldr r0, [sp, #44] @ 0x2c │ │ subs r0, #1 │ │ - bne.n 8ad86 │ │ + bne.n 8adf2 │ │ ldr r0, [sp, #60] @ 0x3c │ │ add.w ip, r0, #24 │ │ ldr r0, [sp, #28] │ │ lsls r1, r0, #31 │ │ - beq.n 8ae8c │ │ + beq.n 8aef8 │ │ mov r1, fp │ │ cmp r8, ip │ │ it cc │ │ movcc r1, r8 │ │ ldmia.w r1, {r0, r2, r3, r4, r5, r6} │ │ mov.w r1, #0 │ │ stmia.w sl, {r0, r2, r3, r4, r5, r6} │ │ @@ -148997,70 +148912,70 @@ │ │ orr.w r0, r0, r0, lsl #1 │ │ add.w fp, fp, r1, lsl #3 │ │ add.w r8, r8, r0, lsl #3 │ │ cmp r8, ip │ │ itt eq │ │ addeq.w r0, lr, #24 │ │ cmpeq fp, r0 │ │ - bne.n 8aeae │ │ + bne.n 8af1a │ │ add sp, #92 @ 0x5c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #52] @ (8aed8 ) │ │ + ldr r0, [pc, #52] @ (8af44 ) │ │ movs r1, #19 │ │ - ldr r2, [pc, #52] @ (8aedc ) │ │ + ldr r2, [pc, #52] @ (8af48 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ - bl 413cc │ │ + bl 3fd60 │ │ + bl 416d4 │ │ udf #254 @ 0xfe │ │ - ldr r3, [pc, #28] @ (8aed4 ) │ │ + ldr r3, [pc, #28] @ (8af40 ) │ │ mov r0, r8 │ │ mov r2, r1 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ mov r5, r0 │ │ ldr r0, [sp, #24] │ │ lsls r2, r0, #3 │ │ ldrd r0, r1, [sp, #48] @ 0x30 │ │ - bl d4c50 │ │ + bl d50a2 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ - lsrs r2, r4, #26 │ │ + blx d6de0 │ │ + lsrs r6, r0, #25 │ │ movs r5, r0 │ │ - b.n 8b0be │ │ - @ instruction: 0xfff80ea4 │ │ + b.n 8b052 │ │ + vqrdmlah.s q8, q4, d8[0] │ │ movs r5, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ mov fp, r2 │ │ mov r4, r1 │ │ cmp r3, #8 │ │ - bcc.n 8af32 │ │ + bcc.n 8af9e │ │ lsrs r6, r3, #3 │ │ mov.w r9, #168 @ 0xa8 │ │ mla r2, r6, r9, r0 │ │ add.w sl, r6, r6, lsl #1 │ │ mov r3, r6 │ │ add.w r1, r0, sl, lsl #5 │ │ - bl 8aee0 │ │ + bl 8af4c │ │ mla r2, r6, r9, r4 │ │ add.w r1, r4, sl, lsl #5 │ │ mov r8, r0 │ │ mov r0, r4 │ │ mov r3, r6 │ │ - bl 8aee0 │ │ + bl 8af4c │ │ mla r2, r6, r9, fp │ │ add.w r1, fp, sl, lsl #5 │ │ mov r4, r0 │ │ mov r0, fp │ │ mov r3, r6 │ │ - bl 8aee0 │ │ + bl 8af4c │ │ mov fp, r0 │ │ mov r0, r8 │ │ ldrd lr, ip, [fp] │ │ movs r5, #0 │ │ ldrd r3, r6, [r4] │ │ ldrd r2, r8, [r0] │ │ subs.w r1, r3, lr │ │ @@ -149083,196 +148998,196 @@ │ │ eors r3, r5 │ │ it ne │ │ movne r4, r0 │ │ mov r0, r4 │ │ add sp, #4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - bmi.n 8af2e │ │ + bmi.n 8af9a │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ ldrd r8, r6, [r0, #4] │ │ mov r4, r0 │ │ - cbz r6, 8afb2 │ │ + cbz r6, 8b01e │ │ add.w r5, r8, #4 │ │ ldr.w r0, [r5, #-4] │ │ cmp r0, #0 │ │ itttt ne │ │ ldrne r0, [r5, #0] │ │ cmpne r0, #0 │ │ ldrne r0, [r5, #4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #104 @ 0x68 │ │ subs r6, #1 │ │ - bne.n 8af9a │ │ + bne.n 8b006 │ │ ldr r0, [r4, #0] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r0, sl, [r4, #12] │ │ mov.w fp, #0 │ │ ldr.w r9, [r4, #20] │ │ mov.w r8, #104 @ 0x68 │ │ cmp r0, #0 │ │ mov r1, r0 │ │ ite eq │ │ moveq r9, r0 │ │ movne r1, #1 │ │ cmp.w r9, #0 │ │ - beq.n 8b07c │ │ + beq.n 8b0e8 │ │ lsls r1, r1, #31 │ │ - beq.n 8b0da │ │ + beq.n 8b146 │ │ cmp.w fp, #0 │ │ - beq.n 8affa │ │ + beq.n 8b066 │ │ mov r5, r0 │ │ mov r0, fp │ │ ldrh.w r1, [r0, #1238] @ 0x4d6 │ │ cmp sl, r1 │ │ - bcs.n 8b018 │ │ + bcs.n 8b084 │ │ mov r6, sl │ │ mov r4, r0 │ │ - b.n 8b034 │ │ + b.n 8b0a0 │ │ cmp.w sl, #0 │ │ - beq.n 8b00a │ │ + beq.n 8b076 │ │ ldr.w r0, [r0, #1240] @ 0x4d8 │ │ subs.w sl, sl, #1 │ │ - bne.n 8b000 │ │ + bne.n 8b06c │ │ mov.w sl, #0 │ │ movs r5, #0 │ │ ldrh.w r1, [r0, #1238] @ 0x4d6 │ │ cmp sl, r1 │ │ - bcc.n 8aff4 │ │ + bcc.n 8b060 │ │ ldr.w r4, [r0, #1232] @ 0x4d0 │ │ cmp r4, #0 │ │ - beq.n 8b0cc │ │ + beq.n 8b138 │ │ ldrh.w r6, [r0, #1236] @ 0x4d4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrh.w r0, [r4, #1238] @ 0x4d6 │ │ adds r5, #1 │ │ cmp r6, r0 │ │ mov r0, r4 │ │ - bcs.n 8b018 │ │ - cbz r5, 8b050 │ │ + bcs.n 8b084 │ │ + cbz r5, 8b0bc │ │ add.w r0, r4, r6, lsl #2 │ │ addw r0, r0, #1244 @ 0x4dc │ │ ldr.w fp, [r0] │ │ subs r5, #1 │ │ add.w r0, fp, #1240 @ 0x4d8 │ │ - bne.n 8b03e │ │ + bne.n 8b0aa │ │ mov.w sl, #0 │ │ - b.n 8b056 │ │ + b.n 8b0c2 │ │ add.w sl, r6, #1 │ │ mov fp, r4 │ │ mla r2, r6, r8, r4 │ │ sub.w r9, r9, #1 │ │ movs r1, #1 │ │ movs r0, #0 │ │ ldr.w r3, [r2, #88]! │ │ cmp r3, #0 │ │ itt ne │ │ ldrne r3, [r2, #4] │ │ cmpne r3, #0 │ │ - beq.n 8afd8 │ │ + beq.n 8b044 │ │ ldr r0, [r2, #8] │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r1, #1 │ │ movs r0, #0 │ │ - b.n 8afd8 │ │ + b.n 8b044 │ │ lsls r1, r1, #31 │ │ - beq.n 8b0b2 │ │ + beq.n 8b11e │ │ cmp.w fp, #0 │ │ - bne.n 8b098 │ │ + bne.n 8b104 │ │ mov fp, r0 │ │ cmp.w sl, #0 │ │ - beq.n 8b098 │ │ + beq.n 8b104 │ │ ldr.w fp, [fp, #1240] @ 0x4d8 │ │ subs.w sl, sl, #1 │ │ - bne.n 8b08e │ │ + bne.n 8b0fa │ │ ldr.w r0, [fp, #1232] @ 0x4d0 │ │ - cbz r0, 8b0ba │ │ + cbz r0, 8b126 │ │ mov r5, r0 │ │ mov r0, fp │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr.w r0, [r5, #1232] @ 0x4d0 │ │ mov fp, r5 │ │ cmp r0, #0 │ │ - bne.n 8b09e │ │ - b.n 8b0bc │ │ + bne.n 8b10a │ │ + b.n 8b128 │ │ add sp, #4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r5, fp │ │ mov r0, r5 │ │ add sp, #4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ - blx d87c0 │ │ - ldr r0, [pc, #16] @ (8b0e4 ) │ │ + b.w d871c │ │ + blx d87d0 │ │ + ldr r0, [pc, #16] @ (8b150 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ udf #254 @ 0xfe │ │ - ldr r0, [pc, #12] @ (8b0e8 ) │ │ + ldr r0, [pc, #12] @ (8b154 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ udf #254 @ 0xfe │ │ - lsrs r2, r1, #19 │ │ + lsrs r6, r5, #17 │ │ movs r5, r0 │ │ - lsrs r0, r2, #19 │ │ + lsrs r4, r6, #17 │ │ movs r5, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #92 @ 0x5c │ │ mov r6, r1 │ │ ldr.w r3, [r6, #16]! │ │ - cbz r3, 8b114 │ │ + cbz r3, 8b180 │ │ ldr r2, [r1, #36] @ 0x24 │ │ cmp r2, #1 │ │ - bne.n 8b12c │ │ + bne.n 8b198 │ │ ldr r2, [r1, #20] │ │ ldr r6, [r1, #40] @ 0x28 │ │ cmp r2, r6 │ │ - bcs.n 8b13e │ │ + bcs.n 8b1aa │ │ movs r6, #0 │ │ movs r5, #19 │ │ mov r2, r3 │ │ - b.n 8b2d8 │ │ + b.n 8b344 │ │ ldr r2, [r1, #4] │ │ cmp r2, #0 │ │ - bne.n 8b1ce │ │ + bne.n 8b23a │ │ movs r2, #0 │ │ str r2, [r1, #44] @ 0x2c │ │ str r2, [r1, #16] │ │ movs r1, #82 @ 0x52 │ │ strh r1, [r0, #0] │ │ add sp, #92 @ 0x5c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrd r5, r4, [r1, #20] │ │ ldr r2, [r4, #0] │ │ str r0, [sp, #16] │ │ cmp r2, #1 │ │ - bne.n 8b144 │ │ + bne.n 8b1b0 │ │ ldrd r0, r2, [r4, #8] │ │ - b.n 8b150 │ │ + b.n 8b1bc │ │ add r3, r6 │ │ subs r2, r2, r6 │ │ - b.n 8b1c6 │ │ + b.n 8b232 │ │ ldr r2, [r4, #4] │ │ cmp r2, #6 │ │ - bcs.w 8b3c4 │ │ + bcs.w 8b430 │ │ add.w r0, r4, #8 │ │ add.w ip, sp, #36 @ 0x24 │ │ stmia.w ip, {r0, r2, r6} │ │ strd r3, r5, [sp, #28] │ │ - cbz r2, 8b1b2 │ │ + cbz r2, 8b21e │ │ add.w sl, sp, #64 @ 0x40 │ │ subs r4, r2, #1 │ │ add.w r9, r0, #16 │ │ add.w fp, sl, #9 │ │ add.w r8, sp, #28 │ │ add r6, sp, #48 @ 0x30 │ │ str r1, [sp, #20] │ │ @@ -149281,39 +149196,39 @@ │ │ ldr r5, [sp, #44] @ 0x2c │ │ stmia.w ip, {r0, r1, r2, r3} │ │ mov r1, r8 │ │ mov r3, r6 │ │ ldr r0, [r5, #12] │ │ ldr r2, [r0, #32] │ │ mov r0, sl │ │ - bl 84988 │ │ + bl 849f0 │ │ ldrd r0, r1, [sp, #64] @ 0x40 │ │ eor.w r0, r0, #46 @ 0x2e │ │ orrs r0, r1 │ │ - beq.w 8b2b4 │ │ + beq.w 8b320 │ │ strd r9, r4, [sp, #36] @ 0x24 │ │ subs r4, #1 │ │ add.w r9, r9, #16 │ │ adds r0, r4, #1 │ │ - bne.n 8b174 │ │ + bne.n 8b1e0 │ │ ldr r3, [sp, #28] │ │ ldr r6, [sp, #44] @ 0x2c │ │ ldr r1, [sp, #20] │ │ ldr r0, [r6, #20] │ │ cmp r0, #0 │ │ itttt eq │ │ ldreq r0, [r6, #0] │ │ moveq r2, #1 │ │ subeq r0, r3, r0 │ │ strdeq r2, r0, [r6, #20] │ │ ldr r2, [sp, #32] │ │ ldr r0, [sp, #16] │ │ strd r3, r2, [r1] │ │ cmp r2, #0 │ │ - beq.n 8b11a │ │ + beq.n 8b186 │ │ ldr r3, [r1, #0] │ │ movs r5, #4 │ │ ldrd r4, r9, [r1, #8] │ │ sub.w sl, r2, #1 │ │ adds r6, r3, r2 │ │ str r6, [sp, #20] │ │ ldrd lr, ip, [r4, #24] │ │ @@ -149330,41 +149245,41 @@ │ │ mov.w lr, #0 │ │ add r4, r3 │ │ movs r3, #0 │ │ subs r6, r4, r6 │ │ str r6, [sp, #8] │ │ ldrb.w ip, [r8, #-1] │ │ cmp r3, #63 @ 0x3f │ │ - bne.n 8b218 │ │ + bne.n 8b284 │ │ cmp.w ip, #1 │ │ - bhi.n 8b264 │ │ + bhi.n 8b2d0 │ │ and.w r4, r3, #63 @ 0x3f │ │ and.w r5, ip, #127 @ 0x7f │ │ rsb r6, r4, #32 │ │ subs.w r2, r4, #32 │ │ lsr.w r6, r5, r6 │ │ it pl │ │ lslpl.w r6, r5, r2 │ │ lsl.w r2, r5, r4 │ │ it pl │ │ movpl r2, #0 │ │ orr.w fp, fp, r2 │ │ orr.w lr, lr, r6 │ │ sxtb.w r2, ip │ │ cmp.w r2, #4294967295 @ 0xffffffff │ │ - bgt.n 8b28c │ │ + bgt.n 8b2f8 │ │ sub.w sl, sl, #1 │ │ add.w r8, r8, #1 │ │ adds r3, #7 │ │ adds.w r5, sl, #1 │ │ - bne.n 8b20a │ │ + bne.n 8b276 │ │ ldr r4, [sp, #20] │ │ movs r2, #19 │ │ mov fp, r4 │ │ - b.n 8b268 │ │ + b.n 8b2d4 │ │ movs r2, #6 │ │ ldr r4, [sp, #20] │ │ mov.w r3, ip, lsl #8 │ │ mov.w lr, #0 │ │ movs r6, #0 │ │ movs r5, #1 │ │ str r6, [r1, #44] @ 0x2c │ │ @@ -149373,58 +149288,58 @@ │ │ orr.w r1, r2, r3 │ │ stmia.w r0, {r1, r4, fp, lr} │ │ add sp, #92 @ 0x5c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ orrs.w r2, fp, lr │ │ strd r8, sl, [r1] │ │ - beq.n 8b366 │ │ + beq.n 8b3d2 │ │ cmp.w lr, #0 │ │ - bne.n 8b2f6 │ │ + bne.n 8b362 │ │ ldr.w r2, [r9, #8] │ │ sub.w r3, fp, #1 │ │ cmp r3, r2 │ │ - bcs.n 8b2f6 │ │ + bcs.n 8b362 │ │ movs r2, #104 @ 0x68 │ │ ldr.w r6, [r9, #4] │ │ mla r3, r3, r2, r6 │ │ - b.n 8b388 │ │ + b.n 8b3f4 │ │ ldrh.w r0, [fp] │ │ ldrb.w r1, [fp, #2] │ │ ldrb.w r5, [sp, #72] @ 0x48 │ │ ldrd r3, r2, [sp, #76] @ 0x4c │ │ ldr r6, [sp, #84] @ 0x54 │ │ cmp r5, #82 @ 0x52 │ │ strh.w r0, [sp, #24] │ │ strb.w r1, [sp, #26] │ │ ldrd r0, r1, [sp, #16] │ │ - beq.w 8b1c6 │ │ + beq.w 8b232 │ │ ldrh.w r1, [sp, #24] │ │ ldrb.w r4, [sp, #26] │ │ strb r4, [r0, #3] │ │ strh.w r1, [r0, #1] │ │ strd r3, r2, [r0, #4] │ │ str r6, [r0, #12] │ │ strb r5, [r0, #0] │ │ add sp, #92 @ 0x5c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr.w r5, [r9, #12] │ │ movs r3, #0 │ │ cmp r5, #0 │ │ - beq.n 8b3b6 │ │ + beq.n 8b422 │ │ ldr.w r2, [r9, #16] │ │ str r2, [sp, #4] │ │ ldrh.w r2, [r5, #1238] @ 0x4d6 │ │ mov.w r6, #4294967295 @ 0xffffffff │ │ mov r9, r5 │ │ str r2, [sp, #0] │ │ mov.w ip, r2, lsl #3 │ │ cmp.w ip, #0 │ │ - beq.n 8b352 │ │ + beq.n 8b3be │ │ ldrd r2, r4, [r9], #8 │ │ sub.w ip, ip, #8 │ │ adds r6, #1 │ │ subs.w r3, fp, r2 │ │ sbcs.w r3, lr, r4 │ │ mov.w r3, #0 │ │ it cc │ │ @@ -149432,26 +149347,26 @@ │ │ subs.w r2, r2, fp │ │ sbcs.w r2, r4, lr │ │ mov.w r2, #0 │ │ it cc │ │ movcc r2, #1 │ │ subs r2, r2, r3 │ │ cmp r2, #1 │ │ - beq.n 8b316 │ │ + beq.n 8b382 │ │ uxtb r2, r2 │ │ - cbz r2, 8b37e │ │ - b.n 8b354 │ │ + cbz r2, 8b3ea │ │ + b.n 8b3c0 │ │ ldr r6, [sp, #0] │ │ ldr r3, [sp, #4] │ │ - cbz r3, 8b3bc │ │ + cbz r3, 8b428 │ │ add.w r2, r5, r6, lsl #2 │ │ subs r3, #1 │ │ str r3, [sp, #4] │ │ ldr.w r5, [r2, #1240] @ 0x4d8 │ │ - b.n 8b306 │ │ + b.n 8b372 │ │ movs r2, #0 │ │ str r2, [r1, #16] │ │ mov.w r2, #4294967295 @ 0xffffffff │ │ str r2, [r1, #44] @ 0x2c │ │ mov.w r1, #338 @ 0x152 │ │ strh r1, [r0, #0] │ │ add sp, #92 @ 0x5c │ │ @@ -149475,93 +149390,93 @@ │ │ lsrs r0, r0, #5 │ │ str r0, [r1, #44] @ 0x2c │ │ add sp, #92 @ 0x5c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r2, #18 │ │ ldr r4, [sp, #20] │ │ - b.n 8b270 │ │ + b.n 8b2dc │ │ movs r2, #18 │ │ movs r3, #0 │ │ ldr r4, [sp, #20] │ │ - b.n 8b270 │ │ - ldr r3, [pc, #12] @ (8b3d4 ) │ │ + b.n 8b2dc │ │ + ldr r3, [pc, #12] @ (8b440 ) │ │ mov r1, r2 │ │ movs r0, #0 │ │ movs r2, #5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ nop │ │ - sbfx r0, r8, #0, #5 │ │ + @ instruction: 0xf2ec0004 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #60 @ 0x3c │ │ mov r5, r1 │ │ ldrd r4, r1, [r1] │ │ cmp r1, #0 │ │ - beq.w 8b59e │ │ + beq.w 8b60a │ │ ldrb.w r6, [r4], #1 │ │ sub.w sl, r1, #1 │ │ cmp r6, #0 │ │ strd r4, sl, [r5] │ │ - beq.w 8b5b2 │ │ + beq.w 8b61e │ │ mov.w r8, r6, lsl #2 │ │ str r0, [sp, #36] @ 0x24 │ │ mov r0, r8 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 8b630 │ │ + beq.w 8b69c │ │ mov r2, r0 │ │ strd r6, r0, [sp, #48] @ 0x30 │ │ movs r0, #0 │ │ movs r1, #0 │ │ str r0, [sp, #32] │ │ str r1, [sp, #56] @ 0x38 │ │ str r5, [sp, #40] @ 0x28 │ │ str r6, [sp, #12] │ │ cmp.w sl, #0 │ │ - beq.w 8b608 │ │ + beq.w 8b674 │ │ adds r0, r1, #1 │ │ str r0, [sp, #16] │ │ mov.w fp, #0 │ │ mov.w r9, #0 │ │ mov ip, r4 │ │ movs r5, #0 │ │ mov r0, r4 │ │ strd r1, r2, [sp, #20] │ │ str.w sl, [sp, #44] @ 0x2c │ │ str r4, [sp, #28] │ │ ldrb.w r6, [r0], #1 │ │ sub.w r1, sl, #1 │ │ cmp r5, #63 @ 0x3f │ │ - bne.n 8b45a │ │ + bne.n 8b4c6 │ │ cmp r6, #1 │ │ - bhi.w 8b5c6 │ │ + bhi.w 8b632 │ │ and.w r2, r5, #63 @ 0x3f │ │ and.w r4, r6, #127 @ 0x7f │ │ rsb lr, r2, #32 │ │ subs.w r8, r2, #32 │ │ lsl.w r2, r4, r2 │ │ lsr.w r3, r4, lr │ │ it pl │ │ lslpl.w r3, r4, r8 │ │ it pl │ │ movpl r2, #0 │ │ orr.w fp, fp, r2 │ │ orr.w r9, r9, r3 │ │ sxtb r2, r6 │ │ cmp.w r2, #4294967295 @ 0xffffffff │ │ - bgt.n 8b498 │ │ + bgt.n 8b504 │ │ adds r5, #7 │ │ mov sl, r1 │ │ mov ip, r0 │ │ cmp r1, #0 │ │ - bne.n 8b448 │ │ - b.n 8b5d6 │ │ + bne.n 8b4b4 │ │ + b.n 8b642 │ │ ldr r5, [sp, #40] @ 0x28 │ │ subs.w r2, fp, #65536 @ 0x10000 │ │ sbcs.w r2, r9, #0 │ │ mov.w r6, #0 │ │ movw r2, #65535 @ 0xffff │ │ movw r8, #65535 @ 0xffff │ │ strd r0, r1, [r5] │ │ @@ -149570,61 +149485,61 @@ │ │ cmp fp, r2 │ │ it cc │ │ movcc r8, fp │ │ cmp.w r9, #0 │ │ it ne │ │ movne r8, r2 │ │ cmp r1, #0 │ │ - beq.w 8b60c │ │ + beq.w 8b678 │ │ ldrb.w r0, [ip, #1] │ │ sub.w r2, sl, #2 │ │ add.w r4, ip, #2 │ │ str r6, [sp, #28] │ │ and.w r1, r0, #127 @ 0x7f │ │ strd r4, r2, [r5] │ │ sxtb r0, r0 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - ble.n 8b4ee │ │ + ble.n 8b55a │ │ str r2, [sp, #44] @ 0x2c │ │ str r1, [sp, #0] │ │ - b.n 8b53a │ │ + b.n 8b5a6 │ │ cmp r2, #0 │ │ - beq.w 8b610 │ │ + beq.w 8b67c │ │ ldrb.w r0, [ip, #2] │ │ sub.w r3, sl, #3 │ │ add.w r4, ip, #3 │ │ and.w r2, r0, #127 @ 0x7f │ │ strd r4, r3, [r5] │ │ sxtb r0, r0 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ orr.w r1, r1, r2, lsl #7 │ │ - ble.n 8b51a │ │ + ble.n 8b586 │ │ str r3, [sp, #44] @ 0x2c │ │ str r1, [sp, #0] │ │ - b.n 8b53a │ │ + b.n 8b5a6 │ │ cmp r3, #0 │ │ - beq.n 8b610 │ │ + beq.n 8b67c │ │ ldrb.w r2, [ip, #3] │ │ sub.w r0, sl, #4 │ │ add.w r4, ip, #4 │ │ str r0, [r5, #4] │ │ cmp r2, #3 │ │ str r4, [r5, #0] │ │ - bhi.n 8b616 │ │ + bhi.n 8b682 │ │ str r0, [sp, #44] @ 0x2c │ │ orr.w r0, r1, r2, lsl #14 │ │ str r0, [sp, #0] │ │ ldr.w sl, [sp, #20] │ │ ldr r6, [sp, #12] │ │ ldr r2, [sp, #24] │ │ ldr r0, [sp, #48] @ 0x30 │ │ cmp sl, r0 │ │ - bne.n 8b550 │ │ + bne.n 8b5bc │ │ add r0, sp, #48 @ 0x30 │ │ - bl 8c15c │ │ + bl 8c1c8 │ │ ldr r2, [sp, #52] @ 0x34 │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ ldr r1, [sp, #28] │ │ uxtah r0, r0, fp │ │ strh.w r8, [r2, sl, lsl #2] │ │ clz r0, r0 │ │ strd fp, r9, [sp, #4] │ │ @@ -149636,25 +149551,25 @@ │ │ str r1, [sp, #32] │ │ ldr r1, [sp, #0] │ │ strh r1, [r0, #2] │ │ ldr r1, [sp, #16] │ │ ldr.w sl, [sp, #44] @ 0x2c │ │ cmp r1, r6 │ │ str r1, [sp, #56] @ 0x38 │ │ - bne.w 8b424 │ │ + bne.w 8b490 │ │ ldr r0, [sp, #32] │ │ cmp r0, #1 │ │ ldr r0, [sp, #36] @ 0x24 │ │ - bne.n 8b5bc │ │ + bne.n 8b628 │ │ ldrd r3, r1, [sp, #48] @ 0x30 │ │ ldr r2, [sp, #56] @ 0x38 │ │ strd r3, r1, [r0, #4] │ │ movs r1, #82 @ 0x52 │ │ str r2, [r0, #12] │ │ - b.n 8b5a8 │ │ + b.n 8b614 │ │ movs r1, #0 │ │ strd r4, r4, [r0, #4] │ │ str r1, [r0, #12] │ │ movs r1, #19 │ │ strb r1, [r0, #0] │ │ add sp, #60 @ 0x3c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ @@ -149662,22 +149577,22 @@ │ │ movs r2, #0 │ │ movs r1, #2 │ │ str r2, [sp, #56] @ 0x38 │ │ strd r2, r1, [sp, #48] @ 0x30 │ │ movs r1, #71 @ 0x47 │ │ strb r1, [r0, #0] │ │ ldr r0, [sp, #48] @ 0x30 │ │ - cbnz r0, 8b5fa │ │ - b.n 8b5aa │ │ + cbnz r0, 8b666 │ │ + b.n 8b616 │ │ ldr r2, [sp, #40] @ 0x28 │ │ movs r6, #0 │ │ strd r0, r1, [r2] │ │ movs r0, #6 │ │ ldrd r4, r2, [sp, #4] │ │ - b.n 8b5e8 │ │ + b.n 8b654 │ │ ldr r4, [sp, #28] │ │ movs r0, #0 │ │ ldr r1, [sp, #44] @ 0x2c │ │ add r4, r1 │ │ ldr r1, [sp, #40] @ 0x28 │ │ strd r4, r0, [r1] │ │ movs r2, #0 │ │ @@ -149685,94 +149600,94 @@ │ │ ldr r1, [sp, #36] @ 0x24 │ │ strb r6, [r1, #1] │ │ strb r0, [r1, #0] │ │ strd r4, r4, [r1, #4] │ │ str r2, [r1, #12] │ │ ldr r0, [sp, #48] @ 0x30 │ │ cmp r0, #0 │ │ - beq.n 8b5aa │ │ + beq.n 8b616 │ │ ldr r0, [sp, #52] @ 0x34 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add sp, #60 @ 0x3c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r6, #0 │ │ - b.n 8b5e4 │ │ + b.n 8b650 │ │ movs r1, #19 │ │ - b.n 8b618 │ │ + b.n 8b684 │ │ movs r1, #19 │ │ mov r0, r4 │ │ - b.n 8b618 │ │ + b.n 8b684 │ │ movs r1, #6 │ │ ldr r3, [sp, #36] @ 0x24 │ │ movs r2, #0 │ │ strd r0, r0, [r3, #4] │ │ ldr r0, [sp, #0] │ │ str r2, [r3, #12] │ │ strh r0, [r3, #2] │ │ strb r1, [r3, #0] │ │ ldr r0, [sp, #48] @ 0x30 │ │ cmp r0, #0 │ │ - bne.n 8b5fa │ │ - b.n 8b5aa │ │ + bne.n 8b666 │ │ + b.n 8b616 │ │ movs r0, #2 │ │ mov r1, r8 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ mov r4, r0 │ │ ldr r0, [sp, #48] @ 0x30 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #52] @ 0x34 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ push {r4, r5, r6, lr} │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ ldrd r2, r3, [r1] │ │ movs r6, #0 │ │ - cbz r3, 8b6cc │ │ + cbz r3, 8b738 │ │ add.w lr, r2, #1 │ │ subs r4, r3, #1 │ │ mov.w r9, #0 │ │ mov.w sl, #0 │ │ movs r5, #0 │ │ adds r6, r2, r3 │ │ str r6, [sp, #0] │ │ ldrb.w r8, [lr, #-1] │ │ cmp r5, #63 @ 0x3f │ │ - bne.n 8b67e │ │ + bne.n 8b6ea │ │ cmp.w r8, #1 │ │ - bhi.n 8b6e6 │ │ + bhi.n 8b752 │ │ and.w r6, r5, #63 @ 0x3f │ │ and.w r3, r8, #127 @ 0x7f │ │ rsb ip, r6, #32 │ │ subs.w fp, r6, #32 │ │ lsr.w r2, r3, ip │ │ it pl │ │ lslpl.w r2, r3, fp │ │ orr.w sl, sl, r2 │ │ lsl.w r2, r3, r6 │ │ it pl │ │ movpl r2, #0 │ │ orr.w r9, r9, r2 │ │ sxtb.w r2, r8 │ │ cmp.w r2, #4294967295 @ 0xffffffff │ │ - bgt.n 8b6f6 │ │ + bgt.n 8b762 │ │ subs r4, #1 │ │ add.w lr, lr, #1 │ │ adds r5, #7 │ │ adds r3, r4, #1 │ │ - bne.n 8b670 │ │ + bne.n 8b6dc │ │ ldr r3, [sp, #0] │ │ movs r2, #0 │ │ strd r3, r2, [r1] │ │ movs r6, #0 │ │ mov r2, r3 │ │ - b.n 8b6d0 │ │ + b.n 8b73c │ │ mov.w r8, #0 │ │ movs r1, #19 │ │ strd r2, r2, [r0, #4] │ │ str r6, [r0, #12] │ │ strb.w r8, [r0, #1] │ │ strb r1, [r0, #0] │ │ add sp, #4 │ │ @@ -149787,66 +149702,66 @@ │ │ strd lr, r4, [r1] │ │ movs r1, #82 @ 0x52 │ │ strb r1, [r0, #0] │ │ strd r9, sl, [r0, #8] │ │ add sp, #4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, pc} │ │ - bmi.n 8b6b6 │ │ + bmi.n 8b722 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #44 @ 0x2c │ │ add.w ip, sp, #4 │ │ stmia.w ip, {r0, r1, r2} │ │ ldr r0, [r7, #8] │ │ - cbz r0, 8b790 │ │ + cbz r0, 8b7fc │ │ add.w sl, r3, #2 │ │ mov.w r9, r0, lsl #2 │ │ mov.w fp, #0 │ │ movs r5, #46 @ 0x2e │ │ ldrh.w r3, [sl] │ │ add r0, sp, #16 │ │ ldrd r1, r2, [sp, #8] │ │ - bl 8ba10 │ │ + bl 8ba7c │ │ ldr r0, [sp, #16] │ │ lsls r0, r0, #31 │ │ - bne.n 8b772 │ │ + bne.n 8b7de │ │ ldrh.w r4, [sl, #-2] │ │ add r3, sp, #24 │ │ add.w sl, sl, #4 │ │ cmp r4, #1 │ │ ldmia r3, {r0, r1, r2, r3} │ │ itttt eq │ │ moveq fp, r1 │ │ moveq r5, r0 │ │ moveq r8, r3 │ │ moveq r6, r2 │ │ subs.w r9, r9, #4 │ │ - bne.n 8b730 │ │ + bne.n 8b79c │ │ eor.w r0, r5, #46 @ 0x2e │ │ orrs.w r0, r0, fp │ │ - beq.n 8b790 │ │ + beq.n 8b7fc │ │ movs r0, #0 │ │ movs r1, #0 │ │ - b.n 8b77e │ │ + b.n 8b7ea │ │ ldrd r5, fp, [sp, #24] │ │ movs r1, #0 │ │ ldrd r6, r8, [sp, #32] │ │ movs r0, #1 │ │ ldr r2, [sp, #4] │ │ stmia.w r2, {r0, r1, r5, fp} │ │ strd r6, r8, [r2, #16] │ │ add sp, #44 @ 0x2c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #4] @ (8b798 ) │ │ + ldr r0, [pc, #4] @ (8b804 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - lsls r6, r6, #25 │ │ + bl 3fd40 │ │ + lsls r2, r3, #24 │ │ movs r5, r0 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ movs r0, #16 │ │ @@ -149855,39 +149770,39 @@ │ │ movs r5, #4 │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 77834 │ │ + bl 7789c │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ - bmi.n 8b786 │ │ + bl 3e2ac │ │ + bmi.n 8b7f2 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #108 @ 0x6c │ │ str r0, [sp, #4] │ │ mov r6, r1 │ │ ldr r0, [r7, #8] │ │ movs r1, #0 │ │ str.w r1, [sp, #103] @ 0x67 │ │ cmp r0, #0 │ │ str r1, [sp, #100] @ 0x64 │ │ strh.w r1, [sp, #96] @ 0x60 │ │ strb.w r1, [sp, #98] @ 0x62 │ │ - beq.w 8ba02 │ │ + beq.w 8ba6e │ │ mov.w fp, r0, lsl #2 │ │ movs r0, #0 │ │ str r0, [sp, #68] @ 0x44 │ │ movs r0, #46 @ 0x2e │ │ strd r0, r0, [sp, #60] @ 0x3c │ │ movs r0, #0 │ │ str r0, [sp, #56] @ 0x38 │ │ @@ -149896,52 +149811,52 @@ │ │ movs r0, #0 │ │ movs r1, #0 │ │ str r0, [sp, #52] @ 0x34 │ │ strd r0, r0, [sp, #44] @ 0x2c │ │ strd r0, r0, [sp, #36] @ 0x24 │ │ str r1, [sp, #16] │ │ strd r1, r1, [sp, #8] │ │ - b.n 8b84e │ │ + b.n 8b8ba │ │ movw r0, #8193 @ 0x2001 │ │ cmp r5, r0 │ │ mov r0, sl │ │ itt eq │ │ strdeq r1, r2, [sp, #28] │ │ strdeq r3, r4, [sp, #56] @ 0x38 │ │ add.w r9, r9, #4 │ │ subs.w fp, fp, #4 │ │ - beq.w 8b98a │ │ + beq.w 8b9f6 │ │ ldrh.w r3, [r9] │ │ mov sl, r0 │ │ add r0, sp, #72 @ 0x48 │ │ mov r1, r6 │ │ mov r2, r8 │ │ - bl 8ba10 │ │ + bl 8ba7c │ │ ldr r0, [sp, #72] @ 0x48 │ │ ldrd r4, r3, [sp, #80] @ 0x50 │ │ ldrd r1, r2, [sp, #88] @ 0x58 │ │ lsls r0, r0, #31 │ │ - bne.w 8b970 │ │ + bne.w 8b9dc │ │ ldrh.w r5, [r9, #-2] │ │ subs r0, r5, #1 │ │ cmp r0, #4 │ │ - bhi.n 8b830 │ │ + bhi.n 8b89c │ │ tbb [pc, r0] │ │ mov r3, r0 │ │ adds r6, #38 @ 0x26 │ │ movs r1, r1 │ │ strd r1, r2, [sp, #20] │ │ mov r0, sl │ │ strd r4, r3, [sp, #64] @ 0x40 │ │ - b.n 8b842 │ │ + b.n 8b8ae │ │ eor.w r0, r4, #1 │ │ orrs r0, r3 │ │ - bne.w 8b96c │ │ + bne.w 8b9d8 │ │ cmp r2, #16 │ │ - bne.w 8b96c │ │ + bne.w 8b9d8 │ │ ldrb r4, [r1, #15] │ │ ldr.w r2, [r1, #3] │ │ ldrh r3, [r1, #8] │ │ ldrb r5, [r1, #10] │ │ str r4, [sp, #8] │ │ ldr.w r4, [r1, #11] │ │ ldr r0, [r1, #0] │ │ @@ -149949,98 +149864,98 @@ │ │ str.w r2, [sp, #103] @ 0x67 │ │ str r0, [sp, #100] @ 0x64 │ │ mov r0, sl │ │ str r4, [sp, #12] │ │ str r1, [sp, #16] │ │ strh.w r3, [sp, #96] @ 0x60 │ │ strb.w r5, [sp, #98] @ 0x62 │ │ - b.n 8b842 │ │ + b.n 8b8ae │ │ subs r0, r4, #2 │ │ sbc.w r5, r3, #0 │ │ movs r3, #0 │ │ rsbs r4, r0, #5 │ │ sbcs.w r5, r3, r5 │ │ - bcc.n 8b96c │ │ + bcc.n 8b9d8 │ │ tbb [pc, r0] │ │ movs r7, #43 @ 0x2b │ │ lsls r3, r6, #12 │ │ lsls r0, r6, #12 │ │ mov r3, r2 │ │ - b.n 8b944 │ │ + b.n 8b9b0 │ │ subs r0, r4, #2 │ │ sbc.w r5, r3, #0 │ │ movs r3, #0 │ │ rsbs r4, r0, #5 │ │ sbcs.w r5, r3, r5 │ │ - bcc.n 8b96c │ │ + bcc.n 8b9d8 │ │ tbb [pc, r0] │ │ adds r7, r4, r4 │ │ lsls r6, r5, #12 │ │ lsls r3, r5, #12 │ │ mov r3, r2 │ │ - b.n 8b95a │ │ + b.n 8b9c6 │ │ subs r4, #2 │ │ mov.w r0, #0 │ │ sbc.w r3, r3, #0 │ │ rsbs r5, r4, #5 │ │ sbcs.w r3, r0, r3 │ │ - bcc.n 8b96c │ │ + bcc.n 8b9d8 │ │ tbb [pc, r4] │ │ lsrs r0, r3, #16 │ │ lsls r4, r4, #12 │ │ lsls r1, r4, #12 │ │ mov r0, r2 │ │ str r1, [sp, #36] @ 0x24 │ │ - b.n 8b842 │ │ + b.n 8b8ae │ │ uxth r1, r1 │ │ - b.n 8b944 │ │ + b.n 8b9b0 │ │ uxth r1, r1 │ │ - b.n 8b95a │ │ + b.n 8b9c6 │ │ uxtb r1, r1 │ │ - b.n 8b944 │ │ + b.n 8b9b0 │ │ uxth r1, r1 │ │ str r1, [sp, #36] @ 0x24 │ │ - b.n 8b842 │ │ + b.n 8b8ae │ │ mov r3, r2 │ │ cmp r2, #0 │ │ - bmi.n 8b96c │ │ + bmi.n 8b9d8 │ │ mov r0, sl │ │ strd r3, r1, [sp, #40] @ 0x28 │ │ - b.n 8b842 │ │ + b.n 8b8ae │ │ uxtb r1, r1 │ │ - b.n 8b95a │ │ + b.n 8b9c6 │ │ uxtb r1, r1 │ │ - b.n 8b968 │ │ + b.n 8b9d4 │ │ mov r3, r2 │ │ cmp r2, #0 │ │ - bmi.n 8b96c │ │ + bmi.n 8b9d8 │ │ mov r0, sl │ │ strd r3, r1, [sp, #48] @ 0x30 │ │ - b.n 8b842 │ │ + b.n 8b8ae │ │ mov r0, r2 │ │ cmp r2, #0 │ │ - bmi.n 8b96c │ │ + bmi.n 8b9d8 │ │ str r1, [sp, #36] @ 0x24 │ │ - b.n 8b842 │ │ + b.n 8b8ae │ │ mov r0, sl │ │ - b.n 8b842 │ │ + b.n 8b8ae │ │ ldr r5, [sp, #4] │ │ movs r0, #0 │ │ movs r6, #46 @ 0x2e │ │ strd r6, r0, [r5] │ │ strd r4, r3, [r5, #8] │ │ strd r1, r2, [r5, #16] │ │ add sp, #108 @ 0x6c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr.w ip, [sp, #64] @ 0x40 │ │ ldr r4, [sp, #68] @ 0x44 │ │ eor.w r1, ip, #46 @ 0x2e │ │ orrs r1, r4 │ │ - beq.n 8ba02 │ │ + beq.n 8ba6e │ │ ldr r5, [sp, #4] │ │ ldr.w r2, [sp, #103] @ 0x67 │ │ ldr r1, [sp, #100] @ 0x64 │ │ str.w r2, [r5, #59] @ 0x3b │ │ str r1, [r5, #56] @ 0x38 │ │ ldr r1, [sp, #8] │ │ strb.w r1, [r5, #71] @ 0x47 │ │ @@ -150074,27 +149989,27 @@ │ │ strh.w r6, [r5, #64] @ 0x40 │ │ strb.w r3, [r5, #66] @ 0x42 │ │ strd ip, r4, [r5] │ │ str r0, [r5, #28] │ │ add sp, #108 @ 0x6c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #8] @ (8ba0c ) │ │ + ldr r0, [pc, #8] @ (8ba78 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ nop │ │ - lsls r4, r6, #15 │ │ + lsls r0, r3, #14 │ │ movs r5, r0 │ │ push {r4, r5, r6, lr} │ │ stmdb sp!, {r8, r9, sl, fp} │ │ mvn.w r6, #2 │ │ ubfx r2, r2, #8, #8 │ │ uxtah r6, r6, r3 │ │ cmp r6, #37 @ 0x25 │ │ - bhi.n 8ba92 │ │ + bhi.n 8bafe │ │ tbh [pc, r6, lsl #1] │ │ movs r6, r4 │ │ lsls r5, r6, #6 │ │ lsls r6, r6, #5 │ │ lsls r4, r5, #8 │ │ lsls r6, r2, #6 │ │ lsls r6, r0, #6 │ │ @@ -150128,134 +150043,134 @@ │ │ lsls r7, r2, #2 │ │ lsls r4, r7, #8 │ │ lsls r2, r2, #7 │ │ lsls r3, r3, #2 │ │ lsls r2, r5, #2 │ │ ldrd r9, r2, [r1] │ │ cmp r2, #2 │ │ - bcc.w 8bdc2 │ │ + bcc.w 8be2e │ │ ldrh.w sl, [r9], #2 │ │ subs r2, #2 │ │ cmp r2, sl │ │ strd r9, r2, [r1] │ │ - bcc.w 8bdc2 │ │ - b.n 8bf60 │ │ + bcc.w 8be2e │ │ + b.n 8bfcc │ │ uxth r6, r3 │ │ movw r5, #7938 @ 0x1f02 │ │ cmp r6, r5 │ │ - beq.n 8bade │ │ + beq.n 8bb4a │ │ movw r5, #7969 @ 0x1f21 │ │ cmp r6, r5 │ │ - bne.n 8bb58 │ │ + bne.n 8bbc4 │ │ cmp r2, #8 │ │ - bne.w 8bf40 │ │ + bne.w 8bfac │ │ ldrd r3, r6, [r1] │ │ cmp r6, #8 │ │ - bcc.w 8bfd0 │ │ + bcc.w 8c03c │ │ ldrb r5, [r3, #7] │ │ subs r6, #8 │ │ ldr.w r2, [r3, #3] │ │ add.w r4, r3, #8 │ │ strd r4, r6, [r1] │ │ lsls r1, r5, #24 │ │ orrs.w r1, r1, r2, lsr #8 │ │ - bne.w 8bf84 │ │ + bne.w 8bff0 │ │ lsls r1, r2, #24 │ │ ldrb r2, [r3, #2] │ │ ldrh r3, [r3, #0] │ │ orr.w r2, r3, r2, lsl #16 │ │ orr.w r9, r1, r2 │ │ - b.n 8bf52 │ │ + b.n 8bfbe │ │ ldrd r2, r3, [r1] │ │ cmp r3, #0 │ │ - beq.w 8bf7a │ │ + beq.w 8bfe6 │ │ add.w ip, r2, r3 │ │ add.w fp, r2, #1 │ │ subs r4, r3, #1 │ │ mov.w r9, #0 │ │ mov.w r8, #0 │ │ movs r2, #0 │ │ ldrb.w lr, [fp, #-1] │ │ cmp r2, #63 @ 0x3f │ │ - bne.n 8bb0c │ │ + bne.n 8bb78 │ │ cmp.w lr, #1 │ │ - bhi.w 8bfdc │ │ + bhi.w 8c048 │ │ and.w r6, r2, #63 @ 0x3f │ │ and.w r3, lr, #127 @ 0x7f │ │ rsb r5, r6, #32 │ │ subs.w sl, r6, #32 │ │ lsr.w r5, r3, r5 │ │ it pl │ │ lslpl.w r5, r3, sl │ │ lsl.w r3, r3, r6 │ │ it pl │ │ movpl r3, #0 │ │ orr.w r9, r9, r3 │ │ orr.w r8, r8, r5 │ │ sxtb.w r3, lr │ │ cmp.w r3, #4294967295 @ 0xffffffff │ │ - bgt.w 8bfe4 │ │ + bgt.w 8c050 │ │ subs r4, #1 │ │ add.w fp, fp, #1 │ │ adds r2, #7 │ │ adds r3, r4, #1 │ │ - bne.n 8bafc │ │ + bne.n 8bb68 │ │ movs r2, #0 │ │ strd ip, r2, [r1] │ │ mov r2, ip │ │ - b.n 8bf7e │ │ + b.n 8bfea │ │ movs r1, #12 │ │ strh r3, [r0, #10] │ │ strb r1, [r0, #8] │ │ - b.n 8c13e │ │ + b.n 8c1aa │ │ ldrd r2, r3, [r1] │ │ cmp r3, #3 │ │ - bcc.w 8bec0 │ │ + bcc.w 8bf2c │ │ ldrb.w ip, [r2, #2] │ │ subs r3, #3 │ │ ldrh r6, [r2, #0] │ │ adds r2, #3 │ │ strd r2, r3, [r1] │ │ orr.w r9, r6, ip, lsl #16 │ │ - b.n 8bff4 │ │ + b.n 8c060 │ │ ldrd r2, r3, [r1] │ │ cmp r3, #4 │ │ - bcc.w 8bec0 │ │ + bcc.w 8bf2c │ │ subs r3, #4 │ │ ldr.w r9, [r2], #4 │ │ strd r2, r3, [r1] │ │ - b.n 8bff0 │ │ + b.n 8c05c │ │ ldrd r9, r2, [r1] │ │ cmp r2, #16 │ │ - bcc.w 8bdc2 │ │ + bcc.w 8be2e │ │ subs r2, #16 │ │ add.w r3, r9, #16 │ │ mov.w ip, r9, lsr #16 │ │ mov.w lr, r9, lsr #8 │ │ strd r3, r2, [r1] │ │ movs r4, #0 │ │ movs r1, #1 │ │ mov.w sl, #16 │ │ - b.n 8c0e4 │ │ + b.n 8c150 │ │ ldrd r2, r3, [r1] │ │ cmp r3, #0 │ │ - beq.w 8bffe │ │ + beq.w 8c06a │ │ add.w ip, r2, r3 │ │ add.w fp, r2, #1 │ │ subs r5, r3, #1 │ │ mov.w r9, #0 │ │ mov.w sl, #0 │ │ movs r6, #0 │ │ ldrb.w r8, [fp, #-1] │ │ cmp r6, #63 @ 0x3f │ │ - bne.n 8bbee │ │ + bne.n 8bc5a │ │ cmp.w r8, #127 @ 0x7f │ │ it ne │ │ cmpne.w r8, #0 │ │ - bne.w 8c14c │ │ + bne.w 8c1b8 │ │ and.w r3, r6, #63 @ 0x3f │ │ and.w r2, r8, #127 @ 0x7f │ │ rsb r4, r3, #32 │ │ subs.w lr, r3, #32 │ │ add.w r6, r6, #7 │ │ lsr.w r4, r2, r4 │ │ it pl │ │ @@ -150263,116 +150178,116 @@ │ │ lsl.w r2, r2, r3 │ │ it pl │ │ movpl r2, #0 │ │ orr.w r9, r9, r2 │ │ orr.w sl, sl, r4 │ │ sxtb.w r2, r8 │ │ cmp.w r2, #4294967295 @ 0xffffffff │ │ - bgt.w 8c03e │ │ + bgt.w 8c0aa │ │ subs r5, #1 │ │ add.w fp, fp, #1 │ │ adds r2, r5, #1 │ │ - bne.n 8bbd8 │ │ + bne.n 8bc44 │ │ movs r2, #0 │ │ strd ip, r2, [r1] │ │ mov r2, ip │ │ - b.n 8c002 │ │ + b.n 8c06e │ │ ldrd r2, r3, [r1] │ │ cmp r3, #0 │ │ - beq.w 8bec0 │ │ + beq.w 8bf2c │ │ ldrb.w r9, [r2], #1 │ │ subs r3, #1 │ │ mov.w lr, #0 │ │ strd r2, r3, [r1] │ │ cmp.w r9, #0 │ │ it ne │ │ movne.w r9, #1 │ │ movs r1, #9 │ │ - b.n 8beb8 │ │ + b.n 8bf24 │ │ ldrd r2, r3, [r1] │ │ cmp r3, #0 │ │ - beq.w 8c00c │ │ + beq.w 8c078 │ │ add.w ip, r2, r3 │ │ add.w fp, r2, #1 │ │ subs r5, r3, #1 │ │ mov.w r9, #0 │ │ mov.w sl, #0 │ │ movs r6, #0 │ │ ldrb.w lr, [fp, #-1] │ │ cmp r6, #63 @ 0x3f │ │ - bne.n 8bc90 │ │ + bne.n 8bcfc │ │ cmp.w lr, #1 │ │ - bhi.w 8c0ac │ │ + bhi.w 8c118 │ │ and.w r3, r6, #63 @ 0x3f │ │ and.w r2, lr, #127 @ 0x7f │ │ rsb r4, r3, #32 │ │ subs.w r8, r3, #32 │ │ lsr.w r4, r2, r4 │ │ it pl │ │ lslpl.w r4, r2, r8 │ │ lsl.w r2, r2, r3 │ │ it pl │ │ movpl r2, #0 │ │ orr.w r9, r9, r2 │ │ orr.w sl, sl, r4 │ │ sxtb.w r2, lr │ │ cmp.w r2, #4294967295 @ 0xffffffff │ │ - bgt.w 8c0cc │ │ + bgt.w 8c138 │ │ subs r5, #1 │ │ add.w fp, fp, #1 │ │ adds r6, #7 │ │ adds r2, r5, #1 │ │ - bne.n 8bc80 │ │ + bne.n 8bcec │ │ movs r2, #0 │ │ strd ip, r2, [r1] │ │ mov r2, ip │ │ - b.n 8c010 │ │ + b.n 8c07c │ │ cmp r2, #8 │ │ - bne.w 8bf88 │ │ + bne.w 8bff4 │ │ ldrd r3, r6, [r1] │ │ cmp r6, #8 │ │ - bcc.w 8bfd0 │ │ + bcc.w 8c03c │ │ ldrb r5, [r3, #7] │ │ subs r6, #8 │ │ ldr.w r2, [r3, #3] │ │ add.w r4, r3, #8 │ │ strd r4, r6, [r1] │ │ lsls r1, r5, #24 │ │ orrs.w r1, r1, r2, lsr #8 │ │ - bne.w 8bf84 │ │ + bne.w 8bff0 │ │ lsls r1, r2, #24 │ │ ldrb r2, [r3, #2] │ │ ldrh r3, [r3, #0] │ │ orr.w r2, r3, r2, lsl #16 │ │ orr.w r9, r1, r2 │ │ - b.n 8bf9a │ │ + b.n 8c006 │ │ ldrd r2, r3, [r1] │ │ cmp r3, #2 │ │ - bcc.w 8bec0 │ │ + bcc.w 8bf2c │ │ ldrh.w r9, [r2], #2 │ │ subs r3, #2 │ │ mov.w ip, #0 │ │ strd r2, r3, [r1] │ │ movs r1, #3 │ │ mov.w lr, r9, lsr #8 │ │ - b.n 8bebc │ │ + b.n 8bf28 │ │ ldrd r9, r2, [r1] │ │ cmp r2, #0 │ │ - beq.n 8bdc2 │ │ + beq.n 8be2e │ │ mov.w sl, #0 │ │ ldrb.w r3, [r9, sl] │ │ cmp r3, #0 │ │ - beq.w 8c020 │ │ + beq.w 8c08c │ │ add.w sl, sl, #1 │ │ cmp r2, sl │ │ - bne.n 8bd42 │ │ - b.n 8bdc2 │ │ + bne.n 8bdae │ │ + b.n 8be2e │ │ ldrd r2, r3, [r1] │ │ cmp r3, #8 │ │ - bcc.w 8bec0 │ │ + bcc.w 8bf2c │ │ subs r3, #8 │ │ str r3, [r1, #4] │ │ ldrb r5, [r2, #7] │ │ ldrb r3, [r2, #2] │ │ ldrh r4, [r2, #0] │ │ ldr.w r6, [r2, #3] │ │ adds r2, #8 │ │ @@ -150384,264 +150299,264 @@ │ │ orr.w r1, r9, r6, lsl #24 │ │ lsrs r3, r6, #8 │ │ lsrs r2, r1, #16 │ │ lsrs r1, r1, #8 │ │ orr.w lr, r1, r3, lsl #24 │ │ orr.w ip, r2, r3, lsl #16 │ │ movs r1, #5 │ │ - b.n 8c0e4 │ │ + b.n 8c150 │ │ ldrd r9, r2, [r1] │ │ cmp r2, #4 │ │ - bcc.n 8bdc2 │ │ + bcc.n 8be2e │ │ ldr.w sl, [r9], #4 │ │ subs r2, #4 │ │ cmp r2, sl │ │ strd r9, r2, [r1] │ │ - bcc.n 8bdc2 │ │ - b.n 8bf60 │ │ + bcc.n 8be2e │ │ + b.n 8bfcc │ │ ldrd r9, r2, [r1] │ │ - cbz r2, 8bdc2 │ │ + cbz r2, 8be2e │ │ ldrb.w sl, [r9], #1 │ │ subs r2, #1 │ │ cmp r2, sl │ │ strd r9, r2, [r1] │ │ - bcs.w 8bf60 │ │ + bcs.w 8bfcc │ │ movs r1, #0 │ │ str.w r9, [r0, #12] │ │ str.w r9, [r0, #16] │ │ - b.n 8bec6 │ │ + b.n 8bf32 │ │ ldrd r2, r3, [r1] │ │ cmp r3, #2 │ │ - bcc.n 8bec0 │ │ + bcc.n 8bf2c │ │ ldrh.w r9, [r2], #2 │ │ subs r3, #2 │ │ mov.w ip, #0 │ │ strd r2, r3, [r1] │ │ movs r1, #29 │ │ mov.w lr, r9, lsr #8 │ │ - b.n 8bebc │ │ + b.n 8bf28 │ │ ldrd r2, r3, [r1] │ │ cmp r3, #0 │ │ - beq.n 8bec0 │ │ + beq.n 8bf2c │ │ ldrb.w r9, [r2], #1 │ │ subs r3, #1 │ │ str r3, [r1, #4] │ │ mov.w lr, #0 │ │ str r2, [r1, #0] │ │ movs r1, #2 │ │ - b.n 8beb8 │ │ + b.n 8bf24 │ │ ldrd r2, r3, [r1] │ │ cmp r3, #0 │ │ - beq.w 8c016 │ │ + beq.w 8c082 │ │ add.w ip, r2, r3 │ │ add.w r9, r2, #1 │ │ sub.w fp, r3, #1 │ │ mov.w sl, #0 │ │ movs r4, #0 │ │ movs r5, #0 │ │ ldrb.w lr, [r9, #-1] │ │ cmp r5, #63 @ 0x3f │ │ - bne.n 8be34 │ │ + bne.n 8bea0 │ │ cmp.w lr, #1 │ │ - bhi.w 8c0c4 │ │ + bhi.w 8c130 │ │ and.w r3, r5, #63 @ 0x3f │ │ and.w r2, lr, #127 @ 0x7f │ │ rsb r6, r3, #32 │ │ subs.w r8, r3, #32 │ │ lsr.w r6, r2, r6 │ │ it pl │ │ lslpl.w r6, r2, r8 │ │ lsl.w r2, r2, r3 │ │ it pl │ │ movpl r2, #0 │ │ orr.w sl, sl, r2 │ │ orrs r4, r6 │ │ sxtb.w r2, lr │ │ cmp.w r2, #4294967295 @ 0xffffffff │ │ - bgt.w 8c106 │ │ + bgt.w 8c172 │ │ sub.w fp, fp, #1 │ │ add.w r9, r9, #1 │ │ adds r5, #7 │ │ adds.w r2, fp, #1 │ │ - bne.n 8be24 │ │ + bne.n 8be90 │ │ movs r2, #0 │ │ strd ip, r2, [r1] │ │ mov r2, ip │ │ - b.n 8c01a │ │ + b.n 8c086 │ │ ldrd r2, r3, [r1] │ │ cmp r3, #4 │ │ - bcc.n 8bec0 │ │ + bcc.n 8bf2c │ │ ldr.w r9, [r2], #4 │ │ subs r3, #4 │ │ movs r4, #0 │ │ strd r2, r3, [r1] │ │ movs r1, #4 │ │ mov.w ip, r9, lsr #16 │ │ mov.w lr, r9, lsr #8 │ │ - b.n 8c0e4 │ │ + b.n 8c150 │ │ ldrd r2, r3, [r1] │ │ - cbz r3, 8bec0 │ │ + cbz r3, 8bf2c │ │ subs r3, #1 │ │ ldrb.w r9, [r2], #1 │ │ str r3, [r1, #4] │ │ mov.w lr, #0 │ │ str r2, [r1, #0] │ │ movs r1, #29 │ │ mov.w ip, #0 │ │ movs r4, #0 │ │ - b.n 8c0e4 │ │ + b.n 8c150 │ │ str r2, [r0, #12] │ │ movs r1, #0 │ │ str r2, [r0, #16] │ │ movs r2, #19 │ │ str r1, [r0, #20] │ │ strb r2, [r0, #8] │ │ movs r2, #1 │ │ strd r2, r1, [r0] │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, pc} │ │ cmp r2, #8 │ │ - bne.n 8bfa8 │ │ + bne.n 8c014 │ │ ldrd r3, r6, [r1] │ │ cmp r6, #8 │ │ - bcc.n 8bfd0 │ │ + bcc.n 8c03c │ │ ldrb r5, [r3, #7] │ │ subs r6, #8 │ │ ldr.w r2, [r3, #3] │ │ add.w r4, r3, #8 │ │ strd r4, r6, [r1] │ │ lsls r1, r5, #24 │ │ orrs.w r1, r1, r2, lsr #8 │ │ - bne.n 8bf84 │ │ + bne.n 8bff0 │ │ lsls r1, r2, #24 │ │ ldrb r2, [r3, #2] │ │ ldrh r3, [r3, #0] │ │ orr.w r2, r3, r2, lsl #16 │ │ orr.w r9, r1, r2 │ │ - b.n 8bfba │ │ + b.n 8c026 │ │ cmp r2, #8 │ │ - bne.n 8bfc8 │ │ + bne.n 8c034 │ │ ldrd r3, r6, [r1] │ │ cmp r6, #8 │ │ - bcc.n 8bfd0 │ │ + bcc.n 8c03c │ │ ldrb r5, [r3, #7] │ │ subs r6, #8 │ │ ldr.w r2, [r3, #3] │ │ add.w r4, r3, #8 │ │ strd r4, r6, [r1] │ │ lsls r1, r5, #24 │ │ orrs.w r1, r1, r2, lsr #8 │ │ - bne.n 8bf84 │ │ + bne.n 8bff0 │ │ lsls r1, r2, #24 │ │ ldrb r2, [r3, #2] │ │ ldrh r3, [r3, #0] │ │ orr.w r2, r3, r2, lsl #16 │ │ orr.w r9, r1, r2 │ │ - b.n 8c09e │ │ + b.n 8c10a │ │ ldrd r3, r2, [r1] │ │ cmp r2, #4 │ │ - bcc.n 8bfd0 │ │ + bcc.n 8c03c │ │ ldr.w r9, [r3], #4 │ │ subs r2, #4 │ │ strd r3, r2, [r1] │ │ mov.w ip, r9, lsr #16 │ │ mov.w lr, r9, lsr #8 │ │ movs r4, #0 │ │ movs r1, #27 │ │ - b.n 8c0e4 │ │ + b.n 8c150 │ │ sub.w r2, r2, sl │ │ add.w r3, r9, sl │ │ strd r3, r2, [r1] │ │ mov.w ip, r9, lsr #16 │ │ mov.w lr, r9, lsr #8 │ │ movs r4, #0 │ │ movs r1, #1 │ │ - b.n 8c0e4 │ │ + b.n 8c150 │ │ mov.w lr, #0 │ │ movs r6, #0 │ │ movs r1, #19 │ │ - b.n 8c11e │ │ + b.n 8c18a │ │ movs r2, #56 @ 0x38 │ │ - b.n 8bfd4 │ │ + b.n 8c040 │ │ ldrd r3, r2, [r1] │ │ cmp r2, #4 │ │ - bcc.n 8bfd0 │ │ + bcc.n 8c03c │ │ ldr.w r9, [r3], #4 │ │ subs r2, #4 │ │ strd r3, r2, [r1] │ │ mov.w ip, r9, lsr #16 │ │ mov.w lr, r9, lsr #8 │ │ movs r4, #0 │ │ movs r1, #26 │ │ - b.n 8c0e4 │ │ + b.n 8c150 │ │ ldrd r3, r2, [r1] │ │ cmp r2, #4 │ │ - bcc.n 8bfd0 │ │ + bcc.n 8c03c │ │ ldr.w r9, [r3], #4 │ │ subs r2, #4 │ │ strd r3, r2, [r1] │ │ mov.w ip, r9, lsr #16 │ │ mov.w lr, r9, lsr #8 │ │ movs r4, #0 │ │ movs r1, #30 │ │ - b.n 8c0e4 │ │ + b.n 8c150 │ │ ldrd r3, r2, [r1] │ │ cmp r2, #4 │ │ - bcs.n 8c094 │ │ + bcs.n 8c100 │ │ movs r1, #0 │ │ movs r2, #19 │ │ strb r2, [r0, #8] │ │ str r3, [r0, #12] │ │ str r3, [r0, #16] │ │ - b.n 8c0c0 │ │ + b.n 8c12c │ │ strd fp, r4, [r1] │ │ movs r1, #6 │ │ - b.n 8c11a │ │ + b.n 8c186 │ │ cmp.w r8, #0 │ │ strd fp, r4, [r1] │ │ - bne.w 8c118 │ │ + bne.w 8c184 │ │ mov.w ip, r9, lsr #16 │ │ mov.w lr, r9, lsr #8 │ │ movs r4, #0 │ │ movs r1, #29 │ │ - b.n 8c0e4 │ │ + b.n 8c150 │ │ mov.w r8, #0 │ │ movs r1, #0 │ │ movs r3, #19 │ │ strb.w r8, [r0, #9] │ │ - b.n 8c0ba │ │ + b.n 8c126 │ │ mov.w lr, #0 │ │ movs r1, #0 │ │ movs r3, #19 │ │ - b.n 8c0b6 │ │ + b.n 8c122 │ │ mov.w lr, #0 │ │ movs r3, #0 │ │ movs r1, #19 │ │ - b.n 8c132 │ │ + b.n 8c19e │ │ mvn.w r3, sl │ │ add r2, r3 │ │ add.w r3, r9, sl │ │ mov.w ip, r9, lsr #16 │ │ adds r3, #1 │ │ strd r3, r2, [r1] │ │ mov.w lr, r9, lsr #8 │ │ movs r4, #0 │ │ movs r1, #31 │ │ - b.n 8c0e4 │ │ + b.n 8c150 │ │ strd fp, r5, [r1] │ │ mov.w r1, r9, lsr #16 │ │ orr.w ip, r1, sl, lsl #16 │ │ mov.w r1, r9, lsr #8 │ │ orr.w lr, r1, sl, lsl #24 │ │ movs r4, #0 │ │ movs r1, #6 │ │ cmp r6, #63 @ 0x3f │ │ - bgt.n 8c0e4 │ │ + bgt.n 8c150 │ │ cmp.w r8, #64 @ 0x40 │ │ - bcc.n 8c0e4 │ │ + bcc.n 8c150 │ │ and.w r1, r6, #63 @ 0x3f │ │ mov.w r3, #4294967295 @ 0xffffffff │ │ subs.w r2, r1, #32 │ │ lsl.w r1, r3, r1 │ │ it pl │ │ lslpl r3, r2 │ │ it pl │ │ @@ -150649,35 +150564,35 @@ │ │ orr.w r9, r9, r1 │ │ orr.w sl, sl, r3 │ │ mov.w r1, r9, lsr #16 │ │ orr.w ip, r1, sl, lsl #16 │ │ mov.w r1, r9, lsr #8 │ │ orr.w lr, r1, sl, lsl #24 │ │ movs r1, #6 │ │ - b.n 8c0e4 │ │ + b.n 8c150 │ │ subs r2, #4 │ │ ldr.w r9, [r3], #4 │ │ strd r3, r2, [r1] │ │ mov.w ip, r9, lsr #16 │ │ mov.w lr, r9, lsr #8 │ │ movs r4, #0 │ │ movs r1, #10 │ │ - b.n 8c0e4 │ │ + b.n 8c150 │ │ strd fp, r5, [r1] │ │ movs r3, #6 │ │ mov.w lr, #0 │ │ strb.w lr, [r0, #9] │ │ strb r3, [r0, #8] │ │ str r2, [r0, #12] │ │ str r2, [r0, #16] │ │ str r1, [r0, #20] │ │ - b.n 8c13e │ │ + b.n 8c1aa │ │ strd r9, fp, [r1] │ │ movs r1, #6 │ │ - b.n 8c12e │ │ + b.n 8c19a │ │ strd fp, r5, [r1] │ │ mov.w r1, r9, lsr #16 │ │ orr.w ip, r1, sl, lsl #16 │ │ mov.w r1, r9, lsr #8 │ │ orr.w lr, r1, sl, lsl #24 │ │ movs r4, #0 │ │ movs r1, #7 │ │ @@ -150688,26 +150603,26 @@ │ │ orr.w r2, r2, ip, lsl #16 │ │ strd r2, sl, [r0, #16] │ │ movs r2, #0 │ │ strd r2, r1, [r0] │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, pc} │ │ strd r9, fp, [r1] │ │ - cbnz r4, 8c12c │ │ + cbnz r4, 8c198 │ │ cmp fp, sl │ │ - bcc.w 8bdc2 │ │ + bcc.w 8be2e │ │ sub.w r2, fp, sl │ │ - b.n 8bf64 │ │ + b.n 8bfd0 │ │ movs r1, #56 @ 0x38 │ │ mov.w lr, #0 │ │ strb.w lr, [r0, #9] │ │ strb r1, [r0, #8] │ │ strd r2, r2, [r0, #12] │ │ str r6, [r0, #20] │ │ - b.n 8c13e │ │ + b.n 8c1aa │ │ movs r1, #56 @ 0x38 │ │ mov.w lr, #0 │ │ strb.w lr, [r0, #9] │ │ strb r1, [r0, #8] │ │ strd r2, r2, [r0, #12] │ │ str r3, [r0, #20] │ │ movs r1, #0 │ │ @@ -150715,105 +150630,105 @@ │ │ strd r2, r1, [r0] │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, pc} │ │ mov.w r8, #0 │ │ strd fp, r5, [r1] │ │ movs r3, #7 │ │ strb.w r8, [r0, #9] │ │ - b.n 8c0ba │ │ + b.n 8c126 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ movs r5, #4 │ │ movs r0, #2 │ │ strd r0, r5, [sp] │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 77834 │ │ + bl 7789c │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ - bgt.n 8c1aa │ │ - bl 3e03c │ │ + bgt.n 8c216 │ │ + bl 3e344 │ │ ldr r6, [r0, #8] │ │ mov r4, r1 │ │ mov r5, r0 │ │ - cbz r1, 8c1c6 │ │ + cbz r1, 8c232 │ │ mov r0, r4 │ │ movs r1, #1 │ │ - blx d8820 │ │ - cbz r0, 8c1fc │ │ + blx d8830 │ │ + cbz r0, 8c268 │ │ mov r8, r0 │ │ ldr r0, [r5, #0] │ │ cmp r6, r0 │ │ - beq.n 8c1d0 │ │ - b.n 8c1d6 │ │ + beq.n 8c23c │ │ + b.n 8c242 │ │ mov.w r8, #1 │ │ ldr r0, [r5, #0] │ │ cmp r6, r0 │ │ - bne.n 8c1d6 │ │ + bne.n 8c242 │ │ mov r0, r5 │ │ - bl 8c26c │ │ + bl 8c2d8 │ │ ldr r0, [r5, #4] │ │ add.w r1, r6, r6, lsl #1 │ │ adds r2, r6, #1 │ │ str r2, [r5, #8] │ │ str.w r4, [r0, r1, lsl #2] │ │ add.w r0, r0, r1, lsl #2 │ │ strd r8, r4, [r0, #4] │ │ ldr r0, [r5, #4] │ │ add.w r0, r0, r1, lsl #2 │ │ ldrd r0, r1, [r0, #4] │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #1 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ cmp r4, #0 │ │ mov r5, r0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub.w sp, sp, #10496 @ 0x2900 │ │ sub sp, #32 │ │ add.w r9, sp, #24 │ │ mov r6, r1 │ │ mov r8, r0 │ │ movw r1, #10497 @ 0x2901 │ │ mov r0, r9 │ │ mov r4, r3 │ │ mov r5, r2 │ │ - bl d518e │ │ + bl d521e │ │ add r0, sp, #12 │ │ mov r1, r9 │ │ mov r2, r8 │ │ mov r3, r6 │ │ strd r5, r4, [sp] │ │ - bl 6eddc │ │ + bl 6ee90 │ │ ldr r1, [sp, #12] │ │ ldr r0, [sp, #20] │ │ ldrb.w r2, [sp, #16] │ │ eors r1, r6 │ │ eors r0, r4 │ │ orrs r1, r2 │ │ orrs r0, r1 │ │ @@ -150833,207 +150748,207 @@ │ │ strd r5, r0, [sp] │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 77834 │ │ + bl 7789c │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #48 @ 0x30 │ │ ldr r2, [r0, #0] │ │ movs r1, #0 │ │ - cbz r2, 8c2d0 │ │ + cbz r2, 8c33c │ │ add.w ip, sp, #20 │ │ ldrd r3, r0, [r0, #4] │ │ stmia.w ip, {r1, r2, r3} │ │ add.w ip, sp, #4 │ │ stmia.w ip, {r1, r2, r3} │ │ movs r1, #1 │ │ - b.n 8c2d2 │ │ + b.n 8c33e │ │ movs r0, #0 │ │ add r6, sp, #36 @ 0x24 │ │ mov r5, sp │ │ str r0, [sp, #32] │ │ str r1, [sp, #16] │ │ str r1, [sp, #0] │ │ mov r0, r6 │ │ mov r1, r5 │ │ - bl 8c334 │ │ + bl 8c3a0 │ │ ldr r0, [sp, #36] @ 0x24 │ │ - cbz r0, 8c31a │ │ + cbz r0, 8c386 │ │ ldr r1, [sp, #44] @ 0x2c │ │ lsls r2, r1, #4 │ │ ldrb r2, [r0, r2] │ │ cmp r2, #82 @ 0x52 │ │ - bne.n 8c2dc │ │ + bne.n 8c348 │ │ add.w r0, r0, r1, lsl #4 │ │ ldr r1, [r0, #4] │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r4, r3, [r1] │ │ cmp r4, #0 │ │ - bne.n 8c2fc │ │ + bne.n 8c368 │ │ cmp r2, #1 │ │ - bne.n 8c2dc │ │ + bne.n 8c348 │ │ dmb ish │ │ ldr r0, [r0, #4] │ │ - bl 801a6 │ │ - b.n 8c2dc │ │ + bl 8020e │ │ + b.n 8c348 │ │ add sp, #48 @ 0x30 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ mov r4, r0 │ │ mov r0, sp │ │ - bl 8c438 │ │ + bl 8c4a4 │ │ mov r0, r4 │ │ - blx d6dd0 │ │ - bl 416fe │ │ + blx d6de0 │ │ + bl 41a06 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ mov r8, r0 │ │ ldr r0, [r1, #32] │ │ - cbz r0, 8c37a │ │ + cbz r0, 8c3e6 │ │ ldr r2, [r1, #0] │ │ subs r0, #1 │ │ str r0, [r1, #32] │ │ cmp r2, #1 │ │ - bne.n 8c426 │ │ + bne.n 8c492 │ │ ldr r0, [r1, #4] │ │ - cbz r0, 8c3b0 │ │ + cbz r0, 8c41c │ │ ldrd r5, r6, [r1, #8] │ │ ldrh.w r2, [r0, #270] @ 0x10e │ │ cmp r6, r2 │ │ - bcs.n 8c3ce │ │ + bcs.n 8c43a │ │ mov r4, r0 │ │ cmp r5, #0 │ │ - beq.n 8c3f0 │ │ + beq.n 8c45c │ │ add.w r0, r4, r6, lsl #2 │ │ mov r3, r5 │ │ add.w r2, r0, #276 @ 0x114 │ │ ldr r0, [r2, #0] │ │ subs r3, #1 │ │ add.w r2, r0, #272 @ 0x110 │ │ - bne.n 8c36c │ │ + bne.n 8c3d8 │ │ movs r2, #0 │ │ - b.n 8c3f4 │ │ + b.n 8c460 │ │ ldrd r6, r0, [r1] │ │ movs r4, #0 │ │ ldrd r3, r2, [r1, #8] │ │ str r4, [r1, #0] │ │ lsls r1, r6, #31 │ │ - beq.n 8c40e │ │ - cbnz r0, 8c398 │ │ + beq.n 8c47a │ │ + cbnz r0, 8c404 │ │ mov r0, r3 │ │ - cbz r2, 8c398 │ │ + cbz r2, 8c404 │ │ ldr.w r0, [r0, #272] @ 0x110 │ │ subs r2, #1 │ │ - bne.n 8c390 │ │ + bne.n 8c3fc │ │ ldr.w r1, [r0, #264] @ 0x108 │ │ - cbz r1, 8c406 │ │ + cbz r1, 8c472 │ │ mov r5, r1 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr.w r1, [r5, #264] @ 0x108 │ │ mov r0, r5 │ │ cmp r1, #0 │ │ - bne.n 8c39e │ │ - b.n 8c408 │ │ + bne.n 8c40a │ │ + b.n 8c474 │ │ ldrd r0, r2, [r1, #8] │ │ - cbz r2, 8c3be │ │ + cbz r2, 8c42a │ │ ldr.w r0, [r0, #272] @ 0x110 │ │ subs r2, #1 │ │ - bne.n 8c3b6 │ │ + bne.n 8c422 │ │ movs r2, #1 │ │ movs r6, #0 │ │ movs r5, #0 │ │ str r2, [r1, #0] │ │ ldrh.w r2, [r0, #270] @ 0x10e │ │ cmp r6, r2 │ │ - bcc.n 8c35c │ │ + bcc.n 8c3c8 │ │ mov r9, r1 │ │ ldr.w r4, [r0, #264] @ 0x108 │ │ - cbz r4, 8c418 │ │ + cbz r4, 8c484 │ │ ldrh.w r6, [r0, #268] @ 0x10c │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrh.w r0, [r4, #270] @ 0x10e │ │ adds r5, #1 │ │ cmp r6, r0 │ │ mov r0, r4 │ │ - bcs.n 8c3d0 │ │ + bcs.n 8c43c │ │ mov r1, r9 │ │ cmp r5, #0 │ │ - bne.n 8c362 │ │ + bne.n 8c3ce │ │ adds r2, r6, #1 │ │ mov r0, r4 │ │ movs r3, #0 │ │ str r2, [r1, #12] │ │ strd r0, r3, [r1, #4] │ │ stmia.w r8, {r4, r5, r6} │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r5, r0 │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ str.w r4, [r8] │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - blx d87c0 │ │ - ldr r0, [pc, #16] @ (8c430 ) │ │ + blx d87d0 │ │ + ldr r0, [pc, #16] @ (8c49c ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ udf #254 @ 0xfe │ │ - ldr r0, [pc, #12] @ (8c434 ) │ │ + ldr r0, [pc, #12] @ (8c4a0 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ udf #254 @ 0xfe │ │ - ldr??.w r0, [lr, r4] │ │ - vst1.8 {d0[0]}, [r4], r4 │ │ + vld4.8 {d0-d3}, [r2], r4 │ │ + vld4.8 {d0-d3}, [r8], r4 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #16 │ │ add r6, sp, #4 │ │ mov r4, r0 │ │ mov r0, r6 │ │ mov r1, r4 │ │ - bl 8c334 │ │ + bl 8c3a0 │ │ ldr r0, [sp, #4] │ │ - cbz r0, 8c484 │ │ + cbz r0, 8c4f0 │ │ ldr r1, [sp, #12] │ │ lsls r2, r1, #4 │ │ ldrb r2, [r0, r2] │ │ cmp r2, #82 @ 0x52 │ │ - bne.n 8c446 │ │ + bne.n 8c4b2 │ │ add.w r0, r0, r1, lsl #4 │ │ ldr r1, [r0, #4] │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r5, r3, [r1] │ │ cmp r5, #0 │ │ - bne.n 8c466 │ │ + bne.n 8c4d2 │ │ cmp r2, #1 │ │ - bne.n 8c446 │ │ + bne.n 8c4b2 │ │ dmb ish │ │ ldr r0, [r0, #4] │ │ - bl 801a6 │ │ - b.n 8c446 │ │ + bl 8020e │ │ + b.n 8c4b2 │ │ add sp, #16 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ @@ -151042,584 +150957,584 @@ │ │ strd r5, r5, [sp] │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 77834 │ │ + bl 7789c │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ - bmi.n 8c472 │ │ + bl 3e2ac │ │ + bmi.n 8c4de │ │ ldrb r1, [r0, #0] │ │ cmp r1, #83 @ 0x53 │ │ itttt eq │ │ moveq r1, #0 │ │ streq r1, [r0, #4] │ │ moveq r1, #82 @ 0x52 │ │ strbeq r1, [r0, #0] │ │ it eq │ │ bxeq lr │ │ push {r7, lr} │ │ mov r7, sp │ │ movs r0, #82 @ 0x52 │ │ movs r1, #0 │ │ - bl 8c554 │ │ - ldr r0, [pc, #12] @ (8c4f4 ) │ │ + bl 8c5c0 │ │ + ldr r0, [pc, #12] @ (8c560 ) │ │ movs r1, #29 │ │ - ldr r2, [pc, #12] @ (8c4f8 ) │ │ + ldr r2, [pc, #12] @ (8c564 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ - ldmia r2, {r2, r3, r4, r6} │ │ - vqshrun.s64 d31, q15, #8 │ │ + bl 3fd60 │ │ + ldmia r1!, {r4, r5, r6, r7} │ │ + vqneg.s32 , q9 │ │ movs r4, r0 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ mov r3, r1 │ │ ldr r1, [r1, #4] │ │ ldrb.w ip, [r3] │ │ ldrb r2, [r0, #0] │ │ cmp r2, #83 @ 0x53 │ │ - bne.n 8c530 │ │ + bne.n 8c59c │ │ ldrh.w r2, [r3, #1] │ │ ldrb.w lr, [r3, #3] │ │ strb.w ip, [r0] │ │ add.w ip, r0, #4 │ │ ldrd r3, r4, [r3, #8] │ │ stmia.w ip, {r1, r3, r4} │ │ strh.w r2, [r0, #1] │ │ strb.w lr, [r0, #3] │ │ pop {r4, r6, r7, pc} │ │ cmp.w ip, #83 @ 0x53 │ │ it eq │ │ popeq {r4, r6, r7, pc} │ │ mov r0, ip │ │ - bl 8c554 │ │ - ldr r0, [pc, #12] @ (8c54c ) │ │ + bl 8c5c0 │ │ + ldr r0, [pc, #12] @ (8c5b8 ) │ │ movs r1, #29 │ │ - ldr r2, [pc, #12] @ (8c550 ) │ │ + ldr r2, [pc, #12] @ (8c5bc ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ - ldmia r2, {r2} │ │ - vqneg.s32 , q11 │ │ + bl 3fd60 │ │ + ldmia r1!, {r3, r4, r7} │ │ + vqneg.s32 d31, d10 │ │ movs r4, r0 │ │ - b.w 8025a │ │ + b.w 802c2 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ mov r4, r0 │ │ ldr r0, [r0, #4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r9, r4, [r4, #8] │ │ adds r6, r4, #1 │ │ mov r0, r9 │ │ subs r6, #1 │ │ - beq.n 8c586 │ │ + beq.n 8c5f2 │ │ add.w r5, r0, #352 @ 0x160 │ │ - bl 8c728 │ │ + bl 8c794 │ │ mov r0, r5 │ │ - b.n 8c576 │ │ - cbz r4, 8c596 │ │ + b.n 8c5e2 │ │ + cbz r4, 8c602 │ │ mov r0, r9 │ │ ldmia.w sp!, {r8, r9, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r8, r0 │ │ subs r6, #1 │ │ - beq.n 8c5b0 │ │ + beq.n 8c61c │ │ mov r0, r5 │ │ add.w r4, r5, #352 @ 0x160 │ │ - bl 8c728 │ │ + bl 8c794 │ │ mov r5, r4 │ │ - b.n 8c59e │ │ + b.n 8c60a │ │ mov r0, r9 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r8 │ │ - blx d6dd0 │ │ - bl 416fe │ │ + blx d6de0 │ │ + bl 41a06 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ cmp r1, #0 │ │ - beq.n 8c66e │ │ + beq.n 8c6da │ │ add.w r5, r0, #288 @ 0x120 │ │ mov r9, r1 │ │ mov r8, r0 │ │ mov.w sl, #0 │ │ mov r6, r1 │ │ - b.n 8c5e6 │ │ + b.n 8c652 │ │ subs r6, #1 │ │ add.w r5, r5, #288 @ 0x120 │ │ cmp sl, r9 │ │ - beq.n 8c660 │ │ + beq.n 8c6cc │ │ add.w r0, sl, sl, lsl #3 │ │ add.w sl, sl, #1 │ │ add.w r4, r8, r0, lsl #5 │ │ ldr.w r0, [r4, #256] @ 0x100 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 8c5fa │ │ + bne.n 8c666 │ │ cmp r1, #1 │ │ - bne.n 8c618 │ │ + bne.n 8c684 │ │ dmb ish │ │ ldr.w r0, [r4, #256] @ 0x100 │ │ - bl 801a6 │ │ + bl 8020e │ │ ldrd r0, r1, [r4, #16] │ │ eor.w r0, r0, #47 @ 0x2f │ │ orrs r0, r1 │ │ - beq.n 8c5dc │ │ + beq.n 8c648 │ │ ldr r0, [r4, #112] @ 0x70 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #116] @ 0x74 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r4, #124] @ 0x7c │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r4, #128] @ 0x80 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [r4, #136] @ 0x88 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r4, #140] @ 0x8c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [r4, #148] @ 0x94 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r4, #152] @ 0x98 │ │ - blxne d87c0 │ │ - b.n 8c5dc │ │ + blxne d87d0 │ │ + b.n 8c648 │ │ mov r0, r8 │ │ ldmia.w sp!, {r8, r9, sl} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r9, r0 │ │ add.w r0, r4, #16 │ │ - bl 8020e │ │ + bl 80276 │ │ subs r6, #1 │ │ - beq.n 8c690 │ │ + beq.n 8c6fc │ │ mov r0, r5 │ │ add.w r4, r5, #288 @ 0x120 │ │ - bl 8c6a0 │ │ + bl 8c70c │ │ mov r5, r4 │ │ - b.n 8c67e │ │ + b.n 8c6ea │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r9 │ │ - blx d6dd0 │ │ - bl 416fe │ │ + blx d6de0 │ │ + bl 41a06 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ ldr.w r0, [r0, #256] @ 0x100 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 8c6ae │ │ + bne.n 8c71a │ │ cmp r1, #1 │ │ - bne.n 8c6cc │ │ + bne.n 8c738 │ │ dmb ish │ │ ldr.w r0, [r4, #256] @ 0x100 │ │ - bl 801a6 │ │ + bl 8020e │ │ ldrd r0, r1, [r4, #16] │ │ eor.w r0, r0, #47 @ 0x2f │ │ orrs r0, r1 │ │ it eq │ │ popeq {r4, r5, r7, pc} │ │ ldr r0, [r4, #112] @ 0x70 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #116] @ 0x74 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r4, #124] @ 0x7c │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r4, #128] @ 0x80 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [r4, #136] @ 0x88 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r4, #140] @ 0x8c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [r4, #148] @ 0x94 │ │ - cbz r0, 8c716 │ │ + cbz r0, 8c782 │ │ ldr.w r0, [r4, #152] @ 0x98 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ pop {r4, r5, r7, pc} │ │ mov r5, r0 │ │ add.w r0, r4, #16 │ │ - bl 8020e │ │ + bl 80276 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ mov r4, r0 │ │ ldr.w r0, [r0, #256] @ 0x100 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 8c73a │ │ + bne.n 8c7a6 │ │ cmp r1, #1 │ │ - bne.n 8c758 │ │ + bne.n 8c7c4 │ │ dmb ish │ │ ldr.w r0, [r4, #256] @ 0x100 │ │ - bl 801a6 │ │ + bl 8020e │ │ ldrd r0, r1, [r4, #16] │ │ eor.w r0, r0, #47 @ 0x2f │ │ orrs r0, r1 │ │ - beq.n 8c79e │ │ + beq.n 8c80a │ │ ldr r0, [r4, #112] @ 0x70 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #116] @ 0x74 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r4, #124] @ 0x7c │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r4, #128] @ 0x80 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [r4, #136] @ 0x88 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r4, #140] @ 0x8c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [r4, #148] @ 0x94 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r4, #152] @ 0x98 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [r4, #280] @ 0x118 │ │ cmp r0, #2 │ │ - beq.n 8c7f8 │ │ - cbnz r0, 8c7f8 │ │ + beq.n 8c864 │ │ + cbnz r0, 8c864 │ │ ldr.w r6, [r4, #288] @ 0x120 │ │ - cbz r6, 8c7d0 │ │ + cbz r6, 8c83c │ │ ldr.w r8, [r4, #284] @ 0x11c │ │ add.w r5, r8, #4 │ │ ldr.w r0, [r5, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #12 │ │ subs r6, #1 │ │ - bne.n 8c7b6 │ │ + bne.n 8c822 │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr.w r6, [r4, #296] @ 0x128 │ │ - cbz r6, 8c7f8 │ │ + cbz r6, 8c864 │ │ ldr.w r8, [r4, #292] @ 0x124 │ │ add.w r5, r8, #4 │ │ ldr r0, [r5, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r5, #-4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #24 │ │ subs r6, #1 │ │ - bne.n 8c7de │ │ + bne.n 8c84a │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr.w r0, [r4, #304] @ 0x130 │ │ cmp r0, #2 │ │ - beq.n 8c802 │ │ - cbz r0, 8c810 │ │ + beq.n 8c86e │ │ + cbz r0, 8c87c │ │ ldrb.w r0, [r4, #328] @ 0x148 │ │ cmp r0, #83 @ 0x53 │ │ - bne.n 8c868 │ │ + bne.n 8c8d4 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ ldr.w r6, [r4, #312] @ 0x138 │ │ - cbz r6, 8c850 │ │ + cbz r6, 8c8bc │ │ ldr.w r8, [r4, #308] @ 0x134 │ │ add.w r5, r8, #8 │ │ - b.n 8c826 │ │ + b.n 8c892 │ │ adds r5, #40 @ 0x28 │ │ subs r6, #1 │ │ - beq.n 8c84a │ │ + beq.n 8c8b6 │ │ ldr.w r0, [r5, #-8] │ │ cmp r0, #0 │ │ - bne.n 8c820 │ │ + bne.n 8c88c │ │ ldr r0, [r5, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r5, #-4] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r5, #8] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r5, #4] │ │ - blxne d87c0 │ │ - b.n 8c820 │ │ + blxne d87d0 │ │ + b.n 8c88c │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr.w r0, [r4, #320] @ 0x140 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r4, #316] @ 0x13c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrb.w r0, [r4, #328] @ 0x148 │ │ cmp r0, #83 @ 0x53 │ │ - beq.n 8c80a │ │ + beq.n 8c876 │ │ ldr.w r1, [r4, #332] @ 0x14c │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 8025a │ │ + b.w 802c2 │ │ mov r5, r0 │ │ add.w r0, r4, #16 │ │ - bl 8020e │ │ + bl 80276 │ │ ldr.w r0, [r4, #280] @ 0x118 │ │ cmp r0, #2 │ │ itt ne │ │ addne.w r0, r4, #280 @ 0x118 │ │ - blne 82ad2 │ │ + blne 82b3a │ │ ldr.w r0, [r4, #304] @ 0x130 │ │ cmp r0, #2 │ │ itt ne │ │ addne.w r0, r4, #304 @ 0x130 │ │ - blne 8a106 │ │ + blne 8a170 │ │ ldrb.w r0, [r4, #328] @ 0x148 │ │ cmp r0, #83 @ 0x53 │ │ - beq.n 8c8b2 │ │ + beq.n 8c91e │ │ ldr.w r1, [r4, #332] @ 0x14c │ │ - bl 8025a │ │ + bl 802c2 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ - bl 416fe │ │ + blx d6de0 │ │ + bl 41a06 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #28 │ │ ldr r1, [r0, #12] │ │ mov.w ip, #0 │ │ cmp r1, #0 │ │ - beq.w 8c9d8 │ │ + beq.w 8ca44 │ │ ldr r2, [r0, #0] │ │ ldr.w lr, [r0, #8] │ │ str r2, [sp, #0] │ │ ldr r2, [r0, #4] │ │ add.w r0, r1, r1, lsl #2 │ │ str r2, [sp, #4] │ │ add.w r0, lr, r0, lsl #3 │ │ str r0, [sp, #8] │ │ - b.n 8c902 │ │ + b.n 8c96e │ │ ldr.w r0, [lr, #16] │ │ ldr r1, [sp, #4] │ │ subs r1, r1, r0 │ │ it cs │ │ cmpcs r1, fp │ │ - bcs.n 8c92a │ │ + bcs.n 8c996 │ │ add.w lr, lr, #40 @ 0x28 │ │ ldr r0, [sp, #8] │ │ cmp lr, r0 │ │ - beq.n 8c9d4 │ │ + beq.n 8ca40 │ │ ldr.w r0, [lr, #4] │ │ cmp r0, #7 │ │ - bne.n 8c8f8 │ │ + bne.n 8c964 │ │ ldr.w fp, [lr, #20] │ │ cmp.w fp, #0 │ │ - bne.n 8c8ea │ │ + bne.n 8c956 │ │ mov.w r8, #1 │ │ ldr.w r0, [lr, #32] │ │ cmp r0, #5 │ │ - bcs.n 8c938 │ │ + bcs.n 8c9a4 │ │ movs r0, #4 │ │ cmp.w fp, #12 │ │ - bcc.n 8c8f8 │ │ - b.n 8c944 │ │ + bcc.n 8c964 │ │ + b.n 8c9b0 │ │ ldr r1, [sp, #0] │ │ add.w r8, r1, r0 │ │ ldr.w r0, [lr, #32] │ │ cmp r0, #5 │ │ - bcc.n 8c920 │ │ + bcc.n 8c98c │ │ cmp r0, #8 │ │ - bne.n 8c8f8 │ │ + bne.n 8c964 │ │ movs r0, #8 │ │ cmp.w fp, #12 │ │ - bcc.n 8c8f8 │ │ + bcc.n 8c964 │ │ negs r3, r0 │ │ subs r1, r0, #1 │ │ adds r0, #11 │ │ str r1, [sp, #16] │ │ str r0, [sp, #20] │ │ str r3, [sp, #12] │ │ mov r0, r8 │ │ sub.w r2, fp, #12 │ │ ldr.w r1, [r0], #12 │ │ cmp r1, r2 │ │ - bhi.n 8c8f8 │ │ + bhi.n 8c964 │ │ ldr r2, [sp, #20] │ │ add r2, r1 │ │ and.w r9, r2, r3 │ │ subs.w r2, fp, r9 │ │ - bcc.n 8c8f8 │ │ + bcc.n 8c964 │ │ ldr.w r5, [r8, #4] │ │ cmp r5, r2 │ │ - bhi.n 8c8f8 │ │ + bhi.n 8c964 │ │ ldr r2, [sp, #16] │ │ add r2, r9 │ │ add r2, r5 │ │ and.w sl, r2, r3 │ │ subs.w r4, fp, sl │ │ add.w r2, r8, sl │ │ it cc │ │ movcc r4, ip │ │ it cc │ │ movcc r2, #1 │ │ str r2, [sp, #24] │ │ add.w r2, r8, #11 │ │ - cbz r1, 8c9c2 │ │ + cbz r1, 8ca2e │ │ ldrb r6, [r2, r1] │ │ mov r3, r1 │ │ subs r1, #1 │ │ cmp r6, #0 │ │ - beq.n 8c994 │ │ + beq.n 8ca00 │ │ cmp r3, #3 │ │ - bne.n 8c9c2 │ │ - ldr r1, [pc, #68] @ (8c9ec ) │ │ + bne.n 8ca2e │ │ + ldr r1, [pc, #68] @ (8ca58 ) │ │ movs r2, #3 │ │ mov r6, lr │ │ add r1, pc │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ mov lr, r6 │ │ mov.w ip, #0 │ │ itt eq │ │ ldreq.w r0, [r8, #8] │ │ cmpeq r0, #3 │ │ - beq.n 8c9e4 │ │ + beq.n 8ca50 │ │ ldr r3, [sp, #12] │ │ cmp fp, sl │ │ - bls.n 8c8f8 │ │ + bls.n 8c964 │ │ ldr.w r8, [sp, #24] │ │ mov fp, r4 │ │ cmp r4, #12 │ │ - bcs.n 8c950 │ │ - b.n 8c8f8 │ │ + bcs.n 8c9bc │ │ + b.n 8c964 │ │ mov.w ip, #0 │ │ mov r0, ip │ │ mov r1, r5 │ │ add sp, #28 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ add.w ip, r8, r9 │ │ - b.n 8c9d8 │ │ + b.n 8ca44 │ │ nop │ │ - pop {r0, r2, r3, r5, r6, pc} │ │ + pop {r0, pc} │ │ vsli.64 , q8, #56 @ 0x38 │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #16 │ │ mov r5, r0 │ │ mov r0, sp │ │ - bl 3edda │ │ + bl 3f0e2 │ │ ldr r0, [sp, #0] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.n 8ca38 │ │ + bne.n 8caa4 │ │ ldrd r8, sl, [sp, #4] │ │ movs r1, #0 │ │ movs r6, #0 │ │ mov r0, r8 │ │ - blx d89f0 │ │ - cbz r0, 8ca52 │ │ + blx d8a00 │ │ + cbz r0, 8cabe │ │ mov r4, r0 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r6, r0 │ │ - cbz r0, 8ca76 │ │ + cbz r0, 8cae2 │ │ mov r0, r6 │ │ - blx d87f0 │ │ + blx d8810 │ │ mov r9, r0 │ │ - cbnz r0, 8ca7a │ │ + cbnz r0, 8cae6 │ │ movs r0, #1 │ │ mov r1, r6 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ udf #254 @ 0xfe │ │ - ldr r1, [pc, #140] @ (8cac8 ) │ │ + ldr r1, [pc, #140] @ (8cb34 ) │ │ mov.w r2, #2147483648 @ 0x80000000 │ │ add r1, pc │ │ ldrd r1, r3, [r1] │ │ str r3, [r5, #8] │ │ strd r2, r1, [r5] │ │ - cbz r0, 8ca6e │ │ + cbz r0, 8cada │ │ ldr.w r8, [sp, #4] │ │ - b.n 8ca9c │ │ - blx d8850 │ │ + b.n 8cb08 │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ strb r6, [r5, #4] │ │ str r1, [r5, #0] │ │ str r0, [r5, #8] │ │ movs r0, #0 │ │ cmp.w sl, #0 │ │ strb.w r0, [r8] │ │ - bne.n 8ca9c │ │ + bne.n 8cb08 │ │ add sp, #16 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ mov.w r9, #1 │ │ mov r0, r9 │ │ mov r1, r4 │ │ mov r2, r6 │ │ - bl d53c6 │ │ + bl d52ea │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ strd r6, r9, [r5] │ │ str r6, [r5, #8] │ │ movs r0, #0 │ │ cmp.w sl, #0 │ │ strb.w r0, [r8] │ │ - beq.n 8ca6e │ │ + beq.n 8cada │ │ mov r0, r8 │ │ add sp, #16 │ │ ldmia.w sp!, {r8, r9, sl} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ mov r4, r0 │ │ movs r0, #0 │ │ cmp.w sl, #0 │ │ strb.w r0, [r8] │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ nop │ │ - sbc.w r0, r6, #4 │ │ + add.w r0, sl, #4 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #36 @ 0x24 │ │ ldrb r6, [r1, #28] │ │ cmp r6, #3 │ │ - bne.n 8cae8 │ │ + bne.n 8cb54 │ │ movs r3, #10 │ │ strb r3, [r0, #0] │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrb r4, [r1, #29] │ │ mvn.w r3, #2 │ │ @@ -151634,805 +151549,805 @@ │ │ movhi r2, #1 │ │ cmp r6, #1 │ │ mov.w r3, r3, lsr #5 │ │ orr.w r2, r2, r3 │ │ add r3, sp, #4 │ │ mov.w r6, r5, lsl #31 │ │ add.w r8, r3, #4 │ │ - bhi.n 8cb86 │ │ + bhi.n 8cbf2 │ │ cmp r6, #0 │ │ - beq.n 8cc18 │ │ + beq.n 8cc84 │ │ cmp r2, #0 │ │ - bne.n 8cadc │ │ + bne.n 8cb48 │ │ add r4, sp, #4 │ │ cmp.w ip, #1 │ │ - beq.w 8cd2e │ │ + beq.w 8cd9a │ │ cmp.w ip, #2 │ │ - bne.w 8cdea │ │ + bne.w 8ce56 │ │ cmp.w r9, #1 │ │ - bhi.n 8cb48 │ │ + bhi.n 8cbb4 │ │ mov.w ip, #1 │ │ strb.w ip, [r1, #29] │ │ - b.n 8cb28 │ │ + b.n 8cb94 │ │ mov r5, r0 │ │ mov r0, r4 │ │ mov fp, r1 │ │ - bl 8e1c4 │ │ + bl 8e230 │ │ mov r3, r8 │ │ mov r0, r5 │ │ ldr.w ip, [sp, #4] │ │ mov lr, r5 │ │ ldmia r3!, {r1, r5, r6} │ │ stmia.w lr!, {r1, r5, r6} │ │ ldmia.w r3, {r1, r2, r5, r6} │ │ stmia.w lr, {r1, r2, r5, r6} │ │ subs.w r2, r9, ip │ │ - bcc.w 8cddc │ │ + bcc.w 8ce48 │ │ ldrb r3, [r0, #0] │ │ mov r1, fp │ │ mov.w ip, #2 │ │ mov r9, r2 │ │ cmp r3, #10 │ │ str.w r2, [fp, #4] │ │ - beq.n 8cb28 │ │ - b.n 8cae0 │ │ + beq.n 8cb94 │ │ + b.n 8cb4c │ │ cmp r6, #0 │ │ - beq.w 8cca6 │ │ + beq.w 8cd12 │ │ cmp r2, #0 │ │ - bne.n 8cadc │ │ + bne.n 8cb48 │ │ cmp.w ip, #1 │ │ - beq.w 8cd2e │ │ + beq.w 8cd9a │ │ cmp.w ip, #2 │ │ - bne.w 8cdea │ │ + bne.w 8ce56 │ │ cmp.w r9, #0 │ │ - beq.w 8cd68 │ │ + beq.w 8cdd4 │ │ add r2, sp, #4 │ │ str r0, [sp, #0] │ │ mov fp, r1 │ │ mov r0, r2 │ │ - bl 8e1c4 │ │ + bl 8e230 │ │ ldrd r0, ip, [sp] │ │ mov r3, r8 │ │ ldmia r3!, {r1, r4, r5} │ │ subs.w sl, r9, ip │ │ mov r2, r0 │ │ stmia r2!, {r1, r4, r5} │ │ ldmia.w r3, {r1, r4, r5, r6} │ │ stmia r2!, {r1, r4, r5, r6} │ │ - bcc.w 8ce06 │ │ + bcc.w 8ce72 │ │ ldrb r2, [r0, #0] │ │ str.w sl, [fp, #4] │ │ cmp r2, #10 │ │ - bne.w 8cae0 │ │ + bne.w 8cb4c │ │ add.w r9, sp, #4 │ │ mov r1, fp │ │ cmp.w sl, #0 │ │ - beq.w 8cd68 │ │ + beq.w 8cdd4 │ │ mov r0, r9 │ │ - bl 8e1c4 │ │ + bl 8e230 │ │ ldrd r0, ip, [sp] │ │ mov r3, r8 │ │ ldmia r3!, {r1, r5, r6} │ │ mov r2, r0 │ │ stmia r2!, {r1, r5, r6} │ │ ldmia.w r3, {r1, r4, r5, r6} │ │ stmia r2!, {r1, r4, r5, r6} │ │ subs.w r2, sl, ip │ │ - bcc.w 8cdd6 │ │ + bcc.w 8ce42 │ │ ldrb r3, [r0, #0] │ │ mov r1, fp │ │ mov sl, r2 │ │ str.w r2, [fp, #4] │ │ cmp r3, #10 │ │ - beq.n 8cbe0 │ │ - b.n 8cae0 │ │ + beq.n 8cc4c │ │ + b.n 8cb4c │ │ cmp r2, #0 │ │ - bne.w 8cadc │ │ + bne.w 8cb48 │ │ add.w sl, sp, #4 │ │ cmp.w ip, #1 │ │ - beq.w 8cd4a │ │ + beq.w 8cdb6 │ │ cmp.w ip, #2 │ │ - bne.w 8cdea │ │ + bne.w 8ce56 │ │ mov r2, r9 │ │ cmp.w r9, #0 │ │ - beq.n 8cc60 │ │ + beq.n 8cccc │ │ cmp.w r9, #1 │ │ - bne.n 8cc4a │ │ + bne.n 8ccb6 │ │ ldrb.w r2, [fp] │ │ cmp r2, #46 @ 0x2e │ │ - beq.n 8cc5a │ │ - b.n 8cc5e │ │ + beq.n 8ccc6 │ │ + b.n 8ccca │ │ ldrb.w r2, [fp] │ │ cmp r2, #46 @ 0x2e │ │ - bne.n 8cc5e │ │ + bne.n 8ccca │ │ ldrb.w r2, [fp, #1] │ │ cmp r2, #47 @ 0x2f │ │ - bne.n 8cc5e │ │ + bne.n 8ccca │ │ movs r2, #1 │ │ - b.n 8cc60 │ │ + b.n 8cccc │ │ movs r2, #0 │ │ cmp r9, r2 │ │ - bhi.n 8cc6e │ │ + bhi.n 8ccda │ │ mov.w ip, #1 │ │ strb.w ip, [r1, #29] │ │ - b.n 8cc22 │ │ + b.n 8cc8e │ │ mov r4, r0 │ │ mov r0, sl │ │ str r1, [sp, #0] │ │ - bl 8e1c4 │ │ + bl 8e230 │ │ mov r3, r8 │ │ mov r0, r4 │ │ ldr.w ip, [sp, #4] │ │ mov r2, r4 │ │ ldmia r3!, {r1, r4, r5} │ │ stmia r2!, {r1, r4, r5} │ │ ldmia.w r3, {r1, r4, r5, r6} │ │ stmia r2!, {r1, r4, r5, r6} │ │ subs.w r2, r9, ip │ │ - bcc.w 8cddc │ │ + bcc.w 8ce48 │ │ ldr r1, [sp, #0] │ │ mov.w ip, #2 │ │ ldrb r3, [r0, #0] │ │ mov r9, r2 │ │ cmp r3, #10 │ │ str r2, [r1, #4] │ │ - beq.n 8cc22 │ │ - b.n 8cae0 │ │ + beq.n 8cc8e │ │ + b.n 8cb4c │ │ cmp r2, #0 │ │ - bne.w 8cadc │ │ + bne.w 8cb48 │ │ cmp.w ip, #1 │ │ - beq.n 8cd6e │ │ + beq.n 8cdda │ │ cmp.w ip, #2 │ │ - bne.w 8cdea │ │ + bne.w 8ce56 │ │ cmp.w r9, #0 │ │ - beq.n 8cd68 │ │ + beq.n 8cdd4 │ │ add r2, sp, #4 │ │ str r0, [sp, #0] │ │ mov fp, r1 │ │ mov sl, r8 │ │ mov r0, r2 │ │ - bl 8e1c4 │ │ + bl 8e230 │ │ ldrd r0, ip, [sp] │ │ mov r3, r8 │ │ ldmia r3!, {r1, r5, r6} │ │ subs.w r8, r9, ip │ │ mov r2, r0 │ │ stmia r2!, {r1, r5, r6} │ │ ldmia.w r3, {r1, r4, r5, r6} │ │ stmia r2!, {r1, r4, r5, r6} │ │ - bcc.w 8ce0a │ │ + bcc.w 8ce76 │ │ ldrb r2, [r0, #0] │ │ str.w r8, [fp, #4] │ │ cmp r2, #10 │ │ - bne.w 8cae0 │ │ + bne.w 8cb4c │ │ mov r1, fp │ │ add.w r9, sp, #4 │ │ cmp.w r8, #0 │ │ - beq.n 8cd68 │ │ + beq.n 8cdd4 │ │ mov r0, r9 │ │ - bl 8e1c4 │ │ + bl 8e230 │ │ ldrd r0, ip, [sp] │ │ mov r3, sl │ │ ldmia r3!, {r1, r4, r5} │ │ mov r2, r0 │ │ stmia r2!, {r1, r4, r5} │ │ ldmia.w r3, {r1, r4, r5, r6} │ │ stmia r2!, {r1, r4, r5, r6} │ │ subs.w r2, r8, ip │ │ - bcc.n 8cdda │ │ + bcc.n 8ce46 │ │ ldrb r3, [r0, #0] │ │ mov r1, fp │ │ mov r8, r2 │ │ str.w r2, [fp, #4] │ │ cmp r3, #10 │ │ - beq.n 8ccfa │ │ - b.n 8cae0 │ │ + beq.n 8cd66 │ │ + b.n 8cb4c │ │ movs r2, #3 │ │ cmp.w r9, #0 │ │ strb r2, [r1, #29] │ │ sub.w r2, r9, #1 │ │ - beq.n 8cdf8 │ │ + beq.n 8ce64 │ │ movs r3, #6 │ │ str r2, [r1, #4] │ │ strb r3, [r0, #0] │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r2, #3 │ │ cmp.w r9, #0 │ │ strb r2, [r1, #29] │ │ - beq.w 8cadc │ │ + beq.w 8cb48 │ │ cmp.w r9, #1 │ │ - bne.n 8cd90 │ │ + bne.n 8cdfc │ │ ldrb.w r2, [fp] │ │ cmp r2, #46 @ 0x2e │ │ - bne.w 8cadc │ │ - b.n 8cda4 │ │ + bne.w 8cb48 │ │ + b.n 8ce10 │ │ movs r2, #1 │ │ strb r2, [r1, #29] │ │ - b.n 8cadc │ │ + b.n 8cb48 │ │ movs r2, #3 │ │ cmp.w r9, #0 │ │ strb r2, [r1, #29] │ │ - beq.w 8cadc │ │ + beq.w 8cb48 │ │ cmp.w r9, #1 │ │ - bne.n 8cdbc │ │ + bne.n 8ce28 │ │ ldrb.w r2, [fp] │ │ cmp r2, #46 @ 0x2e │ │ - bne.w 8cadc │ │ + bne.w 8cb48 │ │ mov.w r9, #1 │ │ - b.n 8cdce │ │ + b.n 8ce3a │ │ ldrb.w r2, [fp] │ │ cmp r2, #46 @ 0x2e │ │ - bne.w 8cadc │ │ + bne.w 8cb48 │ │ ldrb.w r2, [fp, #1] │ │ cmp r2, #47 @ 0x2f │ │ - bne.w 8cadc │ │ + bne.w 8cb48 │ │ sub.w r2, r9, #1 │ │ cmp.w r9, #0 │ │ - bne.n 8cdd2 │ │ - ldr r3, [pc, #96] @ (8ce10 ) │ │ + bne.n 8ce3e │ │ + ldr r3, [pc, #96] @ (8ce7c ) │ │ add r3, pc │ │ mov r1, r2 │ │ movs r0, #0 │ │ movs r2, #0 │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ ldrb.w r2, [fp] │ │ cmp r2, #46 @ 0x2e │ │ itt eq │ │ ldrbeq.w r2, [fp, #1] │ │ cmpeq r2, #47 @ 0x2f │ │ - bne.w 8cadc │ │ + bne.w 8cb48 │ │ sub.w r2, r9, #1 │ │ movs r3, #7 │ │ - b.n 8cd3e │ │ + b.n 8cdaa │ │ mov r9, sl │ │ - b.n 8cddc │ │ + b.n 8ce48 │ │ mov r9, r8 │ │ - ldr r3, [pc, #64] @ (8ce20 ) │ │ + ldr r3, [pc, #64] @ (8ce8c ) │ │ mov r1, r2 │ │ movs r0, #0 │ │ mov r2, r9 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #40] @ (8ce14 ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #40] @ (8ce80 ) │ │ movs r1, #40 @ 0x28 │ │ - ldr r2, [pc, #40] @ (8ce18 ) │ │ + ldr r2, [pc, #40] @ (8ce84 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r3, [pc, #32] @ (8ce1c ) │ │ + bl 3fd54 │ │ + ldr r3, [pc, #32] @ (8ce88 ) │ │ add r3, pc │ │ mov r1, r2 │ │ movs r0, #0 │ │ movs r2, #0 │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ mov r2, sl │ │ - b.n 8cddc │ │ + b.n 8ce48 │ │ mov r2, r8 │ │ - b.n 8cddc │ │ + b.n 8ce48 │ │ nop │ │ - @ instruction: 0xf1380004 │ │ - stmia r6!, {r0, r2, r3, r4, r6} │ │ - vrev16.32 d31, d22 │ │ + @ instruction: 0xf0dc0004 │ │ + stmia r5!, {r0, r4, r5, r6, r7} │ │ + vrev32.32 , q5 │ │ movs r4, r0 │ │ - @ instruction: 0xf0fe0004 │ │ - @ instruction: 0xf1240004 │ │ + @ instruction: 0xf0a20004 │ │ + @ instruction: 0xf0c80004 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #64 @ 0x40 │ │ ldrb.w sl, [r0, #8] │ │ mov r6, r0 │ │ ldrd r5, r4, [r0] │ │ cmp.w sl, #6 │ │ - beq.n 8ce4a │ │ + beq.n 8ceb6 │ │ add.w r1, r6, #9 │ │ add r0, sp, #32 │ │ movs r2, #19 │ │ - bl d53c6 │ │ + bl d52ea │ │ mov r0, sp │ │ add r1, sp, #32 │ │ adds r0, #9 │ │ movs r2, #19 │ │ ldrb.w r8, [r6, #28] │ │ ldrb.w r9, [r6, #29] │ │ ldrb r6, [r6, #30] │ │ strb.w sl, [sp, #8] │ │ strd r5, r4, [sp] │ │ - bl d53c6 │ │ + bl d52ea │ │ cmp.w r8, #2 │ │ strb.w r6, [sp, #30] │ │ strb.w r9, [sp, #29] │ │ strb.w r8, [sp, #28] │ │ - bne.n 8ceb4 │ │ + bne.n 8cf20 │ │ cmp r4, #0 │ │ - beq.n 8cf14 │ │ + beq.n 8cf80 │ │ movs r0, #0 │ │ ldrb r1, [r5, r0] │ │ cmp r1, #47 @ 0x2f │ │ - beq.n 8ce94 │ │ + beq.n 8cf00 │ │ adds r0, #1 │ │ cmp r4, r0 │ │ - bne.n 8ce80 │ │ + bne.n 8ceec │ │ movs r1, #0 │ │ mov r0, r4 │ │ - cbnz r0, 8ce98 │ │ - b.n 8cea2 │ │ + cbnz r0, 8cf04 │ │ + b.n 8cf0e │ │ movs r1, #1 │ │ - cbz r0, 8cea2 │ │ + cbz r0, 8cf0e │ │ cmp r0, #1 │ │ itt eq │ │ ldrbeq r2, [r5, #0] │ │ cmpeq r2, #46 @ 0x2e │ │ - bne.n 8ceb0 │ │ + bne.n 8cf1c │ │ add r0, r1 │ │ cmp r4, r0 │ │ - bcc.n 8cf86 │ │ + bcc.n 8cff2 │ │ add r5, r0 │ │ subs r4, r4, r0 │ │ - bne.n 8ce7e │ │ + bne.n 8ceea │ │ movs r4, #0 │ │ strd r5, r4, [sp] │ │ cmp.w r9, #2 │ │ - bne.n 8cf16 │ │ + bne.n 8cf82 │ │ cmp.w r8, #1 │ │ - bhi.n 8ceee │ │ - cbz r6, 8cf22 │ │ + bhi.n 8cf5a │ │ + cbz r6, 8cf8e │ │ cmp r4, #2 │ │ - bcc.n 8cf16 │ │ + bcc.n 8cf82 │ │ add.w r8, sp, #32 │ │ mov r6, sp │ │ mov r0, r8 │ │ mov r1, r6 │ │ - bl 8e1c4 │ │ + bl 8e230 │ │ ldrb.w r0, [sp, #36] @ 0x24 │ │ cmp r0, #10 │ │ - bne.n 8cf16 │ │ + bne.n 8cf82 │ │ ldr r0, [sp, #32] │ │ subs r1, r4, r0 │ │ - bcc.n 8cf7a │ │ + bcc.n 8cfe6 │ │ mov r4, r1 │ │ cmp r1, #1 │ │ str r1, [sp, #4] │ │ - bhi.n 8cecc │ │ + bhi.n 8cf38 │ │ mov r4, r1 │ │ - b.n 8cf16 │ │ - cbz r4, 8cf14 │ │ + b.n 8cf82 │ │ + cbz r4, 8cf80 │ │ add.w r8, sp, #32 │ │ mov r6, sp │ │ mov r0, r8 │ │ mov r1, r6 │ │ - bl 8e1c4 │ │ + bl 8e230 │ │ ldrb.w r0, [sp, #36] @ 0x24 │ │ cmp r0, #10 │ │ - bne.n 8cf16 │ │ + bne.n 8cf82 │ │ ldr r0, [sp, #32] │ │ subs r1, r4, r0 │ │ - bcc.n 8cf7a │ │ + bcc.n 8cfe6 │ │ mov r4, r1 │ │ cmp r1, #0 │ │ str r1, [sp, #4] │ │ - bne.n 8cef6 │ │ + bne.n 8cf62 │ │ movs r4, #0 │ │ mov r0, r5 │ │ mov r1, r4 │ │ add sp, #64 @ 0x40 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ add.w r8, sp, #32 │ │ mov r6, sp │ │ mov r0, r4 │ │ - cbz r4, 8cf54 │ │ + cbz r4, 8cfc0 │ │ cmp r4, #1 │ │ - bne.n 8cf3e │ │ + bne.n 8cfaa │ │ ldrb r0, [r5, #0] │ │ cmp r0, #46 @ 0x2e │ │ - bne.n 8cf4a │ │ + bne.n 8cfb6 │ │ movs r0, #1 │ │ cmp r4, r0 │ │ - bhi.n 8cf58 │ │ - b.n 8cf16 │ │ + bhi.n 8cfc4 │ │ + b.n 8cf82 │ │ ldrb r0, [r5, #0] │ │ cmp r0, #46 @ 0x2e │ │ - bne.n 8cf52 │ │ + bne.n 8cfbe │ │ ldrb r0, [r5, #1] │ │ cmp r0, #47 @ 0x2f │ │ - beq.n 8cf36 │ │ + beq.n 8cfa2 │ │ movs r0, #0 │ │ cmp r4, r0 │ │ - bhi.n 8cf58 │ │ - b.n 8cf16 │ │ + bhi.n 8cfc4 │ │ + b.n 8cf82 │ │ movs r0, #0 │ │ cmp r4, r0 │ │ - bls.n 8cf16 │ │ + bls.n 8cf82 │ │ mov r0, r8 │ │ mov r1, r6 │ │ - bl 8e1c4 │ │ + bl 8e230 │ │ ldrb.w r0, [sp, #36] @ 0x24 │ │ cmp r0, #10 │ │ - bne.n 8cf16 │ │ + bne.n 8cf82 │ │ ldr r0, [sp, #32] │ │ subs r1, r4, r0 │ │ - bcc.n 8cf7a │ │ + bcc.n 8cfe6 │ │ str r1, [sp, #4] │ │ mov r4, r1 │ │ mov r0, r4 │ │ cmp r4, #0 │ │ - bne.n 8cf2c │ │ - b.n 8cf54 │ │ - ldr r3, [pc, #28] @ (8cf98 ) │ │ + bne.n 8cf98 │ │ + b.n 8cfc0 │ │ + ldr r3, [pc, #28] @ (8d004 ) │ │ movs r0, #0 │ │ mov r2, r4 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #12] @ (8cf94 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #12] @ (8d000 ) │ │ mov r1, r4 │ │ mov r2, r4 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ nop │ │ - ldcl 0, cr0, [r8], #-16 │ │ - mrrc 0, 0, r0, r4, cr4 │ │ + ldc 0, cr0, [ip], {4} │ │ + @ instruction: 0xebf80004 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #252 @ 0xfc │ │ ldrd r8, r4, [r1] │ │ mov r6, r1 │ │ ldrd r9, fp, [r0] │ │ mov r5, r0 │ │ cmp fp, r4 │ │ - bne.n 8cfc6 │ │ + bne.n 8d032 │ │ ldrb r0, [r6, #28] │ │ ldrb r1, [r5, #28] │ │ cmp r1, r0 │ │ itt eq │ │ ldrbeq r0, [r5, #29] │ │ cmpeq r0, #2 │ │ - beq.w 8d0c8 │ │ + beq.w 8d134 │ │ strd r4, r8, [sp, #8] │ │ ldrb.w r8, [r5, #8] │ │ cmp.w r8, #6 │ │ - beq.n 8cfe0 │ │ + beq.n 8d04c │ │ add.w r1, r5, #9 │ │ add r0, sp, #16 │ │ movs r2, #19 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldrb r0, [r5, #28] │ │ ldrb r4, [r6, #8] │ │ str r0, [sp, #4] │ │ ldrb r0, [r5, #29] │ │ cmp r4, #6 │ │ ldrb r5, [r5, #30] │ │ str r0, [sp, #0] │ │ - beq.n 8cffc │ │ + beq.n 8d068 │ │ add.w r1, r6, #9 │ │ add r0, sp, #40 @ 0x28 │ │ movs r2, #19 │ │ - bl d53c6 │ │ + bl d52ea │ │ add r0, sp, #64 @ 0x40 │ │ add r1, sp, #16 │ │ adds r0, #9 │ │ movs r2, #19 │ │ ldrh.w sl, [r6, #28] │ │ ldrb r6, [r6, #30] │ │ strb.w r8, [sp, #72] @ 0x48 │ │ strd r9, fp, [sp, #64] @ 0x40 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r0, [sp, #0] │ │ add.w r8, sp, #96 @ 0x60 │ │ strb.w r0, [sp, #93] @ 0x5d │ │ add r1, sp, #40 @ 0x28 │ │ ldr r0, [sp, #4] │ │ movs r2, #19 │ │ strb.w r0, [sp, #92] @ 0x5c │ │ ldr r0, [sp, #8] │ │ str r0, [sp, #100] @ 0x64 │ │ ldr r0, [sp, #12] │ │ str r0, [sp, #96] @ 0x60 │ │ add.w r0, r8, #9 │ │ strb.w r5, [sp, #94] @ 0x5e │ │ strb.w r4, [sp, #104] @ 0x68 │ │ - bl d53c6 │ │ + bl d52ea │ │ strh.w sl, [sp, #124] @ 0x7c │ │ add.w sl, sp, #192 @ 0xc0 │ │ add.w r5, sl, #28 │ │ add.w r9, sp, #128 @ 0x80 │ │ add.w fp, sp, #160 @ 0xa0 │ │ strb.w r6, [sp, #126] @ 0x7e │ │ add r1, sp, #64 @ 0x40 │ │ mov r0, r9 │ │ - bl 8cacc │ │ + bl 8cb38 │ │ ldrb.w r0, [sp, #128] @ 0x80 │ │ cmp r0, #10 │ │ - beq.n 8d0ac │ │ + beq.n 8d118 │ │ mov r0, fp │ │ mov r1, r8 │ │ - bl 8cacc │ │ + bl 8cb38 │ │ ldrb.w r0, [sp, #160] @ 0xa0 │ │ cmp r0, #10 │ │ - beq.n 8d0a2 │ │ + beq.n 8d10e │ │ mov r1, r9 │ │ mov r0, sl │ │ ldmia r1!, {r2, r3, r6} │ │ stmia r0!, {r2, r3, r6} │ │ ldmia.w r1, {r2, r3, r4, r6} │ │ mov r1, r5 │ │ stmia r0!, {r2, r3, r4, r6} │ │ mov r0, fp │ │ ldmia r0!, {r2, r3, r6} │ │ stmia r1!, {r2, r3, r6} │ │ ldmia.w r0, {r2, r3, r4, r6} │ │ mov r0, sl │ │ stmia r1!, {r2, r3, r4, r6} │ │ mov r1, r5 │ │ - bl 8e0f8 │ │ + bl 8e164 │ │ cmp r0, #0 │ │ - bne.n 8d05a │ │ + bne.n 8d0c6 │ │ movs r0, #0 │ │ add sp, #252 @ 0xfc │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ add r0, sp, #192 @ 0xc0 │ │ add r1, sp, #96 @ 0x60 │ │ - bl 8cacc │ │ + bl 8cb38 │ │ ldrb.w r0, [sp, #192] @ 0xc0 │ │ subs r0, #10 │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ add sp, #252 @ 0xfc │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrb r0, [r6, #29] │ │ cmp r0, #2 │ │ - bne.w 8cfc6 │ │ + bne.w 8d032 │ │ mov r0, r9 │ │ mov r1, r8 │ │ mov r2, fp │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.w 8cfc6 │ │ + bne.w 8d032 │ │ movs r0, #1 │ │ add sp, #252 @ 0xfc │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - bmi.n 8d096 │ │ + bmi.n 8d102 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub.w sp, sp, #600 @ 0x258 │ │ mov r8, r1 │ │ mov r1, r0 │ │ mov.w r0, r8, lsr #7 │ │ cmp r0, #2 │ │ - bhi.w 8d298 │ │ + bhi.w 8d304 │ │ add r5, sp, #112 @ 0x70 │ │ mov r2, r8 │ │ mov r0, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #0 │ │ cmp.w r8, #7 │ │ strb.w r0, [r5, r8] │ │ - bcs.n 8d17c │ │ + bcs.n 8d1e8 │ │ ldrb.w r0, [sp, #112] @ 0x70 │ │ cmp r0, #0 │ │ - beq.n 8d1d6 │ │ + beq.n 8d242 │ │ cmp.w r8, #0 │ │ - beq.n 8d21a │ │ + beq.n 8d286 │ │ ldrb.w r0, [sp, #113] @ 0x71 │ │ cmp r0, #0 │ │ - beq.n 8d1de │ │ + beq.n 8d24a │ │ cmp.w r8, #1 │ │ - beq.n 8d21a │ │ + beq.n 8d286 │ │ ldrb.w r0, [sp, #114] @ 0x72 │ │ cmp r0, #0 │ │ - beq.n 8d1e2 │ │ + beq.n 8d24e │ │ cmp.w r8, #2 │ │ - beq.n 8d21a │ │ + beq.n 8d286 │ │ ldrb.w r0, [sp, #115] @ 0x73 │ │ cmp r0, #0 │ │ - beq.n 8d1e6 │ │ + beq.n 8d252 │ │ cmp.w r8, #3 │ │ - beq.n 8d21a │ │ + beq.n 8d286 │ │ ldrb.w r0, [sp, #116] @ 0x74 │ │ cmp r0, #0 │ │ - beq.n 8d1ea │ │ + beq.n 8d256 │ │ cmp.w r8, #4 │ │ - beq.n 8d21a │ │ + beq.n 8d286 │ │ ldrb.w r0, [sp, #117] @ 0x75 │ │ cmp r0, #0 │ │ - beq.n 8d1ee │ │ + beq.n 8d25a │ │ cmp.w r8, #5 │ │ - beq.n 8d21a │ │ + beq.n 8d286 │ │ ldrb.w r0, [sp, #118] @ 0x76 │ │ cmp r0, #0 │ │ - bne.n 8d21a │ │ + bne.n 8d286 │ │ movs r1, #6 │ │ - b.n 8d1f0 │ │ + b.n 8d25c │ │ cmp r5, r5 │ │ - bne.n 8d1ac │ │ + bne.n 8d218 │ │ sub.w r1, r8, #7 │ │ movw r2, #256 @ 0x100 │ │ movt r2, #257 @ 0x101 │ │ adds r6, r5, r0 │ │ ldr r3, [r5, r0] │ │ ldr r6, [r6, #4] │ │ subs r4, r2, r6 │ │ orrs r6, r4 │ │ subs r4, r2, r3 │ │ orrs r3, r4 │ │ ands r3, r6 │ │ mvns r3, r3 │ │ tst.w r3, #2155905152 @ 0x80808080 │ │ - bne.n 8d1be │ │ + bne.n 8d22a │ │ adds r0, #8 │ │ cmp r0, r1 │ │ - bls.n 8d18c │ │ - b.n 8d1be │ │ + bls.n 8d1f8 │ │ + b.n 8d22a │ │ movs r1, #0 │ │ ldrb r2, [r5, r1] │ │ - cbz r2, 8d1f0 │ │ + cbz r2, 8d25c │ │ adds r1, #1 │ │ - bne.n 8d1ae │ │ + bne.n 8d21a │ │ sub.w r1, r8, #7 │ │ cmp r1, #0 │ │ - bcs.n 8d184 │ │ + bcs.n 8d1f0 │ │ add.w r1, r8, #1 │ │ subs r1, r1, r0 │ │ - beq.n 8d21a │ │ + beq.n 8d286 │ │ adds r3, r5, r0 │ │ movs r2, #0 │ │ ldrb r6, [r3, r2] │ │ - cbz r6, 8d1da │ │ + cbz r6, 8d246 │ │ adds r2, #1 │ │ cmp r1, r2 │ │ - bne.n 8d1ca │ │ - b.n 8d21a │ │ + bne.n 8d236 │ │ + b.n 8d286 │ │ movs r1, #0 │ │ - b.n 8d1f0 │ │ + b.n 8d25c │ │ adds r1, r2, r0 │ │ - b.n 8d1f0 │ │ + b.n 8d25c │ │ movs r1, #1 │ │ - b.n 8d1f0 │ │ + b.n 8d25c │ │ movs r1, #2 │ │ - b.n 8d1f0 │ │ + b.n 8d25c │ │ movs r1, #3 │ │ - b.n 8d1f0 │ │ + b.n 8d25c │ │ movs r1, #4 │ │ - b.n 8d1f0 │ │ + b.n 8d25c │ │ movs r1, #5 │ │ cmp r1, r8 │ │ - bne.n 8d21a │ │ + bne.n 8d286 │ │ add r4, sp, #496 @ 0x1f0 │ │ movs r1, #104 @ 0x68 │ │ mov r0, r4 │ │ - bl d518e │ │ + bl d521e │ │ add r0, sp, #112 @ 0x70 │ │ mov r1, r4 │ │ - blx d8910 │ │ + blx d8920 │ │ adds r0, #1 │ │ - beq.n 8d286 │ │ + beq.n 8d2f2 │ │ mov r0, sp │ │ add r1, sp, #496 @ 0x1f0 │ │ adds r0, #8 │ │ movs r2, #104 @ 0x68 │ │ - bl d4c50 │ │ + bl d50a2 │ │ movs r0, #0 │ │ - b.n 8d228 │ │ - ldr r0, [pc, #164] @ (8d2c0 ) │ │ + b.n 8d294 │ │ + ldr r0, [pc, #164] @ (8d32c ) │ │ add r0, pc │ │ ldrd r0, r1, [r0] │ │ strd r0, r1, [sp, #4] │ │ movs r0, #1 │ │ - cbz r0, 8d236 │ │ + cbz r0, 8d2a2 │ │ ldrd r6, r8, [sp, #4] │ │ uxtb r4, r6 │ │ cmp r4, #3 │ │ - beq.n 8d24e │ │ - b.n 8d26c │ │ + beq.n 8d2ba │ │ + b.n 8d2d8 │ │ ldr r0, [sp, #24] │ │ movs r6, #4 │ │ and.w r0, r0, #61440 @ 0xf000 │ │ cmp.w r0, #32768 @ 0x8000 │ │ it eq │ │ moveq.w r6, #260 @ 0x104 │ │ uxtb r4, r6 │ │ cmp r4, #3 │ │ - bne.n 8d26c │ │ + bne.n 8d2d8 │ │ ldrd r9, r5, [r8] │ │ ldr r1, [r5, #0] │ │ - cbz r1, 8d25a │ │ + cbz r1, 8d2c6 │ │ mov r0, r9 │ │ blx r1 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r9 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ subs r1, r4, #4 │ │ and.w r0, r6, #256 @ 0x100 │ │ clz r1, r1 │ │ lsrs r1, r1, #5 │ │ and.w r0, r1, r0, lsr #8 │ │ add.w sp, sp, #600 @ 0x258 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - blx d8850 │ │ + blx d8860 │ │ movs r1, #0 │ │ ldr r0, [r0, #0] │ │ str r0, [sp, #8] │ │ movs r0, #1 │ │ strb.w r1, [sp, #4] │ │ - b.n 8d228 │ │ + b.n 8d294 │ │ mov r0, sp │ │ mov r2, r8 │ │ - bl 8e068 │ │ + bl 8e0d4 │ │ ldr r0, [sp, #0] │ │ - b.n 8d228 │ │ + b.n 8d294 │ │ mov r6, r0 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r9 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r6 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ nop │ │ - @ instruction: 0xe9880004 │ │ + stmdb ip!, {r2} │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ subw sp, sp, #1084 @ 0x43c │ │ ldrd sl, fp, [r3, #4] │ │ mov r4, r3 │ │ mov r6, r2 │ │ mov r9, r1 │ │ mov r5, r0 │ │ add r0, sp, #696 @ 0x2b8 │ │ mov r1, sl │ │ mov r2, fp │ │ - bl 7e240 │ │ + bl 7e2a8 │ │ ldr r0, [sp, #696] @ 0x2b8 │ │ cmp r0, #1 │ │ - bne.n 8d326 │ │ + bne.n 8d392 │ │ ldrd r1, r2, [sp, #700] @ 0x2bc │ │ movs r0, #0 │ │ movs r3, #4 │ │ str r0, [sp, #140] @ 0x8c │ │ str r3, [sp, #136] @ 0x88 │ │ strd r0, r0, [sp, #128] @ 0x80 │ │ strd r0, r3, [sp, #120] @ 0x78 │ │ add.w r8, sp, #696 @ 0x2b8 │ │ add r3, sp, #88 @ 0x58 │ │ stmia r3!, {r1, r2, r4} │ │ mov r0, r8 │ │ - bl 7b10c │ │ + bl 7b174 │ │ ldr r0, [sp, #760] @ 0x2f8 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.n 8d348 │ │ + bne.n 8d3b4 │ │ ldrd r9, r8, [sp, #88] @ 0x58 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ movs r4, #4 │ │ str.w r0, [r5, #288] @ 0x120 │ │ - b.n 8d7f6 │ │ + b.n 8d862 │ │ ldr r0, [r4, #0] │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ str.w r1, [r5, #288] @ 0x120 │ │ cmp r0, #0 │ │ - beq.w 8d838 │ │ + beq.w 8d8a4 │ │ mov r0, sl │ │ addw sp, sp, #1084 @ 0x43c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ str.w sl, [sp, #72] @ 0x48 │ │ add.w ip, r8, #40 @ 0x28 │ │ str r5, [sp, #52] @ 0x34 │ │ add r1, sp, #448 @ 0x1c0 │ │ strd r6, r0, [sp, #64] @ 0x40 │ │ mov.w sl, #2147483648 @ 0x80000000 │ │ ldr r0, [sp, #696] @ 0x2b8 │ │ @@ -152461,357 +152376,357 @@ │ │ ldr r0, [sp, #764] @ 0x2fc │ │ str r0, [sp, #56] @ 0x38 │ │ ldr r0, [sp, #768] @ 0x300 │ │ str r0, [sp, #44] @ 0x2c │ │ ldr r0, [sp, #772] @ 0x304 │ │ str r0, [sp, #40] @ 0x28 │ │ str.w r9, [sp, #60] @ 0x3c │ │ - beq.w 8d72c │ │ + beq.w 8d798 │ │ cmp.w r8, #0 │ │ - beq.w 8d72c │ │ + beq.w 8d798 │ │ add r0, sp, #120 @ 0x78 │ │ movs r5, #0 │ │ adds r0, #12 │ │ strd r0, r6, [sp, #20] │ │ - ldr r4, [pc, #844] @ (8d708 ) │ │ + ldr r4, [pc, #844] @ (8d774 ) │ │ add.w r0, r6, r6, lsl #2 │ │ ldr r6, [sp, #84] @ 0x54 │ │ add r4, pc │ │ mov.w r9, r0, lsl #3 │ │ - b.n 8d3ce │ │ + b.n 8d43a │ │ subs.w r9, r9, #40 @ 0x28 │ │ - beq.n 8d410 │ │ + beq.n 8d47c │ │ mov sl, r6 │ │ ldr.w r0, [r6], #40 │ │ ldr r1, [sp, #112] @ 0x70 │ │ adds r2, r1, r0 │ │ ldr r0, [sp, #116] @ 0x74 │ │ adcs.w r3, r0, #0 │ │ adcs.w r0, r5, #0 │ │ - bne.n 8d3c8 │ │ + bne.n 8d434 │ │ ldrd r1, r0, [sp, #104] @ 0x68 │ │ strd r1, r0, [sp] │ │ mov r0, r8 │ │ ldr r1, [sp, #100] @ 0x64 │ │ - bl 709c0 │ │ + bl 70a74 │ │ cmp r0, #0 │ │ - beq.n 8d3c8 │ │ + beq.n 8d434 │ │ cmp r1, #17 │ │ - bne.n 8d3c8 │ │ + bne.n 8d434 │ │ mov r1, r4 │ │ movs r2, #17 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - bne.n 8d3c8 │ │ + bne.n 8d434 │ │ ldr.w r0, [sl, #4] │ │ cmp r0, #8 │ │ - bne.n 8d418 │ │ + bne.n 8d484 │ │ mov.w sl, #2147483648 @ 0x80000000 │ │ ldr r6, [sp, #24] │ │ - b.n 8d72c │ │ + b.n 8d798 │ │ ldr.w r9, [sl, #20] │ │ ldr r6, [sp, #24] │ │ cmp.w r9, #0 │ │ - beq.w 8d728 │ │ + beq.w 8d794 │ │ ldr.w r0, [sl, #16] │ │ mov.w sl, #2147483648 @ 0x80000000 │ │ ldr r1, [sp, #80] @ 0x50 │ │ cmp r1, r0 │ │ - bcc.w 8d72c │ │ + bcc.w 8d798 │ │ subs r1, r1, r0 │ │ cmp r1, r9 │ │ - bcc.w 8d72c │ │ + bcc.w 8d798 │ │ ldr r1, [sp, #76] @ 0x4c │ │ movs r4, #0 │ │ adds r5, r1, r0 │ │ ldrb r0, [r5, r4] │ │ - cbz r0, 8d450 │ │ + cbz r0, 8d4bc │ │ adds r4, #1 │ │ cmp r9, r4 │ │ - bne.n 8d444 │ │ - b.n 8d72c │ │ - cbz r4, 8d480 │ │ + bne.n 8d4b0 │ │ + b.n 8d798 │ │ + cbz r4, 8d4ec │ │ ldrb r0, [r5, #0] │ │ cmp r0, #47 @ 0x2f │ │ - bne.n 8d480 │ │ + bne.n 8d4ec │ │ mov r0, r5 │ │ mov r1, r4 │ │ - bl 8d0ec │ │ + bl 8d158 │ │ cmp r0, #0 │ │ - beq.w 8d728 │ │ + beq.w 8d794 │ │ mov r0, r4 │ │ movs r1, #1 │ │ - bl 4191c │ │ - cbz r0, 8d4e2 │ │ + bl 41c24 │ │ + cbz r0, 8d54e │ │ mov r1, r5 │ │ mov r2, r4 │ │ str r0, [sp, #8] │ │ - bl d53c6 │ │ + bl d52ea │ │ mov sl, r4 │ │ mov fp, r4 │ │ - b.n 8d65e │ │ + b.n 8d6ca │ │ str r5, [sp, #16] │ │ mov.w r0, fp, lsr #7 │ │ ldr r1, [sp, #72] @ 0x48 │ │ cmp r0, #2 │ │ - bhi.w 8d894 │ │ + bhi.w 8d900 │ │ add r5, sp, #696 @ 0x2b8 │ │ mov r2, fp │ │ mov r0, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #0 │ │ add.w r2, fp, #1 │ │ strb.w r0, [r5, fp] │ │ add r0, sp, #616 @ 0x268 │ │ mov r1, r5 │ │ - bl 401d8 │ │ + bl 404e0 │ │ ldr r0, [sp, #616] @ 0x268 │ │ cmp r0, #1 │ │ - bne.n 8d4be │ │ - ldr r0, [pc, #600] @ (8d70c ) │ │ + bne.n 8d52a │ │ + ldr r0, [pc, #600] @ (8d778 ) │ │ add r0, pc │ │ ldrd r0, r1, [r0] │ │ strd r0, r1, [sp, #476] @ 0x1dc │ │ - b.n 8d4f8 │ │ + b.n 8d564 │ │ ldr r0, [sp, #620] @ 0x26c │ │ movs r1, #0 │ │ movs r5, #0 │ │ - blx d89f0 │ │ - cbz r0, 8d4ec │ │ + blx d8a00 │ │ + cbz r0, 8d558 │ │ mov sl, r0 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov fp, r0 │ │ - cbz r0, 8d530 │ │ + cbz r0, 8d59c │ │ mov r0, fp │ │ movs r1, #1 │ │ - bl 4191c │ │ + bl 41c24 │ │ ldr r5, [sp, #16] │ │ - cbnz r0, 8d534 │ │ + cbnz r0, 8d5a0 │ │ mov r4, fp │ │ movs r0, #1 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ - b.n 8d8d8 │ │ - blx d8850 │ │ + bl 3e2ac │ │ + b.n 8d944 │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ strb.w r5, [sp, #476] @ 0x1dc │ │ str r0, [sp, #480] @ 0x1e0 │ │ mov.w fp, #2147483648 @ 0x80000000 │ │ ldr r5, [sp, #16] │ │ cmp.w fp, #2147483648 @ 0x80000000 │ │ str.w fp, [sp, #36] @ 0x24 │ │ - bne.n 8d558 │ │ + bne.n 8d5c4 │ │ ldrb.w r0, [sp, #476] @ 0x1dc │ │ cmp r0, #3 │ │ - bne.w 8d728 │ │ + bne.w 8d794 │ │ ldr r4, [sp, #480] @ 0x1e0 │ │ ldrd fp, r5, [r4] │ │ ldr r1, [r5, #0] │ │ - cbz r1, 8d520 │ │ + cbz r1, 8d58c │ │ mov r0, fp │ │ blx r1 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, fp │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - b.n 8d724 │ │ + b.n 8d790 │ │ ldr r5, [sp, #16] │ │ movs r0, #1 │ │ mov r1, sl │ │ mov r2, fp │ │ str r0, [sp, #36] @ 0x24 │ │ - bl d53c6 │ │ + bl d52ea │ │ mov r0, sl │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #36] @ 0x24 │ │ str.w fp, [sp, #480] @ 0x1e0 │ │ strd fp, r0, [sp, #472] @ 0x1d8 │ │ cmp.w fp, #2147483648 @ 0x80000000 │ │ str.w fp, [sp, #36] @ 0x24 │ │ - beq.n 8d508 │ │ + beq.n 8d574 │ │ ldrd r2, r0, [sp, #476] @ 0x1dc │ │ - cbz r0, 8d56a │ │ + cbz r0, 8d5d6 │ │ ldrb r1, [r2, #0] │ │ subs r1, #47 @ 0x2f │ │ clz r1, r1 │ │ lsrs r1, r1, #5 │ │ - b.n 8d56c │ │ + b.n 8d5d8 │ │ movs r1, #0 │ │ strb.w r1, [sp, #726] @ 0x2d6 │ │ movs r1, #6 │ │ strd r2, r0, [sp, #696] @ 0x2b8 │ │ movw r0, #513 @ 0x201 │ │ strb.w r1, [sp, #704] @ 0x2c0 │ │ str r2, [sp, #32] │ │ strh.w r0, [sp, #724] @ 0x2d4 │ │ add r0, sp, #616 @ 0x268 │ │ add r1, sp, #696 @ 0x2b8 │ │ - bl 8cacc │ │ + bl 8cb38 │ │ ldrb.w r0, [sp, #616] @ 0x268 │ │ subs r0, #7 │ │ cmp r0, #3 │ │ - bcs.n 8d5d6 │ │ + bcs.n 8d642 │ │ add r0, sp, #696 @ 0x2b8 │ │ - bl 8ce24 │ │ + bl 8ce90 │ │ mov r2, r1 │ │ - cbz r1, 8d5dc │ │ + cbz r1, 8d648 │ │ str r0, [sp, #28] │ │ mov r0, r2 │ │ movs r1, #1 │ │ mov fp, r2 │ │ - bl 4191c │ │ + bl 41c24 │ │ cmp r0, #0 │ │ - beq.w 8d8d0 │ │ + beq.w 8d93c │ │ ldr r1, [sp, #28] │ │ mov r2, fp │ │ mov sl, r0 │ │ - bl d53c6 │ │ + bl d52ea │ │ add.w r0, sl, fp │ │ mov r2, fp │ │ str.w fp, [sp, #704] @ 0x2c0 │ │ ldrb.w r0, [r0, #-1] │ │ strd fp, sl, [sp, #696] @ 0x2b8 │ │ subs r0, #47 @ 0x2f │ │ it ne │ │ movne r0, #1 │ │ - b.n 8d5e8 │ │ + b.n 8d654 │ │ mov.w sl, #2147483648 @ 0x80000000 │ │ - b.n 8d654 │ │ + b.n 8d6c0 │ │ movs r0, #0 │ │ mov.w sl, #1 │ │ str r0, [sp, #704] @ 0x2c0 │ │ strd r0, sl, [sp, #696] @ 0x2b8 │ │ - cbz r4, 8d5f6 │ │ + cbz r4, 8d662 │ │ ldrb r1, [r5, #0] │ │ cmp r1, #47 @ 0x2f │ │ - bne.n 8d5f6 │ │ + bne.n 8d662 │ │ mov.w fp, #0 │ │ - b.n 8d618 │ │ - cbz r0, 8d61e │ │ + b.n 8d684 │ │ + cbz r0, 8d68a │ │ movs r0, #1 │ │ mov r1, r2 │ │ str r0, [sp, #0] │ │ add r0, sp, #696 @ 0x2b8 │ │ movs r2, #1 │ │ movs r3, #1 │ │ - bl 77788 │ │ + bl 777f0 │ │ ldr r0, [sp, #704] @ 0x2c0 │ │ movs r1, #47 @ 0x2f │ │ ldrd r2, sl, [sp, #696] @ 0x2b8 │ │ add.w fp, r0, #1 │ │ strb.w r1, [sl, r0] │ │ str.w fp, [sp, #704] @ 0x2c0 │ │ - b.n 8d620 │ │ + b.n 8d68c │ │ mov fp, r2 │ │ sub.w r0, r2, fp │ │ cmp r4, r0 │ │ - bhi.w 8d8b0 │ │ + bhi.w 8d91c │ │ add.w r0, sl, fp │ │ mov r1, r5 │ │ mov r2, r4 │ │ - bl d53c6 │ │ + bl d52ea │ │ add fp, r4 │ │ str.w fp, [sp, #704] @ 0x2c0 │ │ mov r0, sl │ │ mov r1, fp │ │ str.w sl, [sp, #28] │ │ - bl 8d0ec │ │ + bl 8d158 │ │ ldr.w sl, [sp, #696] @ 0x2b8 │ │ cmp r0, #0 │ │ - beq.n 8d710 │ │ + beq.n 8d77c │ │ ldr r0, [sp, #700] @ 0x2bc │ │ str r0, [sp, #8] │ │ ldr r0, [sp, #36] @ 0x24 │ │ - cbz r0, 8d65e │ │ + cbz r0, 8d6ca │ │ ldr r0, [sp, #32] │ │ - blx d87c0 │ │ + blx d87d0 │ │ cmp.w sl, #2147483648 @ 0x80000000 │ │ str.w sl, [sp, #12] │ │ - beq.n 8d728 │ │ + beq.n 8d794 │ │ ldr.w sl, [sp, #8] │ │ add r0, sp, #616 @ 0x268 │ │ mov r2, fp │ │ mov r1, sl │ │ - bl 7e240 │ │ + bl 7e2a8 │ │ ldr r0, [sp, #616] @ 0x268 │ │ cmp r0, #1 │ │ - bne.n 8d6f6 │ │ + bne.n 8d762 │ │ str r5, [sp, #16] │ │ ldrd fp, r1, [sp, #620] @ 0x26c │ │ ldr r5, [sp, #140] @ 0x8c │ │ ldr r0, [sp, #132] @ 0x84 │ │ str r1, [sp, #36] @ 0x24 │ │ cmp r5, r0 │ │ - bne.n 8d692 │ │ + bne.n 8d6fe │ │ ldr r0, [sp, #20] │ │ - bl 7e454 │ │ + bl 7e4bc │ │ ldr r0, [sp, #136] @ 0x88 │ │ ldr r2, [sp, #36] @ 0x24 │ │ str.w fp, [r0, r5, lsl #3] │ │ add.w r0, r0, r5, lsl #3 │ │ str r2, [r0, #4] │ │ adds r0, r5, #1 │ │ str r0, [sp, #140] @ 0x8c │ │ - bcs.w 8d8c6 │ │ + bcs.w 8d932 │ │ add r0, sp, #696 @ 0x2b8 │ │ mov r1, fp │ │ - bl 7b10c │ │ + bl 7b174 │ │ ldr r5, [sp, #16] │ │ ldr.w sl, [sp, #760] @ 0x2f8 │ │ cmp.w sl, #2147483648 @ 0x80000000 │ │ - beq.n 8d6f6 │ │ + beq.n 8d762 │ │ ldr r0, [sp, #764] @ 0x2fc │ │ add.w fp, sp, #696 @ 0x2b8 │ │ str r0, [sp, #36] @ 0x24 │ │ ldr r0, [sp, #768] @ 0x300 │ │ str r0, [sp, #32] │ │ ldr r0, [sp, #772] @ 0x304 │ │ str r0, [sp, #28] │ │ mov r0, fp │ │ - bl 8c8bc │ │ - cbz r0, 8d6ea │ │ + bl 8c928 │ │ + cbz r0, 8d756 │ │ adds r3, r4, #1 │ │ sub.w r2, r9, r3 │ │ cmp r1, r2 │ │ - bne.n 8d6ea │ │ + bne.n 8d756 │ │ adds r1, r5, r3 │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ - beq.w 8d87c │ │ + beq.w 8d8e8 │ │ cmp.w sl, #0 │ │ - beq.n 8d6f6 │ │ + beq.n 8d762 │ │ ldr r0, [sp, #36] @ 0x24 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov.w sl, #2147483648 @ 0x80000000 │ │ ldr r0, [sp, #12] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #8] │ │ - blxne d87c0 │ │ - b.n 8d72c │ │ - cbz r7, 8d75a │ │ - vqshlu.s64 q15, q9, #56 @ 0x38 │ │ + blxne d87d0 │ │ + b.n 8d798 │ │ + uxtb r3, r2 │ │ + vqshlu.s64 d30, d6, #56 @ 0x38 │ │ movs r4, r0 │ │ cmp.w sl, #0 │ │ itt ne │ │ ldrne r0, [sp, #28] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [sp, #36] @ 0x24 │ │ cmp r0, #0 │ │ ldr r0, [sp, #32] │ │ - beq.n 8d728 │ │ - blx d87c0 │ │ + beq.n 8d794 │ │ + blx d87d0 │ │ mov.w sl, #2147483648 @ 0x80000000 │ │ add.w r9, sp, #536 @ 0x218 │ │ ldrd r1, r2, [sp, #60] @ 0x3c │ │ add r3, sp, #120 @ 0x78 │ │ mov r0, r9 │ │ - bl 8d970 │ │ + bl 8d9dc │ │ ldr r0, [sp, #104] @ 0x68 │ │ add r2, sp, #616 @ 0x268 │ │ str r0, [sp, #648] @ 0x288 │ │ ldr r0, [sp, #112] @ 0x70 │ │ str r0, [sp, #640] @ 0x280 │ │ ldr r0, [sp, #100] @ 0x64 │ │ str r0, [sp, #636] @ 0x27c │ │ @@ -152854,917 +152769,917 @@ │ │ ldr r0, [sp, #36] @ 0x24 │ │ strd sl, r0, [sp, #760] @ 0x2f8 │ │ add.w r8, sp, #120 @ 0x78 │ │ add r0, sp, #144 @ 0x90 │ │ str.w r9, [sp] │ │ mov r1, r8 │ │ ldr.w sl, [sp, #72] @ 0x48 │ │ - bl 7b6c4 │ │ + bl 7b72c │ │ ldr r1, [sp, #52] @ 0x34 │ │ ldr r0, [sp, #400] @ 0x190 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.n 8d842 │ │ + bne.n 8d8ae │ │ ldrd r4, r5, [sp, #124] @ 0x7c │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ ldrd r9, r8, [sp, #88] @ 0x58 │ │ str.w r0, [r1, #288] @ 0x120 │ │ - cbz r5, 8d7f6 │ │ + cbz r5, 8d862 │ │ adds r6, r4, #4 │ │ ldr.w r0, [r6, #-4] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r6, #0] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r6, #12 │ │ subs r5, #1 │ │ - bne.n 8d7e2 │ │ + bne.n 8d84e │ │ ldr r0, [sp, #120] @ 0x78 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r4, r5, [sp, #136] @ 0x88 │ │ - cbz r5, 8d818 │ │ + cbz r5, 8d884 │ │ adds r6, r4, #4 │ │ ldrd r0, r1, [r6, #-4] │ │ - blx d89d0 │ │ + blx d89e0 │ │ adds r6, #8 │ │ subs r5, #1 │ │ - bne.n 8d80a │ │ + bne.n 8d876 │ │ ldr r0, [sp, #132] @ 0x84 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r9 │ │ mov r1, r8 │ │ - blx d89d0 │ │ + blx d89e0 │ │ ldr r0, [sp, #96] @ 0x60 │ │ ldr r0, [r0, #0] │ │ - cbz r0, 8d838 │ │ + cbz r0, 8d8a4 │ │ mov r0, sl │ │ - blx d87c0 │ │ + blx d87d0 │ │ addw sp, sp, #1084 @ 0x43c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ add r6, sp, #696 @ 0x2b8 │ │ mov r9, r1 │ │ add r1, sp, #144 @ 0x90 │ │ mov.w r2, #304 @ 0x130 │ │ mov r0, r6 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add.w r0, r9, #32 │ │ mov r1, r6 │ │ mov.w r2, #304 @ 0x130 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldmia.w r8, {r1, r2, r3, r4, r5, r6} │ │ add.w r0, r9, #8 │ │ stmia r0!, {r1, r2, r3, r4, r5, r6} │ │ ldrd r1, r0, [sp, #88] @ 0x58 │ │ strd r1, r0, [r9] │ │ ldr r0, [sp, #96] @ 0x60 │ │ ldr r0, [r0, #0] │ │ cmp r0, #0 │ │ - bne.n 8d832 │ │ - b.n 8d838 │ │ + bne.n 8d89e │ │ + b.n 8d8a4 │ │ ldmia.w fp!, {r1, r2, r3, r5, r6} │ │ add r0, sp, #472 @ 0x1d8 │ │ stmia r0!, {r1, r2, r3, r5, r6} │ │ ldmia.w fp!, {r1, r2, r3, r5, r6} │ │ stmia r0!, {r1, r2, r3, r5, r6} │ │ ldmia.w fp, {r1, r2, r3, r4, r5, r6} │ │ stmia r0!, {r1, r2, r3, r4, r5, r6} │ │ ldr r6, [sp, #24] │ │ - b.n 8d6fa │ │ + b.n 8d766 │ │ add r0, sp, #472 @ 0x1d8 │ │ mov r2, fp │ │ - bl 8c9f0 │ │ + bl 8ca5c │ │ ldr r5, [sp, #16] │ │ ldr.w fp, [sp, #472] @ 0x1d8 │ │ cmp.w fp, #2147483648 @ 0x80000000 │ │ str.w fp, [sp, #36] @ 0x24 │ │ - beq.w 8d508 │ │ - b.n 8d558 │ │ + beq.w 8d574 │ │ + b.n 8d5c4 │ │ movs r0, #1 │ │ mov r1, fp │ │ str r0, [sp, #0] │ │ add r0, sp, #696 @ 0x2b8 │ │ mov r2, r4 │ │ movs r3, #1 │ │ - bl 77788 │ │ + bl 777f0 │ │ ldrd sl, fp, [sp, #700] @ 0x2bc │ │ - b.n 8d62a │ │ - ldr r0, [pc, #164] @ (8d96c ) │ │ + b.n 8d696 │ │ + ldr r0, [pc, #164] @ (8d9d8 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - b.n 8d8d8 │ │ + bl 3fd40 │ │ + b.n 8d944 │ │ movs r0, #1 │ │ mov r1, fp │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ udf #254 @ 0xfe │ │ ldr r1, [sp, #36] @ 0x24 │ │ mov r8, r0 │ │ mov r0, fp │ │ - blx d89d0 │ │ - b.n 8d916 │ │ + blx d89e0 │ │ + b.n 8d982 │ │ mov r8, r0 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, fp │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - b.n 8d928 │ │ + b.n 8d994 │ │ mov r8, r0 │ │ ldr r0, [sp, #696] @ 0x2b8 │ │ - cbz r0, 8d90c │ │ + cbz r0, 8d978 │ │ ldr r0, [sp, #700] @ 0x2bc │ │ - blx d87c0 │ │ - b.n 8d90c │ │ + blx d87d0 │ │ + b.n 8d978 │ │ mov r8, r0 │ │ - b.n 8d92c │ │ + b.n 8d998 │ │ mov r8, r0 │ │ ldr r0, [sp, #36] @ 0x24 │ │ - cbz r0, 8d92c │ │ + cbz r0, 8d998 │ │ ldr r0, [sp, #32] │ │ - b.n 8d928 │ │ + b.n 8d994 │ │ mov r8, r0 │ │ ldr r0, [sp, #12] │ │ - cbz r0, 8d92c │ │ + cbz r0, 8d998 │ │ mov r0, sl │ │ - b.n 8d928 │ │ + b.n 8d994 │ │ mov r8, r0 │ │ movs.w r0, sl, lsl #1 │ │ - beq.n 8d92c │ │ + beq.n 8d998 │ │ ldr r0, [sp, #36] @ 0x24 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #68] @ 0x44 │ │ - cbz r0, 8d93e │ │ + cbz r0, 8d9aa │ │ ldr r0, [sp, #56] @ 0x38 │ │ - blx d87c0 │ │ - b.n 8d93e │ │ + blx d87d0 │ │ + b.n 8d9aa │ │ mov r8, r0 │ │ str.w sl, [sp, #72] @ 0x48 │ │ add r0, sp, #120 @ 0x78 │ │ - bl 7b660 │ │ + bl 7b6c8 │ │ ldrd r0, r1, [sp, #88] @ 0x58 │ │ - blx d89d0 │ │ - b.n 8d956 │ │ + blx d89e0 │ │ + b.n 8d9c2 │ │ mov r8, r0 │ │ str r4, [sp, #96] @ 0x60 │ │ str.w sl, [sp, #72] @ 0x48 │ │ ldr r0, [sp, #96] @ 0x60 │ │ ldr r0, [r0, #0] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #72] @ 0x48 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r8 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ nop │ │ - b.n 8db28 │ │ + b.n 8dadc │ │ movs r4, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #92 @ 0x5c │ │ mov r4, r2 │ │ mov r6, r1 │ │ mov fp, r0 │ │ str r3, [sp, #12] │ │ - cbz r2, 8d9ae │ │ + cbz r2, 8da1a │ │ mov r0, r4 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 8dcbe │ │ + beq.w 8dd2a │ │ mov r1, r6 │ │ mov r2, r4 │ │ mov sl, r0 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldrb r0, [r6, #0] │ │ mov r8, r4 │ │ str r4, [sp, #28] │ │ subs r0, #47 @ 0x2f │ │ strd r4, sl, [sp, #20] │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ - b.n 8d9c0 │ │ + b.n 8da2c │ │ mov.w r8, #0 │ │ mov.w sl, #1 │ │ str.w r8, [sp, #28] │ │ movs r0, #0 │ │ strd r8, sl, [sp, #20] │ │ strb.w r0, [sp, #90] @ 0x5a │ │ movs r0, #6 │ │ strb.w r0, [sp, #68] @ 0x44 │ │ movw r0, #513 @ 0x201 │ │ strd r6, r4, [sp, #60] @ 0x3c │ │ strh.w r0, [sp, #88] @ 0x58 │ │ add.w r9, sp, #32 │ │ add r1, sp, #60 @ 0x3c │ │ mov r0, r9 │ │ - bl 8cacc │ │ + bl 8cb38 │ │ ldrb.w r0, [sp, #32] │ │ cmp r0, #9 │ │ - bne.n 8da68 │ │ + bne.n 8dad4 │ │ ldrd r5, r0, [sp, #36] @ 0x24 │ │ cmp r0, #2 │ │ - bne.n 8d9fc │ │ + bne.n 8da68 │ │ ldrh r1, [r5, #0] │ │ movw r2, #11822 @ 0x2e2e │ │ cmp r1, r2 │ │ - beq.n 8da68 │ │ + beq.n 8dad4 │ │ subs r1, r5, #1 │ │ mov r2, r0 │ │ - cbz r2, 8da68 │ │ + cbz r2, 8dad4 │ │ ldrb r3, [r1, r2] │ │ mov r4, r2 │ │ subs r2, #1 │ │ cmp r3, #46 @ 0x2e │ │ - bne.n 8da00 │ │ - cbz r2, 8da68 │ │ + bne.n 8da6c │ │ + cbz r2, 8dad4 │ │ subs r6, r0, r4 │ │ str.w fp, [sp, #8] │ │ mov.w fp, #1 │ │ - beq.n 8da28 │ │ + beq.n 8da94 │ │ mov r0, r6 │ │ - blx d87f0 │ │ + blx d8810 │ │ mov fp, r0 │ │ cmp r0, #0 │ │ - beq.w 8dcb4 │ │ + beq.w 8dd20 │ │ adds r1, r5, r4 │ │ mov r0, fp │ │ mov r2, r6 │ │ - bl d53c6 │ │ + bl d52ea │ │ str r6, [sp, #68] @ 0x44 │ │ strd r6, fp, [sp, #60] @ 0x3c │ │ movs r0, #1 │ │ mov r1, r6 │ │ str r0, [sp, #0] │ │ add r0, sp, #60 @ 0x3c │ │ movs r2, #4 │ │ movs r3, #1 │ │ - bl 77788 │ │ + bl 777f0 │ │ ldrd r0, r4, [sp, #60] @ 0x3c │ │ movw r2, #25646 @ 0x642e │ │ ldr r1, [sp, #68] @ 0x44 │ │ movt r2, #28791 @ 0x7077 │ │ clz r0, r0 │ │ adds r6, r1, #4 │ │ lsrs r0, r0, #5 │ │ str r2, [r4, r1] │ │ str r0, [sp, #16] │ │ ldr.w fp, [sp, #8] │ │ - b.n 8da86 │ │ + b.n 8daf2 │ │ movs r0, #3 │ │ movs r6, #3 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 8dcb4 │ │ + beq.w 8dd20 │ │ mov r4, r0 │ │ movs r0, #112 @ 0x70 │ │ strb r0, [r4, #2] │ │ movw r0, #30564 @ 0x7764 │ │ strh r0, [r4, #0] │ │ movs r0, #0 │ │ str r0, [sp, #16] │ │ strd r4, r6, [sp, #32] │ │ movs r0, #0 │ │ ldrb r1, [r4, r0] │ │ cmp r1, #47 @ 0x2f │ │ - beq.w 8dc60 │ │ + beq.w 8dccc │ │ adds r0, #1 │ │ cmp r6, r0 │ │ - bne.n 8da8c │ │ + bne.n 8daf8 │ │ cmp.w r8, #0 │ │ - beq.n 8daae │ │ + beq.n 8db1a │ │ ldrb.w r0, [sl] │ │ subs r0, #47 @ 0x2f │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ - b.n 8dab0 │ │ + b.n 8db1c │ │ movs r0, #0 │ │ strb.w r0, [sp, #90] @ 0x5a │ │ movs r0, #6 │ │ strb.w r0, [sp, #68] @ 0x44 │ │ movw r0, #513 @ 0x201 │ │ strd sl, r8, [sp, #60] @ 0x3c │ │ strh.w r0, [sp, #88] @ 0x58 │ │ add r0, sp, #32 │ │ add r1, sp, #60 @ 0x3c │ │ - bl 8cacc │ │ + bl 8cb38 │ │ ldr r1, [sp, #36] @ 0x24 │ │ ldrb.w r0, [sp, #32] │ │ mov r2, r1 │ │ cmp r0, #9 │ │ it ne │ │ movne r2, #0 │ │ - bne.n 8db84 │ │ + bne.n 8dbf0 │ │ ldr.w ip, [sp, #40] @ 0x28 │ │ cmp.w ip, #2 │ │ - bne.n 8daf8 │ │ + bne.n 8db64 │ │ ldrh r0, [r1, #0] │ │ movw r3, #11822 @ 0x2e2e │ │ cmp r0, r3 │ │ - bne.n 8daf8 │ │ + bne.n 8db64 │ │ movs r0, #2 │ │ movs r5, #0 │ │ - b.n 8db22 │ │ + b.n 8db8e │ │ mov r0, ip │ │ mov r3, r0 │ │ add r0, r1 │ │ cmp r0, r2 │ │ - beq.n 8db16 │ │ + beq.n 8db82 │ │ ldrb.w r5, [r0, #-1] │ │ subs r0, r3, #1 │ │ cmp r5, #46 @ 0x2e │ │ - bne.n 8dafa │ │ - cbz r0, 8db1c │ │ + bne.n 8db66 │ │ + cbz r0, 8db88 │ │ adds r5, r2, r3 │ │ sub.w ip, ip, r3 │ │ - b.n 8db20 │ │ + b.n 8db8c │ │ movs r1, #0 │ │ mov r5, r2 │ │ - b.n 8db22 │ │ + b.n 8db8e │ │ movs r5, #0 │ │ mov r0, ip │ │ mov r1, r2 │ │ cmp r1, #0 │ │ it ne │ │ movne r5, r1 │ │ - cbz r5, 8db84 │ │ + cbz r5, 8dbf0 │ │ cmp r1, #0 │ │ it eq │ │ moveq r0, ip │ │ add r0, r5 │ │ subs.w r5, r0, sl │ │ it ne │ │ cmpne r5, r8 │ │ - bne.n 8dc10 │ │ + bne.n 8dc7c │ │ str.w fp, [sp, #8] │ │ mov fp, r8 │ │ cmp r5, r8 │ │ itt ls │ │ strls r5, [sp, #28] │ │ movls fp, r5 │ │ sub.w r0, r8, fp │ │ cmp r6, r0 │ │ - bcs.n 8dc36 │ │ + bcs.n 8dca2 │ │ cmp r8, fp │ │ - beq.w 8dc9a │ │ + beq.w 8dd06 │ │ mov r9, r8 │ │ movs r0, #46 @ 0x2e │ │ add.w r5, fp, #1 │ │ strb.w r0, [sl, fp] │ │ sub.w r0, r9, r5 │ │ cmp r6, r0 │ │ str r5, [sp, #28] │ │ - bhi.w 8dc82 │ │ + bhi.w 8dcee │ │ ldr.w fp, [sp, #8] │ │ ldr r0, [sp, #24] │ │ mov r1, r4 │ │ mov r2, r6 │ │ add r0, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ adds r0, r5, r6 │ │ str r0, [sp, #28] │ │ ldr r0, [sp, #16] │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, r4 │ │ - blxeq d87c0 │ │ + blxeq d87d0 │ │ ldrd r4, r2, [sp, #24] │ │ add r0, sp, #60 @ 0x3c │ │ mov r1, r4 │ │ - bl 7e240 │ │ + bl 7e2a8 │ │ ldr r0, [sp, #60] @ 0x3c │ │ cmp r0, #1 │ │ - bne.n 8dbfa │ │ + bne.n 8dc66 │ │ ldr r5, [sp, #12] │ │ ldrd sl, r9, [sp, #64] @ 0x40 │ │ mov r0, r5 │ │ ldr.w r1, [r0, #12]! │ │ ldr r6, [r0, #8] │ │ cmp r6, r1 │ │ - bne.n 8dbb8 │ │ - bl 7e454 │ │ + bne.n 8dc24 │ │ + bl 7e4bc │ │ ldr r1, [r5, #16] │ │ adds r0, r6, #1 │ │ str.w sl, [r1, r6, lsl #3] │ │ add.w r1, r1, r6, lsl #3 │ │ str r0, [r5, #20] │ │ str.w r9, [r1, #4] │ │ - bcs.n 8dc78 │ │ + bcs.n 8dce4 │ │ ldr r1, [r5, #16] │ │ add.w r0, r1, r0, lsl #3 │ │ ldrd r1, r2, [r0, #-8] │ │ mov r0, fp │ │ - bl 7b10c │ │ + bl 7b174 │ │ ldr r0, [sp, #20] │ │ ldr.w r1, [fp, #64] @ 0x40 │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ - beq.n 8dbfc │ │ - cbz r0, 8dc08 │ │ + beq.n 8dc68 │ │ + cbz r0, 8dc74 │ │ mov r0, r4 │ │ add sp, #92 @ 0x5c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ ldr r0, [sp, #20] │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ str.w r1, [fp, #64] @ 0x40 │ │ cmp r0, #0 │ │ - bne.n 8dbea │ │ + bne.n 8dc56 │ │ add sp, #92 @ 0x5c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - bcs.n 8dc2a │ │ + bcs.n 8dc96 │ │ add.w r0, sl, r5 │ │ ldrsb.w r1, [r0, #-1] │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ - bgt.n 8db3c │ │ + bgt.n 8dba8 │ │ ldrsb.w r0, [r0] │ │ cmp r0, #0 │ │ - bpl.w 8db3c │ │ + bpl.w 8dba8 │ │ mov r0, sl │ │ mov r1, r8 │ │ mov r2, r5 │ │ - bl 8dfa0 │ │ - b.n 8db3c │ │ + bl 8e00c │ │ + b.n 8dba8 │ │ adds r0, r6, #1 │ │ adds.w r9, fp, r0 │ │ - bcs.n 8dcc6 │ │ + bcs.n 8dd32 │ │ movs r0, #1 │ │ mov r1, r8 │ │ strd r0, r0, [sp] │ │ add r0, sp, #60 @ 0x3c │ │ mov r2, sl │ │ mov r3, r9 │ │ - bl 77834 │ │ + bl 7789c │ │ ldr r0, [sp, #60] @ 0x3c │ │ cmp r0, #1 │ │ - beq.n 8dcce │ │ + beq.n 8dd3a │ │ ldr.w sl, [sp, #64] @ 0x40 │ │ strd r9, sl, [sp, #20] │ │ - b.n 8db5a │ │ - ldr r1, [pc, #168] @ (8dd0c ) │ │ - ldr r0, [pc, #172] @ (8dd10 ) │ │ - ldr r2, [pc, #172] @ (8dd14 ) │ │ + b.n 8dbc6 │ │ + ldr r1, [pc, #168] @ (8dd78 ) │ │ + ldr r0, [pc, #172] @ (8dd7c ) │ │ + ldr r2, [pc, #172] @ (8dd80 ) │ │ add r1, pc │ │ add r0, pc │ │ add r2, pc │ │ strd r9, r1, [sp, #60] @ 0x3c │ │ add r1, sp, #60 @ 0x3c │ │ - bl 3fa58 │ │ - b.n 8dccc │ │ - ldr r0, [pc, #156] @ (8dd18 ) │ │ + bl 3fd60 │ │ + b.n 8dd38 │ │ + ldr r0, [pc, #156] @ (8dd84 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - b.n 8dccc │ │ + bl 3fd40 │ │ + b.n 8dd38 │ │ movs r0, #1 │ │ mov r1, r5 │ │ str r0, [sp, #0] │ │ add r0, sp, #20 │ │ mov r2, r6 │ │ movs r3, #1 │ │ - bl 77788 │ │ + bl 777f0 │ │ ldr.w fp, [sp, #8] │ │ ldr r5, [sp, #28] │ │ - b.n 8db74 │ │ + b.n 8dbe0 │ │ movs r0, #1 │ │ mov r1, r8 │ │ str r0, [sp, #0] │ │ add r0, sp, #20 │ │ movs r2, #1 │ │ movs r3, #1 │ │ - bl 77788 │ │ + bl 777f0 │ │ add.w fp, sp, #20 │ │ ldmia.w fp, {r9, sl, fp} │ │ - b.n 8db5a │ │ + b.n 8dbc6 │ │ movs r0, #1 │ │ mov r1, r6 │ │ - bl 3dfa4 │ │ - b.n 8dccc │ │ + bl 3e2ac │ │ + b.n 8dd38 │ │ movs r0, #1 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #0 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ udf #254 @ 0xfe │ │ ldrd r0, r1, [sp, #64] @ 0x40 │ │ - b.n 8dcc8 │ │ + b.n 8dd34 │ │ mov r8, r0 │ │ ldr r0, [sp, #60] @ 0x3c │ │ - cbz r0, 8dcfa │ │ + cbz r0, 8dd66 │ │ ldr r0, [sp, #64] @ 0x40 │ │ - b.n 8dcf6 │ │ + b.n 8dd62 │ │ mov r8, r0 │ │ mov r0, sl │ │ mov r1, r9 │ │ - blx d89d0 │ │ - b.n 8dcfa │ │ + blx d89e0 │ │ + b.n 8dd66 │ │ mov r8, r0 │ │ - b.n 8dcfa │ │ + b.n 8dd66 │ │ mov r8, r0 │ │ ldr r0, [sp, #16] │ │ - cbnz r0, 8dcfa │ │ + cbnz r0, 8dd66 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #20] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #24] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r8 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ lsls r3, r6, #2 │ │ movs r0, r0 │ │ - stmia r2!, {r0, r1, r2, r3, r4} │ │ - @ instruction: 0xfff7dfaa │ │ + stmia r2!, {r3, r5, r6, r7} │ │ + vqrdmlsh.s , , d14[0] │ │ movs r4, r0 │ │ - ble.n 8dd70 │ │ + bgt.n 8dd24 │ │ movs r4, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #108 @ 0x6c │ │ ldrd r4, r9, [r1] │ │ movs r1, #34 @ 0x22 │ │ ldr.w r2, [r9, #16] │ │ ldrd r6, r5, [r0] │ │ mov r0, r4 │ │ mov r8, r2 │ │ blx r2 │ │ - cbz r0, 8dd46 │ │ + cbz r0, 8ddb2 │ │ movs r0, #1 │ │ add sp, #108 @ 0x6c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ strd r6, r5, [sp, #48] @ 0x30 │ │ add r0, sp, #56 @ 0x38 │ │ - ldr r6, [pc, #576] @ (8df90 ) │ │ + ldr r6, [pc, #576] @ (8dffc ) │ │ add r1, sp, #48 @ 0x30 │ │ - ldr r2, [pc, #576] @ (8df94 ) │ │ + ldr r2, [pc, #576] @ (8e000 ) │ │ mov r5, r8 │ │ add r6, pc │ │ str r6, [sp, #8] │ │ add r2, pc │ │ str r2, [sp, #40] @ 0x28 │ │ - bl 41724 │ │ + bl 41a2c │ │ ldr r0, [sp, #56] @ 0x38 │ │ str r0, [sp, #28] │ │ cmp r0, #0 │ │ - beq.w 8df72 │ │ + beq.w 8dfde │ │ add.w fp, sp, #60 @ 0x3c │ │ ldmia.w fp, {r0, r8, fp} │ │ cmp r0, #0 │ │ str r0, [sp, #24] │ │ - beq.w 8df0c │ │ + beq.w 8df78 │ │ ldr r6, [sp, #28] │ │ mov.w sl, #0 │ │ str.w r9, [sp, #12] │ │ add r0, r6 │ │ str r0, [sp, #16] │ │ movs r0, #0 │ │ mov r3, r6 │ │ str r0, [sp, #44] @ 0x2c │ │ ldrsb.w r0, [r3], #1 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ uxtb r1, r0 │ │ - bgt.n 8ddda │ │ + bgt.n 8de46 │ │ ldrb r2, [r6, #1] │ │ and.w r0, r1, #31 │ │ cmp r1, #224 @ 0xe0 │ │ and.w r3, r2, #63 @ 0x3f │ │ - bcc.n 8ddcc │ │ + bcc.n 8de38 │ │ ldrb r2, [r6, #2] │ │ cmp r1, #240 @ 0xf0 │ │ and.w r2, r2, #63 @ 0x3f │ │ orr.w r3, r2, r3, lsl #6 │ │ - bcc.n 8ddd4 │ │ + bcc.n 8de40 │ │ ldrb r2, [r6, #3] │ │ and.w r0, r0, #7 │ │ and.w r2, r2, #63 @ 0x3f │ │ orr.w r2, r2, r3, lsl #6 │ │ adds r3, r6, #4 │ │ orr.w r1, r2, r0, lsl #18 │ │ - b.n 8ddda │ │ + b.n 8de46 │ │ orr.w r1, r3, r0, lsl #6 │ │ adds r3, r6, #2 │ │ - b.n 8ddda │ │ + b.n 8de46 │ │ orr.w r1, r3, r0, lsl #12 │ │ adds r3, r6, #3 │ │ add r0, sp, #72 @ 0x48 │ │ mov.w r2, #65537 @ 0x10001 │ │ strd r3, r6, [sp, #32] │ │ str r1, [sp, #20] │ │ - bl 3f454 │ │ + bl 3f75c │ │ ldrb.w r0, [sp, #84] @ 0x54 │ │ ldrb.w r1, [sp, #85] @ 0x55 │ │ subs r0, r1, r0 │ │ uxtb r0, r0 │ │ cmp r0, #1 │ │ - bne.n 8de02 │ │ + bne.n 8de6e │ │ ldr r1, [sp, #44] @ 0x2c │ │ ldrd r3, r2, [sp, #32] │ │ - b.n 8dee2 │ │ + b.n 8df4e │ │ ldr r3, [sp, #44] @ 0x2c │ │ cmp r3, sl │ │ - bcc.w 8df80 │ │ + bcc.w 8dfec │ │ cmp.w sl, #0 │ │ - beq.n 8de28 │ │ + beq.n 8de94 │ │ ldr r0, [sp, #24] │ │ cmp sl, r0 │ │ - bcs.n 8de24 │ │ + bcs.n 8de90 │ │ ldr r0, [sp, #28] │ │ ldrsb.w r0, [r0, sl] │ │ cmn.w r0, #65 @ 0x41 │ │ - bgt.n 8de28 │ │ - b.n 8df80 │ │ - bne.w 8df80 │ │ - cbz r3, 8de40 │ │ + bgt.n 8de94 │ │ + b.n 8dfec │ │ + bne.w 8dfec │ │ + cbz r3, 8deac │ │ ldr r0, [sp, #24] │ │ cmp r3, r0 │ │ - bcs.n 8de3c │ │ + bcs.n 8dea8 │ │ ldr r0, [sp, #28] │ │ ldrsb r0, [r0, r3] │ │ cmn.w r0, #65 @ 0x41 │ │ - bgt.n 8de40 │ │ - b.n 8df80 │ │ - bne.w 8df80 │ │ + bgt.n 8deac │ │ + b.n 8dfec │ │ + bne.w 8dfec │ │ ldr r0, [sp, #28] │ │ sub.w r2, r3, sl │ │ ldr.w r6, [r9, #12] │ │ add.w r1, r0, sl │ │ mov r0, r4 │ │ blx r6 │ │ cmp r0, #0 │ │ - bne.w 8dd3c │ │ + bne.w 8dda8 │ │ ldrd r6, r0, [sp, #72] @ 0x48 │ │ add r3, sp, #92 @ 0x5c │ │ ldrd r1, r2, [sp, #80] @ 0x50 │ │ stmia r3!, {r0, r1, r2} │ │ uxtb.w sl, r2 │ │ ldrb.w r9, [sp, #101] @ 0x65 │ │ str r6, [sp, #88] @ 0x58 │ │ cmp.w r9, #129 @ 0x81 │ │ - bcc.n 8de8c │ │ + bcc.n 8def8 │ │ uxtb.w r0, sl │ │ cmp r0, r9 │ │ - bcs.n 8deaa │ │ + bcs.n 8df16 │ │ mov r0, r4 │ │ mov r1, r6 │ │ blx r5 │ │ add.w sl, sl, #1 │ │ cmp r0, #0 │ │ - beq.n 8de74 │ │ - b.n 8dd3c │ │ + beq.n 8dee0 │ │ + b.n 8dda8 │ │ cmp sl, r9 │ │ it hi │ │ movhi r9, sl │ │ cmp r9, sl │ │ - beq.n 8deaa │ │ + beq.n 8df16 │ │ add r0, sp, #88 @ 0x58 │ │ ldrb.w r1, [r0, sl] │ │ mov r0, r4 │ │ blx r5 │ │ add.w sl, sl, #1 │ │ cmp r0, #0 │ │ - beq.n 8de92 │ │ - b.n 8dd3c │ │ + beq.n 8defe │ │ + b.n 8dda8 │ │ ldr r0, [sp, #20] │ │ cmp r0, #128 @ 0x80 │ │ - bcs.n 8debe │ │ + bcs.n 8df2a │ │ movs r0, #1 │ │ ldr.w r9, [sp, #12] │ │ ldr r1, [sp, #44] @ 0x2c │ │ ldrd r3, r2, [sp, #32] │ │ - b.n 8dede │ │ + b.n 8df4a │ │ ldr.w r9, [sp, #12] │ │ cmp.w r0, #2048 @ 0x800 │ │ ldr r1, [sp, #44] @ 0x2c │ │ ldrd r3, r2, [sp, #32] │ │ - bcs.n 8ded2 │ │ + bcs.n 8df3e │ │ movs r0, #2 │ │ - b.n 8dede │ │ + b.n 8df4a │ │ cmp.w r0, #65536 @ 0x10000 │ │ mov.w r0, #4 │ │ it cc │ │ movcc r0, #3 │ │ add.w sl, r0, r1 │ │ subs r0, r1, r2 │ │ ldr r1, [sp, #16] │ │ add r0, r3 │ │ mov r6, r3 │ │ cmp r3, r1 │ │ - bne.w 8dd8c │ │ + bne.w 8ddf8 │ │ cmp.w sl, #0 │ │ - beq.n 8df0c │ │ + beq.n 8df78 │ │ ldr r0, [sp, #24] │ │ cmp sl, r0 │ │ - bcs.n 8df5e │ │ + bcs.n 8dfca │ │ ldr r0, [sp, #28] │ │ ldrsb.w r0, [r0, sl] │ │ cmn.w r0, #64 @ 0x40 │ │ - blt.n 8df60 │ │ + blt.n 8dfcc │ │ mov r0, sl │ │ - b.n 8df0e │ │ + b.n 8df7a │ │ movs r0, #0 │ │ ldr r1, [sp, #28] │ │ ldr r2, [sp, #24] │ │ add r1, r0 │ │ ldr.w r3, [r9, #12] │ │ subs r2, r2, r0 │ │ mov r0, r4 │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.w 8dd3c │ │ + bne.w 8dda8 │ │ ldr r6, [sp, #8] │ │ sub.w sl, r7, #29 │ │ cmp.w fp, #0 │ │ - beq.n 8df58 │ │ + beq.n 8dfc4 │ │ ldr r2, [sp, #40] @ 0x28 │ │ add r3, sp, #88 @ 0x58 │ │ ldrb.w r0, [r8] │ │ mov r1, r9 │ │ strb.w r0, [r7, #-29] │ │ mov r0, r4 │ │ strd sl, r6, [sp, #88] @ 0x58 │ │ - bl 3ef94 │ │ + bl 3f29c │ │ cmp r0, #0 │ │ - bne.w 8dd3c │ │ + bne.w 8dda8 │ │ add.w r8, r8, #1 │ │ subs.w fp, fp, #1 │ │ - bne.n 8df30 │ │ + bne.n 8df9c │ │ add r0, sp, #56 @ 0x38 │ │ add r1, sp, #48 @ 0x30 │ │ - b.n 8dd5c │ │ - beq.n 8df0e │ │ - ldr r0, [pc, #52] @ (8df98 ) │ │ + b.n 8ddc8 │ │ + beq.n 8df7a │ │ + ldr r0, [pc, #52] @ (8e004 ) │ │ mov r2, sl │ │ add r0, pc │ │ str r0, [sp, #0] │ │ ldrd r1, r0, [sp, #24] │ │ mov r3, r1 │ │ - bl 3fd1c │ │ + bl 40024 │ │ mov r0, r4 │ │ movs r1, #34 @ 0x22 │ │ blx r5 │ │ add sp, #108 @ 0x6c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #24] @ (8df9c ) │ │ + ldr r0, [pc, #24] @ (8e008 ) │ │ mov r2, sl │ │ add r0, pc │ │ str r0, [sp, #0] │ │ ldrd r1, r0, [sp, #24] │ │ - bl 3fd1c │ │ - cmp r3, #197 @ 0xc5 │ │ - vcvtm.u32.f32 q12, q7 │ │ - vqneg.s32 d28, d0 │ │ + bl 40024 │ │ + cmp r6, #97 @ 0x61 │ │ + vcvtm.s32.f32 q12, q9 │ │ + vqabs.s32 d28, d20 │ │ movs r4, r0 │ │ - stmia r7!, {r4, r5, r6} │ │ + stmia r7!, {r2, r4} │ │ movs r4, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #16 │ │ cmp r1, r2 │ │ str r2, [sp, #0] │ │ - bcc.n 8e042 │ │ + bcc.n 8e0ae │ │ mov sl, r2 │ │ subs r2, r1, r2 │ │ mov r9, r0 │ │ add.w r1, r0, sl │ │ add r0, sp, #4 │ │ cmp r2, #4 │ │ it cs │ │ movcs r2, #4 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #4] │ │ cmp r0, #1 │ │ itt eq │ │ ldreq r0, [sp, #8] │ │ cmpeq r0, #0 │ │ - beq.n 8dfda │ │ + beq.n 8e046 │ │ add sp, #16 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ cmp.w sl, #4 │ │ mov r4, sl │ │ it cs │ │ movcs r4, #4 │ │ cmp.w sl, #2 │ │ - bcc.n 8e01e │ │ + bcc.n 8e08a │ │ add.w r8, sp, #4 │ │ movs r6, #2 │ │ sub.w r0, sl, r6 │ │ cmp r6, r4 │ │ mov.w r5, #0 │ │ it cc │ │ movcc r5, #1 │ │ cmp sl, r6 │ │ - bcc.n 8e036 │ │ + bcc.n 8e0a2 │ │ add.w r1, r9, r0 │ │ mov r0, r8 │ │ mov r2, r6 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #4] │ │ cmp r0, #0 │ │ - beq.n 8dfd2 │ │ + beq.n 8e03e │ │ cmp r6, r4 │ │ - bcs.n 8e01e │ │ + bcs.n 8e08a │ │ add r6, r5 │ │ cmp r6, r4 │ │ - bls.n 8dff0 │ │ - ldr r1, [pc, #48] @ (8e050 ) │ │ + bls.n 8e05c │ │ + ldr r1, [pc, #48] @ (8e0bc ) │ │ mov r3, sp │ │ - ldr r0, [pc, #48] @ (8e054 ) │ │ - ldr r2, [pc, #48] @ (8e058 ) │ │ + ldr r0, [pc, #48] @ (8e0c0 ) │ │ + ldr r2, [pc, #48] @ (8e0c4 ) │ │ add r1, pc │ │ add r0, pc │ │ strd r3, r1, [sp, #4] │ │ add r2, pc │ │ add r1, sp, #4 │ │ - bl 3fa58 │ │ - ldr r3, [pc, #44] @ (8e064 ) │ │ + bl 3fd60 │ │ + ldr r3, [pc, #44] @ (8e0d0 ) │ │ mov r1, sl │ │ mov r2, sl │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #24] @ (8e05c ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #24] @ (8e0c8 ) │ │ movs r1, #19 │ │ - ldr r2, [pc, #24] @ (8e060 ) │ │ + ldr r2, [pc, #24] @ (8e0cc ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ - cmp r0, #75 @ 0x4b │ │ - vcvt.s32.f32 d28, d26 │ │ - @ instruction: 0xfff7dbf6 │ │ + bl 3fd60 │ │ + cmp r2, #231 @ 0xe7 │ │ + vqshlu.s64 q14, , #59 @ 0x3b │ │ + @ instruction: 0xfff7db9a │ │ movs r4, r0 │ │ - add r7, sp, #316 @ 0x13c │ │ - @ instruction: 0xfff8dbda │ │ + add r6, sp, #908 @ 0x38c │ │ + @ instruction: 0xfff8db7e │ │ movs r4, r0 │ │ - blt.n 8e038 │ │ + blt.n 8dfec │ │ movs r4, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #120 @ 0x78 │ │ mov r4, r0 │ │ mov r0, sp │ │ - bl 3edda │ │ + bl 3f0e2 │ │ ldr r0, [sp, #0] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.n 8e0ac │ │ + bne.n 8e118 │ │ add r6, sp, #16 │ │ movs r1, #104 @ 0x68 │ │ ldrd r5, r8, [sp, #4] │ │ mov r0, r6 │ │ - bl d518e │ │ + bl d521e │ │ mov r0, r5 │ │ mov r1, r6 │ │ - blx d8910 │ │ + blx d8920 │ │ adds r0, #1 │ │ - beq.n 8e0c2 │ │ + beq.n 8e12e │ │ add.w r0, r4, #8 │ │ add r1, sp, #16 │ │ movs r2, #104 @ 0x68 │ │ - bl d4c50 │ │ + bl d50a2 │ │ movs r0, #0 │ │ - b.n 8e0d0 │ │ - ldr r1, [pc, #68] @ (8e0f4 ) │ │ + b.n 8e13c │ │ + ldr r1, [pc, #68] @ (8e160 ) │ │ movs r2, #1 │ │ add r1, pc │ │ ldrd r1, r3, [r1] │ │ str r3, [r4, #8] │ │ strd r2, r1, [r4] │ │ - cbz r0, 8e0ec │ │ + cbz r0, 8e158 │ │ ldr r5, [sp, #4] │ │ - b.n 8e0dc │ │ - blx d8850 │ │ + b.n 8e148 │ │ + blx d8860 │ │ movs r1, #0 │ │ ldr r0, [r0, #0] │ │ str r0, [r4, #8] │ │ movs r0, #1 │ │ strb r1, [r4, #4] │ │ movs r1, #0 │ │ cmp.w r8, #0 │ │ strb r1, [r5, #0] │ │ str r0, [r4, #0] │ │ - beq.n 8e0ec │ │ + beq.n 8e158 │ │ mov r0, r5 │ │ add sp, #120 @ 0x78 │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #120 @ 0x78 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - bge.n 8e0e0 │ │ + bge.n 8e094 │ │ movs r4, r0 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ mov ip, r0 │ │ ldrb r3, [r1, #0] │ │ ldrb.w lr, [ip] │ │ movs r0, #0 │ │ @@ -153772,225 +153687,225 @@ │ │ subs.w r2, lr, #5 │ │ it ls │ │ movls r2, r0 │ │ cmp r3, #6 │ │ it cc │ │ movcc r4, #0 │ │ cmp r2, r4 │ │ - bne.n 8e162 │ │ - cbz r2, 8e13c │ │ + bne.n 8e1ce │ │ + cbz r2, 8e1a8 │ │ cmp r2, #4 │ │ - bne.n 8e160 │ │ + bne.n 8e1cc │ │ ldr.w r2, [ip, #8] │ │ ldr r0, [r1, #8] │ │ cmp r2, r0 │ │ - bne.n 8e1be │ │ + bne.n 8e22a │ │ ldr.w r0, [ip, #4] │ │ ldr r1, [r1, #4] │ │ - blx d8860 │ │ + blx d8870 │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ pop {r4, r5, r7, pc} │ │ cmp r3, #5 │ │ - bhi.n 8e160 │ │ + bhi.n 8e1cc │ │ cmp lr, r3 │ │ - bne.n 8e162 │ │ + bne.n 8e1ce │ │ tbb [pc, lr] │ │ lsrs r3, r0, #24 │ │ lsls r4, r0, #12 │ │ lsls r2, r5, #16 │ │ - b.n 8e120 │ │ + b.n 8e18c │ │ ldrb r0, [r1, #1] │ │ ldrb.w r1, [ip, #1] │ │ subs r0, r1, r0 │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ pop {r4, r5, r7, pc} │ │ movs r0, #1 │ │ pop {r4, r5, r7, pc} │ │ ldr.w r2, [ip, #8] │ │ ldr r0, [r1, #8] │ │ cmp r2, r0 │ │ - bne.n 8e1be │ │ + bne.n 8e22a │ │ mov r4, r1 │ │ ldr.w r0, [ip, #4] │ │ ldr r1, [r1, #4] │ │ mov r5, ip │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, #0 │ │ popne {r4, r5, r7, pc} │ │ ldr r2, [r5, #16] │ │ ldr r0, [r4, #16] │ │ cmp r2, r0 │ │ - bne.n 8e1be │ │ + bne.n 8e22a │ │ ldr r0, [r5, #12] │ │ ldr r1, [r4, #12] │ │ - blx d8860 │ │ + blx d8870 │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ pop {r4, r5, r7, pc} │ │ ldr.w r2, [ip, #8] │ │ ldr r0, [r1, #8] │ │ cmp r2, r0 │ │ - bne.n 8e1be │ │ + bne.n 8e22a │ │ mov r4, r1 │ │ ldr.w r0, [ip, #4] │ │ ldr r1, [r1, #4] │ │ mov r5, ip │ │ - blx d8860 │ │ + blx d8870 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, #0 │ │ popne {r4, r5, r7, pc} │ │ - b.n 8e184 │ │ + b.n 8e1f0 │ │ movs r0, #0 │ │ pop {r4, r5, r7, pc} │ │ - bmi.n 8e16e │ │ + bmi.n 8e1da │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ mov r3, r1 │ │ ldrb r1, [r1, #28] │ │ cmp r1, #2 │ │ - bcs.n 8e1e2 │ │ + bcs.n 8e24e │ │ ldrb r1, [r3, #30] │ │ - cbz r1, 8e23c │ │ + cbz r1, 8e2a8 │ │ ldr r1, [r3, #4] │ │ cmp r1, #0 │ │ - beq.n 8e280 │ │ + beq.n 8e2ec │ │ movs r2, #1 │ │ - b.n 8e1e6 │ │ + b.n 8e252 │ │ ldr r1, [r3, #4] │ │ movs r2, #0 │ │ ldr.w r8, [r3] │ │ subs r5, r1, r2 │ │ add.w r3, r1, r8 │ │ add.w ip, r8, r2 │ │ subs r3, #1 │ │ - cbz r5, 8e218 │ │ + cbz r5, 8e284 │ │ mov r4, r5 │ │ ldrb.w r6, [r3], #-1 │ │ subs r5, #1 │ │ cmp r6, #47 @ 0x2f │ │ - bne.n 8e1f6 │ │ + bne.n 8e262 │ │ add r2, r4 │ │ cmp r2, r1 │ │ - bhi.n 8e28e │ │ + bhi.n 8e2fa │ │ add.w ip, r8, r2 │ │ mov.w lr, #1 │ │ subs r1, r1, r2 │ │ - bne.n 8e220 │ │ - b.n 8e258 │ │ + bne.n 8e28c │ │ + b.n 8e2c4 │ │ mov.w lr, #0 │ │ subs r1, r1, r2 │ │ - beq.n 8e258 │ │ + beq.n 8e2c4 │ │ cmp r1, #1 │ │ - beq.n 8e250 │ │ + beq.n 8e2bc │ │ cmp r1, #2 │ │ - bne.n 8e25c │ │ + bne.n 8e2c8 │ │ ldrb.w r2, [r8, r2] │ │ cmp r2, #46 @ 0x2e │ │ itt eq │ │ ldrbeq.w r2, [ip, #1] │ │ cmpeq r2, #46 @ 0x2e │ │ - bne.n 8e25c │ │ + bne.n 8e2c8 │ │ movs r2, #8 │ │ - b.n 8e25e │ │ + b.n 8e2ca │ │ ldr r1, [r3, #4] │ │ - cbz r1, 8e26e │ │ + cbz r1, 8e2da │ │ ldr r2, [r3, #0] │ │ cmp r1, #1 │ │ - bne.n 8e272 │ │ + bne.n 8e2de │ │ ldrb r2, [r2, #0] │ │ movs r1, #1 │ │ cmp r2, #46 @ 0x2e │ │ - beq.n 8e1de │ │ - b.n 8e1e4 │ │ + beq.n 8e24a │ │ + b.n 8e250 │ │ ldrb.w r2, [r8, r2] │ │ cmp r2, #46 @ 0x2e │ │ - bne.n 8e25c │ │ + bne.n 8e2c8 │ │ movs r2, #10 │ │ - b.n 8e25e │ │ + b.n 8e2ca │ │ movs r2, #9 │ │ strd ip, r1, [r0, #8] │ │ add r1, lr │ │ strb r2, [r0, #4] │ │ str r1, [r0, #0] │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ mov r2, r1 │ │ - b.n 8e1e6 │ │ + b.n 8e252 │ │ ldrb r6, [r2, #0] │ │ cmp r6, #46 @ 0x2e │ │ - bne.n 8e1e4 │ │ + bne.n 8e250 │ │ ldrb r2, [r2, #1] │ │ cmp r2, #47 @ 0x2f │ │ - beq.n 8e1de │ │ - b.n 8e1e4 │ │ - ldr r3, [pc, #24] @ (8e29c ) │ │ + beq.n 8e24a │ │ + b.n 8e250 │ │ + ldr r3, [pc, #24] @ (8e308 ) │ │ movs r0, #1 │ │ movs r1, #0 │ │ movs r2, #0 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r3, [pc, #16] @ (8e2a0 ) │ │ + bl 3fcb0 │ │ + ldr r3, [pc, #16] @ (8e30c ) │ │ mov r0, r2 │ │ mov r2, r1 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ nop │ │ - bls.n 8e378 │ │ + bls.n 8e32c │ │ movs r4, r0 │ │ - bls.n 8e344 │ │ + bhi.n 8e2f8 │ │ movs r4, r0 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r1 │ │ - bne.w d870c │ │ + bne.w d871c │ │ bx lr │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #12 │ │ ldrd r6, r3, [r1] │ │ cmp r3, #3 │ │ - bhi.n 8e2c8 │ │ + bhi.n 8e334 │ │ lsrs r2, r6, #8 │ │ movs r1, #19 │ │ - b.n 8e318 │ │ + b.n 8e384 │ │ mov r4, r6 │ │ sub.w r8, r3, #4 │ │ ldr.w lr, [r4], #4 │ │ strd r4, r8, [r1] │ │ cmn.w lr, #16 │ │ - bcc.n 8e2e8 │ │ + bcc.n 8e354 │ │ adds.w r5, lr, #1 │ │ - beq.n 8e30c │ │ + beq.n 8e378 │ │ movs r1, #16 │ │ movs r2, #0 │ │ - b.n 8e318 │ │ + b.n 8e384 │ │ mov.w sl, #4 │ │ mov r6, lr │ │ cmp r8, r6 │ │ - bcc.n 8e300 │ │ + bcc.n 8e36c │ │ sub.w r3, r8, r6 │ │ adds r5, r4, r6 │ │ cmp r6, #1 │ │ strd r5, r3, [r1] │ │ - bhi.n 8e336 │ │ + bhi.n 8e3a2 │ │ movs r1, #0 │ │ str r4, [r0, #12] │ │ str r4, [r0, #16] │ │ str r1, [r0, #20] │ │ movs r1, #19 │ │ - b.n 8e328 │ │ + b.n 8e394 │ │ cmp.w r8, #7 │ │ - bhi.n 8e376 │ │ + bhi.n 8e3e2 │ │ lsrs r2, r4, #8 │ │ movs r1, #19 │ │ mov r6, r4 │ │ movs r3, #0 │ │ str.w r2, [r0, #17] │ │ strb r3, [r0, #23] │ │ strh.w r3, [r0, #21] │ │ @@ -154002,125 +153917,125 @@ │ │ add sp, #12 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r1, r4 │ │ ldrh.w r8, [r1], #2 │ │ bic.w r3, r8, #1 │ │ cmp r3, #2 │ │ - bne.n 8e3aa │ │ + bne.n 8e416 │ │ subs r3, r6, #2 │ │ cmn.w lr, #16 │ │ - bcc.n 8e3b8 │ │ + bcc.n 8e424 │ │ cmp r3, #8 │ │ - bcc.n 8e3bc │ │ + bcc.n 8e428 │ │ ldrb r5, [r4, #9] │ │ ldr.w r3, [r4, #5] │ │ lsls r5, r5, #24 │ │ orrs.w r5, r5, r3, lsr #8 │ │ - bne.n 8e40c │ │ + bne.n 8e478 │ │ ldrb r5, [r1, #2] │ │ lsls r3, r3, #24 │ │ ldrh r1, [r1, #0] │ │ orr.w r1, r1, r5, lsl #16 │ │ sub.w r5, r6, #10 │ │ orr.w r9, r3, r1 │ │ add.w r1, r4, #10 │ │ - b.n 8e3dc │ │ + b.n 8e448 │ │ ldrb r5, [r6, #11] │ │ sub.w r8, r3, #12 │ │ ldr.w ip, [r6, #7] │ │ add.w r3, r6, #12 │ │ strd r3, r8, [r1] │ │ lsls r5, r5, #24 │ │ orrs.w r5, r5, ip, lsr #8 │ │ - bne.n 8e3b4 │ │ + bne.n 8e420 │ │ ldrb r5, [r4, #2] │ │ mov.w r6, ip, lsl #24 │ │ ldrh r4, [r4, #0] │ │ mov.w sl, #8 │ │ orr.w r5, r4, r5, lsl #16 │ │ mov r4, r3 │ │ orrs r6, r5 │ │ cmp r8, r6 │ │ - bcs.n 8e2f2 │ │ - b.n 8e300 │ │ + bcs.n 8e35e │ │ + b.n 8e36c │ │ movs r1, #0 │ │ strd r8, r1, [r0, #16] │ │ movs r1, #17 │ │ - b.n 8e328 │ │ + b.n 8e394 │ │ movs r1, #56 @ 0x38 │ │ - b.n 8e2e4 │ │ + b.n 8e350 │ │ cmp r3, #4 │ │ - bcs.n 8e3d4 │ │ + bcs.n 8e440 │ │ movs r2, #0 │ │ movs r3, #19 │ │ strb r3, [r0, #8] │ │ movs r3, #3 │ │ strb r3, [r0, #1] │ │ strd r1, r1, [r0, #12] │ │ str r2, [r0, #20] │ │ add sp, #12 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr.w r9, [r4, #2] │ │ adds r1, r4, #6 │ │ subs r5, r6, #6 │ │ - cbz r5, 8e406 │ │ + cbz r5, 8e472 │ │ mov r3, r1 │ │ mov.w ip, #25 │ │ ldrb.w fp, [r3], #1 │ │ cmp.w fp, #8 │ │ - bhi.n 8e424 │ │ + bhi.n 8e490 │ │ movs r4, #1 │ │ lsl.w r4, r4, fp │ │ tst.w r4, #278 @ 0x116 │ │ - beq.n 8e424 │ │ + beq.n 8e490 │ │ cmp r5, #1 │ │ - bne.n 8e410 │ │ + bne.n 8e47c │ │ movs r1, #0 │ │ strd r3, r3, [r0, #12] │ │ - b.n 8e306 │ │ + b.n 8e372 │ │ mov.w ip, #19 │ │ - b.n 8e424 │ │ + b.n 8e490 │ │ movs r3, #56 @ 0x38 │ │ - b.n 8e3c0 │ │ + b.n 8e42c │ │ ldrb r3, [r1, #1] │ │ - cbz r3, 8e436 │ │ + cbz r3, 8e4a2 │ │ movs r1, #3 │ │ strb r1, [r0, #1] │ │ movs r1, #68 @ 0x44 │ │ strb r1, [r0, #8] │ │ add sp, #12 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r2, #0 │ │ strd r1, r1, [r0, #12] │ │ str r2, [r0, #20] │ │ strb.w fp, [r0, #9] │ │ strb.w ip, [r0, #8] │ │ - b.n 8e32a │ │ + b.n 8e396 │ │ mov r4, r0 │ │ adds r0, r1, #2 │ │ str r0, [sp, #8] │ │ movs r0, #8 │ │ str r2, [sp, #4] │ │ cmn.w lr, #17 │ │ it hi │ │ movhi r0, #16 │ │ mov.w r1, fp, lsl #1 │ │ add r0, sl │ │ uxtb r1, r1 │ │ subs r5, #2 │ │ - bl d5610 │ │ + bl d561c │ │ cmp r1, #0 │ │ it ne │ │ rsbne r1, r1, fp, lsl #1 │ │ uxtb r0, r1 │ │ cmp r5, r0 │ │ - bcs.n 8e47c │ │ + bcs.n 8e4e8 │ │ movs r0, #0 │ │ ldr r1, [sp, #8] │ │ strd r1, r0, [r4, #16] │ │ movs r0, #19 │ │ strb r0, [r4, #8] │ │ movs r0, #3 │ │ strb r0, [r4, #1] │ │ @@ -154150,24 +154065,24 @@ │ │ strd r5, r0, [sp] │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 77834 │ │ + bl 7789c │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub.w sp, sp, #4096 @ 0x1000 │ │ sub sp, #8 │ │ movw r6, #16960 @ 0x4240 │ │ sub.w r3, r1, r1, lsr #1 │ │ @@ -154179,62 +154094,62 @@ │ │ it ls │ │ movls r6, r3 │ │ cmp r6, #48 @ 0x30 │ │ mov r2, r6 │ │ it ls │ │ movls r2, #48 @ 0x30 │ │ cmp.w r6, #512 @ 0x200 │ │ - bls.n 8e542 │ │ + bls.n 8e5ae │ │ movs r5, #0 │ │ cmp.w r5, r3, lsr #29 │ │ - bne.n 8e570 │ │ + bne.n 8e5dc │ │ movw r3, #65533 @ 0xfffd │ │ lsls r5, r2, #3 │ │ movt r3, #32767 @ 0x7fff │ │ cmp r5, r3 │ │ - bcs.n 8e570 │ │ + bcs.n 8e5dc │ │ mov r9, r0 │ │ mov r0, r5 │ │ mov r8, r2 │ │ mov sl, r1 │ │ - blx d87f0 │ │ - cbz r0, 8e574 │ │ + blx d8810 │ │ + cbz r0, 8e5e0 │ │ mov r4, r0 │ │ mov r1, sl │ │ mov r0, r9 │ │ mov r3, r8 │ │ - b.n 8e548 │ │ + b.n 8e5b4 │ │ add r4, sp, #4 │ │ mov.w r3, #512 @ 0x200 │ │ movs r2, #0 │ │ cmp r1, #65 @ 0x41 │ │ it cc │ │ movcc r2, #1 │ │ str r2, [sp, #0] │ │ mov r2, r4 │ │ - bl 8fbe0 │ │ + bl 8fc4c │ │ cmp.w r6, #512 @ 0x200 │ │ - bls.n 8e564 │ │ + bls.n 8e5d0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add.w sp, sp, #4096 @ 0x1000 │ │ add sp, #8 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ - bl 3e03c │ │ + bl 3e344 │ │ movs r0, #4 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ cmp.w r6, #512 @ 0x200 │ │ mov r5, r0 │ │ itt hi │ │ movhi r0, r4 │ │ - blxhi d87c0 │ │ + blxhi d87d0 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub.w sp, sp, #4096 @ 0x1000 │ │ sub sp, #16 │ │ movw r6, #53392 @ 0xd090 │ │ sub.w r3, r1, r1, lsr #1 │ │ @@ -154246,62 +154161,62 @@ │ │ it ls │ │ movls r6, r3 │ │ cmp r6, #48 @ 0x30 │ │ mov r2, r6 │ │ it ls │ │ movls r2, #48 @ 0x30 │ │ cmp r6, #129 @ 0x81 │ │ - bcc.n 8e5f0 │ │ + bcc.n 8e65c │ │ movs r5, #0 │ │ cmp.w r5, r3, lsr #27 │ │ - bne.n 8e61a │ │ + bne.n 8e686 │ │ movw r3, #65529 @ 0xfff9 │ │ lsls r5, r2, #5 │ │ movt r3, #32767 @ 0x7fff │ │ cmp r5, r3 │ │ - bcs.n 8e61a │ │ + bcs.n 8e686 │ │ mov r9, r0 │ │ mov r0, r5 │ │ mov r8, r2 │ │ mov sl, r1 │ │ - blx d87f0 │ │ - cbz r0, 8e61e │ │ + blx d8810 │ │ + cbz r0, 8e68a │ │ mov r4, r0 │ │ mov r1, sl │ │ mov r0, r9 │ │ mov r3, r8 │ │ - b.n 8e5f4 │ │ + b.n 8e660 │ │ add r4, sp, #8 │ │ movs r3, #128 @ 0x80 │ │ movs r2, #0 │ │ cmp r1, #65 @ 0x41 │ │ it cc │ │ movcc r2, #1 │ │ str r2, [sp, #0] │ │ mov r2, r4 │ │ - bl 8ee84 │ │ + bl 8eef0 │ │ cmp r6, #128 @ 0x80 │ │ - bls.n 8e60e │ │ + bls.n 8e67a │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add.w sp, sp, #4096 @ 0x1000 │ │ add sp, #16 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ - bl 3e03c │ │ + bl 3e344 │ │ movs r0, #8 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ cmp r6, #128 @ 0x80 │ │ mov r5, r0 │ │ itt hi │ │ movhi r0, r4 │ │ - blxhi d87c0 │ │ + blxhi d87d0 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ movs r0, #32 │ │ movs r3, #8 │ │ @@ -154309,24 +154224,24 @@ │ │ movs r5, #4 │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 77834 │ │ + bl 7789c │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ mov.w r0, #352 @ 0x160 │ │ movs r3, #8 │ │ @@ -154334,145 +154249,145 @@ │ │ movs r5, #4 │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 77834 │ │ + bl 7789c │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ mov sl, r0 │ │ ldrd r9, r0, [r0, #4] │ │ adds r4, r0, #1 │ │ mov r0, r9 │ │ subs r4, #1 │ │ - beq.n 8e6d8 │ │ + beq.n 8e744 │ │ add.w r6, r0, #352 @ 0x160 │ │ - bl 8c728 │ │ + bl 8c794 │ │ mov r0, r6 │ │ - b.n 8e6c8 │ │ + b.n 8e734 │ │ ldr.w r0, [sl] │ │ - cbz r0, 8e6ec │ │ + cbz r0, 8e758 │ │ mov r0, r9 │ │ ldmia.w sp!, {r8, r9, sl} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r8, r0 │ │ subs r4, #1 │ │ - beq.n 8e706 │ │ + beq.n 8e772 │ │ mov r0, r6 │ │ add.w r5, r6, #352 @ 0x160 │ │ - bl 8c728 │ │ + bl 8c794 │ │ mov r6, r5 │ │ - b.n 8e6f4 │ │ + b.n 8e760 │ │ ldr.w r0, [sl] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r9 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r8 │ │ - blx d6dd0 │ │ - bl 416fe │ │ + blx d6de0 │ │ + bl 41a06 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ ldrd sl, r8, [r0, #4] │ │ mov r9, r0 │ │ cmp.w r8, #0 │ │ - beq.n 8e7c4 │ │ + beq.n 8e830 │ │ add.w r6, sl, #288 @ 0x120 │ │ mov.w fp, #0 │ │ mov r5, r8 │ │ - b.n 8e74a │ │ + b.n 8e7b6 │ │ subs r5, #1 │ │ add.w r6, r6, #288 @ 0x120 │ │ cmp fp, r8 │ │ - beq.n 8e7c4 │ │ + beq.n 8e830 │ │ add.w r0, fp, fp, lsl #3 │ │ add.w fp, fp, #1 │ │ add.w r4, sl, r0, lsl #5 │ │ ldr.w r0, [r4, #256] @ 0x100 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 8e75e │ │ + bne.n 8e7ca │ │ cmp r1, #1 │ │ - bne.n 8e77c │ │ + bne.n 8e7e8 │ │ dmb ish │ │ ldr.w r0, [r4, #256] @ 0x100 │ │ - bl 801a6 │ │ + bl 8020e │ │ ldrd r0, r1, [r4, #16] │ │ eor.w r0, r0, #47 @ 0x2f │ │ orrs r0, r1 │ │ - beq.n 8e740 │ │ + beq.n 8e7ac │ │ ldr r0, [r4, #112] @ 0x70 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #116] @ 0x74 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r4, #124] @ 0x7c │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r4, #128] @ 0x80 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [r4, #136] @ 0x88 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r4, #140] @ 0x8c │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [r4, #148] @ 0x94 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r4, #152] @ 0x98 │ │ - blxne d87c0 │ │ - b.n 8e740 │ │ + blxne d87d0 │ │ + b.n 8e7ac │ │ ldr.w r0, [r9] │ │ - cbz r0, 8e7da │ │ + cbz r0, 8e846 │ │ mov r0, sl │ │ add sp, #4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r8, r0 │ │ add.w r0, r4, #16 │ │ - bl 8020e │ │ + bl 80276 │ │ subs r5, #1 │ │ - beq.n 8e7fe │ │ + beq.n 8e86a │ │ mov r0, r6 │ │ add.w r4, r6, #288 @ 0x120 │ │ - bl 8c6a0 │ │ + bl 8c70c │ │ mov r6, r4 │ │ - b.n 8e7ec │ │ + b.n 8e858 │ │ ldr.w r0, [r9] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, sl │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r8 │ │ - blx d6dd0 │ │ - bl 416fe │ │ + blx d6de0 │ │ + bl 41a06 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ mov.w r0, #288 @ 0x120 │ │ movs r3, #8 │ │ @@ -154480,28 +154395,28 @@ │ │ movs r5, #4 │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 77834 │ │ + bl 7789c │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ - bmi.n 8e802 │ │ - cbz r2, 8e870 │ │ + bl 3e2ac │ │ + bmi.n 8e86e │ │ + cbz r2, 8e8dc │ │ cmp r2, #4 │ │ - bcs.n 8e890 │ │ + bcs.n 8e8fc │ │ strd r1, r1, [r0, #12] │ │ movs r1, #19 │ │ movs r2, #0 │ │ strb r1, [r0, #8] │ │ movs r1, #10 │ │ str r2, [r0, #20] │ │ strb r1, [r0, #0] │ │ @@ -154518,41 +154433,41 @@ │ │ bx lr │ │ push {r4, r5, r6, lr} │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #52 @ 0x34 │ │ mov r6, r1 │ │ ldr.w r5, [r6], #4 │ │ cmp r5, #2 │ │ - bne.n 8e8ba │ │ + bne.n 8e926 │ │ mov.w ip, #2 │ │ bic.w r4, r2, #3 │ │ cmp r4, #4 │ │ - bne.n 8e8cc │ │ + bne.n 8e938 │ │ movs r1, #0 │ │ strd r6, r6, [r0, #12] │ │ str r1, [r0, #20] │ │ movs r1, #19 │ │ - b.n 8e8ee │ │ + b.n 8e95a │ │ uxth r3, r5 │ │ cmp r3, #5 │ │ - bne.n 8e8d4 │ │ + bne.n 8e940 │ │ mov.w ip, #5 │ │ bic.w r4, r2, #3 │ │ cmp r4, #4 │ │ - beq.n 8e8ae │ │ + beq.n 8e91a │ │ cmp r4, #8 │ │ - bne.n 8e8de │ │ + bne.n 8e94a │ │ adds r1, #8 │ │ - b.n 8e8e4 │ │ + b.n 8e950 │ │ movs r1, #0 │ │ strd r3, r1, [r0, #16] │ │ movs r1, #17 │ │ - b.n 8e8ee │ │ + b.n 8e95a │ │ cmp r4, #12 │ │ - bne.n 8e8fc │ │ + bne.n 8e968 │ │ adds r1, #12 │ │ movs r2, #0 │ │ str r1, [r0, #16] │ │ str r1, [r0, #12] │ │ movs r1, #19 │ │ str r2, [r0, #20] │ │ strb r1, [r0, #8] │ │ @@ -154563,33 +154478,33 @@ │ │ pop {r4, r5, r6, pc} │ │ ldr.w fp, [r1, #12] │ │ add.w r4, r1, #16 │ │ ldr.w lr, [r1, #4] │ │ subs r2, #16 │ │ ldr.w r8, [r1, #8] │ │ cmp.w fp, #0 │ │ - beq.n 8e93a │ │ + beq.n 8e9a6 │ │ cmp fp, r8 │ │ - bls.n 8e958 │ │ + bls.n 8e9c4 │ │ sub.w r6, fp, #1 │ │ ands.w r6, r6, fp │ │ - bne.n 8e958 │ │ + bne.n 8e9c4 │ │ cmp.w fp, #536870912 @ 0x20000000 │ │ - bcs.w 8ea8c │ │ + bcs.w 8eaf8 │ │ mov.w r9, fp, lsl #3 │ │ cmp r2, r9 │ │ - bcs.n 8e968 │ │ + bcs.n 8e9d4 │ │ movs r1, #0 │ │ strd r4, r4, [r0, #12] │ │ - b.n 8e8b4 │ │ + b.n 8e920 │ │ movs r3, #0 │ │ mov.w r9, #0 │ │ mov r1, r4 │ │ cmp.w lr, #8 │ │ - bls.n 8e980 │ │ + bls.n 8e9ec │ │ movs r1, #10 │ │ strb r1, [r0, #0] │ │ movs r1, #74 @ 0x4a │ │ strb r1, [r0, #8] │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, pc} │ │ @@ -154599,161 +154514,161 @@ │ │ strb r1, [r0, #8] │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, pc} │ │ sub.w r2, r2, r9 │ │ add.w r1, r4, r9 │ │ cmp.w r2, fp, lsl #2 │ │ - bcc.n 8e8e4 │ │ + bcc.n 8e950 │ │ mov.w r3, fp, lsl #2 │ │ cmp.w lr, #8 │ │ - bhi.n 8e948 │ │ + bhi.n 8e9b4 │ │ sub.w sl, r2, r3 │ │ adds r6, r1, r3 │ │ cmp.w lr, #0 │ │ str r6, [sp, #48] @ 0x30 │ │ - beq.n 8ea54 │ │ + beq.n 8eac0 │ │ add.w r6, r3, lr, lsl #2 │ │ str.w r8, [sp, #24] │ │ add.w r8, r6, r1 │ │ str.w r8, [sp, #28] │ │ sub.w r8, r2, r6 │ │ cmp r5, #2 │ │ - bne.n 8ea90 │ │ + bne.n 8eafc │ │ cmp.w sl, #4 │ │ - bcc.n 8ea96 │ │ + bcc.n 8eb02 │ │ strd r4, r3, [sp, #32] │ │ ldr r3, [sp, #48] @ 0x30 │ │ strd r1, r9, [sp, #40] @ 0x28 │ │ mov r9, r3 │ │ ldr.w r4, [r9], #4 │ │ subs r2, r4, #1 │ │ cmp r2, #7 │ │ - bhi.w 8edbe │ │ - ldr r5, [pc, #912] @ (8ed58 ) │ │ + bhi.w 8ee2a │ │ + ldr r5, [pc, #912] @ (8edc4 ) │ │ cmp.w lr, #1 │ │ add r5, pc │ │ ldrb r1, [r5, r2] │ │ - beq.w 8ead8 │ │ + beq.w 8eb44 │ │ bic.w sl, sl, #3 │ │ cmp.w sl, #4 │ │ - beq.n 8ea9a │ │ + beq.n 8eb06 │ │ ldr r4, [r3, #4] │ │ subs r2, r4, #1 │ │ cmp r2, #7 │ │ - bhi.w 8edbe │ │ - ldr r5, [pc, #884] @ (8ed5c ) │ │ + bhi.w 8ee2a │ │ + ldr r5, [pc, #884] @ (8edc8 ) │ │ cmp.w lr, #2 │ │ add r5, pc │ │ ldrb r3, [r5, r2] │ │ - beq.w 8eb9c │ │ + beq.w 8ec08 │ │ cmp.w sl, #8 │ │ - beq.w 8ebb6 │ │ + beq.w 8ec22 │ │ ldr r2, [sp, #48] @ 0x30 │ │ ldr r4, [r2, #8] │ │ subs r2, r4, #1 │ │ cmp r2, #7 │ │ - bhi.w 8edbe │ │ - ldr r5, [pc, #852] @ (8ed60 ) │ │ + bhi.w 8ee2a │ │ + ldr r5, [pc, #852] @ (8edcc ) │ │ cmp.w lr, #3 │ │ add r5, pc │ │ ldrb r2, [r5, r2] │ │ str r2, [sp, #20] │ │ - beq.w 8ebea │ │ + beq.w 8ec56 │ │ cmp.w sl, #12 │ │ - beq.w 8ec00 │ │ + beq.w 8ec6c │ │ ldr r2, [sp, #48] @ 0x30 │ │ ldr r4, [r2, #12] │ │ subs r2, r4, #1 │ │ cmp r2, #7 │ │ - bhi.w 8edbe │ │ - ldr r5, [pc, #820] @ (8ed64 ) │ │ + bhi.w 8ee2a │ │ + ldr r5, [pc, #820] @ (8edd0 ) │ │ cmp.w lr, #4 │ │ add r5, pc │ │ ldrb r6, [r5, r2] │ │ - bne.w 8ec4a │ │ + bne.w 8ecb6 │ │ movs r2, #0 │ │ mov sl, r8 │ │ strd r2, r2, [sp, #8] │ │ mov.w r9, #0 │ │ str r2, [sp, #16] │ │ mov r4, r6 │ │ ldr r2, [sp, #28] │ │ str r2, [sp, #48] @ 0x30 │ │ ldr.w r8, [sp, #24] │ │ - b.n 8ea6e │ │ + b.n 8eada │ │ strd r4, r3, [sp, #32] │ │ movs r4, #0 │ │ strd r1, r9, [sp, #40] @ 0x28 │ │ movs r1, #0 │ │ mov.w r9, #0 │ │ movs r3, #0 │ │ strd r1, r1, [sp, #8] │ │ str r1, [sp, #16] │ │ str r1, [sp, #20] │ │ umull r2, r5, r8, lr │ │ subs.w r6, r2, #1073741824 @ 0x40000000 │ │ sbcs.w r5, r5, #0 │ │ - bcs.n 8ea8c │ │ + bcs.n 8eaf8 │ │ cmp.w sl, r2, lsl #2 │ │ - bcs.n 8eaf6 │ │ + bcs.n 8eb62 │ │ ldr r2, [sp, #48] @ 0x30 │ │ movs r1, #0 │ │ strd r2, r2, [r0, #12] │ │ - b.n 8e8b4 │ │ + b.n 8e920 │ │ movs r1, #56 @ 0x38 │ │ - b.n 8e8ee │ │ + b.n 8e95a │ │ cmp.w sl, #4 │ │ - bcs.n 8eaa2 │ │ + bcs.n 8eb0e │ │ ldr.w r9, [sp, #48] @ 0x30 │ │ movs r1, #0 │ │ strd r9, r9, [r0, #12] │ │ - b.n 8e8b4 │ │ + b.n 8e920 │ │ strd r1, r9, [sp, #40] @ 0x28 │ │ movs r5, #77 @ 0x4d │ │ ldr.w r9, [sp, #48] @ 0x30 │ │ strd r4, r3, [sp, #32] │ │ ldr.w r4, [r9], #4 │ │ subs r2, r4, #1 │ │ cmp r2, #7 │ │ - bhi.w 8edc0 │ │ + bhi.w 8ee2c │ │ mov r1, r5 │ │ uxtb r6, r2 │ │ movs r5, #253 @ 0xfd │ │ lsrs r5, r6 │ │ lsls r5, r5, #31 │ │ mov r5, r1 │ │ - beq.w 8edc0 │ │ - ldr r5, [pc, #828] @ (8ee0c ) │ │ + beq.w 8ee2c │ │ + ldr r5, [pc, #828] @ (8ee78 ) │ │ cmp.w lr, #1 │ │ add r5, pc │ │ ldrb r1, [r5, r2] │ │ - bne.n 8eb6a │ │ + bne.n 8ebd6 │ │ movs r2, #0 │ │ mov.w r9, #0 │ │ strd r2, r2, [sp, #8] │ │ movs r4, #0 │ │ str r2, [sp, #16] │ │ movs r3, #0 │ │ str r2, [sp, #20] │ │ ldr r2, [sp, #28] │ │ mov sl, r8 │ │ str r2, [sp, #48] @ 0x30 │ │ ldr.w r8, [sp, #24] │ │ - b.n 8ea6e │ │ + b.n 8eada │ │ str.w r9, [sp, #4] │ │ lsls r2, r2, #2 │ │ ldr.w r9, [sp, #48] @ 0x30 │ │ sub.w r6, sl, r2 │ │ cmp r6, r2 │ │ add.w r5, r9, r2 │ │ - bcs.n 8eb14 │ │ + bcs.n 8eb80 │ │ movs r1, #0 │ │ strd r5, r5, [r0, #12] │ │ - b.n 8e8b4 │ │ + b.n 8e920 │ │ strh.w ip, [r0, #52] @ 0x34 │ │ mov ip, r1 │ │ ldr r1, [sp, #8] │ │ ldr r6, [sp, #12] │ │ strd r5, r2, [r0, #32] │ │ mov r5, r3 │ │ lsls r1, r1, #24 │ │ @@ -154781,347 +154696,347 @@ │ │ strd r1, r9, [r0, #20] │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, pc} │ │ ldr r2, [sp, #48] @ 0x30 │ │ bic.w sl, sl, #3 │ │ cmp.w sl, #4 │ │ - beq.n 8ea9a │ │ + beq.n 8eb06 │ │ ldr r4, [r2, #4] │ │ movs r3, #77 @ 0x4d │ │ subs r2, r4, #1 │ │ cmp r2, #7 │ │ - bhi.n 8ebac │ │ + bhi.n 8ec18 │ │ uxtb r5, r2 │ │ movs r6, #253 @ 0xfd │ │ lsr.w r5, r6, r5 │ │ lsls r5, r5, #31 │ │ mov r5, r3 │ │ - beq.w 8edc0 │ │ - ldr r5, [pc, #636] @ (8ee10 ) │ │ + beq.w 8ee2c │ │ + ldr r5, [pc, #636] @ (8ee7c ) │ │ cmp.w lr, #2 │ │ add r5, pc │ │ ldrb r3, [r5, r2] │ │ - bne.n 8ebb0 │ │ + bne.n 8ec1c │ │ movs r2, #0 │ │ mov.w r9, #0 │ │ strd r2, r2, [sp, #8] │ │ movs r4, #0 │ │ str r2, [sp, #16] │ │ - b.n 8eae8 │ │ + b.n 8eb54 │ │ mov r5, r3 │ │ - b.n 8edc0 │ │ + b.n 8ee2c │ │ cmp.w sl, #8 │ │ - bne.n 8ebbe │ │ + bne.n 8ec2a │ │ ldr r1, [sp, #48] @ 0x30 │ │ add.w r9, r1, #8 │ │ - b.n 8ea9a │ │ + b.n 8eb06 │ │ ldr r2, [sp, #48] @ 0x30 │ │ mov.w r9, #77 @ 0x4d │ │ ldr r4, [r2, #8] │ │ subs r2, r4, #1 │ │ cmp r2, #7 │ │ - bhi.w 8edf8 │ │ + bhi.w 8ee64 │ │ uxtb r5, r2 │ │ lsr.w r5, r6, r5 │ │ lsls r5, r5, #31 │ │ mov r5, r9 │ │ - beq.w 8edc0 │ │ - ldr r5, [pc, #564] @ (8ee14 ) │ │ + beq.w 8ee2c │ │ + ldr r5, [pc, #564] @ (8ee80 ) │ │ cmp.w lr, #3 │ │ add r5, pc │ │ ldrb r2, [r5, r2] │ │ str r2, [sp, #20] │ │ - bne.n 8ebfa │ │ + bne.n 8ec66 │ │ movs r2, #0 │ │ mov.w r9, #0 │ │ movs r4, #0 │ │ strd r2, r2, [sp, #8] │ │ str r2, [sp, #16] │ │ - b.n 8eaea │ │ + b.n 8eb56 │ │ cmp.w sl, #12 │ │ - bne.n 8ec08 │ │ + bne.n 8ec74 │ │ ldr r1, [sp, #48] @ 0x30 │ │ add.w r9, r1, #12 │ │ - b.n 8ea9a │ │ + b.n 8eb06 │ │ ldr r2, [sp, #48] @ 0x30 │ │ ldr r4, [r2, #12] │ │ subs r2, r4, #1 │ │ cmp r2, #7 │ │ - bhi.w 8edf8 │ │ + bhi.w 8ee64 │ │ uxtb r5, r2 │ │ lsr.w r5, r6, r5 │ │ lsls r5, r5, #31 │ │ mov r5, r9 │ │ - beq.w 8edc0 │ │ - ldr r5, [pc, #500] @ (8ee18 ) │ │ + beq.w 8ee2c │ │ + ldr r5, [pc, #500] @ (8ee84 ) │ │ cmp.w lr, #4 │ │ add r5, pc │ │ ldrb r2, [r5, r2] │ │ str r2, [sp, #0] │ │ - bne.n 8ec84 │ │ + bne.n 8ecf0 │ │ movs r2, #0 │ │ mov sl, r8 │ │ strd r2, r2, [sp, #8] │ │ mov.w r9, #0 │ │ str r2, [sp, #16] │ │ ldr r2, [sp, #28] │ │ str r2, [sp, #48] @ 0x30 │ │ ldr.w r8, [sp, #24] │ │ ldr r4, [sp, #0] │ │ - b.n 8ea6e │ │ + b.n 8eada │ │ cmp.w sl, #16 │ │ - beq.n 8ec8a │ │ + beq.n 8ecf6 │ │ ldr r2, [sp, #48] @ 0x30 │ │ ldr r4, [r2, #16] │ │ subs r2, r4, #1 │ │ cmp r2, #7 │ │ - bhi.w 8edbe │ │ - ldr r5, [pc, #412] @ (8edfc ) │ │ + bhi.w 8ee2a │ │ + ldr r5, [pc, #412] @ (8ee68 ) │ │ cmp.w lr, #5 │ │ add r5, pc │ │ ldrb r2, [r5, r2] │ │ str r2, [sp, #4] │ │ - bne.n 8ecd2 │ │ + bne.n 8ed3e │ │ movs r2, #0 │ │ strd r2, r2, [sp, #8] │ │ str r2, [sp, #16] │ │ ldr r2, [sp, #28] │ │ mov sl, r8 │ │ str r2, [sp, #48] @ 0x30 │ │ mov r4, r6 │ │ ldr.w r8, [sp, #24] │ │ ldr.w r9, [sp, #4] │ │ - b.n 8ea6e │ │ + b.n 8eada │ │ cmp.w sl, #16 │ │ - bne.n 8ec92 │ │ + bne.n 8ecfe │ │ ldr r1, [sp, #48] @ 0x30 │ │ add.w r9, r1, #16 │ │ - b.n 8ea9a │ │ + b.n 8eb06 │ │ ldr r2, [sp, #48] @ 0x30 │ │ ldr r4, [r2, #16] │ │ subs r2, r4, #1 │ │ cmp r2, #7 │ │ - bhi.w 8edf8 │ │ + bhi.w 8ee64 │ │ uxtb r5, r2 │ │ lsr.w r5, r6, r5 │ │ lsls r5, r5, #31 │ │ mov r5, r9 │ │ - beq.w 8edc0 │ │ - ldr r5, [pc, #364] @ (8ee1c ) │ │ + beq.w 8ee2c │ │ + ldr r5, [pc, #364] @ (8ee88 ) │ │ cmp.w lr, #5 │ │ add r5, pc │ │ ldrb r2, [r5, r2] │ │ str r2, [sp, #4] │ │ - bne.n 8ecf8 │ │ + bne.n 8ed64 │ │ movs r2, #0 │ │ strd r2, r2, [sp, #8] │ │ str r2, [sp, #16] │ │ ldr r2, [sp, #28] │ │ mov sl, r8 │ │ str r2, [sp, #48] @ 0x30 │ │ ldr.w r8, [sp, #24] │ │ ldrd r4, r9, [sp] │ │ - b.n 8ea6e │ │ + b.n 8eada │ │ cmp.w sl, #20 │ │ - beq.n 8ecfe │ │ + beq.n 8ed6a │ │ ldr r2, [sp, #48] @ 0x30 │ │ ldr r4, [r2, #20] │ │ subs r2, r4, #1 │ │ cmp r2, #7 │ │ - bhi.n 8edbe │ │ - ldr r5, [pc, #284] @ (8ee00 ) │ │ + bhi.n 8ee2a │ │ + ldr r5, [pc, #284] @ (8ee6c ) │ │ cmp.w lr, #6 │ │ add r5, pc │ │ ldrb r2, [r5, r2] │ │ str r2, [sp, #16] │ │ - bne.n 8ed32 │ │ + bne.n 8ed9e │ │ movs r2, #0 │ │ strd r2, r2, [sp, #8] │ │ - b.n 8ec72 │ │ + b.n 8ecde │ │ cmp.w sl, #20 │ │ - bne.n 8ed06 │ │ + bne.n 8ed72 │ │ ldr r1, [sp, #48] @ 0x30 │ │ add.w r9, r1, #20 │ │ - b.n 8ea9a │ │ + b.n 8eb06 │ │ ldr r2, [sp, #48] @ 0x30 │ │ ldr r4, [r2, #20] │ │ subs r2, r4, #1 │ │ cmp r2, #7 │ │ - bhi.n 8edf8 │ │ + bhi.n 8ee64 │ │ uxtb r5, r2 │ │ lsr.w r5, r6, r5 │ │ lsls r5, r5, #31 │ │ mov r5, r9 │ │ - beq.n 8edc0 │ │ - ldr r5, [pc, #256] @ (8ee20 ) │ │ + beq.n 8ee2c │ │ + ldr r5, [pc, #256] @ (8ee8c ) │ │ cmp.w lr, #6 │ │ add r5, pc │ │ ldrb r2, [r5, r2] │ │ str r2, [sp, #16] │ │ - bne.n 8ed68 │ │ + bne.n 8edd4 │ │ movs r2, #0 │ │ strd r2, r2, [sp, #8] │ │ - b.n 8ecc2 │ │ + b.n 8ed2e │ │ cmp.w sl, #24 │ │ - beq.n 8ed6e │ │ + beq.n 8edda │ │ ldr r2, [sp, #48] @ 0x30 │ │ ldr r4, [r2, #24] │ │ subs r2, r4, #1 │ │ cmp r2, #7 │ │ - bhi.n 8edbe │ │ - ldr r5, [pc, #192] @ (8ee04 ) │ │ + bhi.n 8ee2a │ │ + ldr r5, [pc, #192] @ (8ee70 ) │ │ cmp.w lr, #7 │ │ add r5, pc │ │ ldrb r2, [r5, r2] │ │ str r2, [sp, #12] │ │ - bne.n 8ed9e │ │ + bne.n 8ee0a │ │ movs r2, #0 │ │ str r2, [sp, #8] │ │ - b.n 8ec72 │ │ + b.n 8ecde │ │ nop │ │ - ldrb r6, [r3, #6] │ │ - vqrshrn.u64 d23, q14, #8 │ │ - vqrshrn.u64 d23, q5, #8 │ │ - vqshrn.u64 d23, q11, #8 │ │ + ldrb r2, [r6, #4] │ │ + vqshrn.u64 d23, q0, #8 │ │ + vtbx.8 d23, {d24}, d30 │ │ + vtbx.8 d23, {d24}, d10 │ │ vsra.u64 d31, d26, #8 │ │ lsrs r0, r3, #28 │ │ - bne.n 8ed76 │ │ + bne.n 8ede2 │ │ ldr r1, [sp, #48] @ 0x30 │ │ add.w r9, r1, #24 │ │ - b.n 8ea9a │ │ + b.n 8eb06 │ │ ldr r2, [sp, #48] @ 0x30 │ │ ldr r4, [r2, #24] │ │ subs r2, r4, #1 │ │ cmp r2, #7 │ │ - bhi.n 8edf8 │ │ + bhi.n 8ee64 │ │ uxtb r5, r2 │ │ lsr.w r5, r6, r5 │ │ lsls r5, r5, #31 │ │ mov r5, r9 │ │ - beq.n 8edc0 │ │ - ldr r5, [pc, #148] @ (8ee24 ) │ │ + beq.n 8ee2c │ │ + ldr r5, [pc, #148] @ (8ee90 ) │ │ cmp.w lr, #7 │ │ add r5, pc │ │ ldrb r2, [r5, r2] │ │ str r2, [sp, #12] │ │ - bne.n 8edc6 │ │ + bne.n 8ee32 │ │ movs r2, #0 │ │ - b.n 8edf4 │ │ + b.n 8ee60 │ │ ldr r2, [sp, #48] @ 0x30 │ │ cmp.w sl, #28 │ │ add.w r9, r2, #28 │ │ - beq.w 8ea9a │ │ + beq.w 8eb06 │ │ ldr.w r4, [r9] │ │ subs r2, r4, #1 │ │ cmp r2, #7 │ │ - bhi.n 8edbe │ │ - ldr r5, [pc, #80] @ (8ee08 ) │ │ + bhi.n 8ee2a │ │ + ldr r5, [pc, #80] @ (8ee74 ) │ │ add r5, pc │ │ ldrb r2, [r5, r2] │ │ - b.n 8ed52 │ │ + b.n 8edbe │ │ movs r5, #78 @ 0x4e │ │ str r4, [r0, #12] │ │ strb r5, [r0, #8] │ │ - b.n 8e8f0 │ │ + b.n 8e95c │ │ ldr r2, [sp, #48] @ 0x30 │ │ cmp.w sl, #28 │ │ add.w r9, r2, #28 │ │ - beq.w 8ea9a │ │ + beq.w 8eb06 │ │ ldr.w r4, [r9] │ │ mov.w r9, #77 @ 0x4d │ │ subs r2, r4, #1 │ │ cmp r2, #7 │ │ - bhi.n 8edf8 │ │ + bhi.n 8ee64 │ │ uxtb r5, r2 │ │ lsr.w r5, r6, r5 │ │ lsls r5, r5, #31 │ │ mov r5, r9 │ │ - beq.n 8edc0 │ │ - ldr r5, [pc, #56] @ (8ee28 ) │ │ + beq.n 8ee2c │ │ + ldr r5, [pc, #56] @ (8ee94 ) │ │ add r5, pc │ │ ldrb r2, [r5, r2] │ │ str r2, [sp, #8] │ │ - b.n 8ecc2 │ │ + b.n 8ed2e │ │ mov r5, r9 │ │ - b.n 8edc0 │ │ - strb r6, [r0, #28] │ │ - vpadal.u32 d23, d0 │ │ - vpadal.s32 d23, d16 │ │ - vsli.64 d23, d16, #56 @ 0x38 │ │ - vqshrun.s64 d23, q15, #8 │ │ - vqshl.u32 , q13, #24 │ │ - vqabs.s32 d23, d30 │ │ - vpadal.u32 , q12 │ │ - vqshlu.s32 , q7, #24 │ │ - @ instruction: 0xfff875ee │ │ - vsli.32 , q15, #24 │ │ - vabal.u , d8, d16 │ │ + b.n 8ee2c │ │ + strb r2, [r3, #26] │ │ + vqshlu.s32 d23, d4, #24 │ │ + vsli.64 d23, d20, #56 @ 0x38 │ │ + @ instruction: 0xfff87544 │ │ + vqshl.u64 , q1, #56 @ 0x38 │ │ + vqabs.s32 d23, d14 │ │ + vpadal.u32 , q1 │ │ + vqshlu.s32 , q14, #24 │ │ + vsli.64 , q9, #56 @ 0x38 │ │ + vabal.u , d24, d2 │ │ + vsli.32 d23, d2, #24 │ │ + vsri.64 d23, d20, #8 │ │ vsli.64 d27, d16, #56 @ 0x38 │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ ldr r0, [r0, #0] │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 8ee38 │ │ + bne.n 8eea4 │ │ cmp r1, #1 │ │ - bne.n 8ee54 │ │ + bne.n 8eec0 │ │ dmb ish │ │ mov r0, r4 │ │ - bl 7e154 │ │ + bl 7e1bc │ │ adds r0, r4, #4 │ │ - bl 8c558 │ │ + bl 8c5c4 │ │ ldrd r0, r1, [r4, #20] │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w 8c5c0 │ │ + b.w 8c62c │ │ mov r5, r0 │ │ adds r0, r4, #4 │ │ - bl 8c558 │ │ - b.n 8ee72 │ │ + bl 8c5c4 │ │ + b.n 8eede │ │ mov r5, r0 │ │ ldrd r0, r1, [r4, #20] │ │ - bl 8c5c0 │ │ + bl 8c62c │ │ mov r0, r5 │ │ - blx d6dd0 │ │ - bl 416fe │ │ + blx d6de0 │ │ + bl 41a06 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #412 @ 0x19c │ │ mov r5, r1 │ │ mov fp, r3 │ │ str r2, [sp, #60] @ 0x3c │ │ mov.w r1, #1073741824 @ 0x40000000 │ │ str r0, [sp, #56] @ 0x38 │ │ movs r0, #0 │ │ mov r2, r5 │ │ movs r3, #0 │ │ - bl d53d0 │ │ + bl d53dc │ │ umull r2, r3, r0, r5 │ │ adds r6, r0, #1 │ │ adc.w r4, r1, #0 │ │ mla r3, r1, r5, r3 │ │ eor.w r3, r3, #1073741824 @ 0x40000000 │ │ orrs r2, r3 │ │ it eq │ │ moveq r4, r1 │ │ str r4, [sp, #20] │ │ it eq │ │ moveq r6, r0 │ │ cmp.w r5, #4096 @ 0x1000 │ │ str r6, [sp, #24] │ │ - bhi.n 8eed6 │ │ + bhi.n 8ef42 │ │ sub.w r0, r5, r5, lsr #1 │ │ cmp r0, #64 @ 0x40 │ │ it cs │ │ movcs r0, #64 @ 0x40 │ │ - b.n 8eef8 │ │ + b.n 8ef64 │ │ orr.w r0, r5, #1 │ │ movs r2, #1 │ │ clz r0, r0 │ │ eor.w r0, r0, #31 │ │ and.w r1, r0, #1 │ │ add.w r0, r1, r0, lsr #1 │ │ lsr.w r1, r5, r0 │ │ @@ -155144,115 +155059,115 @@ │ │ str r0, [sp, #12] │ │ strd r5, fp, [sp, #36] @ 0x24 │ │ ldr r0, [sp, #56] @ 0x38 │ │ cmp r6, r2 │ │ str r2, [sp, #64] @ 0x40 │ │ add.w r0, r0, r2, lsl #5 │ │ str r0, [sp, #44] @ 0x2c │ │ - bls.n 8ef60 │ │ + bls.n 8efcc │ │ subs r4, r6, r2 │ │ ldr r0, [sp, #28] │ │ str.w ip, [sp, #76] @ 0x4c │ │ cmp r4, r0 │ │ - bcs.n 8ef70 │ │ + bcs.n 8efdc │ │ ldr r0, [r7, #8] │ │ - cbz r0, 8ef96 │ │ + cbz r0, 8f002 │ │ movs r0, #0 │ │ cmp r4, #32 │ │ strd r0, r0, [sp] │ │ it cs │ │ movcs r4, #32 │ │ ldr r0, [sp, #44] @ 0x2c │ │ mov r1, r4 │ │ ldr r2, [sp, #60] @ 0x3c │ │ mov r3, fp │ │ - bl 8f318 │ │ + bl 8f384 │ │ lsls r0, r4, #1 │ │ adds r1, r0, #1 │ │ - b.n 8efa0 │ │ + b.n 8f00c │ │ movs r0, #1 │ │ movs r1, #0 │ │ str r0, [sp, #48] @ 0x30 │ │ cmp.w ip, #2 │ │ - bcs.w 8f11a │ │ - b.n 8f2d0 │ │ + bcs.w 8f186 │ │ + b.n 8f33c │ │ cmp r4, #2 │ │ - bcc.w 8f0ba │ │ + bcc.w 8f126 │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldrd lr, ip, [r0, #8] │ │ ldrd r9, r8, [r0, #40] @ 0x28 │ │ subs.w r0, r9, lr │ │ sbcs.w r0, r8, ip │ │ - bcs.n 8efac │ │ + bcs.n 8f018 │ │ cmp r4, #2 │ │ - bne.n 8efb4 │ │ + bne.n 8f020 │ │ movs r0, #2 │ │ mov.w r8, #1 │ │ - b.n 8f026 │ │ + b.n 8f092 │ │ ldr r0, [sp, #28] │ │ cmp r4, r0 │ │ it cs │ │ movcs r4, r0 │ │ lsls r1, r4, #1 │ │ sub.w r8, r7, #94 @ 0x5e │ │ add.w r9, sp, #80 @ 0x50 │ │ ldr r2, [sp, #64] @ 0x40 │ │ - b.n 8f0c8 │ │ + b.n 8f134 │ │ cmp r4, #2 │ │ - bne.n 8efdc │ │ + bne.n 8f048 │ │ movs r4, #2 │ │ - b.n 8f0ba │ │ + b.n 8f126 │ │ ldr r1, [sp, #64] @ 0x40 │ │ mov r6, r8 │ │ ldr r0, [sp, #12] │ │ add.w r5, r0, r1, lsl #5 │ │ movs r0, #2 │ │ mov r1, r9 │ │ ldrd r3, r2, [r5] │ │ subs r1, r3, r1 │ │ sbcs.w r1, r2, r6 │ │ - bcs.n 8f00c │ │ + bcs.n 8f078 │ │ adds r0, #1 │ │ adds r5, #32 │ │ mov r1, r3 │ │ mov r6, r2 │ │ cmp r4, r0 │ │ - bne.n 8efc2 │ │ - b.n 8f002 │ │ + bne.n 8f02e │ │ + b.n 8f06e │ │ ldr r1, [sp, #64] @ 0x40 │ │ mov r3, r9 │ │ ldr r0, [sp, #12] │ │ mov r2, r8 │ │ add.w r5, r0, r1, lsl #5 │ │ movs r0, #2 │ │ ldrd r6, r1, [r5] │ │ subs r3, r6, r3 │ │ sbcs.w r2, r1, r2 │ │ - bcc.n 8f00c │ │ + bcc.n 8f078 │ │ adds r0, #1 │ │ adds r5, #32 │ │ mov r3, r6 │ │ mov r2, r1 │ │ cmp r4, r0 │ │ - bne.n 8efea │ │ + bne.n 8f056 │ │ mov r1, r4 │ │ ldr r0, [sp, #28] │ │ cmp r1, r0 │ │ - bcc.n 8ef3e │ │ - b.n 8f014 │ │ + bcc.n 8efaa │ │ + b.n 8f080 │ │ mov r1, r0 │ │ ldr r0, [sp, #28] │ │ cmp r1, r0 │ │ - bcc.n 8ef3e │ │ + bcc.n 8efaa │ │ mov r0, r1 │ │ subs.w r1, r9, lr │ │ sbcs.w r1, r8, ip │ │ - bcs.n 8f0b4 │ │ + bcs.n 8f120 │ │ movs.w r8, r0, lsr #1 │ │ - beq.n 8f0b8 │ │ + beq.n 8f124 │ │ mov r1, r0 │ │ ldr r0, [sp, #8] │ │ ldr r6, [sp, #56] @ 0x38 │ │ add.w r2, r0, r1, lsl #5 │ │ ldr r0, [sp, #64] @ 0x40 │ │ str r1, [sp, #32] │ │ lsls r3, r0, #5 │ │ @@ -155295,20 +155210,20 @@ │ │ ldr r1, [r0, #28] │ │ ldr r4, [r5, #12] │ │ str.w fp, [r5, #-12] │ │ str.w ip, [r5, #-8] │ │ str.w lr, [r5, #-4] │ │ str r4, [r0, #28] │ │ str r1, [r5, #12] │ │ - bne.n 8f036 │ │ + bne.n 8f0a2 │ │ ldr r4, [sp, #32] │ │ ldr.w fp, [sp, #40] @ 0x28 │ │ - b.n 8f0ba │ │ + b.n 8f126 │ │ mov r4, r0 │ │ - b.n 8f0ba │ │ + b.n 8f126 │ │ movs r4, #1 │ │ ldr r2, [sp, #64] @ 0x40 │ │ lsls r0, r4, #1 │ │ adds r1, r0, #1 │ │ sub.w r8, r7, #94 @ 0x5e │ │ add.w r9, sp, #80 @ 0x50 │ │ sub.w r0, r2, sl, lsr #1 │ │ @@ -155330,106 +155245,106 @@ │ │ eor.w r1, lr, r5 │ │ clz r1, r1 │ │ add.w r1, r1, #32 │ │ it ne │ │ clzne r1, r0 │ │ ldr r6, [sp, #36] @ 0x24 │ │ cmp.w ip, #2 │ │ - bcc.w 8f2d0 │ │ + bcc.w 8f33c │ │ ldr r0, [sp, #16] │ │ str r1, [sp, #52] @ 0x34 │ │ add.w r0, r0, r2, lsl #5 │ │ str r0, [sp, #32] │ │ - b.n 8f130 │ │ + b.n 8f19c │ │ mov.w sl, r3, lsl #1 │ │ cmp r5, #1 │ │ - bls.w 8f2ca │ │ + bls.w 8f336 │ │ sub.w r5, ip, #1 │ │ ldrb.w r0, [r8, r5] │ │ cmp r0, r1 │ │ - bcc.w 8f2ce │ │ + bcc.w 8f33a │ │ ldr.w r4, [r9, r5, lsl #2] │ │ mov ip, r5 │ │ lsrs r6, r4, #1 │ │ add.w r3, r6, sl, lsr #1 │ │ cmp r3, fp │ │ - bhi.n 8f158 │ │ + bhi.n 8f1c4 │ │ orr.w r0, r4, sl │ │ ands.w r0, r0, #1 │ │ - beq.n 8f126 │ │ + beq.n 8f192 │ │ add r0, sp, #68 @ 0x44 │ │ ldr r1, [sp, #56] @ 0x38 │ │ stmia.w r0, {r3, r5, ip} │ │ subs r0, r2, r3 │ │ add.w r9, r1, r0, lsl #5 │ │ lsls r0, r4, #31 │ │ - bne.n 8f196 │ │ + bne.n 8f202 │ │ orr.w r0, r6, #1 │ │ movs r1, #62 @ 0x3e │ │ clz r0, r0 │ │ ldr r2, [sp, #60] @ 0x3c │ │ mov r3, fp │ │ eor.w r0, r1, r0, lsl #1 │ │ movs r1, #0 │ │ strd r0, r1, [sp] │ │ mov r0, r9 │ │ mov r1, r6 │ │ - bl 8f318 │ │ + bl 8f384 │ │ mov.w r8, sl, lsr #1 │ │ movs.w r0, sl, lsl #31 │ │ - bne.n 8f1c2 │ │ - b.n 8f1a0 │ │ + bne.n 8f22e │ │ + b.n 8f20c │ │ mov.w r8, sl, lsr #1 │ │ movs.w r0, sl, lsl #31 │ │ - bne.n 8f1c2 │ │ + bne.n 8f22e │ │ orr.w r0, r8, #1 │ │ movs r1, #62 @ 0x3e │ │ clz r0, r0 │ │ ldr r2, [sp, #60] @ 0x3c │ │ mov r3, fp │ │ eor.w r0, r1, r0, lsl #1 │ │ movs r1, #0 │ │ strd r0, r1, [sp] │ │ add.w r0, r9, r6, lsl #5 │ │ mov r1, r8 │ │ - bl 8f318 │ │ + bl 8f384 │ │ cmp r4, #2 │ │ it cs │ │ cmpcs.w sl, #2 │ │ - bcs.n 8f1ea │ │ + bcs.n 8f256 │ │ ldr r0, [sp, #68] @ 0x44 │ │ sub.w r8, r7, #94 @ 0x5e │ │ add.w r9, sp, #80 @ 0x50 │ │ ldr r2, [sp, #64] @ 0x40 │ │ ldr r1, [sp, #52] @ 0x34 │ │ lsls r0, r0, #1 │ │ add.w sl, r0, #1 │ │ ldrd r5, ip, [sp, #72] @ 0x48 │ │ cmp r5, #1 │ │ - bhi.n 8f130 │ │ - b.n 8f2ca │ │ + bhi.n 8f19c │ │ + b.n 8f336 │ │ cmp r8, r6 │ │ mov sl, r6 │ │ it cc │ │ movcc sl, r8 │ │ cmp fp, sl │ │ - bcc.n 8f1cc │ │ + bcc.n 8f238 │ │ mov r1, r9 │ │ add.w fp, r9, r6, lsl #5 │ │ cmp r6, r8 │ │ it hi │ │ movhi r1, fp │ │ ldr r4, [sp, #60] @ 0x3c │ │ mov.w r2, sl, lsl #5 │ │ mov r0, r4 │ │ - bl d4c50 │ │ + bl d50a2 │ │ add.w ip, r4, sl, lsl #5 │ │ mov sl, r4 │ │ cmp r6, r8 │ │ - bls.n 8f26c │ │ + bls.n 8f2d8 │ │ ldr r1, [sp, #32] │ │ ldrd r2, r3, [fp, #-24] │ │ mov.w r8, #0 │ │ ldrd r6, r5, [ip, #-24] │ │ sub.w lr, fp, #32 │ │ subs r2, r6, r2 │ │ sub.w r6, ip, #32 │ │ @@ -155446,21 +155361,21 @@ │ │ mov r3, r1 │ │ ldmia r6!, {r0, r2, r4, r5} │ │ add.w fp, lr, r8, lsl #5 │ │ cmp fp, r9 │ │ stmia r3!, {r0, r2, r4, r5} │ │ ldmia.w r6, {r0, r2, r4, r5} │ │ stmia r3!, {r0, r2, r4, r5} │ │ - beq.n 8f266 │ │ + beq.n 8f2d2 │ │ subs r1, #32 │ │ cmp ip, sl │ │ - bne.n 8f21a │ │ + bne.n 8f286 │ │ mov r9, fp │ │ mov r1, sl │ │ - b.n 8f2ba │ │ + b.n 8f326 │ │ ldr.w r8, [sp, #44] @ 0x2c │ │ mov lr, sl │ │ ldrd r0, r1, [lr, #8] │ │ ldrd r3, r6, [fp, #8] │ │ subs r0, r3, r0 │ │ mov.w r3, #0 │ │ sbcs.w r0, r6, r1 │ │ @@ -155476,64 +155391,64 @@ │ │ mov r0, r9 │ │ ldmia.w lr!, {r2, r4, r5, r6} │ │ add.w r9, r9, #32 │ │ cmp r1, ip │ │ stmia r0!, {r2, r4, r5, r6} │ │ ldmia.w lr, {r2, r4, r5, r6} │ │ stmia r0!, {r2, r4, r5, r6} │ │ - beq.n 8f2ba │ │ + beq.n 8f326 │ │ add.w fp, fp, r3, lsl #5 │ │ mov lr, r1 │ │ cmp fp, r8 │ │ - bne.n 8f272 │ │ + bne.n 8f2de │ │ sub.w r2, ip, r1 │ │ mov r0, r9 │ │ - bl d4c50 │ │ + bl d50a2 │ │ ldr.w fp, [sp, #40] @ 0x28 │ │ - b.n 8f1cc │ │ + b.n 8f238 │ │ mov.w ip, #1 │ │ ldr r6, [sp, #36] @ 0x24 │ │ cmp r6, r2 │ │ strb.w r1, [r8, ip] │ │ str.w sl, [r9, ip, lsl #2] │ │ - bls.n 8f2ea │ │ + bls.n 8f356 │ │ ldr.w sl, [sp, #48] @ 0x30 │ │ add.w ip, ip, #1 │ │ add.w r2, r2, sl, lsr #1 │ │ - b.n 8ef24 │ │ + b.n 8ef90 │ │ movs.w r0, sl, lsl #31 │ │ - bne.n 8f310 │ │ + bne.n 8f37c │ │ orr.w r2, r6, #1 │ │ movs r0, #0 │ │ clz r3, r2 │ │ movs r2, #62 @ 0x3e │ │ mov r1, r6 │ │ eor.w r2, r2, r3, lsl #1 │ │ strd r2, r0, [sp] │ │ ldrd r0, r2, [sp, #56] @ 0x38 │ │ mov r3, fp │ │ - bl 8f318 │ │ + bl 8f384 │ │ add sp, #412 @ 0x19c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #100 @ 0x64 │ │ mov sl, r2 │ │ mov fp, r0 │ │ cmp r1, #33 @ 0x21 │ │ str r2, [sp, #56] @ 0x38 │ │ - bcs.w 8f55c │ │ + bcs.w 8f5c8 │ │ mov r9, r1 │ │ movs.w r8, r9, lsr #1 │ │ - beq.w 8fafc │ │ + beq.w 8fb68 │ │ cmp.w r9, #8 │ │ str.w r8, [sp, #48] @ 0x30 │ │ - bcc.w 8f820 │ │ + bcc.w 8f88c │ │ ldrd r0, r1, [fp, #8] │ │ ldrd r2, r3, [fp, #40] @ 0x28 │ │ ldrd r4, r8, [fp, #72] @ 0x48 │ │ subs r0, r2, r0 │ │ ldrd r5, ip, [fp, #104] @ 0x68 │ │ sbcs.w r0, r3, r1 │ │ mov.w r0, #0 │ │ @@ -155718,33 +155633,33 @@ │ │ add.w r0, lr, #96 @ 0x60 │ │ ldr r6, [sp, #60] @ 0x3c │ │ ldmia r6!, {r1, r2, r3, r5} │ │ stmia r0!, {r1, r2, r3, r5} │ │ ldmia.w r6, {r1, r2, r3, r5} │ │ stmia r0!, {r1, r2, r3, r5} │ │ movs r0, #4 │ │ - b.n 8f842 │ │ + b.n 8f8ae │ │ ldr r4, [r7, #8] │ │ mov r8, r3 │ │ ldr r0, [r7, #12] │ │ str r0, [sp, #36] @ 0x24 │ │ sub.w r0, sl, #32 │ │ str r1, [sp, #52] @ 0x34 │ │ strd r0, r3, [sp, #28] │ │ str.w fp, [sp, #48] @ 0x30 │ │ cmp r4, #0 │ │ - beq.w 8f808 │ │ + beq.w 8f874 │ │ ldr r6, [sp, #52] @ 0x34 │ │ cmp r6, #64 @ 0x40 │ │ mov.w r3, r6, lsr #3 │ │ mov.w r0, r3, lsl #3 │ │ add.w r1, fp, r3, lsl #7 │ │ sub.w r0, r0, r6, lsr #3 │ │ add.w r2, fp, r0, lsl #5 │ │ - bcs.n 8f5e0 │ │ + bcs.n 8f64c │ │ ldrd lr, ip, [r2, #8] │ │ mov r9, r4 │ │ ldrd r6, r5, [r1, #8] │ │ ldrd r4, r3, [fp, #8] │ │ subs.w r0, r6, lr │ │ sbcs.w r0, r5, ip │ │ mov.w r0, #0 │ │ @@ -155763,51 +155678,51 @@ │ │ mov r4, r9 │ │ mov.w r0, #0 │ │ it cc │ │ movcc r0, #1 │ │ eors r5, r0 │ │ it ne │ │ movne r1, fp │ │ - b.n 8f5e8 │ │ + b.n 8f654 │ │ mov r0, fp │ │ - bl 8fb44 │ │ + bl 8fbb0 │ │ mov r1, r0 │ │ subs r4, #1 │ │ str r4, [sp, #40] @ 0x28 │ │ mov r2, r1 │ │ add r0, sp, #64 @ 0x40 │ │ ldmia r2!, {r3, r4, r5, r6} │ │ stmia r0!, {r3, r4, r5, r6} │ │ ldmia.w r2, {r3, r4, r5, r6} │ │ stmia r0!, {r3, r4, r5, r6} │ │ sub.w r0, r1, fp │ │ lsrs r4, r0, #5 │ │ ldr r0, [sp, #36] @ 0x24 │ │ - cbz r0, 8f618 │ │ + cbz r0, 8f684 │ │ ldr r2, [sp, #36] @ 0x24 │ │ ldrd r0, r1, [r1, #8] │ │ ldrd r2, r3, [r2, #8] │ │ subs r0, r2, r0 │ │ sbcs.w r0, r3, r1 │ │ - bcs.w 8f722 │ │ + bcs.w 8f78e │ │ ldr r0, [sp, #52] @ 0x34 │ │ cmp r8, r0 │ │ - bcc.w 8fb16 │ │ + bcc.w 8fb82 │ │ add.w r1, fp, r4, lsl #5 │ │ add.w ip, sl, r0, lsl #5 │ │ add.w lr, r1, #8 │ │ mov.w r9, #0 │ │ mov r2, fp │ │ mov r8, r4 │ │ str r4, [sp, #44] @ 0x2c │ │ add.w sl, fp, r8, lsl #5 │ │ ldr.w fp, [sp, #56] @ 0x38 │ │ cmp r2, sl │ │ str.w r8, [sp, #60] @ 0x3c │ │ - bcs.n 8f682 │ │ + bcs.n 8f6ee │ │ ldrd r4, r3, [lr] │ │ sub.w ip, ip, #32 │ │ ldrd r6, r1, [r2, #8] │ │ mov r0, r9 │ │ subs r4, r6, r4 │ │ sbcs r1, r3 │ │ mov r3, r2 │ │ @@ -155820,82 +155735,82 @@ │ │ stmia.w r1!, {r4, r6, r8, r9} │ │ mov r9, r0 │ │ ldmia.w r3, {r0, r4, r5, r6} │ │ stmia r1!, {r0, r4, r5, r6} │ │ it cc │ │ addcc.w r9, r9, #1 │ │ cmp r2, sl │ │ - bcc.n 8f646 │ │ + bcc.n 8f6b2 │ │ ldr.w r8, [sp, #52] @ 0x34 │ │ ldr r0, [sp, #60] @ 0x3c │ │ cmp r0, r8 │ │ - beq.n 8f6a8 │ │ + beq.n 8f714 │ │ mov r1, r2 │ │ sub.w ip, ip, #32 │ │ ldmia r1!, {r3, r4, r5, r6} │ │ add.w r0, ip, r9, lsl #5 │ │ adds r2, #32 │ │ stmia r0!, {r3, r4, r5, r6} │ │ ldmia.w r1, {r3, r4, r5, r6} │ │ stmia r0!, {r3, r4, r5, r6} │ │ ldr.w fp, [sp, #48] @ 0x30 │ │ - b.n 8f636 │ │ + b.n 8f6a2 │ │ ldr.w fp, [sp, #48] @ 0x30 │ │ mov.w r2, r9, lsl #5 │ │ ldr.w sl, [sp, #56] @ 0x38 │ │ mov r0, fp │ │ mov r1, sl │ │ - bl d4c50 │ │ + bl d50a2 │ │ subs.w r1, r8, r9 │ │ - beq.n 8f6ec │ │ + beq.n 8f758 │ │ ldr r0, [sp, #52] @ 0x34 │ │ add.w r8, fp, r9, lsl #5 │ │ ldr r2, [sp, #28] │ │ mov ip, r1 │ │ add.w lr, r2, r0, lsl #5 │ │ mov r0, lr │ │ mov r2, r8 │ │ ldmia r0!, {r3, r4, r5, r6} │ │ sub.w lr, lr, #32 │ │ add.w r8, r8, #32 │ │ subs.w ip, ip, #1 │ │ stmia r2!, {r3, r4, r5, r6} │ │ ldmia.w r0, {r3, r4, r5, r6} │ │ stmia r2!, {r3, r4, r5, r6} │ │ - bne.n 8f6d0 │ │ + bne.n 8f73c │ │ ldr.w r8, [sp, #32] │ │ cmp.w r9, #0 │ │ ldr r4, [sp, #44] @ 0x2c │ │ - beq.n 8f722 │ │ + beq.n 8f78e │ │ ldr r0, [sp, #52] @ 0x34 │ │ cmp r0, r9 │ │ - bcc.w 8fb04 │ │ + bcc.w 8fb70 │ │ add r0, sp, #64 @ 0x40 │ │ ldr r4, [sp, #40] @ 0x28 │ │ mov r2, sl │ │ mov r3, r8 │ │ strd r4, r0, [sp] │ │ add.w r0, fp, r9, lsl #5 │ │ - bl 8f318 │ │ + bl 8f384 │ │ cmp.w r9, #33 @ 0x21 │ │ str.w r9, [sp, #52] @ 0x34 │ │ - bcs.w 8f572 │ │ - b.n 8f330 │ │ + bcs.w 8f5de │ │ + b.n 8f39c │ │ ldr r0, [sp, #52] @ 0x34 │ │ cmp r8, r0 │ │ - bcc.w 8fb16 │ │ + bcc.w 8fb82 │ │ add.w r1, fp, r4, lsl #5 │ │ add.w r9, sl, r0, lsl #5 │ │ add.w ip, r1, #8 │ │ mov.w r8, #0 │ │ mov r2, fp │ │ add.w lr, fp, r4, lsl #5 │ │ str r4, [sp, #44] @ 0x2c │ │ cmp r2, lr │ │ - bcs.n 8f77c │ │ + bcs.n 8f7e8 │ │ ldrd r6, r4, [r2, #8] │ │ sub.w r9, r9, #32 │ │ ldrd r1, r3, [ip] │ │ subs r1, r1, r6 │ │ sbcs.w r1, r3, r4 │ │ mov r3, r2 │ │ mov r1, r9 │ │ @@ -155906,38 +155821,38 @@ │ │ add.w r1, r1, r8, lsl #5 │ │ stmia r1!, {r0, r4, r5, r6} │ │ ldmia.w r3, {r0, r4, r5, r6} │ │ stmia r1!, {r0, r4, r5, r6} │ │ it cs │ │ addcs.w r8, r8, #1 │ │ cmp r2, lr │ │ - bcc.n 8f746 │ │ + bcc.n 8f7b2 │ │ ldr.w fp, [sp, #52] @ 0x34 │ │ ldr r0, [sp, #44] @ 0x2c │ │ cmp r0, fp │ │ - beq.n 8f7a8 │ │ + beq.n 8f814 │ │ mov r1, r2 │ │ add.w r0, sl, r8, lsl #5 │ │ ldmia r1!, {r3, r4, r5, r6} │ │ adds r2, #32 │ │ add.w r8, r8, #1 │ │ sub.w r9, r9, #32 │ │ stmia r0!, {r3, r4, r5, r6} │ │ ldmia.w r1, {r3, r4, r5, r6} │ │ stmia r0!, {r3, r4, r5, r6} │ │ mov r4, fp │ │ ldr.w fp, [sp, #48] @ 0x30 │ │ - b.n 8f73c │ │ + b.n 8f7a8 │ │ ldr r4, [sp, #48] @ 0x30 │ │ mov.w r2, r8, lsl #5 │ │ mov r1, sl │ │ mov r0, r4 │ │ - bl d4c50 │ │ + bl d50a2 │ │ subs.w r9, fp, r8 │ │ - beq.w 8fafc │ │ + beq.w 8fb68 │ │ ldr r0, [sp, #28] │ │ add.w r4, r4, r8, lsl #5 │ │ mov ip, r9 │ │ add.w lr, r0, fp, lsl #5 │ │ mov r2, r4 │ │ mov fp, r4 │ │ mov r0, lr │ │ @@ -155945,33 +155860,33 @@ │ │ ldmia r0!, {r1, r4, r5, r6} │ │ sub.w lr, lr, #32 │ │ adds r2, #32 │ │ subs.w ip, ip, #1 │ │ stmia r3!, {r1, r4, r5, r6} │ │ ldmia.w r0, {r1, r4, r5, r6} │ │ stmia r3!, {r1, r4, r5, r6} │ │ - bne.n 8f7ce │ │ + bne.n 8f83a │ │ ldr r1, [sp, #52] @ 0x34 │ │ cmp r1, r8 │ │ - bcc.w 8fb18 │ │ + bcc.w 8fb84 │ │ ldr.w r8, [sp, #32] │ │ movs r0, #0 │ │ ldr r4, [sp, #40] @ 0x28 │ │ cmp.w r9, #33 @ 0x21 │ │ str r0, [sp, #36] @ 0x24 │ │ str.w r9, [sp, #52] @ 0x34 │ │ - bcs.w 8f56e │ │ - b.n 8f330 │ │ + bcs.w 8f5da │ │ + b.n 8f39c │ │ ldr r1, [sp, #52] @ 0x34 │ │ movs r0, #1 │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ mov r2, sl │ │ mov r3, r8 │ │ - bl 8ee84 │ │ + bl 8eef0 │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, fp │ │ mov r1, sl │ │ ldmia r0!, {r2, r3, r4, r5} │ │ stmia r1!, {r2, r3, r4, r5} │ │ @@ -155985,18 +155900,18 @@ │ │ movs r0, #1 │ │ stmia r1!, {r2, r3, r4, r5} │ │ sub.w r1, r9, r8 │ │ cmp r0, r8 │ │ str r1, [sp, #32] │ │ str r0, [sp, #44] @ 0x2c │ │ str.w r9, [sp, #12] │ │ - bcs.n 8f90c │ │ + bcs.n 8f978 │ │ ldr r6, [sp, #44] @ 0x2c │ │ mov.w r9, r6, lsl #5 │ │ - b.n 8f898 │ │ + b.n 8f904 │ │ ldr.w sl, [sp, #56] @ 0x38 │ │ mov r0, sl │ │ ldr r1, [sp, #20] │ │ ldr r3, [sp, #28] │ │ str r1, [r0, #0] │ │ ldr r1, [sp, #52] @ 0x34 │ │ str.w r1, [r9, #-24] │ │ @@ -156011,30 +155926,30 @@ │ │ strd r0, r2, [r9, #-16] │ │ ldr.w r8, [sp, #48] @ 0x30 │ │ strd r1, r3, [r9, #-8] │ │ ldrd r6, r9, [sp, #36] @ 0x24 │ │ adds r6, #1 │ │ add.w r9, r9, #32 │ │ cmp r6, r8 │ │ - beq.n 8f90c │ │ + beq.n 8f978 │ │ add.w ip, fp, r6, lsl #5 │ │ add.w lr, sl, r6, lsl #5 │ │ mov r3, ip │ │ mov r2, lr │ │ ldmia r3!, {r0, r1, r4, r5} │ │ stmia r2!, {r0, r1, r4, r5} │ │ ldmia.w r3, {r0, r1, r4, r5} │ │ stmia r2!, {r0, r1, r4, r5} │ │ ldrd r3, r2, [lr, #8] │ │ ldrd r0, r1, [lr, #-24] │ │ str r3, [sp, #52] @ 0x34 │ │ subs r0, r3, r0 │ │ str r2, [sp, #60] @ 0x3c │ │ sbcs.w r0, r2, r1 │ │ - bcs.n 8f88e │ │ + bcs.n 8f8fa │ │ ldrd r1, r0, [lr] │ │ strd r1, r0, [sp, #20] │ │ add.w r0, ip, #16 │ │ str r0, [sp, #28] │ │ mov r0, r9 │ │ str r6, [sp, #36] @ 0x24 │ │ str.w r9, [sp, #40] @ 0x28 │ │ @@ -156042,38 +155957,38 @@ │ │ cmp r0, #32 │ │ sub.w r6, r9, #32 │ │ mov r4, r9 │ │ ldmia.w r6!, {r8, sl, ip, lr} │ │ stmia.w r4!, {r8, sl, ip, lr} │ │ ldmia.w r6, {r1, r2, r3, r5} │ │ stmia r4!, {r1, r2, r3, r5} │ │ - beq.n 8f85a │ │ + beq.n 8f8c6 │ │ ldrd r1, r2, [r9, #-56] @ 0x38 │ │ subs r0, #32 │ │ ldr r3, [sp, #52] @ 0x34 │ │ ldr.w sl, [sp, #56] @ 0x38 │ │ subs r1, r3, r1 │ │ ldr r1, [sp, #60] @ 0x3c │ │ sbcs r1, r2 │ │ - bcc.n 8f8d8 │ │ + bcc.n 8f944 │ │ add r0, sl │ │ - b.n 8f860 │ │ + b.n 8f8cc │ │ ldr r1, [sp, #44] @ 0x2c │ │ add.w r6, sl, r8, lsl #5 │ │ ldr r0, [sp, #32] │ │ cmp r1, r0 │ │ - bcs.n 8f9f0 │ │ + bcs.n 8fa5c │ │ ldr r0, [sp, #48] @ 0x30 │ │ mov.w sl, r1, lsl #5 │ │ mov.w lr, #32 │ │ str r6, [sp, #52] @ 0x34 │ │ str r6, [sp, #36] @ 0x24 │ │ add.w r0, fp, r0, lsl #5 │ │ str r0, [sp, #28] │ │ - b.n 8f96e │ │ + b.n 8f9da │ │ ldr r0, [sp, #36] @ 0x24 │ │ ldr r3, [sp, #24] │ │ ldr r1, [sp, #16] │ │ str r1, [r0, #0] │ │ ldr r1, [sp, #20] │ │ ldr r2, [sp, #60] @ 0x3c │ │ str.w r6, [lr, #-24] │ │ @@ -156091,15 +156006,15 @@ │ │ ldr r1, [sp, #44] @ 0x2c │ │ adds r0, #32 │ │ ldr r6, [sp, #36] @ 0x24 │ │ str r0, [sp, #52] @ 0x34 │ │ adds r1, #1 │ │ ldr r0, [sp, #32] │ │ cmp r1, r0 │ │ - beq.n 8f9f0 │ │ + beq.n 8fa5c │ │ ldr r0, [sp, #28] │ │ add.w r8, r6, r1, lsl #5 │ │ str r1, [sp, #44] @ 0x2c │ │ add.w r0, r0, r1, lsl #5 │ │ str r0, [sp, #40] @ 0x28 │ │ mov r2, r8 │ │ mov r1, r0 │ │ @@ -156108,15 +156023,15 @@ │ │ ldmia.w r1, {r0, r3, r4, r5} │ │ stmia r2!, {r0, r3, r4, r5} │ │ ldrd r2, r1, [r8, #8] │ │ ldrd r0, r3, [r8, #-24] │ │ str r1, [sp, #60] @ 0x3c │ │ subs r0, r2, r0 │ │ sbcs.w r0, r1, r3 │ │ - bcs.n 8f958 │ │ + bcs.n 8f9c4 │ │ ldrd r1, r0, [r8] │ │ mov r6, r2 │ │ ldr.w r9, [sp, #52] @ 0x34 │ │ mov r8, lr │ │ strd r1, r0, [sp, #16] │ │ ldr r0, [sp, #40] @ 0x28 │ │ str.w lr, [sp, #40] @ 0x28 │ │ @@ -156126,24 +156041,24 @@ │ │ cmp sl, r8 │ │ sub.w r3, lr, #32 │ │ mov r4, lr │ │ ldmia.w r3!, {r1, r2, r5, ip} │ │ stmia.w r4!, {r1, r2, r5, ip} │ │ ldmia.w r3, {r0, r1, r2, r5} │ │ stmia r4!, {r0, r1, r2, r5} │ │ - beq.n 8f92e │ │ + beq.n 8f99a │ │ ldrd r0, r1, [lr, #-56] @ 0x38 │ │ add.w r8, r8, #32 │ │ sub.w r9, r9, #32 │ │ subs r0, r6, r0 │ │ ldr r0, [sp, #60] @ 0x3c │ │ sbcs r0, r1 │ │ - bcc.n 8f9ba │ │ + bcc.n 8fa26 │ │ add.w r0, r9, sl │ │ - b.n 8f930 │ │ + b.n 8f99c │ │ ldr r1, [sp, #12] │ │ mvn.w r0, #31 │ │ ldr.w lr, [sp, #56] @ 0x38 │ │ sub.w r8, r6, #32 │ │ add.w r9, r0, r1, lsl #5 │ │ ldr r0, [sp, #48] @ 0x30 │ │ add.w ip, lr, r9 │ │ @@ -156203,20 +156118,20 @@ │ │ it ne │ │ movne.w r0, #4294967295 @ 0xffffffff │ │ add.w r8, r8, r0, lsl #5 │ │ ldrd r0, r2, [sp, #48] @ 0x30 │ │ add.w lr, lr, r2, lsl #5 │ │ adds r1, #32 │ │ subs r0, #1 │ │ - bne.n 8fa0a │ │ + bne.n 8fa76 │ │ add.w r9, r8, #32 │ │ ldr.w r8, [sp, #12] │ │ mov r2, r1 │ │ movs.w r1, r8, lsl #31 │ │ - beq.n 8faee │ │ + beq.n 8fb5a │ │ mov r1, r6 │ │ cmp lr, r9 │ │ it cc │ │ movcc r1, lr │ │ mov r0, r2 │ │ ldmia r1!, {r2, r3, r4, r5} │ │ stmia r0!, {r2, r3, r4, r5} │ │ @@ -156231,69 +156146,69 @@ │ │ add.w r6, r6, r2, lsl #5 │ │ add.w lr, lr, r1, lsl #5 │ │ ldr r4, [sp, #56] @ 0x38 │ │ cmp lr, r9 │ │ itt eq │ │ addeq.w r0, ip, #32 │ │ cmpeq r6, r0 │ │ - bne.n 8fb12 │ │ + bne.n 8fb7e │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #52] @ (8fb3c ) │ │ + ldr r0, [pc, #52] @ (8fba8 ) │ │ movs r1, #19 │ │ - ldr r2, [pc, #52] @ (8fb40 ) │ │ + ldr r2, [pc, #52] @ (8fbac ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ - bl 413cc │ │ + bl 3fd60 │ │ + bl 416d4 │ │ udf #254 @ 0xfe │ │ - ldr r3, [pc, #28] @ (8fb38 ) │ │ + ldr r3, [pc, #28] @ (8fba4 ) │ │ mov r0, r8 │ │ mov r2, r1 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ mov r5, r0 │ │ mov.w r2, r8, lsl #5 │ │ mov r0, fp │ │ mov r1, r4 │ │ - bl d4c50 │ │ + bl d50a2 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ - stmia r2!, {r1, r2, r3, r4, r5} │ │ + blx d6de0 │ │ + stmia r1!, {r1, r5, r6, r7} │ │ movs r4, r0 │ │ - str r4, [sp, #564] @ 0x234 │ │ - vpaddl.s32 q14, q0 │ │ + str r4, [sp, #132] @ 0x84 │ │ + @ instruction: 0xfff8c1e4 │ │ movs r4, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ mov sl, r2 │ │ mov r4, r1 │ │ cmp r3, #8 │ │ - bcc.n 8fb92 │ │ + bcc.n 8fbfe │ │ lsrs r6, r3, #3 │ │ lsls r2, r6, #3 │ │ sub.w r9, r2, r3, lsr #3 │ │ add.w r1, r0, r6, lsl #7 │ │ mov r3, r6 │ │ add.w r2, r0, r9, lsl #5 │ │ - bl 8fb44 │ │ + bl 8fbb0 │ │ add.w r1, r4, r6, lsl #7 │ │ add.w r2, r4, r9, lsl #5 │ │ mov r8, r0 │ │ mov r0, r4 │ │ mov r3, r6 │ │ - bl 8fb44 │ │ + bl 8fbb0 │ │ add.w r1, sl, r6, lsl #7 │ │ add.w r2, sl, r9, lsl #5 │ │ mov r4, r0 │ │ mov r0, sl │ │ mov r3, r6 │ │ - bl 8fb44 │ │ + bl 8fbb0 │ │ mov sl, r0 │ │ mov r0, r8 │ │ ldrd lr, ip, [sl, #8] │ │ movs r5, #0 │ │ ldrd r3, r6, [r4, #8] │ │ ldrd r2, r8, [r0, #8] │ │ subs.w r1, r3, lr │ │ @@ -156327,34 +156242,34 @@ │ │ str r3, [sp, #40] @ 0x28 │ │ str r2, [sp, #60] @ 0x3c │ │ mov.w r1, #1073741824 @ 0x40000000 │ │ str r0, [sp, #56] @ 0x38 │ │ movs r0, #0 │ │ mov r2, r8 │ │ movs r3, #0 │ │ - bl d53d0 │ │ + bl d53dc │ │ umull r2, r3, r0, r8 │ │ adds r6, r0, #1 │ │ adc.w r4, r1, #0 │ │ mla r3, r1, r8, r3 │ │ eor.w r3, r3, #1073741824 @ 0x40000000 │ │ orrs r2, r3 │ │ it eq │ │ moveq r4, r1 │ │ str r4, [sp, #12] │ │ it eq │ │ moveq r6, r0 │ │ cmp.w r8, #4096 @ 0x1000 │ │ str r6, [sp, #16] │ │ - bhi.n 8fc32 │ │ + bhi.n 8fc9e │ │ sub.w r0, r8, r8, lsr #1 │ │ cmp r0, #64 @ 0x40 │ │ it cs │ │ movcs r0, #64 @ 0x40 │ │ - b.n 8fc54 │ │ + b.n 8fcc0 │ │ orr.w r0, r8, #1 │ │ movs r2, #1 │ │ clz r0, r0 │ │ eor.w r0, r0, #31 │ │ and.w r1, r0, #1 │ │ add.w r0, r1, r0, lsr #1 │ │ lsr.w r1, r8, r0 │ │ @@ -156373,89 +156288,89 @@ │ │ subs r0, r1, #4 │ │ str r0, [sp, #8] │ │ str.w r8, [sp, #20] │ │ ldr r0, [sp, #56] @ 0x38 │ │ cmp r8, r9 │ │ add.w r0, r0, r9, lsl #3 │ │ str r0, [sp, #44] @ 0x2c │ │ - bls.n 8fcaa │ │ + bls.n 8fd16 │ │ sub.w r4, r8, r9 │ │ ldr r0, [sp, #28] │ │ str r5, [sp, #48] @ 0x30 │ │ cmp r4, r0 │ │ - bcs.n 8fcba │ │ + bcs.n 8fd26 │ │ ldr r0, [r7, #8] │ │ - cbz r0, 8fcd6 │ │ + cbz r0, 8fd42 │ │ movs r0, #0 │ │ cmp r4, #32 │ │ strd r0, r0, [sp] │ │ it cs │ │ movcs r4, #32 │ │ ldr r0, [sp, #44] @ 0x2c │ │ mov r1, r4 │ │ ldr r2, [sp, #60] @ 0x3c │ │ - bl 8ffac │ │ - b.n 8fd70 │ │ + bl 90018 │ │ + b.n 8fddc │ │ movs r0, #1 │ │ movs r1, #0 │ │ str r0, [sp, #36] @ 0x24 │ │ cmp r5, #2 │ │ - bcs.w 8fdca │ │ + bcs.w 8fe36 │ │ ldr r3, [sp, #40] @ 0x28 │ │ - b.n 8ff60 │ │ + b.n 8ffcc │ │ cmp r4, #2 │ │ - bcc.n 8fd70 │ │ + bcc.n 8fddc │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldr.w lr, [r0] │ │ ldr r1, [r0, #8] │ │ cmp r1, lr │ │ - bcs.n 8fce2 │ │ + bcs.n 8fd4e │ │ mov.w ip, #2 │ │ cmp r4, #2 │ │ - bne.n 8fcea │ │ + bne.n 8fd56 │ │ movs r1, #1 │ │ - b.n 8fd30 │ │ + b.n 8fd9c │ │ ldr r0, [sp, #28] │ │ cmp r4, r0 │ │ it cs │ │ movcs r4, r0 │ │ lsls r2, r4, #1 │ │ - b.n 8fd74 │ │ + b.n 8fde0 │ │ cmp r4, #2 │ │ - bne.n 8fd02 │ │ + bne.n 8fd6e │ │ movs r4, #2 │ │ - b.n 8fd70 │ │ + b.n 8fddc │ │ mov r6, r1 │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldr.w r2, [r0, ip, lsl #3] │ │ cmp r2, r6 │ │ - bcs.n 8fd1e │ │ + bcs.n 8fd8a │ │ add.w ip, ip, #1 │ │ mov r6, r2 │ │ cmp r4, ip │ │ - bne.n 8fcec │ │ - b.n 8fd1c │ │ + bne.n 8fd58 │ │ + b.n 8fd88 │ │ mov.w ip, #2 │ │ mov r2, r1 │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldr.w r0, [r0, ip, lsl #3] │ │ cmp r0, r2 │ │ - bcc.n 8fd1e │ │ + bcc.n 8fd8a │ │ add.w ip, ip, #1 │ │ mov r2, r0 │ │ cmp r4, ip │ │ - bne.n 8fd08 │ │ + bne.n 8fd74 │ │ mov ip, r4 │ │ ldr r0, [sp, #28] │ │ cmp ip, r0 │ │ - bcc.n 8fc8e │ │ + bcc.n 8fcfa │ │ cmp r1, lr │ │ - bcs.n 8fd6e │ │ + bcs.n 8fdda │ │ movs.w r1, ip, lsr #1 │ │ - beq.w 8ff7a │ │ + beq.w 8ffe6 │ │ ldr r0, [sp, #24] │ │ mov.w r6, r9, lsl #3 │ │ ldr r5, [sp, #56] @ 0x38 │ │ add.w r2, r0, ip, lsl #3 │ │ ldr r0, [sp, #8] │ │ add.w r3, r0, ip, lsl #3 │ │ ldr r4, [r5, r6] │ │ @@ -156468,15 +156383,15 @@ │ │ sub.w r2, r2, #8 │ │ ldr.w lr, [r0, #4] │ │ add.w r5, r5, #8 │ │ ldr r0, [r4, #4] │ │ str r0, [r3, r6] │ │ sub.w r3, r3, #8 │ │ str.w lr, [r4, #4] │ │ - bne.n 8fd42 │ │ + bne.n 8fdae │ │ mov r4, ip │ │ lsls r0, r4, #1 │ │ adds r2, r0, #1 │ │ sub.w r0, r9, sl, lsr #1 │ │ str r2, [sp, #36] @ 0x24 │ │ adds.w r0, r0, r9 │ │ add.w r2, r9, r2, lsr #1 │ │ @@ -156496,107 +156411,107 @@ │ │ eor.w r1, ip, r6 │ │ clz r1, r1 │ │ add.w r1, r1, #32 │ │ it ne │ │ clzne r1, r0 │ │ ldr r5, [sp, #48] @ 0x30 │ │ cmp r5, #2 │ │ - bcc.w 8fcb6 │ │ + bcc.w 8fd22 │ │ ldr r3, [sp, #40] @ 0x28 │ │ ldr r0, [sp, #24] │ │ str.w r9, [sp, #52] @ 0x34 │ │ add.w r0, r0, r9, lsl #3 │ │ str r0, [sp, #32] │ │ str r1, [sp, #64] @ 0x40 │ │ - b.n 8fde8 │ │ + b.n 8fe54 │ │ mov.w sl, r2, lsl #1 │ │ cmp.w r9, #1 │ │ - bls.w 8ff56 │ │ + bls.w 8ffc2 │ │ sub.w r9, r5, #1 │ │ ldrb.w r0, [fp, r9] │ │ cmp r0, r1 │ │ - bcc.w 8ff58 │ │ + bcc.w 8ffc4 │ │ add r0, sp, #72 @ 0x48 │ │ mov r5, r9 │ │ ldr.w r4, [r0, r9, lsl #2] │ │ lsrs r6, r4, #1 │ │ add.w r2, r6, sl, lsr #1 │ │ cmp r2, r3 │ │ - bhi.n 8fe12 │ │ + bhi.n 8fe7e │ │ orr.w r0, r4, sl │ │ ands.w r0, r0, #1 │ │ - beq.n 8fddc │ │ + beq.n 8fe48 │ │ ldr r0, [sp, #52] @ 0x34 │ │ ldr r1, [sp, #56] @ 0x38 │ │ subs r0, r0, r2 │ │ str r2, [sp, #68] @ 0x44 │ │ add.w fp, r1, r0, lsl #3 │ │ lsls r0, r4, #31 │ │ - bne.n 8fe44 │ │ + bne.n 8feb0 │ │ orr.w r0, r6, #1 │ │ movs r1, #62 @ 0x3e │ │ clz r0, r0 │ │ ldr r2, [sp, #60] @ 0x3c │ │ mov r8, r3 │ │ eor.w r0, r1, r0, lsl #1 │ │ movs r1, #0 │ │ strd r0, r1, [sp] │ │ mov r0, fp │ │ mov r1, r6 │ │ - bl 8ffac │ │ + bl 90018 │ │ mov r3, r8 │ │ mov.w r8, sl, lsr #1 │ │ movs.w r0, sl, lsl #31 │ │ - bne.n 8fe7a │ │ + bne.n 8fee6 │ │ orr.w r0, r8, #1 │ │ movs r1, #62 @ 0x3e │ │ clz r0, r0 │ │ ldr r2, [sp, #60] @ 0x3c │ │ str.w sl, [sp, #48] @ 0x30 │ │ mov sl, r3 │ │ eor.w r0, r1, r0, lsl #1 │ │ movs r1, #0 │ │ strd r0, r1, [sp] │ │ add.w r0, fp, r6, lsl #3 │ │ mov r1, r8 │ │ - bl 8ffac │ │ + bl 90018 │ │ mov r3, sl │ │ ldr.w sl, [sp, #48] @ 0x30 │ │ ldr r1, [sp, #64] @ 0x40 │ │ cmp r4, #2 │ │ it cs │ │ cmpcs.w sl, #2 │ │ - bcs.n 8fe9a │ │ + bcs.n 8ff06 │ │ ldr r0, [sp, #68] @ 0x44 │ │ sub.w fp, r7, #94 @ 0x5e │ │ lsls r0, r0, #1 │ │ add.w sl, r0, #1 │ │ cmp.w r9, #1 │ │ - bhi.n 8fde8 │ │ - b.n 8ff56 │ │ + bhi.n 8fe54 │ │ + b.n 8ffc2 │ │ cmp r8, r6 │ │ mov sl, r6 │ │ it cc │ │ movcc sl, r8 │ │ cmp r3, sl │ │ - bcc.n 8fe86 │ │ + bcc.n 8fef2 │ │ mov r1, fp │ │ str r5, [sp, #48] @ 0x30 │ │ add.w r4, fp, r6, lsl #3 │ │ cmp r6, r8 │ │ it hi │ │ movhi r1, r4 │ │ ldr r5, [sp, #60] @ 0x3c │ │ mov.w r2, sl, lsl #3 │ │ mov r0, r5 │ │ - bl d52ca │ │ + bl d4c3c │ │ cmp r6, r8 │ │ add.w r6, r5, sl, lsl #3 │ │ mov ip, r5 │ │ - bls.n 8ff0e │ │ + bls.n 8ff7a │ │ ldr r1, [sp, #32] │ │ mov r2, r4 │ │ mov r0, r6 │ │ ldr.w r3, [r2, #-8]! │ │ ldr.w r5, [r0, #-8]! │ │ cmp r5, r3 │ │ it cc │ │ @@ -156608,21 +156523,21 @@ │ │ movcc r3, #1 │ │ add.w r6, r0, r3, lsl #3 │ │ mov.w r0, #0 │ │ it cs │ │ movcs r0, #1 │ │ add.w r4, r2, r0, lsl #3 │ │ cmp r4, fp │ │ - beq.n 8ff08 │ │ + beq.n 8ff74 │ │ subs r1, #8 │ │ cmp r6, ip │ │ - bne.n 8fecc │ │ + bne.n 8ff38 │ │ mov fp, r4 │ │ mov r1, ip │ │ - b.n 8ff46 │ │ + b.n 8ffb2 │ │ ldr r3, [sp, #44] @ 0x2c │ │ mov r1, ip │ │ ldr r0, [r1, #0] │ │ ldr r2, [r4, #0] │ │ cmp r2, r0 │ │ mov r0, r1 │ │ it cc │ │ @@ -156633,102 +156548,102 @@ │ │ mov.w r0, #0 │ │ it cc │ │ movcc r2, #1 │ │ it cs │ │ movcs r0, #1 │ │ add.w r1, r1, r0, lsl #3 │ │ cmp r1, r6 │ │ - beq.n 8ff46 │ │ + beq.n 8ffb2 │ │ add.w r4, r4, r2, lsl #3 │ │ cmp r4, r3 │ │ - bne.n 8ff12 │ │ + bne.n 8ff7e │ │ subs r2, r6, r1 │ │ mov r0, fp │ │ - bl d52ca │ │ + bl d4c3c │ │ ldr r5, [sp, #48] @ 0x30 │ │ ldr r3, [sp, #40] @ 0x28 │ │ ldr r1, [sp, #64] @ 0x40 │ │ - b.n 8fe86 │ │ + b.n 8fef2 │ │ movs r5, #1 │ │ ldr.w r8, [sp, #20] │ │ ldr.w r9, [sp, #52] @ 0x34 │ │ add r0, sp, #72 @ 0x48 │ │ cmp r8, r9 │ │ strb.w r1, [fp, r5] │ │ str.w sl, [r0, r5, lsl #2] │ │ - bls.n 8ff7e │ │ + bls.n 8ffea │ │ ldr.w sl, [sp, #36] @ 0x24 │ │ adds r5, #1 │ │ add.w r9, r9, sl, lsr #1 │ │ - b.n 8fc76 │ │ + b.n 8fce2 │ │ movs r4, #1 │ │ - b.n 8fd70 │ │ + b.n 8fddc │ │ movs.w r0, sl, lsl #31 │ │ - bne.n 8ffa2 │ │ + bne.n 9000e │ │ orr.w r1, r8, #1 │ │ movs r0, #0 │ │ clz r1, r1 │ │ movs r2, #62 @ 0x3e │ │ eor.w r1, r2, r1, lsl #1 │ │ strd r1, r0, [sp] │ │ ldr r0, [sp, #56] @ 0x38 │ │ mov r1, r8 │ │ ldr r2, [sp, #60] @ 0x3c │ │ - bl 8ffac │ │ + bl 90018 │ │ add sp, #404 @ 0x194 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - bmi.n 8ff56 │ │ + bmi.n 8ffc2 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #52 @ 0x34 │ │ mov r9, r2 │ │ mov r8, r1 │ │ mov fp, r0 │ │ cmp r1, #33 @ 0x21 │ │ - bcs.n 90008 │ │ + bcs.n 90074 │ │ mov r6, r8 │ │ movs.w lr, r6, lsr #1 │ │ - beq.w 90706 │ │ + beq.w 90772 │ │ cmp r6, #15 │ │ str.w lr, [sp, #40] @ 0x28 │ │ - bls.w 90350 │ │ + bls.w 903bc │ │ add.w r8, r9, r6, lsl #3 │ │ mov r0, fp │ │ mov r1, r9 │ │ mov r4, lr │ │ mov r2, r8 │ │ - bl 90750 │ │ + bl 907bc │ │ add.w r0, fp, r4, lsl #3 │ │ add.w r1, r9, r4, lsl #3 │ │ add.w r2, r8, #64 @ 0x40 │ │ - bl 90750 │ │ + bl 907bc │ │ mov lr, r4 │ │ mov.w sl, #8 │ │ sub.w r0, r6, lr │ │ cmp sl, lr │ │ str r0, [sp, #24] │ │ - bcc.w 90552 │ │ - b.n 905b0 │ │ + bcc.w 905be │ │ + b.n 9061c │ │ ldr r5, [r7, #8] │ │ mov r4, r3 │ │ ldr r0, [r7, #12] │ │ str r0, [sp, #20] │ │ sub.w r0, r9, #8 │ │ strd r0, r3, [sp, #12] │ │ cmp r5, #0 │ │ - beq.w 90338 │ │ + beq.w 903a4 │ │ mov.w r3, r8, lsr #3 │ │ cmp.w r8, #64 @ 0x40 │ │ mov.w r0, r3, lsl #3 │ │ add.w sl, fp, r3, lsl #5 │ │ sub.w r0, r0, r8, lsr #3 │ │ add.w r2, fp, r0, lsl #3 │ │ - bcs.n 9006e │ │ + bcs.n 900da │ │ ldr r0, [r2, #0] │ │ movs r6, #0 │ │ ldr.w r1, [sl] │ │ ldr.w r3, [fp] │ │ cmp r1, r0 │ │ it cc │ │ movcc r6, #1 │ │ @@ -156742,48 +156657,48 @@ │ │ cmp r3, r0 │ │ mov.w r0, #0 │ │ it cc │ │ movcc r0, #1 │ │ eors r1, r0 │ │ it ne │ │ movne sl, fp │ │ - b.n 90078 │ │ + b.n 900e4 │ │ mov r0, fp │ │ mov r1, sl │ │ - bl 90aae │ │ + bl 90b1a │ │ mov sl, r0 │ │ ldrd r0, r1, [sl] │ │ subs r5, #1 │ │ strd r0, r1, [sp, #44] @ 0x2c │ │ sub.w r1, sl, fp │ │ str.w r8, [sp, #36] @ 0x24 │ │ lsrs r2, r1, #3 │ │ ldr r1, [sp, #20] │ │ strd r5, sl, [sp, #28] │ │ - cbz r1, 9009e │ │ + cbz r1, 9010a │ │ ldr r1, [sp, #20] │ │ ldr r1, [r1, #0] │ │ cmp r1, r0 │ │ - bcs.w 901fa │ │ + bcs.w 90266 │ │ cmp r4, r8 │ │ - bcc.w 90720 │ │ + bcc.w 9078c │ │ add.w ip, r9, r8, lsl #3 │ │ movs r6, #0 │ │ mov r1, fp │ │ mov r8, r2 │ │ str r2, [sp, #24] │ │ subs.w r3, r8, #3 │ │ str.w r8, [sp, #40] @ 0x28 │ │ mov.w r0, #0 │ │ it cc │ │ movcc r3, r0 │ │ add.w lr, fp, r3, lsl #3 │ │ mov r0, fp │ │ cmp r1, lr │ │ - bcs.n 9014a │ │ + bcs.n 901b6 │ │ ldr.w sl, [sl] │ │ ldrd r2, r4, [r1] │ │ mov fp, r9 │ │ ldrd r3, r8, [r1, #8] │ │ cmp r2, sl │ │ it cs │ │ subcs.w fp, ip, #8 │ │ @@ -156822,20 +156737,20 @@ │ │ str.w r4, [r2, r6, lsl #3] │ │ add.w r2, r2, r6, lsl #3 │ │ add.w r1, r1, #32 │ │ str r3, [r2, #4] │ │ it cc │ │ addcc r6, #1 │ │ cmp r1, lr │ │ - bcc.n 900ce │ │ + bcc.n 9013a │ │ ldr.w lr, [sp, #40] @ 0x28 │ │ mov fp, r0 │ │ add.w r3, r0, lr, lsl #3 │ │ cmp r1, r3 │ │ - bcs.n 9018c │ │ + bcs.n 901f8 │ │ ldr.w sl, [sp, #32] │ │ ldr.w r8, [sp, #36] @ 0x24 │ │ ldr.w r5, [sl] │ │ sub.w ip, ip, #8 │ │ ldrd r2, r4, [r1], #8 │ │ mov r0, ip │ │ cmp r2, r5 │ │ @@ -156843,69 +156758,69 @@ │ │ movcc r0, r9 │ │ str.w r2, [r0, r6, lsl #3] │ │ add.w r0, r0, r6, lsl #3 │ │ str r4, [r0, #4] │ │ it cc │ │ addcc r6, #1 │ │ cmp r1, r3 │ │ - bcc.n 90164 │ │ + bcc.n 901d0 │ │ cmp lr, r8 │ │ - bne.n 90194 │ │ - b.n 901a8 │ │ + bne.n 90200 │ │ + b.n 90214 │ │ ldrd sl, r8, [sp, #32] │ │ cmp lr, r8 │ │ - beq.n 901a8 │ │ + beq.n 90214 │ │ sub.w ip, ip, #8 │ │ ldrd r0, r2, [r1], #8 │ │ str.w r0, [ip, r6, lsl #3] │ │ add.w r0, ip, r6, lsl #3 │ │ str r2, [r0, #4] │ │ - b.n 900b0 │ │ + b.n 9011c │ │ lsls r2, r6, #3 │ │ mov r0, fp │ │ mov r1, r9 │ │ - bl d52ca │ │ + bl d4c3c │ │ subs.w r1, r8, r6 │ │ - beq.n 901d0 │ │ + beq.n 9023c │ │ ldr r0, [sp, #12] │ │ add.w r2, fp, r6, lsl #3 │ │ mov r3, r1 │ │ add.w r0, r0, r8, lsl #3 │ │ ldrd r5, r4, [r0], #-8 │ │ subs r3, #1 │ │ strd r5, r4, [r2], #8 │ │ - bne.n 901c4 │ │ + bne.n 90230 │ │ ldr r4, [sp, #16] │ │ ldrd r2, r5, [sp, #24] │ │ - cbz r6, 901fa │ │ + cbz r6, 90266 │ │ cmp r8, r6 │ │ - bcc.w 9070e │ │ + bcc.w 9077a │ │ add r0, sp, #44 @ 0x2c │ │ mov r2, r9 │ │ mov r3, r4 │ │ strd r5, r0, [sp] │ │ add.w r0, fp, r6, lsl #3 │ │ - bl 8ffac │ │ + bl 90018 │ │ mov r8, r6 │ │ cmp r6, #33 @ 0x21 │ │ - bcs.w 90018 │ │ - b.n 8ffc2 │ │ + bcs.w 90084 │ │ + b.n 9002e │ │ cmp r4, r8 │ │ - bcc.w 90720 │ │ + bcc.w 9078c │ │ add.w r4, r9, r8, lsl #3 │ │ movs r5, #0 │ │ mov r1, fp │ │ mov sl, r2 │ │ subs r2, #3 │ │ mov.w r0, #0 │ │ it cc │ │ movcc r2, r0 │ │ add.w ip, fp, r2, lsl #3 │ │ cmp r1, ip │ │ - bcs.n 9029e │ │ + bcs.n 9030a │ │ ldr r0, [sp, #32] │ │ ldr.w lr, [r0] │ │ ldrd r6, r0, [r1] │ │ mov r3, r9 │ │ ldrd r2, r8, [r1, #8] │ │ cmp lr, r6 │ │ it cc │ │ @@ -156945,18 +156860,18 @@ │ │ str.w r0, [r2, r5, lsl #3] │ │ add.w r2, r2, r5, lsl #3 │ │ add.w r1, r1, #32 │ │ str r3, [r2, #4] │ │ it cs │ │ addcs r5, #1 │ │ cmp r1, ip │ │ - bcc.n 90222 │ │ + bcc.n 9028e │ │ add.w r2, fp, sl, lsl #3 │ │ cmp r1, r2 │ │ - bcs.n 902d6 │ │ + bcs.n 90342 │ │ ldr r0, [sp, #32] │ │ ldr.w r8, [sp, #36] @ 0x24 │ │ ldr.w ip, [r0] │ │ subs r4, #8 │ │ ldrd r6, r3, [r1], #8 │ │ mov r0, r4 │ │ cmp ip, r6 │ │ @@ -156964,66 +156879,66 @@ │ │ movcs r0, r9 │ │ str.w r6, [r0, r5, lsl #3] │ │ add.w r0, r0, r5, lsl #3 │ │ str r3, [r0, #4] │ │ it cs │ │ addcs r5, #1 │ │ cmp r1, r2 │ │ - bcc.n 902b0 │ │ + bcc.n 9031c │ │ cmp sl, r8 │ │ - bne.n 902de │ │ - b.n 902f4 │ │ + bne.n 9034a │ │ + b.n 90360 │ │ ldr.w r8, [sp, #36] @ 0x24 │ │ cmp sl, r8 │ │ - beq.n 902f4 │ │ + beq.n 90360 │ │ ldrd r0, r2, [r1], #8 │ │ subs r4, #8 │ │ str.w r0, [r9, r5, lsl #3] │ │ add.w r0, r9, r5, lsl #3 │ │ adds r5, #1 │ │ str r2, [r0, #4] │ │ mov r2, r8 │ │ - b.n 90208 │ │ + b.n 90274 │ │ lsls r2, r5, #3 │ │ mov r0, fp │ │ mov r1, r9 │ │ - bl d52ca │ │ + bl d4c3c │ │ subs.w r6, r8, r5 │ │ - beq.w 90706 │ │ + beq.w 90772 │ │ ldr r0, [sp, #12] │ │ add.w fp, fp, r5, lsl #3 │ │ mov r1, r6 │ │ add.w r0, r0, r8, lsl #3 │ │ mov r2, fp │ │ ldrd r3, r4, [r0], #-8 │ │ subs r1, #1 │ │ strd r3, r4, [r2], #8 │ │ - bne.n 90314 │ │ + bne.n 90380 │ │ cmp r8, r5 │ │ - bcc.w 90722 │ │ + bcc.w 9078e │ │ ldr r4, [sp, #16] │ │ movs r0, #0 │ │ ldr r5, [sp, #28] │ │ mov r8, r6 │ │ cmp r6, #33 @ 0x21 │ │ str r0, [sp, #20] │ │ - bcs.w 90018 │ │ - b.n 8ffc2 │ │ + bcs.w 90084 │ │ + b.n 9002e │ │ movs r0, #1 │ │ mov r1, r8 │ │ str r0, [sp, #0] │ │ mov r0, fp │ │ mov r2, r9 │ │ mov r3, r4 │ │ - bl 8fbe0 │ │ + bl 8fc4c │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ cmp r6, #7 │ │ - bls.w 90528 │ │ + bls.w 90594 │ │ ldr.w r1, [fp] │ │ movs r4, #0 │ │ ldr.w r2, [fp, #8] │ │ ldr.w r3, [fp, #16] │ │ cmp r2, r1 │ │ ldr.w r5, [fp, #24] │ │ it cs │ │ @@ -157187,108 +157102,108 @@ │ │ strd r0, r1, [r5, #16] │ │ ldr r0, [sp, #32] │ │ ldrd r0, r1, [r0] │ │ strd r0, r1, [r5, #24] │ │ sub.w r0, r6, lr │ │ cmp sl, lr │ │ str r0, [sp, #24] │ │ - bcc.n 90552 │ │ - b.n 905b0 │ │ + bcc.n 905be │ │ + b.n 9061c │ │ ldrd r1, r2, [fp] │ │ mov.w sl, #1 │ │ ldr.w r0, [fp, lr, lsl #3] │ │ strd r1, r2, [r9] │ │ add.w r1, fp, lr, lsl #3 │ │ str.w r0, [r9, lr, lsl #3] │ │ add.w r0, r9, lr, lsl #3 │ │ ldr r1, [r1, #4] │ │ str r1, [r0, #4] │ │ sub.w r0, r6, lr │ │ cmp sl, lr │ │ str r0, [sp, #24] │ │ - bcs.n 905b0 │ │ + bcs.n 9061c │ │ mov.w r8, sl, lsl #3 │ │ mov r4, sl │ │ - b.n 9056a │ │ + b.n 905d6 │ │ mov r0, r9 │ │ strd r1, ip, [r0] │ │ adds r4, #1 │ │ add.w r8, r8, #8 │ │ cmp r4, lr │ │ - beq.n 905b0 │ │ + beq.n 9061c │ │ add.w r0, r9, r4, lsl #3 │ │ ldr.w r1, [fp, r4, lsl #3] │ │ add.w r3, fp, r4, lsl #3 │ │ ldr.w lr, [r0, #-8] │ │ ldr.w ip, [r3, #4] │ │ cmp lr, r1 │ │ ldr.w lr, [sp, #40] @ 0x28 │ │ str.w r1, [r9, r4, lsl #3] │ │ str.w ip, [r0, #4] │ │ - bls.n 90560 │ │ + bls.n 905cc │ │ mov r0, r8 │ │ add.w r3, r9, r0 │ │ cmp r0, #8 │ │ ldrd r5, r2, [r3, #-8] │ │ str.w r5, [r9, r0] │ │ str r2, [r3, #4] │ │ - beq.n 9055a │ │ + beq.n 905c6 │ │ ldr.w r2, [r3, #-16] │ │ subs r0, #8 │ │ cmp r2, r1 │ │ - bhi.n 90590 │ │ + bhi.n 905fc │ │ add r0, r9 │ │ - b.n 9055c │ │ + b.n 905c8 │ │ ldr.w r8, [sp, #24] │ │ add.w r4, r9, lr, lsl #3 │ │ cmp sl, r8 │ │ - bcs.n 90638 │ │ + bcs.n 906a4 │ │ ldr r0, [sp, #40] @ 0x28 │ │ mov.w r5, sl, lsl #3 │ │ mov.w lr, #8 │ │ mov ip, r4 │ │ add.w r0, fp, r0, lsl #3 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n 905f0 │ │ + b.n 9065c │ │ mov r2, r4 │ │ ldr r0, [sp, #28] │ │ ldr.w sl, [sp, #32] │ │ ldr.w r8, [sp, #24] │ │ strd r1, r0, [r2] │ │ add.w sl, sl, #1 │ │ sub.w lr, lr, #8 │ │ add.w ip, ip, #8 │ │ cmp sl, r8 │ │ - beq.n 90638 │ │ + beq.n 906a4 │ │ ldr r0, [sp, #36] @ 0x24 │ │ add.w r2, r4, sl, lsl #3 │ │ ldr.w r3, [r2, #-8] │ │ ldr.w r1, [r0, sl, lsl #3] │ │ add.w r0, r0, sl, lsl #3 │ │ ldr r0, [r0, #4] │ │ cmp r3, r1 │ │ str.w r1, [r4, sl, lsl #3] │ │ str r0, [r2, #4] │ │ - bls.n 905e0 │ │ + bls.n 9064c │ │ mov r2, lr │ │ mov r3, ip │ │ strd r0, sl, [sp, #28] │ │ add.w sl, r3, r5 │ │ cmp r5, r2 │ │ ldrd r0, r8, [sl, #-8] │ │ str r0, [r3, r5] │ │ str.w r8, [sl, #4] │ │ - beq.n 905d0 │ │ + beq.n 9063c │ │ ldr.w r0, [sl, #-16] │ │ adds r2, #8 │ │ subs r3, #8 │ │ cmp r0, r1 │ │ - bhi.n 90616 │ │ + bhi.n 90682 │ │ adds r2, r3, r5 │ │ - b.n 905d2 │ │ + b.n 9063e │ │ mvn.w r0, #7 │ │ add.w r8, r0, r6, lsl #3 │ │ ldr r5, [sp, #40] @ 0x28 │ │ add.w r0, r9, r8 │ │ sub.w ip, r4, #8 │ │ mov sl, r9 │ │ str.w fp, [sp, #36] @ 0x24 │ │ @@ -157327,20 +157242,20 @@ │ │ add.w sl, sl, r0, lsl #3 │ │ mov.w r0, #0 │ │ it cc │ │ movcc r0, #1 │ │ add.w r4, r4, r0, lsl #3 │ │ subs r5, #1 │ │ mov r0, lr │ │ - bne.n 90650 │ │ + bne.n 906bc │ │ mov r2, r4 │ │ ldr r4, [sp, #36] @ 0x24 │ │ add.w r0, ip, #8 │ │ lsls r3, r6, #31 │ │ - beq.n 906fa │ │ + beq.n 90766 │ │ mov r1, r2 │ │ cmp sl, r0 │ │ it cc │ │ movcc r1, sl │ │ mov r3, r2 │ │ ldrd r1, r2, [r1] │ │ strd r1, r2, [fp] │ │ @@ -157352,44 +157267,44 @@ │ │ movcc r1, #1 │ │ add.w r2, r3, r2, lsl #3 │ │ add.w sl, sl, r1, lsl #3 │ │ cmp sl, r0 │ │ itt eq │ │ addeq.w r0, lr, #8 │ │ cmpeq r2, r0 │ │ - bne.n 9071c │ │ + bne.n 90788 │ │ add sp, #52 @ 0x34 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #56] @ (90748 ) │ │ + ldr r0, [pc, #56] @ (907b4 ) │ │ movs r1, #19 │ │ - ldr r2, [pc, #56] @ (9074c ) │ │ + ldr r2, [pc, #56] @ (907b8 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ - bl 413cc │ │ + bl 3fd60 │ │ + bl 416d4 │ │ udf #254 @ 0xfe │ │ - ldr r3, [pc, #32] @ (90744 ) │ │ + ldr r3, [pc, #32] @ (907b0 ) │ │ mov r0, r5 │ │ mov r1, r8 │ │ mov r2, r8 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ mov r5, r0 │ │ lsls r2, r6, #3 │ │ mov r0, r4 │ │ mov r1, r9 │ │ - bl d52ca │ │ + bl d4c3c │ │ mov r0, r5 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ nop │ │ - @ instruction: 0xb632 │ │ + push {r1, r2, r4, r6, r7, lr} │ │ movs r4, r0 │ │ - ldrh r3, [r0, #4] │ │ - vqshlu.s32 d27, d22, #24 │ │ + ldrh r7, [r2, #0] │ │ + vsli.64 , q5, #56 @ 0x38 │ │ movs r4, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #36 @ 0x24 │ │ str r1, [sp, #20] │ │ movs r6, #0 │ │ @@ -157679,45 +157594,45 @@ │ │ adds r0, #8 │ │ cmp r3, r0 │ │ itttt eq │ │ addeq.w r0, ip, r2, lsl #3 │ │ addeq.w r1, r1, r6, lsl #3 │ │ addeq r1, #8 │ │ cmpeq r0, r1 │ │ - beq.n 90aa6 │ │ - bl 413cc │ │ + beq.n 90b12 │ │ + bl 416d4 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ mov sl, r2 │ │ mov r4, r1 │ │ cmp r3, #8 │ │ - bcc.n 90afc │ │ + bcc.n 90b68 │ │ lsrs r6, r3, #3 │ │ lsls r2, r6, #3 │ │ sub.w r9, r2, r3, lsr #3 │ │ add.w r1, r0, r6, lsl #5 │ │ mov r3, r6 │ │ add.w r2, r0, r9, lsl #3 │ │ - bl 90aae │ │ + bl 90b1a │ │ add.w r1, r4, r6, lsl #5 │ │ add.w r2, r4, r9, lsl #3 │ │ mov r8, r0 │ │ mov r0, r4 │ │ mov r3, r6 │ │ - bl 90aae │ │ + bl 90b1a │ │ add.w r1, sl, r6, lsl #5 │ │ add.w r2, sl, r9, lsl #3 │ │ mov r4, r0 │ │ mov r0, sl │ │ mov r3, r6 │ │ - bl 90aae │ │ + bl 90b1a │ │ mov sl, r0 │ │ mov r0, r8 │ │ ldr.w r1, [sl] │ │ movs r5, #0 │ │ ldr r2, [r4, #0] │ │ movs r6, #0 │ │ ldr r3, [r0, #0] │ │ @@ -157747,42 +157662,42 @@ │ │ add.w r5, r0, #48 @ 0x30 │ │ ldrd lr, ip, [r0] │ │ movs r4, #2 │ │ mov fp, r8 │ │ subs.w r2, r9, lr │ │ mov sl, r9 │ │ sbcs.w r2, r8, ip │ │ - bcs.n 90b74 │ │ + bcs.n 90be0 │ │ ldrd r6, r2, [r5] │ │ subs.w r3, r6, sl │ │ sbcs.w r3, r2, fp │ │ - bcs.n 90b90 │ │ + bcs.n 90bfc │ │ adds r4, #1 │ │ adds r5, #24 │ │ mov sl, r6 │ │ mov fp, r2 │ │ cmp r1, r4 │ │ - bne.n 90b58 │ │ - b.n 90b94 │ │ + bne.n 90bc4 │ │ + b.n 90c00 │ │ ldrd r6, r3, [r5] │ │ subs.w r2, r6, sl │ │ sbcs.w r2, r3, fp │ │ - bcc.n 90b90 │ │ + bcc.n 90bfc │ │ adds r4, #1 │ │ adds r5, #24 │ │ mov sl, r6 │ │ mov fp, r3 │ │ cmp r1, r4 │ │ - bne.n 90b74 │ │ - b.n 90b94 │ │ + bne.n 90be0 │ │ + b.n 90c00 │ │ cmp r4, r1 │ │ - bne.n 90c0e │ │ + bne.n 90c7a │ │ subs.w r2, r9, lr │ │ sbcs.w r2, r8, ip │ │ - bcs.n 90c06 │ │ + bcs.n 90c72 │ │ add.w r2, r1, r1, lsl #1 │ │ lsrs r1, r1, #1 │ │ add.w r1, r1, r1, lsl #1 │ │ mvn.w r3, #11 │ │ add.w r2, r3, r2, lsl #3 │ │ movs r3, #0 │ │ lsls r1, r1, #3 │ │ @@ -157809,76 +157724,76 @@ │ │ cmp r1, r3 │ │ str.w lr, [r5, #-12] │ │ str.w sl, [r4, #4] │ │ str.w r9, [r4, #8] │ │ str.w fp, [r5, #-4] │ │ str.w ip, [r5, #4] │ │ str r6, [r4, #20] │ │ - bne.n 90bb6 │ │ + bne.n 90c22 │ │ add sp, #4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, pc} │ │ orr.w r2, r1, #1 │ │ movs r3, #62 @ 0x3e │ │ clz r2, r2 │ │ eor.w r3, r3, r2, lsl #1 │ │ movs r2, #0 │ │ add sp, #4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ ldmia.w sp!, {r4, r5, r6, lr} │ │ - b.w 90c2c │ │ + b.w 90c98 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #76 @ 0x4c │ │ mov r8, r1 │ │ mov fp, r0 │ │ cmp r1, #33 @ 0x21 │ │ - bcs.n 90c50 │ │ + bcs.n 90cbc │ │ mov r0, fp │ │ mov r1, r8 │ │ add sp, #76 @ 0x4c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 90fe8 │ │ + b.w 91054 │ │ mov r4, r3 │ │ mov r9, r2 │ │ - b.n 90c9a │ │ + b.n 90d06 │ │ mov ip, r9 │ │ add.w fp, sp, #48 @ 0x30 │ │ ldmia.w ip, {r2, r3, r4, r5, r6, lr} │ │ mov r0, r9 │ │ mov r1, fp │ │ stmia.w r1, {r2, r3, r4, r5, r6, lr} │ │ add.w r1, sl, sl, lsl #1 │ │ movs r2, #24 │ │ add.w r9, r9, r1, lsl #3 │ │ mov r1, r9 │ │ - bl d53c2 │ │ + bl d51f6 │ │ mov r1, fp │ │ mov ip, r9 │ │ ldmia.w r1, {r0, r2, r3, r4, r5, r6} │ │ add.w fp, r9, #24 │ │ mov.w r9, #0 │ │ stmia.w ip, {r0, r2, r3, r4, r5, r6} │ │ mvn.w r0, sl │ │ add r8, r0 │ │ ldr r4, [sp, #8] │ │ cmp.w r8, #33 @ 0x21 │ │ - bcc.n 90c3e │ │ + bcc.n 90caa │ │ cmp r4, #0 │ │ - beq.w 90fd6 │ │ + beq.w 91042 │ │ mov.w r3, r8, lsr #3 │ │ movs r0, #168 @ 0xa8 │ │ mla r2, r3, r0, fp │ │ add.w r0, r3, r3, lsl #1 │ │ str.w r8, [sp, #12] │ │ add.w r1, fp, r0, lsl #5 │ │ cmp.w r8, #64 @ 0x40 │ │ - bcs.n 90d06 │ │ + bcs.n 90d72 │ │ ldrd lr, ip, [r2] │ │ ldrd r6, r5, [r1] │ │ ldrd r3, r8, [fp] │ │ subs.w r0, r6, lr │ │ sbcs.w r0, r5, ip │ │ mov.w r0, #0 │ │ it cc │ │ @@ -157895,43 +157810,43 @@ │ │ sbcs.w r0, r8, ip │ │ mov.w r0, #0 │ │ it cc │ │ movcc r0, #1 │ │ eors r5, r0 │ │ it ne │ │ movne r1, fp │ │ - b.n 90d0e │ │ + b.n 90d7a │ │ mov r0, fp │ │ - bl 915f4 │ │ + bl 91660 │ │ mov r1, r0 │ │ sub.w ip, r1, fp │ │ subs r4, #1 │ │ str r4, [sp, #8] │ │ cmp.w r9, #0 │ │ str.w fp, [sp, #20] │ │ - beq.n 90d3a │ │ + beq.n 90da6 │ │ add.w r8, fp, ip │ │ ldr.w r0, [fp, ip] │ │ ldrd r1, r2, [r9] │ │ ldr.w r3, [r8, #4] │ │ subs r0, r1, r0 │ │ sbcs.w r0, r2, r3 │ │ - bcs.w 90eb2 │ │ + bcs.w 90f1e │ │ str.w r9, [sp] │ │ mov lr, fp │ │ add.w r9, sp, #48 @ 0x30 │ │ ldmia.w lr, {r0, r1, r3, r4, r5, r6} │ │ add.w r8, fp, ip │ │ mov r2, r9 │ │ mov.w sl, #24 │ │ stmia r2!, {r0, r1, r3, r4, r5, r6} │ │ mov r0, fp │ │ mov r1, r8 │ │ movs r2, #24 │ │ - bl d53c2 │ │ + bl d51f6 │ │ mov r0, r9 │ │ mov.w lr, #0 │ │ ldmia.w r0, {r1, r2, r3, r4, r5, r6} │ │ stmia.w r8, {r1, r2, r3, r4, r5, r6} │ │ add.w r8, fp, #24 │ │ mov r1, r9 │ │ mov ip, r8 │ │ @@ -157960,15 +157875,15 @@ │ │ mov r0, r1 │ │ str r1, [sp, #28] │ │ mov r4, lr │ │ ldr r1, [sp, #44] @ 0x2c │ │ add.w r8, r1, r2, lsl #3 │ │ movs r2, #24 │ │ mov r1, r8 │ │ - bl d53c2 │ │ + bl d51f6 │ │ mov r0, sl │ │ mov lr, r4 │ │ ldmia.w r0, {r1, r2, r3, r4, r5, r6} │ │ stmia.w r8, {r1, r2, r3, r4, r5, r6} │ │ add.w r5, fp, #24 │ │ ldr r0, [sp, #24] │ │ ldrd r3, r2, [sp, #36] @ 0x24 │ │ @@ -157979,15 +157894,15 @@ │ │ addcc.w lr, lr, #1 │ │ ldr r1, [sp, #28] │ │ add.w r0, r9, #24 │ │ ldr r6, [sp, #16] │ │ adds r1, #48 @ 0x30 │ │ cmp r1, r6 │ │ mov r1, sl │ │ - bcc.n 90d9e │ │ + bcc.n 90e0a │ │ ldr r0, [sp, #4] │ │ add r6, sp, #48 @ 0x30 │ │ subs r0, #48 @ 0x30 │ │ str r0, [sp, #24] │ │ ldr r0, [sp, #20] │ │ add.w r1, lr, lr, lsl #1 │ │ ldr.w sl, [sp, #24] │ │ @@ -157999,71 +157914,71 @@ │ │ ldr r2, [sp, #44] @ 0x2c │ │ adds r0, #24 │ │ add.w r8, r2, r1, lsl #3 │ │ ldrd r2, r1, [r6] │ │ strd r2, r1, [sp, #28] │ │ movs r2, #24 │ │ mov r1, r8 │ │ - bl d53c2 │ │ + bl d51f6 │ │ mov lr, r5 │ │ ldmia.w r6, {r0, r1, r2, r3, r4, r5} │ │ add r6, sp, #48 @ 0x30 │ │ add.w fp, fp, #24 │ │ add.w r9, r9, #24 │ │ stmia.w r8, {r0, r1, r2, r3, r4, r5} │ │ ldr r0, [sp, #40] @ 0x28 │ │ ldr r1, [sp, #28] │ │ subs r0, r1, r0 │ │ ldrd r1, r0, [sp, #32] │ │ sbcs.w r0, r1, r0 │ │ it cc │ │ addcc.w lr, lr, #1 │ │ cmp sl, r9 │ │ - bne.n 90dfe │ │ + bne.n 90e6a │ │ ldr.w r8, [sp, #12] │ │ cmp lr, r8 │ │ - bcs.w 90fd4 │ │ + bcs.w 91040 │ │ ldr.w fp, [sp, #20] │ │ mov r1, r6 │ │ mov sl, lr │ │ mov ip, fp │ │ ldmia.w ip, {r0, r2, r3, r4, r5, r6} │ │ stmia r1!, {r0, r2, r3, r4, r5, r6} │ │ add.w r0, lr, lr, lsl #1 │ │ movs r2, #24 │ │ add.w r9, fp, r0, lsl #3 │ │ mov r0, fp │ │ mov r1, r9 │ │ - bl d53c2 │ │ + bl d51f6 │ │ add r1, sp, #48 @ 0x30 │ │ mov ip, r9 │ │ ldmia.w r1, {r0, r2, r3, r4, r5, r6} │ │ mov r1, sl │ │ stmia.w ip, {r0, r2, r3, r4, r5, r6} │ │ mov r0, fp │ │ ldr r4, [sp, #8] │ │ ldr r2, [sp, #0] │ │ mov r3, r4 │ │ - bl 90c2c │ │ + bl 90c98 │ │ mvn.w r0, sl │ │ add r8, r0 │ │ add.w fp, r9, #24 │ │ cmp.w r8, #33 @ 0x21 │ │ - bcs.w 90c9a │ │ - b.n 90c3e │ │ + bcs.w 90d06 │ │ + b.n 90caa │ │ mov ip, fp │ │ add.w r9, sp, #48 @ 0x30 │ │ ldmia.w ip, {r0, r2, r3, r4, r5, r6} │ │ mov.w sl, #24 │ │ mov r1, r9 │ │ stmia r1!, {r0, r2, r3, r4, r5, r6} │ │ mov r0, fp │ │ mov r1, r8 │ │ movs r2, #24 │ │ - bl d53c2 │ │ + bl d51f6 │ │ mov r0, r9 │ │ add.w lr, fp, #24 │ │ ldmia.w r0, {r1, r2, r3, r4, r5, r6} │ │ mov ip, lr │ │ stmia.w r8, {r1, r2, r3, r4, r5, r6} │ │ mov r1, r9 │ │ ldmia.w ip, {r0, r2, r3, r4, r5, r6} │ │ @@ -158088,15 +158003,15 @@ │ │ mov r8, r5 │ │ str r1, [sp, #32] │ │ ldr.w r1, [fp, #24]! │ │ str r1, [sp, #24] │ │ add.w r1, sl, sl, lsl #1 │ │ add.w r9, lr, r1, lsl #3 │ │ mov r1, r9 │ │ - bl d53c2 │ │ + bl d51f6 │ │ mov r0, fp │ │ mov ip, r6 │ │ ldr.w lr, [sp, #44] @ 0x2c │ │ ldmia.w r0, {r1, r2, r3, r4, r5, r6} │ │ stmia.w r9, {r1, r2, r3, r4, r5, r6} │ │ add.w r6, ip, #24 │ │ add.w r5, r8, #24 │ │ @@ -158108,15 +158023,15 @@ │ │ it cs │ │ addcs.w sl, sl, #1 │ │ ldr r0, [sp, #28] │ │ ldr r4, [sp, #16] │ │ add.w r1, r0, #48 @ 0x30 │ │ mov r0, fp │ │ cmp r1, r4 │ │ - bcc.n 90f0e │ │ + bcc.n 90f7a │ │ ldr r0, [sp, #4] │ │ subs r0, #48 @ 0x30 │ │ str r0, [sp, #24] │ │ ldr r0, [sp, #20] │ │ add.w r1, sl, sl, lsl #1 │ │ ldr.w r9, [sp, #24] │ │ add r5, sp, #48 @ 0x30 │ │ @@ -158127,53 +158042,53 @@ │ │ addne.w r5, r0, #48 @ 0x30 │ │ ldrd r2, r1, [r5] │ │ adds r0, #24 │ │ strd r2, r1, [sp, #28] │ │ mov r1, fp │ │ movs r2, #24 │ │ mov r4, ip │ │ - bl d53c2 │ │ + bl d51f6 │ │ mov ip, r4 │ │ ldr.w lr, [sp, #44] @ 0x2c │ │ ldmia.w r5, {r0, r1, r2, r3, r4, r6} │ │ add.w r8, r8, #24 │ │ add.w ip, ip, #24 │ │ stmia.w fp, {r0, r1, r2, r3, r4, r6} │ │ ldr r0, [sp, #40] @ 0x28 │ │ ldr r1, [sp, #28] │ │ subs r0, r0, r1 │ │ ldrd r1, r0, [sp, #32] │ │ sbcs r0, r1 │ │ it cs │ │ addcs.w sl, sl, #1 │ │ cmp r9, ip │ │ - bne.n 90f6c │ │ + bne.n 90fd8 │ │ ldr.w r8, [sp, #12] │ │ ldr.w r9, [sp, #20] │ │ cmp sl, r8 │ │ - bcc.w 90c56 │ │ + bcc.w 90cc2 │ │ udf #254 @ 0xfe │ │ mov r0, fp │ │ mov r1, r8 │ │ add sp, #76 @ 0x4c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 914ea │ │ + b.w 91556 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ subw sp, sp, #1212 @ 0x4bc │ │ movs.w fp, r1, lsr #1 │ │ - beq.w 914c6 │ │ + beq.w 91532 │ │ mov r8, r0 │ │ cmp r1, #8 │ │ str r0, [sp, #24] │ │ str.w fp, [sp, #32] │ │ str r1, [sp, #0] │ │ - bcc.w 91232 │ │ + bcc.w 9129e │ │ ldrd r0, r4, [r8, #48] @ 0x30 │ │ ldrd r3, r6, [r8, #72] @ 0x48 │ │ ldrd r5, ip, [r8] │ │ subs r0, r3, r0 │ │ ldrd r2, lr, [r8, #24] │ │ sbcs.w r0, r6, r4 │ │ mov.w r3, #48 @ 0x30 │ │ @@ -158353,15 +158268,15 @@ │ │ add.w r0, sl, #48 @ 0x30 │ │ stmia.w r0, {r2, r3, r4, r5, r6, lr} │ │ add.w r0, sl, #72 @ 0x48 │ │ ldr.w lr, [sp, #28] │ │ ldmia.w lr, {r2, r3, r4, r5, r6, ip} │ │ stmia.w r0, {r2, r3, r4, r5, r6, ip} │ │ movs r0, #4 │ │ - b.n 91258 │ │ + b.n 912c4 │ │ mov r2, r8 │ │ add.w ip, sp, #40 @ 0x28 │ │ ldmia.w r2, {r0, r3, r4, r5, r6, r9} │ │ mov lr, ip │ │ stmia.w lr, {r0, r3, r4, r5, r6, r9} │ │ add.w r0, fp, fp, lsl #1 │ │ add.w lr, r8, r0, lsl #3 │ │ @@ -158371,86 +158286,86 @@ │ │ movs r0, #1 │ │ sub.w r1, r1, fp │ │ cmp r0, fp │ │ str r0, [sp, #16] │ │ add.w r0, r0, r0, lsl #1 │ │ str r1, [sp, #8] │ │ str r0, [sp, #28] │ │ - bcs.n 91312 │ │ + bcs.n 9137e │ │ ldr r0, [sp, #28] │ │ ldr.w r9, [sp, #16] │ │ lsls r0, r0, #3 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n 9129c │ │ + b.n 91308 │ │ add r1, sp, #40 @ 0x28 │ │ sub.w r4, r7, #48 @ 0x30 │ │ ldr.w r8, [sp, #24] │ │ strd ip, lr, [r1], #8 │ │ ldmia r4, {r0, r2, r3, r4} │ │ stmia r1!, {r0, r2, r3, r4} │ │ ldr.w fp, [sp, #32] │ │ add.w r9, r9, #1 │ │ ldr r0, [sp, #36] @ 0x24 │ │ cmp r9, fp │ │ add.w r0, r0, #24 │ │ str r0, [sp, #36] @ 0x24 │ │ - beq.n 91312 │ │ + beq.n 9137e │ │ add.w r6, r9, r9, lsl #1 │ │ add r0, sp, #40 @ 0x28 │ │ add.w sl, r8, r6, lsl #3 │ │ add.w r5, r0, r6, lsl #3 │ │ mov r1, sl │ │ mov fp, r5 │ │ ldmia.w r1, {r0, r2, r3, r4, ip, lr} │ │ stmia.w fp, {r0, r2, r3, r4, ip, lr} │ │ add r0, sp, #40 @ 0x28 │ │ ldr.w ip, [r0, r6, lsl #3] │ │ ldrd r0, r1, [r5, #-24] │ │ ldr.w lr, [r5, #4] │ │ subs.w r0, ip, r0 │ │ sbcs.w r0, lr, r1 │ │ - bcs.n 91288 │ │ + bcs.n 912f4 │ │ add.w r3, sl, #8 │ │ ldr.w fp, [sp, #36] @ 0x24 │ │ sub.w r4, r7, #48 @ 0x30 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia r4!, {r0, r1, r2, r3} │ │ add r0, sp, #40 @ 0x28 │ │ cmp.w fp, #24 │ │ add.w r6, r0, fp │ │ sub.w sl, r6, #24 │ │ mov r2, r6 │ │ ldmia.w sl, {r0, r1, r3, r4, r5, r8} │ │ stmia.w r2, {r0, r1, r3, r4, r5, r8} │ │ - beq.n 91276 │ │ + beq.n 912e2 │ │ ldrd r0, r1, [r6, #-48] @ 0x30 │ │ sub.w fp, fp, #24 │ │ subs.w r0, ip, r0 │ │ sbcs.w r0, lr, r1 │ │ - bcc.n 912de │ │ + bcc.n 9134a │ │ add r0, sp, #40 @ 0x28 │ │ add.w r1, r0, fp │ │ - b.n 91278 │ │ + b.n 912e4 │ │ add.w r0, fp, fp, lsl #1 │ │ add r1, sp, #40 @ 0x28 │ │ ldr r2, [sp, #16] │ │ add.w r4, r1, r0, lsl #3 │ │ ldr r1, [sp, #8] │ │ cmp r2, r1 │ │ - bcs.n 913dc │ │ + bcs.n 91448 │ │ ldr r1, [sp, #24] │ │ str r4, [sp, #20] │ │ add.w r0, r1, r0, lsl #3 │ │ str r0, [sp, #4] │ │ ldr r0, [sp, #28] │ │ str r4, [sp, #12] │ │ mov.w ip, r0, lsl #3 │ │ movs r0, #24 │ │ str r0, [sp, #28] │ │ - b.n 91364 │ │ + b.n 913d0 │ │ ldr r4, [sp, #12] │ │ mov r0, r4 │ │ sub.w r6, r7, #48 @ 0x30 │ │ ldr r5, [sp, #36] @ 0x24 │ │ strd r5, sl, [r0], #8 │ │ ldmia r6, {r1, r2, r3, r6} │ │ stmia r0!, {r1, r2, r3, r6} │ │ @@ -158460,15 +158375,15 @@ │ │ str r0, [sp, #28] │ │ ldr r0, [sp, #20] │ │ adds r2, #1 │ │ adds r0, #24 │ │ str r0, [sp, #20] │ │ ldr r0, [sp, #8] │ │ cmp r2, r0 │ │ - beq.n 913dc │ │ + beq.n 91448 │ │ add.w r6, r2, r2, lsl #1 │ │ ldr r0, [sp, #4] │ │ str r2, [sp, #16] │ │ add.w lr, r0, r6, lsl #3 │ │ add.w r2, r4, r6, lsl #3 │ │ mov r8, lr │ │ mov r1, r2 │ │ @@ -158477,38 +158392,38 @@ │ │ ldr r4, [sp, #12] │ │ ldrd r0, r1, [r2, #-24] │ │ ldr.w sl, [r2, #4] │ │ ldr.w r3, [r4, r6, lsl #3] │ │ str r3, [sp, #36] @ 0x24 │ │ subs r0, r3, r0 │ │ sbcs.w r0, sl, r1 │ │ - bcs.n 9134e │ │ + bcs.n 913ba │ │ add.w r3, lr, #8 │ │ sub.w lr, r7, #48 @ 0x30 │ │ ldmia r3, {r0, r1, r2, r3} │ │ stmia.w lr, {r0, r1, r2, r3} │ │ ldr.w lr, [sp, #28] │ │ ldr r0, [sp, #20] │ │ add.w r8, r0, ip │ │ cmp ip, lr │ │ sub.w fp, r8, #24 │ │ mov r2, r8 │ │ ldmia.w fp, {r1, r3, r4, r5, r6, r9} │ │ stmia.w r2, {r1, r3, r4, r5, r6, r9} │ │ - beq.n 9133c │ │ + beq.n 913a8 │ │ ldrd r1, r2, [r8, #-48] @ 0x30 │ │ add.w lr, lr, #24 │ │ ldr r3, [sp, #36] @ 0x24 │ │ subs r0, #24 │ │ subs r1, r3, r1 │ │ sbcs.w r1, sl, r2 │ │ - bcc.n 913ac │ │ + bcc.n 91418 │ │ ldr r4, [sp, #12] │ │ add r0, ip │ │ - b.n 91340 │ │ + b.n 913ac │ │ ldr r0, [sp, #0] │ │ add.w lr, sp, #40 @ 0x28 │ │ ldr r6, [sp, #24] │ │ sub.w sl, r4, #24 │ │ mov ip, r4 │ │ add.w r1, r0, r0, lsl #1 │ │ mvn.w r0, #23 │ │ @@ -158561,20 +158476,20 @@ │ │ add.w r0, r0, r0, lsl #1 │ │ adds r6, #24 │ │ add.w sl, sl, r1, lsl #3 │ │ str.w r9, [sp, #36] @ 0x24 │ │ add.w r8, r8, r0, lsl #3 │ │ ldr r0, [sp, #32] │ │ subs r0, #1 │ │ - bne.n 91400 │ │ + bne.n 9146c │ │ ldr r0, [sp, #0] │ │ mov r9, r8 │ │ add.w r8, sl, #24 │ │ lsls r1, r0, #31 │ │ - beq.n 914b8 │ │ + beq.n 91524 │ │ mov r0, ip │ │ cmp lr, r8 │ │ it cc │ │ movcc r0, lr │ │ mov sl, r6 │ │ ldmia.w r0, {r1, r2, r3, r4, r5, r6} │ │ stmia.w sl, {r1, r2, r3, r4, r5, r6} │ │ @@ -158582,74 +158497,74 @@ │ │ addcc.w lr, lr, #24 │ │ addcs.w ip, ip, #24 │ │ ldr r4, [sp, #24] │ │ cmp lr, r8 │ │ itt eq │ │ addeq.w r0, r9, #24 │ │ cmpeq ip, r0 │ │ - bne.n 914d0 │ │ + bne.n 9153c │ │ addw sp, sp, #1212 @ 0x4bc │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - bl 413cc │ │ + bl 416d4 │ │ udf #254 @ 0xfe │ │ mov r5, r0 │ │ ldr r0, [sp, #20] │ │ add r1, sp, #40 @ 0x28 │ │ lsls r2, r0, #3 │ │ mov r0, r4 │ │ - bl d4c50 │ │ + bl d50a2 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #36 @ 0x24 │ │ add.w lr, r1, r1, lsr #1 │ │ mov fp, r0 │ │ str r1, [sp, #0] │ │ - b.n 9150a │ │ + b.n 91576 │ │ ldr.w lr, [sp, #4] │ │ ldr r1, [sp, #0] │ │ cmp.w lr, #0 │ │ - beq.n 915ec │ │ + beq.n 91658 │ │ sub.w lr, lr, #1 │ │ str.w lr, [sp, #4] │ │ cmp lr, r1 │ │ - bcs.n 9154c │ │ + bcs.n 915b8 │ │ mov r1, fp │ │ add.w r8, sp, #8 │ │ ldmia.w r1, {r0, r2, r3, r4, r5, r6} │ │ mov ip, r8 │ │ stmia.w ip, {r0, r2, r3, r4, r5, r6} │ │ add.w r0, lr, lr, lsl #1 │ │ movs r2, #24 │ │ add.w r9, fp, r0, lsl #3 │ │ mov r0, fp │ │ mov r1, r9 │ │ - bl d53c2 │ │ + bl d51f6 │ │ mov r0, r8 │ │ ldr.w lr, [sp, #4] │ │ ldmia.w r0, {r1, r2, r3, r4, r5, r6} │ │ stmia.w r9, {r1, r2, r3, r4, r5, r6} │ │ movs r4, #0 │ │ ldr r1, [sp, #0] │ │ - b.n 91550 │ │ + b.n 915bc │ │ sub.w r4, lr, r1 │ │ lsls r6, r4, #1 │ │ adds r3, r6, #1 │ │ cmp r1, lr │ │ mov ip, lr │ │ it cc │ │ movcc ip, r1 │ │ cmp r3, ip │ │ - bcs.n 914fe │ │ + bcs.n 9156a │ │ adds r0, r6, #2 │ │ cmp r0, ip │ │ - bcs.n 9158c │ │ + bcs.n 915f8 │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r6, r3, r3, lsl #1 │ │ ldr.w r2, [fp, r0, lsl #3] │ │ add.w r0, fp, r0, lsl #3 │ │ ldr.w r5, [fp, r6, lsl #3] │ │ add.w r6, fp, r6, lsl #3 │ │ ldr r0, [r0, #4] │ │ @@ -158665,15 +158580,15 @@ │ │ ldr.w r6, [fp, r0, lsl #3] │ │ ldr.w r4, [fp, r3, lsl #3] │ │ add.w r3, fp, r3, lsl #3 │ │ ldr r0, [r1, #4] │ │ ldr r5, [r3, #4] │ │ subs r2, r4, r6 │ │ sbcs.w r2, r5, r0 │ │ - bcs.n 914fe │ │ + bcs.n 9156a │ │ strd r6, r0, [r3] │ │ add.w r6, r1, #8 │ │ str r4, [r1, #0] │ │ str r5, [r1, #4] │ │ ldmia r6, {r0, r4, r5, r6} │ │ ldrd r2, r9, [r3, #8] │ │ ldrd r8, sl, [r3, #16] │ │ @@ -158685,46 +158600,46 @@ │ │ str r5, [r3, #16] │ │ adds r3, r6, #1 │ │ cmp r3, ip │ │ str r2, [r1, #8] │ │ str.w r9, [r1, #12] │ │ str.w r8, [r1, #16] │ │ str.w sl, [r1, #20] │ │ - bcc.n 91560 │ │ - b.n 914fe │ │ + bcc.n 915cc │ │ + b.n 9156a │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ mov fp, r2 │ │ mov r4, r1 │ │ cmp r3, #8 │ │ - bcc.n 91646 │ │ + bcc.n 916b2 │ │ lsrs r6, r3, #3 │ │ mov.w r9, #168 @ 0xa8 │ │ mla r2, r6, r9, r0 │ │ add.w sl, r6, r6, lsl #1 │ │ mov r3, r6 │ │ add.w r1, r0, sl, lsl #5 │ │ - bl 915f4 │ │ + bl 91660 │ │ mla r2, r6, r9, r4 │ │ add.w r1, r4, sl, lsl #5 │ │ mov r8, r0 │ │ mov r0, r4 │ │ mov r3, r6 │ │ - bl 915f4 │ │ + bl 91660 │ │ mla r2, r6, r9, fp │ │ add.w r1, fp, sl, lsl #5 │ │ mov r4, r0 │ │ mov r0, fp │ │ mov r3, r6 │ │ - bl 915f4 │ │ + bl 91660 │ │ mov fp, r0 │ │ mov r0, r8 │ │ ldrd lr, ip, [fp] │ │ movs r5, #0 │ │ ldrd r3, r6, [r4] │ │ ldrd r2, r8, [r0] │ │ subs.w r1, r3, lr │ │ @@ -158747,15 +158662,15 @@ │ │ eors r3, r5 │ │ it ne │ │ movne r4, r0 │ │ mov r0, r4 │ │ add sp, #4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - bmi.n 91642 │ │ + bmi.n 916ae │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #404 @ 0x194 │ │ mov r8, r0 │ │ movw r0, #25976 @ 0x6578 │ │ strh.w r0, [sp, #20] │ │ @@ -158768,20 +158683,20 @@ │ │ add r1, sp, #8 │ │ str r0, [sp, #12] │ │ movt r2, #28530 @ 0x6f72 │ │ movs r0, #0 │ │ cmp r1, r1 │ │ str r2, [sp, #8] │ │ strb.w r0, [sp, #22] │ │ - beq.n 916e2 │ │ + beq.n 9174e │ │ movs r2, #0 │ │ ldrb r3, [r1, r2] │ │ - cbz r3, 91718 │ │ + cbz r3, 91784 │ │ adds r2, #1 │ │ - bne.n 916d8 │ │ + bne.n 91744 │ │ ldr r2, [sp, #8] │ │ movw r3, #256 @ 0x100 │ │ ldr r6, [sp, #12] │ │ movt r3, #257 @ 0x101 │ │ subs r5, r3, r2 │ │ subs r3, r3, r6 │ │ orrs r2, r5 │ │ @@ -158790,138 +158705,138 @@ │ │ mvns r2, r2 │ │ tst.w r2, #2155905152 @ 0x80808080 │ │ mov.w r2, #0 │ │ it eq │ │ moveq r2, #8 │ │ add r1, r2 │ │ ldrb r3, [r1, r0] │ │ - cbz r3, 91716 │ │ + cbz r3, 91782 │ │ adds r0, #1 │ │ eor.w r3, r2, r0 │ │ cmp r3, #15 │ │ - bne.n 91706 │ │ - b.n 9176c │ │ + bne.n 91772 │ │ + b.n 917d8 │ │ add r2, r0 │ │ cmp r2, #14 │ │ - bne.n 9176c │ │ + bne.n 917d8 │ │ mov.w r0, #256 @ 0x100 │ │ mov.w r5, #256 @ 0x100 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 9187c │ │ + beq.w 918e8 │ │ add.w r9, sp, #8 │ │ add.w sl, sp, #392 @ 0x188 │ │ mov r6, r0 │ │ mov.w fp, #1 │ │ strd r5, r0, [sp, #392] @ 0x188 │ │ mov r0, r9 │ │ mov r1, r6 │ │ mov r2, r5 │ │ - blx d8a00 │ │ + blx d8a10 │ │ mov r4, r0 │ │ adds r0, #1 │ │ - beq.n 917da │ │ + beq.n 91846 │ │ cmp r4, r5 │ │ str r4, [sp, #400] @ 0x190 │ │ - bne.n 91818 │ │ + bne.n 91884 │ │ mov r0, sl │ │ mov r1, r5 │ │ movs r2, #1 │ │ movs r3, #1 │ │ str.w fp, [sp] │ │ - bl 77788 │ │ + bl 777f0 │ │ ldrd r5, r6, [sp, #392] @ 0x188 │ │ - b.n 91740 │ │ - ldr r0, [pc, #324] @ (918b4 ) │ │ + b.n 917ac │ │ + ldr r0, [pc, #324] @ (91920 ) │ │ mov.w r9, #2 │ │ - ldr r4, [pc, #324] @ (918b8 ) │ │ + ldr r4, [pc, #324] @ (91924 ) │ │ mov.w sl, #0 │ │ add r0, pc │ │ movs r6, #0 │ │ add r4, pc │ │ ldrb r0, [r0, #0] │ │ uxtb r1, r0 │ │ mov r0, r6 │ │ tbb [pc, r1] │ │ lsls r3, r6, #12 │ │ lsrs r2, r0, #32 │ │ ldrb r0, [r4, #8] │ │ mov.w r5, #2147483648 @ 0x80000000 │ │ lsls r0, r0, #24 │ │ - bne.n 9185c │ │ - b.n 917fe │ │ + bne.n 918c8 │ │ + b.n 9186a │ │ ldrb r0, [r4, #8] │ │ mov.w r5, #2147483648 @ 0x80000000 │ │ cmp r0, #0 │ │ - bne.n 9185c │ │ + bne.n 918c8 │ │ ldrd r9, r6, [r4] │ │ movs r1, #2 │ │ - ldr r0, [pc, #276] @ (918c0 ) │ │ + ldr r0, [pc, #276] @ (9192c ) │ │ strb.w r1, [r8, #4] │ │ ldr r1, [r6, #0] │ │ add r0, pc │ │ str.w r5, [r8] │ │ str.w r0, [r8, #8] │ │ - cbz r1, 917c0 │ │ + cbz r1, 9182c │ │ mov r0, r9 │ │ blx r1 │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r9 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add sp, #404 @ 0x194 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - blx d8850 │ │ + blx d8860 │ │ cmp r5, #0 │ │ ldr r4, [r0, #0] │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov.w r9, #0 │ │ mov r0, r4 │ │ - bl 91924 │ │ + bl 91990 │ │ uxtb r0, r0 │ │ mov.w r5, #2147483648 @ 0x80000000 │ │ lsls r0, r0, #24 │ │ - bne.n 9185c │ │ - ldr r0, [pc, #188] @ (918bc ) │ │ + bne.n 918c8 │ │ + ldr r0, [pc, #188] @ (91928 ) │ │ movs r1, #2 │ │ strb.w r1, [r8, #4] │ │ add r0, pc │ │ str.w r5, [r8] │ │ str.w r0, [r8, #8] │ │ add sp, #404 @ 0x194 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ cmp r5, r4 │ │ - bls.n 91836 │ │ - cbz r4, 9184a │ │ + bls.n 918a2 │ │ + cbz r4, 918b6 │ │ mov r0, r6 │ │ mov r1, r4 │ │ - blx d8870 │ │ + blx d8880 │ │ mov r9, r0 │ │ mov r5, r4 │ │ - cbnz r0, 91838 │ │ + cbnz r0, 918a4 │ │ movs r0, #1 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ udf #254 @ 0xfe │ │ mov r9, r6 │ │ mov.w sl, r9, lsr #16 │ │ mov.w r6, r9, lsr #8 │ │ mov r0, r9 │ │ cmp.w r5, #2147483648 @ 0x80000000 │ │ - beq.n 91780 │ │ - b.n 9185c │ │ + beq.n 917ec │ │ + b.n 918c8 │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov.w r9, #1 │ │ mov.w sl, #0 │ │ movs r6, #0 │ │ mov r5, r4 │ │ uxtb r0, r6 │ │ mov.w r1, sl, lsl #16 │ │ orr.w r0, r1, r0, lsl #8 │ │ @@ -158930,42 +158845,42 @@ │ │ str.w r4, [r8, #8] │ │ strd r5, r0, [r8] │ │ add sp, #404 @ 0x194 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #1 │ │ mov.w r1, #256 @ 0x100 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ mov r5, r0 │ │ ldr r0, [r6, #4] │ │ - cbnz r0, 91890 │ │ + cbnz r0, 918fc │ │ mov r6, r4 │ │ - b.n 918a6 │ │ + b.n 91912 │ │ mov r0, r9 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r6, r4 │ │ - b.n 918a6 │ │ + b.n 91912 │ │ mov r5, r0 │ │ - b.n 918a6 │ │ + b.n 91912 │ │ mov r5, r0 │ │ ldr r0, [sp, #392] @ 0x188 │ │ - cbz r0, 918ac │ │ + cbz r0, 91918 │ │ ldr r6, [sp, #396] @ 0x18c │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ nop │ │ - add r4, pc, #176 @ (adr r4, 91968 ) │ │ + add r3, pc, #832 @ (adr r3, 91c64 ) │ │ movs r4, r0 │ │ - add r4, pc, #112 @ (adr r4, 9192c ) │ │ + add r3, pc, #768 @ (adr r3, 91c28 ) │ │ movs r4, r0 │ │ - add r2, pc, #824 @ (adr r2, 91bf8 ) │ │ + add r2, pc, #456 @ (adr r2, 91af4 ) │ │ movs r4, r0 │ │ - add r3, pc, #144 @ (adr r3, 91954 ) │ │ + add r2, pc, #800 @ (adr r2, 91c50 ) │ │ movs r4, r0 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ ldrd r1, r2, [r0] │ │ mov r4, r0 │ │ movs r0, #48 @ 0x30 │ │ @@ -158974,41 +158889,41 @@ │ │ movs r5, #4 │ │ lsls r0, r1, #1 │ │ cmp r0, #4 │ │ add r0, sp, #12 │ │ it hi │ │ lslhi r5, r1, #1 │ │ mov r3, r5 │ │ - bl 77834 │ │ + bl 7789c │ │ ldr r0, [sp, #12] │ │ cmp r0, #1 │ │ itttt ne │ │ ldrne r0, [sp, #16] │ │ strdne r5, r0, [r4] │ │ addne sp, #24 │ │ popne {r4, r5, r7, pc} │ │ ldrd r0, r1, [sp, #16] │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ ldr r0, [r0, #16] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [r4, #20] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r0, [r4, #28] │ │ - cbz r0, 91922 │ │ + cbz r0, 9198e │ │ ldr r0, [r4, #32] │ │ ldmia.w sp!, {r4, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ pop {r4, r6, r7, pc} │ │ subs r1, r0, #1 │ │ cmp r1, #121 @ 0x79 │ │ - bhi.w 91a9e │ │ + bhi.w 91b0a │ │ movs r0, #34 @ 0x22 │ │ tbh [pc, r1, lsl #1] │ │ lsls r2, r7, #1 │ │ lsls r4, r5, #2 │ │ lsls r6, r6, #2 │ │ lsls r6, r5, #2 │ │ lsls r6, r6, #2 │ │ @@ -159199,130 +159114,130 @@ │ │ bx lr │ │ movs r0, #24 │ │ bx lr │ │ movs r0, #2 │ │ bx lr │ │ movs r0, #17 │ │ bx lr │ │ - bmi.n 91a66 │ │ + bmi.n 91ad2 │ │ cmp r1, #0 │ │ - beq.n 91b88 │ │ + beq.n 91bf4 │ │ push {r4, r5, r6, r7, lr} │ │ str.w r8, [sp, #-4]! │ │ - ldr r3, [pc, #200] @ (91b90 ) │ │ + ldr r3, [pc, #200] @ (91bfc ) │ │ add.w ip, r0, r1 │ │ movs r2, #0 │ │ mov r4, r0 │ │ add r3, pc │ │ mov r8, r3 │ │ - b.n 91aec │ │ + b.n 91b58 │ │ orr.w r6, r3, lr, lsl #6 │ │ adds r4, r5, #2 │ │ sub.w r3, r6, #9 │ │ cmp r3, #5 │ │ - bcs.n 91b2c │ │ + bcs.n 91b98 │ │ subs r2, r2, r5 │ │ cmp r4, ip │ │ add r2, r4 │ │ - beq.n 91b78 │ │ + beq.n 91be4 │ │ mov r5, r4 │ │ ldrsb.w r3, [r4], #1 │ │ cmp.w r3, #4294967295 @ 0xffffffff │ │ uxtb r6, r3 │ │ - bgt.n 91adc │ │ + bgt.n 91b48 │ │ ldrb r3, [r5, #1] │ │ and.w lr, r6, #31 │ │ cmp r6, #224 @ 0xe0 │ │ and.w r3, r3, #63 @ 0x3f │ │ - bcc.n 91ad6 │ │ + bcc.n 91b42 │ │ ldrb r4, [r5, #2] │ │ cmp r6, #240 @ 0xf0 │ │ and.w r4, r4, #63 @ 0x3f │ │ orr.w r3, r4, r3, lsl #6 │ │ - bcc.n 91b48 │ │ + bcc.n 91bb4 │ │ ldrb r4, [r5, #3] │ │ and.w r6, lr, #7 │ │ and.w r4, r4, #63 @ 0x3f │ │ orr.w r3, r4, r3, lsl #6 │ │ adds r4, r5, #4 │ │ orr.w r6, r3, r6, lsl #18 │ │ - b.n 91adc │ │ + b.n 91b48 │ │ cmp r6, #32 │ │ - beq.n 91ae4 │ │ + beq.n 91b50 │ │ cmp r6, #128 @ 0x80 │ │ - bcc.n 91b7a │ │ + bcc.n 91be6 │ │ lsrs r3, r6, #8 │ │ cmp r3, #31 │ │ - bgt.n 91b50 │ │ - cbz r3, 91b60 │ │ + bgt.n 91bbc │ │ + cbz r3, 91bcc │ │ cmp r3, #22 │ │ - bne.n 91b7a │ │ + bne.n 91be6 │ │ cmp.w r6, #5760 @ 0x1680 │ │ - beq.n 91ae4 │ │ - b.n 91b7a │ │ + beq.n 91b50 │ │ + b.n 91be6 │ │ orr.w r6, r3, lr, lsl #12 │ │ adds r4, r5, #3 │ │ - b.n 91adc │ │ + b.n 91b48 │ │ cmp r3, #32 │ │ - beq.n 91b6c │ │ + beq.n 91bd8 │ │ cmp r3, #48 @ 0x30 │ │ - bne.n 91b7a │ │ + bne.n 91be6 │ │ cmp.w r6, #12288 @ 0x3000 │ │ - beq.n 91ae4 │ │ - b.n 91b7a │ │ + beq.n 91b50 │ │ + b.n 91be6 │ │ uxtb r3, r6 │ │ ldrb.w r3, [r8, r3] │ │ lsls r3, r3, #31 │ │ - bne.n 91ae4 │ │ - b.n 91b7a │ │ + bne.n 91b50 │ │ + b.n 91be6 │ │ uxtb r3, r6 │ │ ldrb.w r3, [r8, r3] │ │ lsls r3, r3, #30 │ │ - bmi.n 91ae4 │ │ - b.n 91b7a │ │ + bmi.n 91b50 │ │ + b.n 91be6 │ │ mov r2, r1 │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ add r0, r2 │ │ subs r1, r1, r2 │ │ bx lr │ │ movs r2, #0 │ │ add r0, r2 │ │ subs r1, r1, r2 │ │ bx lr │ │ - strb r0, [r2, #19] │ │ + strb r4, [r4, #17] │ │ @ instruction: 0xfff8e9d0 │ │ movs r1, #0 │ │ cmp r2, r1 │ │ - beq.n 91bb0 │ │ + beq.n 91c1c │ │ push {r4, lr} │ │ mov r3, r2 │ │ ldrb.w r1, [r3], #1 │ │ str r3, [r0, #0] │ │ sxtb r3, r1 │ │ cmp r3, #0 │ │ - bmi.n 91bb4 │ │ + bmi.n 91c20 │ │ movs r0, #1 │ │ pop {r4, pc} │ │ movs r0, #0 │ │ bx lr │ │ adds r3, r2, #2 │ │ str r3, [r0, #0] │ │ ldrb r3, [r2, #1] │ │ and.w ip, r1, #31 │ │ cmp r1, #224 @ 0xe0 │ │ and.w r3, r3, #63 @ 0x3f │ │ - bcc.n 91bf4 │ │ + bcc.n 91c60 │ │ ldrb.w lr, [r2, #2] │ │ adds r4, r2, #3 │ │ str r4, [r0, #0] │ │ cmp r1, #240 @ 0xf0 │ │ and.w r4, lr, #63 @ 0x3f │ │ orr.w r3, r4, r3, lsl #6 │ │ - bcc.n 91bfc │ │ + bcc.n 91c68 │ │ ldrb r1, [r2, #3] │ │ adds r2, #4 │ │ str r2, [r0, #0] │ │ and.w r0, r1, #63 @ 0x3f │ │ and.w r1, ip, #7 │ │ orr.w r0, r0, r3, lsl #6 │ │ orr.w r1, r0, r1, lsl #18 │ │ @@ -159332,85 +159247,85 @@ │ │ movs r0, #1 │ │ pop {r4, pc} │ │ orr.w r1, r3, ip, lsl #12 │ │ movs r0, #1 │ │ pop {r4, pc} │ │ ldrb r3, [r1, #0] │ │ cmp r2, #1 │ │ - bne.n 91c1a │ │ + bne.n 91c86 │ │ cmp r3, #45 @ 0x2d │ │ it ne │ │ cmpne r3, #43 @ 0x2b │ │ - bne.n 91c1a │ │ + bne.n 91c86 │ │ movs r1, #1 │ │ strb r1, [r0, #1] │ │ strb r1, [r0, #0] │ │ bx lr │ │ push {r4, r5, r6, lr} │ │ cmp r3, #43 @ 0x2b │ │ itt eq │ │ addeq r1, #1 │ │ subeq r2, #1 │ │ cmp r2, #17 │ │ - bcs.n 91c60 │ │ - cbz r2, 91ca0 │ │ + bcs.n 91ccc │ │ + cbz r2, 91d0c │ │ movs r4, #0 │ │ mov.w lr, #0 │ │ ldrb r6, [r1, #0] │ │ sub.w r5, r6, #65 @ 0x41 │ │ sub.w r3, r6, #48 @ 0x30 │ │ cmp r6, #57 @ 0x39 │ │ bic.w r5, r5, #32 │ │ it hi │ │ addhi.w r3, r5, #10 │ │ cmp r3, #15 │ │ - bhi.n 91cd2 │ │ + bhi.n 91d3e │ │ orr.w r3, r3, r4, lsl #4 │ │ mov.w r6, lr, lsl #4 │ │ orr.w lr, r6, r4, lsr #28 │ │ adds r1, #1 │ │ subs r2, #1 │ │ mov r4, r3 │ │ - bne.n 91c30 │ │ - b.n 91ca6 │ │ + bne.n 91c9c │ │ + b.n 91d12 │ │ mov.w ip, #0 │ │ movs r4, #0 │ │ mov.w lr, #0 │ │ ldrb r5, [r1, #0] │ │ cmp.w ip, lr, lsr #28 │ │ sub.w r3, r5, #48 @ 0x30 │ │ sub.w r6, r5, #65 @ 0x41 │ │ - bne.n 91cb4 │ │ + bne.n 91d20 │ │ cmp r5, #57 @ 0x39 │ │ bic.w r6, r6, #32 │ │ it hi │ │ addhi.w r3, r6, #10 │ │ cmp r3, #16 │ │ - bcs.n 91cd2 │ │ + bcs.n 91d3e │ │ orr.w r3, r3, r4, lsl #4 │ │ mov.w r6, lr, lsl #4 │ │ orr.w lr, r6, r4, lsr #28 │ │ adds r1, #1 │ │ subs r2, #1 │ │ mov r4, r3 │ │ - bne.n 91c6a │ │ - b.n 91ca6 │ │ + bne.n 91cd6 │ │ + b.n 91d12 │ │ movs r3, #0 │ │ mov.w lr, #0 │ │ strd r3, lr, [r0, #8] │ │ movs r1, #0 │ │ ldmia.w sp!, {r4, r5, r6, lr} │ │ strb r1, [r0, #0] │ │ bx lr │ │ cmp r5, #57 @ 0x39 │ │ bic.w r1, r6, #33 @ 0x21 │ │ it hi │ │ addhi.w r3, r1, #10 │ │ cmp r3, #16 │ │ - bcs.n 91cd2 │ │ + bcs.n 91d3e │ │ movs r1, #2 │ │ strb r1, [r0, #1] │ │ movs r1, #1 │ │ ldmia.w sp!, {r4, r5, r6, lr} │ │ strb r1, [r0, #0] │ │ bx lr │ │ movs r1, #1 │ │ @@ -159432,18 +159347,18 @@ │ │ strd r1, r2, [sp, #16] │ │ add r1, sp, #12 │ │ str r0, [sp, #12] │ │ str r0, [sp, #32] │ │ mov r0, sp │ │ mov r6, r2 │ │ str r2, [sp, #28] │ │ - bl 7ab50 │ │ + bl 7abb8 │ │ ldr r0, [sp, #0] │ │ cmp r0, #1 │ │ - bne.n 91d28 │ │ + bne.n 91d94 │ │ ldrd r0, r1, [sp, #4] │ │ adds r3, r4, #4 │ │ subs r2, r6, r1 │ │ add r1, r5 │ │ stmia r3!, {r0, r1, r2} │ │ str r5, [r4, #0] │ │ add sp, #40 @ 0x28 │ │ @@ -159451,86 +159366,86 @@ │ │ pop {r4, r5, r6, r7, pc} │ │ movs r5, #0 │ │ str r5, [r4, #0] │ │ add sp, #40 @ 0x28 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ cmp r2, #1 │ │ - beq.n 91d44 │ │ - cbnz r2, 91d58 │ │ + beq.n 91db0 │ │ + cbnz r2, 91dc4 │ │ movs r1, #0 │ │ strb r1, [r0, #1] │ │ movs r1, #1 │ │ strb r1, [r0, #0] │ │ bx lr │ │ ldrb r3, [r1, #0] │ │ cmp r3, #45 @ 0x2d │ │ iteee ne │ │ cmpne r3, #43 @ 0x2b │ │ moveq r1, #1 │ │ strbeq r1, [r0, #1] │ │ strbeq r1, [r0, #0] │ │ it eq │ │ bxeq lr │ │ - b.n 91d5a │ │ + b.n 91dc6 │ │ ldrb r3, [r1, #0] │ │ push {r4, r5, r7, lr} │ │ cmp r3, #43 @ 0x2b │ │ itt eq │ │ addeq r1, #1 │ │ subeq r2, #1 │ │ cmp r2, #9 │ │ - bcs.n 91da0 │ │ + bcs.n 91e0c │ │ mov.w lr, #0 │ │ - cbz r2, 91d92 │ │ + cbz r2, 91dfe │ │ ldrb r5, [r1, #0] │ │ sub.w r4, r5, #65 @ 0x41 │ │ sub.w r3, r5, #48 @ 0x30 │ │ cmp r5, #57 @ 0x39 │ │ bic.w r4, r4, #32 │ │ it hi │ │ addhi.w r3, r4, #10 │ │ cmp r3, #15 │ │ - bhi.n 91dfc │ │ + bhi.n 91e68 │ │ orr.w lr, r3, lr, lsl #4 │ │ adds r1, #1 │ │ subs r2, #1 │ │ - bne.n 91d6e │ │ + bne.n 91dda │ │ str.w lr, [r0, #4] │ │ movs r1, #0 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ strb r1, [r0, #0] │ │ bx lr │ │ mov.w ip, #0 │ │ mov.w lr, #0 │ │ cmp r2, #0 │ │ - beq.n 91d92 │ │ + beq.n 91dfe │ │ ldrb.w r4, [r1], #1 │ │ cmp.w ip, lr, lsr #28 │ │ sub.w r3, r4, #48 @ 0x30 │ │ sub.w r5, r4, #65 @ 0x41 │ │ - bne.n 91dde │ │ + bne.n 91e4a │ │ cmp r4, #57 @ 0x39 │ │ bic.w r5, r5, #32 │ │ it hi │ │ addhi.w r3, r5, #10 │ │ cmp r3, #16 │ │ - bcs.n 91dfc │ │ + bcs.n 91e68 │ │ mov.w r5, lr, lsl #4 │ │ orr.w lr, r3, r5 │ │ subs r2, #1 │ │ cmp r2, #0 │ │ - bne.n 91dac │ │ - b.n 91d92 │ │ + bne.n 91e18 │ │ + b.n 91dfe │ │ cmp r4, #57 @ 0x39 │ │ bic.w r1, r5, #33 @ 0x21 │ │ it hi │ │ addhi.w r3, r1, #10 │ │ cmp r3, #16 │ │ - bcs.n 91dfc │ │ + bcs.n 91e68 │ │ movs r1, #2 │ │ strb r1, [r0, #1] │ │ movs r1, #1 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ strb r1, [r0, #0] │ │ bx lr │ │ movs r1, #1 │ │ @@ -159539,155 +159454,155 @@ │ │ strb r1, [r0, #0] │ │ bx lr │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ mov r4, r2 │ │ mov r5, r0 │ │ - cbz r2, 91e2a │ │ + cbz r2, 91e96 │ │ mov r0, r4 │ │ mov r6, r1 │ │ - blx d87f0 │ │ + blx d8810 │ │ mov r1, r6 │ │ - cbnz r0, 91e2c │ │ + cbnz r0, 91e98 │ │ movs r0, #1 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ movs r0, #1 │ │ mov r2, r4 │ │ strd r4, r0, [r5] │ │ - bl d53c6 │ │ + bl d52ea │ │ str r4, [r5, #8] │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - bmi.n 91dea │ │ + bmi.n 91e56 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ mov r8, r0 │ │ mov r0, r2 │ │ mov r4, r2 │ │ mov r5, r1 │ │ - blx d87f0 │ │ - cbz r0, 91ea8 │ │ + blx d8810 │ │ + cbz r0, 91f14 │ │ mov r1, r5 │ │ mov r2, r4 │ │ mov r6, r0 │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #12 │ │ - blx d87f0 │ │ - cbz r0, 91e94 │ │ + blx d8810 │ │ + cbz r0, 91f00 │ │ mov r5, r0 │ │ strd r4, r6, [r0] │ │ str r4, [r0, #8] │ │ movs r0, #12 │ │ - blx d87f0 │ │ - cbz r0, 91e9e │ │ - ldr r1, [pc, #80] @ (91ecc ) │ │ + blx d8810 │ │ + cbz r0, 91f0a │ │ + ldr r1, [pc, #80] @ (91f38 ) │ │ movs r2, #20 │ │ strb r2, [r0, #8] │ │ movs r2, #3 │ │ add r1, pc │ │ str.w r0, [r8, #4] │ │ strb.w r2, [r8] │ │ strd r5, r1, [r0] │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #4 │ │ movs r1, #12 │ │ - bl 3de2a │ │ - b.n 91ea6 │ │ + bl 3e132 │ │ + b.n 91f12 │ │ movs r0, #4 │ │ movs r1, #12 │ │ - bl 3de2a │ │ + bl 3e132 │ │ udf #254 @ 0xfe │ │ movs r0, #1 │ │ mov r1, r4 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ mov r4, r0 │ │ mov r0, r5 │ │ - bl 91ed0 │ │ + bl 91f3c │ │ mov r0, r4 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ mov r4, r0 │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ - blx d6dd0 │ │ - ldr r7, [sp, #304] @ 0x130 │ │ + blx d6de0 │ │ + ldr r6, [sp, #960] @ 0x3c0 │ │ movs r4, r0 │ │ ldr r1, [r0, #0] │ │ cmp r1, #0 │ │ it eq │ │ - beq.w d870c │ │ + beq.w d871c │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ ldr r1, [r0, #4] │ │ mov r4, r0 │ │ mov r0, r1 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ ldmia.w sp!, {r4, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ ldr r1, [r0, #0] │ │ cmp r1, #0 │ │ itt ne │ │ ldrne r0, [r0, #4] │ │ - bne.w d870c │ │ + bne.w d871c │ │ bx lr │ │ - movw ip, #44457 @ 0xada9 │ │ - movw r2, #33701 @ 0x83a5 │ │ - movw r3, #20942 @ 0x51ce │ │ - movw r1, #11047 @ 0x2b27 │ │ - movt ip, #47236 @ 0xb884 │ │ - movt r2, #21285 @ 0x5325 │ │ - movt r3, #23784 @ 0x5ce8 │ │ - movt r1, #18397 @ 0x47dd │ │ + movw ip, #20905 @ 0x51a9 │ │ + movw r2, #36612 @ 0x8f04 │ │ + movw r3, #25164 @ 0x624c │ │ + movw r1, #29903 @ 0x74cf │ │ + movt ip, #55277 @ 0xd7ed │ │ + movt r2, #47791 @ 0xbaaf │ │ + movt r3, #40993 @ 0xa021 │ │ + movt r1, #61753 @ 0xf139 │ │ strd r1, r3, [r0] │ │ strd r2, ip, [r0, #8] │ │ bx lr │ │ - bmi.n 91ed6 │ │ - ldr r0, [pc, #4] @ (91f34 ) │ │ + bmi.n 91f42 │ │ + ldr r0, [pc, #4] @ (91fa0 ) │ │ movs r1, #40 @ 0x28 │ │ add r0, pc │ │ bx lr │ │ - strb r7, [r7, #0] │ │ + ldr r3, [r2, #124] @ 0x7c │ │ vrev64.32 d18, d0 │ │ bx lr │ │ bx lr │ │ - bmi.n 91eea │ │ + bmi.n 91f56 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #80 @ 0x50 │ │ mov r9, r1 │ │ mov r4, r0 │ │ ldrd r0, r1, [r0] │ │ movs r2, #1 │ │ strb r2, [r0, #0] │ │ ldrb r0, [r1, #0] │ │ cmp r0, #0 │ │ - beq.n 91ffe │ │ + beq.n 9206a │ │ ldr r0, [r4, #8] │ │ ldrb r0, [r0, #0] │ │ cmp r0, #0 │ │ - beq.n 9205a │ │ + beq.n 920c6 │ │ ldr r6, [r4, #12] │ │ ldr r0, [r6, #0] │ │ - cbz r0, 91fb8 │ │ + cbz r0, 92024 │ │ ldr r5, [r4, #16] │ │ ldrb r1, [r5, #0] │ │ - cbnz r1, 91fb2 │ │ + cbnz r1, 9201e │ │ ldr r1, [r4, #20] │ │ - ldr r2, [pc, #360] @ (920dc ) │ │ - ldr r3, [pc, #360] @ (920e0 ) │ │ + ldr r2, [pc, #360] @ (92148 ) │ │ + ldr r3, [pc, #360] @ (9214c ) │ │ add r2, pc │ │ add r3, pc │ │ mov r8, r3 │ │ - ldr r3, [pc, #356] @ (920e4 ) │ │ + ldr r3, [pc, #356] @ (92150 ) │ │ ldr.w ip, [r1] │ │ subs r1, r0, #1 │ │ it ne │ │ movne r1, #1 │ │ str r1, [sp, #72] @ 0x48 │ │ cmp r0, #1 │ │ it eq │ │ @@ -159697,98 +159612,98 @@ │ │ str r2, [sp, #68] @ 0x44 │ │ strd r3, r0, [sp, #32] │ │ add r3, sp, #28 │ │ str.w r8, [sp, #40] @ 0x28 │ │ str r6, [sp, #28] │ │ ldr.w r1, [ip, #4] │ │ ldr.w r0, [ip] │ │ - ldr r2, [pc, #316] @ (920e8 ) │ │ + ldr r2, [pc, #316] @ (92154 ) │ │ add r2, pc │ │ - bl 3ef94 │ │ + bl 3f29c │ │ movs r0, #0 │ │ strb r0, [r5, #0] │ │ str r0, [r6, #0] │ │ ldr r0, [r4, #28] │ │ ldr r1, [r4, #20] │ │ ldrd r2, r6, [r0] │ │ movs r0, #0 │ │ strd r1, r0, [sp, #20] │ │ - cbnz r2, 91fe0 │ │ + cbnz r2, 9204c │ │ str r0, [sp, #28] │ │ add r0, sp, #28 │ │ str r0, [sp, #0] │ │ mov r0, r6 │ │ movs r1, #0 │ │ movs r2, #15 │ │ movs r3, #0 │ │ - blx d62ac │ │ + blx d62bc │ │ ldr r0, [sp, #28] │ │ bic.w r6, r0, #1 │ │ add r0, sp, #28 │ │ mov r1, r9 │ │ - bl 920ec │ │ + bl 92158 │ │ ldr.w r0, [r9] │ │ cmp r0, #3 │ │ it ne │ │ cmpne r0, #2 │ │ - bne.n 92026 │ │ + bne.n 92092 │ │ movs r0, #2 │ │ movs r1, #0 │ │ str r0, [sp, #68] @ 0x44 │ │ movs r0, #0 │ │ - b.n 9208e │ │ + b.n 920fa │ │ add r0, sp, #28 │ │ mov r1, r9 │ │ - bl 920ec │ │ + bl 92158 │ │ ldr r0, [sp, #28] │ │ cmp r0, #3 │ │ - beq.n 91f5c │ │ + beq.n 91fc8 │ │ cmp r0, #2 │ │ - bne.n 92038 │ │ + bne.n 920a4 │ │ ldrd r1, r2, [sp, #60] @ 0x3c │ │ add r0, sp, #68 @ 0x44 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #68] @ 0x44 │ │ cmp r0, #0 │ │ - bne.n 91f5c │ │ + bne.n 91fc8 │ │ ldrd r6, r8, [sp, #72] @ 0x48 │ │ - b.n 92044 │ │ + b.n 920b0 │ │ ldr.w r1, [r9, #16] │ │ - cbz r1, 92082 │ │ + cbz r1, 920ee │ │ str r1, [sp, #72] @ 0x48 │ │ movs r5, #0 │ │ ldr.w r1, [r9, #20] │ │ str r1, [sp, #76] @ 0x4c │ │ - b.n 92084 │ │ + b.n 920f0 │ │ ldr r6, [sp, #44] @ 0x2c │ │ cmp r6, #0 │ │ - beq.w 91f5c │ │ + beq.w 91fc8 │ │ ldr.w r8, [sp, #48] @ 0x30 │ │ - ldr r0, [pc, #140] @ (920d4 ) │ │ + ldr r0, [pc, #140] @ (92140 ) │ │ movs r1, #26 │ │ mov r2, r6 │ │ mov r3, r8 │ │ add r0, pc │ │ - bl 921d0 │ │ + bl 9223c │ │ ldr r5, [r4, #8] │ │ - cbz r0, 92062 │ │ + cbz r0, 920ce │ │ movs r0, #1 │ │ strb r0, [r5, #0] │ │ add sp, #80 @ 0x50 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrb r0, [r5, #0] │ │ - cbz r0, 920be │ │ - ldr r0, [pc, #112] @ (920d8 ) │ │ + cbz r0, 9212a │ │ + ldr r0, [pc, #112] @ (92144 ) │ │ movs r1, #28 │ │ mov r2, r6 │ │ mov r3, r8 │ │ add r0, pc │ │ - bl 921d0 │ │ - cbz r0, 920b6 │ │ + bl 9223c │ │ + cbz r0, 92122 │ │ movs r0, #0 │ │ strb r0, [r5, #0] │ │ add sp, #80 @ 0x50 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r5, #2 │ │ ldrd r3, r1, [r9, #4] │ │ @@ -159796,81 +159711,81 @@ │ │ str r5, [sp, #68] @ 0x44 │ │ strd r0, r3, [sp] │ │ add r0, sp, #20 │ │ strd r1, r2, [sp, #8] │ │ add r2, sp, #28 │ │ add r3, sp, #68 @ 0x44 │ │ mov r1, r6 │ │ - bl 7a52c │ │ + bl 7a594 │ │ ldr r1, [r4, #24] │ │ ldr r2, [sp, #20] │ │ strb r0, [r1, #0] │ │ ldr r0, [r2, #12] │ │ adds r0, #1 │ │ str r0, [r2, #12] │ │ add sp, #80 @ 0x50 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrb r0, [r5, #0] │ │ cmp r0, #0 │ │ - bne.w 91f5c │ │ + bne.w 91fc8 │ │ ldr r0, [r4, #12] │ │ ldr r1, [r0, #0] │ │ adds r1, #1 │ │ str r1, [r0, #0] │ │ - b.n 91f5c │ │ + b.n 91fc8 │ │ ldr r1, [sp, #20] │ │ ldr r2, [r1, #12] │ │ adds r2, #1 │ │ str r2, [r1, #12] │ │ - blx d6dd0 │ │ - ldr r4, [r0, #76] @ 0x4c │ │ - @ instruction: 0xfff86cbc │ │ - @ instruction: 0xfff86dd0 │ │ - vrsra.u32 d21, d17, #8 │ │ - @ instruction: 0xfffee8df │ │ - vrintz.f32 d27, d13 │ │ + blx d6de0 │ │ + ldr r0, [r3, #68] @ 0x44 │ │ + vcvt.f16.u16 q11, q0, #8 │ │ + vqrdmulh.s q11, q4, d20[0] │ │ + vsubw.u , q4, d29 │ │ + @ instruction: 0xfffeeb7b │ │ + vrintz.f32 d27, d30 │ │ vsli.64 , q8, #55 @ 0x37 │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #64 @ 0x40 │ │ mov r4, r0 │ │ ldr r0, [r1, #0] │ │ cmp r0, #3 │ │ - bne.n 92116 │ │ + bne.n 92182 │ │ ldrd r9, sl, [r1, #4] │ │ add r0, sp, #32 │ │ mov r2, sl │ │ mov r1, r9 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #32] │ │ cmp r0, #1 │ │ - bne.n 9213a │ │ + bne.n 921a6 │ │ movs r0, #2 │ │ - b.n 92160 │ │ + b.n 921cc │ │ ldr.w sl, [r1, #28] │ │ cmp.w sl, #0 │ │ - beq.n 9217c │ │ + beq.n 921e8 │ │ ldr.w r9, [r1, #32] │ │ add r0, sp, #32 │ │ mov r1, sl │ │ mov r2, r9 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr r0, [sp, #32] │ │ cmp r0, #1 │ │ - bne.n 92188 │ │ + bne.n 921f4 │ │ mov.w lr, #2 │ │ - b.n 921b2 │ │ + b.n 9221e │ │ add.w r8, sp, #32 │ │ ldrd r1, r2, [sp, #36] @ 0x24 │ │ mov r0, r8 │ │ - bl 70eb8 │ │ + bl 70f6c │ │ ldr r0, [sp, #32] │ │ cmp r0, #2 │ │ - beq.n 92160 │ │ + beq.n 921cc │ │ add.w ip, r8, #4 │ │ mov r2, sp │ │ ldmia.w ip!, {r3, r5, r6} │ │ stmia r2!, {r3, r5, r6} │ │ ldmia.w ip, {r1, r3, r5, r6} │ │ stmia r2!, {r1, r3, r5, r6} │ │ str r0, [r4, #0] │ │ @@ -159888,18 +159803,18 @@ │ │ str r0, [r4, #0] │ │ add sp, #64 @ 0x40 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ add.w r8, sp, #32 │ │ ldrd r1, r2, [sp, #36] @ 0x24 │ │ mov r0, r8 │ │ - bl 70eb8 │ │ + bl 70f6c │ │ ldr.w lr, [sp, #32] │ │ cmp.w lr, #2 │ │ - beq.n 921b2 │ │ + beq.n 9221e │ │ add.w ip, r8, #4 │ │ mov r2, sp │ │ ldmia.w ip!, {r1, r3, r6} │ │ stmia r2!, {r1, r3, r6} │ │ ldmia.w ip, {r0, r1, r3, r6} │ │ stmia r2!, {r0, r1, r3, r6} │ │ str.w lr, [r4] │ │ @@ -159915,36 +159830,36 @@ │ │ pop {r4, r5, r6, r7, pc} │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #100 @ 0x64 │ │ mov ip, r0 │ │ cmp r1, r3 │ │ - bcs.w 922ee │ │ + bcs.w 9235a │ │ add r0, sp, #32 │ │ str r1, [sp, #0] │ │ mov r1, r2 │ │ mov r2, r3 │ │ mov r3, ip │ │ - bl 41018 │ │ + bl 41320 │ │ ldr r0, [sp, #32] │ │ cmp r0, #1 │ │ - bne.w 9230e │ │ + bne.w 9237a │ │ add.w ip, sp, #84 @ 0x54 │ │ ldr.w lr, [sp, #68] @ 0x44 │ │ ldr r0, [sp, #80] @ 0x50 │ │ ldmia.w ip, {r1, r2, ip} │ │ sub.w r3, ip, #1 │ │ str r0, [sp, #28] │ │ adds.w r0, lr, #1 │ │ - beq.w 92330 │ │ + beq.w 9239c │ │ ldr r6, [sp, #60] @ 0x3c │ │ adds r0, r6, r3 │ │ cmp r0, r1 │ │ - bcs.w 9235a │ │ + bcs.w 923c6 │ │ str r3, [sp, #24] │ │ ldr r3, [sp, #40] @ 0x28 │ │ ldr.w sl, [sp, #48] @ 0x30 │ │ str r3, [sp, #20] │ │ ldr r3, [sp, #44] @ 0x2c │ │ str r3, [sp, #16] │ │ ldr r3, [sp, #56] @ 0x38 │ │ @@ -159961,268 +159876,268 @@ │ │ lsrs r3, r0 │ │ subs r0, #32 │ │ lsl.w r4, r5, r4 │ │ orr.w r3, r3, r4 │ │ it pl │ │ lsrpl.w r3, r5, r0 │ │ lsls r0, r3, #31 │ │ - beq.n 922a6 │ │ + beq.n 92312 │ │ add.w fp, r8, r6 │ │ cmp lr, sl │ │ it hi │ │ movhi sl, lr │ │ mov r3, ip │ │ mov r0, sl │ │ mov r5, r8 │ │ cmp sl, ip │ │ it hi │ │ movhi r3, sl │ │ cmp r3, r0 │ │ - beq.n 922bc │ │ + beq.n 92328 │ │ mov r8, r0 │ │ add r0, r6 │ │ cmp r0, r1 │ │ - bcs.w 92492 │ │ + bcs.w 924fe │ │ ldrb.w r4, [fp, r8] │ │ add.w r0, r8, #1 │ │ ldrb.w r9, [r2, r8] │ │ cmp r9, r4 │ │ - beq.n 9227a │ │ + beq.n 922e6 │ │ ldr.w sl, [sp, #12] │ │ sub.w r0, r6, sl │ │ add r0, r8 │ │ adds r6, r0, #1 │ │ - b.n 922a8 │ │ + b.n 92314 │ │ add r6, ip │ │ ldr.w r8, [sp, #24] │ │ mov.w lr, #0 │ │ add.w r0, r6, r8 │ │ movs r3, #0 │ │ cmp r0, r1 │ │ - bcc.n 9223a │ │ - b.n 92302 │ │ + bcc.n 922a6 │ │ + b.n 9236e │ │ ldr.w sl, [sp, #12] │ │ ldr.w r8, [sp, #24] │ │ mov r0, sl │ │ cmp lr, r0 │ │ - bcs.w 92484 │ │ + bcs.w 924f0 │ │ subs r0, #1 │ │ cmp r0, ip │ │ - bcs.w 924a4 │ │ + bcs.w 92510 │ │ adds r3, r0, r6 │ │ cmp r3, r1 │ │ - bcs.w 924ae │ │ + bcs.w 9251a │ │ ldrb r3, [r5, r3] │ │ ldrb r4, [r2, r0] │ │ cmp r4, r3 │ │ - beq.n 922c6 │ │ + beq.n 92332 │ │ ldr r0, [sp, #8] │ │ ldr.w lr, [sp, #4] │ │ add r6, r0 │ │ - b.n 922b0 │ │ - bne.n 9235a │ │ + b.n 9231c │ │ + bne.n 923c6 │ │ mov r3, r1 │ │ mov r1, r2 │ │ mov r0, ip │ │ mov r2, r3 │ │ - blx d8860 │ │ + blx d8870 │ │ clz r0, r0 │ │ lsrs r3, r0, #5 │ │ and.w r0, r3, #1 │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrb.w r0, [sp, #46] @ 0x2e │ │ - cbnz r0, 9235a │ │ + cbnz r0, 923c6 │ │ ldr r2, [sp, #36] @ 0x24 │ │ ldrb.w r3, [sp, #44] @ 0x2c │ │ ldrd r0, r1, [sp, #80] @ 0x50 │ │ cmp r2, #0 │ │ - beq.n 923e8 │ │ + beq.n 92454 │ │ cmp r2, r1 │ │ - bcs.n 923e6 │ │ + bcs.n 92452 │ │ ldrsb r6, [r0, r2] │ │ cmn.w r6, #64 @ 0x40 │ │ - bge.n 923e8 │ │ - b.n 92466 │ │ + bge.n 92454 │ │ + b.n 924d2 │ │ ldr r4, [sp, #60] @ 0x3c │ │ adds r0, r4, r3 │ │ cmp r0, r1 │ │ - bcs.n 9235a │ │ + bcs.n 923c6 │ │ str r3, [sp, #24] │ │ mov r5, ip │ │ ldr r3, [sp, #40] @ 0x28 │ │ ldr r6, [sp, #56] @ 0x38 │ │ str r3, [sp, #16] │ │ ldrd r9, r3, [sp, #44] @ 0x2c │ │ cmp r3, ip │ │ str r6, [sp, #12] │ │ it hi │ │ movhi r5, r3 │ │ ldr.w lr, [sp, #28] │ │ sub.w sl, r3, #1 │ │ str r3, [sp, #20] │ │ - b.n 92374 │ │ + b.n 923e0 │ │ movs r3, #0 │ │ and.w r0, r3, #1 │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ add r4, ip │ │ ldr r0, [sp, #24] │ │ movs r3, #0 │ │ add r0, r4 │ │ cmp r0, r1 │ │ - bcs.n 92302 │ │ + bcs.n 9236e │ │ ldrb.w r0, [lr, r0] │ │ ldr r3, [sp, #16] │ │ and.w r0, r0, #63 @ 0x3f │ │ rsb r6, r0, #32 │ │ lsrs r3, r0 │ │ subs r0, #32 │ │ lsl.w r6, r9, r6 │ │ orr.w r3, r3, r6 │ │ it pl │ │ lsrpl.w r3, r9, r0 │ │ lsls r0, r3, #31 │ │ - beq.n 92368 │ │ + beq.n 923d4 │ │ ldr r6, [sp, #20] │ │ add.w r0, lr, r4 │ │ cmp r5, r6 │ │ - beq.n 923c4 │ │ + beq.n 92430 │ │ mov r3, r6 │ │ add r6, r4 │ │ cmp r6, r1 │ │ - bcs.w 924b8 │ │ + bcs.w 92524 │ │ ldrb.w r8, [r0, r3] │ │ adds r6, r3, #1 │ │ ldrb.w fp, [r2, r3] │ │ cmp fp, r8 │ │ - beq.n 9239e │ │ + beq.n 9240a │ │ ldr r0, [sp, #20] │ │ subs r0, r4, r0 │ │ add r0, r3 │ │ adds r4, r0, #1 │ │ - b.n 9236a │ │ + b.n 923d6 │ │ ldr r0, [sp, #20] │ │ cmp r0, #0 │ │ - beq.n 92484 │ │ + beq.n 924f0 │ │ subs r0, #1 │ │ cmp sl, ip │ │ - bcs.n 924a4 │ │ + bcs.n 92510 │ │ adds r3, r0, r4 │ │ cmp r3, r1 │ │ - bcs.n 924ae │ │ + bcs.n 9251a │ │ ldr r6, [sp, #28] │ │ ldrb r3, [r6, r3] │ │ ldrb r6, [r2, r0] │ │ cmp r6, r3 │ │ - beq.n 923c6 │ │ + beq.n 92432 │ │ ldr r0, [sp, #12] │ │ add r4, r0 │ │ - b.n 9236a │ │ - bne.n 92466 │ │ + b.n 923d6 │ │ + bne.n 924d2 │ │ cmp r2, r1 │ │ - beq.w 92302 │ │ + beq.w 9236e │ │ adds r5, r0, r2 │ │ ldrsb.w r4, [r5] │ │ cmp.w r4, #4294967295 @ 0xffffffff │ │ uxtb r6, r4 │ │ - bgt.n 92436 │ │ + bgt.n 924a2 │ │ ldrb r4, [r5, #1] │ │ and.w ip, r6, #31 │ │ cmp r6, #224 @ 0xe0 │ │ and.w lr, r4, #63 @ 0x3f │ │ - bcc.n 9242c │ │ + bcc.n 92498 │ │ ldrb r4, [r5, #2] │ │ cmp r6, #240 @ 0xf0 │ │ and.w r4, r4, #63 @ 0x3f │ │ orr.w r4, r4, lr, lsl #6 │ │ - bcc.n 92432 │ │ + bcc.n 9249e │ │ ldrb r6, [r5, #3] │ │ and.w r5, ip, #7 │ │ and.w r6, r6, #63 @ 0x3f │ │ orr.w r6, r6, r4, lsl #6 │ │ orr.w r6, r6, r5, lsl #18 │ │ - b.n 92436 │ │ + b.n 924a2 │ │ orr.w r6, lr, ip, lsl #6 │ │ - b.n 92436 │ │ + b.n 924a2 │ │ orr.w r6, r4, ip, lsl #12 │ │ lsls r3, r3, #31 │ │ - bne.n 92484 │ │ + bne.n 924f0 │ │ cmp r6, #128 @ 0x80 │ │ - bcs.n 92442 │ │ + bcs.n 924ae │ │ movs r3, #1 │ │ - b.n 92456 │ │ + b.n 924c2 │ │ cmp.w r6, #2048 @ 0x800 │ │ - bcs.n 9244c │ │ + bcs.n 924b8 │ │ movs r3, #2 │ │ - b.n 92456 │ │ + b.n 924c2 │ │ movs r3, #4 │ │ cmp.w r6, #65536 @ 0x10000 │ │ it cc │ │ movcc r3, #3 │ │ adds r2, r2, r3 │ │ - beq.n 92474 │ │ + beq.n 924e0 │ │ cmp r2, r1 │ │ - bcs.n 92472 │ │ + bcs.n 924de │ │ ldrsb r3, [r0, r2] │ │ cmn.w r3, #64 @ 0x40 │ │ - bge.n 92474 │ │ - ldr r3, [pc, #100] @ (924cc ) │ │ + bge.n 924e0 │ │ + ldr r3, [pc, #100] @ (92538 ) │ │ add r3, pc │ │ str r3, [sp, #0] │ │ mov r3, r1 │ │ - bl 3fd1c │ │ - bne.n 92466 │ │ + bl 40024 │ │ + bne.n 924d2 │ │ cmp r2, r1 │ │ - beq.n 92484 │ │ + beq.n 924f0 │ │ ldrsb r0, [r0, r2] │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 92484 │ │ + bgt.n 924f0 │ │ uxtb r0, r0 │ │ cmp r0, #224 @ 0xe0 │ │ movs r3, #1 │ │ and.w r0, r3, #1 │ │ add sp, #100 @ 0x64 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r2, [pc, #60] @ (924d0 ) │ │ + ldr r2, [pc, #60] @ (9253c ) │ │ add.w r0, r6, sl │ │ add r2, pc │ │ cmp r1, r0 │ │ it hi │ │ movhi r0, r1 │ │ - bl 3fa74 │ │ - ldr r2, [pc, #48] @ (924d8 ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #48] @ (92544 ) │ │ mov r1, ip │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r2, [pc, #44] @ (924dc ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #44] @ (92548 ) │ │ mov r0, r3 │ │ add r2, pc │ │ - bl 3fa74 │ │ - ldr r2, [pc, #24] @ (924d4 ) │ │ + bl 3fd7c │ │ + ldr r2, [pc, #24] @ (92540 ) │ │ ldr r0, [sp, #20] │ │ add r2, pc │ │ add r0, r4 │ │ cmp r1, r0 │ │ it hi │ │ movhi r0, r1 │ │ - bl 3fa74 │ │ + bl 3fd7c │ │ nop │ │ - ldr r1, [sp, #960] @ 0x3c0 │ │ + ldr r1, [sp, #592] @ 0x250 │ │ movs r4, r0 │ │ - ldr r0, [sp, #528] @ 0x210 │ │ + ldr r0, [sp, #160] @ 0xa0 │ │ movs r4, r0 │ │ - ldr r0, [sp, #384] @ 0x180 │ │ + ldr r0, [sp, #16] │ │ movs r4, r0 │ │ - ldr r0, [sp, #336] @ 0x150 │ │ + str r7, [sp, #992] @ 0x3e0 │ │ movs r4, r0 │ │ - ldr r0, [sp, #360] @ 0x168 │ │ + str r7, [sp, #1016] @ 0x3f8 │ │ movs r4, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #16 │ │ mov r4, r0 │ │ mov r5, r1 │ │ @@ -160233,85 +160148,85 @@ │ │ ldrb r2, [r4, #12] │ │ strd r5, r0, [sp] │ │ it ne │ │ movne r3, r4 │ │ mov r0, sp │ │ adds r1, r0, #4 │ │ mov r0, r5 │ │ - bl 9255c │ │ + bl 925c8 │ │ lsls r1, r6, #1 │ │ - bne.n 9251c │ │ + bne.n 92588 │ │ add sp, #16 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r1, [r4, #4] │ │ mov r4, r0 │ │ mov r0, r1 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ add sp, #16 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ mov r5, r0 │ │ ldr r0, [r4, #0] │ │ lsls r0, r0, #1 │ │ - beq.n 9253e │ │ + beq.n 925aa │ │ ldr r0, [r4, #4] │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ ldr r3, [r0, #0] │ │ mov ip, r2 │ │ ldrb r2, [r0, #12] │ │ subs.w r3, r3, #2147483648 @ 0x80000000 │ │ it ne │ │ movne r3, r0 │ │ mov r0, r1 │ │ mov r1, ip │ │ - b.w 9255c │ │ - bmi.n 92506 │ │ + b.w 925c8 │ │ + bmi.n 92572 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #260 @ 0x104 │ │ mov r9, r0 │ │ ldr r0, [r1, #0] │ │ - cbz r0, 92576 │ │ - ldr r1, [pc, #572] @ (927ac ) │ │ + cbz r0, 925e2 │ │ + ldr r1, [pc, #572] @ (92818 ) │ │ movs r6, #9 │ │ add r1, pc │ │ - cbz r2, 92586 │ │ - b.n 92752 │ │ + cbz r2, 925f2 │ │ + b.n 927be │ │ ldrd r1, r6, [r1, #4] │ │ - cbz r2, 92584 │ │ + cbz r2, 925f0 │ │ cmp r6, #0 │ │ - bne.w 92752 │ │ - b.n 925ac │ │ - cbz r6, 925ac │ │ + bne.w 927be │ │ + b.n 92618 │ │ + cbz r6, 92618 │ │ cmp r3, #0 │ │ - beq.w 92752 │ │ + beq.w 927be │ │ ldrb r0, [r1, #0] │ │ cmp r0, #47 @ 0x2f │ │ - bne.w 92752 │ │ + bne.w 927be │ │ str r1, [sp, #8] │ │ ldrd r0, r1, [r3, #4] │ │ str.w r9, [sp, #4] │ │ - cbz r1, 925c0 │ │ + cbz r1, 9262c │ │ ldrb r2, [r0, #0] │ │ subs r2, #47 @ 0x2f │ │ clz r2, r2 │ │ lsrs r2, r2, #5 │ │ - b.n 925c2 │ │ + b.n 9262e │ │ mov r0, r9 │ │ movs r1, #1 │ │ movs r2, #0 │ │ add sp, #260 @ 0x104 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w 3ffd4 │ │ + b.w 402dc │ │ movs r2, #0 │ │ strd r0, r1, [sp, #80] @ 0x50 │ │ movw r0, #513 @ 0x201 │ │ strh.w r0, [sp, #108] @ 0x6c │ │ add r0, sp, #144 @ 0x90 │ │ adds r0, #28 │ │ str r0, [sp, #28] │ │ @@ -160325,15 +160240,15 @@ │ │ mov.w r8, #1 │ │ str r6, [sp, #0] │ │ ldr r0, [sp, #8] │ │ strb.w r2, [sp, #110] @ 0x6e │ │ strb.w r9, [sp, #88] @ 0x58 │ │ str r0, [sp, #20] │ │ cmp.w r9, #6 │ │ - beq.n 9260e │ │ + beq.n 9267a │ │ add r0, sp, #56 @ 0x38 │ │ add r1, sp, #144 @ 0x90 │ │ ldmia r0!, {r2, r3, r4, r5} │ │ stmia r1!, {r2, r3, r4, r5} │ │ ldrh r2, [r0, #0] │ │ ldrb r0, [r0, #2] │ │ strh r2, [r1, #0] │ │ @@ -160342,328 +160257,328 @@ │ │ add r4, sp, #144 @ 0x90 │ │ str r0, [sp, #112] @ 0x70 │ │ movs r2, #19 │ │ ldr r0, [sp, #16] │ │ mov r1, r4 │ │ strb.w r9, [sp, #120] @ 0x78 │ │ str r6, [sp, #116] @ 0x74 │ │ - bl d53c6 │ │ + bl d52ea │ │ add r5, sp, #200 @ 0xc8 │ │ ldr r0, [sp, #24] │ │ add r1, sp, #112 @ 0x70 │ │ strb.w r0, [sp, #141] @ 0x8d │ │ mov r0, r5 │ │ strb.w fp, [sp, #142] @ 0x8e │ │ strb.w r8, [sp, #140] @ 0x8c │ │ - bl 927c0 │ │ + bl 9282c │ │ add.w sl, sp, #232 @ 0xe8 │ │ add r1, sp, #80 @ 0x50 │ │ mov r0, sl │ │ - bl 927c0 │ │ + bl 9282c │ │ mov r0, r5 │ │ mov r1, r4 │ │ ldmia r0!, {r2, r3, r5} │ │ stmia r1!, {r2, r3, r5} │ │ ldmia.w r0, {r2, r3, r4, r5} │ │ stmia r1!, {r2, r3, r4, r5} │ │ ldr r0, [sp, #28] │ │ ldmia.w sl!, {r2, r3, r5} │ │ stmia r0!, {r2, r3, r5} │ │ ldmia.w sl, {r2, r3, r4, r5} │ │ stmia r0!, {r2, r3, r4, r5} │ │ ldrb.w r0, [sp, #232] @ 0xe8 │ │ ldrb.w r1, [sp, #200] @ 0xc8 │ │ cmp r1, #10 │ │ - beq.n 926b0 │ │ + beq.n 9271c │ │ cmp r0, #10 │ │ - beq.n 926b4 │ │ + beq.n 92720 │ │ ldr r1, [sp, #28] │ │ add r0, sp, #144 @ 0x90 │ │ - bl 8e0f8 │ │ + bl 8e164 │ │ cmp r0, #0 │ │ - beq.n 9274a │ │ + beq.n 927b6 │ │ ldr r0, [sp, #112] @ 0x70 │ │ movs r2, #19 │ │ str r0, [sp, #20] │ │ add r0, sp, #56 @ 0x38 │ │ ldr r1, [sp, #16] │ │ ldr r6, [sp, #116] @ 0x74 │ │ ldrb.w r9, [sp, #120] @ 0x78 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldrb.w r0, [sp, #141] @ 0x8d │ │ str r0, [sp, #24] │ │ ldrb.w r0, [sp, #143] @ 0x8f │ │ ldrb.w r8, [sp, #140] @ 0x8c │ │ ldrb.w fp, [sp, #142] @ 0x8e │ │ str r0, [sp, #12] │ │ cmp.w r9, #6 │ │ - bne.n 925fe │ │ - b.n 9260e │ │ + bne.n 9266a │ │ + b.n 9267a │ │ cmp r0, #10 │ │ - bne.n 9274a │ │ + bne.n 927b6 │ │ add r4, sp, #56 @ 0x38 │ │ add r0, sp, #32 │ │ cmp.w fp, #2 │ │ ldmia r4!, {r1, r2, r3, r5} │ │ stmia r0!, {r1, r2, r3, r5} │ │ ldrh r1, [r4, #0] │ │ ldrb r2, [r4, #2] │ │ strh r1, [r0, #0] │ │ strb r2, [r0, #2] │ │ - beq.n 9274a │ │ + beq.n 927b6 │ │ add r4, sp, #144 @ 0x90 │ │ add r1, sp, #32 │ │ add.w r0, r4, #9 │ │ movs r2, #19 │ │ - bl d53c6 │ │ + bl d52ea │ │ ldr r0, [sp, #12] │ │ strb.w r0, [sp, #175] @ 0xaf │ │ ldr r0, [sp, #24] │ │ strb.w r0, [sp, #173] @ 0xad │ │ ldr r0, [sp, #20] │ │ str r0, [sp, #144] @ 0x90 │ │ mov r0, r4 │ │ strb.w fp, [sp, #174] @ 0xae │ │ strb.w r8, [sp, #172] @ 0xac │ │ strb.w r9, [sp, #152] @ 0x98 │ │ str r6, [sp, #148] @ 0x94 │ │ - bl 8ce24 │ │ - cbz r0, 9274a │ │ + bl 8ce90 │ │ + cbz r0, 927b6 │ │ mov r2, r0 │ │ mov r3, r1 │ │ add r0, sp, #144 @ 0x90 │ │ mov r1, r2 │ │ mov r2, r3 │ │ - bl 402e0 │ │ + bl 405e8 │ │ ldr.w r9, [sp, #4] │ │ ldr r0, [sp, #144] @ 0x90 │ │ cmp r0, #1 │ │ - beq.n 9274e │ │ + beq.n 927ba │ │ ldrd r0, r1, [sp, #148] @ 0x94 │ │ add r6, sp, #112 @ 0x70 │ │ - ldr r3, [pc, #144] @ (927b0 ) │ │ - ldr r4, [pc, #148] @ (927b4 ) │ │ - ldr r5, [pc, #148] @ (927b8 ) │ │ + ldr r3, [pc, #144] @ (9281c ) │ │ + ldr r4, [pc, #148] @ (92820 ) │ │ + ldr r5, [pc, #148] @ (92824 ) │ │ add r3, pc │ │ strd r0, r1, [sp, #112] @ 0x70 │ │ add r4, pc │ │ ldrd r0, r1, [r9] │ │ add r5, pc │ │ - ldr r2, [pc, #136] @ (927bc ) │ │ + ldr r2, [pc, #136] @ (92828 ) │ │ strd r4, r3, [sp, #144] @ 0x90 │ │ add r3, sp, #144 @ 0x90 │ │ add r2, pc │ │ str r5, [sp, #156] @ 0x9c │ │ str r6, [sp, #152] @ 0x98 │ │ - bl 3ef94 │ │ + bl 3f29c │ │ add sp, #260 @ 0x104 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr.w r9, [sp, #4] │ │ ldr r1, [sp, #8] │ │ ldr r6, [sp, #0] │ │ ldrd r4, r5, [r9] │ │ add.w r8, sp, #144 @ 0x90 │ │ strd r1, r6, [sp, #112] @ 0x70 │ │ add r6, sp, #112 @ 0x70 │ │ mov r0, r8 │ │ mov r1, r6 │ │ - bl 41724 │ │ + bl 41a2c │ │ ldr r1, [sp, #144] @ 0x90 │ │ - cbz r1, 92792 │ │ + cbz r1, 927fe │ │ ldr r2, [sp, #148] @ 0x94 │ │ ldr r0, [sp, #156] @ 0x9c │ │ - cbz r0, 9279c │ │ + cbz r0, 92808 │ │ ldr r3, [r5, #12] │ │ mov r0, r4 │ │ blx r3 │ │ - cbnz r0, 92788 │ │ + cbnz r0, 927f4 │ │ ldr r2, [r5, #16] │ │ mov r0, r4 │ │ movw r1, #65533 @ 0xfffd │ │ blx r2 │ │ cmp r0, #0 │ │ - beq.n 92760 │ │ + beq.n 927cc │ │ movs r0, #1 │ │ add sp, #260 @ 0x104 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #0 │ │ add sp, #260 @ 0x104 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, r9 │ │ - bl 3ffd4 │ │ + bl 402dc │ │ add sp, #260 @ 0x104 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - str r0, [r7, #8] │ │ - vshll.u32 , d3, #24 │ │ - vtbl.8 d19, {d10-d13}, d4 │ │ - @ instruction: 0xfff84b7b │ │ - @ instruction: 0xfffe5df0 │ │ + str r4, [r1, #4] │ │ + vmull.u , d24, d31 │ │ + @ instruction: 0xfffa3a98 │ │ + @ instruction: 0xfff84b77 │ │ + @ instruction: 0xfffe5dd6 │ │ vsli.64 , q8, #55 @ 0x37 │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ ldrb r2, [r1, #28] │ │ cmp r2, #3 │ │ - bne.n 927dc │ │ + bne.n 92848 │ │ mov.w lr, #10 │ │ strb.w lr, [r0] │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrb.w r8, [r1, #29] │ │ cmp.w r8, #3 │ │ - bne.n 927f4 │ │ + bne.n 92860 │ │ mov.w lr, #10 │ │ strb.w lr, [r0] │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrb r3, [r1, #30] │ │ ldrb.w lr, [r0] │ │ ldrd r6, ip, [r1] │ │ lsls r3, r3, #31 │ │ - beq.n 92894 │ │ + beq.n 92900 │ │ ldrd r3, r4, [r0, #4] │ │ cmp r2, r8 │ │ - bhi.w 929be │ │ + bhi.w 92a2a │ │ mov r5, r6 │ │ cmp r2, #1 │ │ - beq.w 9293a │ │ + beq.w 929a6 │ │ cmp r2, #2 │ │ - bne.w 92a08 │ │ + bne.w 92a74 │ │ cmp.w ip, #0 │ │ - beq.w 929d0 │ │ + beq.w 92a3c │ │ movs r4, #0 │ │ ldrb r2, [r5, r4] │ │ cmp r2, #47 @ 0x2f │ │ - beq.n 92838 │ │ + beq.n 928a4 │ │ adds r4, #1 │ │ cmp ip, r4 │ │ - bne.n 92824 │ │ + bne.n 92890 │ │ movs r2, #0 │ │ mov r4, ip │ │ - cbnz r4, 9283c │ │ - b.n 9285c │ │ + cbnz r4, 928a8 │ │ + b.n 928c8 │ │ movs r2, #1 │ │ - cbz r4, 9285c │ │ + cbz r4, 928c8 │ │ cmp r4, #1 │ │ - beq.n 92856 │ │ + beq.n 928c2 │ │ cmp r4, #2 │ │ - bne.n 92864 │ │ + bne.n 928d0 │ │ ldrb r3, [r5, #0] │ │ cmp r3, #46 @ 0x2e │ │ itt eq │ │ ldrbeq r3, [r5, #1] │ │ cmpeq r3, #46 @ 0x2e │ │ - bne.n 92864 │ │ + bne.n 928d0 │ │ mov.w lr, #8 │ │ - b.n 92868 │ │ + b.n 928d4 │ │ ldrb r3, [r5, #0] │ │ cmp r3, #46 @ 0x2e │ │ - bne.n 92864 │ │ + bne.n 928d0 │ │ mov.w lr, #10 │ │ movs r3, #1 │ │ - b.n 9286a │ │ + b.n 928d6 │ │ mov.w lr, #9 │ │ movs r3, #0 │ │ add r2, r4 │ │ cmp ip, r2 │ │ - bcc.w 92a1c │ │ + bcc.w 92a88 │ │ sub.w ip, ip, r2 │ │ adds r6, r5, r2 │ │ cmp r3, #0 │ │ mov.w r2, #2 │ │ mov r3, r5 │ │ strd r6, ip, [r1] │ │ - bne.n 92806 │ │ + bne.n 92872 │ │ strd r5, r4, [r0, #4] │ │ strb.w lr, [r0] │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr.w sl, [r0, #4] │ │ ldr r4, [r0, #8] │ │ mov r5, r6 │ │ mov r6, ip │ │ cmp r2, r8 │ │ - bhi.n 92960 │ │ + bhi.n 929cc │ │ cmp r2, #1 │ │ - bne.n 928ce │ │ + bne.n 9293a │ │ movs r2, #2 │ │ cmp r6, #0 │ │ strb r2, [r1, #28] │ │ - beq.n 9289e │ │ + beq.n 9290a │ │ cmp r6, #1 │ │ - beq.n 928c0 │ │ + beq.n 9292c │ │ ldrb r3, [r5, #0] │ │ cmp r3, #46 @ 0x2e │ │ itt eq │ │ ldrbeq r3, [r5, #1] │ │ cmpeq r3, #47 @ 0x2f │ │ - bne.n 9289e │ │ - b.n 9299a │ │ + bne.n 9290a │ │ + b.n 92a06 │ │ ldrb.w r9, [r5] │ │ movs r6, #1 │ │ cmp.w r9, #46 @ 0x2e │ │ - bne.n 9289e │ │ - b.n 9299a │ │ + bne.n 9290a │ │ + b.n 92a06 │ │ cmp r2, #2 │ │ - bne.w 929d6 │ │ + bne.w 92a42 │ │ cmp r6, #0 │ │ - beq.n 92974 │ │ + beq.n 929e0 │ │ movs r4, #0 │ │ ldrb r2, [r5, r4] │ │ cmp r2, #47 @ 0x2f │ │ - beq.n 928ee │ │ + beq.n 9295a │ │ adds r4, #1 │ │ cmp r6, r4 │ │ - bne.n 928da │ │ + bne.n 92946 │ │ movs r2, #0 │ │ mov r4, r6 │ │ - cbnz r4, 928f2 │ │ - b.n 92900 │ │ + cbnz r4, 9295e │ │ + b.n 9296c │ │ movs r2, #1 │ │ - cbz r4, 92900 │ │ + cbz r4, 9296c │ │ cmp r4, #2 │ │ - beq.n 92908 │ │ + beq.n 92974 │ │ cmp r4, #1 │ │ itt eq │ │ ldrbeq r3, [r5, #0] │ │ cmpeq r3, #46 @ 0x2e │ │ - bne.n 92914 │ │ + bne.n 92980 │ │ mov.w lr, #10 │ │ movs r3, #1 │ │ - b.n 9291a │ │ + b.n 92986 │ │ ldrb r3, [r5, #0] │ │ cmp r3, #46 @ 0x2e │ │ itt eq │ │ ldrbeq r3, [r5, #1] │ │ cmpeq r3, #46 @ 0x2e │ │ - beq.n 92934 │ │ + beq.n 929a0 │ │ mov.w lr, #9 │ │ movs r3, #0 │ │ add r2, r4 │ │ cmp r6, r2 │ │ - bcc.n 929f0 │ │ + bcc.n 92a5c │ │ sub.w ip, r6, r2 │ │ adds r6, r5, r2 │ │ movs r2, #2 │ │ mov sl, r5 │ │ cmp r3, #0 │ │ strd r6, ip, [r1] │ │ - bne.n 9289a │ │ - b.n 9298c │ │ + bne.n 92906 │ │ + b.n 929f8 │ │ mov.w lr, #8 │ │ - b.n 92918 │ │ + b.n 92984 │ │ movs r2, #2 │ │ cmp.w ip, #0 │ │ strd r3, r4, [r0, #4] │ │ strb r2, [r1, #28] │ │ - beq.n 92a0e │ │ + beq.n 92a7a │ │ sub.w r2, ip, #1 │ │ adds r3, r5, #1 │ │ mov.w lr, #6 │ │ strd r3, r2, [r1] │ │ strb.w lr, [r0] │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ @@ -160685,110 +160600,110 @@ │ │ str r5, [r0, #4] │ │ strb.w lr, [r0] │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ cmp.w ip, #0 │ │ str r4, [r0, #8] │ │ str.w sl, [r0, #4] │ │ - beq.n 92a22 │ │ + beq.n 92a8e │ │ sub.w r2, ip, #1 │ │ adds r3, r5, #1 │ │ mov.w lr, #7 │ │ strd r3, r2, [r1] │ │ strb.w lr, [r0] │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ strd r3, r4, [r0, #4] │ │ mov.w lr, #10 │ │ strb.w lr, [r0] │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ strd r3, r4, [r0, #4] │ │ - b.n 9297a │ │ + b.n 929e6 │ │ str r4, [r0, #8] │ │ str.w sl, [r0, #4] │ │ - ldr r1, [pc, #80] @ (92a30 ) │ │ - ldr r2, [pc, #84] @ (92a34 ) │ │ + ldr r1, [pc, #80] @ (92a9c ) │ │ + ldr r2, [pc, #84] @ (92aa0 ) │ │ add r1, pc │ │ strb.w lr, [r0] │ │ add r2, pc │ │ mov r0, r1 │ │ movs r1, #40 @ 0x28 │ │ - bl 3fa4c │ │ + bl 3fd54 │ │ mov ip, r6 │ │ str r4, [r0, #8] │ │ str r5, [r0, #4] │ │ - ldr r3, [pc, #72] @ (92a40 ) │ │ + ldr r3, [pc, #72] @ (92aac ) │ │ mov r1, ip │ │ strb.w lr, [r0] │ │ mov r0, r2 │ │ add r3, pc │ │ mov r2, ip │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ strd r3, r4, [r0, #4] │ │ - b.n 929dc │ │ - ldr r3, [pc, #44] @ (92a3c ) │ │ + b.n 92a48 │ │ + ldr r3, [pc, #44] @ (92aa8 ) │ │ add r3, pc │ │ movs r0, #1 │ │ movs r1, #0 │ │ movs r2, #0 │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ strd r5, r4, [r0, #4] │ │ - b.n 929f6 │ │ - ldr r3, [pc, #20] @ (92a38 ) │ │ + b.n 92a62 │ │ + ldr r3, [pc, #20] @ (92aa4 ) │ │ add r3, pc │ │ movs r0, #1 │ │ movs r1, #0 │ │ movs r2, #0 │ │ - bl 3f9a8 │ │ - ldr r5, [r5, #36] @ 0x24 │ │ - vsri.64 d25, d18, #8 │ │ + bl 3fcb0 │ │ + ldr r1, [r0, #32] │ │ + vsri.32 , q3, #8 │ │ movs r4, r0 │ │ - str r4, [sp, #272] @ 0x110 │ │ + str r3, [sp, #928] @ 0x3a0 │ │ movs r4, r0 │ │ - str r4, [sp, #416] @ 0x1a0 │ │ + str r4, [sp, #48] @ 0x30 │ │ movs r4, r0 │ │ - str r4, [sp, #544] @ 0x220 │ │ + str r4, [sp, #176] @ 0xb0 │ │ movs r4, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ ldrb r1, [r0, #0] │ │ cmp r1, #4 │ │ - beq.n 92a7e │ │ + beq.n 92aea │ │ cmp r1, #3 │ │ - bne.n 92a7e │ │ + bne.n 92aea │ │ ldr r4, [r0, #4] │ │ ldrd r5, r6, [r4] │ │ ldr r1, [r6, #0] │ │ - cbz r1, 92a64 │ │ + cbz r1, 92ad0 │ │ mov r0, r5 │ │ blx r1 │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ mov r8, r0 │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r8 │ │ - blx d6dd0 │ │ - bmi.n 92a4a │ │ + blx d6de0 │ │ + bmi.n 92ab6 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ ldr r4, [r0, #8] │ │ mov r8, r2 │ │ str r0, [sp, #0] │ │ @@ -160807,99 +160722,99 @@ │ │ it cs │ │ movcs r2, r5 │ │ add r0, r2 │ │ cmp r9, r8 │ │ it cc │ │ movcc r6, r9 │ │ mov r2, r6 │ │ - bl d53c6 │ │ + bl d52ea │ │ adds r0, r5, r6 │ │ adc.w r1, fp, #0 │ │ cmp r9, r8 │ │ strd r0, r1, [r4, #8] │ │ - bcs.n 92b3c │ │ - ldr r0, [pc, #112] @ (92b68 ) │ │ + bcs.n 92ba8 │ │ + ldr r0, [pc, #112] @ (92bd4 ) │ │ add r0, pc │ │ ldr r4, [r0, #0] │ │ uxtb r1, r4 │ │ cmp r1, #4 │ │ - beq.n 92b3c │ │ + beq.n 92ba8 │ │ ldr r5, [sp, #0] │ │ ldr r6, [r0, #4] │ │ ldrb r0, [r5, #0] │ │ cmp r0, #4 │ │ - beq.n 92b34 │ │ + beq.n 92ba0 │ │ cmp r0, #3 │ │ - bne.n 92b34 │ │ + bne.n 92ba0 │ │ ldr.w fp, [r5, #4] │ │ ldrd sl, r9, [fp] │ │ ldr.w r1, [r9] │ │ - cbz r1, 92b20 │ │ + cbz r1, 92b8c │ │ mov r0, sl │ │ blx r1 │ │ ldr.w r0, [r9, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, sl │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, fp │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov.w sl, #1 │ │ strd r4, r6, [r5] │ │ mov r0, sl │ │ add sp, #4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r8, r0 │ │ ldr.w r0, [r9, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, sl │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, fp │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #0] │ │ strd r4, r6, [r0] │ │ mov r0, r8 │ │ - blx d6dd0 │ │ - ldrh r6, [r2, #58] @ 0x3a │ │ + blx d6de0 │ │ + ldrh r2, [r7, #54] @ 0x36 │ │ movs r4, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #12 │ │ movs r2, #0 │ │ cmp r1, #128 @ 0x80 │ │ str r2, [sp, #8] │ │ - bcs.n 92b88 │ │ + bcs.n 92bf4 │ │ strb.w r1, [sp, #8] │ │ mov.w r8, #1 │ │ - b.n 92bf0 │ │ + b.n 92c5c │ │ movw r3, #65534 @ 0xfffe │ │ mov r2, r1 │ │ movt r3, #1023 @ 0x3ff │ │ lsrs r4, r1, #6 │ │ bfi r2, r3, #6, #26 │ │ cmp.w r1, #2048 @ 0x800 │ │ - bcs.n 92bb0 │ │ + bcs.n 92c1c │ │ orr.w r1, r4, #192 @ 0xc0 │ │ strb.w r2, [sp, #9] │ │ strb.w r1, [sp, #8] │ │ mov.w r8, #2 │ │ - b.n 92bf0 │ │ + b.n 92c5c │ │ bfi r4, r3, #6, #26 │ │ lsrs r6, r1, #12 │ │ movs r5, #0 │ │ cmp.w r5, r1, lsr #16 │ │ - bne.n 92bd0 │ │ + bne.n 92c3c │ │ orr.w r1, r6, #224 @ 0xe0 │ │ strb.w r2, [sp, #10] │ │ strb.w r4, [sp, #9] │ │ mov.w r8, #3 │ │ - b.n 92bec │ │ + b.n 92c58 │ │ mov.w r8, #4 │ │ mvn.w r5, #15 │ │ orr.w r1, r5, r1, lsr #18 │ │ bfi r6, r3, #6, #26 │ │ strb.w r2, [sp, #11] │ │ strb.w r4, [sp, #10] │ │ strb.w r6, [sp, #9] │ │ @@ -160922,110 +160837,110 @@ │ │ movcs r1, r5 │ │ add r0, r1 │ │ add r1, sp, #8 │ │ cmp fp, r8 │ │ it cc │ │ movcc r6, fp │ │ mov r2, r6 │ │ - bl d53c6 │ │ + bl d52ea │ │ adds r0, r5, r6 │ │ adc.w r1, sl, #0 │ │ cmp fp, r8 │ │ strd r0, r1, [r4, #8] │ │ - bcs.n 92c82 │ │ - ldr r0, [pc, #116] @ (92cb0 ) │ │ + bcs.n 92cee │ │ + ldr r0, [pc, #116] @ (92d1c ) │ │ add r0, pc │ │ ldr r6, [r0, #0] │ │ uxtb r1, r6 │ │ cmp r1, #4 │ │ - beq.n 92c82 │ │ + beq.n 92cee │ │ ldr r4, [sp, #4] │ │ ldr r5, [r0, #4] │ │ ldrb r0, [r4, #0] │ │ cmp r0, #4 │ │ - beq.n 92c7a │ │ + beq.n 92ce6 │ │ cmp r0, #3 │ │ - bne.n 92c7a │ │ + bne.n 92ce6 │ │ ldr.w sl, [r4, #4] │ │ ldrd r9, fp, [sl] │ │ ldr.w r1, [fp] │ │ - cbz r1, 92c66 │ │ + cbz r1, 92cd2 │ │ mov r0, r9 │ │ blx r1 │ │ ldr.w r0, [fp, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r9 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, sl │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov.w r9, #1 │ │ strd r6, r5, [r4] │ │ mov r0, r9 │ │ add sp, #12 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r8, r0 │ │ ldr.w r0, [fp, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r9 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, sl │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r0, [sp, #4] │ │ strd r6, r5, [r0] │ │ mov r0, r8 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ nop │ │ - ldrh r0, [r2, #48] @ 0x30 │ │ + ldrh r4, [r6, #44] @ 0x2c │ │ movs r4, r0 │ │ mov r3, r2 │ │ mov r2, r1 │ │ - ldr r1, [pc, #4] @ (92cc0 ) │ │ + ldr r1, [pc, #4] @ (92d2c ) │ │ add r1, pc │ │ - b.w 3ef94 │ │ - ldrh r6, [r3, #40] @ 0x28 │ │ + b.w 3f29c │ │ + ldrh r2, [r3, #38] @ 0x26 │ │ movs r4, r0 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ mov r1, r2 │ │ mov r4, r0 │ │ movs r0, #2 │ │ mov r2, r3 │ │ - blx d8a10 │ │ + blx d8a20 │ │ adds r1, r0, #1 │ │ - beq.n 92ce0 │ │ + beq.n 92d4c │ │ movs r1, #4 │ │ str r0, [r4, #4] │ │ strb r1, [r4, #0] │ │ pop {r4, r6, r7, pc} │ │ - blx d8850 │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ movs r1, #0 │ │ str r0, [r4, #4] │ │ strb r1, [r4, #0] │ │ pop {r4, r6, r7, pc} │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ cmp.w r3, #1024 @ 0x400 │ │ mov r4, r0 │ │ mov r1, r2 │ │ it cs │ │ movcs.w r3, #1024 @ 0x400 │ │ movs r0, #2 │ │ mov r2, r3 │ │ - blx d8a20 │ │ + blx d8a30 │ │ adds r1, r0, #1 │ │ - beq.n 92d14 │ │ + beq.n 92d80 │ │ movs r1, #4 │ │ str r0, [r4, #4] │ │ strb r1, [r4, #0] │ │ pop {r4, r6, r7, pc} │ │ - blx d8850 │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ movs r1, #0 │ │ str r0, [r4, #4] │ │ strb r1, [r4, #0] │ │ pop {r4, r6, r7, pc} │ │ movs r0, #1 │ │ bx lr │ │ @@ -161033,228 +160948,228 @@ │ │ strb r1, [r0, #0] │ │ bx lr │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #8 │ │ mov r8, r0 │ │ - cbz r3, 92d80 │ │ - ldr r0, [pc, #112] @ (92dac ) │ │ + cbz r3, 92dec │ │ + ldr r0, [pc, #112] @ (92e18 ) │ │ mov r5, r3 │ │ mov r6, r2 │ │ mov.w r9, #0 │ │ add r0, pc │ │ movs r4, #4 │ │ mov sl, r0 │ │ - b.n 92d5e │ │ - blx d8850 │ │ + b.n 92dca │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ strb.w r9, [sp] │ │ cmp r0, #4 │ │ str r0, [sp, #4] │ │ - bne.n 92d8e │ │ - cbz r5, 92d80 │ │ + bne.n 92dfa │ │ + cbz r5, 92dec │ │ movs r0, #2 │ │ mov r1, r6 │ │ mov r2, r5 │ │ - blx d8a10 │ │ + blx d8a20 │ │ adds r1, r0, #1 │ │ - beq.n 92d4c │ │ + beq.n 92db8 │ │ str r0, [sp, #4] │ │ strb.w r4, [sp] │ │ - cbz r0, 92d90 │ │ + cbz r0, 92dfc │ │ cmp r5, r0 │ │ - bcc.n 92da0 │ │ + bcc.n 92e0c │ │ add r6, r0 │ │ subs r5, r5, r0 │ │ cmp r5, #0 │ │ - bne.n 92d5e │ │ + bne.n 92dca │ │ movs r0, #4 │ │ strb.w r0, [r8] │ │ add sp, #8 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ mov sl, sp │ │ ldrd r0, r1, [sl] │ │ strd r0, r1, [r8] │ │ add sp, #8 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r3, [pc, #12] @ (92db0 ) │ │ + ldr r3, [pc, #12] @ (92e1c ) │ │ mov r1, r5 │ │ mov r2, r5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldrh r0, [r1, #40] @ 0x28 │ │ + bl 3fcb0 │ │ + ldrh r4, [r5, #36] @ 0x24 │ │ movs r4, r0 │ │ - ldrh r6, [r5, #36] @ 0x24 │ │ + ldrh r2, [r2, #34] @ 0x22 │ │ movs r4, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #20 │ │ cmp r3, #0 │ │ - beq.w 92ec6 │ │ + beq.w 92f32 │ │ lsls r6, r3, #3 │ │ sub.w r1, r6, #8 │ │ movs r5, #1 │ │ adds r4, r2, #4 │ │ add.w ip, r5, r1, lsr #3 │ │ movs r1, #0 │ │ ldr.w r5, [r4, r1, lsl #3] │ │ - cbnz r5, 92de2 │ │ + cbnz r5, 92e4e │ │ adds r1, #1 │ │ subs r6, #8 │ │ - bne.n 92dd4 │ │ + bne.n 92e40 │ │ mov r1, ip │ │ cmp r3, r1 │ │ - bcc.w 92f02 │ │ - beq.n 92ec6 │ │ + bcc.w 92f6e │ │ + beq.n 92f32 │ │ str r0, [sp, #8] │ │ subs r5, r3, r1 │ │ - ldr r0, [pc, #332] @ (92f3c ) │ │ + ldr r0, [pc, #332] @ (92fa8 ) │ │ add.w r6, r2, r1, lsl #3 │ │ mov.w r8, #0 │ │ mov.w fp, #4 │ │ mvn.w r9, #7 │ │ mov.w sl, #1 │ │ add r0, pc │ │ str r0, [sp, #4] │ │ - b.n 92e1a │ │ - blx d8850 │ │ + b.n 92e86 │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ strb.w r8, [sp, #12] │ │ cmp r0, #4 │ │ str r0, [sp, #16] │ │ - bne.n 92ed2 │ │ + bne.n 92f3e │ │ mov r2, r5 │ │ movs r0, #2 │ │ mov r1, r6 │ │ cmp.w r5, #1024 @ 0x400 │ │ it cs │ │ movcs.w r2, #1024 @ 0x400 │ │ - blx d8a20 │ │ + blx d8a30 │ │ adds r1, r0, #1 │ │ - beq.n 92e0a │ │ + beq.n 92e76 │ │ cmp r0, #0 │ │ str r0, [sp, #16] │ │ strb.w fp, [sp, #12] │ │ - beq.n 92ebe │ │ + beq.n 92f2a │ │ add.w r1, r9, r5, lsl #3 │ │ adds r3, r6, #4 │ │ lsls r4, r5, #3 │ │ add.w ip, sl, r1, lsr #3 │ │ movs r1, #0 │ │ ldr.w r2, [r3, r1, lsl #3] │ │ cmp r0, r2 │ │ - bcc.n 92e5c │ │ + bcc.n 92ec8 │ │ subs r0, r0, r2 │ │ adds r1, #1 │ │ subs r4, #8 │ │ - bne.n 92e4a │ │ + bne.n 92eb6 │ │ mov r1, ip │ │ cmp r5, r1 │ │ - bcc.n 92ee6 │ │ + bcc.n 92f52 │ │ subs r5, r5, r1 │ │ - beq.n 92ec2 │ │ + beq.n 92f2e │ │ add.w r6, r6, r1, lsl #3 │ │ ldr r1, [r6, #4] │ │ cmp r1, r0 │ │ - bcc.n 92ef4 │ │ + bcc.n 92f60 │ │ ldr r2, [r6, #0] │ │ subs r1, r1, r0 │ │ add r0, r2 │ │ strd r0, r1, [r6] │ │ ldrb.w r0, [sp, #12] │ │ cmp r0, #4 │ │ - beq.n 92e1a │ │ + beq.n 92e86 │ │ cmp r0, #3 │ │ - bne.n 92e1a │ │ + bne.n 92e86 │ │ ldr r4, [sp, #16] │ │ mov.w fp, #1 │ │ mvn.w sl, #7 │ │ ldrd r8, r9, [r4] │ │ ldr.w r1, [r9] │ │ - cbz r1, 92e9c │ │ + cbz r1, 92f08 │ │ mov r0, r8 │ │ blx r1 │ │ ldr.w r0, [r9, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r9, sl │ │ mov sl, fp │ │ mov.w r8, #0 │ │ mov.w fp, #4 │ │ - b.n 92e1a │ │ + b.n 92e86 │ │ ldr r0, [sp, #4] │ │ - b.n 92ed4 │ │ - cbnz r0, 92f12 │ │ + b.n 92f40 │ │ + cbnz r0, 92f7e │ │ ldr r0, [sp, #8] │ │ movs r1, #4 │ │ strb r1, [r0, #0] │ │ add sp, #20 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ add r0, sp, #12 │ │ ldrd r1, r2, [r0] │ │ ldr r0, [sp, #8] │ │ strd r1, r2, [r0] │ │ add sp, #20 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r3, [pc, #100] @ (92f4c ) │ │ + ldr r3, [pc, #100] @ (92fb8 ) │ │ mov r0, r1 │ │ mov r1, r5 │ │ mov r2, r5 │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #88] @ (92f50 ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #88] @ (92fbc ) │ │ movs r1, #71 @ 0x47 │ │ - ldr r2, [pc, #88] @ (92f54 ) │ │ + ldr r2, [pc, #88] @ (92fc0 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ - ldr r4, [pc, #68] @ (92f48 ) │ │ + bl 3fd60 │ │ + ldr r4, [pc, #68] @ (92fb4 ) │ │ mov r0, r1 │ │ mov r1, r3 │ │ mov r2, r3 │ │ add r4, pc │ │ mov r3, r4 │ │ - bl 3f9a8 │ │ - ldr r0, [pc, #44] @ (92f40 ) │ │ + bl 3fcb0 │ │ + ldr r0, [pc, #44] @ (92fac ) │ │ movs r1, #79 @ 0x4f │ │ - ldr r2, [pc, #44] @ (92f44 ) │ │ + ldr r2, [pc, #44] @ (92fb0 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ mov r5, r0 │ │ ldr.w r0, [r9, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ - ldrh r0, [r1, #34] @ 0x22 │ │ + blx d6de0 │ │ + ldrh r4, [r5, #30] │ │ movs r4, r0 │ │ - ldrh r7, [r3, r5] │ │ - vtbx.8 d24, {d8-d11}, d10 │ │ + ldrh r3, [r6, r3] │ │ + vtbx.8 d24, {d24-d26}, d30 │ │ movs r4, r0 │ │ - ldrh r2, [r7, #26] │ │ + ldrh r6, [r3, #24] │ │ movs r4, r0 │ │ - ldrh r6, [r2, #28] │ │ + ldrh r2, [r7, #24] │ │ movs r4, r0 │ │ - ldrh r4, [r4, r6] │ │ - @ instruction: 0xfff88b78 │ │ + ldrh r0, [r7, r4] │ │ + @ instruction: 0xfff88b1c │ │ movs r4, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #384 @ 0x180 │ │ ldr r2, [r1, #0] │ │ mov r8, r0 │ │ @@ -161263,20 +161178,20 @@ │ │ ldr r6, [r1, #8] │ │ ldrh r1, [r1, #12] │ │ strh.w r1, [sp, #12] │ │ mov r1, sp │ │ cmp r1, r1 │ │ strb.w r0, [sp, #14] │ │ stmia.w sp, {r2, r3, r6} │ │ - beq.n 92f8a │ │ + beq.n 92ff6 │ │ movs r2, #0 │ │ ldrb r3, [r1, r2] │ │ - cbz r3, 92fc2 │ │ + cbz r3, 9302e │ │ adds r2, #1 │ │ - bne.n 92f82 │ │ + bne.n 92fee │ │ movw r6, #256 @ 0x100 │ │ ldrd r2, r3, [sp] │ │ movt r6, #257 @ 0x101 │ │ subs r5, r6, r3 │ │ subs r6, r6, r2 │ │ orrs r3, r5 │ │ orrs r2, r6 │ │ @@ -161284,490 +161199,490 @@ │ │ mvns r2, r2 │ │ tst.w r2, #2155905152 @ 0x80808080 │ │ mov.w r2, #0 │ │ it eq │ │ moveq r2, #8 │ │ add r1, r2 │ │ ldrb r3, [r1, r0] │ │ - cbz r3, 92fc0 │ │ + cbz r3, 9302c │ │ adds r0, #1 │ │ eor.w r3, r2, r0 │ │ cmp r3, #15 │ │ - bne.n 92fb0 │ │ - b.n 9307a │ │ + bne.n 9301c │ │ + b.n 930e6 │ │ add r2, r0 │ │ cmp r2, #14 │ │ - bne.n 9307a │ │ - ldr r5, [pc, #324] @ (9310c ) │ │ + bne.n 930e6 │ │ + ldr r5, [pc, #324] @ (93178 ) │ │ movw r1, #65533 @ 0xfffd │ │ movt r1, #16383 @ 0x3fff │ │ add r5, pc │ │ ldr r0, [r5, #0] │ │ cmp r0, r1 │ │ - bhi.n 9308e │ │ + bhi.n 930fa │ │ ldrex r1, [r5] │ │ cmp r1, r0 │ │ - bne.n 9308a │ │ + bne.n 930f6 │ │ adds r0, #1 │ │ strex r1, r0, [r5] │ │ cmp r1, #0 │ │ - bne.n 9308e │ │ + bne.n 930fa │ │ dmb ish │ │ ldrb r0, [r5, #8] │ │ mov r0, sp │ │ - blx d8a30 │ │ - cbz r0, 93016 │ │ + blx d8a40 │ │ + cbz r0, 93082 │ │ mov r6, r0 │ │ - blx d87e0 │ │ + blx d8800 │ │ mov r9, r0 │ │ - cbz r0, 93020 │ │ + cbz r0, 9308c │ │ mov r0, r9 │ │ - blx d87f0 │ │ + blx d8810 │ │ mov r4, r0 │ │ - cbnz r0, 93022 │ │ + cbnz r0, 9308e │ │ movs r0, #1 │ │ mov r1, r9 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ udf #254 @ 0xfe │ │ mov.w r9, #2147483648 @ 0x80000000 │ │ movs r6, #0 │ │ movs r4, #0 │ │ - b.n 93032 │ │ + b.n 9309e │ │ movs r4, #1 │ │ mov r0, r4 │ │ mov r1, r6 │ │ mov r2, r9 │ │ - bl d53c6 │ │ + bl d52ea │ │ bic.w r6, r4, #255 @ 0xff │ │ uxtb r4, r4 │ │ dmb ish │ │ ldrex r0, [r5] │ │ subs r1, r0, #1 │ │ strex r0, r1, [r5] │ │ cmp r0, #0 │ │ - bne.n 93036 │ │ + bne.n 930a2 │ │ bic.w r0, r1, #1073741824 @ 0x40000000 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.n 93098 │ │ + beq.n 93104 │ │ movs r0, #1 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r9, r0 │ │ - bne.n 930aa │ │ + bne.n 93116 │ │ cmp r4, #3 │ │ - bne.n 9307a │ │ + bne.n 930e6 │ │ ldrd r6, r5, [r9] │ │ ldr r1, [r5, #0] │ │ - cbz r1, 93068 │ │ + cbz r1, 930d4 │ │ mov r0, r6 │ │ blx r1 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r9 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ str.w r0, [r8] │ │ add sp, #384 @ 0x180 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ clrex │ │ - ldr r0, [pc, #128] @ (93110 ) │ │ + ldr r0, [pc, #128] @ (9317c ) │ │ add r0, pc │ │ - bl 7711c │ │ - b.n 92fee │ │ - ldr r0, [pc, #120] @ (93114 ) │ │ + bl 77184 │ │ + b.n 9305a │ │ + ldr r0, [pc, #120] @ (93180 ) │ │ add r0, pc │ │ - bl 9311c │ │ + bl 93188 │ │ movs r0, #1 │ │ movt r0, #32768 @ 0x8000 │ │ cmp r9, r0 │ │ - beq.n 93058 │ │ + beq.n 930c4 │ │ orr.w r0, r6, r4 │ │ str.w r9, [r8, #8] │ │ strd r9, r0, [r8] │ │ add sp, #384 @ 0x180 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r4, r0 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r9 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ mov r4, r0 │ │ dmb ish │ │ ldrex r0, [r5] │ │ subs r1, r0, #1 │ │ strex r0, r1, [r5] │ │ cmp r0, #0 │ │ - bne.n 930de │ │ + bne.n 9314a │ │ bic.w r0, r1, #1073741824 @ 0x40000000 │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - beq.n 930fc │ │ + beq.n 93168 │ │ mov r0, r4 │ │ - blx d6dd0 │ │ - ldr r0, [pc, #24] @ (93118 ) │ │ + blx d6de0 │ │ + ldr r0, [pc, #24] @ (93184 ) │ │ add r0, pc │ │ - bl 9311c │ │ - b.n 930f6 │ │ - bl 416fe │ │ + bl 93188 │ │ + b.n 93162 │ │ + bl 41a06 │ │ nop │ │ - @ instruction: 0xb7b4 │ │ + @ instruction: 0xb768 │ │ movs r4, r0 │ │ - @ instruction: 0xb6f4 │ │ + @ instruction: 0xb6a8 │ │ movs r4, r0 │ │ - @ instruction: 0xb6ea │ │ + @ instruction: 0xb69e │ │ movs r4, r0 │ │ - @ instruction: 0xb686 │ │ + @ instruction: 0xb63a │ │ movs r4, r0 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ lsls r2, r1, #2 │ │ - bne.n 931e6 │ │ + bne.n 93252 │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ - bne.n 93144 │ │ + bne.n 931b0 │ │ movs r2, #0 │ │ ldrex r1, [r0] │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ - bne.n 931ba │ │ + bne.n 93226 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 9312c │ │ + bne.n 93198 │ │ movs r2, #1 │ │ cmp r2, #0 │ │ - bne.n 931c4 │ │ + bne.n 93230 │ │ cmp.w r1, #1073741824 @ 0x40000000 │ │ - beq.n 9318e │ │ + beq.n 931fa │ │ cmp.w r1, #3221225472 @ 0xc0000000 │ │ - bne.n 931b8 │ │ + bne.n 93224 │ │ mov.w r1, #1073741824 @ 0x40000000 │ │ ldrex r2, [r0] │ │ cmp.w r2, #3221225472 @ 0xc0000000 │ │ - bne.n 931b4 │ │ + bne.n 93220 │ │ strex r2, r1, [r0] │ │ cmp r2, #0 │ │ - bne.n 93154 │ │ + bne.n 931c0 │ │ adds r1, r0, #4 │ │ mov r4, r0 │ │ dmb ish │ │ ldrex r0, [r1] │ │ adds r0, #1 │ │ strex r2, r0, [r1] │ │ cmp r2, #0 │ │ - bne.n 9316e │ │ + bne.n 931da │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ + blx d87e0 │ │ cmp r0, #0 │ │ mov r0, r4 │ │ it gt │ │ popgt {r4, r6, r7, pc} │ │ movs r1, #0 │ │ ldrex r2, [r0] │ │ cmp.w r2, #1073741824 @ 0x40000000 │ │ - bne.n 931b4 │ │ + bne.n 93220 │ │ strex r2, r1, [r0] │ │ cmp r2, #0 │ │ - bne.n 93190 │ │ + bne.n 931fc │ │ mov r1, r0 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ mvn.w r3, #2147483648 @ 0x80000000 │ │ ldmia.w sp!, {r4, r6, r7, lr} │ │ - b.w d8700 │ │ + b.w d8710 │ │ clrex │ │ pop {r4, r6, r7, pc} │ │ movs r2, #0 │ │ clrex │ │ cmp r2, #0 │ │ - beq.n 93144 │ │ + beq.n 931b0 │ │ adds r1, r0, #4 │ │ dmb ish │ │ ldrex r0, [r1] │ │ adds r0, #1 │ │ strex r2, r0, [r1] │ │ cmp r2, #0 │ │ - bne.n 931ca │ │ + bne.n 93236 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ ldmia.w sp!, {r4, r6, r7, lr} │ │ - b.w d8700 │ │ - ldr r0, [pc, #12] @ (931f4 ) │ │ + b.w d8710 │ │ + ldr r0, [pc, #12] @ (93260 ) │ │ movs r1, #36 @ 0x24 │ │ - ldr r2, [pc, #12] @ (931f8 ) │ │ + ldr r2, [pc, #12] @ (93264 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldrh r5, [r7, r0] │ │ - vtbl.8 d24, {d8-d9}, d30 │ │ + bl 3fd54 │ │ + ldr r1, [r2, r7] │ │ + @ instruction: 0xfff888d2 │ │ movs r4, r0 │ │ push {r7, lr} │ │ mov r7, sp │ │ - blx d8a40 │ │ + blx d8a50 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #12 │ │ movs r5, #0 │ │ - cbz r2, 9325a │ │ + cbz r2, 932c6 │ │ mov r8, r0 │ │ - ldr r0, [pc, #212] @ (932ec ) │ │ + ldr r0, [pc, #212] @ (93358 ) │ │ mov r6, r2 │ │ mov r4, r1 │ │ add r0, pc │ │ mov.w r9, #4 │ │ mov sl, r0 │ │ - b.n 93236 │ │ - blx d8850 │ │ + b.n 932a2 │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ strb.w r5, [sp, #4] │ │ cmp r0, #4 │ │ str r0, [sp, #8] │ │ - bne.n 93264 │ │ - cbz r6, 93258 │ │ + bne.n 932d0 │ │ + cbz r6, 932c4 │ │ movs r0, #2 │ │ mov r1, r4 │ │ mov r2, r6 │ │ - blx d8a10 │ │ + blx d8a20 │ │ adds r1, r0, #1 │ │ - beq.n 93224 │ │ + beq.n 93290 │ │ str r0, [sp, #8] │ │ strb.w r9, [sp, #4] │ │ - cbz r0, 93268 │ │ + cbz r0, 932d4 │ │ cmp r6, r0 │ │ - bcc.n 932c0 │ │ + bcc.n 9332c │ │ add r4, r0 │ │ subs r6, r6, r0 │ │ cmp r6, #0 │ │ - bne.n 93236 │ │ + bne.n 932a2 │ │ movs r5, #0 │ │ mov r0, r5 │ │ add sp, #12 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ add.w sl, sp, #4 │ │ ldr.w r6, [sl] │ │ uxtb r0, r6 │ │ cmp r0, #4 │ │ - bne.n 9327e │ │ + bne.n 932ea │ │ movs r5, #0 │ │ mov r0, r5 │ │ add sp, #12 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrb.w r0, [r8] │ │ ldr.w r5, [sl, #4] │ │ cmp r0, #4 │ │ - beq.n 932b0 │ │ + beq.n 9331c │ │ cmp r0, #3 │ │ - bne.n 932b0 │ │ + bne.n 9331c │ │ ldr.w fp, [r8, #4] │ │ ldrd sl, r4, [fp] │ │ ldr r1, [r4, #0] │ │ - cbz r1, 9329e │ │ + cbz r1, 9330a │ │ mov r0, sl │ │ blx r1 │ │ ldr r0, [r4, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, sl │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, fp │ │ - blx d87c0 │ │ + blx d87d0 │ │ strd r6, r5, [r8] │ │ movs r5, #1 │ │ mov r0, r5 │ │ add sp, #12 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r3, [pc, #44] @ (932f0 ) │ │ + ldr r3, [pc, #44] @ (9335c ) │ │ mov r1, r6 │ │ mov r2, r6 │ │ add r3, pc │ │ - bl 3f9a8 │ │ + bl 3fcb0 │ │ mov r9, r0 │ │ ldr r0, [r4, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, sl │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, fp │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r9 │ │ strd r6, r5, [r8] │ │ - blx d6dd0 │ │ + blx d6de0 │ │ nop │ │ - ldrh r2, [r6, #0] │ │ + strh r6, [r2, #62] @ 0x3e │ │ movs r4, r0 │ │ - strh r6, [r1, #60] @ 0x3c │ │ + strh r2, [r6, #56] @ 0x38 │ │ movs r4, r0 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ movs r2, #0 │ │ cmp r1, #128 @ 0x80 │ │ str r2, [sp, #4] │ │ - bcs.n 93312 │ │ + bcs.n 9337e │ │ strb.w r1, [sp, #4] │ │ movs r2, #1 │ │ add r1, sp, #4 │ │ - bl 93204 │ │ + bl 93270 │ │ add sp, #8 │ │ pop {r4, r6, r7, pc} │ │ movw ip, #65534 @ 0xfffe │ │ mov r3, r1 │ │ movt ip, #1023 @ 0x3ff │ │ lsrs r2, r1, #6 │ │ bfi r3, ip, #6, #26 │ │ cmp.w r1, #2048 @ 0x800 │ │ - bcs.n 93340 │ │ + bcs.n 933ac │ │ orr.w r1, r2, #192 @ 0xc0 │ │ strb.w r3, [sp, #5] │ │ strb.w r1, [sp, #4] │ │ movs r2, #2 │ │ add r1, sp, #4 │ │ - bl 93204 │ │ + bl 93270 │ │ add sp, #8 │ │ pop {r4, r6, r7, pc} │ │ bfi r2, ip, #6, #26 │ │ mov.w lr, r1, lsr #12 │ │ movs r4, #0 │ │ cmp.w r4, r1, lsr #16 │ │ - bne.n 93360 │ │ + bne.n 933cc │ │ strb.w r2, [sp, #5] │ │ orr.w r1, lr, #224 @ 0xe0 │ │ strb.w r3, [sp, #6] │ │ movs r2, #3 │ │ - b.n 9337a │ │ + b.n 933e6 │ │ strb.w r2, [sp, #6] │ │ movs r2, #4 │ │ mvn.w r4, #15 │ │ orr.w r1, r4, r1, lsr #18 │ │ bfi lr, ip, #6, #26 │ │ strb.w r3, [sp, #7] │ │ strb.w lr, [sp, #5] │ │ strb.w r1, [sp, #4] │ │ add r1, sp, #4 │ │ - bl 93204 │ │ + bl 93270 │ │ add sp, #8 │ │ pop {r4, r6, r7, pc} │ │ mov r3, r2 │ │ mov r2, r1 │ │ - ldr r1, [pc, #4] @ (93394 ) │ │ + ldr r1, [pc, #4] @ (93400 ) │ │ add r1, pc │ │ - b.w 3ef94 │ │ - strh r2, [r4, #50] @ 0x32 │ │ + b.w 3f29c │ │ + strh r6, [r3, #46] @ 0x2e │ │ movs r4, r0 │ │ movw ip, #7025 @ 0x1b71 │ │ movw r2, #16760 @ 0x4178 │ │ movw r3, #20524 @ 0x502c │ │ movw r1, #23917 @ 0x5d6d │ │ movt ip, #47499 @ 0xb98b │ │ movt r2, #22438 @ 0x57a6 │ │ movt r3, #25579 @ 0x63eb │ │ movt r1, #54987 @ 0xd6cb │ │ strd r1, r3, [r0] │ │ strd r2, ip, [r0, #8] │ │ bx lr │ │ - bmi.n 9336e │ │ + bmi.n 933da │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #36 @ 0x24 │ │ mov r6, r0 │ │ str r0, [sp, #24] │ │ - blx d6f60 │ │ + blx d6f70 │ │ mov r5, r0 │ │ add r0, sp, #32 │ │ movs r4, #0 │ │ str r0, [sp, #0] │ │ mov r0, r6 │ │ movs r1, #0 │ │ movs r2, #15 │ │ movs r3, #0 │ │ str r4, [sp, #32] │ │ - blx d62ac │ │ + blx d62bc │ │ mov r0, r6 │ │ ldr.w fp, [sp, #32] │ │ - blx d6f8c │ │ + blx d6f9c │ │ add r1, sp, #24 │ │ str r0, [sp, #20] │ │ strd r1, r1, [sp, #28] │ │ - cbz r5, 93410 │ │ + cbz r5, 9347c │ │ mov r8, r5 │ │ ldrb.w r9, [r8], #1 │ │ cmp.w r9, #255 @ 0xff │ │ - bne.n 9341a │ │ + bne.n 93486 │ │ ldr r0, [sp, #20] │ │ - b.n 9356a │ │ + b.n 935d6 │ │ mov r0, r4 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ubfx r4, r9, #4, #3 │ │ cmp r4, #5 │ │ - bhi.n 93484 │ │ - ldr r3, [pc, #800] @ (93744 ) │ │ + bhi.n 934f0 │ │ + ldr r3, [pc, #800] @ (937b0 ) │ │ add r1, sp, #28 │ │ add r3, pc │ │ mov r0, r8 │ │ tbb [pc, r4] │ │ asrs r2, r1, #32 │ │ lsls r6, r0, #12 │ │ movs r4, #14 │ │ - ldr r3, [pc, #784] @ (93748 ) │ │ + ldr r3, [pc, #784] @ (937b4 ) │ │ add r1, sp, #32 │ │ add r3, pc │ │ ldr r2, [r3, #20] │ │ mov r0, r1 │ │ blx r2 │ │ - cbnz r0, 9344e │ │ + cbnz r0, 934ba │ │ movs.w r1, r9, lsl #28 │ │ - bne.n 93484 │ │ - b.n 93490 │ │ + bne.n 934f0 │ │ + b.n 934fc │ │ ldr r0, [sp, #20] │ │ - cbz r0, 93484 │ │ + cbz r0, 934f0 │ │ and.w r3, r9, #15 │ │ movs r4, #5 │ │ cmp r3, #12 │ │ - bhi.n 93486 │ │ + bhi.n 934f2 │ │ tbb [pc, r3] │ │ strb r0, [r1, r4] │ │ lsrs r1, r7, #1 │ │ lsls r5, r3, #28 │ │ lsls r7, r0, #28 │ │ movs r2, #7 │ │ lsrs r4, r7, #1 │ │ movs r5, r3 │ │ - b.n 93410 │ │ + b.n 9347c │ │ ldr.w sl, [r5, #1] │ │ add.w r8, r5, #5 │ │ - b.n 9355c │ │ + b.n 935c8 │ │ add.w r1, r8, #3 │ │ bic.w r8, r1, #3 │ │ movs.w r1, r9, lsl #28 │ │ - beq.n 93490 │ │ + beq.n 934fc │ │ movs r4, #5 │ │ mov r0, r4 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr.w r0, [r8], #4 │ │ - b.n 9355e │ │ + b.n 935ca │ │ ldr.w sl, [r8] │ │ add.w r8, r5, #9 │ │ - b.n 9355c │ │ + b.n 935c8 │ │ mov r6, fp │ │ mov.w sl, #0 │ │ mov.w ip, #0 │ │ movs r3, #0 │ │ ldrsb.w fp, [r8], #1 │ │ and.w r1, r3, #63 @ 0x3f │ │ rsb lr, r1, #32 │ │ @@ -161779,27 +161694,27 @@ │ │ it pl │ │ lslpl.w r4, r2, r5 │ │ it pl │ │ movpl r1, #0 │ │ orr.w ip, ip, r4 │ │ orr.w sl, sl, r1 │ │ cmp.w fp, #0 │ │ - bmi.n 934ac │ │ + bmi.n 93518 │ │ cmp r3, #63 @ 0x3f │ │ - bhi.n 9354a │ │ + bhi.n 935b6 │ │ uxtb.w r1, fp │ │ cmp r1, #64 @ 0x40 │ │ - bcc.n 9354a │ │ + bcc.n 935b6 │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ subs.w r2, r3, #32 │ │ lsl.w r1, r1, r3 │ │ it pl │ │ movpl r1, #0 │ │ orr.w sl, sl, r1 │ │ - b.n 9354a │ │ + b.n 935b6 │ │ mov r6, fp │ │ movs r3, #0 │ │ mov.w sl, #0 │ │ mov.w fp, #0 │ │ ldrsb.w lr, [r8], #1 │ │ and.w r4, r3, #63 @ 0x3f │ │ rsb r2, r4, #32 │ │ @@ -161811,34 +161726,34 @@ │ │ lslpl.w r2, r1, r5 │ │ lsl.w r1, r1, r4 │ │ it pl │ │ movpl r1, #0 │ │ orr.w fp, fp, r2 │ │ orr.w sl, sl, r1 │ │ cmp.w lr, #0 │ │ - bmi.n 93512 │ │ + bmi.n 9357e │ │ mov fp, r6 │ │ - b.n 9355c │ │ + b.n 935c8 │ │ ldrh.w sl, [r5, #1] │ │ - b.n 93558 │ │ + b.n 935c4 │ │ ldrsh.w sl, [r5, #1] │ │ add.w r8, r5, #3 │ │ add r0, sl │ │ sxtb.w r1, r9 │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ it le │ │ ldrle r0, [r0, #0] │ │ ldrb.w r2, [r8], #1 │ │ bic.w r1, fp, #1 │ │ str r0, [sp, #8] │ │ cmp r2, #255 @ 0xff │ │ - beq.n 93582 │ │ + beq.n 935ee │ │ ldrsb.w r0, [r8], #1 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - ble.n 93578 │ │ + ble.n 935e4 │ │ ldrb.w ip, [r8], #1 │ │ movs r3, #0 │ │ mov.w r9, #0 │ │ movs r4, #0 │ │ subs r0, r1, #1 │ │ str r0, [sp, #16] │ │ mov lr, r8 │ │ @@ -161853,52 +161768,52 @@ │ │ lslpl.w r6, r2, r1 │ │ lsl.w r1, r2, r5 │ │ it pl │ │ movpl r1, #0 │ │ orrs r4, r6 │ │ orr.w r9, r9, r1 │ │ cmp.w sl, #0 │ │ - bmi.n 93592 │ │ + bmi.n 935fe │ │ uxtb.w sl, ip │ │ cmp.w sl, #15 │ │ - bhi.w 9391e │ │ + bhi.w 9398a │ │ add.w r1, lr, r9 │ │ adds r0, r1, #1 │ │ str r0, [sp, #12] │ │ ldr r0, [sp, #12] │ │ cmp r8, r0 │ │ - bcs.w 93932 │ │ + bcs.w 9399e │ │ movs r4, #5 │ │ cmp.w sl, #12 │ │ - bhi.w 93486 │ │ + bhi.w 934f2 │ │ tbh [pc, sl, lsl #1] │ │ movs r6, r1 │ │ lsls r5, r5, #2 │ │ lsls r7, r1, #4 │ │ movs r6, r1 │ │ movs r7, r2 │ │ movs r5, r1 │ │ movs r5, r1 │ │ movs r5, r1 │ │ movs r5, r1 │ │ movs r0, r4 │ │ lsls r0, r1, #4 │ │ movs r6, r1 │ │ movs r7, r2 │ │ - b.n 93410 │ │ + b.n 9347c │ │ ldr.w fp, [r8] │ │ ldr.w r9, [r8, #4] │ │ ldr.w lr, [r8, #8] │ │ add.w r8, r8, #12 │ │ - b.n 93820 │ │ + b.n 9388c │ │ ldr.w fp, [r8] │ │ ldr.w r9, [r8, #8] │ │ ldr.w lr, [r8, #16] │ │ add.w r8, r8, #24 │ │ - b.n 93820 │ │ + b.n 9388c │ │ mov.w fp, #0 │ │ movs r1, #0 │ │ movs r2, #0 │ │ ldrsb.w r3, [r8], #1 │ │ and.w r5, r2, #63 @ 0x3f │ │ rsb r4, r5, #32 │ │ subs.w r0, r5, #32 │ │ @@ -161909,20 +161824,20 @@ │ │ lslpl.w r4, r6, r0 │ │ lsl.w r0, r6, r5 │ │ it pl │ │ movpl r0, #0 │ │ orrs r1, r4 │ │ orr.w fp, fp, r0 │ │ cmp r3, #0 │ │ - bmi.n 9363a │ │ + bmi.n 936a6 │ │ cmp r2, #63 @ 0x3f │ │ - bhi.n 9368c │ │ + bhi.n 936f8 │ │ uxtb r0, r3 │ │ cmp r0, #64 @ 0x40 │ │ - bcc.n 9368c │ │ + bcc.n 936f8 │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ subs.w r1, r2, #32 │ │ lsl.w r0, r0, r2 │ │ it pl │ │ movpl r0, #0 │ │ orr.w fp, fp, r0 │ │ mov.w r9, #0 │ │ @@ -161939,20 +161854,20 @@ │ │ it pl │ │ lslpl.w r5, r6, r4 │ │ it pl │ │ movpl r0, #0 │ │ orrs r1, r5 │ │ orr.w r9, r9, r0 │ │ cmp r3, #0 │ │ - bmi.n 93694 │ │ + bmi.n 93700 │ │ cmp r2, #63 @ 0x3f │ │ - bhi.n 936e6 │ │ + bhi.n 93752 │ │ uxtb r0, r3 │ │ cmp r0, #64 @ 0x40 │ │ - bcc.n 936e6 │ │ + bcc.n 93752 │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ subs.w r1, r2, #32 │ │ lsl.w r0, r0, r2 │ │ it pl │ │ movpl r0, #0 │ │ orr.w r9, r9, r0 │ │ mov.w lr, #0 │ │ @@ -161969,31 +161884,31 @@ │ │ it pl │ │ lslpl.w r4, r6, ip │ │ it pl │ │ movpl r0, #0 │ │ orrs r1, r4 │ │ orr.w lr, lr, r0 │ │ cmp r5, #0 │ │ - bmi.n 936ee │ │ + bmi.n 9375a │ │ cmp r2, #63 @ 0x3f │ │ - bhi.n 93820 │ │ + bhi.n 9388c │ │ uxtb r0, r5 │ │ cmp r0, #64 @ 0x40 │ │ - bcc.n 93820 │ │ + bcc.n 9388c │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ subs.w r1, r2, #32 │ │ lsl.w r0, r0, r2 │ │ it pl │ │ movpl r0, #0 │ │ orr.w lr, lr, r0 │ │ - b.n 93820 │ │ + b.n 9388c │ │ nop │ │ - strh r6, [r5, #50] @ 0x32 │ │ + strh r2, [r2, #48] @ 0x30 │ │ movs r4, r0 │ │ - strh r4, [r6, #50] @ 0x32 │ │ + strh r0, [r3, #48] @ 0x30 │ │ movs r4, r0 │ │ movs r2, #0 │ │ mov.w fp, #0 │ │ movs r1, #0 │ │ ldrsb.w r0, [r8], #1 │ │ and.w r3, r2, #63 @ 0x3f │ │ rsb r6, r3, #32 │ │ @@ -162005,15 +161920,15 @@ │ │ it pl │ │ lslpl.w r6, r5, r4 │ │ it pl │ │ movpl r3, #0 │ │ orrs r1, r6 │ │ orr.w fp, fp, r3 │ │ cmp r0, #0 │ │ - bmi.n 93754 │ │ + bmi.n 937c0 │ │ movs r2, #0 │ │ mov.w r9, #0 │ │ movs r1, #0 │ │ ldrsb.w r0, [r8], #1 │ │ and.w r3, r2, #63 @ 0x3f │ │ rsb r6, r3, #32 │ │ subs.w r4, r3, #32 │ │ @@ -162024,15 +161939,15 @@ │ │ it pl │ │ lslpl.w r6, r5, r4 │ │ it pl │ │ movpl r3, #0 │ │ orrs r1, r6 │ │ orr.w r9, r9, r3 │ │ cmp r0, #0 │ │ - bmi.n 93790 │ │ + bmi.n 937fc │ │ movs r2, #0 │ │ mov.w lr, #0 │ │ movs r1, #0 │ │ ldrsb.w r0, [r8], #1 │ │ and.w r6, r2, #63 @ 0x3f │ │ rsb r5, r6, #32 │ │ subs.w r3, r6, #32 │ │ @@ -162043,20 +161958,20 @@ │ │ lslpl.w r5, r4, r3 │ │ lsl.w r3, r4, r6 │ │ it pl │ │ movpl r3, #0 │ │ orrs r1, r5 │ │ orr.w lr, lr, r3 │ │ cmp r0, #0 │ │ - bmi.n 937cc │ │ - b.n 93820 │ │ + bmi.n 93838 │ │ + b.n 9388c │ │ ldrsh.w fp, [r8] │ │ ldrsh.w r9, [r8, #2] │ │ ldrsh.w lr, [r8, #4] │ │ - b.n 9381c │ │ + b.n 93888 │ │ ldrh.w lr, [r8, #4] │ │ ldrh.w r9, [r8, #2] │ │ ldrh.w fp, [r8] │ │ add.w r8, r8, #6 │ │ movs r1, #0 │ │ movs r5, #0 │ │ movs r2, #0 │ │ @@ -162071,29 +161986,29 @@ │ │ lslpl.w r6, r4, r0 │ │ lsl.w r0, r4, r3 │ │ it pl │ │ movpl r0, #0 │ │ orrs r2, r6 │ │ orrs r5, r0 │ │ cmp.w ip, #0 │ │ - bmi.n 93826 │ │ + bmi.n 93892 │ │ ldr r1, [sp, #20] │ │ ldr r3, [sp, #16] │ │ add r1, fp │ │ cmp r3, r1 │ │ - bcc.n 93932 │ │ + bcc.n 9399e │ │ add.w r0, r1, r9 │ │ cmp r3, r0 │ │ - bcs.w 935dc │ │ + bcs.w 93648 │ │ cmp.w lr, #0 │ │ - beq.n 9393e │ │ + beq.n 939aa │ │ ldr r0, [sp, #8] │ │ add.w r1, r0, lr │ │ orrs.w r0, r5, r2 │ │ - beq.n 9394a │ │ + beq.n 939b6 │ │ ldr r0, [sp, #12] │ │ mov.w ip, #0 │ │ mov.w lr, #0 │ │ movs r3, #0 │ │ add r0, r5 │ │ subs r6, r0, #1 │ │ ldrsb.w r8, [r6], #1 │ │ @@ -162107,20 +162022,20 @@ │ │ lslpl.w r0, r2, r5 │ │ orr.w lr, lr, r0 │ │ lsl.w r0, r2, r4 │ │ it pl │ │ movpl r0, #0 │ │ orr.w ip, ip, r0 │ │ cmp.w r8, #0 │ │ - bmi.n 93890 │ │ + bmi.n 938fc │ │ cmp r3, #63 @ 0x3f │ │ - bhi.n 938fc │ │ + bhi.n 93968 │ │ uxtb.w r0, r8 │ │ cmp r0, #64 @ 0x40 │ │ - bcc.n 938fc │ │ + bcc.n 93968 │ │ rsb r2, r3, #32 │ │ mov.w r4, #4294967295 @ 0xffffffff │ │ lsl.w r0, r4, r3 │ │ subs r3, #32 │ │ lsr.w r2, r4, r2 │ │ orr.w r2, r2, r0 │ │ it pl │ │ @@ -162163,661 +162078,661 @@ │ │ movs r4, #1 │ │ mov r0, r4 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r0, [r0, #0] │ │ ldr r0, [r0, #0] │ │ - b.w d8748 │ │ + b.w d8758 │ │ ldr r0, [r0, #0] │ │ ldr r0, [r0, #0] │ │ - b.w d8748 │ │ + b.w d8758 │ │ ldr r0, [r0, #0] │ │ ldr r0, [r0, #0] │ │ - b.w d8754 │ │ + b.w d8764 │ │ ldr r0, [r0, #0] │ │ ldr r0, [r0, #0] │ │ - b.w d8754 │ │ - bmi.n 93922 │ │ + b.w d8764 │ │ + bmi.n 9398e │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ ldr r5, [r0, #16] │ │ mov r4, r0 │ │ movs r1, #1 │ │ mov r0, r5 │ │ - blx d8840 │ │ + blx d8850 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r5 │ │ movs r1, #0 │ │ - blx d8840 │ │ - ldr r0, [pc, #40] @ (939c0 ) │ │ + blx d8850 │ │ + ldr r0, [pc, #40] @ (93a2c ) │ │ add r0, pc │ │ ldr r0, [r0, #0] │ │ dmb ish │ │ - cbnz r0, 939aa │ │ - ldr r0, [pc, #32] @ (939c4 ) │ │ + cbnz r0, 93a16 │ │ + ldr r0, [pc, #32] @ (93a30 ) │ │ add r0, pc │ │ - bl 7740c │ │ + bl 77474 │ │ movs r1, #1 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w d8718 │ │ - bl 77544 │ │ + b.w d8728 │ │ + bl 775ac │ │ udf #254 @ 0xfe │ │ - bl 416fe │ │ + bl 41a06 │ │ nop │ │ - add r5, pc, #16 @ (adr r5, 939d4 ) │ │ + add r4, pc, #672 @ (adr r4, 93cd0 ) │ │ movs r4, r0 │ │ - add r4, pc, #992 @ (adr r4, 93da8 ) │ │ + add r4, pc, #624 @ (adr r4, 93ca4 ) │ │ movs r4, r0 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ ldr r5, [r0, #4] │ │ mov r4, r0 │ │ movs r1, #1 │ │ mov r0, r5 │ │ - blx d8840 │ │ + blx d8850 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r5 │ │ movs r1, #0 │ │ - blx d8840 │ │ - ldr r0, [pc, #40] @ (93a10 ) │ │ + blx d8850 │ │ + ldr r0, [pc, #40] @ (93a7c ) │ │ add r0, pc │ │ ldr r0, [r0, #0] │ │ dmb ish │ │ - cbnz r0, 939fa │ │ - ldr r0, [pc, #32] @ (93a14 ) │ │ + cbnz r0, 93a66 │ │ + ldr r0, [pc, #32] @ (93a80 ) │ │ add r0, pc │ │ - bl 7740c │ │ + bl 77474 │ │ movs r1, #1 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w d8718 │ │ - bl 77544 │ │ + b.w d8728 │ │ + bl 775ac │ │ udf #254 @ 0xfe │ │ - bl 416fe │ │ + bl 41a06 │ │ nop │ │ - add r4, pc, #720 @ (adr r4, 93ce4 ) │ │ + add r4, pc, #352 @ (adr r4, 93be0 ) │ │ movs r4, r0 │ │ - add r4, pc, #672 @ (adr r4, 93cb8 ) │ │ + add r4, pc, #304 @ (adr r4, 93bb4 ) │ │ movs r4, r0 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ ldr r4, [r0, #4] │ │ mov r5, r0 │ │ movs r1, #1 │ │ mov r0, r4 │ │ - blx d8840 │ │ + blx d8850 │ │ ldr r0, [r5, #0] │ │ - cbz r0, 93a4c │ │ + cbz r0, 93ab8 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 93a30 │ │ + bne.n 93a9c │ │ cmp r1, #1 │ │ - bne.n 93a4c │ │ + bne.n 93ab8 │ │ dmb ish │ │ ldr r0, [r5, #0] │ │ - bl 93a8c │ │ + bl 93af8 │ │ mov r0, r5 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ movs r1, #0 │ │ - blx d8840 │ │ - ldr r0, [pc, #40] @ (93a84 ) │ │ + blx d8850 │ │ + ldr r0, [pc, #40] @ (93af0 ) │ │ add r0, pc │ │ ldr r0, [r0, #0] │ │ dmb ish │ │ - cbnz r0, 93a6e │ │ - ldr r0, [pc, #32] @ (93a88 ) │ │ + cbnz r0, 93ada │ │ + ldr r0, [pc, #32] @ (93af4 ) │ │ add r0, pc │ │ - bl 7740c │ │ + bl 77474 │ │ movs r1, #1 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w d8718 │ │ - bl 77544 │ │ + b.w d8728 │ │ + bl 775ac │ │ udf #254 @ 0xfe │ │ - bl 416fe │ │ + bl 41a06 │ │ nop │ │ - add r4, pc, #256 @ (adr r4, 93b88 ) │ │ + add r3, pc, #912 @ (adr r3, 93e84 ) │ │ movs r4, r0 │ │ - add r4, pc, #208 @ (adr r4, 93b5c ) │ │ + add r3, pc, #864 @ (adr r3, 93e58 ) │ │ movs r4, r0 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ ldr r0, [r0, #8] │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 93a98 │ │ + bne.n 93b04 │ │ cmp r1, #1 │ │ - bne.n 93ab4 │ │ + bne.n 93b20 │ │ dmb ish │ │ ldr r0, [r4, #8] │ │ - bl 77604 │ │ + bl 7766c │ │ adds r0, r4, #1 │ │ - beq.n 93ae0 │ │ + beq.n 93b4c │ │ adds r0, r4, #4 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 93abe │ │ + bne.n 93b2a │ │ cmp r1, #1 │ │ it ne │ │ popne {r4, r6, r7, pc} │ │ dmb ish │ │ mov r0, r4 │ │ ldmia.w sp!, {r4, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ pop {r4, r6, r7, pc} │ │ - bmi.n 93a8e │ │ + bmi.n 93afa │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ ldr r4, [r0, #4] │ │ mov r5, r0 │ │ movs r1, #1 │ │ mov r0, r4 │ │ - blx d8840 │ │ + blx d8850 │ │ str r5, [sp, #4] │ │ add r0, sp, #4 │ │ - bl 93b38 │ │ + bl 93ba4 │ │ mov r0, r4 │ │ movs r1, #0 │ │ - blx d8840 │ │ - ldr r0, [pc, #40] @ (93b30 ) │ │ + blx d8850 │ │ + ldr r0, [pc, #40] @ (93b9c ) │ │ add r0, pc │ │ ldr r0, [r0, #0] │ │ dmb ish │ │ - cbnz r0, 93b1a │ │ - ldr r0, [pc, #32] @ (93b34 ) │ │ + cbnz r0, 93b86 │ │ + ldr r0, [pc, #32] @ (93ba0 ) │ │ add r0, pc │ │ - bl 7740c │ │ + bl 77474 │ │ movs r1, #1 │ │ - blx d8840 │ │ + blx d8850 │ │ add sp, #8 │ │ pop {r4, r5, r7, pc} │ │ - bl 77544 │ │ + bl 775ac │ │ udf #254 @ 0xfe │ │ - bl 416fe │ │ + bl 41a06 │ │ nop │ │ - add r3, pc, #592 @ (adr r3, 93d84 ) │ │ + add r3, pc, #224 @ (adr r3, 93c80 ) │ │ movs r4, r0 │ │ - add r3, pc, #544 @ (adr r3, 93d58 ) │ │ + add r3, pc, #176 @ (adr r3, 93c54 ) │ │ movs r4, r0 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ ldr r4, [r0, #0] │ │ mov r5, r0 │ │ mov r0, r4 │ │ - bl 93ba4 │ │ + bl 93c10 │ │ ldr r0, [r4, #0] │ │ - cbz r0, 93b6a │ │ + cbz r0, 93bd6 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 93b4e │ │ + bne.n 93bba │ │ cmp r1, #1 │ │ - bne.n 93b6a │ │ + bne.n 93bd6 │ │ dmb ish │ │ mov r0, r4 │ │ - bl 93c5c │ │ + bl 93cc8 │ │ ldr r0, [r5, #0] │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w d870c │ │ - bl 70e9c │ │ + b.w d871c │ │ + bl 70f50 │ │ ldr r0, [r4, #0] │ │ - cbz r0, 93b9c │ │ + cbz r0, 93c08 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 93b80 │ │ + bne.n 93bec │ │ cmp r1, #1 │ │ - bne.n 93b9c │ │ + bne.n 93c08 │ │ dmb ish │ │ mov r0, r4 │ │ - bl 93c5c │ │ - bl 70e9c │ │ - bl 416fe │ │ + bl 93cc8 │ │ + bl 70f50 │ │ + bl 41a06 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #8 │ │ ldr r6, [r0, #0] │ │ movs r1, #0 │ │ str r1, [r0, #0] │ │ - cbz r6, 93c1a │ │ + cbz r6, 93c86 │ │ mov r0, r6 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 93bbc │ │ + bne.n 93c28 │ │ cmp r1, #1 │ │ - bne.n 93c1a │ │ + bne.n 93c86 │ │ dmb ish │ │ adds r1, r0, #1 │ │ ldrd r9, r5, [r0, #8] │ │ ldr r6, [r0, #16] │ │ - beq.n 93bfc │ │ + beq.n 93c68 │ │ adds r1, r0, #4 │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r4, r3, [r1] │ │ cmp r4, #0 │ │ - bne.n 93be2 │ │ + bne.n 93c4e │ │ cmp r2, #1 │ │ itt eq │ │ dmbeq ish │ │ - blxeq d87c0 │ │ + blxeq d87d0 │ │ cmp.w r9, #0 │ │ - beq.n 93c1a │ │ + beq.n 93c86 │ │ ldr r1, [r5, #0] │ │ str r6, [sp, #4] │ │ - cbz r1, 93c0c │ │ + cbz r1, 93c78 │ │ mov r0, r9 │ │ blx r1 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ - beq.n 93bb4 │ │ + beq.n 93c20 │ │ mov r0, r9 │ │ - blx d87c0 │ │ - b.n 93bb4 │ │ + blx d87d0 │ │ + b.n 93c20 │ │ add sp, #8 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r8, r0 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r9 │ │ - blxne d87c0 │ │ - cbz r6, 93c52 │ │ + blxne d87d0 │ │ + cbz r6, 93cbe │ │ dmb ish │ │ ldrex r0, [r6] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r6] │ │ cmp r2, #0 │ │ - bne.n 93c36 │ │ + bne.n 93ca2 │ │ cmp r0, #1 │ │ - bne.n 93c52 │ │ + bne.n 93cbe │ │ dmb ish │ │ add r0, sp, #4 │ │ - bl 93c5c │ │ + bl 93cc8 │ │ mov r0, r8 │ │ - blx d6dd0 │ │ - bl 416fe │ │ + blx d6de0 │ │ + bl 41a06 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ ldr r4, [r0, #0] │ │ ldrd r6, r5, [r4, #8] │ │ ldr r1, [r5, #0] │ │ - cbz r1, 93c72 │ │ + cbz r1, 93cde │ │ mov r0, r6 │ │ blx r1 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ ldr.w r1, [r0, #16]! │ │ - cbz r1, 93ca4 │ │ + cbz r1, 93d10 │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r6, r3, [r1] │ │ cmp r6, #0 │ │ - bne.n 93c8a │ │ + bne.n 93cf6 │ │ cmp r2, #1 │ │ - bne.n 93ca4 │ │ + bne.n 93d10 │ │ dmb ish │ │ - bl 93c5c │ │ + bl 93cc8 │ │ adds r0, r4, #1 │ │ - beq.n 93cd2 │ │ + beq.n 93d3e │ │ adds r0, r4, #4 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 93cae │ │ + bne.n 93d1a │ │ cmp r1, #1 │ │ - bne.n 93cd2 │ │ + bne.n 93d3e │ │ dmb ish │ │ mov r0, r4 │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ mov r8, r0 │ │ - b.n 93d10 │ │ + b.n 93d7c │ │ mov r8, r0 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ ldr.w r1, [r0, #16]! │ │ - cbz r1, 93d10 │ │ + cbz r1, 93d7c │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r6, r3, [r1] │ │ cmp r6, #0 │ │ - bne.n 93cf6 │ │ + bne.n 93d62 │ │ cmp r2, #1 │ │ - bne.n 93d10 │ │ + bne.n 93d7c │ │ dmb ish │ │ - bl 93c5c │ │ + bl 93cc8 │ │ adds r0, r4, #1 │ │ - beq.n 93d36 │ │ + beq.n 93da2 │ │ adds r0, r4, #4 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 93d1a │ │ + bne.n 93d86 │ │ cmp r1, #1 │ │ - bne.n 93d36 │ │ + bne.n 93da2 │ │ mov r0, r4 │ │ dmb ish │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r8 │ │ - blx d6dd0 │ │ - bl 416fe │ │ + blx d6de0 │ │ + bl 41a06 │ │ push {r7, lr} │ │ mov r7, sp │ │ - bl 773ce │ │ + bl 77436 │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #16 │ │ ldrd r1, r2, [r0] │ │ str r0, [sp, #12] │ │ add r0, sp, #4 │ │ strd r1, r2, [sp, #4] │ │ - bl 93d5e │ │ + bl 93dca │ │ push {r7, lr} │ │ mov r7, sp │ │ - bl 93d68 │ │ - bmi.n 93d12 │ │ + bl 93dd4 │ │ + bmi.n 93d7e │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ ldr r1, [r0, #0] │ │ ldr.w ip, [r1, #4] │ │ movs.w r2, ip, lsl #31 │ │ - bne.n 93d98 │ │ + bne.n 93e04 │ │ ldrd r2, r4, [r0, #4] │ │ - ldr r1, [pc, #84] @ (93dd4 ) │ │ + ldr r1, [pc, #84] @ (93e40 ) │ │ str r0, [sp, #20] │ │ ldrb r0, [r4, #9] │ │ add r1, pc │ │ ldrb r3, [r4, #8] │ │ mov.w r4, #2147483648 @ 0x80000000 │ │ str r4, [sp, #8] │ │ str r0, [sp, #0] │ │ add r0, sp, #8 │ │ - bl 76cb4 │ │ + bl 76d1c │ │ udf #254 @ 0xfe │ │ ldr.w lr, [r1] │ │ mov.w r4, ip, lsr #1 │ │ ldrd r2, r0, [r0, #4] │ │ - ldr r1, [pc, #48] @ (93dd8 ) │ │ + ldr r1, [pc, #48] @ (93e44 ) │ │ ldrb r3, [r0, #8] │ │ ldrb r0, [r0, #9] │ │ add r1, pc │ │ str r0, [sp, #0] │ │ add r0, sp, #8 │ │ strd lr, r4, [sp, #8] │ │ - bl 76cb4 │ │ + bl 76d1c │ │ ldr r1, [sp, #8] │ │ lsls r1, r1, #1 │ │ - bne.n 93dc2 │ │ - blx d6dd0 │ │ + bne.n 93e2e │ │ + blx d6de0 │ │ ldr r1, [sp, #12] │ │ mov r4, r0 │ │ mov r0, r1 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ nop │ │ - ldrb r4, [r3, #29] │ │ + ldrb r0, [r0, #28] │ │ movs r4, r0 │ │ - ldrb r2, [r3, #28] │ │ + ldrb r6, [r7, #26] │ │ movs r4, r0 │ │ ldr r1, [r0, #0] │ │ lsls r1, r1, #1 │ │ it eq │ │ bxeq lr │ │ ldr r0, [r0, #4] │ │ - b.w d870c │ │ + b.w d871c │ │ ldr r2, [r0, #0] │ │ cmp.w r2, #2147483648 @ 0x80000000 │ │ - bne.n 93e02 │ │ + bne.n 93e6e │ │ ldr r0, [r0, #12] │ │ ldr r2, [r0, #0] │ │ ldrd r0, r1, [r1] │ │ ldrd r2, r3, [r2] │ │ - b.w 3ef94 │ │ + b.w 3f29c │ │ ldrd ip, r3, [r1] │ │ ldrd r1, r2, [r0, #4] │ │ ldr r3, [r3, #12] │ │ mov r0, ip │ │ bx r3 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #32 │ │ ldr r6, [r0, #0] │ │ mov r5, r0 │ │ cmp.w r6, #2147483648 @ 0x80000000 │ │ - bne.n 93e4e │ │ + bne.n 93eba │ │ ldr r0, [r5, #12] │ │ movs r1, #0 │ │ movs r2, #1 │ │ str r1, [sp, #24] │ │ strd r1, r2, [sp, #16] │ │ ldr r0, [r0, #0] │ │ ldrd r2, r3, [r0] │ │ - ldr r1, [pc, #100] @ (93e9c ) │ │ + ldr r1, [pc, #100] @ (93f08 ) │ │ add r1, pc │ │ add r0, sp, #16 │ │ - bl 3ef94 │ │ + bl 3f29c │ │ add r2, sp, #16 │ │ ldmia r2, {r0, r1, r2} │ │ stmia.w r5, {r0, r1, r2} │ │ ldr r6, [r5, #0] │ │ stmia.w sp, {r0, r1, r2} │ │ movs r0, #0 │ │ movs r1, #1 │ │ ldrd r8, r4, [r5, #4] │ │ strd r0, r1, [r5] │ │ str r0, [r5, #8] │ │ movs r0, #12 │ │ - blx d87f0 │ │ - cbz r0, 93e76 │ │ - ldr r1, [pc, #56] @ (93ea0 ) │ │ + blx d8810 │ │ + cbz r0, 93ee2 │ │ + ldr r1, [pc, #56] @ (93f0c ) │ │ strd r6, r8, [r0] │ │ add r1, pc │ │ str r4, [r0, #8] │ │ add sp, #32 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #4 │ │ movs r1, #12 │ │ - bl 3de2a │ │ + bl 3e132 │ │ udf #254 @ 0xfe │ │ ldr r1, [sp, #16] │ │ - cbz r1, 93e96 │ │ + cbz r1, 93f02 │ │ ldr.w r8, [sp, #20] │ │ - b.n 93e8c │ │ - cbz r6, 93e96 │ │ + b.n 93ef8 │ │ + cbz r6, 93f02 │ │ mov r4, r0 │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ nop │ │ - ldrb r4, [r6, #25] │ │ + ldrb r0, [r3, #24] │ │ movs r4, r0 │ │ - strh r6, [r7, #4] │ │ + strh r2, [r4, #2] │ │ movs r4, r0 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #32 │ │ ldr r1, [r0, #0] │ │ cmp.w r1, #2147483648 @ 0x80000000 │ │ - bne.n 93edc │ │ + bne.n 93f48 │ │ mov r4, r0 │ │ ldr r0, [r0, #12] │ │ movs r1, #0 │ │ movs r2, #1 │ │ str r1, [sp, #24] │ │ strd r1, r2, [sp, #16] │ │ ldr r0, [r0, #0] │ │ ldrd r2, r3, [r0] │ │ - ldr r1, [pc, #48] @ (93ef8 ) │ │ + ldr r1, [pc, #48] @ (93f64 ) │ │ add r1, pc │ │ add r0, sp, #16 │ │ - bl 3ef94 │ │ + bl 3f29c │ │ add r3, sp, #16 │ │ mov r0, r4 │ │ ldmia r3, {r1, r2, r3} │ │ stmia.w sp, {r1, r2, r3} │ │ stmia r4!, {r1, r2, r3} │ │ - ldr r1, [pc, #28] @ (93efc ) │ │ + ldr r1, [pc, #28] @ (93f68 ) │ │ add r1, pc │ │ add sp, #32 │ │ pop {r4, r6, r7, pc} │ │ mov r4, r0 │ │ ldr r0, [sp, #16] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #20] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d6dd0 │ │ - ldrb r4, [r4, #23] │ │ + blx d6de0 │ │ + ldrb r0, [r1, #22] │ │ movs r4, r0 │ │ - strh r2, [r1, #2] │ │ + ldrb r6, [r5, #31] │ │ movs r4, r0 │ │ movs r0, #0 │ │ bx lr │ │ ldr r1, [r0, #0] │ │ cmp r1, #0 │ │ itt ne │ │ ldrne r0, [r0, #4] │ │ - bne.w d870c │ │ + bne.w d871c │ │ bx lr │ │ - movw ip, #9574 @ 0x2566 │ │ - movw r2, #50617 @ 0xc5b9 │ │ - movw r3, #5028 @ 0x13a4 │ │ - movw r1, #34390 @ 0x8656 │ │ - movt ip, #52115 @ 0xcb93 │ │ - movt r2, #17825 @ 0x45a1 │ │ - movt r3, #2835 @ 0xb13 │ │ - movt r1, #21060 @ 0x5244 │ │ + movw ip, #48918 @ 0xbf16 │ │ + movw r2, #15858 @ 0x3df2 │ │ + movw r3, #10731 @ 0x29eb │ │ + movw r1, #49478 @ 0xc146 │ │ + movt ip, #25389 @ 0x632d │ │ + movt r2, #39903 @ 0x9bdf │ │ + movt r3, #58959 @ 0xe64f │ │ + movt r1, #16102 @ 0x3ee6 │ │ strd r1, r3, [r0] │ │ strd r2, ip, [r0, #8] │ │ bx lr │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #8 │ │ mov r5, r0 │ │ ldr r0, [r0, #0] │ │ ldr r6, [r5, #8] │ │ mov r4, r2 │ │ subs r0, r0, r6 │ │ cmp r2, r0 │ │ - bhi.n 93f6c │ │ + bhi.n 93fd8 │ │ ldr r0, [r5, #4] │ │ mov r2, r4 │ │ add r0, r6 │ │ - bl d53c6 │ │ + bl d52ea │ │ adds r0, r6, r4 │ │ str r0, [r5, #8] │ │ movs r0, #0 │ │ add sp, #8 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #1 │ │ mov r8, r1 │ │ str r0, [sp, #0] │ │ mov r0, r5 │ │ mov r1, r6 │ │ mov r2, r4 │ │ movs r3, #1 │ │ - bl 77788 │ │ + bl 777f0 │ │ ldr r6, [r5, #8] │ │ mov r1, r8 │ │ - b.n 93f54 │ │ + b.n 93fc0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #8 │ │ ldr r4, [r0, #8] │ │ cmp r1, #128 @ 0x80 │ │ - bcs.n 93f98 │ │ + bcs.n 94004 │ │ movs r5, #1 │ │ - b.n 93fac │ │ + b.n 94018 │ │ cmp.w r1, #2048 @ 0x800 │ │ - bcs.n 93fa2 │ │ + bcs.n 9400e │ │ movs r5, #2 │ │ - b.n 93fac │ │ + b.n 94018 │ │ movs r5, #4 │ │ cmp.w r1, #65536 @ 0x10000 │ │ it cc │ │ movcc r5, #3 │ │ ldr r2, [r0, #0] │ │ subs r2, r2, r4 │ │ cmp r5, r2 │ │ mov r2, r4 │ │ - bhi.n 94020 │ │ + bhi.n 9408c │ │ ldr r3, [r0, #4] │ │ cmp r1, #128 @ 0x80 │ │ add r2, r3 │ │ - bcc.n 94010 │ │ + bcc.n 9407c │ │ movw ip, #65534 @ 0xfffe │ │ mov r6, r1 │ │ movt ip, #1023 @ 0x3ff │ │ mov.w r8, r1, lsr #6 │ │ bfi r6, ip, #6, #26 │ │ cmp.w r1, #2048 @ 0x800 │ │ - bcs.n 93fde │ │ + bcs.n 9404a │ │ strb r6, [r2, #1] │ │ orr.w r1, r8, #192 @ 0xc0 │ │ - b.n 94010 │ │ + b.n 9407c │ │ bfi r8, ip, #6, #26 │ │ mov.w lr, r1, lsr #12 │ │ movs r3, #0 │ │ cmp.w r3, r1, lsr #16 │ │ - bne.n 93ffa │ │ + bne.n 94066 │ │ strb r6, [r2, #2] │ │ orr.w r1, lr, #224 @ 0xe0 │ │ strb.w r8, [r2, #1] │ │ - b.n 94010 │ │ + b.n 9407c │ │ mvn.w r3, #15 │ │ orr.w r1, r3, r1, lsr #18 │ │ bfi lr, ip, #6, #26 │ │ strb r6, [r2, #3] │ │ strb.w r8, [r2, #2] │ │ strb.w lr, [r2, #1] │ │ strb r1, [r2, #0] │ │ @@ -162830,789 +162745,789 @@ │ │ movs r2, #1 │ │ mov r8, r1 │ │ str r2, [sp, #0] │ │ mov r1, r4 │ │ mov r2, r5 │ │ movs r3, #1 │ │ mov r6, r0 │ │ - bl 77788 │ │ + bl 777f0 │ │ ldr r2, [r6, #8] │ │ mov r1, r8 │ │ mov r0, r6 │ │ ldr r3, [r0, #4] │ │ cmp r1, #128 @ 0x80 │ │ add r2, r3 │ │ - bcs.n 93fbe │ │ - b.n 94010 │ │ - bmi.n 93fee │ │ + bcs.n 9402a │ │ + b.n 9407c │ │ + bmi.n 9405a │ │ mov r3, r2 │ │ mov r2, r1 │ │ - ldr r1, [pc, #4] @ (94050 ) │ │ + ldr r1, [pc, #4] @ (940bc ) │ │ add r1, pc │ │ - b.w 3ef94 │ │ - ldrb r2, [r4, #17] │ │ + b.w 3f29c │ │ + ldrb r6, [r0, #16] │ │ movs r4, r0 │ │ ldrd ip, r3, [r1] │ │ ldrd r1, r2, [r0] │ │ ldr r3, [r3, #12] │ │ mov r0, ip │ │ bx r3 │ │ - bmi.n 9400e │ │ + bmi.n 9407a │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ ldrd r4, r5, [r0] │ │ movs r0, #8 │ │ - blx d87f0 │ │ - cbz r0, 9407e │ │ - ldr r1, [pc, #16] @ (94088 ) │ │ + blx d8810 │ │ + cbz r0, 940ea │ │ + ldr r1, [pc, #16] @ (940f4 ) │ │ strd r4, r5, [r0] │ │ add r1, pc │ │ pop {r4, r5, r7, pc} │ │ movs r0, #4 │ │ movs r1, #8 │ │ - bl 3de2a │ │ + bl 3e132 │ │ nop │ │ - ldrb r6, [r7, #24] │ │ + ldrb r2, [r4, #23] │ │ movs r4, r0 │ │ - ldr r1, [pc, #4] @ (94094 ) │ │ + ldr r1, [pc, #4] @ (94100 ) │ │ add r1, pc │ │ bx lr │ │ nop │ │ - ldrb r2, [r5, #24] │ │ + ldrb r6, [r1, #23] │ │ movs r4, r0 │ │ ldrd r0, r1, [r0] │ │ bx lr │ │ push {r7, lr} │ │ mov r7, sp │ │ mov r2, r0 │ │ mov r0, r1 │ │ mov r1, r2 │ │ - bl 940ac │ │ + bl 94118 │ │ push {r7, lr} │ │ mov r7, sp │ │ - bl 940b4 │ │ + bl 94120 │ │ push {r7, lr} │ │ mov r7, sp │ │ - bl 940bc │ │ + bl 94128 │ │ push {r7, lr} │ │ mov r7, sp │ │ - bl 940c8 │ │ - bl 773ce │ │ + bl 94134 │ │ + bl 77436 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #24 │ │ - ldr r6, [pc, #268] @ (941e0 ) │ │ + ldr r6, [pc, #268] @ (9424c ) │ │ movs r0, #1 │ │ add r6, pc │ │ ldrexb r2, [r6] │ │ strexb r3, r0, [r6] │ │ cmp r3, #0 │ │ - bne.n 940d8 │ │ - cbz r2, 9410e │ │ + bne.n 94144 │ │ + cbz r2, 9417a │ │ str r1, [sp, #0] │ │ sub.w r1, r7, #17 │ │ - ldr r0, [pc, #272] @ (94200 ) │ │ + ldr r0, [pc, #272] @ (9426c ) │ │ add r0, pc │ │ str r0, [sp, #16] │ │ mov r0, sp │ │ str r0, [sp, #12] │ │ add r0, sp, #4 │ │ - ldr r2, [pc, #264] @ (94204 ) │ │ + ldr r2, [pc, #264] @ (94270 ) │ │ add r3, sp, #12 │ │ add r2, pc │ │ - bl 772b8 │ │ + bl 77320 │ │ ldr r1, [sp, #8] │ │ ldrb.w r0, [sp, #4] │ │ - bl 77378 │ │ - b.n 941c2 │ │ + bl 773e0 │ │ + b.n 9422e │ │ str r1, [sp, #0] │ │ mov r5, sp │ │ - ldr r0, [pc, #208] @ (941e4 ) │ │ + ldr r0, [pc, #208] @ (94250 ) │ │ sub.w r1, r7, #17 │ │ str r5, [sp, #12] │ │ add r0, pc │ │ str r0, [sp, #16] │ │ add r0, sp, #4 │ │ - ldr r2, [pc, #196] @ (941e8 ) │ │ + ldr r2, [pc, #196] @ (94254 ) │ │ add r3, sp, #12 │ │ add r2, pc │ │ - bl 772b8 │ │ + bl 77320 │ │ ldr r1, [sp, #8] │ │ ldrb.w r0, [sp, #4] │ │ - bl 77378 │ │ - bl 779c4 │ │ + bl 773e0 │ │ + bl 77a2c │ │ and.w r4, r0, #1 │ │ - bl 7764c │ │ + bl 776b4 │ │ uxtb r0, r0 │ │ tbb [pc, r0] │ │ asrs r2, r0, #28 │ │ subs r1, #44 @ 0x2c │ │ movs r0, #0 │ │ strb.w r0, [sp] │ │ - ldr r0, [pc, #152] @ (941ec ) │ │ + ldr r0, [pc, #152] @ (94258 ) │ │ add r0, pc │ │ strd r5, r0, [sp, #12] │ │ add r0, sp, #4 │ │ - ldr r2, [pc, #148] @ (941f0 ) │ │ + ldr r2, [pc, #148] @ (9425c ) │ │ sub.w r1, r7, #17 │ │ add r3, sp, #12 │ │ add r2, pc │ │ - bl 772b8 │ │ + bl 77320 │ │ ldr r1, [sp, #8] │ │ ldrb.w r0, [sp, #4] │ │ - bl 77378 │ │ - b.n 941b8 │ │ + bl 773e0 │ │ + b.n 94224 │ │ movs r0, #1 │ │ strb.w r0, [sp] │ │ - ldr r0, [pc, #120] @ (941f4 ) │ │ + ldr r0, [pc, #120] @ (94260 ) │ │ add r0, pc │ │ strd r5, r0, [sp, #12] │ │ add r0, sp, #4 │ │ - ldr r2, [pc, #112] @ (941f8 ) │ │ + ldr r2, [pc, #112] @ (94264 ) │ │ sub.w r1, r7, #17 │ │ add r3, sp, #12 │ │ add r2, pc │ │ - bl 772b8 │ │ + bl 77320 │ │ ldr r1, [sp, #8] │ │ ldrb.w r0, [sp, #4] │ │ - bl 77378 │ │ - b.n 941b8 │ │ + bl 773e0 │ │ + b.n 94224 │ │ add r0, sp, #12 │ │ - ldr r2, [pc, #88] @ (941fc ) │ │ + ldr r2, [pc, #88] @ (94268 ) │ │ sub.w r1, r7, #17 │ │ movs r3, #157 @ 0x9d │ │ add r2, pc │ │ - bl 772b8 │ │ + bl 77320 │ │ ldr r1, [sp, #16] │ │ ldrb.w r0, [sp, #12] │ │ - bl 77378 │ │ + bl 773e0 │ │ add.w r0, r6, #20 │ │ mov r1, r4 │ │ - bl 77c3c │ │ + bl 77ca4 │ │ add sp, #24 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ mov r5, r0 │ │ add.w r0, r6, #20 │ │ mov r1, r4 │ │ - bl 77c3c │ │ + bl 77ca4 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ - bl 416fe │ │ - add r6, pc, #760 @ (adr r6, 944dc ) │ │ - movs r4, r0 │ │ - stmia r7!, {r0, r1, r2, r4, r6} │ │ - vtrn.32 d20, d31 │ │ - @ instruction: 0xfff73b3b │ │ - vtbl.8 d22, {d30- instruction: 0xfff73b11 │ │ - @ instruction: 0xfffe6a5f │ │ - @ instruction: 0xfff74b9f │ │ - vqneg.s32 d28, d3 │ │ - @ instruction: 0xfffa8bda │ │ + blx d6de0 │ │ + bl 41a06 │ │ + add r6, pc, #456 @ (adr r6, 94418 ) │ │ + movs r4, r0 │ │ + ldmia r1, {r0, r1, r4, r5, r6, r7} │ │ + vmla.i q10, q5, d3[0] │ │ + @ instruction: 0xfff73b37 │ │ + @ instruction: 0xfffe6995 │ │ + vtbl.8 d19, {d7-d10}, d13 │ │ + vtbx.8 d22, {d14-d15}, d27 │ │ + @ instruction: 0xfff74b33 │ │ + vshll.u32 q14, d15, #24 │ │ + vtbx.8 d24, {d10-d13}, d11 │ │ vsli.64 , q0, #55 @ 0x37 │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov ip, r1 │ │ ldr r1, [r1, #8] │ │ lsls r2, r1, #6 │ │ - bmi.n 94240 │ │ + bmi.n 942ac │ │ lsls r1, r1, #5 │ │ - bmi.n 94260 │ │ + bmi.n 942cc │ │ ldrb r3, [r0, #0] │ │ - ldr r4, [pc, #180] @ (942d4 ) │ │ + ldr r4, [pc, #180] @ (94340 ) │ │ cmp r3, #10 │ │ add r4, pc │ │ - bcc.n 9429c │ │ + bcc.n 94308 │ │ movs r0, #41 @ 0x29 │ │ muls r0, r3 │ │ lsrs r2, r0, #12 │ │ movs r0, #100 @ 0x64 │ │ mls r0, r2, r0, r3 │ │ uxtb r0, r0 │ │ ldrh.w r0, [r4, r0, lsl #1] │ │ strh.w r0, [r7, #-12] │ │ movs r0, #1 │ │ - cbnz r3, 942a2 │ │ - b.n 942a4 │ │ + cbnz r3, 9430e │ │ + b.n 94310 │ │ ldrb r2, [r0, #0] │ │ sub.w r0, r7, #15 │ │ - ldr r4, [pc, #144] @ (942d8 ) │ │ + ldr r4, [pc, #144] @ (94344 ) │ │ movs r1, #1 │ │ add r4, pc │ │ mov r3, r1 │ │ and.w r1, r2, #15 │ │ lsrs r2, r2, #4 │ │ ldrb r1, [r4, r1] │ │ strb r1, [r0, r3] │ │ sub.w r1, r3, #1 │ │ - bne.n 9424c │ │ - b.n 9427e │ │ + bne.n 942b8 │ │ + b.n 942ea │ │ ldrb r2, [r0, #0] │ │ sub.w r0, r7, #10 │ │ - ldr r4, [pc, #116] @ (942dc ) │ │ + ldr r4, [pc, #116] @ (94348 ) │ │ movs r1, #1 │ │ add r4, pc │ │ mov r3, r1 │ │ and.w r1, r2, #15 │ │ lsrs r2, r2, #4 │ │ ldrb r1, [r4, r1] │ │ strb r1, [r0, r3] │ │ sub.w r1, r3, #1 │ │ - bne.n 9426c │ │ + bne.n 942d8 │ │ adds r1, r3, #1 │ │ - ldr r2, [pc, #92] @ (942e0 ) │ │ + ldr r2, [pc, #92] @ (9434c ) │ │ rsb r1, r1, #3 │ │ add r0, r3 │ │ add r2, pc │ │ movs r3, #2 │ │ strd r0, r1, [sp] │ │ mov r0, ip │ │ movs r1, #1 │ │ - bl 3f0a0 │ │ + bl 3f3a8 │ │ add sp, #16 │ │ pop {r4, r6, r7, pc} │ │ movs r0, #3 │ │ mov r2, r3 │ │ - cbz r3, 942a4 │ │ - cbz r2, 942b6 │ │ + cbz r3, 94310 │ │ + cbz r2, 94322 │ │ and.w r1, r2, #127 @ 0x7f │ │ subs r0, #1 │ │ sub.w r2, r7, #13 │ │ add.w r1, r4, r1, lsl #1 │ │ ldrb r1, [r1, #1] │ │ strb r1, [r2, r0] │ │ rsb r1, r0, #3 │ │ sub.w r2, r7, #13 │ │ add r0, r2 │ │ movs r2, #1 │ │ strd r0, r1, [sp] │ │ mov r0, ip │ │ movs r1, #1 │ │ movs r3, #0 │ │ - bl 3f0a0 │ │ + bl 3f3a8 │ │ add sp, #16 │ │ pop {r4, r6, r7, pc} │ │ - stmia r5!, {r2, r3, r4} │ │ - vqneg.s32 q15, q1 │ │ - vcvt.f16.u16 q15, q1 │ │ - vcvta.s16.f16 , │ │ + stmia r4!, {r4, r5, r7} │ │ + vqshl.u32 q15, q3, #24 │ │ + vqshlu.s32 q15, q3, #23 │ │ + vqrdmlsh.s q9, , d16[0] │ │ vtbl.8 d22, {d8}, d1 │ │ cmp r1, #0 │ │ itt ne │ │ ldrne r0, [r0, #4] │ │ - bne.w d870c │ │ + bne.w d871c │ │ bx lr │ │ - bmi.n 9429e │ │ + bmi.n 9430a │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov ip, r1 │ │ - ldr r1, [pc, #32] @ (94320 ) │ │ - ldr r3, [pc, #36] @ (94324 ) │ │ + ldr r1, [pc, #32] @ (9438c ) │ │ + ldr r3, [pc, #36] @ (94390 ) │ │ add r2, sp, #12 │ │ - ldr r4, [pc, #36] @ (94328 ) │ │ + ldr r4, [pc, #36] @ (94394 ) │ │ add r1, pc │ │ add r3, pc │ │ str r0, [sp, #12] │ │ add r4, pc │ │ strd r2, r4, [sp] │ │ add.w r2, r0, #12 │ │ mov r0, ip │ │ - bl 40df8 │ │ + bl 41100 │ │ add sp, #16 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ - movs r0, #132 @ 0x84 │ │ + movs r0, #24 │ │ vsra.u32 q8, , #8 │ │ movs r0, r0 │ │ movs r7, r3 │ │ movs r0, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #36 @ 0x24 │ │ mov fp, r1 │ │ ldr r1, [r0, #0] │ │ ldrd r0, r2, [fp] │ │ ldr r3, [r2, #12] │ │ movs r2, #1 │ │ ldrd r5, r6, [r1, #4] │ │ - ldr r1, [pc, #288] @ (94468 ) │ │ + ldr r1, [pc, #288] @ (944d4 ) │ │ add r1, pc │ │ blx r3 │ │ cmp r6, #0 │ │ - beq.n 94446 │ │ - cbz r0, 94356 │ │ + beq.n 944b2 │ │ + cbz r0, 943c2 │ │ movs r0, #1 │ │ - b.n 943c2 │ │ + b.n 9442e │ │ ldrb.w r0, [fp, #10] │ │ lsls r0, r0, #24 │ │ - bmi.n 94368 │ │ + bmi.n 943d4 │ │ mov r0, r5 │ │ mov r1, fp │ │ - bl 94208 │ │ - b.n 943c2 │ │ + bl 94274 │ │ + b.n 9442e │ │ ldrd r8, r9, [fp] │ │ movs r2, #1 │ │ ldr.w r3, [r9, #12] │ │ mov.w sl, #1 │ │ - ldr r1, [pc, #244] @ (9446c ) │ │ + ldr r1, [pc, #244] @ (944d8 ) │ │ mov r0, r8 │ │ add r1, pc │ │ blx r3 │ │ mov r1, r0 │ │ mov r0, sl │ │ - cbnz r1, 943c2 │ │ - ldr r1, [pc, #232] @ (94470 ) │ │ + cbnz r1, 9442e │ │ + ldr r1, [pc, #232] @ (944dc ) │ │ sub.w r2, r7, #45 @ 0x2d │ │ str r2, [sp, #12] │ │ add r1, pc │ │ str r1, [sp, #24] │ │ add r1, sp, #4 │ │ strb.w r0, [r7, #-45] │ │ ldrd r0, r2, [fp, #8] │ │ str r1, [sp, #20] │ │ add r1, sp, #20 │ │ strd r0, r2, [sp, #28] │ │ mov r0, r5 │ │ str.w r9, [sp, #8] │ │ str.w r8, [sp, #4] │ │ - bl 94208 │ │ + bl 94274 │ │ cmp r0, #0 │ │ - bne.n 94352 │ │ + bne.n 943be │ │ ldrd r0, r1, [sp, #20] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #180] @ (94474 ) │ │ + ldr r1, [pc, #180] @ (944e0 ) │ │ add r1, pc │ │ blx r3 │ │ subs r6, #1 │ │ - beq.n 94446 │ │ - ldr r1, [pc, #176] @ (94478 ) │ │ + beq.n 944b2 │ │ + ldr r1, [pc, #176] @ (944e4 ) │ │ adds r5, #1 │ │ add.w r8, sp, #20 │ │ add r1, pc │ │ mov r9, r1 │ │ - ldr r1, [pc, #168] @ (9447c ) │ │ + ldr r1, [pc, #168] @ (944e8 ) │ │ add r1, pc │ │ mov sl, r1 │ │ - b.n 943e2 │ │ + b.n 9444e │ │ movs r0, #1 │ │ adds r5, #1 │ │ subs r6, #1 │ │ - beq.n 94446 │ │ + beq.n 944b2 │ │ lsls r0, r0, #31 │ │ - bne.n 943da │ │ + bne.n 94446 │ │ ldrb.w r0, [fp, #10] │ │ lsls r0, r0, #24 │ │ - bmi.n 94408 │ │ + bmi.n 94474 │ │ ldrd r0, r1, [fp] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ mov r1, r9 │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.n 943da │ │ + bne.n 94446 │ │ mov r0, r5 │ │ mov r1, fp │ │ - bl 94208 │ │ - b.n 943dc │ │ + bl 94274 │ │ + b.n 94448 │ │ ldmia.w fp, {r0, r1, r2, r3} │ │ movs r4, #1 │ │ add.w ip, sp, #4 │ │ strb.w r4, [r7, #-45] │ │ sub.w r4, r7, #45 @ 0x2d │ │ stmia.w ip, {r0, r1, r4} │ │ add r0, sp, #4 │ │ mov r1, r8 │ │ str r0, [sp, #20] │ │ mov r0, r5 │ │ str.w sl, [sp, #24] │ │ strd r2, r3, [sp, #28] │ │ - bl 94208 │ │ + bl 94274 │ │ cmp r0, #0 │ │ - bne.n 943da │ │ + bne.n 94446 │ │ ldrd r0, r1, [sp, #20] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #64] @ (94480 ) │ │ + ldr r1, [pc, #64] @ (944ec ) │ │ add r1, pc │ │ blx r3 │ │ - b.n 943dc │ │ - cbz r0, 94452 │ │ + b.n 94448 │ │ + cbz r0, 944be │ │ movs r0, #1 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrd r0, r1, [fp] │ │ movs r2, #1 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #40] @ (94484 ) │ │ + ldr r1, [pc, #40] @ (944f0 ) │ │ add r1, pc │ │ blx r3 │ │ add sp, #36 @ 0x24 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - cmp r7, #49 @ 0x31 │ │ - vrshr.u64 d20, d0, #8 │ │ - vrshr.u64 d22, d0, #8 │ │ + cmp r6, #196 @ 0xc4 │ │ + vpaddl.s32 d20, d20 │ │ + vrshr.u32 d22, d20, #8 │ │ movs r4, r0 │ │ - b.n 94154 │ │ - vshr.u32 d19, d3, #9 │ │ - vpaddl.s32 q11, q4 │ │ + b.n 940e8 │ │ + @ instruction: 0xfff72fa6 │ │ + @ instruction: 0xfff861ec │ │ movs r4, r0 │ │ - b.n 9405c │ │ - vcvt.f32.u32 d18, d14, #9 │ │ + b.n 93ff0 │ │ + @ instruction: 0xfff72db1 │ │ vsli.64 d27, d16, #56 @ 0x38 │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ mov r4, r1 │ │ ldr r1, [r1, #8] │ │ lsls r2, r1, #6 │ │ - bmi.n 944b2 │ │ + bmi.n 9451e │ │ lsls r1, r1, #5 │ │ - bmi.n 944d2 │ │ + bmi.n 9453e │ │ sub.w r5, r7, #18 │ │ ldr r0, [r0, #0] │ │ mov r1, r5 │ │ - bl 40458 │ │ + bl 40760 │ │ rsb r1, r0, #10 │ │ add r0, r5 │ │ movs r2, #1 │ │ movs r3, #0 │ │ - b.n 944fe │ │ + b.n 9456a │ │ ldr r1, [r0, #0] │ │ sub.w r0, r7, #18 │ │ - ldr r2, [pc, #84] @ (94510 ) │ │ + ldr r2, [pc, #84] @ (9457c ) │ │ movs r5, #7 │ │ add r2, pc │ │ mov r3, r5 │ │ and.w r5, r1, #15 │ │ lsrs r1, r1, #4 │ │ ldrb r5, [r2, r5] │ │ strb r5, [r0, r3] │ │ sub.w r5, r3, #1 │ │ - bne.n 944be │ │ - b.n 944f0 │ │ + bne.n 9452a │ │ + b.n 9455c │ │ ldr r1, [r0, #0] │ │ sub.w r0, r7, #18 │ │ - ldr r2, [pc, #56] @ (94514 ) │ │ + ldr r2, [pc, #56] @ (94580 ) │ │ movs r5, #7 │ │ add r2, pc │ │ mov r3, r5 │ │ and.w r5, r1, #15 │ │ lsrs r1, r1, #4 │ │ ldrb r5, [r2, r5] │ │ strb r5, [r0, r3] │ │ sub.w r5, r3, #1 │ │ - bne.n 944de │ │ + bne.n 9454a │ │ adds r1, r3, #1 │ │ - ldr r2, [pc, #36] @ (94518 ) │ │ + ldr r2, [pc, #36] @ (94584 ) │ │ rsb r1, r1, #9 │ │ add r0, r3 │ │ add r2, pc │ │ movs r3, #2 │ │ strd r0, r1, [sp] │ │ mov r0, r4 │ │ movs r1, #1 │ │ - bl 3f0a0 │ │ + bl 3f3a8 │ │ add sp, #24 │ │ pop {r4, r5, r7, pc} │ │ nop │ │ - b.n 93fb4 │ │ - vsri.32 q15, q0, #9 │ │ - @ instruction: 0xfff72ddb │ │ + b.n 93f48 │ │ + vcvtm.u16.f16 q15, q10 │ │ + vqrdmulh.s q9, , d30[0] │ │ vsli.64 , q8, #56 @ 0x38 │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #16 │ │ mov r6, r0 │ │ mov r0, sp │ │ mov r8, r3 │ │ - bl 3edda │ │ + bl 3f0e2 │ │ ldr r0, [sp, #0] │ │ cmp.w r0, #2147483648 @ 0x80000000 │ │ - bne.n 94552 │ │ + bne.n 945be │ │ ldrd r4, r5, [sp, #4] │ │ ldr.w ip, [r7, #8] │ │ mov r0, r6 │ │ mov r1, r8 │ │ mov r2, r4 │ │ mov r3, r5 │ │ blx ip │ │ movs r0, #0 │ │ strb r0, [r4, #0] │ │ - cbnz r5, 94562 │ │ - b.n 94572 │ │ - ldr r1, [pc, #60] @ (94590 ) │ │ + cbnz r5, 945ce │ │ + b.n 945de │ │ + ldr r1, [pc, #60] @ (945fc ) │ │ add r1, pc │ │ ldrd r1, r2, [r1] │ │ strd r1, r2, [r6] │ │ - cbz r0, 94572 │ │ + cbz r0, 945de │ │ ldr r4, [sp, #4] │ │ mov r0, r4 │ │ add sp, #16 │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #16 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ mov r6, r0 │ │ movs r0, #0 │ │ cmp r5, #0 │ │ strb r0, [r4, #0] │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r6 │ │ - blx d6dd0 │ │ - strb r0, [r2, #25] │ │ + blx d6de0 │ │ + strb r4, [r6, #23] │ │ movs r4, r0 │ │ push {r7, lr} │ │ mov lr, r1 │ │ - ldr r1, [pc, #28] @ (945b8 ) │ │ - ldr r3, [pc, #32] @ (945bc ) │ │ + ldr r1, [pc, #28] @ (94624 ) │ │ + ldr r3, [pc, #32] @ (94628 ) │ │ uxtb r0, r0 │ │ add r1, pc │ │ ldr.w ip, [r2, #12] │ │ add r3, pc │ │ ldr.w r1, [r1, r0, lsl #2] │ │ ldr.w r3, [r3, r0, lsl #2] │ │ mov r0, lr │ │ mov r2, r3 │ │ ldmia.w sp!, {r7, lr} │ │ bx ip │ │ - ldrb r6, [r7, #20] │ │ + ldrb r2, [r4, #19] │ │ movs r4, r0 │ │ - stmia r3!, {r3, r4, r6, r7} │ │ + stmia r3!, {r2, r3, r5, r6} │ │ vsli.64 , q8, #56 @ 0x38 │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #24 │ │ mov r4, r1 │ │ ldr r1, [r1, #8] │ │ lsls r2, r1, #6 │ │ - bmi.n 9460a │ │ + bmi.n 94676 │ │ lsls r1, r1, #5 │ │ - bmi.n 9462a │ │ + bmi.n 94696 │ │ ldr r6, [r0, #0] │ │ sub.w r5, r7, #26 │ │ mov r1, r5 │ │ cmp r6, #0 │ │ mov r0, r6 │ │ it mi │ │ negmi r0, r6 │ │ - bl 40458 │ │ + bl 40760 │ │ rsb r1, r0, #10 │ │ add r0, r5 │ │ movs r2, #1 │ │ movs r3, #0 │ │ strd r0, r1, [sp] │ │ mvns r0, r6 │ │ lsrs r1, r0, #31 │ │ mov r0, r4 │ │ - bl 3f0a0 │ │ + bl 3f3a8 │ │ add sp, #24 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r1, [r0, #0] │ │ sub.w r0, r7, #26 │ │ - ldr r2, [pc, #88] @ (9466c ) │ │ + ldr r2, [pc, #88] @ (946d8 ) │ │ movs r6, #7 │ │ add r2, pc │ │ mov r3, r6 │ │ and.w r6, r1, #15 │ │ lsrs r1, r1, #4 │ │ ldrb r6, [r2, r6] │ │ strb r6, [r0, r3] │ │ sub.w r6, r3, #1 │ │ - bne.n 94616 │ │ - b.n 94648 │ │ + bne.n 94682 │ │ + b.n 946b4 │ │ ldr r1, [r0, #0] │ │ sub.w r0, r7, #26 │ │ - ldr r2, [pc, #60] @ (94670 ) │ │ + ldr r2, [pc, #60] @ (946dc ) │ │ movs r6, #7 │ │ add r2, pc │ │ mov r3, r6 │ │ and.w r6, r1, #15 │ │ lsrs r1, r1, #4 │ │ ldrb r6, [r2, r6] │ │ strb r6, [r0, r3] │ │ sub.w r6, r3, #1 │ │ - bne.n 94636 │ │ + bne.n 946a2 │ │ adds r1, r3, #1 │ │ - ldr r2, [pc, #40] @ (94674 ) │ │ + ldr r2, [pc, #40] @ (946e0 ) │ │ rsb r1, r1, #9 │ │ add r0, r3 │ │ add r2, pc │ │ movs r3, #2 │ │ strd r0, r1, [sp] │ │ mov r0, r4 │ │ movs r1, #1 │ │ - bl 3f0a0 │ │ + bl 3f3a8 │ │ add sp, #24 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - b.n 94e60 │ │ - vrshr.u64 q15, q12, #9 │ │ - vmull.u q9, d23, d3 │ │ + b.n 94df4 │ │ + vcvtp.u16.f16 d30, d12 │ │ + vcvt.f16.u16 d18, d6, #9 │ │ vsli.64 , q8, #56 @ 0x38 │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ - ldr r0, [pc, #148] @ (94718 ) │ │ + ldr r0, [pc, #148] @ (94784 ) │ │ mov.w ip, #0 │ │ add r0, pc │ │ mov lr, r0 │ │ adds r0, #32 │ │ ldrexd r3, r2, [r0] │ │ clrex │ │ - b.n 946a4 │ │ + b.n 94710 │ │ movs r2, #0 │ │ clrex │ │ lsls r2, r2, #31 │ │ mov r3, r6 │ │ mov r2, r1 │ │ - bne.n 946d4 │ │ + bne.n 94740 │ │ adds r4, r3, #1 │ │ adcs.w r5, r2, #0 │ │ adcs.w r1, ip, #0 │ │ - bne.n 94712 │ │ + bne.n 9477e │ │ ldrexd r6, r1, [r0] │ │ eors r2, r1 │ │ eors r3, r6 │ │ orrs r2, r3 │ │ - bne.n 94696 │ │ + bne.n 94702 │ │ strexd r2, r4, r5, [r0] │ │ cmp r2, #0 │ │ mov.w r2, #0 │ │ it eq │ │ moveq.w r2, #4294967295 @ 0xffffffff │ │ lsls r2, r2, #31 │ │ mov r3, r6 │ │ mov r2, r1 │ │ - beq.n 946a4 │ │ + beq.n 94710 │ │ ldr.w r0, [lr, #40] @ 0x28 │ │ mov r6, lr │ │ dmb ish │ │ cmp r0, #0 │ │ itt eq │ │ addeq.w r0, r6, #40 @ 0x28 │ │ - bleq 7740c │ │ + bleq 77474 │ │ mov r1, r4 │ │ - blx d8840 │ │ + blx d8850 │ │ ldr r0, [r6, #48] @ 0x30 │ │ dmb ish │ │ cmp r0, #0 │ │ itt eq │ │ addeq.w r0, r6, #48 @ 0x30 │ │ - bleq 7740c │ │ + bleq 77474 │ │ mov r1, r5 │ │ - blx d8840 │ │ + blx d8850 │ │ mov r0, r4 │ │ mov r1, r5 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - bl 9471c │ │ + bl 94788 │ │ nop │ │ - add r1, pc, #56 @ (adr r1, 94754 ) │ │ + add r0, pc, #776 @ (adr r0, 94a90 ) │ │ movs r4, r0 │ │ push {r7, lr} │ │ mov r7, sp │ │ - ldr r0, [pc, #12] @ (94730 ) │ │ + ldr r0, [pc, #12] @ (9479c ) │ │ movs r1, #111 @ 0x6f │ │ - ldr r2, [pc, #12] @ (94734 ) │ │ + ldr r2, [pc, #12] @ (947a0 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ nop │ │ - mov r5, pc │ │ - @ instruction: 0xfff87544 │ │ + mov r1, r2 │ │ + vclz.i32 , q12 │ │ movs r4, r0 │ │ mov r3, r1 │ │ ldrd r1, r2, [r0, #4] │ │ mov r0, r3 │ │ - b.w 3ffd4 │ │ + b.w 402dc │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ add r1, sp, #8 │ │ mov r4, r0 │ │ movs r0, #1 │ │ - blx d8a50 │ │ + blx d8a60 │ │ adds r0, #1 │ │ - beq.n 94798 │ │ + beq.n 94804 │ │ movw r1, #51712 @ 0xca00 │ │ ldr r0, [sp, #12] │ │ movt r1, #15258 @ 0x3b9a │ │ cmp r0, r1 │ │ itttt cc │ │ ldrcc r1, [sp, #8] │ │ asrcc r2, r1, #31 │ │ strdcc r1, r2, [r4] │ │ strcc r0, [r4, #8] │ │ itt cc │ │ addcc sp, #24 │ │ popcc {r4, r6, r7, pc} │ │ - ldr r1, [pc, #112] @ (947e8 ) │ │ + ldr r1, [pc, #112] @ (94854 ) │ │ movs r4, #2 │ │ - ldr r0, [pc, #112] @ (947ec ) │ │ - ldr r3, [pc, #112] @ (947f0 ) │ │ + ldr r0, [pc, #112] @ (94858 ) │ │ + ldr r3, [pc, #112] @ (9485c ) │ │ add r1, pc │ │ - ldr r2, [pc, #112] @ (947f4 ) │ │ + ldr r2, [pc, #112] @ (94860 ) │ │ add r0, pc │ │ add r3, pc │ │ add r2, pc │ │ strd r4, r2, [sp, #16] │ │ add r2, sp, #16 │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ - b.n 947ba │ │ - blx d8850 │ │ + bl 417b8 │ │ + b.n 94826 │ │ + blx d8860 │ │ ldr r1, [r0, #0] │ │ - ldr r2, [pc, #60] @ (947dc ) │ │ - ldr r0, [pc, #60] @ (947e0 ) │ │ - ldr r3, [pc, #64] @ (947e4 ) │ │ + ldr r2, [pc, #60] @ (94848 ) │ │ + ldr r0, [pc, #60] @ (9484c ) │ │ + ldr r3, [pc, #64] @ (94850 ) │ │ add r2, pc │ │ add r0, pc │ │ str r1, [sp, #20] │ │ movs r1, #0 │ │ add r3, pc │ │ str r1, [sp, #16] │ │ str r2, [sp, #0] │ │ add r2, sp, #16 │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ udf #254 @ 0xfe │ │ mov r4, r0 │ │ add r0, sp, #16 │ │ - bl 777de │ │ - b.n 947d2 │ │ - bl 416fe │ │ + bl 77846 │ │ + b.n 9483e │ │ + bl 41a06 │ │ mov r4, r0 │ │ add r0, sp, #16 │ │ - bl 777de │ │ + bl 77846 │ │ mov r0, r4 │ │ - blx d6dd0 │ │ - bl 416fe │ │ - strb r0, [r1, #13] │ │ + blx d6de0 │ │ + bl 41a06 │ │ + strb r4, [r5, #11] │ │ movs r4, r0 │ │ - ldr r4, [pc, #884] @ (94b58 ) │ │ - @ instruction: 0xfff875c0 │ │ + ldr r4, [pc, #452] @ (94a14 ) │ │ + vsli.32 , q10, #24 │ │ movs r4, r0 │ │ - strb r6, [r7, #13] │ │ + strb r2, [r4, #12] │ │ movs r4, r0 │ │ - ldr r5, [pc, #4] @ (947f4 ) │ │ - @ instruction: 0xfff875e8 │ │ + ldr r4, [pc, #596] @ (94ab0 ) │ │ + vsli.64 d23, d12, #56 @ 0x38 │ │ movs r4, r0 │ │ - strb r2, [r3, #13] │ │ + strb r6, [r7, #11] │ │ movs r4, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #28 │ │ ldrd fp, r6, [r2] │ │ mov r3, r1 │ │ @@ -163631,32 +163546,32 @@ │ │ movge r1, #1 │ │ cmp sl, ip │ │ it cs │ │ movcs r0, #1 │ │ cmp.w lr, #0 │ │ it ne │ │ movne r0, r1 │ │ - cbz r0, 9486c │ │ + cbz r0, 948d8 │ │ movw lr, #51712 @ 0xca00 │ │ cmp sl, ip │ │ movt lr, #15258 @ 0x3b9a │ │ - bcs.n 94894 │ │ + bcs.n 94900 │ │ mvn.w r1, fp │ │ adds r2, r4, r1 │ │ mvn.w r0, r6 │ │ adc.w r3, r5, r0 │ │ add sl, lr │ │ sub.w r0, sl, ip │ │ cmp r0, lr │ │ - bcs.n 948a4 │ │ - b.n 948be │ │ + bcs.n 94910 │ │ + b.n 9492a │ │ mov r1, r2 │ │ mov r0, sp │ │ mov r2, r3 │ │ - bl 947f8 │ │ + bl 94864 │ │ add r3, sp, #8 │ │ ldr r0, [sp, #0] │ │ movs r6, #1 │ │ ldmia r3, {r1, r2, r3} │ │ bic.w r0, r6, r0 │ │ strd r0, r9, [r8] │ │ add.w r0, r8, #8 │ │ @@ -163664,39 +163579,39 @@ │ │ add sp, #28 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ subs.w r2, r4, fp │ │ sbc.w r3, r5, r6 │ │ sub.w r0, sl, ip │ │ cmp r0, lr │ │ - bcc.n 948be │ │ + bcc.n 9492a │ │ adds r2, #1 │ │ mov.w r1, #0 │ │ adcs.w r3, r3, #0 │ │ adcs.w r1, r1, #0 │ │ - bne.n 948d4 │ │ + bne.n 94940 │ │ movw r1, #13824 @ 0x3600 │ │ movt r1, #50277 @ 0xc465 │ │ add r0, r1 │ │ movs r1, #0 │ │ strd r2, r3, [r8, #8] │ │ strd r1, r1, [r8] │ │ str.w r0, [r8, #16] │ │ add sp, #28 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #12] @ (948e4 ) │ │ + ldr r0, [pc, #12] @ (94950 ) │ │ movs r1, #25 │ │ - ldr r2, [pc, #12] @ (948e8 ) │ │ + ldr r2, [pc, #12] @ (94954 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 41488 │ │ + bl 41790 │ │ nop │ │ - mov r4, pc │ │ - vcls.s32 , q8 │ │ + mov r0, r2 │ │ + vcls.s32 d23, d4 │ │ movs r4, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #160 @ 0xa0 │ │ mov r4, r1 │ │ ldrb r1, [r0, #0] │ │ @@ -163704,1456 +163619,1456 @@ │ │ ldrh r2, [r0, #16] │ │ ldrb r0, [r2, r5] │ │ ldr r0, [r0, #4] │ │ movs r2, #2 │ │ str r0, [sp, #4] │ │ ldrd r0, r1, [r4] │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #944] @ (94cc0 ) │ │ + ldr r1, [pc, #944] @ (94d2c ) │ │ add r1, pc │ │ blx r3 │ │ - ldr r1, [pc, #940] @ (94cc4 ) │ │ + ldr r1, [pc, #940] @ (94d30 ) │ │ movs r3, #0 │ │ - ldr r2, [pc, #940] @ (94cc8 ) │ │ + ldr r2, [pc, #940] @ (94d34 ) │ │ strb.w r3, [sp, #13] │ │ add r1, pc │ │ add r2, pc │ │ strb.w r0, [sp, #12] │ │ add r0, sp, #8 │ │ add r3, sp, #4 │ │ str r2, [sp, #0] │ │ movs r2, #4 │ │ str r4, [sp, #8] │ │ - bl 40bfc │ │ + bl 40f04 │ │ ldr r0, [sp, #4] │ │ - bl 91924 │ │ + bl 91990 │ │ ldrb.w r1, [sp, #12] │ │ cmp r1, #0 │ │ - beq.w 94a7e │ │ + beq.w 94aea │ │ movs r6, #1 │ │ add r5, sp, #16 │ │ movs r1, #128 @ 0x80 │ │ ldr r4, [sp, #4] │ │ mov r0, r5 │ │ - bl d518e │ │ + bl d521e │ │ mov r0, r4 │ │ mov r1, r5 │ │ movs r2, #128 @ 0x80 │ │ - blx d8930 │ │ + blx d8940 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - ble.w 94ff0 │ │ + ble.w 9505c │ │ add r4, sp, #16 │ │ mov r0, r4 │ │ - blx d87e0 │ │ + blx d8800 │ │ add.w r9, sp, #148 @ 0x94 │ │ mov r2, r0 │ │ mov r1, r4 │ │ mov r0, r9 │ │ - bl 3de50 │ │ + bl 3e158 │ │ ldrd sl, r4, [sp, #148] @ 0x94 │ │ ldr r5, [sp, #156] @ 0x9c │ │ cmp.w sl, #2147483648 @ 0x80000000 │ │ - bne.w 94b28 │ │ + bne.w 94b94 │ │ cmp r5, #0 │ │ - beq.w 94e16 │ │ + beq.w 94e82 │ │ mov r0, r5 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ - beq.w 94ffe │ │ + beq.w 9506a │ │ mov r8, r0 │ │ - b.n 94e1a │ │ + b.n 94e86 │ │ ldrd r2, r1, [r4] │ │ ldr r5, [r0, #4] │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #804] @ (94ccc ) │ │ + ldr r1, [pc, #804] @ (94d38 ) │ │ mov r0, r2 │ │ movs r2, #5 │ │ add r1, pc │ │ blx r3 │ │ cmp r0, #0 │ │ - beq.n 94a32 │ │ + beq.n 94a9e │ │ movs r0, #1 │ │ - b.n 94ed4 │ │ + b.n 94f40 │ │ ldrd r2, r1, [r4] │ │ ldr r5, [r0, #4] │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #780] @ (94cd0 ) │ │ + ldr r1, [pc, #780] @ (94d3c ) │ │ mov r0, r2 │ │ movs r2, #6 │ │ add r1, pc │ │ blx r3 │ │ - cbnz r0, 94a28 │ │ + cbnz r0, 94a94 │ │ ldrb r0, [r4, #10] │ │ lsls r0, r0, #24 │ │ - bmi.w 94bfa │ │ + bmi.w 94c66 │ │ ldrd r0, r1, [r4] │ │ movs r2, #3 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #756] @ (94cd4 ) │ │ + ldr r1, [pc, #756] @ (94d40 ) │ │ add r1, pc │ │ blx r3 │ │ - cbnz r0, 94a28 │ │ + cbnz r0, 94a94 │ │ ldrd r0, r1, [r4] │ │ movs r2, #4 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #744] @ (94cd8 ) │ │ + ldr r1, [pc, #744] @ (94d44 ) │ │ add r1, pc │ │ blx r3 │ │ - cbnz r0, 94a28 │ │ + cbnz r0, 94a94 │ │ ldrd r0, r1, [r4] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #732] @ (94cdc ) │ │ + ldr r1, [pc, #732] @ (94d48 ) │ │ add r1, pc │ │ blx r3 │ │ - cbnz r0, 94a28 │ │ + cbnz r0, 94a94 │ │ ldrd r1, r2, [r4] │ │ ldrb r0, [r5, #8] │ │ - bl 94594 │ │ - cbnz r0, 94a28 │ │ - b.n 94c6a │ │ + bl 94600 │ │ + cbnz r0, 94a94 │ │ + b.n 94cd6 │ │ ldrd r2, r1, [r4] │ │ ldrb r5, [r0, #1] │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #708] @ (94ce0 ) │ │ + ldr r1, [pc, #708] @ (94d4c ) │ │ mov r0, r2 │ │ movs r2, #4 │ │ add r1, pc │ │ blx r3 │ │ cmp r0, #0 │ │ - beq.n 94ae6 │ │ + beq.n 94b52 │ │ movs r0, #1 │ │ add sp, #160 @ 0xa0 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrb r0, [r4, #10] │ │ lsls r0, r0, #24 │ │ - bmi.n 94b32 │ │ + bmi.n 94b9e │ │ ldrd r0, r1, [r4] │ │ movs r2, #3 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #672] @ (94ce4 ) │ │ + ldr r1, [pc, #672] @ (94d50 ) │ │ add r1, pc │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.n 94a28 │ │ + bne.n 94a94 │ │ ldrd r0, r1, [r4] │ │ movs r2, #4 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #660] @ (94ce8 ) │ │ + ldr r1, [pc, #660] @ (94d54 ) │ │ add r1, pc │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.n 94a28 │ │ + bne.n 94a94 │ │ ldrd r0, r1, [r4] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #644] @ (94cec ) │ │ + ldr r1, [pc, #644] @ (94d58 ) │ │ add r1, pc │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.n 94a28 │ │ + bne.n 94a94 │ │ ldrd r1, r2, [r4] │ │ ldrb r0, [r5, #8] │ │ - bl 94594 │ │ + bl 94600 │ │ cmp r0, #0 │ │ - bne.n 94a28 │ │ - b.n 94ba2 │ │ + bne.n 94a94 │ │ + b.n 94c0e │ │ ldr r5, [sp, #8] │ │ uxtb r4, r0 │ │ ldrb.w r2, [sp, #13] │ │ ldrb r0, [r5, #10] │ │ lsls r0, r0, #24 │ │ - bmi.w 94d3c │ │ - ldr r3, [pc, #608] @ (94cf0 ) │ │ + bmi.w 94da8 │ │ + ldr r3, [pc, #608] @ (94d5c ) │ │ cmp r2, #0 │ │ - ldr r1, [pc, #608] @ (94cf4 ) │ │ + ldr r1, [pc, #608] @ (94d60 ) │ │ mov.w r2, #3 │ │ add r3, pc │ │ ldrd r0, r6, [r5] │ │ add r1, pc │ │ it eq │ │ moveq r1, r3 │ │ ldr r3, [r6, #12] │ │ it ne │ │ movne r2, #2 │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.w 94944 │ │ + bne.w 949b0 │ │ ldrd r0, r1, [r5] │ │ movs r2, #4 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #572] @ (94cf8 ) │ │ + ldr r1, [pc, #572] @ (94d64 ) │ │ add r1, pc │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.w 94944 │ │ + bne.w 949b0 │ │ ldrd r0, r1, [r5] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #556] @ (94cfc ) │ │ + ldr r1, [pc, #556] @ (94d68 ) │ │ add r1, pc │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.w 94944 │ │ + bne.w 949b0 │ │ ldrd r1, r2, [r5] │ │ mov r0, r4 │ │ - bl 94594 │ │ - b.n 94da6 │ │ + bl 94600 │ │ + b.n 94e12 │ │ ldrb r0, [r4, #10] │ │ lsls r0, r0, #24 │ │ - bmi.w 94daa │ │ + bmi.w 94e16 │ │ ldrd r0, r1, [r4] │ │ movs r2, #1 │ │ ldr r3, [r1, #12] │ │ movs r6, #1 │ │ - ldr r1, [pc, #516] @ (94d00 ) │ │ + ldr r1, [pc, #516] @ (94d6c ) │ │ add r1, pc │ │ blx r3 │ │ mov r1, r0 │ │ mov r0, r6 │ │ cmp r1, #0 │ │ - bne.w 94ed4 │ │ - ldr r1, [pc, #504] @ (94d04 ) │ │ - ldr r2, [pc, #508] @ (94d08 ) │ │ + bne.w 94f40 │ │ + ldr r1, [pc, #504] @ (94d70 ) │ │ + ldr r2, [pc, #508] @ (94d74 ) │ │ add r1, pc │ │ ldrd r0, r3, [r4] │ │ add r2, pc │ │ ldr r3, [r3, #12] │ │ ldr.w r1, [r1, r5, lsl #2] │ │ ldr.w r2, [r2, r5, lsl #2] │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ - b.n 94e00 │ │ + bne.w 94a94 │ │ + b.n 94e6c │ │ mov r8, r4 │ │ cmp r6, #0 │ │ - beq.w 94e2a │ │ - b.n 94eba │ │ + beq.w 94e96 │ │ + b.n 94f26 │ │ ldrd r0, r1, [r4] │ │ movs r2, #3 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #464] @ (94d0c ) │ │ + ldr r1, [pc, #464] @ (94d78 ) │ │ add r1, pc │ │ blx r3 │ │ mov r1, r0 │ │ movs r0, #1 │ │ cmp r1, #0 │ │ - bne.w 94ed4 │ │ - ldr r1, [pc, #452] @ (94d10 ) │ │ + bne.w 94f40 │ │ + ldr r1, [pc, #452] @ (94d7c ) │ │ add r2, sp, #148 @ 0x94 │ │ str r2, [sp, #24] │ │ ldrd r2, r3, [r4] │ │ add r1, pc │ │ strb.w r0, [sp, #148] @ 0x94 │ │ add r0, sp, #16 │ │ strd r2, r3, [sp, #16] │ │ movs r2, #4 │ │ - bl 40a2c │ │ + bl 40d34 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ - ldr r1, [pc, #420] @ (94d14 ) │ │ + bne.w 94a94 │ │ + ldr r1, [pc, #420] @ (94d80 ) │ │ add r0, sp, #16 │ │ movs r2, #2 │ │ add r1, pc │ │ - bl 40a2c │ │ + bl 40d34 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ - ldr r2, [pc, #408] @ (94d18 ) │ │ + bne.w 94a94 │ │ + ldr r2, [pc, #408] @ (94d84 ) │ │ add r1, sp, #16 │ │ ldrb r0, [r5, #8] │ │ add r2, pc │ │ - bl 94594 │ │ + bl 94600 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ - ldr r1, [pc, #392] @ (94d1c ) │ │ + bne.w 94a94 │ │ + ldr r1, [pc, #392] @ (94d88 ) │ │ add r0, sp, #16 │ │ movs r2, #2 │ │ add r1, pc │ │ - bl 40a2c │ │ + bl 40d34 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ + bne.w 94a94 │ │ ldrb r0, [r4, #10] │ │ lsls r0, r0, #24 │ │ - bmi.w 94efe │ │ + bmi.w 94f6a │ │ ldrd r0, r1, [r4] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #364] @ (94d20 ) │ │ + ldr r1, [pc, #364] @ (94d8c ) │ │ add r1, pc │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ + bne.w 94a94 │ │ ldrd r0, r1, [r4] │ │ movs r2, #7 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #348] @ (94d24 ) │ │ + ldr r1, [pc, #348] @ (94d90 ) │ │ add r1, pc │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ + bne.w 94a94 │ │ ldrd r0, r1, [r4] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #332] @ (94d28 ) │ │ + ldr r1, [pc, #332] @ (94d94 ) │ │ add r1, pc │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ + bne.w 94a94 │ │ ldrd r2, r3, [r4] │ │ ldrd r0, r1, [r5] │ │ - bl 3faa0 │ │ + bl 3fda8 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ - b.n 94fc8 │ │ + bne.w 94a94 │ │ + b.n 95034 │ │ ldrd r0, r1, [r4] │ │ movs r2, #3 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #296] @ (94d2c ) │ │ + ldr r1, [pc, #296] @ (94d98 ) │ │ add r1, pc │ │ blx r3 │ │ mov r1, r0 │ │ movs r0, #1 │ │ cmp r1, #0 │ │ - bne.w 94ed4 │ │ - ldr r1, [pc, #284] @ (94d30 ) │ │ + bne.w 94f40 │ │ + ldr r1, [pc, #284] @ (94d9c ) │ │ add r2, sp, #148 @ 0x94 │ │ str r2, [sp, #24] │ │ ldrd r2, r3, [r4] │ │ add r1, pc │ │ strb.w r0, [sp, #148] @ 0x94 │ │ add r0, sp, #16 │ │ strd r2, r3, [sp, #16] │ │ movs r2, #4 │ │ - bl 40a2c │ │ + bl 40d34 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ - ldr r1, [pc, #252] @ (94d34 ) │ │ + bne.w 94a94 │ │ + ldr r1, [pc, #252] @ (94da0 ) │ │ add r0, sp, #16 │ │ movs r2, #2 │ │ add r1, pc │ │ - bl 40a2c │ │ + bl 40d34 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ - ldr r2, [pc, #240] @ (94d38 ) │ │ + bne.w 94a94 │ │ + ldr r2, [pc, #240] @ (94da4 ) │ │ add r1, sp, #16 │ │ ldrb r0, [r5, #8] │ │ add r2, pc │ │ - bl 94594 │ │ + bl 94600 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ - ldr r1, [pc, #960] @ (9501c ) │ │ + bne.w 94a94 │ │ + ldr r1, [pc, #960] @ (95088 ) │ │ add r0, sp, #16 │ │ movs r2, #2 │ │ add r1, pc │ │ - bl 40a2c │ │ + bl 40d34 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ + bne.w 94a94 │ │ ldrb r0, [r4, #10] │ │ lsls r0, r0, #24 │ │ - bmi.w 94f5e │ │ + bmi.w 94fca │ │ ldrd r0, r1, [r4] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #932] @ (95020 ) │ │ + ldr r1, [pc, #932] @ (9508c ) │ │ add r1, pc │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ + bne.w 94a94 │ │ ldrd r0, r1, [r4] │ │ movs r2, #5 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #916] @ (95024 ) │ │ + ldr r1, [pc, #916] @ (95090 ) │ │ add r1, pc │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ + bne.w 94a94 │ │ ldrd r0, r1, [r4] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #900] @ (95028 ) │ │ + ldr r1, [pc, #900] @ (95094 ) │ │ add r1, pc │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ + bne.w 94a94 │ │ ldrd r0, r1, [r5] │ │ ldr r2, [r1, #12] │ │ mov r1, r4 │ │ blx r2 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ - b.n 94fc8 │ │ - subs r6, #185 @ 0xb9 │ │ - vtbx.8 d17, {d24}, d30 │ │ + bne.w 94a94 │ │ + b.n 95034 │ │ + subs r6, #77 @ 0x4d │ │ + vtbl.8 d17, {d24}, d2 │ │ @ instruction: 0xfff8fc9d │ │ - @ instruction: 0xffff3e26 │ │ - vcvt.f32.u32 d19, d1, #8 │ │ - vtbx.8 d18, {d24}, d29 │ │ - vqshrun.s64 d17, q13, #8 │ │ - @ instruction: 0xfff828d2 │ │ - vtbl.8 d17, {d8}, d4 │ │ - vtbl.8 d18, {d24}, d9 │ │ - vqshl.u64 , q2, #56 @ 0x38 │ │ - vtbx.8 d18, {d8}, d26 │ │ - vqshrun.s64 d18, , #8 │ │ - vtbx.8 d18, {d8-d9}, d3 │ │ - vqabs.s32 , q14 │ │ - vtbl.8 d18, {d8}, d0 │ │ - vqshl.u64 d18, d23, #56 @ 0x38 │ │ - vqrshrun.s64 d23, q12, #8 │ │ + @ instruction: 0xffff3dba │ │ + @ instruction: 0xfff83da5 │ │ + vtbl.8 d18, {d24}, d0 │ │ + vqneg.s32 , q7 │ │ + vtbx.8 d18, {d8}, d21 │ │ + vqshl.u64 d17, d8, #56 @ 0x38 │ │ + vqshrun.s64 d18, q6, #8 │ │ + vqabs.s32 , q12 │ │ + vqshl.u64 q9, , #56 @ 0x38 │ │ + vqneg.s32 q9, q3 │ │ + @ instruction: 0xfff828d6 │ │ + vqabs.s32 d17, d0 │ │ + vqshl.u64 d18, d3, #56 @ 0x38 │ │ + vqabs.s32 q9, q5 │ │ + vqshrun.s64 d23, q6, #8 │ │ + movs r4, r0 │ │ + bkpt 0x00a6 │ │ + @ instruction: 0xfff8de88 │ │ + vcvt.f16.s16 , q12 │ │ + vqshlu.s64 q9, , #56 @ 0x38 │ │ + vshll.u32 , d28, #24 │ │ movs r4, r0 │ │ - itee ne │ │ - @ instruction: 0xfff8def4 │ │ - vqshlueq.s64 , q2, #55 @ 0x37 │ │ - vqshleq.u32 q9, q7, #24 │ │ - @ instruction: 0xfff85a98 │ │ - movs r4, r0 │ │ - udf #150 @ 0x96 │ │ - vtbl.8 d18, {d7}, d29 │ │ - vmull.u , d8, d3 │ │ - vqshlu.s64 q9, q10, #56 @ 0x38 │ │ - @ instruction: 0xfff8de2c │ │ - vcvt.f16.s16 d17, d12 │ │ - vqshlu.s64 d18, d6, #56 @ 0x38 │ │ - @ instruction: 0xfff859d0 │ │ + udf #42 @ 0x2a │ │ + vcvt.u16.f16 q9, q0 │ │ + @ instruction: 0xfff83b97 │ │ + vpadal.u32 d18, d7 │ │ + vqrdmulh.s , q12, d0[0] │ │ + vrsqrte.f16 d17, d16 │ │ + vpadal.s32 d18, d25 │ │ + vqrshrn.u64 d21, q10, #8 │ │ movs r4, r0 │ │ - cbnz r2, 94d52 │ │ + cbnz r2, 94dbe │ │ ldrd r0, r1, [r5] │ │ movs r2, #3 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #740] @ (9502c ) │ │ + ldr r1, [pc, #740] @ (95098 ) │ │ add r1, pc │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.w 94944 │ │ - ldr r1, [pc, #732] @ (95030 ) │ │ + bne.w 949b0 │ │ + ldr r1, [pc, #732] @ (9509c ) │ │ add r0, sp, #148 @ 0x94 │ │ str r0, [sp, #24] │ │ movs r3, #1 │ │ ldrd r0, r2, [r5] │ │ add r1, pc │ │ strd r0, r2, [sp, #16] │ │ add r0, sp, #16 │ │ movs r2, #4 │ │ strb.w r3, [sp, #148] @ 0x94 │ │ - bl 40a2c │ │ + bl 40d34 │ │ cmp r0, #0 │ │ - bne.w 94944 │ │ - ldr r1, [pc, #700] @ (95034 ) │ │ + bne.w 949b0 │ │ + ldr r1, [pc, #700] @ (950a0 ) │ │ add r0, sp, #16 │ │ movs r2, #2 │ │ add r1, pc │ │ - bl 40a2c │ │ + bl 40d34 │ │ cmp r0, #0 │ │ - bne.w 94944 │ │ - ldr r2, [pc, #684] @ (95038 ) │ │ + bne.w 949b0 │ │ + ldr r2, [pc, #684] @ (950a4 ) │ │ add r1, sp, #16 │ │ mov r0, r4 │ │ add r2, pc │ │ - bl 94594 │ │ + bl 94600 │ │ cmp r0, #0 │ │ - bne.w 94944 │ │ - ldr r1, [pc, #672] @ (9503c ) │ │ + bne.w 949b0 │ │ + ldr r1, [pc, #672] @ (950a8 ) │ │ add r0, sp, #16 │ │ movs r2, #2 │ │ add r1, pc │ │ - bl 40a2c │ │ + bl 40d34 │ │ mov r6, r0 │ │ - b.n 94946 │ │ + b.n 949b2 │ │ ldrd r0, r1, [r4] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #680] @ (9505c ) │ │ + ldr r1, [pc, #680] @ (950c8 ) │ │ add r1, pc │ │ blx r3 │ │ mov r1, r0 │ │ movs r0, #1 │ │ cmp r1, #0 │ │ - bne.w 94ed4 │ │ - ldr r1, [pc, #668] @ (95060 ) │ │ + bne.w 94f40 │ │ + ldr r1, [pc, #668] @ (950cc ) │ │ add r3, sp, #148 @ 0x94 │ │ - ldr r2, [pc, #668] @ (95064 ) │ │ + ldr r2, [pc, #668] @ (950d0 ) │ │ add r1, pc │ │ strb.w r0, [sp, #148] @ 0x94 │ │ add r2, pc │ │ add r0, sp, #16 │ │ ldr.w r1, [r1, r5, lsl #2] │ │ ldr.w r2, [r2, r5, lsl #2] │ │ str r3, [sp, #24] │ │ ldrd r3, r6, [r4] │ │ strd r3, r6, [sp, #16] │ │ - bl 40a2c │ │ + bl 40d34 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ - ldr r1, [pc, #632] @ (95068 ) │ │ + bne.w 94a94 │ │ + ldr r1, [pc, #632] @ (950d4 ) │ │ add r0, sp, #16 │ │ movs r2, #2 │ │ add r1, pc │ │ - bl 40a2c │ │ + bl 40d34 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ + bne.w 94a94 │ │ ldrd r0, r1, [r4] │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #612] @ (9506c ) │ │ + ldr r1, [pc, #612] @ (950d8 ) │ │ add r1, pc │ │ movs r2, #1 │ │ blx r3 │ │ add sp, #160 @ 0xa0 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ mov.w r8, #1 │ │ mov r0, r8 │ │ mov r1, r4 │ │ mov r2, r5 │ │ - bl d53c6 │ │ + bl d52ea │ │ mov sl, r5 │ │ cmp r6, #0 │ │ - bne.n 94eba │ │ + bne.n 94f26 │ │ ldr r4, [sp, #8] │ │ ldrb r0, [r4, #10] │ │ lsls r0, r0, #24 │ │ - bmi.n 94e70 │ │ + bmi.n 94edc │ │ ldrd r0, r1, [r4] │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #516] @ (95040 ) │ │ + ldr r1, [pc, #516] @ (950ac ) │ │ add r1, pc │ │ movs r2, #2 │ │ blx r3 │ │ - cbnz r0, 94eba │ │ + cbnz r0, 94f26 │ │ ldrd r0, r1, [r4] │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #504] @ (95044 ) │ │ + ldr r1, [pc, #504] @ (950b0 ) │ │ add r1, pc │ │ movs r2, #7 │ │ blx r3 │ │ - cbnz r0, 94eba │ │ + cbnz r0, 94f26 │ │ ldrd r0, r1, [r4] │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #492] @ (95048 ) │ │ + ldr r1, [pc, #492] @ (950b4 ) │ │ add r1, pc │ │ movs r2, #2 │ │ blx r3 │ │ - cbnz r0, 94eba │ │ + cbnz r0, 94f26 │ │ ldrd r2, r3, [r4] │ │ mov r0, r8 │ │ mov r1, r5 │ │ - bl 3faa0 │ │ - b.n 94eb8 │ │ + bl 3fda8 │ │ + b.n 94f24 │ │ ldrd r0, r2, [r4] │ │ add r3, sp, #16 │ │ - ldr r1, [pc, #468] @ (9504c ) │ │ + ldr r1, [pc, #468] @ (950b8 ) │ │ stmia.w r3, {r0, r2, r9} │ │ movs r0, #1 │ │ add r1, pc │ │ strb.w r0, [sp, #148] @ 0x94 │ │ add r0, sp, #16 │ │ movs r2, #7 │ │ - bl 40a2c │ │ - cbnz r0, 94eba │ │ - ldr r1, [pc, #448] @ (95050 ) │ │ + bl 40d34 │ │ + cbnz r0, 94f26 │ │ + ldr r1, [pc, #448] @ (950bc ) │ │ add r1, pc │ │ add r0, sp, #16 │ │ movs r2, #2 │ │ - bl 40a2c │ │ - cbnz r0, 94eba │ │ - ldr r3, [pc, #436] @ (95054 ) │ │ + bl 40d34 │ │ + cbnz r0, 94f26 │ │ + ldr r3, [pc, #436] @ (950c0 ) │ │ add r3, pc │ │ add r2, sp, #16 │ │ mov r0, r8 │ │ mov r1, r5 │ │ - bl 3faa0 │ │ - cbnz r0, 94eba │ │ - ldr r1, [pc, #424] @ (95058 ) │ │ + bl 3fda8 │ │ + cbnz r0, 94f26 │ │ + ldr r1, [pc, #424] @ (950c4 ) │ │ add r1, pc │ │ add r0, sp, #16 │ │ movs r2, #2 │ │ - bl 40a2c │ │ - cbz r0, 94edc │ │ + bl 40d34 │ │ + cbz r0, 94f48 │ │ movs r0, #1 │ │ cmp.w sl, #0 │ │ - beq.n 94ed4 │ │ + beq.n 94f40 │ │ mov r4, r0 │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r4 │ │ add sp, #160 @ 0xa0 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ add sp, #160 @ 0xa0 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r2, [pc, #440] @ (95098 ) │ │ + ldr r2, [pc, #440] @ (95104 ) │ │ ldmia.w r4, {r0, r3, r6} │ │ tst.w r6, #8388608 @ 0x800000 │ │ add r2, pc │ │ - ldr r1, [pc, #432] @ (9509c ) │ │ + ldr r1, [pc, #432] @ (95108 ) │ │ add r1, pc │ │ it ne │ │ movne r1, r2 │ │ mov.w r2, #1 │ │ ldr r3, [r3, #12] │ │ it eq │ │ moveq r2, #2 │ │ blx r3 │ │ - b.n 94ebc │ │ + b.n 94f28 │ │ ldrd r0, r2, [r4] │ │ add.w ip, sp, #16 │ │ - ldr r1, [pc, #360] @ (95070 ) │ │ + ldr r1, [pc, #360] @ (950dc ) │ │ add r3, sp, #148 @ 0x94 │ │ stmia.w ip, {r0, r2, r3} │ │ movs r0, #1 │ │ add r1, pc │ │ strb.w r0, [sp, #148] @ 0x94 │ │ add r0, sp, #16 │ │ movs r2, #7 │ │ - bl 40a2c │ │ + bl 40d34 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ - ldr r1, [pc, #332] @ (95074 ) │ │ + bne.w 94a94 │ │ + ldr r1, [pc, #332] @ (950e0 ) │ │ add r0, sp, #16 │ │ movs r2, #2 │ │ add r1, pc │ │ - bl 40a2c │ │ + bl 40d34 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ + bne.w 94a94 │ │ ldrd r0, r1, [r5] │ │ add r2, sp, #16 │ │ - ldr r3, [pc, #312] @ (95078 ) │ │ + ldr r3, [pc, #312] @ (950e4 ) │ │ add r3, pc │ │ - bl 3faa0 │ │ + bl 3fda8 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ - ldr r1, [pc, #304] @ (9507c ) │ │ + bne.w 94a94 │ │ + ldr r1, [pc, #304] @ (950e8 ) │ │ add r0, sp, #16 │ │ movs r2, #2 │ │ add r1, pc │ │ - bl 40a2c │ │ + bl 40d34 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ - b.n 94fc8 │ │ + bne.w 94a94 │ │ + b.n 95034 │ │ ldrd ip, r2, [r4] │ │ movs r3, #1 │ │ ldrd lr, r6, [r4, #8] │ │ - ldr r1, [pc, #280] @ (95084 ) │ │ - ldr r0, [pc, #284] @ (95088 ) │ │ + ldr r1, [pc, #280] @ (950f0 ) │ │ + ldr r0, [pc, #284] @ (950f4 ) │ │ add r1, pc │ │ strd ip, r2, [sp, #148] @ 0x94 │ │ add r0, pc │ │ strd r0, lr, [sp, #20] │ │ add r0, sp, #148 @ 0x94 │ │ movs r2, #5 │ │ strb.w r3, [sp, #8] │ │ add r3, sp, #8 │ │ str r3, [sp, #156] @ 0x9c │ │ str r6, [sp, #28] │ │ str r0, [sp, #16] │ │ - bl 40a2c │ │ + bl 40d34 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ - ldr r1, [pc, #248] @ (9508c ) │ │ + bne.w 94a94 │ │ + ldr r1, [pc, #248] @ (950f8 ) │ │ add r0, sp, #148 @ 0x94 │ │ movs r2, #2 │ │ add r1, pc │ │ - bl 40a2c │ │ + bl 40d34 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ + bne.w 94a94 │ │ ldrd r0, r1, [r5] │ │ ldr r2, [r1, #12] │ │ add r1, sp, #16 │ │ blx r2 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ + bne.w 94a94 │ │ ldrd r0, r1, [sp, #16] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #208] @ (95090 ) │ │ + ldr r1, [pc, #208] @ (950fc ) │ │ add r1, pc │ │ blx r3 │ │ cmp r0, #0 │ │ - bne.w 94a28 │ │ + bne.w 94a94 │ │ ldrb r0, [r4, #10] │ │ lsls r0, r0, #24 │ │ - bmi.n 94fe4 │ │ + bmi.n 95050 │ │ ldrd r0, r1, [r4] │ │ movs r2, #2 │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #168] @ (95080 ) │ │ + ldr r1, [pc, #168] @ (950ec ) │ │ add r1, pc │ │ blx r3 │ │ add sp, #160 @ 0xa0 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ ldrd r0, r1, [r4] │ │ ldr r3, [r1, #12] │ │ - ldr r1, [pc, #168] @ (95094 ) │ │ + ldr r1, [pc, #168] @ (95100 ) │ │ add r1, pc │ │ - b.n 94e0a │ │ - ldr r0, [pc, #172] @ (950a0 ) │ │ + b.n 94e76 │ │ + ldr r0, [pc, #172] @ (9510c ) │ │ movs r1, #37 @ 0x25 │ │ - ldr r2, [pc, #172] @ (950a4 ) │ │ + ldr r2, [pc, #172] @ (95110 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ movs r0, #1 │ │ mov r1, r5 │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ cmp.w sl, #0 │ │ mov r4, r0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ nop │ │ - ble.n 94fbc │ │ - vcvt.s16.f16 q9, │ │ - vtbx.8 d19, {d8-d11}, d13 │ │ - vpadal.s32 d18, d28 │ │ - vqdmulh.s , q12, d24[0] │ │ - vrsqrte.u16 , q5 │ │ - vsli.32 q9, q2, #24 │ │ - vtbl.8 d21, {d24}, d14 │ │ - movs r4, r0 │ │ - bgt.n 94f58 │ │ - vrsqrte.f16 d18, d23 │ │ - vtbl.8 d19, {d24-d25}, d1 │ │ - vsri.32 q9, q11, #8 │ │ - vtbx.8 d19, {d8-d9}, d13 │ │ - vcls.s32 q9, q0 │ │ - vqshl.u32 , q15, #24 │ │ - movs r4, r0 │ │ - blt.n 95158 │ │ - vcvt.f16.u16 , q13, #9 │ │ - vcvt.f16.s16 , q10 │ │ - movs r4, r0 │ │ - pop {r1, r2, r3, r4, r5, r6, r7} │ │ - vcvt.f16.u16 d29, d24, #8 │ │ - vrsqrte.u16 d18, d27 │ │ - @ instruction: 0xfff838bb │ │ - vsubw.u q9, q12, d22 │ │ - vqshlu.s64 , q7, #56 @ 0x38 │ │ - movs r4, r0 │ │ - bge.n 95038 │ │ - vrshr.u64 q9, q11, #9 │ │ - vqrshrun.s64 d19, , #8 │ │ - vpadal.u32 d21, d26 │ │ - movs r4, r0 │ │ - movs r3, #56 @ 0x38 │ │ - vtbx.8 d29, {d8-d10}, d30 │ │ - vrshr.u64 d18, d23, #9 │ │ - vrsra.u64 d18, d29, #8 │ │ - @ instruction: 0xfff823e4 │ │ - @ instruction: 0xfff83bbe │ │ - vtbx.8 d22, {d24-d26}, d12 │ │ + ble.n 95150 │ │ + vqshlu.s64 q9, q12, #55 @ 0x37 │ │ + vtbx.8 d19, {d24-d26}, d17 │ │ + vsli.64 d18, d31, #56 @ 0x38 │ │ + vcvt.f16.u16 , q14, #8 │ │ + vsri.32 , q7, #9 │ │ + vclz.i32 q9, │ │ + vqshrun.s64 d21, q9, #8 │ │ + movs r4, r0 │ │ + bgt.n 950ec │ │ + vsli.32 d18, d26, #23 │ │ + vqshrn.u64 d19, , #8 │ │ + vcls.s32 d18, d9 │ │ + vtbx.8 d19, {d24}, d17 │ │ + vrsra.u64 q9, , #8 │ │ + vqabs.s32 d21, d18 │ │ + movs r4, r0 │ │ + blt.n 950ec │ │ + vdup.8 d29, d14[3] │ │ + vcvt.f16.s16 d23, d8 │ │ + movs r4, r0 │ │ + pop {r1, r4, r7} │ │ + vtbx.8 d29, {d24-d27}, d12 │ │ + vsri.32 d18, d30, #9 │ │ + vtbx.8 d19, {d8}, d15 │ │ + vrsra.u32 d18, d25, #8 │ │ + vpadal.u32 d21, d2 │ │ + movs r4, r0 │ │ + bge.n 951cc │ │ + vcvtp.u16.f16 d18, d9 │ │ + vtbl.8 d19, {d8}, d5 │ │ + vpadal.s32 , q7 │ │ + movs r4, r0 │ │ + movs r2, #203 @ 0xcb │ │ + vtbl.8 d29, {d8-d10}, d2 │ │ + vcvtp.s16.f16 q9, q5 │ │ + vrsra.u32 q9, q0, #8 │ │ + vrsra.u32 q9, , #8 │ │ + @ instruction: 0xfff83b52 │ │ + @ instruction: 0xfff86a70 │ │ movs r4, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #392 @ 0x188 │ │ mov r8, r0 │ │ mov r9, r2 │ │ lsrs r0, r2, #7 │ │ cmp r0, #2 │ │ - bhi.w 951ec │ │ + bhi.w 95258 │ │ add r6, sp, #8 │ │ mov r2, r9 │ │ mov r0, r6 │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #0 │ │ cmp.w r9, #7 │ │ strb.w r0, [r6, r9] │ │ - bcs.n 95134 │ │ + bcs.n 951a0 │ │ ldrb.w r0, [sp, #8] │ │ cmp r0, #0 │ │ - beq.n 9518e │ │ + beq.n 951fa │ │ cmp.w r9, #0 │ │ - beq.n 951c4 │ │ + beq.n 95230 │ │ ldrb.w r0, [sp, #9] │ │ cmp r0, #0 │ │ - beq.n 95196 │ │ + beq.n 95202 │ │ cmp.w r9, #1 │ │ - beq.n 951c4 │ │ + beq.n 95230 │ │ ldrb.w r0, [sp, #10] │ │ cmp r0, #0 │ │ - beq.n 9519a │ │ + beq.n 95206 │ │ cmp.w r9, #2 │ │ - beq.n 951c4 │ │ + beq.n 95230 │ │ ldrb.w r0, [sp, #11] │ │ cmp r0, #0 │ │ - beq.n 9519e │ │ + beq.n 9520a │ │ cmp.w r9, #3 │ │ - beq.n 951c4 │ │ + beq.n 95230 │ │ ldrb.w r0, [sp, #12] │ │ cmp r0, #0 │ │ - beq.n 951a2 │ │ + beq.n 9520e │ │ cmp.w r9, #4 │ │ - beq.n 951c4 │ │ + beq.n 95230 │ │ ldrb.w r0, [sp, #13] │ │ cmp r0, #0 │ │ - beq.n 951a6 │ │ + beq.n 95212 │ │ cmp.w r9, #5 │ │ - beq.n 951c4 │ │ + beq.n 95230 │ │ ldrb.w r0, [sp, #14] │ │ cmp r0, #0 │ │ - bne.n 951c4 │ │ + bne.n 95230 │ │ movs r1, #6 │ │ - b.n 951a8 │ │ + b.n 95214 │ │ cmp r6, r6 │ │ - bne.n 95164 │ │ + bne.n 951d0 │ │ sub.w r1, r9, #7 │ │ movw r2, #256 @ 0x100 │ │ movt r2, #257 @ 0x101 │ │ adds r4, r6, r0 │ │ ldr r3, [r6, r0] │ │ ldr r4, [r4, #4] │ │ subs r5, r2, r4 │ │ orrs r5, r4 │ │ subs r4, r2, r3 │ │ orrs r3, r4 │ │ ands r3, r5 │ │ mvns r3, r3 │ │ tst.w r3, #2155905152 @ 0x80808080 │ │ - bne.n 95176 │ │ + bne.n 951e2 │ │ adds r0, #8 │ │ cmp r0, r1 │ │ - bls.n 95144 │ │ - b.n 95176 │ │ + bls.n 951b0 │ │ + b.n 951e2 │ │ movs r1, #0 │ │ ldrb r2, [r6, r1] │ │ - cbz r2, 951a8 │ │ + cbz r2, 95214 │ │ adds r1, #1 │ │ - bne.n 95166 │ │ + bne.n 951d2 │ │ sub.w r1, r9, #7 │ │ cmp r1, #0 │ │ - bcs.n 9513c │ │ + bcs.n 951a8 │ │ add.w r1, r9, #1 │ │ subs r1, r1, r0 │ │ - beq.n 951c4 │ │ + beq.n 95230 │ │ adds r3, r6, r0 │ │ movs r2, #0 │ │ ldrb r6, [r3, r2] │ │ - cbz r6, 95192 │ │ + cbz r6, 951fe │ │ adds r2, #1 │ │ cmp r1, r2 │ │ - bne.n 95182 │ │ - b.n 951c4 │ │ + bne.n 951ee │ │ + b.n 95230 │ │ movs r1, #0 │ │ - b.n 951a8 │ │ + b.n 95214 │ │ adds r1, r2, r0 │ │ - b.n 951a8 │ │ + b.n 95214 │ │ movs r1, #1 │ │ - b.n 951a8 │ │ + b.n 95214 │ │ movs r1, #2 │ │ - b.n 951a8 │ │ + b.n 95214 │ │ movs r1, #3 │ │ - b.n 951a8 │ │ + b.n 95214 │ │ movs r1, #4 │ │ - b.n 951a8 │ │ + b.n 95214 │ │ movs r1, #5 │ │ cmp r1, r9 │ │ - bne.n 951c4 │ │ + bne.n 95230 │ │ add r0, sp, #8 │ │ - blx d8a60 │ │ + blx d8a70 │ │ adds r0, #1 │ │ - beq.n 951d8 │ │ + beq.n 95244 │ │ movs r0, #4 │ │ strb.w r0, [r8] │ │ add sp, #392 @ 0x188 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #60] @ (95204 ) │ │ + ldr r0, [pc, #60] @ (95270 ) │ │ add r0, pc │ │ ldrd r0, r1, [r0] │ │ strd r0, r1, [r8] │ │ add sp, #392 @ 0x188 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - blx d8850 │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ movs r1, #0 │ │ strd r1, r0, [r8] │ │ add sp, #392 @ 0x188 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #24] @ (95208 ) │ │ + ldr r0, [pc, #24] @ (95274 ) │ │ mov r2, r9 │ │ movs r3, #1 │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, r8 │ │ - bl 9451c │ │ + bl 94588 │ │ add sp, #392 @ 0x188 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r6, [r3, #28] │ │ + ldr r2, [r0, #24] │ │ movs r4, r0 │ │ movs r7, r2 │ │ movs r0, r0 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ mov r0, r2 │ │ - blx d8a60 │ │ + blx d8a70 │ │ adds r0, #1 │ │ ittt ne │ │ movne r0, #4 │ │ strbne r0, [r4, #0] │ │ popne {r4, r6, r7, pc} │ │ - blx d8850 │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ movs r1, #0 │ │ strd r1, r0, [r4] │ │ pop {r4, r6, r7, pc} │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub.w sp, sp, #796 @ 0x31c │ │ ldr.w r8, [r7, #8] │ │ mov r9, r0 │ │ mov fp, r2 │ │ lsrs r0, r2, #7 │ │ cmp r0, #2 │ │ strd r3, r8, [sp, #8] │ │ - bhi.w 95450 │ │ + bhi.w 954bc │ │ add r4, sp, #16 │ │ mov r2, fp │ │ mov sl, r3 │ │ mov r0, r4 │ │ - bl d53c6 │ │ + bl d52ea │ │ add.w ip, fp, #1 │ │ movs r0, #0 │ │ cmp.w fp, #7 │ │ strb.w r0, [r4, fp] │ │ - bcs.n 952da │ │ + bcs.n 95346 │ │ ldrb.w r0, [sp, #16] │ │ cmp r0, #0 │ │ - beq.n 95338 │ │ + beq.n 953a4 │ │ cmp.w fp, #0 │ │ - beq.w 9547c │ │ + beq.w 954e8 │ │ ldrb.w r0, [sp, #17] │ │ cmp r0, #0 │ │ - beq.n 95340 │ │ + beq.n 953ac │ │ cmp.w fp, #1 │ │ - beq.w 9547c │ │ + beq.w 954e8 │ │ ldrb.w r0, [sp, #18] │ │ cmp r0, #0 │ │ - beq.n 95344 │ │ + beq.n 953b0 │ │ cmp.w fp, #2 │ │ - beq.w 9547c │ │ + beq.w 954e8 │ │ ldrb.w r0, [sp, #19] │ │ cmp r0, #0 │ │ - beq.n 95348 │ │ + beq.n 953b4 │ │ cmp.w fp, #3 │ │ - beq.w 9547c │ │ + beq.w 954e8 │ │ ldrb.w r0, [sp, #20] │ │ cmp r0, #0 │ │ - beq.n 9534c │ │ + beq.n 953b8 │ │ cmp.w fp, #4 │ │ - beq.w 9547c │ │ + beq.w 954e8 │ │ ldrb.w r0, [sp, #21] │ │ cmp r0, #0 │ │ - beq.n 95350 │ │ + beq.n 953bc │ │ cmp.w fp, #5 │ │ - beq.w 9547c │ │ + beq.w 954e8 │ │ ldrb.w r0, [sp, #22] │ │ cmp r0, #0 │ │ - bne.w 9547c │ │ + bne.w 954e8 │ │ movs r2, #6 │ │ - b.n 95352 │ │ + b.n 953be │ │ cmp r4, r4 │ │ - bne.n 9530c │ │ + bne.n 95378 │ │ sub.w r2, fp, #7 │ │ movs r1, #0 │ │ movw r3, #256 @ 0x100 │ │ movt r3, #257 @ 0x101 │ │ adds r6, r4, r1 │ │ ldr r0, [r4, r1] │ │ ldr r6, [r6, #4] │ │ subs r5, r3, r6 │ │ orrs r6, r5 │ │ subs r5, r3, r0 │ │ orrs r0, r5 │ │ ands r0, r6 │ │ mvns r0, r0 │ │ tst.w r0, #2155905152 @ 0x80808080 │ │ - bne.n 95320 │ │ + bne.n 9538c │ │ adds r1, #8 │ │ cmp r1, r2 │ │ - bls.n 952ec │ │ - b.n 95320 │ │ + bls.n 95358 │ │ + b.n 9538c │ │ movs r1, #0 │ │ movs r2, #0 │ │ ldrb r0, [r4, r2] │ │ - cbz r0, 95352 │ │ + cbz r0, 953be │ │ adds r2, #1 │ │ - bne.n 95310 │ │ + bne.n 9537c │ │ sub.w r2, fp, #7 │ │ cmp r2, #0 │ │ - bcs.n 952e4 │ │ + bcs.n 95350 │ │ subs.w r2, ip, r1 │ │ - beq.w 9547c │ │ + beq.w 954e8 │ │ adds r0, r4, r1 │ │ movs r3, #0 │ │ ldrb r6, [r0, r3] │ │ - cbz r6, 9533c │ │ + cbz r6, 953a8 │ │ adds r3, #1 │ │ cmp r2, r3 │ │ - bne.n 9532c │ │ - b.n 9547c │ │ + bne.n 95398 │ │ + b.n 954e8 │ │ movs r2, #0 │ │ - b.n 95352 │ │ + b.n 953be │ │ adds r2, r3, r1 │ │ - b.n 95352 │ │ + b.n 953be │ │ movs r2, #1 │ │ - b.n 95352 │ │ + b.n 953be │ │ movs r2, #2 │ │ - b.n 95352 │ │ + b.n 953be │ │ movs r2, #3 │ │ - b.n 95352 │ │ + b.n 953be │ │ movs r2, #4 │ │ - b.n 95352 │ │ + b.n 953be │ │ movs r2, #5 │ │ cmp r2, fp │ │ - bne.w 9547c │ │ + bne.w 954e8 │ │ mov.w r0, r8, lsr #7 │ │ cmp r0, #2 │ │ strd r4, ip, [sp, #400] @ 0x190 │ │ - bhi.w 954a8 │ │ + bhi.w 95514 │ │ add r4, sp, #408 @ 0x198 │ │ mov r1, sl │ │ mov r2, r8 │ │ mov r0, r4 │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #0 │ │ cmp.w r8, #7 │ │ strb.w r0, [r4, r8] │ │ - bcs.n 953de │ │ + bcs.n 9544a │ │ ldrb.w r0, [sp, #408] @ 0x198 │ │ cmp r0, #0 │ │ - beq.n 95438 │ │ + beq.n 954a4 │ │ cmp.w r8, #0 │ │ - beq.n 9547c │ │ + beq.n 954e8 │ │ ldrb.w r0, [sp, #409] @ 0x199 │ │ cmp r0, #0 │ │ - beq.n 95440 │ │ + beq.n 954ac │ │ cmp.w r8, #1 │ │ - beq.n 9547c │ │ + beq.n 954e8 │ │ ldrb.w r0, [sp, #410] @ 0x19a │ │ cmp r0, #0 │ │ - beq.n 95444 │ │ + beq.n 954b0 │ │ cmp.w r8, #2 │ │ - beq.n 9547c │ │ + beq.n 954e8 │ │ ldrb.w r0, [sp, #411] @ 0x19b │ │ cmp r0, #0 │ │ - beq.n 95448 │ │ + beq.n 954b4 │ │ cmp.w r8, #3 │ │ - beq.n 9547c │ │ + beq.n 954e8 │ │ ldrb.w r0, [sp, #412] @ 0x19c │ │ cmp r0, #0 │ │ - beq.n 9544c │ │ + beq.n 954b8 │ │ cmp.w r8, #4 │ │ - beq.n 9547c │ │ + beq.n 954e8 │ │ ldrb.w r0, [sp, #413] @ 0x19d │ │ cmp r0, #0 │ │ - beq.n 9545a │ │ + beq.n 954c6 │ │ cmp.w r8, #5 │ │ - beq.n 9547c │ │ + beq.n 954e8 │ │ ldrb.w r0, [sp, #414] @ 0x19e │ │ cmp r0, #0 │ │ - bne.n 9547c │ │ + bne.n 954e8 │ │ movs r1, #6 │ │ - b.n 9545c │ │ + b.n 954c8 │ │ cmp r4, r4 │ │ - bne.n 9540e │ │ + bne.n 9547a │ │ sub.w r1, r8, #7 │ │ movw r2, #256 @ 0x100 │ │ movt r2, #257 @ 0x101 │ │ adds r6, r4, r0 │ │ ldr r3, [r4, r0] │ │ ldr r6, [r6, #4] │ │ subs r5, r2, r6 │ │ orrs r6, r5 │ │ subs r5, r2, r3 │ │ orrs r3, r5 │ │ ands r3, r6 │ │ mvns r3, r3 │ │ tst.w r3, #2155905152 @ 0x80808080 │ │ - bne.n 95420 │ │ + bne.n 9548c │ │ adds r0, #8 │ │ cmp r0, r1 │ │ - bls.n 953ee │ │ - b.n 95420 │ │ + bls.n 9545a │ │ + b.n 9548c │ │ movs r1, #0 │ │ ldrb r2, [r4, r1] │ │ - cbz r2, 9545c │ │ + cbz r2, 954c8 │ │ adds r1, #1 │ │ - bne.n 95410 │ │ + bne.n 9547c │ │ sub.w r1, r8, #7 │ │ cmp r1, #0 │ │ - bcs.n 953e6 │ │ + bcs.n 95452 │ │ add.w r1, r8, #1 │ │ subs r1, r1, r0 │ │ - beq.n 9547c │ │ + beq.n 954e8 │ │ adds r3, r4, r0 │ │ movs r2, #0 │ │ ldrb r6, [r3, r2] │ │ - cbz r6, 9543c │ │ + cbz r6, 954a8 │ │ adds r2, #1 │ │ cmp r1, r2 │ │ - bne.n 9542c │ │ - b.n 9547c │ │ + bne.n 95498 │ │ + b.n 954e8 │ │ movs r1, #0 │ │ - b.n 9545c │ │ + b.n 954c8 │ │ adds r1, r2, r0 │ │ - b.n 9545c │ │ + b.n 954c8 │ │ movs r1, #1 │ │ - b.n 9545c │ │ + b.n 954c8 │ │ movs r1, #2 │ │ - b.n 9545c │ │ + b.n 954c8 │ │ movs r1, #3 │ │ - b.n 9545c │ │ + b.n 954c8 │ │ movs r1, #4 │ │ - b.n 9545c │ │ - ldr r0, [pc, #120] @ (954cc ) │ │ + b.n 954c8 │ │ + ldr r0, [pc, #120] @ (95538 ) │ │ add r3, sp, #8 │ │ mov r2, fp │ │ add r0, pc │ │ - b.n 954b2 │ │ + b.n 9551e │ │ movs r1, #5 │ │ cmp r1, r8 │ │ - bne.n 9547c │ │ + bne.n 954e8 │ │ add r0, sp, #16 │ │ add r1, sp, #408 @ 0x198 │ │ - blx d8a70 │ │ + blx d8a80 │ │ adds r0, #1 │ │ - beq.n 95492 │ │ + beq.n 954fe │ │ movs r0, #4 │ │ strb.w r0, [r9] │ │ add.w sp, sp, #796 @ 0x31c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #68] @ (954c4 ) │ │ + ldr r0, [pc, #68] @ (95530 ) │ │ add r0, pc │ │ ldrd r0, r1, [r0] │ │ strd r0, r1, [r9] │ │ add.w sp, sp, #796 @ 0x31c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - blx d8850 │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ movs r1, #0 │ │ strd r1, r0, [r9] │ │ add.w sp, sp, #796 @ 0x31c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #28] @ (954c8 ) │ │ + ldr r0, [pc, #28] @ (95534 ) │ │ add r3, sp, #400 @ 0x190 │ │ mov r1, sl │ │ mov r2, r8 │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, r9 │ │ - bl 9451c │ │ + bl 94588 │ │ add.w sp, sp, #796 @ 0x31c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - str r6, [r4, #112] @ 0x70 │ │ + str r2, [r1, #108] @ 0x6c │ │ movs r4, r0 │ │ movs r5, r3 │ │ movs r0, r0 │ │ lsls r7, r3, #2 │ │ movs r0, r0 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ ldr r0, [r1, #0] │ │ mov r1, r2 │ │ - blx d8a70 │ │ + blx d8a80 │ │ adds r0, #1 │ │ ittt ne │ │ movne r0, #4 │ │ strbne r0, [r4, #0] │ │ popne {r4, r6, r7, pc} │ │ - blx d8850 │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ movs r1, #0 │ │ strd r1, r0, [r4] │ │ pop {r4, r6, r7, pc} │ │ - bmi.n 954a2 │ │ + bmi.n 9550e │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #400 @ 0x190 │ │ ldrd r1, sl, [r1] │ │ mov r8, r0 │ │ mov.w r0, sl, lsr #7 │ │ cmp r0, #2 │ │ strd r2, r3, [sp, #8] │ │ - bhi.w 95648 │ │ + bhi.w 956b4 │ │ add r4, sp, #16 │ │ mov r9, r2 │ │ mov r2, sl │ │ mov r0, r4 │ │ - bl d53c6 │ │ + bl d52ea │ │ movs r0, #0 │ │ cmp.w sl, #7 │ │ strb.w r0, [r4, sl] │ │ - bcs.n 9558e │ │ + bcs.n 955fa │ │ ldrb.w r0, [sp, #16] │ │ cmp r0, #0 │ │ - beq.n 955e8 │ │ + beq.n 95654 │ │ cmp.w sl, #0 │ │ - beq.n 95620 │ │ + beq.n 9568c │ │ ldrb.w r0, [sp, #17] │ │ cmp r0, #0 │ │ - beq.n 955f0 │ │ + beq.n 9565c │ │ cmp.w sl, #1 │ │ - beq.n 95620 │ │ + beq.n 9568c │ │ ldrb.w r0, [sp, #18] │ │ cmp r0, #0 │ │ - beq.n 955f4 │ │ + beq.n 95660 │ │ cmp.w sl, #2 │ │ - beq.n 95620 │ │ + beq.n 9568c │ │ ldrb.w r0, [sp, #19] │ │ cmp r0, #0 │ │ - beq.n 955f8 │ │ + beq.n 95664 │ │ cmp.w sl, #3 │ │ - beq.n 95620 │ │ + beq.n 9568c │ │ ldrb.w r0, [sp, #20] │ │ cmp r0, #0 │ │ - beq.n 955fc │ │ + beq.n 95668 │ │ cmp.w sl, #4 │ │ - beq.n 95620 │ │ + beq.n 9568c │ │ ldrb.w r0, [sp, #21] │ │ cmp r0, #0 │ │ - beq.n 95600 │ │ + beq.n 9566c │ │ cmp.w sl, #5 │ │ - beq.n 95620 │ │ + beq.n 9568c │ │ ldrb.w r0, [sp, #22] │ │ cmp r0, #0 │ │ - bne.n 95620 │ │ + bne.n 9568c │ │ movs r1, #6 │ │ - b.n 95602 │ │ + b.n 9566e │ │ cmp r4, r4 │ │ - bne.n 955be │ │ + bne.n 9562a │ │ sub.w r1, sl, #7 │ │ movw r2, #256 @ 0x100 │ │ movt r2, #257 @ 0x101 │ │ adds r5, r4, r0 │ │ ldr r3, [r4, r0] │ │ ldr r5, [r5, #4] │ │ subs r6, r2, r5 │ │ orrs r6, r5 │ │ subs r5, r2, r3 │ │ orrs r3, r5 │ │ ands r3, r6 │ │ mvns r3, r3 │ │ tst.w r3, #2155905152 @ 0x80808080 │ │ - bne.n 955d0 │ │ + bne.n 9563c │ │ adds r0, #8 │ │ cmp r0, r1 │ │ - bls.n 9559e │ │ - b.n 955d0 │ │ + bls.n 9560a │ │ + b.n 9563c │ │ movs r1, #0 │ │ ldrb r2, [r4, r1] │ │ - cbz r2, 95602 │ │ + cbz r2, 9566e │ │ adds r1, #1 │ │ - bne.n 955c0 │ │ + bne.n 9562c │ │ sub.w r1, sl, #7 │ │ cmp r1, #0 │ │ - bcs.n 95596 │ │ + bcs.n 95602 │ │ add.w r1, sl, #1 │ │ subs r1, r1, r0 │ │ - beq.n 95620 │ │ + beq.n 9568c │ │ adds r3, r4, r0 │ │ movs r2, #0 │ │ ldrb r6, [r3, r2] │ │ - cbz r6, 955ec │ │ + cbz r6, 95658 │ │ adds r2, #1 │ │ cmp r1, r2 │ │ - bne.n 955dc │ │ - b.n 95620 │ │ + bne.n 95648 │ │ + b.n 9568c │ │ movs r1, #0 │ │ - b.n 95602 │ │ + b.n 9566e │ │ adds r1, r2, r0 │ │ - b.n 95602 │ │ + b.n 9566e │ │ movs r1, #1 │ │ - b.n 95602 │ │ + b.n 9566e │ │ movs r1, #2 │ │ - b.n 95602 │ │ + b.n 9566e │ │ movs r1, #3 │ │ - b.n 95602 │ │ + b.n 9566e │ │ movs r1, #4 │ │ - b.n 95602 │ │ + b.n 9566e │ │ movs r1, #5 │ │ cmp r1, sl │ │ - bne.n 95620 │ │ + bne.n 9568c │ │ add r1, sp, #16 │ │ mov r0, r9 │ │ - blx d8a70 │ │ + blx d8a80 │ │ adds r0, #1 │ │ - beq.n 95634 │ │ + beq.n 956a0 │ │ movs r0, #4 │ │ strb.w r0, [r8] │ │ add sp, #400 @ 0x190 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #60] @ (95660 ) │ │ + ldr r0, [pc, #60] @ (956cc ) │ │ add r0, pc │ │ ldrd r0, r1, [r0] │ │ strd r0, r1, [r8] │ │ add sp, #400 @ 0x190 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ - blx d8850 │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ movs r1, #0 │ │ strd r1, r0, [r8] │ │ add sp, #400 @ 0x190 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #24] @ (95664 ) │ │ + ldr r0, [pc, #24] @ (956d0 ) │ │ add r3, sp, #8 │ │ mov r2, sl │ │ add r0, pc │ │ str r0, [sp, #0] │ │ mov r0, r8 │ │ - bl 9451c │ │ + bl 94588 │ │ add sp, #400 @ 0x190 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ - str r2, [r0, #88] @ 0x58 │ │ + str r6, [r4, #80] @ 0x50 │ │ movs r4, r0 │ │ mrc2 15, 3, pc, cr15, cr15, {7} │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #24 │ │ - ldr r5, [pc, #276] @ (95788 ) │ │ + ldr r5, [pc, #276] @ (957f4 ) │ │ add r5, pc │ │ ldr r1, [r5, #8] │ │ cmp r1, #0 │ │ - bmi.n 9569c │ │ + bmi.n 95708 │ │ bics.w r0, r1, #3221225472 @ 0xc0000000 │ │ - beq.n 9569c │ │ + beq.n 95708 │ │ mvn.w r0, #98 @ 0x62 │ │ yield │ │ ldr r1, [r5, #8] │ │ cmp r1, #0 │ │ - bmi.n 9569c │ │ + bmi.n 95708 │ │ bics.w r2, r1, #3221225472 @ 0xc0000000 │ │ - beq.n 9569c │ │ + beq.n 95708 │ │ adds r2, r0, #1 │ │ cmp r0, #0 │ │ mov r0, r2 │ │ - bne.n 95686 │ │ + bne.n 956f2 │ │ add.w r8, sp, #12 │ │ mvn.w r0, #3221225472 @ 0xc0000000 │ │ movs r6, #0 │ │ mov.w r9, #4294967295 @ 0xffffffff │ │ - b.n 956b8 │ │ + b.n 95724 │ │ movs r1, #0 │ │ clrex │ │ cmp r1, #0 │ │ - beq.n 9577c │ │ - b.n 956dc │ │ + beq.n 957e8 │ │ + b.n 95748 │ │ lsls r2, r1, #2 │ │ - beq.n 9575a │ │ + beq.n 957c6 │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ - ble.n 956dc │ │ + ble.n 95748 │ │ orr.w r3, r1, #2147483648 @ 0x80000000 │ │ ldrex r2, [r5, #8] │ │ cmp r2, r1 │ │ - bne.n 956ac │ │ + bne.n 95718 │ │ strex r4, r3, [r5, #8] │ │ cmp r4, #0 │ │ - bne.n 956c6 │ │ + bne.n 95732 │ │ movs r1, #1 │ │ cmp r1, #0 │ │ - beq.n 9577c │ │ + beq.n 957e8 │ │ ldr r4, [r5, #12] │ │ dmb ish │ │ ldr r1, [r5, #8] │ │ mvn.w r0, #1073741824 @ 0x40000000 │ │ cmp.w r1, #4294967295 @ 0xffffffff │ │ - bgt.n 956b8 │ │ + bgt.n 95724 │ │ bics.w r2, r1, #3221225472 @ 0xc0000000 │ │ - beq.n 956b8 │ │ + beq.n 95724 │ │ str r6, [sp, #12] │ │ ldr r0, [r5, #12] │ │ cmp r0, r4 │ │ - bne.n 95728 │ │ + bne.n 95794 │ │ ldr r0, [sp, #12] │ │ add.w r1, r5, #12 │ │ movs r2, #137 @ 0x89 │ │ mov r3, r4 │ │ cmp r0, #0 │ │ it ne │ │ addne.w r0, r8, #4 │ │ stmia.w sp, {r0, r6, r9} │ │ movs r0, #240 @ 0xf0 │ │ - blx d87d0 │ │ + blx d87e0 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 95728 │ │ - blx d8850 │ │ + bgt.n 95794 │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ cmp r0, #4 │ │ - beq.n 956f6 │ │ + beq.n 95762 │ │ ldr r1, [r5, #8] │ │ mvn.w r0, #1073741824 @ 0x40000000 │ │ cmp r1, #0 │ │ - bmi.n 956b8 │ │ + bmi.n 95724 │ │ bics.w r2, r1, #3221225472 @ 0xc0000000 │ │ - beq.n 956b8 │ │ + beq.n 95724 │ │ mvn.w r2, #98 @ 0x62 │ │ yield │ │ adds r3, r2, #1 │ │ ldr r1, [r5, #8] │ │ mvn.w r0, #1073741824 @ 0x40000000 │ │ bic.w r4, r1, #3221225472 @ 0xc0000000 │ │ cmp r1, #0 │ │ - bmi.n 956b8 │ │ + bmi.n 95724 │ │ cmp r4, #0 │ │ - beq.n 956b8 │ │ + beq.n 95724 │ │ cmp r2, #0 │ │ mov r2, r3 │ │ - bne.n 9573c │ │ - b.n 956b8 │ │ + bne.n 957a8 │ │ + b.n 95724 │ │ ldrex r2, [r5, #8] │ │ cmp r2, r1 │ │ - bne.n 95774 │ │ + bne.n 957e0 │ │ orrs r1, r0 │ │ strex r3, r1, [r5, #8] │ │ - cbnz r3, 95778 │ │ + cbnz r3, 957e4 │ │ dmb ish │ │ movs r1, #1 │ │ - cbz r1, 9577c │ │ - b.n 95780 │ │ + cbz r1, 957e8 │ │ + b.n 957ec │ │ clrex │ │ movs r1, #0 │ │ - cbnz r1, 95780 │ │ + cbnz r1, 957ec │ │ mov r1, r2 │ │ - b.n 956b8 │ │ + b.n 95724 │ │ add sp, #24 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - strh r0, [r5, #18] │ │ + strh r4, [r1, #16] │ │ movs r4, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #48 @ 0x30 │ │ mov r4, r0 │ │ movs r0, #4 │ │ strb.w r0, [sp, #16] │ │ - ldr r6, [pc, #336] @ (958f0 ) │ │ + ldr r6, [pc, #336] @ (9595c ) │ │ add r6, pc │ │ ldr r0, [r6, #4] │ │ dmb ish │ │ - cbnz r0, 957ba │ │ + cbnz r0, 95826 │ │ ldrd r0, r1, [sp, #16] │ │ strd r0, r1, [r4] │ │ add sp, #48 @ 0x30 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ add r0, sp, #16 │ │ str r0, [sp, #32] │ │ @@ -165164,126 +165079,126 @@ │ │ mov.w r9, #0 │ │ mov.w sl, #4294967295 @ 0xffffffff │ │ dmb ish │ │ and.w r2, r0, #3 │ │ and.w r3, r0, #4 │ │ subs r1, r2, #2 │ │ cmp r1, #2 │ │ - bcs.n 957fa │ │ + bcs.n 95866 │ │ ldrex r2, [r6, #4] │ │ cmp r2, r0 │ │ - bne.n 95816 │ │ + bne.n 95882 │ │ orr.w r0, r3, #1 │ │ strex r3, r0, [r6, #4] │ │ - cbnz r3, 9581a │ │ + cbnz r3, 95886 │ │ movs r0, #1 │ │ - b.n 9581c │ │ + b.n 95888 │ │ cmp r2, #1 │ │ - bne.n 957aa │ │ - cbnz r3, 95828 │ │ + bne.n 95816 │ │ + cbnz r3, 95894 │ │ orr.w r5, r0, #4 │ │ ldrex r0, [r6, #4] │ │ cmp r0, #1 │ │ - bne.n 9582c │ │ + bne.n 95898 │ │ strex r1, r5, [r6, #4] │ │ - cbnz r1, 95830 │ │ + cbnz r1, 9589c │ │ movs r1, #1 │ │ - b.n 95836 │ │ + b.n 958a2 │ │ clrex │ │ movs r0, #0 │ │ cmp r0, #0 │ │ mov r0, r2 │ │ dmb ish │ │ - beq.n 957d6 │ │ - b.n 95876 │ │ + beq.n 95842 │ │ + b.n 958e2 │ │ mov r5, r0 │ │ - b.n 9583a │ │ + b.n 958a6 │ │ clrex │ │ movs r1, #0 │ │ dmb ish │ │ cmp r1, #0 │ │ - beq.n 957d6 │ │ + beq.n 95842 │ │ str.w r9, [sp, #36] @ 0x24 │ │ ldr r0, [r6, #4] │ │ cmp r0, r5 │ │ - bne.n 9586e │ │ + bne.n 958da │ │ ldr r0, [sp, #36] @ 0x24 │ │ mov r3, r5 │ │ cmp r0, #0 │ │ it ne │ │ addne.w r0, r8, #4 │ │ adds r1, r6, #4 │ │ stmia.w sp, {r0, r9, sl} │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #137 @ 0x89 │ │ - blx d87d0 │ │ + blx d87e0 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 9586e │ │ - blx d8850 │ │ + bgt.n 958da │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ cmp r0, #4 │ │ - beq.n 9583e │ │ + beq.n 958aa │ │ ldr r0, [r6, #4] │ │ dmb ish │ │ - b.n 957d6 │ │ + b.n 95842 │ │ movs r0, #0 │ │ str r0, [sp, #36] @ 0x24 │ │ clz r0, r1 │ │ lsrs r0, r0, #5 │ │ strb.w r0, [sp, #40] @ 0x28 │ │ add r0, sp, #28 │ │ add r1, sp, #36 @ 0x24 │ │ - bl 958f4 │ │ + bl 95960 │ │ ldr r0, [sp, #36] @ 0x24 │ │ dmb ish │ │ ldrex r1, [r6, #4] │ │ strex r2, r0, [r6, #4] │ │ cmp r2, #0 │ │ - bne.n 95892 │ │ + bne.n 958fe │ │ lsls r0, r1, #29 │ │ - bpl.w 957aa │ │ + bpl.w 95816 │ │ adds r1, r6, #4 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ mvn.w r3, #2147483648 @ 0x80000000 │ │ - blx d87d0 │ │ - b.n 957aa │ │ + blx d87e0 │ │ + b.n 95816 │ │ mov r4, r0 │ │ movs r0, #2 │ │ dmb ish │ │ ldrex r1, [r6, #4] │ │ strex r2, r0, [r6, #4] │ │ cmp r2, #0 │ │ - bne.n 958bc │ │ + bne.n 95928 │ │ lsls r0, r1, #29 │ │ - bpl.n 958da │ │ + bpl.n 95946 │ │ adds r1, r6, #4 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ mvn.w r3, #2147483648 @ 0x80000000 │ │ - blx d87d0 │ │ + blx d87e0 │ │ ldr r1, [sp, #20] │ │ ldrb.w r0, [sp, #16] │ │ - bl 77378 │ │ + bl 773e0 │ │ mov r0, r4 │ │ - blx d6dd0 │ │ - bl 416fe │ │ + blx d6de0 │ │ + bl 41a06 │ │ nop │ │ - strh r4, [r3, #56] @ 0x38 │ │ + strh r0, [r0, #54] @ 0x36 │ │ movs r4, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #412 @ 0x19c │ │ ldrd r5, sl, [r0] │ │ mov r9, r1 │ │ movs r1, #0 │ │ cmp r5, #0 │ │ str r1, [r0, #0] │ │ - beq.w 95a14 │ │ + beq.w 95a80 │ │ mov.w r0, #438 @ 0x1b6 │ │ str.w r1, [sp, #10] │ │ strh.w r0, [sp, #8] │ │ movs r0, #1 │ │ strb.w r0, [sp, #10] │ │ movw r0, #25710 @ 0x646e │ │ movt r0, #28015 @ 0x6d6f │ │ @@ -165295,19 +165210,19 @@ │ │ str r0, [sp, #28] │ │ add r0, sp, #24 │ │ cmp r0, r0 │ │ str r1, [sp, #4] │ │ strh.w r1, [sp, #14] │ │ str r2, [sp, #24] │ │ strb.w r1, [sp, #36] @ 0x24 │ │ - beq.n 95958 │ │ + beq.n 959c4 │ │ ldrb r2, [r0, r1] │ │ - cbz r2, 95992 │ │ + cbz r2, 959fe │ │ adds r1, #1 │ │ - bne.n 9594e │ │ + bne.n 959ba │ │ ldr r2, [sp, #24] │ │ movw r1, #256 @ 0x100 │ │ ldr r3, [sp, #28] │ │ movt r1, #257 @ 0x101 │ │ subs r6, r1, r2 │ │ subs r1, r1, r3 │ │ orrs r2, r6 │ │ @@ -165318,743 +165233,743 @@ │ │ mov.w r2, #0 │ │ mov.w r1, #0 │ │ it eq │ │ moveq r2, #8 │ │ add r0, r2 │ │ eor.w r3, r2, #13 │ │ ldrb r6, [r0, r1] │ │ - cbz r6, 95990 │ │ + cbz r6, 959fc │ │ adds r1, #1 │ │ cmp r3, r1 │ │ - bne.n 95984 │ │ - b.n 959f6 │ │ + bne.n 959f0 │ │ + b.n 95a62 │ │ add r1, r2 │ │ cmp r1, #12 │ │ - bne.n 959f6 │ │ + bne.n 95a62 │ │ add r0, sp, #16 │ │ add r1, sp, #24 │ │ add r2, sp, #4 │ │ - bl 7a9d4 │ │ + bl 7aa3c │ │ ldrb.w r0, [sp, #16] │ │ cmp r0, #4 │ │ - beq.n 95a08 │ │ + beq.n 95a74 │ │ ldrd r6, r4, [sp, #16] │ │ uxtb r0, r6 │ │ cmp r0, #4 │ │ - beq.n 95a0a │ │ + beq.n 95a76 │ │ ldrb.w r0, [sl] │ │ cmp r0, #4 │ │ - beq.n 959e0 │ │ + beq.n 95a4c │ │ cmp r0, #3 │ │ - bne.n 959e0 │ │ + bne.n 95a4c │ │ ldr.w fp, [sl, #4] │ │ ldrd r8, r5, [fp] │ │ ldr r1, [r5, #0] │ │ - cbz r1, 959ce │ │ + cbz r1, 95a3a │ │ mov r0, r8 │ │ blx r1 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, fp │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r0, #2 │ │ str.w r6, [sl] │ │ str.w r0, [r9] │ │ str.w r4, [sl, #4] │ │ add sp, #412 @ 0x19c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #68] @ (95a3c ) │ │ + ldr r0, [pc, #68] @ (95aa8 ) │ │ add r0, pc │ │ ldrd r0, r1, [r0] │ │ strd r0, r1, [sp, #16] │ │ uxtb r0, r0 │ │ cmp r0, #4 │ │ - bne.n 959a8 │ │ + bne.n 95a14 │ │ ldr r4, [sp, #20] │ │ str r4, [r5, #0] │ │ add sp, #412 @ 0x19c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r0, [pc, #40] @ (95a40 ) │ │ + ldr r0, [pc, #40] @ (95aac ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ mov r9, r0 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, fp │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r9 │ │ strd r6, r4, [sl] │ │ - blx d6dd0 │ │ + blx d6de0 │ │ nop │ │ - str r4, [r5, #24] │ │ + str r0, [r2, #20] │ │ movs r4, r0 │ │ - str r6, [r3, #32] │ │ + str r2, [r0, #28] │ │ movs r4, r0 │ │ push {r3, r4, r5, r6, r7, lr} │ │ add r7, sp, #16 │ │ strd r0, r1, [sp, #8] │ │ str r2, [sp, #0] │ │ add r0, sp, #8 │ │ add r2, sp, #12 │ │ - ldr r1, [pc, #8] @ (95a5c ) │ │ + ldr r1, [pc, #8] @ (95ac8 ) │ │ add r1, pc │ │ mov r3, r1 │ │ - bl 409d8 │ │ - str r0, [r7, #48] @ 0x30 │ │ + bl 40ce0 │ │ + str r4, [r3, #44] @ 0x2c │ │ movs r4, r0 │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #8 │ │ - blx d88d0 │ │ + blx d88e0 │ │ cmp r0, #0 │ │ str r0, [sp, #4] │ │ itt eq │ │ addeq sp, #8 │ │ popeq {r7, pc} │ │ - ldr r1, [pc, #12] @ (95a84 ) │ │ + ldr r1, [pc, #12] @ (95af0 ) │ │ add r0, sp, #4 │ │ - ldr r2, [pc, #12] @ (95a88 ) │ │ + ldr r2, [pc, #12] @ (95af4 ) │ │ add r1, pc │ │ add r2, pc │ │ - bl 95a44 │ │ + bl 95ab0 │ │ nop │ │ - lsls r2, r1, #30 │ │ - vrev16.32 d22, d12 │ │ + lsls r6, r3, #28 │ │ + vshr.u64 d22, d16, #8 │ │ movs r4, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #20 │ │ ldr r5, [r0, #0] │ │ mov r8, r0 │ │ ldrex r0, [r5] │ │ adds r1, r0, #1 │ │ strex r2, r1, [r5] │ │ cmp r2, #0 │ │ - bne.n 95a9a │ │ + bne.n 95b06 │ │ cmp r0, #0 │ │ - bmi.w 95bea │ │ - ldr r6, [pc, #400] @ (95c40 ) │ │ + bmi.w 95c56 │ │ + ldr r6, [pc, #400] @ (95cac ) │ │ add r6, pc │ │ ldr r0, [r6, #56] @ 0x38 │ │ dmb ish │ │ - cbnz r0, 95ac2 │ │ + cbnz r0, 95b2e │ │ add.w r0, r6, #56 @ 0x38 │ │ - bl 7740c │ │ - blx d8830 │ │ - cbnz r0, 95b0e │ │ + bl 77474 │ │ + blx d8840 │ │ + cbnz r0, 95b7a │ │ ldr r0, [r6, #40] @ 0x28 │ │ dmb ish │ │ - cbnz r0, 95ad8 │ │ + cbnz r0, 95b44 │ │ add.w r0, r6, #40 @ 0x28 │ │ - bl 7740c │ │ - blx d8830 │ │ + bl 77474 │ │ + blx d8840 │ │ mov r4, r0 │ │ ldr r0, [r6, #48] @ 0x30 │ │ dmb ish │ │ - cbnz r0, 95aee │ │ + cbnz r0, 95b5a │ │ add.w r0, r6, #48 @ 0x30 │ │ - bl 7740c │ │ - blx d8830 │ │ + bl 77474 │ │ + blx d8840 │ │ mov sl, r5 │ │ orrs.w r1, r4, r0 │ │ ldr.w fp, [sl, #8]! │ │ ldr.w r9, [sl, #4] │ │ - beq.n 95b30 │ │ + beq.n 95b9c │ │ eor.w r1, r4, fp │ │ eor.w r0, r0, r9 │ │ orrs r0, r1 │ │ - beq.n 95b5c │ │ - ldr r2, [pc, #308] @ (95c44 ) │ │ + beq.n 95bc8 │ │ + ldr r2, [pc, #308] @ (95cb0 ) │ │ add r2, pc │ │ add r0, sp, #8 │ │ sub.w r1, r7, #29 │ │ movs r3, #171 @ 0xab │ │ - bl 772b8 │ │ + bl 77320 │ │ ldrb.w r0, [sp, #8] │ │ cmp r0, #4 │ │ - beq.n 95b2c │ │ + beq.n 95b98 │ │ add r0, sp, #8 │ │ - bl 777de │ │ - bl 773ce │ │ + bl 77846 │ │ + bl 77436 │ │ ldr r0, [r6, #40] @ 0x28 │ │ dmb ish │ │ - cbnz r0, 95b40 │ │ + cbnz r0, 95bac │ │ add.w r0, r6, #40 @ 0x28 │ │ - bl 7740c │ │ + bl 77474 │ │ mov r1, fp │ │ - blx d8840 │ │ + blx d8850 │ │ ldr r0, [r6, #48] @ 0x30 │ │ dmb ish │ │ - cbnz r0, 95b56 │ │ + cbnz r0, 95bc2 │ │ add.w r0, r6, #48 @ 0x30 │ │ - bl 7740c │ │ + bl 77474 │ │ mov r1, r9 │ │ - blx d8840 │ │ - ldr r0, [pc, #232] @ (95c48 ) │ │ + blx d8850 │ │ + ldr r0, [pc, #232] @ (95cb4 ) │ │ add r0, pc │ │ ldr r0, [r0, #0] │ │ dmb ish │ │ - cbnz r0, 95b70 │ │ - ldr r0, [pc, #224] @ (95c4c ) │ │ + cbnz r0, 95bdc │ │ + ldr r0, [pc, #224] @ (95cb8 ) │ │ add r0, pc │ │ - bl 7740c │ │ + bl 77474 │ │ movs r1, #1 │ │ - blx d8840 │ │ + blx d8850 │ │ ldr r0, [r6, #56] @ 0x38 │ │ dmb ish │ │ - cbnz r0, 95b86 │ │ + cbnz r0, 95bf2 │ │ add.w r0, r6, #56 @ 0x38 │ │ - bl 7740c │ │ + bl 77474 │ │ mov r1, sl │ │ - blx d8840 │ │ + blx d8850 │ │ ldr.w r6, [r8] │ │ ldr r1, [r6, #16] │ │ - cbz r1, 95ba2 │ │ + cbz r1, 95c0e │ │ movs r0, #0 │ │ movs r2, #0 │ │ str r0, [sp, #0] │ │ movs r0, #15 │ │ movs r3, #0 │ │ - blx d8a80 │ │ + blx d8a90 │ │ ldrd r4, r5, [r8, #4] │ │ dmb ish │ │ ldrex r0, [r6] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r6] │ │ cmp r2, #0 │ │ - bne.n 95baa │ │ + bne.n 95c16 │ │ cmp r0, #1 │ │ - bne.n 95bc8 │ │ + bne.n 95c34 │ │ dmb ish │ │ ldr.w r0, [r8] │ │ - bl 77604 │ │ + bl 7766c │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r1, [r5, #12] │ │ mov r0, r4 │ │ blx r1 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ movs r0, #0 │ │ add sp, #20 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ udf #254 @ 0xfe │ │ - b.n 95c30 │ │ + b.n 95c9c │ │ ldr r0, [r5, #4] │ │ - cbz r0, 95c36 │ │ + cbz r0, 95ca2 │ │ mov r0, r4 │ │ - blx d87c0 │ │ - bl 416f6 │ │ + blx d87d0 │ │ + bl 419fe │ │ dmb ish │ │ ldrex r0, [r5] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r5] │ │ cmp r2, #0 │ │ - bne.n 95c00 │ │ - b.n 95c22 │ │ + bne.n 95c6c │ │ + b.n 95c8e │ │ dmb ish │ │ ldrex r0, [r5] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r5] │ │ cmp r2, #0 │ │ - bne.n 95c14 │ │ + bne.n 95c80 │ │ cmp r0, #1 │ │ - bne.n 95c30 │ │ + bne.n 95c9c │ │ mov r0, r5 │ │ dmb ish │ │ - bl 77604 │ │ + bl 7766c │ │ mov r0, r8 │ │ - bl 95c50 │ │ - bl 416f6 │ │ - bl 416fe │ │ + bl 95cbc │ │ + bl 419fe │ │ + bl 41a06 │ │ nop │ │ - ldrh r4, [r4, #38] @ 0x26 │ │ + ldrh r0, [r3, #36] @ 0x24 │ │ movs r4, r0 │ │ - adds r3, #161 @ 0xa1 │ │ - vrsra.u32 d24, d30, #8 │ │ + adds r3, #53 @ 0x35 │ │ + vpaddl.u32 q12, q9 │ │ movs r4, r0 │ │ - strh r2, [r6, #24] │ │ + strh r6, [r2, #22] │ │ movs r4, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ mov r4, r0 │ │ ldr r0, [r0, #0] │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 95c60 │ │ + bne.n 95ccc │ │ cmp r1, #1 │ │ - bne.n 95c7c │ │ + bne.n 95ce8 │ │ dmb ish │ │ ldr r0, [r4, #0] │ │ - bl 77604 │ │ + bl 7766c │ │ ldrd r5, r6, [r4, #4] │ │ ldr r1, [r6, #0] │ │ - cbz r1, 95c88 │ │ + cbz r1, 95cf4 │ │ mov r0, r5 │ │ blx r1 │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ mov r8, r0 │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r8 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #24 │ │ mov r4, r1 │ │ ldr r1, [r1, #8] │ │ ldr r0, [r0, #0] │ │ lsls r2, r1, #6 │ │ - bmi.n 95d08 │ │ + bmi.n 95d74 │ │ lsls r1, r1, #5 │ │ - bmi.n 95d28 │ │ + bmi.n 95d94 │ │ ldr r6, [r0, #0] │ │ sub.w r5, r7, #26 │ │ mov r1, r5 │ │ cmp r6, #0 │ │ mov r0, r6 │ │ it mi │ │ negmi r0, r6 │ │ - bl 40458 │ │ + bl 40760 │ │ rsb r1, r0, #10 │ │ add r0, r5 │ │ movs r2, #1 │ │ movs r3, #0 │ │ strd r0, r1, [sp] │ │ mvns r0, r6 │ │ lsrs r1, r0, #31 │ │ mov r0, r4 │ │ - bl 3f0a0 │ │ + bl 3f3a8 │ │ add sp, #24 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r1, [r0, #0] │ │ sub.w r0, r7, #26 │ │ - ldr r2, [pc, #88] @ (95d68 ) │ │ + ldr r2, [pc, #88] @ (95dd4 ) │ │ movs r6, #7 │ │ add r2, pc │ │ mov r3, r6 │ │ and.w r6, r1, #15 │ │ lsrs r1, r1, #4 │ │ ldrb r6, [r2, r6] │ │ strb r6, [r0, r3] │ │ sub.w r6, r3, #1 │ │ - bne.n 95d14 │ │ - b.n 95d46 │ │ + bne.n 95d80 │ │ + b.n 95db2 │ │ ldr r1, [r0, #0] │ │ sub.w r0, r7, #26 │ │ - ldr r2, [pc, #60] @ (95d6c ) │ │ + ldr r2, [pc, #60] @ (95dd8 ) │ │ movs r6, #7 │ │ add r2, pc │ │ mov r3, r6 │ │ and.w r6, r1, #15 │ │ lsrs r1, r1, #4 │ │ ldrb r6, [r2, r6] │ │ strb r6, [r0, r3] │ │ sub.w r6, r3, #1 │ │ - bne.n 95d34 │ │ + bne.n 95da0 │ │ adds r1, r3, #1 │ │ - ldr r2, [pc, #36] @ (95d70 ) │ │ + ldr r2, [pc, #36] @ (95ddc ) │ │ rsb r1, r1, #9 │ │ add r0, r3 │ │ add r2, pc │ │ movs r3, #2 │ │ strd r0, r1, [sp] │ │ mov r0, r4 │ │ movs r1, #1 │ │ - bl 3f0a0 │ │ + bl 3f3a8 │ │ add sp, #24 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - ldmia r4, {r1, r3, r4, r5, r6, r7} │ │ - @ instruction: 0xfff7cbfa │ │ - vrsqrte.f16 d17, d5 │ │ + ldmia r4!, {r1, r2, r3, r7} │ │ + vtbl.8 d28, {d23-d26}, d14 │ │ + vsli.32 d17, d8, #23 │ │ vsli.64 , q8, #56 @ 0x38 │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #16 │ │ - ldr r5, [pc, #344] @ (95ed8 ) │ │ + ldr r5, [pc, #344] @ (95f44 ) │ │ add r5, pc │ │ ldr r0, [r5, #56] @ 0x38 │ │ dmb ish │ │ cmp r0, #0 │ │ itt eq │ │ addeq.w r0, r5, #56 @ 0x38 │ │ - bleq 7740c │ │ - blx d8830 │ │ + bleq 77474 │ │ + blx d8840 │ │ cmp r0, #2 │ │ - bls.n 95db4 │ │ + bls.n 95e20 │ │ sub.w r4, r0, #8 │ │ ldrex r0, [r4] │ │ adds r1, r0, #1 │ │ strex r2, r1, [r4] │ │ cmp r2, #0 │ │ - bne.n 95da0 │ │ + bne.n 95e0c │ │ cmp r0, #0 │ │ - bpl.n 95dfa │ │ + bpl.n 95e66 │ │ udf #254 @ 0xfe │ │ - bne.n 95e80 │ │ + bne.n 95eec │ │ ldr r0, [r5, #40] @ 0x28 │ │ dmb ish │ │ cmp r0, #0 │ │ itt eq │ │ addeq.w r0, r5, #40 @ 0x28 │ │ - bleq 7740c │ │ - blx d8830 │ │ + bleq 77474 │ │ + blx d8840 │ │ mov r4, r0 │ │ ldr r0, [r5, #48] @ 0x30 │ │ dmb ish │ │ cmp r0, #0 │ │ itt eq │ │ addeq.w r0, r5, #48 @ 0x30 │ │ - bleq 7740c │ │ - blx d8830 │ │ + bleq 77474 │ │ + blx d8840 │ │ mov r1, r0 │ │ orrs r0, r4 │ │ - beq.n 95e78 │ │ + beq.n 95ee4 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ add r2, sp, #4 │ │ str r0, [sp, #4] │ │ mov r0, r4 │ │ - bl 96014 │ │ + bl 96080 │ │ mov r4, r0 │ │ - ldr r0, [pc, #224] @ (95edc ) │ │ + ldr r0, [pc, #224] @ (95f48 ) │ │ str r4, [sp, #4] │ │ add r0, pc │ │ ldr r6, [r0, #0] │ │ dmb ish │ │ - cbnz r6, 95e0e │ │ - bl 7740c │ │ + cbnz r6, 95e7a │ │ + bl 77474 │ │ mov r6, r0 │ │ mov r0, r6 │ │ - blx d8830 │ │ + blx d8840 │ │ mov r5, r0 │ │ cmp r0, #1 │ │ - bhi.n 95e48 │ │ - beq.n 95e90 │ │ + bhi.n 95eb4 │ │ + beq.n 95efc │ │ movs r0, #8 │ │ - blx d87f0 │ │ - cbz r0, 95e86 │ │ + blx d8810 │ │ + cbz r0, 95ef2 │ │ mov r5, r0 │ │ str r6, [r0, #4] │ │ movs r0, #0 │ │ strb r0, [r5, #0] │ │ mov r0, r6 │ │ - blx d8830 │ │ + blx d8840 │ │ mov r8, r0 │ │ mov r0, r6 │ │ mov r1, r5 │ │ - blx d8840 │ │ + blx d8850 │ │ cmp.w r8, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ movs r0, #24 │ │ str r4, [sp, #4] │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ itttt ne │ │ movne r1, #0 │ │ movne r2, #1 │ │ strdne r2, r2, [r0] │ │ strdne r4, r1, [r0, #8] │ │ itttt ne │ │ strdne r1, r5, [r0, #16] │ │ addne sp, #16 │ │ ldrne.w r8, [sp], #4 │ │ popne {r4, r5, r6, r7, pc} │ │ movs r0, #4 │ │ movs r1, #24 │ │ - bl 3de2a │ │ - b.n 95db2 │ │ - bl 94678 │ │ - mov r4, r0 │ │ - b.n 95dea │ │ - bl 95ee4 │ │ - b.n 95df8 │ │ + bl 3e132 │ │ + b.n 95e1e │ │ + bl 946e4 │ │ + mov r4, r0 │ │ + b.n 95e56 │ │ + bl 95f50 │ │ + b.n 95e64 │ │ movs r0, #4 │ │ movs r1, #8 │ │ - bl 3de2a │ │ - b.n 95db2 │ │ - ldr r0, [pc, #76] @ (95ee0 ) │ │ + bl 3e132 │ │ + b.n 95e1e │ │ + ldr r0, [pc, #76] @ (95f4c ) │ │ add r0, pc │ │ - bl 774bc │ │ - b.n 95db2 │ │ + bl 77524 │ │ + b.n 95e1e │ │ dmb ish │ │ ldrex r1, [r4] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r4] │ │ cmp r3, #0 │ │ - bne.n 95e9e │ │ - b.n 95ec0 │ │ + bne.n 95f0a │ │ + b.n 95f2c │ │ dmb ish │ │ ldrex r1, [r4] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r4] │ │ cmp r3, #0 │ │ - bne.n 95eb2 │ │ + bne.n 95f1e │ │ cmp r1, #1 │ │ - bne.n 95ed4 │ │ + bne.n 95f40 │ │ mov r4, r0 │ │ add r0, sp, #4 │ │ dmb ish │ │ ldr r0, [r0, #0] │ │ - bl 77604 │ │ + bl 7766c │ │ mov r0, r4 │ │ - blx d6dd0 │ │ - ldrh r4, [r2, #16] │ │ + blx d6de0 │ │ + ldrh r0, [r1, #14] │ │ movs r4, r0 │ │ - strh r6, [r5, #4] │ │ + strh r2, [r2, #2] │ │ movs r4, r0 │ │ - str r6, [r6, #36] @ 0x24 │ │ + str r2, [r3, #32] │ │ movs r4, r0 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ cmp r0, #0 │ │ - bne.n 95fa0 │ │ - ldr r5, [pc, #276] @ (96004 ) │ │ + bne.n 9600c │ │ + ldr r5, [pc, #276] @ (96070 ) │ │ add r5, pc │ │ ldr r0, [r5, #56] @ 0x38 │ │ dmb ish │ │ cmp r0, #0 │ │ itt eq │ │ addeq.w r0, r5, #56 @ 0x38 │ │ - bleq 7740c │ │ + bleq 77474 │ │ movs r1, #1 │ │ - blx d8840 │ │ + blx d8850 │ │ ldr r0, [r5, #40] @ 0x28 │ │ dmb ish │ │ cmp r0, #0 │ │ itt eq │ │ addeq.w r0, r5, #40 @ 0x28 │ │ - bleq 7740c │ │ - blx d8830 │ │ + bleq 77474 │ │ + blx d8840 │ │ mov r4, r0 │ │ ldr r0, [r5, #48] @ 0x30 │ │ dmb ish │ │ cmp r0, #0 │ │ itt eq │ │ addeq.w r0, r5, #48 @ 0x30 │ │ - bleq 7740c │ │ - blx d8830 │ │ + bleq 77474 │ │ + blx d8840 │ │ mov r1, r0 │ │ orrs r0, r4 │ │ - beq.n 95f98 │ │ + beq.n 96004 │ │ mov.w r0, #2147483648 @ 0x80000000 │ │ mov r2, sp │ │ str r0, [sp, #0] │ │ mov r0, r4 │ │ - bl 96014 │ │ + bl 96080 │ │ mov r4, r0 │ │ - ldr r0, [pc, #184] @ (96008 ) │ │ + ldr r0, [pc, #184] @ (96074 ) │ │ add r0, pc │ │ ldr r0, [r0, #0] │ │ dmb ish │ │ - cbnz r0, 95f62 │ │ - ldr r0, [pc, #176] @ (9600c ) │ │ + cbnz r0, 95fce │ │ + ldr r0, [pc, #176] @ (96078 ) │ │ add r0, pc │ │ - bl 7740c │ │ + bl 77474 │ │ movs r1, #1 │ │ - blx d8840 │ │ + blx d8850 │ │ ldrex r0, [r4] │ │ adds r1, r0, #1 │ │ strex r2, r1, [r4] │ │ cmp r2, #0 │ │ - bne.n 95f68 │ │ + bne.n 95fd4 │ │ cmp r0, #0 │ │ - bmi.n 95fd0 │ │ + bmi.n 9603c │ │ ldr r0, [r5, #56] @ 0x38 │ │ dmb ish │ │ - cbnz r0, 95f8a │ │ + cbnz r0, 95ff6 │ │ add.w r0, r5, #56 @ 0x38 │ │ - bl 7740c │ │ + bl 77474 │ │ add.w r1, r4, #8 │ │ - blx d8840 │ │ + blx d8850 │ │ mov r0, r4 │ │ add sp, #16 │ │ pop {r4, r5, r7, pc} │ │ - bl 94678 │ │ + bl 946e4 │ │ mov r4, r0 │ │ - b.n 95f3e │ │ + b.n 95faa │ │ cmp r0, #1 │ │ - bne.n 95fc2 │ │ - ldr r2, [pc, #104] @ (96010 ) │ │ + bne.n 9602e │ │ + ldr r2, [pc, #104] @ (9607c ) │ │ sub.w r1, r7, #9 │ │ mov r0, sp │ │ movs r3, #243 @ 0xf3 │ │ add r2, pc │ │ - bl 772b8 │ │ + bl 77320 │ │ ldr r1, [sp, #4] │ │ ldrb.w r0, [sp] │ │ - bl 77378 │ │ - bl 773ce │ │ - ldr r0, [pc, #56] @ (95ffc ) │ │ + bl 773e0 │ │ + bl 77436 │ │ + ldr r0, [pc, #56] @ (96068 ) │ │ movs r1, #189 @ 0xbd │ │ - ldr r2, [pc, #56] @ (96000 ) │ │ + ldr r2, [pc, #56] @ (9606c ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa58 │ │ + bl 3fd60 │ │ udf #254 @ 0xfe │ │ mov r5, r0 │ │ dmb ish │ │ ldrex r0, [r4] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r4] │ │ cmp r2, #0 │ │ - bne.n 95fd8 │ │ + bne.n 96044 │ │ cmp r0, #1 │ │ - bne.n 95ff4 │ │ + bne.n 96060 │ │ mov r0, r4 │ │ dmb ish │ │ - bl 77604 │ │ + bl 7766c │ │ mov r0, r5 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ nop │ │ - cmp r6, #18 │ │ - vqdmulh.s , q12, d2[0] │ │ + cmp r5, #166 @ 0xa6 │ │ + vqdmulh.s , q4, d22[0] │ │ movs r4, r0 │ │ - ldrh r4, [r4, #4] │ │ + ldrh r0, [r3, #2] │ │ movs r4, r0 │ │ - ldrb r4, [r1, #29] │ │ + ldrb r0, [r6, #27] │ │ movs r4, r0 │ │ - ldrb r0, [r0, #29] │ │ + ldrb r4, [r4, #27] │ │ movs r4, r0 │ │ - cmp r6, #138 @ 0x8a │ │ + cmp r6, #30 │ │ vsli.64 , q8, #56 @ 0x38 │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #24 │ │ ldr.w ip, [r2] │ │ mov r8, r1 │ │ mov r9, r0 │ │ cmp.w ip, #2147483648 @ 0x80000000 │ │ - bne.n 96030 │ │ + bne.n 9609c │ │ movs r6, #0 │ │ - b.n 9610a │ │ + b.n 96176 │ │ ldrd r2, lr, [r2, #4] │ │ cmp.w lr, #7 │ │ - bhi.n 96096 │ │ + bhi.n 96102 │ │ cmp.w lr, #0 │ │ - beq.n 960f8 │ │ + beq.n 96164 │ │ ldrb r0, [r2, #0] │ │ cmp r0, #0 │ │ - beq.w 9615e │ │ + beq.w 961ca │ │ cmp.w lr, #1 │ │ - beq.n 960f8 │ │ + beq.n 96164 │ │ ldrb r0, [r2, #1] │ │ cmp r0, #0 │ │ - beq.w 96162 │ │ + beq.w 961ce │ │ cmp.w lr, #2 │ │ - beq.n 960f8 │ │ + beq.n 96164 │ │ ldrb r0, [r2, #2] │ │ cmp r0, #0 │ │ - beq.w 96166 │ │ + beq.w 961d2 │ │ cmp.w lr, #3 │ │ - beq.n 960f8 │ │ + beq.n 96164 │ │ ldrb r0, [r2, #3] │ │ cmp r0, #0 │ │ - beq.n 9616a │ │ + beq.n 961d6 │ │ cmp.w lr, #4 │ │ - beq.n 960f8 │ │ + beq.n 96164 │ │ ldrb r0, [r2, #4] │ │ cmp r0, #0 │ │ - beq.n 9616e │ │ + beq.n 961da │ │ cmp.w lr, #5 │ │ - beq.n 960f8 │ │ + beq.n 96164 │ │ ldrb r0, [r2, #5] │ │ cmp r0, #0 │ │ - beq.n 96172 │ │ + beq.n 961de │ │ cmp.w lr, #6 │ │ - beq.n 960f8 │ │ + beq.n 96164 │ │ ldrb r0, [r2, #6] │ │ - cbnz r0, 960f8 │ │ + cbnz r0, 96164 │ │ movs r4, #6 │ │ - b.n 9613e │ │ + b.n 961aa │ │ adds r0, r2, #3 │ │ bic.w r0, r0, #3 │ │ subs r0, r0, r2 │ │ - bne.n 960a8 │ │ + bne.n 96114 │ │ sub.w r3, lr, #8 │ │ movs r0, #0 │ │ - b.n 960be │ │ + b.n 9612a │ │ movs r4, #0 │ │ ldrb r1, [r2, r4] │ │ cmp r1, #0 │ │ - beq.n 9613e │ │ + beq.n 961aa │ │ adds r4, #1 │ │ cmp r0, r4 │ │ - bne.n 960aa │ │ + bne.n 96116 │ │ sub.w r3, lr, #8 │ │ cmp r0, r3 │ │ - bhi.n 960e4 │ │ + bhi.n 96150 │ │ movw r4, #256 @ 0x100 │ │ movt r4, #257 @ 0x101 │ │ adds r1, r2, r0 │ │ ldr r5, [r2, r0] │ │ ldr r1, [r1, #4] │ │ subs r6, r4, r5 │ │ orrs r5, r6 │ │ subs r6, r4, r1 │ │ orrs r1, r6 │ │ ands r1, r5 │ │ mvns r1, r1 │ │ tst.w r1, #2155905152 @ 0x80808080 │ │ - bne.n 960e4 │ │ + bne.n 96150 │ │ adds r0, #8 │ │ cmp r0, r3 │ │ - bls.n 960c6 │ │ + bls.n 96132 │ │ subs.w r3, lr, r0 │ │ - beq.n 960f8 │ │ + beq.n 96164 │ │ adds r5, r2, r0 │ │ movs r4, #0 │ │ ldrb r1, [r5, r4] │ │ - cbz r1, 9613c │ │ + cbz r1, 961a8 │ │ adds r4, #1 │ │ cmp r3, r4 │ │ - bne.n 960ee │ │ + bne.n 9615a │ │ add r0, sp, #8 │ │ str.w lr, [sp, #16] │ │ strd ip, r2, [sp, #8] │ │ - bl 3e058 │ │ + bl 3e360 │ │ mov r6, r0 │ │ mov r4, r1 │ │ movs r0, #32 │ │ - blx d87f0 │ │ + blx d8810 │ │ cmp r0, #0 │ │ itttt ne │ │ movne r1, #1 │ │ movne r2, #0 │ │ strdne r1, r1, [r0] │ │ strdne r9, r8, [r0, #8] │ │ itttt ne │ │ @@ -166062,595 +165977,595 @@ │ │ strne r2, [r0, #24] │ │ addne sp, #24 │ │ ldmiane.w sp!, {r8, r9, fp} │ │ it ne │ │ popne {r4, r5, r6, r7, pc} │ │ movs r0, #8 │ │ movs r1, #32 │ │ - bl 3de2a │ │ - b.n 9615c │ │ + bl 3e132 │ │ + b.n 961c8 │ │ add r4, r0 │ │ - ldr r0, [pc, #88] @ (96198 ) │ │ - ldr r3, [pc, #88] @ (9619c ) │ │ - ldr r1, [pc, #92] @ (961a0 ) │ │ + ldr r0, [pc, #88] @ (96204 ) │ │ + ldr r3, [pc, #88] @ (96208 ) │ │ + ldr r1, [pc, #92] @ (9620c ) │ │ add r0, pc │ │ add r3, pc │ │ strd lr, r4, [sp, #16] │ │ add r1, pc │ │ strd ip, r2, [sp, #8] │ │ add r2, sp, #8 │ │ str r1, [sp, #0] │ │ movs r1, #47 @ 0x2f │ │ - bl 414b0 │ │ + bl 417b8 │ │ udf #254 @ 0xfe │ │ movs r4, #0 │ │ - b.n 9613e │ │ + b.n 961aa │ │ movs r4, #1 │ │ - b.n 9613e │ │ + b.n 961aa │ │ movs r4, #2 │ │ - b.n 9613e │ │ + b.n 961aa │ │ movs r4, #3 │ │ - b.n 9613e │ │ + b.n 961aa │ │ movs r4, #4 │ │ - b.n 9613e │ │ + b.n 961aa │ │ movs r4, #5 │ │ - b.n 9613e │ │ + b.n 961aa │ │ mov r5, r0 │ │ ldr r0, [sp, #8] │ │ - cbz r0, 96190 │ │ + cbz r0, 961fc │ │ ldr r0, [sp, #12] │ │ - b.n 9618c │ │ + b.n 961f8 │ │ mov r5, r0 │ │ - cbz r6, 96190 │ │ + cbz r6, 961fc │ │ movs r0, #0 │ │ strb r0, [r6, #0] │ │ - cbz r4, 96190 │ │ + cbz r4, 961fc │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ nop │ │ - movs r4, #151 @ 0x97 │ │ - vcvt.f16.u16 d21, d22, #8 │ │ + movs r4, #43 @ 0x2b │ │ + vtbx.8 d21, {d24-d27}, d10 │ │ movs r4, r0 │ │ - ldrsb r0, [r5, r7] │ │ + ldrsb r4, [r1, r6] │ │ movs r4, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #32 │ │ ldr.w r9, [r7, #8] │ │ add.w r4, r0, #24 │ │ mov r6, r3 │ │ mov r5, r2 │ │ ldrex r0, [r4] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r4] │ │ cmp r2, #0 │ │ - bne.n 961ba │ │ + bne.n 96226 │ │ cmp r0, #1 │ │ dmb ish │ │ - beq.n 9629c │ │ + beq.n 96308 │ │ add.w r8, sp, #16 │ │ mov r0, r8 │ │ - bl 94744 │ │ + bl 947b0 │ │ ldrd r0, r1, [sp, #16] │ │ eor.w r3, r1, r6 │ │ adds r0, r0, r5 │ │ adc.w r2, r1, r6 │ │ eors r1, r2 │ │ bics r1, r3 │ │ mov.w r3, #0 │ │ it mi │ │ movmi r3, #1 │ │ movs r1, #0 │ │ cmp r6, #0 │ │ it mi │ │ movmi r1, #1 │ │ eors r1, r3 │ │ - bne.n 96234 │ │ + bne.n 962a0 │ │ ldr r1, [sp, #24] │ │ movw r6, #51711 @ 0xc9ff │ │ movt r6, #15258 @ 0x3b9a │ │ add r1, r9 │ │ cmp r1, r6 │ │ - bls.n 9623a │ │ + bls.n 962a6 │ │ adds r0, #1 │ │ adc.w r3, r2, #0 │ │ eor.w r5, r2, r3 │ │ bic.w r2, r5, r2 │ │ cmp.w r2, #4294967295 @ 0xffffffff │ │ - ble.n 96234 │ │ + ble.n 962a0 │ │ movw r2, #13824 @ 0x3600 │ │ movt r2, #50277 @ 0xc465 │ │ add r1, r2 │ │ adds r2, r6, #1 │ │ cmp r1, r2 │ │ - bne.n 96238 │ │ + bne.n 962a4 │ │ movs r0, #0 │ │ - b.n 9624e │ │ + b.n 962ba │ │ mov r2, r3 │ │ adds.w r3, r0, #2147483648 @ 0x80000000 │ │ sbc.w r2, r2, #0 │ │ adds r2, #1 │ │ itte eq │ │ strdeq r0, r1, [sp, #20] │ │ moveq r0, #1 │ │ movne r0, #0 │ │ mov.w r5, #4294967295 @ 0xffffffff │ │ movs r6, #0 │ │ str r0, [sp, #16] │ │ ldr r0, [r4, #0] │ │ adds r0, #1 │ │ - bne.n 9628a │ │ + bne.n 962f6 │ │ ldr r0, [sp, #16] │ │ mov r1, r4 │ │ movs r2, #137 @ 0x89 │ │ mov.w r3, #4294967295 @ 0xffffffff │ │ cmp r0, #0 │ │ it ne │ │ addne.w r0, r8, #4 │ │ strd r0, r6, [sp] │ │ movs r0, #240 @ 0xf0 │ │ str r5, [sp, #8] │ │ - blx d87d0 │ │ + blx d87e0 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 9628a │ │ - blx d8850 │ │ + bgt.n 962f6 │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ cmp r0, #4 │ │ - beq.n 96256 │ │ + beq.n 962c2 │ │ movs r0, #0 │ │ ldrex r1, [r4] │ │ strex r1, r0, [r4] │ │ cmp r1, #0 │ │ - bne.n 9628c │ │ + bne.n 962f8 │ │ dmb ish │ │ add sp, #32 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #16 │ │ - ldr r2, [pc, #28] @ (962c8 ) │ │ + ldr r2, [pc, #28] @ (96334 ) │ │ add r0, sp, #4 │ │ subs r1, r7, #1 │ │ movs r3, #183 @ 0xb7 │ │ add r2, pc │ │ - bl 772b8 │ │ + bl 77320 │ │ ldr r1, [sp, #8] │ │ ldrb.w r0, [sp, #4] │ │ - bl 77378 │ │ - bl 773ce │ │ + bl 773e0 │ │ + bl 77436 │ │ nop │ │ - adds r0, #161 @ 0xa1 │ │ + adds r0, #53 @ 0x35 │ │ vsli.64 , q8, #56 @ 0x38 │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #16 │ │ mov r5, r0 │ │ - ldr r0, [pc, #164] @ (96380 ) │ │ + ldr r0, [pc, #164] @ (963ec ) │ │ add r0, pc │ │ ldr r4, [r0, #0] │ │ dmb ish │ │ - cbz r4, 962f6 │ │ + cbz r4, 96362 │ │ mov r0, r4 │ │ - blx d8830 │ │ + blx d8840 │ │ cmp r0, #1 │ │ - bls.n 96306 │ │ + bls.n 96372 │ │ add sp, #16 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - bl 7740c │ │ + bl 77474 │ │ mov r4, r0 │ │ mov r0, r4 │ │ - blx d8830 │ │ + blx d8840 │ │ cmp r0, #1 │ │ - bhi.n 962ee │ │ - beq.n 9631a │ │ - cbz r5, 96324 │ │ + bhi.n 9635a │ │ + beq.n 96386 │ │ + cbz r5, 96390 │ │ ldrd r0, r6, [r5] │ │ movs r1, #0 │ │ str r1, [r5, #0] │ │ cmp r0, #0 │ │ it eq │ │ moveq r6, #0 │ │ - b.n 96326 │ │ + b.n 96392 │ │ movs r0, #0 │ │ add sp, #16 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r6, #0 │ │ movs r0, #8 │ │ strd r6, r4, [sp, #8] │ │ - blx d87f0 │ │ - cbz r0, 96362 │ │ + blx d8810 │ │ + cbz r0, 963ce │ │ strd r6, r4, [r0] │ │ mov r6, r0 │ │ mov r0, r4 │ │ - blx d8830 │ │ + blx d8840 │ │ mov r5, r0 │ │ mov r0, r4 │ │ mov r1, r6 │ │ mov r4, r6 │ │ - blx d8840 │ │ + blx d8850 │ │ cmp r5, #0 │ │ ittt ne │ │ strne r5, [sp, #4] │ │ addne.w r0, sp, #4 │ │ - blne 93b38 │ │ + blne 93ba4 │ │ mov r0, r4 │ │ add sp, #16 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, #4 │ │ movs r1, #8 │ │ - bl 3de2a │ │ + bl 3e132 │ │ udf #254 @ 0xfe │ │ mov r4, r0 │ │ add r0, sp, #8 │ │ - bl 96564 │ │ + bl 965d0 │ │ mov r0, r4 │ │ - blx d6dd0 │ │ - bl 416fe │ │ + blx d6de0 │ │ + bl 41a06 │ │ nop │ │ - ldrb r2, [r1, #15] │ │ + ldrb r6, [r5, #13] │ │ movs r4, r0 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ ldr r1, [r0, #0] │ │ - cbz r1, 963be │ │ + cbz r1, 9642a │ │ adds r4, r0, #4 │ │ mov r0, r4 │ │ - bl 93ba4 │ │ + bl 93c10 │ │ ldr r0, [r4, #0] │ │ - cbz r0, 963be │ │ + cbz r0, 9642a │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 9639c │ │ + bne.n 96408 │ │ cmp r1, #1 │ │ it ne │ │ popne {r4, r5, r7, pc} │ │ dmb ish │ │ mov r0, r4 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w 93c5c │ │ + b.w 93cc8 │ │ pop {r4, r5, r7, pc} │ │ mov r5, r0 │ │ ldr r0, [r4, #0] │ │ - cbz r0, 963e6 │ │ + cbz r0, 96452 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 963ca │ │ + bne.n 96436 │ │ cmp r1, #1 │ │ - bne.n 963e6 │ │ + bne.n 96452 │ │ dmb ish │ │ mov r0, r4 │ │ - bl 93c5c │ │ + bl 93cc8 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ - bl 416fe │ │ + blx d6de0 │ │ + bl 41a06 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ mov r9, r0 │ │ ldr r0, [r0, #4] │ │ ldr.w r1, [r9, #12] │ │ subs r1, r1, r0 │ │ - beq.n 96432 │ │ + beq.n 9649e │ │ lsrs r1, r1, #3 │ │ adds r5, r0, #4 │ │ rsb r4, r1, #1 │ │ - b.n 96422 │ │ + b.n 9648e │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, sl │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r4, #1 │ │ adds r5, #8 │ │ cmp r4, #1 │ │ - beq.n 96432 │ │ + beq.n 9649e │ │ ldrd sl, r6, [r5, #-4] │ │ ldr r1, [r6, #0] │ │ cmp r1, #0 │ │ - beq.n 9640e │ │ + beq.n 9647a │ │ mov r0, sl │ │ blx r1 │ │ - b.n 9640e │ │ + b.n 9647a │ │ ldr.w r0, [r9, #8] │ │ - cbz r0, 96448 │ │ + cbz r0, 964b4 │ │ ldr.w r0, [r9] │ │ ldmia.w sp!, {r8, r9, sl} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r8, r0 │ │ ldr r0, [r6, #4] │ │ adds r5, #4 │ │ negs r4, r4 │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, sl │ │ - blxne d87c0 │ │ - cbz r4, 9646e │ │ + blxne d87d0 │ │ + cbz r4, 964da │ │ ldrd r0, r1, [r5], #8 │ │ subs r4, #1 │ │ - bl 96524 │ │ - b.n 96460 │ │ + bl 96590 │ │ + b.n 964cc │ │ ldr.w r0, [r9, #8] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [r9] │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r8 │ │ - blx d6dd0 │ │ - bl 416fe │ │ + blx d6de0 │ │ + bl 41a06 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ ldrd fp, sl, [r0, #4] │ │ mov r9, r0 │ │ cmp.w sl, #0 │ │ - beq.n 964ca │ │ + beq.n 96536 │ │ movs r5, #0 │ │ - b.n 964b4 │ │ + b.n 96520 │ │ ldr r0, [r4, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #1 │ │ cmp sl, r5 │ │ - beq.n 964ca │ │ + beq.n 96536 │ │ add.w r0, fp, r5, lsl #3 │ │ ldr.w r6, [fp, r5, lsl #3] │ │ ldr r4, [r0, #4] │ │ ldr r1, [r4, #0] │ │ cmp r1, #0 │ │ - beq.n 964a2 │ │ + beq.n 9650e │ │ mov r0, r6 │ │ blx r1 │ │ - b.n 964a2 │ │ + b.n 9650e │ │ ldr.w r0, [r9] │ │ - cbz r0, 964e0 │ │ + cbz r0, 9654c │ │ mov r0, fp │ │ add sp, #4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r8, r0 │ │ ldr r0, [r4, #4] │ │ - cbz r0, 964f4 │ │ + cbz r0, 96560 │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ sub.w r6, sl, #1 │ │ cmp r6, r5 │ │ - beq.n 9650c │ │ + beq.n 96578 │ │ add.w r0, fp, r5, lsl #3 │ │ adds r5, #1 │ │ ldrd r0, r1, [r0, #8] │ │ - bl 96524 │ │ - b.n 964f8 │ │ + bl 96590 │ │ + b.n 96564 │ │ ldr.w r0, [r9] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, fp │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r8 │ │ - blx d6dd0 │ │ - bl 416fe │ │ + blx d6de0 │ │ + bl 41a06 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ mov r5, r1 │ │ ldr r1, [r1, #0] │ │ mov r4, r0 │ │ - cbz r1, 96538 │ │ + cbz r1, 965a4 │ │ mov r0, r4 │ │ blx r1 │ │ ldr r0, [r5, #4] │ │ - cbz r0, 9654a │ │ + cbz r0, 965b6 │ │ mov r0, r4 │ │ ldr.w fp, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ mov r6, r0 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r6 │ │ - blx d6dd0 │ │ + blx d6de0 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ - bl 93ba4 │ │ + bl 93c10 │ │ ldr r0, [r4, #0] │ │ - cbz r0, 96598 │ │ + cbz r0, 96604 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 96576 │ │ + bne.n 965e2 │ │ cmp r1, #1 │ │ it ne │ │ popne {r4, r5, r7, pc} │ │ dmb ish │ │ mov r0, r4 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w 93c5c │ │ + b.w 93cc8 │ │ pop {r4, r5, r7, pc} │ │ mov r5, r0 │ │ ldr r0, [r4, #0] │ │ - cbz r0, 965c0 │ │ + cbz r0, 9662c │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 965a4 │ │ + bne.n 96610 │ │ cmp r1, #1 │ │ - bne.n 965c0 │ │ + bne.n 9662c │ │ dmb ish │ │ mov r0, r4 │ │ - bl 93c5c │ │ + bl 93cc8 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ - bl 416fe │ │ + blx d6de0 │ │ + bl 41a06 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ - bl 93ba4 │ │ + bl 93c10 │ │ ldr r0, [r4, #0] │ │ - cbz r0, 965fe │ │ + cbz r0, 9666a │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 965dc │ │ + bne.n 96648 │ │ cmp r1, #1 │ │ it ne │ │ popne {r4, r5, r7, pc} │ │ dmb ish │ │ mov r0, r4 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w 93c5c │ │ + b.w 93cc8 │ │ pop {r4, r5, r7, pc} │ │ mov r5, r0 │ │ ldr r0, [r4, #0] │ │ - cbz r0, 96626 │ │ + cbz r0, 96692 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 9660a │ │ + bne.n 96676 │ │ cmp r1, #1 │ │ - bne.n 96626 │ │ + bne.n 96692 │ │ dmb ish │ │ mov r0, r4 │ │ - bl 93c5c │ │ + bl 93cc8 │ │ mov r0, r5 │ │ - blx d6dd0 │ │ - bl 416fe │ │ + blx d6de0 │ │ + bl 41a06 │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ ldrd r6, r5, [r0, #12] │ │ cmp r5, #0 │ │ mov r7, r5 │ │ mov r4, r0 │ │ it ne │ │ movne r7, #1 │ │ cmp r6, #0 │ │ it ne │ │ cmpne r5, #0 │ │ - beq.n 96668 │ │ + beq.n 966d4 │ │ ldr.w r8, [r4, #20] │ │ ldr.w r1, [r8] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r5 │ │ blxne r1 │ │ ldr.w r0, [r8, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr r5, [r4, #8] │ │ movs r0, #0 │ │ str r0, [r4, #12] │ │ - cbz r5, 966e6 │ │ + cbz r5, 96752 │ │ ands.w r0, r6, r7 │ │ itt ne │ │ movne r0, #1 │ │ strbne r0, [r5, #16] │ │ add.w r0, r5, #12 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 96682 │ │ + bne.n 966ee │ │ cmp r1, #1 │ │ - bne.n 966ba │ │ + bne.n 96726 │ │ ldr r0, [r5, #8] │ │ dmb ish │ │ add.w r1, r0, #24 │ │ movs r0, #1 │ │ ldrex r2, [r1] │ │ strex r3, r0, [r1] │ │ cmp r3, #0 │ │ - bne.n 966a0 │ │ + bne.n 9670c │ │ adds r0, r2, #1 │ │ - bne.n 966ba │ │ + bne.n 96726 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ + blx d87e0 │ │ dmb ish │ │ ldrex r0, [r5] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r5] │ │ cmp r2, #0 │ │ - bne.n 966be │ │ + bne.n 9672a │ │ cmp r0, #1 │ │ - bne.n 966da │ │ + bne.n 96746 │ │ dmb ish │ │ ldr r0, [r4, #8] │ │ - bl 96760 │ │ + bl 967cc │ │ ldr r0, [r4, #12] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r5, [r4, #16] │ │ cmpne r5, #0 │ │ - bne.n 96710 │ │ + bne.n 9677c │ │ adds r0, r4, #1 │ │ - beq.n 9672c │ │ + beq.n 96798 │ │ adds r0, r4, #4 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 966f0 │ │ + bne.n 9675c │ │ cmp r1, #1 │ │ - bne.n 9672c │ │ + bne.n 96798 │ │ dmb ish │ │ mov r0, r4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ ldr r6, [r4, #20] │ │ ldr r1, [r6, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r5 │ │ blxne r1 │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r0, r4, #1 │ │ - bne.n 966ea │ │ + bne.n 96756 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ ldrb r1, [r0, #0] │ │ cmp r1, #3 │ │ it ne │ │ bxne lr │ │ push {r4, r5, r6, lr} │ │ ldr r4, [r0, #4] │ │ @@ -166660,752 +166575,752 @@ │ │ itt ne │ │ movne r0, r5 │ │ blxne r1 │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ mov r0, r4 │ │ ldmia.w sp!, {r4, r5, r6, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ push {r4, lr} │ │ mov r4, r0 │ │ ldr r0, [r0, #8] │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 9676a │ │ + bne.n 967d6 │ │ cmp r1, #1 │ │ - bne.n 96786 │ │ + bne.n 967f2 │ │ dmb ish │ │ ldr r0, [r4, #8] │ │ - bl 77604 │ │ + bl 7766c │ │ adds r0, r4, #1 │ │ it eq │ │ popeq {r4, pc} │ │ adds r0, r4, #4 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 96792 │ │ + bne.n 967fe │ │ cmp r1, #1 │ │ - bne.n 967b2 │ │ + bne.n 9681e │ │ dmb ish │ │ mov r0, r4 │ │ ldmia.w sp!, {r4, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ pop {r4, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ sub sp, #4 │ │ mov r9, r0 │ │ ldr r0, [r0, #20] │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 967c2 │ │ + bne.n 9682e │ │ cmp r1, #1 │ │ - bne.n 967e0 │ │ + bne.n 9684c │ │ dmb ish │ │ ldr.w r0, [r9, #20] │ │ - bl 97f5c │ │ + bl 97f34 │ │ add.w r5, r9, #12 │ │ mov r0, r5 │ │ - bl 93ba4 │ │ + bl 93c10 │ │ ldr.w r0, [r9, #12] │ │ - cbz r0, 96810 │ │ + cbz r0, 9687c │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 967f4 │ │ + bne.n 96860 │ │ cmp r1, #1 │ │ - bne.n 96810 │ │ + bne.n 9687c │ │ mov r0, r5 │ │ dmb ish │ │ - bl 93c5c │ │ + bl 93cc8 │ │ ldrd r8, r7, [r9, #4] │ │ - cbz r7, 9683a │ │ + cbz r7, 968a6 │ │ add.w r5, r8, #4 │ │ ldrd r6, r4, [r5, #-4] │ │ ldr r1, [r4, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r6 │ │ blxne r1 │ │ ldr r0, [r4, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r6 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ adds r5, #8 │ │ subs r7, #1 │ │ - bne.n 9681a │ │ + bne.n 96886 │ │ ldr.w r0, [r9] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r8 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldr.w r0, [r9, #16] │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 96850 │ │ + bne.n 968bc │ │ cmp r1, #1 │ │ - bne.n 96874 │ │ + bne.n 968e0 │ │ dmb ish │ │ ldr.w r0, [r9, #16] │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ - b.w 96630 │ │ + b.w 9669c │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ push {r4, r5, r6, lr} │ │ sub sp, #24 │ │ mov r4, r0 │ │ adds r3, r4, #4 │ │ ldr r5, [r0, #20] │ │ ldr r0, [r0, #0] │ │ ldmia r3, {r1, r2, r3} │ │ stmia.w sp, {r0, r1, r2, r3, r5} │ │ mov r0, sp │ │ - bl 968f0 │ │ + bl 9695c │ │ mov r0, r5 │ │ - bl 96a08 │ │ + bl 96a74 │ │ ldr r4, [r4, #16] │ │ ldr r0, [r4, #12] │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r5, [r4, #16] │ │ cmpne r5, #0 │ │ - beq.n 968be │ │ + beq.n 9692a │ │ ldr r6, [r4, #20] │ │ ldr r1, [r6, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r5 │ │ blxne r1 │ │ ldr r0, [r6, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ movs r0, #0 │ │ movs r1, #1 │ │ strd r1, r0, [r4, #12] │ │ dmb ish │ │ ldrex r0, [r4] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r4] │ │ cmp r2, #0 │ │ - bne.n 968ca │ │ + bne.n 96936 │ │ cmp r0, #1 │ │ - bne.n 968ec │ │ + bne.n 96958 │ │ dmb ish │ │ mov r0, r4 │ │ add sp, #24 │ │ ldmia.w sp!, {r4, r5, r6, lr} │ │ - b.w 96630 │ │ + b.w 9669c │ │ add sp, #24 │ │ pop {r4, r5, r6, pc} │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} │ │ sub sp, #24 │ │ mov r4, r0 │ │ ldr r0, [r0, #12] │ │ movs r1, #1 │ │ strd r1, r0, [sp, #4] │ │ add r0, sp, #4 │ │ - bl 962cc │ │ + bl 96338 │ │ cmp r0, #0 │ │ - beq.n 96996 │ │ + beq.n 96a02 │ │ ldr r1, [sp, #4] │ │ cmp r1, #1 │ │ - bne.n 96942 │ │ + bne.n 969ae │ │ ldr r1, [sp, #8] │ │ ldr r2, [r0, #0] │ │ str r1, [r0, #0] │ │ str r2, [sp, #20] │ │ add r0, sp, #20 │ │ - bl 93ba4 │ │ + bl 93c10 │ │ ldr r0, [sp, #20] │ │ - cbz r0, 96942 │ │ + cbz r0, 969ae │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 96926 │ │ + bne.n 96992 │ │ cmp r1, #1 │ │ - bne.n 96942 │ │ + bne.n 969ae │ │ dmb ish │ │ add r0, sp, #20 │ │ - bl 93c5c │ │ + bl 93cc8 │ │ ldr r0, [r4, #8] │ │ ldrd r8, r9, [r4] │ │ str.w r8, [sp, #12] │ │ add.w sl, r9, r0, lsl #3 │ │ str.w r9, [sp, #4] │ │ str.w sl, [sp, #16] │ │ - cbz r0, 96984 │ │ + cbz r0, 969f0 │ │ add.w r5, r9, #8 │ │ mov r6, r5 │ │ ldr.w r4, [r6, #-8]! │ │ ldr r7, [r6, #4] │ │ ldr r1, [r7, #12] │ │ mov r0, r4 │ │ blx r1 │ │ ldr r0, [r7, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r5, r6, #16 │ │ add.w r0, r6, #8 │ │ cmp r0, sl │ │ - bne.n 9695e │ │ + bne.n 969ca │ │ cmp.w r8, #0 │ │ itt ne │ │ movne r0, r9 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add sp, #24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} │ │ - ldr r0, [pc, #108] @ (96a04 ) │ │ + ldr r0, [pc, #108] @ (96a70 ) │ │ add r0, pc │ │ - bl 774bc │ │ + bl 77524 │ │ udf #254 @ 0xfe │ │ mov r6, r0 │ │ - b.n 969f0 │ │ + b.n 96a5c │ │ mov r6, r0 │ │ ldr r0, [sp, #20] │ │ - cbz r0, 969f0 │ │ + cbz r0, 96a5c │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 969ae │ │ + bne.n 96a1a │ │ cmp r1, #1 │ │ - bne.n 969f0 │ │ + bne.n 96a5c │ │ dmb ish │ │ add r0, sp, #20 │ │ - bl 93c5c │ │ - b.n 969f0 │ │ - bl 416fe │ │ + bl 93cc8 │ │ + b.n 96a5c │ │ + bl 41a06 │ │ mov r6, r0 │ │ ldr r0, [r7, #4] │ │ str r5, [sp, #8] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add r0, sp, #4 │ │ - bl 963f0 │ │ - b.n 969f6 │ │ + bl 9645c │ │ + b.n 96a62 │ │ mov r6, r0 │ │ add r0, sp, #4 │ │ - bl 96384 │ │ + bl 963f0 │ │ mov r0, r4 │ │ - bl 96488 │ │ + bl 964f4 │ │ mov r0, r6 │ │ - blx d6dd0 │ │ - bl 416fe │ │ - bl 416fe │ │ - strh r4, [r4, r3] │ │ + blx d6de0 │ │ + bl 41a06 │ │ + bl 41a06 │ │ + strh r0, [r1, r2] │ │ movs r4, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #148 @ 0x94 │ │ mov r7, r0 │ │ ldr r0, [r0, #64] @ 0x40 │ │ dmb ish │ │ ldr r1, [r7, #68] @ 0x44 │ │ cmp r0, r1 │ │ - bcs.w 9767c │ │ + bcs.w 976e8 │ │ add.w r0, r7, #52 @ 0x34 │ │ str r0, [sp, #20] │ │ add.w r0, r7, #44 @ 0x2c │ │ str r0, [sp, #24] │ │ add r0, sp, #128 @ 0x80 │ │ add.w sl, r7, #64 @ 0x40 │ │ adds r0, #17 │ │ str r0, [sp, #16] │ │ add r0, sp, #96 @ 0x60 │ │ add.w r5, r7, #60 @ 0x3c │ │ adds r0, #17 │ │ str r0, [sp, #12] │ │ - ldr r0, [pc, #816] @ (96d70 ) │ │ + ldr r0, [pc, #816] @ (96ddc ) │ │ add.w r9, r7, #28 │ │ mov.w fp, #0 │ │ str r7, [sp, #36] @ 0x24 │ │ add r0, pc │ │ str r0, [sp, #44] @ 0x2c │ │ strd sl, r5, [sp, #28] │ │ - b.n 96a62 │ │ + b.n 96ace │ │ ldr r0, [r7, #64] @ 0x40 │ │ dmb ish │ │ ldr r1, [r7, #68] @ 0x44 │ │ cmp r0, r1 │ │ - bcs.w 9767c │ │ + bcs.w 976e8 │ │ movs r1, #1 │ │ ldrex r0, [r9] │ │ cmp r0, #0 │ │ - bne.w 971f4 │ │ + bne.w 97260 │ │ strex r0, r1, [r9] │ │ cmp r0, #0 │ │ - bne.n 96a64 │ │ + bne.n 96ad0 │ │ dmb ish │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 9720c │ │ + bne.w 97278 │ │ movs r4, #0 │ │ ldrb.w r0, [r7, #32] │ │ cmp r0, #0 │ │ - bne.w 976a2 │ │ + bne.w 9770e │ │ ldrd r0, r8, [r7, #36] @ 0x24 │ │ str r4, [sp, #40] @ 0x28 │ │ cmp r0, #0 │ │ - beq.w 96c60 │ │ + beq.w 96ccc │ │ cmp r0, #1 │ │ - bne.w 96e36 │ │ + bne.w 96ea2 │ │ movw r0, #51712 @ 0xca00 │ │ str.w fp, [sp, #144] @ 0x90 │ │ movt r0, #15258 @ 0x3b9a │ │ strd fp, fp, [sp, #136] @ 0x88 │ │ str r0, [sp, #80] @ 0x50 │ │ strd fp, fp, [sp, #128] @ 0x80 │ │ movs r0, #0 │ │ - b.n 96ac2 │ │ - blx d8810 │ │ + b.n 96b2e │ │ + blx d8820 │ │ adds r0, r6, #1 │ │ mov r6, r0 │ │ ldr.w r0, [r8] │ │ dmb ish │ │ ldr.w sl, [r8, #4] │ │ dmb ish │ │ ubfx r4, r0, #1, #5 │ │ cmp r4, #31 │ │ - bne.n 96af0 │ │ + bne.n 96b5c │ │ cmp r6, #7 │ │ - bcs.n 96abc │ │ - cbz r6, 96aec │ │ + bcs.n 96b28 │ │ + cbz r6, 96b58 │ │ mul.w r0, r6, r6 │ │ subs r0, #1 │ │ yield │ │ - bne.n 96ae6 │ │ + bne.n 96b52 │ │ adds r0, r6, #1 │ │ - b.n 96ac2 │ │ + b.n 96b2e │ │ adds r5, r0, #2 │ │ lsls r1, r0, #31 │ │ - bne.n 96b10 │ │ + bne.n 96b7c │ │ dmb ish │ │ lsrs r2, r0, #1 │ │ ldr.w r1, [r8, #32] │ │ cmp.w r2, r1, lsr #1 │ │ - beq.n 96b62 │ │ + beq.n 96bce │ │ eors r1, r0 │ │ cmp r1, #63 @ 0x3f │ │ it hi │ │ orrhi.w r5, r5, #1 │ │ cmp.w sl, #0 │ │ - beq.n 96b2a │ │ + beq.n 96b96 │ │ ldrex r1, [r8] │ │ cmp r1, r0 │ │ - bne.n 96b3e │ │ + bne.n 96baa │ │ dmb ish │ │ strex r0, r5, [r8] │ │ - cbnz r0, 96b42 │ │ - b.n 96f58 │ │ + cbnz r0, 96bae │ │ + b.n 96fc4 │ │ cmp r6, #7 │ │ - bcs.n 96abc │ │ - cbz r6, 96b3a │ │ + bcs.n 96b28 │ │ + cbz r6, 96ba6 │ │ mul.w r0, r6, r6 │ │ subs r0, #1 │ │ yield │ │ - bne.n 96b34 │ │ + bne.n 96ba0 │ │ adds r0, r6, #1 │ │ - b.n 96ac2 │ │ + b.n 96b2e │ │ clrex │ │ movs r0, #6 │ │ cmp r6, #6 │ │ it cc │ │ movcc r0, r6 │ │ mul.w r1, r0, r0 │ │ movs r0, #1 │ │ dmb ish │ │ cmp r6, #0 │ │ - beq.n 96ac2 │ │ + beq.n 96b2e │ │ subs r1, #1 │ │ yield │ │ - bne.n 96b58 │ │ + bne.n 96bc4 │ │ adds r0, r6, #1 │ │ - b.n 96ac2 │ │ + b.n 96b2e │ │ lsls r0, r1, #31 │ │ - bne.w 973d0 │ │ + bne.w 9743c │ │ ldr r4, [sp, #80] @ 0x50 │ │ movw r0, #51712 @ 0xca00 │ │ ldr.w sl, [sp, #28] │ │ movt r0, #15258 @ 0x3b9a │ │ cmp r4, r0 │ │ - beq.n 96ba8 │ │ + beq.n 96c14 │ │ add r0, sp, #96 @ 0x60 │ │ ldrd r5, r6, [sp, #72] @ 0x48 │ │ - bl 94744 │ │ + bl 947b0 │ │ ldrd r0, r1, [sp, #96] @ 0x60 │ │ eor.w r2, r1, r6 │ │ eor.w r3, r0, r5 │ │ orrs r2, r3 │ │ - bne.n 96b9e │ │ + bne.n 96c0a │ │ ldr r0, [sp, #104] @ 0x68 │ │ cmp r0, r4 │ │ - bcc.n 96ba8 │ │ - b.w 973de │ │ + bcc.n 96c14 │ │ + b.w 9744a │ │ subs r0, r0, r5 │ │ sbcs.w r0, r1, r6 │ │ - bge.w 973de │ │ + bge.w 9744a │ │ add r0, sp, #72 @ 0x48 │ │ strd r8, r0, [sp, #60] @ 0x3c │ │ add r0, sp, #128 @ 0x80 │ │ str r0, [sp, #56] @ 0x38 │ │ - bl 97764 │ │ - cbz r0, 96c16 │ │ + bl 310ac │ │ + cbz r0, 96c82 │ │ ldr r6, [r0, #0] │ │ mov r4, r0 │ │ str.w fp, [r0] │ │ - cbz r6, 96c1e │ │ + cbz r6, 96c8a │ │ dmb ish │ │ str.w fp, [r6, #12] │ │ dmb ish │ │ str.w fp, [r6, #16] │ │ ldrd r0, r1, [sp, #60] @ 0x3c │ │ strd r0, r1, [sp, #100] @ 0x64 │ │ add r0, sp, #128 @ 0x80 │ │ str r0, [sp, #96] @ 0x60 │ │ add r0, sp, #96 @ 0x60 │ │ mov r1, r6 │ │ str.w fp, [sp, #56] @ 0x38 │ │ - bl 9792c │ │ + bl 97904 │ │ ldr r0, [r4, #0] │ │ str r6, [r4, #0] │ │ cmp r0, #0 │ │ - beq.w 96ab8 │ │ + beq.w 96b24 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 96bf8 │ │ + bne.n 96c64 │ │ cmp r1, #1 │ │ - bne.w 96ab8 │ │ + bne.w 96b24 │ │ dmb ish │ │ - bl 93a8c │ │ - b.n 96ab8 │ │ + bl 93af8 │ │ + b.n 96b24 │ │ add r0, sp, #56 @ 0x38 │ │ - bl 97a00 │ │ - b.n 96ab8 │ │ - bl 95d74 │ │ + bl 979d8 │ │ + b.n 96b24 │ │ + bl 95de0 │ │ mov r4, r0 │ │ ldrd r0, r1, [sp, #60] @ 0x3c │ │ strd r0, r1, [sp, #100] @ 0x64 │ │ add r0, sp, #128 @ 0x80 │ │ str r0, [sp, #96] @ 0x60 │ │ add r0, sp, #96 @ 0x60 │ │ mov r1, r4 │ │ str.w fp, [sp, #56] @ 0x38 │ │ - bl 9792c │ │ + bl 97904 │ │ dmb ish │ │ ldrex r0, [r4] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r4] │ │ cmp r2, #0 │ │ - bne.n 96c40 │ │ + bne.n 96cac │ │ cmp r0, #1 │ │ - bne.w 96ab8 │ │ + bne.w 96b24 │ │ mov r0, r4 │ │ dmb ish │ │ - bl 93a8c │ │ - b.n 96ab8 │ │ + bl 93af8 │ │ + b.n 96b24 │ │ movw r0, #51712 @ 0xca00 │ │ str.w fp, [sp, #144] @ 0x90 │ │ movt r0, #15258 @ 0x3b9a │ │ strd fp, fp, [sp, #136] @ 0x88 │ │ str r0, [sp, #80] @ 0x50 │ │ strd fp, fp, [sp, #128] @ 0x80 │ │ movs r0, #0 │ │ - b.n 96c80 │ │ - blx d8810 │ │ + b.n 96cec │ │ + blx d8820 │ │ adds r0, r4, #1 │ │ mov r4, r0 │ │ ldr.w r0, [r8] │ │ ldrd r3, r1, [r8, #68] @ 0x44 │ │ subs r1, #1 │ │ ldr.w r2, [r8, #148] @ 0x94 │ │ and.w r7, r1, r0 │ │ adds r6, r0, #1 │ │ add.w r1, r7, r7, lsl #1 │ │ add.w r1, r2, r1, lsl #2 │ │ ldr r2, [r1, #8] │ │ dmb ish │ │ cmp r6, r2 │ │ - bne.n 96cd0 │ │ + bne.n 96d3c │ │ ldr.w r6, [r8, #64] @ 0x40 │ │ adds r7, #1 │ │ cmp r7, r6 │ │ itttt cs │ │ negcs r2, r3 │ │ andcs r2, r0 │ │ ldrcs.w r3, [r8, #68] @ 0x44 │ │ addcs r2, r3 │ │ ldrex r3, [r8] │ │ cmp r3, r0 │ │ - bne.n 96d04 │ │ + bne.n 96d70 │ │ dmb ish │ │ strex r3, r2, [r8] │ │ - cbnz r3, 96d08 │ │ - b.n 96ee8 │ │ + cbnz r3, 96d74 │ │ + b.n 96f54 │ │ cmp r2, r0 │ │ - bne.n 96d24 │ │ + bne.n 96d90 │ │ dmb ish │ │ ldr.w r1, [r8, #32] │ │ ldr.w r2, [r8, #72] @ 0x48 │ │ bic.w r3, r1, r2 │ │ cmp r3, r0 │ │ - beq.n 96d38 │ │ + beq.n 96da4 │ │ movs r0, #6 │ │ cmp r4, #6 │ │ it cc │ │ movcc r0, r4 │ │ mul.w r1, r0, r0 │ │ movs r0, #1 │ │ cmp r4, #0 │ │ - beq.n 96c80 │ │ + beq.n 96cec │ │ subs r1, #1 │ │ yield │ │ - bne.n 96cfa │ │ + bne.n 96d66 │ │ adds r0, r4, #1 │ │ - b.n 96c80 │ │ + b.n 96cec │ │ clrex │ │ movs r0, #6 │ │ cmp r4, #6 │ │ it cc │ │ movcc r0, r4 │ │ mul.w r1, r0, r0 │ │ movs r0, #1 │ │ cmp r4, #0 │ │ - beq.n 96c80 │ │ + beq.n 96cec │ │ subs r1, #1 │ │ yield │ │ - bne.n 96d1a │ │ + bne.n 96d86 │ │ adds r0, r4, #1 │ │ - b.n 96c80 │ │ + b.n 96cec │ │ cmp r4, #7 │ │ - bcs.n 96c7a │ │ - cbz r4, 96d34 │ │ + bcs.n 96ce6 │ │ + cbz r4, 96da0 │ │ mul.w r0, r4, r4 │ │ subs r0, #1 │ │ yield │ │ - bne.n 96d2e │ │ + bne.n 96d9a │ │ adds r0, r4, #1 │ │ - b.n 96c80 │ │ + b.n 96cec │ │ tst r2, r1 │ │ - bne.w 973e8 │ │ + bne.w 97454 │ │ ldr r4, [sp, #80] @ 0x50 │ │ movw r0, #51712 @ 0xca00 │ │ ldr r7, [sp, #36] @ 0x24 │ │ movt r0, #15258 @ 0x3b9a │ │ cmp r4, r0 │ │ - beq.n 96d7e │ │ + beq.n 96dea │ │ add r0, sp, #96 @ 0x60 │ │ ldrd r5, r6, [sp, #72] @ 0x48 │ │ - bl 94744 │ │ + bl 947b0 │ │ ldrd r0, r1, [sp, #96] @ 0x60 │ │ eor.w r2, r1, r6 │ │ eor.w r3, r0, r5 │ │ orrs r2, r3 │ │ - bne.n 96d74 │ │ + bne.n 96de0 │ │ ldr r0, [sp, #104] @ 0x68 │ │ cmp r0, r4 │ │ - bcc.n 96d7e │ │ - b.n 973de │ │ - ldrb r2, [r1, #21] │ │ + bcc.n 96dea │ │ + b.n 9744a │ │ + ldrb r6, [r7, #19] │ │ movs r4, r0 │ │ subs r0, r0, r5 │ │ sbcs.w r0, r1, r6 │ │ - bge.w 973de │ │ + bge.w 9744a │ │ add r0, sp, #72 @ 0x48 │ │ strd r8, r0, [sp, #60] @ 0x3c │ │ add r0, sp, #128 @ 0x80 │ │ str r0, [sp, #56] @ 0x38 │ │ - bl 97764 │ │ - cbz r0, 96dec │ │ + bl 310ac │ │ + cbz r0, 96e58 │ │ ldr r6, [r0, #0] │ │ mov r4, r0 │ │ str.w fp, [r0] │ │ - cbz r6, 96df4 │ │ + cbz r6, 96e60 │ │ dmb ish │ │ str.w fp, [r6, #12] │ │ dmb ish │ │ str.w fp, [r6, #16] │ │ ldrd r0, r1, [sp, #60] @ 0x3c │ │ strd r0, r1, [sp, #100] @ 0x64 │ │ add r0, sp, #128 @ 0x80 │ │ str r0, [sp, #96] @ 0x60 │ │ add r0, sp, #96 @ 0x60 │ │ mov r1, r6 │ │ str.w fp, [sp, #56] @ 0x38 │ │ - bl 977f8 │ │ + bl 977d0 │ │ ldr r0, [r4, #0] │ │ str r6, [r4, #0] │ │ cmp r0, #0 │ │ - beq.w 96c76 │ │ + beq.w 96ce2 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 96dce │ │ + bne.n 96e3a │ │ cmp r1, #1 │ │ - bne.w 96c76 │ │ + bne.w 96ce2 │ │ dmb ish │ │ - bl 93a8c │ │ - b.n 96c76 │ │ + bl 93af8 │ │ + b.n 96ce2 │ │ add r0, sp, #56 @ 0x38 │ │ - bl 978d0 │ │ - b.n 96c76 │ │ - bl 95d74 │ │ + bl 978a8 │ │ + b.n 96ce2 │ │ + bl 95de0 │ │ mov r4, r0 │ │ ldrd r0, r1, [sp, #60] @ 0x3c │ │ strd r0, r1, [sp, #100] @ 0x64 │ │ add r0, sp, #128 @ 0x80 │ │ str r0, [sp, #96] @ 0x60 │ │ add r0, sp, #96 @ 0x60 │ │ mov r1, r4 │ │ str.w fp, [sp, #56] @ 0x38 │ │ - bl 977f8 │ │ + bl 977d0 │ │ dmb ish │ │ ldrex r0, [r4] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r4] │ │ cmp r2, #0 │ │ - bne.n 96e16 │ │ + bne.n 96e82 │ │ cmp r0, #1 │ │ - bne.w 96c76 │ │ + bne.w 96ce2 │ │ mov r0, r4 │ │ dmb ish │ │ - bl 93a8c │ │ - b.n 96c76 │ │ + bl 93af8 │ │ + b.n 96ce2 │ │ movw r0, #51712 @ 0xca00 │ │ add.w r6, r8, #8 │ │ movt r0, #15258 @ 0x3b9a │ │ str.w fp, [sp, #88] @ 0x58 │ │ str r0, [sp, #64] @ 0x40 │ │ strd fp, fp, [sp, #80] @ 0x50 │ │ strd fp, fp, [sp, #72] @ 0x48 │ │ ldrex r0, [r6] │ │ cmp r0, #0 │ │ - bne.w 97362 │ │ + bne.w 973ce │ │ strex r0, r1, [r6] │ │ cmp r0, #0 │ │ - bne.n 96e50 │ │ + bne.n 96ebc │ │ dmb ish │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 97376 │ │ + bne.w 973e2 │ │ movs r7, #0 │ │ ldrb.w r0, [r8, #12] │ │ cmp r0, #0 │ │ - bne.w 976c0 │ │ + bne.w 9772c │ │ add.w r1, r8, #16 │ │ add r0, sp, #128 @ 0x80 │ │ - bl 26604 │ │ + bl 26638 │ │ ldr r4, [sp, #128] @ 0x80 │ │ cmp r4, #0 │ │ - beq.w 970b0 │ │ + beq.w 9711c │ │ ldr r0, [sp, #136] @ 0x88 │ │ str r0, [sp, #88] @ 0x58 │ │ - cbnz r7, 96e9e │ │ + cbnz r7, 96f0a │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 975f0 │ │ + bne.w 9765c │ │ dmb ish │ │ ldr r7, [sp, #36] @ 0x24 │ │ ldrex r0, [r6] │ │ strex r1, fp, [r6] │ │ cmp r1, #0 │ │ - bne.n 96ea4 │ │ + bne.n 96f10 │ │ cmp r0, #2 │ │ - beq.w 97440 │ │ + beq.w 974ac │ │ ldr.w r8, [sp, #88] @ 0x58 │ │ cmp.w r8, #0 │ │ - beq.w 97458 │ │ + beq.w 974c4 │ │ ldrb.w r1, [r8, #9] │ │ cmp r1, #0 │ │ mov.w r1, #1 │ │ - beq.w 970ec │ │ + beq.w 97158 │ │ ldrd r5, r6, [r8] │ │ str.w fp, [r8] │ │ cmp r5, #0 │ │ - beq.w 97716 │ │ + beq.w 97782 │ │ dmb ish │ │ strb.w r1, [r8, #8] │ │ - b.n 97110 │ │ + b.n 9717c │ │ dmb ish │ │ str r1, [sp, #128] @ 0x80 │ │ ldr.w r2, [r8, #68] @ 0x44 │ │ add r2, r0 │ │ str r2, [sp, #132] @ 0x84 │ │ ldrd r0, r4, [r1] │ │ dmb ish │ │ str r2, [r1, #8] │ │ ldrb.w r1, [r8, #108] @ 0x6c │ │ dmb ish │ │ ldr r7, [sp, #36] @ 0x24 │ │ cmp r1, #0 │ │ - bne.w 973ca │ │ + bne.w 97436 │ │ add.w r6, r8, #76 @ 0x4c │ │ ldrex r1, [r6] │ │ cmp r1, #0 │ │ - bne.w 973f6 │ │ + bne.w 97462 │ │ movs r2, #1 │ │ strex r1, r2, [r6] │ │ cmp r1, #0 │ │ - bne.n 96f14 │ │ + bne.n 96f80 │ │ dmb ish │ │ ldr r1, [sp, #44] @ 0x2c │ │ ldr r1, [r1, #4] │ │ lsls r1, r1, #1 │ │ - bne.w 9740e │ │ + bne.w 9747a │ │ movs r2, #0 │ │ ldrb.w r1, [r8, #80] @ 0x50 │ │ cmp r1, #0 │ │ - bne.w 976fa │ │ + bne.w 97766 │ │ ldrb.w r1, [r8, #108] @ 0x6c │ │ dmb ish │ │ cmp r1, #0 │ │ - beq.w 97258 │ │ + beq.w 972c4 │ │ cmp r2, #0 │ │ - beq.w 973aa │ │ - b.n 973b4 │ │ + beq.w 97416 │ │ + b.n 97420 │ │ cmp r4, #30 │ │ dmb ish │ │ - bne.n 96f8c │ │ + bne.n 96ff8 │ │ ldr.w r0, [sl] │ │ dmb ish │ │ cmp r0, #0 │ │ - beq.w 97224 │ │ + beq.w 97290 │ │ ldr r1, [r0, #0] │ │ dmb ish │ │ str.w r0, [r8, #4] │ │ bic.w r0, r5, #1 │ │ cmp r1, #0 │ │ it ne │ │ addne r0, #1 │ │ @@ -167415,160 +167330,160 @@ │ │ add.w r0, r4, r4, lsl #1 │ │ strd sl, r4, [sp, #136] @ 0x88 │ │ add.w r8, sl, r0, lsl #2 │ │ add.w fp, r8, #12 │ │ ldr.w r0, [r8, #12] │ │ dmb ish │ │ lsls r0, r0, #31 │ │ - bne.n 96fd8 │ │ + bne.n 97044 │ │ movs r5, #1 │ │ movs r7, #0 │ │ movs r6, #0 │ │ - b.n 96fc6 │ │ - blx d8810 │ │ + b.n 97032 │ │ + blx d8820 │ │ ldr.w r0, [fp] │ │ add r7, r5 │ │ adds r5, #2 │ │ adds r6, #1 │ │ dmb ish │ │ lsls r0, r0, #31 │ │ - bne.n 96fd8 │ │ + bne.n 97044 │ │ cmp r6, #7 │ │ - bcs.n 96fb0 │ │ + bcs.n 9701c │ │ cmp r6, #0 │ │ - beq.n 96fb4 │ │ + beq.n 97020 │ │ mov r0, r7 │ │ subs r0, #1 │ │ yield │ │ - bne.n 96fd0 │ │ - b.n 96fb4 │ │ + bne.n 9703c │ │ + b.n 97020 │ │ add.w r0, r8, #4 │ │ adds r1, r4, #1 │ │ ldrd r0, ip, [r0] │ │ cmp r1, #31 │ │ - bne.n 9702e │ │ + bne.n 9709a │ │ ldrd r5, r8, [sp, #32] │ │ add.w r1, sl, #12 │ │ movs r2, #0 │ │ mov.w fp, #0 │ │ - b.n 96ffc │ │ + b.n 97068 │ │ adds r2, #1 │ │ cmp r2, #30 │ │ - beq.n 97096 │ │ + beq.n 97102 │ │ add.w r3, r2, r2, lsl #1 │ │ ldr.w r7, [r1, r3, lsl #2] │ │ dmb ish │ │ lsls r7, r7, #30 │ │ - bmi.n 96ff6 │ │ + bmi.n 97062 │ │ add.w r3, r1, r3, lsl #2 │ │ dmb ish │ │ ldrex r7, [r3] │ │ orr.w r6, r7, #4 │ │ strex r4, r6, [r3] │ │ cmp r4, #0 │ │ - bne.n 97014 │ │ + bne.n 97080 │ │ lsls r3, r7, #30 │ │ dmb ish │ │ - bmi.n 96ff6 │ │ - b.n 970a4 │ │ + bmi.n 97062 │ │ + b.n 97110 │ │ dmb ish │ │ ldr r5, [sp, #32] │ │ ldrex r2, [fp] │ │ orr.w r3, r2, #2 │ │ strex r7, r3, [fp] │ │ cmp r7, #0 │ │ - bne.n 97034 │ │ + bne.n 970a0 │ │ dmb ish │ │ mov.w fp, #0 │ │ ldr.w r8, [sp, #36] @ 0x24 │ │ lsls r2, r2, #29 │ │ - bpl.n 970a4 │ │ + bpl.n 97110 │ │ cmp r4, #28 │ │ - bhi.n 97096 │ │ + bhi.n 97102 │ │ add.w r2, sl, #12 │ │ - b.n 97064 │ │ + b.n 970d0 │ │ adds r1, #1 │ │ cmp r1, #30 │ │ - beq.n 97096 │ │ + beq.n 97102 │ │ add.w r3, r1, r1, lsl #1 │ │ ldr.w r7, [r2, r3, lsl #2] │ │ dmb ish │ │ lsls r7, r7, #30 │ │ - bmi.n 9705e │ │ + bmi.n 970ca │ │ add.w r3, r2, r3, lsl #2 │ │ dmb ish │ │ ldrex r7, [r3] │ │ orr.w r6, r7, #4 │ │ strex r4, r6, [r3] │ │ cmp r4, #0 │ │ - bne.n 9707c │ │ + bne.n 970e8 │ │ lsls r3, r7, #30 │ │ dmb ish │ │ - bmi.n 9705e │ │ - b.n 970a4 │ │ + bmi.n 970ca │ │ + b.n 97110 │ │ mov r4, r0 │ │ mov r0, sl │ │ mov r6, ip │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov ip, r6 │ │ mov r0, r4 │ │ str.w ip, [sp, #52] @ 0x34 │ │ mov r7, r8 │ │ ldr.w sl, [sp, #28] │ │ - b.n 97486 │ │ + b.n 974f2 │ │ ldrb.w r0, [r8, #64] @ 0x40 │ │ - cbz r0, 97116 │ │ + cbz r0, 97182 │ │ movs r0, #1 │ │ str.w fp, [sp, #48] @ 0x30 │ │ strb.w r0, [sp, #52] @ 0x34 │ │ - cbnz r7, 970cc │ │ + cbnz r7, 97138 │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 9765e │ │ + bne.w 976ca │ │ dmb ish │ │ ldr r7, [sp, #36] @ 0x24 │ │ ldrex r0, [r6] │ │ strex r1, fp, [r6] │ │ cmp r1, #0 │ │ - bne.n 970d2 │ │ + bne.n 9713e │ │ ldr r5, [sp, #32] │ │ cmp r0, #2 │ │ - bne.w 97484 │ │ + bne.w 974f0 │ │ movs r0, #240 @ 0xf0 │ │ mov r1, r6 │ │ - b.n 971ea │ │ + b.n 97256 │ │ ldrb.w r2, [r8, #8] │ │ dmb ish │ │ cmp r2, #0 │ │ - beq.w 97328 │ │ + beq.w 97394 │ │ ldrd r5, r6, [r8] │ │ str.w fp, [r8] │ │ cmp r5, #0 │ │ - beq.w 9771e │ │ + beq.w 9778a │ │ mov r0, r8 │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldr r7, [sp, #36] @ 0x24 │ │ strd r5, r6, [sp, #48] @ 0x30 │ │ - b.n 97462 │ │ + b.n 974ce │ │ add r0, sp, #56 @ 0x38 │ │ str r0, [sp, #100] @ 0x64 │ │ add r0, sp, #72 @ 0x48 │ │ strb.w r7, [sp, #112] @ 0x70 │ │ strd r6, r6, [sp, #104] @ 0x68 │ │ str r0, [sp, #96] @ 0x60 │ │ - bl 97764 │ │ + bl 310ac │ │ cmp r0, #0 │ │ - beq.w 97426 │ │ + beq.w 97492 │ │ ldr r4, [r0, #0] │ │ mov sl, r0 │ │ ldr r5, [sp, #32] │ │ cmp r4, #0 │ │ str.w fp, [r0] │ │ - beq.w 97616 │ │ + beq.w 97682 │ │ dmb ish │ │ str.w fp, [r4, #12] │ │ dmb ish │ │ str.w fp, [r4, #16] │ │ ldr r1, [sp, #12] │ │ ldrd lr, r2, [sp, #96] @ 0x60 │ │ ldrd r3, ip, [sp, #104] @ 0x68 │ │ @@ -167581,856 +167496,798 @@ │ │ strb r0, [r1, #2] │ │ movs r0, #2 │ │ strh r6, [r1, #0] │ │ add r1, sp, #128 @ 0x80 │ │ strb.w r0, [sp, #112] @ 0x70 │ │ add r0, sp, #120 @ 0x78 │ │ strb.w r7, [sp, #144] @ 0x90 │ │ - bl 97a5c │ │ + bl 97a34 │ │ ldr.w r0, [sl] │ │ str.w r4, [sl] │ │ ldr.w sl, [sp, #28] │ │ ldr r7, [sp, #36] @ 0x24 │ │ - cbz r0, 971ae │ │ + cbz r0, 9721a │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 97194 │ │ + bne.n 97200 │ │ cmp r1, #1 │ │ - bne.n 971ae │ │ + bne.n 9721a │ │ dmb ish │ │ - bl 93a8c │ │ + bl 93af8 │ │ ldrd r0, r1, [sp, #120] @ 0x78 │ │ strd r0, r1, [sp, #48] @ 0x30 │ │ ldrb.w r0, [sp, #112] @ 0x70 │ │ cmp r0, #2 │ │ - beq.w 97484 │ │ + beq.w 974f0 │ │ ldr r4, [sp, #108] @ 0x6c │ │ lsls r0, r0, #31 │ │ - bne.n 971d0 │ │ + bne.n 9723c │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 9766e │ │ + bne.w 976da │ │ dmb ish │ │ ldrex r0, [r4] │ │ strex r1, fp, [r4] │ │ cmp r1, #0 │ │ - bne.n 971d4 │ │ + bne.n 97240 │ │ cmp r0, #2 │ │ - bne.w 97484 │ │ + bne.w 974f0 │ │ movs r0, #240 @ 0xf0 │ │ mov r1, r4 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ - b.n 97484 │ │ + blx d87e0 │ │ + b.n 974f0 │ │ mov r0, r9 │ │ clrex │ │ mov r4, r1 │ │ - bl 778fe │ │ + bl 77966 │ │ mov r1, r4 │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - beq.w 96a84 │ │ + beq.w 96af0 │ │ mov r4, r1 │ │ - bl 7770c │ │ + bl 77774 │ │ mov r1, r4 │ │ eor.w r4, r0, #1 │ │ ldrb.w r0, [r7, #32] │ │ cmp r0, #0 │ │ - beq.w 96a90 │ │ - b.n 976a2 │ │ + beq.w 96afc │ │ + b.n 9770e │ │ movs r6, #1 │ │ mov.w fp, #0 │ │ movs r7, #0 │ │ - b.n 97246 │ │ - blx d8810 │ │ + b.n 972b2 │ │ + blx d8820 │ │ ldr.w r0, [sl] │ │ add fp, r6 │ │ adds r6, #2 │ │ adds r7, #1 │ │ cmp r0, #0 │ │ dmb ish │ │ - bne.w 96f6e │ │ + bne.w 96fda │ │ cmp r7, #7 │ │ - bcs.n 9722e │ │ + bcs.n 9729a │ │ cmp r7, #0 │ │ - beq.n 97232 │ │ + beq.n 9729e │ │ mov r0, fp │ │ subs r0, #1 │ │ yield │ │ - bne.n 97250 │ │ - b.n 97232 │ │ + bne.n 972bc │ │ + b.n 9729e │ │ strd r2, r0, [sp, #4] │ │ add.w r1, r8, #84 @ 0x54 │ │ add r0, sp, #96 @ 0x60 │ │ - bl 26604 │ │ + bl 26638 │ │ ldr r0, [sp, #96] @ 0x60 │ │ - cbz r0, 9728a │ │ + cbz r0, 972f6 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 9726e │ │ + bne.n 972da │ │ cmp r1, #1 │ │ - bne.n 9728a │ │ + bne.n 972f6 │ │ dmb ish │ │ ldr r0, [sp, #96] @ 0x60 │ │ - bl 93a8c │ │ + bl 93af8 │ │ ldrd r5, r0, [r8, #100] @ 0x64 │ │ cmp r0, #0 │ │ str.w fp, [r8, #104] @ 0x68 │ │ - beq.n 9731e │ │ + beq.n 9738a │ │ add.w r0, r0, r0, lsl #1 │ │ add.w sl, r5, r0, lsl #2 │ │ ldrd r0, r1, [r5] │ │ ldrex r2, [r0, #12] │ │ - cbnz r2, 972be │ │ + cbnz r2, 9732a │ │ add.w r2, r0, #12 │ │ dmb ish │ │ strex r3, r1, [r2] │ │ - cbz r3, 972ec │ │ + cbz r3, 97358 │ │ ldrex r3, [r2] │ │ cmp r3, #0 │ │ - beq.n 972b0 │ │ + beq.n 9731c │ │ clrex │ │ dmb ish │ │ adds r5, #12 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 972cc │ │ + bne.n 97338 │ │ cmp r1, #1 │ │ itt eq │ │ dmbeq ish │ │ - bleq 93a8c │ │ + bleq 93af8 │ │ cmp r5, sl │ │ - bne.n 9729e │ │ - b.n 9731e │ │ + bne.n 9730a │ │ + b.n 9738a │ │ dmb ish │ │ movs r7, #1 │ │ ldr r1, [r0, #8] │ │ dmb ish │ │ adds r1, #24 │ │ ldrex r2, [r1] │ │ strex r3, r7, [r1] │ │ cmp r3, #0 │ │ - bne.n 972fa │ │ + bne.n 97366 │ │ ldr r7, [sp, #36] @ 0x24 │ │ adds r2, #1 │ │ - bne.n 972c6 │ │ + bne.n 97332 │ │ mov r7, r0 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ + blx d87e0 │ │ mov r0, r7 │ │ ldr r7, [sp, #36] @ 0x24 │ │ - b.n 972c6 │ │ + b.n 97332 │ │ ldr.w r0, [r8, #92] @ 0x5c │ │ - cbz r0, 9738a │ │ + cbz r0, 973f6 │ │ movs r1, #0 │ │ - b.n 97394 │ │ + b.n 97400 │ │ movs r5, #1 │ │ movs r7, #0 │ │ movs r6, #0 │ │ - b.n 97350 │ │ + b.n 973bc │ │ mov fp, r1 │ │ - blx d8810 │ │ + blx d8820 │ │ mov r1, fp │ │ mov.w fp, #0 │ │ ldrb.w r2, [r8, #8] │ │ add r7, r5 │ │ adds r5, #2 │ │ adds r6, #1 │ │ cmp r2, #0 │ │ dmb ish │ │ - bne.w 970fa │ │ + bne.w 97166 │ │ cmp r6, #7 │ │ - bcs.n 97330 │ │ + bcs.n 9739c │ │ cmp r6, #0 │ │ - beq.n 9733c │ │ + beq.n 973a8 │ │ mov r2, r7 │ │ subs r2, #1 │ │ yield │ │ - bne.n 9735a │ │ - b.n 9733c │ │ + bne.n 973c6 │ │ + b.n 973a8 │ │ mov r0, r6 │ │ clrex │ │ - bl 778fe │ │ + bl 77966 │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - beq.w 96e70 │ │ - bl 7770c │ │ + beq.w 96edc │ │ + bl 77774 │ │ eor.w r7, r0, #1 │ │ ldrb.w r0, [r8, #12] │ │ cmp r0, #0 │ │ - beq.w 96e7c │ │ - b.n 976c0 │ │ + beq.w 96ee8 │ │ + b.n 9772c │ │ ldr.w r0, [r8, #104] @ 0x68 │ │ clz r0, r0 │ │ lsrs r1, r0, #5 │ │ ldr.w sl, [sp, #28] │ │ ldrd r2, r0, [sp, #4] │ │ dmb ish │ │ strb.w r1, [r8, #108] @ 0x6c │ │ dmb ish │ │ - cbnz r2, 973b4 │ │ + cbnz r2, 97420 │ │ ldr r1, [sp, #44] @ 0x2c │ │ ldr r1, [r1, #4] │ │ lsls r1, r1, #1 │ │ - bne.w 97602 │ │ + bne.w 9766e │ │ dmb ish │ │ ldrex r1, [r6] │ │ strex r2, fp, [r6] │ │ cmp r2, #0 │ │ - bne.n 973b8 │ │ + bne.n 97424 │ │ cmp r1, #2 │ │ - beq.w 975de │ │ + beq.w 9764a │ │ str r4, [sp, #52] @ 0x34 │ │ ldr r5, [sp, #32] │ │ - b.n 97486 │ │ + b.n 974f2 │ │ movs r0, #1 │ │ ldrd sl, r5, [sp, #28] │ │ strb.w r0, [sp, #52] @ 0x34 │ │ movs r0, #0 │ │ - b.n 97486 │ │ + b.n 974f2 │ │ movs r0, #0 │ │ ldr r5, [sp, #32] │ │ strb.w r0, [sp, #52] @ 0x34 │ │ - b.n 97486 │ │ + b.n 974f2 │ │ movs r0, #1 │ │ ldrd r5, r7, [sp, #32] │ │ strb.w r0, [sp, #52] @ 0x34 │ │ movs r0, #0 │ │ - b.n 97486 │ │ + b.n 974f2 │ │ mov r5, r0 │ │ mov r0, r6 │ │ clrex │ │ - bl 778fe │ │ + bl 77966 │ │ mov r0, r5 │ │ ldr r1, [sp, #44] @ 0x2c │ │ ldr r1, [r1, #4] │ │ lsls r1, r1, #1 │ │ - beq.w 96f36 │ │ + beq.w 96fa2 │ │ mov r5, r0 │ │ - bl 7770c │ │ + bl 77774 │ │ eor.w r2, r0, #1 │ │ mov r0, r5 │ │ ldrb.w r1, [r8, #80] @ 0x50 │ │ cmp r1, #0 │ │ - beq.w 96f42 │ │ - b.n 976fa │ │ + beq.w 96fae │ │ + b.n 97766 │ │ add r0, sp, #48 @ 0x30 │ │ add r1, sp, #96 @ 0x60 │ │ - bl 97ee4 │ │ + bl 97ebc │ │ ldrd sl, r5, [sp, #28] │ │ ldr r7, [sp, #36] @ 0x24 │ │ ldrb.w r0, [sp, #112] @ 0x70 │ │ cmp r0, #2 │ │ - bne.w 971c0 │ │ - b.n 97484 │ │ + bne.w 9722c │ │ + b.n 974f0 │ │ movs r0, #240 @ 0xf0 │ │ mov r1, r6 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ + blx d87e0 │ │ ldr.w r8, [sp, #88] @ 0x58 │ │ cmp.w r8, #0 │ │ - bne.w 96ec2 │ │ + bne.w 96f2e │ │ movs r0, #1 │ │ str.w fp, [sp, #48] @ 0x30 │ │ strb.w r0, [sp, #52] @ 0x34 │ │ ldr r5, [sp, #32] │ │ dmb ish │ │ ldrex r0, [r4] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r4] │ │ cmp r2, #0 │ │ - bne.n 97468 │ │ + bne.n 974d4 │ │ cmp r0, #1 │ │ - bne.n 97484 │ │ + bne.n 974f0 │ │ mov r0, r4 │ │ dmb ish │ │ - bl 93a8c │ │ + bl 93af8 │ │ ldr r0, [sp, #48] @ 0x30 │ │ ldr r4, [sp, #52] @ 0x34 │ │ ldr r1, [sp, #40] @ 0x28 │ │ - cbnz r1, 97496 │ │ + cbnz r1, 97502 │ │ ldr r1, [sp, #44] @ 0x2c │ │ ldr r1, [r1, #4] │ │ lsls r1, r1, #1 │ │ - bne.w 9759a │ │ + bne.w 97606 │ │ dmb ish │ │ ldrex r1, [r9] │ │ strex r2, fp, [r9] │ │ cmp r2, #0 │ │ - bne.n 9749a │ │ + bne.n 97506 │ │ cmp r1, #2 │ │ - beq.n 97582 │ │ + beq.n 975ee │ │ cmp r0, #0 │ │ - beq.w 9767c │ │ + beq.w 976e8 │ │ dmb ish │ │ ldrex r1, [sl] │ │ adds r1, #1 │ │ strex r2, r1, [sl] │ │ cmp r2, #0 │ │ - bne.n 974b4 │ │ + bne.n 97520 │ │ dmb ish │ │ dmb ish │ │ ldrex r1, [r5] │ │ subs r1, #1 │ │ strex r2, r1, [r5] │ │ cmp r2, #0 │ │ - bne.n 974ca │ │ + bne.n 97536 │ │ dmb ish │ │ ldr r1, [r4, #12] │ │ blx r1 │ │ dmb ish │ │ ldrex r0, [sl] │ │ subs r0, #1 │ │ strex r1, r0, [sl] │ │ cmp r1, #0 │ │ - bne.n 974e4 │ │ + bne.n 97550 │ │ dmb ish │ │ ldr r0, [r5, #0] │ │ dmb ish │ │ cmp r0, #0 │ │ - bne.w 96a54 │ │ + bne.w 96ac0 │ │ ldr.w r0, [sl] │ │ dmb ish │ │ cmp r0, #0 │ │ - bne.w 96a54 │ │ + bne.w 96ac0 │ │ ldr r4, [sp, #24] │ │ movs r1, #1 │ │ ldrex r0, [r4] │ │ - cbnz r0, 97576 │ │ + cbnz r0, 975e2 │ │ strex r0, r1, [r4] │ │ cmp r0, #0 │ │ - bne.n 97514 │ │ + bne.n 97580 │ │ dmb ish │ │ ldr r0, [sp, #44] @ 0x2c │ │ movs r6, #1 │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.n 975ae │ │ + bne.n 9761a │ │ ldrb.w r0, [r7, #48] @ 0x30 │ │ cmp r0, #0 │ │ - bne.w 976dc │ │ + bne.w 97748 │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.n 975d0 │ │ + bne.n 9763c │ │ dmb ish │ │ ldrex r0, [r4] │ │ strex r1, fp, [r4] │ │ cmp r1, #0 │ │ - bne.n 97546 │ │ + bne.n 975b2 │ │ cmp r0, #2 │ │ - beq.n 975c2 │ │ + beq.n 9762e │ │ ldr r1, [sp, #20] │ │ ldrex r0, [r1] │ │ adds r0, #1 │ │ strex r2, r0, [r1] │ │ cmp r2, #0 │ │ - bne.n 97558 │ │ + bne.n 975c4 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ mvn.w r3, #2147483648 @ 0x80000000 │ │ - blx d87d0 │ │ - b.w 96a54 │ │ + blx d87e0 │ │ + b.w 96ac0 │ │ mov r0, r4 │ │ clrex │ │ - bl 778fe │ │ - b.n 97526 │ │ + bl 77966 │ │ + b.n 97592 │ │ mov r6, r0 │ │ movs r0, #240 @ 0xf0 │ │ mov r1, r9 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ + blx d87e0 │ │ mov r0, r6 │ │ cmp r0, #0 │ │ - bne.w 974b0 │ │ - b.n 9767c │ │ + bne.w 9751c │ │ + b.n 976e8 │ │ mov r6, r0 │ │ - bl 7770c │ │ + bl 77774 │ │ cmp r0, #0 │ │ mov r0, r6 │ │ itt eq │ │ moveq r1, #1 │ │ strbeq.w r1, [r7, #32] │ │ - b.n 97496 │ │ - bl 7770c │ │ + b.n 97502 │ │ + bl 77774 │ │ ldrb.w r1, [r7, #48] @ 0x30 │ │ cmp r1, #0 │ │ - bne.w 97726 │ │ + bne.w 97792 │ │ cmp r0, #0 │ │ - bne.n 9753a │ │ - b.n 97542 │ │ + bne.n 975a6 │ │ + b.n 975ae │ │ movs r0, #240 @ 0xf0 │ │ mov r1, r4 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ - b.n 97556 │ │ - bl 7770c │ │ + blx d87e0 │ │ + b.n 975c2 │ │ + bl 77774 │ │ cmp r0, #0 │ │ it eq │ │ strbeq.w r6, [r7, #48] @ 0x30 │ │ - b.n 97542 │ │ + b.n 975ae │ │ mov r5, r0 │ │ movs r0, #240 @ 0xf0 │ │ mov r1, r6 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ + blx d87e0 │ │ mov r0, r5 │ │ - b.n 973ca │ │ - bl 7770c │ │ + b.n 97436 │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq.w r0, [r8, #12] │ │ - b.w 96e9e │ │ + b.w 96f0a │ │ mov r5, r0 │ │ - bl 7770c │ │ + bl 77774 │ │ cmp r0, #0 │ │ mov r0, r5 │ │ itt eq │ │ moveq r1, #1 │ │ strbeq.w r1, [r8, #80] @ 0x50 │ │ - b.n 973b4 │ │ - bl 95d74 │ │ + b.n 97420 │ │ + bl 95de0 │ │ mov r4, r0 │ │ movs r0, #2 │ │ strb.w r0, [sp, #112] @ 0x70 │ │ add r0, sp, #56 @ 0x38 │ │ str r0, [sp, #132] @ 0x84 │ │ add r0, sp, #72 @ 0x48 │ │ str r0, [sp, #128] @ 0x80 │ │ add r0, sp, #120 @ 0x78 │ │ add r1, sp, #128 @ 0x80 │ │ mov r2, r4 │ │ strb.w r7, [sp, #144] @ 0x90 │ │ strd r6, r6, [sp, #136] @ 0x88 │ │ - bl 97a5c │ │ + bl 97a34 │ │ dmb ish │ │ ldrex r0, [r4] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r4] │ │ cmp r2, #0 │ │ - bne.n 97640 │ │ + bne.n 976ac │ │ ldr.w sl, [sp, #28] │ │ cmp r0, #1 │ │ ldr r7, [sp, #36] @ 0x24 │ │ - bne.w 971ae │ │ + bne.w 9721a │ │ mov r0, r4 │ │ - b.n 971a6 │ │ - bl 7770c │ │ + b.n 97212 │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq.w r0, [r8, #12] │ │ - b.n 970cc │ │ - bl 7770c │ │ + b.n 97138 │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq r0, [r4, #4] │ │ - b.n 971d0 │ │ + b.n 9723c │ │ dmb ish │ │ ldrex r0, [r7] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r7] │ │ cmp r2, #0 │ │ - bne.n 97680 │ │ + bne.n 976ec │ │ cmp r0, #1 │ │ - bne.n 9769c │ │ + bne.n 97708 │ │ mov r0, r7 │ │ dmb ish │ │ - bl 97f5c │ │ + bl 97f34 │ │ add sp, #148 @ 0x94 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #156] @ (97740 ) │ │ + ldr r0, [pc, #156] @ (977ac ) │ │ add r2, sp, #128 @ 0x80 │ │ - ldr r3, [pc, #156] @ (97744 ) │ │ - ldr r1, [pc, #156] @ (97748 ) │ │ + ldr r3, [pc, #156] @ (977b0 ) │ │ + ldr r1, [pc, #156] @ (977b4 ) │ │ add r0, pc │ │ add r3, pc │ │ strb.w r4, [sp, #132] @ 0x84 │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #41 @ 0x29 │ │ str.w r9, [sp, #128] @ 0x80 │ │ - bl 414b0 │ │ - ldr r0, [pc, #148] @ (97758 ) │ │ + bl 417b8 │ │ + ldr r0, [pc, #148] @ (977c4 ) │ │ add r2, sp, #128 @ 0x80 │ │ - ldr r3, [pc, #148] @ (9775c ) │ │ - ldr r1, [pc, #152] @ (97760 ) │ │ + ldr r3, [pc, #148] @ (977c8 ) │ │ + ldr r1, [pc, #152] @ (977cc ) │ │ add r0, pc │ │ add r3, pc │ │ strb.w r7, [sp, #132] @ 0x84 │ │ add r1, pc │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ str r6, [sp, #128] @ 0x80 │ │ - bl 414b0 │ │ + bl 417b8 │ │ movs r1, #0 │ │ - ldr r0, [pc, #84] @ (97734 ) │ │ - ldr r3, [pc, #84] @ (97738 ) │ │ - ldr r2, [pc, #88] @ (9773c ) │ │ + ldr r0, [pc, #84] @ (977a0 ) │ │ + ldr r3, [pc, #84] @ (977a4 ) │ │ + ldr r2, [pc, #88] @ (977a8 ) │ │ add r0, pc │ │ add r3, pc │ │ strb.w r1, [sp, #132] @ 0x84 │ │ add r2, pc │ │ str r2, [sp, #0] │ │ add r2, sp, #128 @ 0x80 │ │ movs r1, #36 @ 0x24 │ │ str r4, [sp, #128] @ 0x80 │ │ - bl 414b0 │ │ - ldr r0, [pc, #80] @ (9774c ) │ │ - ldr r3, [pc, #80] @ (97750 ) │ │ - ldr r1, [pc, #84] @ (97754 ) │ │ + bl 417b8 │ │ + ldr r0, [pc, #80] @ (977b8 ) │ │ + ldr r3, [pc, #80] @ (977bc ) │ │ + ldr r1, [pc, #84] @ (977c0 ) │ │ add r0, pc │ │ strb.w r2, [sp, #100] @ 0x64 │ │ add r3, pc │ │ add r1, pc │ │ add r2, sp, #96 @ 0x60 │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ str r6, [sp, #96] @ 0x60 │ │ - bl 414b0 │ │ - ldr r0, [pc, #24] @ (97730 ) │ │ + bl 417b8 │ │ + ldr r0, [pc, #24] @ (9779c ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #12] @ (9772c ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #12] @ (97798 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ eor.w r1, r0, #1 │ │ - b.n 976de │ │ - ldr r0, [pc, #800] @ (97a50 ) │ │ - movs r4, r0 │ │ - ldr r0, [pc, #896] @ (97ab4 ) │ │ + b.n 9774a │ │ + ldr r0, [pc, #432] @ (9794c ) │ │ movs r4, r0 │ │ - adds r5, r0, #5 │ │ - vtbx.8 d20, {d8-d10}, d2 │ │ + ldr r0, [pc, #528] @ (979b0 ) │ │ movs r4, r0 │ │ - ldr r0, [pc, #752] @ (97a30 ) │ │ + adds r1, r3, #3 │ │ + @ instruction: 0xfff849f6 │ │ movs r4, r0 │ │ - adds r6, r2, #5 │ │ - vtbl.8 d20, {d24-d26}, d12 │ │ + ldr r0, [pc, #384] @ (9792c ) │ │ movs r4, r0 │ │ - ldr r0, [pc, #920] @ (97ae4 ) │ │ + adds r2, r5, #3 │ │ + vtbl.8 d20, {d8-d10}, d16 │ │ movs r4, r0 │ │ - adds r3, r0, #6 │ │ - vtbx.8 d20, {d8-d10}, d2 │ │ + ldr r0, [pc, #552] @ (979e0 ) │ │ movs r4, r0 │ │ - ldr r1, [pc, #832] @ (97a98 ) │ │ + adds r7, r2, #4 │ │ + @ instruction: 0xfff849f6 │ │ movs r4, r0 │ │ - adds r3, r7, #6 │ │ - @ instruction: 0xfff84a9e │ │ + ldr r1, [pc, #464] @ (97994 ) │ │ movs r4, r0 │ │ - ldr r1, [pc, #224] @ (97844 ) │ │ + adds r7, r1, #5 │ │ + vtbx.8 d20, {d8-d10}, d2 │ │ movs r4, r0 │ │ - push {r4, r5, r6, lr} │ │ - ldr r0, [pc, #140] @ (977f4 ) │ │ - add r0, pc │ │ - ldr r4, [r0, #0] │ │ - dmb ish │ │ - cbz r4, 9777e │ │ - mov r0, r4 │ │ - blx d8830 │ │ - cmp r0, #1 │ │ - bls.n 9778e │ │ - pop {r4, r5, r6, pc} │ │ - bl 7740c │ │ - mov r4, r0 │ │ - mov r0, r4 │ │ - blx d8830 │ │ - cmp r0, #1 │ │ - bhi.n 9777c │ │ - itt eq │ │ - moveq r0, #0 │ │ - popeq {r4, r5, r6, pc} │ │ - bl 95d74 │ │ - mov r5, r0 │ │ - movs r0, #8 │ │ - blx d87f0 │ │ - cbz r0, 977ea │ │ - strd r5, r4, [r0] │ │ - mov r6, r0 │ │ - mov r0, r4 │ │ - blx d8830 │ │ - mov r5, r0 │ │ - mov r0, r4 │ │ - mov r1, r6 │ │ - mov r4, r6 │ │ - blx d8840 │ │ - cbz r5, 977e6 │ │ - ldr r0, [r5, #0] │ │ - cbz r0, 977e0 │ │ - dmb ish │ │ - ldrex r1, [r0] │ │ - subs r2, r1, #1 │ │ - strex r3, r2, [r0] │ │ - cmp r3, #0 │ │ - bne.n 977c4 │ │ - cmp r1, #1 │ │ - bne.n 977e0 │ │ - dmb ish │ │ - ldr r0, [r5, #0] │ │ - bl 93a8c │ │ - mov r0, r5 │ │ - blx d87c0 │ │ - mov r0, r4 │ │ - pop {r4, r5, r6, pc} │ │ - movs r0, #4 │ │ - movs r1, #8 │ │ - bl 3de2a │ │ - nop │ │ - str r4, [r1, #116] @ 0x74 │ │ + ldr r0, [pc, #880] @ (97b40 ) │ │ movs r4, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #16 │ │ ldrd r8, r4, [r0] │ │ add.w r5, r4, #112 @ 0x70 │ │ mov r6, r1 │ │ mov r7, r0 │ │ mov r0, r5 │ │ mov r2, r6 │ │ mov r1, r8 │ │ - bl 98b78 │ │ + bl 98b50 │ │ ldr r0, [r4, #0] │ │ dmb ish │ │ ldr r1, [r4, #32] │ │ dmb ish │ │ ldr r2, [r4, #72] @ 0x48 │ │ bics r1, r2 │ │ cmp r1, r0 │ │ - bne.n 97834 │ │ + bne.n 9780c │ │ ldr r0, [r4, #32] │ │ dmb ish │ │ ldr r1, [r4, #72] @ 0x48 │ │ tst r1, r0 │ │ - beq.n 9785a │ │ + beq.n 97832 │ │ ldrex r0, [r6, #12] │ │ - cbnz r0, 97852 │ │ + cbnz r0, 9782a │ │ add.w r0, r6, #12 │ │ movs r1, #1 │ │ dmb ish │ │ strex r2, r1, [r0] │ │ - cbz r2, 97856 │ │ + cbz r2, 9782e │ │ ldrex r2, [r0] │ │ cmp r2, #0 │ │ - beq.n 97844 │ │ + beq.n 9781c │ │ clrex │ │ dmb ish │ │ ldr r0, [r7, #8] │ │ ldrd r2, r3, [r0] │ │ ldr r0, [r0, #8] │ │ str r0, [sp, #0] │ │ mov r0, r6 │ │ - bl 98968 │ │ + bl 98940 │ │ subs r1, r0, #1 │ │ cmp r1, #2 │ │ - bcs.n 978a2 │ │ + bcs.n 9787a │ │ add r0, sp, #4 │ │ mov r1, r5 │ │ mov r2, r8 │ │ - bl 98cb4 │ │ + bl 98c8c │ │ ldr r0, [sp, #4] │ │ - cbz r0, 978ac │ │ + cbz r0, 97884 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 97882 │ │ + bne.n 9785a │ │ cmp r1, #1 │ │ - bne.n 978a6 │ │ + bne.n 9787e │ │ dmb ish │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, lr} │ │ - b.w 93a8c │ │ + b.w 93af8 │ │ cmp r0, #3 │ │ - bne.n 978b4 │ │ + bne.n 9788c │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ - ldr r0, [pc, #20] @ (978c4 ) │ │ + ldr r0, [pc, #20] @ (9789c ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #16] @ (978c8 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #16] @ (978a0 ) │ │ movs r1, #40 @ 0x28 │ │ - ldr r2, [pc, #16] @ (978cc ) │ │ + ldr r2, [pc, #16] @ (978a4 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ + bl 3fd54 │ │ nop │ │ - @ instruction: 0x47da │ │ + ldr r0, [pc, #72] @ (978e8 ) │ │ movs r4, r0 │ │ - subs r3, r2, r6 │ │ - vqshl.u64 d20, d28, #56 @ 0x38 │ │ + subs r3, r7, r6 │ │ + vqshl.u64 q10, q10, #56 @ 0x38 │ │ movs r4, r0 │ │ push {r4, r5, r7, lr} │ │ sub sp, #16 │ │ mov r5, r0 │ │ - bl 95d74 │ │ + bl 95de0 │ │ mov r4, r0 │ │ ldrd r0, r2, [r5] │ │ ldr r1, [r5, #8] │ │ movs r3, #0 │ │ str r3, [r5, #0] │ │ - cbz r0, 97920 │ │ + cbz r0, 978f8 │ │ strd r0, r2, [sp, #4] │ │ add r0, sp, #4 │ │ str r1, [sp, #12] │ │ mov r1, r4 │ │ - bl 977f8 │ │ + bl 977d0 │ │ dmb ish │ │ ldrex r0, [r4] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r4] │ │ cmp r2, #0 │ │ - bne.n 978fa │ │ + bne.n 978d2 │ │ cmp r0, #1 │ │ - bne.n 9791c │ │ + bne.n 978f4 │ │ dmb ish │ │ mov r0, r4 │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w 93a8c │ │ + b.w 93af8 │ │ add sp, #16 │ │ pop {r4, r5, r7, pc} │ │ - ldr r0, [pc, #4] @ (97928 ) │ │ + ldr r0, [pc, #4] @ (97900 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - @ instruction: 0x47d6 │ │ + bl 3fd40 │ │ + ldr r0, [pc, #56] @ (9793c ) │ │ movs r4, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #16 │ │ ldrd r8, r4, [r0] │ │ add.w r5, r4, #64 @ 0x40 │ │ mov r6, r1 │ │ mov r7, r0 │ │ mov r0, r5 │ │ mov r2, r6 │ │ mov r1, r8 │ │ - bl 98b78 │ │ + bl 98b50 │ │ ldr r0, [r4, #0] │ │ dmb ish │ │ ldr r1, [r4, #32] │ │ dmb ish │ │ eors r0, r1 │ │ cmp r0, #2 │ │ - bcs.n 97964 │ │ + bcs.n 9793c │ │ ldr r0, [r4, #32] │ │ dmb ish │ │ lsls r0, r0, #31 │ │ - beq.n 9798a │ │ + beq.n 97962 │ │ ldrex r0, [r6, #12] │ │ - cbnz r0, 97982 │ │ + cbnz r0, 9795a │ │ add.w r0, r6, #12 │ │ movs r1, #1 │ │ dmb ish │ │ strex r2, r1, [r0] │ │ - cbz r2, 97986 │ │ + cbz r2, 9795e │ │ ldrex r2, [r0] │ │ cmp r2, #0 │ │ - beq.n 97974 │ │ + beq.n 9794c │ │ clrex │ │ dmb ish │ │ ldr r0, [r7, #8] │ │ ldrd r2, r3, [r0] │ │ ldr r0, [r0, #8] │ │ str r0, [sp, #0] │ │ mov r0, r6 │ │ - bl 98968 │ │ + bl 98940 │ │ subs r1, r0, #1 │ │ cmp r1, #2 │ │ - bcs.n 979d2 │ │ + bcs.n 979aa │ │ add r0, sp, #4 │ │ mov r1, r5 │ │ mov r2, r8 │ │ - bl 98cb4 │ │ + bl 98c8c │ │ ldr r0, [sp, #4] │ │ - cbz r0, 979dc │ │ + cbz r0, 979b4 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 979b2 │ │ + bne.n 9798a │ │ cmp r1, #1 │ │ - bne.n 979d6 │ │ + bne.n 979ae │ │ dmb ish │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, lr} │ │ - b.w 93a8c │ │ + b.w 93af8 │ │ cmp r0, #3 │ │ - bne.n 979e4 │ │ + bne.n 979bc │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ - ldr r0, [pc, #20] @ (979f4 ) │ │ + ldr r0, [pc, #20] @ (979cc ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #16] @ (979f8 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #16] @ (979d0 ) │ │ movs r1, #40 @ 0x28 │ │ - ldr r2, [pc, #16] @ (979fc ) │ │ + ldr r2, [pc, #16] @ (979d4 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ + bl 3fd54 │ │ nop │ │ - cmp sl, sp │ │ + mov r2, r4 │ │ movs r4, r0 │ │ - subs r3, r4, r1 │ │ - @ instruction: 0xfff845cc │ │ + subs r3, r1, r2 │ │ + vpadal.s32 d20, d4 │ │ movs r4, r0 │ │ push {r4, r5, r7, lr} │ │ sub sp, #16 │ │ mov r5, r0 │ │ - bl 95d74 │ │ + bl 95de0 │ │ mov r4, r0 │ │ ldrd r0, r2, [r5] │ │ ldr r1, [r5, #8] │ │ movs r3, #0 │ │ str r3, [r5, #0] │ │ - cbz r0, 97a50 │ │ + cbz r0, 97a28 │ │ strd r0, r2, [sp, #4] │ │ add r0, sp, #4 │ │ str r1, [sp, #12] │ │ mov r1, r4 │ │ - bl 9792c │ │ + bl 97904 │ │ dmb ish │ │ ldrex r0, [r4] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r4] │ │ cmp r2, #0 │ │ - bne.n 97a2a │ │ + bne.n 97a02 │ │ cmp r0, #1 │ │ - bne.n 97a4c │ │ + bne.n 97a24 │ │ dmb ish │ │ mov r0, r4 │ │ add sp, #16 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ - b.w 93a8c │ │ + b.w 93af8 │ │ add sp, #16 │ │ pop {r4, r5, r7, pc} │ │ - ldr r0, [pc, #4] @ (97a58 ) │ │ + ldr r0, [pc, #4] @ (97a30 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - mov lr, r4 │ │ + bl 3fd40 │ │ + mov lr, fp │ │ movs r4, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #28 │ │ mov r9, r1 │ │ ldr.w sl, [r1] │ │ ldr.w r7, [r9, #12] │ │ mov.w r1, #256 @ 0x100 │ │ @@ -168438,1146 +168295,1146 @@ │ │ strh.w r1, [sp, #16] │ │ movs r1, #0 │ │ str r1, [sp, #8] │ │ ldrex r3, [r6] │ │ adds r1, r3, #1 │ │ strex r2, r1, [r6] │ │ cmp r2, #0 │ │ - bne.n 97a7a │ │ + bne.n 97a52 │ │ cmp r3, #0 │ │ - bmi.w 97e9a │ │ + bmi.w 97e72 │ │ ldr r4, [r7, #40] @ 0x28 │ │ str r0, [sp, #4] │ │ ldr r0, [r7, #32] │ │ cmp r4, r0 │ │ - beq.w 97db4 │ │ + beq.w 97d8c │ │ ldr r0, [r7, #36] @ 0x24 │ │ add.w r1, r4, r4, lsl #1 │ │ str.w r6, [r0, r1, lsl #2] │ │ add.w r0, r0, r1, lsl #2 │ │ add r1, sp, #8 │ │ strd sl, r1, [r0, #4] │ │ adds r1, r4, #1 │ │ ldrd r5, r0, [r7, #24] │ │ cmp r0, #0 │ │ str r1, [r7, #40] @ 0x28 │ │ mov.w r1, #0 │ │ str r1, [r7, #28] │ │ - beq.n 97b44 │ │ + beq.n 97b1c │ │ add.w r0, r0, r0, lsl #1 │ │ movs r4, #1 │ │ add.w fp, r5, r0, lsl #2 │ │ ldrd r0, r1, [r5] │ │ ldrex r2, [r0, #12] │ │ - cbnz r2, 97aea │ │ + cbnz r2, 97ac2 │ │ add.w r2, r0, #12 │ │ dmb ish │ │ strex r3, r1, [r2] │ │ - cbz r3, 97b18 │ │ + cbz r3, 97af0 │ │ ldrex r3, [r2] │ │ cmp r3, #0 │ │ - beq.n 97adc │ │ + beq.n 97ab4 │ │ clrex │ │ dmb ish │ │ adds r5, #12 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 97af8 │ │ + bne.n 97ad0 │ │ cmp r1, #1 │ │ itt eq │ │ dmbeq ish │ │ - bleq 93a8c │ │ + bleq 93af8 │ │ cmp r5, fp │ │ - bne.n 97aca │ │ - b.n 97b44 │ │ + bne.n 97aa2 │ │ + b.n 97b1c │ │ dmb ish │ │ ldr r1, [r0, #8] │ │ dmb ish │ │ adds r1, #24 │ │ ldrex r2, [r1] │ │ strex r3, r4, [r1] │ │ cmp r3, #0 │ │ - bne.n 97b24 │ │ + bne.n 97afc │ │ adds r2, #1 │ │ - bne.n 97af2 │ │ + bne.n 97aca │ │ mov r8, r0 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ + blx d87e0 │ │ mov r0, r8 │ │ - b.n 97af2 │ │ + b.n 97aca │ │ ldrb.w r0, [r9, #16] │ │ - cbnz r0, 97b56 │ │ - ldr r0, [pc, #860] @ (97ea8 ) │ │ + cbnz r0, 97b2e │ │ + ldr r0, [pc, #860] @ (97e80 ) │ │ add r0, pc │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 97de4 │ │ + bne.w 97dbc │ │ movs r0, #0 │ │ dmb ish │ │ ldrex r1, [r7] │ │ strex r2, r0, [r7] │ │ cmp r2, #0 │ │ - bne.n 97b5c │ │ + bne.n 97b34 │ │ cmp r1, #2 │ │ - beq.w 97dd6 │ │ + beq.w 97dae │ │ ldr.w r0, [r9, #4] │ │ ldrd r2, r3, [r0] │ │ ldr r0, [r0, #8] │ │ str r0, [sp, #0] │ │ mov r0, r6 │ │ - bl 98968 │ │ + bl 98940 │ │ tbh [pc, r0, lsl #1] │ │ lsls r7, r6, #4 │ │ movs r4, r0 │ │ lsls r3, r0, #2 │ │ lsls r6, r5, #1 │ │ ldr.w r5, [r9, #8] │ │ movs r0, #1 │ │ ldrex r1, [r5] │ │ cmp r1, #0 │ │ - bne.w 97dbe │ │ + bne.w 97d96 │ │ strex r1, r0, [r5] │ │ cmp r1, #0 │ │ - bne.n 97b92 │ │ + bne.n 97b6a │ │ dmb ish │ │ - ldr r4, [pc, #776] @ (97eb4 ) │ │ + ldr r4, [pc, #776] @ (97e8c ) │ │ add r4, pc │ │ ldr r0, [r4, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 97e08 │ │ + bne.w 97de0 │ │ mov.w r9, #0 │ │ ldrb r0, [r5, #4] │ │ cmp r0, #0 │ │ - bne.w 97e18 │ │ + bne.w 97df0 │ │ ldrd r0, r6, [r5, #36] @ 0x24 │ │ mov.w r7, #4294967295 @ 0xffffffff │ │ add.w r1, r6, r6, lsl #1 │ │ lsls r1, r1, #2 │ │ mov r2, r0 │ │ cmp r1, #0 │ │ - beq.w 97e8a │ │ + beq.w 97e62 │ │ ldr r3, [r2, #4] │ │ subs r1, #12 │ │ adds r7, #1 │ │ adds r2, #12 │ │ cmp r3, sl │ │ - bne.n 97bd0 │ │ + bne.n 97ba8 │ │ cmp r7, r6 │ │ - bcs.w 97e9c │ │ + bcs.w 97e74 │ │ mvns r1, r7 │ │ mov r8, r4 │ │ add r1, r6 │ │ add.w r2, r1, r1, lsl #1 │ │ add.w r1, r7, r7, lsl #1 │ │ add.w r0, r0, r1, lsl #2 │ │ lsls r2, r2, #2 │ │ mov r1, r0 │ │ ldr.w r4, [r1], #12 │ │ - bl d53ca │ │ + bl d509e │ │ subs r6, #1 │ │ cmp r4, #0 │ │ str r6, [r5, #40] @ 0x28 │ │ - beq.w 97e9c │ │ + beq.w 97e74 │ │ dmb ish │ │ ldrex r0, [r4] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r4] │ │ cmp r2, #0 │ │ - bne.n 97c14 │ │ + bne.n 97bec │ │ cmp r0, #1 │ │ - bne.n 97c30 │ │ + bne.n 97c08 │ │ mov r0, r4 │ │ dmb ish │ │ - bl 93a8c │ │ + bl 93af8 │ │ cmp.w r9, #0 │ │ - bne.n 97c40 │ │ + bne.n 97c18 │ │ ldr.w r0, [r8, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 97e6e │ │ + bne.w 97e46 │ │ movs r0, #0 │ │ dmb ish │ │ ldrex r1, [r5] │ │ strex r2, r0, [r5] │ │ cmp r2, #0 │ │ - bne.n 97c46 │ │ + bne.n 97c1e │ │ cmp r1, #2 │ │ - beq.w 97e52 │ │ + beq.w 97e2a │ │ ldr r1, [sp, #4] │ │ movs r0, #0 │ │ str r0, [r1, #0] │ │ - b.n 97d5e │ │ + b.n 97d36 │ │ ldrb.w r0, [sp, #16] │ │ dmb ish │ │ cmp r0, #0 │ │ - beq.w 97d82 │ │ + beq.w 97d5a │ │ ldrd r0, r1, [sp, #8] │ │ movs r2, #0 │ │ str r2, [sp, #8] │ │ cmp r0, #0 │ │ - beq.w 97e00 │ │ + beq.w 97dd8 │ │ ldr r2, [sp, #4] │ │ strd r0, r1, [r2] │ │ ldr r4, [sp, #8] │ │ cmp r4, #0 │ │ - bne.n 97d64 │ │ - b.n 97d7c │ │ + bne.n 97d3c │ │ + b.n 97d54 │ │ ldr.w r5, [r9, #8] │ │ movs r0, #1 │ │ ldrex r1, [r5] │ │ cmp r1, #0 │ │ - bne.w 97dca │ │ + bne.w 97da2 │ │ strex r1, r0, [r5] │ │ cmp r1, #0 │ │ - bne.n 97c90 │ │ + bne.n 97c68 │ │ dmb ish │ │ - ldr r4, [pc, #544] @ (97ec8 ) │ │ + ldr r4, [pc, #544] @ (97ea0 ) │ │ add r4, pc │ │ ldr r0, [r4, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 97e26 │ │ + bne.w 97dfe │ │ mov.w r9, #0 │ │ ldrb r0, [r5, #4] │ │ cmp r0, #0 │ │ - bne.w 97e36 │ │ + bne.w 97e0e │ │ ldrd r0, r6, [r5, #36] @ 0x24 │ │ mov.w r7, #4294967295 @ 0xffffffff │ │ add.w r1, r6, r6, lsl #1 │ │ lsls r1, r1, #2 │ │ mov r2, r0 │ │ cmp r1, #0 │ │ - beq.w 97e92 │ │ + beq.w 97e6a │ │ ldr r3, [r2, #4] │ │ subs r1, #12 │ │ adds r7, #1 │ │ adds r2, #12 │ │ cmp r3, sl │ │ - bne.n 97cce │ │ + bne.n 97ca6 │ │ cmp r7, r6 │ │ - bcs.w 97e9c │ │ + bcs.w 97e74 │ │ mvns r1, r7 │ │ mov r8, r4 │ │ add r1, r6 │ │ add.w r2, r1, r1, lsl #1 │ │ add.w r1, r7, r7, lsl #1 │ │ add.w r0, r0, r1, lsl #2 │ │ lsls r2, r2, #2 │ │ mov r1, r0 │ │ ldr.w r4, [r1], #12 │ │ - bl d53ca │ │ + bl d509e │ │ subs r6, #1 │ │ cmp r4, #0 │ │ str r6, [r5, #40] @ 0x28 │ │ - beq.w 97e9c │ │ + beq.w 97e74 │ │ dmb ish │ │ ldrex r0, [r4] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r4] │ │ cmp r2, #0 │ │ - bne.n 97d12 │ │ + bne.n 97cea │ │ cmp r0, #1 │ │ - bne.n 97d2e │ │ + bne.n 97d06 │ │ mov r0, r4 │ │ dmb ish │ │ - bl 93a8c │ │ + bl 93af8 │ │ cmp.w r9, #0 │ │ - bne.n 97d3e │ │ + bne.n 97d16 │ │ ldr.w r0, [r8, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 97e7c │ │ + bne.w 97e54 │ │ movs r0, #0 │ │ dmb ish │ │ ldrex r1, [r5] │ │ strex r2, r0, [r5] │ │ cmp r2, #0 │ │ - bne.n 97d44 │ │ + bne.n 97d1c │ │ cmp r1, #2 │ │ - beq.w 97e60 │ │ + beq.w 97e38 │ │ ldr r1, [sp, #4] │ │ movs r0, #0 │ │ str r0, [r1, #0] │ │ movs r0, #1 │ │ strb r0, [r1, #4] │ │ ldr r4, [sp, #8] │ │ - cbz r4, 97d7c │ │ + cbz r4, 97d54 │ │ ldr r5, [sp, #12] │ │ ldr r1, [r5, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r4 │ │ blxne r1 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r4 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r4, #1 │ │ movs r5, #0 │ │ movs r6, #0 │ │ - b.n 97da2 │ │ - blx d8810 │ │ + b.n 97d7a │ │ + blx d8820 │ │ ldrb.w r0, [sp, #16] │ │ add r5, r4 │ │ adds r4, #2 │ │ adds r6, #1 │ │ cmp r0, #0 │ │ dmb ish │ │ - bne.w 97c6e │ │ + bne.w 97c46 │ │ cmp r6, #7 │ │ - bcs.n 97d8a │ │ + bcs.n 97d62 │ │ cmp r6, #0 │ │ - beq.n 97d8e │ │ + beq.n 97d66 │ │ mov r0, r5 │ │ subs r0, #1 │ │ yield │ │ - bne.n 97dac │ │ - b.n 97d8e │ │ + bne.n 97d84 │ │ + b.n 97d66 │ │ add.w r0, r7, #32 │ │ - bl 98950 │ │ - b.n 97a9a │ │ + bl 98928 │ │ + b.n 97a72 │ │ mov r0, r5 │ │ clrex │ │ - bl 778fe │ │ - b.n 97ba8 │ │ + bl 77966 │ │ + b.n 97b80 │ │ mov r0, r5 │ │ clrex │ │ - bl 778fe │ │ - b.n 97ca6 │ │ + bl 77966 │ │ + b.n 97c7e │ │ movs r0, #240 @ 0xf0 │ │ mov r1, r7 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ - b.n 97b6e │ │ - bl 7770c │ │ + blx d87e0 │ │ + b.n 97b46 │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq r0, [r7, #4] │ │ - b.n 97b56 │ │ - ldr r0, [pc, #184] @ (97eac ) │ │ + b.n 97b2e │ │ + ldr r0, [pc, #184] @ (97e84 ) │ │ movs r1, #40 @ 0x28 │ │ - ldr r2, [pc, #184] @ (97eb0 ) │ │ + ldr r2, [pc, #184] @ (97e88 ) │ │ add r0, pc │ │ add r2, pc │ │ - bl 3fa4c │ │ - ldr r0, [pc, #216] @ (97edc ) │ │ + bl 3fd54 │ │ + ldr r0, [pc, #216] @ (97eb4 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - bl 7770c │ │ + bl 3fd40 │ │ + bl 77774 │ │ eor.w r9, r0, #1 │ │ ldrb r0, [r5, #4] │ │ cmp r0, #0 │ │ - beq.w 97bc0 │ │ - ldr r0, [pc, #156] @ (97eb8 ) │ │ - ldr r3, [pc, #160] @ (97ebc ) │ │ - ldr r1, [pc, #160] @ (97ec0 ) │ │ + beq.w 97b98 │ │ + ldr r0, [pc, #156] @ (97e90 ) │ │ + ldr r3, [pc, #160] @ (97e94 ) │ │ + ldr r1, [pc, #160] @ (97e98 ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ - b.n 97e42 │ │ - bl 7770c │ │ + b.n 97e1a │ │ + bl 77774 │ │ eor.w r9, r0, #1 │ │ ldrb r0, [r5, #4] │ │ cmp r0, #0 │ │ - beq.w 97cbe │ │ - ldr r0, [pc, #148] @ (97ecc ) │ │ - ldr r3, [pc, #148] @ (97ed0 ) │ │ - ldr r1, [pc, #152] @ (97ed4 ) │ │ + beq.w 97c96 │ │ + ldr r0, [pc, #148] @ (97ea4 ) │ │ + ldr r3, [pc, #148] @ (97ea8 ) │ │ + ldr r1, [pc, #152] @ (97eac ) │ │ add r0, pc │ │ add r3, pc │ │ add r1, pc │ │ add r2, sp, #20 │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ strb.w r9, [sp, #24] │ │ str r5, [sp, #20] │ │ - bl 414b0 │ │ + bl 417b8 │ │ movs r0, #240 @ 0xf0 │ │ mov r1, r5 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ - b.n 97c58 │ │ + blx d87e0 │ │ + b.n 97c30 │ │ movs r0, #240 @ 0xf0 │ │ mov r1, r5 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ - b.n 97d56 │ │ - bl 7770c │ │ + blx d87e0 │ │ + b.n 97d2e │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq r0, [r5, #4] │ │ - b.n 97c40 │ │ - bl 7770c │ │ + b.n 97c18 │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq r0, [r5, #4] │ │ - b.n 97d3e │ │ - ldr r0, [pc, #84] @ (97ee0 ) │ │ + b.n 97d16 │ │ + ldr r0, [pc, #84] @ (97eb8 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ - ldr r0, [pc, #68] @ (97ed8 ) │ │ + bl 3fd40 │ │ + ldr r0, [pc, #68] @ (97eb0 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ udf #254 @ 0xfe │ │ - ldr r2, [pc, #36] @ (97ec4 ) │ │ + ldr r2, [pc, #36] @ (97e9c ) │ │ mov r0, r7 │ │ mov r1, r6 │ │ add r2, pc │ │ - bl 3ebf8 │ │ - ldr r0, [r1, #68] @ 0x44 │ │ + bl 3ef00 │ │ + ldr r0, [r2, #72] @ 0x48 │ │ movs r4, r0 │ │ - asrs r5, r2, #25 │ │ - vrshr.u32 d20, d14, #8 │ │ + asrs r5, r7, #25 │ │ + vrshr.u32 q10, q3, #8 │ │ movs r4, r0 │ │ - ldr r2, [r5, #60] @ 0x3c │ │ + ldr r2, [r6, #64] @ 0x40 │ │ movs r4, r0 │ │ - asrs r5, r4, #25 │ │ - @ instruction: 0xfff84348 │ │ + asrs r5, r1, #26 │ │ + vsubw.u q10, q12, d0 │ │ movs r4, r0 │ │ - tst r6, r0 │ │ + tst r6, r7 │ │ movs r4, r0 │ │ - tst r6, r0 │ │ + tst r6, r7 │ │ movs r4, r0 │ │ - ldr r4, [r5, #44] @ 0x2c │ │ + ldr r4, [r6, #48] @ 0x30 │ │ movs r4, r0 │ │ - asrs r7, r0, #25 │ │ - vsubw.u q10, q4, d26 │ │ + asrs r7, r5, #25 │ │ + @ instruction: 0xfff84362 │ │ movs r4, r0 │ │ - tst r0, r1 │ │ + negs r0, r0 │ │ movs r4, r0 │ │ - rors r4, r0 │ │ + rors r4, r7 │ │ movs r4, r0 │ │ - negs r6, r4 │ │ + cmp r6, r3 │ │ movs r4, r0 │ │ - sbcs r4, r5 │ │ + rors r4, r4 │ │ movs r4, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ sub sp, #24 │ │ mov r6, r1 │ │ mov r8, r0 │ │ - bl 95d74 │ │ + bl 95de0 │ │ mov r4, r0 │ │ ldrb r0, [r6, #16] │ │ movs r1, #2 │ │ cmp r0, #2 │ │ strb r1, [r6, #16] │ │ - beq.n 97f4e │ │ + beq.n 97f26 │ │ ldmia.w r6, {r1, r2, r3, r5} │ │ ldrb r7, [r6, #19] │ │ stmia.w sp, {r1, r2, r3, r5} │ │ mov r1, sp │ │ mov r2, r4 │ │ ldrh.w r6, [r6, #17] │ │ strb.w r0, [sp, #16] │ │ mov r0, r8 │ │ strh.w r6, [sp, #17] │ │ strb.w r7, [sp, #19] │ │ - bl 97a5c │ │ + bl 97a34 │ │ dmb ish │ │ ldrex r0, [r4] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r4] │ │ cmp r2, #0 │ │ - bne.n 97f26 │ │ + bne.n 97efe │ │ cmp r0, #1 │ │ - bne.n 97f48 │ │ + bne.n 97f20 │ │ dmb ish │ │ mov r0, r4 │ │ add sp, #24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, lr} │ │ - b.w 93a8c │ │ + b.w 93af8 │ │ add sp, #24 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ - ldr r0, [pc, #8] @ (97f58 ) │ │ + ldr r0, [pc, #8] @ (97f30 ) │ │ add r0, pc │ │ - bl 3fa38 │ │ + bl 3fd40 │ │ nop │ │ - sbcs r0, r5 │ │ + rors r0, r4 │ │ movs r4, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #28 │ │ mov sl, r0 │ │ ldr r0, [r0, #16] │ │ lsls r0, r0, #1 │ │ - bne.n 98002 │ │ + bne.n 97fda │ │ ldrd r0, fp, [sl, #36] @ 0x24 │ │ dmb ish │ │ cmp r0, #0 │ │ - beq.n 98016 │ │ + beq.n 97fee │ │ cmp r0, #1 │ │ - bne.w 98112 │ │ + bne.w 980ea │ │ add.w r0, fp, #132 @ 0x84 │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 97f80 │ │ + bne.n 97f58 │ │ cmp r1, #1 │ │ dmb ish │ │ - bne.w 9875a │ │ + bne.w 98732 │ │ add.w r4, fp, #32 │ │ dmb ish │ │ ldrex r0, [r4] │ │ orr.w r1, r0, #1 │ │ strex r2, r1, [r4] │ │ cmp r2, #0 │ │ - bne.n 97fa0 │ │ + bne.n 97f78 │ │ lsls r0, r0, #31 │ │ dmb ish │ │ - bne.w 9827e │ │ + bne.w 98256 │ │ ldr r0, [r4, #0] │ │ mov.w r9, #0 │ │ movs r7, #0 │ │ dmb ish │ │ mvns r1, r0 │ │ tst.w r1, #62 @ 0x3e │ │ - bne.w 981ea │ │ + bne.w 981c2 │ │ movs r5, #1 │ │ movs r6, #0 │ │ - b.n 97ff0 │ │ - blx d8810 │ │ + b.n 97fc8 │ │ + blx d8820 │ │ ldr r0, [r4, #0] │ │ add r6, r5 │ │ adds r5, #2 │ │ adds r7, #1 │ │ dmb ish │ │ mvns r1, r0 │ │ tst.w r1, #62 @ 0x3e │ │ - bne.w 981ea │ │ + bne.w 981c2 │ │ cmp r7, #7 │ │ - bcs.n 97fd6 │ │ + bcs.n 97fae │ │ cmp r7, #0 │ │ - beq.n 97fda │ │ + beq.n 97fb2 │ │ mov r0, r6 │ │ subs r0, #1 │ │ yield │ │ - bne.n 97ffa │ │ - b.n 97fda │ │ + bne.n 97fd2 │ │ + b.n 97fb2 │ │ ldr.w r0, [sl, #20] │ │ - blx d87c0 │ │ + blx d87d0 │ │ ldrd r0, fp, [sl, #36] @ 0x24 │ │ dmb ish │ │ cmp r0, #0 │ │ - bne.n 97f76 │ │ + bne.n 97f4e │ │ add.w r0, fp, #164 @ 0xa4 │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 9801a │ │ + bne.n 97ff2 │ │ cmp r1, #1 │ │ dmb ish │ │ - bne.w 9875a │ │ + bne.w 98732 │ │ ldr.w r0, [fp, #72] @ 0x48 │ │ add.w r1, fp, #32 │ │ dmb ish │ │ ldrex r7, [r1] │ │ orr.w r2, r7, r0 │ │ strex r3, r2, [r1] │ │ cmp r3, #0 │ │ - bne.n 9803e │ │ + bne.n 98016 │ │ dmb ish │ │ ldr.w r0, [fp, #72] @ 0x48 │ │ tst r0, r7 │ │ - bne.w 98690 │ │ + bne.w 98668 │ │ add.w r8, fp, #76 @ 0x4c │ │ movs r0, #1 │ │ ldrex r1, [r8] │ │ cmp r1, #0 │ │ - bne.w 9879c │ │ + bne.w 98774 │ │ strex r1, r0, [r8] │ │ cmp r1, #0 │ │ - bne.n 98062 │ │ + bne.n 9803a │ │ dmb ish │ │ - ldr r0, [pc, #832] @ (983bc ) │ │ + ldr r0, [pc, #832] @ (98394 ) │ │ add r0, pc │ │ str r0, [sp, #8] │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 987f6 │ │ + bne.w 987ce │ │ movs r0, #0 │ │ str r0, [sp, #16] │ │ ldrb.w r0, [fp, #80] @ 0x50 │ │ cmp r0, #0 │ │ - bne.w 9880a │ │ + bne.w 987e2 │ │ ldr.w r0, [fp, #92] @ 0x5c │ │ str.w sl, [sp, #12] │ │ cmp r0, #0 │ │ - beq.w 985b0 │ │ + beq.w 98588 │ │ ldr.w r4, [fp, #88] @ 0x58 │ │ add.w r0, r0, r0, lsl #1 │ │ movs r5, #2 │ │ movs r6, #1 │ │ add.w r9, r4, r0, lsl #2 │ │ - b.n 980c2 │ │ + b.n 9809a │ │ clrex │ │ dmb ish │ │ cmp r4, r9 │ │ - beq.w 985b0 │ │ + beq.w 98588 │ │ mov r0, r4 │ │ ldr.w r1, [r4], #12 │ │ ldrex r2, [r1, #12] │ │ cmp r2, #0 │ │ - bne.n 980b4 │ │ + bne.n 9808c │ │ adds r1, #12 │ │ dmb ish │ │ strex r2, r5, [r1] │ │ - cbz r2, 980e6 │ │ + cbz r2, 980be │ │ ldrex r2, [r1] │ │ cmp r2, #0 │ │ - beq.n 980d6 │ │ - b.n 980b4 │ │ + beq.n 980ae │ │ + b.n 9808c │ │ dmb ish │ │ ldr r0, [r0, #0] │ │ ldr r0, [r0, #8] │ │ dmb ish │ │ add.w r1, r0, #24 │ │ ldrex r0, [r1] │ │ strex r2, r6, [r1] │ │ cmp r2, #0 │ │ - bne.n 980f6 │ │ + bne.n 980ce │ │ adds r0, #1 │ │ - bne.n 980bc │ │ + bne.n 98094 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ - b.n 980bc │ │ + blx d87e0 │ │ + b.n 98094 │ │ add.w r0, fp, #4 │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 98116 │ │ + bne.n 980ee │ │ cmp r1, #1 │ │ dmb ish │ │ - bne.w 9875a │ │ + bne.w 98732 │ │ add.w r6, fp, #8 │ │ movs r0, #1 │ │ ldrex r1, [r6] │ │ cmp r1, #0 │ │ - bne.w 98790 │ │ + bne.w 98768 │ │ strex r1, r0, [r6] │ │ cmp r1, #0 │ │ - bne.n 98134 │ │ + bne.n 9810c │ │ dmb ish │ │ - ldr r0, [pc, #628] @ (983c0 ) │ │ + ldr r0, [pc, #628] @ (98398 ) │ │ add r0, pc │ │ str r0, [sp, #16] │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 987aa │ │ + bne.w 98782 │ │ mov.w r8, #0 │ │ ldrb.w r0, [fp, #12] │ │ cmp r0, #0 │ │ - bne.w 987bc │ │ + bne.w 98794 │ │ ldrb.w r0, [fp, #64] @ 0x40 │ │ cmp r0, #0 │ │ - bne.w 9855c │ │ + bne.w 98534 │ │ ldrd r4, r0, [fp, #20] │ │ movs r5, #1 │ │ cmp r0, #0 │ │ strb.w r5, [fp, #64] @ 0x40 │ │ - beq.w 983c4 │ │ + beq.w 9839c │ │ add.w r0, r0, r0, lsl #1 │ │ movs r7, #2 │ │ add.w r9, r4, r0, lsl #2 │ │ - b.n 9819a │ │ + b.n 98172 │ │ clrex │ │ dmb ish │ │ cmp r4, r9 │ │ - beq.w 983c4 │ │ + beq.w 9839c │ │ mov r0, r4 │ │ ldr.w r1, [r4], #12 │ │ ldrex r2, [r1, #12] │ │ cmp r2, #0 │ │ - bne.n 9818c │ │ + bne.n 98164 │ │ adds r1, #12 │ │ dmb ish │ │ strex r2, r7, [r1] │ │ - cbz r2, 981be │ │ + cbz r2, 98196 │ │ ldrex r2, [r1] │ │ cmp r2, #0 │ │ - beq.n 981ae │ │ - b.n 9818c │ │ + beq.n 98186 │ │ + b.n 98164 │ │ dmb ish │ │ ldr r0, [r0, #0] │ │ ldr r0, [r0, #8] │ │ dmb ish │ │ add.w r1, r0, #24 │ │ ldrex r0, [r1] │ │ strex r2, r5, [r1] │ │ cmp r2, #0 │ │ - bne.n 981ce │ │ + bne.n 981a6 │ │ adds r0, #1 │ │ - bne.n 98194 │ │ + bne.n 9816c │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ - b.n 98194 │ │ + blx d87e0 │ │ + b.n 9816c │ │ ldr.w r8, [fp] │ │ add.w r5, fp, #4 │ │ dmb ish │ │ lsrs r0, r0, #1 │ │ dmb ish │ │ str r0, [sp, #16] │ │ ldrex r6, [r5] │ │ strex r0, r9, [r5] │ │ cmp r0, #0 │ │ - bne.n 981fe │ │ + bne.n 981d6 │ │ dmb ish │ │ mov.w r9, r8, lsr #1 │ │ ldr r0, [sp, #16] │ │ cmp r0, r9 │ │ - beq.n 98264 │ │ - cbnz r6, 98264 │ │ + beq.n 9823c │ │ + cbnz r6, 9823c │ │ mul.w r4, r7, r7 │ │ strd r8, sl, [sp, #8] │ │ lsls r0, r7, #1 │ │ add.w r8, r0, #1 │ │ mov.w sl, #0 │ │ cmp r7, #7 │ │ - bcs.n 9823c │ │ - cbz r7, 98240 │ │ + bcs.n 98214 │ │ + cbz r7, 98218 │ │ mov r0, r4 │ │ subs r0, #1 │ │ yield │ │ - bne.n 98234 │ │ - b.n 98240 │ │ - blx d8810 │ │ + bne.n 9820c │ │ + b.n 98218 │ │ + blx d8820 │ │ adds r7, #1 │ │ dmb ish │ │ ldrex r6, [r5] │ │ strex r0, sl, [r5] │ │ cmp r0, #0 │ │ - bne.n 98246 │ │ + bne.n 9821e │ │ add r4, r8 │ │ add.w r8, r8, #2 │ │ cmp r6, #0 │ │ dmb ish │ │ - beq.n 9822c │ │ + beq.n 98204 │ │ ldrd r8, sl, [sp, #8] │ │ ldr r0, [sp, #16] │ │ cmp r9, r0 │ │ - bne.n 98326 │ │ - cbz r6, 98272 │ │ + bne.n 982fe │ │ + cbz r6, 9824a │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ bic.w r0, r8, #1 │ │ dmb ish │ │ str.w r0, [fp] │ │ add.w r0, fp, #136 @ 0x88 │ │ movs r2, #1 │ │ dmb ish │ │ ldrexb r1, [r0] │ │ strexb r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 98288 │ │ + bne.n 98260 │ │ cmp r1, #0 │ │ dmb ish │ │ - beq.w 9875a │ │ + beq.w 98732 │ │ ldr.w r0, [fp] │ │ ldr.w r1, [fp, #32] │ │ ldr.w r6, [fp, #4] │ │ bic.w r4, r0, #1 │ │ bic.w r8, r1, #1 │ │ cmp r4, r8 │ │ - bne.n 982d8 │ │ + bne.n 982b0 │ │ cmp r6, #0 │ │ - beq.w 9864c │ │ + beq.w 98624 │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ movs r0, #72 @ 0x48 │ │ - b.n 9874e │ │ + b.n 98726 │ │ ldr r0, [r6, #0] │ │ mov r7, r6 │ │ mov r6, r0 │ │ mov r0, r7 │ │ - blx d87c0 │ │ + blx d87d0 │ │ adds r4, #2 │ │ cmp r8, r4 │ │ - beq.n 982b6 │ │ + beq.n 9828e │ │ ubfx r0, r4, #1, #5 │ │ cmp r0, #31 │ │ - beq.n 982c6 │ │ + beq.n 9829e │ │ add.w r0, r0, r0, lsl #1 │ │ add.w r0, r6, r0, lsl #2 │ │ ldrd r7, r5, [r0, #4] │ │ ldr r1, [r5, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r7 │ │ blxne r1 │ │ ldr r0, [r5, #4] │ │ cmp r0, #0 │ │ - bne.n 982cc │ │ - b.n 982d2 │ │ + bne.n 982a4 │ │ + b.n 982aa │ │ ldr r0, [r6, #0] │ │ dmb ish │ │ cmp r0, #0 │ │ - beq.n 9838e │ │ + beq.n 98366 │ │ ldr r0, [r6, #0] │ │ mov r7, r6 │ │ dmb ish │ │ mov r6, r0 │ │ mov r0, r7 │ │ - blx d87c0 │ │ + blx d87d0 │ │ add.w r8, r8, #2 │ │ ldr r0, [sp, #16] │ │ mov.w r9, r8, lsr #1 │ │ cmp r0, r9 │ │ - beq.n 9826a │ │ + beq.n 98242 │ │ and.w r0, r9, #31 │ │ cmp r0, #31 │ │ - beq.n 982fe │ │ + beq.n 982d6 │ │ add.w r0, r0, r0, lsl #1 │ │ mov r9, r8 │ │ add.w r0, r6, r0, lsl #2 │ │ add.w r8, r0, #4 │ │ ldr r1, [r0, #12] │ │ dmb ish │ │ lsls r0, r1, #31 │ │ - bne.n 98376 │ │ + bne.n 9834e │ │ movs r5, #1 │ │ movs r7, #0 │ │ movs r4, #0 │ │ - b.n 98364 │ │ - blx d8810 │ │ + b.n 9833c │ │ + blx d8820 │ │ ldr.w r0, [r8, #8] │ │ add r7, r5 │ │ adds r5, #2 │ │ adds r4, #1 │ │ dmb ish │ │ lsls r0, r0, #31 │ │ - bne.n 98376 │ │ + bne.n 9834e │ │ cmp r4, #7 │ │ - bcs.n 9834e │ │ + bcs.n 98326 │ │ cmp r4, #0 │ │ - beq.n 98352 │ │ + beq.n 9832a │ │ mov r0, r7 │ │ subs r0, #1 │ │ yield │ │ - bne.n 9836e │ │ - b.n 98352 │ │ + bne.n 98346 │ │ + b.n 9832a │ │ ldrd r7, r4, [r8] │ │ ldr r1, [r4, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r7 │ │ blxne r1 │ │ ldr r0, [r4, #4] │ │ mov r8, r9 │ │ cmp r0, #0 │ │ - bne.n 98312 │ │ - b.n 98318 │ │ + bne.n 982ea │ │ + b.n 982f0 │ │ movs r4, #1 │ │ movs r5, #0 │ │ movs r7, #0 │ │ - b.n 983aa │ │ - blx d8810 │ │ + b.n 98382 │ │ + blx d8820 │ │ ldr r0, [r6, #0] │ │ add r5, r4 │ │ adds r4, #2 │ │ adds r7, #1 │ │ cmp r0, #0 │ │ dmb ish │ │ - bne.n 98308 │ │ + bne.n 982e0 │ │ cmp r7, #7 │ │ - bcs.n 98396 │ │ + bcs.n 9836e │ │ cmp r7, #0 │ │ - beq.n 9839a │ │ + beq.n 98372 │ │ mov r0, r5 │ │ subs r0, #1 │ │ yield │ │ - bne.n 983b4 │ │ - b.n 9839a │ │ - str r2, [r3, #112] @ 0x70 │ │ + bne.n 9838c │ │ + b.n 98372 │ │ + str r2, [r4, #116] @ 0x74 │ │ movs r4, r0 │ │ - str r0, [r1, #100] @ 0x64 │ │ + str r0, [r2, #104] @ 0x68 │ │ movs r4, r0 │ │ ldrd r4, r0, [fp, #32] │ │ movs r1, #0 │ │ cmp r0, #0 │ │ str.w r1, [fp, #36] @ 0x24 │ │ - beq.n 98456 │ │ + beq.n 9842e │ │ add.w r0, r0, r0, lsl #1 │ │ movs r5, #1 │ │ add.w r7, r4, r0, lsl #2 │ │ ldrd r0, r1, [r4] │ │ ldrex r2, [r0, #12] │ │ - cbnz r2, 983fc │ │ + cbnz r2, 983d4 │ │ add.w r2, r0, #12 │ │ dmb ish │ │ strex r3, r1, [r2] │ │ - cbz r3, 9842a │ │ + cbz r3, 98402 │ │ ldrex r3, [r2] │ │ cmp r3, #0 │ │ - beq.n 983ee │ │ + beq.n 983c6 │ │ clrex │ │ dmb ish │ │ adds r4, #12 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 9840a │ │ + bne.n 983e2 │ │ cmp r1, #1 │ │ itt eq │ │ dmbeq ish │ │ - bleq 93a8c │ │ + bleq 93af8 │ │ cmp r4, r7 │ │ - bne.n 983dc │ │ - b.n 98456 │ │ + bne.n 983b4 │ │ + b.n 9842e │ │ dmb ish │ │ ldr r1, [r0, #8] │ │ dmb ish │ │ adds r1, #24 │ │ ldrex r2, [r1] │ │ strex r3, r5, [r1] │ │ cmp r3, #0 │ │ - bne.n 98436 │ │ + bne.n 9840e │ │ adds r2, #1 │ │ - bne.n 98404 │ │ + bne.n 983dc │ │ mov r9, r0 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ + blx d87e0 │ │ mov r0, r9 │ │ - b.n 98404 │ │ + b.n 983dc │ │ ldr.w r0, [fp, #48] @ 0x30 │ │ - cbz r0, 984ca │ │ + cbz r0, 984a2 │ │ ldr.w r4, [fp, #44] @ 0x2c │ │ add.w r0, r0, r0, lsl #1 │ │ movs r7, #2 │ │ movs r5, #1 │ │ add.w r9, r4, r0, lsl #2 │ │ - b.n 9847a │ │ + b.n 98452 │ │ clrex │ │ dmb ish │ │ cmp r4, r9 │ │ - beq.n 984ca │ │ + beq.n 984a2 │ │ mov r0, r4 │ │ ldr.w r1, [r4], #12 │ │ ldrex r2, [r1, #12] │ │ cmp r2, #0 │ │ - bne.n 9846e │ │ + bne.n 98446 │ │ adds r1, #12 │ │ dmb ish │ │ strex r2, r7, [r1] │ │ - cbz r2, 9849e │ │ + cbz r2, 98476 │ │ ldrex r2, [r1] │ │ cmp r2, #0 │ │ - beq.n 9848e │ │ - b.n 9846e │ │ + beq.n 98466 │ │ + b.n 98446 │ │ dmb ish │ │ ldr r0, [r0, #0] │ │ ldr r0, [r0, #8] │ │ dmb ish │ │ add.w r1, r0, #24 │ │ ldrex r0, [r1] │ │ strex r2, r5, [r1] │ │ cmp r2, #0 │ │ - bne.n 984ae │ │ + bne.n 98486 │ │ adds r0, #1 │ │ - bne.n 98476 │ │ + bne.n 9844e │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ - b.n 98476 │ │ + blx d87e0 │ │ + b.n 9844e │ │ ldrd r4, r0, [fp, #56] @ 0x38 │ │ movs r1, #0 │ │ cmp r0, #0 │ │ str.w r1, [fp, #60] @ 0x3c │ │ - beq.n 9855c │ │ + beq.n 98534 │ │ add.w r0, r0, r0, lsl #1 │ │ movs r5, #1 │ │ add.w r7, r4, r0, lsl #2 │ │ ldrd r0, r1, [r4] │ │ ldrex r2, [r0, #12] │ │ - cbnz r2, 98502 │ │ + cbnz r2, 984da │ │ add.w r2, r0, #12 │ │ dmb ish │ │ strex r3, r1, [r2] │ │ - cbz r3, 98530 │ │ + cbz r3, 98508 │ │ ldrex r3, [r2] │ │ cmp r3, #0 │ │ - beq.n 984f4 │ │ + beq.n 984cc │ │ clrex │ │ dmb ish │ │ adds r4, #12 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 98510 │ │ + bne.n 984e8 │ │ cmp r1, #1 │ │ itt eq │ │ dmbeq ish │ │ - bleq 93a8c │ │ + bleq 93af8 │ │ cmp r4, r7 │ │ - bne.n 984e2 │ │ - b.n 9855c │ │ + bne.n 984ba │ │ + b.n 98534 │ │ dmb ish │ │ ldr r1, [r0, #8] │ │ dmb ish │ │ adds r1, #24 │ │ ldrex r2, [r1] │ │ strex r3, r5, [r1] │ │ cmp r3, #0 │ │ - bne.n 9853c │ │ + bne.n 98514 │ │ adds r2, #1 │ │ - bne.n 9850a │ │ + bne.n 984e2 │ │ mov r9, r0 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ + blx d87e0 │ │ mov r0, r9 │ │ - b.n 9850a │ │ + b.n 984e2 │ │ cmp.w r8, #0 │ │ - bne.n 9856c │ │ + bne.n 98544 │ │ ldr r0, [sp, #16] │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 987e6 │ │ + bne.w 987be │ │ movs r0, #0 │ │ dmb ish │ │ ldrex r1, [r6] │ │ strex r2, r0, [r6] │ │ cmp r2, #0 │ │ - bne.n 98572 │ │ + bne.n 9854a │ │ cmp r1, #2 │ │ - beq.w 987d8 │ │ + beq.w 987b0 │ │ add.w r0, fp, #68 @ 0x44 │ │ movs r2, #1 │ │ dmb ish │ │ ldrexb r1, [r0] │ │ strexb r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 9858e │ │ + bne.n 98566 │ │ cmp r1, #0 │ │ dmb ish │ │ - beq.w 9875a │ │ + beq.w 98732 │ │ add.w r0, fp, #16 │ │ - bl 98860 │ │ + bl 98838 │ │ movs r0, #40 @ 0x28 │ │ - b.n 9874e │ │ + b.n 98726 │ │ ldrd r4, r0, [fp, #100] @ 0x64 │ │ movs r1, #0 │ │ cmp r0, #0 │ │ str.w r1, [fp, #104] @ 0x68 │ │ - beq.n 98642 │ │ + beq.n 9861a │ │ add.w r0, r0, r0, lsl #1 │ │ movs r5, #1 │ │ add.w sl, r4, r0, lsl #2 │ │ ldrd r0, r1, [r4] │ │ ldrex r2, [r0, #12] │ │ - cbnz r2, 985e8 │ │ + cbnz r2, 985c0 │ │ add.w r2, r0, #12 │ │ dmb ish │ │ strex r3, r1, [r2] │ │ - cbz r3, 98616 │ │ + cbz r3, 985ee │ │ ldrex r3, [r2] │ │ cmp r3, #0 │ │ - beq.n 985da │ │ + beq.n 985b2 │ │ clrex │ │ dmb ish │ │ adds r4, #12 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 985f6 │ │ + bne.n 985ce │ │ cmp r1, #1 │ │ itt eq │ │ dmbeq ish │ │ - bleq 93a8c │ │ + bleq 93af8 │ │ cmp r4, sl │ │ - bne.n 985c8 │ │ - b.n 98642 │ │ + bne.n 985a0 │ │ + b.n 9861a │ │ dmb ish │ │ ldr r1, [r0, #8] │ │ dmb ish │ │ adds r1, #24 │ │ ldrex r2, [r1] │ │ strex r3, r5, [r1] │ │ cmp r3, #0 │ │ - bne.n 98622 │ │ + bne.n 985fa │ │ adds r2, #1 │ │ - bne.n 985f0 │ │ + bne.n 985c8 │ │ mov r6, r0 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ + blx d87e0 │ │ mov r0, r6 │ │ - b.n 985f0 │ │ + b.n 985c8 │ │ ldr.w r0, [fp, #92] @ 0x5c │ │ - cbz r0, 98650 │ │ + cbz r0, 98628 │ │ movs r0, #0 │ │ - b.n 9865a │ │ + b.n 98632 │ │ movs r0, #72 @ 0x48 │ │ - b.n 9874e │ │ + b.n 98726 │ │ ldr.w r0, [fp, #104] @ 0x68 │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ ldr.w sl, [sp, #12] │ │ dmb ish │ │ strb.w r0, [fp, #108] @ 0x6c │ │ dmb ish │ │ ldr r0, [sp, #16] │ │ - cbnz r0, 98678 │ │ + cbnz r0, 98650 │ │ ldr r0, [sp, #8] │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.w 98838 │ │ + bne.w 98810 │ │ movs r0, #0 │ │ dmb ish │ │ ldrex r1, [r8] │ │ strex r2, r0, [r8] │ │ cmp r2, #0 │ │ - bne.n 9867e │ │ + bne.n 98656 │ │ cmp r1, #2 │ │ - beq.w 9882a │ │ + beq.w 98802 │ │ ldr.w r6, [fp] │ │ ldr.w r0, [fp, #72] @ 0x48 │ │ bic.w r8, r7, r0 │ │ movs r7, #0 │ │ - b.n 986aa │ │ - blx d8810 │ │ + b.n 98682 │ │ + blx d8820 │ │ adds r7, #1 │ │ ldr.w r0, [fp, #72] @ 0x48 │ │ subs r0, #1 │ │ ldr.w r3, [fp, #148] @ 0x94 │ │ and.w r2, r6, r0 │ │ ldr.w r1, [fp, #68] @ 0x44 │ │ add.w r0, r2, r2, lsl #1 │ │ add.w r0, r3, r0, lsl #2 │ │ adds r3, r6, #1 │ │ ldr r5, [r0, #8] │ │ dmb ish │ │ cmp r3, r5 │ │ - bne.n 98700 │ │ + bne.n 986d8 │ │ ldr.w r3, [fp, #64] @ 0x40 │ │ adds r2, #1 │ │ cmp r2, r3 │ │ itttt cs │ │ negcs r1, r1 │ │ andcs r1, r6 │ │ ldrcs.w r2, [fp, #68] @ 0x44 │ │ @@ -169585,311 +169442,311 @@ │ │ ldrd r6, r4, [r0] │ │ ldr r1, [r4, #0] │ │ cmp r1, #0 │ │ itt ne │ │ movne r0, r6 │ │ blxne r1 │ │ ldr r0, [r4, #4] │ │ - cbz r0, 986f8 │ │ + cbz r0, 986d0 │ │ mov r0, r6 │ │ - blx d87c0 │ │ + blx d87d0 │ │ mov r6, r5 │ │ ldr.w r0, [fp, #72] @ 0x48 │ │ - b.n 986aa │ │ + b.n 98682 │ │ cmp r8, r6 │ │ - beq.n 98718 │ │ + beq.n 986f0 │ │ cmp r7, #7 │ │ - bcs.n 986a0 │ │ + bcs.n 98678 │ │ cmp r7, #0 │ │ - beq.n 986a4 │ │ + beq.n 9867c │ │ mul.w r0, r7, r7 │ │ subs r0, #1 │ │ yield │ │ - bne.n 98710 │ │ - b.n 986a4 │ │ + bne.n 986e8 │ │ + b.n 9867c │ │ add.w r0, fp, #168 @ 0xa8 │ │ movs r2, #1 │ │ dmb ish │ │ ldrexb r1, [r0] │ │ strexb r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 98722 │ │ + bne.n 986fa │ │ dmb ish │ │ - cbz r1, 9875a │ │ + cbz r1, 98732 │ │ ldr.w r0, [fp, #152] @ 0x98 │ │ cmp r0, #0 │ │ itt ne │ │ ldrne.w r0, [fp, #148] @ 0x94 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ add.w r0, fp, #84 @ 0x54 │ │ - bl 98860 │ │ + bl 98838 │ │ movs r0, #120 @ 0x78 │ │ add r0, fp │ │ - bl 98860 │ │ + bl 98838 │ │ mov r0, fp │ │ - blx d87c0 │ │ + blx d87d0 │ │ adds.w r0, sl, #1 │ │ - beq.n 9878a │ │ + beq.n 98762 │ │ add.w r0, sl, #4 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ strex r3, r2, [r0] │ │ cmp r3, #0 │ │ - bne.n 98768 │ │ + bne.n 98740 │ │ cmp r1, #1 │ │ - bne.n 9878a │ │ + bne.n 98762 │ │ dmb ish │ │ mov r0, sl │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ add sp, #28 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r0, r6 │ │ clrex │ │ - bl 778fe │ │ - b.n 9814a │ │ + bl 77966 │ │ + b.n 98122 │ │ mov r0, r8 │ │ clrex │ │ - bl 778fe │ │ - b.w 98078 │ │ - bl 7770c │ │ + bl 77966 │ │ + b.w 98050 │ │ + bl 77774 │ │ eor.w r8, r0, #1 │ │ ldrb.w r0, [fp, #12] │ │ cmp r0, #0 │ │ - beq.w 98166 │ │ - ldr r0, [pc, #148] @ (98854 ) │ │ - ldr r3, [pc, #152] @ (98858 ) │ │ - ldr r1, [pc, #152] @ (9885c ) │ │ + beq.w 9813e │ │ + ldr r0, [pc, #148] @ (9882c ) │ │ + ldr r3, [pc, #152] @ (98830 ) │ │ + ldr r1, [pc, #152] @ (98834 ) │ │ add r0, pc │ │ add r3, pc │ │ strb.w r8, [sp, #24] │ │ add r1, pc │ │ str r6, [sp, #20] │ │ add r2, sp, #20 │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ movs r0, #240 @ 0xf0 │ │ mov r1, r6 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ - b.n 98584 │ │ - bl 7770c │ │ + blx d87e0 │ │ + b.n 9855c │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq.w r0, [fp, #12] │ │ - b.n 9856c │ │ - bl 7770c │ │ + b.n 98544 │ │ + bl 77774 │ │ eor.w r0, r0, #1 │ │ str r0, [sp, #16] │ │ ldrb.w r0, [fp, #80] @ 0x50 │ │ cmp r0, #0 │ │ - beq.w 98094 │ │ - ldr r0, [pc, #60] @ (98848 ) │ │ - ldr r3, [pc, #60] @ (9884c ) │ │ - ldr r1, [pc, #64] @ (98850 ) │ │ + beq.w 9806c │ │ + ldr r0, [pc, #60] @ (98820 ) │ │ + ldr r3, [pc, #60] @ (98824 ) │ │ + ldr r1, [pc, #64] @ (98828 ) │ │ add r0, pc │ │ ldr r2, [sp, #16] │ │ add r3, pc │ │ add r1, pc │ │ strb.w r2, [sp, #24] │ │ str.w r8, [sp, #20] │ │ add r2, sp, #20 │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ movs r0, #240 @ 0xf0 │ │ mov r1, r8 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ - blx d87d0 │ │ - b.n 98690 │ │ - bl 7770c │ │ + blx d87e0 │ │ + b.n 98668 │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq.w r0, [fp, #80] @ 0x50 │ │ - b.n 98678 │ │ - lsrs r3, r6, #17 │ │ - vqshrn.u64 d19, q10, #8 │ │ + b.n 98650 │ │ + lsrs r3, r3, #18 │ │ + vqrshrn.u64 d19, q14, #8 │ │ movs r4, r0 │ │ - subs r0, #162 @ 0xa2 │ │ + subs r0, #218 @ 0xda │ │ movs r4, r0 │ │ - lsrs r1, r0, #19 │ │ - vtbl.8 d19, {d24-d25}, d20 │ │ + lsrs r1, r5, #19 │ │ + @ instruction: 0xfff839dc │ │ movs r4, r0 │ │ - subs r0, #14 │ │ + subs r0, #70 @ 0x46 │ │ movs r4, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, lr} │ │ ldrd r5, r6, [r0, #4] │ │ mov r8, r0 │ │ - cbz r6, 988a4 │ │ + cbz r6, 9887c │ │ movs r7, #0 │ │ - b.n 98874 │ │ + b.n 9884c │ │ cmp r7, r6 │ │ - beq.n 988a4 │ │ + beq.n 9887c │ │ add.w r0, r7, r7, lsl #1 │ │ adds r7, #1 │ │ ldr.w r1, [r5, r0, lsl #2] │ │ add.w r0, r5, r0, lsl #2 │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r4, r3, [r1] │ │ cmp r4, #0 │ │ - bne.n 98886 │ │ + bne.n 9885e │ │ cmp r2, #1 │ │ - bne.n 98870 │ │ + bne.n 98848 │ │ dmb ish │ │ ldr r0, [r0, #0] │ │ - bl 93a8c │ │ - b.n 98870 │ │ + bl 93af8 │ │ + b.n 98848 │ │ ldr.w r0, [r8] │ │ cmp r0, #0 │ │ itt ne │ │ movne r0, r5 │ │ - blxne d87c0 │ │ + blxne d87d0 │ │ ldrd r5, r6, [r8, #16] │ │ - cbz r6, 988f0 │ │ + cbz r6, 988c8 │ │ movs r7, #0 │ │ - b.n 988c0 │ │ + b.n 98898 │ │ cmp r7, r6 │ │ - beq.n 988f0 │ │ + beq.n 988c8 │ │ add.w r0, r7, r7, lsl #1 │ │ adds r7, #1 │ │ ldr.w r1, [r5, r0, lsl #2] │ │ add.w r0, r5, r0, lsl #2 │ │ dmb ish │ │ ldrex r2, [r1] │ │ subs r3, r2, #1 │ │ strex r4, r3, [r1] │ │ cmp r4, #0 │ │ - bne.n 988d2 │ │ + bne.n 988aa │ │ cmp r2, #1 │ │ - bne.n 988bc │ │ + bne.n 98894 │ │ dmb ish │ │ ldr r0, [r0, #0] │ │ - bl 93a8c │ │ - b.n 988bc │ │ + bl 93af8 │ │ + b.n 98894 │ │ ldr.w r0, [r8, #12] │ │ - cbz r0, 98900 │ │ + cbz r0, 988d8 │ │ mov r0, r5 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, lr} │ │ - b.w d870c │ │ + b.w d871c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, pc} │ │ push {r4, lr} │ │ ldr r4, [r0, #0] │ │ ldrb r1, [r0, #4] │ │ - cbnz r1, 98916 │ │ - ldr r0, [pc, #60] @ (9894c ) │ │ + cbnz r1, 988ee │ │ + ldr r0, [pc, #60] @ (98924 ) │ │ add r0, pc │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.n 9893e │ │ + bne.n 98916 │ │ movs r0, #0 │ │ dmb ish │ │ ldrex r1, [r4] │ │ strex r2, r0, [r4] │ │ cmp r2, #0 │ │ - bne.n 9891c │ │ + bne.n 988f4 │ │ cmp r1, #2 │ │ it ne │ │ popne {r4, pc} │ │ movs r0, #240 @ 0xf0 │ │ mov r1, r4 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ ldmia.w sp!, {r4, lr} │ │ - b.w d8700 │ │ - bl 7770c │ │ + b.w d8710 │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq r0, [r4, #4] │ │ - b.n 98916 │ │ - ldrsh r6, [r0, r2] │ │ + b.n 988ee │ │ + ldrsh r6, [r1, r3] │ │ movs r4, r0 │ │ push {r7, lr} │ │ ldr r1, [r0, #0] │ │ - bl 98ade │ │ + bl 98ab6 │ │ movs r2, #1 │ │ movt r2, #32768 @ 0x8000 │ │ cmp r0, r2 │ │ it eq │ │ popeq {r7, pc} │ │ - bl 3dfa4 │ │ + bl 3e2ac │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #76 @ 0x4c │ │ ldr.w r9, [sp, #112] @ 0x70 │ │ add.w r8, r0, #12 │ │ mov fp, r0 │ │ movw r0, #51712 @ 0xca00 │ │ movt r0, #15258 @ 0x3b9a │ │ cmp r9, r0 │ │ - bne.n 98a08 │ │ + bne.n 989e0 │ │ add r6, sp, #48 @ 0x30 │ │ movs r4, #0 │ │ mov.w r7, #4294967295 @ 0xffffffff │ │ ldr.w r0, [r8] │ │ dmb ish │ │ cmp r0, #0 │ │ - bne.n 98a90 │ │ + bne.n 98a68 │ │ ldr.w r0, [fp, #8] │ │ add.w r5, r0, #24 │ │ ldrex r0, [r5] │ │ subs r1, r0, #1 │ │ strex r2, r1, [r5] │ │ cmp r2, #0 │ │ - bne.n 989a0 │ │ + bne.n 98978 │ │ cmp r0, #1 │ │ dmb ish │ │ - beq.n 9898c │ │ - b.n 989c0 │ │ + beq.n 98964 │ │ + b.n 98998 │ │ clrex │ │ dmb ish │ │ str r4, [sp, #48] @ 0x30 │ │ ldr r0, [r5, #0] │ │ adds r0, #1 │ │ - bne.n 989f2 │ │ + bne.n 989ca │ │ ldr r0, [sp, #48] @ 0x30 │ │ mov r1, r5 │ │ movs r2, #137 @ 0x89 │ │ mov.w r3, #4294967295 @ 0xffffffff │ │ cmp r0, #0 │ │ it ne │ │ addne r0, r6, #4 │ │ stmia.w sp, {r0, r4, r7} │ │ movs r0, #240 @ 0xf0 │ │ - blx d87d0 │ │ + blx d87e0 │ │ cmp.w r0, #4294967295 @ 0xffffffff │ │ - bgt.n 989f2 │ │ - blx d8850 │ │ + bgt.n 989ca │ │ + blx d8860 │ │ ldr r0, [r0, #0] │ │ cmp r0, #4 │ │ - beq.n 989c2 │ │ + beq.n 9899a │ │ ldrex r0, [r5] │ │ cmp r0, #1 │ │ - bne.n 989b8 │ │ + bne.n 98990 │ │ strex r0, r4, [r5] │ │ cmp r0, #0 │ │ - bne.n 989f2 │ │ + bne.n 989ca │ │ dmb ish │ │ - b.n 9898c │ │ + b.n 98964 │ │ mov r5, r3 │ │ mov r6, r2 │ │ add.w sl, sp, #48 @ 0x30 │ │ ldr.w r0, [r8] │ │ dmb ish │ │ - cbnz r0, 98a90 │ │ + cbnz r0, 98a68 │ │ mov r0, sl │ │ - bl 94744 │ │ + bl 947b0 │ │ ldrd r0, r2, [sp, #48] @ 0x30 │ │ eor.w r3, r2, r5 │ │ ldr r1, [sp, #56] @ 0x38 │ │ movs r7, #0 │ │ eor.w r4, r0, r6 │ │ orrs r3, r4 │ │ subs r4, r0, r6 │ │ @@ -169899,60 +169756,60 @@ │ │ movlt r4, #1 │ │ cmp r1, r9 │ │ it cc │ │ movcc r7, #1 │ │ cmp r3, #0 │ │ it ne │ │ movne r7, r4 │ │ - cbz r7, 98aa4 │ │ + cbz r7, 98a7c │ │ strd r0, r2, [sp, #32] │ │ add r2, sp, #32 │ │ str r1, [sp, #40] @ 0x28 │ │ add r1, sp, #16 │ │ mov r0, sl │ │ str.w r9, [sp, #24] │ │ strd r6, r5, [sp, #16] │ │ - bl 947f8 │ │ + bl 94864 │ │ ldr r0, [sp, #48] @ 0x30 │ │ ldrd r2, r3, [sp, #56] @ 0x38 │ │ ldr r1, [sp, #64] @ 0x40 │ │ lsls r0, r0, #31 │ │ ldr.w r0, [fp, #8] │ │ it ne │ │ movne r1, #0 │ │ str r1, [sp, #0] │ │ itt ne │ │ movne r2, #0 │ │ movne r3, #0 │ │ - bl 961a4 │ │ + bl 96210 │ │ ldr.w r0, [r8] │ │ dmb ish │ │ cmp r0, #0 │ │ - beq.n 98a1a │ │ + beq.n 989f2 │ │ subs r1, r0, #1 │ │ cmp r1, #2 │ │ - bcs.n 98a9c │ │ + bcs.n 98a74 │ │ add sp, #76 @ 0x4c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #3 │ │ add sp, #76 @ 0x4c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrex r0, [r8] │ │ - cbnz r0, 98abe │ │ + cbnz r0, 98a96 │ │ movs r1, #1 │ │ dmb ish │ │ strex r2, r1, [r8] │ │ - cbz r2, 98ac4 │ │ + cbz r2, 98a9c │ │ ldrex r0, [r8] │ │ cmp r0, #0 │ │ - beq.n 98ab0 │ │ + beq.n 98a88 │ │ movs r1, #0 │ │ clrex │ │ dmb ish │ │ - cbz r1, 98ad2 │ │ + cbz r1, 98aaa │ │ movs r0, #1 │ │ add sp, #76 @ 0x4c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ cmp r0, #3 │ │ it cs │ │ movcs r0, #3 │ │ add sp, #76 @ 0x4c │ │ @@ -169967,95 +169824,95 @@ │ │ it ls │ │ lslls r5, r3, #1 │ │ cmp r5, #4 │ │ it ls │ │ movls r5, #4 │ │ mov r1, r3 │ │ mov r3, r5 │ │ - bl 98b1e │ │ + bl 98af6 │ │ ldr r0, [sp, #4] │ │ - cbz r0, 98b0e │ │ + cbz r0, 98ae6 │ │ ldrd r0, r1, [sp, #8] │ │ add sp, #16 │ │ pop {r4, r5, r7, pc} │ │ ldr r0, [sp, #8] │ │ strd r5, r0, [r4] │ │ movs r0, #1 │ │ movt r0, #32768 @ 0x8000 │ │ add sp, #16 │ │ pop {r4, r5, r7, pc} │ │ push {r4, r5, r7, lr} │ │ mov r4, r0 │ │ movw r0, #43690 @ 0xaaaa │ │ movt r0, #2730 @ 0xaaa │ │ cmp r3, r0 │ │ - bls.n 98b3a │ │ + bls.n 98b12 │ │ movs r0, #1 │ │ movs r5, #0 │ │ movs r1, #4 │ │ str r5, [r4, r1] │ │ str r0, [r4, #0] │ │ pop {r4, r5, r7, pc} │ │ add.w r0, r3, r3, lsl #1 │ │ mov.w r5, r0, lsl #2 │ │ - cbz r1, 98b50 │ │ + cbz r1, 98b28 │ │ mov r0, r2 │ │ mov r1, r5 │ │ - blx d8870 │ │ - cbnz r0, 98b6a │ │ - b.n 98b5a │ │ - cbz r5, 98b68 │ │ + blx d8880 │ │ + cbnz r0, 98b42 │ │ + b.n 98b32 │ │ + cbz r5, 98b40 │ │ mov r0, r5 │ │ - blx d87f0 │ │ - cbnz r0, 98b6a │ │ + blx d8810 │ │ + cbnz r0, 98b42 │ │ movs r0, #4 │ │ str r0, [r4, #4] │ │ movs r0, #1 │ │ movs r1, #8 │ │ str r5, [r4, r1] │ │ str r0, [r4, #0] │ │ pop {r4, r5, r7, pc} │ │ movs r0, #4 │ │ str r0, [r4, #4] │ │ movs r0, #0 │ │ movs r1, #8 │ │ str r5, [r4, r1] │ │ str r0, [r4, #0] │ │ pop {r4, r5, r7, pc} │ │ - bmi.n 98b22 │ │ + bmi.n 98afa │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ sub sp, #12 │ │ movs r3, #1 │ │ ldrex r7, [r0] │ │ cmp r7, #0 │ │ - bne.n 98c26 │ │ + bne.n 98bfe │ │ strex r7, r3, [r0] │ │ cmp r7, #0 │ │ - bne.n 98b80 │ │ + bne.n 98b58 │ │ dmb ish │ │ - ldr r4, [pc, #268] @ (98ca4 ) │ │ + ldr r4, [pc, #268] @ (98c7c ) │ │ add r4, pc │ │ ldr r3, [r4, #4] │ │ lsls r3, r3, #1 │ │ - bne.n 98c54 │ │ + bne.n 98c2c │ │ movs r5, #0 │ │ ldrb r3, [r0, #4] │ │ cmp r3, #0 │ │ - bne.n 98c70 │ │ + bne.n 98c48 │ │ ldrex r3, [r2] │ │ adds r7, r3, #1 │ │ strex r6, r7, [r2] │ │ cmp r6, #0 │ │ - bne.n 98ba6 │ │ + bne.n 98b7e │ │ cmp r3, #0 │ │ - bmi.n 98ca2 │ │ + bmi.n 98c7a │ │ ldr r6, [r0, #16] │ │ ldr r3, [r0, #8] │ │ cmp r6, r3 │ │ - beq.n 98c3c │ │ + beq.n 98c14 │ │ ldr r3, [r0, #12] │ │ add.w r7, r6, r6, lsl #1 │ │ str.w r2, [r3, r7, lsl #2] │ │ adds r2, r6, #1 │ │ add.w r3, r3, r7, lsl #2 │ │ str r2, [r0, #16] │ │ mov.w r2, #0 │ │ @@ -170063,296 +169920,319 @@ │ │ ittt cs │ │ ldrcs r1, [r0, #28] │ │ clzcs r1, r1 │ │ lsrcs r2, r1, #5 │ │ dmb ish │ │ strb.w r2, [r0, #32] │ │ dmb ish │ │ - cbnz r5, 98bf8 │ │ + cbnz r5, 98bd0 │ │ ldr r1, [r4, #4] │ │ lsls r1, r1, #1 │ │ - bne.n 98c8e │ │ + bne.n 98c66 │ │ movs r1, #0 │ │ dmb ish │ │ ldrex r2, [r0] │ │ strex r3, r1, [r0] │ │ cmp r3, #0 │ │ - bne.n 98bfe │ │ + bne.n 98bd6 │ │ cmp r2, #2 │ │ itt ne │ │ addne sp, #12 │ │ ldmiane.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ mov r1, r0 │ │ movs r0, #240 @ 0xf0 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ add sp, #12 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ - b.w d8700 │ │ + b.w d8710 │ │ clrex │ │ mov r4, r0 │ │ mov r5, r1 │ │ mov r6, r2 │ │ - bl 778fe │ │ + bl 77966 │ │ mov r2, r6 │ │ mov r1, r5 │ │ mov r0, r4 │ │ - b.n 98b94 │ │ + b.n 98b6c │ │ add.w r3, r0, #8 │ │ mov r8, r0 │ │ mov r7, r1 │ │ mov r9, r2 │ │ mov r0, r3 │ │ - bl 98950 │ │ + bl 98928 │ │ mov r2, r9 │ │ mov r1, r7 │ │ mov r0, r8 │ │ - b.n 98bc0 │ │ + b.n 98b98 │ │ mov r5, r0 │ │ mov r7, r1 │ │ mov r6, r2 │ │ - bl 7770c │ │ + bl 77774 │ │ mov r3, r0 │ │ mov r0, r5 │ │ eor.w r5, r3, #1 │ │ mov r2, r6 │ │ mov r1, r7 │ │ ldrb r3, [r0, #4] │ │ cmp r3, #0 │ │ - beq.n 98ba6 │ │ - ldr r1, [pc, #52] @ (98ca8 ) │ │ - ldr r3, [pc, #56] @ (98cac ) │ │ - ldr r2, [pc, #56] @ (98cb0 ) │ │ + beq.n 98b7e │ │ + ldr r1, [pc, #52] @ (98c80 ) │ │ + ldr r3, [pc, #56] @ (98c84 ) │ │ + ldr r2, [pc, #56] @ (98c88 ) │ │ add r1, pc │ │ add r3, pc │ │ strb.w r5, [sp, #8] │ │ add r2, pc │ │ strd r2, r0, [sp] │ │ add r2, sp, #4 │ │ mov r0, r1 │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ + bl 417b8 │ │ mov r4, r0 │ │ - bl 7770c │ │ + bl 77774 │ │ mov r1, r0 │ │ mov r0, r4 │ │ cmp r1, #0 │ │ itt eq │ │ moveq r1, #1 │ │ strbeq r1, [r0, #4] │ │ - b.n 98bf8 │ │ + b.n 98bd0 │ │ udf #254 @ 0xfe │ │ - ldrh r6, [r7, r7] │ │ + ldrb r6, [r0, r1] │ │ movs r4, r0 │ │ - lsrs r5, r1, #32 │ │ - vsri.64 , q0, #8 │ │ + lsrs r5, r6, #32 │ │ + vsli.32 d19, d8, #24 │ │ movs r4, r0 │ │ - adds r4, #106 @ 0x6a │ │ + adds r4, #162 @ 0xa2 │ │ movs r4, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #20 │ │ mov r9, r0 │ │ mov r4, r1 │ │ movs r0, #1 │ │ ldrex r1, [r4] │ │ cmp r1, #0 │ │ - bne.n 98d96 │ │ + bne.n 98d6e │ │ strex r1, r0, [r4] │ │ cmp r1, #0 │ │ - bne.n 98cc0 │ │ + bne.n 98c98 │ │ dmb ish │ │ - ldr r0, [pc, #280] @ (98df0 ) │ │ + ldr r0, [pc, #280] @ (98dc8 ) │ │ add r0, pc │ │ str r0, [sp, #8] │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.n 98da6 │ │ + bne.n 98d7e │ │ mov.w r8, #0 │ │ ldrb r0, [r4, #4] │ │ cmp r0, #0 │ │ - bne.n 98db8 │ │ + bne.n 98d90 │ │ ldrd r0, r6, [r4, #12] │ │ mov.w r7, #4294967295 @ 0xffffffff │ │ add.w r1, r6, r6, lsl #1 │ │ lsls r1, r1, #2 │ │ mov r3, r0 │ │ - cbz r1, 98d3c │ │ + cbz r1, 98d14 │ │ ldr r5, [r3, #4] │ │ subs r1, #12 │ │ adds r7, #1 │ │ adds r3, #12 │ │ cmp r5, r2 │ │ - bne.n 98cfa │ │ + bne.n 98cd2 │ │ cmp r7, r6 │ │ - bcs.n 98de2 │ │ + bcs.n 98dba │ │ mvns r2, r7 │ │ add.w r1, r7, r7, lsl #1 │ │ add r2, r6 │ │ ldr.w r5, [r0, r1, lsl #2] │ │ add.w r0, r0, r1, lsl #2 │ │ add.w r2, r2, r2, lsl #1 │ │ add.w r1, r0, #12 │ │ ldrd sl, fp, [r0, #4] │ │ lsls r2, r2, #2 │ │ - bl d53ca │ │ + bl d509e │ │ subs r6, #1 │ │ cmp r5, #0 │ │ str r6, [r4, #16] │ │ - beq.n 98de2 │ │ - cbz r6, 98d42 │ │ + beq.n 98dba │ │ + cbz r6, 98d1a │ │ movs r0, #0 │ │ - b.n 98d4a │ │ + b.n 98d22 │ │ movs r5, #0 │ │ cmp r6, #0 │ │ - bne.n 98d38 │ │ + bne.n 98d10 │ │ ldr r0, [r4, #28] │ │ clz r0, r0 │ │ lsrs r0, r0, #5 │ │ dmb ish │ │ strb.w r0, [r4, #32] │ │ dmb ish │ │ cmp.w r8, #0 │ │ stmia.w r9, {r5, sl, fp} │ │ - bne.n 98d68 │ │ + bne.n 98d40 │ │ ldr r0, [sp, #8] │ │ ldr r0, [r0, #4] │ │ lsls r0, r0, #1 │ │ - bne.n 98dd4 │ │ + bne.n 98dac │ │ movs r0, #0 │ │ dmb ish │ │ ldrex r1, [r4] │ │ strex r2, r0, [r4] │ │ cmp r2, #0 │ │ - bne.n 98d6e │ │ + bne.n 98d46 │ │ cmp r1, #2 │ │ itt ne │ │ addne sp, #20 │ │ ldmiane.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movs r0, #240 @ 0xf0 │ │ mov r1, r4 │ │ movs r2, #129 @ 0x81 │ │ movs r3, #1 │ │ add sp, #20 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ - b.w d8700 │ │ + b.w d8710 │ │ mov r0, r4 │ │ clrex │ │ mov r5, r2 │ │ - bl 778fe │ │ + bl 77966 │ │ mov r2, r5 │ │ - b.n 98cd4 │ │ + b.n 98cac │ │ mov r5, r2 │ │ - bl 7770c │ │ + bl 77774 │ │ eor.w r8, r0, #1 │ │ mov r2, r5 │ │ ldrb r0, [r4, #4] │ │ cmp r0, #0 │ │ - beq.n 98cea │ │ - ldr r0, [pc, #56] @ (98df4 ) │ │ + beq.n 98cc2 │ │ + ldr r0, [pc, #56] @ (98dcc ) │ │ add r2, sp, #12 │ │ - ldr r3, [pc, #56] @ (98df8 ) │ │ - ldr r1, [pc, #60] @ (98dfc ) │ │ + ldr r3, [pc, #56] @ (98dd0 ) │ │ + ldr r1, [pc, #60] @ (98dd4 ) │ │ add r0, pc │ │ add r3, pc │ │ strb.w r8, [sp, #16] │ │ add r1, pc │ │ str r4, [sp, #12] │ │ str r1, [sp, #0] │ │ movs r1, #43 @ 0x2b │ │ - bl 414b0 │ │ - bl 7770c │ │ + bl 417b8 │ │ + bl 77774 │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #1 │ │ strbeq r0, [r4, #4] │ │ - b.n 98d68 │ │ - ldr r2, [pc, #28] @ (98e00 ) │ │ + b.n 98d40 │ │ + ldr r2, [pc, #28] @ (98dd8 ) │ │ mov r0, r7 │ │ mov r1, r6 │ │ add r2, pc │ │ - bl 3ebf8 │ │ + bl 3ef00 │ │ nop │ │ - ldrh r6, [r7, r2] │ │ + ldrh r6, [r0, r4] │ │ movs r4, r0 │ │ - lsls r3, r0, #27 │ │ - vsubw.u , q12, d6 │ │ + lsls r3, r5, #27 │ │ + @ instruction: 0xfff833ce │ │ movs r4, r0 │ │ - adds r3, #0 │ │ + adds r3, #56 @ 0x38 │ │ movs r4, r0 │ │ - adds r2, #192 @ 0xc0 │ │ + adds r2, #248 @ 0xf8 │ │ movs r4, r0 │ │ - stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} │ │ + push {r4, r5, r7, lr} │ │ + ldrd r4, r0, [r1] │ │ + movs r2, #11 │ │ + ldr r3, [r0, #12] │ │ + ldr r1, [pc, #32] @ (98e08 ) │ │ + mov r0, r4 │ │ + add r1, pc │ │ + mov r5, r3 │ │ + blx r3 │ │ + cbz r0, 98df6 │ │ + movs r0, #1 │ │ + pop {r4, r5, r7, pc} │ │ + ldr r1, [pc, #20] @ (98e0c ) │ │ + mov r0, r4 │ │ + movs r2, #7 │ │ + mov r3, r5 │ │ + add r1, pc │ │ + ldmia.w sp!, {r4, r5, r7, lr} │ │ + bx r3 │ │ + nop │ │ + lsls r4, r0, #27 │ │ + vcvt.f16.u16 d25, d21, #8 │ │ + vtbl.8 d30, {d7-d8}, d29 │ │ + mvns r0, r6 │ │ sub sp, #4 │ │ movw r3, #65408 @ 0xff80 │ │ movt r3, #1 │ │ cmp r1, r3 │ │ - bcs.n 98e2c │ │ - ldr r2, [pc, #248] @ (98f10 ) │ │ + bcs.n 98e38 │ │ + ldr r2, [pc, #248] @ (98f1c ) │ │ lsrs r7, r1, #7 │ │ add r2, pc │ │ add.w r6, r2, r7, lsl #1 │ │ ldrh.w ip, [r2, r7, lsl #1] │ │ ldrh r6, [r6, #2] │ │ adds r2, r6, #1 │ │ uxth r2, r2 │ │ - b.n 98e34 │ │ + b.n 98e40 │ │ movw r2, #1085 @ 0x43d │ │ movw ip, #1082 @ 0x43a │ │ cmp r2, ip │ │ - bcc.n 98ef4 │ │ + bcc.n 98f00 │ │ movw r7, #1086 @ 0x43e │ │ cmp r2, r7 │ │ - bcs.n 98ef4 │ │ + bcs.n 98f00 │ │ add.w r3, r3, #1966080 @ 0x1e0000 │ │ subs.w r9, r2, ip │ │ and.w lr, r1, r3 │ │ orr.w r8, r1, #127 @ 0x7f │ │ - beq.n 98ee6 │ │ - ldr r2, [pc, #192] @ (98f14 ) │ │ + beq.n 98ef2 │ │ + ldr r2, [pc, #192] @ (98f20 ) │ │ add.w r3, ip, ip, lsl #1 │ │ movs r4, #0 │ │ cmp.w r9, #1 │ │ add r2, pc │ │ add.w r2, r2, r3, lsl #2 │ │ - beq.n 98e8e │ │ + beq.n 98e9a │ │ mov r3, r9 │ │ add.w r7, r4, r3, lsr #1 │ │ sub.w r3, r3, r3, lsr #1 │ │ add.w r5, r7, r7, lsl #1 │ │ ldr.w r6, [r2, r5, lsl #2] │ │ add.w r5, r2, r5, lsl #2 │ │ ldr r5, [r5, #4] │ │ cmp r6, r1 │ │ it ls │ │ movls r4, r7 │ │ cmp r1, r5 │ │ it hi │ │ movhi r4, r7 │ │ cmp r3, #1 │ │ - bhi.n 98e68 │ │ + bhi.n 98e74 │ │ add.w r7, r4, r4, lsl #1 │ │ add.w r5, r2, r7, lsl #2 │ │ ldr r3, [r5, #4] │ │ cmp r1, r3 │ │ itt ls │ │ ldrls.w r7, [r2, r7, lsl #2] │ │ cmpls r7, r1 │ │ - bls.n 98ec2 │ │ + bls.n 98ece │ │ cmp r1, r3 │ │ it hi │ │ addhi r4, #1 │ │ - cbz r4, 98ed4 │ │ + cbz r4, 98ee0 │ │ subs r1, r4, #1 │ │ cmp r1, r9 │ │ - bcs.n 98f04 │ │ + bcs.n 98f10 │ │ add.w r1, r1, r1, lsl #1 │ │ add.w r1, r2, r1, lsl #2 │ │ ldr r1, [r1, #4] │ │ add.w lr, r1, #1 │ │ - b.n 98ed6 │ │ + b.n 98ee2 │ │ ldrb r1, [r5, #8] │ │ mov lr, r7 │ │ mov r8, r3 │ │ strb r1, [r0, #8] │ │ strd lr, r8, [r0] │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ @@ -170363,36 +170243,36 @@ │ │ ldrcc.w r1, [r2, r1, lsl #2] │ │ subcc.w r8, r1, #1 │ │ movs r1, #1 │ │ strb r1, [r0, #8] │ │ strd lr, r8, [r0] │ │ add sp, #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} │ │ - ldr r3, [pc, #36] @ (98f1c ) │ │ + ldr r3, [pc, #36] @ (98f28 ) │ │ mov r1, r2 │ │ mov r0, ip │ │ movw r2, #1085 @ 0x43d │ │ add r3, pc │ │ - bl 3f9a8 │ │ - ldr r2, [pc, #16] @ (98f18 ) │ │ + bl 3fcb0 │ │ + ldr r2, [pc, #16] @ (98f24 ) │ │ mov r0, r1 │ │ mov r1, r9 │ │ add r2, pc │ │ - bl 3fa74 │ │ - lsls r0, r4, #26 │ │ - vcvt.f32.u32 q8, q7, #8 │ │ - vrshr.u32 , q15, #8 │ │ + bl 3fd7c │ │ + lsls r4, r2, #26 │ │ + vcvt.f32.u32 q8, q1, #8 │ │ + vpaddl.u32 d19, d2 │ │ movs r4, r0 │ │ - adds r2, #122 @ 0x7a │ │ + adds r2, #126 @ 0x7e │ │ movs r4, r0 │ │ stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, #76 @ 0x4c │ │ - ldr r3, [pc, #480] @ (99108 ) │ │ + ldr r3, [pc, #480] @ (99114 ) │ │ mov ip, r0 │ │ - ldr r0, [pc, #480] @ (9910c ) │ │ + ldr r0, [pc, #480] @ (99118 ) │ │ add.w lr, sp, #8 │ │ add r3, pc │ │ mov r8, r1 │ │ mov r4, lr │ │ add r0, pc │ │ ldmia r3!, {r1, r2, r5, r6, r7} │ │ mov r9, r0 │ │ @@ -170401,15 +170281,15 @@ │ │ stmia r4!, {r1, r2, r5, r6, r7} │ │ ldmia.w r3, {r0, r1, r2, r5, r6, r7} │ │ mov r3, r9 │ │ stmia r4!, {r0, r1, r2, r5, r6, r7} │ │ mov r0, lr │ │ mov r1, ip │ │ mov r2, r8 │ │ - bl 99e2a │ │ + bl 99e36 │ │ movw r2, #33254 @ 0x81e6 │ │ ldr r1, [sp, #56] @ 0x38 │ │ movt r2, #9786 @ 0x263a │ │ ldr r3, [sp, #64] @ 0x40 │ │ eors r2, r1 │ │ movw r1, #37307 @ 0x91bb │ │ movt r1, #195 @ 0xc3 │ │ @@ -170533,26 +170413,26 @@ │ │ umull r3, r7, r1, r2 │ │ mla r1, r1, r6, r7 │ │ mla r1, r0, r2, r1 │ │ eor.w r0, r1, r3 │ │ add sp, #76 @ 0x4c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ nop │ │ - ldr r1, [pc, #48] @ (9913c ) │ │ - vtbx.8 d20, {d8}, d6 │ │ + ldr r1, [pc, #0] @ (99118 ) │ │ + vqshrun.s64 d20, q13, #8 │ │ vtbl.8 d30, {d8-d9}, d29 │ │ - ldr r7, [pc, #960] @ (994d4 ) │ │ + ldr r7, [pc, #960] @ (994e0 ) │ │ sub sp, #268 @ 0x10c │ │ movw fp, #31153 @ 0x79b1 │ │ add.w ip, sp, #8 │ │ mov r8, r0 │ │ mov r9, r1 │ │ movt fp, #40503 @ 0x9e37 │ │ orrs.w r0, r2, r3 │ │ - beq.w 9950c │ │ + beq.w 99518 │ │ movw r1, #380 @ 0x17c │ │ movw r0, #8695 @ 0x21f7 │ │ movt r1, #11393 @ 0x2c81 │ │ movt r0, #7341 @ 0x1cad │ │ subs r1, r1, r2 │ │ movw r7, #54494 @ 0xd4de │ │ add.w sl, ip, #11 │ │ @@ -170727,15 +170607,15 @@ │ │ movw r4, #65208 @ 0xfeb8 │ │ str r1, [sp, #68] @ 0x44 │ │ movw r1, #17399 @ 0x43f7 │ │ movt r1, #36388 @ 0x8e24 │ │ movt r4, #14700 @ 0x396c │ │ adcs r1, r3 │ │ adds r4, r4, r2 │ │ - ldr r2, [pc, #900] @ (996e8 ) │ │ + ldr r2, [pc, #900] @ (996f4 ) │ │ str r0, [sp, #44] @ 0x2c │ │ movw r0, #42019 @ 0xa423 │ │ movt r0, #48715 @ 0xbe4b │ │ add r2, pc │ │ adcs r0, r3 │ │ str r0, [sp, #12] │ │ str r4, [sp, #8] │ │ @@ -170752,15 +170632,15 @@ │ │ mov ip, r2 │ │ stmia r1!, {r3, r4, r5, r6, r7} │ │ ldmia.w ip, {r2, r3, r4, r5, r6, r7} │ │ stmia r1!, {r2, r3, r4, r5, r6, r7} │ │ add r3, sp, #8 │ │ mov r1, r8 │ │ mov r2, r9 │ │ - bl 99e2a │ │ + bl 99e36 │ │ ldr.w r0, [sl] │ │ mov.w ip, #0 │ │ ldrd r7, r6, [sp, #200] @ 0xc8 │ │ ldr.w r2, [sl, #8] │ │ ldrd r5, r4, [sp, #208] @ 0xd0 │ │ eors r7, r0 │ │ ldr.w r3, [sl, #12] │ │ @@ -170864,31 +170744,31 @@ │ │ eor.w r1, r1, r0, lsr #5 │ │ umull r2, r3, r1, r7 │ │ mla r1, r1, r6, r3 │ │ mla r1, r0, r7, r1 │ │ eor.w r0, r1, r2 │ │ add sp, #268 @ 0x10c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r3, [pc, #464] @ (996e0 ) │ │ + ldr r3, [pc, #464] @ (996ec ) │ │ mov r7, ip │ │ - ldr r0, [pc, #464] @ (996e4 ) │ │ + ldr r0, [pc, #464] @ (996f0 ) │ │ add r3, pc │ │ add r0, pc │ │ ldmia r3!, {r1, r2, r4, r5, r6} │ │ mov lr, r0 │ │ stmia r7!, {r1, r2, r4, r5, r6} │ │ ldmia r3!, {r1, r2, r4, r5, r6} │ │ stmia r7!, {r1, r2, r4, r5, r6} │ │ ldmia.w r3, {r0, r1, r2, r4, r5, r6} │ │ mov r3, lr │ │ stmia r7!, {r0, r1, r2, r4, r5, r6} │ │ mov r0, ip │ │ mov r1, r8 │ │ mov r2, r9 │ │ - bl 99e2a │ │ + bl 99e36 │ │ movw r2, #33254 @ 0x81e6 │ │ ldr r0, [sp, #56] @ 0x38 │ │ movt r2, #9786 @ 0x263a │ │ ldr r3, [sp, #64] @ 0x40 │ │ eors r2, r0 │ │ movw r0, #37307 @ 0x91bb │ │ movt r0, #195 @ 0xc3 │ │ @@ -171011,19 +170891,19 @@ │ │ umull r2, r3, r0, r7 │ │ mla r0, r0, r6, r3 │ │ mla r1, r1, r7, r0 │ │ eor.w r0, r1, r2 │ │ add sp, #268 @ 0x10c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ nop │ │ - orrs r2, r5 │ │ - vpaddl.s32 q10, q12 │ │ - vsri.64 q10, q0, #8 │ │ + orrs r6, r3 │ │ + vrshr.u32 q10, q6, #8 │ │ + vclz.i32 q10, q2 │ │ vtbl.8 d30, {d8-d9}, d29 │ │ - ldr r7, [pc, #960] @ (99ab0 ) │ │ + ldr r7, [pc, #960] @ (99abc ) │ │ sub sp, #12 │ │ ldr.w sl, [sp, #48] @ 0x30 │ │ ldr r7, [r0, #12] │ │ ldr r6, [r0, #0] │ │ ldr.w r4, [sl, #8] │ │ ldr.w r5, [sl, #12] │ │ subs.w r9, r4, r2 │ │ @@ -171264,15 +171144,15 @@ │ │ eor.w r7, r7, r6, lsr #5 │ │ cmp r1, #143 @ 0x8f │ │ umull ip, r5, r7, r4 │ │ mla r7, r7, r8, r5 │ │ mla r7, r6, r4, r7 │ │ eor.w r6, r7, ip │ │ str r6, [sp, #8] │ │ - bls.n 99ac0 │ │ + bls.n 99acc │ │ ldr.w r4, [fp, #8] │ │ mov.w r9, r1, lsr #4 │ │ ldr.w r5, [fp] │ │ ldr.w r6, [fp, #12] │ │ subs r4, r4, r2 │ │ ldr.w lr, [r0, #136] @ 0x88 │ │ ldr.w r8, [r0, #128] @ 0x80 │ │ @@ -171302,21 +171182,21 @@ │ │ ldr r5, [sp, #8] │ │ eor.w r7, r7, r8 │ │ eors r6, r4 │ │ adds r5, r5, r7 │ │ str r5, [sp, #8] │ │ adcs r1, r6 │ │ cmp.w r9, #9 │ │ - bne.n 99ac8 │ │ + bne.n 99ad4 │ │ mov ip, lr │ │ str r1, [sp, #0] │ │ - b.n 99d94 │ │ + b.n 99da0 │ │ mov.w ip, #0 │ │ str r7, [sp, #0] │ │ - b.n 99da6 │ │ + b.n 99db2 │ │ ldr.w r5, [fp, #24] │ │ ldr.w r4, [fp, #28] │ │ subs.w r9, r5, r2 │ │ ldr.w r8, [fp, #16] │ │ ldr.w r5, [r0, #156] @ 0x9c │ │ sbcs r4, r3 │ │ ldr.w r6, [r0, #144] @ 0x90 │ │ @@ -171342,15 +171222,15 @@ │ │ eor.w r6, r6, r8 │ │ eors r7, r4 │ │ adds r5, r5, r6 │ │ str r5, [sp, #8] │ │ adcs r1, r7 │ │ ldr r7, [sp, #0] │ │ cmp r7, #10 │ │ - beq.w 99d8e │ │ + beq.w 99d9a │ │ ldr.w r5, [fp, #40] @ 0x28 │ │ ldr.w r4, [fp, #44] @ 0x2c │ │ subs.w sl, r5, r2 │ │ ldr.w r8, [fp, #32] │ │ ldr.w r5, [r0, #172] @ 0xac │ │ sbcs r4, r3 │ │ ldr.w r7, [r0, #168] @ 0xa8 │ │ @@ -171376,15 +171256,15 @@ │ │ eor.w r6, r6, r8 │ │ eors r7, r4 │ │ adds r5, r5, r6 │ │ str r5, [sp, #8] │ │ adcs r1, r7 │ │ ldr r7, [sp, #0] │ │ cmp r7, #11 │ │ - beq.w 99d8e │ │ + beq.w 99d9a │ │ ldr.w r5, [fp, #56] @ 0x38 │ │ ldr.w r4, [fp, #60] @ 0x3c │ │ subs.w r9, r5, r2 │ │ ldr.w r8, [fp, #48] @ 0x30 │ │ ldr.w r5, [r0, #188] @ 0xbc │ │ sbcs r4, r3 │ │ ldr.w r6, [r0, #176] @ 0xb0 │ │ @@ -171410,15 +171290,15 @@ │ │ eor.w r6, r6, r8 │ │ eors r7, r4 │ │ adds r5, r5, r6 │ │ str r5, [sp, #8] │ │ adcs r1, r7 │ │ ldr r7, [sp, #0] │ │ cmp r7, #12 │ │ - beq.w 99d8e │ │ + beq.w 99d9a │ │ ldr.w r5, [fp, #72] @ 0x48 │ │ ldr.w r4, [fp, #76] @ 0x4c │ │ subs.w sl, r5, r2 │ │ ldr.w r8, [fp, #64] @ 0x40 │ │ ldr.w r5, [r0, #204] @ 0xcc │ │ sbcs r4, r3 │ │ ldr.w r7, [r0, #200] @ 0xc8 │ │ @@ -171444,15 +171324,15 @@ │ │ eor.w r6, r6, r8 │ │ eors r7, r4 │ │ adds r5, r5, r6 │ │ str r5, [sp, #8] │ │ adcs r1, r7 │ │ ldr r7, [sp, #0] │ │ cmp r7, #13 │ │ - beq.n 99d8e │ │ + beq.n 99d9a │ │ ldr.w r5, [fp, #88] @ 0x58 │ │ ldr.w r4, [fp, #92] @ 0x5c │ │ subs.w r9, r5, r2 │ │ ldr.w r8, [fp, #80] @ 0x50 │ │ ldr.w r5, [r0, #220] @ 0xdc │ │ sbcs r4, r3 │ │ ldr.w r6, [r0, #208] @ 0xd0 │ │ @@ -171477,17 +171357,17 @@ │ │ umlal r6, r4, sl, r5 │ │ eor.w r6, r6, r8 │ │ eors r7, r4 │ │ adds.w ip, ip, r6 │ │ adcs r1, r7 │ │ ldr r7, [sp, #0] │ │ cmp r7, #14 │ │ - bne.n 99d1a │ │ + bne.n 99d26 │ │ str.w ip, [sp, #8] │ │ - b.n 99d8e │ │ + b.n 99d9a │ │ ldr.w r5, [fp, #104] @ 0x68 │ │ ldr.w r4, [fp, #108] @ 0x6c │ │ subs.w sl, r5, r2 │ │ ldr.w r7, [fp, #100] @ 0x64 │ │ ldr.w r8, [fp, #96] @ 0x60 │ │ sbcs r4, r3 │ │ ldr.w r5, [r0, #236] @ 0xec │ │ @@ -171567,15 +171447,15 @@ │ │ mov r4, r1 │ │ add.w r1, r3, #121 @ 0x79 │ │ cmp.w r2, #1024 @ 0x400 │ │ str r1, [sp, #8] │ │ str r2, [sp, #4] │ │ strd r4, r0, [sp, #12] │ │ str r3, [sp, #216] @ 0xd8 │ │ - bls.w 9a17e │ │ + bls.w 9a18a │ │ ldr r2, [r0, #20] │ │ lsrs r1, r7, #10 │ │ str r2, [sp, #204] @ 0xcc │ │ add.w lr, r0, #28 │ │ ldr r2, [r0, #24] │ │ str r1, [sp, #84] @ 0x54 │ │ ldr r1, [r0, #0] │ │ @@ -171771,15 +171651,15 @@ │ │ ldr r0, [sp, #104] @ 0x68 │ │ adds r2, r2, r0 │ │ ldr r0, [sp, #120] @ 0x78 │ │ str r2, [sp, #208] @ 0xd0 │ │ ldr r2, [sp, #172] @ 0xac │ │ adcs r4, r0 │ │ cmp r3, #128 @ 0x80 │ │ - bne.w 99f00 │ │ + bne.w 99f0c │ │ ldr r0, [sp, #52] @ 0x34 │ │ movw fp, #31153 @ 0x79b1 │ │ movt fp, #40503 @ 0x9e37 │ │ mov r7, r2 │ │ eor.w r0, r0, r5, lsr #15 │ │ eor.w r0, r0, r8 │ │ umull r1, r0, r0, fp │ │ @@ -171852,15 +171732,15 @@ │ │ mla r4, r1, fp, r0 │ │ ldr r1, [sp, #92] @ 0x5c │ │ mov fp, r3 │ │ ldr r3, [sp, #168] @ 0xa8 │ │ add.w r1, r1, #1024 @ 0x400 │ │ ldr r0, [sp, #84] @ 0x54 │ │ cmp r7, r0 │ │ - bne.w 99ee6 │ │ + bne.w 99ef2 │ │ ldr r0, [sp, #16] │ │ ldr r1, [sp, #176] @ 0xb0 │ │ ldr r7, [sp, #0] │ │ str.w ip, [r0, #40] @ 0x28 │ │ add.w ip, r0, #44 @ 0x2c │ │ stmia.w ip, {r1, r3, r8} │ │ ldr r1, [sp, #184] @ 0xb8 │ │ @@ -171871,15 +171751,15 @@ │ │ ldr r4, [sp, #12] │ │ ldr r1, [sp, #204] @ 0xcc │ │ str r1, [r0, #20] │ │ ldr r1, [sp, #212] @ 0xd4 │ │ strd r1, r6, [r0, #24] │ │ ubfx r2, r7, #6, #4 │ │ cmp r2, #0 │ │ - beq.w 9a336 │ │ + beq.w 9a342 │ │ ldr r3, [r0, #0] │ │ movw r1, #1023 @ 0x3ff │ │ str r3, [sp, #200] @ 0xc8 │ │ bic.w r1, r7, r1 │ │ ldr r3, [r0, #4] │ │ add r1, r4 │ │ str r3, [sp, #196] @ 0xc4 │ │ @@ -172036,16 +171916,16 @@ │ │ adds r1, #8 │ │ adds.w r2, r2, r9 │ │ str r2, [sp, #200] @ 0xc8 │ │ adcs r3, r0 │ │ ldr r0, [sp, #100] @ 0x64 │ │ str r3, [sp, #196] @ 0xc4 │ │ cmp r0, r1 │ │ - bne.w 9a1d4 │ │ - b.n 9a36e │ │ + bne.w 9a1e0 │ │ + b.n 9a37a │ │ ldr r1, [r0, #0] │ │ str r1, [sp, #200] @ 0xc8 │ │ ldr r1, [r0, #4] │ │ str r1, [sp, #196] @ 0xc4 │ │ ldr r1, [r0, #16] │ │ str r1, [sp, #176] @ 0xb0 │ │ ldr r1, [r0, #20] │ │ @@ -172191,25 +172071,25 @@ │ │ movt r8, #35 @ 0x23 │ │ movt r9, #28609 @ 0x6fc1 │ │ add.w r0, r0, r3, lsr #31 │ │ str r0, [sp, #60] @ 0x3c │ │ ubfx r0, r3, #20, #11 │ │ bfc r3, #20, #12 │ │ cmp r0, #0 │ │ - beq.w 9a86a │ │ + beq.w 9a876 │ │ movw r1, #1075 @ 0x433 │ │ subs r7, r0, r1 │ │ mov.w r8, #0 │ │ sbc.w r0, r8, #0 │ │ orrs.w r9, lr, r3 │ │ add.w r3, r3, #1048576 @ 0x100000 │ │ str r0, [sp, #56] @ 0x38 │ │ - beq.n 9a606 │ │ - ldr r1, [pc, #940] @ (9a8e4 ) │ │ - ldr r2, [pc, #944] @ (9a8e8 ) │ │ + beq.n 9a612 │ │ + ldr r1, [pc, #940] @ (9a8f0 ) │ │ + ldr r2, [pc, #944] @ (9a8f4 ) │ │ add r1, pc │ │ add r1, r7 │ │ add r2, pc │ │ ldrb.w r0, [r1, #1075] @ 0x433 │ │ movw r1, #53509 @ 0xd105 │ │ movt r1, #4 │ │ str r0, [sp, #36] @ 0x24 │ │ @@ -172263,36 +172143,36 @@ │ │ adcs.w r5, r6, r0 │ │ adcs.w r2, fp, #0 │ │ adc.w r0, r7, #0 │ │ ldrd r7, r3, [sp, #48] @ 0x30 │ │ str r0, [sp, #44] @ 0x2c │ │ eor.w r0, r5, #2147483648 @ 0x80000000 │ │ orrs r0, r1 │ │ - bne.w 9a8ec │ │ + bne.w 9a8f8 │ │ cmp.w r9, #0 │ │ it ne │ │ movne.w r9, #1 │ │ ldr r0, [sp, #56] @ 0x38 │ │ mov r2, lr │ │ strd r0, r9, [sp, #4] │ │ add r0, sp, #64 @ 0x40 │ │ str r7, [sp, #0] │ │ - bl 9aa3c │ │ + bl 9aa48 │ │ ldrd r5, r6, [sp, #64] @ 0x40 │ │ ldr r4, [sp, #72] @ 0x48 │ │ movw r9, #0 │ │ movt r9, #28609 @ 0x6fc1 │ │ movw fp, #57600 @ 0xe100 │ │ mov r0, r5 │ │ movt fp, #1525 @ 0x5f5 │ │ mov r1, r6 │ │ mov r2, fp │ │ movs r3, #0 │ │ mov.w r8, #0 │ │ - bl d53d0 │ │ + bl d53dc │ │ movw r2, #15241 @ 0x3b89 │ │ movw r3, #47291 @ 0xb8bb │ │ movt r2, #21990 @ 0x55e6 │ │ movt r3, #1677 @ 0x68d │ │ umull r2, lr, r0, r2 │ │ movw ip, #5243 @ 0x147b │ │ str r1, [sp, #56] @ 0x38 │ │ @@ -172348,15 +172228,15 @@ │ │ addlt r0, #1 │ │ str.w lr, [r0] │ │ str.w fp, [r0, #4] │ │ it lt │ │ movlt r2, #16 │ │ add.w r9, r2, r4 │ │ orrs.w r2, r3, r7 │ │ - beq.n 9a7a2 │ │ + beq.n 9a7ae │ │ movw r5, #47291 @ 0xb8bb │ │ movs r4, #103 @ 0x67 │ │ movt r5, #1677 @ 0x68d │ │ umull r2, r6, r3, r5 │ │ mla r2, r7, r5, r6 │ │ movw r6, #55536 @ 0xd8f0 │ │ movt r6, #65535 @ 0xffff │ │ @@ -172396,32 +172276,32 @@ │ │ it ne │ │ clzne r3, r2 │ │ rsb r2, r3, #70 @ 0x46 │ │ add.w r0, r0, r2, lsr #3 │ │ subs r5, r0, r1 │ │ add.w r0, r9, #5 │ │ cmp r0, #20 │ │ - bhi.n 9a7fa │ │ + bhi.n 9a806 │ │ subs r0, r5, #1 │ │ cmp r0, r9 │ │ - ble.n 9a8bc │ │ + ble.n 9a8c8 │ │ cmp.w r9, #4294967295 @ 0xffffffff │ │ - ble.w 9aa12 │ │ + ble.w 9aa1e │ │ ldr r4, [sp, #60] @ 0x3c │ │ add.w r6, r9, #1 │ │ mov r2, r6 │ │ mov r0, r4 │ │ - bl d520a │ │ + bl d531a │ │ movs r0, #46 @ 0x2e │ │ strb r0, [r4, r6] │ │ adds r0, r4, r5 │ │ adds r0, #1 │ │ add sp, #84 @ 0x54 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldr r0, [pc, #572] @ (9aa38 ) │ │ + ldr r0, [pc, #572] @ (9aa44 ) │ │ movw r7, #5243 @ 0x147b │ │ ldr r1, [sp, #60] @ 0x3c │ │ cmp.w r9, #0 │ │ mov.w r2, #46 @ 0x2e │ │ add r0, pc │ │ ldrb r3, [r1, #1] │ │ mov r1, r9 │ │ @@ -172454,55 +172334,55 @@ │ │ movw r1, #11621 @ 0x2d65 │ │ it gt │ │ movwgt r1, #11109 @ 0x2b65 │ │ strh r1, [r2, #0] │ │ add sp, #84 @ 0x54 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ orrs.w r0, lr, r3 │ │ - beq.w 9a9fe │ │ + beq.w 9aa0a │ │ movs r0, #1 │ │ movw r7, #64462 @ 0xfbce │ │ str r0, [sp, #8] │ │ add r0, sp, #64 @ 0x40 │ │ mov r2, lr │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ movt r7, #65535 @ 0xffff │ │ strd r7, r1, [sp] │ │ - bl 9aa3c │ │ + bl 9aa48 │ │ ldrd r5, r6, [sp, #64] @ 0x40 │ │ ldr r4, [sp, #72] @ 0x48 │ │ subs.w r0, r5, r9 │ │ sbcs.w r0, r6, r8 │ │ - bge.w 9a62e │ │ + bge.w 9a63a │ │ movs r0, #10 │ │ umull r5, r1, r5, r0 │ │ add.w r2, r6, r6, lsl #2 │ │ subs r4, #1 │ │ add.w r6, r1, r2, lsl #1 │ │ subs.w r1, r5, r9 │ │ sbcs.w r1, r6, r8 │ │ - blt.n 9a8a2 │ │ - b.n 9a62e │ │ + blt.n 9a8ae │ │ + b.n 9a63a │ │ ldr r7, [sp, #60] @ 0x3c │ │ mov r2, r5 │ │ mov r0, r7 │ │ - bl d520a │ │ + bl d531a │ │ add.w r6, r9, #3 │ │ adds r0, r7, r5 │ │ subs r1, r6, r5 │ │ movs r2, #48 @ 0x30 │ │ - bl d50b2 │ │ + bl d5294 │ │ add.w r0, r7, r9 │ │ movs r1, #46 @ 0x2e │ │ strb r1, [r0, #1] │ │ adds r0, r7, r6 │ │ add sp, #84 @ 0x54 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - adds r3, #68 @ 0x44 │ │ - vtbx.8 d19, {d8-d11}, d0 │ │ + adds r3, #56 @ 0x38 │ │ + @ instruction: 0xfff83b34 │ │ vpadal.s32 , │ │ asrs r2, r3, #2 │ │ str r1, [sp, #40] @ 0x28 │ │ movt r0, #39321 @ 0x9999 │ │ ldr.w r8, [sp, #44] @ 0x2c │ │ umull r1, r7, r2, r0 │ │ movw r3, #39321 @ 0x9999 │ │ @@ -172553,18 +172433,18 @@ │ │ adc.w sl, sl, r1 │ │ adds r6, r2, #1 │ │ str r2, [sp, #32] │ │ adc.w r2, sl, #1610612736 @ 0x60000000 │ │ cmp r7, #0 │ │ ldr r7, [sp, #48] @ 0x30 │ │ str.w sl, [sp, #36] @ 0x24 │ │ - beq.w 9a606 │ │ + beq.w 9a612 │ │ subs r6, #2 │ │ sbcs.w r2, r2, #0 │ │ - bcc.w 9a606 │ │ + bcc.w 9a612 │ │ ldr r2, [sp, #16] │ │ movs r7, #0 │ │ ldr r6, [sp, #20] │ │ mov.w lr, #2147483648 @ 0x80000000 │ │ sub.w r3, r2, fp │ │ ldr r2, [sp, #28] │ │ mla r3, r2, r6, r3 │ │ @@ -172586,50 +172466,50 @@ │ │ add.w r0, lr, #536870912 @ 0x20000000 │ │ negs r1, r1 │ │ ldr r1, [sp, #36] @ 0x24 │ │ sbcs r0, r1 │ │ itt cc │ │ movcc r6, fp │ │ movcc r5, r9 │ │ - b.n 9a626 │ │ + b.n 9a632 │ │ ldr r1, [sp, #60] @ 0x3c │ │ movs r0, #48 @ 0x30 │ │ strb r0, [r1, #2] │ │ movw r0, #11824 @ 0x2e30 │ │ strh r0, [r1, #0] │ │ adds r0, r1, #3 │ │ add sp, #84 @ 0x54 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r4, [sp, #60] @ 0x3c │ │ rsb r6, r9, #1 │ │ mov r2, r5 │ │ adds r7, r4, r6 │ │ mov r0, r7 │ │ - bl d520a │ │ + bl d531a │ │ mov r0, r4 │ │ mov r1, r6 │ │ movs r2, #48 @ 0x30 │ │ - bl d50b2 │ │ + bl d5294 │ │ movs r0, #46 @ 0x2e │ │ strb r0, [r4, #1] │ │ adds r0, r7, r5 │ │ add sp, #84 @ 0x54 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldrsh r2, [r6, r4] │ │ + ldrsh r6, [r4, r4] │ │ vtbl.8 d30, {d8-d9}, d29 │ │ - ldr r7, [pc, #960] @ (9ae00 ) │ │ + ldr r7, [pc, #960] @ (9ae0c ) │ │ sub sp, #76 @ 0x4c │ │ ldr.w r9, [sp, #112] @ 0x70 │ │ lsls r3, r3, #2 │ │ strd r0, r2, [sp, #56] @ 0x38 │ │ movw r0, #53509 @ 0xd105 │ │ movt r0, #4 │ │ ldr r7, [sp, #120] @ 0x78 │ │ mul.w r1, r9, r0 │ │ - ldr r0, [pc, #832] @ (9ad9c ) │ │ + ldr r0, [pc, #832] @ (9ada8 ) │ │ cmp r7, #0 │ │ it eq │ │ subeq.w r1, r1, #131072 @ 0x20000 │ │ mov.w r5, r1, asr #20 │ │ movw r1, #44437 @ 0xad95 │ │ movt r1, #60 @ 0x3c │ │ mov.w r7, #584 @ 0x248 │ │ @@ -172798,15 +172678,15 @@ │ │ movcc r1, #1 │ │ ldr r2, [sp, #48] @ 0x30 │ │ orrs r1, r3 │ │ adds.w r9, r1, r2 │ │ adc.w r8, r7, #0 │ │ subs.w r1, sl, r9 │ │ sbcs.w r0, r0, r8 │ │ - bcs.n 9ad62 │ │ + bcs.n 9ad6e │ │ ldr r6, [sp, #20] │ │ ldr r0, [sp, #8] │ │ ldr r5, [sp, #16] │ │ lsl.w r0, r6, r0 │ │ cmp r5, #0 │ │ it pl │ │ movpl r0, #0 │ │ @@ -172846,15 +172726,15 @@ │ │ adc.w r1, ip, #0 │ │ adds r4, r0, r3 │ │ adc.w r2, r1, r6, lsr #2 │ │ subs.w r7, r5, r4, lsl #1 │ │ mov.w r2, r2, lsl #1 │ │ orr.w r2, r2, r4, lsr #31 │ │ sbcs.w r7, r6, r2 │ │ - bmi.n 9ad70 │ │ + bmi.n 9ad7c │ │ rsbs r7, lr, #1 │ │ mov.w fp, r4, lsl #1 │ │ mov.w r4, #0 │ │ sbcs.w r7, r4, sl │ │ mov.w r7, #0 │ │ eor.w r2, r2, r6 │ │ it cc │ │ @@ -172862,20 +172742,20 @@ │ │ orrs r7, r5 │ │ eor.w r7, r7, fp │ │ orrs r2, r7 │ │ ittt eq │ │ andeq.w r2, r5, #4 │ │ moveq r7, #1 │ │ eoreq.w r4, r7, r2, lsr #2 │ │ - b.n 9ad72 │ │ + b.n 9ad7e │ │ ldr r1, [sp, #60] @ 0x3c │ │ movs r0, #10 │ │ umull r0, r1, r1, r0 │ │ add.w r1, r1, r5, lsl #1 │ │ - b.n 9ad8c │ │ + b.n 9ad98 │ │ movs r4, #1 │ │ bic.w r2, r5, #3 │ │ movs r7, #0 │ │ subs.w r2, r2, r9 │ │ sbcs.w r2, r6, r8 │ │ it cs │ │ movcs r7, #1 │ │ @@ -172885,220 +172765,220 @@ │ │ movne r0, r3 │ │ ldr r2, [sp, #56] @ 0x38 │ │ strd r0, r1, [r2] │ │ ldr r0, [sp, #52] @ 0x34 │ │ str r0, [r2, #8] │ │ add sp, #76 @ 0x4c │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - adds r5, #252 @ 0xfc │ │ + adds r5, #240 @ 0xf0 │ │ vrev64.32 q8, q2 │ │ - b.n 9a8e4 │ │ + b.n 9a8f0 │ │ movs r0, r0 │ │ - b.n 9aec8 │ │ + b.n 9aed4 │ │ lsls r0, r2, #1 │ │ - b.n 9a8ce │ │ + b.n 9a8da │ │ asrs r1, r0, #32 │ │ - b.n 9b232 │ │ + b.n 9b23e │ │ movs r1, r0 │ │ - b.n 9afd6 │ │ + b.n 9afe2 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ lsrs r1, r0, #16 │ │ - b.n 9b45e │ │ + b.n 9b46a │ │ lsrs r1, r0, #16 │ │ str r3, [sp, #640] @ 0x280 │ │ lsrs r1, r0, #32 │ │ - b.n 9b466 │ │ + b.n 9b472 │ │ lsrs r1, r0, #32 │ │ movs r3, #160 @ 0xa0 │ │ vrhadd.u16 d14, d14, d31 │ │ - ldr r0, [pc, #0] @ (9add0 ) │ │ + ldr r0, [pc, #0] @ (9addc ) │ │ stmdb sp!, {r0, r2, r3, ip, sp, pc} │ │ - b.n 9b116 │ │ + b.n 9b122 │ │ movs r4, r2 │ │ - b.n 9a918 │ │ + b.n 9a924 │ │ movs r0, #8 │ │ - b.n 9b51e │ │ + b.n 9b52a │ │ asrs r0, r2, #32 │ │ - b.n 9a920 │ │ + b.n 9a92c │ │ movs r0, r0 │ │ - b.n 9af04 │ │ + b.n 9af10 │ │ asrs r1, r0, #32 │ │ - b.n 9af08 │ │ + b.n 9af14 │ │ movs r2, r0 │ │ - add.w sl, r0, r4, asr #14 │ │ + add.w sl, r0, r8, ror #14 │ │ movs r4, r0 │ │ - asrs r0, r0 │ │ - vrsra.u32 d16, d6, #9 │ │ + cmp r3, r0 │ │ + vrshr.u32 q8, , #9 │ │ vtbl.8 d20, {d7}, d0 │ │ stmdb sp!, {r0, r2, r3, ip, sp, pc} │ │ - b.n 9b142 │ │ - beq.n 9ae14 │ │ - b.n 9b2a0 │ │ - b.n 9ae08 │ │ - b.n 9b14a │ │ + b.n 9b14e │ │ + beq.n 9ae20 │ │ + b.n 9b2ac │ │ + b.n 9ae14 │ │ + b.n 9b156 │ │ lsls r4, r0, #1 │ │ - b.n 9a94c │ │ + b.n 9a958 │ │ stmia r0!, {r0} │ │ - b.n 9b152 │ │ + b.n 9b15e │ │ movs r0, r0 │ │ - b.n 9af34 │ │ + b.n 9af40 │ │ lsls r0, r4, #1 │ │ - b.n 9a93a │ │ + b.n 9a946 │ │ movs r0, r0 │ │ - b.n 9b4be │ │ + b.n 9b4ca │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ movs r4, r6 │ │ - b.n 9a964 │ │ + b.n 9a970 │ │ asrs r2, r0, #32 │ │ - b.n 9b16a │ │ + b.n 9b176 │ │ movs r0, #12 │ │ - b.n 9b16e │ │ + b.n 9b17a │ │ adds r0, #14 │ │ - b.n 9b172 │ │ + b.n 9b17e │ │ movs r0, r0 │ │ - b.n 9af54 │ │ - blx fffb0438 │ │ + b.n 9af60 │ │ + blx fffb1444 │ │ adds r0, #24 │ │ - b.n 9a97c │ │ + b.n 9a988 │ │ movs r0, r0 │ │ - b.n 9b582 │ │ + b.n 9b58e │ │ asrs r4, r1, #32 │ │ - b.n 9b186 │ │ - b.n 9ae48 │ │ - b.n 9a964 │ │ + b.n 9b192 │ │ + b.n 9ae54 │ │ + b.n 9a970 │ │ adds r0, #3 │ │ - b.n 9af6c │ │ + b.n 9af78 │ │ lsls r5, r6, #3 │ │ - @ instruction: 0xeb00f6fa │ │ - add.w sl, r0, r8, ror #12 │ │ + @ instruction: 0xeb00f6fb │ │ + add.w sl, r0, ip, lsl #13 │ │ movs r4, r0 │ │ - subs r0, r5, #5 │ │ - vcvt.f16.u16 d29, d7, #9 │ │ + subs r7, r3, #7 │ │ + @ instruction: 0xfff7db56 │ │ vqshrun.s64 d20, q8, #10 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n 9b384 │ │ + b.n 9b390 │ │ movs r0, r0 │ │ - b.n 9b50e │ │ + b.n 9b51a │ │ str r1, [r0, r0] │ │ - b.n 9b1b2 │ │ + b.n 9b1be │ │ @ instruction: 0xffcadbff │ │ adds r1, r0, r0 │ │ - b.n 9b63a │ │ + b.n 9b646 │ │ movs r0, #1 │ │ - b.n 9af7e │ │ + b.n 9af8a │ │ subs r4, #255 @ 0xff │ │ - b.n 9b642 │ │ + b.n 9b64e │ │ asrs r0, r0, #32 │ │ - b.n 9b646 │ │ + b.n 9b652 │ │ movs r3, r0 │ │ - b.n 9b12e │ │ + b.n 9b13a │ │ movs r0, r5 │ │ subs r2, #0 │ │ movs r5, #85 @ 0x55 │ │ - b.n 9b49c │ │ + b.n 9b4a8 │ │ adds r3, #51 @ 0x33 │ │ - b.n 9b49c │ │ + b.n 9b4a8 │ │ movs r5, #85 @ 0x55 │ │ - b.n 9b524 │ │ + b.n 9b530 │ │ adds r3, #51 @ 0x33 │ │ - b.n 9b524 │ │ + b.n 9b530 │ │ movs r0, #160 @ 0xa0 │ │ - b.n 9aea6 │ │ + b.n 9aeb2 │ │ movs r0, #2 │ │ - b.n 9af26 │ │ + b.n 9af32 │ │ ands r3, r0 │ │ - b.n 9aeae │ │ + b.n 9aeba │ │ movs r1, #34 @ 0x22 │ │ - b.n 9aeb4 │ │ + b.n 9aec0 │ │ subs r7, #15 │ │ - b.n 9b4b2 │ │ + b.n 9b4be │ │ movs r0, #2 │ │ - b.n 9afbe │ │ + b.n 9afca │ │ subs r7, #15 │ │ - b.n 9b53a │ │ + b.n 9b546 │ │ movs r2, #34 @ 0x22 │ │ - b.n 9afc2 │ │ + b.n 9afce │ │ movs r0, #3 │ │ - b.n 9aec6 │ │ + b.n 9aed2 │ │ adds r1, #1 │ │ - b.n 9b4c6 │ │ + b.n 9b4d2 │ │ adds r1, #1 │ │ - b.n 9b54a │ │ + b.n 9b556 │ │ lsls r2, r2, #14 │ │ - b.n 9aed2 │ │ + b.n 9aede │ │ cmp r4, #34 @ 0x22 │ │ - b.n 9b212 │ │ + b.n 9b21e │ │ movs r1, r0 │ │ - b.n 9b57a │ │ + b.n 9b586 │ │ movs r5, r2 │ │ ldrh r0, [r0, #16] │ │ asrs r0, r1, #32 │ │ - b.n 9b61e │ │ + b.n 9b62a │ │ movs r0, r4 │ │ - b.n 9b50c │ │ + b.n 9b518 │ │ movs r2, r2 │ │ subs r0, r0, r0 │ │ lsls r4, r2, #1 │ │ - b.n 9b514 │ │ + b.n 9b520 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ movs r6, r3 │ │ - b.n 9b372 │ │ + b.n 9b37e │ │ asrs r1, r0, #32 │ │ - b.n 9b6b6 │ │ + b.n 9b6c2 │ │ lsls r0, r4, #2 │ │ - b.n 9aefc │ │ + b.n 9af08 │ │ asrs r2, r1, #32 │ │ - b.n 9b37e │ │ + b.n 9b38a │ │ movs r3, r1 │ │ and.w pc, r0, r0, rrx │ │ - b.n 9ad04 │ │ + b.n 9ad10 │ │ cmp r1, #127 @ 0x7f │ │ - b.n 9b64a │ │ + b.n 9b656 │ │ lsrs r0, r2, #28 │ │ - b.n 9b1ec │ │ + b.n 9b1f8 │ │ asrs r6, r7, #23 │ │ - b.n 9b652 │ │ + b.n 9b65e │ │ adds r0, #18 │ │ - b.n 9b256 │ │ + b.n 9b262 │ │ lsls r6, r7, #23 │ │ - b.n 9b5c0 │ │ + b.n 9b5cc │ │ asrs r2, r2, #32 │ │ adds r1, #160 @ 0xa0 │ │ movs r0, #0 │ │ - b.n 9b522 │ │ + b.n 9b52e │ │ cmp r7, #240 @ 0xf0 │ │ - b.n 9b5b4 │ │ + b.n 9b5c0 │ │ movs r2, r6 │ │ - b.n 9b26a │ │ + b.n 9b276 │ │ lsrs r7, r7, #5 │ │ - b.n 9b5ce │ │ + b.n 9b5da │ │ asrs r6, r7, #23 │ │ adds r3, #160 @ 0xa0 │ │ movs r1, r0 │ │ - b.n 9b276 │ │ + b.n 9b282 │ │ ldrh r0, [r6, #0] │ │ ldmia.w sp!, {fp, lr} │ │ stmdb sp!, {r0, r2, r3, ip, sp, pc} │ │ - b.n 9b282 │ │ - beq.n 9af54 │ │ - b.n 9b3e0 │ │ + b.n 9b28e │ │ + beq.n 9af60 │ │ + b.n 9b3ec │ │ movs r0, r7 │ │ - b.n 9aa88 │ │ + b.n 9aa94 │ │ asrs r5, r1, #32 │ │ - b.n 9b28e │ │ + b.n 9b29a │ │ movs r0, r0 │ │ - b.n 9b070 │ │ + b.n 9b07c │ │ movs r4, r5 │ │ - b.n 9aa76 │ │ - blx fff58558 │ │ + b.n 9aa82 │ │ + blx fff59564 │ │ movs r0, r0 │ │ - b.n 9b5fe │ │ + b.n 9b60a │ │ movs r0, r0 │ │ asrs r0, r4, #14 │ │ movs r0, #0 │ │ lsls r5, r3, #22 │ │ movs r4, r0 │ │ lsls r5, r3, #22 │ │ asrs r0, r0, #32 │ │ @@ -173107,2043 +172987,2043 @@ │ │ lsls r4, r1, #12 │ │ subs r3, #154 @ 0x9a │ │ lsls r3, r0, #13 │ │ subs r0, r0, #7 │ │ lsls r0, r4, #6 │ │ lsls r2, r2, #14 │ │ lsls r1, r4, #3 │ │ - beq.n 9af96 │ │ - b.n 9b2c2 │ │ + beq.n 9afa2 │ │ + b.n 9b2ce │ │ ldrh r0, [r0, #0] │ │ - ldmia.w sp!, {r2, r3, r4, r5, r6, r7, fp, ip, sp} │ │ + ldmia.w sp!, {r4, r8, fp, ip, sp} │ │ movs r4, r0 │ │ asrs r4, r5, #32 │ │ - b.n 9aacc │ │ + b.n 9aad8 │ │ movs r0, #8 │ │ - b.n 9aab2 │ │ + b.n 9aabe │ │ asrs r1, r0, #32 │ │ - b.n 9b0b4 │ │ + b.n 9b0c0 │ │ adds r0, #28 │ │ - b.n 9aaba │ │ + b.n 9aac6 │ │ asrs r0, r2, #1 │ │ - b.n 9aac0 │ │ + b.n 9aacc │ │ movs r2, r0 │ │ - b.n 9b244 │ │ + b.n 9b250 │ │ movs r0, #1 │ │ strh r0, [r4, #12] │ │ asrs r0, r0, #32 │ │ - b.n 9b46e │ │ + b.n 9b47a │ │ movs r0, #2 │ │ - b.n 9b0b4 │ │ + b.n 9b0c0 │ │ movs r0, #1 │ │ - b.n 9b436 │ │ + b.n 9b442 │ │ movs r0, #1 │ │ - b.n 9afba │ │ + b.n 9afc6 │ │ asrs r0, r0, #32 │ │ - b.n 9b6fa │ │ - ldr r2, [sp, #732] @ 0x2dc │ │ - and.w r8, r0, r8, ror #14 │ │ + b.n 9b706 │ │ + ldr r2, [sp, #736] @ 0x2e0 │ │ + and.w r8, r0, ip, lsl #15 │ │ movs r4, r0 │ │ - ldr r7, [pc, #960] @ (9b384 ) │ │ + ldr r7, [pc, #960] @ (9b390 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n 9b4e4 │ │ + b.n 9b4f0 │ │ str r0, [r2, #0] │ │ - b.n 9aaf0 │ │ + b.n 9aafc │ │ stmia r0!, {} │ │ - b.n 9b712 │ │ + b.n 9b71e │ │ strh r4, [r3, #0] │ │ - b.n 9ab02 │ │ - bl 4f6ad6 │ │ + b.n 9ab0e │ │ + bl 4f6ae2 │ │ str r0, [r4, r0] │ │ - b.n 9ab0a │ │ - bl 4f6ade │ │ + b.n 9ab16 │ │ + bl 4f6aea │ │ adds r0, #188 @ 0xbc │ │ - b.n 9ab12 │ │ + b.n 9ab1e │ │ lsrs r0, r0 │ │ - b.n 9ab16 │ │ + b.n 9ab22 │ │ movs r0, #5 │ │ - b.n 9b2fe │ │ + b.n 9b30a │ │ adds r0, #1 │ │ - b.n 9b4d8 │ │ - b.n 9b17c │ │ - b.n 9ab22 │ │ - bl 4f6af6 │ │ + b.n 9b4e4 │ │ + b.n 9b188 │ │ + b.n 9ab2e │ │ + bl 4f6b02 │ │ adds r0, #0 │ │ - b.n 9b5e6 │ │ + b.n 9b5f2 │ │ lsrs r0, r1 │ │ - b.n 9ab2e │ │ + b.n 9ab3a │ │ adds r0, #0 │ │ - b.n 9b746 │ │ + b.n 9b752 │ │ adds r0, #1 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n 9b6b2 │ │ + b.n 9b6be │ │ str r6, [r1, #0] │ │ - b.n 9b062 │ │ + b.n 9b06e │ │ ands r4, r0 │ │ - b.n 9b060 │ │ - b.n 9b028 │ │ - b.n 9b51a │ │ + b.n 9b06c │ │ + b.n 9b034 │ │ + b.n 9b526 │ │ movs r0, #1 │ │ asrs r0, r0, #12 │ │ str r4, [r0, #0] │ │ - b.n 9b34e │ │ - bl 4f6b22 │ │ + b.n 9b35a │ │ + bl 4f6b2e │ │ lsls r2, r6, #1 │ │ subs r0, r0, r0 │ │ movs r0, #3 │ │ - b.n 9b032 │ │ + b.n 9b03e │ │ adds r0, #92 @ 0x5c │ │ - b.n 9abd4 │ │ + b.n 9abe0 │ │ ands r1, r0 │ │ - b.n 9b776 │ │ + b.n 9b782 │ │ movs r0, #0 │ │ - b.n 9abba │ │ + b.n 9abc6 │ │ movs r0, #16 │ │ - b.n 9ab60 │ │ + b.n 9ab6c │ │ strh r0, [r0, #0] │ │ - b.n 9ab5e │ │ + b.n 9ab6a │ │ adds r3, #20 │ │ - b.n 9b14a │ │ + b.n 9b156 │ │ str r4, [r0, r0] │ │ - b.n 9ab66 │ │ + b.n 9ab72 │ │ str r4, [r3, r0] │ │ - b.n 9ab74 │ │ - bl 4f6b4e │ │ + b.n 9ab80 │ │ + bl 4f6b5a │ │ ands r0, r4 │ │ - b.n 9ab7c │ │ - bl 4f6b56 │ │ + b.n 9ab88 │ │ + bl 4f6b62 │ │ str r4, [r7, #8] │ │ - b.n 9ab84 │ │ + b.n 9ab90 │ │ strb r0, [r0, #3] │ │ - b.n 9ab88 │ │ + b.n 9ab94 │ │ movs r0, #4 │ │ - b.n 9b370 │ │ + b.n 9b37c │ │ strh r4, [r0, #6] │ │ - b.n 9ab90 │ │ - bl 4f6b6a │ │ + b.n 9ab9c │ │ + bl 4f6b76 │ │ str r1, [r0, #0] │ │ - b.n 9b55e │ │ + b.n 9b56a │ │ adds r0, #200 @ 0xc8 │ │ - b.n 9ab9c │ │ + b.n 9aba8 │ │ str r0, [r0, #0] │ │ - b.n 9b668 │ │ - bl 4f6b7a │ │ + b.n 9b674 │ │ + bl 4f6b86 │ │ stmia r0!, {r0} │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n 9b72a │ │ + b.n 9b736 │ │ str r0, [r1, #0] │ │ - b.n 9b0d4 │ │ + b.n 9b0e0 │ │ adds r0, #3 │ │ - b.n 9b0d6 │ │ + b.n 9b0e2 │ │ movs r0, #1 │ │ asrs r0, r0, #12 │ │ adds r0, #3 │ │ - b.n 9b3c2 │ │ + b.n 9b3ce │ │ lsls r2, r3, #1 │ │ subs r0, r0, r0 │ │ stmia r0!, {r2, r3} │ │ - b.n 9b0a2 │ │ + b.n 9b0ae │ │ str r0, [r2, #12] │ │ - b.n 9b43e │ │ + b.n 9b44a │ │ adds r0, #4 │ │ - b.n 9b0f4 │ │ + b.n 9b100 │ │ ands r4, r1 │ │ - b.n 9abc6 │ │ + b.n 9abd2 │ │ movs r0, #5 │ │ - b.n 9b0fa │ │ + b.n 9b106 │ │ strh r0, [r0, #0] │ │ - b.n 9ac52 │ │ + b.n 9ac5e │ │ movs r0, #3 │ │ - b.n 9b3ba │ │ + b.n 9b3c6 │ │ adds r0, #6 │ │ - b.n 9b164 │ │ + b.n 9b170 │ │ ands r7, r0 │ │ - b.n 9b266 │ │ + b.n 9b272 │ │ strb r4, [r3, #1] │ │ - b.n 9ac64 │ │ + b.n 9ac70 │ │ ands r0, r0 │ │ - b.n 9b806 │ │ + b.n 9b812 │ │ asrs r0, r2, #32 │ │ - b.n 9abec │ │ + b.n 9abf8 │ │ ands r1, r0 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n 9b776 │ │ + b.n 9b782 │ │ tst r4, r0 │ │ - b.n 9b416 │ │ + b.n 9b422 │ │ movs r0, #140 @ 0x8c │ │ - b.n 9b1ea │ │ + b.n 9b1f6 │ │ ands r0, r1 │ │ lsls r0, r0, #12 │ │ movs r0, #2 │ │ - b.n 9b1ea │ │ + b.n 9b1f6 │ │ movs r0, #0 │ │ - b.n 9ac66 │ │ + b.n 9ac72 │ │ movs r0, #2 │ │ - b.n 9b82a │ │ + b.n 9b836 │ │ strh r6, [r1, #0] │ │ - b.n 9b42e │ │ + b.n 9b43a │ │ strb r2, [r2, #28] │ │ - b.n 9b1f4 │ │ + b.n 9b200 │ │ str r0, [r1, r0] │ │ - b.n 9ac46 │ │ + b.n 9ac52 │ │ adds r0, #0 │ │ - b.n 9b83a │ │ + b.n 9b846 │ │ ands r4, r3 │ │ - b.n 9ac2c │ │ - bl 4f6bfe │ │ + b.n 9ac38 │ │ + bl 4f6c0a │ │ str r0, [r4, r0] │ │ - b.n 9ac34 │ │ - bl 4f6c06 │ │ + b.n 9ac40 │ │ + bl 4f6c12 │ │ asrs r4, r7, #2 │ │ - b.n 9ac3c │ │ + b.n 9ac48 │ │ str r0, [r0, #12] │ │ - b.n 9ac40 │ │ + b.n 9ac4c │ │ movs r0, #5 │ │ - b.n 9b41e │ │ + b.n 9b42a │ │ asrs r1, r0, #32 │ │ - b.n 9b5fc │ │ + b.n 9b608 │ │ stmia r0!, {r2, r6, r7} │ │ - b.n 9ac4c │ │ - bl 4f6c1e │ │ + b.n 9ac58 │ │ + bl 4f6c2a │ │ asrs r0, r0, #32 │ │ - b.n 9b712 │ │ + b.n 9b71e │ │ str r0, [r1, #12] │ │ - b.n 9ac58 │ │ + b.n 9ac64 │ │ asrs r0, r0, #32 │ │ - b.n 9b86e │ │ + b.n 9b87a │ │ asrs r1, r0, #32 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n 9b7da │ │ + b.n 9b7e6 │ │ strb r4, [r1, #0] │ │ - b.n 9b182 │ │ + b.n 9b18e │ │ str r6, [r0, #0] │ │ - b.n 9b188 │ │ + b.n 9b194 │ │ movs r0, #1 │ │ asrs r0, r0, #12 │ │ strb r6, [r0, #0] │ │ - b.n 9b474 │ │ - bl 4f6c46 │ │ + b.n 9b480 │ │ + bl 4f6c52 │ │ movs r1, r6 │ │ subs r0, r0, r0 │ │ stmia r0!, {r0} │ │ - b.n 9b156 │ │ + b.n 9b162 │ │ movs r0, #0 │ │ - b.n 9ac86 │ │ + b.n 9ac92 │ │ asrs r4, r0, #32 │ │ - b.n 9ac8a │ │ + b.n 9ac96 │ │ strh r0, [r2, #6] │ │ - b.n 9b4fa │ │ + b.n 9b506 │ │ strb r4, [r0, #0] │ │ - b.n 9b1a6 │ │ + b.n 9b1b2 │ │ str r5, [r0, #0] │ │ - b.n 9b1a8 │ │ - add r0, pc, #24 @ (adr r0, 9b180 ) │ │ - b.n 9b478 │ │ + b.n 9b1b4 │ │ + add r0, pc, #24 @ (adr r0, 9b18c ) │ │ + b.n 9b484 │ │ strb r5, [r0, #0] │ │ - b.n 9b1c0 │ │ + b.n 9b1cc │ │ str r4, [r0, #0] │ │ - b.n 9b1c2 │ │ + b.n 9b1ce │ │ str r7, [r0, #0] │ │ - b.n 9b482 │ │ + b.n 9b48e │ │ strb r0, [r1, #0] │ │ - b.n 9b222 │ │ + b.n 9b22e │ │ strb r1, [r1, #0] │ │ - b.n 9b328 │ │ + b.n 9b334 │ │ strb r0, [r0, #0] │ │ - b.n 9b8c2 │ │ + b.n 9b8ce │ │ strb r1, [r0, #0] │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n 9b838 │ │ + b.n 9b844 │ │ strb r0, [r6, #0] │ │ asrs r0, r0, #12 │ │ movs r0, r0 │ │ - b.n 9b83e │ │ + b.n 9b84a │ │ str r0, [r0, #0] │ │ - b.n 9ad36 │ │ + b.n 9ad42 │ │ strb r0, [r3, #0] │ │ lsls r0, r0, #12 │ │ movs r0, #2 │ │ - b.n 9b246 │ │ + b.n 9b252 │ │ asrs r1, r0, #32 │ │ - b.n 9b34c │ │ + b.n 9b358 │ │ str r4, [r1, #16] │ │ - b.n 9b2b2 │ │ + b.n 9b2be │ │ adds r0, #1 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n 9b854 │ │ + b.n 9b860 │ │ asrs r0, r6, #1 │ │ - b.n 9acf0 │ │ + b.n 9acfc │ │ adds r0, #111 @ 0x6f │ │ asrs r0, r4, #15 │ │ movs r0, r0 │ │ - b.n 9b86e │ │ + b.n 9b87a │ │ strb r6, [r0, #0] │ │ - b.n 9b2cc │ │ + b.n 9b2d8 │ │ adds r0, #72 @ 0x48 │ │ lsls r0, r0, #12 │ │ movs r0, #7 │ │ - b.n 9b2cc │ │ + b.n 9b2d8 │ │ asrs r1, r0, #32 │ │ - b.n 9b2e8 │ │ + b.n 9b2f4 │ │ movs r0, #0 │ │ - b.n 9ad4e │ │ + b.n 9ad5a │ │ adds r0, #114 @ 0x72 │ │ - b.n 9afb0 │ │ + b.n 9afbc │ │ rors r0, r6 │ │ - b.n 9b572 │ │ + b.n 9b57e │ │ asrs r3, r0, #32 │ │ - b.n 9b17c │ │ + b.n 9b188 │ │ movs r0, #195 @ 0xc3 │ │ - b.n 9b5e0 │ │ + b.n 9b5ec │ │ movs r0, #3 │ │ - b.n 9ad62 │ │ + b.n 9ad6e │ │ movs r2, #81 @ 0x51 │ │ - b.n 9b1a8 │ │ + b.n 9b1b4 │ │ movs r0, #2 │ │ - b.n 9ad6a │ │ + b.n 9ad76 │ │ asrs r1, r2, #5 │ │ - b.n 9b1b0 │ │ + b.n 9b1bc │ │ asrs r1, r0, #32 │ │ - b.n 9ad72 │ │ + b.n 9ad7e │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {pc} │ │ - b.n 9b93a │ │ + b.n 9b946 │ │ str r0, [r0, r0] │ │ - b.n 9b93e │ │ + b.n 9b94a │ │ movs r0, #0 │ │ - b.n 9b942 │ │ + b.n 9b94e │ │ @ instruction: 0xff89eaff │ │ str r0, [r0, r0] │ │ - b.n 9b94a │ │ + b.n 9b956 │ │ ands r0, r0 │ │ - b.n 9b94e │ │ + b.n 9b95a │ │ stmia r0!, {} │ │ - b.n 9b952 │ │ + b.n 9b95e │ │ @ instruction: 0xffa1eaff │ │ ands r0, r0 │ │ - b.n 9b95a │ │ + b.n 9b966 │ │ str r0, [r0, r0] │ │ - b.n 9b95e │ │ + b.n 9b96a │ │ stmia r0!, {} │ │ - b.n 9b962 │ │ + b.n 9b96e │ │ @ instruction: 0xffcaeaff │ │ - ldrh r6, [r0, r0] │ │ + ldr r2, [r7, r7] │ │ vtbl.8 d20, {d8}, d0 │ │ stmdb sp!, {r0, r2, r3, ip, sp, pc} │ │ - b.n 9b572 │ │ - beq.n 9b244 │ │ - b.n 9b6d0 │ │ + b.n 9b57e │ │ + beq.n 9b250 │ │ + b.n 9b6dc │ │ stmia r0!, {r3} │ │ - b.n 9b750 │ │ + b.n 9b75c │ │ stmia r0!, {r2} │ │ - b.n 9ad58 │ │ + b.n 9ad64 │ │ stmia r0!, {} │ │ - b.n 9ad5c │ │ - strb r7, [r2, #11] │ │ + b.n 9ad68 │ │ + strb r0, [r3, #11] │ │ @ instruction: 0xeb00d00b │ │ - b.n 9b58a │ │ + b.n 9b596 │ │ ldrh r0, [r0, #0] │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n 9b770 │ │ - beq.n 9b280 │ │ - b.n 9b6f4 │ │ + b.n 9b77c │ │ + beq.n 9b28c │ │ + b.n 9b700 │ │ str r0, [r0, #0] │ │ - b.n 9b59e │ │ + b.n 9b5aa │ │ lsls r0, r1, #1 │ │ - b.n 9ad82 │ │ + b.n 9ad8e │ │ strh r1, [r0, #0] │ │ - b.n 9b5a6 │ │ + b.n 9b5b2 │ │ movs r0, r0 │ │ - b.n 9b910 │ │ + b.n 9b91c │ │ str r4, [r5, r5] │ │ - b.n 9ad8e │ │ + b.n 9ad9a │ │ stmia r1!, {r5, r6, r7} │ │ - b.n 9adb0 │ │ + b.n 9adbc │ │ stmia r0!, {r2, r3} │ │ - b.n 9b394 │ │ + b.n 9b3a0 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ ands r0, r3 │ │ - b.n 9adaa │ │ + b.n 9adb6 │ │ lsls r5, r4, #2 │ │ - b.n 9b5c2 │ │ + b.n 9b5ce │ │ strb r0, [r0, #0] │ │ - b.n 9b9c6 │ │ + b.n 9b9d2 │ │ asrs r0, r2, #1 │ │ - b.n 9adc2 │ │ + b.n 9adce │ │ str r0, [sp, #4] │ │ - b.n 9b9ce │ │ + b.n 9b9da │ │ movs r2, r2 │ │ and.w r0, r0, r8, lsr #16 │ │ - b.n 9adc2 │ │ + b.n 9adce │ │ lsls r5, r4, #2 │ │ - b.n 9b5da │ │ + b.n 9b5e6 │ │ asrs r0, r2, #1 │ │ - b.n 9add6 │ │ + b.n 9ade2 │ │ strb r0, [r0, #0] │ │ - b.n 9b9e2 │ │ + b.n 9b9ee │ │ str r0, [sp, #4] │ │ - b.n 9b9e6 │ │ + b.n 9b9f2 │ │ movs r0, r0 │ │ - b.n 9b954 │ │ + b.n 9b960 │ │ movs r3, r1 │ │ lsrs r0, r0, #8 │ │ adds r0, #2 │ │ - b.n 9b2fc │ │ + b.n 9b308 │ │ movs r1, r0 │ │ - b.n 9b8dc │ │ + b.n 9b8e8 │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ adds r0, #92 @ 0x5c │ │ - b.n 9ae6a │ │ + b.n 9ae76 │ │ movs r0, r1 │ │ - b.n 9b562 │ │ + b.n 9b56e │ │ strb r0, [r1, #0] │ │ - b.n 9b606 │ │ + b.n 9b612 │ │ str r0, [sp, #0] │ │ - b.n 9ba0a │ │ + b.n 9ba16 │ │ strb r0, [r0, #0] │ │ adds r1, #160 @ 0xa0 │ │ adds r3, #23 │ │ - b.n 9b3d4 │ │ + b.n 9b3e0 │ │ strb r0, [r0, #0] │ │ - b.n 9b798 │ │ + b.n 9b7a4 │ │ adds r0, #1 │ │ - b.n 9b760 │ │ + b.n 9b76c │ │ strb r7, [r0, #0] │ │ - b.n 9b2e4 │ │ + b.n 9b2f0 │ │ movs r4, r0 │ │ - b.n 9b590 │ │ + b.n 9b59c │ │ str r4, [r3, r1] │ │ - b.n 9ae92 │ │ + b.n 9ae9e │ │ strb r4, [r0, #0] │ │ movs r1, #160 @ 0xa0 │ │ movs r0, r1 │ │ - b.n 9b58e │ │ + b.n 9b59a │ │ movs r0, r1 │ │ str r1, [sp, #640] @ 0x280 │ │ lsls r0, r2, #20 │ │ - b.n 9b3f8 │ │ + b.n 9b404 │ │ asrs r0, r0, #32 │ │ - b.n 9b7bc │ │ + b.n 9b7c8 │ │ movs r1, r0 │ │ - b.n 9b77e │ │ + b.n 9b78a │ │ movs r1, r0 │ │ - b.n 9b302 │ │ + b.n 9b30e │ │ movs r4, r0 │ │ - b.n 9b5a6 │ │ + b.n 9b5b2 │ │ ands r0, r0 │ │ adds r1, #160 @ 0xa0 │ │ movs r0, r0 │ │ - b.n 9ba4e │ │ + b.n 9ba5a │ │ movs r7, r0 │ │ - b.n 9b5ba │ │ + b.n 9b5c6 │ │ movs r3, r6 │ │ lsrs r0, r0, #8 │ │ lsls r2, r3, #1 │ │ - b.n 9aed2 │ │ + b.n 9aede │ │ movs r0, #16 │ │ - b.n 9ae38 │ │ + b.n 9ae44 │ │ movs r3, r0 │ │ - b.n 9b9c2 │ │ + b.n 9b9ce │ │ movs r5, r6 │ │ cmp r2, #0 │ │ movs r0, r2 │ │ - b.n 9ae56 │ │ - add r0, pc, #28 @ (adr r0, 9b348 ) │ │ - b.n 9b3b6 │ │ + b.n 9ae62 │ │ + add r0, pc, #28 @ (adr r0, 9b354 ) │ │ + b.n 9b3c2 │ │ movs r0, r0 │ │ - b.n 9b9d6 │ │ + b.n 9b9e2 │ │ ands r0, r0 │ │ - b.n 9b444 │ │ + b.n 9b450 │ │ movs r2, r2 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n 9b67e │ │ + b.n 9b68a │ │ asrs r2, r1, #32 │ │ - b.n 9b682 │ │ + b.n 9b68e │ │ movs r0, #0 │ │ - b.n 9ba86 │ │ - blx ffe70948 │ │ + b.n 9ba92 │ │ + blx ffe71954 │ │ movs r0, r0 │ │ - b.n 9b9ee │ │ + b.n 9b9fa │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ - blx ffdd9954 │ │ + blx ffdda960 │ │ movs r0, r0 │ │ - b.n 9ae7a │ │ + b.n 9ae86 │ │ movs r3, r1 │ │ - b.n 9b9fe │ │ + b.n 9ba0a │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r6, r4 │ │ - b.n 9ba06 │ │ + b.n 9ba12 │ │ lsls r7, r3, #1 │ │ asrs r0, r2, #13 │ │ movs r5, r6 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n 9ba24 │ │ + b.n 9ba30 │ │ movs r6, r2 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n 9b6ba │ │ + b.n 9b6c6 │ │ asrs r2, r1, #32 │ │ - b.n 9b6be │ │ + b.n 9b6ca │ │ movs r0, #3 │ │ - b.n 9bac2 │ │ + b.n 9bace │ │ movs r0, r1 │ │ and.w r0, r0, r8, lsl #1 │ │ - b.n 9aeb6 │ │ + b.n 9aec2 │ │ asrs r0, r0, #32 │ │ - b.n 9bb4e │ │ + b.n 9bb5a │ │ movs r0, #1 │ │ - b.n 9bad2 │ │ + b.n 9bade │ │ asrs r0, r6, #5 │ │ - b.n 9ae96 │ │ + b.n 9aea2 │ │ asrs r4, r6, #5 │ │ - b.n 9ae9a │ │ + b.n 9aea6 │ │ asrs r0, r7, #5 │ │ - b.n 9ae9e │ │ + b.n 9aeaa │ │ asrs r4, r7, #5 │ │ - b.n 9aea2 │ │ + b.n 9aeae │ │ movs r4, r0 │ │ - b.n 9b6e6 │ │ + b.n 9b6f2 │ │ asrs r2, r1, #32 │ │ - b.n 9b6ea │ │ - blx ffe579ac │ │ + b.n 9b6f6 │ │ + blx ffe589b8 │ │ movs r0, r0 │ │ - b.n 9ba52 │ │ + b.n 9ba5e │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ - blx ffdc09b8 │ │ + blx ffdc19c4 │ │ movs r0, r0 │ │ - b.n 9aede │ │ + b.n 9aeea │ │ movs r3, r1 │ │ - b.n 9ba62 │ │ + b.n 9ba6e │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r6, r4 │ │ - b.n 9ba6a │ │ + b.n 9ba76 │ │ lsls r7, r3, #1 │ │ asrs r0, r2, #13 │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #1 │ │ - b.n 9af02 │ │ + b.n 9af0e │ │ asrs r0, r2, #32 │ │ - b.n 9af14 │ │ + b.n 9af20 │ │ asrs r0, r1, #2 │ │ - b.n 9b6e0 │ │ + b.n 9b6ec │ │ asrs r4, r5, #5 │ │ - b.n 9aee2 │ │ + b.n 9aeee │ │ movs r0, r0 │ │ - b.n 9bb26 │ │ - beq.n 9b420 │ │ - b.n 9b880 │ │ + b.n 9bb32 │ │ + beq.n 9b42c │ │ + b.n 9b88c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, ip} │ │ - b.n 9b872 │ │ + b.n 9b87e │ │ movs r2, r0 │ │ - b.n 9bad8 │ │ + b.n 9bae4 │ │ @ instruction: 0xfffa3aff │ │ @ instruction: 0xfff4eaff │ │ stmia r0!, {r2, r4, r6} │ │ - b.n 9af40 │ │ + b.n 9af4c │ │ movs r0, r0 │ │ - b.n 9baaa │ │ + b.n 9bab6 │ │ asrs r0, r2, #1 │ │ - b.n 9af48 │ │ - b.n 9ae74 │ │ - b.n 9b74e │ │ + b.n 9af54 │ │ + b.n 9ae80 │ │ + b.n 9b75a │ │ adds r0, #76 @ 0x4c │ │ - b.n 9af50 │ │ + b.n 9af5c │ │ stmia r0!, {r2, r3} │ │ - b.n 9b534 │ │ + b.n 9b540 │ │ lsls r0, r1, #1 │ │ - b.n 9af58 │ │ + b.n 9af64 │ │ asrs r1, r0, #32 │ │ - b.n 9b53c │ │ + b.n 9b548 │ │ adds r0, #3 │ │ - b.n 9b540 │ │ + b.n 9b54c │ │ strb r7, [r6, r4] │ │ - b.n 9b766 │ │ + b.n 9b772 │ │ movs r0, r0 │ │ - b.n 9b548 │ │ + b.n 9b554 │ │ movs r1, #163 @ 0xa3 │ │ - b.n 9ba2e │ │ + b.n 9ba3a │ │ movs r4, r1 │ │ asrs r0, r4, #6 │ │ ands r1, r4 │ │ stmia.w sp, {r0, r1} │ │ - b.n 9bb7a │ │ + b.n 9bb86 │ │ vqrdmlah.s q15, q13, │ │ movs r0, #16 │ │ - b.n 9af7c │ │ + b.n 9af88 │ │ @ instruction: 0xffb7eaff │ │ asrs r1, r0, #32 │ │ - b.n 9b8ca │ │ + b.n 9b8d6 │ │ movs r2, r0 │ │ - b.n 9bb30 │ │ + b.n 9bb3c │ │ @ instruction: 0xffe43aff │ │ @ instruction: 0xffc5eaff │ │ - adds r5, #216 @ 0xd8 │ │ + adds r5, #236 @ 0xec │ │ movs r4, r0 │ │ - bl fff55448 │ │ - subs r0, #105 @ 0x69 │ │ - @ instruction: 0xfff7cef8 │ │ - @ instruction: 0xfff6cf05 │ │ + bl ffec1454 │ │ + subs r1, #239 @ 0xef │ │ + vcvt.u32.f32 d28, d30, #9 │ │ + vqrdmlsh.s q14, q3, d11[0] │ │ @ instruction: 0xfff64df0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n 9b98c │ │ - beq.n 9b4a4 │ │ - b.n 9b910 │ │ + b.n 9b998 │ │ + beq.n 9b4b0 │ │ + b.n 9b91c │ │ adds r0, #88 @ 0x58 │ │ - b.n 9b97a │ │ - b.n 9b47c │ │ - b.n 9afa4 │ │ + b.n 9b986 │ │ + b.n 9b488 │ │ + b.n 9afb0 │ │ movs r0, r0 │ │ - b.n 9bb26 │ │ - bl 4f6f82 │ │ + b.n 9bb32 │ │ + bl 4f6f8e │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n 9b74a │ │ + b.n 9b756 │ │ movs r2, r0 │ │ subs r2, #0 │ │ movs r5, r7 │ │ and.w r0, r0, r1 │ │ - b.n 9b756 │ │ + b.n 9b762 │ │ movs r3, r7 │ │ ldr r2, [sp, #0] │ │ ldrb r7, [r3, #30] │ │ - b.n 9b7c8 │ │ + b.n 9b7d4 │ │ movs r6, r1 │ │ - b.n 9b754 │ │ + b.n 9b760 │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ - bl 4f6faa │ │ + bl 4f6fb6 │ │ ldrb r1, [r2, #30] │ │ - b.n 9b7b8 │ │ + b.n 9b7c4 │ │ movs r0, r0 │ │ - b.n 9bb64 │ │ + b.n 9bb70 │ │ movs r3, r2 │ │ lsrs r0, r0, #8 │ │ ldrb r7, [r3, #30] │ │ - b.n 9b7e4 │ │ + b.n 9b7f0 │ │ movs r6, r1 │ │ - b.n 9b770 │ │ + b.n 9b77c │ │ @ instruction: 0xfff90aff │ │ - bl 4bafc6 │ │ - bl 4f6fca │ │ + bl 4bafd2 │ │ + bl 4f6fd6 │ │ @ instruction: 0xffe9eaff │ │ movs r4, r0 │ │ - b.n 9b780 │ │ + b.n 9b78c │ │ movs r7, r4 │ │ - bge.n 9b4da │ │ + bge.n 9b4e6 │ │ ldrb r7, [r3, #30] │ │ - b.n 9b80a │ │ + b.n 9b816 │ │ movs r4, r0 │ │ - b.n 9b790 │ │ + b.n 9b79c │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ strb r1, [r0, #0] │ │ - b.n 9b9f2 │ │ - bl 4f6fea │ │ + b.n 9b9fe │ │ + bl 4f6ff6 │ │ ldrsh r7, [r2, r6] │ │ - b.n 9b7fe │ │ + b.n 9b80a │ │ movs r0, r0 │ │ - b.n 9bba0 │ │ + b.n 9bbac │ │ movs r6, r3 │ │ lsrs r0, r0, #8 │ │ ldrsh r7, [r3, r6] │ │ - b.n 9b82a │ │ + b.n 9b836 │ │ movs r4, r0 │ │ - b.n 9b7ac │ │ + b.n 9b7b8 │ │ @ instruction: 0xfff90aff │ │ - bl 4bb006 │ │ - bl 4f700a │ │ + bl 4bb012 │ │ + bl 4f7016 │ │ movs r0, r0 │ │ - b.n 9bbce │ │ + b.n 9bbda │ │ stmia r0!, {r3, r6} │ │ - b.n 9b036 │ │ + b.n 9b042 │ │ adds r0, #40 @ 0x28 │ │ - b.n 9ba32 │ │ + b.n 9ba3e │ │ str r0, [r5, r0] │ │ - b.n 9b056 │ │ + b.n 9b062 │ │ ands r4, r5 │ │ - b.n 9b05a │ │ + b.n 9b066 │ │ strh r4, [r0, #0] │ │ - b.n 9b5b0 │ │ + b.n 9b5bc │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ lsls r6, r0, #4 │ │ - b.n 9bc1e │ │ + b.n 9bc2a │ │ movs r4, r1 │ │ lsrs r0, r0, #8 │ │ ldrb r7, [r3, #30] │ │ - b.n 9b85c │ │ + b.n 9b868 │ │ movs r5, r0 │ │ - b.n 9b7e8 │ │ + b.n 9b7f4 │ │ @ instruction: 0xfff11aff │ │ strb r1, [r0, #0] │ │ - b.n 9ba4c │ │ - bl 4f7042 │ │ + b.n 9ba58 │ │ + bl 4f704e │ │ ldr r7, [r2, #120] @ 0x78 │ │ - b.n 9b850 │ │ + b.n 9b85c │ │ movs r0, r0 │ │ - b.n 9bbfa │ │ + b.n 9bc06 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ ldr r7, [r3, #120] @ 0x78 │ │ - b.n 9b87c │ │ + b.n 9b888 │ │ movs r5, r0 │ │ - b.n 9b806 │ │ + b.n 9b812 │ │ @ instruction: 0xfff90aff │ │ @ instruction: 0xffe8eaff │ │ - bl 4f7062 │ │ + bl 4f706e │ │ str r4, [r5, #0] │ │ - b.n 9ba82 │ │ + b.n 9ba8e │ │ movs r0, r0 │ │ - b.n 9bc10 │ │ + b.n 9bc1c │ │ @ instruction: 0xffd70aff │ │ movs r0, r0 │ │ @ instruction: 0xea00f05b │ │ sbcs.w r0, pc, #16252928 @ 0xf80000 │ │ - b.n 9b0bc │ │ + b.n 9b0c8 │ │ movs r0, r0 │ │ - b.n 9b6a0 │ │ + b.n 9b6ac │ │ lsls r2, r3, #1 │ │ - b.n 9b126 │ │ + b.n 9b132 │ │ movs r3, r0 │ │ - b.n 9bc2a │ │ + b.n 9bc36 │ │ movs r1, r0 │ │ cmp r2, #0 │ │ - beq.n 9b5c0 │ │ - b.n 9ba28 │ │ + beq.n 9b5cc │ │ + b.n 9ba34 │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {} │ │ - b.n 9b0c0 │ │ + b.n 9b0cc │ │ movs r0, r0 │ │ - b.n 9bc42 │ │ + b.n 9bc4e │ │ adds r0, #0 │ │ - b.n 9b0ce │ │ + b.n 9b0da │ │ str r6, [r1, #0] │ │ - b.n 9b8e6 │ │ + b.n 9b8f2 │ │ eors r0, r2 │ │ - b.n 9b0e8 │ │ + b.n 9b0f4 │ │ str r1, [r0, #0] │ │ asrs r0, r4, #6 │ │ stmia r0!, {r2, r3, r6} │ │ - b.n 9b0f0 │ │ + b.n 9b0fc │ │ movs r3, r0 │ │ - b.n 9b636 │ │ + b.n 9b642 │ │ str r0, [r1, r1] │ │ - b.n 9b0f8 │ │ + b.n 9b104 │ │ ands r4, r0 │ │ - b.n 9b6dc │ │ + b.n 9b6e8 │ │ adds r0, #68 @ 0x44 │ │ - b.n 9b100 │ │ + b.n 9b10c │ │ stmia r0!, {r2, r3} │ │ - b.n 9b6e4 │ │ + b.n 9b6f0 │ │ asrs r6, r1, #32 │ │ asrs r0, r4, #6 │ │ movs r0, r0 │ │ - b.n 9bc72 │ │ + b.n 9bc7e │ │ str r5, [r0, r0] │ │ - b.n 9b6f0 │ │ + b.n 9b6fc │ │ adds r0, #3 │ │ - b.n 9b6f4 │ │ + b.n 9b700 │ │ str r4, [r0, r0] │ │ asrs r0, r4, #6 │ │ lsls r2, r0, #5 │ │ @ instruction: 0xe98d100c │ │ - b.n 9b922 │ │ + b.n 9b92e │ │ movs r0, r2 │ │ - b.n 9b100 │ │ + b.n 9b10c │ │ movs r3, r0 │ │ - b.n 9bd2a │ │ + b.n 9bd36 │ │ movs r1, #18 │ │ - b.n 9bbee │ │ + b.n 9bbfa │ │ str r0, [r0, r0] │ │ - b.n 9b10c │ │ + b.n 9b118 │ │ vqrdmlah.s q7, q14, │ │ @ instruction: 0xffe4eaff │ │ - adds r2, #204 @ 0xcc │ │ + adds r2, #224 @ 0xe0 │ │ movs r4, r0 │ │ - lsls r4, r1, #12 │ │ - vcvt.u32.f32 d16, d0, #9 │ │ - @ instruction: 0xfff7eaba │ │ - vshr.u64 d18, d31, #10 │ │ + lsls r0, r6, #11 │ │ + vcvt.u32.f32 d16, d15, #9 │ │ + @ instruction: 0xfff7eb93 │ │ + vsra.u64 d18, d0, #10 │ │ @ instruction: 0xfff748f0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n 9bb30 │ │ + b.n 9bb3c │ │ str r4, [r0, #8] │ │ - b.n 9b13a │ │ + b.n 9b146 │ │ ands r0, r0 │ │ - b.n 9bd5e │ │ + b.n 9bd6a │ │ movs r0, r0 │ │ - b.n 9bcce │ │ + b.n 9bcda │ │ movs r6, r1 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, r0] │ │ - b.n 9b96a │ │ + b.n 9b976 │ │ movs r6, r0 │ │ - b.n 9b1ce │ │ + b.n 9b1da │ │ strb r4, [r1, #0] │ │ - b.n 9b15e │ │ + b.n 9b16a │ │ movs r0, r4 │ │ - b.n 9bc56 │ │ + b.n 9bc62 │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ - blx ffdb7c3c │ │ + blx ffdb8c48 │ │ movs r0, r0 │ │ - b.n 9b8f0 │ │ + b.n 9b8fc │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r5, r0 │ │ and.w r0, r0, r0 │ │ - b.n 9bcfc │ │ + b.n 9bd08 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ lsls r4, r0, #4 │ │ - b.n 9b180 │ │ + b.n 9b18c │ │ movs r0, r0 │ │ - b.n 9bcfa │ │ + b.n 9bd06 │ │ str r0, [r0, #0] │ │ asrs r0, r4, #6 │ │ ands r6, r0 │ │ - b.n 9b9a2 │ │ + b.n 9b9ae │ │ movs r4, r0 │ │ - b.n 9b9a6 │ │ + b.n 9b9b2 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r4, r5, r6, sl, fp, lr} │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n 9bb8c │ │ - beq.n 9b694 │ │ - b.n 9bb10 │ │ + b.n 9bb98 │ │ + beq.n 9b6a0 │ │ + b.n 9bb1c │ │ str r1, [r0, r0] │ │ - b.n 9b9ba │ │ + b.n 9b9c6 │ │ ands r0, r0 │ │ - b.n 9b9be │ │ + b.n 9b9ca │ │ str r0, [r1, #4] │ │ - b.n 9b1a2 │ │ - blx ffd51c84 │ │ + b.n 9b1ae │ │ + blx ffd52c90 │ │ lsrs r1, r0, #32 │ │ - b.n 9bd2a │ │ + b.n 9bd36 │ │ movs r5, r4 │ │ add r2, sp, #0 │ │ lsrs r5, r0, #20 │ │ - b.n 9bb9e │ │ + b.n 9bbaa │ │ movs r0, r0 │ │ - b.n 9bd40 │ │ + b.n 9bd4c │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ - blx ffda3c9c │ │ + blx ffda4ca8 │ │ movs r0, r0 │ │ - @ instruction: 0xea00f50a │ │ + @ instruction: 0xea00f50b │ │ add.w r0, r0, r0, lsl #24 │ │ - b.n 9b9ea │ │ + b.n 9b9f6 │ │ movs r0, r0 │ │ - b.n 9bd58 │ │ + b.n 9bd64 │ │ movs r6, r0 │ │ - b.n 9b9f2 │ │ + b.n 9b9fe │ │ lsls r6, r0, #31 │ │ asrs r0, r1, #12 │ │ asrs r6, r0, #31 │ │ - b.n 9bcca │ │ + b.n 9bcd6 │ │ lsrs r7, r7, #31 │ │ asrs r7, r1, #13 │ │ movs r0, r2 │ │ - b.n 9bd6e │ │ + b.n 9bd7a │ │ movs r6, r0 │ │ asrs r0, r4, #6 │ │ subs r7, r7, #7 │ │ - b.n 9bd68 │ │ + b.n 9bd74 │ │ movs r1, r0 │ │ - b.n 9b96e │ │ + b.n 9b97a │ │ movs r0, r0 │ │ asrs r0, r2, #13 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ asrs r1, r0, #32 │ │ - b.n 9bbda │ │ + b.n 9bbe6 │ │ movs r1, r0 │ │ - b.n 9bd80 │ │ + b.n 9bd8c │ │ movs r5, r0 │ │ ldrh r0, [r0, #16] │ │ lsls r4, r0 │ │ - b.n 9b20e │ │ + b.n 9b21a │ │ movs r0, r0 │ │ - b.n 9bd92 │ │ + b.n 9bd9e │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ - blx ffd8acf0 │ │ + blx ffd8bcfc │ │ movs r4, r1 │ │ - b.n 9b1fe │ │ + b.n 9b20a │ │ movs r0, r0 │ │ - b.n 9be3a │ │ - beq.n 9b71c │ │ - b.n 9bb94 │ │ + b.n 9be46 │ │ + beq.n 9b728 │ │ + b.n 9bba0 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {ip, lr} │ │ - b.n 9ba46 │ │ + b.n 9ba52 │ │ movs r4, r0 │ │ - b.n 9ba4a │ │ + b.n 9ba56 │ │ asrs r5, r0, #32 │ │ - b.n 9ba4e │ │ - stmia r2!, {r0, r2, r3, r6} │ │ + b.n 9ba5a │ │ + stmia r2!, {r1, r2, r3, r6} │ │ add.w r0, r0, r5 │ │ - b.n 9ba56 │ │ + b.n 9ba62 │ │ asrs r1, r0, #32 │ │ - b.n 9bc1a │ │ + b.n 9bc26 │ │ movs r1, r0 │ │ - b.n 9bdc0 │ │ + b.n 9bdcc │ │ @ instruction: 0xffef9aff │ │ @ instruction: 0xfff4eaff │ │ asrs r0, r5, #32 │ │ - b.n 9b268 │ │ + b.n 9b274 │ │ str r6, [r4, #0] │ │ - b.n 9be6e │ │ + b.n 9be7a │ │ adds r0, #36 @ 0x24 │ │ - b.n 9b270 │ │ + b.n 9b27c │ │ movs r2, #241 @ 0xf1 │ │ - b.n 9bd36 │ │ + b.n 9bd42 │ │ asrs r1, r0, #32 │ │ - b.n 9b858 │ │ + b.n 9b864 │ │ movs r4, r0 │ │ - b.n 9b258 │ │ + b.n 9b264 │ │ adds r0, #3 │ │ - b.n 9b860 │ │ + b.n 9b86c │ │ movs r0, r1 │ │ - b.n 9b260 │ │ + b.n 9b26c │ │ movs r0, r0 │ │ - b.n 9be8a │ │ + b.n 9be96 │ │ str r0, [r0, #0] │ │ - b.n 9b268 │ │ + b.n 9b274 │ │ mrc2 11, 5, lr, cr5, cr15, {7} @ │ │ @ instruction: 0xffd4eaff │ │ - cmp r5, #219 @ 0xdb │ │ - vcvtn.u16.f16 d31, d19 │ │ + cmp r7, #169 @ 0xa9 │ │ + vcvtn.s16.f16 d31, d15 │ │ vaddl.u q9, d6, d0 │ │ - b.n 9ba64 │ │ + b.n 9ba70 │ │ lsrs r1, r2, #32 │ │ - b.n 9bb66 │ │ + b.n 9bb72 │ │ subs r0, #17 │ │ - b.n 9bb6e │ │ + b.n 9bb7a │ │ lsrs r1, r2, #32 │ │ - b.n 9be14 │ │ + b.n 9be20 │ │ adds r0, #2 │ │ - b.n 9bab2 │ │ + b.n 9babe │ │ adds r6, #1 │ │ lsls r3, r0, #9 │ │ lsrs r1, r2, #32 │ │ - b.n 9be1a │ │ + b.n 9be26 │ │ lsrs r1, r2, #32 │ │ - b.n 9bb80 │ │ + b.n 9bb8c │ │ adds r0, #2 │ │ lsls r0, r4, #6 │ │ lsrs r1, r2, #32 │ │ - b.n 9be26 │ │ + b.n 9be32 │ │ adds r0, #2 │ │ lsls r0, r4, #6 │ │ lsrs r1, r2, #32 │ │ - b.n 9bb94 │ │ + b.n 9bba0 │ │ lsrs r1, r2, #32 │ │ - b.n 9be32 │ │ + b.n 9be3e │ │ adds r1, r0, r0 │ │ - b.n 9be9c │ │ + b.n 9bea8 │ │ movs r3, r0 │ │ - b.n 9bada │ │ + b.n 9bae6 │ │ lsls r1, r0, #24 │ │ asrs r1, r0, #9 │ │ asrs r6, r0, #28 │ │ - b.n 9bba8 │ │ + b.n 9bbb4 │ │ lsls r6, r0, #28 │ │ - b.n 9be48 │ │ + b.n 9be54 │ │ movs r3, r0 │ │ asrs r0, r4, #6 │ │ lsrs r1, r2, #32 │ │ - b.n 9bdce │ │ + b.n 9bdda │ │ lsls r1, r0, #28 │ │ asrs r0, r0, #14 │ │ vrhadd.u16 d14, d14, d31 │ │ - ldr r5, [pc, #960] @ (9bb78 ) │ │ + ldr r5, [pc, #960] @ (9bb84 ) │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n 9bcd8 │ │ - beq.n 9b7e0 │ │ - b.n 9bc5c │ │ + b.n 9bce4 │ │ + beq.n 9b7ec │ │ + b.n 9bc68 │ │ ands r0, r0 │ │ - b.n 9bb06 │ │ + b.n 9bb12 │ │ lsls r4, r0, #2 │ │ - b.n 9b2ea │ │ + b.n 9b2f6 │ │ movs r0, r0 │ │ - b.n 9be6e │ │ + b.n 9be7a │ │ asrs r0, r0, #32 │ │ asrs r0, r4, #14 │ │ asrs r4, r1, #32 │ │ asrs r0, r0, #22 │ │ lsls r0, r1, #1 │ │ - b.n 9b302 │ │ + b.n 9b30e │ │ lsrs r5, r0, #20 │ │ - b.n 9bcde │ │ - blx ffd5ade0 │ │ + b.n 9bcea │ │ + blx ffd5bdec │ │ movs r0, r0 │ │ - b.n 9be86 │ │ + b.n 9be92 │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ - beq.n 9b81c │ │ - b.n 9bc84 │ │ + beq.n 9b828 │ │ + b.n 9bc90 │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {pc} │ │ - b.n 9bb36 │ │ - blx ffd58df8 │ │ + b.n 9bb42 │ │ + blx ffd59e04 │ │ strb r0, [r5, #1] │ │ - b.n 9b326 │ │ + b.n 9b332 │ │ str r0, [r0, r0] │ │ - b.n 9bb42 │ │ - b.n 9b814 │ │ - b.n 9bb46 │ │ + b.n 9bb4e │ │ + b.n 9b820 │ │ + b.n 9bb52 │ │ movs r7, r0 │ │ - b.n 9baaa │ │ + b.n 9bab6 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ lsls r0, r7, #1 │ │ - b.n 9b350 │ │ + b.n 9b35c │ │ movs r0, r0 │ │ - b.n 9b934 │ │ + b.n 9b940 │ │ lsls r2, r3, #1 │ │ - b.n 9b3ba │ │ + b.n 9b3c6 │ │ movs r3, r0 │ │ - b.n 9bebe │ │ + b.n 9beca │ │ movs r4, r2 │ │ subs r2, #0 │ │ asrs r0, r5, #1 │ │ - b.n 9b364 │ │ + b.n 9b370 │ │ adds r0, #104 @ 0x68 │ │ - b.n 9b368 │ │ + b.n 9b374 │ │ stmia r0!, {r3, r5, r6} │ │ - b.n 9b36c │ │ + b.n 9b378 │ │ asrs r1, r0, #32 │ │ - b.n 9b950 │ │ + b.n 9b95c │ │ movs r0, r6 │ │ - b.n 9b35e │ │ + b.n 9b36a │ │ adds r0, #3 │ │ - b.n 9b958 │ │ + b.n 9b964 │ │ str r0, [r1, #4] │ │ - b.n 9b366 │ │ + b.n 9b372 │ │ stmia r0!, {r2, r3} │ │ - b.n 9b960 │ │ + b.n 9b96c │ │ movs r0, #84 @ 0x54 │ │ - b.n 9b384 │ │ + b.n 9b390 │ │ movs r0, r0 │ │ - b.n 9baf6 │ │ + b.n 9bb02 │ │ ands r0, r0 │ │ - b.n 9b368 │ │ + b.n 9b374 │ │ movs r0, #2 │ │ - b.n 9b970 │ │ + b.n 9b97c │ │ movs r0, #12 │ │ lsls r0, r4, #6 │ │ movs r7, r0 │ │ - b.n 9b904 │ │ + b.n 9b910 │ │ eors r4, r0 │ │ @ instruction: 0xe98d0003 │ │ asrs r0, r0, #12 │ │ cmp r7, #205 @ 0xcd │ │ - b.n 9bfa6 │ │ + b.n 9bfb2 │ │ mcr2 11, 3, lr, cr15, cr15, {7} @ │ │ - b.n 9b87c │ │ - b.n 9bbae │ │ + b.n 9b888 │ │ + b.n 9bbba │ │ movs r7, r0 │ │ - b.n 9bb1c │ │ + b.n 9bb28 │ │ @ instruction: 0xffdc1aff │ │ movs r4, r4 │ │ - b.n 9b3b8 │ │ + b.n 9b3c4 │ │ movs r0, #14 │ │ - b.n 9bbbe │ │ + b.n 9bbca │ │ asrs r0, r4, #32 │ │ - b.n 9b3c0 │ │ + b.n 9b3cc │ │ movs r0, r0 │ │ - b.n 9b9a4 │ │ + b.n 9b9b0 │ │ asrs r1, r0, #32 │ │ - b.n 9b9a8 │ │ + b.n 9b9b4 │ │ lsls r6, r6, #19 │ │ - add.w r0, r0, r8, ror #12 │ │ + add.w r0, r0, ip, lsl #13 │ │ movs r4, r0 │ │ - b.n 9b2dc │ │ - vqrdmulh.s q9, q11, d1[0] │ │ - vcvtp.u16.f16 d31, d8 │ │ - vqshl.u32 q8, q2, #22 │ │ - vcvta.s16.f16 q8, │ │ - vshr.u32 q10, , #9 │ │ + b.n 9b47a │ │ + @ instruction: 0xfff62f8f │ │ + vsra.u64 , q10, #9 │ │ + vqshl.u32 d16, d10, #22 │ │ + vcvta.s16.f16 d16, d29 │ │ + vshr.u64 q10, , #9 │ │ @ instruction: 0xfff74bf0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n 9bdcc │ │ - beq.n 9b994 │ │ - b.n 9bd50 │ │ + b.n 9bdd8 │ │ + beq.n 9b9a0 │ │ + b.n 9bd5c │ │ str r0, [r0, r0] │ │ - b.n 9bbfa │ │ + b.n 9bc06 │ │ movs r4, r0 │ │ - b.n 9b3de │ │ + b.n 9b3ea │ │ str r0, [r0, #124] @ 0x7c │ │ - b.n 9bed2 │ │ + b.n 9bede │ │ ldr r7, [r7, #124] @ 0x7c │ │ - b.n 9bf64 │ │ + b.n 9bf70 │ │ movs r4, r0 │ │ - b.n 9beea │ │ + b.n 9bef6 │ │ lsls r7, r3, #2 │ │ subs r0, r0, r0 │ │ str r0, [sp, #8] │ │ - b.n 9bc12 │ │ + b.n 9bc1e │ │ ands r1, r0 │ │ - b.n 9bc16 │ │ + b.n 9bc22 │ │ lsrs r2, r0, #32 │ │ - b.n 9befa │ │ + b.n 9bf06 │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ movs r0, r5 │ │ - b.n 9bf14 │ │ + b.n 9bf20 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ str r6, [r2, #0] │ │ - b.n 9c02a │ │ + b.n 9c036 │ │ lsls r2, r2, #2 │ │ and.w r0, r0, r8 │ │ - b.n 9bf24 │ │ + b.n 9bf30 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ movs r5, r0 │ │ - b.n 9bc3a │ │ + b.n 9bc46 │ │ asrs r1, r0, #32 │ │ - b.n 9c03e │ │ - subs r6, #136 @ 0x88 │ │ + b.n 9c04a │ │ + subs r6, #137 @ 0x89 │ │ add.w r0, r0, r0 │ │ - b.n 9bfa6 │ │ + b.n 9bfb2 │ │ lsls r6, r1, #2 │ │ subs r0, r0, r0 │ │ asrs r0, r1, #32 │ │ - b.n 9be28 │ │ + b.n 9be34 │ │ movs r4, r0 │ │ - b.n 9bc52 │ │ - blx ffcb5f14 │ │ + b.n 9bc5e │ │ + blx ffcb6f20 │ │ movs r0, r0 │ │ - b.n 9bfba │ │ + b.n 9bfc6 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ - blx 466f20 │ │ + blx 467f2c │ │ str r0, [r0, #0] │ │ - b.n 9b446 │ │ + b.n 9b452 │ │ movs r1, r0 │ │ - b.n 9bdb6 │ │ + b.n 9bdc2 │ │ movs r2, r0 │ │ - b.n 9c00e │ │ + b.n 9c01a │ │ lsls r1, r0, #2 │ │ subs r2, #0 │ │ strh r1, [r0, #0] │ │ - b.n 9c076 │ │ + b.n 9c082 │ │ movs r0, r0 │ │ - b.n 9bfe6 │ │ + b.n 9bff2 │ │ movs r4, r2 │ │ subs r0, r0, r0 │ │ movs r4, r1 │ │ and.w r0, r0, r8, lsr #32 │ │ - b.n 9b480 │ │ + b.n 9b48c │ │ lsrs r7, r1, #8 │ │ - b.n 9bd4a │ │ + b.n 9bd56 │ │ lsrs r1, r0, #8 │ │ - b.n 9bdce │ │ + b.n 9bdda │ │ lsls r0, r4, #24 │ │ - b.n 9bc92 │ │ + b.n 9bc9e │ │ movs r3, r1 │ │ - b.n 9bff6 │ │ + b.n 9c002 │ │ lsls r7, r6, #1 │ │ ldrh r0, [r0, #16] │ │ strh r1, [r0, #0] │ │ - b.n 9c09e │ │ + b.n 9c0aa │ │ adds r3, r0, r0 │ │ - b.n 9bf62 │ │ + b.n 9bf6e │ │ movs r0, r3 │ │ - b.n 9bb88 │ │ + b.n 9bb94 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ asrs r0, r4, #2 │ │ - b.n 9c0ae │ │ + b.n 9c0ba │ │ movs r0, r3 │ │ - b.n 9bb94 │ │ + b.n 9bba0 │ │ lsls r0, r6, #1 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n 9bcba │ │ + b.n 9bcc6 │ │ movs r0, #0 │ │ - b.n 9c0be │ │ + b.n 9c0ca │ │ adds r0, #0 │ │ - b.n 9c0c2 │ │ + b.n 9c0ce │ │ strh r0, [r0, #0] │ │ - b.n 9c0c6 │ │ - ldrh r1, [r1, r2] │ │ + b.n 9c0d2 │ │ + ldrh r2, [r1, r2] │ │ add.w r0, r0, r0 │ │ - b.n 9c02e │ │ + b.n 9c03a │ │ lsls r4, r5, #1 │ │ subs r0, r0, r0 │ │ lsls r4, r7, #6 │ │ - b.n 9b4d4 │ │ + b.n 9b4e0 │ │ subs r7, #255 @ 0xff │ │ - b.n 9bfb8 │ │ + b.n 9bfc4 │ │ strb r0, [r0, #1] │ │ - b.n 9b4c8 │ │ + b.n 9b4d4 │ │ movs r0, #0 │ │ - b.n 9c0e2 │ │ + b.n 9c0ee │ │ movs r0, r0 │ │ - b.n 9bac4 │ │ + b.n 9bad0 │ │ adds r0, #15 │ │ - b.n 9c02a │ │ + b.n 9c036 │ │ subs r2, #25 │ │ - b.n 9b956 │ │ + b.n 9b962 │ │ asrs r0, r2, #1 │ │ - b.n 9b4d2 │ │ + b.n 9b4de │ │ lsls r4, r3, #1 │ │ - b.n 9b564 │ │ + b.n 9b570 │ │ movs r0, #8 │ │ - b.n 9b4d4 │ │ + b.n 9b4e0 │ │ movs r0, #3 │ │ - b.n 9c0fe │ │ + b.n 9c10a │ │ adds r0, #3 │ │ - b.n 9bac4 │ │ + b.n 9bad0 │ │ movs r2, r2 │ │ - b.n 9bac8 │ │ + b.n 9bad4 │ │ movs r0, #0 │ │ - b.n 9be8c │ │ + b.n 9be98 │ │ movs r1, r0 │ │ - b.n 9be4e │ │ + b.n 9be5a │ │ movs r2, r0 │ │ - b.n 9b9d2 │ │ + b.n 9b9de │ │ movs r0, #2 │ │ - b.n 9b9dc │ │ + b.n 9b9e8 │ │ movs r0, #2 │ │ - b.n 9bada │ │ + b.n 9bae6 │ │ movs r0, r1 │ │ - b.n 9bef8 │ │ - blx 442fe0 │ │ + b.n 9bf04 │ │ + blx 443fec │ │ movs r0, r0 │ │ - b.n 9c086 │ │ + b.n 9c092 │ │ lsls r6, r2, #1 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n 9c09e │ │ + b.n 9c0aa │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ asrs r4, r3, #1 │ │ - b.n 9b5a4 │ │ + b.n 9b5b0 │ │ str r3, [r0, #0] │ │ - b.n 9c13a │ │ + b.n 9c146 │ │ movs r0, r1 │ │ - b.n 9b538 │ │ + b.n 9b544 │ │ movs r0, #255 @ 0xff │ │ - b.n 9c142 │ │ + b.n 9c14e │ │ asrs r6, r2, #4 │ │ - b.n 9bd46 │ │ - b.n 9b55a │ │ - @ instruction: 0xfb00005c │ │ - b.n 9b5bc │ │ + b.n 9bd52 │ │ + b.n 9b652 │ │ + @ instruction: 0xfa00005c │ │ + b.n 9b5c8 │ │ asrs r0, r1, #32 │ │ - b.n 9b54c │ │ + b.n 9b558 │ │ movs r0, #22 │ │ - b.n 9bd56 │ │ + b.n 9bd62 │ │ movs r4, r0 │ │ - b.n 9bd5a │ │ - ldrh r2, [r6, r1] │ │ + b.n 9bd66 │ │ + ldrh r3, [r6, r1] │ │ add.w r0, r0, r0 │ │ - b.n 9c0c2 │ │ + b.n 9c0ce │ │ movs r1, r3 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n 9bd6a │ │ + b.n 9bd76 │ │ asrs r0, r0, #32 │ │ - b.n 9c16e │ │ - subs r7, #24 │ │ + b.n 9c17a │ │ + subs r7, #25 │ │ add.w r0, r0, r0 │ │ - b.n 9c0d6 │ │ + b.n 9c0e2 │ │ movs r4, r2 │ │ subs r0, r0, r0 │ │ asrs r4, r3, #1 │ │ - b.n 9b5ec │ │ + b.n 9b5f8 │ │ movs r0, #3 │ │ - b.n 9c182 │ │ + b.n 9c18e │ │ movs r0, r1 │ │ - b.n 9b580 │ │ + b.n 9b58c │ │ asrs r2, r2, #4 │ │ - b.n 9bd8a │ │ - b.n 9b6dc │ │ - @ instruction: 0xfa000104 │ │ - b.n 9b590 │ │ + b.n 9bd96 │ │ + b.n 9b64a │ │ + mla r1, r0, r4, r0 │ │ + b.n 9b59c │ │ movs r1, r0 │ │ - b.n 9c088 │ │ + b.n 9c094 │ │ adds r0, #8 │ │ - b.n 9b594 │ │ + b.n 9b5a0 │ │ asrs r5, r0, #32 │ │ - b.n 9bd9e │ │ + b.n 9bdaa │ │ str r0, [r7, #12] │ │ - b.n 9b5a0 │ │ + b.n 9b5ac │ │ movs r0, r0 │ │ - b.n 9bb84 │ │ + b.n 9bb90 │ │ movs r0, #4 │ │ - b.n 9bdaa │ │ + b.n 9bdb6 │ │ strh r0, [r6, #6] │ │ - b.n 9be08 │ │ + b.n 9be14 │ │ str r6, [r0, #0] │ │ - b.n 9bb90 │ │ + b.n 9bb9c │ │ str r0, [r0, #0] │ │ asrs r0, r4, #6 │ │ movs r7, r0 │ │ - b.n 9bdba │ │ + b.n 9bdc6 │ │ vrhadd.u d14, d6, d31 │ │ movs r0, r0 │ │ - b.n 9c122 │ │ + b.n 9c12e │ │ movs r5, r0 │ │ lsls r0, r4, #6 │ │ asrs r0, r0, #32 │ │ lsls r0, r4, #14 │ │ - subs r7, #1 │ │ + subs r7, #2 │ │ lsrs r0, r0, #12 │ │ str r0, [r0, #0] │ │ - b.n 9bdd2 │ │ + b.n 9bdde │ │ movs r6, r0 │ │ - b.n 9b640 │ │ + b.n 9b64c │ │ movs r2, r0 │ │ - b.n 9c0ba │ │ + b.n 9c0c6 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r1 │ │ - b.n 9c0d4 │ │ + b.n 9c0e0 │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n 9c0dc │ │ + b.n 9c0e8 │ │ movs r5, r0 │ │ asrs r0, r4, #6 │ │ subs r2, #209 @ 0xd1 │ │ subs r0, r0, r4 │ │ movs r2, r0 │ │ and.w r0, r0, r5 │ │ - b.n 9bdfa │ │ + b.n 9be06 │ │ asrs r1, r0, #32 │ │ - b.n 9c1fe │ │ - subs r6, #24 │ │ + b.n 9c20a │ │ + subs r6, #25 │ │ add.w r0, r0, r0 │ │ - b.n 9c172 │ │ + b.n 9c17e │ │ movs r6, r0 │ │ - b.n 9be0a │ │ + b.n 9be16 │ │ movs r1, r0 │ │ asrs r0, r0, #12 │ │ movs r0, r0 │ │ - b.n 9be02 │ │ + b.n 9be0e │ │ movs r6, r2 │ │ subs r0, r0, r0 │ │ str r4, [r0, r0] │ │ - b.n 9bf0c │ │ + b.n 9bf18 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n 9be22 │ │ + b.n 9be2e │ │ asrs r6, r0, #32 │ │ - b.n 9c226 │ │ - ldrb r1, [r6, r5] │ │ + b.n 9c232 │ │ + ldrb r2, [r6, r5] │ │ add.w r0, r0, r0 │ │ - b.n 9c18e │ │ + b.n 9c19a │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ lsls r4, r3, #1 │ │ - b.n 9b6a4 │ │ + b.n 9b6b0 │ │ movs r0, #0 │ │ - b.n 9c23a │ │ + b.n 9c246 │ │ asrs r0, r1, #32 │ │ - b.n 9b638 │ │ + b.n 9b644 │ │ movs r0, #0 │ │ - b.n 9b61c │ │ + b.n 9b628 │ │ movs r0, #4 │ │ - b.n 9b620 │ │ + b.n 9b62c │ │ movs r0, #3 │ │ - b.n 9c24a │ │ + b.n 9c256 │ │ movs r0, #18 │ │ - b.n 9be4e │ │ + b.n 9be5a │ │ movs r4, r0 │ │ - b.n 9be52 │ │ - ldrb r3, [r1, r6] │ │ + b.n 9be5e │ │ + ldrb r4, [r1, r6] │ │ add.w r0, r0, r0, lsl #24 │ │ - b.n 9be5a │ │ + b.n 9be66 │ │ movs r5, r0 │ │ - b.n 9be3e │ │ + b.n 9be4a │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n 9be66 │ │ + b.n 9be72 │ │ asrs r2, r1, #32 │ │ - b.n 9c26a │ │ - ldrb r0, [r4, r5] │ │ + b.n 9c276 │ │ + ldrb r1, [r4, r5] │ │ add.w r0, r0, r0, lsl #24 │ │ - b.n 9be72 │ │ + b.n 9be7e │ │ movs r0, r1 │ │ - b.n 9b670 │ │ - blx 3bd138 │ │ + b.n 9b67c │ │ + blx 3be144 │ │ movs r6, r0 │ │ - b.n 9be7e │ │ - beq.n 9bb70 │ │ - b.n 9bfd8 │ │ + b.n 9be8a │ │ + beq.n 9bb7c │ │ + b.n 9bfe4 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {sp, lr} │ │ - b.n 9be8a │ │ + b.n 9be96 │ │ @ instruction: 0xfffaeaff │ │ str r2, [r0, #0] │ │ - b.n 9c25e │ │ + b.n 9c26a │ │ @ instruction: 0xfff8eaff │ │ - cmp r6, #168 @ 0xa8 │ │ + cmp r6, #188 @ 0xbc │ │ movs r4, r0 │ │ - ldr r4, [r7, #28] │ │ + ldr r0, [r0, #32] │ │ movs r1, r0 │ │ - strb r4, [r1, #5] │ │ + strb r0, [r2, #5] │ │ movs r1, r0 │ │ - ldr r4, [pc, #64] @ (9bba4 ) │ │ + ldr r4, [pc, #64] @ (9bbb0 ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n 9c084 │ │ + b.n 9c090 │ │ movs r0, r0 │ │ - b.n 9c20e │ │ + b.n 9c21a │ │ movs r7, r3 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n 9b696 │ │ - ldr r1, [pc, #176] @ (9bc28 ) │ │ - b.n 9c18a │ │ + b.n 9b6a2 │ │ + ldr r1, [pc, #176] @ (9bc34 ) │ │ + b.n 9c196 │ │ cmp r2, #49 @ 0x31 │ │ - b.n 9c184 │ │ - ldr r7, [pc, #1020] @ (9bf7c ) │ │ - b.n 9c220 │ │ + b.n 9c190 │ │ + ldr r7, [pc, #1020] @ (9bf88 ) │ │ + b.n 9c22c │ │ movs r3, #213 @ 0xd5 │ │ - b.n 9c208 │ │ + b.n 9c214 │ │ movs r2, r0 │ │ - b.n 9be2c │ │ + b.n 9be38 │ │ movs r1, r3 │ │ subs r0, r0, r0 │ │ asrs r0, r0, #1 │ │ - b.n 9b6b2 │ │ + b.n 9b6be │ │ movs r0, r0 │ │ - b.n 9c238 │ │ + b.n 9c244 │ │ movs r5, r3 │ │ lsrs r0, r0, #8 │ │ movs r0, #0 │ │ - b.n 9b6c0 │ │ + b.n 9b6cc │ │ adds r6, #65 @ 0x41 │ │ - b.n 9c1b4 │ │ + b.n 9c1c0 │ │ subs r2, #137 @ 0x89 │ │ - b.n 9c228 │ │ + b.n 9c234 │ │ movs r3, r0 │ │ - b.n 9be4e │ │ + b.n 9be5a │ │ movs r4, r3 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #32 │ │ - b.n 9b6d4 │ │ + b.n 9b6e0 │ │ movs r0, r0 │ │ - b.n 9c258 │ │ + b.n 9c264 │ │ movs r7, r2 │ │ - ldr r2, [pc, #0] @ (9bbb8 ) │ │ + ldr r2, [pc, #0] @ (9bbc4 ) │ │ lsls r2, r0, #8 │ │ - b.n 9c1e0 │ │ + b.n 9c1ec │ │ movs r6, r3 │ │ lsrs r0, r0, #8 │ │ movs r2, #181 @ 0xb5 │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n 9bf0a │ │ + b.n 9bf16 │ │ movs r0, r0 │ │ - b.n 9c30e │ │ + b.n 9c31a │ │ movs r0, r0 │ │ - b.n 9c27a │ │ + b.n 9c286 │ │ ldrh r0, [r2, #32] │ │ lsrs r5, r7, #2 │ │ asrs r0, r6, #1 │ │ - b.n 9b718 │ │ + b.n 9b724 │ │ movs r4, r0 │ │ - b.n 9bf1e │ │ + b.n 9bf2a │ │ movs r0, #115 @ 0x73 │ │ - b.n 9c322 │ │ + b.n 9c32e │ │ asrs r1, r0, #32 │ │ - b.n 9bd04 │ │ - ldr r1, [r6, r6] │ │ + b.n 9bd10 │ │ + ldr r2, [r6, r6] │ │ add.w r0, r0, r4 │ │ - b.n 9bf2e │ │ + b.n 9bf3a │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r1, r2, r4, lr} │ │ - b.n 9c336 │ │ + b.n 9c342 │ │ asrs r0, r1, #1 │ │ - b.n 9b738 │ │ + b.n 9b744 │ │ movs r4, r0 │ │ - b.n 9bf3e │ │ + b.n 9bf4a │ │ movs r0, #101 @ 0x65 │ │ - b.n 9c342 │ │ + b.n 9c34e │ │ asrs r1, r0, #32 │ │ - b.n 9bd24 │ │ - ldr r1, [r5, r6] │ │ + b.n 9bd30 │ │ + ldr r2, [r5, r6] │ │ add.w r0, r0, r4 │ │ - b.n 9bf4e │ │ + b.n 9bf5a │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r1, r2, r4, lr} │ │ - b.n 9c356 │ │ + b.n 9c362 │ │ movs r1, r0 │ │ and.w r7, r0, r5, ror #18 │ │ - b.n 9c22e │ │ - ldr r7, [pc, #1020] @ (9c01c ) │ │ - b.n 9c2c0 │ │ + b.n 9c23a │ │ + ldr r7, [pc, #1020] @ (9c028 ) │ │ + b.n 9c2cc │ │ asrs r0, r4, #32 │ │ - b.n 9b764 │ │ + b.n 9b770 │ │ movs r4, r0 │ │ - b.n 9bf6a │ │ + b.n 9bf76 │ │ movs r0, #105 @ 0x69 │ │ - b.n 9c36e │ │ + b.n 9c37a │ │ asrs r1, r0, #32 │ │ - b.n 9bd50 │ │ - ldr r6, [r3, r6] │ │ + b.n 9bd5c │ │ + ldr r7, [r3, r6] │ │ add.w r0, r0, r4 │ │ - b.n 9bf7a │ │ + b.n 9bf86 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r0, lr} │ │ - b.n 9c382 │ │ + b.n 9c38e │ │ @ instruction: 0xfff6eaff │ │ - subs r2, #68 @ 0x44 │ │ - vshll.u32 , d8, #23 │ │ - vtbx.8 d19, {d7-d9}, d20 │ │ + subs r2, #206 @ 0xce │ │ + vtbl.8 d19, {d23-d25}, d18 │ │ + vtbx.8 d19, {d23-d25}, d30 │ │ @ instruction: 0xfff74ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n 9c174 │ │ - beq.n 9bcb4 │ │ - b.n 9c0f8 │ │ + b.n 9c180 │ │ + beq.n 9bcc0 │ │ + b.n 9c104 │ │ movs r0, r0 │ │ - b.n 9c304 │ │ + b.n 9c310 │ │ strb r6, [r2, #0] │ │ - b.n 9c3a6 │ │ + b.n 9c3b2 │ │ str r0, [sp, #0] │ │ asrs r0, r4, #6 │ │ movs r0, r0 │ │ asrs r1, r2, #23 │ │ - add r0, pc, #4 @ (adr r0, 9bc74 ) │ │ + add r0, pc, #4 @ (adr r0, 9bc80 ) │ │ asrs r0, r4, #6 │ │ movs r0, r0 │ │ asrs r0, r2, #13 │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ movs r7, r0 │ │ - b.n 9bfbe │ │ - beq.n 9bcb8 │ │ - b.n 9c118 │ │ + b.n 9bfca │ │ + beq.n 9bcc4 │ │ + b.n 9c124 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {} │ │ - b.n 9c44a │ │ + b.n 9c456 │ │ asrs r0, r0, #1 │ │ - b.n 9b7c0 │ │ + b.n 9b7cc │ │ movs r0, r4 │ │ - b.n 9b6a8 │ │ + b.n 9b6b4 │ │ lsrs r3, r3, #24 │ │ - b.n 9c3d6 │ │ + b.n 9c3e2 │ │ movs r0, r0 │ │ - b.n 9b7b4 │ │ + b.n 9b7c0 │ │ movs r6, r0 │ │ - b.n 9c3de │ │ + b.n 9c3ea │ │ lsls r0, r0, #1 │ │ - b.n 9c2c6 │ │ + b.n 9c2d2 │ │ adds r0, #32 │ │ - b.n 9c13c │ │ + b.n 9c148 │ │ strh r2, [r0, #0] │ │ - b.n 9bfea │ │ + b.n 9bff6 │ │ movs r5, r0 │ │ lsls r0, r0, #12 │ │ movs r0, #10 │ │ - b.n 9bff2 │ │ + b.n 9bffe │ │ subs r5, r1, #2 │ │ add.w r0, r0, r0 │ │ - b.n 9c35a │ │ + b.n 9c366 │ │ lsls r0, r5, #2 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n 9c2c2 │ │ + b.n 9c2ce │ │ strb r0, [r4, #0] │ │ - b.n 9b6fc │ │ + b.n 9b708 │ │ lsrs r0, r6, #31 │ │ - b.n 9c358 │ │ + b.n 9c364 │ │ movs r0, #24 │ │ - b.n 9c1e8 │ │ + b.n 9c1f4 │ │ movs r0, r4 │ │ - b.n 9b7ec │ │ + b.n 9b7f8 │ │ movs r1, r0 │ │ - b.n 9c416 │ │ + b.n 9c422 │ │ str r0, [r0, #0] │ │ - b.n 9c41a │ │ + b.n 9c426 │ │ movs r0, r3 │ │ - b.n 9b7f8 │ │ + b.n 9b804 │ │ movs r7, r0 │ │ - b.n 9c022 │ │ + b.n 9c02e │ │ asrs r6, r0, #32 │ │ - b.n 9c426 │ │ + b.n 9c432 │ │ str r4, [r3, #0] │ │ - b.n 9b804 │ │ + b.n 9b810 │ │ str r4, [r4, #0] │ │ - b.n 9b808 │ │ - blx 41f2f0 │ │ + b.n 9b814 │ │ + blx 4202fc │ │ movs r0, r0 │ │ - b.n 9c396 │ │ + b.n 9c3a2 │ │ ands r0, r0 │ │ - b.n 9c43a │ │ + b.n 9c446 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ - blx 36f300 │ │ + blx 37030c │ │ ands r0, r0 │ │ - b.n 9b826 │ │ + b.n 9b832 │ │ movs r7, r0 │ │ - b.n 9c04a │ │ + b.n 9c056 │ │ asrs r6, r0, #32 │ │ - b.n 9c44e │ │ - blx 41b310 │ │ + b.n 9c45a │ │ + blx 41c31c │ │ movs r0, r0 │ │ - b.n 9c3b6 │ │ + b.n 9c3c2 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ - blx 36831c │ │ + blx 369328 │ │ str r0, [r0, #0] │ │ - b.n 9b842 │ │ + b.n 9b84e │ │ movs r6, r0 │ │ - b.n 9c04e │ │ + b.n 9c05a │ │ movs r7, r7 │ │ lsrs r0, r0, #8 │ │ movs r7, r0 │ │ - b.n 9c06e │ │ + b.n 9c07a │ │ asrs r0, r0, #32 │ │ - b.n 9c472 │ │ - str r0, [sp, #932] @ 0x3a4 │ │ + b.n 9c47e │ │ + str r0, [sp, #936] @ 0x3a8 │ │ add.w r0, r0, r0 │ │ - b.n 9c3e2 │ │ + b.n 9c3ee │ │ movs r7, r2 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n 9c3ee │ │ + b.n 9c3fa │ │ movs r1, r0 │ │ lsls r0, r6, #13 │ │ movs r5, r3 │ │ lsrs r0, r0, #8 │ │ asrs r4, r5, #8 │ │ - b.n 9b88c │ │ + b.n 9b898 │ │ asrs r1, r0, #32 │ │ - b.n 9be70 │ │ + b.n 9be7c │ │ asrs r2, r3, #1 │ │ - b.n 9b8f8 │ │ + b.n 9b904 │ │ movs r0, r0 │ │ - b.n 9c3fc │ │ + b.n 9c408 │ │ lsls r3, r3, #1 │ │ subs r0, r0, r0 │ │ movs r5, r4 │ │ - b.n 9c40a │ │ + b.n 9c416 │ │ str r5, [r4, r0] │ │ - b.n 9c4a6 │ │ + b.n 9c4b2 │ │ movs r5, r4 │ │ asrs r6, r2, #13 │ │ movs r4, r7 │ │ lsrs r0, r0, #8 │ │ movs r3, r1 │ │ - b.n 9c41a │ │ + b.n 9c426 │ │ str r3, [r1, r0] │ │ - b.n 9c4b6 │ │ + b.n 9c4c2 │ │ movs r3, r1 │ │ asrs r6, r2, #13 │ │ movs r0, r7 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n 9c42a │ │ + b.n 9c436 │ │ movs r3, r6 │ │ lsrs r0, r0, #8 │ │ lsls r6, r3, #1 │ │ - b.n 9c432 │ │ + b.n 9c43e │ │ lsls r2, r3, #1 │ │ ldmia r2!, {} │ │ movs r1, r0 │ │ - b.n 9c47a │ │ + b.n 9c486 │ │ movs r7, r5 │ │ lsrs r0, r0, #8 │ │ movs r6, r4 │ │ - b.n 9c442 │ │ + b.n 9c44e │ │ lsls r1, r3, #1 │ │ and.w r0, r0, r5, asr #32 │ │ - b.n 9c44e │ │ + b.n 9c45a │ │ movs r6, r4 │ │ - bge.n 9bda6 │ │ + bge.n 9bdb2 │ │ movs r6, r4 │ │ - b.n 9c456 │ │ + b.n 9c462 │ │ lsls r1, r7, #1 │ │ asrs r6, r2, #13 │ │ lsls r3, r0, #1 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n 9c456 │ │ + b.n 9c462 │ │ lsls r5, r2, #1 │ │ subs r0, r0, r0 │ │ str r6, [r0, r0] │ │ - b.n 9c0fe │ │ + b.n 9c10a │ │ movs r7, r4 │ │ and.w r0, r0, lr, lsr #1 │ │ - b.n 9c46e │ │ + b.n 9c47a │ │ movs r1, r7 │ │ ldmia r2!, {} │ │ movs r1, r0 │ │ - b.n 9c4b6 │ │ + b.n 9c4c2 │ │ movs r6, r4 │ │ asrs r4, r2, #13 │ │ @ instruction: 0xffdc1aff │ │ lsls r4, r5, #6 │ │ - b.n 9b918 │ │ + b.n 9b924 │ │ movs r0, r0 │ │ - b.n 9befc │ │ + b.n 9bf08 │ │ lsls r2, r3, #1 │ │ - b.n 9b982 │ │ + b.n 9b98e │ │ movs r2, r0 │ │ - b.n 9c486 │ │ + b.n 9c492 │ │ movs r7, r1 │ │ subs r2, #0 │ │ asrs r4, r3, #6 │ │ - b.n 9b92c │ │ + b.n 9b938 │ │ str r0, [r0, #0] │ │ - b.n 9c5b2 │ │ + b.n 9c5be │ │ adds r1, #152 @ 0x98 │ │ - b.n 9b934 │ │ + b.n 9b940 │ │ lsls r0, r3, #6 │ │ - b.n 9b938 │ │ + b.n 9b944 │ │ asrs r1, r0, #32 │ │ - b.n 9bf1c │ │ + b.n 9bf28 │ │ movs r1, #148 @ 0x94 │ │ - b.n 9b940 │ │ + b.n 9b94c │ │ adds r0, #3 │ │ - b.n 9bf24 │ │ + b.n 9bf30 │ │ movs r0, r0 │ │ - b.n 9bf28 │ │ + b.n 9bf34 │ │ ands r0, r1 │ │ - b.n 9b928 │ │ + b.n 9b934 │ │ movs r0, #2 │ │ - b.n 9bf30 │ │ + b.n 9bf3c │ │ lsls r1, r0, #16 │ │ stmia.w sp, {r1} │ │ - b.n 9c55a │ │ + b.n 9c566 │ │ movs r0, #12 │ │ - b.n 9b938 │ │ + b.n 9b944 │ │ movs r3, #39 @ 0x27 │ │ - b.n 9c422 │ │ + b.n 9c42e │ │ str r0, [r2, #0] │ │ - b.n 9b940 │ │ - ldc2l 11, cr14, [pc], #1020 @ 9c224 @ │ │ + b.n 9b94c │ │ + ldc2l 11, cr14, [pc], #1020 @ 9c230 @ │ │ movs r1, r1 │ │ - b.n 9c16e │ │ + b.n 9c17a │ │ asrs r7, r0, #32 │ │ - b.n 9c172 │ │ + b.n 9c17e │ │ movs r0, #8 │ │ - b.n 9c176 │ │ + b.n 9c182 │ │ mrc2 11, 4, lr, cr11, cr15, {7} @ │ │ str r0, [r0, r0] │ │ - b.n 9c17e │ │ + b.n 9c18a │ │ movs r7, r0 │ │ and.w r0, r0, r1 │ │ - b.n 9c532 │ │ + b.n 9c53e │ │ movs r3, r1 │ │ asrs r6, r2, #13 │ │ @ instruction: 0xffbb1aff │ │ movs r0, r0 │ │ - b.n 9c4f2 │ │ + b.n 9c4fe │ │ movs r6, r5 │ │ subs r0, r0, r0 │ │ str r6, [r0, r0] │ │ - b.n 9c19a │ │ + b.n 9c1a6 │ │ movs r0, r0 │ │ - b.n 9c508 │ │ + b.n 9c514 │ │ @ instruction: 0xfff10aff │ │ movs r1, r0 │ │ - b.n 9c554 │ │ + b.n 9c560 │ │ movs r7, r1 │ │ lsrs r0, r0, #8 │ │ movs r7, r0 │ │ - b.n 9c1ae │ │ - blx 367470 │ │ + b.n 9c1ba │ │ + blx 36847c │ │ strb r0, [r0, #0] │ │ - b.n 9c5b6 │ │ + b.n 9c5c2 │ │ movs r0, r0 │ │ - b.n 9c51a │ │ + b.n 9c526 │ │ ands r0, r0 │ │ - b.n 9c5be │ │ + b.n 9c5ca │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ - blx 30e484 │ │ + blx 30f490 │ │ ands r0, r0 │ │ - b.n 9b9aa │ │ + b.n 9b9b6 │ │ movs r0, r0 │ │ - b.n 9c538 │ │ + b.n 9c544 │ │ ands r5, r0 │ │ asrs r0, r4, #6 │ │ movs r0, r0 │ │ - b.n 9c53e │ │ + b.n 9c54a │ │ vpmin.u q8, , │ │ movs r2, r1 │ │ - b.n 9c1de │ │ - blx 38b4a0 │ │ + b.n 9c1ea │ │ + blx 38c4ac │ │ strb r4, [r0, #0] │ │ - b.n 9c1e6 │ │ + b.n 9c1f2 │ │ vpmin.u q15, , │ │ strb r5, [r0, #0] │ │ - b.n 9c1ee │ │ + b.n 9c1fa │ │ vpmin.u q15, , │ │ lsls r1, r7, #1 │ │ - b.n 9c55e │ │ + b.n 9c56a │ │ lsls r7, r3, #1 │ │ asrs r4, r2, #13 │ │ @ instruction: 0xffa21aff │ │ @ instruction: 0xffc4eaff │ │ lsls r7, r3, #1 │ │ - b.n 9c572 │ │ + b.n 9c57e │ │ @ instruction: 0xffb90aff │ │ @ instruction: 0xff9beaff │ │ asrs r4, r5, #2 │ │ - b.n 9ba10 │ │ + b.n 9ba1c │ │ movs r3, #42 @ 0x2a │ │ - b.n 9c4d6 │ │ + b.n 9c4e2 │ │ adds r0, #168 @ 0xa8 │ │ - b.n 9ba18 │ │ + b.n 9ba24 │ │ asrs r1, r0, #32 │ │ - b.n 9bffc │ │ + b.n 9c008 │ │ movs r4, r1 │ │ - b.n 9b9fc │ │ + b.n 9ba08 │ │ adds r0, #3 │ │ - b.n 9c004 │ │ + b.n 9c010 │ │ movs r1, r0 │ │ - b.n 9c62a │ │ - add r0, pc, #0 @ (adr r0, 9beec ) │ │ - b.n 9ba08 │ │ + b.n 9c636 │ │ + add r0, pc, #0 @ (adr r0, 9bef8 ) │ │ + b.n 9ba14 │ │ lsls r0, r2, #1 │ │ @ instruction: 0xe98dfccc │ │ @ instruction: 0xebffff98 │ │ @ instruction: 0xeaff0079 │ │ - b.n 9c5a6 │ │ + b.n 9c5b2 │ │ @ instruction: 0xffd40aff │ │ lsls r7, r3, #1 │ │ - b.n 9c5ae │ │ + b.n 9c5ba │ │ str r4, [r0, r0] │ │ - b.n 9c24a │ │ + b.n 9c256 │ │ str r6, [r0, r0] │ │ lsls r0, r4, #6 │ │ @ instruction: 0xffd1eaff │ │ asrs r0, r2, #1 │ │ - b.n 9ba54 │ │ + b.n 9ba60 │ │ asrs r1, r0, #32 │ │ - b.n 9c038 │ │ + b.n 9c044 │ │ asrs r2, r3, #1 │ │ - b.n 9bac0 │ │ + b.n 9bacc │ │ movs r2, r0 │ │ - b.n 9c5c4 │ │ + b.n 9c5d0 │ │ @ instruction: 0xffc03aff │ │ asrs r0, r0, #1 │ │ - b.n 9ba68 │ │ + b.n 9ba74 │ │ adds r0, #64 @ 0x40 │ │ - b.n 9ba6c │ │ + b.n 9ba78 │ │ movs r0, #64 @ 0x40 │ │ - b.n 9ba70 │ │ + b.n 9ba7c │ │ asrs r1, r0, #32 │ │ - b.n 9c054 │ │ + b.n 9c060 │ │ str r4, [r7, r0] │ │ - b.n 9ba78 │ │ + b.n 9ba84 │ │ adds r0, #3 │ │ - b.n 9c05c │ │ + b.n 9c068 │ │ movs r0, #2 │ │ - b.n 9c060 │ │ + b.n 9c06c │ │ movs r0, r2 │ │ - b.n 9ba60 │ │ + b.n 9ba6c │ │ lsls r4, r0, #16 │ │ stmia.w sp, {r1} │ │ - b.n 9c68e │ │ + b.n 9c69a │ │ movs r3, #33 @ 0x21 │ │ - b.n 9c552 │ │ + b.n 9c55e │ │ str r5, [r0, r0] │ │ - b.n 9c074 │ │ + b.n 9c080 │ │ str r0, [r1, #0] │ │ - b.n 9ba74 │ │ + b.n 9ba80 │ │ str r4, [r1, r0] │ │ - b.n 9ba78 │ │ + b.n 9ba84 │ │ @ instruction: 0xffb0eaff │ │ strb r0, [r0, #0] │ │ - b.n 9c2a6 │ │ + b.n 9c2b2 │ │ vpmin.u8 q15, , │ │ - cmp r1, #52 @ 0x34 │ │ + cmp r1, #72 @ 0x48 │ │ movs r4, r0 │ │ - subs r0, #110 @ 0x6e │ │ - vrecpe.f16 d16, d14 │ │ - vtbl.8 d31, {d23-d24}, d2 │ │ - vrsra.u32 d17, d3, #10 │ │ - @ instruction: 0xfff72afc │ │ - movs r4, r0 │ │ - subs r0, #198 @ 0xc6 │ │ - vrsqrte.f16 d16, d23 │ │ - @ instruction: 0xfff72a70 │ │ - movs r4, r0 │ │ - subs r1, #166 @ 0xa6 │ │ - vcvt.f16.s16 q8, q3 │ │ - vsri.32 , , #9 │ │ - @ instruction: 0xfff7fab2 │ │ + subs r0, #248 @ 0xf8 │ │ + vsli.32 d16, d13, #23 │ │ + vtbx.8 d31, {d7-d8}, d22 │ │ + vrintn.f16 , │ │ + @ instruction: 0xfff72b10 │ │ + movs r4, r0 │ │ + subs r1, #80 @ 0x50 │ │ + vsli.64 d16, d22, #55 @ 0x37 │ │ + vtbl.8 d18, {d23-d25}, d4 │ │ + movs r4, r0 │ │ + subs r2, #48 @ 0x30 │ │ + vqshlu.s32 q8, , #23 │ │ + vsli.64 d17, d3, #55 @ 0x37 │ │ + @ instruction: 0xfff7fa96 │ │ @ instruction: 0xfff648f0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n 9c4c0 │ │ - beq.n 9bfb8 │ │ - b.n 9c444 │ │ + b.n 9c4cc │ │ + beq.n 9bfc4 │ │ + b.n 9c450 │ │ movs r0, r6 │ │ - b.n 9c5d2 │ │ + b.n 9c5de │ │ movs r2, r4 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n 9c656 │ │ + b.n 9c662 │ │ movs r6, r4 │ │ lsrs r0, r0, #8 │ │ str r1, [r0, r0] │ │ - b.n 9c2fe │ │ + b.n 9c30a │ │ asrs r0, r0, #32 │ │ - b.n 9bae2 │ │ + b.n 9baee │ │ str r2, [r0, #0] │ │ - b.n 9c306 │ │ + b.n 9c312 │ │ movs r6, #65 @ 0x41 │ │ - b.n 9c5dc │ │ + b.n 9c5e8 │ │ cmp r2, #137 @ 0x89 │ │ - b.n 9c650 │ │ + b.n 9c65c │ │ movs r2, r0 │ │ - b.n 9c274 │ │ + b.n 9c280 │ │ movs r1, r4 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #32 │ │ - b.n 9bafa │ │ + b.n 9bb06 │ │ movs r0, r0 │ │ - b.n 9c680 │ │ + b.n 9c68c │ │ movs r0, r4 │ │ - ldr r2, [pc, #0] @ (9bfe0 ) │ │ + ldr r2, [pc, #0] @ (9bfec ) │ │ lsls r2, r0, #8 │ │ - b.n 9c608 │ │ + b.n 9c614 │ │ movs r4, r6 │ │ lsrs r0, r0, #8 │ │ adds r0, #4 │ │ - b.n 9c508 │ │ + b.n 9c514 │ │ ands r0, r0 │ │ - b.n 9c732 │ │ + b.n 9c73e │ │ asrs r0, r0, #32 │ │ - b.n 9c736 │ │ + b.n 9c742 │ │ cmp r0, #2 │ │ - b.n 9c73a │ │ + b.n 9c746 │ │ ands r4, r0 │ │ - b.n 9bb18 │ │ + b.n 9bb24 │ │ ands r0, r0 │ │ - b.n 9bb1c │ │ - add r6, fp │ │ + b.n 9bb28 │ │ + add r7, fp │ │ add.w r0, r0, r0 │ │ - b.n 9c6aa │ │ + b.n 9c6b6 │ │ movs r5, r3 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n 9bb4c │ │ + b.n 9bb58 │ │ movs r0, #48 @ 0x30 │ │ - b.n 9c722 │ │ + b.n 9c72e │ │ asrs r5, r0, #32 │ │ - b.n 9c35a │ │ + b.n 9c366 │ │ vqrdmlah.s q7, q14, │ │ str r0, [r0, r0] │ │ - b.n 9c362 │ │ + b.n 9c36e │ │ movs r4, r0 │ │ - b.n 9bb60 │ │ + b.n 9bb6c │ │ mcr2 11, 6, lr, cr13, cr15, {7} @ │ │ movs r0, r0 │ │ - b.n 9c6d8 │ │ + b.n 9c6e4 │ │ movs r3, r3 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n 9c376 │ │ - beq.n 9c058 │ │ - b.n 9c4d0 │ │ + b.n 9c382 │ │ + beq.n 9c064 │ │ + b.n 9c4dc │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r7, ip} │ │ - b.n 9bb80 │ │ + b.n 9bb8c │ │ movs r6, r2 │ │ - b.n 9c786 │ │ + b.n 9c792 │ │ movs r3, #131 @ 0x83 │ │ - b.n 9c64a │ │ + b.n 9c656 │ │ ands r6, r2 │ │ - b.n 9c78e │ │ + b.n 9c79a │ │ asrs r1, r0, #32 │ │ - b.n 9c170 │ │ + b.n 9c17c │ │ movs r1, r1 │ │ and.w r0, r0, r6, lsr #16 │ │ - b.n 9c79a │ │ + b.n 9c7a6 │ │ movs r3, r0 │ │ and.w r9, r0, ip, asr #16 │ │ - b.n 9c672 │ │ + b.n 9c67e │ │ movs r0, r0 │ │ and.w r7, r0, r5, ror #18 │ │ - b.n 9c67a │ │ - ldr r7, [pc, #1020] @ (9c468 ) │ │ - b.n 9c70c │ │ + b.n 9c686 │ │ + ldr r7, [pc, #1020] @ (9c474 ) │ │ + b.n 9c718 │ │ asrs r4, r2, #1 │ │ - b.n 9bbb0 │ │ + b.n 9bbbc │ │ movs r4, r0 │ │ - b.n 9c3b6 │ │ + b.n 9c3c2 │ │ movs r3, #135 @ 0x87 │ │ - b.n 9c67a │ │ + b.n 9c686 │ │ asrs r1, r0, #32 │ │ - b.n 9c19c │ │ - ldr r3, [r1, r2] │ │ + b.n 9c1a8 │ │ + ldr r4, [r1, r2] │ │ @ instruction: 0xeb00ffea │ │ @ instruction: 0xeaff1040 │ │ - b.n 9bbc8 │ │ + b.n 9bbd4 │ │ cmp r7, #227 @ 0xe3 │ │ - b.n 9c7ce │ │ + b.n 9c7da │ │ strb r0, [r0, #0] │ │ - b.n 9c3d2 │ │ + b.n 9c3de │ │ asrs r1, r0, #32 │ │ - b.n 9c1b4 │ │ - ldr r5, [r0, r2] │ │ + b.n 9c1c0 │ │ + ldr r6, [r0, r2] │ │ add.w r0, r0, r7, lsl #16 │ │ - b.n 9c3de │ │ + b.n 9c3ea │ │ @ instruction: 0xffe3eaff │ │ asrs r0, r5, #32 │ │ - b.n 9bbe4 │ │ + b.n 9bbf0 │ │ movs r5, r0 │ │ - b.n 9c3ea │ │ + b.n 9c3f6 │ │ cmp r6, #57 @ 0x39 │ │ - b.n 9c7ee │ │ + b.n 9c7fa │ │ asrs r1, r0, #32 │ │ - b.n 9c1d0 │ │ - ldr r6, [r7, r1] │ │ + b.n 9c1dc │ │ + ldr r7, [r7, r1] │ │ add.w r0, r0, r5, lsl #16 │ │ - b.n 9c3fa │ │ + b.n 9c406 │ │ @ instruction: 0xffdceaff │ │ ands r1, r0 │ │ - b.n 9c802 │ │ + b.n 9c80e │ │ @ instruction: 0xffe9eaff │ │ - cmp r6, #170 @ 0xaa │ │ - vcvt.f32.u32 q9, q15, #9 │ │ - vqrdmlah.s q9, , d22[0] │ │ - vqrdmlah.s q9, , d10[0] │ │ + adds r0, #45 @ 0x2d │ │ + vcvta.s16.f16 d19, d1 │ │ + vqrdmlsh.s q9, , d25[0] │ │ + vqrdmlsh.s q9, , d13[0] │ │ vcvt.f16.u16 d20, d0, #9 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n 9c5f8 │ │ + b.n 9c604 │ │ ands r0, r0 │ │ - b.n 9c422 │ │ + b.n 9c42e │ │ movs r1, r0 │ │ - b.n 9c826 │ │ + b.n 9c832 │ │ subs r7, r4, #5 │ │ - b.n 9c82a │ │ - blx 2686ec │ │ + b.n 9c836 │ │ + blx 2696f8 │ │ movs r0, r0 │ │ - b.n 9c792 │ │ + b.n 9c79e │ │ asrs r7, r0, #1 │ │ asrs r2, r1, #12 │ │ lsls r4, r6 │ │ asrs r0, r0, #22 │ │ adds r7, r2, r0 │ │ asrs r2, r0, #13 │ │ lsls r4, r5, #2 │ │ @@ -175157,1420 +175037,1420 @@ │ │ cmp r3, #188 @ 0xbc │ │ asrs r0, r0, #7 │ │ asrs r4, r6, #2 │ │ asrs r0, r0, #7 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, sl, fp, lr} │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n 9c63c │ │ + b.n 9c648 │ │ movs r0, r0 │ │ - b.n 9c7c8 │ │ + b.n 9c7d4 │ │ lsls r3, r6, #1 │ │ lsrs r0, r0, #8 │ │ ands r0, r0 │ │ - b.n 9c46e │ │ + b.n 9c47a │ │ movs r0, r0 │ │ - b.n 9bc54 │ │ + b.n 9bc60 │ │ str r1, [r0, #0] │ │ - b.n 9c476 │ │ + b.n 9c482 │ │ asrs r7, r0, #1 │ │ - b.n 9c74e │ │ + b.n 9c75a │ │ strb r1, [r6, #22] │ │ - b.n 9c758 │ │ + b.n 9c764 │ │ adds r7, r2, r0 │ │ - b.n 9c7c6 │ │ + b.n 9c7d2 │ │ movs r1, r0 │ │ - b.n 9c3e6 │ │ + b.n 9c3f2 │ │ ldrb r5, [r0, #24] │ │ - b.n 9c7d8 │ │ + b.n 9c7e4 │ │ str r2, [r0, r0] │ │ - b.n 9c48e │ │ + b.n 9c49a │ │ movs r7, r0 │ │ asrs r0, r2, #5 │ │ lsls r5, r2, #1 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n 9c802 │ │ + b.n 9c80e │ │ lsls r5, r5, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n 9bc8a │ │ + b.n 9bc96 │ │ subs r1, r6, r0 │ │ - b.n 9c76c │ │ + b.n 9c778 │ │ asrs r5, r2, #15 │ │ - b.n 9c7ec │ │ + b.n 9c7f8 │ │ movs r1, r0 │ │ - b.n 9c40e │ │ + b.n 9c41a │ │ lsls r2, r5, #1 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n 9bc9e │ │ + b.n 9bcaa │ │ asrs r0, r2, #32 │ │ - b.n 9bc9a │ │ + b.n 9bca6 │ │ movs r0, r0 │ │ - b.n 9c820 │ │ + b.n 9c82c │ │ lsls r1, r5, #1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #32 │ │ - b.n 9bcae │ │ + b.n 9bcba │ │ strh r2, [r0, #62] @ 0x3e │ │ - b.n 9c79a │ │ + b.n 9c7a6 │ │ ldrh r7, [r7, #62] @ 0x3e │ │ - b.n 9c82c │ │ + b.n 9c838 │ │ movs r1, r2 │ │ - b.n 9c7b4 │ │ + b.n 9c7c0 │ │ lsls r6, r4, #1 │ │ subs r0, r0, r0 │ │ adds r2, r0, r0 │ │ - b.n 9c59c │ │ + b.n 9c5a8 │ │ asrs r5, r0, #32 │ │ - b.n 9c4c0 │ │ + b.n 9c4cc │ │ lsls r3, r7, #1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r1, #32 │ │ - b.n 9bcce │ │ + b.n 9bcda │ │ movs r5, r0 │ │ - b.n 9c44c │ │ + b.n 9c458 │ │ lsls r4, r1, #1 │ │ ldr r2, [sp, #0] │ │ asrs r0, r1, #1 │ │ - b.n 9bcda │ │ + b.n 9bce6 │ │ movs r2, #165 @ 0xa5 │ │ - b.n 9c4f6 │ │ + b.n 9c502 │ │ adds r0, #1 │ │ - b.n 9c8fa │ │ + b.n 9c906 │ │ asrs r2, r0, #4 │ │ - b.n 9c0e0 │ │ + b.n 9c0ec │ │ movs r0, #31 │ │ - b.n 9c5cc │ │ + b.n 9c5d8 │ │ lsls r1, r6, #8 │ │ - b.n 9c3ec │ │ + b.n 9c3f8 │ │ lsls r5, r0, #1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r1, #1 │ │ - b.n 9bcf6 │ │ + b.n 9bd02 │ │ asrs r5, r0, #32 │ │ - b.n 9c2d4 │ │ + b.n 9c2e0 │ │ asrs r0, r2, #3 │ │ - b.n 9c578 │ │ + b.n 9c584 │ │ movs r1, r0 │ │ - b.n 9c8bc │ │ + b.n 9c8c8 │ │ lsls r0, r0, #1 │ │ ldmia r2!, {} │ │ lsls r0, r2, #2 │ │ - b.n 9bd02 │ │ + b.n 9bd0e │ │ lsls r5, r0, #4 │ │ - b.n 9c106 │ │ - bl 4f7ce6 │ │ + b.n 9c112 │ │ + bl 4f7cf2 │ │ movs r0, #80 @ 0x50 │ │ - b.n 9bd16 │ │ + b.n 9bd22 │ │ movs r1, #5 │ │ - b.n 9c116 │ │ + b.n 9c122 │ │ movs r2, r0 │ │ - b.n 9c496 │ │ + b.n 9c4a2 │ │ movs r1, r7 │ │ subs r0, r0, r0 │ │ lsls r1, r6, #1 │ │ - b.n 9bfdc │ │ + b.n 9bfe8 │ │ movs r0, r2 │ │ - b.n 9c822 │ │ + b.n 9c82e │ │ movs r1, r4 │ │ lsrs r0, r0, #8 │ │ lsls r0, r6, #2 │ │ - b.n 9bd36 │ │ + b.n 9bd42 │ │ movs r0, r0 │ │ - b.n 9c8ae │ │ + b.n 9c8ba │ │ lsls r7, r1, #1 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n 9bd42 │ │ + b.n 9bd4e │ │ movs r7, r0 │ │ - b.n 9c4ba │ │ + b.n 9c4c6 │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ movs r4, r1 │ │ - b.n 9bd4e │ │ + b.n 9bd5a │ │ movs r4, r0 │ │ - b.n 9c4c6 │ │ + b.n 9c4d2 │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ lsls r4, r1, #1 │ │ - b.n 9bd56 │ │ + b.n 9bd62 │ │ asrs r0, r1, #32 │ │ - b.n 9bd5e │ │ + b.n 9bd6a │ │ asrs r0, r0, #32 │ │ - b.n 9c2b8 │ │ + b.n 9c2c4 │ │ movs r0, r0 │ │ - b.n 9c97a │ │ + b.n 9c986 │ │ movs r5, r0 │ │ - b.n 9c4e0 │ │ + b.n 9c4ec │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ movs r6, r0 │ │ - b.n 9c586 │ │ + b.n 9c592 │ │ lsls r1, r4, #3 │ │ add.w r0, r0, r0 │ │ - b.n 9c8ee │ │ + b.n 9c8fa │ │ lsls r6, r2, #1 │ │ subs r0, r0, r0 │ │ movs r6, r0 │ │ - b.n 9c596 │ │ + b.n 9c5a2 │ │ asrs r4, r0, #32 │ │ - b.n 9c59a │ │ + b.n 9c5a6 │ │ movs r0, #5 │ │ - b.n 9c59e │ │ + b.n 9c5aa │ │ lsls r2, r7, #5 │ │ add.w r0, r0, r0 │ │ - b.n 9c906 │ │ + b.n 9c912 │ │ lsls r2, r0, #1 │ │ subs r0, r0, r0 │ │ asrs r4, r2, #1 │ │ - b.n 9bd96 │ │ + b.n 9bda2 │ │ movs r4, r0 │ │ - b.n 9bd9a │ │ + b.n 9bda6 │ │ movs r1, #5 │ │ - b.n 9c198 │ │ + b.n 9c1a4 │ │ lsrs r1, r0, #16 │ │ - b.n 9c97a │ │ + b.n 9c986 │ │ movs r4, r0 │ │ - b.n 9bd86 │ │ + b.n 9bd92 │ │ movs r0, r0 │ │ - b.n 9c9c2 │ │ + b.n 9c9ce │ │ movs r0, #172 @ 0xac │ │ - b.n 9bd92 │ │ + b.n 9bd9e │ │ str r5, [r0, #16] │ │ - b.n 9c18c │ │ + b.n 9c198 │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {r1} │ │ - b.n 9c7a2 │ │ + b.n 9c7ae │ │ asrs r0, r6, #4 │ │ - b.n 9bdd4 │ │ + b.n 9bde0 │ │ ands r0, r0 │ │ - b.n 9c5da │ │ + b.n 9c5e6 │ │ movs r0, #56 @ 0x38 │ │ - b.n 9c9de │ │ + b.n 9c9ea │ │ asrs r1, r0, #32 │ │ - b.n 9c3c0 │ │ - ldr r2, [r0, r0] │ │ + b.n 9c3cc │ │ + ldr r3, [r0, r0] │ │ add.w r0, r0, r4 │ │ - b.n 9c5ea │ │ + b.n 9c5f6 │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {r2, r3, r5, r8, fp, lr} │ │ - b.n 9c8c2 │ │ + b.n 9c8ce │ │ movs r7, #167 @ 0xa7 │ │ - b.n 9c8c8 │ │ + b.n 9c8d4 │ │ asrs r0, r0, #4 │ │ - b.n 9bdf8 │ │ + b.n 9be04 │ │ movs r0, #226 @ 0xe2 │ │ - b.n 9c940 │ │ + b.n 9c94c │ │ movs r2, r0 │ │ - b.n 9c562 │ │ - ldr r7, [pc, #1020] @ (9c6c0 ) │ │ - b.n 9c964 │ │ + b.n 9c56e │ │ + ldr r7, [pc, #1020] @ (9c6cc ) │ │ + b.n 9c970 │ │ ands r6, r2 │ │ lsls r0, r0, #12 │ │ asrs r1, r0, #32 │ │ - b.n 9c3ec │ │ + b.n 9c3f8 │ │ movs r4, r0 │ │ - b.n 9c612 │ │ + b.n 9c61e │ │ movs r0, #44 @ 0x2c │ │ - b.n 9ca16 │ │ - ldrsb r5, [r6, r7] │ │ + b.n 9ca22 │ │ + ldrsb r6, [r6, r7] │ │ add.w r0, r0, r4 │ │ - b.n 9c61e │ │ + b.n 9c62a │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {r2} │ │ - b.n 9c626 │ │ + b.n 9c632 │ │ asrs r5, r0, #32 │ │ - b.n 9c62a │ │ - str r0, [sp, #316] @ 0x13c │ │ + b.n 9c636 │ │ + str r0, [sp, #320] @ 0x140 │ │ add.w r0, r0, r0 │ │ - b.n 9c992 │ │ + b.n 9c99e │ │ @ instruction: 0xffc30aff │ │ @ instruction: 0xffe5eaff │ │ asrs r0, r7, #2 │ │ - b.n 9be3c │ │ + b.n 9be48 │ │ movs r6, r2 │ │ - b.n 9ca42 │ │ + b.n 9ca4e │ │ movs r0, #40 @ 0x28 │ │ - b.n 9ca46 │ │ + b.n 9ca52 │ │ asrs r1, r0, #32 │ │ - b.n 9c428 │ │ - ldrsb r0, [r5, r7] │ │ + b.n 9c434 │ │ + ldrsb r1, [r5, r7] │ │ add.w r0, r0, r6, lsr #32 │ │ - b.n 9ca52 │ │ + b.n 9ca5e │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {r1, r2, r4, lr} │ │ - b.n 9ca5a │ │ + b.n 9ca66 │ │ movs r5, r0 │ │ and.w r9, r0, ip, asr #16 │ │ - b.n 9c932 │ │ - ldr r7, [pc, #1020] @ (9c720 ) │ │ - b.n 9c9c4 │ │ + b.n 9c93e │ │ + ldr r7, [pc, #1020] @ (9c72c ) │ │ + b.n 9c9d0 │ │ movs r2, r0 │ │ and.w r0, r0, r1, lsl #16 │ │ - b.n 9ca6e │ │ + b.n 9ca7a │ │ movs r0, r0 │ │ and.w r0, r0, r8, lsl #16 │ │ - b.n 9c676 │ │ + b.n 9c682 │ │ asrs r4, r0, #2 │ │ - b.n 9be78 │ │ + b.n 9be84 │ │ movs r4, r0 │ │ - b.n 9c67e │ │ + b.n 9c68a │ │ movs r0, #49 @ 0x31 │ │ - b.n 9ca82 │ │ + b.n 9ca8e │ │ asrs r1, r0, #32 │ │ - b.n 9c464 │ │ - ldrsb r1, [r3, r7] │ │ + b.n 9c470 │ │ + ldrsb r2, [r3, r7] │ │ add.w r0, r0, r4 │ │ - b.n 9c68e │ │ + b.n 9c69a │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {r2, r4, r5, r6, ip} │ │ - b.n 9be94 │ │ + b.n 9bea0 │ │ movs r6, r2 │ │ - b.n 9ca9a │ │ + b.n 9caa6 │ │ movs r0, #59 @ 0x3b │ │ - b.n 9ca9e │ │ + b.n 9caaa │ │ asrs r1, r0, #32 │ │ - b.n 9c480 │ │ - ldrsb r2, [r2, r7] │ │ + b.n 9c48c │ │ + ldrsb r3, [r2, r7] │ │ add.w r0, r0, r0 │ │ - b.n 9be96 │ │ + b.n 9bea2 │ │ movs r7, r0 │ │ - b.n 9c60e │ │ + b.n 9c61a │ │ @ instruction: 0xffaa0aff │ │ @ instruction: 0xffb6eaff │ │ asrs r4, r2, #1 │ │ - b.n 9beb8 │ │ + b.n 9bec4 │ │ ands r0, r0 │ │ - b.n 9c6be │ │ + b.n 9c6ca │ │ movs r0, #72 @ 0x48 │ │ - b.n 9cac2 │ │ + b.n 9cace │ │ asrs r1, r0, #32 │ │ - b.n 9c4a4 │ │ - ldrsb r1, [r1, r7] │ │ + b.n 9c4b0 │ │ + ldrsb r2, [r1, r7] │ │ add.w r0, r0, r4 │ │ - b.n 9c6ce │ │ + b.n 9c6da │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {r2, r3, r5, ip} │ │ - b.n 9bed4 │ │ + b.n 9bee0 │ │ movs r5, r1 │ │ - b.n 9cada │ │ + b.n 9cae6 │ │ movs r0, #52 @ 0x34 │ │ - b.n 9cade │ │ + b.n 9caea │ │ asrs r1, r0, #32 │ │ - b.n 9c4c0 │ │ - ldrsb r2, [r0, r7] │ │ + b.n 9c4cc │ │ + ldrsb r3, [r0, r7] │ │ add.w r0, r0, sp │ │ - b.n 9caea │ │ + b.n 9caf6 │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {r3} │ │ - b.n 9c652 │ │ + b.n 9c65e │ │ movs r6, r2 │ │ lsls r0, r0, #12 │ │ ldrh r0, [r6, #46] @ 0x2e │ │ - ldmia.w sp!, {sl, fp, sp} │ │ - vcvt.f16.u16 d18, d28, #9 │ │ - vtbx.8 d18, {d23-d26}, d4 │ │ - vtbx.8 d18, {d7-d10}, d24 │ │ - vdup.8 q9, d24[3] │ │ - vtbl.8 d18, {d23-d26}, d24 │ │ - vtbl.8 d18, {d23-d26}, d4 │ │ + ldmia.w sp!, {r0, r1, r7, r8, sl, fp, sp} │ │ + @ instruction: 0xfff72dbf │ │ + vqrdmulh.s q9, , d7[0] │ │ + vqdmulh.s q9, , d27[0] │ │ + vqrdmulh.s q9, , d27[0] │ │ + @ instruction: 0xfff72d2b │ │ + @ instruction: 0xfff72d07 │ │ vshr.u32 d19, d6, #9 │ │ - b.n 9cb1a │ │ + b.n 9cb26 │ │ movs r0, r0 │ │ - b.n 9ca7e │ │ + b.n 9ca8a │ │ movs r7, r5 │ │ lsrs r0, r0, #8 │ │ - ldr r4, [pc, #64] @ (9c424 ) │ │ + ldr r4, [pc, #64] @ (9c430 ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n 9c904 │ │ + b.n 9c910 │ │ movs r0, #0 │ │ - b.n 9bf0e │ │ + b.n 9bf1a │ │ ldmia r1!, {r2, r3, r5} │ │ - b.n 9ca02 │ │ + b.n 9ca0e │ │ cmp r9, r6 │ │ - b.n 9ca10 │ │ + b.n 9ca1c │ │ ldmia r7, {r0, r1, r2, r3, r4, r5, r6, r7} │ │ - b.n 9ca98 │ │ - ldr r6, [pc, #20] @ (9c410 ) │ │ - b.n 9ca8c │ │ + b.n 9caa4 │ │ + ldr r6, [pc, #20] @ (9c41c ) │ │ + b.n 9ca98 │ │ movs r4, r0 │ │ - b.n 9c6a6 │ │ + b.n 9c6b2 │ │ movs r0, r5 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n 9caac │ │ + b.n 9cab8 │ │ movs r2, r4 │ │ lsrs r0, r0, #8 │ │ movs r0, #12 │ │ - b.n 9bf32 │ │ + b.n 9bf3e │ │ movs r0, r0 │ │ - b.n 9caba │ │ + b.n 9cac6 │ │ movs r0, r4 │ │ lsrs r0, r0, #8 │ │ adds r0, #0 │ │ - b.n 9bf42 │ │ - ldr r2, [pc, #196] @ (9c4e4 ) │ │ - b.n 9ca28 │ │ + b.n 9bf4e │ │ + ldr r2, [pc, #196] @ (9c4f0 ) │ │ + b.n 9ca34 │ │ mvns r5, r2 │ │ - b.n 9caa8 │ │ + b.n 9cab4 │ │ movs r4, r0 │ │ - b.n 9c6d0 │ │ + b.n 9c6dc │ │ adds r0, #12 │ │ - b.n 9c76e │ │ + b.n 9c77a │ │ movs r2, r3 │ │ subs r0, r0, r0 │ │ adds r0, #16 │ │ - b.n 9cbd8 │ │ + b.n 9cbe4 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ eors r0, r0 │ │ - b.n 9bf62 │ │ + b.n 9bf6e │ │ ands r0, r2 │ │ - b.n 9bf6a │ │ + b.n 9bf76 │ │ movs r0, r0 │ │ - b.n 9caee │ │ + b.n 9cafa │ │ movs r0, r4 │ │ lsrs r0, r0, #8 │ │ ands r4, r0 │ │ - b.n 9bf72 │ │ + b.n 9bf7e │ │ movs r3, r0 │ │ - b.n 9c67a │ │ + b.n 9c686 │ │ movs r7, r3 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #32 │ │ - b.n 9bffe │ │ + b.n 9c00a │ │ movs r0, r2 │ │ - b.n 9ca80 │ │ + b.n 9ca8c │ │ movs r7, r5 │ │ subs r0, r0, r0 │ │ asrs r0, r0, #1 │ │ - b.n 9bf8a │ │ + b.n 9bf96 │ │ adds r0, #76 @ 0x4c │ │ - b.n 9bf8e │ │ + b.n 9bf9a │ │ movs r0, r1 │ │ - b.n 9bf8e │ │ + b.n 9bf9a │ │ asrs r0, r2, #2 │ │ - b.n 9bf94 │ │ + b.n 9bfa0 │ │ movs r3, r0 │ │ - b.n 9c4f6 │ │ + b.n 9c502 │ │ asrs r0, r0, #4 │ │ - b.n 9c39c │ │ - bl 4f7f7a │ │ + b.n 9c3a8 │ │ + bl 4f7f86 │ │ movs r0, #80 @ 0x50 │ │ - b.n 9bfa6 │ │ + b.n 9bfb2 │ │ lsls r0, r0, #4 │ │ - b.n 9c3aa │ │ + b.n 9c3b6 │ │ movs r7, #194 @ 0xc2 │ │ - b.n 9ca9a │ │ + b.n 9caa6 │ │ cmp r7, #255 @ 0xff │ │ - b.n 9cb2c │ │ + b.n 9cb38 │ │ adds r0, #0 │ │ - b.n 9c534 │ │ + b.n 9c540 │ │ adds r0, #2 │ │ asrs r2, r0, #10 │ │ movs r0, r0 │ │ and.w r0, r0, r0, lsl #12 │ │ - b.n 9cbde │ │ - ldr r4, [pc, #64] @ (9c4e0 ) │ │ + b.n 9cbea │ │ + ldr r4, [pc, #64] @ (9c4ec ) │ │ ldmia.w sp!, {r0, r1} │ │ - b.n 9c7e6 │ │ + b.n 9c7f2 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r7, r0, #1 │ │ - b.n 9cac2 │ │ + b.n 9cace │ │ adds r0, #12 │ │ - b.n 9c7f2 │ │ + b.n 9c7fe │ │ lsrs r7, r2, #32 │ │ - b.n 9cb3a │ │ + b.n 9cb46 │ │ movs r0, r0 │ │ - b.n 9c75e │ │ + b.n 9c76a │ │ @ instruction: 0xfff71aff │ │ adds r0, #0 │ │ - b.n 9cc02 │ │ + b.n 9cc0e │ │ movs r1, r0 │ │ - b.n 9cb68 │ │ + b.n 9cb74 │ │ adds r0, #22 │ │ stmia r3!, {} │ │ @ instruction: 0xfff3eaff │ │ adds r0, #1 │ │ - b.n 9cc12 │ │ + b.n 9cc1e │ │ @ instruction: 0xfff1eaff │ │ ands r4, r0 │ │ - b.n 9c4dc │ │ + b.n 9c4e8 │ │ lsrs r2, r0, #32 │ │ - b.n 9cb06 │ │ + b.n 9cb12 │ │ movs r1, r3 │ │ subs r0, r0, r0 │ │ movs r0, r4 │ │ - b.n 9cb08 │ │ + b.n 9cb14 │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ adds r7, #194 @ 0xc2 │ │ - b.n 9cafe │ │ + b.n 9cb0a │ │ subs r7, #255 @ 0xff │ │ - b.n 9cb90 │ │ + b.n 9cb9c │ │ @ instruction: 0xffe9eaff │ │ ands r0, r0 │ │ - b.n 9c83a │ │ + b.n 9c846 │ │ movs r2, r0 │ │ - b.n 9c83e │ │ + b.n 9c84a │ │ asrs r3, r0, #32 │ │ - b.n 9c842 │ │ - ldrsb r7, [r2, r6] │ │ + b.n 9c84e │ │ + ldrsb r0, [r3, r6] │ │ add.w r0, r0, r0 │ │ - b.n 9cbaa │ │ + b.n 9cbb6 │ │ movs r0, r2 │ │ subs r0, r0, r0 │ │ movs r0, #12 │ │ - b.n 9c03a │ │ + b.n 9c046 │ │ movs r4, r0 │ │ - b.n 9c856 │ │ + b.n 9c862 │ │ asrs r4, r0, #32 │ │ - b.n 9c0be │ │ + b.n 9c0ca │ │ movs r0, r2 │ │ - b.n 9cb40 │ │ + b.n 9cb4c │ │ @ instruction: 0xffcf0aff │ │ asrs r0, r0, #1 │ │ - b.n 9c04a │ │ + b.n 9c056 │ │ adds r0, #8 │ │ - b.n 9c04a │ │ + b.n 9c056 │ │ movs r0, #76 @ 0x4c │ │ - b.n 9c052 │ │ + b.n 9c05e │ │ lsls r4, r0, #4 │ │ - b.n 9c054 │ │ + b.n 9c060 │ │ asrs r2, r0, #32 │ │ - b.n 9c5bc │ │ + b.n 9c5c8 │ │ movs r7, r0 │ │ add.w r0, r0, r0, lsl #12 │ │ - b.n 9c87e │ │ + b.n 9c88a │ │ movs r0, r0 │ │ - b.n 9cbe2 │ │ + b.n 9cbee │ │ adds r0, #0 │ │ lsls r0, r4, #14 │ │ @ instruction: 0xffd4eaff │ │ adds r0, #13 │ │ - b.n 9cc8e │ │ + b.n 9cc9a │ │ @ instruction: 0xffd2eaff │ │ adds r0, #0 │ │ - b.n 9c896 │ │ + b.n 9c8a2 │ │ @ instruction: 0xffd0eaff │ │ movs r0, #8 │ │ - b.n 9c07e │ │ + b.n 9c08a │ │ movs r1, r0 │ │ - b.n 9c806 │ │ + b.n 9c812 │ │ movs r1, r3 │ │ ldr r2, [sp, #0] │ │ movs r0, #72 @ 0x48 │ │ - b.n 9c08a │ │ + b.n 9c096 │ │ adds r2, #161 @ 0xa1 │ │ - b.n 9c8ae │ │ + b.n 9c8ba │ │ stmia r1!, {r0, r1} │ │ - b.n 9c496 │ │ + b.n 9c4a2 │ │ adds r0, #31 │ │ - b.n 9c978 │ │ + b.n 9c984 │ │ movs r0, #1 │ │ - b.n 9ccba │ │ + b.n 9ccc6 │ │ lsls r4, r7, #12 │ │ - b.n 9c7a2 │ │ + b.n 9c7ae │ │ movs r2, r2 │ │ lsrs r0, r0, #8 │ │ movs r0, #76 @ 0x4c │ │ - b.n 9c0a6 │ │ + b.n 9c0b2 │ │ movs r0, #1 │ │ - b.n 9c68e │ │ + b.n 9c69a │ │ movs r0, #208 @ 0xd0 │ │ - b.n 9c932 │ │ + b.n 9c93e │ │ movs r1, r0 │ │ - b.n 9cc76 │ │ + b.n 9cc82 │ │ movs r5, r1 │ │ ldmia r2!, {} │ │ adds r0, #64 @ 0x40 │ │ - b.n 9c0ba │ │ + b.n 9c0c6 │ │ adds r0, #144 @ 0x90 │ │ - b.n 9c0c4 │ │ + b.n 9c0d0 │ │ stmia r1!, {r0} │ │ - b.n 9c4c8 │ │ - bl 4f80a2 │ │ + b.n 9c4d4 │ │ + bl 4f80ae │ │ adds r0, #80 @ 0x50 │ │ - b.n 9c0ca │ │ + b.n 9c0d6 │ │ adds r1, #1 │ │ - b.n 9c4d4 │ │ + b.n 9c4e0 │ │ movs r3, r0 │ │ - b.n 9c86a │ │ + b.n 9c876 │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ asrs r2, r6, #1 │ │ - b.n 9c398 │ │ + b.n 9c3a4 │ │ movs r0, r0 │ │ - b.n 9ccfe │ │ + b.n 9cd0a │ │ movs r0, r2 │ │ - b.n 9cbe4 │ │ + b.n 9cbf0 │ │ lsls r4, r0, #31 │ │ lsls r0, r1, #12 │ │ lsrs r7, r7, #31 │ │ lsls r7, r1, #13 │ │ vrhadd.u16 d14, d14, d31 │ │ - ldrh r6, [r2, #60] @ 0x3c │ │ + ldrh r7, [r2, #60] @ 0x3c │ │ and.w ip, r0, r0, ror #17 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n 9caf4 │ │ + b.n 9cb00 │ │ movs r0, r0 │ │ - b.n 9cc7e │ │ + b.n 9cc8a │ │ lsls r0, r0, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, #0 │ │ - b.n 9c106 │ │ + b.n 9c112 │ │ stmia r5!, {r0, r4, r5, r7} │ │ - b.n 9cc04 │ │ + b.n 9cc10 │ │ ldmia r6!, {r0, r2} │ │ - b.n 9cc7c │ │ + b.n 9cc88 │ │ movs r4, r1 │ │ - b.n 9c896 │ │ + b.n 9c8a2 │ │ lsls r2, r0, #1 │ │ subs r0, r0, r0 │ │ asrs r0, r6, #2 │ │ - b.n 9c11a │ │ + b.n 9c126 │ │ movs r0, r0 │ │ - b.n 9cca0 │ │ + b.n 9ccac │ │ lsls r5, r1, #1 │ │ subs r0, r0, r0 │ │ asrs r4, r1, #32 │ │ - b.n 9c126 │ │ + b.n 9c132 │ │ ands r6, r2 │ │ - b.n 9cd4a │ │ + b.n 9cd56 │ │ movs r0, r0 │ │ - b.n 9ccb0 │ │ + b.n 9ccbc │ │ lsls r4, r2, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, #0 │ │ - b.n 9c138 │ │ + b.n 9c144 │ │ @ instruction: 0xea31e303 │ │ - b.n 9cdc6 │ │ - b.n 9cca0 │ │ + b.n 9cdd2 │ │ + b.n 9ccac │ │ movs r6, r1 │ │ - b.n 9c8c6 │ │ + b.n 9c8d2 │ │ lsls r3, r1, #1 │ │ subs r0, r0, r0 │ │ movs r0, #64 @ 0x40 │ │ - b.n 9c14c │ │ + b.n 9c158 │ │ movs r0, #16 │ │ - b.n 9c152 │ │ + b.n 9c15e │ │ movs r0, r0 │ │ - b.n 9ccd6 │ │ + b.n 9cce2 │ │ lsls r2, r1, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, #4 │ │ - b.n 9c1dc │ │ + b.n 9c1e8 │ │ movs r1, r2 │ │ - b.n 9cc62 │ │ + b.n 9cc6e │ │ lsls r7, r1, #1 │ │ subs r0, r0, r0 │ │ adds r0, #172 @ 0xac │ │ - b.n 9c166 │ │ + b.n 9c172 │ │ movs r0, r0 │ │ - b.n 9c8f0 │ │ + b.n 9c8fc │ │ movs r6, r2 │ │ lsrs r0, r0, #8 │ │ movs r0, #76 @ 0x4c │ │ - b.n 9c174 │ │ + b.n 9c180 │ │ str r0, [r1, r0] │ │ - b.n 9c176 │ │ + b.n 9c182 │ │ str r0, [r1, #0] │ │ - b.n 9c17c │ │ + b.n 9c188 │ │ movs r0, #2 │ │ - b.n 9c6e8 │ │ + b.n 9c6f4 │ │ movs r6, r0 │ │ - b.n 9c906 │ │ + b.n 9c912 │ │ movs r7, r1 │ │ cmp r2, #0 │ │ asrs r4, r2, #1 │ │ - b.n 9c18c │ │ + b.n 9c198 │ │ asrs r2, r0 │ │ - b.n 9c5d0 │ │ + b.n 9c5dc │ │ movs r0, r0 │ │ - b.n 9c91a │ │ + b.n 9c926 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ asrs r7, r4, #30 │ │ - b.n 9cc8c │ │ + b.n 9cc98 │ │ asrs r2, r4, #3 │ │ - b.n 9cd00 │ │ + b.n 9cd0c │ │ movs r0, #4 │ │ - b.n 9c9c2 │ │ + b.n 9c9ce │ │ ands r0, r0 │ │ - b.n 9c1ae │ │ + b.n 9c1ba │ │ movs r1, r0 │ │ - b.n 9c932 │ │ + b.n 9c93e │ │ movs r4, r1 │ │ asrs r4, r2, #5 │ │ lsls r1, r4, #1 │ │ subs r0, r0, r0 │ │ lsls r4, r5 │ │ - b.n 9c1ba │ │ + b.n 9c1c6 │ │ movs r0, r0 │ │ - b.n 9c942 │ │ + b.n 9c94e │ │ @ instruction: 0xfff71aff │ │ asrs r4, r5, #2 │ │ - b.n 9cba6 │ │ + b.n 9cbb2 │ │ adds r0, #0 │ │ - b.n 9c1a8 │ │ + b.n 9c1b4 │ │ lsls r4, r5, #2 │ │ - b.n 9c1aa │ │ + b.n 9c1b6 │ │ asrs r7, r5, #32 │ │ - b.n 9ce6e │ │ + b.n 9ce7a │ │ movs r0, #1 │ │ - b.n 9cdb4 │ │ + b.n 9cdc0 │ │ cmp r3, #188 @ 0xbc │ │ - b.n 9ca36 │ │ + b.n 9ca42 │ │ movs r0, #71 @ 0x47 │ │ - b.n 9ccce │ │ + b.n 9ccda │ │ ands r0, r0 │ │ - b.n 9cdfe │ │ + b.n 9ce0a │ │ cmp r0, #23 │ │ - b.n 9cd46 │ │ + b.n 9cd52 │ │ asrs r4, r6, #2 │ │ - b.n 9ca46 │ │ + b.n 9ca52 │ │ lsrs r0, r0 │ │ - b.n 9c1ca │ │ + b.n 9c1d6 │ │ lsrs r4, r0 │ │ - b.n 9c1ce │ │ + b.n 9c1da │ │ ands r0, r1 │ │ - b.n 9c1d2 │ │ + b.n 9c1de │ │ ands r4, r1 │ │ - b.n 9c1d6 │ │ + b.n 9c1e2 │ │ ands r0, r2 │ │ - b.n 9c1da │ │ + b.n 9c1e6 │ │ movs r0, #0 │ │ - b.n 9c1de │ │ + b.n 9c1ea │ │ movs r4, r0 │ │ - b.n 9ca22 │ │ + b.n 9ca2e │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r2, r6, r8, ip} │ │ - b.n 9c228 │ │ + b.n 9c234 │ │ movs r6, r2 │ │ - b.n 9ce2e │ │ + b.n 9ce3a │ │ movs r0, #82 @ 0x52 │ │ - b.n 9ce32 │ │ + b.n 9ce3e │ │ asrs r1, r0, #32 │ │ - b.n 9c814 │ │ - ldrsb r5, [r5, r3] │ │ + b.n 9c820 │ │ + ldrsb r6, [r5, r3] │ │ add.w r0, r0, r6, lsr #32 │ │ - b.n 9ce3e │ │ + b.n 9ce4a │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r0, r1, r2, r6} │ │ - b.n 9cd1a │ │ + b.n 9cd26 │ │ ands r0, r0 │ │ - b.n 9ce4a │ │ + b.n 9ce56 │ │ lsrs r7, r2, #32 │ │ - b.n 9cd92 │ │ + b.n 9cd9e │ │ movs r0, r0 │ │ - b.n 9c9b6 │ │ + b.n 9c9c2 │ │ @ instruction: 0xfff10aff │ │ asrs r0, r3, #4 │ │ - b.n 9c258 │ │ - ldr r1, [pc, #176] @ (9c7cc ) │ │ - b.n 9cd2e │ │ - ldr r7, [pc, #1020] @ (9cb1c ) │ │ - b.n 9cdc0 │ │ + b.n 9c264 │ │ + ldr r1, [pc, #176] @ (9c7d8 ) │ │ + b.n 9cd3a │ │ + ldr r7, [pc, #1020] @ (9cb28 ) │ │ + b.n 9cdcc │ │ movs r0, #85 @ 0x55 │ │ - b.n 9ce66 │ │ + b.n 9ce72 │ │ asrs r1, r0, #32 │ │ - b.n 9c848 │ │ + b.n 9c854 │ │ movs r4, r0 │ │ - b.n 9ca6e │ │ - ldrsb r7, [r3, r3] │ │ + b.n 9ca7a │ │ + ldrsb r0, [r4, r3] │ │ add.w r0, r0, r4 │ │ - b.n 9ca76 │ │ + b.n 9ca82 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r3, r4, r5, r6, r7, ip} │ │ - b.n 9c27c │ │ + b.n 9c288 │ │ movs r6, r2 │ │ - b.n 9ce82 │ │ + b.n 9ce8e │ │ movs r0, #89 @ 0x59 │ │ - b.n 9ce86 │ │ + b.n 9ce92 │ │ asrs r1, r0, #32 │ │ - b.n 9c868 │ │ - ldrsb r0, [r3, r3] │ │ + b.n 9c874 │ │ + ldrsb r1, [r3, r3] │ │ add.w r0, r0, r6, lsr #32 │ │ - b.n 9ce92 │ │ + b.n 9ce9e │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r2, r3, r5, r8, fp, lr} │ │ - b.n 9cd6a │ │ - ldr r7, [pc, #1020] @ (9cb58 ) │ │ - b.n 9cdfc │ │ + b.n 9cd76 │ │ + ldr r7, [pc, #1020] @ (9cb64 ) │ │ + b.n 9ce08 │ │ movs r0, r0 │ │ and.w r0, r0, r1, lsl #16 │ │ - b.n 9cea6 │ │ + b.n 9ceb2 │ │ asrs r0, r2, #3 │ │ - b.n 9c2a8 │ │ + b.n 9c2b4 │ │ asrs r1, r0, #32 │ │ - b.n 9c88c │ │ + b.n 9c898 │ │ movs r4, r0 │ │ - b.n 9cab2 │ │ + b.n 9cabe │ │ movs r0, #100 @ 0x64 │ │ - b.n 9ceb6 │ │ - ldrsb r5, [r1, r3] │ │ + b.n 9cec2 │ │ + ldrsb r6, [r1, r3] │ │ add.w r0, r0, r4 │ │ - b.n 9cabe │ │ + b.n 9caca │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r2, r3, sp} │ │ - b.n 9c2a6 │ │ + b.n 9c2b2 │ │ movs r0, r0 │ │ - b.n 9ce2e │ │ + b.n 9ce3a │ │ movs r5, r3 │ │ lsrs r0, r0, #8 │ │ stmia r0!, {r0} │ │ - b.n 9ced2 │ │ + b.n 9cede │ │ adds r0, #0 │ │ - b.n 9c2ba │ │ + b.n 9c2c6 │ │ movs r6, r1 │ │ - b.n 9ca40 │ │ + b.n 9ca4c │ │ movs r1, r3 │ │ subs r0, r0, r0 │ │ adds r0, #64 @ 0x40 │ │ - b.n 9c2c6 │ │ + b.n 9c2d2 │ │ adds r0, #16 │ │ - b.n 9c2cc │ │ + b.n 9c2d8 │ │ movs r0, r0 │ │ - b.n 9ce50 │ │ + b.n 9ce5c │ │ movs r5, r2 │ │ lsrs r0, r0, #8 │ │ adds r0, #4 │ │ - b.n 9c356 │ │ + b.n 9c362 │ │ movs r1, r0 │ │ - b.n 9cddc │ │ + b.n 9cde8 │ │ movs r2, r2 │ │ subs r0, r0, r0 │ │ adds r0, #76 @ 0x4c │ │ - b.n 9c2e0 │ │ + b.n 9c2ec │ │ str r0, [r1, r0] │ │ - b.n 9c2e2 │ │ + b.n 9c2ee │ │ str r0, [r1, #0] │ │ - b.n 9c2ea │ │ + b.n 9c2f6 │ │ adds r0, #3 │ │ - b.n 9c854 │ │ + b.n 9c860 │ │ movs r3, r0 │ │ - b.n 9ca7a │ │ + b.n 9ca86 │ │ @ instruction: 0xffe49aff │ │ str r0, [r1, r1] │ │ - b.n 9c2fa │ │ + b.n 9c306 │ │ str r3, [r4, #40] @ 0x28 │ │ - b.n 9cb1a │ │ + b.n 9cb26 │ │ str r6, [r0, r4] │ │ - b.n 9c708 │ │ + b.n 9c714 │ │ str r7, [r3, #0] │ │ - b.n 9cbe8 │ │ + b.n 9cbf4 │ │ lsls r5, r6, #24 │ │ - b.n 9ca1e │ │ + b.n 9ca2a │ │ @ instruction: 0xffde0aff │ │ str r4, [r1, r1] │ │ - b.n 9c312 │ │ + b.n 9c31e │ │ adds r0, #3 │ │ - b.n 9c79c │ │ + b.n 9c7a8 │ │ movs r0, r0 │ │ - b.n 9ce9c │ │ + b.n 9cea8 │ │ @ instruction: 0xffda0aff │ │ movs r0, #20 │ │ - b.n 9c322 │ │ + b.n 9c32e │ │ movs r0, r0 │ │ - b.n 9cea6 │ │ + b.n 9ceb2 │ │ @ instruction: 0xffe21aff │ │ asrs r4, r6, #32 │ │ - b.n 9c348 │ │ + b.n 9c354 │ │ @ instruction: 0x47c2 │ │ - b.n 9ce1e │ │ - ldr r7, [pc, #1020] @ (9cc0c ) │ │ - b.n 9ceb0 │ │ + b.n 9ce2a │ │ + ldr r7, [pc, #1020] @ (9cc18 ) │ │ + b.n 9cebc │ │ asrs r1, r0, #32 │ │ - b.n 9c934 │ │ + b.n 9c940 │ │ @ instruction: 0xffd4eaff │ │ movs r4, r4 │ │ - b.n 9c35c │ │ + b.n 9c368 │ │ movs r0, #115 @ 0x73 │ │ - b.n 9cf62 │ │ + b.n 9cf6e │ │ asrs r0, r4, #32 │ │ - b.n 9c364 │ │ + b.n 9c370 │ │ movs r0, r0 │ │ - b.n 9c948 │ │ + b.n 9c954 │ │ asrs r1, r0, #32 │ │ - b.n 9c94c │ │ + b.n 9c958 │ │ ldr??.w lr, [r1], #255 │ │ - mrc 15, 4, APSR_nzcv, cr3, cr6, {7} │ │ - mrc 15, 2, APSR_nzcv, cr15, cr6, {7} │ │ - mrc 15, 1, APSR_nzcv, cr15, cr6, {7} │ │ - mrc 15, 0, APSR_nzcv, cr11, cr6, {7} │ │ - ldcl 15, cr15, [r3, #-984]! @ 0xfffffc28 │ │ - @ instruction: 0xfa0dfff6 │ │ - ldcl 15, cr15, [fp, #-984] @ 0xfffffc28 │ │ - ldr r0, [pc, #960] @ (9cc10 ) │ │ + mrc 15, 3, APSR_nzcv, cr7, cr6, {7} │ │ + mcr 15, 2, pc, cr3, cr6, {7} @ │ │ + mcr 15, 1, pc, cr3, cr6, {7} @ │ │ + ldcl 15, cr15, [pc, #984]! @ 9cc24 │ │ + ldcl 15, cr15, [r7, #-984] @ 0xfffffc28 │ │ + @ instruction: 0xfa1cfff6 │ │ + ldc 15, cr15, [pc, #-984]! @ 9c480 │ │ + ldr r0, [pc, #960] @ (9cc1c ) │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n 9cd70 │ │ + b.n 9cd7c │ │ adds r0, #8 │ │ - b.n 9c37c │ │ + b.n 9c388 │ │ movs r2, r0 │ │ - b.n 9cb04 │ │ + b.n 9cb10 │ │ movs r1, r3 │ │ ldr r2, [sp, #0] │ │ adds r0, #72 @ 0x48 │ │ - b.n 9c388 │ │ + b.n 9c394 │ │ str r2, [r4, #40] @ 0x28 │ │ - b.n 9cbaa │ │ + b.n 9cbb6 │ │ str r1, [r0, r0] │ │ - b.n 9cfae │ │ + b.n 9cfba │ │ adds r1, #6 │ │ - b.n 9c798 │ │ + b.n 9c7a4 │ │ str r7, [r3, #0] │ │ - b.n 9cc7a │ │ + b.n 9cc86 │ │ lsls r3, r6, #24 │ │ - b.n 9caa4 │ │ + b.n 9cab0 │ │ movs r2, r2 │ │ lsrs r0, r0, #8 │ │ adds r0, #76 @ 0x4c │ │ - b.n 9c3a4 │ │ + b.n 9c3b0 │ │ adds r0, #2 │ │ - b.n 9c98c │ │ + b.n 9c998 │ │ adds r0, #208 @ 0xd0 │ │ - b.n 9cc30 │ │ + b.n 9cc3c │ │ movs r1, r0 │ │ - b.n 9cf74 │ │ + b.n 9cf80 │ │ movs r5, r1 │ │ ldmia r2!, {} │ │ str r0, [r0, #4] │ │ - b.n 9c3b8 │ │ + b.n 9c3c4 │ │ str r0, [r2, #8] │ │ - b.n 9c3c6 │ │ + b.n 9c3d2 │ │ str r2, [r0, #16] │ │ - b.n 9c7ca │ │ - bl 4f839e │ │ + b.n 9c7d6 │ │ + bl 4f83aa │ │ str r0, [r2, r1] │ │ - b.n 9c3c8 │ │ + b.n 9c3d4 │ │ str r2, [r0, r4] │ │ - b.n 9c7d4 │ │ + b.n 9c7e0 │ │ movs r5, r0 │ │ - b.n 9cb5a │ │ + b.n 9cb66 │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ adds r0, #115 @ 0x73 │ │ - b.n 9c694 │ │ + b.n 9c6a0 │ │ movs r0, r2 │ │ - b.n 9cee0 │ │ + b.n 9ceec │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ lsls r4, r0, #31 │ │ - b.n 9ced2 │ │ + b.n 9cede │ │ lsrs r7, r7, #31 │ │ - b.n 9cf64 │ │ + b.n 9cf70 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {lr} │ │ - b.n 9cc0e │ │ + b.n 9cc1a │ │ movs r1, r0 │ │ - b.n 9cc12 │ │ + b.n 9cc1e │ │ str r1, [r0, r0] │ │ - b.n 9cc16 │ │ + b.n 9cc22 │ │ asrs r2, r0, #32 │ │ - b.n 9cc1a │ │ + b.n 9cc26 │ │ str r2, [r0, #0] │ │ - b.n 9cc1e │ │ - ldrh r2, [r2, #54] @ 0x36 │ │ + b.n 9cc2a │ │ + ldrh r3, [r2, #54] @ 0x36 │ │ add.w r0, r0, r0, lsl #12 │ │ - b.n 9cc26 │ │ + b.n 9cc32 │ │ movs r0, #6 │ │ - b.n 9cc2a │ │ + b.n 9cc36 │ │ asrs r5, r0, #32 │ │ - b.n 9cc2e │ │ + b.n 9cc3a │ │ movs r4, r0 │ │ - b.n 9cc32 │ │ + b.n 9cc3e │ │ movs r0, r0 │ │ - b.n 9cf9c │ │ + b.n 9cfa8 │ │ lsls r0, r0, #1 │ │ subs r0, r0, r0 │ │ eors r0, r0 │ │ - b.n 9c420 │ │ + b.n 9c42c │ │ str r3, [r5, r0] │ │ - b.n 9d0c2 │ │ + b.n 9d0ce │ │ adds r0, #76 @ 0x4c │ │ - b.n 9c428 │ │ - b.n 9c46a │ │ - b.n 9cf24 │ │ + b.n 9c434 │ │ + b.n 9c476 │ │ + b.n 9cf30 │ │ strb r4, [r0, #1] │ │ - b.n 9c430 │ │ + b.n 9c43c │ │ stmia r0!, {} │ │ - b.n 9d052 │ │ + b.n 9d05e │ │ str r0, [r1, #8] │ │ - b.n 9c43e │ │ + b.n 9c44a │ │ adds r0, #2 │ │ - b.n 9ca20 │ │ + b.n 9ca2c │ │ str r4, [r6, r2] │ │ - b.n 9cc9e │ │ + b.n 9ccaa │ │ cdp 3, 0, cr14, cr5, cr7, {2} │ │ strh r2, [r0, r2] │ │ - b.n 9ca32 │ │ + b.n 9ca3e │ │ str r0, [r0, #4] │ │ - b.n 9c44c │ │ + b.n 9c458 │ │ movs r0, #130 @ 0x82 │ │ - b.n 9ca32 │ │ + b.n 9ca3e │ │ stmia r0!, {r4, r5, r7} │ │ - b.n 9c432 │ │ + b.n 9c43e │ │ asrs r4, r1, #32 │ │ - b.n 9c436 │ │ + b.n 9c442 │ │ tst r2, r0 │ │ - b.n 9ca48 │ │ + b.n 9ca54 │ │ stmia r0!, {r3, r4} │ │ - b.n 9c43e │ │ - b.n 9c940 │ │ - b.n 9c442 │ │ + b.n 9c44a │ │ + b.n 9c94c │ │ + b.n 9c44e │ │ adds r0, #8 │ │ - b.n 9c446 │ │ + b.n 9c452 │ │ rors r0, r6 │ │ - b.n 9ccca │ │ + b.n 9ccd6 │ │ lsls r4, r5, #2 │ │ - b.n 9c44e │ │ + b.n 9c45a │ │ str r4, [r0, #0] │ │ - b.n 9c47e │ │ + b.n 9c48a │ │ strb r2, [r0, #8] │ │ - b.n 9c904 │ │ + b.n 9c910 │ │ movs r0, #125 @ 0x7d │ │ - b.n 9d11a │ │ + b.n 9d126 │ │ lsrs r2, r0, #8 │ │ - b.n 9cf8a │ │ + b.n 9cf96 │ │ movs r0, #2 │ │ lsls r0, r0, #12 │ │ movs r4, r0 │ │ - b.n 9cf94 │ │ + b.n 9cfa0 │ │ movs r0, #6 │ │ - b.n 9c4ea │ │ + b.n 9c4f6 │ │ movs r0, r2 │ │ lsrs r0, r0, #8 │ │ - b.n 9cae0 │ │ - b.n 9c4b2 │ │ + b.n 9caec │ │ + b.n 9c4be │ │ ldr r4, [r2, #124] @ 0x7c │ │ - b.n 9cf94 │ │ + b.n 9cfa0 │ │ strb r1, [r0, #0] │ │ - b.n 9ce86 │ │ + b.n 9ce92 │ │ strb r4, [r6, #2] │ │ - b.n 9ccfe │ │ + b.n 9cd0a │ │ strb r4, [r1, #0] │ │ - b.n 9ce8c │ │ + b.n 9ce98 │ │ strb r4, [r2, #0] │ │ - b.n 9c486 │ │ + b.n 9c492 │ │ strb r4, [r6, #2] │ │ - b.n 9ce8a │ │ + b.n 9ce96 │ │ strb r0, [r2, #0] │ │ - b.n 9c48e │ │ + b.n 9c49a │ │ strb r0, [r0, #0] │ │ - b.n 9c53a │ │ + b.n 9c546 │ │ stmia r0!, {r3, r4} │ │ - b.n 9c496 │ │ + b.n 9c4a2 │ │ strb r0, [r2, #0] │ │ - b.n 9cda8 │ │ + b.n 9cdb4 │ │ asrs r4, r1, #32 │ │ - b.n 9c49e │ │ + b.n 9c4aa │ │ adds r0, #8 │ │ - b.n 9c4a2 │ │ + b.n 9c4ae │ │ movs r0, #135 @ 0x87 │ │ - b.n 9ccaa │ │ + b.n 9ccb6 │ │ movs r0, #6 │ │ - b.n 9c52a │ │ + b.n 9c536 │ │ lsls r4, r5, #2 │ │ - b.n 9c4ae │ │ + b.n 9c4ba │ │ lsls r0, r4, #2 │ │ - b.n 9c3b2 │ │ + b.n 9c3be │ │ movs r0, r0 │ │ - b.n 9c55c │ │ + b.n 9c568 │ │ movs r2, r0 │ │ - b.n 9cfda │ │ + b.n 9cfe6 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ asrs r0, r0, #1 │ │ - b.n 9c4e4 │ │ + b.n 9c4f0 │ │ movs r0, r0 │ │ - b.n 9d106 │ │ + b.n 9d112 │ │ movs r0, #20 │ │ - b.n 9c4f4 │ │ + b.n 9c500 │ │ movs r0, r0 │ │ - b.n 9d072 │ │ + b.n 9d07e │ │ ldrh r0, [r6, #6] │ │ adds r5, r7, r2 │ │ movs r1, r0 │ │ - b.n 9cd16 │ │ + b.n 9cd22 │ │ asrs r5, r0, #32 │ │ - b.n 9cd1a │ │ + b.n 9cd26 │ │ movs r0, #4 │ │ - b.n 9cd1e │ │ - ldr r0, [pc, #960] @ (9cda0 ) │ │ - ldmia.w sp!, {r0, r2, r4, r8, sp, lr} │ │ + b.n 9cd2a │ │ + ldr r0, [pc, #960] @ (9cdac ) │ │ + ldmia.w sp!, {r1, r2, r4, r8, sp, lr} │ │ and.w r0, r0, ip, lsl #1 │ │ - b.n 9c50c │ │ + b.n 9c518 │ │ movs r0, #0 │ │ - b.n 9ca74 │ │ + b.n 9ca80 │ │ movs r1, r0 │ │ - b.n 9cd32 │ │ + b.n 9cd3e │ │ asrs r2, r0, #32 │ │ - b.n 9cd36 │ │ - ldr r0, [pc, #960] @ (9cdb8 ) │ │ + b.n 9cd42 │ │ + ldr r0, [pc, #960] @ (9cdc4 ) │ │ ldmia.w sp!, {r0, r2, r3, r6, r7, r8, ip} │ │ and.w r0, r0, r3 │ │ - b.n 9cd42 │ │ + b.n 9cd4e │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r4, sl, fp, lr} │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n 9cf28 │ │ - beq.n 9ca20 │ │ - b.n 9ceac │ │ + b.n 9cf34 │ │ + beq.n 9ca2c │ │ + b.n 9ceb8 │ │ movs r0, r0 │ │ - b.n 9d0b6 │ │ + b.n 9d0c2 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r2 │ │ add.w r0, r0, r0 │ │ - b.n 9d0c2 │ │ + b.n 9d0ce │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ - beq.n 9ca38 │ │ - b.n 9cec0 │ │ + beq.n 9ca44 │ │ + b.n 9cecc │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {lr} │ │ - b.n 9cd72 │ │ + b.n 9cd7e │ │ lsls r3, r2, #3 │ │ add.w r0, r0, ip, lsr #8 │ │ - b.n 9c578 │ │ + b.n 9c584 │ │ adds r0, #4 │ │ - b.n 9cd7e │ │ + b.n 9cd8a │ │ asrs r0, r3, #32 │ │ - b.n 9c580 │ │ + b.n 9c58c │ │ movs r0, #2 │ │ - b.n 9cb64 │ │ + b.n 9cb70 │ │ movs r0, r0 │ │ - b.n 9c564 │ │ + b.n 9c570 │ │ asrs r1, r0, #32 │ │ - b.n 9cb6c │ │ + b.n 9cb78 │ │ movs r2, r0 │ │ - b.n 9cd92 │ │ + b.n 9cd9e │ │ movs r0, #151 @ 0x97 │ │ - b.n 9d196 │ │ + b.n 9d1a2 │ │ lsls r3, r0, #2 │ │ - @ instruction: 0xeb00ceb4 │ │ - vrintx.f16 q9, │ │ + @ instruction: 0xeb00cf8b │ │ + vqshlu.s32 q9, q0, #22 │ │ vcvt.f16.u16 d20, d0, #9 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n 9cf84 │ │ + b.n 9cf90 │ │ movs r0, r0 │ │ - b.n 9d10e │ │ + b.n 9d11a │ │ lsls r7, r0, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, #0 │ │ - b.n 9c596 │ │ + b.n 9c5a2 │ │ asrs r7, r0, #1 │ │ - b.n 9d08e │ │ + b.n 9d09a │ │ adds r7, r2, r0 │ │ - b.n 9d102 │ │ + b.n 9d10e │ │ movs r1, r0 │ │ - b.n 9cd26 │ │ + b.n 9cd32 │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ asrs r4, r1, #32 │ │ - b.n 9c5aa │ │ + b.n 9c5b6 │ │ movs r0, r0 │ │ - b.n 9d130 │ │ + b.n 9d13c │ │ asrs r0, r6, #2 │ │ lsls r0, r2, #22 │ │ movs r0, r0 │ │ lsls r1, r2, #13 │ │ lsls r4, r0, #1 │ │ subs r0, r0, r0 │ │ - vqdmulh.s d30, d8, d0 │ │ + vqdmulh.s d30, d9, d0 │ │ movs r0, r0 │ │ - b.n 9d1e2 │ │ + b.n 9d1ee │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r0, r4, r5, r7, r8, sl, ip} │ │ - b.n 9d0c4 │ │ + b.n 9d0d0 │ │ subs r5, r0, #0 │ │ - b.n 9d13c │ │ + b.n 9d148 │ │ movs r1, r0 │ │ - b.n 9cd56 │ │ + b.n 9cd62 │ │ lsls r6, r0, #1 │ │ subs r0, r0, r0 │ │ adds r0, #12 │ │ - b.n 9c5da │ │ + b.n 9c5e6 │ │ movs r0, r0 │ │ - b.n 9d164 │ │ + b.n 9d170 │ │ lsls r4, r1, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, #0 │ │ - b.n 9c5ec │ │ - ldr r2, [pc, #196] @ (9cb8c ) │ │ - b.n 9d0d0 │ │ + b.n 9c5f8 │ │ + ldr r2, [pc, #196] @ (9cb98 ) │ │ + b.n 9d0dc │ │ mvns r5, r2 │ │ - b.n 9d150 │ │ + b.n 9d15c │ │ movs r4, r0 │ │ - b.n 9cd76 │ │ + b.n 9cd82 │ │ lsls r1, r1, #1 │ │ subs r0, r0, r0 │ │ movs r0, #64 @ 0x40 │ │ - b.n 9c600 │ │ + b.n 9c60c │ │ movs r0, #16 │ │ - b.n 9c602 │ │ + b.n 9c60e │ │ movs r0, r0 │ │ - b.n 9d186 │ │ + b.n 9d192 │ │ lsls r0, r1, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, #4 │ │ - b.n 9c690 │ │ + b.n 9c69c │ │ movs r1, r0 │ │ - b.n 9d112 │ │ + b.n 9d11e │ │ lsls r7, r0, #1 │ │ subs r0, r0, r0 │ │ movs r0, #176 @ 0xb0 │ │ - b.n 9c616 │ │ + b.n 9c622 │ │ movs r0, r0 │ │ - b.n 9d19e │ │ + b.n 9d1aa │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ asrs r3, r5, #32 │ │ - b.n 9d2c2 │ │ + b.n 9d2ce │ │ movs r0, #1 │ │ - b.n 9d208 │ │ + b.n 9d214 │ │ asrs r4, r6, #2 │ │ - b.n 9ce8a │ │ + b.n 9ce96 │ │ asrs r7, r4, #30 │ │ - b.n 9d120 │ │ + b.n 9d12c │ │ asrs r2, r4, #3 │ │ - b.n 9d194 │ │ + b.n 9d1a0 │ │ cmp r3, #188 @ 0xbc │ │ - b.n 9ce96 │ │ + b.n 9cea2 │ │ asrs r0, r0, #32 │ │ - b.n 9c61a │ │ + b.n 9c626 │ │ movs r0, r0 │ │ - b.n 9d25e │ │ + b.n 9d26a │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r2, r3, r5, r7, lr, pc} │ │ - b.n 9c646 │ │ + b.n 9c652 │ │ movs r0, r0 │ │ - b.n 9cde2 │ │ + b.n 9cdee │ │ @ instruction: 0xffda0aff │ │ eors r4, r1 │ │ - b.n 9c658 │ │ + b.n 9c664 │ │ movs r0, #8 │ │ - b.n 9c656 │ │ - b.n 9cb48 │ │ - b.n 9c660 │ │ + b.n 9c662 │ │ + b.n 9cb54 │ │ + b.n 9c66c │ │ ands r4, r0 │ │ - b.n 9cbc2 │ │ + b.n 9cbce │ │ movs r6, r1 │ │ - b.n 9cdea │ │ + b.n 9cdf6 │ │ @ instruction: 0xffd42aff │ │ movs r0, #84 @ 0x54 │ │ - b.n 9c670 │ │ + b.n 9c67c │ │ asrs r4, r0 │ │ - b.n 9cab2 │ │ + b.n 9cabe │ │ movs r0, r0 │ │ - b.n 9cdfa │ │ + b.n 9ce06 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ adds r7, #167 @ 0xa7 │ │ - b.n 9d16c │ │ + b.n 9d178 │ │ adds r0, #226 @ 0xe2 │ │ - b.n 9d1e0 │ │ + b.n 9d1ec │ │ movs r0, #4 │ │ - b.n 9cea2 │ │ + b.n 9ceae │ │ ands r0, r0 │ │ - b.n 9c68e │ │ + b.n 9c69a │ │ movs r3, r0 │ │ - b.n 9ce12 │ │ + b.n 9ce1e │ │ movs r1, r0 │ │ asrs r4, r2, #5 │ │ movs r1, r6 │ │ subs r0, r0, r0 │ │ lsls r4, r5 │ │ - b.n 9c69a │ │ + b.n 9c6a6 │ │ movs r0, r0 │ │ - b.n 9ce22 │ │ + b.n 9ce2e │ │ @ instruction: 0xfff71aff │ │ movs r0, #172 @ 0xac │ │ - b.n 9d086 │ │ + b.n 9d092 │ │ stmia r0!, {} │ │ - b.n 9c68a │ │ - vqdmulh.s d14, d13, d0 │ │ + b.n 9c696 │ │ + vqdmulh.s d14, d14, d0 │ │ movs r0, r0 │ │ - b.n 9d2ce │ │ + b.n 9d2da │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r3, r4, r5, r7, ip} │ │ - b.n 9c6d4 │ │ + b.n 9c6e0 │ │ movs r6, r2 │ │ - b.n 9d2da │ │ + b.n 9d2e6 │ │ movs r0, #157 @ 0x9d │ │ - b.n 9d2de │ │ + b.n 9d2ea │ │ asrs r1, r0, #32 │ │ - b.n 9ccc0 │ │ - strb r2, [r0, r7] │ │ + b.n 9cccc │ │ + strb r3, [r0, r7] │ │ add.w r0, r0, r6, lsr #32 │ │ - b.n 9d2ea │ │ + b.n 9d2f6 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r2, r5, r7, ip} │ │ - b.n 9c6f0 │ │ + b.n 9c6fc │ │ @ instruction: 0x47b5 │ │ - b.n 9d1c6 │ │ - ldr r7, [pc, #1020] @ (9cfb4 ) │ │ - b.n 9d258 │ │ + b.n 9d1d2 │ │ + ldr r7, [pc, #1020] @ (9cfc0 ) │ │ + b.n 9d264 │ │ movs r0, #161 @ 0xa1 │ │ - b.n 9d2fe │ │ + b.n 9d30a │ │ asrs r1, r0, #32 │ │ - b.n 9cce0 │ │ + b.n 9ccec │ │ movs r4, r0 │ │ - b.n 9cf06 │ │ - strb r1, [r7, r6] │ │ + b.n 9cf12 │ │ + strb r2, [r7, r6] │ │ add.w r0, r0, r4 │ │ - b.n 9cf0e │ │ + b.n 9cf1a │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r2, r3, r4, r5, r6, ip} │ │ - b.n 9c714 │ │ - ldr r1, [pc, #176] @ (9cc88 ) │ │ - b.n 9d1ea │ │ - ldr r7, [pc, #1020] @ (9cfd8 ) │ │ - b.n 9d27c │ │ + b.n 9c720 │ │ + ldr r1, [pc, #176] @ (9cc94 ) │ │ + b.n 9d1f6 │ │ + ldr r7, [pc, #1020] @ (9cfe4 ) │ │ + b.n 9d288 │ │ movs r0, #169 @ 0xa9 │ │ - b.n 9d322 │ │ + b.n 9d32e │ │ asrs r1, r0, #32 │ │ - b.n 9cd04 │ │ + b.n 9cd10 │ │ movs r4, r0 │ │ - b.n 9cf2a │ │ - strb r0, [r6, r6] │ │ + b.n 9cf36 │ │ + strb r1, [r6, r6] │ │ add.w r0, r0, r4 │ │ - b.n 9cf32 │ │ + b.n 9cf3e │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r1, r2, r4, lr} │ │ - b.n 9d33a │ │ + b.n 9d346 │ │ movs r7, r0 │ │ and.w r9, r0, ip, asr #16 │ │ - b.n 9d212 │ │ - ldr r7, [pc, #1020] @ (9d000 ) │ │ - b.n 9d2a4 │ │ + b.n 9d21e │ │ + ldr r7, [pc, #1020] @ (9d00c ) │ │ + b.n 9d2b0 │ │ movs r4, r0 │ │ and.w r0, r0, r1, lsl #16 │ │ - b.n 9d34e │ │ + b.n 9d35a │ │ movs r2, r0 │ │ and.w r7, r0, r5, ror #2 │ │ - b.n 9d226 │ │ + b.n 9d232 │ │ lsrs r7, r7, #31 │ │ - b.n 9d2b8 │ │ + b.n 9d2c4 │ │ ands r5, r1 │ │ - b.n 9d11e │ │ + b.n 9d12a │ │ asrs r0, r7, #32 │ │ - b.n 9c760 │ │ + b.n 9c76c │ │ movs r4, r0 │ │ - b.n 9cf66 │ │ + b.n 9cf72 │ │ movs r0, #174 @ 0xae │ │ - b.n 9d36a │ │ + b.n 9d376 │ │ asrs r1, r0, #32 │ │ - b.n 9cd4c │ │ - strb r7, [r3, r6] │ │ + b.n 9cd58 │ │ + strb r0, [r4, r6] │ │ add.w r0, r0, r4 │ │ - b.n 9cf76 │ │ + b.n 9cf82 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r5} │ │ - b.n 9c77c │ │ + b.n 9c788 │ │ movs r0, #190 @ 0xbe │ │ - b.n 9d382 │ │ + b.n 9d38e │ │ asrs r4, r3, #32 │ │ - b.n 9c784 │ │ + b.n 9c790 │ │ movs r0, r0 │ │ - b.n 9cd68 │ │ + b.n 9cd74 │ │ asrs r1, r0, #32 │ │ - b.n 9cd6c │ │ + b.n 9cd78 │ │ str??.w lr, [r9], #255 │ │ - cmp r2, #51 @ 0x33 │ │ - vtbx.8 d18, {d23-d24}, d31 │ │ - vshll.u32 q9, d3, #23 │ │ - vtbl.8 d18, {d23-d24}, d23 │ │ - vrsqrte.f16 , │ │ - vtbl.8 d18, {d22-d23}, d7 │ │ + cmp r2, #189 @ 0xbd │ │ + @ instruction: 0xfff72a79 │ │ + @ instruction: 0xfff72a9d │ │ + vshll.u32 q9, d17, #23 │ │ + vsli.64 , q14, #55 @ 0x37 │ │ + vshll.u32 q9, d1, #22 │ │ vcvta.s16.f16 d29, d12 │ │ - b.n 9d108 │ │ - ldr r0, [pc, #0] @ (9cc70 ) │ │ + b.n 9d114 │ │ + ldr r0, [pc, #0] @ (9cc7c ) │ │ stmdb sp!, {r0, r2, r3, ip, sp, pc} │ │ - b.n 9cfb6 │ │ - beq.n 9cca0 │ │ - b.n 9d114 │ │ + b.n 9cfc2 │ │ + beq.n 9ccac │ │ + b.n 9d120 │ │ ands r0, r0 │ │ - b.n 9cfbe │ │ + b.n 9cfca │ │ movs r0, r1 │ │ - b.n 9d198 │ │ + b.n 9d1a4 │ │ movs r6, r1 │ │ stmia.w r0, {r3, ip, sp} │ │ - b.n 9d1a0 │ │ + b.n 9d1ac │ │ movs r0, r0 │ │ - b.n 9d3ce │ │ + b.n 9d3da │ │ asrs r0, r0, #32 │ │ - b.n 9d3d2 │ │ + b.n 9d3de │ │ movs r0, #4 │ │ - b.n 9cfd6 │ │ + b.n 9cfe2 │ │ adds r0, #8 │ │ - b.n 9c7b4 │ │ + b.n 9c7c0 │ │ strb r0, [r0, #0] │ │ - b.n 9d3de │ │ + b.n 9d3ea │ │ adds r0, #4 │ │ - b.n 9c6b8 │ │ + b.n 9c6c4 │ │ adds r0, #8 │ │ - b.n 9c6bc │ │ - vqdmlsl.s16 q7, d13, d0 │ │ + b.n 9c6c8 │ │ + vqdmlsl.s16 q7, d14, d0 │ │ str r0, [r0, r0] │ │ - b.n 9cfee │ │ + b.n 9cffa │ │ lsls r2, r1, #4 │ │ - b.n 9d392 │ │ + b.n 9d39e │ │ movs r5, r1 │ │ ldrh r0, [r0, #16] │ │ str r1, [r0, r0] │ │ - b.n 9d1c4 │ │ + b.n 9d1d0 │ │ movs r5, r0 │ │ - b.n 9cffe │ │ - vdiv.f64 d30, d11, d0 │ │ + b.n 9d00a │ │ + vfnms.f64 d30, d0, d0 │ │ movs r0, r0 │ │ - b.n 9d366 │ │ + b.n 9d372 │ │ movs r1, r4 │ │ lsrs r0, r0, #8 │ │ adds r0, #4 │ │ - b.n 9c704 │ │ + b.n 9c710 │ │ asrs r5, r0, #32 │ │ - b.n 9d012 │ │ + b.n 9d01e │ │ movs r0, #4 │ │ - b.n 9d016 │ │ + b.n 9d022 │ │ str r0, [r0, #0] │ │ - b.n 9d01a │ │ - vqdmlsl.s16 q7, d0, d0 │ │ + b.n 9d026 │ │ + vqdmlsl.s16 q7, d1, d0 │ │ str r0, [r0, r0] │ │ - b.n 9d022 │ │ + b.n 9d02e │ │ movs r1, r0 │ │ - b.n 9d3c6 │ │ + b.n 9d3d2 │ │ movs r6, r3 │ │ - bge.n 9ccea │ │ + bge.n 9ccf6 │ │ strb r6, [r0, #0] │ │ - b.n 9d02e │ │ + b.n 9d03a │ │ lsls r4, r7, #1 │ │ - b.n 9c830 │ │ + b.n 9c83c │ │ movs r1, r0 │ │ - b.n 9d3a0 │ │ + b.n 9d3ac │ │ asrs r0, r7, #1 │ │ - b.n 9c838 │ │ + b.n 9c844 │ │ ands r7, r0 │ │ - b.n 9d03e │ │ + b.n 9d04a │ │ movs r0, r0 │ │ - b.n 9ce20 │ │ + b.n 9ce2c │ │ asrs r1, r0, #32 │ │ - b.n 9ce24 │ │ + b.n 9ce30 │ │ lsls r0, r4, #1 │ │ - b.n 9c82a │ │ + b.n 9c836 │ │ ands r1, r0 │ │ - cbz r0, 9cd36 │ │ + cbz r0, 9cd42 │ │ movs r0, r0 │ │ - b.n 9d3c0 │ │ + b.n 9d3cc │ │ ands r1, r0 │ │ lsls r0, r4, #6 │ │ movs r0, r0 │ │ - b.n 9d3ba │ │ + b.n 9d3c6 │ │ asrs r0, r3, #1 │ │ asrs r7, r3, #22 │ │ movs r0, r0 │ │ asrs r0, r4, #14 │ │ adds r0, #84 @ 0x54 │ │ asrs r7, r3, #22 │ │ movs r0, #0 │ │ @@ -176579,70 +176459,70 @@ │ │ asrs r7, r1, #2 │ │ ands r0, r0 │ │ asrs r5, r1, #22 │ │ adds r0, #3 │ │ asrs r7, r1, #2 │ │ ldrsh.w r1, [fp], #255 │ │ lsls r0, r0, #1 │ │ - b.n 9c87c │ │ + b.n 9c888 │ │ asrs r0, r0, #32 │ │ - b.n 9d482 │ │ + b.n 9d48e │ │ movs r0, #4 │ │ - b.n 9d086 │ │ + b.n 9d092 │ │ adds r0, #4 │ │ - b.n 9d08a │ │ + b.n 9d096 │ │ movs r0, r0 │ │ - b.n 9ce6c │ │ - vqdmulh.s d30, d15, d0 │ │ - vmov.f64 d14, #224 @ 0xbf000000 -0.5 │ │ + b.n 9ce78 │ │ + vqdmulh.s16 d30, d0, d0 │ │ + vmov.f64 d14, #240 @ 0xbf800000 -1.0 │ │ asrs r4, r1, #32 │ │ - b.n 9d49a │ │ + b.n 9d4a6 │ │ str r0, [r0, r0] │ │ - b.n 9d51e │ │ + b.n 9d52a │ │ asrs r0, r0, #32 │ │ - b.n 9c862 │ │ + b.n 9c86e │ │ @ instruction: 0xffe1eaff │ │ movs r6, r0 │ │ - b.n 9d0aa │ │ - vfnms.f64 d14, d4, d0 │ │ + b.n 9d0b6 │ │ + vfnms.f64 d14, d5, d0 │ │ @ instruction: 0xffdeeaff │ │ - subs r4, r1, r5 │ │ + subs r0, r4, r5 │ │ movs r4, r0 │ │ - lsls r4, r7, #2 │ │ - vcvt.f32.u32 , q12, #9 │ │ - vqrshrun.s64 d30, q10, #9 │ │ - vcvt.f32.u32 , q4, #10 │ │ + lsls r3, r6, #4 │ │ + @ instruction: 0xfff71ffe │ │ + vqrshrun.s64 d30, q4, #9 │ │ + @ instruction: 0xfff61fde │ │ vtbx.8 d17, {d7}, d15 │ │ - b.n 9d398 │ │ + b.n 9d3a4 │ │ asrs r1, r0, #32 │ │ - b.n 9ce8e │ │ + b.n 9ce9a │ │ movs r5, r2 │ │ - b.n 9d434 │ │ + b.n 9d440 │ │ movs r3, r0 │ │ ldrh r0, [r0, #16] │ │ lsls r0, r6, #3 │ │ - b.n 9c8d8 │ │ + b.n 9c8e4 │ │ movs r0, r0 │ │ - b.n 9cebc │ │ + b.n 9cec8 │ │ lsls r1, r0, #4 │ │ - b.n 9ccc2 │ │ + b.n 9ccce │ │ vrhadd.u16 d14, d14, d31 │ │ asrs r5, r2, #27 │ │ - b.n 9d3b8 │ │ + b.n 9d3c4 │ │ asrs r1, r0, #32 │ │ - b.n 9ceae │ │ + b.n 9ceba │ │ movs r3, r1 │ │ - b.n 9d454 │ │ + b.n 9d460 │ │ movs r1, r2 │ │ ldrh r0, [r0, #16] │ │ movs r4, r0 │ │ - b.n 9d2d8 │ │ + b.n 9d2e4 │ │ asrs r1, r0, #4 │ │ - b.n 9ccde │ │ - blx 49dec0 │ │ + b.n 9ccea │ │ + blx 49decc │ │ movs r0, r6 │ │ movs r0, r0 │ │ lsls r0, r5, #2 │ │ movs r0, r0 │ │ lsls r0, r7, #1 │ │ movs r0, r0 │ │ lsls r4, r5, #1 │ │ @@ -176660,174 +176540,174 @@ │ │ lsls r0, r0, #3 │ │ movs r0, r0 │ │ lsls r4, r6, #2 │ │ movs r0, r0 │ │ lsls r4, r3, #2 │ │ movs r0, r0 │ │ lsls r4, r3, #2 │ │ - b.n 9c934 │ │ + b.n 9c940 │ │ movs r0, r0 │ │ - b.n 9cf18 │ │ + b.n 9cf24 │ │ vrhadd.u16 d14, d14, d31 │ │ movs r0, r0 │ │ - b.n 9d4a2 │ │ + b.n 9d4ae │ │ lsls r0, r1, #2 │ │ lsls r7, r3, #22 │ │ movs r0, r0 │ │ lsls r7, r1, #2 │ │ vrhadd.u16 d0, d14, d31 │ │ movs r0, r0 │ │ - b.n 9d552 │ │ + b.n 9d55e │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r2, #2 │ │ - b.n 9c958 │ │ + b.n 9c964 │ │ movs r0, r0 │ │ - b.n 9cf3c │ │ + b.n 9cf48 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r0, #2 │ │ - b.n 9c964 │ │ + b.n 9c970 │ │ movs r0, r0 │ │ - b.n 9cf48 │ │ + b.n 9cf54 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r5, #1 │ │ - b.n 9c970 │ │ + b.n 9c97c │ │ movs r0, r0 │ │ - b.n 9cf54 │ │ + b.n 9cf60 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r3, #1 │ │ - b.n 9c97c │ │ + b.n 9c988 │ │ movs r0, r0 │ │ - b.n 9cf60 │ │ + b.n 9cf6c │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r4, #1 │ │ - b.n 9c988 │ │ + b.n 9c994 │ │ movs r0, r0 │ │ - b.n 9cf6c │ │ + b.n 9cf78 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r1, #1 │ │ - b.n 9c994 │ │ + b.n 9c9a0 │ │ movs r0, r0 │ │ - b.n 9cf78 │ │ + b.n 9cf84 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r3, #1 │ │ - b.n 9c9a0 │ │ + b.n 9c9ac │ │ movs r0, r0 │ │ - b.n 9cf84 │ │ + b.n 9cf90 │ │ vrhadd.u16 d14, d14, d31 │ │ movs r0, r5 │ │ - b.n 9c9ac │ │ + b.n 9c9b8 │ │ movs r0, r0 │ │ - b.n 9cf90 │ │ + b.n 9cf9c │ │ vrhadd.u16 d14, d14, d31 │ │ movs r4, r7 │ │ - b.n 9c9b8 │ │ + b.n 9c9c4 │ │ movs r0, r0 │ │ - b.n 9cf9c │ │ + b.n 9cfa8 │ │ vrhadd.u16 d14, d14, d31 │ │ movs r4, r5 │ │ - b.n 9c9c4 │ │ + b.n 9c9d0 │ │ movs r0, r0 │ │ - b.n 9cfa8 │ │ + b.n 9cfb4 │ │ vrhadd.u16 d14, d14, d31 │ │ - @ instruction: 0xf7380003 │ │ - b.n 9d5e6 │ │ - vtbl.8 d28, {d22-d25}, d26 │ │ - vmull.u , d22, d15 │ │ - @ instruction: 0xfff70db0 │ │ - vrsra.u32 d16, d20, #9 │ │ - @ instruction: 0xfff7bb97 │ │ - vsri.32 q14, , #10 │ │ - vtbx.8 d30, {d22-d23}, d3 │ │ - vrinta.f16 , │ │ - vqmovun.s32 d19, q8 │ │ - @ instruction: 0xfff7fed8 │ │ - @ instruction: 0xfff61cf8 │ │ + @ instruction: 0xf73c0003 │ │ + b.n 9d478 │ │ + vmull.u q14, d22, d1 │ │ + vcvt.f32.u32 d17, d5, #10 │ │ + @ instruction: 0xfff70e98 │ │ + vrecpe.u16 q8, q12 │ │ + @ instruction: 0xfff7bad6 │ │ + vrintx.f16 d28, d28 │ │ + vtbl.8 d30, {d22-d23}, d23 │ │ + vsli.64 d29, d2, #54 @ 0x36 │ │ + vrshr.u32 , q2, #10 │ │ + vqrdmlsh.s , , d15[0] │ │ + vcvt.f32.u32 , q15, #10 │ │ @ instruction: 0xfff748f0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n 9d3e4 │ │ + b.n 9d3f0 │ │ str r1, [r0, #0] │ │ - b.n 9d20e │ │ + b.n 9d21a │ │ asrs r3, r6, #32 │ │ - b.n 9d612 │ │ + b.n 9d61e │ │ ands r3, r0 │ │ - b.n 9d216 │ │ + b.n 9d222 │ │ str r2, [r0, r0] │ │ - b.n 9d21a │ │ + b.n 9d226 │ │ strb r0, [r0, #0] │ │ - b.n 9d21e │ │ + b.n 9d22a │ │ ldc2 11, cr14, [ip, #-1020]! @ 0xfffffc04 @ │ │ movs r0, r0 │ │ - b.n 9d586 │ │ + b.n 9d592 │ │ movs r7, r1 │ │ subs r0, r0, r0 │ │ movs r7, r0 │ │ - b.n 9d22e │ │ + b.n 9d23a │ │ asrs r6, r0, #32 │ │ - b.n 9d232 │ │ + b.n 9d23e │ │ movs r0, #5 │ │ - b.n 9d236 │ │ + b.n 9d242 │ │ adds r0, #4 │ │ - b.n 9d23a │ │ + b.n 9d246 │ │ movs r3, r2 │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n 9d242 │ │ + b.n 9d24e │ │ movs r0, r0 │ │ - b.n 9d646 │ │ + b.n 9d652 │ │ movs r0, r0 │ │ - b.n 9d5b2 │ │ + b.n 9d5be │ │ ldrh r0, [r6, #6] │ │ lsrs r5, r7, #2 │ │ asrs r4, r6, #32 │ │ - b.n 9ca50 │ │ + b.n 9ca5c │ │ movs r4, r0 │ │ - b.n 9d256 │ │ + b.n 9d262 │ │ movs r1, #222 @ 0xde │ │ - b.n 9d51a │ │ + b.n 9d526 │ │ asrs r1, r0, #32 │ │ - b.n 9d03c │ │ - strb r3, [r4, r3] │ │ + b.n 9d048 │ │ + strb r4, [r4, r3] │ │ add.w r0, r0, r4 │ │ - b.n 9d266 │ │ + b.n 9d272 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r2, r4, ip} │ │ - b.n 9ca6c │ │ + b.n 9ca78 │ │ ands r0, r0 │ │ - b.n 9d272 │ │ + b.n 9d27e │ │ cmp r7, #119 @ 0x77 │ │ - b.n 9d676 │ │ + b.n 9d682 │ │ asrs r1, r0, #32 │ │ - b.n 9d058 │ │ - strb r4, [r3, r3] │ │ + b.n 9d064 │ │ + strb r5, [r3, r3] │ │ add.w r0, r0, r4 │ │ - b.n 9d282 │ │ + b.n 9d28e │ │ ldrh r0, [r6, #6] │ │ - ldmia.w sp!, {r0, r4, r9} │ │ - vcvtp.s16.f16 d16, d29 │ │ + ldmia.w sp!, {r0, r2, r6, r8, r9} │ │ + vcvtm.s16.f16 q8, │ │ @ instruction: 0xfff74ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n 9d470 │ │ - beq.n 9cfc0 │ │ - b.n 9d3f4 │ │ + b.n 9d47c │ │ + beq.n 9cfcc │ │ + b.n 9d400 │ │ str r0, [r0, r0] │ │ - b.n 9d29e │ │ + b.n 9d2aa │ │ movs r6, r2 │ │ - b.n 9d6a2 │ │ + b.n 9d6ae │ │ movs r4, r4 │ │ - b.n 9d60c │ │ + b.n 9d618 │ │ movs r3, r7 │ │ ldrh r0, [r0, #16] │ │ str r1, [r0, #0] │ │ - b.n 9d2ae │ │ + b.n 9d2ba │ │ asrs r0, r1, #32 │ │ - b.n 9d490 │ │ + b.n 9d49c │ │ ands r2, r0 │ │ - b.n 9d2b6 │ │ + b.n 9d2c2 │ │ movs r1, #3 │ │ - b.n 9ce9c │ │ - bfcsel 0, 9d07c , 4, eq │ │ + b.n 9cea8 │ │ + bfcsel 0, 9d088 , 4, eq │ │ lsls r4, r6, #23 │ │ movs r0, r0 │ │ lsls r0, r5, #10 │ │ movs r0, r0 │ │ lsls r4, r4, #9 │ │ movs r0, r0 │ │ lsls r4, r4, #9 │ │ @@ -176895,3862 +176775,3862 @@ │ │ lsls r0, r0, #6 │ │ movs r0, r0 │ │ lsls r0, r0, #6 │ │ movs r0, r0 │ │ lsls r4, r2, #20 │ │ movs r0, r0 │ │ movs r0, r0 │ │ - b.n 9d6c2 │ │ + b.n 9d6ce │ │ movs r7, r1 │ │ lsrs r0, r0, #8 │ │ movs r1, r2 │ │ - b.n 9d75e │ │ + b.n 9d76a │ │ strb r3, [r0, #0] │ │ - b.n 9d362 │ │ + b.n 9d36e │ │ movs r0, r0 │ │ - b.n 9cb40 │ │ + b.n 9cb4c │ │ movs r0, r3 │ │ - b.n 9d544 │ │ + b.n 9d550 │ │ asrs r5, r0, #32 │ │ - b.n 9d36e │ │ + b.n 9d37a │ │ movs r0, #6 │ │ - b.n 9d372 │ │ + b.n 9d37e │ │ adds r0, #4 │ │ - b.n 9d376 │ │ + b.n 9d382 │ │ lsrs r6, r7, #19 │ │ add.w r0, r0, ip, lsr #4 │ │ - b.n 9cbf8 │ │ + b.n 9cc04 │ │ movs r0, r3 │ │ - b.n 9cb7c │ │ + b.n 9cb88 │ │ movs r0, r0 │ │ - b.n 9d6e8 │ │ + b.n 9d6f4 │ │ lsls r3, r1, #3 │ │ lsrs r0, r0, #8 │ │ movs r1, r3 │ │ - b.n 9d6fc │ │ + b.n 9d708 │ │ lsls r2, r2, #3 │ │ lsrs r0, r0, #8 │ │ movs r5, r2 │ │ - b.n 9d704 │ │ + b.n 9d710 │ │ lsls r5, r3, #6 │ │ lsrs r0, r0, #8 │ │ - beq.n 9d094 │ │ - b.n 9d4f4 │ │ + beq.n 9d0a0 │ │ + b.n 9d500 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {} │ │ - b.n 9d712 │ │ + b.n 9d71e │ │ movs r0, r0 │ │ asrs r4, r2, #13 │ │ @ instruction: 0xfffa0aff │ │ lsls r0, r2, #3 │ │ - b.n 9d3fa │ │ + b.n 9d406 │ │ strb r3, [r0, #0] │ │ - b.n 9d3b6 │ │ + b.n 9d3c2 │ │ movs r0, r3 │ │ - b.n 9cb94 │ │ + b.n 9cba0 │ │ movs r0, r2 │ │ - b.n 9d7be │ │ + b.n 9d7ca │ │ asrs r4, r3, #32 │ │ - b.n 9cb9c │ │ + b.n 9cba8 │ │ asrs r5, r0, #32 │ │ - b.n 9d3c6 │ │ + b.n 9d3d2 │ │ movs r0, r0 │ │ - b.n 9cba4 │ │ + b.n 9cbb0 │ │ movs r0, r2 │ │ - b.n 9d5a8 │ │ + b.n 9d5b4 │ │ movs r0, #6 │ │ - b.n 9d3d2 │ │ + b.n 9d3de │ │ adds r0, #4 │ │ - b.n 9d3d6 │ │ + b.n 9d3e2 │ │ lsrs r6, r4, #19 │ │ add.w r0, r0, r0, lsr #32 │ │ - b.n 9cbd8 │ │ + b.n 9cbe4 │ │ movs r0, r0 │ │ - b.n 9d742 │ │ + b.n 9d74e │ │ @ instruction: 0xffec1aff │ │ str r0, [r3, #0] │ │ - b.n 9cbd4 │ │ + b.n 9cbe0 │ │ movs r0, r0 │ │ - b.n 9d75a │ │ + b.n 9d766 │ │ lsls r4, r2, #6 │ │ lsrs r0, r0, #8 │ │ lsls r5, r2, #3 │ │ - b.n 9d462 │ │ + b.n 9d46e │ │ movs r0, r0 │ │ - b.n 9d75a │ │ + b.n 9d766 │ │ lsls r1, r2, #6 │ │ - ldr r2, [pc, #0] @ (9d0bc ) │ │ + ldr r2, [pc, #0] @ (9d0c8 ) │ │ movs r1, r2 │ │ - b.n 9d802 │ │ + b.n 9d80e │ │ movs r0, #24 │ │ - b.n 9d5e0 │ │ + b.n 9d5ec │ │ movs r0, r0 │ │ - b.n 9cbe4 │ │ + b.n 9cbf0 │ │ movs r0, r1 │ │ - b.n 9d5e8 │ │ + b.n 9d5f4 │ │ asrs r6, r0, #32 │ │ - b.n 9d412 │ │ + b.n 9d41e │ │ adds r0, #0 │ │ - b.n 9d816 │ │ + b.n 9d822 │ │ lsrs r6, r2, #19 │ │ add.w r0, r0, ip, lsl #4 │ │ - b.n 9cc98 │ │ + b.n 9cca4 │ │ movs r0, r1 │ │ - b.n 9cc1c │ │ + b.n 9cc28 │ │ movs r0, r0 │ │ - b.n 9d788 │ │ + b.n 9d794 │ │ lsls r0, r0, #7 │ │ lsrs r0, r0, #8 │ │ movs r6, r3 │ │ - b.n 9d79c │ │ + b.n 9d7a8 │ │ lsls r7, r1, #8 │ │ lsrs r0, r0, #8 │ │ movs r2, r3 │ │ - b.n 9d7a4 │ │ + b.n 9d7b0 │ │ lsls r3, r0, #7 │ │ lsrs r0, r0, #8 │ │ @ instruction: 0xffd6eaff │ │ movs r0, r0 │ │ - b.n 9d7ae │ │ + b.n 9d7ba │ │ movs r0, r0 │ │ asrs r4, r2, #13 │ │ @ instruction: 0xffd30aff │ │ lsls r0, r2, #3 │ │ - b.n 9d496 │ │ + b.n 9d4a2 │ │ strb r3, [r0, #0] │ │ - b.n 9d452 │ │ + b.n 9d45e │ │ movs r0, r3 │ │ - b.n 9cc30 │ │ + b.n 9cc3c │ │ movs r1, r2 │ │ - b.n 9d85a │ │ + b.n 9d866 │ │ asrs r4, r3, #32 │ │ - b.n 9cc38 │ │ + b.n 9cc44 │ │ asrs r5, r0, #32 │ │ - b.n 9d462 │ │ + b.n 9d46e │ │ movs r0, r0 │ │ - b.n 9cc40 │ │ + b.n 9cc4c │ │ movs r0, r2 │ │ - b.n 9d644 │ │ + b.n 9d650 │ │ movs r0, #6 │ │ - b.n 9d46e │ │ + b.n 9d47a │ │ adds r0, #4 │ │ - b.n 9d472 │ │ + b.n 9d47e │ │ lsrs r7, r7, #18 │ │ add.w r0, r0, r4, lsr #4 │ │ - b.n 9ccf4 │ │ + b.n 9cd00 │ │ movs r0, r2 │ │ - b.n 9cc78 │ │ + b.n 9cc84 │ │ movs r0, r0 │ │ - b.n 9d7e4 │ │ + b.n 9d7f0 │ │ lsls r3, r3, #5 │ │ lsrs r0, r0, #8 │ │ asrs r0, r3, #32 │ │ - b.n 9cc74 │ │ + b.n 9cc80 │ │ movs r0, r0 │ │ - b.n 9d7f0 │ │ + b.n 9d7fc │ │ lsls r4, r0, #5 │ │ lsrs r0, r0, #8 │ │ movs r0, #213 @ 0xd5 │ │ - b.n 9d4f8 │ │ + b.n 9d504 │ │ movs r0, r0 │ │ - b.n 9d7fe │ │ + b.n 9d80a │ │ lsls r1, r0, #5 │ │ - ldr r2, [pc, #0] @ (9d15c ) │ │ + ldr r2, [pc, #0] @ (9d168 ) │ │ movs r1, r2 │ │ - b.n 9d8a2 │ │ + b.n 9d8ae │ │ movs r0, #24 │ │ - b.n 9d680 │ │ + b.n 9d68c │ │ movs r0, r0 │ │ - b.n 9cc84 │ │ + b.n 9cc90 │ │ movs r0, r1 │ │ - b.n 9d688 │ │ + b.n 9d694 │ │ adds r0, #0 │ │ - b.n 9d8b2 │ │ + b.n 9d8be │ │ lsrs r7, r5, #18 │ │ add.w r0, r0, ip, lsl #4 │ │ - b.n 9cd34 │ │ + b.n 9cd40 │ │ movs r0, r1 │ │ - b.n 9ccb8 │ │ + b.n 9ccc4 │ │ movs r0, r0 │ │ - b.n 9d824 │ │ + b.n 9d830 │ │ lsls r1, r0, #6 │ │ lsrs r0, r0, #8 │ │ movs r3, r4 │ │ - b.n 9d838 │ │ + b.n 9d844 │ │ lsls r4, r0, #7 │ │ lsrs r0, r0, #8 │ │ movs r7, r3 │ │ - b.n 9d840 │ │ + b.n 9d84c │ │ lsls r3, r1, #6 │ │ lsrs r0, r0, #8 │ │ @ instruction: 0xffafeaff │ │ movs r5, r0 │ │ - b.n 9d4de │ │ + b.n 9d4ea │ │ asrs r6, r0, #32 │ │ - b.n 9d4e2 │ │ + b.n 9d4ee │ │ movs r0, #4 │ │ - b.n 9d4e6 │ │ - beq.n 9d1e0 │ │ - b.n 9d640 │ │ - ldr r7, [pc, #960] @ (9d56c ) │ │ - ldmia.w sp!, {r1, r2, r7, r8, sl, fp, pc} │ │ + b.n 9d4f2 │ │ + beq.n 9d1ec │ │ + b.n 9d64c │ │ + ldr r7, [pc, #960] @ (9d578 ) │ │ + ldmia.w sp!, {r0, r1, r2, r7, r8, sl, fp, pc} │ │ and.w r0, r0, r5 │ │ - b.n 9d4f6 │ │ + b.n 9d502 │ │ asrs r6, r0, #32 │ │ - b.n 9d4fa │ │ + b.n 9d506 │ │ movs r0, #4 │ │ - b.n 9d4fe │ │ + b.n 9d50a │ │ asrs r3, r1, #3 │ │ add.w r0, r0, r4, lsl #4 │ │ - b.n 9cd70 │ │ + b.n 9cd7c │ │ movs r0, #188 @ 0xbc │ │ - b.n 9cd74 │ │ + b.n 9cd80 │ │ asrs r7, r7, #2 │ │ - b.n 9d5d0 │ │ + b.n 9d5dc │ │ asrs r4, r0, #32 │ │ - b.n 9cd5c │ │ + b.n 9cd68 │ │ asrs r7, r7, #2 │ │ - b.n 9d5da │ │ + b.n 9d5e6 │ │ asrs r4, r7, #2 │ │ - b.n 9cd64 │ │ - beq.n 9d214 │ │ - b.n 9d674 │ │ + b.n 9cd70 │ │ + beq.n 9d220 │ │ + b.n 9d680 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {} │ │ - b.n 9d88e │ │ + b.n 9d89a │ │ @ instruction: 0xff9b0aff │ │ movs r0, r3 │ │ - b.n 9cd18 │ │ + b.n 9cd24 │ │ movs r0, r0 │ │ - b.n 9d892 │ │ + b.n 9d89e │ │ lsls r4, r6, #7 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n 9d8a6 │ │ + b.n 9d8b2 │ │ movs r6, r2 │ │ - b.n 9d93e │ │ + b.n 9d94a │ │ @ instruction: 0xff950aff │ │ movs r4, r4 │ │ - b.n 9d69c │ │ + b.n 9d6a8 │ │ adds r0, #0 │ │ - b.n 9cd24 │ │ + b.n 9cd30 │ │ asrs r5, r0, #32 │ │ - b.n 9d54e │ │ + b.n 9d55a │ │ movs r0, #6 │ │ - b.n 9d552 │ │ + b.n 9d55e │ │ adds r0, #4 │ │ - b.n 9d556 │ │ + b.n 9d562 │ │ lsrs r6, r0, #18 │ │ add.w r0, r0, r4, asr #32 │ │ - b.n 9cc54 │ │ - beq.n 9d258 │ │ - b.n 9d6b8 │ │ + b.n 9cc60 │ │ + beq.n 9d264 │ │ + b.n 9d6c4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {} │ │ - b.n 9d8d2 │ │ + b.n 9d8de │ │ @ instruction: 0xff8a0aff │ │ movs r4, r0 │ │ - b.n 9cddc │ │ + b.n 9cde8 │ │ movs r7, r7 │ │ - b.n 9d8d6 │ │ + b.n 9d8e2 │ │ lsls r3, r1, #8 │ │ ldrh r0, [r0, #16] │ │ asrs r5, r2, #3 │ │ - b.n 9d5e8 │ │ + b.n 9d5f4 │ │ movs r4, r3 │ │ - b.n 9d74c │ │ + b.n 9d758 │ │ movs r0, r0 │ │ - b.n 9d8f2 │ │ + b.n 9d8fe │ │ movs r1, #1 │ │ - b.n 9d16a │ │ + b.n 9d176 │ │ asrs r1, r0, #2 │ │ - b.n 9d358 │ │ + b.n 9d364 │ │ asrs r4, r7, #30 │ │ - b.n 9d5f4 │ │ + b.n 9d600 │ │ movs r0, #20 │ │ - b.n 9d75a │ │ + b.n 9d766 │ │ asrs r1, r0, #2 │ │ - b.n 9d35e │ │ + b.n 9d36a │ │ asrs r0, r6, #2 │ │ - b.n 9d600 │ │ + b.n 9d60c │ │ asrs r1, r0, #32 │ │ - b.n 9d366 │ │ + b.n 9d372 │ │ movs r0, #8 │ │ asrs r1, r0, #10 │ │ strb r6, [r6, #2] │ │ asrs r1, r2, #7 │ │ lsls r4, r0, #2 │ │ adds r6, r0, r2 │ │ movs r0, #4 │ │ - b.n 9ce14 │ │ + b.n 9ce20 │ │ movs r4, r0 │ │ - b.n 9d89a │ │ + b.n 9d8a6 │ │ lsls r5, r5, #3 │ │ subs r0, r0, r0 │ │ movs r0, #213 @ 0xd5 │ │ - b.n 9d628 │ │ + b.n 9d634 │ │ strb r6, [r6, #2] │ │ - b.n 9d624 │ │ + b.n 9d630 │ │ adds r0, #0 │ │ - b.n 9cda8 │ │ + b.n 9cdb4 │ │ movs r1, #2 │ │ - b.n 9d1aa │ │ + b.n 9d1b6 │ │ movs r7, r0 │ │ - b.n 9d390 │ │ + b.n 9d39c │ │ movs r0, r1 │ │ - b.n 9d792 │ │ + b.n 9d79e │ │ movs r1, r1 │ │ stmia.w r4, {} │ │ - b.n 9d9da │ │ + b.n 9d9e6 │ │ adds r0, #4 │ │ - b.n 9ce40 │ │ + b.n 9ce4c │ │ movs r1, r0 │ │ - b.n 9d948 │ │ + b.n 9d954 │ │ vpmin.u32 , q14, │ │ movs r0, r0 │ │ - b.n 9cdce │ │ + b.n 9cdda │ │ adds r0, #4 │ │ - b.n 9cdd2 │ │ + b.n 9cdde │ │ movs r0, #4 │ │ - b.n 9d5f2 │ │ + b.n 9d5fe │ │ movs r1, r1 │ │ stmia.w sp, {r0, r2} │ │ - b.n 9d5fa │ │ - str r0, [sp, #240] @ 0xf0 │ │ + b.n 9d606 │ │ + str r0, [sp, #244] @ 0xf4 │ │ @ instruction: 0xeb00d01c │ │ - b.n 9d758 │ │ + b.n 9d764 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {} │ │ - b.n 9d976 │ │ + b.n 9d982 │ │ movs r0, r0 │ │ asrs r4, r2, #13 │ │ vpmin.u32 q8, , │ │ lsls r0, r0, #10 │ │ ldmia.w r4, {r0, r4} │ │ - b.n 9da1a │ │ - add r0, pc, #12 @ (adr r0, 9d2e8 ) │ │ - b.n 9d61e │ │ + b.n 9da26 │ │ + add r0, pc, #12 @ (adr r0, 9d2f4 ) │ │ + b.n 9d62a │ │ str r0, [sp, #112] @ 0x70 │ │ - b.n 9cdfc │ │ + b.n 9ce08 │ │ asrs r5, r0, #32 │ │ - b.n 9d626 │ │ + b.n 9d632 │ │ strb r0, [r3, #0] │ │ - b.n 9ce04 │ │ + b.n 9ce10 │ │ movs r0, #6 │ │ - b.n 9d62e │ │ + b.n 9d63a │ │ movs r0, r0 │ │ - b.n 9ce0c │ │ + b.n 9ce18 │ │ movs r0, r2 │ │ - b.n 9d810 │ │ + b.n 9d81c │ │ adds r0, #4 │ │ - b.n 9d63a │ │ + b.n 9d646 │ │ lsrs r5, r1, #17 │ │ add.w r0, r0, r0, lsr #32 │ │ - b.n 9ce3c │ │ + b.n 9ce48 │ │ asrs r2, r1, #32 │ │ - b.n 9d646 │ │ + b.n 9d652 │ │ movs r0, r0 │ │ - b.n 9d9aa │ │ + b.n 9d9b6 │ │ lsls r4, r4, #6 │ │ subs r0, r0, r0 │ │ movs r4, r2 │ │ - b.n 9cecc │ │ + b.n 9ced8 │ │ strh r0, [r0, #0] │ │ - b.n 9da56 │ │ + b.n 9da62 │ │ movs r0, r0 │ │ - b.n 9d9ba │ │ + b.n 9d9c6 │ │ lsls r0, r0, #6 │ │ lsrs r0, r0, #8 │ │ movs r0, r3 │ │ - b.n 9ce4c │ │ + b.n 9ce58 │ │ movs r0, r0 │ │ - b.n 9d9c6 │ │ + b.n 9d9d2 │ │ lsls r4, r7, #5 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n 9d9dc │ │ + b.n 9d9e8 │ │ lsls r3, r7, #5 │ │ lsrs r0, r0, #8 │ │ lsls r5, r2, #3 │ │ - b.n 9d6d6 │ │ + b.n 9d6e2 │ │ movs r0, r0 │ │ - b.n 9d9da │ │ + b.n 9d9e6 │ │ lsls r6, r0, #6 │ │ - ldr r2, [pc, #0] @ (9d33c ) │ │ + ldr r2, [pc, #0] @ (9d348 ) │ │ lsls r0, r0, #10 │ │ stmia.w r4, {r0, r4} │ │ - b.n 9da86 │ │ + b.n 9da92 │ │ movs r0, #4 │ │ - b.n 9d68a │ │ + b.n 9d696 │ │ asrs r0, r3, #32 │ │ - b.n 9ce78 │ │ + b.n 9ce84 │ │ adds r0, #0 │ │ - b.n 9da92 │ │ + b.n 9da9e │ │ movs r0, r0 │ │ - b.n 9ce70 │ │ + b.n 9ce7c │ │ movs r0, r1 │ │ - b.n 9d874 │ │ + b.n 9d880 │ │ lsrs r5, r6, #16 │ │ add.w r0, r0, r8 │ │ - b.n 9ce9c │ │ + b.n 9cea8 │ │ asrs r2, r6, #30 │ │ - b.n 9d976 │ │ + b.n 9d982 │ │ strh r4, [r1, #0] │ │ - b.n 9cea4 │ │ + b.n 9ceb0 │ │ subs r7, r7, #7 │ │ - b.n 9da0c │ │ + b.n 9da18 │ │ movs r1, r0 │ │ - b.n 9d612 │ │ + b.n 9d61e │ │ lsls r1, r0, #6 │ │ lsrs r0, r0, #8 │ │ lsls r5, r0, #6 │ │ and.w r0, r0, r6, lsr #32 │ │ - b.n 9da2c │ │ + b.n 9da38 │ │ movs r4, r0 │ │ ldrh r0, [r0, #16] │ │ movs r0, r0 │ │ - b.n 9da26 │ │ + b.n 9da32 │ │ asrs r2, r6, #30 │ │ asrs r0, r1, #12 │ │ subs r7, r7, #7 │ │ asrs r7, r1, #13 │ │ movs r1, r0 │ │ asrs r0, r2, #5 │ │ lsls r6, r1, #3 │ │ lsrs r0, r0, #8 │ │ asrs r7, r2, #32 │ │ - b.n 9d7e8 │ │ + b.n 9d7f4 │ │ lsls r4, r2, #3 │ │ and.w r0, r0, r5 │ │ - b.n 9d6e2 │ │ + b.n 9d6ee │ │ asrs r6, r0, #32 │ │ - b.n 9d6e6 │ │ + b.n 9d6f2 │ │ movs r0, #4 │ │ - b.n 9d6ea │ │ + b.n 9d6f6 │ │ adds r0, #11 │ │ - b.n 9daee │ │ + b.n 9dafa │ │ asrs r7, r1, #1 │ │ @ instruction: 0xeb00d01c │ │ - b.n 9d84c │ │ + b.n 9d858 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {} │ │ - b.n 9da66 │ │ + b.n 9da72 │ │ vpmin.u32 q0, , │ │ asrs r0, r3, #32 │ │ - b.n 9cef0 │ │ + b.n 9cefc │ │ movs r0, r0 │ │ - b.n 9da6c │ │ + b.n 9da78 │ │ lsls r6, r7, #5 │ │ lsrs r0, r0, #8 │ │ movs r0, #4 │ │ - b.n 9cf7c │ │ + b.n 9cf88 │ │ movs r5, r7 │ │ - b.n 9db16 │ │ + b.n 9db22 │ │ movs r7, r7 │ │ - b.n 9da7e │ │ + b.n 9da8a │ │ movs r0, #4 │ │ str r5, [sp, #836] @ 0x344 │ │ movs r7, r7 │ │ str r3, [sp, #328] @ 0x148 │ │ vpmin.u16 q4, q14, │ │ movs r1, r0 │ │ - b.n 9d72a │ │ - ldrh r0, [r6, #58] @ 0x3a │ │ + b.n 9d736 │ │ + ldrh r1, [r6, #58] @ 0x3a │ │ add.w r0, r0, r5, ror #1 │ │ and.w r0, r0, r4 │ │ - b.n 9cfa0 │ │ + b.n 9cfac │ │ lsls r0, r0, #1 │ │ - b.n 9da9a │ │ + b.n 9daa6 │ │ lsls r6, r7, #5 │ │ cmp r2, #0 │ │ movs r0, r1 │ │ - b.n 9da22 │ │ + b.n 9da2e │ │ lsls r4, r2, #3 │ │ subs r0, r0, r0 │ │ movs r0, r3 │ │ - b.n 9cf34 │ │ + b.n 9cf40 │ │ movs r0, r0 │ │ - b.n 9daae │ │ + b.n 9daba │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ asrs r5, r2, #3 │ │ - b.n 9d7b6 │ │ + b.n 9d7c2 │ │ movs r0, r0 │ │ - b.n 9dabc │ │ + b.n 9dac8 │ │ movs r2, r0 │ │ - ldr r2, [pc, #0] @ (9d41c ) │ │ + ldr r2, [pc, #0] @ (9d428 ) │ │ movs r4, r0 │ │ - b.n 9cfc2 │ │ + b.n 9cfce │ │ movs r0, r1 │ │ - b.n 9da46 │ │ + b.n 9da52 │ │ lsls r5, r6, #4 │ │ subs r0, r0, r0 │ │ lsls r5, r2, #3 │ │ - b.n 9d7d8 │ │ + b.n 9d7e4 │ │ movs r0, #28 │ │ - b.n 9d93c │ │ + b.n 9d948 │ │ movs r0, r0 │ │ - b.n 9dae2 │ │ + b.n 9daee │ │ asrs r0, r0, #4 │ │ - b.n 9d35e │ │ + b.n 9d36a │ │ lsls r0, r0, #2 │ │ - b.n 9d548 │ │ + b.n 9d554 │ │ lsls r4, r7, #30 │ │ - b.n 9d7e2 │ │ + b.n 9d7ee │ │ asrs r4, r2, #32 │ │ - b.n 9d948 │ │ + b.n 9d954 │ │ lsls r0, r0, #2 │ │ - b.n 9d54c │ │ + b.n 9d558 │ │ lsls r0, r6, #2 │ │ - b.n 9d7ee │ │ + b.n 9d7fa │ │ asrs r0, r0, #32 │ │ - b.n 9d554 │ │ + b.n 9d560 │ │ movs r0, r1 │ │ asrs r1, r0, #10 │ │ adds r0, #182 @ 0xb6 │ │ asrs r1, r2, #7 │ │ movs r1, r1 │ │ adds r6, r0, r2 │ │ movs r0, r0 │ │ - b.n 9dba2 │ │ + b.n 9dbae │ │ movs r0, r0 │ │ - b.n 9db0e │ │ + b.n 9db1a │ │ mrc2 10, 7, r0, cr11, cr15, {7} @ │ │ adds r0, #4 │ │ - b.n 9d010 │ │ + b.n 9d01c │ │ movs r4, r0 │ │ - b.n 9da98 │ │ + b.n 9daa4 │ │ lsls r1, r5, #3 │ │ subs r0, r0, r0 │ │ lsls r5, r2, #3 │ │ - b.n 9d824 │ │ + b.n 9d830 │ │ adds r1, #0 │ │ - b.n 9d3a2 │ │ + b.n 9d3ae │ │ movs r5, r0 │ │ - b.n 9d7c2 │ │ + b.n 9d7ce │ │ movs r0, #4 │ │ - b.n 9d7c6 │ │ - beq.n 9d4c0 │ │ - b.n 9d920 │ │ - ldr r7, [pc, #960] @ (9d84c ) │ │ + b.n 9d7d2 │ │ + beq.n 9d4cc │ │ + b.n 9d92c │ │ + ldr r7, [pc, #960] @ (9d858 ) │ │ ldmia.w sp!, {r0, r1, r3, r4, r5, r6, r7, r8} │ │ and.w r0, r0, r0 │ │ - b.n 9db42 │ │ + b.n 9db4e │ │ mcr2 10, 7, r0, cr15, cr15, {7} @ │ │ movs r7, r1 │ │ - b.n 9dbde │ │ + b.n 9dbea │ │ asrs r5, r0, #32 │ │ - b.n 9d7e2 │ │ + b.n 9d7ee │ │ movs r0, r0 │ │ - b.n 9cfc0 │ │ + b.n 9cfcc │ │ movs r4, r4 │ │ - b.n 9d9c4 │ │ + b.n 9d9d0 │ │ movs r0, #6 │ │ - b.n 9d7ee │ │ + b.n 9d7fa │ │ adds r0, #4 │ │ - b.n 9d7f2 │ │ + b.n 9d7fe │ │ lsrs r7, r3, #15 │ │ add.w r0, r0, r4, asr #32 │ │ - b.n 9cff4 │ │ + b.n 9d000 │ │ movs r0, r0 │ │ - b.n 9db5e │ │ + b.n 9db6a │ │ mcr2 10, 7, r1, cr5, cr15, {7} @ │ │ movs r0, r0 │ │ - b.n 9db6e │ │ + b.n 9db7a │ │ movs r6, r2 │ │ - b.n 9dc0a │ │ + b.n 9dc16 │ │ mcr2 10, 7, r0, cr2, cr15, {7} @ │ │ movs r0, r2 │ │ - b.n 9cffc │ │ + b.n 9d008 │ │ lsls r0, r6, #2 │ │ - b.n 9d876 │ │ + b.n 9d882 │ │ movs r0, r2 │ │ - b.n 9dafa │ │ + b.n 9db06 │ │ lsls r2, r7, #4 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #32 │ │ - b.n 9d08c │ │ + b.n 9d098 │ │ movs r5, r7 │ │ - b.n 9dc26 │ │ + b.n 9dc32 │ │ movs r7, r7 │ │ - b.n 9db8c │ │ + b.n 9db98 │ │ mrc2 10, 6, r8, cr10, cr15, {7} @ │ │ movs r0, r0 │ │ - b.n 9db9e │ │ + b.n 9dbaa │ │ movs r3, r1 │ │ lsrs r0, r0, #8 │ │ asrs r5, r2, #3 │ │ - b.n 9d8a4 │ │ + b.n 9d8b0 │ │ movs r0, #129 @ 0x81 │ │ - b.n 9d608 │ │ + b.n 9d614 │ │ asrs r1, r0, #4 │ │ - b.n 9d60c │ │ + b.n 9d618 │ │ asrs r4, r3, #32 │ │ - b.n 9d028 │ │ + b.n 9d034 │ │ movs r7, #188 @ 0xbc │ │ - b.n 9d8ae │ │ + b.n 9d8ba │ │ asrs r4, r2, #32 │ │ - b.n 9da10 │ │ + b.n 9da1c │ │ movs r0, #130 @ 0x82 │ │ - b.n 9d614 │ │ + b.n 9d620 │ │ movs r0, #176 @ 0xb0 │ │ - b.n 9d8ba │ │ + b.n 9d8c6 │ │ asrs r2, r0, #32 │ │ - b.n 9d61c │ │ + b.n 9d628 │ │ movs r0, #8 │ │ - b.n 9da20 │ │ + b.n 9da2c │ │ adds r0, #182 @ 0xb6 │ │ - b.n 9d8c4 │ │ + b.n 9d8d0 │ │ movs r0, #240 @ 0xf0 │ │ - b.n 9d8b2 │ │ + b.n 9d8be │ │ asrs r0, r3, #32 │ │ - b.n 9d054 │ │ + b.n 9d060 │ │ movs r0, r0 │ │ - b.n 9dbd0 │ │ + b.n 9dbdc │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #4 │ │ - b.n 9d0d8 │ │ + b.n 9d0e4 │ │ lsls r0, r0, #1 │ │ - b.n 9dbde │ │ + b.n 9dbea │ │ movs r4, r4 │ │ subs r2, #0 │ │ asrs r5, r2, #3 │ │ - b.n 9d8e4 │ │ + b.n 9d8f0 │ │ movs r1, r0 │ │ - b.n 9dc28 │ │ + b.n 9dc34 │ │ mcr2 10, 6, ip, cr3, cr15, {7} @ │ │ lsls r5, r2, #3 │ │ - b.n 9d8f8 │ │ + b.n 9d904 │ │ asrs r0, r0, #2 │ │ - b.n 9d65c │ │ + b.n 9d668 │ │ lsls r0, r0, #4 │ │ - b.n 9d660 │ │ + b.n 9d66c │ │ adds r0, #28 │ │ - b.n 9d07a │ │ + b.n 9d086 │ │ asrs r4, r7, #30 │ │ - b.n 9d900 │ │ + b.n 9d90c │ │ movs r4, r2 │ │ - b.n 9da68 │ │ + b.n 9da74 │ │ asrs r1, r0, #2 │ │ - b.n 9d666 │ │ + b.n 9d672 │ │ asrs r0, r6, #2 │ │ - b.n 9d90c │ │ + b.n 9d918 │ │ asrs r1, r0, #32 │ │ - b.n 9d66e │ │ + b.n 9d67a │ │ @ instruction: 0xffc2eaff │ │ movs r5, r0 │ │ - b.n 9d8b6 │ │ + b.n 9d8c2 │ │ asrs r6, r0, #32 │ │ - b.n 9d8ba │ │ + b.n 9d8c6 │ │ movs r0, #4 │ │ - b.n 9d8be │ │ - beq.n 9d5b8 │ │ - b.n 9da18 │ │ - ldr r7, [pc, #960] @ (9d944 ) │ │ + b.n 9d8ca │ │ + beq.n 9d5c4 │ │ + b.n 9da24 │ │ + ldr r7, [pc, #960] @ (9d950 ) │ │ ldmia.w sp!, {r2, r3, r4, r5, r8} │ │ and.w r0, r0, r5 │ │ - b.n 9d8ce │ │ + b.n 9d8da │ │ asrs r6, r0, #32 │ │ - b.n 9d8d2 │ │ + b.n 9d8de │ │ movs r0, #4 │ │ - b.n 9d8d6 │ │ - beq.n 9d5d0 │ │ - b.n 9da30 │ │ - ldr r7, [pc, #960] @ (9d95c ) │ │ + b.n 9d8e2 │ │ + beq.n 9d5dc │ │ + b.n 9da3c │ │ + ldr r7, [pc, #960] @ (9d968 ) │ │ ldmia.w sp!, {r0, r1, r7, r8, r9, ip, sp} │ │ and.w r0, r0, r0 │ │ - b.n 9dc4e │ │ + b.n 9dc5a │ │ mcr2 10, 5, r0, cr11, cr15, {7} @ │ │ movs r0, r3 │ │ - b.n 9d0d8 │ │ + b.n 9d0e4 │ │ movs r0, r0 │ │ - b.n 9dc52 │ │ + b.n 9dc5e │ │ lsls r4, r0, #4 │ │ lsrs r0, r0, #8 │ │ movs r5, r0 │ │ - b.n 9d8fa │ │ + b.n 9d906 │ │ asrs r6, r0, #32 │ │ - b.n 9d8fe │ │ + b.n 9d90a │ │ movs r0, #4 │ │ - b.n 9d902 │ │ + b.n 9d90e │ │ adds r0, #9 │ │ - b.n 9dd06 │ │ + b.n 9dd12 │ │ lsrs r1, r1, #31 │ │ add.w r0, r0, r0 │ │ - b.n 9dc6e │ │ + b.n 9dc7a │ │ mcr2 10, 5, r1, cr1, cr15, {7} @ │ │ movs r0, r3 │ │ - b.n 9d100 │ │ + b.n 9d10c │ │ movs r0, #28 │ │ - b.n 9dada │ │ + b.n 9dae6 │ │ asrs r5, r2, #3 │ │ - b.n 9d97e │ │ + b.n 9d98a │ │ adds r0, #16 │ │ - b.n 9d102 │ │ + b.n 9d10e │ │ asrs r1, r0, #4 │ │ - b.n 9d50a │ │ + b.n 9d516 │ │ adds r0, #4 │ │ - b.n 9d110 │ │ + b.n 9d11c │ │ asrs r4, r7, #2 │ │ - b.n 9d990 │ │ + b.n 9d99c │ │ asrs r1, r4, #2 │ │ - b.n 9d932 │ │ + b.n 9d93e │ │ lsls r3, r2, #6 │ │ - b.n 9d5f8 │ │ + b.n 9d604 │ │ asrs r4, r0, #32 │ │ - b.n 9d102 │ │ + b.n 9d10e │ │ asrs r5, r2, #3 │ │ - b.n 9d99e │ │ + b.n 9d9aa │ │ asrs r1, r0, #4 │ │ - b.n 9d526 │ │ + b.n 9d532 │ │ asrs r4, r2, #32 │ │ - b.n 9db08 │ │ + b.n 9db14 │ │ asrs r0, r0, #32 │ │ - b.n 9d112 │ │ + b.n 9d11e │ │ asrs r5, r2, #3 │ │ - b.n 9d9ae │ │ + b.n 9d9ba │ │ movs r1, #1 │ │ - b.n 9d536 │ │ + b.n 9d542 │ │ lsls r1, r0, #2 │ │ - b.n 9d716 │ │ + b.n 9d722 │ │ asrs r0, r0, #32 │ │ - b.n 9ddda │ │ + b.n 9dde6 │ │ movs r0, #188 @ 0xbc │ │ - b.n 9d9c2 │ │ + b.n 9d9ce │ │ asrs r2, r4, #2 │ │ - b.n 9d724 │ │ + b.n 9d730 │ │ asrs r4, r7, #30 │ │ - b.n 9d9a6 │ │ + b.n 9d9b2 │ │ movs r0, r0 │ │ - b.n 9dd6a │ │ - beq.n 9d664 │ │ - b.n 9dac4 │ │ + b.n 9dd76 │ │ + beq.n 9d670 │ │ + b.n 9dad0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r4} │ │ - b.n 9d160 │ │ + b.n 9d16c │ │ movs r0, r0 │ │ - b.n 9dcda │ │ + b.n 9dce6 │ │ lsls r7, r4, #3 │ │ lsrs r0, r0, #8 │ │ asrs r0, r6, #16 │ │ - b.n 9d180 │ │ + b.n 9d18c │ │ movs r1, r0 │ │ - b.n 9dcec │ │ + b.n 9dcf8 │ │ movs r4, #44 @ 0x2c │ │ - b.n 9d188 │ │ + b.n 9d194 │ │ asrs r1, r0, #32 │ │ - b.n 9d76c │ │ + b.n 9d778 │ │ movs r0, #2 │ │ - b.n 9d770 │ │ + b.n 9d77c │ │ movs r0, #1 │ │ asrs r0, r4, #6 │ │ asrs r4, r0, #32 │ │ - b.n 9d99a │ │ - beq.n 9d694 │ │ - b.n 9daf4 │ │ - ldr r7, [pc, #960] @ (9da20 ) │ │ + b.n 9d9a6 │ │ + beq.n 9d6a0 │ │ + b.n 9db00 │ │ + ldr r7, [pc, #960] @ (9da2c ) │ │ ldmia.w sp!, {r1, r4, r8, r9, sl, fp, ip, sp, lr, pc} │ │ - b.n 9d8c4 │ │ + b.n 9d8d0 │ │ strh r0, [r0, #0] │ │ - b.n 9d9aa │ │ + b.n 9d9b6 │ │ movs r4, r2 │ │ - b.n 9d198 │ │ + b.n 9d1a4 │ │ asrs r0, r3, #32 │ │ - b.n 9db8c │ │ + b.n 9db98 │ │ movs r0, #12 │ │ - b.n 9d196 │ │ + b.n 9d1a2 │ │ movs r4, r0 │ │ - b.n 9d9ba │ │ + b.n 9d9c6 │ │ vrhadd.u d14, d2, d31 │ │ asrs r0, r0, #32 │ │ - b.n 9d9c2 │ │ + b.n 9d9ce │ │ movs r7, r3 │ │ - b.n 9db14 │ │ + b.n 9db20 │ │ movs r0, #8 │ │ - b.n 9dba8 │ │ + b.n 9dbb4 │ │ adds r1, #0 │ │ - b.n 9d5b2 │ │ + b.n 9d5be │ │ movs r0, r1 │ │ - b.n 9d9d2 │ │ - blx 4a0798 │ │ + b.n 9d9de │ │ + blx 4a07a4 │ │ movs r4, r2 │ │ movs r0, r0 │ │ lsls r0, r5, #4 │ │ movs r0, r0 │ │ lsls r0, r4, #3 │ │ movs r0, r0 │ │ lsls r4, r1, #5 │ │ movs r0, r0 │ │ lsls r4, r3, #4 │ │ movs r0, r0 │ │ movs r0, r0 │ │ - b.n 9dd50 │ │ + b.n 9dd5c │ │ lsls r4, r0, #1 │ │ ldrh r0, [r0, r0] │ │ mcr2 10, 3, lr, cr8, cr15, {7} @ │ │ movs r0, r4 │ │ - b.n 9dd68 │ │ + b.n 9dd74 │ │ movs r3, r1 │ │ ldrh r0, [r0, #16] │ │ movs r0, r0 │ │ - b.n 9dd62 │ │ + b.n 9dd6e │ │ asrs r2, r6, #30 │ │ asrs r0, r1, #12 │ │ subs r7, r7, #7 │ │ asrs r7, r1, #13 │ │ movs r1, r0 │ │ asrs r0, r2, #5 │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n 9da16 │ │ + b.n 9da22 │ │ asrs r6, r0, #32 │ │ - b.n 9da1a │ │ + b.n 9da26 │ │ movs r0, #4 │ │ - b.n 9da1e │ │ + b.n 9da2a │ │ adds r0, #14 │ │ - b.n 9de22 │ │ - ldrh r1, [r7, #32] │ │ + b.n 9de2e │ │ + ldrh r2, [r7, #32] │ │ @ instruction: 0xeb00d01c │ │ - b.n 9db80 │ │ + b.n 9db8c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r5, ip} │ │ - b.n 9db40 │ │ + b.n 9db4c │ │ asrs r0, r0, #32 │ │ - b.n 9da18 │ │ + b.n 9da24 │ │ lsls r2, r6, #30 │ │ lsls r0, r1, #12 │ │ lsrs r7, r7, #31 │ │ lsls r7, r1, #13 │ │ - beq.n 9d738 │ │ - b.n 9db98 │ │ + beq.n 9d744 │ │ + b.n 9dba4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r4} │ │ - b.n 9d234 │ │ + b.n 9d240 │ │ asrs r0, r3, #32 │ │ - b.n 9dc28 │ │ + b.n 9dc34 │ │ movs r0, #12 │ │ - b.n 9d232 │ │ + b.n 9d23e │ │ movs r4, r0 │ │ - b.n 9da56 │ │ + b.n 9da62 │ │ vrhadd.u d14, d2, d31 │ │ asrs r0, r0, #32 │ │ - b.n 9da5e │ │ + b.n 9da6a │ │ movs r2, r3 │ │ - b.n 9dbb0 │ │ + b.n 9dbbc │ │ movs r0, #4 │ │ - b.n 9dc44 │ │ + b.n 9dc50 │ │ lsls r0, r0, #4 │ │ - b.n 9d64e │ │ - blx 49d830 │ │ + b.n 9d65a │ │ + blx 49d83c │ │ movs r4, r2 │ │ movs r0, r0 │ │ lsls r4, r7, #6 │ │ movs r0, r0 │ │ lsls r0, r1, #1 │ │ movs r0, r0 │ │ lsls r0, r5, #6 │ │ movs r0, r0 │ │ lsls r0, r2, #6 │ │ movs r0, r0 │ │ lsls r2, r6, #30 │ │ - b.n 9dd56 │ │ + b.n 9dd62 │ │ movs r0, r0 │ │ - b.n 9ddec │ │ + b.n 9ddf8 │ │ lsrs r7, r7, #31 │ │ - b.n 9ddec │ │ + b.n 9ddf8 │ │ movs r0, r0 │ │ orrs r0, r0 │ │ - beq.n 9d78c │ │ - b.n 9dbec │ │ + beq.n 9d798 │ │ + b.n 9dbf8 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r2} │ │ - b.n 9da9e │ │ + b.n 9daaa │ │ asrs r6, r0, #32 │ │ - b.n 9daa2 │ │ + b.n 9daae │ │ movs r0, #4 │ │ - b.n 9daa6 │ │ + b.n 9dab2 │ │ adds r0, #11 │ │ - b.n 9deaa │ │ - beq.n 9d7a4 │ │ - b.n 9dc04 │ │ - ldr r7, [pc, #960] @ (9db30 ) │ │ + b.n 9deb6 │ │ + beq.n 9d7b0 │ │ + b.n 9dc10 │ │ + ldr r7, [pc, #960] @ (9db3c ) │ │ ldmia.w sp!, {r1, r2, r3, r4, r6, r8, r9, sl, fp} │ │ and.w r0, r0, r0 │ │ - b.n 9de1c │ │ + b.n 9de28 │ │ asrs r2, r6, #30 │ │ asrs r0, r1, #12 │ │ subs r7, r7, #7 │ │ asrs r7, r1, #13 │ │ movs r1, r0 │ │ - b.n 9dac6 │ │ - beq.n 9d7c0 │ │ - b.n 9dc20 │ │ + b.n 9dad2 │ │ + beq.n 9d7cc │ │ + b.n 9dc2c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r5} │ │ - b.n 9de40 │ │ + b.n 9de4c │ │ movs r1, r7 │ │ ldrh r0, [r0, #16] │ │ movs r0, r0 │ │ - b.n 9de3a │ │ + b.n 9de46 │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ asrs r2, r6, #30 │ │ - b.n 9ddb2 │ │ + b.n 9ddbe │ │ subs r7, r7, #7 │ │ - b.n 9de44 │ │ + b.n 9de50 │ │ movs r1, r0 │ │ - b.n 9da4a │ │ + b.n 9da56 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ mcr2 10, 1, lr, cr9, cr15, {7} @ │ │ movs r0, r0 │ │ - b.n 9de58 │ │ + b.n 9de64 │ │ mcr2 10, 1, ip, cr7, cr15, {7} @ │ │ movs r0, r7 │ │ and.w r0, r0, r1 │ │ - b.n 9de64 │ │ + b.n 9de70 │ │ mcr2 10, 1, fp, cr4, cr15, {7} @ │ │ movs r5, r0 │ │ - b.n 9db0a │ │ + b.n 9db16 │ │ asrs r6, r0, #32 │ │ - b.n 9db0e │ │ + b.n 9db1a │ │ movs r0, #4 │ │ - b.n 9db12 │ │ + b.n 9db1e │ │ adds r0, #12 │ │ - b.n 9df16 │ │ - ldrh r4, [r7, #30] │ │ + b.n 9df22 │ │ + ldrh r5, [r7, #30] │ │ @ instruction: 0xeb00d01c │ │ - b.n 9dc74 │ │ + b.n 9dc80 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0} │ │ - b.n 9dec8 │ │ + b.n 9ded4 │ │ mrc2 10, 0, ip, cr11, cr15, {7} @ │ │ movs r4, r5 │ │ and.w r0, r0, fp, lsr #32 │ │ - b.n 9dea0 │ │ + b.n 9deac │ │ lsls r4, r1, #1 │ │ ldrh r0, [r0, #16] │ │ movs r0, r0 │ │ - b.n 9de9a │ │ + b.n 9dea6 │ │ asrs r2, r6, #30 │ │ asrs r0, r1, #12 │ │ subs r7, r7, #7 │ │ asrs r7, r1, #13 │ │ movs r1, r0 │ │ asrs r0, r2, #5 │ │ lsls r7, r0, #1 │ │ subs r0, r0, r0 │ │ movs r6, r0 │ │ - b.n 9db4e │ │ + b.n 9db5a │ │ asrs r4, r0, #32 │ │ - b.n 9db52 │ │ - ldrh r0, [r1, #42] @ 0x2a │ │ + b.n 9db5e │ │ + ldrh r1, [r1, #42] @ 0x2a │ │ @ instruction: 0xeb00d01c │ │ - b.n 9dcb0 │ │ + b.n 9dcbc │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r4, ip} │ │ - b.n 9d34c │ │ + b.n 9d358 │ │ movs r0, r0 │ │ - b.n 9dec8 │ │ + b.n 9ded4 │ │ lsls r4, r5, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, #4 │ │ - b.n 9d3d0 │ │ + b.n 9d3dc │ │ movs r7, r7 │ │ - b.n 9ded6 │ │ + b.n 9dee2 │ │ lsls r7, r7, #1 │ │ ldrh r0, [r0, #16] │ │ movs r0, #213 @ 0xd5 │ │ - b.n 9dbdc │ │ + b.n 9dbe8 │ │ adds r1, #2 │ │ - b.n 9d940 │ │ + b.n 9d94c │ │ asrs r2, r0, #2 │ │ - b.n 9d944 │ │ + b.n 9d950 │ │ adds r0, #28 │ │ - b.n 9d36c │ │ + b.n 9d378 │ │ asrs r4, r7, #30 │ │ - b.n 9dbec │ │ + b.n 9dbf8 │ │ movs r0, #20 │ │ - b.n 9dd54 │ │ + b.n 9dd60 │ │ strb r2, [r7, #2] │ │ - b.n 9dbf8 │ │ + b.n 9dc04 │ │ movs r0, r4 │ │ - b.n 9de84 │ │ + b.n 9de90 │ │ movs r2, r7 │ │ subs r0, r0, r0 │ │ asrs r1, r0, #2 │ │ - b.n 9d964 │ │ + b.n 9d970 │ │ asrs r4, r6, #6 │ │ - b.n 9dc04 │ │ + b.n 9dc10 │ │ asrs r1, r0, #32 │ │ - b.n 9d96a │ │ + b.n 9d976 │ │ movs r0, #8 │ │ - b.n 9dd6c │ │ + b.n 9dd78 │ │ movs r0, #0 │ │ - b.n 9d376 │ │ + b.n 9d382 │ │ asrs r6, r6, #2 │ │ - b.n 9dc14 │ │ + b.n 9dc20 │ │ asrs r4, r0, #32 │ │ - b.n 9d37e │ │ - beq.n 9d8b0 │ │ - b.n 9dd10 │ │ + b.n 9d38a │ │ + beq.n 9d8bc │ │ + b.n 9dd1c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, r4, r5, r7, r8, r9, sl, ip} │ │ - b.n 9de92 │ │ + b.n 9de9e │ │ movs r1, r4 │ │ - b.n 9df34 │ │ + b.n 9df40 │ │ subs r7, r7, #7 │ │ - b.n 9df28 │ │ + b.n 9df34 │ │ movs r0, r0 │ │ lsls r0, r2, #13 │ │ @ instruction: 0xffbb0aff │ │ movs r1, r4 │ │ - b.n 9df44 │ │ - stc2l 10, cr0, [pc, #1020]! @ 9dc94 @ │ │ + b.n 9df50 │ │ + stc2l 10, cr0, [pc, #1020]! @ 9dca0 @ │ │ movs r1, r0 │ │ - b.n 9db3e │ │ + b.n 9db4a │ │ stc2l 10, cr1, [sp, #1020]! @ 0x3fc @ │ │ movs r5, r0 │ │ - b.n 9dbe6 │ │ + b.n 9dbf2 │ │ asrs r6, r0, #32 │ │ - b.n 9dbea │ │ + b.n 9dbf6 │ │ movs r0, #4 │ │ - b.n 9dbee │ │ + b.n 9dbfa │ │ adds r0, #8 │ │ - b.n 9dff2 │ │ + b.n 9dffe │ │ lsrs r6, r1, #28 │ │ @ instruction: 0xeb00d01c │ │ - b.n 9dd50 │ │ + b.n 9dd5c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, r4, r5, r7, r8, r9, sl} │ │ - b.n 9ded2 │ │ + b.n 9dede │ │ movs r0, r0 │ │ - b.n 9df68 │ │ + b.n 9df74 │ │ lsrs r7, r7, #31 │ │ - b.n 9df68 │ │ + b.n 9df74 │ │ movs r0, r0 │ │ stmia r3!, {} │ │ - beq.n 9d908 │ │ - b.n 9dd68 │ │ + beq.n 9d914 │ │ + b.n 9dd74 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, r4, r5, r7, r8, r9, sl} │ │ - b.n 9deea │ │ + b.n 9def6 │ │ lsrs r7, r7, #31 │ │ - b.n 9df7c │ │ + b.n 9df88 │ │ lsrs r1, r0, #31 │ │ - b.n 9d8e2 │ │ - beq.n 9d91c │ │ - b.n 9dd7c │ │ + b.n 9d8ee │ │ + beq.n 9d928 │ │ + b.n 9dd88 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {} │ │ - b.n 9e02e │ │ + b.n 9e03a │ │ movs r0, r0 │ │ - b.n 9df94 │ │ + b.n 9dfa0 │ │ lsls r2, r6, #30 │ │ stmia r3!, {r3} │ │ lsrs r7, r7, #31 │ │ stmia r3!, {r0, r1, r2, r3, r6} │ │ - beq.n 9d934 │ │ - b.n 9dd94 │ │ + beq.n 9d940 │ │ + b.n 9dda0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r2} │ │ - b.n 9dc46 │ │ + b.n 9dc52 │ │ asrs r6, r0, #32 │ │ - b.n 9dc4a │ │ + b.n 9dc56 │ │ movs r0, #4 │ │ - b.n 9dc4e │ │ + b.n 9dc5a │ │ adds r0, #9 │ │ - b.n 9e052 │ │ - beq.n 9d94c │ │ - b.n 9ddac │ │ - ldr r7, [pc, #960] @ (9dcd8 ) │ │ + b.n 9e05e │ │ + beq.n 9d958 │ │ + b.n 9ddb8 │ │ + ldr r7, [pc, #960] @ (9dce4 ) │ │ ldmia.w sp!, {r2, r4, r5, r6, r7, r9, sl, fp} │ │ @ instruction: 0xea008001 │ │ - b.n 9e062 │ │ + b.n 9e06e │ │ movs r1, r0 │ │ - b.n 9ddb6 │ │ + b.n 9ddc2 │ │ movs r5, r3 │ │ and.w r0, r0, ip, lsr #4 │ │ - b.n 9dd7c │ │ + b.n 9dd88 │ │ vpmin.u32 q15, , │ │ movs r6, r0 │ │ - b.n 9dc76 │ │ + b.n 9dc82 │ │ asrs r4, r0, #32 │ │ - b.n 9dc7a │ │ - ldrh r6, [r0, #36] @ 0x24 │ │ + b.n 9dc86 │ │ + ldrh r7, [r0, #36] @ 0x24 │ │ @ instruction: 0xeb00d01c │ │ - b.n 9ddd8 │ │ + b.n 9dde4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r4, r5, r7, ip, sp} │ │ - b.n 9dcf0 │ │ + b.n 9dcfc │ │ movs r1, #147 @ 0x93 │ │ - b.n 9d992 │ │ + b.n 9d99e │ │ movs r0, #240 @ 0xf0 │ │ - b.n 9dcda │ │ - beq.n 9d98c │ │ - b.n 9ddec │ │ + b.n 9dce6 │ │ + beq.n 9d998 │ │ + b.n 9ddf8 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r4} │ │ - b.n 9d488 │ │ + b.n 9d494 │ │ asrs r4, r0, #32 │ │ - b.n 9dca2 │ │ + b.n 9dcae │ │ movs r0, #12 │ │ - b.n 9d486 │ │ + b.n 9d492 │ │ movs r0, r3 │ │ - b.n 9de84 │ │ + b.n 9de90 │ │ vrhadd.u d14, d2, d31 │ │ subs r0, r2, #4 │ │ - b.n 9dc50 │ │ + b.n 9dc5c │ │ movs r1, r0 │ │ - b.n 9e016 │ │ + b.n 9e022 │ │ strh r1, [r4, #20] │ │ - b.n 9dcba │ │ + b.n 9dcc6 │ │ movs r0, r2 │ │ rev r0, r0 │ │ movs r5, r0 │ │ - b.n 9dcc2 │ │ + b.n 9dcce │ │ asrs r6, r0, #32 │ │ - b.n 9dcc6 │ │ + b.n 9dcd2 │ │ movs r0, #4 │ │ - b.n 9dcca │ │ + b.n 9dcd6 │ │ adds r0, #11 │ │ - b.n 9e0ce │ │ + b.n 9e0da │ │ lsrs r7, r2, #27 │ │ add.w r0, r0, r1, lsl #8 │ │ - b.n 9de26 │ │ + b.n 9de32 │ │ movs r0, r0 │ │ - b.n 9e03a │ │ + b.n 9e046 │ │ asrs r2, r1, #32 │ │ - b.n 9dcde │ │ + b.n 9dcea │ │ lsls r2, r6, #1 │ │ lsls r7, r5, #26 │ │ movs r4, r2 │ │ - b.n 9e048 │ │ + b.n 9e054 │ │ stc2 10, cr1, [fp, #1020]! @ 0x3fc @ │ │ movs r1, r0 │ │ - b.n 9e08e │ │ + b.n 9e09a │ │ vpmin.u16 q0, q14, │ │ asrs r0, r0, #32 │ │ - b.n 9dcf6 │ │ + b.n 9dd02 │ │ movs r0, r0 │ │ - b.n 9e05a │ │ + b.n 9e066 │ │ @ instruction: 0xffb80aff │ │ vpmin.u32 q15, , │ │ asrs r2, r1, #32 │ │ - b.n 9dd06 │ │ + b.n 9dd12 │ │ @ instruction: 0xffd5eaff │ │ lsls r2, r6, #30 │ │ - b.n 9dfde │ │ + b.n 9dfea │ │ lsrs r7, r7, #31 │ │ - b.n 9e070 │ │ + b.n 9e07c │ │ movs r6, r1 │ │ - b.n 9ded6 │ │ - beq.n 9da10 │ │ - b.n 9de70 │ │ + b.n 9dee2 │ │ + beq.n 9da1c │ │ + b.n 9de7c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r2} │ │ - b.n 9dd22 │ │ - ldrh r2, [r4, #10] │ │ + b.n 9dd2e │ │ + ldrh r3, [r4, #10] │ │ add.w r7, r0, r2, ror #2 │ │ - b.n 9dffa │ │ + b.n 9e006 │ │ lsrs r7, r7, #31 │ │ - b.n 9e08c │ │ + b.n 9e098 │ │ movs r2, r0 │ │ - b.n 9def2 │ │ - beq.n 9da2c │ │ - b.n 9de8c │ │ + b.n 9defe │ │ + beq.n 9da38 │ │ + b.n 9de98 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r5, r6, ip} │ │ - b.n 9d75c │ │ + b.n 9d768 │ │ movs r0, r0 │ │ - b.n 9e0a4 │ │ + b.n 9e0b0 │ │ movs r0, r3 │ │ - ldr r2, [pc, #0] @ (9da04 ) │ │ + ldr r2, [pc, #0] @ (9da10 ) │ │ asrs r5, r2, #3 │ │ - b.n 9ddb4 │ │ + b.n 9ddc0 │ │ movs r1, #1 │ │ - b.n 9db18 │ │ + b.n 9db24 │ │ asrs r1, r0, #2 │ │ - b.n 9db1c │ │ + b.n 9db28 │ │ movs r0, #28 │ │ - b.n 9d53a │ │ + b.n 9d546 │ │ asrs r4, r7, #30 │ │ - b.n 9ddbc │ │ + b.n 9ddc8 │ │ movs r0, #188 @ 0xbc │ │ - b.n 9ddc2 │ │ + b.n 9ddce │ │ lsls r2, r4, #2 │ │ - b.n 9dcc4 │ │ + b.n 9dcd0 │ │ mrc2 10, 3, r3, cr5, cr15, {7} @ │ │ lsls r2, r6, #30 │ │ - b.n 9e03a │ │ + b.n 9e046 │ │ lsrs r7, r7, #31 │ │ - b.n 9e0cc │ │ - beq.n 9da68 │ │ - b.n 9dec8 │ │ + b.n 9e0d8 │ │ + beq.n 9da74 │ │ + b.n 9ded4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, r4, r5, r6} │ │ - b.n 9d798 │ │ + b.n 9d7a4 │ │ movs r0, r0 │ │ - b.n 9e0de │ │ + b.n 9e0ea │ │ movs r1, r1 │ │ - ldr r2, [pc, #0] @ (9da40 ) │ │ + ldr r2, [pc, #0] @ (9da4c ) │ │ movs r0, #213 @ 0xd5 │ │ - b.n 9dde8 │ │ + b.n 9ddf4 │ │ lsls r2, r0, #4 │ │ - b.n 9db4c │ │ + b.n 9db58 │ │ adds r0, #130 @ 0x82 │ │ - b.n 9db50 │ │ + b.n 9db5c │ │ movs r4, r3 │ │ - b.n 9d572 │ │ + b.n 9d57e │ │ adds r7, #188 @ 0xbc │ │ - b.n 9ddfc │ │ + b.n 9de08 │ │ lsls r4, r7, #2 │ │ - b.n 9ddfa │ │ + b.n 9de06 │ │ lsls r0, r4, #2 │ │ - b.n 9dd04 │ │ + b.n 9dd10 │ │ movs r0, r0 │ │ - b.n 9e1a2 │ │ + b.n 9e1ae │ │ vpmin.u , q10, │ │ @ instruction: 0xffeeeaff │ │ movs r5, r7 │ │ - b.n 9e1ae │ │ - beq.n 9daa8 │ │ - b.n 9df08 │ │ + b.n 9e1ba │ │ + beq.n 9dab4 │ │ + b.n 9df14 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r2, r3, r4, r5, r6, r7, r8, fp, ip, sp} │ │ + ldmia.w sp!, {r9, fp, ip, sp} │ │ movs r2, r0 │ │ - subs r0, #176 @ 0xb0 │ │ + subs r0, #180 @ 0xb4 │ │ movs r2, r0 │ │ - ldr r0, [pc, #960] @ (9de40 ) │ │ + ldr r0, [pc, #960] @ (9de4c ) │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n 9dfa0 │ │ - beq.n 9da98 │ │ - b.n 9df24 │ │ + b.n 9dfac │ │ + beq.n 9daa4 │ │ + b.n 9df30 │ │ str r0, [r0, r0] │ │ - b.n 9ddce │ │ + b.n 9ddda │ │ movs r5, r0 │ │ - b.n 9d632 │ │ + b.n 9d63e │ │ ands r1, r0 │ │ - b.n 9ddd6 │ │ + b.n 9dde2 │ │ str r2, [r0, #0] │ │ - b.n 9ddda │ │ + b.n 9dde6 │ │ strb r0, [r0, #0] │ │ - b.n 9e1de │ │ + b.n 9e1ea │ │ movs r0, r0 │ │ - b.n 9e142 │ │ + b.n 9e14e │ │ asrs r0, r0, #32 │ │ - b.n 9e1e6 │ │ + b.n 9e1f2 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ movs r5, r0 │ │ - b.n 9ddee │ │ + b.n 9ddfa │ │ movs r0, #4 │ │ - b.n 9e1f2 │ │ + b.n 9e1fe │ │ cmp r6, #88 @ 0x58 │ │ add.w r0, r0, r0 │ │ - b.n 9e15a │ │ + b.n 9e166 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ - beq.n 9dae0 │ │ - b.n 9df58 │ │ + beq.n 9daec │ │ + b.n 9df64 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r0, r2, r4, r6, r7, ip} │ │ - b.n 9de74 │ │ + b.n 9de80 │ │ lsls r4, r7, #1 │ │ - b.n 9dfd8 │ │ + b.n 9dfe4 │ │ adds r0, #6 │ │ - b.n 9d67c │ │ + b.n 9d688 │ │ asrs r1, r0, #2 │ │ - b.n 9dbd6 │ │ + b.n 9dbe2 │ │ strb r0, [r6, #2] │ │ - b.n 9de5c │ │ + b.n 9de68 │ │ asrs r5, r2, #3 │ │ - b.n 9de88 │ │ + b.n 9de94 │ │ movs r1, #1 │ │ - b.n 9dbec │ │ + b.n 9dbf8 │ │ movs r0, #28 │ │ - b.n 9d60a │ │ + b.n 9d616 │ │ strb r2, [r7, #2] │ │ - b.n 9de8e │ │ + b.n 9de9a │ │ adds r0, #7 │ │ - b.n 9db34 │ │ + b.n 9db40 │ │ movs r7, r4 │ │ - b.n 9e118 │ │ + b.n 9e124 │ │ lsls r3, r1, #1 │ │ subs r0, r0, r0 │ │ lsls r1, r0, #2 │ │ - b.n 9dbfa │ │ + b.n 9dc06 │ │ asrs r4, r2, #32 │ │ - b.n 9e002 │ │ + b.n 9e00e │ │ lsls r0, r6, #2 │ │ - b.n 9dea2 │ │ + b.n 9deae │ │ lsls r0, r0, #2 │ │ - b.n 9dc08 │ │ + b.n 9dc14 │ │ lsls r0, r6, #2 │ │ - b.n 9deaa │ │ + b.n 9deb6 │ │ strb r0, [r0, #0] │ │ - b.n 9dc10 │ │ + b.n 9dc1c │ │ movs r4, r0 │ │ - b.n 9d6c0 │ │ + b.n 9d6cc │ │ movs r4, r0 │ │ - b.n 9e136 │ │ + b.n 9e142 │ │ movs r7, r2 │ │ subs r0, r0, r0 │ │ movs r0, r3 │ │ - b.n 9d648 │ │ + b.n 9d654 │ │ movs r0, r0 │ │ - b.n 9e1c2 │ │ + b.n 9e1ce │ │ subs r1, r2, #7 │ │ asrs r7, r1, #12 │ │ asrs r4, r6, #2 │ │ asrs r0, r0, #7 │ │ asrs r0, r0, #32 │ │ asrs r0, r4, #14 │ │ asrs r4, r7, #2 │ │ asrs r0, r0, #22 │ │ movs r0, r0 │ │ - b.n 9e1e2 │ │ + b.n 9e1ee │ │ movs r7, r5 │ │ lsrs r0, r0, #8 │ │ lsls r6, r6, #2 │ │ - b.n 9deec │ │ + b.n 9def8 │ │ asrs r0, r0, #32 │ │ - b.n 9d670 │ │ + b.n 9d67c │ │ movs r0, r0 │ │ - b.n 9dc54 │ │ + b.n 9dc60 │ │ movs r0, r1 │ │ - b.n 9e04a │ │ + b.n 9e056 │ │ lsls r0, r6, #3 │ │ - b.n 9deda │ │ + b.n 9dee6 │ │ movs r4, r0 │ │ - b.n 9d700 │ │ + b.n 9d70c │ │ movs r1, r0 │ │ - b.n 9e1f6 │ │ + b.n 9e202 │ │ movs r7, r4 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #32 │ │ - b.n 9d682 │ │ + b.n 9d68e │ │ movs r0, r0 │ │ - b.n 9d686 │ │ + b.n 9d692 │ │ movs r0, #6 │ │ - b.n 9dea6 │ │ + b.n 9deb2 │ │ lsls r0, r6, #3 │ │ - b.n 9df04 │ │ + b.n 9df10 │ │ movs r5, r0 │ │ - b.n 9deae │ │ + b.n 9deba │ │ asrs r7, r0, #32 │ │ - b.n 9deb2 │ │ - ldrh r6, [r1, #48] @ 0x30 │ │ + b.n 9debe │ │ + ldrh r7, [r1, #48] @ 0x30 │ │ add.w r0, r0, r9, lsr #32 │ │ and.w r0, r0, r5 │ │ - b.n 9debe │ │ + b.n 9deca │ │ asrs r7, r0, #32 │ │ - b.n 9dec2 │ │ - str r2, [r4, #8] │ │ + b.n 9dece │ │ + str r3, [r4, #8] │ │ add.w r0, r0, r0 │ │ - b.n 9e22a │ │ + b.n 9e236 │ │ @ instruction: 0xffcb1aff │ │ movs r4, r0 │ │ - b.n 9d740 │ │ + b.n 9d74c │ │ movs r2, r0 │ │ - b.n 9e1b6 │ │ + b.n 9e1c2 │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n 9e24a │ │ + b.n 9e256 │ │ movs r5, r2 │ │ lsrs r0, r0, #8 │ │ asrs r0, r3, #32 │ │ - b.n 9d6d0 │ │ + b.n 9d6dc │ │ movs r4, r3 │ │ - b.n 9d6cc │ │ + b.n 9d6d8 │ │ movs r7, #188 @ 0xbc │ │ - b.n 9df50 │ │ + b.n 9df5c │ │ adds r0, #20 │ │ - b.n 9e0b2 │ │ + b.n 9e0be │ │ asrs r2, r7, #2 │ │ - b.n 9df56 │ │ + b.n 9df62 │ │ movs r0, r4 │ │ - b.n 9e1dc │ │ + b.n 9e1e8 │ │ movs r3, r1 │ │ subs r0, r0, r0 │ │ lsls r2, r0, #2 │ │ - b.n 9dcc2 │ │ + b.n 9dcce │ │ lsls r4, r6, #6 │ │ - b.n 9df66 │ │ + b.n 9df72 │ │ movs r0, r0 │ │ - b.n 9dcd0 │ │ + b.n 9dcdc │ │ asrs r6, r6, #2 │ │ - b.n 9df6e │ │ + b.n 9df7a │ │ movs r0, r1 │ │ - b.n 9e0d2 │ │ + b.n 9e0de │ │ movs r7, r0 │ │ and.w r0, r0, r8, lsr #32 │ │ - b.n 9d704 │ │ + b.n 9d710 │ │ asrs r6, r0, #32 │ │ - b.n 9df1e │ │ - ldrh r0, [r1, #38] @ 0x26 │ │ + b.n 9df2a │ │ + ldrh r1, [r1, #38] @ 0x26 │ │ add.w r0, r0, r0 │ │ - b.n 9e286 │ │ + b.n 9e292 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ @ instruction: 0xffb3eaff │ │ asrs r0, r7, #2 │ │ - b.n 9df92 │ │ + b.n 9df9e │ │ adds r2, #145 @ 0x91 │ │ - b.n 9dc36 │ │ + b.n 9dc42 │ │ lsls r0, r6, #3 │ │ - b.n 9df86 │ │ + b.n 9df92 │ │ movs r4, r0 │ │ - b.n 9d7a8 │ │ + b.n 9d7b4 │ │ movs r0, r0 │ │ - b.n 9e2aa │ │ + b.n 9e2b6 │ │ asrs r0, r1, #32 │ │ asrs r7, r0, #10 │ │ movs r3, r0 │ │ - b.n 9e00a │ │ + b.n 9e016 │ │ movs r4, r0 │ │ - b.n 9d798 │ │ + b.n 9d7a4 │ │ movs r0, r0 │ │ - b.n 9e352 │ │ + b.n 9e35e │ │ asrs r0, r0, #32 │ │ asrs r4, r0, #22 │ │ asrs r6, r6, #2 │ │ asrs r7, r2, #7 │ │ asrs r4, r0, #32 │ │ asrs r4, r0, #22 │ │ - beq.n 9dc40 │ │ - b.n 9e0b8 │ │ + beq.n 9dc4c │ │ + b.n 9e0c4 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r3, r6} │ │ - b.n 9d768 │ │ + b.n 9d774 │ │ movs r0, r0 │ │ - b.n 9dd4c │ │ + b.n 9dd58 │ │ asrs r2, r3, #1 │ │ - b.n 9d7d2 │ │ + b.n 9d7de │ │ lsls r4, r6, #30 │ │ - b.n 9e246 │ │ + b.n 9e252 │ │ lsrs r7, r7, #31 │ │ - b.n 9e2d8 │ │ + b.n 9e2e4 │ │ movs r0, r0 │ │ - b.n 9e2e0 │ │ + b.n 9e2ec │ │ @ instruction: 0xff9e0aff │ │ asrs r0, r6, #32 │ │ - b.n 9d784 │ │ + b.n 9d790 │ │ ands r0, r0 │ │ - b.n 9df8a │ │ + b.n 9df96 │ │ str r0, [r2, #0] │ │ - b.n 9d772 │ │ + b.n 9d77e │ │ movs r1, r0 │ │ - b.n 9e392 │ │ + b.n 9e39e │ │ adds r0, #36 @ 0x24 │ │ - b.n 9d794 │ │ + b.n 9d7a0 │ │ asrs r1, r0, #32 │ │ - b.n 9dd78 │ │ + b.n 9dd84 │ │ movs r1, #233 @ 0xe9 │ │ - b.n 9e25e │ │ + b.n 9e26a │ │ str r0, [r6, #12] │ │ - b.n 9dffc │ │ + b.n 9e008 │ │ adds r0, #3 │ │ - b.n 9dd84 │ │ + b.n 9dd90 │ │ bfx 14, pc @ │ │ movs r4, r0 │ │ - b.n 9dfae │ │ - beq.n 9dc90 │ │ - b.n 9e108 │ │ + b.n 9dfba │ │ + beq.n 9dc9c │ │ + b.n 9e114 │ │ ldrh r0, [r6, #6] │ │ - ldmia.w sp!, {r5, sl, fp} │ │ + ldmia.w sp!, {r2, r4, r5, sl, fp} │ │ movs r4, r0 │ │ - revsh r7, r6 │ │ - vtbx.8 d26, {d22}, d9 │ │ + cbnz r6, 9dcfa │ │ + vtbl.8 d26, {d6-d7}, d15 │ │ @ instruction: 0xfff648f0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n 9e1a4 │ │ - beq.n 9dc9c │ │ - b.n 9e128 │ │ + b.n 9e1b0 │ │ + beq.n 9dca8 │ │ + b.n 9e134 │ │ stmia r0!, {r1, r2, r4, r5, r7} │ │ - b.n 9e034 │ │ + b.n 9e040 │ │ strb r0, [r0, #0] │ │ - b.n 9d7b8 │ │ + b.n 9d7c4 │ │ str r4, [r1, r0] │ │ - b.n 9dd9c │ │ + b.n 9dda8 │ │ str r0, [r1, #0] │ │ - b.n 9e1a8 │ │ + b.n 9e1b4 │ │ str r0, [r6, #12] │ │ - b.n 9e026 │ │ + b.n 9e032 │ │ strb r4, [r0, #0] │ │ - b.n 9d848 │ │ + b.n 9d854 │ │ movs r1, r0 │ │ - b.n 9e358 │ │ + b.n 9e364 │ │ movs r0, r0 │ │ asrs r0, r4, #14 │ │ - beq.n 9dcd0 │ │ + beq.n 9dcdc │ │ asrs r3, r1, #9 │ │ ldrh r0, [r6, #6] │ │ adds r5, r7, r2 │ │ str r4, [r0, r0] │ │ - b.n 9d7e0 │ │ + b.n 9d7ec │ │ ands r0, r0 │ │ - b.n 9d7e4 │ │ + b.n 9d7f0 │ │ lsrs r0, r6 │ │ - b.n 9e05c │ │ - ldrh r2, [r7, #44] @ 0x2c │ │ + b.n 9e068 │ │ + ldrh r3, [r7, #44] @ 0x2c │ │ @ instruction: 0xeb00d010 │ │ - b.n 9e160 │ │ + b.n 9e16c │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, fp, lr} │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n 9e1f0 │ │ - beq.n 9dcf8 │ │ - b.n 9e174 │ │ + b.n 9e1fc │ │ + beq.n 9dd04 │ │ + b.n 9e180 │ │ ands r0, r0 │ │ - b.n 9e01e │ │ + b.n 9e02a │ │ lsls r5, r2, #3 │ │ - b.n 9e082 │ │ + b.n 9e08e │ │ movs r1, r0 │ │ - b.n 9e386 │ │ + b.n 9e392 │ │ lsls r5, r5, #1 │ │ rev r0, r0 │ │ movs r1, r0 │ │ - b.n 9e16e │ │ + b.n 9e17a │ │ strb r4, [r3, #0] │ │ - b.n 9e1fa │ │ + b.n 9e206 │ │ str r4, [r7, #4] │ │ - b.n 9e1fe │ │ + b.n 9e20a │ │ movs r5, r0 │ │ - b.n 9d882 │ │ + b.n 9d88e │ │ asrs r0, r6, #1 │ │ - b.n 9dadc │ │ + b.n 9dae8 │ │ movs r1, #1 │ │ - b.n 9dc30 │ │ + b.n 9dc3c │ │ adds r0, #129 @ 0x81 │ │ - b.n 9e046 │ │ + b.n 9e052 │ │ asrs r6, r0, #32 │ │ - b.n 9e04a │ │ + b.n 9e056 │ │ adds r0, #179 @ 0xb3 │ │ - b.n 9e070 │ │ + b.n 9e07c │ │ str r4, [r7, r2] │ │ - b.n 9e0b6 │ │ + b.n 9e0c2 │ │ movs r0, #1 │ │ - b.n 9e21c │ │ + b.n 9e228 │ │ lsls r5, r4, #2 │ │ - b.n 9dfbe │ │ + b.n 9dfca │ │ movs r1, r0 │ │ cmp r2, #0 │ │ movs r0, #176 @ 0xb0 │ │ - b.n 9e0a4 │ │ + b.n 9e0b0 │ │ movs r4, r0 │ │ and.w r0, r0, r4 │ │ - b.n 9e06a │ │ + b.n 9e076 │ │ @ instruction: 0xffe7ebff │ │ movs r0, r0 │ │ - b.n 9e3d2 │ │ + b.n 9e3de │ │ lsls r3, r2, #1 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n 9d8e2 │ │ + b.n 9d8ee │ │ lsls r0, r6, #1 │ │ - b.n 9da9c │ │ + b.n 9daa8 │ │ movs r1, #0 │ │ - b.n 9dc70 │ │ + b.n 9dc7c │ │ lsls r0, r0, #2 │ │ - b.n 9de52 │ │ + b.n 9de5e │ │ lsls r0, r6, #2 │ │ - b.n 9e0ea │ │ + b.n 9e0f6 │ │ asrs r4, r2, #32 │ │ - b.n 9e252 │ │ + b.n 9e25e │ │ movs r0, #12 │ │ - b.n 9d86c │ │ + b.n 9d878 │ │ str r0, [sp, #16] │ │ - b.n 9d87a │ │ + b.n 9d886 │ │ lsls r0, r0, #2 │ │ - b.n 9de5c │ │ + b.n 9de68 │ │ strh r0, [r0, #0] │ │ - b.n 9d882 │ │ + b.n 9d88e │ │ movs r0, #12 │ │ - b.n 9e27c │ │ + b.n 9e288 │ │ lsls r0, r6, #2 │ │ - b.n 9e106 │ │ + b.n 9e112 │ │ asrs r0, r0, #32 │ │ - b.n 9dc8c │ │ + b.n 9dc98 │ │ movs r4, r0 │ │ - b.n 9e0ae │ │ + b.n 9e0ba │ │ strh r0, [r6, #6] │ │ - b.n 9e10c │ │ - ldrb r4, [r5, r3] │ │ + b.n 9e118 │ │ + ldrb r5, [r5, r3] │ │ add.w r0, r0, r0 │ │ - b.n 9e41a │ │ + b.n 9e426 │ │ movs r7, r4 │ │ subs r0, r0, r0 │ │ lsls r5, r2, #3 │ │ - b.n 9e12a │ │ + b.n 9e136 │ │ movs r7, r2 │ │ - b.n 9e426 │ │ + b.n 9e432 │ │ movs r1, r0 │ │ uxth r0, r0 │ │ movs r5, r0 │ │ push {r2, r6, r7, lr} │ │ asrs r4, r1, #32 │ │ push {r0, r2, r3, r4, r7, lr} │ │ lsls r0, r6, #1 │ │ @ instruction: 0xb6af │ │ asrs r0, r0, #4 │ │ @ instruction: 0xb787 │ │ lsls r5, r2, #3 │ │ - cbz r4, 9ddd2 │ │ + cbz r4, 9ddde │ │ asrs r0, r0, #2 │ │ sub sp, #24 │ │ movs r0, r0 │ │ - cbz r0, 9de0e │ │ + cbz r0, 9de1a │ │ lsls r0, r6, #2 │ │ - cbz r1, 9ddda │ │ - beq.n 9dddc │ │ + cbz r1, 9dde6 │ │ + beq.n 9dde8 │ │ sxtb r3, r1 │ │ ldrh r0, [r6, #30] │ │ @ instruction: 0xb8bd │ │ asrs r4, r0, #32 │ │ - b.n 9e0f6 │ │ + b.n 9e102 │ │ lsrs r1, r2, #31 │ │ - b.n 9e3d8 │ │ + b.n 9e3e4 │ │ movs r0, #4 │ │ - b.n 9d9a0 │ │ + b.n 9d9ac │ │ movs r1, r0 │ │ - b.n 9e3e6 │ │ + b.n 9e3f2 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ asrs r0, r3, #32 │ │ - b.n 9d8f2 │ │ + b.n 9d8fe │ │ adds r0, #1 │ │ - b.n 9e24e │ │ + b.n 9e25a │ │ movs r0, #180 @ 0xb4 │ │ - b.n 9e17a │ │ + b.n 9e186 │ │ movs r0, r0 │ │ - b.n 9e478 │ │ + b.n 9e484 │ │ movs r0, #3 │ │ - b.n 9e0de │ │ + b.n 9e0ea │ │ movs r0, #180 @ 0xb4 │ │ - b.n 9e166 │ │ + b.n 9e172 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #0 │ │ - b.n 9e526 │ │ + b.n 9e532 │ │ movs r0, #188 @ 0xbc │ │ - b.n 9d8ec │ │ + b.n 9d8f8 │ │ asrs r4, r0, #32 │ │ - b.n 9e2f0 │ │ + b.n 9e2fc │ │ movs r2, r0 │ │ and.w r0, r0, r0, lsr #8 │ │ - b.n 9d91e │ │ + b.n 9d92a │ │ adds r0, #0 │ │ - b.n 9e53a │ │ + b.n 9e546 │ │ adds r0, #8 │ │ - b.n 9d902 │ │ + b.n 9d90e │ │ lsls r0, r6, #2 │ │ - b.n 9e184 │ │ + b.n 9e190 │ │ movs r4, r1 │ │ - b.n 9d92e │ │ + b.n 9d93a │ │ asrs r4, r0, #32 │ │ - b.n 9d92a │ │ + b.n 9d936 │ │ asrs r2, r0, #32 │ │ - b.n 9e510 │ │ + b.n 9e51c │ │ asrs r4, r0, #32 │ │ - b.n 9d912 │ │ + b.n 9d91e │ │ lsls r2, r6, #30 │ │ - b.n 9e426 │ │ + b.n 9e432 │ │ lsrs r7, r7, #31 │ │ - b.n 9e4b8 │ │ + b.n 9e4c4 │ │ movs r3, r1 │ │ - b.n 9e31e │ │ + b.n 9e32a │ │ movs r0, #4 │ │ - b.n 9e162 │ │ + b.n 9e16e │ │ subs r1, r2, #7 │ │ - b.n 9e444 │ │ + b.n 9e450 │ │ adds r0, #4 │ │ - b.n 9da0e │ │ + b.n 9da1a │ │ movs r1, r0 │ │ - b.n 9e454 │ │ + b.n 9e460 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ movs r0, #24 │ │ - b.n 9d95e │ │ + b.n 9d96a │ │ strb r1, [r0, #0] │ │ - b.n 9e2bc │ │ + b.n 9e2c8 │ │ adds r0, #180 @ 0xb4 │ │ - b.n 9e1e6 │ │ + b.n 9e1f2 │ │ movs r0, r0 │ │ - b.n 9e4e6 │ │ + b.n 9e4f2 │ │ adds r0, #7 │ │ - b.n 9e14c │ │ + b.n 9e158 │ │ adds r0, #180 @ 0xb4 │ │ - b.n 9e1d2 │ │ + b.n 9e1de │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ adds r0, #0 │ │ - b.n 9e592 │ │ + b.n 9e59e │ │ adds r0, #188 @ 0xbc │ │ - b.n 9d95a │ │ + b.n 9d966 │ │ movs r0, #4 │ │ - b.n 9e35e │ │ + b.n 9e36a │ │ movs r2, r0 │ │ and.w r0, r0, r0, lsr #12 │ │ - b.n 9d98a │ │ + b.n 9d996 │ │ strb r0, [r0, #0] │ │ - b.n 9e5a6 │ │ + b.n 9e5b2 │ │ strb r0, [r1, #0] │ │ - b.n 9d970 │ │ + b.n 9d97c │ │ asrs r0, r6, #2 │ │ - b.n 9e1f2 │ │ + b.n 9e1fe │ │ asrs r2, r6, #30 │ │ - b.n 9e482 │ │ + b.n 9e48e │ │ subs r7, r7, #7 │ │ - b.n 9e514 │ │ + b.n 9e520 │ │ movs r1, r0 │ │ - b.n 9e11a │ │ + b.n 9e126 │ │ movs r6, r3 │ │ lsrs r0, r0, #8 │ │ - beq.n 9deb0 │ │ - b.n 9e318 │ │ + beq.n 9debc │ │ + b.n 9e324 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r1, r4, r5, r7, r8, r9, sl, ip} │ │ - b.n 9e49a │ │ + b.n 9e4a6 │ │ subs r7, r7, #7 │ │ - b.n 9e52c │ │ + b.n 9e538 │ │ movs r1, r0 │ │ - b.n 9e132 │ │ + b.n 9e13e │ │ @ instruction: 0xfff91aff │ │ movs r5, r0 │ │ - b.n 9da42 │ │ + b.n 9da4e │ │ movs r1, r0 │ │ - b.n 9e39e │ │ + b.n 9e3aa │ │ movs r5, r0 │ │ - b.n 9da2a │ │ + b.n 9da36 │ │ lsls r0, r6, #1 │ │ - b.n 9dc04 │ │ + b.n 9dc10 │ │ movs r0, #0 │ │ - b.n 9e66a │ │ + b.n 9e676 │ │ asrs r0, r0, #4 │ │ - b.n 9dfb6 │ │ + b.n 9dfc2 │ │ lsls r0, r0, #2 │ │ - b.n 9dfba │ │ + b.n 9dfc6 │ │ asrs r4, r3, #32 │ │ - b.n 9d9d8 │ │ + b.n 9d9e4 │ │ asrs r4, r7, #2 │ │ - b.n 9e25c │ │ + b.n 9e268 │ │ asrs r1, r4, #2 │ │ - b.n 9dfc2 │ │ + b.n 9dfce │ │ asrs r4, r7, #30 │ │ - b.n 9e242 │ │ + b.n 9e24e │ │ movs r4, r0 │ │ - b.n 9da6e │ │ + b.n 9da7a │ │ movs r0, #24 │ │ - b.n 9e60a │ │ + b.n 9e616 │ │ asrs r0, r3, #32 │ │ - b.n 9d9f6 │ │ + b.n 9da02 │ │ lsls r2, r2, #4 │ │ - b.n 9de90 │ │ + b.n 9de9c │ │ movs r0, r0 │ │ - b.n 9e578 │ │ + b.n 9e584 │ │ movs r4, r0 │ │ - b.n 9da62 │ │ + b.n 9da6e │ │ lsls r2, r6, #30 │ │ - b.n 9e4ee │ │ + b.n 9e4fa │ │ movs r0, #46 @ 0x2e │ │ asrs r0, r4, #15 │ │ lsrs r7, r7, #31 │ │ - b.n 9e584 │ │ + b.n 9e590 │ │ movs r0, #180 @ 0xb4 │ │ asrs r1, r0, #7 │ │ movs r0, #0 │ │ asrs r0, r4, #14 │ │ movs r0, #188 @ 0xbc │ │ asrs r1, r0, #22 │ │ - beq.n 9df24 │ │ - b.n 9e38c │ │ + beq.n 9df30 │ │ + b.n 9e398 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r0, r2} │ │ - b.n 9daa6 │ │ + b.n 9dab2 │ │ @ instruction: 0xffe7eaff │ │ - ldr r5, [pc, #960] @ (9e2c4 ) │ │ + ldr r5, [pc, #960] @ (9e2d0 ) │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n 9e424 │ │ + b.n 9e430 │ │ movs r0, r0 │ │ - b.n 9e5b0 │ │ + b.n 9e5bc │ │ movs r0, r0 │ │ asrs r2, r2, #13 │ │ movs r1, r7 │ │ lsrs r0, r0, #8 │ │ strb r6, [r2, #0] │ │ - b.n 9e65a │ │ + b.n 9e666 │ │ movs r0, r0 │ │ - b.n 9e5be │ │ + b.n 9e5ca │ │ lsls r3, r7, #1 │ │ lsrs r0, r0, #8 │ │ strh r0, [r0, #62] @ 0x3e │ │ - b.n 9e536 │ │ + b.n 9e542 │ │ strb r0, [r0, #0] │ │ - b.n 9da4a │ │ + b.n 9da56 │ │ str r1, [r6, #88] @ 0x58 │ │ - b.n 9e548 │ │ + b.n 9e554 │ │ ldrh r7, [r7, #62] @ 0x3e │ │ - b.n 9e5d0 │ │ + b.n 9e5dc │ │ ldrsh r3, [r3, r5] │ │ - b.n 9e446 │ │ + b.n 9e452 │ │ ldr r5, [r0, #96] @ 0x60 │ │ - b.n 9e5c8 │ │ + b.n 9e5d4 │ │ movs r6, r0 │ │ - b.n 9e1ec │ │ + b.n 9e1f8 │ │ movs r6, r6 │ │ subs r0, r0, r0 │ │ ands r4, r1 │ │ - b.n 9da66 │ │ + b.n 9da72 │ │ strb r6, [r2, #0] │ │ - b.n 9e68a │ │ + b.n 9e696 │ │ movs r0, r0 │ │ - b.n 9e5f6 │ │ + b.n 9e602 │ │ lsls r7, r5, #1 │ │ lsrs r0, r0, #8 │ │ strb r0, [r0, #0] │ │ - b.n 9da7e │ │ + b.n 9da8a │ │ ldr r1, [r6, #32] │ │ - b.n 9e560 │ │ + b.n 9e56c │ │ str r5, [r2, #60] @ 0x3c │ │ - b.n 9e5e0 │ │ + b.n 9e5ec │ │ movs r6, r0 │ │ - b.n 9e210 │ │ + b.n 9e21c │ │ strb r5, [r0, #0] │ │ - b.n 9e2a6 │ │ + b.n 9e2b2 │ │ lsls r1, r5, #1 │ │ subs r0, r0, r0 │ │ str r0, [r0, r1] │ │ - b.n 9da96 │ │ + b.n 9daa2 │ │ strb r0, [r2, #0] │ │ - b.n 9da9c │ │ + b.n 9daa8 │ │ movs r0, r0 │ │ - b.n 9e624 │ │ + b.n 9e630 │ │ movs r6, r5 │ │ lsrs r0, r0, #8 │ │ str r4, [r0, #0] │ │ - b.n 9daa6 │ │ + b.n 9dab2 │ │ strb r3, [r0, #0] │ │ - b.n 9e582 │ │ + b.n 9e58e │ │ strb r2, [r0, #0] │ │ - b.n 9e606 │ │ + b.n 9e612 │ │ movs r7, r0 │ │ - b.n 9e1b6 │ │ + b.n 9e1c2 │ │ movs r3, r5 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n 9e5be │ │ + b.n 9e5ca │ │ movs r5, r5 │ │ subs r0, r0, r0 │ │ strb r4, [r1, #1] │ │ - b.n 9dac2 │ │ + b.n 9dace │ │ str r0, [r1, #0] │ │ - b.n 9dabe │ │ + b.n 9daca │ │ str r0, [r2, r2] │ │ - b.n 9dacc │ │ + b.n 9dad8 │ │ strb r7, [r0, #0] │ │ - b.n 9e032 │ │ + b.n 9e03e │ │ str r7, [r0, #16] │ │ - b.n 9ded4 │ │ - bl 4f9aaa │ │ + b.n 9dee0 │ │ + bl 4f9ab6 │ │ str r0, [r2, r1] │ │ - b.n 9dada │ │ + b.n 9dae6 │ │ strb r7, [r0, #4] │ │ - b.n 9dee0 │ │ + b.n 9deec │ │ movs r7, r0 │ │ - b.n 9e266 │ │ + b.n 9e272 │ │ lsls r3, r2, #1 │ │ subs r0, r0, r0 │ │ lsls r2, r0, #28 │ │ - b.n 9e5e8 │ │ + b.n 9e5f4 │ │ movs r4, r6 │ │ subs r0, r0, r0 │ │ lsrs r1, r0, #32 │ │ - b.n 9e5f0 │ │ + b.n 9e5fc │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ strb r0, [r2, #0] │ │ - b.n 9daf2 │ │ + b.n 9dafe │ │ strb r0, [r6, #2] │ │ - b.n 9e384 │ │ + b.n 9e390 │ │ lsls r4, r6, #1 │ │ - b.n 9e608 │ │ + b.n 9e614 │ │ lsls r2, r3, #1 │ │ subs r0, r0, r0 │ │ strb r0, [r0, #0] │ │ - b.n 9e722 │ │ + b.n 9e72e │ │ strb r0, [r0, #0] │ │ - b.n 9daea │ │ + b.n 9daf6 │ │ lsls r3, r5, #1 │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n 9e72e │ │ + b.n 9e73a │ │ movs r0, r0 │ │ - b.n 9e692 │ │ + b.n 9e69e │ │ lsls r5, r1, #1 │ │ subs r0, r0, r0 │ │ movs r7, r0 │ │ - b.n 9e33a │ │ + b.n 9e346 │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {r7, r8, ip} │ │ - b.n 9db40 │ │ + b.n 9db4c │ │ strb r6, [r2, #0] │ │ - b.n 9e746 │ │ + b.n 9e752 │ │ movs r6, r2 │ │ - b.n 9e74a │ │ + b.n 9e756 │ │ cmp r7, #179 @ 0xb3 │ │ - b.n 9e74e │ │ + b.n 9e75a │ │ asrs r1, r0, #32 │ │ - b.n 9e130 │ │ - str r6, [r4, r2] │ │ + b.n 9e13c │ │ + str r7, [r4, r2] │ │ add.w r0, r0, r7 │ │ - b.n 9e35a │ │ + b.n 9e366 │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {r0, r1, r2, r6} │ │ - b.n 9e636 │ │ + b.n 9e642 │ │ lsrs r7, r2, #32 │ │ - b.n 9e6aa │ │ + b.n 9e6b6 │ │ movs r0, r0 │ │ - b.n 9e2d8 │ │ + b.n 9e2e4 │ │ strb r5, [r0, #0] │ │ - b.n 9e36e │ │ + b.n 9e37a │ │ strb r6, [r2, #0] │ │ lsls r0, r4, #14 │ │ movs r6, r6 │ │ and.w r0, r0, r1, lsl #28 │ │ - b.n 9e77a │ │ + b.n 9e786 │ │ movs r4, r6 │ │ and.w r0, r0, sp, lsl #28 │ │ - b.n 9e782 │ │ + b.n 9e78e │ │ lsrs r2, r0, #32 │ │ - b.n 9e672 │ │ + b.n 9e67e │ │ strb r2, [r0, #0] │ │ lsls r0, r1, #10 │ │ movs r0, r6 │ │ and.w r0, r0, ip, lsl #29 │ │ - b.n 9db7a │ │ + b.n 9db86 │ │ ands r0, r0 │ │ - b.n 9e396 │ │ + b.n 9e3a2 │ │ str r0, [r1, #0] │ │ - b.n 9db7a │ │ + b.n 9db86 │ │ str r4, [r0, r4] │ │ - b.n 9db88 │ │ + b.n 9db94 │ │ stmia r0!, {r0, r1, r2} │ │ - b.n 9e0ee │ │ + b.n 9e0fa │ │ str r3, [r0, #0] │ │ - b.n 9e3a6 │ │ + b.n 9e3b2 │ │ strb r2, [r0, #0] │ │ - b.n 9e3aa │ │ + b.n 9e3b6 │ │ movs r5, r0 │ │ - b.n 9e3ae │ │ + b.n 9e3ba │ │ str r1, [r0, r0] │ │ - b.n 9e3b2 │ │ + b.n 9e3be │ │ asrs r4, r1, #32 │ │ - b.n 9e3b6 │ │ + b.n 9e3c2 │ │ ldrsh.w lr, [r7], #255 │ │ movs r0, #7 │ │ - b.n 9e3be │ │ + b.n 9e3ca │ │ strb r0, [r0, #0] │ │ - b.n 9e3c2 │ │ + b.n 9e3ce │ │ asrs r5, r0, #32 │ │ - b.n 9e3c6 │ │ + b.n 9e3d2 │ │ adds r0, #6 │ │ - b.n 9e3ca │ │ + b.n 9e3d6 │ │ movs r4, r0 │ │ - b.n 9e3ce │ │ + b.n 9e3da │ │ movs r0, r0 │ │ - b.n 9e740 │ │ + b.n 9e74c │ │ @ instruction: 0xffc90aff │ │ movs r5, r3 │ │ and.w r8, r0, r1 │ │ - b.n 9e6c4 │ │ + b.n 9e6d0 │ │ movs r0, r6 │ │ subs r0, r0, r0 │ │ strb r0, [r2, #0] │ │ - b.n 9dbc6 │ │ + b.n 9dbd2 │ │ strb r0, [r6, #2] │ │ - b.n 9e458 │ │ + b.n 9e464 │ │ movs r0, r2 │ │ - b.n 9e6dc │ │ + b.n 9e6e8 │ │ strb r0, [r1, #0] │ │ - b.n 9e3f2 │ │ + b.n 9e3fe │ │ movs r4, r5 │ │ lsrs r0, r0, #8 │ │ ands r4, r1 │ │ - b.n 9dbde │ │ + b.n 9dbea │ │ ldrb r2, [r3, #28] │ │ - b.n 9e6cc │ │ + b.n 9e6d8 │ │ movs r7, r0 │ │ - b.n 9e36a │ │ + b.n 9e376 │ │ @ instruction: 0xffc73aff │ │ str r4, [r0, r0] │ │ - b.n 9dbee │ │ + b.n 9dbfa │ │ strh r0, [r0, #0] │ │ - b.n 9e40e │ │ + b.n 9e41a │ │ strb r1, [r0, #0] │ │ - b.n 9e412 │ │ + b.n 9e41e │ │ lsls r6, r7, #23 │ │ - b.n 9e816 │ │ + b.n 9e822 │ │ str r2, [r0, #0] │ │ - b.n 9e41a │ │ + b.n 9e426 │ │ asrs r5, r0, #32 │ │ - b.n 9e41e │ │ + b.n 9e42a │ │ str r3, [r0, r0] │ │ - b.n 9e422 │ │ - udf #130 @ 0x82 │ │ + b.n 9e42e │ │ + udf #131 @ 0x83 │ │ add.w r0, r0, r5, lsl #12 │ │ - b.n 9e42a │ │ + b.n 9e436 │ │ str r0, [r0, r0] │ │ - b.n 9e42e │ │ + b.n 9e43a │ │ asrs r7, r0, #32 │ │ - b.n 9e432 │ │ + b.n 9e43e │ │ movs r0, #6 │ │ - b.n 9e436 │ │ + b.n 9e442 │ │ movs r0, r1 │ │ - b.n 9e43a │ │ + b.n 9e446 │ │ movs r5, r0 │ │ - b.n 9e3a6 │ │ + b.n 9e3b2 │ │ @ instruction: 0xffb89aff │ │ ldrb r7, [r5, #4] │ │ - b.n 9e716 │ │ + b.n 9e722 │ │ ldrb r7, [r7, #31] │ │ - b.n 9e7a8 │ │ + b.n 9e7b4 │ │ movs r6, r2 │ │ and.w r0, r0, r4, lsl #28 │ │ - b.n 9e622 │ │ + b.n 9e62e │ │ asrs r0, r6, #1 │ │ - b.n 9dc54 │ │ + b.n 9dc60 │ │ movs r7, r0 │ │ - b.n 9e45a │ │ + b.n 9e466 │ │ cmp r6, #45 @ 0x2d │ │ - b.n 9e85e │ │ + b.n 9e86a │ │ asrs r1, r0, #32 │ │ - b.n 9e240 │ │ - str r2, [r4, r1] │ │ + b.n 9e24c │ │ + str r3, [r4, r1] │ │ add.w r0, r0, r7 │ │ - b.n 9e46a │ │ + b.n 9e476 │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {r5, r6, ip} │ │ - b.n 9dc70 │ │ + b.n 9dc7c │ │ strb r0, [r0, #0] │ │ - b.n 9e476 │ │ + b.n 9e482 │ │ movs r2, #222 @ 0xde │ │ - b.n 9e73a │ │ + b.n 9e746 │ │ asrs r1, r0, #32 │ │ - b.n 9e25c │ │ - str r3, [r3, r1] │ │ + b.n 9e268 │ │ + str r4, [r3, r1] │ │ add.w r0, r0, r7 │ │ - b.n 9e486 │ │ + b.n 9e492 │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {r6, ip} │ │ - b.n 9dc8c │ │ + b.n 9dc98 │ │ movs r0, r1 │ │ - b.n 9e492 │ │ + b.n 9e49e │ │ movs r2, #218 @ 0xda │ │ - b.n 9e756 │ │ + b.n 9e762 │ │ asrs r1, r0, #32 │ │ - b.n 9e278 │ │ - str r4, [r2, r1] │ │ + b.n 9e284 │ │ + str r5, [r2, r1] │ │ add.w r0, r0, r8 │ │ - b.n 9e4a2 │ │ + b.n 9e4ae │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {r1, r2, r4, ip, sp, lr} │ │ - b.n 9e8aa │ │ + b.n 9e8b6 │ │ asrs r4, r3, #32 │ │ - b.n 9dcac │ │ + b.n 9dcb8 │ │ movs r7, r0 │ │ - b.n 9e4b2 │ │ + b.n 9e4be │ │ movs r2, #213 @ 0xd5 │ │ - b.n 9e776 │ │ + b.n 9e782 │ │ asrs r1, r0, #32 │ │ - b.n 9e298 │ │ - str r4, [r1, r1] │ │ + b.n 9e2a4 │ │ + str r5, [r1, r1] │ │ add.w r0, r0, r7 │ │ - b.n 9e4c2 │ │ + b.n 9e4ce │ │ ldrh r0, [r6, #46] @ 0x2e │ │ - ldmia.w sp!, {r0, r1, r2, r3, r6, fp, sp, lr, pc} │ │ - vqshl.u32 d30, d31, #22 │ │ - vrintm.f16 q15, │ │ - vcvt.f32.f16 q15, d7 │ │ - vcvt.f32.f16 q15, d19 │ │ + ldmia.w sp!, {r3, r5, r6, fp, sp, lr, pc} │ │ + vqshl.u32 q15, q4, #22 │ │ + vcvt.f32.f16 q15, d0 │ │ + vcvt.f32.f16 q15, d16 │ │ + vqshl.u32 d30, d28, #22 │ │ @ instruction: 0xfff64ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n 9e6bc │ │ - beq.n 9e1ec │ │ - b.n 9e640 │ │ + b.n 9e6c8 │ │ + beq.n 9e1f8 │ │ + b.n 9e64c │ │ str r4, [r2, r0] │ │ - b.n 9dcca │ │ + b.n 9dcd6 │ │ stmia r7!, {r0, r1, r6, r7} │ │ - b.n 9e7be │ │ + b.n 9e7ca │ │ ands r4, r0 │ │ - b.n 9dcd4 │ │ + b.n 9dce0 │ │ ldmia r7, {r0, r1, r2, r3, r4, r5, r6, r7} │ │ - b.n 9e854 │ │ + b.n 9e860 │ │ strb r0, [r1, #0] │ │ - b.n 9dce4 │ │ + b.n 9dcf0 │ │ movs r7, r0 │ │ - b.n 9e466 │ │ + b.n 9e472 │ │ movs r3, r7 │ │ ldrh r0, [r0, #16] │ │ strb r4, [r0, #0] │ │ - b.n 9dcf0 │ │ + b.n 9dcfc │ │ movs r7, r0 │ │ - b.n 9e472 │ │ + b.n 9e47e │ │ movs r0, r7 │ │ subs r2, #0 │ │ - b.n 9e1d8 │ │ - b.n 9dcf6 │ │ + b.n 9e1e4 │ │ + b.n 9dd02 │ │ str r4, [r2, #0] │ │ - b.n 9dd00 │ │ + b.n 9dd0c │ │ movs r6, r0 │ │ - b.n 9e496 │ │ + b.n 9e4a2 │ │ movs r4, r6 │ │ ldrh r0, [r0, #16] │ │ str r0, [r2, r0] │ │ - b.n 9dd0c │ │ + b.n 9dd18 │ │ movs r5, r0 │ │ - b.n 9e4a2 │ │ + b.n 9e4ae │ │ movs r1, r6 │ │ subs r2, #0 │ │ str r0, [r2, r0] │ │ - b.n 9dd0e │ │ + b.n 9dd1a │ │ str r0, [r6, r2] │ │ - b.n 9e59c │ │ + b.n 9e5a8 │ │ movs r0, r1 │ │ - b.n 9e820 │ │ + b.n 9e82c │ │ movs r3, r2 │ │ lsrs r0, r0, #8 │ │ str r0, [r3, #0] │ │ - b.n 9e718 │ │ + b.n 9e724 │ │ movs r4, r0 │ │ - b.n 9e8aa │ │ + b.n 9e8b6 │ │ movs r5, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r1 │ │ - b.n 9e8b2 │ │ + b.n 9e8be │ │ movs r0, r5 │ │ subs r0, r0, r0 │ │ strb r0, [r0, #0] │ │ - b.n 9dd34 │ │ + b.n 9dd40 │ │ movs r7, r0 │ │ - b.n 9e844 │ │ + b.n 9e850 │ │ movs r3, r1 │ │ lsrs r0, r0, #8 │ │ strh r0, [r0, #0] │ │ - b.n 9ddcc │ │ + b.n 9ddd8 │ │ asrs r7, r0, #32 │ │ - b.n 9e92e │ │ + b.n 9e93a │ │ str r0, [sp, #708] @ 0x2c4 │ │ - b.n 9e5d4 │ │ - add r0, pc, #12 @ (adr r0, 9e234 ) │ │ - b.n 9dd58 │ │ + b.n 9e5e0 │ │ + add r0, pc, #12 @ (adr r0, 9e240 ) │ │ + b.n 9dd64 │ │ strb r7, [r0, #0] │ │ - b.n 9e73c │ │ + b.n 9e748 │ │ strh r0, [r3, #0] │ │ - b.n 9ddcc │ │ + b.n 9ddd8 │ │ str r1, [sp, #740] @ 0x2e4 │ │ - b.n 9e5d0 │ │ - add r0, pc, #108 @ (adr r0, 9e2a4 ) │ │ - b.n 9dd54 │ │ + b.n 9e5dc │ │ + add r0, pc, #108 @ (adr r0, 9e2b0 ) │ │ + b.n 9dd60 │ │ movs r5, r4 │ │ and.w r0, r0, r0, lsl #28 │ │ - b.n 9dd64 │ │ + b.n 9dd70 │ │ movs r3, r0 │ │ - b.n 9e874 │ │ + b.n 9e880 │ │ movs r4, r3 │ │ subs r0, r0, r0 │ │ movs r0, r4 │ │ - b.n 9e878 │ │ + b.n 9e884 │ │ movs r5, r2 │ │ lsrs r0, r0, #8 │ │ ands r0, r2 │ │ - b.n 9e770 │ │ + b.n 9e77c │ │ movs r4, r0 │ │ - b.n 9e916 │ │ + b.n 9e922 │ │ movs r7, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r1 │ │ - b.n 9e91e │ │ + b.n 9e92a │ │ movs r2, r2 │ │ subs r0, r0, r0 │ │ str r0, [r0, r0] │ │ - b.n 9dd8e │ │ + b.n 9dd9a │ │ movs r7, r0 │ │ - b.n 9e898 │ │ + b.n 9e8a4 │ │ movs r5, r1 │ │ lsrs r0, r0, #8 │ │ lsls r2, r0, #28 │ │ - b.n 9e89c │ │ + b.n 9e8a8 │ │ movs r3, r5 │ │ subs r0, r0, r0 │ │ strb r0, [r0, #0] │ │ - b.n 9de28 │ │ + b.n 9de34 │ │ movs r0, #7 │ │ - b.n 9e98a │ │ + b.n 9e996 │ │ str r1, [r6, #8] │ │ - b.n 9e630 │ │ + b.n 9e63c │ │ stmia r0!, {r0, r1} │ │ - b.n 9ddb4 │ │ + b.n 9ddc0 │ │ strb r0, [r2, #0] │ │ - b.n 9de28 │ │ + b.n 9de34 │ │ strb r7, [r0, #0] │ │ - b.n 9e79c │ │ + b.n 9e7a8 │ │ str r1, [r6, #24] │ │ - b.n 9e630 │ │ + b.n 9e63c │ │ stmia r0!, {r0, r1, r4} │ │ - b.n 9ddb4 │ │ + b.n 9ddc0 │ │ movs r5, r3 │ │ and.w r0, r0, r0, lsl #20 │ │ - b.n 9ddc6 │ │ + b.n 9ddd2 │ │ movs r3, r0 │ │ - b.n 9e8d0 │ │ + b.n 9e8dc │ │ movs r2, r2 │ │ subs r0, r0, r0 │ │ - str r0, [sp, #112] @ 0x70 │ │ + str r0, [sp, #116] @ 0x74 │ │ @ instruction: 0xeb00c000 │ │ - b.n 9e5f2 │ │ + b.n 9e5fe │ │ movs r4, r1 │ │ - b.n 9e5f6 │ │ - beq.n 9e2f0 │ │ - b.n 9e750 │ │ + b.n 9e602 │ │ + beq.n 9e2fc │ │ + b.n 9e75c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {pc} │ │ - b.n 9de70 │ │ + b.n 9de7c │ │ asrs r3, r0, #32 │ │ - b.n 9e9d2 │ │ + b.n 9e9de │ │ str r0, [sp, #708] @ 0x2c4 │ │ - b.n 9e678 │ │ + b.n 9e684 │ │ strb r3, [r0, #0] │ │ - b.n 9e7dc │ │ + b.n 9e7e8 │ │ strh r0, [r3, #0] │ │ - b.n 9de6c │ │ + b.n 9de78 │ │ str r1, [sp, #740] @ 0x2e4 │ │ - b.n 9e670 │ │ + b.n 9e67c │ │ strb r0, [r0, #0] │ │ - b.n 9de88 │ │ + b.n 9de94 │ │ strb r0, [r0, #0] │ │ - b.n 9de60 │ │ + b.n 9de6c │ │ asrs r0, r1, #32 │ │ - b.n 9e7fc │ │ + b.n 9e808 │ │ ands r4, r1 │ │ - b.n 9de00 │ │ + b.n 9de0c │ │ str r0, [r1, #0] │ │ - b.n 9de04 │ │ + b.n 9de10 │ │ movs r0, r4 │ │ - b.n 9e918 │ │ + b.n 9e924 │ │ @ instruction: 0xffd71aff │ │ @ instruction: 0xffeceaff │ │ lsls r2, r0, #28 │ │ - b.n 9e920 │ │ + b.n 9e92c │ │ @ instruction: 0xffec1aff │ │ strb r0, [r0, #0] │ │ - b.n 9deac │ │ + b.n 9deb8 │ │ movs r0, #3 │ │ - b.n 9ea0e │ │ + b.n 9ea1a │ │ strb r0, [r2, #0] │ │ - b.n 9dea4 │ │ + b.n 9deb0 │ │ strb r3, [r0, #0] │ │ - b.n 9e818 │ │ + b.n 9e824 │ │ str r1, [r6, #8] │ │ - b.n 9e6bc │ │ + b.n 9e6c8 │ │ str r1, [r6, #24] │ │ - b.n 9e6b0 │ │ + b.n 9e6bc │ │ strb r0, [r0, #0] │ │ - b.n 9dec8 │ │ + b.n 9ded4 │ │ strb r0, [r0, #0] │ │ - b.n 9dea2 │ │ + b.n 9deae │ │ movs r0, #13 │ │ - b.n 9e662 │ │ + b.n 9e66e │ │ ands r0, r2 │ │ stmia.w sp, {r0, r1, r2, r3, r4, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ @ instruction: 0xeaff0003 │ │ - b.n 9e958 │ │ + b.n 9e964 │ │ @ instruction: 0xffdf1aff │ │ @ instruction: 0xffdceaff │ │ - ldr r0, [pc, #192] @ (9e3f8 ) │ │ + ldr r0, [pc, #192] @ (9e404 ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n 9e858 │ │ + b.n 9e864 │ │ str r6, [r2, r0] │ │ - b.n 9ea82 │ │ + b.n 9ea8e │ │ movs r0, r0 │ │ - b.n 9e9e6 │ │ + b.n 9e9f2 │ │ lsls r1, r2, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, #0 │ │ - b.n 9de6e │ │ + b.n 9de7a │ │ subs r1, #44 @ 0x2c │ │ - b.n 9e962 │ │ + b.n 9e96e │ │ strb r1, [r6, r6] │ │ - b.n 9e970 │ │ + b.n 9e97c │ │ subs r7, #255 @ 0xff │ │ - b.n 9e9f8 │ │ + b.n 9ea04 │ │ ldrsh r5, [r0, r0] │ │ - b.n 9e9ec │ │ + b.n 9e9f8 │ │ movs r5, r0 │ │ - b.n 9e606 │ │ + b.n 9e612 │ │ movs r4, r4 │ │ subs r0, r0, r0 │ │ movs r0, #12 │ │ - b.n 9de8a │ │ + b.n 9de96 │ │ str r6, [r2, r0] │ │ - b.n 9eaae │ │ + b.n 9eaba │ │ movs r0, r0 │ │ - b.n 9ea16 │ │ + b.n 9ea22 │ │ lsls r6, r0, #1 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, r0] │ │ - b.n 9de9e │ │ - ldr r2, [pc, #196] @ (9e440 ) │ │ - b.n 9e984 │ │ + b.n 9deaa │ │ + ldr r2, [pc, #196] @ (9e44c ) │ │ + b.n 9e990 │ │ mvns r5, r2 │ │ - b.n 9ea04 │ │ + b.n 9ea10 │ │ movs r4, r0 │ │ - b.n 9e630 │ │ + b.n 9e63c │ │ str r3, [r0, r0] │ │ - b.n 9e6ca │ │ + b.n 9e6d6 │ │ lsls r0, r0, #1 │ │ subs r0, r0, r0 │ │ adds r0, #64 @ 0x40 │ │ - b.n 9deb6 │ │ + b.n 9dec2 │ │ str r0, [r2, r0] │ │ - b.n 9debc │ │ + b.n 9dec8 │ │ movs r0, r0 │ │ - b.n 9ea44 │ │ + b.n 9ea50 │ │ movs r4, r3 │ │ lsrs r0, r0, #8 │ │ ands r4, r0 │ │ - b.n 9dec6 │ │ + b.n 9ded2 │ │ str r3, [r0, r0] │ │ - b.n 9e9a6 │ │ + b.n 9e9b2 │ │ str r2, [r0, r0] │ │ - b.n 9ea2a │ │ + b.n 9ea36 │ │ movs r5, r0 │ │ - b.n 9e5d6 │ │ + b.n 9e5e2 │ │ movs r1, r3 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n 9e9de │ │ + b.n 9e9ea │ │ movs r4, r3 │ │ subs r0, r0, r0 │ │ str r4, [r1, r1] │ │ - b.n 9dee2 │ │ + b.n 9deee │ │ ands r0, r1 │ │ - b.n 9dee2 │ │ + b.n 9deee │ │ adds r0, #144 @ 0x90 │ │ - b.n 9deec │ │ + b.n 9def8 │ │ str r5, [r0, r0] │ │ - b.n 9e452 │ │ + b.n 9e45e │ │ adds r1, #5 │ │ - b.n 9e2f4 │ │ - bl 4f9ece │ │ + b.n 9e300 │ │ + bl 4f9eda │ │ movs r0, #80 @ 0x50 │ │ - b.n 9defa │ │ + b.n 9df06 │ │ movs r1, #5 │ │ - b.n 9e2fe │ │ + b.n 9e30a │ │ movs r2, r0 │ │ - b.n 9e684 │ │ + b.n 9e690 │ │ movs r0, r5 │ │ subs r0, r0, r0 │ │ movs r3, r6 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n 9eb2a │ │ + b.n 9eb36 │ │ movs r0, r0 │ │ - b.n 9ea8e │ │ + b.n 9ea9a │ │ movs r5, r3 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n 9e736 │ │ + b.n 9e742 │ │ ldrh r0, [r6, #0] │ │ ldmia.w sp!, {r0, r1, r2, r6} │ │ - b.n 9ea12 │ │ + b.n 9ea1e │ │ str r3, [r0, r0] │ │ - b.n 9e742 │ │ + b.n 9e74e │ │ lsrs r7, r2, #32 │ │ - b.n 9ea8a │ │ + b.n 9ea96 │ │ movs r0, r0 │ │ - b.n 9e6ae │ │ + b.n 9e6ba │ │ str r6, [r2, r0] │ │ lsls r0, r4, #14 │ │ movs r7, r3 │ │ and.w r0, r0, r1, lsl #20 │ │ - b.n 9eb56 │ │ + b.n 9eb62 │ │ movs r5, r3 │ │ and.w r0, r0, sp, lsl #20 │ │ - b.n 9eb5e │ │ + b.n 9eb6a │ │ lsrs r2, r0, #32 │ │ - b.n 9ea4a │ │ + b.n 9ea56 │ │ ldrsb r2, [r0, r7] │ │ lsls r0, r1, #12 │ │ ldrsh r7, [r7, r7] │ │ lsls r7, r1, #13 │ │ movs r0, r3 │ │ and.w r0, r0, ip, lsl #21 │ │ - b.n 9df56 │ │ + b.n 9df62 │ │ ands r0, r1 │ │ - b.n 9df56 │ │ + b.n 9df62 │ │ movs r1, #4 │ │ - b.n 9df60 │ │ + b.n 9df6c │ │ adds r0, #5 │ │ - b.n 9e4c6 │ │ + b.n 9e4d2 │ │ ands r0, r0 │ │ - b.n 9e782 │ │ + b.n 9e78e │ │ str r1, [r0, r0] │ │ - b.n 9e786 │ │ + b.n 9e792 │ │ movs r2, r0 │ │ - b.n 9e78a │ │ + b.n 9e796 │ │ asrs r3, r0, #32 │ │ - b.n 9e78e │ │ + b.n 9e79a │ │ str.w lr, [r1], #255 │ │ asrs r5, r0, #32 │ │ - b.n 9e796 │ │ + b.n 9e7a2 │ │ str r0, [r0, r0] │ │ - b.n 9e79a │ │ + b.n 9e7a6 │ │ movs r4, r0 │ │ - b.n 9e79e │ │ + b.n 9e7aa │ │ movs r0, r0 │ │ - b.n 9eb0c │ │ + b.n 9eb18 │ │ @ instruction: 0xffde0aff │ │ movs r1, r1 │ │ and.w r0, r0, r0, lsl #5 │ │ - b.n 9dfac │ │ + b.n 9dfb8 │ │ str r0, [r0, r0] │ │ - b.n 9e7b2 │ │ + b.n 9e7be │ │ movs r2, #230 @ 0xe6 │ │ - b.n 9ea76 │ │ + b.n 9ea82 │ │ asrs r1, r0, #32 │ │ - b.n 9e598 │ │ - ldr r7, [pc, #560] @ (9e6ac ) │ │ + b.n 9e5a4 │ │ + ldr r7, [pc, #564] @ (9e6bc ) │ │ add.w r0, r0, r5 │ │ - b.n 9e7c2 │ │ + b.n 9e7ce │ │ ldrh r0, [r6, #0] │ │ ldmia.w sp!, {r1, r6, r7, r8, r9, sl} │ │ - b.n 9ea9a │ │ + b.n 9eaa6 │ │ lsrs r7, r7, #31 │ │ - b.n 9eb2c │ │ + b.n 9eb38 │ │ str r2, [r0, r0] │ │ - b.n 9e992 │ │ + b.n 9e99e │ │ asrs r4, r2, #32 │ │ - b.n 9dfd4 │ │ + b.n 9dfe0 │ │ movs r5, r0 │ │ - b.n 9e7da │ │ + b.n 9e7e6 │ │ cmp r7, #185 @ 0xb9 │ │ - b.n 9ebde │ │ + b.n 9ebea │ │ asrs r1, r0, #32 │ │ - b.n 9e5c0 │ │ - ldr r7, [pc, #520] @ (9e6ac ) │ │ + b.n 9e5cc │ │ + ldr r7, [pc, #524] @ (9e6bc ) │ │ add.w r0, r0, r5 │ │ - b.n 9e7ea │ │ + b.n 9e7f6 │ │ ldrh r0, [r6, #0] │ │ - ldmia.w sp!, {r1, r3, r4, r6, r8, sl, fp, ip, pc} │ │ - @ instruction: 0xfff69d82 │ │ + ldmia.w sp!, {r5, r7, r8, sl, fp, ip, pc} │ │ + vqrdmulh.s , q11, d8[0] │ │ @ instruction: 0xfff64ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n 9e9d8 │ │ - beq.n 9e518 │ │ - b.n 9e95c │ │ + b.n 9e9e4 │ │ + beq.n 9e524 │ │ + b.n 9e968 │ │ str r0, [sp, #0] │ │ - b.n 9e806 │ │ + b.n 9e812 │ │ movs r4, r0 │ │ - b.n 9e06a │ │ + b.n 9e076 │ │ movs r7, r7 │ │ - b.n 9eb6e │ │ + b.n 9eb7a │ │ lsls r4, r7, #6 │ │ ldrh r0, [r0, #16] │ │ str r1, [r0, r0] │ │ - b.n 9e816 │ │ + b.n 9e822 │ │ movs r1, r1 │ │ - b.n 9e81a │ │ + b.n 9e826 │ │ asrs r0, r0, #32 │ │ - b.n 9ec1e │ │ + b.n 9ec2a │ │ movs r0, #0 │ │ - b.n 9ec22 │ │ - str r5, [sp, #924] @ 0x39c │ │ + b.n 9ec2e │ │ + str r5, [sp, #928] @ 0x3a0 │ │ add.w r0, r0, r0 │ │ - b.n 9eb8a │ │ + b.n 9eb96 │ │ lsls r3, r6, #6 │ │ subs r0, r0, r0 │ │ lsls r5, r2, #3 │ │ - b.n 9e8a4 │ │ + b.n 9e8b0 │ │ strh r4, [r3, #0] │ │ - b.n 9ea08 │ │ + b.n 9ea14 │ │ asrs r6, r0, #32 │ │ - b.n 9e0ac │ │ + b.n 9e0b8 │ │ strb r0, [r0, #4] │ │ - b.n 9e42e │ │ + b.n 9e43a │ │ movs r0, #186 @ 0xba │ │ - b.n 9e8b0 │ │ + b.n 9e8bc │ │ asrs r2, r0, #32 │ │ - b.n 9e548 │ │ + b.n 9e554 │ │ movs r7, r4 │ │ - b.n 9eb2c │ │ + b.n 9eb38 │ │ lsls r0, r6, #6 │ │ subs r0, r0, r0 │ │ stmia r0!, {r2, r3, r4, r5, r6} │ │ - b.n 9ea24 │ │ + b.n 9ea30 │ │ movs r0, r4 │ │ - b.n 9eb3a │ │ + b.n 9eb46 │ │ str r0, [sp, #112] @ 0x70 │ │ - b.n 9e034 │ │ + b.n 9e040 │ │ lsls r1, r6, #2 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #2 │ │ - b.n 9e63a │ │ + b.n 9e646 │ │ str r4, [r2, #0] │ │ - b.n 9ea34 │ │ + b.n 9ea40 │ │ lsls r0, r6, #2 │ │ - b.n 9e8ca │ │ + b.n 9e8d6 │ │ lsls r0, r0, #2 │ │ - b.n 9e63a │ │ + b.n 9e646 │ │ lsls r0, r6, #2 │ │ - b.n 9e8d2 │ │ - add r0, pc, #0 @ (adr r0, 9e534 ) │ │ - b.n 9e642 │ │ + b.n 9e8de │ │ + add r0, pc, #0 @ (adr r0, 9e540 ) │ │ + b.n 9e64e │ │ movs r4, r0 │ │ - b.n 9e0ee │ │ + b.n 9e0fa │ │ movs r4, r0 │ │ - b.n 9eb5e │ │ + b.n 9eb6a │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n 9e586 │ │ + b.n 9e592 │ │ movs r2, r0 │ │ - b.n 9eb6a │ │ + b.n 9eb76 │ │ movs r7, r3 │ │ lsrs r0, r0, #8 │ │ lsls r4, r6, #30 │ │ - b.n 9eb62 │ │ + b.n 9eb6e │ │ lsrs r7, r7, #31 │ │ - b.n 9ebf4 │ │ + b.n 9ec00 │ │ movs r4, r1 │ │ - b.n 9ea5a │ │ - beq.n 9e594 │ │ - b.n 9e9f4 │ │ + b.n 9ea66 │ │ + beq.n 9e5a0 │ │ + b.n 9ea00 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r5, r7} │ │ - b.n 9eb90 │ │ + b.n 9eb9c │ │ movs r4, r3 │ │ lsrs r0, r0, #8 │ │ movs r0, r3 │ │ - b.n 9e0a0 │ │ + b.n 9e0ac │ │ asrs r0, r2, #32 │ │ - b.n 9e0a4 │ │ + b.n 9e0b0 │ │ cmp r5, #212 @ 0xd4 │ │ - b.n 9e8f6 │ │ + b.n 9e902 │ │ cmn r0, r2 │ │ - b.n 9e8fc │ │ + b.n 9e908 │ │ movs r0, #2 │ │ - b.n 9e626 │ │ + b.n 9e632 │ │ adds r0, #3 │ │ - b.n 9e70c │ │ + b.n 9e718 │ │ movs r0, #1 │ │ - b.n 9eaaa │ │ + b.n 9eab6 │ │ adds r0, #0 │ │ - b.n 9ead0 │ │ + b.n 9eadc │ │ movs r2, #240 @ 0xf0 │ │ - b.n 9e910 │ │ + b.n 9e91c │ │ asrs r4, r0, #32 │ │ - b.n 9e146 │ │ + b.n 9e152 │ │ movs r2, r0 │ │ - b.n 9ebb8 │ │ + b.n 9ebc4 │ │ lsls r0, r6, #1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r2, #32 │ │ - b.n 9e0be │ │ + b.n 9e0ca │ │ asrs r2, r6, #2 │ │ - b.n 9e944 │ │ + b.n 9e950 │ │ movs r0, r0 │ │ - b.n 9ec48 │ │ + b.n 9ec54 │ │ lsls r4, r5, #1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n 9ecee │ │ + b.n 9ecfa │ │ ands r4, r1 │ │ - b.n 9e8f2 │ │ + b.n 9e8fe │ │ lsls r2, r4, #26 │ │ add.w r0, r0, r0 │ │ - b.n 9ec5a │ │ + b.n 9ec66 │ │ lsls r3, r0, #2 │ │ subs r0, r0, r0 │ │ movs r0, r3 │ │ - b.n 9e0f4 │ │ + b.n 9e100 │ │ stmia r0!, {r2} │ │ - b.n 9e906 │ │ + b.n 9e912 │ │ movs r0, r0 │ │ - b.n 9ec6a │ │ + b.n 9ec76 │ │ lsls r3, r4, #1 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n 9e186 │ │ + b.n 9e192 │ │ movs r1, r0 │ │ - b.n 9ebf6 │ │ + b.n 9ec02 │ │ lsls r7, r4, #1 │ │ subs r0, r0, r0 │ │ lsls r1, r0, #2 │ │ and.w r0, r0, r2 │ │ - b.n 9ec02 │ │ + b.n 9ec0e │ │ stmia r0!, {r5} │ │ - b.n 9e100 │ │ + b.n 9e10c │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ lsls r6, r6, #2 │ │ - b.n 9e9a2 │ │ + b.n 9e9ae │ │ asrs r0, r0, #32 │ │ - b.n 9e120 │ │ + b.n 9e12c │ │ movs r0, r0 │ │ - b.n 9e70a │ │ + b.n 9e716 │ │ adds r0, #24 │ │ - b.n 9e12c │ │ + b.n 9e138 │ │ movs r0, #4 │ │ - b.n 9e12c │ │ + b.n 9e138 │ │ asrs r0, r1, #32 │ │ - b.n 9e142 │ │ + b.n 9e14e │ │ movs r4, r3 │ │ - b.n 9e10c │ │ + b.n 9e118 │ │ movs r0, #4 │ │ - b.n 9e10a │ │ + b.n 9e116 │ │ movs r0, r3 │ │ - b.n 9e140 │ │ + b.n 9e14c │ │ asrs r0, r0, #32 │ │ - b.n 9ed52 │ │ + b.n 9ed5e │ │ @ instruction: 0xffa7ebff │ │ movs r0, r0 │ │ - b.n 9ecba │ │ + b.n 9ecc6 │ │ lsls r7, r4, #5 │ │ subs r0, r0, r0 │ │ movs r0, r3 │ │ - b.n 9e154 │ │ + b.n 9e160 │ │ asrs r0, r0, #32 │ │ - b.n 9e966 │ │ + b.n 9e972 │ │ movs r0, #216 @ 0xd8 │ │ - b.n 9e14a │ │ + b.n 9e156 │ │ adds r0, #212 @ 0xd4 │ │ - b.n 9e190 │ │ + b.n 9e19c │ │ movs r0, #2 │ │ - b.n 9e958 │ │ + b.n 9e964 │ │ lsls r5, r0, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, #4 │ │ - b.n 9e1ee │ │ + b.n 9e1fa │ │ movs r2, r0 │ │ - b.n 9ec62 │ │ + b.n 9ec6e │ │ lsls r1, r1, #5 │ │ subs r0, r0, r0 │ │ adds r0, #10 │ │ - b.n 9e986 │ │ + b.n 9e992 │ │ movs r0, #182 @ 0xb6 │ │ - b.n 9ea30 │ │ + b.n 9ea3c │ │ asrs r2, r0, #32 │ │ - b.n 9eb54 │ │ - b.n 9e654 │ │ - b.n 9e754 │ │ + b.n 9eb60 │ │ + b.n 9e660 │ │ + b.n 9e760 │ │ movs r0, #188 @ 0xbc │ │ - b.n 9ea12 │ │ + b.n 9ea1e │ │ lsls r6, r7 │ │ - b.n 9ea16 │ │ + b.n 9ea22 │ │ stmia r0!, {r1} │ │ - b.n 9e6e6 │ │ + b.n 9e6f2 │ │ str r1, [r0, r0] │ │ - b.n 9ee1a │ │ + b.n 9ee26 │ │ lsls r1, r7, #5 │ │ subs r0, r0, r0 │ │ movs r0, #176 @ 0xb0 │ │ - b.n 9ea10 │ │ + b.n 9ea1c │ │ movs r0, #2 │ │ - b.n 9e770 │ │ + b.n 9e77c │ │ movs r0, #28 │ │ - b.n 9e172 │ │ + b.n 9e17e │ │ str r4, [r1, r0] │ │ - b.n 9e1a8 │ │ + b.n 9e1b4 │ │ movs r0, r1 │ │ - b.n 9e1ac │ │ + b.n 9e1b8 │ │ movs r0, #76 @ 0x4c │ │ - b.n 9e1a8 │ │ + b.n 9e1b4 │ │ str r4, [r2, r1] │ │ - b.n 9e1ac │ │ + b.n 9e1b8 │ │ movs r2, r0 │ │ - b.n 9e706 │ │ + b.n 9e712 │ │ lsls r0, r0, #4 │ │ - b.n 9e5b4 │ │ + b.n 9e5c0 │ │ movs r0, r0 │ │ - b.n 9ed2e │ │ + b.n 9ed3a │ │ lsls r4, r0, #5 │ │ lsrs r0, r0, #8 │ │ stmia r0!, {r4, r6, r7} │ │ - b.n 9edd6 │ │ - b.n 9e698 │ │ - b.n 9edda │ │ + b.n 9ede2 │ │ + b.n 9e6a4 │ │ + b.n 9ede6 │ │ strh r6, [r5, #0] │ │ - b.n 9ee5e │ │ + b.n 9ee6a │ │ movs r6, r0 │ │ and.w r0, r0, r8, lsr #8 │ │ - b.n 9e1c6 │ │ + b.n 9e1d2 │ │ lsls r0, r6 │ │ - b.n 9ea52 │ │ + b.n 9ea5e │ │ ands r4, r0 │ │ - b.n 9e7b8 │ │ + b.n 9e7c4 │ │ ands r4, r3 │ │ - b.n 9e1b6 │ │ + b.n 9e1c2 │ │ lsls r4, r5, #2 │ │ - b.n 9e1d6 │ │ + b.n 9e1e2 │ │ movs r0, r0 │ │ - b.n 9ed5a │ │ + b.n 9ed66 │ │ lsls r1, r7, #4 │ │ lsrs r0, r0, #8 │ │ movs r1, r1 │ │ - b.n 9e962 │ │ + b.n 9e96e │ │ @ instruction: 0xfffa0aff │ │ movs r0, #213 @ 0xd5 │ │ - b.n 9ea6a │ │ + b.n 9ea76 │ │ lsrs r5, r2 │ │ - b.n 9ea80 │ │ + b.n 9ea8c │ │ movs r2, r0 │ │ - b.n 9e97a │ │ + b.n 9e986 │ │ @ instruction: 0xfff6caff │ │ movs r1, #4 │ │ - b.n 9e7da │ │ + b.n 9e7e6 │ │ movs r0, #28 │ │ - b.n 9e202 │ │ + b.n 9e20e │ │ movs r7, r0 │ │ - b.n 9e986 │ │ + b.n 9e992 │ │ @ instruction: 0xfff21aff │ │ movs r0, #132 @ 0x84 │ │ - b.n 9e7ea │ │ + b.n 9e7f6 │ │ str r4, [r7, r2] │ │ - b.n 9ea9c │ │ + b.n 9eaa8 │ │ movs r7, #188 @ 0xbc │ │ - b.n 9ea96 │ │ + b.n 9eaa2 │ │ lsls r5, r4, #2 │ │ - b.n 9e99a │ │ + b.n 9e9a6 │ │ movs r7, r1 │ │ cmp r2, #0 │ │ str r0, [r4, r0] │ │ - b.n 9e238 │ │ + b.n 9e244 │ │ lsls r4, r0 │ │ - b.n 9e80c │ │ + b.n 9e818 │ │ str r1, [r0, r0] │ │ - b.n 9ea46 │ │ + b.n 9ea52 │ │ lsls r0, r6 │ │ - b.n 9eab2 │ │ + b.n 9eabe │ │ movs r4, r0 │ │ - b.n 9e9b2 │ │ + b.n 9e9be │ │ ands r3, r0 │ │ - b.n 9ea52 │ │ + b.n 9ea5e │ │ @ instruction: 0xffe20aff │ │ movs r0, #130 @ 0x82 │ │ - b.n 9e826 │ │ + b.n 9e832 │ │ movs r0, #176 @ 0xb0 │ │ - b.n 9eac2 │ │ + b.n 9eace │ │ movs r0, #2 │ │ - b.n 9e82e │ │ + b.n 9e83a │ │ ands r4, r0 │ │ - b.n 9e2ca │ │ + b.n 9e2d6 │ │ movs r2, r0 │ │ - b.n 9ed52 │ │ + b.n 9ed5e │ │ @ instruction: 0xffe01aff │ │ ands r6, r0 │ │ - b.n 9ec36 │ │ + b.n 9ec42 │ │ str r0, [r1, r0] │ │ - b.n 9ec3a │ │ + b.n 9ec46 │ │ @ instruction: 0xffd9eaff │ │ movs r0, #24 │ │ - b.n 9e25e │ │ + b.n 9e26a │ │ stmia r0!, {r2} │ │ - b.n 9e2c2 │ │ - b.n 9e8bc │ │ - b.n 9e24a │ │ + b.n 9e2ce │ │ + b.n 9e8c8 │ │ + b.n 9e256 │ │ strh r4, [r6, #4] │ │ - b.n 9eace │ │ + b.n 9eada │ │ @ instruction: 0xffd8eaff │ │ stmia r0!, {r5} │ │ - b.n 9e28c │ │ + b.n 9e298 │ │ asrs r4, r0, #32 │ │ - b.n 9e30a │ │ + b.n 9e316 │ │ movs r2, r0 │ │ - b.n 9ed7c │ │ + b.n 9ed88 │ │ @ instruction: 0xff8e1aff │ │ asrs r6, r5, #32 │ │ - b.n 9ef22 │ │ + b.n 9ef2e │ │ asrs r4, r6, #2 │ │ - b.n 9eae6 │ │ + b.n 9eaf2 │ │ asrs r0, r0, #32 │ │ - b.n 9eeaa │ │ + b.n 9eeb6 │ │ asrs r4, r7, #2 │ │ - b.n 9e26e │ │ + b.n 9e27a │ │ movs r4, r0 │ │ - b.n 9e326 │ │ + b.n 9e332 │ │ movs r1, r0 │ │ - b.n 9ed96 │ │ + b.n 9eda2 │ │ movs r2, r3 │ │ lsrs r0, r0, #8 │ │ lsls r6, r6, #2 │ │ - b.n 9eb32 │ │ + b.n 9eb3e │ │ asrs r1, r1, #32 │ │ - b.n 9eac2 │ │ + b.n 9eace │ │ str r4, [r0, r0] │ │ - b.n 9e2b4 │ │ + b.n 9e2c0 │ │ str r4, [r1, #0] │ │ - b.n 9eaca │ │ + b.n 9ead6 │ │ movs r0, r0 │ │ - b.n 9e8a2 │ │ + b.n 9e8ae │ │ ands r0, r0 │ │ - b.n 9e2c0 │ │ + b.n 9e2cc │ │ movs r0, #8 │ │ - b.n 9e2b6 │ │ + b.n 9e2c2 │ │ movs r4, r4 │ │ - b.n 9ecb4 │ │ + b.n 9ecc0 │ │ lsrs r0, r6 │ │ - b.n 9eb38 │ │ - ldrb r4, [r5, r0] │ │ + b.n 9eb44 │ │ + ldrb r5, [r5, r0] │ │ add.w r0, r0, r8, asr #32 │ │ - b.n 9e2e0 │ │ + b.n 9e2ec │ │ movs r0, r0 │ │ - b.n 9ee4a │ │ + b.n 9ee56 │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ movs r0, #36 @ 0x24 │ │ - b.n 9e2ec │ │ + b.n 9e2f8 │ │ movs r1, r1 │ │ - b.n 9eaf6 │ │ + b.n 9eb02 │ │ adds r0, #186 @ 0xba │ │ - b.n 9eb5e │ │ + b.n 9eb6a │ │ asrs r0, r2, #32 │ │ - b.n 9e2e2 │ │ - add r5, pc, #892 @ (adr r5, 9eb3c ) │ │ + b.n 9e2ee │ │ + add r5, pc, #896 @ (adr r5, 9eb4c ) │ │ add.w r0, r0, r0 │ │ - b.n 9ee66 │ │ + b.n 9ee72 │ │ stmia r0!, {r1, r2} │ │ - b.n 9eb0a │ │ + b.n 9eb16 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ asrs r4, r1, #32 │ │ - b.n 9e304 │ │ + b.n 9e310 │ │ movs r0, #4 │ │ - b.n 9e2f8 │ │ + b.n 9e304 │ │ movs r0, #2 │ │ - b.n 9eede │ │ + b.n 9eeea │ │ movs r0, #4 │ │ - b.n 9e2e0 │ │ - beq.n 9e818 │ │ - b.n 9ec78 │ │ + b.n 9e2ec │ │ + beq.n 9e824 │ │ + b.n 9ec84 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, sp} │ │ - b.n 9e31c │ │ + b.n 9e328 │ │ movs r4, r1 │ │ - b.n 9e320 │ │ + b.n 9e32c │ │ ands r0, r1 │ │ - b.n 9e324 │ │ + b.n 9e330 │ │ str r0, [r2, #44] @ 0x2c │ │ - b.n 9eb7a │ │ + b.n 9eb86 │ │ asrs r4, r0, #32 │ │ - b.n 9e31e │ │ + b.n 9e32a │ │ str r1, [r0, #0] │ │ - b.n 9ecaa │ │ + b.n 9ecb6 │ │ str r4, [r1, r1] │ │ - b.n 9e322 │ │ + b.n 9e32e │ │ strb r0, [r0, #0] │ │ - b.n 9ed94 │ │ + b.n 9eda0 │ │ strh r0, [r4, #0] │ │ - b.n 9e324 │ │ + b.n 9e330 │ │ str r0, [r6, #44] @ 0x2c │ │ - b.n 9eb92 │ │ + b.n 9eb9e │ │ movs r0, #213 @ 0xd5 │ │ - b.n 9ebc4 │ │ + b.n 9ebd0 │ │ lsls r2, r0, #2 │ │ - b.n 9e92e │ │ + b.n 9e93a │ │ strb r2, [r0, #4] │ │ - b.n 9e74a │ │ + b.n 9e756 │ │ strh r4, [r1, #0] │ │ - b.n 9eb5e │ │ + b.n 9eb6a │ │ str r0, [r6, #8] │ │ - b.n 9ebc2 │ │ + b.n 9ebce │ │ movs r1, r1 │ │ - b.n 9eb66 │ │ - str r6, [sp, #740] @ 0x2e4 │ │ + b.n 9eb72 │ │ + str r6, [sp, #744] @ 0x2e8 │ │ add.w r0, r0, ip │ │ - b.n 9e360 │ │ - add r0, pc, #20 @ (adr r0, 9e844 ) │ │ - b.n 9e8ba │ │ + b.n 9e36c │ │ + add r0, pc, #20 @ (adr r0, 9e850 ) │ │ + b.n 9e8c6 │ │ lsls r4, r2, #1 │ │ - b.n 9e356 │ │ + b.n 9e362 │ │ lsls r2, r1, #4 │ │ - b.n 9e75a │ │ + b.n 9e766 │ │ movs r0, r0 │ │ - b.n 9eede │ │ + b.n 9eeea │ │ movs r0, r7 │ │ lsrs r0, r0, #8 │ │ stmia r0!, {} │ │ - b.n 9ef86 │ │ + b.n 9ef92 │ │ movs r2, r1 │ │ and.w r0, r0, r8, lsr #4 │ │ - b.n 9e372 │ │ + b.n 9e37e │ │ adds r0, #4 │ │ - b.n 9e3f6 │ │ + b.n 9e402 │ │ movs r0, r0 │ │ - b.n 9eef8 │ │ + b.n 9ef04 │ │ adds r0, #8 │ │ - b.n 9ef60 │ │ + b.n 9ef6c │ │ adds r0, #4 │ │ - b.n 9e3e2 │ │ + b.n 9e3ee │ │ cmp r7, #209 @ 0xd1 │ │ asrs r7, r1, #12 │ │ stmia r0!, {r2, r3, r4, r5, r7} │ │ asrs r1, r0, #22 │ │ movs r0, #180 @ 0xb4 │ │ asrs r1, r0, #7 │ │ lsls r4, r5, #2 │ │ - b.n 9e38e │ │ + b.n 9e39a │ │ movs r0, r0 │ │ - b.n 9ef12 │ │ + b.n 9ef1e │ │ movs r3, r5 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #32 │ │ - b.n 9e42c │ │ + b.n 9e438 │ │ movs r0, #0 │ │ - b.n 9ebbe │ │ + b.n 9ebca │ │ movs r1, r0 │ │ - b.n 9eea4 │ │ + b.n 9eeb0 │ │ movs r0, #24 │ │ asrs r0, r2, #22 │ │ movs r1, r1 │ │ - b.n 9eb2e │ │ + b.n 9eb3a │ │ @ instruction: 0xfff60aff │ │ asrs r5, r2, #3 │ │ - b.n 9ec36 │ │ + b.n 9ec42 │ │ lsrs r5, r2 │ │ - b.n 9ec48 │ │ + b.n 9ec54 │ │ movs r1, r0 │ │ - b.n 9eb42 │ │ + b.n 9eb4e │ │ @ instruction: 0xfff2caff │ │ adds r0, #28 │ │ - b.n 9eda6 │ │ + b.n 9edb2 │ │ asrs r4, r0, #4 │ │ - b.n 9e7cc │ │ + b.n 9e7d8 │ │ movs r7, r0 │ │ - b.n 9eb4c │ │ + b.n 9eb58 │ │ @ instruction: 0xffee1aff │ │ str r4, [r7, r1] │ │ - b.n 9edb6 │ │ + b.n 9edc2 │ │ lsls r4, r0 │ │ - b.n 9ebf6 │ │ + b.n 9ec02 │ │ asrs r5, r0, #32 │ │ - b.n 9ebfa │ │ + b.n 9ec06 │ │ lsls r4, r6 │ │ - b.n 9ec20 │ │ + b.n 9ec2c │ │ movs r6, r0 │ │ - b.n 9eb6a │ │ + b.n 9eb76 │ │ @ instruction: 0xffe00aff │ │ movs r0, #24 │ │ - b.n 9e3ee │ │ + b.n 9e3fa │ │ ands r1, r0 │ │ strh r4, [r0, #18] │ │ lsls r0, r6 │ │ - b.n 9ec54 │ │ + b.n 9ec60 │ │ movs r0, r0 │ │ - b.n 9ef7a │ │ + b.n 9ef86 │ │ @ instruction: 0xffe30aff │ │ asrs r5, r2, #3 │ │ - b.n 9ec82 │ │ + b.n 9ec8e │ │ movs r0, r0 │ │ - b.n 9ef84 │ │ + b.n 9ef90 │ │ @ instruction: 0xffe04aff │ │ asrs r5, r2, #3 │ │ - b.n 9ec9c │ │ + b.n 9eca8 │ │ adds r1, #1 │ │ - b.n 9e814 │ │ + b.n 9e820 │ │ asrs r1, r0, #2 │ │ - b.n 9e9fc │ │ + b.n 9ea08 │ │ asrs r0, r6, #2 │ │ - b.n 9ec98 │ │ + b.n 9eca4 │ │ adds r0, #20 │ │ - b.n 9ee00 │ │ + b.n 9ee0c │ │ asrs r1, r0, #2 │ │ - b.n 9ea04 │ │ + b.n 9ea10 │ │ asrs r0, r6, #2 │ │ - b.n 9eca4 │ │ + b.n 9ecb0 │ │ asrs r1, r0, #32 │ │ - b.n 9ea0c │ │ + b.n 9ea18 │ │ adds r0, #4 │ │ - b.n 9e4ac │ │ + b.n 9e4b8 │ │ adds r0, #6 │ │ - b.n 9ed14 │ │ + b.n 9ed20 │ │ movs r4, r0 │ │ - b.n 9efb8 │ │ + b.n 9efc4 │ │ adds r0, #182 @ 0xb6 │ │ lsls r1, r2, #7 │ │ asrs r3, r0, #32 │ │ lsls r1, r0, #2 │ │ asrs r0, r1, #32 │ │ lsls r1, r0, #10 │ │ asrs r4, r3, #32 │ │ lsls r2, r0, #22 │ │ @ instruction: 0xffd0eaff │ │ movs r1, r1 │ │ - b.n 9ec6a │ │ - add r2, sp, #140 @ 0x8c │ │ + b.n 9ec76 │ │ + add r2, sp, #144 @ 0x90 │ │ add.w r0, r0, r0 │ │ - b.n 9efd2 │ │ + b.n 9efde │ │ @ instruction: 0xffa51aff │ │ asrs r4, r0, #32 │ │ - b.n 9e4ec │ │ + b.n 9e4f8 │ │ movs r0, r3 │ │ - b.n 9e470 │ │ + b.n 9e47c │ │ asrs r0, r1, #32 │ │ - b.n 9f044 │ │ + b.n 9f050 │ │ asrs r4, r0, #32 │ │ - b.n 9e4d8 │ │ + b.n 9e4e4 │ │ movs r0, r0 │ │ - b.n 9efea │ │ + b.n 9eff6 │ │ subs r1, r2, #7 │ │ asrs r7, r1, #12 │ │ asrs r4, r6, #2 │ │ asrs r0, r0, #7 │ │ asrs r0, r0, #32 │ │ asrs r0, r4, #14 │ │ asrs r4, r7, #2 │ │ asrs r0, r0, #22 │ │ movs r0, r0 │ │ - b.n 9f09e │ │ + b.n 9f0aa │ │ strb r5, [r2, #3] │ │ - b.n 9ed14 │ │ + b.n 9ed20 │ │ movs r0, r0 │ │ - b.n 9f014 │ │ + b.n 9f020 │ │ lsls r4, r2, #2 │ │ - ldr r2, [pc, #0] @ (9e968 ) │ │ + ldr r2, [pc, #0] @ (9e974 ) │ │ asrs r4, r1, #32 │ │ - b.n 9e4a0 │ │ + b.n 9e4ac │ │ asrs r4, r2, #1 │ │ - b.n 9e494 │ │ + b.n 9e4a0 │ │ str r2, [r1, r4] │ │ - b.n 9e898 │ │ + b.n 9e8a4 │ │ movs r0, r0 │ │ - b.n 9f024 │ │ + b.n 9f030 │ │ lsls r7, r1, #2 │ │ lsrs r0, r0, #8 │ │ movs r0, r4 │ │ - b.n 9e4bc │ │ + b.n 9e4c8 │ │ asrs r7, r0, #2 │ │ - b.n 9ea96 │ │ + b.n 9eaa2 │ │ asrs r0, r6, #2 │ │ - b.n 9ed2c │ │ + b.n 9ed38 │ │ stmia r1!, {r0, r1, r2} │ │ - b.n 9e8ae │ │ + b.n 9e8ba │ │ asrs r0, r3, #32 │ │ - b.n 9e4ac │ │ + b.n 9e4b8 │ │ lsls r4, r7, #2 │ │ - b.n 9ed4e │ │ - b.n 9ead8 │ │ - b.n 9ecda │ │ + b.n 9ed5a │ │ + b.n 9eae4 │ │ + b.n 9ece6 │ │ movs r6, r0 │ │ and.w pc, r0, r1, lsr #7 │ │ - b.n 9efc0 │ │ + b.n 9efcc │ │ asrs r4, r6, #2 │ │ - b.n 9ed26 │ │ + b.n 9ed32 │ │ asrs r0, r0, #32 │ │ - b.n 9f0ea │ │ + b.n 9f0f6 │ │ asrs r4, r7, #2 │ │ - b.n 9e4ae │ │ + b.n 9e4ba │ │ str r4, [r5, r2] │ │ - b.n 9e4dc │ │ + b.n 9e4e8 │ │ movs r0, r0 │ │ - b.n 9f060 │ │ + b.n 9f06c │ │ lsls r7, r7, #1 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n 9e570 │ │ + b.n 9e57c │ │ str r5, [r0, #0] │ │ - b.n 9ed02 │ │ + b.n 9ed0e │ │ movs r1, r0 │ │ - b.n 9efe6 │ │ + b.n 9eff2 │ │ str r0, [r3, #0] │ │ asrs r5, r2, #22 │ │ lsls r5, r2, #3 │ │ - b.n 9ed7a │ │ + b.n 9ed86 │ │ movs r0, r0 │ │ - b.n 9ec80 │ │ + b.n 9ec8c │ │ @ instruction: 0xfff5caff │ │ ands r4, r3 │ │ - b.n 9eee6 │ │ + b.n 9eef2 │ │ lsls r7, r0, #4 │ │ - b.n 9e906 │ │ + b.n 9e912 │ │ movs r4, r1 │ │ - b.n 9ec82 │ │ + b.n 9ec8e │ │ @ instruction: 0xfff11aff │ │ adds r0, #124 @ 0x7c │ │ - b.n 9eef6 │ │ + b.n 9ef02 │ │ lsls r7, r0, #2 │ │ - b.n 9ed2e │ │ + b.n 9ed3a │ │ strh r3, [r0, #0] │ │ - b.n 9ed32 │ │ + b.n 9ed3e │ │ lsls r0, r6, #2 │ │ - b.n 9ed66 │ │ + b.n 9ed72 │ │ movs r0, r0 │ │ - b.n 9ecb6 │ │ + b.n 9ecc2 │ │ movs r6, r1 │ │ ldrh r0, [r0, #16] │ │ movs r6, r0 │ │ - b.n 9ed42 │ │ + b.n 9ed4e │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n 9ed46 │ │ - add r0, pc, #56 @ (adr r0, 9ea40 ) │ │ - b.n 9ed4a │ │ + b.n 9ed52 │ │ + add r0, pc, #56 @ (adr r0, 9ea4c ) │ │ + b.n 9ed56 │ │ adds r0, #32 │ │ - b.n 9e528 │ │ + b.n 9e534 │ │ stc2 11, cr14, [lr], #1020 @ 0x3fc @ │ │ stmia r0!, {r0, r3} │ │ - b.n 9ed56 │ │ + b.n 9ed62 │ │ adds r0, #32 │ │ - b.n 9e554 │ │ + b.n 9e560 │ │ str r0, [sp, #112] @ 0x70 │ │ - b.n 9e558 │ │ + b.n 9e564 │ │ asrs r2, r6, #30 │ │ - b.n 9f032 │ │ + b.n 9f03e │ │ subs r7, r7, #7 │ │ - b.n 9f0c4 │ │ - b.n 9ea3c │ │ - b.n 9ed6a │ │ + b.n 9f0d0 │ │ + b.n 9ea48 │ │ + b.n 9ed76 │ │ movs r1, r0 │ │ - b.n 9ecce │ │ + b.n 9ecda │ │ @ instruction: 0xffde0aff │ │ movs r0, r0 │ │ - b.n 9f0d6 │ │ + b.n 9f0e2 │ │ vpmin.u32 , q10, │ │ movs r4, r0 │ │ - b.n 9e5ea │ │ + b.n 9e5f6 │ │ movs r7, r7 │ │ - b.n 9f0e2 │ │ + b.n 9f0ee │ │ @ instruction: 0xffd98aff │ │ movs r0, r3 │ │ - b.n 9e576 │ │ + b.n 9e582 │ │ movs r0, r0 │ │ - b.n 9f0ee │ │ + b.n 9f0fa │ │ @ instruction: 0xffd60aff │ │ asrs r0, r6, #2 │ │ - b.n 9ee06 │ │ + b.n 9ee12 │ │ movs r0, #24 │ │ - b.n 9e594 │ │ + b.n 9e5a0 │ │ movs r2, r0 │ │ - b.n 9ed00 │ │ + b.n 9ed0c │ │ movs r2, r0 │ │ cmp r2, #0 │ │ asrs r7, r0, #4 │ │ - b.n 9e98e │ │ + b.n 9e99a │ │ movs r4, r1 │ │ - b.n 9ed0c │ │ + b.n 9ed18 │ │ @ instruction: 0xffcf0aff │ │ asrs r5, r2, #3 │ │ - b.n 9ee1e │ │ + b.n 9ee2a │ │ movs r1, #1 │ │ - b.n 9e99e │ │ + b.n 9e9aa │ │ asrs r1, r0, #2 │ │ - b.n 9eb80 │ │ + b.n 9eb8c │ │ asrs r0, r6, #2 │ │ - b.n 9ee20 │ │ + b.n 9ee2c │ │ adds r0, #20 │ │ - b.n 9ef86 │ │ + b.n 9ef92 │ │ asrs r1, r0, #2 │ │ - b.n 9eb8c │ │ + b.n 9eb98 │ │ asrs r0, r6, #2 │ │ - b.n 9ee2c │ │ + b.n 9ee38 │ │ strh r1, [r0, #0] │ │ - b.n 9eb94 │ │ + b.n 9eba0 │ │ asrs r4, r0, #32 │ │ - b.n 9e642 │ │ + b.n 9e64e │ │ movs r4, r0 │ │ - b.n 9f0b8 │ │ + b.n 9f0c4 │ │ @ instruction: 0xffc00aff │ │ adds r0, #213 @ 0xd5 │ │ - b.n 9ee3e │ │ + b.n 9ee4a │ │ movs r0, r0 │ │ - b.n 9f148 │ │ + b.n 9f154 │ │ movs r6, r0 │ │ - ldr r2, [pc, #0] @ (9eaa4 ) │ │ + ldr r2, [pc, #0] @ (9eab0 ) │ │ movs r2, r0 │ │ - b.n 9f0cc │ │ + b.n 9f0d8 │ │ @ instruction: 0xffbf1aff │ │ asrs r6, r6, #2 │ │ - b.n 9ee62 │ │ + b.n 9ee6e │ │ asrs r1, r0, #32 │ │ - b.n 9ebc6 │ │ + b.n 9ebd2 │ │ asrs r0, r1, #32 │ │ - b.n 9efbc │ │ + b.n 9efc8 │ │ asrs r4, r3, #32 │ │ - b.n 9e5be │ │ + b.n 9e5ca │ │ @ instruction: 0xffbaeaff │ │ movs r6, r0 │ │ - b.n 9ee06 │ │ + b.n 9ee12 │ │ asrs r0, r1, #32 │ │ - b.n 9ee0a │ │ - add r0, pc, #56 @ (adr r0, 9eb04 ) │ │ - b.n 9ee0e │ │ + b.n 9ee16 │ │ + add r0, pc, #56 @ (adr r0, 9eb10 ) │ │ + b.n 9ee1a │ │ ands r4, r1 │ │ - b.n 9ee12 │ │ - ldrb r6, [r1, r3] │ │ + b.n 9ee1e │ │ + ldrb r7, [r1, r3] │ │ add.w r0, r0, r0 │ │ - b.n 9f17a │ │ + b.n 9f186 │ │ vpmin.u , , │ │ movs r4, r0 │ │ - b.n 9e692 │ │ + b.n 9e69e │ │ stmia r0!, {r2} │ │ - b.n 9ee26 │ │ - b.n 9eafc │ │ - b.n 9ee2a │ │ + b.n 9ee32 │ │ + b.n 9eb08 │ │ + b.n 9ee36 │ │ movs r2, r0 │ │ - b.n 9f10e │ │ + b.n 9f11a │ │ @ instruction: 0xffae0aff │ │ str r0, [r3, #0] │ │ - b.n 9e622 │ │ + b.n 9e62e │ │ movs r5, r0 │ │ - b.n 9e6a6 │ │ + b.n 9e6b2 │ │ movs r0, r0 │ │ - b.n 9f19e │ │ + b.n 9f1aa │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ movs r6, r0 │ │ - b.n 9ee46 │ │ + b.n 9ee52 │ │ asrs r0, r0, #32 │ │ - b.n 9f24a │ │ + b.n 9f256 │ │ movs r0, #4 │ │ - b.n 9f24e │ │ + b.n 9f25a │ │ cmp r2, #65 @ 0x41 │ │ add.w r0, r0, r0 │ │ - b.n 9f1b6 │ │ + b.n 9f1c2 │ │ vpmin.u32 , q14, │ │ lsls r5, r2, #3 │ │ - b.n 9eeca │ │ + b.n 9eed6 │ │ stmia r0!, {r2} │ │ - b.n 9ee62 │ │ - b.n 9eb38 │ │ - b.n 9ee66 │ │ + b.n 9ee6e │ │ + b.n 9eb44 │ │ + b.n 9ee72 │ │ movs r0, r0 │ │ and.w r0, r0, r0 │ │ - b.n 9f26e │ │ + b.n 9f27a │ │ lsls r0, r0, #2 │ │ - b.n 9ec3e │ │ + b.n 9ec4a │ │ asrs r0, r0, #32 │ │ - b.n 9f276 │ │ + b.n 9f282 │ │ asrs r4, r7, #30 │ │ - b.n 9eeba │ │ + b.n 9eec6 │ │ lsls r5, r2, #3 │ │ - b.n 9eeea │ │ + b.n 9eef6 │ │ asrs r6, r0, #32 │ │ - b.n 9e6ee │ │ + b.n 9e6fa │ │ lsls r0, r0, #4 │ │ - b.n 9ec52 │ │ + b.n 9ec5e │ │ movs r0, #28 │ │ - b.n 9e66a │ │ + b.n 9e676 │ │ lsls r2, r7, #2 │ │ - b.n 9eef2 │ │ + b.n 9eefe │ │ asrs r0, r0, #32 │ │ - b.n 9eb94 │ │ + b.n 9eba0 │ │ movs r7, r4 │ │ - b.n 9f178 │ │ + b.n 9f184 │ │ movs r2, r6 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n 9e70a │ │ + b.n 9e716 │ │ movs r3, r0 │ │ - b.n 9ef62 │ │ + b.n 9ef6e │ │ movs r4, r0 │ │ - b.n 9e6f2 │ │ + b.n 9e6fe │ │ @ instruction: 0xff90eaff │ │ movs r0, #12 │ │ - b.n 9e6a0 │ │ + b.n 9e6ac │ │ lsls r4, r6, #2 │ │ - b.n 9f072 │ │ + b.n 9f07e │ │ lsrs r5, r1, #8 │ │ orn r0, r0, #11520 @ 0x2d00 │ │ - b.n 9e69e │ │ + b.n 9e6aa │ │ movs r0, #48 @ 0x30 │ │ - b.n 9e6a2 │ │ + b.n 9e6ae │ │ adds r0, #182 @ 0xb6 │ │ - b.n 9ef36 │ │ + b.n 9ef42 │ │ movs r0, #8 │ │ - b.n 9e688 │ │ + b.n 9e694 │ │ cmp r2, #13 │ │ orn r0, r0, #8960 @ 0x2300 │ │ - b.n 9e690 │ │ - ldr r2, [pc, #60] @ (9ebcc ) │ │ + b.n 9e69c │ │ + ldr r2, [pc, #60] @ (9ebd8 ) │ │ orn r0, r0, #8585216 @ 0x830000 │ │ - b.n 9ecaa │ │ + b.n 9ecb6 │ │ movs r0, r1 │ │ - b.n 9f09a │ │ + b.n 9f0a6 │ │ lsrs r5, r1, #8 │ │ orr.w sl, r0, #577536 @ 0x8d000 │ │ orr.w sl, r0, #36608 @ 0x8f00 │ │ orr.w r0, r0, #9437184 @ 0x900000 │ │ - b.n 9e6dc │ │ + b.n 9e6e8 │ │ movs r2, #208 @ 0xd0 │ │ - b.n 9ef2e │ │ + b.n 9ef3a │ │ movs r0, #1 │ │ - b.n 9f056 │ │ + b.n 9f062 │ │ adds r0, #0 │ │ - b.n 9f13c │ │ + b.n 9f148 │ │ movs r2, #240 @ 0xf0 │ │ - b.n 9ef3a │ │ + b.n 9ef46 │ │ movs r0, r0 │ │ - b.n 9f2fe │ │ - beq.n 9ebf8 │ │ - b.n 9f058 │ │ + b.n 9f30a │ │ + beq.n 9ec04 │ │ + b.n 9f064 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r2, r3, r4, r5} │ │ - b.n 9f30a │ │ - beq.n 9ec04 │ │ - b.n 9f064 │ │ + b.n 9f316 │ │ + beq.n 9ec10 │ │ + b.n 9f070 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r5, r9} │ │ - b.n 9e714 │ │ + b.n 9e720 │ │ movs r0, r0 │ │ - b.n 9ecf8 │ │ + b.n 9ed04 │ │ asrs r2, r3, #1 │ │ - b.n 9e77e │ │ + b.n 9e78a │ │ lsls r4, r6, #30 │ │ - b.n 9f1f2 │ │ + b.n 9f1fe │ │ lsrs r7, r7, #31 │ │ - b.n 9f284 │ │ + b.n 9f290 │ │ movs r0, r0 │ │ - b.n 9f28c │ │ + b.n 9f298 │ │ @ instruction: 0xfff30aff │ │ asrs r0, r2, #8 │ │ - b.n 9e730 │ │ + b.n 9e73c │ │ ands r0, r2 │ │ - b.n 9e724 │ │ + b.n 9e730 │ │ adds r2, #12 │ │ - b.n 9e738 │ │ + b.n 9e744 │ │ asrs r1, r0, #32 │ │ - b.n 9ed1c │ │ + b.n 9ed28 │ │ ands r0, r0 │ │ - b.n 9e71c │ │ + b.n 9e728 │ │ ands r0, r0 │ │ - b.n 9ef46 │ │ + b.n 9ef52 │ │ adds r0, #3 │ │ - b.n 9ed28 │ │ + b.n 9ed34 │ │ movs r0, #4 │ │ - b.n 9e728 │ │ + b.n 9e734 │ │ movs r1, r0 │ │ - b.n 9f352 │ │ + b.n 9f35e │ │ movs r5, #254 @ 0xfe │ │ - b.n 9f216 │ │ - bfcsel 6, 9e416 , a, eq │ │ + b.n 9f222 │ │ + bfcsel 6, 9e422 , a, eq │ │ movs r4, r0 │ │ - b.n 9ef5e │ │ - beq.n 9ec58 │ │ - b.n 9f0b8 │ │ + b.n 9ef6a │ │ + beq.n 9ec64 │ │ + b.n 9f0c4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r5, r6, r7, r8, ip} │ │ - b.n 9e768 │ │ + b.n 9e774 │ │ blxns r6 │ │ - b.n 9f23e │ │ - ldr r7, [pc, #1020] @ (9f02c ) │ │ - b.n 9f2d0 │ │ + b.n 9f24a │ │ + ldr r7, [pc, #1020] @ (9f038 ) │ │ + b.n 9f2dc │ │ asrs r1, r0, #32 │ │ - b.n 9ed54 │ │ + b.n 9ed60 │ │ asrs r2, r3, #1 │ │ - b.n 9e7dc │ │ + b.n 9e7e8 │ │ movs r0, r0 │ │ - b.n 9f2e0 │ │ + b.n 9f2ec │ │ lsls r4, r4, #1 │ │ subs r0, r0, r0 │ │ str r0, [sp, #112] @ 0x70 │ │ - b.n 9e780 │ │ + b.n 9e78c │ │ movs r4, r0 │ │ - b.n 9ef8a │ │ + b.n 9ef96 │ │ mrc2 10, 6, lr, cr15, cr15, {7} @ │ │ lsls r5, r2, #3 │ │ - b.n 9f004 │ │ + b.n 9f010 │ │ str r0, [sp, #20] │ │ - b.n 9ef96 │ │ + b.n 9efa2 │ │ asrs r0, r4, #32 │ │ - b.n 9e794 │ │ + b.n 9e7a0 │ │ lsls r0, r0, #2 │ │ - b.n 9ed60 │ │ + b.n 9ed6c │ │ asrs r2, r7, #2 │ │ - b.n 9f01e │ │ + b.n 9f02a │ │ lsls r0, r6, #2 │ │ - b.n 9f006 │ │ + b.n 9f012 │ │ movs r0, r4 │ │ - b.n 9f28c │ │ + b.n 9f298 │ │ movs r4, r2 │ │ - b.n 9e788 │ │ + b.n 9e794 │ │ movs r0, r0 │ │ - b.n 9e7a6 │ │ + b.n 9e7b2 │ │ str r5, [r0, r0] │ │ - b.n 9ecf6 │ │ + b.n 9ed02 │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ asrs r2, r4, #2 │ │ - b.n 9efde │ │ + b.n 9efea │ │ movs r4, r2 │ │ - b.n 9f3c2 │ │ + b.n 9f3ce │ │ movs r0, r3 │ │ - b.n 9e7a0 │ │ + b.n 9e7ac │ │ movs r2, r5 │ │ lsrs r0, r0, #8 │ │ movs r0, r2 │ │ - b.n 9f332 │ │ + b.n 9f33e │ │ movs r6, r1 │ │ - b.n 9eda4 │ │ + b.n 9edb0 │ │ movs r0, #15 │ │ movs r2, #137 @ 0x89 │ │ movs r0, r2 │ │ - b.n 9e7b4 │ │ + b.n 9e7c0 │ │ movs r0, r2 │ │ movs r3, #82 @ 0x52 │ │ movs r4, r0 │ │ cmp r2, #0 │ │ strh r1, [r0, #0] │ │ - b.n 9efe6 │ │ + b.n 9eff2 │ │ movs r1, r1 │ │ - b.n 9efea │ │ + b.n 9eff6 │ │ movs r5, r2 │ │ and.w r0, r0, r8, lsr #20 │ │ - b.n 9e7cc │ │ + b.n 9e7d8 │ │ movs r7, r3 │ │ @ instruction: 0xea009bb0 │ │ cdp 0, 10, cr2, cr0, cr2, {0} │ │ - b.n 9f1c0 │ │ + b.n 9f1cc │ │ movs r0, r2 │ │ - b.n 9e7fc │ │ + b.n 9e808 │ │ adds r0, #7 │ │ - b.n 9f448 │ │ + b.n 9f454 │ │ lsls r0, r4, #1 │ │ @ instruction: 0xf3f44082 │ │ - b.n 9edea │ │ + b.n 9edf6 │ │ movs r0, #130 @ 0x82 │ │ - b.n 9edd2 │ │ + b.n 9edde │ │ strh r7, [r0, #0] │ │ - b.n 9f0d8 │ │ + b.n 9f0e4 │ │ movs r7, r1 │ │ - b.n 9f49a │ │ + b.n 9f4a6 │ │ adds r0, #12 │ │ - b.n 9e7f8 │ │ + b.n 9e804 │ │ lsrs r0, r4, #3 │ │ @ instruction: 0xf2f02a00 │ │ orn r0, r4, #139264 @ 0x22000 │ │ - b.n 9f190 │ │ + b.n 9f19c │ │ cmp r0, #224 @ 0xe0 │ │ @ instruction: 0xf3522a00 │ │ - bl ffce1ce6 │ │ + bl ffce1cf2 │ │ subs r7, r7, r3 │ │ movs r4, r1 │ │ - b.n 9e834 │ │ + b.n 9e840 │ │ movs r1, r0 │ │ - b.n 9ef9e │ │ + b.n 9efaa │ │ movs r1, r1 │ │ - b.n 9f042 │ │ + b.n 9f04e │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ asrs r1, r1, #32 │ │ - b.n 9f21a │ │ + b.n 9f226 │ │ adds r0, #16 │ │ - b.n 9e848 │ │ + b.n 9e854 │ │ movs r0, #129 @ 0x81 │ │ - b.n 9ee2e │ │ + b.n 9ee3a │ │ lsls r1, r0 │ │ - b.n 9ee1c │ │ + b.n 9ee28 │ │ asrs r1, r0, #32 │ │ - b.n 9f22a │ │ + b.n 9f236 │ │ adds r0, #178 @ 0xb2 │ │ - b.n 9edc2 │ │ + b.n 9edce │ │ asrs r1, r0, #32 │ │ - b.n 9f1a4 │ │ + b.n 9f1b0 │ │ movs r1, r0 │ │ - b.n 9f3c8 │ │ + b.n 9f3d4 │ │ adds r0, #0 │ │ - b.n 9edb0 │ │ + b.n 9edbc │ │ adds r0, #178 @ 0xb2 │ │ - b.n 9edb6 │ │ + b.n 9edc2 │ │ @ instruction: 0xfff98aff │ │ lsls r6, r7 │ │ - b.n 9f0f2 │ │ + b.n 9f0fe │ │ subs r6, r7, #7 │ │ - b.n 9f358 │ │ + b.n 9f364 │ │ strh r1, [r0, #0] │ │ - b.n 9ed56 │ │ + b.n 9ed62 │ │ asrs r0, r1, #32 │ │ - b.n 9edca │ │ + b.n 9edd6 │ │ asrs r6, r7, #2 │ │ - b.n 9f0e2 │ │ + b.n 9f0ee │ │ asrs r0, r2, #32 │ │ - b.n 9e878 │ │ + b.n 9e884 │ │ asrs r0, r2, #32 │ │ - b.n 9e86a │ │ + b.n 9e876 │ │ str r0, [r0, r0] │ │ - b.n 9e866 │ │ + b.n 9e872 │ │ asrs r0, r3, #32 │ │ - b.n 9e890 │ │ + b.n 9e89c │ │ lsls r6, r7, #2 │ │ - b.n 9f108 │ │ + b.n 9f114 │ │ movs r0, #14 │ │ - b.n 9ee60 │ │ + b.n 9ee6c │ │ asrs r0, r0, #32 │ │ - b.n 9ee6e │ │ + b.n 9ee7a │ │ movs r0, #1 │ │ - b.n 9edea │ │ + b.n 9edf6 │ │ movs r1, r1 │ │ - b.n 9ee6c │ │ - bls.n 9edb8 │ │ + b.n 9ee78 │ │ + bls.n 9ee46 │ │ @ instruction: 0xfb0000bc │ │ - b.n 9f120 │ │ + b.n 9f12c │ │ movs r0, #160 @ 0xa0 │ │ - b.n 9f0d6 │ │ + b.n 9f0e2 │ │ movs r5, r1 │ │ lsrs r0, r0, #8 │ │ movs r4, r2 │ │ - b.n 9e8b8 │ │ + b.n 9e8c4 │ │ asrs r2, r0, #2 │ │ - b.n 9ee90 │ │ + b.n 9ee9c │ │ asrs r2, r2, #32 │ │ - b.n 9f288 │ │ + b.n 9f294 │ │ movs r0, #1 │ │ - b.n 9f28e │ │ + b.n 9f29a │ │ lsls r0, r0, #2 │ │ - b.n 9ee9a │ │ + b.n 9eea6 │ │ lsls r0, r6, #2 │ │ - b.n 9f132 │ │ + b.n 9f13e │ │ adds r0, #176 @ 0xb0 │ │ - b.n 9f138 │ │ + b.n 9f144 │ │ movs r0, #1 │ │ - b.n 9f21e │ │ + b.n 9f22a │ │ movs r0, r0 │ │ - b.n 9f044 │ │ + b.n 9f050 │ │ adds r0, #8 │ │ str r0, [sp, #524] @ 0x20c │ │ adds r0, #176 @ 0xb0 │ │ str r1, [sp, #772] @ 0x304 │ │ asrs r2, r0, #32 │ │ - b.n 9f22c │ │ + b.n 9f238 │ │ movs r1, r0 │ │ - b.n 9f452 │ │ + b.n 9f45e │ │ @ instruction: 0xfff78aff │ │ lsls r6, r7, #2 │ │ - b.n 9f164 │ │ + b.n 9f170 │ │ asrs r2, r1, #32 │ │ - b.n 9eecc │ │ + b.n 9eed8 │ │ str r0, [sp, #112] @ 0x70 │ │ - b.n 9e8f8 │ │ + b.n 9e904 │ │ adds r0, #6 │ │ - b.n 9f2c4 │ │ + b.n 9f2d0 │ │ movs r0, r1 │ │ - b.n 9eec6 │ │ + b.n 9eed2 │ │ lsls r6, r7, #2 │ │ - b.n 9f158 │ │ + b.n 9f164 │ │ asrs r0, r1, #32 │ │ - b.n 9f2d0 │ │ + b.n 9f2dc │ │ movs r0, r3 │ │ - b.n 9e904 │ │ + b.n 9e910 │ │ mcr2 10, 1, lr, cr3, cr15, {7} @ │ │ asrs r4, r6, #32 │ │ - b.n 9e918 │ │ + b.n 9e924 │ │ movs r0, #16 │ │ - b.n 9e902 │ │ + b.n 9e90e │ │ adds r0, #48 @ 0x30 │ │ - b.n 9e920 │ │ + b.n 9e92c │ │ asrs r1, r0, #32 │ │ - b.n 9ef04 │ │ + b.n 9ef10 │ │ movs r0, #0 │ │ - b.n 9e904 │ │ + b.n 9e910 │ │ movs r1, #233 @ 0xe9 │ │ - b.n 9f3ee │ │ + b.n 9f3fa │ │ adds r0, #3 │ │ - b.n 9ef10 │ │ + b.n 9ef1c │ │ movs r4, r0 │ │ - b.n 9e910 │ │ + b.n 9e91c │ │ movs r1, r0 │ │ - b.n 9f53a │ │ - bfcsel 4, 9f5fa , 8, cs │ │ + b.n 9f546 │ │ + bfcsel 4, 9f606 , 8, cs │ │ @ instruction: 0xff8feaff │ │ - ldc2l 0, cr0, [r4], #-12 │ │ - ldmia r2!, {r0, r1, r5, r6} │ │ - vtbl.8 d25, {d6-d7}, d21 │ │ - vcvt.f16.u16 d31, d8, #10 │ │ + stc2 0, cr0, [r8], {3} │ │ + ldmia r2, {r0, r1, r2, r6} │ │ + vtbx.8 d25, {d6-d7}, d27 │ │ + vdup.16 d31, d28[1] │ │ movs r3, r0 │ │ - add r1, sp, #428 @ 0x1ac │ │ - vqshl.u32 d25, d29, #22 │ │ + add r2, sp, #264 @ 0x108 │ │ + vrintp.f16 d25, d3 │ │ @ instruction: 0xfff64ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n 9f33c │ │ + b.n 9f348 │ │ svc 119 @ 0x77 │ │ - b.n 9f2c0 │ │ + b.n 9f2cc │ │ strb r6, [r2, #0] │ │ - b.n 9f56a │ │ + b.n 9f576 │ │ movs r0, r0 │ │ - b.n 9f4d4 │ │ + b.n 9f4e0 │ │ lsls r5, r3, #10 │ │ lsrs r0, r0, #8 │ │ - add r0, pc, #0 @ (adr r0, 9ee34 ) │ │ - b.n 9f176 │ │ + add r0, pc, #0 @ (adr r0, 9ee40 ) │ │ + b.n 9f182 │ │ movs r0, r0 │ │ - b.n 9f57a │ │ + b.n 9f586 │ │ str r3, [r0, #0] │ │ - b.n 9f17e │ │ + b.n 9f18a │ │ str r1, [r0, r0] │ │ - b.n 9f182 │ │ + b.n 9f18e │ │ lsls r1, r0, #4 │ │ - b.n 9f4ea │ │ + b.n 9f4f6 │ │ movs r0, r0 │ │ - b.n 9e950 │ │ + b.n 9e95c │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n 9f506 │ │ + b.n 9f512 │ │ movs r2, r3 │ │ subs r0, r0, r0 │ │ lsls r3, r2, #10 │ │ and.w pc, r0, r5, ror #3 │ │ - b.n 9f47c │ │ + b.n 9f488 │ │ lsrs r3, r7, #31 │ │ - b.n 9f500 │ │ + b.n 9f50c │ │ movs r0, r0 │ │ - b.n 9ee6a │ │ + b.n 9ee76 │ │ movs r3, r6 │ │ - b.n 9f50a │ │ + b.n 9f516 │ │ movs r6, r0 │ │ - bge.n 9ee6e │ │ + bge.n 9ee7a │ │ lsls r3, r2, #1 │ │ - b.n 9f512 │ │ + b.n 9f51e │ │ lsls r7, r7, #2 │ │ ldmia r2!, {} │ │ movs r4, r6 │ │ - b.n 9f51a │ │ + b.n 9f526 │ │ movs r3, r1 │ │ lsrs r0, r0, #8 │ │ lsls r4, r0, #1 │ │ - b.n 9f522 │ │ + b.n 9f52e │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ lsls r5, r7, #2 │ │ and.w r0, r0, r4, lsr #32 │ │ - b.n 9f52e │ │ + b.n 9f53a │ │ lsls r3, r7, #2 │ │ ldrh r0, [r0, #16] │ │ asrs r1, r2, #32 │ │ - b.n 9f496 │ │ + b.n 9f4a2 │ │ adds r0, #2 │ │ - b.n 9f1da │ │ + b.n 9f1e6 │ │ movs r0, #1 │ │ - b.n 9f5de │ │ + b.n 9f5ea │ │ asrs r0, r2, #32 │ │ - b.n 9f522 │ │ + b.n 9f52e │ │ movs r2, r2 │ │ - b.n 9f0c8 │ │ + b.n 9f0d4 │ │ movs r0, #3 │ │ - b.n 9f1ea │ │ + b.n 9f1f6 │ │ lsls r4, r6, #2 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n 9f566 │ │ + b.n 9f572 │ │ lsls r4, r7, #9 │ │ lsrs r0, r0, #8 │ │ movs r2, r1 │ │ - b.n 9f2be │ │ + b.n 9f2ca │ │ movs r2, r1 │ │ - b.n 9f55e │ │ + b.n 9f56a │ │ lsls r1, r7, #9 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n 9e9fa │ │ + b.n 9ea06 │ │ subs r1, #44 @ 0x2c │ │ - b.n 9f4da │ │ + b.n 9f4e6 │ │ subs r1, r6, r0 │ │ - b.n 9f4d4 │ │ + b.n 9f4e0 │ │ subs r7, #255 @ 0xff │ │ - b.n 9f570 │ │ + b.n 9f57c │ │ asrs r5, r2, #15 │ │ - b.n 9f558 │ │ + b.n 9f564 │ │ movs r1, r0 │ │ - b.n 9f17a │ │ + b.n 9f186 │ │ lsls r5, r5, #5 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n 9ea16 │ │ + b.n 9ea22 │ │ movs r0, r2 │ │ - b.n 9ea06 │ │ + b.n 9ea12 │ │ movs r0, r0 │ │ - b.n 9f58a │ │ + b.n 9f596 │ │ lsls r5, r5, #5 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n 9eaa6 │ │ + b.n 9eab2 │ │ movs r3, r6 │ │ - b.n 9f516 │ │ + b.n 9f522 │ │ lsls r6, r5, #5 │ │ subs r0, r0, r0 │ │ lsls r1, r0, #28 │ │ - b.n 9f522 │ │ + b.n 9f52e │ │ movs r6, r0 │ │ asrs r2, r3, #23 │ │ movs r2, r0 │ │ asrs r0, r2, #12 │ │ lsls r2, r6, #5 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n 9f5b8 │ │ + b.n 9f5c4 │ │ movs r0, r0 │ │ asrs r5, r2, #22 │ │ movs r0, r0 │ │ asrs r0, r2, #13 │ │ lsls r3, r1, #5 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n 9f608 │ │ + b.n 9f614 │ │ movs r1, r0 │ │ asrs r0, r6, #13 │ │ lsls r5, r1, #5 │ │ lsrs r0, r0, #8 │ │ movs r2, r0 │ │ - b.n 9f614 │ │ + b.n 9f620 │ │ movs r2, r0 │ │ asrs r0, r6, #13 │ │ lsls r5, r3, #9 │ │ lsrs r0, r0, #8 │ │ strh r0, [r0, #2] │ │ - b.n 9ea6a │ │ + b.n 9ea76 │ │ asrs r4, r0, #32 │ │ - b.n 9ea64 │ │ + b.n 9ea70 │ │ movs r0, #28 │ │ - b.n 9ea58 │ │ + b.n 9ea64 │ │ lsls r4, r7, #18 │ │ - b.n 9f2f2 │ │ + b.n 9f2fe │ │ movs r0, r7 │ │ - b.n 9f3c6 │ │ + b.n 9f3d2 │ │ movs r0, r0 │ │ - b.n 9f1ec │ │ + b.n 9f1f8 │ │ lsls r6, r2, #9 │ │ ldrh r0, [r0, #16] │ │ asrs r4, r4, #1 │ │ - b.n 9ea82 │ │ + b.n 9ea8e │ │ strb r0, [r0, #0] │ │ - b.n 9f696 │ │ + b.n 9f6a2 │ │ lsls r4, r2, #4 │ │ - b.n 9ea8a │ │ + b.n 9ea96 │ │ str r0, [r2, #0] │ │ - b.n 9ea78 │ │ + b.n 9ea84 │ │ movs r1, r0 │ │ - b.n 9f202 │ │ + b.n 9f20e │ │ strb r1, [r0, #0] │ │ adds r3, #0 │ │ movs r3, r0 │ │ - b.n 9f60a │ │ + b.n 9f616 │ │ lsls r7, r1, #1 │ │ subs r2, #0 │ │ asrs r4, r1, #2 │ │ - b.n 9eaa2 │ │ + b.n 9eaae │ │ str r2, [r0, #0] │ │ - b.n 9f6b6 │ │ - add r0, pc, #80 @ (adr r0, 9efc8 ) │ │ - b.n 9ea94 │ │ + b.n 9f6c2 │ │ + add r0, pc, #80 @ (adr r0, 9efd4 ) │ │ + b.n 9eaa0 │ │ str r0, [r3, r0] │ │ - b.n 9ea98 │ │ + b.n 9eaa4 │ │ movs r3, r0 │ │ and.w r0, r0, r1, lsl #24 │ │ - b.n 9f492 │ │ + b.n 9f49e │ │ strb r2, [r0, #0] │ │ - b.n 9f2ca │ │ + b.n 9f2d6 │ │ movs r0, r0 │ │ - b.n 9f23a │ │ + b.n 9f246 │ │ lsls r7, r0, #1 │ │ cmp r2, #0 │ │ movs r0, #6 │ │ - b.n 9f098 │ │ + b.n 9f0a4 │ │ adds r0, #208 @ 0xd0 │ │ - b.n 9f33e │ │ + b.n 9f34a │ │ movs r0, #1 │ │ - b.n 9f6de │ │ + b.n 9f6ea │ │ movs r1, r0 │ │ - b.n 9f688 │ │ + b.n 9f694 │ │ @ instruction: 0xfff6caff │ │ lsls r0, r2, #2 │ │ - b.n 9eada │ │ + b.n 9eae6 │ │ lsls r6, r0, #4 │ │ - b.n 9eece │ │ - bl 4faaae │ │ - add r0, pc, #0 @ (adr r0, 9efb4 ) │ │ - b.n 9f2f6 │ │ + b.n 9eeda │ │ + bl 4faaba │ │ + add r0, pc, #0 @ (adr r0, 9efc0 ) │ │ + b.n 9f302 │ │ lsrs r4, r3, #3 │ │ - b.n 9f34a │ │ + b.n 9f356 │ │ str r0, [sp, #24] │ │ - b.n 9ef5e │ │ + b.n 9ef6a │ │ lsls r6, r0, #4 │ │ - b.n 9eee4 │ │ - bl 4faac2 │ │ + b.n 9eef0 │ │ + bl 4faace │ │ movs r2, r1 │ │ - b.n 9f26a │ │ + b.n 9f276 │ │ @ instruction: 0xfff81aff │ │ lsls r0, r1, #2 │ │ - b.n 9eb02 │ │ + b.n 9eb0e │ │ asrs r0, r2, #2 │ │ - b.n 9eb06 │ │ + b.n 9eb12 │ │ lsls r6, r0, #10 │ │ - b.n 9f0da │ │ + b.n 9f0e6 │ │ adds r0, #28 │ │ - b.n 9eafe │ │ + b.n 9eb0a │ │ movs r0, r3 │ │ - b.n 9eb02 │ │ + b.n 9eb0e │ │ movs r0, r5 │ │ - b.n 9eb00 │ │ + b.n 9eb0c │ │ lsls r1, r7, #1 │ │ - b.n 9ed48 │ │ + b.n 9ed54 │ │ adds r0, #44 @ 0x2c │ │ - b.n 9eb08 │ │ + b.n 9eb14 │ │ movs r1, r0 │ │ - b.n 9f6d2 │ │ + b.n 9f6de │ │ str r4, [r0, r0] │ │ - b.n 9eb18 │ │ - bl 4faaf6 │ │ + b.n 9eb24 │ │ + bl 4fab02 │ │ lsls r0, r3, #11 │ │ ldmia r2!, {} │ │ movs r0, r5 │ │ - b.n 9eb3c │ │ + b.n 9eb48 │ │ movs r0, r0 │ │ - b.n 9f6a6 │ │ + b.n 9f6b2 │ │ lsls r5, r2, #11 │ │ lsrs r0, r0, #8 │ │ movs r4, r5 │ │ - b.n 9eb48 │ │ + b.n 9eb54 │ │ movs r0, r0 │ │ - b.n 9f6b2 │ │ + b.n 9f6be │ │ lsls r0, r1, #2 │ │ asrs r0, r3, #22 │ │ movs r0, #32 │ │ asrs r0, r2, #22 │ │ movs r0, r0 │ │ asrs r2, r2, #13 │ │ lsls r7, r1, #11 │ │ lsrs r0, r0, #8 │ │ asrs r0, r3, #32 │ │ - b.n 9eb60 │ │ + b.n 9eb6c │ │ movs r0, r5 │ │ - b.n 9f544 │ │ + b.n 9f550 │ │ vrhadd.u d14, d2, d31 │ │ asrs r0, r2, #2 │ │ - b.n 9eb62 │ │ + b.n 9eb6e │ │ asrs r6, r0, #4 │ │ - b.n 9ef58 │ │ - bl 4fab36 │ │ + b.n 9ef64 │ │ + bl 4fab42 │ │ movs r1, r0 │ │ - b.n 9f2f2 │ │ + b.n 9f2fe │ │ lsls r7, r0, #11 │ │ subs r0, r0, r0 │ │ asrs r0, r2, #2 │ │ - b.n 9eb76 │ │ + b.n 9eb82 │ │ asrs r4, r0, #32 │ │ - b.n 9eb6c │ │ - bl 4fab4a │ │ + b.n 9eb78 │ │ + bl 4fab56 │ │ movs r1, r0 │ │ - b.n 9f2fc │ │ + b.n 9f308 │ │ lsls r2, r0, #11 │ │ subs r0, r0, r0 │ │ asrs r4, r1, #2 │ │ - b.n 9eb8a │ │ + b.n 9eb96 │ │ movs r0, #6 │ │ - b.n 9f000 │ │ + b.n 9f00c │ │ movs r2, r0 │ │ - b.n 9f314 │ │ + b.n 9f320 │ │ movs r0, #136 @ 0x88 │ │ lsls r0, r3, #22 │ │ ands r5, r0 │ │ lsls r0, r4, #6 │ │ str r0, [r5, r0] │ │ lsls r5, r3, #22 │ │ adds r2, #134 @ 0x86 │ │ @@ -180758,8361 +180638,8361 @@ │ │ movs r0, #24 │ │ lsls r3, r6, #22 │ │ movs r2, r0 │ │ lsls r5, r2, #5 │ │ lsls r0, r7, #10 │ │ subs r0, r0, r0 │ │ movs r0, #44 @ 0x2c │ │ - b.n 9ebbc │ │ + b.n 9ebc8 │ │ adds r0, #4 │ │ - b.n 9ebac │ │ + b.n 9ebb8 │ │ movs r3, r0 │ │ - b.n 9f32e │ │ + b.n 9f33a │ │ movs r0, r0 │ │ lsls r0, r2, #13 │ │ lsls r0, r2, #2 │ │ lsrs r0, r0, #8 │ │ - add r0, pc, #80 @ (adr r0, 9f0e4 ) │ │ - b.n 9ebd0 │ │ + add r0, pc, #80 @ (adr r0, 9f0f0 ) │ │ + b.n 9ebdc │ │ movs r3, r0 │ │ - b.n 9f33e │ │ + b.n 9f34a │ │ str r0, [r3, r0] │ │ - b.n 9ebd8 │ │ + b.n 9ebe4 │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ lsls r4, r2, #4 │ │ - b.n 9ebd6 │ │ + b.n 9ebe2 │ │ movs r0, #7 │ │ - b.n 9f3ea │ │ + b.n 9f3f6 │ │ @ instruction: 0xffb4eaff │ │ movs r0, #7 │ │ - b.n 9f3f2 │ │ + b.n 9f3fe │ │ movs r1, r0 │ │ - b.n 9f6da │ │ + b.n 9f6e6 │ │ lsls r0, r1, #8 │ │ lsrs r0, r0, #8 │ │ eors r0, r0 │ │ - b.n 9ebf2 │ │ - b.n 9ed0e │ │ + b.n 9ebfe │ │ + b.n 9ed1c │ │ add.w r8, r0, r1 │ │ - b.n 9f766 │ │ + b.n 9f772 │ │ lsls r3, r5, #10 │ │ add r2, sp, #0 │ │ lsrs r1, r2, #24 │ │ - b.n 9f5d6 │ │ - b.n 9edce │ │ + b.n 9f5e2 │ │ + b.n 9eddc │ │ add.w r0, r0, r0 │ │ - b.n 9f776 │ │ + b.n 9f782 │ │ lsls r4, r0, #11 │ │ subs r0, r0, r0 │ │ lsls r0, r2, #3 │ │ - b.n 9f468 │ │ + b.n 9f474 │ │ add r8, sl │ │ - b.n 9f476 │ │ + b.n 9f482 │ │ movs r0, #48 @ 0x30 │ │ - b.n 9ec90 │ │ + b.n 9ec9c │ │ asrs r4, r4, #32 │ │ - b.n 9eb00 │ │ + b.n 9eb0c │ │ movs r4, r0 │ │ - b.n 9f712 │ │ + b.n 9f71e │ │ movs r0, r5 │ │ - b.n 9eb08 │ │ + b.n 9eb14 │ │ lsls r3, r7, #3 │ │ subs r0, r0, r0 │ │ lsls r4, r2, #4 │ │ - b.n 9ec22 │ │ + b.n 9ec2e │ │ movs r3, r0 │ │ - b.n 9f79e │ │ + b.n 9f7aa │ │ lsls r5, r7, #4 │ │ subs r2, #0 │ │ strh r0, [r5, #0] │ │ - b.n 9f59c │ │ + b.n 9f5a8 │ │ str r2, [r0, #0] │ │ - b.n 9f84a │ │ + b.n 9f856 │ │ strb r0, [r3, #1] │ │ - b.n 9f84e │ │ + b.n 9f85a │ │ str r0, [r0, r0] │ │ - b.n 9f452 │ │ + b.n 9f45e │ │ movs r5, r0 │ │ and.w r0, r0, r6 │ │ - b.n 9f3c4 │ │ + b.n 9f3d0 │ │ str r6, [r0, r0] │ │ movs r1, #160 @ 0xa0 │ │ str r1, [r0, #0] │ │ - b.n 9f62e │ │ + b.n 9f63a │ │ strb r0, [r4, #0] │ │ - b.n 9f634 │ │ + b.n 9f640 │ │ movs r0, r0 │ │ - b.n 9f3d6 │ │ + b.n 9f3e2 │ │ lsls r3, r6, #4 │ │ cmp r2, #0 │ │ asrs r4, r1, #2 │ │ - b.n 9ec5a │ │ + b.n 9ec66 │ │ asrs r6, r0, #32 │ │ - b.n 9f238 │ │ + b.n 9f244 │ │ asrs r0, r2, #3 │ │ - b.n 9f4dc │ │ + b.n 9f4e8 │ │ movs r0, r0 │ │ - b.n 9f7e0 │ │ + b.n 9f7ec │ │ @ instruction: 0xfff45aff │ │ lsls r0, r1, #2 │ │ - b.n 9ec6e │ │ + b.n 9ec7a │ │ asrs r7, r0, #32 │ │ - b.n 9f24a │ │ + b.n 9f256 │ │ movs r0, #32 │ │ - b.n 9ec6e │ │ + b.n 9ec7a │ │ movs r0, r1 │ │ - b.n 9f492 │ │ + b.n 9f49e │ │ vrhadd.u d14, d2, d31 │ │ movs r0, r0 │ │ - b.n 9f7fa │ │ + b.n 9f806 │ │ movs r1, r3 │ │ lsrs r0, r0, #8 │ │ lsls r4, r2, #4 │ │ - b.n 9ec8a │ │ + b.n 9ec96 │ │ str r1, [r0, #0] │ │ - b.n 9f672 │ │ + b.n 9f67e │ │ strb r0, [r4, #0] │ │ - b.n 9f678 │ │ + b.n 9f684 │ │ movs r0, r0 │ │ - b.n 9f41a │ │ + b.n 9f426 │ │ @ instruction: 0xffee3aff │ │ lsls r1, r4, #4 │ │ and.w r0, r0, r4, lsr #1 │ │ - b.n 9f81a │ │ + b.n 9f826 │ │ lsls r4, r6, #1 │ │ asrs r0, r2, #13 │ │ vpmin.u8 q8, q13, │ │ lsrs r0, r0, #11 │ │ - b.n 9ecc4 │ │ + b.n 9ecd0 │ │ movs r0, r0 │ │ - b.n 9f2a8 │ │ + b.n 9f2b4 │ │ lsls r2, r3, #1 │ │ - b.n 9ed2e │ │ + b.n 9ed3a │ │ movs r3, r0 │ │ - b.n 9f832 │ │ + b.n 9f83e │ │ lsls r4, r0, #7 │ │ subs r2, #0 │ │ subs r0, r6, r2 │ │ - b.n 9ecd8 │ │ + b.n 9ece4 │ │ lsls r1, r0, #28 │ │ - b.n 9f922 │ │ + b.n 9f92e │ │ subs r2, #172 @ 0xac │ │ - b.n 9ece0 │ │ + b.n 9ecec │ │ movs r0, #190 @ 0xbe │ │ - b.n 9f8e6 │ │ + b.n 9f8f2 │ │ asrs r1, r0, #32 │ │ - b.n 9f2c8 │ │ + b.n 9f2d4 │ │ movs r0, r0 │ │ - b.n 9ecc8 │ │ + b.n 9ecd4 │ │ adds r0, #3 │ │ - b.n 9f2d0 │ │ + b.n 9f2dc │ │ movs r3, r0 │ │ - b.n 9f8f6 │ │ - bfcsel 0, 9e9b6 , 4, vs │ │ + b.n 9f902 │ │ + bfcsel 0, 9e9c2 , 4, vs │ │ movs r7, r0 │ │ - b.n 9f4fe │ │ - beq.n 9f1f8 │ │ - b.n 9f658 │ │ + b.n 9f50a │ │ + beq.n 9f204 │ │ + b.n 9f664 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3} │ │ - b.n 9ecfe │ │ + b.n 9ed0a │ │ ands r7, r3 │ │ - b.n 9f5da │ │ + b.n 9f5e6 │ │ strh r6, [r4, r2] │ │ - b.n 9f512 │ │ + b.n 9f51e │ │ movs r6, r0 │ │ - b.n 9f476 │ │ + b.n 9f482 │ │ lsls r2, r3, #8 │ │ ldr r2, [sp, #0] │ │ lsls r0, r1, #1 │ │ - b.n 9ed12 │ │ + b.n 9ed1e │ │ asrs r1, r0, #32 │ │ - b.n 9f922 │ │ + b.n 9f92e │ │ lsls r5, r0, #4 │ │ - b.n 9f106 │ │ + b.n 9f112 │ │ lsls r0, r6, #16 │ │ - b.n 9f40c │ │ + b.n 9f418 │ │ lsls r5, r2, #8 │ │ lsrs r0, r0, #8 │ │ lsls r4, r1, #1 │ │ - b.n 9ed26 │ │ + b.n 9ed32 │ │ movs r6, r0 │ │ - b.n 9f2f6 │ │ + b.n 9f302 │ │ lsls r0, r2, #3 │ │ - b.n 9f59a │ │ + b.n 9f5a6 │ │ movs r1, r0 │ │ - b.n 9f8de │ │ + b.n 9f8ea │ │ lsls r0, r2, #8 │ │ ldmia r2!, {} │ │ asrs r0, r0, #1 │ │ - b.n 9ed3a │ │ + b.n 9ed46 │ │ asrs r0, r2, #2 │ │ - b.n 9ed2c │ │ + b.n 9ed38 │ │ asrs r6, r0, #4 │ │ - b.n 9f130 │ │ - bl 4fad0e │ │ + b.n 9f13c │ │ + bl 4fad1a │ │ movs r0, #80 @ 0x50 │ │ - b.n 9ed4a │ │ + b.n 9ed56 │ │ movs r1, #6 │ │ - b.n 9f13e │ │ + b.n 9f14a │ │ movs r2, r0 │ │ - b.n 9f4c0 │ │ + b.n 9f4cc │ │ lsls r0, r1, #8 │ │ subs r0, r0, r0 │ │ lsls r0, r6, #1 │ │ - b.n 9f004 │ │ + b.n 9f010 │ │ movs r0, r2 │ │ - b.n 9f84a │ │ + b.n 9f856 │ │ movs r7, r3 │ │ subs r0, r0, r0 │ │ lsls r4, r1, #1 │ │ - b.n 9ed66 │ │ + b.n 9ed72 │ │ asrs r6, r0, #32 │ │ - b.n 9f1d6 │ │ + b.n 9f1e2 │ │ lsls r0, r0, #3 │ │ - b.n 9f8dc │ │ + b.n 9f8e8 │ │ lsls r1, r5, #1 │ │ subs r0, r0, r0 │ │ asrs r0, r0, #2 │ │ - b.n 9f982 │ │ + b.n 9f98e │ │ asrs r6, r0, #32 │ │ - b.n 9f1c6 │ │ + b.n 9f1d2 │ │ movs r0, r1 │ │ - b.n 9ed7e │ │ + b.n 9ed8a │ │ movs r6, r0 │ │ - b.n 9f4ee │ │ + b.n 9f4fa │ │ lsls r5, r0, #8 │ │ ldr r2, [sp, #0] │ │ lsls r0, r1, #1 │ │ - b.n 9ed8a │ │ + b.n 9ed96 │ │ asrs r1, r0, #32 │ │ - b.n 9f99a │ │ + b.n 9f9a6 │ │ lsls r5, r0, #4 │ │ - b.n 9f17e │ │ + b.n 9f18a │ │ lsls r0, r6, #16 │ │ - b.n 9f484 │ │ + b.n 9f490 │ │ lsls r0, r0, #8 │ │ lsrs r0, r0, #8 │ │ lsls r4, r1, #1 │ │ - b.n 9ed9e │ │ + b.n 9edaa │ │ movs r6, r0 │ │ - b.n 9f36e │ │ + b.n 9f37a │ │ lsls r0, r2, #3 │ │ - b.n 9f612 │ │ + b.n 9f61e │ │ movs r1, r0 │ │ - b.n 9f956 │ │ + b.n 9f962 │ │ lsls r3, r7, #7 │ │ ldmia r2!, {} │ │ asrs r0, r0, #1 │ │ - b.n 9edb2 │ │ + b.n 9edbe │ │ asrs r0, r2, #2 │ │ - b.n 9eda4 │ │ + b.n 9edb0 │ │ asrs r6, r0, #4 │ │ - b.n 9f1a8 │ │ - bl 4fad86 │ │ + b.n 9f1b4 │ │ + bl 4fad92 │ │ movs r0, #80 @ 0x50 │ │ - b.n 9edc2 │ │ + b.n 9edce │ │ movs r1, #6 │ │ - b.n 9f1b6 │ │ + b.n 9f1c2 │ │ movs r2, r0 │ │ - b.n 9f538 │ │ + b.n 9f544 │ │ lsls r3, r6, #7 │ │ subs r0, r0, r0 │ │ strb r4, [r0, #31] │ │ - b.n 9f8ae │ │ + b.n 9f8ba │ │ lsls r0, r6, #1 │ │ - b.n 9f080 │ │ + b.n 9f08c │ │ movs r0, r2 │ │ - b.n 9f8c6 │ │ + b.n 9f8d2 │ │ ldrb r7, [r7, #31] │ │ - b.n 9f948 │ │ + b.n 9f954 │ │ lsls r1, r7, #5 │ │ lsrs r0, r0, #8 │ │ movs r0, #28 │ │ - b.n 9edec │ │ + b.n 9edf8 │ │ asrs r6, r0, #32 │ │ - b.n 9f5f6 │ │ + b.n 9f602 │ │ adds r0, #8 │ │ - b.n 9edf0 │ │ + b.n 9edfc │ │ movs r4, r1 │ │ - b.n 9edf4 │ │ + b.n 9ee00 │ │ movs r0, r0 │ │ - b.n 9eddc │ │ + b.n 9ede8 │ │ movs r2, r1 │ │ - b.n 9f606 │ │ - cbz r6, 9f302 │ │ + b.n 9f612 │ │ + cbz r7, 9f30e │ │ add.w r0, r0, r0 │ │ - b.n 9f96e │ │ + b.n 9f97a │ │ lsls r5, r5, #5 │ │ lsrs r0, r0, #8 │ │ lsls r7, r0, #6 │ │ @ instruction: 0xea00f05b │ │ sbcs.w r0, pc, #8448 @ 0x2100 │ │ - b.n 9f61e │ │ + b.n 9f62a │ │ movs r4, r3 │ │ - b.n 9ee1c │ │ + b.n 9ee28 │ │ lsls r1, r0, #4 │ │ - b.n 9f986 │ │ + b.n 9f992 │ │ lsls r1, r0, #1 │ │ subs r0, r0, r0 │ │ movs r4, r2 │ │ - b.n 9ee28 │ │ + b.n 9ee34 │ │ stmia r0!, {r0, r1, r2, r3, r4} │ │ - b.n 9f6fe │ │ + b.n 9f70a │ │ cmp r6, r4 │ │ - b.n 9f636 │ │ + b.n 9f642 │ │ asrs r0, r1, #32 │ │ - b.n 9ee1a │ │ + b.n 9ee26 │ │ movs r6, r0 │ │ - b.n 9f5a0 │ │ + b.n 9f5ac │ │ lsls r0, r4, #7 │ │ ldr r2, [sp, #0] │ │ asrs r0, r1, #1 │ │ - b.n 9ee26 │ │ + b.n 9ee32 │ │ movs r1, #4 │ │ - b.n 9f22c │ │ + b.n 9f238 │ │ asrs r1, r0, #32 │ │ - b.n 9fa4e │ │ + b.n 9fa5a │ │ lsrs r2, r6, #16 │ │ - b.n 9f534 │ │ + b.n 9f540 │ │ lsls r3, r3, #7 │ │ lsrs r0, r0, #8 │ │ asrs r4, r1, #1 │ │ - b.n 9ee3a │ │ + b.n 9ee46 │ │ asrs r6, r0, #32 │ │ - b.n 9f420 │ │ + b.n 9f42c │ │ adds r0, #208 @ 0xd0 │ │ - b.n 9f6c4 │ │ + b.n 9f6d0 │ │ movs r1, r0 │ │ - b.n 9fa0c │ │ + b.n 9fa18 │ │ lsls r6, r2, #7 │ │ ldmia r2!, {} │ │ asrs r0, r0, #1 │ │ - b.n 9ee4e │ │ + b.n 9ee5a │ │ asrs r0, r2, #2 │ │ - b.n 9ee54 │ │ + b.n 9ee60 │ │ asrs r6, r0, #4 │ │ - b.n 9f258 │ │ - bl 4fae36 │ │ + b.n 9f264 │ │ + bl 4fae42 │ │ movs r0, #80 @ 0x50 │ │ - b.n 9ee5e │ │ + b.n 9ee6a │ │ movs r1, #6 │ │ - b.n 9f266 │ │ + b.n 9f272 │ │ movs r2, r0 │ │ - b.n 9f5e8 │ │ + b.n 9f5f4 │ │ lsls r6, r1, #7 │ │ subs r0, r0, r0 │ │ lsls r3, r6, #1 │ │ - b.n 9f12c │ │ + b.n 9f138 │ │ movs r0, r2 │ │ - b.n 9f972 │ │ + b.n 9f97e │ │ lsls r4, r5, #7 │ │ subs r0, r0, r0 │ │ movs r4, r2 │ │ - b.n 9ee94 │ │ + b.n 9eea0 │ │ movs r0, #76 @ 0x4c │ │ - b.n 9ee7e │ │ + b.n 9ee8a │ │ asrs r6, r0, #32 │ │ - b.n 9f306 │ │ + b.n 9f312 │ │ lsls r0, r0, #3 │ │ - b.n 9fa08 │ │ + b.n 9fa14 │ │ movs r1, r3 │ │ subs r0, r0, r0 │ │ asrs r0, r0, #2 │ │ - b.n 9faae │ │ + b.n 9faba │ │ asrs r6, r0, #32 │ │ - b.n 9f2f6 │ │ + b.n 9f302 │ │ asrs r0, r1, #32 │ │ - b.n 9ee96 │ │ + b.n 9eea2 │ │ movs r6, r0 │ │ - b.n 9f61c │ │ + b.n 9f628 │ │ lsls r5, r3, #7 │ │ ldr r2, [sp, #0] │ │ asrs r0, r1, #1 │ │ - b.n 9eea2 │ │ + b.n 9eeae │ │ movs r1, #4 │ │ - b.n 9f2a8 │ │ + b.n 9f2b4 │ │ asrs r1, r0, #32 │ │ - b.n 9faca │ │ + b.n 9fad6 │ │ lsrs r2, r6, #16 │ │ - b.n 9f5b0 │ │ + b.n 9f5bc │ │ lsls r0, r3, #7 │ │ lsrs r0, r0, #8 │ │ asrs r4, r1, #1 │ │ - b.n 9eeb6 │ │ + b.n 9eec2 │ │ asrs r6, r0, #32 │ │ - b.n 9f49c │ │ + b.n 9f4a8 │ │ adds r0, #208 @ 0xd0 │ │ - b.n 9f740 │ │ + b.n 9f74c │ │ movs r1, r0 │ │ - b.n 9fa88 │ │ + b.n 9fa94 │ │ lsls r3, r2, #7 │ │ ldmia r2!, {} │ │ asrs r0, r0, #1 │ │ - b.n 9eeca │ │ + b.n 9eed6 │ │ asrs r0, r2, #2 │ │ - b.n 9eed0 │ │ + b.n 9eedc │ │ asrs r6, r0, #4 │ │ - b.n 9f2d4 │ │ - bl 4faeb2 │ │ + b.n 9f2e0 │ │ + bl 4faebe │ │ movs r0, #80 @ 0x50 │ │ - b.n 9eeda │ │ + b.n 9eee6 │ │ movs r1, #6 │ │ - b.n 9f2e2 │ │ + b.n 9f2ee │ │ movs r2, r0 │ │ - b.n 9f664 │ │ + b.n 9f670 │ │ lsls r3, r1, #7 │ │ subs r0, r0, r0 │ │ lsls r3, r6, #1 │ │ - b.n 9f1a8 │ │ + b.n 9f1b4 │ │ movs r0, r2 │ │ - b.n 9f9ee │ │ + b.n 9f9fa │ │ lsls r5, r1, #7 │ │ subs r0, r0, r0 │ │ strb r4, [r0, #31] │ │ - b.n 9f9e6 │ │ + b.n 9f9f2 │ │ ldrb r7, [r7, #31] │ │ - b.n 9fa78 │ │ + b.n 9fa84 │ │ movs r7, r0 │ │ - b.n 9f71e │ │ - beq.n 9f418 │ │ - b.n 9f878 │ │ + b.n 9f72a │ │ + beq.n 9f424 │ │ + b.n 9f884 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r6, r7, r8, r9, sl, ip, sp, lr} │ │ - b.n 9f9fa │ │ + b.n 9fa06 │ │ ldrb r7, [r7, #31] │ │ - b.n 9fa8c │ │ + b.n 9fa98 │ │ lsls r0, r5, #4 │ │ and.w r0, r0, ip, lsr #32 │ │ - b.n 9ef30 │ │ + b.n 9ef3c │ │ movs r0, r0 │ │ - b.n 9f44c │ │ + b.n 9f458 │ │ lsls r6, r7, #1 │ │ - b.n 9fa1e │ │ + b.n 9fa2a │ │ lsls r7, r2, #7 │ │ subs r0, r0, r0 │ │ movs r0, r1 │ │ - b.n 9ef3c │ │ + b.n 9ef48 │ │ movs r0, r0 │ │ - b.n 9faaa │ │ + b.n 9fab6 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ lsls r0, r1, #2 │ │ - b.n 9ef42 │ │ + b.n 9ef4e │ │ asrs r0, r1, #32 │ │ - b.n 9ef4c │ │ + b.n 9ef58 │ │ lsls r6, r0, #10 │ │ - b.n 9f33a │ │ + b.n 9f346 │ │ movs r1, r0 │ │ - b.n 9f6be │ │ + b.n 9f6ca │ │ lsls r7, r1, #7 │ │ subs r0, r0, r0 │ │ movs r4, r1 │ │ - b.n 9ef5c │ │ + b.n 9ef68 │ │ movs r0, r0 │ │ - b.n 9faca │ │ + b.n 9fad6 │ │ @ instruction: 0xffae0aff │ │ lsls r0, r1, #2 │ │ - b.n 9ef62 │ │ + b.n 9ef6e │ │ asrs r4, r1, #32 │ │ - b.n 9ef6c │ │ + b.n 9ef78 │ │ lsls r6, r0, #10 │ │ - b.n 9f53a │ │ + b.n 9f546 │ │ movs r4, r1 │ │ - b.n 9ef5e │ │ + b.n 9ef6a │ │ movs r1, r0 │ │ - b.n 9f6e2 │ │ + b.n 9f6ee │ │ lsls r6, r0, #7 │ │ subs r0, r0, r0 │ │ @ instruction: 0xffa7eaff │ │ adds r0, #8 │ │ - b.n 9ef84 │ │ + b.n 9ef90 │ │ asrs r1, r0, #32 │ │ - b.n 9fb92 │ │ + b.n 9fb9e │ │ movs r4, r1 │ │ - b.n 9ef8c │ │ + b.n 9ef98 │ │ ands r1, r0 │ │ - b.n 9fb9a │ │ + b.n 9fba6 │ │ movs r3, r0 │ │ and.w r0, r0, r8, lsl #12 │ │ - b.n 9ef98 │ │ + b.n 9efa4 │ │ asrs r0, r0, #32 │ │ - b.n 9fba6 │ │ + b.n 9fbb2 │ │ movs r4, r1 │ │ - b.n 9efa0 │ │ + b.n 9efac │ │ ands r0, r0 │ │ - b.n 9fbae │ │ + b.n 9fbba │ │ movs r0, r0 │ │ - b.n 9ef8c │ │ + b.n 9ef98 │ │ movs r2, r1 │ │ - b.n 9f7b6 │ │ - cbz r2, 9f498 │ │ + b.n 9f7c2 │ │ + cbz r3, 9f4a4 │ │ add.w r0, r0, r0 │ │ - b.n 9fb1e │ │ + b.n 9fb2a │ │ lsls r2, r3, #7 │ │ subs r0, r0, r0 │ │ ands r0, r0 │ │ - b.n 9ef92 │ │ + b.n 9ef9e │ │ strb r0, [r0, #0] │ │ - b.n 9fbca │ │ + b.n 9fbd6 │ │ movs r7, r0 │ │ - b.n 9f7ce │ │ - beq.n 9f4c8 │ │ - b.n 9f928 │ │ + b.n 9f7da │ │ + beq.n 9f4d4 │ │ + b.n 9f934 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r1, ip, sp, lr} │ │ - b.n 9f7da │ │ + b.n 9f7e6 │ │ movs r7, r0 │ │ - b.n 9f7de │ │ - beq.n 9f4d8 │ │ - b.n 9f938 │ │ + b.n 9f7ea │ │ + beq.n 9f4e4 │ │ + b.n 9f944 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, ip, sp, lr} │ │ - b.n 9fbea │ │ + b.n 9fbf6 │ │ movs r7, r0 │ │ - b.n 9f7ee │ │ - beq.n 9f4e8 │ │ - b.n 9f948 │ │ + b.n 9f7fa │ │ + beq.n 9f4f4 │ │ + b.n 9f954 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, r3} │ │ - b.n 9f7fa │ │ + b.n 9f806 │ │ asrs r3, r6, #32 │ │ - b.n 9fbfe │ │ + b.n 9fc0a │ │ ands r2, r0 │ │ - b.n 9f802 │ │ - ldr r3, [pc, #668] @ (9f760 ) │ │ + b.n 9f80e │ │ + ldr r3, [pc, #672] @ (9f770 ) │ │ add.w r0, r0, r4, lsl #8 │ │ - b.n 9f80a │ │ + b.n 9f816 │ │ movs r0, r0 │ │ - b.n 9fb6e │ │ + b.n 9fb7a │ │ mcr2 10, 4, r0, cr9, cr15, {7} @ │ │ lsls r5, r0, #7 │ │ and.w r0, r0, sp, lsl #28 │ │ - b.n 9fc1a │ │ + b.n 9fc26 │ │ movs r7, r0 │ │ - b.n 9f81e │ │ - beq.n 9f518 │ │ - b.n 9f978 │ │ + b.n 9f82a │ │ + beq.n 9f524 │ │ + b.n 9f984 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, r4} │ │ - b.n 9f024 │ │ + b.n 9f030 │ │ lsls r1, r0, #28 │ │ - b.n 9fb0e │ │ + b.n 9fb1a │ │ lsls r2, r0, #7 │ │ lsrs r0, r0, #8 │ │ lsls r0, r0, #1 │ │ - b.n 9f020 │ │ + b.n 9f02c │ │ movs r0, r0 │ │ - b.n 9fb9a │ │ + b.n 9fba6 │ │ lsls r7, r7, #3 │ │ subs r0, r0, r0 │ │ lsls r4, r2, #1 │ │ - b.n 9f036 │ │ + b.n 9f042 │ │ movs r4, r0 │ │ - b.n 9f026 │ │ + b.n 9f032 │ │ movs r0, r0 │ │ - b.n 9fbaa │ │ + b.n 9fbb6 │ │ lsls r7, r7, #6 │ │ subs r0, r0, r0 │ │ lsls r4, r1, #2 │ │ - b.n 9f03a │ │ + b.n 9f046 │ │ asrs r7, r7, #1 │ │ - b.n 9fc56 │ │ + b.n 9fc62 │ │ str r1, [r0, r0] │ │ - b.n 9fc5a │ │ + b.n 9fc66 │ │ asrs r1, r0, #32 │ │ - b.n 9f09e │ │ + b.n 9f0aa │ │ lsls r0, r2, #2 │ │ - b.n 9f04a │ │ + b.n 9f056 │ │ asrs r4, r0, #32 │ │ - b.n 9f046 │ │ - bl 4fb026 │ │ + b.n 9f052 │ │ + bl 4fb032 │ │ asrs r1, r0, #32 │ │ - b.n 9fa30 │ │ + b.n 9fa3c │ │ movs r1, r0 │ │ - b.n 9fbd4 │ │ + b.n 9fbe0 │ │ asrs r5, r0, #32 │ │ str r1, [sp, #640] @ 0x280 │ │ asrs r4, r0, #32 │ │ - b.n 9f03a │ │ + b.n 9f046 │ │ asrs r0, r0, #32 │ │ - b.n 9fc7e │ │ + b.n 9fc8a │ │ lsls r0, r2, #2 │ │ - b.n 9f06a │ │ + b.n 9f076 │ │ strh r4, [r0, #0] │ │ - b.n 9f066 │ │ - bl 4fb046 │ │ + b.n 9f072 │ │ + bl 4fb052 │ │ movs r0, #68 @ 0x44 │ │ - b.n 9f082 │ │ + b.n 9f08e │ │ lsls r0, r1, #28 │ │ - b.n 9f090 │ │ + b.n 9f09c │ │ adds r3, #176 @ 0xb0 │ │ - b.n 9f93a │ │ + b.n 9f946 │ │ movs r0, r0 │ │ - b.n 9f678 │ │ + b.n 9f684 │ │ strb r0, [r0, #28] │ │ - b.n 9f09c │ │ + b.n 9f0a8 │ │ stmia r7!, {} │ │ - b.n 9f0a0 │ │ + b.n 9f0ac │ │ str r2, [r1, #0] │ │ - b.n 9f96c │ │ + b.n 9f978 │ │ asrs r4, r0, #32 │ │ - b.n 9f06e │ │ + b.n 9f07a │ │ strb r7, [r0, #0] │ │ - b.n 9f68c │ │ + b.n 9f698 │ │ movs r0, r1 │ │ - b.n 9fc1e │ │ + b.n 9fc2a │ │ stmia r0!, {r2, r3} │ │ - b.n 9f694 │ │ + b.n 9f6a0 │ │ asrs r0, r1, #2 │ │ - b.n 9f0a2 │ │ + b.n 9f0ae │ │ strb r0, [r0, #0] │ │ movs r1, #160 @ 0xa0 │ │ movs r2, r0 │ │ - b.n 9fba8 │ │ + b.n 9fbb4 │ │ lsls r0, r4, #27 │ │ - b.n 9f0c4 │ │ + b.n 9f0d0 │ │ strb r4, [r1, #0] │ │ asrs r0, r4, #6 │ │ str r0, [r6, #8] │ │ - b.n 9f912 │ │ + b.n 9f91e │ │ strb r0, [r4, #0] │ │ - b.n 9f0d4 │ │ + b.n 9f0e0 │ │ movs r0, r0 │ │ - b.n 9f6b4 │ │ + b.n 9f6c0 │ │ movs r4, r1 │ │ - b.n 9f09c │ │ + b.n 9f0a8 │ │ movs r4, r0 │ │ - b.n 9f8de │ │ - ldrsb r6, [r4, r0] │ │ + b.n 9f8ea │ │ + ldrsb r7, [r4, r0] │ │ add.w r0, r0, r0 │ │ - b.n 9fc46 │ │ + b.n 9fc52 │ │ lsls r4, r3, #6 │ │ subs r0, r0, r0 │ │ lsls r4, r1, #2 │ │ - b.n 9f0d6 │ │ + b.n 9f0e2 │ │ asrs r0, r0, #2 │ │ - b.n 9fcbe │ │ + b.n 9fcca │ │ asrs r1, r0, #32 │ │ - b.n 9f136 │ │ + b.n 9f142 │ │ asrs r1, r0, #32 │ │ - b.n 9faca │ │ + b.n 9fad6 │ │ lsls r0, r2, #2 │ │ - b.n 9f0e6 │ │ + b.n 9f0f2 │ │ movs r1, r0 │ │ - b.n 9fc64 │ │ + b.n 9fc70 │ │ str r1, [r0, r0] │ │ strh r0, [r4, #12] │ │ - bl 4fb0c6 │ │ + bl 4fb0d2 │ │ str r4, [r0, r0] │ │ - b.n 9f0ce │ │ + b.n 9f0da │ │ lsls r4, r3, #19 │ │ - b.n 9f966 │ │ + b.n 9f972 │ │ str r4, [r0, r0] │ │ - b.n 9f0d8 │ │ + b.n 9f0e4 │ │ asrs r1, r0, #32 │ │ - b.n 9f17a │ │ + b.n 9f186 │ │ asrs r1, r0, #32 │ │ - b.n 9fce0 │ │ + b.n 9fcec │ │ asrs r1, r0, #32 │ │ - b.n 9f162 │ │ + b.n 9f16e │ │ movs r4, r0 │ │ - b.n 9f11a │ │ + b.n 9f126 │ │ movs r4, r0 │ │ - b.n 9fcea │ │ + b.n 9fcf6 │ │ movs r4, r0 │ │ - b.n 9f102 │ │ + b.n 9f10e │ │ lsls r4, r2, #4 │ │ - b.n 9f11a │ │ + b.n 9f126 │ │ movs r3, r0 │ │ - b.n 9fc96 │ │ + b.n 9fca2 │ │ mcr2 10, 6, r2, cr1, cr15, {7} @ │ │ str r0, [r0, r0] │ │ - b.n 9f93e │ │ + b.n 9f94a │ │ lsls r4, r4, #1 │ │ - b.n 9f12a │ │ + b.n 9f136 │ │ movs r0, r0 │ │ - b.n 9f8b0 │ │ + b.n 9f8bc │ │ lsls r0, r6, #2 │ │ cmp r2, #0 │ │ lsls r4, r1, #2 │ │ - b.n 9f136 │ │ + b.n 9f142 │ │ asrs r7, r7, #1 │ │ - b.n 9fd52 │ │ + b.n 9fd5e │ │ lsls r0, r2, #1 │ │ movt r0, #261 @ 0x105 │ │ - b.n 9f59a │ │ + b.n 9f5a6 │ │ lsls r0, r2, #2 │ │ - b.n 9f146 │ │ + b.n 9f152 │ │ asrs r5, r0, #4 │ │ - b.n 9f542 │ │ - bl 4fb122 │ │ + b.n 9f54e │ │ + bl 4fb12e │ │ asrs r1, r0, #32 │ │ - b.n 9fb2c │ │ + b.n 9fb38 │ │ movs r1, r0 │ │ - b.n 9fcd0 │ │ + b.n 9fcdc │ │ asrs r1, r0, #32 │ │ str r3, [sp, #640] @ 0x280 │ │ asrs r5, r0, #4 │ │ - b.n 9f536 │ │ + b.n 9f542 │ │ lsls r0, r1, #2 │ │ - b.n 9f162 │ │ + b.n 9f16e │ │ lsls r5, r0, #10 │ │ - b.n 9f73e │ │ + b.n 9f74a │ │ lsrs r5, r1, #10 │ │ orr.w sl, r0, #4685824 @ 0x478000 │ │ orr.w r1, r0, #9699328 @ 0x940000 │ │ - b.n 9f172 │ │ + b.n 9f17e │ │ movs r5, r0 │ │ - b.n 9f8ee │ │ + b.n 9f8fa │ │ movs r1, r0 │ │ lsls r5, r0, #10 │ │ lsls r4, r2, #4 │ │ lsls r4, r0, #22 │ │ movs r0, r1 │ │ - b.n 9f18e │ │ + b.n 9f19a │ │ movs r5, r0 │ │ - b.n 9f8fe │ │ + b.n 9f90a │ │ movs r2, r3 │ │ ldr r2, [sp, #0] │ │ lsls r0, r1, #1 │ │ - b.n 9f19a │ │ + b.n 9f1a6 │ │ asrs r5, r4, #10 │ │ - b.n 9f9aa │ │ + b.n 9f9b6 │ │ movs r0, #1 │ │ - b.n 9fdae │ │ + b.n 9fdba │ │ lsls r1, r0, #4 │ │ - b.n 9f592 │ │ + b.n 9f59e │ │ asrs r7, r3, #32 │ │ - b.n 9fa80 │ │ + b.n 9fa8c │ │ lsls r0, r6, #4 │ │ - b.n 9f89e │ │ + b.n 9f8aa │ │ movs r3, r2 │ │ lsrs r0, r0, #8 │ │ lsls r4, r1, #1 │ │ - b.n 9f1b6 │ │ + b.n 9f1c2 │ │ movs r5, r0 │ │ - b.n 9f786 │ │ + b.n 9f792 │ │ lsls r0, r2, #3 │ │ - b.n 9fa2a │ │ + b.n 9fa36 │ │ movs r1, r0 │ │ - b.n 9fd6e │ │ + b.n 9fd7a │ │ movs r6, r1 │ │ ldmia r2!, {} │ │ asrs r0, r0, #1 │ │ - b.n 9f1ca │ │ + b.n 9f1d6 │ │ asrs r0, r2, #2 │ │ - b.n 9f1bc │ │ + b.n 9f1c8 │ │ asrs r5, r0, #4 │ │ - b.n 9f5c0 │ │ - bl 4fb19e │ │ + b.n 9f5cc │ │ + bl 4fb1aa │ │ movs r0, #80 @ 0x50 │ │ - b.n 9f1da │ │ + b.n 9f1e6 │ │ movs r1, #5 │ │ - b.n 9f5ce │ │ + b.n 9f5da │ │ movs r2, r0 │ │ - b.n 9f950 │ │ + b.n 9f95c │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ lsls r0, r6, #1 │ │ - b.n 9f494 │ │ + b.n 9f4a0 │ │ movs r0, r2 │ │ - b.n 9fcda │ │ + b.n 9fce6 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ lsls r4, r0, #31 │ │ - b.n 9fcd2 │ │ + b.n 9fcde │ │ lsrs r7, r7, #31 │ │ - b.n 9fd64 │ │ + b.n 9fd70 │ │ strb r1, [r0, #0] │ │ - b.n 9fbca │ │ + b.n 9fbd6 │ │ lsls r1, r6, #1 │ │ and.w r0, r0, sl │ │ - b.n 9fa12 │ │ + b.n 9fa1e │ │ asrs r5, r0, #32 │ │ - b.n 9fa16 │ │ - strh r4, [r2, #26] │ │ + b.n 9fa22 │ │ + strh r5, [r2, #26] │ │ add.w r7, r0, r4, lsl #7 │ │ - b.n 9fcee │ │ + b.n 9fcfa │ │ subs r7, r7, #7 │ │ - b.n 9fd80 │ │ + b.n 9fd8c │ │ movs r1, r0 │ │ - b.n 9f986 │ │ + b.n 9f992 │ │ @ instruction: 0xfff41aff │ │ movs r0, r5 │ │ - b.n 9fc08 │ │ + b.n 9fc14 │ │ asrs r2, r1, #32 │ │ - b.n 9fa32 │ │ + b.n 9fa3e │ │ movs r0, #1 │ │ - b.n 9fe36 │ │ - bf 10, 93ef6 │ │ + b.n 9fe42 │ │ + bf 10, 93f02 │ │ movs r0, r0 │ │ - b.n 9fd9e │ │ + b.n 9fdaa │ │ lsls r4, r7, #1 │ │ subs r0, r0, r0 │ │ movs r7, r1 │ │ - b.n 9fe46 │ │ + b.n 9fe52 │ │ str r0, [r5, #0] │ │ - b.n 9fc24 │ │ + b.n 9fc30 │ │ movs r0, r0 │ │ - b.n 9f228 │ │ + b.n 9f234 │ │ movs r0, r4 │ │ - b.n 9fc2c │ │ + b.n 9fc38 │ │ movs r0, #40 @ 0x28 │ │ - b.n 9fbac │ │ + b.n 9fbb8 │ │ adds r0, #48 @ 0x30 │ │ - b.n 9fbb0 │ │ + b.n 9fbbc │ │ asrs r6, r0, #32 │ │ - b.n 9fa5e │ │ + b.n 9fa6a │ │ lsls r4, r0, #13 │ │ add.w r0, r0, r0, asr #28 │ │ - b.n 9f260 │ │ + b.n 9f26c │ │ movs r0, r0 │ │ - b.n 9fdd8 │ │ + b.n 9fde4 │ │ lsls r7, r6, #1 │ │ subs r0, r0, r0 │ │ lsls r5, r3, #11 │ │ - b.n 9faec │ │ + b.n 9faf8 │ │ asrs r0, r0, #2 │ │ - b.n 9f842 │ │ + b.n 9f84e │ │ lsls r0, r0, #4 │ │ - b.n 9f846 │ │ + b.n 9f852 │ │ asrs r4, r7, #30 │ │ - b.n 9fae0 │ │ + b.n 9faec │ │ movs r4, r3 │ │ - b.n 9f262 │ │ + b.n 9f26e │ │ asrs r1, r0, #2 │ │ - b.n 9f846 │ │ + b.n 9f852 │ │ asrs r4, r6, #6 │ │ - b.n 9faec │ │ + b.n 9faf8 │ │ movs r1, r0 │ │ - b.n 9f84e │ │ + b.n 9f85a │ │ movs r0, r3 │ │ - b.n 9f2f2 │ │ + b.n 9f2fe │ │ movs r6, r0 │ │ - b.n 9fb56 │ │ + b.n 9fb62 │ │ movs r2, r0 │ │ - b.n 9fdfa │ │ + b.n 9fe06 │ │ lsls r7, r4, #1 │ │ subs r0, r0, r0 │ │ movs r4, r5 │ │ - b.n 9f198 │ │ + b.n 9f1a4 │ │ movs r0, r6 │ │ - b.n 9fe06 │ │ + b.n 9fe12 │ │ lsls r1, r6, #1 │ │ subs r0, r0, r0 │ │ movs r0, r6 │ │ - b.n 9f1a4 │ │ + b.n 9f1b0 │ │ asrs r4, r0, #1 │ │ - b.n 9f2a6 │ │ + b.n 9f2b2 │ │ lsrs r5, r1, #8 │ │ orn sl, r0, #577536 @ 0x8d000 │ │ orn sl, r0, #36608 @ 0x8f00 │ │ orn r0, r0, #4358144 @ 0x428000 │ │ - b.n 9f88c │ │ + b.n 9f898 │ │ lsls r0, r0, #8 │ │ - b.n 9f888 │ │ + b.n 9f894 │ │ lsrs r5, r1, #8 │ │ orr.w sl, r0, #577536 @ 0x8d000 │ │ orr.w sl, r0, #36608 @ 0x8f00 │ │ - b.w ff0df7da │ │ - b.n 9f1cc │ │ + b.w ff0df7e6 │ │ + b.n 9f1d8 │ │ movs r0, r2 │ │ - b.n 9fe4c │ │ + b.n 9fe58 │ │ movs r1, r1 │ │ - b.n 9fade │ │ + b.n 9faea │ │ movs r0, r2 │ │ str r3, [sp, #640] @ 0x280 │ │ - b.n 9efc8 │ │ + b.n 9efde │ │ add.w r0, r0, r0 │ │ - b.n 9fe4a │ │ + b.n 9fe56 │ │ lsls r1, r5, #1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r5, #32 │ │ - b.n 9f1e8 │ │ + b.n 9f1f4 │ │ movs r0, #9 │ │ - b.n 9faf6 │ │ + b.n 9fb02 │ │ strh r0, [r0, #0] │ │ - b.n 9fafa │ │ - bvc.n 9f7be │ │ + b.n 9fb06 │ │ + bvs.n 9f756 │ │ @ instruction: 0xfb000094 │ │ - b.n 9ff02 │ │ + b.n 9ff0e │ │ movs r0, r0 │ │ - b.n 9fe74 │ │ + b.n 9fe80 │ │ strh r0, [r5, #0] │ │ - b.n 9f1e0 │ │ + b.n 9f1ec │ │ lsls r3, r4, #1 │ │ subs r0, r0, r0 │ │ asrs r0, r2, #2 │ │ - b.n 9f2fa │ │ + b.n 9f306 │ │ str r5, [r0, #8] │ │ - b.n 9f8e0 │ │ + b.n 9f8ec │ │ adds r0, #8 │ │ - b.n 9f310 │ │ + b.n 9f31c │ │ str r1, [sp, #20] │ │ - b.n 9f700 │ │ - bl 4fb2de │ │ + b.n 9f70c │ │ + bl 4fb2ea │ │ asrs r4, r1, #1 │ │ - b.n 9f31a │ │ + b.n 9f326 │ │ movs r0, #28 │ │ - b.n 9f324 │ │ + b.n 9f330 │ │ movs r5, r0 │ │ - b.n 9f770 │ │ + b.n 9f77c │ │ movs r0, r6 │ │ - b.n 9f228 │ │ + b.n 9f234 │ │ asrs r4, r0, #1 │ │ - b.n 9f32a │ │ + b.n 9f336 │ │ lsrs r5, r1, #8 │ │ orn r2, r0, #2195456 @ 0x218000 │ │ - b.n 9f900 │ │ + b.n 9f90c │ │ cmp r2, #13 │ │ orn sl, r0, #36608 @ 0x8f00 │ │ orn sl, r0, #9240576 @ 0x8d0000 │ │ orr.w sl, r1, #577536 @ 0x8d000 │ │ orr.w sl, r1, #36608 @ 0x8f00 │ │ orr.w r0, r1, #12845056 @ 0xc40000 │ │ - b.n 9f34a │ │ + b.n 9f356 │ │ asrs r4, r1, #2 │ │ - b.n 9f342 │ │ + b.n 9f34e │ │ lsls r6, r0, #8 │ │ - b.n 9f7be │ │ + b.n 9f7ca │ │ movs r5, r0 │ │ - b.n 9f7a4 │ │ + b.n 9f7b0 │ │ asrs r5, r0, #32 │ │ - b.n 9fb66 │ │ + b.n 9fb72 │ │ movs r4, r1 │ │ - b.n 9f360 │ │ + b.n 9f36c │ │ movs r0, r0 │ │ - b.n 9f348 │ │ + b.n 9f354 │ │ movs r2, r1 │ │ - b.n 9fb72 │ │ - sub sp, #76 @ 0x4c │ │ + b.n 9fb7e │ │ + sub sp, #80 @ 0x50 │ │ add.w r0, r0, r0 │ │ - b.n 9feda │ │ + b.n 9fee6 │ │ lsls r1, r6, #1 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #2 │ │ - b.n 9f36a │ │ + b.n 9f376 │ │ adds r0, #36 @ 0x24 │ │ - b.n 9f27c │ │ + b.n 9f288 │ │ lsls r5, r0, #10 │ │ - b.n 9f94a │ │ + b.n 9f956 │ │ movs r0, #40 @ 0x28 │ │ - b.n 9f284 │ │ + b.n 9f290 │ │ movs r1, #248 @ 0xf8 │ │ - b.n 9fbd2 │ │ + b.n 9fbde │ │ lsls r4, r0, #1 │ │ - b.n 9f38a │ │ + b.n 9f396 │ │ asrs r4, r1, #2 │ │ - b.n 9f382 │ │ + b.n 9f38e │ │ lsls r6, r0, #8 │ │ - b.n 9f7fe │ │ + b.n 9f80a │ │ str r5, [r0, #0] │ │ - b.n 9fba2 │ │ + b.n 9fbae │ │ lsls r0, r0, #2 │ │ - b.n 9ff66 │ │ + b.n 9ff72 │ │ movs r5, r0 │ │ - b.n 9f7ec │ │ + b.n 9f7f8 │ │ asrs r1, r0, #32 │ │ - b.n 9fd80 │ │ + b.n 9fd8c │ │ lsls r0, r2, #2 │ │ - b.n 9f39a │ │ + b.n 9f3a6 │ │ movs r1, r0 │ │ - b.n 9ff18 │ │ + b.n 9ff24 │ │ asrs r1, r0, #32 │ │ str r3, [sp, #640] @ 0x280 │ │ - bl 4fb37a │ │ + bl 4fb386 │ │ asrs r5, r0, #4 │ │ - b.n 9f782 │ │ + b.n 9f78e │ │ lsls r0, r2, #1 │ │ - b.n 9f3ba │ │ + b.n 9f3c6 │ │ asrs r5, r0, #4 │ │ - b.n 9f78a │ │ + b.n 9f796 │ │ movs r0, r2 │ │ - b.n 9f3c8 │ │ + b.n 9f3d4 │ │ strb r0, [r0, #0] │ │ - b.n 9ffd2 │ │ + b.n 9ffde │ │ str r0, [r0, #0] │ │ - b.n 9f396 │ │ + b.n 9f3a2 │ │ lsls r0, r0, #1 │ │ - b.n 9f3ce │ │ + b.n 9f3da │ │ lsrs r1, r2, #24 │ │ - b.n 9fd9e │ │ - b.n 9f1be │ │ + b.n 9fdaa │ │ + b.n 9f1cc │ │ add.w r0, r0, r0 │ │ - b.n 9ff46 │ │ + b.n 9ff52 │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ movs r7, r0 │ │ - b.n 9fbee │ │ - beq.n 9f8e8 │ │ - b.n 9fd48 │ │ + b.n 9fbfa │ │ + beq.n 9f8f4 │ │ + b.n 9fd54 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r6, r7, r8, r9} │ │ - b.n 9f3f8 │ │ + b.n 9f404 │ │ movs r2, #89 @ 0x59 │ │ - b.n 9febe │ │ + b.n 9feca │ │ asrs r0, r0, #15 │ │ - b.n 9f400 │ │ + b.n 9f40c │ │ movs r0, r0 │ │ - b.n 9f9e4 │ │ + b.n 9f9f0 │ │ asrs r1, r0, #32 │ │ - b.n 9f9e8 │ │ + b.n 9f9f4 │ │ vstr d30, [sl, #-1020] @ 0xfffffc04 │ │ lsls r4, r0, #31 │ │ - b.n 9fee2 │ │ + b.n 9feee │ │ lsrs r7, r7, #31 │ │ - b.n 9ff74 │ │ + b.n 9ff80 │ │ strb r3, [r1, #0] │ │ - b.n 9fd5a │ │ + b.n 9fd66 │ │ @ instruction: 0xffedeaff │ │ lsls r4, r0, #31 │ │ - b.n 9fef2 │ │ + b.n 9fefe │ │ lsrs r7, r7, #31 │ │ - b.n 9ff84 │ │ + b.n 9ff90 │ │ strb r3, [r1, #0] │ │ - b.n 9fd6a │ │ + b.n 9fd76 │ │ movs r7, r0 │ │ - b.n 9fc2e │ │ - beq.n 9f928 │ │ - b.n 9fd88 │ │ + b.n 9fc3a │ │ + beq.n 9f934 │ │ + b.n 9fd94 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {ip, sp, lr} │ │ - b.n 9fc3a │ │ + b.n 9fc46 │ │ @ instruction: 0xffe5eaff │ │ lsls r4, r0, #31 │ │ - b.n 9ff12 │ │ + b.n 9ff1e │ │ lsrs r7, r7, #31 │ │ - b.n 9ffa4 │ │ + b.n 9ffb0 │ │ strb r4, [r0, #0] │ │ - b.n 9fd8a │ │ + b.n 9fd96 │ │ @ instruction: 0xffe1eaff │ │ movs r4, r3 │ │ - b.n 9f44c │ │ + b.n 9f458 │ │ lsls r1, r0, #28 │ │ - b.n 9ff36 │ │ + b.n 9ff42 │ │ @ instruction: 0xffde0aff │ │ lsls r4, r0, #31 │ │ - b.n 9ff2e │ │ + b.n 9ff3a │ │ lsrs r7, r7, #31 │ │ - b.n 9ffc0 │ │ + b.n 9ffcc │ │ movs r2, r2 │ │ - b.n 9fda6 │ │ + b.n 9fdb2 │ │ movs r0, r0 │ │ - b.n 9fbd8 │ │ + b.n 9fbe4 │ │ @ instruction: 0xff980aff │ │ @ instruction: 0xffd8eaff │ │ asrs r4, r6, #12 │ │ - b.n 9f474 │ │ + b.n 9f480 │ │ asrs r1, r0, #32 │ │ - b.n 9fa58 │ │ + b.n 9fa64 │ │ asrs r2, r3, #1 │ │ - b.n 9f4e0 │ │ + b.n 9f4ec │ │ movs r0, r0 │ │ - b.n 9ffe4 │ │ + b.n 9fff0 │ │ lsls r1, r3, #1 │ │ subs r0, r0, r0 │ │ lsls r4, r0, #31 │ │ - b.n 9ff5a │ │ + b.n 9ff66 │ │ lsrs r7, r7, #31 │ │ - b.n 9ffec │ │ + b.n 9fff8 │ │ strb r0, [r2, #0] │ │ - b.n 9fdd2 │ │ + b.n 9fdde │ │ @ instruction: 0xffcfeaff │ │ strb r4, [r1, #0] │ │ - b.n a009a │ │ + b.n a00a6 │ │ @ instruction: 0xffcdeaff │ │ asrs r5, r0, #2 │ │ - b.n 9fa6c │ │ + b.n 9fa78 │ │ lsls r4, r0, #1 │ │ - b.n 9f49a │ │ + b.n 9f4a6 │ │ lsls r0, r2, #1 │ │ movt r2, #1793 @ 0x701 │ │ - b.n 9fa6e │ │ - b.n 9fd72 │ │ - b.n 9fcb2 │ │ + b.n 9fa7a │ │ + b.n 9fd7e │ │ + b.n 9fcbe │ │ movs r6, r0 │ │ - b.n 9fcb6 │ │ + b.n 9fcc2 │ │ movs r0, #7 │ │ - b.n 9fcba │ │ + b.n 9fcc6 │ │ lsrs r5, r1, #10 │ │ orr.w sl, r2, #4620288 @ 0x468000 │ │ orr.w sl, r2, #4685824 @ 0x478000 │ │ orr.w r0, r2, #638976 @ 0x9c000 │ │ - b.n 9f4c4 │ │ + b.n 9f4d0 │ │ adds r0, #68 @ 0x44 │ │ - b.n 9f4c2 │ │ + b.n 9f4ce │ │ stmia r0!, {r1, r2, r3, r4, r5, r6} │ │ - b.n 9fd96 │ │ + b.n 9fda2 │ │ movs r0, #84 @ 0x54 │ │ - b.n 9f4ca │ │ + b.n 9f4d6 │ │ str r0, [r6, #0] │ │ - b.n 9f4ce │ │ + b.n 9f4da │ │ str r0, [sp, #208] @ 0xd0 │ │ - b.n 9f4d2 │ │ + b.n 9f4de │ │ asrs r4, r0, #32 │ │ - b.n 9f4c6 │ │ + b.n 9f4d2 │ │ stmia r0!, {r1, r2, r3, r4, r5, r7} │ │ - b.n 9fcec │ │ + b.n 9fcf8 │ │ str r0, [r5, #0] │ │ - b.n 9f4b0 │ │ + b.n 9f4bc │ │ str r0, [sp, #176] @ 0xb0 │ │ - b.n 9f4b4 │ │ + b.n 9f4c0 │ │ asrs r4, r2, #3 │ │ - b.n 9f4cc │ │ + b.n 9f4d8 │ │ asrs r0, r0, #32 │ │ - b.n a0176 │ │ + b.n a0182 │ │ movs r4, r0 │ │ - b.n 9f4be │ │ + b.n 9f4ca │ │ movs r0, #48 @ 0x30 │ │ - b.n 9fe54 │ │ + b.n 9fe60 │ │ asrs r0, r1, #32 │ │ - b.n 9f4c8 │ │ + b.n 9f4d4 │ │ asrs r0, r6, #32 │ │ - b.n a0106 │ │ + b.n a0112 │ │ asrs r4, r5, #32 │ │ - b.n 9f3e0 │ │ + b.n 9f3ec │ │ asrs r0, r5, #32 │ │ - b.n 9fe64 │ │ + b.n 9fe70 │ │ adds r0, #18 │ │ - b.n a0112 │ │ + b.n a011e │ │ strb r0, [r6, #0] │ │ - b.n 9f3ec │ │ + b.n 9f3f8 │ │ vld4.32 @ instruction: 0xf9efebff │ │ strb r0, [r0, #0] │ │ - b.n 9fd1e │ │ + b.n 9fd2a │ │ lsls r4, r2, #1 │ │ - b.n 9f516 │ │ + b.n 9f522 │ │ asrs r4, r2, #3 │ │ - b.n 9f520 │ │ + b.n 9f52c │ │ movs r0, r0 │ │ - b.n a0098 │ │ + b.n a00a4 │ │ asrs r4, r0, #32 │ │ - b.n 9f4ee │ │ + b.n 9f4fa │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n 9f52a │ │ + b.n 9f536 │ │ movs r4, r0 │ │ - b.n a00fa │ │ + b.n a0106 │ │ movs r4, r0 │ │ - b.n 9f512 │ │ + b.n 9f51e │ │ lsls r5, r3, #2 │ │ - b.n a0142 │ │ + b.n a014e │ │ vpmin.u q15, , │ │ strb r0, [r0, #0] │ │ - b.n 9fd4a │ │ + b.n 9fd56 │ │ lsls r4, r1, #1 │ │ - b.n 9f542 │ │ + b.n 9f54e │ │ asrs r5, r0, #32 │ │ - b.n 9f9b2 │ │ + b.n 9f9be │ │ asrs r0, r0, #3 │ │ - b.n 9fe18 │ │ + b.n 9fe24 │ │ asrs r5, r0, #32 │ │ - b.n 9f99a │ │ + b.n 9f9a6 │ │ asrs r0, r0, #32 │ │ - b.n a015e │ │ + b.n a016a │ │ lsls r4, r1, #2 │ │ - b.n 9f54a │ │ + b.n 9f556 │ │ asrs r5, r0, #32 │ │ - b.n 9f9a6 │ │ + b.n 9f9b2 │ │ movs r0, r1 │ │ - b.n 9fd6a │ │ - b.n a00f4 │ │ + b.n 9fd76 │ │ + b.n a0102 │ │ add.w r1, r0, r4, lsr #32 │ │ - b.n 9f55a │ │ + b.n 9f566 │ │ asrs r1, r0, #32 │ │ - b.n 9ff40 │ │ + b.n 9ff4c │ │ movs r0, r0 │ │ - b.n 9fcdc │ │ + b.n 9fce8 │ │ str r0, [r1, r0] │ │ lsls r2, r1, #22 │ │ str r4, [r2, r4] │ │ lsls r4, r0, #22 │ │ @ instruction: 0xff93eaff │ │ movs r2, r1 │ │ - b.n 9fd8a │ │ + b.n 9fd96 │ │ asrs r6, r0, #32 │ │ - b.n 9fd8e │ │ - strh r6, [r6, #18] │ │ + b.n 9fd9a │ │ + strh r7, [r6, #18] │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n 9fd96 │ │ + b.n 9fda2 │ │ lsls r4, r0, #31 │ │ - b.n a006a │ │ + b.n a0076 │ │ lsrs r7, r7, #31 │ │ - b.n a00fc │ │ + b.n a0108 │ │ movs r0, r0 │ │ - b.n 9fd10 │ │ + b.n 9fd1c │ │ ldc2l 10, cr0, [r1, #1020]! @ 0x3fc @ │ │ movs r3, r0 │ │ and.w r0, r0, sl │ │ - b.n 9fdae │ │ + b.n 9fdba │ │ asrs r6, r0, #32 │ │ - b.n 9fdb2 │ │ - strh r5, [r5, #18] │ │ + b.n 9fdbe │ │ + strh r6, [r5, #18] │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n 9fdba │ │ + b.n 9fdc6 │ │ movs r0, r0 │ │ - b.n a012c │ │ + b.n a0138 │ │ @ instruction: 0xff841aff │ │ mcr2 10, 0, lr, cr9, cr15, {7} @ │ │ asrs r6, r0, #32 │ │ - b.n 9fdca │ │ + b.n 9fdd6 │ │ strb r4, [r1, #0] │ │ - b.n 9fdce │ │ - strh r6, [r4, #18] │ │ + b.n 9fdda │ │ + strh r7, [r4, #18] │ │ @ instruction: 0xeb00c007 │ │ - b.n 9fdd6 │ │ + b.n 9fde2 │ │ strb r0, [r0, #0] │ │ - b.n 9fdda │ │ + b.n 9fde6 │ │ lsls r4, r0, #31 │ │ - b.n a00ae │ │ + b.n a00ba │ │ lsrs r7, r7, #31 │ │ - b.n a0140 │ │ + b.n a014c │ │ movs r0, r0 │ │ - b.n 9fd54 │ │ + b.n 9fd60 │ │ mcr2 10, 1, r0, cr10, cr15, {7} @ │ │ movs r4, r2 │ │ and.w r1, r0, ip, ror #6 │ │ - b.n 9f5f0 │ │ + b.n 9f5fc │ │ strb r4, [r0, #31] │ │ - b.n a00c6 │ │ + b.n a00d2 │ │ adds r1, #184 @ 0xb8 │ │ - b.n 9f5f8 │ │ + b.n 9f604 │ │ ldrb r7, [r7, #31] │ │ - b.n a015c │ │ + b.n a0168 │ │ movs r1, #180 @ 0xb4 │ │ - b.n 9f600 │ │ + b.n 9f60c │ │ asrs r1, r0, #32 │ │ - b.n 9fbe4 │ │ + b.n 9fbf0 │ │ str r0, [r6, #24] │ │ - b.n 9f608 │ │ + b.n 9f614 │ │ adds r0, #3 │ │ - b.n 9fbec │ │ + b.n 9fbf8 │ │ movs r0, #2 │ │ - b.n 9fbf0 │ │ + b.n 9fbfc │ │ strb r0, [r2, #0] │ │ - b.n 9ff64 │ │ + b.n 9ff70 │ │ lsls r4, r0, #2 │ │ stmia.w sp, {r0, r4, r5, r7, r8, sp} │ │ - b.n a00de │ │ + b.n a00ea │ │ str r6, [r0, #0] │ │ - b.n 9fc00 │ │ + b.n 9fc0c │ │ movs r4, r1 │ │ - b.n 9f600 │ │ + b.n 9f60c │ │ movs r1, r0 │ │ - b.n a022a │ │ + b.n a0236 │ │ str r0, [r1, #0] │ │ - b.n 9f608 │ │ + b.n 9f614 │ │ vstr d30, [sp, #1020] @ 0x3fc │ │ vpmin.u32 q15, , │ │ asrs r6, r0, #32 │ │ - b.n 9fe3a │ │ - strh r3, [r1, #18] │ │ + b.n 9fe46 │ │ + strh r4, [r1, #18] │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n 9fe42 │ │ + b.n 9fe4e │ │ movs r0, r0 │ │ - b.n a01b4 │ │ + b.n a01c0 │ │ vpmin.u32 , , │ │ lsls r0, r2, #2 │ │ - b.n 9f63e │ │ + b.n 9f64a │ │ lsls r6, r0, #4 │ │ - b.n 9fa32 │ │ - bl 4fb612 │ │ + b.n 9fa3e │ │ + bl 4fb61e │ │ movs r0, r0 │ │ - b.n 9fdce │ │ + b.n 9fdda │ │ movs r0, r2 │ │ subs r0, r0, r0 │ │ lsls r0, r2, #2 │ │ - b.n 9f652 │ │ + b.n 9f65e │ │ movs r4, r0 │ │ - b.n 9f646 │ │ - bl 4fb626 │ │ + b.n 9f652 │ │ + bl 4fb632 │ │ movs r0, r0 │ │ - b.n 9fdd8 │ │ + b.n 9fde4 │ │ lsls r4, r1, #2 │ │ lsls r0, r3, #22 │ │ movs r6, r0 │ │ lsls r0, r2, #31 │ │ movs r0, r0 │ │ lsls r1, r3, #5 │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #2 │ │ - b.n 9f672 │ │ + b.n 9f67e │ │ asrs r0, r5, #32 │ │ - b.n 9f680 │ │ + b.n 9f68c │ │ lsls r6, r0, #10 │ │ - b.n 9fc4a │ │ + b.n 9fc56 │ │ movs r0, #24 │ │ - b.n 9f6ae │ │ + b.n 9f6ba │ │ movs r2, r0 │ │ - b.n 9fdf4 │ │ + b.n 9fe00 │ │ asrs r4, r5, #32 │ │ lsls r5, r3, #22 │ │ movs r4, r0 │ │ lsls r0, r2, #22 │ │ movs r0, r0 │ │ lsls r1, r2, #5 │ │ movs r3, r2 │ │ lsrs r0, r0, #8 │ │ - add r0, pc, #80 @ (adr r0, 9fbb4 ) │ │ - b.n 9f6a0 │ │ + add r0, pc, #80 @ (adr r0, 9fbc0 ) │ │ + b.n 9f6ac │ │ str r0, [r3, r0] │ │ - b.n 9f6a4 │ │ + b.n 9f6b0 │ │ eors r0, r0 │ │ - b.n 9f6a2 │ │ - b.n a0266 │ │ + b.n 9f6ae │ │ + b.n a0274 │ │ add.w r8, r0, r1 │ │ - b.n a0216 │ │ + b.n a0222 │ │ ldc2l 10, cr11, [r3, #-1020] @ 0xfffffc04 @ │ │ asrs r4, r2, #3 │ │ - b.n 9f6bc │ │ + b.n 9f6c8 │ │ strb r6, [r4, #0] │ │ - b.n a02c2 │ │ + b.n a02ce │ │ adds r0, #208 @ 0xd0 │ │ - b.n 9f6c4 │ │ + b.n 9f6d0 │ │ movs r2, #241 @ 0xf1 │ │ - b.n a018a │ │ + b.n a0196 │ │ asrs r1, r0, #32 │ │ - b.n 9fcac │ │ + b.n 9fcb8 │ │ movs r4, r0 │ │ - b.n 9f6ac │ │ + b.n 9f6b8 │ │ adds r0, #3 │ │ - b.n 9fcb4 │ │ + b.n 9fcc0 │ │ movs r0, r1 │ │ - b.n 9f6b4 │ │ + b.n 9f6c0 │ │ movs r0, r0 │ │ - b.n a02de │ │ + b.n a02ea │ │ strb r0, [r0, #0] │ │ - b.n 9f6bc │ │ + b.n 9f6c8 │ │ @ instruction: 0xeda0ebff │ │ movs r7, r0 │ │ - b.n 9feea │ │ - beq.n 9fbe4 │ │ - b.n a0044 │ │ + b.n 9fef6 │ │ + beq.n 9fbf0 │ │ + b.n a0050 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3} │ │ - b.n 9f6ec │ │ + b.n 9f6f8 │ │ asrs r6, r0, #32 │ │ - b.n 9fefa │ │ + b.n 9ff06 │ │ movs r0, r0 │ │ - b.n 9f6d8 │ │ + b.n 9f6e4 │ │ movs r4, r2 │ │ - b.n 9f6fc │ │ + b.n 9f708 │ │ movs r0, #28 │ │ - b.n 9f700 │ │ + b.n 9f70c │ │ adds r0, #8 │ │ - b.n 9f700 │ │ - add r7, sp, #692 @ 0x2b4 │ │ + b.n 9f70c │ │ + add r7, sp, #696 @ 0x2b8 │ │ add.w r0, r0, r0 │ │ - b.n a0272 │ │ + b.n a027e │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n 9f714 │ │ + b.n 9f720 │ │ str r0, [r0, #0] │ │ - b.n 9f6de │ │ + b.n 9f6ea │ │ strb r0, [r0, #0] │ │ - b.n a0322 │ │ + b.n a032e │ │ movs r7, r0 │ │ - b.n 9ff26 │ │ - beq.n 9fc20 │ │ - b.n a0080 │ │ + b.n 9ff32 │ │ + beq.n 9fc2c │ │ + b.n a008c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {ip, sp, lr} │ │ - b.n 9ff32 │ │ + b.n 9ff3e │ │ movs r7, r0 │ │ - b.n 9ff36 │ │ - beq.n 9fc30 │ │ - b.n a0090 │ │ + b.n 9ff42 │ │ + beq.n 9fc3c │ │ + b.n a009c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r6, r7, r8, r9, sl} │ │ - b.n a0212 │ │ + b.n a021e │ │ lsrs r7, r7, #31 │ │ - b.n a02a4 │ │ + b.n a02b0 │ │ strb r2, [r2, #0] │ │ - b.n a008a │ │ + b.n a0096 │ │ vpmin.u32 q7, , │ │ lsrs r4, r5, #4 │ │ - b.n a0222 │ │ + b.n a022e │ │ lsrs r7, r7, #31 │ │ - b.n a02b4 │ │ + b.n a02c0 │ │ strb r0, [r1, #0] │ │ - b.n a011a │ │ + b.n a0126 │ │ vpmin.u16 q7, , │ │ strb r0, [r0, #0] │ │ - b.n 9ff62 │ │ + b.n 9ff6e │ │ lsls r4, r1, #1 │ │ - b.n 9f75a │ │ + b.n 9f766 │ │ asrs r0, r0, #2 │ │ - b.n a036a │ │ + b.n a0376 │ │ asrs r1, r0, #32 │ │ - b.n 9f7ae │ │ + b.n 9f7ba │ │ movs r4, r0 │ │ - b.n 9f766 │ │ + b.n 9f772 │ │ asrs r4, r0, #32 │ │ - b.n 9f75e │ │ + b.n 9f76a │ │ movs r2, r0 │ │ - b.n a033a │ │ + b.n a0346 │ │ movs r4, r0 │ │ - b.n 9f752 │ │ + b.n 9f75e │ │ lsls r2, r0, #4 │ │ - b.n a0344 │ │ + b.n a0350 │ │ movs r4, r0 │ │ - b.n 9f74e │ │ + b.n 9f75a │ │ vpmin.u16 q7, q9, │ │ - movt r0, #18435 @ 0x4803 │ │ - @ instruction: 0xb82f │ │ - vqrdmlah.s , q11, d10[0] │ │ - vtbl.8 d30, {d22-d23}, d7 │ │ - vqrdmulh.s q13, q3, d15[0] │ │ - vtrn.16 d18, d4 │ │ + @ instruction: 0xf6d80003 │ │ + @ instruction: 0xb79b │ │ + vqrdmulh.s , q11, d24[0] │ │ + @ instruction: 0xfff6eb55 │ │ + @ instruction: 0xfff6acbb │ │ + vtrn.16 d18, d8 │ │ movs r2, r0 │ │ - movs r1, #144 @ 0x90 │ │ + movs r1, #148 @ 0x94 │ │ movs r2, r0 │ │ - subs r4, r2, #6 │ │ + subs r0, r3, #6 │ │ movs r2, r0 │ │ - movs r1, #216 @ 0xd8 │ │ + movs r1, #220 @ 0xdc │ │ movs r2, r0 │ │ - vhadd.s16 d0, d4, d3 │ │ - str r6, [sp, #220] @ 0xdc │ │ - vqshlu.s64 , q8, #54 @ 0x36 │ │ - vrintm.f16 d29, d9 │ │ - vrintp.f16 , │ │ - @ instruction: 0xfff6b9f5 │ │ - vshr.u64 , , #10 │ │ + vhadd.s32 d0, d8, d3 │ │ + str r5, [sp, #340] @ 0x154 │ │ + vtbl.8 d29, {d6}, d20 │ │ + vqshl.u64 d29, d29, #54 @ 0x36 │ │ + vcvt.f32.f16 , d4 │ │ + vqshrn.u64 d27, q12, #10 │ │ + vtrn.16 , q13 │ │ @ instruction: 0xfff648f0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n a01ac │ │ - beq.n 9fcb4 │ │ - b.n a0130 │ │ + b.n a01b8 │ │ + beq.n 9fcc0 │ │ + b.n a013c │ │ str r2, [r0, #0] │ │ - b.n a019c │ │ + b.n a01a8 │ │ movs r3, r0 │ │ - b.n a034a │ │ + b.n a0356 │ │ movs r4, r1 │ │ subs r2, #0 │ │ ands r0, r0 │ │ - b.n 9ffe6 │ │ + b.n 9fff2 │ │ movs r1, r0 │ │ - b.n 9ffea │ │ + b.n 9fff6 │ │ str r3, [r0, r0] │ │ - b.n 9ffee │ │ + b.n 9fffa │ │ str r2, [r0, #0] │ │ - b.n 9fff2 │ │ + b.n 9fffe │ │ strb r1, [r0, #0] │ │ - b.n 9fff6 │ │ - b.n a024a │ │ + b.n a0002 │ │ + b.n a0260 │ │ add.w r0, r0, r0, lsl #4 │ │ - b.n 9fffe │ │ + b.n a000a │ │ movs r0, #6 │ │ - b.n a0002 │ │ + b.n a000e │ │ asrs r4, r1, #32 │ │ - b.n 9f7e0 │ │ + b.n 9f7ec │ │ asrs r0, r1, #32 │ │ - b.n a01e4 │ │ + b.n a01f0 │ │ adds r0, #5 │ │ - b.n a000e │ │ + b.n a001a │ │ movs r4, r0 │ │ - b.n a0012 │ │ + b.n a001e │ │ strb r0, [r1, #0] │ │ - b.n 9f7f0 │ │ + b.n 9f7fc │ │ strb r0, [r0, #0] │ │ - b.n a041a │ │ + b.n a0426 │ │ strb r0, [r0, #0] │ │ - b.n 9f7f8 │ │ + b.n 9f804 │ │ strb r4, [r0, #0] │ │ - b.n 9f7fc │ │ + b.n 9f808 │ │ mcrr2 11, 15, lr, ip, cr15 │ │ movs r0, r0 │ │ - b.n a038a │ │ + b.n a0396 │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ - beq.n 9fd10 │ │ - b.n a0188 │ │ + beq.n 9fd1c │ │ + b.n a0194 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r3, r4, ip} │ │ - b.n 9f838 │ │ + b.n 9f844 │ │ movs r0, #29 │ │ - b.n a043e │ │ + b.n a044a │ │ ands r0, r0 │ │ - b.n a0042 │ │ + b.n a004e │ │ asrs r1, r0, #32 │ │ - b.n 9fe24 │ │ - ldr r1, [pc, #420] @ (9feac ) │ │ + b.n 9fe30 │ │ + ldr r1, [pc, #424] @ (9febc ) │ │ add.w r0, r0, r4 │ │ - b.n a004e │ │ - beq.n 9fd30 │ │ - b.n a01a8 │ │ + b.n a005a │ │ + beq.n 9fd3c │ │ + b.n a01b4 │ │ ldrh r0, [r6, #6] │ │ - ldmia.w sp!, {r0, r2, r3, r7, r8, r9, sl, fp, sp, pc} │ │ + ldmia.w sp!, {r6, r7, r9, sl, fp, sp, pc} │ │ @ instruction: 0xfff64bf0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n a023c │ │ + b.n a0248 │ │ svc 110 @ 0x6e │ │ - b.n a01c0 │ │ + b.n a01cc │ │ movs r0, r0 │ │ - b.n a03ca │ │ + b.n a03d6 │ │ lsls r3, r3, #2 │ │ lsrs r0, r0, #8 │ │ ands r0, r0 │ │ - b.n a0072 │ │ + b.n a007e │ │ movs r0, r0 │ │ - b.n 9f856 │ │ + b.n 9f862 │ │ str r1, [r0, r0] │ │ - b.n a007a │ │ + b.n a0086 │ │ subs r1, r6, r0 │ │ - b.n a0344 │ │ + b.n a0350 │ │ asrs r5, r2, #15 │ │ - b.n a03c4 │ │ + b.n a03d0 │ │ movs r1, r0 │ │ - b.n 9ffe6 │ │ + b.n 9fff2 │ │ lsls r6, r2, #2 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n 9f876 │ │ + b.n 9f882 │ │ movs r0, r2 │ │ - b.n 9f872 │ │ + b.n 9f87e │ │ movs r0, r0 │ │ - b.n a03f6 │ │ + b.n a0402 │ │ lsls r5, r2, #2 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n 9f886 │ │ + b.n 9f892 │ │ asrs r3, r2, #32 │ │ - b.n a0362 │ │ + b.n a036e │ │ asrs r2, r0, #32 │ │ - b.n a03e6 │ │ + b.n a03f2 │ │ movs r1, r0 │ │ - b.n 9ff8a │ │ + b.n 9ff96 │ │ lsls r2, r2, #2 │ │ subs r0, r0, r0 │ │ strb r0, [r3, #0] │ │ - b.n a028c │ │ + b.n a0298 │ │ strh r2, [r0, #0] │ │ - b.n a00b6 │ │ + b.n a00c2 │ │ asrs r4, r0, #32 │ │ - b.n a00ba │ │ + b.n a00c6 │ │ movs r0, #5 │ │ - b.n a00be │ │ + b.n a00ca │ │ movs r7, r0 │ │ - b.n a00c2 │ │ - bfcsel a, 9f582 , c, gt │ │ + b.n a00ce │ │ + bfcsel a, 9f58e , c, gt │ │ movs r0, r0 │ │ - b.n a042a │ │ + b.n a0436 │ │ lsls r3, r2, #2 │ │ subs r0, r0, r0 │ │ lsls r4, r0, #1 │ │ - b.n 9f8ba │ │ + b.n 9f8c6 │ │ str r0, [sp, #532] @ 0x214 │ │ - b.n 9fea0 │ │ + b.n 9feac │ │ lsls r1, r1, #8 │ │ - b.n 9fe9a │ │ + b.n 9fea6 │ │ lsls r2, r6, #2 │ │ - b.n a013e │ │ + b.n a014a │ │ movs r0, r0 │ │ - b.n a0442 │ │ + b.n a044e │ │ movs r0, r2 │ │ lsrs r0, r0, #8 │ │ lsls r4, r2, #1 │ │ - b.n 9f8d2 │ │ + b.n 9f8de │ │ movs r1, r0 │ │ - b.n a0458 │ │ + b.n a0464 │ │ asrs r5, r0, #4 │ │ - b.n 9fcd2 │ │ + b.n 9fcde │ │ asrs r4, r0, #3 │ │ - b.n 9f8d0 │ │ + b.n 9f8dc │ │ asrs r1, r0, #32 │ │ - b.n a04fa │ │ + b.n a0506 │ │ strb r5, [r0, #4] │ │ - b.n 9fcbe │ │ + b.n 9fcca │ │ movs r0, r5 │ │ asrs r5, r3, #22 │ │ lsls r0, r6, #2 │ │ asrs r0, r2, #7 │ │ asrs r0, r2, #5 │ │ asrs r0, r4, #31 │ │ movs r0, r3 │ │ - b.n a02e8 │ │ + b.n a02f4 │ │ lsls r3, r3, #2 │ │ add.w r0, r0, r0, lsl #24 │ │ - b.n a0116 │ │ + b.n a0122 │ │ lsls r4, r2, #1 │ │ - b.n 9f902 │ │ + b.n 9f90e │ │ asrs r4, r0, #3 │ │ - b.n 9f918 │ │ + b.n 9f924 │ │ movs r0, r0 │ │ - b.n a048e │ │ + b.n a049a │ │ asrs r5, r0, #4 │ │ - b.n 9fce6 │ │ + b.n 9fcf2 │ │ lsls r2, r1, #2 │ │ subs r0, r0, r0 │ │ lsls r4, r2, #1 │ │ - b.n 9f916 │ │ + b.n 9f922 │ │ lsls r5, r0, #4 │ │ - b.n 9fd12 │ │ + b.n 9fd1e │ │ movs r0, r0 │ │ - b.n a0496 │ │ + b.n a04a2 │ │ movs r5, r2 │ │ lsrs r0, r0, #8 │ │ subs r0, r2, #7 │ │ - b.n a041c │ │ + b.n a0428 │ │ movs r0, #0 │ │ - b.n a0542 │ │ + b.n a054e │ │ adds r0, #0 │ │ - b.n a0146 │ │ + b.n a0152 │ │ strb r4, [r0, #0] │ │ - b.n 9f9f0 │ │ + b.n 9f9fc │ │ movs r1, r0 │ │ - b.n a043c │ │ + b.n a0448 │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ adds r0, #24 │ │ - b.n 9f936 │ │ + b.n 9f942 │ │ strb r4, [r6, #2] │ │ - b.n a01ba │ │ + b.n a01c6 │ │ movs r0, r0 │ │ - b.n a04c4 │ │ + b.n a04d0 │ │ strb r1, [r0, #0] │ │ - b.n a0130 │ │ + b.n a013c │ │ strb r4, [r6, #2] │ │ - b.n a01a6 │ │ + b.n a01b2 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #188 @ 0xbc │ │ - b.n 9f934 │ │ + b.n 9f940 │ │ adds r0, #4 │ │ - b.n a0338 │ │ + b.n a0344 │ │ movs r1, r0 │ │ and.w r0, r0, r0, lsr #28 │ │ - b.n 9f95a │ │ + b.n 9f966 │ │ movs r0, #8 │ │ - b.n 9f94c │ │ + b.n 9f958 │ │ strb r1, [r0, #0] │ │ - b.n a0344 │ │ + b.n a0350 │ │ strb r0, [r6, #2] │ │ - b.n a01cc │ │ + b.n a01d8 │ │ lsls r4, r5, #2 │ │ - b.n 9f96a │ │ + b.n 9f976 │ │ movs r0, r0 │ │ - b.n a04ee │ │ + b.n a04fa │ │ @ instruction: 0xffeb1aff │ │ movs r2, r0 │ │ - b.n a0500 │ │ + b.n a050c │ │ movs r1, r7 │ │ subs r2, #0 │ │ movs r0, r0 │ │ - b.n a050e │ │ + b.n a051a │ │ movs r7, r6 │ │ lsrs r0, r0, #8 │ │ strh r0, [r0, #2] │ │ - b.n 9f98e │ │ + b.n 9f99a │ │ movs r0, #1 │ │ - b.n a05aa │ │ + b.n a05b6 │ │ lsls r0, r1, #2 │ │ - b.n 9f99e │ │ + b.n 9f9aa │ │ lsls r5, r0, #10 │ │ - b.n 9ff72 │ │ + b.n 9ff7e │ │ lsls r0, r3, #7 │ │ - b.n a01f6 │ │ + b.n a0202 │ │ movs r0, r2 │ │ - b.n 9f994 │ │ + b.n 9f9a0 │ │ movs r0, r3 │ │ - b.n a0398 │ │ + b.n a03a4 │ │ asrs r4, r2, #32 │ │ - b.n 9f99c │ │ + b.n 9f9a8 │ │ asrs r4, r0, #32 │ │ - b.n a01c6 │ │ + b.n a01d2 │ │ bflx 8, r0 │ │ movs r0, r0 │ │ - b.n a052e │ │ + b.n a053a │ │ lsls r7, r2, #1 │ │ subs r0, r0, r0 │ │ movs r7, r1 │ │ - b.n a05d6 │ │ + b.n a05e2 │ │ strb r0, [r3, #0] │ │ - b.n a03b4 │ │ + b.n a03c0 │ │ movs r0, r0 │ │ - b.n 9f9b8 │ │ + b.n 9f9c4 │ │ movs r0, r1 │ │ - b.n a03bc │ │ + b.n a03c8 │ │ movs r0, #16 │ │ - b.n a03c0 │ │ + b.n a03cc │ │ asrs r7, r0, #32 │ │ - b.n a01ea │ │ + b.n a01f6 │ │ adds r0, #0 │ │ - b.n a05ee │ │ + b.n a05fa │ │ lsls r0, r4, #5 │ │ add.w r0, r0, r8, lsl #24 │ │ - b.n 9f9f0 │ │ + b.n 9f9fc │ │ movs r0, r0 │ │ - b.n a0566 │ │ + b.n a0572 │ │ lsls r5, r1, #1 │ │ subs r0, r0, r0 │ │ lsls r4, r2, #1 │ │ - b.n 9f9ea │ │ + b.n 9f9f6 │ │ asrs r4, r0, #32 │ │ - b.n 9f9e6 │ │ + b.n 9f9f2 │ │ asrs r4, r0, #3 │ │ - b.n 9f9e4 │ │ + b.n 9f9f0 │ │ asrs r2, r0, #32 │ │ - b.n a060e │ │ + b.n a061a │ │ strb r4, [r0, #0] │ │ - b.n 9f9d2 │ │ + b.n 9f9de │ │ movs r7, r0 │ │ - b.n a0216 │ │ + b.n a0222 │ │ ldr??.w lr, [r6], #255 │ │ str r0, [r0, #0] │ │ - b.n a021e │ │ + b.n a022a │ │ lsls r4, r2, #1 │ │ - b.n 9fa0a │ │ + b.n 9fa16 │ │ asrs r4, r0, #3 │ │ - b.n 9fa20 │ │ + b.n 9fa2c │ │ movs r0, r0 │ │ - b.n a0596 │ │ + b.n a05a2 │ │ asrs r4, r0, #32 │ │ - b.n 9f9ee │ │ + b.n 9f9fa │ │ lsls r0, r0, #1 │ │ subs r0, r0, r0 │ │ lsls r4, r1, #1 │ │ - b.n 9fa1e │ │ + b.n 9fa2a │ │ asrs r0, r0, #3 │ │ - b.n a063a │ │ + b.n a0646 │ │ asrs r5, r0, #32 │ │ - b.n 9fe7e │ │ + b.n 9fe8a │ │ lsrs r1, r2, #24 │ │ - b.n a0412 │ │ + b.n a041e │ │ lsls r7, r7, #12 │ │ add.w r0, r0, r0 │ │ - b.n a05aa │ │ + b.n a05b6 │ │ movs r0, r7 │ │ subs r0, r0, r0 │ │ movs r0, r1 │ │ - b.n a0252 │ │ + b.n a025e │ │ asrs r5, r0, #32 │ │ - b.n a0256 │ │ + b.n a0262 │ │ lsls r5, r2, #13 │ │ add.w r0, r0, r0, lsl #24 │ │ - b.n a065e │ │ + b.n a066a │ │ movs r0, r0 │ │ - b.n a05c2 │ │ + b.n a05ce │ │ movs r2, r3 │ │ lsrs r0, r0, #8 │ │ asrs r0, r2, #4 │ │ - b.n 9fa68 │ │ + b.n 9fa74 │ │ movs r0, #91 @ 0x5b │ │ - b.n a066e │ │ + b.n a067a │ │ ands r0, r0 │ │ - b.n a0272 │ │ + b.n a027e │ │ asrs r1, r0, #32 │ │ - b.n a0054 │ │ - ldr r0, [pc, #884] @ (a02ac ) │ │ + b.n a0060 │ │ + ldr r0, [pc, #888] @ (a02bc ) │ │ add.w r0, r0, r4, lsl #24 │ │ - b.n a027e │ │ + b.n a028a │ │ movs r3, r2 │ │ and.w r0, r0, ip, lsl #1 │ │ - b.n 9fa6e │ │ + b.n 9fa7a │ │ str r0, [r0, #0] │ │ - b.n a068a │ │ + b.n a0696 │ │ asrs r5, r0, #32 │ │ - b.n 9feee │ │ + b.n 9fefa │ │ asrs r1, r0, #32 │ │ - b.n a0654 │ │ + b.n a0660 │ │ asrs r5, r0, #32 │ │ - b.n 9fed6 │ │ + b.n 9fee2 │ │ movs r4, r0 │ │ - b.n 9fa82 │ │ + b.n 9fa8e │ │ asrs r4, r0, #1 │ │ - b.n 9fa86 │ │ + b.n 9fa92 │ │ movs r4, r0 │ │ - b.n a0662 │ │ + b.n a066e │ │ movs r4, r0 │ │ - b.n 9fa6e │ │ + b.n 9fa7a │ │ lsls r1, r1, #8 │ │ - b.n a006c │ │ + b.n a0078 │ │ asrs r0, r0, #32 │ │ - b.n a072e │ │ + b.n a073a │ │ str r2, [r6, #8] │ │ - b.n a02f2 │ │ + b.n a02fe │ │ asrs r0, r1, #32 │ │ - b.n 9fa76 │ │ + b.n 9fa82 │ │ str r4, [r1, #0] │ │ - b.n 9fa7a │ │ + b.n 9fa86 │ │ str r0, [r2, #0] │ │ - b.n 9fa7e │ │ + b.n 9fa8a │ │ str r4, [r2, #0] │ │ - b.n 9fa82 │ │ + b.n 9fa8e │ │ str r0, [r3, #0] │ │ - b.n 9fa86 │ │ + b.n 9fa92 │ │ str r4, [r3, #0] │ │ - b.n 9fa8a │ │ + b.n 9fa96 │ │ str r0, [r4, #0] │ │ - b.n 9fa8e │ │ + b.n 9fa9a │ │ str r4, [r4, #0] │ │ - b.n 9fa92 │ │ + b.n 9fa9e │ │ movs r6, r0 │ │ - b.n a02d6 │ │ - beq.n 9ffc8 │ │ - b.n a0430 │ │ + b.n a02e2 │ │ + beq.n 9ffd4 │ │ + b.n a043c │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r1, r2, r4, sp, lr} │ │ - b.n a06e2 │ │ + b.n a06ee │ │ movs r0, r1 │ │ and.w r9, r0, ip, asr #24 │ │ - b.n a05ba │ │ + b.n a05c6 │ │ ldr r7, [r7, #124] @ 0x7c │ │ - b.n a064c │ │ + b.n a0658 │ │ movs r5, r0 │ │ and.w r0, r0, r1, lsl #24 │ │ - b.n a06f6 │ │ + b.n a0702 │ │ movs r3, r0 │ │ and.w r0, r0, sp, lsl #24 │ │ - b.n a06fe │ │ + b.n a070a │ │ lsrs r2, r0, #32 │ │ - b.n a05e2 │ │ + b.n a05ee │ │ str r2, [r0, #124] @ 0x7c │ │ lsls r0, r1, #12 │ │ ldr r7, [r7, #124] @ 0x7c │ │ lsls r7, r1, #13 │ │ asrs r4, r3, #1 │ │ - b.n 9fb0c │ │ + b.n 9fb18 │ │ movs r6, r0 │ │ - b.n a0312 │ │ + b.n a031e │ │ movs r0, #40 @ 0x28 │ │ - b.n a0716 │ │ + b.n a0722 │ │ asrs r1, r0, #32 │ │ - b.n a00f8 │ │ + b.n a0104 │ │ movs r1, r2 │ │ and.w r0, r0, ip, lsl #5 │ │ - b.n 9fb20 │ │ + b.n 9fb2c │ │ movs r0, #45 @ 0x2d │ │ - b.n a0726 │ │ + b.n a0732 │ │ str r0, [r0, #0] │ │ - b.n a032a │ │ + b.n a0336 │ │ asrs r1, r0, #32 │ │ - b.n a010c │ │ + b.n a0118 │ │ movs r4, r1 │ │ and.w r0, r0, r0, lsl #24 │ │ - b.n a0336 │ │ + b.n a0342 │ │ movs r4, r0 │ │ - b.n 9fb22 │ │ + b.n 9fb2e │ │ movs r0, #97 @ 0x61 │ │ - b.n a073e │ │ + b.n a074a │ │ asrs r4, r6, #32 │ │ - b.n 9fb40 │ │ + b.n 9fb4c │ │ movs r2, r0 │ │ - b.n a0706 │ │ + b.n a0712 │ │ movs r4, r0 │ │ - b.n 9fb12 │ │ + b.n 9fb1e │ │ asrs r1, r0, #32 │ │ - b.n a012c │ │ + b.n a0138 │ │ movs r6, r0 │ │ - b.n a0352 │ │ + b.n a035e │ │ movs r3, r0 │ │ and.w r0, r0, r8, lsr #4 │ │ - b.n 9fb58 │ │ + b.n 9fb64 │ │ movs r6, r0 │ │ - b.n a035e │ │ + b.n a036a │ │ movs r0, #53 @ 0x35 │ │ - b.n a0762 │ │ + b.n a076e │ │ asrs r1, r0, #32 │ │ - b.n a0144 │ │ - ldr r0, [pc, #644] @ (a02ac ) │ │ + b.n a0150 │ │ + ldr r0, [pc, #648] @ (a02bc ) │ │ @ instruction: 0xeb00ffd8 │ │ - @ instruction: 0xeaff89d4 │ │ - vtbx.8 d24, {d22-d23}, d0 │ │ - vtbl.8 d24, {d22-d23}, d8 │ │ - vtbl.8 d24, {d22-d23}, d16 │ │ - @ instruction: 0xfff68a78 │ │ + @ instruction: 0xeaff8913 │ │ + @ instruction: 0xfff688ff │ │ + vtbx.8 d24, {d22}, d7 │ │ + @ instruction: 0xfff688df │ │ + @ instruction: 0xfff689b7 │ │ @ instruction: 0xfff64ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n a0564 │ │ - beq.n a0054 │ │ - b.n a04e8 │ │ + b.n a0570 │ │ + beq.n a0060 │ │ + b.n a04f4 │ │ ldrh r2, [r0, #24] │ │ stc 0, cr13, [sp, #-544]! @ 0xfffffde0 │ │ - b.n a04f0 │ │ - add r0, pc, #0 @ (adr r0, a0058 ) │ │ - b.n a039a │ │ + b.n a04fc │ │ + add r0, pc, #0 @ (adr r0, a0064 ) │ │ + b.n a03a6 │ │ movs r4, r1 │ │ - b.n 9fb7e │ │ + b.n 9fb8a │ │ ands r1, r0 │ │ - b.n a03a2 │ │ + b.n a03ae │ │ movs r4, r2 │ │ - b.n 9fb80 │ │ + b.n 9fb8c │ │ movs r2, r1 │ │ - b.n a03aa │ │ + b.n a03b6 │ │ asrs r0, r0, #32 │ │ - b.n a07ae │ │ + b.n a07ba │ │ movs r0, #4 │ │ - b.n a07b2 │ │ + b.n a07be │ │ movs r4, #232 @ 0xe8 │ │ add.w r0, r0, r0 │ │ - b.n a071a │ │ + b.n a0726 │ │ lsls r4, r0, #3 │ │ subs r0, r0, r0 │ │ asrs r0, r2, #32 │ │ - b.n 9fbb6 │ │ + b.n 9fbc2 │ │ ands r0, r3 │ │ - b.n 9fba0 │ │ + b.n 9fbac │ │ movs r0, #20 │ │ - b.n 9fbac │ │ + b.n 9fbb8 │ │ movs r4, r0 │ │ - b.n a03b2 │ │ + b.n a03be │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n 9fc4a │ │ + b.n 9fc56 │ │ movs r1, r0 │ │ - b.n a051a │ │ + b.n a0526 │ │ movs r5, r0 │ │ - b.n 9fc32 │ │ + b.n 9fc3e │ │ movs r0, #20 │ │ - b.n 9fbc4 │ │ + b.n 9fbd0 │ │ movs r4, r2 │ │ - b.n 9fbe0 │ │ + b.n 9fbec │ │ lsrs r4, r3 │ │ - b.n a042c │ │ + b.n a0438 │ │ adds r2, #68 @ 0x44 │ │ - b.n 9fc0e │ │ + b.n 9fc1a │ │ asrs r4, r0, #32 │ │ - b.n a01bc │ │ + b.n a01c8 │ │ asrs r2, r0, #32 │ │ - b.n a01b8 │ │ + b.n a01c4 │ │ lsrs r4, r2 │ │ - b.n a0340 │ │ + b.n a034c │ │ asrs r5, r0, #32 │ │ - b.n a01c0 │ │ + b.n a01cc │ │ movs r1, r0 │ │ - b.n a036a │ │ + b.n a0376 │ │ lsls r7, r2, #3 │ │ subs r2, #0 │ │ str r5, [r2, #12] │ │ - b.n a047e │ │ + b.n a048a │ │ ands r0, r3 │ │ - b.n 9fc08 │ │ + b.n 9fc14 │ │ movs r0, r0 │ │ - b.n a077e │ │ + b.n a078a │ │ lsls r1, r5, #2 │ │ - ldr r2, [pc, #0] @ (a00d4 ) │ │ + ldr r2, [pc, #0] @ (a00e0 ) │ │ strb r0, [r5, #0] │ │ - b.n a05f4 │ │ + b.n a0600 │ │ movs r4, r0 │ │ - b.n a081e │ │ + b.n a082a │ │ movs r1, #6 │ │ - b.n a01e2 │ │ + b.n a01ee │ │ asrs r4, r3, #32 │ │ - b.n a05fa │ │ + b.n a0606 │ │ movs r7, r0 │ │ - b.n a042a │ │ + b.n a0436 │ │ str r0, [r4, r0] │ │ - b.n a0602 │ │ + b.n a060e │ │ asrs r0, r4, #32 │ │ - b.n 9fc0c │ │ - bmi.n a01dc │ │ - @ instruction: 0xfb00007c │ │ - b.n a060e │ │ + b.n 9fc18 │ │ + bcs.n a009c │ │ + @ instruction: 0xfa00007c │ │ + b.n a061a │ │ movs r4, r3 │ │ - b.n 9fc18 │ │ + b.n 9fc24 │ │ lsls r6, r3, #1 │ │ - b.n a060c │ │ + b.n a0618 │ │ movs r0, r1 │ │ - b.n 9fc20 │ │ + b.n 9fc2c │ │ movs r4, r0 │ │ - b.n a0818 │ │ + b.n a0824 │ │ movs r4, r0 │ │ - b.n 9fc28 │ │ + b.n 9fc34 │ │ movs r4, r2 │ │ - b.n 9fc4c │ │ + b.n 9fc58 │ │ strh r0, [r2, #0] │ │ @ instruction: 0xf280500c │ │ - b.n 9fc34 │ │ + b.n 9fc40 │ │ str r0, [r0, r0] │ │ - b.n a085e │ │ + b.n a086a │ │ movs r0, r6 │ │ - b.n a0622 │ │ + b.n a062e │ │ movs r0, r2 │ │ - b.n 9fc40 │ │ + b.n 9fc4c │ │ movs r0, r4 │ │ - b.n 9fc64 │ │ + b.n 9fc70 │ │ asrs r6, r6, #1 │ │ - b.n 9ff0c │ │ + b.n 9ff18 │ │ strb r1, [r0, #4] │ │ - b.n a0052 │ │ + b.n a005e │ │ lsls r4, r7, #2 │ │ - b.n a04e4 │ │ + b.n a04f0 │ │ movs r0, #186 @ 0xba │ │ - b.n a04e8 │ │ + b.n a04f4 │ │ adds r0, #160 @ 0xa0 │ │ - b.n a047e │ │ + b.n a048a │ │ movs r2, r0 │ │ - b.n a0766 │ │ + b.n a0772 │ │ adds r0, #36 @ 0x24 │ │ - b.n 9fc60 │ │ + b.n 9fc6c │ │ movs r4, r4 │ │ subs r0, r0, r0 │ │ movs r0, #16 │ │ - b.n 9fc88 │ │ + b.n 9fc94 │ │ str r2, [r0, #0] │ │ - b.n a0654 │ │ + b.n a0660 │ │ str r6, [r0, r0] │ │ - b.n 9fd0a │ │ + b.n 9fd16 │ │ ands r0, r0 │ │ - b.n 9fc88 │ │ + b.n 9fc94 │ │ strh r0, [r2, #6] │ │ - b.n a04e2 │ │ + b.n a04ee │ │ asrs r0, r0, #1 │ │ - b.n a086c │ │ + b.n a0878 │ │ movs r0, #16 │ │ - b.n 9fc9a │ │ + b.n 9fca6 │ │ adds r0, #4 │ │ - b.n 9fc98 │ │ + b.n 9fca4 │ │ asrs r6, r0, #32 │ │ - b.n 9fd02 │ │ + b.n 9fd0e │ │ movs r0, #178 @ 0xb2 │ │ - b.n a0516 │ │ + b.n a0522 │ │ movs r2, r0 │ │ - b.n a0422 │ │ + b.n a042e │ │ str r1, [r0, #0] │ │ - b.n a08ba │ │ + b.n a08c6 │ │ str r2, [r4, #0] │ │ lsls r5, r0, #8 │ │ movs r0, #8 │ │ - b.n a022a │ │ + b.n a0236 │ │ movs r0, #9 │ │ - b.n a032c │ │ + b.n a0338 │ │ ldr r2, [r0, #16] │ │ adds r3, #134 @ 0x86 │ │ movs r2, r0 │ │ - b.n a082e │ │ + b.n a083a │ │ movs r5, r1 │ │ subs r2, #0 │ │ str r4, [r2, r0] │ │ - b.n a06a4 │ │ + b.n a06b0 │ │ ands r4, r4 │ │ - b.n 9fcd4 │ │ + b.n 9fce0 │ │ strb r5, [r0, #0] │ │ - b.n a04de │ │ + b.n a04ea │ │ lsls r2, r6, #2 │ │ - b.n a0350 │ │ + b.n a035c │ │ movs r0, #0 │ │ - b.n a08e6 │ │ + b.n a08f2 │ │ adds r0, #6 │ │ - b.n a04ea │ │ + b.n a04f6 │ │ asrs r0, r0, #32 │ │ - b.n a00d8 │ │ + b.n a00e4 │ │ movs r2, r1 │ │ - b.n a04f2 │ │ - ldr r7, [sp, #392] @ 0x188 │ │ + b.n a04fe │ │ + ldr r7, [sp, #396] @ 0x18c │ │ add.w r0, r0, r0 │ │ - b.n a085a │ │ + b.n a0866 │ │ lsls r4, r6, #1 │ │ subs r0, r0, r0 │ │ ands r1, r0 │ │ - b.n a066a │ │ + b.n a0676 │ │ @ instruction: 0xfff51aff │ │ asrs r6, r0, #32 │ │ - b.n 9fd7e │ │ + b.n 9fd8a │ │ ands r0, r3 │ │ - b.n 9fd08 │ │ + b.n 9fd14 │ │ str r0, [r0, r0] │ │ - b.n a0912 │ │ + b.n a091e │ │ lsls r0, r0, #1 │ │ - b.n a0658 │ │ + b.n a0664 │ │ movs r6, r0 │ │ - b.n 9fd6e │ │ + b.n 9fd7a │ │ movs r1, r0 │ │ and.w r0, r0, r2 │ │ - b.n a0882 │ │ + b.n a088e │ │ movs r7, r1 │ │ cmp r2, #0 │ │ lsls r5, r2, #3 │ │ - b.n a059e │ │ + b.n a05aa │ │ movs r0, r0 │ │ - b.n a088e │ │ + b.n a089a │ │ lsls r2, r4, #1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r3, #32 │ │ - b.n 9fd30 │ │ + b.n 9fd3c │ │ lsls r0, r0, #2 │ │ - b.n a02fc │ │ + b.n a0308 │ │ asrs r4, r4, #32 │ │ - b.n 9fd38 │ │ + b.n 9fd44 │ │ asrs r0, r6, #2 │ │ - b.n a0582 │ │ + b.n a058e │ │ movs r2, r1 │ │ - b.n a0546 │ │ - bfcsel 1a, a0a06 , 1c, gt │ │ + b.n a0552 │ │ + bfcsel 1a, a0a12 , 1c, gt │ │ movs r0, r0 │ │ - b.n a08ae │ │ + b.n a08ba │ │ lsls r5, r2, #1 │ │ subs r0, r0, r0 │ │ str r5, [r0, #0] │ │ - b.n 9fdca │ │ + b.n 9fdd6 │ │ lsls r6, r6, #1 │ │ - b.n 9ff78 │ │ + b.n 9ff84 │ │ movs r0, r0 │ │ - b.n a08be │ │ + b.n a08ca │ │ @ instruction: 0xffc05aff │ │ lsls r5, r2, #1 │ │ and.w r0, r0, r4, asr #32 │ │ - b.n 9fd64 │ │ + b.n 9fd70 │ │ strh r4, [r2, #0] │ │ - b.n a073c │ │ + b.n a0748 │ │ str r0, [sp, #0] │ │ - b.n a0972 │ │ + b.n a097e │ │ str r0, [r0, #8] │ │ - b.n a0576 │ │ + b.n a0582 │ │ movs r2, r0 │ │ @ instruction: 0xea009002 │ │ - b.n a0750 │ │ + b.n a075c │ │ movs r1, r1 │ │ - b.n a04ee │ │ + b.n a04fa │ │ @ instruction: 0xffe70aff │ │ movs r1, r1 │ │ - b.n a0358 │ │ + b.n a0364 │ │ lsls r4, r6, #6 │ │ - b.n a05ee │ │ + b.n a05fa │ │ asrs r0, r0, #32 │ │ - b.n a0362 │ │ + b.n a036e │ │ movs r4, r0 │ │ - b.n 9fdf8 │ │ + b.n 9fe04 │ │ movs r1, r0 │ │ - b.n a087a │ │ + b.n a0886 │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ movs r2, r0 │ │ - b.n a0882 │ │ + b.n a088e │ │ @ instruction: 0xfff40aff │ │ movs r4, r0 │ │ - b.n a088a │ │ + b.n a0896 │ │ lsls r2, r4, #1 │ │ lsrs r0, r0, #8 │ │ movs r2, r1 │ │ - b.n a05b2 │ │ + b.n a05be │ │ movs r0, #7 │ │ - b.n a05b6 │ │ - ldrsb r5, [r4, r3] │ │ + b.n a05c2 │ │ + ldrsb r6, [r4, r3] │ │ add.w r0, r0, r0 │ │ - b.n a091e │ │ + b.n a092a │ │ lsls r3, r0, #1 │ │ subs r0, r0, r0 │ │ movs r0, r3 │ │ - b.n 9fdba │ │ + b.n 9fdc6 │ │ asrs r0, r0, #32 │ │ - b.n a09ca │ │ + b.n a09d6 │ │ vqrdmlah.s32 q15, q14, │ │ movs r0, r0 │ │ - b.n a0932 │ │ + b.n a093e │ │ @ instruction: 0xffe80aff │ │ movs r5, r7 │ │ and.w r0, r0, r6, ror #2 │ │ - b.n a0640 │ │ + b.n a064c │ │ movs r0, #0 │ │ - b.n a09e2 │ │ + b.n a09ee │ │ adds r0, #0 │ │ - b.n a09e6 │ │ + b.n a09f2 │ │ movs r0, r0 │ │ - b.n a03ac │ │ + b.n a03b8 │ │ asrs r0, r1, #32 │ │ - b.n 9fdce │ │ + b.n 9fdda │ │ movs r2, r1 │ │ - b.n a05f2 │ │ - ldr r7, [sp, #136] @ 0x88 │ │ + b.n a05fe │ │ + ldr r7, [sp, #140] @ 0x8c │ │ add.w r0, r0, r0 │ │ - b.n a095a │ │ + b.n a0966 │ │ movs r4, r6 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n 9fdf6 │ │ + b.n 9fe02 │ │ movs r4, r2 │ │ - b.n 9fde6 │ │ + b.n 9fdf2 │ │ movs r4, r0 │ │ - b.n a05ea │ │ + b.n a05f6 │ │ @ instruction: 0xffda1aff │ │ movs r5, r0 │ │ - b.n 9fe86 │ │ + b.n 9fe92 │ │ ldrsb r4, [r7, r6] │ │ - b.n a066a │ │ + b.n a0676 │ │ str r1, [r0, #0] │ │ - b.n a075a │ │ + b.n a0766 │ │ str r5, [r0, #0] │ │ - b.n 9fe72 │ │ + b.n 9fe7e │ │ lsls r6, r6, #1 │ │ - b.n a0040 │ │ + b.n a004c │ │ movs r1, r0 │ │ - b.n a0986 │ │ + b.n a0992 │ │ @ instruction: 0xffcabaff │ │ lsls r6, r6, #1 │ │ - b.n a00cc │ │ + b.n a00d8 │ │ asrs r1, r0, #32 │ │ - b.n a0a32 │ │ + b.n a0a3e │ │ movs r4, r0 │ │ - b.n a0996 │ │ + b.n a09a2 │ │ movs r5, r1 │ │ subs r2, #0 │ │ movs r0, #124 @ 0x7c │ │ - b.n a06fe │ │ + b.n a070a │ │ str r4, [r1, r0] │ │ - b.n 9fe3c │ │ + b.n 9fe48 │ │ asrs r1, r0, #32 │ │ - b.n a0a0a │ │ + b.n a0a16 │ │ lsls r0, r2, #2 │ │ @ instruction: 0xe99d3002 │ │ - b.n a064e │ │ + b.n a065a │ │ lsrs r5, r1, #10 │ │ orn r0, r4, #135168 @ 0x21000 │ │ - b.n a07bc │ │ + b.n a07c8 │ │ strh r5, [r1, #58] @ 0x3a │ │ and.w sl, r7, #4620288 @ 0x468000 │ │ - bl ffce6312 │ │ + bl ffce631e │ │ subs r7, r7, r3 │ │ ands r0, r3 │ │ - b.n 9fe60 │ │ + b.n 9fe6c │ │ movs r0, r0 │ │ - b.n a05ce │ │ + b.n a05da │ │ str r0, [r0, r0] │ │ - b.n a0a6e │ │ + b.n a0a7a │ │ @ instruction: 0xffb80aff │ │ adds r0, #32 │ │ - b.n 9fe70 │ │ + b.n 9fe7c │ │ movs r0, #40 @ 0x28 │ │ - b.n a0854 │ │ + b.n a0860 │ │ strb r4, [r3, #0] │ │ - b.n 9fe78 │ │ + b.n 9fe84 │ │ movs r1, r0 │ │ - b.n a03c2 │ │ + b.n a03ce │ │ movs r1, #1 │ │ - b.n a044a │ │ + b.n a0456 │ │ adds r1, #1 │ │ - b.n a0450 │ │ + b.n a045c │ │ strb r1, [r0, #2] │ │ - b.n a045c │ │ + b.n a0468 │ │ movs r1, r0 │ │ - b.n a0852 │ │ + b.n a085e │ │ asrs r4, r0, #32 │ │ - b.n 9fc7a │ │ + b.n 9fc86 │ │ movs r1, r0 │ │ - b.n a07fa │ │ + b.n a0806 │ │ str r2, [r6, r2] │ │ - b.n a04ec │ │ + b.n a04f8 │ │ asrs r4, r0, #32 │ │ - b.n 9fc68 │ │ + b.n 9fc74 │ │ @ instruction: 0xfffa1aff │ │ @ instruction: 0xffaaeaff │ │ asrs r2, r6, #30 │ │ - b.n a097e │ │ + b.n a098a │ │ subs r7, r7, #7 │ │ - b.n a0a10 │ │ + b.n a0a1c │ │ movs r1, r0 │ │ - b.n a0616 │ │ + b.n a0622 │ │ @ instruction: 0xffd40aff │ │ movs r4, r0 │ │ and.w r0, r0, ip, lsr #8 │ │ - b.n 9feb6 │ │ + b.n 9fec2 │ │ movs r2, r1 │ │ - b.n a06c6 │ │ + b.n a06d2 │ │ adds r0, #186 @ 0xba │ │ - b.n a072e │ │ + b.n a073a │ │ asrs r0, r2, #32 │ │ - b.n 9feb2 │ │ - ldr r6, [sp, #940] @ 0x3ac │ │ + b.n 9febe │ │ + ldr r6, [sp, #944] @ 0x3b0 │ │ add.w r0, r0, sl, lsl #8 │ │ - b.n a06d6 │ │ + b.n a06e2 │ │ subs r0, r2, #7 │ │ - b.n a09b8 │ │ + b.n a09c4 │ │ adds r0, #4 │ │ - b.n 9ff82 │ │ + b.n 9ff8e │ │ movs r1, r0 │ │ - b.n a09c8 │ │ + b.n a09d4 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ movs r0, #24 │ │ - b.n 9fede │ │ + b.n 9feea │ │ adds r0, #180 @ 0xb4 │ │ - b.n a0762 │ │ + b.n a076e │ │ movs r0, r0 │ │ - b.n a0a56 │ │ + b.n a0a62 │ │ adds r0, #1 │ │ - b.n a06bc │ │ + b.n a06c8 │ │ adds r0, #180 @ 0xb4 │ │ - b.n a074e │ │ + b.n a075a │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ adds r0, #0 │ │ - b.n a0b02 │ │ + b.n a0b0e │ │ adds r0, #188 @ 0xbc │ │ - b.n 9feca │ │ + b.n 9fed6 │ │ movs r0, #4 │ │ - b.n a08ce │ │ + b.n a08da │ │ movs r2, r0 │ │ and.w r0, r0, r0, lsr #12 │ │ - b.n 9ff06 │ │ + b.n 9ff12 │ │ strb r0, [r0, #0] │ │ - b.n a0b16 │ │ + b.n a0b22 │ │ strb r0, [r1, #0] │ │ - b.n 9fee0 │ │ + b.n 9feec │ │ asrs r1, r0, #32 │ │ - b.n a08e0 │ │ + b.n a08ec │ │ asrs r0, r6, #2 │ │ - b.n a0766 │ │ + b.n a0772 │ │ movs r0, r0 │ │ - b.n a0a86 │ │ + b.n a0a92 │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ - beq.n a043c │ │ - b.n a0884 │ │ + beq.n a0448 │ │ + b.n a0890 │ │ ldrh r2, [r0, #24] │ │ ldc 0, cr13, [sp], #16 │ │ - b.n a0910 │ │ + b.n a091c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r6, r7, r8, r9, sl} │ │ - b.n a0a0e │ │ + b.n a0a1a │ │ lsrs r7, r7, #31 │ │ - b.n a0aa0 │ │ + b.n a0aac │ │ @ instruction: 0xffe2eaff │ │ movs r0, #20 │ │ - b.n 9ff44 │ │ + b.n 9ff50 │ │ asrs r4, r0, #32 │ │ - b.n 9ff32 │ │ + b.n 9ff3e │ │ asrs r2, r0, #32 │ │ - b.n a0b14 │ │ + b.n a0b20 │ │ asrs r4, r0, #32 │ │ - b.n 9ff1a │ │ - beq.n a0468 │ │ - b.n a08b0 │ │ + b.n 9ff26 │ │ + beq.n a0474 │ │ + b.n a08bc │ │ ldrh r2, [r0, #24] │ │ ldc 0, cr13, [sp], #16 │ │ - b.n a093c │ │ + b.n a0948 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r0, r1, r5, sl, fp, ip, sp, lr} │ │ + ldmia.w sp!, {r2, r5, sl, fp, ip, sp, lr} │ │ add.w r0, r0, r0 │ │ - b.n a0ace │ │ + b.n a0ada │ │ @ instruction: 0xffd71aff │ │ vpmin.u32 q7, , │ │ - ldr r7, [pc, #960] @ (a07f8 ) │ │ + ldr r7, [pc, #960] @ (a0804 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n a0958 │ │ - beq.n a04d8 │ │ - b.n a08dc │ │ + b.n a0964 │ │ + beq.n a04e4 │ │ + b.n a08e8 │ │ str r0, [sp, #80] @ 0x50 │ │ - b.n 9ff68 │ │ + b.n 9ff74 │ │ str r1, [r0, r0] │ │ - b.n a078a │ │ + b.n a0796 │ │ ands r0, r0 │ │ - b.n a078e │ │ + b.n a079a │ │ movs r4, r0 │ │ - b.n 9ff76 │ │ + b.n 9ff82 │ │ asrs r4, r0, #32 │ │ - b.n 9ff88 │ │ + b.n 9ff94 │ │ movs r1, r0 │ │ - b.n a06fa │ │ + b.n a0706 │ │ movs r0, r4 │ │ subs r2, #0 │ │ strh r3, [r0, #0] │ │ - b.n a07a2 │ │ + b.n a07ae │ │ adds r0, #8 │ │ - b.n 9ff98 │ │ + b.n 9ffa4 │ │ movs r3, r0 │ │ - b.n a070a │ │ + b.n a0716 │ │ movs r1, r0 │ │ ldr r2, [sp, #0] │ │ movs r3, r0 │ │ - b.n a0714 │ │ + b.n a0720 │ │ movs r2, r3 │ │ lsrs r0, r0, #8 │ │ asrs r0, r2, #32 │ │ - b.n 9ffa4 │ │ + b.n 9ffb0 │ │ movs r1, r1 │ │ ldmia.w r2, {r2, r3, r5, ip, sp} │ │ - b.n 9fe98 │ │ + b.n 9fea4 │ │ movs r0, r6 │ │ - b.n 9fe9c │ │ + b.n 9fea8 │ │ asrs r0, r6, #2 │ │ - b.n a082c │ │ + b.n a0838 │ │ movs r0, r1 │ │ - b.n a0ab0 │ │ + b.n a0abc │ │ movs r5, r3 │ │ lsrs r0, r0, #8 │ │ asrs r0, r6, #32 │ │ - b.n a092c │ │ + b.n a0938 │ │ movs r4, r0 │ │ - b.n a0b40 │ │ + b.n a0b4c │ │ movs r0, r3 │ │ lsrs r0, r0, #8 │ │ movs r0, r1 │ │ - b.n a0b48 │ │ + b.n a0b54 │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ movs r7, r0 │ │ - b.n a0aca │ │ + b.n a0ad6 │ │ movs r6, r2 │ │ lsrs r0, r0, #8 │ │ adds r0, #0 │ │ - b.n a0052 │ │ - add r0, pc, #32 @ (adr r0, a04d4 ) │ │ - b.n a07f6 │ │ + b.n a005e │ │ + add r0, pc, #32 @ (adr r0, a04e0 ) │ │ + b.n a0802 │ │ str r1, [r0, #0] │ │ - b.n 9ffda │ │ + b.n 9ffe6 │ │ stmia r0!, {r0, r1, r2, r3} │ │ - b.n a09c0 │ │ + b.n a09cc │ │ adds r0, #40 @ 0x28 │ │ - b.n 9ff58 │ │ - b.n a04e0 │ │ - b.n a09c8 │ │ + b.n 9ff64 │ │ + b.n a04ec │ │ + b.n a09d4 │ │ str r7, [r4, #0] │ │ - b.n 9fee0 │ │ + b.n 9feec │ │ strh r5, [r1, #0] │ │ - b.n a09d0 │ │ + b.n a09dc │ │ str r0, [r1, #0] │ │ - b.n a09d4 │ │ + b.n a09e0 │ │ asrs r7, r0, #32 │ │ - b.n a0c16 │ │ + b.n a0c22 │ │ adds r0, #6 │ │ - b.n a0c1a │ │ + b.n a0c26 │ │ strb r5, [r0, #0] │ │ - b.n a0c1e │ │ + b.n a0c2a │ │ lsls r5, r1, #6 │ │ and.w r0, r0, r0 │ │ - b.n a0c26 │ │ + b.n a0c32 │ │ movs r4, r0 │ │ - b.n a0072 │ │ + b.n a007e │ │ lsls r2, r6, #30 │ │ - b.n a0afe │ │ + b.n a0b0a │ │ lsrs r7, r7, #31 │ │ - b.n a0b90 │ │ + b.n a0b9c │ │ movs r1, r2 │ │ - b.n a09f6 │ │ + b.n a0a02 │ │ movs r0, r0 │ │ - b.n a0002 │ │ - beq.n a0534 │ │ - b.n a0994 │ │ + b.n a000e │ │ + beq.n a0540 │ │ + b.n a09a0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r1} │ │ - b.n a0b26 │ │ + b.n a0b32 │ │ lsls r1, r7, #5 │ │ subs r0, r0, r0 │ │ asrs r5, r2, #3 │ │ - b.n a08b8 │ │ + b.n a08c4 │ │ movs r0, #12 │ │ - b.n a002c │ │ + b.n a0038 │ │ movs r0, #0 │ │ - b.n a0c56 │ │ + b.n a0c62 │ │ movs r0, r0 │ │ - b.n a0bbc │ │ + b.n a0bc8 │ │ movs r0, #4 │ │ - b.n a00a6 │ │ + b.n a00b2 │ │ movs r0, #0 │ │ - b.n a002a │ │ + b.n a0036 │ │ movs r4, r6 │ │ - ldr r2, [pc, #0] @ (a0524 ) │ │ + ldr r2, [pc, #0] @ (a0530 ) │ │ asrs r1, r0, #4 │ │ - b.n a0634 │ │ + b.n a0640 │ │ strb r4, [r3, #0] │ │ - b.n a0050 │ │ + b.n a005c │ │ asrs r4, r7, #2 │ │ - b.n a08e0 │ │ - add r0, pc, #644 @ (adr r0, a07b8 ) │ │ - b.n a0896 │ │ + b.n a08ec │ │ + add r0, pc, #644 @ (adr r0, a07c4 ) │ │ + b.n a08a2 │ │ lsls r7, r1, #6 │ │ lsrs r0, r0, #8 │ │ asrs r2, r7, #2 │ │ - b.n a08ec │ │ + b.n a08f8 │ │ strh r0, [r1, #0] │ │ - b.n a005c │ │ + b.n a0068 │ │ strh r4, [r2, #0] │ │ - b.n a0a54 │ │ + b.n a0a60 │ │ movs r0, r4 │ │ - b.n a0b6c │ │ + b.n a0b78 │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ movs r1, #180 @ 0xb4 │ │ - b.n a0900 │ │ + b.n a090c │ │ asrs r0, r3, #32 │ │ - b.n a0080 │ │ + b.n a008c │ │ str r2, [r0, #0] │ │ - b.n a066a │ │ + b.n a0676 │ │ movs r0, r0 │ │ - b.n a0c00 │ │ + b.n a0c0c │ │ adds r0, #8 │ │ - b.n a0a6e │ │ + b.n a0a7a │ │ movs r0, #182 @ 0xb6 │ │ - b.n a0912 │ │ + b.n a091e │ │ lsrs r1, r2, #31 │ │ asrs r7, r1, #12 │ │ movs r0, #52 @ 0x34 │ │ - b.n a0088 │ │ + b.n a0094 │ │ lsls r4, r6, #2 │ │ asrs r1, r0, #7 │ │ movs r0, r0 │ │ asrs r0, r4, #14 │ │ lsls r4, r7, #2 │ │ asrs r1, r0, #22 │ │ str r0, [sp, #80] @ 0x50 │ │ asrs r5, r2, #22 │ │ adds r0, #48 @ 0x30 │ │ - b.n a009c │ │ + b.n a00a8 │ │ movs r3, r0 │ │ and.w r0, r0, r8, ror #6 │ │ - b.n a0938 │ │ + b.n a0944 │ │ str r0, [r0, #0] │ │ - b.n a0cce │ │ + b.n a0cda │ │ strh r0, [r6, #0] │ │ - b.n a00ac │ │ + b.n a00b8 │ │ asrs r4, r6, #32 │ │ - b.n a00b0 │ │ + b.n a00bc │ │ movs r0, #0 │ │ - b.n a00cc │ │ + b.n a00d8 │ │ movs r0, r6 │ │ - b.n a0a34 │ │ + b.n a0a40 │ │ asrs r0, r6, #32 │ │ - b.n a0abc │ │ + b.n a0ac8 │ │ vrhadd.u d14, d2, d31 │ │ movs r0, r0 │ │ - b.n a0c4a │ │ + b.n a0c56 │ │ lsls r1, r1, #5 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n a0c52 │ │ + b.n a0c5e │ │ movs r4, r1 │ │ rev r0, r0 │ │ movs r1, r0 │ │ - b.n a0c6e │ │ + b.n a0c7a │ │ lsls r1, r0, #1 │ │ lsrs r0, r0, #8 │ │ lsls r2, r7, #2 │ │ - b.n a0970 │ │ + b.n a097c │ │ str r0, [sp, #4] │ │ - b.n a0a5a │ │ + b.n a0a66 │ │ movs r0, r4 │ │ - b.n a0bea │ │ + b.n a0bf6 │ │ movs r1, r6 │ │ subs r0, r0, r0 │ │ lsls r1, r1, #2 │ │ - b.n a06e0 │ │ + b.n a06ec │ │ lsls r4, r6, #6 │ │ - b.n a0976 │ │ + b.n a0982 │ │ str r0, [r0, #0] │ │ - b.n a06ea │ │ + b.n a06f6 │ │ lsls r6, r6, #2 │ │ - b.n a098a │ │ + b.n a0996 │ │ movs r4, r6 │ │ - b.n a00fc │ │ + b.n a0108 │ │ movs r0, r1 │ │ - b.n a0af2 │ │ + b.n a0afe │ │ movs r4, r5 │ │ and.w r0, r0, r5 │ │ - b.n a0198 │ │ + b.n a01a4 │ │ strh r0, [r1, #0] │ │ - b.n a012c │ │ + b.n a0138 │ │ movs r0, r0 │ │ - b.n a0c96 │ │ + b.n a0ca2 │ │ lsls r1, r5, #1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r6, #32 │ │ - b.n a0a94 │ │ + b.n a0aa0 │ │ movs r5, r0 │ │ - b.n a0942 │ │ + b.n a094e │ │ movs r0, #0 │ │ - b.n a0d46 │ │ + b.n a0d52 │ │ movs r3, #131 @ 0x83 │ │ @ instruction: 0xeb00a008 │ │ - b.n a0144 │ │ + b.n a0150 │ │ movs r0, r0 │ │ - b.n a0cb2 │ │ + b.n a0cbe │ │ movs r0, r0 │ │ - b.n a011e │ │ + b.n a012a │ │ lsls r6, r7, #3 │ │ subs r0, r0, r0 │ │ lsls r5, r2, #3 │ │ - b.n a09c8 │ │ + b.n a09d4 │ │ lsls r0, r0, #4 │ │ - b.n a072c │ │ + b.n a0738 │ │ strb r4, [r3, #0] │ │ - b.n a0146 │ │ + b.n a0152 │ │ movs r0, r5 │ │ - b.n a0b44 │ │ + b.n a0b50 │ │ movs r0, #48 @ 0x30 │ │ - b.n a0ac4 │ │ + b.n a0ad0 │ │ asrs r5, r0, #32 │ │ - b.n a0972 │ │ - str r1, [r3, #56] @ 0x38 │ │ + b.n a097e │ │ + str r2, [r3, #56] @ 0x38 │ │ add.w r0, r0, ip, asr #32 │ │ - b.n a01f4 │ │ + b.n a0200 │ │ str r0, [r5, #0] │ │ - b.n a0178 │ │ + b.n a0184 │ │ movs r0, r0 │ │ - b.n a0ce2 │ │ + b.n a0cee │ │ movs r4, r0 │ │ - b.n a01ce │ │ + b.n a01da │ │ lsls r5, r5, #1 │ │ subs r0, r0, r0 │ │ movs r1, r2 │ │ - b.n a0d02 │ │ + b.n a0d0e │ │ lsls r6, r7, #4 │ │ subs r2, #0 │ │ movs r0, r0 │ │ - b.n a0d02 │ │ + b.n a0d0e │ │ lsls r1, r5, #1 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n a099e │ │ - bfcsel 16, a0e5e , 1a, vs │ │ + b.n a09aa │ │ + bfcsel 16, a0e6a , 1a, vs │ │ movs r0, r0 │ │ - b.n a0d06 │ │ + b.n a0d12 │ │ movs r0, r0 │ │ - b.n a0172 │ │ + b.n a017e │ │ lsls r1, r5, #3 │ │ subs r0, r0, r0 │ │ lsls r5, r2, #3 │ │ - b.n a0a1c │ │ + b.n a0a28 │ │ str r0, [r0, #0] │ │ - b.n a0db6 │ │ + b.n a0dc2 │ │ lsls r0, r0, #4 │ │ - b.n a0784 │ │ + b.n a0790 │ │ strb r4, [r3, #0] │ │ - b.n a019e │ │ + b.n a01aa │ │ lsls r2, r7, #2 │ │ - b.n a0a30 │ │ + b.n a0a3c │ │ movs r0, r4 │ │ - b.n a0ca6 │ │ + b.n a0cb2 │ │ movs r7, r0 │ │ lsls r0, r4, #6 │ │ asrs r4, r6, #6 │ │ lsls r0, r6, #7 │ │ str r1, [r0, #0] │ │ lsls r0, r0, #2 │ │ lsls r2, r3, #1 │ │ and.w r0, r0, r8, ror #2 │ │ - b.n a0a48 │ │ + b.n a0a54 │ │ strh r1, [r3, #4] │ │ - b.n a06de │ │ + b.n a06ea │ │ asrs r4, r2, #32 │ │ - b.n a01cc │ │ + b.n a01d8 │ │ movs r0, r6 │ │ - b.n a01c0 │ │ + b.n a01cc │ │ movs r0, r6 │ │ - b.n a0b40 │ │ + b.n a0b4c │ │ movs r0, #0 │ │ - b.n a01d0 │ │ + b.n a01dc │ │ asrs r0, r6, #32 │ │ - b.n a0bcc │ │ + b.n a0bd8 │ │ vrhadd.u d14, d2, d31 │ │ movs r0, r0 │ │ - b.n a0d5a │ │ + b.n a0d66 │ │ movs r6, r3 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n a0da2 │ │ + b.n a0dae │ │ movs r4, r4 │ │ - bge.n a06c6 │ │ + bge.n a06d2 │ │ lsls r5, r2, #3 │ │ - b.n a0a74 │ │ + b.n a0a80 │ │ strh r0, [r1, #0] │ │ - b.n a0208 │ │ + b.n a0214 │ │ movs r1, r0 │ │ - b.n a0d72 │ │ + b.n a0d7e │ │ movs r4, r1 │ │ rev r0, r0 │ │ asrs r4, r7, #1 │ │ - b.n a0be4 │ │ + b.n a0bf0 │ │ movs r0, #0 │ │ - b.n a0e1e │ │ + b.n a0e2a │ │ adds r0, #0 │ │ - b.n a0a22 │ │ + b.n a0a2e │ │ strb r2, [r0, #2] │ │ - b.n a0768 │ │ + b.n a0774 │ │ str r2, [r6, #8] │ │ - b.n a090c │ │ + b.n a0918 │ │ strb r0, [r4, #1] │ │ - b.n a011c │ │ + b.n a0128 │ │ str r1, [r0, #0] │ │ - b.n a0bfe │ │ + b.n a0c0a │ │ strb r4, [r7, #2] │ │ - b.n a0aa4 │ │ + b.n a0ab0 │ │ lsls r7, r4, #2 │ │ - b.n a09a6 │ │ + b.n a09b2 │ │ @ instruction: 0xffbe3aff │ │ movs r0, #2 │ │ - b.n a0b86 │ │ + b.n a0b92 │ │ adds r0, #1 │ │ - b.n a0bac │ │ + b.n a0bb8 │ │ @ instruction: 0xfff51aff │ │ lsls r0, r0, #2 │ │ - b.n a0818 │ │ - add r7, pc, #752 @ (adr r7, a0a00 ) │ │ - b.n a0a92 │ │ + b.n a0824 │ │ + add r7, pc, #752 @ (adr r7, a0a0c ) │ │ + b.n a0a9e │ │ movs r0, r1 │ │ - b.n a024c │ │ + b.n a0258 │ │ movs r0, r2 │ │ - b.n a0dba │ │ + b.n a0dc6 │ │ lsls r3, r1, #4 │ │ ldr r2, [sp, #0] │ │ asrs r2, r6, #30 │ │ - b.n a0d32 │ │ + b.n a0d3e │ │ movs r4, r0 │ │ - b.n a02d0 │ │ + b.n a02dc │ │ subs r7, r7, #7 │ │ - b.n a0dc8 │ │ + b.n a0dd4 │ │ asrs r0, r0, #32 │ │ - b.n a0236 │ │ + b.n a0242 │ │ asrs r0, r3, #32 │ │ - b.n a0e72 │ │ + b.n a0e7e │ │ lsls r1, r2, #4 │ │ - b.n a06f4 │ │ + b.n a0700 │ │ lsls r5, r6, #2 │ │ and.w r0, r0, r5, lsr #3 │ │ - b.n a0ae8 │ │ + b.n a0af4 │ │ asrs r1, r0, #32 │ │ - b.n a0e82 │ │ + b.n a0e8e │ │ asrs r4, r0, #32 │ │ - b.n a02ce │ │ + b.n a02da │ │ lsls r0, r0, #2 │ │ - b.n a0854 │ │ + b.n a0860 │ │ str r7, [sp, #752] @ 0x2f0 │ │ - b.n a0ace │ │ + b.n a0ada │ │ strh r0, [r1, #0] │ │ - b.n a028c │ │ - add r0, pc, #32 @ (adr r0, a0774 ) │ │ - b.n a028c │ │ + b.n a0298 │ │ + add r0, pc, #32 @ (adr r0, a0780 ) │ │ + b.n a0298 │ │ movs r1, r5 │ │ and.w r0, r0, r5, lsr #3 │ │ - b.n a0b08 │ │ + b.n a0b14 │ │ lsls r0, r0, #2 │ │ - b.n a086c │ │ + b.n a0878 │ │ lsls r4, r7, #30 │ │ - b.n a0b06 │ │ + b.n a0b12 │ │ movs r0, r0 │ │ - b.n a0e0a │ │ + b.n a0e16 │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ - add r0, pc, #32 @ (adr r0, a0790 ) │ │ - b.n a02a8 │ │ + add r0, pc, #32 @ (adr r0, a079c ) │ │ + b.n a02b4 │ │ movs r0, r0 │ │ - b.n a0a28 │ │ + b.n a0a34 │ │ movs r7, r1 │ │ ldr r2, [sp, #0] │ │ asrs r2, r7, #2 │ │ - b.n a0b2c │ │ + b.n a0b38 │ │ movs r0, r4 │ │ - b.n a0da4 │ │ + b.n a0db0 │ │ movs r1, r2 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #2 │ │ - b.n a0898 │ │ + b.n a08a4 │ │ lsls r4, r6, #6 │ │ - b.n a0b2e │ │ + b.n a0b3a │ │ str r0, [r0, #0] │ │ - b.n a08a2 │ │ + b.n a08ae │ │ lsls r6, r6, #2 │ │ - b.n a0b42 │ │ + b.n a0b4e │ │ movs r4, r6 │ │ - b.n a02b4 │ │ + b.n a02c0 │ │ movs r0, r1 │ │ - b.n a0caa │ │ + b.n a0cb6 │ │ movs r4, r1 │ │ @ instruction: 0xea00a008 │ │ - b.n a02dc │ │ + b.n a02e8 │ │ movs r0, r0 │ │ - b.n a0eea │ │ + b.n a0ef6 │ │ lsls r4, r7, #30 │ │ - b.n a0b38 │ │ + b.n a0b44 │ │ movs r0, r2 │ │ - b.n a0e66 │ │ + b.n a0e72 │ │ movs r2, r2 │ │ ldrh r0, [r0, #16] │ │ lsls r4, r4, #3 │ │ @ instruction: 0xea008008 │ │ - b.n a02f8 │ │ + b.n a0304 │ │ @ instruction: 0xff98eaff │ │ strh r0, [r1, #0] │ │ - b.n a0300 │ │ - add r0, pc, #32 @ (adr r0, a07e8 ) │ │ - b.n a0300 │ │ + b.n a030c │ │ + add r0, pc, #32 @ (adr r0, a07f4 ) │ │ + b.n a030c │ │ @ instruction: 0xff95eaff │ │ asrs r0, r7, #2 │ │ - b.n a0b80 │ │ + b.n a0b8c │ │ strh r1, [r2, #4] │ │ - b.n a0816 │ │ + b.n a0822 │ │ asrs r4, r2, #32 │ │ - b.n a0304 │ │ + b.n a0310 │ │ movs r0, r6 │ │ - b.n a02f8 │ │ + b.n a0304 │ │ movs r0, r6 │ │ - b.n a0c78 │ │ + b.n a0c84 │ │ movs r0, #0 │ │ - b.n a0308 │ │ + b.n a0314 │ │ asrs r0, r6, #32 │ │ - b.n a0d04 │ │ + b.n a0d10 │ │ vrhadd.u d14, d2, d31 │ │ strh r0, [r1, #0] │ │ - b.n a032c │ │ + b.n a0338 │ │ movs r0, r0 │ │ - b.n a0e96 │ │ + b.n a0ea2 │ │ @ instruction: 0xff8a1aff │ │ movs r1, r0 │ │ - b.n a0f3e │ │ + b.n a0f4a │ │ movs r4, r0 │ │ - b.n a038a │ │ + b.n a0396 │ │ str r0, [sp, #744] @ 0x2e8 │ │ - b.n a0bb4 │ │ + b.n a0bc0 │ │ movs r6, r0 │ │ - b.n a03b4 │ │ + b.n a03c0 │ │ movs r1, r1 │ │ - b.n a084e │ │ + b.n a085a │ │ movs r7, r4 │ │ - b.n a0e32 │ │ + b.n a0e3e │ │ lsls r4, r4, #2 │ │ subs r0, r0, r0 │ │ movs r0, r4 │ │ - b.n a0e4c │ │ + b.n a0e58 │ │ movs r2, r4 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n a03ce │ │ + b.n a03da │ │ movs r4, r0 │ │ - b.n a0e46 │ │ + b.n a0e52 │ │ movs r0, r5 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n a0ede │ │ + b.n a0eea │ │ lsls r5, r5, #1 │ │ lsrs r0, r0, #8 │ │ movs r3, r0 │ │ - b.n a0eea │ │ + b.n a0ef6 │ │ movs r7, r7 │ │ ldrh r0, [r0, #16] │ │ asrs r4, r2, #32 │ │ - b.n a0368 │ │ + b.n a0374 │ │ movs r0, #4 │ │ - b.n a0372 │ │ + b.n a037e │ │ adds r0, #16 │ │ - b.n a0368 │ │ + b.n a0374 │ │ movs r3, r0 │ │ - b.n a0aee │ │ + b.n a0afa │ │ vpmin.u32 , q11, │ │ adds r0, #20 │ │ - b.n a0374 │ │ + b.n a0380 │ │ movs r3, r0 │ │ - b.n a0afa │ │ + b.n a0b06 │ │ vpmin.u32 q4, , │ │ movs r0, #208 @ 0xd0 │ │ - b.n a0bee │ │ + b.n a0bfa │ │ strb r0, [r2, #0] │ │ - b.n a038c │ │ + b.n a0398 │ │ adds r0, #36 @ 0x24 │ │ - b.n a0380 │ │ + b.n a038c │ │ movs r0, #32 │ │ - b.n a0384 │ │ + b.n a0390 │ │ strb r0, [r6, #2] │ │ - b.n a0c1c │ │ + b.n a0c28 │ │ movs r0, r4 │ │ - b.n a0ea0 │ │ + b.n a0eac │ │ lsls r3, r5, #1 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n a0f20 │ │ + b.n a0f2c │ │ lsls r7, r4, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, r1 │ │ - b.n a0f28 │ │ + b.n a0f34 │ │ vpmin.u16 , q12, │ │ movs r7, r0 │ │ - b.n a0eae │ │ + b.n a0eba │ │ lsls r5, r4, #1 │ │ lsrs r0, r0, #8 │ │ adds r0, #0 │ │ - b.n a03b6 │ │ + b.n a03c2 │ │ strb r0, [r3, #0] │ │ - b.n a0db0 │ │ + b.n a0dbc │ │ movs r0, #4 │ │ - b.n a03be │ │ + b.n a03ca │ │ strb r0, [r4, #0] │ │ - b.n a03b8 │ │ + b.n a03c4 │ │ adds r0, #24 │ │ - b.n a03bc │ │ + b.n a03c8 │ │ movs r0, #28 │ │ - b.n a03c0 │ │ + b.n a03cc │ │ lsls r6, r3, #1 │ │ and.w r0, r0, r0, lsr #32 │ │ - b.n a0f62 │ │ + b.n a0f6e │ │ lsls r3, r2, #1 │ │ subs r2, #0 │ │ lsls r5, r2, #3 │ │ - b.n a0c60 │ │ + b.n a0c6c │ │ asrs r0, r7, #2 │ │ - b.n a0c68 │ │ + b.n a0c74 │ │ lsls r0, r0, #2 │ │ - b.n a09c8 │ │ + b.n a09d4 │ │ lsls r4, r7, #30 │ │ - b.n a0c62 │ │ + b.n a0c6e │ │ strb r1, [r2, #2] │ │ - b.n a0906 │ │ + b.n a0912 │ │ movs r4, r2 │ │ - b.n a0dca │ │ + b.n a0dd6 │ │ lsls r2, r1, #1 │ │ and.w r0, r0, r5 │ │ - b.n a0c12 │ │ + b.n a0c1e │ │ asrs r6, r0, #32 │ │ - b.n a0c16 │ │ + b.n a0c22 │ │ movs r0, #7 │ │ - b.n a0c1a │ │ - strb r4, [r1, r5] │ │ + b.n a0c26 │ │ + strb r5, [r1, r5] │ │ add.w r0, r0, r0 │ │ - b.n a0f82 │ │ + b.n a0f8e │ │ movs r0, r0 │ │ - b.n a03ee │ │ + b.n a03fa │ │ lsls r2, r1, #1 │ │ subs r0, r0, r0 │ │ movs r7, r1 │ │ - b.n a0fa2 │ │ + b.n a0fae │ │ movs r5, r4 │ │ subs r2, #0 │ │ movs r4, r0 │ │ - b.n a04a2 │ │ + b.n a04ae │ │ movs r2, r0 │ │ - b.n a0f1a │ │ + b.n a0f26 │ │ movs r4, r6 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n a0fb2 │ │ + b.n a0fbe │ │ movs r0, r7 │ │ lsrs r0, r0, #8 │ │ asrs r0, r3, #32 │ │ - b.n a0434 │ │ + b.n a0440 │ │ movs r4, r3 │ │ - b.n a0430 │ │ + b.n a043c │ │ movs r7, #188 @ 0xbc │ │ - b.n a0cb4 │ │ + b.n a0cc0 │ │ adds r0, #20 │ │ - b.n a0e16 │ │ + b.n a0e22 │ │ asrs r2, r7, #2 │ │ - b.n a0cba │ │ + b.n a0cc6 │ │ movs r0, r4 │ │ - b.n a0f40 │ │ + b.n a0f4c │ │ lsls r3, r3, #1 │ │ subs r0, r0, r0 │ │ lsls r2, r0, #2 │ │ - b.n a0a26 │ │ + b.n a0a32 │ │ lsls r4, r6, #6 │ │ - b.n a0cca │ │ + b.n a0cd6 │ │ movs r0, r0 │ │ - b.n a0a34 │ │ + b.n a0a40 │ │ asrs r6, r6, #2 │ │ - b.n a0cd2 │ │ + b.n a0cde │ │ movs r0, r1 │ │ - b.n a0e36 │ │ + b.n a0e42 │ │ lsls r7, r2, #1 │ │ and.w r0, r0, r5, lsr #3 │ │ - b.n a0ce8 │ │ + b.n a0cf4 │ │ asrs r6, r6, #2 │ │ - b.n a0cee │ │ + b.n a0cfa │ │ movs r0, #0 │ │ - b.n a0472 │ │ + b.n a047e │ │ lsls r0, r0, #4 │ │ - b.n a0a54 │ │ + b.n a0a60 │ │ asrs r1, r0, #32 │ │ - b.n a0a5a │ │ + b.n a0a66 │ │ movs r0, #4 │ │ - b.n a0462 │ │ + b.n a046e │ │ asrs r0, r1, #32 │ │ - b.n a0e58 │ │ + b.n a0e64 │ │ movs r4, r3 │ │ - b.n a047a │ │ + b.n a0486 │ │ asrs r0, r0, #32 │ │ - b.n a046e │ │ + b.n a047a │ │ asrs r4, r0, #32 │ │ - b.n a050e │ │ + b.n a051a │ │ movs r1, r0 │ │ - b.n a1008 │ │ + b.n a1014 │ │ movs r7, r3 │ │ subs r0, r0, r0 │ │ adds r0, #4 │ │ - b.n a048e │ │ + b.n a049a │ │ asrs r6, r0, #32 │ │ - b.n a0cb2 │ │ + b.n a0cbe │ │ movs r0, #0 │ │ - b.n a0496 │ │ + b.n a04a2 │ │ movs r5, r0 │ │ - b.n a0cba │ │ + b.n a0cc6 │ │ movs r0, #240 @ 0xf0 │ │ - b.n a0d18 │ │ + b.n a0d24 │ │ movs r0, #8 │ │ - b.n a0cc2 │ │ - strh r2, [r1, #20] │ │ + b.n a0cce │ │ + strh r3, [r1, #20] │ │ add.w r0, r0, r4, lsr #32 │ │ and.w r0, r0, r8, lsr #4 │ │ - b.n a04b8 │ │ + b.n a04c4 │ │ movs r1, r2 │ │ - b.n a10d2 │ │ + b.n a10de │ │ movs r0, r0 │ │ - b.n a04b0 │ │ + b.n a04bc │ │ movs r0, r4 │ │ - b.n a0eb4 │ │ + b.n a0ec0 │ │ movs r0, #8 │ │ - b.n a0cde │ │ + b.n a0cea │ │ adds r0, #0 │ │ - b.n a10e2 │ │ + b.n a10ee │ │ mcr2 11, 5, lr, cr3, cr15, {7} @ │ │ movs r0, r4 │ │ - b.n a04e4 │ │ + b.n a04f0 │ │ asrs r4, r4, #32 │ │ - b.n a04e8 │ │ + b.n a04f4 │ │ movs r0, r0 │ │ - b.n a1052 │ │ + b.n a105e │ │ lsls r0, r6, #3 │ │ - b.n a0d3e │ │ + b.n a0d4a │ │ lsls r0, r4, #1 │ │ subs r0, r0, r0 │ │ movs r2, r0 │ │ - b.n a1072 │ │ + b.n a107e │ │ movs r7, r1 │ │ subs r0, r0, r0 │ │ lsls r1, r6, #1 │ │ - b.n a07a4 │ │ + b.n a07b0 │ │ movs r0, r0 │ │ - b.n a106a │ │ + b.n a1076 │ │ lsls r7, r3, #1 │ │ lsrs r0, r0, #8 │ │ movs r3, r1 │ │ and.w r0, r0, r8, lsr #32 │ │ - b.n a0500 │ │ + b.n a050c │ │ asrs r0, r1, #32 │ │ - b.n a0d1a │ │ - strh r1, [r1, #10] │ │ + b.n a0d26 │ │ + strh r2, [r1, #10] │ │ add.w r0, r0, r0 │ │ - b.n a1082 │ │ + b.n a108e │ │ movs r0, r0 │ │ - b.n a04ee │ │ + b.n a04fa │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n a10a2 │ │ + b.n a10ae │ │ movs r3, r0 │ │ subs r2, #0 │ │ asrs r6, r6, #2 │ │ - b.n a0da2 │ │ + b.n a0dae │ │ movs r0, r1 │ │ - b.n a0f06 │ │ + b.n a0f12 │ │ movs r0, #12 │ │ - b.n a0538 │ │ + b.n a0544 │ │ lsls r0, r6, #3 │ │ - b.n a0d86 │ │ + b.n a0d92 │ │ asrs r4, r0, #32 │ │ - b.n a05b0 │ │ + b.n a05bc │ │ movs r0, r0 │ │ - b.n a114a │ │ + b.n a1156 │ │ movs r0, r0 │ │ - b.n a0516 │ │ + b.n a0522 │ │ movs r3, r0 │ │ - b.n a0e14 │ │ + b.n a0e20 │ │ movs r4, r0 │ │ - b.n a05a0 │ │ - beq.n a0a50 │ │ - b.n a0eb0 │ │ + b.n a05ac │ │ + beq.n a0a5c │ │ + b.n a0ebc │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r1} │ │ - b.n a1046 │ │ + b.n a1052 │ │ lsls r7, r5, #1 │ │ subs r0, r0, r0 │ │ movs r0, #213 @ 0xd5 │ │ - b.n a0dd4 │ │ + b.n a0de0 │ │ movs r1, r0 │ │ - b.n a10ce │ │ + b.n a10da │ │ adds r0, #182 @ 0xb6 │ │ - b.n a0dde │ │ + b.n a0dea │ │ strb r0, [r0, #0] │ │ - b.n a0562 │ │ + b.n a056e │ │ movs r1, #2 │ │ - b.n a0b44 │ │ + b.n a0b50 │ │ adds r0, #3 │ │ - b.n a0b4a │ │ + b.n a0b56 │ │ adds r0, #8 │ │ - b.n a0f48 │ │ + b.n a0f54 │ │ strb r4, [r2, #0] │ │ - b.n a0560 │ │ + b.n a056c │ │ movs r0, #28 │ │ - b.n a056e │ │ + b.n a057a │ │ adds r0, #16 │ │ - b.n a0568 │ │ + b.n a0574 │ │ lsls r6, r1, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n a1196 │ │ + b.n a11a2 │ │ movs r0, r0 │ │ - b.n a0562 │ │ + b.n a056e │ │ movs r0, #12 │ │ - b.n a0580 │ │ + b.n a058c │ │ movs r0, r4 │ │ - b.n a0f7c │ │ + b.n a0f88 │ │ asrs r0, r2, #32 │ │ - b.n a0f80 │ │ + b.n a0f8c │ │ vrhadd.u d14, d2, d31 │ │ movs r0, r0 │ │ - b.n a110e │ │ + b.n a111a │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ movs r3, r0 │ │ - b.n a112a │ │ + b.n a1136 │ │ movs r4, r6 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n a111e │ │ + b.n a112a │ │ movs r5, r7 │ │ add r2, sp, #0 │ │ asrs r4, r2, #32 │ │ - b.n a05c0 │ │ + b.n a05cc │ │ movs r0, r2 │ │ - b.n a05c4 │ │ + b.n a05d0 │ │ lsls r0, r6, #3 │ │ - b.n a0e1e │ │ + b.n a0e2a │ │ @ instruction: 0xffdbeaff │ │ asrs r0, r7, #2 │ │ - b.n a0e36 │ │ + b.n a0e42 │ │ adds r2, #145 @ 0x91 │ │ - b.n a0ada │ │ + b.n a0ae6 │ │ lsls r0, r6, #3 │ │ - b.n a0e2e │ │ + b.n a0e3a │ │ movs r0, r2 │ │ - b.n a1156 │ │ + b.n a1162 │ │ @ instruction: 0xffd22aff │ │ @ instruction: 0xffd5eaff │ │ lsls r0, r1, #5 │ │ - b.n a05ec │ │ + b.n a05f8 │ │ movs r0, r0 │ │ - b.n a0bd0 │ │ + b.n a0bdc │ │ lsls r2, r3, #1 │ │ - b.n a0656 │ │ + b.n a0662 │ │ movs r0, r0 │ │ - b.n a115a │ │ + b.n a1166 │ │ movs r7, r7 │ │ subs r0, r0, r0 │ │ lsls r2, r6, #30 │ │ - b.n a10d2 │ │ + b.n a10de │ │ lsrs r7, r7, #31 │ │ - b.n a1164 │ │ + b.n a1170 │ │ movs r2, r0 │ │ - b.n a0fca │ │ + b.n a0fd6 │ │ movs r0, r0 │ │ - b.n a05d6 │ │ - beq.n a0b08 │ │ - b.n a0f68 │ │ + b.n a05e2 │ │ + beq.n a0b14 │ │ + b.n a0f74 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r2, r4, r6, r7} │ │ - b.n a0e84 │ │ + b.n a0e90 │ │ asrs r1, r0, #32 │ │ - b.n a121e │ │ + b.n a122a │ │ asrs r4, r0, #32 │ │ - b.n a066a │ │ + b.n a0676 │ │ asrs r0, r0, #32 │ │ - b.n a1226 │ │ + b.n a1232 │ │ lsls r0, r0, #2 │ │ - b.n a0bf4 │ │ + b.n a0c00 │ │ asrs r4, r7, #30 │ │ - b.n a0e6e │ │ + b.n a0e7a │ │ vpmin.u16 q7, q11, │ │ adds r0, #0 │ │ - b.n a0696 │ │ - add r0, pc, #32 @ (adr r0, a0b18 ) │ │ - b.n a0e3a │ │ + b.n a06a2 │ │ + add r0, pc, #32 @ (adr r0, a0b24 ) │ │ + b.n a0e46 │ │ stmia r0!, {r0, r1, r3} │ │ - b.n a1000 │ │ - b.n a0b14 │ │ - b.n a1004 │ │ + b.n a100c │ │ + b.n a0b20 │ │ + b.n a1010 │ │ strh r1, [r1, #0] │ │ - b.n a1008 │ │ + b.n a1014 │ │ str r0, [r1, #0] │ │ - b.n a100c │ │ + b.n a1018 │ │ adds r0, #40 @ 0x28 │ │ - b.n a05a4 │ │ + b.n a05b0 │ │ asrs r3, r0, #32 │ │ - b.n a1252 │ │ + b.n a125e │ │ adds r0, #2 │ │ - b.n a1256 │ │ + b.n a1262 │ │ strb r1, [r0, #0] │ │ - b.n a125a │ │ + b.n a1266 │ │ strb r7, [r0, #0] │ │ - b.n a0abe │ │ + b.n a0aca │ │ strb r0, [r0, #0] │ │ - b.n a06b2 │ │ + b.n a06be │ │ strh r2, [r1, #0] │ │ - b.n a0e66 │ │ + b.n a0e72 │ │ adds r0, #3 │ │ - b.n a0aca │ │ + b.n a0ad6 │ │ adds r0, #0 │ │ - b.n a06ca │ │ + b.n a06d6 │ │ asrs r1, r0, #32 │ │ - b.n a0ad2 │ │ + b.n a0ade │ │ str r0, [r6, #0] │ │ - b.n a054c │ │ + b.n a0558 │ │ asrs r0, r0, #32 │ │ - b.n a06d2 │ │ + b.n a06de │ │ mrc2 10, 3, lr, cr2, cr15, {7} @ │ │ asrs r2, r6, #30 │ │ - b.n a1152 │ │ + b.n a115e │ │ subs r7, r7, #7 │ │ - b.n a11e4 │ │ + b.n a11f0 │ │ movs r1, r0 │ │ - b.n a0dea │ │ + b.n a0df6 │ │ @ instruction: 0xffb11aff │ │ movs r0, r3 │ │ - b.n a067c │ │ + b.n a0688 │ │ asrs r4, r0, #32 │ │ - b.n a0700 │ │ + b.n a070c │ │ movs r0, r0 │ │ - b.n a11fa │ │ + b.n a1206 │ │ asrs r0, r0, #2 │ │ - b.n a1260 │ │ + b.n a126c │ │ asrs r4, r0, #32 │ │ - b.n a06ec │ │ + b.n a06f8 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ asrs r5, r2, #3 │ │ - b.n a0f0a │ │ + b.n a0f16 │ │ movs r0, r0 │ │ - b.n a1210 │ │ + b.n a121c │ │ asrs r4, r0, #32 │ │ strb r0, [r2, r7] │ │ asrs r0, r0, #2 │ │ strh r1, [r0, r6] │ │ asrs r4, r0, #32 │ │ strb r0, [r0, r7] │ │ lsls r2, r6, #30 │ │ - b.n a118e │ │ + b.n a119a │ │ lsrs r7, r7, #31 │ │ - b.n a1220 │ │ + b.n a122c │ │ movs r0, r0 │ │ - b.n a068e │ │ - beq.n a0bc0 │ │ - b.n a1020 │ │ + b.n a069a │ │ + beq.n a0bcc │ │ + b.n a102c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, ip} │ │ - b.n a06b6 │ │ + b.n a06c2 │ │ movs r0, r0 │ │ - b.n a06ba │ │ + b.n a06c6 │ │ movs r0, #16 │ │ - b.n a10b4 │ │ + b.n a10c0 │ │ lsls r0, r6, #3 │ │ - b.n a0f38 │ │ + b.n a0f44 │ │ movs r5, r0 │ │ - b.n a0ee2 │ │ + b.n a0eee │ │ asrs r6, r0, #32 │ │ - b.n a0ee6 │ │ - strh r1, [r0, #16] │ │ + b.n a0ef2 │ │ + strh r2, [r0, #16] │ │ add.w r0, r0, r0 │ │ - b.n a124e │ │ + b.n a125a │ │ movs r0, r0 │ │ - b.n a06ba │ │ + b.n a06c6 │ │ @ instruction: 0xff971aff │ │ asrs r4, r2, #32 │ │ - b.n a06e4 │ │ + b.n a06f0 │ │ @ instruction: 0xffa6eaff │ │ asrs r0, r7, #32 │ │ - b.n a0700 │ │ + b.n a070c │ │ movs r1, r0 │ │ - b.n a1306 │ │ + b.n a1312 │ │ strh r0, [r2, #0] │ │ - b.n a06f8 │ │ + b.n a0704 │ │ movs r7, #88 @ 0x58 │ │ - b.n a11ce │ │ + b.n a11da │ │ adds r0, #44 @ 0x2c │ │ - b.n a0710 │ │ + b.n a071c │ │ asrs r1, r0, #32 │ │ - b.n a0cf4 │ │ + b.n a0d00 │ │ strh r0, [r6, #6] │ │ - b.n a0f74 │ │ + b.n a0f80 │ │ adds r0, #3 │ │ - b.n a0cfc │ │ + b.n a0d08 │ │ @ instruction: 0xe991ebff │ │ @ instruction: 0xffb5eaff │ │ movs r0, #0 │ │ - b.n a070e │ │ + b.n a071a │ │ adds r0, #24 │ │ - b.n a1108 │ │ + b.n a1114 │ │ adds r0, #32 │ │ - b.n a070c │ │ + b.n a0718 │ │ movs r0, #24 │ │ - b.n a0710 │ │ + b.n a071c │ │ @ instruction: 0xff8aeaff │ │ - ble.n a0b34 │ │ + ble.n a0b68 │ │ movs r3, r0 │ │ - stmia r3!, {r0, r2, r3} │ │ - vqrshrn.u64 d23, , #10 │ │ + stmia r3!, {r2, r7} │ │ + @ instruction: 0xfff67997 │ │ vcvt.f16.u16 d20, d0, #10 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n a1128 │ │ - beq.n a0c30 │ │ - b.n a10ac │ │ + b.n a1134 │ │ + beq.n a0c3c │ │ + b.n a10b8 │ │ ands r0, r0 │ │ - b.n a0f56 │ │ - svc 81 @ 0x51 │ │ + b.n a0f62 │ │ + svc 82 @ 0x52 │ │ add.w r8, r0, r1 │ │ - b.n a12be │ │ + b.n a12ca │ │ movs r3, r0 │ │ add r2, sp, #0 │ │ movs r4, r0 │ │ - b.n a0f66 │ │ - beq.n a0c38 │ │ - b.n a10c0 │ │ - ldr r4, [pc, #64] @ (a0c6c ) │ │ - ldmia.w sp!, {r0, r1, r2, r5, r7, r8, r9, sl, fp, ip, lr, pc} │ │ + b.n a0f72 │ │ + beq.n a0c44 │ │ + b.n a10cc │ │ + ldr r4, [pc, #64] @ (a0c78 ) │ │ + ldmia.w sp!, {r3, r5, r7, r8, r9, sl, fp, ip, lr, pc} │ │ and.w r0, r0, r0, ror #4 │ │ - b.n a0774 │ │ + b.n a0780 │ │ movs r0, #38 @ 0x26 │ │ - b.n a137a │ │ + b.n a1386 │ │ adds r0, #44 @ 0x2c │ │ - b.n a077c │ │ + b.n a0788 │ │ asrs r1, r0, #32 │ │ - b.n a0d60 │ │ + b.n a0d6c │ │ movs r0, #0 │ │ - b.n a0760 │ │ + b.n a076c │ │ adds r0, #3 │ │ - b.n a0d68 │ │ + b.n a0d74 │ │ movs r4, r0 │ │ - b.n a0768 │ │ + b.n a0774 │ │ movs r0, r1 │ │ - b.n a076c │ │ + b.n a0778 │ │ movs r0, r0 │ │ - b.n a1396 │ │ + b.n a13a2 │ │ movs r2, #241 @ 0xf1 │ │ - b.n a125a │ │ + b.n a1266 │ │ ldrd lr, fp, [r2, #-1020]! @ 0x3fc │ │ movs r6, r4 │ │ - b.n a13a2 │ │ - beq.n a0c74 │ │ - b.n a10fc │ │ + b.n a13ae │ │ + beq.n a0c80 │ │ + b.n a1108 │ │ ldrh r0, [r2, #32] │ │ - ldmia.w sp!, {r0, r1, r4, r6, r7, fp, ip, lr, pc} │ │ - @ instruction: 0xfff69c9b │ │ + ldmia.w sp!, {r0, r5, r7, r9, fp, ip, lr, pc} │ │ + vdup.16 d25, d7[1] │ │ vsra.u32 d19, d4, #10 │ │ - b.n a0796 │ │ + b.n a07a2 │ │ movs r0, #0 │ │ - b.n a13ba │ │ + b.n a13c6 │ │ movs r1, r0 │ │ - b.n a0f24 │ │ + b.n a0f30 │ │ movs r5, r5 │ │ ldr r2, [sp, #0] │ │ - ldr r4, [pc, #64] @ (a0cc4 ) │ │ + ldr r4, [pc, #64] @ (a0cd0 ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n a11a4 │ │ + b.n a11b0 │ │ adds r0, #144 @ 0x90 │ │ - b.n a07ae │ │ + b.n a07ba │ │ stmia r1!, {r0} │ │ - b.n a0bb8 │ │ - bl 4fc792 │ │ + b.n a0bc4 │ │ + bl 4fc79e │ │ adds r0, #136 @ 0x88 │ │ - b.n a07ba │ │ + b.n a07c6 │ │ adds r2, #129 @ 0x81 │ │ - b.n a0da4 │ │ - b.n a0cd0 │ │ - b.n a07c8 │ │ + b.n a0db0 │ │ + b.n a0cdc │ │ + b.n a07d4 │ │ movs r0, r0 │ │ - b.n a1362 │ │ + b.n a136e │ │ movs r2, r4 │ │ lsrs r0, r0, #8 │ │ movs r0, #140 @ 0x8c │ │ - b.n a07ce │ │ + b.n a07da │ │ ands r0, r0 │ │ - b.n a13f2 │ │ + b.n a13fe │ │ ands r1, r0 │ │ - b.n a0c3a │ │ + b.n a0c46 │ │ movs r0, #136 @ 0x88 │ │ - b.n a07da │ │ + b.n a07e6 │ │ adds r0, #144 @ 0x90 │ │ - b.n a07de │ │ + b.n a07ea │ │ movs r2, #129 @ 0x81 │ │ - b.n a0dc6 │ │ + b.n a0dd2 │ │ ands r0, r3 │ │ - b.n a07ca │ │ + b.n a07d6 │ │ ands r4, r3 │ │ - b.n a07ce │ │ + b.n a07da │ │ movs r0, #1 │ │ - b.n a11e6 │ │ + b.n a11f2 │ │ movs r1, r0 │ │ - b.n a1376 │ │ - bl 4fc7d2 │ │ + b.n a1382 │ │ + bl 4fc7de │ │ movs r0, #1 │ │ str r3, [sp, #640] @ 0x280 │ │ movs r1, #1 │ │ - b.n a0be4 │ │ + b.n a0bf0 │ │ asrs r1, r0, #32 │ │ - b.n a11e4 │ │ - bl 4fc7e2 │ │ + b.n a11f0 │ │ + bl 4fc7ee │ │ adds r1, #20 │ │ - b.n a080a │ │ + b.n a0816 │ │ ands r0, r0 │ │ - b.n a080a │ │ + b.n a0816 │ │ movs r1, r0 │ │ - b.n a0f98 │ │ + b.n a0fa4 │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ asrs r1, r0, #32 │ │ - b.n a1180 │ │ + b.n a118c │ │ movs r2, r0 │ │ - b.n a13a0 │ │ + b.n a13ac │ │ asrs r2, r0, #32 │ │ movs r3, #160 @ 0xa0 │ │ movs r0, #1 │ │ - b.n a118c │ │ + b.n a1198 │ │ movs r3, r0 │ │ - b.n a13ae │ │ + b.n a13ba │ │ movs r6, r0 │ │ subs r2, #0 │ │ lsls r0, r1 │ │ - b.n a0832 │ │ + b.n a083e │ │ adds r2, #131 @ 0x83 │ │ - b.n a0e1e │ │ + b.n a0e2a │ │ adds r0, #40 @ 0x28 │ │ - b.n a0740 │ │ + b.n a074c │ │ movs r0, r0 │ │ - b.n a13c4 │ │ + b.n a13d0 │ │ adds r0, #2 │ │ - b.n a1062 │ │ + b.n a106e │ │ @ instruction: 0xfff60aff │ │ movs r0, r0 │ │ and.w r0, r0, r1, lsl #8 │ │ - b.n a106e │ │ + b.n a107a │ │ movs r1, #20 │ │ - b.n a0832 │ │ + b.n a083e │ │ movs r0, #14 │ │ - b.n a1076 │ │ - ldr r4, [pc, #64] @ (a0d78 ) │ │ + b.n a1082 │ │ + ldr r4, [pc, #64] @ (a0d84 ) │ │ ldmia.w sp!, {r1, ip} │ │ - b.n a107e │ │ + b.n a108a │ │ @ instruction: 0xffffeaff │ │ - ldr r7, [pc, #960] @ (a1104 ) │ │ + ldr r7, [pc, #960] @ (a1110 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n a1264 │ │ - beq.n a0d64 │ │ - b.n a11e8 │ │ + b.n a1270 │ │ + beq.n a0d70 │ │ + b.n a11f4 │ │ strh r0, [r0, #0] │ │ - b.n a1092 │ │ + b.n a109e │ │ lsls r0, r5, #5 │ │ - b.n a0894 │ │ + b.n a08a0 │ │ str r0, [sp, #4] │ │ - b.n a109a │ │ + b.n a10a6 │ │ asrs r4, r0, #32 │ │ - b.n a1278 │ │ + b.n a1284 │ │ movs r0, r0 │ │ - b.n a0e80 │ │ + b.n a0e8c │ │ movs r4, r5 │ │ - b.n a0886 │ │ - svc 57 @ 0x39 │ │ + b.n a0892 │ │ + svc 58 @ 0x3a │ │ @ instruction: 0xeb00ca00 │ │ - b.n a1386 │ │ + b.n a1392 │ │ movs r0, #0 │ │ - b.n a14b2 │ │ + b.n a14be │ │ ldmia r3, {r1, r3, r4, r7} │ │ - b.n a13fc │ │ + b.n a1408 │ │ movs r0, r0 │ │ - b.n a141a │ │ + b.n a1426 │ │ movs r4, r4 │ │ subs r0, r0, r0 │ │ movs r3, r0 │ │ @ instruction: 0xe99d3c90 │ │ - b.n a0e94 │ │ + b.n a0ea0 │ │ lsrs r0, r0, #31 │ │ - b.n a10ca │ │ + b.n a10d6 │ │ ldrb r0, [r2, #18] │ │ - b.n a0ddc │ │ + b.n a0de8 │ │ ands r1, r0 │ │ - b.n a0eb8 │ │ + b.n a0ec4 │ │ ldrsh r1, [r0, r7] │ │ - b.n a0ee4 │ │ + b.n a0ef0 │ │ strb r0, [r1, #0] │ │ - b.n a10da │ │ + b.n a10e6 │ │ adds r1, #0 │ │ - b.n a090c │ │ + b.n a0918 │ │ movs r0, r0 │ │ - b.n a1448 │ │ + b.n a1454 │ │ movs r0, r4 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, #0] │ │ - b.n a14ea │ │ + b.n a14f6 │ │ movs r4, r0 │ │ and.w r0, r0, r1, lsl #24 │ │ - b.n a12be │ │ + b.n a12ca │ │ strb r3, [r0, #0] │ │ - b.n a10f6 │ │ + b.n a1102 │ │ adds r0, #0 │ │ - b.n a08e8 │ │ + b.n a08f4 │ │ movs r0, r0 │ │ - b.n a1464 │ │ + b.n a1470 │ │ movs r4, r1 │ │ lsrs r0, r0, #8 │ │ lsls r0, r3, #3 │ │ - b.n a114c │ │ + b.n a1158 │ │ movs r0, r0 │ │ - b.n a0e72 │ │ + b.n a0e7e │ │ asrs r1, r0, #32 │ │ - b.n a0f58 │ │ + b.n a0f64 │ │ movs r4, r1 │ │ - b.n a0e72 │ │ + b.n a0e7e │ │ movs r0, r0 │ │ - b.n a1378 │ │ + b.n a1384 │ │ @ instruction: 0xfff43aff │ │ movs r0, r0 │ │ - b.n a0904 │ │ + b.n a0910 │ │ movs r0, r0 │ │ - b.n a08f0 │ │ + b.n a08fc │ │ movs r0, #0 │ │ - b.n a08ec │ │ + b.n a08f8 │ │ movs r0, #3 │ │ - b.n a112a │ │ + b.n a1136 │ │ adds r0, #0 │ │ - b.n a091c │ │ + b.n a0928 │ │ movs r0, r0 │ │ - b.n a1498 │ │ + b.n a14a4 │ │ @ instruction: 0xfff21aff │ │ - add r0, pc, #0 @ (adr r0, a0df8 ) │ │ - b.n a153a │ │ + add r0, pc, #0 @ (adr r0, a0e04 ) │ │ + b.n a1546 │ │ movs r2, r5 │ │ - b.n a14aa │ │ - add r0, pc, #4 @ (adr r0, a0e04 ) │ │ + b.n a14b6 │ │ + add r0, pc, #4 @ (adr r0, a0e10 ) │ │ strh r0, [r0, #24] │ │ str r2, [r0, #0] │ │ - b.n a1146 │ │ + b.n a1152 │ │ movs r0, r0 │ │ - b.n a14bc │ │ + b.n a14c8 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ and.w r0, r0, r0, lsl #16 │ │ - b.n a1556 │ │ + b.n a1562 │ │ str r0, [r0, r0] │ │ - b.n a155a │ │ + b.n a1566 │ │ strb r0, [r1, #0] │ │ - b.n a115e │ │ + b.n a116a │ │ adds r1, #0 │ │ - b.n a0990 │ │ + b.n a099c │ │ movs r0, r0 │ │ - b.n a14cc │ │ + b.n a14d8 │ │ @ instruction: 0xffde1aff │ │ - add r0, pc, #0 @ (adr r0, a0e2c ) │ │ - b.n a156e │ │ + add r0, pc, #0 @ (adr r0, a0e38 ) │ │ + b.n a157a │ │ str r2, [r0, #0] │ │ - b.n a1172 │ │ + b.n a117e │ │ movs r0, r0 │ │ - b.n a14e8 │ │ + b.n a14f4 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #9 │ │ - b.n a117e │ │ + b.n a118a │ │ movs r0, r0 │ │ - b.n a0966 │ │ + b.n a0972 │ │ lsrs r0, r7 │ │ - b.n a11ca │ │ + b.n a11d6 │ │ movs r0, r0 │ │ - b.n a14ea │ │ + b.n a14f6 │ │ movs r0, #0 │ │ - b.n a118e │ │ + b.n a119a │ │ @ instruction: 0xfffa1aff │ │ str r0, [sp, #0] │ │ - b.n a0964 │ │ + b.n a0970 │ │ lsrs r1, r2, #24 │ │ - b.n a136a │ │ - svc 32 │ │ + b.n a1376 │ │ + svc 33 @ 0x21 │ │ add.w r0, r0, r0 │ │ - b.n a1502 │ │ + b.n a150e │ │ movs r0, r2 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n a151e │ │ + b.n a152a │ │ movs r0, r0 │ │ lsrs r0, r0, #8 │ │ - udf #103 @ 0x67 │ │ + udf #104 @ 0x68 │ │ add.w r0, r0, r0 │ │ - b.n a1522 │ │ + b.n a152e │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ movs r6, r0 │ │ - b.n a11be │ │ + b.n a11ca │ │ ands r0, r0 │ │ - b.n a09a2 │ │ - udf #78 @ 0x4e │ │ + b.n a09ae │ │ + udf #79 @ 0x4f │ │ add.w r0, r0, r0 │ │ - b.n a1532 │ │ + b.n a153e │ │ movs r4, r0 │ │ - b.n a11ce │ │ + b.n a11da │ │ @ instruction: 0xfffa1aff │ │ movs r0, r0 │ │ - b.n a15d6 │ │ + b.n a15e2 │ │ movs r0, r0 │ │ - b.n a154c │ │ + b.n a1558 │ │ lsls r4, r0, #31 │ │ lsls r0, r1, #12 │ │ lsrs r7, r7, #31 │ │ lsls r7, r1, #13 │ │ - beq.n a0edc │ │ - b.n a133c │ │ + beq.n a0ee8 │ │ + b.n a1348 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r4} │ │ - b.n a09ec │ │ + b.n a09f8 │ │ movs r0, #168 @ 0xa8 │ │ - b.n a15f2 │ │ + b.n a15fe │ │ asrs r0, r2, #32 │ │ - b.n a09f4 │ │ + b.n a0a00 │ │ movs r0, r0 │ │ - b.n a0fd8 │ │ + b.n a0fe4 │ │ asrs r1, r0, #32 │ │ - b.n a0fdc │ │ - b.n a0e5a │ │ - @ instruction: 0xebffdaec │ │ + b.n a0fe8 │ │ + b.n a0e66 │ │ + @ instruction: 0xebffdb00 │ │ movs r3, r0 │ │ - ldmia r6, {r1, r2, r5, r6} │ │ - vqshlu.s32 , q7, #22 │ │ + ldmia r7!, {r1, r2, r3, r6} │ │ + vrintm.f16 d25, d9 │ │ @ instruction: 0xfff64bf0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n a13f0 │ │ - beq.n a0ee8 │ │ - b.n a1374 │ │ + b.n a13fc │ │ + beq.n a0ef4 │ │ + b.n a1380 │ │ movs r0, r0 │ │ - b.n a157e │ │ + b.n a158a │ │ lsls r7, r3, #1 │ │ lsrs r0, r0, #8 │ │ strb r0, [r0, #0] │ │ - b.n a1226 │ │ + b.n a1232 │ │ movs r0, r0 │ │ - b.n a0a0a │ │ + b.n a0a16 │ │ str r1, [r0, #0] │ │ - b.n a122e │ │ + b.n a123a │ │ subs r1, r6, r0 │ │ - b.n a14f8 │ │ + b.n a1504 │ │ asrs r5, r2, #15 │ │ - b.n a1578 │ │ + b.n a1584 │ │ movs r1, r0 │ │ - b.n a119a │ │ + b.n a11a6 │ │ lsls r2, r3, #1 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n a0a30 │ │ + b.n a0a3c │ │ movs r0, r2 │ │ - b.n a0a26 │ │ + b.n a0a32 │ │ movs r0, r0 │ │ - b.n a15aa │ │ + b.n a15b6 │ │ lsls r1, r3, #1 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n a0ac0 │ │ + b.n a0acc │ │ ands r3, r0 │ │ - b.n a1256 │ │ + b.n a1262 │ │ str r2, [r0, r0] │ │ - b.n a125a │ │ + b.n a1266 │ │ movs r3, r6 │ │ - b.n a153e │ │ + b.n a154a │ │ lsls r2, r3, #1 │ │ subs r0, r0, r0 │ │ movs r0, r1 │ │ - b.n a0a54 │ │ + b.n a0a60 │ │ movs r6, r0 │ │ - b.n a11ca │ │ + b.n a11d6 │ │ lsls r5, r0, #1 │ │ ldr r2, [sp, #0] │ │ lsls r0, r1, #1 │ │ - b.n a0a60 │ │ + b.n a0a6c │ │ asrs r6, r4, #10 │ │ - b.n a1276 │ │ + b.n a1282 │ │ movs r0, #1 │ │ - b.n a167a │ │ + b.n a1686 │ │ lsls r1, r0, #4 │ │ - b.n a0e5e │ │ + b.n a0e6a │ │ asrs r7, r3, #32 │ │ - b.n a134e │ │ + b.n a135a │ │ lsls r0, r6, #4 │ │ - b.n a116a │ │ + b.n a1176 │ │ movs r6, r7 │ │ lsrs r0, r0, #8 │ │ lsls r4, r1, #1 │ │ - b.n a0a7c │ │ + b.n a0a88 │ │ movs r6, r0 │ │ - b.n a1052 │ │ + b.n a105e │ │ lsls r0, r2, #3 │ │ - b.n a12f6 │ │ + b.n a1302 │ │ movs r1, r0 │ │ - b.n a163a │ │ + b.n a1646 │ │ movs r1, r7 │ │ ldmia r2!, {} │ │ asrs r0, r0, #1 │ │ - b.n a0a90 │ │ + b.n a0a9c │ │ asrs r0, r2, #2 │ │ - b.n a0a88 │ │ + b.n a0a94 │ │ asrs r6, r0, #4 │ │ - b.n a0e8c │ │ - bl 4fca6a │ │ + b.n a0e98 │ │ + bl 4fca76 │ │ movs r0, #80 @ 0x50 │ │ - b.n a0aa0 │ │ + b.n a0aac │ │ movs r1, #6 │ │ - b.n a0e9a │ │ + b.n a0ea6 │ │ movs r2, r0 │ │ - b.n a121c │ │ + b.n a1228 │ │ movs r1, r6 │ │ subs r0, r0, r0 │ │ lsls r0, r6, #1 │ │ - b.n a0d60 │ │ + b.n a0d6c │ │ movs r0, r2 │ │ - b.n a15a6 │ │ + b.n a15b2 │ │ movs r5, r4 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n a0b3c │ │ + b.n a0b48 │ │ movs r3, r6 │ │ - b.n a15b2 │ │ + b.n a15be │ │ lsls r4, r0, #1 │ │ subs r0, r0, r0 │ │ lsls r4, r1, #1 │ │ - b.n a0ac8 │ │ + b.n a0ad4 │ │ movs r6, r0 │ │ - b.n a0f3e │ │ + b.n a0f4a │ │ movs r2, r0 │ │ - b.n a15c2 │ │ + b.n a15ce │ │ lsls r7, r0, #1 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n a1654 │ │ + b.n a1660 │ │ lsls r7, r1, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, r6 │ │ - b.n a165a │ │ + b.n a1666 │ │ movs r0, r5 │ │ asrs r4, r2, #13 │ │ lsls r2, r2, #1 │ │ subs r0, r0, r0 │ │ asrs r6, r0, #2 │ │ - b.n a10ca │ │ + b.n a10d6 │ │ movs r4, #208 @ 0xd0 │ │ - b.n a1350 │ │ + b.n a135c │ │ movs r0, r1 │ │ - b.n a14d0 │ │ + b.n a14dc │ │ str r0, [sp, #0] │ │ - b.n a170a │ │ + b.n a1716 │ │ asrs r1, r0, #8 │ │ - b.n a10d4 │ │ + b.n a10e0 │ │ movs r0, r6 │ │ - b.n a167a │ │ + b.n a1686 │ │ movs r0, #8 │ │ - b.n a0afa │ │ + b.n a0b06 │ │ adds r0, #178 @ 0xb2 │ │ - b.n a137c │ │ + b.n a1388 │ │ movs r0, #240 @ 0xf0 │ │ - b.n a1368 │ │ + b.n a1374 │ │ movs r0, #12 │ │ - b.n a0b04 │ │ + b.n a0b10 │ │ adds r0, #16 │ │ - b.n a0b08 │ │ + b.n a0b14 │ │ movs r4, r1 │ │ stmia.w sp, {r0, r2, r3, sp} │ │ - b.n a132e │ │ + b.n a133a │ │ lsls r7, r3, #30 │ │ orn r0, r2, #524288 @ 0x80000 │ │ - b.n a1336 │ │ + b.n a1342 │ │ lsrs r0, r6, #8 │ │ mrs r0, CONTROL │ │ - b.n a0b20 │ │ + b.n a0b2c │ │ lsrs r5, r1, #11 │ │ orr.w r2, r2, #1664 @ 0x680 │ │ - b.n a1388 │ │ + b.n a1394 │ │ strh r0, [r6, #6] │ │ - b.n a138e │ │ + b.n a139a │ │ movs r2, #216 @ 0xd8 │ │ movs r1, #193 @ 0xc1 │ │ str r0, [r7, #28] │ │ - b.n a1392 │ │ + b.n a139e │ │ movs r2, #240 @ 0xf0 │ │ movs r1, #192 @ 0xc0 │ │ movs r1, r1 │ │ - b.n a135a │ │ - beq.n a104c │ │ - b.n a14b4 │ │ + b.n a1366 │ │ + beq.n a1058 │ │ + b.n a14c0 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r1, r6, r7, r8, r9, sl} │ │ - b.n a1636 │ │ + b.n a1642 │ │ lsrs r7, r7, #31 │ │ - b.n a16c8 │ │ + b.n a16d4 │ │ str r0, [sp, #8] │ │ - b.n a152e │ │ + b.n a153a │ │ asrs r4, r5, #3 │ │ - b.n a0b70 │ │ + b.n a0b7c │ │ movs r1, r1 │ │ - b.n a1376 │ │ + b.n a1382 │ │ movs r0, #238 @ 0xee │ │ - b.n a177a │ │ + b.n a1786 │ │ asrs r1, r0, #32 │ │ - b.n a115c │ │ - add fp, r3 │ │ + b.n a1168 │ │ + add ip, r3 │ │ @ instruction: 0xeb00fff3 │ │ @ instruction: 0xeaff0007 │ │ - b.n a138a │ │ + b.n a1396 │ │ asrs r6, r0, #32 │ │ - b.n a138e │ │ - ldrb r6, [r6, #19] │ │ + b.n a139a │ │ + ldrb r7, [r6, #19] │ │ add.w r0, r0, r0 │ │ - b.n a16f6 │ │ + b.n a1702 │ │ @ instruction: 0xffcb0aff │ │ str r0, [sp, #0] │ │ - b.n a139e │ │ + b.n a13aa │ │ @ instruction: 0xfff2eaff │ │ str r0, [sp, #88] @ 0x58 │ │ - b.n a17a6 │ │ + b.n a17b2 │ │ movs r3, r0 │ │ @ instruction: 0xea00992c │ │ - b.n a167e │ │ + b.n a168a │ │ ldr r7, [sp, #1020] @ 0x3fc │ │ - b.n a1710 │ │ + b.n a171c │ │ movs r0, r0 │ │ @ instruction: 0xea009001 │ │ - b.n a17ba │ │ + b.n a17c6 │ │ asrs r4, r3, #2 │ │ - b.n a0bbc │ │ + b.n a0bc8 │ │ movs r1, r1 │ │ - b.n a13c2 │ │ + b.n a13ce │ │ movs r0, #234 @ 0xea │ │ - b.n a17c6 │ │ + b.n a17d2 │ │ asrs r1, r0, #32 │ │ - b.n a11a8 │ │ + b.n a11b4 │ │ @ instruction: 0xffebeaff │ │ movs r7, r0 │ │ - b.n a13d2 │ │ + b.n a13de │ │ asrs r3, r6, #32 │ │ - b.n a17d6 │ │ - add sl, r6 │ │ + b.n a17e2 │ │ + add fp, r6 │ │ add.w r0, r0, r0 │ │ - b.n a173e │ │ + b.n a174a │ │ @ instruction: 0xff9f0aff │ │ str r0, [sp, #0] │ │ - b.n a13e6 │ │ + b.n a13f2 │ │ @ instruction: 0xfff3eaff │ │ asrs r4, r6, #1 │ │ - b.n a0bec │ │ + b.n a0bf8 │ │ str r7, [sp, #776] @ 0x308 │ │ - b.n a16c2 │ │ + b.n a16ce │ │ ldr r7, [sp, #1020] @ 0x3fc │ │ - b.n a1754 │ │ + b.n a1760 │ │ movs r0, #241 @ 0xf1 │ │ - b.n a17fa │ │ + b.n a1806 │ │ asrs r1, r0, #32 │ │ - b.n a11dc │ │ + b.n a11e8 │ │ movs r1, r1 │ │ - b.n a1402 │ │ + b.n a140e │ │ @ instruction: 0xffddeaff │ │ movs r7, r0 │ │ - b.n a140a │ │ + b.n a1416 │ │ asrs r6, r0, #32 │ │ - b.n a140e │ │ + b.n a141a │ │ movs r0, r3 │ │ add.w r0, r0, r0 │ │ - b.n a1776 │ │ + b.n a1782 │ │ @ instruction: 0xffb20aff │ │ asrs r0, r1, #1 │ │ - b.n a0c1c │ │ + b.n a0c28 │ │ movs r0, #246 @ 0xf6 │ │ - b.n a1822 │ │ + b.n a182e │ │ str r0, [sp, #0] │ │ - b.n a1426 │ │ + b.n a1432 │ │ asrs r1, r0, #32 │ │ - b.n a1208 │ │ + b.n a1214 │ │ @ instruction: 0xffd3eaff │ │ asrs r0, r7, #32 │ │ - b.n a0c30 │ │ + b.n a0c3c │ │ movs r6, r2 │ │ - b.n a1836 │ │ + b.n a1842 │ │ movs r0, #250 @ 0xfa │ │ - b.n a183a │ │ + b.n a1846 │ │ str r0, [sp, #88] @ 0x58 │ │ - b.n a183e │ │ + b.n a184a │ │ asrs r1, r0, #32 │ │ - b.n a1220 │ │ + b.n a122c │ │ @ instruction: 0xffcdeaff │ │ asrs r4, r4, #32 │ │ - b.n a0c48 │ │ + b.n a0c54 │ │ movs r6, r2 │ │ - b.n a184e │ │ + b.n a185a │ │ movs r0, #254 @ 0xfe │ │ - b.n a1852 │ │ + b.n a185e │ │ str r0, [sp, #88] @ 0x58 │ │ - b.n a1856 │ │ + b.n a1862 │ │ asrs r1, r0, #32 │ │ - b.n a1238 │ │ + b.n a1244 │ │ @ instruction: 0xffc7eaff │ │ - strb r0, [r3, #19] │ │ - vrinta.f16 d23, d20 │ │ - vrintx.f16 d23, d20 │ │ - vsri.32 , q12, #10 │ │ - vrintn.f16 , q8 │ │ - vrintn.f16 , q4 │ │ + strb r6, [r3, #20] │ │ + vrinta.f16 , q13 │ │ + vrintx.f16 , q13 │ │ + vsri.64 d23, d30, #10 │ │ + vrintx.f16 d23, d22 │ │ + vrintx.f16 d23, d14 │ │ @ instruction: 0xfff64ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n a1658 │ │ + b.n a1664 │ │ svc 115 @ 0x73 │ │ - b.n a15dc │ │ + b.n a15e8 │ │ str r0, [sp, #0] │ │ - b.n a1486 │ │ + b.n a1492 │ │ movs r4, r5 │ │ - b.n a1664 │ │ - add r0, pc, #4 @ (adr r0, a1150 ) │ │ - b.n a148e │ │ + b.n a1670 │ │ + add r0, pc, #4 @ (adr r0, a115c ) │ │ + b.n a149a │ │ asrs r1, r1, #32 │ │ - b.n a1492 │ │ + b.n a149e │ │ movs r0, #1 │ │ - b.n a1896 │ │ + b.n a18a2 │ │ @ instruction: 0xedbcebff │ │ movs r0, r0 │ │ - b.n a17fe │ │ + b.n a180a │ │ lsls r5, r0, #1 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n a0c98 │ │ + b.n a0ca4 │ │ movs r0, #0 │ │ - b.n a18aa │ │ + b.n a18b6 │ │ lsls r0, r1, #2 │ │ - b.n a0c8e │ │ + b.n a0c9a │ │ strh r2, [r1, #20] │ │ - b.n a1272 │ │ + b.n a127e │ │ movs r4, r5 │ │ - b.n a1690 │ │ + b.n a169c │ │ str r0, [r3, #0] │ │ - b.n a168a │ │ + b.n a1696 │ │ asrs r6, r0, #32 │ │ - b.n a14be │ │ + b.n a14ca │ │ movs r0, #165 @ 0xa5 │ │ add.w r0, r0, r0 │ │ - b.n a1826 │ │ + b.n a1832 │ │ lsls r0, r0, #1 │ │ subs r0, r0, r0 │ │ strb r4, [r5, #0] │ │ - b.n a16a8 │ │ + b.n a16b4 │ │ movs r4, r4 │ │ - b.n a16ac │ │ + b.n a16b8 │ │ movs r0, #6 │ │ - b.n a14d6 │ │ + b.n a14e2 │ │ asrs r7, r0, #32 │ │ - b.n a14da │ │ - str r7, [r7, #8] │ │ + b.n a14e6 │ │ + str r0, [r0, #12] │ │ add.w r0, r0, r8, asr #32 │ │ - b.n a0d5c │ │ + b.n a0d68 │ │ movs r0, r0 │ │ - b.n a1846 │ │ + b.n a1852 │ │ movs r5, r6 │ │ lsrs r0, r0, #8 │ │ movs r4, r4 │ │ - b.n a0ce8 │ │ + b.n a0cf4 │ │ asrs r4, r0, #32 │ │ - b.n a0d52 │ │ + b.n a0d5e │ │ asrs r6, r0, #32 │ │ - b.n a15b8 │ │ + b.n a15c4 │ │ movs r2, r0 │ │ - b.n a185c │ │ + b.n a1868 │ │ movs r7, r7 │ │ subs r0, r0, r0 │ │ asrs r0, r0, #32 │ │ - b.n a0ce2 │ │ + b.n a0cee │ │ movs r0, r6 │ │ - b.n a1868 │ │ + b.n a1874 │ │ lsls r0, r2, #1 │ │ subs r0, r0, r0 │ │ asrs r6, r6, #2 │ │ - b.n a156e │ │ + b.n a157a │ │ movs r0, #68 @ 0x44 │ │ - b.n a0d04 │ │ + b.n a0d10 │ │ movs r1, r0 │ │ - b.n a12d6 │ │ + b.n a12e2 │ │ asrs r0, r1, #32 │ │ - b.n a16da │ │ + b.n a16e6 │ │ lsls r2, r1, #2 │ │ - b.n a12f2 │ │ + b.n a12fe │ │ lsls r0, r0, #8 │ │ - b.n a1522 │ │ + b.n a152e │ │ adds r0, #176 @ 0xb0 │ │ - b.n a154a │ │ + b.n a1556 │ │ lsls r0, r6, #2 │ │ - b.n a158c │ │ + b.n a1598 │ │ str r6, [r7, #4] │ │ - b.n a15f4 │ │ + b.n a1600 │ │ movs r0, r0 │ │ - b.n a149e │ │ + b.n a14aa │ │ lsls r2, r3, #1 │ │ subs r0, r0, r0 │ │ lsrs r5, r1, #8 │ │ orn r0, r1, #139264 @ 0x22000 │ │ - b.n a193e │ │ + b.n a194a │ │ movs r4, r3 │ │ - b.n a1710 │ │ + b.n a171c │ │ cmp r2, #13 │ │ orn sl, r1, #36608 @ 0x8f00 │ │ orn r0, r1, #2129920 @ 0x208000 │ │ - b.n a154e │ │ + b.n a155a │ │ lsrs r5, r1, #8 │ │ orr.w sl, r1, #577536 @ 0x8d000 │ │ orr.w sl, r1, #33536 @ 0x8300 │ │ orr.w r3, r1, #107008 @ 0x1a200 │ │ - b.n a15d8 │ │ + b.n a15e4 │ │ lsrs r0, r2 │ │ - b.n a15a4 │ │ + b.n a15b0 │ │ lsls r3, r0, #4 │ │ - b.n a1146 │ │ + b.n a1152 │ │ strb r0, [r0, #0] │ │ - b.n a0d4a │ │ + b.n a0d56 │ │ str r4, [r0, #0] │ │ - b.n a0d4e │ │ + b.n a0d5a │ │ movs r4, r0 │ │ - b.n a12e0 │ │ + b.n a12ec │ │ movs r5, r0 │ │ - b.n a13e2 │ │ + b.n a13ee │ │ lsls r2, r2, #1 │ │ subs r2, #0 │ │ lsls r0, r0, #1 │ │ - b.n a0d70 │ │ + b.n a0d7c │ │ asrs r4, r2, #32 │ │ - b.n a0d72 │ │ + b.n a0d7e │ │ movs r0, r0 │ │ - b.n a18e8 │ │ + b.n a18f4 │ │ lsls r3, r4, #1 │ │ lsrs r0, r0, #8 │ │ lsls r0, r2, #2 │ │ - b.n a0d6e │ │ + b.n a0d7a │ │ lsls r2, r1, #4 │ │ - b.n a1172 │ │ - bl 4fcd52 │ │ + b.n a117e │ │ + bl 4fcd5e │ │ asrs r0, r2, #1 │ │ - b.n a0d8c │ │ + b.n a0d98 │ │ asrs r2, r1, #4 │ │ - b.n a1180 │ │ + b.n a118c │ │ movs r1, r0 │ │ - b.n a1502 │ │ + b.n a150e │ │ lsls r2, r4, #1 │ │ subs r0, r0, r0 │ │ lsls r4, r1, #1 │ │ - b.n a0d9c │ │ + b.n a0da8 │ │ asrs r2, r1, #32 │ │ - b.n a120e │ │ + b.n a121a │ │ asrs r5, r7, #3 │ │ - b.n a1674 │ │ + b.n a1680 │ │ asrs r2, r1, #32 │ │ - b.n a11f6 │ │ + b.n a1202 │ │ movs r0, r0 │ │ - b.n a19ba │ │ - beq.n a12b4 │ │ - b.n a1714 │ │ + b.n a19c6 │ │ + beq.n a12c0 │ │ + b.n a1720 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r6, r7, r8, r9, sl} │ │ - b.n a1896 │ │ + b.n a18a2 │ │ lsrs r7, r7, #31 │ │ - b.n a1928 │ │ + b.n a1934 │ │ movs r6, r1 │ │ - b.n a170e │ │ + b.n a171a │ │ asrs r0, r3, #8 │ │ - b.n a0dd0 │ │ + b.n a0ddc │ │ asrs r1, r0, #32 │ │ - b.n a13b4 │ │ + b.n a13c0 │ │ asrs r2, r3, #1 │ │ - b.n a0e3c │ │ + b.n a0e48 │ │ movs r3, r0 │ │ - b.n a1940 │ │ + b.n a194c │ │ lsls r0, r3, #1 │ │ cmp r2, #0 │ │ movs r7, #192 @ 0xc0 │ │ - b.n a18b6 │ │ + b.n a18c2 │ │ cmp r7, #255 @ 0xff │ │ - b.n a1948 │ │ + b.n a1954 │ │ asrs r6, r1, #32 │ │ - b.n a1732 │ │ + b.n a173e │ │ movs r1, r0 │ │ - b.n a1552 │ │ + b.n a155e │ │ movs r4, r0 │ │ lsls r2, r0, #10 │ │ - beq.n a12f0 │ │ - b.n a1750 │ │ + beq.n a12fc │ │ + b.n a175c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r4, r5, r6, r7, r8} │ │ - b.n a0e00 │ │ + b.n a0e0c │ │ movs r0, r0 │ │ - b.n a13e4 │ │ + b.n a13f0 │ │ lsls r2, r3, #1 │ │ - b.n a0e6a │ │ + b.n a0e76 │ │ movs r3, r0 │ │ - b.n a196e │ │ + b.n a197a │ │ movs r0, r5 │ │ subs r2, #0 │ │ asrs r4, r4, #7 │ │ - b.n a0e14 │ │ + b.n a0e20 │ │ adds r1, #228 @ 0xe4 │ │ - b.n a0e18 │ │ + b.n a0e24 │ │ asrs r1, r0, #32 │ │ - b.n a13fc │ │ + b.n a1408 │ │ movs r0, r3 │ │ - b.n a0e12 │ │ + b.n a0e1e │ │ adds r0, #3 │ │ - b.n a1404 │ │ + b.n a1410 │ │ str r4, [r3, r0] │ │ - b.n a0e1a │ │ + b.n a0e26 │ │ movs r0, #48 @ 0x30 │ │ - b.n a0e20 │ │ + b.n a0e2c │ │ strb r4, [r6, #0] │ │ - b.n a0e24 │ │ + b.n a0e30 │ │ str r4, [r1, #28] │ │ - b.n a0e34 │ │ + b.n a0e40 │ │ movs r0, #16 │ │ - b.n a0e14 │ │ + b.n a0e20 │ │ movs r0, #63 @ 0x3f │ │ - b.n a1a3e │ │ + b.n a1a4a │ │ movs r0, r1 │ │ - b.n a0e1c │ │ + b.n a0e28 │ │ movs r3, r0 │ │ - b.n a1a46 │ │ + b.n a1a52 │ │ str r6, [r0, #0] │ │ - b.n a1428 │ │ + b.n a1434 │ │ lsls r6, r3, #1 │ │ and.w r1, r0, r4, ror #2 │ │ - b.n a0e50 │ │ + b.n a0e5c │ │ movs r0, r0 │ │ - b.n a1434 │ │ + b.n a1440 │ │ lsls r2, r3, #1 │ │ - b.n a0eba │ │ + b.n a0ec6 │ │ movs r3, r0 │ │ - b.n a19be │ │ + b.n a19ca │ │ movs r4, r2 │ │ subs r2, #0 │ │ asrs r4, r4, #6 │ │ - b.n a0e64 │ │ + b.n a0e70 │ │ adds r1, #164 @ 0xa4 │ │ - b.n a0e68 │ │ + b.n a0e74 │ │ movs r0, r3 │ │ - b.n a0e5e │ │ + b.n a0e6a │ │ asrs r1, r0, #32 │ │ - b.n a1450 │ │ + b.n a145c │ │ str r4, [r3, r0] │ │ - b.n a0e66 │ │ + b.n a0e72 │ │ adds r0, #3 │ │ - b.n a1458 │ │ + b.n a1464 │ │ movs r0, #48 @ 0x30 │ │ - b.n a0e70 │ │ + b.n a0e7c │ │ strb r4, [r6, #0] │ │ - b.n a0e74 │ │ + b.n a0e80 │ │ str r4, [r1, #24] │ │ - b.n a0e84 │ │ + b.n a0e90 │ │ movs r0, #16 │ │ - b.n a0e64 │ │ + b.n a0e70 │ │ movs r0, #73 @ 0x49 │ │ - b.n a1a8e │ │ + b.n a1a9a │ │ str r6, [r0, #0] │ │ - b.n a1470 │ │ + b.n a147c │ │ movs r0, r1 │ │ - b.n a0e70 │ │ + b.n a0e7c │ │ strb r4, [r2, #0] │ │ - b.n a0e74 │ │ + b.n a0e80 │ │ movs r3, r0 │ │ - b.n a1a9e │ │ + b.n a1aaa │ │ lsls r2, r1, #1 │ │ and.w r1, r0, r0, ror #5 │ │ - b.n a0ea4 │ │ + b.n a0eb0 │ │ asrs r1, r0, #32 │ │ - b.n a1488 │ │ + b.n a1494 │ │ asrs r2, r3, #1 │ │ - b.n a0f10 │ │ + b.n a0f1c │ │ movs r3, r0 │ │ - b.n a1a14 │ │ + b.n a1a20 │ │ movs r7, r6 │ │ cmp r2, #0 │ │ lsls r0, r0, #31 │ │ - b.n a198a │ │ + b.n a1996 │ │ lsrs r7, r7, #31 │ │ - b.n a1a1c │ │ - beq.n a13b8 │ │ - b.n a1818 │ │ + b.n a1a28 │ │ + beq.n a13c4 │ │ + b.n a1824 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r4, r6, r8} │ │ - b.n a0ec8 │ │ + b.n a0ed4 │ │ movs r0, r0 │ │ - b.n a14ac │ │ + b.n a14b8 │ │ asrs r2, r3, #1 │ │ - b.n a0f32 │ │ + b.n a0f3e │ │ lsls r0, r0, #31 │ │ - b.n a19a6 │ │ + b.n a19b2 │ │ lsrs r7, r7, #31 │ │ - b.n a1a38 │ │ + b.n a1a44 │ │ movs r4, r1 │ │ - b.n a181e │ │ + b.n a182a │ │ movs r0, r0 │ │ - b.n a1a44 │ │ + b.n a1a50 │ │ @ instruction: 0xffb40aff │ │ asrs r4, r7, #4 │ │ - b.n a0ee8 │ │ + b.n a0ef4 │ │ movs r0, #94 @ 0x5e │ │ - b.n a1aee │ │ + b.n a1afa │ │ adds r1, #56 @ 0x38 │ │ - b.n a0ef0 │ │ + b.n a0efc │ │ asrs r1, r0, #32 │ │ - b.n a14d4 │ │ + b.n a14e0 │ │ lsls r0, r6, #2 │ │ stmia.w sp, {r0, r1, ip, sp} │ │ - b.n a14dc │ │ + b.n a14e8 │ │ ands r0, r0 │ │ - b.n a1702 │ │ + b.n a170e │ │ movs r1, r0 │ │ - b.n a1b06 │ │ + b.n a1b12 │ │ str r4, [r1, #0] │ │ - b.n a0ee4 │ │ - b.n a12f8 │ │ + b.n a0ef0 │ │ + b.n a1304 │ │ @ instruction: 0xebff0004 │ │ - b.n a1712 │ │ - beq.n a140c │ │ - b.n a186c │ │ + b.n a171e │ │ + beq.n a1418 │ │ + b.n a1878 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, ip} │ │ - b.n a171e │ │ - ldr r6, [pc, #600] @ (a1638 ) │ │ + b.n a172a │ │ + ldr r6, [pc, #604] @ (a1648 ) │ │ add.w r0, r0, r0 │ │ - b.n a1a86 │ │ + b.n a1a92 │ │ @ instruction: 0xffa31aff │ │ lsls r0, r0, #1 │ │ - b.n a0f20 │ │ + b.n a0f2c │ │ @ instruction: 0xff95eaff │ │ lsls r0, r0, #31 │ │ - b.n a1a06 │ │ + b.n a1a12 │ │ lsrs r7, r7, #31 │ │ - b.n a1a98 │ │ + b.n a1aa4 │ │ movs r4, r0 │ │ - b.n a18fe │ │ - beq.n a1438 │ │ - b.n a1898 │ │ + b.n a190a │ │ + beq.n a1444 │ │ + b.n a18a4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r5, r7, ip} │ │ - b.n a0f48 │ │ + b.n a0f54 │ │ movs r0, #24 │ │ - b.n a0f3e │ │ + b.n a0f4a │ │ str r4, [r3, r0] │ │ - b.n a0f42 │ │ + b.n a0f4e │ │ asrs r1, r0, #32 │ │ - b.n a1534 │ │ + b.n a1540 │ │ ands r0, r6 │ │ - b.n a0f4c │ │ + b.n a0f58 │ │ strb r4, [r6, #0] │ │ - b.n a0f50 │ │ + b.n a0f5c │ │ adds r0, #144 @ 0x90 │ │ - b.n a0f60 │ │ + b.n a0f6c │ │ ands r0, r2 │ │ - b.n a0f40 │ │ + b.n a0f4c │ │ ands r0, r0 │ │ - b.n a176a │ │ + b.n a1776 │ │ adds r0, #3 │ │ - b.n a154c │ │ + b.n a1558 │ │ movs r0, r3 │ │ - b.n a0f4c │ │ + b.n a0f58 │ │ movs r0, #8 │ │ - b.n a0f50 │ │ + b.n a0f5c │ │ movs r3, r0 │ │ - b.n a1b7a │ │ + b.n a1b86 │ │ movs r0, #51 @ 0x33 │ │ - b.n a1b7e │ │ + b.n a1b8a │ │ strb r4, [r2, #0] │ │ - b.n a0f5c │ │ - add r0, pc, #0 @ (adr r0, a1444 ) │ │ - b.n a0f60 │ │ + b.n a0f68 │ │ + add r0, pc, #0 @ (adr r0, a1450 ) │ │ + b.n a0f6c │ │ str r4, [r0, r0] │ │ - b.n a0f64 │ │ - b.n a1338 │ │ + b.n a0f70 │ │ + b.n a1344 │ │ @ instruction: 0xebff0004 │ │ - b.n a1792 │ │ + b.n a179e │ │ @ instruction: 0xff92eaff │ │ asrs r0, r0, #2 │ │ - b.n a0f98 │ │ + b.n a0fa4 │ │ movs r0, #24 │ │ - b.n a0f8e │ │ + b.n a0f9a │ │ str r4, [r3, r0] │ │ - b.n a0f92 │ │ + b.n a0f9e │ │ asrs r1, r0, #32 │ │ - b.n a1584 │ │ + b.n a1590 │ │ ands r0, r6 │ │ - b.n a0f9c │ │ + b.n a0fa8 │ │ strb r4, [r6, #0] │ │ - b.n a0fa0 │ │ + b.n a0fac │ │ adds r0, #108 @ 0x6c │ │ - b.n a0fb0 │ │ + b.n a0fbc │ │ movs r4, r3 │ │ - b.n a0f90 │ │ + b.n a0f9c │ │ movs r3, r0 │ │ - b.n a1bba │ │ + b.n a1bc6 │ │ movs r0, #8 │ │ - b.n a0f98 │ │ + b.n a0fa4 │ │ adds r0, #3 │ │ - b.n a15a0 │ │ + b.n a15ac │ │ ands r0, r2 │ │ - b.n a0fa0 │ │ + b.n a0fac │ │ movs r0, #85 @ 0x55 │ │ - b.n a1bca │ │ + b.n a1bd6 │ │ strb r4, [r2, #0] │ │ - b.n a0fa8 │ │ + b.n a0fb4 │ │ str r0, [r3, #0] │ │ - b.n a0fac │ │ - add r0, pc, #0 @ (adr r0, a1494 ) │ │ - b.n a0fb0 │ │ + b.n a0fb8 │ │ + add r0, pc, #0 @ (adr r0, a14a0 ) │ │ + b.n a0fbc │ │ str r4, [r0, r0] │ │ - b.n a0fb4 │ │ - b.n a1360 │ │ + b.n a0fc0 │ │ + b.n a136c │ │ @ instruction: 0xebff07c0 │ │ - b.n a1ab2 │ │ + b.n a1abe │ │ lsrs r7, r7, #31 │ │ - b.n a1b44 │ │ - beq.n a14e0 │ │ - b.n a1940 │ │ - ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r3, r4, r5, r7, r8, sl, ip, lr, pc} │ │ - movs r3, r0 │ │ - strh r3, [r0, #32] │ │ - vtbx.8 d25, {d22-d24}, d12 │ │ - vrintz.f16 d29, d8 │ │ - movs r3, r0 │ │ - strh r3, [r7, #40] @ 0x28 │ │ - vshr.u32 d31, d28, #10 │ │ - vrshr.u64 , q14, #10 │ │ - vsli.32 d29, d24, #22 │ │ - movs r3, r0 │ │ - strh r7, [r4, #38] @ 0x26 │ │ - vqrdmlsh.s q15, q11, d24[0] │ │ - vcvt.f16.u16 d27, d3, #10 │ │ - vrintx.f16 , q10 │ │ + b.n a1b50 │ │ + beq.n a14ec │ │ + b.n a194c │ │ + ldrh r0, [r6, #62] @ 0x3e │ │ + ldmia.w sp!, {r2, r3, r6, r7, r8, sl, ip, lr, pc} │ │ + movs r3, r0 │ │ + strh r2, [r3, #38] @ 0x26 │ │ + @ instruction: 0xfff699ff │ │ + vsli.64 d29, d12, #54 @ 0x36 │ │ + movs r3, r0 │ │ + strh r2, [r2, #48] @ 0x30 │ │ + vshr.u32 d31, d16, #10 │ │ + vshll.i16 , d11, #16 │ │ + vrinta.f16 , q6 │ │ + movs r3, r0 │ │ + strh r6, [r7, #44] @ 0x2c │ │ + @ instruction: 0xfff6efdc │ │ + vmull.u , d22, d10 │ │ + vsri.64 , q12, #10 │ │ movs r3, r0 │ │ - strh r3, [r6, #28] │ │ - vrintx.f16 d26, d18 │ │ - vrintx.f16 , q0 │ │ + strh r2, [r1, #36] @ 0x24 │ │ + vrintx.f16 d26, d6 │ │ + vsri.64 , q2, #10 │ │ movs r3, r0 │ │ - strh r3, [r4, #34] @ 0x22 │ │ - vcvt.bf16.f32 d29, │ │ + strh r2, [r7, #40] @ 0x28 │ │ + vqshrun.s64 d29, q10, #10 │ │ @ instruction: 0xfff64ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n a1a14 │ │ - beq.n a1524 │ │ - b.n a1998 │ │ + b.n a1a20 │ │ + beq.n a1530 │ │ + b.n a19a4 │ │ str r0, [r0, r0] │ │ - b.n a1842 │ │ + b.n a184e │ │ lsls r5, r2, #3 │ │ - b.n a18a6 │ │ - b.n a150c │ │ - b.n a184a │ │ + b.n a18b2 │ │ + b.n a1518 │ │ + b.n a1856 │ │ stmia r0!, {r0} │ │ - b.n a184e │ │ + b.n a185a │ │ movs r1, r0 │ │ - b.n a1bf2 │ │ + b.n a1bfe │ │ movs r0, r5 │ │ - bge.n a1516 │ │ + bge.n a1522 │ │ str r4, [r3, #0] │ │ - b.n a1a24 │ │ + b.n a1a30 │ │ str r0, [sp, #496] @ 0x1f0 │ │ - b.n a1a28 │ │ + b.n a1a34 │ │ asrs r4, r0, #32 │ │ - b.n a10cc │ │ + b.n a10d8 │ │ strh r0, [r0, #8] │ │ - b.n a1452 │ │ + b.n a145e │ │ lsls r0, r0, #2 │ │ - b.n a163c │ │ + b.n a1648 │ │ lsls r0, r5, #3 │ │ - b.n a1b50 │ │ + b.n a1b5c │ │ lsls r0, r6 │ │ - b.n a18d2 │ │ + b.n a18de │ │ movs r0, #188 @ 0xbc │ │ - b.n a18e6 │ │ - add r0, pc, #648 @ (adr r0, a17c0 ) │ │ - b.n a187a │ │ + b.n a18f2 │ │ + add r0, pc, #648 @ (adr r0, a17cc ) │ │ + b.n a1886 │ │ movs r1, r5 │ │ subs r0, r0, r0 │ │ movs r3, r1 │ │ - b.n a1be8 │ │ + b.n a1bf4 │ │ lsls r1, r1, #1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r3, #32 │ │ - b.n a1074 │ │ + b.n a1080 │ │ lsls r2, r6, #30 │ │ - b.n a1b5e │ │ + b.n a1b6a │ │ lsrs r7, r7, #31 │ │ - b.n a1bf0 │ │ + b.n a1bfc │ │ movs r0, r0 │ │ - b.n a1bf8 │ │ + b.n a1c04 │ │ lsls r2, r0, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, #213 @ 0xd5 │ │ - b.n a1900 │ │ + b.n a190c │ │ movs r0, r0 │ │ - b.n a1c06 │ │ + b.n a1c12 │ │ movs r7, r7 │ │ - ldr r2, [pc, #0] @ (a1564 ) │ │ + ldr r2, [pc, #0] @ (a1570 ) │ │ movs r1, r0 │ │ - b.n a18aa │ │ + b.n a18b6 │ │ asrs r6, r1, #32 │ │ - b.n a18ae │ │ + b.n a18ba │ │ adds r0, #16 │ │ - b.n a108c │ │ + b.n a1098 │ │ strb r4, [r1, #0] │ │ - b.n a18b6 │ │ - b.n a1590 │ │ - b.n a1094 │ │ - ldrb r6, [r6, #21] │ │ + b.n a18c2 │ │ + b.n a159c │ │ + b.n a10a0 │ │ + ldrb r7, [r6, #21] │ │ add.w r0, r0, r0 │ │ - b.n a1c22 │ │ + b.n a1c2e │ │ movs r3, r5 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n a1cca │ │ + b.n a1cd6 │ │ movs r0, r0 │ │ - b.n a1c3c │ │ + b.n a1c48 │ │ lsls r3, r3, #2 │ │ lsrs r0, r0, #8 │ │ asrs r4, r2, #32 │ │ - b.n a1aa6 │ │ + b.n a1ab2 │ │ movs r0, #132 @ 0x84 │ │ - b.n a169c │ │ + b.n a16a8 │ │ movs r0, #176 @ 0xb0 │ │ - b.n a1942 │ │ + b.n a194e │ │ asrs r2, r0, #32 │ │ - b.n a16a4 │ │ + b.n a16b0 │ │ movs r0, #8 │ │ - b.n a1aa8 │ │ + b.n a1ab4 │ │ movs r0, #0 │ │ - b.n a10b8 │ │ + b.n a10c4 │ │ asrs r6, r6, #2 │ │ - b.n a1950 │ │ + b.n a195c │ │ asrs r4, r0, #32 │ │ - b.n a10c0 │ │ - beq.n a15ec │ │ - b.n a1a4c │ │ + b.n a10cc │ │ + beq.n a15f8 │ │ + b.n a1a58 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, ip} │ │ - b.n a1168 │ │ + b.n a1174 │ │ movs r4, r0 │ │ - b.n a1be4 │ │ + b.n a1bf0 │ │ movs r2, r2 │ │ subs r0, r0, r0 │ │ lsls r0, r2, #3 │ │ - b.n a1d0a │ │ + b.n a1d16 │ │ movs r0, r1 │ │ - b.n a1bf0 │ │ + b.n a1bfc │ │ movs r4, r0 │ │ - b.n a115c │ │ + b.n a1168 │ │ lsls r2, r6, #30 │ │ - b.n a1be6 │ │ + b.n a1bf2 │ │ lsrs r7, r7, #31 │ │ - b.n a1c78 │ │ + b.n a1c84 │ │ movs r5, r7 │ │ lsls r0, r0, #12 │ │ - beq.n a1618 │ │ - b.n a1a78 │ │ + beq.n a1624 │ │ + b.n a1a84 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r4, r5, r6} │ │ - b.n a1348 │ │ + b.n a1354 │ │ movs r0, r0 │ │ - b.n a1c8e │ │ + b.n a1c9a │ │ movs r5, r1 │ │ - ldr r2, [pc, #0] @ (a15f0 ) │ │ + ldr r2, [pc, #0] @ (a15fc ) │ │ lsls r2, r6, #30 │ │ - b.n a1c06 │ │ + b.n a1c12 │ │ movs r1, r1 │ │ - b.n a1ca0 │ │ + b.n a1cac │ │ lsrs r7, r7, #31 │ │ - b.n a1c9c │ │ + b.n a1ca8 │ │ asrs r0, r1, #32 │ │ asrs r1, r2, #8 │ │ lsls r6, r7, #1 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n a18be │ │ + b.n a18ca │ │ movs r5, r3 │ │ ldr r2, [sp, #0] │ │ movs r2, r4 │ │ and.w r0, r0, r5 │ │ - b.n a1956 │ │ + b.n a1962 │ │ asrs r4, r1, #32 │ │ - b.n a195a │ │ + b.n a1966 │ │ movs r0, #14 │ │ - b.n a195e │ │ - beq.n a1658 │ │ - b.n a1ab8 │ │ - ldr r7, [pc, #960] @ (a19e4 ) │ │ + b.n a196a │ │ + beq.n a1664 │ │ + b.n a1ac4 │ │ + ldr r7, [pc, #960] @ (a19f0 ) │ │ ldmia.w sp!, {r2, r4, r8, ip, sp, lr, pc} │ │ @ instruction: 0xeaff003d │ │ - b.n a1d6e │ │ - beq.n a1668 │ │ - b.n a1ac8 │ │ + b.n a1d7a │ │ + beq.n a1674 │ │ + b.n a1ad4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, sp, lr, pc} │ │ - b.n a1174 │ │ + b.n a1180 │ │ asrs r2, r6, #30 │ │ - b.n a1c4e │ │ + b.n a1c5a │ │ subs r7, r7, #7 │ │ - b.n a1ce0 │ │ + b.n a1cec │ │ movs r1, r0 │ │ - b.n a18e6 │ │ + b.n a18f2 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ adds r0, #16 │ │ - b.n a1188 │ │ + b.n a1194 │ │ movs r5, r7 │ │ - b.n a1cf2 │ │ + b.n a1cfe │ │ stmia r0!, {r0, r1, r2} │ │ - b.n a1996 │ │ + b.n a19a2 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ lsls r0, r5, #1 │ │ and.w r0, r0, r0, lsr #12 │ │ - b.n a119c │ │ + b.n a11a8 │ │ stmia r0!, {r0, r1, r2} │ │ - b.n a19a6 │ │ + b.n a19b2 │ │ movs r1, r1 │ │ - b.n a1d10 │ │ + b.n a1d1c │ │ lsls r4, r4, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, r3 │ │ - b.n a119c │ │ + b.n a11a8 │ │ movs r0, r0 │ │ - b.n a1d16 │ │ + b.n a1d22 │ │ asrs r6, r5, #32 │ │ asrs r0, r4, #15 │ │ asrs r4, r6, #2 │ │ asrs r0, r0, #7 │ │ asrs r0, r0, #32 │ │ asrs r0, r4, #14 │ │ asrs r4, r7, #2 │ │ asrs r0, r0, #22 │ │ movs r1, r0 │ │ - b.n a1b92 │ │ + b.n a1b9e │ │ movs r2, r1 │ │ - b.n a192e │ │ + b.n a193a │ │ lsls r5, r3, #1 │ │ cmp r2, #0 │ │ asrs r5, r2, #3 │ │ - b.n a1a40 │ │ + b.n a1a4c │ │ asrs r1, r0, #2 │ │ - b.n a17ac │ │ + b.n a17b8 │ │ lsls r0, r6, #2 │ │ - b.n a1a20 │ │ + b.n a1a2c │ │ lsls r5, r2, #3 │ │ - b.n a1a4c │ │ + b.n a1a58 │ │ asrs r6, r0, #32 │ │ - b.n a1250 │ │ + b.n a125c │ │ movs r1, #0 │ │ - b.n a15d6 │ │ + b.n a15e2 │ │ strb r2, [r7, #2] │ │ - b.n a1a52 │ │ + b.n a1a5e │ │ asrs r7, r0, #32 │ │ - b.n a16f4 │ │ + b.n a1700 │ │ movs r7, r4 │ │ - b.n a1cd8 │ │ + b.n a1ce4 │ │ lsls r4, r3, #1 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #2 │ │ - b.n a17d0 │ │ + b.n a17dc │ │ asrs r4, r2, #32 │ │ - b.n a1bc6 │ │ + b.n a1bd2 │ │ lsls r0, r6, #2 │ │ - b.n a1a66 │ │ + b.n a1a72 │ │ lsls r0, r0, #2 │ │ - b.n a17cc │ │ + b.n a17d8 │ │ lsls r0, r6, #2 │ │ - b.n a1a6e │ │ + b.n a1a7a │ │ strb r0, [r0, #0] │ │ - b.n a17d4 │ │ + b.n a17e0 │ │ movs r4, r0 │ │ - b.n a1284 │ │ + b.n a1290 │ │ movs r4, r0 │ │ - b.n a1cfa │ │ + b.n a1d06 │ │ movs r3, r3 │ │ subs r0, r0, r0 │ │ movs r0, r3 │ │ - b.n a120c │ │ + b.n a1218 │ │ movs r0, r0 │ │ - b.n a1d86 │ │ + b.n a1d92 │ │ asrs r6, r5, #32 │ │ asrs r0, r4, #15 │ │ asrs r4, r6, #2 │ │ asrs r0, r0, #7 │ │ asrs r0, r0, #32 │ │ asrs r0, r4, #14 │ │ asrs r4, r7, #2 │ │ asrs r0, r0, #22 │ │ movs r0, r0 │ │ - b.n a1db6 │ │ + b.n a1dc2 │ │ movs r7, r6 │ │ lsrs r0, r0, #8 │ │ lsls r6, r6, #2 │ │ - b.n a1ab0 │ │ + b.n a1abc │ │ asrs r0, r0, #32 │ │ - b.n a1234 │ │ + b.n a1240 │ │ movs r0, r0 │ │ - b.n a1818 │ │ + b.n a1824 │ │ movs r0, r1 │ │ - b.n a1c0e │ │ + b.n a1c1a │ │ lsls r0, r6, #3 │ │ - b.n a1aae │ │ + b.n a1aba │ │ movs r4, r0 │ │ - b.n a12c4 │ │ + b.n a12d0 │ │ movs r1, r0 │ │ - b.n a1dba │ │ + b.n a1dc6 │ │ movs r7, r5 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #32 │ │ - b.n a1246 │ │ + b.n a1252 │ │ ands r4, r1 │ │ - b.n a1a66 │ │ + b.n a1a72 │ │ movs r0, r0 │ │ - b.n a124e │ │ + b.n a125a │ │ movs r0, #14 │ │ - b.n a1a6e │ │ + b.n a1a7a │ │ lsls r0, r6, #3 │ │ - b.n a1acc │ │ + b.n a1ad8 │ │ movs r5, r0 │ │ - b.n a1a76 │ │ + b.n a1a82 │ │ asrs r7, r0, #32 │ │ - b.n a1a7a │ │ - ldrb r4, [r3, #28] │ │ + b.n a1a86 │ │ + ldrb r5, [r3, #28] │ │ @ instruction: 0xeb00c004 │ │ - b.n a1a82 │ │ + b.n a1a8e │ │ movs r0, r0 │ │ - b.n a1de6 │ │ + b.n a1df2 │ │ movs r5, r5 │ │ subs r0, r0, r0 │ │ movs r3, r4 │ │ and.w r0, r0, r5 │ │ - b.n a1a92 │ │ + b.n a1a9e │ │ asrs r7, r0, #32 │ │ - b.n a1a96 │ │ + b.n a1aa2 │ │ str r6, [r1, #0] │ │ - b.n a1a9a │ │ + b.n a1aa6 │ │ ands r4, r1 │ │ - b.n a1a9e │ │ - str r3, [r5, r6] │ │ + b.n a1aaa │ │ + str r4, [r5, r6] │ │ add.w r0, r0, r0 │ │ - b.n a1e06 │ │ + b.n a1e12 │ │ movs r5, r4 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n a131c │ │ + b.n a1328 │ │ movs r2, r0 │ │ - b.n a1d92 │ │ + b.n a1d9e │ │ movs r7, r1 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n a1e26 │ │ + b.n a1e32 │ │ stmia r0!, {r2} │ │ - b.n a1abe │ │ + b.n a1aca │ │ movs r6, r2 │ │ lsrs r0, r0, #8 │ │ asrs r0, r3, #32 │ │ - b.n a12b0 │ │ + b.n a12bc │ │ movs r4, r3 │ │ - b.n a12ac │ │ + b.n a12b8 │ │ movs r7, #188 @ 0xbc │ │ - b.n a1b30 │ │ + b.n a1b3c │ │ adds r0, #20 │ │ - b.n a1c92 │ │ + b.n a1c9e │ │ asrs r2, r7, #2 │ │ - b.n a1b36 │ │ + b.n a1b42 │ │ movs r0, r4 │ │ - b.n a1dbc │ │ + b.n a1dc8 │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ lsls r2, r0, #2 │ │ - b.n a18a2 │ │ + b.n a18ae │ │ lsls r4, r6, #6 │ │ - b.n a1b46 │ │ + b.n a1b52 │ │ movs r0, r0 │ │ - b.n a18b0 │ │ + b.n a18bc │ │ asrs r6, r6, #2 │ │ - b.n a1b4e │ │ + b.n a1b5a │ │ movs r0, r1 │ │ - b.n a1cb2 │ │ + b.n a1cbe │ │ movs r0, r1 │ │ and.w r0, r0, r8, lsr #32 │ │ - b.n a12e4 │ │ + b.n a12f0 │ │ asrs r6, r0, #32 │ │ - b.n a1afe │ │ - ldrb r0, [r2, #23] │ │ + b.n a1b0a │ │ + ldrb r1, [r2, #23] │ │ add.w r0, r0, r0 │ │ - b.n a1e66 │ │ + b.n a1e72 │ │ stmia r0!, {r2} │ │ - b.n a1b0a │ │ + b.n a1b16 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ movs r3, r1 │ │ and.w r0, r0, r8, ror #6 │ │ - b.n a1b76 │ │ + b.n a1b82 │ │ adds r2, #145 @ 0x91 │ │ - b.n a181a │ │ + b.n a1826 │ │ lsls r0, r6, #3 │ │ - b.n a1b6a │ │ + b.n a1b76 │ │ movs r4, r0 │ │ - b.n a138c │ │ + b.n a1398 │ │ movs r0, r0 │ │ - b.n a1e9e │ │ + b.n a1eaa │ │ asrs r0, r1, #32 │ │ asrs r7, r0, #10 │ │ movs r3, r0 │ │ - b.n a1bee │ │ + b.n a1bfa │ │ movs r4, r0 │ │ - b.n a137c │ │ + b.n a1388 │ │ movs r0, r0 │ │ - b.n a1f36 │ │ + b.n a1f42 │ │ asrs r0, r0, #32 │ │ asrs r4, r1, #22 │ │ asrs r6, r6, #2 │ │ asrs r7, r2, #7 │ │ asrs r4, r0, #32 │ │ asrs r4, r1, #22 │ │ - beq.n a183c │ │ - b.n a1c9c │ │ + beq.n a1848 │ │ + b.n a1ca8 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r2} │ │ - b.n a1b4e │ │ + b.n a1b5a │ │ ands r4, r1 │ │ - b.n a1b52 │ │ + b.n a1b5e │ │ strb r6, [r1, #0] │ │ - b.n a1b56 │ │ - bfcsel 4, a2016 , 6, lt │ │ - b.n a182a │ │ - b.n a1b5e │ │ + b.n a1b62 │ │ + bfcsel 4, a2022 , 6, lt │ │ + b.n a1836 │ │ + b.n a1b6a │ │ stmia r0!, {r2} │ │ - b.n a1b62 │ │ + b.n a1b6e │ │ movs r0, r0 │ │ - b.n a1ec6 │ │ + b.n a1ed2 │ │ @ instruction: 0xfff51aff │ │ @ instruction: 0xff9beaff │ │ lsls r4, r1, #1 │ │ - b.n a1370 │ │ + b.n a137c │ │ asrs r2, r6, #30 │ │ - b.n a1e46 │ │ + b.n a1e52 │ │ subs r7, r7, #7 │ │ - b.n a1ed8 │ │ + b.n a1ee4 │ │ movs r0, r0 │ │ - b.n a195c │ │ + b.n a1968 │ │ adds r0, #90 @ 0x5a │ │ - b.n a13e2 │ │ + b.n a13ee │ │ movs r2, r0 │ │ - b.n a1d48 │ │ + b.n a1d54 │ │ movs r0, r0 │ │ - b.n a1ef0 │ │ + b.n a1efc │ │ @ instruction: 0xffec0aff │ │ asrs r0, r6, #32 │ │ - b.n a1390 │ │ + b.n a139c │ │ ands r0, r0 │ │ - b.n a1b96 │ │ + b.n a1ba2 │ │ str r0, [r2, #0] │ │ - b.n a137e │ │ + b.n a138a │ │ movs r1, r0 │ │ - b.n a1f9e │ │ + b.n a1faa │ │ adds r0, #36 @ 0x24 │ │ - b.n a13a0 │ │ + b.n a13ac │ │ asrs r1, r0, #32 │ │ - b.n a1984 │ │ + b.n a1990 │ │ movs r1, #233 @ 0xe9 │ │ - b.n a1e6a │ │ + b.n a1e76 │ │ str r0, [r6, #12] │ │ - b.n a1c08 │ │ + b.n a1c14 │ │ adds r0, #3 │ │ - b.n a1990 │ │ - b.n a154c │ │ + b.n a199c │ │ + b.n a1558 │ │ @ instruction: 0xebff0004 │ │ - b.n a1bba │ │ - beq.n a18b4 │ │ - b.n a1d14 │ │ + b.n a1bc6 │ │ + beq.n a18c0 │ │ + b.n a1d20 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r4, ip, lr, pc} │ │ + ldmia.w sp!, {r2, r5, ip, lr, pc} │ │ movs r3, r0 │ │ - ldrb r3, [r5, #27] │ │ - @ instruction: 0xfff66cbd │ │ + ldrb r2, [r0, #31] │ │ + @ instruction: 0xfff66d03 │ │ @ instruction: 0xfff64df0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n a1db0 │ │ - beq.n a18b8 │ │ - b.n a1d34 │ │ + b.n a1dbc │ │ + beq.n a18c4 │ │ + b.n a1d40 │ │ movs r0, r0 │ │ - b.n a1f3e │ │ + b.n a1f4a │ │ lsls r2, r2, #1 │ │ lsrs r0, r0, #8 │ │ str r4, [r4, #36] @ 0x24 │ │ - b.n a13e4 │ │ + b.n a13f0 │ │ ands r0, r0 │ │ - b.n a1bea │ │ + b.n a1bf6 │ │ movs r0, r0 │ │ - b.n a1fee │ │ + b.n a1ffa │ │ str r6, [r0, #0] │ │ - b.n a19d0 │ │ + b.n a19dc │ │ movs r0, r0 │ │ - b.n a13be │ │ + b.n a13ca │ │ lsls r0, r2, #1 │ │ - b.n a13e6 │ │ + b.n a13f2 │ │ lsrs r1, r0, #16 │ │ - b.n a1f5e │ │ + b.n a1f6a │ │ lsls r0, r2, #1 │ │ subs r2, #0 │ │ asrs r5, r2, #21 │ │ - b.n a1ed0 │ │ + b.n a1edc │ │ movs r3, #51 @ 0x33 │ │ - b.n a1ed0 │ │ + b.n a1edc │ │ asrs r5, r2, #21 │ │ - b.n a1f58 │ │ + b.n a1f64 │ │ movs r3, #51 @ 0x33 │ │ - b.n a1f58 │ │ + b.n a1f64 │ │ asrs r0, r4, #2 │ │ - b.n a18d8 │ │ + b.n a18e4 │ │ asrs r1, r0, #32 │ │ - b.n a195a │ │ + b.n a1966 │ │ adds r0, #2 │ │ - b.n a18e0 │ │ + b.n a18ec │ │ asrs r1, r4, #4 │ │ - b.n a18e6 │ │ + b.n a18f2 │ │ cmp r7, #15 │ │ - b.n a1ee6 │ │ + b.n a1ef2 │ │ asrs r1, r0, #32 │ │ - b.n a19f0 │ │ + b.n a19fc │ │ cmp r7, #15 │ │ - b.n a1f6e │ │ + b.n a1f7a │ │ asrs r1, r4, #8 │ │ - b.n a19f4 │ │ + b.n a1a00 │ │ asrs r2, r0, #32 │ │ - b.n a18f8 │ │ + b.n a1904 │ │ movs r1, #1 │ │ - b.n a1efa │ │ + b.n a1f06 │ │ movs r1, #1 │ │ - b.n a1f7e │ │ + b.n a1f8a │ │ lsls r1, r2, #10 │ │ - b.n a1904 │ │ + b.n a1910 │ │ adds r1, r4, #0 │ │ - b.n a1c46 │ │ + b.n a1c52 │ │ movs r2, r0 │ │ - b.n a1fac │ │ + b.n a1fb8 │ │ movs r5, r7 │ │ cmp r2, #0 │ │ lsls r4, r3, #1 │ │ - b.n a143e │ │ + b.n a144a │ │ subs r0, r4, r0 │ │ - b.n a1c56 │ │ + b.n a1c62 │ │ movs r0, r6 │ │ - b.n a1fbc │ │ + b.n a1fc8 │ │ lsls r2, r1, #1 │ │ ldr r2, [sp, #0] │ │ movs r1, r0 │ │ - b.n a2062 │ │ + b.n a206e │ │ subs r6, r3, #7 │ │ - b.n a2066 │ │ - blt.n a18a2 │ │ + b.n a2072 │ │ + blt.n a18b0 │ │ add.w r0, r0, r0 │ │ - b.n a1fce │ │ + b.n a1fda │ │ lsls r6, r3, #1 │ │ lsrs r0, r0, #8 │ │ asrs r2, r0, #32 │ │ - b.n a2076 │ │ + b.n a2082 │ │ str r0, [r0, r0] │ │ - b.n a1c7a │ │ + b.n a1c86 │ │ asrs r4, r2, #4 │ │ - b.n a143e │ │ + b.n a144a │ │ movs r5, r7 │ │ - b.n a2082 │ │ + b.n a208e │ │ lsls r0, r6, #27 │ │ - b.n a1cd0 │ │ + b.n a1cdc │ │ movs r0, r0 │ │ - b.n a210a │ │ + b.n a2116 │ │ asrs r7, r7, #3 │ │ - b.n a208e │ │ + b.n a209a │ │ movs r4, r6 │ │ - b.n a145c │ │ + b.n a1468 │ │ movs r0, r5 │ │ - b.n a1460 │ │ + b.n a146c │ │ movs r4, r5 │ │ - b.n a1464 │ │ + b.n a1470 │ │ movs r4, r2 │ │ - b.n a1468 │ │ + b.n a1474 │ │ movs r5, r0 │ │ - b.n a1ca2 │ │ + b.n a1cae │ │ asrs r5, r3, #1 │ │ - b.n a14f0 │ │ + b.n a14fc │ │ lsls r1, r6, #1 │ │ add.w r0, r0, r0, lsr #5 │ │ - b.n a149a │ │ + b.n a14a6 │ │ movs r5, r0 │ │ - b.n a1cb2 │ │ + b.n a1cbe │ │ lsrs r1, r0, #32 │ │ - b.n a2018 │ │ + b.n a2024 │ │ adds r1, r0, r0 │ │ movs r3, #160 @ 0xa0 │ │ lsls r2, r1, #2 │ │ @ instruction: 0xeb008e11 │ │ - b.n a1e8c │ │ + b.n a1e98 │ │ asrs r0, r0, #32 │ │ - b.n a20c6 │ │ + b.n a20d2 │ │ movs r0, r1 │ │ - b.n a1cca │ │ - bgt.n a1a5c │ │ + b.n a1cd6 │ │ + bgt.n a1a6a │ │ add.w r0, r0, r0 │ │ - b.n a2032 │ │ + b.n a203e │ │ lsls r3, r1, #1 │ │ subs r0, r0, r0 │ │ ldrb r6, [r1, #29] │ │ - b.n a1ea4 │ │ + b.n a1eb0 │ │ asrs r0, r0, #32 │ │ - b.n a20de │ │ + b.n a20ea │ │ movs r7, r0 │ │ - b.n a1ce2 │ │ - bgt.n a1a68 │ │ + b.n a1cee │ │ + bgt.n a1a76 │ │ add.w r0, r0, r0 │ │ - b.n a204a │ │ + b.n a2056 │ │ lsls r7, r0, #1 │ │ subs r0, r0, r0 │ │ lsls r7, r7, #5 │ │ - b.n a1fb2 │ │ + b.n a1fbe │ │ asrs r0, r0, #32 │ │ - b.n a20f6 │ │ + b.n a2102 │ │ movs r0, r0 │ │ - b.n a1ac4 │ │ + b.n a1ad0 │ │ movs r7, r7 │ │ - b.n a213e │ │ + b.n a214a │ │ lsrs r5, r0, #20 │ │ - b.n a1ec2 │ │ - bgt.n a1a78 │ │ + b.n a1ece │ │ + bgt.n a1a86 │ │ add.w r0, r0, r0 │ │ - b.n a206a │ │ + b.n a2076 │ │ lsls r1, r0, #1 │ │ subs r0, r0, r0 │ │ lsls r1, r0, #25 │ │ - b.n a1fe4 │ │ + b.n a1ff0 │ │ str r0, [r0, r0] │ │ - b.n a14de │ │ + b.n a14ea │ │ lsrs r1, r1, #10 │ │ - b.n a205c │ │ + b.n a2068 │ │ str r0, [r0, #0] │ │ - b.n a211e │ │ + b.n a212a │ │ movs r0, r0 │ │ - b.n a14ec │ │ + b.n a14f8 │ │ movs r6, r0 │ │ - b.n a1d26 │ │ - beq.n a1a18 │ │ - b.n a1e80 │ │ + b.n a1d32 │ │ + beq.n a1a24 │ │ + b.n a1e8c │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {r2, r4, r8, ip} │ │ - b.n a1530 │ │ + b.n a153c │ │ str r6, [r2, #0] │ │ - b.n a2136 │ │ + b.n a2142 │ │ movs r6, r2 │ │ - b.n a213a │ │ + b.n a2146 │ │ movs r0, #189 @ 0xbd │ │ - b.n a213e │ │ + b.n a214a │ │ asrs r1, r0, #32 │ │ - b.n a1b20 │ │ + b.n a1b2c │ │ movs r6, r7 │ │ and.w r0, r0, sl, lsr #5 │ │ - b.n a15b6 │ │ + b.n a15c2 │ │ movs r0, r0 │ │ - b.n a20b0 │ │ + b.n a20bc │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ asrs r0, r7, #3 │ │ - b.n a1554 │ │ + b.n a1560 │ │ movs r0, #206 @ 0xce │ │ - b.n a215a │ │ + b.n a2166 │ │ adds r0, #244 @ 0xf4 │ │ - b.n a155c │ │ + b.n a1568 │ │ asrs r1, r0, #32 │ │ - b.n a1b40 │ │ + b.n a1b4c │ │ movs r0, r0 │ │ - b.n a1540 │ │ + b.n a154c │ │ adds r0, #3 │ │ - b.n a1b48 │ │ + b.n a1b54 │ │ movs r1, r0 │ │ - b.n a216e │ │ - b.n a162a │ │ + b.n a217a │ │ + b.n a1636 │ │ @ instruction: 0xebff10e0 │ │ - b.n a1574 │ │ + b.n a1580 │ │ str r0, [r0, #124] @ 0x7c │ │ - b.n a204a │ │ + b.n a2056 │ │ ldr r7, [r7, #124] @ 0x7c │ │ - b.n a20dc │ │ + b.n a20e8 │ │ movs r0, #207 @ 0xcf │ │ - b.n a2182 │ │ + b.n a218e │ │ asrs r1, r0, #32 │ │ - b.n a1b64 │ │ + b.n a1b70 │ │ movs r6, r2 │ │ and.w r0, r0, sl, lsr #5 │ │ - b.n a15fa │ │ + b.n a1606 │ │ movs r0, r0 │ │ - b.n a20f4 │ │ + b.n a2100 │ │ movs r6, r1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #3 │ │ - b.n a1598 │ │ + b.n a15a4 │ │ movs r0, #112 @ 0x70 │ │ - b.n a183c │ │ + b.n a1848 │ │ adds r0, #188 @ 0xbc │ │ - b.n a15a0 │ │ + b.n a15ac │ │ movs r0, #12 │ │ - b.n a1580 │ │ + b.n a158c │ │ movs r4, #80 @ 0x50 │ │ - b.n a1a38 │ │ + b.n a1a44 │ │ movs r0, #8 │ │ - b.n a1588 │ │ + b.n a1594 │ │ cmp r0, #80 @ 0x50 │ │ - b.n a1a40 │ │ + b.n a1a4c │ │ lsrs r0, r4, #16 │ │ - b.n a1db6 │ │ + b.n a1dc2 │ │ asrs r1, r0, #32 │ │ - b.n a1b98 │ │ + b.n a1ba4 │ │ adds r0, #3 │ │ - b.n a1b9c │ │ + b.n a1ba8 │ │ movs r0, #4 │ │ - b.n a159c │ │ + b.n a15a8 │ │ movs r0, r0 │ │ - b.n a15a0 │ │ + b.n a15ac │ │ movs r1, r0 │ │ - b.n a21ca │ │ + b.n a21d6 │ │ movs r0, #225 @ 0xe1 │ │ - b.n a21ce │ │ - b.n a165a │ │ + b.n a21da │ │ + b.n a1666 │ │ @ instruction: 0xebff108c │ │ - b.n a15d4 │ │ + b.n a15e0 │ │ str r0, [r0, #124] @ 0x7c │ │ - b.n a20aa │ │ + b.n a20b6 │ │ ldr r7, [r7, #124] @ 0x7c │ │ - b.n a213c │ │ + b.n a2148 │ │ movs r0, #226 @ 0xe2 │ │ - b.n a21e2 │ │ + b.n a21ee │ │ asrs r1, r0, #32 │ │ - b.n a1bc4 │ │ + b.n a1bd0 │ │ movs r6, r0 │ │ - b.n a1dea │ │ + b.n a1df6 │ │ movs r4, r2 │ │ and.w r0, r0, r4, ror #5 │ │ - b.n a15f0 │ │ + b.n a15fc │ │ str r4, [r1, #0] │ │ - b.n a21f6 │ │ + b.n a2202 │ │ movs r4, r1 │ │ - b.n a21fa │ │ + b.n a2206 │ │ movs r0, #232 @ 0xe8 │ │ - b.n a21fe │ │ + b.n a220a │ │ asrs r1, r0, #32 │ │ - b.n a1be0 │ │ + b.n a1bec │ │ movs r6, r1 │ │ and.w r0, r0, r0, lsl #24 │ │ - b.n a1e0a │ │ + b.n a1e16 │ │ movs r6, r0 │ │ and.w r0, r0, r0, lsl #24 │ │ - b.n a1e12 │ │ + b.n a1e1e │ │ movs r2, r0 │ │ and.w r0, r0, r0, lsl #24 │ │ - b.n a1e1a │ │ + b.n a1e26 │ │ movs r7, r0 │ │ - b.n a1e1e │ │ - bgt.n a1b0e │ │ + b.n a1e2a │ │ + bgt.n a1b1c │ │ add.w r0, r0, r8 │ │ - b.n a1e26 │ │ - bgt.n a1b12 │ │ + b.n a1e32 │ │ + bgt.n a1b20 │ │ add.w r0, r0, r5 │ │ - b.n a1e2e │ │ - blt.n a1b56 │ │ + b.n a1e3a │ │ + blt.n a1b64 │ │ add.w r0, r0, r4, ror #4 │ │ - b.n a1634 │ │ + b.n a1640 │ │ movs r6, r0 │ │ - b.n a1e3a │ │ + b.n a1e46 │ │ movs r1, #18 │ │ - b.n a20fe │ │ + b.n a210a │ │ asrs r1, r0, #32 │ │ - b.n a1c20 │ │ - rors r2, r5 │ │ + b.n a1c2c │ │ + rors r3, r5 │ │ @ instruction: 0xeb00ffb5 │ │ - @ instruction: 0xeaffca60 │ │ - @ instruction: 0xfff6cf9c │ │ + @ instruction: 0xeaffcc2e │ │ + @ instruction: 0xfff6cfb0 │ │ movs r3, r0 │ │ - ldmia r2!, {r6} │ │ - vqrdmlsh.s , q11, d10[0] │ │ - vshll.u32 q14, d12, #22 │ │ - vtbx.8 d28, {d22-d23}, d24 │ │ - @ instruction: 0xfff6adf3 │ │ - @ instruction: 0xfff6c9bc │ │ - vtbl.8 d28, {d22-d23}, d16 │ │ - vtbx.8 d28, {d6-d7}, d16 │ │ + ldmia r4!, {r1, r2, r3} │ │ + vaddl.u q13, d6, d3 │ │ + vtbx.8 d28, {d22-d25}, d26 │ │ + @ instruction: 0xfff6cbb6 │ │ + @ instruction: 0xfff6ae0c │ │ + vtbl.8 d28, {d22-d25}, d10 │ │ + vtbx.8 d28, {d6-d9}, d30 │ │ + vtbl.8 d28, {d6-d9}, d30 │ │ vqrshrun.s64 d20, q0, #10 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n a2054 │ │ + b.n a2060 │ │ ands r0, r0 │ │ - b.n a1e7e │ │ + b.n a1e8a │ │ movs r1, #173 @ 0xad │ │ add.w r0, r0, r0, lsl #4 │ │ - b.n a1e86 │ │ + b.n a1e92 │ │ lsrs r7, r7, #31 │ │ - b.n a228a │ │ + b.n a2296 │ │ lsls r4, r7, #2 │ │ - b.n a1656 │ │ + b.n a1662 │ │ lsrs r0, r6, #15 │ │ - b.n a1eda │ │ + b.n a1ee6 │ │ movs r4, r0 │ │ - b.n a1e96 │ │ - ldrb r5, [r2, #28] │ │ + b.n a1ea2 │ │ + ldrb r6, [r2, #28] │ │ add.w r0, r0, r4, lsl #5 │ │ - b.n a169c │ │ + b.n a16a8 │ │ subs r3, #133 @ 0x85 │ │ - b.n a216e │ │ + b.n a217a │ │ ldr r7, [r7, #124] @ 0x7c │ │ - b.n a2184 │ │ + b.n a2190 │ │ subs r2, #193 @ 0xc1 │ │ - b.n a21ea │ │ + b.n a21f6 │ │ asrs r1, r0, #32 │ │ - b.n a1c8c │ │ + b.n a1c98 │ │ cmp r0, #64 @ 0x40 │ │ - b.n a2172 │ │ + b.n a217e │ │ str r0, [r3, #12] │ │ - b.n a167e │ │ + b.n a168a │ │ movs r0, #8 │ │ - b.n a21fa │ │ + b.n a2206 │ │ asrs r3, r3, #1 │ │ - b.n a1720 │ │ + b.n a172c │ │ adds r0, #220 @ 0xdc │ │ - b.n a168a │ │ + b.n a1696 │ │ adds r1, #2 │ │ - b.n a2346 │ │ + b.n a2352 │ │ movs r0, r0 │ │ - b.n a222c │ │ + b.n a2238 │ │ lsls r0, r7, #2 │ │ - b.n a1696 │ │ + b.n a16a2 │ │ lsls r5, r2, #21 │ │ - b.n a219c │ │ + b.n a21a8 │ │ adds r0, #2 │ │ lsls r0, r0, #12 │ │ movs r0, #200 @ 0xc8 │ │ - b.n a16a2 │ │ + b.n a16ae │ │ lsls r4, r1, #3 │ │ - b.n a16a6 │ │ + b.n a16b2 │ │ adds r0, #208 @ 0xd0 │ │ - b.n a16aa │ │ + b.n a16b6 │ │ ldrh r0, [r2, #2] │ │ - ldmia.w sp!, {r5, r6, r7, sl, fp, lr, pc} │ │ + ldmia.w sp!, {r2, r4, r5, r6, r7, sl, fp, lr, pc} │ │ movs r3, r0 │ │ - ldr r4, [pc, #832] @ (a1eec ) │ │ + ldr r4, [pc, #832] @ (a1ef8 ) │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n a20cc │ │ + b.n a20d8 │ │ ands r0, r0 │ │ - b.n a1ef6 │ │ + b.n a1f02 │ │ movs r1, r0 │ │ - b.n a203c │ │ + b.n a2048 │ │ movs r0, r0 │ │ - b.n a1de0 │ │ + b.n a1dec │ │ movs r0, r7 │ │ subs r0, r0, r0 │ │ lsls r7, r7, #3 │ │ - b.n a2268 │ │ + b.n a2274 │ │ movs r4, r7 │ │ ldr r2, [sp, #0] │ │ lsrs r1, r0, #32 │ │ - b.n a2270 │ │ + b.n a227c │ │ lsls r0, r0, #1 │ │ ldrh r0, [r0, #16] │ │ lsls r0, r0, #2 │ │ - b.n a16fe │ │ + b.n a170a │ │ movs r0, r0 │ │ - b.n a227a │ │ + b.n a2286 │ │ movs r3, r5 │ │ subs r0, r0, r0 │ │ movs r0, r1 │ │ - b.n a170a │ │ + b.n a1716 │ │ movs r1, r0 │ │ - b.n a1e86 │ │ + b.n a1e92 │ │ movs r0, r5 │ │ lsrs r0, r0, #8 │ │ movs r4, r2 │ │ - b.n a2070 │ │ + b.n a207c │ │ adds r3, #143 @ 0x8f │ │ - b.n a220e │ │ + b.n a221a │ │ asrs r0, r1, #32 │ │ - b.n a16fe │ │ + b.n a170a │ │ movs r0, #112 @ 0x70 │ │ - b.n a19f8 │ │ + b.n a1a04 │ │ lsls r2, r2, #14 │ │ - b.n a1c02 │ │ + b.n a1c0e │ │ adds r0, #0 │ │ - b.n a23c2 │ │ + b.n a23ce │ │ str r0, [r4, #16] │ │ - b.n a1d0c │ │ + b.n a1d18 │ │ adds r0, #1 │ │ - b.n a23ca │ │ + b.n a23d6 │ │ ldrb r2, [r4, #8] │ │ - b.n a1f4e │ │ + b.n a1f5a │ │ movs r0, #30 │ │ - b.n a2094 │ │ + b.n a20a0 │ │ ldr r4, [r6, #28] │ │ - b.n a1f9e │ │ + b.n a1faa │ │ movs r0, #162 @ 0xa2 │ │ - b.n a1c20 │ │ + b.n a1c2c │ │ movs r5, r6 │ │ - b.n a22c2 │ │ + b.n a22ce │ │ movs r3, r0 │ │ subs r2, #0 │ │ adds r0, #160 @ 0xa0 │ │ - b.n a1c2c │ │ + b.n a1c38 │ │ lsls r5, r4, #1 │ │ - b.n a22d0 │ │ + b.n a22dc │ │ movs r2, r0 │ │ movs r1, #83 @ 0x53 │ │ movs r5, r0 │ │ cmp r2, #0 │ │ lsls r4, r2, #3 │ │ - b.n a1774 │ │ + b.n a1780 │ │ movs r0, #52 @ 0x34 │ │ - b.n a237a │ │ + b.n a2386 │ │ asrs r0, r2, #3 │ │ - b.n a177c │ │ + b.n a1788 │ │ movs r0, r0 │ │ - b.n a1d60 │ │ + b.n a1d6c │ │ asrs r1, r0, #32 │ │ - b.n a1d64 │ │ - b.n a151e │ │ + b.n a1d70 │ │ + b.n a152a │ │ @ instruction: 0xebff70cc │ │ - b.n a1776 │ │ + b.n a1782 │ │ subs r1, r6, #4 │ │ - b.n a1a50 │ │ + b.n a1a5c │ │ movs r0, #2 │ │ - b.n a20da │ │ + b.n a20e6 │ │ movs r4, #190 @ 0xbe │ │ - b.n a1fe2 │ │ + b.n a1fee │ │ movs r0, #2 │ │ - b.n a20e4 │ │ + b.n a20f0 │ │ subs r1, r2, #4 │ │ - b.n a1f40 │ │ + b.n a1f4c │ │ lsls r7, r2, #2 │ │ - b.n a1c74 │ │ + b.n a1c80 │ │ movs r4, #188 @ 0xbc │ │ - b.n a1ff2 │ │ + b.n a1ffe │ │ asrs r4, r3, #1 │ │ - b.n a17f6 │ │ + b.n a1802 │ │ lsrs r7, r4, #32 │ │ - b.n a1cf2 │ │ + b.n a1cfe │ │ lsls r6, r7, #22 │ │ - b.n a1ffe │ │ + b.n a200a │ │ movs r4, r0 │ │ - b.n a1fba │ │ + b.n a1fc6 │ │ movs r1, #172 @ 0xac │ │ add.w r0, r0, r4 │ │ - b.n a1fc2 │ │ + b.n a1fce │ │ movs r1, #125 @ 0x7d │ │ add.w r0, r0, r8 │ │ - b.n a17b2 │ │ + b.n a17be │ │ ldrh r0, [r2, #38] @ 0x26 │ │ ldmia.w sp!, {r4, r5, r6} │ │ - b.n a17d0 │ │ + b.n a17dc │ │ movs r0, #33 @ 0x21 │ │ - b.n a23d6 │ │ + b.n a23e2 │ │ asrs r4, r5, #1 │ │ - b.n a17d8 │ │ + b.n a17e4 │ │ movs r0, r0 │ │ - b.n a1dbc │ │ + b.n a1dc8 │ │ asrs r1, r0, #32 │ │ - b.n a1dc0 │ │ - b.n a154c │ │ + b.n a1dcc │ │ + b.n a1558 │ │ @ instruction: 0xebff0040 │ │ - b.n a17e8 │ │ + b.n a17f4 │ │ movs r0, #30 │ │ - b.n a23ee │ │ + b.n a23fa │ │ asrs r4, r7, #32 │ │ - b.n a17f0 │ │ + b.n a17fc │ │ movs r0, r0 │ │ - b.n a1dd4 │ │ + b.n a1de0 │ │ asrs r1, r0, #32 │ │ - b.n a1dd8 │ │ - b.n a1558 │ │ + b.n a1de4 │ │ + b.n a1564 │ │ @ instruction: 0xebff0030 │ │ - b.n a1800 │ │ + b.n a180c │ │ movs r0, #31 │ │ - b.n a2406 │ │ + b.n a2412 │ │ asrs r4, r5, #32 │ │ - b.n a1808 │ │ + b.n a1814 │ │ movs r0, r0 │ │ - b.n a1dec │ │ + b.n a1df8 │ │ asrs r1, r0, #32 │ │ - b.n a1df0 │ │ - b.n a1564 │ │ + b.n a1dfc │ │ + b.n a1570 │ │ @ instruction: 0xebff0020 │ │ - b.n a1818 │ │ + b.n a1824 │ │ movs r0, #32 │ │ - b.n a241e │ │ + b.n a242a │ │ asrs r4, r3, #32 │ │ - b.n a1820 │ │ + b.n a182c │ │ movs r0, r0 │ │ - b.n a1e04 │ │ + b.n a1e10 │ │ asrs r1, r0, #32 │ │ - b.n a1e08 │ │ - b.n a1570 │ │ - @ instruction: 0xebffd230 │ │ - vqshlu.s32 d25, d29, #22 │ │ - @ instruction: 0xfff68e04 │ │ - vcvt.f16.f32 d25, │ │ - vcvt.f32.u32 d25, d8, #10 │ │ - vcvt.f16.f32 d25, │ │ - vcvt.bf16.f32 d25, q14 │ │ - vqshlu.s32 , , #22 │ │ - @ instruction: 0xfff6bad7 │ │ - vqshlu.s64 d25, d17, #54 @ 0x36 │ │ + b.n a1e14 │ │ + b.n a157c │ │ + @ instruction: 0xebffd3b3 │ │ + vrintz.f16 d25, d0 │ │ + vcvt.u16.f16 q12, q8, #10 │ │ + vrinta.f16 , q12 │ │ + vcvt.f32.u32 , , #10 │ │ + vsli.32 , q0, #22 │ │ + vrintz.f16 d25, d31 │ │ + vsli.64 d25, d8, #54 @ 0x36 │ │ + vtbl.8 d27, {d22-d25}, d24 │ │ + vsli.64 , q10, #54 @ 0x36 │ │ @ instruction: 0xfff64ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n a2238 │ │ - beq.n a1d78 │ │ - b.n a21bc │ │ + b.n a2244 │ │ + beq.n a1d84 │ │ + b.n a21c8 │ │ ands r1, r0 │ │ - b.n a2066 │ │ + b.n a2072 │ │ stmia r0!, {r0, r1} │ │ - b.n a206a │ │ + b.n a2076 │ │ subs r6, #254 @ 0xfe │ │ - b.n a234a │ │ + b.n a2356 │ │ str r0, [r2, #12] │ │ - b.n a20ba │ │ + b.n a20c6 │ │ asrs r2, r0, #9 │ │ - b.n a2342 │ │ + b.n a234e │ │ adds r0, #179 @ 0xb3 │ │ - b.n a23bc │ │ + b.n a23c8 │ │ asrs r2, r3, #26 │ │ - b.n a23d2 │ │ + b.n a23de │ │ adds r0, #3 │ │ - b.n a1e6e │ │ + b.n a1e7a │ │ asrs r1, r0, #32 │ │ - b.n a1e94 │ │ + b.n a1ea0 │ │ adds r0, #2 │ │ - b.n a21f0 │ │ + b.n a21fc │ │ asrs r0, r0, #32 │ │ - b.n a22f0 │ │ + b.n a22fc │ │ movs r7, r0 │ │ subs r2, #0 │ │ asrs r7, r7, #7 │ │ - b.n a2358 │ │ + b.n a2364 │ │ subs r5, #189 @ 0xbd │ │ - b.n a236c │ │ + b.n a2378 │ │ subs r4, r1, #5 │ │ - b.n a23fa │ │ + b.n a2406 │ │ subs r1, #101 @ 0x65 │ │ - b.n a23ec │ │ + b.n a23f8 │ │ asrs r1, r0, #32 │ │ - b.n a1db2 │ │ + b.n a1dbe │ │ adds r0, #3 │ │ - b.n a1db8 │ │ + b.n a1dc4 │ │ asrs r3, r0, #32 │ │ - b.n a2090 │ │ + b.n a209c │ │ movs r7, r7 │ │ subs r0, r0, r0 │ │ str r0, [r2, r0] │ │ - b.n a189a │ │ + b.n a18a6 │ │ movs r4, r1 │ │ - b.n a2024 │ │ + b.n a2030 │ │ lsls r2, r1, #6 │ │ subs r0, r0, r0 │ │ asrs r2, r7, #2 │ │ - b.n a2126 │ │ + b.n a2132 │ │ movs r0, r1 │ │ - b.n a2428 │ │ + b.n a2434 │ │ lsls r7, r2, #6 │ │ subs r0, r0, r0 │ │ str r4, [r5, r0] │ │ - b.n a18b6 │ │ - b.n a183a │ │ - b.n a239c │ │ - b.n a183e │ │ - b.n a2420 │ │ + b.n a18c2 │ │ + b.n a1846 │ │ + b.n a23a8 │ │ + b.n a184a │ │ + b.n a242c │ │ str r3, [sp, #204] @ 0xcc │ │ - b.n a23a0 │ │ + b.n a23ac │ │ str r3, [sp, #204] @ 0xcc │ │ - b.n a2424 │ │ + b.n a2430 │ │ add r7, sp, #60 @ 0x3c │ │ - b.n a23a2 │ │ + b.n a23ae │ │ asrs r5, r4, #2 │ │ - b.n a1dc2 │ │ + b.n a1dce │ │ strh r1, [r0, #8] │ │ - b.n a23aa │ │ + b.n a23b6 │ │ asrs r1, r0, #32 │ │ - b.n a1e38 │ │ + b.n a1e44 │ │ add r7, sp, #60 @ 0x3c │ │ - b.n a2432 │ │ + b.n a243e │ │ movs r0, #9 │ │ - b.n a1db8 │ │ + b.n a1dc4 │ │ strh r1, [r0, #8] │ │ - b.n a243a │ │ + b.n a2446 │ │ asrs r1, r4, #4 │ │ - b.n a1dd0 │ │ + b.n a1ddc │ │ asrs r1, r0, #32 │ │ - b.n a1ec6 │ │ + b.n a1ed2 │ │ asrs r1, r4, #8 │ │ - b.n a1ec8 │ │ + b.n a1ed4 │ │ asrs r2, r1, #32 │ │ - b.n a1dcc │ │ + b.n a1dd8 │ │ lsrs r1, r2, #2 │ │ - b.n a1dd0 │ │ + b.n a1ddc │ │ adds r1, r4, #0 │ │ - b.n a2112 │ │ + b.n a211e │ │ movs r1, r0 │ │ - b.n a2478 │ │ + b.n a2484 │ │ lsls r1, r3, #5 │ │ ldrh r0, [r0, #16] │ │ cmp r0, #1 │ │ - b.n a259e │ │ + b.n a25aa │ │ adds r0, #254 @ 0xfe │ │ - b.n a23e2 │ │ + b.n a23ee │ │ movs r0, #2 │ │ - b.n a1ef0 │ │ + b.n a1efc │ │ subs r7, #255 @ 0xff │ │ - b.n a2488 │ │ + b.n a2494 │ │ movs r3, r0 │ │ - b.n a2092 │ │ + b.n a209e │ │ lsls r3, r2, #5 │ │ ldr r2, [sp, #0] │ │ asrs r0, r1, #32 │ │ - b.n a192c │ │ + b.n a1938 │ │ movs r0, r0 │ │ - b.n a249c │ │ + b.n a24a8 │ │ movs r0, #0 │ │ asrs r1, r2, #22 │ │ movs r5, r0 │ │ asrs r2, r2, #5 │ │ str r0, [r0, r0] │ │ asrs r1, r0, #22 │ │ strh r0, [r3, #6] │ │ - b.n a2192 │ │ + b.n a219e │ │ cmp r3, #208 @ 0xd0 │ │ - b.n a2196 │ │ + b.n a21a2 │ │ asrs r3, r0, #32 │ │ - b.n a1e64 │ │ + b.n a1e70 │ │ movs r0, #2 │ │ - b.n a1e66 │ │ + b.n a1e72 │ │ asrs r1, r0, #32 │ │ - b.n a213e │ │ + b.n a214a │ │ lsls r1, r0, #6 │ │ subs r0, r0, r0 │ │ movs r0, #168 @ 0xa8 │ │ - b.n a194a │ │ + b.n a1956 │ │ str r4, [r5, r2] │ │ - b.n a194e │ │ + b.n a195a │ │ asrs r1, r0, #32 │ │ - b.n a234e │ │ + b.n a235a │ │ adds r0, #0 │ │ - b.n a2378 │ │ + b.n a2384 │ │ asrs r3, r0, #32 │ │ - b.n a22d4 │ │ + b.n a22e0 │ │ asrs r0, r0, #32 │ │ - b.n a23dc │ │ + b.n a23e8 │ │ lsls r6, r5, #2 │ │ cmp r2, #0 │ │ movs r2, #184 @ 0xb8 │ │ - b.n a21e6 │ │ + b.n a21f2 │ │ movs r0, r1 │ │ - b.n a24e6 │ │ + b.n a24f2 │ │ lsls r5, r0, #6 │ │ subs r0, r0, r0 │ │ movs r5, #184 @ 0xb8 │ │ - b.n a21f2 │ │ + b.n a21fe │ │ asrs r2, r1, #32 │ │ - b.n a25d2 │ │ + b.n a25de │ │ movs r3, r6 │ │ - b.n a24f4 │ │ + b.n a2500 │ │ movs r1, r3 │ │ - bge.n a1e56 │ │ + bge.n a1e62 │ │ lsls r3, r2, #1 │ │ - b.n a24fc │ │ + b.n a2508 │ │ lsls r1, r2, #3 │ │ ldmia r2!, {} │ │ movs r4, r6 │ │ - b.n a2504 │ │ + b.n a2510 │ │ movs r4, r3 │ │ lsrs r0, r0, #8 │ │ lsls r4, r0, #1 │ │ - b.n a250c │ │ + b.n a2518 │ │ movs r2, r3 │ │ lsrs r0, r0, #8 │ │ lsls r7, r1, #3 │ │ and.w fp, r0, r4, lsl #3 │ │ - b.n a19b4 │ │ + b.n a19c0 │ │ movs r0, r0 │ │ - b.n a1f98 │ │ + b.n a1fa4 │ │ lsls r2, r3, #1 │ │ - b.n a1a1e │ │ + b.n a1a2a │ │ movs r0, r0 │ │ - b.n a2522 │ │ + b.n a252e │ │ lsls r5, r2, #4 │ │ subs r0, r0, r0 │ │ lsls r5, r3, #22 │ │ - b.n a2496 │ │ + b.n a24a2 │ │ asrs r6, r4, #16 │ │ - b.n a21ce │ │ + b.n a21da │ │ lsls r1, r3, #1 │ │ - b.n a2512 │ │ + b.n a251e │ │ cmp r4, #17 │ │ - b.n a249e │ │ + b.n a24aa │ │ adds r7, r0, #0 │ │ - b.n a219c │ │ + b.n a21a8 │ │ cmp r5, #239 @ 0xef │ │ - b.n a2534 │ │ + b.n a2540 │ │ lsls r7, r4, #16 │ │ - b.n a1ee2 │ │ + b.n a1eee │ │ asrs r2, r0, #32 │ │ - b.n a1ee8 │ │ + b.n a1ef4 │ │ movs r0, r0 │ │ - b.n a21cc │ │ + b.n a21d8 │ │ lsls r4, r6, #30 │ │ - b.n a24be │ │ + b.n a24ca │ │ lsrs r7, r7, #31 │ │ - b.n a2550 │ │ - add r0, pc, #12 @ (adr r0, a1ec0 ) │ │ - b.n a25b6 │ │ - add r0, pc, #8 @ (adr r0, a1ec0 ) │ │ + b.n a255c │ │ + add r0, pc, #12 @ (adr r0, a1ecc ) │ │ + b.n a25c2 │ │ + add r0, pc, #8 @ (adr r0, a1ecc ) │ │ lsls r0, r0, #14 │ │ lsls r4, r7, #3 │ │ and.w r0, r0, r4, lsr #32 │ │ - b.n a2564 │ │ + b.n a2570 │ │ lsls r2, r7, #2 │ │ ldrh r0, [r0, #16] │ │ adds r0, #17 │ │ - b.n a24ca │ │ + b.n a24d6 │ │ strb r1, [r0, #0] │ │ - b.n a260e │ │ + b.n a261a │ │ adds r0, #16 │ │ - b.n a2552 │ │ + b.n a255e │ │ lsls r7, r2, #4 │ │ - b.n a20fc │ │ + b.n a2108 │ │ lsls r5, r6, #2 │ │ lsrs r0, r0, #8 │ │ asrs r2, r1, #32 │ │ - b.n a22e2 │ │ + b.n a22ee │ │ movs r2, r1 │ │ - b.n a2584 │ │ + b.n a2590 │ │ lsls r1, r0, #3 │ │ lsrs r0, r0, #8 │ │ asrs r1, r0, #32 │ │ - b.n a23fc │ │ + b.n a2408 │ │ movs r0, #0 │ │ - b.n a23de │ │ + b.n a23ea │ │ asrs r1, r0, #32 │ │ - b.n a24d4 │ │ + b.n a24e0 │ │ lsls r0, r7, #5 │ │ cmp r2, #0 │ │ strb r0, [r3, #0] │ │ - b.n a1a22 │ │ + b.n a1a2e │ │ asrs r6, r0, #4 │ │ - b.n a238c │ │ + b.n a2398 │ │ lsls r6, r0, #4 │ │ - b.n a25a4 │ │ + b.n a25b0 │ │ lsls r2, r0, #6 │ │ ldr r2, [sp, #0] │ │ str r4, [r3, r0] │ │ - b.n a1a32 │ │ + b.n a1a3e │ │ movs r7, r0 │ │ - b.n a21b8 │ │ + b.n a21c4 │ │ asrs r6, r0, #4 │ │ movs r2, #69 @ 0x45 │ │ lsls r6, r0, #4 │ │ movs r3, #81 @ 0x51 │ │ lsls r4, r2, #4 │ │ ldr r2, [sp, #0] │ │ movs r0, #36 @ 0x24 │ │ - b.n a1a46 │ │ + b.n a1a52 │ │ asrs r6, r0, #4 │ │ - b.n a23a6 │ │ + b.n a23b2 │ │ lsls r6, r0, #4 │ │ - b.n a25c8 │ │ + b.n a25d4 │ │ lsls r2, r0, #6 │ │ ldr r2, [sp, #0] │ │ asrs r4, r5, #32 │ │ - b.n a1a56 │ │ + b.n a1a62 │ │ str r0, [r0, #0] │ │ - b.n a2272 │ │ + b.n a227e │ │ strb r1, [r2, #10] │ │ - b.n a2040 │ │ + b.n a204c │ │ asrs r0, r4, #32 │ │ - b.n a1aa6 │ │ + b.n a1ab2 │ │ adds r0, #4 │ │ - b.n a1a6a │ │ + b.n a1a76 │ │ str r0, [r4, r0] │ │ - b.n a1a5c │ │ + b.n a1a68 │ │ asrs r7, r0, #32 │ │ - b.n a1fe8 │ │ + b.n a1ff4 │ │ strb r4, [r3, #0] │ │ - b.n a1a64 │ │ + b.n a1a70 │ │ asrs r5, r0, #32 │ │ - b.n a20f4 │ │ + b.n a2100 │ │ lsls r0, r1, #6 │ │ subs r2, #0 │ │ lsls r7, r7, #17 │ │ - b.n a2444 │ │ + b.n a2450 │ │ movs r0, r0 │ │ - b.n a2544 │ │ + b.n a2550 │ │ lsls r4, r2, #6 │ │ subs r2, #0 │ │ movs r1, r0 │ │ - b.n a23e6 │ │ + b.n a23f2 │ │ movs r1, r0 │ │ - b.n a2646 │ │ + b.n a2652 │ │ lsls r1, r2, #6 │ │ - bge.n a1f6a │ │ + bge.n a1f76 │ │ str r0, [sp, #144] @ 0x90 │ │ - b.n a1a88 │ │ + b.n a1a94 │ │ asrs r0, r0, #32 │ │ - b.n a2732 │ │ + b.n a273e │ │ str r0, [r3, r0] │ │ - b.n a1a9e │ │ + b.n a1aaa │ │ movs r0, #0 │ │ - b.n a273a │ │ + b.n a2746 │ │ str r0, [sp, #176] @ 0xb0 │ │ - b.n a1aa6 │ │ + b.n a1ab2 │ │ adds r3, #0 │ │ - b.n a2582 │ │ + b.n a258e │ │ adds r1, #0 │ │ - b.n a2616 │ │ + b.n a2622 │ │ movs r0, r0 │ │ - b.n a274a │ │ - add r0, pc, #0 @ (adr r0, a1f8c ) │ │ - b.n a26ce │ │ + b.n a2756 │ │ + add r0, pc, #0 @ (adr r0, a1f98 ) │ │ + b.n a26da │ │ strh r0, [r4, #0] │ │ - b.n a19a8 │ │ + b.n a19b4 │ │ asrs r1, r3, #22 │ │ - b.n a20da │ │ + b.n a20e6 │ │ asrs r1, r0, #18 │ │ - b.n a24bc │ │ + b.n a24c8 │ │ movs r0, #0 │ │ - b.n a2522 │ │ + b.n a252e │ │ adds r0, #3 │ │ - b.n a20c2 │ │ + b.n a20ce │ │ movs r0, r0 │ │ - b.n a2526 │ │ + b.n a2532 │ │ adds r0, #3 │ │ - b.n a204c │ │ + b.n a2058 │ │ movs r0, r0 │ │ - b.n a2152 │ │ + b.n a215e │ │ lsls r0, r2, #6 │ │ subs r2, #0 │ │ strb r4, [r3, #0] │ │ - b.n a1ade │ │ + b.n a1aea │ │ str r1, [r3, #120] @ 0x78 │ │ - b.n a20ba │ │ + b.n a20c6 │ │ lsls r2, r3, #30 │ │ - b.n a2012 │ │ + b.n a201e │ │ lsls r7, r7, #17 │ │ - b.n a24ae │ │ + b.n a24ba │ │ movs r0, r0 │ │ - b.n a25ba │ │ + b.n a25c6 │ │ lsls r5, r3, #6 │ │ subs r2, #0 │ │ lsrs r0, r0, #13 │ │ - b.n a1b0c │ │ + b.n a1b18 │ │ strh r4, [r1, #0] │ │ - b.n a2312 │ │ + b.n a231e │ │ movs r0, r0 │ │ - b.n a20f4 │ │ + b.n a2100 │ │ lsls r0, r2, #1 │ │ - b.n a1afa │ │ + b.n a1b06 │ │ asrs r0, r0, #32 │ │ - b.n a20ea │ │ + b.n a20f6 │ │ movs r0, r0 │ │ - b.n a24a2 │ │ + b.n a24ae │ │ asrs r1, r0, #32 │ │ - b.n a2468 │ │ + b.n a2474 │ │ movs r0, r0 │ │ - b.n a1fec │ │ + b.n a1ff8 │ │ asrs r1, r1, #32 │ │ - b.n a232e │ │ - ldmia r6!, {r0, r1, r2, r3, r4, r5, r7} │ │ + b.n a233a │ │ + ldmia r6, {r6, r7} │ │ @ instruction: 0xeb00c008 │ │ - b.n a2336 │ │ + b.n a2342 │ │ lsls r6, r0, #4 │ │ - b.n a269a │ │ + b.n a26a6 │ │ lsls r4, r6, #6 │ │ cmp r2, #0 │ │ movs r0, r4 │ │ - b.n a1b2a │ │ + b.n a1b36 │ │ str r7, [r0, #0] │ │ - b.n a2346 │ │ + b.n a2352 │ │ str r0, [sp, #144] @ 0x90 │ │ - b.n a1b32 │ │ + b.n a1b3e │ │ movs r5, r0 │ │ - b.n a22ae │ │ + b.n a22ba │ │ strh r0, [r4, #0] │ │ - b.n a1a48 │ │ + b.n a1a54 │ │ str r0, [r0, r0] │ │ strh r0, [r4, #12] │ │ movs r7, r0 │ │ - b.n a22cc │ │ + b.n a22d8 │ │ str r5, [r0, #0] │ │ strh r0, [r4, #12] │ │ movs r7, r0 │ │ - b.n a22cc │ │ + b.n a22d8 │ │ str r5, [r0, #0] │ │ str r1, [sp, #640] @ 0x280 │ │ movs r6, r0 │ │ - b.n a22dc │ │ + b.n a22e8 │ │ lsls r7, r2, #6 │ │ ldrh r0, [r0, #16] │ │ strb r4, [r4, #0] │ │ - b.n a1b6c │ │ + b.n a1b78 │ │ movs r6, r0 │ │ - b.n a22d6 │ │ + b.n a22e2 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ subs r0, r2, r4 │ │ - b.n a1b7c │ │ + b.n a1b88 │ │ asrs r1, r0, #32 │ │ - b.n a2160 │ │ + b.n a216c │ │ asrs r2, r3, #1 │ │ - b.n a1be8 │ │ + b.n a1bf4 │ │ movs r2, r0 │ │ - b.n a26ec │ │ + b.n a26f8 │ │ lsls r5, r5, #2 │ │ cmp r2, #0 │ │ str r0, [r4, #0] │ │ - b.n a1b5a │ │ + b.n a1b66 │ │ movs r0, #48 @ 0x30 │ │ - b.n a1b7e │ │ + b.n a1b8a │ │ lsls r0, r1, #1 │ │ - b.n a2562 │ │ + b.n a256e │ │ movs r1, r0 │ │ - b.n a2742 │ │ + b.n a274e │ │ movs r5, r6 │ │ lsrs r0, r0, #8 │ │ asrs r4, r4, #32 │ │ - b.n a1b8e │ │ + b.n a1b9a │ │ movs r1, r0 │ │ - b.n a230e │ │ + b.n a231a │ │ lsls r5, r4, #6 │ │ cmp r2, #0 │ │ movs r0, #96 @ 0x60 │ │ - b.n a1b9a │ │ + b.n a1ba6 │ │ movs r1, r0 │ │ - b.n a275a │ │ + b.n a2766 │ │ lsls r1, r6, #1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r4, #32 │ │ - b.n a1ba6 │ │ + b.n a1bb2 │ │ movs r1, r0 │ │ - b.n a2326 │ │ + b.n a2332 │ │ lsls r3, r1, #7 │ │ cmp r2, #0 │ │ lsrs r0, r3 │ │ - b.n a240a │ │ + b.n a2416 │ │ asrs r4, r0, #32 │ │ - b.n a213e │ │ + b.n a214a │ │ asrs r5, r0, #32 │ │ - b.n a2240 │ │ + b.n a224c │ │ lsls r5, r5, #6 │ │ subs r2, #0 │ │ mvns r0, r3 │ │ - b.n a241a │ │ - add r0, pc, #0 @ (adr r0, a209c ) │ │ - b.n a27de │ │ + b.n a2426 │ │ + add r0, pc, #0 @ (adr r0, a20a8 ) │ │ + b.n a27ea │ │ movs r4, r0 │ │ - b.n a2152 │ │ + b.n a215e │ │ movs r5, r0 │ │ - b.n a2254 │ │ + b.n a2260 │ │ lsls r1, r0, #2 │ │ cmp r2, #0 │ │ lsrs r0, r0, #12 │ │ - b.n a1bec │ │ - add r7, pc, #720 @ (adr r7, a2380 ) │ │ - b.n a26c2 │ │ + b.n a1bf8 │ │ + add r7, pc, #720 @ (adr r7, a238c ) │ │ + b.n a26ce │ │ add r7, sp, #1020 @ 0x3fc │ │ - b.n a2754 │ │ + b.n a2760 │ │ movs r0, r0 │ │ - b.n a21d8 │ │ + b.n a21e4 │ │ lsls r2, r3, #1 │ │ - b.n a1c5e │ │ + b.n a1c6a │ │ movs r2, r0 │ │ - b.n a2762 │ │ + b.n a276e │ │ lsls r2, r7, #1 │ │ subs r2, #0 │ │ subs r0, r5, r3 │ │ - b.n a1c08 │ │ + b.n a1c14 │ │ movs r2, #134 @ 0x86 │ │ - b.n a26ce │ │ + b.n a26da │ │ subs r2, #228 @ 0xe4 │ │ - b.n a1c10 │ │ + b.n a1c1c │ │ lsrs r4, r4, #11 │ │ - b.n a1c14 │ │ + b.n a1c20 │ │ asrs r1, r0, #32 │ │ - b.n a21f8 │ │ + b.n a2204 │ │ adds r0, #3 │ │ - b.n a21fc │ │ + b.n a2208 │ │ ands r0, r1 │ │ - b.n a1bfc │ │ + b.n a1c08 │ │ movs r0, r0 │ │ - b.n a2204 │ │ + b.n a2210 │ │ movs r0, r2 │ │ - b.n a1c04 │ │ + b.n a1c10 │ │ movs r2, r0 │ │ - b.n a282e │ │ + b.n a283a │ │ str r4, [r1, r0] │ │ - b.n a1c0c │ │ + b.n a1c18 │ │ lsls r7, r4, #6 │ │ and.w r9, r0, ip, ror #1 │ │ - b.n a1c38 │ │ - add r0, pc, #0 @ (adr r0, a20fc ) │ │ - b.n a28be │ │ + b.n a1c44 │ │ + add r0, pc, #0 @ (adr r0, a2108 ) │ │ + b.n a28ca │ │ movs r0, r0 │ │ - b.n a2220 │ │ + b.n a222c │ │ lsls r2, r3, #1 │ │ - b.n a1ca6 │ │ + b.n a1cb2 │ │ movs r2, r0 │ │ - b.n a27aa │ │ + b.n a27b6 │ │ lsls r0, r5, #1 │ │ subs r2, #0 │ │ adds r0, r5, r5 │ │ - b.n a1c50 │ │ + b.n a1c5c │ │ movs r0, r1 │ │ - b.n a2630 │ │ + b.n a263c │ │ subs r1, #100 @ 0x64 │ │ - b.n a1c58 │ │ + b.n a1c64 │ │ lsls r4, r4, #16 │ │ stmia.w r0, {r0, ip} │ │ - b.n a2240 │ │ + b.n a224c │ │ adds r0, #3 │ │ - b.n a2244 │ │ - add r0, pc, #80 @ (adr r0, a2178 ) │ │ - b.n a1c44 │ │ + b.n a2250 │ │ + add r0, pc, #80 @ (adr r0, a2184 ) │ │ + b.n a1c50 │ │ movs r2, r0 │ │ - b.n a286e │ │ + b.n a287a │ │ stmia r0!, {} │ │ - b.n a1c4c │ │ + b.n a1c58 │ │ cmp r6, #30 │ │ - b.n a2876 │ │ + b.n a2882 │ │ lsls r4, r3, #1 │ │ and.w r0, r0, r4, ror #4 │ │ - b.n a1c66 │ │ + b.n a1c72 │ │ movs r0, r0 │ │ - b.n a27e4 │ │ + b.n a27f0 │ │ asrs r2, r7, #10 │ │ lsls r4, r2, #7 │ │ movs r0, r0 │ │ lsls r1, r2, #13 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ movs r0, #208 @ 0xd0 │ │ - b.n a24d2 │ │ + b.n a24de │ │ asrs r3, r0, #32 │ │ - b.n a247a │ │ + b.n a2486 │ │ asrs r0, r7, #32 │ │ lsls r4, r2, #22 │ │ movs r0, r0 │ │ lsls r1, r2, #13 │ │ lsls r6, r2, #1 │ │ lsrs r0, r0, #8 │ │ lsrs r0, r7, #7 │ │ - b.n a1ca4 │ │ - add r7, pc, #720 @ (adr r7, a2438 ) │ │ - b.n a277a │ │ + b.n a1cb0 │ │ + add r7, pc, #720 @ (adr r7, a2444 ) │ │ + b.n a2786 │ │ add r7, sp, #1020 @ 0x3fc │ │ - b.n a280c │ │ + b.n a2818 │ │ movs r0, r0 │ │ - b.n a2290 │ │ + b.n a229c │ │ lsls r2, r3, #1 │ │ - b.n a1d16 │ │ + b.n a1d22 │ │ movs r2, r0 │ │ - b.n a281a │ │ + b.n a2826 │ │ lsls r4, r1, #1 │ │ subs r2, #0 │ │ adds r0, r4, r7 │ │ - b.n a1cc0 │ │ + b.n a1ccc │ │ movs r2, r0 │ │ - b.n a28c6 │ │ + b.n a28d2 │ │ subs r1, #220 @ 0xdc │ │ - b.n a1cc8 │ │ + b.n a1cd4 │ │ movs r2, #107 @ 0x6b │ │ - b.n a278e │ │ + b.n a279a │ │ ldr r0, [r3, r7] │ │ - b.n a1cd0 │ │ + b.n a1cdc │ │ asrs r1, r0, #32 │ │ - b.n a22b4 │ │ + b.n a22c0 │ │ adds r0, #3 │ │ - b.n a22b8 │ │ + b.n a22c4 │ │ stmia r0!, {} │ │ - b.n a1cb8 │ │ + b.n a1cc4 │ │ str r5, [r0, r0] │ │ - b.n a22c0 │ │ + b.n a22cc │ │ lsls r0, r0, #1 │ │ and.w r0, r0, r4, lsr #1 │ │ - b.n a284c │ │ + b.n a2858 │ │ lsls r4, r6, #1 │ │ asrs r1, r2, #13 │ │ vpmin.u8 q8, , │ │ lsrs r0, r5, #3 │ │ - b.n a1cf4 │ │ + b.n a1d00 │ │ str r4, [r1, r0] │ │ - b.n a24fa │ │ + b.n a2506 │ │ movs r0, r0 │ │ - b.n a22dc │ │ + b.n a22e8 │ │ lsls r2, r3, #1 │ │ - b.n a1d62 │ │ + b.n a1d6e │ │ movs r3, r0 │ │ - b.n a2866 │ │ + b.n a2872 │ │ lsls r1, r4, #6 │ │ subs r2, #0 │ │ adds r4, r2, r3 │ │ - b.n a1d0c │ │ + b.n a1d18 │ │ movs r3, r0 │ │ - b.n a2912 │ │ + b.n a291e │ │ subs r0, #208 @ 0xd0 │ │ - b.n a1d14 │ │ + b.n a1d20 │ │ asrs r1, r0, #32 │ │ - b.n a22f8 │ │ + b.n a2304 │ │ movs r0, #0 │ │ - b.n a1cf8 │ │ + b.n a1d04 │ │ adds r0, #3 │ │ - b.n a2300 │ │ + b.n a230c │ │ movs r0, #190 @ 0xbe │ │ - b.n a2926 │ │ - b.n a1a06 │ │ + b.n a2932 │ │ + b.n a1a12 │ │ @ instruction: 0xebffc005 │ │ - b.n a252e │ │ + b.n a253a │ │ lsrs r0, r7, #2 │ │ - b.n a1d30 │ │ + b.n a1d3c │ │ movs r0, r0 │ │ - b.n a2314 │ │ + b.n a2320 │ │ lsls r2, r3, #1 │ │ - b.n a1d9a │ │ + b.n a1da6 │ │ asrs r4, r6, #30 │ │ - b.n a280e │ │ + b.n a281a │ │ movs r2, r0 │ │ - b.n a28a2 │ │ + b.n a28ae │ │ subs r7, r7, #7 │ │ - b.n a28a4 │ │ - add r0, pc, #48 @ (adr r0, a2238 ) │ │ - b.n a270c │ │ + b.n a28b0 │ │ + add r0, pc, #48 @ (adr r0, a2244 ) │ │ + b.n a2718 │ │ movs r0, r5 │ │ subs r2, #0 │ │ adds r4, r3, r2 │ │ - b.n a1d50 │ │ + b.n a1d5c │ │ subs r0, #156 @ 0x9c │ │ - b.n a1d54 │ │ + b.n a1d60 │ │ lsls r0, r7, #22 │ │ - b.n a25c2 │ │ + b.n a25ce │ │ asrs r1, r0, #32 │ │ - b.n a233c │ │ + b.n a2348 │ │ cmp r0, #148 @ 0x94 │ │ - b.n a1d60 │ │ + b.n a1d6c │ │ adds r0, #3 │ │ - b.n a2344 │ │ + b.n a2350 │ │ movs r0, r1 │ │ - b.n a1d44 │ │ + b.n a1d50 │ │ movs r2, r0 │ │ - b.n a296e │ │ + b.n a297a │ │ movs r0, #2 │ │ - b.n a2350 │ │ + b.n a235c │ │ movs r0, #4 │ │ - b.n a1d50 │ │ + b.n a1d5c │ │ stmia r0!, {} │ │ - b.n a1d54 │ │ + b.n a1d60 │ │ movs r1, #235 @ 0xeb │ │ - b.n a283e │ │ + b.n a284a │ │ movs r2, r3 │ │ and.w r0, r0, r4, asr #5 │ │ - b.n a1d6e │ │ + b.n a1d7a │ │ movs r0, r0 │ │ - b.n a28ec │ │ + b.n a28f8 │ │ asrs r2, r7, #22 │ │ lsls r4, r2, #7 │ │ movs r0, r0 │ │ lsls r1, r2, #13 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ movs r3, #208 @ 0xd0 │ │ - b.n a25da │ │ + b.n a25e6 │ │ asrs r3, r0, #32 │ │ - b.n a2582 │ │ + b.n a258e │ │ asrs r0, r5, #1 │ │ lsls r4, r2, #22 │ │ movs r0, r0 │ │ lsls r1, r2, #13 │ │ movs r0, r3 │ │ lsrs r0, r0, #8 │ │ lsrs r0, r2, #4 │ │ - b.n a1dac │ │ - add r7, pc, #720 @ (adr r7, a2540 ) │ │ - b.n a2882 │ │ + b.n a1db8 │ │ + add r7, pc, #720 @ (adr r7, a254c ) │ │ + b.n a288e │ │ add r7, sp, #1020 @ 0x3fc │ │ - b.n a2914 │ │ + b.n a2920 │ │ movs r0, r0 │ │ - b.n a2398 │ │ + b.n a23a4 │ │ lsls r2, r3, #1 │ │ - b.n a1e1e │ │ + b.n a1e2a │ │ movs r2, r0 │ │ - b.n a2922 │ │ + b.n a292e │ │ movs r2, r1 │ │ subs r2, #0 │ │ adds r0, r7, r3 │ │ - b.n a1dc8 │ │ + b.n a1dd4 │ │ movs r2, r0 │ │ - b.n a29ce │ │ + b.n a29da │ │ subs r0, #244 @ 0xf4 │ │ - b.n a1dd0 │ │ + b.n a1ddc │ │ movs r2, #119 @ 0x77 │ │ - b.n a2896 │ │ + b.n a28a2 │ │ ldr r0, [r6, r3] │ │ - b.n a1dd8 │ │ + b.n a1de4 │ │ asrs r1, r0, #32 │ │ - b.n a23bc │ │ + b.n a23c8 │ │ adds r0, #3 │ │ - b.n a23c0 │ │ + b.n a23cc │ │ stmia r0!, {} │ │ - b.n a1dc0 │ │ + b.n a1dcc │ │ str r5, [r0, r0] │ │ - b.n a23c8 │ │ + b.n a23d4 │ │ str r4, [r0, r0] │ │ - b.n a1dc8 │ │ - b.n a2a6a │ │ + b.n a1dd4 │ │ + b.n a2a76 │ │ @ instruction: 0xebff000a │ │ - b.n a25f6 │ │ - beq.n a22f0 │ │ - b.n a2750 │ │ + b.n a2602 │ │ + beq.n a22fc │ │ + b.n a275c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, r4, r5, ip} │ │ - b.n a1dea │ │ + b.n a1df6 │ │ movs r0, r0 │ │ - b.n a2968 │ │ + b.n a2974 │ │ vpmin.u32 q8, q12, │ │ @ instruction: 0xffa4eaff │ │ asrs r4, r5, #1 │ │ - b.n a1dfa │ │ + b.n a1e06 │ │ movs r0, r0 │ │ - b.n a2978 │ │ + b.n a2984 │ │ vpmin.u32 q8, q13, │ │ @ instruction: 0xffe2eaff │ │ asrs r4, r3, #29 │ │ - b.n a1e20 │ │ + b.n a1e2c │ │ movs r1, r0 │ │ - b.n a2a26 │ │ + b.n a2a32 │ │ adds r7, #88 @ 0x58 │ │ - b.n a1e28 │ │ + b.n a1e34 │ │ cmp r7, #111 @ 0x6f │ │ - b.n a2a2e │ │ + b.n a2a3a │ │ asrs r1, r0, #32 │ │ - b.n a2410 │ │ + b.n a241c │ │ str r0, [r7, #12] │ │ - b.n a2690 │ │ + b.n a269c │ │ adds r0, #3 │ │ - b.n a2418 │ │ + b.n a2424 │ │ stmia r0!, {} │ │ - b.n a1e18 │ │ - b.n a2a92 │ │ + b.n a1e24 │ │ + b.n a2a9e │ │ @ instruction: 0xebfffedf │ │ @ instruction: 0xeaff1848 │ │ - b.n a1e48 │ │ + b.n a1e54 │ │ str r4, [r1, r0] │ │ - b.n a264e │ │ + b.n a265a │ │ subs r0, #68 @ 0x44 │ │ - b.n a1e50 │ │ + b.n a1e5c │ │ cmp r0, #68 @ 0x44 │ │ - b.n a1e54 │ │ + b.n a1e60 │ │ asrs r1, r0, #32 │ │ - b.n a2438 │ │ + b.n a2444 │ │ adds r0, #3 │ │ - b.n a243c │ │ + b.n a2448 │ │ movs r4, r1 │ │ - b.n a1e3c │ │ + b.n a1e48 │ │ movs r0, #2 │ │ - b.n a2444 │ │ + b.n a2450 │ │ movs r2, r0 │ │ - b.n a2a6a │ │ + b.n a2a76 │ │ lsls r4, r0, #1 │ │ @ instruction: 0xe98d2263 │ │ - b.n a2932 │ │ + b.n a293e │ │ stmia r0!, {} │ │ - b.n a1e50 │ │ - b.n a2aae │ │ + b.n a1e5c │ │ + b.n a2aba │ │ @ instruction: 0xebffc005 │ │ - b.n a267e │ │ + b.n a268a │ │ vpmin.u8 q15, q9, │ │ lsls r0, r3, #28 │ │ - b.n a1e84 │ │ + b.n a1e90 │ │ movs r0, r0 │ │ - b.n a2468 │ │ + b.n a2474 │ │ lsls r2, r3, #1 │ │ - b.n a1eee │ │ + b.n a1efa │ │ movs r2, r0 │ │ - b.n a29f2 │ │ + b.n a29fe │ │ lsls r1, r5, #4 │ │ cmp r2, #0 │ │ lsls r4, r6, #30 │ │ - b.n a296a │ │ + b.n a2976 │ │ movs r2, r0 │ │ - b.n a2a00 │ │ + b.n a2a0c │ │ lsrs r7, r7, #31 │ │ - b.n a2a00 │ │ - add r0, pc, #12 @ (adr r0, a2370 ) │ │ - b.n a2a66 │ │ - add r0, pc, #8 @ (adr r0, a2370 ) │ │ + b.n a2a0c │ │ + add r0, pc, #12 @ (adr r0, a237c ) │ │ + b.n a2a72 │ │ + add r0, pc, #8 @ (adr r0, a237c ) │ │ adds r3, #128 @ 0x80 │ │ @ instruction: 0xffd0eaff │ │ lsls r4, r2, #29 │ │ - b.n a1eb0 │ │ + b.n a1ebc │ │ blxns r6 │ │ - b.n a2986 │ │ - ldr r7, [pc, #1020] @ (a2774 ) │ │ - b.n a2a18 │ │ + b.n a2992 │ │ + ldr r7, [pc, #1020] @ (a2780 ) │ │ + b.n a2a24 │ │ movs r0, r0 │ │ - b.n a249c │ │ + b.n a24a8 │ │ lsls r2, r3, #1 │ │ - b.n a1f22 │ │ + b.n a1f2e │ │ movs r2, r0 │ │ - b.n a2a26 │ │ + b.n a2a32 │ │ lsls r0, r5, #1 │ │ subs r2, #0 │ │ asrs r4, r7, #28 │ │ - b.n a1ecc │ │ + b.n a1ed8 │ │ movs r2, r0 │ │ - b.n a2ad2 │ │ + b.n a2ade │ │ adds r7, #56 @ 0x38 │ │ - b.n a1ed4 │ │ + b.n a1ee0 │ │ movs r2, #1 │ │ - b.n a299a │ │ + b.n a29a6 │ │ stmia r0!, {} │ │ - b.n a1eb8 │ │ + b.n a1ec4 │ │ asrs r1, r0, #32 │ │ - b.n a24c0 │ │ + b.n a24cc │ │ adds r0, #3 │ │ - b.n a24c4 │ │ + b.n a24d0 │ │ movs r5, r1 │ │ and.w r6, r0, r8, lsr #2 │ │ - b.n a1eec │ │ + b.n a1ef8 │ │ blxns r6 │ │ - b.n a29c2 │ │ - ldr r7, [pc, #1020] @ (a27b0 ) │ │ - b.n a2a54 │ │ + b.n a29ce │ │ + ldr r7, [pc, #1020] @ (a27bc ) │ │ + b.n a2a60 │ │ movs r0, r0 │ │ - b.n a24d8 │ │ + b.n a24e4 │ │ lsls r2, r3, #1 │ │ - b.n a1f5e │ │ + b.n a1f6a │ │ movs r0, r0 │ │ - b.n a2a62 │ │ + b.n a2a6e │ │ lsls r1, r3, #1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #26 │ │ - b.n a1f08 │ │ + b.n a1f14 │ │ movs r1, r0 │ │ - b.n a2b0e │ │ + b.n a2b1a │ │ adds r6, #124 @ 0x7c │ │ - b.n a1f10 │ │ + b.n a1f1c │ │ movs r1, #193 @ 0xc1 │ │ - b.n a29d6 │ │ + b.n a29e2 │ │ asrs r1, r0, #32 │ │ - b.n a24f8 │ │ + b.n a2504 │ │ stmia r0!, {} │ │ - b.n a1ef8 │ │ + b.n a1f04 │ │ adds r0, #3 │ │ - b.n a2500 │ │ + b.n a250c │ │ str r4, [r0, r0] │ │ - b.n a1f00 │ │ + b.n a1f0c │ │ lsls r0, r1, #5 │ │ and.w r6, r0, r4, asr #1 │ │ - b.n a1f2c │ │ + b.n a1f38 │ │ blxns r6 │ │ - b.n a2a02 │ │ - ldr r7, [pc, #1020] @ (a27f0 ) │ │ - b.n a2a94 │ │ + b.n a2a0e │ │ + ldr r7, [pc, #1020] @ (a27fc ) │ │ + b.n a2aa0 │ │ movs r0, r0 │ │ - b.n a2518 │ │ + b.n a2524 │ │ lsls r2, r3, #1 │ │ - b.n a1f9e │ │ + b.n a1faa │ │ movs r0, r0 │ │ - b.n a2aa2 │ │ + b.n a2aae │ │ lsls r1, r1, #1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r1, #25 │ │ - b.n a1f48 │ │ + b.n a1f54 │ │ movs r1, r0 │ │ - b.n a2b4e │ │ + b.n a2b5a │ │ adds r6, #72 @ 0x48 │ │ - b.n a1f50 │ │ + b.n a1f5c │ │ movs r1, #198 @ 0xc6 │ │ - b.n a2a16 │ │ + b.n a2a22 │ │ asrs r1, r0, #32 │ │ - b.n a2538 │ │ + b.n a2544 │ │ stmia r0!, {} │ │ - b.n a1f38 │ │ + b.n a1f44 │ │ adds r0, #3 │ │ - b.n a2540 │ │ + b.n a254c │ │ lsls r1, r7, #4 │ │ and.w r6, r0, r0, lsl #1 │ │ - b.n a1f68 │ │ - add r0, pc, #0 @ (adr r0, a242c ) │ │ - b.n a2bee │ │ + b.n a1f74 │ │ + add r0, pc, #0 @ (adr r0, a2438 ) │ │ + b.n a2bfa │ │ movs r0, r0 │ │ - b.n a2550 │ │ + b.n a255c │ │ lsls r2, r3, #1 │ │ - b.n a1fd6 │ │ + b.n a1fe2 │ │ movs r2, r0 │ │ - b.n a2ada │ │ + b.n a2ae6 │ │ @ instruction: 0xff9c3aff │ │ asrs r4, r5, #24 │ │ - b.n a1f80 │ │ + b.n a1f8c │ │ movs r2, r0 │ │ - b.n a2b86 │ │ + b.n a2b92 │ │ adds r6, #40 @ 0x28 │ │ - b.n a1f88 │ │ + b.n a1f94 │ │ movs r1, #215 @ 0xd7 │ │ - b.n a2a4e │ │ + b.n a2a5a │ │ asrs r1, r0, #32 │ │ - b.n a2570 │ │ + b.n a257c │ │ stmia r0!, {} │ │ - b.n a1f70 │ │ + b.n a1f7c │ │ adds r0, #3 │ │ - b.n a2578 │ │ + b.n a2584 │ │ @ instruction: 0xff93eaff │ │ adds r1, #0 │ │ - b.n a2a64 │ │ + b.n a2a70 │ │ adds r5, r7, #6 │ │ - b.n a2a78 │ │ + b.n a2a84 │ │ subs r7, #76 @ 0x4c │ │ - b.n a2b06 │ │ + b.n a2b12 │ │ adds r5, r4, r5 │ │ - b.n a2af8 │ │ + b.n a2b04 │ │ adds r0, #3 │ │ - b.n a2b78 │ │ + b.n a2b84 │ │ asrs r1, r0, #32 │ │ - b.n a24c4 │ │ + b.n a24d0 │ │ adds r0, #3 │ │ - b.n a24c6 │ │ + b.n a24d2 │ │ asrs r1, r0, #32 │ │ - b.n a27a4 │ │ + b.n a27b0 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ asrs r6, r7, #1 │ │ - b.n a288a │ │ + b.n a2896 │ │ movs r0, r1 │ │ - b.n a2b2c │ │ + b.n a2b38 │ │ mcr2 10, 3, r0, cr13, cr15, {7} @ │ │ lsls r0, r6, #23 │ │ - b.n a1fd0 │ │ + b.n a1fdc │ │ asrs r4, r6, #30 │ │ - b.n a2aa6 │ │ + b.n a2ab2 │ │ subs r7, r7, #7 │ │ - b.n a2b38 │ │ - add r0, pc, #48 @ (adr r0, a24cc ) │ │ - b.n a29a0 │ │ + b.n a2b44 │ │ + add r0, pc, #48 @ (adr r0, a24d8 ) │ │ + b.n a29ac │ │ movs r0, r0 │ │ - b.n a25c0 │ │ + b.n a25cc │ │ lsls r2, r3, #1 │ │ - b.n a2046 │ │ + b.n a2052 │ │ movs r2, r0 │ │ - b.n a2b4a │ │ + b.n a2b56 │ │ @ instruction: 0xff803aff │ │ asrs r4, r2, #23 │ │ - b.n a1ff0 │ │ + b.n a1ffc │ │ adds r5, #212 @ 0xd4 │ │ - b.n a1ff4 │ │ + b.n a2000 │ │ lsls r4, r2, #23 │ │ - b.n a1ff8 │ │ + b.n a2004 │ │ asrs r1, r0, #32 │ │ - b.n a25dc │ │ + b.n a25e8 │ │ adds r0, #3 │ │ - b.n a25e0 │ │ + b.n a25ec │ │ stmia r0!, {} │ │ - b.n a1fe0 │ │ + b.n a1fec │ │ movs r0, r0 │ │ - b.n a25e8 │ │ + b.n a25f4 │ │ movs r5, r0 │ │ @ instruction: 0xe98d0002 │ │ - b.n a2c12 │ │ + b.n a2c1e │ │ movs r1, #230 @ 0xe6 │ │ - b.n a2ad6 │ │ + b.n a2ae2 │ │ vpmin.u q15, q10, │ │ lsls r4, r6, #22 │ │ - b.n a201c │ │ - add r0, pc, #0 @ (adr r0, a24e0 ) │ │ - b.n a2ca2 │ │ + b.n a2028 │ │ + add r0, pc, #0 @ (adr r0, a24ec ) │ │ + b.n a2cae │ │ movs r0, r0 │ │ - b.n a2604 │ │ + b.n a2610 │ │ lsls r2, r3, #1 │ │ - b.n a208a │ │ + b.n a2096 │ │ movs r2, r0 │ │ - b.n a2b8e │ │ + b.n a2b9a │ │ vpmin.u32 , , │ │ asrs r0, r4, #22 │ │ - b.n a2034 │ │ + b.n a2040 │ │ movs r2, r0 │ │ - b.n a2c3a │ │ + b.n a2c46 │ │ adds r5, #156 @ 0x9c │ │ - b.n a203c │ │ + b.n a2048 │ │ movs r1, #246 @ 0xf6 │ │ - b.n a2b02 │ │ + b.n a2b0e │ │ asrs r1, r0, #32 │ │ - b.n a2624 │ │ + b.n a2630 │ │ strh r0, [r7, #6] │ │ - b.n a28a4 │ │ + b.n a28b0 │ │ adds r0, #3 │ │ - b.n a262c │ │ + b.n a2638 │ │ lsls r0, r4, #2 │ │ and.w r5, r0, r4, asr #2 │ │ - b.n a2054 │ │ + b.n a2060 │ │ blxns r6 │ │ - b.n a2b2a │ │ - ldr r7, [pc, #1020] @ (a2918 ) │ │ - b.n a2bbc │ │ + b.n a2b36 │ │ + ldr r7, [pc, #1020] @ (a2924 ) │ │ + b.n a2bc8 │ │ movs r0, r0 │ │ - b.n a2640 │ │ + b.n a264c │ │ lsls r2, r3, #1 │ │ - b.n a20c6 │ │ + b.n a20d2 │ │ movs r2, r0 │ │ - b.n a2bca │ │ + b.n a2bd6 │ │ lsls r7, r5, #3 │ │ cmp r2, #0 │ │ - add r0, pc, #12 @ (adr r0, a253c ) │ │ - b.n a2c3a │ │ + add r0, pc, #12 @ (adr r0, a2548 ) │ │ + b.n a2c46 │ │ vpmin.u16 q15, q15, │ │ lsls r0, r3, #22 │ │ - b.n a2078 │ │ - add r7, pc, #720 @ (adr r7, a280c ) │ │ - b.n a2b4e │ │ + b.n a2084 │ │ + add r7, pc, #720 @ (adr r7, a2818 ) │ │ + b.n a2b5a │ │ add r7, sp, #1020 @ 0x3fc │ │ - b.n a2be0 │ │ + b.n a2bec │ │ movs r0, r0 │ │ - b.n a2664 │ │ + b.n a2670 │ │ lsls r2, r3, #1 │ │ - b.n a20ea │ │ + b.n a20f6 │ │ movs r2, r0 │ │ - b.n a2bee │ │ + b.n a2bfa │ │ vpmin.u16 , , │ │ asrs r0, r0, #22 │ │ - b.n a2094 │ │ + b.n a20a0 │ │ movs r2, r0 │ │ - b.n a2c9a │ │ + b.n a2ca6 │ │ adds r5, #124 @ 0x7c │ │ - b.n a209c │ │ + b.n a20a8 │ │ stmia r0!, {} │ │ - b.n a207c │ │ + b.n a2088 │ │ asrs r1, r0, #32 │ │ - b.n a2684 │ │ + b.n a2690 │ │ movs r0, #4 │ │ - b.n a2084 │ │ + b.n a2090 │ │ adds r0, #3 │ │ - b.n a268c │ │ + b.n a2698 │ │ movs r2, #6 │ │ - b.n a2b72 │ │ + b.n a2b7e │ │ vpmin.u8 q15, , │ │ movs r4, r2 │ │ - b.n a209a │ │ + b.n a20a6 │ │ asrs r6, r0, #32 │ │ - b.n a28be │ │ + b.n a28ca │ │ stmia r0!, {r5} │ │ - b.n a1f98 │ │ - ldrb r7, [r7, #19] │ │ + b.n a1fa4 │ │ + ldrb r0, [r0, #20] │ │ add.w r0, r0, r0 │ │ - b.n a2c2a │ │ + b.n a2c36 │ │ lsls r3, r2, #4 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ ldmia.w r6, {r2, r3, r4, ip, sp, lr} │ │ - b.n a20d0 │ │ + b.n a20dc │ │ str r0, [r4, r0] │ │ - b.n a20d4 │ │ + b.n a20e0 │ │ asrs r7, r0, #32 │ │ - b.n a263e │ │ + b.n a264a │ │ asrs r5, r0, #32 │ │ - b.n a2746 │ │ + b.n a2752 │ │ lsls r7, r1, #4 │ │ subs r2, #0 │ │ movs r0, #36 @ 0x24 │ │ - b.n a20d2 │ │ + b.n a20de │ │ stmia r0!, {r5} │ │ - b.n a1fe4 │ │ + b.n a1ff0 │ │ mcr2 10, 3, lr, cr7, cr15, {7} @ │ │ lsls r0, r5, #20 │ │ - b.n a20f4 │ │ + b.n a2100 │ │ add r1, sp, #188 @ 0xbc │ │ - b.n a2bca │ │ + b.n a2bd6 │ │ add r7, sp, #1020 @ 0x3fc │ │ - b.n a2c5c │ │ + b.n a2c68 │ │ movs r0, r0 │ │ - b.n a26e0 │ │ + b.n a26ec │ │ lsls r2, r3, #1 │ │ - b.n a2166 │ │ + b.n a2172 │ │ movs r2, r0 │ │ - b.n a2c6a │ │ + b.n a2c76 │ │ vpmin.u , q12, │ │ asrs r0, r2, #20 │ │ - b.n a2110 │ │ + b.n a211c │ │ adds r5, #16 │ │ - b.n a2114 │ │ + b.n a2120 │ │ movs r0, #28 │ │ - b.n a2114 │ │ + b.n a2120 │ │ asrs r1, r0, #32 │ │ - b.n a26fc │ │ + b.n a2708 │ │ movs r0, r4 │ │ - b.n a211c │ │ + b.n a2128 │ │ adds r0, #3 │ │ - b.n a2704 │ │ + b.n a2710 │ │ movs r0, #8 │ │ - b.n a2104 │ │ + b.n a2110 │ │ movs r2, #23 │ │ - b.n a2bee │ │ + b.n a2bfa │ │ movs r4, r1 │ │ - b.n a210c │ │ + b.n a2118 │ │ lsls r6, r4, #1 │ │ @ instruction: 0xea0084fc │ │ - b.n a2138 │ │ + b.n a2144 │ │ lsls r1, r3, #22 │ │ - b.n a2708 │ │ + b.n a2714 │ │ str r7, [r7, #68] @ 0x44 │ │ - b.n a2dc2 │ │ + b.n a2dce │ │ strh r0, [r1, #0] │ │ - b.n a2724 │ │ + b.n a2730 │ │ asrs r1, r0, #32 │ │ - b.n a26b6 │ │ + b.n a26c2 │ │ ldrb r7, [r7, #31] │ │ - b.n a2c1c │ │ + b.n a2c28 │ │ adds r0, #90 @ 0x5a │ │ - b.n a21c2 │ │ + b.n a21ce │ │ asrs r2, r0, #32 │ │ - b.n a27c4 │ │ + b.n a27d0 │ │ lsls r0, r4, #1 │ │ subs r2, #0 │ │ str r4, [r1, #0] │ │ - b.n a295e │ │ + b.n a296a │ │ movs r1, r0 │ │ - b.n a2cc8 │ │ + b.n a2cd4 │ │ lsls r4, r7, #2 │ │ ldrh r0, [r0, #16] │ │ lsls r7, r7, #17 │ │ - b.n a2d6a │ │ + b.n a2d76 │ │ asrs r1, r1, #32 │ │ - b.n a296e │ │ - ldmia r5, {r0, r1, r2, r3, r5} │ │ + b.n a297a │ │ + ldmia r5, {r4, r5} │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n a2976 │ │ + b.n a2982 │ │ stmia r0!, {r1, r2} │ │ - b.n a297a │ │ + b.n a2986 │ │ str r0, [r3, r0] │ │ - b.n a2146 │ │ + b.n a2152 │ │ mrc2 10, 2, lr, cr11, cr15, {7} @ │ │ lsls r0, r3, #19 │ │ - b.n a2184 │ │ + b.n a2190 │ │ asrs r1, r0, #32 │ │ - b.n a2af6 │ │ + b.n a2b02 │ │ adds r2, r0, r4 │ │ - b.n a2c02 │ │ + b.n a2c0e │ │ movs r0, r0 │ │ - b.n a2770 │ │ + b.n a277c │ │ lsls r2, r3, #1 │ │ - b.n a21f6 │ │ + b.n a2202 │ │ movs r0, r4 │ │ subs r2, #0 │ │ blxns r6 │ │ - b.n a2c6e │ │ + b.n a2c7a │ │ movs r2, r0 │ │ - b.n a2d02 │ │ - ldr r7, [pc, #1020] @ (a2a60 ) │ │ - b.n a2d04 │ │ + b.n a2d0e │ │ + ldr r7, [pc, #1020] @ (a2a6c ) │ │ + b.n a2d10 │ │ lsls r0, r2, #1 │ │ subs r2, #0 │ │ asrs r4, r6, #18 │ │ - b.n a21ac │ │ + b.n a21b8 │ │ movs r2, r0 │ │ - b.n a2db2 │ │ + b.n a2dbe │ │ adds r4, #176 @ 0xb0 │ │ - b.n a21b4 │ │ + b.n a21c0 │ │ movs r2, #59 @ 0x3b │ │ - b.n a2c7a │ │ + b.n a2c86 │ │ str r0, [r1, #0] │ │ - b.n a2198 │ │ + b.n a21a4 │ │ asrs r1, r0, #32 │ │ - b.n a27a0 │ │ + b.n a27ac │ │ adds r0, #3 │ │ - b.n a27a4 │ │ - add r0, pc, #48 @ (adr r0, a26b8 ) │ │ - b.n a21a4 │ │ + b.n a27b0 │ │ + add r0, pc, #48 @ (adr r0, a26c4 ) │ │ + b.n a21b0 │ │ lsls r7, r1, #3 │ │ and.w r4, r0, r0, ror #2 │ │ - b.n a21d0 │ │ - add r7, pc, #720 @ (adr r7, a2964 ) │ │ - b.n a2ca6 │ │ + b.n a21dc │ │ + add r7, pc, #720 @ (adr r7, a2970 ) │ │ + b.n a2cb2 │ │ add r7, sp, #1020 @ 0x3fc │ │ - b.n a2d38 │ │ + b.n a2d44 │ │ movs r0, r0 │ │ - b.n a27bc │ │ + b.n a27c8 │ │ lsls r2, r3, #1 │ │ - b.n a2242 │ │ + b.n a224e │ │ movs r2, r0 │ │ - b.n a2d46 │ │ + b.n a2d52 │ │ vpmin.u8 , , │ │ asrs r0, r3, #18 │ │ - b.n a21ec │ │ + b.n a21f8 │ │ movs r2, r0 │ │ - b.n a2df2 │ │ + b.n a2dfe │ │ adds r4, #148 @ 0x94 │ │ - b.n a21f4 │ │ + b.n a2200 │ │ movs r2, #93 @ 0x5d │ │ - b.n a2cba │ │ + b.n a2cc6 │ │ asrs r1, r0, #32 │ │ - b.n a27dc │ │ + b.n a27e8 │ │ stmia r0!, {} │ │ - b.n a21dc │ │ + b.n a21e8 │ │ adds r0, #3 │ │ - b.n a27e4 │ │ + b.n a27f0 │ │ str r0, [sp, #16] │ │ - b.n a21e4 │ │ + b.n a21f0 │ │ str r0, [r1, #0] │ │ - b.n a21e8 │ │ + b.n a21f4 │ │ mrc2 10, 7, lr, cr6, cr15, {7} @ │ │ lsls r4, r7, #16 │ │ - b.n a2214 │ │ + b.n a2220 │ │ movs r0, r0 │ │ - b.n a27f8 │ │ + b.n a2804 │ │ lsls r2, r3, #1 │ │ - b.n a227e │ │ + b.n a228a │ │ strh r4, [r1, #0] │ │ - b.n a2a22 │ │ + b.n a2a2e │ │ movs r1, r0 │ │ - b.n a2d86 │ │ + b.n a2d92 │ │ lsls r3, r3, #1 │ │ ldrh r0, [r0, #16] │ │ lsls r7, r7, #17 │ │ - b.n a2e2e │ │ + b.n a2e3a │ │ asrs r1, r1, #32 │ │ - b.n a2a32 │ │ - ldmia r4, {r1, r2, r3, r4, r5, r6, r7} │ │ + b.n a2a3e │ │ + ldmia r4, {r0, r1, r2, r3, r4, r5, r6, r7} │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n a2a3a │ │ + b.n a2a46 │ │ stmia r0!, {r3} │ │ - b.n a2a3e │ │ + b.n a2a4a │ │ strb r4, [r3, #0] │ │ - b.n a220a │ │ + b.n a2216 │ │ mrc2 10, 1, lr, cr13, cr15, {7} @ │ │ lsls r4, r4, #17 │ │ - b.n a2248 │ │ - add r7, pc, #720 @ (adr r7, a29dc ) │ │ - b.n a2d1e │ │ + b.n a2254 │ │ + add r7, pc, #720 @ (adr r7, a29e8 ) │ │ + b.n a2d2a │ │ add r7, sp, #1020 @ 0x3fc │ │ - b.n a2db0 │ │ + b.n a2dbc │ │ movs r0, r0 │ │ - b.n a2834 │ │ + b.n a2840 │ │ lsls r2, r3, #1 │ │ - b.n a22ba │ │ + b.n a22c6 │ │ movs r2, r0 │ │ - b.n a2dbe │ │ + b.n a2dca │ │ mcr2 10, 7, r3, cr3, cr15, {7} @ │ │ asrs r4, r1, #17 │ │ - b.n a2264 │ │ + b.n a2270 │ │ adds r4, #76 @ 0x4c │ │ - b.n a2268 │ │ + b.n a2274 │ │ lsls r4, r1, #17 │ │ - b.n a226c │ │ + b.n a2278 │ │ asrs r1, r0, #32 │ │ - b.n a2850 │ │ + b.n a285c │ │ adds r0, #3 │ │ - b.n a2854 │ │ + b.n a2860 │ │ stmia r0!, {} │ │ - b.n a2254 │ │ + b.n a2260 │ │ movs r0, r0 │ │ - b.n a285c │ │ + b.n a2868 │ │ movs r5, r0 │ │ @ instruction: 0xe98d0002 │ │ - b.n a2e86 │ │ + b.n a2e92 │ │ movs r2, #111 @ 0x6f │ │ - b.n a2d4a │ │ + b.n a2d56 │ │ mrc2 10, 6, lr, cr7, cr15, {7} @ │ │ lsls r4, r1, #17 │ │ - b.n a2290 │ │ - add r7, pc, #720 @ (adr r7, a2a24 ) │ │ - b.n a2d66 │ │ + b.n a229c │ │ + add r7, pc, #720 @ (adr r7, a2a30 ) │ │ + b.n a2d72 │ │ add r7, sp, #1020 @ 0x3fc │ │ - b.n a2df8 │ │ + b.n a2e04 │ │ movs r0, r0 │ │ - b.n a287c │ │ + b.n a2888 │ │ lsls r2, r3, #1 │ │ - b.n a2302 │ │ + b.n a230e │ │ movs r2, r0 │ │ - b.n a2e06 │ │ + b.n a2e12 │ │ mrc2 10, 6, r3, cr1, cr15, {7} @ │ │ asrs r4, r6, #16 │ │ - b.n a22ac │ │ + b.n a22b8 │ │ cmp r5, #10 │ │ - b.n a2eb2 │ │ + b.n a2ebe │ │ adds r4, #48 @ 0x30 │ │ - b.n a22b4 │ │ + b.n a22c0 │ │ lsls r0, r6, #16 │ │ - b.n a22b8 │ │ + b.n a22c4 │ │ asrs r1, r0, #32 │ │ - b.n a289c │ │ + b.n a28a8 │ │ adds r0, #3 │ │ - b.n a28a0 │ │ + b.n a28ac │ │ ands r0, r1 │ │ - b.n a22a0 │ │ + b.n a22ac │ │ movs r0, r0 │ │ - b.n a28a8 │ │ + b.n a28b4 │ │ movs r0, r2 │ │ - b.n a22a8 │ │ + b.n a22b4 │ │ str r4, [r1, r0] │ │ - b.n a22ac │ │ + b.n a22b8 │ │ movs r2, r0 │ │ - b.n a2ed6 │ │ + b.n a2ee2 │ │ stmia r0!, {} │ │ - b.n a22b4 │ │ + b.n a22c0 │ │ mcr2 10, 6, lr, cr3, cr15, {7} @ │ │ blxns r6 │ │ - b.n a2db2 │ │ + b.n a2dbe │ │ movs r2, r0 │ │ - b.n a2e4c │ │ - ldr r7, [pc, #1020] @ (a2ba4 ) │ │ - b.n a2e48 │ │ + b.n a2e58 │ │ + ldr r7, [pc, #1020] @ (a2bb0 ) │ │ + b.n a2e54 │ │ lsls r7, r7, #1 │ │ cmp r2, #0 │ │ - add r0, pc, #8 @ (adr r0, a27b8 ) │ │ - b.n a2eba │ │ + add r0, pc, #8 @ (adr r0, a27c4 ) │ │ + b.n a2ec6 │ │ mrc2 10, 5, lr, cr14, cr15, {7} @ │ │ lsls r4, r2, #15 │ │ - b.n a22f8 │ │ - add r7, pc, #720 @ (adr r7, a2a8c ) │ │ - b.n a2dce │ │ + b.n a2304 │ │ + add r7, pc, #720 @ (adr r7, a2a98 ) │ │ + b.n a2dda │ │ add r7, sp, #1020 @ 0x3fc │ │ - b.n a2e60 │ │ + b.n a2e6c │ │ movs r0, r0 │ │ - b.n a28e4 │ │ + b.n a28f0 │ │ lsls r2, r3, #1 │ │ - b.n a236a │ │ + b.n a2376 │ │ movs r2, r0 │ │ - b.n a2e6e │ │ + b.n a2e7a │ │ mrc2 10, 5, r3, cr7, cr15, {7} @ │ │ asrs r4, r7, #14 │ │ - b.n a2314 │ │ + b.n a2320 │ │ adds r3, #188 @ 0xbc │ │ - b.n a2318 │ │ + b.n a2324 │ │ lsls r4, r7, #14 │ │ - b.n a231c │ │ + b.n a2328 │ │ asrs r1, r0, #32 │ │ - b.n a2900 │ │ + b.n a290c │ │ adds r0, #3 │ │ - b.n a2904 │ │ + b.n a2910 │ │ stmia r0!, {} │ │ - b.n a2304 │ │ + b.n a2310 │ │ movs r0, r0 │ │ - b.n a290c │ │ + b.n a2918 │ │ movs r5, r0 │ │ @ instruction: 0xe98d0002 │ │ - b.n a2f36 │ │ + b.n a2f42 │ │ movs r2, #123 @ 0x7b │ │ - b.n a2dfa │ │ + b.n a2e06 │ │ mcr2 10, 5, lr, cr11, cr15, {7} @ │ │ asrs r0, r4, #9 │ │ - b.n a2340 │ │ + b.n a234c │ │ movs r2, r0 │ │ - b.n a2f46 │ │ + b.n a2f52 │ │ adds r2, #92 @ 0x5c │ │ - b.n a2348 │ │ + b.n a2354 │ │ cmp r7, #115 @ 0x73 │ │ - b.n a2f4e │ │ + b.n a2f5a │ │ asrs r1, r0, #32 │ │ - b.n a2930 │ │ + b.n a293c │ │ stmia r0!, {} │ │ - b.n a2330 │ │ + b.n a233c │ │ adds r0, #3 │ │ - b.n a2938 │ │ + b.n a2944 │ │ str r4, [r0, r0] │ │ - b.n a2338 │ │ + b.n a2344 │ │ str r6, [r1, r0] │ │ - b.n a2b62 │ │ - b.n a2d24 │ │ + b.n a2b6e │ │ + b.n a2d30 │ │ @ instruction: 0xebff002c │ │ - b.n a2352 │ │ + b.n a235e │ │ asrs r0, r4, #2 │ │ - b.n a2838 │ │ + b.n a2844 │ │ movs r1, r0 │ │ - b.n a28b2 │ │ + b.n a28be │ │ asrs r1, r1, #32 │ │ - b.n a2836 │ │ + b.n a2842 │ │ lsls r0, r4, #4 │ │ - b.n a284c │ │ + b.n a2858 │ │ movs r0, r0 │ │ - b.n a2940 │ │ + b.n a294c │ │ lsls r0, r4, #8 │ │ - b.n a2942 │ │ + b.n a294e │ │ movs r2, r1 │ │ - b.n a2846 │ │ + b.n a2852 │ │ lsrs r0, r2, #2 │ │ - b.n a284a │ │ + b.n a2856 │ │ adds r0, r4, #0 │ │ - b.n a2b8e │ │ + b.n a2b9a │ │ mcr2 10, 6, lr, cr0, cr15, {7} @ │ │ stmia r0!, {r0, r2} │ │ - b.n a2b96 │ │ + b.n a2ba2 │ │ mcr2 10, 3, lr, cr7, cr15, {7} @ │ │ asrs r4, r1, #11 │ │ - b.n a239c │ │ + b.n a23a8 │ │ movs r2, #66 @ 0x42 │ │ - b.n a2e62 │ │ + b.n a2e6e │ │ adds r2, #200 @ 0xc8 │ │ - b.n a23a4 │ │ + b.n a23b0 │ │ movs r4, r3 │ │ - b.n a23a4 │ │ + b.n a23b0 │ │ asrs r1, r0, #32 │ │ - b.n a298c │ │ + b.n a2998 │ │ movs r0, r2 │ │ - b.n a238c │ │ + b.n a2398 │ │ adds r0, #3 │ │ - b.n a2994 │ │ + b.n a29a0 │ │ movs r0, r4 │ │ - b.n a23b4 │ │ + b.n a23c0 │ │ movs r4, r2 │ │ - b.n a2398 │ │ + b.n a23a4 │ │ movs r2, r0 │ │ - b.n a2fc2 │ │ + b.n a2fce │ │ str r0, [r1, #0] │ │ - b.n a23a0 │ │ - add r0, pc, #48 @ (adr r0, a28b8 ) │ │ - b.n a23a4 │ │ + b.n a23ac │ │ + add r0, pc, #48 @ (adr r0, a28c4 ) │ │ + b.n a23b0 │ │ strh r0, [r0, #0] │ │ - b.n a23a8 │ │ - b.n a2d5a │ │ + b.n a23b4 │ │ + b.n a2d66 │ │ @ instruction: 0xebff102c │ │ - b.n a23be │ │ + b.n a23ca │ │ lsls r7, r7, #17 │ │ - b.n a2fda │ │ - ldmia r4, {r2, r4, r7} │ │ + b.n a2fe6 │ │ + ldmia r4, {r0, r2, r4, r7} │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n a2be2 │ │ + b.n a2bee │ │ lsls r4, r1, #10 │ │ - b.n a23e4 │ │ + b.n a23f0 │ │ movs r0, r0 │ │ - b.n a29c8 │ │ + b.n a29d4 │ │ lsls r2, r3, #1 │ │ - b.n a244e │ │ + b.n a245a │ │ movs r2, r0 │ │ - b.n a2f52 │ │ + b.n a2f5e │ │ @ instruction: 0xff903aff │ │ asrs r4, r7, #9 │ │ - b.n a23f8 │ │ + b.n a2404 │ │ adds r2, #124 @ 0x7c │ │ - b.n a23fc │ │ + b.n a2408 │ │ movs r4, r3 │ │ - b.n a23ea │ │ + b.n a23f6 │ │ asrs r1, r0, #32 │ │ - b.n a29e4 │ │ + b.n a29f0 │ │ movs r2, #116 @ 0x74 │ │ - b.n a2408 │ │ + b.n a2414 │ │ adds r0, #3 │ │ - b.n a29ec │ │ + b.n a29f8 │ │ movs r4, r1 │ │ - b.n a23ec │ │ + b.n a23f8 │ │ movs r2, r0 │ │ - b.n a3016 │ │ + b.n a3022 │ │ movs r0, #2 │ │ - b.n a29f8 │ │ + b.n a2a04 │ │ strh r0, [r0, #0] │ │ - b.n a23f8 │ │ + b.n a2404 │ │ lsls r4, r0, #2 │ │ @ instruction: 0xe98d224a │ │ - b.n a2ee6 │ │ - b.n a2d86 │ │ + b.n a2ef2 │ │ + b.n a2d92 │ │ @ instruction: 0xebffff82 │ │ @ instruction: 0xeaff11cc │ │ - b.n a2430 │ │ + b.n a243c │ │ movs r2, r0 │ │ - b.n a3036 │ │ + b.n a3042 │ │ adds r1, #200 @ 0xc8 │ │ - b.n a2438 │ │ + b.n a2444 │ │ movs r1, #251 @ 0xfb │ │ - b.n a2efe │ │ + b.n a2f0a │ │ stmia r0!, {} │ │ - b.n a241c │ │ + b.n a2428 │ │ asrs r1, r0, #32 │ │ - b.n a2a24 │ │ + b.n a2a30 │ │ adds r0, #3 │ │ - b.n a2a28 │ │ + b.n a2a34 │ │ strb r4, [r0, #0] │ │ - b.n a2428 │ │ - b.n a2d9a │ │ + b.n a2434 │ │ + b.n a2da6 │ │ @ instruction: 0xebffa003 │ │ - b.n a2e1e │ │ + b.n a2e2a │ │ mcr2 10, 3, lr, cr5, cr15, {7} @ │ │ asrs r4, r3, #7 │ │ - b.n a245c │ │ + b.n a2468 │ │ movs r2, #37 @ 0x25 │ │ - b.n a2f22 │ │ + b.n a2f2e │ │ adds r1, #216 @ 0xd8 │ │ - b.n a2464 │ │ + b.n a2470 │ │ movs r0, r1 │ │ - b.n a2444 │ │ + b.n a2450 │ │ asrs r1, r0, #32 │ │ - b.n a2a4c │ │ + b.n a2a58 │ │ movs r4, r3 │ │ - b.n a246c │ │ + b.n a2478 │ │ adds r0, #3 │ │ - b.n a2a54 │ │ + b.n a2a60 │ │ movs r0, r2 │ │ - b.n a2454 │ │ + b.n a2460 │ │ movs r0, r4 │ │ - b.n a2478 │ │ + b.n a2484 │ │ movs r4, r2 │ │ - b.n a245c │ │ + b.n a2468 │ │ movs r2, r0 │ │ - b.n a3086 │ │ + b.n a3092 │ │ str r4, [r1, r0] │ │ - b.n a2464 │ │ + b.n a2470 │ │ str r0, [r0, #0] │ │ - b.n a2468 │ │ - b.n a2dba │ │ + b.n a2474 │ │ + b.n a2dc6 │ │ @ instruction: 0xebff902c │ │ - b.n a247e │ │ + b.n a248a │ │ lsls r7, r7, #17 │ │ - b.n a309a │ │ + b.n a30a6 │ │ asrs r1, r1, #32 │ │ - b.n a2c9e │ │ - ldmia r4!, {r0, r1, r5, r6} │ │ + b.n a2caa │ │ + ldmia r4!, {r2, r5, r6} │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n a2ca6 │ │ + b.n a2cb2 │ │ lsls r2, r3, #1 │ │ - b.n a251a │ │ + b.n a2526 │ │ movs r2, r0 │ │ - b.n a300e │ │ + b.n a301a │ │ vpmin.u , q8, │ │ asrs r4, r1, #6 │ │ - b.n a24b4 │ │ + b.n a24c0 │ │ adds r1, #140 @ 0x8c │ │ - b.n a24b8 │ │ + b.n a24c4 │ │ movs r0, r3 │ │ - b.n a24a6 │ │ + b.n a24b2 │ │ asrs r1, r0, #32 │ │ - b.n a2aa0 │ │ + b.n a2aac │ │ movs r1, #132 @ 0x84 │ │ - b.n a24c4 │ │ + b.n a24d0 │ │ adds r0, #3 │ │ - b.n a2aa8 │ │ + b.n a2ab4 │ │ movs r4, r1 │ │ - b.n a24a8 │ │ + b.n a24b4 │ │ movs r2, r0 │ │ - b.n a30d2 │ │ + b.n a30de │ │ movs r0, #2 │ │ - b.n a2ab4 │ │ + b.n a2ac0 │ │ str r0, [r0, #0] │ │ - b.n a24b4 │ │ + b.n a24c0 │ │ movs r4, r4 │ │ @ instruction: 0xe98d222d │ │ - b.n a2fa2 │ │ - b.n a2de4 │ │ + b.n a2fae │ │ + b.n a2df0 │ │ @ instruction: 0xebff902c │ │ - b.n a24d2 │ │ + b.n a24de │ │ vpmin.u32 q7, , │ │ asrs r4, r4, #5 │ │ - b.n a24f0 │ │ + b.n a24fc │ │ cmp r6, #35 @ 0x23 │ │ - b.n a30f6 │ │ + b.n a3102 │ │ adds r1, #96 @ 0x60 │ │ - b.n a24f8 │ │ + b.n a2504 │ │ asrs r1, r0, #32 │ │ - b.n a2adc │ │ + b.n a2ae8 │ │ movs r0, r1 │ │ - b.n a24dc │ │ + b.n a24e8 │ │ adds r0, #3 │ │ - b.n a2ae4 │ │ + b.n a2af0 │ │ movs r2, r0 │ │ - b.n a310a │ │ + b.n a3116 │ │ str r4, [r1, r0] │ │ - b.n a24e8 │ │ + b.n a24f4 │ │ stmia r0!, {} │ │ - b.n a24ec │ │ - b.n a2dfc │ │ + b.n a24f8 │ │ + b.n a2e08 │ │ @ instruction: 0xebffa002 │ │ - b.n a2ee2 │ │ + b.n a2eee │ │ mrc2 10, 1, lr, cr4, cr15, {7} @ │ │ - add r0, pc, #0 @ (adr r0, a29e0 ) │ │ - b.n a2d22 │ │ + add r0, pc, #0 @ (adr r0, a29ec ) │ │ + b.n a2d2e │ │ mrc2 10, 1, lr, cr2, cr15, {7} @ │ │ asrs r0, r0, #4 │ │ - b.n a2528 │ │ - add r7, pc, #720 @ (adr r7, a2cbc ) │ │ - b.n a2ffe │ │ + b.n a2534 │ │ + add r7, pc, #720 @ (adr r7, a2cc8 ) │ │ + b.n a300a │ │ add r7, sp, #1020 @ 0x3fc │ │ - b.n a3090 │ │ + b.n a309c │ │ asrs r1, r0, #32 │ │ - b.n a2b14 │ │ + b.n a2b20 │ │ asrs r2, r3, #1 │ │ - b.n a259c │ │ + b.n a25a8 │ │ movs r2, r0 │ │ - b.n a30a0 │ │ + b.n a30ac │ │ mcr2 10, 1, r3, cr11, cr15, {7} @ │ │ asrs r0, r5, #3 │ │ - b.n a2544 │ │ + b.n a2550 │ │ adds r0, #232 @ 0xe8 │ │ - b.n a2548 │ │ + b.n a2554 │ │ strb r4, [r3, #0] │ │ - b.n a2548 │ │ + b.n a2554 │ │ asrs r1, r0, #32 │ │ - b.n a2b30 │ │ + b.n a2b3c │ │ strb r0, [r1, #0] │ │ - b.n a2530 │ │ + b.n a253c │ │ adds r0, #3 │ │ - b.n a2b38 │ │ + b.n a2b44 │ │ strb r0, [r4, #0] │ │ - b.n a2558 │ │ + b.n a2564 │ │ movs r0, r2 │ │ - b.n a253c │ │ + b.n a2548 │ │ movs r0, r4 │ │ - b.n a245c │ │ + b.n a2468 │ │ movs r0, #20 │ │ - b.n a2544 │ │ + b.n a2550 │ │ movs r2, #18 │ │ - b.n a302e │ │ + b.n a303a │ │ movs r0, r0 │ │ - b.n a254c │ │ + b.n a2558 │ │ movs r2, r0 │ │ - b.n a3176 │ │ + b.n a3182 │ │ strb r4, [r1, #0] │ │ - b.n a2554 │ │ + b.n a2560 │ │ mrc2 10, 0, lr, cr11, cr15, {7} @ │ │ - ldmia r1!, {r2, r4, r6, r7} │ │ - movs r3, r0 │ │ - strh r2, [r4, #20] │ │ - vqshlu.s32 d29, d0, #22 │ │ - vsri.64 d28, d4, #10 │ │ - movs r3, r0 │ │ - strh r2, [r7, #12] │ │ - vtbl.8 d27, {d6-d8}, d25 │ │ - vsri.32 q14, q2, #10 │ │ - movs r3, r0 │ │ - strh r2, [r7, #10] │ │ - vqrdmlah.s , q11, d4[0] │ │ - vrinta.f16 d28, d4 │ │ - movs r3, r0 │ │ - ldrb r2, [r0, #22] │ │ - vqrdmulh.s , q3, d20[0] │ │ - vsri.32 d28, d12, #10 │ │ - movs r3, r0 │ │ - strh r2, [r0, #10] │ │ - vrintm.f16 d23, d18 │ │ - vrint?.f16 q14, q6 │ │ - movs r3, r0 │ │ - strh r2, [r6, #34] @ 0x22 │ │ - @ instruction: 0xfff67c94 │ │ - vsubw.u q14, q11, d28 │ │ - movs r3, r0 │ │ - strh r6, [r2, #6] │ │ - vtrn.16 q13, │ │ - vsli.64 d24, d6, #54 @ 0x36 │ │ - @ instruction: 0xfff6c368 │ │ - movs r3, r0 │ │ - strh r6, [r1, #4] │ │ - vcvt.u32.f32 d24, d28, #10 │ │ - vqshlu.s64 d28, d0, #54 @ 0x36 │ │ - movs r3, r0 │ │ - strh r7, [r7, #62] @ 0x3e │ │ - @ instruction: 0xfff66e9a │ │ - vqshlu.s32 q14, q4, #22 │ │ - movs r3, r0 │ │ - strh r6, [r6, #26] │ │ - vsubw.u q13, q11, d5 │ │ - vrintn.f16 , q6 │ │ - vshll.i16 q14, d28, #16 │ │ - movs r3, r0 │ │ - ldrb r6, [r1, #18] │ │ - vcvt.u16.f16 q12, , #10 │ │ - vsri.64 q14, q0, #10 │ │ - movs r3, r0 │ │ - strh r2, [r6, #14] │ │ - vrshr.u32 d26, d18, #10 │ │ - vshll.i16 q14, d8, #16 │ │ - movs r3, r0 │ │ - strh r6, [r5, #0] │ │ - vqrdmulh.s q13, q11, d6[0] │ │ - vqmovn.s32 d28, q6 │ │ - movs r3, r0 │ │ - ldrb r6, [r6, #30] │ │ - vcvt.u16.f16 , , #10 │ │ - vcvt.f32.u32 , q4, #10 │ │ - movs r3, r0 │ │ - ldrb r2, [r0, #14] │ │ - @ instruction: 0xfff673e2 │ │ - vqmovun.s32 d28, q4 │ │ + ldmia r1!, {r3, r5, r6, r7} │ │ movs r3, r0 │ │ - ldrb r6, [r4, #17] │ │ - vsri.64 , , #10 │ │ - vcvt.f16.u16 d23, d2, #10 │ │ - vtbx.8 d21, {d22-d23}, d26 │ │ - vuzp.16 q13, q7 │ │ - vqrshrun.s64 d28, q12, #10 │ │ + strh r5, [r1, #22] │ │ + vqshlu.s64 d29, d10, #54 @ 0x36 │ │ + vrintx.f16 d28, d24 │ │ + movs r3, r0 │ │ + strh r5, [r4, #14] │ │ + @ instruction: 0xfff6bb11 │ │ + vrintn.f16 q14, q12 │ │ + movs r3, r0 │ │ + strh r5, [r4, #12] │ │ + vqrdmlsh.s , q3, d13[0] │ │ + vsli.32 d28, d8, #22 │ │ + movs r3, r0 │ │ + ldrb r5, [r5, #22] │ │ + vcvt.u16.f16 , , #10 │ │ + vsri.32 d28, d16, #10 │ │ + movs r3, r0 │ │ + strh r5, [r5, #10] │ │ + vqshl.u32 , , #22 │ │ + vrint?.f16 q14, q8 │ │ + movs r3, r0 │ │ + strh r5, [r3, #36] @ 0x24 │ │ + vcvt.u16.f16 , , #10 │ │ + @ instruction: 0xfff6c3c0 │ │ movs r3, r0 │ │ - stmia r1!, {r2, r4, r5, r6} │ │ + strh r1, [r0, #8] │ │ + vshr.u64 q13, q12, #10 │ │ + vrinta.f16 d24, d2 │ │ + vrsra.u32 q14, q14, #10 │ │ + movs r3, r0 │ │ + strh r1, [r7, #4] │ │ + vcvt.f32.u32 q12, , #10 │ │ + vrintm.f16 d28, d20 │ │ + movs r3, r0 │ │ + strh r3, [r5, #58] @ 0x3a │ │ + @ instruction: 0xfff66db8 │ │ + vcvt.bf16.f32 d28, q14 │ │ + movs r3, r0 │ │ + strh r1, [r4, #28] │ │ + vrsra.u64 d26, d4, #10 │ │ + vsri.32 d25, d16, #10 │ │ + @ instruction: 0xfff6c340 │ │ + movs r3, r0 │ │ + ldrb r1, [r7, #18] │ │ + vcvt.u16.f16 q12, , #10 │ │ + vrintx.f16 q14, q10 │ │ + movs r3, r0 │ │ + strh r5, [r3, #16] │ │ + vqmovun.s32 d26, │ │ + vrsra.u32 d28, d12, #10 │ │ + movs r3, r0 │ │ + strh r1, [r3, #2] │ │ + @ instruction: 0xfff6aefa │ │ + vqmovn.s32 d28, q8 │ │ movs r3, r0 │ │ - ldrb r6, [r2, #15] │ │ - vaddl.u q14, d6, d23 │ │ - vsra.u64 q14, q14, #10 │ │ - movs r3, r0 │ │ - ldrb r2, [r2, #28] │ │ - vuzp.16 d22, d23 │ │ - @ instruction: 0xfff67d26 │ │ - vtbx.8 d25, {d6}, d2 │ │ - @ instruction: 0xfff6bfa4 │ │ - movs r3, r0 │ │ - ldrb r6, [r1, #19] │ │ - vtbl.8 d21, {d22-d24}, d22 │ │ - @ instruction: 0xfff68dd9 │ │ - vsra.u64 d28, d16, #10 │ │ - movs r3, r0 │ │ - ldrb r6, [r2, #27] │ │ - @ instruction: 0xfff65d0e │ │ - vtbl.8 d28, {d6}, d12 │ │ + ldrb r1, [r4, #31] │ │ + @ instruction: 0xfff65da1 │ │ + vqrdmlah.s , q3, d28[0] │ │ movs r3, r0 │ │ - strh r2, [r7, #18] │ │ - vqrdmlsh.s , q11, d18[0] │ │ - vuzp.16 , q7 │ │ - vqshlu.s64 q14, q6, #54 @ 0x36 │ │ - movs r3, r0 │ │ - strh r6, [r7, #30] │ │ - @ instruction: 0xfff67c9e │ │ - vqrdmulh.s q13, q11, d0[0] │ │ - vsra.u32 d28, d24, #10 │ │ - movs r3, r0 │ │ - ldrb r2, [r4, #25] │ │ - @ instruction: 0xfff65cda │ │ - vtbl.8 d26, {d6}, d20 │ │ - vsli.64 q14, q2, #54 @ 0x36 │ │ - movs r3, r0 │ │ - strh r6, [r6, #22] │ │ - vcvt.bf16.f32 d25, │ │ - vrsra.u64 , q2, #10 │ │ - vtrn.16 d28, d8 │ │ - movs r3, r0 │ │ - ldrb r2, [r6, #22] │ │ - vdup.16 d21, d26[1] │ │ - @ instruction: 0xfff68e90 │ │ - vshr.u64 q14, q8, #10 │ │ - movs r3, r0 │ │ - ldrb r6, [r2, #24] │ │ - vsra.u32 d27, d24, #10 │ │ - vqshl.u64 q13, q4, #54 @ 0x36 │ │ - vqshl.u64 d28, d4, #54 @ 0x36 │ │ + ldrb r5, [r5, #14] │ │ + vrintx.f16 d23, d27 │ │ + vrshr.u32 q14, q6, #10 │ │ + movs r3, r0 │ │ + ldrb r1, [r2, #18] │ │ + vsli.64 , , #54 @ 0x36 │ │ + vcvt.f16.u16 d23, d29, #10 │ │ + vshll.u32 , d16, #22 │ │ + vuzp.16 q13, │ │ + vtbl.8 d28, {d22}, d12 │ │ + movs r3, r0 │ │ + stmia r1!, {r3, r7} │ │ + movs r3, r0 │ │ + ldrb r1, [r0, #16] │ │ + vsra.u64 q14, q13, #10 │ │ + vrshr.u32 d28, d0, #10 │ │ + movs r3, r0 │ │ + ldrb r5, [r7, #28] │ │ + vuzp.16 q11, │ │ + vcvt.u16.f16 , , #10 │ │ + vtbl.8 d25, {d6}, d8 │ │ + @ instruction: 0xfff6bfb8 │ │ + movs r3, r0 │ │ + ldrb r1, [r7, #19] │ │ + vtbx.8 d21, {d22-d24}, d28 │ │ + @ instruction: 0xfff68dbd │ │ + vzip.16 q14, q2 │ │ + movs r3, r0 │ │ + ldrb r1, [r0, #28] │ │ + vcvt.u16.f16 , q2, #10 │ │ + vtbl.8 d28, {d6}, d16 │ │ + movs r3, r0 │ │ + strh r5, [r4, #20] │ │ + vmla.i q14, q3, d27[0] │ │ + vshr.u64 d25, d1, #10 │ │ + vqshlu.s64 q14, q8, #54 @ 0x36 │ │ + movs r3, r0 │ │ + strh r1, [r5, #32] │ │ + vqrdmulh.s , q3, d23[0] │ │ + vcvt.f32.u32 d26, d23, #10 │ │ + vuzp.16 q14, q6 │ │ + movs r3, r0 │ │ + ldrb r5, [r1, #26] │ │ + @ instruction: 0xfff65d20 │ │ + @ instruction: 0xfff6a89b │ │ + vrintz.f16 q14, q12 │ │ + movs r3, r0 │ │ + strh r1, [r4, #24] │ │ + vcvt.bf16.f32 d25, │ │ + vrsra.u64 d25, d24, #10 │ │ + vshr.u64 d28, d12, #10 │ │ + movs r3, r0 │ │ + ldrb r5, [r3, #23] │ │ + vcvt.f16.u16 , q8, #10 │ │ + vcvt.f32.u32 q12, q10, #10 │ │ + vuzp.16 d28, d4 │ │ movs r3, r0 │ │ - strh r2, [r7, #36] @ 0x24 │ │ - vqshl.u64 , q6, #54 @ 0x36 │ │ - vsli.64 d25, d8, #54 @ 0x36 │ │ + ldrb r1, [r0, #25] │ │ + vmovn.i32 d27, │ │ + vtbx.8 d26, {d6}, d15 │ │ + vrintp.f16 d28, d24 │ │ + movs r3, r0 │ │ + strh r5, [r4, #38] @ 0x26 │ │ + vtbl.8 d27, {d22}, d29 │ │ + vsli.32 , q14, #22 │ │ @ instruction: 0xfff64ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n a30e4 │ │ - beq.n a2c24 │ │ - b.n a3068 │ │ + b.n a30f0 │ │ + beq.n a2c30 │ │ + b.n a3074 │ │ strb r0, [r1, #0] │ │ - b.n a2708 │ │ + b.n a2714 │ │ str r0, [sp, #12] │ │ - b.n a2f16 │ │ + b.n a2f22 │ │ str r0, [r0, #8] │ │ - b.n a26fa │ │ + b.n a2706 │ │ ands r2, r0 │ │ - b.n a2f1e │ │ + b.n a2f2a │ │ strh r1, [r0, #0] │ │ - b.n a2f22 │ │ + b.n a2f2e │ │ str r0, [r0, r0] │ │ - b.n a2f26 │ │ + b.n a2f32 │ │ movs r0, r0 │ │ - b.n a328c │ │ + b.n a3298 │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n a32a0 │ │ + b.n a32ac │ │ movs r7, r0 │ │ - b.n a2f36 │ │ + b.n a2f42 │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n a2728 │ │ + b.n a2734 │ │ movs r4, r2 │ │ - b.n a3102 │ │ + b.n a310e │ │ adds r0, #208 @ 0xd0 │ │ - b.n a3106 │ │ + b.n a3112 │ │ movs r5, r0 │ │ - b.n a2f4a │ │ + b.n a2f56 │ │ asrs r6, r0, #32 │ │ - b.n a2f4e │ │ + b.n a2f5a │ │ movs r0, #8 │ │ - b.n a2f52 │ │ - add r4, sl │ │ + b.n a2f5e │ │ + add r5, sl │ │ add.w r4, r0, r4, ror #1 │ │ - b.n a2758 │ │ - add r0, pc, #80 @ (adr r0, a2c6c ) │ │ - b.n a312a │ │ + b.n a2764 │ │ + add r0, pc, #80 @ (adr r0, a2c78 ) │ │ + b.n a3136 │ │ movs r0, r0 │ │ - b.n a32d0 │ │ + b.n a32dc │ │ lsrs r4, r0 │ │ - b.n a2732 │ │ + b.n a273e │ │ movs r0, r0 │ │ - b.n a2d48 │ │ + b.n a2d54 │ │ str r0, [sp, #800] @ 0x320 │ │ - b.n a273a │ │ + b.n a2746 │ │ lsls r0, r0, #1 │ │ - b.n a3132 │ │ + b.n a313e │ │ ands r4, r2 │ │ - b.n a2750 │ │ + b.n a275c │ │ lsrs r7, r5, #11 │ │ orn r0, r0, #6946816 @ 0x6a0000 │ │ - b.n a314a │ │ + b.n a3156 │ │ ands r4, r3 │ │ - b.n a274e │ │ + b.n a275a │ │ str r0, [sp, #128] @ 0x80 │ │ - b.n a2752 │ │ + b.n a275e │ │ lsrs r7, r1, #10 │ │ orr.w r0, r0, #12976128 @ 0xc60000 │ │ lsrs r0, r0, #8 │ │ movs r4, r2 │ │ - b.n a278c │ │ + b.n a2798 │ │ ands r1, r1 │ │ - b.n a2f96 │ │ + b.n a2fa2 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n a2f7a │ │ + b.n a2f86 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n a33a2 │ │ + b.n a33ae │ │ asrs r0, r0, #32 │ │ - b.n a3426 │ │ + b.n a3432 │ │ movs r0, r1 │ │ - b.n a2784 │ │ + b.n a2790 │ │ movs r5, r0 │ │ - b.n a2fae │ │ + b.n a2fba │ │ movs r0, #0 │ │ - b.n a33b2 │ │ + b.n a33be │ │ adds r0, #0 │ │ - b.n a33b6 │ │ + b.n a33c2 │ │ strb r0, [r0, #0] │ │ - b.n a2794 │ │ + b.n a27a0 │ │ asrs r4, r0, #32 │ │ - b.n a2798 │ │ - add r5, pc, #64 @ (adr r5, a2cc0 ) │ │ + b.n a27a4 │ │ + add r5, pc, #68 @ (adr r5, a2cd0 ) │ │ add.w r0, r0, r0 │ │ - b.n a3326 │ │ + b.n a3332 │ │ lsls r3, r4, #3 │ │ subs r0, r0, r0 │ │ lsls r4, r2, #16 │ │ - b.n a27cc │ │ + b.n a27d8 │ │ movs r0, #96 @ 0x60 │ │ - b.n a33d2 │ │ + b.n a33de │ │ movs r0, r0 │ │ - b.n a2db4 │ │ + b.n a2dc0 │ │ lsls r1, r3, #1 │ │ - b.n a283a │ │ + b.n a2846 │ │ lsls r0, r0, #1 │ │ - b.n a32be │ │ + b.n a32ca │ │ lsls r0, r2, #3 │ │ asrs r7, r0, #7 │ │ lsls r0, r6, #3 │ │ asrs r2, r1, #7 │ │ asrs r4, r2, #32 │ │ - b.n a31be │ │ + b.n a31ca │ │ movs r0, r2 │ │ - b.n a27dc │ │ + b.n a27e8 │ │ movs r0, r2 │ │ - b.n a27c6 │ │ + b.n a27d2 │ │ movs r4, r2 │ │ - b.n a31c4 │ │ + b.n a31d0 │ │ lsrs r5, r1, #10 │ │ orn r0, r0, #8388608 @ 0x800000 │ │ - b.n a27de │ │ + b.n a27ea │ │ lsrs r5, r1, #10 │ │ orr.w r0, r1, #8388608 @ 0x800000 │ │ - b.n a27c8 │ │ + b.n a27d4 │ │ movs r0, r5 │ │ - b.n a31de │ │ + b.n a31ea │ │ asrs r0, r5, #32 │ │ - b.n a31dc │ │ - ldmia r1!, {r0, r2, r3, r4, r5, r6} │ │ - @ instruction: 0xfb000088 │ │ - b.n a31e4 │ │ + b.n a31e8 │ │ + stmia r7!, {r0, r1, r2, r4, r6, r7} │ │ + @ instruction: 0xfa000088 │ │ + b.n a31f0 │ │ asrs r0, r4, #32 │ │ - b.n a341a │ │ + b.n a3426 │ │ lsrs r5, r1, #10 │ │ orn r0, r0, #278528 @ 0x44000 │ │ - b.n a31f6 │ │ + b.n a3202 │ │ movs r0, r0 │ │ - b.n a3398 │ │ + b.n a33a4 │ │ str r0, [sp, #16] │ │ - b.n a302a │ │ + b.n a3036 │ │ cmp r2, #129 @ 0x81 │ │ orn sl, r0, #4620288 @ 0x468000 │ │ orr.w sl, r2, #264192 @ 0x40800 │ │ orr.w r0, r2, #6815744 @ 0x680000 │ │ - b.n a307a │ │ + b.n a3086 │ │ lsls r0, r6, #3 │ │ - b.n a3082 │ │ + b.n a308e │ │ movs r1, r3 │ │ lsrs r0, r0, #8 │ │ lsls r0, r2, #23 │ │ - b.n a309a │ │ + b.n a30a6 │ │ movs r1, r0 │ │ - b.n a302a │ │ + b.n a3036 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ lsrs r0, r2, #3 │ │ - b.n a30a6 │ │ + b.n a30b2 │ │ movs r1, r0 │ │ - b.n a3036 │ │ + b.n a3042 │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ lsls r0, r4, #1 │ │ - b.n a2852 │ │ + b.n a285e │ │ movs r1, r0 │ │ - b.n a3402 │ │ + b.n a340e │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ and.w r0, r0, r0, rrx │ │ - b.n a2862 │ │ + b.n a286e │ │ movs r1, r0 │ │ - b.n a3412 │ │ + b.n a341e │ │ @ instruction: 0xfff50aff │ │ lsls r0, r2, #3 │ │ - b.n a30c8 │ │ + b.n a30d4 │ │ lsls r0, r6, #3 │ │ - b.n a30d2 │ │ + b.n a30de │ │ movs r0, r0 │ │ - b.n a3482 │ │ + b.n a348e │ │ asrs r0, r0, #32 │ │ - b.n a3506 │ │ + b.n a3512 │ │ movs r0, r1 │ │ - b.n a2864 │ │ + b.n a2870 │ │ movs r5, r0 │ │ - b.n a308e │ │ + b.n a309a │ │ movs r0, #0 │ │ - b.n a3492 │ │ + b.n a349e │ │ adds r0, #0 │ │ - b.n a3496 │ │ - add r0, pc, #0 @ (adr r0, a2d58 ) │ │ - b.n a2874 │ │ + b.n a34a2 │ │ + add r0, pc, #0 @ (adr r0, a2d64 ) │ │ + b.n a2880 │ │ asrs r4, r0, #32 │ │ - b.n a2878 │ │ - add r4, pc, #864 @ (adr r4, a30c0 ) │ │ + b.n a2884 │ │ + add r4, pc, #868 @ (adr r4, a30d0 ) │ │ add.w r0, r0, r0 │ │ - b.n a3406 │ │ + b.n a3412 │ │ lsls r6, r2, #2 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n a341e │ │ + b.n a342a │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ ands r2, r1 │ │ - b.n a30b6 │ │ + b.n a30c2 │ │ lsls r0, r2, #3 │ │ - b.n a28e2 │ │ + b.n a28ee │ │ movs r6, r1 │ │ @ instruction: 0xe9940000 │ │ - b.n a3086 │ │ + b.n a3092 │ │ asrs r1, r0, #32 │ │ - b.n a308c │ │ + b.n a3098 │ │ movs r1, r0 │ │ - b.n a30aa │ │ + b.n a30b6 │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ movs r0, r3 │ │ - b.n a32ac │ │ + b.n a32b8 │ │ asrs r5, r0, #32 │ │ - b.n a30d6 │ │ - cmp r7, r4 │ │ + b.n a30e2 │ │ + cmp r0, r5 │ │ add.w r0, r0, r8, lsr #32 │ │ - b.n a32b8 │ │ + b.n a32c4 │ │ lsrs r7, r1, #11 │ │ orn sl, r0, #4685824 @ 0x478000 │ │ orr.w r0, r4, #8388608 @ 0x800000 │ │ - b.n a356a │ │ + b.n a3576 │ │ asrs r2, r1, #32 │ │ - b.n a30ee │ │ + b.n a30fa │ │ lsls r4, r7, #2 │ │ - b.n a28be │ │ + b.n a28ca │ │ movs r0, #6 │ │ - b.n a30f6 │ │ + b.n a3102 │ │ lsls r0, r0, #3 │ │ - b.n a28c6 │ │ + b.n a28d2 │ │ movs r0, r0 │ │ - b.n a34fe │ │ + b.n a350a │ │ movs r0, r0 │ │ - b.n a28dc │ │ + b.n a28e8 │ │ movs r5, r0 │ │ - b.n a3106 │ │ + b.n a3112 │ │ adds r0, #8 │ │ - b.n a310a │ │ + b.n a3116 │ │ @ instruction: 0xfbd1ebff │ │ movs r1, r0 │ │ - b.n a3252 │ │ + b.n a325e │ │ movs r2, r0 │ │ - b.n a34b6 │ │ + b.n a34c2 │ │ lsls r7, r6, #1 │ │ subs r2, #0 │ │ movs r0, r0 │ │ - b.n a348c │ │ + b.n a3498 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ movs r2, r1 │ │ - b.n a3126 │ │ + b.n a3132 │ │ asrs r7, r0, #32 │ │ - b.n a312a │ │ + b.n a3136 │ │ movs r0, #224 @ 0xe0 │ │ - b.n a352e │ │ - bvs.n a2d26 │ │ + b.n a353a │ │ + bvs.n a2d34 │ │ add.w r0, r0, r0 │ │ - b.n a3496 │ │ + b.n a34a2 │ │ lsls r1, r3, #1 │ │ lsrs r0, r0, #8 │ │ str r4, [r2, #0] │ │ - b.n a2918 │ │ + b.n a2924 │ │ lsls r0, r1, #1 │ │ - b.n a292c │ │ + b.n a2938 │ │ asrs r6, r0, #32 │ │ - b.n a29b0 │ │ + b.n a29bc │ │ strb r0, [r7, #10] │ │ - b.n a2948 │ │ + b.n a2954 │ │ lsls r0, r7, #1 │ │ - b.n a330e │ │ + b.n a331a │ │ movs r0, r1 │ │ - b.n a3434 │ │ + b.n a3440 │ │ strb r7, [r0, #0] │ │ - b.n a2f34 │ │ + b.n a2f40 │ │ movs r6, r3 │ │ subs r0, r0, r0 │ │ movs r0, #208 @ 0xd0 │ │ - b.n a319e │ │ + b.n a31aa │ │ str r1, [r0, #0] │ │ - b.n a3346 │ │ + b.n a3352 │ │ strb r0, [r0, #0] │ │ - b.n a336c │ │ + b.n a3378 │ │ adds r0, #0 │ │ - b.n a356a │ │ + b.n a3576 │ │ str r0, [r6, #12] │ │ - b.n a31ae │ │ + b.n a31ba │ │ asrs r4, r3, #1 │ │ - b.n a29dc │ │ + b.n a29e8 │ │ movs r0, #8 │ │ - b.n a2960 │ │ + b.n a296c │ │ movs r4, r5 │ │ - b.n a2964 │ │ + b.n a2970 │ │ asrs r0, r3 │ │ - b.n a317e │ │ + b.n a318a │ │ ands r0, r0 │ │ - b.n a295c │ │ + b.n a2968 │ │ adds r0, #4 │ │ - b.n a2960 │ │ + b.n a296c │ │ asrs r4, r2, #32 │ │ - b.n a2984 │ │ - lsls r5, r7 │ │ + b.n a2990 │ │ + lsls r6, r7 │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n a3192 │ │ + b.n a319e │ │ movs r0, r0 │ │ - b.n a34f6 │ │ + b.n a3502 │ │ lsls r4, r2, #1 │ │ subs r0, r0, r0 │ │ movs r4, r2 │ │ - b.n a2988 │ │ + b.n a2994 │ │ ands r0, r0 │ │ - b.n a35a2 │ │ + b.n a35ae │ │ asrs r4, r5, #32 │ │ - b.n a2990 │ │ + b.n a299c │ │ movs r0, r0 │ │ - b.n a310c │ │ + b.n a3118 │ │ lsls r7, r1, #1 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #1 │ │ - b.n a299c │ │ + b.n a29a8 │ │ asrs r2, r1, #32 │ │ - b.n a35b6 │ │ + b.n a35c2 │ │ cmp r0, #216 @ 0xd8 │ │ - b.n a31fa │ │ + b.n a3206 │ │ str r1, [r0, #0] │ │ - b.n a33a2 │ │ + b.n a33ae │ │ strb r0, [r0, #0] │ │ - b.n a33c8 │ │ + b.n a33d4 │ │ ldr r0, [r7, #12] │ │ - b.n a3206 │ │ + b.n a3212 │ │ movs r4, r2 │ │ - b.n a29b4 │ │ - beq.n a2ec4 │ │ - b.n a3324 │ │ - ldr r7, [pc, #960] @ (a3250 ) │ │ - ldmia.w sp!, {r1, r2, r7, lr} │ │ + b.n a29c0 │ │ + beq.n a2ed0 │ │ + b.n a3330 │ │ + ldr r7, [pc, #960] @ (a325c ) │ │ + ldmia.w sp!, {r0, r1, r2, r7, lr} │ │ and.w r0, r0, r8, lsr #11 │ │ - b.n a321a │ │ + b.n a3226 │ │ str r0, [r1, #0] │ │ - b.n a31de │ │ + b.n a31ea │ │ strh r1, [r0, #0] │ │ - b.n a33c6 │ │ + b.n a33d2 │ │ str r0, [sp, #0] │ │ - b.n a33ec │ │ + b.n a33f8 │ │ strh r0, [r7, #6] │ │ - b.n a322a │ │ + b.n a3236 │ │ asrs r4, r3, #1 │ │ - b.n a2a58 │ │ + b.n a2a64 │ │ movs r0, #36 @ 0x24 │ │ - b.n a29e6 │ │ + b.n a29f2 │ │ adds r0, #80 @ 0x50 │ │ - b.n a29e4 │ │ + b.n a29f0 │ │ movs r0, r2 │ │ - b.n a29e4 │ │ + b.n a29f0 │ │ asrs r2, r2, #4 │ │ - b.n a2fc4 │ │ + b.n a2fd0 │ │ movs r0, #0 │ │ - b.n a3388 │ │ + b.n a3394 │ │ asrs r1, r0, #32 │ │ - b.n a3348 │ │ + b.n a3354 │ │ asrs r2, r0, #32 │ │ - b.n a2ecc │ │ + b.n a2ed8 │ │ movs r0, #4 │ │ - b.n a360e │ │ - bvc.n a2f0e │ │ + b.n a361a │ │ + bvc.n a2f1c │ │ add.w r0, r0, r0 │ │ - b.n a3576 │ │ + b.n a3582 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ - bvs.n a2f94 │ │ + bvs.n a2fa2 │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n a2a02 │ │ + b.n a2a0e │ │ movs r0, r0 │ │ - b.n a358e │ │ + b.n a359a │ │ movs r0, r6 │ │ subs r0, r0, r0 │ │ lsls r4, r3, #1 │ │ - b.n a2a98 │ │ + b.n a2aa4 │ │ ands r6, r0 │ │ - b.n a3232 │ │ + b.n a323e │ │ asrs r0, r2, #32 │ │ - b.n a2a20 │ │ + b.n a2a2c │ │ movs r0, #8 │ │ - b.n a2a24 │ │ + b.n a2a30 │ │ movs r6, r2 │ │ - b.n a3000 │ │ + b.n a300c │ │ asrs r4, r2, #32 │ │ - b.n a2a3c │ │ - ldmia r1, {r0, r1, r2, r3, r5} │ │ + b.n a2a48 │ │ + ldmia r0, {r0, r2, r4, r5, r6, r7} │ │ @ instruction: 0xfb00f05b │ │ sbcs.w r0, pc, #13107200 @ 0xc80000 │ │ - b.n a2a38 │ │ + b.n a2a44 │ │ cmp r0, #208 @ 0xd0 │ │ - b.n a3292 │ │ + b.n a329e │ │ str r1, [r0, #0] │ │ - b.n a343a │ │ + b.n a3446 │ │ strb r0, [r0, #0] │ │ - b.n a3460 │ │ + b.n a346c │ │ adds r0, #1 │ │ - b.n a3426 │ │ + b.n a3432 │ │ ldr r0, [r6, #12] │ │ - b.n a32a2 │ │ + b.n a32ae │ │ asrs r4, r3, #1 │ │ - b.n a2ad0 │ │ + b.n a2adc │ │ lsls r4, r3, #6 │ │ - b.n a2a68 │ │ + b.n a2a74 │ │ movs r0, r0 │ │ - b.n a304c │ │ + b.n a3058 │ │ movs r0, #80 @ 0x50 │ │ - b.n a2a52 │ │ + b.n a2a5e │ │ movs r0, r2 │ │ - b.n a2a60 │ │ + b.n a2a6c │ │ asrs r3, r2, #4 │ │ - b.n a303e │ │ + b.n a304a │ │ movs r0, #0 │ │ - b.n a3402 │ │ + b.n a340e │ │ asrs r1, r0, #32 │ │ - b.n a33c4 │ │ + b.n a33d0 │ │ asrs r2, r0, #32 │ │ - b.n a2f48 │ │ + b.n a2f54 │ │ movs r0, #4 │ │ - b.n a368a │ │ - bvc.n a2f4c │ │ + b.n a3696 │ │ + bvc.n a2f5a │ │ add.w r0, r0, r0 │ │ - b.n a35f2 │ │ + b.n a35fe │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ - bvs.n a2fd2 │ │ + bvs.n a2fe0 │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n a2a7e │ │ + b.n a2a8a │ │ movs r2, r2 │ │ and.w r1, r0, r0, lsr #1 │ │ - b.n a2aa4 │ │ + b.n a2ab0 │ │ ands r0, r0 │ │ - b.n a36aa │ │ + b.n a36b6 │ │ movs r0, r0 │ │ - b.n a308c │ │ + b.n a3098 │ │ lsls r2, r3, #1 │ │ - b.n a2b12 │ │ + b.n a2b1e │ │ movs r3, r0 │ │ - b.n a3616 │ │ + b.n a3622 │ │ movs r4, r1 │ │ subs r2, #0 │ │ asrs r4, r7, #4 │ │ - b.n a2abc │ │ + b.n a2ac8 │ │ cmp r6, #25 │ │ - b.n a36c2 │ │ + b.n a36ce │ │ adds r1, #56 @ 0x38 │ │ - b.n a2ac4 │ │ + b.n a2ad0 │ │ movs r4, r2 │ │ - b.n a2ac4 │ │ + b.n a2ad0 │ │ asrs r1, r0, #32 │ │ - b.n a30ac │ │ + b.n a30b8 │ │ adds r0, #3 │ │ - b.n a30b0 │ │ + b.n a30bc │ │ movs r0, r1 │ │ - b.n a2ab0 │ │ + b.n a2abc │ │ movs r3, r0 │ │ - b.n a36da │ │ + b.n a36e6 │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n a2ab8 │ │ + b.n a2ac4 │ │ strh r0, [r0, #0] │ │ - b.n a2abc │ │ - b.n a30e4 │ │ + b.n a2ac8 │ │ + b.n a30f0 │ │ @ instruction: 0xebff0000 │ │ and.w r0, r0, r0, lsl #16 │ │ - b.n a36ee │ │ + b.n a36fa │ │ movs r4, r0 │ │ - b.n a32f2 │ │ - beq.n a2fec │ │ - b.n a344c │ │ + b.n a32fe │ │ + beq.n a2ff8 │ │ + b.n a3458 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r2, r6, r7, r8, r9, sl, lr} │ │ - b.n a35ce │ │ - ldr r7, [pc, #1020] @ (a33bc ) │ │ - b.n a3660 │ │ + b.n a35da │ │ + ldr r7, [pc, #1020] @ (a33c8 ) │ │ + b.n a366c │ │ @ instruction: 0xfff9eaff │ │ lsls r4, r3, #3 │ │ - b.n a2b08 │ │ + b.n a2b14 │ │ @ instruction: 0x47c5 │ │ - b.n a35de │ │ - ldr r7, [pc, #1020] @ (a33cc ) │ │ - b.n a3670 │ │ + b.n a35ea │ │ + ldr r7, [pc, #1020] @ (a33d8 ) │ │ + b.n a367c │ │ movs r0, r0 │ │ - b.n a30f4 │ │ + b.n a3100 │ │ lsls r2, r3, #1 │ │ - b.n a2b7a │ │ + b.n a2b86 │ │ movs r0, r0 │ │ - b.n a367e │ │ + b.n a368a │ │ @ instruction: 0xfff20aff │ │ asrs r4, r0, #3 │ │ - b.n a2b24 │ │ + b.n a2b30 │ │ movs r1, #125 @ 0x7d │ │ - b.n a35ea │ │ + b.n a35f6 │ │ adds r0, #192 @ 0xc0 │ │ - b.n a2b2c │ │ + b.n a2b38 │ │ lsls r0, r0, #3 │ │ - b.n a2b30 │ │ + b.n a2b3c │ │ asrs r1, r0, #32 │ │ - b.n a3114 │ │ + b.n a3120 │ │ strh r0, [r0, #0] │ │ - b.n a2b14 │ │ + b.n a2b20 │ │ adds r0, #3 │ │ - b.n a311c │ │ + b.n a3128 │ │ movs r0, r0 │ │ - b.n a3120 │ │ + b.n a312c │ │ movs r4, r0 │ │ - b.n a2b20 │ │ + b.n a2b2c │ │ movs r4, r2 │ │ - b.n a2b44 │ │ + b.n a2b50 │ │ movs r0, r1 │ │ - b.n a2b28 │ │ + b.n a2b34 │ │ movs r1, r0 │ │ - b.n a3752 │ │ + b.n a375e │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n a2b30 │ │ + b.n a2b3c │ │ @ instruction: 0xffe1eaff │ │ lsls r4, r6, #1 │ │ - b.n a2b5c │ │ + b.n a2b68 │ │ @ instruction: 0x47c5 │ │ - b.n a3632 │ │ - ldr r7, [pc, #1020] @ (a3420 ) │ │ - b.n a36c4 │ │ + b.n a363e │ │ + ldr r7, [pc, #1020] @ (a342c ) │ │ + b.n a36d0 │ │ movs r0, r0 │ │ - b.n a3148 │ │ + b.n a3154 │ │ lsls r2, r3, #1 │ │ - b.n a2bce │ │ + b.n a2bda │ │ movs r0, r0 │ │ - b.n a36d2 │ │ + b.n a36de │ │ @ instruction: 0xffdd0aff │ │ asrs r4, r3, #1 │ │ - b.n a2b78 │ │ + b.n a2b84 │ │ adds r0, #92 @ 0x5c │ │ - b.n a2b7c │ │ + b.n a2b88 │ │ movs r0, r1 │ │ - b.n a2b70 │ │ + b.n a2b7c │ │ asrs r1, r0, #32 │ │ - b.n a3164 │ │ + b.n a3170 │ │ movs r0, #176 @ 0xb0 │ │ - b.n a2b78 │ │ + b.n a2b84 │ │ adds r0, #3 │ │ - b.n a316c │ │ + b.n a3178 │ │ str r4, [r1, r0] │ │ - b.n a2b80 │ │ + b.n a2b8c │ │ strb r4, [r6, #2] │ │ - b.n a2b84 │ │ + b.n a2b90 │ │ movs r0, #2 │ │ - b.n a309a │ │ + b.n a30a6 │ │ str r0, [r0, #4] │ │ - b.n a2b9c │ │ + b.n a2ba8 │ │ strb r7, [r0, #0] │ │ - b.n a30ac │ │ + b.n a30b8 │ │ strh r0, [r0, #0] │ │ - b.n a2b80 │ │ + b.n a2b8c │ │ movs r0, #7 │ │ - b.n a338e │ │ + b.n a339a │ │ str r6, [r0, #0] │ │ - b.n a318c │ │ + b.n a3198 │ │ movs r0, #0 │ │ - b.n a37b2 │ │ + b.n a37be │ │ str r4, [r0, #0] │ │ - b.n a2b90 │ │ + b.n a2b9c │ │ str r2, [r0, r0] │ │ asrs r0, r4, #6 │ │ movs r0, #0 │ │ lsls r0, r4, #6 │ │ movs r0, #8 │ │ - b.n a2b9c │ │ + b.n a2ba8 │ │ movs r1, r0 │ │ - b.n a37c6 │ │ + b.n a37d2 │ │ movs r1, #106 @ 0x6a │ │ - b.n a368a │ │ + b.n a3696 │ │ str r4, [r1, r0] │ │ - b.n a2ba8 │ │ + b.n a2bb4 │ │ @ instruction: 0xffc3eaff │ │ - pop {r2, r5} │ │ + pop {r3, r4, r5} │ │ movs r3, r0 │ │ - @ instruction: 0xb824 │ │ + @ instruction: 0xb838 │ │ movs r3, r0 │ │ - ldrh r7, [r7, #24] │ │ - vcvt.f32.u32 , , #10 │ │ - vqmovn.u32 d21, │ │ - @ instruction: 0xfff6bbb8 │ │ + ldrh r0, [r7, #26] │ │ + @ instruction: 0xfff67d88 │ │ + vrsra.u32 d21, d5, #10 │ │ + vtbx.8 d27, {d22-d25}, d12 │ │ movs r3, r0 │ │ - @ instruction: 0xb878 │ │ + @ instruction: 0xb88c │ │ movs r3, r0 │ │ - ldrh r7, [r1, #28] │ │ - @ instruction: 0xfff67ea5 │ │ - vqshlu.s64 d27, d25, #54 @ 0x36 │ │ - vtbx.8 d27, {d22}, d16 │ │ + ldrh r0, [r1, #30] │ │ + @ instruction: 0xfff67dd8 │ │ + vtbl.8 d27, {d22}, d7 │ │ + @ instruction: 0xfff6b8f4 │ │ movs r3, r0 │ │ - ldrh r7, [r6, #30] │ │ - vrsra.u32 d27, d9, #10 │ │ - vshll.u32 , d24, #22 │ │ + ldrh r0, [r6, #32] │ │ + vsubw.u , q11, d18 │ │ + vtbx.8 d27, {d6-d8}, d12 │ │ movs r3, r0 │ │ - cbnz r0, a30d4 │ │ + cbnz r4, a30e4 │ │ movs r3, r0 │ │ - ldr r7, [pc, #960] @ (a3490 ) │ │ + ldr r7, [pc, #960] @ (a349c ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n a35f0 │ │ - beq.n a30e0 │ │ - b.n a3574 │ │ + b.n a35fc │ │ + beq.n a30ec │ │ + b.n a3580 │ │ movs r0, r0 │ │ - b.n a377e │ │ + b.n a378a │ │ lsls r4, r4, #1 │ │ lsrs r0, r0, #8 │ │ ands r0, r0 │ │ - b.n a3426 │ │ + b.n a3432 │ │ movs r0, r0 │ │ - b.n a2c0a │ │ + b.n a2c16 │ │ strb r1, [r0, #0] │ │ - b.n a342e │ │ + b.n a343a │ │ asrs r1, r0, #25 │ │ - b.n a3704 │ │ + b.n a3710 │ │ subs r1, r1, r2 │ │ - b.n a3778 │ │ + b.n a3784 │ │ movs r1, r0 │ │ - b.n a339a │ │ + b.n a33a6 │ │ lsls r7, r3, #1 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #32 │ │ - b.n a2c2a │ │ + b.n a2c36 │ │ str r5, [r6, #120] @ 0x78 │ │ - b.n a3716 │ │ + b.n a3722 │ │ ldr r7, [r7, #124] @ 0x7c │ │ - b.n a37a8 │ │ + b.n a37b4 │ │ movs r1, r0 │ │ - b.n a37f0 │ │ + b.n a37fc │ │ lsls r4, r3, #1 │ │ - bge.n a3112 │ │ + bge.n a311e │ │ lsrs r7, r7, #31 │ │ - b.n a3728 │ │ + b.n a3734 │ │ movs r0, r0 │ │ - b.n a37b0 │ │ + b.n a37bc │ │ movs r0, r0 │ │ - b.n a3342 │ │ + b.n a334e │ │ lsls r5, r3, #1 │ │ subs r0, r0, r0 │ │ movs r4, r2 │ │ - b.n a2c4e │ │ + b.n a2c5a │ │ movs r1, r0 │ │ - b.n a380a │ │ + b.n a3816 │ │ lsls r2, r0, #8 │ │ lsls r1, r2, #8 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ asrs r4, r3, #6 │ │ - b.n a2c74 │ │ + b.n a2c80 │ │ str r1, [r0, #0] │ │ - b.n a387a │ │ + b.n a3886 │ │ movs r1, r0 │ │ - b.n a387e │ │ + b.n a388a │ │ movs r1, #201 @ 0xc9 │ │ - b.n a3742 │ │ + b.n a374e │ │ asrs r1, r0, #32 │ │ - b.n a3264 │ │ + b.n a3270 │ │ movs r5, r6 │ │ and.w r0, r0, r0, lsr #32 │ │ - b.n a2c76 │ │ + b.n a2c82 │ │ movs r0, r0 │ │ - b.n a37f2 │ │ + b.n a37fe │ │ @ instruction: 0xfff61aff │ │ lsls r2, r0, #16 │ │ - b.n a385e │ │ + b.n a386a │ │ str r0, [sp, #12] │ │ - b.n a349e │ │ + b.n a34aa │ │ asrs r0, r0, #32 │ │ - b.n a2c7c │ │ - b.n a345e │ │ + b.n a2c88 │ │ + b.n a346a │ │ @ instruction: 0xebff5000 │ │ - b.n a34aa │ │ + b.n a34b6 │ │ lsrs r7, r7, #31 │ │ - b.n a378c │ │ + b.n a3798 │ │ adds r2, r0, r0 │ │ - b.n a359c │ │ + b.n a35a8 │ │ lsrs r2, r4, #3 │ │ - b.n a380c │ │ + b.n a3818 │ │ str r0, [r0, r0] │ │ asrs r5, r0, #32 │ │ str r0, [sp, #0] │ │ asrs r0, r4, #14 │ │ lsls r2, r0, #4 │ │ - b.n a390c │ │ + b.n a3918 │ │ movs r4, r0 │ │ - b.n a2c8e │ │ + b.n a2c9a │ │ movs r4, r0 │ │ - b.n a34ca │ │ + b.n a34d6 │ │ asrs r7, r0, #32 │ │ - b.n a34ce │ │ + b.n a34da │ │ movs r0, #9 │ │ - b.n a34d2 │ │ + b.n a34de │ │ lsls r1, r2, #1 │ │ add.w r0, r0, r0 │ │ - b.n a383a │ │ + b.n a3846 │ │ lsls r4, r0, #1 │ │ subs r0, r0, r0 │ │ str r4, [r4, #4] │ │ - b.n a2cca │ │ + b.n a2cd6 │ │ asrs r0, r4, #32 │ │ - b.n a38e6 │ │ + b.n a38f2 │ │ movs r6, r0 │ │ - b.n a34ea │ │ - bpl.n a30e4 │ │ + b.n a34f6 │ │ + bpl.n a30f2 │ │ @ instruction: 0xeb008000 │ │ - b.n a34f2 │ │ + b.n a34fe │ │ lsls r0, r1, #2 │ │ - b.n a2cbe │ │ + b.n a2cca │ │ movs r6, r0 │ │ - b.n a34fa │ │ + b.n a3506 │ │ asrs r1, r0, #32 │ │ - b.n a38fe │ │ - bpl.n a30ee │ │ + b.n a390a │ │ + bpl.n a30fc │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n a3506 │ │ + b.n a3512 │ │ lsls r4, r1, #2 │ │ - b.n a2cd2 │ │ + b.n a2cde │ │ movs r6, r0 │ │ - b.n a350e │ │ + b.n a351a │ │ asrs r4, r0, #32 │ │ - b.n a3912 │ │ - bpl.n a30f8 │ │ + b.n a391e │ │ + bpl.n a3106 │ │ @ instruction: 0xeb00a00c │ │ - b.n a391a │ │ + b.n a3926 │ │ movs r0, r0 │ │ - b.n a388e │ │ + b.n a389a │ │ lsls r0, r2, #2 │ │ - b.n a2cea │ │ + b.n a2cf6 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n a3898 │ │ + b.n a38a4 │ │ movs r0, r0 │ │ asrs r0, r2, #13 │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n a3536 │ │ + b.n a3542 │ │ asrs r0, r0, #32 │ │ - b.n a393a │ │ + b.n a3946 │ │ lsls r2, r2, #18 │ │ add.w r0, r0, r0 │ │ - b.n a38a2 │ │ + b.n a38ae │ │ movs r4, r5 │ │ subs r0, r0, r0 │ │ str r2, [r1, #0] │ │ - b.n a354a │ │ + b.n a3556 │ │ movs r0, r0 │ │ - b.n a2d48 │ │ + b.n a2d54 │ │ asrs r4, r0, #3 │ │ - b.n a2d50 │ │ + b.n a2d5c │ │ movs r2, #29 │ │ - b.n a3816 │ │ + b.n a3822 │ │ movs r4, r0 │ │ - b.n a2d22 │ │ + b.n a2d2e │ │ movs r6, r0 │ │ - b.n a355e │ │ + b.n a356a │ │ asrs r1, r0, #32 │ │ - b.n a3340 │ │ - subs r4, #34 @ 0x22 │ │ + b.n a334c │ │ + subs r4, #35 @ 0x23 │ │ add.w r0, r0, pc │ │ and.w r8, r0, r2 │ │ - b.n a3858 │ │ + b.n a3864 │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ movs r6, r0 │ │ - b.n a3576 │ │ + b.n a3582 │ │ lsls r6, r2, #10 │ │ add.w r0, r0, r0 │ │ - b.n a38de │ │ + b.n a38ea │ │ lsls r4, r0, #2 │ │ - b.n a2d4a │ │ + b.n a2d56 │ │ @ instruction: 0xffea0aff │ │ eors r0, r0 │ │ - b.n a2d4a │ │ + b.n a2d56 │ │ movs r4, r0 │ │ - b.n a358e │ │ + b.n a359a │ │ lsls r5, r3, #11 │ │ add.w r0, r0, r4 │ │ - b.n a3596 │ │ + b.n a35a2 │ │ asrs r1, r1, #32 │ │ - b.n a359a │ │ + b.n a35a6 │ │ lsls r1, r7, #12 │ │ add.w r0, r0, r0, lsl #24 │ │ - b.n a39a2 │ │ + b.n a39ae │ │ movs r0, r0 │ │ - b.n a3906 │ │ + b.n a3912 │ │ movs r1, r2 │ │ subs r0, r0, r0 │ │ movs r6, r0 │ │ - b.n a35ae │ │ - beq.n a32a8 │ │ - b.n a3708 │ │ + b.n a35ba │ │ + beq.n a32b4 │ │ + b.n a3714 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, r2, r4, sp, lr} │ │ - b.n a39ba │ │ + b.n a39c6 │ │ movs r1, r0 │ │ and.w r9, r0, ip, asr #24 │ │ - b.n a3892 │ │ + b.n a389e │ │ ldr r7, [r7, #124] @ 0x7c │ │ - b.n a3924 │ │ + b.n a3930 │ │ asrs r0, r0, #1 │ │ - b.n a2dc8 │ │ + b.n a2dd4 │ │ movs r6, r0 │ │ - b.n a35ce │ │ + b.n a35da │ │ movs r1, #195 @ 0xc3 │ │ - b.n a3892 │ │ + b.n a389e │ │ asrs r1, r0, #32 │ │ - b.n a33b4 │ │ + b.n a33c0 │ │ @ instruction: 0xffe1eaff │ │ asrs r0, r6, #32 │ │ - b.n a2ddc │ │ + b.n a2de8 │ │ str r6, [r2, #0] │ │ - b.n a39e2 │ │ + b.n a39ee │ │ movs r6, r2 │ │ - b.n a39e6 │ │ + b.n a39f2 │ │ movs r1, #198 @ 0xc6 │ │ - b.n a38aa │ │ + b.n a38b6 │ │ asrs r1, r0, #32 │ │ - b.n a33cc │ │ + b.n a33d8 │ │ @ instruction: 0xffdbeaff │ │ - add r0, pc, #0 @ (adr r0, a32b4 ) │ │ - b.n a35f6 │ │ + add r0, pc, #0 @ (adr r0, a32c0 ) │ │ + b.n a3602 │ │ @ instruction: 0xffcdeaff │ │ movs r0, r0 │ │ - b.n a2df8 │ │ + b.n a2e04 │ │ str r5, [r6, #120] @ 0x78 │ │ - b.n a38d2 │ │ + b.n a38de │ │ ldr r7, [r7, #124] @ 0x7c │ │ - b.n a3964 │ │ + b.n a3970 │ │ lsls r2, r0, #4 │ │ - b.n a39ca │ │ + b.n a39d6 │ │ @ instruction: 0xffcfeaff │ │ - ldrh r3, [r7, #18] │ │ - vtbx.8 d24, {d6-d8}, d19 │ │ - vtbx.8 d24, {d22-d25}, d11 │ │ - vtbx.8 d24, {d22-d24}, d31 │ │ + ldrh r1, [r0, #18] │ │ + vtbl.8 d24, {d6-d8}, d25 │ │ + @ instruction: 0xfff68b91 │ │ + @ instruction: 0xfff68ab5 │ │ @ instruction: 0xfff64ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n a3800 │ │ - beq.n a33d0 │ │ - b.n a3784 │ │ + b.n a380c │ │ + beq.n a33dc │ │ + b.n a3790 │ │ lsls r0, r2, #1 │ │ movt r0, #1392 @ 0x570 │ │ - b.n a37f2 │ │ + b.n a37fe │ │ movs r0, r0 │ │ - b.n a3998 │ │ + b.n a39a4 │ │ strb r6, [r2, #0] │ │ - b.n a3a3a │ │ + b.n a3a46 │ │ str r0, [sp, #0] │ │ asrs r0, r4, #6 │ │ - add r0, pc, #4 @ (adr r0, a3304 ) │ │ + add r0, pc, #4 @ (adr r0, a3310 ) │ │ asrs r0, r4, #6 │ │ lsrs r7, r1, #11 │ │ orr.w r0, r5, #8388608 @ 0x800000 │ │ asrs r1, r2, #23 │ │ movs r0, r0 │ │ asrs r0, r2, #13 │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ movs r7, r0 │ │ - b.n a3656 │ │ - beq.n a3350 │ │ - b.n a37b0 │ │ + b.n a3662 │ │ + beq.n a335c │ │ + b.n a37bc │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, ip} │ │ - b.n a383c │ │ + b.n a3848 │ │ movs r2, r1 │ │ - b.n a3666 │ │ + b.n a3672 │ │ str r2, [r0, #0] │ │ - b.n a366a │ │ - bpl.n a341c │ │ + b.n a3676 │ │ + bpl.n a342a │ │ add.w r0, r0, r0 │ │ - b.n a39d2 │ │ + b.n a39de │ │ movs r1, r3 │ │ lsrs r0, r0, #8 │ │ - bpl.n a33c2 │ │ + bpl.n a33d0 │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n a2e5e │ │ + b.n a2e6a │ │ movs r2, r0 │ │ - b.n a39f0 │ │ + b.n a39fc │ │ @ instruction: 0xfff21aff │ │ strb r2, [r0, #0] │ │ - b.n a3a8a │ │ + b.n a3a96 │ │ movs r0, r0 │ │ - b.n a39fa │ │ + b.n a3a06 │ │ @ instruction: 0xffef0aff │ │ ands r0, r0 │ │ - b.n a3696 │ │ + b.n a36a2 │ │ movs r4, r0 │ │ - b.n a2e8c │ │ + b.n a2e98 │ │ lsrs r2, r0, #32 │ │ - b.n a397e │ │ + b.n a398a │ │ @ instruction: 0xffeb1aff │ │ lsrs r1, r0, #4 │ │ - b.n a3986 │ │ + b.n a3992 │ │ movs r4, r2 │ │ subs r0, r0, r0 │ │ movs r1, r1 │ │ - b.n a3aae │ │ + b.n a3aba │ │ asrs r6, r6, #32 │ │ - b.n a377e │ │ + b.n a378a │ │ lsls r6, r4, #4 │ │ - b.n a3376 │ │ + b.n a3382 │ │ movs r0, r0 │ │ - b.n a367c │ │ + b.n a3688 │ │ adds r7, r0, #4 │ │ - b.n a3a7e │ │ + b.n a3a8a │ │ movs r2, r1 │ │ - b.n a36c2 │ │ - bpl.n a3370 │ │ + b.n a36ce │ │ + bpl.n a337e │ │ add.w r0, r0, r0 │ │ - b.n a3a2a │ │ + b.n a3a36 │ │ movs r3, r1 │ │ lsrs r0, r0, #8 │ │ strb r0, [r0, #0] │ │ - b.n a2eba │ │ + b.n a2ec6 │ │ movs r1, r2 │ │ - b.n a3a44 │ │ + b.n a3a50 │ │ @ instruction: 0xffdd1aff │ │ movs r7, r0 │ │ and.w r0, r0, r8, lsr #4 │ │ - b.n a2edc │ │ + b.n a2ee8 │ │ movs r4, r0 │ │ - b.n a2ed8 │ │ + b.n a2ee4 │ │ subs r7, r1, r0 │ │ - b.n a37ac │ │ + b.n a37b8 │ │ lsrs r1, r0, #4 │ │ - b.n a3a50 │ │ + b.n a3a5c │ │ cmp r1, #1 │ │ - b.n a3ab2 │ │ + b.n a3abe │ │ movs r0, #4 │ │ - b.n a2ec8 │ │ + b.n a2ed4 │ │ lsrs r1, r0, #4 │ │ lsls r0, r0, #15 │ │ movs r4, r0 │ │ lsls r1, r1, #22 │ │ movs r2, r1 │ │ - b.n a3702 │ │ - bpl.n a33d0 │ │ + b.n a370e │ │ + bpl.n a33e6 │ │ add.w r0, r0, r4, lsl #16 │ │ - b.n a2efc │ │ + b.n a2f08 │ │ str r0, [r0, #0] │ │ - b.n a370e │ │ + b.n a371a │ │ str r4, [r0, r0] │ │ - b.n a2eec │ │ + b.n a2ef8 │ │ lsrs r1, r0, #4 │ │ - b.n a39fe │ │ + b.n a3a0a │ │ movs r1, r3 │ │ lsrs r0, r0, #8 │ │ movs r2, r1 │ │ - b.n a3a8a │ │ + b.n a3a96 │ │ movs r3, r1 │ │ subs r2, #0 │ │ asrs r0, r5, #11 │ │ - b.n a2f24 │ │ + b.n a2f30 │ │ movs r6, r0 │ │ - b.n a34fe │ │ + b.n a350a │ │ movs r1, r1 │ │ - b.n a386e │ │ + b.n a387a │ │ movs r0, #9 │ │ - b.n a3b32 │ │ + b.n a3b3e │ │ asrs r1, r0, #32 │ │ - b.n a3514 │ │ - bpl.n a342a │ │ + b.n a3520 │ │ + bpl.n a3438 │ │ add.w r0, r0, r0 │ │ - b.n a3a9e │ │ + b.n a3aaa │ │ movs r7, r1 │ │ subs r0, r0, r0 │ │ - ldr r1, [pc, #4] @ (a3408 ) │ │ - b.n a388e │ │ + ldr r1, [pc, #4] @ (a3414 ) │ │ + b.n a389a │ │ ands r4, r0 │ │ - b.n a2f1c │ │ + b.n a2f28 │ │ str r1, [r1, r0] │ │ - b.n a389a │ │ + b.n a38a6 │ │ movs r4, r1 │ │ and.w r0, r0, r8 │ │ - b.n a3ac2 │ │ + b.n a3ace │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ lsls r4, r6, #10 │ │ - b.n a2f5c │ │ + b.n a2f68 │ │ movs r0, #8 │ │ - b.n a3b62 │ │ + b.n a3b6e │ │ movs r0, r0 │ │ - b.n a3544 │ │ + b.n a3550 │ │ asrs r1, r0, #32 │ │ - b.n a392a │ │ + b.n a3936 │ │ movs r2, r1 │ │ - b.n a376e │ │ - bpl.n a3446 │ │ + b.n a377a │ │ + bpl.n a3454 │ │ add.w r0, r0, r0 │ │ - b.n a3ad6 │ │ + b.n a3ae2 │ │ lsls r6, r2, #1 │ │ lsrs r0, r0, #8 │ │ str r0, [r1, r0] │ │ - b.n a3b7e │ │ + b.n a3b8a │ │ movs r0, r0 │ │ and.w r0, r0, r6, lsl #20 │ │ - b.n a3786 │ │ + b.n a3792 │ │ lsls r5, r0, #2 │ │ - b.n a3556 │ │ + b.n a3562 │ │ movs r5, r2 │ │ - b.n a394e │ │ - bmi.n a341e │ │ + b.n a395a │ │ + bmi.n a3434 │ │ add.w r0, r0, r0 │ │ - b.n a3af6 │ │ + b.n a3b02 │ │ lsls r4, r7, #1 │ │ - b.n a2f6c │ │ + b.n a2f78 │ │ movs r0, r4 │ │ lsrs r0, r0, #8 │ │ strb r6, [r0, #0] │ │ - b.n a3562 │ │ + b.n a356e │ │ strh r0, [r0, #0] │ │ - b.n a37a6 │ │ + b.n a37b2 │ │ movs r1, r0 │ │ - b.n a3978 │ │ + b.n a3984 │ │ movs r0, r0 │ │ - b.n a3b18 │ │ + b.n a3b24 │ │ asrs r5, r0, #32 │ │ - b.n a3572 │ │ + b.n a357e │ │ lsls r4, r6, #1 │ │ - b.n a2f88 │ │ + b.n a2f94 │ │ asrs r2, r1, #32 │ │ - b.n a397c │ │ + b.n a3988 │ │ asrs r0, r6, #1 │ │ - b.n a2f90 │ │ + b.n a2f9c │ │ strh r0, [r7, #2] │ │ - b.n a2f94 │ │ + b.n a2fa0 │ │ lsls r7, r0, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, r1 │ │ - b.n a37ca │ │ + b.n a37d6 │ │ asrs r2, r1, #32 │ │ - b.n a37ce │ │ + b.n a37da │ │ movs r0, #6 │ │ - b.n a37d2 │ │ - stmia r7!, {r0, r1, r3, r6, r7} │ │ + b.n a37de │ │ + stmia r7!, {r0, r4, r7} │ │ mla r9, r0, r1, r0 │ │ - b.n a3ac2 │ │ + b.n a3ace │ │ tst r0, r7 │ │ - b.n a2fdc │ │ + b.n a2fe8 │ │ ands r4, r0 │ │ - b.n a35c0 │ │ + b.n a35cc │ │ lsls r4, r3, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n a3bea │ │ + b.n a3bf6 │ │ movs r0, #0 │ │ - b.n a3bee │ │ + b.n a3bfa │ │ asrs r4, r0, #32 │ │ - b.n a37f2 │ │ + b.n a37fe │ │ adds r0, #0 │ │ - b.n a3498 │ │ + b.n a34a4 │ │ movs r6, r5 │ │ - b.n a3b60 │ │ + b.n a3b6c │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n a3b68 │ │ + b.n a3b74 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ asrs r7, r5, #32 │ │ - b.n a3970 │ │ + b.n a397c │ │ asrs r2, r0, #32 │ │ asrs r0, r4, #6 │ │ movs r1, r0 │ │ - b.n a39d2 │ │ + b.n a39de │ │ movs r0, #1 │ │ - b.n a3816 │ │ + b.n a3822 │ │ movs r2, r1 │ │ - b.n a3b7a │ │ + b.n a3b86 │ │ @ instruction: 0xfff31aff │ │ movs r2, r0 │ │ and.w r0, r0, ip, lsl #28 │ │ - b.n a3c26 │ │ + b.n a3c32 │ │ @ instruction: 0xff89eaff │ │ asrs r2, r0, #32 │ │ - b.n a382e │ │ + b.n a383a │ │ stmia r0!, {r0, r1, r2} │ │ - b.n a3832 │ │ + b.n a383e │ │ strb r0, [r0, #0] │ │ - b.n a3c36 │ │ + b.n a3c42 │ │ movs r0, r0 │ │ - b.n a3b9c │ │ + b.n a3ba8 │ │ lsls r3, r2, #1 │ │ subs r0, r0, r0 │ │ lsls r4, r6, #1 │ │ - b.n a3034 │ │ + b.n a3040 │ │ movs r0, #1 │ │ - b.n a3a10 │ │ + b.n a3a1c │ │ asrs r2, r1, #32 │ │ - b.n a384a │ │ - stmia r7!, {r0, r2, r3, r5, r7} │ │ + b.n a3856 │ │ + stmia r7!, {r0, r1, r4, r5, r6} │ │ @ instruction: 0xfb000070 │ │ - b.n a3044 │ │ + b.n a3050 │ │ asrs r2, r1, #32 │ │ - b.n a3856 │ │ + b.n a3862 │ │ movs r0, #5 │ │ - b.n a385a │ │ - stmia r7!, {r0, r3, r5, r7} │ │ + b.n a3866 │ │ + stmia r7!, {r0, r1, r2, r3, r5, r6} │ │ mla r0, r0, r5, r0 │ │ - b.n a30d4 │ │ + b.n a30e0 │ │ lsls r0, r0, #1 │ │ - b.n a3b46 │ │ + b.n a3b52 │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ lsls r0, r6, #6 │ │ - b.n a306c │ │ + b.n a3078 │ │ asrs r4, r6, #1 │ │ - b.n a3064 │ │ + b.n a3070 │ │ movs r0, r0 │ │ - b.n a3654 │ │ + b.n a3660 │ │ asrs r5, r0, #32 │ │ - b.n a363c │ │ + b.n a3648 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr0, [r0, #464] @ 0x1d0 │ │ - b.n a3c82 │ │ + b.n a3c8e │ │ lsls r0, r7, #2 │ │ - b.n a38c8 │ │ + b.n a38d4 │ │ lsls r7, r1, #28 │ │ orr.w r0, r1, #3850240 @ 0x3ac000 │ │ - b.n a3c8e │ │ + b.n a3c9a │ │ lsls r0, r6, #1 │ │ - b.n a3084 │ │ + b.n a3090 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr0, [r4, #20] │ │ - b.n a365a │ │ + b.n a3666 │ │ lsls r7, r1, #28 │ │ orr.w r0, r0, #1507328 @ 0x170000 │ │ - b.n a38e2 │ │ + b.n a38ee │ │ movs r6, r0 │ │ and.w r0, r0, r4 │ │ - b.n a30a4 │ │ + b.n a30b0 │ │ adds r5, r5, #0 │ │ - b.n a3b7a │ │ + b.n a3b86 │ │ subs r3, r4, r5 │ │ - b.n a3bfe │ │ + b.n a3c0a │ │ movs r0, r0 │ │ - b.n a3096 │ │ + b.n a30a2 │ │ asrs r5, r0, #32 │ │ - b.n a34ba │ │ + b.n a34c6 │ │ asrs r0, r0, #32 │ │ - b.n a3cbe │ │ + b.n a3cca │ │ asrs r4, r0, #32 │ │ - b.n a3102 │ │ + b.n a310e │ │ lsls r0, r7, #1 │ │ - b.n a30b8 │ │ + b.n a30c4 │ │ movs r0, #1 │ │ - b.n a3a96 │ │ + b.n a3aa2 │ │ asrs r2, r1, #32 │ │ - b.n a38ce │ │ - stmia r7!, {r2, r3, r7} │ │ + b.n a38da │ │ + stmia r7!, {r1, r4, r6} │ │ @ instruction: 0xfb00ff5e │ │ @ instruction: 0xeaff4901 │ │ - b.n a3a22 │ │ + b.n a3a2e │ │ str r0, [r0, r0] │ │ - b.n a3cde │ │ + b.n a3cea │ │ ands r4, r0 │ │ - b.n a30b4 │ │ + b.n a30c0 │ │ @ instruction: 0xffa7eaff │ │ lsls r6, r5, #16 │ │ - b.n a3bb6 │ │ + b.n a3bc2 │ │ ands r0, r0 │ │ - b.n a3cee │ │ + b.n a3cfa │ │ lsls r1, r4, #17 │ │ - b.n a3c40 │ │ + b.n a3c4c │ │ ands r4, r1 │ │ - b.n a3146 │ │ + b.n a3152 │ │ movs r4, r0 │ │ - b.n a30ca │ │ + b.n a30d6 │ │ lsls r5, r5, #17 │ │ - b.n a3bca │ │ + b.n a3bd6 │ │ lsrs r2, r4, #1 │ │ - b.n a3c50 │ │ + b.n a3c5c │ │ movs r0, r0 │ │ - b.n a30d6 │ │ + b.n a30e2 │ │ lsrs r5, r5, #16 │ │ - b.n a3bd6 │ │ + b.n a3be2 │ │ lsrs r3, r4, #13 │ │ - b.n a3c5a │ │ + b.n a3c66 │ │ movs r0, r1 │ │ - b.n a30e2 │ │ + b.n a30ee │ │ movs r0, r1 │ │ - b.n a3916 │ │ - strb r0, [r4, #30] │ │ + b.n a3922 │ │ + strb r1, [r4, #30] │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n a391e │ │ + b.n a392a │ │ lsls r0, r0, #4 │ │ - b.n a3120 │ │ + b.n a312c │ │ asrs r4, r6, #1 │ │ - b.n a3118 │ │ + b.n a3124 │ │ movs r0, r0 │ │ - b.n a3708 │ │ + b.n a3714 │ │ movs r1, r0 │ │ - b.n a3aee │ │ + b.n a3afa │ │ lsls r7, r1, #28 │ │ orn r0, r0, #7864320 @ 0x780000 │ │ - b.n a3134 │ │ + b.n a3140 │ │ lsls r7, r1, #28 │ │ orr.w r0, r1, #8388608 @ 0x800000 │ │ - b.n a371c │ │ + b.n a3728 │ │ ands r0, r1 │ │ - b.n a3184 │ │ + b.n a3190 │ │ movs r1, r0 │ │ - b.n a3b06 │ │ + b.n a3b12 │ │ asrs r0, r6, #1 │ │ - b.n a313c │ │ + b.n a3148 │ │ lsls r7, r1, #28 │ │ orn r7, r0, #9371648 @ 0x8f0000 │ │ orr.w r0, r1, #34816 @ 0x8800 │ │ - b.n a3198 │ │ + b.n a31a4 │ │ @ instruction: 0xffd9eaff │ │ lsls r4, r7, #2 │ │ - b.n a315c │ │ + b.n a3168 │ │ asrs r5, r0, #32 │ │ - b.n a3732 │ │ + b.n a373e │ │ movs r0, #116 @ 0x74 │ │ - b.n a3d66 │ │ + b.n a3d72 │ │ movs r0, r0 │ │ - b.n a3748 │ │ + b.n a3754 │ │ movs r0, #8 │ │ - b.n a31b0 │ │ + b.n a31bc │ │ cmp r4, #45 @ 0x2d │ │ - b.n a3c3e │ │ + b.n a3c4a │ │ lsrs r0, r0, #12 │ │ vldr d18, [r0, #396] @ 0x18c │ │ - b.n a3cc6 │ │ + b.n a3cd2 │ │ movs r0, r0 │ │ - b.n a3d7e │ │ + b.n a3d8a │ │ movs r0, #9 │ │ - b.n a3144 │ │ + b.n a3150 │ │ movs r5, r1 │ │ - b.n a31c8 │ │ + b.n a31d4 │ │ lsls r7, r1, #28 │ │ orr.w r0, r1, #10223616 @ 0x9c0000 │ │ and.w r0, r0, r0, lsl #20 │ │ - b.n a316c │ │ + b.n a3178 │ │ str r6, [r0, r0] │ │ - b.n a3996 │ │ + b.n a39a2 │ │ movs r0, r0 │ │ - b.n a3d06 │ │ + b.n a3d12 │ │ movs r0, r2 │ │ lsrs r0, r0, #8 │ │ adds r0, #0 │ │ - b.n a3da2 │ │ + b.n a3dae │ │ movs r0, r1 │ │ - b.n a39a6 │ │ + b.n a39b2 │ │ movs r0, #5 │ │ - b.n a39aa │ │ + b.n a39b6 │ │ str r0, [r0, #0] │ │ - b.n a320e │ │ + b.n a321a │ │ strb r0, [r0, #0] │ │ - b.n a39b2 │ │ + b.n a39be │ │ movs r6, r5 │ │ - b.n a3d22 │ │ + b.n a3d2e │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n a3d2a │ │ + b.n a3d36 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ strb r7, [r5, #0] │ │ - b.n a3b32 │ │ + b.n a3b3e │ │ strb r3, [r0, #0] │ │ asrs r0, r4, #6 │ │ movs r1, r0 │ │ - b.n a3b8e │ │ + b.n a3b9a │ │ movs r0, #1 │ │ - b.n a3b36 │ │ + b.n a3b42 │ │ adds r0, #7 │ │ - b.n a39d6 │ │ + b.n a39e2 │ │ @ instruction: 0xfff31aff │ │ movs r0, r0 │ │ and.w r0, r0, r3, lsl #28 │ │ - b.n a39e2 │ │ + b.n a39ee │ │ movs r0, #1 │ │ - b.n a372e │ │ + b.n a373a │ │ movs r0, r0 │ │ - b.n a3d58 │ │ + b.n a3d64 │ │ movs r4, r1 │ │ - b.n a39ee │ │ + b.n a39fa │ │ movs r0, #10 │ │ - b.n a3bb6 │ │ + b.n a3bc2 │ │ movs r7, r0 │ │ asrs r0, r4, #6 │ │ - stmia r7!, {r1, r6} │ │ + stmia r7!, {r3} │ │ mla r0, r0, r5, r6 │ │ - b.n a39fe │ │ + b.n a3a0a │ │ str r0, [r0, r0] │ │ - b.n a31fc │ │ + b.n a3208 │ │ movs r0, r1 │ │ - b.n a3a06 │ │ - strb r4, [r4, #29] │ │ + b.n a3a12 │ │ + strb r5, [r4, #29] │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n a3a0e │ │ + b.n a3a1a │ │ @ instruction: 0xff8aeaff │ │ - bvc.n a3654 │ │ - vqshl.u64 d29, d0, #55 @ 0x37 │ │ - vcvt.s16.f16 d29, d20 │ │ - vrsqrte.f16 d29, d12 │ │ - vcvt.f16.u16 d29, d0 │ │ - vrsqrte.f16 , q6 │ │ - vrsqrte.f16 , q4 │ │ + bvc.n a3648 │ │ + vcvt.u16.f16 d29, d4 │ │ + vqshl.u32 d29, d8, #23 │ │ + vrsqrte.f16 d29, d0 │ │ + vqshlu.s32 , q10, #23 │ │ + vrsqrte.f16 , q0 │ │ + vsli.64 d29, d28, #55 @ 0x37 │ │ @ instruction: 0xfff74ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n a3c10 │ │ - beq.n a3600 │ │ - b.n a3b94 │ │ + b.n a3c1c │ │ + beq.n a360c │ │ + b.n a3ba0 │ │ strb r0, [r0, #0] │ │ - b.n a3a3e │ │ + b.n a3a4a │ │ movs r0, r0 │ │ - b.n a3ec2 │ │ + b.n a3ece │ │ movs r0, #16 │ │ - b.n a3220 │ │ + b.n a322c │ │ adds r0, #20 │ │ - b.n a3224 │ │ + b.n a3230 │ │ movs r0, r0 │ │ - b.n a3214 │ │ + b.n a3220 │ │ adds r0, #28 │ │ - b.n a3c30 │ │ + b.n a3c3c │ │ movs r0, #8 │ │ - b.n a324c │ │ + b.n a3258 │ │ str r7, [r0, #16] │ │ - b.n a3640 │ │ + b.n a364c │ │ movs r0, r0 │ │ - b.n a3dc2 │ │ + b.n a3dce │ │ movs r2, r0 │ │ - b.n a3a62 │ │ + b.n a3a6e │ │ movs r1, r0 │ │ asrs r0, r0, #12 │ │ movs r3, #0 │ │ - b.n a3a6a │ │ + b.n a3a76 │ │ movs r7, r0 │ │ - b.n a3a6e │ │ - bfcsel 0, a3834 , 4, ne │ │ + b.n a3a7a │ │ + bfcsel 0, a3840 , 4, ne │ │ lsls r0, r0, #1 │ │ movs r0, r0 │ │ movs r4, r3 │ │ movs r0, r0 │ │ movs r4, r5 │ │ movs r0, r0 │ │ movs r4, r3 │ │ @@ -189120,11297 +189000,11297 @@ │ │ movs r4, r4 │ │ movs r0, r0 │ │ movs r0, r7 │ │ movs r0, r0 │ │ movs r4, r7 │ │ movs r0, r0 │ │ movs r2, r0 │ │ - b.n a3e56 │ │ + b.n a3e62 │ │ movs r6, r0 │ │ and.w r0, r0, r2 │ │ - b.n a3e9a │ │ + b.n a3ea6 │ │ movs r4, r0 │ │ and.w r0, r0, r1 │ │ - b.n a3d64 │ │ + b.n a3d70 │ │ movs r0, r0 │ │ - b.n a3a6a │ │ + b.n a3a76 │ │ movs r1, r0 │ │ and.w r0, r0, r0, lsl #10 │ │ - b.n a3e72 │ │ + b.n a3e7e │ │ movs r1, r0 │ │ - b.n a3e76 │ │ + b.n a3e82 │ │ strh r0, [r4, #36] @ 0x24 │ │ - b.n a32b4 │ │ + b.n a32c0 │ │ str r0, [r0, #0] │ │ - b.n a3aba │ │ + b.n a3ac6 │ │ asrs r0, r1, #32 │ │ - b.n a32a0 │ │ + b.n a32ac │ │ strh r0, [r1, #0] │ │ - b.n a38a0 │ │ + b.n a38ac │ │ movs r0, #80 @ 0x50 │ │ - b.n a32b6 │ │ + b.n a32c2 │ │ movs r2, r0 │ │ - b.n a3a2c │ │ + b.n a3a38 │ │ ldr r1, [r0, #0] │ │ movs r3, #134 @ 0x86 │ │ movs r4, r0 │ │ - b.n a3e40 │ │ + b.n a3e4c │ │ str r0, [r0, #0] │ │ str r1, [sp, #640] @ 0x280 │ │ movs r0, r0 │ │ - b.n a3eda │ │ - bmi.n a3784 │ │ + b.n a3ee6 │ │ + bmi.n a3792 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n a3f62 │ │ + b.n a3f6e │ │ movs r1, r0 │ │ - b.n a3e86 │ │ + b.n a3e92 │ │ str r0, [sp, #0] │ │ - b.n a3f6a │ │ + b.n a3f76 │ │ movs r3, r1 │ │ ldmia r2!, {} │ │ - bmi.n a37fe │ │ + bmi.n a380c │ │ add.w r0, r0, r0 │ │ - b.n a32d6 │ │ + b.n a32e2 │ │ movs r1, r1 │ │ - b.n a3e5a │ │ + b.n a3e66 │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ lsls r2, r3, #1 │ │ - b.n a3372 │ │ + b.n a337e │ │ movs r2, r0 │ │ - b.n a3e66 │ │ + b.n a3e72 │ │ lsls r7, r4, #3 │ │ cmp r2, #0 │ │ lsls r4, r3, #17 │ │ - b.n a330c │ │ + b.n a3318 │ │ adds r1, r0, #0 │ │ - b.n a3f12 │ │ + b.n a3f1e │ │ movs r0, r0 │ │ - b.n a38f4 │ │ - bmi.n a36da │ │ + b.n a3900 │ │ + bmi.n a36e8 │ │ @ instruction: 0xeb009000 │ │ - b.n a3b1e │ │ + b.n a3b2a │ │ movs r1, r0 │ │ - b.n a3f22 │ │ - bmi.n a37a8 │ │ + b.n a3f2e │ │ + bmi.n a37b6 │ │ add.w r0, r0, r1 │ │ - b.n a3eca │ │ + b.n a3ed6 │ │ movs r3, r1 │ │ ldmia r2!, {} │ │ - bmi.n a381e │ │ + bmi.n a382c │ │ add.w r0, r0, r0 │ │ - b.n a3316 │ │ + b.n a3322 │ │ movs r1, r1 │ │ - b.n a3e9a │ │ + b.n a3ea6 │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ lsls r2, r3, #1 │ │ - b.n a33b2 │ │ + b.n a33be │ │ movs r2, r0 │ │ - b.n a3ea6 │ │ + b.n a3eb2 │ │ lsls r5, r4, #3 │ │ cmp r2, #0 │ │ lsls r0, r6, #16 │ │ - b.n a334c │ │ + b.n a3358 │ │ asrs r1, r0, #4 │ │ - b.n a3e12 │ │ + b.n a3e1e │ │ movs r0, r0 │ │ - b.n a3934 │ │ - bmi.n a38fa │ │ + b.n a3940 │ │ + bmi.n a3908 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n a3b5e │ │ + b.n a3b6a │ │ movs r2, r0 │ │ - b.n a3f62 │ │ + b.n a3f6e │ │ strh r5, [r0, #0] │ │ - b.n a3b66 │ │ - add r7, pc, #8 @ (adr r7, a3830 ) │ │ - b.n a3f36 │ │ - bmi.n a37cc │ │ + b.n a3b72 │ │ + add r7, pc, #8 @ (adr r7, a383c ) │ │ + b.n a3f42 │ │ + bmi.n a37da │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n a3ff2 │ │ + b.n a3ffe │ │ movs r1, r0 │ │ - b.n a3f16 │ │ + b.n a3f22 │ │ movs r1, r0 │ │ - bge.n a383a │ │ + bge.n a3846 │ │ ands r0, r1 │ │ - b.n a3374 │ │ + b.n a3380 │ │ movs r6, r1 │ │ - @ instruction: 0xea00d402 │ │ + @ instruction: 0xea00d403 │ │ add.w r0, r0, r0 │ │ - b.n a336a │ │ + b.n a3376 │ │ ands r0, r1 │ │ - b.n a3384 │ │ + b.n a3390 │ │ movs r1, r1 │ │ - b.n a3ef2 │ │ + b.n a3efe │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ lsls r0, r5, #15 │ │ - b.n a3398 │ │ + b.n a33a4 │ │ movs r0, r0 │ │ - b.n a397c │ │ + b.n a3988 │ │ lsls r2, r3, #1 │ │ - b.n a3402 │ │ + b.n a340e │ │ movs r2, r0 │ │ - b.n a3f06 │ │ + b.n a3f12 │ │ lsls r4, r3, #3 │ │ cmp r2, #0 │ │ lsls r0, r5, #15 │ │ - b.n a33ac │ │ + b.n a33b8 │ │ asrs r1, r0, #4 │ │ - b.n a3e72 │ │ + b.n a3e7e │ │ movs r0, r0 │ │ - b.n a3994 │ │ - bmi.n a392a │ │ + b.n a39a0 │ │ + bmi.n a3938 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n a3bbe │ │ + b.n a3bca │ │ movs r0, r2 │ │ - b.n a33bc │ │ + b.n a33c8 │ │ asrs r2, r1, #32 │ │ - b.n a3bc6 │ │ + b.n a3bd2 │ │ movs r0, #4 │ │ - b.n a3bca │ │ - bmi.n a3934 │ │ + b.n a3bd6 │ │ + bmi.n a3942 │ │ add.w r0, r0, r4, lsr #4 │ │ - b.n a33cc │ │ + b.n a33d8 │ │ movs r1, r0 │ │ - b.n a3f76 │ │ + b.n a3f82 │ │ movs r0, r0 │ │ - b.n a339c │ │ + b.n a33a8 │ │ movs r6, r1 │ │ ldmia r2!, {} │ │ adds r1, r0, r0 │ │ - b.n a3cce │ │ + b.n a3cda │ │ movs r4, r1 │ │ lsrs r0, r0, #8 │ │ - bcc.n a387a │ │ + bcc.n a3888 │ │ add.w r0, r0, r0 │ │ - b.n a33ce │ │ + b.n a33da │ │ lsls r1, r4, #1 │ │ - b.n a3f52 │ │ + b.n a3f5e │ │ movs r6, r2 │ │ asrs r0, r2, #13 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ lsrs r7, r7, #29 │ │ - b.n a3edc │ │ + b.n a3ee8 │ │ movs r0, #4 │ │ - b.n a3c02 │ │ + b.n a3c0e │ │ lsrs r6, r7, #31 │ │ - b.n a3f64 │ │ + b.n a3f70 │ │ asrs r0, r0, #32 │ │ - b.n a38de │ │ + b.n a38ea │ │ movs r0, r2 │ │ - b.n a3408 │ │ - bmi.n a3956 │ │ + b.n a3414 │ │ + bmi.n a3964 │ │ add.w r0, r0, r4, lsr #4 │ │ - b.n a3410 │ │ + b.n a341c │ │ movs r0, r0 │ │ - b.n a33dc │ │ + b.n a33e8 │ │ movs r1, r0 │ │ - b.n a3fbe │ │ + b.n a3fca │ │ movs r4, r2 │ │ ldmia r2!, {} │ │ - bcc.n a3898 │ │ + bcc.n a38a6 │ │ add.w r0, r0, r3 │ │ - b.n a3f98 │ │ + b.n a3fa4 │ │ lsls r5, r3, #1 │ │ subs r0, r0, r0 │ │ str r0, [r0, #0] │ │ - b.n a3c32 │ │ + b.n a3c3e │ │ movs r0, r0 │ │ - b.n a3416 │ │ - add r3, pc, #400 @ (adr r3, a3a88 ) │ │ - b.n a3438 │ │ + b.n a3422 │ │ + add r3, pc, #400 @ (adr r3, a3a94 ) │ │ + b.n a3444 │ │ movs r5, r1 │ │ - b.n a3f9e │ │ - add r0, pc, #40 @ (adr r0, a3928 ) │ │ - b.n a3a20 │ │ + b.n a3faa │ │ + add r0, pc, #40 @ (adr r0, a3934 ) │ │ + b.n a3a2c │ │ lsls r1, r2, #1 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n a3444 │ │ + b.n a3450 │ │ asrs r0, r3, #32 │ │ - b.n a3e28 │ │ - bcc.n a390e │ │ + b.n a3e34 │ │ + bmi.n a391c │ │ add.w r0, r0, r0 │ │ - b.n a3fb6 │ │ + b.n a3fc2 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n a344a │ │ + b.n a3456 │ │ movs r2, r0 │ │ - b.n a3fc2 │ │ + b.n a3fce │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r5, r1 │ │ - b.n a406a │ │ + b.n a4076 │ │ movs r0, r0 │ │ - b.n a343a │ │ + b.n a3446 │ │ movs r4, r2 │ │ - b.n a346c │ │ + b.n a3478 │ │ movs r0, r0 │ │ - b.n a3456 │ │ - add r3, pc, #160 @ (adr r3, a39d8 ) │ │ - b.n a3478 │ │ + b.n a3462 │ │ + add r3, pc, #160 @ (adr r3, a39e4 ) │ │ + b.n a3484 │ │ movs r0, r0 │ │ - b.n a3fde │ │ + b.n a3fea │ │ ands r0, r1 │ │ - b.n a3c82 │ │ - add r0, pc, #40 @ (adr r0, a396c ) │ │ - b.n a3a64 │ │ + b.n a3c8e │ │ + add r0, pc, #40 @ (adr r0, a3978 ) │ │ + b.n a3a70 │ │ movs r7, r3 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n a3fee │ │ + b.n a3ffa │ │ movs r7, r4 │ │ lsrs r0, r0, #8 │ │ movs r2, r0 │ │ - b.n a3ff6 │ │ + b.n a4002 │ │ movs r7, r5 │ │ lsrs r0, r0, #8 │ │ - bcc.n a38d4 │ │ + bcc.n a38e2 │ │ add.w r0, r0, r0, lsl #24 │ │ - b.n a3482 │ │ + b.n a348e │ │ movs r1, r0 │ │ - b.n a4058 │ │ + b.n a4064 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r1, r1 │ │ - b.n a3cae │ │ - bmi.n a3986 │ │ + b.n a3cba │ │ + bmi.n a3994 │ │ add.w r0, r0, r1 │ │ - b.n a405e │ │ + b.n a406a │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n a3cbe │ │ - bmi.n a398e │ │ + b.n a3cca │ │ + bmi.n a399c │ │ add.w r0, r0, r1 │ │ - b.n a4070 │ │ + b.n a407c │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r5, r0 │ │ - b.n a3cce │ │ - bmi.n a3996 │ │ + b.n a3cda │ │ + bmi.n a39a4 │ │ add.w r0, r0, r4, lsr #32 │ │ - b.n a34d0 │ │ + b.n a34dc │ │ movs r0, r0 │ │ - b.n a34ba │ │ + b.n a34c6 │ │ movs r2, r0 │ │ - b.n a403e │ │ + b.n a404a │ │ movs r6, r0 │ │ ldrh r0, [r0, #16] │ │ asrs r2, r3, #1 │ │ - b.n a355a │ │ + b.n a3566 │ │ movs r0, r0 │ │ - b.n a404c │ │ + b.n a4058 │ │ movs r5, r6 │ │ subs r0, r0, r0 │ │ - bcc.n a39a6 │ │ + bcc.n a39b4 │ │ add.w r0, r0, r9 │ │ - b.n a40f6 │ │ - beq.n a39f0 │ │ - b.n a3e50 │ │ + b.n a4102 │ │ + beq.n a39fc │ │ + b.n a3e5c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r6, r7, r8, r9, sl, fp} │ │ - b.n a39ce │ │ - beq.n a39fc │ │ - b.n a3e5c │ │ + b.n a39da │ │ + beq.n a3a08 │ │ + b.n a3e68 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, r3, r4, r6} │ │ - b.n a3582 │ │ + b.n a358e │ │ str r0, [sp, #0] │ │ - b.n a4112 │ │ + b.n a411e │ │ movs r2, r0 │ │ - b.n a4076 │ │ + b.n a4082 │ │ lsls r5, r2, #1 │ │ cmp r2, #0 │ │ movs r1, r1 │ │ - b.n a3d1e │ │ - bmi.n a3aae │ │ + b.n a3d2a │ │ + bmi.n a3abc │ │ add.w r0, r0, r4, lsr #4 │ │ - b.n a3520 │ │ + b.n a352c │ │ movs r0, r0 │ │ - b.n a34ec │ │ + b.n a34f8 │ │ movs r1, r0 │ │ - b.n a408e │ │ + b.n a409a │ │ @ instruction: 0xffd71aff │ │ lsls r2, r3, #1 │ │ - b.n a35aa │ │ + b.n a35b6 │ │ ands r1, r0 │ │ - b.n a413a │ │ + b.n a4146 │ │ movs r2, r0 │ │ - b.n a409e │ │ + b.n a40aa │ │ movs r0, r6 │ │ cmp r2, #0 │ │ movs r4, r0 │ │ - b.n a3d46 │ │ - bmi.n a3ac2 │ │ + b.n a3d52 │ │ + bmi.n a3ad0 │ │ add.w r0, r0, r4, lsr #4 │ │ - b.n a3548 │ │ + b.n a3554 │ │ movs r0, r0 │ │ - b.n a3514 │ │ + b.n a3520 │ │ movs r2, r0 │ │ - b.n a40b6 │ │ + b.n a40c2 │ │ @ instruction: 0xffcf1aff │ │ lsls r2, r3, #1 │ │ - b.n a35d2 │ │ + b.n a35de │ │ str r2, [r0, r0] │ │ - b.n a4162 │ │ + b.n a416e │ │ movs r2, r0 │ │ - b.n a40c6 │ │ + b.n a40d2 │ │ movs r4, r6 │ │ cmp r2, #0 │ │ movs r5, r0 │ │ - b.n a3d6e │ │ - bmi.n a3ad6 │ │ + b.n a3d7a │ │ + bmi.n a3ae4 │ │ add.w r0, r0, r4, lsr #4 │ │ - b.n a3570 │ │ + b.n a357c │ │ movs r0, r0 │ │ - b.n a353c │ │ - bcc.n a3944 │ │ + b.n a3548 │ │ + bcc.n a3952 │ │ add.w r0, r0, r0, lsl #24 │ │ - b.n a3562 │ │ + b.n a356e │ │ movs r1, r0 │ │ - b.n a4138 │ │ + b.n a4144 │ │ @ instruction: 0xffc71aff │ │ @ instruction: 0xffc8eaff │ │ ands r0, r1 │ │ - b.n a3d92 │ │ - bcc.n a3b50 │ │ + b.n a3d9e │ │ + bcc.n a3b5e │ │ add.w r0, r0, r0, lsl #24 │ │ - b.n a357a │ │ + b.n a3586 │ │ movs r1, r0 │ │ - b.n a4150 │ │ + b.n a415c │ │ @ instruction: 0xffc11aff │ │ @ instruction: 0xffc2eaff │ │ - add r1, pc, #960 @ (adr r1, a3e28 ) │ │ - b.n a35a8 │ │ + add r1, pc, #960 @ (adr r1, a3e34 ) │ │ + b.n a35b4 │ │ ands r0, r1 │ │ - b.n a3dae │ │ - add r0, pc, #40 @ (adr r0, a3a98 ) │ │ - b.n a3b90 │ │ - bcc.n a3b60 │ │ + b.n a3dba │ │ + add r0, pc, #40 @ (adr r0, a3aa4 ) │ │ + b.n a3b9c │ │ + bcc.n a3b6e │ │ add.w r0, r0, r0, lsl #24 │ │ - b.n a359a │ │ + b.n a35a6 │ │ movs r1, r0 │ │ - b.n a4170 │ │ + b.n a417c │ │ @ instruction: 0xffb91aff │ │ @ instruction: 0xffbaeaff │ │ asrs r0, r0, #8 │ │ - b.n a35c8 │ │ + b.n a35d4 │ │ movs r0, r0 │ │ - b.n a41ce │ │ + b.n a41da │ │ adds r1, #252 @ 0xfc │ │ - b.n a35d0 │ │ + b.n a35dc │ │ str r2, [r0, r0] │ │ - b.n a41d6 │ │ + b.n a41e2 │ │ asrs r1, r0, #32 │ │ - b.n a3bb8 │ │ + b.n a3bc4 │ │ movs r1, r4 │ │ stmia.w sp, {r0, r1, ip, sp} │ │ - b.n a3bc0 │ │ + b.n a3bcc │ │ movs r1, r0 │ │ - b.n a41e6 │ │ + b.n a41f2 │ │ movs r5, #78 @ 0x4e │ │ - b.n a40aa │ │ - ble.n a3a68 │ │ + b.n a40b6 │ │ + ble.n a3a74 │ │ @ instruction: 0xebff0014 │ │ - b.n a35ec │ │ + b.n a35f8 │ │ movs r0, r0 │ │ - b.n a35d6 │ │ - bcc.n a3a2a │ │ + b.n a35e2 │ │ + bcc.n a3a38 │ │ add.w r0, r0, r9 │ │ - b.n a41fe │ │ - beq.n a3af8 │ │ - b.n a3f58 │ │ + b.n a420a │ │ + beq.n a3b04 │ │ + b.n a3f64 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r5, r7, r8, ip} │ │ - b.n a3608 │ │ + b.n a3614 │ │ strb r1, [r0, #0] │ │ - b.n a420e │ │ + b.n a421a │ │ adds r1, #164 @ 0xa4 │ │ - b.n a3610 │ │ + b.n a361c │ │ movs r5, #59 @ 0x3b │ │ - b.n a40d6 │ │ + b.n a40e2 │ │ lsls r0, r4, #6 │ │ - b.n a3618 │ │ + b.n a3624 │ │ asrs r1, r0, #32 │ │ - b.n a3bfc │ │ + b.n a3c08 │ │ adds r0, #3 │ │ - b.n a3c00 │ │ + b.n a3c0c │ │ movs r0, r0 │ │ - b.n a3c04 │ │ + b.n a3c10 │ │ lsls r1, r0, #2 │ │ stmia.w sp, {r1} │ │ - b.n a422e │ │ - ble.n a3a8a │ │ + b.n a423a │ │ + ble.n a3a96 │ │ @ instruction: 0xebff0014 │ │ - b.n a3630 │ │ + b.n a363c │ │ ands r0, r0 │ │ - b.n a361a │ │ + b.n a3626 │ │ @ instruction: 0xffc0eaff │ │ asrs r4, r7, #5 │ │ - b.n a3640 │ │ + b.n a364c │ │ cmp r5, #21 │ │ - b.n a4246 │ │ + b.n a4252 │ │ adds r1, #120 @ 0x78 │ │ - b.n a3648 │ │ + b.n a3654 │ │ lsls r0, r7, #5 │ │ - b.n a364c │ │ + b.n a3658 │ │ asrs r1, r0, #32 │ │ - b.n a3c30 │ │ + b.n a3c3c │ │ adds r0, #3 │ │ - b.n a3c34 │ │ + b.n a3c40 │ │ movs r0, r0 │ │ - b.n a3c38 │ │ + b.n a3c44 │ │ movs r1, r4 │ │ stmia.w sp, {r1} │ │ - b.n a4262 │ │ - ble.n a3aa4 │ │ + b.n a426e │ │ + ble.n a3ab0 │ │ @ instruction: 0xebff0014 │ │ - b.n a3664 │ │ + b.n a3670 │ │ str r0, [r0, r0] │ │ - b.n a364e │ │ + b.n a365a │ │ @ instruction: 0xffbdeaff │ │ asrs r0, r6, #4 │ │ - b.n a3674 │ │ + b.n a3680 │ │ strb r0, [r0, #0] │ │ - b.n a427a │ │ + b.n a4286 │ │ adds r1, #44 @ 0x2c │ │ - b.n a367c │ │ + b.n a3688 │ │ movs r5, #54 @ 0x36 │ │ - b.n a4142 │ │ + b.n a414e │ │ lsls r0, r5, #4 │ │ - b.n a3684 │ │ + b.n a3690 │ │ asrs r1, r0, #32 │ │ - b.n a3c68 │ │ + b.n a3c74 │ │ adds r0, #3 │ │ - b.n a3c6c │ │ + b.n a3c78 │ │ movs r0, r0 │ │ - b.n a3c70 │ │ + b.n a3c7c │ │ lsls r1, r0, #2 │ │ stmia.w sp, {r1} │ │ - b.n a429a │ │ - ble.n a3ac0 │ │ + b.n a42a6 │ │ + ble.n a3acc │ │ @ instruction: 0xebff0014 │ │ - b.n a369c │ │ + b.n a36a8 │ │ str r0, [sp, #0] │ │ - b.n a3686 │ │ + b.n a3692 │ │ @ instruction: 0xff9beaff │ │ asrs r4, r5, #2 │ │ - b.n a36ac │ │ + b.n a36b8 │ │ movs r0, #0 │ │ - b.n a42b2 │ │ + b.n a42be │ │ adds r0, #168 @ 0xa8 │ │ - b.n a36b4 │ │ + b.n a36c0 │ │ lsls r0, r5, #2 │ │ - b.n a36b8 │ │ + b.n a36c4 │ │ asrs r1, r0, #32 │ │ - b.n a3c9c │ │ + b.n a3ca8 │ │ stmia r0!, {r2, r5, r7} │ │ - b.n a36c0 │ │ + b.n a36cc │ │ adds r0, #3 │ │ - b.n a3ca4 │ │ + b.n a3cb0 │ │ movs r0, r0 │ │ - b.n a3ca8 │ │ + b.n a3cb4 │ │ stmia r0!, {r2, r3} │ │ - b.n a3cac │ │ + b.n a3cb8 │ │ asrs r5, r0, #32 │ │ stmia.w sp, {r1} │ │ - b.n a42d6 │ │ + b.n a42e2 │ │ movs r5, #22 │ │ - b.n a419a │ │ - ble.n a3ae0 │ │ + b.n a41a6 │ │ + ble.n a3aec │ │ @ instruction: 0xebffff09 │ │ @ instruction: 0xeaff1088 │ │ - b.n a36e4 │ │ + b.n a36f0 │ │ str r1, [r0, r0] │ │ - b.n a42ea │ │ + b.n a42f6 │ │ adds r0, #132 @ 0x84 │ │ - b.n a36ec │ │ + b.n a36f8 │ │ lsls r4, r0, #2 │ │ - b.n a36f0 │ │ + b.n a36fc │ │ asrs r1, r0, #32 │ │ - b.n a3cd4 │ │ + b.n a3ce0 │ │ movs r0, #128 @ 0x80 │ │ - b.n a36f8 │ │ + b.n a3704 │ │ adds r0, #3 │ │ - b.n a3cdc │ │ + b.n a3ce8 │ │ movs r0, r0 │ │ - b.n a3ce0 │ │ + b.n a3cec │ │ movs r0, #2 │ │ - b.n a3ce4 │ │ + b.n a3cf0 │ │ movs r1, r4 │ │ stmia.w sp, {r1} │ │ - b.n a430e │ │ + b.n a431a │ │ movs r0, #8 │ │ - b.n a36ec │ │ + b.n a36f8 │ │ movs r5, #26 │ │ - b.n a41d6 │ │ - ble.n a3afe │ │ + b.n a41e2 │ │ + ble.n a3b0a │ │ @ instruction: 0xebffff0a │ │ @ instruction: 0xeaff0064 │ │ - b.n a3720 │ │ + b.n a372c │ │ str r2, [r0, r0] │ │ - b.n a4326 │ │ + b.n a4332 │ │ asrs r0, r4, #1 │ │ - b.n a3728 │ │ + b.n a3734 │ │ adds r0, #96 @ 0x60 │ │ - b.n a372c │ │ + b.n a3738 │ │ movs r0, r0 │ │ - b.n a3d10 │ │ + b.n a3d1c │ │ movs r0, #92 @ 0x5c │ │ - b.n a3734 │ │ + b.n a3740 │ │ asrs r1, r0, #32 │ │ - b.n a3d18 │ │ + b.n a3d24 │ │ adds r0, #3 │ │ - b.n a3d1c │ │ + b.n a3d28 │ │ movs r0, r1 │ │ - b.n a371c │ │ + b.n a3728 │ │ movs r0, #2 │ │ - b.n a3d24 │ │ + b.n a3d30 │ │ movs r2, r0 │ │ - b.n a434a │ │ + b.n a4356 │ │ movs r4, r4 │ │ stmia.w sp, {r1, r2, r3, r4, r8, sl, sp} │ │ - b.n a4212 │ │ - ble.n a3b1c │ │ + b.n a421e │ │ + ble.n a3b28 │ │ @ instruction: 0xebffff13 │ │ - @ instruction: 0xeaffb0cc │ │ + @ instruction: 0xeaffb0e0 │ │ movs r3, r0 │ │ - ldrb r3, [r7, #12] │ │ - vqshl.u64 , q11, #54 @ 0x36 │ │ - vaddl.u q12, d6, d9 │ │ - vqrdmlsh.s q14, q11, d24[0] │ │ - vcvtm.u16.f16 d29, d16 │ │ - vtbl.8 d23, {d7-d10}, d3 │ │ - vqshl.u64 d27, d30, #54 @ 0x36 │ │ - vmovn.i32 d28, q1 │ │ - @ instruction: 0xfff6cfb0 │ │ - vcvtm.s16.f16 , q8 │ │ - @ instruction: 0xfff7aff0 │ │ + ldrb r7, [r3, #12] │ │ + vtbl.8 d27, {d6-d7}, d16 │ │ + vmla.i q12, q3, d2[0] │ │ + @ instruction: 0xfff6cfdc │ │ + vrsra.u64 d29, d4, #9 │ │ + vtbx.8 d23, {d23-d25}, d23 │ │ + vtbx.8 d27, {d22}, d24 │ │ + vqmovun.s32 d28, q3 │ │ + @ instruction: 0xfff6cfa4 │ │ + vrsra.u32 , q2, #9 │ │ + vcvta.s16.f16 d27, d4 │ │ movs r3, r0 │ │ - ldmia r7, {r2, r7} │ │ - @ instruction: 0xfff77abf │ │ - vqshl.u32 , q15, #22 │ │ - vqdmulh.s , q11, d23[0] │ │ - vshll.i16 , d0, #16 │ │ - @ instruction: 0xfff7addc │ │ + ldmia r7!, {r3, r4, r5, r6} │ │ + vtbl.8 d23, {d23-d25}, d19 │ │ + vtbl.8 d27, {d22}, d24 │ │ + @ instruction: 0xfff69db8 │ │ + vrshr.u64 , q10, #10 │ │ + @ instruction: 0xfff7adf0 │ │ movs r3, r0 │ │ - add r7, sp, #304 @ 0x130 │ │ + add r7, sp, #384 @ 0x180 │ │ movs r3, r0 │ │ - add r7, sp, #32 │ │ + add r7, sp, #112 @ 0x70 │ │ movs r3, r0 │ │ - ldrb r7, [r5, #13] │ │ - @ instruction: 0xfff6ab72 │ │ - vmla.i q12, q3, d1[0] │ │ - @ instruction: 0xfff67bdb │ │ - @ instruction: 0xfff6abde │ │ - vrshr.u64 q14, q7, #10 │ │ - vtbl.8 d23, {d22-d25}, d23 │ │ - vtbl.8 d26, {d22-d25}, d26 │ │ - @ instruction: 0xfff69dd3 │ │ - vcvt.f16.u16 d23, d15, #10 │ │ - @ instruction: 0xfff65ab7 │ │ + ldrb r3, [r2, #13] │ │ + vqrdmulh.s q13, q3, d0[0] │ │ + vshr.u32 q12, q13, #10 │ │ + @ instruction: 0xfff67bbf │ │ + @ instruction: 0xfff6adac │ │ + vshll.i16 q14, d18, #16 │ │ + vtbl.8 d23, {d22-d25}, d11 │ │ + vcvt.u16.f16 q13, q12, #10 │ │ + @ instruction: 0xfff69ea4 │ │ + vdup.16 d23, d3[1] │ │ + vtbx.8 d21, {d22-d24}, d28 │ │ @ instruction: 0xfff64df0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n a41b8 │ │ + b.n a41c4 │ │ str r0, [r0, r0] │ │ - b.n a3fe2 │ │ + b.n a3fee │ │ movs r1, r7 │ │ - b.n a43e6 │ │ + b.n a43f2 │ │ lsls r5, r2, #2 │ │ - b.n a3caa │ │ + b.n a3cb6 │ │ strb r7, [r3, #0] │ │ - b.n a41b8 │ │ + b.n a41c4 │ │ strh r1, [r0, #0] │ │ - b.n a43f2 │ │ + b.n a43fe │ │ asrs r7, r4, #10 │ │ - b.n a3ff6 │ │ + b.n a4002 │ │ lsls r1, r0, #4 │ │ - b.n a3dba │ │ + b.n a3dc6 │ │ ldr r5, [r7, #124] @ 0x7c │ │ - b.n a41be │ │ + b.n a41ca │ │ movs r1, r0 │ │ - b.n a4402 │ │ + b.n a440e │ │ asrs r6, r0, #32 │ │ - b.n a4006 │ │ - bcs.n a3c72 │ │ + b.n a4012 │ │ + bcs.n a3c80 │ │ add.w r0, r0, r0 │ │ - b.n a436e │ │ + b.n a437a │ │ movs r3, r7 │ │ lsrs r0, r0, #8 │ │ ands r0, r0 │ │ - b.n a4016 │ │ + b.n a4022 │ │ asrs r0, r5, #2 │ │ - b.n a41e2 │ │ + b.n a41ee │ │ movs r0, #0 │ │ - b.n a449e │ │ + b.n a44aa │ │ movs r3, r0 │ │ - b.n a44a2 │ │ + b.n a44ae │ │ movs r0, #0 │ │ - b.n a37e8 │ │ + b.n a37f4 │ │ adds r0, #133 @ 0x85 │ │ - b.n a3df4 │ │ + b.n a3e00 │ │ movs r0, #4 │ │ - b.n a37f0 │ │ + b.n a37fc │ │ lsls r7, r4, #6 │ │ - b.n a3cf2 │ │ + b.n a3cfe │ │ movs r0, #128 @ 0x80 │ │ - b.n a37f8 │ │ + b.n a3804 │ │ movs r0, #132 @ 0x84 │ │ - b.n a37fc │ │ + b.n a3808 │ │ movs r1, #8 │ │ - b.n a3800 │ │ + b.n a380c │ │ movs r1, #12 │ │ - b.n a3804 │ │ + b.n a3810 │ │ movs r0, #12 │ │ - b.n a4446 │ │ + b.n a4452 │ │ asrs r0, r1, #3 │ │ - b.n a4212 │ │ + b.n a421e │ │ movs r0, #188 @ 0xbc │ │ - b.n a3816 │ │ + b.n a3822 │ │ asrs r0, r0, #3 │ │ - b.n a381a │ │ + b.n a3826 │ │ subs r2, r2, #5 │ │ - b.n a421e │ │ + b.n a422a │ │ asrs r0, r0, #5 │ │ - b.n a3822 │ │ + b.n a382e │ │ subs r5, r3, #0 │ │ - b.n a4226 │ │ + b.n a4232 │ │ movs r1, #60 @ 0x3c │ │ - b.n a382a │ │ + b.n a3836 │ │ movs r1, #196 @ 0xc4 │ │ - b.n a382e │ │ + b.n a383a │ │ movs r0, #5 │ │ - b.n a3db6 │ │ + b.n a3dc2 │ │ asrs r0, r1, #7 │ │ - b.n a3836 │ │ + b.n a3842 │ │ subs r5, r7, #7 │ │ - b.n a423a │ │ + b.n a4246 │ │ movs r0, #4 │ │ - b.n a3e3a │ │ + b.n a3e46 │ │ adds r2, #3 │ │ - b.n a3e3c │ │ + b.n a3e48 │ │ asrs r4, r0, #1 │ │ - b.n a3846 │ │ + b.n a3852 │ │ movs r0, r0 │ │ - b.n a3dc6 │ │ + b.n a3dd2 │ │ asrs r0, r1, #1 │ │ - b.n a424e │ │ + b.n a425a │ │ strb r5, [r0, #4] │ │ - b.n a3e50 │ │ + b.n a3e5c │ │ lsls r5, r0, #2 │ │ stmia.w r1, {r3, r4, r5, r6, r7, r8, r9, sl, fp} │ │ - b.n a4354 │ │ + b.n a4360 │ │ strh r4, [r0, #0] │ │ - b.n a385e │ │ + b.n a386a │ │ adds r0, #84 @ 0x54 │ │ - b.n a3862 │ │ - bcs.n a3ca4 │ │ + b.n a386e │ │ + bcs.n a3cba │ │ add.w r0, r0, r0 │ │ - b.n a4402 │ │ + b.n a440e │ │ str r0, [r0, r0] │ │ lsls r0, r4, #14 │ │ str r0, [r0, r0] │ │ asrs r0, r4, #6 │ │ lsls r5, r7, #15 │ │ asrs r0, r0, #12 │ │ movs r0, r0 │ │ asrs r5, r0, #22 │ │ movs r0, r0 │ │ asrs r0, r4, #14 │ │ movs r4, r0 │ │ asrs r5, r4, #22 │ │ lsrs r0, r7, #31 │ │ - b.n a4380 │ │ + b.n a438c │ │ strh r4, [r0, r1] │ │ - b.n a388a │ │ - bcs.n a3cb8 │ │ + b.n a3896 │ │ + bcs.n a3cce │ │ add.w r0, r0, r0 │ │ - b.n a442a │ │ + b.n a4436 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ asrs r5, r7, #15 │ │ - b.n a4392 │ │ + b.n a439e │ │ movs r0, r0 │ │ - b.n a4440 │ │ + b.n a444c │ │ asrs r0, r0, #32 │ │ - b.n a389a │ │ + b.n a38a6 │ │ asrs r0, r0, #32 │ │ - b.n a44de │ │ + b.n a44ea │ │ asrs r4, r0, #32 │ │ - b.n a38e2 │ │ + b.n a38ee │ │ lsls r0, r4, #2 │ │ - b.n a38ae │ │ + b.n a38ba │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n a40ee │ │ + b.n a40fa │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {} │ │ - b.n a44f6 │ │ + b.n a4502 │ │ lsls r0, r4, #2 │ │ - b.n a38c2 │ │ + b.n a38ce │ │ movs r4, r0 │ │ - b.n a40fe │ │ - cbz r7, a3dea │ │ + b.n a410a │ │ + cbz r0, a3df8 │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n a4506 │ │ + b.n a4512 │ │ @ instruction: 0xfff7eaff │ │ - ldr r0, [pc, #192] @ (a3e8c ) │ │ + ldr r0, [pc, #192] @ (a3e98 ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n a42ec │ │ + b.n a42f8 │ │ str r0, [r4, r3] │ │ - b.n a3976 │ │ + b.n a3982 │ │ movs r2, r0 │ │ - b.n a4404 │ │ + b.n a4410 │ │ lsls r2, r1, #1 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n a440c │ │ + b.n a4418 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ movs r0, #252 @ 0xfc │ │ - b.n a398a │ │ + b.n a3996 │ │ asrs r0, r0, #32 │ │ - b.n a452e │ │ + b.n a453a │ │ movs r0, r0 │ │ - b.n a4496 │ │ + b.n a44a2 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #32 │ │ - b.n a391a │ │ + b.n a3926 │ │ adds r2, r1, r0 │ │ - b.n a4200 │ │ + b.n a420c │ │ asrs r2, r0, #28 │ │ - b.n a4284 │ │ + b.n a4290 │ │ subs r1, r2, #4 │ │ - b.n a40e4 │ │ + b.n a40f0 │ │ asrs r1, r4, #10 │ │ - b.n a414a │ │ + b.n a4156 │ │ asrs r4, r2, #3 │ │ - b.n a398e │ │ + b.n a399a │ │ asrs r4, r0, #4 │ │ - b.n a3932 │ │ + b.n a393e │ │ movs r0, #1 │ │ - b.n a4556 │ │ + b.n a4562 │ │ movs r0, #214 @ 0xd6 │ │ - b.n a399a │ │ + b.n a39a6 │ │ movs r0, r0 │ │ - b.n a44c0 │ │ + b.n a44cc │ │ movs r1, r4 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n a4450 │ │ + b.n a445c │ │ movs r7, r7 │ │ lsrs r0, r0, #8 │ │ asrs r0, r1, #32 │ │ - b.n a394e │ │ + b.n a395a │ │ movs r0, r0 │ │ - b.n a44d4 │ │ + b.n a44e0 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r5, #3 │ │ - b.n a395a │ │ + b.n a3966 │ │ adds r0, #2 │ │ - b.n a45fe │ │ + b.n a460a │ │ movs r0, #92 @ 0x5c │ │ - b.n a39e2 │ │ + b.n a39ee │ │ movs r0, r0 │ │ - b.n a44e8 │ │ + b.n a44f4 │ │ asrs r7, r7, #17 │ │ lsls r0, r4, #14 │ │ movs r2, #49 @ 0x31 │ │ - b.n a3f54 │ │ + b.n a3f60 │ │ asrs r0, r7, #2 │ │ - b.n a3972 │ │ + b.n a397e │ │ movs r2, r0 │ │ - b.n a40f8 │ │ + b.n a4104 │ │ movs r0, #1 │ │ adds r1, #160 @ 0xa0 │ │ movs r6, r0 │ │ ldr r2, [sp, #0] │ │ movs r7, r0 │ │ and.w pc, r0, sp, ror #11 │ │ - b.n a4484 │ │ + b.n a4490 │ │ movs r0, #126 @ 0x7e │ │ - b.n a44ea │ │ + b.n a44f6 │ │ asrs r0, r7, #2 │ │ - b.n a398e │ │ + b.n a399a │ │ movs r2, r0 │ │ - b.n a4114 │ │ + b.n a4120 │ │ movs r0, #1 │ │ adds r1, #160 @ 0xa0 │ │ movs r1, r0 │ │ ldrh r0, [r0, #16] │ │ lsls r7, r3, #1 │ │ - b.n a4522 │ │ + b.n a452e │ │ movs r3, r0 │ │ ldrh r0, [r0, #16] │ │ lsls r0, r4, #1 │ │ - b.n a452a │ │ + b.n a4536 │ │ movs r0, #96 @ 0x60 │ │ str r3, [sp, #640] @ 0x280 │ │ asrs r2, r0, #32 │ │ - b.n a41ce │ │ + b.n a41da │ │ movs r0, #184 @ 0xb8 │ │ - b.n a3992 │ │ + b.n a399e │ │ movs r0, #188 @ 0xbc │ │ - b.n a39b6 │ │ + b.n a39c2 │ │ lsrs r7, r7, #31 │ │ - b.n a453e │ │ + b.n a454a │ │ movs r1, r0 │ │ strh r2, [r2, #10] │ │ asrs r4, r7, #2 │ │ strh r0, [r0, #44] @ 0x2c │ │ asrs r0, r0, #32 │ │ - b.n a45e6 │ │ + b.n a45f2 │ │ asrs r6, r2, #3 │ │ - b.n a3a2a │ │ + b.n a3a36 │ │ asrs r0, r2, #2 │ │ - b.n a39ec │ │ + b.n a39f8 │ │ movs r0, #240 @ 0xf0 │ │ - b.n a39d2 │ │ + b.n a39de │ │ asrs r1, r0, #32 │ │ - b.n a3fd4 │ │ + b.n a3fe0 │ │ lsrs r0, r7 │ │ - b.n a39da │ │ + b.n a39e6 │ │ lsls r2, r0, #4 │ │ - b.n a4562 │ │ + b.n a456e │ │ adds r0, #8 │ │ - b.n a39e2 │ │ + b.n a39ee │ │ strb r2, [r4, r2] │ │ - b.n a4206 │ │ + b.n a4212 │ │ asrs r0, r2, #1 │ │ - b.n a39ec │ │ + b.n a39f8 │ │ strb r1, [r0, r4] │ │ strh r0, [r4, #28] │ │ lsls r2, r0, #16 │ │ - b.n a4576 │ │ + b.n a4582 │ │ movs r0, #1 │ │ - b.n a435e │ │ + b.n a436a │ │ ldr r1, [r0, r0] │ │ adds r3, #160 @ 0xa0 │ │ movs r5, r0 │ │ - b.n a4182 │ │ + b.n a418e │ │ stmia r0!, {r2, r3, r4, r6} │ │ - b.n a3a82 │ │ + b.n a3a8e │ │ str r4, [r0, r0] │ │ adds r1, #160 @ 0xa0 │ │ movs r3, r0 │ │ - b.n a418c │ │ + b.n a4198 │ │ adds r0, #1 │ │ strh r0, [r4, #12] │ │ asrs r5, r0, #32 │ │ - b.n a3ff8 │ │ + b.n a4004 │ │ asrs r1, r0, #32 │ │ - b.n a4378 │ │ + b.n a4384 │ │ movs r0, #0 │ │ - b.n a43c0 │ │ + b.n a43cc │ │ asrs r2, r0, #32 │ │ - b.n a3f00 │ │ + b.n a3f0c │ │ adds r1, r6, #0 │ │ - b.n a4242 │ │ + b.n a424e │ │ asrs r0, r5, #2 │ │ - b.n a3a06 │ │ + b.n a3a12 │ │ ldrh r0, [r6, #0] │ │ ldmia.w sp!, {lr} │ │ - b.n a424e │ │ + b.n a425a │ │ adds r1, r7, r2 │ │ add.w r0, r0, r0, lsl #4 │ │ - b.n a4256 │ │ + b.n a4262 │ │ movs r4, r0 │ │ - b.n a425a │ │ + b.n a4266 │ │ asrs r4, r6, #2 │ │ - b.n a3a26 │ │ + b.n a3a32 │ │ movs r4, r0 │ │ - b.n a454c │ │ + b.n a4558 │ │ @ instruction: 0xffaf0aff │ │ @ instruction: 0xffb8eaff │ │ ands r0, r0 │ │ - b.n a426e │ │ - strb r7, [r3, #24] │ │ + b.n a427a │ │ + strb r0, [r4, #24] │ │ add.w r0, r0, r0, lsl #4 │ │ - b.n a4276 │ │ + b.n a4282 │ │ movs r4, r0 │ │ - b.n a427a │ │ + b.n a4286 │ │ asrs r0, r7, #2 │ │ - b.n a3a46 │ │ + b.n a3a52 │ │ @ instruction: 0xffd3eaff │ │ - add r1, sp, #608 @ 0x260 │ │ + add r1, sp, #688 @ 0x2b0 │ │ movs r3, r0 │ │ - ldr r7, [pc, #960] @ (a4308 ) │ │ + ldr r7, [pc, #960] @ (a4314 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n a4468 │ │ - beq.n a4048 │ │ - b.n a43ec │ │ + b.n a4474 │ │ + beq.n a4054 │ │ + b.n a43f8 │ │ str r1, [r0, r0] │ │ - b.n a4296 │ │ + b.n a42a2 │ │ ands r0, r0 │ │ - b.n a429a │ │ - bcs.n a3f24 │ │ + b.n a42a6 │ │ + bcs.n a3f32 │ │ add.w r0, r0, r4, lsl #4 │ │ - b.n a3a8a │ │ + b.n a3a96 │ │ adds r0, #20 │ │ - b.n a446e │ │ + b.n a447a │ │ lsls r0, r5, #1 │ │ - b.n a3a72 │ │ + b.n a3a7e │ │ movs r1, r0 │ │ - b.n a46ae │ │ + b.n a46ba │ │ movs r0, #116 @ 0x74 │ │ - b.n a3a9a │ │ + b.n a3aa6 │ │ lsrs r1, r4, #2 │ │ - b.n a42f6 │ │ + b.n a4302 │ │ asrs r4, r0, #32 │ │ - b.n a42ba │ │ + b.n a42c6 │ │ str r0, [r0, r0] │ │ - b.n a3a98 │ │ + b.n a3aa4 │ │ ldc2l 11, cr14, [sl, #1020] @ 0x3fc @ │ │ movs r0, r0 │ │ - b.n a4626 │ │ + b.n a4632 │ │ lsls r4, r5, #3 │ │ subs r0, r0, r0 │ │ movs r4, r2 │ │ - b.n a3ab6 │ │ + b.n a3ac2 │ │ movs r1, #2 │ │ - b.n a46d2 │ │ + b.n a46de │ │ adds r1, #2 │ │ - b.n a4756 │ │ - subs r1, #5 │ │ + b.n a4762 │ │ + subs r1, #6 │ │ add.w r0, r0, r4, lsr #32 │ │ - b.n a3ac6 │ │ + b.n a3ad2 │ │ movs r0, r0 │ │ - b.n a464c │ │ + b.n a4658 │ │ movs r4, r5 │ │ - b.n a3aae │ │ + b.n a3aba │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ asrs r0, r2, #32 │ │ - b.n a44c8 │ │ - bcs.n a4096 │ │ + b.n a44d4 │ │ + bcs.n a40a4 │ │ add.w r0, r0, r0 │ │ - b.n a4656 │ │ + b.n a4662 │ │ lsls r4, r4, #3 │ │ subs r0, r0, r0 │ │ str r0, [r4, r0] │ │ - b.n a3af8 │ │ + b.n a3b04 │ │ movs r2, r2 │ │ - b.n a4702 │ │ + b.n a470e │ │ asrs r6, r6, #32 │ │ - b.n a43d0 │ │ + b.n a43dc │ │ lsls r5, r4, #2 │ │ - b.n a3fca │ │ + b.n a3fd6 │ │ movs r0, r0 │ │ - b.n a42d0 │ │ + b.n a42dc │ │ ldrh r6, [r0, #40] @ 0x28 │ │ - b.n a46d2 │ │ + b.n a46de │ │ movs r4, r0 │ │ - b.n a4316 │ │ + b.n a4322 │ │ asrs r0, r1, #32 │ │ - b.n a431a │ │ - add r0, pc, #844 @ (adr r0, a4328 ) │ │ + b.n a4326 │ │ + add r0, pc, #848 @ (adr r0, a4338 ) │ │ @ instruction: 0xeb009000 │ │ - b.n a4322 │ │ + b.n a432e │ │ movs r1, r0 │ │ - b.n a4466 │ │ + b.n a4472 │ │ movs r2, r0 │ │ - b.n a46ca │ │ + b.n a46d6 │ │ lsls r5, r2, #3 │ │ subs r2, #0 │ │ movs r4, r6 │ │ - b.n a3b1a │ │ + b.n a3b26 │ │ movs r1, r0 │ │ - b.n a46d6 │ │ + b.n a46e2 │ │ movs r1, #2 │ │ asrs r0, r4, #14 │ │ adds r1, #2 │ │ asrs r0, r4, #15 │ │ - subs r0, #235 @ 0xeb │ │ + subs r0, #236 @ 0xec │ │ subs r0, r0, r4 │ │ movs r6, r0 │ │ - b.n a3bae │ │ + b.n a3bba │ │ movs r3, r2 │ │ - b.n a462a │ │ + b.n a4636 │ │ movs r4, r2 │ │ subs r0, r0, r0 │ │ str r0, [r5, #0] │ │ - b.n a451a │ │ + b.n a4526 │ │ movs r0, #116 @ 0x74 │ │ - b.n a3b3e │ │ + b.n a3b4a │ │ movs r0, r0 │ │ - b.n a475a │ │ + b.n a4766 │ │ asrs r4, r0, #32 │ │ - b.n a435e │ │ + b.n a436a │ │ movs r0, r0 │ │ - b.n a3b3c │ │ + b.n a3b48 │ │ movs r2, r0 │ │ - b.n a4766 │ │ + b.n a4772 │ │ adds r0, #6 │ │ - b.n a436a │ │ - stc2 11, cr14, [pc, #1020]! @ a4428 @ │ │ + b.n a4376 │ │ + stc2 11, cr14, [pc, #1020]! @ a4434 @ │ │ strb r0, [r0, #0] │ │ - b.n a4372 │ │ + b.n a437e │ │ movs r1, r0 │ │ - b.n a44b6 │ │ + b.n a44c2 │ │ movs r2, r0 │ │ - b.n a471a │ │ + b.n a4726 │ │ lsls r0, r6, #1 │ │ subs r2, #0 │ │ movs r0, r0 │ │ - b.n a3b6e │ │ + b.n a3b7a │ │ movs r1, r0 │ │ - b.n a4726 │ │ + b.n a4732 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ asrs r6, r0, #32 │ │ - b.n a3bf6 │ │ + b.n a3c02 │ │ movs r1, #2 │ │ - b.n a4792 │ │ + b.n a479e │ │ adds r1, #2 │ │ - b.n a4816 │ │ + b.n a4822 │ │ movs r4, r0 │ │ - b.n a467c │ │ + b.n a4688 │ │ movs r4, r5 │ │ lsls r4, r0, #22 │ │ - subs r0, #211 @ 0xd3 │ │ + subs r0, #212 @ 0xd4 │ │ @ instruction: 0xeb00a030 │ │ - b.n a3b8e │ │ + b.n a3b9a │ │ movs r1, r0 │ │ - b.n a475c │ │ + b.n a4768 │ │ movs r0, r0 │ │ asrs r2, r3, #13 │ │ movs r6, r4 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #1 │ │ - b.n a3b9e │ │ + b.n a3baa │ │ asrs r0, r0, #32 │ │ - b.n a483a │ │ + b.n a4846 │ │ movs r0, #8 │ │ - b.n a43be │ │ + b.n a43ca │ │ asrs r0, r6, #5 │ │ - b.n a3b82 │ │ + b.n a3b8e │ │ asrs r4, r6, #5 │ │ - b.n a3b86 │ │ + b.n a3b92 │ │ asrs r0, r7, #5 │ │ - b.n a3b8a │ │ + b.n a3b96 │ │ asrs r4, r7, #5 │ │ - b.n a3b8e │ │ + b.n a3b9a │ │ movs r4, r0 │ │ - b.n a43d2 │ │ + b.n a43de │ │ asrs r1, r1, #32 │ │ - b.n a43d6 │ │ - add r1, pc, #132 @ (adr r1, a411c ) │ │ + b.n a43e2 │ │ + add r1, pc, #136 @ (adr r1, a412c ) │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n a43de │ │ + b.n a43ea │ │ movs r1, r0 │ │ - b.n a4522 │ │ + b.n a452e │ │ movs r2, r0 │ │ - b.n a4786 │ │ + b.n a4792 │ │ lsls r5, r2, #1 │ │ subs r2, #0 │ │ movs r4, r2 │ │ - b.n a3bd6 │ │ - ldr r1, [r4, #124] @ 0x7c │ │ + b.n a3be2 │ │ + ldr r2, [r4, #124] @ 0x7c │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n a43f6 │ │ + b.n a4402 │ │ movs r0, r0 │ │ - b.n a47fa │ │ + b.n a4806 │ │ movs r1, r0 │ │ - b.n a47ac │ │ + b.n a47b8 │ │ lsls r4, r7, #3 │ │ - b.n a3c4a │ │ + b.n a3c56 │ │ lsls r1, r2, #1 │ │ subs r0, r0, r0 │ │ lsls r4, r3, #13 │ │ - b.n a3c08 │ │ + b.n a3c14 │ │ asrs r1, r0, #32 │ │ - b.n a480e │ │ + b.n a481a │ │ asrs r4, r7, #3 │ │ - b.n a3c5a │ │ + b.n a3c66 │ │ movs r0, r0 │ │ - b.n a41f4 │ │ + b.n a4200 │ │ lsls r2, r3, #1 │ │ - b.n a3c7a │ │ + b.n a3c86 │ │ movs r3, r0 │ │ - b.n a477e │ │ + b.n a478a │ │ lsls r4, r1, #1 │ │ subs r2, #0 │ │ asrs r4, r0, #13 │ │ - b.n a3c24 │ │ + b.n a3c30 │ │ movs r1, #205 @ 0xcd │ │ - b.n a46ea │ │ + b.n a46f6 │ │ adds r3, #64 @ 0x40 │ │ - b.n a3c2c │ │ + b.n a3c38 │ │ lsls r0, r0, #13 │ │ - b.n a3c30 │ │ + b.n a3c3c │ │ asrs r1, r0, #32 │ │ - b.n a4214 │ │ + b.n a4220 │ │ adds r0, #3 │ │ - b.n a4218 │ │ + b.n a4224 │ │ movs r0, r0 │ │ - b.n a421c │ │ + b.n a4228 │ │ movs r0, r0 │ │ - b.n a3c1c │ │ + b.n a3c28 │ │ movs r3, r0 │ │ - b.n a4846 │ │ - bgt.n a4196 │ │ + b.n a4852 │ │ + bgt.n a41a2 │ │ @ instruction: 0xebff0041 │ │ and.w r0, r0, r6 │ │ - b.n a3cba │ │ + b.n a3cc6 │ │ movs r2, r0 │ │ - b.n a4736 │ │ + b.n a4742 │ │ @ instruction: 0xffd51aff │ │ str r4, [r1, r0] │ │ - b.n a3c52 │ │ + b.n a3c5e │ │ asrs r0, r0, #32 │ │ - b.n a4722 │ │ + b.n a472e │ │ asrs r7, r3, #18 │ │ - b.n a47a6 │ │ - bl 4ffc26 │ │ + b.n a47b2 │ │ + bl 4ffc32 │ │ lsrs r2, r0, #32 │ │ - b.n a47d8 │ │ + b.n a47e4 │ │ movs r5, r2 │ │ subs r0, r0, r0 │ │ movs r4, r1 │ │ - b.n a464a │ │ + b.n a4656 │ │ movs r0, #4 │ │ - b.n a3c62 │ │ + b.n a3c6e │ │ subs r7, #159 @ 0x9f │ │ - b.n a445e │ │ + b.n a446a │ │ lsrs r2, r0, #32 │ │ - b.n a47e8 │ │ + b.n a47f4 │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ str r1, [r0, r0] │ │ - b.n a414e │ │ - bl 4ffc4a │ │ + b.n a415a │ │ + bl 4ffc56 │ │ cmp r7, #149 @ 0x95 │ │ - b.n a4452 │ │ + b.n a445e │ │ movs r0, r0 │ │ - b.n a47fa │ │ + b.n a4806 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ cmp r7, #159 @ 0x9f │ │ - b.n a447e │ │ + b.n a448a │ │ lsrs r2, r0, #32 │ │ - b.n a4806 │ │ + b.n a4812 │ │ @ instruction: 0xfff90aff │ │ - bl 4c3c66 │ │ - bl 4ffc6a │ │ - blx 4a57b0 │ │ + bl 4c3c72 │ │ + bl 4ffc76 │ │ + blx 4a57bc │ │ str r0, [r0, r0] │ │ - b.n a3c96 │ │ - bl 4ffc76 │ │ + b.n a3ca2 │ │ + bl 4ffc82 │ │ lsrs r2, r0, #32 │ │ - b.n a4828 │ │ + b.n a4834 │ │ @ instruction: 0xffec0aff │ │ movs r0, r0 │ │ @ instruction: 0xea00f05b │ │ sbcs.w r0, pc, #8650752 @ 0x840000 │ │ - b.n a3cb6 │ │ + b.n a3cc2 │ │ lsls r1, r0, #4 │ │ - b.n a47b2 │ │ + b.n a47be │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ ldrb r5, [r2, #0] │ │ - b.n a45a4 │ │ + b.n a45b0 │ │ movs r3, r1 │ │ and.w r2, r0, r0, asr #13 │ │ - b.n a3ce0 │ │ + b.n a3cec │ │ ldrb r5, [r2, #0] │ │ - b.n a45d0 │ │ + b.n a45dc │ │ asrs r2, r0, #28 │ │ lsls r1, r0, #9 │ │ movs r0, #5 │ │ - b.n a41ee │ │ + b.n a41fa │ │ adds r0, #3 │ │ - b.n a42d0 │ │ + b.n a42dc │ │ str r2, [r0, #0] │ │ - b.n a41b8 │ │ + b.n a41c4 │ │ movs r0, #0 │ │ - b.n a4206 │ │ + b.n a4212 │ │ movs r0, #4 │ │ - b.n a3cc6 │ │ + b.n a3cd2 │ │ asrs r2, r3, #1 │ │ - b.n a3d68 │ │ + b.n a3d74 │ │ movs r3, r0 │ │ - b.n a4868 │ │ + b.n a4874 │ │ lsls r1, r2, #1 │ │ cmp r2, #0 │ │ movs r2, r0 │ │ - b.n a450e │ │ + b.n a451a │ │ adds r1, r3, r0 │ │ - b.n a4912 │ │ + b.n a491e │ │ movs r0, r0 │ │ - b.n a4884 │ │ + b.n a4890 │ │ movs r0, #5 │ │ - b.n a421a │ │ + b.n a4226 │ │ adds r1, r2, r0 │ │ lsls r0, r4, #14 │ │ movs r0, #1 │ │ - b.n a4206 │ │ + b.n a4212 │ │ @ instruction: 0xffa20aff │ │ asrs r4, r4, #8 │ │ - b.n a3d28 │ │ + b.n a3d34 │ │ strb r0, [r0, #31] │ │ - b.n a47fe │ │ + b.n a480a │ │ ldrb r7, [r7, #31] │ │ - b.n a4890 │ │ + b.n a489c │ │ asrs r1, r0, #32 │ │ - b.n a4314 │ │ + b.n a4320 │ │ asrs r2, r3, #1 │ │ - b.n a3d9c │ │ + b.n a3da8 │ │ movs r0, r0 │ │ - b.n a48a0 │ │ + b.n a48ac │ │ movs r1, r7 │ │ subs r0, r0, r0 │ │ movs r7, r0 │ │ - b.n a4546 │ │ - beq.n a4240 │ │ - b.n a46a0 │ │ + b.n a4552 │ │ + beq.n a424c │ │ + b.n a46ac │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {} │ │ - b.n a48c0 │ │ + b.n a48cc │ │ lsls r6, r3, #1 │ │ subs r0, r0, r0 │ │ lsls r5, r3, #23 │ │ - b.n a45c2 │ │ + b.n a45ce │ │ movs r0, r0 │ │ - b.n a48be │ │ + b.n a48ca │ │ lsls r5, r1, #1 │ │ ldrh r0, [r0, r0] │ │ movs r4, r0 │ │ - b.n a3d4e │ │ + b.n a3d5a │ │ movs r1, r0 │ │ - b.n a491c │ │ + b.n a4928 │ │ movs r0, r0 │ │ asrs r2, r3, #13 │ │ asrs r2, r0, #8 │ │ - b.n a4932 │ │ + b.n a493e │ │ asrs r4, r0, #32 │ │ - b.n a3d3e │ │ + b.n a3d4a │ │ asrs r1, r0, #32 │ │ - b.n a474c │ │ + b.n a4758 │ │ subs r1, r2, #4 │ │ - b.n a451c │ │ + b.n a4528 │ │ strh r1, [r4, r2] │ │ - b.n a4582 │ │ + b.n a458e │ │ movs r7, r3 │ │ subs r0, r0, r0 │ │ asrs r0, r1, #1 │ │ - b.n a3d72 │ │ + b.n a3d7e │ │ movs r0, #0 │ │ - b.n a484e │ │ + b.n a485a │ │ movs r4, #159 @ 0x9f │ │ - b.n a48d2 │ │ + b.n a48de │ │ movs r2, r0 │ │ - b.n a4256 │ │ + b.n a4262 │ │ movs r4, r1 │ │ - b.n a3d5c │ │ + b.n a3d68 │ │ movs r4, r0 │ │ - b.n a459e │ │ - add r0, sp, #128 @ 0x80 │ │ + b.n a45aa │ │ + add r0, sp, #132 @ 0x84 │ │ add.w r0, r0, r8, lsl #5 │ │ - b.n a3d8e │ │ + b.n a3d9a │ │ movs r4, r2 │ │ - b.n a3d6c │ │ - blt.n a42d0 │ │ + b.n a3d78 │ │ + blt.n a42dc │ │ @ instruction: 0xebff2048 │ │ - b.n a3d9a │ │ + b.n a3da6 │ │ movs r0, r0 │ │ - b.n a492a │ │ + b.n a4936 │ │ cmp r6, #22 │ │ - b.n a477e │ │ + b.n a478a │ │ lsls r0, r6, #3 │ │ - b.n a4602 │ │ + b.n a460e │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n a4930 │ │ + b.n a493c │ │ movs r6, r1 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n a45ce │ │ - add r0, sp, #368 @ 0x170 │ │ + b.n a45da │ │ + add r0, sp, #372 @ 0x174 │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n a45d6 │ │ + b.n a45e2 │ │ movs r0, r0 │ │ - b.n a493a │ │ + b.n a4946 │ │ @ instruction: 0xffd81aff │ │ movs r6, r0 │ │ - b.n a3e4a │ │ + b.n a3e56 │ │ strb r0, [r0, #0] │ │ - b.n a49e6 │ │ + b.n a49f2 │ │ movs r2, r0 │ │ - b.n a48ca │ │ + b.n a48d6 │ │ @ instruction: 0xffd41aff │ │ lsls r0, r2, #1 │ │ movt lr, #18 │ │ - b.n a47be │ │ + b.n a47ca │ │ strb r4, [r6, #4] │ │ - b.n a3dc2 │ │ + b.n a3dce │ │ lsrs r5, r1, #10 │ │ orr.w r0, r0, #512 @ 0x200 │ │ - b.n a3dc2 │ │ + b.n a3dce │ │ @ instruction: 0xffceeaff │ │ movs r4, r0 │ │ - b.n a460a │ │ + b.n a4616 │ │ asrs r0, r0, #32 │ │ - b.n a4a0e │ │ + b.n a4a1a │ │ movs r0, #0 │ │ - b.n a4a12 │ │ + b.n a4a1e │ │ asrs r1, r5, #5 │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n a461a │ │ + b.n a4626 │ │ movs r1, r0 │ │ - b.n a475e │ │ + b.n a476a │ │ movs r2, r0 │ │ - b.n a49c2 │ │ + b.n a49ce │ │ @ instruction: 0xffc63aff │ │ @ instruction: 0xffeceaff │ │ asrs r4, r4, #4 │ │ - b.n a3e2c │ │ + b.n a3e38 │ │ adds r1, #36 @ 0x24 │ │ - b.n a3e30 │ │ + b.n a3e3c │ │ asrs r1, r0, #32 │ │ - b.n a4414 │ │ + b.n a4420 │ │ movs r1, r4 │ │ stmia.w sp, {r0, r1, ip, sp} │ │ - b.n a441c │ │ + b.n a4428 │ │ movs r0, #8 │ │ - b.n a3e1c │ │ + b.n a3e28 │ │ movs r1, r0 │ │ - b.n a4a46 │ │ + b.n a4a52 │ │ movs r1, #191 @ 0xbf │ │ - b.n a490a │ │ - blt.n a4298 │ │ + b.n a4916 │ │ + blt.n a42a4 │ │ @ instruction: 0xebffffbb │ │ @ instruction: 0xeaff10f0 │ │ - b.n a3e54 │ │ + b.n a3e60 │ │ adds r0, #240 @ 0xf0 │ │ - b.n a3e58 │ │ + b.n a3e64 │ │ asrs r1, r0, #32 │ │ - b.n a443c │ │ + b.n a4448 │ │ movs r5, r0 │ │ @ instruction: 0xe98d3003 │ │ - b.n a4444 │ │ + b.n a4450 │ │ movs r3, r0 │ │ - b.n a4a6a │ │ + b.n a4a76 │ │ movs r1, #162 @ 0xa2 │ │ - b.n a492e │ │ + b.n a493a │ │ str r0, [r0, #0] │ │ - b.n a3e4c │ │ - blt.n a42ac │ │ + b.n a3e58 │ │ + blt.n a42b8 │ │ @ instruction: 0xebff0004 │ │ - b.n a3e62 │ │ + b.n a3e6e │ │ @ instruction: 0xffa3eaff │ │ strb r0, [r0, #0] │ │ - b.n a4682 │ │ + b.n a468e │ │ @ instruction: 0xffaeeaff │ │ strb r1, [r1, #0] │ │ - b.n a468a │ │ + b.n a4696 │ │ @ instruction: 0xffaceaff │ │ - bne.n a43ce │ │ + bne.n a43dc │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n a3e76 │ │ + b.n a3e82 │ │ @ instruction: 0xffa9eaff │ │ movs r1, r0 │ │ - b.n a4a50 │ │ + b.n a4a5c │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n a3e8e │ │ + b.n a3e9a │ │ lsls r1, r0, #20 │ │ - b.n a498a │ │ + b.n a4996 │ │ movs r5, r2 │ │ subs r0, r0, r0 │ │ lsls r4, r0, #3 │ │ - b.n a3eb0 │ │ + b.n a3ebc │ │ blx r8 │ │ - b.n a4986 │ │ - ldr r7, [pc, #1020] @ (a4774 ) │ │ - b.n a4a18 │ │ + b.n a4992 │ │ + ldr r7, [pc, #1020] @ (a4780 ) │ │ + b.n a4a24 │ │ movs r0, r0 │ │ - b.n a449c │ │ + b.n a44a8 │ │ lsls r2, r3, #1 │ │ - b.n a3f22 │ │ + b.n a3f2e │ │ movs r0, r0 │ │ - b.n a4a26 │ │ + b.n a4a32 │ │ movs r2, r2 │ │ subs r0, r0, r0 │ │ strb r6, [r0, #0] │ │ - b.n a4a96 │ │ + b.n a4aa2 │ │ @ instruction: 0xff9beaff │ │ lsls r4, r0, #2 │ │ - b.n a3ed4 │ │ + b.n a3ee0 │ │ movs r0, r0 │ │ - b.n a44b8 │ │ + b.n a44c4 │ │ lsls r2, r3, #1 │ │ - b.n a3f3e │ │ + b.n a3f4a │ │ movs r0, r0 │ │ - b.n a4a42 │ │ + b.n a4a4e │ │ @ instruction: 0xff960aff │ │ asrs r4, r6, #1 │ │ - b.n a3ee8 │ │ + b.n a3ef4 │ │ movs r1, r0 │ │ - b.n a4aee │ │ + b.n a4afa │ │ adds r0, #112 @ 0x70 │ │ - b.n a3ef0 │ │ + b.n a3efc │ │ cmp r6, #29 │ │ - b.n a4af6 │ │ + b.n a4b02 │ │ asrs r1, r0, #32 │ │ - b.n a44d8 │ │ + b.n a44e4 │ │ strb r0, [r0, #0] │ │ - b.n a3ed8 │ │ + b.n a3ee4 │ │ adds r0, #3 │ │ - b.n a44e0 │ │ + b.n a44ec │ │ @ instruction: 0xffd0eaff │ │ asrs r2, r0, #8 │ │ - b.n a4aca │ │ + b.n a4ad6 │ │ asrs r4, r0, #32 │ │ - b.n a3ed6 │ │ + b.n a3ee2 │ │ str r1, [r0, r0] │ │ - b.n a4b12 │ │ + b.n a4b1e │ │ @ instruction: 0xff9beaff │ │ asrs r0, r4, #1 │ │ - b.n a3f18 │ │ + b.n a3f24 │ │ movs r1, #214 @ 0xd6 │ │ - b.n a49de │ │ + b.n a49ea │ │ adds r0, #92 @ 0x5c │ │ - b.n a3f20 │ │ + b.n a3f2c │ │ lsls r4, r3, #1 │ │ - b.n a3f24 │ │ + b.n a3f30 │ │ asrs r1, r0, #32 │ │ - b.n a4508 │ │ + b.n a4514 │ │ adds r0, #3 │ │ - b.n a450c │ │ + b.n a4518 │ │ movs r0, r0 │ │ - b.n a4510 │ │ + b.n a451c │ │ movs r0, r0 │ │ - b.n a3f10 │ │ + b.n a3f1c │ │ movs r1, r0 │ │ - b.n a4b3a │ │ - blt.n a4310 │ │ + b.n a4b46 │ │ + blt.n a431c │ │ @ instruction: 0xebff7006 │ │ - b.n a490a │ │ + b.n a4916 │ │ vpmin.u q15, q15, │ │ - add r6, pc, #624 @ (adr r6, a4678 ) │ │ + add r6, pc, #704 @ (adr r6, a46d4 ) │ │ + movs r3, r0 │ │ + push {r1, r2, r3, r5, r7, lr} │ │ + vqrshrun.s64 d20, q0, #10 │ │ + vcvt.bf16.f32 d26, q14 │ │ movs r3, r0 │ │ - push {r2, r5, lr} │ │ - vqshrn.u64 d20, , #10 │ │ - vqshlu.s32 q13, q4, #22 │ │ - movs r3, r0 │ │ - push {r2, r3, r6, lr} │ │ - vrintm.f16 d26, d17 │ │ - vsri.64 d26, d20, #10 │ │ - movs r3, r0 │ │ - push {r3, r7} │ │ - vcvt.u32.f32 q11, , #10 │ │ - vqshl.u32 q13, q12, #22 │ │ - movs r3, r0 │ │ - @ instruction: 0xb74c │ │ - vrintm.f16 d21, d14 │ │ - vrint?.f16 , │ │ - vsri.64 q13, q0, #10 │ │ - movs r3, r0 │ │ - push {r3, r4, r6} │ │ - vrsra.u64 d21, d10, #10 │ │ - vtbl.8 d24, {d6-d9}, d29 │ │ + push {r1, r2, r4, r6, r7, lr} │ │ + vqrshrun.s64 d26, q10, #10 │ │ + vrintx.f16 q13, q4 │ │ + movs r3, r0 │ │ + push {r1, r4, lr} │ │ + @ instruction: 0xfff66eb4 │ │ + vrintp.f16 d26, d12 │ │ + movs r3, r0 │ │ + @ instruction: 0xb7d6 │ │ + vrint?.f16 , │ │ + vqshl.u64 , , #54 @ 0x36 │ │ + vrintx.f16 q13, q10 │ │ + movs r3, r0 │ │ + push {r1, r5, r6, r7} │ │ + vsri.32 , , #10 │ │ + vtbl.8 d24, {d22-d25}, d20 │ │ @ instruction: 0xfff64df0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n a496c │ │ + b.n a4978 │ │ ands r0, r0 │ │ - b.n a4796 │ │ + b.n a47a2 │ │ movs r4, r0 │ │ - b.n a3f7a │ │ + b.n a3f86 │ │ str r1, [r0, #0] │ │ - b.n a479e │ │ + b.n a47aa │ │ lsls r1, r0, #8 │ │ - b.n a4a82 │ │ + b.n a4a8e │ │ asrs r3, r1, #8 │ │ - b.n a4be6 │ │ + b.n a4bf2 │ │ asrs r4, r0, #32 │ │ - b.n a3f72 │ │ + b.n a3f7e │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ lsls r4, r5, #1 │ │ - b.n a3f9a │ │ - bne.n a44e0 │ │ + b.n a3fa6 │ │ + bne.n a44ee │ │ add.w r0, r0, r0 │ │ - b.n a4b1a │ │ + b.n a4b26 │ │ lsls r7, r7, #1 │ │ subs r0, r0, r0 │ │ - add sp, #184 @ 0xb8 │ │ + add sp, #188 @ 0xbc │ │ add.w r0, r0, r0 │ │ - b.n a4bc6 │ │ + b.n a4bd2 │ │ lsls r4, r5, #1 │ │ - b.n a3f92 │ │ + b.n a3f9e │ │ lsls r0, r1, #1 │ │ - b.n a3fb6 │ │ + b.n a3fc2 │ │ movs r0, r0 │ │ - b.n a4b32 │ │ + b.n a4b3e │ │ movs r4, r0 │ │ asrs r0, r4, #6 │ │ - bge.n a440e │ │ + bge.n a441a │ │ subs r7, r7, r7 │ │ - add r0, sp, #868 @ 0x364 │ │ + add r0, sp, #872 @ 0x368 │ │ add.w r0, r0, r4 │ │ - b.n a47e2 │ │ - add r7, sp, #744 @ 0x2e8 │ │ + b.n a47ee │ │ + add r7, sp, #748 @ 0x2ec │ │ @ instruction: 0xeb008000 │ │ - b.n a47ea │ │ - add r2, sp, #200 @ 0xc8 │ │ + b.n a47f6 │ │ + add r2, sp, #204 @ 0xcc │ │ add.w r1, r0, r0 │ │ - b.n a3fda │ │ + b.n a3fe6 │ │ movs r0, r0 │ │ - b.n a4b56 │ │ + b.n a4b62 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, r0] │ │ - b.n a3fde │ │ - beq.n a443e │ │ + b.n a3fea │ │ + beq.n a444c │ │ add.w r0, r0, r0 │ │ - b.n a4b70 │ │ + b.n a4b7c │ │ movs r5, r0 │ │ - b.n a480a │ │ + b.n a4816 │ │ @ instruction: 0xfffa1aff │ │ movs r6, r0 │ │ - b.n a407a │ │ + b.n a4086 │ │ strb r0, [r0, #0] │ │ - b.n a4c16 │ │ + b.n a4c22 │ │ strb r0, [r0, #4] │ │ - b.n a3fe2 │ │ + b.n a3fee │ │ movs r2, r0 │ │ - b.n a4afe │ │ + b.n a4b0a │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ lsls r4, r4, #4 │ │ - b.n a400e │ │ + b.n a401a │ │ ldrsh r2, [r2, r0] │ │ - b.n a49f2 │ │ + b.n a49fe │ │ movs r0, r0 │ │ - b.n a4b8e │ │ + b.n a4b9a │ │ lsls r0, r4, #4 │ │ asrs r4, r0, #22 │ │ asrs r0, r0, #32 │ │ asrs r0, r4, #14 │ │ lsls r0, r6, #4 │ │ - b.n a4022 │ │ + b.n a402e │ │ asrs r4, r5, #4 │ │ asrs r4, r0, #22 │ │ - beq.n a445e │ │ + beq.n a446c │ │ add.w r0, r0, r0, lsr #1 │ │ movt r0, #0 │ │ - b.n a4c4a │ │ + b.n a4c56 │ │ movs r4, r2 │ │ - b.n a4018 │ │ + b.n a4024 │ │ lsrs r5, r1, #10 │ │ orr.w r0, r5, #8388608 @ 0x800000 │ │ - b.n a4020 │ │ + b.n a402c │ │ movs r4, r0 │ │ - b.n a485a │ │ + b.n a4866 │ │ asrs r0, r6, #32 │ │ - b.n a407e │ │ + b.n a408a │ │ movs r0, r0 │ │ - b.n a4bc4 │ │ + b.n a4bd0 │ │ strb r0, [r3, #0] │ │ - b.n a4026 │ │ - add r7, sp, #804 @ 0x324 │ │ + b.n a4032 │ │ + add r7, sp, #808 @ 0x328 │ │ subs r0, r0, r4 │ │ movs r4, r0 │ │ - b.n a486e │ │ + b.n a487a │ │ asrs r0, r2, #32 │ │ - b.n a4092 │ │ + b.n a409e │ │ movs r0, r0 │ │ - b.n a4bd8 │ │ - add r7, sp, #788 @ 0x314 │ │ + b.n a4be4 │ │ + add r7, sp, #792 @ 0x318 │ │ subs r0, r0, r4 │ │ movs r0, r5 │ │ - b.n a4066 │ │ + b.n a4072 │ │ movs r1, r0 │ │ - b.n a4c22 │ │ + b.n a4c2e │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ - bne.n a4572 │ │ + bne.n a4580 │ │ add.w r0, r0, r0 │ │ - b.n a4d0e │ │ + b.n a4d1a │ │ movs r0, r5 │ │ - b.n a405a │ │ + b.n a4066 │ │ movs r4, r2 │ │ - b.n a407e │ │ + b.n a408a │ │ movs r1, r0 │ │ - b.n a4c3a │ │ + b.n a4c46 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ - bne.n a457e │ │ + bne.n a458c │ │ add.w r0, r0, r0 │ │ - b.n a4d26 │ │ + b.n a4d32 │ │ movs r4, r2 │ │ - b.n a4072 │ │ + b.n a407e │ │ movs r4, r6 │ │ - b.n a4096 │ │ + b.n a40a2 │ │ movs r1, r0 │ │ - b.n a4c52 │ │ + b.n a4c5e │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ - bne.n a458a │ │ + bne.n a4598 │ │ add.w r0, r0, r0 │ │ - b.n a4d3e │ │ + b.n a4d4a │ │ movs r4, r6 │ │ - b.n a408a │ │ + b.n a4096 │ │ movs r0, r0 │ │ - b.n a4c32 │ │ + b.n a4c3e │ │ movs r4, r6 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #2 │ │ - b.n a40b6 │ │ + b.n a40c2 │ │ movs r0, r0 │ │ - b.n a4c32 │ │ + b.n a4c3e │ │ movs r6, r2 │ │ lsrs r0, r0, #8 │ │ asrs r4, r2, #4 │ │ - b.n a40c2 │ │ + b.n a40ce │ │ movs r3, r0 │ │ - b.n a4c40 │ │ + b.n a4c4c │ │ movs r6, r1 │ │ subs r2, #0 │ │ str r0, [r0, #0] │ │ - b.n a4ce6 │ │ + b.n a4cf2 │ │ lsls r0, r1, #2 │ │ - b.n a40d2 │ │ + b.n a40de │ │ lsls r6, r0, #10 │ │ - b.n a46ae │ │ + b.n a46ba │ │ movs r0, #92 @ 0x5c │ │ - b.n a40d2 │ │ + b.n a40de │ │ movs r0, r0 │ │ - b.n a4c5a │ │ + b.n a4c66 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ lsls r0, r3, #1 │ │ - b.n a40de │ │ - beq.n a46be │ │ + b.n a40ea │ │ + beq.n a44cc │ │ add.w r1, r0, r4, lsr #4 │ │ - b.n a40ee │ │ + b.n a40fa │ │ movs r1, r0 │ │ - b.n a4ad6 │ │ + b.n a4ae2 │ │ movs r0, #3 │ │ - b.n a4ada │ │ + b.n a4ae6 │ │ movs r1, r0 │ │ - b.n a4876 │ │ + b.n a4882 │ │ str r0, [r0, #0] │ │ - b.n a4916 │ │ + b.n a4922 │ │ @ instruction: 0xfff23aff │ │ lsls r0, r1, #2 │ │ - b.n a4106 │ │ - beq.n a46ce │ │ + b.n a4112 │ │ + beq.n a46dc │ │ add.w r0, r0, r0 │ │ - b.n a4d26 │ │ + b.n a4d32 │ │ lsls r0, r1, #2 │ │ - b.n a40f2 │ │ + b.n a40fe │ │ movs r2, r0 │ │ - b.n a4d2e │ │ + b.n a4d3a │ │ lsls r4, r2, #4 │ │ - b.n a40fa │ │ + b.n a4106 │ │ lsls r0, r0, #2 │ │ - b.n a411e │ │ + b.n a412a │ │ movs r0, r0 │ │ - b.n a4c9a │ │ + b.n a4ca6 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ - beq.n a46de │ │ + beq.n a46ec │ │ add.w r0, r0, r0 │ │ - b.n a4d46 │ │ + b.n a4d52 │ │ lsls r0, r0, #2 │ │ - b.n a4112 │ │ + b.n a411e │ │ lsls r0, r2, #2 │ │ - b.n a4136 │ │ + b.n a4142 │ │ movs r0, r0 │ │ - b.n a4cb2 │ │ + b.n a4cbe │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ - beq.n a46ea │ │ + beq.n a46f8 │ │ add.w r0, r0, r0 │ │ - b.n a4d5e │ │ + b.n a4d6a │ │ lsls r0, r2, #2 │ │ - b.n a412a │ │ + b.n a4136 │ │ lsls r4, r1, #2 │ │ - b.n a414e │ │ + b.n a415a │ │ movs r0, r0 │ │ - b.n a4cca │ │ + b.n a4cd6 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ - beq.n a46f6 │ │ + beq.n a4704 │ │ add.w r0, r0, r0 │ │ - b.n a4d76 │ │ + b.n a4d82 │ │ lsls r4, r1, #2 │ │ - b.n a4142 │ │ + b.n a414e │ │ lsls r4, r7, #1 │ │ - b.n a4166 │ │ + b.n a4172 │ │ movs r0, r0 │ │ - b.n a4ce2 │ │ + b.n a4cee │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ - beq.n a4702 │ │ + beq.n a4710 │ │ add.w r0, r0, r0 │ │ - b.n a4d8e │ │ + b.n a4d9a │ │ lsls r4, r7, #1 │ │ - b.n a415a │ │ + b.n a4166 │ │ lsls r4, r0, #2 │ │ - b.n a417e │ │ + b.n a418a │ │ movs r0, r0 │ │ - b.n a4cfa │ │ + b.n a4d06 │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ lsls r7, r7, #3 │ │ - b.n a4da2 │ │ + b.n a4dae │ │ lsls r5, r3, #1 │ │ - b.n a41ee │ │ + b.n a41fa │ │ movs r0, r1 │ │ - b.n a49aa │ │ + b.n a49b6 │ │ ldrh r0, [r6, #46] @ 0x2e │ │ - ldmia.w sp!, {r0, r1, r7, r8, r9, sl, fp, sp, pc} │ │ + ldmia.w sp!, {r2, r7, r8, r9, sl, fp, sp, pc} │ │ add.w r0, r0, r0 │ │ - b.n a4db6 │ │ + b.n a4dc2 │ │ lsls r4, r0, #2 │ │ - b.n a4182 │ │ + b.n a418e │ │ @ instruction: 0xfff7eaff │ │ movs r0, r2 │ │ - b.n a41c0 │ │ + b.n a41cc │ │ movs r0, #40 @ 0x28 │ │ - b.n a4dc6 │ │ + b.n a4dd2 │ │ asrs r4, r1, #32 │ │ - b.n a41c8 │ │ + b.n a41d4 │ │ movs r0, r0 │ │ - b.n a47ac │ │ + b.n a47b8 │ │ asrs r1, r0, #32 │ │ - b.n a47b0 │ │ - bls.n a4644 │ │ - @ instruction: 0xebffa9ea │ │ - vrintx.f16 q11, q0 │ │ + b.n a47bc │ │ + bls.n a4650 │ │ + @ instruction: 0xebffab6d │ │ + vrintn.f16 d22, d28 │ │ vaddl.u q9, d6, d4 │ │ - b.n a41c2 │ │ + b.n a41ce │ │ asrs r2, r6, #1 │ │ - b.n a4de6 │ │ + b.n a4df2 │ │ lsrs r2, r0, #32 │ │ - b.n a4cce │ │ + b.n a4cda │ │ movs r7, r1 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n a4cd6 │ │ + b.n a4ce2 │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ asrs r4, r2, #32 │ │ - b.n a41da │ │ + b.n a41e6 │ │ movs r0, r0 │ │ - b.n a4d60 │ │ + b.n a4d6c │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ - ldr r4, [pc, #64] @ (a4704 ) │ │ + ldr r4, [pc, #64] @ (a4710 ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n a4be4 │ │ + b.n a4bf0 │ │ ands r0, r0 │ │ - b.n a4a0e │ │ + b.n a4a1a │ │ movs r1, r0 │ │ - b.n a4a12 │ │ + b.n a4a1e │ │ @ instruction: 0xfff1ebff │ │ movs r0, #4 │ │ - b.n a4202 │ │ + b.n a420e │ │ movs r4, r0 │ │ - b.n a4a1e │ │ - ldr r4, [pc, #64] @ (a4720 ) │ │ + b.n a4a2a │ │ + ldr r4, [pc, #64] @ (a472c ) │ │ ldmia.w sp!, {r1, ip} │ │ - b.n a4dea │ │ + b.n a4df6 │ │ asrs r4, r0, #32 │ │ - b.n a41ea │ │ + b.n a41f6 │ │ asrs r2, r4, #1 │ │ - b.n a4e2e │ │ - adds r7, r0, r0 │ │ + b.n a4e3a │ │ + adds r0, r1, r0 │ │ and.w r7, r0, r2, lsl #3 │ │ - b.n a4d06 │ │ + b.n a4d12 │ │ lsrs r7, r7, #31 │ │ - b.n a4d98 │ │ + b.n a4da4 │ │ vrhadd.u16 d14, d14, d31 │ │ - ldr r0, [pc, #960] @ (a4ac0 ) │ │ + ldr r0, [pc, #960] @ (a4acc ) │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n a4c20 │ │ - beq.n a47d8 │ │ - b.n a4ba4 │ │ + b.n a4c2c │ │ + beq.n a47e4 │ │ + b.n a4bb0 │ │ movs r0, r0 │ │ - b.n a4dae │ │ + b.n a4dba │ │ lsls r7, r7, #1 │ │ lsrs r0, r0, #8 │ │ ands r0, r0 │ │ - b.n a4a56 │ │ + b.n a4a62 │ │ movs r0, r0 │ │ - b.n a423a │ │ + b.n a4246 │ │ str r1, [r0, #100] @ 0x64 │ │ - b.n a4d30 │ │ + b.n a4d3c │ │ ldr r1, [r1, #40] @ 0x28 │ │ - b.n a4da4 │ │ + b.n a4db0 │ │ movs r6, r0 │ │ - b.n a49c6 │ │ + b.n a49d2 │ │ lsls r7, r7, #1 │ │ subs r0, r0, r0 │ │ str r1, [r0, r0] │ │ - b.n a4a6e │ │ + b.n a4a7a │ │ strb r0, [r5, #1] │ │ - b.n a425a │ │ - beq.n a4710 │ │ + b.n a4266 │ │ + beq.n a471e │ │ add.w r0, r0, r0 │ │ - b.n a49e8 │ │ + b.n a49f4 │ │ lsls r0, r0, #2 │ │ subs r0, r0, r0 │ │ asrs r0, r2, #32 │ │ - b.n a426a │ │ + b.n a4276 │ │ movs r1, r0 │ │ - b.n a4e86 │ │ + b.n a4e92 │ │ movs r0, r0 │ │ - b.n a4dec │ │ + b.n a4df8 │ │ movs r7, r1 │ │ lsrs r0, r0, #8 │ │ asrs r6, r6, #2 │ │ - b.n a4afa │ │ + b.n a4b06 │ │ movs r0, #2 │ │ - b.n a4d66 │ │ + b.n a4d72 │ │ movs r2, r0 │ │ - b.n a497c │ │ + b.n a4988 │ │ movs r3, r1 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #2 │ │ - b.n a428a │ │ + b.n a4296 │ │ movs r0, r0 │ │ - b.n a4e08 │ │ + b.n a4e14 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ strb r4, [r1, #0] │ │ - b.n a4290 │ │ + b.n a429c │ │ movs r0, r0 │ │ - b.n a4e20 │ │ + b.n a4e2c │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n a4aba │ │ + b.n a4ac6 │ │ movs r3, r0 │ │ - @ instruction: 0xea00d0cb │ │ + @ instruction: 0xea00d0cc │ │ add.w r0, r0, r0 │ │ - b.n a4a34 │ │ + b.n a4a40 │ │ movs r5, r0 │ │ - b.n a4aca │ │ + b.n a4ad6 │ │ lsls r1, r3, #1 │ │ subs r0, r0, r0 │ │ subs r7, r3, #6 │ │ - b.n a4aba │ │ + b.n a4ac6 │ │ movs r6, r0 │ │ - b.n a4a38 │ │ + b.n a4a44 │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ asrs r0, r0, #32 │ │ - b.n a4ede │ │ - bl 50029e │ │ + b.n a4eea │ │ + bl 5002aa │ │ cmp r7, #145 @ 0x91 │ │ - b.n a4aae │ │ + b.n a4aba │ │ movs r0, r0 │ │ - b.n a4e4e │ │ + b.n a4e5a │ │ movs r4, r1 │ │ lsrs r0, r0, #8 │ │ cmp r7, #159 @ 0x9f │ │ - b.n a4ada │ │ + b.n a4ae6 │ │ movs r6, r0 │ │ - b.n a4a5a │ │ + b.n a4a66 │ │ @ instruction: 0xfff90aff │ │ asrs r0, r6, #7 │ │ - b.n a42fc │ │ - ldr r1, [pc, #176] @ (a4870 ) │ │ - b.n a4dd2 │ │ - ldr r7, [pc, #1020] @ (a4bc0 ) │ │ - b.n a4e64 │ │ - bl 4c42c6 │ │ + b.n a4308 │ │ + ldr r1, [pc, #176] @ (a487c ) │ │ + b.n a4dde │ │ + ldr r7, [pc, #1020] @ (a4bcc ) │ │ + b.n a4e70 │ │ + bl 4c42d2 │ │ asrs r1, r0, #32 │ │ - b.n a48ec │ │ + b.n a48f8 │ │ movs r4, r0 │ │ - b.n a4b12 │ │ + b.n a4b1e │ │ movs r2, #97 @ 0x61 │ │ - b.n a4dd6 │ │ - bl 5002d6 │ │ - adds r6, #180 @ 0xb4 │ │ + b.n a4de2 │ │ + bl 5002e2 │ │ + adds r6, #181 @ 0xb5 │ │ add.w r0, r0, r1, lsl #1 │ │ and.w r7, r0, r6, lsl #27 │ │ - b.n a4df6 │ │ + b.n a4e02 │ │ str r0, [r0, r0] │ │ - b.n a4f2a │ │ + b.n a4f36 │ │ ldr r7, [r7, #124] @ 0x7c │ │ - b.n a4e8c │ │ + b.n a4e98 │ │ movs r0, r0 │ │ - b.n a4e92 │ │ - bl 5002f2 │ │ + b.n a4e9e │ │ + bl 5002fe │ │ movs r6, r2 │ │ subs r0, r0, r0 │ │ movs r4, r2 │ │ - b.n a4326 │ │ + b.n a4332 │ │ asrs r5, r1, #32 │ │ - b.n a4b42 │ │ - beq.n a48c0 │ │ + b.n a4b4e │ │ + beq.n a48ce │ │ add.w r0, r0, r0 │ │ - b.n a4eaa │ │ + b.n a4eb6 │ │ lsls r3, r4, #1 │ │ subs r0, r0, r0 │ │ movs r4, r2 │ │ - b.n a434c │ │ + b.n a4358 │ │ movs r0, r0 │ │ - b.n a4eb6 │ │ + b.n a4ec2 │ │ movs r6, r1 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n a4b5e │ │ + b.n a4b6a │ │ asrs r1, r0, #32 │ │ - b.n a4f62 │ │ + b.n a4f6e │ │ movs r0, #1 │ │ - b.n a4f66 │ │ + b.n a4f72 │ │ lsls r0, r5, #1 │ │ add.w r0, r0, sp, lsl #4 │ │ - b.n a4cce │ │ + b.n a4cda │ │ asrs r0, r0, #32 │ │ asrs r0, r4, #6 │ │ movs r0, #6 │ │ - b.n a48d6 │ │ + b.n a48e2 │ │ movs r0, #1 │ │ asrs r0, r4, #6 │ │ asrs r0, r2, #32 │ │ - b.n a4cde │ │ + b.n a4cea │ │ asrs r2, r0, #32 │ │ asrs r0, r4, #6 │ │ movs r0, #11 │ │ - b.n a4ce6 │ │ + b.n a4cf2 │ │ movs r0, #1 │ │ asrs r0, r4, #6 │ │ asrs r0, r0, #32 │ │ - b.n a500e │ │ + b.n a501a │ │ str r1, [r0, r0] │ │ - b.n a48f2 │ │ + b.n a48fe │ │ str r2, [r0, r0] │ │ asrs r0, r4, #6 │ │ lsls r4, r0, #2 │ │ - b.n a4382 │ │ + b.n a438e │ │ movs r0, r0 │ │ - b.n a4efe │ │ + b.n a4f0a │ │ movs r4, r1 │ │ asrs r0, r2, #22 │ │ movs r0, r0 │ │ asrs r0, r2, #13 │ │ movs r4, r0 │ │ asrs r0, r4, #6 │ │ - blt.n a480e │ │ + blt.n a481a │ │ subs r7, r7, r7 │ │ movs r4, r0 │ │ - b.n a4bb2 │ │ + b.n a4bbe │ │ asrs r0, r0, #32 │ │ - b.n a4fb6 │ │ + b.n a4fc2 │ │ mrc2 11, 7, lr, cr3, cr15, {7} @ │ │ movs r0, r0 │ │ - b.n a4f1e │ │ + b.n a4f2a │ │ lsrs r1, r2, #24 │ │ - b.n a4d8a │ │ + b.n a4d96 │ │ str r1, [r2, r0] │ │ asrs r6, r0, #9 │ │ - beq.n a47e2 │ │ + beq.n a47f0 │ │ add.w r0, r0, r0 │ │ - b.n a4f2e │ │ + b.n a4f3a │ │ movs r7, r5 │ │ subs r0, r0, r0 │ │ lsrs r6, r1, #29 │ │ - b.n a4d9e │ │ - beq.n a47ea │ │ + b.n a4daa │ │ + beq.n a47f8 │ │ add.w r0, r0, r0 │ │ - b.n a4f3e │ │ + b.n a4f4a │ │ movs r1, r6 │ │ subs r0, r0, r0 │ │ lsls r7, r7, #5 │ │ - b.n a4ea6 │ │ + b.n a4eb2 │ │ movs r0, r0 │ │ - b.n a49b2 │ │ + b.n a49be │ │ movs r7, r7 │ │ - b.n a502e │ │ + b.n a503a │ │ lsrs r5, r0, #20 │ │ - b.n a4db2 │ │ - beq.n a47f8 │ │ + b.n a4dbe │ │ + beq.n a4806 │ │ add.w r1, r0, ip, lsr #32 │ │ - b.n a43e2 │ │ + b.n a43ee │ │ movs r0, r0 │ │ - b.n a4f5e │ │ + b.n a4f6a │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ asrs r4, r2, #32 │ │ - b.n a43e6 │ │ + b.n a43f2 │ │ movs r4, r0 │ │ - b.n a4d4a │ │ + b.n a4d56 │ │ asrs r4, r3, #4 │ │ - b.n a43d6 │ │ - ldmia r7, {r0, r1, r3, r4, r5, r7} │ │ + b.n a43e2 │ │ + ldmia r7, {r2, r3, r4, r5, r7} │ │ @ instruction: 0xeb00fff7 │ │ @ instruction: 0xeaff0004 │ │ - b.n a4c1a │ │ - ldmia r7, {r3, r4, r5, r7} │ │ + b.n a4c26 │ │ + ldmia r7, {r0, r3, r4, r5, r7} │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n a5022 │ │ + b.n a502e │ │ movs r0, r0 │ │ - b.n a4f90 │ │ + b.n a4f9c │ │ movs r5, r4 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n a4c2e │ │ - beq.n a4910 │ │ - b.n a4d88 │ │ + b.n a4c3a │ │ + beq.n a491c │ │ + b.n a4d94 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r3, r4, r5, r7, ip} │ │ - b.n a4438 │ │ + b.n a4444 │ │ @ instruction: 0x47c6 │ │ - b.n a4f0e │ │ - ldr r7, [pc, #1020] @ (a4cfc ) │ │ - b.n a4fa0 │ │ + b.n a4f1a │ │ + ldr r7, [pc, #1020] @ (a4d08 ) │ │ + b.n a4fac │ │ cmp r7, #151 @ 0x97 │ │ - b.n a5046 │ │ + b.n a5052 │ │ asrs r1, r0, #32 │ │ - b.n a4a28 │ │ + b.n a4a34 │ │ movs r4, r0 │ │ - b.n a4c4e │ │ + b.n a4c5a │ │ @ instruction: 0xffb1eaff │ │ asrs r0, r2, #2 │ │ - b.n a4454 │ │ + b.n a4460 │ │ movs r6, r2 │ │ - b.n a505a │ │ + b.n a5066 │ │ cmp r7, #147 @ 0x93 │ │ - b.n a505e │ │ + b.n a506a │ │ ands r6, r2 │ │ - b.n a5062 │ │ + b.n a506e │ │ asrs r1, r0, #32 │ │ - b.n a4a44 │ │ + b.n a4a50 │ │ @ instruction: 0xffabeaff │ │ asrs r4, r7, #1 │ │ - b.n a446c │ │ - ldr r1, [pc, #176] @ (a49e0 ) │ │ - b.n a4f42 │ │ - ldr r7, [pc, #1020] @ (a4d30 ) │ │ - b.n a4fd4 │ │ + b.n a4478 │ │ + ldr r1, [pc, #176] @ (a49ec ) │ │ + b.n a4f4e │ │ + ldr r7, [pc, #1020] @ (a4d3c ) │ │ + b.n a4fe0 │ │ movs r2, #79 @ 0x4f │ │ - b.n a4f3a │ │ + b.n a4f46 │ │ asrs r1, r0, #32 │ │ - b.n a4a5c │ │ + b.n a4a68 │ │ @ instruction: 0xfff1eaff │ │ movs r4, r0 │ │ - b.n a446e │ │ + b.n a447a │ │ lsls r2, r0, #4 │ │ - b.n a504a │ │ + b.n a5056 │ │ movs r4, r0 │ │ - b.n a4456 │ │ + b.n a4462 │ │ vpmin.u q15, q13, │ │ lsls r4, r4, #1 │ │ - b.n a4494 │ │ + b.n a44a0 │ │ movs r2, #126 @ 0x7e │ │ - b.n a4f5a │ │ + b.n a4f66 │ │ asrs r0, r4, #1 │ │ - b.n a449c │ │ + b.n a44a8 │ │ movs r0, r0 │ │ - b.n a4a80 │ │ + b.n a4a8c │ │ asrs r1, r0, #32 │ │ - b.n a4a84 │ │ - bls.n a49ae │ │ + b.n a4a90 │ │ + bls.n a49ba │ │ @ instruction: 0xebff0054 │ │ - b.n a44ac │ │ + b.n a44b8 │ │ movs r2, #131 @ 0x83 │ │ - b.n a4f72 │ │ + b.n a4f7e │ │ asrs r0, r2, #1 │ │ - b.n a44b4 │ │ + b.n a44c0 │ │ movs r0, r0 │ │ - b.n a4a98 │ │ + b.n a4aa4 │ │ asrs r1, r0, #32 │ │ - b.n a4a9c │ │ - bls.n a49ba │ │ + b.n a4aa8 │ │ + bls.n a49c6 │ │ @ instruction: 0xebff1030 │ │ - b.n a44c4 │ │ + b.n a44d0 │ │ movs r5, r0 │ │ - b.n a4cca │ │ + b.n a4cd6 │ │ movs r2, #150 @ 0x96 │ │ - b.n a4f8e │ │ + b.n a4f9a │ │ asrs r1, r0, #32 │ │ - b.n a4ab0 │ │ - adds r6, #70 @ 0x46 │ │ + b.n a4abc │ │ + adds r6, #71 @ 0x47 │ │ add.w r0, r0, r5, lsl #16 │ │ - b.n a4cda │ │ + b.n a4ce6 │ │ @ instruction: 0xffd2eaff │ │ - ldmia r7, {r0, r1, r3, r5, r7} │ │ + ldmia r7, {r2, r3, r5, r7} │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n a44c6 │ │ + b.n a44d2 │ │ @ instruction: 0xffaaeaff │ │ - @ instruction: 0xb6db │ │ - vrintm.f16 , │ │ - vqshrun.s64 d27, , #10 │ │ - vqshlu.s64 , , #54 @ 0x36 │ │ - vcvt.bf16.f32 d27, │ │ - @ instruction: 0xfff69e90 │ │ - vqshlu.s64 d27, d11, #54 @ 0x36 │ │ - vsubw.u , q11, d21 │ │ - vrintm.f16 d27, d3 │ │ + @ instruction: 0xb6cf │ │ + vqshlu.s64 d27, d23, #54 @ 0x36 │ │ + vtbl.8 d27, {d6}, d23 │ │ + vrintm.f16 , │ │ + vcvt.bf16.f32 d27, │ │ + vmla.i q13, q3, d19[0] │ │ + vrintm.f16 d27, d15 │ │ + @ instruction: 0xfff6736b │ │ + vqshlu.s32 , , #22 │ │ @ instruction: 0xfff64ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n a4ef0 │ │ + b.n a4efc │ │ svc 85 @ 0x55 │ │ - b.n a4e74 │ │ + b.n a4e80 │ │ str r0, [sp, #16] │ │ - b.n a44fe │ │ + b.n a450a │ │ movs r0, #36 @ 0x24 │ │ - b.n a44fc │ │ + b.n a4508 │ │ lsrs r2, r0, #32 │ │ - b.n a5018 │ │ + b.n a5024 │ │ asrs r0, r6, #32 │ │ - b.n a4504 │ │ + b.n a4510 │ │ lsls r2, r3, #5 │ │ subs r0, r0, r0 │ │ - add r0, pc, #0 @ (adr r0, a49f0 ) │ │ - b.n a4d32 │ │ + add r0, pc, #0 @ (adr r0, a49fc ) │ │ + b.n a4d3e │ │ lsls r2, r1, #8 │ │ - b.n a4e08 │ │ + b.n a4e14 │ │ lsls r2, r0, #8 │ │ - b.n a509a │ │ + b.n a50a6 │ │ lsls r6, r0, #5 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n a451c │ │ + b.n a4528 │ │ movs r2, r1 │ │ - b.n a4d46 │ │ - blt.n a4a08 │ │ + b.n a4d52 │ │ + blt.n a4a14 │ │ @ instruction: 0xebff004c │ │ - b.n a4528 │ │ + b.n a4534 │ │ lsrs r6, r1, #29 │ │ - b.n a4f26 │ │ + b.n a4f32 │ │ movs r4, r3 │ │ - b.n a4530 │ │ + b.n a453c │ │ lsls r0, r0, #1 │ │ - b.n a4eb0 │ │ + b.n a4ebc │ │ movs r0, r1 │ │ - b.n a4f1e │ │ + b.n a4f2a │ │ movs r0, r7 │ │ - b.n a453c │ │ + b.n a4548 │ │ movs r0, r0 │ │ - b.n a51e6 │ │ + b.n a51f2 │ │ str r0, [r0, #0] │ │ - b.n a516a │ │ + b.n a5176 │ │ movs r0, r4 │ │ - b.n a4548 │ │ + b.n a4554 │ │ lsls r4, r1, #1 │ │ - b.n a456c │ │ + b.n a4578 │ │ movs r0, r0 │ │ - b.n a50d6 │ │ + b.n a50e2 │ │ movs r1, r0 │ │ lsls r6, r2, #12 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ lsls r4, r0, #2 │ │ - b.n a4576 │ │ + b.n a4582 │ │ lsls r0, r0, #2 │ │ - b.n a4f46 │ │ + b.n a4f52 │ │ lsrs r5, r1, #11 │ │ orn sl, r0, #423936 @ 0x67800 │ │ orn r0, r0, #12582912 @ 0xc00000 │ │ - b.n a4ee8 │ │ + b.n a4ef4 │ │ lsrs r5, r1, #11 │ │ orr.w sl, r0, #423936 @ 0x67800 │ │ orr.w r0, r0, #8519680 @ 0x820000 │ │ and.w r0, r0, r0, lsl #1 │ │ - b.n a4ef8 │ │ + b.n a4f04 │ │ asrs r2, r1, #32 │ │ - b.n a4da6 │ │ - bls.n a4b12 │ │ + b.n a4db2 │ │ + bls.n a4b1e │ │ @ instruction: 0xebff303f │ │ - b.n a4524 │ │ + b.n a4530 │ │ movs r0, #56 @ 0x38 │ │ - b.n a45ac │ │ + b.n a45b8 │ │ lsls r0, r0, #1 │ │ - b.n a452c │ │ + b.n a4538 │ │ asrs r0, r1, #1 │ │ - b.n a45ae │ │ + b.n a45ba │ │ sbcs r3, r0 │ │ - b.n a49e2 │ │ + b.n a49ee │ │ str r4, [r3, r1] │ │ - b.n a4636 │ │ + b.n a4642 │ │ movs r0, #4 │ │ - b.n a45aa │ │ + b.n a45b6 │ │ movs r0, #44 @ 0x2c │ │ - b.n a45a4 │ │ + b.n a45b0 │ │ movs r0, #1 │ │ - b.n a51ce │ │ + b.n a51da │ │ strh r0, [r6, #24] │ │ - b.n a4a96 │ │ + b.n a4aa2 │ │ lsrs r6, r2, #29 │ │ - b.n a4f98 │ │ + b.n a4fa4 │ │ asrs r0, r0, #32 │ │ - b.n a51da │ │ + b.n a51e6 │ │ strb r0, [r2, #0] │ │ - b.n a45d2 │ │ + b.n a45de │ │ adds r0, #64 @ 0x40 │ │ - b.n a45bc │ │ + b.n a45c8 │ │ lsrs r3, r1, #29 │ │ add.w r0, r0, r0, lsl #8 │ │ - b.n a4dea │ │ + b.n a4df6 │ │ movs r1, r0 │ │ - b.n a4dce │ │ + b.n a4dda │ │ movs r0, r5 │ │ - b.n a45cc │ │ + b.n a45d8 │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #1 │ │ - b.n a45ee │ │ + b.n a45fa │ │ movs r4, r2 │ │ - b.n a45de │ │ + b.n a45ea │ │ movs r4, r0 │ │ - b.n a4d62 │ │ + b.n a4d6e │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n a517a │ │ + b.n a5186 │ │ lsls r4, r7, #3 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n a460c │ │ + b.n a4618 │ │ movs r1, r0 │ │ - b.n a5102 │ │ + b.n a510e │ │ movs r0, #72 @ 0x48 │ │ - b.n a45f4 │ │ + b.n a4600 │ │ asrs r4, r0, #1 │ │ - b.n a45f8 │ │ + b.n a4604 │ │ lsls r0, r2, #20 │ │ - b.n a4bf0 │ │ + b.n a4bfc │ │ str r4, [r2, r0] │ │ - b.n a4fe6 │ │ + b.n a4ff2 │ │ movs r6, r0 │ │ asrs r2, r3, #23 │ │ movs r0, r1 │ │ asrs r0, r2, #12 │ │ lsls r0, r3, #1 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #1 │ │ - b.n a462a │ │ + b.n a4636 │ │ asrs r0, r0, #32 │ │ - b.n a523a │ │ + b.n a5246 │ │ strh r4, [r6, #0] │ │ - b.n a4618 │ │ + b.n a4624 │ │ strh r6, [r0, #0] │ │ - b.n a4e42 │ │ + b.n a4e4e │ │ str r4, [r7, r0] │ │ - b.n a4620 │ │ + b.n a462c │ │ str r0, [r2, #0] │ │ - b.n a462a │ │ + b.n a4636 │ │ movs r0, r3 │ │ - b.n a500e │ │ + b.n a501a │ │ lsrs r0, r6, #28 │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n a4e56 │ │ + b.n a4e62 │ │ str r1, [r0, r0] │ │ - b.n a4e5a │ │ + b.n a4e66 │ │ movs r0, r6 │ │ - b.n a4658 │ │ + b.n a4664 │ │ asrs r0, r1, #1 │ │ - b.n a465c │ │ + b.n a4668 │ │ movs r0, #68 @ 0x44 │ │ - b.n a4660 │ │ + b.n a466c │ │ movs r0, r0 │ │ - b.n a51ca │ │ + b.n a51d6 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n a51de │ │ + b.n a51ea │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ movs r6, r0 │ │ - b.n a4bdc │ │ + b.n a4be8 │ │ movs r0, r0 │ │ - b.n a50e2 │ │ + b.n a50ee │ │ movs r1, r2 │ │ subs r2, #0 │ │ str r2, [r0, #112] @ 0x70 │ │ - b.n a4f58 │ │ + b.n a4f64 │ │ lsls r4, r1, #1 │ │ - b.n a4684 │ │ + b.n a4690 │ │ movs r0, r0 │ │ - b.n a51ee │ │ + b.n a51fa │ │ lsls r7, r1, #2 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n a5186 │ │ + b.n a5192 │ │ lsls r7, r1, #2 │ │ subs r0, r0, r0 │ │ movs r3, r5 │ │ - b.n a5000 │ │ + b.n a500c │ │ str r0, [r0, r0] │ │ - b.n a52a2 │ │ + b.n a52ae │ │ movs r0, r0 │ │ - b.n a510a │ │ + b.n a5116 │ │ lsls r3, r2, #1 │ │ subs r2, #0 │ │ lsrs r1, r0, #32 │ │ - b.n a4f9a │ │ + b.n a4fa6 │ │ lsls r1, r2, #1 │ │ subs r0, r0, r0 │ │ lsls r2, r0, #28 │ │ - b.n a51a2 │ │ + b.n a51ae │ │ movs r3, r3 │ │ subs r0, r0, r0 │ │ movs r4, r2 │ │ - b.n a46b2 │ │ + b.n a46be │ │ asrs r2, r0, #32 │ │ - b.n a52c2 │ │ - subs r1, #74 @ 0x4a │ │ + b.n a52ce │ │ + subs r1, #75 @ 0x4b │ │ add.w r0, r0, r6, lsl #1 │ │ and.w pc, r0, pc, ror #3 │ │ - b.n a51ac │ │ + b.n a51b8 │ │ lsrs r3, r7, #31 │ │ - b.n a5228 │ │ + b.n a5234 │ │ str r0, [r0, #0] │ │ - b.n a4ba8 │ │ + b.n a4bb4 │ │ movs r5, r0 │ │ - b.n a4ec8 │ │ + b.n a4ed4 │ │ @ instruction: 0xffe90aff │ │ lsls r0, r1, #1 │ │ - b.n a46d6 │ │ + b.n a46e2 │ │ asrs r0, r0, #32 │ │ - b.n a52e6 │ │ + b.n a52f2 │ │ lsrs r5, r2, #24 │ │ - b.n a50aa │ │ + b.n a50b6 │ │ lsrs r1, r1, #28 │ │ add.w r0, r0, r1, lsl #8 │ │ - b.n a4ed2 │ │ + b.n a4ede │ │ lsls r2, r3, #1 │ │ lsrs r0, r0, #8 │ │ movs r4, r2 │ │ - b.n a46d4 │ │ + b.n a46e0 │ │ asrs r0, r3, #32 │ │ - b.n a46d8 │ │ - bhi.n a4b7a │ │ + b.n a46e4 │ │ + bhi.n a4b86 │ │ @ instruction: 0xebff2014 │ │ - b.n a4700 │ │ + b.n a470c │ │ movs r2, r0 │ │ - b.n a4c6a │ │ + b.n a4c76 │ │ movs r0, #24 │ │ - b.n a4708 │ │ + b.n a4714 │ │ asrs r2, r0, #32 │ │ - b.n a4d54 │ │ + b.n a4d60 │ │ movs r7, r0 │ │ - b.n a4c76 │ │ + b.n a4c82 │ │ movs r5, r0 │ │ - b.n a4d7c │ │ + b.n a4d88 │ │ asrs r0, r1, #1 │ │ - b.n a4718 │ │ + b.n a4724 │ │ movs r0, #68 @ 0x44 │ │ - b.n a471c │ │ + b.n a4728 │ │ str r2, [r0, #112] @ 0x70 │ │ movs r2, #9 │ │ @ instruction: 0xffd6eaff │ │ movs r4, r3 │ │ - b.n a4728 │ │ - bfcsel 0, a53ee , 2, ne │ │ + b.n a4734 │ │ + bfcsel 0, a53fa , 2, ne │ │ movs r0, r0 │ │ - b.n a5296 │ │ + b.n a52a2 │ │ lsls r5, r0, #3 │ │ subs r0, r0, r0 │ │ movs r4, r7 │ │ - b.n a4738 │ │ + b.n a4744 │ │ asrs r4, r3, #1 │ │ - b.n a47b6 │ │ + b.n a47c2 │ │ movs r0, #36 @ 0x24 │ │ - b.n a4726 │ │ + b.n a4732 │ │ lsls r4, r4, #13 │ │ - b.n a4748 │ │ + b.n a4754 │ │ movs r0, r0 │ │ - b.n a4d2c │ │ + b.n a4d38 │ │ adds r0, #80 @ 0x50 │ │ - b.n a4732 │ │ + b.n a473e │ │ movs r0, r2 │ │ - b.n a474a │ │ + b.n a4756 │ │ asrs r2, r2, #4 │ │ - b.n a4d20 │ │ + b.n a4d2c │ │ movs r0, #0 │ │ - b.n a50e4 │ │ + b.n a50f0 │ │ asrs r1, r0, #32 │ │ - b.n a50a4 │ │ + b.n a50b0 │ │ asrs r2, r0, #32 │ │ - b.n a4c28 │ │ + b.n a4c34 │ │ movs r0, #4 │ │ - b.n a536a │ │ - ldmia r7, {r3, r6, r7} │ │ + b.n a5376 │ │ + ldmia r7, {r0, r3, r6, r7} │ │ add.w r0, r0, r0 │ │ - b.n a52d2 │ │ + b.n a52de │ │ movs r1, r3 │ │ lsrs r0, r0, #8 │ │ - ldmia r7!, {r0, r2} │ │ + ldmia r7!, {r1, r2} │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n a475e │ │ + b.n a476a │ │ movs r4, r3 │ │ - b.n a477c │ │ - ldmia r7, {r1, r2, r5, r7} │ │ + b.n a4788 │ │ + ldmia r7, {r0, r1, r2, r5, r7} │ │ add.w r0, r0, r0 │ │ - b.n a52ea │ │ + b.n a52f6 │ │ lsls r7, r7, #2 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n a4f92 │ │ + b.n a4f9e │ │ movs r3, r2 │ │ and.w r0, r0, ip, lsr #1 │ │ - b.n a480e │ │ + b.n a481a │ │ asrs r4, r3, #32 │ │ - b.n a4792 │ │ + b.n a479e │ │ movs r0, #36 @ 0x24 │ │ - b.n a478c │ │ + b.n a4798 │ │ movs r1, r6 │ │ - b.n a4f0a │ │ + b.n a4f16 │ │ @ instruction: 0xffa19aff │ │ lsls r5, r3, #23 │ │ - b.n a5022 │ │ + b.n a502e │ │ movs r0, r0 │ │ - b.n a5312 │ │ + b.n a531e │ │ movs r5, r5 │ │ ldrh r0, [r0, r0] │ │ movs r1, #220 @ 0xdc │ │ - b.n a5004 │ │ + b.n a5010 │ │ movs r0, r0 │ │ - b.n a53be │ │ + b.n a53ca │ │ movs r0, r4 │ │ - b.n a479c │ │ + b.n a47a8 │ │ asrs r3, r0, #32 │ │ - b.n a4fc6 │ │ + b.n a4fd2 │ │ movs r2, r1 │ │ - b.n a4fca │ │ + b.n a4fd6 │ │ adds r0, #0 │ │ - b.n a53ce │ │ + b.n a53da │ │ lsrs r2, r1, #1 │ │ add.w r0, r0, r0 │ │ - b.n a5336 │ │ + b.n a5342 │ │ @ instruction: 0xff950aff │ │ lsls r3, r1, #2 │ │ and.w r0, r0, ip, lsr #32 │ │ - b.n a47dc │ │ - ldmia r7, {r1, r2, r3, r7} │ │ + b.n a47e8 │ │ + ldmia r7, {r0, r1, r2, r3, r7} │ │ add.w r0, r0, r0 │ │ - b.n a534a │ │ + b.n a5356 │ │ lsls r0, r3, #2 │ │ subs r0, r0, r0 │ │ str r1, [r0, r0] │ │ - b.n a53f2 │ │ + b.n a53fe │ │ movs r0, r0 │ │ - b.n a53f6 │ │ + b.n a5402 │ │ movs r0, r4 │ │ - b.n a47d4 │ │ + b.n a47e0 │ │ asrs r4, r4, #32 │ │ - b.n a47f8 │ │ + b.n a4804 │ │ movs r2, r1 │ │ - b.n a5002 │ │ - bge.n a4d94 │ │ + b.n a500e │ │ + bge.n a4da0 │ │ @ instruction: 0xebff0000 │ │ - b.n a536a │ │ + b.n a5376 │ │ lsls r0, r2, #2 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #1 │ │ - b.n a4806 │ │ + b.n a4812 │ │ asrs r2, r1, #32 │ │ - b.n a5016 │ │ + b.n a5022 │ │ movs r7, #216 @ 0xd8 │ │ - b.n a505a │ │ + b.n a5066 │ │ str r5, [r0, #0] │ │ - b.n a4e02 │ │ + b.n a4e0e │ │ strb r0, [r0, #0] │ │ - b.n a5228 │ │ + b.n a5234 │ │ str r0, [r7, #124] @ 0x7c │ │ - b.n a5066 │ │ + b.n a5072 │ │ str r0, [r2, #4] │ │ - b.n a5204 │ │ + b.n a5210 │ │ str r4, [r0, r2] │ │ - b.n a4822 │ │ + b.n a482e │ │ movs r6, r0 │ │ - b.n a5032 │ │ - bhi.n a4c58 │ │ + b.n a503e │ │ + bhi.n a4c64 │ │ @ instruction: 0xebff0acd │ │ orn r0, r6, #4194304 @ 0x400000 │ │ - b.n a5208 │ │ + b.n a5214 │ │ cmp r2, #207 @ 0xcf │ │ orn r0, r6, #2064 @ 0x810 │ │ - b.n a5446 │ │ + b.n a5452 │ │ lsrs r5, r1, #11 │ │ orr.w sl, r0, #423936 @ 0x67800 │ │ - b.w ff0e4d16 │ │ - b.n a4846 │ │ + b.w ff0e4d22 │ │ + b.n a4852 │ │ lsls r2, r1, #8 │ │ - b.n a5128 │ │ + b.n a5134 │ │ lsls r2, r0, #8 │ │ - b.n a53ba │ │ + b.n a53c6 │ │ vpmin.u8 q8, , │ │ lsls r2, r0, #2 │ │ and.w r0, r0, r8, lsl #5 │ │ - b.n a4860 │ │ + b.n a486c │ │ movs r0, #68 @ 0x44 │ │ - b.n a4864 │ │ + b.n a4870 │ │ @ instruction: 0xff85eaff │ │ movs r0, #64 @ 0x40 │ │ - b.n a486c │ │ + b.n a4878 │ │ asrs r0, r6, #1 │ │ - b.n a4b14 │ │ + b.n a4b20 │ │ movs r1, r0 │ │ - b.n a4fde │ │ + b.n a4fea │ │ @ instruction: 0xffcd0aff │ │ asrs r4, r3, #8 │ │ - b.n a4880 │ │ + b.n a488c │ │ movs r0, #0 │ │ - b.n a5506 │ │ + b.n a5512 │ │ movs r0, #32 │ │ - b.n a4864 │ │ + b.n a4870 │ │ asrs r1, r0, #32 │ │ - b.n a4e6c │ │ + b.n a4e78 │ │ asrs r2, r3, #1 │ │ - b.n a48f4 │ │ + b.n a4900 │ │ movs r3, r0 │ │ - b.n a53f8 │ │ + b.n a5404 │ │ vpmin.u32 , , │ │ asrs r4, r0, #8 │ │ - b.n a489c │ │ + b.n a48a8 │ │ movs r0, #94 @ 0x5e │ │ - b.n a54a2 │ │ + b.n a54ae │ │ movs r4, r0 │ │ - b.n a4880 │ │ + b.n a488c │ │ lsls r0, r0, #1 │ │ - b.n a48a4 │ │ + b.n a48b0 │ │ asrs r1, r0, #32 │ │ - b.n a4e8c │ │ + b.n a4e98 │ │ movs r0, r1 │ │ - b.n a488c │ │ + b.n a4898 │ │ movs r3, r0 │ │ - b.n a54b6 │ │ + b.n a54c2 │ │ asrs r0, r0, #32 │ │ - b.n a4894 │ │ + b.n a48a0 │ │ asrs r0, r5, #7 │ │ - b.n a48bc │ │ + b.n a48c8 │ │ adds r1, #232 @ 0xe8 │ │ - b.n a48c0 │ │ + b.n a48cc │ │ asrs r1, r0, #32 │ │ - b.n a4ea4 │ │ + b.n a4eb0 │ │ adds r0, #3 │ │ - b.n a4ea8 │ │ - bls.n a4dd8 │ │ + b.n a4eb4 │ │ + bls.n a4de4 │ │ @ instruction: 0xebffff57 │ │ @ instruction: 0xeaff7004 │ │ - b.n a50d6 │ │ + b.n a50e2 │ │ movs r6, r0 │ │ and.w r0, r0, r4, lsl #2 │ │ - b.n a48d2 │ │ + b.n a48de │ │ strb r4, [r0, #0] │ │ - b.n a50e2 │ │ + b.n a50ee │ │ asrs r4, r5, #32 │ │ - b.n a48e0 │ │ + b.n a48ec │ │ strb r0, [r6, #0] │ │ - b.n a48aa │ │ + b.n a48b6 │ │ asrs r4, r6, #32 │ │ - b.n a48ae │ │ + b.n a48ba │ │ lsls r6, r4, #25 │ │ add.w r1, r0, r1, lsl #24 │ │ - b.n a54c2 │ │ + b.n a54ce │ │ lsls r4, r1, #1 │ │ - b.n a48f4 │ │ + b.n a4900 │ │ lsrs r0, r2, #28 │ │ - b.n a509c │ │ + b.n a50a8 │ │ strh r0, [r4, #20] │ │ - b.n a5102 │ │ + b.n a510e │ │ movs r4, r6 │ │ - b.n a4900 │ │ + b.n a490c │ │ movs r0, r0 │ │ - b.n a546a │ │ + b.n a5476 │ │ movs r0, r4 │ │ subs r0, r0, r0 │ │ lsls r5, r3, #23 │ │ - b.n a5186 │ │ + b.n a5192 │ │ movs r0, r0 │ │ - b.n a5476 │ │ + b.n a5482 │ │ movs r2, r4 │ │ - ldr r2, [pc, #0] @ (a4dd8 ) │ │ + ldr r2, [pc, #0] @ (a4de4 ) │ │ movs r0, #64 @ 0x40 │ │ - b.n a4918 │ │ + b.n a4924 │ │ asrs r0, r6, #1 │ │ - b.n a4bc0 │ │ + b.n a4bcc │ │ movs r1, r0 │ │ - b.n a508a │ │ + b.n a5096 │ │ movs r6, r3 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #6 │ │ - b.n a492c │ │ + b.n a4938 │ │ movs r0, #0 │ │ - b.n a55b2 │ │ + b.n a55be │ │ str r0, [r1, #0] │ │ - b.n a5136 │ │ + b.n a5142 │ │ movs r0, #32 │ │ - b.n a4914 │ │ + b.n a4920 │ │ asrs r1, r0, #32 │ │ - b.n a4f1c │ │ + b.n a4f28 │ │ asrs r2, r3, #1 │ │ - b.n a49a4 │ │ + b.n a49b0 │ │ movs r3, r0 │ │ - b.n a54a8 │ │ + b.n a54b4 │ │ movs r5, r5 │ │ subs r2, #0 │ │ asrs r0, r5, #5 │ │ - b.n a494c │ │ + b.n a4958 │ │ adds r1, #104 @ 0x68 │ │ - b.n a4950 │ │ + b.n a495c │ │ movs r1, #104 @ 0x68 │ │ - b.n a4954 │ │ + b.n a4960 │ │ asrs r1, r0, #32 │ │ - b.n a4f38 │ │ + b.n a4f44 │ │ movs r4, r0 │ │ - b.n a4938 │ │ + b.n a4944 │ │ adds r0, #3 │ │ - b.n a4f40 │ │ + b.n a4f4c │ │ movs r0, #2 │ │ - b.n a4f44 │ │ + b.n a4f50 │ │ lsls r0, r0, #1 │ │ - b.n a4964 │ │ + b.n a4970 │ │ movs r0, #0 │ │ - b.n a4948 │ │ + b.n a4954 │ │ movs r0, #177 @ 0xb1 │ │ - b.n a5572 │ │ + b.n a557e │ │ movs r0, r1 │ │ - b.n a4950 │ │ + b.n a495c │ │ movs r3, r0 │ │ - b.n a557a │ │ - bhi.n a4e30 │ │ + b.n a5586 │ │ + bhi.n a4e3c │ │ @ instruction: 0xebff004c │ │ - b.n a497c │ │ + b.n a4988 │ │ movs r0, r0 │ │ - b.n a54e6 │ │ + b.n a54f2 │ │ movs r0, r0 │ │ - b.n a560a │ │ + b.n a5616 │ │ movs r0, r6 │ │ subs r0, r0, r0 │ │ movs r6, r3 │ │ and.w r0, r0, r8, asr #32 │ │ - b.n a4990 │ │ + b.n a499c │ │ movs r0, r0 │ │ - b.n a54fa │ │ + b.n a5506 │ │ movs r3, r2 │ │ lsrs r0, r0, #8 │ │ lsrs r1, r0, #32 │ │ - b.n a528e │ │ + b.n a529a │ │ movs r1, r2 │ │ subs r0, r0, r0 │ │ str r0, [r2, r1] │ │ - b.n a5384 │ │ + b.n a5390 │ │ asrs r4, r7, #32 │ │ - b.n a49a8 │ │ + b.n a49b4 │ │ movs r0, #224 @ 0xe0 │ │ - b.n a55b2 │ │ + b.n a55be │ │ movs r5, r0 │ │ - b.n a51b6 │ │ - stmia r1!, {r0, r1, r4} │ │ - @ instruction: 0xfb000084 │ │ - b.n a49b2 │ │ - asrs r6, r0, #32 │ │ - b.n a51c2 │ │ + b.n a51c2 │ │ + iteet vs │ │ + @ instruction: 0xfa000084 │ │ + bvc.n a49be @ unpredictable branch in IT block │ │ + │ │ + asrvc r6, r0, #32 │ │ + bvs.n a51ce │ │ movs r0, #5 │ │ - b.n a51c6 │ │ + b.n a51d2 │ │ adds r0, #128 @ 0x80 │ │ - b.n a538a │ │ + b.n a5396 │ │ movs r2, r1 │ │ - b.n a51ce │ │ + b.n a51da │ │ lsrs r5, r7, #9 │ │ add.w r0, r0, r0 │ │ - b.n a5536 │ │ + b.n a5542 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ str r0, [r1, #0] │ │ - b.n a51de │ │ + b.n a51ea │ │ movs r0, r4 │ │ - b.n a49bc │ │ + b.n a49c8 │ │ movs r6, r0 │ │ and.w r0, r0, r0 │ │ - b.n a55ea │ │ + b.n a55f6 │ │ movs r0, r4 │ │ - b.n a49c8 │ │ + b.n a49d4 │ │ lsls r0, r1, #1 │ │ - b.n a49e6 │ │ + b.n a49f2 │ │ str r0, [r1, #0] │ │ - b.n a51f6 │ │ + b.n a5202 │ │ movs r4, r2 │ │ - b.n a49da │ │ + b.n a49e6 │ │ movs r7, r0 │ │ - b.n a515e │ │ + b.n a516a │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ movs r0, r4 │ │ - b.n a4a00 │ │ + b.n a4a0c │ │ movs r1, r0 │ │ - b.n a54f6 │ │ + b.n a5502 │ │ movs r0, r2 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, r0] │ │ - b.n a5212 │ │ + b.n a521e │ │ movs r2, r1 │ │ - b.n a5216 │ │ - bge.n a4f44 │ │ + b.n a5222 │ │ + bge.n a4f50 │ │ @ instruction: 0xebff0005 │ │ - b.n a521e │ │ + b.n a522a │ │ movs r3, r1 │ │ and.w r0, r0, r4, ror #4 │ │ - b.n a4a20 │ │ + b.n a4a2c │ │ movs r0, #7 │ │ - b.n a522a │ │ + b.n a5236 │ │ adds r0, #44 @ 0x2c │ │ - b.n a4a28 │ │ + b.n a4a34 │ │ movs r4, r7 │ │ - b.n a4a2c │ │ + b.n a4a38 │ │ lsls r0, r6, #3 │ │ - b.n a5290 │ │ + b.n a529c │ │ movs r2, r1 │ │ - b.n a523a │ │ - ldr r4, [sp, #848] @ 0x350 │ │ + b.n a5246 │ │ + ldr r4, [sp, #852] @ 0x354 │ │ add.w r0, r0, r0, lsl #4 │ │ - b.n a5242 │ │ + b.n a524e │ │ lsls r4, r1, #1 │ │ - b.n a4a40 │ │ + b.n a4a4c │ │ movs r0, r0 │ │ - b.n a55aa │ │ + b.n a55b6 │ │ movs r1, r0 │ │ - b.n a524e │ │ + b.n a525a │ │ @ instruction: 0xffee0aff │ │ - beq.n a4f4c │ │ - b.n a53ac │ │ + beq.n a4f58 │ │ + b.n a53b8 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r2, r4, r5, r7, r8, r9, sl} │ │ - b.n a552e │ │ + b.n a553a │ │ movs r1, r0 │ │ - b.n a5614 │ │ + b.n a5620 │ │ lsrs r7, r7, #31 │ │ - b.n a55c4 │ │ + b.n a55d0 │ │ movs r1, r0 │ │ stmia r3!, {} │ │ @ instruction: 0xfff8eaff │ │ lsls r5, r6, #30 │ │ - b.n a5542 │ │ + b.n a554e │ │ asrs r0, r2, #32 │ │ - b.n a4a70 │ │ + b.n a4a7c │ │ lsrs r7, r7, #31 │ │ - b.n a55d8 │ │ + b.n a55e4 │ │ movs r1, r0 │ │ - b.n a5630 │ │ + b.n a563c │ │ movs r1, r0 │ │ stmia r3!, {} │ │ lsls r2, r0, #8 │ │ - b.n a55e8 │ │ + b.n a55f4 │ │ @ instruction: 0xffe00aff │ │ @ instruction: 0xfff0eaff │ │ movs r0, r0 │ │ - b.n a55fc │ │ + b.n a5608 │ │ str r0, [r0, r0] │ │ lsls r0, r4, #6 │ │ @ instruction: 0xffdfeaff │ │ movs r5, r1 │ │ - b.n a569e │ │ + b.n a56aa │ │ @ instruction: 0xffebeaff │ │ - ldr r3, [sp, #0] │ │ + ldr r3, [sp, #80] @ 0x50 │ │ movs r3, r0 │ │ - str r4, [sp, #872] @ 0x368 │ │ - @ instruction: 0xfff6aab3 │ │ - @ instruction: 0xfff68fdd │ │ - vdup.16 , d0[1] │ │ - movs r3, r0 │ │ - ldr r2, [sp, #320] @ 0x140 │ │ - movs r3, r0 │ │ - add r2, sp, #124 @ 0x7c │ │ - vqrdmlsh.s q12, q3, d5[0] │ │ - vrintn.f16 d25, d18 │ │ + str r5, [sp, #396] @ 0x18c │ │ + @ instruction: 0xfff6ab3d │ │ + vtrn.16 , │ │ + vcvt.f16.u16 , q2, #10 │ │ + movs r3, r0 │ │ + ldr r2, [sp, #400] @ 0x190 │ │ + movs r3, r0 │ │ + add r2, sp, #676 @ 0x2a4 │ │ + vaddl.u , d6, d29 │ │ + vrintx.f16 d25, d27 │ │ @ instruction: 0xfff64ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n a54a8 │ │ + b.n a54b4 │ │ svc 149 @ 0x95 │ │ - b.n a542c │ │ + b.n a5438 │ │ str r0, [r0, r0] │ │ - b.n a52d6 │ │ + b.n a52e2 │ │ str r1, [r0, #0] │ │ - b.n a52da │ │ + b.n a52e6 │ │ movs r1, r0 │ │ - b.n a52de │ │ + b.n a52ea │ │ asrs r0, r4, #3 │ │ - b.n a56e2 │ │ + b.n a56ee │ │ strh r3, [r0, #0] │ │ - b.n a52e6 │ │ + b.n a52f2 │ │ movs r0, #40 @ 0x28 │ │ - b.n a4ac4 │ │ - itttt ne │ │ - @ instruction: 0xfa007020 │ │ - bne.n a54bc @ unpredictable branch in IT block │ │ - │ │ - movne r4, r2 │ │ - bne.n a4ae0 │ │ + b.n a4ad0 │ │ + stmia r0!, {r0, r1, r2, r3, r7} │ │ + @ instruction: 0xfb007020 │ │ + b.n a54c8 │ │ + movs r4, r2 │ │ + b.n a4aec │ │ asrs r7, r0, #32 │ │ - b.n a52fa │ │ - strb r1, [r6, #9] │ │ + b.n a5306 │ │ + strb r2, [r6, #9] │ │ add.w r0, r0, r0 │ │ - b.n a5662 │ │ + b.n a566e │ │ lsls r6, r7, #4 │ │ subs r0, r0, r0 │ │ strh r0, [r0, #2] │ │ - b.n a4ae4 │ │ + b.n a4af0 │ │ asrs r0, r0, #32 │ │ - b.n a570e │ │ + b.n a571a │ │ strh r1, [r0, #0] │ │ - b.n a5712 │ │ - ldr r7, [pc, #292] @ (a50f8 ) │ │ - b.n a546c │ │ + b.n a571e │ │ + ldr r7, [pc, #292] @ (a5104 ) │ │ + b.n a5478 │ │ movs r0, r1 │ │ - b.n a54e6 │ │ + b.n a54f2 │ │ strh r0, [r5, #4] │ │ - b.n a4aea │ │ + b.n a4af6 │ │ asrs r4, r5, #2 │ │ - b.n a4aee │ │ + b.n a4afa │ │ cmp r2, #171 @ 0xab │ │ - b.n a55fa │ │ + b.n a5606 │ │ asrs r4, r4, #32 │ │ - b.n a4a00 │ │ + b.n a4a0c │ │ asrs r4, r3, #32 │ │ - b.n a54f6 │ │ + b.n a5502 │ │ asrs r0, r3, #32 │ │ - b.n a4b0c │ │ + b.n a4b18 │ │ asrs r4, r7, #2 │ │ - b.n a54fe │ │ + b.n a550a │ │ movs r4, r3 │ │ - b.n a4b14 │ │ + b.n a4b20 │ │ lsls r0, r4, #2 │ │ - b.n a54fe │ │ + b.n a550a │ │ asrs r4, r2, #32 │ │ - b.n a4b1c │ │ + b.n a4b28 │ │ asrs r4, r2, #3 │ │ - b.n a550e │ │ + b.n a551a │ │ movs r0, r4 │ │ - b.n a4b24 │ │ + b.n a4b30 │ │ movs r6, r0 │ │ - b.n a574e │ │ + b.n a575a │ │ asrs r4, r4, #32 │ │ - b.n a4b2c │ │ + b.n a4b38 │ │ asrs r4, r2, #32 │ │ - b.n a551e │ │ + b.n a552a │ │ movs r4, r7 │ │ - b.n a4b34 │ │ + b.n a4b40 │ │ lsls r4, r6, #30 │ │ - b.n a562e │ │ + b.n a563a │ │ strb r0, [r7, #0] │ │ - b.n a4b3c │ │ + b.n a4b48 │ │ lsrs r7, r7, #31 │ │ - b.n a56c4 │ │ + b.n a56d0 │ │ str r4, [r5, #0] │ │ - b.n a4b44 │ │ + b.n a4b50 │ │ cmp r2, #170 @ 0xaa │ │ - b.n a56c2 │ │ + b.n a56ce │ │ asrs r0, r6, #32 │ │ - b.n a4b4c │ │ + b.n a4b58 │ │ str r0, [sp, #0] │ │ - b.n a5776 │ │ + b.n a5782 │ │ asrs r4, r6, #19 │ │ - b.n a4b78 │ │ + b.n a4b84 │ │ movs r4, r6 │ │ - b.n a4b58 │ │ + b.n a4b64 │ │ asrs r1, r0, #32 │ │ - b.n a5160 │ │ + b.n a516c │ │ asrs r0, r2, #1 │ │ - b.n a5548 │ │ + b.n a5554 │ │ asrs r0, r1, #1 │ │ - b.n a4b64 │ │ + b.n a4b70 │ │ asrs r1, r3, #10 │ │ - b.n a514e │ │ + b.n a515a │ │ asrs r4, r4, #32 │ │ - b.n a4a88 │ │ + b.n a4a94 │ │ movs r0, r0 │ │ - b.n a56f8 │ │ + b.n a5704 │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ movs r3, r0 │ │ - b.n a5710 │ │ + b.n a571c │ │ asrs r0, r1, #1 │ │ - b.n a4b9c │ │ + b.n a4ba8 │ │ asrs r0, r1, #32 │ │ strh r5, [r0, #20] │ │ asrs r0, r0, #32 │ │ - b.n a4b8c │ │ + b.n a4b98 │ │ lsls r0, r4, #2 │ │ - b.n a53ae │ │ + b.n a53ba │ │ cmp r4, #1 │ │ - b.n a57b2 │ │ + b.n a57be │ │ lsls r0, r0, #2 │ │ - b.n a5176 │ │ + b.n a5182 │ │ strb r4, [r0, #0] │ │ - b.n a53ba │ │ + b.n a53c6 │ │ movs r0, r0 │ │ - b.n a5110 │ │ + b.n a511c │ │ lsls r4, r0, #1 │ │ - b.n a4b9c │ │ + b.n a4ba8 │ │ lsls r1, r2, #2 │ │ - b.n a5096 │ │ + b.n a50a2 │ │ movs r4, r2 │ │ - b.n a4bb4 │ │ + b.n a4bc0 │ │ asrs r0, r0, #32 │ │ - b.n a57ce │ │ + b.n a57da │ │ strh r0, [r0, #0] │ │ - b.n a4bac │ │ + b.n a4bb8 │ │ asrs r4, r0, #32 │ │ - b.n a4bb0 │ │ + b.n a4bbc │ │ asrs r4, r0, #32 │ │ - b.n a53da │ │ - ldr r3, [sp, #496] @ 0x1f0 │ │ + b.n a53e6 │ │ + ldr r3, [sp, #500] @ 0x1f4 │ │ add.w r0, r0, r0 │ │ - b.n a5754 │ │ + b.n a5760 │ │ ands r0, r0 │ │ - b.n a53e6 │ │ + b.n a53f2 │ │ movs r5, r7 │ │ lsls r4, r2, #13 │ │ lsls r5, r4, #2 │ │ lsrs r0, r0, #8 │ │ - add r0, pc, #164 @ (adr r0, a5154 ) │ │ - b.n a5872 │ │ + add r0, pc, #164 @ (adr r0, a5160 ) │ │ + b.n a587e │ │ movs r0, r0 │ │ - b.n a575e │ │ + b.n a576a │ │ lsls r2, r7, #2 │ │ subs r0, r0, r0 │ │ movs r4, r2 │ │ - b.n a4be8 │ │ + b.n a4bf4 │ │ str r4, [r1, #4] │ │ - b.n a55dc │ │ + b.n a55e8 │ │ asrs r0, r0, #32 │ │ - b.n a5806 │ │ + b.n a5812 │ │ strh r0, [r0, #0] │ │ - b.n a4be4 │ │ + b.n a4bf0 │ │ asrs r4, r0, #32 │ │ - b.n a4be8 │ │ + b.n a4bf4 │ │ asrs r6, r0, #32 │ │ - b.n a5412 │ │ + b.n a541e │ │ cmp r4, #1 │ │ - b.n a5816 │ │ - ldr r3, [sp, #436] @ 0x1b4 │ │ + b.n a5822 │ │ + ldr r3, [sp, #440] @ 0x1b8 │ │ add.w r0, r0, r0 │ │ - b.n a577e │ │ + b.n a578a │ │ lsls r1, r0, #3 │ │ subs r0, r0, r0 │ │ movs r7, r0 │ │ - b.n a5426 │ │ + b.n a5432 │ │ asrs r6, r0, #32 │ │ - b.n a542a │ │ + b.n a5436 │ │ cmp r4, #1 │ │ - b.n a582e │ │ + b.n a583a │ │ ands r7, r0 │ │ - b.n a5432 │ │ - ldmia r5!, {r1, r3, r4, r6, r7} │ │ + b.n a543e │ │ + ldmia r5!, {r0, r1, r3, r4, r6, r7} │ │ add.w r0, r0, r0 │ │ - b.n a579a │ │ + b.n a57a6 │ │ movs r2, r3 │ │ lsrs r0, r0, #8 │ │ - add r0, pc, #4 @ (adr r0, a5104 ) │ │ - b.n a5636 │ │ + add r0, pc, #4 @ (adr r0, a5110 ) │ │ + b.n a5642 │ │ movs r4, r1 │ │ cmp r2, #0 │ │ movs r4, r2 │ │ - b.n a4c34 │ │ + b.n a4c40 │ │ asrs r0, r0, #32 │ │ - b.n a584e │ │ + b.n a585a │ │ strh r0, [r0, #0] │ │ - b.n a4c2c │ │ + b.n a4c38 │ │ cmp r4, #1 │ │ - b.n a5856 │ │ + b.n a5862 │ │ asrs r4, r0, #32 │ │ - b.n a4c34 │ │ + b.n a4c40 │ │ asrs r4, r0, #32 │ │ - b.n a545e │ │ - ldr r3, [sp, #364] @ 0x16c │ │ + b.n a546a │ │ + ldr r3, [sp, #368] @ 0x170 │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n a5466 │ │ + b.n a5472 │ │ movs r0, r0 │ │ - b.n a57dc │ │ + b.n a57e8 │ │ @ instruction: 0xffe01aff │ │ movs r5, r7 │ │ - b.n a57da │ │ + b.n a57e6 │ │ @ instruction: 0xffde1aff │ │ lsls r2, r0, #2 │ │ and.w r4, r0, r8, lsr #32 │ │ - b.n a4c7c │ │ + b.n a4c88 │ │ movs r0, r0 │ │ - b.n a5260 │ │ + b.n a526c │ │ lsls r2, r3, #1 │ │ - b.n a4ce6 │ │ + b.n a4cf2 │ │ movs r0, r0 │ │ - b.n a57ea │ │ + b.n a57f6 │ │ movs r2, r2 │ │ subs r0, r0, r0 │ │ cmp r2, #171 @ 0xab │ │ - b.n a5766 │ │ + b.n a5772 │ │ cmp r2, #170 @ 0xaa │ │ - b.n a57ea │ │ + b.n a57f6 │ │ movs r4, r7 │ │ - b.n a4c94 │ │ + b.n a4ca0 │ │ str r0, [sp, #4] │ │ - b.n a5670 │ │ + b.n a567c │ │ movs r0, r0 │ │ - b.n a5414 │ │ + b.n a5420 │ │ @ instruction: 0xffb83aff │ │ lsls r6, r6, #2 │ │ and.w r0, r0, r4, lsl #25 │ │ - b.n a4ca8 │ │ + b.n a4cb4 │ │ movs r4, r4 │ │ - b.n a5608 │ │ + b.n a5614 │ │ asrs r0, r6, #32 │ │ - b.n a4cb0 │ │ + b.n a4cbc │ │ movs r0, #4 │ │ - b.n a54ba │ │ + b.n a54c6 │ │ movs r0, r0 │ │ - b.n a4c98 │ │ + b.n a4ca4 │ │ movs r5, r0 │ │ - b.n a54c2 │ │ + b.n a54ce │ │ adds r0, #6 │ │ - b.n a54c6 │ │ + b.n a54d2 │ │ @ instruction: 0xf2e2ebff │ │ movs r0, r0 │ │ - b.n a582e │ │ + b.n a583a │ │ movs r3, r1 │ │ lsrs r0, r0, #8 │ │ movs r4, r6 │ │ - b.n a4cb0 │ │ + b.n a4cbc │ │ @ instruction: 0xffeceaff │ │ lsls r4, r0, #1 │ │ - b.n a4cd8 │ │ + b.n a4ce4 │ │ movs r0, #75 @ 0x4b │ │ - b.n a58e2 │ │ + b.n a58ee │ │ movs r0, r0 │ │ - b.n a4cc0 │ │ + b.n a4ccc │ │ movs r1, r0 │ │ - b.n a58ea │ │ + b.n a58f6 │ │ asrs r4, r5, #14 │ │ - b.n a4cec │ │ + b.n a4cf8 │ │ adds r3, #172 @ 0xac │ │ - b.n a4cf0 │ │ + b.n a4cfc │ │ asrs r1, r0, #32 │ │ - b.n a52d4 │ │ + b.n a52e0 │ │ adds r0, #3 │ │ - b.n a52d8 │ │ - bhi.n a51f0 │ │ + b.n a52e4 │ │ + bhi.n a51fc │ │ @ instruction: 0xebffffe2 │ │ @ instruction: 0xeaff05dd │ │ - b.n a5570 │ │ + b.n a557c │ │ movs r0, r0 │ │ - b.n a586a │ │ + b.n a5876 │ │ movs r4, r0 │ │ - ldr r2, [pc, #0] @ (a51cc ) │ │ + ldr r2, [pc, #0] @ (a51d8 ) │ │ movs r0, r0 │ │ - b.n a547e │ │ + b.n a548a │ │ lsls r4, r0, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n a591a │ │ + b.n a5926 │ │ movs r4, r6 │ │ - b.n a4cf8 │ │ + b.n a4d04 │ │ lsls r2, r2, #1 │ │ and.w r3, r0, ip, ror #17 │ │ - b.n a4d24 │ │ + b.n a4d30 │ │ movs r0, #16 │ │ - b.n a592a │ │ + b.n a5936 │ │ movs r4, r4 │ │ - b.n a4d28 │ │ + b.n a4d34 │ │ ands r4, r0 │ │ - b.n a5310 │ │ + b.n a531c │ │ asrs r0, r0, #1 │ │ - b.n a56fe │ │ - ldmia r5!, {r0, r3, r4, r7} │ │ + b.n a570a │ │ + ldmia r5!, {r1, r3, r4, r7} │ │ add.w r0, r0, r0 │ │ - b.n a589e │ │ + b.n a58aa │ │ movs r0, r3 │ │ subs r0, r0, r0 │ │ adds r0, #64 @ 0x40 │ │ - b.n a570e │ │ + b.n a571a │ │ movs r7, r1 │ │ ldmia.w r3, {r0, ip} │ │ - b.n a5514 │ │ + b.n a5520 │ │ movs r0, r0 │ │ - b.n a5516 │ │ + b.n a5522 │ │ movs r1, r0 │ │ - b.n a5536 │ │ + b.n a5542 │ │ movs r2, r2 │ │ lsrs r0, r0, #8 │ │ movs r4, r3 │ │ - b.n a4d58 │ │ + b.n a4d64 │ │ asrs r0, r3, #32 │ │ - b.n a4d5c │ │ + b.n a4d68 │ │ asrs r1, r0, #32 │ │ ldmia.w r0, {r4, r6, r7, sp} │ │ - b.n a55ac │ │ + b.n a55b8 │ │ ands r4, r1 │ │ - b.n a5274 │ │ + b.n a5280 │ │ asrs r0, r0, #32 │ │ - b.n a5276 │ │ + b.n a5282 │ │ asrs r4, r0, #32 │ │ - b.n a5558 │ │ + b.n a5564 │ │ movs r0, r5 │ │ subs r0, r0, r0 │ │ movs r0, r4 │ │ - b.n a4d78 │ │ + b.n a4d84 │ │ lsls r0, r2, #3 │ │ - b.n a55c2 │ │ + b.n a55ce │ │ movs r1, r0 │ │ - b.n a5726 │ │ + b.n a5732 │ │ movs r0, r0 │ │ - b.n a582c │ │ + b.n a5838 │ │ movs r2, r7 │ │ subs r2, #0 │ │ movs r4, r2 │ │ - b.n a4d8c │ │ + b.n a4d98 │ │ lsls r0, r2, #3 │ │ - b.n a55d6 │ │ + b.n a55e2 │ │ movs r1, r0 │ │ - b.n a573a │ │ + b.n a5746 │ │ movs r0, r0 │ │ - b.n a5840 │ │ + b.n a584c │ │ movs r1, r4 │ │ subs r2, #0 │ │ @ instruction: 0xffdbeaff │ │ movs r4, r2 │ │ - b.n a4da4 │ │ + b.n a4db0 │ │ movs r0, #32 │ │ - b.n a4da8 │ │ + b.n a4db4 │ │ lsls r0, r2, #3 │ │ - b.n a55f2 │ │ + b.n a55fe │ │ movs r0, #208 @ 0xd0 │ │ - b.n a55fa │ │ + b.n a5606 │ │ ands r2, r0 │ │ - b.n a571a │ │ + b.n a5726 │ │ ands r0, r0 │ │ - b.n a5820 │ │ + b.n a582c │ │ movs r2, r0 │ │ subs r2, #0 │ │ ands r2, r0 │ │ - b.n a572a │ │ + b.n a5736 │ │ ands r0, r0 │ │ - b.n a5830 │ │ + b.n a583c │ │ movs r6, r2 │ │ subs r2, #0 │ │ movs r0, #1 │ │ - b.n a5776 │ │ + b.n a5782 │ │ ands r0, r0 │ │ - b.n a59d6 │ │ + b.n a59e2 │ │ movs r0, #0 │ │ - b.n a5880 │ │ + b.n a588c │ │ ands r4, r6 │ │ - b.n a4db8 │ │ + b.n a4dc4 │ │ movs r0, #0 │ │ - b.n a59e2 │ │ + b.n a59ee │ │ movs r0, #1 │ │ adds r3, #0 │ │ movs r1, r0 │ │ - b.n a578a │ │ + b.n a5796 │ │ movs r0, r0 │ │ - b.n a5890 │ │ + b.n a589c │ │ movs r0, r0 │ │ - b.n a59f2 │ │ + b.n a59fe │ │ movs r1, r0 │ │ adds r3, #0 │ │ movs r2, r0 │ │ - b.n a555a │ │ + b.n a5566 │ │ movs r3, r3 │ │ subs r0, r0, r0 │ │ movs r4, r3 │ │ - b.n a4dfc │ │ + b.n a4e08 │ │ movs r0, #24 │ │ - b.n a4e00 │ │ + b.n a4e0c │ │ lsls r0, r2, #3 │ │ - b.n a564a │ │ + b.n a5656 │ │ movs r0, #208 @ 0xd0 │ │ - b.n a5652 │ │ + b.n a565e │ │ movs r2, r0 │ │ - b.n a5372 │ │ + b.n a537e │ │ movs r3, r0 │ │ - b.n a5478 │ │ + b.n a5484 │ │ movs r3, r0 │ │ subs r2, #0 │ │ movs r3, r2 │ │ and.w r0, r0, r2 │ │ - b.n a5382 │ │ + b.n a538e │ │ movs r3, r0 │ │ - b.n a549e │ │ + b.n a54aa │ │ @ instruction: 0xffba2aff │ │ ands r4, r5 │ │ - b.n a4e28 │ │ + b.n a4e34 │ │ movs r0, #224 @ 0xe0 │ │ - b.n a5a32 │ │ + b.n a5a3e │ │ asrs r0, r6, #32 │ │ - b.n a4e30 │ │ + b.n a4e3c │ │ movs r4, r0 │ │ - b.n a563a │ │ - itee │ │ - mla r0, r0, r0, r0 │ │ - bal.n a5a42 @ unpredictable branch in IT block │ │ - │ │ - moval r4, r6 │ │ - b.n a4e20 │ │ + b.n a5646 │ │ + bkpt 0x004c │ │ + @ instruction: 0xfa000000 │ │ + b.n a5a4e │ │ + movs r4, r6 │ │ + b.n a4e2c │ │ movs r0, r5 │ │ - b.n a4e44 │ │ + b.n a4e50 │ │ movs r0, r0 │ │ - b.n a59ae │ │ + b.n a59ba │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ lsls r0, r5, #2 │ │ - b.n a4e3e │ │ + b.n a4e4a │ │ asrs r4, r5, #2 │ │ - b.n a4e42 │ │ + b.n a4e4e │ │ movs r2, r0 │ │ - b.n a57be │ │ + b.n a57ca │ │ movs r0, r0 │ │ - b.n a58c4 │ │ + b.n a58d0 │ │ movs r4, r7 │ │ - b.n a4e60 │ │ + b.n a4e6c │ │ movs r1, r0 │ │ adds r2, #128 @ 0x80 │ │ movs r4, r7 │ │ - b.n a4e48 │ │ + b.n a4e54 │ │ cmp r2, #171 @ 0xab │ │ - b.n a5946 │ │ + b.n a5952 │ │ ands r7, r0 │ │ - b.n a5676 │ │ + b.n a5682 │ │ @ instruction: 0xff85eaff │ │ ands r7, r0 │ │ - b.n a567e │ │ + b.n a568a │ │ movs r0, r0 │ │ - b.n a5a82 │ │ + b.n a5a8e │ │ @ instruction: 0xff92eaff │ │ lsls r0, r0, #1 │ │ - b.n a4e84 │ │ + b.n a4e90 │ │ ands r5, r7 │ │ - b.n a5a8e │ │ + b.n a5a9a │ │ movs r0, r0 │ │ - b.n a59f2 │ │ + b.n a59fe │ │ movs r3, r2 │ │ lsrs r0, r0, #8 │ │ movs r0, r7 │ │ - b.n a4e94 │ │ + b.n a4ea0 │ │ lsls r0, r2, #3 │ │ - b.n a56de │ │ + b.n a56ea │ │ movs r1, r0 │ │ - b.n a5682 │ │ + b.n a568e │ │ movs r7, r1 │ │ subs r0, r0, r0 │ │ lsls r4, r2, #7 │ │ - b.n a4ea8 │ │ + b.n a4eb4 │ │ movs r0, r0 │ │ - b.n a548c │ │ + b.n a5498 │ │ lsls r2, r3, #1 │ │ - b.n a4f12 │ │ + b.n a4f1e │ │ movs r3, r0 │ │ - b.n a5a16 │ │ + b.n a5a22 │ │ movs r1, r4 │ │ subs r2, #0 │ │ movs r5, r7 │ │ - b.n a5abe │ │ + b.n a5aca │ │ asrs r5, r3, #3 │ │ add.w r1, r0, ip, ror #6 │ │ - b.n a4ec4 │ │ + b.n a4ed0 │ │ str r0, [r0, r0] │ │ - b.n a56ca │ │ + b.n a56d6 │ │ adds r1, #184 @ 0xb8 │ │ - b.n a4ecc │ │ + b.n a4ed8 │ │ movs r3, r0 │ │ - b.n a5ad2 │ │ + b.n a5ade │ │ asrs r1, r0, #32 │ │ - b.n a54b4 │ │ + b.n a54c0 │ │ movs r0, #33 @ 0x21 │ │ - b.n a5ada │ │ + b.n a5ae6 │ │ adds r0, #3 │ │ - b.n a54bc │ │ + b.n a54c8 │ │ lsrs r0, r6 │ │ - b.n a573c │ │ + b.n a5748 │ │ movs r5, r4 │ │ and.w r1, r0, r8, lsl #2 │ │ - b.n a4ee8 │ │ + b.n a4ef4 │ │ movs r0, r0 │ │ - b.n a54cc │ │ + b.n a54d8 │ │ lsls r2, r3, #1 │ │ - b.n a4f52 │ │ + b.n a4f5e │ │ movs r0, r0 │ │ - b.n a5a56 │ │ + b.n a5a62 │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n a56fe │ │ + b.n a570a │ │ asrs r5, r1, #3 │ │ add.w r1, r0, r0, ror #5 │ │ - b.n a4f04 │ │ + b.n a4f10 │ │ cmp r4, #1 │ │ - b.n a5b0a │ │ + b.n a5b16 │ │ adds r1, #108 @ 0x6c │ │ - b.n a4f0c │ │ + b.n a4f18 │ │ asrs r1, r0, #32 │ │ - b.n a54f0 │ │ + b.n a54fc │ │ movs r4, r2 │ │ @ instruction: 0xe98d3003 │ │ - b.n a54f8 │ │ + b.n a5504 │ │ movs r4, r1 │ │ - b.n a4ef8 │ │ + b.n a4f04 │ │ movs r1, r0 │ │ - b.n a5b22 │ │ + b.n a5b2e │ │ movs r0, #47 @ 0x2f │ │ - b.n a5b26 │ │ + b.n a5b32 │ │ movs r3, r2 │ │ and.w r0, r0, r0, lsl #16 │ │ - b.n a572e │ │ + b.n a573a │ │ lsls r0, r3, #5 │ │ - b.n a4f30 │ │ + b.n a4f3c │ │ movs r0, r0 │ │ - b.n a5514 │ │ + b.n a5520 │ │ lsls r2, r3, #1 │ │ - b.n a4f9a │ │ + b.n a4fa6 │ │ movs r0, r0 │ │ - b.n a5a9e │ │ + b.n a5aaa │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n a5746 │ │ - beq.n a5440 │ │ - b.n a58a0 │ │ + b.n a5752 │ │ + beq.n a544c │ │ + b.n a58ac │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2} │ │ - b.n a5752 │ │ + b.n a575e │ │ asrs r0, r7, #2 │ │ add.w r1, r0, r4, ror #4 │ │ - b.n a4f58 │ │ + b.n a4f64 │ │ cmp r4, #1 │ │ - b.n a5b5e │ │ + b.n a5b6a │ │ adds r1, #48 @ 0x30 │ │ - b.n a4f60 │ │ + b.n a4f6c │ │ asrs r1, r0, #32 │ │ - b.n a5544 │ │ + b.n a5550 │ │ movs r4, r2 │ │ @ instruction: 0xe98d3003 │ │ - b.n a554c │ │ + b.n a5558 │ │ movs r4, r1 │ │ - b.n a4f4c │ │ + b.n a4f58 │ │ movs r1, r0 │ │ - b.n a5b76 │ │ + b.n a5b82 │ │ movs r0, #64 @ 0x40 │ │ - b.n a5b7a │ │ + b.n a5b86 │ │ strh r0, [r0, #0] │ │ - b.n a4f58 │ │ - bvc.n a5532 │ │ + b.n a4f64 │ │ + bvc.n a553e │ │ @ instruction: 0xebffffee │ │ @ instruction: 0xeaff202c │ │ - b.n a4f84 │ │ + b.n a4f90 │ │ movs r4, r5 │ │ - b.n a4f72 │ │ + b.n a4f7e │ │ str r4, [r2, #16] │ │ - b.n a4f90 │ │ + b.n a4f9c │ │ movs r0, r0 │ │ - b.n a5af6 │ │ + b.n a5b02 │ │ str r6, [r0, #0] │ │ - b.n a5578 │ │ + b.n a5584 │ │ movs r0, r4 │ │ lsrs r0, r0, #8 │ │ lsls r5, r3, #23 │ │ - b.n a580c │ │ + b.n a5818 │ │ ands r0, r0 │ │ - b.n a5ba6 │ │ + b.n a5bb2 │ │ movs r1, r0 │ │ - b.n a5b4a │ │ + b.n a5b56 │ │ @ instruction: 0xffe4caff │ │ lsls r0, r5, #2 │ │ - b.n a4f96 │ │ + b.n a4fa2 │ │ asrs r4, r5, #2 │ │ - b.n a4f9a │ │ + b.n a4fa6 │ │ movs r1, r0 │ │ - b.n a595a │ │ + b.n a5966 │ │ movs r0, r0 │ │ - b.n a5a60 │ │ + b.n a5a6c │ │ @ instruction: 0xffdf3aff │ │ movs r0, r5 │ │ - b.n a4fc0 │ │ + b.n a4fcc │ │ movs r0, r0 │ │ - b.n a5b2a │ │ + b.n a5b36 │ │ movs r6, r1 │ │ lsrs r0, r0, #8 │ │ lsls r0, r0, #3 │ │ - b.n a5996 │ │ + b.n a59a2 │ │ asrs r0, r0, #1 │ │ - b.n a59a2 │ │ + b.n a59ae │ │ movs r0, #16 │ │ - b.n a5bda │ │ - ldmia r4, {r4, r5, r6, r7} │ │ + b.n a5be6 │ │ + ldmia r4, {r0, r4, r5, r6, r7} │ │ add.w r0, r0, r0 │ │ - b.n a5b42 │ │ + b.n a5b4e │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ adds r0, #64 @ 0x40 │ │ - b.n a59b6 │ │ + b.n a59c2 │ │ movs r7, r1 │ │ ldmia.w r3, {r0, ip} │ │ - b.n a57b8 │ │ + b.n a57c4 │ │ movs r0, r0 │ │ - b.n a57ba │ │ + b.n a57c6 │ │ movs r1, r0 │ │ - b.n a57da │ │ + b.n a57e6 │ │ @ instruction: 0xffd01aff │ │ movs r7, r0 │ │ and.w r0, r0, r0, lsl #16 │ │ - b.n a5806 │ │ + b.n a5812 │ │ @ instruction: 0xffcdeaff │ │ movs r0, r6 │ │ - b.n a4ff8 │ │ + b.n a5004 │ │ movs r0, r0 │ │ - b.n a5b72 │ │ + b.n a5b7e │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r1 │ │ - b.n a4ffa │ │ + b.n a5006 │ │ lsrs r2, r0, #32 │ │ - b.n a5afe │ │ + b.n a5b0a │ │ @ instruction: 0xffc70aff │ │ lsls r2, r3, #1 │ │ - b.n a5092 │ │ + b.n a509e │ │ movs r0, r0 │ │ - b.n a5b8a │ │ + b.n a5b96 │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ movs r4, r6 │ │ - b.n a502c │ │ + b.n a5038 │ │ blxns r6 │ │ - b.n a5b06 │ │ - ldr r7, [pc, #1020] @ (a58f4 ) │ │ - b.n a5b98 │ │ + b.n a5b12 │ │ + ldr r7, [pc, #1020] @ (a5900 ) │ │ + b.n a5ba4 │ │ movs r0, r0 │ │ - b.n a5b9e │ │ + b.n a5baa │ │ ands r0, r0 │ │ asrs r0, r4, #6 │ │ @ instruction: 0xffbeeaff │ │ asrs r0, r4, #1 │ │ - b.n a5048 │ │ + b.n a5054 │ │ movs r0, #104 @ 0x68 │ │ - b.n a5c4e │ │ + b.n a5c5a │ │ adds r0, #92 @ 0x5c │ │ - b.n a5050 │ │ + b.n a505c │ │ lsls r4, r3, #1 │ │ - b.n a5054 │ │ + b.n a5060 │ │ asrs r1, r0, #32 │ │ - b.n a5638 │ │ + b.n a5644 │ │ adds r0, #3 │ │ - b.n a563c │ │ + b.n a5648 │ │ movs r0, r0 │ │ - b.n a5640 │ │ + b.n a564c │ │ movs r0, r0 │ │ - b.n a5040 │ │ + b.n a504c │ │ movs r1, r0 │ │ - b.n a5c6a │ │ - bvc.n a55a8 │ │ + b.n a5c76 │ │ + bvc.n a55b4 │ │ @ instruction: 0xebffffee │ │ - @ instruction: 0xeaff980c │ │ + @ instruction: 0xeaff9820 │ │ movs r3, r0 │ │ - str r4, [sp, #640] @ 0x280 │ │ + str r4, [sp, #720] @ 0x2d0 │ │ movs r3, r0 │ │ - ldrh r5, [r0, #12] │ │ - vqshrn.u64 d20, q2, #10 │ │ - vrintx.f16 , q8 │ │ + ldrh r5, [r5, #18] │ │ + @ instruction: 0xfff649dd │ │ + vsri.64 , q10, #10 │ │ movs r3, r0 │ │ - ldrh r1, [r0, #14] │ │ - @ instruction: 0xfff643ca │ │ - vsri.32 , q4, #10 │ │ + ldrh r1, [r5, #20] │ │ + vrintx.f16 d20, d17 │ │ + vrintn.f16 , q14 │ │ movs r3, r0 │ │ - ldrh r1, [r6, #8] │ │ - vtbx.8 d20, {d22}, d0 │ │ - vcvt.f32.f16 , d12 │ │ + ldrh r1, [r3, #16] │ │ + vtbl.8 d20, {d22-d23}, d9 │ │ + vcvt.f32.f16 , d16 │ │ movs r3, r0 │ │ - ldrh r1, [r4, #28] │ │ - vcvt.f16.u16 d21, d10, #10 │ │ - vqshlu.s32 , q6, #22 │ │ + ldrh r1, [r1, #36] @ 0x24 │ │ + vtbx.8 d21, {d6-d9}, d13 │ │ + vqshlu.s32 , q8, #22 │ │ movs r3, r0 │ │ - str r3, [sp, #976] @ 0x3d0 │ │ + str r4, [sp, #32] │ │ movs r3, r0 │ │ - ldrh r5, [r7, #0] │ │ - vqmovun.s32 d20, q13 │ │ - vqrdmulh.s , q3, d17[0] │ │ + ldrh r5, [r4, #8] │ │ + @ instruction: 0xfff64341 │ │ + @ instruction: 0xfff67e95 │ │ vaddl.u q8, d6, d3 │ │ - b.n a5b9e │ │ + b.n a5baa │ │ lsls r0, r2, #3 │ │ lsls r1, r0, #7 │ │ movs r0, r0 │ │ asrs r1, r2, #22 │ │ asrs r4, r0, #32 │ │ asrs r1, r2, #22 │ │ vrhadd.u16 d14, d14, d31 │ │ - ldr r7, [pc, #960] @ (a5950 ) │ │ + ldr r7, [pc, #960] @ (a595c ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n a5ab0 │ │ + b.n a5abc │ │ svc 77 @ 0x4d │ │ - b.n a5a34 │ │ + b.n a5a40 │ │ movs r0, r0 │ │ - b.n a5c3e │ │ + b.n a5c4a │ │ lsls r2, r0, #13 │ │ lsrs r0, r0, #8 │ │ str r0, [sp, #0] │ │ - b.n a58e6 │ │ + b.n a58f2 │ │ movs r0, r0 │ │ - b.n a50ca │ │ + b.n a50d6 │ │ ldr r4, [r5, r4] │ │ - b.n a5bbe │ │ + b.n a5bca │ │ strb r1, [r0, #25] │ │ - b.n a5bc4 │ │ + b.n a5bd0 │ │ ldrb r1, [r1, #10] │ │ - b.n a5c38 │ │ + b.n a5c44 │ │ ldrsh r7, [r7, r7] │ │ - b.n a5c58 │ │ + b.n a5c64 │ │ movs r7, r0 │ │ - b.n a585e │ │ + b.n a586a │ │ lsls r3, r7, #12 │ │ subs r0, r0, r0 │ │ str r4, [r0, #0] │ │ - b.n a50f8 │ │ + b.n a5104 │ │ ldrsb r5, [r6, r6] │ │ - b.n a5bda │ │ + b.n a5be6 │ │ ldrsh r7, [r7, r7] │ │ - b.n a5c6c │ │ + b.n a5c78 │ │ movs r1, r0 │ │ - b.n a5cbe │ │ + b.n a5cca │ │ lsls r6, r6, #12 │ │ - bge.n a55d6 │ │ + bge.n a55e2 │ │ movs r4, r1 │ │ - b.n a5110 │ │ + b.n a511c │ │ strh r3, [r0, #0] │ │ - b.n a591e │ │ + b.n a592a │ │ movs r0, r6 │ │ - b.n a50fc │ │ + b.n a5108 │ │ movs r1, r1 │ │ - b.n a5926 │ │ + b.n a5932 │ │ movs r0, #52 @ 0x34 │ │ - b.n a5104 │ │ - add r0, pc, #4 @ (adr r0, a55f0 ) │ │ - b.n a592e │ │ + b.n a5110 │ │ + add r0, pc, #4 @ (adr r0, a55fc ) │ │ + b.n a593a │ │ ands r0, r2 │ │ - b.n a5128 │ │ - bhi.n a55fe │ │ + b.n a5134 │ │ + bhi.n a560a │ │ @ instruction: 0xebff7000 │ │ - b.n a593a │ │ + b.n a5946 │ │ movs r0, r2 │ │ - b.n a5130 │ │ + b.n a513c │ │ movs r0, r0 │ │ - b.n a5ca2 │ │ + b.n a5cae │ │ movs r2, r4 │ │ lsrs r0, r0, #8 │ │ lsrs r2, r0, #32 │ │ - b.n a5c36 │ │ + b.n a5c42 │ │ lsls r6, r5, #12 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n a5cc0 │ │ + b.n a5ccc │ │ movs r4, r2 │ │ subs r0, r0, r0 │ │ movs r1, r1 │ │ - b.n a595a │ │ + b.n a5966 │ │ asrs r0, r0, #32 │ │ - b.n a5d5e │ │ - bhi.n a5642 │ │ + b.n a5d6a │ │ + bhi.n a564e │ │ @ instruction: 0xebff0000 │ │ - b.n a5cc6 │ │ + b.n a5cd2 │ │ lsls r2, r6, #12 │ │ subs r0, r0, r0 │ │ str r0, [r2, #4] │ │ - b.n a5b48 │ │ + b.n a5b54 │ │ asrs r1, r1, #32 │ │ - b.n a5972 │ │ + b.n a597e │ │ str r4, [r0, r2] │ │ - b.n a5168 │ │ + b.n a5174 │ │ movs r6, r0 │ │ - b.n a597a │ │ - bvs.n a56fc │ │ + b.n a5986 │ │ + bvs.n a5708 │ │ @ instruction: 0xebff0acd │ │ orn r0, r6, #4194304 @ 0x400000 │ │ - b.n a5b50 │ │ + b.n a5b5c │ │ cmp r2, #207 @ 0xcf │ │ orn sl, r6, #6717440 @ 0x668000 │ │ orr.w sl, r0, #423936 @ 0x67800 │ │ orr.w r0, r0, #4325376 @ 0x420000 │ │ - b.n a5188 │ │ + b.n a5194 │ │ asrs r1, r0, #2 │ │ - b.n a51fa │ │ + b.n a5206 │ │ asrs r1, r0, #6 │ │ - b.n a575e │ │ + b.n a576a │ │ cmp r0, #216 @ 0xd8 │ │ - b.n a59e4 │ │ + b.n a59f0 │ │ movs r3, #240 @ 0xf0 │ │ - b.n a59e6 │ │ + b.n a59f2 │ │ lsls r0, r7, #16 │ │ add.w pc, r0, r7, lsr #32 │ │ - b.n a594c │ │ + b.n a5958 │ │ str r0, [r1, #0] │ │ - b.n a51a4 │ │ + b.n a51b0 │ │ strh r0, [r4, r2] │ │ - b.n a59b6 │ │ + b.n a59c2 │ │ lsls r6, r0, #4 │ │ - b.n a5b82 │ │ + b.n a5b8e │ │ lsls r2, r1, #4 │ │ - b.n a5d1e │ │ + b.n a5d2a │ │ movs r7, r1 │ │ subs r2, #0 │ │ movs r4, r0 │ │ - b.n a5932 │ │ + b.n a593e │ │ movs r5, r1 │ │ lsrs r0, r0, #8 │ │ ands r6, r2 │ │ - b.n a5dce │ │ + b.n a5dda │ │ lsls r6, r1, #11 │ │ and.w r1, r0, r4 │ │ - b.n a51c8 │ │ + b.n a51d4 │ │ movs r0, r0 │ │ - b.n a5d3a │ │ + b.n a5d46 │ │ lsls r0, r2, #12 │ │ subs r0, r0, r0 │ │ strb r2, [r1, #0] │ │ - b.n a59e2 │ │ + b.n a59ee │ │ stmia r0!, {r3} │ │ - b.n a59e6 │ │ + b.n a59f2 │ │ str r0, [r0, r0] │ │ - b.n a5dea │ │ + b.n a5df6 │ │ lsls r6, r0, #4 │ │ - b.n a5d96 │ │ + b.n a5da2 │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ ldr r1, [r0, #0] │ │ - b.n a5df6 │ │ - add r0, pc, #208 @ (adr r0, a5788 ) │ │ - b.n a51f4 │ │ + b.n a5e02 │ │ + add r0, pc, #208 @ (adr r0, a5794 ) │ │ + b.n a5200 │ │ strh r0, [r1, #0] │ │ - b.n a51f4 │ │ + b.n a5200 │ │ lsls r2, r2, #2 │ │ and.w r1, r0, r4 │ │ - b.n a51f8 │ │ + b.n a5204 │ │ movs r0, r0 │ │ - b.n a5d6a │ │ + b.n a5d76 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r3 │ │ - b.n a5bd2 │ │ + b.n a5bde │ │ movs r1, r1 │ │ and.w r0, r0, r0 │ │ - b.n a5d82 │ │ + b.n a5d8e │ │ movs r5, r6 │ │ - bge.n a56de │ │ + bge.n a56ea │ │ str r4, [r0, #0] │ │ - b.n a5a22 │ │ + b.n a5a2e │ │ lsls r3, r2, #1 │ │ and.w r0, r0, r4, lsl #2 │ │ - b.n a521c │ │ + b.n a5228 │ │ asrs r4, r3, #1 │ │ - b.n a52a0 │ │ + b.n a52ac │ │ movs r0, #16 │ │ - b.n a5224 │ │ + b.n a5230 │ │ lsls r1, r0, #2 │ │ - b.n a5296 │ │ + b.n a52a2 │ │ lsls r0, r2, #4 │ │ - b.n a57fe │ │ + b.n a580a │ │ movs r0, r5 │ │ - b.n a5bfe │ │ + b.n a5c0a │ │ movs r1, r0 │ │ - b.n a5df6 │ │ + b.n a5e02 │ │ str r4, [r5, r0] │ │ - b.n a5220 │ │ + b.n a522c │ │ strb r2, [r1, #0] │ │ - b.n a5a4a │ │ - add r0, pc, #208 @ (adr r0, a57dc ) │ │ - b.n a5248 │ │ + b.n a5a56 │ │ + add r0, pc, #208 @ (adr r0, a57e8 ) │ │ + b.n a5254 │ │ asrs r4, r3, #1 │ │ - bpl.n a56c4 │ │ + bpl.n a56d0 │ │ ands r0, r1 │ │ - b.n a5a56 │ │ + b.n a5a62 │ │ movs r0, #4 │ │ - bpl.n a563a │ │ + bpl.n a5646 │ │ ldrsh r4, [r5, r4] │ │ - b.n a525c │ │ + b.n a5268 │ │ strh r0, [r1, #0] │ │ - b.n a5258 │ │ + b.n a5264 │ │ str r5, [r0, r0] │ │ - b.n a5844 │ │ + b.n a5850 │ │ strb r2, [r2, #4] │ │ - bne.n a566a │ │ + bne.n a5676 │ │ movs r1, r0 │ │ - b.n a5e22 │ │ + b.n a5e2e │ │ movs r6, r0 │ │ ldmia r2!, {} │ │ asrs r4, r3, #1 │ │ - b.n a52e8 │ │ + b.n a52f4 │ │ movs r0, #12 │ │ - b.n a525a │ │ + b.n a5266 │ │ adds r0, #80 @ 0x50 │ │ - b.n a5268 │ │ + b.n a5274 │ │ asrs r2, r2, #4 │ │ - b.n a5848 │ │ + b.n a5854 │ │ movs r0, #0 │ │ - b.n a5c0c │ │ + b.n a5c18 │ │ asrs r1, r0, #32 │ │ - b.n a5bcc │ │ - add r0, pc, #8 @ (adr r0, a5754 ) │ │ - b.n a5750 │ │ + b.n a5bd8 │ │ + add r0, pc, #8 @ (adr r0, a5760 ) │ │ + b.n a575c │ │ movs r1, r0 │ │ - b.n a5e3a │ │ + b.n a5e46 │ │ movs r6, r0 │ │ ldmia r2!, {} │ │ asrs r4, r3, #1 │ │ - b.n a530c │ │ + b.n a5318 │ │ movs r0, #8 │ │ - b.n a527e │ │ + b.n a528a │ │ adds r0, #80 @ 0x50 │ │ - b.n a528c │ │ + b.n a5298 │ │ asrs r2, r2, #4 │ │ - b.n a586c │ │ + b.n a5878 │ │ movs r0, #0 │ │ - b.n a5c30 │ │ + b.n a5c3c │ │ asrs r1, r0, #32 │ │ - b.n a5bf0 │ │ + b.n a5bfc │ │ ands r2, r0 │ │ - b.n a5774 │ │ + b.n a5780 │ │ movs r1, r0 │ │ - b.n a5e66 │ │ + b.n a5e72 │ │ movs r4, r6 │ │ ldmia r2!, {} │ │ asrs r0, r6, #2 │ │ - b.n a5b1e │ │ + b.n a5b2a │ │ movs r0, #1 │ │ - b.n a5d92 │ │ + b.n a5d9e │ │ adds r0, #2 │ │ - b.n a5788 │ │ + b.n a5794 │ │ movs r2, r0 │ │ - b.n a5a30 │ │ + b.n a5a3c │ │ movs r4, r5 │ │ subs r0, r0, r0 │ │ subs r7, #255 @ 0xff │ │ - b.n a5db0 │ │ + b.n a5dbc │ │ cmp r0, #1 │ │ - b.n a5ed6 │ │ + b.n a5ee2 │ │ movs r3, r0 │ │ - b.n a5a3c │ │ + b.n a5a48 │ │ movs r1, r5 │ │ lsrs r0, r0, #8 │ │ movs r0, #209 @ 0xd1 │ │ - b.n a5776 │ │ + b.n a5782 │ │ asrs r1, r4, #24 │ │ - b.n a5ae6 │ │ + b.n a5af2 │ │ movs r0, #1 │ │ - b.n a5cae │ │ + b.n a5cba │ │ subs r1, #2 │ │ - b.n a5eee │ │ + b.n a5efa │ │ movs r1, #18 │ │ - b.n a58b8 │ │ + b.n a58c4 │ │ movs r3, r4 │ │ and.w lr, r0, r8, lsr #2 │ │ - b.n a52f8 │ │ + b.n a5304 │ │ asrs r7, r0, #32 │ │ - b.n a5afe │ │ + b.n a5b0a │ │ movs r0, #52 @ 0x34 │ │ - b.n a52fc │ │ + b.n a5308 │ │ movs r0, r0 │ │ - b.n a58e4 │ │ + b.n a58f0 │ │ movs r7, r0 │ │ - b.n a5a6e │ │ + b.n a5a7a │ │ strb r0, [r2, #1] │ │ - b.n a52ee │ │ + b.n a52fa │ │ asrs r2, r0, #32 │ │ stmia r1!, {r5, r7} │ │ movs r4, r1 │ │ - b.n a5a78 │ │ + b.n a5a84 │ │ asrs r4, r1, #32 │ │ - bne.n a571a │ │ + bne.n a5726 │ │ lsrs r1, r0, #32 │ │ - b.n a5e8c │ │ + b.n a5e98 │ │ ldrb r1, [r0, #0] │ │ movs r3, #160 @ 0xa0 │ │ movs r0, r0 │ │ - b.n a5e8e │ │ + b.n a5e9a │ │ strb r0, [r0, #4] │ │ lsls r0, r0, #12 │ │ movs r1, r0 │ │ - b.n a5ed0 │ │ + b.n a5edc │ │ lsls r5, r0, #10 │ │ - bge.n a57f2 │ │ + bge.n a57fe │ │ lsls r7, r7, #17 │ │ - b.n a5e98 │ │ + b.n a5ea4 │ │ movs r1, r0 │ │ - b.n a5b3a │ │ + b.n a5b46 │ │ lsls r7, r7, #17 │ │ movs r3, #160 @ 0xa0 │ │ movs r0, r0 │ │ - b.n a5ea4 │ │ + b.n a5eb0 │ │ lsls r0, r0, #12 │ │ lsls r0, r0, #12 │ │ str r7, [r0, #0] │ │ - b.n a5b4a │ │ + b.n a5b56 │ │ lsrs r1, r0, #32 │ │ - b.n a5ebc │ │ + b.n a5ec8 │ │ movs r7, r0 │ │ add r2, sp, #0 │ │ asrs r2, r0, #4 │ │ - b.n a5c22 │ │ + b.n a5c2e │ │ subs r7, #134 @ 0x86 │ │ - b.n a5b5a │ │ + b.n a5b66 │ │ asrs r6, r4, #2 │ │ - b.n a5b20 │ │ + b.n a5b2c │ │ adds r0, #0 │ │ - b.n a58c8 │ │ + b.n a58d4 │ │ cmp r7, #192 @ 0xc0 │ │ - b.n a5b66 │ │ + b.n a5b72 │ │ strb r6, [r0, #2] │ │ - b.n a5b6a │ │ + b.n a5b76 │ │ asrs r2, r0, #32 │ │ - b.n a59d0 │ │ + b.n a59dc │ │ @ instruction: 0xfff4baff │ │ strb r2, [r1, #0] │ │ - b.n a5b76 │ │ - add r0, pc, #208 @ (adr r0, a5908 ) │ │ - b.n a5374 │ │ + b.n a5b82 │ │ + add r0, pc, #208 @ (adr r0, a5914 ) │ │ + b.n a5380 │ │ strh r0, [r1, #0] │ │ - b.n a5374 │ │ + b.n a5380 │ │ movs r4, r5 │ │ and.w r0, r0, r1, lsl #8 │ │ - b.n a5b86 │ │ + b.n a5b92 │ │ asrs r4, r3, #1 │ │ - b.n a53fc │ │ + b.n a5408 │ │ strh r2, [r2, #8] │ │ - b.n a5b8e │ │ + b.n a5b9a │ │ asrs r4, r1, #32 │ │ - b.n a5388 │ │ + b.n a5394 │ │ movs r1, r0 │ │ - b.n a5f38 │ │ + b.n a5f44 │ │ movs r2, r2 │ │ ldmia r2!, {} │ │ asrs r2, r6, #2 │ │ - b.n a5bfe │ │ + b.n a5c0a │ │ movs r0, #1 │ │ - b.n a5e72 │ │ + b.n a5e7e │ │ adds r0, #2 │ │ - b.n a5868 │ │ + b.n a5874 │ │ movs r2, r0 │ │ - b.n a5b10 │ │ + b.n a5b1c │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ subs r7, #255 @ 0xff │ │ - b.n a5e90 │ │ + b.n a5e9c │ │ cmp r0, #1 │ │ - b.n a5fb6 │ │ + b.n a5fc2 │ │ movs r3, r0 │ │ - b.n a5b1c │ │ + b.n a5b28 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #209 @ 0xd1 │ │ - b.n a5856 │ │ + b.n a5862 │ │ asrs r1, r4, #24 │ │ - b.n a5bc6 │ │ + b.n a5bd2 │ │ movs r0, #1 │ │ - b.n a5d8e │ │ + b.n a5d9a │ │ subs r1, #2 │ │ - b.n a5fce │ │ + b.n a5fda │ │ movs r1, #18 │ │ - b.n a5998 │ │ + b.n a59a4 │ │ movs r0, r0 │ │ and.w r0, r0, r1, lsl #8 │ │ - b.n a5bda │ │ + b.n a5be6 │ │ asrs r4, r3, #1 │ │ - b.n a5450 │ │ + b.n a545c │ │ asrs r2, r2, #4 │ │ - b.n a5be2 │ │ + b.n a5bee │ │ asrs r0, r6, #32 │ │ - b.n a53c0 │ │ + b.n a53cc │ │ asrs r0, r2, #32 │ │ - b.n a53ca │ │ + b.n a53d6 │ │ movs r1, r1 │ │ - b.n a5bee │ │ + b.n a5bfa │ │ lsls r2, r7, #14 │ │ add.w r0, r0, ip, lsr #5 │ │ - b.n a5468 │ │ + b.n a5474 │ │ movs r0, #80 @ 0x50 │ │ - b.n a53e4 │ │ + b.n a53f0 │ │ lsls r0, r2, #4 │ │ - b.n a59c2 │ │ + b.n a59ce │ │ asrs r0, r0, #32 │ │ - b.n a5d86 │ │ + b.n a5d92 │ │ movs r1, r0 │ │ - b.n a5d46 │ │ + b.n a5d52 │ │ movs r1, r0 │ │ - b.n a58ca │ │ + b.n a58d6 │ │ movs r0, r0 │ │ - b.n a5b82 │ │ - add r0, pc, #0 @ (adr r0, a58d0 ) │ │ + b.n a5b8e │ │ + add r0, pc, #0 @ (adr r0, a58dc ) │ │ str r1, [sp, #640] @ 0x280 │ │ movs r0, r0 │ │ - b.n a5b7e │ │ + b.n a5b8a │ │ movs r4, r0 │ │ cmp r2, #0 │ │ lsls r5, r6, #30 │ │ - b.n a5eee │ │ + b.n a5efa │ │ str r4, [r5, r0] │ │ - b.n a541c │ │ + b.n a5428 │ │ lsrs r7, r7, #31 │ │ - b.n a5f84 │ │ + b.n a5f90 │ │ ands r3, r0 │ │ - b.n a5dea │ │ + b.n a5df6 │ │ lsls r7, r6, #8 │ │ @ instruction: 0xea00c004 │ │ - b.n a5c32 │ │ + b.n a5c3e │ │ str r4, [r5, r0] │ │ - b.n a5430 │ │ + b.n a543c │ │ lsrs r1, r0, #32 │ │ - b.n a60ba │ │ + b.n a60c6 │ │ ands r6, r2 │ │ - b.n a603e │ │ + b.n a604a │ │ movs r0, r0 │ │ - b.n a5a0e │ │ + b.n a5a1a │ │ adds r7, r7, #3 │ │ - b.n a60c6 │ │ + b.n a60d2 │ │ movs r1, r0 │ │ - b.n a5baa │ │ + b.n a5bb6 │ │ lsls r7, r5, #8 │ │ subs r2, #0 │ │ movs r1, r0 │ │ - b.n a5d9e │ │ + b.n a5daa │ │ ands r6, r2 │ │ - b.n a6056 │ │ + b.n a6062 │ │ movs r0, r0 │ │ - b.n a5b46 │ │ + b.n a5b52 │ │ lsls r3, r5, #8 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n a5fd0 │ │ + b.n a5fdc │ │ strb r4, [r4, #0] │ │ - b.n a5440 │ │ + b.n a544c │ │ movs r6, r0 │ │ - bge.n a592a │ │ + bge.n a5936 │ │ lsls r6, r0, #4 │ │ - b.n a601c │ │ + b.n a6028 │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ ands r4, r1 │ │ - b.n a5c76 │ │ + b.n a5c82 │ │ lsls r0, r4, #16 │ │ @ instruction: 0xeb00c004 │ │ - b.n a5c7e │ │ + b.n a5c8a │ │ strb r0, [r0, #0] │ │ - b.n a5c82 │ │ + b.n a5c8e │ │ movs r0, r1 │ │ and.w r2, r0, r6, lsl #30 │ │ - b.n a5c8a │ │ + b.n a5c96 │ │ asrs r6, r0, #32 │ │ - b.n a5c8e │ │ + b.n a5c9a │ │ strb r0, [r0, #12] │ │ lsls r0, r0, #12 │ │ ands r4, r1 │ │ - b.n a5c96 │ │ + b.n a5ca2 │ │ movs r7, r0 │ │ - b.n a5c9a │ │ - stmia r0!, {r2, r5, r6} │ │ + b.n a5ca6 │ │ + stmia r0!, {r0, r2, r5, r6} │ │ add.w r0, r0, r3 │ │ - b.n a6002 │ │ + b.n a600e │ │ stmia r0!, {r2} │ │ - b.n a5ca6 │ │ + b.n a5cb2 │ │ strb r6, [r0, #2] │ │ adds r0, #134 @ 0x86 │ │ lsls r6, r0, #4 │ │ - b.n a6062 │ │ + b.n a606e │ │ lsls r0, r4, #8 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n a602e │ │ + b.n a603a │ │ movs r2, r0 │ │ - bge.n a597a │ │ + bge.n a5986 │ │ lsls r6, r0, #4 │ │ - b.n a6076 │ │ + b.n a6082 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ lsls r6, r5, #8 │ │ @ instruction: 0xea00c001 │ │ asrs r0, r0, #12 │ │ movs r0, r0 │ │ - b.n a603e │ │ + b.n a604a │ │ movs r0, r1 │ │ - b.n a5cd2 │ │ + b.n a5cde │ │ movs r1, r0 │ │ asrs r0, r0, #12 │ │ movs r4, r1 │ │ - b.n a5bba │ │ + b.n a5bc6 │ │ lsls r6, r4, #8 │ │ subs r0, r0, r0 │ │ movs r7, r0 │ │ - b.n a5c56 │ │ + b.n a5c62 │ │ stmia r0!, {r1, r3} │ │ - b.n a5ce6 │ │ + b.n a5cf2 │ │ lsls r3, r4, #8 │ │ rev r0, r0 │ │ lsrs r3, r0, #16 │ │ - b.n a605c │ │ + b.n a6068 │ │ vpmin.u , , │ │ movs r4, r1 │ │ - b.n a5c64 │ │ + b.n a5c70 │ │ vpmin.u q6, , │ │ movs r1, r0 │ │ - b.n a6072 │ │ + b.n a607e │ │ movs r7, r0 │ │ - b.n a5d02 │ │ + b.n a5d0e │ │ asrs r6, r0, #32 │ │ - b.n a5d06 │ │ + b.n a5d12 │ │ ands r4, r1 │ │ - b.n a5d0a │ │ - add r0, pc, #28 @ (adr r0, a59e8 ) │ │ - cbz r0, a59f6 │ │ - stmia r0!, {r0, r1, r2, r6} │ │ + b.n a5d16 │ │ + add r0, pc, #28 @ (adr r0, a59f4 ) │ │ + cbz r0, a5a02 │ │ + stmia r0!, {r3, r6} │ │ add.w r0, r0, r2 │ │ - b.n a6076 │ │ + b.n a6082 │ │ movs r6, r0 │ │ ldrh r0, [r0, #16] │ │ strb r6, [r0, #2] │ │ - b.n a5aea │ │ + b.n a5af6 │ │ movs r4, r0 │ │ - b.n a5c90 │ │ + b.n a5c9c │ │ vpmin.u32 q6, q12, │ │ movs r7, r0 │ │ - b.n a5c9e │ │ + b.n a5caa │ │ movs r0, #4 │ │ - b.n a5d2e │ │ - add r0, pc, #28 @ (adr r0, a5a0c ) │ │ - bne.n a5932 │ │ + b.n a5d3a │ │ + add r0, pc, #28 @ (adr r0, a5a18 ) │ │ + bne.n a593e │ │ movs r0, r0 │ │ and.w r0, r0, r4, lsl #8 │ │ - b.n a5d3a │ │ + b.n a5d46 │ │ lsls r7, r7, #17 │ │ - b.n a60a2 │ │ + b.n a60ae │ │ lsls r6, r1, #9 │ │ ldrh r0, [r0, #16] │ │ str r4, [r5, r0] │ │ - b.n a5520 │ │ + b.n a552c │ │ adds r0, #8 │ │ - b.n a5d4a │ │ + b.n a5d56 │ │ lsrs r0, r1, #17 │ │ - b.n a554c │ │ + b.n a5558 │ │ movs r0, r0 │ │ - b.n a5b30 │ │ + b.n a5b3c │ │ cmp r8, sl │ │ - b.n a5d96 │ │ + b.n a5da2 │ │ movs r6, r0 │ │ - b.n a5cc2 │ │ + b.n a5cce │ │ ands r6, r0 │ │ str r1, [sp, #640] @ 0x280 │ │ asrs r4, r0, #32 │ │ - b.n a5b30 │ │ + b.n a5b3c │ │ movs r0, r0 │ │ - b.n a5eee │ │ + b.n a5efa │ │ asrs r1, r0, #32 │ │ - b.n a5eac │ │ + b.n a5eb8 │ │ movs r4, r0 │ │ - b.n a5cd8 │ │ + b.n a5ce4 │ │ asrs r0, r0, #32 │ │ - b.n a5a34 │ │ + b.n a5a40 │ │ ands r5, r0 │ │ strh r0, [r4, #12] │ │ movs r4, r0 │ │ - b.n a5b3e │ │ + b.n a5b4a │ │ strh r0, [r0, #0] │ │ - b.n a5f06 │ │ + b.n a5f12 │ │ movs r1, r0 │ │ - b.n a5ec2 │ │ + b.n a5ece │ │ movs r0, #8 │ │ - b.n a5a46 │ │ + b.n a5a52 │ │ lsls r7, r7, #17 │ │ - b.n a60ee │ │ + b.n a60fa │ │ lsls r6, r5, #8 │ │ ldrh r0, [r0, #16] │ │ stmia r0!, {r1} │ │ - b.n a5d92 │ │ + b.n a5d9e │ │ movs r4, r0 │ │ - b.n a5b6a │ │ + b.n a5b76 │ │ str r3, [r0, r0] │ │ - b.n a5d9a │ │ + b.n a5da6 │ │ movs r1, r0 │ │ - b.n a5ede │ │ + b.n a5eea │ │ asrs r4, r6, #32 │ │ - b.n a557c │ │ + b.n a5588 │ │ movs r0, r1 │ │ - b.n a5a66 │ │ + b.n a5a72 │ │ movs r1, r0 │ │ - b.n a5d0a │ │ + b.n a5d16 │ │ movs r1, r0 │ │ - bne.n a59ae │ │ + bne.n a59ba │ │ movs r4, r1 │ │ - b.n a5d12 │ │ + b.n a5d1e │ │ movs r4, r1 │ │ - add r1, pc, #640 @ (adr r1, a5cf4 ) │ │ + add r1, pc, #640 @ (adr r1, a5d00 ) │ │ movs r1, r0 │ │ - b.n a6160 │ │ + b.n a616c │ │ movs r0, r5 │ │ - b.n a5598 │ │ + b.n a55a4 │ │ movs r1, r3 │ │ ldmia r2!, {} │ │ movs r1, r0 │ │ - b.n a5b1e │ │ + b.n a5b2a │ │ cmp r4, #49 @ 0x31 │ │ - b.n a608a │ │ + b.n a6096 │ │ movs r0, #195 @ 0xc3 │ │ - b.n a6114 │ │ + b.n a6120 │ │ lsls r0, r4, #2 │ │ - b.n a5dd2 │ │ + b.n a5dde │ │ lsls r0, r2, #10 │ │ - b.n a5b9a │ │ + b.n a5ba6 │ │ movs r4, r4 │ │ - b.n a55d4 │ │ + b.n a55e0 │ │ movs r0, r0 │ │ - b.n a613e │ │ - add r1, pc, #136 @ (adr r1, a5b28 ) │ │ - b.n a5de2 │ │ + b.n a614a │ │ + add r1, pc, #136 @ (adr r1, a5b34 ) │ │ + b.n a5dee │ │ movs r4, r0 │ │ - ldr r2, [pc, #0] @ (a5aa4 ) │ │ + ldr r2, [pc, #0] @ (a5ab0 ) │ │ lsls r1, r0, #24 │ │ - b.n a614c │ │ + b.n a6158 │ │ movs r2, r0 │ │ add r2, sp, #0 │ │ movs r1, r0 │ │ - b.n a5d66 │ │ + b.n a5d72 │ │ str r1, [r0, r0] │ │ - b.n a5df6 │ │ + b.n a5e02 │ │ movs r7, r0 │ │ ldmia r2!, {} │ │ movs r2, r1 │ │ - b.n a5dfe │ │ + b.n a5e0a │ │ strb r4, [r1, #0] │ │ - b.n a5e02 │ │ - bkpt 0x00d6 │ │ + b.n a5e0e │ │ + bkpt 0x00d7 │ │ add.w r0, r0, r4, ror #4 │ │ - b.n a5604 │ │ + b.n a5610 │ │ lsls r0, r0, #1 │ │ - b.n a616e │ │ + b.n a617a │ │ stmia r0!, {r0, r1, r2} │ │ - b.n a5e12 │ │ - add r3, pc, #4 @ (adr r3, a5ad8 ) │ │ + b.n a5e1e │ │ + add r3, pc, #4 @ (adr r3, a5ae4 ) │ │ stmia r1!, {r5, r7} │ │ str r2, [r1, r0] │ │ - b.n a5e1a │ │ + b.n a5e26 │ │ lsrs r1, r0, #32 │ │ - b.n a6188 │ │ + b.n a6194 │ │ ldr r1, [r0, r0] │ │ - bcc.n a5a22 │ │ + bcc.n a5a2e │ │ lsls r1, r0, #8 │ │ - b.n a6190 │ │ + b.n a619c │ │ strh r1, [r0, r0] │ │ movs r3, #160 @ 0xa0 │ │ movs r0, #4 │ │ - b.n a5bf8 │ │ + b.n a5c04 │ │ adds r0, #48 @ 0x30 │ │ - b.n a562c │ │ + b.n a5638 │ │ strb r1, [r0, #0] │ │ - b.n a5f7a │ │ + b.n a5f86 │ │ movs r0, r1 │ │ - b.n a562c │ │ + b.n a5638 │ │ movs r0, r0 │ │ - b.n a61a4 │ │ - add r0, pc, #64 @ (adr r0, a5b40 ) │ │ - b.n a5634 │ │ + b.n a61b0 │ │ + add r0, pc, #64 @ (adr r0, a5b4c ) │ │ + b.n a5640 │ │ movs r0, #7 │ │ - b.n a5e46 │ │ + b.n a5e52 │ │ movs r0, #4 │ │ stmia r1!, {r5, r7} │ │ movs r0, r0 │ │ - b.n a61b8 │ │ + b.n a61c4 │ │ movs r0, #7 │ │ asrs r0, r4, #6 │ │ str r0, [r1, r0] │ │ - b.n a5b1a │ │ + b.n a5b26 │ │ movs r0, r0 │ │ - b.n a61c0 │ │ + b.n a61cc │ │ adds r0, #133 @ 0x85 │ │ sbcs r0, r4 │ │ movs r0, #3 │ │ - b.n a5c2a │ │ + b.n a5c36 │ │ movs r0, #1 │ │ - b.n a5faa │ │ + b.n a5fb6 │ │ movs r0, r0 │ │ - b.n a61de │ │ + b.n a61ea │ │ strb r0, [r1, #0] │ │ - b.n a5b32 │ │ + b.n a5b3e │ │ movs r5, r4 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n a5de2 │ │ + b.n a5dee │ │ str r4, [r4, r0] │ │ - b.n a5654 │ │ + b.n a5660 │ │ stmia r0!, {r4, r5} │ │ - b.n a5658 │ │ + b.n a5664 │ │ lsls r0, r0, #8 │ │ subs r0, r0, r0 │ │ lsls r0, r2, #1 │ │ - b.n a6060 │ │ + b.n a606c │ │ asrs r0, r4, #3 │ │ - b.n a628a │ │ + b.n a6296 │ │ strb r4, [r3, #0] │ │ - b.n a5668 │ │ - pop {r1, r2, r3, r7, pc} │ │ + b.n a5674 │ │ + pop {r0, r1, r2, r3, r5, r7, pc} │ │ mla r1, r0, r4, r0 │ │ - b.n a5688 │ │ + b.n a5694 │ │ movs r0, r0 │ │ - b.n a61fa │ │ + b.n a6206 │ │ str r0, [r0, r0] │ │ - b.n a5e9e │ │ + b.n a5eaa │ │ lsls r7, r0, #1 │ │ subs r0, r0, r0 │ │ lsls r4, r0, #2 │ │ - b.n a5698 │ │ + b.n a56a4 │ │ adds r0, #92 @ 0x5c │ │ - b.n a571c │ │ + b.n a5728 │ │ movs r0, #129 @ 0x81 │ │ - b.n a570e │ │ + b.n a571a │ │ asrs r0, r0, #2 │ │ - b.n a5712 │ │ + b.n a571e │ │ lsls r2, r0, #6 │ │ - b.n a5c76 │ │ + b.n a5c82 │ │ lsls r0, r1 │ │ - b.n a569a │ │ + b.n a56a6 │ │ strb r4, [r1, #2] │ │ - b.n a569e │ │ + b.n a56aa │ │ movs r0, r0 │ │ - b.n a62c2 │ │ + b.n a62ce │ │ movs r4, r7 │ │ - b.n a56a0 │ │ + b.n a56ac │ │ movs r0, r7 │ │ - b.n a56a4 │ │ + b.n a56b0 │ │ lsls r2, r2, #12 │ │ - b.n a5ca2 │ │ + b.n a5cae │ │ str r4, [r2, r0] │ │ - b.n a6092 │ │ + b.n a609e │ │ movs r1, r0 │ │ - b.n a62d6 │ │ + b.n a62e2 │ │ str r1, [r6, #32] │ │ - b.n a5b9a │ │ - add r0, pc, #224 @ (adr r0, a5c7c ) │ │ - b.n a60b8 │ │ + b.n a5ba6 │ │ + add r0, pc, #224 @ (adr r0, a5c88 ) │ │ + b.n a60c4 │ │ lsls r4, r0, #2 │ │ - b.n a56d4 │ │ + b.n a56e0 │ │ movs r0, #4 │ │ - b.n a5ee6 │ │ + b.n a5ef2 │ │ adds r0, #7 │ │ - b.n a5eea │ │ + b.n a5ef6 │ │ lsls r0, r4, #17 │ │ stmia.w sp, {r0, r4, sl} │ │ add.w r0, r0, r0 │ │ - b.n a6256 │ │ + b.n a6262 │ │ movs r1, r3 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n a629e │ │ + b.n a62aa │ │ @ instruction: 0xfff60aff │ │ strh r0, [r0, #0] │ │ - b.n a5f06 │ │ + b.n a5f12 │ │ lsls r2, r0, #10 │ │ and.w r0, r0, r0 │ │ - b.n a5e7a │ │ + b.n a5e86 │ │ lsls r6, r3, #6 │ │ subs r0, r0, r0 │ │ eors r4, r3 │ │ - b.n a5788 │ │ + b.n a5794 │ │ movs r0, r5 │ │ - b.n a5714 │ │ + b.n a5720 │ │ lsls r0, r6, #3 │ │ - b.n a56f0 │ │ + b.n a56fc │ │ lsls r5, r6, #16 │ │ - b.n a5f22 │ │ + b.n a5f2e │ │ asrs r0, r5, #3 │ │ - b.n a56f8 │ │ + b.n a5704 │ │ stmia r0!, {r2, r3, r5, r6, r7} │ │ - b.n a56fc │ │ + b.n a5708 │ │ lsls r1, r6, #14 │ │ add.w r0, r0, r1, lsl #20 │ │ - b.n a6202 │ │ + b.n a620e │ │ asrs r5, r0, #32 │ │ - b.n a5bf6 │ │ + b.n a5c02 │ │ movs r5, r0 │ │ - b.n a5e9c │ │ + b.n a5ea8 │ │ lsls r6, r2, #4 │ │ subs r0, r0, r0 │ │ subs r7, r7, #7 │ │ - b.n a6220 │ │ + b.n a622c │ │ movs r1, r0 │ │ - b.n a5ea6 │ │ + b.n a5eb2 │ │ lsls r2, r2, #4 │ │ lsrs r0, r0, #8 │ │ asrs r0, r2, #3 │ │ - b.n a5be2 │ │ + b.n a5bee │ │ lsls r0, r4, #24 │ │ - b.n a5f52 │ │ + b.n a5f5e │ │ asrs r1, r0, #32 │ │ - b.n a6118 │ │ + b.n a6124 │ │ cmp r1, #2 │ │ - b.n a635a │ │ + b.n a6366 │ │ movs r1, r2 │ │ - b.n a5d22 │ │ + b.n a5d2e │ │ lsls r5, r1, #4 │ │ and.w r0, r0, r0, lsr #25 │ │ - b.n a6140 │ │ + b.n a614c │ │ asrs r5, r0, #32 │ │ - b.n a5f6a │ │ + b.n a5f76 │ │ movs r0, #224 @ 0xe0 │ │ - b.n a636e │ │ + b.n a637a │ │ movs r6, r0 │ │ - b.n a5f72 │ │ - pop {r2, r5, r7, pc} │ │ - mla r0, r0, r1, r1 │ │ - b.n a6162 │ │ + b.n a5f7e │ │ + cbnz r6, a5cbe │ │ + @ instruction: 0xfa001001 │ │ + b.n a616e │ │ movs r0, r0 │ │ - b.n a618c │ │ + b.n a6198 │ │ movs r1, r0 │ │ - b.n a6322 │ │ + b.n a632e │ │ lsls r3, r3, #9 │ │ lsrs r0, r0, #8 │ │ cmp r2, #40 @ 0x28 │ │ - b.n a5788 │ │ + b.n a5794 │ │ lsls r4, r0, #4 │ │ - b.n a5768 │ │ + b.n a5774 │ │ lsls r4, r3, #1 │ │ - b.n a576c │ │ + b.n a5778 │ │ movs r0, #2 │ │ - b.n a5d74 │ │ + b.n a5d80 │ │ lsls r4, r0, #4 │ │ - b.n a578c │ │ + b.n a5798 │ │ movs r0, #64 @ 0x40 │ │ - b.n a6162 │ │ + b.n a616e │ │ lsrs r7, r5, #11 │ │ orn r0, r2, #393216 @ 0x60000 │ │ - b.n a6172 │ │ + b.n a617e │ │ movs r0, r0 │ │ - b.n a630a │ │ + b.n a6316 │ │ str r0, [r0, r0] │ │ - b.n a5fae │ │ + b.n a5fba │ │ movs r0, r0 │ │ lsls r0, r4, #14 │ │ str r4, [r0, r2] │ │ lsls r1, r3, #22 │ │ lsrs r7, r1, #11 │ │ orr.w r1, r2, #2097152 @ 0x200000 │ │ - b.n a5798 │ │ + b.n a57a4 │ │ asrs r0, r3, #1 │ │ - b.n a579c │ │ + b.n a57a8 │ │ movs r0, #5 │ │ - b.n a5fc6 │ │ + b.n a5fd2 │ │ movs r4, r2 │ │ - b.n a57a4 │ │ + b.n a57b0 │ │ asrs r0, r7, #6 │ │ - b.n a6072 │ │ + b.n a607e │ │ strh r4, [r3, #2] │ │ - b.n a5844 │ │ + b.n a5850 │ │ movs r1, r1 │ │ @ instruction: 0xe9922018 │ │ - b.n a57b4 │ │ + b.n a57c0 │ │ movs r0, #12 │ │ - b.n a57c2 │ │ + b.n a57ce │ │ lsrs r0, r2, #32 │ │ - b.n a5fe2 │ │ + b.n a5fee │ │ adds r0, #16 │ │ - b.n a57c0 │ │ + b.n a57cc │ │ subs r0, #19 │ │ - b.n a5fea │ │ + b.n a5ff6 │ │ lsls r0, r5, #3 │ │ - b.n a57c0 │ │ + b.n a57cc │ │ movs r1, r0 │ │ - b.n a62c2 │ │ + b.n a62ce │ │ cmp r0, #18 │ │ - b.n a5ff6 │ │ + b.n a6002 │ │ adds r0, #236 @ 0xec │ │ - b.n a57cc │ │ + b.n a57d8 │ │ movs r0, #240 @ 0xf0 │ │ - b.n a57d0 │ │ + b.n a57dc │ │ movs r0, #0 │ │ - b.n a5cc4 │ │ + b.n a5cd0 │ │ subs r7, #255 @ 0xff │ │ - b.n a62e4 │ │ + b.n a62f0 │ │ movs r0, r0 │ │ - b.n a5f6e │ │ + b.n a5f7a │ │ movs r3, r1 │ │ subs r0, r0, r0 │ │ strb r4, [r6, #0] │ │ - b.n a580c │ │ + b.n a5818 │ │ cmp r0, #1 │ │ - b.n a6416 │ │ + b.n a6422 │ │ ands r0, r6 │ │ - b.n a5814 │ │ + b.n a5820 │ │ ldr r7, [r7, #124] @ 0x7c │ │ - b.n a62fc │ │ + b.n a6308 │ │ movs r3, r0 │ │ - b.n a5f84 │ │ + b.n a5f90 │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, #209 @ 0xd1 │ │ - b.n a5cbe │ │ + b.n a5cca │ │ asrs r1, r4, #24 │ │ - b.n a602e │ │ + b.n a603a │ │ movs r0, #1 │ │ - b.n a61f6 │ │ + b.n a6202 │ │ subs r1, #2 │ │ - b.n a6436 │ │ + b.n a6442 │ │ movs r1, #18 │ │ - b.n a5e00 │ │ + b.n a5e0c │ │ movs r3, r0 │ │ and.w pc, r0, pc, ror #27 │ │ - b.n a6320 │ │ + b.n a632c │ │ movs r0, #1 │ │ - b.n a6046 │ │ + b.n a6052 │ │ strb r4, [r6, #0] │ │ - b.n a5844 │ │ + b.n a5850 │ │ ands r0, r6 │ │ - b.n a5848 │ │ + b.n a5854 │ │ asrs r2, r7, #6 │ │ - b.n a60bc │ │ + b.n a60c8 │ │ cmp r0, #18 │ │ - b.n a6056 │ │ + b.n a6062 │ │ movs r0, #244 @ 0xf4 │ │ - b.n a582c │ │ + b.n a5838 │ │ movs r0, #0 │ │ - b.n a5d20 │ │ + b.n a5d2c │ │ str r0, [r4, r0] │ │ - b.n a583c │ │ + b.n a5848 │ │ movs r0, r0 │ │ - b.n a5fca │ │ + b.n a5fd6 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ adds r0, #36 @ 0x24 │ │ - b.n a5868 │ │ + b.n a5874 │ │ lsrs r1, r0, #32 │ │ - b.n a6472 │ │ + b.n a647e │ │ movs r6, r0 │ │ - b.n a5fd8 │ │ + b.n a5fe4 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ lsls r1, r2, #3 │ │ - b.n a5d12 │ │ + b.n a5d1e │ │ asrs r1, r4, #24 │ │ - b.n a6082 │ │ + b.n a608e │ │ movs r1, r0 │ │ - b.n a6246 │ │ + b.n a6252 │ │ cmp r1, #2 │ │ - b.n a648a │ │ + b.n a6496 │ │ lsls r0, r2, #4 │ │ - b.n a5e52 │ │ + b.n a5e5e │ │ movs r1, r0 │ │ and.w r0, r0, r1 │ │ - b.n a6096 │ │ + b.n a60a2 │ │ adds r0, #36 @ 0x24 │ │ - b.n a5894 │ │ + b.n a58a0 │ │ lsrs r0, r2, #32 │ │ - b.n a609e │ │ + b.n a60aa │ │ ldrb r7, [r6, #0] │ │ - b.n a60a2 │ │ + b.n a60ae │ │ lsls r0, r7, #3 │ │ - b.n a5878 │ │ + b.n a5884 │ │ ldr r4, [r6, r0] │ │ - b.n a60aa │ │ + b.n a60b6 │ │ movs r0, r5 │ │ - b.n a58a8 │ │ + b.n a58b4 │ │ strb r4, [r7, #0] │ │ - b.n a588c │ │ + b.n a5898 │ │ str r0, [r0, r1] │ │ - b.n a5890 │ │ + b.n a589c │ │ ldr r0, [r6, #0] │ │ - b.n a60ba │ │ + b.n a60c6 │ │ lsrs r3, r6, #32 │ │ - b.n a60be │ │ + b.n a60ca │ │ str r4, [r0, #4] │ │ - b.n a589c │ │ + b.n a58a8 │ │ lsls r3, r1, #13 │ │ @ instruction: 0xeb00a000 │ │ - b.n a60ca │ │ + b.n a60d6 │ │ lsls r0, r7, #14 │ │ - b.n a6128 │ │ + b.n a6134 │ │ movs r4, r3 │ │ - b.n a58cc │ │ + b.n a58d8 │ │ lsrs r0, r6, #32 │ │ - b.n a60d6 │ │ + b.n a60e2 │ │ lsls r6, r0, #13 │ │ add.w r0, r0, r0, lsl #12 │ │ - b.n a60de │ │ + b.n a60ea │ │ lsrs r4, r2, #3 │ │ - b.n a58e0 │ │ + b.n a58ec │ │ strb r4, [r4, #0] │ │ - b.n a58c0 │ │ + b.n a58cc │ │ movs r0, r0 │ │ - b.n a5ec8 │ │ + b.n a5ed4 │ │ adds r0, #48 @ 0x30 │ │ - b.n a58c8 │ │ + b.n a58d4 │ │ adds r3, #186 @ 0xba │ │ - b.n a614c │ │ + b.n a6158 │ │ lsls r0, r2, #1 │ │ - b.n a58d6 │ │ + b.n a58e2 │ │ adds r0, #52 @ 0x34 │ │ - b.n a58f4 │ │ + b.n a5900 │ │ adds r7, r2, r0 │ │ - b.n a5ebe │ │ + b.n a5eca │ │ strb r0, [r4, #0] │ │ - b.n a58fc │ │ + b.n a5908 │ │ movs r0, #1 │ │ - b.n a6248 │ │ + b.n a6254 │ │ asrs r0, r0, #32 │ │ - b.n a628a │ │ + b.n a6296 │ │ movs r0, #1 │ │ - b.n a5dd2 │ │ + b.n a5dde │ │ strb r0, [r5, #0] │ │ - b.n a5900 │ │ + b.n a590c │ │ movs r3, r0 │ │ - b.n a607a │ │ + b.n a6086 │ │ strb r0, [r1, #1] │ │ - b.n a58f4 │ │ + b.n a5900 │ │ lsls r7, r3, #5 │ │ subs r0, r0, r0 │ │ cmp r0, #21 │ │ - b.n a5ee2 │ │ + b.n a5eee │ │ movs r0, #1 │ │ - b.n a626a │ │ + b.n a6276 │ │ movs r0, #1 │ │ - b.n a5dee │ │ + b.n a5dfa │ │ movs r4, r0 │ │ - b.n a6092 │ │ + b.n a609e │ │ lsls r0, r4, #5 │ │ subs r0, r0, r0 │ │ lsrs r6, r2, #32 │ │ - b.n a5ef6 │ │ + b.n a5f02 │ │ movs r1, r0 │ │ - b.n a627a │ │ + b.n a6286 │ │ movs r1, r0 │ │ - b.n a5dfe │ │ + b.n a5e0a │ │ asrs r0, r5, #32 │ │ - b.n a593c │ │ + b.n a5948 │ │ movs r1, r0 │ │ - b.n a60a6 │ │ + b.n a60b2 │ │ lsls r0, r4, #5 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n a641e │ │ + b.n a642a │ │ asrs r0, r0, #32 │ │ - b.n a5e26 │ │ + b.n a5e32 │ │ ands r5, r0 │ │ - b.n a6156 │ │ + b.n a6162 │ │ movs r0, r0 │ │ - b.n a60bc │ │ + b.n a60c8 │ │ str r2, [r1, r0] │ │ - b.n a615e │ │ + b.n a616a │ │ movs r2, r1 │ │ - b.n a6162 │ │ + b.n a616e │ │ asrs r0, r5, #32 │ │ - b.n a5940 │ │ + b.n a594c │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ subs r7, r7, #7 │ │ - b.n a644c │ │ + b.n a6458 │ │ lsrs r1, r0, #32 │ │ - b.n a6572 │ │ + b.n a657e │ │ movs r1, r0 │ │ - b.n a60e0 │ │ + b.n a60ec │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ lsls r5, r2, #3 │ │ - b.n a5e12 │ │ + b.n a5e1e │ │ asrs r5, r4, #24 │ │ - b.n a6182 │ │ + b.n a618e │ │ movs r1, r0 │ │ - b.n a6346 │ │ + b.n a6352 │ │ cmp r1, #2 │ │ - b.n a658a │ │ + b.n a6596 │ │ lsls r0, r2, #4 │ │ - b.n a5f52 │ │ + b.n a5f5e │ │ lsls r0, r3, #12 │ │ add.w r0, r0, r0 │ │ - b.n a6100 │ │ + b.n a610c │ │ lsls r2, r2, #5 │ │ subs r0, r0, r0 │ │ asrs r0, r6, #32 │ │ - b.n a5998 │ │ + b.n a59a4 │ │ movs r1, r0 │ │ - b.n a6472 │ │ + b.n a647e │ │ movs r0, #0 │ │ - b.n a5e68 │ │ + b.n a5e74 │ │ movs r0, #28 │ │ - b.n a5984 │ │ + b.n a5990 │ │ movs r0, r0 │ │ - b.n a6112 │ │ + b.n a611e │ │ movs r1, r0 │ │ - b.n a61b2 │ │ + b.n a61be │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ cmp r7, #255 @ 0xff │ │ - b.n a6498 │ │ + b.n a64a4 │ │ lsrs r1, r0, #32 │ │ - b.n a65be │ │ + b.n a65ca │ │ movs r2, r0 │ │ - b.n a6124 │ │ + b.n a6130 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ lsls r1, r2, #3 │ │ - b.n a5e5e │ │ + b.n a5e6a │ │ asrs r0, r6, #32 │ │ - b.n a59c8 │ │ + b.n a59d4 │ │ movs r1, r0 │ │ - b.n a6392 │ │ + b.n a639e │ │ cmp r1, #2 │ │ - b.n a65d6 │ │ + b.n a65e2 │ │ asrs r1, r4, #24 │ │ - b.n a61da │ │ + b.n a61e6 │ │ lsls r0, r2, #4 │ │ - b.n a5fa2 │ │ + b.n a5fae │ │ lsls r4, r0, #12 │ │ add.w r0, r0, r0, ror #4 │ │ - b.n a59e0 │ │ + b.n a59ec │ │ movs r0, r0 │ │ - b.n a614c │ │ + b.n a6158 │ │ lsls r3, r0, #5 │ │ subs r0, r0, r0 │ │ movs r4, r6 │ │ - b.n a59ec │ │ + b.n a59f8 │ │ lsls r0, r4, #16 │ │ - b.n a61f6 │ │ + b.n a6202 │ │ movs r2, r0 │ │ - b.n a655a │ │ + b.n a6566 │ │ lsls r5, r0, #5 │ │ ldr r2, [sp, #0] │ │ movs r4, r4 │ │ - b.n a59fc │ │ + b.n a5a08 │ │ movs r2, r0 │ │ - b.n a6566 │ │ + b.n a6572 │ │ lsls r0, r1, #5 │ │ ldr r2, [sp, #0] │ │ movs r7, r0 │ │ - b.n a617a │ │ + b.n a6186 │ │ lsls r4, r1, #5 │ │ subs r2, #0 │ │ movs r6, r0 │ │ - b.n a617e │ │ + b.n a618a │ │ asrs r4, r0, #32 │ │ - b.n a621a │ │ + b.n a6226 │ │ lsls r7, r1, #5 │ │ subs r2, #0 │ │ movs r4, r4 │ │ - b.n a5a1c │ │ + b.n a5a28 │ │ movs r0, r0 │ │ - b.n a6192 │ │ + b.n a619e │ │ lsls r2, r2, #5 │ │ subs r2, #0 │ │ strb r0, [r7, #0] │ │ - b.n a6408 │ │ + b.n a6414 │ │ movs r0, r3 │ │ - b.n a5a2c │ │ + b.n a5a38 │ │ movs r0, #20 │ │ - b.n a6636 │ │ + b.n a6642 │ │ asrs r7, r0, #32 │ │ - b.n a623a │ │ - ldmia r2!, {r3, r4, r6} │ │ + b.n a6246 │ │ + ldmia r2!, {r0, r3, r4, r6} │ │ add.w r0, r0, r0 │ │ - b.n a65a2 │ │ + b.n a65ae │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ movs r0, r4 │ │ - b.n a5a44 │ │ - add r0, pc, #176 @ (adr r0, a5fbc ) │ │ - b.n a5a48 │ │ + b.n a5a50 │ │ + add r0, pc, #176 @ (adr r0, a5fc8 ) │ │ + b.n a5a54 │ │ asrs r4, r2, #32 │ │ - b.n a5a4c │ │ + b.n a5a58 │ │ movs r4, r4 │ │ - b.n a5a36 │ │ + b.n a5a42 │ │ movs r0, r0 │ │ - b.n a61c6 │ │ + b.n a61d2 │ │ movs r0, r2 │ │ lsls r5, r3, #22 │ │ movs r0, r0 │ │ lsls r4, r2, #5 │ │ lsls r3, r7, #2 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n a65cc │ │ + b.n a65d8 │ │ movs r4, r1 │ │ lsrs r0, r0, #8 │ │ lsrs r5, r1, #11 │ │ orn r0, r7, #2490368 @ 0x260000 │ │ - b.n a6438 │ │ + b.n a6444 │ │ lsrs r5, r1, #11 │ │ orr.w r0, r1, #8388608 @ 0x800000 │ │ - b.n a5a6c │ │ + b.n a5a78 │ │ movs r0, r0 │ │ - b.n a5a44 │ │ + b.n a5a50 │ │ lsls r4, r0, #4 │ │ - b.n a5a78 │ │ + b.n a5a84 │ │ strh r4, [r3, #2] │ │ - b.n a5afc │ │ + b.n a5b08 │ │ asrs r4, r0, #32 │ │ - b.n a5a6e │ │ + b.n a5a7a │ │ asrs r4, r0, #32 │ │ - b.n a6654 │ │ + b.n a6660 │ │ asrs r4, r0, #32 │ │ - b.n a5a56 │ │ + b.n a5a62 │ │ movs r4, r2 │ │ @ instruction: 0xea00a02c │ │ - b.n a5a98 │ │ + b.n a5aa4 │ │ movs r2, r2 │ │ and.w sl, r0, sp, lsl #2 │ │ orn r0, r7, #851968 @ 0xd0000 │ │ - b.n a6484 │ │ + b.n a6490 │ │ adds r0, #20 │ │ - b.n a6472 │ │ + b.n a647e │ │ lsls r4, r0, #2 │ │ - b.n a5aa4 │ │ + b.n a5ab0 │ │ lsrs r5, r1, #10 │ │ orr.w r0, r3, #512 @ 0x200 │ │ - b.n a5aa8 │ │ + b.n a5ab4 │ │ asrs r4, r0, #32 │ │ - b.n a5ab0 │ │ + b.n a5abc │ │ strb r0, [r0, #0] │ │ - b.n a5a88 │ │ + b.n a5a94 │ │ adds r0, #128 @ 0x80 │ │ - b.n a6486 │ │ + b.n a6492 │ │ movs r1, r1 │ │ - b.n a62ca │ │ + b.n a62d6 │ │ lsls r6, r7, #24 │ │ add.w r0, r0, r0 │ │ - b.n a6632 │ │ + b.n a663e │ │ lsls r2, r3, #6 │ │ subs r0, r0, r0 │ │ strh r4, [r3, #2] │ │ - b.n a5b4c │ │ + b.n a5b58 │ │ lsls r4, r5, #1 │ │ - b.n a5ad8 │ │ + b.n a5ae4 │ │ asrs r0, r6, #1 │ │ - b.n a5adc │ │ + b.n a5ae8 │ │ lsrs r0, r2, #32 │ │ - b.n a62e6 │ │ + b.n a62f2 │ │ adds r1, r2, r0 │ │ - b.n a62ea │ │ + b.n a62f6 │ │ lsrs r4, r7, #27 │ │ - b.n a6340 │ │ + b.n a634c │ │ movs r4, r4 │ │ - b.n a5aec │ │ + b.n a5af8 │ │ asrs r0, r5, #32 │ │ - b.n a5af0 │ │ + b.n a5afc │ │ lsrs r0, r2, #32 │ │ - b.n a62fa │ │ + b.n a6306 │ │ lsls r0, r5, #3 │ │ - b.n a5ad0 │ │ + b.n a5adc │ │ movs r1, r0 │ │ - b.n a65d2 │ │ + b.n a65de │ │ movs r0, r0 │ │ - b.n a6268 │ │ + b.n a6274 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ ands r4, r3 │ │ - b.n a5b08 │ │ + b.n a5b14 │ │ cmp r7, #255 @ 0xff │ │ - b.n a65f0 │ │ + b.n a65fc │ │ adds r1, r0, r0 │ │ - b.n a6716 │ │ + b.n a6722 │ │ movs r2, r0 │ │ - b.n a6284 │ │ + b.n a6290 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ asrs r5, r2, #3 │ │ - b.n a5fb6 │ │ + b.n a5fc2 │ │ movs r6, #37 @ 0x25 │ │ - b.n a6326 │ │ + b.n a6332 │ │ asrs r1, r0, #32 │ │ - b.n a64ec │ │ + b.n a64f8 │ │ subs r1, #2 │ │ - b.n a672e │ │ + b.n a673a │ │ asrs r1, r2, #8 │ │ - b.n a60f8 │ │ + b.n a6104 │ │ movs r1, r0 │ │ and.w r0, r0, r5, lsl #4 │ │ - b.n a633a │ │ + b.n a6346 │ │ ands r4, r3 │ │ - b.n a5b38 │ │ + b.n a5b44 │ │ adds r1, r2, r0 │ │ - b.n a6342 │ │ + b.n a634e │ │ movs r0, r0 │ │ - b.n a62ae │ │ + b.n a62ba │ │ asrs r4, r6, #3 │ │ - b.n a5b1c │ │ + b.n a5b28 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ asrs r0, r6, #32 │ │ - b.n a5b4c │ │ + b.n a5b58 │ │ cmp r7, #255 @ 0xff │ │ - b.n a6634 │ │ + b.n a6640 │ │ lsrs r1, r0, #32 │ │ - b.n a675a │ │ + b.n a6766 │ │ movs r2, r0 │ │ - b.n a62c0 │ │ + b.n a62cc │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ lsls r1, r2, #3 │ │ - b.n a5ffa │ │ + b.n a6006 │ │ asrs r1, r4, #24 │ │ - b.n a636a │ │ + b.n a6376 │ │ movs r1, r0 │ │ - b.n a652e │ │ + b.n a653a │ │ cmp r1, #2 │ │ - b.n a6772 │ │ + b.n a677e │ │ lsls r0, r2, #4 │ │ - b.n a613a │ │ + b.n a6146 │ │ movs r0, r0 │ │ and.w r0, r0, r0, rrx │ │ - b.n a5b78 │ │ + b.n a5b84 │ │ lsrs r0, r2, #32 │ │ - b.n a6382 │ │ + b.n a638e │ │ ands r0, r0 │ │ - b.n a6786 │ │ + b.n a6792 │ │ lsls r0, r7, #3 │ │ - b.n a5b5c │ │ + b.n a5b68 │ │ movs r0, r0 │ │ - b.n a6702 │ │ + b.n a670e │ │ lsls r0, r4, #1 │ │ subs r0, r0, r0 │ │ lsls r1, r4, #1 │ │ and.w r8, r0, r1 │ │ - b.n a679a │ │ + b.n a67a6 │ │ lsls r0, r2, #16 │ │ - b.n a639e │ │ + b.n a63aa │ │ lsls r4, r6, #3 │ │ - b.n a5b74 │ │ + b.n a5b80 │ │ lsls r7, r6, #16 │ │ - b.n a63a6 │ │ + b.n a63b2 │ │ lsls r2, r2, #10 │ │ add.w r0, r0, r5, lsl #4 │ │ - b.n a606e │ │ + b.n a607a │ │ movs r5, r0 │ │ - b.n a6314 │ │ + b.n a6320 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ subs r7, r7, #7 │ │ - b.n a6698 │ │ + b.n a66a4 │ │ movs r1, r0 │ │ - b.n a631e │ │ + b.n a632a │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ asrs r0, r2, #3 │ │ - b.n a605a │ │ + b.n a6066 │ │ lsls r0, r4, #24 │ │ - b.n a63ca │ │ + b.n a63d6 │ │ asrs r1, r0, #32 │ │ - b.n a6590 │ │ + b.n a659c │ │ cmp r1, #2 │ │ - b.n a67d2 │ │ + b.n a67de │ │ movs r1, r2 │ │ - b.n a619a │ │ + b.n a61a6 │ │ movs r0, r0 │ │ and.w r8, r0, r1 │ │ - b.n a67de │ │ + b.n a67ea │ │ lsls r0, r2, #16 │ │ - b.n a63e2 │ │ + b.n a63ee │ │ lsls r0, r7, #3 │ │ - b.n a5bb8 │ │ + b.n a5bc4 │ │ movs r1, r1 │ │ - b.n a63ea │ │ - bf 1c, ac8aa │ │ + b.n a63f6 │ │ + bf 1c, ac8b6 │ │ lsrs r0, r5 │ │ - b.n a5be4 │ │ + b.n a5bf0 │ │ lsls r4, r4, #16 │ │ - b.n a63f6 │ │ + b.n a6402 │ │ movs r2, r0 │ │ - b.n a675a │ │ + b.n a6766 │ │ lsls r3, r4, #3 │ │ ldr r2, [sp, #0] │ │ movs r4, r0 │ │ - b.n a6402 │ │ + b.n a640e │ │ asrs r6, r0, #32 │ │ - b.n a6406 │ │ - bkpt 0x0089 │ │ + b.n a6412 │ │ + bkpt 0x008a │ │ add.w r0, r0, r2 │ │ - b.n a676e │ │ + b.n a677a │ │ lsls r4, r4, #3 │ │ ldr r2, [sp, #0] │ │ mov r8, r2 │ │ - b.n a6196 │ │ + b.n a61a2 │ │ movs r0, r0 │ │ - b.n a677a │ │ + b.n a6786 │ │ lsls r7, r4, #3 │ │ subs r0, r0, r0 │ │ lsls r0, r7, #21 │ │ - b.n a5c20 │ │ + b.n a5c2c │ │ movs r0, r0 │ │ - b.n a6204 │ │ + b.n a6210 │ │ strh r0, [r2, #2] │ │ - b.n a5c0a │ │ + b.n a5c16 │ │ movs r4, r0 │ │ - b.n a642e │ │ + b.n a643a │ │ asrs r0, r1, #32 │ │ - b.n a6432 │ │ + b.n a643e │ │ pop {r1, r2, r6, pc} │ │ @ instruction: 0xfa000000 │ │ - b.n a679c │ │ + b.n a67a8 │ │ lsls r5, r4, #3 │ │ subs r0, r0, r0 │ │ str r4, [r5, r3] │ │ - b.n a5c34 │ │ + b.n a5c40 │ │ lsls r7, r7, #17 │ │ - b.n a67b0 │ │ + b.n a67bc │ │ lsls r0, r5, #3 │ │ ldrh r0, [r0, #16] │ │ movs r5, r0 │ │ - b.n a644e │ │ + b.n a645a │ │ asrs r6, r0, #32 │ │ - b.n a6452 │ │ + b.n a645e │ │ pop {r1, r2, r3, r4, r5, pc} │ │ @ instruction: 0xfa000000 │ │ - b.n a67bc │ │ + b.n a67c8 │ │ lsls r1, r5, #3 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n a6462 │ │ + b.n a646e │ │ asrs r0, r1, #32 │ │ - b.n a6466 │ │ + b.n a6472 │ │ pop {r0, r3, r4, r5, pc} │ │ @ instruction: 0xfa000000 │ │ - b.n a67d0 │ │ + b.n a67dc │ │ lsls r2, r5, #3 │ │ subs r0, r0, r0 │ │ strb r0, [r6, #3] │ │ - b.n a5c68 │ │ + b.n a5c74 │ │ movs r4, r0 │ │ - b.n a63e8 │ │ + b.n a63f4 │ │ lsls r5, r5, #3 │ │ subs r2, #0 │ │ movs r5, r0 │ │ - b.n a63f0 │ │ + b.n a63fc │ │ lsls r1, r6, #3 │ │ ldrh r0, [r0, #16] │ │ movs r7, r0 │ │ - b.n a648a │ │ + b.n a6496 │ │ asrs r6, r0, #32 │ │ - b.n a648e │ │ + b.n a649a │ │ pop {r0, r1, r2, r3, r5, pc} │ │ @ instruction: 0xfa000000 │ │ - b.n a67f8 │ │ + b.n a6804 │ │ lsls r2, r6, #3 │ │ subs r0, r0, r0 │ │ movs r7, r0 │ │ - b.n a649e │ │ + b.n a64aa │ │ asrs r0, r1, #32 │ │ - b.n a64a2 │ │ + b.n a64ae │ │ pop {r1, r3, r5, pc} │ │ @ instruction: 0xfa000000 │ │ - b.n a680c │ │ + b.n a6818 │ │ lsls r3, r6, #3 │ │ subs r0, r0, r0 │ │ str r4, [r6, r3] │ │ - b.n a5ca4 │ │ + b.n a5cb0 │ │ asrs r6, r0, #32 │ │ - b.n a64b6 │ │ + b.n a64c2 │ │ movs r5, r0 │ │ - b.n a64ba │ │ + b.n a64c6 │ │ pop {r2, r5, pc} │ │ @ instruction: 0xfa000000 │ │ - b.n a6824 │ │ + b.n a6830 │ │ lsls r3, r6, #3 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n a64ca │ │ + b.n a64d6 │ │ asrs r0, r1, #32 │ │ - b.n a64ce │ │ + b.n a64da │ │ pop {r0, r1, r2, r3, r4, pc} │ │ @ instruction: 0xfa000000 │ │ - b.n a6838 │ │ + b.n a6844 │ │ lsls r4, r6, #3 │ │ subs r0, r0, r0 │ │ str r0, [r7, r3] │ │ - b.n a5cd0 │ │ + b.n a5cdc │ │ asrs r6, r0, #32 │ │ - b.n a64e2 │ │ + b.n a64ee │ │ movs r5, r0 │ │ - b.n a64e6 │ │ + b.n a64f2 │ │ pop {r0, r3, r4, pc} │ │ @ instruction: 0xfa000000 │ │ - b.n a6850 │ │ + b.n a685c │ │ lsls r4, r6, #3 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n a64f6 │ │ + b.n a6502 │ │ asrs r0, r1, #32 │ │ - b.n a64fa │ │ + b.n a6506 │ │ pop {r2, r4, pc} │ │ @ instruction: 0xfa00502c │ │ - b.n a5cfc │ │ + b.n a5d08 │ │ ands r0, r0 │ │ - b.n a6906 │ │ + b.n a6912 │ │ movs r0, r0 │ │ - b.n a686c │ │ + b.n a6878 │ │ lsls r3, r6, #3 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n a687c │ │ + b.n a6888 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r1, r1 │ │ - b.n a651a │ │ - bpl.n a62c6 │ │ + b.n a6526 │ │ + bpl.n a62d2 │ │ @ instruction: 0xebff5000 │ │ - b.n a6922 │ │ + b.n a692e │ │ movs r0, r0 │ │ - b.n a688e │ │ + b.n a689a │ │ lsls r6, r7, #3 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n a652e │ │ - beq.n a6228 │ │ - b.n a6688 │ │ + b.n a653a │ │ + beq.n a6234 │ │ + b.n a6694 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, lr} │ │ - b.n a653a │ │ + b.n a6546 │ │ lsls r7, r5, #7 │ │ @ instruction: 0xeb00c004 │ │ - b.n a6542 │ │ - add r0, pc, #0 @ (adr r0, a6204 ) │ │ - b.n a6546 │ │ + b.n a654e │ │ + add r0, pc, #0 @ (adr r0, a6210 ) │ │ + b.n a6552 │ │ ldc2l 10, cr14, [r9, #1020] @ 0x3fc @ │ │ lsls r3, r5, #7 │ │ @ instruction: 0xeb00c008 │ │ - b.n a6552 │ │ + b.n a655e │ │ ldc2l 10, cr14, [fp, #-1020]! @ 0xfffffc04 @ │ │ movs r1, r1 │ │ - b.n a655a │ │ + b.n a6566 │ │ asrs r6, r0, #32 │ │ - b.n a655e │ │ + b.n a656a │ │ movs r0, #4 │ │ - b.n a6562 │ │ + b.n a656e │ │ adds r0, #2 │ │ - b.n a6966 │ │ + b.n a6972 │ │ lsls r4, r4, #11 │ │ add.w r0, r0, r0 │ │ - b.n a68ce │ │ + b.n a68da │ │ lsls r3, r6, #3 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #4 │ │ - b.n a5d68 │ │ + b.n a5d74 │ │ vpmin.u q7, q13, │ │ movs r1, r0 │ │ - b.n a68f2 │ │ + b.n a68fe │ │ movs r1, r1 │ │ add r2, sp, #0 │ │ lsls r5, r3, #7 │ │ @ instruction: 0xeb00c000 │ │ - b.n a658a │ │ + b.n a6596 │ │ ldc2l 10, cr14, [r6, #1020] @ 0x3fc @ │ │ movs r1, r1 │ │ - b.n a6592 │ │ + b.n a659e │ │ asrs r6, r0, #32 │ │ - b.n a6596 │ │ + b.n a65a2 │ │ ands r4, r1 │ │ - b.n a659a │ │ + b.n a65a6 │ │ vmov.s8 lr, d18[3] │ │ asrs r4, r6, #32 │ │ - b.n a5d9c │ │ + b.n a5da8 │ │ stmia r0!, {r2} │ │ - b.n a65a6 │ │ + b.n a65b2 │ │ mrc2 10, 2, lr, cr9, cr15, {7} @ │ │ lsls r3, r2, #7 │ │ add.w pc, r0, r0, asr #2 │ │ - b.n a6372 │ │ + b.n a637e │ │ lsls r0, r0, #3 │ │ - b.n a652a │ │ + b.n a6536 │ │ @ instruction: 0xfff1aaff │ │ lsrs r2, r5, #14 │ │ - b.n a65be │ │ + b.n a65ca │ │ stmia r4!, {r0, r1, r2, r3, r4, r5, r6} │ │ - b.n a69c2 │ │ + b.n a69ce │ │ lsls r6, r7, #1 │ │ - b.n a6926 │ │ + b.n a6932 │ │ stc2l 10, cr8, [r7, #1020] @ 0x3fc @ │ │ lsls r2, r5, #2 │ │ - b.n a63a2 │ │ + b.n a63ae │ │ lsls r7, r7, #21 │ │ - b.n a6946 │ │ + b.n a6952 │ │ lsls r2, r1, #2 │ │ adds r1, #160 @ 0xa0 │ │ asrs r6, r7, #19 │ │ - b.n a6a5a │ │ + b.n a6a66 │ │ movs r1, r0 │ │ - b.n a639e │ │ + b.n a63aa │ │ stmia r4!, {r1, r2, r3, r4, r5, r6, r7} │ │ - b.n a66a2 │ │ + b.n a66ae │ │ lsls r7, r7, #17 │ │ - b.n a695e │ │ + b.n a696a │ │ stmia r4!, {r0, r1, r2, r3, r4, r5, r6} │ │ movs r3, #160 @ 0xa0 │ │ ldc2 10, cr14, [lr, #1020]! @ 0x3fc @ │ │ str r6, [r2, r0] │ │ - b.n a69f2 │ │ + b.n a69fe │ │ asrs r4, r1, #14 │ │ - b.n a5df4 │ │ + b.n a5e00 │ │ movs r5, r0 │ │ - b.n a65fa │ │ + b.n a6606 │ │ movs r3, #173 @ 0xad │ │ - b.n a68be │ │ + b.n a68ca │ │ asrs r1, r0, #32 │ │ - b.n a63e0 │ │ - cmp r7, #250 @ 0xfa │ │ + b.n a63ec │ │ + cmp r7, #251 @ 0xfb │ │ @ instruction: 0xeb00ffc7 │ │ @ instruction: 0xeaff1378 │ │ - b.n a5e0c │ │ + b.n a5e18 │ │ movs r5, r1 │ │ - b.n a6a12 │ │ + b.n a6a1e │ │ movs r3, #189 @ 0xbd │ │ - b.n a68d6 │ │ + b.n a68e2 │ │ str r5, [r1, r0] │ │ - b.n a6a1a │ │ + b.n a6a26 │ │ asrs r1, r0, #32 │ │ - b.n a63fc │ │ + b.n a6408 │ │ @ instruction: 0xfff7eaff │ │ asrs r0, r5, #13 │ │ - b.n a5e24 │ │ + b.n a5e30 │ │ movs r5, r0 │ │ - b.n a662a │ │ + b.n a6636 │ │ cmp r7, #250 @ 0xfa │ │ - b.n a6a2e │ │ + b.n a6a3a │ │ asrs r1, r0, #32 │ │ - b.n a6410 │ │ + b.n a641c │ │ @ instruction: 0xfff2eaff │ │ asrs r4, r0, #14 │ │ - b.n a5e38 │ │ + b.n a5e44 │ │ movs r3, #194 @ 0xc2 │ │ - b.n a68fe │ │ + b.n a690a │ │ str r0, [r0, r0] │ │ - b.n a6642 │ │ + b.n a664e │ │ asrs r1, r0, #32 │ │ - b.n a6424 │ │ + b.n a6430 │ │ @ instruction: 0xffedeaff │ │ lsrs r3, r0, #16 │ │ - b.n a6816 │ │ + b.n a6822 │ │ lsls r6, r0, #4 │ │ - b.n a65b2 │ │ + b.n a65be │ │ lsls r6, r0, #4 │ │ str r1, [sp, #640] @ 0x280 │ │ movs r0, r0 │ │ - b.n a65be │ │ + b.n a65ca │ │ lsls r2, r7, #2 │ │ subs r2, #0 │ │ stmia r0!, {r2} │ │ - b.n a63a6 │ │ + b.n a63b2 │ │ movs r0, #2 │ │ - b.n a6436 │ │ + b.n a6442 │ │ movs r1, r0 │ │ - b.n a65ce │ │ + b.n a65da │ │ asrs r2, r0, #32 │ │ adds r1, #160 @ 0xa0 │ │ lsls r7, r7, #17 │ │ - b.n a69ea │ │ + b.n a69f6 │ │ movs r0, #12 │ │ - b.n a6676 │ │ + b.n a6682 │ │ stc2l 10, cr9, [r5, #1020] @ 0x3fc @ │ │ @ instruction: 0xfff5eaff │ │ lsrs r4, r5, #4 │ │ - b.n a6952 │ │ + b.n a695e │ │ stc2l 10, cr14, [r6, #-1020]! @ 0xfffffc04 @ │ │ lsls r0, r5, #14 │ │ - b.n a5e88 │ │ + b.n a5e94 │ │ movs r4, #162 @ 0xa2 │ │ - b.n a694e │ │ + b.n a695a │ │ asrs r4, r4, #14 │ │ - b.n a5e90 │ │ + b.n a5e9c │ │ movs r0, r0 │ │ - b.n a6474 │ │ + b.n a6480 │ │ asrs r1, r0, #32 │ │ - b.n a6478 │ │ - bcs.n a62a8 │ │ + b.n a6484 │ │ + bcs.n a62b4 │ │ @ instruction: 0xebff0398 │ │ - b.n a5ea0 │ │ + b.n a5eac │ │ movs r4, #203 @ 0xcb │ │ - b.n a6966 │ │ + b.n a6972 │ │ asrs r4, r2, #14 │ │ - b.n a5ea8 │ │ + b.n a5eb4 │ │ movs r0, r0 │ │ - b.n a648c │ │ + b.n a6498 │ │ asrs r1, r0, #32 │ │ - b.n a6490 │ │ - bcs.n a62b4 │ │ + b.n a649c │ │ + bcs.n a62c0 │ │ @ instruction: 0xebff0388 │ │ - b.n a5eb8 │ │ + b.n a5ec4 │ │ movs r4, #204 @ 0xcc │ │ - b.n a697e │ │ + b.n a698a │ │ asrs r4, r0, #14 │ │ - b.n a5ec0 │ │ + b.n a5ecc │ │ movs r0, r0 │ │ - b.n a64a4 │ │ + b.n a64b0 │ │ asrs r1, r0, #32 │ │ - b.n a64a8 │ │ - bcs.n a62c0 │ │ + b.n a64b4 │ │ + bcs.n a62cc │ │ @ instruction: 0xebff0378 │ │ - b.n a5ed0 │ │ + b.n a5edc │ │ movs r4, #205 @ 0xcd │ │ - b.n a6996 │ │ + b.n a69a2 │ │ asrs r4, r6, #13 │ │ - b.n a5ed8 │ │ + b.n a5ee4 │ │ movs r0, r0 │ │ - b.n a64bc │ │ + b.n a64c8 │ │ asrs r1, r0, #32 │ │ - b.n a64c0 │ │ - bcs.n a62cc │ │ + b.n a64cc │ │ + bcs.n a62d8 │ │ @ instruction: 0xebff0368 │ │ - b.n a5ee8 │ │ + b.n a5ef4 │ │ movs r4, #206 @ 0xce │ │ - b.n a69ae │ │ + b.n a69ba │ │ asrs r4, r4, #13 │ │ - b.n a5ef0 │ │ + b.n a5efc │ │ movs r0, r0 │ │ - b.n a64d4 │ │ + b.n a64e0 │ │ asrs r1, r0, #32 │ │ - b.n a64d8 │ │ - bcs.n a62d8 │ │ + b.n a64e4 │ │ + bcs.n a62e4 │ │ @ instruction: 0xebff0358 │ │ - b.n a5f00 │ │ + b.n a5f0c │ │ movs r4, #207 @ 0xcf │ │ - b.n a69c6 │ │ + b.n a69d2 │ │ asrs r4, r2, #13 │ │ - b.n a5f08 │ │ + b.n a5f14 │ │ movs r0, r0 │ │ - b.n a64ec │ │ + b.n a64f8 │ │ asrs r1, r0, #32 │ │ - b.n a64f0 │ │ - bcs.n a62e4 │ │ + b.n a64fc │ │ + bcs.n a62f0 │ │ @ instruction: 0xebff0348 │ │ - b.n a5f18 │ │ + b.n a5f24 │ │ movs r4, #209 @ 0xd1 │ │ - b.n a69de │ │ + b.n a69ea │ │ asrs r4, r0, #13 │ │ - b.n a5f20 │ │ + b.n a5f2c │ │ movs r0, r0 │ │ - b.n a6504 │ │ + b.n a6510 │ │ asrs r1, r0, #32 │ │ - b.n a6508 │ │ - bcs.n a62f0 │ │ + b.n a6514 │ │ + bcs.n a62fc │ │ @ instruction: 0xebff0338 │ │ - b.n a5f30 │ │ + b.n a5f3c │ │ movs r4, #210 @ 0xd2 │ │ - b.n a69f6 │ │ + b.n a6a02 │ │ asrs r4, r6, #12 │ │ - b.n a5f38 │ │ + b.n a5f44 │ │ movs r0, r0 │ │ - b.n a651c │ │ + b.n a6528 │ │ asrs r1, r0, #32 │ │ - b.n a6520 │ │ - bcs.n a64fc │ │ + b.n a652c │ │ + bcs.n a6508 │ │ @ instruction: 0xebff0328 │ │ - b.n a5f48 │ │ + b.n a5f54 │ │ movs r4, #213 @ 0xd5 │ │ - b.n a6a0e │ │ + b.n a6a1a │ │ asrs r4, r4, #12 │ │ - b.n a5f50 │ │ + b.n a5f5c │ │ movs r0, r0 │ │ - b.n a6534 │ │ + b.n a6540 │ │ asrs r1, r0, #32 │ │ - b.n a6538 │ │ - bcs.n a6508 │ │ + b.n a6544 │ │ + bcs.n a6514 │ │ @ instruction: 0xebff0318 │ │ - b.n a5f60 │ │ + b.n a5f6c │ │ movs r4, #214 @ 0xd6 │ │ - b.n a6a26 │ │ + b.n a6a32 │ │ asrs r4, r2, #12 │ │ - b.n a5f68 │ │ + b.n a5f74 │ │ movs r0, r0 │ │ - b.n a654c │ │ + b.n a6558 │ │ asrs r1, r0, #32 │ │ - b.n a6550 │ │ - bcs.n a6514 │ │ + b.n a655c │ │ + bcs.n a6520 │ │ @ instruction: 0xebff0308 │ │ - b.n a5f78 │ │ + b.n a5f84 │ │ movs r4, #215 @ 0xd7 │ │ - b.n a6a3e │ │ + b.n a6a4a │ │ asrs r4, r0, #12 │ │ - b.n a5f80 │ │ + b.n a5f8c │ │ movs r0, r0 │ │ - b.n a6564 │ │ + b.n a6570 │ │ asrs r1, r0, #32 │ │ - b.n a6568 │ │ - bcs.n a6520 │ │ + b.n a6574 │ │ + bcs.n a652c │ │ @ instruction: 0xebff0230 │ │ - b.n a5f90 │ │ + b.n a5f9c │ │ movs r4, #139 @ 0x8b │ │ - b.n a6a56 │ │ + b.n a6a62 │ │ asrs r4, r5, #8 │ │ - b.n a5f98 │ │ + b.n a5fa4 │ │ movs r0, r0 │ │ - b.n a657c │ │ + b.n a6588 │ │ asrs r1, r0, #32 │ │ - b.n a6580 │ │ - bcs.n a652c │ │ + b.n a658c │ │ + bcs.n a6538 │ │ @ instruction: 0xebff0220 │ │ - b.n a5fa8 │ │ + b.n a5fb4 │ │ movs r4, #140 @ 0x8c │ │ - b.n a6a6e │ │ + b.n a6a7a │ │ asrs r4, r3, #8 │ │ - b.n a5fb0 │ │ + b.n a5fbc │ │ movs r0, r0 │ │ - b.n a6594 │ │ + b.n a65a0 │ │ asrs r1, r0, #32 │ │ - b.n a6598 │ │ - bcs.n a6538 │ │ + b.n a65a4 │ │ + bcs.n a6544 │ │ @ instruction: 0xebff0210 │ │ - b.n a5fc0 │ │ + b.n a5fcc │ │ movs r4, #141 @ 0x8d │ │ - b.n a6a86 │ │ + b.n a6a92 │ │ asrs r4, r1, #8 │ │ - b.n a5fc8 │ │ + b.n a5fd4 │ │ movs r0, r0 │ │ - b.n a65ac │ │ + b.n a65b8 │ │ asrs r1, r0, #32 │ │ - b.n a65b0 │ │ - bcs.n a6544 │ │ + b.n a65bc │ │ + bcs.n a6550 │ │ @ instruction: 0xebff0200 │ │ - b.n a5fd8 │ │ + b.n a5fe4 │ │ movs r4, #142 @ 0x8e │ │ - b.n a6a9e │ │ + b.n a6aaa │ │ asrs r4, r7, #7 │ │ - b.n a5fe0 │ │ + b.n a5fec │ │ movs r0, r0 │ │ - b.n a65c4 │ │ + b.n a65d0 │ │ asrs r1, r0, #32 │ │ - b.n a65c8 │ │ - bcs.n a6550 │ │ + b.n a65d4 │ │ + bcs.n a655c │ │ @ instruction: 0xebff01f0 │ │ - b.n a5ff0 │ │ + b.n a5ffc │ │ cmp r6, #73 @ 0x49 │ │ - b.n a6bf6 │ │ + b.n a6c02 │ │ asrs r4, r5, #7 │ │ - b.n a5ff8 │ │ + b.n a6004 │ │ movs r0, r0 │ │ - b.n a65dc │ │ + b.n a65e8 │ │ asrs r1, r0, #32 │ │ - b.n a65e0 │ │ - bcs.n a655c │ │ + b.n a65ec │ │ + bcs.n a6568 │ │ @ instruction: 0xebff01e0 │ │ - b.n a6008 │ │ + b.n a6014 │ │ movs r4, #146 @ 0x92 │ │ - b.n a6ace │ │ + b.n a6ada │ │ asrs r4, r3, #7 │ │ - b.n a6010 │ │ + b.n a601c │ │ movs r0, r0 │ │ - b.n a65f4 │ │ + b.n a6600 │ │ asrs r1, r0, #32 │ │ - b.n a65f8 │ │ - bcs.n a6568 │ │ + b.n a6604 │ │ + bcs.n a6574 │ │ @ instruction: 0xebff01d0 │ │ - b.n a6020 │ │ + b.n a602c │ │ movs r4, #147 @ 0x93 │ │ - b.n a6ae6 │ │ + b.n a6af2 │ │ asrs r4, r1, #7 │ │ - b.n a6028 │ │ + b.n a6034 │ │ movs r0, r0 │ │ - b.n a660c │ │ + b.n a6618 │ │ asrs r1, r0, #32 │ │ - b.n a6610 │ │ - bcs.n a6574 │ │ + b.n a661c │ │ + bcs.n a6580 │ │ @ instruction: 0xebff01c0 │ │ - b.n a6038 │ │ + b.n a6044 │ │ movs r4, #149 @ 0x95 │ │ - b.n a6afe │ │ + b.n a6b0a │ │ asrs r4, r7, #6 │ │ - b.n a6040 │ │ + b.n a604c │ │ movs r0, r0 │ │ - b.n a6624 │ │ + b.n a6630 │ │ asrs r1, r0, #32 │ │ - b.n a6628 │ │ - bcs.n a6580 │ │ + b.n a6634 │ │ + bcs.n a658c │ │ @ instruction: 0xebff01b0 │ │ - b.n a6050 │ │ + b.n a605c │ │ movs r4, #150 @ 0x96 │ │ - b.n a6b16 │ │ + b.n a6b22 │ │ asrs r4, r5, #6 │ │ - b.n a6058 │ │ + b.n a6064 │ │ movs r0, r0 │ │ - b.n a663c │ │ + b.n a6648 │ │ asrs r1, r0, #32 │ │ - b.n a6640 │ │ - bcs.n a658c │ │ + b.n a664c │ │ + bcs.n a6598 │ │ @ instruction: 0xebff01a0 │ │ - b.n a6068 │ │ + b.n a6074 │ │ movs r4, #151 @ 0x97 │ │ - b.n a6b2e │ │ + b.n a6b3a │ │ asrs r4, r3, #6 │ │ - b.n a6070 │ │ + b.n a607c │ │ movs r0, r0 │ │ - b.n a6654 │ │ + b.n a6660 │ │ asrs r1, r0, #32 │ │ - b.n a6658 │ │ - bcs.n a6598 │ │ + b.n a6664 │ │ + bcs.n a65a4 │ │ @ instruction: 0xebff0190 │ │ - b.n a6080 │ │ + b.n a608c │ │ movs r4, #152 @ 0x98 │ │ - b.n a6b46 │ │ + b.n a6b52 │ │ asrs r4, r1, #6 │ │ - b.n a6088 │ │ + b.n a6094 │ │ movs r0, r0 │ │ - b.n a666c │ │ + b.n a6678 │ │ asrs r1, r0, #32 │ │ - b.n a6670 │ │ - bcs.n a65a4 │ │ + b.n a667c │ │ + bcs.n a65b0 │ │ @ instruction: 0xebff0180 │ │ - b.n a6098 │ │ + b.n a60a4 │ │ movs r4, #154 @ 0x9a │ │ - b.n a6b5e │ │ + b.n a6b6a │ │ asrs r4, r7, #5 │ │ - b.n a60a0 │ │ + b.n a60ac │ │ movs r0, r0 │ │ - b.n a6684 │ │ + b.n a6690 │ │ asrs r1, r0, #32 │ │ - b.n a6688 │ │ - bcs.n a65b0 │ │ + b.n a6694 │ │ + bcs.n a65bc │ │ @ instruction: 0xebff0170 │ │ - b.n a60b0 │ │ + b.n a60bc │ │ movs r4, #155 @ 0x9b │ │ - b.n a6b76 │ │ + b.n a6b82 │ │ asrs r4, r5, #5 │ │ - b.n a60b8 │ │ + b.n a60c4 │ │ movs r0, r0 │ │ - b.n a669c │ │ + b.n a66a8 │ │ asrs r1, r0, #32 │ │ - b.n a66a0 │ │ - bcs.n a65bc │ │ + b.n a66ac │ │ + bcs.n a65c8 │ │ @ instruction: 0xebff0160 │ │ - b.n a60c8 │ │ + b.n a60d4 │ │ movs r4, #156 @ 0x9c │ │ - b.n a6b8e │ │ + b.n a6b9a │ │ asrs r4, r3, #5 │ │ - b.n a60d0 │ │ + b.n a60dc │ │ movs r0, r0 │ │ - b.n a66b4 │ │ + b.n a66c0 │ │ asrs r1, r0, #32 │ │ - b.n a66b8 │ │ - bcs.n a65c8 │ │ + b.n a66c4 │ │ + bcs.n a65d4 │ │ @ instruction: 0xebff00bc │ │ - b.n a60e0 │ │ + b.n a60ec │ │ movs r4, #157 @ 0x9d │ │ - b.n a6ba6 │ │ + b.n a6bb2 │ │ asrs r0, r7, #2 │ │ - b.n a60e8 │ │ + b.n a60f4 │ │ movs r0, r0 │ │ - b.n a66cc │ │ + b.n a66d8 │ │ asrs r1, r0, #32 │ │ - b.n a66d0 │ │ - bcs.n a65d4 │ │ + b.n a66dc │ │ + bcs.n a65e0 │ │ @ instruction: 0xebff00ac │ │ - b.n a60f8 │ │ + b.n a6104 │ │ movs r0, r0 │ │ - b.n a66dc │ │ + b.n a66e8 │ │ lsls r2, r3, #1 │ │ - b.n a6162 │ │ + b.n a616e │ │ movs r0, r0 │ │ - b.n a6c66 │ │ + b.n a6c72 │ │ movs r1, r2 │ │ subs r0, r0, r0 │ │ lsls r5, r6, #30 │ │ - b.n a6bde │ │ + b.n a6bea │ │ lsrs r7, r7, #31 │ │ - b.n a6c70 │ │ + b.n a6c7c │ │ strh r7, [r0, #0] │ │ - b.n a6ad6 │ │ + b.n a6ae2 │ │ movs r4, r5 │ │ - b.n a6114 │ │ + b.n a6120 │ │ ands r0, r1 │ │ - b.n a691e │ │ + b.n a692a │ │ movs r0, r0 │ │ - b.n a6c82 │ │ + b.n a6c8e │ │ mrc2 10, 7, r1, cr11, cr15, {7} @ │ │ asrs r0, r2, #2 │ │ - b.n a6128 │ │ + b.n a6134 │ │ movs r4, r0 │ │ - b.n a692e │ │ + b.n a693a │ │ movs r5, #24 │ │ - b.n a6bf2 │ │ + b.n a6bfe │ │ asrs r1, r0, #32 │ │ - b.n a6714 │ │ - cmp r7, #45 @ 0x2d │ │ + b.n a6720 │ │ + cmp r7, #46 @ 0x2e │ │ add.w r0, r0, r4, lsl #20 │ │ - b.n a693e │ │ + b.n a694a │ │ mrc2 10, 7, lr, cr9, cr15, {7} @ │ │ ands r0, r0 │ │ - b.n a6946 │ │ + b.n a6952 │ │ mcr2 10, 4, lr, cr15, cr15, {7} @ │ │ str r4, [r5, r0] │ │ - b.n a6148 │ │ + b.n a6154 │ │ ldc2 10, cr14, [sp], {255} @ 0xff @ │ │ lsls r5, r6, #30 │ │ - b.n a6c26 │ │ + b.n a6c32 │ │ asrs r0, r2, #1 │ │ - b.n a6158 │ │ + b.n a6164 │ │ adds r0, #80 @ 0x50 │ │ - b.n a615c │ │ + b.n a6168 │ │ lsrs r7, r7, #31 │ │ - b.n a6cc0 │ │ + b.n a6ccc │ │ movs r7, r0 │ │ - b.n a6b26 │ │ + b.n a6b32 │ │ asrs r1, r0, #32 │ │ - b.n a6748 │ │ + b.n a6754 │ │ adds r0, #3 │ │ - b.n a674c │ │ + b.n a6758 │ │ movs r0, r0 │ │ - b.n a614c │ │ + b.n a6158 │ │ strh r0, [r0, #0] │ │ - b.n a6976 │ │ + b.n a6982 │ │ movs r1, r0 │ │ - b.n a6d7a │ │ + b.n a6d86 │ │ movs r4, #181 @ 0xb5 │ │ - b.n a6c3e │ │ - bcs.n a6632 │ │ + b.n a6c4a │ │ + bcs.n a663e │ │ @ instruction: 0xebffffe3 │ │ - @ instruction: 0xeaff5fce │ │ - @ instruction: 0xfff65fb2 │ │ - vuzp.16 d25, d24 │ │ + @ instruction: 0xeaff5fdd │ │ + vqrdmlsh.s , q11, d1[0] │ │ + vsra.u32 d25, d28, #10 │ │ movs r3, r0 │ │ - ldrsh r6, [r3, r6] │ │ - vtrn.16 d25, d8 │ │ + ldrsh r5, [r5, r6] │ │ + vshr.u64 d25, d12, #10 │ │ movs r3, r0 │ │ - ldrh r4, [r7, #48] @ 0x30 │ │ + ldrh r0, [r2, #50] @ 0x32 │ │ movs r3, r0 │ │ - strh r0, [r5, #58] @ 0x3a │ │ + strh r4, [r7, #58] @ 0x3a │ │ movs r3, r0 │ │ - ldrb r4, [r0, #27] │ │ - @ instruction: 0xfff65cde │ │ - vrshr.u64 d24, d0, #10 │ │ + strh r2, [r2, #4] │ │ + vqdmulh.s , q11, d29[0] │ │ + vqmovn.s32 d24, q10 │ │ movs r3, r0 │ │ - ldrb r6, [r4, r1] │ │ - vsli.32 d23, d26, #22 │ │ - @ instruction: 0xfff68bf8 │ │ + ldrb r5, [r6, r1] │ │ + vcvt.f16.f32 d23, q9 │ │ + vdup.16 d24, d12[1] │ │ movs r3, r0 │ │ - ldrh r4, [r4, #20] │ │ + ldrh r0, [r7, #20] │ │ movs r3, r0 │ │ - ldrb r2, [r3, r2] │ │ - @ instruction: 0xfff65f8a │ │ - vtbx.8 d20, {d6}, d3 │ │ - @ instruction: 0xfff65e2e │ │ - vsra.u32 d18, d13, #10 │ │ - vcvt.f32.u32 d21, d6, #10 │ │ - @ instruction: 0xfff67bd3 │ │ - @ instruction: 0xfff65dfe │ │ - vuzp.16 d18, d24 │ │ - vqrdmulh.s , q11, d22[0] │ │ - vcvt.bf16.f32 d25, q15 │ │ - vqrdmulh.s , q11, d14[0] │ │ - @ instruction: 0xfff65dd0 │ │ - @ instruction: 0xfff65db6 │ │ - vshll.u32 , d8, #22 │ │ - @ instruction: 0xfff65d9e │ │ - vcvt.f16.u16 d20, d0, #10 │ │ - @ instruction: 0xfff65d86 │ │ - vtbl.8 d24, {d6-d8}, d15 │ │ - vqrdmulh.s , q3, d30[0] │ │ - vtbl.8 d24, {d6-d8}, d24 │ │ - vcvt.u16.f16 , q3, #10 │ │ - vqdmulh.s q9, q11, d22[0] │ │ - vcvt.u16.f16 d21, d30, #10 │ │ - vrintm.f16 , │ │ - @ instruction: 0xfff65d26 │ │ - vshr.u32 , , #10 │ │ - @ instruction: 0xfff65d0e │ │ - vtbl.8 d19, {d22-d23}, d20 │ │ - @ instruction: 0xfff65cf6 │ │ - vtbx.8 d22, {d22-d23}, d18 │ │ - vcvt.u32.f32 d21, d22, #10 │ │ - vsri.32 d21, d22, #10 │ │ - vcvt.u32.f32 d21, d14, #10 │ │ - vmull.u , d22, d13 │ │ - @ instruction: 0xfff65f06 │ │ - vtbl.8 d20, {d6-d7}, d26 │ │ - vqrdmlah.s , q11, d30[0] │ │ - @ instruction: 0xfff65f22 │ │ - @ instruction: 0xfff65ed6 │ │ - @ instruction: 0xfff62e98 │ │ - @ instruction: 0xfff65ebe │ │ - vrint?.f16 , │ │ - @ instruction: 0xfff65ea6 │ │ - vqrdmulh.s q10, q3, d9[0] │ │ - @ instruction: 0xfff65e8e │ │ - @ instruction: 0xfff65ef9 │ │ - vcvt.f32.u32 , q11, #10 │ │ - vrintx.f16 d20, d9 │ │ - vcvt.f32.u32 , q7, #10 │ │ - vqshrn.u64 d21, , #10 │ │ - vqrdmlah.s , q3, d6[0] │ │ + ldrb r1, [r5, r2] │ │ + @ instruction: 0xfff65f99 │ │ + vqshl.u32 q10, q11, #22 │ │ + vcvt.f32.u32 d21, d29, #10 │ │ + vuzp.16 q9, │ │ + @ instruction: 0xfff65e25 │ │ + vcvt.f16.u16 , q6, #10 │ │ + @ instruction: 0xfff65e0d │ │ + vuzp.16 q9, q15 │ │ + @ instruction: 0xfff65df5 │ │ + vqshlu.s64 d25, d18, #54 @ 0x36 │ │ + @ instruction: 0xfff65ddd │ │ + @ instruction: 0xfff65ddf │ │ + vqrdmulh.s , q11, d5[0] │ │ + @ instruction: 0xfff63af1 │ │ + @ instruction: 0xfff65dad │ │ + @ instruction: 0xfff64b53 │ │ + @ instruction: 0xfff65d95 │ │ + @ instruction: 0xfff68b92 │ │ + vcvt.u16.f16 , , #10 │ │ + vtbl.8 d24, {d22-d25}, d27 │ │ + vqrdmulh.s , q3, d21[0] │ │ + vcvt.u16.f16 d18, d11, #10 │ │ + vqrdmulh.s , q3, d13[0] │ │ + vrintp.f16 d19, d26 │ │ + vcvt.u16.f16 d21, d21, #10 │ │ + vuzp.16 , q6 │ │ + vcvt.u16.f16 d21, d13, #10 │ │ + @ instruction: 0xfff63a7d │ │ + @ instruction: 0xfff65d05 │ │ + @ instruction: 0xfff66a59 │ │ + vqrdmlsh.s , q3, d5[0] │ │ + vsri.32 d21, d10, #10 │ │ + @ instruction: 0xfff65f2d │ │ + vmull.u , d22, d1 │ │ + vcvt.u32.f32 d21, d5, #10 │ │ + vqrshrun.s64 d20, , #10 │ │ + @ instruction: 0xfff65efd │ │ + vcvt.u32.f32 d21, d17, #10 │ │ + vqrdmlah.s , q11, d21[0] │ │ + vqrdmlah.s q9, q11, d13[0] │ │ + vqrdmlah.s , q11, d13[0] │ │ + vqshl.u64 d25, d17, #54 @ 0x36 │ │ + @ instruction: 0xfff65eb5 │ │ + vmull.u q10, d22, d12 │ │ + @ instruction: 0xfff65e9d │ │ + @ instruction: 0xfff65f08 │ │ + @ instruction: 0xfff65e85 │ │ + vrsra.u64 q10, , #10 │ │ + vqrdmlah.s , q3, d29[0] │ │ + @ instruction: 0xfff658d9 │ │ + vcvt.f32.u32 , , #10 │ │ vcvt.f16.u16 d20, d0, #10 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n a6c70 │ │ + b.n a6c7c │ │ asrs r2, r0, #2 │ │ - b.n a62fa │ │ + b.n a6306 │ │ ands r0, r0 │ │ - b.n a6a9e │ │ + b.n a6aaa │ │ lsls r0, r0, #1 │ │ - b.n a6282 │ │ + b.n a628e │ │ asrs r1, r0, #6 │ │ - b.n a686e │ │ + b.n a687a │ │ cmp r0, #216 @ 0xd8 │ │ - b.n a6aec │ │ - str r4, [r7, #68] @ 0x44 │ │ + b.n a6af8 │ │ + str r5, [r7, #68] @ 0x44 │ │ add.w r0, r0, r1, lsl #12 │ │ - b.n a6ab2 │ │ + b.n a6abe │ │ asrs r0, r0, #1 │ │ - b.n a629e │ │ + b.n a62aa │ │ movs r0, #0 │ │ - b.n a6aba │ │ + b.n a6ac6 │ │ lsls r0, r1, #4 │ │ - b.n a62e0 │ │ + b.n a62ec │ │ ands r4, r0 │ │ - b.n a62a4 │ │ + b.n a62b0 │ │ movs r0, r0 │ │ - b.n a67ca │ │ + b.n a67d6 │ │ ands r4, r0 │ │ - b.n a67d0 │ │ + b.n a67dc │ │ movs r4, r0 │ │ - b.n a6aae │ │ + b.n a6aba │ │ movs r0, #240 @ 0xf0 │ │ asrs r1, r0, #7 │ │ movs r0, r0 │ │ - b.n a6e36 │ │ + b.n a6e42 │ │ movs r1, r0 │ │ asrs r0, r0, #12 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n a6cc0 │ │ - beq.n a67c0 │ │ - b.n a6c44 │ │ + b.n a6ccc │ │ + beq.n a67cc │ │ + b.n a6c50 │ │ movs r4, r0 │ │ - b.n a62c8 │ │ + b.n a62d4 │ │ str r0, [sp, #4] │ │ - b.n a6af2 │ │ + b.n a6afe │ │ movs r0, r6 │ │ - b.n a62d6 │ │ + b.n a62e2 │ │ movs r0, r0 │ │ - b.n a6e5a │ │ + b.n a6e66 │ │ lsls r4, r7, #1 │ │ lsrs r0, r0, #8 │ │ strh r4, [r0, #14] │ │ - b.n a62e2 │ │ - bl 5022c2 │ │ + b.n a62ee │ │ + bl 5022ce │ │ movs r0, r0 │ │ - b.n a6e7a │ │ + b.n a6e86 │ │ lsls r0, r7, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n a62ec │ │ + b.n a62f8 │ │ lsrs r2, r0, #16 │ │ - b.n a6cd6 │ │ + b.n a6ce2 │ │ movs r0, r1 │ │ - b.n a62f4 │ │ + b.n a6300 │ │ movs r0, #0 │ │ - b.n a6f1e │ │ + b.n a6f2a │ │ movs r2, r0 │ │ and.w r0, r0, r1, lsl #8 │ │ - b.n a6cea │ │ + b.n a6cf6 │ │ movs r0, r1 │ │ - b.n a6a8e │ │ + b.n a6a9a │ │ lsls r0, r6, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, r1 │ │ - b.n a632c │ │ + b.n a6338 │ │ strh r2, [r0, r2] │ │ - b.n a68f6 │ │ + b.n a6902 │ │ asrs r0, r2, #32 │ │ - b.n a6324 │ │ - bl 5022fa │ │ + b.n a6330 │ │ + bl 502306 │ │ movs r0, r0 │ │ - b.n a6ea4 │ │ + b.n a6eb0 │ │ @ instruction: 0xfff60aff │ │ - add r0, pc, #80 @ (adr r0, a6858 ) │ │ - b.n a6334 │ │ - b.n a6814 │ │ - b.n a6338 │ │ - bl 50230e │ │ + add r0, pc, #80 @ (adr r0, a6864 ) │ │ + b.n a6340 │ │ + b.n a6820 │ │ + b.n a6344 │ │ + bl 50231a │ │ strb r0, [r0, #0] │ │ - b.n a6340 │ │ - bl 502316 │ │ + b.n a634c │ │ + bl 502322 │ │ asrs r4, r0, #32 │ │ - b.n a6348 │ │ - bl 50231e │ │ + b.n a6354 │ │ + bl 50232a │ │ adds r0, #0 │ │ - b.n a6350 │ │ + b.n a635c │ │ ands r1, r0 │ │ - b.n a6886 │ │ + b.n a6892 │ │ str r3, [r0, #0] │ │ - b.n a687c │ │ + b.n a6888 │ │ str r4, [r0, #0] │ │ - b.n a6b5e │ │ - bl 502332 │ │ + b.n a6b6a │ │ + bl 50233e │ │ movs r4, r3 │ │ lsrs r0, r0, #8 │ │ - blx 4a7e7c │ │ - b.n a6842 │ │ - b.n a6b82 │ │ + blx 4a7e88 │ │ + b.n a684e │ │ + b.n a6b8e │ │ strb r3, [r0, #0] │ │ - b.n a6b86 │ │ + b.n a6b92 │ │ asrs r4, r0, #32 │ │ - b.n a6374 │ │ - bl 50234a │ │ + b.n a6380 │ │ + bl 502356 │ │ adds r0, #0 │ │ - b.n a637c │ │ + b.n a6388 │ │ str r1, [r0, #0] │ │ - b.n a68b2 │ │ + b.n a68be │ │ ands r3, r0 │ │ - b.n a68a8 │ │ + b.n a68b4 │ │ str r6, [r0, #0] │ │ - b.n a6b86 │ │ - bl 50235e │ │ + b.n a6b92 │ │ + bl 50236a │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ @ instruction: 0xfff3eaff │ │ - blx 4a7eac │ │ - b.n a6878 │ │ - b.n a639c │ │ - bl 502372 │ │ + blx 4a7eb8 │ │ + b.n a6884 │ │ + b.n a63a8 │ │ + bl 50237e │ │ strb r0, [r0, #0] │ │ - b.n a63a4 │ │ - bl 50237a │ │ + b.n a63b0 │ │ + bl 502386 │ │ asrs r4, r0, #32 │ │ - b.n a63ac │ │ - bl 502382 │ │ + b.n a63b8 │ │ + bl 50238e │ │ adds r0, #0 │ │ - b.n a63b4 │ │ - bl 50238a │ │ + b.n a63c0 │ │ + bl 502396 │ │ movs r1, r0 │ │ - b.n a68ee │ │ + b.n a68fa │ │ str r3, [r0, #0] │ │ - b.n a68e4 │ │ + b.n a68f0 │ │ movs r0, r0 │ │ - b.n a6bc6 │ │ + b.n a6bd2 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ - b.n a68a2 │ │ - b.n a6be2 │ │ + b.n a68ae │ │ + b.n a6bee │ │ strb r3, [r0, #0] │ │ - b.n a6be6 │ │ - blx 4a7ee8 │ │ + b.n a6bf2 │ │ + blx 4a7ef4 │ │ @ instruction: 0xfff3eaff │ │ lsls r0, r2, #3 │ │ - b.n a6c3c │ │ + b.n a6c48 │ │ adds r0, #1 │ │ - b.n a6912 │ │ + b.n a691e │ │ movs r0, r0 │ │ - b.n a6908 │ │ + b.n a6914 │ │ movs r3, r0 │ │ - b.n a6bde │ │ + b.n a6bea │ │ @ instruction: 0xffe91aff │ │ movs r4, r2 │ │ - b.n a63f0 │ │ - bl 5023c6 │ │ + b.n a63fc │ │ + bl 5023d2 │ │ movs r0, r0 │ │ - b.n a6b82 │ │ + b.n a6b8e │ │ movs r2, r6 │ │ subs r0, r0, r0 │ │ ands r4, r0 │ │ - b.n a6400 │ │ - bl 5023d6 │ │ + b.n a640c │ │ + bl 5023e2 │ │ stmia r0!, {} │ │ - b.n a6408 │ │ - bl 5023de │ │ + b.n a6414 │ │ + bl 5023ea │ │ adds r0, #4 │ │ - b.n a6410 │ │ - bl 5023e6 │ │ + b.n a641c │ │ + bl 5023f2 │ │ asrs r0, r0, #32 │ │ - b.n a6418 │ │ - bl 5023ee │ │ + b.n a6424 │ │ + bl 5023fa │ │ movs r3, r0 │ │ - b.n a693e │ │ + b.n a694a │ │ str r1, [r0, #0] │ │ - b.n a6952 │ │ + b.n a695e │ │ movs r0, r0 │ │ - b.n a6c2a │ │ + b.n a6c36 │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ ands r3, r0 │ │ - b.n a6c46 │ │ + b.n a6c52 │ │ stmia r0!, {r0} │ │ - b.n a6c4a │ │ - blx 4a7f4c │ │ + b.n a6c56 │ │ + blx 4a7f58 │ │ @ instruction: 0xfff3eaff │ │ - blx 4a7f54 │ │ + blx 4a7f60 │ │ ands r4, r0 │ │ - b.n a6444 │ │ - bl 50241a │ │ + b.n a6450 │ │ + bl 502426 │ │ stmia r0!, {} │ │ - b.n a644c │ │ - bl 502422 │ │ + b.n a6458 │ │ + bl 50242e │ │ adds r0, #4 │ │ - b.n a6454 │ │ - bl 50242a │ │ + b.n a6460 │ │ + bl 502436 │ │ asrs r0, r0, #32 │ │ - b.n a645c │ │ - bl 502432 │ │ + b.n a6468 │ │ + bl 50243e │ │ movs r3, r0 │ │ - b.n a6982 │ │ + b.n a698e │ │ str r1, [r0, #0] │ │ - b.n a6996 │ │ + b.n a69a2 │ │ movs r0, r0 │ │ - b.n a6c6e │ │ + b.n a6c7a │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ ands r3, r0 │ │ - b.n a6c8a │ │ + b.n a6c96 │ │ stmia r0!, {r0} │ │ - b.n a6c8e │ │ - blx 4a7f90 │ │ + b.n a6c9a │ │ + blx 4a7f9c │ │ @ instruction: 0xfff3eaff │ │ lsls r0, r2, #3 │ │ - b.n a6ce4 │ │ + b.n a6cf0 │ │ adds r0, #1 │ │ - b.n a69a6 │ │ + b.n a69b2 │ │ movs r0, r0 │ │ - b.n a69ba │ │ + b.n a69c6 │ │ movs r3, r0 │ │ - b.n a6c86 │ │ + b.n a6c92 │ │ @ instruction: 0xffe91aff │ │ movs r4, r1 │ │ - b.n a69bc │ │ + b.n a69c8 │ │ asrs r4, r0, #32 │ │ - b.n a69ce │ │ + b.n a69da │ │ movs r1, r0 │ │ - b.n a6c96 │ │ + b.n a6ca2 │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ movs r2, r1 │ │ - b.n a6c30 │ │ + b.n a6c3c │ │ @ instruction: 0xff972aff │ │ movs r4, r0 │ │ - b.n a64c0 │ │ + b.n a64cc │ │ lsls r4, r0, #2 │ │ - b.n a64aa │ │ + b.n a64b6 │ │ lsls r0, r2, #15 │ │ - b.n a6d0e │ │ + b.n a6d1a │ │ movs r7, r0 │ │ - b.n a6a32 │ │ + b.n a6a3e │ │ movs r6, r1 │ │ - b.n a6b38 │ │ + b.n a6b44 │ │ str r0, [sp, #40] @ 0x28 │ │ movs r1, #160 @ 0xa0 │ │ @ instruction: 0xff90eaff │ │ movs r0, r0 │ │ - b.n a64dc │ │ + b.n a64e8 │ │ strh r4, [r0, #14] │ │ - b.n a64c6 │ │ - bl 5024a6 │ │ + b.n a64d2 │ │ + bl 5024b2 │ │ movs r0, r0 │ │ - b.n a705e │ │ + b.n a706a │ │ @ instruction: 0xff891aff │ │ movs r1, r1 │ │ - b.n a6cf6 │ │ - beq.n a69f0 │ │ - b.n a6e50 │ │ + b.n a6d02 │ │ + beq.n a69fc │ │ + b.n a6e5c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r5, r6, r7} │ │ - b.n a6500 │ │ + b.n a650c │ │ movs r0, r0 │ │ - b.n a6904 │ │ + b.n a6910 │ │ movs r0, r0 │ │ - b.n a706a │ │ + b.n a7076 │ │ vrhadd.u16 d1, d14, d31 │ │ - ldr r4, [pc, #448] @ (a6b90 ) │ │ + ldr r4, [pc, #448] @ (a6b9c ) │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n a6ef0 │ │ - beq.n a69e8 │ │ - b.n a6e74 │ │ + b.n a6efc │ │ + beq.n a69f4 │ │ + b.n a6e80 │ │ movs r4, r0 │ │ - b.n a6ef8 │ │ + b.n a6f04 │ │ asrs r5, r1, #32 │ │ - b.n a6d22 │ │ + b.n a6d2e │ │ movs r0, #0 │ │ - b.n a7126 │ │ + b.n a7132 │ │ lsrs r0, r3, #8 │ │ add.w r0, r0, r0 │ │ - b.n a708e │ │ + b.n a709a │ │ movs r0, r5 │ │ subs r0, r0, r0 │ │ ands r4, r0 │ │ - b.n a6530 │ │ + b.n a653c │ │ lsls r7, r7, #17 │ │ - b.n a713a │ │ + b.n a7146 │ │ asrs r4, r0, #32 │ │ - b.n a6d3e │ │ - pop {r0, r1, r3, r4, r5} │ │ + b.n a6d4a │ │ + pop {r2, r3, r4, r5} │ │ add.w r0, r0, r0, lsl #4 │ │ - b.n a6540 │ │ + b.n a654c │ │ lsls r1, r0, #2 │ │ - b.n a6caa │ │ + b.n a6cb6 │ │ movs r1, r4 │ │ subs r2, #0 │ │ lsls r7, r1, #3 │ │ - b.n a7152 │ │ + b.n a715e │ │ stmia r0!, {r2, r4, r7} │ │ - b.n a6554 │ │ + b.n a6560 │ │ lsls r1, r2, #2 │ │ - b.n a6a1a │ │ + b.n a6a26 │ │ movs r6, #1 │ │ - b.n a715e │ │ + b.n a716a │ │ stmia r0!, {r2, r3} │ │ - b.n a6b40 │ │ + b.n a6b4c │ │ lsls r0, r4, #14 │ │ - b.n a6d66 │ │ + b.n a6d72 │ │ lsls r0, r2, #18 │ │ - b.n a6a2a │ │ + b.n a6a36 │ │ movs r0, r0 │ │ - b.n a6546 │ │ + b.n a6552 │ │ ands r0, r0 │ │ - b.n a6b36 │ │ + b.n a6b42 │ │ asrs r0, r0, #32 │ │ - b.n a6efa │ │ + b.n a6f06 │ │ ands r1, r0 │ │ - b.n a6ec2 │ │ + b.n a6ece │ │ adds r0, #1 │ │ - b.n a6a3e │ │ + b.n a6a4a │ │ ands r1, r0 │ │ - b.n a6a4a │ │ - b.n a6a4a │ │ - b.n a6ac6 │ │ + b.n a6a56 │ │ + b.n a6a56 │ │ + b.n a6ad2 │ │ str r0, [r0, r0] │ │ - b.n a6ad2 │ │ + b.n a6ade │ │ asrs r0, r0, #32 │ │ - b.n a718e │ │ + b.n a719a │ │ movs r5, r0 │ │ - b.n a6d0e │ │ + b.n a6d1a │ │ str r0, [r0, #0] │ │ - b.n a7196 │ │ + b.n a71a2 │ │ asrs r1, r0, #32 │ │ adds r3, #0 │ │ lsls r7, r7, #17 │ │ - b.n a7106 │ │ + b.n a7112 │ │ str r1, [r0, #0] │ │ strh r0, [r0, #24] │ │ asrs r1, r0, #32 │ │ - b.n a6d92 │ │ + b.n a6d9e │ │ str r6, [r1, r0] │ │ asrs r0, r4, #6 │ │ lsls r0, r4, #8 │ │ - b.n a6d18 │ │ + b.n a6d24 │ │ movs r5, r0 │ │ ldrh r0, [r0, #16] │ │ movs r0, r0 │ │ - b.n a7118 │ │ + b.n a7124 │ │ ands r3, r0 │ │ asrs r0, r4, #6 │ │ movs r2, #130 @ 0x82 │ │ - b.n a6dde │ │ + b.n a6dea │ │ movs r4, r0 │ │ - b.n a6dc2 │ │ + b.n a6dce │ │ ands r0, r0 │ │ - b.n a659e │ │ + b.n a65aa │ │ @ instruction: 0xffe81aff │ │ - beq.n a6aac │ │ - b.n a6f24 │ │ - ldr r4, [pc, #448] @ (a6c50 ) │ │ + beq.n a6ab8 │ │ + b.n a6f30 │ │ + ldr r4, [pc, #448] @ (a6c5c ) │ │ ldmia.w sp!, {r1, r2, r3, r4, r8, r9, sl, fp, ip, sp, lr, pc} │ │ - b.n a6cf4 │ │ + b.n a6d00 │ │ asrs r4, r2, #32 │ │ - b.n a65d8 │ │ + b.n a65e4 │ │ lsls r7, r7, #17 │ │ - b.n a71de │ │ + b.n a71ea │ │ asrs r1, r0, #32 │ │ - b.n a6bc0 │ │ + b.n a6bcc │ │ movs r0, r0 │ │ - b.n a65a8 │ │ + b.n a65b4 │ │ @ instruction: 0xfff7eaff │ │ - ldrb r0, [r0, #25] │ │ + ldrb r4, [r2, #25] │ │ movs r3, r0 │ │ - ldrb r4, [r4, #23] │ │ + ldrb r0, [r7, #23] │ │ movs r3, r0 │ │ - ldrb r4, [r4, #21] │ │ + ldrb r0, [r7, #21] │ │ movs r3, r0 │ │ lsrs r2, r0, #4 │ │ - b.n a715a │ │ + b.n a7166 │ │ movs r0, r4 │ │ ldr r2, [sp, #0] │ │ asrs r0, r0, #32 │ │ - b.n a6e02 │ │ + b.n a6e0e │ │ asrs r7, r3, #2 │ │ - b.n a6a64 │ │ + b.n a6a70 │ │ movs r0, r0 │ │ - b.n a716c │ │ + b.n a7178 │ │ movs r4, r3 │ │ lsrs r0, r0, #8 │ │ lsrs r2, r4, #4 │ │ - b.n a7172 │ │ + b.n a717e │ │ movs r4, r3 │ │ ldr r2, [sp, #0] │ │ lsrs r2, r0, #5 │ │ - b.n a717a │ │ + b.n a7186 │ │ movs r0, r4 │ │ ldr r2, [sp, #0] │ │ lsrs r2, r0, #6 │ │ - b.n a7182 │ │ + b.n a718e │ │ movs r4, r4 │ │ ldr r2, [sp, #0] │ │ asrs r0, r0, #32 │ │ - b.n a70fa │ │ + b.n a7106 │ │ asrs r0, r0, #1 │ │ - b.n a716e │ │ + b.n a717a │ │ movs r1, r0 │ │ - b.n a6d92 │ │ + b.n a6d9e │ │ movs r6, r4 │ │ ldr r2, [sp, #0] │ │ asrs r0, r0, #32 │ │ - b.n a710a │ │ + b.n a7116 │ │ asrs r0, r0, #2 │ │ - b.n a717e │ │ + b.n a718a │ │ movs r1, r0 │ │ - b.n a6da2 │ │ + b.n a6dae │ │ movs r0, r5 │ │ ldr r2, [sp, #0] │ │ asrs r0, r0, #32 │ │ - b.n a711a │ │ + b.n a7126 │ │ asrs r0, r0, #4 │ │ - b.n a718e │ │ + b.n a719a │ │ movs r1, r0 │ │ - b.n a6db2 │ │ + b.n a6dbe │ │ movs r2, r5 │ │ ldr r2, [sp, #0] │ │ asrs r0, r0, #32 │ │ - b.n a712a │ │ + b.n a7136 │ │ asrs r0, r0, #8 │ │ - b.n a719e │ │ + b.n a71aa │ │ movs r1, r0 │ │ - b.n a6dc2 │ │ + b.n a6dce │ │ movs r4, r5 │ │ ldr r2, [sp, #0] │ │ subs r5, r7, #7 │ │ - b.n a7148 │ │ + b.n a7154 │ │ lsls r7, r7, #13 │ │ - b.n a720e │ │ + b.n a721a │ │ movs r7, r5 │ │ ldrh r0, [r0, #16] │ │ movs r1, r0 │ │ - b.n a6fb6 │ │ + b.n a6fc2 │ │ subs r1, r0, r0 │ │ - b.n a72fa │ │ + b.n a7306 │ │ lsls r0, r4, #30 │ │ - b.n a6e7e │ │ + b.n a6e8a │ │ movs r2, r5 │ │ and.w r0, r0, r0, ror #1 │ │ - b.n a6944 │ │ + b.n a6950 │ │ vrhadd.u16 d14, d14, d31 │ │ asrs r7, r7, #3 │ │ - b.n a715e │ │ + b.n a716a │ │ asrs r7, r7, #1 │ │ - b.n a71d2 │ │ + b.n a71de │ │ movs r1, r0 │ │ - b.n a6c56 │ │ + b.n a6c62 │ │ subs r7, r7, #7 │ │ - b.n a7168 │ │ + b.n a7174 │ │ lsls r0, r4, #16 │ │ - b.n a6e9e │ │ + b.n a6eaa │ │ movs r2, r4 │ │ and.w r1, r0, pc, ror #7 │ │ - b.n a7176 │ │ + b.n a7182 │ │ asrs r7, r7, #3 │ │ - b.n a71ea │ │ + b.n a71f6 │ │ movs r1, r0 │ │ - b.n a6c6e │ │ + b.n a6c7a │ │ subs r7, r0, r0 │ │ - b.n a7332 │ │ + b.n a733e │ │ lsls r0, r4, #18 │ │ - b.n a6eb6 │ │ + b.n a6ec2 │ │ movs r4, r3 │ │ and.w r3, r0, pc, ror #7 │ │ - b.n a718e │ │ + b.n a719a │ │ asrs r7, r7, #7 │ │ - b.n a7202 │ │ + b.n a720e │ │ movs r1, r0 │ │ - b.n a6c86 │ │ + b.n a6c92 │ │ subs r6, r0, r0 │ │ - b.n a734a │ │ + b.n a7356 │ │ lsls r0, r4, #20 │ │ - b.n a6ece │ │ + b.n a6eda │ │ movs r6, r2 │ │ and.w r7, r0, pc, ror #7 │ │ - b.n a71a6 │ │ + b.n a71b2 │ │ asrs r7, r7, #15 │ │ - b.n a721a │ │ + b.n a7226 │ │ movs r1, r0 │ │ - b.n a6c9e │ │ + b.n a6caa │ │ subs r5, r0, r0 │ │ - b.n a7362 │ │ + b.n a736e │ │ lsls r0, r4, #22 │ │ - b.n a6ee6 │ │ + b.n a6ef2 │ │ movs r0, r2 │ │ and.w pc, r0, pc, ror #7 │ │ - b.n a71be │ │ + b.n a71ca │ │ asrs r7, r7, #31 │ │ - b.n a7232 │ │ + b.n a723e │ │ movs r1, r0 │ │ - b.n a6cb6 │ │ + b.n a6cc2 │ │ adds r1, r0, r4 │ │ - b.n a737a │ │ + b.n a7386 │ │ lsls r0, r4, #24 │ │ - b.n a6efe │ │ + b.n a6f0a │ │ movs r2, r1 │ │ and.w pc, r0, pc, ror #7 │ │ - b.n a71d8 │ │ + b.n a71e4 │ │ subs r7, r7, #7 │ │ - b.n a724a │ │ + b.n a7256 │ │ movs r1, r0 │ │ - b.n a6cce │ │ + b.n a6cda │ │ subs r3, r0, r0 │ │ - b.n a7392 │ │ + b.n a739e │ │ lsls r0, r4, #26 │ │ - b.n a6f16 │ │ + b.n a6f22 │ │ movs r4, r0 │ │ and.w pc, r0, pc, ror #7 │ │ - b.n a71f4 │ │ + b.n a7200 │ │ subs r7, r7, #7 │ │ - b.n a7264 │ │ + b.n a7270 │ │ movs r1, r0 │ │ - b.n a6ce6 │ │ + b.n a6cf2 │ │ subs r2, r0, r0 │ │ - b.n a73aa │ │ + b.n a73b6 │ │ lsls r0, r4, #28 │ │ - b.n a6f2e │ │ + b.n a6f3a │ │ asrs r0, r0, #2 │ │ - b.n a6cf4 │ │ + b.n a6d00 │ │ lsls r1, r6, #1 │ │ - b.n a69f4 │ │ + b.n a6a00 │ │ vrhadd.u16 d14, d14, d31 │ │ - ldr r3, [pc, #960] @ (a6fbc ) │ │ + ldr r3, [pc, #960] @ (a6fc8 ) │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n a711c │ │ - beq.n a6c24 │ │ - b.n a70a0 │ │ + b.n a7128 │ │ + beq.n a6c30 │ │ + b.n a70ac │ │ ands r0, r0 │ │ - b.n a6f4a │ │ + b.n a6f56 │ │ str r0, [r1, r0] │ │ - b.n a6744 │ │ + b.n a6750 │ │ movs r0, #48 @ 0x30 │ │ - b.n a675a │ │ + b.n a6766 │ │ strb r2, [r0, #0] │ │ - b.n a6f56 │ │ + b.n a6f62 │ │ asrs r4, r2, #32 │ │ - b.n a7124 │ │ + b.n a7130 │ │ movs r0, #24 │ │ - b.n a70a6 │ │ + b.n a70b2 │ │ adds r0, #4 │ │ - b.n a672a │ │ + b.n a6736 │ │ str r0, [sp, #0] │ │ - b.n a6f66 │ │ + b.n a6f72 │ │ lsrs r5, r1, #10 │ │ orn r0, r1, #2096 @ 0x830 │ │ - b.n a6f6e │ │ + b.n a6f7a │ │ asrs r0, r0, #32 │ │ - b.n a6754 │ │ + b.n a6760 │ │ lsrs r5, r1, #10 │ │ orr.w r0, r2, #9699328 @ 0x940000 │ │ - b.n a6762 │ │ + b.n a676e │ │ asrs r0, r0, #32 │ │ - b.n a6742 │ │ + b.n a674e │ │ asrs r0, r5, #32 │ │ - b.n a714c │ │ + b.n a7158 │ │ movs r0, #96 @ 0x60 │ │ - b.n a7386 │ │ - cbnz r7, a6c6e │ │ - @ instruction: 0xfb000088 │ │ - b.n a7158 │ │ + b.n a7392 │ │ + @ instruction: 0xb7f9 │ │ + @ instruction: 0xfa000088 │ │ + b.n a7164 │ │ movs r0, #40 @ 0x28 │ │ - b.n a715a │ │ + b.n a7166 │ │ lsrs r5, r1, #10 │ │ orn sl, r0, #292864 @ 0x47800 │ │ - bne.w fffc6c7a │ │ - b.n a6794 │ │ + bne.w fffc6c86 │ │ + b.n a67a0 │ │ lsrs r5, r1, #10 │ │ orr.w sl, r2, #292864 @ 0x47800 │ │ orr.w r0, r2, #425984 @ 0x68000 │ │ - b.n a6ffa │ │ + b.n a7006 │ │ lsls r0, r2, #7 │ │ - b.n a6ff6 │ │ + b.n a7002 │ │ movs r0, #3 │ │ - b.n a6f76 │ │ + b.n a6f82 │ │ adds r0, #6 │ │ - b.n a6fb6 │ │ + b.n a6fc2 │ │ cmp r7, #18 │ │ - b.n a6f58 │ │ + b.n a6f64 │ │ movs r2, r4 │ │ stmia.w sp, {r1, r5, r7, r9, sp} │ │ - b.n a6fc2 │ │ + b.n a6fce │ │ movs r0, #8 │ │ - b.n a67a0 │ │ + b.n a67ac │ │ movs r0, #7 │ │ - b.n a6fca │ │ - ldr r3, [r6, #56] @ 0x38 │ │ + b.n a6fd6 │ │ + ldr r4, [r6, #56] @ 0x38 │ │ add.w r0, r0, r0 │ │ - b.n a7332 │ │ + b.n a733e │ │ movs r2, r3 │ │ lsrs r0, r0, #8 │ │ lsls r0, r2, #3 │ │ - b.n a7022 │ │ + b.n a702e │ │ movs r0, #8 │ │ - b.n a67c8 │ │ - bl 50279e │ │ + b.n a67d4 │ │ + bl 5027aa │ │ adds r0, #12 │ │ - b.n a67d0 │ │ - bl 5027a6 │ │ + b.n a67dc │ │ + bl 5027b2 │ │ strb r0, [r5, #2] │ │ - b.n a67d8 │ │ + b.n a67e4 │ │ strb r4, [r5, #2] │ │ - b.n a67dc │ │ + b.n a67e8 │ │ strb r0, [r6, #2] │ │ - b.n a67e0 │ │ - bl 5027b6 │ │ + b.n a67ec │ │ + bl 5027c2 │ │ str r4, [r6, #8] │ │ - b.n a67e8 │ │ - bl 5027be │ │ + b.n a67f4 │ │ + bl 5027ca │ │ strb r7, [r0, #0] │ │ - b.n a6d0a │ │ + b.n a6d16 │ │ str r6, [r0, #0] │ │ - b.n a6d10 │ │ + b.n a6d1c │ │ strb r6, [r0, #0] │ │ - b.n a6ffc │ │ + b.n a7008 │ │ movs r0, #0 │ │ asrs r0, r4, #14 │ │ adds r0, #0 │ │ asrs r0, r4, #14 │ │ movs r2, r0 │ │ - b.n a6d1a │ │ + b.n a6d26 │ │ asrs r3, r0, #32 │ │ - b.n a6d20 │ │ + b.n a6d2c │ │ movs r1, r0 │ │ - b.n a7002 │ │ + b.n a700e │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #1 │ │ - b.n a681c │ │ + b.n a6828 │ │ movs r0, r0 │ │ - b.n a742e │ │ + b.n a743a │ │ movs r0, #176 @ 0xb0 │ │ - b.n a7094 │ │ + b.n a70a0 │ │ movs r0, r1 │ │ - b.n a739a │ │ + b.n a73a6 │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ - beq.n a6d2c │ │ - b.n a7194 │ │ + beq.n a6d38 │ │ + b.n a71a0 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r6, sp} │ │ - b.n a6838 │ │ + b.n a6844 │ │ movs r0, r1 │ │ - b.n a704a │ │ + b.n a7056 │ │ asrs r0, r0, #32 │ │ - b.n a74ce │ │ - beq.n a6d40 │ │ - b.n a71a8 │ │ - ldr r3, [pc, #960] @ (a70d4 ) │ │ - ldmia.w sp!, {r0, r2, r4, r5, r8, sl, fp, sp, lr} │ │ + b.n a74da │ │ + beq.n a6d4c │ │ + b.n a71b4 │ │ + ldr r3, [pc, #960] @ (a70e0 ) │ │ + ldmia.w sp!, {r1, r2, r4, r5, r8, sl, fp, sp, lr} │ │ and.w r0, r0, lr, ror #13 │ │ - b.n a7122 │ │ + b.n a712e │ │ movs r0, r1 │ │ - b.n a73c8 │ │ + b.n a73d4 │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ subs r5, #189 @ 0xbd │ │ - b.n a733c │ │ + b.n a7348 │ │ strb r3, [r0, #4] │ │ - b.n a7330 │ │ + b.n a733c │ │ lsrs r0, r2 │ │ - b.n a70bc │ │ + b.n a70c8 │ │ subs r1, #101 @ 0x65 │ │ - b.n a73c0 │ │ + b.n a73cc │ │ ldrb r4, [r1, #29] │ │ - b.n a73d6 │ │ + b.n a73e2 │ │ adds r0, #3 │ │ - b.n a6d88 │ │ + b.n a6d94 │ │ strb r7, [r0, #0] │ │ - b.n a6d8a │ │ + b.n a6d96 │ │ adds r0, #3 │ │ - b.n a7074 │ │ + b.n a7080 │ │ movs r4, r2 │ │ subs r0, r0, r0 │ │ lsls r4, r3, #1 │ │ - b.n a688c │ │ + b.n a6898 │ │ movs r0, r0 │ │ - b.n a6e70 │ │ + b.n a6e7c │ │ asrs r2, r3, #1 │ │ - b.n a68f6 │ │ + b.n a6902 │ │ lsls r0, r0, #31 │ │ - b.n a736a │ │ + b.n a7376 │ │ lsrs r7, r7, #31 │ │ - b.n a73fc │ │ + b.n a7408 │ │ movs r0, r0 │ │ - b.n a7404 │ │ + b.n a7410 │ │ @ instruction: 0xffe40aff │ │ asrs r4, r0, #1 │ │ - b.n a68a8 │ │ + b.n a68b4 │ │ ands r0, r0 │ │ - b.n a70ae │ │ + b.n a70ba │ │ adds r0, #64 @ 0x40 │ │ - b.n a68b0 │ │ + b.n a68bc │ │ movs r1, r0 │ │ - b.n a74b6 │ │ + b.n a74c2 │ │ str r4, [r7, r0] │ │ - b.n a68b8 │ │ + b.n a68c4 │ │ asrs r1, r0, #32 │ │ - b.n a6e9c │ │ + b.n a6ea8 │ │ adds r0, #3 │ │ - b.n a6ea0 │ │ + b.n a6eac │ │ str r5, [r0, r0] │ │ - b.n a6ea4 │ │ + b.n a6eb0 │ │ movs r4, r4 │ │ stmia.w sp, {r7, sp} │ │ - b.n a74ce │ │ - bne.n a6dda │ │ + b.n a74da │ │ + bne.n a6de6 │ │ @ instruction: 0xebff0004 │ │ - b.n a70d6 │ │ - beq.n a6dc8 │ │ - b.n a7230 │ │ + b.n a70e2 │ │ + beq.n a6dd4 │ │ + b.n a723c │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r3, sp} │ │ - b.n a74e2 │ │ + b.n a74ee │ │ movs r0, #176 @ 0xb0 │ │ - b.n a7128 │ │ - beq.n a6dd8 │ │ - b.n a7240 │ │ + b.n a7134 │ │ + beq.n a6de4 │ │ + b.n a724c │ │ ldrh r0, [r6, #30] │ │ - ldmia.w sp!, {r2, r3, r4, r5, r6, r7, r9, fp, ip, sp, lr} │ │ + ldmia.w sp!, {r4, r8, r9, fp, ip, sp, lr} │ │ movs r3, r0 │ │ - subs r4, #205 @ 0xcd │ │ - vcvt.f32.u32 , , #10 │ │ - @ instruction: 0xfff63cda │ │ + subs r4, #57 @ 0x39 │ │ + @ instruction: 0xfff61dbc │ │ + vdup.16 , d6[1] │ │ @ instruction: 0xfff64ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n a72e0 │ │ - beq.n a6d30 │ │ - b.n a7264 │ │ + b.n a72ec │ │ + beq.n a6d3c │ │ + b.n a7270 │ │ ldrsh r6, [r1, r5] │ │ - b.n a72ce │ │ + b.n a72da │ │ str r0, [sp, #0] │ │ - b.n a7112 │ │ + b.n a711e │ │ ands r3, r0 │ │ - b.n a7116 │ │ + b.n a7122 │ │ strb r2, [r0, #0] │ │ - b.n a711a │ │ + b.n a7126 │ │ movs r5, r0 │ │ - b.n a711e │ │ + b.n a712a │ │ str r1, [r0, #0] │ │ - b.n a7122 │ │ - b.n a6cf2 │ │ + b.n a712e │ │ + b.n a6cfe │ │ @ instruction: 0xebff0000 │ │ - b.n a748a │ │ + b.n a7496 │ │ lsls r5, r0, #9 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n a6924 │ │ + b.n a6930 │ │ movs r0, r0 │ │ - b.n a749e │ │ + b.n a74aa │ │ str r0, [r7, r0] │ │ - b.n a6914 │ │ + b.n a6920 │ │ asrs r4, r0, #32 │ │ - b.n a713e │ │ + b.n a714a │ │ movs r0, r5 │ │ - b.n a691c │ │ + b.n a6928 │ │ strh r4, [r0, #0] │ │ - b.n a6938 │ │ + b.n a6944 │ │ str r0, [r3, r0] │ │ - b.n a693c │ │ - b.n a6e44 │ │ - b.n a6940 │ │ + b.n a6948 │ │ + b.n a6e50 │ │ + b.n a694c │ │ ldmia r0, {r0, r1, r3, r4} │ │ - b.n a7222 │ │ + b.n a722e │ │ movs r0, #92 @ 0x5c │ │ - b.n a69c8 │ │ + b.n a69d4 │ │ lsrs r0, r2, #8 │ │ - b.n a6958 │ │ - add r0, pc, #48 @ (adr r0, a6e4c ) │ │ - b.n a715e │ │ - add r1, pc, #4 @ (adr r1, a6e24 ) │ │ + b.n a6964 │ │ + add r0, pc, #48 @ (adr r0, a6e58 ) │ │ + b.n a716a │ │ + add r1, pc, #4 @ (adr r1, a6e30 ) │ │ asrs r2, r1, #14 │ │ str r0, [r6, #0] │ │ - b.n a6940 │ │ + b.n a694c │ │ movs r0, r0 │ │ - b.n a6f48 │ │ + b.n a6f54 │ │ lsls r5, r6, #8 │ │ - b.n a70da │ │ + b.n a70e6 │ │ asrs r0, r0, #1 │ │ - b.n a694c │ │ + b.n a6958 │ │ adds r0, #80 @ 0x50 │ │ - b.n a6956 │ │ + b.n a6962 │ │ movs r0, r0 │ │ - b.n a7300 │ │ + b.n a730c │ │ adds r0, #1 │ │ - b.n a72c4 │ │ + b.n a72d0 │ │ tst r6, r2 │ │ - b.n a6f48 │ │ + b.n a6f54 │ │ str r7, [r0, #0] │ │ - b.n a7186 │ │ + b.n a7192 │ │ str r5, [r6, #32] │ │ str r1, [sp, #640] @ 0x280 │ │ movs r1, r0 │ │ - b.n a74f0 │ │ + b.n a74fc │ │ str r7, [r0, #0] │ │ strh r0, [r4, #12] │ │ ands r0, r0 │ │ - b.n a6e5e │ │ + b.n a6e6a │ │ movs r2, #22 │ │ - b.n a6f60 │ │ + b.n a6f6c │ │ movs r0, #0 │ │ - b.n a6e62 │ │ + b.n a6e6e │ │ movs r6, r1 │ │ - b.n a71a2 │ │ + b.n a71ae │ │ movs r5, r0 │ │ - b.n a710a │ │ + b.n a7116 │ │ movs r0, #68 @ 0x44 │ │ - b.n a6984 │ │ + b.n a6990 │ │ movs r4, r0 │ │ lsls r0, r2, #5 │ │ lsls r1, r4, #1 │ │ lsrs r0, r0, #8 │ │ lsls r2, r0, #24 │ │ - b.n a74a6 │ │ + b.n a74b2 │ │ ands r4, r7 │ │ - b.n a6994 │ │ + b.n a69a0 │ │ asrs r0, r0, #1 │ │ lsls r5, r3, #22 │ │ movs r4, r6 │ │ - b.n a699c │ │ + b.n a69a8 │ │ movs r2, r0 │ │ lsls r1, r2, #13 │ │ str r4, [r4, r0] │ │ - b.n a69a4 │ │ + b.n a69b0 │ │ movs r3, r4 │ │ subs r0, r0, r0 │ │ lsls r4, r0, #1 │ │ - b.n a69cc │ │ + b.n a69d8 │ │ movs r5, r0 │ │ - b.n a7136 │ │ + b.n a7142 │ │ movs r0, r4 │ │ lsrs r0, r0, #8 │ │ str r0, [r6, r0] │ │ - b.n a69d0 │ │ + b.n a69dc │ │ lsrs r3, r0, #16 │ │ - b.n a75ba │ │ + b.n a75c6 │ │ lsls r1, r0, #4 │ │ - b.n a75a6 │ │ + b.n a75b2 │ │ movs r4, r5 │ │ - b.n a69c4 │ │ + b.n a69d0 │ │ movs r0, r0 │ │ - b.n a7558 │ │ + b.n a7564 │ │ lsls r6, r5, #6 │ │ lsrs r0, r0, #8 │ │ movs r1, r1 │ │ - b.n a71f6 │ │ - str r4, [sp, #16] │ │ + b.n a7202 │ │ + str r4, [sp, #20] │ │ @ instruction: 0xeb008000 │ │ - b.n a71fe │ │ + b.n a720a │ │ movs r1, r0 │ │ - b.n a73c2 │ │ + b.n a73ce │ │ movs r1, r0 │ │ - b.n a7566 │ │ + b.n a7572 │ │ lsls r0, r2, #8 │ │ ldrh r0, [r0, #16] │ │ rors r4, r0 │ │ - b.n a69f8 │ │ - bl 5029ce │ │ + b.n a6a04 │ │ + bl 5029da │ │ movs r0, r0 │ │ - b.n a757e │ │ + b.n a758a │ │ movs r6, r1 │ │ lsrs r0, r0, #8 │ │ str r0, [sp, #128] @ 0x80 │ │ - b.n a69f8 │ │ + b.n a6a04 │ │ ldrh r1, [r4, #48] @ 0x30 │ │ - b.n a73ec │ │ + b.n a73f8 │ │ str r0, [sp, #416] @ 0x1a0 │ │ - b.n a6a18 │ │ + b.n a6a24 │ │ movs r0, r0 │ │ - b.n a6a1a │ │ + b.n a6a26 │ │ movs r1, r1 │ │ - b.n a718e │ │ + b.n a719a │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ str r0, [r3, #12] │ │ - b.n a7186 │ │ - stmia r6!, {r0, r2, r3, r5, r6, r7} │ │ + b.n a7192 │ │ + stmia r6!, {r1, r2, r3, r5, r6, r7} │ │ add.w r0, r0, r0 │ │ - b.n a6f4a │ │ + b.n a6f56 │ │ movs r7, r0 │ │ - b.n a7222 │ │ + b.n a722e │ │ lsls r0, r3, #1 │ │ subs r0, r0, r0 │ │ strh r0, [r4, #0] │ │ - b.n a741a │ │ + b.n a7426 │ │ ands r1, r0 │ │ - b.n a73b6 │ │ + b.n a73c2 │ │ @ instruction: 0xfff41aff │ │ str r0, [sp, #128] @ 0x80 │ │ - b.n a6a50 │ │ - add r0, pc, #176 @ (adr r0, a6fc8 ) │ │ - b.n a6a54 │ │ + b.n a6a5c │ │ + add r0, pc, #176 @ (adr r0, a6fd4 ) │ │ + b.n a6a60 │ │ ands r4, r7 │ │ - b.n a6a58 │ │ + b.n a6a64 │ │ lsrs r3, r0, #16 │ │ - b.n a7556 │ │ + b.n a7562 │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ lsls r4, r3, #1 │ │ - b.n a6adc │ │ + b.n a6ae8 │ │ asrs r4, r6, #32 │ │ - b.n a726e │ │ + b.n a727a │ │ movs r5, r1 │ │ and.w r0, r0, r8, lsl #1 │ │ - b.n a6a68 │ │ + b.n a6a74 │ │ asrs r0, r0, #32 │ │ - b.n a76fa │ │ + b.n a7706 │ │ asrs r0, r6, #5 │ │ - b.n a6a3e │ │ + b.n a6a4a │ │ asrs r4, r6, #5 │ │ - b.n a6a42 │ │ + b.n a6a4e │ │ asrs r0, r7, #5 │ │ - b.n a6a46 │ │ + b.n a6a52 │ │ asrs r4, r7, #5 │ │ - b.n a6a4a │ │ + b.n a6a56 │ │ asrs r0, r0, #32 │ │ - b.n a768e │ │ + b.n a769a │ │ movs r6, r0 │ │ - b.n a6b04 │ │ + b.n a6b10 │ │ movs r0, r1 │ │ - b.n a7576 │ │ + b.n a7582 │ │ lsls r0, r1, #1 │ │ asrs r1, r3, #22 │ │ cmp r7, #86 @ 0x56 │ │ asrs r0, r0, #10 │ │ movs r0, #208 @ 0xd0 │ │ asrs r2, r0, #7 │ │ movs r0, #3 │ │ asrs r2, r2, #6 │ │ movs r0, r7 │ │ subs r0, r0, r0 │ │ movs r1, r1 │ │ - b.n a72ae │ │ + b.n a72ba │ │ movs r0, #4 │ │ - b.n a72b2 │ │ - ldr r1, [r1, #44] @ 0x2c │ │ + b.n a72be │ │ + ldr r2, [r1, #44] @ 0x2c │ │ add.w r0, r0, r0, lsl #1 │ │ - b.n a6ab4 │ │ + b.n a6ac0 │ │ movs r0, r0 │ │ - b.n a761e │ │ + b.n a762a │ │ movs r4, r6 │ │ asrs r5, r3, #22 │ │ movs r4, r0 │ │ asrs r0, r2, #5 │ │ lsls r6, r3, #1 │ │ ldr r2, [sp, #0] │ │ lsrs r0, r4, #2 │ │ - b.n a6acc │ │ + b.n a6ad8 │ │ movs r0, r0 │ │ - b.n a70b0 │ │ + b.n a70bc │ │ lsls r2, r3, #1 │ │ - b.n a6b36 │ │ + b.n a6b42 │ │ movs r3, r0 │ │ - b.n a763a │ │ + b.n a7646 │ │ lsls r4, r2, #6 │ │ cmp r2, #0 │ │ lsls r0, r1, #1 │ │ - b.n a6ad4 │ │ + b.n a6ae0 │ │ str r4, [r5, #0] │ │ - b.n a6ac6 │ │ + b.n a6ad2 │ │ movs r6, r0 │ │ - b.n a6b5c │ │ + b.n a6b68 │ │ movs r0, r1 │ │ - b.n a75ce │ │ + b.n a75da │ │ movs r4, r6 │ │ - b.n a6aec │ │ + b.n a6af8 │ │ strb r4, [r0, #0] │ │ - b.n a7036 │ │ + b.n a7042 │ │ movs r4, r2 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n a6af0 │ │ + b.n a6afc │ │ movs r0, #4 │ │ - b.n a7702 │ │ + b.n a770e │ │ asrs r4, r7, #32 │ │ - b.n a6b00 │ │ + b.n a6b0c │ │ movs r0, r0 │ │ - b.n a70cc │ │ + b.n a70d8 │ │ asrs r7, r0, #32 │ │ - b.n a730e │ │ - stmia r6!, {r0, r1, r4, r5, r7} │ │ + b.n a731a │ │ + stmia r6!, {r2, r4, r5, r7} │ │ add.w r0, r0, r0 │ │ - b.n a7676 │ │ + b.n a7682 │ │ lsls r7, r0, #1 │ │ lsrs r0, r0, #8 │ │ - stmia r6!, {r2, r3, r4} │ │ + stmia r6!, {r0, r2, r3, r4} │ │ @ instruction: 0xeb008000 │ │ - b.n a6b02 │ │ + b.n a6b0e │ │ movs r3, r1 │ │ - b.n a7696 │ │ + b.n a76a2 │ │ lsls r3, r0, #1 │ │ lsrs r0, r0, #8 │ │ movs r6, r4 │ │ - b.n a769e │ │ + b.n a76aa │ │ lsls r7, r3, #1 │ │ asrs r0, r3, #13 │ │ lsls r0, r0, #1 │ │ lsrs r0, r0, #8 │ │ movs r2, r4 │ │ and.w r2, r0, r0, lsr #11 │ │ - b.n a7390 │ │ + b.n a739c │ │ movs r0, #0 │ │ - b.n a7046 │ │ + b.n a7052 │ │ movs r0, #3 │ │ - b.n a732a │ │ + b.n a7336 │ │ @ instruction: 0xff991aff │ │ lsls r1, r7, #2 │ │ and.w r0, r0, r0, lsr #32 │ │ - b.n a6b44 │ │ + b.n a6b50 │ │ asrs r7, r0, #32 │ │ - b.n a7356 │ │ + b.n a7362 │ │ movs r0, #9 │ │ - b.n a775a │ │ + b.n a7766 │ │ movs r0, r0 │ │ - b.n a7126 │ │ - stmia r6!, {r0, r1, r2, r3, r4, r7} │ │ + b.n a7132 │ │ + stmia r6!, {r5, r7} │ │ add.w r0, r0, r0 │ │ - b.n a76c6 │ │ + b.n a76d2 │ │ movs r3, r6 │ │ lsrs r0, r0, #8 │ │ - stmia r6!, {r3} │ │ + stmia r6!, {r0, r3} │ │ @ instruction: 0xeb008000 │ │ - b.n a6b52 │ │ + b.n a6b5e │ │ movs r5, r4 │ │ - b.n a76e6 │ │ + b.n a76f2 │ │ movs r7, r1 │ │ ldmia r2!, {} │ │ movs r1, r0 │ │ - b.n a772e │ │ + b.n a773a │ │ @ instruction: 0xffdd0aff │ │ movs r3, r1 │ │ - b.n a76f6 │ │ + b.n a7702 │ │ @ instruction: 0xffdb0aff │ │ movs r5, r1 │ │ and.w r0, r0, r0, lsl #2 │ │ - b.n a7552 │ │ + b.n a755e │ │ movs r0, #208 @ 0xd0 │ │ - b.n a73d6 │ │ + b.n a73e2 │ │ ands r1, r0 │ │ - b.n a757e │ │ + b.n a758a │ │ str r0, [r0, r0] │ │ - b.n a75a4 │ │ + b.n a75b0 │ │ lsrs r0, r6 │ │ - b.n a73e2 │ │ + b.n a73ee │ │ ands r4, r7 │ │ - b.n a6ba0 │ │ + b.n a6bac │ │ @ instruction: 0xffbfeaff │ │ str r0, [sp, #128] @ 0x80 │ │ - b.n a6ba8 │ │ + b.n a6bb4 │ │ movs r1, r1 │ │ - b.n a73b2 │ │ - str r3, [sp, #748] @ 0x2ec │ │ + b.n a73be │ │ + str r3, [sp, #752] @ 0x2f0 │ │ @ instruction: 0xeb00ffa7 │ │ @ instruction: 0xeaff005f │ │ - b.n a772e │ │ + b.n a773a │ │ movs r6, r4 │ │ asrs r0, r3, #13 │ │ @ instruction: 0xffcc0aff │ │ movs r1, r0 │ │ - b.n a751a │ │ + b.n a7526 │ │ movs r3, r0 │ │ - b.n a776e │ │ + b.n a777a │ │ movs r1, r3 │ │ ldrh r0, [r0, #16] │ │ lsls r0, r1, #1 │ │ - b.n a6bc8 │ │ + b.n a6bd4 │ │ movs r6, r2 │ │ - b.n a774a │ │ + b.n a7756 │ │ movs r0, #40 @ 0x28 │ │ - b.n a6bbe │ │ + b.n a6bca │ │ lsls r4, r6, #4 │ │ subs r0, r0, r0 │ │ asrs r4, r3, #30 │ │ - b.n a6be4 │ │ + b.n a6bf0 │ │ movs r3, r0 │ │ - b.n a77ea │ │ + b.n a77f6 │ │ movs r6, r0 │ │ - b.n a7352 │ │ + b.n a735e │ │ asrs r1, r0, #32 │ │ - b.n a71d0 │ │ + b.n a71dc │ │ movs r2, r0 │ │ lsls r0, r0, #12 │ │ asrs r2, r3, #1 │ │ - b.n a6c5c │ │ + b.n a6c68 │ │ movs r1, r0 │ │ - b.n a735e │ │ + b.n a736a │ │ movs r0, r2 │ │ ldrh r0, [r0, #16] │ │ asrs r0, r0, #30 │ │ - b.n a6c04 │ │ + b.n a6c10 │ │ ands r6, r2 │ │ - b.n a780a │ │ + b.n a7816 │ │ adds r7, #124 @ 0x7c │ │ - b.n a6c0c │ │ + b.n a6c18 │ │ strb r4, [r7, #29] │ │ - b.n a6c10 │ │ + b.n a6c1c │ │ asrs r1, r0, #32 │ │ - b.n a71f4 │ │ + b.n a7200 │ │ adds r0, #3 │ │ - b.n a71f8 │ │ + b.n a7204 │ │ movs r0, #8 │ │ - b.n a6bf8 │ │ + b.n a6c04 │ │ movs r1, #3 │ │ - b.n a76e2 │ │ + b.n a76ee │ │ strb r7, [r0, #0] │ │ - b.n a7204 │ │ + b.n a7210 │ │ strb r0, [r0, #0] │ │ - b.n a6c04 │ │ + b.n a6c10 │ │ ands r4, r0 │ │ - b.n a6c08 │ │ + b.n a6c14 │ │ str r4, [r1, #0] │ │ - b.n a6c0c │ │ - beq.n a718c │ │ + b.n a6c18 │ │ + beq.n a7198 │ │ @ instruction: 0xebff0002 │ │ and.w r0, r0, r8, lsl #1 │ │ - b.n a6c30 │ │ + b.n a6c3c │ │ asrs r0, r6, #32 │ │ - b.n a6c3c │ │ + b.n a6c48 │ │ asrs r0, r5, #5 │ │ - b.n a6c06 │ │ + b.n a6c12 │ │ movs r4, r2 │ │ - b.n a6c3c │ │ + b.n a6c48 │ │ asrs r0, r1, #1 │ │ - b.n a7628 │ │ - stmia r6!, {r0, r1, r3, r4} │ │ + b.n a7634 │ │ + stmia r6!, {r2, r3, r4} │ │ add.w r0, r0, r0, asr #28 │ │ - b.n a7628 │ │ + b.n a7634 │ │ movs r0, r0 │ │ - b.n a77ba │ │ + b.n a77c6 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ - stmia r5!, {r0, r1, r3, r6, r7} │ │ + stmia r5!, {r2, r3, r6, r7} │ │ @ instruction: 0xeb008000 │ │ - b.n a6c46 │ │ + b.n a6c52 │ │ str r4, [r0, r1] │ │ - b.n a6c64 │ │ + b.n a6c70 │ │ movs r0, r0 │ │ - b.n a77de │ │ + b.n a77ea │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n a7876 │ │ + b.n a7882 │ │ movs r0, r0 │ │ - b.n a6c48 │ │ + b.n a6c54 │ │ movs r4, r0 │ │ - b.n a6c4c │ │ + b.n a6c58 │ │ lsls r6, r1, #1 │ │ and.w r0, r0, r4, lsl #21 │ │ - b.n a6c80 │ │ + b.n a6c8c │ │ asrs r4, r7, #1 │ │ - b.n a6c84 │ │ + b.n a6c90 │ │ lsls r0, r7, #1 │ │ - b.n a6c88 │ │ + b.n a6c94 │ │ lsls r0, r6, #3 │ │ - b.n a74e0 │ │ + b.n a74ec │ │ lsrs r2, r0, #32 │ │ - b.n a778a │ │ + b.n a7796 │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ lsls r0, r2, #3 │ │ - b.n a74ec │ │ + b.n a74f8 │ │ ands r4, r7 │ │ - b.n a6c9c │ │ + b.n a6ca8 │ │ movs r0, #4 │ │ - b.n a71a6 │ │ + b.n a71b2 │ │ movs r0, #1 │ │ - b.n a748e │ │ + b.n a749a │ │ movs r0, r6 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n a7212 │ │ + b.n a721e │ │ movs r0, r0 │ │ - b.n a7718 │ │ + b.n a7724 │ │ movs r4, r3 │ │ cmp r2, #0 │ │ movs r4, r2 │ │ - b.n a6cb0 │ │ + b.n a6cbc │ │ movs r0, #4 │ │ - b.n a74c2 │ │ + b.n a74ce │ │ adds r0, #0 │ │ - b.n a78c6 │ │ - adds r1, #97 @ 0x61 │ │ + b.n a78d2 │ │ + adds r1, #98 @ 0x62 │ │ @ instruction: 0xeb008000 │ │ - b.n a74ce │ │ + b.n a74da │ │ movs r0, r4 │ │ and.w r0, r0, r9 │ │ ldmia.w r7, {sp} │ │ - b.n a78da │ │ + b.n a78e6 │ │ ands r4, r7 │ │ - b.n a6cd8 │ │ + b.n a6ce4 │ │ asrs r4, r0, #32 │ │ - b.n a7242 │ │ + b.n a724e │ │ asrs r0, r0, #32 │ │ - b.n a774c │ │ + b.n a7758 │ │ movs r2, r0 │ │ cmp r2, #0 │ │ strb r7, [r7, #30] │ │ - b.n a77be │ │ + b.n a77ca │ │ ldrb r7, [r7, #31] │ │ - b.n a7850 │ │ + b.n a785c │ │ movs r0, r1 │ │ and.w r0, r0, r0, lsl #4 │ │ - b.n a7264 │ │ + b.n a7270 │ │ asrs r0, r0, #32 │ │ - b.n a77a4 │ │ + b.n a77b0 │ │ asrs r0, r0, #32 │ │ - b.n a7902 │ │ + b.n a790e │ │ asrs r1, r0, #32 │ │ adds r3, #0 │ │ strb r0, [r0, #0] │ │ - b.n a7272 │ │ + b.n a727e │ │ strb r0, [r0, #0] │ │ - b.n a77b4 │ │ + b.n a77c0 │ │ strb r0, [r0, #0] │ │ - b.n a7912 │ │ + b.n a791e │ │ strb r1, [r0, #0] │ │ adds r3, #0 │ │ strb r1, [r0, #0] │ │ - b.n a71e8 │ │ + b.n a71f4 │ │ str r0, [r0, #0] │ │ - b.n a7288 │ │ + b.n a7294 │ │ asrs r0, r3, #32 │ │ - b.n a6d14 │ │ + b.n a6d20 │ │ movs r0, #3 │ │ - b.n a738a │ │ + b.n a7396 │ │ movs r5, r0 │ │ adds r1, #160 @ 0xa0 │ │ movs r5, r2 │ │ and.w r1, r0, r1 │ │ - b.n a7826 │ │ + b.n a7832 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ movs r4, r2 │ │ - b.n a6d2c │ │ + b.n a6d38 │ │ asrs r4, r7, #32 │ │ - b.n a6d38 │ │ - stmia r6!, {r0, r1, r5, r6} │ │ + b.n a6d44 │ │ + stmia r6!, {r2, r5, r6} │ │ add.w r0, r0, r4, lsl #21 │ │ - b.n a6d40 │ │ + b.n a6d4c │ │ movs r0, r0 │ │ - b.n a78aa │ │ + b.n a78b6 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ - stmia r5!, {r0, r1, r2, r3, r7} │ │ + stmia r5!, {r4, r7} │ │ @ instruction: 0xeb008000 │ │ - b.n a6d36 │ │ + b.n a6d42 │ │ str r4, [r0, r1] │ │ - b.n a6d54 │ │ + b.n a6d60 │ │ movs r0, r0 │ │ - b.n a78ce │ │ + b.n a78da │ │ movs r6, r2 │ │ subs r0, r0, r0 │ │ ands r4, r7 │ │ - b.n a6d60 │ │ + b.n a6d6c │ │ asrs r0, r0, #32 │ │ - b.n a796a │ │ + b.n a7976 │ │ ands r0, r0 │ │ - b.n a6d3c │ │ + b.n a6d48 │ │ asrs r4, r0, #32 │ │ - b.n a6d40 │ │ + b.n a6d4c │ │ asrs r0, r3, #32 │ │ - b.n a6d68 │ │ + b.n a6d74 │ │ movs r4, r0 │ │ - b.n a757a │ │ + b.n a7586 │ │ strb r0, [r0, #0] │ │ - b.n a797e │ │ + b.n a798a │ │ movs r4, r0 │ │ - b.n a74e4 │ │ + b.n a74f0 │ │ movs r1, r0 │ │ adds r1, #160 @ 0xa0 │ │ movs r4, r3 │ │ - b.n a6d5c │ │ + b.n a6d68 │ │ movs r5, r0 │ │ - b.n a74f0 │ │ + b.n a74fc │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r2 │ │ - b.n a6d88 │ │ + b.n a6d94 │ │ lsls r3, r1, #1 │ │ ldr r2, [sp, #0] │ │ movs r0, r0 │ │ - b.n a7368 │ │ + b.n a7374 │ │ asrs r5, r0, #32 │ │ - b.n a72e4 │ │ - stmia r5!, {r1, r3, r4, r6, r7} │ │ + b.n a72f0 │ │ + stmia r5!, {r0, r1, r3, r4, r6, r7} │ │ add.w r0, r0, r0 │ │ - b.n a790a │ │ + b.n a7916 │ │ lsls r1, r5, #4 │ │ subs r0, r0, r0 │ │ str r0, [r3, r0] │ │ - b.n a6d84 │ │ + b.n a6d90 │ │ strh r7, [r0, #0] │ │ - b.n a75b6 │ │ + b.n a75c2 │ │ movs r0, r0 │ │ - b.n a792a │ │ + b.n a7936 │ │ lsls r6, r3, #2 │ │ lsrs r0, r0, #8 │ │ lsls r7, r7, #30 │ │ - b.n a7892 │ │ + b.n a789e │ │ lsrs r7, r7, #31 │ │ - b.n a7924 │ │ + b.n a7930 │ │ movs r0, r0 │ │ - b.n a753a │ │ + b.n a7546 │ │ movs r1, r0 │ │ asrs r0, r3, #13 │ │ movs r4, r2 │ │ subs r0, r0, r0 │ │ lsls r0, r2, #23 │ │ - b.n a6dd4 │ │ + b.n a6de0 │ │ movs r0, r0 │ │ - b.n a73b8 │ │ + b.n a73c4 │ │ lsls r2, r3, #1 │ │ - b.n a6e3e │ │ + b.n a6e4a │ │ movs r2, r0 │ │ - b.n a7942 │ │ + b.n a794e │ │ lsls r5, r0, #2 │ │ cmp r2, #0 │ │ movs r0, r2 │ │ - b.n a6ddc │ │ + b.n a6de8 │ │ ands r0, r7 │ │ - b.n a6de8 │ │ + b.n a6df4 │ │ movs r0, r0 │ │ - b.n a7952 │ │ + b.n a795e │ │ movs r5, r2 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #32 │ │ - b.n a6dec │ │ + b.n a6df8 │ │ lsls r4, r0, #4 │ │ - b.n a6df0 │ │ + b.n a6dfc │ │ asrs r2, r0, #4 │ │ - b.n a79c4 │ │ + b.n a79d0 │ │ asrs r4, r0, #32 │ │ - b.n a6dd8 │ │ + b.n a6de4 │ │ asrs r7, r7, #30 │ │ - b.n a78da │ │ + b.n a78e6 │ │ movs r0, r0 │ │ - b.n a796e │ │ + b.n a797a │ │ subs r7, r7, #7 │ │ - b.n a7970 │ │ + b.n a797c │ │ strh r2, [r1, #0] │ │ - b.n a7758 │ │ + b.n a7764 │ │ asrs r4, r0, #32 │ │ asrs r0, r2, #22 │ │ asrs r2, r0, #32 │ │ asrs r1, r0, #14 │ │ asrs r4, r0, #32 │ │ asrs r0, r0, #22 │ │ movs r1, r1 │ │ and.w r0, r0, r0 │ │ - b.n a799a │ │ + b.n a79a6 │ │ movs r3, r2 │ │ subs r0, r0, r0 │ │ str r0, [r3, r0] │ │ - b.n a6e24 │ │ + b.n a6e30 │ │ movs r4, r3 │ │ - b.n a6e28 │ │ + b.n a6e34 │ │ str r4, [r5, r3] │ │ - b.n a6e0c │ │ + b.n a6e18 │ │ lsls r0, r6, #3 │ │ - b.n a6e10 │ │ + b.n a6e1c │ │ movs r1, r1 │ │ - b.n a7642 │ │ - bfcsel a, a7b02 , c, gt │ │ + b.n a764e │ │ + bfcsel a, a7b0e , c, gt │ │ strh r0, [r0, #0] │ │ - b.n a7a4a │ │ + b.n a7a56 │ │ ands r0, r7 │ │ - b.n a6e48 │ │ + b.n a6e54 │ │ movs r0, r6 │ │ - b.n a6e44 │ │ + b.n a6e50 │ │ movs r0, r0 │ │ - b.n a79b6 │ │ + b.n a79c2 │ │ lsrs r3, r0, #16 │ │ asrs r2, r3, #8 │ │ movs r1, r1 │ │ asrs r0, r4, #6 │ │ - str r3, [sp, #64] @ 0x40 │ │ + str r3, [sp, #68] @ 0x44 │ │ subs r0, r0, r4 │ │ movs r4, r0 │ │ - b.n a7666 │ │ - stmia r5!, {r0, r2, r3, r5, r6, r7} │ │ + b.n a7672 │ │ + stmia r5!, {r1, r2, r3, r5, r6, r7} │ │ add.w r0, r0, r0 │ │ - b.n a79ce │ │ + b.n a79da │ │ movs r5, r5 │ │ subs r0, r0, r0 │ │ movs r0, r1 │ │ - b.n a7676 │ │ - beq.n a7370 │ │ - b.n a77d0 │ │ + b.n a7682 │ │ + beq.n a737c │ │ + b.n a77dc │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r5, r8, sl} │ │ - b.n a6e80 │ │ + b.n a6e8c │ │ movs r0, r0 │ │ - b.n a7464 │ │ + b.n a7470 │ │ lsls r2, r3, #1 │ │ - b.n a6eea │ │ + b.n a6ef6 │ │ movs r0, r0 │ │ - b.n a79ee │ │ + b.n a79fa │ │ @ instruction: 0xffd40aff │ │ asrs r0, r4, #20 │ │ - b.n a6e94 │ │ + b.n a6ea0 │ │ movs r0, #8 │ │ - b.n a7874 │ │ + b.n a7880 │ │ adds r5, #28 │ │ - b.n a6e9c │ │ + b.n a6ea8 │ │ movs r4, r6 │ │ - b.n a6e9c │ │ + b.n a6ea8 │ │ asrs r1, r0, #32 │ │ - b.n a7484 │ │ + b.n a7490 │ │ movs r0, r0 │ │ - b.n a6e84 │ │ + b.n a6e90 │ │ adds r0, #3 │ │ - b.n a748c │ │ + b.n a7498 │ │ movs r4, r7 │ │ - b.n a6eac │ │ + b.n a6eb8 │ │ movs r4, r0 │ │ - b.n a6e90 │ │ + b.n a6e9c │ │ movs r4, r4 │ │ - b.n a6eb4 │ │ + b.n a6ec0 │ │ lsls r1, r4, #4 │ │ stmia.w r2, {r0} │ │ - b.n a7ac2 │ │ + b.n a7ace │ │ movs r1, #63 @ 0x3f │ │ - b.n a7986 │ │ + b.n a7992 │ │ lsls r1, r3, #1 │ │ and.w r4, r0, sl, lsr #13 │ │ - b.n a734e │ │ + b.n a735a │ │ movs r0, #5 │ │ - b.n a76d2 │ │ - stmia r6!, {r1} │ │ + b.n a76de │ │ + stmia r6!, {r0, r1} │ │ add.w r0, r0, r1 │ │ - b.n a7a7a │ │ + b.n a7a86 │ │ movs r6, r3 │ │ lsrs r0, r0, #8 │ │ str r1, [r1, #0] │ │ - b.n a76e2 │ │ + b.n a76ee │ │ asrs r0, r2, #32 │ │ - b.n a6ed2 │ │ + b.n a6ede │ │ movs r0, #10 │ │ - b.n a7aea │ │ + b.n a7af6 │ │ str r0, [r3, r0] │ │ - b.n a6eba │ │ + b.n a6ec6 │ │ movs r0, r0 │ │ - b.n a7654 │ │ + b.n a7660 │ │ asrs r5, r0, #32 │ │ - b.n a76f6 │ │ + b.n a7702 │ │ movs r0, r2 │ │ asrs r6, r0, #22 │ │ ands r4, r3 │ │ - b.n a6eca │ │ - stmia r5!, {r0, r1, r2, r4, r5, r7} │ │ + b.n a6ed6 │ │ + stmia r5!, {r3, r4, r5, r7} │ │ add.w r0, r0, r0 │ │ - b.n a7a66 │ │ + b.n a7a72 │ │ lsls r5, r2, #3 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n a6efa │ │ + b.n a6f06 │ │ movs r0, #15 │ │ - b.n a7b12 │ │ + b.n a7b1e │ │ asrs r0, r3, #32 │ │ - b.n a6f02 │ │ - stmia r5!, {r0, r4, r5, r7} │ │ + b.n a6f0e │ │ + stmia r5!, {r1, r4, r5, r7} │ │ @ instruction: 0xeb008007 │ │ - b.n a771e │ │ + b.n a772a │ │ str r0, [sp, #24] │ │ - b.n a7722 │ │ + b.n a772e │ │ str r4, [r0, r1] │ │ - b.n a6f20 │ │ + b.n a6f2c │ │ @ instruction: 0xffa2eaff │ │ asrs r0, r2, #18 │ │ - b.n a6f2c │ │ + b.n a6f38 │ │ movs r1, #93 @ 0x5d │ │ - b.n a79f2 │ │ + b.n a79fe │ │ adds r4, #140 @ 0x8c │ │ - b.n a6f34 │ │ + b.n a6f40 │ │ asrs r1, r0, #32 │ │ - b.n a7518 │ │ + b.n a7524 │ │ movs r0, r0 │ │ - b.n a6f18 │ │ + b.n a6f24 │ │ adds r0, #3 │ │ - b.n a7520 │ │ + b.n a752c │ │ movs r0, r0 │ │ - b.n a7b46 │ │ + b.n a7b52 │ │ ldmia r7, {r0, r1, r2, r7} │ │ @ instruction: 0xebff07bf │ │ - b.n a7a1e │ │ + b.n a7a2a │ │ lsrs r7, r7, #31 │ │ - b.n a7ab0 │ │ + b.n a7abc │ │ strh r2, [r1, #0] │ │ - b.n a7896 │ │ + b.n a78a2 │ │ @ instruction: 0xffc5eaff │ │ - stmia r5!, {r2, r3} │ │ + stmia r5!, {r0, r2, r3} │ │ @ instruction: 0xeb008000 │ │ - b.n a6f42 │ │ + b.n a6f4e │ │ asrs r7, r7, #30 │ │ - b.n a7a36 │ │ + b.n a7a42 │ │ str r0, [r0, #0] │ │ - b.n a776a │ │ + b.n a7776 │ │ subs r7, r7, #7 │ │ - b.n a7acc │ │ + b.n a7ad8 │ │ movs r3, r1 │ │ - b.n a78c2 │ │ + b.n a78ce │ │ movs r2, r0 │ │ - b.n a7ad6 │ │ + b.n a7ae2 │ │ lsls r2, r5, #1 │ │ subs r2, #0 │ │ str r4, [r0, r1] │ │ - b.n a6f78 │ │ + b.n a6f84 │ │ movs r0, r0 │ │ - b.n a7af2 │ │ + b.n a7afe │ │ lsls r2, r2, #2 │ │ lsrs r0, r0, #8 │ │ movs r6, r1 │ │ - b.n a7afa │ │ + b.n a7b06 │ │ @ instruction: 0xff891aff │ │ adds r0, #16 │ │ - b.n a7964 │ │ + b.n a7970 │ │ ands r3, r0 │ │ - b.n a7b96 │ │ + b.n a7ba2 │ │ lsls r2, r0, #28 │ │ - b.n a7a8e │ │ + b.n a7a9a │ │ movs r5, r1 │ │ ldmia.w r3, {r0, lr} │ │ lsls r0, r0, #12 │ │ asrs r3, r0, #32 │ │ - b.n a74f0 │ │ + b.n a74fc │ │ movs r0, #240 @ 0xf0 │ │ - b.n a7804 │ │ + b.n a7810 │ │ movs r0, r0 │ │ - b.n a7574 │ │ + b.n a7580 │ │ adds r0, #1 │ │ - b.n a7a7a │ │ + b.n a7a86 │ │ movs r0, #4 │ │ - b.n a77b6 │ │ + b.n a77c2 │ │ adds r0, #16 │ │ - b.n a7afa │ │ - stmia r5!, {r4, r6} │ │ + b.n a7b06 │ │ + stmia r5!, {r0, r4, r6} │ │ add.w r0, r0, r0, lsl #8 │ │ - b.n a77c2 │ │ + b.n a77ce │ │ movs r0, r2 │ │ - b.n a6fb8 │ │ + b.n a6fc4 │ │ asrs r0, r3, #32 │ │ - b.n a6fbc │ │ + b.n a6fc8 │ │ adds r0, #0 │ │ - b.n a7590 │ │ + b.n a759c │ │ movs r3, r0 │ │ - b.n a7736 │ │ + b.n a7742 │ │ lsls r4, r5, #1 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n a7b7e │ │ + b.n a7b8a │ │ lsls r7, r5, #1 │ │ lsrs r0, r0, #8 │ │ str r4, [r0, r1] │ │ - b.n a6fdc │ │ + b.n a6fe8 │ │ movs r2, r0 │ │ - b.n a77e6 │ │ + b.n a77f2 │ │ asrs r1, r0, #32 │ │ - b.n a7534 │ │ - stmia r5!, {r3, r6} │ │ + b.n a7540 │ │ + stmia r5!, {r0, r3, r6} │ │ add.w r0, r0, r0 │ │ - b.n a7b52 │ │ + b.n a7b5e │ │ lsls r4, r6, #1 │ │ lsrs r0, r0, #8 │ │ strh r0, [r0, #0] │ │ - b.n a6fe6 │ │ + b.n a6ff2 │ │ vpmin.u32 q15, , │ │ asrs r0, r5, #14 │ │ - b.n a7000 │ │ + b.n a700c │ │ movs r0, #8 │ │ - b.n a79e0 │ │ + b.n a79ec │ │ adds r3, #164 @ 0xa4 │ │ - b.n a7008 │ │ + b.n a7014 │ │ movs r4, r6 │ │ - b.n a7008 │ │ + b.n a7014 │ │ asrs r1, r0, #32 │ │ - b.n a75f0 │ │ + b.n a75fc │ │ movs r0, r0 │ │ - b.n a6ff0 │ │ + b.n a6ffc │ │ adds r0, #3 │ │ - b.n a75f8 │ │ + b.n a7604 │ │ movs r4, r7 │ │ - b.n a7018 │ │ + b.n a7024 │ │ movs r4, r0 │ │ - b.n a6ffc │ │ + b.n a7008 │ │ movs r4, r4 │ │ - b.n a7020 │ │ + b.n a702c │ │ lsls r1, r4, #4 │ │ stmia.w r2, {r1} │ │ - b.n a7c2e │ │ + b.n a7c3a │ │ cmp r7, #81 @ 0x51 │ │ - b.n a7c32 │ │ + b.n a7c3e │ │ ldmia r7!, {r2, r3, r6} │ │ @ instruction: 0xebffff6a │ │ @ instruction: 0xeaff0048 │ │ - b.n a7030 │ │ + b.n a703c │ │ movs r0, #0 │ │ - b.n a7c42 │ │ + b.n a7c4e │ │ asrs r0, r6, #32 │ │ - b.n a7040 │ │ + b.n a704c │ │ asrs r0, r5, #5 │ │ - b.n a700a │ │ + b.n a7016 │ │ movs r6, r0 │ │ - b.n a70c0 │ │ + b.n a70cc │ │ lsls r0, r0, #2 │ │ - b.n a7b32 │ │ + b.n a7b3e │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ movs r4, r6 │ │ - b.n a7054 │ │ + b.n a7060 │ │ asrs r0, r0, #32 │ │ - b.n a79de │ │ + b.n a79ea │ │ movs r4, r7 │ │ - b.n a705c │ │ + b.n a7068 │ │ lsls r1, r1, #28 │ │ add.w r0, r0, r4, lsl #21 │ │ - b.n a7064 │ │ + b.n a7070 │ │ movs r0, #0 │ │ - b.n a786e │ │ + b.n a787a │ │ movs r0, r0 │ │ - b.n a7bd2 │ │ + b.n a7bde │ │ movs r0, #1 │ │ asrs r0, r0, #12 │ │ movs r4, r4 │ │ - b.n a7074 │ │ + b.n a7080 │ │ adds r0, #1 │ │ - b.n a7c7e │ │ + b.n a7c8a │ │ movs r0, r0 │ │ - b.n a77ec │ │ + b.n a77f8 │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n a707c │ │ + b.n a7088 │ │ asrs r0, r5, #32 │ │ - b.n a7088 │ │ + b.n a7094 │ │ adds r0, #1 │ │ - b.n a75f2 │ │ + b.n a75fe │ │ adds r0, #1 │ │ asrs r0, r0, #12 │ │ asrs r0, r6, #32 │ │ - b.n a7094 │ │ + b.n a70a0 │ │ movs r1, r1 │ │ - b.n a789e │ │ + b.n a78aa │ │ ldmia r7!, {r1, r3, r4, r5} │ │ @ instruction: 0xebff8000 │ │ - b.n a78a6 │ │ + b.n a78b2 │ │ str r4, [r0, r1] │ │ - b.n a70a4 │ │ + b.n a70b0 │ │ vpmin.u8 q15, , │ │ - add r0, pc, #176 @ (adr r0, a7620 ) │ │ - b.n a70ac │ │ + add r0, pc, #176 @ (adr r0, a762c ) │ │ + b.n a70b8 │ │ mcr2 10, 3, lr, cr9, cr15, {7} @ │ │ lsls r0, r3, #11 │ │ - b.n a70b8 │ │ + b.n a70c4 │ │ str r4, [r0, r1] │ │ - b.n a70b8 │ │ + b.n a70c4 │ │ movs r0, r0 │ │ - b.n a76a0 │ │ + b.n a76ac │ │ lsls r2, r3, #1 │ │ - b.n a7126 │ │ + b.n a7132 │ │ movs r0, r0 │ │ - b.n a7c2a │ │ + b.n a7c36 │ │ vpmin.u q0, , │ │ asrs r4, r0, #11 │ │ - b.n a70d0 │ │ + b.n a70dc │ │ str r6, [r0, r0] │ │ - b.n a78d6 │ │ + b.n a78e2 │ │ adds r2, #192 @ 0xc0 │ │ - b.n a70d8 │ │ + b.n a70e4 │ │ stmia r2!, {r6, r7} │ │ - b.n a70dc │ │ + b.n a70e8 │ │ asrs r1, r0, #32 │ │ - b.n a76c0 │ │ + b.n a76cc │ │ strb r4, [r7, #10] │ │ - b.n a70e4 │ │ + b.n a70f0 │ │ adds r0, #3 │ │ - b.n a76c8 │ │ + b.n a76d4 │ │ movs r4, r7 │ │ - b.n a70e8 │ │ + b.n a70f4 │ │ stmia r0!, {r2, r3} │ │ - b.n a76d0 │ │ + b.n a76dc │ │ str r4, [r6, #0] │ │ - b.n a70f0 │ │ + b.n a70fc │ │ strb r7, [r0, #0] │ │ - b.n a76d8 │ │ + b.n a76e4 │ │ movs r0, r1 │ │ - b.n a70d8 │ │ + b.n a70e4 │ │ str r0, [r0, #0] │ │ - b.n a764e │ │ + b.n a765a │ │ movs r0, r2 │ │ - b.n a7ae0 │ │ + b.n a7aec │ │ lsls r4, r4, #4 │ │ stmia.w r0, {r0} │ │ - b.n a7d0e │ │ + b.n a7d1a │ │ movs r1, #9 │ │ - b.n a7bd2 │ │ + b.n a7bde │ │ stmia r0!, {} │ │ - b.n a70f0 │ │ + b.n a70fc │ │ strb r4, [r0, #0] │ │ - b.n a70f4 │ │ + b.n a7100 │ │ str r4, [r1, #0] │ │ - b.n a70f8 │ │ + b.n a7104 │ │ ldmia r7!, {r0, r4} │ │ @ instruction: 0xebffffdf │ │ @ instruction: 0xeaff5044 │ │ - b.n a7124 │ │ + b.n a7130 │ │ strh r1, [r0, #0] │ │ - b.n a792e │ │ + b.n a793a │ │ vpmin.u32 q7, , │ │ lsls r4, r7, #8 │ │ - b.n a7134 │ │ + b.n a7140 │ │ movs r0, #92 @ 0x5c │ │ - b.n a71ac │ │ + b.n a71b8 │ │ asrs r0, r7, #8 │ │ - b.n a713c │ │ + b.n a7148 │ │ movs r0, r0 │ │ - b.n a7720 │ │ + b.n a772c │ │ adds r2, #52 @ 0x34 │ │ - b.n a7144 │ │ + b.n a7150 │ │ strb r4, [r0, #0] │ │ - b.n a713c │ │ + b.n a7148 │ │ asrs r1, r0, #32 │ │ - b.n a772c │ │ + b.n a7738 │ │ str r4, [r5, #32] │ │ - b.n a7150 │ │ + b.n a715c │ │ adds r0, #3 │ │ - b.n a7734 │ │ + b.n a7740 │ │ lsls r2, r0, #28 │ │ - b.n a7c48 │ │ + b.n a7c54 │ │ str r6, [r0, #0] │ │ - b.n a773c │ │ + b.n a7748 │ │ str r0, [r0, #0] │ │ asrs r0, r4, #6 │ │ movs r4, r6 │ │ - b.n a7160 │ │ + b.n a716c │ │ str r0, [r0, #0] │ │ - b.n a7144 │ │ + b.n a7150 │ │ lsls r0, r6, #8 │ │ - b.n a796e │ │ + b.n a797a │ │ movs r0, #48 @ 0x30 │ │ - b.n a716c │ │ + b.n a7178 │ │ movs r0, #4 │ │ - b.n a7150 │ │ + b.n a715c │ │ movs r0, #232 @ 0xe8 │ │ - b.n a7d7a │ │ + b.n a7d86 │ │ movs r0, r1 │ │ - b.n a7158 │ │ + b.n a7164 │ │ movs r3, r0 │ │ - b.n a7d82 │ │ + b.n a7d8e │ │ ldmia r6, {r3, r4, r5, r6, r7} │ │ @ instruction: 0xebfffe54 │ │ @ instruction: 0xeaff5044 │ │ - b.n a7188 │ │ + b.n a7194 │ │ movs r1, r0 │ │ - b.n a7d32 │ │ + b.n a7d3e │ │ movs r4, r1 │ │ lsrs r0, r0, #8 │ │ str r1, [r1, #0] │ │ - b.n a799a │ │ + b.n a79a6 │ │ movs r7, r4 │ │ @ instruction: 0xea008000 │ │ - b.n a718e │ │ + b.n a719a │ │ str r4, [r0, r1] │ │ - b.n a71a0 │ │ + b.n a71ac │ │ movs r6, r2 │ │ - b.n a7d1a │ │ + b.n a7d26 │ │ vpmin.u8 q4, , │ │ movs r1, r0 │ │ - b.n a7db2 │ │ + b.n a7dbe │ │ adds r1, r0, r0 │ │ - b.n a7c78 │ │ + b.n a7c84 │ │ lsrs r0, r2, #32 │ │ - b.n a789c │ │ + b.n a78a8 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ adds r2, r0, r1 │ │ - b.n a7dc2 │ │ + b.n a7dce │ │ lsrs r0, r2, #32 │ │ - b.n a78a8 │ │ + b.n a78b4 │ │ mrc2 10, 7, r0, cr10, cr15, {7} @ │ │ lsrs r2, r0, #16 │ │ - b.n a7cc2 │ │ + b.n a7cce │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ strh r7, [r7, #60] @ 0x3c │ │ - b.n a7ca6 │ │ + b.n a7cb2 │ │ ldrh r7, [r7, #62] @ 0x3e │ │ - b.n a7d38 │ │ + b.n a7d44 │ │ mrc2 10, 7, lr, cr12, cr15, {7} @ │ │ movs r0, r2 │ │ - b.n a71d4 │ │ + b.n a71e0 │ │ asrs r0, r3, #32 │ │ - b.n a71d8 │ │ + b.n a71e4 │ │ eors r0, r0 │ │ - b.n a71c4 │ │ + b.n a71d0 │ │ str r0, [r4, #0] │ │ - b.n a71c8 │ │ - stmia r4!, {r0, r1, r2, r6, r7} │ │ + b.n a71d4 │ │ + stmia r4!, {r3, r6, r7} │ │ add.w r0, r0, r0 │ │ - b.n a7d56 │ │ + b.n a7d62 │ │ movs r4, r3 │ │ subs r0, r0, r0 │ │ ands r1, r0 │ │ - b.n a7cc6 │ │ + b.n a7cd2 │ │ strh r4, [r0, #2] │ │ - b.n a71fc │ │ + b.n a7208 │ │ movs r0, #20 │ │ - b.n a71f8 │ │ + b.n a7204 │ │ adds r0, #0 │ │ - b.n a7e0a │ │ + b.n a7e16 │ │ movs r0, r2 │ │ - b.n a7200 │ │ + b.n a720c │ │ ldrb r1, [r0, r0] │ │ - b.n a7b06 │ │ + b.n a7b12 │ │ ands r0, r2 │ │ - b.n a7d56 │ │ + b.n a7d62 │ │ movs r0, #240 @ 0xf0 │ │ - b.n a7a74 │ │ + b.n a7a80 │ │ movs r0, #64 @ 0x40 │ │ - b.n a7218 │ │ + b.n a7224 │ │ ands r1, r0 │ │ asrs r4, r0, #12 │ │ asrs r0, r1, #32 │ │ - b.n a7a26 │ │ + b.n a7a32 │ │ adds r0, #4 │ │ - b.n a7a2a │ │ + b.n a7a36 │ │ str r1, [r1, #0] │ │ - b.n a7a2e │ │ - stmia r4!, {r0, r1, r4, r5, r7} │ │ + b.n a7a3a │ │ + stmia r4!, {r2, r4, r5, r7} │ │ add.w r0, r0, r1 │ │ - b.n a7dd6 │ │ + b.n a7de2 │ │ movs r7, r1 │ │ lsrs r0, r0, #8 │ │ str r0, [r1, r0] │ │ - b.n a7a3e │ │ + b.n a7a4a │ │ ands r4, r7 │ │ - b.n a723c │ │ + b.n a7248 │ │ vpmin.u32 q7, q11, │ │ strh r0, [r0, #0] │ │ - b.n a7a4a │ │ + b.n a7a56 │ │ vpmin.u8 q7, q12, │ │ - add r0, pc, #176 @ (adr r0, a77c0 ) │ │ - b.n a724c │ │ + add r0, pc, #176 @ (adr r0, a77cc ) │ │ + b.n a7258 │ │ @ instruction: 0xff93eaff │ │ - stmia r4!, {r0, r2, r3, r6} │ │ + stmia r4!, {r1, r2, r3, r6} │ │ @ instruction: 0xeb008000 │ │ - b.n a723e │ │ + b.n a724a │ │ mrc2 10, 6, lr, cr4, cr15, {7} @ │ │ - stmia r4!, {r1, r3, r6} │ │ + stmia r4!, {r0, r1, r3, r6} │ │ @ instruction: 0xeb008000 │ │ - b.n a724a │ │ + b.n a7256 │ │ vpmin.u32 q7, , │ │ movs r0, r4 │ │ - b.n a726c │ │ + b.n a7278 │ │ strh r0, [r0, #0] │ │ - b.n a7256 │ │ + b.n a7262 │ │ vpmin.u32 q7, , │ │ strh r4, [r0, #0] │ │ - b.n a7a7e │ │ + b.n a7a8a │ │ ands r5, r0 │ │ - b.n a7a82 │ │ + b.n a7a8e │ │ movs r0, r0 │ │ - b.n a7df0 │ │ - add r0, pc, #176 @ (adr r0, a77f8 ) │ │ - b.n a7264 │ │ + b.n a7dfc │ │ + add r0, pc, #176 @ (adr r0, a7804 ) │ │ + b.n a7270 │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ movs r0, r4 │ │ - b.n a728c │ │ + b.n a7298 │ │ movs r0, r0 │ │ - b.n a7276 │ │ + b.n a7282 │ │ movs r6, r2 │ │ - b.n a7dfa │ │ + b.n a7e06 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ movs r0, #20 │ │ - b.n a728e │ │ + b.n a729a │ │ adds r0, #0 │ │ - b.n a7ea6 │ │ + b.n a7eb2 │ │ movs r0, r2 │ │ - b.n a7296 │ │ + b.n a72a2 │ │ movs r0, #240 @ 0xf0 │ │ - b.n a7b08 │ │ + b.n a7b14 │ │ adds r0, #17 │ │ - b.n a7d7a │ │ + b.n a7d86 │ │ asrs r4, r0, #1 │ │ - b.n a72b0 │ │ + b.n a72bc │ │ movs r0, #64 @ 0x40 │ │ - b.n a72b4 │ │ - stmia r4!, {r4, r7} │ │ + b.n a72c0 │ │ + stmia r4!, {r0, r4, r7} │ │ add.w r0, r0, r1 │ │ - b.n a7e62 │ │ + b.n a7e6e │ │ movs r6, r4 │ │ subs r0, r0, r0 │ │ movs r0, #20 │ │ - b.n a72b6 │ │ + b.n a72c2 │ │ adds r0, #0 │ │ - b.n a7ece │ │ + b.n a7eda │ │ movs r0, r2 │ │ - b.n a72be │ │ + b.n a72ca │ │ asrs r0, r3, #32 │ │ - b.n a72c2 │ │ + b.n a72ce │ │ movs r0, #240 @ 0xf0 │ │ - b.n a7b34 │ │ + b.n a7b40 │ │ adds r0, #8 │ │ - b.n a7ade │ │ + b.n a7aea │ │ movs r0, #64 @ 0x40 │ │ - b.n a72dc │ │ - stmia r4!, {r1, r2, r7} │ │ + b.n a72e8 │ │ + stmia r4!, {r0, r1, r2, r7} │ │ add.w r0, r0, r1 │ │ - b.n a7e8a │ │ + b.n a7e96 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ str r0, [r3, r0] │ │ - b.n a72de │ │ + b.n a72ea │ │ strb r7, [r7, #30] │ │ - b.n a7dc6 │ │ - add r0, pc, #176 @ (adr r0, a7868 ) │ │ - b.n a72f4 │ │ + b.n a7dd2 │ │ + add r0, pc, #176 @ (adr r0, a7874 ) │ │ + b.n a7300 │ │ ldrb r7, [r7, #31] │ │ - b.n a7e5c │ │ + b.n a7e68 │ │ @ instruction: 0xffceeaff │ │ movs r0, r0 │ │ - b.n a7e6e │ │ + b.n a7e7a │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ movs r0, r4 │ │ - b.n a7308 │ │ + b.n a7314 │ │ movs r0, r0 │ │ - b.n a72f2 │ │ + b.n a72fe │ │ movs r6, r2 │ │ - b.n a7e76 │ │ + b.n a7e82 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ movs r0, #20 │ │ - b.n a730a │ │ + b.n a7316 │ │ adds r0, #0 │ │ - b.n a7f22 │ │ + b.n a7f2e │ │ movs r0, r2 │ │ - b.n a7312 │ │ + b.n a731e │ │ asrs r0, r3, #32 │ │ - b.n a7316 │ │ + b.n a7322 │ │ movs r0, #240 @ 0xf0 │ │ - b.n a7b88 │ │ + b.n a7b94 │ │ adds r0, #17 │ │ - b.n a7dfa │ │ + b.n a7e06 │ │ movs r0, #64 @ 0x40 │ │ - b.n a7330 │ │ - stmia r4!, {r0, r4, r5, r6} │ │ + b.n a733c │ │ + stmia r4!, {r1, r4, r5, r6} │ │ add.w r0, r0, r1 │ │ - b.n a7ede │ │ + b.n a7eea │ │ @ instruction: 0xffea1aff │ │ movs r0, r0 │ │ - b.n a7f46 │ │ + b.n a7f52 │ │ str r0, [sp, #24] │ │ - b.n a7b4a │ │ + b.n a7b56 │ │ movs r0, r3 │ │ - b.n a731a │ │ + b.n a7326 │ │ movs r4, r3 │ │ - b.n a731e │ │ + b.n a732a │ │ movs r0, r2 │ │ - b.n a7322 │ │ + b.n a732e │ │ movs r0, r4 │ │ - b.n a7354 │ │ - add r0, pc, #176 @ (adr r0, a78cc ) │ │ - b.n a7358 │ │ + b.n a7360 │ │ + add r0, pc, #176 @ (adr r0, a78d8 ) │ │ + b.n a7364 │ │ @ instruction: 0xffc3eaff │ │ str r4, [r0, r1] │ │ - b.n a7360 │ │ - add r0, pc, #176 @ (adr r0, a78d8 ) │ │ - b.n a7364 │ │ + b.n a736c │ │ + add r0, pc, #176 @ (adr r0, a78e4 ) │ │ + b.n a7370 │ │ @ instruction: 0xffb3eaff │ │ - ldrb r4, [r4, #8] │ │ + ldrb r0, [r7, #8] │ │ movs r3, r0 │ │ - ldrb r4, [r7, #2] │ │ + ldrb r0, [r2, #3] │ │ movs r3, r0 │ │ - cmp r3, #45 @ 0x2d │ │ - @ instruction: 0xfff64ed5 │ │ - vqshlu.s32 d23, d31, #22 │ │ - @ instruction: 0xfff658d1 │ │ - vqshl.u64 d23, d12, #54 @ 0x36 │ │ - movs r3, r0 │ │ - strb r5, [r1, r0] │ │ - vrintz.f16 q11, q13 │ │ - vcvt.bf16.f32 d17, │ │ - vqmovn.u32 d23, q6 │ │ - movs r3, r0 │ │ - ldr r7, [pc, #260] @ (a7960 ) │ │ - vrsra.u64 , q13, #10 │ │ - vcvt.u32.f32 q9, q14, #10 │ │ - vqshrn.u64 d21, , #10 │ │ - vsli.64 d23, d20, #54 @ 0x36 │ │ + cmp r4, #6 │ │ + vqrdmlah.s q10, q11, d20[0] │ │ + vrintp.f16 , │ │ + vtbx.8 d21, {d6-d7}, d8 │ │ + vqshl.u64 d23, d16, #54 @ 0x36 │ │ + movs r3, r0 │ │ + strb r4, [r3, r0] │ │ + vqshlu.s64 d22, d27, #54 @ 0x36 │ │ + vrintm.f16 d17, d29 │ │ + vqmovn.u32 d23, q8 │ │ + movs r3, r0 │ │ + ldr r7, [pc, #320] @ (a79a8 ) │ │ + vsri.32 d21, d3, #10 │ │ + @ instruction: 0xfff62fa7 │ │ + vtbl.8 d21, {d22-d23}, d28 │ │ + vrintz.f16 , q4 │ │ movs r3, r0 │ │ - str r1, [r2, r0] │ │ - vqrdmlsh.s , q11, d3[0] │ │ - vrinta.f16 d23, d8 │ │ + str r0, [r4, r0] │ │ + @ instruction: 0xfff61ff8 │ │ + vsli.32 d23, d12, #22 │ │ movs r3, r0 │ │ - str r5, [r7, r5] │ │ - @ instruction: 0xfff6299a │ │ - vtrn.16 , │ │ - vsri.32 d24, d0, #10 │ │ + str r4, [r1, r6] │ │ + vtbx.8 d18, {d6-d8}, d19 │ │ + vshr.u64 , q12, #10 │ │ + vsri.64 d24, d10, #10 │ │ @ instruction: 0xfff64ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n a7dac │ │ + b.n a7db8 │ │ svc 77 @ 0x4d │ │ - b.n a7d30 │ │ + b.n a7d3c │ │ str r0, [r0, #0] │ │ - b.n a7bda │ │ + b.n a7be6 │ │ movs r0, r0 │ │ - b.n a7444 │ │ + b.n a7450 │ │ str r0, [sp, #8] │ │ - b.n a7be2 │ │ + b.n a7bee │ │ movs r4, r5 │ │ - b.n a73c0 │ │ + b.n a73cc │ │ movs r0, #1 │ │ - b.n a7450 │ │ - b.n a78ae │ │ - b.n a7bee │ │ + b.n a745c │ │ + b.n a78ba │ │ + b.n a7bfa │ │ lsls r4, r3, #1 │ │ - b.n a745e │ │ - add r0, pc, #12 @ (adr r0, a78c0 ) │ │ - b.n a7bf6 │ │ + b.n a746a │ │ + add r0, pc, #12 @ (adr r0, a78cc ) │ │ + b.n a7c02 │ │ asrs r0, r2, #32 │ │ - b.n a73e6 │ │ + b.n a73f2 │ │ lsrs r1, r0, #32 │ │ - b.n a7efa │ │ + b.n a7f06 │ │ movs r0, #40 @ 0x28 │ │ - b.n a73dc │ │ + b.n a73e8 │ │ strh r2, [r2, #0] │ │ - b.n a79c8 │ │ + b.n a79d4 │ │ lsls r2, r0, #6 │ │ - b.n a79d0 │ │ + b.n a79dc │ │ str r0, [sp, #240] @ 0xf0 │ │ - b.n a73e8 │ │ + b.n a73f4 │ │ lsls r0, r3, #3 │ │ - b.n a7c52 │ │ + b.n a7c5e │ │ movs r0, r7 │ │ - b.n a73f0 │ │ + b.n a73fc │ │ asrs r4, r6, #32 │ │ - b.n a73f4 │ │ + b.n a7400 │ │ str r0, [r0, #4] │ │ - b.n a73f8 │ │ + b.n a7404 │ │ lsls r0, r2, #1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r1, #1 │ │ - b.n a7412 │ │ + b.n a741e │ │ movs r0, r2 │ │ - b.n a740c │ │ + b.n a7418 │ │ stmia r0!, {r2, r3, r4} │ │ - b.n a7410 │ │ + b.n a741c │ │ ands r0, r3 │ │ - b.n a7414 │ │ + b.n a7420 │ │ movs r0, #28 │ │ - b.n a7418 │ │ + b.n a7424 │ │ adds r0, #24 │ │ - b.n a741c │ │ + b.n a7428 │ │ strb r2, [r0, #0] │ │ - b.n a7956 │ │ + b.n a7962 │ │ str r3, [r0, r0] │ │ - b.n a794a │ │ + b.n a7956 │ │ strb r7, [r0, #0] │ │ - b.n a7c30 │ │ + b.n a7c3c │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ stmia r0!, {r1} │ │ - b.n a7c4e │ │ + b.n a7c5a │ │ ands r3, r0 │ │ - b.n a7c52 │ │ - blx 4a8f54 │ │ + b.n a7c5e │ │ + blx 4a8f60 │ │ @ instruction: 0xfff5eaff │ │ movs r0, r0 │ │ - b.n a7fbe │ │ + b.n a7fca │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ asrs r0, r1, #1 │ │ - b.n a7452 │ │ + b.n a745e │ │ strh r4, [r0, #2] │ │ - b.n a7444 │ │ + b.n a7450 │ │ strh r4, [r1, #0] │ │ - b.n a7c6e │ │ + b.n a7c7a │ │ ands r0, r6 │ │ - b.n a744c │ │ + b.n a7458 │ │ movs r1, #92 @ 0x5c │ │ - b.n a7458 │ │ + b.n a7464 │ │ adds r1, #88 @ 0x58 │ │ - b.n a745c │ │ + b.n a7468 │ │ stmia r1!, {r2, r3, r4, r6} │ │ - b.n a7460 │ │ + b.n a746c │ │ str r0, [r3, r5] │ │ - b.n a7464 │ │ + b.n a7470 │ │ ands r4, r1 │ │ - b.n a798a │ │ + b.n a7996 │ │ strb r5, [r0, #0] │ │ - b.n a7990 │ │ + b.n a799c │ │ strb r4, [r0, #0] │ │ - b.n a7c7c │ │ + b.n a7c88 │ │ lsls r0, r4, #12 │ │ subs r0, r0, r0 │ │ stmia r0!, {r3} │ │ - b.n a7c96 │ │ + b.n a7ca2 │ │ strh r4, [r0, #2] │ │ - b.n a7494 │ │ + b.n a74a0 │ │ ands r0, r6 │ │ - b.n a7498 │ │ + b.n a74a4 │ │ movs r0, r0 │ │ - b.n a7a08 │ │ + b.n a7a14 │ │ movs r0, r0 │ │ - b.n a7f0a │ │ + b.n a7f16 │ │ movs r0, r5 │ │ cmp r2, #0 │ │ movs r4, r1 │ │ - b.n a7c96 │ │ + b.n a7ca2 │ │ movs r4, r5 │ │ lsrs r0, r0, #8 │ │ lsls r0, r1, #1 │ │ - b.n a74a2 │ │ - b.n a7a00 │ │ - b.n a7494 │ │ + b.n a74ae │ │ + b.n a7a0c │ │ + b.n a74a0 │ │ str r4, [r2, r5] │ │ - b.n a749e │ │ + b.n a74aa │ │ str r1, [sp, #320] @ 0x140 │ │ - b.n a74a2 │ │ + b.n a74ae │ │ asrs r4, r2, #5 │ │ - b.n a74a6 │ │ + b.n a74b2 │ │ movs r1, #80 @ 0x50 │ │ - b.n a74aa │ │ + b.n a74b6 │ │ adds r0, #1 │ │ - b.n a79d8 │ │ + b.n a79e4 │ │ strb r2, [r0, #0] │ │ - b.n a79e4 │ │ + b.n a79f0 │ │ adds r0, #3 │ │ - b.n a7cc4 │ │ + b.n a7cd0 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ str r1, [r0, r0] │ │ - b.n a7cde │ │ + b.n a7cea │ │ str r0, [sp, #8] │ │ - b.n a7ce2 │ │ - blx 4a8fe4 │ │ + b.n a7cee │ │ + blx 4a8ff0 │ │ @ instruction: 0xfff5eaff │ │ movs r5, r0 │ │ - b.n a7ce0 │ │ + b.n a7cec │ │ movs r2, r3 │ │ lsrs r0, r0, #8 │ │ lsrs r0, r1, #22 │ │ - b.n a74f4 │ │ + b.n a7500 │ │ asrs r0, r2, #1 │ │ - b.n a7ed4 │ │ + b.n a7ee0 │ │ strb r4, [r0, #0] │ │ - b.n a7cfe │ │ + b.n a7d0a │ │ ands r4, r1 │ │ - b.n a7d02 │ │ + b.n a7d0e │ │ movs r0, r0 │ │ - b.n a7ae4 │ │ + b.n a7af0 │ │ movs r4, r5 │ │ - b.n a74ea │ │ - stmia r4!, {r5} │ │ + b.n a74f6 │ │ + stmia r4!, {r0, r5} │ │ add.w r0, r0, r0 │ │ - b.n a8072 │ │ + b.n a807e │ │ lsls r0, r5, #12 │ │ subs r0, r0, r0 │ │ lsls r4, r2, #1 │ │ - b.n a7514 │ │ + b.n a7520 │ │ subs r2, #0 │ │ - b.n a7ff6 │ │ + b.n a8002 │ │ movs r0, #80 @ 0x50 │ │ - b.n a751c │ │ + b.n a7528 │ │ subs r3, #154 @ 0x9a │ │ - b.n a806c │ │ + b.n a8078 │ │ subs r0, r0, #7 │ │ - b.n a7d2a │ │ + b.n a7d36 │ │ lsls r2, r2, #14 │ │ - b.n a7bb0 │ │ + b.n a7bbc │ │ movs r1, r1 │ │ - b.n a7a92 │ │ + b.n a7a9e │ │ str r0, [r0, #4] │ │ - b.n a7530 │ │ - b.n a7a80 │ │ - b.n a7534 │ │ + b.n a753c │ │ + b.n a7a8c │ │ + b.n a7540 │ │ asrs r5, r0, #32 │ │ - b.n a7b80 │ │ + b.n a7b8c │ │ str r0, [sp, #240] @ 0xf0 │ │ - b.n a753c │ │ + b.n a7548 │ │ movs r7, r0 │ │ - b.n a7aa6 │ │ + b.n a7ab2 │ │ movs r4, r0 │ │ - b.n a7bac │ │ + b.n a7bb8 │ │ movs r5, r0 │ │ subs r2, #0 │ │ movs r0, r0 │ │ - b.n a8012 │ │ + b.n a801e │ │ movs r0, r1 │ │ - b.n a809e │ │ - b.n a7a18 │ │ - b.n a7a36 │ │ + b.n a80aa │ │ + b.n a7a24 │ │ + b.n a7a42 │ │ movs r1, r0 │ │ @ instruction: 0xea00903c │ │ - b.n a755c │ │ - b.n a7aac │ │ - b.n a7560 │ │ + b.n a7568 │ │ + b.n a7ab8 │ │ + b.n a756c │ │ strh r4, [r2, #0] │ │ - b.n a7f3a │ │ + b.n a7f46 │ │ stmia r0!, {r3} │ │ - b.n a7f40 │ │ + b.n a7f4c │ │ movs r0, r0 │ │ - b.n a8172 │ │ + b.n a817e │ │ lsls r1, r0, #4 │ │ - b.n a8072 │ │ + b.n a807e │ │ movs r0, r6 │ │ - b.n a7554 │ │ + b.n a7560 │ │ lsls r0, r1, #1 │ │ lsrs r0, r0, #8 │ │ lsls r0, r1, #1 │ │ - b.n a756e │ │ + b.n a757a │ │ strb r0, [r5, #5] │ │ - b.n a7566 │ │ + b.n a7572 │ │ asrs r4, r4, #32 │ │ - b.n a757c │ │ + b.n a7588 │ │ movs r1, r0 │ │ - b.n a7cfc │ │ + b.n a7d08 │ │ movs r1, r0 │ │ cmp r2, #0 │ │ asrs r0, r5, #5 │ │ - b.n a7556 │ │ + b.n a7562 │ │ lsls r1, r0, #1 │ │ and.w r0, r0, r8, asr #2 │ │ - b.n a758a │ │ + b.n a7596 │ │ movs r1, r0 │ │ - b.n a7b62 │ │ + b.n a7b6e │ │ movs r0, r0 │ │ - b.n a7d14 │ │ + b.n a7d20 │ │ movs r5, r7 │ │ subs r2, #0 │ │ movs r0, r1 │ │ - b.n a7dae │ │ + b.n a7dba │ │ stmia r0!, {r2, r5} │ │ - b.n a758c │ │ + b.n a7598 │ │ lsls r4, r0, #1 │ │ - b.n a7590 │ │ + b.n a759c │ │ strh r6, [r1, #0] │ │ - b.n a7dba │ │ + b.n a7dc6 │ │ movs r4, r4 │ │ - b.n a759e │ │ + b.n a75aa │ │ movs r1, r0 │ │ - b.n a7d22 │ │ + b.n a7d2e │ │ asrs r0, r0, #32 │ │ strh r0, [r4, #12] │ │ movs r6, r0 │ │ - b.n a7dca │ │ + b.n a7dd6 │ │ @ instruction: 0xfb43ebff │ │ str r0, [r0, #4] │ │ - b.n a75cc │ │ + b.n a75d8 │ │ adds r4, r5, #2 │ │ - b.n a75d4 │ │ + b.n a75e0 │ │ asrs r1, r0, #32 │ │ - b.n a7bb8 │ │ + b.n a7bc4 │ │ movs r0, #92 @ 0x5c │ │ - b.n a764a │ │ + b.n a7656 │ │ lsls r0, r5 │ │ - b.n a75ce │ │ + b.n a75da │ │ stmia r0!, {r4, r6} │ │ - b.n a75c8 │ │ + b.n a75d4 │ │ adds r0, #1 │ │ - b.n a7f42 │ │ + b.n a7f4e │ │ str r0, [r0, r0] │ │ - b.n a7f86 │ │ + b.n a7f92 │ │ asrs r0, r2, #8 │ │ - b.n a7bb8 │ │ + b.n a7bc4 │ │ asrs r5, r0, #32 │ │ - b.n a7ab8 │ │ + b.n a7ac4 │ │ tst r1, r6 │ │ - b.n a7bc2 │ │ + b.n a7bce │ │ movs r4, r0 │ │ - b.n a7d6c │ │ + b.n a7d78 │ │ movs r4, r0 │ │ subs r2, #0 │ │ str r2, [sp, #196] @ 0xc4 │ │ - b.n a7e06 │ │ + b.n a7e12 │ │ asrs r7, r2, #8 │ │ - b.n a7bd0 │ │ + b.n a7bdc │ │ str r5, [r0, r0] │ │ - b.n a7ad0 │ │ + b.n a7adc │ │ lsls r1, r3, #8 │ │ - b.n a7d7c │ │ + b.n a7d88 │ │ lsls r7, r0, #9 │ │ ldrh r0, [r0, #16] │ │ str r0, [sp, #240] @ 0xf0 │ │ - b.n a7614 │ │ - b.n a7aec │ │ - b.n a7e1e │ │ + b.n a7620 │ │ + b.n a7af8 │ │ + b.n a7e2a │ │ movs r1, #182 @ 0xb6 │ │ - b.n a7e94 │ │ + b.n a7ea0 │ │ movs r0, r0 │ │ - b.n a818a │ │ + b.n a8196 │ │ movs r3, r3 │ │ lsrs r0, r0, #8 │ │ asrs r2, r7, #10 │ │ - b.n a7ea0 │ │ + b.n a7eac │ │ str r1, [r0, r0] │ │ - b.n a8102 │ │ + b.n a810e │ │ strb r0, [r4, #0] │ │ - b.n a7628 │ │ + b.n a7634 │ │ ands r5, r0 │ │ - b.n a7afe │ │ + b.n a7b0a │ │ adds r0, #36 @ 0x24 │ │ - b.n a7630 │ │ + b.n a763c │ │ movs r5, r0 │ │ - b.n a7daa │ │ + b.n a7db6 │ │ asrs r1, r0, #2 │ │ - b.n a7c08 │ │ + b.n a7c14 │ │ asrs r3, r0, #32 │ │ - b.n a800c │ │ + b.n a8018 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ - ldr r7, [pc, #1020] @ (a7f0c ) │ │ - b.n a8130 │ │ + ldr r7, [pc, #1020] @ (a7f18 ) │ │ + b.n a813c │ │ ldr r1, [r0, r0] │ │ - b.n a8256 │ │ + b.n a8262 │ │ movs r4, r0 │ │ - b.n a7dbe │ │ + b.n a7dca │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ str r2, [r2, r3] │ │ - b.n a7af6 │ │ + b.n a7b02 │ │ movs r6, #34 @ 0x22 │ │ - b.n a7e66 │ │ + b.n a7e72 │ │ str r1, [r0, r0] │ │ - b.n a8034 │ │ - ldr r1, [pc, #8] @ (a7b34 ) │ │ - b.n a826e │ │ + b.n a8040 │ │ + ldr r1, [pc, #8] @ (a7b40 ) │ │ + b.n a827a │ │ strh r5, [r2, r0] │ │ - b.n a7c3a │ │ + b.n a7c46 │ │ movs r0, r0 │ │ and.w r0, r0, r2, lsl #20 │ │ - b.n a7e7a │ │ + b.n a7e86 │ │ movs r0, #1 │ │ - b.n a7c48 │ │ + b.n a7c54 │ │ ands r0, r0 │ │ - b.n a7bd0 │ │ + b.n a7bdc │ │ movs r2, r0 │ │ - b.n a7dee │ │ + b.n a7dfa │ │ movs r3, r0 │ │ ldr r2, [sp, #0] │ │ movs r0, r0 │ │ - b.n a7dfc │ │ + b.n a7e08 │ │ adds r0, #3 │ │ strh r7, [r0, #2] │ │ movs r2, r0 │ │ strh r3, [r2, #10] │ │ lsls r6, r4, #5 │ │ ldrh r0, [r0, #16] │ │ stmia r0!, {r2, r5} │ │ - b.n a7698 │ │ + b.n a76a4 │ │ strh r4, [r0, #2] │ │ - b.n a769c │ │ + b.n a76a8 │ │ lsls r0, r1, #1 │ │ - b.n a7692 │ │ + b.n a769e │ │ asrs r4, r3, #5 │ │ - b.n a768a │ │ + b.n a7696 │ │ movs r1, #88 @ 0x58 │ │ - b.n a768e │ │ + b.n a769a │ │ adds r1, #92 @ 0x5c │ │ - b.n a7692 │ │ + b.n a769e │ │ strb r0, [r3, #5] │ │ - b.n a7696 │ │ + b.n a76a2 │ │ str r3, [r0, r0] │ │ - b.n a7bbc │ │ + b.n a7bc8 │ │ ands r7, r0 │ │ - b.n a7bc2 │ │ + b.n a7bce │ │ str r5, [r0, r0] │ │ - b.n a7eaa │ │ + b.n a7eb6 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ asrs r3, r0, #32 │ │ - b.n a7eca │ │ + b.n a7ed6 │ │ movs r0, #7 │ │ - b.n a7ece │ │ - blx 4a91d0 │ │ + b.n a7eda │ │ + blx 4a91dc │ │ @ instruction: 0xfff5eaff │ │ movs r1, r0 │ │ - b.n a7ebe │ │ - b.n a7c24 │ │ - b.n a76b8 │ │ + b.n a7eca │ │ + b.n a7c30 │ │ + b.n a76c4 │ │ lsls r0, r4, #1 │ │ lsrs r0, r0, #8 │ │ lsrs r1, r0, #32 │ │ - b.n a81e2 │ │ + b.n a81ee │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ lsls r4, r3, #1 │ │ - b.n a775a │ │ + b.n a7766 │ │ asrs r2, r0, #32 │ │ - b.n a7766 │ │ + b.n a7772 │ │ movs r0, #16 │ │ - b.n a76e2 │ │ + b.n a76ee │ │ adds r0, #36 @ 0x24 │ │ - b.n a76ec │ │ + b.n a76f8 │ │ movs r1, r2 │ │ - b.n a7cc2 │ │ + b.n a7cce │ │ asrs r2, r0, #32 │ │ - b.n a8302 │ │ + b.n a830e │ │ movs r4, r6 │ │ - b.n a76e6 │ │ + b.n a76f2 │ │ movs r0, r0 │ │ - b.n a7e70 │ │ + b.n a7e7c │ │ movs r0, r1 │ │ - b.n a830e │ │ + b.n a831a │ │ lsls r6, r5, #30 │ │ - b.n a7bd2 │ │ + b.n a7bde │ │ asrs r6, r0, #32 │ │ strh r0, [r0, #24] │ │ strb r0, [r0, #0] │ │ - b.n a7edc │ │ + b.n a7ee8 │ │ movs r1, r0 │ │ - b.n a831e │ │ + b.n a832a │ │ movs r4, r0 │ │ and.w r0, r0, ip, ror #3 │ │ - b.n a7792 │ │ + b.n a779e │ │ strb r0, [r0, #0] │ │ - b.n a832a │ │ + b.n a8336 │ │ movs r0, r0 │ │ - b.n a828e │ │ + b.n a829a │ │ movs r0, r0 │ │ - b.n a8332 │ │ + b.n a833e │ │ lsls r6, r2, #1 │ │ subs r0, r0, r0 │ │ asrs r0, r1, #1 │ │ - b.n a7726 │ │ + b.n a7732 │ │ lsls r2, r0, #28 │ │ - b.n a823a │ │ + b.n a8246 │ │ stmia r0!, {r2, r5} │ │ - b.n a771c │ │ + b.n a7728 │ │ asrs r0, r0, #2 │ │ - b.n a8108 │ │ + b.n a8114 │ │ movs r4, r2 │ │ subs r0, r0, r0 │ │ movs r0, #216 @ 0xd8 │ │ - b.n a7f90 │ │ + b.n a7f9c │ │ ands r0, r0 │ │ - b.n a7d36 │ │ + b.n a7d42 │ │ str r0, [r0, r0] │ │ - b.n a815c │ │ + b.n a8168 │ │ movs r6, r0 │ │ - b.n a8048 │ │ + b.n a8054 │ │ movs r4, r0 │ │ asrs r0, r2, #13 │ │ lsrs r0, r7 │ │ - b.n a7fa4 │ │ + b.n a7fb0 │ │ movs r3, r7 │ │ lsrs r0, r0, #8 │ │ str r4, [r2, r0] │ │ - b.n a7756 │ │ + b.n a7762 │ │ movs r2, r0 │ │ - b.n a82ce │ │ + b.n a82da │ │ lsls r5, r4, #4 │ │ subs r0, r0, r0 │ │ str r0, [r0, #4] │ │ - b.n a7770 │ │ + b.n a777c │ │ movs r5, r0 │ │ - b.n a7f7a │ │ - stmia r3!, {r2, r3, r4, r6, r7} │ │ + b.n a7f86 │ │ + stmia r3!, {r0, r2, r3, r4, r6, r7} │ │ @ instruction: 0xeb00e044 │ │ - b.n a777c │ │ + b.n a7788 │ │ movs r0, r0 │ │ - b.n a82e6 │ │ + b.n a82f2 │ │ movs r2, r6 │ │ lsrs r0, r0, #8 │ │ - stmia r3!, {} │ │ + stmia r3!, {r0} │ │ add.w r0, r0, r0 │ │ - b.n a7772 │ │ + b.n a777e │ │ movs r4, r0 │ │ - b.n a82f6 │ │ + b.n a8302 │ │ @ instruction: 0xfff60aff │ │ movs r4, r3 │ │ and.w r0, r0, r0, lsr #11 │ │ - b.n a7fe4 │ │ + b.n a7ff0 │ │ str r0, [r1, r0] │ │ - b.n a7fa6 │ │ + b.n a7fb2 │ │ strh r0, [r0, #0] │ │ - b.n a7d8e │ │ + b.n a7d9a │ │ str r0, [sp, #0] │ │ - b.n a81b4 │ │ + b.n a81c0 │ │ movs r0, r0 │ │ - b.n a8320 │ │ + b.n a832c │ │ strh r0, [r6, #6] │ │ - b.n a7ff8 │ │ + b.n a8004 │ │ strh r5, [r0, #0] │ │ - b.n a7fba │ │ + b.n a7fc6 │ │ movs r5, r4 │ │ lsrs r0, r0, #8 │ │ lsrs r0, r3, #12 │ │ - b.n a77c0 │ │ + b.n a77cc │ │ movs r2, r0 │ │ - b.n a82b4 │ │ + b.n a82c0 │ │ movs r0, #60 @ 0x3c │ │ - b.n a77c4 │ │ + b.n a77d0 │ │ movs r0, r0 │ │ - b.n a7dac │ │ + b.n a7db8 │ │ asrs r4, r3, #1 │ │ - b.n a783e │ │ + b.n a784a │ │ movs r0, #36 @ 0x24 │ │ - b.n a77ba │ │ + b.n a77c6 │ │ adds r0, #80 @ 0x50 │ │ - b.n a77ba │ │ + b.n a77c6 │ │ movs r0, r2 │ │ - b.n a77ca │ │ + b.n a77d6 │ │ asrs r2, r2, #4 │ │ - b.n a7da8 │ │ + b.n a7db4 │ │ movs r0, #0 │ │ - b.n a816c │ │ + b.n a8178 │ │ asrs r1, r0, #32 │ │ - b.n a812c │ │ + b.n a8138 │ │ asrs r2, r0, #32 │ │ - b.n a7cb0 │ │ + b.n a7cbc │ │ movs r0, #4 │ │ - b.n a83f2 │ │ + b.n a83fe │ │ movs r0, #1 │ │ lsls r0, r0, #12 │ │ - stmia r3!, {r0, r2, r5, r7} │ │ + stmia r3!, {r1, r2, r5, r7} │ │ @ instruction: 0xeb00e044 │ │ - b.n a77f8 │ │ + b.n a7804 │ │ movs r0, r0 │ │ - b.n a8362 │ │ + b.n a836e │ │ str r0, [r0, #4] │ │ - b.n a7800 │ │ + b.n a780c │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ - stmia r2!, {r5, r6, r7} │ │ + stmia r2!, {r0, r5, r6, r7} │ │ add.w r0, r0, r0 │ │ - b.n a77f2 │ │ + b.n a77fe │ │ str r0, [r0, #4] │ │ - b.n a7810 │ │ + b.n a781c │ │ movs r0, r0 │ │ - b.n a837a │ │ - b.n a7d64 │ │ - b.n a7818 │ │ + b.n a8386 │ │ + b.n a7d70 │ │ + b.n a7824 │ │ movs r4, r1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #32 │ │ - b.n a7812 │ │ + b.n a781e │ │ asrs r2, r0, #4 │ │ - b.n a83ec │ │ + b.n a83f8 │ │ asrs r4, r0, #32 │ │ - b.n a77fa │ │ - beq.n a7d28 │ │ - b.n a8188 │ │ + b.n a7806 │ │ + beq.n a7d34 │ │ + b.n a8194 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2} │ │ - b.n a8328 │ │ + b.n a8334 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r2 │ │ - b.n a782e │ │ - stmia r3!, {r1, r2, r3, r5, r7} │ │ + b.n a783a │ │ + stmia r3!, {r0, r1, r2, r3, r5, r7} │ │ @ instruction: 0xeb00e044 │ │ - b.n a7844 │ │ + b.n a7850 │ │ movs r0, r0 │ │ - b.n a83ae │ │ + b.n a83ba │ │ str r0, [r0, #4] │ │ - b.n a784c │ │ + b.n a7858 │ │ @ instruction: 0xffec1aff │ │ str r0, [sp, #240] @ 0xf0 │ │ - b.n a7854 │ │ + b.n a7860 │ │ lsrs r1, r0, #32 │ │ - b.n a835a │ │ + b.n a8366 │ │ stmia r0!, {r2, r5} │ │ - b.n a785c │ │ + b.n a7868 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ asrs r0, r1, #1 │ │ - b.n a7856 │ │ + b.n a7862 │ │ movs r0, r0 │ │ - b.n a84ee │ │ + b.n a84fa │ │ lsls r0, r5, #2 │ │ - b.n a7844 │ │ + b.n a7850 │ │ lsls r4, r5, #2 │ │ - b.n a7848 │ │ + b.n a7854 │ │ movs r0, r0 │ │ - b.n a847a │ │ + b.n a8486 │ │ lsls r0, r2, #5 │ │ - b.n a7840 │ │ + b.n a784c │ │ lsls r4, r2, #5 │ │ - b.n a7844 │ │ + b.n a7850 │ │ asrs r0, r1, #1 │ │ - b.n a7872 │ │ + b.n a787e │ │ lsls r0, r3, #5 │ │ - b.n a784c │ │ + b.n a7858 │ │ lsls r4, r3, #5 │ │ - b.n a7850 │ │ + b.n a785c │ │ movs r2, r0 │ │ and.w r0, r0, r0, lsl #4 │ │ - b.n a8496 │ │ + b.n a84a2 │ │ movs r1, r0 │ │ - b.n a849a │ │ + b.n a84a6 │ │ lsrs r0, r7, #11 │ │ - b.n a80f0 │ │ + b.n a80fc │ │ lsls r0, r2, #3 │ │ - b.n a80fa │ │ + b.n a8106 │ │ movs r0, #52 @ 0x34 │ │ - b.n a78a0 │ │ + b.n a78ac │ │ adds r0, #56 @ 0x38 │ │ - b.n a78a4 │ │ + b.n a78b0 │ │ movs r0, #1 │ │ - b.n a7db2 │ │ + b.n a7dbe │ │ adds r0, #0 │ │ - b.n a7db8 │ │ + b.n a7dc4 │ │ movs r0, #2 │ │ - b.n a809c │ │ + b.n a80a8 │ │ movs r3, r4 │ │ subs r0, r0, r0 │ │ movs r0, r5 │ │ - b.n a828e │ │ + b.n a829a │ │ asrs r0, r5, #32 │ │ - b.n a8294 │ │ + b.n a82a0 │ │ movs r0, #96 @ 0x60 │ │ - b.n a84c6 │ │ + b.n a84d2 │ │ ands r4, r1 │ │ - b.n a80ca │ │ - stmia r2!, {r2, r4, r5, r7} │ │ + b.n a80d6 │ │ + stmia r2!, {r0, r2, r4, r5, r7} │ │ add.w r0, r0, r0 │ │ - b.n a8432 │ │ + b.n a843e │ │ lsls r7, r5, #7 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #2 │ │ - b.n a82aa │ │ + b.n a82b6 │ │ asrs r0, r1, #2 │ │ - b.n a82b0 │ │ + b.n a82bc │ │ movs r0, #32 │ │ - b.n a84e2 │ │ - stmia r2!, {r1, r2, r3, r5, r7} │ │ + b.n a84ee │ │ + stmia r2!, {r0, r1, r2, r3, r5, r7} │ │ add.w r0, r0, r0 │ │ - b.n a844a │ │ + b.n a8456 │ │ lsls r1, r5, #7 │ │ subs r0, r0, r0 │ │ movs r4, r2 │ │ - b.n a82c2 │ │ + b.n a82ce │ │ asrs r4, r2, #32 │ │ - b.n a82c8 │ │ + b.n a82d4 │ │ movs r0, #20 │ │ - b.n a84fa │ │ - stmia r2!, {r3, r5, r7} │ │ + b.n a8506 │ │ + stmia r2!, {r0, r3, r5, r7} │ │ add.w r0, r0, r0 │ │ - b.n a8462 │ │ + b.n a846e │ │ lsls r3, r4, #7 │ │ subs r0, r0, r0 │ │ asrs r4, r5, #32 │ │ - b.n a7904 │ │ + b.n a7910 │ │ movs r1, r0 │ │ - b.n a850e │ │ + b.n a851a │ │ movs r0, #40 @ 0x28 │ │ - b.n a790c │ │ + b.n a7918 │ │ str r0, [r0, #4] │ │ - b.n a7910 │ │ + b.n a791c │ │ lsls r1, r6, #8 │ │ - b.n a7ffa │ │ + b.n a8006 │ │ movs r1, r3 │ │ subs r0, r0, r0 │ │ lsls r0, r5, #2 │ │ - b.n a7914 │ │ + b.n a7920 │ │ asrs r4, r5, #2 │ │ - b.n a7918 │ │ + b.n a7924 │ │ movs r1, r0 │ │ - b.n a82ca │ │ + b.n a82d6 │ │ movs r0, r0 │ │ - b.n a83d0 │ │ + b.n a83dc │ │ movs r4, r2 │ │ cmp r2, #0 │ │ - b.n a7e7c │ │ - b.n a7930 │ │ + b.n a7e88 │ │ + b.n a793c │ │ str r0, [sp, #32] │ │ - b.n a813a │ │ + b.n a8146 │ │ stmia r0!, {r2} │ │ - b.n a813e │ │ + b.n a814a │ │ lsls r2, r0, #28 │ │ - b.n a843e │ │ + b.n a844a │ │ lsls r1, r1, #2 │ │ subs r0, r0, r0 │ │ lsls r4, r4, #1 │ │ and.w r0, r0, r3, lsl #8 │ │ - b.n a79c2 │ │ + b.n a79ce │ │ movs r0, #3 │ │ - b.n a8216 │ │ + b.n a8222 │ │ movs r3, r0 │ │ - b.n a84ba │ │ + b.n a84c6 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ adds r0, #1 │ │ - b.n a79d2 │ │ + b.n a79de │ │ movs r3, r0 │ │ - b.n a80c6 │ │ + b.n a80d2 │ │ adds r0, #2 │ │ asrs r2, r3, #23 │ │ movs r3, r0 │ │ asrs r2, r2, #5 │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ lsrs r0, r3, #6 │ │ - b.n a7970 │ │ + b.n a797c │ │ movs r4, #145 @ 0x91 │ │ - b.n a8436 │ │ + b.n a8442 │ │ adds r4, r2, r6 │ │ - b.n a7978 │ │ + b.n a7984 │ │ movs r0, r0 │ │ - b.n a7f5c │ │ + b.n a7f68 │ │ asrs r1, r0, #32 │ │ - b.n a7f60 │ │ + b.n a7f6c │ │ ldmia r3, {r2, r3, r5, r6, r7} │ │ @ instruction: 0xebff0954 │ │ - b.n a7988 │ │ + b.n a7994 │ │ movs r0, r0 │ │ - b.n a7f6c │ │ + b.n a7f78 │ │ asrs r2, r3, #1 │ │ - b.n a79f2 │ │ + b.n a79fe │ │ movs r0, r0 │ │ - b.n a8596 │ │ + b.n a85a2 │ │ movs r3, r0 │ │ - b.n a84fc │ │ + b.n a8508 │ │ lsls r6, r6, #2 │ │ cmp r2, #0 │ │ - beq.n a7e98 │ │ - b.n a82f8 │ │ + beq.n a7ea4 │ │ + b.n a8304 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, r4, r6, ip, sp} │ │ - b.n a7a16 │ │ + b.n a7a22 │ │ strb r0, [r2, #0] │ │ - b.n a799a │ │ + b.n a79a6 │ │ movs r3, #18 │ │ - b.n a7f80 │ │ + b.n a7f8c │ │ str r0, [sp, #80] @ 0x50 │ │ - b.n a837a │ │ + b.n a8386 │ │ movs r0, r1 │ │ - b.n a812c │ │ + b.n a8138 │ │ lsls r5, r0, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, #216 @ 0xd8 │ │ - b.n a8214 │ │ + b.n a8220 │ │ lsls r0, r6 │ │ - b.n a79b8 │ │ + b.n a79c4 │ │ strb r4, [r6, #2] │ │ - b.n a79bc │ │ + b.n a79c8 │ │ ands r4, r0 │ │ - b.n a7ed2 │ │ + b.n a7ede │ │ strb r7, [r0, #0] │ │ - b.n a7ed8 │ │ + b.n a7ee4 │ │ strb r7, [r0, #0] │ │ - b.n a81be │ │ + b.n a81ca │ │ strb r0, [r0, #0] │ │ - b.n a85da │ │ + b.n a85e6 │ │ adds r0, #7 │ │ asrs r0, r4, #6 │ │ strb r2, [r0, #0] │ │ lsls r0, r4, #6 │ │ movs r0, #0 │ │ - b.n a7f54 │ │ + b.n a7f60 │ │ movs r0, #1 │ │ - b.n a8050 │ │ + b.n a805c │ │ lsls r5, r6, #7 │ │ cmp r2, #0 │ │ lsls r2, r0, #28 │ │ - b.n a84ee │ │ + b.n a84fa │ │ movs r1, r7 │ │ lsrs r0, r0, #8 │ │ adds r0, #0 │ │ - b.n a85fa │ │ - bl 5039ba │ │ + b.n a8606 │ │ + bl 5039c6 │ │ adds r0, #176 @ 0xb0 │ │ - b.n a79d4 │ │ + b.n a79e0 │ │ movs r0, #1 │ │ - b.n a8606 │ │ - bl 5039c6 │ │ + b.n a8612 │ │ + bl 5039d2 │ │ adds r0, #180 @ 0xb4 │ │ - b.n a79e0 │ │ - bl 5039ce │ │ + b.n a79ec │ │ + bl 5039da │ │ movs r0, r1 │ │ - b.n a79e8 │ │ - bl 5039d6 │ │ + b.n a79f4 │ │ + bl 5039e2 │ │ asrs r4, r1, #32 │ │ - b.n a79f0 │ │ + b.n a79fc │ │ strb r4, [r7, #0] │ │ - b.n a7a1c │ │ + b.n a7a28 │ │ asrs r4, r2, #32 │ │ - b.n a83f8 │ │ + b.n a8404 │ │ cmp r2, #248 @ 0xf8 │ │ - b.n a827c │ │ + b.n a8288 │ │ movs r0, #24 │ │ - b.n a862e │ │ + b.n a863a │ │ movs r4, r2 │ │ - b.n a8400 │ │ + b.n a840c │ │ adds r0, #32 │ │ - b.n a8636 │ │ + b.n a8642 │ │ lsrs r5, r1, #10 │ │ - bne.w fffc7f0c │ │ - b.n a823e │ │ + bne.w fffc7f18 │ │ + b.n a824a │ │ lsrs r5, r1, #10 │ │ orr.w r0, r1, #8388608 @ 0x800000 │ │ - b.n a7a26 │ │ + b.n a7a32 │ │ movs r0, r0 │ │ - b.n a7a0c │ │ + b.n a7a18 │ │ movs r0, r5 │ │ - b.n a841c │ │ + b.n a8428 │ │ lsrs r5, r1, #10 │ │ orn r0, r0, #2752512 @ 0x2a0000 │ │ - b.n a8428 │ │ + b.n a8434 │ │ cmp r2, #141 @ 0x8d │ │ orn sl, r0, #18048 @ 0x4680 │ │ orn sl, r0, #4620288 @ 0x468000 │ │ orr.w sl, r1, #288768 @ 0x46800 │ │ orr.w sl, r1, #18048 @ 0x4680 │ │ orr.w sl, r1, #4620288 @ 0x468000 │ │ orn sl, r0, #288768 @ 0x46800 │ │ orn sl, r0, #18048 @ 0x4680 │ │ orn sl, r0, #4620288 @ 0x468000 │ │ orr.w sl, r1, #288768 @ 0x46800 │ │ orr.w sl, r1, #18048 @ 0x4680 │ │ orr.w sl, r1, #4620288 @ 0x468000 │ │ orn sl, r0, #266240 @ 0x41000 │ │ orn r8, r0, #933888 @ 0xe4000 │ │ - b.n a7a8c │ │ + b.n a7a98 │ │ lsrs r5, r1, #10 │ │ orr.w r0, r1, #532480 @ 0x82000 │ │ - b.n a8074 │ │ + b.n a8080 │ │ cmp r2, #131 @ 0x83 │ │ orr.w r0, r1, #786432 @ 0xc0000 │ │ - b.n a8462 │ │ + b.n a846e │ │ lsrs r7, r5, #11 │ │ orn r0, r2, #393216 @ 0x60000 │ │ - b.n a8478 │ │ + b.n a8484 │ │ lsls r0, r6 │ │ - b.n a7aa2 │ │ + b.n a7aae │ │ adds r0, #180 @ 0xb4 │ │ - b.n a7aa6 │ │ + b.n a7ab2 │ │ ands r0, r0 │ │ - b.n a7a74 │ │ + b.n a7a80 │ │ adds r0, #4 │ │ - b.n a7a78 │ │ + b.n a7a84 │ │ movs r0, r0 │ │ - b.n a7a9a │ │ + b.n a7aa6 │ │ asrs r4, r6, #2 │ │ - b.n a7aac │ │ + b.n a7ab8 │ │ lsrs r7, r1, #10 │ │ - bl ff8ea038 │ │ + bl ff8ea044 │ │ sbcs.w r0, pc, #5767168 @ 0x580000 │ │ - b.n a7a9c │ │ - bl 503a8a │ │ + b.n a7aa8 │ │ + bl 503a96 │ │ asrs r4, r6, #2 │ │ - b.n a7aa4 │ │ + b.n a7ab0 │ │ movs r5, r4 │ │ and.w r7, r0, r2 │ │ - b.n a85d6 │ │ + b.n a85e2 │ │ movs r3, r4 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #1 │ │ - b.n a7ace │ │ + b.n a7ada │ │ asrs r1, r1, #32 │ │ - b.n a82e6 │ │ + b.n a82f2 │ │ strh r4, [r1, #0] │ │ - b.n a82ea │ │ + b.n a82f6 │ │ movs r7, #216 @ 0xd8 │ │ - b.n a832e │ │ + b.n a833a │ │ ands r1, r0 │ │ - b.n a84d6 │ │ + b.n a84e2 │ │ str r0, [r0, r0] │ │ - b.n a84fc │ │ + b.n a8508 │ │ movs r0, #224 @ 0xe0 │ │ - b.n a86fa │ │ + b.n a8706 │ │ blx pc │ │ - b.n a833e │ │ + b.n a834a │ │ lsls r0, r2, #1 │ │ - b.n a84dc │ │ + b.n a84e8 │ │ str r0, [r4, r3] │ │ - b.n a8706 │ │ - push {r0, r1, r2, r3, r4, r5, r7} │ │ - mls r0, r0, r0, r0 │ │ - b.n a7afa │ │ + b.n a8712 │ │ + cbz r1, a801a │ │ + @ instruction: 0xfa000010 │ │ + b.n a7b06 │ │ movs r0, #224 @ 0xe0 │ │ - b.n a8712 │ │ + b.n a871e │ │ strb r4, [r5, #0] │ │ - b.n a7b02 │ │ + b.n a7b0e │ │ ands r0, r0 │ │ - b.n a806c │ │ + b.n a8078 │ │ asrs r4, r7, #32 │ │ - b.n a7b18 │ │ + b.n a7b24 │ │ movs r7, r0 │ │ - b.n a8322 │ │ + b.n a832e │ │ adds r0, #4 │ │ - b.n a8326 │ │ - stmia r2!, {r0, r3, r4, r5, r6, r7} │ │ + b.n a8332 │ │ + stmia r2!, {r1, r3, r4, r5, r6, r7} │ │ add.w r0, r0, r0, asr #3 │ │ - b.n a868e │ │ + b.n a869a │ │ lsls r4, r1, #6 │ │ subs r0, r0, r0 │ │ lsls r4, r0, #1 │ │ - b.n a7b30 │ │ + b.n a7b3c │ │ movs r0, #8 │ │ - b.n a833a │ │ + b.n a8346 │ │ str r0, [r0, #4] │ │ - b.n a7b38 │ │ + b.n a7b44 │ │ lsls r1, r0, #28 │ │ - b.n a8622 │ │ + b.n a862e │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ movs r4, r2 │ │ - b.n a7b36 │ │ + b.n a7b42 │ │ asrs r4, r5, #32 │ │ - b.n a7b3a │ │ + b.n a7b46 │ │ movs r0, r0 │ │ - b.n a82b4 │ │ + b.n a82c0 │ │ lsls r4, r7, #3 │ │ lsls r6, r2, #23 │ │ movs r0, r0 │ │ lsls r0, r2, #13 │ │ lsls r6, r2, #1 │ │ lsrs r0, r0, #8 │ │ - ldr r2, [pc, #688] @ (a82d0 ) │ │ - b.n a8636 │ │ + ldr r2, [pc, #688] @ (a82dc ) │ │ + b.n a8642 │ │ strh r2, [r0, #0] │ │ - b.n a8366 │ │ - ldr r2, [pc, #680] @ (a82d0 ) │ │ - b.n a86ba │ │ + b.n a8372 │ │ + ldr r2, [pc, #680] @ (a82dc ) │ │ + b.n a86c6 │ │ lsls r5, r5, #1 │ │ @ instruction: 0xea009008 │ │ - b.n a8372 │ │ + b.n a837e │ │ lsrs r0, r2, #11 │ │ - b.n a83ce │ │ + b.n a83da │ │ lsrs r0, r7, #11 │ │ - b.n a83cc │ │ - ldr r2, [pc, #680] @ (a82e4 ) │ │ - b.n a8652 │ │ - bl 503b3e │ │ + b.n a83d8 │ │ + ldr r2, [pc, #680] @ (a82f0 ) │ │ + b.n a865e │ │ + bl 503b4a │ │ strh r4, [r1, #0] │ │ - b.n a8386 │ │ + b.n a8392 │ │ lsls r4, r7, #3 │ │ - b.n a7bf6 │ │ - ldr r2, [pc, #680] @ (a82f4 ) │ │ - b.n a86e6 │ │ + b.n a7c02 │ │ + ldr r2, [pc, #680] @ (a8300 ) │ │ + b.n a86f2 │ │ movs r0, r0 │ │ - b.n a86f2 │ │ + b.n a86fe │ │ lsls r3, r4, #1 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #1 │ │ - b.n a7b86 │ │ + b.n a7b92 │ │ strb r4, [r0, #0] │ │ - b.n a839e │ │ + b.n a83aa │ │ cmp r0, #208 @ 0xd0 │ │ - b.n a83e2 │ │ + b.n a83ee │ │ ands r1, r0 │ │ - b.n a858a │ │ + b.n a8596 │ │ str r0, [r0, r0] │ │ - b.n a85b0 │ │ + b.n a85bc │ │ lsls r1, r0, #28 │ │ - b.n a86aa │ │ - ldr r0, [pc, #960] @ (a8430 ) │ │ - b.n a83f2 │ │ + b.n a86b6 │ │ + ldr r0, [pc, #960] @ (a843c ) │ │ + b.n a83fe │ │ lsls r2, r3, #1 │ │ subs r0, r0, r0 │ │ lsls r4, r7, #28 │ │ - b.n a7bb8 │ │ + b.n a7bc4 │ │ adds r0, #3 │ │ - b.n a87be │ │ + b.n a87ca │ │ asrs r4, r3, #1 │ │ - b.n a7c2e │ │ + b.n a7c3a │ │ movs r0, r0 │ │ - b.n a81a4 │ │ + b.n a81b0 │ │ movs r0, #80 @ 0x50 │ │ - b.n a7baa │ │ + b.n a7bb6 │ │ movs r0, r2 │ │ - b.n a7bba │ │ + b.n a7bc6 │ │ asrs r3, r2, #4 │ │ - b.n a8196 │ │ + b.n a81a2 │ │ movs r0, #0 │ │ - b.n a855a │ │ + b.n a8566 │ │ asrs r1, r0, #32 │ │ - b.n a851c │ │ + b.n a8528 │ │ asrs r2, r0, #32 │ │ - b.n a80a0 │ │ + b.n a80ac │ │ movs r0, #4 │ │ - b.n a87e2 │ │ - stmia r2!, {r1, r3, r5, r7} │ │ + b.n a87ee │ │ + stmia r2!, {r0, r1, r3, r5, r7} │ │ add.w r0, r0, r0 │ │ - b.n a874a │ │ + b.n a8756 │ │ lsls r3, r1, #1 │ │ lsrs r0, r0, #8 │ │ - stmia r1!, {r0, r1, r2, r5, r6, r7} │ │ + stmia r1!, {r3, r5, r6, r7} │ │ add.w r0, r0, r0 │ │ - b.n a7bd6 │ │ + b.n a7be2 │ │ ands r7, r0 │ │ - b.n a83fa │ │ + b.n a8406 │ │ str r0, [r0, #4] │ │ - b.n a7bf8 │ │ + b.n a7c04 │ │ movs r0, r0 │ │ - b.n a8762 │ │ + b.n a876e │ │ lsls r7, r0, #1 │ │ lsrs r0, r0, #8 │ │ vpmin.u8 q7, , │ │ str r0, [r0, #4] │ │ - b.n a7c08 │ │ + b.n a7c14 │ │ movs r5, r0 │ │ - b.n a8412 │ │ - stmia r2!, {r1, r3, r4, r5, r7} │ │ + b.n a841e │ │ + stmia r2!, {r0, r1, r3, r4, r5, r7} │ │ @ instruction: 0xeb00e044 │ │ - b.n a7c14 │ │ + b.n a7c20 │ │ movs r0, r0 │ │ - b.n a877e │ │ + b.n a878a │ │ vpmin.u8 q0, q14, │ │ - stmia r1!, {r1, r3, r4, r6, r7} │ │ + stmia r1!, {r0, r1, r3, r4, r6, r7} │ │ add.w r0, r0, r0 │ │ - b.n a7c0a │ │ + b.n a7c16 │ │ movs r4, r0 │ │ - b.n a878e │ │ + b.n a879a │ │ @ instruction: 0xfff60aff │ │ mrc2 10, 7, lr, cr6, cr15, {7} @ │ │ movs r1, #180 @ 0xb4 │ │ - b.n a84ac │ │ + b.n a84b8 │ │ movs r0, r0 │ │ - b.n a87a2 │ │ + b.n a87ae │ │ lsls r2, r6, #1 │ │ lsrs r0, r0, #8 │ │ adds r0, #1 │ │ - b.n a8716 │ │ + b.n a8722 │ │ str r3, [r0, r0] │ │ - b.n a810e │ │ + b.n a811a │ │ movs r3, r0 │ │ - b.n a83b8 │ │ + b.n a83c4 │ │ lsls r5, r5, #1 │ │ subs r0, r0, r0 │ │ subs r7, #255 @ 0xff │ │ - b.n a8734 │ │ + b.n a8740 │ │ ldr r1, [r0, r0] │ │ - b.n a885a │ │ + b.n a8866 │ │ movs r3, r0 │ │ - b.n a83c2 │ │ + b.n a83ce │ │ lsls r2, r5, #1 │ │ lsrs r0, r0, #8 │ │ adds r0, #210 @ 0xd2 │ │ - b.n a80fa │ │ + b.n a8106 │ │ movs r6, #34 @ 0x22 │ │ - b.n a846a │ │ + b.n a8476 │ │ adds r0, #1 │ │ - b.n a8634 │ │ + b.n a8640 │ │ ldr r2, [r0, r4] │ │ - b.n a8872 │ │ + b.n a887e │ │ strh r3, [r2, r0] │ │ - b.n a8240 │ │ + b.n a824c │ │ lsls r4, r4, #1 │ │ and.w r6, r0, r4, asr #5 │ │ - b.n a7c7c │ │ + b.n a7c88 │ │ movs r4, r0 │ │ - b.n a7b72 │ │ + b.n a7b7e │ │ adds r6, #96 @ 0x60 │ │ - b.n a7c84 │ │ + b.n a7c90 │ │ asrs r1, r0, #32 │ │ - b.n a8268 │ │ + b.n a8274 │ │ movs r0, #56 @ 0x38 │ │ - b.n a7c88 │ │ + b.n a7c94 │ │ adds r0, #3 │ │ - b.n a8270 │ │ + b.n a827c │ │ movs r0, #8 │ │ - b.n a7c70 │ │ + b.n a7c7c │ │ strb r4, [r6, #0] │ │ - b.n a7c94 │ │ + b.n a7ca0 │ │ movs r4, #140 @ 0x8c │ │ - b.n a875e │ │ + b.n a876a │ │ movs r0, r0 │ │ - b.n a7c7c │ │ + b.n a7c88 │ │ movs r3, r0 │ │ - b.n a88a6 │ │ + b.n a88b2 │ │ strb r4, [r1, #0] │ │ - b.n a7c84 │ │ + b.n a7c90 │ │ ldmia r4!, {r1, r2, r3, r5} │ │ @ instruction: 0xebff0000 │ │ - b.n a88b2 │ │ - beq.n a81ac │ │ - b.n a860c │ │ + b.n a88be │ │ + beq.n a81b8 │ │ + b.n a8618 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r6} │ │ - b.n a7caa │ │ + b.n a7cb6 │ │ asrs r2, r1, #32 │ │ - b.n a88c2 │ │ + b.n a88ce │ │ cmp r0, #216 @ 0xd8 │ │ - b.n a8506 │ │ + b.n a8512 │ │ ands r1, r0 │ │ - b.n a86ae │ │ + b.n a86ba │ │ str r0, [r0, r0] │ │ - b.n a86d4 │ │ - ldr r0, [pc, #992] @ (a8570 ) │ │ - b.n a8512 │ │ + b.n a86e0 │ │ + ldr r0, [pc, #992] @ (a857c ) │ │ + b.n a851e │ │ movs r4, r2 │ │ - b.n a7cc2 │ │ - cmp r3, #197 @ 0xc5 │ │ + b.n a7cce │ │ + cmp r3, #198 @ 0xc6 │ │ add.w r0, r0, r0, lsl #25 │ │ - b.n a7cd8 │ │ + b.n a7ce4 │ │ movs r0, #8 │ │ - b.n a84e2 │ │ + b.n a84ee │ │ movs r0, r0 │ │ - b.n a8846 │ │ + b.n a8852 │ │ @ instruction: 0xff9c0aff │ │ asrs r0, r2, #32 │ │ - b.n a7cda │ │ + b.n a7ce6 │ │ movs r0, #44 @ 0x2c │ │ - b.n a7cde │ │ + b.n a7cea │ │ ands r1, r0 │ │ - b.n a8248 │ │ + b.n a8254 │ │ asrs r0, r2, #1 │ │ - b.n a86d4 │ │ + b.n a86e0 │ │ ldrsh r4, [r0, r7] │ │ - b.n a84fe │ │ + b.n a850a │ │ lsrs r0, r6 │ │ - b.n a855c │ │ + b.n a8568 │ │ str r0, [r0, r0] │ │ - b.n a8506 │ │ + b.n a8512 │ │ movs r2, r0 │ │ - b.n a850a │ │ + b.n a8516 │ │ movs r0, #224 @ 0xe0 │ │ - b.n a890e │ │ - cmp r3, #220 @ 0xdc │ │ + b.n a891a │ │ + cmp r3, #221 @ 0xdd │ │ add.w r0, r0, r0, lsl #25 │ │ - b.n a7d10 │ │ + b.n a7d1c │ │ movs r5, r0 │ │ - b.n a851a │ │ + b.n a8526 │ │ mcr2 10, 6, lr, cr0, cr15, {7} @ │ │ str r0, [r0, #4] │ │ - b.n a7d1c │ │ + b.n a7d28 │ │ ands r7, r0 │ │ - b.n a8526 │ │ + b.n a8532 │ │ strb r0, [r1, #1] │ │ - b.n a8704 │ │ + b.n a8710 │ │ movs r0, r0 │ │ - b.n a892e │ │ + b.n a893a │ │ lsls r4, r1, #1 │ │ - b.n a7d0c │ │ + b.n a7d18 │ │ lsls r0, r1, #1 │ │ - b.n a7d10 │ │ + b.n a7d1c │ │ asrs r0, r2, #32 │ │ - b.n a7d26 │ │ + b.n a7d32 │ │ lsls r4, r3, #1 │ │ - b.n a7daa │ │ + b.n a7db6 │ │ asrs r1, r0, #32 │ │ - b.n a8294 │ │ + b.n a82a0 │ │ movs r0, #208 @ 0xd0 │ │ - b.n a8596 │ │ + b.n a85a2 │ │ str r0, [sp, #0] │ │ - b.n a7d24 │ │ + b.n a7d30 │ │ movs r1, r6 │ │ - b.n a854e │ │ + b.n a855a │ │ lsls r1, r0, #2 │ │ @ instruction: 0xe98d0006 │ │ - b.n a8556 │ │ - ldrh r2, [r5, #60] @ 0x3c │ │ + b.n a8562 │ │ + ldrh r3, [r5, #60] @ 0x3c │ │ add.w r0, r0, r0 │ │ - b.n a88be │ │ + b.n a88ca │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n a8906 │ │ + b.n a8912 │ │ @ instruction: 0xfff20aff │ │ mcr2 10, 5, lr, cr12, cr15, {7} @ │ │ movs r0, r0 │ │ - b.n a7d62 │ │ + b.n a7d6e │ │ str r0, [r2, r1] │ │ - b.n a8750 │ │ + b.n a875c │ │ movs r0, #68 @ 0x44 │ │ - b.n a7d74 │ │ + b.n a7d80 │ │ asrs r0, r1, #1 │ │ - b.n a7d6a │ │ + b.n a7d76 │ │ lsls r1, r0, #28 │ │ - b.n a8866 │ │ + b.n a8872 │ │ movs r4, r0 │ │ asrs r0, r0, #2 │ │ movs r4, r2 │ │ - b.n a7d4c │ │ + b.n a7d58 │ │ movs r5, r0 │ │ - b.n a858e │ │ + b.n a859a │ │ asrs r6, r0, #32 │ │ - b.n a8592 │ │ + b.n a859e │ │ ldmia r3, {r1, r3, r4, r6} │ │ @ instruction: 0xebff0acd │ │ orn r0, r5, #9043968 @ 0x8a0000 │ │ - b.n a859e │ │ + b.n a85aa │ │ cmp r2, #207 @ 0xcf │ │ orn sl, r5, #6717440 @ 0x668000 │ │ orr.w sl, r0, #423936 @ 0x67800 │ │ orr.w r0, r0, #4325376 @ 0x420000 │ │ - b.n a7d9a │ │ + b.n a7da6 │ │ movs r0, r0 │ │ and.w r0, r0, r4, lsr #32 │ │ - b.n a7d96 │ │ + b.n a7da2 │ │ movs r0, r0 │ │ - b.n a891a │ │ + b.n a8926 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #2 │ │ - b.n a8782 │ │ + b.n a878e │ │ movs r2, r1 │ │ - b.n a8528 │ │ + b.n a8534 │ │ @ instruction: 0xfff90aff │ │ movs r0, #10 │ │ - b.n a85ce │ │ + b.n a85da │ │ lsrs r5, r1, #11 │ │ orn sl, r2, #423936 @ 0x67800 │ │ orn sl, r2, #6717440 @ 0x668000 │ │ orr.w sl, r1, #423936 @ 0x67800 │ │ - bl ffcea284 │ │ + bl ffcea290 │ │ @ instruction: 0xeaff0030 │ │ - b.n a7de0 │ │ + b.n a7dec │ │ movs r0, r0 │ │ - b.n a894a │ │ + b.n a8956 │ │ lsls r3, r2, #3 │ │ subs r0, r0, r0 │ │ asrs r0, r6, #32 │ │ - b.n a7dde │ │ + b.n a7dea │ │ movs r0, r0 │ │ - b.n a89f6 │ │ + b.n a8a02 │ │ movs r0, r0 │ │ - b.n a895c │ │ + b.n a8968 │ │ lsls r0, r1, #7 │ │ asrs r1, r0, #22 │ │ - beq.n a82f8 │ │ + beq.n a8304 │ │ asrs r3, r1, #9 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ adds r5, r7, r2 │ │ mcr2 10, 7, lr, cr4, cr15, {7} @ │ │ str r2, [r0, r0] │ │ - b.n a860e │ │ + b.n a861a │ │ ands r0, r0 │ │ - b.n a83d4 │ │ + b.n a83e0 │ │ asrs r5, r0, #32 │ │ - b.n a8616 │ │ + b.n a8622 │ │ movs r4, r0 │ │ - b.n a861a │ │ + b.n a8626 │ │ push {r2, r3, r6, r7} │ │ @ instruction: 0xfa006040 │ │ - b.n a7e1c │ │ + b.n a7e28 │ │ adds r0, #4 │ │ - b.n a83f0 │ │ + b.n a83fc │ │ movs r0, r3 │ │ - b.n a7e1c │ │ + b.n a7e28 │ │ asrs r1, r0, #32 │ │ - b.n a8374 │ │ + b.n a8380 │ │ movs r0, #92 @ 0x5c │ │ - b.n a7e9e │ │ + b.n a7eaa │ │ strb r0, [r1, r2] │ │ - b.n a7e34 │ │ + b.n a7e40 │ │ str r5, [r0, r0] │ │ - b.n a8418 │ │ + b.n a8424 │ │ str r0, [r2, r1] │ │ - b.n a7e28 │ │ + b.n a7e34 │ │ asrs r1, r2, #8 │ │ - b.n a840c │ │ + b.n a8418 │ │ adds r0, #0 │ │ - b.n a87d0 │ │ + b.n a87dc │ │ asrs r1, r0, #32 │ │ - b.n a878c │ │ + b.n a8798 │ │ asrs r3, r0, #32 │ │ - b.n a8310 │ │ + b.n a831c │ │ lsls r1, r6, #8 │ │ - b.n a85b2 │ │ + b.n a85be │ │ lsls r1, r6, #8 │ │ adds r1, #160 @ 0xa0 │ │ movs r0, r0 │ │ - b.n a85c8 │ │ + b.n a85d4 │ │ movs r3, r6 │ │ ldr r2, [sp, #0] │ │ asrs r4, r4, #32 │ │ - b.n a7e5c │ │ - b.n a8334 │ │ - b.n a8666 │ │ + b.n a7e68 │ │ + b.n a8340 │ │ + b.n a8672 │ │ str r4, [r6, r0] │ │ - b.n a7e64 │ │ + b.n a7e70 │ │ movs r0, #208 @ 0xd0 │ │ - b.n a86b0 │ │ + b.n a86bc │ │ adds r0, #3 │ │ - b.n a837c │ │ + b.n a8388 │ │ str r0, [r7, r0] │ │ - b.n a7e70 │ │ + b.n a7e7c │ │ asrs r0, r0, #32 │ │ - b.n a7eee │ │ + b.n a7efa │ │ movs r0, #2 │ │ - b.n a8388 │ │ + b.n a8394 │ │ movs r0, r4 │ │ - b.n a7e54 │ │ + b.n a7e60 │ │ movs r0, #3 │ │ - b.n a864a │ │ + b.n a8656 │ │ adds r0, #0 │ │ - b.n a894a │ │ + b.n a8956 │ │ movs r7, r0 │ │ - b.n a8970 │ │ + b.n a897c │ │ adds r0, #8 │ │ - b.n a89da │ │ - b.n a835a │ │ + b.n a89e6 │ │ + b.n a8366 │ │ asrs r6, r1, #32 │ │ movs r0, r0 │ │ - b.n a89fe │ │ + b.n a8a0a │ │ movs r0, r0 │ │ - b.n a83ec │ │ + b.n a83f8 │ │ movs r0, r6 │ │ - b.n a7e7c │ │ + b.n a7e88 │ │ ldc2l 10, cr1, [ip, #1020]! @ 0x3fc @ │ │ movs r0, r7 │ │ - b.n a7ea4 │ │ + b.n a7eb0 │ │ str r6, [r1, r0] │ │ - b.n a86ae │ │ + b.n a86ba │ │ ands r1, r0 │ │ - b.n a8892 │ │ + b.n a889e │ │ lsls r4, r1, #16 │ │ - b.n a7eb4 │ │ + b.n a7ec0 │ │ asrs r4, r6, #32 │ │ - b.n a7eb4 │ │ + b.n a7ec0 │ │ movs r0, r0 │ │ - b.n a849c │ │ + b.n a84a8 │ │ str r0, [sp, #0] │ │ - b.n a88c4 │ │ + b.n a88d0 │ │ lsls r2, r3, #1 │ │ - b.n a7f26 │ │ + b.n a7f32 │ │ movs r3, r0 │ │ - b.n a8a2a │ │ + b.n a8a36 │ │ lsls r0, r1, #3 │ │ cmp r2, #0 │ │ lsls r0, r0, #1 │ │ - b.n a7ecc │ │ + b.n a7ed8 │ │ lsls r4, r0, #2 │ │ - b.n a7eb6 │ │ + b.n a7ec2 │ │ movs r0, r0 │ │ - b.n a8a3a │ │ + b.n a8a46 │ │ lsls r0, r0, #1 │ │ asrs r5, r3, #22 │ │ lsls r4, r0, #4 │ │ asrs r0, r2, #22 │ │ movs r0, r0 │ │ asrs r0, r2, #13 │ │ lsls r4, r2, #3 │ │ subs r0, r0, r0 │ │ lsls r0, r4, #15 │ │ - b.n a7eec │ │ + b.n a7ef8 │ │ movs r1, r0 │ │ - b.n a8aa4 │ │ + b.n a8ab0 │ │ movs r0, r0 │ │ - b.n a84d4 │ │ + b.n a84e0 │ │ lsls r1, r1, #3 │ │ lsrs r0, r0, #8 │ │ str r4, [r7, #0] │ │ - b.n a7ef8 │ │ + b.n a7f04 │ │ lsls r0, r0, #1 │ │ - b.n a88c2 │ │ + b.n a88ce │ │ lsrs r7, r5, #11 │ │ bfx 10, r0 │ │ - b.n a870a │ │ + b.n a8716 │ │ lsls r0, r0, #3 │ │ - b.n a88da │ │ + b.n a88e6 │ │ lsls r0, r6 │ │ - b.n a7ede │ │ + b.n a7eea │ │ ands r0, r1 │ │ - b.n a7ee2 │ │ + b.n a7eee │ │ str r0, [sp, #720] @ 0x2d0 │ │ - b.n a7ee6 │ │ + b.n a7ef2 │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n a7eea │ │ + b.n a7ef6 │ │ str r0, [sp, #24] │ │ - b.n a8722 │ │ + b.n a872e │ │ str r0, [r0, #4] │ │ - b.n a7f20 │ │ + b.n a7f2c │ │ lsrs r7, r1, #10 │ │ - bl ffce8f9e │ │ + bl ffce8faa │ │ @ instruction: 0xeaffe008 │ │ - b.n a8732 │ │ + b.n a873e │ │ ldc2l 10, cr14, [r8, #1020] @ 0x3fc @ │ │ movs r0, r4 │ │ - b.n a7f14 │ │ + b.n a7f20 │ │ tst r1, r3 │ │ - b.n a873e │ │ + b.n a874a │ │ lsls r4, r0, #13 │ │ - b.n a7f40 │ │ + b.n a7f4c │ │ movs r0, r0 │ │ - b.n a8524 │ │ + b.n a8530 │ │ lsls r2, r3, #1 │ │ - b.n a7faa │ │ + b.n a7fb6 │ │ movs r3, r0 │ │ - b.n a8aae │ │ + b.n a8aba │ │ movs r6, r1 │ │ subs r2, #0 │ │ asrs r4, r6, #12 │ │ - b.n a7f54 │ │ + b.n a7f60 │ │ movs r4, #4 │ │ - b.n a8a1a │ │ + b.n a8a26 │ │ adds r3, #48 @ 0x30 │ │ - b.n a7f5c │ │ + b.n a7f68 │ │ lsls r0, r6, #12 │ │ - b.n a7f60 │ │ + b.n a7f6c │ │ asrs r1, r0, #32 │ │ - b.n a8544 │ │ + b.n a8550 │ │ adds r0, #3 │ │ - b.n a8548 │ │ + b.n a8554 │ │ strb r0, [r1, #0] │ │ - b.n a7f48 │ │ + b.n a7f54 │ │ movs r0, r0 │ │ - b.n a8550 │ │ + b.n a855c │ │ lsls r1, r0, #8 │ │ stmia.w sp, {r0, r1} │ │ - b.n a8b7a │ │ + b.n a8b86 │ │ ldmia r3, {r1, r3, r4, r5, r6} │ │ @ instruction: 0xebff6040 │ │ - b.n a7f7c │ │ + b.n a7f88 │ │ lsls r0, r2, #12 │ │ - b.n a7f84 │ │ + b.n a7f90 │ │ movs r0, r0 │ │ - b.n a8568 │ │ + b.n a8574 │ │ stmia r0!, {r4, r6} │ │ - b.n a7f6e │ │ + b.n a7f7a │ │ movs r0, r1 │ │ - b.n a7f7e │ │ + b.n a7f8a │ │ asrs r4, r3, #32 │ │ - b.n a7f82 │ │ + b.n a7f8e │ │ movs r0, r0 │ │ - b.n a8712 │ │ + b.n a871e │ │ movs r4, r1 │ │ strh r0, [r4, #12] │ │ movs r0, #0 │ │ - b.n a8922 │ │ + b.n a892e │ │ movs r0, r0 │ │ - b.n a8568 │ │ + b.n a8574 │ │ asrs r1, r1, #32 │ │ - b.n a87aa │ │ + b.n a87b6 │ │ movs r1, r0 │ │ - b.n a88ee │ │ + b.n a88fa │ │ movs r0, #2 │ │ - b.n a8472 │ │ + b.n a847e │ │ movs r6, r0 │ │ - b.n a87b6 │ │ - str r0, [r1, #88] @ 0x58 │ │ + b.n a87c2 │ │ + str r1, [r1, #88] @ 0x58 │ │ add.w r0, r0, r8, lsl #1 │ │ - b.n a7faa │ │ + b.n a7fb6 │ │ str r4, [r0, r0] │ │ - b.n a850c │ │ + b.n a8518 │ │ movs r0, #4 │ │ - b.n a8bc6 │ │ + b.n a8bd2 │ │ asrs r5, r0, #32 │ │ - b.n a87ca │ │ + b.n a87d6 │ │ strb r4, [r5, #0] │ │ - b.n a7fae │ │ + b.n a7fba │ │ movs r0, r2 │ │ - b.n a7fbe │ │ + b.n a7fca │ │ movs r0, r0 │ │ - b.n a859e │ │ - stmia r1!, {r0, r7} │ │ + b.n a85aa │ │ + stmia r1!, {r1, r7} │ │ add.w r0, r0, r0 │ │ - b.n a8b3e │ │ + b.n a8b4a │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ - stmia r0!, {r1, r3, r5, r6, r7} │ │ + stmia r0!, {r0, r1, r3, r5, r6, r7} │ │ add.w r0, r0, r0 │ │ - b.n a7fca │ │ + b.n a7fd6 │ │ movs r3, r1 │ │ - b.n a8b4e │ │ + b.n a8b5a │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r6, r4 │ │ - b.n a8b56 │ │ + b.n a8b62 │ │ lsls r7, r3, #1 │ │ asrs r0, r2, #13 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ str r0, [r0, #4] │ │ - b.n a7ffc │ │ + b.n a8008 │ │ lsls r0, r1, #1 │ │ - b.n a7ff2 │ │ + b.n a7ffe │ │ str r1, [sp, #416] @ 0x1a0 │ │ - b.n a7fca │ │ + b.n a7fd6 │ │ movs r0, r4 │ │ - b.n a8008 │ │ + b.n a8014 │ │ stc2 10, cr14, [r0, #1020] @ 0x3fc @ │ │ asrs r1, r0, #32 │ │ - b.n a8956 │ │ + b.n a8962 │ │ movs r3, r0 │ │ - b.n a8bbc │ │ + b.n a8bc8 │ │ @ instruction: 0xfff78aff │ │ str r0, [r0, #4] │ │ - b.n a801c │ │ + b.n a8028 │ │ movs r0, #5 │ │ - b.n a8826 │ │ + b.n a8832 │ │ movs r6, r2 │ │ - b.n a8b8a │ │ + b.n a8b96 │ │ asrs r0, r1, #1 │ │ - b.n a801a │ │ + b.n a8026 │ │ str r0, [r5, r0] │ │ - b.n a8014 │ │ + b.n a8020 │ │ movs r5, r3 │ │ subs r0, r0, r0 │ │ lsls r0, r4, #9 │ │ - b.n a8038 │ │ + b.n a8044 │ │ movs r0, #3 │ │ - b.n a8c3e │ │ + b.n a8c4a │ │ movs r7, r0 │ │ - b.n a87ac │ │ + b.n a87b8 │ │ movs r0, r0 │ │ - b.n a8624 │ │ + b.n a8630 │ │ movs r0, #2 │ │ lsls r0, r0, #12 │ │ lsls r2, r3, #1 │ │ - b.n a80ae │ │ + b.n a80ba │ │ movs r0, r0 │ │ - b.n a87b6 │ │ + b.n a87c2 │ │ movs r0, r4 │ │ - b.n a8050 │ │ + b.n a805c │ │ stc2l 10, cr8, [lr, #-1020]! @ 0xfffffc04 @ │ │ asrs r0, r0, #9 │ │ - b.n a805c │ │ + b.n a8068 │ │ str r6, [r2, #0] │ │ - b.n a8c62 │ │ + b.n a8c6e │ │ adds r2, #60 @ 0x3c │ │ - b.n a8064 │ │ + b.n a8070 │ │ lsls r4, r7, #8 │ │ - b.n a8068 │ │ + b.n a8074 │ │ asrs r1, r0, #32 │ │ - b.n a864c │ │ + b.n a8658 │ │ adds r0, #3 │ │ - b.n a8650 │ │ + b.n a865c │ │ str r0, [r1, r0] │ │ - b.n a8050 │ │ + b.n a805c │ │ movs r0, r0 │ │ - b.n a8658 │ │ + b.n a8664 │ │ strb r4, [r1, #0] │ │ - b.n a8058 │ │ + b.n a8064 │ │ lsls r1, r0, #1 │ │ stmia.w sp, {r1} │ │ - b.n a8886 │ │ + b.n a8892 │ │ movs r4, #26 │ │ - b.n a8b4a │ │ + b.n a8b56 │ │ ldmia r3!, {r1, r2, r4, r5} │ │ @ instruction: 0xebff6040 │ │ - b.n a808c │ │ + b.n a8098 │ │ @ instruction: 0xffdceaff │ │ lsls r0, r5, #9 │ │ - b.n a8098 │ │ + b.n a80a4 │ │ movs r4, #135 @ 0x87 │ │ - b.n a8b5e │ │ + b.n a8b6a │ │ asrs r4, r4, #9 │ │ - b.n a80a0 │ │ + b.n a80ac │ │ movs r0, r0 │ │ - b.n a8684 │ │ + b.n a8690 │ │ asrs r1, r0, #32 │ │ - b.n a8688 │ │ + b.n a8694 │ │ ldmia r2!, {r1, r5} │ │ @ instruction: 0xebff11f8 │ │ - b.n a80b0 │ │ + b.n a80bc │ │ asrs r1, r0, #32 │ │ - b.n a8694 │ │ + b.n a86a0 │ │ asrs r2, r3, #1 │ │ - b.n a811c │ │ + b.n a8128 │ │ movs r0, r0 │ │ - b.n a8c20 │ │ + b.n a8c2c │ │ mrc2 10, 1, r0, cr6, cr15, {7} @ │ │ asrs r0, r5, #7 │ │ - b.n a80c4 │ │ + b.n a80d0 │ │ adds r1, #232 @ 0xe8 │ │ - b.n a80c8 │ │ + b.n a80d4 │ │ stmia r1!, {r3, r5, r6, r7} │ │ - b.n a80cc │ │ + b.n a80d8 │ │ asrs r1, r0, #32 │ │ - b.n a86b0 │ │ + b.n a86bc │ │ str r4, [r4, #28] │ │ - b.n a80d4 │ │ + b.n a80e0 │ │ adds r0, #3 │ │ - b.n a86b8 │ │ + b.n a86c4 │ │ stmia r0!, {r2, r3} │ │ - b.n a86bc │ │ + b.n a86c8 │ │ stmia r0!, {} │ │ - b.n a80bc │ │ + b.n a80c8 │ │ stmia r0!, {r2, r3} │ │ - b.n a8ac0 │ │ + b.n a8acc │ │ ands r0, r1 │ │ - b.n a80c4 │ │ + b.n a80d0 │ │ lsls r4, r4, #2 │ │ stmia.w ip, {lr} │ │ - b.n a88f2 │ │ + b.n a88fe │ │ cmp r6, #66 @ 0x42 │ │ - b.n a8cf6 │ │ + b.n a8d02 │ │ movs r0, r3 │ │ - b.n a80d4 │ │ + b.n a80e0 │ │ movs r1, r0 │ │ - b.n a8cfe │ │ + b.n a8d0a │ │ str r6, [r0, #0] │ │ - b.n a86e0 │ │ + b.n a86ec │ │ str r4, [r0, #0] │ │ - b.n a80e0 │ │ + b.n a80ec │ │ ldmia r3!, {r0, r1, r2, r4} │ │ @ instruction: 0xebff0004 │ │ - b.n a890e │ │ - beq.n a8608 │ │ - b.n a8a68 │ │ + b.n a891a │ │ + beq.n a8614 │ │ + b.n a8a74 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, ip, sp, lr, pc} │ │ - b.n a8c1a │ │ + b.n a8c26 │ │ movs r0, #12 │ │ - b.n a891e │ │ + b.n a892a │ │ adds r0, #5 │ │ - b.n a8922 │ │ + b.n a892e │ │ stmia r1!, {r2, r3, r4, r6} │ │ - b.n a8108 │ │ + b.n a8114 │ │ str r0, [r3, r5] │ │ - b.n a810c │ │ + b.n a8118 │ │ strb r4, [r1, #0] │ │ - b.n a8632 │ │ + b.n a863e │ │ ands r5, r0 │ │ - b.n a8638 │ │ + b.n a8644 │ │ strb r7, [r0, #0] │ │ - b.n a891e │ │ + b.n a892a │ │ ldc2l 10, cr0, [r5], {255} @ 0xff @ │ │ @ instruction: 0xfff5eaff │ │ movs r4, r7 │ │ - b.n a813c │ │ + b.n a8148 │ │ movs r1, #220 @ 0xdc │ │ - b.n a8986 │ │ + b.n a8992 │ │ movs r6, r0 │ │ - b.n a894a │ │ + b.n a8956 │ │ asrs r3, r0, #32 │ │ - b.n a894e │ │ + b.n a895a │ │ adds r0, #1 │ │ - b.n a8d52 │ │ + b.n a8d5e │ │ vld4.32 @ instruction: 0xf9e9ebff │ │ str r0, [r0, #4] │ │ - b.n a8154 │ │ + b.n a8160 │ │ movs r1, r0 │ │ - b.n a8cbe │ │ - stc2 10, cr8, [pc, #1020]! @ a8a1c @ │ │ + b.n a8cca │ │ + stc2 10, cr8, [pc, #1020]! @ a8a28 @ │ │ vpmin.u32 q7, , │ │ str r4, [r7, #0] │ │ - b.n a8164 │ │ + b.n a8170 │ │ movs r1, r0 │ │ - b.n a8d0e │ │ + b.n a8d1a │ │ movs r3, r0 │ │ - bge.n a8632 │ │ + bge.n a863e │ │ str r6, [r0, #0] │ │ - b.n a8736 │ │ + b.n a8742 │ │ ands r4, r0 │ │ - b.n a873a │ │ + b.n a8746 │ │ str r0, [r0, r0] │ │ - b.n a86c8 │ │ + b.n a86d4 │ │ movs r3, r0 │ │ - @ instruction: 0xea00c082 │ │ + @ instruction: 0xea00c083 │ │ add.w r0, r0, r0, lsl #4 │ │ - b.n a816a │ │ + b.n a8176 │ │ movs r4, r0 │ │ - b.n a8cf0 │ │ + b.n a8cfc │ │ movs r2, r2 │ │ subs r0, r0, r0 │ │ lsls r7, r7, #16 │ │ - b.n a8d00 │ │ + b.n a8d0c │ │ movs r0, #5 │ │ - b.n a899a │ │ + b.n a89a6 │ │ movs r4, #63 @ 0x3f │ │ movs r3, #160 @ 0xa0 │ │ movs r7, r0 │ │ - b.n a89a2 │ │ + b.n a89ae │ │ asrs r6, r0, #32 │ │ - b.n a89a6 │ │ + b.n a89b2 │ │ adds r0, #4 │ │ - b.n a89aa │ │ - stmia r1!, {r3, r4, r6} │ │ + b.n a89b6 │ │ + stmia r1!, {r0, r3, r4, r6} │ │ add.w r0, r0, r0 │ │ - b.n a891c │ │ + b.n a8928 │ │ mrc2 10, 2, r0, cr14, cr15, {7} @ │ │ @ instruction: 0xffebeaff │ │ movs r0, r0 │ │ - b.n a8dbe │ │ + b.n a8dca │ │ asrs r0, r0, #32 │ │ - b.n a8dc2 │ │ + b.n a8dce │ │ ldc2l 10, cr14, [r9], {255} @ 0xff @ │ │ lsls r0, r4, #4 │ │ - b.n a81c8 │ │ + b.n a81d4 │ │ movs r4, #178 @ 0xb2 │ │ - b.n a8c8e │ │ + b.n a8c9a │ │ asrs r4, r3, #4 │ │ - b.n a81d0 │ │ + b.n a81dc │ │ movs r0, r0 │ │ - b.n a87b4 │ │ + b.n a87c0 │ │ asrs r1, r0, #32 │ │ - b.n a87b8 │ │ + b.n a87c4 │ │ ldmia r1, {r1, r2, r4, r6, r7} │ │ @ instruction: 0xebff0001 │ │ - b.n a89e2 │ │ + b.n a89ee │ │ movs r0, r0 │ │ - b.n a8d48 │ │ + b.n a8d54 │ │ mrc2 10, 2, r0, cr1, cr15, {7} @ │ │ str r0, [r0, #4] │ │ - b.n a81e8 │ │ + b.n a81f4 │ │ mrc2 10, 5, lr, cr13, cr15, {7} @ │ │ asrs r0, r2, #3 │ │ - b.n a81f4 │ │ + b.n a8200 │ │ movs r4, #62 @ 0x3e │ │ - b.n a8cba │ │ + b.n a8cc6 │ │ adds r0, #204 @ 0xcc │ │ - b.n a81fc │ │ + b.n a8208 │ │ movs r0, r7 │ │ - b.n a81fc │ │ + b.n a8208 │ │ asrs r1, r0, #32 │ │ - b.n a87e4 │ │ + b.n a87f0 │ │ movs r0, r0 │ │ - b.n a81e4 │ │ + b.n a81f0 │ │ adds r0, #3 │ │ - b.n a87ec │ │ + b.n a87f8 │ │ movs r4, r6 │ │ - b.n a820c │ │ + b.n a8218 │ │ lsls r1, r2, #8 │ │ @ instruction: 0xe98d0003 │ │ - b.n a8e1a │ │ + b.n a8e26 │ │ ldmia r2!, {r1, r4, r6, r7} │ │ @ instruction: 0xebffff2a │ │ @ instruction: 0xeaff105a │ │ - b.n a8286 │ │ + b.n a8292 │ │ lsls r4, r7, #30 │ │ - b.n a8cfa │ │ + b.n a8d06 │ │ lsrs r7, r7, #31 │ │ - b.n a8d8c │ │ + b.n a8d98 │ │ movs r0, r0 │ │ - b.n a8d94 │ │ + b.n a8da0 │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ str r0, [r0, #4] │ │ - b.n a8234 │ │ + b.n a8240 │ │ ldc2l 10, cr14, [r8, #-1020]! @ 0xfffffc04 @ │ │ lsls r0, r7, #2 │ │ - b.n a8240 │ │ + b.n a824c │ │ movs r4, #63 @ 0x3f │ │ - b.n a8d06 │ │ + b.n a8d12 │ │ asrs r4, r6, #2 │ │ - b.n a8248 │ │ + b.n a8254 │ │ movs r0, r0 │ │ - b.n a882c │ │ + b.n a8838 │ │ asrs r1, r0, #32 │ │ - b.n a8830 │ │ + b.n a883c │ │ ldmia r1!, {r3, r4, r5, r7} │ │ @ instruction: 0xebff1078 │ │ - b.n a8258 │ │ + b.n a8264 │ │ ands r0, r0 │ │ - b.n a8a5e │ │ + b.n a8a6a │ │ adds r0, #116 @ 0x74 │ │ - b.n a8260 │ │ + b.n a826c │ │ movs r4, #66 @ 0x42 │ │ - b.n a8d26 │ │ + b.n a8d32 │ │ asrs r1, r0, #32 │ │ - b.n a8848 │ │ + b.n a8854 │ │ movs r0, r0 │ │ - b.n a8248 │ │ + b.n a8254 │ │ adds r0, #3 │ │ - b.n a8850 │ │ + b.n a885c │ │ movs r1, r0 │ │ - b.n a8e76 │ │ + b.n a8e82 │ │ ldmia r2!, {r0, r1, r3, r4, r5, r7} │ │ @ instruction: 0xebff0004 │ │ - b.n a8a7e │ │ + b.n a8a8a │ │ @ instruction: 0xffeceaff │ │ - ldr r0, [r1, #104] @ 0x68 │ │ + ldr r4, [r3, #104] @ 0x68 │ │ movs r3, r0 │ │ - ldr r4, [r6, #88] @ 0x58 │ │ + ldr r0, [r1, #92] @ 0x5c │ │ movs r3, r0 │ │ - str r0, [r1, #68] @ 0x44 │ │ + str r4, [r3, #68] @ 0x44 │ │ movs r3, r0 │ │ - adds r0, r2, #4 │ │ - vtrn.16 , │ │ - @ instruction: 0xfff64abd │ │ - vrintn.f16 d22, d4 │ │ + adds r1, r5, #7 │ │ + vshr.u64 , q11, #10 │ │ + @ instruction: 0xfff64b34 │ │ + vsri.32 d22, d8, #10 │ │ movs r3, r0 │ │ - str r0, [r1, #52] @ 0x34 │ │ + str r4, [r3, #52] @ 0x34 │ │ movs r3, r0 │ │ - adds r0, r1, #0 │ │ - vsra.u64 d21, d2, #10 │ │ - vrshr.u32 d16, d10, #10 │ │ - vrshr.u64 q11, q4, #10 │ │ + adds r1, r4, #3 │ │ + vqmovun.s32 d21, │ │ + vqmovun.s32 d16, q8 │ │ + vqmovn.u32 d22, q14 │ │ movs r3, r0 │ │ - subs r4, r4, r6 │ │ - vrintn.f16 d20, d10 │ │ - vsra.u64 d16, d22, #10 │ │ - vtbl.8 d20, {d6-d7}, d29 │ │ - vsli.32 q11, q2, #22 │ │ + adds r5, r7, #1 │ │ + vrintn.f16 d20, d19 │ │ + vsra.u64 q8, q14, #10 │ │ + vtbl.8 d20, {d22-d23}, d20 │ │ + vrinta.f16 q11, q12 │ │ movs r3, r0 │ │ - str r0, [r2, #76] @ 0x4c │ │ + str r4, [r4, #76] @ 0x4c │ │ movs r3, r0 │ │ - subs r0, r6, r1 │ │ - @ instruction: 0xfff65b52 │ │ - vsri.64 d22, d8, #10 │ │ + subs r1, r1, r5 │ │ + @ instruction: 0xfff65bdb │ │ + vrintx.f16 d22, d28 │ │ movs r3, r0 │ │ - subs r4, r1, r0 │ │ - vsri.32 d21, d22, #10 │ │ - vtbx.8 d22, {d22-d25}, d0 │ │ + subs r5, r4, r3 │ │ + vsli.32 d21, d14, #22 │ │ + @ instruction: 0xfff66bd4 │ │ movs r3, r0 │ │ - ldr r0, [r0, #32] │ │ + ldr r4, [r2, #32] │ │ movs r3, r0 │ │ - subs r4, r5, #7 │ │ - @ instruction: 0xfff67b9e │ │ - vrint?.f16 q9, │ │ - @ instruction: 0xfff61a9c │ │ - @ instruction: 0xfff668f8 │ │ - movs r3, r0 │ │ - str r0, [r1, #124] @ 0x7c │ │ - movs r3, r0 │ │ - ldr r2, [r2, #64] @ 0x40 │ │ - vtbl.8 d17, {d6-d8}, d20 │ │ - @ instruction: 0xfff61fd0 │ │ - vtbx.8 d17, {d22-d25}, d12 │ │ - @ instruction: 0xfff66adc │ │ - vrshr.u64 q9, q10, #10 │ │ + movs r0, #197 @ 0xc5 │ │ + vtbx.8 d23, {d22-d25}, d18 │ │ + vqshlu.s64 d18, d4, #54 @ 0x36 │ │ + @ instruction: 0xfff61b75 │ │ + vtbl.8 d22, {d6-d7}, d12 │ │ + movs r3, r0 │ │ + str r4, [r3, #124] @ 0x7c │ │ + movs r3, r0 │ │ + ldr r4, [r7, #80] @ 0x50 │ │ + @ instruction: 0xfff61afd │ │ + @ instruction: 0xfff61ffb │ │ + vmull.u , d22, d21 │ │ + vmull.u q11, d22, d31 │ │ + @ instruction: 0xfff623cd │ │ vcvt.f16.u16 d20, d0, #10 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n a8cf8 │ │ + b.n a8d04 │ │ movs r0, #1 │ │ - b.n a8b22 │ │ + b.n a8b2e │ │ movs r0, r0 │ │ - b.n a8e8a │ │ + b.n a8e96 │ │ asrs r4, r0, #32 │ │ - b.n a830a │ │ + b.n a8316 │ │ movs r4, r1 │ │ lsrs r0, r0, #8 │ │ - bl 5042ee │ │ + bl 5042fa │ │ movs r0, #0 │ │ - b.n a8316 │ │ - bl 5042f6 │ │ + b.n a8322 │ │ + bl 504302 │ │ stmia r0!, {r2} │ │ - b.n a831e │ │ - bl 5042fe │ │ - b.n a8804 │ │ - b.n a8326 │ │ + b.n a832a │ │ + bl 50430a │ │ + b.n a8810 │ │ + b.n a8332 │ │ ands r4, r1 │ │ - b.n a884c │ │ + b.n a8858 │ │ adds r0, #14 │ │ - b.n a8852 │ │ + b.n a885e │ │ adds r0, #4 │ │ - b.n a8b38 │ │ - bl 504312 │ │ + b.n a8b44 │ │ + bl 50431e │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ movs r2, r0 │ │ - b.n a8b5e │ │ + b.n a8b6a │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {sp} │ │ - b.n a8346 │ │ + b.n a8352 │ │ stmia r0!, {r2} │ │ - b.n a834a │ │ - b.n a882c │ │ - b.n a834e │ │ + b.n a8356 │ │ + b.n a8838 │ │ + b.n a835a │ │ adds r0, #12 │ │ - b.n a8874 │ │ + b.n a8880 │ │ ands r6, r1 │ │ - b.n a887a │ │ + b.n a8886 │ │ adds r0, #3 │ │ - b.n a8b62 │ │ + b.n a8b6e │ │ @ instruction: 0xfff60aff │ │ - blx 4a9e80 │ │ + blx 4a9e8c │ │ asrs r4, r1, #32 │ │ - b.n a8b86 │ │ + b.n a8b92 │ │ movs r0, #14 │ │ - b.n a8b8a │ │ + b.n a8b96 │ │ @ instruction: 0xfff5eaff │ │ - blx 4a9e90 │ │ + blx 4a9e9c │ │ asrs r4, r1, #32 │ │ - b.n a8b96 │ │ + b.n a8ba2 │ │ movs r0, #14 │ │ - b.n a8b9a │ │ + b.n a8ba6 │ │ stmia r0!, {r2} │ │ - b.n a837e │ │ - bl 50435e │ │ - b.n a8864 │ │ - b.n a8386 │ │ + b.n a838a │ │ + bl 50436a │ │ + b.n a8870 │ │ + b.n a8392 │ │ adds r0, #12 │ │ - b.n a88ac │ │ + b.n a88b8 │ │ ands r6, r1 │ │ - b.n a88b2 │ │ + b.n a88be │ │ adds r0, #3 │ │ - b.n a8b9a │ │ - bl 504372 │ │ + b.n a8ba6 │ │ + bl 50437e │ │ @ instruction: 0xffe70aff │ │ @ instruction: 0xfff3eaff │ │ - ldr r7, [pc, #960] @ (a8c40 ) │ │ + ldr r7, [pc, #960] @ (a8c4c ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n a8da0 │ │ + b.n a8dac │ │ svc 153 @ 0x99 │ │ - b.n a8d24 │ │ + b.n a8d30 │ │ movs r0, r0 │ │ - b.n a8f2e │ │ + b.n a8f3a │ │ asrs r0, r2, #32 │ │ - b.n a83ac │ │ + b.n a83b8 │ │ lsls r6, r2, #3 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, r0] │ │ - b.n a8bda │ │ + b.n a8be6 │ │ movs r0, r0 │ │ - b.n a83be │ │ + b.n a83ca │ │ asrs r1, r0, #25 │ │ - b.n a8eb4 │ │ + b.n a8ec0 │ │ subs r1, r1, r2 │ │ - b.n a8f28 │ │ + b.n a8f34 │ │ movs r1, r0 │ │ - b.n a8b4a │ │ + b.n a8b56 │ │ lsls r2, r2, #3 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n a83dc │ │ + b.n a83e8 │ │ movs r0, r0 │ │ - b.n a8f56 │ │ + b.n a8f62 │ │ lsls r1, r2, #3 │ │ - ldr r2, [pc, #0] @ (a88b8 ) │ │ + ldr r2, [pc, #0] @ (a88c4 ) │ │ lsls r2, r0, #8 │ │ - b.n a8ede │ │ + b.n a8eea │ │ lsls r0, r3, #3 │ │ lsrs r0, r0, #8 │ │ movs r0, r6 │ │ - b.n a83f0 │ │ + b.n a83fc │ │ ands r2, r0 │ │ - b.n a8c0a │ │ + b.n a8c16 │ │ movs r0, r0 │ │ - b.n a8f6e │ │ + b.n a8f7a │ │ lsls r6, r1, #3 │ │ lsrs r0, r0, #8 │ │ movs r4, r1 │ │ - b.n a83f0 │ │ + b.n a83fc │ │ str r0, [r5, #0] │ │ - b.n a8df4 │ │ + b.n a8e00 │ │ asrs r4, r0, #7 │ │ - b.n a83fe │ │ - bl 5043de │ │ + b.n a840a │ │ + bl 5043ea │ │ asrs r4, r3, #32 │ │ - b.n a8400 │ │ + b.n a840c │ │ lsls r6, r1, #2 │ │ - b.n a8f8c │ │ + b.n a8f98 │ │ movs r0, r1 │ │ cmp r2, #0 │ │ movs r0, r0 │ │ - b.n a9032 │ │ + b.n a903e │ │ movs r0, r0 │ │ - b.n a8f98 │ │ - add r0, pc, #24 @ (adr r0, a8910 ) │ │ - b.n a8c3a │ │ + b.n a8fa4 │ │ + add r0, pc, #24 @ (adr r0, a891c ) │ │ + b.n a8c46 │ │ movs r0, r5 │ │ - b.n a8418 │ │ + b.n a8424 │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ movs r0, r4 │ │ - b.n a8420 │ │ - add r0, pc, #24 @ (adr r0, a8920 ) │ │ - b.n a8c4a │ │ + b.n a842c │ │ + add r0, pc, #24 @ (adr r0, a892c ) │ │ + b.n a8c56 │ │ strb r0, [r0, #0] │ │ - b.n a904e │ │ + b.n a905a │ │ lsls r6, r2, #2 │ │ and.w r0, r0, r4 │ │ - b.n a9056 │ │ + b.n a9062 │ │ lsls r1, r0, #4 │ │ - b.n a8a1a │ │ - ite lt │ │ + b.n a8a26 │ │ + ittee lt │ │ addlt.w r0, r0, r0 │ │ - bge.n a8fc2 │ │ - lsls r5, r7, #2 │ │ - lsrs r0, r0, #8 │ │ + blt.n a8fce @ unpredictable branch in IT block │ │ + │ │ + lslge r5, r7, #2 │ │ + lsrge r0, r0, #8 │ │ asrs r4, r3, #32 │ │ - b.n a8464 │ │ - add r0, pc, #0 @ (adr r0, a892c ) │ │ - b.n a8c6e │ │ + b.n a8470 │ │ + add r0, pc, #0 @ (adr r0, a8938 ) │ │ + b.n a8c7a │ │ movs r0, r0 │ │ - b.n a9072 │ │ + b.n a907e │ │ movs r0, r0 │ │ - b.n a844a │ │ + b.n a8456 │ │ strb r4, [r1, #0] │ │ - b.n a8474 │ │ + b.n a8480 │ │ str r0, [sp, #4] │ │ - b.n a8c7e │ │ + b.n a8c8a │ │ strh r0, [r0, #0] │ │ - b.n a9082 │ │ - b.n a8944 │ │ - b.n a9086 │ │ + b.n a908e │ │ + b.n a8950 │ │ + b.n a9092 │ │ cmp r4, #2 │ │ - b.n a8e58 │ │ + b.n a8e64 │ │ subs r6, #33 @ 0x21 │ │ - b.n a8e5c │ │ + b.n a8e68 │ │ ands r4, r0 │ │ - b.n a846c │ │ + b.n a8478 │ │ movs r0, #20 │ │ - b.n a8470 │ │ + b.n a847c │ │ str r0, [r1, r0] │ │ - b.n a8474 │ │ + b.n a8480 │ │ str r0, [r1, #40] @ 0x28 │ │ - b.n a8a62 │ │ + b.n a8a6e │ │ ands r0, r2 │ │ - b.n a848e │ │ - bl 504462 │ │ + b.n a849a │ │ + bl 50446e │ │ movs r0, r0 │ │ - b.n a9012 │ │ + b.n a901e │ │ lsls r0, r5, #1 │ │ asrs r5, r2, #22 │ │ movs r0, r0 │ │ asrs r4, r2, #5 │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ strh r1, [r0, #0] │ │ - b.n a8e8a │ │ + b.n a8e96 │ │ adds r0, #32 │ │ - b.n a8e84 │ │ + b.n a8e90 │ │ str r0, [sp, #4] │ │ - b.n a8e14 │ │ + b.n a8e20 │ │ movs r1, r0 │ │ - b.n a8c36 │ │ + b.n a8c42 │ │ @ instruction: 0xfff31aff │ │ lsls r3, r6, #1 │ │ and.w r0, r0, r0 │ │ - b.n a84c6 │ │ + b.n a84d2 │ │ adds r0, #36 @ 0x24 │ │ - b.n a84b0 │ │ + b.n a84bc │ │ movs r0, r0 │ │ - b.n a903a │ │ + b.n a9046 │ │ str r0, [r3, #0] │ │ - b.n a84b8 │ │ + b.n a84c4 │ │ movs r5, r2 │ │ lsrs r0, r0, #8 │ │ stmia r0!, {r0, r2} │ │ - b.n a8ce6 │ │ + b.n a8cf2 │ │ adds r0, #0 │ │ - b.n a90ea │ │ + b.n a90f6 │ │ movs r0, #0 │ │ - b.n a8cee │ │ + b.n a8cfa │ │ asrs r2, r4, #2 │ │ - b.n a8ab8 │ │ + b.n a8ac4 │ │ str r2, [r4, r2] │ │ - b.n a8cf6 │ │ + b.n a8d02 │ │ asrs r1, r0, #32 │ │ - b.n a8ebc │ │ + b.n a8ec8 │ │ str r1, [r0, #16] │ │ - b.n a88f2 │ │ + b.n a88fe │ │ strb r6, [r0, #0] │ │ - b.n a8a6a │ │ + b.n a8a76 │ │ movs r5, r0 │ │ - ldr r2, [pc, #0] @ (a89c4 ) │ │ + ldr r2, [pc, #0] @ (a89d0 ) │ │ movs r6, r0 │ │ - b.n a8c72 │ │ + b.n a8c7e │ │ movs r1, r7 │ │ lsrs r0, r0, #8 │ │ adds r0, #5 │ │ - b.n a8d92 │ │ + b.n a8d9e │ │ movs r0, #3 │ │ - b.n a8ada │ │ + b.n a8ae6 │ │ adds r0, #1 │ │ - b.n a8d1a │ │ + b.n a8d26 │ │ movs r0, r0 │ │ and.w r0, r0, r5, lsl #8 │ │ - b.n a8d22 │ │ + b.n a8d2e │ │ movs r0, r0 │ │ - b.n a908a │ │ + b.n a9096 │ │ @ instruction: 0xfff01aff │ │ movs r0, r0 │ │ - b.n a909c │ │ + b.n a90a8 │ │ str r4, [r1, r0] │ │ - b.n a8d32 │ │ + b.n a8d3e │ │ asrs r1, r0, #32 │ │ stmia r2!, {r0, r7} │ │ movs r0, r0 │ │ and.w r0, r0, r1, lsl #4 │ │ - b.n a913e │ │ + b.n a914a │ │ movs r0, #1 │ │ - b.n a8f02 │ │ + b.n a8f0e │ │ movs r0, #0 │ │ - b.n a851a │ │ + b.n a8526 │ │ movs r1, r0 │ │ - b.n a8cae │ │ + b.n a8cba │ │ movs r7, r0 │ │ ldr r2, [sp, #0] │ │ movs r0, #10 │ │ - b.n a8d52 │ │ + b.n a8d5e │ │ movs r1, r0 │ │ - b.n a8cb6 │ │ + b.n a8cc2 │ │ adds r1, #0 │ │ - b.n a897e │ │ + b.n a898a │ │ adds r0, #4 │ │ - b.n a8522 │ │ + b.n a852e │ │ movs r0, #1 │ │ - b.n a8ea2 │ │ + b.n a8eae │ │ movs r2, r0 │ │ - b.n a8d66 │ │ + b.n a8d72 │ │ @ instruction: 0xfff88aff │ │ movs r0, #1 │ │ - b.n a8d6e │ │ + b.n a8d7a │ │ movs r4, r6 │ │ - b.n a855c │ │ + b.n a8568 │ │ asrs r4, r0, #32 │ │ - b.n a8d76 │ │ - b.n a8a78 │ │ - b.n a8554 │ │ + b.n a8d82 │ │ + b.n a8a84 │ │ + b.n a8560 │ │ asrs r2, r0 │ │ - b.n a8952 │ │ - add r3, pc, #124 @ (adr r3, a8abc ) │ │ + b.n a895e │ │ + add r3, pc, #128 @ (adr r3, a8acc ) │ │ add.w r0, r0, r1 │ │ - b.n a9126 │ │ + b.n a9132 │ │ movs r7, r7 │ │ lsrs r0, r0, #8 │ │ adds r0, #36 @ 0x24 │ │ - b.n a8588 │ │ + b.n a8594 │ │ strb r0, [r0, #0] │ │ - b.n a8d92 │ │ + b.n a8d9e │ │ movs r0, r0 │ │ - b.n a90f6 │ │ + b.n a9102 │ │ str r0, [r0, r0] │ │ - b.n a919a │ │ + b.n a91a6 │ │ str r1, [r0, #0] │ │ - b.n a919e │ │ + b.n a91aa │ │ lsls r4, r2, #1 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n a85a0 │ │ + b.n a85ac │ │ strb r4, [r1, #0] │ │ - b.n a85a4 │ │ - b.n a8aac │ │ - b.n a85a8 │ │ + b.n a85b0 │ │ + b.n a8ab8 │ │ + b.n a85b4 │ │ movs r0, r0 │ │ - b.n a9112 │ │ + b.n a911e │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ movs r3, r0 │ │ - b.n a8dba │ │ + b.n a8dc6 │ │ asrs r1, r1, #32 │ │ - b.n a8dbe │ │ + b.n a8dca │ │ movs r0, #0 │ │ - b.n a85a2 │ │ + b.n a85ae │ │ movs r4, r0 │ │ - b.n a8d2a │ │ + b.n a8d36 │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ - b.n a8a8e │ │ - b.n a8faa │ │ + b.n a8a9a │ │ + b.n a8fb6 │ │ str r0, [r0, r0] │ │ - b.n a8592 │ │ - bl 504592 │ │ + b.n a859e │ │ + bl 50459e │ │ str r0, [r1, #28] │ │ - b.n a85a8 │ │ + b.n a85b4 │ │ movs r0, r4 │ │ - b.n a8f9e │ │ + b.n a8faa │ │ asrs r1, r0, #32 │ │ - b.n a8f44 │ │ + b.n a8f50 │ │ @ instruction: 0xfff51aff │ │ asrs r4, r3, #32 │ │ - b.n a85e4 │ │ + b.n a85f0 │ │ movs r0, #20 │ │ - b.n a85e8 │ │ + b.n a85f4 │ │ str r0, [r1, r0] │ │ - b.n a85ec │ │ + b.n a85f8 │ │ @ instruction: 0xffafeaff │ │ str r4, [r1, r0] │ │ - b.n a8dfa │ │ + b.n a8e06 │ │ asrs r4, r3, #32 │ │ - b.n a85f8 │ │ + b.n a8604 │ │ adds r0, #36 @ 0x24 │ │ - b.n a85fc │ │ + b.n a8608 │ │ movs r0, #20 │ │ - b.n a8600 │ │ + b.n a860c │ │ @ instruction: 0xffaaeaff │ │ str r0, [r1, r0] │ │ - b.n a8608 │ │ + b.n a8614 │ │ movs r5, r0 │ │ - b.n a8e12 │ │ - ldrh r5, [r7, #38] @ 0x26 │ │ + b.n a8e1e │ │ + ldrh r6, [r7, #38] @ 0x26 │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n a8e1a │ │ + b.n a8e26 │ │ movs r1, r0 │ │ - b.n a8f5e │ │ + b.n a8f6a │ │ movs r2, r0 │ │ - b.n a91c2 │ │ + b.n a91ce │ │ movs r7, r6 │ │ subs r2, #0 │ │ movs r1, r0 │ │ - b.n a91d8 │ │ + b.n a91e4 │ │ movs r7, r6 │ │ lsrs r0, r0, #8 │ │ movs r0, r3 │ │ - b.n a862c │ │ + b.n a8638 │ │ asrs r0, r0, #32 │ │ - b.n a92b6 │ │ + b.n a92c2 │ │ movs r0, r2 │ │ - b.n a8ffa │ │ + b.n a9006 │ │ movs r0, r0 │ │ - b.n a861e │ │ + b.n a862a │ │ asrs r0, r2, #32 │ │ - b.n a861c │ │ + b.n a8628 │ │ movs r4, r0 │ │ - b.n a8da6 │ │ + b.n a8db2 │ │ movs r7, r1 │ │ subs r0, r0, r0 │ │ movs r4, r6 │ │ - b.n a8638 │ │ + b.n a8644 │ │ asrs r4, r0, #32 │ │ - b.n a8e52 │ │ - add r2, pc, #936 @ (adr r2, a8ebc ) │ │ + b.n a8e5e │ │ + add r2, pc, #940 @ (adr r2, a8ecc ) │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n a8e5a │ │ + b.n a8e66 │ │ movs r1, r0 │ │ - b.n a8f9e │ │ + b.n a8faa │ │ movs r2, r0 │ │ - b.n a9202 │ │ + b.n a920e │ │ movs r5, r5 │ │ subs r2, #0 │ │ movs r0, r0 │ │ - b.n a91d8 │ │ + b.n a91e4 │ │ adds r0, #36 @ 0x24 │ │ - b.n a8668 │ │ + b.n a8674 │ │ strb r4, [r1, #0] │ │ - b.n a866c │ │ + b.n a8678 │ │ movs r0, r0 │ │ - b.n a92f6 │ │ - b.n a8b78 │ │ - b.n a8674 │ │ + b.n a9302 │ │ + b.n a8b84 │ │ + b.n a8680 │ │ str r0, [r0, r0] │ │ - b.n a927e │ │ + b.n a928a │ │ movs r0, r2 │ │ - b.n a865c │ │ + b.n a8668 │ │ @ instruction: 0xffd71aff │ │ @ instruction: 0xffcaeaff │ │ asrs r4, r3, #32 │ │ - b.n a8688 │ │ + b.n a8694 │ │ adds r0, #36 @ 0x24 │ │ - b.n a868c │ │ + b.n a8698 │ │ movs r0, #20 │ │ - b.n a8690 │ │ - b.n a8b98 │ │ - b.n a8694 │ │ + b.n a869c │ │ + b.n a8ba4 │ │ + b.n a86a0 │ │ @ instruction: 0xff85eaff │ │ strb r0, [r0, #0] │ │ - b.n a92a2 │ │ - b.n a8ba4 │ │ - b.n a8680 │ │ + b.n a92ae │ │ + b.n a8bb0 │ │ + b.n a868c │ │ ands r4, r0 │ │ - b.n a86a4 │ │ + b.n a86b0 │ │ str r0, [r5, #0] │ │ - b.n a9088 │ │ + b.n a9094 │ │ ldmia r0, {r0, r4, r5, r6, r7} │ │ @ instruction: 0xebff200c │ │ - b.n a86b0 │ │ + b.n a86bc │ │ lsls r0, r4, #5 │ │ - b.n a867e │ │ + b.n a868a │ │ asrs r4, r4, #5 │ │ - b.n a8682 │ │ + b.n a868e │ │ movs r0, r2 │ │ - b.n a86bc │ │ + b.n a86c8 │ │ movs r1, r0 │ │ - b.n a9266 │ │ + b.n a9272 │ │ movs r5, r0 │ │ - bne.n a8aca │ │ - ldrh r5, [r6, #38] @ 0x26 │ │ - blt.n a8b8e │ │ + bne.n a8ad6 │ │ + ldrh r6, [r6, #38] @ 0x26 │ │ + blt.n a8b9a │ │ movs r6, r0 │ │ - b.n a8e46 │ │ + b.n a8e52 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r2, r1 │ │ - b.n a8eda │ │ - it eq │ │ + b.n a8ee6 │ │ + itett eq │ │ addeq.w r0, r0, r0 │ │ - b.n a924a │ │ - movs r0, r4 │ │ - asrs r5, r3, #22 │ │ + bne.n a9256 @ unpredictable branch in IT block │ │ + │ │ + moveq r0, r4 │ │ + asreq r5, r3, #22 │ │ movs r0, r0 │ │ asrs r4, r0, #22 │ │ movs r7, r0 │ │ - b.n a8eee │ │ - beq.n a8be8 │ │ - b.n a9048 │ │ + b.n a8efa │ │ + beq.n a8bf4 │ │ + b.n a9054 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, lr} │ │ - b.n a86f4 │ │ + b.n a8700 │ │ str r0, [r5, #0] │ │ - b.n a90d8 │ │ + b.n a90e4 │ │ str r0, [r1, r0] │ │ - b.n a86fc │ │ + b.n a8708 │ │ @ instruction: 0xffedeaff │ │ movs r0, r0 │ │ - b.n a930a │ │ + b.n a9316 │ │ movs r4, r0 │ │ and.w r0, r0, r0 │ │ - b.n a9392 │ │ + b.n a939e │ │ strb r0, [r0, #0] │ │ - b.n a9396 │ │ + b.n a93a2 │ │ movs r0, r2 │ │ - b.n a86f4 │ │ + b.n a8700 │ │ @ instruction: 0xffe1eaff │ │ movs r0, r0 │ │ - b.n a93a2 │ │ + b.n a93ae │ │ movs r0, r2 │ │ - b.n a8700 │ │ + b.n a870c │ │ str r0, [r5, #0] │ │ - b.n a9104 │ │ + b.n a9110 │ │ ands r4, r0 │ │ - b.n a8728 │ │ + b.n a8734 │ │ @ instruction: 0xffe2eaff │ │ strb r6, [r2, #0] │ │ - b.n a9336 │ │ + b.n a9342 │ │ @ instruction: 0xffebeaff │ │ ldrb r4, [r5, #4] │ │ - b.n a920e │ │ + b.n a921a │ │ movs r0, r0 │ │ and.w r7, r0, r5, ror #30 │ │ - b.n a9216 │ │ + b.n a9222 │ │ ldrb r7, [r7, #31] │ │ - b.n a92a8 │ │ + b.n a92b4 │ │ @ instruction: 0xffe6eaff │ │ strb r0, [r0, #0] │ │ - b.n a9352 │ │ + b.n a935e │ │ movs r0, r0 │ │ - b.n a92be │ │ + b.n a92ca │ │ strb r0, [r0, #0] │ │ asrs r4, r0, #22 │ │ @ instruction: 0xffe2eaff │ │ strb r4, [r1, #0] │ │ - b.n a9362 │ │ + b.n a936e │ │ @ instruction: 0xffe0eaff │ │ strb r1, [r0, #0] │ │ - b.n a936a │ │ + b.n a9376 │ │ @ instruction: 0xffdeeaff │ │ - ldr r3, [pc, #960] @ (a8ff0 ) │ │ + ldr r3, [pc, #960] @ (a8ffc ) │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n a9150 │ │ - beq.n a8c58 │ │ - b.n a90d4 │ │ + b.n a915c │ │ + beq.n a8c64 │ │ + b.n a90e0 │ │ ands r1, r0 │ │ - b.n a8f7e │ │ + b.n a8f8a │ │ str r0, [r0, r0] │ │ - b.n a8f82 │ │ + b.n a8f8e │ │ str r0, [r1, #4] │ │ - b.n a8768 │ │ - ittet mi │ │ + b.n a8774 │ │ + itte mi │ │ addmi.w r8, r0, r1 │ │ - bmi.n a92ee @ unpredictable branch in IT block │ │ + bmi.n a92fa @ unpredictable branch in IT block │ │ │ │ lslpl r1, r4, #1 │ │ - addmi r2, sp, #0 │ │ + add r2, sp, #0 │ │ lsrs r7, r0, #20 │ │ - b.n a9162 │ │ - ittte ls │ │ + b.n a916e │ │ + ittt ls │ │ addls.w r0, r0, r0, lsl #24 │ │ - bls.n a8f9e @ unpredictable branch in IT block │ │ + bls.n a8faa @ unpredictable branch in IT block │ │ │ │ lslls r6, r0, #31 │ │ - bhi.n a9272 │ │ + b.n a927e │ │ lsrs r7, r7, #31 │ │ - b.n a9304 │ │ + b.n a9310 │ │ movs r0, r0 │ │ - b.n a8f16 │ │ + b.n a8f22 │ │ movs r0, r0 │ │ asrs r6, r2, #13 │ │ lsls r4, r4, #1 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n a9102 │ │ + b.n a910e │ │ strb r0, [r0, #0] │ │ - b.n a93ba │ │ + b.n a93c6 │ │ movs r2, r0 │ │ - b.n a935e │ │ + b.n a936a │ │ str r0, [r6, #12] │ │ - b.n a900c │ │ + b.n a9018 │ │ lsls r2, r2, #1 │ │ subs r2, #0 │ │ movs r4, r0 │ │ - b.n a87b2 │ │ + b.n a87be │ │ movs r1, r0 │ │ - b.n a936e │ │ + b.n a937a │ │ lsls r0, r4, #1 │ │ - bge.n a8c92 │ │ + bge.n a8c9e │ │ movs r0, r2 │ │ - b.n a87be │ │ + b.n a87ca │ │ movs r0, r0 │ │ - b.n a933a │ │ + b.n a9346 │ │ lsls r4, r4, #1 │ │ lsrs r0, r0, #8 │ │ lsls r0, r5, #1 │ │ - b.n a87ca │ │ + b.n a87d6 │ │ asrs r4, r3, #2 │ │ - b.n a87ce │ │ + b.n a87da │ │ movs r0, r0 │ │ - b.n a8f4c │ │ + b.n a8f58 │ │ lsls r6, r4, #1 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n a93f2 │ │ + b.n a93fe │ │ movs r0, r0 │ │ - b.n a87c0 │ │ + b.n a87cc │ │ lsls r0, r1, #1 │ │ - b.n a87e2 │ │ + b.n a87ee │ │ adds r0, #0 │ │ - b.n a93fe │ │ + b.n a940a │ │ movs r1, #196 @ 0xc4 │ │ - b.n a87e2 │ │ + b.n a87ee │ │ movs r0, r0 │ │ - b.n a936a │ │ + b.n a9376 │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ lsls r0, r1, #1 │ │ - b.n a87f6 │ │ + b.n a8802 │ │ lsls r3, r0, #10 │ │ - b.n a8dd2 │ │ + b.n a8dde │ │ lsls r0, r2, #8 │ │ - b.n a87f6 │ │ - bl 5047d6 │ │ + b.n a8802 │ │ + bl 5047e2 │ │ movs r0, r0 │ │ - b.n a937e │ │ + b.n a938a │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ adds r0, #1 │ │ - b.n a91ec │ │ + b.n a91f8 │ │ movs r3, r0 │ │ - b.n a8f8e │ │ + b.n a8f9a │ │ @ instruction: 0xfff61aff │ │ adds r0, #2 │ │ - b.n a9032 │ │ + b.n a903e │ │ lsls r0, r4, #1 │ │ - b.n a881e │ │ + b.n a882a │ │ movs r0, r0 │ │ - b.n a8fa0 │ │ + b.n a8fac │ │ movs r0, r2 │ │ subs r2, #0 │ │ movs r4, r0 │ │ - b.n a9042 │ │ + b.n a904e │ │ asrs r1, r0, #32 │ │ - b.n a9446 │ │ + b.n a9452 │ │ movs r0, #0 │ │ - b.n a944a │ │ + b.n a9456 │ │ mrc2 11, 6, lr, cr11, cr15, {7} @ │ │ movs r1, r0 │ │ - b.n a93f2 │ │ + b.n a93fe │ │ movs r0, r0 │ │ - b.n a8820 │ │ + b.n a882c │ │ @ instruction: 0xffe60aff │ │ str r0, [r0, #0] │ │ - b.n a905e │ │ + b.n a906a │ │ movs r4, r0 │ │ - b.n a9062 │ │ - ldrh r7, [r1, #36] @ 0x24 │ │ + b.n a906e │ │ + ldrh r0, [r2, #36] @ 0x24 │ │ add.w r7, r0, r5, ror #2 │ │ - b.n a933a │ │ + b.n a9346 │ │ movs r0, r0 │ │ - b.n a93da │ │ + b.n a93e6 │ │ lsrs r7, r7, #31 │ │ - b.n a93d0 │ │ + b.n a93dc │ │ str r5, [r0, #0] │ │ lsls r0, r0, #10 │ │ str r0, [r0, #0] │ │ - b.n a8844 │ │ - beq.n a8d6c │ │ - b.n a91d4 │ │ + b.n a8850 │ │ + beq.n a8d78 │ │ + b.n a91e0 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r3, r6} │ │ - b.n a886e │ │ + b.n a887a │ │ movs r2, r0 │ │ - b.n a8ff0 │ │ + b.n a8ffc │ │ movs r0, #1 │ │ lsls r2, r0, #10 │ │ strb r3, [r0, #10] │ │ - b.n a8e52 │ │ + b.n a8e5e │ │ movs r0, r0 │ │ - b.n a9496 │ │ + b.n a94a2 │ │ ldr r2, [r0, #64] @ 0x40 │ │ - b.n a9268 │ │ + b.n a9274 │ │ str r4, [r0, #0] │ │ - b.n a8868 │ │ - bl 50485e │ │ + b.n a8874 │ │ + bl 50486a │ │ lsls r0, r2, #8 │ │ - b.n a8874 │ │ + b.n a8880 │ │ str r0, [r0, r0] │ │ - b.n a952a │ │ - bl 50486a │ │ + b.n a9536 │ │ + bl 504876 │ │ strh r4, [r0, r0] │ │ - b.n a8880 │ │ + b.n a888c │ │ adds r0, #72 @ 0x48 │ │ lsls r4, r2, #22 │ │ movs r1, #196 @ 0xc4 │ │ lsls r3, r0, #22 │ │ movs r0, #6 │ │ - b.n a8926 │ │ + b.n a8932 │ │ movs r0, r4 │ │ - b.n a93a6 │ │ + b.n a93b2 │ │ movs r0, r0 │ │ subs r0, r0, r0 │ │ - itett mi │ │ + itet mi │ │ addmi.w r0, r0, r0, lsl #4 │ │ - bpl.n a94ce @ unpredictable branch in IT block │ │ + bpl.n a94da @ unpredictable branch in IT block │ │ │ │ lslmi r0, r7, #3 │ │ - bmi.n a911e │ │ + b.n a912a │ │ lsls r0, r5, #1 │ │ - b.n a88be │ │ - bl 504896 │ │ + b.n a88ca │ │ + bl 5048a2 │ │ movs r0, r2 │ │ - b.n a88aa │ │ + b.n a88b6 │ │ lsls r0, r1, #1 │ │ - b.n a88ca │ │ + b.n a88d6 │ │ lsrs r7, r0, #20 │ │ - b.n a92a6 │ │ - iteet mi │ │ + b.n a92b2 │ │ + itee mi │ │ addmi.w r0, r0, r0 │ │ - bpl.n a944e @ unpredictable branch in IT block │ │ + bpl.n a945a @ unpredictable branch in IT block │ │ │ │ movpl r5, r5 │ │ - submi r0, r0, r0 │ │ + subs r0, r0, r0 │ │ movs r7, r0 │ │ - b.n a895e │ │ + b.n a896a │ │ movs r0, r2 │ │ - b.n a93da │ │ + b.n a93e6 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ lsls r4, r5, #1 │ │ - b.n a88ea │ │ + b.n a88f6 │ │ asrs r6, r0, #32 │ │ - b.n a9106 │ │ - beq.n a8df8 │ │ - b.n a9260 │ │ - ldr r3, [pc, #960] @ (a918c ) │ │ + b.n a9112 │ │ + beq.n a8e04 │ │ + b.n a926c │ │ + ldr r3, [pc, #960] @ (a9198 ) │ │ ldmia.w sp!, {r1, r3, r4, r6} │ │ @ instruction: 0xea00d018 │ │ - b.n a926c │ │ + b.n a9278 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r3, r4, r5, r8, ip} │ │ - b.n a891c │ │ + b.n a8928 │ │ str r6, [r4, #0] │ │ - b.n a9522 │ │ + b.n a952e │ │ adds r1, #52 @ 0x34 │ │ - b.n a8924 │ │ + b.n a8930 │ │ movs r2, #241 @ 0xf1 │ │ - b.n a93ea │ │ + b.n a93f6 │ │ asrs r1, r0, #32 │ │ - b.n a8f0c │ │ + b.n a8f18 │ │ movs r4, r0 │ │ - b.n a890c │ │ + b.n a8918 │ │ adds r0, #3 │ │ - b.n a8f14 │ │ + b.n a8f20 │ │ movs r0, r1 │ │ - b.n a8914 │ │ + b.n a8920 │ │ movs r0, r0 │ │ - b.n a953e │ │ + b.n a954a │ │ str r0, [r0, #0] │ │ - b.n a891c │ │ + b.n a8928 │ │ ldmia r1!, {r3} │ │ @ instruction: 0xebff0004 │ │ - b.n a914a │ │ + b.n a9156 │ │ asrs r6, r0, #32 │ │ - b.n a914e │ │ - ldrh r5, [r1, #36] @ 0x24 │ │ + b.n a915a │ │ + ldrh r6, [r1, #36] @ 0x24 │ │ @ instruction: 0xeb00ff96 │ │ @ instruction: 0xeaff0004 │ │ - b.n a915a │ │ - ldrh r1, [r2, #34] @ 0x22 │ │ + b.n a9166 │ │ + ldrh r2, [r2, #34] @ 0x22 │ │ add.w r7, r0, r5, ror #2 │ │ - b.n a9432 │ │ + b.n a943e │ │ lsrs r7, r7, #31 │ │ - b.n a94c4 │ │ + b.n a94d0 │ │ movs r0, r0 │ │ - b.n a8934 │ │ - beq.n a8e5c │ │ - b.n a92c4 │ │ + b.n a8940 │ │ + beq.n a8e68 │ │ + b.n a92d0 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r2} │ │ - b.n a9176 │ │ - ldrh r2, [r1, #34] @ 0x22 │ │ + b.n a9182 │ │ + ldrh r3, [r1, #34] @ 0x22 │ │ add.w r0, r0, r1 │ │ - b.n a957e │ │ + b.n a958a │ │ movs r0, r0 │ │ - b.n a894c │ │ - beq.n a8e74 │ │ - b.n a92dc │ │ + b.n a8958 │ │ + beq.n a8e80 │ │ + b.n a92e8 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r2} │ │ - b.n a918e │ │ - ldr r7, [sp, #196] @ 0xc4 │ │ + b.n a919a │ │ + ldr r7, [sp, #200] @ 0xc8 │ │ add.w r0, r0, r0 │ │ - b.n a94f6 │ │ + b.n a9502 │ │ movs r0, r0 │ │ - b.n a8964 │ │ + b.n a8970 │ │ movs r2, r5 │ │ subs r0, r0, r0 │ │ lsls r0, r5, #1 │ │ - b.n a898a │ │ + b.n a8996 │ │ lsls r4, r3, #2 │ │ - b.n a896e │ │ + b.n a897a │ │ @ instruction: 0xff90eaff │ │ strh r0, [r0, #0] │ │ - b.n a91ae │ │ - itttt ne │ │ - addne.w r0, r0, r8, asr #29 │ │ - bne.n a899e @ unpredictable branch in IT block │ │ - │ │ - strne r0, [sp, #0] │ │ - bne.n a91ba │ │ - b.n a8e8c │ │ - b.n a91be │ │ + b.n a91ba │ │ + wfe │ │ + add.w r0, r0, r8, asr #29 │ │ + b.n a89aa │ │ + str r0, [sp, #0] │ │ + b.n a91c6 │ │ + b.n a8e98 │ │ + b.n a91ca │ │ movs r7, r0 │ │ - b.n a9122 │ │ + b.n a912e │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ lsls r4, r2, #2 │ │ - b.n a89c8 │ │ + b.n a89d4 │ │ movs r0, r0 │ │ - b.n a8fac │ │ + b.n a8fb8 │ │ lsls r2, r3, #1 │ │ - b.n a8a32 │ │ + b.n a8a3e │ │ movs r3, r0 │ │ - b.n a9536 │ │ + b.n a9542 │ │ movs r5, r2 │ │ subs r2, #0 │ │ asrs r4, r0, #2 │ │ - b.n a89dc │ │ + b.n a89e8 │ │ adds r0, #132 @ 0x84 │ │ - b.n a89e0 │ │ + b.n a89ec │ │ stmia r0!, {r2, r7} │ │ - b.n a89e4 │ │ + b.n a89f0 │ │ asrs r1, r0, #32 │ │ - b.n a8fc8 │ │ + b.n a8fd4 │ │ movs r0, r6 │ │ - b.n a89d6 │ │ + b.n a89e2 │ │ adds r0, #3 │ │ - b.n a8fd0 │ │ + b.n a8fdc │ │ movs r0, #72 @ 0x48 │ │ - b.n a89de │ │ + b.n a89ea │ │ stmia r0!, {r2, r3} │ │ - b.n a8fd8 │ │ + b.n a8fe4 │ │ str r0, [r6, r1] │ │ - b.n a89fc │ │ + b.n a8a08 │ │ movs r0, r0 │ │ - b.n a9166 │ │ + b.n a9172 │ │ movs r0, #8 │ │ - b.n a89e0 │ │ + b.n a89ec │ │ str r5, [r0, r0] │ │ - b.n a8fe8 │ │ + b.n a8ff4 │ │ cmp r7, #205 @ 0xcd │ │ - b.n a960e │ │ + b.n a961a │ │ str r4, [r1, r0] │ │ lsls r0, r4, #6 │ │ movs r7, r0 │ │ - b.n a8f88 │ │ + b.n a8f94 │ │ movs r3, r0 │ │ asrs r0, r0, #12 │ │ movs r0, r6 │ │ stmia.w sp, {r2, r3, sp, lr, pc} │ │ - b.n a89fc │ │ + b.n a8a08 │ │ ldmia r0!, {r4, r6, r7} │ │ @ instruction: 0xebffe008 │ │ - b.n a922a │ │ + b.n a9236 │ │ movs r7, r0 │ │ - b.n a91a0 │ │ + b.n a91ac │ │ @ instruction: 0xffaf1aff │ │ movs r4, r7 │ │ - b.n a8a34 │ │ + b.n a8a40 │ │ movs r0, #14 │ │ - b.n a923a │ │ + b.n a9246 │ │ asrs r0, r7, #32 │ │ - b.n a8a3c │ │ + b.n a8a48 │ │ movs r0, r0 │ │ - b.n a9020 │ │ + b.n a902c │ │ asrs r1, r0, #32 │ │ - b.n a9024 │ │ + b.n a9030 │ │ ldmia r7!, {r0, r1, r2, r4, r6} │ │ @ instruction: 0xebff0004 │ │ - b.n a924e │ │ - beq.n a8f40 │ │ - b.n a93a8 │ │ - ldr r3, [pc, #960] @ (a92d4 ) │ │ - ldmia.w sp!, {r1, r4, sl, fp, pc} │ │ - and.w r7, r0, r7, asr #20 │ │ - vtbx.8 d17, {d22-d24}, d31 │ │ - vtbx.8 d21, {d22-d23}, d0 │ │ - movs r3, r0 │ │ - lsrs r4, r5, #26 │ │ - vrint?.f16 , │ │ - vcvt.f16.u16 d17, d0, #10 │ │ - vshr.u64 , q6, #10 │ │ - vtbx.8 d18, {d22-d23}, d13 │ │ - @ instruction: 0xfff63ff2 │ │ + b.n a925a │ │ + beq.n a8f4c │ │ + b.n a93b4 │ │ + ldr r3, [pc, #960] @ (a92e0 ) │ │ + ldmia.w sp!, {r0, r1, r4, sl, fp, pc} │ │ + and.w r8, r0, r5, ror #23 │ │ + @ instruction: 0xfff61a5b │ │ + @ instruction: 0xfff659d4 │ │ + movs r3, r0 │ │ + lsrs r5, r6, #29 │ │ + vqshrn.u64 d21, , #10 │ │ + @ instruction: 0xfff61b7c │ │ + vtrn.16 d19, d18 │ │ + @ instruction: 0xfff629b1 │ │ + vmla.i q10, q3, d25[0] │ │ @ instruction: 0xfff64ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n a9460 │ │ - beq.n a8f60 │ │ - b.n a93e4 │ │ + b.n a946c │ │ + beq.n a8f6c │ │ + b.n a93f0 │ │ strb r0, [r1, #7] │ │ - b.n a8a8c │ │ + b.n a8a98 │ │ str r1, [r0, #0] │ │ - b.n a9292 │ │ - add r0, pc, #0 @ (adr r0, a8f54 ) │ │ - b.n a9296 │ │ + b.n a929e │ │ + add r0, pc, #0 @ (adr r0, a8f60 ) │ │ + b.n a92a2 │ │ strb r7, [r0, #0] │ │ - b.n a9078 │ │ - bkpt 0x00d4 │ │ + b.n a9084 │ │ + bkpt 0x00d5 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n a92a2 │ │ + b.n a92ae │ │ movs r7, r0 │ │ - b.n a92a6 │ │ - cbz r0, a8f96 │ │ + b.n a92b2 │ │ + cbz r1, a8fa2 │ │ add.w r0, r0, r6, lsl #4 │ │ - b.n a92ae │ │ + b.n a92ba │ │ movs r0, r0 │ │ - b.n a961e │ │ + b.n a962a │ │ movs r2, r3 │ │ lsrs r0, r0, #8 │ │ cmp r2, #23 │ │ - b.n a958c │ │ + b.n a9598 │ │ strb r7, [r2, #18] │ │ - b.n a958a │ │ + b.n a9596 │ │ cmp r1, #98 @ 0x62 │ │ - b.n a960c │ │ + b.n a9618 │ │ ldrb r1, [r3, #13] │ │ - b.n a9620 │ │ + b.n a962c │ │ movs r2, #149 @ 0x95 │ │ - b.n a9090 │ │ - ldr r6, [pc, #768] @ (a928c ) │ │ - b.n a95aa │ │ + b.n a909c │ │ + ldr r6, [pc, #768] @ (a9298 ) │ │ + b.n a95b6 │ │ lsrs r0, r6 │ │ - b.n a9612 │ │ + b.n a961e │ │ strh r0, [r2, #6] │ │ - b.n a9316 │ │ + b.n a9322 │ │ strb r0, [r2, #30] │ │ - b.n a90a6 │ │ + b.n a90b2 │ │ adds r4, #149 @ 0x95 │ │ - b.n a8fe8 │ │ + b.n a8ff4 │ │ subs r4, #111 @ 0x6f │ │ - b.n a95b0 │ │ + b.n a95bc │ │ adds r0, #224 @ 0xe0 │ │ - b.n a9626 │ │ + b.n a9632 │ │ str r0, [r2, #56] @ 0x38 │ │ - b.n a8ff6 │ │ + b.n a9002 │ │ adds r0, #7 │ │ - b.n a8ff2 │ │ + b.n a8ffe │ │ movs r0, #6 │ │ - b.n a8ffc │ │ + b.n a9008 │ │ movs r4, #2 │ │ - b.n a92f6 │ │ + b.n a9302 │ │ ldrb r3, [r4, #16] │ │ - b.n a92be │ │ + b.n a92ca │ │ movs r0, #13 │ │ - b.n a96fe │ │ + b.n a970a │ │ str r7, [r0, r0] │ │ - b.n a9014 │ │ + b.n a9020 │ │ movs r4, #3 │ │ - b.n a92ca │ │ + b.n a92d6 │ │ str r2, [r0, #0] │ │ - b.n a901a │ │ + b.n a9026 │ │ str r5, [r0, #0] │ │ - b.n a92fa │ │ + b.n a9306 │ │ str r0, [r0, #12] │ │ asrs r0, r4, #14 │ │ str r3, [r0, #64] @ 0x40 │ │ asrs r6, r0, #6 │ │ adds r0, #6 │ │ asrs r0, r5, #32 │ │ adds r0, #5 │ │ asrs r3, r2, #6 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ movs r2, r1 │ │ - b.n a9326 │ │ - bkpt 0x0015 │ │ + b.n a9332 │ │ + bkpt 0x0016 │ │ add.w r0, r0, r0 │ │ - b.n a968e │ │ - beq.n a9028 │ │ + b.n a969a │ │ + beq.n a9034 │ │ lsls r3, r1, #9 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ lsrs r5, r7, #2 │ │ lsls r0, r1, #5 │ │ - b.n a8b38 │ │ + b.n a8b44 │ │ movs r0, #253 @ 0xfd │ │ - b.n a973e │ │ + b.n a974a │ │ asrs r4, r0, #5 │ │ - b.n a8b40 │ │ + b.n a8b4c │ │ movs r0, r0 │ │ - b.n a9124 │ │ + b.n a9130 │ │ asrs r1, r0, #32 │ │ - b.n a9128 │ │ + b.n a9134 │ │ stmia r7!, {r1, r3, r4, r5, r6} │ │ @ instruction: 0xebff0084 │ │ stmia.w r0, {r2, r8, sp} │ │ - b.n a8b54 │ │ + b.n a8b60 │ │ movs r0, #2 │ │ - b.n a8f58 │ │ + b.n a8f64 │ │ movs r0, r0 │ │ - b.n a96c2 │ │ + b.n a96ce │ │ movs r5, r1 │ │ lsrs r0, r0, #8 │ │ adds r0, #248 @ 0xf8 │ │ - b.n a8b64 │ │ + b.n a8b70 │ │ str r0, [r0, r0] │ │ - b.n a936a │ │ + b.n a9376 │ │ movs r0, #244 @ 0xf4 │ │ - b.n a8b6c │ │ + b.n a8b78 │ │ strh r1, [r0, #0] │ │ - b.n a9372 │ │ + b.n a937e │ │ adds r0, #3 │ │ - b.n a9154 │ │ + b.n a9160 │ │ asrs r5, r0, #32 │ │ - b.n a937a │ │ + b.n a9386 │ │ movs r0, #2 │ │ - b.n a8f7c │ │ + b.n a8f88 │ │ movs r3, r0 │ │ - b.n a9382 │ │ - bkpt 0x00e6 │ │ + b.n a938e │ │ + bkpt 0x00e7 │ │ add.w r0, r0, r0, lsl #8 │ │ - b.n a938a │ │ + b.n a9396 │ │ asrs r0, r1, #32 │ │ - b.n a938e │ │ + b.n a939a │ │ movs r5, r0 │ │ - b.n a9392 │ │ + b.n a939e │ │ movs r0, r0 │ │ - b.n a96fa │ │ + b.n a9706 │ │ @ instruction: 0xffe10aff │ │ str r0, [sp, #800] @ 0x320 │ │ - b.n a8b9c │ │ + b.n a8ba8 │ │ strh r1, [r0, #0] │ │ - b.n a93a2 │ │ + b.n a93ae │ │ asrs r0, r0, #32 │ │ - b.n a93a6 │ │ + b.n a93b2 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n a9188 │ │ + b.n a9194 │ │ str r1, [r0, r0] │ │ - b.n a93ae │ │ + b.n a93ba │ │ movs r0, #48 @ 0x30 │ │ - b.n a8ba4 │ │ + b.n a8bb0 │ │ movs r2, r0 │ │ - b.n a93b6 │ │ - pop {r0, r4, r5, r6, r7, pc} │ │ + b.n a93c2 │ │ + pop {r1, r4, r5, r6, r7, pc} │ │ add.w r0, r0, r0 │ │ - b.n a971e │ │ + b.n a972a │ │ movs r1, r3 │ │ subs r0, r0, r0 │ │ movs r4, r6 │ │ - b.n a9598 │ │ + b.n a95a4 │ │ str r0, [r6, #12] │ │ - b.n a9414 │ │ - bl 504b8a │ │ + b.n a9420 │ │ + bl 504b96 │ │ ldrb r7, [r3, #30] │ │ - b.n a93b2 │ │ + b.n a93be │ │ asrs r1, r0, #32 │ │ - b.n a95a4 │ │ + b.n a95b0 │ │ cmp r7, #145 @ 0x91 │ │ - b.n a939a │ │ + b.n a93a6 │ │ movs r0, r0 │ │ - b.n a9742 │ │ + b.n a974e │ │ @ instruction: 0xfffa1aff │ │ lsls r6, r0, #4 │ │ - b.n a9794 │ │ - bl 504ba6 │ │ + b.n a97a0 │ │ + bl 504bb2 │ │ movs r4, r2 │ │ cmp r2, #0 │ │ lsls r2, r3, #1 │ │ - b.n a8c64 │ │ + b.n a8c70 │ │ asrs r0, r1, #32 │ │ - b.n a93f6 │ │ + b.n a9402 │ │ movs r3, r0 │ │ - b.n a975a │ │ + b.n a9766 │ │ @ instruction: 0xffc83aff │ │ asrs r0, r5, #1 │ │ - b.n a8c00 │ │ + b.n a8c0c │ │ movs r3, r0 │ │ - b.n a9806 │ │ + b.n a9812 │ │ str r0, [r6, #0] │ │ - b.n a8bfc │ │ + b.n a8c08 │ │ movs r0, #249 @ 0xf9 │ │ - b.n a980e │ │ + b.n a981a │ │ adds r0, #92 @ 0x5c │ │ - b.n a8c10 │ │ + b.n a8c1c │ │ asrs r1, r0, #32 │ │ - b.n a91f4 │ │ + b.n a9200 │ │ str r0, [r6, #12] │ │ - b.n a9474 │ │ + b.n a9480 │ │ adds r0, #3 │ │ - b.n a91fc │ │ + b.n a9208 │ │ ldmia r0, {r0, r4, r6} │ │ @ instruction: 0xebff1008 │ │ - b.n a9426 │ │ + b.n a9432 │ │ @ instruction: 0xffbdeaff │ │ lsls r4, r0, #1 │ │ - b.n a8c2c │ │ + b.n a8c38 │ │ movs r0, #245 @ 0xf5 │ │ - b.n a9832 │ │ + b.n a983e │ │ asrs r0, r0, #1 │ │ - b.n a8c34 │ │ + b.n a8c40 │ │ movs r0, r0 │ │ - b.n a9218 │ │ + b.n a9224 │ │ asrs r1, r0, #32 │ │ - b.n a921c │ │ + b.n a9228 │ │ stmia r7!, {r0, r2, r3, r4, r5} │ │ @ instruction: 0xebff0034 │ │ - b.n a8c44 │ │ + b.n a8c50 │ │ movs r0, #248 @ 0xf8 │ │ - b.n a984a │ │ + b.n a9856 │ │ asrs r0, r6, #32 │ │ - b.n a8c4c │ │ + b.n a8c58 │ │ movs r0, r0 │ │ - b.n a9230 │ │ + b.n a923c │ │ asrs r1, r0, #32 │ │ - b.n a9234 │ │ + b.n a9240 │ │ stmia r7!, {r0, r1, r2, r4, r5} │ │ - @ instruction: 0xebff4fb0 │ │ + @ instruction: 0xebff4fb4 │ │ movs r3, r0 │ │ - adds r6, #92 @ 0x5c │ │ + adds r6, #96 @ 0x60 │ │ movs r3, r0 │ │ - ldrb r4, [r5, #27] │ │ + ldrb r0, [r6, #27] │ │ movs r2, r0 │ │ - adds r6, #60 @ 0x3c │ │ + adds r6, #64 @ 0x40 │ │ movs r3, r0 │ │ - ldrsb r4, [r4, r7] │ │ + ldrsb r0, [r7, r7] │ │ movs r3, r0 │ │ - lsls r0, r0, #2 │ │ - vqmovn.s32 d21, q1 │ │ - vqrdmlah.s , q3, d1[0] │ │ - vshr.u32 q8, q4, #10 │ │ - vtbl.8 d22, {d6}, d17 │ │ - vmla.i q8, q3, d0[0] │ │ - vtbl.8 d16, {d6-d9}, d16 │ │ - vuzp.16 q8, q6 │ │ + @ instruction: 0xff9efff5 │ │ + strh r3, [r1, r4] │ │ + vcvt.u16.f16 , q10, #10 │ │ + vcvt.u32.f32 , q11, #10 │ │ + vtbl.8 d22, {d21}, d27 │ │ + vcvt.u32.f32 , q7, #10 │ │ + @ instruction: 0xfff50bf7 │ │ + vmla.i q8, q3, d26[0] │ │ vcvt.f16.u16 q10, q8, #10 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n a9670 │ │ - beq.n a9178 │ │ - b.n a95f4 │ │ + b.n a967c │ │ + beq.n a9184 │ │ + b.n a9600 │ │ ands r0, r0 │ │ - b.n a991e │ │ + b.n a992a │ │ lsls r1, r0, #20 │ │ - b.n a9802 │ │ + b.n a980e │ │ movs r2, r0 │ │ ldrh r0, [r0, #16] │ │ movs r4, r0 │ │ - b.n a94aa │ │ - beq.n a918c │ │ - b.n a9604 │ │ + b.n a94b6 │ │ + beq.n a9198 │ │ + b.n a9610 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r0, ip, lr} │ │ - b.n a94b6 │ │ + b.n a94c2 │ │ str r0, [r0, #0] │ │ - b.n a94ba │ │ + b.n a94c6 │ │ movs r4, r1 │ │ - b.n a9698 │ │ + b.n a96a4 │ │ asrs r0, r1, #32 │ │ - b.n a969c │ │ + b.n a96a8 │ │ movs r0, #0 │ │ - b.n a98c6 │ │ + b.n a98d2 │ │ movs r0, r6 │ │ add.w r0, r0, r0 │ │ - b.n a982e │ │ + b.n a983a │ │ movs r1, r4 │ │ subs r0, r0, r0 │ │ asrs r4, r1, #32 │ │ - b.n a8cd0 │ │ + b.n a8cdc │ │ movs r1, r0 │ │ - b.n a9884 │ │ + b.n a9890 │ │ movs r1, r0 │ │ - b.n a92aa │ │ + b.n a92b6 │ │ cmp r7, #49 @ 0x31 │ │ - b.n a8fa0 │ │ + b.n a8fac │ │ movs r1, r0 │ │ - b.n a9626 │ │ + b.n a9632 │ │ cmp r7, #18 │ │ - b.n a9488 │ │ + b.n a9494 │ │ lsls r0, r6, #8 │ │ - b.n a94ee │ │ + b.n a94fa │ │ movs r3, r0 │ │ - bge.n a91b2 │ │ + bge.n a91be │ │ asrs r1, r0, #32 │ │ - b.n a92c0 │ │ + b.n a92cc │ │ asrs r1, r0, #32 │ │ - b.n a963c │ │ + b.n a9648 │ │ asrs r1, r2, #9 │ │ - b.n a94fe │ │ + b.n a950a │ │ movs r3, r0 │ │ and.w r0, r0, r5, lsl #12 │ │ - b.n a9586 │ │ + b.n a9592 │ │ asrs r3, r0, #32 │ │ - b.n a92cc │ │ + b.n a92d8 │ │ adds r0, #0 │ │ - b.n a990e │ │ + b.n a991a │ │ asrs r1, r2, #9 │ │ - b.n a9258 │ │ + b.n a9264 │ │ movs r0, #8 │ │ - b.n a8d10 │ │ + b.n a8d1c │ │ ands r0, r0 │ │ - b.n a991a │ │ + b.n a9926 │ │ movs r2, r0 │ │ - b.n a947e │ │ + b.n a948a │ │ str r0, [r0, r0] │ │ sub sp, #4 │ │ movs r2, r0 │ │ - cbz r5, a91fa │ │ + cbz r5, a9206 │ │ @ instruction: 0xffdeaaff │ │ movs r0, #4 │ │ - b.n a9708 │ │ + b.n a9714 │ │ movs r0, r0 │ │ - b.n a9932 │ │ + b.n a993e │ │ asrs r0, r0, #32 │ │ - b.n a9936 │ │ + b.n a9942 │ │ str r0, [r0, #0] │ │ - b.n a993a │ │ + b.n a9946 │ │ movs r3, r2 │ │ add.w r0, r0, r0 │ │ - b.n a98a2 │ │ + b.n a98ae │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n a8d44 │ │ + b.n a8d50 │ │ movs r0, r0 │ │ - b.n a94b8 │ │ + b.n a94c4 │ │ str r0, [r0, #0] │ │ - cbz r0, a928a │ │ + cbz r0, a9296 │ │ ands r6, r0 │ │ - b.n a9556 │ │ + b.n a9562 │ │ @ instruction: 0xffd2eaff │ │ asrs r4, r4, #32 │ │ - b.n a8d5c │ │ + b.n a8d68 │ │ movs r0, #13 │ │ - b.n a9962 │ │ + b.n a996e │ │ ands r0, r0 │ │ - b.n a9566 │ │ + b.n a9572 │ │ asrs r1, r0, #32 │ │ - b.n a9348 │ │ - movs r4, #32 │ │ + b.n a9354 │ │ + movs r4, #33 @ 0x21 │ │ @ instruction: 0xeb00ffcc │ │ @ instruction: 0xeaff1010 │ │ - b.n a8d74 │ │ + b.n a8d80 │ │ movs r0, #25 │ │ - b.n a997a │ │ + b.n a9986 │ │ ands r0, r0 │ │ - b.n a957e │ │ + b.n a958a │ │ asrs r1, r0, #32 │ │ - b.n a9360 │ │ + b.n a936c │ │ @ instruction: 0xfff8eaff │ │ - ldr r1, [pc, #352] @ (a93a8 ) │ │ - vtbx.8 d20, {d6-d7}, d0 │ │ + ldr r2, [pc, #256] @ (a9354 ) │ │ + vtbl.8 d20, {d6-d8}, d24 │ │ vqshrun.s64 d20, q8, #10 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n a9770 │ │ + b.n a977c │ │ ands r2, r0 │ │ - b.n a959a │ │ + b.n a95a6 │ │ str r1, [r0, r0] │ │ - b.n a959e │ │ + b.n a95aa │ │ movs r0, r0 │ │ - b.n a9902 │ │ + b.n a990e │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n a9914 │ │ + b.n a9920 │ │ movs r0, r0 │ │ lsls r4, r2, #13 │ │ lsls r5, r1, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n a9920 │ │ + b.n a992c │ │ asrs r0, r0, #32 │ │ asrs r0, r4, #15 │ │ asrs r0, r0, #32 │ │ asrs r5, r0, #22 │ │ movs r0, r0 │ │ - b.n a992a │ │ + b.n a9936 │ │ asrs r0, r0, #32 │ │ asrs r0, r4, #15 │ │ asrs r0, r0, #32 │ │ asrs r4, r0, #22 │ │ movs r0, r0 │ │ - b.n a992e │ │ + b.n a993a │ │ asrs r4, r5, #5 │ │ - b.n a8dd0 │ │ + b.n a8ddc │ │ asrs r1, r0, #32 │ │ - b.n a93b4 │ │ + b.n a93c0 │ │ asrs r0, r2, #1 │ │ - b.n a8dbc │ │ + b.n a8dc8 │ │ asrs r0, r0, #32 │ │ asrs r0, r0, #22 │ │ lsrs r1, r0, #16 │ │ - b.n a9944 │ │ + b.n a9950 │ │ lsls r6, r1, #1 │ │ rev r0, r0 │ │ lsls r5, r2, #21 │ │ - b.n a98b4 │ │ + b.n a98c0 │ │ lsls r5, r2, #21 │ │ - b.n a9938 │ │ + b.n a9944 │ │ lsls r1, r4, #2 │ │ - b.n a92b2 │ │ + b.n a92be │ │ movs r0, r0 │ │ - b.n a9338 │ │ + b.n a9344 │ │ asrs r3, r6, #12 │ │ - b.n a98c0 │ │ + b.n a98cc │ │ asrs r3, r6, #12 │ │ - b.n a9944 │ │ + b.n a9950 │ │ movs r0, #1 │ │ - b.n a92c2 │ │ + b.n a92ce │ │ lsls r0, r4, #4 │ │ - b.n a92c8 │ │ + b.n a92d4 │ │ subs r7, r1, #4 │ │ - b.n a98ca │ │ + b.n a98d6 │ │ movs r0, r0 │ │ - b.n a93d2 │ │ + b.n a93de │ │ subs r7, r1, #4 │ │ - b.n a9952 │ │ + b.n a995e │ │ lsls r0, r4, #8 │ │ - b.n a93d6 │ │ + b.n a93e2 │ │ movs r1, r0 │ │ - b.n a92da │ │ + b.n a92e6 │ │ asrs r1, r0, #4 │ │ - b.n a98de │ │ + b.n a98ea │ │ asrs r1, r0, #4 │ │ - b.n a9962 │ │ + b.n a996e │ │ lsls r0, r2, #6 │ │ - b.n a92e6 │ │ + b.n a92f2 │ │ lsrs r0, r4, #16 │ │ - b.n a962a │ │ + b.n a9636 │ │ movs r2, r0 │ │ - b.n a998e │ │ + b.n a999a │ │ movs r3, r7 │ │ cmp r2, #0 │ │ movs r0, r0 │ │ - b.n a99a0 │ │ + b.n a99ac │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ lsls r2, r4, #1 │ │ - b.n a9a3e │ │ - pop {r0, r1, r5, r6, pc} │ │ + b.n a9a4a │ │ + pop {r2, r5, r6, pc} │ │ add.w r0, r0, r1 │ │ - b.n a99e6 │ │ + b.n a99f2 │ │ movs r2, r2 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n a99ae │ │ + b.n a99ba │ │ movs r0, r0 │ │ - b.n a8e1c │ │ + b.n a8e28 │ │ movs r2, r5 │ │ - bge.n a9316 │ │ + bge.n a9322 │ │ str r0, [r0, r0] │ │ - b.n a9a5a │ │ + b.n a9a66 │ │ movs r0, r0 │ │ - b.n a99c6 │ │ + b.n a99d2 │ │ movs r5, r5 │ │ lsrs r0, r0, #8 │ │ lsls r3, r4, #1 │ │ - b.n a9a66 │ │ - pop {r0, r3, r4, r6, pc} │ │ + b.n a9a72 │ │ + pop {r1, r3, r4, r6, pc} │ │ add.w r0, r0, r1 │ │ - b.n a9a0e │ │ + b.n a9a1a │ │ movs r2, r2 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n a99d6 │ │ + b.n a99e2 │ │ movs r0, r0 │ │ - b.n a8e42 │ │ + b.n a8e4e │ │ movs r6, r4 │ │ ldmia r2!, {} │ │ asrs r0, r2, #3 │ │ - b.n a8e80 │ │ + b.n a8e8c │ │ str r7, [r3, r1] │ │ - b.n a9a86 │ │ + b.n a9a92 │ │ lsls r7, r3, #1 │ │ - b.n a9a8a │ │ + b.n a9a96 │ │ cmp r5, #35 @ 0x23 │ │ - b.n a994e │ │ + b.n a995a │ │ asrs r1, r0, #32 │ │ - b.n a9470 │ │ + b.n a947c │ │ movs r7, r3 │ │ - @ instruction: 0xea00bd3d │ │ + @ instruction: 0xea00bd3e │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n a8e7e │ │ + b.n a8e8a │ │ str r0, [r0, r0] │ │ - b.n a9aa2 │ │ + b.n a9aae │ │ movs r0, r0 │ │ - b.n a9a0e │ │ + b.n a9a1a │ │ movs r3, r3 │ │ lsrs r0, r0, #8 │ │ asrs r0, r3, #2 │ │ - b.n a8eac │ │ + b.n a8eb8 │ │ movs r4, r0 │ │ - b.n a96b2 │ │ + b.n a96be │ │ cmp r4, #213 @ 0xd5 │ │ - b.n a9976 │ │ + b.n a9982 │ │ asrs r1, r0, #32 │ │ - b.n a9498 │ │ + b.n a94a4 │ │ movs r7, r0 │ │ - @ instruction: 0xea00bd33 │ │ + @ instruction: 0xea00bd34 │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n a8ea6 │ │ + b.n a8eb2 │ │ movs r0, r0 │ │ - b.n a9a32 │ │ + b.n a9a3e │ │ movs r2, r2 │ │ lsrs r0, r0, #8 │ │ asrs r4, r7, #1 │ │ - b.n a8ed0 │ │ + b.n a8edc │ │ movs r4, r0 │ │ - b.n a96d6 │ │ + b.n a96e2 │ │ cmp r4, #13 │ │ - b.n a9ada │ │ + b.n a9ae6 │ │ asrs r1, r0, #32 │ │ - b.n a94bc │ │ - movs r3, #195 @ 0xc3 │ │ + b.n a94c8 │ │ + movs r3, #196 @ 0xc4 │ │ add.w r0, r0, r4, lsl #20 │ │ - b.n a96e6 │ │ + b.n a96f2 │ │ movs r3, r1 │ │ and.w r0, r0, ip, lsl #5 │ │ - b.n a8eec │ │ + b.n a8ef8 │ │ str r6, [r2, r0] │ │ - b.n a9af2 │ │ + b.n a9afe │ │ movs r6, r2 │ │ - b.n a9af6 │ │ + b.n a9b02 │ │ cmp r4, #183 @ 0xb7 │ │ - b.n a99ba │ │ + b.n a99c6 │ │ asrs r1, r0, #32 │ │ - b.n a94dc │ │ + b.n a94e8 │ │ movs r4, r0 │ │ and.w r0, r0, r4, lsl #5 │ │ - b.n a8f04 │ │ + b.n a8f10 │ │ str r7, [r3, r1] │ │ - b.n a9b0a │ │ + b.n a9b16 │ │ lsls r7, r3, #1 │ │ - b.n a9b0e │ │ + b.n a9b1a │ │ cmp r4, #247 @ 0xf7 │ │ - b.n a99d2 │ │ + b.n a99de │ │ asrs r1, r0, #32 │ │ - b.n a94f4 │ │ - movs r3, #181 @ 0xb5 │ │ + b.n a9500 │ │ + movs r3, #182 @ 0xb6 │ │ add.w r0, r0, r5 │ │ - b.n a971e │ │ + b.n a972a │ │ ldrh r0, [r6, #0] │ │ ldmia.w sp!, {r2, r3, r4, ip} │ │ - b.n a8f24 │ │ + b.n a8f30 │ │ ldrsb r0, [r0, r7] │ │ - b.n a99fa │ │ + b.n a9a06 │ │ ldrsh r7, [r7, r7] │ │ - b.n a9a8c │ │ + b.n a9a98 │ │ cmp r4, #193 @ 0xc1 │ │ - b.n a99f2 │ │ + b.n a99fe │ │ asrs r1, r0, #32 │ │ - b.n a9514 │ │ + b.n a9520 │ │ movs r5, r0 │ │ - b.n a973a │ │ + b.n a9746 │ │ @ instruction: 0xfff5eaff │ │ - negs r6, r5 │ │ - vsli.64 d21, d24, #54 @ 0x36 │ │ + orrs r7, r7 │ │ + vrintz.f16 , q6 │ │ movs r3, r0 │ │ - tst r6, r6 │ │ - vrshr.u64 d20, d18, #10 │ │ - vrshr.u32 q10, q3, #10 │ │ - vqmovn.s32 d20, q7 │ │ - vrshr.u64 q10, q5, #10 │ │ + orrs r7, r0 │ │ + vsubw.u q10, q11, d3 │ │ + vshll.i16 q10, d23, #16 │ │ + vrsra.u32 q10, , #10 │ │ + vsubw.u q10, q11, d27 │ │ @ instruction: 0xfff64bf0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n a993c │ │ - beq.n a9434 │ │ - b.n a98c0 │ │ + b.n a9948 │ │ + beq.n a9440 │ │ + b.n a98cc │ │ str r0, [sp, #4] │ │ - b.n a976a │ │ + b.n a9776 │ │ asrs r4, r1, #32 │ │ - b.n a8f4e │ │ + b.n a8f5a │ │ str r2, [r0, r0] │ │ - b.n a9772 │ │ + b.n a977e │ │ ands r0, r0 │ │ - b.n a9776 │ │ + b.n a9782 │ │ lsls r2, r6, #30 │ │ - b.n a9a4a │ │ + b.n a9a56 │ │ movs r0, #4 │ │ - b.n a8fe0 │ │ + b.n a8fec │ │ lsrs r7, r7, #31 │ │ - b.n a9ae0 │ │ + b.n a9aec │ │ movs r3, r6 │ │ - b.n a9a6a │ │ + b.n a9a76 │ │ lsls r6, r7, #1 │ │ subs r0, r0, r0 │ │ strb r0, [r1, #0] │ │ - b.n a8f76 │ │ + b.n a8f82 │ │ movs r0, #76 @ 0x4c │ │ - b.n a8f74 │ │ + b.n a8f80 │ │ movs r0, #2 │ │ - b.n a9104 │ │ + b.n a9110 │ │ movs r2, r0 │ │ - b.n a9a7e │ │ + b.n a9a8a │ │ lsls r3, r7, #1 │ │ subs r0, r0, r0 │ │ movs r0, #16 │ │ - b.n a8f8a │ │ + b.n a8f96 │ │ asrs r0, r1, #32 │ │ - b.n a8f8a │ │ + b.n a8f96 │ │ movs r1, r0 │ │ - b.n a9b4c │ │ + b.n a9b58 │ │ lsls r0, r6, #1 │ │ lsrs r0, r0, #8 │ │ lsls r5, r2, #3 │ │ - b.n a981a │ │ + b.n a9826 │ │ movs r0, r0 │ │ - b.n a9b16 │ │ + b.n a9b22 │ │ movs r3, r0 │ │ - ldr r2, [pc, #0] @ (a9478 ) │ │ + ldr r2, [pc, #0] @ (a9484 ) │ │ movs r4, r3 │ │ - b.n a8fa6 │ │ + b.n a8fb2 │ │ movs r0, r2 │ │ - b.n a8fa2 │ │ + b.n a8fae │ │ movs r1, r0 │ │ - b.n a9726 │ │ + b.n a9732 │ │ movs r3, r6 │ │ lsrs r0, r0, #8 │ │ movs r0, r5 │ │ - b.n a8fb2 │ │ + b.n a8fbe │ │ adds r0, #44 @ 0x2c │ │ - b.n a8fb6 │ │ + b.n a8fc2 │ │ movs r0, #12 │ │ - b.n a8fbe │ │ + b.n a8fca │ │ str r3, [r0, #0] │ │ - b.n a97ba │ │ + b.n a97c6 │ │ movs r0, r6 │ │ lsls r2, r2, #22 │ │ adds r0, #52 @ 0x34 │ │ lsls r2, r2, #22 │ │ str r6, [r0, #0] │ │ - b.n a904a │ │ + b.n a9056 │ │ movs r2, r0 │ │ - b.n a9ad6 │ │ + b.n a9ae2 │ │ movs r2, r2 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n a9b60 │ │ + b.n a9b6c │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ strb r4, [r0, #0] │ │ - b.n a905e │ │ + b.n a906a │ │ movs r4, r0 │ │ - b.n a9aec │ │ + b.n a9af8 │ │ lsls r5, r3, #1 │ │ subs r0, r0, r0 │ │ movs r0, #16 │ │ - b.n a8fea │ │ + b.n a8ff6 │ │ movs r0, r0 │ │ - b.n a9b6e │ │ + b.n a9b7a │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ @ instruction: 0xfff8eaff │ │ str r4, [r0, #0] │ │ - b.n a907a │ │ + b.n a9086 │ │ movs r4, r0 │ │ - b.n a9b06 │ │ + b.n a9b12 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ str r4, [r1, #4] │ │ - b.n a9006 │ │ + b.n a9012 │ │ str r7, [r0, #0] │ │ - b.n a9492 │ │ + b.n a949e │ │ movs r1, r0 │ │ - b.n a9b16 │ │ + b.n a9b22 │ │ lsls r2, r2, #1 │ │ subs r0, r0, r0 │ │ movs r0, #16 │ │ - b.n a9016 │ │ + b.n a9022 │ │ movs r0, r0 │ │ - b.n a9b9a │ │ + b.n a9ba6 │ │ @ instruction: 0xfff51aff │ │ movs r0, #28 │ │ - b.n a9a06 │ │ + b.n a9a12 │ │ movs r1, r1 │ │ stmia.w sp, {r2} │ │ - b.n a9846 │ │ - cmp r7, #7 │ │ + b.n a9852 │ │ + cmp r7, #8 │ │ add.w r0, r0, r0 │ │ - b.n a9bae │ │ + b.n a9bba │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ movs r0, #4 │ │ - b.n a9856 │ │ + b.n a9862 │ │ subs r0, r2, #7 │ │ - b.n a9b38 │ │ + b.n a9b44 │ │ adds r0, #4 │ │ - b.n a9102 │ │ + b.n a910e │ │ movs r1, r0 │ │ - b.n a9b48 │ │ + b.n a9b54 │ │ movs r6, r5 │ │ subs r0, r0, r0 │ │ movs r0, #24 │ │ - b.n a9052 │ │ + b.n a905e │ │ adds r0, #180 @ 0xb4 │ │ - b.n a98d6 │ │ + b.n a98e2 │ │ movs r0, r0 │ │ - b.n a9bd6 │ │ + b.n a9be2 │ │ adds r0, #1 │ │ - b.n a983c │ │ + b.n a9848 │ │ adds r0, #180 @ 0xb4 │ │ - b.n a98c2 │ │ + b.n a98ce │ │ movs r4, r7 │ │ lsrs r0, r0, #8 │ │ adds r0, #0 │ │ - b.n a9c82 │ │ + b.n a9c8e │ │ adds r0, #188 @ 0xbc │ │ - b.n a904a │ │ + b.n a9056 │ │ movs r0, #4 │ │ - b.n a9a4e │ │ + b.n a9a5a │ │ asrs r1, r0, #32 │ │ - b.n a9a50 │ │ + b.n a9a5c │ │ asrs r0, r6, #2 │ │ - b.n a98d6 │ │ - beq.n a9584 │ │ - b.n a99ec │ │ + b.n a98e2 │ │ + beq.n a9590 │ │ + b.n a99f8 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {} │ │ - b.n a9c9e │ │ + b.n a9caa │ │ movs r0, r1 │ │ - b.n a9b8c │ │ + b.n a9b98 │ │ movs r5, r0 │ │ - b.n a90ee │ │ + b.n a90fa │ │ asrs r0, r0, #32 │ │ asrs r0, r4, #15 │ │ movs r4, r3 │ │ asrs r4, r2, #22 │ │ lsls r4, r7, #2 │ │ asrs r0, r2, #7 │ │ lsls r0, r4, #2 │ │ asrs r1, r0, #2 │ │ movs r1, r0 │ │ - b.n a9ba4 │ │ + b.n a9bb0 │ │ lsls r4, r7, #30 │ │ - b.n a9906 │ │ + b.n a9912 │ │ movs r2, r4 │ │ lsrs r0, r0, #8 │ │ movs r0, #28 │ │ - b.n a90ae │ │ + b.n a90ba │ │ movs r4, r1 │ │ - b.n a90b2 │ │ + b.n a90be │ │ asrs r0, r0, #32 │ │ - b.n a90b2 │ │ + b.n a90be │ │ str r0, [r3, #60] @ 0x3c │ │ - b.n a9912 │ │ + b.n a991e │ │ adds r0, #4 │ │ - b.n a90ba │ │ + b.n a90c6 │ │ asrs r6, r0, #32 │ │ - b.n a95dc │ │ + b.n a95e8 │ │ adds r0, #7 │ │ - b.n a95e4 │ │ + b.n a95f0 │ │ asrs r3, r0, #32 │ │ - b.n a98c4 │ │ + b.n a98d0 │ │ movs r5, r2 │ │ subs r0, r0, r0 │ │ strb r0, [r0, #9] │ │ - b.n a90ca │ │ + b.n a90d6 │ │ movs r0, r0 │ │ - b.n a9c5c │ │ + b.n a9c68 │ │ movs r6, r2 │ │ lsrs r0, r0, #8 │ │ asrs r2, r7, #2 │ │ - b.n a995a │ │ + b.n a9966 │ │ lsls r0, r0, #1 │ │ - b.n a9bdc │ │ + b.n a9be8 │ │ movs r3, r2 │ │ subs r0, r0, r0 │ │ asrs r0, r2, #32 │ │ - b.n a90e6 │ │ + b.n a90f2 │ │ str r0, [r7, #32] │ │ - b.n a90e6 │ │ + b.n a90f2 │ │ movs r7, r0 │ │ - b.n a990a │ │ - adds r3, #11 │ │ + b.n a9916 │ │ + adds r3, #12 │ │ add.w r0, r0, r0, lsl #2 │ │ - b.n a96d2 │ │ + b.n a96de │ │ lsls r0, r0, #4 │ │ - b.n a96e4 │ │ + b.n a96f0 │ │ movs r0, r2 │ │ - b.n a90fa │ │ + b.n a9106 │ │ str r4, [r0, #0] │ │ - b.n a8fde │ │ + b.n a8fea │ │ movs r2, r1 │ │ and.w r0, r0, r0, lsr #12 │ │ - b.n a910e │ │ + b.n a911a │ │ strb r0, [r0, #0] │ │ - b.n a9d2a │ │ + b.n a9d36 │ │ strb r0, [r1, #0] │ │ - b.n a90f4 │ │ + b.n a9100 │ │ asrs r1, r0, #32 │ │ - b.n a9af4 │ │ + b.n a9b00 │ │ asrs r0, r6, #2 │ │ - b.n a997a │ │ - beq.n a9628 │ │ - b.n a9a90 │ │ + b.n a9986 │ │ + beq.n a9634 │ │ + b.n a9a9c │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r2, ip} │ │ - b.n a9942 │ │ - eors r5, r3 │ │ + b.n a994e │ │ + eors r6, r3 │ │ add.w r0, r0, r0 │ │ - b.n a9caa │ │ + b.n a9cb6 │ │ @ instruction: 0xffc01aff │ │ movs r0, r0 │ │ - b.n a9d52 │ │ + b.n a9d5e │ │ movs r2, r0 │ │ - b.n a9c40 │ │ + b.n a9c4c │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n a995e │ │ + b.n a996a │ │ asrs r1, r1, #32 │ │ - b.n a9962 │ │ + b.n a996e │ │ movs r0, #5 │ │ - b.n a9966 │ │ - beq.n a9658 │ │ - b.n a9ac0 │ │ - ldr r3, [pc, #960] @ (a99ec ) │ │ - ldmia.w sp!, {r7, r8, r9, sl, fp, sp} │ │ + b.n a9972 │ │ + beq.n a9664 │ │ + b.n a9acc │ │ + ldr r3, [pc, #960] @ (a99f8 ) │ │ + ldmia.w sp!, {r0, r7, r8, r9, sl, fp, sp} │ │ @ instruction: 0xea00d018 │ │ - b.n a9acc │ │ + b.n a9ad8 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r3, r4, r5} │ │ - b.n a9162 │ │ + b.n a916e │ │ adds r0, #60 @ 0x3c │ │ - b.n a9166 │ │ + b.n a9172 │ │ @ instruction: 0xffaceaff │ │ movs r0, r2 │ │ - b.n a9b4a │ │ + b.n a9b56 │ │ @ instruction: 0xffb0eaff │ │ strh r0, [r0, #0] │ │ - b.n a9992 │ │ + b.n a999e │ │ movs r1, r0 │ │ - b.n a9996 │ │ + b.n a99a2 │ │ asrs r7, r0, #32 │ │ - b.n a999a │ │ + b.n a99a6 │ │ udf #181 @ 0xb5 │ │ @ instruction: 0xebff1000 │ │ - b.n a99a2 │ │ + b.n a99ae │ │ movs r0, r1 │ │ - b.n a99a6 │ │ + b.n a99b2 │ │ movs r0, r0 │ │ - b.n a9d0c │ │ + b.n a9d18 │ │ vpmin.u q8, , │ │ movs r1, r0 │ │ - b.n a99b2 │ │ + b.n a99be │ │ @ instruction: 0xffa6eaff │ │ - ldr r4, [pc, #448] @ (a9838 ) │ │ + ldr r4, [pc, #448] @ (a9844 ) │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n a9b98 │ │ + b.n a9ba4 │ │ str r2, [r0, r0] │ │ - b.n a99c2 │ │ + b.n a99ce │ │ ands r1, r0 │ │ - b.n a99c6 │ │ + b.n a99d2 │ │ str r0, [r0, #0] │ │ - b.n a99ca │ │ + b.n a99d6 │ │ ldmia r5, {r0, r2, r3, r4, r5, r7} │ │ @ instruction: 0xebff1001 │ │ - b.n a9b1c │ │ + b.n a9b28 │ │ lsls r6, r1, #4 │ │ - b.n a9d78 │ │ + b.n a9d84 │ │ movs r5, r2 │ │ ldrh r0, [r0, #16] │ │ movs r0, r0 │ │ - b.n a9d3e │ │ + b.n a9d4a │ │ movs r3, r2 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n a9d52 │ │ + b.n a9d5e │ │ movs r7, r0 │ │ rev r0, r0 │ │ movs r6, r0 │ │ - b.n a99ee │ │ + b.n a99fa │ │ asrs r4, r0, #32 │ │ - b.n a99f2 │ │ + b.n a99fe │ │ movs r0, #5 │ │ - b.n a99f6 │ │ - pop {r0, r2, r3, r6, pc} │ │ + b.n a9a02 │ │ + pop {r1, r2, r3, r6, pc} │ │ add.w r0, r0, r0 │ │ - b.n a9d66 │ │ + b.n a9d72 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n a9d66 │ │ + b.n a9d72 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #36 @ 0x24 │ │ - b.n a920c │ │ + b.n a9218 │ │ movs r4, r0 │ │ - b.n a9a12 │ │ + b.n a9a1e │ │ asrs r5, r0, #32 │ │ - b.n a9a16 │ │ + b.n a9a22 │ │ adds r0, #6 │ │ - b.n a9a1a │ │ + b.n a9a26 │ │ movs r0, #2 │ │ - b.n a97fc │ │ - pop {r0, r1, r2, r6, pc} │ │ + b.n a9808 │ │ + pop {r3, r6, pc} │ │ add.w r0, r0, r5 │ │ - b.n a97ee │ │ + b.n a97fa │ │ asrs r0, r0, #32 │ │ - b.n a9e2a │ │ + b.n a9e36 │ │ asrs r1, r0, #32 │ │ - b.n a916e │ │ + b.n a917a │ │ movs r4, r0 │ │ - b.n a9a32 │ │ + b.n a9a3e │ │ ldrh r0, [r6, #34] @ 0x22 │ │ - ldmia.w sp!, {r1, r2, r6, r7, sl, sp, lr} │ │ + ldmia.w sp!, {r1, r3, r8, sl, sp, lr} │ │ vqshrun.s64 d20, q8, #10 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n a9c1c │ │ + b.n a9c28 │ │ ands r0, r0 │ │ - b.n a9a46 │ │ + b.n a9a52 │ │ ldmia r5!, {r1, r2, r3, r4, r7} │ │ @ instruction: 0xebff5000 │ │ - b.n a9a4e │ │ + b.n a9a5a │ │ movs r0, r0 │ │ - b.n a9db2 │ │ + b.n a9dbe │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n a9dc2 │ │ + b.n a9dce │ │ movs r4, r0 │ │ rev r0, r0 │ │ movs r4, r0 │ │ - b.n a9a62 │ │ - pop {r1, r3, r4, r5, pc} │ │ + b.n a9a6e │ │ + pop {r0, r1, r3, r4, r5, pc} │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n a9a6a │ │ + b.n a9a76 │ │ movs r0, r0 │ │ - b.n a9dce │ │ + b.n a9dda │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ str r0, [r4, r0] │ │ - b.n a9274 │ │ + b.n a9280 │ │ asrs r7, r3, #32 │ │ - b.n a9e7a │ │ + b.n a9e86 │ │ movs r0, #28 │ │ - b.n a927c │ │ + b.n a9288 │ │ adds r0, #4 │ │ - b.n a9a82 │ │ + b.n a9a8e │ │ str r5, [r0, r0] │ │ - b.n a9864 │ │ + b.n a9870 │ │ movs r0, #2 │ │ - b.n a9868 │ │ + b.n a9874 │ │ movs r5, r0 │ │ - b.n a9a8e │ │ - pop {r0, r1, r3, r5, pc} │ │ + b.n a9a9a │ │ + pop {r2, r3, r5, pc} │ │ add.w r0, r0, r5 │ │ - b.n a9a96 │ │ + b.n a9aa2 │ │ ldrh r0, [r6, #0] │ │ - ldmia.w sp!, {r5, r7, ip, lr} │ │ + ldmia.w sp!, {r2, r4, r5, r7, ip, lr} │ │ movs r3, r0 │ │ - str r2, [r3, #68] @ 0x44 │ │ + str r6, [r3, #72] @ 0x48 │ │ @ instruction: 0xfff64ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n a9c84 │ │ - beq.n a9774 │ │ - b.n a9c08 │ │ + b.n a9c90 │ │ + beq.n a9780 │ │ + b.n a9c14 │ │ movs r0, r0 │ │ - b.n a9e12 │ │ + b.n a9e1e │ │ lsls r7, r1, #8 │ │ lsrs r0, r0, #8 │ │ ands r0, r0 │ │ - b.n a9aba │ │ + b.n a9ac6 │ │ movs r0, r0 │ │ - b.n a929e │ │ + b.n a92aa │ │ str r1, [r0, #0] │ │ - b.n a9ac2 │ │ + b.n a9ace │ │ asrs r1, r0, #25 │ │ - b.n a9d98 │ │ + b.n a9da4 │ │ subs r1, r1, r2 │ │ - b.n a9e0c │ │ + b.n a9e18 │ │ movs r1, r0 │ │ - b.n a9a2e │ │ + b.n a9a3a │ │ lsls r2, r1, #8 │ │ subs r0, r0, r0 │ │ str r4, [r0, r0] │ │ - b.n a92be │ │ + b.n a92ca │ │ movs r1, r0 │ │ - b.n a9e84 │ │ + b.n a9e90 │ │ lsls r1, r1, #8 │ │ - bge.n a979e │ │ + bge.n a97aa │ │ lsls r2, r0, #8 │ │ - b.n a9dcc │ │ + b.n a9dd8 │ │ strb r3, [r0, #0] │ │ - b.n a9ae6 │ │ + b.n a9af2 │ │ lsls r4, r0, #2 │ │ asrs r4, r2, #22 │ │ strh r2, [r0, #0] │ │ - b.n a9aee │ │ - add r0, pc, #0 @ (adr r0, a97b0 ) │ │ - b.n a9ef2 │ │ + b.n a9afa │ │ + add r0, pc, #0 @ (adr r0, a97bc ) │ │ + b.n a9efe │ │ movs r0, r0 │ │ asrs r0, r2, #13 │ │ movs r4, r7 │ │ subs r0, r0, r0 │ │ movs r4, r2 │ │ - b.n a9e6a │ │ + b.n a9e76 │ │ lsls r1, r5, #7 │ │ ldrh r0, [r0, #16] │ │ movs r4, r0 │ │ - b.n a9ce4 │ │ + b.n a9cf0 │ │ asrs r6, r0, #4 │ │ - b.n a96ea │ │ - blx 4aa8cc │ │ + b.n a96f6 │ │ + blx 4aa8d8 │ │ lsls r4, r3, #15 │ │ movs r0, r0 │ │ lsls r4, r3, #16 │ │ movs r0, r0 │ │ lsls r4, r2, #8 │ │ movs r0, r0 │ │ lsls r4, r4, #12 │ │ @@ -200446,23811 +200326,23811 @@ │ │ lsls r4, r4, #20 │ │ movs r0, r0 │ │ lsls r0, r6, #21 │ │ movs r0, r0 │ │ lsls r0, r6, #18 │ │ movs r0, r0 │ │ lsls r7, r3, #1 │ │ - b.n a9e26 │ │ + b.n a9e32 │ │ adds r0, #7 │ │ - b.n a983a │ │ + b.n a9846 │ │ lsrs r1, r0, #30 │ │ - b.n a9ecc │ │ + b.n a9ed8 │ │ asrs r0, r0, #32 │ │ - b.n a9962 │ │ + b.n a996e │ │ movs r0, #0 │ │ - b.n a9dc4 │ │ + b.n a9dd0 │ │ asrs r0, r4, #1 │ │ - b.n a9cdc │ │ + b.n a9ce8 │ │ movs r0, #0 │ │ - b.n a9dc2 │ │ + b.n a9dce │ │ stmia r0!, {} │ │ - b.n aa002 │ │ + b.n aa00e │ │ movs r1, r0 │ │ - b.n a9f2c │ │ + b.n a9f38 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n a98f0 │ │ + b.n a98fc │ │ movs r4, r1 │ │ - b.n a99f6 │ │ + b.n a9a02 │ │ lsls r1, r5, #7 │ │ subs r2, #0 │ │ lsrs r2, r0, #32 │ │ - b.n a9e84 │ │ + b.n a9e90 │ │ lsls r1, r4, #7 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n a9f16 │ │ + b.n a9f22 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n a9baa │ │ + b.n a9bb6 │ │ asrs r0, r0, #32 │ │ - b.n a9fae │ │ + b.n a9fba │ │ stmia r7!, {r0, r2, r3, r4, r5, r6} │ │ @ instruction: 0xebffc000 │ │ - b.n aa036 │ │ + b.n aa042 │ │ movs r0, r0 │ │ - b.n a9f1a │ │ + b.n a9f26 │ │ lsls r7, r4, #8 │ │ subs r0, r0, r0 │ │ lsls r4, r0, #4 │ │ - b.n a93aa │ │ + b.n a93b6 │ │ str r1, [r0, r0] │ │ - b.n a9fc6 │ │ + b.n a9fd2 │ │ movs r0, r0 │ │ - b.n a9f2a │ │ + b.n a9f36 │ │ lsls r2, r6, #4 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n a9f46 │ │ + b.n a9f52 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n a9bda │ │ + b.n a9be6 │ │ stmia r7!, {r0, r2, r6, r7} │ │ @ instruction: 0xebff9000 │ │ - b.n a9fe2 │ │ + b.n a9fee │ │ movs r0, r0 │ │ - b.n a9f50 │ │ + b.n a9f5c │ │ lsls r2, r0, #6 │ │ lsrs r0, r0, #8 │ │ lsls r5, r2, #6 │ │ and.w r0, r0, r4 │ │ - b.n a9bf2 │ │ + b.n a9bfe │ │ stmia r7!, {r0, r2, r4, r6} │ │ @ instruction: 0xebff0f10 │ │ - b.n a9b98 │ │ - add r2, pc, #640 @ (adr r2, a9b3c ) │ │ - b.n a9bfe │ │ + b.n a9ba4 │ │ + add r2, pc, #640 @ (adr r2, a9b48 ) │ │ + b.n a9c0a │ │ @ instruction: 0xffbdeaff │ │ movs r7, r0 │ │ - b.n a98d6 │ │ + b.n a98e2 │ │ movs r1, r0 │ │ - b.n a9faa │ │ + b.n a9fb6 │ │ lsls r3, r5, #4 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n a9dc2 │ │ + b.n a9dce │ │ movs r0, r0 │ │ - b.n a9ec4 │ │ + b.n a9ed0 │ │ lsls r1, r1, #6 │ │ subs r2, #0 │ │ strh r5, [r2, #6] │ │ - b.n a9466 │ │ + b.n a9472 │ │ lsls r3, r6, #5 │ │ and.w r0, r0, r7 │ │ - b.n a98f6 │ │ + b.n a9902 │ │ movs r1, r0 │ │ - b.n a9fca │ │ + b.n a9fd6 │ │ lsls r6, r4, #4 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n a9de2 │ │ + b.n a9dee │ │ movs r0, r0 │ │ - b.n a9ee4 │ │ + b.n a9ef0 │ │ lsls r1, r0, #6 │ │ subs r2, #0 │ │ lsls r0, r4, #3 │ │ - b.n a94a6 │ │ + b.n a94b2 │ │ strh r4, [r2, #6] │ │ - b.n a948a │ │ + b.n a9496 │ │ movs r4, r0 │ │ - b.n aa006 │ │ + b.n aa012 │ │ movs r5, r2 │ │ and.w r0, r0, r7 │ │ - b.n a991e │ │ + b.n a992a │ │ str r0, [sp, #0] │ │ - b.n aa052 │ │ + b.n aa05e │ │ movs r1, r0 │ │ - b.n a9ff6 │ │ + b.n aa002 │ │ movs r0, r0 │ │ - b.n aa05a │ │ + b.n aa066 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ lsrs r1, r0, #16 │ │ - b.n a9dd2 │ │ + b.n a9dde │ │ movs r0, r0 │ │ - b.n a9ed4 │ │ + b.n a9ee0 │ │ movs r0, r1 │ │ - b.n a9c6a │ │ + b.n a9c76 │ │ lsls r1, r7, #6 │ │ cmp r2, #0 │ │ lsls r3, r1, #3 │ │ - b.n a94ba │ │ + b.n a94c6 │ │ lsls r7, r3, #5 │ │ and.w r0, r0, r7 │ │ - b.n a994a │ │ + b.n a9956 │ │ movs r1, r0 │ │ - b.n aa01e │ │ + b.n aa02a │ │ lsls r7, r1, #6 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n a9f46 │ │ + b.n a9f52 │ │ lsls r7, r7, #1 │ │ - b.n a9fca │ │ + b.n a9fd6 │ │ movs r0, r0 │ │ - b.n a99fe │ │ + b.n a9a0a │ │ movs r0, r0 │ │ - b.n a9f00 │ │ + b.n a9f0c │ │ lsls r2, r0, #8 │ │ cmp r2, #0 │ │ lsls r0, r4, #3 │ │ - b.n a9502 │ │ + b.n a950e │ │ strh r4, [r6, #4] │ │ - b.n a9466 │ │ + b.n a9472 │ │ movs r2, r0 │ │ - b.n aa062 │ │ + b.n aa06e │ │ lsls r0, r4, #3 │ │ - b.n a94ee │ │ + b.n a94fa │ │ lsls r1, r2, #5 │ │ and.w r0, r0, r7 │ │ - b.n a997e │ │ + b.n a998a │ │ movs r1, r0 │ │ - b.n aa052 │ │ + b.n aa05e │ │ lsls r0, r2, #4 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n aa13a │ │ + b.n aa146 │ │ subs r6, r0, r0 │ │ - b.n a9e1e │ │ + b.n a9e2a │ │ movs r0, #1 │ │ - b.n a9f92 │ │ + b.n a9f9e │ │ movs r0, r0 │ │ - b.n a9f06 │ │ + b.n a9f12 │ │ movs r0, #2 │ │ - b.n a9a3a │ │ + b.n a9a46 │ │ adds r0, #0 │ │ - b.n a9f1c │ │ + b.n a9f28 │ │ asrs r1, r0, #32 │ │ - b.n a9a36 │ │ + b.n a9a42 │ │ movs r0, r0 │ │ - b.n a9b3c │ │ + b.n a9b48 │ │ lsls r0, r1, #4 │ │ cmp r2, #0 │ │ adds r0, r2, r1 │ │ - b.n a94dc │ │ + b.n a94e8 │ │ str r0, [sp, #88] @ 0x58 │ │ - b.n aa0e2 │ │ + b.n aa0ee │ │ movs r6, r2 │ │ - b.n aa0e6 │ │ + b.n aa0f2 │ │ movs r1, #121 @ 0x79 │ │ - b.n a9faa │ │ + b.n a9fb6 │ │ asrs r1, r0, #32 │ │ - b.n a9acc │ │ + b.n a9ad8 │ │ lsls r2, r1, #6 │ │ and.w r0, r0, r7 │ │ - b.n a99c6 │ │ + b.n a99d2 │ │ movs r1, r0 │ │ - b.n aa09a │ │ + b.n aa0a6 │ │ lsls r7, r0, #4 │ │ lsrs r0, r0, #8 │ │ lsrs r1, r0, #16 │ │ - b.n a9e72 │ │ + b.n a9e7e │ │ movs r0, r0 │ │ - b.n a9f74 │ │ + b.n a9f80 │ │ lsls r5, r0, #4 │ │ subs r2, #0 │ │ adds r0, r2, r0 │ │ - b.n a950c │ │ + b.n a9518 │ │ str r0, [sp, #88] @ 0x58 │ │ - b.n aa112 │ │ + b.n aa11e │ │ movs r6, r2 │ │ - b.n aa116 │ │ + b.n aa122 │ │ movs r1, #91 @ 0x5b │ │ - b.n a9fda │ │ + b.n a9fe6 │ │ asrs r1, r0, #32 │ │ - b.n a9afc │ │ + b.n a9b08 │ │ lsls r6, r7, #5 │ │ and.w r0, r0, r7, lsl #4 │ │ - b.n a99f6 │ │ + b.n a9a02 │ │ movs r0, r0 │ │ - b.n aa1aa │ │ + b.n aa1b6 │ │ movs r0, r0 │ │ - b.n a9a90 │ │ + b.n a9a9c │ │ movs r7, r0 │ │ asrs r0, r4, #6 │ │ movs r1, r0 │ │ - b.n aa0d8 │ │ + b.n aa0e4 │ │ strh r7, [r7, #32] │ │ lsls r0, r4, #14 │ │ lsrs r2, r0, #32 │ │ - b.n aa028 │ │ + b.n aa034 │ │ lsls r2, r1, #6 │ │ subs r0, r0, r0 │ │ lsls r2, r0, #8 │ │ - b.n aa030 │ │ + b.n aa03c │ │ lsls r6, r4, #6 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n aa00e │ │ + b.n aa01a │ │ subs r7, r7, #7 │ │ - b.n aa0b0 │ │ + b.n aa0bc │ │ asrs r1, r0, #32 │ │ - b.n a9ac6 │ │ + b.n a9ad2 │ │ movs r0, r0 │ │ - b.n a9fba │ │ + b.n a9fc6 │ │ lsls r4, r0, #7 │ │ cmp r2, #0 │ │ asrs r0, r1, #32 │ │ - b.n a954a │ │ + b.n a9556 │ │ str r0, [sp, #0] │ │ - b.n aa166 │ │ + b.n aa172 │ │ movs r0, #72 @ 0x48 │ │ - b.n a9552 │ │ + b.n a955e │ │ asrs r1, r0, #32 │ │ - b.n a9b3e │ │ + b.n a9b4a │ │ lsls r4, r3, #1 │ │ - b.n a95da │ │ + b.n a95e6 │ │ asrs r1, r0, #32 │ │ - b.n a9eb8 │ │ + b.n a9ec4 │ │ movs r0, #16 │ │ - b.n a955e │ │ - bl 50553a │ │ + b.n a956a │ │ + bl 505546 │ │ movs r1, r6 │ │ - b.n a9ce6 │ │ + b.n a9cf2 │ │ lsls r3, r3, #4 │ │ lsrs r0, r0, #8 │ │ movs r1, r6 │ │ - b.n a9daa │ │ + b.n a9db6 │ │ asrs r0, r1, #1 │ │ - b.n a9576 │ │ + b.n a9582 │ │ movs r0, r2 │ │ - b.n a9554 │ │ + b.n a9560 │ │ lsls r0, r1, #1 │ │ and.w r0, r0, r7 │ │ - b.n a9a6a │ │ + b.n a9a76 │ │ asrs r0, r0, #32 │ │ - b.n aa21e │ │ + b.n aa22a │ │ asrs r1, r0, #32 │ │ - b.n a9b02 │ │ + b.n a9b0e │ │ strb r1, [r0, #0] │ │ lsls r0, r4, #6 │ │ asrs r0, r1, #32 │ │ asrs r0, r4, #6 │ │ movs r0, r0 │ │ - b.n aa11c │ │ + b.n aa128 │ │ lsls r4, r6, #5 │ │ subs r0, r0, r0 │ │ lsrs r2, r0, #32 │ │ - b.n aa0a0 │ │ + b.n aa0ac │ │ lsls r0, r2, #6 │ │ subs r0, r0, r0 │ │ cmp r2, #0 │ │ - b.n aa096 │ │ + b.n aa0a2 │ │ subs r1, #2 │ │ - b.n aa1c2 │ │ + b.n aa1ce │ │ cmp r3, #154 @ 0x9a │ │ - b.n aa10c │ │ + b.n aa118 │ │ str r0, [sp, #0] │ │ - b.n aa1ca │ │ + b.n aa1d6 │ │ lsls r7, r2, #10 │ │ - b.n a9a8e │ │ + b.n a9a9a │ │ adds r2, #145 @ 0x91 │ │ - b.n a9bd2 │ │ + b.n a9bde │ │ asrs r4, r0, #32 │ │ - b.n a9dd6 │ │ + b.n a9de2 │ │ strb r0, [r0, #3] │ │ - b.n a95fc │ │ + b.n a9608 │ │ str r4, [r0, #0] │ │ - b.n a95c0 │ │ + b.n a95cc │ │ cmp r0, #35 @ 0x23 │ │ - b.n a9de2 │ │ + b.n a9dee │ │ cmp r0, #0 │ │ - b.n a9daa │ │ + b.n a9db6 │ │ adds r0, #7 │ │ - b.n a9aee │ │ + b.n a9afa │ │ ldrb r0, [r4, #0] │ │ - b.n a9afa │ │ + b.n a9b06 │ │ adds r0, #7 │ │ - b.n a9dd8 │ │ + b.n a9de4 │ │ lsls r7, r7, #3 │ │ lsrs r0, r0, #8 │ │ adds r1, #4 │ │ - b.n a95e2 │ │ + b.n a95ee │ │ movs r0, r0 │ │ - b.n aa164 │ │ + b.n aa170 │ │ adds r0, #1 │ │ asrs r0, r0, #12 │ │ adds r0, #10 │ │ - b.n a9acc │ │ + b.n a9ad8 │ │ movs r1, r0 │ │ - b.n aa170 │ │ + b.n aa17c │ │ lsls r3, r6, #4 │ │ lsrs r0, r0, #8 │ │ subs r0, #32 │ │ - b.n a9e12 │ │ + b.n a9e1e │ │ lsls r0, r4, #3 │ │ - b.n a967e │ │ + b.n a968a │ │ movs r0, #240 @ 0xf0 │ │ - b.n a9e5c │ │ + b.n a9e68 │ │ movs r2, r0 │ │ - b.n aa0fe │ │ + b.n aa10a │ │ lsls r4, r6, #3 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n a9e26 │ │ + b.n a9e32 │ │ lsls r3, r0, #7 │ │ add.w r0, r0, r4, ror #2 │ │ - b.n a95f6 │ │ + b.n a9602 │ │ lsls r0, r6, #3 │ │ and.w r0, r0, r7 │ │ - b.n a9b06 │ │ + b.n a9b12 │ │ asrs r0, r0, #32 │ │ - b.n aa2ba │ │ + b.n aa2c6 │ │ movs r1, r0 │ │ - b.n aa1de │ │ + b.n aa1ea │ │ ldrh r3, [r3, #36] @ 0x24 │ │ lsls r6, r0, #12 │ │ strh r2, [r5, #0] │ │ lsls r0, r0, #13 │ │ str r1, [r0, #0] │ │ - b.n a9baa │ │ + b.n a9bb6 │ │ str r7, [r0, #0] │ │ asrs r0, r4, #6 │ │ lsrs r2, r0, #32 │ │ - b.n aa13c │ │ + b.n aa148 │ │ lsls r1, r2, #5 │ │ subs r0, r0, r0 │ │ lsls r2, r0, #8 │ │ - b.n aa144 │ │ + b.n aa150 │ │ lsls r5, r5, #5 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n aa1ce │ │ + b.n aa1da │ │ lsls r0, r1, #6 │ │ subs r0, r0, r0 │ │ lsrs r0, r0, #8 │ │ - b.n aa142 │ │ + b.n aa14e │ │ ldrb r2, [r0, #4] │ │ - b.n aa26e │ │ + b.n aa27a │ │ lsrs r2, r3, #14 │ │ - b.n aa1b8 │ │ + b.n aa1c4 │ │ asrs r1, r0, #32 │ │ - b.n aa276 │ │ + b.n aa282 │ │ lsls r6, r2, #2 │ │ - b.n a9b44 │ │ + b.n a9b50 │ │ strb r0, [r3, #2] │ │ - b.n a9c88 │ │ + b.n a9c94 │ │ lsls r0, r1, #1 │ │ - b.n a966a │ │ + b.n a9676 │ │ movs r0, r3 │ │ - b.n aa046 │ │ + b.n aa052 │ │ @ instruction: 0xfb22ebff │ │ cmp r0, #37 @ 0x25 │ │ - b.n a9b90 │ │ + b.n a9b9c │ │ adds r7, r4, r0 │ │ - b.n a9e92 │ │ + b.n a9e9e │ │ adds r5, r0, r0 │ │ - b.n a9e58 │ │ + b.n a9e64 │ │ str r0, [sp, #0] │ │ - b.n aa29a │ │ + b.n aa2a6 │ │ movs r0, r0 │ │ - b.n a9ba0 │ │ + b.n a9bac │ │ movs r2, r0 │ │ - b.n a9e82 │ │ + b.n a9e8e │ │ lsls r3, r2, #3 │ │ lsrs r0, r0, #8 │ │ lsls r0, r1, #1 │ │ - b.n a9692 │ │ + b.n a969e │ │ asrs r0, r3, #32 │ │ - b.n a966e │ │ + b.n a967a │ │ adds r5, r4, r0 │ │ - b.n a9eb2 │ │ + b.n a9ebe │ │ asrs r4, r3, #32 │ │ - b.n a9676 │ │ + b.n a9682 │ │ movs r6, r0 │ │ - b.n a9eaa │ │ + b.n a9eb6 │ │ movs r1, r0 │ │ asrs r0, r0, #12 │ │ movs r2, r1 │ │ - b.n a9b82 │ │ + b.n a9b8e │ │ movs r1, r0 │ │ - b.n aa226 │ │ + b.n aa232 │ │ lsls r2, r1, #3 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n a9ece │ │ + b.n a9eda │ │ asrs r0, r0, #32 │ │ - b.n aa2d2 │ │ + b.n aa2de │ │ movs r0, #0 │ │ - b.n aa2d6 │ │ + b.n aa2e2 │ │ @ instruction: 0xeb8cebff │ │ str r0, [r0, r0] │ │ - b.n a9ede │ │ + b.n a9eea │ │ movs r1, r0 │ │ - b.n aa282 │ │ + b.n aa28e │ │ vpmin.u , , │ │ lsls r2, r0, #3 │ │ and.w r0, r0, r7 │ │ - b.n a9bbe │ │ + b.n a9bca │ │ asrs r0, r0, #32 │ │ - b.n aa372 │ │ + b.n aa37e │ │ asrs r1, r0, #32 │ │ - b.n a9c56 │ │ + b.n a9c62 │ │ asrs r7, r0, #32 │ │ asrs r0, r4, #6 │ │ movs r1, r0 │ │ - b.n aa29e │ │ + b.n aa2aa │ │ lsrs r6, r7, #31 │ │ - b.n aa1d0 │ │ + b.n aa1dc │ │ strh r2, [r5, #0] │ │ lsls r0, r0, #12 │ │ movs r0, r0 │ │ - b.n a9c7a │ │ + b.n a9c86 │ │ movs r0, r0 │ │ - b.n aa170 │ │ + b.n aa17c │ │ lsls r0, r5, #4 │ │ cmp r2, #0 │ │ movs r0, r2 │ │ - b.n a96fe │ │ + b.n a970a │ │ movs r0, r0 │ │ - b.n aa27a │ │ + b.n aa286 │ │ lsls r3, r0, #5 │ │ subs r0, r0, r0 │ │ movs r2, r0 │ │ - b.n aa0f2 │ │ + b.n aa0fe │ │ lsls r4, r4, #1 │ │ - b.n a96ee │ │ + b.n a96fa │ │ lsls r1, r6, #2 │ │ and.w r0, r0, r7 │ │ - b.n a9bfe │ │ + b.n a9c0a │ │ asrs r0, r0, #32 │ │ - b.n aa3b2 │ │ + b.n aa3be │ │ movs r0, #1 │ │ - b.n a9c96 │ │ + b.n a9ca2 │ │ adds r0, #0 │ │ - b.n aa20a │ │ + b.n aa216 │ │ movs r0, #7 │ │ asrs r0, r4, #6 │ │ movs r1, r0 │ │ - b.n aa2e2 │ │ + b.n aa2ee │ │ ldrh r7, [r7, #62] @ 0x3e │ │ lsls r7, r0, #12 │ │ lsrs r2, r0, #4 │ │ - b.n aa0ba │ │ + b.n aa0c6 │ │ movs r0, #0 │ │ - b.n aa192 │ │ + b.n aa19e │ │ subs r7, #255 @ 0xff │ │ - b.n aa2b0 │ │ + b.n aa2bc │ │ movs r0, r0 │ │ - b.n a9cbc │ │ + b.n a9cc8 │ │ movs r2, r0 │ │ - b.n a9dbc │ │ + b.n a9dc8 │ │ lsls r3, r3, #4 │ │ cmp r2, #0 │ │ movs r0, r2 │ │ - b.n a974a │ │ + b.n a9756 │ │ movs r0, r0 │ │ - b.n aa2c6 │ │ + b.n aa2d2 │ │ lsls r6, r6, #4 │ │ subs r0, r0, r0 │ │ strh r0, [r4, #2] │ │ - b.n a9736 │ │ + b.n a9742 │ │ lsls r7, r3, #2 │ │ and.w r0, r0, r7 │ │ - b.n a9c46 │ │ + b.n a9c52 │ │ movs r1, r0 │ │ - b.n aa31a │ │ + b.n aa326 │ │ lsls r2, r5, #1 │ │ lsrs r0, r0, #8 │ │ lsrs r0, r5, #32 │ │ - b.n a9f70 │ │ + b.n a9f7c │ │ lsls r6, r5, #2 │ │ subs r0, r0, r0 │ │ ldrh r0, [r7, #44] @ 0x2c │ │ - b.n a9fd2 │ │ + b.n a9fde │ │ lsls r6, r2, #2 │ │ and.w r0, r0, r7 │ │ - b.n a9c62 │ │ + b.n a9c6e │ │ movs r1, r0 │ │ - b.n aa336 │ │ + b.n aa342 │ │ lsls r6, r4, #1 │ │ lsrs r0, r0, #8 │ │ lsrs r1, r0, #16 │ │ - b.n aa10e │ │ + b.n aa11a │ │ movs r0, r0 │ │ - b.n aa210 │ │ + b.n aa21c │ │ lsls r4, r4, #1 │ │ subs r2, #0 │ │ asrs r0, r0, #22 │ │ - b.n a97a8 │ │ + b.n a97b4 │ │ str r0, [sp, #88] @ 0x58 │ │ - b.n aa3ae │ │ + b.n aa3ba │ │ movs r6, r2 │ │ - b.n aa3b2 │ │ + b.n aa3be │ │ movs r1, #113 @ 0x71 │ │ - b.n aa276 │ │ + b.n aa282 │ │ asrs r1, r0, #32 │ │ - b.n a9d98 │ │ + b.n a9da4 │ │ lsls r7, r2, #3 │ │ and.w r0, r0, r7 │ │ - b.n a9c92 │ │ + b.n a9c9e │ │ movs r1, r0 │ │ - b.n aa366 │ │ + b.n aa372 │ │ lsls r5, r3, #1 │ │ lsrs r0, r0, #8 │ │ lsrs r0, r5, #32 │ │ - b.n a9fbc │ │ + b.n a9fc8 │ │ lsls r3, r3, #2 │ │ subs r0, r0, r0 │ │ ldrh r6, [r7, #44] @ 0x2c │ │ - b.n aa01e │ │ + b.n aa02a │ │ lsls r3, r0, #2 │ │ and.w r0, r0, r7 │ │ - b.n a9cae │ │ + b.n a9cba │ │ movs r1, r0 │ │ - b.n aa382 │ │ + b.n aa38e │ │ lsls r1, r3, #1 │ │ lsrs r0, r0, #8 │ │ lsls r2, r0, #4 │ │ - b.n aa15a │ │ + b.n aa166 │ │ movs r0, r0 │ │ - b.n aa25c │ │ + b.n aa268 │ │ lsls r7, r2, #1 │ │ subs r2, #0 │ │ asrs r4, r0, #20 │ │ - b.n a97f4 │ │ + b.n a9800 │ │ str r0, [sp, #88] @ 0x58 │ │ - b.n aa3fa │ │ + b.n aa406 │ │ movs r6, r2 │ │ - b.n aa3fe │ │ + b.n aa40a │ │ movs r0, #255 @ 0xff │ │ - b.n aa402 │ │ + b.n aa40e │ │ asrs r1, r0, #32 │ │ - b.n a9de4 │ │ + b.n a9df0 │ │ lsls r4, r0, #3 │ │ and.w r0, r0, r7 │ │ - b.n a9cde │ │ + b.n a9cea │ │ asrs r0, r0, #32 │ │ - b.n aa492 │ │ + b.n aa49e │ │ asrs r1, r0, #32 │ │ - b.n a9d76 │ │ + b.n a9d82 │ │ asrs r7, r0, #32 │ │ asrs r0, r4, #6 │ │ movs r1, r0 │ │ - b.n aa3be │ │ + b.n aa3ca │ │ strh r2, [r0, #0] │ │ lsls r0, r0, #12 │ │ movs r0, r0 │ │ - b.n aa388 │ │ + b.n aa394 │ │ lsls r5, r0, #2 │ │ subs r0, r0, r0 │ │ strh r0, [r2, #6] │ │ - b.n a97f6 │ │ + b.n a9802 │ │ lsls r7, r5, #1 │ │ and.w r0, r0, r7 │ │ - b.n a9d06 │ │ + b.n a9d12 │ │ movs r1, r0 │ │ - b.n aa3da │ │ + b.n aa3e6 │ │ lsls r0, r4, #1 │ │ lsrs r0, r0, #8 │ │ lsrs r0, r5, #32 │ │ - b.n aa030 │ │ + b.n aa03c │ │ lsls r6, r7, #1 │ │ subs r0, r0, r0 │ │ ldrh r2, [r7, #44] @ 0x2c │ │ - b.n aa092 │ │ + b.n aa09e │ │ lsls r6, r4, #1 │ │ and.w r0, r0, r7 │ │ - b.n a9d22 │ │ + b.n a9d2e │ │ movs r1, r0 │ │ - b.n aa3f6 │ │ + b.n aa402 │ │ lsls r6, r3, #1 │ │ lsrs r0, r0, #8 │ │ lsrs r1, r0, #16 │ │ - b.n aa1ce │ │ + b.n aa1da │ │ movs r0, r0 │ │ - b.n aa2d0 │ │ + b.n aa2dc │ │ lsls r4, r3, #1 │ │ subs r2, #0 │ │ asrs r0, r7, #18 │ │ - b.n a9868 │ │ + b.n a9874 │ │ str r0, [sp, #88] @ 0x58 │ │ - b.n aa46e │ │ + b.n aa47a │ │ movs r6, r2 │ │ - b.n aa472 │ │ + b.n aa47e │ │ movs r1, #98 @ 0x62 │ │ - b.n aa336 │ │ + b.n aa342 │ │ asrs r1, r0, #32 │ │ - b.n a9e58 │ │ + b.n a9e64 │ │ lsls r7, r4, #2 │ │ and.w r0, r0, r7 │ │ - b.n a9d52 │ │ + b.n a9d5e │ │ movs r1, r0 │ │ - b.n aa426 │ │ + b.n aa432 │ │ lsls r5, r2, #1 │ │ lsrs r0, r0, #8 │ │ lsrs r0, r5, #32 │ │ - b.n aa07c │ │ + b.n aa088 │ │ lsls r3, r5, #1 │ │ subs r0, r0, r0 │ │ ldrh r4, [r7, #44] @ 0x2c │ │ - b.n aa0de │ │ + b.n aa0ea │ │ lsls r3, r2, #1 │ │ and.w r0, r0, r8 │ │ - b.n a9886 │ │ + b.n a9892 │ │ movs r0, r0 │ │ - b.n aa402 │ │ + b.n aa40e │ │ lsls r6, r2, #1 │ │ lsrs r0, r0, #8 │ │ lsls r4, r5, #3 │ │ - b.n a9892 │ │ + b.n a989e │ │ asrs r4, r3, #1 │ │ - b.n a9916 │ │ + b.n a9922 │ │ movs r0, r0 │ │ - b.n aa412 │ │ + b.n aa41e │ │ lsls r7, r7, #17 │ │ lsls r0, r4, #14 │ │ lsls r0, r6, #4 │ │ - b.n aa0ba │ │ + b.n aa0c6 │ │ lsls r1, r2, #1 │ │ @ instruction: 0xea009000 │ │ - b.n aa4c2 │ │ + b.n aa4ce │ │ str r0, [sp, #852] @ 0x354 │ │ - b.n a990e │ │ + b.n a991a │ │ lsls r2, r1, #1 │ │ and.w r0, r0, r0, asr #3 │ │ - b.n a9936 │ │ + b.n a9942 │ │ str r0, [sp, #0] │ │ - b.n aa4d2 │ │ + b.n aa4de │ │ asrs r4, r7, #3 │ │ - b.n a993e │ │ + b.n a994a │ │ lsls r3, r7, #3 │ │ - b.n aa19a │ │ + b.n aa1a6 │ │ lsls r0, r4, #3 │ │ - b.n a9926 │ │ + b.n a9932 │ │ lsrs r2, r1, #32 │ │ - b.n aa1ac │ │ + b.n aa1b8 │ │ lsls r2, r0, #28 │ │ - b.n aa1e6 │ │ + b.n aa1f2 │ │ movs r1, r0 │ │ - b.n aa0aa │ │ + b.n aa0b6 │ │ lsrs r0, r2, #28 │ │ - b.n aa08c │ │ + b.n aa098 │ │ lsls r0, r4, #10 │ │ - b.n aa0f2 │ │ + b.n aa0fe │ │ lsls r4, r2, #3 │ │ - b.n a993e │ │ + b.n a994a │ │ movs r6, r7 │ │ @ instruction: 0xea008555 │ │ - b.n aa3c8 │ │ + b.n aa3d4 │ │ movs r0, r1 │ │ - b.n a98ea │ │ + b.n a98f6 │ │ str r0, [sp, #0] │ │ - b.n aa506 │ │ + b.n aa512 │ │ strh r4, [r1, #6] │ │ - b.n a98d2 │ │ + b.n a98de │ │ movs r4, r2 │ │ - b.n aa24e │ │ + b.n aa25a │ │ lsrs r0, r2, #2 │ │ - b.n a9dd4 │ │ + b.n a9de0 │ │ lsrs r1, r4, #32 │ │ - b.n a9e56 │ │ + b.n a9e62 │ │ lsls r6, r7, #22 │ │ - b.n aa162 │ │ + b.n aa16e │ │ movs r5, r6 │ │ @ instruction: 0xea008008 │ │ - b.n aa522 │ │ + b.n aa52e │ │ strh r1, [r1, #6] │ │ - b.n a996e │ │ + b.n a997a │ │ movs r1, r6 │ │ and.w pc, r0, pc, ror #3 │ │ - b.n aa40c │ │ + b.n aa418 │ │ lsrs r0, r7, #22 │ │ - b.n aa17a │ │ + b.n aa186 │ │ movs r4, r5 │ │ @ instruction: 0xea008040 │ │ - b.n aa53a │ │ + b.n aa546 │ │ strh r0, [r1, #6] │ │ - b.n a9986 │ │ + b.n a9992 │ │ movs r3, r5 │ │ and.w sl, r0, r1, lsl #3 │ │ - b.n aa406 │ │ + b.n aa412 │ │ lsrs r6, r7, #22 │ │ - b.n aa192 │ │ + b.n aa19e │ │ movs r6, r4 │ │ @ instruction: 0xea008fff │ │ - b.n aa552 │ │ + b.n aa55e │ │ lsls r0, r6, #2 │ │ - b.n a993e │ │ + b.n a994a │ │ str r0, [sp, #0] │ │ - b.n aa55a │ │ + b.n aa566 │ │ movs r0, r1 │ │ - b.n aa0be │ │ + b.n aa0ca │ │ movs r4, r4 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n aa4da │ │ + b.n aa4e6 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n aa16e │ │ + b.n aa17a │ │ asrs r0, r0, #32 │ │ - b.n aa572 │ │ + b.n aa57e │ │ stmia r6!, {r2, r3} │ │ @ instruction: 0xebff0000 │ │ - b.n aa4da │ │ + b.n aa4e6 │ │ lsls r6, r1, #3 │ │ subs r0, r0, r0 │ │ lsls r0, r3, #4 │ │ - b.n a996a │ │ + b.n a9976 │ │ str r0, [r0, r0] │ │ - b.n aa586 │ │ + b.n aa592 │ │ strh r0, [r6, #4] │ │ - b.n a9952 │ │ + b.n a995e │ │ movs r0, r1 │ │ - b.n aa0ee │ │ + b.n aa0fa │ │ mcr2 10, 4, r9, cr14, cr15, {7} @ │ │ lsls r4, r3, #4 │ │ - b.n a997e │ │ + b.n a998a │ │ asrs r4, r2, #32 │ │ - b.n a997a │ │ + b.n a9986 │ │ movs r4, r0 │ │ - b.n aa2de │ │ + b.n aa2ea │ │ asrs r4, r3, #4 │ │ - b.n a996a │ │ - rev16 r6, r2 │ │ + b.n a9976 │ │ + rev16 r7, r2 │ │ add.w r1, r0, r8, lsr #4 │ │ - b.n a9992 │ │ + b.n a999e │ │ lsls r0, r6, #2 │ │ - b.n a9996 │ │ + b.n a99a2 │ │ asrs r1, r0, #32 │ │ - b.n aa2f4 │ │ + b.n aa300 │ │ asrs r0, r3, #4 │ │ - b.n a997e │ │ + b.n a998a │ │ movs r0, r0 │ │ - b.n aa11c │ │ + b.n aa128 │ │ @ instruction: 0xfff48aff │ │ mcr2 10, 4, lr, cr2, cr15, {7} @ │ │ str r0, [sp, #0] │ │ - b.n aa5c6 │ │ + b.n aa5d2 │ │ movs r4, r0 │ │ - b.n aa1ca │ │ + b.n aa1d6 │ │ ldr r5, [sp, #744] @ 0x2e8 │ │ - b.n aa216 │ │ + b.n aa222 │ │ lsls r7, r4, #4 │ │ add.w r0, r0, r7 │ │ @ instruction: 0xea008008 │ │ - b.n aa5da │ │ + b.n aa5e6 │ │ strh r2, [r1, #6] │ │ - b.n a9a26 │ │ + b.n a9a32 │ │ movs r3, r0 │ │ and.w fp, r0, r5, lsl #2 │ │ - b.n aa4b2 │ │ + b.n aa4be │ │ lsrs r4, r7, #22 │ │ - b.n aa232 │ │ + b.n aa23e │ │ movs r4, r0 │ │ - b.n aa1ee │ │ + b.n aa1fa │ │ lsls r7, r3, #4 │ │ @ instruction: 0xeb009000 │ │ - b.n aa5f6 │ │ + b.n aa602 │ │ movs r1, r1 │ │ - b.n aa1fa │ │ - beq.n a9ef4 │ │ - b.n aa354 │ │ + b.n aa206 │ │ + beq.n a9f00 │ │ + b.n aa360 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r1, r2, r3, r4, r5, r6, fp} │ │ - b.n aa606 │ │ + b.n aa612 │ │ movs r7, r0 │ │ - b.n aa576 │ │ + b.n aa582 │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, r0] │ │ - b.n aa612 │ │ + b.n aa61e │ │ movs r0, r1 │ │ - b.n aa582 │ │ + b.n aa58e │ │ mcr2 10, 3, r1, cr12, cr15, {7} @ │ │ asrs r4, r1, #32 │ │ - b.n a9f2e │ │ + b.n a9f3a │ │ movs r0, #12 │ │ - b.n a9f30 │ │ + b.n a9f3c │ │ asrs r2, r0, #32 │ │ - b.n aa208 │ │ + b.n aa214 │ │ movs r1, r3 │ │ lsrs r0, r0, #8 │ │ movs r0, r1 │ │ - b.n aa18e │ │ + b.n aa19a │ │ strh r4, [r7, #4] │ │ - b.n a99fa │ │ + b.n a9a06 │ │ mcr2 10, 3, r2, cr5, cr15, {7} @ │ │ lsls r0, r4, #1 │ │ - b.n aa59a │ │ + b.n aa5a6 │ │ lsls r0, r4, #1 │ │ str r3, [sp, #640] @ 0x280 │ │ movs r4, r2 │ │ and.w r0, r0, r6, lsr #20 │ │ - b.n aa646 │ │ + b.n aa652 │ │ asrs r4, r6, #10 │ │ - b.n a9a48 │ │ + b.n a9a54 │ │ movs r5, r0 │ │ - b.n aa24e │ │ + b.n aa25a │ │ movs r1, #217 @ 0xd9 │ │ - b.n aa512 │ │ + b.n aa51e │ │ asrs r1, r0, #32 │ │ - b.n aa034 │ │ - movs r0, #229 @ 0xe5 │ │ + b.n aa040 │ │ + movs r0, #230 @ 0xe6 │ │ @ instruction: 0xeb009005 │ │ - b.n aa25e │ │ + b.n aa26a │ │ @ instruction: 0xffe4eaff │ │ asrs r4, r1, #32 │ │ - b.n a9f76 │ │ + b.n a9f82 │ │ movs r0, #12 │ │ - b.n a9f78 │ │ + b.n a9f84 │ │ lsls r0, r4, #3 │ │ - b.n a9ad6 │ │ + b.n a9ae2 │ │ asrs r2, r0, #32 │ │ - b.n aa254 │ │ + b.n aa260 │ │ strh r0, [r7, #4] │ │ asrs r4, r0, #22 │ │ movs r1, r0 │ │ asrs r0, r0, #14 │ │ lsls r6, r7, #3 │ │ lsls r0, r0, #8 │ │ lsls r0, r4, #3 │ │ - b.n a9aca │ │ + b.n a9ad6 │ │ movs r4, r0 │ │ - b.n aa286 │ │ + b.n aa292 │ │ lsls r4, r1, #3 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n aa68e │ │ + b.n aa69a │ │ movs r1, r0 │ │ and.w pc, r0, pc, ror #3 │ │ - b.n aa696 │ │ + b.n aa6a2 │ │ lsls r4, r7, #2 │ │ - b.n a9a62 │ │ + b.n a9a6e │ │ movs r0, r0 │ │ - b.n aa612 │ │ + b.n aa61e │ │ str r0, [sp, #0] │ │ - b.n aa6a2 │ │ + b.n aa6ae │ │ mcr2 10, 2, r1, cr11, cr15, {7} @ │ │ @ instruction: 0xffd2eaff │ │ asrs r4, r0, #10 │ │ - b.n a9aac │ │ + b.n a9ab8 │ │ str r0, [sp, #88] @ 0x58 │ │ - b.n aa6b2 │ │ + b.n aa6be │ │ movs r6, r2 │ │ - b.n aa6b6 │ │ + b.n aa6c2 │ │ cmp r7, #117 @ 0x75 │ │ - b.n aa6ba │ │ + b.n aa6c6 │ │ asrs r1, r0, #32 │ │ - b.n aa09c │ │ + b.n aa0a8 │ │ movs r6, r2 │ │ and.w r0, r0, r0, asr #3 │ │ - b.n a9b2e │ │ + b.n a9b3a │ │ lsls r5, r7, #3 │ │ - b.n aa38a │ │ + b.n aa396 │ │ lsls r0, r4, #3 │ │ - b.n a9b16 │ │ + b.n a9b22 │ │ movs r4, r0 │ │ - b.n aa2d2 │ │ + b.n aa2de │ │ lsls r0, r3, #2 │ │ add.w r0, r0, r4, ror #2 │ │ - b.n a9aa2 │ │ + b.n a9aae │ │ @ instruction: 0xffc4eaff │ │ asrs r4, r5, #8 │ │ - b.n a9ae0 │ │ + b.n a9aec │ │ str r0, [sp, #4] │ │ - b.n aa6e6 │ │ + b.n aa6f2 │ │ movs r1, r0 │ │ - b.n aa6ea │ │ + b.n aa6f6 │ │ movs r1, #43 @ 0x2b │ │ - b.n aa5ae │ │ + b.n aa5ba │ │ asrs r1, r0, #32 │ │ - b.n aa0d0 │ │ + b.n aa0dc │ │ movs r1, r1 │ │ @ instruction: 0xea009016 │ │ - b.n aa6fa │ │ + b.n aa706 │ │ movs r3, r0 │ │ @ instruction: 0xea00992c │ │ - b.n aa5d2 │ │ + b.n aa5de │ │ movs r0, r0 │ │ @ instruction: 0xea0097b5 │ │ - b.n aa5da │ │ + b.n aa5e6 │ │ ldr r7, [sp, #1020] @ 0x3fc │ │ - b.n aa66c │ │ + b.n aa678 │ │ asrs r0, r7, #6 │ │ - b.n a9b10 │ │ + b.n a9b1c │ │ movs r1, r1 │ │ - b.n aa316 │ │ + b.n aa322 │ │ movs r0, #184 @ 0xb8 │ │ - b.n aa71a │ │ + b.n aa726 │ │ asrs r1, r0, #32 │ │ - b.n aa0fc │ │ - movs r0, #179 @ 0xb3 │ │ + b.n aa108 │ │ + movs r0, #180 @ 0xb4 │ │ @ instruction: 0xeb00ffb3 │ │ @ instruction: 0xeaff11ec │ │ - b.n a9b28 │ │ + b.n a9b34 │ │ str r0, [sp, #52] @ 0x34 │ │ - b.n aa72e │ │ + b.n aa73a │ │ movs r5, r1 │ │ - b.n aa732 │ │ + b.n aa73e │ │ movs r1, #55 @ 0x37 │ │ - b.n aa5f6 │ │ + b.n aa602 │ │ asrs r1, r0, #32 │ │ - b.n aa118 │ │ + b.n aa124 │ │ @ instruction: 0xfff7eaff │ │ asrs r0, r2, #7 │ │ - b.n a9b40 │ │ + b.n a9b4c │ │ str r0, [sp, #88] @ 0x58 │ │ - b.n aa746 │ │ + b.n aa752 │ │ movs r6, r2 │ │ - b.n aa74a │ │ + b.n aa756 │ │ movs r1, #53 @ 0x35 │ │ - b.n aa60e │ │ + b.n aa61a │ │ asrs r1, r0, #32 │ │ - b.n aa130 │ │ + b.n aa13c │ │ @ instruction: 0xfff1eaff │ │ asrs r4, r1, #7 │ │ - b.n a9b58 │ │ + b.n a9b64 │ │ str r0, [sp, #88] @ 0x58 │ │ - b.n aa75e │ │ + b.n aa76a │ │ movs r6, r2 │ │ - b.n aa762 │ │ + b.n aa76e │ │ movs r1, #105 @ 0x69 │ │ - b.n aa626 │ │ + b.n aa632 │ │ asrs r1, r0, #32 │ │ - b.n aa148 │ │ + b.n aa154 │ │ @ instruction: 0xffebeaff │ │ asrs r4, r3, #5 │ │ - b.n a9b70 │ │ + b.n a9b7c │ │ str r0, [sp, #52] @ 0x34 │ │ - b.n aa776 │ │ + b.n aa782 │ │ movs r5, r1 │ │ - b.n aa77a │ │ + b.n aa786 │ │ movs r0, #193 @ 0xc1 │ │ - b.n aa77e │ │ + b.n aa78a │ │ asrs r1, r0, #32 │ │ - b.n aa160 │ │ + b.n aa16c │ │ @ instruction: 0xffe5eaff │ │ asrs r4, r7, #5 │ │ - b.n a9b88 │ │ + b.n a9b94 │ │ str r0, [sp, #88] @ 0x58 │ │ - b.n aa78e │ │ + b.n aa79a │ │ movs r6, r2 │ │ - b.n aa792 │ │ + b.n aa79e │ │ movs r1, #37 @ 0x25 │ │ - b.n aa656 │ │ + b.n aa662 │ │ asrs r1, r0, #32 │ │ - b.n aa178 │ │ + b.n aa184 │ │ @ instruction: 0xffdfeaff │ │ asrs r0, r7, #4 │ │ - b.n a9ba0 │ │ + b.n a9bac │ │ str r0, [sp, #52] @ 0x34 │ │ - b.n aa7a6 │ │ + b.n aa7b2 │ │ movs r5, r1 │ │ - b.n aa7aa │ │ + b.n aa7b6 │ │ movs r0, #214 @ 0xd6 │ │ - b.n aa7ae │ │ + b.n aa7ba │ │ asrs r1, r0, #32 │ │ - b.n aa190 │ │ + b.n aa19c │ │ @ instruction: 0xffd9eaff │ │ asrs r4, r5, #4 │ │ - b.n a9bb8 │ │ + b.n a9bc4 │ │ str r0, [sp, #88] @ 0x58 │ │ - b.n aa7be │ │ + b.n aa7ca │ │ movs r6, r2 │ │ - b.n aa7c2 │ │ + b.n aa7ce │ │ movs r0, #235 @ 0xeb │ │ - b.n aa7c6 │ │ + b.n aa7d2 │ │ asrs r1, r0, #32 │ │ - b.n aa1a8 │ │ + b.n aa1b4 │ │ @ instruction: 0xffd3eaff │ │ asrs r4, r3, #4 │ │ - b.n a9bd0 │ │ + b.n a9bdc │ │ str r0, [sp, #88] @ 0x58 │ │ - b.n aa7d6 │ │ + b.n aa7e2 │ │ movs r6, r2 │ │ - b.n aa7da │ │ + b.n aa7e6 │ │ movs r0, #245 @ 0xf5 │ │ - b.n aa7de │ │ + b.n aa7ea │ │ asrs r1, r0, #32 │ │ - b.n aa1c0 │ │ + b.n aa1cc │ │ @ instruction: 0xffcdeaff │ │ asrs r0, r5, #3 │ │ - b.n a9be8 │ │ + b.n a9bf4 │ │ str r0, [sp, #4] │ │ - b.n aa7ee │ │ + b.n aa7fa │ │ movs r1, r0 │ │ - b.n aa7f2 │ │ + b.n aa7fe │ │ movs r0, #195 @ 0xc3 │ │ - b.n aa7f6 │ │ + b.n aa802 │ │ asrs r1, r0, #32 │ │ - b.n aa1d8 │ │ + b.n aa1e4 │ │ @ instruction: 0xffc7eaff │ │ asrs r0, r1, #4 │ │ - b.n a9c00 │ │ + b.n a9c0c │ │ str r0, [sp, #52] @ 0x34 │ │ - b.n aa806 │ │ + b.n aa812 │ │ movs r5, r1 │ │ - b.n aa80a │ │ + b.n aa816 │ │ movs r1, #39 @ 0x27 │ │ - b.n aa6ce │ │ + b.n aa6da │ │ asrs r1, r0, #32 │ │ - b.n aa1f0 │ │ + b.n aa1fc │ │ @ instruction: 0xffc1eaff │ │ asrs r4, r0, #3 │ │ - b.n a9c18 │ │ + b.n a9c24 │ │ str r0, [sp, #4] │ │ - b.n aa81e │ │ + b.n aa82a │ │ movs r1, r0 │ │ - b.n aa822 │ │ + b.n aa82e │ │ movs r0, #216 @ 0xd8 │ │ - b.n aa826 │ │ + b.n aa832 │ │ asrs r1, r0, #32 │ │ - b.n aa208 │ │ + b.n aa214 │ │ @ instruction: 0xffbbeaff │ │ asrs r0, r7, #2 │ │ - b.n a9c30 │ │ + b.n a9c3c │ │ str r0, [sp, #4] │ │ - b.n aa836 │ │ + b.n aa842 │ │ movs r1, r0 │ │ - b.n aa83a │ │ + b.n aa846 │ │ movs r0, #237 @ 0xed │ │ - b.n aa83e │ │ + b.n aa84a │ │ asrs r1, r0, #32 │ │ - b.n aa220 │ │ + b.n aa22c │ │ @ instruction: 0xffb5eaff │ │ asrs r0, r5, #2 │ │ - b.n a9c48 │ │ + b.n a9c54 │ │ str r0, [sp, #4] │ │ - b.n aa84e │ │ + b.n aa85a │ │ movs r1, r0 │ │ - b.n aa852 │ │ + b.n aa85e │ │ movs r0, #247 @ 0xf7 │ │ - b.n aa856 │ │ + b.n aa862 │ │ asrs r1, r0, #32 │ │ - b.n aa238 │ │ + b.n aa244 │ │ @ instruction: 0xffafeaff │ │ asrs r0, r7, #2 │ │ - b.n a9c60 │ │ + b.n a9c6c │ │ str r0, [sp, #0] │ │ - b.n aa466 │ │ + b.n aa472 │ │ movs r1, #59 @ 0x3b │ │ - b.n aa72a │ │ + b.n aa736 │ │ asrs r1, r0, #32 │ │ - b.n aa24c │ │ + b.n aa258 │ │ @ instruction: 0xffaaeaff │ │ asrs r0, r4, #1 │ │ - b.n a9c74 │ │ + b.n a9c80 │ │ str r0, [sp, #88] @ 0x58 │ │ - b.n aa87a │ │ + b.n aa886 │ │ movs r6, r2 │ │ - b.n aa87e │ │ + b.n aa88a │ │ movs r0, #197 @ 0xc5 │ │ - b.n aa882 │ │ + b.n aa88e │ │ asrs r1, r0, #32 │ │ - b.n aa264 │ │ + b.n aa270 │ │ @ instruction: 0xffa4eaff │ │ asrs r4, r2, #1 │ │ - b.n a9c8c │ │ + b.n a9c98 │ │ str r0, [sp, #88] @ 0x58 │ │ - b.n aa892 │ │ + b.n aa89e │ │ movs r6, r2 │ │ - b.n aa896 │ │ + b.n aa8a2 │ │ movs r0, #218 @ 0xda │ │ - b.n aa89a │ │ + b.n aa8a6 │ │ asrs r1, r0, #32 │ │ - b.n aa27c │ │ + b.n aa288 │ │ @ instruction: 0xff9eeaff │ │ asrs r4, r3, #1 │ │ - b.n a9ca4 │ │ + b.n a9cb0 │ │ str r0, [sp, #88] @ 0x58 │ │ - b.n aa8aa │ │ + b.n aa8b6 │ │ movs r6, r2 │ │ - b.n aa8ae │ │ + b.n aa8ba │ │ movs r1, #26 │ │ - b.n aa772 │ │ + b.n aa77e │ │ asrs r1, r0, #32 │ │ - b.n aa294 │ │ + b.n aa2a0 │ │ @ instruction: 0xff98eaff │ │ asrs r0, r7, #32 │ │ - b.n a9cbc │ │ + b.n a9cc8 │ │ str r0, [sp, #0] │ │ - b.n aa4c2 │ │ + b.n aa4ce │ │ cmp r7, #65 @ 0x41 │ │ - b.n aa8c6 │ │ + b.n aa8d2 │ │ asrs r1, r0, #32 │ │ - b.n aa2a8 │ │ + b.n aa2b4 │ │ @ instruction: 0xff93eaff │ │ - ldrsb r0, [r3, r1] │ │ - vsli.64 , q10, #54 @ 0x36 │ │ - vsli.32 , q14, #22 │ │ - vsri.64 , q8, #10 │ │ - vrintz.f16 , q2 │ │ - vrinta.f16 , q6 │ │ - vsri.64 , q4, #10 │ │ - vrintz.f16 d21, d28 │ │ - vsli.32 d21, d20, #22 │ │ - vsli.64 d21, d4, #54 @ 0x36 │ │ - vsli.32 d21, d12, #22 │ │ - vrintx.f16 d21, d28 │ │ - vqrshrn.u64 d21, q8, #10 │ │ - vcvt.f32.f16 , d16 │ │ - vrintx.f16 , q0 │ │ - vsli.64 , q6, #54 @ 0x36 │ │ - vrinta.f16 , q10 │ │ - vrintm.f16 d21, d4 │ │ - vcvt.f16.f32 d21, q10 │ │ - vqshlu.s32 d21, d28, #22 │ │ - vrinta.f16 d21, d8 │ │ - vcvt.f16.u16 , q4, #10 │ │ - @ instruction: 0xfff658fc │ │ - vcvt.f16.f32 d21, q6 │ │ - @ instruction: 0xfff659bc │ │ - vmull.u , d22, d8 │ │ - vqshlu.s64 d21, d24, #54 @ 0x36 │ │ + ldrsb r2, [r4, r3] │ │ + vqshlu.s32 , q15, #22 │ │ + vcvt.f16.f32 d21, q3 │ │ + vsli.32 , q13, #22 │ │ + vcvt.bf16.f32 d21, q7 │ │ + vsli.64 , q3, #54 @ 0x36 │ │ + vrinta.f16 , q9 │ │ + vqshlu.s32 d21, d22, #22 │ │ + vsli.64 d21, d30, #54 @ 0x36 │ │ + vqshlu.s32 d21, d14, #22 │ │ + vrintz.f16 d21, d22 │ │ + vsli.32 d21, d22, #22 │ │ + @ instruction: 0xfff659fa │ │ + vrintp.f16 d21, d26 │ │ + vrinta.f16 , q5 │ │ + vcvt.bf16.f32 d21, q11 │ │ + vrintz.f16 , q15 │ │ + vcvt.f32.f16 , d14 │ │ + vrintm.f16 d21, d30 │ │ + vrintm.f16 , q3 │ │ + vsli.64 d21, d2, #54 @ 0x36 │ │ + vqdmulh.s , q11, d18[0] │ │ + vtbl.8 d21, {d22-d23}, d6 │ │ + vqshlu.s64 d21, d6, #54 @ 0x36 │ │ + vtbx.8 d21, {d6-d8}, d6 │ │ + vcvt.u16.f16 d21, d2, #10 │ │ + vrint?.f16 , q1 │ │ @ instruction: 0xfff64ab0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n aa71c │ │ + b.n aa728 │ │ asrs r0, r6, #3 │ │ - b.n a9d26 │ │ + b.n a9d32 │ │ cmp r2, #171 @ 0xab │ │ - b.n aa81e │ │ + b.n aa82a │ │ cmp r2, #170 @ 0xaa │ │ - b.n aa8a2 │ │ + b.n aa8ae │ │ lsrs r0, r0 │ │ - b.n a9d32 │ │ + b.n a9d3e │ │ str r0, [sp, #784] @ 0x310 │ │ - b.n a9d36 │ │ + b.n a9d42 │ │ subs r7, #255 @ 0xff │ │ - b.n aa95a │ │ + b.n aa966 │ │ asrs r1, r2, #10 │ │ - b.n aa322 │ │ + b.n aa32e │ │ asrs r4, r2, #2 │ │ - b.n a9d42 │ │ + b.n a9d4e │ │ lsls r4, r3, #1 │ │ - b.n a9dc6 │ │ + b.n a9dd2 │ │ str r1, [r0, r2] │ │ - b.n aa56a │ │ + b.n aa576 │ │ lsrs r7, r7, #31 │ │ - b.n aa8d8 │ │ + b.n aa8e4 │ │ adds r0, #129 @ 0x81 │ │ strh r0, [r4, #12] │ │ strb r1, [r0, #24] │ │ - b.n aa6de │ │ + b.n aa6ea │ │ asrs r2, r4, #2 │ │ - b.n aa57a │ │ + b.n aa586 │ │ str r0, [r0, r0] │ │ - b.n aa97e │ │ + b.n aa98a │ │ strb r0, [r0, #0] │ │ - b.n aa7f4 │ │ + b.n aa800 │ │ movs r0, #49 @ 0x31 │ │ - b.n aa30c │ │ + b.n aa318 │ │ str r1, [r0, r0] │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n aa8f8 │ │ + b.n aa904 │ │ ldrsb r1, [r0, r0] │ │ asrs r4, r4, #9 │ │ movs r1, r6 │ │ - b.n aa4fc │ │ + b.n aa508 │ │ cmp r2, #34 @ 0x22 │ │ - b.n aa59a │ │ + b.n aa5a6 │ │ movs r3, r2 │ │ - b.n aa860 │ │ + b.n aa86c │ │ adds r5, #146 @ 0x92 │ │ adds r0, #35 @ 0x23 │ │ asrs r2, r0, #32 │ │ - b.n aaa26 │ │ + b.n aaa32 │ │ lsls r3, r0, #6 │ │ - b.n aa36a │ │ + b.n aa376 │ │ movs r7, r3 │ │ - b.n aa204 │ │ + b.n aa210 │ │ movs r0, r1 │ │ - b.n aa6f2 │ │ + b.n aa6fe │ │ lsls r0, r4, #4 │ │ - b.n aa378 │ │ + b.n aa384 │ │ lsls r0, r4, #2 │ │ - b.n aa5ba │ │ + b.n aa5c6 │ │ ldrh r0, [r6, #20] │ │ ldmia.w sp!, {r5, r6, r7, ip} │ │ - b.n a9e22 │ │ + b.n a9e2e │ │ movs r1, r0 │ │ - b.n aa8a8 │ │ + b.n aa8b4 │ │ movs r0, r4 │ │ lsrs r0, r0, #8 │ │ asrs r0, r1, #32 │ │ - b.n a9dae │ │ + b.n a9dba │ │ movs r0, r0 │ │ - b.n aa934 │ │ + b.n aa940 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r5, #3 │ │ - b.n a9dba │ │ + b.n a9dc6 │ │ adds r0, #2 │ │ - b.n aaa5e │ │ + b.n aaa6a │ │ movs r0, #92 @ 0x5c │ │ - b.n a9e42 │ │ + b.n a9e4e │ │ movs r0, r0 │ │ - b.n aa948 │ │ + b.n aa954 │ │ asrs r7, r7, #17 │ │ lsls r0, r4, #14 │ │ movs r2, #49 @ 0x31 │ │ - b.n aa3b4 │ │ + b.n aa3c0 │ │ asrs r0, r7, #2 │ │ - b.n a9dd2 │ │ + b.n a9dde │ │ movs r2, r0 │ │ - b.n aa558 │ │ + b.n aa564 │ │ movs r0, #1 │ │ adds r1, #160 @ 0xa0 │ │ movs r6, r0 │ │ ldr r2, [sp, #0] │ │ movs r7, r0 │ │ and.w pc, r0, sp, ror #11 │ │ - b.n aa8e4 │ │ + b.n aa8f0 │ │ movs r0, #126 @ 0x7e │ │ - b.n aa94a │ │ + b.n aa956 │ │ asrs r0, r7, #2 │ │ - b.n a9dee │ │ + b.n a9dfa │ │ movs r2, r0 │ │ - b.n aa574 │ │ + b.n aa580 │ │ movs r0, #1 │ │ adds r1, #160 @ 0xa0 │ │ movs r1, r0 │ │ ldrh r0, [r0, #16] │ │ lsls r7, r3, #1 │ │ - b.n aa982 │ │ + b.n aa98e │ │ movs r3, r0 │ │ ldrh r0, [r0, #16] │ │ lsls r0, r4, #1 │ │ - b.n aa98a │ │ + b.n aa996 │ │ movs r0, #96 @ 0x60 │ │ str r3, [sp, #640] @ 0x280 │ │ asrs r2, r0, #32 │ │ - b.n aa62e │ │ + b.n aa63a │ │ movs r0, #184 @ 0xb8 │ │ - b.n a9df2 │ │ + b.n a9dfe │ │ movs r0, #188 @ 0xbc │ │ - b.n a9e16 │ │ + b.n a9e22 │ │ lsrs r7, r7, #31 │ │ - b.n aa99e │ │ + b.n aa9aa │ │ movs r1, r0 │ │ strh r2, [r2, #10] │ │ asrs r4, r7, #2 │ │ strh r0, [r0, #44] @ 0x2c │ │ asrs r0, r0, #32 │ │ - b.n aaa46 │ │ + b.n aaa52 │ │ asrs r6, r2, #3 │ │ - b.n a9e8a │ │ + b.n a9e96 │ │ vrhadd.u16 d14, d14, d31 │ │ - ldr r4, [pc, #64] @ (aa350 ) │ │ + ldr r4, [pc, #64] @ (aa35c ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n aa830 │ │ + b.n aa83c │ │ ands r0, r0 │ │ - b.n aa65a │ │ - ldrb r4, [r4, r4] │ │ + b.n aa666 │ │ + ldrb r5, [r4, r4] │ │ add.w r0, r0, r0, lsl #4 │ │ - b.n aa662 │ │ + b.n aa66e │ │ movs r4, r0 │ │ - b.n aa666 │ │ + b.n aa672 │ │ asrs r0, r7, #2 │ │ - b.n a9e32 │ │ - ldr r4, [pc, #64] @ (aa36c ) │ │ + b.n a9e3e │ │ + ldr r4, [pc, #64] @ (aa378 ) │ │ ldmia.w sp!, {r0, r1, r2, r3, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ @ instruction: 0xeaff4c10 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n aa854 │ │ + b.n aa860 │ │ asrs r4, r7, #18 │ │ - b.n aa6de │ │ + b.n aa6ea │ │ cmp r7, #255 @ 0xff │ │ - b.n aa950 │ │ + b.n aa95c │ │ ldc 1, cr14, [r8, #832]! @ 0x340 │ │ adds r0, #8 │ │ - b.n aa7cc │ │ + b.n aa7d8 │ │ ldmia r5, {r1, r3, r4, r5, r7} │ │ - b.n aa6ee │ │ - ldr r5, [pc, #760] @ (aa648 ) │ │ - b.n aa6f2 │ │ + b.n aa6fa │ │ + ldr r5, [pc, #760] @ (aa654 ) │ │ + b.n aa6fe │ │ cmp r6, #147 @ 0x93 │ │ - b.n aa3b2 │ │ + b.n aa3be │ │ subs r5, #188 @ 0xbc │ │ - b.n aa6fa │ │ + b.n aa706 │ │ movs r1, #156 @ 0x9c │ │ - b.n aa3b6 │ │ + b.n aa3c2 │ │ movs r1, #147 @ 0x93 │ │ - b.n aa3a4 │ │ + b.n aa3b0 │ │ subs r0, #46 @ 0x2e │ │ - b.n aa6a6 │ │ - b.n aa378 │ │ - b.n a9e8a │ │ + b.n aa6b2 │ │ + b.n aa384 │ │ + b.n a9e96 │ │ movs r4, #147 @ 0x93 │ │ - b.n aa3b2 │ │ + b.n aa3be │ │ adds r5, #176 @ 0xb0 │ │ - b.n aa6f2 │ │ - ldr r0, [pc, #176] @ (aa424 ) │ │ - b.n aa6b6 │ │ + b.n aa6fe │ │ + ldr r0, [pc, #176] @ (aa430 ) │ │ + b.n aa6c2 │ │ cmp sl, r6 │ │ - b.n aa6fa │ │ + b.n aa706 │ │ adds r1, r4, r0 │ │ - b.n aa6be │ │ + b.n aa6ca │ │ asrs r4, r6, #22 │ │ - b.n aa702 │ │ + b.n aa70e │ │ subs r0, #34 @ 0x22 │ │ - b.n aa6c6 │ │ + b.n aa6d2 │ │ adds r5, #182 @ 0xb6 │ │ - b.n aa70a │ │ + b.n aa716 │ │ subs r0, #34 @ 0x22 │ │ - b.n aa496 │ │ + b.n aa4a2 │ │ movs r0, #20 │ │ - b.n aa82e │ │ + b.n aa83a │ │ movs r2, r0 │ │ - b.n aa63c │ │ + b.n aa648 │ │ movs r1, r0 │ │ - bge.n aa39a │ │ + bge.n aa3a6 │ │ movs r5, #180 @ 0xb4 │ │ - b.n aa71e │ │ + b.n aa72a │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r0, r1} │ │ - b.n aa648 │ │ + b.n aa654 │ │ movs r0, #3 │ │ - b.n aa6ea │ │ + b.n aa6f6 │ │ movs r5, #180 @ 0xb4 │ │ adds r1, #192 @ 0xc0 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r4, r5, r6, r7, fp, lr} │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n aa8d4 │ │ - beq.n aa3cc │ │ - b.n aa858 │ │ + b.n aa8e0 │ │ + beq.n aa3d8 │ │ + b.n aa864 │ │ str r0, [r0, r0] │ │ - b.n aa702 │ │ + b.n aa70e │ │ movs r5, r0 │ │ - b.n a9f66 │ │ + b.n a9f72 │ │ str r2, [r0, #0] │ │ - b.n aa70a │ │ + b.n aa716 │ │ ands r1, r0 │ │ - b.n aa70e │ │ + b.n aa71a │ │ movs r0, r0 │ │ - b.n aaa72 │ │ + b.n aaa7e │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ movs r5, r0 │ │ - b.n aa71a │ │ + b.n aa726 │ │ asrs r0, r0, #32 │ │ - b.n aab1e │ │ + b.n aab2a │ │ movs r0, #8 │ │ - b.n aab22 │ │ + b.n aab2e │ │ stc2 11, cr14, [ip], {255} @ 0xff @ │ │ movs r0, r0 │ │ - b.n aaa8a │ │ + b.n aaa96 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ - beq.n aa410 │ │ - b.n aa888 │ │ + beq.n aa41c │ │ + b.n aa894 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {ip} │ │ - b.n aab3a │ │ + b.n aab46 │ │ movs r0, r0 │ │ and.w r0, r0, r5, lsr #7 │ │ - b.n aa7ac │ │ + b.n aa7b8 │ │ movs r0, #28 │ │ - b.n aa910 │ │ + b.n aa91c │ │ strb r0, [r0, #0] │ │ - b.n aabca │ │ + b.n aabd6 │ │ lsls r1, r0, #4 │ │ - b.n aa332 │ │ + b.n aa33e │ │ adds r0, #188 @ 0xbc │ │ - b.n aa7b2 │ │ + b.n aa7be │ │ lsls r4, r7, #1 │ │ - b.n aa920 │ │ + b.n aa92c │ │ asrs r1, r0, #2 │ │ - b.n aa51a │ │ + b.n aa526 │ │ adds r0, #163 @ 0xa3 │ │ - b.n aa52c │ │ + b.n aa538 │ │ adds r0, #176 @ 0xb0 │ │ - b.n aa7a4 │ │ + b.n aa7b0 │ │ asrs r5, r2, #3 │ │ - b.n aa7d0 │ │ + b.n aa7dc │ │ adds r0, #6 │ │ - b.n a9fd4 │ │ + b.n a9fe0 │ │ movs r1, #1 │ │ - b.n aa352 │ │ + b.n aa35e │ │ strb r2, [r7, #2] │ │ - b.n aa7d6 │ │ + b.n aa7e2 │ │ adds r0, #7 │ │ - b.n aa47c │ │ + b.n aa488 │ │ movs r7, r4 │ │ - b.n aaa60 │ │ + b.n aaa6c │ │ lsls r5, r1, #1 │ │ subs r0, r0, r0 │ │ lsls r1, r0, #2 │ │ - b.n aa542 │ │ + b.n aa54e │ │ asrs r4, r2, #32 │ │ - b.n aa94a │ │ + b.n aa956 │ │ lsls r0, r6, #2 │ │ - b.n aa7ea │ │ + b.n aa7f6 │ │ lsls r0, r0, #2 │ │ - b.n aa550 │ │ + b.n aa55c │ │ lsls r0, r6, #2 │ │ - b.n aa7f2 │ │ + b.n aa7fe │ │ strb r0, [r0, #0] │ │ - b.n aa558 │ │ + b.n aa564 │ │ movs r4, r0 │ │ - b.n aa008 │ │ + b.n aa014 │ │ movs r4, r0 │ │ - b.n aaa7e │ │ + b.n aaa8a │ │ movs r3, r2 │ │ subs r0, r0, r0 │ │ movs r0, r3 │ │ - b.n a9f90 │ │ + b.n a9f9c │ │ movs r0, r0 │ │ - b.n aab0a │ │ + b.n aab16 │ │ subs r1, r2, #7 │ │ asrs r7, r1, #12 │ │ asrs r4, r6, #2 │ │ asrs r0, r0, #7 │ │ asrs r0, r0, #32 │ │ asrs r0, r4, #14 │ │ asrs r4, r7, #2 │ │ asrs r0, r0, #22 │ │ movs r0, r0 │ │ - b.n aab2a │ │ + b.n aab36 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ lsls r6, r6, #2 │ │ - b.n aa834 │ │ + b.n aa840 │ │ asrs r0, r0, #32 │ │ - b.n a9fb8 │ │ + b.n a9fc4 │ │ movs r0, r0 │ │ - b.n aa59c │ │ + b.n aa5a8 │ │ movs r0, r1 │ │ - b.n aa992 │ │ + b.n aa99e │ │ lsls r0, r6, #3 │ │ - b.n aa822 │ │ + b.n aa82e │ │ movs r4, r0 │ │ - b.n aa048 │ │ + b.n aa054 │ │ movs r1, r0 │ │ - b.n aab3e │ │ + b.n aab4a │ │ lsls r0, r1, #1 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n aa050 │ │ + b.n aa05c │ │ asrs r0, r1, #32 │ │ - b.n aabea │ │ + b.n aabf6 │ │ lsls r1, r2, #4 │ │ - b.n aa46c │ │ + b.n aa478 │ │ movs r7, r4 │ │ and.w r0, r0, r5 │ │ - b.n aa7f6 │ │ + b.n aa802 │ │ asrs r7, r0, #32 │ │ - b.n aa7fa │ │ - cmp r6, #84 @ 0x54 │ │ + b.n aa806 │ │ + cmp r6, #85 @ 0x55 │ │ add.w r0, r0, r0 │ │ - b.n aab62 │ │ + b.n aab6e │ │ @ instruction: 0xffc91aff │ │ asrs r4, r0, #32 │ │ - b.n aa078 │ │ + b.n aa084 │ │ movs r0, r3 │ │ - b.n a9ff8 │ │ + b.n aa004 │ │ movs r2, r0 │ │ - b.n aaaf4 │ │ + b.n aab00 │ │ movs r4, r2 │ │ subs r0, r0, r0 │ │ adds r4, r6, #6 │ │ - b.n aa87a │ │ + b.n aa886 │ │ movs r0, r0 │ │ - b.n aab8a │ │ + b.n aab96 │ │ movs r0, #4 │ │ - b.n aa082 │ │ + b.n aa08e │ │ asrs r1, r0, #32 │ │ - b.n aa968 │ │ + b.n aa974 │ │ asrs r4, r7, #30 │ │ - b.n aa86a │ │ + b.n aa876 │ │ asrs r0, r4, #32 │ │ - b.n aabf2 │ │ + b.n aabfe │ │ asrs r4, r0, #32 │ │ - b.n aa072 │ │ + b.n aa07e │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ asrs r0, r3, #32 │ │ - b.n aa024 │ │ + b.n aa030 │ │ movs r4, r3 │ │ - b.n aa020 │ │ + b.n aa02c │ │ movs r7, #188 @ 0xbc │ │ - b.n aa8a4 │ │ + b.n aa8b0 │ │ adds r0, #20 │ │ - b.n aaa06 │ │ + b.n aaa12 │ │ asrs r2, r7, #2 │ │ - b.n aa8aa │ │ + b.n aa8b6 │ │ movs r0, r4 │ │ - b.n aab30 │ │ + b.n aab3c │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ lsls r2, r0, #2 │ │ - b.n aa616 │ │ + b.n aa622 │ │ lsls r4, r6, #6 │ │ - b.n aa8ba │ │ + b.n aa8c6 │ │ movs r0, r0 │ │ - b.n aa624 │ │ + b.n aa630 │ │ asrs r6, r6, #2 │ │ - b.n aa8c2 │ │ + b.n aa8ce │ │ movs r0, r1 │ │ - b.n aaa26 │ │ + b.n aaa32 │ │ movs r6, r0 │ │ and.w r0, r0, r6, lsl #4 │ │ - b.n aa86e │ │ - ldrh r6, [r0, r3] │ │ + b.n aa87a │ │ + ldrh r7, [r0, r3] │ │ add.w r0, r0, r0 │ │ - b.n aabd6 │ │ + b.n aabe2 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ @ instruction: 0xffabeaff │ │ asrs r0, r7, #2 │ │ - b.n aa8e2 │ │ + b.n aa8ee │ │ adds r2, #145 @ 0x91 │ │ - b.n aa586 │ │ + b.n aa592 │ │ lsls r0, r6, #3 │ │ - b.n aa8d6 │ │ + b.n aa8e2 │ │ movs r4, r0 │ │ - b.n aa0f8 │ │ + b.n aa104 │ │ movs r3, r0 │ │ - b.n aa952 │ │ + b.n aa95e │ │ movs r0, r0 │ │ - b.n aabfe │ │ + b.n aac0a │ │ movs r4, r0 │ │ - b.n aa0e4 │ │ + b.n aa0f0 │ │ asrs r0, r1, #32 │ │ asrs r7, r0, #10 │ │ movs r0, r0 │ │ - b.n aaca2 │ │ + b.n aacae │ │ asrs r0, r0, #32 │ │ asrs r4, r0, #22 │ │ asrs r6, r6, #2 │ │ asrs r7, r2, #7 │ │ asrs r4, r0, #32 │ │ asrs r4, r0, #22 │ │ - beq.n aa590 │ │ - b.n aaa08 │ │ + beq.n aa59c │ │ + b.n aaa14 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r4, r5, r6} │ │ - b.n aa0b8 │ │ + b.n aa0c4 │ │ movs r0, r0 │ │ - b.n aa69c │ │ + b.n aa6a8 │ │ asrs r2, r3, #1 │ │ - b.n aa122 │ │ + b.n aa12e │ │ lsls r4, r6, #30 │ │ - b.n aab96 │ │ + b.n aaba2 │ │ lsrs r7, r7, #31 │ │ - b.n aac28 │ │ + b.n aac34 │ │ movs r0, r0 │ │ - b.n aac30 │ │ + b.n aac3c │ │ @ instruction: 0xff960aff │ │ asrs r0, r3, #1 │ │ - b.n aa0d4 │ │ + b.n aa0e0 │ │ ands r0, r0 │ │ - b.n aa8da │ │ + b.n aa8e6 │ │ str r0, [r2, #0] │ │ - b.n aa0c2 │ │ + b.n aa0ce │ │ movs r1, r0 │ │ - b.n aace2 │ │ + b.n aacee │ │ adds r0, #76 @ 0x4c │ │ - b.n aa0e4 │ │ + b.n aa0f0 │ │ asrs r1, r0, #32 │ │ - b.n aa6c8 │ │ + b.n aa6d4 │ │ movs r1, #233 @ 0xe9 │ │ - b.n aabae │ │ + b.n aabba │ │ str r0, [r6, #12] │ │ - b.n aa94c │ │ + b.n aa958 │ │ adds r0, #3 │ │ - b.n aa6d4 │ │ + b.n aa6e0 │ │ stmia r3!, {r0, r1, r3, r4} │ │ @ instruction: 0xebff0004 │ │ - b.n aa8fe │ │ - beq.n aa5e0 │ │ - b.n aaa58 │ │ + b.n aa90a │ │ + beq.n aa5ec │ │ + b.n aaa64 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r2, ip} │ │ - b.n aa0ee │ │ + b.n aa0fa │ │ movs r0, r0 │ │ - b.n aa0f2 │ │ + b.n aa0fe │ │ movs r0, #6 │ │ - b.n aa912 │ │ + b.n aa91e │ │ lsls r0, r6, #3 │ │ - b.n aa970 │ │ + b.n aa97c │ │ movs r5, r0 │ │ - b.n aa91a │ │ + b.n aa926 │ │ asrs r7, r0, #32 │ │ - b.n aa91e │ │ - ldrh r3, [r6, r5] │ │ + b.n aa92a │ │ + ldrh r4, [r6, r5] │ │ add.w r0, r0, r0 │ │ - b.n aac86 │ │ + b.n aac92 │ │ @ instruction: 0xff801aff │ │ @ instruction: 0xffaceaff │ │ - cmn r0, r2 │ │ + cmn r4, r4 │ │ movs r3, r0 │ │ - bl 2525de │ │ - svc 121 @ 0x79 │ │ + bl 3295ea │ │ + svc 191 @ 0xbf │ │ vcvt.f16.u16 d20, d0, #11 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n aab1c │ │ + b.n aab28 │ │ movs r0, r0 │ │ - b.n aaca6 │ │ + b.n aacb2 │ │ movs r1, r4 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n aa12e │ │ - ldr r1, [pc, #176] @ (aa6c0 ) │ │ - b.n aac22 │ │ + b.n aa13a │ │ + ldr r1, [pc, #176] @ (aa6cc ) │ │ + b.n aac2e │ │ cmp r2, #49 @ 0x31 │ │ - b.n aac1c │ │ - ldr r7, [pc, #1020] @ (aaa14 ) │ │ - b.n aacb8 │ │ + b.n aac28 │ │ + ldr r7, [pc, #1020] @ (aaa20 ) │ │ + b.n aacc4 │ │ movs r3, #213 @ 0xd5 │ │ - b.n aaca0 │ │ + b.n aacac │ │ movs r2, r0 │ │ - b.n aa8c4 │ │ + b.n aa8d0 │ │ movs r3, r3 │ │ subs r0, r0, r0 │ │ asrs r0, r0, #1 │ │ - b.n aa14a │ │ + b.n aa156 │ │ movs r0, r0 │ │ - b.n aacd0 │ │ + b.n aacdc │ │ movs r7, r3 │ │ lsrs r0, r0, #8 │ │ movs r0, #0 │ │ - b.n aa158 │ │ + b.n aa164 │ │ adds r6, #65 @ 0x41 │ │ - b.n aac4c │ │ + b.n aac58 │ │ subs r2, #137 @ 0x89 │ │ - b.n aacc0 │ │ + b.n aaccc │ │ movs r3, r0 │ │ - b.n aa8e6 │ │ + b.n aa8f2 │ │ movs r6, r3 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #32 │ │ - b.n aa16c │ │ + b.n aa178 │ │ movs r1, r0 │ │ - b.n aad30 │ │ + b.n aad3c │ │ movs r1, r3 │ │ - bge.n aa652 │ │ + bge.n aa65e │ │ asrs r6, r0, #32 │ │ - b.n aa1f6 │ │ + b.n aa202 │ │ movs r2, r0 │ │ - b.n aac7c │ │ + b.n aac88 │ │ movs r7, r3 │ │ lsrs r0, r0, #8 │ │ asrs r3, r2, #32 │ │ - b.n aada2 │ │ - movs r2, r5 │ │ + b.n aadae │ │ + movs r3, r5 │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n aa9aa │ │ + b.n aa9b6 │ │ movs r0, r0 │ │ - b.n aadae │ │ + b.n aadba │ │ movs r0, r0 │ │ - b.n aad1a │ │ + b.n aad26 │ │ ldrh r0, [r2, #32] │ │ lsrs r5, r7, #2 │ │ asrs r0, r1, #2 │ │ - b.n aa1b8 │ │ + b.n aa1c4 │ │ movs r4, r0 │ │ - b.n aa9be │ │ + b.n aa9ca │ │ movs r0, #84 @ 0x54 │ │ - b.n aadc2 │ │ + b.n aadce │ │ asrs r1, r0, #32 │ │ - b.n aa7a4 │ │ - subs r1, r1, #4 │ │ + b.n aa7b0 │ │ + subs r2, r1, #4 │ │ add.w r0, r0, r4 │ │ - b.n aa9ce │ │ + b.n aa9da │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r1, r2, r4, lr} │ │ - b.n aadd6 │ │ + b.n aade2 │ │ asrs r4, r3, #1 │ │ - b.n aa1d8 │ │ + b.n aa1e4 │ │ movs r4, r0 │ │ - b.n aa9de │ │ + b.n aa9ea │ │ movs r0, #68 @ 0x44 │ │ - b.n aade2 │ │ + b.n aadee │ │ asrs r1, r0, #32 │ │ - b.n aa7c4 │ │ - subs r1, r0, #4 │ │ + b.n aa7d0 │ │ + subs r2, r0, #4 │ │ add.w r0, r0, r4 │ │ - b.n aa9ee │ │ + b.n aa9fa │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r1, r2, r4, lr} │ │ - b.n aadf6 │ │ + b.n aae02 │ │ movs r1, r0 │ │ and.w r7, r0, r5, ror #18 │ │ - b.n aacce │ │ - ldr r7, [pc, #1020] @ (aaabc ) │ │ - b.n aad60 │ │ + b.n aacda │ │ + ldr r7, [pc, #1020] @ (aaac8 ) │ │ + b.n aad6c │ │ asrs r4, r6, #32 │ │ - b.n aa204 │ │ + b.n aa210 │ │ movs r4, r0 │ │ - b.n aaa0a │ │ + b.n aaa16 │ │ movs r0, #72 @ 0x48 │ │ - b.n aae0e │ │ + b.n aae1a │ │ asrs r1, r0, #32 │ │ - b.n aa7f0 │ │ - subs r6, r6, #3 │ │ + b.n aa7fc │ │ + subs r7, r6, #3 │ │ add.w r0, r0, r4 │ │ - b.n aaa1a │ │ + b.n aaa26 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r2, r3, r4, ip} │ │ - b.n aa220 │ │ + b.n aa22c │ │ movs r6, r2 │ │ - b.n aae26 │ │ + b.n aae32 │ │ movs r0, #76 @ 0x4c │ │ - b.n aae2a │ │ + b.n aae36 │ │ asrs r1, r0, #32 │ │ - b.n aa80c │ │ - subs r7, r5, #3 │ │ + b.n aa818 │ │ + subs r0, r6, #3 │ │ add.w r0, r0, r6, lsr #32 │ │ - b.n aae36 │ │ + b.n aae42 │ │ ldrh r0, [r2, #32] │ │ - ldmia.w sp!, {r0, r1, r6, r8, r9, ip, sp, lr, pc} │ │ - vrsra.u32 d31, d7, #11 │ │ - vrshr.u64 , , #11 │ │ - vabs.s16 , │ │ + ldmia.w sp!, {r1, r3, r4, sl, ip, sp, lr, pc} │ │ + vneg.s16 , q15 │ │ + vrsra.u64 , q1, #11 │ │ + vsri.32 d31, d26, #11 │ │ vsri.64 , q2, #11 │ │ - bmi.n aa6b6 │ │ - bmi.n aa6b8 │ │ - bmi.n aa6ba │ │ - ldr r7, [pc, #960] @ (aaad4 ) │ │ + bmi.n aa6c2 │ │ + bmi.n aa6c4 │ │ + bmi.n aa6c6 │ │ + bmi.n aa6c8 │ │ + bmi.n aa6ca │ │ + ldr r7, [pc, #960] @ (aaae4 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n aac34 │ │ - beq.n aa764 │ │ - b.n aabb8 │ │ + b.n aac44 │ │ + beq.n aa774 │ │ + b.n aabc8 │ │ str r0, [sp, #0] │ │ - b.n aaa62 │ │ + b.n aaa72 │ │ movs r5, r0 │ │ - b.n aa2c6 │ │ + b.n aa2d6 │ │ strh r1, [r0, #0] │ │ - b.n aaa6a │ │ + b.n aaa7a │ │ movs r1, r0 │ │ - b.n aad4e │ │ + b.n aad5e │ │ movs r1, r1 │ │ asrs r0, r4, #6 │ │ ldr r4, [sp, #224] @ 0xe0 │ │ subs r0, r0, r4 │ │ str r0, [r0, #4] │ │ - b.n aa26c │ │ + b.n aa27c │ │ str r0, [r6, r0] │ │ - b.n aac50 │ │ + b.n aac60 │ │ lsls r4, r0, #2 │ │ - b.n aa26e │ │ + b.n aa27e │ │ movs r1, r1 │ │ - b.n aa9e6 │ │ + b.n aa9f6 │ │ movs r1, r3 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n aa280 │ │ + b.n aa290 │ │ lsrs r2, r0, #32 │ │ - b.n aad72 │ │ + b.n aad82 │ │ lsls r7, r0, #1 │ │ subs r0, r0, r0 │ │ str r0, [r2, r0] │ │ - b.n aa28c │ │ + b.n aa29c │ │ movs r0, r0 │ │ - b.n aae08 │ │ + b.n aae18 │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ lsls r4, r0, #4 │ │ - b.n aa292 │ │ + b.n aa2a2 │ │ movs r1, r1 │ │ - b.n aaa0a │ │ + b.n aaa1a │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n aa29c │ │ + b.n aa2ac │ │ subs r1, r6, r0 │ │ - b.n aad7c │ │ + b.n aad8c │ │ asrs r5, r2, #15 │ │ - b.n aadfc │ │ + b.n aae0c │ │ movs r1, r0 │ │ - b.n aaa1e │ │ + b.n aaa2e │ │ movs r4, r2 │ │ lsls r5, r2, #22 │ │ movs r1, r1 │ │ lsls r0, r2, #5 │ │ lsls r2, r5, #1 │ │ lsrs r0, r0, #8 │ │ lsrs r0, r5, #11 │ │ - b.n aa2cc │ │ - add r7, pc, #788 @ (adr r7, aaaa4 ) │ │ - b.n aada2 │ │ + b.n aa2dc │ │ + add r7, pc, #788 @ (adr r7, aaab4 ) │ │ + b.n aadb2 │ │ add r7, sp, #1020 @ 0x3fc │ │ - b.n aae34 │ │ + b.n aae44 │ │ movs r0, r0 │ │ - b.n aa8b8 │ │ + b.n aa8c8 │ │ lsls r2, r3, #1 │ │ - b.n aa33e │ │ + b.n aa34e │ │ movs r0, r0 │ │ - b.n aae42 │ │ + b.n aae52 │ │ lsls r5, r5, #3 │ │ subs r0, r0, r0 │ │ movs r2, r1 │ │ - b.n aaaea │ │ - beq.n aa7e4 │ │ - b.n aac44 │ │ + b.n aaafa │ │ + beq.n aa7f4 │ │ + b.n aac54 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r6} │ │ - b.n aa2e2 │ │ + b.n aa2f2 │ │ movs r0, #208 @ 0xd0 │ │ - b.n aab44 │ │ + b.n aab54 │ │ lsrs r2, r2, #29 │ │ - b.n aacbe │ │ + b.n aacce │ │ lsls r0, r2, #3 │ │ - b.n aab42 │ │ + b.n aab52 │ │ movs r0, #0 │ │ - b.n aa86a │ │ + b.n aa87a │ │ movs r1, r0 │ │ - b.n aa970 │ │ + b.n aa980 │ │ lsls r6, r5, #3 │ │ subs r2, #0 │ │ ands r0, r0 │ │ - b.n aaf12 │ │ + b.n aaf22 │ │ asrs r1, r0, #32 │ │ - b.n aaf16 │ │ + b.n aaf26 │ │ asrs r4, r0 │ │ - b.n aa2e6 │ │ + b.n aa2f6 │ │ lsls r4, r2, #9 │ │ - b.n aa310 │ │ + b.n aa320 │ │ asrs r4, r0, #32 │ │ - b.n aa2f4 │ │ + b.n aa304 │ │ movs r0, r0 │ │ - b.n aae86 │ │ + b.n aae96 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n aac6e │ │ + b.n aac7e │ │ @ instruction: 0xb7f3 │ │ add.w pc, r0, r2, ror #3 │ │ - b.n aad14 │ │ + b.n aad24 │ │ lsls r0, r7 │ │ - b.n aa30c │ │ + b.n aa31c │ │ lsrs r7, r5, #11 │ │ orn r0, r0, #4063232 @ 0x3e0000 │ │ - b.n aad0c │ │ + b.n aad1c │ │ movs r0, #128 @ 0x80 │ │ - b.n aaf46 │ │ + b.n aaf56 │ │ adds r0, #136 @ 0x88 │ │ - b.n aaf4a │ │ + b.n aaf5a │ │ lsls r4, r0, #9 │ │ - b.n aa340 │ │ + b.n aa350 │ │ negs r4, r2 │ │ - b.n aa324 │ │ + b.n aa334 │ │ asrs r0, r7 │ │ - b.n aa328 │ │ + b.n aa338 │ │ rors r0, r0 │ │ - b.n aa32c │ │ + b.n aa33c │ │ lsrs r2, r0, #11 │ │ orr.w r0, r1, #32768 @ 0x8000 │ │ - b.n aa322 │ │ - ldr r7, [pc, #836] @ (aab68 ) │ │ - b.n aae28 │ │ + b.n aa332 │ │ + ldr r7, [pc, #836] @ (aab78 ) │ │ + b.n aae38 │ │ movs r0, #4 │ │ - b.n aa28a │ │ + b.n aa29a │ │ lsrs r3, r0, #11 │ │ orr.w r0, r1, #8650752 @ 0x840000 │ │ - b.n aaad6 │ │ + b.n aaae6 │ │ lsrs r7, r1, #11 │ │ orr.w r0, r1, #7110656 @ 0x6c8000 │ │ cmp r2, #0 │ │ asrs r0, r4, #2 │ │ - b.n aa370 │ │ + b.n aa380 │ │ adds r0, #0 │ │ - b.n aaf82 │ │ + b.n aaf92 │ │ movs r1, r0 │ │ - b.n aab86 │ │ + b.n aab96 │ │ adds r0, #0 │ │ - b.n aa34c │ │ + b.n aa35c │ │ movs r0, #4 │ │ - b.n aa2ae │ │ + b.n aa2be │ │ movs r4, r0 │ │ - b.n aaaf6 │ │ + b.n aab06 │ │ lsls r6, r3, #3 │ │ cmp r2, #0 │ │ movs r6, r0 │ │ - b.n aa406 │ │ + b.n aa416 │ │ movs r0, r1 │ │ - b.n aae7e │ │ + b.n aae8e │ │ lsls r4, r4, #3 │ │ lsrs r0, r0, #8 │ │ movs r0, r1 │ │ - b.n aa398 │ │ - add r0, pc, #0 @ (adr r0, aa868 ) │ │ - b.n aafaa │ │ + b.n aa3a8 │ │ + add r0, pc, #0 @ (adr r0, aa878 ) │ │ + b.n aafba │ │ movs r3, r0 │ │ - b.n aaf0e │ │ + b.n aaf1e │ │ lsls r7, r3, #4 │ │ cmp r2, #0 │ │ lsls r1, r0, #8 │ │ and.w r0, r0, r0, lsl #30 │ │ - b.n aa3ac │ │ - add r0, pc, #0 @ (adr r0, aa87c ) │ │ - b.n aafbe │ │ - add r0, pc, #32 @ (adr r0, aa8a0 ) │ │ - b.n aa394 │ │ + b.n aa3bc │ │ + add r0, pc, #0 @ (adr r0, aa88c ) │ │ + b.n aafce │ │ + add r0, pc, #32 @ (adr r0, aa8b0 ) │ │ + b.n aa3a4 │ │ movs r0, r0 │ │ - b.n aaf34 │ │ + b.n aaf44 │ │ movs r4, r3 │ │ lsrs r0, r0, #8 │ │ asrs r0, r1, #1 │ │ - b.n aa3ba │ │ + b.n aa3ca │ │ movs r0, r0 │ │ - b.n aaf34 │ │ + b.n aaf44 │ │ movs r7, r2 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n aaeba │ │ + b.n aaeca │ │ movs r7, r1 │ │ subs r0, r0, r0 │ │ movs r0, r4 │ │ - b.n aaec2 │ │ + b.n aaed2 │ │ lsls r6, r4, #6 │ │ subs r0, r0, r0 │ │ subs r2, r2, #5 │ │ - b.n aadac │ │ + b.n aadbc │ │ movs r1, r1 │ │ ldmia.w r5, {r4, r6, r7, lr} │ │ - b.n aac34 │ │ + b.n aac44 │ │ movs r4, r0 │ │ - b.n aa956 │ │ + b.n aa966 │ │ movs r5, r0 │ │ - b.n aaa60 │ │ + b.n aaa70 │ │ lsls r2, r3, #7 │ │ subs r2, #0 │ │ movs r0, r0 │ │ - b.n ab002 │ │ + b.n ab012 │ │ asrs r1, r0, #32 │ │ - b.n ab006 │ │ + b.n ab016 │ │ movs r4, r2 │ │ - b.n aa3d8 │ │ + b.n aa3e8 │ │ movs r0, r0 │ │ - b.n ab08e │ │ - bl 5063ce │ │ + b.n ab09e │ │ + bl 5063de │ │ movs r4, r0 │ │ - b.n aa3e4 │ │ + b.n aa3f4 │ │ lsls r0, r1, #1 │ │ - b.n aa406 │ │ + b.n aa416 │ │ asrs r0, r1, #7 │ │ - b.n aa3de │ │ + b.n aa3ee │ │ lsls r0, r0, #1 │ │ - b.n aaf12 │ │ + b.n aaf22 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ movs r7, r0 │ │ - b.n aa496 │ │ + b.n aa4a6 │ │ movs r0, r2 │ │ - b.n aaf0e │ │ + b.n aaf1e │ │ movs r0, r0 │ │ lsls r0, r4, #14 │ │ movs r0, r2 │ │ lsls r7, r0, #22 │ │ movs r0, r0 │ │ - b.n ab03a │ │ + b.n ab04a │ │ lsls r0, r0, #2 │ │ - b.n aa410 │ │ + b.n aa420 │ │ asrs r1, r0, #32 │ │ - b.n aaf02 │ │ + b.n aaf12 │ │ movs r7, r0 │ │ - b.n aad16 │ │ + b.n aad26 │ │ asrs r2, r0, #32 │ │ - b.n aaf8a │ │ + b.n aaf9a │ │ movs r6, r0 │ │ - b.n aafae │ │ + b.n aafbe │ │ asrs r0, r0, #2 │ │ lsls r1, r0, #14 │ │ movs r0, r4 │ │ - b.n aaf46 │ │ - add r0, pc, #48 @ (adr r0, aa948 ) │ │ - b.n aa42c │ │ + b.n aaf56 │ │ + add r0, pc, #48 @ (adr r0, aa958 ) │ │ + b.n aa43c │ │ asrs r4, r0, #32 │ │ - b.n aa430 │ │ + b.n aa440 │ │ @ instruction: 0xffa00aff │ │ movs r1, r1 │ │ - b.n aac66 │ │ + b.n aac76 │ │ @ instruction: 0xb7a5 │ │ add.w r0, r0, sl │ │ - b.n aac6e │ │ - beq.n aa968 │ │ - b.n aadc8 │ │ + b.n aac7e │ │ + beq.n aa978 │ │ + b.n aadd8 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, ip} │ │ - b.n aa464 │ │ + b.n aa474 │ │ movs r0, r2 │ │ - b.n aaf60 │ │ + b.n aaf70 │ │ @ instruction: 0xff910aff │ │ ands r0, r0 │ │ - b.n ab086 │ │ + b.n ab096 │ │ movs r0, r4 │ │ - b.n aa47c │ │ + b.n aa48c │ │ asrs r0, r2, #32 │ │ - b.n aadd0 │ │ + b.n aade0 │ │ ands r4, r2 │ │ - b.n aa45c │ │ + b.n aa46c │ │ str r4, [r0, r4] │ │ - b.n aa462 │ │ + b.n aa472 │ │ asrs r4, r0, #32 │ │ - b.n aa464 │ │ + b.n aa474 │ │ movs r0, r3 │ │ - b.n aa478 │ │ + b.n aa488 │ │ lsls r0, r0, #3 │ │ - b.n aa494 │ │ + b.n aa4a4 │ │ asrs r4, r4, #32 │ │ - b.n aa498 │ │ + b.n aa4a8 │ │ asrs r4, r2, #32 │ │ - b.n aa484 │ │ + b.n aa494 │ │ asrs r0, r1, #3 │ │ - b.n aae80 │ │ + b.n aae90 │ │ movs r1, r0 │ │ - b.n aac12 │ │ + b.n aac22 │ │ ands r4, r1 │ │ - b.n aa488 │ │ + b.n aa498 │ │ ands r0, r0 │ │ - b.n aa48c │ │ + b.n aa49c │ │ lsrs r0, r0 │ │ - b.n aa490 │ │ + b.n aa4a0 │ │ movs r0, r0 │ │ lsrs r0, r0, #8 │ │ @ instruction: 0xb78e │ │ add.w r1, r0, r0, lsl #1 │ │ - b.n aa4bc │ │ + b.n aa4cc │ │ subs r2, r2, #5 │ │ - b.n aaea0 │ │ + b.n aaeb0 │ │ adcs r0, r0 │ │ - b.n aa4a4 │ │ + b.n aa4b4 │ │ movs r1, r0 │ │ - b.n aac36 │ │ + b.n aac46 │ │ movs r0, r0 │ │ lsrs r0, r0, #8 │ │ @ instruction: 0xb788 │ │ add.w r2, r0, r4, lsl #1 │ │ - b.n aa4d4 │ │ + b.n aa4e4 │ │ str r0, [r4, #0] │ │ - b.n aa4c0 │ │ + b.n aa4d0 │ │ movs r0, r0 │ │ - b.n ab04a │ │ + b.n ab05a │ │ str r4, [r3, r0] │ │ - b.n aa4c8 │ │ + b.n aa4d8 │ │ asrs r4, r0, #9 │ │ asrs r5, r2, #22 │ │ asrs r0, r0, #32 │ │ asrs r0, r0, #22 │ │ lsls r4, r0, #9 │ │ asrs r1, r3, #22 │ │ lsls r4, r0, #9 │ │ asrs r5, r0, #22 │ │ strb r0, [r0, #9] │ │ - b.n aa4f4 │ │ + b.n aa504 │ │ movs r4, r0 │ │ - b.n aa4f4 │ │ + b.n aa504 │ │ movs r0, r0 │ │ - b.n ab06a │ │ + b.n ab07a │ │ movs r2, r4 │ │ lsrs r0, r0, #8 │ │ eors r0, r0 │ │ - b.n aa504 │ │ + b.n aa514 │ │ str r4, [r3, #0] │ │ - b.n aaee4 │ │ - add r0, pc, #4 @ (adr r0, aa9dc ) │ │ - b.n ab11a │ │ + b.n aaef4 │ │ + add r0, pc, #4 @ (adr r0, aa9ec ) │ │ + b.n ab12a │ │ movs r7, r0 │ │ - b.n aa586 │ │ + b.n aa596 │ │ str r0, [r0, r0] │ │ - b.n aa50e │ │ + b.n aa51e │ │ strh r0, [r1, #0] │ │ - b.n aa512 │ │ + b.n aa522 │ │ movs r0, r1 │ │ - b.n ab00a │ │ + b.n ab01a │ │ movs r0, r2 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n ab0a2 │ │ + b.n ab0b2 │ │ movs r5, r2 │ │ subs r0, r0, r0 │ │ asrs r0, r6, #2 │ │ - b.n aa522 │ │ + b.n aa532 │ │ lsls r0, r3, #4 │ │ - b.n aa526 │ │ + b.n aa536 │ │ movs r1, r0 │ │ - b.n aaca2 │ │ + b.n aacb2 │ │ movs r1, r2 │ │ cmp r2, #0 │ │ asrs r4, r3, #4 │ │ - b.n aa532 │ │ + b.n aa542 │ │ movs r1, r0 │ │ - b.n aaf0e │ │ + b.n aaf1e │ │ asrs r4, r2, #32 │ │ - b.n aa51c │ │ + b.n aa52c │ │ lsls r0, r3, #4 │ │ - b.n aa51e │ │ + b.n aa52e │ │ str r4, [r3, r4] │ │ - b.n aa522 │ │ + b.n aa532 │ │ movs r4, r0 │ │ - b.n aa54c │ │ - add r0, pc, #4 @ (adr r0, aaa24 ) │ │ - b.n aaf36 │ │ + b.n aa55c │ │ + add r0, pc, #4 @ (adr r0, aaa34 ) │ │ + b.n aaf46 │ │ str r4, [r1, #0] │ │ - b.n aaf32 │ │ + b.n aaf42 │ │ movs r0, r0 │ │ - b.n aacde │ │ + b.n aacee │ │ @ instruction: 0xffea9aff │ │ movs r1, r1 │ │ and.w r0, r0, ip, lsr #1 │ │ - b.n aa5de │ │ + b.n aa5ee │ │ movs r0, #255 @ 0xff │ │ - b.n ab17a │ │ + b.n ab18a │ │ asrs r0, r3, #32 │ │ - b.n aad7e │ │ + b.n aad8e │ │ movs r5, r0 │ │ - b.n aad82 │ │ - add r1, sp, #616 @ 0x268 │ │ - mla r0, r0, r1, r0 │ │ - b.n ab0fa │ │ + b.n aad92 │ │ + add r2, sp, #60 @ 0x3c │ │ + @ instruction: 0xfa000001 │ │ + b.n ab10a │ │ @ instruction: 0xffe90aff │ │ movs r4, r0 │ │ - b.n aaedc │ │ + b.n aaeec │ │ @ instruction: 0xb75a │ │ @ instruction: 0xeb00ffef │ │ @ instruction: 0xeaff0824 │ │ - b.n aa59c │ │ + b.n aa5ac │ │ movs r0, #1 │ │ - b.n ab1a2 │ │ + b.n ab1b2 │ │ adds r0, r4, r0 │ │ - b.n aa5a4 │ │ + b.n aa5b4 │ │ ands r0, r0 │ │ - b.n ab1aa │ │ + b.n ab1ba │ │ adds r0, #0 │ │ - b.n ab22e │ │ + b.n ab23e │ │ movs r0, r0 │ │ - b.n aab90 │ │ + b.n aaba0 │ │ asrs r1, r0, #32 │ │ - b.n aab94 │ │ + b.n aaba4 │ │ ands r0, r0 │ │ - b.n aa588 │ │ + b.n aa598 │ │ ands r4, r0 │ │ - b.n aa58c │ │ + b.n aa59c │ │ ands r0, r1 │ │ - b.n aa590 │ │ + b.n aa5a0 │ │ asrs r0, r2, #32 │ │ - b.n aa594 │ │ + b.n aa5a4 │ │ ands r4, r2 │ │ - b.n aa598 │ │ + b.n aa5a8 │ │ movs r0, #24 │ │ - b.n aa59c │ │ + b.n aa5ac │ │ movs r4, r3 │ │ - b.n aa5a0 │ │ + b.n aa5b0 │ │ adds r0, #32 │ │ - b.n aa5a4 │ │ + b.n aa5b4 │ │ movs r0, #36 @ 0x24 │ │ - b.n aa5a8 │ │ + b.n aa5b8 │ │ lsls r0, r0, #9 │ │ - b.n aa5d0 │ │ + b.n aa5e0 │ │ movs r0, r0 │ │ - b.n ab142 │ │ + b.n ab152 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ @ instruction: 0xb745 │ │ add.w r2, r0, r0, lsl #17 │ │ - b.n aa5c0 │ │ + b.n aa5d0 │ │ lsls r0, r4, #2 │ │ - b.n aa5e4 │ │ + b.n aa5f4 │ │ ands r0, r4 │ │ - b.n aa5f0 │ │ + b.n aa600 │ │ str r4, [r3, r0] │ │ - b.n aa5f4 │ │ + b.n aa604 │ │ movs r0, r0 │ │ - b.n ab15e │ │ + b.n ab16e │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n aaf46 │ │ + b.n aaf56 │ │ @ instruction: 0xb73d │ │ add.w r0, r0, r9 │ │ - b.n aae0e │ │ + b.n aae1e │ │ @ instruction: 0xb73b │ │ add.w r0, r0, r0, asr #8 │ │ - b.n aa600 │ │ + b.n aa610 │ │ movs r0, r3 │ │ - b.n aa614 │ │ + b.n aa624 │ │ movs r0, r0 │ │ - b.n aad82 │ │ + b.n aad92 │ │ movs r4, r4 │ │ lsls r5, r2, #22 │ │ - add r0, pc, #0 @ (adr r0, aaae4 ) │ │ + add r0, pc, #0 @ (adr r0, aaaf4 ) │ │ lsls r0, r4, #14 │ │ asrs r4, r2, #32 │ │ lsls r5, r3, #22 │ │ movs r1, r0 │ │ lsls r0, r2, #5 │ │ vpmin.u32 q0, q14, │ │ movs r4, r0 │ │ - b.n aa6a0 │ │ - add r0, pc, #0 @ (adr r0, aaaf8 ) │ │ - b.n ab23a │ │ + b.n aa6b0 │ │ + add r0, pc, #0 @ (adr r0, aab08 ) │ │ + b.n ab24a │ │ movs r2, r0 │ │ - b.n ab11e │ │ + b.n ab12e │ │ vpmin.u32 , q12, │ │ movs r4, r0 │ │ - b.n aa62e │ │ + b.n aa63e │ │ movs r0, r0 │ │ - b.n ab1aa │ │ + b.n ab1ba │ │ vpmin.u32 q2, , │ │ asrs r4, r4, #32 │ │ - b.n aa63c │ │ + b.n aa64c │ │ movs r4, r0 │ │ - b.n aae56 │ │ + b.n aae66 │ │ adds r0, #1 │ │ - b.n ab25a │ │ - bfcsel 2, aa31a , 6, ls │ │ + b.n ab26a │ │ + bfcsel 2, ab32a , 6, ls │ │ movs r1, r0 │ │ - b.n ab1c2 │ │ + b.n ab1d2 │ │ lsls r6, r0, #5 │ │ subs r0, r0, r0 │ │ lsls r4, r5, #29 │ │ - b.n aa668 │ │ + b.n aa678 │ │ movs r0, r0 │ │ - b.n aac4c │ │ + b.n aac5c │ │ lsls r2, r3, #1 │ │ - b.n aa6d2 │ │ + b.n aa6e2 │ │ movs r2, r0 │ │ - b.n ab1d6 │ │ + b.n ab1e6 │ │ lsls r6, r7, #5 │ │ cmp r2, #0 │ │ asrs r4, r3, #32 │ │ - b.n aa678 │ │ + b.n aa688 │ │ movs r0, #20 │ │ - b.n aa67c │ │ + b.n aa68c │ │ movs r4, r0 │ │ - b.n aa668 │ │ + b.n aa678 │ │ movs r0, #36 @ 0x24 │ │ - b.n aa64c │ │ + b.n aa65c │ │ movs r4, r0 │ │ - b.n ab24e │ │ + b.n ab25e │ │ movs r4, r0 │ │ - b.n aa654 │ │ + b.n aa664 │ │ movs r2, r1 │ │ - b.n aae96 │ │ - beq.n aab90 │ │ - b.n aaff0 │ │ + b.n aaea6 │ │ + beq.n aaba0 │ │ + b.n ab000 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r4, r8, r9, sl, ip} │ │ - b.n aa6a0 │ │ + b.n aa6b0 │ │ movs r1, r0 │ │ - b.n ab2a6 │ │ + b.n ab2b6 │ │ adds r7, #20 │ │ - b.n aa6a8 │ │ + b.n aa6b8 │ │ movs r1, #102 @ 0x66 │ │ - b.n ab16e │ │ + b.n ab17e │ │ asrs r1, r0, #32 │ │ - b.n aac90 │ │ + b.n aaca0 │ │ lsls r0, r4, #8 │ │ stmia.w sp, {r0, r1, ip, sp} │ │ - b.n aac98 │ │ - stmia r1!, {r1, r3, r5, r7} │ │ + b.n aaca8 │ │ + stmia r1!, {r0, r3, r5, r7} │ │ @ instruction: 0xebff000a │ │ - b.n aaec2 │ │ - beq.n aabbc │ │ - b.n ab01c │ │ + b.n aaed2 │ │ + beq.n aabcc │ │ + b.n ab02c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r4, r8, r9, sl} │ │ - b.n aa6cc │ │ + b.n aa6dc │ │ movs r0, #143 @ 0x8f │ │ - b.n ab2d2 │ │ + b.n ab2e2 │ │ asrs r0, r2, #28 │ │ - b.n aa6d4 │ │ + b.n aa6e4 │ │ movs r0, r0 │ │ - b.n aacb8 │ │ + b.n aacc8 │ │ asrs r1, r0, #32 │ │ - b.n aacbc │ │ - stmia r0!, {r0, r2, r4, r7} │ │ + b.n aaccc │ │ + stmia r0!, {r2, r4, r7} │ │ @ instruction: 0xebff1ff8 │ │ - b.n ab1ac │ │ + b.n ab1bc │ │ @ instruction: 0xb731 │ │ add.w r0, r0, r0 │ │ - b.n ab24e │ │ + b.n ab25e │ │ asrs r5, r7, #31 │ │ asrs r0, r0, #12 │ │ asrs r4, r0, #32 │ │ asrs r0, r0, #18 │ │ lsls r4, r0, #9 │ │ asrs r1, r1, #22 │ │ vpmin.u16 q7, q15, │ │ - blx 4ab200 │ │ + blx 4ab210 │ │ @ instruction: 0xffffffff │ │ @ instruction: 0xffffffff │ │ ... │ │ subs r0, r7, #7 │ │ - b.n ab1dc │ │ + b.n ab1ec │ │ @ instruction: 0xb725 │ │ add.w r0, r0, r0 │ │ - b.n ab27e │ │ + b.n ab28e │ │ asrs r5, r7, #31 │ │ asrs r0, r0, #12 │ │ asrs r4, r0, #32 │ │ asrs r0, r0, #18 │ │ lsls r0, r4, #2 │ │ asrs r1, r1, #22 │ │ movs r6, r0 │ │ - b.n aa79a │ │ + b.n aa7aa │ │ movs r0, r1 │ │ - b.n ab212 │ │ + b.n ab222 │ │ vpmin.u16 , q13, │ │ - add r2, pc, #256 @ (adr r2, aacf8 ) │ │ - b.n aa72c │ │ + add r2, pc, #256 @ (adr r2, aad08 ) │ │ + b.n aa73c │ │ strh r4, [r3, #0] │ │ - b.n aa718 │ │ + b.n aa728 │ │ str r0, [r4, #0] │ │ - b.n aa71c │ │ + b.n aa72c │ │ movs r4, r0 │ │ - b.n aa73a │ │ + b.n aa74a │ │ movs r0, r0 │ │ - b.n ab2aa │ │ + b.n ab2ba │ │ movs r2, r4 │ │ lsrs r0, r0, #8 │ │ eors r0, r0 │ │ - b.n aa744 │ │ + b.n aa754 │ │ str r4, [r3, #0] │ │ - b.n ab12a │ │ + b.n ab13a │ │ strh r1, [r0, #0] │ │ - b.n ab35a │ │ + b.n ab36a │ │ movs r7, r0 │ │ - b.n aa7c6 │ │ + b.n aa7d6 │ │ str r0, [r0, r0] │ │ - b.n aa74e │ │ + b.n aa75e │ │ strb r0, [r1, #0] │ │ - b.n aa752 │ │ + b.n aa762 │ │ movs r0, r1 │ │ - b.n ab24a │ │ + b.n ab25a │ │ movs r0, r2 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n ab2e0 │ │ + b.n ab2f0 │ │ movs r5, r2 │ │ subs r0, r0, r0 │ │ asrs r0, r6, #2 │ │ - b.n aa762 │ │ + b.n aa772 │ │ lsls r0, r3, #4 │ │ - b.n aa766 │ │ + b.n aa776 │ │ movs r1, r0 │ │ - b.n aaee2 │ │ + b.n aaef2 │ │ movs r1, r2 │ │ cmp r2, #0 │ │ asrs r4, r3, #4 │ │ - b.n aa772 │ │ + b.n aa782 │ │ movs r1, r0 │ │ - b.n ab14e │ │ + b.n ab15e │ │ asrs r4, r2, #32 │ │ - b.n aa75c │ │ + b.n aa76c │ │ lsls r0, r3, #4 │ │ - b.n aa75e │ │ + b.n aa76e │ │ str r4, [r3, r4] │ │ - b.n aa762 │ │ + b.n aa772 │ │ movs r4, r0 │ │ - b.n aa792 │ │ + b.n aa7a2 │ │ strh r1, [r0, #0] │ │ - b.n ab172 │ │ + b.n ab182 │ │ str r4, [r1, #0] │ │ - b.n ab172 │ │ + b.n ab182 │ │ movs r0, r0 │ │ - b.n aaf1a │ │ + b.n aaf2a │ │ @ instruction: 0xffea9aff │ │ movs r1, r1 │ │ and.w r0, r0, ip, lsr #1 │ │ - b.n aa81e │ │ + b.n aa82e │ │ movs r0, #255 @ 0xff │ │ - b.n ab3ba │ │ + b.n ab3ca │ │ asrs r7, r2, #32 │ │ - b.n aafbe │ │ + b.n aafce │ │ movs r5, r0 │ │ - b.n aafc2 │ │ - add r1, sp, #40 @ 0x28 │ │ - mla r0, r0, r1, r0 │ │ - b.n ab338 │ │ + b.n aafd2 │ │ + add r1, sp, #508 @ 0x1fc │ │ + @ instruction: 0xfa000001 │ │ + b.n ab348 │ │ @ instruction: 0xffe90aff │ │ movs r4, r0 │ │ - b.n ab11c │ │ + b.n ab12c │ │ @ instruction: 0xb6ca │ │ @ instruction: 0xeb00ffef │ │ @ instruction: 0xeaff05a0 │ │ - b.n aa7dc │ │ + b.n aa7ec │ │ movs r0, #1 │ │ - b.n ab3e2 │ │ + b.n ab3f2 │ │ asrs r4, r3, #22 │ │ - b.n aa7e4 │ │ + b.n aa7f4 │ │ strb r0, [r0, #0] │ │ - b.n ab3ea │ │ + b.n ab3fa │ │ str r0, [r4, #0] │ │ - b.n aa7e8 │ │ + b.n aa7f8 │ │ adds r0, #0 │ │ - b.n ab472 │ │ + b.n ab482 │ │ strh r4, [r3, #0] │ │ - b.n aa7f0 │ │ + b.n aa800 │ │ movs r0, r0 │ │ - b.n aadd8 │ │ + b.n aade8 │ │ asrs r1, r0, #32 │ │ - b.n aaddc │ │ + b.n aadec │ │ strb r0, [r0, #0] │ │ - b.n aa7d6 │ │ + b.n aa7e6 │ │ strb r4, [r0, #0] │ │ - b.n aa7da │ │ + b.n aa7ea │ │ strb r0, [r1, #0] │ │ - b.n aa7de │ │ + b.n aa7ee │ │ asrs r0, r2, #32 │ │ - b.n aa7e2 │ │ + b.n aa7f2 │ │ strb r4, [r2, #0] │ │ - b.n aa7e6 │ │ + b.n aa7f6 │ │ movs r0, #24 │ │ - b.n aa7ea │ │ + b.n aa7fa │ │ movs r4, r3 │ │ - b.n aa7ee │ │ + b.n aa7fe │ │ adds r0, #32 │ │ - b.n aa7f2 │ │ + b.n aa802 │ │ movs r0, #36 @ 0x24 │ │ - b.n aa7f6 │ │ + b.n aa806 │ │ movs r0, r1 │ │ - b.n aa818 │ │ - add r0, pc, #0 @ (adr r0, aace8 ) │ │ - b.n ab42a │ │ + b.n aa828 │ │ + add r0, pc, #0 @ (adr r0, aacf8 ) │ │ + b.n ab43a │ │ movs r3, r0 │ │ - b.n ab38e │ │ + b.n ab39e │ │ lsls r2, r4, #3 │ │ subs r2, #0 │ │ asrs r0, r1, #1 │ │ - b.n aa828 │ │ + b.n aa838 │ │ ands r6, r0 │ │ - b.n ab03a │ │ + b.n ab04a │ │ lsls r0, r0, #1 │ │ - b.n aa830 │ │ + b.n aa840 │ │ str r2, [r0, #0] │ │ - b.n ab442 │ │ + b.n ab452 │ │ movs r0, r2 │ │ - b.n ab336 │ │ + b.n ab346 │ │ asrs r0, r0, #32 │ │ - b.n aa82c │ │ + b.n aa83c │ │ ldrsh r1, [r2, r0] │ │ - b.n ab20e │ │ + b.n ab21e │ │ strb r1, [r4, #4] │ │ - b.n ab052 │ │ + b.n ab062 │ │ lsls r1, r1, #1 │ │ subs r0, r0, r0 │ │ strh r0, [r0, #0] │ │ - b.n ab45a │ │ + b.n ab46a │ │ movs r0, #0 │ │ - b.n ab45e │ │ + b.n ab46e │ │ asrs r0, r0, #32 │ │ - b.n ab462 │ │ + b.n ab472 │ │ movs r0, r1 │ │ and.w r0, r0, ip, lsl #13 │ │ - b.n aa85c │ │ + b.n aa86c │ │ strb r7, [r4, #2] │ │ - b.n ab06e │ │ + b.n ab07e │ │ adds r0, #6 │ │ - b.n aacd8 │ │ + b.n aace8 │ │ movs r0, r1 │ │ - b.n ab35c │ │ + b.n ab36c │ │ movs r5, r2 │ │ subs r0, r0, r0 │ │ adds r0, #8 │ │ - b.n aa870 │ │ + b.n aa880 │ │ str r1, [r0, #0] │ │ - b.n ab24e │ │ + b.n ab25e │ │ movs r3, r0 │ │ - b.n aaff2 │ │ + b.n ab002 │ │ lsls r6, r5, #1 │ │ cmp r2, #0 │ │ movs r1, r0 │ │ - b.n ab37c │ │ + b.n ab38c │ │ @ instruction: 0xfff41aff │ │ movs r0, r0 │ │ - b.n ab404 │ │ + b.n ab414 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ subs r7, #55 @ 0x37 │ │ - b.n aab5c │ │ + b.n aab6c │ │ subs r7, #19 │ │ - b.n ab040 │ │ + b.n ab050 │ │ strb r7, [r6, #12] │ │ - b.n ab0a6 │ │ + b.n ab0b6 │ │ adds r0, #3 │ │ - b.n aae76 │ │ + b.n aae86 │ │ str r1, [r0, #0] │ │ - b.n ab1f4 │ │ + b.n ab204 │ │ @ instruction: 0xfff1eaff │ │ strb r1, [r0, #0] │ │ - b.n ab202 │ │ + b.n ab212 │ │ adds r0, #72 @ 0x48 │ │ - b.n aa8ac │ │ + b.n aa8bc │ │ str r7, [r3, #0] │ │ - b.n ab48c │ │ + b.n ab49c │ │ strb r1, [r0, #0] │ │ - b.n ab28e │ │ + b.n ab29e │ │ strb r7, [r4, #6] │ │ - b.n aacac │ │ + b.n aacbc │ │ movs r0, r0 │ │ - b.n ab438 │ │ + b.n ab448 │ │ str r0, [r4, #0] │ │ lsls r6, r0, #10 │ │ @ instruction: 0xffe9eaff │ │ movs r1, r0 │ │ - b.n ab3ba │ │ + b.n ab3ca │ │ movs r3, r1 │ │ subs r0, r0, r0 │ │ movs r4, r3 │ │ - b.n aa8b8 │ │ + b.n aa8c8 │ │ movs r5, r0 │ │ - b.n ab0e2 │ │ + b.n ab0f2 │ │ asrs r0, r4, #32 │ │ - b.n aa8c0 │ │ - bvc.n aacd4 │ │ + b.n aa8d0 │ │ + bvc.n aace2 │ │ @ instruction: 0xebff0000 │ │ - b.n ab44e │ │ + b.n ab45e │ │ lsls r2, r5, #2 │ │ subs r0, r0, r0 │ │ movs r4, r3 │ │ - b.n aa8f0 │ │ + b.n aa900 │ │ movs r0, #1 │ │ - b.n ab4fa │ │ + b.n ab50a │ │ asrs r4, r2, #4 │ │ - b.n aa8de │ │ + b.n aa8ee │ │ movs r1, r0 │ │ - b.n ab06e │ │ + b.n ab07e │ │ asrs r0, r4, #32 │ │ - b.n aa900 │ │ + b.n aa910 │ │ @ instruction: 0xffdb2aff │ │ movs r0, #144 @ 0x90 │ │ - b.n aa8ee │ │ + b.n aa8fe │ │ stmia r1!, {r1, r2} │ │ - b.n aacf6 │ │ - bl 5068d2 │ │ + b.n aad06 │ │ + bl 5068e2 │ │ adds r0, #136 @ 0x88 │ │ - b.n aa8fa │ │ + b.n aa90a │ │ adds r2, #134 @ 0x86 │ │ - b.n aaee4 │ │ - b.n aae10 │ │ - b.n aa908 │ │ + b.n aaef4 │ │ + b.n aae20 │ │ + b.n aa918 │ │ movs r0, r0 │ │ - b.n ab4a2 │ │ + b.n ab4b2 │ │ movs r2, r2 │ │ lsrs r0, r0, #8 │ │ movs r0, #140 @ 0x8c │ │ - b.n aa90e │ │ + b.n aa91e │ │ stmia r0!, {r0} │ │ - b.n ab30a │ │ + b.n ab31a │ │ movs r1, r0 │ │ - b.n ab4ae │ │ + b.n ab4be │ │ strh r6, [r0, #0] │ │ - b.n aad7e │ │ + b.n aad8e │ │ movs r0, #136 @ 0x88 │ │ - b.n aa91e │ │ + b.n aa92e │ │ adds r0, #144 @ 0x90 │ │ - b.n aa922 │ │ + b.n aa932 │ │ movs r2, #134 @ 0x86 │ │ - b.n aaf0a │ │ + b.n aaf1a │ │ adds r0, #32 │ │ - b.n aa924 │ │ + b.n aa934 │ │ strh r0, [r3, #0] │ │ - b.n aa912 │ │ + b.n aa922 │ │ strh r4, [r3, #0] │ │ - b.n aa916 │ │ + b.n aa926 │ │ movs r0, #1 │ │ - b.n ab556 │ │ - bl 506916 │ │ + b.n ab566 │ │ + bl 506926 │ │ stmia r0!, {r1} │ │ str r1, [sp, #640] @ 0x280 │ │ adds r0, #32 │ │ - b.n aa95c │ │ + b.n aa96c │ │ stmia r1!, {r1, r2} │ │ - b.n aad2c │ │ - bl 506926 │ │ + b.n aad3c │ │ + bl 506936 │ │ asrs r0, r0, #32 │ │ - b.n aa94a │ │ + b.n aa95a │ │ asrs r6, r1, #32 │ │ - b.n ab172 │ │ + b.n ab182 │ │ @ instruction: 0xffc0eaff │ │ movs r0, #1 │ │ - b.n ab57a │ │ + b.n ab58a │ │ @ instruction: 0xffbeeaff │ │ movs r0, #0 │ │ - b.n ab582 │ │ + b.n ab592 │ │ movs r0, r1 │ │ and.w r0, r0, ip, lsl #5 │ │ - b.n aa97c │ │ + b.n aa98c │ │ strb r7, [r4, #2] │ │ - b.n ab18e │ │ + b.n ab19e │ │ asrs r6, r0, #32 │ │ - b.n aadf4 │ │ + b.n aae04 │ │ movs r0, r1 │ │ - b.n ab478 │ │ + b.n ab488 │ │ movs r5, r2 │ │ subs r0, r0, r0 │ │ asrs r0, r1, #32 │ │ - b.n aa990 │ │ + b.n aa9a0 │ │ str r1, [r0, #0] │ │ - b.n ab36e │ │ + b.n ab37e │ │ movs r1, r0 │ │ - b.n ab112 │ │ + b.n ab122 │ │ movs r5, r4 │ │ cmp r2, #0 │ │ movs r1, r0 │ │ - b.n ab49c │ │ + b.n ab4ac │ │ @ instruction: 0xfff41aff │ │ movs r0, r0 │ │ - b.n ab524 │ │ + b.n ab534 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ subs r7, r6, #4 │ │ - b.n aac7c │ │ + b.n aac8c │ │ subs r1, r2, #4 │ │ - b.n ab160 │ │ + b.n ab170 │ │ strb r7, [r6, #4] │ │ - b.n ab1c6 │ │ + b.n ab1d6 │ │ asrs r1, r0, #32 │ │ - b.n aaf96 │ │ + b.n aafa6 │ │ str r1, [r0, #0] │ │ - b.n ab310 │ │ + b.n ab320 │ │ @ instruction: 0xfff1eaff │ │ adds r0, #1 │ │ - b.n ab322 │ │ + b.n ab332 │ │ asrs r0, r1, #1 │ │ - b.n aa9cc │ │ + b.n aa9dc │ │ str r7, [r3, #0] │ │ - b.n ab5a4 │ │ + b.n ab5b4 │ │ adds r0, #1 │ │ - b.n ab3ae │ │ + b.n ab3be │ │ strb r3, [r4, #6] │ │ - b.n aadc8 │ │ + b.n aadd8 │ │ movs r0, r0 │ │ - b.n ab558 │ │ + b.n ab568 │ │ str r0, [r4, #0] │ │ lsls r6, r0, #10 │ │ @ instruction: 0xffe9eaff │ │ movs r1, r0 │ │ - b.n ab4da │ │ + b.n ab4ea │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ strh r0, [r0, #0] │ │ - b.n ab1fe │ │ + b.n ab20e │ │ movs r5, r0 │ │ - b.n ab202 │ │ - bvc.n aaf62 │ │ + b.n ab212 │ │ + bvc.n aaf70 │ │ @ instruction: 0xebff0000 │ │ - b.n ab56a │ │ + b.n ab57a │ │ lsls r3, r4, #1 │ │ subs r0, r0, r0 │ │ asrs r4, r2, #4 │ │ - b.n aaa02 │ │ + b.n aaa12 │ │ movs r0, r1 │ │ - b.n ab216 │ │ + b.n ab226 │ │ movs r0, #1 │ │ - b.n ab61a │ │ + b.n ab62a │ │ movs r1, r0 │ │ - b.n ab18a │ │ + b.n ab19a │ │ @ instruction: 0xffdd2aff │ │ asrs r4, r0, #1 │ │ - b.n aaa18 │ │ + b.n aaa28 │ │ movs r0, #134 @ 0x86 │ │ - b.n aaff6 │ │ + b.n ab006 │ │ asrs r2, r0, #8 │ │ - b.n aae90 │ │ + b.n aaea0 │ │ movs r0, #140 @ 0x8c │ │ - b.n aaa12 │ │ + b.n aaa22 │ │ asrs r0, r0, #2 │ │ - b.n ab5f8 │ │ + b.n ab608 │ │ asrs r6, r0, #32 │ │ - b.n aae7e │ │ + b.n aae8e │ │ movs r0, #1 │ │ - b.n ab63e │ │ + b.n ab64e │ │ @ instruction: 0xffd5eaff │ │ asrs r0, r0, #32 │ │ - b.n ab646 │ │ + b.n ab656 │ │ movs r1, r0 │ │ - b.n ab52e │ │ + b.n ab53e │ │ lsls r2, r3, #1 │ │ lsrs r0, r0, #8 │ │ adds r0, #140 @ 0x8c │ │ - b.n aaa32 │ │ + b.n aaa42 │ │ str r4, [r0, #0] │ │ - b.n ab256 │ │ + b.n ab266 │ │ movs r1, #20 │ │ - b.n aaa3a │ │ + b.n aaa4a │ │ adds r0, #1 │ │ - b.n ab3a4 │ │ + b.n ab3b4 │ │ strb r2, [r0, #0] │ │ - b.n ab028 │ │ + b.n ab038 │ │ movs r0, #1 │ │ - b.n ab3aa │ │ + b.n ab3ba │ │ strb r0, [r2, #3] │ │ - b.n ab2d8 │ │ + b.n ab2e8 │ │ movs r1, r0 │ │ - b.n ab61c │ │ + b.n ab62c │ │ @ instruction: 0xfffacaff │ │ movs r0, #1 │ │ - b.n ab43a │ │ + b.n ab44a │ │ movs r1, #20 │ │ - b.n aaa3a │ │ - bvc.n aae3c │ │ + b.n aaa4a │ │ + bvc.n ab04a │ │ @ instruction: 0xebff004e │ │ and.w r0, r0, r8 │ │ - b.n ab286 │ │ + b.n ab296 │ │ str r0, [r4, #0] │ │ - b.n aaa64 │ │ + b.n aaa74 │ │ movs r7, r0 │ │ - b.n ab35e │ │ + b.n ab36e │ │ movs r6, r0 │ │ - b.n ab5f2 │ │ + b.n ab602 │ │ movs r6, r1 │ │ lsrs r0, r0, #8 │ │ str r0, [r1, r0] │ │ - b.n ab468 │ │ + b.n ab478 │ │ asrs r1, r0, #32 │ │ - b.n ab69e │ │ + b.n ab6ae │ │ movs r5, r0 │ │ - b.n ab2a2 │ │ - bfcsel 18, aa762 , 1c, vs │ │ + b.n ab2b2 │ │ + bfcsel 18, ab772 , 1c, vs │ │ movs r0, #216 @ 0xd8 │ │ - b.n ab2f8 │ │ + b.n ab308 │ │ str r3, [r0, #0] │ │ - b.n aafb0 │ │ + b.n aafc0 │ │ movs r0, #2 │ │ - b.n aafb2 │ │ + b.n aafc2 │ │ movs r0, #6 │ │ - b.n ab29a │ │ + b.n ab2aa │ │ lsls r7, r4, #2 │ │ subs r0, r0, r0 │ │ movs r0, #1 │ │ - b.n ab73e │ │ + b.n ab74e │ │ movs r2, r0 │ │ - b.n aafc2 │ │ + b.n aafd2 │ │ asrs r1, r0, #32 │ │ - b.n ab346 │ │ + b.n ab356 │ │ movs r1, r0 │ │ - b.n ab2aa │ │ + b.n ab2ba │ │ movs r6, r0 │ │ lsls r0, r4, #14 │ │ strh r0, [r2, #0] │ │ lsls r2, r0, #31 │ │ str r0, [r1, #0] │ │ - b.n ab4a4 │ │ + b.n ab4b4 │ │ str r0, [r0, r0] │ │ - b.n ab6da │ │ + b.n ab6ea │ │ movs r0, r0 │ │ - b.n ab75e │ │ - bl 506a9e │ │ + b.n ab76e │ │ + bl 506aae │ │ movs r4, r0 │ │ - b.n aaab4 │ │ + b.n aaac4 │ │ movs r4, r1 │ │ - b.n aaadc │ │ + b.n aaaec │ │ movs r0, r1 │ │ - b.n aaabc │ │ - bl 506aae │ │ + b.n aaacc │ │ + bl 506abe │ │ str r4, [r1, r0] │ │ - b.n aaac4 │ │ - blx 4ac5f8 │ │ + b.n aaad4 │ │ + blx 4ac608 │ │ movs r7, r0 │ │ - b.n ab2fe │ │ + b.n ab30e │ │ asrs r1, r0, #32 │ │ - b.n ab702 │ │ - bfcsel 18, aa7c2 , 1c, eq │ │ + b.n ab712 │ │ + bfcsel 18, ab7d2 , 1c, eq │ │ movs r0, #208 @ 0xd0 │ │ - b.n ab358 │ │ + b.n ab368 │ │ ands r3, r0 │ │ - b.n ab010 │ │ + b.n ab020 │ │ movs r2, r0 │ │ - b.n ab012 │ │ + b.n ab022 │ │ movs r4, r0 │ │ - b.n ab2f6 │ │ + b.n ab306 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ - blx 4ac61c │ │ + blx 4ac62c │ │ @ instruction: 0xfff5eaff │ │ movs r1, r0 │ │ - b.n ab6c8 │ │ + b.n ab6d8 │ │ @ instruction: 0xffeb1aff │ │ movs r6, r0 │ │ - b.n ab32e │ │ + b.n ab33e │ │ asrs r1, r0, #32 │ │ - b.n ab732 │ │ - @ instruction: 0xf5f7ebff │ │ + b.n ab742 │ │ + @ instruction: 0xf5f6ebff │ │ movs r0, #208 @ 0xd0 │ │ - b.n ab386 │ │ + b.n ab396 │ │ ands r3, r0 │ │ - b.n ab040 │ │ + b.n ab050 │ │ movs r0, #2 │ │ - b.n ab042 │ │ + b.n ab052 │ │ movs r0, #4 │ │ - b.n ab32a │ │ + b.n ab33a │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ - blx 4ac64c │ │ + blx 4ac65c │ │ @ instruction: 0xfff5eaff │ │ movs r0, #12 │ │ - b.n aab48 │ │ + b.n aab58 │ │ movs r2, r0 │ │ - b.n ab05a │ │ + b.n ab06a │ │ movs r1, r0 │ │ - b.n ab33e │ │ + b.n ab34e │ │ @ instruction: 0xffdd1aff │ │ str r0, [r4, #0] │ │ - b.n aab60 │ │ + b.n aab70 │ │ mcr2 10, 1, lr, cr4, cr15, {7} @ │ │ lsls r0, r0, #9 │ │ - b.n aab6c │ │ + b.n aab7c │ │ movs r0, #174 @ 0xae │ │ - b.n ab772 │ │ + b.n ab782 │ │ asrs r4, r7, #8 │ │ - b.n aab74 │ │ + b.n aab84 │ │ movs r0, r0 │ │ - b.n ab158 │ │ + b.n ab168 │ │ asrs r1, r0, #32 │ │ - b.n ab15c │ │ - iteet vs │ │ + b.n ab16c │ │ + ite vs │ │ @ instruction: 0xebff9000 │ │ - bvc.n ab386 @ unpredictable branch in IT block │ │ - │ │ - movvc r0, r0 │ │ - bvs.n ab6ea │ │ + bvc.n ab396 │ │ + movs r0, r0 │ │ + b.n ab6fa │ │ lsls r2, r2, #1 │ │ subs r0, r0, r0 │ │ - add r0, pc, #36 @ (adr r0, ab074 ) │ │ - b.n ab392 │ │ + add r0, pc, #36 @ (adr r0, ab084 ) │ │ + b.n ab3a2 │ │ movs r2, r1 │ │ - b.n ab396 │ │ - beq.n ab090 │ │ - b.n ab4f0 │ │ + b.n ab3a6 │ │ + beq.n ab0a0 │ │ + b.n ab500 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r5, r6, r7, r8, ip} │ │ - b.n aaba0 │ │ - add r7, pc, #788 @ (adr r7, ab378 ) │ │ - b.n ab676 │ │ + b.n aabb0 │ │ + add r7, pc, #788 @ (adr r7, ab388 ) │ │ + b.n ab686 │ │ add r7, sp, #1020 @ 0x3fc │ │ - b.n ab708 │ │ + b.n ab718 │ │ asrs r1, r0, #32 │ │ - b.n ab18c │ │ + b.n ab19c │ │ asrs r2, r3, #1 │ │ - b.n aac14 │ │ + b.n aac24 │ │ movs r0, r0 │ │ - b.n ab718 │ │ + b.n ab728 │ │ movs r6, r7 │ │ subs r0, r0, r0 │ │ str r4, [r0, #0] │ │ - b.n ab3be │ │ + b.n ab3ce │ │ lsls r4, r0, #2 │ │ - b.n aabae │ │ + b.n aabbe │ │ movs r0, r0 │ │ - b.n ab726 │ │ + b.n ab736 │ │ asrs r0, r0, #32 │ │ asrs r0, r4, #14 │ │ asrs r4, r1, #32 │ │ asrs r0, r0, #22 │ │ lsls r0, r1, #1 │ │ - b.n aabbe │ │ + b.n aabce │ │ lsrs r5, r0, #20 │ │ - b.n ab596 │ │ + b.n ab5a6 │ │ @ instruction: 0xb691 │ │ add.w r0, r0, r0 │ │ - b.n ab73e │ │ + b.n ab74e │ │ stc2l 10, cr0, [r0, #1020] @ 0x3fc @ │ │ strh r0, [r0, #0] │ │ - b.n ab3e6 │ │ + b.n ab3f6 │ │ @ instruction: 0xb691 │ │ add.w r0, r0, r8, asr #21 │ │ - b.n aabda │ │ + b.n aabea │ │ strb r0, [r0, #0] │ │ - b.n ab3f2 │ │ + b.n ab402 │ │ movs r5, r0 │ │ - b.n ab356 │ │ + b.n ab366 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ lsls r4, r2, #6 │ │ - b.n aabfc │ │ + b.n aac0c │ │ movs r0, r0 │ │ - b.n ab1e0 │ │ + b.n ab1f0 │ │ lsls r2, r3, #1 │ │ - b.n aac66 │ │ + b.n aac76 │ │ movs r3, r0 │ │ - b.n ab76a │ │ + b.n ab77a │ │ movs r3, r2 │ │ subs r2, #0 │ │ asrs r4, r0, #6 │ │ - b.n aac10 │ │ + b.n aac20 │ │ adds r1, #132 @ 0x84 │ │ - b.n aac14 │ │ + b.n aac24 │ │ stmia r1!, {r2, r7} │ │ - b.n aac18 │ │ + b.n aac28 │ │ asrs r1, r0, #32 │ │ - b.n ab1fc │ │ + b.n ab20c │ │ movs r0, #48 @ 0x30 │ │ - b.n aac0e │ │ + b.n aac1e │ │ adds r0, #3 │ │ - b.n ab204 │ │ + b.n ab214 │ │ eors r0, r1 │ │ - b.n aac16 │ │ + b.n aac26 │ │ stmia r0!, {r2, r3} │ │ - b.n ab20c │ │ + b.n ab21c │ │ lsls r0, r6, #5 │ │ - b.n aac30 │ │ + b.n aac40 │ │ movs r2, r0 │ │ - b.n ab39e │ │ + b.n ab3ae │ │ cmp r7, #205 @ 0xcd │ │ - b.n ab83a │ │ + b.n ab84a │ │ movs r0, r0 │ │ - b.n ab21c │ │ + b.n ab22c │ │ str r0, [r0, #0] │ │ - b.n aac1c │ │ + b.n aac2c │ │ movs r4, r1 │ │ lsls r0, r4, #6 │ │ lsls r1, r2, #4 │ │ @ instruction: 0xe98d0005 │ │ - b.n ab1bc │ │ + b.n ab1cc │ │ movs r3, r0 │ │ asrs r0, r0, #12 │ │ - stmia r0!, {r2, r6} │ │ + stmia r0!, {r0, r1, r6} │ │ @ instruction: 0xebff0005 │ │ - b.n ab3c8 │ │ + b.n ab3d8 │ │ stc2 10, cr1, [r1, #1020]! @ 0x3fc @ │ │ lsls r4, r0, #5 │ │ - b.n aac60 │ │ + b.n aac70 │ │ movs r0, #8 │ │ - b.n ab466 │ │ + b.n ab476 │ │ asrs r0, r0, #5 │ │ - b.n aac68 │ │ + b.n aac78 │ │ movs r0, r0 │ │ - b.n ab24c │ │ + b.n ab25c │ │ asrs r1, r0, #32 │ │ - b.n ab250 │ │ - stmia r6!, {r2, r3, r6, r7} │ │ + b.n ab260 │ │ + stmia r6!, {r0, r1, r3, r6, r7} │ │ @ instruction: 0xebff1160 │ │ - b.n aac78 │ │ + b.n aac88 │ │ movs r4, r3 │ │ - b.n aac78 │ │ + b.n aac88 │ │ asrs r1, r0, #32 │ │ - b.n ab260 │ │ + b.n ab270 │ │ str r4, [r4, r0] │ │ - b.n aac66 │ │ + b.n aac76 │ │ movs r0, r4 │ │ - b.n aac6a │ │ + b.n aac7a │ │ adds r1, #80 @ 0x50 │ │ - b.n aac8c │ │ + b.n aac9c │ │ movs r0, #20 │ │ - b.n aac8c │ │ + b.n aac9c │ │ adds r0, #3 │ │ - b.n ab274 │ │ + b.n ab284 │ │ movs r4, r1 │ │ - b.n aac74 │ │ + b.n aac84 │ │ movs r4, r4 │ │ stmia.w sp, {r1} │ │ - b.n ab8a2 │ │ + b.n ab8b2 │ │ movs r0, #24 │ │ - b.n aaca0 │ │ + b.n aacb0 │ │ movs r0, #8 │ │ - b.n aac84 │ │ + b.n aac94 │ │ cmp r7, #95 @ 0x5f │ │ - b.n ab8ae │ │ - stmia r0!, {r0, r2, r3, r5} │ │ + b.n ab8be │ │ + stmia r0!, {r2, r3, r5} │ │ @ instruction: 0xebfffe70 │ │ @ instruction: 0xeaff10d0 │ │ - b.n aacb8 │ │ + b.n aacc8 │ │ movs r0, #163 @ 0xa3 │ │ - b.n ab8be │ │ + b.n ab8ce │ │ adds r0, #204 @ 0xcc │ │ - b.n aacc0 │ │ + b.n aacd0 │ │ asrs r1, r0, #32 │ │ - b.n ab2a4 │ │ + b.n ab2b4 │ │ movs r0, r0 │ │ - b.n aaca4 │ │ + b.n aacb4 │ │ adds r0, #3 │ │ - b.n ab2ac │ │ + b.n ab2bc │ │ movs r1, r0 │ │ - b.n ab8d2 │ │ - stmia r0!, {r2, r5} │ │ + b.n ab8e2 │ │ + stmia r0!, {r0, r1, r5} │ │ @ instruction: 0xebffffb7 │ │ @ instruction: 0xeaff00ec │ │ - b.n aacdc │ │ + b.n aacec │ │ movs r0, r0 │ │ - b.n ab2c0 │ │ + b.n ab2d0 │ │ lsls r2, r3, #1 │ │ - b.n aad46 │ │ + b.n aad56 │ │ movs r0, r0 │ │ - b.n ab84a │ │ + b.n ab85a │ │ movs r1, r2 │ │ subs r0, r0, r0 │ │ ands r0, r4 │ │ - b.n aacec │ │ + b.n aacfc │ │ lsls r4, r0, #2 │ │ - b.n aacde │ │ + b.n aacee │ │ movs r4, r7 │ │ add.w r0, r0, ip, lsr #4 │ │ - b.n aacf8 │ │ + b.n aad08 │ │ movs r4, r0 │ │ - b.n aace4 │ │ + b.n aacf4 │ │ movs r2, r0 │ │ - b.n ab8c6 │ │ + b.n ab8d6 │ │ movs r4, r0 │ │ - b.n aaccc │ │ + b.n aacdc │ │ movs r0, r2 │ │ - b.n aacf6 │ │ + b.n aad06 │ │ movs r0, r0 │ │ - b.n ab872 │ │ + b.n ab882 │ │ @ instruction: 0xff9d1aff │ │ asrs r0, r4, #32 │ │ - b.n aad14 │ │ + b.n aad24 │ │ movs r4, r0 │ │ - b.n aad00 │ │ + b.n aad10 │ │ lsls r2, r0, #4 │ │ - b.n ab8e2 │ │ + b.n ab8f2 │ │ movs r4, r0 │ │ - b.n aace8 │ │ - add r0, pc, #36 @ (adr r0, ab20c ) │ │ - b.n ab52a │ │ - movs r2, r1 │ │ - b.n ab52e │ │ - beq.n ab228 │ │ - b.n ab688 │ │ + b.n aacf8 │ │ + add r0, pc, #36 @ (adr r0, ab21c ) │ │ + b.n ab53a │ │ + movs r2, r1 │ │ + b.n ab53e │ │ + beq.n ab238 │ │ + b.n ab698 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r4, r7, ip} │ │ - b.n aad38 │ │ + b.n aad48 │ │ movs r1, r0 │ │ - b.n ab93e │ │ + b.n ab94e │ │ adds r0, #144 @ 0x90 │ │ - b.n aad40 │ │ + b.n aad50 │ │ cmp r5, #6 │ │ - b.n ab946 │ │ + b.n ab956 │ │ asrs r1, r0, #32 │ │ - b.n ab328 │ │ + b.n ab338 │ │ str r0, [sp, #0] │ │ - b.n aad28 │ │ + b.n aad38 │ │ adds r0, #3 │ │ - b.n ab330 │ │ - stmia r0!, {r2} │ │ + b.n ab340 │ │ + stmia r0!, {r0, r1} │ │ @ instruction: 0xebffffe4 │ │ @ instruction: 0xeaff0005 │ │ - b.n ab55e │ │ + b.n ab56e │ │ asrs r1, r0, #32 │ │ - b.n ab962 │ │ - blx 4ac864 │ │ - bfx 14, sl │ │ + b.n ab972 │ │ + blx 4ac874 │ │ + bfx 14, r9 │ │ movs r0, #208 @ 0xd0 │ │ - b.n ab5b8 │ │ + b.n ab5c8 │ │ str r3, [r0, #0] │ │ - b.n ab274 │ │ + b.n ab284 │ │ movs r0, #2 │ │ - b.n ab276 │ │ + b.n ab286 │ │ movs r0, #6 │ │ - b.n ab55e │ │ + b.n ab56e │ │ vpmin.u8 q8, q15, │ │ @ instruction: 0xfff5eaff │ │ - ldrsh r3, [r4, r3] │ │ - vqrdmlsh.s , , d26[0] │ │ - vcvt.u16.f16 , q8 │ │ - movs r3, r0 │ │ - bcs.n ab1f2 │ │ - vcvt.f32.u32 , , #11 │ │ - vneg.f16 d19, d12 │ │ - movs r3, r0 │ │ - ldcl 15, cr15, [r8], #-980 @ 0xfffffc2c │ │ - adds r5, #21 │ │ - @ instruction: 0xfff6f9dc │ │ - @ instruction: 0xfff50ea8 │ │ - vrintp.f16 d16, d17 │ │ - vrintp.f16 q10, │ │ - vqshrn.u64 d20, q0, #10 │ │ - vrintm.f16 q8, q7 │ │ - vshr.u64 d20, d20, #10 │ │ - movs r3, r0 │ │ - @ instruction: 0xea6afff5 │ │ - ldr r0, [r7, r0] │ │ - vuzp.16 d22, d27 │ │ - vrshr.u32 d22, d18, #9 │ │ - vcvt.f16.u16 d19, d28 │ │ - movs r3, r0 │ │ - b.n aba38 │ │ - vsri.64 d16, d21, #11 │ │ - @ instruction: 0xfff63d20 │ │ - movs r3, r0 │ │ - b.n aabd4 │ │ - vmlsl.u , d21, d7[0] │ │ - @ instruction: 0xfff54db0 │ │ - @ instruction: 0xfff6d8b9 │ │ + ldrsh r3, [r2, r3] │ │ + @ instruction: 0xfff75fda │ │ + vqshl.u64 , q8, #55 @ 0x37 │ │ + movs r3, r0 │ │ + bcc.n ab286 │ │ + @ instruction: 0xfff5fd8a │ │ + vqshl.u64 d19, d12, #53 @ 0x35 │ │ + movs r3, r0 │ │ + ldc 15, cr15, [sp, #-980]! @ 0xfffffc2c │ │ + adds r6, #223 @ 0xdf │ │ + vtbx.8 d31, {d6-d7}, d4 │ │ + vqrdmlah.s q8, , d26[0] │ │ + vrintp.f16 d16, d1 │ │ + vtbx.8 d20, {d6}, d15 │ │ + @ instruction: 0xfff64996 │ │ + vrintm.f16 d16, d30 │ │ + vtrn.16 q10, q2 │ │ + movs r3, r0 │ │ + @ instruction: 0xea9bfff5 │ │ + ldr r0, [r5, r0] │ │ + vsra.u32 d22, d11, #10 │ │ + vcvtp.s16.f16 d22, d18 │ │ + vqshlu.s64 d19, d28, #55 @ 0x37 │ │ + movs r3, r0 │ │ + b.n aaaaa │ │ + vsri.64 d16, d5, #11 │ │ + vcvt.u16.f16 d19, d16, #10 │ │ + movs r3, r0 │ │ + b.n aac46 │ │ + vabs.f16 d29, d9 │ │ + vcvt.f32.u32 d20, d22, #11 │ │ + @ instruction: 0xfff6d8fb │ │ vcvt.f16.u16 d20, d0, #11 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n ab7d0 │ │ + b.n ab7e0 │ │ subs r1, r6, r0 │ │ - b.n ab8c0 │ │ + b.n ab8d0 │ │ asrs r5, r2, #15 │ │ - b.n ab940 │ │ + b.n ab950 │ │ movs r0, r0 │ │ - b.n ab962 │ │ + b.n ab972 │ │ movs r3, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, #0 │ │ - b.n aadea │ │ + b.n aadfa │ │ movs r1, r0 │ │ - b.n ab572 │ │ + b.n ab582 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ adds r0, #20 │ │ - b.n aadf6 │ │ + b.n aae06 │ │ movs r0, #4 │ │ - b.n aadfa │ │ + b.n aae0a │ │ movs r0, r0 │ │ - b.n ab984 │ │ + b.n ab994 │ │ movs r0, #2 │ │ - b.n ab9e6 │ │ + b.n ab9f6 │ │ movs r0, #4 │ │ - b.n aade6 │ │ + b.n aadf6 │ │ movs r3, r0 │ │ - b.n ab62a │ │ + b.n ab63a │ │ @ instruction: 0xfff31aff │ │ movs r0, r0 │ │ - b.n aba32 │ │ + b.n aba42 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r1, r2, r4, lr} │ │ - b.n aba3a │ │ + b.n aba4a │ │ movs r1, r0 │ │ and.w r9, r0, ip, asr #16 │ │ - b.n ab912 │ │ - ldr r7, [pc, #1020] @ (ab700 ) │ │ - b.n ab9a4 │ │ + b.n ab922 │ │ + ldr r7, [pc, #1020] @ (ab710 ) │ │ + b.n ab9b4 │ │ asrs r4, r2, #32 │ │ - b.n aae48 │ │ + b.n aae58 │ │ movs r4, r0 │ │ - b.n ab64e │ │ + b.n ab65e │ │ movs r0, #91 @ 0x5b │ │ - b.n aba52 │ │ + b.n aba62 │ │ asrs r1, r0, #32 │ │ - b.n ab434 │ │ + b.n ab444 │ │ subs r5, r4, r7 │ │ add.w r0, r0, r4 │ │ - b.n ab65e │ │ + b.n ab66e │ │ ldrh r0, [r2, #32] │ │ - ldmia.w sp!, {r1, r5, r6, r7, r9, sl, sp, lr, pc} │ │ + ldmia.w sp!, {r0, r2, r4, r5, r7, r8, r9, sl, sp, lr, pc} │ │ @ instruction: 0xfff54ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n ab848 │ │ - beq.n ab388 │ │ - b.n ab7cc │ │ + b.n ab858 │ │ + beq.n ab398 │ │ + b.n ab7dc │ │ movs r0, r0 │ │ - b.n ab9d6 │ │ + b.n ab9e6 │ │ lsls r2, r6, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, #0 │ │ - b.n aae5e │ │ + b.n aae6e │ │ ldr r4, [r5, r4] │ │ - b.n ab952 │ │ + b.n ab962 │ │ subs r2, #49 @ 0x31 │ │ - b.n ab94c │ │ + b.n ab95c │ │ ldrsh r7, [r7, r7] │ │ - b.n ab9e8 │ │ + b.n ab9f8 │ │ adds r3, #213 @ 0xd5 │ │ - b.n ab9d0 │ │ + b.n ab9e0 │ │ movs r3, r0 │ │ - b.n ab5f6 │ │ + b.n ab606 │ │ lsls r5, r5, #1 │ │ subs r0, r0, r0 │ │ movs r0, #64 @ 0x40 │ │ - b.n aae7a │ │ + b.n aae8a │ │ adds r0, #16 │ │ - b.n aae82 │ │ + b.n aae92 │ │ movs r0, r0 │ │ - b.n aba08 │ │ + b.n aba18 │ │ lsls r3, r5, #1 │ │ lsrs r0, r0, #8 │ │ adds r0, #4 │ │ - b.n aaf0a │ │ + b.n aaf1a │ │ movs r1, r6 │ │ - b.n ab994 │ │ + b.n ab9a4 │ │ lsls r1, r6, #1 │ │ subs r0, r0, r0 │ │ adds r0, #0 │ │ - b.n aae9a │ │ + b.n aaeaa │ │ strb r1, [r0, #25] │ │ - b.n ab98c │ │ + b.n ab99c │ │ ldrb r1, [r1, #10] │ │ - b.n aba00 │ │ + b.n aba10 │ │ movs r7, r0 │ │ - b.n ab628 │ │ + b.n ab638 │ │ lsls r1, r7, #1 │ │ subs r0, r0, r0 │ │ movs r0, #4 │ │ - b.n aaeae │ │ + b.n aaebe │ │ @ instruction: 0x47c1 │ │ - b.n ab99e │ │ - ldr r7, [pc, #1020] @ (ab78c ) │ │ - b.n aba30 │ │ + b.n ab9ae │ │ + ldr r7, [pc, #1020] @ (ab79c ) │ │ + b.n aba40 │ │ movs r0, r0 │ │ - b.n aba3a │ │ + b.n aba4a │ │ lsls r6, r6, #1 │ │ - ldr r2, [pc, #0] @ (ab398 ) │ │ + ldr r2, [pc, #0] @ (ab3a8 ) │ │ lsls r2, r0, #8 │ │ - b.n ab9c2 │ │ + b.n ab9d2 │ │ lsls r5, r5, #2 │ │ lsrs r0, r0, #8 │ │ movs r0, #4 │ │ - b.n aaec6 │ │ + b.n aaed6 │ │ lsrs r2, r0, #32 │ │ - b.n ab9ce │ │ + b.n ab9de │ │ lsls r2, r7, #1 │ │ lsrs r0, r0, #8 │ │ movs r2, r0 │ │ - b.n ab9d6 │ │ + b.n ab9e6 │ │ lsls r0, r0, #2 │ │ subs r0, r0, r0 │ │ adds r0, #33 @ 0x21 │ │ - b.n ab9ba │ │ + b.n ab9ca │ │ adds r0, #2 │ │ - b.n aba3e │ │ + b.n aba4e │ │ movs r0, #3 │ │ - b.n ab3c6 │ │ + b.n ab3d6 │ │ lsrs r2, r0, #32 │ │ - b.n aba6a │ │ + b.n aba7a │ │ lsls r0, r1, #2 │ │ subs r0, r0, r0 │ │ adds r0, #128 @ 0x80 │ │ - b.n aaeee │ │ - b.n ab3f0 │ │ - b.n aaef8 │ │ + b.n aaefe │ │ + b.n ab400 │ │ + b.n aaf08 │ │ stmia r0!, {r2, r3} │ │ - b.n aaefc │ │ + b.n aaf0c │ │ strh r0, [r1, #0] │ │ - b.n aaf00 │ │ + b.n aaf10 │ │ movs r0, #12 │ │ - b.n aaf04 │ │ + b.n aaf14 │ │ str r0, [r1, r0] │ │ - b.n aaf08 │ │ + b.n aaf18 │ │ str r2, [r0, #0] │ │ - b.n ab43e │ │ + b.n ab44e │ │ strb r5, [r0, #0] │ │ - b.n ab43a │ │ + b.n ab44a │ │ str r6, [r0, #0] │ │ - b.n ab71c │ │ + b.n ab72c │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ stmia r0!, {r1} │ │ - b.n ab736 │ │ + b.n ab746 │ │ strh r5, [r0, #0] │ │ - b.n ab73a │ │ - blx 4aca3c │ │ + b.n ab74a │ │ + blx 4aca4c │ │ @ instruction: 0xfff5eaff │ │ str r0, [sp, #16] │ │ - b.n aaf2c │ │ - add r0, pc, #0 @ (adr r0, ab408 ) │ │ - b.n aaf30 │ │ + b.n aaf3c │ │ + add r0, pc, #0 @ (adr r0, ab418 ) │ │ + b.n aaf40 │ │ movs r0, #4 │ │ - b.n aaf34 │ │ + b.n aaf44 │ │ str r0, [r0, #0] │ │ - b.n aaf38 │ │ + b.n aaf48 │ │ str r2, [r0, r0] │ │ - b.n ab468 │ │ + b.n ab478 │ │ strb r6, [r0, #0] │ │ - b.n ab46e │ │ + b.n ab47e │ │ str r5, [r0, r0] │ │ - b.n ab74c │ │ + b.n ab75c │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ str r0, [sp, #8] │ │ - b.n ab766 │ │ - add r0, pc, #24 @ (adr r0, ab440 ) │ │ - b.n ab76a │ │ - blx 4aca6c │ │ + b.n ab776 │ │ + add r0, pc, #24 @ (adr r0, ab450 ) │ │ + b.n ab77a │ │ + blx 4aca7c │ │ @ instruction: 0xfff5eaff │ │ movs r0, #64 @ 0x40 │ │ - b.n aaf56 │ │ + b.n aaf66 │ │ movs r0, #104 @ 0x68 │ │ - b.n aaf5e │ │ + b.n aaf6e │ │ movs r2, r0 │ │ - b.n ab6fa │ │ + b.n ab70a │ │ lsls r4, r5, #1 │ │ subs r0, r0, r0 │ │ movs r0, #12 │ │ - b.n aaf66 │ │ + b.n aaf76 │ │ strb r2, [r0, #0] │ │ - b.n ab49a │ │ + b.n ab4aa │ │ strb r4, [r1, #0] │ │ - b.n ab77c │ │ + b.n ab78c │ │ str r0, [r2, #60] @ 0x3c │ │ lsls r0, r0, #7 │ │ strb r7, [r0, #0] │ │ movs r1, r5 │ │ str r6, [r0, #0] │ │ movs r2, r5 │ │ strb r7, [r0, #0] │ │ lsls r6, r2, #6 │ │ movs r0, r2 │ │ subs r0, r0, r0 │ │ movs r0, #0 │ │ - b.n abc26 │ │ + b.n abc36 │ │ movs r0, r0 │ │ - b.n abb0c │ │ + b.n abb1c │ │ movs r0, #8 │ │ - b.n aaf74 │ │ - bl 506f6e │ │ + b.n aaf84 │ │ + bl 506f7e │ │ movs r0, #12 │ │ - b.n aaf7c │ │ + b.n aaf8c │ │ movs r0, #64 @ 0x40 │ │ - b.n aaf9a │ │ + b.n aafaa │ │ adds r0, #1 │ │ - b.n abbbe │ │ + b.n abbce │ │ movs r0, #72 @ 0x48 │ │ - b.n aafa6 │ │ + b.n aafb6 │ │ adds r1, #200 @ 0xc8 │ │ - b.n aaf8a │ │ + b.n aaf9a │ │ adds r0, #32 │ │ - b.n abbca │ │ + b.n abbda │ │ movs r0, #4 │ │ - b.n aafae │ │ + b.n aafbe │ │ adds r0, #96 @ 0x60 │ │ asrs r0, r0, #12 │ │ asrs r3, r0, #32 │ │ - b.n ab59a │ │ + b.n ab5aa │ │ asrs r4, r0, #32 │ │ - b.n aaf9a │ │ + b.n aafaa │ │ movs r0, r0 │ │ - b.n abbde │ │ - beq.n ab4d8 │ │ - b.n ab938 │ │ + b.n abbee │ │ + beq.n ab4e8 │ │ + b.n ab948 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r4, r6, r7, r8, ip} │ │ - b.n aafe8 │ │ + b.n aaff8 │ │ asrs r1, r0, #32 │ │ - b.n ab5cc │ │ + b.n ab5dc │ │ asrs r2, r3, #1 │ │ - b.n ab054 │ │ + b.n ab064 │ │ movs r0, r0 │ │ - b.n abb58 │ │ + b.n abb68 │ │ lsls r7, r3, #1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #7 │ │ - b.n aaffc │ │ + b.n ab00c │ │ adds r1, #196 @ 0xc4 │ │ - b.n ab000 │ │ + b.n ab010 │ │ str r4, [r6, r0] │ │ - b.n aafe6 │ │ + b.n aaff6 │ │ asrs r1, r0, #32 │ │ - b.n ab5e8 │ │ + b.n ab5f8 │ │ movs r0, r6 │ │ - b.n aafee │ │ + b.n aaffe │ │ adds r0, #3 │ │ - b.n ab5f0 │ │ + b.n ab600 │ │ strb r4, [r6, #6] │ │ - b.n ab014 │ │ + b.n ab024 │ │ movs r0, r4 │ │ - b.n aaff4 │ │ + b.n ab004 │ │ movs r1, r0 │ │ - b.n abc1e │ │ + b.n abc2e │ │ movs r0, #12 │ │ - b.n aaffc │ │ + b.n ab00c │ │ movs r0, #232 @ 0xe8 │ │ - b.n abc26 │ │ + b.n abc36 │ │ strb r7, [r0, #0] │ │ - b.n ab608 │ │ + b.n ab618 │ │ str r4, [r4, r0] │ │ - b.n ab008 │ │ + b.n ab018 │ │ asrs r0, r0, #4 │ │ stmia.w sp, {r3, ip, sp, lr} │ │ - b.n ab010 │ │ - add r0, pc, #64 @ (adr r0, ab538 ) │ │ - b.n ab014 │ │ + b.n ab020 │ │ + add r0, pc, #64 @ (adr r0, ab548 ) │ │ + b.n ab024 │ │ str r0, [sp, #80] @ 0x50 │ │ - b.n ab018 │ │ + b.n ab028 │ │ strb r0, [r3, #0] │ │ - b.n ab01c │ │ + b.n ab02c │ │ lsls r3, r1, #1 │ │ and.w r0, r0, r6, lsr #32 │ │ - b.n abc4a │ │ + b.n abc5a │ │ movs r2, r0 │ │ and.w r0, r0, r5 │ │ - b.n ab852 │ │ + b.n ab862 │ │ movs r0, r0 │ │ and.w r0, r0, r1 │ │ - b.n abc5a │ │ + b.n abc6a │ │ asrs r0, r0, #5 │ │ - b.n ab05c │ │ + b.n ab06c │ │ ands r0, r0 │ │ - b.n ab862 │ │ + b.n ab872 │ │ movs r0, #122 @ 0x7a │ │ - b.n abc66 │ │ + b.n abc76 │ │ asrs r1, r0, #32 │ │ - b.n ab648 │ │ + b.n ab658 │ │ subs r0, r4, r5 │ │ add.w r0, r0, r4 │ │ - b.n ab872 │ │ - beq.n ab56c │ │ - b.n ab9cc │ │ + b.n ab882 │ │ + beq.n ab57c │ │ + b.n ab9dc │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, sp, lr} │ │ - b.n ab87e │ │ + b.n ab88e │ │ asrs r1, r6, #32 │ │ - b.n abc82 │ │ + b.n abc92 │ │ ands r0, r0 │ │ - b.n ab886 │ │ + b.n ab896 │ │ subs r6, r0, r6 │ │ add.w r0, r0, r0 │ │ - b.n abbee │ │ + b.n abbfe │ │ @ instruction: 0xfff11aff │ │ movs r0, #64 @ 0x40 │ │ - b.n ab07e │ │ + b.n ab08e │ │ movs r4, r0 │ │ - b.n ab89a │ │ + b.n ab8aa │ │ ands r6, r2 │ │ - b.n abc9e │ │ + b.n abcae │ │ asrs r6, r0, #32 │ │ - b.n ab8a2 │ │ + b.n ab8b2 │ │ movs r0, r0 │ │ - b.n abc0a │ │ + b.n abc1a │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ @ instruction: 0xff80eaff │ │ ands r5, r0 │ │ - b.n ab8b2 │ │ + b.n ab8c2 │ │ movs r0, r0 │ │ and.w r0, r0, ip, lsl #16 │ │ - b.n aba02 │ │ + b.n aba12 │ │ asrs r4, r4, #3 │ │ - b.n ab0bc │ │ + b.n ab0cc │ │ movs r4, r0 │ │ - b.n ab8c2 │ │ + b.n ab8d2 │ │ movs r0, #126 @ 0x7e │ │ - b.n abcc6 │ │ + b.n abcd6 │ │ asrs r1, r0, #32 │ │ - b.n ab6a8 │ │ + b.n ab6b8 │ │ subs r0, r1, r5 │ │ add.w r0, r0, r4 │ │ - b.n ab8d2 │ │ - beq.n ab5cc │ │ - b.n aba2c │ │ + b.n ab8e2 │ │ + beq.n ab5dc │ │ + b.n aba3c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r6, r7, ip} │ │ - b.n ab0dc │ │ + b.n ab0ec │ │ lsls r2, r0, #4 │ │ - b.n abce2 │ │ + b.n abcf2 │ │ movs r0, #129 @ 0x81 │ │ - b.n abce6 │ │ + b.n abcf6 │ │ asrs r1, r0, #32 │ │ - b.n ab6c8 │ │ + b.n ab6d8 │ │ subs r0, r0, r5 │ │ add.w r1, r0, r2 │ │ - b.n abcf2 │ │ - beq.n ab5ec │ │ - b.n aba4c │ │ + b.n abd02 │ │ + beq.n ab5fc │ │ + b.n aba5c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r1, r4, ip} │ │ - b.n abcfe │ │ + b.n abd0e │ │ mrrc2 11, 15, lr, r3, cr15 │ │ ands r0, r0 │ │ - b.n ab906 │ │ + b.n ab916 │ │ movs r0, r0 │ │ - b.n abc6a │ │ + b.n abc7a │ │ asrs r4, r3, #2 │ │ - b.n ab10c │ │ + b.n ab11c │ │ ands r1, r1 │ │ lsls r5, r0, #10 │ │ movs r0, #133 @ 0x85 │ │ - b.n abd16 │ │ + b.n abd26 │ │ asrs r1, r0, #32 │ │ - b.n ab6f8 │ │ + b.n ab708 │ │ movs r4, r0 │ │ - b.n ab91e │ │ + b.n ab92e │ │ subs r3, r6, r4 │ │ add.w r0, r0, r4 │ │ - b.n ab926 │ │ - beq.n ab620 │ │ - b.n aba80 │ │ + b.n ab936 │ │ + beq.n ab630 │ │ + b.n aba90 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, lr} │ │ - b.n abafa │ │ + b.n abb0a │ │ movs r0, r2 │ │ and.w r0, r0, r4, ror #1 │ │ - b.n ab138 │ │ + b.n ab148 │ │ ands r4, r0 │ │ - b.n abb06 │ │ + b.n abb16 │ │ movs r0, r0 │ │ - b.n ab720 │ │ + b.n ab730 │ │ lsls r2, r3, #1 │ │ - b.n ab1a6 │ │ + b.n ab1b6 │ │ movs r0, r0 │ │ - b.n abcaa │ │ + b.n abcba │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r4, #1 │ │ - b.n ab150 │ │ + b.n ab160 │ │ adds r0, #96 @ 0x60 │ │ - b.n ab154 │ │ + b.n ab164 │ │ lsls r0, r4, #1 │ │ - b.n ab158 │ │ + b.n ab168 │ │ asrs r1, r0, #32 │ │ - b.n ab73c │ │ + b.n ab74c │ │ adds r0, #3 │ │ - b.n ab740 │ │ - b.n ab624 │ │ - b.n ab140 │ │ + b.n ab750 │ │ + b.n ab634 │ │ + b.n ab150 │ │ movs r0, r0 │ │ - b.n ab748 │ │ + b.n ab758 │ │ movs r5, r0 │ │ @ instruction: 0xe98d0001 │ │ - b.n abd72 │ │ + b.n abd82 │ │ movs r0, #226 @ 0xe2 │ │ - b.n abd76 │ │ - bkpt 0x00fb │ │ + b.n abd86 │ │ + bkpt 0x00fa │ │ @ instruction: 0xebff1050 │ │ - b.n ab17c │ │ + b.n ab18c │ │ movs r4, r0 │ │ - b.n ab982 │ │ + b.n ab992 │ │ movs r0, #136 @ 0x88 │ │ - b.n abd86 │ │ + b.n abd96 │ │ asrs r1, r0, #32 │ │ - b.n ab768 │ │ + b.n ab778 │ │ subs r0, r3, r4 │ │ add.w r0, r0, r4 │ │ - b.n ab992 │ │ - beq.n ab68c │ │ - b.n abaec │ │ + b.n ab9a2 │ │ + beq.n ab69c │ │ + b.n abafc │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, lr} │ │ - b.n abd9e │ │ + b.n abdae │ │ @ instruction: 0xffc5eaff │ │ - lsrs r2, r5, #3 │ │ - vtbl.8 d16, {d22}, d10 │ │ - vtbx.8 d16, {d6}, d26 │ │ - vqshrun.s64 d16, q13, #10 │ │ - vqmovun.s32 d19, q6 │ │ - movs r3, r0 │ │ - subs r5, #164 @ 0xa4 │ │ - vdup.16 d30, d4[1] │ │ - vqrdmlsh.s q8, , d24[0] │ │ - vsubw.u , q11, d16 │ │ - movs r3, r0 │ │ - subs r6, #248 @ 0xf8 │ │ - vshll.i16 , d13, #16 │ │ - vceq.i16 d17, d24, #0 │ │ - vrintp.f16 q8, q5 │ │ + lsrs r4, r5, #2 │ │ + vtbx.8 d16, {d6}, d12 │ │ + vtbl.8 d16, {d6}, d28 │ │ + vqshl.u64 q8, q14, #54 @ 0x36 │ │ + vrshr.u32 , q6, #10 │ │ + movs r3, r0 │ │ + subs r6, #202 @ 0xca │ │ + @ instruction: 0xfff6ecd9 │ │ + @ instruction: 0xfff50ff3 │ │ + vrsra.u64 d19, d16, #10 │ │ + movs r3, r0 │ │ + ands r6, r3 │ │ + @ instruction: 0xfff6d34f │ │ + vsra.u32 d17, d19, #11 │ │ + vrintp.f16 d16, d12 │ │ @ instruction: 0xfff64ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n abbb8 │ │ - beq.n ab738 │ │ - b.n abb3c │ │ + b.n abbc8 │ │ + beq.n ab748 │ │ + b.n abb4c │ │ movs r0, r0 │ │ - b.n abd46 │ │ + b.n abd56 │ │ lsls r3, r7, #4 │ │ lsrs r0, r0, #8 │ │ movs r0, #0 │ │ - b.n ab1ce │ │ + b.n ab1de │ │ stmdb ip!, {r3, r8, r9, sp, lr, pc} │ │ subs r2, #49 @ 0x31 │ │ - b.n abcbc │ │ + b.n abccc │ │ vext.8 q15, , , #3 │ │ adds r3, #213 @ 0xd5 │ │ - b.n abd40 │ │ + b.n abd50 │ │ movs r3, r0 │ │ - b.n ab966 │ │ + b.n ab976 │ │ lsls r6, r6, #4 │ │ subs r0, r0, r0 │ │ adds r0, #64 @ 0x40 │ │ - b.n ab1ea │ │ + b.n ab1fa │ │ movs r0, #16 │ │ - b.n ab1f4 │ │ + b.n ab204 │ │ movs r0, r0 │ │ - b.n abd76 │ │ + b.n abd86 │ │ lsls r4, r6, #4 │ │ lsrs r0, r0, #8 │ │ movs r0, #4 │ │ - b.n ab1fa │ │ + b.n ab20a │ │ strh r5, [r0, #62] @ 0x3e │ │ - b.n abcee │ │ + b.n abcfe │ │ ldrh r7, [r7, #62] @ 0x3e │ │ - b.n abd80 │ │ + b.n abd90 │ │ movs r1, r2 │ │ - b.n abd0a │ │ + b.n abd1a │ │ lsls r1, r6, #4 │ │ subs r0, r0, r0 │ │ strb r0, [r0, #0] │ │ - b.n ab214 │ │ + b.n ab224 │ │ str r1, [r0, #100] @ 0x64 │ │ - b.n abd04 │ │ + b.n abd14 │ │ ldr r1, [r1, #40] @ 0x28 │ │ - b.n abd78 │ │ + b.n abd88 │ │ movs r6, r0 │ │ - b.n ab9a8 │ │ + b.n ab9b8 │ │ lsls r5, r6, #4 │ │ subs r0, r0, r0 │ │ adds r0, #4 │ │ - b.n ab228 │ │ + b.n ab238 │ │ movs r0, r0 │ │ - b.n abdac │ │ + b.n abdbc │ │ lsls r4, r6, #4 │ │ - ldr r2, [pc, #0] @ (ab708 ) │ │ + ldr r2, [pc, #0] @ (ab718 ) │ │ lsls r2, r0, #8 │ │ - b.n abd34 │ │ + b.n abd44 │ │ lsls r7, r6, #5 │ │ lsrs r0, r0, #8 │ │ adds r0, #32 │ │ - b.n abd16 │ │ + b.n abd26 │ │ adds r0, #2 │ │ - b.n abd9a │ │ + b.n abdaa │ │ movs r0, #3 │ │ - b.n ab722 │ │ + b.n ab732 │ │ movs r3, r0 │ │ - b.n ab9c6 │ │ + b.n ab9d6 │ │ lsls r6, r6, #4 │ │ subs r0, r0, r0 │ │ str r0, [sp, #512] @ 0x200 │ │ - b.n ab24a │ │ + b.n ab25a │ │ movs r0, r0 │ │ - b.n abde0 │ │ + b.n abdf0 │ │ lsls r1, r6, #3 │ │ lsrs r0, r0, #8 │ │ movs r0, #48 @ 0x30 │ │ - b.n abc36 │ │ + b.n abc46 │ │ ands r0, r1 │ │ - b.n abc4c │ │ + b.n abc5c │ │ movs r0, #52 @ 0x34 │ │ - b.n ab258 │ │ + b.n ab268 │ │ adds r0, #0 │ │ - b.n abe82 │ │ + b.n abe92 │ │ strh r0, [r0, #0] │ │ - b.n abf06 │ │ + b.n abf16 │ │ movs r2, #248 @ 0xf8 │ │ - b.n ab9e0 │ │ + b.n ab9f0 │ │ movs r0, #16 │ │ - b.n ab280 │ │ + b.n ab290 │ │ movs r0, #48 @ 0x30 │ │ - b.n ab168 │ │ + b.n ab178 │ │ str r4, [r1, #0] │ │ - b.n ab288 │ │ - bl 507256 │ │ - add r0, pc, #32 @ (adr r0, ab77c ) │ │ - b.n ab290 │ │ - bl 50725e │ │ + b.n ab298 │ │ + bl 507266 │ │ + add r0, pc, #32 @ (adr r0, ab78c ) │ │ + b.n ab2a0 │ │ + bl 50726e │ │ movs r0, #12 │ │ - b.n ab298 │ │ - bl 507266 │ │ + b.n ab2a8 │ │ + bl 507276 │ │ adds r0, #8 │ │ - b.n ab2a0 │ │ - bl 50726e │ │ + b.n ab2b0 │ │ + bl 50727e │ │ strb r2, [r0, #0] │ │ - b.n ab7c2 │ │ + b.n ab7d2 │ │ str r3, [r0, r0] │ │ - b.n ab7ce │ │ + b.n ab7de │ │ strb r7, [r0, #0] │ │ - b.n abaa8 │ │ + b.n abab8 │ │ movs r7, r1 │ │ lsrs r0, r0, #8 │ │ str r2, [r0, #0] │ │ - b.n abac6 │ │ - add r0, pc, #12 @ (adr r0, ab794 ) │ │ - b.n abaca │ │ - blx 4acdcc │ │ + b.n abad6 │ │ + add r0, pc, #12 @ (adr r0, ab7a4 ) │ │ + b.n abada │ │ + blx 4acddc │ │ @ instruction: 0xfff3eaff │ │ str r0, [r0, r0] │ │ - b.n abad6 │ │ + b.n abae6 │ │ strb r1, [r0, #0] │ │ - b.n abada │ │ + b.n abaea │ │ movs r4, r0 │ │ - b.n abade │ │ + b.n abaee │ │ asrs r1, r0, #32 │ │ - b.n abee2 │ │ - blx 4acde4 │ │ + b.n abef2 │ │ + blx 4acdf4 │ │ str r6, [r1, #0] │ │ - b.n abaea │ │ - bfcsel 10, aafaa , 12, cs │ │ - b.n ab7bc │ │ - b.n abaf2 │ │ - add r0, pc, #0 @ (adr r0, ab7b4 ) │ │ - b.n abaf6 │ │ + b.n abafa │ │ + bfcsel 10, abfba , 12, cs │ │ + b.n ab7cc │ │ + b.n abb02 │ │ + add r0, pc, #0 @ (adr r0, ab7c4 ) │ │ + b.n abb06 │ │ str r1, [r0, #0] │ │ - b.n abafa │ │ + b.n abb0a │ │ movs r5, r0 │ │ - b.n abafe │ │ + b.n abb0e │ │ asrs r7, r0, #32 │ │ - b.n abb02 │ │ + b.n abb12 │ │ movs r0, #208 @ 0xd0 │ │ - b.n abb4e │ │ + b.n abb5e │ │ strb r3, [r0, #0] │ │ - b.n ab816 │ │ + b.n ab826 │ │ movs r0, #2 │ │ - b.n ab822 │ │ + b.n ab832 │ │ movs r0, #7 │ │ - b.n abaf6 │ │ + b.n abb06 │ │ @ instruction: 0xffee1aff │ │ str r4, [r5, #0] │ │ - b.n ab1f0 │ │ + b.n ab200 │ │ movs r0, #4 │ │ - b.n ab310 │ │ - bl 5072de │ │ + b.n ab320 │ │ + bl 5072ee │ │ stmia r0!, {} │ │ - b.n ab318 │ │ - bl 5072e6 │ │ + b.n ab328 │ │ + bl 5072f6 │ │ adds r0, #4 │ │ - b.n ab320 │ │ - bl 5072ee │ │ + b.n ab330 │ │ + bl 5072fe │ │ strb r0, [r0, #0] │ │ - b.n ab328 │ │ + b.n ab338 │ │ str r3, [r0, r0] │ │ - b.n ab83e │ │ + b.n ab84e │ │ str r7, [r0, #0] │ │ - b.n ab856 │ │ + b.n ab866 │ │ str r5, [r0, #0] │ │ - b.n abb2e │ │ - bl 507302 │ │ + b.n abb3e │ │ + bl 507312 │ │ lsls r5, r0, #1 │ │ subs r0, r0, r0 │ │ str r0, [r2, #12] │ │ - b.n abba0 │ │ + b.n abbb0 │ │ adds r0, #7 │ │ - b.n ab856 │ │ + b.n ab866 │ │ strb r6, [r0, #0] │ │ - b.n ab86e │ │ + b.n ab87e │ │ adds r0, #3 │ │ - b.n abb48 │ │ + b.n abb58 │ │ movs r6, r5 │ │ subs r0, r0, r0 │ │ adds r0, #64 @ 0x40 │ │ - b.n ab342 │ │ + b.n ab352 │ │ str r0, [r6, r0] │ │ - b.n ab25c │ │ + b.n ab26c │ │ strb r0, [r5, #1] │ │ - b.n ab350 │ │ + b.n ab360 │ │ movs r7, r0 │ │ - b.n abad8 │ │ + b.n abae8 │ │ lsls r0, r3, #2 │ │ subs r0, r0, r0 │ │ adds r0, #1 │ │ - b.n abce6 │ │ + b.n abcf6 │ │ str r4, [r5, r0] │ │ - b.n ab270 │ │ + b.n ab280 │ │ strb r0, [r0, #0] │ │ - b.n abdce │ │ + b.n abdde │ │ adds r0, #3 │ │ - b.n ab896 │ │ + b.n ab8a6 │ │ strb r7, [r0, #0] │ │ - b.n ab890 │ │ + b.n ab8a0 │ │ adds r0, #7 │ │ - b.n abb70 │ │ + b.n abb80 │ │ movs r1, r0 │ │ asrs r2, r6, #13 │ │ lsls r1, r5, #2 │ │ lsrs r0, r0, #8 │ │ adds r0, #8 │ │ - b.n ab8aa │ │ + b.n ab8ba │ │ strb r0, [r1, #0] │ │ - b.n ab8a4 │ │ + b.n ab8b4 │ │ adds r0, #7 │ │ - b.n abb84 │ │ + b.n abb94 │ │ adds r0, #52 @ 0x34 │ │ lsls r5, r3, #22 │ │ str r0, [r2, #12] │ │ lsls r3, r0, #7 │ │ adds r0, #7 │ │ movs r2, r4 │ │ strb r6, [r0, #0] │ │ movs r4, r5 │ │ adds r0, #3 │ │ lsls r7, r2, #6 │ │ lsls r2, r3, #2 │ │ subs r0, r0, r0 │ │ movs r0, #4 │ │ - b.n ab41a │ │ + b.n ab42a │ │ movs r2, r0 │ │ - b.n abea2 │ │ + b.n abeb2 │ │ lsls r5, r3, #2 │ │ subs r0, r0, r0 │ │ movs r2, #216 @ 0xd8 │ │ - b.n abb1c │ │ + b.n abb2c │ │ movs r0, #12 │ │ - b.n ab3aa │ │ + b.n ab3ba │ │ movs r2, #248 @ 0xf8 │ │ - b.n abb24 │ │ + b.n abb34 │ │ cmp r7, #159 @ 0x9f │ │ - b.n abbfa │ │ + b.n abc0a │ │ strb r0, [r1, #0] │ │ - b.n ab8dc │ │ + b.n ab8ec │ │ movs r0, #8 │ │ - b.n ab8de │ │ + b.n ab8ee │ │ movs r0, #7 │ │ - b.n abbc2 │ │ + b.n abbd2 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ - bl 5073a2 │ │ + bl 5073b2 │ │ str r0, [r3, #44] @ 0x2c │ │ - b.n abb40 │ │ + b.n abb50 │ │ cmp r7, #150 @ 0x96 │ │ - b.n abbf6 │ │ + b.n abc06 │ │ movs r0, r0 │ │ - b.n abf56 │ │ + b.n abf66 │ │ movs r6, r4 │ │ lsrs r0, r0, #8 │ │ cmp r7, #159 @ 0x9f │ │ - b.n abc22 │ │ + b.n abc32 │ │ strb r0, [r1, #0] │ │ - b.n ab902 │ │ + b.n ab912 │ │ movs r0, #8 │ │ - b.n ab908 │ │ + b.n ab918 │ │ movs r0, #2 │ │ - b.n abbf4 │ │ + b.n abc04 │ │ @ instruction: 0xfff60aff │ │ - bl 4cb3ca │ │ - bl 5073ce │ │ - blx 4acf14 │ │ + bl 4cb3da │ │ + bl 5073de │ │ + blx 4acf24 │ │ @ instruction: 0xff9beaff │ │ asrs r0, r6, #32 │ │ - b.n ab3f8 │ │ + b.n ab408 │ │ strb r0, [r0, #0] │ │ - b.n abc22 │ │ + b.n abc32 │ │ movs r1, r1 │ │ - b.n abc26 │ │ + b.n abc36 │ │ asrs r1, r0, #32 │ │ - b.n ac02a │ │ - blx 4acf2c │ │ + b.n ac03a │ │ + blx 4acf3c │ │ str r6, [r1, r0] │ │ - b.n abc32 │ │ - bfcsel e, ab0f2 , 12, le │ │ + b.n abc42 │ │ + bfcsel e, ac102 , 12, le │ │ stmia r0!, {} │ │ - b.n abc3a │ │ + b.n abc4a │ │ movs r0, #1 │ │ - b.n abc3e │ │ + b.n abc4e │ │ movs r7, r0 │ │ - b.n abc42 │ │ + b.n abc52 │ │ asrs r0, r6, #32 │ │ - b.n ab440 │ │ + b.n ab450 │ │ str r0, [r2, #12] │ │ - b.n abc9c │ │ + b.n abcac │ │ adds r0, #7 │ │ - b.n ab952 │ │ - b.n ab91a │ │ - b.n abc52 │ │ + b.n ab962 │ │ + b.n ab92a │ │ + b.n abc62 │ │ strb r6, [r0, #0] │ │ - b.n ab96e │ │ + b.n ab97e │ │ adds r0, #3 │ │ - b.n abc48 │ │ + b.n abc58 │ │ @ instruction: 0xffbf0aff │ │ @ instruction: 0xffeeeaff │ │ - blx 4acf64 │ │ + blx 4acf74 │ │ movs r0, #3 │ │ - b.n abc6a │ │ + b.n abc7a │ │ stmia r0!, {r0, r1, r2} │ │ - b.n abc6e │ │ + b.n abc7e │ │ adds r0, #4 │ │ - b.n ab464 │ │ - bl 507432 │ │ + b.n ab474 │ │ + bl 507442 │ │ strb r0, [r0, #0] │ │ - b.n ab46c │ │ + b.n ab47c │ │ str r3, [r0, #0] │ │ - b.n ab982 │ │ + b.n ab992 │ │ str r7, [r0, r0] │ │ - b.n ab99a │ │ + b.n ab9aa │ │ str r6, [r0, #0] │ │ - b.n abc70 │ │ - bl 507446 │ │ + b.n abc80 │ │ + bl 507456 │ │ @ instruction: 0xffae0aff │ │ @ instruction: 0xfff3eaff │ │ - bl 507452 │ │ + bl 507462 │ │ strh r4, [r0, #0] │ │ - b.n ab48c │ │ - bl 50745a │ │ - add r0, pc, #0 @ (adr r0, ab960 ) │ │ - b.n ab494 │ │ - bl 507462 │ │ + b.n ab49c │ │ + bl 50746a │ │ + add r0, pc, #0 @ (adr r0, ab970 ) │ │ + b.n ab4a4 │ │ + bl 507472 │ │ movs r0, #4 │ │ - b.n ab49c │ │ - bl 50746a │ │ + b.n ab4ac │ │ + bl 50747a │ │ adds r0, #0 │ │ - b.n ab4a4 │ │ - bl 507472 │ │ + b.n ab4b4 │ │ + bl 507482 │ │ strb r2, [r0, #0] │ │ - b.n ab9ca │ │ + b.n ab9da │ │ str r3, [r0, #0] │ │ - b.n ab9d2 │ │ + b.n ab9e2 │ │ strb r7, [r0, #0] │ │ - b.n abcae │ │ + b.n abcbe │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ strh r2, [r0, #0] │ │ - b.n abcca │ │ - add r0, pc, #12 @ (adr r0, ab998 ) │ │ - b.n abcce │ │ - blx 4acfd0 │ │ + b.n abcda │ │ + add r0, pc, #12 @ (adr r0, ab9a8 ) │ │ + b.n abcde │ │ + blx 4acfe0 │ │ @ instruction: 0xfff3eaff │ │ movs r0, #208 @ 0xd0 │ │ - b.n abd2c │ │ + b.n abd3c │ │ strb r3, [r0, #0] │ │ - b.n ab9ee │ │ + b.n ab9fe │ │ movs r0, #2 │ │ - b.n ab9f6 │ │ + b.n aba06 │ │ movs r0, #7 │ │ - b.n abcca │ │ + b.n abcda │ │ movs r4, r1 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, r0] │ │ - b.n abcee │ │ + b.n abcfe │ │ strb r1, [r0, #0] │ │ - b.n abcf2 │ │ + b.n abd02 │ │ movs r1, r1 │ │ - b.n abcf6 │ │ + b.n abd06 │ │ asrs r1, r0, #32 │ │ - b.n ac0fa │ │ - blx 4acffc │ │ + b.n ac10a │ │ + blx 4ad00c │ │ str r6, [r1, #0] │ │ - b.n abd02 │ │ - bfcsel e, ab1c2 , 12, eq │ │ - add r0, pc, #0 @ (adr r0, ab9c8 ) │ │ - b.n abd0a │ │ + b.n abd12 │ │ + bfcsel e, ac1d2 , 12, eq │ │ + add r0, pc, #0 @ (adr r0, ab9d8 ) │ │ + b.n abd1a │ │ strh r1, [r0, #0] │ │ - b.n abd0e │ │ - b.n ab9dc │ │ - b.n abd12 │ │ + b.n abd1e │ │ + b.n ab9ec │ │ + b.n abd22 │ │ movs r5, r0 │ │ - b.n abd16 │ │ + b.n abd26 │ │ asrs r7, r0, #32 │ │ - b.n abd1a │ │ + b.n abd2a │ │ @ instruction: 0xffedeaff │ │ stmia r0!, {r2, r3} │ │ - b.n ab514 │ │ - bl 5074e2 │ │ + b.n ab524 │ │ + bl 5074f2 │ │ strb r0, [r1, #0] │ │ - b.n ab51c │ │ - bl 5074ea │ │ + b.n ab52c │ │ + bl 5074fa │ │ adds r0, #12 │ │ - b.n ab524 │ │ - bl 5074f2 │ │ + b.n ab534 │ │ + bl 507502 │ │ str r0, [r1, r0] │ │ - b.n ab52c │ │ + b.n ab53c │ │ str r3, [r0, #0] │ │ - b.n aba56 │ │ + b.n aba66 │ │ movs r0, #5 │ │ - b.n aba50 │ │ + b.n aba60 │ │ movs r0, #6 │ │ - b.n abd2a │ │ - bl 507506 │ │ + b.n abd3a │ │ + bl 507516 │ │ lsls r2, r7, #2 │ │ subs r0, r0, r0 │ │ movs r0, #208 @ 0xd0 │ │ - b.n abd9a │ │ + b.n abdaa │ │ str r3, [r0, #0] │ │ - b.n aba6e │ │ + b.n aba7e │ │ movs r0, #2 │ │ - b.n aba68 │ │ + b.n aba78 │ │ movs r0, #6 │ │ - b.n abd42 │ │ + b.n abd52 │ │ movs r4, r1 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, r0] │ │ - b.n abd66 │ │ + b.n abd76 │ │ str r1, [r0, #0] │ │ - b.n abd6a │ │ + b.n abd7a │ │ movs r4, r0 │ │ - b.n abd6e │ │ + b.n abd7e │ │ asrs r1, r0, #32 │ │ - b.n ac172 │ │ - blx 4ad074 │ │ + b.n ac182 │ │ + blx 4ad084 │ │ strb r6, [r1, #0] │ │ - b.n abd7a │ │ - bfx c, r5 │ │ - b.n aba4e │ │ - b.n abd82 │ │ + b.n abd8a │ │ + bfx c, r4 │ │ + b.n aba5e │ │ + b.n abd92 │ │ strb r0, [r0, #0] │ │ - b.n abd86 │ │ + b.n abd96 │ │ stmia r0!, {r0} │ │ - b.n abd8a │ │ + b.n abd9a │ │ movs r5, r0 │ │ - b.n abd8e │ │ + b.n abd9e │ │ asrs r6, r0, #32 │ │ - b.n abd92 │ │ + b.n abda2 │ │ @ instruction: 0xffedeaff │ │ movs r0, #52 @ 0x34 │ │ - b.n ab594 │ │ + b.n ab5a4 │ │ lsls r0, r2, #8 │ │ ldmia.w r2, {r0, r3, sp} │ │ - b.n abab2 │ │ + b.n abac2 │ │ adds r0, #4 │ │ - b.n ababa │ │ + b.n abaca │ │ movs r0, #2 │ │ - b.n abd90 │ │ + b.n abda0 │ │ movs r0, #12 │ │ lsls r0, r2, #22 │ │ movs r0, #2 │ │ movs r7, r4 │ │ movs r0, #12 │ │ lsls r2, r2, #6 │ │ lsls r5, r4, #1 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #32 │ │ - b.n ab59e │ │ + b.n ab5ae │ │ strh r0, [r0, #0] │ │ - b.n ac1c2 │ │ + b.n ac1d2 │ │ asrs r0, r4, #1 │ │ - b.n ac208 │ │ + b.n ac218 │ │ asrs r4, r0, #32 │ │ - b.n ab58a │ │ + b.n ab59a │ │ movs r0, r1 │ │ - b.n abdce │ │ - beq.n abac8 │ │ - b.n abf28 │ │ + b.n abdde │ │ + beq.n abad8 │ │ + b.n abf38 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r4, r7, r9} │ │ - b.n ab5d8 │ │ + b.n ab5e8 │ │ movs r0, r0 │ │ - b.n abbbc │ │ + b.n abbcc │ │ lsls r2, r3, #1 │ │ - b.n ab642 │ │ + b.n ab652 │ │ movs r0, r0 │ │ - b.n ac146 │ │ + b.n ac156 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #10 │ │ - b.n ab5ec │ │ + b.n ab5fc │ │ movs r0, #252 @ 0xfc │ │ - b.n ac1f2 │ │ + b.n ac202 │ │ adds r2, #128 @ 0x80 │ │ - b.n ab5f4 │ │ + b.n ab604 │ │ lsls r0, r0, #10 │ │ - b.n ab5f8 │ │ + b.n ab608 │ │ asrs r1, r0, #32 │ │ - b.n abbdc │ │ + b.n abbec │ │ adds r0, #3 │ │ - b.n abbe0 │ │ + b.n abbf0 │ │ str r0, [r0, r0] │ │ - b.n ab5e0 │ │ + b.n ab5f0 │ │ movs r0, r0 │ │ - b.n abbe8 │ │ + b.n abbf8 │ │ lsls r1, r0, #2 │ │ @ instruction: 0xe98d0001 │ │ - b.n ac212 │ │ - pop {r2, r4, r6, r7, pc} │ │ + b.n ac222 │ │ + pop {r0, r1, r4, r6, r7, pc} │ │ @ instruction: 0xebff87c5 │ │ - b.n ac0ea │ │ + b.n ac0fa │ │ ldrh r7, [r7, #62] @ 0x3e │ │ - b.n ac17c │ │ + b.n ac18c │ │ movs r1, r4 │ │ and.w r2, r0, r8, lsr #13 │ │ - b.n ab624 │ │ + b.n ab634 │ │ adds r0, #3 │ │ - b.n abc08 │ │ + b.n abc18 │ │ adds r0, #90 @ 0x5a │ │ - b.n ab694 │ │ + b.n ab6a4 │ │ movs r0, r0 │ │ - b.n ac198 │ │ + b.n ac1a8 │ │ adds r0, #44 @ 0x2c │ │ - b.n ab52c │ │ + b.n ab53c │ │ lsls r7, r3, #1 │ │ subs r0, r0, r0 │ │ str r1, [r0, r0] │ │ - b.n abe3e │ │ + b.n abe4e │ │ asrs r7, r2, #32 │ │ - b.n ac242 │ │ + b.n ac252 │ │ str r6, [r1, #0] │ │ - b.n abe46 │ │ + b.n abe56 │ │ ands r0, r0 │ │ - b.n abe4a │ │ + b.n abe5a │ │ @ instruction: 0xfb00ebff │ │ movs r0, r0 │ │ - b.n ac1b2 │ │ + b.n ac1c2 │ │ movs r7, r1 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n ac1c4 │ │ + b.n ac1d4 │ │ movs r2, r3 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n abe62 │ │ + b.n abe72 │ │ adds r2, r0, r0 │ │ - b.n ac266 │ │ + b.n ac276 │ │ lsls r0, r2, #2 │ │ @ instruction: 0xeb008000 │ │ - b.n ac2ee │ │ + b.n ac2fe │ │ movs r0, r0 │ │ - b.n ac1d2 │ │ + b.n ac1e2 │ │ @ instruction: 0xffd40aff │ │ asrs r4, r5, #8 │ │ - b.n ab678 │ │ + b.n ab688 │ │ strh r0, [r0, #0] │ │ - b.n abe7e │ │ + b.n abe8e │ │ movs r0, #158 @ 0x9e │ │ - b.n ac282 │ │ + b.n ac292 │ │ asrs r1, r0, #32 │ │ - b.n abc64 │ │ + b.n abc74 │ │ adds r1, r3, r7 │ │ add.w r0, r0, r8 │ │ - b.n abe8e │ │ - beq.n abb88 │ │ - b.n abfe8 │ │ + b.n abe9e │ │ + beq.n abb98 │ │ + b.n abff8 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {pc} │ │ - b.n abe9a │ │ + b.n abeaa │ │ lsrs r5, r6, #4 │ │ - b.n ac16e │ │ + b.n ac17e │ │ lsrs r7, r7, #31 │ │ - b.n ac200 │ │ + b.n ac210 │ │ movs r0, r0 │ │ - b.n abe16 │ │ + b.n abe26 │ │ @ instruction: 0xffea0aff │ │ asrs r0, r6, #7 │ │ - b.n ab6ac │ │ + b.n ab6bc │ │ asrs r1, r0, #32 │ │ - b.n abc90 │ │ + b.n abca0 │ │ movs r0, r1 │ │ - b.n abeb6 │ │ + b.n abec6 │ │ movs r0, #154 @ 0x9a │ │ - b.n ac2ba │ │ + b.n ac2ca │ │ adds r4, r1, r7 │ │ add.w r0, r0, r8 │ │ - b.n abec2 │ │ - beq.n abbbc │ │ - b.n ac01c │ │ + b.n abed2 │ │ + beq.n abbcc │ │ + b.n ac02c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r4, r6, r7, r8, ip} │ │ - b.n ab6cc │ │ + b.n ab6dc │ │ strh r1, [r1, #0] │ │ - b.n ac09e │ │ + b.n ac0ae │ │ asrs r1, r0, #32 │ │ - b.n abcb4 │ │ + b.n abcc4 │ │ @ instruction: 0xfff5eaff │ │ strh r6, [r2, #0] │ │ - b.n ac2de │ │ + b.n ac2ee │ │ movs r4, r0 │ │ @ instruction: 0xea00800e │ │ - b.n abee6 │ │ + b.n abef6 │ │ movs r2, r0 │ │ @ instruction: 0xea008001 │ │ - b.n ac2ee │ │ + b.n ac2fe │ │ movs r0, r0 │ │ @ instruction: 0xea008003 │ │ - b.n ac046 │ │ + b.n ac056 │ │ asrs r4, r5, #5 │ │ - b.n ab6f8 │ │ + b.n ab708 │ │ movs r0, r1 │ │ - b.n abefe │ │ + b.n abf0e │ │ movs r0, #143 @ 0x8f │ │ - b.n ac302 │ │ + b.n ac312 │ │ asrs r1, r0, #32 │ │ - b.n abce4 │ │ + b.n abcf4 │ │ adds r1, r7, r6 │ │ add.w r0, r0, r8 │ │ - b.n abf0e │ │ - beq.n abc08 │ │ - b.n ac068 │ │ + b.n abf1e │ │ + beq.n abc18 │ │ + b.n ac078 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, r2, r3, pc} │ │ - b.n abf1a │ │ + b.n abf2a │ │ movs r0, r0 │ │ @ instruction: 0xea008010 │ │ - b.n ac072 │ │ + b.n ac082 │ │ asrs r4, r0, #5 │ │ - b.n ab724 │ │ + b.n ab734 │ │ movs r0, r1 │ │ - b.n abf2a │ │ + b.n abf3a │ │ movs r0, #147 @ 0x93 │ │ - b.n ac32e │ │ + b.n ac33e │ │ asrs r1, r0, #32 │ │ - b.n abd10 │ │ + b.n abd20 │ │ adds r6, r5, r6 │ │ add.w r0, r0, r8 │ │ - b.n abf3a │ │ - beq.n abc34 │ │ - b.n ac094 │ │ + b.n abf4a │ │ + beq.n abc44 │ │ + b.n ac0a4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {pc} │ │ - b.n ac346 │ │ + b.n ac356 │ │ movs r0, r1 │ │ - b.n abf4a │ │ - beq.n abc44 │ │ - b.n ac0a4 │ │ + b.n abf5a │ │ + beq.n abc54 │ │ + b.n ac0b4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r4, r5, r8, sp} │ │ - b.n ab754 │ │ + b.n ab764 │ │ movs r0, #2 │ │ - b.n abd38 │ │ + b.n abd48 │ │ movs r0, #90 @ 0x5a │ │ - b.n ab7c2 │ │ + b.n ab7d2 │ │ movs r0, r0 │ │ - b.n ac2c6 │ │ + b.n ac2d6 │ │ @ instruction: 0xffb40aff │ │ str r0, [r5, #16] │ │ - b.n ab768 │ │ + b.n ab778 │ │ adds r1, #40 @ 0x28 │ │ - b.n ab76c │ │ + b.n ab77c │ │ movs r0, #12 │ │ - b.n ab752 │ │ + b.n ab762 │ │ str r6, [r0, #0] │ │ - b.n abd54 │ │ + b.n abd64 │ │ str r0, [r4, r4] │ │ - b.n ab778 │ │ + b.n ab788 │ │ adds r0, #3 │ │ - b.n abd5c │ │ + b.n abd6c │ │ ands r0, r4 │ │ - b.n ab75c │ │ + b.n ab76c │ │ ands r0, r0 │ │ - b.n abf86 │ │ + b.n abf96 │ │ str r5, [r0, r0] │ │ - b.n abd68 │ │ + b.n abd78 │ │ movs r0, #12 │ │ - b.n ab768 │ │ + b.n ab778 │ │ str r0, [r1, r0] │ │ - b.n ab76c │ │ + b.n ab77c │ │ movs r1, r0 │ │ - b.n ac396 │ │ + b.n ac3a6 │ │ str r0, [r3, r0] │ │ - b.n ab774 │ │ + b.n ab784 │ │ str r1, [r0, r0] │ │ - b.n abf9e │ │ + b.n abfae │ │ asrs r6, r0, #32 │ │ - b.n abfa2 │ │ + b.n abfb2 │ │ cmp r7, #70 @ 0x46 │ │ - b.n ac3a6 │ │ + b.n ac3b6 │ │ str r0, [sp, #144] @ 0x90 │ │ - b.n ab784 │ │ + b.n ab794 │ │ asrs r0, r0, #2 │ │ stmia.w sp, {r4, sp, pc} │ │ - b.n ab78c │ │ + b.n ab79c │ │ strh r4, [r2, #0] │ │ - b.n ab790 │ │ + b.n ab7a0 │ │ movs r7, r2 │ │ @ instruction: 0xea0090c4 │ │ - b.n ab7bc │ │ + b.n ab7cc │ │ str r3, [r0, #0] │ │ - b.n abfc2 │ │ + b.n abfd2 │ │ adds r0, #192 @ 0xc0 │ │ - b.n ab7c4 │ │ + b.n ab7d4 │ │ ands r4, r6 │ │ - b.n ab7c4 │ │ + b.n ab7d4 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n abdac │ │ + b.n abdbc │ │ adds r0, #3 │ │ - b.n abdb0 │ │ + b.n abdc0 │ │ lsrs r0, r2 │ │ - b.n ac01e │ │ + b.n ac02e │ │ strb r0, [r6, #2] │ │ - b.n ab7d8 │ │ + b.n ab7e8 │ │ cmn r0, r7 │ │ - b.n ac038 │ │ + b.n ac048 │ │ str r1, [r0, r0] │ │ - b.n ac152 │ │ + b.n ac162 │ │ ands r0, r0 │ │ - b.n ac236 │ │ + b.n ac246 │ │ strb r7, [r0, #0] │ │ - b.n abdc8 │ │ + b.n abdd8 │ │ str r0, [r2, r0] │ │ - b.n ab7c8 │ │ + b.n ab7d8 │ │ str r1, [r0, r0] │ │ - b.n abff2 │ │ + b.n ac002 │ │ ands r4, r2 │ │ - b.n ab7d0 │ │ + b.n ab7e0 │ │ ands r0, r0 │ │ - b.n abffa │ │ + b.n ac00a │ │ movs r0, #28 │ │ - b.n ab7d8 │ │ + b.n ab7e8 │ │ movs r1, r0 │ │ - b.n ac402 │ │ + b.n ac412 │ │ stmia r0!, {r3, r4} │ │ - b.n ab7e0 │ │ + b.n ab7f0 │ │ asrs r1, r1, #32 │ │ - b.n ac00a │ │ + b.n ac01a │ │ strb r0, [r4, #0] │ │ - b.n ab7e8 │ │ + b.n ab7f8 │ │ movs r1, #3 │ │ - b.n ac2d2 │ │ - add r0, pc, #0 @ (adr r0, abcd4 ) │ │ - b.n ab7f0 │ │ + b.n ac2e2 │ │ + add r0, pc, #0 @ (adr r0, abce4 ) │ │ + b.n ab800 │ │ lsls r0, r0, #3 │ │ @ instruction: 0xe98d600e │ │ - b.n ac01e │ │ - pop {r0, r4, r6, pc} │ │ + b.n ac02e │ │ + pop {r4, r6, pc} │ │ @ instruction: 0xebffe006 │ │ - b.n ac026 │ │ + b.n ac036 │ │ asrs r5, r0, #32 │ │ - b.n ac02a │ │ + b.n ac03a │ │ movs r4, r0 │ │ - b.n ac02e │ │ + b.n ac03e │ │ @ instruction: 0xff81eaff │ │ strh r1, [r0, #0] │ │ - b.n ac436 │ │ + b.n ac446 │ │ @ instruction: 0xffb9eaff │ │ - blx 4ad33c │ │ + blx 4ad34c │ │ stmia r0!, {r0, r1} │ │ - b.n ac042 │ │ + b.n ac052 │ │ strb r5, [r0, #0] │ │ - b.n ac046 │ │ + b.n ac056 │ │ adds r0, #12 │ │ - b.n ab83c │ │ - bl 50780a │ │ + b.n ab84c │ │ + bl 50781a │ │ str r0, [r1, r0] │ │ - b.n ab844 │ │ + b.n ab854 │ │ movs r0, #3 │ │ - b.n abd6e │ │ + b.n abd7e │ │ str r5, [r0, #0] │ │ - b.n abd68 │ │ + b.n abd78 │ │ movs r0, #2 │ │ - b.n ac04a │ │ - bl 50781e │ │ + b.n ac05a │ │ + bl 50782e │ │ vpmin.u q0, , │ │ @ instruction: 0xfff3eaff │ │ - udf #65 @ 0x41 │ │ - vcvt.f32.u32 d29, d5, #11 │ │ - @ instruction: 0xfff52db0 │ │ - movs r3, r0 │ │ - b.n abc36 │ │ - vabs.f16 q15, q10 │ │ - vcge.s16 q15, , #0 │ │ - vqrdmulh.s q9, , d20[0] │ │ - movs r3, r0 │ │ - b.n ab8a6 │ │ - vtbx.8 d31, {d5}, d6 │ │ - vtbx.8 d16, {d5-d6}, d24 │ │ - vcvt.f16.u16 d18, d20, #10 │ │ - movs r3, r0 │ │ - b.n ab966 │ │ - vceq.f16 d16, d16, #0 │ │ - vtbx.8 d16, {d22-d23}, d8 │ │ - @ instruction: 0xfff6de95 │ │ - vcvt.f32.u32 , , #11 │ │ - vqrdmlah.s , , d1[0] │ │ + svc 20 │ │ + vqrdmlah.s , , d24[0] │ │ + vqrdmulh.s q9, , d0[0] │ │ + movs r3, r0 │ │ + ldrex pc, [r4, #980] @ 0x3d4 │ │ + @ instruction: 0xe839fff5 │ │ + b.n ac094 │ │ + vcvt.u16.f16 q9, q10, #11 │ │ + movs r3, r0 │ │ + b.n aba60 │ │ + vneg.f16 d31, d5 │ │ + vqrshrn.u64 d16, , #11 │ │ + vdup.16 q9, d4[1] │ │ + movs r3, r0 │ │ + b.n abb20 │ │ + vcge.f16 q8, q9, #0 │ │ + @ instruction: 0xfff609d3 │ │ + vqrdmlsh.s , q3, d24[0] │ │ + vqrdmlsh.s , , d4[0] │ │ + @ instruction: 0xfff5df94 │ │ @ instruction: 0xfff54ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n ac290 │ │ - beq.n abcc0 │ │ - b.n ac214 │ │ + b.n ac2a0 │ │ + beq.n abcd0 │ │ + b.n ac224 │ │ str r0, [r0, r1] │ │ - b.n ab89e │ │ - add r0, pc, #0 @ (adr r0, abd80 ) │ │ - b.n ac0c2 │ │ + b.n ab8ae │ │ + add r0, pc, #0 @ (adr r0, abd90 ) │ │ + b.n ac0d2 │ │ str r0, [r0, #124] @ 0x7c │ │ - b.n ac396 │ │ + b.n ac3a6 │ │ stmia r0!, {r4, r5} │ │ - b.n ac29e │ │ + b.n ac2ae │ │ str r0, [sp, #256] @ 0x100 │ │ - b.n ac224 │ │ + b.n ac234 │ │ ands r1, r0 │ │ - b.n ac0d2 │ │ + b.n ac0e2 │ │ strh r4, [r0, #0] │ │ - b.n ab8c0 │ │ + b.n ab8d0 │ │ ldr r7, [r7, #124] @ 0x7c │ │ - b.n ac438 │ │ + b.n ac448 │ │ lsrs r2, r0, #32 │ │ - b.n ac3c0 │ │ + b.n ac3d0 │ │ stmia r0!, {r4, r6} │ │ - b.n ab7b8 │ │ + b.n ab7c8 │ │ lsls r2, r1, #28 │ │ - b.n ac1b6 │ │ + b.n ac1c6 │ │ str r4, [r1, r1] │ │ - b.n ab7c0 │ │ - b.n abdae │ │ - b.n ac0ae │ │ + b.n ab7d0 │ │ + b.n abdbe │ │ + b.n ac0be │ │ movs r5, r3 │ │ subs r0, r0, r0 │ │ - b.n abe5c │ │ - b.n ab7cc │ │ - cbz r5, abe06 │ │ + b.n abe6c │ │ + b.n ab7dc │ │ + cbz r5, abe16 │ │ add.w r0, r0, ip, lsl #4 │ │ - b.n ab8f2 │ │ + b.n ab902 │ │ str r6, [r0, #0] │ │ - b.n ac2ce │ │ + b.n ac2de │ │ movs r0, r0 │ │ - b.n ac068 │ │ + b.n ac078 │ │ lsls r3, r1, #9 │ │ lsrs r0, r0, #8 │ │ asrs r5, r3, #23 │ │ - b.n ac178 │ │ + b.n ac188 │ │ movs r1, r0 │ │ - b.n ac4b4 │ │ + b.n ac4c4 │ │ lsls r0, r1, #9 │ │ ldmia r2!, {} │ │ asrs r0, r6, #32 │ │ - b.n ab904 │ │ + b.n ab914 │ │ movs r0, r0 │ │ - b.n ac480 │ │ + b.n ac490 │ │ lsls r0, r1, #9 │ │ lsrs r0, r0, #8 │ │ movs r6, #2 │ │ - b.n ac216 │ │ + b.n ac226 │ │ lsls r6, r0, #9 │ │ subs r0, r0, r0 │ │ cmp r7, #200 @ 0xc8 │ │ - b.n ab92c │ │ + b.n ab93c │ │ movs r0, #2 │ │ - b.n abf10 │ │ + b.n abf20 │ │ movs r0, #89 @ 0x59 │ │ - b.n ab99a │ │ + b.n ab9aa │ │ movs r0, r4 │ │ - b.n ac41e │ │ + b.n ac42e │ │ lsls r1, r0, #9 │ │ subs r0, r0, r0 │ │ stmia r0!, {r3, r5, r6} │ │ - b.n ab92c │ │ + b.n ab93c │ │ strh r4, [r0, #14] │ │ - b.n ab928 │ │ - bl 507906 │ │ + b.n ab938 │ │ + bl 507916 │ │ movs r0, r0 │ │ - b.n ac4be │ │ + b.n ac4ce │ │ lsls r4, r7, #8 │ │ lsrs r0, r0, #8 │ │ stc 2, cr14, [r2], {129} @ 0x81 │ │ - add r0, pc, #352 @ (adr r0, abf78 ) │ │ - b.n ab934 │ │ - add r0, pc, #0 @ (adr r0, abe1c ) │ │ - b.n ac55e │ │ + add r0, pc, #352 @ (adr r0, abf88 ) │ │ + b.n ab944 │ │ + add r0, pc, #0 @ (adr r0, abe2c ) │ │ + b.n ac56e │ │ str r0, [sp, #4] │ │ - b.n ac562 │ │ + b.n ac572 │ │ eors r0, r3 │ │ - b.n ab83c │ │ + b.n ab84c │ │ lsls r4, r7, #7 │ │ and.w r0, r0, r0, lsl #6 │ │ - b.n ab962 │ │ - b.n abe38 │ │ - b.n ab946 │ │ + b.n ab972 │ │ + b.n abe48 │ │ + b.n ab956 │ │ movs r0, r0 │ │ - b.n ac4d8 │ │ + b.n ac4e8 │ │ lsls r0, r6, #13 │ │ lsrs r0, r0, #8 │ │ movs r0, #16 │ │ - b.n ab960 │ │ + b.n ab970 │ │ movs r1, r0 │ │ - b.n ac34e │ │ + b.n ac35e │ │ adds r0, #104 @ 0x68 │ │ - b.n ab970 │ │ + b.n ab980 │ │ movs r3, r0 │ │ - b.n ac0ee │ │ + b.n ac0fe │ │ lsls r1, r7, #14 │ │ subs r0, r0, r0 │ │ movs r0, #208 @ 0xd0 │ │ - b.n ac1d4 │ │ + b.n ac1e4 │ │ str r0, [r0, #0] │ │ - b.n ac616 │ │ + b.n ac626 │ │ str r1, [r0, r0] │ │ - b.n ac61a │ │ + b.n ac62a │ │ strb r2, [r0, #0] │ │ - b.n abf0a │ │ + b.n abf1a │ │ movs r0, #3 │ │ - b.n ac00c │ │ + b.n ac01c │ │ lsls r5, r6, #14 │ │ cmp r2, #0 │ │ lsls r1, r0, #16 │ │ - b.n ac492 │ │ + b.n ac4a2 │ │ lsls r0, r0, #7 │ │ subs r0, r0, r0 │ │ lsls r4, r1, #1 │ │ - b.n ab8a8 │ │ + b.n ab8b8 │ │ movs r0, r0 │ │ - b.n ac518 │ │ + b.n ac528 │ │ strh r4, [r0, #0] │ │ - b.n ab99a │ │ + b.n ab9aa │ │ lsls r6, r4, #16 │ │ lsrs r0, r0, #8 │ │ lsls r0, r3, #3 │ │ - b.n ac204 │ │ + b.n ac214 │ │ lsls r2, r0, #24 │ │ - b.n ac4b6 │ │ - b.n abf30 │ │ - b.n ab8a0 │ │ + b.n ac4c6 │ │ + b.n abf40 │ │ + b.n ab8b0 │ │ movs r4, r1 │ │ - b.n ab9a2 │ │ + b.n ab9b2 │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ movs r0, #76 @ 0x4c │ │ - b.n ab8cc │ │ + b.n ab8dc │ │ movs r1, #4 │ │ - b.n ab9be │ │ + b.n ab9ce │ │ movs r0, r0 │ │ - b.n ac542 │ │ + b.n ac552 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #76 @ 0x4c │ │ - b.n ab8dc │ │ + b.n ab8ec │ │ movs r0, #132 @ 0x84 │ │ - b.n ab9ce │ │ + b.n ab9de │ │ movs r0, #12 │ │ - b.n ab9d2 │ │ + b.n ab9e2 │ │ movs r0, r0 │ │ - b.n ac156 │ │ + b.n ac166 │ │ lsls r3, r5, #14 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #1 │ │ - b.n ab9ee │ │ + b.n ab9fe │ │ lsls r0, r0, #1 │ │ - b.n ac354 │ │ + b.n ac364 │ │ str r0, [r1, r0] │ │ - b.n ac3d4 │ │ - pop {r1, r2, r3, r4, r5} │ │ + b.n ac3e4 │ │ + pop {r0, r2, r3, r4, r5} │ │ @ instruction: 0xebff0000 │ │ - b.n ac60a │ │ + b.n ac61a │ │ str r0, [sp, #4] │ │ - b.n ac60e │ │ + b.n ac61e │ │ lsls r4, r0, #1 │ │ - b.n ab8e8 │ │ + b.n ab8f8 │ │ stmia r0!, {} │ │ - b.n ac696 │ │ + b.n ac6a6 │ │ lsls r0, r1, #1 │ │ - b.n ab8f0 │ │ + b.n ab900 │ │ lsls r0, r3, #1 │ │ - b.n ac3f2 │ │ + b.n ac402 │ │ movs r4, r4 │ │ - b.n ab9fc │ │ + b.n aba0c │ │ movs r0, r3 │ │ - b.n ac3fa │ │ + b.n ac40a │ │ movs r0, r4 │ │ - b.n aba04 │ │ + b.n aba14 │ │ movs r0, r2 │ │ - b.n ac3f8 │ │ + b.n ac408 │ │ ands r0, r0 │ │ - b.n ac632 │ │ + b.n ac642 │ │ lsls r0, r4, #1 │ │ - b.n aba10 │ │ + b.n aba20 │ │ movs r0, r1 │ │ - b.n ac404 │ │ + b.n ac414 │ │ lsls r4, r3, #1 │ │ - b.n aba18 │ │ + b.n aba28 │ │ str r4, [r2, r1] │ │ - b.n aba1c │ │ - add r0, pc, #352 @ (adr r0, ac064 ) │ │ - b.n aba20 │ │ + b.n aba2c │ │ + add r0, pc, #352 @ (adr r0, ac074 ) │ │ + b.n aba30 │ │ adds r0, #64 @ 0x40 │ │ - b.n aba3e │ │ + b.n aba4e │ │ adds r0, #92 @ 0x5c │ │ - b.n ab924 │ │ + b.n ab934 │ │ lsls r5, r3, #23 │ │ - b.n ac2b8 │ │ + b.n ac2c8 │ │ movs r1, r0 │ │ - b.n ac5f6 │ │ + b.n ac606 │ │ lsls r7, r7, #4 │ │ ldmia r2!, {} │ │ movs r7, r7 │ │ - b.n ab9d4 │ │ + b.n ab9e4 │ │ asrs r4, r3, #1 │ │ - b.n abac8 │ │ + b.n abad8 │ │ movs r0, #16 │ │ - b.n aba4c │ │ + b.n aba5c │ │ adds r0, #5 │ │ - b.n ac26a │ │ + b.n ac27a │ │ str r0, [r0, #24] │ │ - b.n abe94 │ │ + b.n abea4 │ │ lsls r0, r2, #4 │ │ - b.n ac036 │ │ + b.n ac046 │ │ strb r4, [r0, #0] │ │ - b.n aba5c │ │ + b.n aba6c │ │ movs r4, r2 │ │ - b.n ac43a │ │ + b.n ac44a │ │ adds r0, #92 @ 0x5c │ │ - b.n ab974 │ │ + b.n ab984 │ │ lsls r0, r3, #1 │ │ - b.n ab958 │ │ + b.n ab968 │ │ movs r0, #128 @ 0x80 │ │ - b.n aba7a │ │ + b.n aba8a │ │ movs r0, r0 │ │ - b.n ac5ee │ │ + b.n ac5fe │ │ movs r6, r1 │ │ lsrs r0, r0, #8 │ │ - bl 507a4e │ │ + bl 507a5e │ │ stmia r0!, {r2} │ │ - b.n aba5a │ │ + b.n aba6a │ │ asrs r0, r3, #1 │ │ - b.n ab990 │ │ + b.n ab9a0 │ │ movs r4, r4 │ │ - b.n aba80 │ │ + b.n aba90 │ │ movs r4, r2 │ │ - b.n aba66 │ │ + b.n aba76 │ │ lsls r0, r7, #2 │ │ - b.n aba88 │ │ + b.n aba98 │ │ asrs r4, r7, #2 │ │ - b.n aba8c │ │ + b.n aba9c │ │ movs r0, r3 │ │ - b.n aba72 │ │ + b.n aba82 │ │ asrs r4, r3, #32 │ │ - b.n aba76 │ │ + b.n aba86 │ │ str r0, [r0, #0] │ │ - b.n aba7a │ │ - bl 507a76 │ │ + b.n aba8a │ │ + bl 507a86 │ │ strb r4, [r0, #0] │ │ - b.n aba82 │ │ + b.n aba92 │ │ lsls r0, r1, #1 │ │ - b.n abaa8 │ │ - bl 507a82 │ │ + b.n abab8 │ │ + bl 507a92 │ │ str r1, [sp, #800] @ 0x320 │ │ - b.n aba8a │ │ + b.n aba9a │ │ lsls r0, r4, #1 │ │ - b.n abac8 │ │ + b.n abad8 │ │ str r0, [r6, #0] │ │ - b.n abaac │ │ + b.n ababc │ │ movs r0, #40 @ 0x28 │ │ - b.n abab0 │ │ + b.n abac0 │ │ lsls r1, r0, #1 │ │ ldmia.w r0, {r2, r4, r5} │ │ - b.n abab8 │ │ + b.n abac8 │ │ lsls r4, r3, #1 │ │ - b.n abadc │ │ + b.n abaec │ │ movs r0, #16 │ │ - b.n abacc │ │ + b.n abadc │ │ strb r4, [r5, #0] │ │ - b.n abac4 │ │ + b.n abad4 │ │ asrs r0, r0, #32 │ │ - b.n abace │ │ + b.n abade │ │ movs r4, r0 │ │ - b.n abad2 │ │ + b.n abae2 │ │ lsls r0, r0, #1 │ │ - b.n abad0 │ │ + b.n abae0 │ │ movs r1, r4 │ │ ldmia.w r5, {r2, r6} │ │ - b.n abad8 │ │ + b.n abae8 │ │ lsls r0, r0, #1 │ │ - b.n aba78 │ │ + b.n aba88 │ │ asrs r4, r7, #32 │ │ - b.n abae0 │ │ + b.n abaf0 │ │ lsls r0, r2, #1 │ │ - b.n abae4 │ │ + b.n abaf4 │ │ stmia r0!, {r2, r3, r4} │ │ - b.n abaf2 │ │ - bl 507ace │ │ + b.n abb02 │ │ + bl 507ade │ │ strh r0, [r4, #0] │ │ - b.n abafa │ │ - bl 507ad6 │ │ + b.n abb0a │ │ + bl 507ae6 │ │ lsls r4, r7, #2 │ │ - b.n abb02 │ │ + b.n abb12 │ │ movs r1, r0 │ │ - b.n ac4c2 │ │ + b.n ac4d2 │ │ lsls r0, r0, #3 │ │ - b.n abb0a │ │ + b.n abb1a │ │ strb r4, [r0, #3] │ │ - b.n abb0e │ │ - bl 507aea │ │ + b.n abb1e │ │ + bl 507afa │ │ movs r0, #200 @ 0xc8 │ │ - b.n abb16 │ │ + b.n abb26 │ │ movs r0, r0 │ │ - b.n ac5d6 │ │ + b.n ac5e6 │ │ movs r0, r0 │ │ - b.n ac73a │ │ + b.n ac74a │ │ strb r7, [r0, #0] │ │ - b.n ac056 │ │ + b.n ac066 │ │ movs r1, r0 │ │ adds r3, #0 │ │ asrs r0, r1, #32 │ │ - b.n ac33e │ │ + b.n ac34e │ │ movs r0, #2 │ │ - b.n ac05a │ │ + b.n ac06a │ │ asrs r1, r0, #32 │ │ asrs r0, r0, #12 │ │ movs r0, #2 │ │ - b.n ac340 │ │ - bl 507b12 │ │ + b.n ac350 │ │ + bl 507b22 │ │ ands r4, r3 │ │ - b.n abb34 │ │ + b.n abb44 │ │ str r0, [r7, #0] │ │ - b.n abb38 │ │ + b.n abb48 │ │ str r0, [r1, r1] │ │ - b.n abb3c │ │ + b.n abb4c │ │ lsls r4, r2, #4 │ │ subs r0, r0, r0 │ │ - b.n ac028 │ │ - b.n ac02c │ │ + b.n ac038 │ │ + b.n ac03c │ │ lsls r4, r3, #1 │ │ - b.n abbd4 │ │ + b.n abbe4 │ │ asrs r0, r2, #32 │ │ - b.n abb58 │ │ + b.n abb68 │ │ str r1, [r3, #0] │ │ - b.n ac138 │ │ + b.n ac148 │ │ movs r0, #28 │ │ - b.n abb66 │ │ - bl 507b3a │ │ + b.n abb76 │ │ + bl 507b4a │ │ asrs r0, r4, #32 │ │ - b.n abb6e │ │ - bl 507b42 │ │ + b.n abb7e │ │ + bl 507b52 │ │ strb r4, [r7, #2] │ │ - b.n abb76 │ │ + b.n abb86 │ │ str r0, [r0, r3] │ │ - b.n abb7a │ │ + b.n abb8a │ │ movs r1, r0 │ │ - b.n ac356 │ │ + b.n ac366 │ │ strb r1, [r0, #0] │ │ - b.n ac544 │ │ + b.n ac554 │ │ lsrs r4, r0 │ │ - b.n abb86 │ │ - bl 507b5a │ │ + b.n abb96 │ │ + bl 507b6a │ │ strb r0, [r0, #0] │ │ - b.n ac64c │ │ + b.n ac65c │ │ str r0, [r1, #12] │ │ - b.n abb92 │ │ + b.n abba2 │ │ strb r0, [r0, #0] │ │ - b.n ac7aa │ │ + b.n ac7ba │ │ strb r1, [r0, #0] │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n ac712 │ │ + b.n ac722 │ │ str r4, [r0, r0] │ │ - b.n ac0ba │ │ + b.n ac0ca │ │ str r6, [r0, #0] │ │ - b.n ac0bc │ │ + b.n ac0cc │ │ movs r1, r0 │ │ asrs r0, r0, #12 │ │ str r6, [r0, #0] │ │ - b.n ac3ac │ │ - bl 507b82 │ │ + b.n ac3bc │ │ + bl 507b92 │ │ lsls r7, r7, #3 │ │ subs r0, r0, r0 │ │ movs r7, r0 │ │ - b.n ac08e │ │ + b.n ac09e │ │ lsls r4, r1, #1 │ │ - b.n abbac │ │ + b.n abbbc │ │ str r0, [sp, #56] @ 0x38 │ │ - b.n ac3d6 │ │ + b.n ac3e6 │ │ lsls r4, r3, #1 │ │ - b.n abc40 │ │ + b.n abc50 │ │ str r0, [r2, #0] │ │ - b.n abbc4 │ │ + b.n abbd4 │ │ adds r0, #2 │ │ - b.n ac7e2 │ │ + b.n ac7f2 │ │ ands r3, r2 │ │ - b.n ac1b2 │ │ + b.n ac1c2 │ │ adds r0, #1 │ │ - b.n ac0fa │ │ + b.n ac10a │ │ str r4, [r3, r0] │ │ - b.n abbd6 │ │ - bl 507bae │ │ + b.n abbe6 │ │ + bl 507bbe │ │ movs r0, r4 │ │ - b.n abbde │ │ - bl 507bb6 │ │ + b.n abbee │ │ + bl 507bc6 │ │ str r4, [r7, #8] │ │ - b.n abbe6 │ │ - add r0, pc, #768 @ (adr r0, ac3c0 ) │ │ - b.n abbea │ │ - b.n ac0c4 │ │ - b.n ac3d0 │ │ + b.n abbf6 │ │ + add r0, pc, #768 @ (adr r0, ac3d0 ) │ │ + b.n abbfa │ │ + b.n ac0d4 │ │ + b.n ac3e0 │ │ strb r4, [r0, #3] │ │ - b.n abbf2 │ │ - bl 507bca │ │ + b.n abc02 │ │ + bl 507bda │ │ str r1, [r0, #0] │ │ - b.n ac5be │ │ + b.n ac5ce │ │ lsrs r0, r1 │ │ - b.n abbfe │ │ + b.n abc0e │ │ str r0, [r0, #0] │ │ - b.n ac6ce │ │ + b.n ac6de │ │ strb r7, [r0, #0] │ │ - b.n ac128 │ │ + b.n ac138 │ │ str r0, [r0, #0] │ │ - b.n ac822 │ │ + b.n ac832 │ │ ands r4, r0 │ │ - b.n ac126 │ │ + b.n ac136 │ │ str r1, [r0, #0] │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n ac7aa │ │ + b.n ac7ba │ │ ands r4, r0 │ │ - b.n ac400 │ │ + b.n ac410 │ │ strb r2, [r0, #0] │ │ - b.n ac14e │ │ - b.n ac0fa │ │ + b.n ac15e │ │ + b.n ac10a │ │ asrs r0, r0, #12 │ │ adds r0, #3 │ │ - b.n ac40c │ │ + b.n ac41c │ │ strb r4, [r1, #0] │ │ - b.n ac1a6 │ │ + b.n ac1b6 │ │ strb r0, [r1, #0] │ │ - b.n ac2a8 │ │ + b.n ac2b8 │ │ strb r0, [r0, #0] │ │ - b.n ac84a │ │ + b.n ac85a │ │ strb r1, [r0, #0] │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n ac7b8 │ │ + b.n ac7c8 │ │ adds r0, #76 @ 0x4c │ │ - b.n abc50 │ │ + b.n abc60 │ │ strb r7, [r0, #8] │ │ - b.n ac45a │ │ + b.n ac46a │ │ strb r0, [r1, #0] │ │ lsls r0, r0, #12 │ │ movs r0, r0 │ │ - b.n ac7ca │ │ - bl 507c22 │ │ + b.n ac7da │ │ + bl 507c32 │ │ adds r0, #131 @ 0x83 │ │ - b.n ac43c │ │ + b.n ac44c │ │ adds r0, #7 │ │ - b.n ac434 │ │ + b.n ac444 │ │ adds r0, #76 @ 0x4c │ │ - b.n abc4c │ │ + b.n abc5c │ │ lsls r0, r3, #3 │ │ subs r0, r0, r0 │ │ str r6, [r0, #0] │ │ - b.n ac156 │ │ + b.n ac166 │ │ adds r0, #5 │ │ - b.n ac182 │ │ + b.n ac192 │ │ ands r0, r0 │ │ - b.n ac184 │ │ + b.n ac194 │ │ adds r0, #4 │ │ - b.n ac44c │ │ + b.n ac45c │ │ ands r2, r0 │ │ - b.n ac1f4 │ │ + b.n ac204 │ │ ands r1, r0 │ │ - b.n ac2ee │ │ + b.n ac2fe │ │ strb r0, [r0, #0] │ │ - b.n ac1a2 │ │ + b.n ac1b2 │ │ ands r0, r0 │ │ - b.n ac896 │ │ + b.n ac8a6 │ │ str r0, [sp, #368] @ 0x170 │ │ - b.n abc94 │ │ + b.n abca4 │ │ ands r1, r0 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n ac80a │ │ + b.n ac81a │ │ eors r7, r5 │ │ asrs r0, r4, #15 │ │ movs r0, r0 │ │ - b.n ac810 │ │ + b.n ac820 │ │ adds r0, #5 │ │ - b.n ac1c6 │ │ + b.n ac1d6 │ │ eors r0, r1 │ │ lsls r0, r0, #12 │ │ adds r0, #7 │ │ - b.n ac47c │ │ + b.n ac48c │ │ strb r4, [r1, #0] │ │ - b.n ac224 │ │ + b.n ac234 │ │ strb r0, [r1, #0] │ │ - b.n ac31e │ │ - b.n ac228 │ │ - b.n abcbc │ │ + b.n ac32e │ │ + b.n ac238 │ │ + b.n abccc │ │ strb r0, [r0, #0] │ │ - b.n ac8c6 │ │ - add r0, pc, #384 @ (adr r0, ac308 ) │ │ - b.n abcc4 │ │ + b.n ac8d6 │ │ + add r0, pc, #384 @ (adr r0, ac318 ) │ │ + b.n abcd4 │ │ strb r1, [r0, #0] │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n ac840 │ │ + b.n ac850 │ │ strb r0, [r6, #0] │ │ asrs r0, r0, #12 │ │ movs r0, r0 │ │ - b.n ac840 │ │ + b.n ac850 │ │ adds r0, #76 @ 0x4c │ │ - b.n abcd8 │ │ + b.n abce8 │ │ strb r0, [r3, #0] │ │ lsls r0, r0, #12 │ │ movs r0, #0 │ │ - b.n abcb8 │ │ + b.n abcc8 │ │ adds r1, #6 │ │ - b.n ac4b0 │ │ + b.n ac4c0 │ │ stmia r0!, {} │ │ - b.n abcca │ │ + b.n abcda │ │ adds r0, #7 │ │ - b.n ac2b8 │ │ + b.n ac2c8 │ │ str r0, [r0, r0] │ │ - b.n abcca │ │ + b.n abcda │ │ adds r0, #4 │ │ - b.n ac2c0 │ │ - ldr r5, [pc, #864] @ (ac51c ) │ │ - b.n abcfc │ │ + b.n ac2d0 │ │ + ldr r5, [pc, #864] @ (ac52c ) │ │ + b.n abd0c │ │ adds r0, #64 @ 0x40 │ │ - b.n abc58 │ │ + b.n abc68 │ │ ands r4, r0 │ │ - b.n ac2e4 │ │ + b.n ac2f4 │ │ strb r3, [r6, #1] │ │ - b.n abfa8 │ │ + b.n abfb8 │ │ strh r4, [r0, #0] │ │ - b.n abcea │ │ + b.n abcfa │ │ str r7, [r0, #0] │ │ - b.n ac17a │ │ + b.n ac18a │ │ asrs r4, r0, #32 │ │ - b.n abce8 │ │ + b.n abcf8 │ │ movs r4, r0 │ │ - b.n abcee │ │ + b.n abcfe │ │ adds r0, #195 @ 0xc3 │ │ - b.n ac5ea │ │ + b.n ac5fa │ │ adds r0, #61 @ 0x3d │ │ - b.n abc78 │ │ + b.n abc88 │ │ adds r2, #86 @ 0x56 │ │ - b.n ac1a8 │ │ + b.n ac1b8 │ │ adds r0, #62 @ 0x3e │ │ - b.n abc80 │ │ + b.n abc90 │ │ adds r1, #86 @ 0x56 │ │ - b.n ac1b0 │ │ + b.n ac1c0 │ │ adds r0, #63 @ 0x3f │ │ - b.n abc88 │ │ + b.n abc98 │ │ adds r0, #80 @ 0x50 │ │ - b.n abd30 │ │ + b.n abd40 │ │ movs r7, r0 │ │ - b.n ac4a0 │ │ + b.n ac4b0 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ adds r0, #68 @ 0x44 │ │ - b.n abd3c │ │ + b.n abd4c │ │ strb r0, [r1, #1] │ │ - b.n abd40 │ │ + b.n abd50 │ │ adds r0, #12 │ │ - b.n ac250 │ │ + b.n ac260 │ │ strb r0, [r1, #0] │ │ - b.n ac25c │ │ + b.n ac26c │ │ adds r0, #7 │ │ - b.n ac538 │ │ + b.n ac548 │ │ adds r0, #60 @ 0x3c │ │ lsls r5, r3, #22 │ │ movs r0, #2 │ │ movs r3, r4 │ │ adds r0, #64 @ 0x40 │ │ lsls r5, r3, #22 │ │ asrs r1, r0, #32 │ │ movs r3, r4 │ │ asrs r1, r0, #32 │ │ lsls r2, r2, #6 │ │ movs r4, r1 │ │ lsrs r0, r0, #8 │ │ - add r0, pc, #352 @ (adr r0, ac38c ) │ │ - b.n abd68 │ │ + add r0, pc, #352 @ (adr r0, ac39c ) │ │ + b.n abd78 │ │ movs r0, r0 │ │ - b.n ac972 │ │ + b.n ac982 │ │ asrs r4, r3, #32 │ │ - b.n abd70 │ │ + b.n abd80 │ │ lsls r4, r0, #1 │ │ - b.n abc50 │ │ + b.n abc60 │ │ lsls r0, r1, #1 │ │ - b.n abc54 │ │ + b.n abc64 │ │ asrs r1, r0, #32 │ │ - b.n ac744 │ │ + b.n ac754 │ │ str r4, [r2, r1] │ │ - b.n abd80 │ │ + b.n abd90 │ │ movs r2, r5 │ │ - b.n ac8ec │ │ + b.n ac8fc │ │ str r0, [sp, #4] │ │ - b.n ac98e │ │ + b.n ac99e │ │ stmia r0!, {} │ │ - b.n aca12 │ │ + b.n aca22 │ │ ands r1, r0 │ │ - b.n ac596 │ │ + b.n ac5a6 │ │ vpmin.u32 , q13, │ │ lsls r7, r1, #10 │ │ and.w r0, r0, r4, ror #4 │ │ - b.n abd9c │ │ + b.n abdac │ │ movs r0, #56 @ 0x38 │ │ - b.n abda0 │ │ + b.n abdb0 │ │ asrs r5, r0, #32 │ │ - b.n ac2ac │ │ + b.n ac2bc │ │ movs r0, r0 │ │ - b.n ac2b2 │ │ + b.n ac2c2 │ │ movs r0, r0 │ │ - b.n ac594 │ │ + b.n ac5a4 │ │ @ instruction: 0xffec1aff │ │ eors r0, r3 │ │ - b.n abcb0 │ │ + b.n abcc0 │ │ str r0, [r6, r0] │ │ - b.n abdb8 │ │ + b.n abdc8 │ │ lsls r0, r2, #1 │ │ - b.n abcb8 │ │ + b.n abcc8 │ │ asrs r4, r2, #32 │ │ - b.n ac78e │ │ + b.n ac79e │ │ str r4, [r5, #0] │ │ - b.n abdc4 │ │ + b.n abdd4 │ │ lsls r0, r4, #1 │ │ stmia.w r0, {r0, r2, r3, r7, r9, fp} │ │ - bne.w d342 │ │ - b.n abdd0 │ │ + bne.w d352 │ │ + b.n abde0 │ │ movs r0, #32 │ │ - b.n abdd4 │ │ + b.n abde4 │ │ asrs r0, r0, #32 │ │ - b.n abdc0 │ │ + b.n abdd0 │ │ lsrs r5, r1, #10 │ │ orr.w r0, r2, #12845056 @ 0xc40000 │ │ - b.n abdda │ │ + b.n abdea │ │ asrs r0, r0, #32 │ │ - b.n abdae │ │ + b.n abdbe │ │ asrs r0, r5, #32 │ │ - b.n ac7b6 │ │ + b.n ac7c6 │ │ movs r0, #96 @ 0x60 │ │ - b.n ac9f2 │ │ - add r4, pc, #16 @ (adr r4, ac2c4 ) │ │ - @ instruction: 0xfb002048 │ │ - b.n abcf0 │ │ + b.n aca02 │ │ + add r2, pc, #372 @ (adr r2, ac438 ) │ │ + @ instruction: 0xfa002048 │ │ + b.n abd00 │ │ lsls r0, r1, #2 │ │ - b.n ac7c6 │ │ + b.n ac7d6 │ │ adds r0, #68 @ 0x44 │ │ - b.n abcf8 │ │ + b.n abd08 │ │ lsrs r5, r1, #10 │ │ orn r0, r0, #536576 @ 0x83000 │ │ - b.n ac5ce │ │ + b.n ac5de │ │ adds r0, #6 │ │ - b.n ac60e │ │ + b.n ac61e │ │ strb r4, [r4, #0] │ │ - b.n abe0c │ │ + b.n abe1c │ │ cmp r7, #18 │ │ - b.n ac5b4 │ │ + b.n ac5c4 │ │ cmp r2, #143 @ 0x8f │ │ orn r2, r0, #331776 @ 0x51000 │ │ - b.n ac61e │ │ + b.n ac62e │ │ lsrs r5, r1, #10 │ │ orr.w r4, r7, #6815744 @ 0x680000 │ │ - b.n ac67a │ │ + b.n ac68a │ │ cmp r2, #143 @ 0x8f │ │ orr.w r0, r7, #557056 @ 0x88000 │ │ - b.n abe08 │ │ + b.n abe18 │ │ movs r0, #5 │ │ - b.n ac632 │ │ + b.n ac642 │ │ movs r2, r2 │ │ stmia.w sp, {r3, r4, r9, sl, ip, lr} │ │ @ instruction: 0xeb00c050 │ │ - b.n abd34 │ │ + b.n abd44 │ │ movs r0, r0 │ │ - b.n ac9a2 │ │ + b.n ac9b2 │ │ lsls r0, r5, #1 │ │ lsrs r0, r0, #8 │ │ str r0, [r3, #4] │ │ - b.n abd40 │ │ + b.n abd50 │ │ lsls r0, r2, #3 │ │ - b.n ac6a6 │ │ + b.n ac6b6 │ │ movs r0, #8 │ │ - b.n abe3e │ │ - bl 507e12 │ │ + b.n abe4e │ │ + bl 507e22 │ │ adds r0, #12 │ │ - b.n abe46 │ │ - bl 507e1a │ │ + b.n abe56 │ │ + bl 507e2a │ │ strb r0, [r5, #2] │ │ - b.n abe4e │ │ + b.n abe5e │ │ strb r4, [r5, #2] │ │ - b.n abe52 │ │ + b.n abe62 │ │ strb r0, [r6, #2] │ │ - b.n abe56 │ │ - bl 507e2a │ │ + b.n abe66 │ │ + bl 507e3a │ │ str r4, [r6, #8] │ │ - b.n abe5e │ │ - bl 507e32 │ │ + b.n abe6e │ │ + bl 507e42 │ │ strb r7, [r0, #0] │ │ - b.n ac37e │ │ + b.n ac38e │ │ str r6, [r0, #0] │ │ - b.n ac384 │ │ + b.n ac394 │ │ strb r6, [r0, #0] │ │ - b.n ac670 │ │ + b.n ac680 │ │ movs r0, #0 │ │ asrs r0, r4, #14 │ │ adds r0, #0 │ │ asrs r0, r4, #14 │ │ movs r2, r0 │ │ - b.n ac38e │ │ + b.n ac39e │ │ asrs r3, r0, #32 │ │ - b.n ac394 │ │ + b.n ac3a4 │ │ movs r1, r0 │ │ - b.n ac676 │ │ + b.n ac686 │ │ lsls r3, r2, #1 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #1 │ │ - b.n abe92 │ │ - b.n ac408 │ │ - b.n abd98 │ │ + b.n abea2 │ │ + b.n ac418 │ │ + b.n abda8 │ │ lsls r0, r6, #2 │ │ - b.n ac708 │ │ + b.n ac718 │ │ movs r0, r1 │ │ - b.n aca0a │ │ + b.n aca1a │ │ lsls r6, r2, #1 │ │ subs r0, r0, r0 │ │ lsls r4, r3, #1 │ │ - b.n abda8 │ │ + b.n abdb8 │ │ lsls r0, r1, #1 │ │ - b.n abe96 │ │ + b.n abea6 │ │ movs r1, #76 @ 0x4c │ │ - b.n abe9a │ │ - bl 507e7a │ │ + b.n abeaa │ │ + bl 507e8a │ │ str r0, [r1, r5] │ │ - b.n abea2 │ │ - bl 507e82 │ │ + b.n abeb2 │ │ + bl 507e92 │ │ asrs r4, r1, #5 │ │ - b.n abeaa │ │ - bl 507e8a │ │ + b.n abeba │ │ + bl 507e9a │ │ adds r1, #72 @ 0x48 │ │ - b.n abeb2 │ │ - bl 507e92 │ │ + b.n abec2 │ │ + bl 507ea2 │ │ strb r1, [r0, #0] │ │ - b.n ac3de │ │ + b.n ac3ee │ │ str r3, [r0, #0] │ │ - b.n ac3e8 │ │ + b.n ac3f8 │ │ strb r7, [r0, #0] │ │ - b.n ac6ce │ │ + b.n ac6de │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #1 │ │ - b.n ac6ea │ │ + b.n ac6fa │ │ str r3, [r0, r0] │ │ - b.n ac6ee │ │ - blx 4ad9f0 │ │ + b.n ac6fe │ │ + blx 4ada00 │ │ @ instruction: 0xfff3eaff │ │ lsls r1, r0, #8 │ │ ldmia.w ip, {r0, r2, ip} │ │ - b.n ac45e │ │ + b.n ac46e │ │ asrs r2, r0, #32 │ │ - b.n ac574 │ │ + b.n ac584 │ │ lsls r0, r2, #1 │ │ subs r2, #0 │ │ strh r0, [r5, #0] │ │ - b.n abf04 │ │ + b.n abf14 │ │ movs r0, r0 │ │ - b.n aca7e │ │ + b.n aca8e │ │ lsls r0, r6, #1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #32 │ │ - b.n abf06 │ │ + b.n abf16 │ │ movs r0, #0 │ │ - b.n abf0a │ │ + b.n abf1a │ │ adds r0, #4 │ │ - b.n abf0e │ │ + b.n abf1e │ │ strb r0, [r0, #0] │ │ - b.n abf12 │ │ + b.n abf22 │ │ str r3, [r0, #0] │ │ - b.n ac428 │ │ + b.n ac438 │ │ str r7, [r0, r0] │ │ - b.n ac42e │ │ + b.n ac43e │ │ str r6, [r0, #0] │ │ - b.n ac718 │ │ + b.n ac728 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ asrs r3, r0, #32 │ │ - b.n ac736 │ │ + b.n ac746 │ │ movs r0, #7 │ │ - b.n ac73a │ │ - blx 4ada3c │ │ + b.n ac74a │ │ + blx 4ada4c │ │ @ instruction: 0xfff5eaff │ │ movs r2, r0 │ │ - b.n ac446 │ │ + b.n ac456 │ │ asrs r1, r0, #32 │ │ - b.n ac45c │ │ + b.n ac46c │ │ movs r1, r0 │ │ - b.n ac72e │ │ + b.n ac73e │ │ asrs r4, r3, #32 │ │ - b.n abf4c │ │ + b.n abf5c │ │ lsls r6, r3, #1 │ │ lsrs r0, r0, #8 │ │ @ instruction: 0xff88eaff │ │ asrs r4, r3, #1 │ │ - b.n abfc4 │ │ + b.n abfd4 │ │ movs r0, #16 │ │ - b.n abf48 │ │ + b.n abf58 │ │ lsls r0, r2, #4 │ │ - b.n ac52a │ │ + b.n ac53a │ │ str r4, [r3, #0] │ │ - b.n abf4a │ │ - bl 507f2a │ │ + b.n abf5a │ │ + bl 507f3a │ │ strb r0, [r4, #0] │ │ - b.n abf52 │ │ - bl 507f32 │ │ + b.n abf62 │ │ + bl 507f42 │ │ asrs r4, r7, #2 │ │ - b.n abf5a │ │ + b.n abf6a │ │ asrs r0, r0, #3 │ │ - b.n abf5e │ │ + b.n abf6e │ │ asrs r4, r0, #3 │ │ - b.n abf62 │ │ - bl 507f42 │ │ + b.n abf72 │ │ + bl 507f52 │ │ movs r0, #200 @ 0xc8 │ │ - b.n abf6a │ │ + b.n abf7a │ │ movs r4, r2 │ │ - b.n ac94e │ │ + b.n ac95e │ │ asrs r1, r0, #32 │ │ - b.n ac49e │ │ + b.n ac4ae │ │ lsls r0, r3, #1 │ │ - b.n abe6c │ │ + b.n abe7c │ │ movs r0, #2 │ │ - b.n ac4a8 │ │ - bl 507f5a │ │ + b.n ac4b8 │ │ + bl 507f6a │ │ asrs r2, r0, #32 │ │ - b.n ac784 │ │ + b.n ac794 │ │ str r0, [r0, #0] │ │ asrs r0, r4, #14 │ │ strb r0, [r0, #0] │ │ asrs r0, r4, #14 │ │ movs r0, #128 @ 0x80 │ │ - b.n abfa2 │ │ + b.n abfb2 │ │ movs r0, r0 │ │ - b.n acb16 │ │ + b.n acb26 │ │ mrc2 10, 5, r1, cr5, cr15, {7} @ │ │ mcr2 10, 6, lr, cr3, cr15, {7} @ │ │ stmia r0!, {} │ │ - b.n acbbe │ │ + b.n acbce │ │ strh r0, [r0, #0] │ │ - b.n acbc2 │ │ - b.n ac484 │ │ - b.n acbc6 │ │ + b.n acbd2 │ │ + b.n ac494 │ │ + b.n acbd6 │ │ mcr2 10, 7, lr, cr7, cr15, {7} @ │ │ movs r0, #0 │ │ - b.n acbce │ │ + b.n acbde │ │ asrs r0, r0, #32 │ │ - b.n acbd2 │ │ + b.n acbe2 │ │ movs r0, r0 │ │ - b.n acbd6 │ │ + b.n acbe6 │ │ mrc2 10, 7, lr, cr12, cr15, {7} @ │ │ str r0, [r0, r0] │ │ - b.n acbde │ │ + b.n acbee │ │ movs r0, r0 │ │ - b.n acbe2 │ │ + b.n acbf2 │ │ str r0, [r0, #0] │ │ - b.n acbe6 │ │ + b.n acbf6 │ │ vpmin.u32 q7, , │ │ movs r0, #64 @ 0x40 │ │ - b.n abfe2 │ │ + b.n abff2 │ │ lsls r0, r1, #1 │ │ - b.n ac948 │ │ + b.n ac958 │ │ asrs r0, r0, #32 │ │ - b.n acc76 │ │ + b.n acc86 │ │ ldrsb r5, [r1, r5] │ │ add.w r0, r0, ip, lsr #4 │ │ - b.n abff8 │ │ + b.n ac008 │ │ movs r1, r0 │ │ - b.n acba2 │ │ + b.n acbb2 │ │ vpmin.u16 q8, , │ │ lsls r3, r5, #10 │ │ and.w r0, r0, lr, ror #9 │ │ - b.n ac8ce │ │ + b.n ac8de │ │ movs r0, r1 │ │ - b.n acb76 │ │ + b.n acb86 │ │ lsls r4, r0, #9 │ │ subs r0, r0, r0 │ │ movs r0, #88 @ 0x58 │ │ - b.n abf10 │ │ + b.n abf20 │ │ ldrb r5, [r7, r6] │ │ - b.n acaf0 │ │ + b.n acb00 │ │ ldr r5, [r4, r5] │ │ - b.n acb6c │ │ + b.n acb7c │ │ movs r0, #208 @ 0xd0 │ │ - b.n ac86a │ │ + b.n ac87a │ │ adds r0, #5 │ │ - b.n ac530 │ │ + b.n ac540 │ │ str r3, [r0, r4] │ │ - b.n acaf0 │ │ + b.n acb00 │ │ ldrsh r4, [r1, r5] │ │ - b.n acb8e │ │ + b.n acb9e │ │ movs r0, #5 │ │ - b.n ac53a │ │ + b.n ac54a │ │ movs r0, #3 │ │ - b.n ac81e │ │ + b.n ac82e │ │ lsls r2, r7, #8 │ │ lsrs r0, r0, #8 │ │ movs r0, r1 │ │ - b.n acc42 │ │ + b.n acc52 │ │ lsls r0, r6, #2 │ │ - b.n ac888 │ │ + b.n ac898 │ │ @ instruction: 0xff98eaff │ │ asrs r4, r3, #1 │ │ - b.n abf44 │ │ + b.n abf54 │ │ strb r5, [r3, #23] │ │ - b.n ac8b4 │ │ + b.n ac8c4 │ │ asrs r4, r3, #32 │ │ - b.n ac050 │ │ + b.n ac060 │ │ movs r0, r0 │ │ - b.n acbc8 │ │ + b.n acbd8 │ │ vpmin.u8 q10, , │ │ subs r0, r3, r2 │ │ - b.n ac060 │ │ + b.n ac070 │ │ subs r1, #49 @ 0x31 │ │ - b.n acb36 │ │ + b.n acb46 │ │ subs r7, #255 @ 0xff │ │ - b.n acbc8 │ │ + b.n acbd8 │ │ str r5, [r0, #0] │ │ - b.n aca34 │ │ + b.n aca44 │ │ asrs r1, r0, #32 │ │ - b.n ac650 │ │ + b.n ac660 │ │ asrs r2, r3, #1 │ │ - b.n ac0d8 │ │ + b.n ac0e8 │ │ movs r0, r0 │ │ - b.n acbdc │ │ + b.n acbec │ │ lsls r7, r3, #7 │ │ lsrs r0, r0, #8 │ │ subs r4, r7, r1 │ │ - b.n ac080 │ │ + b.n ac090 │ │ subs r2, #124 @ 0x7c │ │ - b.n ac084 │ │ + b.n ac094 │ │ asrs r1, r0, #32 │ │ - b.n ac668 │ │ + b.n ac678 │ │ movs r0, r1 │ │ - b.n ac068 │ │ + b.n ac078 │ │ adds r0, #3 │ │ - b.n ac670 │ │ + b.n ac680 │ │ movs r0, #20 │ │ - b.n ac070 │ │ + b.n ac080 │ │ movs r1, r0 │ │ - b.n acc9a │ │ + b.n accaa │ │ movs r0, #94 @ 0x5e │ │ - b.n acc9e │ │ + b.n accae │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n ac07c │ │ + b.n ac08c │ │ str r0, [r2, r0] │ │ - b.n ac080 │ │ + b.n ac090 │ │ strb r0, [r0, #0] │ │ - b.n ac084 │ │ - cbnz r6, ac5b6 │ │ + b.n ac094 │ │ + cbnz r5, ac5c6 │ │ @ instruction: 0xebff01d2 │ │ and.w r0, r0, r0 │ │ - b.n acc18 │ │ + b.n acc28 │ │ movs r0, r0 │ │ asrs r0, r4, #14 │ │ movs r4, r2 │ │ asrs r1, r0, #22 │ │ asrs r1, r0, #32 │ │ - b.n acb82 │ │ + b.n acb92 │ │ lsls r1, r0, #8 │ │ ldmia.w ip, {r1, ip} │ │ - b.n acc0a │ │ + b.n acc1a │ │ asrs r4, r0, #32 │ │ - b.n ac0a2 │ │ + b.n ac0b2 │ │ movs r4, r0 │ │ and.w r2, r0, r1 │ │ ldmia.w ip, {r0, ip} │ │ - b.n acaac │ │ + b.n acabc │ │ movs r0, #0 │ │ - b.n aca7e │ │ + b.n aca8e │ │ asrs r1, r0, #32 │ │ - b.n acb84 │ │ + b.n acb94 │ │ lsls r3, r3, #7 │ │ cmp r2, #0 │ │ str r4, [r1, #4] │ │ - b.n abfe0 │ │ + b.n abff0 │ │ asrs r0, r1, #1 │ │ - b.n ac0da │ │ + b.n ac0ea │ │ subs r2, r2, #5 │ │ - b.n acab4 │ │ + b.n acac4 │ │ movs r0, #208 @ 0xd0 │ │ - b.n ac938 │ │ + b.n ac948 │ │ asrs r2, r0, #32 │ │ - b.n ac65a │ │ + b.n ac66a │ │ asrs r3, r0, #32 │ │ - b.n ac770 │ │ + b.n ac780 │ │ lsls r4, r2, #2 │ │ cmp r2, #0 │ │ lsrs r4, r0, #7 │ │ - b.n ac104 │ │ + b.n ac114 │ │ movs r0, #137 @ 0x89 │ │ - b.n acd0a │ │ + b.n acd1a │ │ adds r0, r0, r7 │ │ - b.n ac10c │ │ + b.n ac11c │ │ movs r0, r0 │ │ - b.n ac6f0 │ │ + b.n ac700 │ │ asrs r1, r0, #32 │ │ - b.n ac6f4 │ │ - rev r7, r0 │ │ + b.n ac704 │ │ + rev r6, r0 │ │ @ instruction: 0xebfff001 │ │ - b.n acc1e │ │ + b.n acc2e │ │ asrs r3, r0, #32 │ │ - b.n ac922 │ │ + b.n ac932 │ │ movs r0, #4 │ │ - b.n ac926 │ │ + b.n ac936 │ │ adds r0, #12 │ │ - b.n ac116 │ │ + b.n ac126 │ │ ands r0, r1 │ │ - b.n ac11a │ │ + b.n ac12a │ │ strb r3, [r0, #0] │ │ - b.n ac634 │ │ + b.n ac644 │ │ str r4, [r0, r0] │ │ - b.n ac63a │ │ + b.n ac64a │ │ strb r7, [r0, #0] │ │ - b.n ac924 │ │ + b.n ac934 │ │ @ instruction: 0xfff61aff │ │ movs r0, #0 │ │ - b.n ac646 │ │ + b.n ac656 │ │ asrs r1, r0, #32 │ │ - b.n ac92a │ │ + b.n ac93a │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ - add r0, pc, #4 @ (adr r0, ac610 ) │ │ - b.n acb22 │ │ + add r0, pc, #4 @ (adr r0, ac620 ) │ │ + b.n acb32 │ │ str r0, [sp, #0] │ │ - b.n acd52 │ │ + b.n acd62 │ │ movs r0, r1 │ │ - b.n ac8ca │ │ + b.n ac8da │ │ str r0, [sp, #4] │ │ adds r3, #0 │ │ movs r6, r5 │ │ lsrs r0, r0, #8 │ │ str r2, [r1, #40] @ 0x28 │ │ - b.n ac73e │ │ + b.n ac74e │ │ asrs r0, r2, #32 │ │ - b.n ac152 │ │ + b.n ac162 │ │ movs r4, r1 │ │ - b.n ac8cc │ │ + b.n ac8dc │ │ @ instruction: 0xfff61aff │ │ asrs r4, r1, #32 │ │ - b.n ac15e │ │ + b.n ac16e │ │ movs r0, #8 │ │ - b.n ac162 │ │ + b.n ac172 │ │ adds r0, #12 │ │ - b.n ac166 │ │ + b.n ac176 │ │ ands r0, r1 │ │ - b.n ac16a │ │ + b.n ac17a │ │ str r3, [r0, r0] │ │ - b.n ac684 │ │ + b.n ac694 │ │ strb r4, [r0, #0] │ │ - b.n ac68a │ │ + b.n ac69a │ │ strb r5, [r0, #0] │ │ - b.n ac978 │ │ + b.n ac988 │ │ @ instruction: 0xffeb0aff │ │ @ instruction: 0xffe1eaff │ │ lsls r4, r3, #1 │ │ - b.n ac06c │ │ + b.n ac07c │ │ movs r6, r0 │ │ - b.n ac99a │ │ + b.n ac9aa │ │ asrs r1, r0, #32 │ │ - b.n acd9e │ │ - b.n ac718 │ │ - b.n ac17c │ │ + b.n acdae │ │ + b.n ac728 │ │ + b.n ac18c │ │ stmia r0!, {r5, r6} │ │ - b.n ac180 │ │ - bf 0, a6e66 │ │ + b.n ac190 │ │ + bf 0, a5e76 │ │ lsrs r0, r2 │ │ - b.n ac9fa │ │ + b.n aca0a │ │ movs r0, #0 │ │ - b.n ac9b2 │ │ + b.n ac9c2 │ │ movs r5, r0 │ │ - b.n ac6b8 │ │ + b.n ac6c8 │ │ adds r0, #4 │ │ - b.n ac6be │ │ + b.n ac6ce │ │ movs r0, r0 │ │ - b.n ac9a4 │ │ + b.n ac9b4 │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ lsls r4, r3, #1 │ │ - b.n ac0bc │ │ + b.n ac0cc │ │ stmia r0!, {r5, r6} │ │ - b.n ac1c4 │ │ - b.n ac744 │ │ - b.n ac1c8 │ │ + b.n ac1d4 │ │ + b.n ac754 │ │ + b.n ac1d8 │ │ asrs r1, r0, #32 │ │ - b.n acb94 │ │ + b.n acba4 │ │ movs r0, #0 │ │ - b.n acb7a │ │ + b.n acb8a │ │ asrs r1, r0, #32 │ │ - b.n acc7c │ │ + b.n acc8c │ │ @ instruction: 0xffda2aff │ │ movs r5, r1 │ │ and.w r0, r0, r6 │ │ - b.n ac9e6 │ │ + b.n ac9f6 │ │ asrs r1, r0, #32 │ │ - b.n acdea │ │ - blx 4adcec │ │ - bf 0, b4eae │ │ - movs r0, #0 │ │ - b.n ac9f6 │ │ - b.n ac770 │ │ - b.n ac1f4 │ │ + b.n acdfa │ │ + blx 4adcfc │ │ + bf 0, b3ebe │ │ + movs r0, #0 │ │ + b.n aca06 │ │ + b.n ac780 │ │ + b.n ac204 │ │ stmia r0!, {r5, r6} │ │ - b.n ac1f8 │ │ + b.n ac208 │ │ lsls r4, r3, #1 │ │ - b.n ac0f8 │ │ + b.n ac108 │ │ lsrs r0, r2 │ │ - b.n aca52 │ │ + b.n aca62 │ │ adds r0, #5 │ │ - b.n ac70c │ │ + b.n ac71c │ │ strb r4, [r0, #0] │ │ - b.n ac712 │ │ + b.n ac722 │ │ adds r0, #3 │ │ - b.n aca00 │ │ + b.n aca10 │ │ @ instruction: 0xffed0aff │ │ @ instruction: 0xfff1eaff │ │ - add r0, pc, #352 @ (adr r0, ac83c ) │ │ - b.n ac218 │ │ + add r0, pc, #352 @ (adr r0, ac84c ) │ │ + b.n ac228 │ │ movs r1, r0 │ │ - b.n acd14 │ │ + b.n acd24 │ │ str r4, [r1, r1] │ │ - b.n ac11c │ │ + b.n ac12c │ │ str r0, [sp, #256] @ 0x100 │ │ - b.n acb80 │ │ + b.n acb90 │ │ eors r0, r3 │ │ - b.n ac124 │ │ + b.n ac134 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ ldr r1, [r6, #16] │ │ - b.n acd06 │ │ + b.n acd16 │ │ ldr r7, [r7, #124] @ 0x7c │ │ - b.n acd98 │ │ + b.n acda8 │ │ movs r6, r0 │ │ - b.n aca3e │ │ - beq.n ac738 │ │ - b.n acb98 │ │ + b.n aca4e │ │ + beq.n ac748 │ │ + b.n acba8 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r4, r6, r9, sl, fp, ip} │ │ - b.n ac6ca │ │ + b.n ac6da │ │ movs r5, r0 │ │ - b.n aca4e │ │ - cbnz r5, ac784 │ │ + b.n aca5e │ │ + cbnz r4, ac794 │ │ @ instruction: 0xebff0000 │ │ - b.n acdb6 │ │ + b.n acdc6 │ │ lsls r3, r1, #5 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n ac248 │ │ + b.n ac258 │ │ movs r1, r0 │ │ - b.n ace02 │ │ + b.n ace12 │ │ lsls r4, r1, #5 │ │ - bge.n ac726 │ │ + bge.n ac736 │ │ str r0, [r0, #4] │ │ - b.n ac25e │ │ + b.n ac26e │ │ movs r1, r1 │ │ - b.n aca6e │ │ + b.n aca7e │ │ asrs r6, r0, #32 │ │ - b.n aca72 │ │ - rev r2, r4 │ │ + b.n aca82 │ │ + rev r1, r4 │ │ @ instruction: 0xebff0009 │ │ - b.n aca7a │ │ + b.n aca8a │ │ str r1, [r1, r0] │ │ - b.n aca7e │ │ + b.n aca8e │ │ lsrs r5, r1, #11 │ │ orn sl, r0, #423936 @ 0x67800 │ │ orn r0, r0, #4194304 @ 0x400000 │ │ - b.n acc5e │ │ + b.n acc6e │ │ lsrs r5, r1, #11 │ │ orr.w sl, r0, #423936 @ 0x67800 │ │ orr.w r0, r0, #1056768 @ 0x102000 │ │ - b.n ac30a │ │ + b.n ac31a │ │ movs r0, #92 @ 0x5c │ │ - b.n ac306 │ │ + b.n ac316 │ │ adds r0, #16 │ │ - b.n ac28a │ │ + b.n ac29a │ │ strb r1, [r0, #6] │ │ - b.n ac876 │ │ + b.n ac886 │ │ lsls r0, r0, #2 │ │ - b.n ac31a │ │ + b.n ac32a │ │ movs r2, #17 │ │ - b.n ac870 │ │ + b.n ac880 │ │ ldrh r0, [r3, #6] │ │ - b.n acafc │ │ + b.n acb0c │ │ strb r0, [r0, #0] │ │ - b.n aceb2 │ │ + b.n acec2 │ │ ands r4, r2 │ │ - b.n acc7a │ │ + b.n acc8a │ │ strb r4, [r7, #0] │ │ - b.n ac190 │ │ + b.n ac1a0 │ │ strb r0, [r0, #1] │ │ - b.n ac194 │ │ + b.n ac1a4 │ │ strb r5, [r0, #0] │ │ - b.n acac2 │ │ + b.n acad2 │ │ movs r0, #1 │ │ - b.n acec6 │ │ + b.n aced6 │ │ str r0, [r6, r4] │ │ - b.n ac78e │ │ + b.n ac79e │ │ movs r2, r1 │ │ - b.n acace │ │ + b.n acade │ │ movs r0, #8 │ │ - b.n acad2 │ │ + b.n acae2 │ │ adds r0, #9 │ │ - b.n acad6 │ │ + b.n acae6 │ │ lsls r0, r6, #2 │ │ - stmia.w sp, {r1, r2, r4, r8, fp, sp, lr, pc} │ │ + stmia.w sp, {r0, r2, r4, r8, fp, sp, lr, pc} │ │ @ instruction: 0xebff0000 │ │ - b.n ace42 │ │ + b.n ace52 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n ace8a │ │ + b.n ace9a │ │ @ instruction: 0xfff60aff │ │ lsls r2, r5, #2 │ │ @ instruction: 0xea00c050 │ │ - b.n ac1ec │ │ + b.n ac1fc │ │ lsls r0, r2, #3 │ │ - b.n acb52 │ │ + b.n acb62 │ │ movs r1, r0 │ │ - b.n accde │ │ + b.n accee │ │ str r0, [sp, #0] │ │ - b.n acd04 │ │ + b.n acd14 │ │ lsls r1, r0, #8 │ │ stmia.w ip, {r0} │ │ - b.n acebc │ │ + b.n acecc │ │ lsls r2, r5, #4 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #1 │ │ - b.n ac306 │ │ + b.n ac316 │ │ adds r0, #0 │ │ - b.n acf16 │ │ + b.n acf26 │ │ movs r2, #68 @ 0x44 │ │ - b.n ac30e │ │ - b.n ac884 │ │ - b.n ac214 │ │ + b.n ac31e │ │ + b.n ac894 │ │ + b.n ac224 │ │ adds r2, #76 @ 0x4c │ │ - b.n ac2f6 │ │ + b.n ac306 │ │ adds r2, #72 @ 0x48 │ │ - b.n ac2fa │ │ - b.n ac7f0 │ │ - b.n ac2fe │ │ + b.n ac30a │ │ + b.n ac800 │ │ + b.n ac30e │ │ adds r2, #52 @ 0x34 │ │ - b.n ac302 │ │ + b.n ac312 │ │ adds r0, #0 │ │ - b.n ac2f6 │ │ + b.n ac306 │ │ adds r2, #80 @ 0x50 │ │ - b.n ac30a │ │ + b.n ac31a │ │ adds r2, #84 @ 0x54 │ │ - b.n ac30e │ │ + b.n ac31e │ │ adds r1, #120 @ 0x78 │ │ - b.n ac316 │ │ + b.n ac326 │ │ adds r1, #124 @ 0x7c │ │ - b.n ac31a │ │ + b.n ac32a │ │ adds r0, #20 │ │ - b.n ac31a │ │ + b.n ac32a │ │ adds r1, #8 │ │ - b.n ac30c │ │ + b.n ac31c │ │ adds r1, #12 │ │ - b.n ac310 │ │ - add r1, pc, #16 @ (adr r1, ac820 ) │ │ - b.n ac31e │ │ + b.n ac320 │ │ + add r1, pc, #16 @ (adr r1, ac830 ) │ │ + b.n ac32e │ │ str r4, [r1, #4] │ │ - b.n ac24c │ │ + b.n ac25c │ │ asrs r2, r0, #32 │ │ - b.n acf5a │ │ + b.n acf6a │ │ ands r1, r0 │ │ - b.n acd3e │ │ + b.n acd4e │ │ movs r4, #216 @ 0xd8 │ │ - b.n acbb6 │ │ + b.n acbc6 │ │ str r0, [r0, r0] │ │ - b.n acd78 │ │ + b.n acd88 │ │ asrs r0, r1, #32 │ │ - b.n ac33e │ │ + b.n ac34e │ │ adds r2, r1, r0 │ │ - b.n acc6a │ │ + b.n acc7a │ │ ands r0, r0 │ │ asrs r0, r4, #6 │ │ str r1, [r1, r0] │ │ asrs r0, r4, #6 │ │ movs r3, r0 │ │ - b.n acf7a │ │ + b.n acf8a │ │ lsrs r0, r7 │ │ - b.n acbd6 │ │ + b.n acbe6 │ │ movs r0, r0 │ │ - b.n ac346 │ │ + b.n ac356 │ │ lsls r0, r2, #2 │ │ - b.n acf86 │ │ + b.n acf96 │ │ movs r0, r0 │ │ - b.n ac3d0 │ │ + b.n ac3e0 │ │ ldrsb r0, [r0, r7] │ │ - b.n ace5e │ │ + b.n ace6e │ │ asrs r4, r1, #1 │ │ - b.n ac386 │ │ + b.n ac396 │ │ ands r6, r0 │ │ - b.n acb96 │ │ + b.n acba6 │ │ ldrsh r7, [r7, r7] │ │ - b.n acef8 │ │ + b.n acf08 │ │ movs r1, r0 │ │ - b.n ac3e0 │ │ + b.n ac3f0 │ │ asrs r0, r0, #32 │ │ - b.n acfa2 │ │ + b.n acfb2 │ │ lsls r4, r2, #1 │ │ - b.n ac39a │ │ + b.n ac3aa │ │ asrs r0, r0, #32 │ │ - b.n ac36a │ │ + b.n ac37a │ │ lsls r4, r2, #1 │ │ - b.n ac3a2 │ │ + b.n ac3b2 │ │ asrs r4, r0, #32 │ │ - b.n ac372 │ │ + b.n ac382 │ │ lsls r0, r2, #1 │ │ - b.n ac3aa │ │ + b.n ac3ba │ │ movs r0, #144 @ 0x90 │ │ - b.n ac3a6 │ │ + b.n ac3b6 │ │ asrs r0, r0, #32 │ │ - b.n ac37e │ │ + b.n ac38e │ │ asrs r4, r0, #32 │ │ - b.n ac3a6 │ │ - bl 508382 │ │ + b.n ac3b6 │ │ + bl 508392 │ │ lsls r4, r0, #1 │ │ - b.n ac3be │ │ + b.n ac3ce │ │ movs r0, #80 @ 0x50 │ │ - b.n ac3c2 │ │ + b.n ac3d2 │ │ adds r0, #140 @ 0x8c │ │ - b.n ac3be │ │ + b.n ac3ce │ │ strb r0, [r6, #14] │ │ - b.n acc36 │ │ + b.n acc46 │ │ asrs r4, r0, #32 │ │ - b.n ac39e │ │ + b.n ac3ae │ │ movs r0, #1 │ │ - b.n ac444 │ │ + b.n ac454 │ │ adds r0, #128 @ 0x80 │ │ - b.n acfb0 │ │ + b.n acfc0 │ │ movs r2, r0 │ │ - b.n acb4c │ │ + b.n acb5c │ │ lsls r7, r6, #1 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n acf50 │ │ + b.n acf60 │ │ lsls r5, r6, #1 │ │ lsrs r0, r0, #8 │ │ lsls r0, r6, #2 │ │ - b.n acc56 │ │ + b.n acc66 │ │ movs r0, r1 │ │ - b.n acf5a │ │ + b.n acf6a │ │ lsls r1, r1, #2 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n ac3ea │ │ + b.n ac3fa │ │ movs r1, r0 │ │ - b.n acfa6 │ │ + b.n acfb6 │ │ lsls r5, r1, #2 │ │ - bge.n ac8ca │ │ + bge.n ac8da │ │ asrs r4, r3, #1 │ │ - b.n ac476 │ │ + b.n ac486 │ │ str r4, [r2, #44] @ 0x2c │ │ - b.n acc66 │ │ + b.n acc76 │ │ movs r0, #6 │ │ - b.n ac48a │ │ + b.n ac49a │ │ movs r4, r3 │ │ - b.n ac402 │ │ + b.n ac412 │ │ adds r1, #23 │ │ - b.n acc1e │ │ + b.n acc2e │ │ movs r2, r0 │ │ - b.n acf06 │ │ + b.n acf16 │ │ adds r1, #22 │ │ lsls r0, r4, #6 │ │ movs r0, r0 │ │ - b.n acb90 │ │ + b.n acba0 │ │ lsls r5, r2, #2 │ │ ldrh r0, [r0, #16] │ │ asrs r6, r2, #4 │ │ - b.n acc32 │ │ + b.n acc42 │ │ movs r0, r0 │ │ - b.n acb98 │ │ + b.n acba8 │ │ lsls r7, r3, #2 │ │ subs r2, #0 │ │ movs r4, r0 │ │ - b.n ac432 │ │ + b.n ac442 │ │ str r0, [r0, #0] │ │ - b.n ad042 │ │ + b.n ad052 │ │ lsrs r2, r0, #32 │ │ - b.n acf26 │ │ + b.n acf36 │ │ vpmin.u , , │ │ asrs r6, r2, #3 │ │ - b.n ac4b6 │ │ + b.n ac4c6 │ │ movs r0, r0 │ │ - b.n acfb4 │ │ + b.n acfc4 │ │ movs r3, r4 │ │ lsrs r0, r0, #8 │ │ lsls r0, r4, #3 │ │ - b.n ac4c2 │ │ + b.n ac4d2 │ │ movs r1, r0 │ │ - b.n acf3e │ │ + b.n acf4e │ │ lsls r5, r2, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, r1 │ │ - b.n ac44e │ │ + b.n ac45e │ │ movs r0, r0 │ │ - b.n acfca │ │ + b.n acfda │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ lsls r4, r5, #3 │ │ - b.n ac45a │ │ + b.n ac46a │ │ movs r0, #2 │ │ - b.n ad0f6 │ │ + b.n ad106 │ │ asrs r4, r3, #1 │ │ - b.n ac4e2 │ │ + b.n ac4f2 │ │ movs r0, r0 │ │ - b.n acfde │ │ + b.n acfee │ │ lsls r7, r7, #17 │ │ lsls r0, r4, #14 │ │ asrs r0, r6, #4 │ │ - b.n aca4a │ │ + b.n aca5a │ │ lsls r0, r7, #2 │ │ - b.n ac472 │ │ + b.n ac482 │ │ movs r1, r0 │ │ - b.n acbee │ │ + b.n acbfe │ │ asrs r0, r0, #32 │ │ adds r1, #160 @ 0xa0 │ │ movs r6, r0 │ │ ldr r2, [sp, #0] │ │ movs r7, r0 │ │ and.w pc, r0, sp, ror #7 │ │ - b.n acf7c │ │ + b.n acf8c │ │ asrs r6, r7, #1 │ │ - b.n acfe2 │ │ + b.n acff2 │ │ lsls r0, r7, #2 │ │ - b.n ac48e │ │ + b.n ac49e │ │ movs r1, r0 │ │ - b.n acc0a │ │ + b.n acc1a │ │ asrs r0, r0, #32 │ │ adds r1, #160 @ 0xa0 │ │ movs r1, r0 │ │ ldrh r0, [r0, #16] │ │ lsls r7, r3, #1 │ │ - b.n ad018 │ │ + b.n ad028 │ │ movs r3, r0 │ │ ldrh r0, [r0, #16] │ │ lsls r0, r4, #1 │ │ - b.n ad020 │ │ + b.n ad030 │ │ asrs r0, r4, #1 │ │ str r3, [sp, #640] @ 0x280 │ │ movs r1, r0 │ │ - b.n accc6 │ │ + b.n accd6 │ │ asrs r0, r7, #2 │ │ - b.n ac492 │ │ + b.n ac4a2 │ │ asrs r4, r7, #2 │ │ - b.n ac4b6 │ │ + b.n ac4c6 │ │ lsrs r7, r7, #31 │ │ - b.n ad034 │ │ + b.n ad044 │ │ movs r0, r0 │ │ strh r1, [r2, #10] │ │ asrs r0, r0, #32 │ │ - b.n ad0da │ │ + b.n ad0ea │ │ lsls r4, r7, #2 │ │ strh r4, [r0, #44] @ 0x2c │ │ movs r4, r0 │ │ - b.n ac4d6 │ │ + b.n ac4e6 │ │ asrs r6, r2, #3 │ │ - b.n ac52e │ │ + b.n ac53e │ │ lsls r2, r0, #28 │ │ - b.n acfca │ │ + b.n acfda │ │ movs r7, r3 │ │ subs r0, r0, r0 │ │ movs r0, #64 @ 0x40 │ │ - b.n ac4e6 │ │ + b.n ac4f6 │ │ asrs r0, r4, #32 │ │ - b.n ac4ea │ │ + b.n ac4fa │ │ lsls r0, r0, #9 │ │ - b.n ac4ee │ │ + b.n ac4fe │ │ adds r0, #188 @ 0xbc │ │ - b.n ac4e2 │ │ + b.n ac4f2 │ │ movs r1, r0 │ │ - b.n acc68 │ │ + b.n acc78 │ │ asrs r3, r0, #32 │ │ adds r1, #160 @ 0xa0 │ │ movs r0, r0 │ │ - b.n ad06a │ │ + b.n ad07a │ │ lsls r4, r0, #2 │ │ lsrs r0, r0, #8 │ │ adds r0, #12 │ │ - b.n ac4f2 │ │ + b.n ac502 │ │ movs r1, r0 │ │ - b.n acc7c │ │ + b.n acc8c │ │ lsls r1, r0, #2 │ │ subs r2, #0 │ │ strb r1, [r0, #2] │ │ - b.n acd1e │ │ + b.n acd2e │ │ movs r7, r0 │ │ - b.n acc88 │ │ + b.n acc98 │ │ lsls r6, r7, #1 │ │ ldrh r0, [r0, #16] │ │ str r1, [r0, #0] │ │ - b.n ad12a │ │ + b.n ad13a │ │ asrs r0, r0, #32 │ │ - b.n ad1ae │ │ + b.n ad1be │ │ adds r6, #28 │ │ - b.n ac530 │ │ + b.n ac540 │ │ strb r4, [r3, #24] │ │ - b.n ac534 │ │ + b.n ac544 │ │ str r4, [r4, #0] │ │ - b.n ac4fa │ │ + b.n ac50a │ │ adds r0, #3 │ │ - b.n acb1c │ │ + b.n acb2c │ │ asrs r0, r4, #32 │ │ - b.n ac502 │ │ + b.n ac512 │ │ strb r7, [r0, #0] │ │ - b.n acb24 │ │ + b.n acb34 │ │ asrs r0, r7, #2 │ │ - b.n ac52e │ │ + b.n ac53e │ │ movs r0, #0 │ │ - b.n ad14e │ │ + b.n ad15e │ │ str r0, [r3, #0] │ │ - b.n ac512 │ │ + b.n ac522 │ │ movs r0, #20 │ │ - b.n ac516 │ │ + b.n ac526 │ │ movs r0, #0 │ │ - b.n ac51a │ │ + b.n ac52a │ │ movs r0, #4 │ │ - b.n ac51e │ │ + b.n ac52e │ │ movs r0, #8 │ │ - b.n ac522 │ │ + b.n ac532 │ │ adds r0, #28 │ │ - b.n ac526 │ │ + b.n ac536 │ │ strb r0, [r2, #0] │ │ - b.n ac52a │ │ + b.n ac53a │ │ movs r2, r0 │ │ and.w r0, r0, r0 │ │ - b.n ad172 │ │ + b.n ad182 │ │ asrs r2, r0, #4 │ │ - b.n ad1f6 │ │ + b.n ad206 │ │ lsls r0, r0, #9 │ │ - b.n ac54e │ │ + b.n ac55e │ │ lsrs r6, r2, #30 │ │ - b.n acf52 │ │ + b.n acf62 │ │ str r0, [r0, #0] │ │ - b.n ad182 │ │ + b.n ad192 │ │ asrs r4, r7, #8 │ │ - b.n ac55a │ │ + b.n ac56a │ │ asrs r2, r1, #32 │ │ - b.n acd8a │ │ + b.n acd9a │ │ movs r0, #0 │ │ - b.n ad18e │ │ + b.n ad19e │ │ str r0, [r7, #32] │ │ - b.n ac566 │ │ - ittte vc │ │ + b.n ac576 │ │ + itt vc │ │ @ instruction: 0xebff0000 │ │ - bvc.n ad0fa @ unpredictable branch in IT block │ │ - │ │ - vpminvc.u32 q0, q11, │ │ - strvs r0, [r0, #0] │ │ - b.n acda2 │ │ + bvc.n ad10a │ │ + vpmin.u32 q0, q11, │ │ + str r0, [r0, #0] │ │ + b.n acdb2 │ │ movs r2, r1 │ │ - b.n acda6 │ │ + b.n acdb6 │ │ asrs r4, r0, #1 │ │ - b.n ad1aa │ │ - bfcsel 1c, ad26a , 1e, ge │ │ + b.n ad1ba │ │ + bfcsel 1c, ad27a , 1e, ge │ │ movs r6, r0 │ │ - b.n acdb2 │ │ - beq.n acaac │ │ - b.n acf0c │ │ + b.n acdc2 │ │ + beq.n acabc │ │ + b.n acf1c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2} │ │ - b.n acdbe │ │ + b.n acdce │ │ strh r3, [r1, r5] │ │ add.w r0, r0, r8, ror #2 │ │ - b.n ac58e │ │ + b.n ac59e │ │ @ instruction: 0xffbfeaff │ │ ldr r1, [r2, #96] @ 0x60 │ │ - b.n acf96 │ │ + b.n acfa6 │ │ movs r6, r0 │ │ - b.n acdd2 │ │ - beq.n acb4a │ │ + b.n acde2 │ │ + beq.n acb58 │ │ @ instruction: 0xebff0000 │ │ - b.n ad13a │ │ + b.n ad14a │ │ lsls r3, r6, #3 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n acf38 │ │ + b.n acf48 │ │ asrs r2, r1, #32 │ │ - b.n acde6 │ │ + b.n acdf6 │ │ movs r0, #4 │ │ - b.n acdea │ │ + b.n acdfa │ │ ldr r7, [sp, #912] @ 0x390 │ │ add.w r0, r0, r6 │ │ - b.n acdf2 │ │ + b.n ace02 │ │ add sp, #40 @ 0x28 │ │ add.w r0, r0, r0 │ │ - b.n ad15a │ │ + b.n ad16a │ │ lsls r1, r7, #3 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n ac4f8 │ │ + b.n ac508 │ │ movs r0, r0 │ │ - b.n ad166 │ │ + b.n ad176 │ │ @ instruction: 0xffe41aff │ │ lsls r0, r2, #1 │ │ - b.n ac602 │ │ + b.n ac612 │ │ asrs r4, r7, #32 │ │ - b.n ac508 │ │ + b.n ac518 │ │ asrs r4, r0, #32 │ │ - b.n ac5d6 │ │ + b.n ac5e6 │ │ lsls r4, r0, #1 │ │ - b.n ac60e │ │ + b.n ac61e │ │ lsls r0, r6, #2 │ │ - b.n ace7e │ │ + b.n ace8e │ │ movs r0, r1 │ │ - b.n ad182 │ │ + b.n ad192 │ │ vpmin.u q8, , │ │ asrs r4, r0, #20 │ │ - b.n ac628 │ │ + b.n ac638 │ │ asrs r1, r0, #32 │ │ - b.n acc0c │ │ + b.n acc1c │ │ asrs r2, r3, #1 │ │ - b.n ac694 │ │ + b.n ac6a4 │ │ movs r0, r0 │ │ - b.n ad198 │ │ + b.n ad1a8 │ │ lsls r3, r4, #2 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n ace3e │ │ + b.n ace4e │ │ @ instruction: 0xffd6eaff │ │ lsls r0, r7, #19 │ │ - b.n ac644 │ │ + b.n ac654 │ │ movs r0, r0 │ │ - b.n acc28 │ │ + b.n acc38 │ │ asrs r2, r3, #1 │ │ - b.n ac6ae │ │ + b.n ac6be │ │ movs r3, r1 │ │ - b.n acf9c │ │ + b.n acfac │ │ movs r2, r0 │ │ - b.n ad1b8 │ │ + b.n ad1c8 │ │ @ instruction: 0xffd03aff │ │ asrs r4, r4, #19 │ │ - b.n ac65c │ │ + b.n ac66c │ │ ands r0, r0 │ │ - b.n ace62 │ │ + b.n ace72 │ │ adds r4, #224 @ 0xe0 │ │ - b.n ac664 │ │ + b.n ac674 │ │ movs r2, r0 │ │ - b.n ad26a │ │ + b.n ad27a │ │ movs r4, #220 @ 0xdc │ │ - b.n ac66c │ │ + b.n ac67c │ │ asrs r1, r0, #32 │ │ - b.n acc50 │ │ + b.n acc60 │ │ adds r0, #3 │ │ - b.n acc54 │ │ + b.n acc64 │ │ movs r0, #2 │ │ - b.n acc58 │ │ + b.n acc68 │ │ movs r0, #0 │ │ - b.n ac658 │ │ + b.n ac668 │ │ movs r0, #216 @ 0xd8 │ │ - b.n ad282 │ │ + b.n ad292 │ │ lsls r5, r4, #2 │ │ and.w r0, r0, r0, asr #8 │ │ - b.n ac67e │ │ + b.n ac68e │ │ movs r1, r0 │ │ - b.n acfd8 │ │ + b.n acfe8 │ │ lsls r2, r0, #4 │ │ - b.n ad1f6 │ │ + b.n ad206 │ │ @ instruction: 0xffc18aff │ │ adds r0, #0 │ │ - b.n ad31a │ │ + b.n ad32a │ │ asrs r3, r6, #4 │ │ - b.n ace9e │ │ + b.n aceae │ │ movs r1, r0 │ │ - b.n ace06 │ │ + b.n ace16 │ │ @ instruction: 0xffbd8aff │ │ movs r4, r0 │ │ - b.n aceaa │ │ + b.n aceba │ │ asrs r6, r0, #32 │ │ - b.n aceae │ │ + b.n acebe │ │ adds r0, #0 │ │ - b.n ad2b2 │ │ - ldmia.w r1, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, fp, sp, lr, pc} │ │ + b.n ad2c2 │ │ + ldmia.w r0, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, fp, sp, lr, pc} │ │ movs r6, r2 │ │ and.w pc, r0, lr, lsl #25 │ │ - b.n ad086 │ │ + b.n ad096 │ │ movs r6, r0 │ │ - b.n acec2 │ │ - beq.n acbc2 │ │ + b.n aced2 │ │ + beq.n acbd0 │ │ @ instruction: 0xebff0000 │ │ - b.n ad22a │ │ + b.n ad23a │ │ @ instruction: 0xffb31aff │ │ strb r0, [r4, #0] │ │ - b.n ad09a │ │ + b.n ad0aa │ │ movs r4, r2 │ │ - b.n ac6be │ │ + b.n ac6ce │ │ asrs r7, r0, #32 │ │ - b.n aceda │ │ + b.n aceea │ │ strh r1, [r7, r5] │ │ add.w r0, r0, r0 │ │ - b.n ad242 │ │ + b.n ad252 │ │ lsls r0, r2, #3 │ │ subs r0, r0, r0 │ │ lsls r0, r2, #3 │ │ - b.n acf38 │ │ + b.n acf48 │ │ movs r0, #28 │ │ - b.n ac6d6 │ │ + b.n ac6e6 │ │ movs r0, #2 │ │ - b.n acc52 │ │ + b.n acc62 │ │ movs r0, #0 │ │ - b.n ad158 │ │ + b.n ad168 │ │ movs r4, r0 │ │ cmp r2, #0 │ │ movs r0, #24 │ │ - b.n ac6e6 │ │ + b.n ac6f6 │ │ adds r0, #0 │ │ - b.n acc66 │ │ + b.n acc76 │ │ asrs r0, r0, #32 │ │ - b.n ad1a8 │ │ + b.n ad1b8 │ │ movs r2, r0 │ │ adds r1, #160 @ 0xa0 │ │ movs r4, r3 │ │ - b.n ac6d6 │ │ + b.n ac6e6 │ │ movs r6, r0 │ │ - b.n acf12 │ │ + b.n acf22 │ │ add r7, sp, #776 @ 0x308 │ │ add.w r0, r0, r0 │ │ - b.n ad27a │ │ + b.n ad28a │ │ vpmin.u8 q8, q11, │ │ @ instruction: 0xff9eeaff │ │ movs r2, r1 │ │ - b.n acf26 │ │ - ldr r4, [pc, #808] @ (acf10 ) │ │ + b.n acf36 │ │ + ldr r4, [pc, #808] @ (acf20 ) │ │ add.w r0, r0, r0 │ │ - b.n ad28e │ │ + b.n ad29e │ │ lsls r2, r0, #3 │ │ lsrs r0, r0, #8 │ │ movs r0, #64 @ 0x40 │ │ - b.n ac72a │ │ + b.n ac73a │ │ lsls r0, r0, #9 │ │ - b.n ac72e │ │ + b.n ac73e │ │ vpmin.u q15, , │ │ movs r0, r6 │ │ - b.n ac72c │ │ + b.n ac73c │ │ strb r6, [r1, #0] │ │ - b.n acf46 │ │ + b.n acf56 │ │ movs r0, r0 │ │ - b.n ad2aa │ │ + b.n ad2ba │ │ lsls r5, r7, #2 │ │ lsrs r0, r0, #8 │ │ lsls r1, r0, #8 │ │ - b.n ad242 │ │ + b.n ad252 │ │ str r1, [r0, r0] │ │ - b.n ad3d6 │ │ + b.n ad3e6 │ │ str r0, [r0, #0] │ │ - b.n ad3da │ │ + b.n ad3ea │ │ movs r2, r5 │ │ subs r0, r0, r0 │ │ asrs r4, r1, #1 │ │ - b.n ac658 │ │ + b.n ac668 │ │ lsls r0, r0, #1 │ │ - b.n ad0bc │ │ - bfcsel 0, ad426 , 2, eq │ │ + b.n ad0cc │ │ + @ instruction: 0xefffebff │ │ lsls r0, r0, #1 │ │ - b.n ac664 │ │ - b.n acc3e │ │ - b.n acf72 │ │ + b.n ac674 │ │ + b.n acc4e │ │ + b.n acf82 │ │ asrs r4, r7, #32 │ │ - b.n ac66c │ │ + b.n ac67c │ │ stmia r0!, {r4, r6} │ │ - b.n ac670 │ │ + b.n ac680 │ │ movs r0, r0 │ │ - b.n ad2de │ │ + b.n ad2ee │ │ asrs r0, r0, #2 │ │ - b.n ac756 │ │ + b.n ac766 │ │ stc2 10, cr0, [r7], {255} @ 0xff @ │ │ movs r5, r7 │ │ and.w r0, r0, r0, lsl #24 │ │ - b.n acf8e │ │ + b.n acf9e │ │ movs r6, r0 │ │ - b.n acf92 │ │ - beq.n acc8c │ │ - b.n ad0ec │ │ + b.n acfa2 │ │ + beq.n acc9c │ │ + b.n ad0fc │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r2} │ │ - b.n acf9e │ │ - revsh r4, r2 │ │ + b.n acfae │ │ + revsh r3, r2 │ │ @ instruction: 0xebff07c0 │ │ - b.n ad276 │ │ + b.n ad286 │ │ lsrs r7, r7, #31 │ │ - b.n ad308 │ │ + b.n ad318 │ │ str r3, [r1, #0] │ │ - b.n ad0ee │ │ + b.n ad0fe │ │ movs r6, r0 │ │ - b.n acfb2 │ │ - beq.n accac │ │ - b.n ad10c │ │ + b.n acfc2 │ │ + beq.n accbc │ │ + b.n ad11c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r4, r6, r8, r9} │ │ - b.n ac7bc │ │ + b.n ac7cc │ │ movs r0, r0 │ │ - b.n acda0 │ │ + b.n acdb0 │ │ lsls r2, r3, #1 │ │ - b.n ac826 │ │ + b.n ac836 │ │ movs r0, r0 │ │ - b.n ad32a │ │ + b.n ad33a │ │ lsls r0, r0, #31 │ │ - b.n ad29e │ │ + b.n ad2ae │ │ lsrs r7, r7, #31 │ │ - b.n ad330 │ │ + b.n ad340 │ │ lsls r1, r1, #1 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n ad11a │ │ + b.n ad12a │ │ vpmin.u32 q15, , │ │ lsls r0, r7, #11 │ │ - b.n ac7e0 │ │ + b.n ac7f0 │ │ asrs r0, r0, #31 │ │ - b.n ad2b6 │ │ + b.n ad2c6 │ │ subs r7, r7, #7 │ │ - b.n ad348 │ │ + b.n ad358 │ │ str r5, [r0, #0] │ │ - b.n ad1b0 │ │ + b.n ad1c0 │ │ movs r0, r0 │ │ - b.n acdd0 │ │ + b.n acde0 │ │ lsls r2, r3, #1 │ │ - b.n ac856 │ │ + b.n ac866 │ │ movs r0, r0 │ │ - b.n ad35a │ │ + b.n ad36a │ │ lsls r2, r2, #1 │ │ subs r0, r0, r0 │ │ movs r6, r0 │ │ - b.n ad002 │ │ + b.n ad012 │ │ stmia r0!, {r4, r6} │ │ - b.n ac6fc │ │ + b.n ac70c │ │ movs r2, r3 │ │ and.w r0, r0, ip, lsl #1 │ │ - b.n ac704 │ │ + b.n ac714 │ │ lsls r4, r5, #1 │ │ - b.n ac7f2 │ │ + b.n ac802 │ │ add r6, sp, #856 @ 0x358 │ │ add.w r0, r0, r0 │ │ - b.n ad37a │ │ + b.n ad38a │ │ @ instruction: 0xffcf0aff │ │ asrs r0, r0, #32 │ │ - b.n ad022 │ │ + b.n ad032 │ │ movs r0, r2 │ │ - b.n ac806 │ │ + b.n ac816 │ │ movs r0, #76 @ 0x4c │ │ - b.n ac720 │ │ + b.n ac730 │ │ stmia r0!, {r4, r6} │ │ - b.n ac724 │ │ + b.n ac734 │ │ movs r0, #104 @ 0x68 │ │ - b.n ac816 │ │ + b.n ac826 │ │ movs r2, r0 │ │ - b.n acf96 │ │ + b.n acfa6 │ │ lsls r6, r1, #2 │ │ subs r0, r0, r0 │ │ movs r0, #208 @ 0xd0 │ │ - b.n ad080 │ │ + b.n ad090 │ │ movs r2, r0 │ │ - b.n acdae │ │ + b.n acdbe │ │ movs r3, r0 │ │ - b.n aceb0 │ │ + b.n acec0 │ │ lsls r2, r1, #2 │ │ cmp r2, #0 │ │ asrs r0, r0, #2 │ │ - b.n ac822 │ │ - b.n acd1e │ │ - b.n ad052 │ │ + b.n ac832 │ │ + b.n acd2e │ │ + b.n ad062 │ │ mrrc2 10, 15, lr, r3, cr15 │ │ lsls r4, r5, #10 │ │ - b.n ac858 │ │ + b.n ac868 │ │ movs r0, r0 │ │ - b.n ace3c │ │ + b.n ace4c │ │ asrs r2, r3, #1 │ │ - b.n ac8c2 │ │ + b.n ac8d2 │ │ lsls r0, r0, #31 │ │ - b.n ad336 │ │ + b.n ad346 │ │ lsrs r7, r7, #31 │ │ - b.n ad3c8 │ │ + b.n ad3d8 │ │ movs r4, r1 │ │ - b.n ad1ae │ │ + b.n ad1be │ │ movs r0, r0 │ │ - b.n ad3d4 │ │ + b.n ad3e4 │ │ movs r7, r7 │ │ subs r0, r0, r0 │ │ str r1, [r0, r0] │ │ - b.n ad4fa │ │ + b.n ad50a │ │ str r0, [r0, #0] │ │ - b.n ad4fe │ │ + b.n ad50e │ │ asrs r0, r0, #2 │ │ - b.n ac876 │ │ + b.n ac886 │ │ movs r0, r0 │ │ - b.n ad3e8 │ │ + b.n ad3f8 │ │ adds r0, #1 │ │ - b.n ad254 │ │ + b.n ad264 │ │ str r0, [r0, #0] │ │ - b.n ac866 │ │ + b.n ac876 │ │ adds r0, #4 │ │ - b.n ac86a │ │ + b.n ac87a │ │ vpmin.u8 q8, , │ │ movs r0, #0 │ │ - b.n ad51a │ │ - bl 50885a │ │ + b.n ad52a │ │ + bl 50886a │ │ movs r0, #4 │ │ - b.n ac864 │ │ + b.n ac874 │ │ vpmin.u q7, , │ │ lsls r0, r5, #8 │ │ - b.n ac8a8 │ │ + b.n ac8b8 │ │ movs r0, r0 │ │ - b.n ace8c │ │ + b.n ace9c │ │ lsls r1, r3, #1 │ │ - b.n ac912 │ │ + b.n ac922 │ │ movs r0, r4 │ │ - b.n ad396 │ │ + b.n ad3a6 │ │ mcrr2 10, 15, r1, lr, cr15 │ │ lsrs r1, r6, #4 │ │ - b.n ad38e │ │ + b.n ad39e │ │ stmia r0!, {r4, r6} │ │ - b.n ac7b8 │ │ + b.n ac7c8 │ │ lsrs r7, r7, #31 │ │ - b.n ad424 │ │ + b.n ad434 │ │ @ instruction: 0xffeceaff │ │ asrs r4, r4, #9 │ │ - b.n ac8cc │ │ + b.n ac8dc │ │ movs r0, #210 @ 0xd2 │ │ - b.n ad4d2 │ │ + b.n ad4e2 │ │ adds r2, #96 @ 0x60 │ │ - b.n ac8d4 │ │ + b.n ac8e4 │ │ strb r0, [r4, #9] │ │ - b.n ac8d8 │ │ + b.n ac8e8 │ │ asrs r1, r0, #32 │ │ - b.n acebc │ │ + b.n acecc │ │ adds r0, #3 │ │ - b.n acec0 │ │ + b.n aced0 │ │ strb r7, [r0, #0] │ │ - b.n acec4 │ │ + b.n aced4 │ │ lsls r1, r0, #2 │ │ stmia.w sp, {r0} │ │ - b.n ad4ee │ │ - cbnz r5, acdb6 │ │ + b.n ad4fe │ │ + cbnz r4, acdc6 │ │ @ instruction: 0xebff0005 │ │ - b.n ad0f6 │ │ + b.n ad106 │ │ vpmin.u32 q7, q12, │ │ - cmp r2, #92 @ 0x5c │ │ + cmp r2, #108 @ 0x6c │ │ movs r3, r0 │ │ asrs r0, r3, #8 │ │ - b.n ac900 │ │ + b.n ac910 │ │ ands r4, r0 │ │ - b.n ad246 │ │ + b.n ad256 │ │ adds r2, #20 │ │ - b.n ac908 │ │ + b.n ac918 │ │ movs r1, r0 │ │ - b.n ad50e │ │ + b.n ad51e │ │ asrs r1, r0, #32 │ │ - b.n acef0 │ │ + b.n acf00 │ │ ands r0, r0 │ │ - b.n ac8f0 │ │ + b.n ac900 │ │ adds r0, #3 │ │ - b.n acef8 │ │ + b.n acf08 │ │ movs r0, #114 @ 0x72 │ │ - b.n ad51e │ │ - cbnz r1, acde4 │ │ + b.n ad52e │ │ + cbnz r0, acdf4 │ │ @ instruction: 0xebff0004 │ │ - b.n ad126 │ │ + b.n ad136 │ │ vpmin.u16 q7, q14, │ │ asrs r4, r7, #6 │ │ - b.n ac92c │ │ + b.n ac93c │ │ asrs r1, r0, #32 │ │ - b.n acf10 │ │ + b.n acf20 │ │ asrs r2, r3, #1 │ │ - b.n ac998 │ │ + b.n ac9a8 │ │ movs r0, r0 │ │ - b.n ad49c │ │ + b.n ad4ac │ │ movs r7, r5 │ │ subs r0, r0, r0 │ │ str r0, [r0, #124] @ 0x7c │ │ - b.n ad412 │ │ + b.n ad422 │ │ ldr r7, [r7, #124] @ 0x7c │ │ - b.n ad4a4 │ │ + b.n ad4b4 │ │ @ instruction: 0xffaceaff │ │ asrs r0, r2, #6 │ │ - b.n ac94c │ │ + b.n ac95c │ │ movs r0, #105 @ 0x69 │ │ - b.n ad552 │ │ + b.n ad562 │ │ adds r1, #140 @ 0x8c │ │ - b.n ac954 │ │ + b.n ac964 │ │ lsls r4, r1, #6 │ │ - b.n ac958 │ │ + b.n ac968 │ │ asrs r1, r0, #32 │ │ - b.n acf3c │ │ + b.n acf4c │ │ adds r0, #3 │ │ - b.n acf40 │ │ + b.n acf50 │ │ movs r0, r0 │ │ - b.n acf44 │ │ + b.n acf54 │ │ movs r0, r0 │ │ - b.n ac944 │ │ + b.n ac954 │ │ movs r1, r0 │ │ - b.n ad56e │ │ - @ instruction: 0xb8fd │ │ + b.n ad57e │ │ + @ instruction: 0xb8fc │ │ @ instruction: 0xebffffa1 │ │ @ instruction: 0xeaff1190 │ │ - b.n ac978 │ │ + b.n ac988 │ │ ands r0, r0 │ │ - b.n ad17e │ │ + b.n ad18e │ │ adds r1, #140 @ 0x8c │ │ - b.n ac980 │ │ + b.n ac990 │ │ movs r1, r0 │ │ - b.n ad586 │ │ + b.n ad596 │ │ movs r1, #136 @ 0x88 │ │ - b.n ac988 │ │ + b.n ac998 │ │ asrs r1, r0, #32 │ │ - b.n acf6c │ │ + b.n acf7c │ │ adds r0, #3 │ │ - b.n acf70 │ │ + b.n acf80 │ │ movs r0, #2 │ │ - b.n acf74 │ │ + b.n acf84 │ │ movs r0, #0 │ │ - b.n ac974 │ │ + b.n ac984 │ │ movs r0, #146 @ 0x92 │ │ - b.n ad59e │ │ - @ instruction: 0xb8f1 │ │ + b.n ad5ae │ │ + @ instruction: 0xb8f0 │ │ @ instruction: 0xebffc050 │ │ - b.n ac89c │ │ + b.n ac8ac │ │ movs r4, r0 │ │ - b.n ad1aa │ │ + b.n ad1ba │ │ @ instruction: 0xffb1eaff │ │ asrs r0, r6, #5 │ │ - b.n ac9b0 │ │ + b.n ac9c0 │ │ asrs r1, r0, #32 │ │ - b.n acf94 │ │ + b.n acfa4 │ │ asrs r2, r3, #1 │ │ - b.n aca1c │ │ + b.n aca2c │ │ movs r0, r0 │ │ - b.n ad520 │ │ + b.n ad530 │ │ mrc2 10, 7, r0, cr6, cr15, {7} @ │ │ asrs r0, r4, #5 │ │ - b.n ac9c4 │ │ + b.n ac9d4 │ │ ands r0, r0 │ │ - b.n ad1ca │ │ + b.n ad1da │ │ adds r1, #92 @ 0x5c │ │ - b.n ac9cc │ │ + b.n ac9dc │ │ movs r0, #198 @ 0xc6 │ │ - b.n ad5d2 │ │ + b.n ad5e2 │ │ asrs r1, r0, #32 │ │ - b.n acfb4 │ │ + b.n acfc4 │ │ movs r0, r0 │ │ - b.n ac9b4 │ │ + b.n ac9c4 │ │ adds r0, #3 │ │ - b.n acfbc │ │ + b.n acfcc │ │ movs r1, r0 │ │ - b.n ad5e2 │ │ + b.n ad5f2 │ │ @ instruction: 0xffcdeaff │ │ lsls r4, r5, #5 │ │ - b.n ac9e8 │ │ + b.n ac9f8 │ │ movs r0, #202 @ 0xca │ │ - b.n ad5ee │ │ + b.n ad5fe │ │ asrs r0, r5, #5 │ │ - b.n ac9f0 │ │ + b.n aca00 │ │ movs r0, r0 │ │ - b.n acfd4 │ │ + b.n acfe4 │ │ asrs r1, r0, #32 │ │ - b.n acfd8 │ │ - @ instruction: 0xb7ce │ │ + b.n acfe8 │ │ + @ instruction: 0xb7cd │ │ @ instruction: 0xebff10ec │ │ - b.n aca00 │ │ + b.n aca10 │ │ movs r0, #128 @ 0x80 │ │ - b.n ad606 │ │ + b.n ad616 │ │ adds r0, #232 @ 0xe8 │ │ - b.n aca08 │ │ + b.n aca18 │ │ str r0, [r5, r3] │ │ - b.n aca0c │ │ + b.n aca1c │ │ asrs r1, r0, #32 │ │ - b.n acff0 │ │ + b.n ad000 │ │ adds r0, #3 │ │ - b.n acff4 │ │ + b.n ad004 │ │ str r5, [r0, r0] │ │ - b.n acff8 │ │ + b.n ad008 │ │ movs r1, r4 │ │ stmia.w sp, {r0} │ │ - b.n ad622 │ │ - @ instruction: 0xb8d0 │ │ + b.n ad632 │ │ + @ instruction: 0xb8cf │ │ @ instruction: 0xebffffc4 │ │ @ instruction: 0xeaff4000 │ │ - b.n ad22e │ │ + b.n ad23e │ │ movs r6, r0 │ │ - b.n ad232 │ │ + b.n ad242 │ │ add r6, sp, #1000 @ 0x3e8 │ │ add.w r0, r0, r4 │ │ - b.n ad23a │ │ + b.n ad24a │ │ mrc2 10, 6, lr, cr7, cr15, {7} @ │ │ movs r4, r1 │ │ - b.n ad642 │ │ + b.n ad652 │ │ mrc2 10, 6, lr, cr5, cr15, {7} @ │ │ lsls r1, r0, #16 │ │ - b.n ad532 │ │ - b.n acf1a │ │ - b.n ad24e │ │ + b.n ad542 │ │ + b.n acf2a │ │ + b.n ad25e │ │ str r1, [r0, r0] │ │ - b.n ad6d2 │ │ + b.n ad6e2 │ │ str r0, [r0, #0] │ │ - b.n ad6d6 │ │ + b.n ad6e6 │ │ ldc2 10, cr1, [r8, #1020] @ 0x3fc @ │ │ movs r0, r0 │ │ - b.n ad65e │ │ + b.n ad66e │ │ lsls r2, r0, #24 │ │ - b.n ad552 │ │ + b.n ad562 │ │ @ instruction: 0xfbd61aff │ │ strb r6, [r1, #0] │ │ - b.n ad26a │ │ + b.n ad27a │ │ add r6, sp, #896 @ 0x380 │ │ @ instruction: 0xeb00e007 │ │ - b.n ad272 │ │ + b.n ad282 │ │ @ instruction: 0xfbd2eaff │ │ lsls r0, r0, #31 │ │ - b.n ad54a │ │ + b.n ad55a │ │ asrs r0, r2, #32 │ │ - b.n aca60 │ │ + b.n aca70 │ │ lsrs r7, r7, #31 │ │ - b.n ad5e0 │ │ + b.n ad5f0 │ │ movs r1, r0 │ │ - b.n ad446 │ │ + b.n ad456 │ │ movs r0, r0 │ │ - b.n ad5ec │ │ + b.n ad5fc │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ asrs r4, r6, #32 │ │ - b.n aca90 │ │ + b.n acaa0 │ │ stmia r0!, {r4, r6} │ │ - b.n ac98c │ │ + b.n ac99c │ │ asrs r1, r0, #32 │ │ - b.n ad078 │ │ + b.n ad088 │ │ asrs r1, r3, #1 │ │ - b.n acb00 │ │ + b.n acb10 │ │ movs r0, r2 │ │ - b.n ad584 │ │ + b.n ad594 │ │ vpmin.u q8, , │ │ lsls r4, r1, #1 │ │ - b.n ac9a0 │ │ + b.n ac9b0 │ │ asrs r0, r0, #32 │ │ - b.n ad6ae │ │ + b.n ad6be │ │ lsls r4, r5, #1 │ │ - b.n aca92 │ │ - @ instruction: 0xeff1ebff │ │ + b.n acaa2 │ │ + @ instruction: 0xeff0ebff │ │ vpmin.u32 q7, q12, │ │ str r0, [r0, #0] │ │ - b.n ad2be │ │ + b.n ad2ce │ │ vpmin.u8 q15, q15, │ │ stmia r0!, {r4, r6} │ │ - b.n ac9bc │ │ + b.n ac9cc │ │ vpmin.u32 q15, q14, │ │ - adds r4, r6, r3 │ │ - movs r3, r0 │ │ - adds r3, #120 @ 0x78 │ │ - vrshr.u32 , , #10 │ │ - vtbx.8 d17, {d21-d23}, d16 │ │ - movs r3, r0 │ │ - ldr r2, [pc, #40] @ (acfc4 ) │ │ - @ instruction: 0xfff71b9c │ │ - movs r3, r0 │ │ - bl 42af8e │ │ - stmia r6!, {r1, r4, r6} │ │ - vcvt.u16.f16 q15, , #11 │ │ - @ instruction: 0xfff51a5c │ │ - movs r3, r0 │ │ - blt.n ad0a6 │ │ - @ instruction: 0xfff5bd29 │ │ - vtbl.8 d29, {d21-d24}, d6 │ │ - vrsra.u32 d18, d12, #11 │ │ + adds r4, r0, r4 │ │ movs r3, r0 │ │ - mrrc2 15, 15, pc, r1, cr5 @ │ │ - cmp r3, #172 @ 0xac │ │ - @ instruction: 0xfff61b30 │ │ - movs r3, r0 │ │ - @ instruction: 0xeb4ffff5 │ │ - ldmia r1, {r1, r2, r4, r5} │ │ - vsra.u32 d30, d12, #11 │ │ - vtbx.8 d17, {d21-d24}, d12 │ │ - movs r3, r0 │ │ - cmp r3, #163 @ 0xa3 │ │ - @ instruction: 0xfff60d8e │ │ - @ instruction: 0xfff619d8 │ │ - movs r3, r0 │ │ - ldmia r1!, {r0, r2, r4, r5, r7} │ │ - vceq.f16 d16, d0, #0 │ │ - vqrdmulh.s , q3, d16[0] │ │ - movs r3, r0 │ │ - ldmia r2, {r0, r2, r3, r5, r7} │ │ - vcvt.f32.u32 , , #11 │ │ - @ instruction: 0xfff5dcba │ │ - vqrdmulh.s , , d4[0] │ │ - movs r3, r0 │ │ - ldmia r5!, {r0, r3, r4} │ │ - vcvt.f16.u16 q14, q1, #11 │ │ - @ instruction: 0xfff51bd7 │ │ - vsra.u64 d20, d15, #10 │ │ - vcvtp.u16.f16 d20, d18 │ │ - vqrdmlah.s q8, , d26[0] │ │ - @ instruction: 0xfff6c991 │ │ + adds r3, #254 @ 0xfe │ │ + @ instruction: 0xfff6d348 │ │ + @ instruction: 0xfff51af0 │ │ + movs r3, r0 │ │ + ldr r1, [pc, #1000] @ (ad394 ) │ │ + vtbl.8 d17, {d23-d26}, d28 │ │ + movs r3, r0 │ │ + bl 3ecf9e │ │ + stmia r6!, {r0, r1, r7} │ │ + @ instruction: 0xfff5edae │ │ + vtbx.8 d17, {d5-d7}, d28 │ │ + movs r3, r0 │ │ + bge.n acf86 │ │ + vdup.8 , d20[2] │ │ + vtbx.8 d29, {d21-d23}, d30 │ │ + vabs.s16 d18, d28 │ │ + movs r3, r0 │ │ + ldc2 15, cr15, [r3], {245} @ 0xf5 │ │ + cmp r5, #43 @ 0x2b │ │ + vtbx.8 d17, {d6-d9}, d0 │ │ + movs r3, r0 │ │ + @ instruction: 0xeb2ffff5 │ │ + ldmia r2!, {r0, r3} │ │ + vcgt.s16 q15, , #0 │ │ + @ instruction: 0xfff51bdc │ │ + movs r3, r0 │ │ + cmp r4, #41 @ 0x29 │ │ + vcvt.f32.u32 q8, q9, #10 │ │ + vtbx.8 d17, {d22-d23}, d24 │ │ + movs r3, r0 │ │ + ldmia r2!, {r3, r7} │ │ + vqshlu.s32 d16, d16, #21 │ │ + vcvt.u16.f16 , q8, #10 │ │ + movs r3, r0 │ │ + ldmia r3!, {r7} │ │ + @ instruction: 0xfff5bd98 │ │ + vdup.8 d29, d18[2] │ │ + vcvt.u16.f16 , q2, #11 │ │ + movs r3, r0 │ │ + ldmia r5, {r2, r3, r5, r6, r7} │ │ + @ instruction: 0xfff5cd25 │ │ + @ instruction: 0xfff51da1 │ │ + vzip.16 d20, d15 │ │ + vrshr.u64 d20, d2, #9 │ │ + vqrdmlsh.s q8, , d14[0] │ │ + vtbx.8 d28, {d6-d8}, d20 │ │ vcvt.f16.u16 d20, d0, #11 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n ad544 │ │ + b.n ad554 │ │ movs r0, r0 │ │ - b.n ad6ce │ │ + b.n ad6de │ │ movs r0, r5 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n acb56 │ │ - ldr r1, [pc, #176] @ (ad0e8 ) │ │ - b.n ad64a │ │ + b.n acb66 │ │ + ldr r1, [pc, #176] @ (ad0f8 ) │ │ + b.n ad65a │ │ cmp r2, #49 @ 0x31 │ │ - b.n ad644 │ │ - ldr r7, [pc, #1020] @ (ad43c ) │ │ - b.n ad6e0 │ │ + b.n ad654 │ │ + ldr r7, [pc, #1020] @ (ad44c ) │ │ + b.n ad6f0 │ │ movs r3, #213 @ 0xd5 │ │ - b.n ad6c8 │ │ + b.n ad6d8 │ │ movs r2, r0 │ │ - b.n ad2ec │ │ + b.n ad2fc │ │ movs r2, r4 │ │ subs r0, r0, r0 │ │ asrs r0, r0, #1 │ │ - b.n acb72 │ │ + b.n acb82 │ │ movs r0, r0 │ │ - b.n ad6f8 │ │ + b.n ad708 │ │ movs r6, r4 │ │ lsrs r0, r0, #8 │ │ movs r0, #0 │ │ - b.n acb80 │ │ + b.n acb90 │ │ adds r6, #65 @ 0x41 │ │ - b.n ad674 │ │ + b.n ad684 │ │ subs r2, #137 @ 0x89 │ │ - b.n ad6e8 │ │ + b.n ad6f8 │ │ movs r3, r0 │ │ - b.n ad30e │ │ + b.n ad31e │ │ movs r5, r4 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #32 │ │ - b.n acb94 │ │ + b.n acba4 │ │ movs r0, r0 │ │ - b.n ad718 │ │ + b.n ad728 │ │ movs r0, r4 │ │ - ldr r2, [pc, #0] @ (ad078 ) │ │ + ldr r2, [pc, #0] @ (ad088 ) │ │ lsls r2, r0, #8 │ │ - b.n ad6a0 │ │ + b.n ad6b0 │ │ movs r6, r6 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #32 │ │ - b.n acba6 │ │ + b.n acbb6 │ │ lsrs r2, r0, #32 │ │ - b.n ad6ac │ │ + b.n ad6bc │ │ movs r4, r4 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n ad6b4 │ │ + b.n ad6c4 │ │ movs r1, r5 │ │ lsrs r0, r0, #8 │ │ asrs r4, r1, #32 │ │ - b.n acbba │ │ + b.n acbca │ │ movs r0, r0 │ │ - b.n ad740 │ │ + b.n ad750 │ │ movs r6, r4 │ │ subs r0, r0, r0 │ │ adds r2, r0, r0 │ │ - b.n ad7e6 │ │ + b.n ad7f6 │ │ @ instruction: 0xfb30ebff │ │ ands r0, r0 │ │ - b.n ad3ee │ │ + b.n ad3fe │ │ movs r0, r0 │ │ - b.n ad7f2 │ │ + b.n ad802 │ │ movs r0, r0 │ │ - b.n ad75e │ │ + b.n ad76e │ │ ldrh r0, [r2, #32] │ │ lsrs r5, r7, #2 │ │ asrs r0, r6, #2 │ │ - b.n acbfc │ │ + b.n acc0c │ │ movs r4, r0 │ │ - b.n ad402 │ │ + b.n ad412 │ │ movs r0, #186 @ 0xba │ │ - b.n ad806 │ │ + b.n ad816 │ │ asrs r1, r0, #32 │ │ - b.n ad1e8 │ │ + b.n ad1f8 │ │ asrs r0, r7, #17 │ │ add.w r0, r0, r4 │ │ - b.n ad412 │ │ + b.n ad422 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r1, r2, r4, lr} │ │ - b.n ad81a │ │ + b.n ad82a │ │ asrs r4, r0, #2 │ │ - b.n acc1c │ │ + b.n acc2c │ │ movs r4, r0 │ │ - b.n ad422 │ │ + b.n ad432 │ │ movs r0, #164 @ 0xa4 │ │ - b.n ad826 │ │ + b.n ad836 │ │ asrs r1, r0, #32 │ │ - b.n ad208 │ │ + b.n ad218 │ │ asrs r0, r6, #17 │ │ add.w r0, r0, r4 │ │ - b.n ad432 │ │ + b.n ad442 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r1, r2, r4, lr} │ │ - b.n ad83a │ │ + b.n ad84a │ │ movs r1, r0 │ │ and.w r7, r0, r5, ror #18 │ │ - b.n ad712 │ │ - ldr r7, [pc, #1020] @ (ad500 ) │ │ - b.n ad7a4 │ │ + b.n ad722 │ │ + ldr r7, [pc, #1020] @ (ad510 ) │ │ + b.n ad7b4 │ │ asrs r4, r3, #1 │ │ - b.n acc48 │ │ + b.n acc58 │ │ movs r4, r0 │ │ - b.n ad44e │ │ + b.n ad45e │ │ movs r0, #168 @ 0xa8 │ │ - b.n ad852 │ │ + b.n ad862 │ │ asrs r1, r0, #32 │ │ - b.n ad234 │ │ + b.n ad244 │ │ asrs r5, r4, #17 │ │ add.w r0, r0, r4 │ │ - b.n ad45e │ │ + b.n ad46e │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r2, r6, ip} │ │ - b.n acc64 │ │ + b.n acc74 │ │ movs r6, r2 │ │ - b.n ad86a │ │ + b.n ad87a │ │ movs r0, #171 @ 0xab │ │ - b.n ad86e │ │ + b.n ad87e │ │ asrs r1, r0, #32 │ │ - b.n ad250 │ │ + b.n ad260 │ │ asrs r6, r3, #17 │ │ add.w r0, r0, r6, lsr #32 │ │ - b.n ad87a │ │ + b.n ad88a │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {lr} │ │ - b.n ad482 │ │ - bfcsel 14, ad942 , 16, lt │ │ + b.n ad492 │ │ + bfcsel 14, ac952 , 18, ge │ │ asrs r0, r0, #32 │ │ - b.n ad48a │ │ + b.n ad49a │ │ movs r4, r0 │ │ - b.n ad48e │ │ + b.n ad49e │ │ movs r0, r0 │ │ - b.n ad7f4 │ │ + b.n ad804 │ │ @ instruction: 0xffd20aff │ │ movs r1, r0 │ │ - b.n ad49a │ │ + b.n ad4aa │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r0, lr} │ │ - b.n ad8a2 │ │ + b.n ad8b2 │ │ @ instruction: 0xffe7eaff │ │ - lsrs r6, r1, #14 │ │ - vtbx.8 d16, {d6-d9}, d18 │ │ - vtbx.8 d16, {d6-d9}, d6 │ │ - vtbl.8 d16, {d22-d25}, d30 │ │ + lsrs r2, r6, #17 │ │ + vdup.16 q8, d6[1] │ │ + vdup.16 d16, d26[1] │ │ + @ instruction: 0xfff60c92 │ │ vsri.64 , q2, #10 │ │ - bmi.n ad122 │ │ - bmi.n ad124 │ │ - bmi.n ad126 │ │ - bmi.n ad128 │ │ - bmi.n ad12a │ │ - ldr r7, [pc, #960] @ (ad544 ) │ │ + bmi.n ad132 │ │ + bmi.n ad134 │ │ + bmi.n ad136 │ │ + bmi.n ad138 │ │ + bmi.n ad13a │ │ + ldr r7, [pc, #960] @ (ad554 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n ad6a4 │ │ - beq.n ad194 │ │ - b.n ad628 │ │ + b.n ad6b4 │ │ + beq.n ad1a4 │ │ + b.n ad638 │ │ ldrh r4, [r0, #24] │ │ stc 0, cr13, [sp, #-128]! @ 0xffffff80 │ │ - b.n ad630 │ │ + b.n ad640 │ │ movs r0, r0 │ │ - b.n ad840 │ │ + b.n ad850 │ │ lsls r7, r2, #9 │ │ lsrs r0, r0, #8 │ │ - add r0, pc, #0 @ (adr r0, ad1a0 ) │ │ - b.n ad4e2 │ │ + add r0, pc, #0 @ (adr r0, ad1b0 ) │ │ + b.n ad4f2 │ │ movs r0, r0 │ │ - b.n ad8e6 │ │ + b.n ad8f6 │ │ movs r0, r0 │ │ - b.n accb0 │ │ + b.n accc0 │ │ lsrs r7, r7, #31 │ │ - b.n ad7cc │ │ + b.n ad7dc │ │ lsrs r2, r7, #31 │ │ - b.n ad84e │ │ + b.n ad85e │ │ str r0, [sp, #4] │ │ - b.n ad4f6 │ │ + b.n ad506 │ │ movs r0, r0 │ │ - b.n ad3de │ │ + b.n ad3ee │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n ad874 │ │ + b.n ad884 │ │ lsrs r7, r7, #31 │ │ lsls r7, r1, #12 │ │ lsrs r5, r7, #27 │ │ lsls r7, r1, #13 │ │ movs r0, r0 │ │ movs r2, r2 │ │ lsls r1, r4, #9 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n ad88a │ │ + b.n ad89a │ │ lsls r5, r1, #9 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n acd12 │ │ + b.n acd22 │ │ lsrs r4, r5, #4 │ │ - b.n ad7f2 │ │ + b.n ad802 │ │ strb r1, [r0, #25] │ │ - b.n ad7f8 │ │ + b.n ad808 │ │ lsrs r7, r7, #31 │ │ - b.n ad888 │ │ + b.n ad898 │ │ ldrb r1, [r1, #10] │ │ - b.n ad870 │ │ + b.n ad880 │ │ movs r7, r0 │ │ - b.n ad494 │ │ + b.n ad4a4 │ │ lsls r1, r1, #9 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #32 │ │ - b.n acd2e │ │ + b.n acd3e │ │ @ instruction: 0x47c2 │ │ - b.n ad80e │ │ - ldr r7, [pc, #1020] @ (ad5fc ) │ │ - b.n ad8a0 │ │ + b.n ad81e │ │ + ldr r7, [pc, #1020] @ (ad60c ) │ │ + b.n ad8b0 │ │ movs r0, r0 │ │ - b.n ad8a8 │ │ + b.n ad8b8 │ │ lsls r3, r0, #9 │ │ - ldr r2, [pc, #0] @ (ad208 ) │ │ + ldr r2, [pc, #0] @ (ad218 ) │ │ lsls r2, r0, #8 │ │ - b.n ad830 │ │ + b.n ad840 │ │ lsls r0, r1, #11 │ │ lsrs r0, r0, #8 │ │ ldr r2, [r0, r0] │ │ - b.n ad61a │ │ + b.n ad62a │ │ ldrb r2, [r0, #0] │ │ - b.n ad664 │ │ + b.n ad674 │ │ movs r1, r0 │ │ - b.n ad44c │ │ + b.n ad45c │ │ lsls r3, r0, #9 │ │ subs r0, r0, r0 │ │ ldr r1, [r6, #32] │ │ - b.n ad82c │ │ + b.n ad83c │ │ movs r0, r0 │ │ - b.n ad8dc │ │ + b.n ad8ec │ │ str r5, [r2, #60] @ 0x3c │ │ - b.n ad8b0 │ │ + b.n ad8c0 │ │ lsls r1, r2, #7 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n acd68 │ │ + b.n acd78 │ │ movs r6, r0 │ │ - b.n ad4dc │ │ + b.n ad4ec │ │ lsls r3, r2, #9 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n acd74 │ │ + b.n acd84 │ │ asrs r0, r2, #32 │ │ - b.n acd66 │ │ + b.n acd76 │ │ movs r0, r0 │ │ - b.n ad8ec │ │ + b.n ad8fc │ │ lsls r4, r1, #9 │ │ lsrs r0, r0, #8 │ │ strh r4, [r0, #0] │ │ - b.n acd84 │ │ + b.n acd94 │ │ movs r3, r2 │ │ - b.n ad886 │ │ + b.n ad896 │ │ lsls r3, r1, #9 │ │ subs r0, r0, r0 │ │ lsrs r2, r1, #32 │ │ - b.n ad88e │ │ + b.n ad89e │ │ lsls r7, r1, #9 │ │ subs r0, r0, r0 │ │ movs r2, r1 │ │ - b.n ad506 │ │ + b.n ad516 │ │ lsls r2, r4, #9 │ │ subs r0, r0, r0 │ │ asrs r3, r1, #3 │ │ - b.n ace22 │ │ + b.n ace32 │ │ movs r0, #24 │ │ - b.n acd8c │ │ + b.n acd9c │ │ movs r0, r0 │ │ - b.n ad918 │ │ + b.n ad928 │ │ adds r0, #28 │ │ - b.n acd94 │ │ + b.n acda4 │ │ movs r6, r1 │ │ lsrs r0, r0, #8 │ │ lsls r0, r0, #9 │ │ - b.n acdb4 │ │ + b.n acdc4 │ │ str r4, [r7, #32] │ │ - b.n acdb8 │ │ + b.n acdc8 │ │ strb r4, [r1, #9] │ │ - b.n acdbc │ │ + b.n acdcc │ │ ands r0, r1 │ │ - b.n acdae │ │ + b.n acdbe │ │ movs r4, r0 │ │ - b.n acdb2 │ │ - add r2, pc, #88 @ (adr r2, ad2ec ) │ │ + b.n acdc2 │ │ + add r2, pc, #88 @ (adr r2, ad2fc ) │ │ add.w r0, r0, r8, ror #6 │ │ - b.n acdce │ │ + b.n acdde │ │ movs r0, #4 │ │ - b.n ad39e │ │ + b.n ad3ae │ │ asrs r1, r0, #32 │ │ - b.n ad3b0 │ │ + b.n ad3c0 │ │ adds r0, #1 │ │ - b.n ad32a │ │ + b.n ad33a │ │ asrs r7, r0, #32 │ │ - b.n ad3b6 │ │ + b.n ad3c6 │ │ movs r0, #1 │ │ - b.n ad32e │ │ + b.n ad33e │ │ movs r0, r0 │ │ - b.n ad958 │ │ + b.n ad968 │ │ movs r1, r0 │ │ - bcc.n ad35a │ │ + bcc.n ad36a │ │ lsls r0, r4, #9 │ │ add r2, sp, #0 │ │ str r4, [r4, #4] │ │ - b.n acdf2 │ │ + b.n ace02 │ │ lsls r4, r0 │ │ - b.n ada02 │ │ + b.n ada12 │ │ movs r0, r0 │ │ - b.n ad970 │ │ + b.n ad980 │ │ movs r5, r6 │ │ - b.n ada0a │ │ + b.n ada1a │ │ negs r0, r3 │ │ lsls r0, r0, #12 │ │ asrs r3, r0, #32 │ │ - b.n ada92 │ │ + b.n adaa2 │ │ lsls r6, r2 │ │ - b.n ad324 │ │ + b.n ad334 │ │ movs r7, r3 │ │ - b.n ad7e6 │ │ + b.n ad7f6 │ │ movs r0, r0 │ │ - b.n ad988 │ │ + b.n ad998 │ │ lsls r0, r4, #6 │ │ - b.n ad2e4 │ │ + b.n ad2f4 │ │ lsls r6, r0, #4 │ │ - b.n ad3e6 │ │ + b.n ad3f6 │ │ strb r0, [r0, #0] │ │ asrs r7, r0, #2 │ │ movs r7, r0 │ │ - b.n ad62e │ │ - add r5, sp, #252 @ 0xfc │ │ + b.n ad63e │ │ + add r5, sp, #268 @ 0x10c │ │ add.w r0, r0, r0 │ │ - b.n ad996 │ │ + b.n ad9a6 │ │ lsls r3, r0, #9 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, r0] │ │ - b.n ad63e │ │ + b.n ad64e │ │ movs r0, r1 │ │ - b.n ad902 │ │ + b.n ad912 │ │ movs r5, r4 │ │ - b.n ad988 │ │ + b.n ad998 │ │ asrs r0, r3, #32 │ │ - b.n ace44 │ │ + b.n ace54 │ │ movs r0, r0 │ │ - b.n ad31e │ │ - add r0, pc, #80 @ (adr r0, ad360 ) │ │ - b.n ace2c │ │ + b.n ad32e │ │ + add r0, pc, #80 @ (adr r0, ad370 ) │ │ + b.n ace3c │ │ movs r1, r0 │ │ - b.n ad616 │ │ + b.n ad626 │ │ movs r0, r2 │ │ - b.n ace34 │ │ + b.n ace44 │ │ movs r5, r0 │ │ - b.n ad65e │ │ + b.n ad66e │ │ asrs r4, r0, #32 │ │ - b.n ad662 │ │ - add r0, pc, #192 @ (adr r0, ad3e4 ) │ │ - b.n ad838 │ │ + b.n ad672 │ │ + add r0, pc, #192 @ (adr r0, ad3f4 ) │ │ + b.n ad848 │ │ strh r0, [r6, #0] │ │ - b.n ad834 │ │ - ldr r7, [sp, #604] @ 0x25c │ │ + b.n ad844 │ │ + ldr r7, [sp, #732] @ 0x2dc │ │ mla r0, r0, lr, r0 │ │ ldmia.w sl, {r1, r2} │ │ - b.n ad3c0 │ │ + b.n ad3d0 │ │ movs r7, r0 │ │ - b.n ad43a │ │ + b.n ad44a │ │ lsls r4, r1, #1 │ │ - b.n ace48 │ │ + b.n ace58 │ │ movs r6, r0 │ │ stmia.w r8, {r1, r2, r7, sp} │ │ - b.n ad452 │ │ + b.n ad462 │ │ asrs r0, r3, #1 │ │ - b.n ad85c │ │ + b.n ad86c │ │ movs r0, r2 │ │ - b.n ace88 │ │ + b.n ace98 │ │ str r0, [r3, #0] │ │ - b.n ada92 │ │ + b.n adaa2 │ │ movs r4, r0 │ │ - b.n ace60 │ │ + b.n ace70 │ │ movs r5, r0 │ │ - b.n ad462 │ │ + b.n ad472 │ │ lsls r4, r0, #1 │ │ - b.n ace68 │ │ + b.n ace78 │ │ lsls r2, r0, #8 │ │ - b.n ad462 │ │ + b.n ad472 │ │ movs r0, #4 │ │ - b.n ace98 │ │ + b.n acea8 │ │ strb r4, [r1, #0] │ │ - b.n ace9e │ │ + b.n aceae │ │ movs r0, #16 │ │ - b.n ada72 │ │ + b.n ada82 │ │ movs r0, #4 │ │ - b.n ace84 │ │ + b.n ace94 │ │ movs r0, #1 │ │ - b.n ad89c │ │ + b.n ad8ac │ │ lsrs r5, r1, #11 │ │ orn r0, r1, #151552 @ 0x25000 │ │ - b.n aceb8 │ │ + b.n acec8 │ │ movs r0, #8 │ │ - b.n ace92 │ │ + b.n acea2 │ │ movs r0, #0 │ │ - b.n ad8d4 │ │ + b.n ad8e4 │ │ movs r0, #12 │ │ - b.n ace9a │ │ + b.n aceaa │ │ movs r0, #88 @ 0x58 │ │ - b.n ad898 │ │ + b.n ad8a8 │ │ cmp r2, #198 @ 0xc6 │ │ orn r0, r1, #33536 @ 0x8300 │ │ - b.n ad6d6 │ │ + b.n ad6e6 │ │ lsrs r5, r1, #11 │ │ orr.w sl, r2, #405504 @ 0x63000 │ │ orr.w r1, r2, #8448 @ 0x2100 │ │ - b.n acea8 │ │ + b.n aceb8 │ │ lsrs r5, r1, #11 │ │ orn sl, r1, #423936 @ 0x67800 │ │ orn r0, r1, #2490368 @ 0x260000 │ │ - b.n ad8c0 │ │ - ldr r2, [pc, #820] @ (ad6e4 ) │ │ + b.n ad8d0 │ │ + ldr r2, [pc, #820] @ (ad6f4 ) │ │ orn r0, r1, #196608 @ 0x30000 │ │ - b.n acec0 │ │ + b.n aced0 │ │ subs r6, #27 │ │ - b.n adafa │ │ + b.n adb0a │ │ lsrs r5, r1, #11 │ │ orr.w sl, r2, #399360 @ 0x61800 │ │ orr.w r0, r2, #155648 @ 0x26000 │ │ - b.n ad8d0 │ │ - ldr r2, [pc, #820] @ (ad6fc ) │ │ + b.n ad8e0 │ │ + ldr r2, [pc, #820] @ (ad70c ) │ │ orr.w r0, r3, #2097152 @ 0x200000 │ │ - b.n acef0 │ │ + b.n acf00 │ │ asrs r0, r0, #32 │ │ - b.n aced8 │ │ + b.n acee8 │ │ lsls r4, r2, #1 │ │ - b.n acee0 │ │ + b.n acef0 │ │ movs r4, r1 │ │ - b.n acf0c │ │ + b.n acf1c │ │ asrs r0, r4, #32 │ │ - b.n acf08 │ │ + b.n acf18 │ │ adds r0, #188 @ 0xbc │ │ - b.n acf0a │ │ + b.n acf1a │ │ movs r4, r1 │ │ - b.n acef0 │ │ + b.n acf00 │ │ movs r0, r0 │ │ - b.n acf0e │ │ + b.n acf1e │ │ movs r1, r0 │ │ - b.n ad694 │ │ + b.n ad6a4 │ │ strb r0, [r1, #1] │ │ - b.n acf24 │ │ + b.n acf34 │ │ asrs r3, r0, #32 │ │ adds r1, #160 @ 0xa0 │ │ str r0, [r2, #4] │ │ - b.n acf2c │ │ + b.n acf3c │ │ movs r0, r0 │ │ - b.n ada9e │ │ - add r0, pc, #96 @ (adr r0, ad460 ) │ │ - b.n acf1c │ │ + b.n adaae │ │ + add r0, pc, #96 @ (adr r0, ad470 ) │ │ + b.n acf2c │ │ str r4, [r2, r0] │ │ - b.n acf18 │ │ + b.n acf28 │ │ str r0, [sp, #64] @ 0x40 │ │ - b.n acf14 │ │ + b.n acf24 │ │ strb r0, [r1, #1] │ │ - b.n acf18 │ │ + b.n acf28 │ │ str r0, [r2, #4] │ │ - b.n acf1c │ │ + b.n acf2c │ │ lsls r3, r6, #6 │ │ lsrs r0, r0, #8 │ │ movs r0, #12 │ │ - b.n acf3a │ │ + b.n acf4a │ │ movs r1, r0 │ │ - b.n ad6c2 │ │ + b.n ad6d2 │ │ lsls r0, r6, #6 │ │ subs r2, #0 │ │ adds r0, #129 @ 0x81 │ │ - b.n ad766 │ │ + b.n ad776 │ │ movs r3, r0 │ │ - b.n ad6ce │ │ + b.n ad6de │ │ lsls r5, r5, #6 │ │ ldrh r0, [r0, #16] │ │ adds r0, r0, r5 │ │ - b.n acf70 │ │ + b.n acf80 │ │ adds r0, #1 │ │ - b.n adb76 │ │ + b.n adb86 │ │ cmp r1, #60 @ 0x3c │ │ - b.n acf78 │ │ + b.n acf88 │ │ strb r0, [r0, #0] │ │ - b.n adb7e │ │ + b.n adb8e │ │ str r0, [r0, #0] │ │ - b.n adc02 │ │ + b.n adc12 │ │ asrs r1, r0, #32 │ │ - b.n ad564 │ │ + b.n ad574 │ │ movs r0, #2 │ │ - b.n ad568 │ │ + b.n ad578 │ │ asrs r0, r2, #32 │ │ - b.n acf4e │ │ + b.n acf5e │ │ strb r0, [r0, #0] │ │ - b.n acf52 │ │ - add r0, pc, #36 @ (adr r0, ad478 ) │ │ - b.n ad796 │ │ + b.n acf62 │ │ + add r0, pc, #36 @ (adr r0, ad488 ) │ │ + b.n ad7a6 │ │ strb r4, [r0, #0] │ │ - b.n acf5a │ │ + b.n acf6a │ │ asrs r3, r2, #32 │ │ - b.n ada60 │ │ + b.n ada70 │ │ strb r0, [r1, #0] │ │ - b.n acf62 │ │ + b.n acf72 │ │ strb r4, [r2, #0] │ │ - b.n acf66 │ │ + b.n acf76 │ │ adds r0, #24 │ │ - b.n acf6a │ │ + b.n acf7a │ │ movs r0, #28 │ │ - b.n acf6e │ │ + b.n acf7e │ │ str r0, [r4, #0] │ │ - b.n acf72 │ │ + b.n acf82 │ │ adds r0, #36 @ 0x24 │ │ - b.n acf76 │ │ + b.n acf86 │ │ lsls r0, r4, #2 │ │ - b.n acfee │ │ + b.n acffe │ │ str r4, [r5, #24] │ │ - b.n acfb2 │ │ + b.n acfc2 │ │ movs r0, r0 │ │ - b.n acfa2 │ │ + b.n acfb2 │ │ movs r0, r0 │ │ - b.n ad592 │ │ + b.n ad5a2 │ │ lsrs r7, r7, #31 │ │ - b.n adb2a │ │ + b.n adb3a │ │ lsrs r7, r7, #31 │ │ str r3, [sp, #640] @ 0x280 │ │ lsls r0, r0, #6 │ │ - b.n ad594 │ │ + b.n ad5a4 │ │ movs r7, r3 │ │ - b.n ad42c │ │ + b.n ad43c │ │ ands r0, r1 │ │ - b.n ad91a │ │ + b.n ad92a │ │ movs r4, r0 │ │ - b.n ad7de │ │ - add r4, sp, #844 @ 0x34c │ │ + b.n ad7ee │ │ + add r4, sp, #860 @ 0x35c │ │ add.w r0, r0, r0 │ │ - b.n adb46 │ │ + b.n adb56 │ │ lsls r4, r3, #7 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n ad7ee │ │ + b.n ad7fe │ │ movs r0, r0 │ │ - b.n adb5e │ │ + b.n adb6e │ │ strb r4, [r0, #0] │ │ - b.n acff8 │ │ + b.n ad008 │ │ asrs r0, r4, #2 │ │ - b.n acfc4 │ │ + b.n acfd4 │ │ asrs r2, r0, #32 │ │ - b.n adc7e │ │ + b.n adc8e │ │ asrs r4, r4, #4 │ │ - b.n ad5c4 │ │ + b.n ad5d4 │ │ asrs r1, r4, #2 │ │ - b.n ad806 │ │ + b.n ad816 │ │ asrs r0, r0, #32 │ │ - b.n acfca │ │ + b.n acfda │ │ lsls r5, r2, #2 │ │ lsrs r0, r0, #8 │ │ negs r0, r1 │ │ - b.n ad004 │ │ + b.n ad014 │ │ strh r4, [r2, #2] │ │ - bge.w ad4f6 │ │ - b.n acff4 │ │ + bge.w ad506 │ │ + b.n ad004 │ │ strh r7, [r1, #0] │ │ - b.n adc9e │ │ + b.n adcae │ │ str r4, [r2, r0] │ │ - b.n acffc │ │ + b.n ad00c │ │ movs r7, r0 │ │ and.w r2, r0, r0, lsr #1 │ │ - b.n ad01c │ │ + b.n ad02c │ │ asrs r0, r0, #32 │ │ - b.n adc2e │ │ + b.n adc3e │ │ movs r1, r0 │ │ - b.n ad992 │ │ + b.n ad9a2 │ │ movs r1, r0 │ │ adds r1, #160 @ 0xa0 │ │ lsls r0, r2, #9 │ │ - b.n ad00c │ │ + b.n ad01c │ │ negs r0, r1 │ │ - b.n ad030 │ │ + b.n ad040 │ │ movs r0, r0 │ │ - b.n adbaa │ │ + b.n adbba │ │ lsls r2, r0, #2 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n ad03e │ │ + b.n ad04e │ │ str r0, [r2, #0] │ │ - b.n ad036 │ │ + b.n ad046 │ │ movs r0, #212 @ 0xd4 │ │ - b.n ad792 │ │ + b.n ad7a2 │ │ asrs r1, r0, #32 │ │ - b.n ada1c │ │ + b.n ada2c │ │ movs r1, r0 │ │ - b.n ad7be │ │ + b.n ad7ce │ │ movs r4, r1 │ │ subs r2, #0 │ │ movs r0, r0 │ │ - b.n adbc8 │ │ + b.n adbd8 │ │ asrs r0, r0, #32 │ │ - b.n ad026 │ │ + b.n ad036 │ │ movs r3, r2 │ │ lsrs r0, r0, #8 │ │ movs r1, #3 │ │ - b.n ad44e │ │ + b.n ad45e │ │ movs r6, r0 │ │ - b.n ad7d6 │ │ + b.n ad7e6 │ │ movs r1, r2 │ │ ldrh r0, [r0, #16] │ │ movs r1, #1 │ │ - b.n ad43a │ │ + b.n ad44a │ │ asrs r1, r0, #32 │ │ - b.n ad9c0 │ │ + b.n ad9d0 │ │ adds r0, #1 │ │ - b.n ad9e8 │ │ + b.n ad9f8 │ │ @ instruction: 0xfff81aff │ │ adds r0, #0 │ │ - b.n adc8a │ │ + b.n adc9a │ │ asrs r1, r0, #32 │ │ - b.n adc8e │ │ + b.n adc9e │ │ movs r4, r1 │ │ and.w r0, r0, sl │ │ - b.n ad896 │ │ + b.n ad8a6 │ │ @ instruction: 0x47d7 │ │ add.w r0, r0, r0 │ │ - b.n adbfe │ │ + b.n adc0e │ │ lsls r1, r3, #5 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n ad09a │ │ + b.n ad0aa │ │ adds r0, #0 │ │ - b.n ad08a │ │ + b.n ad09a │ │ asrs r1, r0, #32 │ │ - b.n ada74 │ │ + b.n ada84 │ │ movs r0, r0 │ │ - b.n adc18 │ │ + b.n adc28 │ │ asrs r0, r0, #32 │ │ - b.n ad076 │ │ + b.n ad086 │ │ @ instruction: 0xffeb1aff │ │ adds r0, #0 │ │ - b.n adcbe │ │ + b.n adcce │ │ movs r3, r0 │ │ - b.n ad824 │ │ + b.n ad834 │ │ movs r6, r3 │ │ ldr r2, [sp, #0] │ │ movs r0, #1 │ │ - b.n ada0c │ │ + b.n ada1c │ │ movs r2, r0 │ │ - b.n ad834 │ │ + b.n ad844 │ │ movs r0, #3 │ │ adds r1, #160 @ 0xa0 │ │ strb r2, [r0, #0] │ │ - b.n ad618 │ │ + b.n ad628 │ │ movs r4, r0 │ │ - b.n adc48 │ │ + b.n adc58 │ │ movs r1, r0 │ │ cmp r2, #0 │ │ movs r0, #1 │ │ - b.n ad8e2 │ │ + b.n ad8f2 │ │ movs r1, r2 │ │ and.w pc, r0, r9, ror #11 │ │ - b.n adac8 │ │ + b.n adad8 │ │ stmia r0!, {r0, r1} │ │ - b.n add3c │ │ + b.n add4c │ │ lsrs r7, r5, #11 │ │ orn r0, r2, #573440 @ 0x8c000 │ │ - b.n ad638 │ │ + b.n ad648 │ │ asrs r1, r0, #4 │ │ - b.n ad6ba │ │ + b.n ad6ca │ │ str r4, [r1, r0] │ │ - b.n ad8fe │ │ + b.n ad90e │ │ ldr r0, [r2, #56] @ 0x38 │ │ cdp 0, 10, cr6, cr2, cr12, {0} │ │ - b.n ad6d2 │ │ + b.n ad6e2 │ │ lsrs r0, r4, #3 │ │ @ instruction: 0xf262100c │ │ - b.n ada50 │ │ + b.n ada60 │ │ movs r0, #96 @ 0x60 │ │ @ instruction: 0xf3f808c8 │ │ @ instruction: 0xf2605004 │ │ - b.n ada84 │ │ + b.n ada94 │ │ cmp r0, #226 @ 0xe2 │ │ @ instruction: 0xf2f22a88 │ │ - bl ffcef5d4 │ │ + bl ffcef5e4 │ │ subs r7, r7, r3 │ │ movs r4, r1 │ │ - b.n ad898 │ │ + b.n ad8a8 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ str r2, [r0, #16] │ │ - b.n ad4f2 │ │ + b.n ad502 │ │ movs r0, #1 │ │ - b.n ada7a │ │ + b.n ada8a │ │ str r1, [r0, #0] │ │ - b.n adb06 │ │ + b.n adb16 │ │ movs r3, r0 │ │ - b.n ad8a2 │ │ + b.n ad8b2 │ │ @ instruction: 0xfffa8aff │ │ movs r4, r2 │ │ - b.n ad12e │ │ + b.n ad13e │ │ lsls r0, r1, #9 │ │ - b.n ad11c │ │ + b.n ad12c │ │ strb r0, [r0, #9] │ │ - b.n ad140 │ │ + b.n ad150 │ │ str r0, [r2, #0] │ │ - b.n ad13a │ │ + b.n ad14a │ │ movs r7, r0 │ │ - b.n ad956 │ │ + b.n ad966 │ │ asrs r6, r0, #32 │ │ - b.n ad95a │ │ + b.n ad96a │ │ movs r2, #247 @ 0xf7 │ │ add.w r0, r0, r0, lsr #4 │ │ - b.n add62 │ │ + b.n add72 │ │ asrs r2, r7, #2 │ │ - b.n ad9ae │ │ + b.n ad9be │ │ asrs r0, r0, #32 │ │ - b.n addea │ │ + b.n addfa │ │ asrs r4, r0, #32 │ │ - b.n ad136 │ │ + b.n ad146 │ │ asrs r0, r0, #32 │ │ - b.n ad13a │ │ + b.n ad14a │ │ asrs r0, r0, #9 │ │ - b.n ad168 │ │ + b.n ad178 │ │ movs r0, r0 │ │ - b.n adcdc │ │ + b.n adcec │ │ @ instruction: 0xffa90aff │ │ movs r0, #128 @ 0x80 │ │ - b.n ad742 │ │ + b.n ad752 │ │ str r0, [r1, r0] │ │ - b.n ad168 │ │ + b.n ad178 │ │ movs r1, #2 │ │ - b.n ad758 │ │ + b.n ad768 │ │ lsls r0, r1, #2 │ │ ldmia.w r1, {r0, ip, sp, lr} │ │ - b.n adae0 │ │ + b.n adaf0 │ │ movs r0, #20 │ │ - b.n ad17a │ │ + b.n ad18a │ │ str r1, [r0, r0] │ │ - b.n adae4 │ │ + b.n adaf4 │ │ str r0, [r1, r0] │ │ - b.n ad160 │ │ + b.n ad170 │ │ movs r6, r0 │ │ - b.n ad906 │ │ + b.n ad916 │ │ movs r0, #0 │ │ - b.n adda6 │ │ + b.n addb6 │ │ movs r2, r0 │ │ asrs r0, r4, #6 │ │ movs r0, #0 │ │ - b.n ad6fc │ │ + b.n ad70c │ │ movs r0, r0 │ │ - b.n ad918 │ │ + b.n ad928 │ │ lsls r0, r0, #2 │ │ - b.n ad776 │ │ + b.n ad786 │ │ adds r0, #1 │ │ movs r2, #67 @ 0x43 │ │ movs r0, #130 @ 0x82 │ │ - b.n ad782 │ │ + b.n ad792 │ │ lsls r0, r1, #2 │ │ stmia.w r1, {r8, ip} │ │ - b.n ad788 │ │ + b.n ad798 │ │ adds r0, #24 │ │ - b.n addca │ │ + b.n addda │ │ movs r0, r2 │ │ - b.n adb90 │ │ + b.n adba0 │ │ movs r1, #2 │ │ - b.n ad798 │ │ + b.n ad7a8 │ │ asrs r4, r3, #32 │ │ - b.n adb98 │ │ - ldr r7, [sp, #300] @ 0x12c │ │ + b.n adba8 │ │ + ldr r6, [sp, #496] @ 0x1f0 │ │ @ instruction: 0xfb00023c │ │ - b.n ad1d0 │ │ + b.n ad1e0 │ │ str r0, [r0, #4] │ │ - b.n ad1d4 │ │ + b.n ad1e4 │ │ movs r1, r0 │ │ - b.n adba6 │ │ + b.n adbb6 │ │ lsls r4, r7, #8 │ │ - b.n ad1bc │ │ + b.n ad1cc │ │ movs r7, r0 │ │ - b.n ad25a │ │ + b.n ad26a │ │ movs r0, r1 │ │ - b.n adcd2 │ │ + b.n adce2 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ asrs r0, r6, #2 │ │ - b.n ad1e6 │ │ + b.n ad1f6 │ │ lsls r0, r3, #4 │ │ - b.n ad1ea │ │ + b.n ad1fa │ │ movs r1, r0 │ │ - b.n ad962 │ │ + b.n ad972 │ │ movs r7, r1 │ │ cmp r2, #0 │ │ asrs r4, r3, #4 │ │ - b.n ad1f6 │ │ + b.n ad206 │ │ movs r1, r0 │ │ - b.n adbce │ │ + b.n adbde │ │ asrs r4, r2, #32 │ │ - b.n ad1da │ │ + b.n ad1ea │ │ lsls r0, r3, #4 │ │ - b.n ad1e2 │ │ + b.n ad1f2 │ │ asrs r4, r3 │ │ - b.n ad1e6 │ │ + b.n ad1f6 │ │ @ instruction: 0xff86eaff │ │ lsls r4, r3, #1 │ │ - b.n ad28e │ │ + b.n ad29e │ │ asrs r1, r0, #32 │ │ - b.n ade26 │ │ + b.n ade36 │ │ movs r0, #255 @ 0xff │ │ - b.n ade2a │ │ + b.n ade3a │ │ asrs r1, r2, #32 │ │ - b.n ada2e │ │ + b.n ada3e │ │ movs r4, r0 │ │ - b.n ada32 │ │ - ldr r6, [sp, #440] @ 0x1b8 │ │ - @ instruction: 0xfb0010b0 │ │ - b.n ad226 │ │ + b.n ada42 │ │ + ldr r6, [sp, #908] @ 0x38c │ │ + @ instruction: 0xfa0010b0 │ │ + b.n ad236 │ │ lsls r0, r3, #4 │ │ - b.n ad22a │ │ + b.n ad23a │ │ movs r1, r0 │ │ - b.n ad9a2 │ │ + b.n ad9b2 │ │ @ instruction: 0xffef3aff │ │ movs r4, r0 │ │ - b.n adb92 │ │ + b.n adba2 │ │ add r4, sp, #176 @ 0xb0 │ │ @ instruction: 0xeb00ff79 │ │ @ instruction: 0xeaff5014 │ │ - b.n ad250 │ │ + b.n ad260 │ │ movs r0, r0 │ │ - b.n ade5a │ │ + b.n ade6a │ │ strh r0, [r2, #0] │ │ - b.n ad258 │ │ + b.n ad268 │ │ lsls r4, r6, #8 │ │ - b.n ad234 │ │ + b.n ad244 │ │ lsls r4, r1, #9 │ │ - b.n ad238 │ │ + b.n ad248 │ │ lsls r0, r0, #9 │ │ - b.n ad25c │ │ + b.n ad26c │ │ asrs r0, r0, #32 │ │ - b.n ade6e │ │ + b.n ade7e │ │ ldmia r7, {r0, r2, r3, r7} │ │ - b.n adc3c │ │ + b.n adc4c │ │ movs r2, #56 @ 0x38 │ │ - b.n ad268 │ │ + b.n ad278 │ │ adds r2, #60 @ 0x3c │ │ - b.n ad26c │ │ + b.n ad27c │ │ movs r6, r1 │ │ stmia.w ip, {r4, r6, r7, sp} │ │ - b.n adac2 │ │ + b.n adad2 │ │ movs r3, r0 │ │ - b.n ad9ea │ │ + b.n ad9fa │ │ movs r4, #7 │ │ subs r0, r0, r4 │ │ lsls r4, r2, #9 │ │ - b.n ad280 │ │ + b.n ad290 │ │ ands r0, r3 │ │ - b.n ad28c │ │ + b.n ad29c │ │ movs r0, r0 │ │ - b.n addf6 │ │ + b.n ade06 │ │ strb r0, [r2, #9] │ │ asrs r1, r3, #22 │ │ lsls r6, r0, #4 │ │ asrs r7, r6, #13 │ │ lsls r0, r1, #3 │ │ subs r0, r0, r0 │ │ asrs r0, r4, #2 │ │ - b.n ad298 │ │ + b.n ad2a8 │ │ adds r0, #4 │ │ - b.n adeaa │ │ + b.n adeba │ │ lsls r0, r4, #2 │ │ - b.n ad298 │ │ + b.n ad2a8 │ │ movs r0, #0 │ │ - b.n ad294 │ │ + b.n ad2a4 │ │ movs r1, #2 │ │ - b.n ad87c │ │ - ldr r6, [sp, #844] @ 0x34c │ │ - @ instruction: 0xfb000e22 │ │ - b.n adc9c │ │ + b.n ad88c │ │ + ldr r5, [sp, #176] @ 0xb0 │ │ + @ instruction: 0xfa000e22 │ │ + b.n adcac │ │ strb r4, [r0, #0] │ │ - b.n adac2 │ │ + b.n adad2 │ │ lsrs r7, r5, #11 │ │ orn sp, r0, #8781824 @ 0x860000 │ │ - b.n adc9a │ │ + b.n adcaa │ │ asrs r0, r1, #3 │ │ - b.n adc98 │ │ + b.n adca8 │ │ ldr r1, [r0, #64] @ 0x40 │ │ - b.n aded2 │ │ + b.n adee2 │ │ lsrs r7, r1, #11 │ │ orr.w lr, r0, #10289152 @ 0x9d0000 │ │ - b.n adca4 │ │ - b.n ad7b4 │ │ - b.n adede │ │ + b.n adcb4 │ │ + b.n ad7c4 │ │ + b.n adeee │ │ stmia r0!, {} │ │ - b.n adee2 │ │ + b.n adef2 │ │ lsls r0, r1, #7 │ │ - b.n ad2b0 │ │ + b.n ad2c0 │ │ lsls r0, r7, #1 │ │ - b.n ad318 │ │ + b.n ad328 │ │ asrs r0, r1, #32 │ │ - b.n ad2c8 │ │ + b.n ad2d8 │ │ asrs r0, r0, #3 │ │ - b.n ad2bc │ │ + b.n ad2cc │ │ asrs r0, r7, #1 │ │ - b.n adcc6 │ │ + b.n adcd6 │ │ adds r1, #4 │ │ - b.n ad2e8 │ │ + b.n ad2f8 │ │ asrs r4, r1, #32 │ │ - b.n ad2d8 │ │ + b.n ad2e8 │ │ lsrs r6, r0, #11 │ │ orr.w r0, r1, #9699328 @ 0x940000 │ │ - b.n ad2e0 │ │ + b.n ad2f0 │ │ movs r4, r0 │ │ - b.n ad2f8 │ │ + b.n ad308 │ │ movs r1, #0 │ │ - b.n ad2fc │ │ + b.n ad30c │ │ movs r0, r2 │ │ - b.n ad2ec │ │ + b.n ad2fc │ │ movs r0, r1 │ │ - b.n adb16 │ │ + b.n adb26 │ │ movs r0, #240 @ 0xf0 │ │ - b.n adb5c │ │ + b.n adb6c │ │ strh r0, [r1, #0] │ │ - b.n ad30c │ │ + b.n ad31c │ │ asrs r4, r2, #32 │ │ - b.n ad31c │ │ - add r0, pc, #48 @ (adr r0, ad814 ) │ │ - b.n ad314 │ │ + b.n ad32c │ │ + add r0, pc, #48 @ (adr r0, ad824 ) │ │ + b.n ad324 │ │ asrs r1, r0, #32 │ │ - b.n ad89a │ │ + b.n ad8aa │ │ strh r0, [r0, #0] │ │ - b.n adb2e │ │ + b.n adb3e │ │ movs r0, r2 │ │ - b.n ad32c │ │ + b.n ad33c │ │ stmia r1!, {r6, r7} │ │ - b.n ad300 │ │ + b.n ad310 │ │ asrs r0, r0, #32 │ │ - b.n ad9ae │ │ - b.n adb84 │ │ - b.n ad308 │ │ + b.n ad9be │ │ + b.n adb94 │ │ + b.n ad318 │ │ stmia r0!, {r3, r4, r5, r7} │ │ - b.n ad30c │ │ - b.n ad97c │ │ - b.n ad310 │ │ + b.n ad31c │ │ + b.n ad98c │ │ + b.n ad320 │ │ movs r6, r2 │ │ subs r2, #0 │ │ movs r0, #184 @ 0xb8 │ │ - b.n ad340 │ │ + b.n ad350 │ │ str r4, [r1, #0] │ │ - b.n ad34c │ │ + b.n ad35c │ │ movs r5, r1 │ │ - b.n adeba │ │ + b.n adeca │ │ movs r7, r0 │ │ subs r2, #0 │ │ asrs r4, r7, #2 │ │ - b.n ad350 │ │ + b.n ad360 │ │ movs r6, r0 │ │ - b.n adb62 │ │ + b.n adb72 │ │ bx fp │ │ add.w r0, r0, r0 │ │ - b.n adeca │ │ + b.n adeda │ │ lsls r3, r1, #1 │ │ subs r0, r0, r0 │ │ movs r0, #184 @ 0xb8 │ │ - b.n ad364 │ │ + b.n ad374 │ │ lsls r0, r0, #3 │ │ - b.n ad360 │ │ + b.n ad370 │ │ movs r0, r1 │ │ - b.n ad354 │ │ + b.n ad364 │ │ asrs r0, r0, #3 │ │ - b.n ad370 │ │ + b.n ad380 │ │ movs r1, #130 @ 0x82 │ │ - b.n adb82 │ │ + b.n adb92 │ │ movs r0, r1 │ │ - b.n ad380 │ │ - ldr r5, [sp, #4] │ │ - @ instruction: 0xfa004018 │ │ - b.n ad388 │ │ - b.n ad868 │ │ - b.n adf92 │ │ + b.n ad390 │ │ + ldr r6, [sp, #68] @ 0x44 │ │ + mls r0, r0, r8, r4 │ │ + b.n ad398 │ │ + b.n ad878 │ │ + b.n adfa2 │ │ lsrs r7, r1, #11 │ │ - blx ff114854 │ │ - b.n adf9a │ │ + blx ff114864 │ │ + b.n adfaa │ │ lsls r0, r7, #2 │ │ - b.n ad390 │ │ + b.n ad3a0 │ │ lsls r0, r7, #2 │ │ - b.n ad36c │ │ + b.n ad37c │ │ lsrs r7, r1, #11 │ │ orr.w pc, r6, #13434880 @ 0xcd0000 │ │ - b.n add88 │ │ + b.n add98 │ │ asrs r0, r7, #3 │ │ - b.n ad3d6 │ │ + b.n ad3e6 │ │ lsrs r7, r5, #11 │ │ orn pc, r0, #13762560 @ 0xd20000 │ │ - b.n add80 │ │ + b.n add90 │ │ str r0, [r7, #12] │ │ - b.n add8a │ │ + b.n add9a │ │ lsls r4, r1, #2 │ │ @ instruction: 0xe9941001 │ │ - b.n ad928 │ │ + b.n ad938 │ │ asrs r2, r0, #32 │ │ - b.n ada34 │ │ + b.n ada44 │ │ stmia r1!, {r3, r4, r5} │ │ - b.n ad394 │ │ - b.n adb04 │ │ - b.n ad398 │ │ + b.n ad3a4 │ │ + b.n adb14 │ │ + b.n ad3a8 │ │ lsls r0, r0, #5 │ │ - b.n ad39c │ │ + b.n ad3ac │ │ lsrs r7, r1, #11 │ │ orr.w r0, r6, #9437184 @ 0x900000 │ │ subs r2, #0 │ │ movs r1, #56 @ 0x38 │ │ - b.n ad3d0 │ │ + b.n ad3e0 │ │ movs r5, r1 │ │ - b.n adf46 │ │ + b.n adf56 │ │ movs r6, r0 │ │ subs r2, #0 │ │ asrs r4, r7, #4 │ │ - b.n ad3dc │ │ + b.n ad3ec │ │ movs r6, r0 │ │ - b.n adbee │ │ + b.n adbfe │ │ bx r7 │ │ add.w r0, r0, r0 │ │ - b.n adf56 │ │ + b.n adf66 │ │ movs r0, r5 │ │ subs r0, r0, r0 │ │ movs r1, #56 @ 0x38 │ │ - b.n ad3f0 │ │ + b.n ad400 │ │ lsls r0, r0, #5 │ │ - b.n ad3ec │ │ + b.n ad3fc │ │ asrs r0, r0, #5 │ │ - b.n ad3f8 │ │ + b.n ad408 │ │ movs r1, #130 @ 0x82 │ │ - b.n adc0a │ │ - ldr r4, [sp, #896] @ 0x380 │ │ - @ instruction: 0xfa000acf │ │ + b.n adc1a │ │ + ldr r5, [sp, #960] @ 0x3c0 │ │ + @ instruction: 0xfb000acf │ │ orn r1, r4, #12058624 @ 0xb80000 │ │ - b.n ad408 │ │ + b.n ad418 │ │ lsls r0, r7, #4 │ │ - b.n ad3e4 │ │ + b.n ad3f4 │ │ lsrs r7, r1, #11 │ │ orr.w r2, r6, #12845056 @ 0xc40000 │ │ - b.n ad414 │ │ + b.n ad424 │ │ lsls r4, r0, #9 │ │ - b.n ad3f0 │ │ + b.n ad400 │ │ asrs r4, r2, #1 │ │ - b.n ad414 │ │ + b.n ad424 │ │ movs r0, r0 │ │ - b.n ad40e │ │ + b.n ad41e │ │ lsls r4, r0, #9 │ │ - b.n ad404 │ │ + b.n ad414 │ │ movs r0, r0 │ │ - b.n ae036 │ │ + b.n ae046 │ │ movs r0, r0 │ │ - b.n ad3fc │ │ + b.n ad40c │ │ asrs r4, r2, #1 │ │ - b.n ad428 │ │ + b.n ad438 │ │ movs r4, r0 │ │ - b.n ad404 │ │ + b.n ad414 │ │ lsls r4, r1, #1 │ │ - b.n ad438 │ │ + b.n ad448 │ │ asrs r4, r1, #1 │ │ - b.n ad434 │ │ + b.n ad444 │ │ movs r0, r0 │ │ - b.n ad4ae │ │ + b.n ad4be │ │ lsls r2, r6, #3 │ │ - b.n add12 │ │ + b.n add22 │ │ movs r0, r0 │ │ - b.n ad498 │ │ + b.n ad4a8 │ │ lsls r4, r1, #1 │ │ - b.n ad44c │ │ + b.n ad45c │ │ asrs r4, r1, #1 │ │ - b.n ad448 │ │ + b.n ad458 │ │ movs r1, r0 │ │ - b.n ad4c2 │ │ + b.n ad4d2 │ │ lsls r2, r6, #3 │ │ - b.n add26 │ │ + b.n add36 │ │ movs r1, r0 │ │ - b.n ad4ac │ │ + b.n ad4bc │ │ lsls r4, r1, #1 │ │ - b.n ad458 │ │ + b.n ad468 │ │ asrs r0, r1, #32 │ │ - b.n ad464 │ │ + b.n ad474 │ │ asrs r0, r1, #32 │ │ - b.n ad440 │ │ + b.n ad450 │ │ movs r2, r0 │ │ - b.n ade3a │ │ + b.n ade4a │ │ asrs r2, r0, #32 │ │ - b.n addc0 │ │ - ldr r6, [sp, #556] @ 0x22c │ │ - @ instruction: 0xfa001044 │ │ - b.n ad478 │ │ + b.n addd0 │ │ + ldr r6, [sp, #236] @ 0xec │ │ + @ instruction: 0xfb001044 │ │ + b.n ad488 │ │ movs r0, #96 @ 0x60 │ │ - b.n ae08a │ │ + b.n ae09a │ │ lsls r4, r0, #1 │ │ - b.n ad478 │ │ - ldr r6, [sp, #372] @ 0x174 │ │ - mla r0, r0, r9, r0 │ │ - b.n adc96 │ │ + b.n ad488 │ │ + ldr r4, [sp, #728] @ 0x2d8 │ │ + @ instruction: 0xfa000009 │ │ + b.n adca6 │ │ asrs r1, r0, #32 │ │ - b.n ae09a │ │ - ldr r3, [pc, #276] @ (ada70 ) │ │ + b.n ae0aa │ │ + ldr r3, [pc, #276] @ (ada80 ) │ │ add.w r0, r0, r4, lsr #20 │ │ - b.n ad494 │ │ + b.n ad4a4 │ │ ldr r1, [r6, #32] │ │ - b.n adf6c │ │ + b.n adf7c │ │ str r0, [sp, #112] @ 0x70 │ │ - b.n ad4a4 │ │ + b.n ad4b4 │ │ movs r0, r0 │ │ - b.n ae00e │ │ + b.n ae01e │ │ str r5, [r2, #60] @ 0x3c │ │ - b.n adff4 │ │ + b.n ae004 │ │ movs r2, r7 │ │ lsrs r0, r0, #8 │ │ lsls r5, r7, #2 │ │ and.w r0, r0, r0 │ │ - b.n ae028 │ │ + b.n ae038 │ │ movs r3, r1 │ │ subs r0, r0, r0 │ │ str r0, [sp, #12] │ │ - b.n adcc6 │ │ + b.n adcd6 │ │ str r4, [r0, r2] │ │ - b.n ad4be │ │ + b.n ad4ce │ │ movs r7, r5 │ │ @ instruction: 0xea00f000 │ │ - b.n adfd2 │ │ + b.n adfe2 │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r1, r0 │ │ movs r0, r0 │ │ movs r2, r0 │ │ movs r0, r0 │ │ movs r3, r0 │ │ movs r0, r0 │ │ @ instruction: 0xffffffff │ │ @ instruction: 0xffffffff │ │ ... │ │ str r4, [r4, #4] │ │ - b.n ad4ea │ │ + b.n ad4fa │ │ movs r5, r6 │ │ - b.n ae0fa │ │ + b.n ae10a │ │ str r0, [sp, #8] │ │ - b.n adcfe │ │ + b.n add0e │ │ adds r0, #28 │ │ - b.n ad4dc │ │ + b.n ad4ec │ │ strb r7, [r3, #0] │ │ - b.n aded2 │ │ + b.n adee2 │ │ lsls r6, r2, #2 │ │ - b.n ad9ca │ │ + b.n ad9da │ │ asrs r7, r4, #10 │ │ - b.n add0e │ │ + b.n add1e │ │ lsls r6, r0, #4 │ │ - b.n adad2 │ │ + b.n adae2 │ │ lsls r1, r0, #4 │ │ - b.n adad6 │ │ + b.n adae6 │ │ lsls r4, r0 │ │ - b.n adeda │ │ + b.n adeea │ │ movs r4, r0 │ │ - b.n add1e │ │ - add r3, sp, #524 @ 0x20c │ │ + b.n add2e │ │ + add r3, sp, #540 @ 0x21c │ │ add.w r0, r0, r0 │ │ - b.n ae086 │ │ + b.n ae096 │ │ lsls r3, r0, #3 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, r0] │ │ - b.n add2e │ │ + b.n add3e │ │ movs r3, r0 │ │ - b.n ae1b2 │ │ + b.n ae1c2 │ │ strb r7, [r4, #6] │ │ - b.n ad9f6 │ │ + b.n ada06 │ │ movs r5, r0 │ │ - b.n add3a │ │ + b.n add4a │ │ asrs r4, r0, #2 │ │ - b.n ae13e │ │ + b.n ae14e │ │ strh r6, [r0, #8] │ │ - b.n add42 │ │ - ldr r5, [sp, #900] @ 0x384 │ │ + b.n add52 │ │ + ldr r6, [sp, #4] │ │ @ instruction: 0xfb003086 │ │ - b.n adb16 │ │ + b.n adb26 │ │ asrs r6, r0, #32 │ │ - b.n ada96 │ │ + b.n adaa6 │ │ lsls r4, r0, #2 │ │ - b.n adf1c │ │ + b.n adf2c │ │ asrs r5, r0, #32 │ │ - b.n adb18 │ │ + b.n adb28 │ │ str r3, [r0, #32] │ │ - b.n adb1a │ │ + b.n adb2a │ │ movs r0, #9 │ │ - b.n add5e │ │ + b.n add6e │ │ str r0, [sp, #16] │ │ - b.n ad52c │ │ + b.n ad53c │ │ adds r0, #7 │ │ - b.n adaa8 │ │ + b.n adab8 │ │ str r0, [sp, #112] @ 0x70 │ │ - b.n ad564 │ │ + b.n ad574 │ │ strb r0, [r1, #0] │ │ - b.n adb3a │ │ + b.n adb4a │ │ str r4, [r2, #4] │ │ - b.n ad53c │ │ + b.n ad54c │ │ ldr r1, [r6, #32] │ │ - b.n ae03c │ │ + b.n ae04c │ │ str r5, [r2, #60] @ 0x3c │ │ - b.n ae0bc │ │ - add r0, pc, #256 @ (adr r0, adb3c ) │ │ - b.n ad548 │ │ + b.n ae0cc │ │ + add r0, pc, #256 @ (adr r0, adb4c ) │ │ + b.n ad558 │ │ lsls r4, r0, #1 │ │ - b.n ad54c │ │ + b.n ad55c │ │ adds r0, #72 @ 0x48 │ │ - b.n ad550 │ │ + b.n ad560 │ │ asrs r4, r1, #1 │ │ - b.n ad554 │ │ + b.n ad564 │ │ strb r0, [r2, #1] │ │ - b.n ad558 │ │ + b.n ad568 │ │ movs r5, r0 │ │ - b.n add92 │ │ + b.n adda2 │ │ asrs r2, r0, #32 │ │ - b.n add96 │ │ + b.n adda6 │ │ str.w lr, [r4, #3071] @ 0xbff │ │ movs r0, r0 │ │ - b.n ae0fe │ │ + b.n ae10e │ │ lsls r7, r1, #2 │ │ subs r0, r0, r0 │ │ movs r0, r1 │ │ - b.n ad59c │ │ + b.n ad5ac │ │ lsls r0, r7, #1 │ │ - b.n ad574 │ │ + b.n ad584 │ │ movs r0, r0 │ │ - b.n ae1ae │ │ + b.n ae1be │ │ str r0, [r0, #0] │ │ - b.n ad57c │ │ + b.n ad58c │ │ str r0, [r0, r0] │ │ - b.n ad588 │ │ - beq.n adad8 │ │ - b.n adf10 │ │ + b.n ad598 │ │ + beq.n adae8 │ │ + b.n adf20 │ │ ldrh r4, [r0, #24] │ │ ldc 0, cr13, [sp], #16 │ │ - b.n adf9c │ │ + b.n adfac │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {sp} │ │ - b.n ad5aa │ │ + b.n ad5ba │ │ movs r2, r0 │ │ - b.n add3c │ │ + b.n add4c │ │ movs r0, r1 │ │ ldrh r0, [r0, #16] │ │ adds r0, #1 │ │ - b.n ae1d6 │ │ + b.n ae1e6 │ │ asrs r7, r0, #32 │ │ - b.n addda │ │ + b.n addea │ │ str r1, [r0, #16] │ │ - b.n ad9be │ │ + b.n ad9ce │ │ asrs r1, r0, #32 │ │ - b.n adfa4 │ │ + b.n adfb4 │ │ movs r2, r0 │ │ - b.n add48 │ │ + b.n add58 │ │ str r7, [r0, #16] │ │ - b.n ad9aa │ │ + b.n ad9ba │ │ str r6, [r0, #0] │ │ - b.n ade34 │ │ + b.n ade44 │ │ strb r7, [r0, #0] │ │ - b.n adbbe │ │ + b.n adbce │ │ @ instruction: 0xfff89aff │ │ asrs r1, r0, #32 │ │ - b.n adf48 │ │ + b.n adf58 │ │ asrs r0, r0, #32 │ │ - b.n ad5be │ │ + b.n ad5ce │ │ lsls r2, r0, #4 │ │ - b.n ae282 │ │ + b.n ae292 │ │ lsls r0, r2, #9 │ │ - b.n ad5d8 │ │ + b.n ad5e8 │ │ vpmin.u32 q7, , │ │ asrs r4, r6, #10 │ │ - b.n ad60c │ │ + b.n ad61c │ │ movs r1, #127 @ 0x7f │ │ - b.n ae0d2 │ │ + b.n ae0e2 │ │ ands r0, r0 │ │ - b.n ade16 │ │ + b.n ade26 │ │ asrs r1, r0, #32 │ │ - b.n adbf8 │ │ + b.n adc08 │ │ asrs r4, r6, #7 │ │ add.w r0, r0, r4 │ │ - b.n ade22 │ │ + b.n ade32 │ │ @ instruction: 0xff9deaff │ │ movs r5, r0 │ │ - b.n ade2a │ │ - ldr r1, [pc, #36] @ (adb10 ) │ │ + b.n ade3a │ │ + ldr r1, [pc, #36] @ (adb20 ) │ │ add.w r0, r0, r0 │ │ - b.n ae192 │ │ + b.n ae1a2 │ │ lsls r2, r1, #2 │ │ lsrs r0, r0, #8 │ │ lsls r0, r0, #9 │ │ - b.n ad624 │ │ + b.n ad634 │ │ mcr2 10, 2, lr, cr11, cr15, {7} @ │ │ asrs r0, r0, #9 │ │ - b.n ad640 │ │ + b.n ad650 │ │ movs r6, r2 │ │ - b.n ae246 │ │ + b.n ae256 │ │ movs r0, #202 @ 0xca │ │ - b.n ae24a │ │ + b.n ae25a │ │ asrs r1, r0, #32 │ │ - b.n adc2c │ │ + b.n adc3c │ │ movs r5, r2 │ │ and.w r0, r0, r6, lsr #32 │ │ - b.n ae256 │ │ + b.n ae266 │ │ movs r0, r0 │ │ and.w r0, r0, sp │ │ - b.n adfa6 │ │ + b.n adfb6 │ │ asrs r0, r5, #8 │ │ - b.n ad660 │ │ + b.n ad670 │ │ ands r0, r0 │ │ - b.n ade66 │ │ + b.n ade76 │ │ movs r0, #210 @ 0xd2 │ │ - b.n ae26a │ │ + b.n ae27a │ │ asrs r1, r0, #32 │ │ - b.n adc4c │ │ + b.n adc5c │ │ lsls r3, r5, #1 │ │ and.w r2, r0, r8, lsr #4 │ │ - b.n ad674 │ │ + b.n ad684 │ │ movs r5, r1 │ │ - b.n ae27a │ │ + b.n ae28a │ │ movs r0, #213 @ 0xd5 │ │ - b.n ae27e │ │ + b.n ae28e │ │ asrs r1, r0, #32 │ │ - b.n adc60 │ │ + b.n adc70 │ │ asrs r2, r3, #7 │ │ add.w r0, r0, sp │ │ - b.n ae28a │ │ - beq.n adbac │ │ - b.n adfe4 │ │ + b.n ae29a │ │ + beq.n adbbc │ │ + b.n adff4 │ │ ldrh r4, [r0, #24] │ │ ldc 0, cr13, [sp], #16 │ │ - b.n ae070 │ │ + b.n ae080 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r5, r6, r7, r8, ip} │ │ - b.n ad69c │ │ + b.n ad6ac │ │ movs r6, r2 │ │ - b.n ae2a2 │ │ + b.n ae2b2 │ │ movs r0, #206 @ 0xce │ │ - b.n ae2a6 │ │ + b.n ae2b6 │ │ asrs r1, r0, #32 │ │ - b.n adc88 │ │ + b.n adc98 │ │ asrs r0, r2, #7 │ │ add.w r0, r0, r6, lsr #32 │ │ - b.n ae2b2 │ │ - beq.n adbd4 │ │ - b.n ae00c │ │ + b.n ae2c2 │ │ + beq.n adbe4 │ │ + b.n ae01c │ │ ldrh r4, [r0, #24] │ │ ldc 0, cr13, [sp], #16 │ │ - b.n ae098 │ │ + b.n ae0a8 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0} │ │ - b.n ae2c6 │ │ + b.n ae2d6 │ │ movs r0, r0 │ │ and.w r0, r0, r4 │ │ - b.n adece │ │ + b.n adede │ │ asrs r0, r0, #7 │ │ - b.n ad6d0 │ │ + b.n ad6e0 │ │ ands r0, r0 │ │ - b.n aded6 │ │ + b.n adee6 │ │ movs r0, #222 @ 0xde │ │ - b.n ae2da │ │ + b.n ae2ea │ │ asrs r1, r0, #32 │ │ - b.n adcbc │ │ + b.n adccc │ │ lsls r7, r1, #1 │ │ and.w r8, r0, r2 │ │ - b.n ae1d6 │ │ + b.n ae1e6 │ │ lsls r1, r1, #1 │ │ subs r0, r0, r0 │ │ lsls r4, r5, #6 │ │ - b.n ad6ec │ │ + b.n ad6fc │ │ movs r0, r0 │ │ - b.n adcd0 │ │ + b.n adce0 │ │ lsls r2, r3, #1 │ │ - b.n ad756 │ │ + b.n ad766 │ │ movs r0, r0 │ │ - b.n ae25a │ │ + b.n ae26a │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r3, #6 │ │ - b.n ad700 │ │ + b.n ad710 │ │ movs r0, #227 @ 0xe3 │ │ - b.n ae306 │ │ + b.n ae316 │ │ adds r1, #152 @ 0x98 │ │ - b.n ad708 │ │ + b.n ad718 │ │ lsls r0, r3, #6 │ │ - b.n ad70c │ │ + b.n ad71c │ │ asrs r1, r0, #32 │ │ - b.n adcf0 │ │ + b.n add00 │ │ adds r0, #3 │ │ - b.n adcf4 │ │ + b.n add04 │ │ movs r0, r0 │ │ - b.n adcf8 │ │ + b.n add08 │ │ movs r0, r0 │ │ - b.n ad6f8 │ │ + b.n ad708 │ │ movs r1, r0 │ │ - b.n ae322 │ │ - push {r4, r7, lr} │ │ + b.n ae332 │ │ + push {r0, r1, r2, r3, r7, lr} │ │ @ instruction: 0xebff1180 │ │ - b.n ad728 │ │ + b.n ad738 │ │ ands r2, r0 │ │ - b.n ae076 │ │ + b.n ae086 │ │ asrs r1, r0, #32 │ │ - b.n add10 │ │ + b.n add20 │ │ movs r0, r7 │ │ and.w r1, r0, r4, ror #5 │ │ - b.n ad738 │ │ + b.n ad748 │ │ movs r4, r0 │ │ - b.n adf3e │ │ + b.n adf4e │ │ movs r0, #233 @ 0xe9 │ │ - b.n ae342 │ │ + b.n ae352 │ │ asrs r1, r0, #32 │ │ - b.n add24 │ │ + b.n add34 │ │ movs r5, r6 │ │ and.w r1, r0, r0, ror #5 │ │ - b.n ad74c │ │ + b.n ad75c │ │ movs r4, r1 │ │ - b.n ae352 │ │ + b.n ae362 │ │ cmp r7, #87 @ 0x57 │ │ - b.n ae356 │ │ + b.n ae366 │ │ asrs r1, r0, #32 │ │ - b.n add38 │ │ + b.n add48 │ │ movs r4, r0 │ │ and.w r1, r0, r8, lsr #5 │ │ - b.n ad760 │ │ + b.n ad770 │ │ movs r4, r1 │ │ - b.n ae366 │ │ + b.n ae376 │ │ strb r0, [r4, #2] │ │ - b.n ad734 │ │ + b.n ad744 │ │ movs r1, #118 @ 0x76 │ │ - b.n ae22e │ │ + b.n ae23e │ │ asrs r1, r0, #32 │ │ - b.n add50 │ │ + b.n add60 │ │ asrs r6, r3, #6 │ │ add.w r0, r0, ip │ │ - b.n ae37a │ │ + b.n ae38a │ │ movs r3, r1 │ │ and.w r0, r0, r0 │ │ - b.n ad75c │ │ + b.n ad76c │ │ movs r1, r1 │ │ - b.n adf86 │ │ + b.n adf96 │ │ asrs r0, r0, #32 │ │ - b.n ae38a │ │ + b.n ae39a │ │ str r1, [r0, #48] @ 0x30 │ │ add.w r0, r0, r0 │ │ - b.n ae2f2 │ │ + b.n ae302 │ │ movs r1, r7 │ │ lsrs r0, r0, #8 │ │ asrs r0, r6, #4 │ │ - b.n ad798 │ │ + b.n ad7a8 │ │ movs r1, #86 @ 0x56 │ │ - b.n ae25e │ │ + b.n ae26e │ │ ands r0, r0 │ │ - b.n adfa2 │ │ + b.n adfb2 │ │ asrs r1, r0, #32 │ │ - b.n add84 │ │ + b.n add94 │ │ asrs r1, r2, #6 │ │ add.w r0, r0, r4 │ │ - b.n adfae │ │ + b.n adfbe │ │ str r4, [r2, r0] │ │ - b.n ad7a4 │ │ + b.n ad7b4 │ │ ands r0, r0 │ │ - b.n adfb6 │ │ + b.n adfc6 │ │ movs r5, r0 │ │ - b.n adfba │ │ + b.n adfca │ │ asrs r5, r0, #32 │ │ - b.n ae3be │ │ - bfcsel a, ad47e , e, hi │ │ + b.n ae3ce │ │ + bfcsel a, ad48e , e, hi │ │ asrs r0, r0, #32 │ │ - b.n adfc6 │ │ + b.n adfd6 │ │ movs r4, r0 │ │ - b.n adfca │ │ + b.n adfda │ │ movs r0, r0 │ │ - b.n ae330 │ │ + b.n ae340 │ │ movs r1, r0 │ │ asrs r0, r4, #6 │ │ - beq.n adcf4 │ │ - b.n ae12c │ │ + beq.n add04 │ │ + b.n ae13c │ │ ldrh r4, [r0, #24] │ │ ldc 0, cr13, [sp], #16 │ │ - b.n ae1b8 │ │ + b.n ae1c8 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r7, ip} │ │ - b.n ad7da │ │ + b.n ad7ea │ │ movs r1, r0 │ │ - b.n adf54 │ │ + b.n adf64 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ ands r0, r0 │ │ - b.n adff2 │ │ + b.n ae002 │ │ movs r5, r0 │ │ - b.n adff6 │ │ + b.n ae006 │ │ add r2, sp, #772 @ 0x304 │ │ add.w r0, r0, r4 │ │ - b.n adffe │ │ + b.n ae00e │ │ asrs r4, r0, #3 │ │ - b.n ad800 │ │ + b.n ad810 │ │ ands r0, r0 │ │ - b.n ae006 │ │ + b.n ae016 │ │ movs r1, #1 │ │ - b.n ae2ca │ │ + b.n ae2da │ │ asrs r1, r0, #32 │ │ - b.n addec │ │ + b.n addfc │ │ movs r3, r0 │ │ and.w r0, r0, r0, lsl #6 │ │ - b.n ad814 │ │ + b.n ad824 │ │ asrs r1, r0, #32 │ │ - b.n addf8 │ │ + b.n ade08 │ │ movs r4, r0 │ │ - b.n ae01e │ │ + b.n ae02e │ │ movs r0, #230 @ 0xe6 │ │ - b.n ae422 │ │ + b.n ae432 │ │ asrs r2, r6, #5 │ │ add.w r0, r0, r4 │ │ - b.n ae02a │ │ - beq.n add4c │ │ - b.n ae184 │ │ + b.n ae03a │ │ + beq.n add5c │ │ + b.n ae194 │ │ ldrh r4, [r0, #24] │ │ ldc 0, cr13, [sp], #16 │ │ - b.n ae210 │ │ + b.n ae220 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r4, r7, ip} │ │ - b.n ad83c │ │ + b.n ad84c │ │ movs r4, r1 │ │ - b.n ae442 │ │ + b.n ae452 │ │ movs r0, #251 @ 0xfb │ │ - b.n ae446 │ │ + b.n ae456 │ │ asrs r1, r0, #32 │ │ - b.n ade28 │ │ + b.n ade38 │ │ asrs r0, r5, #5 │ │ add.w r0, r0, ip │ │ - b.n ae452 │ │ - beq.n add74 │ │ - b.n ae1ac │ │ + b.n ae462 │ │ + beq.n add84 │ │ + b.n ae1bc │ │ ldrh r4, [r0, #24] │ │ ldc 0, cr13, [sp], #16 │ │ - b.n ae238 │ │ + b.n ae248 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r5, r6, ip} │ │ - b.n ad864 │ │ + b.n ad874 │ │ movs r4, r1 │ │ - b.n ae46a │ │ + b.n ae47a │ │ movs r1, #113 @ 0x71 │ │ - b.n ae32e │ │ + b.n ae33e │ │ asrs r1, r0, #32 │ │ - b.n ade50 │ │ + b.n ade60 │ │ @ instruction: 0xffbeeaff │ │ movs r1, r0 │ │ - b.n ae47a │ │ + b.n ae48a │ │ vpmin.u q15, , │ │ - add r0, pc, #256 @ (adr r0, ade40 ) │ │ - b.n ad874 │ │ + add r0, pc, #256 @ (adr r0, ade50 ) │ │ + b.n ad884 │ │ ldc2l 10, cr14, [ip, #-1020] @ 0xfffffc04 @ │ │ - movs r0, #159 @ 0x9f │ │ - vmla.i q9, q3, d3[0] │ │ - vshr.u32 q9, , #10 │ │ - vmla.i q9, q3, d27[0] │ │ - vaddl.u q9, d6, d15 │ │ - @ instruction: 0xfff61ed3 │ │ - @ instruction: 0xfff60c9c │ │ + movs r0, #223 @ 0xdf │ │ + vtrn.16 d18, d3 │ │ + vshr.u64 d18, d31, #10 │ │ + vtrn.16 d18, d27 │ │ + vmla.i q9, q3, d15[0] │ │ + vcvt.u32.f32 d17, d3, #10 │ │ + vmull.u q8, d22, d28 │ │ movs r3, r0 │ │ - subs r3, r3, #7 │ │ - vcvt.f16.f32 d17, q6 │ │ - vsli.64 , q9, #54 @ 0x36 │ │ - @ instruction: 0xfff51fbb │ │ - @ instruction: 0xfff61fa7 │ │ - vtbx.8 d19, {d6}, d18 │ │ - vqshl.u32 , , #23 │ │ - vrshr.u64 d16, d22, #9 │ │ - vqmovn.u32 d16, q7 │ │ - vrintn.f16 d16, d14 │ │ - @ instruction: 0xfff61edf │ │ - vqmovn.s32 d16, q1 │ │ - vsra.u64 d16, d22, #10 │ │ - @ instruction: 0xfff61ea3 │ │ + movs r0, #27 │ │ + vqshl.u32 d17, d18, #22 │ │ + vsli.32 d29, d17, #22 │ │ + @ instruction: 0xfff51ffb │ │ + vqrdmlsh.s , q11, d23[0] │ │ + vqrshrun.s64 d19, q1, #10 │ │ + vcvt.s16.f16 , │ │ + vrsra.u64 d16, d10, #9 │ │ + vrsra.u64 d16, d18, #10 │ │ + vsri.64 q8, q9, #10 │ │ + vcvt.u32.f32 d17, d15, #10 │ │ + @ instruction: 0xfff60366 │ │ + vrshr.u64 d16, d10, #10 │ │ + vqrdmlah.s , q11, d19[0] │ │ vsri.64 , q2, #10 │ │ - bmi.n add46 │ │ - bmi.n add48 │ │ - bmi.n add4a │ │ - ldr r7, [pc, #960] @ (ae164 ) │ │ + bmi.n add56 │ │ + bmi.n add58 │ │ + bmi.n add5a │ │ + ldr r7, [pc, #960] @ (ae174 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n ae2c4 │ │ - beq.n addb4 │ │ - b.n ae248 │ │ + b.n ae2d4 │ │ + beq.n addc4 │ │ + b.n ae258 │ │ ldrh r4, [r0, #24] │ │ stc 0, cr13, [sp, #-544]! @ 0xfffffde0 │ │ - b.n ae250 │ │ + b.n ae260 │ │ ands r0, r0 │ │ - b.n ae4fa │ │ + b.n ae50a │ │ stmia r0!, {} │ │ - b.n ae0fe │ │ + b.n ae10e │ │ lsls r0, r1, #1 │ │ - b.n ae2dc │ │ + b.n ae2ec │ │ eors r4, r7 │ │ - b.n ad8e0 │ │ + b.n ad8f0 │ │ movs r0, r1 │ │ - b.n ae2ca │ │ + b.n ae2da │ │ eors r0, r7 │ │ - b.n ad8e8 │ │ + b.n ad8f8 │ │ eors r4, r1 │ │ - b.n ad8ec │ │ - add r0, pc, #4 @ (adr r0, addd8 ) │ │ - b.n ae116 │ │ + b.n ad8fc │ │ + add r0, pc, #4 @ (adr r0, adde8 ) │ │ + b.n ae126 │ │ eors r0, r1 │ │ - b.n ad8f4 │ │ + b.n ad904 │ │ movs r0, r0 │ │ - b.n ae480 │ │ + b.n ae490 │ │ movs r4, r5 │ │ - b.n ad8fc │ │ + b.n ad90c │ │ ldr r0, [r6, #120] @ 0x78 │ │ - b.n ad924 │ │ + b.n ad934 │ │ stmia r0!, {r2, r6} │ │ - b.n ad904 │ │ + b.n ad914 │ │ str r6, [r0, #0] │ │ - b.n adf0c │ │ + b.n adf1c │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ movs r4, r5 │ │ - b.n ad922 │ │ + b.n ad932 │ │ asrs r0, r7, #32 │ │ - b.n ae290 │ │ + b.n ae2a0 │ │ add r3, sp, #80 @ 0x50 │ │ add.w r0, r0, r0 │ │ - b.n ae4a2 │ │ + b.n ae4b2 │ │ lsls r4, r5, #26 │ │ subs r0, r0, r0 │ │ movs r0, r7 │ │ - b.n ad840 │ │ + b.n ad850 │ │ ldrb r0, [r0, #8] │ │ - b.n ae426 │ │ + b.n ae436 │ │ ldrb r2, [r3, #14] │ │ - b.n ae498 │ │ + b.n ae4a8 │ │ asrs r4, r6, #32 │ │ - b.n ad84c │ │ + b.n ad85c │ │ movs r7, #144 @ 0x90 │ │ - b.n adf20 │ │ + b.n adf30 │ │ lsrs r0, r0, #31 │ │ - b.n ae15e │ │ + b.n ae16e │ │ adds r7, #144 @ 0x90 │ │ - b.n ade62 │ │ + b.n ade72 │ │ ands r1, r0 │ │ - b.n adf4a │ │ + b.n adf5a │ │ ldrsh r1, [r0, r7] │ │ - b.n adf6a │ │ + b.n adf7a │ │ movs r2, r1 │ │ - b.n ae16e │ │ + b.n ae17e │ │ asrs r0, r3, #2 │ │ - b.n ae572 │ │ + b.n ae582 │ │ eors r0, r1 │ │ - b.n ad950 │ │ + b.n ad960 │ │ str r4, [r1, r1] │ │ - b.n ad954 │ │ - ldr r4, [sp, #844] @ 0x34c │ │ + b.n ad964 │ │ + ldr r4, [sp, #972] @ 0x3cc │ │ @ instruction: 0xfb00c044 │ │ - b.n ad97c │ │ + b.n ad98c │ │ movs r0, r0 │ │ and.w r0, r0, r0, lsl #20 │ │ - b.n ae58a │ │ + b.n ae59a │ │ asrs r4, r5, #32 │ │ - b.n ad988 │ │ + b.n ad998 │ │ movs r0, r0 │ │ - b.n ae50a │ │ + b.n ae51a │ │ movs r1, r0 │ │ - b.n ae196 │ │ + b.n ae1a6 │ │ str r4, [r3, r0] │ │ - b.n ad95c │ │ + b.n ad96c │ │ ands r0, r1 │ │ - b.n ad99e │ │ + b.n ad9ae │ │ movs r0, r3 │ │ - b.n ad97c │ │ + b.n ad98c │ │ movs r1, r0 │ │ - b.n ae1a6 │ │ + b.n ae1b6 │ │ ands r0, r2 │ │ - b.n ad9aa │ │ + b.n ad9ba │ │ movs r4, r3 │ │ - b.n ad988 │ │ + b.n ad998 │ │ movs r1, r0 │ │ - b.n ae1b2 │ │ + b.n ae1c2 │ │ ands r0, r3 │ │ - b.n ad9b6 │ │ + b.n ad9c6 │ │ movs r0, r4 │ │ - b.n ad994 │ │ + b.n ad9a4 │ │ movs r1, r0 │ │ - b.n ae1be │ │ + b.n ae1ce │ │ ands r0, r4 │ │ - b.n ad9c2 │ │ + b.n ad9d2 │ │ str r4, [r4, r0] │ │ - b.n ad988 │ │ + b.n ad998 │ │ str r4, [r2, r0] │ │ - b.n ad98c │ │ + b.n ad99c │ │ str r4, [r1, r0] │ │ - b.n ad990 │ │ + b.n ad9a0 │ │ lsrs r0, r6 │ │ - b.n ae214 │ │ + b.n ae224 │ │ movs r4, r4 │ │ - b.n ad9b0 │ │ + b.n ad9c0 │ │ lsls r5, r4, #25 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n ad9d6 │ │ + b.n ad9e6 │ │ subs r1, r6, r0 │ │ - b.n ae4a8 │ │ + b.n ae4b8 │ │ asrs r5, r2, #15 │ │ - b.n ae528 │ │ + b.n ae538 │ │ movs r1, r0 │ │ - b.n ae14a │ │ + b.n ae15a │ │ lsls r2, r4, #25 │ │ subs r0, r0, r0 │ │ eors r0, r0 │ │ - b.n ad9ea │ │ + b.n ad9fa │ │ movs r0, r2 │ │ - b.n ad9de │ │ + b.n ad9ee │ │ movs r0, r0 │ │ - b.n ae55a │ │ + b.n ae56a │ │ lsls r1, r4, #25 │ │ lsrs r0, r0, #8 │ │ str r4, [r0, r0] │ │ - b.n ad9fa │ │ + b.n ada0a │ │ movs r1, r0 │ │ - b.n ae4f0 │ │ + b.n ae500 │ │ lsls r5, r4, #25 │ │ subs r0, r0, r0 │ │ lsrs r2, r0, #32 │ │ - b.n ae4f8 │ │ + b.n ae508 │ │ lsls r3, r1, #2 │ │ subs r0, r0, r0 │ │ movs r2, r0 │ │ - b.n ae500 │ │ + b.n ae510 │ │ lsls r1, r1, #26 │ │ subs r0, r0, r0 │ │ movs r4, r2 │ │ - b.n ada16 │ │ + b.n ada26 │ │ movs r0, r0 │ │ - b.n ae582 │ │ + b.n ae592 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n ae62a │ │ + b.n ae63a │ │ @ instruction: 0xffacebff │ │ stmia r0!, {r2, r6} │ │ - b.n ada2c │ │ + b.n ada3c │ │ movs r0, r0 │ │ - b.n ae596 │ │ + b.n ae5a6 │ │ lsls r3, r4, #26 │ │ subs r0, r0, r0 │ │ lsls r4, r0, #4 │ │ - b.n ada26 │ │ + b.n ada36 │ │ movs r4, r1 │ │ - b.n ae1a2 │ │ + b.n ae1b2 │ │ lsls r0, r0, #26 │ │ subs r0, r0, r0 │ │ str r0, [r2, r0] │ │ - b.n ada42 │ │ + b.n ada52 │ │ movs r0, r0 │ │ - b.n ae5b8 │ │ + b.n ae5c8 │ │ lsls r6, r3, #2 │ │ lsrs r0, r0, #8 │ │ movs r4, r2 │ │ - b.n ada40 │ │ + b.n ada50 │ │ movs r4, r1 │ │ - b.n ae1ba │ │ + b.n ae1ca │ │ lsls r0, r0, #1 │ │ lsls r5, r2, #22 │ │ movs r4, r0 │ │ lsls r0, r2, #5 │ │ lsls r6, r4, #25 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #9 │ │ - b.n ada62 │ │ + b.n ada72 │ │ strh r0, [r0, #2] │ │ - b.n ada66 │ │ + b.n ada76 │ │ movs r4, r0 │ │ - b.n ada52 │ │ + b.n ada62 │ │ movs r0, r0 │ │ - b.n ae5d6 │ │ + b.n ae5e6 │ │ movs r4, r0 │ │ lsls r4, r3, #23 │ │ movs r4, r0 │ │ lsls r0, r2, #12 │ │ lsls r6, r5, #14 │ │ lsrs r0, r0, #8 │ │ lsls r4, r0, #9 │ │ - b.n ada7e │ │ + b.n ada8e │ │ negs r4, r0 │ │ - b.n ada74 │ │ + b.n ada84 │ │ asrs r0, r0, #32 │ │ - b.n ada6e │ │ + b.n ada7e │ │ movs r4, r0 │ │ - b.n ae1f4 │ │ + b.n ae204 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r1 │ │ - b.n ae29a │ │ + b.n ae2aa │ │ asrs r4, r0, #32 │ │ - b.n adfe0 │ │ + b.n adff0 │ │ movs r0, #160 @ 0xa0 │ │ - b.n adac2 │ │ + b.n adad2 │ │ movs r0, #212 @ 0xd4 │ │ - b.n ae1ea │ │ + b.n ae1fa │ │ asrs r1, r0, #32 │ │ - b.n ae070 │ │ + b.n ae080 │ │ movs r1, r0 │ │ - b.n ae212 │ │ + b.n ae222 │ │ lsls r7, r4, #26 │ │ subs r2, #0 │ │ movs r2, #84 @ 0x54 │ │ - b.n adaae │ │ + b.n adabe │ │ ands r4, r2 │ │ - b.n ada94 │ │ + b.n adaa4 │ │ movs r0, r0 │ │ - b.n ae622 │ │ + b.n ae632 │ │ movs r4, r3 │ │ lsrs r0, r0, #8 │ │ movs r5, r0 │ │ - b.n ae2c6 │ │ + b.n ae2d6 │ │ asrs r4, r2, #9 │ │ - b.n adaea │ │ + b.n adafa │ │ movs r0, r0 │ │ - b.n ae630 │ │ + b.n ae640 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ ands r4, r0 │ │ - b.n ad9b8 │ │ + b.n ad9c8 │ │ adds r0, #0 │ │ - b.n adabc │ │ + b.n adacc │ │ asrs r0, r0, #32 │ │ - b.n adac2 │ │ + b.n adad2 │ │ asrs r1, r0, #32 │ │ - b.n ae0a8 │ │ + b.n ae0b8 │ │ movs r1, r0 │ │ - b.n ae24e │ │ + b.n ae25e │ │ lsls r1, r4, #26 │ │ subs r2, #0 │ │ strb r0, [r2, #9] │ │ - b.n adae6 │ │ + b.n adaf6 │ │ lsls r6, r0, #4 │ │ - b.n ae6a0 │ │ + b.n ae6b0 │ │ movs r7, r1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n adade │ │ + b.n adaee │ │ movs r1, r0 │ │ - b.n ae26c │ │ + b.n ae27c │ │ movs r0, r1 │ │ ldrh r0, [r0, #16] │ │ adds r0, #1 │ │ - b.n ae706 │ │ + b.n ae716 │ │ movs r7, r0 │ │ - b.n ae30a │ │ + b.n ae31a │ │ str r0, [r0, #16] │ │ - b.n adef2 │ │ + b.n adf02 │ │ movs r1, r0 │ │ - b.n ae4d2 │ │ + b.n ae4e2 │ │ movs r1, r0 │ │ - b.n ae276 │ │ + b.n ae286 │ │ str r7, [r0, #16] │ │ - b.n adede │ │ + b.n adeee │ │ str r6, [r0, #0] │ │ - b.n ae364 │ │ + b.n ae374 │ │ strb r7, [r0, #0] │ │ - b.n ae0ee │ │ + b.n ae0fe │ │ @ instruction: 0xfff89aff │ │ movs r1, r0 │ │ - b.n ae478 │ │ + b.n ae488 │ │ movs r0, r0 │ │ - b.n adaf2 │ │ + b.n adb02 │ │ lsls r2, r0, #4 │ │ - b.n ae7b2 │ │ + b.n ae7c2 │ │ lsls r0, r2, #9 │ │ - b.n adb0e │ │ + b.n adb1e │ │ lsls r0, r0, #9 │ │ - b.n adb24 │ │ + b.n adb34 │ │ asrs r0, r0, #9 │ │ - b.n adb36 │ │ + b.n adb46 │ │ movs r0, #4 │ │ - b.n adb22 │ │ + b.n adb32 │ │ asrs r4, r0, #32 │ │ - b.n adb28 │ │ + b.n adb38 │ │ adds r0, #12 │ │ - b.n adb2a │ │ + b.n adb3a │ │ asrs r1, r0, #32 │ │ - b.n ae112 │ │ + b.n ae122 │ │ movs r3, r0 │ │ - b.n ae2b4 │ │ + b.n ae2c4 │ │ movs r3, r2 │ │ ldr r2, [sp, #0] │ │ lsrs r7, r7, #1 │ │ - b.n ae6bc │ │ + b.n ae6cc │ │ movs r0, #239 @ 0xef │ │ - b.n ae622 │ │ + b.n ae632 │ │ adds r7, r7, r1 │ │ movs r3, #160 @ 0xa0 │ │ asrs r1, r0, #2 │ │ - b.n ae128 │ │ + b.n ae138 │ │ asrs r1, r0, #6 │ │ - b.n ae12e │ │ + b.n ae13e │ │ movs r0, #0 │ │ - b.n ae64a │ │ + b.n ae65a │ │ cmp r7, #255 @ 0xff │ │ - b.n ae6b4 │ │ + b.n ae6c4 │ │ ands r2, r0 │ │ - b.n ae038 │ │ + b.n ae048 │ │ asrs r0, r1, #32 │ │ - b.n ae4c2 │ │ + b.n ae4d2 │ │ add r2, sp, #48 @ 0x30 │ │ add.w r0, r0, r0 │ │ - b.n ae6e2 │ │ + b.n ae6f2 │ │ lsls r0, r7, #25 │ │ lsrs r0, r0, #8 │ │ cmp r2, #171 @ 0xab │ │ - b.n ae65e │ │ + b.n ae66e │ │ asrs r0, r6, #3 │ │ - b.n ae4d6 │ │ + b.n ae4e6 │ │ cmp r2, #170 @ 0xaa │ │ - b.n ae6e6 │ │ + b.n ae6f6 │ │ stmia r0!, {r2, r6} │ │ - b.n adb90 │ │ + b.n adba0 │ │ asrs r1, r2, #10 │ │ - b.n ae15e │ │ + b.n ae16e │ │ asrs r2, r4, #8 │ │ - b.n ae39e │ │ + b.n ae3ae │ │ asrs r4, r1, #32 │ │ - b.n adb62 │ │ + b.n adb72 │ │ lsls r0, r0, #9 │ │ - b.n adb70 │ │ + b.n adb80 │ │ lsls r4, r0, #9 │ │ - b.n adba2 │ │ + b.n adbb2 │ │ ands r0, r0 │ │ - b.n ae7ae │ │ + b.n ae7be │ │ lsls r4, r0, #9 │ │ - b.n adb7c │ │ + b.n adb8c │ │ asrs r5, r0, #32 │ │ - b.n ae3b6 │ │ + b.n ae3c6 │ │ negs r4, r0 │ │ - b.n adb92 │ │ + b.n adba2 │ │ str r0, [r5, #8] │ │ - b.n ae596 │ │ + b.n ae5a6 │ │ lsls r0, r4, #2 │ │ - b.n adbe4 │ │ + b.n adbf4 │ │ strh r4, [r1, #0] │ │ - b.n adba0 │ │ + b.n adbb0 │ │ strh r0, [r5, #4] │ │ - b.n ae594 │ │ + b.n ae5a4 │ │ movs r0, r0 │ │ - b.n ae72e │ │ + b.n ae73e │ │ asrs r0, r5, #32 │ │ - b.n adbac │ │ + b.n adbbc │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n ae51a │ │ + b.n ae52a │ │ add r1, sp, #800 @ 0x320 │ │ @ instruction: 0xeb00c044 │ │ - b.n adbdc │ │ + b.n adbec │ │ asrs r0, r4, #2 │ │ - b.n adbde │ │ + b.n adbee │ │ lsls r4, r0, #4 │ │ - b.n adbd6 │ │ + b.n adbe6 │ │ asrs r0, r4, #2 │ │ - b.n adbb8 │ │ + b.n adbc8 │ │ lsls r0, r4 │ │ - b.n adbca │ │ + b.n adbda │ │ lsrs r0, r1 │ │ - b.n ae5c0 │ │ + b.n ae5d0 │ │ asrs r0, r0, #4 │ │ - b.n adbe6 │ │ + b.n adbf6 │ │ lsls r4, r0, #4 │ │ - b.n adbce │ │ + b.n adbde │ │ asrs r0, r0, #4 │ │ - b.n adbd2 │ │ + b.n adbe2 │ │ lsls r0, r0, #3 │ │ - b.n adbf0 │ │ + b.n adc00 │ │ lsrs r7, r1, #11 │ │ orn r0, r6, #8650752 @ 0x840000 │ │ - b.n ae36e │ │ + b.n ae37e │ │ asrs r0, r7, #2 │ │ - b.n adc0a │ │ + b.n adc1a │ │ asrs r0, r7, #2 │ │ - b.n adbe0 │ │ + b.n adbf0 │ │ lsrs r7, r1, #11 │ │ orr.w r0, r8, #8454144 @ 0x810000 │ │ lsrs r0, r0, #8 │ │ add r1, sp, #732 @ 0x2dc │ │ @ instruction: 0xeb00c044 │ │ - b.n adc20 │ │ + b.n adc30 │ │ asrs r0, r0, #3 │ │ - b.n adc22 │ │ + b.n adc32 │ │ strb r0, [r1, #3] │ │ - b.n ae606 │ │ + b.n ae616 │ │ movs r7, r0 │ │ - b.n ae394 │ │ + b.n ae3a4 │ │ movs r4, r6 │ │ lsrs r0, r0, #8 │ │ lsls r4, r7, #2 │ │ - b.n adc32 │ │ + b.n adc42 │ │ lsrs r4, r7, #15 │ │ - b.n ae488 │ │ + b.n ae498 │ │ movs r1, r7 │ │ and.w r0, r0, r0, lsr #32 │ │ - b.n ae730 │ │ + b.n ae740 │ │ movs r0, r2 │ │ lsls r4, r3, #22 │ │ movs r0, r0 │ │ lsls r0, r2, #13 │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ asrs r2, r3, #1 │ │ - b.n adcc2 │ │ + b.n adcd2 │ │ lsls r5, r0, #31 │ │ - b.n ae72a │ │ + b.n ae73a │ │ lsrs r7, r7, #31 │ │ - b.n ae7bc │ │ + b.n ae7cc │ │ movs r0, r0 │ │ - b.n ae7c4 │ │ + b.n ae7d4 │ │ lsls r1, r6, #20 │ │ lsrs r0, r0, #8 │ │ subs r4, r1, #3 │ │ - b.n adc68 │ │ + b.n adc78 │ │ ands r0, r0 │ │ - b.n ae46e │ │ + b.n ae47e │ │ subs r6, #200 @ 0xc8 │ │ - b.n adc70 │ │ + b.n adc80 │ │ movs r1, r0 │ │ - b.n ae876 │ │ + b.n ae886 │ │ cmp r6, #196 @ 0xc4 │ │ - b.n adc78 │ │ + b.n adc88 │ │ asrs r1, r0, #32 │ │ - b.n ae25c │ │ + b.n ae26c │ │ adds r0, #3 │ │ - b.n ae260 │ │ + b.n ae270 │ │ movs r0, #2 │ │ - b.n ae264 │ │ + b.n ae274 │ │ asrs r4, r0, #32 │ │ stmia.w sp, {r0, r1, r3, r4, r6, r8, r9, sl, fp, sp} │ │ - b.n ae88e │ │ - push {r0, r2, r4, r5} │ │ + b.n ae89e │ │ + push {r2, r4, r5} │ │ @ instruction: 0xebff0004 │ │ - b.n ae496 │ │ - beq.n ae1b8 │ │ - b.n ae5f0 │ │ + b.n ae4a6 │ │ + beq.n ae1c8 │ │ + b.n ae600 │ │ ldrh r4, [r0, #24] │ │ ldc 0, cr13, [sp], #16 │ │ - b.n ae67c │ │ + b.n ae68c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r8} │ │ - b.n adc92 │ │ + b.n adca2 │ │ movs r4, r1 │ │ - b.n ae40e │ │ + b.n ae41e │ │ lsls r4, r0, #2 │ │ asrs r4, r2, #22 │ │ movs r4, r1 │ │ asrs r0, r2, #5 │ │ @ instruction: 0xffe50aff │ │ movs r4, r1 │ │ - b.n ae4be │ │ + b.n ae4ce │ │ asrs r1, r6, #1 │ │ - b.n ae8c2 │ │ + b.n ae8d2 │ │ bfx 4, r2 │ │ strb r5, [r2, #3] │ │ - b.n ae0ca │ │ + b.n ae0da │ │ lsls r4, r4, #16 │ │ and.w r0, r0, r8, lsl #1 │ │ - b.n ae6ac │ │ + b.n ae6bc │ │ movs r0, r0 │ │ - b.n ae84a │ │ + b.n ae85a │ │ asrs r2, r1, #32 │ │ - b.n ae4da │ │ + b.n ae4ea │ │ asrs r0, r0, #32 │ │ asrs r0, r4, #6 │ │ movs r4, r1 │ │ - b.n ae4e2 │ │ + b.n ae4f2 │ │ lsls r6, r7, #24 │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n ae4ea │ │ + b.n ae4fa │ │ asrs r0, r2, #32 │ │ - b.n ae8ee │ │ + b.n ae8fe │ │ movs r0, r0 │ │ - b.n ae852 │ │ + b.n ae862 │ │ lsls r6, r1, #24 │ │ subs r0, r0, r0 │ │ lsls r4, r0, #1 │ │ - b.n adcf4 │ │ - bf 4, a29ba │ │ + b.n add04 │ │ + bf 4, a29ca │ │ movs r0, r0 │ │ - b.n ae862 │ │ + b.n ae872 │ │ strb r0, [r0, #0] │ │ asrs r0, r4, #6 │ │ lsls r5, r2, #16 │ │ and.w r0, r0, r0, lsl #19 │ │ - b.n adcd8 │ │ + b.n adce8 │ │ movs r4, r1 │ │ - b.n ae912 │ │ + b.n ae922 │ │ asrs r0, r0, #3 │ │ - b.n add0e │ │ + b.n add1e │ │ movs r0, #96 @ 0x60 │ │ - b.n ae91a │ │ + b.n ae92a │ │ lsls r4, r7, #2 │ │ - b.n adce8 │ │ + b.n adcf8 │ │ movs r4, r0 │ │ - b.n ae522 │ │ - ldr r2, [sp, #616] @ 0x268 │ │ - @ instruction: 0xfa00c044 │ │ - b.n add24 │ │ + b.n ae532 │ │ + ldr r3, [sp, #680] @ 0x2a8 │ │ + @ instruction: 0xfb00c044 │ │ + b.n add34 │ │ lsrs r7, r6, #24 │ │ - b.n ae70c │ │ + b.n ae71c │ │ adds r0, #184 @ 0xb8 │ │ - b.n ae70a │ │ + b.n ae71a │ │ lsrs r7, r5, #11 │ │ orn r0, r0, #8388608 @ 0x800000 │ │ - b.n ae93a │ │ + b.n ae94a │ │ movs r0, #12 │ │ - b.n ae93e │ │ - ldr r7, [pc, #328] @ (ae348 ) │ │ - b.n ae70c │ │ + b.n ae94e │ │ + ldr r7, [pc, #328] @ (ae358 ) │ │ + b.n ae71c │ │ lsls r5, r0, #2 │ │ stmia.w r3, {r7} │ │ - b.n ae94a │ │ + b.n ae95a │ │ asrs r0, r7, #4 │ │ - b.n add46 │ │ + b.n add56 │ │ asrs r0, r7, #4 │ │ - b.n add1c │ │ + b.n add2c │ │ asrs r0, r0, #2 │ │ - b.n ae726 │ │ + b.n ae736 │ │ lsrs r0, r0, #11 │ │ orr.w r1, r6, #12582912 @ 0xc00000 │ │ - b.n add48 │ │ + b.n add58 │ │ lsrs r7, r1, #11 │ │ orn r0, r6, #8650752 @ 0x840000 │ │ - b.n ae4c6 │ │ + b.n ae4d6 │ │ lsrs r7, r1, #11 │ │ orr.w r0, r1, #8454144 @ 0x810000 │ │ lsrs r0, r0, #8 │ │ add r1, sp, #396 @ 0x18c │ │ @ instruction: 0xeb00c044 │ │ - b.n add70 │ │ + b.n add80 │ │ lsls r0, r0, #5 │ │ - b.n add72 │ │ + b.n add82 │ │ ldrh r2, [r2, #58] @ 0x3a │ │ - b.n ae756 │ │ + b.n ae766 │ │ ldrb r0, [r4, #30] │ │ - b.n add80 │ │ + b.n add90 │ │ movs r0, r1 │ │ - b.n ae4e6 │ │ + b.n ae4f6 │ │ strb r7, [r0, #0] │ │ - b.n ae368 │ │ + b.n ae378 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ asrs r4, r7, #4 │ │ - b.n add8a │ │ + b.n add9a │ │ asrs r4, r7, #4 │ │ - b.n add60 │ │ + b.n add70 │ │ lsls r0, r0, #5 │ │ - b.n add64 │ │ + b.n add74 │ │ movs r7, r0 │ │ and.w r1, r0, r0, lsl #17 │ │ - b.n add6c │ │ + b.n add7c │ │ movs r4, r1 │ │ - b.n ae9a6 │ │ + b.n ae9b6 │ │ asrs r0, r0, #5 │ │ - b.n adda2 │ │ + b.n addb2 │ │ movs r0, #96 @ 0x60 │ │ - b.n ae9ae │ │ + b.n ae9be │ │ lsls r4, r7, #4 │ │ - b.n add7c │ │ + b.n add8c │ │ movs r4, r0 │ │ - b.n ae5b6 │ │ - ldr r2, [sp, #468] @ 0x1d4 │ │ - @ instruction: 0xfa00c044 │ │ - b.n addb8 │ │ + b.n ae5c6 │ │ + ldr r3, [sp, #532] @ 0x214 │ │ + @ instruction: 0xfb00c044 │ │ + b.n addc8 │ │ lsrs r7, r6, #30 │ │ - b.n ae7a0 │ │ + b.n ae7b0 │ │ asrs r4, r1, #32 │ │ - b.n ae9c6 │ │ + b.n ae9d6 │ │ lsrs r7, r5, #11 │ │ orn r0, r0, #9961472 @ 0x980000 │ │ - b.n ae7a6 │ │ + b.n ae7b6 │ │ movs r0, #0 │ │ - b.n ae9d2 │ │ + b.n ae9e2 │ │ cmp r2, #205 @ 0xcd │ │ orn r1, r0, #3080192 @ 0x2f0000 │ │ - b.n addb2 │ │ + b.n addc2 │ │ asrs r0, r3, #32 │ │ - b.n ae7a8 │ │ + b.n ae7b8 │ │ movs r1, #56 @ 0x38 │ │ - b.n addba │ │ + b.n addca │ │ movs r0, #88 @ 0x58 │ │ - b.n ae7b0 │ │ + b.n ae7c0 │ │ strh r0, [r0, #10] │ │ - b.n addc2 │ │ + b.n addd2 │ │ lsrs r7, r1, #11 │ │ orr.w sl, r6, #419840 @ 0x66800 │ │ orr.w r0, r1, #8388608 @ 0x800000 │ │ - b.n addd6 │ │ + b.n adde6 │ │ movs r0, r0 │ │ - b.n addbc │ │ + b.n addcc │ │ lsls r0, r3, #1 │ │ - b.n ae7d6 │ │ + b.n ae7e6 │ │ lsrs r5, r1, #11 │ │ orn pc, r0, #3981312 @ 0x3cc000 │ │ - b.n aea06 │ │ + b.n aea16 │ │ cmp r2, #193 @ 0xc1 │ │ orn sl, r0, #6717440 @ 0x668000 │ │ orr.w sl, r2, #395264 @ 0x60800 │ │ orr.w r0, r2, #2162688 @ 0x210000 │ │ - b.n ade0e │ │ + b.n ade1e │ │ adds r0, #4 │ │ - b.n ade04 │ │ + b.n ade14 │ │ asrs r4, r0, #32 │ │ - b.n ae6e0 │ │ + b.n ae6f0 │ │ asrs r1, r0, #32 │ │ - b.n ae5e8 │ │ + b.n ae5f8 │ │ asrs r4, r0, #32 │ │ - b.n addf0 │ │ + b.n ade00 │ │ movs r0, r0 │ │ - b.n ade0a │ │ + b.n ade1a │ │ movs r0, r0 │ │ - b.n addf2 │ │ + b.n ade02 │ │ lsls r4, r1, #9 │ │ - b.n ade2a │ │ + b.n ade3a │ │ lsls r4, r1, #9 │ │ - b.n ade00 │ │ + b.n ade10 │ │ lsls r0, r1, #9 │ │ - b.n ade32 │ │ + b.n ade42 │ │ lsls r0, r1, #9 │ │ - b.n ade08 │ │ + b.n ade18 │ │ movs r5, r0 │ │ - b.n adeba │ │ + b.n adeca │ │ movs r1, r0 │ │ - b.n ae926 │ │ + b.n ae936 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r1 │ │ - b.n ae64e │ │ + b.n ae65e │ │ ldrh r1, [r0, #42] @ 0x2a │ │ @ instruction: 0xeb00c044 │ │ - b.n ade50 │ │ + b.n ade60 │ │ movs r0, #8 │ │ - b.n ade52 │ │ + b.n ade62 │ │ movs r0, r0 │ │ - b.n ae9c2 │ │ + b.n ae9d2 │ │ movs r7, r6 │ │ lsrs r0, r0, #8 │ │ lsls r0, r1, #1 │ │ - b.n ade5e │ │ + b.n ade6e │ │ asrs r0, r0, #32 │ │ - b.n ade4a │ │ + b.n ade5a │ │ movs r0, r0 │ │ - b.n aea6e │ │ + b.n aea7e │ │ movs r1, r1 │ │ and.w r0, r0, r0 │ │ - b.n ae9d8 │ │ + b.n ae9e8 │ │ movs r1, r5 │ │ lsrs r0, r0, #8 │ │ subs r7, #49 @ 0x31 │ │ - b.n ae13c │ │ + b.n ae14c │ │ subs r7, #19 │ │ - b.n ae620 │ │ + b.n ae630 │ │ movs r3, r0 │ │ - b.n ae446 │ │ + b.n ae456 │ │ asrs r1, r6, #12 │ │ - b.n ae68a │ │ + b.n ae69a │ │ movs r1, r0 │ │ - b.n ae7ce │ │ + b.n ae7de │ │ movs r1, r0 │ │ - b.n ae852 │ │ + b.n ae862 │ │ movs r2, r0 │ │ - b.n ae5f6 │ │ + b.n ae606 │ │ movs r1, r5 │ │ cmp r2, #0 │ │ movs r1, r0 │ │ - b.n ae980 │ │ + b.n ae990 │ │ @ instruction: 0xfff30aff │ │ adds r0, #76 @ 0x4c │ │ - b.n ade9e │ │ + b.n adeae │ │ asrs r1, r4, #2 │ │ - b.n ae6aa │ │ + b.n ae6ba │ │ adds r0, #0 │ │ - b.n ae314 │ │ + b.n ae324 │ │ movs r0, r0 │ │ - b.n aea18 │ │ + b.n aea28 │ │ @ instruction: 0xfff50aff │ │ strb r4, [r1, #1] │ │ - b.n adea4 │ │ + b.n adeb4 │ │ strb r0, [r0, #0] │ │ - b.n ae32c │ │ + b.n ae33c │ │ strb r2, [r6, #3] │ │ - b.n ae790 │ │ + b.n ae7a0 │ │ movs r7, r0 │ │ - b.n ae62c │ │ + b.n ae63c │ │ movs r2, r2 │ │ lsrs r0, r0, #8 │ │ movs r0, #68 @ 0x44 │ │ - b.n adec6 │ │ + b.n aded6 │ │ adds r0, #128 @ 0x80 │ │ - b.n ae492 │ │ + b.n ae4a2 │ │ strb r4, [r0, #1] │ │ - b.n adec0 │ │ + b.n aded0 │ │ movs r2, #3 │ │ - b.n ae49e │ │ + b.n ae4ae │ │ lsrs r5, r1, #10 │ │ orn sl, r2, #288768 @ 0x46800 │ │ orn sl, r2, #18304 @ 0x4780 │ │ orn r2, r2, #536576 @ 0x83000 │ │ - b.n ae4b8 │ │ + b.n ae4c8 │ │ lsrs r5, r1, #10 │ │ orr.w sl, r2, #288768 @ 0x46800 │ │ orr.w sl, r2, #18304 @ 0x4780 │ │ orr.w r0, r2, #835584 @ 0xcc000 │ │ - b.n adee4 │ │ + b.n adef4 │ │ adds r0, #76 @ 0x4c │ │ - b.n adef6 │ │ + b.n adf06 │ │ strb r0, [r0, #0] │ │ - b.n ae366 │ │ + b.n ae376 │ │ adds r0, #0 │ │ - b.n ae36c │ │ + b.n ae37c │ │ strb r5, [r1, #0] │ │ - b.n ae7d8 │ │ + b.n ae7e8 │ │ adds r0, #3 │ │ - b.n ae6dc │ │ + b.n ae6ec │ │ adds r0, #0 │ │ - b.n ae356 │ │ + b.n ae366 │ │ movs r0, #8 │ │ - b.n adf0e │ │ + b.n adf1e │ │ ldrb r4, [r1, #24] │ │ - b.n adf18 │ │ + b.n adf28 │ │ strb r7, [r0, #0] │ │ - b.n ae4fc │ │ + b.n ae50c │ │ @ instruction: 0xffdaeaff │ │ movs r1, r0 │ │ - b.n ae866 │ │ + b.n ae876 │ │ asrs r0, r1, #1 │ │ - b.n adf22 │ │ + b.n adf32 │ │ movs r7, r3 │ │ - b.n aeaee │ │ + b.n aeafe │ │ adds r0, #1 │ │ - b.n ae8f2 │ │ + b.n ae902 │ │ asrs r3, r4, #6 │ │ - b.n ae318 │ │ + b.n ae328 │ │ movs r0, r0 │ │ - b.n aea9c │ │ + b.n aeaac │ │ movs r0, r4 │ │ lsls r0, r0, #10 │ │ @ instruction: 0xffd2eaff │ │ movs r0, r0 │ │ - b.n aeaba │ │ + b.n aeaca │ │ movs r0, r3 │ │ lsrs r0, r0, #8 │ │ movs r4, r5 │ │ - b.n adf3c │ │ + b.n adf4c │ │ asrs r0, r7, #32 │ │ - b.n ae8a8 │ │ + b.n ae8b8 │ │ add r1, sp, #568 @ 0x238 │ │ add.w r0, r0, r0 │ │ - b.n aeaba │ │ + b.n aeaca │ │ lsls r1, r7, #21 │ │ subs r0, r0, r0 │ │ movs r0, r7 │ │ - b.n ade58 │ │ + b.n ade68 │ │ ldrb r0, [r0, #8] │ │ - b.n aea3e │ │ + b.n aea4e │ │ ldrb r2, [r3, #14] │ │ - b.n aeab0 │ │ + b.n aeac0 │ │ asrs r4, r6, #32 │ │ - b.n ade64 │ │ + b.n ade74 │ │ movs r7, #144 @ 0x90 │ │ - b.n ae538 │ │ + b.n ae548 │ │ lsrs r0, r0, #31 │ │ - b.n ae776 │ │ + b.n ae786 │ │ adds r7, #144 @ 0x90 │ │ - b.n ae480 │ │ + b.n ae490 │ │ movs r1, r0 │ │ - b.n ae562 │ │ + b.n ae572 │ │ subs r1, r0, #7 │ │ - b.n ae588 │ │ + b.n ae598 │ │ movs r0, #24 │ │ - b.n adf80 │ │ + b.n adf90 │ │ stmia r0!, {r2, r6} │ │ - b.n adf84 │ │ + b.n adf94 │ │ lsls r0, r6, #3 │ │ - b.n ae7d2 │ │ + b.n ae7e2 │ │ movs r0, #44 @ 0x2c │ │ - b.n adf8c │ │ + b.n adf9c │ │ lsls r0, r6, #3 │ │ - b.n ae7da │ │ + b.n ae7ea │ │ movs r0, #28 │ │ - b.n adf94 │ │ + b.n adfa4 │ │ lsls r0, r6, #3 │ │ - b.n ae7e2 │ │ + b.n ae7f2 │ │ movs r0, #32 │ │ - b.n adf9c │ │ + b.n adfac │ │ lsls r0, r6, #3 │ │ - b.n ae7ea │ │ + b.n ae7fa │ │ movs r0, #36 @ 0x24 │ │ - b.n adfa4 │ │ + b.n adfb4 │ │ lsls r0, r6, #3 │ │ - b.n ae7f2 │ │ + b.n ae802 │ │ lsls r0, r0, #9 │ │ - b.n adfaa │ │ + b.n adfba │ │ movs r0, r6 │ │ - b.n adf90 │ │ + b.n adfa0 │ │ lsls r0, r2, #3 │ │ - b.n ae7fa │ │ + b.n ae80a │ │ movs r1, r0 │ │ - b.n ae71e │ │ + b.n ae72e │ │ lsls r7, r0, #21 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #9 │ │ - b.n adfb0 │ │ + b.n adfc0 │ │ str r0, [r0, r1] │ │ - b.n adfa4 │ │ + b.n adfb4 │ │ str r0, [r2, #12] │ │ - b.n ae80e │ │ + b.n ae81e │ │ movs r7, r0 │ │ - b.n ae73e │ │ + b.n ae74e │ │ lsls r6, r0, #21 │ │ subs r0, r0, r0 │ │ strh r0, [r0, #0] │ │ - b.n aebda │ │ + b.n aebea │ │ movs r0, r0 │ │ - b.n aeb4a │ │ + b.n aeb5a │ │ asrs r0, r2, #32 │ │ - b.n ae9a2 │ │ + b.n ae9b2 │ │ asrs r4, r7, #32 │ │ - b.n adfc0 │ │ + b.n adfd0 │ │ movs r4, r6 │ │ - b.n adfc4 │ │ + b.n adfd4 │ │ movs r1, r6 │ │ lsrs r0, r0, #8 │ │ asrs r6, r0, #2 │ │ - b.n ae5be │ │ + b.n ae5ce │ │ lsls r1, r0, #4 │ │ - b.n ae5b6 │ │ + b.n ae5c6 │ │ strb r0, [r2, #0] │ │ - b.n ae9ba │ │ + b.n ae9ca │ │ lsls r0, r0, #1 │ │ - b.n adff8 │ │ + b.n ae008 │ │ asrs r4, r0, #32 │ │ - b.n adff0 │ │ + b.n ae000 │ │ movs r0, r5 │ │ - b.n adfe6 │ │ + b.n adff6 │ │ movs r0, r0 │ │ - b.n ae76c │ │ + b.n ae77c │ │ movs r0, r5 │ │ subs r2, #0 │ │ str r0, [r0, r1] │ │ - b.n ae00a │ │ + b.n ae01a │ │ ands r0, r0 │ │ - b.n ae004 │ │ + b.n ae014 │ │ str r0, [sp, #32] │ │ - b.n ae008 │ │ + b.n ae018 │ │ movs r7, r0 │ │ - b.n ae088 │ │ + b.n ae098 │ │ movs r0, r1 │ │ - b.n aeb02 │ │ + b.n aeb12 │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n aeb9c │ │ + b.n aebac │ │ movs r4, r2 │ │ subs r0, r0, r0 │ │ asrs r0, r6, #2 │ │ - b.n ae01c │ │ + b.n ae02c │ │ lsls r0, r3, #4 │ │ - b.n ae020 │ │ + b.n ae030 │ │ movs r1, r0 │ │ - b.n ae79a │ │ + b.n ae7aa │ │ movs r0, r2 │ │ cmp r2, #0 │ │ asrs r4, r3, #4 │ │ - b.n ae02c │ │ + b.n ae03c │ │ movs r1, r0 │ │ - b.n aea06 │ │ + b.n aea16 │ │ asrs r4, r2, #32 │ │ - b.n ae012 │ │ + b.n ae022 │ │ lsls r0, r3, #4 │ │ - b.n ae018 │ │ + b.n ae028 │ │ asrs r4, r3 │ │ - b.n ae01c │ │ + b.n ae02c │ │ strb r4, [r1, #0] │ │ - b.n ae9a4 │ │ + b.n ae9b4 │ │ str r1, [r0, #0] │ │ - b.n ae9c6 │ │ + b.n ae9d6 │ │ @ instruction: 0xffe61aff │ │ movs r4, r2 │ │ and.w r0, r0, ip, lsr #1 │ │ - b.n ae0d0 │ │ + b.n ae0e0 │ │ movs r0, #255 @ 0xff │ │ - b.n aec6a │ │ + b.n aec7a │ │ asrs r1, r3, #32 │ │ - b.n ae86e │ │ + b.n ae87e │ │ movs r4, r0 │ │ - b.n ae872 │ │ - ldr r2, [sp, #888] @ 0x378 │ │ - @ instruction: 0xfb00c044 │ │ - b.n ae074 │ │ + b.n ae882 │ │ + ldr r3, [sp, #332] @ 0x14c │ │ + @ instruction: 0xfa00c044 │ │ + b.n ae084 │ │ movs r1, r0 │ │ - b.n aebf0 │ │ + b.n aec00 │ │ @ instruction: 0xffea0aff │ │ movs r4, r0 │ │ - b.n ae9ce │ │ + b.n ae9de │ │ add r0, sp, #628 @ 0x274 │ │ @ instruction: 0xeb00c044 │ │ - b.n ae088 │ │ + b.n ae098 │ │ strb r4, [r1, #0] │ │ - b.n ae9e0 │ │ + b.n ae9f0 │ │ str r1, [r0, #0] │ │ - b.n aea02 │ │ + b.n aea12 │ │ @ instruction: 0xffd71aff │ │ movs r5, r0 │ │ @ instruction: 0xea00f000 │ │ - b.n aeba2 │ │ + b.n aebb2 │ │ @ instruction: 0xffffffff │ │ @ instruction: 0xffffffff │ │ ... │ │ strh r6, [r0, #0] │ │ - b.n ae8b6 │ │ - add r0, pc, #64 @ (adr r0, ae5b8 ) │ │ - b.n ae094 │ │ + b.n ae8c6 │ │ + add r0, pc, #64 @ (adr r0, ae5c8 ) │ │ + b.n ae0a4 │ │ strb r0, [r0, #0] │ │ - b.n aed3e │ │ + b.n aed4e │ │ subs r4, #104 @ 0x68 │ │ - b.n ae0c0 │ │ - add r0, pc, #208 @ (adr r0, ae654 ) │ │ - b.n ae0c0 │ │ + b.n ae0d0 │ │ + add r0, pc, #208 @ (adr r0, ae664 ) │ │ + b.n ae0d0 │ │ movs r0, #64 @ 0x40 │ │ - b.n ae0c4 │ │ + b.n ae0d4 │ │ adds r0, #3 │ │ - b.n ae6ac │ │ + b.n ae6bc │ │ movs r0, r0 │ │ - b.n ae0c6 │ │ + b.n ae0d6 │ │ asrs r4, r7, #8 │ │ - b.n ae0ba │ │ + b.n ae0ca │ │ movs r0, r1 │ │ - b.n ae61a │ │ + b.n ae62a │ │ movs r1, r0 │ │ - b.n ae69e │ │ + b.n ae6ae │ │ lsls r4, r7, #8 │ │ - b.n ae0a6 │ │ + b.n ae0b6 │ │ lsls r0, r1, #2 │ │ - b.n ae6b6 │ │ + b.n ae6c6 │ │ asrs r4, r7, #32 │ │ - b.n ae0e4 │ │ + b.n ae0f4 │ │ lsls r0, r0, #4 │ │ - b.n ae6b0 │ │ + b.n ae6c0 │ │ asrs r1, r0, #32 │ │ - b.n aecf2 │ │ + b.n aed02 │ │ adds r0, #12 │ │ - b.n ae0b6 │ │ + b.n ae0c6 │ │ strb r0, [r2, #0] │ │ - b.n ae0ba │ │ + b.n ae0ca │ │ asrs r4, r2, #32 │ │ - b.n ae0be │ │ + b.n ae0ce │ │ movs r2, r0 │ │ - b.n ae902 │ │ + b.n ae912 │ │ strh r0, [r0, #0] │ │ - b.n ae0da │ │ + b.n ae0ea │ │ strh r4, [r0, #0] │ │ - b.n ae0de │ │ + b.n ae0ee │ │ strh r2, [r0, #0] │ │ - b.n ae90e │ │ + b.n ae91e │ │ asrs r0, r4, #2 │ │ - b.n ae0f6 │ │ + b.n ae106 │ │ movs r0, #0 │ │ - b.n aed16 │ │ + b.n aed26 │ │ asrs r0, r1, #32 │ │ - b.n ae0f4 │ │ + b.n ae104 │ │ ldr r0, [sp, #612] @ 0x264 │ │ add.w r2, r0, r4, lsl #21 │ │ - b.n ae112 │ │ + b.n ae122 │ │ asrs r4, r2, #32 │ │ - b.n ae120 │ │ + b.n ae130 │ │ movs r0, r0 │ │ - b.n ae114 │ │ + b.n ae124 │ │ str r1, [r0, #0] │ │ - b.n aeaf0 │ │ + b.n aeb00 │ │ movs r0, r0 │ │ - b.n ae89e │ │ + b.n ae8ae │ │ lsls r7, r1, #3 │ │ ldr r2, [sp, #0] │ │ asrs r0, r7, #32 │ │ - b.n ae114 │ │ - b.n ae684 │ │ - b.n ae138 │ │ + b.n ae124 │ │ + b.n ae694 │ │ + b.n ae148 │ │ movs r0, r7 │ │ - b.n ae13c │ │ + b.n ae14c │ │ movs r0, r0 │ │ - b.n ae110 │ │ + b.n ae120 │ │ negs r4, r2 │ │ - b.n ae13a │ │ + b.n ae14a │ │ movs r0, r0 │ │ - b.n aecb6 │ │ + b.n aecc6 │ │ str r0, [r0, r0] │ │ asrs r4, r2, #22 │ │ movs r0, r0 │ │ asrs r5, r2, #13 │ │ lsls r2, r7, #6 │ │ subs r0, r0, r0 │ │ asrs r4, r2, #9 │ │ - b.n ae15a │ │ + b.n ae16a │ │ movs r0, r0 │ │ - b.n aecc4 │ │ + b.n aecd4 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r1 │ │ - b.n ae96a │ │ + b.n ae97a │ │ movs r0, #1 │ │ - b.n aed6e │ │ + b.n aed7e │ │ ldr r0, [sp, #528] @ 0x210 │ │ @ instruction: 0xeb00e044 │ │ - b.n ae170 │ │ + b.n ae180 │ │ movs r0, r6 │ │ - b.n ae174 │ │ + b.n ae184 │ │ str r0, [sp, #0] │ │ - b.n aed7e │ │ + b.n aed8e │ │ strb r4, [r0, #0] │ │ - b.n ae176 │ │ + b.n ae186 │ │ str r4, [r0, #0] │ │ - b.n ae166 │ │ + b.n ae176 │ │ movs r0, r0 │ │ - b.n aecf8 │ │ + b.n aed08 │ │ lsls r6, r1, #1 │ │ lsrs r0, r0, #8 │ │ stmia r0!, {r2, r3, r4, r5} │ │ - b.n ae18c │ │ + b.n ae19c │ │ movs r0, r0 │ │ - b.n aed02 │ │ + b.n aed12 │ │ lsls r3, r1, #1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r7, #32 │ │ - b.n aeb6e │ │ + b.n aeb7e │ │ movs r0, r2 │ │ - b.n aeb62 │ │ + b.n aeb72 │ │ asrs r0, r5, #32 │ │ - b.n ae180 │ │ + b.n ae190 │ │ movs r0, r7 │ │ - b.n ae184 │ │ + b.n ae194 │ │ movs r4, r0 │ │ @ instruction: 0xea009001 │ │ - b.n aeb84 │ │ + b.n aeb94 │ │ strb r1, [r0, #0] │ │ - b.n aeb04 │ │ + b.n aeb14 │ │ movs r0, r0 │ │ - b.n aed26 │ │ + b.n aed36 │ │ movs r0, r0 │ │ asrs r7, r2, #13 │ │ lsls r1, r0, #1 │ │ lsrs r0, r0, #8 │ │ adds r0, #56 @ 0x38 │ │ - b.n ae1c0 │ │ + b.n ae1d0 │ │ lsls r6, r0, #2 │ │ - b.n ae796 │ │ + b.n ae7a6 │ │ movs r0, #135 @ 0x87 │ │ - b.n ae79c │ │ + b.n ae7ac │ │ asrs r4, r1, #32 │ │ - b.n ae9d2 │ │ + b.n ae9e2 │ │ lsls r0, r0, #4 │ │ - b.n ae5fc │ │ + b.n ae60c │ │ asrs r2, r0 │ │ - b.n ae5fc │ │ + b.n ae60c │ │ movs r0, #4 │ │ - b.n ae1c4 │ │ + b.n ae1d4 │ │ str r0, [r1, r0] │ │ - b.n ae1c8 │ │ + b.n ae1d8 │ │ adds r0, #4 │ │ - b.n ae1c8 │ │ + b.n ae1d8 │ │ str r5, [r0, r0] │ │ - b.n ae7ae │ │ + b.n ae7be │ │ movs r5, r0 │ │ - b.n ae954 │ │ + b.n ae964 │ │ @ instruction: 0xffee2aff │ │ strh r0, [r1, #0] │ │ - b.n ae1d8 │ │ + b.n ae1e8 │ │ adds r0, #8 │ │ - b.n ae7c0 │ │ + b.n ae7d0 │ │ movs r2, r0 │ │ - b.n ae964 │ │ + b.n ae974 │ │ movs r4, r2 │ │ ldr r2, [sp, #0] │ │ - add r0, pc, #256 @ (adr r0, ae7c4 ) │ │ - b.n ae202 │ │ + add r0, pc, #256 @ (adr r0, ae7d4 ) │ │ + b.n ae212 │ │ movs r0, r0 │ │ - b.n aee0a │ │ + b.n aee1a │ │ movs r0, r0 │ │ - b.n ae1d0 │ │ + b.n ae1e0 │ │ movs r7, r0 │ │ - b.n ae286 │ │ + b.n ae296 │ │ movs r0, r1 │ │ - b.n aecf6 │ │ + b.n aed06 │ │ movs r4, r3 │ │ subs r0, r0, r0 │ │ strb r1, [r0, #0] │ │ - b.n aeb6c │ │ + b.n aeb7c │ │ movs r1, r0 │ │ - b.n aed92 │ │ + b.n aeda2 │ │ movs r3, r4 │ │ subs r0, r0, r0 │ │ asrs r0, r6, #2 │ │ - b.n ae21e │ │ + b.n ae22e │ │ lsls r0, r3, #4 │ │ - b.n ae222 │ │ + b.n ae232 │ │ movs r1, r0 │ │ - b.n ae992 │ │ + b.n ae9a2 │ │ movs r7, r3 │ │ cmp r2, #0 │ │ asrs r4, r3, #4 │ │ - b.n ae22e │ │ + b.n ae23e │ │ movs r1, r0 │ │ - b.n aebfe │ │ + b.n aec0e │ │ asrs r4, r2, #32 │ │ - b.n ae20a │ │ + b.n ae21a │ │ lsls r0, r3, #4 │ │ - b.n ae21a │ │ + b.n ae22a │ │ asrs r4, r3 │ │ - b.n ae21e │ │ + b.n ae22e │ │ strh r0, [r0, #2] │ │ - b.n ae248 │ │ - add r0, pc, #208 @ (adr r0, ae7e0 ) │ │ - b.n ae24c │ │ + b.n ae258 │ │ + add r0, pc, #208 @ (adr r0, ae7f0 ) │ │ + b.n ae25c │ │ @ instruction: 0xffd7eaff │ │ asrs r2, r7, #2 │ │ - b.n aeaba │ │ + b.n aeaca │ │ lsrs r1, r0, #4 │ │ - b.n aedc0 │ │ + b.n aedd0 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #40 @ 0x28 │ │ - b.n ae260 │ │ - ldr r7, [pc, #1020] @ (aeb24 ) │ │ - b.n aed44 │ │ + b.n ae270 │ │ + ldr r7, [pc, #1020] @ (aeb34 ) │ │ + b.n aed54 │ │ asrs r4, r0, #32 │ │ - b.n ae730 │ │ + b.n ae740 │ │ movs r0, #208 @ 0xd0 │ │ - b.n aeab6 │ │ + b.n aeac6 │ │ asrs r2, r7, #2 │ │ - b.n aeab6 │ │ + b.n aeac6 │ │ adds r0, #4 │ │ - b.n ae23a │ │ + b.n ae24a │ │ movs r0, #0 │ │ - b.n ae23e │ │ + b.n ae24e │ │ str r0, [sp, #4] │ │ - b.n aec54 │ │ + b.n aec64 │ │ str r1, [r0, #0] │ │ - b.n aebd2 │ │ + b.n aebe2 │ │ strh r0, [r0, #2] │ │ - b.n ae284 │ │ + b.n ae294 │ │ @ instruction: 0xffc9eaff │ │ lsls r4, r3, #1 │ │ - b.n ae306 │ │ + b.n ae316 │ │ movs r0, #255 @ 0xff │ │ - b.n aee96 │ │ + b.n aeea6 │ │ asrs r0, r3, #32 │ │ - b.n aea9a │ │ + b.n aeaaa │ │ movs r4, r0 │ │ - b.n aea9e │ │ - ldr r2, [sp, #332] @ 0x14c │ │ - @ instruction: 0xfb00c03c │ │ - b.n ae2a0 │ │ - b.n ae7f0 │ │ - b.n ae2a4 │ │ + b.n aeaae │ │ + ldr r2, [sp, #800] @ 0x320 │ │ + @ instruction: 0xfa00c03c │ │ + b.n ae2b0 │ │ + b.n ae800 │ │ + b.n ae2b4 │ │ strb r1, [r0, #0] │ │ - b.n aebfc │ │ + b.n aec0c │ │ movs r1, r0 │ │ - b.n aee22 │ │ + b.n aee32 │ │ @ instruction: 0xffdb0aff │ │ movs r4, r0 │ │ - b.n aec02 │ │ + b.n aec12 │ │ add r0, sp, #64 @ 0x40 │ │ @ instruction: 0xeb00c03c │ │ - b.n ae2bc │ │ - b.n ae80c │ │ - b.n ae2c0 │ │ + b.n ae2cc │ │ + b.n ae81c │ │ + b.n ae2d0 │ │ @ instruction: 0xffdfeaff │ │ movs r1, r1 │ │ - b.n ae89a │ │ + b.n ae8aa │ │ movs r0, r0 │ │ - b.n aee3e │ │ + b.n aee4e │ │ movs r7, r0 │ │ - b.n ae896 │ │ + b.n ae8a6 │ │ movs r0, r0 │ │ - b.n ae2ae │ │ + b.n ae2be │ │ movs r3, r2 │ │ lsrs r0, r0, #8 │ │ asrs r6, r0, #2 │ │ - b.n ae8ae │ │ + b.n ae8be │ │ movs r0, #48 @ 0x30 │ │ - b.n ae2e0 │ │ + b.n ae2f0 │ │ subs r7, #255 @ 0xff │ │ - b.n aedc4 │ │ + b.n aedd4 │ │ asrs r1, r0, #4 │ │ - b.n ae8b2 │ │ + b.n ae8c2 │ │ movs r0, #56 @ 0x38 │ │ - b.n aecc2 │ │ + b.n aecd2 │ │ asrs r0, r2, #32 │ │ - b.n aecb8 │ │ + b.n aecc8 │ │ movs r2, r0 │ │ and.w r0, r0, ip, lsl #4 │ │ - b.n aec40 │ │ + b.n aec50 │ │ str r1, [r0, #0] │ │ - b.n aec6e │ │ + b.n aec7e │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ strb r0, [r0, #0] │ │ - b.n ae2ec │ │ + b.n ae2fc │ │ str r2, [r7, r2] │ │ - b.n aeb7c │ │ + b.n aeb8c │ │ lsrs r1, r0, #4 │ │ - b.n aee7c │ │ + b.n aee8c │ │ @ instruction: 0xfff80aff │ │ lsls r0, r2, #8 │ │ ldmia.w r2, {r0, r1, ip, lr} │ │ - b.n ae7e8 │ │ + b.n ae7f8 │ │ str r2, [r7, r2] │ │ - b.n aeb70 │ │ + b.n aeb80 │ │ str r0, [sp, #16] │ │ - b.n ae2f4 │ │ + b.n ae304 │ │ ands r0, r0 │ │ - b.n ae2f8 │ │ + b.n ae308 │ │ @ instruction: 0xfff2eaff │ │ str r0, [r6, r0] │ │ - b.n ae32c │ │ + b.n ae33c │ │ movs r0, #4 │ │ - b.n ae32a │ │ + b.n ae33a │ │ ands r4, r0 │ │ - b.n ae324 │ │ + b.n ae334 │ │ movs r2, r0 │ │ - b.n aea9e │ │ + b.n aeaae │ │ lsls r0, r5, #4 │ │ cmp r2, #0 │ │ movs r0, r0 │ │ - b.n aeeae │ │ + b.n aeebe │ │ lsls r4, r4, #5 │ │ lsrs r0, r0, #8 │ │ strh r0, [r2, #0] │ │ - b.n aed18 │ │ + b.n aed28 │ │ movs r0, #1 │ │ - b.n aef52 │ │ + b.n aef62 │ │ stmia r0!, {} │ │ - b.n aef56 │ │ + b.n aef66 │ │ asrs r1, r0, #32 │ │ - b.n aef5a │ │ + b.n aef6a │ │ movs r1, r0 │ │ - b.n aef5e │ │ + b.n aef6e │ │ movs r3, r0 │ │ and.w r0, r0, r1, lsl #8 │ │ - b.n aed2a │ │ + b.n aed3a │ │ adds r0, #4 │ │ - b.n ae354 │ │ + b.n ae364 │ │ movs r3, r0 │ │ - b.n aead0 │ │ + b.n aeae0 │ │ lsls r4, r3, #5 │ │ ldrh r0, [r0, #16] │ │ str r4, [r0, #0] │ │ - b.n ae36a │ │ + b.n ae37a │ │ movs r6, r0 │ │ - b.n aeade │ │ + b.n aeaee │ │ lsls r1, r6, #7 │ │ ldrh r0, [r0, #16] │ │ movs r2, r0 │ │ - b.n aeae2 │ │ + b.n aeaf2 │ │ movs r4, r3 │ │ cmp r2, #0 │ │ adds r0, #60 @ 0x3c │ │ - b.n ae384 │ │ + b.n ae394 │ │ strb r2, [r0, #2] │ │ - b.n ae952 │ │ + b.n ae962 │ │ str r3, [r0, #0] │ │ - b.n aeb92 │ │ + b.n aeba2 │ │ strb r7, [r0, #4] │ │ - b.n ae7c2 │ │ + b.n ae7d2 │ │ movs r0, r0 │ │ - b.n aef08 │ │ + b.n aef18 │ │ @ instruction: 0xfff00aff │ │ lsls r1, r0 │ │ - b.n ae964 │ │ + b.n ae974 │ │ str r0, [r0, r2] │ │ - b.n ae966 │ │ + b.n ae976 │ │ strb r4, [r0, #0] │ │ - b.n ae396 │ │ + b.n ae3a6 │ │ movs r1, r0 │ │ - b.n aed6e │ │ + b.n aed7e │ │ asrs r4, r0 │ │ - b.n ae982 │ │ + b.n ae992 │ │ str r5, [r0, r4] │ │ - b.n ae97c │ │ + b.n ae98c │ │ adds r0, #4 │ │ - b.n ae3a2 │ │ + b.n ae3b2 │ │ movs r3, r0 │ │ - b.n aeb2c │ │ + b.n aeb3c │ │ movs r6, r0 │ │ cmp r2, #0 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr2, [r6, #4] │ │ - b.n aed8e │ │ + b.n aed9e │ │ adds r0, #8 │ │ - b.n ae3ba │ │ + b.n ae3ca │ │ adds r0, #8 │ │ - b.n ae39c │ │ + b.n ae3ac │ │ lsrs r0, r0, #12 │ │ stcl 0, cr5, [r5, #192] @ 0xc0 │ │ - b.n ae3d4 │ │ + b.n ae3e4 │ │ @ instruction: 0xffe1eaff │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr1, [r4, #4] │ │ - b.n aeda8 │ │ + b.n aedb8 │ │ adds r0, #8 │ │ - b.n ae3d2 │ │ + b.n ae3e2 │ │ adds r0, #8 │ │ - b.n ae3b8 │ │ + b.n ae3c8 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr5, [r5, #192] @ 0xc0 │ │ - b.n ae3f0 │ │ + b.n ae400 │ │ @ instruction: 0xffdaeaff │ │ str r6, [r0, r2] │ │ - b.n ae9ca │ │ + b.n ae9da │ │ adds r0, #60 @ 0x3c │ │ - b.n ae3fc │ │ + b.n ae40c │ │ ands r6, r0 │ │ - b.n aec06 │ │ + b.n aec16 │ │ str r5, [r0, r4] │ │ - b.n ae9d0 │ │ + b.n ae9e0 │ │ movs r4, r0 │ │ and.w r0, r0, r1, lsl #16 │ │ - b.n aed5a │ │ + b.n aed6a │ │ str r1, [r0, #0] │ │ - b.n aed62 │ │ + b.n aed72 │ │ str r4, [r1, r0] │ │ - b.n aed64 │ │ + b.n aed74 │ │ movs r2, r0 │ │ - b.n aeb8a │ │ + b.n aeb9a │ │ movs r6, r1 │ │ subs r2, #0 │ │ strb r0, [r0, #0] │ │ - b.n ae410 │ │ + b.n ae420 │ │ movs r0, r0 │ │ - b.n aef98 │ │ + b.n aefa8 │ │ @ instruction: 0xfff80aff │ │ movs r4, r0 │ │ - b.n aeb9e │ │ + b.n aebae │ │ @ instruction: 0xfff50aff │ │ strb r4, [r0, #2] │ │ - b.n aea02 │ │ + b.n aea12 │ │ adds r0, #60 @ 0x3c │ │ - b.n ae438 │ │ - b.n ae910 │ │ - b.n ae42c │ │ + b.n ae448 │ │ + b.n ae920 │ │ + b.n ae43c │ │ strb r7, [r0, #4] │ │ - b.n aea0c │ │ + b.n aea1c │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr14, [r5, #32] │ │ - b.n ae41c │ │ - b.n ae998 │ │ - b.n ae44c │ │ + b.n ae42c │ │ + b.n ae9a8 │ │ + b.n ae45c │ │ lsrs r0, r0, #12 │ │ stcl 0, cr12, [r7] │ │ - b.n ae424 │ │ + b.n ae434 │ │ @ instruction: 0xffebeaff │ │ str r0, [r6, r0] │ │ - b.n ae45c │ │ + b.n ae46c │ │ movs r0, #1 │ │ - b.n aee2e │ │ + b.n aee3e │ │ strb r4, [r0, #0] │ │ - b.n ae454 │ │ + b.n ae464 │ │ movs r7, r0 │ │ - b.n aebd0 │ │ + b.n aebe0 │ │ @ instruction: 0xffbf9aff │ │ lsls r3, r3, #4 │ │ @ instruction: 0xea008054 │ │ @ instruction: 0xf2801038 │ │ - b.n ae458 │ │ + b.n ae468 │ │ movs r4, r1 │ │ and.w r2, r0, r4, lsr #17 │ │ - b.n ae476 │ │ + b.n ae486 │ │ movs r0, r0 │ │ - b.n aeff2 │ │ + b.n af002 │ │ lsls r1, r2, #2 │ │ subs r0, r0, r0 │ │ movs r0, r7 │ │ - b.n ae48c │ │ - b.n ae9dc │ │ - b.n ae490 │ │ + b.n ae49c │ │ + b.n ae9ec │ │ + b.n ae4a0 │ │ movs r1, r0 │ │ - b.n aee5a │ │ + b.n aee6a │ │ movs r0, r7 │ │ - b.n ae478 │ │ + b.n ae488 │ │ strb r0, [r0, #4] │ │ - b.n ae86c │ │ + b.n ae87c │ │ strh r4, [r0, r1] │ │ - b.n ae496 │ │ + b.n ae4a6 │ │ str r1, [r0, #0] │ │ - b.n aee76 │ │ + b.n aee86 │ │ movs r0, r0 │ │ - b.n ae498 │ │ + b.n ae4a8 │ │ movs r0, r0 │ │ - b.n aec1e │ │ + b.n aec2e │ │ vpmin.u32 q4, , │ │ strb r6, [r0, #4] │ │ - b.n ae8a4 │ │ + b.n ae8b4 │ │ negs r0, r0 │ │ - b.n ae4ae │ │ + b.n ae4be │ │ movs r4, r0 │ │ - b.n aecc2 │ │ + b.n aecd2 │ │ asrs r7, r0, #32 │ │ - b.n aecc6 │ │ + b.n aecd6 │ │ subs r4, r3, #0 │ │ add.w r0, r0, r0 │ │ - b.n af02e │ │ + b.n af03e │ │ @ instruction: 0xffeb0aff │ │ asrs r0, r0, #2 │ │ - b.n aea96 │ │ + b.n aeaa6 │ │ movs r1, #1 │ │ - b.n aeaa2 │ │ + b.n aeab2 │ │ movs r0, #20 │ │ - b.n ae4c2 │ │ + b.n ae4d2 │ │ movs r7, r0 │ │ - b.n aec46 │ │ + b.n aec56 │ │ @ instruction: 0xffe61aff │ │ movs r0, #60 @ 0x3c │ │ - b.n ae4e4 │ │ + b.n ae4f4 │ │ str r1, [sp, #4] │ │ - b.n ae912 │ │ - add r0, pc, #32 @ (adr r0, ae9d0 ) │ │ - b.n ae4d6 │ │ + b.n ae922 │ │ + add r0, pc, #32 @ (adr r0, ae9e0 ) │ │ + b.n ae4e6 │ │ movs r0, #16 │ │ - b.n af0f6 │ │ + b.n af106 │ │ movs r0, #186 @ 0xba │ │ - b.n aed4c │ │ + b.n aed5c │ │ movs r0, #0 │ │ - b.n af17e │ │ + b.n af18e │ │ movs r0, #4 │ │ - b.n ae4d4 │ │ + b.n ae4e4 │ │ movs r0, #0 │ │ - b.n ae4d8 │ │ + b.n ae4e8 │ │ adds r2, #64 @ 0x40 │ │ - b.n ae4fa │ │ + b.n ae50a │ │ movs r0, r0 │ │ - b.n af074 │ │ + b.n af084 │ │ movs r6, r4 │ │ lsrs r0, r0, #8 │ │ movs r4, r4 │ │ ldmia.w r3, {r0, r8, ip} │ │ - b.n aeae0 │ │ + b.n aeaf0 │ │ str r1, [r0, r0] │ │ - b.n aee68 │ │ + b.n aee78 │ │ movs r0, r0 │ │ - b.n aec86 │ │ + b.n aec96 │ │ movs r0, r0 │ │ - b.n aea70 │ │ + b.n aea80 │ │ movs r0, #1 │ │ movs r2, #66 @ 0x42 │ │ ands r0, r1 │ │ - b.n ae514 │ │ + b.n ae524 │ │ lsls r0, r0, #2 │ │ - b.n aeaf2 │ │ + b.n aeb02 │ │ movs r4, r4 │ │ stmia.w r3, {r3, r4, sp} │ │ - b.n af13a │ │ + b.n af14a │ │ movs r1, #0 │ │ - b.n aeb02 │ │ + b.n aeb12 │ │ movs r0, r2 │ │ - b.n aef04 │ │ + b.n aef14 │ │ asrs r4, r3, #32 │ │ - b.n aef08 │ │ + b.n aef18 │ │ ands r2, r1 │ │ - b.n aea92 │ │ + b.n aeaa2 │ │ ands r0, r1 │ │ - b.n ae514 │ │ - ldr r2, [sp, #436] @ 0x1b4 │ │ + b.n ae524 │ │ + ldr r1, [sp, #632] @ 0x278 │ │ @ instruction: 0xfb00023c │ │ - b.n ae546 │ │ + b.n ae556 │ │ str r0, [r0, r1] │ │ - b.n ae54a │ │ + b.n ae55a │ │ movs r1, r0 │ │ - b.n aef1e │ │ + b.n aef2e │ │ lsls r4, r7, #8 │ │ - b.n ae532 │ │ + b.n ae542 │ │ movs r7, r0 │ │ - b.n ae5d0 │ │ + b.n ae5e0 │ │ movs r0, r1 │ │ - b.n af04a │ │ + b.n af05a │ │ lsls r3, r6, #1 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n af0e6 │ │ + b.n af0f6 │ │ lsls r0, r7, #1 │ │ subs r0, r0, r0 │ │ asrs r0, r6, #2 │ │ - b.n ae564 │ │ + b.n ae574 │ │ lsls r0, r3, #4 │ │ - b.n ae568 │ │ + b.n ae578 │ │ movs r1, r0 │ │ - b.n aece2 │ │ + b.n aecf2 │ │ lsls r4, r6, #1 │ │ cmp r2, #0 │ │ movs r1, r0 │ │ - b.n aef4a │ │ + b.n aef5a │ │ strh r0, [r0, #2] │ │ - b.n ae588 │ │ - add r0, pc, #208 @ (adr r0, aeb20 ) │ │ - b.n ae58c │ │ + b.n ae598 │ │ + add r0, pc, #208 @ (adr r0, aeb30 ) │ │ + b.n ae59c │ │ lsls r0, r3, #4 │ │ - b.n ae560 │ │ + b.n ae570 │ │ lsls r4, r3, #4 │ │ - b.n ae584 │ │ + b.n ae594 │ │ movs r4, r2 │ │ - b.n ae570 │ │ + b.n ae580 │ │ str r1, [sp, #112] @ 0x70 │ │ - b.n ae56c │ │ + b.n ae57c │ │ str r0, [sp, #4] │ │ - b.n af1a6 │ │ + b.n af1b6 │ │ str r0, [r5, r0] │ │ - b.n ae5a4 │ │ + b.n ae5b4 │ │ movs r2, r1 │ │ and.w r2, r0, r0, lsr #1 │ │ - b.n ae5a2 │ │ + b.n ae5b2 │ │ asrs r0, r0, #32 │ │ - b.n af1b6 │ │ + b.n af1c6 │ │ movs r2, r1 │ │ - b.n aeb1a │ │ + b.n aeb2a │ │ movs r1, r0 │ │ adds r1, #160 @ 0xa0 │ │ lsls r0, r2, #9 │ │ - b.n ae592 │ │ + b.n ae5a2 │ │ str r0, [r5, r0] │ │ - b.n ae5c0 │ │ + b.n ae5d0 │ │ str r0, [sp, #4] │ │ - b.n af1ca │ │ + b.n af1da │ │ movs r2, r0 │ │ - b.n af142 │ │ + b.n af152 │ │ lsls r7, r4, #1 │ │ cmp r2, #0 │ │ strh r0, [r0, #2] │ │ - b.n ae5d0 │ │ - add r0, pc, #208 @ (adr r0, aeb68 ) │ │ - b.n ae5d4 │ │ + b.n ae5e0 │ │ + add r0, pc, #208 @ (adr r0, aeb78 ) │ │ + b.n ae5e4 │ │ movs r0, r0 │ │ - b.n ae5c8 │ │ + b.n ae5d8 │ │ movs r0, #212 @ 0xd4 │ │ - b.n aed22 │ │ + b.n aed32 │ │ asrs r1, r1, #32 │ │ - b.n aebac │ │ + b.n aebbc │ │ movs r1, r0 │ │ - b.n aed4e │ │ + b.n aed5e │ │ movs r1, r6 │ │ subs r2, #0 │ │ - b.n aeb38 │ │ - b.n ae5ec │ │ + b.n aeb48 │ │ + b.n ae5fc │ │ movs r0, #0 │ │ - b.n af1f6 │ │ + b.n af206 │ │ movs r0, r0 │ │ - b.n af160 │ │ + b.n af170 │ │ asrs r0, r0, #32 │ │ - b.n ae5be │ │ + b.n ae5ce │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ asrs r3, r0 │ │ - b.n ae9e6 │ │ + b.n ae9f6 │ │ movs r7, r0 │ │ - b.n aed72 │ │ + b.n aed82 │ │ movs r0, r1 │ │ ldrh r0, [r0, #16] │ │ asrs r1, r0 │ │ - b.n ae9d2 │ │ + b.n ae9e2 │ │ asrs r1, r0, #32 │ │ - b.n aef58 │ │ + b.n aef68 │ │ adds r0, #1 │ │ - b.n aef80 │ │ + b.n aef90 │ │ @ instruction: 0xfff81aff │ │ asrs r1, r1, #32 │ │ - b.n aee22 │ │ + b.n aee32 │ │ movs r2, r0 │ │ - b.n aed88 │ │ + b.n aed98 │ │ str r7, [r1, r0] │ │ - b.n af2aa │ │ + b.n af2ba │ │ @ instruction: 0xff9c9aff │ │ movs r3, r0 │ │ and.w r0, r0, r3, lsl #8 │ │ - b.n aee36 │ │ + b.n aee46 │ │ movs r2, r0 │ │ - b.n aed9c │ │ + b.n aedac │ │ str r7, [r1, r0] │ │ - b.n af2be │ │ + b.n af2ce │ │ @ instruction: 0xff979aff │ │ str r0, [sp, #8] │ │ - b.n aeb88 │ │ + b.n aeb98 │ │ movs r4, r0 │ │ - b.n af1bc │ │ + b.n af1cc │ │ movs r1, r0 │ │ cmp r2, #0 │ │ adds r0, #1 │ │ - b.n aee52 │ │ + b.n aee62 │ │ movs r1, r2 │ │ and.w pc, r0, r1, ror #15 │ │ - b.n af038 │ │ + b.n af048 │ │ stmia r0!, {r0, r1} │ │ - b.n af2b0 │ │ + b.n af2c0 │ │ lsrs r7, r5, #11 │ │ orn r0, r3, #143360 @ 0x23000 │ │ - b.n aeba8 │ │ + b.n aebb8 │ │ asrs r1, r0, #4 │ │ - b.n aec2a │ │ + b.n aec3a │ │ ands r4, r1 │ │ - b.n aee6e │ │ + b.n aee7e │ │ ldrb r0, [r2, #14] │ │ cdp 0, 10, cr7, cr2, cr12, {0} │ │ - b.n aec44 │ │ + b.n aec54 │ │ lsrs r0, r4, #3 │ │ @ instruction: 0xf262100c │ │ - b.n aefc0 │ │ + b.n aefd0 │ │ movs r0, #96 @ 0x60 │ │ @ instruction: 0xf3f808c8 │ │ @ instruction: 0xf2604004 │ │ - b.n aeff2 │ │ + b.n af002 │ │ cmp r0, #226 @ 0xe2 │ │ @ instruction: 0xf2f22a85 │ │ - bl ffcf0b44 │ │ + bl ffcf0b54 │ │ subs r7, r7, r3 │ │ movs r4, r1 │ │ - b.n aee0c │ │ + b.n aee1c │ │ @ instruction: 0xff800aff │ │ strb r3, [r0, #4] │ │ - b.n aea62 │ │ + b.n aea72 │ │ adds r0, #1 │ │ - b.n aefec │ │ + b.n aeffc │ │ strb r1, [r0, #0] │ │ - b.n af078 │ │ + b.n af088 │ │ movs r2, r0 │ │ - b.n aee14 │ │ + b.n aee24 │ │ @ instruction: 0xfffa8aff │ │ vpmin.u q15, q13, │ │ movs r5, r0 │ │ - b.n aeeba │ │ + b.n aeeca │ │ negs r6, r1 │ │ add.w r0, r0, r0 │ │ - b.n af222 │ │ + b.n af232 │ │ lsls r4, r4, #12 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n ae6b4 │ │ + b.n ae6c4 │ │ adds r0, #0 │ │ - b.n ae6ae │ │ + b.n ae6be │ │ asrs r1, r1, #32 │ │ - b.n aec98 │ │ + b.n aeca8 │ │ @ instruction: 0xffc5eaff │ │ str r0, [sp, #540] @ 0x21c │ │ - b.n aeeda │ │ + b.n aeeea │ │ movs r4, r0 │ │ - b.n aeede │ │ + b.n aeeee │ │ asrs r1, r1, #32 │ │ - b.n aeee2 │ │ + b.n aeef2 │ │ subs r6, r1, #3 │ │ add.w r0, r0, r0, lsl #4 │ │ - b.n ae6d2 │ │ + b.n ae6e2 │ │ movs r1, r0 │ │ - b.n aee4e │ │ + b.n aee5e │ │ vpmin.u32 q12, q11, │ │ movs r0, r0 │ │ - b.n af256 │ │ + b.n af266 │ │ vpmin.u32 q8, q10, │ │ asrs r0, r0, #4 │ │ - b.n aeae6 │ │ + b.n aeaf6 │ │ movs r1, r1 │ │ - b.n aee64 │ │ + b.n aee74 │ │ vpmin.u32 , , │ │ asrs r0, r2, #9 │ │ - b.n ae6fa │ │ + b.n ae70a │ │ str r0, [sp, #4] │ │ - b.n af30e │ │ + b.n af31e │ │ movs r0, r0 │ │ - b.n aee74 │ │ + b.n aee84 │ │ asrs r0, r0, #32 │ │ movs r1, #160 @ 0xa0 │ │ asrs r0, r2, #9 │ │ - b.n ae6ea │ │ + b.n ae6fa │ │ asrs r0, r0, #4 │ │ - b.n aeb06 │ │ + b.n aeb16 │ │ asrs r1, r0, #32 │ │ - b.n af2e4 │ │ + b.n af2f4 │ │ asrs r0, r0, #4 │ │ - b.n aeaee │ │ + b.n aeafe │ │ asrs r4, r2, #9 │ │ - b.n ae71a │ │ + b.n ae72a │ │ movs r0, #0 │ │ - b.n ae710 │ │ + b.n ae720 │ │ movs r0, r0 │ │ - b.n aee96 │ │ + b.n aeea6 │ │ movs r0, #1 │ │ lsls r2, r0, #9 │ │ movs r0, #0 │ │ - b.n ae6fc │ │ + b.n ae70c │ │ @ instruction: 0xff99eaff │ │ lsls r4, r3, #1 │ │ - b.n ae7ac │ │ + b.n ae7bc │ │ movs r0, #255 @ 0xff │ │ - b.n af346 │ │ + b.n af356 │ │ asrs r2, r3, #32 │ │ - b.n aef4a │ │ + b.n aef5a │ │ movs r1, r1 │ │ - b.n aef4e │ │ - ldr r1, [sp, #156] @ 0x9c │ │ - mla r0, r0, r1, r0 │ │ - b.n af2ca │ │ + b.n aef5e │ │ + ldr r1, [sp, #624] @ 0x270 │ │ + @ instruction: 0xfa000001 │ │ + b.n af2da │ │ @ instruction: 0xff860aff │ │ movs r4, r0 │ │ - b.n af0b0 │ │ - add r6, pc, #924 @ (adr r6, aefbc ) │ │ + b.n af0c0 │ │ + add r6, pc, #924 @ (adr r6, aefcc ) │ │ add.w r0, r0, r8, asr #20 │ │ - b.n ae760 │ │ + b.n ae770 │ │ str r0, [sp, #4] │ │ - b.n af36a │ │ + b.n af37a │ │ movs r2, r0 │ │ - b.n af2e2 │ │ + b.n af2f2 │ │ @ instruction: 0xff973aff │ │ asrs r0, r7, #32 │ │ - b.n ae770 │ │ + b.n ae780 │ │ movs r4, r2 │ │ - b.n ae774 │ │ + b.n ae784 │ │ movs r0, #1 │ │ - b.n af140 │ │ + b.n af150 │ │ movs r0, r0 │ │ - b.n aeee4 │ │ + b.n aeef4 │ │ stmia r0!, {r1, r3} │ │ - b.n aecca │ │ + b.n aecda │ │ movs r1, r0 │ │ adds r1, #160 @ 0xa0 │ │ str r0, [sp, #0] │ │ - b.n aecd2 │ │ + b.n aece2 │ │ movs r0, #1 │ │ - b.n af392 │ │ + b.n af3a2 │ │ movs r1, r1 │ │ - b.n aeefa │ │ + b.n aef0a │ │ movs r5, r1 │ │ lsrs r0, r0, #8 │ │ adds r0, #64 @ 0x40 │ │ - b.n ae798 │ │ + b.n ae7a8 │ │ ands r7, r0 │ │ - b.n aed66 │ │ + b.n aed76 │ │ adds r2, #68 @ 0x44 │ │ - b.n ae78c │ │ + b.n ae79c │ │ adds r1, #1 │ │ - b.n aed70 │ │ + b.n aed80 │ │ adds r0, #4 │ │ - b.n ae694 │ │ + b.n ae6a4 │ │ movs r3, r0 │ │ - b.n aef1a │ │ + b.n aef2a │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ movs r0, #1 │ │ - b.n af17e │ │ + b.n af18e │ │ asrs r1, r0, #32 │ │ - b.n af100 │ │ + b.n af110 │ │ movs r2, r1 │ │ - b.n aef26 │ │ + b.n aef36 │ │ @ instruction: 0xfff21aff │ │ str r0, [sp, #40] @ 0x28 │ │ - b.n aefca │ │ + b.n aefda │ │ stmia r0!, {r3, r4, r5} │ │ - b.n ae7a8 │ │ + b.n ae7b8 │ │ vpmin.u q15, , │ │ movs r0, r7 │ │ - b.n ae7b0 │ │ + b.n ae7c0 │ │ vpmin.u q15, , │ │ asrs r0, r7, #32 │ │ - b.n ae7b8 │ │ + b.n ae7c8 │ │ str r0, [sp, #8] │ │ - b.n aefe2 │ │ + b.n aeff2 │ │ vpmin.u q15, q13, │ │ movs r0, r0 │ │ - b.n af352 │ │ + b.n af362 │ │ asrs r4, r0, #32 │ │ - b.n aefee │ │ + b.n aeffe │ │ asrs r1, r0, #32 │ │ asrs r0, r0, #12 │ │ movs r0, r0 │ │ - b.n af35a │ │ + b.n af36a │ │ movs r0, r0 │ │ asrs r4, r2, #13 │ │ lsls r4, r0, #2 │ │ subs r0, r0, r0 │ │ - b.n aed48 │ │ - b.n ae7fc │ │ + b.n aed58 │ │ + b.n ae80c │ │ movs r0, r0 │ │ - b.n af368 │ │ + b.n af378 │ │ lsls r7, r3, #3 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #2 │ │ - b.n aedd6 │ │ + b.n aede6 │ │ lsls r0, r0, #2 │ │ - b.n aedd2 │ │ + b.n aede2 │ │ asrs r1, r0, #4 │ │ - b.n aede0 │ │ + b.n aedf0 │ │ lsls r0, r0, #4 │ │ - b.n aedee │ │ + b.n aedfe │ │ asrs r0, r2, #32 │ │ - b.n af1e0 │ │ + b.n af1f0 │ │ movs r0, r2 │ │ - b.n af1e2 │ │ + b.n af1f2 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr4, [r1, #4] │ │ - b.n af192 │ │ + b.n af1a2 │ │ movs r0, #8 │ │ - b.n ae810 │ │ + b.n ae820 │ │ asrs r4, r1, #32 │ │ - b.n af174 │ │ + b.n af184 │ │ movs r0, #8 │ │ - b.n ae7f6 │ │ + b.n ae806 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr0, [r0, #48] @ 0x30 │ │ - b.n af17e │ │ + b.n af18e │ │ @ instruction: 0xfff71aff │ │ lsls r0, r2, #3 │ │ and.w r2, r0, r0, lsr #1 │ │ - b.n ae83a │ │ + b.n ae84a │ │ lsls r6, r0, #4 │ │ - b.n af3ee │ │ + b.n af3fe │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ movs r5, r0 │ │ - b.n aefb6 │ │ + b.n aefc6 │ │ movs r0, r1 │ │ ldrh r0, [r0, #16] │ │ asrs r1, r0, #32 │ │ - b.n af45e │ │ + b.n af46e │ │ movs r0, #0 │ │ - b.n af062 │ │ + b.n af072 │ │ adds r1, #2 │ │ - b.n aec4e │ │ + b.n aec5e │ │ movs r0, #1 │ │ - b.n af22e │ │ + b.n af23e │ │ movs r5, r0 │ │ - b.n aefd2 │ │ + b.n aefe2 │ │ adds r1, #0 │ │ - b.n aec3a │ │ + b.n aec4a │ │ adds r0, #3 │ │ - b.n af0b8 │ │ + b.n af0c8 │ │ movs r0, r0 │ │ - b.n aee40 │ │ + b.n aee50 │ │ @ instruction: 0xfff89aff │ │ movs r1, r0 │ │ - b.n af1c2 │ │ + b.n af1d2 │ │ movs r0, r0 │ │ - b.n ae84e │ │ + b.n ae85e │ │ lsls r2, r0, #4 │ │ - b.n af50a │ │ + b.n af51a │ │ lsls r0, r2, #9 │ │ - b.n ae85e │ │ + b.n ae86e │ │ str r0, [r0, r0] │ │ - b.n ae87a │ │ + b.n ae88a │ │ movs r0, r0 │ │ - b.n af400 │ │ + b.n af410 │ │ mcr2 10, 1, r0, cr15, cr15, {7} @ │ │ movs r4, r0 │ │ - b.n af09e │ │ + b.n af0ae │ │ asrs r0, r5, #32 │ │ - b.n ae892 │ │ + b.n ae8a2 │ │ movs r0, #4 │ │ - b.n ae8c6 │ │ + b.n ae8d6 │ │ lsls r1, r0, #2 │ │ - b.n af00e │ │ + b.n af01e │ │ lsls r4, r7, #8 │ │ subs r2, #0 │ │ adds r0, #1 │ │ - b.n af1fc │ │ + b.n af20c │ │ movs r0, #129 @ 0x81 │ │ - b.n af0b6 │ │ + b.n af0c6 │ │ asrs r0, r0, #32 │ │ - b.n af4ba │ │ + b.n af4ca │ │ movs r1, r0 │ │ - b.n af024 │ │ + b.n af034 │ │ lsls r0, r6, #8 │ │ lsrs r0, r0, #8 │ │ strb r1, [r0, #4] │ │ - b.n aee8e │ │ + b.n aee9e │ │ asrs r1, r0, #32 │ │ - b.n af28c │ │ + b.n af29c │ │ strb r0, [r1, #0] │ │ - b.n ae8bc │ │ + b.n ae8cc │ │ movs r2, r0 │ │ - b.n af040 │ │ + b.n af050 │ │ @ instruction: 0xfff82aff │ │ lsls r3, r5, #8 │ │ - and.w sl, r0, r0, asr #1 │ │ + and.w sl, r0, r0, ror #1 │ │ movs r3, r0 │ │ movs r1, r0 │ │ - b.n af4e2 │ │ + b.n af4f2 │ │ movs r0, #1 │ │ - b.n af4e6 │ │ + b.n af4f6 │ │ asrs r0, r0, #32 │ │ - b.n ae8de │ │ + b.n ae8ee │ │ strh r0, [r0, #2] │ │ - b.n ae8e8 │ │ + b.n ae8f8 │ │ movs r1, r0 │ │ - b.n af052 │ │ + b.n af062 │ │ lsls r4, r4, #2 │ │ ldrh r0, [r0, #16] │ │ asrs r0, r0, #2 │ │ - b.n aeeba │ │ + b.n aeeca │ │ movs r0, #130 @ 0x82 │ │ - b.n aeec2 │ │ + b.n aeed2 │ │ adds r0, #16 │ │ - b.n af502 │ │ + b.n af512 │ │ asrs r1, r0, #4 │ │ - b.n aeecc │ │ + b.n aeedc │ │ movs r1, #2 │ │ - b.n aeed0 │ │ + b.n aeee0 │ │ adds r0, #2 │ │ - b.n aeee2 │ │ + b.n aeef2 │ │ strb r1, [r0, #0] │ │ - b.n aeee6 │ │ + b.n aeef6 │ │ asrs r4, r1, #32 │ │ - b.n af2d8 │ │ + b.n af2e8 │ │ movs r0, #12 │ │ - b.n af2de │ │ + b.n af2ee │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr0, [r3, #4] │ │ - b.n af2e2 │ │ + b.n af2f2 │ │ adds r0, #8 │ │ - b.n ae90c │ │ + b.n ae91c │ │ adds r0, #8 │ │ - b.n ae8f8 │ │ + b.n ae908 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr3, [r7] │ │ - b.n ae926 │ │ + b.n ae936 │ │ movs r3, r0 │ │ - b.n af096 │ │ + b.n af0a6 │ │ @ instruction: 0xfff39aff │ │ lsls r2, r2, #2 │ │ and.w r0, r0, r8, lsl #8 │ │ - b.n ae92c │ │ + b.n ae93c │ │ movs r0, r1 │ │ - b.n ae93e │ │ + b.n ae94e │ │ movs r0, r0 │ │ - b.n af0ae │ │ + b.n af0be │ │ mcrr2 10, 15, r1, ip, cr15 │ │ movs r0, r0 │ │ - b.n af4b6 │ │ + b.n af4c6 │ │ lsls r1, r7, #7 │ │ lsrs r0, r0, #8 │ │ lsls r0, r1, #1 │ │ - b.n ae952 │ │ + b.n ae962 │ │ asrs r0, r0, #32 │ │ - b.n ae93e │ │ + b.n ae94e │ │ movs r0, r0 │ │ - b.n af562 │ │ + b.n af572 │ │ movs r1, r1 │ │ and.w r0, r0, r0 │ │ - b.n af4cc │ │ + b.n af4dc │ │ movs r0, r4 │ │ lsrs r0, r0, #8 │ │ subs r7, #49 @ 0x31 │ │ - b.n aec30 │ │ + b.n aec40 │ │ subs r7, #19 │ │ - b.n af114 │ │ + b.n af124 │ │ movs r3, r0 │ │ - b.n aef3a │ │ + b.n aef4a │ │ asrs r1, r6, #12 │ │ - b.n af17e │ │ + b.n af18e │ │ movs r1, r0 │ │ - b.n af2c2 │ │ + b.n af2d2 │ │ movs r1, r0 │ │ - b.n af346 │ │ + b.n af356 │ │ movs r2, r0 │ │ - b.n af0ea │ │ + b.n af0fa │ │ lsls r3, r5, #7 │ │ cmp r2, #0 │ │ movs r1, r0 │ │ - b.n af474 │ │ + b.n af484 │ │ @ instruction: 0xfff30aff │ │ adds r0, #76 @ 0x4c │ │ - b.n ae992 │ │ + b.n ae9a2 │ │ asrs r1, r4, #2 │ │ - b.n af19e │ │ + b.n af1ae │ │ adds r0, #0 │ │ - b.n aee08 │ │ + b.n aee18 │ │ movs r4, r0 │ │ - b.n af48c │ │ + b.n af49c │ │ @ instruction: 0xfff50aff │ │ movs r0, #68 @ 0x44 │ │ - b.n ae9a6 │ │ + b.n ae9b6 │ │ adds r0, #128 @ 0x80 │ │ - b.n aef72 │ │ + b.n aef82 │ │ strb r4, [r0, #1] │ │ - b.n ae9a0 │ │ + b.n ae9b0 │ │ movs r2, #3 │ │ - b.n aef7e │ │ + b.n aef8e │ │ lsrs r5, r1, #10 │ │ orn sl, r2, #288768 @ 0x46800 │ │ orn sl, r2, #18304 @ 0x4780 │ │ orn r2, r2, #536576 @ 0x83000 │ │ - b.n aef98 │ │ + b.n aefa8 │ │ lsrs r5, r1, #10 │ │ orr.w sl, r2, #288768 @ 0x46800 │ │ orr.w sl, r2, #18304 @ 0x4780 │ │ orr.w r0, r2, #835584 @ 0xcc000 │ │ - b.n ae9d2 │ │ + b.n ae9e2 │ │ adds r0, #76 @ 0x4c │ │ - b.n ae9c8 │ │ + b.n ae9d8 │ │ movs r0, #0 │ │ - b.n aee46 │ │ + b.n aee56 │ │ movs r0, #4 │ │ - b.n af5aa │ │ + b.n af5ba │ │ movs r0, #0 │ │ - b.n aee30 │ │ + b.n aee40 │ │ movs r0, #8 │ │ - b.n ae9e6 │ │ + b.n ae9f6 │ │ @ instruction: 0xffe3eaff │ │ movs r1, r0 │ │ - b.n af336 │ │ + b.n af346 │ │ asrs r0, r1, #1 │ │ - b.n ae9f2 │ │ + b.n aea02 │ │ movs r7, r3 │ │ - b.n af5be │ │ + b.n af5ce │ │ adds r0, #1 │ │ - b.n af3c2 │ │ + b.n af3d2 │ │ asrs r3, r4, #6 │ │ - b.n aede8 │ │ + b.n aedf8 │ │ movs r0, r0 │ │ - b.n af56c │ │ + b.n af57c │ │ movs r0, r4 │ │ lsls r0, r0, #10 │ │ @ instruction: 0xffdbeaff │ │ - b.n aef0c │ │ - b.n af3ea │ │ + b.n aef1c │ │ + b.n af3fa │ │ str r0, [sp, #64] @ 0x40 │ │ - b.n af3e4 │ │ + b.n af3f4 │ │ stmia r0!, {} │ │ - b.n af61e │ │ + b.n af62e │ │ movs r1, r1 │ │ and.w r0, r0, r0 │ │ movs r0, r0 │ │ movs r1, r0 │ │ movs r0, r0 │ │ movs r2, r0 │ │ movs r0, r0 │ │ movs r3, r0 │ │ movs r0, r0 │ │ movs r0, #1 │ │ - b.n af37a │ │ + b.n af38a │ │ movs r0, r0 │ │ - b.n af5a2 │ │ + b.n af5b2 │ │ asrs r4, r0, #32 │ │ - b.n af23e │ │ + b.n af24e │ │ asrs r1, r0, #32 │ │ asrs r0, r0, #12 │ │ movs r0, r0 │ │ asrs r2, r2, #13 │ │ vpmin.u32 q8, q14, │ │ movs r2, r0 │ │ - b.n af1ae │ │ + b.n af1be │ │ movs r4, r3 │ │ ldr r2, [sp, #0] │ │ str r4, [r7, #0] │ │ - b.n aea50 │ │ + b.n aea60 │ │ adds r0, #130 @ 0x82 │ │ - b.n af01e │ │ + b.n af02e │ │ asrs r6, r0, #32 │ │ - b.n af25e │ │ + b.n af26e │ │ adds r1, #3 │ │ - b.n aee84 │ │ + b.n aee94 │ │ movs r0, r0 │ │ - b.n af5cc │ │ + b.n af5dc │ │ @ instruction: 0xfff10aff │ │ str r0, [r0, r2] │ │ - b.n af02e │ │ + b.n af03e │ │ adds r0, #4 │ │ - b.n aea54 │ │ + b.n aea64 │ │ movs r1, r0 │ │ - b.n af3b6 │ │ + b.n af3c6 │ │ str r5, [r0, #16] │ │ - b.n af046 │ │ + b.n af056 │ │ str r4, [r0, r2] │ │ - b.n af046 │ │ + b.n af056 │ │ str r5, [r0, r4] │ │ - b.n af054 │ │ + b.n af064 │ │ strb r4, [r0, #0] │ │ - b.n aea70 │ │ + b.n aea80 │ │ movs r7, r0 │ │ - b.n af1f0 │ │ + b.n af200 │ │ movs r6, r0 │ │ ldr r2, [sp, #0] │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr2, [r1, #4] │ │ - b.n af3da │ │ + b.n af3ea │ │ asrs r0, r1, #32 │ │ - b.n aea7c │ │ + b.n aea8c │ │ asrs r0, r1, #32 │ │ - b.n aea6a │ │ + b.n aea7a │ │ lsrs r0, r0, #12 │ │ stcl 0, cr5, [r6, #192] @ 0xc0 │ │ - b.n aeaa0 │ │ + b.n aeab0 │ │ @ instruction: 0xffe2eaff │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr4, [r5, #4] │ │ - b.n af3fa │ │ + b.n af40a │ │ asrs r0, r1, #32 │ │ - b.n aeaa0 │ │ + b.n aeab0 │ │ asrs r0, r1, #32 │ │ - b.n aea86 │ │ + b.n aea96 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr5, [r6, #192] @ 0xc0 │ │ - b.n aeabc │ │ + b.n aeacc │ │ @ instruction: 0xffdbeaff │ │ str r1, [r0, r0] │ │ - b.n af6ca │ │ + b.n af6da │ │ asrs r6, r1, #32 │ │ - b.n af2ce │ │ + b.n af2de │ │ str r1, [r0, #0] │ │ - b.n af6d2 │ │ + b.n af6e2 │ │ movs r4, r0 │ │ and.w r0, r0, r1, lsl #24 │ │ - b.n af4a6 │ │ + b.n af4b6 │ │ str r1, [r0, r0] │ │ - b.n af4a8 │ │ + b.n af4b8 │ │ asrs r4, r1, #32 │ │ - b.n af4a4 │ │ + b.n af4b4 │ │ movs r2, r0 │ │ - b.n af250 │ │ + b.n af260 │ │ movs r6, r1 │ │ ldrh r0, [r0, #16] │ │ adds r0, #0 │ │ - b.n aead0 │ │ + b.n aeae0 │ │ movs r0, r0 │ │ - b.n af658 │ │ + b.n af668 │ │ @ instruction: 0xfff80aff │ │ movs r6, r0 │ │ - b.n af264 │ │ + b.n af274 │ │ @ instruction: 0xfff50aff │ │ adds r0, #134 @ 0x86 │ │ - b.n af0ce │ │ + b.n af0de │ │ strb r4, [r7, #0] │ │ - b.n aeb00 │ │ + b.n aeb10 │ │ strh r0, [r1, #0] │ │ - b.n aeaec │ │ + b.n aeafc │ │ adds r1, #3 │ │ - b.n af0dc │ │ + b.n af0ec │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr8, [r1, #32] │ │ - b.n aeadc │ │ + b.n aeaec │ │ strh r0, [r0, #2] │ │ - b.n aeb14 │ │ + b.n aeb24 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr12, [r3] │ │ - b.n aeae4 │ │ + b.n aeaf4 │ │ @ instruction: 0xffebeaff │ │ str r0, [r6, r0] │ │ - b.n aeb24 │ │ + b.n aeb34 │ │ movs r0, #1 │ │ - b.n af49a │ │ + b.n af4aa │ │ @ instruction: 0xffc51aff │ │ - b.n af07c │ │ - b.n aeb30 │ │ + b.n af08c │ │ + b.n aeb40 │ │ vpmin.u q7, , │ │ - add r0, pc, #824 @ (adr r0, af334 ) │ │ - vsra.u64 , , #11 │ │ - vceq.f16 , , #0 │ │ + add r1, pc, #64 @ (adr r1, af04c ) │ │ + vclt.s16 d27, d10, #0 │ │ + vqshlu.s32 d27, d24, #21 │ │ vcge.s16 d18, d1, #0 │ │ - b.n af10c │ │ + b.n af11c │ │ lsls r0, r0, #2 │ │ - b.n af10e │ │ + b.n af11e │ │ strh r0, [r0, #2] │ │ - b.n aeb4c │ │ + b.n aeb5c │ │ movs r1, #2 │ │ - b.n af120 │ │ + b.n af130 │ │ lsls r0, r0, #4 │ │ - b.n af12e │ │ + b.n af13e │ │ movs r0, #16 │ │ - b.n af522 │ │ + b.n af532 │ │ movs r0, r2 │ │ - b.n af522 │ │ + b.n af532 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr1, [r2, #4] │ │ - b.n af52c │ │ + b.n af53c │ │ adds r0, #8 │ │ - b.n aeb52 │ │ + b.n aeb62 │ │ movs r0, #12 │ │ - b.n af536 │ │ + b.n af546 │ │ adds r0, #8 │ │ - b.n aeb36 │ │ + b.n aeb46 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr0, [r0, #48] @ 0x30 │ │ - b.n af53e │ │ + b.n af54e │ │ adds r0, #4 │ │ - b.n aeb6c │ │ + b.n aeb7c │ │ movs r3, r0 │ │ - b.n af2e8 │ │ + b.n af2f8 │ │ @ instruction: 0xfff59aff │ │ lsls r0, r2, #3 │ │ - b.n af3e2 │ │ + b.n af3f2 │ │ movs r2, #60 @ 0x3c │ │ - b.n aeb82 │ │ + b.n aeb92 │ │ movs r0, r0 │ │ - b.n af0d8 │ │ + b.n af0e8 │ │ asrs r4, r7, #32 │ │ - b.n aeb94 │ │ + b.n aeba4 │ │ movs r2, r0 │ │ - b.n af15e │ │ + b.n af16e │ │ lsls r4, r7, #8 │ │ - b.n aeb72 │ │ + b.n aeb82 │ │ movs r0, r0 │ │ - b.n aeb9a │ │ + b.n aebaa │ │ movs r0, #0 │ │ - b.n af82a │ │ + b.n af83a │ │ movs r4, r0 │ │ - b.n aeb82 │ │ + b.n aeb92 │ │ subs r2, #20 │ │ - b.n aebb0 │ │ + b.n aebc0 │ │ lsls r0, r0, #2 │ │ - b.n af176 │ │ + b.n af186 │ │ adds r0, #3 │ │ - b.n af198 │ │ + b.n af1a8 │ │ lsls r0, r0, #4 │ │ - b.n af180 │ │ + b.n af190 │ │ asrs r1, r0, #32 │ │ - b.n af7c2 │ │ + b.n af7d2 │ │ adds r0, #12 │ │ - b.n aeb86 │ │ + b.n aeb96 │ │ movs r0, #16 │ │ - b.n aeb8a │ │ + b.n aeb9a │ │ asrs r4, r2, #32 │ │ - b.n aeb8e │ │ + b.n aeb9e │ │ lsls r0, r7, #8 │ │ - b.n aebce │ │ + b.n aebde │ │ lsls r0, r7, #8 │ │ - b.n aeba6 │ │ + b.n aebb6 │ │ movs r0, r0 │ │ - b.n af7da │ │ + b.n af7ea │ │ asrs r4, r0, #32 │ │ - b.n aebd2 │ │ + b.n aebe2 │ │ movs r0, r1 │ │ - b.n aebb6 │ │ + b.n aebc6 │ │ movs r0, r0 │ │ - b.n af748 │ │ + b.n af758 │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ asrs r1, r0, #32 │ │ - b.n af5b0 │ │ + b.n af5c0 │ │ movs r0, #36 @ 0x24 │ │ - b.n af5c6 │ │ + b.n af5d6 │ │ movs r2, r0 │ │ - b.n af758 │ │ + b.n af768 │ │ asrs r2, r0, #32 │ │ str r3, [sp, #640] @ 0x280 │ │ asrs r1, r0, #32 │ │ - b.n af540 │ │ + b.n af550 │ │ adds r0, #12 │ │ - b.n ae9e6 │ │ + b.n ae9f6 │ │ asrs r1, r0, #32 │ │ - b.n af568 │ │ + b.n af578 │ │ movs r0, r0 │ │ - b.n af1d0 │ │ + b.n af1e0 │ │ @ instruction: 0xfffb1aff │ │ movs r0, r1 │ │ - b.n aebe6 │ │ + b.n aebf6 │ │ lsls r0, r0, #9 │ │ - b.n aec12 │ │ + b.n aec22 │ │ movs r0, r0 │ │ - b.n af77a │ │ + b.n af78a │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ - add r5, pc, #732 @ (adr r5, af3bc ) │ │ + add r5, pc, #732 @ (adr r5, af3cc ) │ │ @ instruction: 0xeb00e044 │ │ - b.n aec20 │ │ + b.n aec30 │ │ movs r0, r0 │ │ - b.n af82a │ │ + b.n af83a │ │ lsls r0, r0, #9 │ │ - b.n aec0a │ │ + b.n aec1a │ │ asrs r4, r2, #9 │ │ - b.n aec2e │ │ + b.n aec3e │ │ movs r0, r0 │ │ - b.n af798 │ │ + b.n af7a8 │ │ movs r2, r6 │ │ lsrs r0, r0, #8 │ │ - add r2, pc, #336 @ (adr r2, af24c ) │ │ - b.n aec2e │ │ + add r2, pc, #336 @ (adr r2, af25c ) │ │ + b.n aec3e │ │ movs r0, r0 │ │ - b.n af7b6 │ │ + b.n af7c6 │ │ movs r7, r2 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, #0] │ │ - b.n aec2c │ │ + b.n aec3c │ │ movs r0, r0 │ │ - b.n af7ba │ │ + b.n af7ca │ │ lsls r1, r2, #9 │ │ lsrs r0, r0, #8 │ │ movs r0, #0 │ │ - b.n aec4a │ │ + b.n aec5a │ │ str r0, [sp, #24] │ │ - b.n af21e │ │ + b.n af22e │ │ movs r5, r2 │ │ - b.n af7d0 │ │ + b.n af7e0 │ │ movs r4, r2 │ │ cmp r2, #0 │ │ adds r0, #0 │ │ - b.n af8e6 │ │ + b.n af8f6 │ │ str r2, [r1, r0] │ │ - b.n af46a │ │ + b.n af47a │ │ adds r1, #2 │ │ - b.n aee38 │ │ + b.n aee48 │ │ movs r1, #6 │ │ - b.n af234 │ │ + b.n af244 │ │ adds r1, #9 │ │ - b.n af24a │ │ + b.n af25a │ │ str r2, [r0, #0] │ │ - b.n af47a │ │ + b.n af48a │ │ movs r5, r0 │ │ - b.n af47e │ │ + b.n af48e │ │ ands r4, r0 │ │ - b.n ae96e │ │ + b.n ae97e │ │ strb r4, [r0, #0] │ │ - b.n ae966 │ │ + b.n ae976 │ │ movs r7, r0 │ │ - b.n af3f2 │ │ + b.n af402 │ │ strb r4, [r0, #0] │ │ adds r1, #160 @ 0xa0 │ │ str r0, [r0, r0] │ │ strh r0, [r4, #12] │ │ strb r4, [r0, #0] │ │ - b.n ae95c │ │ + b.n ae96c │ │ movs r0, #6 │ │ str r1, [sp, #640] @ 0x280 │ │ movs r1, r0 │ │ - b.n af402 │ │ + b.n af412 │ │ @ instruction: 0xfff48aff │ │ movs r0, r2 │ │ and.w r2, r0, r4, lsr #5 │ │ - b.n aec7a │ │ + b.n aec8a │ │ lsls r0, r2, #9 │ │ - b.n aecaa │ │ + b.n aecba │ │ lsls r0, r2, #9 │ │ - b.n aec82 │ │ + b.n aec92 │ │ movs r6, r2 │ │ and.w r0, r0, r0 │ │ - b.n af81e │ │ + b.n af82e │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ ands r1, r0 │ │ - b.n af4c2 │ │ + b.n af4d2 │ │ lsls r2, r0, #4 │ │ - b.n af0ba │ │ + b.n af0ca │ │ adds r0, #4 │ │ - b.n aecf2 │ │ + b.n aed02 │ │ movs r3, r0 │ │ - b.n af42e │ │ + b.n af43e │ │ lsls r7, r3, #4 │ │ ldr r2, [sp, #0] │ │ lsls r2, r0, #4 │ │ - b.n af2aa │ │ + b.n af2ba │ │ asrs r4, r0, #32 │ │ - b.n af69c │ │ + b.n af6ac │ │ movs r4, r0 │ │ - b.n af69e │ │ + b.n af6ae │ │ movs r1, #6 │ │ - b.n af4e2 │ │ - ldr r0, [sp, #288] @ 0x120 │ │ - @ instruction: 0xfb00e044 │ │ - b.n aece4 │ │ + b.n af4f2 │ │ + str r6, [sp, #644] @ 0x284 │ │ + @ instruction: 0xfa00e044 │ │ + b.n aecf4 │ │ str r0, [sp, #0] │ │ - b.n aecc2 │ │ + b.n aecd2 │ │ asrs r4, r2, #9 │ │ - b.n aecee │ │ + b.n aecfe │ │ strh r0, [r0, #2] │ │ - b.n aecf0 │ │ + b.n aed00 │ │ movs r0, r0 │ │ - b.n af85c │ │ + b.n af86c │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n af644 │ │ - add r5, pc, #504 @ (adr r5, af3bc ) │ │ + b.n af654 │ │ + add r5, pc, #504 @ (adr r5, af3cc ) │ │ add.w r2, r0, r4, lsr #5 │ │ - b.n aecfa │ │ + b.n aed0a │ │ movs r0, r0 │ │ - b.n af870 │ │ + b.n af880 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n aecf8 │ │ + b.n aed08 │ │ movs r4, r0 │ │ - b.n aed0a │ │ + b.n aed1a │ │ movs r0, r0 │ │ - b.n af880 │ │ + b.n af890 │ │ movs r0, r1 │ │ asrs r0, r0, #14 │ │ movs r3, r0 │ │ - and.w r6, r0, r4 │ │ + and.w r6, r0, r4, lsr #32 │ │ movs r3, r0 │ │ - lsls r0, r6, #17 │ │ + lsls r0, r0, #18 │ │ movs r3, r0 │ │ - movs r6, #15 │ │ + movs r5, #255 @ 0xff │ │ vcvta.s16.f16 d16, d4 │ │ - b.n aed26 │ │ + b.n aed36 │ │ asrs r4, r1, #32 │ │ - b.n aed34 │ │ + b.n aed44 │ │ movs r0, r2 │ │ - b.n af67e │ │ + b.n af68e │ │ strb r0, [r0, #0] │ │ - b.n af942 │ │ - add r0, pc, #64 @ (adr r0, af244 ) │ │ - b.n aed40 │ │ + b.n af952 │ │ + add r0, pc, #64 @ (adr r0, af254 ) │ │ + b.n aed50 │ │ strh r4, [r0, #8] │ │ - b.n aed0c │ │ + b.n aed1c │ │ movs r4, r0 │ │ - b.n aed1e │ │ + b.n aed2e │ │ movs r0, r1 │ │ - b.n af552 │ │ + b.n af562 │ │ strb r4, [r2, #0] │ │ - b.n aed26 │ │ + b.n aed36 │ │ cmp r4, #23 │ │ add.w r0, r0, r4, lsl #1 │ │ - b.n aed58 │ │ - add r5, pc, #412 @ (adr r5, af3bc ) │ │ + b.n aed68 │ │ + add r5, pc, #412 @ (adr r5, af3cc ) │ │ add.w r0, r0, r0 │ │ - b.n af8da │ │ + b.n af8ea │ │ lsls r5, r5, #3 │ │ lsrs r0, r0, #8 │ │ movs r4, r5 │ │ - b.n aed68 │ │ + b.n aed78 │ │ ldr r2, [r1, #12] │ │ - b.n af842 │ │ + b.n af852 │ │ asrs r0, r1, #1 │ │ - b.n aed70 │ │ + b.n aed80 │ │ ldmia r3, {r1, r3, r4, r7} │ │ - b.n af840 │ │ + b.n af850 │ │ movs r0, #76 @ 0x4c │ │ - b.n aed78 │ │ + b.n aed88 │ │ ldr r7, [r7, #28] │ │ - b.n af8da │ │ + b.n af8ea │ │ lsrs r0, r2 │ │ - b.n af5c6 │ │ + b.n af5d6 │ │ strb r4, [r0, #1] │ │ - b.n aed64 │ │ + b.n aed74 │ │ strb r2, [r1, #0] │ │ - b.n af58e │ │ + b.n af59e │ │ movs r4, r0 │ │ - b.n af2f4 │ │ - add r0, pc, #0 @ (adr r0, af254 ) │ │ - b.n af996 │ │ + b.n af304 │ │ + add r0, pc, #0 @ (adr r0, af264 ) │ │ + b.n af9a6 │ │ movs r5, r0 │ │ - b.n af3fe │ │ + b.n af40e │ │ movs r0, r0 │ │ - b.n af99e │ │ + b.n af9ae │ │ movs r2, r2 │ │ cmp r2, #0 │ │ lsrs r4, r4, #32 │ │ - b.n aeda4 │ │ + b.n aedb4 │ │ movs r0, r0 │ │ - b.n af388 │ │ + b.n af398 │ │ adds r0, #8 │ │ - b.n aee0e │ │ + b.n aee1e │ │ movs r1, r0 │ │ - b.n af31a │ │ + b.n af32a │ │ asrs r2, r0, #32 │ │ - b.n af400 │ │ + b.n af410 │ │ movs r0, r0 │ │ - b.n af920 │ │ + b.n af930 │ │ movs r0, #3 │ │ - b.n af5be │ │ + b.n af5ce │ │ adds r0, #6 │ │ asrs r0, r4, #6 │ │ movs r0, #12 │ │ asrs r0, r4, #6 │ │ adds r0, #0 │ │ - b.n af330 │ │ + b.n af340 │ │ movs r0, #1 │ │ - b.n af432 │ │ + b.n af442 │ │ lsls r3, r1, #7 │ │ subs r2, #0 │ │ asrs r1, r0, #14 │ │ - b.n af5d6 │ │ + b.n af5e6 │ │ cmp r5, #101 @ 0x65 │ │ - b.n af8b2 │ │ + b.n af8c2 │ │ adds r0, r4, #2 │ │ - b.n af5a0 │ │ + b.n af5b0 │ │ lsls r0, r0, #14 │ │ - b.n af5e2 │ │ + b.n af5f2 │ │ movs r0, #29 │ │ - b.n af926 │ │ + b.n af936 │ │ adds r0, #0 │ │ - b.n af9ea │ │ - ldr r0, [sp, #288] @ 0x120 │ │ + b.n af9fa │ │ + ldr r0, [sp, #284] @ 0x11c │ │ @ instruction: 0xfa001048 │ │ - b.n af7cc │ │ + b.n af7dc │ │ movs r0, r0 │ │ - b.n aedc4 │ │ + b.n aedd4 │ │ str r0, [r6, #0] │ │ - b.n af7bc │ │ + b.n af7cc │ │ asrs r0, r3, #32 │ │ - b.n aedf8 │ │ + b.n aee08 │ │ strh r0, [r2, #6] │ │ - b.n af644 │ │ + b.n af654 │ │ movs r0, r1 │ │ - b.n af36e │ │ + b.n af37e │ │ movs r1, r1 │ │ - b.n af474 │ │ + b.n af484 │ │ movs r6, r2 │ │ cmp r2, #0 │ │ lsls r4, r7, #30 │ │ - b.n aee10 │ │ + b.n aee20 │ │ movs r0, r0 │ │ - b.n af3f4 │ │ + b.n af404 │ │ movs r0, #8 │ │ - b.n aee7a │ │ + b.n aee8a │ │ movs r4, r0 │ │ - b.n af38e │ │ + b.n af39e │ │ asrs r5, r0, #32 │ │ - b.n af474 │ │ + b.n af484 │ │ ldrh r2, [r3, r6] │ │ - b.n af8ec │ │ + b.n af8fc │ │ movs r0, r0 │ │ - b.n af98e │ │ + b.n af99e │ │ adds r0, #2 │ │ - b.n af62e │ │ + b.n af63e │ │ adds r0, #5 │ │ asrs r0, r4, #6 │ │ ldr r2, [r1, r3] │ │ - b.n af906 │ │ + b.n af916 │ │ ldr r7, [r7, r7] │ │ - b.n af992 │ │ + b.n af9a2 │ │ movs r0, #5 │ │ asrs r0, r4, #6 │ │ movs r0, #0 │ │ - b.n af3a6 │ │ + b.n af3b6 │ │ movs r0, #1 │ │ - b.n af4ac │ │ + b.n af4bc │ │ lsls r7, r5, #6 │ │ subs r2, #0 │ │ asrs r1, r0, #14 │ │ - b.n af64e │ │ + b.n af65e │ │ cmp r5, #101 @ 0x65 │ │ - b.n af92a │ │ + b.n af93a │ │ adds r0, r4, #2 │ │ - b.n af618 │ │ + b.n af628 │ │ lsls r0, r0, #14 │ │ - b.n af65a │ │ + b.n af66a │ │ movs r0, #29 │ │ - b.n af99e │ │ + b.n af9ae │ │ adds r0, #0 │ │ - b.n afa62 │ │ - ldr r0, [sp, #168] @ 0xa8 │ │ + b.n afa72 │ │ + ldr r0, [sp, #164] @ 0xa4 │ │ @ instruction: 0xfa00a000 │ │ - b.n af66a │ │ - add r0, pc, #16 @ (adr r0, af33c ) │ │ - b.n aee3c │ │ - add r0, pc, #28 @ (adr r0, af34c ) │ │ - b.n af672 │ │ + b.n af67a │ │ + add r0, pc, #16 @ (adr r0, af34c ) │ │ + b.n aee4c │ │ + add r0, pc, #28 @ (adr r0, af35c ) │ │ + b.n af682 │ │ movs r0, #208 @ 0xd0 │ │ - b.n af6c2 │ │ + b.n af6d2 │ │ str r0, [r0, #0] │ │ - b.n afa7a │ │ + b.n afa8a │ │ strb r4, [r2, #29] │ │ - b.n aee7c │ │ + b.n aee8c │ │ movs r3, r0 │ │ - b.n af666 │ │ + b.n af676 │ │ strb r7, [r0, #0] │ │ - b.n af464 │ │ + b.n af474 │ │ movs r0, r0 │ │ - b.n afa8a │ │ + b.n afa9a │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ movs r0, r1 │ │ - b.n aef00 │ │ + b.n aef10 │ │ ldrh r2, [r3, r6] │ │ - b.n af95c │ │ + b.n af96c │ │ movs r0, r0 │ │ - b.n af9fa │ │ + b.n afa0a │ │ asrs r0, r0, #32 │ │ - b.n af69e │ │ + b.n af6ae │ │ asrs r5, r0, #32 │ │ asrs r0, r4, #6 │ │ ldr r2, [r1, r3] │ │ - b.n af976 │ │ + b.n af986 │ │ ldr r7, [r7, r7] │ │ - b.n afa02 │ │ + b.n afa12 │ │ movs r5, r0 │ │ asrs r0, r4, #6 │ │ movs r2, r0 │ │ - b.n af412 │ │ + b.n af422 │ │ movs r3, r0 │ │ - b.n af518 │ │ + b.n af528 │ │ lsls r7, r0, #6 │ │ subs r2, #0 │ │ lsls r3, r0, #14 │ │ - b.n af6be │ │ + b.n af6ce │ │ adds r2, r4, #2 │ │ - b.n af682 │ │ + b.n af692 │ │ lsls r2, r0, #14 │ │ - b.n af6c6 │ │ + b.n af6d6 │ │ cmp r5, #101 @ 0x65 │ │ - b.n af9a2 │ │ + b.n af9b2 │ │ movs r0, #29 │ │ - b.n afa0e │ │ + b.n afa1e │ │ adds r0, #0 │ │ - b.n afad2 │ │ - ldr r0, [sp, #56] @ 0x38 │ │ + b.n afae2 │ │ + ldr r0, [sp, #52] @ 0x34 │ │ @ instruction: 0xfa00101c │ │ - b.n aeed4 │ │ + b.n aeee4 │ │ movs r4, r3 │ │ - b.n aeeb2 │ │ + b.n aeec2 │ │ lsrs r0, r2 │ │ - b.n af724 │ │ + b.n af734 │ │ movs r4, r0 │ │ - b.n af456 │ │ + b.n af466 │ │ movs r5, r0 │ │ - b.n af55c │ │ + b.n af56c │ │ movs r4, r2 │ │ cmp r2, #0 │ │ movs r0, #8 │ │ - b.n aef60 │ │ + b.n aef70 │ │ movs r0, r1 │ │ - b.n af45e │ │ + b.n af46e │ │ asrs r1, r1, #32 │ │ - b.n af544 │ │ + b.n af554 │ │ ldr r2, [r3, #56] @ 0x38 │ │ - b.n af9c4 │ │ + b.n af9d4 │ │ movs r0, r0 │ │ - b.n afa66 │ │ + b.n afa76 │ │ adds r0, #2 │ │ - b.n af706 │ │ + b.n af716 │ │ adds r0, #6 │ │ asrs r0, r4, #6 │ │ ldr r2, [r1, #12] │ │ - b.n af9de │ │ + b.n af9ee │ │ ldr r7, [r7, #28] │ │ - b.n afa6a │ │ + b.n afa7a │ │ movs r0, #6 │ │ asrs r0, r4, #6 │ │ movs r0, #0 │ │ - b.n af47e │ │ + b.n af48e │ │ movs r0, #1 │ │ - b.n af584 │ │ + b.n af594 │ │ lsls r3, r7, #5 │ │ subs r2, #0 │ │ asrs r1, r0, #14 │ │ - b.n af726 │ │ + b.n af736 │ │ cmp r5, #101 @ 0x65 │ │ - b.n afa02 │ │ + b.n afa12 │ │ adds r0, r4, #2 │ │ - b.n af6f0 │ │ + b.n af700 │ │ lsls r0, r0, #14 │ │ - b.n af732 │ │ + b.n af742 │ │ movs r0, #29 │ │ - b.n afa76 │ │ + b.n afa86 │ │ adds r0, #0 │ │ - b.n afb3a │ │ - str r7, [sp, #976] @ 0x3d0 │ │ + b.n afb4a │ │ + str r7, [sp, #972] @ 0x3cc │ │ @ instruction: 0xfa006000 │ │ - b.n af742 │ │ + b.n af752 │ │ movs r0, r4 │ │ - b.n aef40 │ │ + b.n aef50 │ │ str r0, [r1, #0] │ │ - b.n aef1e │ │ + b.n aef2e │ │ str r0, [r0, #0] │ │ - b.n afb4e │ │ + b.n afb5e │ │ strh r0, [r2, #6] │ │ - b.n af792 │ │ + b.n af7a2 │ │ movs r0, r1 │ │ - b.n af4be │ │ + b.n af4ce │ │ movs r1, r1 │ │ - b.n af5c4 │ │ + b.n af5d4 │ │ movs r0, r0 │ │ - b.n afb5e │ │ + b.n afb6e │ │ movs r3, r2 │ │ cmp r2, #0 │ │ movs r0, #8 │ │ - b.n aefd4 │ │ + b.n aefe4 │ │ movs r4, r0 │ │ - b.n af4da │ │ + b.n af4ea │ │ asrs r5, r0, #32 │ │ - b.n af5c0 │ │ + b.n af5d0 │ │ ldrh r2, [r3, r6] │ │ - b.n afa38 │ │ + b.n afa48 │ │ movs r0, r0 │ │ - b.n afada │ │ + b.n afaea │ │ adds r0, #2 │ │ - b.n af77a │ │ + b.n af78a │ │ adds r0, #5 │ │ asrs r0, r4, #6 │ │ ldr r2, [r1, r3] │ │ - b.n afa52 │ │ + b.n afa62 │ │ ldr r7, [r7, r7] │ │ - b.n afade │ │ + b.n afaee │ │ movs r0, #5 │ │ asrs r0, r4, #6 │ │ movs r0, #0 │ │ - b.n af4f2 │ │ + b.n af502 │ │ movs r0, #1 │ │ - b.n af5f8 │ │ + b.n af608 │ │ lsls r0, r4, #5 │ │ subs r2, #0 │ │ asrs r1, r0, #14 │ │ - b.n af79a │ │ + b.n af7aa │ │ cmp r5, #101 @ 0x65 │ │ - b.n afa76 │ │ + b.n afa86 │ │ adds r0, r4, #2 │ │ - b.n af764 │ │ + b.n af774 │ │ lsls r0, r0, #14 │ │ - b.n af7a6 │ │ + b.n af7b6 │ │ movs r0, #29 │ │ - b.n afaea │ │ + b.n afafa │ │ adds r0, #0 │ │ - b.n afbae │ │ - str r7, [sp, #860] @ 0x35c │ │ + b.n afbbe │ │ + str r7, [sp, #856] @ 0x358 │ │ @ instruction: 0xfa001024 │ │ - b.n aefb0 │ │ + b.n aefc0 │ │ movs r4, r1 │ │ - b.n aef8e │ │ + b.n aef9e │ │ movs r0, #0 │ │ - b.n aefa0 │ │ + b.n aefb0 │ │ asrs r4, r0, #32 │ │ - b.n aefa4 │ │ + b.n aefb4 │ │ movs r2, r0 │ │ - b.n af536 │ │ + b.n af546 │ │ movs r1, r0 │ │ - b.n af63c │ │ + b.n af64c │ │ movs r4, r2 │ │ cmp r2, #0 │ │ adds r0, #8 │ │ - b.n af040 │ │ + b.n af050 │ │ movs r0, r1 │ │ - b.n af53a │ │ + b.n af54a │ │ asrs r1, r1, #32 │ │ - b.n af61c │ │ + b.n af62c │ │ ldr r2, [r3, #56] @ 0x38 │ │ - b.n afaa4 │ │ + b.n afab4 │ │ movs r0, r0 │ │ - b.n afb48 │ │ + b.n afb58 │ │ movs r0, #3 │ │ - b.n af7e6 │ │ + b.n af7f6 │ │ movs r0, #6 │ │ asrs r0, r4, #6 │ │ ldr r2, [r1, #12] │ │ - b.n afabe │ │ + b.n aface │ │ ldr r7, [r7, #28] │ │ - b.n afb4a │ │ + b.n afb5a │ │ adds r0, #6 │ │ asrs r0, r4, #6 │ │ adds r0, #0 │ │ - b.n af560 │ │ + b.n af570 │ │ movs r0, #1 │ │ - b.n af662 │ │ + b.n af672 │ │ lsls r7, r0, #5 │ │ subs r2, #0 │ │ asrs r1, r0, #14 │ │ - b.n af806 │ │ + b.n af816 │ │ cmp r5, #101 @ 0x65 │ │ - b.n afae2 │ │ + b.n afaf2 │ │ adds r0, r4, #2 │ │ - b.n af7d0 │ │ + b.n af7e0 │ │ lsls r0, r0, #14 │ │ - b.n af812 │ │ + b.n af822 │ │ movs r0, #29 │ │ - b.n afb56 │ │ + b.n afb66 │ │ adds r0, #0 │ │ - b.n afc1a │ │ - str r7, [sp, #752] @ 0x2f0 │ │ + b.n afc2a │ │ + str r7, [sp, #748] @ 0x2ec │ │ @ instruction: 0xfa006000 │ │ - b.n af822 │ │ + b.n af832 │ │ str r0, [r2, #0] │ │ - b.n aeffa │ │ + b.n af00a │ │ asrs r0, r7, #32 │ │ - b.n af980 │ │ + b.n af990 │ │ movs r4, r5 │ │ - b.n af01c │ │ - add r5, pc, #348 @ (adr r5, af64c ) │ │ + b.n af02c │ │ + add r5, pc, #348 @ (adr r5, af65c ) │ │ add.w r0, r0, r0 │ │ - b.n afb96 │ │ + b.n afba6 │ │ lsls r6, r2, #4 │ │ subs r0, r0, r0 │ │ movs r0, r7 │ │ - b.n aef34 │ │ + b.n aef44 │ │ cmp r2, #0 │ │ - b.n afb1a │ │ + b.n afb2a │ │ cmp r3, #154 @ 0x9a │ │ - b.n afb8c │ │ + b.n afb9c │ │ adds r0, #52 @ 0x34 │ │ - b.n aef40 │ │ + b.n aef50 │ │ strb r0, [r1, #0] │ │ - b.n af0bc │ │ + b.n af0cc │ │ ldr r2, [r1, r3] │ │ - b.n afb22 │ │ + b.n afb32 │ │ str r0, [r2, #40] @ 0x28 │ │ - b.n af618 │ │ + b.n af628 │ │ lsrs r0, r0, #31 │ │ - b.n af85a │ │ + b.n af86a │ │ ldr r7, [r7, r7] │ │ - b.n afbb6 │ │ + b.n afbc6 │ │ asrs r0, r2, #10 │ │ - b.n af562 │ │ + b.n af572 │ │ asrs r4, r4, #32 │ │ - b.n af060 │ │ + b.n af070 │ │ strh r3, [r0, #0] │ │ - b.n af656 │ │ + b.n af666 │ │ ldr r2, [r3, #56] @ 0x38 │ │ - b.n afb34 │ │ + b.n afb44 │ │ movs r0, #0 │ │ - b.n af054 │ │ + b.n af064 │ │ asrs r4, r0, #32 │ │ - b.n af058 │ │ - ldr r7, [pc, #780] @ (af844 ) │ │ - b.n af67a │ │ + b.n af068 │ │ + ldr r7, [pc, #780] @ (af854 ) │ │ + b.n af68a │ │ movs r0, r0 │ │ - b.n afbec │ │ + b.n afbfc │ │ str r7, [r0, #0] │ │ lsls r0, r4, #6 │ │ str r7, [r0, r0] │ │ lsls r0, r4, #6 │ │ adds r0, #8 │ │ - b.n af5ee │ │ + b.n af5fe │ │ movs r0, r0 │ │ - b.n afc8e │ │ + b.n afc9e │ │ adds r0, #4 │ │ - b.n af6f4 │ │ + b.n af704 │ │ movs r3, r1 │ │ cmp r2, #0 │ │ movs r2, r0 │ │ - b.n af60a │ │ + b.n af61a │ │ asrs r1, r0, #32 │ │ - b.n af6e6 │ │ + b.n af6f6 │ │ movs r0, #0 │ │ - b.n af60c │ │ + b.n af61c │ │ movs r0, #1 │ │ - b.n af712 │ │ + b.n af722 │ │ lsls r7, r3, #4 │ │ subs r2, #0 │ │ asrs r1, r0, #14 │ │ - b.n af8ae │ │ + b.n af8be │ │ cmp r5, #101 @ 0x65 │ │ - b.n afb8a │ │ + b.n afb9a │ │ adds r0, r4, #2 │ │ - b.n af878 │ │ + b.n af888 │ │ lsls r0, r0, #14 │ │ - b.n af8ba │ │ + b.n af8ca │ │ movs r0, #29 │ │ - b.n afbfe │ │ + b.n afc0e │ │ adds r0, #0 │ │ - b.n afcc2 │ │ - str r7, [sp, #584] @ 0x248 │ │ + b.n afcd2 │ │ + str r7, [sp, #580] @ 0x244 │ │ @ instruction: 0xfa002048 │ │ - b.n af0c4 │ │ + b.n af0d4 │ │ adds r0, #76 @ 0x4c │ │ - b.n af0c8 │ │ + b.n af0d8 │ │ movs r4, r2 │ │ - b.n af0a6 │ │ + b.n af0b6 │ │ movs r2, r0 │ │ - b.n af646 │ │ + b.n af656 │ │ asrs r3, r0, #32 │ │ - b.n af722 │ │ + b.n af732 │ │ strb r0, [r0, #0] │ │ - b.n af648 │ │ + b.n af658 │ │ strb r1, [r0, #0] │ │ - b.n af74e │ │ + b.n af75e │ │ lsls r6, r6, #3 │ │ subs r2, #0 │ │ asrs r1, r0, #14 │ │ - b.n af8ea │ │ + b.n af8fa │ │ movs r0, #2 │ │ - b.n af5fe │ │ + b.n af60e │ │ adds r0, #3 │ │ - b.n af5fa │ │ + b.n af60a │ │ adds r0, r4, #2 │ │ - b.n af8b8 │ │ + b.n af8c8 │ │ ands r3, r0 │ │ - b.n af8de │ │ + b.n af8ee │ │ cmp r5, #101 @ 0x65 │ │ - b.n afbd6 │ │ + b.n afbe6 │ │ lsls r0, r0, #14 │ │ - b.n af902 │ │ + b.n af912 │ │ movs r0, #29 │ │ - b.n afc46 │ │ + b.n afc56 │ │ adds r0, #0 │ │ - b.n afd0a │ │ + b.n afd1a │ │ ands r1, r0 │ │ asrs r0, r0, #12 │ │ - str r7, [sp, #508] @ 0x1fc │ │ + str r7, [sp, #504] @ 0x1f8 │ │ @ instruction: 0xfa000000 │ │ - b.n afc76 │ │ + b.n afc86 │ │ ands r0, r0 │ │ asrs r0, r4, #6 │ │ strb r4, [r0, #1] │ │ - b.n af118 │ │ + b.n af128 │ │ ands r0, r3 │ │ - b.n af0f6 │ │ + b.n af106 │ │ movs r0, r0 │ │ - b.n afd26 │ │ + b.n afd36 │ │ movs r0, r0 │ │ - b.n afc98 │ │ + b.n afca8 │ │ lsls r0, r5, #2 │ │ subs r0, r0, r0 │ │ - beq.n af650 │ │ - b.n afa88 │ │ + beq.n af660 │ │ + b.n afa98 │ │ ldrh r4, [r0, #24] │ │ ldc 0, cr13, [sp], #16 │ │ - b.n afb14 │ │ + b.n afb24 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3} │ │ - b.n af942 │ │ + b.n af952 │ │ asrs r1, r4, #1 │ │ - b.n afd46 │ │ + b.n afd56 │ │ mcrr 11, 15, lr, r1, cr15 │ │ strb r0, [r0, #0] │ │ - b.n af94e │ │ + b.n af95e │ │ vpmin.u8 q7, , │ │ strh r2, [r1, #0] │ │ - b.n af956 │ │ + b.n af966 │ │ lsls r6, r0, #4 │ │ - b.n af53c │ │ + b.n af54c │ │ adds r0, #4 │ │ - b.n af18e │ │ + b.n af19e │ │ movs r3, r0 │ │ - b.n af8c2 │ │ + b.n af8d2 │ │ mrc2 10, 5, r9, cr14, cr15, {7} @ │ │ lsls r6, r0, #4 │ │ - b.n af73a │ │ + b.n af74a │ │ movs r1, #2 │ │ - b.n af96e │ │ + b.n af97e │ │ asrs r0, r1, #32 │ │ - b.n af972 │ │ - str r7, [sp, #400] @ 0x190 │ │ + b.n af982 │ │ + str r6, [sp, #596] @ 0x254 │ │ mla r1, r0, r6, r2 │ │ - b.n af97a │ │ + b.n af98a │ │ movs r0, r1 │ │ - b.n af97e │ │ + b.n af98e │ │ asrs r4, r0, #32 │ │ - b.n af982 │ │ + b.n af992 │ │ mrc2 10, 6, lr, cr6, cr15, {7} @ │ │ asrs r5, r0, #32 │ │ - b.n af98a │ │ + b.n af99a │ │ str r1, [r0, r0] │ │ - b.n af6d8 │ │ + b.n af6e8 │ │ asrs r1, r0, #4 │ │ - b.n af752 │ │ + b.n af762 │ │ str r0, [r0, r0] │ │ - b.n af15e │ │ + b.n af16e │ │ movs r1, #5 │ │ - b.n af99a │ │ - str r7, [sp, #360] @ 0x168 │ │ + b.n af9aa │ │ + str r6, [sp, #556] @ 0x22c │ │ @ instruction: 0xfb00e044 │ │ - b.n af19c │ │ + b.n af1ac │ │ movs r0, r0 │ │ - b.n afd10 │ │ + b.n afd20 │ │ movs r0, r1 │ │ asrs r5, r3, #22 │ │ movs r0, r0 │ │ asrs r0, r2, #22 │ │ movs r0, r0 │ │ asrs r0, r2, #13 │ │ lsls r3, r2, #1 │ │ subs r0, r0, r0 │ │ asrs r0, r6, #32 │ │ - b.n af1b4 │ │ + b.n af1c4 │ │ movs r4, r0 │ │ - b.n af1a0 │ │ + b.n af1b0 │ │ movs r0, r0 │ │ - b.n afd22 │ │ + b.n afd32 │ │ movs r7, r4 │ │ lsrs r0, r0, #8 │ │ asrs r0, r2, #32 │ │ - b.n afb8c │ │ + b.n afb9c │ │ movs r0, #1 │ │ - b.n afdce │ │ + b.n afdde │ │ adds r0, #0 │ │ - b.n af1ba │ │ + b.n af1ca │ │ movs r3, r0 │ │ - b.n af93a │ │ + b.n af94a │ │ movs r2, r4 │ │ ldrh r0, [r0, #16] │ │ strb r2, [r0, #4] │ │ - b.n af5c6 │ │ + b.n af5d6 │ │ movs r1, r0 │ │ - b.n afcd0 │ │ + b.n afce0 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #1 │ │ - b.n afbae │ │ + b.n afbbe │ │ movs r3, r0 │ │ - b.n af952 │ │ + b.n af962 │ │ @ instruction: 0xfff99aff │ │ movs r3, r3 │ │ and.w r0, r0, r0, lsl #14 │ │ - b.n af7ba │ │ + b.n af7ca │ │ str r3, [r0, #16] │ │ - b.n af7c0 │ │ + b.n af7d0 │ │ adds r0, #4 │ │ - b.n af1ee │ │ + b.n af1fe │ │ lsls r7, r4, #2 │ │ - b.n af96c │ │ + b.n af97c │ │ movs r1, r0 │ │ ldr r2, [sp, #0] │ │ movs r1, r0 │ │ - b.n afb4e │ │ + b.n afb5e │ │ movs r2, r2 │ │ and.w r0, r0, r8, lsl #24 │ │ - b.n af202 │ │ + b.n af212 │ │ strb r7, [r4, #2] │ │ - b.n afa1a │ │ + b.n afa2a │ │ adds r0, #3 │ │ - b.n af7ea │ │ + b.n af7fa │ │ movs r7, r0 │ │ - b.n af988 │ │ + b.n af998 │ │ movs r4, r1 │ │ ldr r2, [sp, #0] │ │ adds r2, #80 @ 0x50 │ │ - b.n af21a │ │ + b.n af22a │ │ strb r4, [r2, #9] │ │ - b.n af21e │ │ + b.n af22e │ │ movs r2, r0 │ │ - b.n af998 │ │ + b.n af9a8 │ │ adds r0, #2 │ │ movs r1, #160 @ 0xa0 │ │ adds r2, #80 @ 0x50 │ │ - b.n af20a │ │ + b.n af21a │ │ adds r1, #2 │ │ - b.n af62c │ │ + b.n af63c │ │ adds r0, #1 │ │ - b.n afe08 │ │ + b.n afe18 │ │ adds r1, #2 │ │ - b.n af614 │ │ + b.n af624 │ │ adds r2, #84 @ 0x54 │ │ - b.n af23a │ │ + b.n af24a │ │ strb r0, [r0, #0] │ │ - b.n af234 │ │ + b.n af244 │ │ movs r2, r0 │ │ - b.n af9c0 │ │ + b.n af9d0 │ │ strb r1, [r0, #0] │ │ lsls r7, r0, #9 │ │ strb r0, [r0, #0] │ │ - b.n af220 │ │ + b.n af230 │ │ movs r0, #1 │ │ - b.n afc22 │ │ + b.n afc32 │ │ movs r0, r0 │ │ - b.n afdc2 │ │ + b.n afdd2 │ │ @ instruction: 0xffd91aff │ │ strb r0, [r2, #9] │ │ - b.n af25a │ │ + b.n af26a │ │ lsls r6, r0, #4 │ │ - b.n afe1c │ │ + b.n afe2c │ │ @ instruction: 0xfbb90aff │ │ asrs r4, r2, #9 │ │ - b.n af266 │ │ + b.n af276 │ │ movs r0, #0 │ │ - b.n af25c │ │ + b.n af26c │ │ movs r2, r0 │ │ - b.n af9ec │ │ + b.n af9fc │ │ movs r0, r1 │ │ ldrh r0, [r0, #16] │ │ adds r0, #1 │ │ - b.n afe86 │ │ + b.n afe96 │ │ movs r7, r0 │ │ - b.n afa8a │ │ + b.n afa9a │ │ str r0, [r0, #16] │ │ - b.n af670 │ │ + b.n af680 │ │ movs r1, r0 │ │ - b.n afc52 │ │ + b.n afc62 │ │ movs r2, r0 │ │ - b.n af9f6 │ │ + b.n afa06 │ │ str r7, [r0, #16] │ │ - b.n af65c │ │ + b.n af66c │ │ str r6, [r0, #0] │ │ - b.n afae4 │ │ + b.n afaf4 │ │ strb r7, [r0, #0] │ │ - b.n af86e │ │ + b.n af87e │ │ @ instruction: 0xfff89aff │ │ movs r1, r0 │ │ - b.n afbf8 │ │ + b.n afc08 │ │ movs r0, r0 │ │ - b.n af270 │ │ + b.n af280 │ │ lsls r2, r0, #4 │ │ - b.n aff32 │ │ + b.n aff42 │ │ lsls r0, r2, #9 │ │ - b.n af286 │ │ + b.n af296 │ │ @ instruction: 0xfba7eaff │ │ adds r2, #80 @ 0x50 │ │ - b.n af2ae │ │ + b.n af2be │ │ movs r0, #0 │ │ - b.n afc44 │ │ + b.n afc54 │ │ strb r4, [r2, #9] │ │ - b.n af2b6 │ │ + b.n af2c6 │ │ movs r2, r0 │ │ - b.n afa30 │ │ + b.n afa40 │ │ movs r0, #3 │ │ adds r1, #160 @ 0xa0 │ │ movs r2, #80 @ 0x50 │ │ - b.n af2a2 │ │ + b.n af2b2 │ │ movs r1, #1 │ │ - b.n af5c4 │ │ + b.n af5d4 │ │ movs r0, #1 │ │ - b.n afe9e │ │ + b.n afeae │ │ movs r1, #1 │ │ - b.n af5ac │ │ + b.n af5bc │ │ movs r2, #84 @ 0x54 │ │ - b.n af2d2 │ │ + b.n af2e2 │ │ adds r0, #0 │ │ - b.n af2ca │ │ + b.n af2da │ │ movs r3, r0 │ │ - b.n afa8c │ │ + b.n afa9c │ │ adds r0, #1 │ │ lsls r3, r0, #9 │ │ adds r0, #0 │ │ - b.n af2b6 │ │ + b.n af2c6 │ │ adds r0, #0 │ │ - b.n aff76 │ │ + b.n aff86 │ │ movs r0, #0 │ │ - b.n aff7a │ │ + b.n aff8a │ │ str r1, [r0, r0] │ │ - b.n af864 │ │ + b.n af874 │ │ movs r0, r0 │ │ asrs r2, r2, #2 │ │ @ instruction: 0xffab0aff │ │ asrs r0, r0, #32 │ │ - b.n afc94 │ │ + b.n afca4 │ │ movs r1, #1 │ │ - b.n af5f6 │ │ + b.n af606 │ │ movs r1, r0 │ │ - b.n afdf6 │ │ + b.n afe06 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ asrs r1, r0, #32 │ │ - b.n afcfc │ │ + b.n afd0c │ │ @ instruction: 0xfffa3aff │ │ @ instruction: 0xffa4eaff │ │ adds r0, #8 │ │ - b.n af320 │ │ + b.n af330 │ │ adds r1, #0 │ │ - b.n af710 │ │ + b.n af720 │ │ lsls r2, r4, #2 │ │ - b.n afa94 │ │ + b.n afaa4 │ │ @ instruction: 0xffe10aff │ │ movs r0, #162 @ 0xa2 │ │ - b.n afb36 │ │ + b.n afb46 │ │ movs r3, r0 │ │ - b.n afa9e │ │ + b.n afaae │ │ movs r0, #0 │ │ - b.n aff3e │ │ + b.n aff4e │ │ adds r0, #0 │ │ - b.n aff42 │ │ + b.n aff52 │ │ movs r0, #0 │ │ strh r0, [r4, #30] │ │ adds r0, #0 │ │ str r3, [sp, #896] @ 0x380 │ │ str r1, [r0, r0] │ │ - b.n af8b4 │ │ + b.n af8c4 │ │ movs r0, r0 │ │ asrs r2, r2, #2 │ │ @ instruction: 0xffeb1aff │ │ @ instruction: 0xff96eaff │ │ lsls r0, r4, #9 │ │ - b.n af35c │ │ + b.n af36c │ │ movs r0, #82 @ 0x52 │ │ - b.n aff62 │ │ + b.n aff72 │ │ asrs r4, r3, #9 │ │ - b.n af364 │ │ + b.n af374 │ │ movs r0, r0 │ │ - b.n af948 │ │ + b.n af958 │ │ asrs r1, r0, #32 │ │ - b.n af94c │ │ - add r5, sp, #452 @ 0x1c4 │ │ + b.n af95c │ │ + add r5, sp, #448 @ 0x1c0 │ │ @ instruction: 0xebff4016 │ │ - b.n aff76 │ │ + b.n aff86 │ │ movs r3, r0 │ │ and.w r9, r0, ip, asr #16 │ │ - b.n afe4e │ │ - ldr r7, [pc, #1020] @ (afc3c ) │ │ - b.n afee0 │ │ + b.n afe5e │ │ + ldr r7, [pc, #1020] @ (afc4c ) │ │ + b.n afef0 │ │ movs r0, r0 │ │ and.w r0, r0, r1, lsl #16 │ │ - b.n aff8a │ │ + b.n aff9a │ │ asrs r0, r2, #8 │ │ - b.n af38c │ │ + b.n af39c │ │ asrs r1, r0, #32 │ │ - b.n af970 │ │ + b.n af980 │ │ movs r4, r0 │ │ - b.n afb96 │ │ + b.n afba6 │ │ cmp r6, #22 │ │ - b.n aff9a │ │ + b.n affaa │ │ lsrs r4, r2, #10 │ │ @ instruction: 0xeb00fa3b │ │ @ instruction: 0xeaff0001 │ │ - b.n afe66 │ │ + b.n afe76 │ │ strb r0, [r0, #0] │ │ - b.n b002a │ │ + b.n b003a │ │ movs r2, r0 │ │ - b.n afeee │ │ + b.n afefe │ │ asrs r0, r0, #32 │ │ - b.n af87c │ │ + b.n af88c │ │ movs r0, r0 │ │ - b.n afb18 │ │ + b.n afb28 │ │ lsls r4, r0, #1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r4, #7 │ │ - b.n af3bc │ │ + b.n af3cc │ │ lsls r5, r0, #31 │ │ - b.n afe92 │ │ + b.n afea2 │ │ lsrs r7, r7, #31 │ │ - b.n aff24 │ │ + b.n aff34 │ │ ands r3, r0 │ │ - b.n afd0a │ │ + b.n afd1a │ │ asrs r1, r0, #32 │ │ - b.n af9ac │ │ + b.n af9bc │ │ @ instruction: 0xffefeaff │ │ asrs r0, r0, #8 │ │ - b.n af3d4 │ │ + b.n af3e4 │ │ movs r7, r0 │ │ - b.n afbda │ │ + b.n afbea │ │ movs r1, #174 @ 0xae │ │ - b.n afe9e │ │ + b.n afeae │ │ asrs r1, r0, #32 │ │ - b.n af9c0 │ │ + b.n af9d0 │ │ lsrs r2, r0, #10 │ │ add.w r0, r0, r7 │ │ - b.n afbea │ │ - beq.n af90c │ │ - b.n afd44 │ │ + b.n afbfa │ │ + beq.n af91c │ │ + b.n afd54 │ │ ldrh r4, [r0, #24] │ │ ldc 0, cr13, [sp], #16 │ │ - b.n afdd0 │ │ + b.n afde0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {ip, lr} │ │ - b.n afffe │ │ + b.n b000e │ │ ldr??.w lr, [r9, ] │ │ asrs r2, r3, #1 │ │ - b.n af472 │ │ + b.n af482 │ │ lsls r5, r0, #31 │ │ - b.n afeda │ │ + b.n afeea │ │ lsrs r7, r7, #31 │ │ - b.n aff6c │ │ + b.n aff7c │ │ movs r0, r0 │ │ - b.n aff74 │ │ + b.n aff84 │ │ vpmin.u8 q8, , │ │ asrs r0, r3, #6 │ │ - b.n af418 │ │ + b.n af428 │ │ ands r0, r0 │ │ - b.n afc1e │ │ + b.n afc2e │ │ adds r1, #148 @ 0x94 │ │ - b.n af420 │ │ + b.n af430 │ │ movs r1, r0 │ │ - b.n b0026 │ │ + b.n b0036 │ │ movs r1, #144 @ 0x90 │ │ - b.n af428 │ │ + b.n af438 │ │ asrs r1, r0, #32 │ │ - b.n afa0c │ │ + b.n afa1c │ │ adds r0, #3 │ │ - b.n afa10 │ │ + b.n afa20 │ │ movs r0, #2 │ │ - b.n afa14 │ │ + b.n afa24 │ │ asrs r4, r0, #32 │ │ stmia.w sp, {r0, r2, r4, r7, r8, sp} │ │ - b.n afefe │ │ + b.n aff0e │ │ @ instruction: 0xfa12eaff │ │ strb r0, [r0, #0] │ │ - b.n b00c6 │ │ + b.n b00d6 │ │ movs r0, r4 │ │ and.w r0, r0, sl, lsr #5 │ │ - b.n af4ba │ │ + b.n af4ca │ │ movs r6, r2 │ │ - b.n b0052 │ │ + b.n b0062 │ │ movs r0, r0 │ │ - b.n affb8 │ │ + b.n affc8 │ │ vpmin.u q0, q10, │ │ asrs r0, r1, #5 │ │ - b.n af45c │ │ + b.n af46c │ │ movs r1, #143 @ 0x8f │ │ - b.n aff22 │ │ + b.n aff32 │ │ adds r1, #68 @ 0x44 │ │ - b.n af464 │ │ + b.n af474 │ │ lsls r4, r0, #5 │ │ - b.n af468 │ │ + b.n af478 │ │ asrs r1, r0, #32 │ │ - b.n afa4c │ │ + b.n afa5c │ │ adds r0, #3 │ │ - b.n afa50 │ │ + b.n afa60 │ │ movs r0, r0 │ │ - b.n afa54 │ │ + b.n afa64 │ │ asrs r1, r0, #32 │ │ stmia.w sp, {r0} │ │ - b.n b007e │ │ - add r6, sp, #228 @ 0xe4 │ │ + b.n b008e │ │ + add r6, sp, #224 @ 0xe0 │ │ @ instruction: 0xebff0016 │ │ - b.n b0086 │ │ - beq.n af9a8 │ │ - b.n afde0 │ │ + b.n b0096 │ │ + beq.n af9b8 │ │ + b.n afdf0 │ │ ldrh r4, [r0, #24] │ │ ldc 0, cr13, [sp], #16 │ │ - b.n afe6c │ │ + b.n afe7c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3} │ │ - b.n af508 │ │ + b.n af518 │ │ ldr r2, [r1, r3] │ │ - b.n aff6e │ │ + b.n aff7e │ │ ldr r2, [r3, #56] @ 0x38 │ │ - b.n aff68 │ │ + b.n aff78 │ │ ldr r7, [r7, r7] │ │ - b.n afffe │ │ + b.n b000e │ │ movs r0, r0 │ │ - b.n b000a │ │ + b.n b001a │ │ strh r0, [r0, #0] │ │ - b.n b00ae │ │ + b.n b00be │ │ str r0, [r0, #0] │ │ lsls r0, r4, #6 │ │ str r0, [r0, r0] │ │ lsls r0, r4, #6 │ │ ands r0, r0 │ │ - b.n b00ba │ │ + b.n b00ca │ │ movs r0, r0 │ │ - b.n b00be │ │ + b.n b00ce │ │ vpmin.u8 q7, q8, │ │ ands r0, r0 │ │ - b.n b0146 │ │ + b.n b0156 │ │ vpmin.u16 q7, , │ │ strb r0, [r0, #0] │ │ - b.n afcce │ │ + b.n afcde │ │ movs r4, r1 │ │ - b.n afcd2 │ │ - bcc.n afa16 │ │ + b.n afce2 │ │ + bcc.n afa24 │ │ @ instruction: 0xebfffa08 │ │ @ instruction: 0xeaff0000 │ │ - b.n b015e │ │ + b.n b016e │ │ mrc2 10, 3, lr, cr12, cr15, {7} @ │ │ movs r0, r6 │ │ - b.n af4e0 │ │ + b.n af4f0 │ │ subs r7, r5, r5 │ │ @ instruction: 0xeb00c044 │ │ - b.n af4e8 │ │ + b.n af4f8 │ │ @ instruction: 0xfab3eaff │ │ subs r4, r5, r5 │ │ @ instruction: 0xeb00c044 │ │ - b.n af4f4 │ │ + b.n af504 │ │ str r4, [r0, #0] │ │ - b.n af4de │ │ + b.n af4ee │ │ @ instruction: 0xfab4eaff │ │ movs r0, r0 │ │ - b.n b0186 │ │ + b.n b0196 │ │ mrc2 10, 1, lr, cr8, cr15, {7} @ │ │ - add r0, pc, #0 @ (adr r0, af9cc ) │ │ - b.n b018e │ │ + add r0, pc, #0 @ (adr r0, af9dc ) │ │ + b.n b019e │ │ mrc2 10, 2, lr, cr5, cr15, {7} @ │ │ str r0, [r0, #0] │ │ - b.n b0196 │ │ + b.n b01a6 │ │ mcr2 10, 4, lr, cr9, cr15, {7} @ │ │ movs r0, r0 │ │ - b.n b019e │ │ + b.n b01ae │ │ mcr2 10, 5, lr, cr3, cr15, {7} @ │ │ str r0, [r0, #0] │ │ - b.n b01a6 │ │ + b.n b01b6 │ │ mrc2 10, 5, lr, cr13, cr15, {7} @ │ │ movs r0, r0 │ │ - b.n b01ae │ │ + b.n b01be │ │ mcr2 10, 7, lr, cr4, cr15, {7} @ │ │ movs r1, r0 │ │ - b.n b00e4 │ │ + b.n b00f4 │ │ asrs r2, r0, #32 │ │ asrs r0, r4, #14 │ │ strb r0, [r0, #0] │ │ lsls r0, r4, #14 │ │ asrs r1, r2, #32 │ │ lsls r0, r4, #14 │ │ vld3.32 @ instruction: 0xf9ebeaff │ │ movs r0, r0 │ │ - b.n b014a │ │ + b.n b015a │ │ asrs r0, r0, #32 │ │ - b.n b014e │ │ + b.n b015e │ │ @ instruction: 0xfa8beaff │ │ subs r6, #168 @ 0xa8 │ │ @ instruction: 0xeb00c044 │ │ - b.n af554 │ │ + b.n af564 │ │ strb r0, [r0, #0] │ │ - b.n afd5e │ │ + b.n afd6e │ │ movs r0, r0 │ │ - b.n b00c2 │ │ + b.n b00d2 │ │ ldc2l 10, cr1, [lr, #1020]! @ 0x3fc @ │ │ ldr??.w lr, [r1, ] │ │ strb r4, [r1, #0] │ │ - b.n b016e │ │ + b.n b017e │ │ ldc2l 10, cr14, [fp, #1020]! @ 0x3fc @ │ │ subs r6, #160 @ 0xa0 │ │ @ instruction: 0xeb00c044 │ │ - b.n af574 │ │ + b.n af584 │ │ strb r0, [r0, #0] │ │ - b.n afd7e │ │ + b.n afd8e │ │ movs r0, r0 │ │ - b.n b00e2 │ │ + b.n b00f2 │ │ ldc2l 10, cr1, [r6, #1020]! @ 0x3fc @ │ │ movs r2, #84 @ 0x54 │ │ - b.n af582 │ │ + b.n af592 │ │ strb r0, [r2, #9] │ │ - b.n af586 │ │ + b.n af596 │ │ lsls r6, r0, #4 │ │ - b.n b0140 │ │ + b.n b0150 │ │ ldr??.w r1, [r7, ] │ │ vld1.64 {d30-d31}, [r6 :256] │ │ strh r0, [r0, #2] │ │ - b.n af598 │ │ + b.n af5a8 │ │ ldc2l 10, cr14, [r6, #1020] @ 0x3fc @ │ │ - ldrh r2, [r7, #12] │ │ - vqrshrn.u64 d24, q15, #11 │ │ - @ instruction: 0xfff588de │ │ - vtbx.8 d25, {d21-d22}, d25 │ │ - vabs.s16 q13, q1 │ │ - vqshrn.u64 d24, q7, #11 │ │ - vtbl.8 d25, {d5-d7}, d25 │ │ - vqshl.u32 d25, d17, #21 │ │ - @ instruction: 0xfff50b74 │ │ - vmull.u , d22, d16 │ │ - vtbl.8 d17, {d5-d8}, d19 │ │ - vrsqrte.f16 , q10 │ │ - movs r2, r0 │ │ - sbcs.w r0, r8, #8519680 @ 0x820000 │ │ - add.w r0, r8, #8519680 @ 0x820000 │ │ - ldrh r2, [r5, #10] │ │ + ldrh r4, [r7, #14] │ │ + vtbx.8 d24, {d21-d22}, d0 │ │ + vtbl.8 d24, {d5-d6}, d16 │ │ + vshll.u32 , d10, #21 │ │ + vcgt.f16 d26, d7, #0 │ │ + vtbx.8 d24, {d5-d6}, d16 │ │ + @ instruction: 0xfff59a5a │ │ + vclt.f16 , , #0 │ │ + vtbx.8 d16, {d5-d8}, d20 │ │ + @ instruction: 0xfff6bbdf │ │ + @ instruction: 0xfff51b13 │ │ + vsli.64 , q10, #55 @ 0x37 │ │ + movs r2, r0 │ │ + @ instruction: 0xf5880002 │ │ + adds.w r0, r8, #8519680 @ 0x820000 │ │ + ldrh r4, [r5, #12] │ │ vsri.64 , q2, #11 │ │ - bmi.n afa4a │ │ - ldr r7, [pc, #960] @ (afe64 ) │ │ + bmi.n afa5a │ │ + ldr r7, [pc, #960] @ (afe74 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n affc4 │ │ - beq.n afb74 │ │ - b.n aff48 │ │ - blt.n afab2 │ │ - b.n aff4c │ │ - add r0, pc, #0 @ (adr r0, afab4 ) │ │ - b.n afdf6 │ │ + b.n affd4 │ │ + beq.n afb84 │ │ + b.n aff58 │ │ + blt.n afac2 │ │ + b.n aff5c │ │ + add r0, pc, #0 @ (adr r0, afac4 ) │ │ + b.n afe06 │ │ lsls r0, r0, #1 │ │ - b.n af5da │ │ + b.n af5ea │ │ lsls r4, r3, #1 │ │ - b.n af5d8 │ │ + b.n af5e8 │ │ movs r5, r0 │ │ - b.n af676 │ │ + b.n af686 │ │ asrs r0, r3, #1 │ │ - b.n af5e0 │ │ + b.n af5f0 │ │ movs r1, r0 │ │ - b.n b00ea │ │ + b.n b00fa │ │ movs r2, r1 │ │ asrs r0, r4, #6 │ │ strh r1, [r2, #58] @ 0x3a │ │ subs r0, r0, r4 │ │ strb r4, [r3, #1] │ │ - b.n af610 │ │ + b.n af620 │ │ str r1, [r0, #0] │ │ - b.n b021a │ │ + b.n b022a │ │ adds r0, #129 @ 0x81 │ │ - b.n af692 │ │ + b.n af6a2 │ │ lsls r0, r0, #2 │ │ - b.n af696 │ │ + b.n af6a6 │ │ asrs r4, r3, #1 │ │ - b.n af694 │ │ + b.n af6a4 │ │ movs r0, #16 │ │ - b.n af618 │ │ + b.n af628 │ │ strb r0, [r1, #1] │ │ - b.n af61c │ │ + b.n af62c │ │ orrs r0, r6 │ │ - b.n afb1e │ │ + b.n afb2e │ │ asrs r3, r2, #4 │ │ - b.n afbfa │ │ + b.n afc0a │ │ asrs r4, r2, #32 │ │ - b.n afffc │ │ + b.n b000c │ │ asrs r4, r7, #32 │ │ - b.n af618 │ │ + b.n af628 │ │ asrs r3, r0, #6 │ │ - b.n afc16 │ │ + b.n afc26 │ │ adds r0, #0 │ │ - b.n b0246 │ │ + b.n b0256 │ │ movs r0, #136 @ 0x88 │ │ - b.n af62c │ │ + b.n af63c │ │ asrs r4, r1, #2 │ │ - b.n af630 │ │ + b.n af640 │ │ movs r4, r2 │ │ - b.n af640 │ │ + b.n af650 │ │ adds r0, #68 @ 0x44 │ │ - b.n af630 │ │ + b.n af640 │ │ movs r2, r0 │ │ asrs r0, r2, #5 │ │ lsls r5, r4, #23 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #9 │ │ - b.n af656 │ │ + b.n af666 │ │ movs r0, r0 │ │ - b.n b01c6 │ │ + b.n b01d6 │ │ movs r4, r0 │ │ asrs r0, r2, #22 │ │ movs r0, r0 │ │ asrs r0, r2, #13 │ │ movs r3, r1 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n af66a │ │ + b.n af67a │ │ asrs r4, r1, #32 │ │ - b.n b013a │ │ + b.n b014a │ │ asrs r5, r0, #32 │ │ - b.n b01be │ │ + b.n b01ce │ │ str r0, [r0, r0] │ │ - b.n b0282 │ │ + b.n b0292 │ │ movs r1, r0 │ │ - b.n afb46 │ │ + b.n afb56 │ │ asrs r4, r0, #1 │ │ - b.n af684 │ │ + b.n af694 │ │ movs r4, r0 │ │ - b.n afe4e │ │ + b.n afe5e │ │ lsrs r0, r2, #28 │ │ - b.n afe30 │ │ + b.n afe40 │ │ asrs r1, r0, #32 │ │ - b.n aff16 │ │ + b.n aff26 │ │ lsls r0, r4, #10 │ │ - b.n afe9a │ │ + b.n afeaa │ │ movs r0, r0 │ │ - b.n afd80 │ │ + b.n afd90 │ │ lsrs r6, r2, #32 │ │ subs r0, r0, r0 │ │ movs r0, r6 │ │ - b.n b007a │ │ + b.n b008a │ │ lsls r0, r5, #1 │ │ - b.n af684 │ │ + b.n af694 │ │ movs r0, r1 │ │ - b.n af6a2 │ │ - add r0, pc, #464 @ (adr r0, afd40 ) │ │ - b.n af68c │ │ + b.n af6b2 │ │ + add r0, pc, #464 @ (adr r0, afd50 ) │ │ + b.n af69c │ │ movs r3, r0 │ │ - b.n b0216 │ │ + b.n b0226 │ │ lsls r1, r1, #1 │ │ subs r2, #0 │ │ - ldr r7, [pc, #360] @ (afce4 ) │ │ - b.n b0098 │ │ + ldr r7, [pc, #360] @ (afcf4 ) │ │ + b.n b00a8 │ │ asrs r2, r1, #32 │ │ - b.n afec2 │ │ + b.n afed2 │ │ movs r0, #1 │ │ - b.n b02c6 │ │ + b.n b02d6 │ │ movs r4, r0 │ │ - b.n afeca │ │ - cbz r7, afbd6 │ │ + b.n afeda │ │ + cbz r6, afbe6 │ │ @ instruction: 0xebff0000 │ │ - b.n b0232 │ │ + b.n b0242 │ │ lsrs r0, r5, #32 │ │ subs r0, r0, r0 │ │ asrs r4, r2, #1 │ │ - b.n af6ce │ │ + b.n af6de │ │ movs r0, r1 │ │ - b.n af6d2 │ │ + b.n af6e2 │ │ movs r0, #4 │ │ - b.n af6c4 │ │ + b.n af6d4 │ │ movs r3, r0 │ │ - b.n b0246 │ │ + b.n b0256 │ │ movs r2, #20 │ │ - b.n af6c4 │ │ + b.n af6d4 │ │ ands r4, r0 │ │ - b.n af6b0 │ │ + b.n af6c0 │ │ movs r7, r6 │ │ subs r2, #0 │ │ asrs r4, r6, #1 │ │ - b.n af6f0 │ │ + b.n af700 │ │ ldr r7, [sp, #360] @ 0x168 │ │ - b.n b00d4 │ │ + b.n b00e4 │ │ str r4, [r6, #4] │ │ - b.n af6f8 │ │ - add r0, pc, #544 @ (adr r0, afde0 ) │ │ - b.n b00dc │ │ + b.n af708 │ │ + add r0, pc, #544 @ (adr r0, afdf0 ) │ │ + b.n b00ec │ │ ands r2, r0 │ │ - b.n b0306 │ │ + b.n b0316 │ │ strh r0, [r6, #0] │ │ - b.n b030a │ │ + b.n b031a │ │ asrs r0, r1, #1 │ │ - b.n af6f0 │ │ + b.n af700 │ │ asrs r0, r0, #32 │ │ - b.n af6f4 │ │ + b.n af704 │ │ strb r1, [r4, #4] │ │ - b.n aff16 │ │ + b.n aff26 │ │ movs r2, r1 │ │ and.w r0, r0, r4, ror #5 │ │ - b.n af718 │ │ + b.n af728 │ │ movs r0, #1 │ │ - b.n b006a │ │ + b.n b007a │ │ ands r7, r3 │ │ - b.n b02ea │ │ + b.n b02fa │ │ movs r0, #1 │ │ - b.n b00f2 │ │ + b.n b0102 │ │ asrs r0, r1, #1 │ │ - b.n af710 │ │ + b.n af720 │ │ strb r2, [r4, #6] │ │ - b.n afb14 │ │ + b.n afb24 │ │ movs r0, r0 │ │ - b.n b02a4 │ │ + b.n b02b4 │ │ ands r0, r4 │ │ lsls r4, r0, #10 │ │ ands r1, r0 │ │ - b.n b0106 │ │ + b.n b0116 │ │ movs r0, r0 │ │ - b.n afeaa │ │ + b.n afeba │ │ movs r2, r4 │ │ cmp r2, #0 │ │ movs r1, r0 │ │ - b.n b0238 │ │ + b.n b0248 │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n b02c0 │ │ + b.n b02d0 │ │ @ instruction: 0xfff00aff │ │ subs r7, r6, #4 │ │ - b.n afa18 │ │ + b.n afa28 │ │ subs r1, r2, #4 │ │ - b.n afefc │ │ + b.n aff0c │ │ strb r7, [r6, #4] │ │ - b.n aff62 │ │ + b.n aff72 │ │ asrs r4, r0, #32 │ │ - b.n afd28 │ │ + b.n afd38 │ │ ands r1, r0 │ │ - b.n b00ac │ │ + b.n b00bc │ │ @ instruction: 0xfff2eaff │ │ asrs r4, r1, #1 │ │ - b.n af75e │ │ + b.n af76e │ │ strb r7, [r4, #2] │ │ - b.n aff76 │ │ + b.n aff86 │ │ asrs r4, r0, #32 │ │ - b.n afbdc │ │ + b.n afbec │ │ movs r1, r0 │ │ - b.n b0260 │ │ + b.n b0270 │ │ @ instruction: 0xffed0aff │ │ lsls r0, r5, #1 │ │ - b.n af780 │ │ + b.n af790 │ │ adds r0, #132 @ 0x84 │ │ - b.n afd52 │ │ + b.n afd62 │ │ movs r0, #68 @ 0x44 │ │ - b.n af77a │ │ + b.n af78a │ │ movs r2, #3 │ │ - b.n afd56 │ │ + b.n afd66 │ │ lsls r0, r2, #3 │ │ - b.n affd6 │ │ + b.n affe6 │ │ adds r0, #2 │ │ - b.n b039a │ │ + b.n b03aa │ │ lsls r0, r7, #11 │ │ - b.n affe2 │ │ + b.n afff2 │ │ lsls r4, r3, #1 │ │ - b.n af79c │ │ + b.n af7ac │ │ movs r0, #136 @ 0x88 │ │ - b.n af780 │ │ + b.n af790 │ │ movs r0, #10 │ │ - b.n affaa │ │ + b.n affba │ │ strh r4, [r1, #4] │ │ - b.n af788 │ │ + b.n af798 │ │ lsls r0, r1, #2 │ │ - b.n af792 │ │ + b.n af7a2 │ │ lsls r4, r0, #10 │ │ - b.n afd76 │ │ + b.n afd86 │ │ asrs r0, r3, #32 │ │ - b.n b017a │ │ + b.n b018a │ │ movs r1, r1 │ │ - b.n affbe │ │ - ldr r1, [pc, #668] @ (aff1c ) │ │ + b.n affce │ │ + ldr r1, [pc, #668] @ (aff2c ) │ │ add.w r0, r0, r0 │ │ - b.n b0326 │ │ + b.n b0336 │ │ lsls r3, r0, #27 │ │ subs r0, r0, r0 │ │ movs r0, r1 │ │ - b.n af7ba │ │ + b.n af7ca │ │ @ instruction: 0xffd9eaff │ │ - add r0, pc, #464 @ (adr r0, afe64 ) │ │ - b.n af7d0 │ │ + add r0, pc, #464 @ (adr r0, afe74 ) │ │ + b.n af7e0 │ │ asrs r4, r2, #8 │ │ - b.n af7d4 │ │ + b.n af7e4 │ │ lsls r4, r2, #1 │ │ - b.n af7d2 │ │ + b.n af7e2 │ │ asrs r4, r0, #32 │ │ - b.n af7a2 │ │ + b.n af7b2 │ │ lsls r0, r3, #1 │ │ - b.n af7e0 │ │ - ldr r7, [pc, #360] @ (afe10 ) │ │ - b.n b01c4 │ │ + b.n af7f0 │ │ + ldr r7, [pc, #360] @ (afe20 ) │ │ + b.n b01d4 │ │ strh r0, [r6, #0] │ │ - b.n b01b6 │ │ + b.n b01c6 │ │ movs r0, r0 │ │ - b.n b0352 │ │ + b.n b0362 │ │ asrs r0, r1, #32 │ │ - b.n b01b6 │ │ + b.n b01c6 │ │ asrs r0, r1, #1 │ │ - b.n af7d4 │ │ + b.n af7e4 │ │ movs r2, r4 │ │ lsrs r0, r0, #8 │ │ lsrs r0, r5, #31 │ │ - b.n af800 │ │ + b.n af810 │ │ subs r2, r3, #5 │ │ - b.n b01e0 │ │ + b.n b01f0 │ │ movs r0, r0 │ │ - b.n afde8 │ │ + b.n afdf8 │ │ movs r4, r5 │ │ - b.n af7ee │ │ - add r3, pc, #380 @ (adr r3, afe4c ) │ │ + b.n af7fe │ │ + add r3, pc, #380 @ (adr r3, afe5c ) │ │ add.w r0, r0, r0, lsl #24 │ │ - b.n b0416 │ │ + b.n b0426 │ │ movs r0, r0 │ │ - b.n b037a │ │ + b.n b038a │ │ lsls r6, r0, #27 │ │ subs r0, r0, r0 │ │ lsls r0, r5, #5 │ │ - b.n af81c │ │ + b.n af82c │ │ ldrb r0, [r0, #8] │ │ - b.n b02fe │ │ + b.n b030e │ │ ldrb r2, [r3, #14] │ │ - b.n b0370 │ │ + b.n b0380 │ │ asrs r4, r5, #5 │ │ - b.n af828 │ │ + b.n af838 │ │ movs r7, #144 @ 0x90 │ │ - b.n afdf8 │ │ + b.n afe08 │ │ lsrs r0, r0, #31 │ │ - b.n b0036 │ │ + b.n b0046 │ │ adds r7, #144 @ 0x90 │ │ - b.n afd40 │ │ + b.n afd50 │ │ movs r1, r0 │ │ - b.n afe22 │ │ + b.n afe32 │ │ subs r1, r0, #7 │ │ - b.n afe48 │ │ + b.n afe58 │ │ str r0, [r1, r1] │ │ - b.n af840 │ │ + b.n af850 │ │ lsls r0, r6, #3 │ │ - b.n b0094 │ │ + b.n b00a4 │ │ subs r2, r3, #5 │ │ - b.n b0228 │ │ + b.n b0238 │ │ movs r1, r0 │ │ - b.n b0452 │ │ - add r3, pc, #776 @ (adr r3, b001c ) │ │ + b.n b0462 │ │ + add r3, pc, #776 @ (adr r3, b002c ) │ │ add.w r0, r0, r0 │ │ - b.n b03ba │ │ + b.n b03ca │ │ strb r0, [r0, #0] │ │ - b.n b045e │ │ + b.n b046e │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ asrs r4, r5, #5 │ │ - b.n af860 │ │ + b.n af870 │ │ cmp r7, #250 @ 0xfa │ │ - b.n b046a │ │ + b.n b047a │ │ lsls r0, r5, #5 │ │ - b.n af868 │ │ + b.n af878 │ │ lsls r1, r2, #10 │ │ - b.n afd3e │ │ + b.n afd4e │ │ cmp r2, #0 │ │ - b.n b034e │ │ + b.n b035e │ │ subs r0, r0, #7 │ │ - b.n b007a │ │ + b.n b008a │ │ cmp r3, #154 @ 0x9a │ │ - b.n b03c4 │ │ + b.n b03d4 │ │ lsls r1, r2, #10 │ │ - b.n afd50 │ │ + b.n afd60 │ │ str r0, [r2, #40] @ 0x28 │ │ - b.n afe94 │ │ + b.n afea4 │ │ str r0, [r7, #44] @ 0x2c │ │ - b.n b00d4 │ │ + b.n b00e4 │ │ lsrs r1, r6, #24 │ │ - b.n b026c │ │ + b.n b027c │ │ movs r0, #80 @ 0x50 │ │ movt sl, #239 @ 0xef │ │ orn r0, r0, #163840 @ 0x28000 │ │ - b.n b049a │ │ + b.n b04aa │ │ strb r0, [r0, #0] │ │ - b.n b049e │ │ + b.n b04ae │ │ str r0, [sp, #736] @ 0x2e0 │ │ - b.n b026a │ │ + b.n b027a │ │ lsls r0, r5, #1 │ │ - b.n af8a0 │ │ + b.n af8b0 │ │ movs r0, #64 @ 0x40 │ │ - b.n af89e │ │ + b.n af8ae │ │ strh r0, [r6, #0] │ │ - b.n af888 │ │ + b.n af898 │ │ lsls r0, r2, #3 │ │ - b.n b00f2 │ │ + b.n b0102 │ │ asrs r4, r0, #2 │ │ - b.n af886 │ │ + b.n af896 │ │ asrs r4, r0, #32 │ │ - b.n b00ba │ │ + b.n b00ca │ │ cmp r2, #205 @ 0xcd │ │ orr.w sl, r1, #419840 @ 0x66800 │ │ orr.w sl, r1, #399360 @ 0x61800 │ │ orr.w r0, r1, #303104 @ 0x4a000 │ │ - b.n af8ae │ │ + b.n af8be │ │ strb r0, [r0, #0] │ │ - b.n af890 │ │ + b.n af8a0 │ │ asrs r0, r2, #1 │ │ - b.n b029a │ │ + b.n b02aa │ │ asrs r4, r6, #32 │ │ - b.n af8b0 │ │ + b.n af8c0 │ │ asrs r0, r6, #6 │ │ - b.n af8b4 │ │ + b.n af8c4 │ │ asrs r4, r1, #32 │ │ - b.n b04de │ │ + b.n b04ee │ │ asrs r4, r5, #6 │ │ - b.n af8bc │ │ + b.n af8cc │ │ asrs r2, r4, #8 │ │ - b.n afe2a │ │ + b.n afe3a │ │ asrs r4, r5, #5 │ │ - b.n af8c4 │ │ + b.n af8d4 │ │ movs r0, #8 │ │ - b.n b00ee │ │ + b.n b00fe │ │ asrs r0, r1, #32 │ │ - b.n b04f2 │ │ + b.n b0502 │ │ lsls r0, r0, #2 │ │ - b.n af906 │ │ + b.n af916 │ │ lsrs r1, r0, #11 │ │ orr.w r0, r2, #8978432 @ 0x890000 │ │ - b.n b00fe │ │ + b.n b010e │ │ asrs r2, r1, #32 │ │ - b.n b0102 │ │ + b.n b0112 │ │ movs r0, #44 @ 0x2c │ │ - b.n af8e0 │ │ + b.n af8f0 │ │ movs r0, #0 │ │ - b.n b050a │ │ - uxth r7, r3 │ │ + b.n b051a │ │ + uxth r6, r3 │ │ @ instruction: 0xebff0000 │ │ - b.n b0472 │ │ + b.n b0482 │ │ lsls r7, r6, #25 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n af90e │ │ + b.n af91e │ │ lsls r4, r2, #1 │ │ - b.n af8f8 │ │ + b.n af908 │ │ lsls r4, r2, #1 │ │ - b.n af916 │ │ + b.n af926 │ │ asrs r0, r0, #32 │ │ - b.n af906 │ │ + b.n af916 │ │ asrs r4, r1, #11 │ │ - b.n af904 │ │ + b.n af914 │ │ str r0, [sp, #0] │ │ - b.n af8ee │ │ + b.n af8fe │ │ lsls r0, r0, #1 │ │ - b.n af926 │ │ + b.n af936 │ │ asrs r0, r1, #4 │ │ - b.n af916 │ │ + b.n af926 │ │ lsls r4, r1, #4 │ │ - b.n af91a │ │ + b.n af92a │ │ movs r0, r0 │ │ - b.n b0120 │ │ + b.n b0130 │ │ lsls r6, r5, #25 │ │ lsrs r0, r0, #8 │ │ asrs r4, r6, #5 │ │ - b.n af940 │ │ + b.n af950 │ │ movs r0, r5 │ │ - b.n af93e │ │ + b.n af94e │ │ movs r1, #104 @ 0x68 │ │ - b.n af948 │ │ + b.n af958 │ │ movs r0, r0 │ │ - b.n b00b4 │ │ + b.n b00c4 │ │ movs r0, #1 │ │ str r2, [sp, #520] @ 0x208 │ │ movs r1, #104 @ 0x68 │ │ - b.n af934 │ │ + b.n af944 │ │ movs r2, r5 │ │ - b.n b04c2 │ │ + b.n b04d2 │ │ lsls r7, r2, #21 │ │ ldrh r0, [r0, #16] │ │ movs r0, #104 @ 0x68 │ │ - b.n af960 │ │ - ldr r7, [pc, #360] @ (aff90 ) │ │ - b.n b0344 │ │ + b.n af970 │ │ + ldr r7, [pc, #360] @ (affa0 ) │ │ + b.n b0354 │ │ strh r0, [r0, #4] │ │ - b.n af948 │ │ + b.n af958 │ │ subs r7, #98 @ 0x62 │ │ - b.n b0336 │ │ + b.n b0346 │ │ adds r0, #56 @ 0x38 │ │ - b.n af950 │ │ + b.n af960 │ │ subs r4, #1 │ │ - b.n b033e │ │ + b.n b034e │ │ adds r0, #76 @ 0x4c │ │ - b.n af958 │ │ + b.n af968 │ │ adds r0, #248 @ 0xf8 │ │ - b.n b0346 │ │ + b.n b0356 │ │ adds r0, #80 @ 0x50 │ │ - b.n af960 │ │ + b.n af970 │ │ subs r7, #145 @ 0x91 │ │ - b.n b035e │ │ + b.n b036e │ │ adds r0, #120 @ 0x78 │ │ - b.n af968 │ │ + b.n af978 │ │ adds r0, #160 @ 0xa0 │ │ - b.n b0366 │ │ + b.n b0376 │ │ adds r0, #112 @ 0x70 │ │ - b.n af970 │ │ + b.n af980 │ │ adds r0, #168 @ 0xa8 │ │ - b.n b036e │ │ + b.n b037e │ │ cmp r5, #6 │ │ - b.n b0362 │ │ + b.n b0372 │ │ adds r0, #96 @ 0x60 │ │ - b.n af97c │ │ + b.n af98c │ │ movs r0, #64 @ 0x40 │ │ - b.n af980 │ │ + b.n af990 │ │ movs r0, r0 │ │ - b.n b010c │ │ + b.n b011c │ │ lsls r3, r2, #19 │ │ ldrh r0, [r0, #16] │ │ movs r0, #64 @ 0x40 │ │ - b.n af9ac │ │ + b.n af9bc │ │ asrs r0, r0, #32 │ │ - b.n b05b6 │ │ + b.n b05c6 │ │ lsls r4, r6, #5 │ │ - b.n af994 │ │ + b.n af9a4 │ │ movs r2, r1 │ │ - b.n b01be │ │ + b.n b01ce │ │ asrs r0, r0, #6 │ │ - b.n af99c │ │ + b.n af9ac │ │ asrs r4, r7, #5 │ │ - b.n af9a0 │ │ + b.n af9b0 │ │ asrs r4, r0, #32 │ │ - b.n b01ca │ │ + b.n b01da │ │ strh r0, [r4, #56] @ 0x38 │ │ add.w r0, r0, r0 │ │ - b.n b0532 │ │ + b.n b0542 │ │ lsls r3, r5, #20 │ │ subs r0, r0, r0 │ │ movs r0, #96 @ 0x60 │ │ - b.n af9d4 │ │ + b.n af9e4 │ │ movs r2, r1 │ │ - b.n b01de │ │ + b.n b01ee │ │ asrs r4, r0, #32 │ │ - b.n b01e2 │ │ + b.n b01f2 │ │ strh r2, [r3, #56] @ 0x38 │ │ add.w r0, r0, r0 │ │ - b.n b054a │ │ + b.n b055a │ │ lsls r5, r4, #20 │ │ subs r0, r0, r0 │ │ str r0, [sp, #496] @ 0x1f0 │ │ - b.n af9cc │ │ + b.n af9dc │ │ movs r6, r0 │ │ @ instruction: 0xea008080 │ │ - b.n af9f4 │ │ + b.n afa04 │ │ movs r0, #96 @ 0x60 │ │ - b.n af9f8 │ │ + b.n afa08 │ │ subs r2, r3, #5 │ │ - b.n b03dc │ │ + b.n b03ec │ │ movs r2, r1 │ │ - b.n b0206 │ │ + b.n b0216 │ │ strh r1, [r2, #56] @ 0x38 │ │ add.w r0, r0, r0 │ │ - b.n b056e │ │ + b.n b057e │ │ lsls r4, r3, #20 │ │ subs r0, r0, r0 │ │ ands r0, r5 │ │ - b.n afa0a │ │ + b.n afa1a │ │ lsls r0, r1, #9 │ │ - b.n afa0e │ │ + b.n afa1e │ │ movs r0, r0 │ │ - b.n b057e │ │ + b.n b058e │ │ str r4, [r0, r0] │ │ - b.n b0222 │ │ + b.n b0232 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ lsls r4, r6, #8 │ │ - b.n afa1e │ │ + b.n afa2e │ │ str r4, [r0, r0] │ │ - b.n b022e │ │ + b.n b023e │ │ movs r4, r0 │ │ - b.n b0192 │ │ + b.n b01a2 │ │ movs r2, r0 │ │ ldr r2, [sp, #0] │ │ movs r2, r1 │ │ - b.n b023a │ │ + b.n b024a │ │ adds r1, #99 @ 0x63 │ │ add.w r0, r0, r8, asr #20 │ │ - b.n afa36 │ │ + b.n afa46 │ │ eors r4, r4 │ │ - b.n afa20 │ │ + b.n afa30 │ │ lsls r0, r6, #1 │ │ - b.n afa44 │ │ - b.n aff0c │ │ - b.n afa2e │ │ + b.n afa54 │ │ + b.n aff1c │ │ + b.n afa3e │ │ movs r0, #14 │ │ - b.n b0252 │ │ + b.n b0262 │ │ movs r4, r0 │ │ - b.n af83a │ │ + b.n af84a │ │ lsls r4, r0, #2 │ │ - b.n afa34 │ │ + b.n afa44 │ │ movs r0, r0 │ │ - b.n b05be │ │ + b.n b05ce │ │ lsls r3, r2, #1 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n afa62 │ │ + b.n afa72 │ │ asrs r1, r0, #32 │ │ - b.n b03b4 │ │ + b.n b03c4 │ │ movs r1, r0 │ │ - b.n b01ce │ │ + b.n b01de │ │ lsls r7, r1, #1 │ │ subs r0, r0, r0 │ │ strb r4, [r0, #2] │ │ - b.n afa70 │ │ + b.n afa80 │ │ ands r1, r0 │ │ - b.n b067a │ │ + b.n b068a │ │ movs r0, #108 @ 0x6c │ │ - b.n afa58 │ │ + b.n afa68 │ │ movs r0, #4 │ │ - b.n b0446 │ │ + b.n b0456 │ │ adds r0, #1 │ │ - b.n b03d4 │ │ + b.n b03e4 │ │ movs r0, r0 │ │ - b.n b068a │ │ + b.n b069a │ │ stmia r0!, {} │ │ - b.n b028e │ │ + b.n b029e │ │ lsls r4, r0, #2 │ │ - b.n afa8c │ │ + b.n afa9c │ │ asrs r4, r0, #32 │ │ - b.n b0296 │ │ + b.n b02a6 │ │ ands r1, r0 │ │ - b.n b0462 │ │ + b.n b0472 │ │ str r1, [r0, #0] │ │ - b.n b03e8 │ │ + b.n b03f8 │ │ strb r1, [r0, #0] │ │ - b.n b03f0 │ │ + b.n b0400 │ │ strh r2, [r0, #0] │ │ - b.n b02a6 │ │ - add r0, pc, #12 @ (adr r0, aff74 ) │ │ - b.n b02aa │ │ + b.n b02b6 │ │ + add r0, pc, #12 @ (adr r0, aff84 ) │ │ + b.n b02ba │ │ movs r0, r0 │ │ - b.n b0216 │ │ + b.n b0226 │ │ movs r7, r0 │ │ ldrh r0, [r0, #16] │ │ str r1, [sp, #16] │ │ - b.n afeb2 │ │ + b.n afec2 │ │ str r2, [r0, r0] │ │ - b.n b0404 │ │ + b.n b0414 │ │ adds r0, #1 │ │ - b.n b0412 │ │ + b.n b0422 │ │ movs r0, #4 │ │ - b.n b0492 │ │ + b.n b04a2 │ │ movs r1, r0 │ │ - b.n b049e │ │ + b.n b04ae │ │ movs r1, r1 │ │ - b.n b0234 │ │ + b.n b0244 │ │ str r6, [r0, r0] │ │ - b.n b02ce │ │ + b.n b02de │ │ @ instruction: 0xffed0aff │ │ lsls r4, r0, #2 │ │ - b.n afad0 │ │ + b.n afae0 │ │ movs r1, r0 │ │ - b.n b003a │ │ + b.n b004a │ │ movs r0, r0 │ │ - b.n afaba │ │ + b.n afaca │ │ movs r6, r3 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n b0654 │ │ + b.n b0664 │ │ ands r1, r0 │ │ - b.n b06ea │ │ + b.n b06fa │ │ ands r7, r0 │ │ strh r0, [r4, #12] │ │ str r0, [r0, r0] │ │ - b.n b06f2 │ │ + b.n b0702 │ │ movs r4, r0 │ │ - b.n b0664 │ │ + b.n b0674 │ │ movs r7, r1 │ │ subs r2, #0 │ │ lsls r4, r1, #4 │ │ - b.n b02fe │ │ + b.n b030e │ │ movs r4, r2 │ │ - b.n b06a2 │ │ + b.n b06b2 │ │ movs r4, r1 │ │ ldrh r0, [r0, #16] │ │ movs r1, r0 │ │ - b.n b067e │ │ + b.n b068e │ │ movs r1, r0 │ │ - b.n b070e │ │ + b.n b071e │ │ movs r2, r1 │ │ strh r0, [r4, #12] │ │ movs r0, #108 @ 0x6c │ │ - b.n afb10 │ │ + b.n afb20 │ │ movs r3, r0 │ │ - b.n b075a │ │ + b.n b076a │ │ str r3, [r0, r0] │ │ - b.n b0766 │ │ + b.n b0776 │ │ asrs r0, r1, #32 │ │ - b.n b0322 │ │ + b.n b0332 │ │ lsrs r5, r1, #10 │ │ orn r0, r1, #8650752 @ 0x840000 │ │ - b.n b048a │ │ + b.n b049a │ │ lsrs r5, r1, #10 │ │ - bl ffcf2fe4 │ │ + bl ffcf2ff4 │ │ subs r7, r7, r3 │ │ movs r5, r0 │ │ - b.n b029e │ │ + b.n b02ae │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n b06b2 │ │ + b.n b06c2 │ │ movs r1, r0 │ │ - b.n b0742 │ │ - add r0, pc, #0 @ (adr r0, b0004 ) │ │ + b.n b0752 │ │ + add r0, pc, #0 @ (adr r0, b0014 ) │ │ str r1, [sp, #640] @ 0x280 │ │ movs r4, r0 │ │ - b.n b0526 │ │ + b.n b0536 │ │ asrs r5, r0, #4 │ │ - b.n aff3e │ │ + b.n aff4e │ │ asrs r5, r0, #4 │ │ - b.n aff12 │ │ + b.n aff22 │ │ str r1, [r0, r0] │ │ - b.n b0520 │ │ + b.n b0530 │ │ movs r5, r0 │ │ - b.n b02ce │ │ + b.n b02de │ │ @ instruction: 0xfffa1aff │ │ - add r0, pc, #464 @ (adr r0, b01f0 ) │ │ - b.n afb5c │ │ + add r0, pc, #464 @ (adr r0, b0200 ) │ │ + b.n afb6c │ │ lsls r0, r1, #9 │ │ - b.n afb5a │ │ + b.n afb6a │ │ str r0, [r5, #0] │ │ - b.n afb3e │ │ + b.n afb4e │ │ movs r0, r0 │ │ - b.n b06ce │ │ + b.n b06de │ │ lsls r0, r5, #2 │ │ lsrs r0, r0, #8 │ │ lsls r4, r6, #8 │ │ - b.n afb6a │ │ + b.n afb7a │ │ strh r0, [r0, #4] │ │ - b.n afb74 │ │ + b.n afb84 │ │ movs r6, r0 │ │ - b.n b02de │ │ + b.n b02ee │ │ movs r5, r1 │ │ ldr r2, [sp, #0] │ │ movs r2, r1 │ │ - b.n b0386 │ │ + b.n b0396 │ │ adds r1, #16 │ │ add.w r0, r0, r8, asr #20 │ │ - b.n afb82 │ │ + b.n afb92 │ │ movs r5, r0 │ │ - b.n b02fe │ │ + b.n b030e │ │ @ instruction: 0xffab1aff │ │ movs r7, r0 │ │ @ instruction: 0xea00f000 │ │ - b.n b069e │ │ - blx 4b06a0 │ │ + b.n b06ae │ │ + blx 4b06b0 │ │ @ instruction: 0xffffffff │ │ @ instruction: 0xffffffff │ │ ... │ │ str r5, [r0, #0] │ │ - b.n b03b6 │ │ - add r0, pc, #464 @ (adr r0, b0248 ) │ │ - b.n afbb4 │ │ + b.n b03c6 │ │ + add r0, pc, #464 @ (adr r0, b0258 ) │ │ + b.n afbc4 │ │ lsls r4, r4, #1 │ │ - b.n afbb8 │ │ + b.n afbc8 │ │ str r0, [sp, #496] @ 0x1f0 │ │ - b.n afbbc │ │ + b.n afbcc │ │ movs r6, r0 │ │ - b.n b0326 │ │ + b.n b0336 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ lsls r4, r2, #9 │ │ - b.n afbc2 │ │ + b.n afbd2 │ │ movs r0, r0 │ │ - b.n b0732 │ │ + b.n b0742 │ │ asrs r0, r2, #9 │ │ asrs r2, r3, #22 │ │ lsls r6, r0, #4 │ │ asrs r1, r6, #13 │ │ lsls r6, r5, #8 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #9 │ │ - b.n afbd6 │ │ + b.n afbe6 │ │ movs r0, r0 │ │ - b.n b0746 │ │ + b.n b0756 │ │ lsls r5, r5, #2 │ │ lsrs r0, r0, #8 │ │ asrs r4, r1, #1 │ │ - b.n afbe2 │ │ + b.n afbf2 │ │ movs r2, #76 @ 0x4c │ │ - b.n afbe6 │ │ + b.n afbf6 │ │ asrs r0, r0, #32 │ │ - b.n afc58 │ │ + b.n afc68 │ │ movs r1, r0 │ │ - b.n b06dc │ │ + b.n b06ec │ │ lsls r3, r6, #9 │ │ lsrs r0, r0, #8 │ │ asrs r0, r6, #1 │ │ - b.n afbfc │ │ + b.n afc0c │ │ adds r0, #0 │ │ - b.n afbe8 │ │ + b.n afbf8 │ │ lsrs r4, r2 │ │ - b.n b0350 │ │ + b.n b0360 │ │ asrs r2, r0, #2 │ │ - b.n b01d8 │ │ + b.n b01e8 │ │ asrs r2, r0, #32 │ │ - b.n b05d4 │ │ + b.n b05e4 │ │ movs r1, r0 │ │ - b.n b037e │ │ + b.n b038e │ │ lsls r7, r7, #9 │ │ subs r2, #0 │ │ asrs r4, r0, #4 │ │ - b.n b01e4 │ │ + b.n b01f4 │ │ asrs r2, r0 │ │ - b.n b0164 │ │ + b.n b0174 │ │ str r4, [r0, r0] │ │ - b.n b056e │ │ + b.n b057e │ │ asrs r0, r0, #32 │ │ - b.n b082a │ │ + b.n b083a │ │ adds r1, #1 │ │ - b.n b01f8 │ │ + b.n b0208 │ │ movs r0, #16 │ │ - b.n afc12 │ │ + b.n afc22 │ │ asrs r1, r0, #32 │ │ - b.n b05f8 │ │ + b.n b0608 │ │ movs r0, #4 │ │ - b.n afc00 │ │ + b.n afc10 │ │ movs r4, r2 │ │ - b.n afc1e │ │ + b.n afc2e │ │ movs r0, r0 │ │ - b.n b07a2 │ │ + b.n b07b2 │ │ @ instruction: 0xfff81aff │ │ movs r5, r0 │ │ - b.n b044a │ │ + b.n b045a │ │ asrs r4, r0, #32 │ │ - b.n afb16 │ │ + b.n afb26 │ │ adds r2, #65 @ 0x41 │ │ add.w r0, r0, r4, lsl #24 │ │ - b.n afb3e │ │ + b.n afb4e │ │ movs r0, r0 │ │ - b.n b07c6 │ │ + b.n b07d6 │ │ movs r2, r4 │ │ lsrs r0, r0, #8 │ │ lsls r0, r6, #1 │ │ - b.n afc5c │ │ + b.n afc6c │ │ strb r0, [r0, #0] │ │ - b.n afc46 │ │ + b.n afc56 │ │ asrs r0, r0, #32 │ │ - b.n afc58 │ │ + b.n afc68 │ │ strh r6, [r0, #0] │ │ - b.n b0230 │ │ + b.n b0240 │ │ movs r5, r2 │ │ - b.n b07e2 │ │ + b.n b07f2 │ │ movs r0, r2 │ │ cmp r2, #0 │ │ movs r7, r0 │ │ - b.n b047a │ │ + b.n b048a │ │ movs r0, #0 │ │ - b.n b08fe │ │ + b.n b090e │ │ movs r1, #1 │ │ - b.n afe42 │ │ + b.n afe52 │ │ asrs r3, r0, #32 │ │ - b.n b0906 │ │ + b.n b0916 │ │ asrs r6, r0, #4 │ │ - b.n b024c │ │ + b.n b025c │ │ movs r1, #8 │ │ - b.n b025c │ │ + b.n b026c │ │ str r0, [r0, #0] │ │ - b.n b0492 │ │ + b.n b04a2 │ │ adds r0, #1 │ │ - b.n b007e │ │ + b.n b008e │ │ str r4, [r0, r0] │ │ - b.n af986 │ │ + b.n af996 │ │ movs r5, r0 │ │ - b.n b0404 │ │ + b.n b0414 │ │ str r3, [r0, r0] │ │ adds r1, #160 @ 0xa0 │ │ asrs r4, r0, #32 │ │ str r2, [sp, #260] @ 0x104 │ │ str r4, [r0, r0] │ │ - b.n af96e │ │ + b.n af97e │ │ movs r6, r0 │ │ strh r0, [r4, #12] │ │ movs r4, r0 │ │ - b.n b0854 │ │ + b.n b0864 │ │ @ instruction: 0xfff5caff │ │ movs r2, r1 │ │ and.w r0, r0, r0 │ │ - b.n b0820 │ │ + b.n b0830 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ lsls r1, r0, #4 │ │ - b.n b00b4 │ │ + b.n b00c4 │ │ movs r0, #0 │ │ - b.n afcb2 │ │ + b.n afcc2 │ │ movs r2, r0 │ │ - b.n b042e │ │ + b.n b043e │ │ lsls r2, r0, #8 │ │ ldr r2, [sp, #0] │ │ lsls r1, r0, #4 │ │ - b.n b02a4 │ │ + b.n b02b4 │ │ movs r1, #6 │ │ - b.n b04da │ │ + b.n b04ea │ │ movs r4, r0 │ │ - b.n b069e │ │ + b.n b06ae │ │ asrs r4, r0, #32 │ │ - b.n b04e2 │ │ - str r4, [sp, #288] @ 0x120 │ │ - mla r0, r0, r0, r8 │ │ - b.n afcb8 │ │ + b.n b04f2 │ │ + str r2, [sp, #644] @ 0x284 │ │ + @ instruction: 0xfa008000 │ │ + b.n afcc8 │ │ strh r0, [r0, r1] │ │ - b.n afce2 │ │ + b.n afcf2 │ │ movs r0, r0 │ │ - b.n b085c │ │ + b.n b086c │ │ lsls r6, r4, #1 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n afce4 │ │ + b.n afcf4 │ │ movs r0, r0 │ │ - b.n b085e │ │ + b.n b086e │ │ lsls r2, r1, #1 │ │ lsrs r0, r0, #8 │ │ stmia r0!, {r4} │ │ - b.n b06d0 │ │ + b.n b06e0 │ │ str r0, [r0, #0] │ │ - b.n b090a │ │ + b.n b091a │ │ str r0, [sp, #112] @ 0x70 │ │ - b.n b090e │ │ + b.n b091e │ │ adds r0, #0 │ │ - b.n b0912 │ │ - add r0, pc, #0 @ (adr r0, b01d4 ) │ │ - b.n b0916 │ │ + b.n b0922 │ │ + add r0, pc, #0 @ (adr r0, b01e4 ) │ │ + b.n b0926 │ │ movs r3, r1 │ │ and.w r0, r0, r1, lsl #10 │ │ - b.n b02e0 │ │ + b.n b02f0 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr0, [r0, #32] │ │ - b.n afd06 │ │ - add r0, pc, #4 @ (adr r0, b01ec ) │ │ - b.n b052a │ │ + b.n afd16 │ │ + add r0, pc, #4 @ (adr r0, b01fc ) │ │ + b.n b053a │ │ movs r1, #2 │ │ - b.n b0306 │ │ + b.n b0316 │ │ movs r0, r1 │ │ - b.n afcf6 │ │ + b.n afd06 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr0, [r2, #16] │ │ - b.n afd24 │ │ + b.n afd34 │ │ asrs r2, r0, #32 │ │ - b.n b070e │ │ + b.n b071e │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n b0714 │ │ + b.n b0724 │ │ movs r0, r0 │ │ - b.n b04a8 │ │ + b.n b04b8 │ │ movs r2, r7 │ │ ldrh r0, [r0, #16] │ │ movs r5, r0 │ │ - b.n b054e │ │ + b.n b055e │ │ strh r6, [r0, #0] │ │ - b.n b0552 │ │ + b.n b0562 │ │ ands r1, r1 │ │ - b.n b0176 │ │ + b.n b0186 │ │ str r1, [r0, #0] │ │ - b.n b0726 │ │ + b.n b0736 │ │ asrs r2, r7, #2 │ │ - b.n b05c6 │ │ + b.n b05d6 │ │ lsrs r1, r0, #4 │ │ - b.n b0844 │ │ + b.n b0854 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ asrs r1, r0, #32 │ │ - b.n b073e │ │ + b.n b074e │ │ movs r2, r1 │ │ - b.n b04de │ │ + b.n b04ee │ │ @ instruction: 0xffe91aff │ │ - add r0, pc, #4 @ (adr r0, b0238 ) │ │ - b.n b0576 │ │ + add r0, pc, #4 @ (adr r0, b0248 ) │ │ + b.n b0586 │ │ @ instruction: 0xffeeeaff │ │ lsls r4, r6, #1 │ │ - b.n afd78 │ │ + b.n afd88 │ │ strb r0, [r0, #1] │ │ - b.n afd62 │ │ + b.n afd72 │ │ movs r0, r0 │ │ - b.n afd70 │ │ + b.n afd80 │ │ movs r6, r0 │ │ - b.n b04ea │ │ + b.n b04fa │ │ asrs r7, r0, #32 │ │ - b.n afdfc │ │ + b.n afe0c │ │ adds r0, #1 │ │ movs r2, #131 @ 0x83 │ │ movs r0, r1 │ │ - b.n b0878 │ │ + b.n b0888 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ asrs r0, r6, #2 │ │ - b.n afd8c │ │ + b.n afd9c │ │ lsls r0, r3, #4 │ │ - b.n afd90 │ │ + b.n afda0 │ │ movs r1, r0 │ │ - b.n b0506 │ │ + b.n b0516 │ │ movs r3, r2 │ │ cmp r2, #0 │ │ asrs r4, r3, #4 │ │ - b.n afd9c │ │ + b.n afdac │ │ movs r1, r0 │ │ - b.n b0772 │ │ + b.n b0782 │ │ asrs r4, r2, #32 │ │ - b.n afd7e │ │ + b.n afd8e │ │ lsls r0, r3, #4 │ │ - b.n afd88 │ │ + b.n afd98 │ │ asrs r4, r3 │ │ - b.n afd8c │ │ + b.n afd9c │ │ @ instruction: 0xffdceaff │ │ lsls r4, r3, #1 │ │ - b.n afe34 │ │ + b.n afe44 │ │ asrs r1, r0, #32 │ │ - b.n b09ca │ │ + b.n b09da │ │ movs r0, #255 @ 0xff │ │ - b.n b09ce │ │ + b.n b09de │ │ adds r0, #132 @ 0x84 │ │ - b.n afdac │ │ + b.n afdbc │ │ stmia r0!, {r2, r3, r5, r6} │ │ - b.n afdb0 │ │ + b.n afdc0 │ │ asrs r1, r2, #32 │ │ - b.n b05da │ │ + b.n b05ea │ │ movs r4, r0 │ │ - b.n b05de │ │ - str r3, [sp, #524] @ 0x20c │ │ - @ instruction: 0xfb00c06c │ │ - b.n afde0 │ │ + b.n b05ee │ │ + str r3, [sp, #992] @ 0x3e0 │ │ + @ instruction: 0xfa00c06c │ │ + b.n afdf0 │ │ adds r0, #132 @ 0x84 │ │ - b.n afde4 │ │ + b.n afdf4 │ │ asrs r0, r6, #2 │ │ - b.n afddc │ │ + b.n afdec │ │ lsls r0, r3, #4 │ │ - b.n afde0 │ │ + b.n afdf0 │ │ movs r1, r0 │ │ - b.n b0556 │ │ + b.n b0566 │ │ @ instruction: 0xffeb3aff │ │ movs r4, r0 │ │ - b.n b0746 │ │ + b.n b0756 │ │ ands r3, r0 │ │ - b.n b0602 │ │ + b.n b0612 │ │ strb r4, [r1, #0] │ │ - b.n b0606 │ │ - add r1, pc, #244 @ (adr r1, b03bc ) │ │ + b.n b0616 │ │ + add r1, pc, #244 @ (adr r1, b03cc ) │ │ @ instruction: 0xeb00c007 │ │ - b.n b060e │ │ + b.n b061e │ │ adds r0, #4 │ │ - b.n b0612 │ │ + b.n b0622 │ │ @ instruction: 0xffc7eaff │ │ strh r0, [r0, #4] │ │ - b.n afe14 │ │ + b.n afe24 │ │ lsls r4, r4, #1 │ │ - b.n afe18 │ │ + b.n afe28 │ │ str r0, [sp, #496] @ 0x1f0 │ │ - b.n afe1c │ │ + b.n afe2c │ │ movs r6, r0 │ │ - b.n b0586 │ │ + b.n b0596 │ │ vpmin.u32 , , │ │ vpmin.u32 q15, , │ │ - add r0, pc, #0 @ (adr r0, b02f0 ) │ │ - b.n b0a32 │ │ + add r0, pc, #0 @ (adr r0, b0300 ) │ │ + b.n b0a42 │ │ adds r0, #0 │ │ - b.n b0a36 │ │ + b.n b0a46 │ │ movs r0, r0 │ │ - b.n afe24 │ │ - add r0, pc, #16 @ (adr r0, b030c ) │ │ - b.n afe08 │ │ + b.n afe34 │ │ + add r0, pc, #16 @ (adr r0, b031c ) │ │ + b.n afe18 │ │ movs r3, r0 │ │ - b.n b0382 │ │ + b.n b0392 │ │ movs r0, r0 │ │ - b.n afe10 │ │ + b.n afe20 │ │ lsls r2, r1, #2 │ │ - b.n b041e │ │ + b.n b042e │ │ asrs r0, r1, #32 │ │ - b.n afe38 │ │ + b.n afe48 │ │ cmp r7, #156 @ 0x9c │ │ - b.n afe50 │ │ + b.n afe60 │ │ lsls r0, r0, #4 │ │ - b.n b0420 │ │ - add r0, pc, #464 @ (adr r0, b04e8 ) │ │ - b.n afe54 │ │ + b.n b0430 │ │ + add r0, pc, #464 @ (adr r0, b04f8 ) │ │ + b.n afe64 │ │ movs r0, #2 │ │ - b.n b043c │ │ + b.n b044c │ │ str r0, [sp, #496] @ 0x1f0 │ │ - b.n afe5c │ │ + b.n afe6c │ │ movs r0, #28 │ │ - b.n afe26 │ │ + b.n afe36 │ │ movs r0, #0 │ │ - b.n b0aea │ │ + b.n b0afa │ │ movs r0, #32 │ │ - b.n afe2e │ │ + b.n afe3e │ │ movs r0, #1 │ │ - b.n b0a72 │ │ + b.n b0a82 │ │ movs r0, #36 @ 0x24 │ │ - b.n afe36 │ │ + b.n afe46 │ │ lsls r4, r1, #9 │ │ - b.n afe6e │ │ + b.n afe7e │ │ movs r0, r0 │ │ - b.n b03c0 │ │ + b.n b03d0 │ │ movs r0, r1 │ │ - b.n afe4c │ │ + b.n afe5c │ │ lsls r4, r7, #8 │ │ - b.n afe7a │ │ + b.n afe8a │ │ asrs r4, r1, #9 │ │ - b.n afe7e │ │ + b.n afe8e │ │ movs r1, r0 │ │ - b.n b044e │ │ + b.n b045e │ │ lsls r4, r7, #8 │ │ - b.n afe66 │ │ + b.n afe76 │ │ movs r0, r0 │ │ - b.n b0a96 │ │ + b.n b0aa6 │ │ lsls r0, r1, #9 │ │ - b.n afe6e │ │ + b.n afe7e │ │ lsls r4, r1, #9 │ │ - b.n afe72 │ │ + b.n afe82 │ │ lsls r4, r6, #8 │ │ - b.n afe76 │ │ + b.n afe86 │ │ lsls r0, r7, #1 │ │ - b.n afea0 │ │ + b.n afeb0 │ │ asrs r0, r0, #32 │ │ - b.n afe8a │ │ + b.n afe9a │ │ lsls r0, r7, #5 │ │ - b.n afea8 │ │ + b.n afeb8 │ │ strh r0, [r0, #0] │ │ - b.n afe94 │ │ + b.n afea4 │ │ movs r0, r1 │ │ - b.n b0616 │ │ + b.n b0626 │ │ lsls r7, r0, #5 │ │ cmp r2, #0 │ │ asrs r0, r0, #2 │ │ - b.n afeb8 │ │ + b.n afec8 │ │ movs r0, #208 @ 0xd0 │ │ - b.n b0704 │ │ + b.n b0714 │ │ asrs r0, r5, #1 │ │ - b.n afec0 │ │ + b.n afed0 │ │ lsrs r0, r2 │ │ - b.n b070c │ │ + b.n b071c │ │ asrs r2, r0, #32 │ │ - b.n b0436 │ │ + b.n b0446 │ │ asrs r3, r0, #32 │ │ - b.n b053c │ │ + b.n b054c │ │ movs r5, r5 │ │ cmp r2, #0 │ │ strb r4, [r7, #1] │ │ - b.n afed4 │ │ + b.n afee4 │ │ str r0, [r6, #0] │ │ - b.n b0834 │ │ + b.n b0844 │ │ str r0, [sp, #544] @ 0x220 │ │ - b.n b08bc │ │ + b.n b08cc │ │ movs r0, r0 │ │ - b.n b0a46 │ │ + b.n b0a56 │ │ ands r7, r1 │ │ - b.n b0aea │ │ + b.n b0afa │ │ movs r5, r5 │ │ lsrs r0, r0, #8 │ │ strh r0, [r0, #4] │ │ - b.n afeec │ │ + b.n afefc │ │ movs r0, r2 │ │ and.w r0, r0, r0 │ │ - b.n b0afa │ │ + b.n b0b0a │ │ asrs r0, r0, #32 │ │ - b.n b0afe │ │ + b.n b0b0e │ │ lsls r0, r7, #5 │ │ - b.n afedc │ │ + b.n afeec │ │ movs r7, r0 │ │ - b.n b0706 │ │ - @ instruction: 0xb83a │ │ + b.n b0716 │ │ + @ instruction: 0xb839 │ │ @ instruction: 0xebff5000 │ │ - b.n b070e │ │ + b.n b071e │ │ movs r0, r0 │ │ - b.n b0a7c │ │ + b.n b0a8c │ │ lsls r1, r6, #15 │ │ subs r0, r0, r0 │ │ lsls r0, r2, #3 │ │ - b.n b076a │ │ + b.n b077a │ │ movs r0, #104 @ 0x68 │ │ - b.n aff18 │ │ + b.n aff28 │ │ movs r1, r0 │ │ - b.n b0882 │ │ + b.n b0892 │ │ asrs r0, r0, #32 │ │ - b.n b0968 │ │ + b.n b0978 │ │ movs r0, #208 @ 0xd0 │ │ - b.n b076e │ │ + b.n b077e │ │ lsls r0, r6, #3 │ │ - b.n b077e │ │ + b.n b078e │ │ movs r2, r0 │ │ - b.n b0492 │ │ + b.n b04a2 │ │ movs r3, r0 │ │ - b.n b0598 │ │ + b.n b05a8 │ │ movs r1, r5 │ │ subs r2, #0 │ │ movs r0, r1 │ │ - b.n b0b3e │ │ + b.n b0b4e │ │ adds r0, #40 @ 0x28 │ │ - b.n b0898 │ │ + b.n b08a8 │ │ lsls r4, r1, #2 │ │ - b.n aff20 │ │ + b.n aff30 │ │ movs r6, r0 │ │ - b.n b074a │ │ + b.n b075a │ │ asrs r7, r0, #32 │ │ - b.n b074e │ │ + b.n b075e │ │ movs r0, #9 │ │ - b.n b0752 │ │ + b.n b0762 │ │ strh r0, [r1, #4] │ │ - b.n aff30 │ │ + b.n aff40 │ │ ands r0, r0 │ │ - b.n aff34 │ │ - stmia r0!, {r0, r2} │ │ + b.n aff44 │ │ + stmia r0!, {r2} │ │ @ instruction: 0xebff5030 │ │ - b.n afe58 │ │ + b.n afe68 │ │ movs r0, r0 │ │ - b.n b0ad0 │ │ + b.n b0ae0 │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ movs r4, r5 │ │ - b.n afee4 │ │ + b.n afef4 │ │ movs r0, r0 │ │ - b.n b0ad2 │ │ + b.n b0ae2 │ │ @ instruction: 0xffdf1aff │ │ lsls r5, r0, #31 │ │ - b.n b0a4a │ │ + b.n b0a5a │ │ lsrs r7, r7, #31 │ │ - b.n b0adc │ │ + b.n b0aec │ │ movs r3, r2 │ │ - b.n b08c2 │ │ + b.n b08d2 │ │ movs r0, r0 │ │ - b.n b06f0 │ │ + b.n b0700 │ │ @ instruction: 0xffe01aff │ │ @ instruction: 0xffe1eaff │ │ strb r4, [r7, #1] │ │ - b.n aff8c │ │ + b.n aff9c │ │ str r0, [sp, #544] @ 0x220 │ │ - b.n b0970 │ │ + b.n b0980 │ │ strh r0, [r0, #0] │ │ - b.n b04ea │ │ + b.n b04fa │ │ movs r0, r0 │ │ - b.n b0b0e │ │ + b.n b0b1e │ │ movs r6, r2 │ │ ldmia r2!, {} │ │ movs r2, r5 │ │ and.w r0, r0, r0 │ │ - b.n b0b1a │ │ + b.n b0b2a │ │ movs r0, r5 │ │ - bge.n b046e │ │ + bge.n b047e │ │ movs r7, r0 │ │ - b.n b07b2 │ │ + b.n b07c2 │ │ asrs r0, r0, #32 │ │ - b.n b0bb6 │ │ + b.n b0bc6 │ │ movs r0, #0 │ │ - b.n b0bba │ │ - b.n b0414 │ │ + b.n b0bca │ │ + b.n b0422 │ │ @ instruction: 0xebff4001 │ │ - b.n b0bc2 │ │ + b.n b0bd2 │ │ movs r0, r0 │ │ - b.n b0b26 │ │ + b.n b0b36 │ │ movs r7, r1 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, r0] │ │ - b.n b07ce │ │ + b.n b07de │ │ lsls r2, r6, #30 │ │ - b.n b0aa2 │ │ + b.n b0ab2 │ │ lsrs r7, r7, #31 │ │ - b.n b0b34 │ │ + b.n b0b44 │ │ movs r0, r0 │ │ - b.n b0744 │ │ + b.n b0754 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ lsls r2, r7, #3 │ │ and.w r0, r0, r8, ror #1 │ │ - b.n affe0 │ │ + b.n afff0 │ │ asrs r0, r0, #32 │ │ - b.n affca │ │ + b.n affda │ │ lsls r0, r7, #5 │ │ - b.n affe8 │ │ + b.n afff8 │ │ strh r0, [r0, #0] │ │ - b.n affd4 │ │ + b.n affe4 │ │ strh r0, [r0, #0] │ │ - b.n b0546 │ │ + b.n b0556 │ │ movs r0, r0 │ │ - b.n b0b6a │ │ + b.n b0b7a │ │ movs r4, r2 │ │ - bge.n b04be │ │ + bge.n b04ce │ │ ands r0, r0 │ │ - b.n b0c02 │ │ + b.n b0c12 │ │ movs r0, r0 │ │ - b.n b0b66 │ │ + b.n b0b76 │ │ @ instruction: 0xffe80aff │ │ asrs r4, r5, #5 │ │ - b.n b0008 │ │ + b.n b0018 │ │ movs r1, r0 │ │ - b.n b05e2 │ │ + b.n b05f2 │ │ movs r1, r0 │ │ - b.n b0956 │ │ + b.n b0966 │ │ str r5, [sp, #532] @ 0x214 │ │ add.w r0, r0, r4 │ │ - b.n b05de │ │ + b.n b05ee │ │ movs r2, r0 │ │ - b.n b0b82 │ │ + b.n b0b92 │ │ movs r4, r1 │ │ subs r2, #0 │ │ asrs r0, r0, #1 │ │ - b.n b001e │ │ + b.n b002e │ │ str r0, [r0, r0] │ │ - b.n b082e │ │ + b.n b083e │ │ lsls r0, r3 │ │ - b.n b0014 │ │ + b.n b0024 │ │ str r1, [r0, #0] │ │ - b.n b097e │ │ + b.n b098e │ │ movs r0, r0 │ │ - b.n b0606 │ │ + b.n b0616 │ │ asrs r4, r0, #32 │ │ - b.n b083e │ │ + b.n b084e │ │ str r5, [sp, #492] @ 0x1ec │ │ add.w r0, r0, r5, lsl #20 │ │ - b.n b0606 │ │ + b.n b0616 │ │ movs r1, r0 │ │ - b.n b0baa │ │ + b.n b0bba │ │ @ instruction: 0xfff98aff │ │ movs r2, r0 │ │ and.w r0, r0, r0, lsl #20 │ │ - b.n b0c56 │ │ + b.n b0c66 │ │ movs r0, r0 │ │ and.w r0, r0, r0, lsl #20 │ │ - b.n b085e │ │ + b.n b086e │ │ asrs r4, r0, #1 │ │ - b.n b0056 │ │ + b.n b0066 │ │ lsls r2, r6, #2 │ │ - b.n b08c8 │ │ + b.n b08d8 │ │ asrs r4, r1, #32 │ │ - b.n b004c │ │ + b.n b005c │ │ movs r0, #1 │ │ - b.n b0a2e │ │ + b.n b0a3e │ │ ands r5, r0 │ │ - b.n b0636 │ │ + b.n b0646 │ │ movs r1, r0 │ │ - b.n b07da │ │ + b.n b07ea │ │ ands r1, r0 │ │ movs r2, #132 @ 0x84 │ │ movs r1, r0 │ │ - b.n b0be8 │ │ + b.n b0bf8 │ │ lsls r0, r5, #2 │ │ ldrh r0, [r0, #16] │ │ asrs r0, r4, #2 │ │ - b.n b007a │ │ + b.n b008a │ │ movs r0, r0 │ │ - b.n b0652 │ │ + b.n b0662 │ │ movs r2, #76 @ 0x4c │ │ - b.n b0082 │ │ + b.n b0092 │ │ asrs r0, r0, #32 │ │ - b.n b0074 │ │ + b.n b0084 │ │ asrs r2, r0, #32 │ │ - b.n b0658 │ │ + b.n b0668 │ │ movs r0, r0 │ │ - b.n b07fc │ │ + b.n b080c │ │ lsls r1, r4, #2 │ │ ldr r2, [sp, #0] │ │ eors r0, r7 │ │ - b.n b009c │ │ + b.n b00ac │ │ movs r0, r0 │ │ - b.n b008e │ │ + b.n b009e │ │ adds r1, #43 @ 0x2b │ │ add.w r0, r0, r8, asr #1 │ │ - b.n b00a8 │ │ + b.n b00b8 │ │ ands r0, r0 │ │ - b.n b009a │ │ + b.n b00aa │ │ strh r0, [r0, #4] │ │ - b.n b00b0 │ │ + b.n b00c0 │ │ movs r0, #0 │ │ - b.n b009a │ │ + b.n b00aa │ │ asrs r4, r0, #32 │ │ - b.n b009e │ │ + b.n b00ae │ │ movs r0, r0 │ │ - b.n b0cc2 │ │ + b.n b0cd2 │ │ str r0, [sp, #0] │ │ - b.n b00ae │ │ + b.n b00be │ │ lsls r0, r7, #5 │ │ - b.n b00a4 │ │ + b.n b00b4 │ │ movs r0, #0 │ │ - b.n b009e │ │ + b.n b00ae │ │ movs r0, r0 │ │ - b.n b0c32 │ │ + b.n b0c42 │ │ movs r0, #0 │ │ - b.n b0cd6 │ │ + b.n b0ce6 │ │ asrs r4, r0, #32 │ │ - b.n b00aa │ │ + b.n b00ba │ │ movs r1, r5 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n b00ca │ │ + b.n b00da │ │ movs r0, r0 │ │ - b.n b0628 │ │ + b.n b0638 │ │ movs r1, r0 │ │ - b.n b0c4a │ │ + b.n b0c5a │ │ movs r0, r2 │ │ rev r0, r0 │ │ asrs r4, r5, #5 │ │ - b.n b00ec │ │ + b.n b00fc │ │ movs r1, r0 │ │ - b.n b06b6 │ │ + b.n b06c6 │ │ movs r1, r0 │ │ - b.n b0a3a │ │ + b.n b0a4a │ │ str r5, [sp, #304] @ 0x130 │ │ add.w r0, r0, r2 │ │ - b.n b0c62 │ │ + b.n b0c72 │ │ movs r4, r1 │ │ subs r2, #0 │ │ asrs r0, r0, #1 │ │ - b.n b00fe │ │ + b.n b010e │ │ str r0, [r0, r0] │ │ - b.n b090e │ │ + b.n b091e │ │ lsls r0, r3 │ │ - b.n b00f4 │ │ + b.n b0104 │ │ str r1, [r0, #0] │ │ - b.n b0a5e │ │ + b.n b0a6e │ │ movs r0, r0 │ │ - b.n b06e6 │ │ + b.n b06f6 │ │ asrs r4, r0, #32 │ │ - b.n b091e │ │ + b.n b092e │ │ str r5, [sp, #268] @ 0x10c │ │ add.w r0, r0, r5, lsl #20 │ │ - b.n b06e6 │ │ + b.n b06f6 │ │ movs r1, r0 │ │ - b.n b0c8a │ │ + b.n b0c9a │ │ @ instruction: 0xfff98aff │ │ movs r2, r0 │ │ and.w r0, r0, r0, lsl #20 │ │ - b.n b0d36 │ │ + b.n b0d46 │ │ movs r0, r0 │ │ and.w r0, r0, r0, lsl #20 │ │ - b.n b093e │ │ + b.n b094e │ │ asrs r4, r0, #1 │ │ - b.n b0136 │ │ + b.n b0146 │ │ lsls r2, r6, #2 │ │ - b.n b09a8 │ │ + b.n b09b8 │ │ asrs r4, r1, #32 │ │ - b.n b012c │ │ + b.n b013c │ │ movs r0, #1 │ │ - b.n b0b0e │ │ + b.n b0b1e │ │ ands r5, r0 │ │ - b.n b0716 │ │ + b.n b0726 │ │ movs r1, r0 │ │ - b.n b08ba │ │ + b.n b08ca │ │ ands r1, r0 │ │ movs r2, #132 @ 0x84 │ │ movs r1, r0 │ │ - b.n b0cc8 │ │ + b.n b0cd8 │ │ movs r7, r7 │ │ ldrh r0, [r0, #16] │ │ asrs r0, r4, #2 │ │ - b.n b015a │ │ + b.n b016a │ │ movs r0, r0 │ │ - b.n b0732 │ │ + b.n b0742 │ │ movs r2, #76 @ 0x4c │ │ - b.n b0162 │ │ + b.n b0172 │ │ asrs r0, r0, #32 │ │ - b.n b0154 │ │ + b.n b0164 │ │ asrs r2, r0, #32 │ │ - b.n b0738 │ │ + b.n b0748 │ │ movs r0, r0 │ │ - b.n b08dc │ │ + b.n b08ec │ │ movs r0, r7 │ │ ldr r2, [sp, #0] │ │ movs r1, #120 @ 0x78 │ │ - b.n b017c │ │ + b.n b018c │ │ asrs r4, r0, #32 │ │ - b.n b0176 │ │ + b.n b0186 │ │ strb r2, [r0, #0] │ │ - b.n b06dc │ │ + b.n b06ec │ │ lsls r4, r5, #5 │ │ - b.n b0188 │ │ + b.n b0198 │ │ movs r0, #3 │ │ - b.n b0d60 │ │ + b.n b0d70 │ │ movs r2, r0 │ │ - b.n b0d38 │ │ + b.n b0d48 │ │ adds r0, #8 │ │ - b.n b0d9a │ │ + b.n b0daa │ │ asrs r0, r7, #32 │ │ - b.n b0af4 │ │ + b.n b0b04 │ │ str r2, [r0, #0] │ │ - b.n b09a2 │ │ + b.n b09b2 │ │ adds r0, #52 @ 0x34 │ │ - b.n b007c │ │ + b.n b008c │ │ str r0, [r0, #0] │ │ adds r1, #160 @ 0xa0 │ │ movs r0, r0 │ │ - b.n b0912 │ │ + b.n b0922 │ │ str r2, [r0, #0] │ │ str r1, [sp, #640] @ 0x280 │ │ movs r4, r0 │ │ - b.n b0db6 │ │ + b.n b0dc6 │ │ lsls r6, r0, #4 │ │ - b.n b077a │ │ + b.n b078a │ │ movs r4, r7 │ │ - b.n b0094 │ │ + b.n b00a4 │ │ lsls r4, r7, #1 │ │ - b.n b01bc │ │ + b.n b01cc │ │ movs r0, #64 @ 0x40 │ │ - b.n b0b1c │ │ + b.n b0b2c │ │ subs r0, #1 │ │ - b.n b0dca │ │ + b.n b0dda │ │ strh r0, [r7, #0] │ │ - b.n b00a4 │ │ + b.n b00b4 │ │ bx r4 │ │ add.w r0, r0, r0 │ │ - b.n b0d36 │ │ + b.n b0d46 │ │ lsls r2, r5, #12 │ │ subs r0, r0, r0 │ │ lsls r0, r7, #1 │ │ - b.n b01d8 │ │ + b.n b01e8 │ │ ands r0, r0 │ │ - b.n b01c2 │ │ + b.n b01d2 │ │ lsls r0, r7, #5 │ │ - b.n b01e0 │ │ + b.n b01f0 │ │ asrs r0, r0, #32 │ │ - b.n b01d2 │ │ + b.n b01e2 │ │ movs r0, #0 │ │ - b.n b0730 │ │ + b.n b0740 │ │ movs r6, r0 │ │ - b.n b0956 │ │ + b.n b0966 │ │ str r2, [r0, #0] │ │ adds r1, #160 @ 0xa0 │ │ movs r1, r0 │ │ - b.n b096c │ │ + b.n b097c │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n b096e │ │ + b.n b097e │ │ lsls r1, r0, #1 │ │ subs r2, #0 │ │ asrs r0, r0, #1 │ │ - b.n b01fe │ │ + b.n b020e │ │ asrs r4, r0, #32 │ │ - b.n b01f0 │ │ + b.n b0200 │ │ lsls r1, r0, #12 │ │ - b.n b0cf4 │ │ + b.n b0d04 │ │ movs r6, r0 │ │ lsls r7, r0, #1 │ │ str r0, [r0, r4] │ │ - b.n b0642 │ │ + b.n b0652 │ │ lsls r0, r0, #1 │ │ - b.n b0114 │ │ + b.n b0124 │ │ str r0, [r0, #0] │ │ - b.n b01ea │ │ + b.n b01fa │ │ asrs r4, r0, #32 │ │ - b.n b0a26 │ │ + b.n b0a36 │ │ movs r0, #60 @ 0x3c │ │ - b.n b0120 │ │ - str r3, [sp, #212] @ 0xd4 │ │ + b.n b0130 │ │ + str r2, [sp, #1000] @ 0x3e8 │ │ mla r0, r0, r0, r5 │ │ - b.n b01fa │ │ + b.n b020a │ │ lsls r0, r7, #5 │ │ - b.n b0230 │ │ + b.n b0240 │ │ negs r4, r0 │ │ - b.n b022e │ │ + b.n b023e │ │ movs r6, r0 │ │ - b.n b07fe │ │ + b.n b080e │ │ lsls r0, r7, #5 │ │ - b.n b021c │ │ + b.n b022c │ │ asrs r0, r0, #32 │ │ - b.n b022e │ │ + b.n b023e │ │ movs r1, r0 │ │ - b.n b09aa │ │ + b.n b09ba │ │ stc2l 10, cr2, [r9, #1020]! @ 0x3fc @ │ │ strh r0, [r0, #4] │ │ - b.n b024c │ │ + b.n b025c │ │ movs r0, #208 @ 0xd0 │ │ - b.n b0aa6 │ │ + b.n b0ab6 │ │ movs r0, #1 │ │ - b.n b0c3e │ │ + b.n b0c4e │ │ asrs r0, r0, #32 │ │ - b.n b0c64 │ │ + b.n b0c74 │ │ @ instruction: 0xff99eaff │ │ lsls r4, r5, #8 │ │ - b.n b0260 │ │ + b.n b0270 │ │ movs r0, #8 │ │ - b.n b0e6a │ │ + b.n b0e7a │ │ movs r0, #140 @ 0x8c │ │ - b.n b0248 │ │ + b.n b0258 │ │ movs r0, #0 │ │ - b.n b0e72 │ │ + b.n b0e82 │ │ movs r0, #136 @ 0x88 │ │ - b.n b0250 │ │ + b.n b0260 │ │ lsls r4, r0, #9 │ │ - b.n b025a │ │ + b.n b026a │ │ asrs r4, r4, #8 │ │ - b.n b02f8 │ │ + b.n b0308 │ │ movs r0, r0 │ │ - b.n b0262 │ │ + b.n b0272 │ │ asrs r2, r0, #32 │ │ - b.n b0e48 │ │ + b.n b0e58 │ │ asrs r4, r4, #8 │ │ - b.n b02e4 │ │ + b.n b02f4 │ │ asrs r4, r0, #32 │ │ - b.n b0e8e │ │ + b.n b0e9e │ │ movs r0, #40 @ 0x28 │ │ - b.n b0168 │ │ + b.n b0178 │ │ movs r0, #40 @ 0x28 │ │ - b.n b0bec │ │ + b.n b0bfc │ │ lsls r0, r0, #4 │ │ - b.n b085c │ │ + b.n b086c │ │ movs r4, r4 │ │ - b.n b0174 │ │ + b.n b0184 │ │ lsls r4, r7, #1 │ │ - b.n b029c │ │ + b.n b02ac │ │ asrs r0, r1, #2 │ │ - b.n b0c80 │ │ - ldr r5, [pc, #280] @ (b0880 ) │ │ + b.n b0c90 │ │ + ldr r5, [pc, #280] @ (b0890 ) │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n b0aae │ │ + b.n b0abe │ │ lsls r4, r4, #8 │ │ - b.n b032c │ │ + b.n b033c │ │ movs r2, r0 │ │ - b.n b0bf6 │ │ + b.n b0c06 │ │ lsls r4, r4, #8 │ │ - b.n b0314 │ │ + b.n b0324 │ │ lsls r0, r4, #2 │ │ - b.n b02b2 │ │ + b.n b02c2 │ │ asrs r4, r1, #9 │ │ - b.n b02b6 │ │ + b.n b02c6 │ │ movs r0, r0 │ │ - b.n b02a6 │ │ + b.n b02b6 │ │ movs r1, r0 │ │ - b.n b088a │ │ + b.n b089a │ │ movs r4, r0 │ │ - b.n b0a2e │ │ + b.n b0a3e │ │ movs r0, r1 │ │ cmp r2, #0 │ │ movs r0, r0 │ │ - b.n b0e40 │ │ + b.n b0e50 │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ asrs r4, r7, #1 │ │ - b.n b02d8 │ │ + b.n b02e8 │ │ lsls r0, r1, #2 │ │ - b.n b0cbc │ │ + b.n b0ccc │ │ movs r0, #1 │ │ - b.n b0ee6 │ │ + b.n b0ef6 │ │ adds r0, #3 │ │ - b.n b0eea │ │ + b.n b0efa │ │ cmp r0, #123 @ 0x7b │ │ add.w r0, r0, ip, lsl #22 │ │ - b.n b02ec │ │ + b.n b02fc │ │ @ instruction: 0xfff0eaff │ │ lsls r2, r6, #30 │ │ - b.n b0dca │ │ + b.n b0dda │ │ lsrs r7, r7, #31 │ │ - b.n b0e5c │ │ + b.n b0e6c │ │ movs r0, r0 │ │ - b.n b0a6c │ │ + b.n b0a7c │ │ movs r0, r0 │ │ asrs r5, r2, #13 │ │ lsls r4, r6, #11 │ │ subs r0, r0, r0 │ │ @ instruction: 0xff9beaff │ │ movs r0, r0 │ │ - b.n b08de │ │ + b.n b08ee │ │ lsls r0, r7, #5 │ │ - b.n b02f0 │ │ + b.n b0300 │ │ strh r0, [r0, #0] │ │ - b.n b0302 │ │ + b.n b0312 │ │ movs r0, r1 │ │ - b.n b0a7e │ │ + b.n b0a8e │ │ @ instruction: 0xffca3aff │ │ mcr2 10, 7, lr, cr4, cr15, {7} @ │ │ lsls r4, r5, #8 │ │ - b.n b0324 │ │ + b.n b0334 │ │ movs r0, #8 │ │ - b.n b0f2e │ │ + b.n b0f3e │ │ movs r0, #140 @ 0x8c │ │ - b.n b030c │ │ + b.n b031c │ │ movs r0, #0 │ │ - b.n b0f36 │ │ + b.n b0f46 │ │ movs r0, #136 @ 0x88 │ │ - b.n b0314 │ │ + b.n b0324 │ │ lsls r4, r0, #9 │ │ - b.n b031e │ │ + b.n b032e │ │ asrs r4, r4, #8 │ │ - b.n b03bc │ │ + b.n b03cc │ │ movs r0, r0 │ │ - b.n b0326 │ │ + b.n b0336 │ │ asrs r2, r0, #32 │ │ - b.n b0f0c │ │ + b.n b0f1c │ │ movs r0, #40 @ 0x28 │ │ - b.n b0224 │ │ + b.n b0234 │ │ movs r0, #40 @ 0x28 │ │ - b.n b0ca8 │ │ + b.n b0cb8 │ │ asrs r4, r4, #8 │ │ - b.n b03b0 │ │ + b.n b03c0 │ │ asrs r4, r0, #32 │ │ - b.n b0f5a │ │ + b.n b0f6a │ │ lsls r0, r0, #4 │ │ - b.n b0920 │ │ + b.n b0930 │ │ movs r4, r4 │ │ - b.n b0238 │ │ + b.n b0248 │ │ movs r7, r0 │ │ - b.n b0b66 │ │ + b.n b0b76 │ │ asrs r1, r1, #32 │ │ - b.n b0b6a │ │ - ldr r5, [pc, #84] @ (b0880 ) │ │ + b.n b0b7a │ │ + ldr r5, [pc, #84] @ (b0890 ) │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n b0b72 │ │ + b.n b0b82 │ │ lsls r4, r4, #8 │ │ - b.n b03f0 │ │ + b.n b0400 │ │ movs r2, r0 │ │ - b.n b0cba │ │ + b.n b0cca │ │ lsls r4, r4, #8 │ │ - b.n b03d8 │ │ + b.n b03e8 │ │ lsls r0, r4, #2 │ │ - b.n b0376 │ │ + b.n b0386 │ │ asrs r4, r1, #9 │ │ - b.n b037a │ │ + b.n b038a │ │ movs r0, r0 │ │ - b.n b036a │ │ + b.n b037a │ │ movs r1, r0 │ │ - b.n b094e │ │ + b.n b095e │ │ movs r4, r0 │ │ - b.n b0af2 │ │ + b.n b0b02 │ │ movs r0, r1 │ │ cmp r2, #0 │ │ movs r0, r0 │ │ - b.n b0f04 │ │ + b.n b0f14 │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ movs r1, r1 │ │ - b.n b0ba2 │ │ + b.n b0bb2 │ │ asrs r7, r0, #32 │ │ - b.n b0ba6 │ │ + b.n b0bb6 │ │ movs r0, #1 │ │ - b.n b0faa │ │ + b.n b0fba │ │ adds r0, #3 │ │ - b.n b0fae │ │ + b.n b0fbe │ │ cmp r0, #74 @ 0x4a │ │ add.w r0, r0, ip, lsl #22 │ │ - b.n b03b0 │ │ + b.n b03c0 │ │ @ instruction: 0xfff0eaff │ │ lsls r5, r0, #31 │ │ - b.n b0e8e │ │ + b.n b0e9e │ │ lsrs r7, r7, #31 │ │ - b.n b0f20 │ │ + b.n b0f30 │ │ movs r3, r2 │ │ - b.n b0d06 │ │ + b.n b0d16 │ │ movs r0, r0 │ │ - b.n b0b34 │ │ + b.n b0b44 │ │ vpmin.u q0, , │ │ movs r0, r0 │ │ - b.n b0f3c │ │ + b.n b0f4c │ │ lsls r0, r7, #10 │ │ subs r0, r0, r0 │ │ vpmin.u q7, q8, │ │ lsls r0, r6, #1 │ │ - b.n b03d8 │ │ + b.n b03e8 │ │ asrs r4, r2, #1 │ │ - b.n b03dc │ │ + b.n b03ec │ │ strh r0, [r0, #4] │ │ - b.n b03e0 │ │ + b.n b03f0 │ │ movs r0, r0 │ │ - b.n b03ca │ │ + b.n b03da │ │ movs r0, #148 @ 0x94 │ │ - b.n b03d0 │ │ + b.n b03e0 │ │ asrs r4, r7, #5 │ │ - b.n b03ec │ │ + b.n b03fc │ │ ands r0, r0 │ │ - b.n b03d6 │ │ + b.n b03e6 │ │ movs r4, r0 │ │ - b.n b09be │ │ + b.n b09ce │ │ movs r1, r0 │ │ - b.n b0b5e │ │ + b.n b0b6e │ │ lsls r7, r1, #2 │ │ ldr r2, [sp, #0] │ │ movs r1, #128 @ 0x80 │ │ - b.n b0400 │ │ + b.n b0410 │ │ movs r4, r0 │ │ - b.n b0b6e │ │ + b.n b0b7e │ │ lsls r0, r7, #3 │ │ cmp r2, #0 │ │ adds r0, #76 @ 0x4c │ │ - b.n b040c │ │ + b.n b041c │ │ stmia r0!, {r0} │ │ - b.n b095e │ │ + b.n b096e │ │ lsls r0, r0, #1 │ │ - b.n b040e │ │ - add r0, pc, #8 @ (adr r0, b08e4 ) │ │ - b.n b0966 │ │ + b.n b041e │ │ + add r0, pc, #8 @ (adr r0, b08f4 ) │ │ + b.n b0976 │ │ ldrsh r2, [r3, r5] │ │ - b.n b0dfc │ │ + b.n b0e0c │ │ str r0, [r2, #12] │ │ - b.n b0c6c │ │ + b.n b0c7c │ │ adds r0, #80 @ 0x50 │ │ - b.n b0424 │ │ + b.n b0434 │ │ asrs r4, r2, #2 │ │ - b.n b040e │ │ + b.n b041e │ │ strh r0, [r2, #6] │ │ - b.n b0c78 │ │ + b.n b0c88 │ │ movs r1, r0 │ │ - b.n b0baa │ │ + b.n b0bba │ │ movs r4, r6 │ │ cmp r2, #0 │ │ asrs r0, r1, #32 │ │ - b.n b09aa │ │ + b.n b09ba │ │ asrs r1, r1, #32 │ │ - b.n b0ab0 │ │ + b.n b0ac0 │ │ movs r1, r6 │ │ subs r2, #0 │ │ str r0, [sp, #496] @ 0x1f0 │ │ - b.n b0444 │ │ + b.n b0454 │ │ asrs r4, r7, #18 │ │ - b.n b0cae │ │ + b.n b0cbe │ │ adds r0, #0 │ │ - b.n b10d2 │ │ + b.n b10e2 │ │ movs r1, #108 @ 0x6c │ │ - b.n b0450 │ │ + b.n b0460 │ │ asrs r0, r2, #32 │ │ - b.n b0d9c │ │ + b.n b0dac │ │ strh r0, [r0, #4] │ │ - b.n b0458 │ │ + b.n b0468 │ │ asrs r1, r4, #4 │ │ - b.n b0a28 │ │ + b.n b0a38 │ │ adds r0, #1 │ │ - b.n b0e3e │ │ + b.n b0e4e │ │ movs r1, r0 │ │ - b.n b0bde │ │ + b.n b0bee │ │ adds r0, #3 │ │ - b.n b1034 │ │ + b.n b1044 │ │ movs r0, #10 │ │ adds r1, #160 @ 0xa0 │ │ movs r1, r0 │ │ - b.n b0bdc │ │ - add r0, pc, #464 @ (adr r0, b0b08 ) │ │ - b.n b0474 │ │ + b.n b0bec │ │ + add r0, pc, #464 @ (adr r0, b0b18 ) │ │ + b.n b0484 │ │ asrs r5, r0, #32 │ │ - b.n b0c7e │ │ + b.n b0c8e │ │ adds r0, #148 @ 0x94 │ │ strh r0, [r2, #44] @ 0x2c │ │ movs r2, r1 │ │ - b.n b0c86 │ │ + b.n b0c96 │ │ ldrh r1, [r1, #26] │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n b0c8e │ │ + b.n b0c9e │ │ movs r0, r0 │ │ - b.n b0ffc │ │ + b.n b100c │ │ ldc2l 10, cr0, [r8, #-1020] @ 0xfffffc04 @ │ │ lsls r4, r1, #8 │ │ and.w r0, r0, r0, lsl #8 │ │ - b.n b047e │ │ + b.n b048e │ │ adds r0, #1 │ │ - b.n b0ca2 │ │ + b.n b0cb2 │ │ str r1, [r0, #0] │ │ - b.n b10a6 │ │ + b.n b10b6 │ │ movs r2, r0 │ │ - b.n b0c0c │ │ + b.n b0c1c │ │ movs r6, r0 │ │ ldrh r0, [r0, #16] │ │ strb r3, [r0, #4] │ │ - b.n b0892 │ │ + b.n b08a2 │ │ adds r0, #1 │ │ - b.n b0e7c │ │ + b.n b0e8c │ │ movs r2, r0 │ │ - b.n b0c20 │ │ + b.n b0c30 │ │ strb r1, [r0, #4] │ │ - b.n b087e │ │ + b.n b088e │ │ strb r7, [r0, #0] │ │ - b.n b0d0e │ │ + b.n b0d1e │ │ asrs r1, r0, #32 │ │ - b.n b0a94 │ │ + b.n b0aa4 │ │ @ instruction: 0xfff89aff │ │ asrs r1, r0, #32 │ │ - b.n b0e10 │ │ + b.n b0e20 │ │ asrs r0, r0, #32 │ │ - b.n b0492 │ │ + b.n b04a2 │ │ lsls r2, r0, #4 │ │ - b.n b1156 │ │ + b.n b1166 │ │ lsls r0, r2, #9 │ │ - b.n b04ae │ │ - ldc2 10, cr14, [pc, #1020]! @ b0d98 @ │ │ + b.n b04be │ │ + ldc2 10, cr14, [pc, #1020]! @ b0da8 @ │ │ lsls r6, r0, #4 │ │ - b.n b08cc │ │ + b.n b08dc │ │ str r7, [r0, r0] │ │ - b.n b0ce6 │ │ + b.n b0cf6 │ │ movs r0, #4 │ │ - b.n b0514 │ │ + b.n b0524 │ │ movs r2, r0 │ │ - b.n b0c4e │ │ + b.n b0c5e │ │ stc2l 10, cr9, [r0, #1020]! @ 0x3fc @ │ │ lsls r6, r0, #4 │ │ - b.n b0ac0 │ │ + b.n b0ad0 │ │ movs r1, #1 │ │ - b.n b0cfa │ │ + b.n b0d0a │ │ asrs r5, r0, #32 │ │ - b.n b0cfe │ │ - str r2, [sp, #516] @ 0x204 │ │ + b.n b0d0e │ │ + str r1, [sp, #712] @ 0x2c8 │ │ mla r1, r0, r6, r2 │ │ - b.n b0d06 │ │ + b.n b0d16 │ │ movs r5, r0 │ │ - b.n b0d0a │ │ + b.n b0d1a │ │ ldc2l 10, cr14, [r3, #1020]! @ 0x3fc @ │ │ movs r0, #8 │ │ - b.n b0a7e │ │ + b.n b0a8e │ │ asrs r0, r0, #32 │ │ - b.n b1116 │ │ + b.n b1126 │ │ movs r0, #9 │ │ - b.n b0b88 │ │ + b.n b0b98 │ │ str r0, [sp, #496] @ 0x1f0 │ │ - b.n b0518 │ │ + b.n b0528 │ │ asrs r4, r6, #1 │ │ movs r5, #157 @ 0x9d │ │ movs r0, #8 │ │ movs r0, #70 @ 0x46 │ │ asrs r0, r7, #4 │ │ movs r5, #145 @ 0x91 │ │ asrs r2, r0, #32 │ │ movs r0, #129 @ 0x81 │ │ movs r1, #108 @ 0x6c │ │ - b.n b052c │ │ + b.n b053c │ │ lsls r2, r2, #6 │ │ - b.n b09f8 │ │ + b.n b0a08 │ │ movs r4, r1 │ │ - b.n b0c9c │ │ + b.n b0cac │ │ @ instruction: 0xffc22aff │ │ lsls r4, r6, #1 │ │ - b.n b053c │ │ + b.n b054c │ │ asrs r5, r0, #32 │ │ - b.n b0d46 │ │ + b.n b0d56 │ │ strh r4, [r1, #0] │ │ - b.n b0d4a │ │ + b.n b0d5a │ │ stmia r1!, {r4, r7} │ │ - b.n b0528 │ │ + b.n b0538 │ │ strh r0, [r7, #48] @ 0x30 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n b0d56 │ │ + b.n b0d66 │ │ movs r1, r0 │ │ - b.n b0e9a │ │ + b.n b0eaa │ │ movs r2, r0 │ │ - b.n b10fe │ │ + b.n b110e │ │ movs r3, r7 │ │ subs r2, #0 │ │ movs r0, r6 │ │ - b.n b0560 │ │ + b.n b0570 │ │ movs r0, #44 @ 0x2c │ │ - b.n b0564 │ │ + b.n b0574 │ │ lsls r0, r2, #3 │ │ - b.n b0dae │ │ + b.n b0dbe │ │ movs r0, #208 @ 0xd0 │ │ - b.n b0db6 │ │ + b.n b0dc6 │ │ movs r0, r0 │ │ - b.n b0ada │ │ + b.n b0aea │ │ movs r1, r0 │ │ - b.n b0be0 │ │ + b.n b0bf0 │ │ movs r2, r1 │ │ subs r2, #0 │ │ movs r0, r6 │ │ - b.n b057c │ │ + b.n b058c │ │ asrs r0, r2, #1 │ │ - b.n b0580 │ │ + b.n b0590 │ │ ldrh r2, [r1, #0] │ │ add.w r0, r0, r0 │ │ - b.n b10ee │ │ + b.n b10fe │ │ lsls r1, r3, #1 │ │ subs r0, r0, r0 │ │ lsrs r6, r4, #31 │ │ - b.n b0f74 │ │ + b.n b0f84 │ │ lsrs r7, r5, #11 │ │ orn r0, r0, #11534336 @ 0xb00000 │ │ - b.n b0598 │ │ + b.n b05a8 │ │ lsrs r7, r1, #11 │ │ orr.w r0, r0, #8388608 @ 0x800000 │ │ - b.n b11a6 │ │ + b.n b11b6 │ │ lsls r0, r5, #6 │ │ - b.n b0584 │ │ + b.n b0594 │ │ lsls r0, r2, #6 │ │ - b.n b05a8 │ │ + b.n b05b8 │ │ movs r0, r0 │ │ - b.n b1112 │ │ + b.n b1122 │ │ movs r0, r5 │ │ ldmia r2!, {} │ │ lsls r4, r6, #1 │ │ - b.n b05b4 │ │ + b.n b05c4 │ │ ldrsh r2, [r3, r5] │ │ - b.n b0f98 │ │ + b.n b0fa8 │ │ str r0, [sp, #496] @ 0x1f0 │ │ - b.n b05bc │ │ + b.n b05cc │ │ stmia r0!, {r3} │ │ - b.n b0dc6 │ │ + b.n b0dd6 │ │ lsls r0, r0, #1 │ │ - b.n b05aa │ │ + b.n b05ba │ │ @ instruction: 0xff9eeaff │ │ asrs r4, r0, #1 │ │ - b.n b05c6 │ │ + b.n b05d6 │ │ adds r0, #3 │ │ - b.n b11d6 │ │ + b.n b11e6 │ │ asrs r2, r6, #2 │ │ - b.n b0e3c │ │ + b.n b0e4c │ │ asrs r1, r0, #2 │ │ - b.n b0ba4 │ │ + b.n b0bb4 │ │ movs r1, r0 │ │ - b.n b0d46 │ │ + b.n b0d56 │ │ stc2 10, cr2, [r5, #1020] @ 0x3fc @ │ │ asrs r0, r7, #1 │ │ - b.n b05e4 │ │ + b.n b05f4 │ │ asrs r0, r0, #32 │ │ - b.n b05d0 │ │ + b.n b05e0 │ │ lsrs r4, r2 │ │ - b.n b0d34 │ │ + b.n b0d44 │ │ asrs r2, r0, #32 │ │ - b.n b0bc0 │ │ + b.n b0bd0 │ │ movs r1, r0 │ │ - b.n b0d62 │ │ + b.n b0d72 │ │ lsls r2, r6, #1 │ │ cmp r2, #0 │ │ lsls r0, r7, #1 │ │ - b.n b05fc │ │ + b.n b060c │ │ subs r2, #124 @ 0x7c │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n b0e0a │ │ + b.n b0e1a │ │ movs r0, r0 │ │ - b.n b116e │ │ + b.n b117e │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #9 │ │ - b.n b060a │ │ + b.n b061a │ │ lsls r1, r5, #1 │ │ and.w r0, r0, r0, ror #1 │ │ - b.n b0618 │ │ + b.n b0628 │ │ subs r2, #117 @ 0x75 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n b0e26 │ │ + b.n b0e36 │ │ movs r0, r0 │ │ - b.n b118a │ │ + b.n b119a │ │ lsls r4, r2, #1 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n b11dc │ │ + b.n b11ec │ │ ldc2l 10, cr0, [r0], #1020 @ 0x3fc @ │ │ movs r0, r0 │ │ - b.n b11a4 │ │ + b.n b11b4 │ │ lsls r7, r4, #8 │ │ subs r0, r0, r0 │ │ mrc2 10, 0, lr, cr7, cr15, {7} @ │ │ lsls r0, r6, #5 │ │ - b.n b06c0 │ │ + b.n b06d0 │ │ movs r0, r0 │ │ - b.n b11aa │ │ + b.n b11ba │ │ vpmin.u32 , q14, │ │ lsls r0, r4, #6 │ │ @ instruction: 0xea00a074 │ │ - b.n b0650 │ │ + b.n b0660 │ │ movs r4, r4 │ │ and.w r0, r0, ip, lsl #1 │ │ - b.n b0658 │ │ + b.n b0668 │ │ stmia r0!, {r3} │ │ - b.n b0e62 │ │ + b.n b0e72 │ │ asrs r0, r2, #1 │ │ - b.n b0660 │ │ + b.n b0670 │ │ str r0, [sp, #496] @ 0x1f0 │ │ - b.n b0664 │ │ + b.n b0674 │ │ movs r1, r1 │ │ ldmia.w r0, {r2, r5} │ │ ldmia.w r1, {ip} │ │ - b.n b1276 │ │ + b.n b1286 │ │ strb r2, [r0, #0] │ │ - b.n b0bda │ │ + b.n b0bea │ │ adds r0, #5 │ │ - b.n b0ce4 │ │ + b.n b0cf4 │ │ ldrsh r2, [r3, r5] │ │ - b.n b105c │ │ + b.n b106c │ │ asrs r4, r6, #1 │ │ movs r5, #157 @ 0x9d │ │ movs r2, r0 │ │ movs r0, #64 @ 0x40 │ │ asrs r0, r7, #4 │ │ movs r5, #145 @ 0x91 │ │ asrs r0, r0, #32 │ │ movs r0, #129 @ 0x81 │ │ lsls r4, r6, #1 │ │ - b.n b0690 │ │ + b.n b06a0 │ │ lsls r0, r0, #1 │ │ - b.n b067a │ │ + b.n b068a │ │ movs r0, #148 @ 0x94 │ │ - b.n b067e │ │ - add r1, pc, #584 @ (adr r1, b0da8 ) │ │ - b.n b0c26 │ │ + b.n b068e │ │ + add r1, pc, #584 @ (adr r1, b0db8 ) │ │ + b.n b0c36 │ │ movs r1, r0 │ │ - b.n b120a │ │ + b.n b121a │ │ vpmin.u32 , , │ │ lsls r0, r6, #5 │ │ - b.n b0728 │ │ + b.n b0738 │ │ movs r0, r0 │ │ - b.n b1212 │ │ + b.n b1222 │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ lsrs r4, r4, #23 │ │ - b.n b06b8 │ │ + b.n b06c8 │ │ movs r0, r0 │ │ - b.n b0c9c │ │ + b.n b0cac │ │ lsls r2, r3, #1 │ │ - b.n b0722 │ │ + b.n b0732 │ │ movs r3, r0 │ │ - b.n b1226 │ │ + b.n b1236 │ │ movs r2, r2 │ │ cmp r2, #0 │ │ movs r1, r0 │ │ - b.n b12ce │ │ + b.n b12de │ │ lsls r0, r6, #5 │ │ - b.n b072c │ │ + b.n b073c │ │ lsls r4, r6, #1 │ │ - b.n b06d0 │ │ + b.n b06e0 │ │ subs r2, r3, #5 │ │ - b.n b10b4 │ │ + b.n b10c4 │ │ movs r0, #10 │ │ - b.n b0ede │ │ + b.n b0eee │ │ adds r0, #8 │ │ - b.n b0ee2 │ │ - add r0, pc, #0 @ (adr r0, b0ba4 ) │ │ - b.n b0ee6 │ │ + b.n b0ef2 │ │ + add r0, pc, #0 @ (adr r0, b0bb4 ) │ │ + b.n b0ef6 │ │ strh r2, [r3, #62] @ 0x3e │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n b0eee │ │ + b.n b0efe │ │ strh r0, [r0, #4] │ │ - b.n b06ec │ │ + b.n b06fc │ │ str r0, [sp, #496] @ 0x1f0 │ │ - b.n b06f0 │ │ + b.n b0700 │ │ vpmin.u32 q15, q10, │ │ - add r0, pc, #464 @ (adr r0, b0d8c ) │ │ - b.n b06f8 │ │ + add r0, pc, #464 @ (adr r0, b0d9c ) │ │ + b.n b0708 │ │ str r0, [r0, r0] │ │ - b.n b0f02 │ │ + b.n b0f12 │ │ strh r0, [r0, #4] │ │ - b.n b0700 │ │ + b.n b0710 │ │ movs r1, r0 │ │ - b.n b12aa │ │ + b.n b12ba │ │ str r0, [sp, #496] @ 0x1f0 │ │ - b.n b0708 │ │ + b.n b0718 │ │ lsls r3, r4, #16 │ │ lsrs r0, r0, #8 │ │ vpmin.u16 q15, , │ │ strb r4, [r5, #8] │ │ - b.n b0714 │ │ + b.n b0724 │ │ lsls r4, r7, #5 │ │ - b.n b0718 │ │ + b.n b0728 │ │ adds r1, #128 @ 0x80 │ │ - b.n b071c │ │ + b.n b072c │ │ strb r0, [r0, #1] │ │ - b.n b0714 │ │ + b.n b0724 │ │ strb r4, [r0, #0] │ │ - b.n b0718 │ │ + b.n b0728 │ │ lsls r1, r0, #12 │ │ - b.n b121c │ │ + b.n b122c │ │ ldrb r4, [r2, #31] │ │ - b.n b0730 │ │ + b.n b0740 │ │ ldr r4, [r2, #124] @ 0x7c │ │ - b.n b0734 │ │ + b.n b0744 │ │ strb r7, [r0, #0] │ │ - b.n b0d18 │ │ + b.n b0d28 │ │ movs r0, r1 │ │ - b.n b0718 │ │ + b.n b0728 │ │ str r6, [r0, #0] │ │ - b.n b0d20 │ │ + b.n b0d30 │ │ movs r0, #28 │ │ - b.n b0720 │ │ + b.n b0730 │ │ ands r4, r0 │ │ - b.n b0724 │ │ + b.n b0734 │ │ movs r3, r0 │ │ - b.n b134e │ │ + b.n b135e │ │ strb r6, [r0, #0] │ │ lsls r0, r4, #6 │ │ adds r0, #12 │ │ - b.n b0730 │ │ + b.n b0740 │ │ strb r0, [r0, #0] │ │ - b.n b0734 │ │ + b.n b0744 │ │ movs r4, #188 @ 0xbc │ │ - b.n b121e │ │ + b.n b122e │ │ asrs r0, r2, #32 │ │ - b.n b073c │ │ - add r0, pc, #80 @ (adr r0, b0c74 ) │ │ - b.n b0740 │ │ + b.n b074c │ │ + add r0, pc, #80 @ (adr r0, b0c84 ) │ │ + b.n b0750 │ │ strh r0, [r3, #0] │ │ - b.n b0744 │ │ + b.n b0754 │ │ subs r4, r6, #7 │ │ - b.n b076c │ │ + b.n b077c │ │ subs r7, #244 @ 0xf4 │ │ - b.n b0770 │ │ + b.n b0780 │ │ asrs r1, r0, #32 │ │ - b.n b0d54 │ │ + b.n b0d64 │ │ adds r0, #3 │ │ - b.n b0d58 │ │ - add r1, sp, #488 @ 0x1e8 │ │ + b.n b0d68 │ │ + add r1, sp, #484 @ 0x1e4 │ │ @ instruction: 0xebffffd1 │ │ @ instruction: 0xeaff10a0 │ │ - b.n b077a │ │ + b.n b078a │ │ movs r2, #76 @ 0x4c │ │ - b.n b077e │ │ + b.n b078e │ │ lsls r0, r1, #9 │ │ - b.n b0782 │ │ + b.n b0792 │ │ adds r0, #4 │ │ - b.n b0674 │ │ + b.n b0684 │ │ movs r0, r0 │ │ - b.n b12f6 │ │ + b.n b1306 │ │ asrs r3, r0, #4 │ │ - b.n b0d5c │ │ + b.n b0d6c │ │ asrs r2, r0 │ │ - b.n b0ce0 │ │ + b.n b0cf0 │ │ str r4, [r0, r0] │ │ - b.n b10ea │ │ + b.n b10fa │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ - add r0, pc, #464 @ (adr r0, b0e38 ) │ │ - b.n b07a4 │ │ + add r0, pc, #464 @ (adr r0, b0e48 ) │ │ + b.n b07b4 │ │ str r0, [sp, #496] @ 0x1f0 │ │ - b.n b07a8 │ │ + b.n b07b8 │ │ ldc2 10, cr14, [ip, #-1020] @ 0xfffffc04 @ │ │ - add r0, pc, #464 @ (adr r0, b0e44 ) │ │ - b.n b07b0 │ │ + add r0, pc, #464 @ (adr r0, b0e54 ) │ │ + b.n b07c0 │ │ asrs r0, r0, #32 │ │ - b.n b13ba │ │ + b.n b13ca │ │ str r0, [sp, #496] @ 0x1f0 │ │ - b.n b07b8 │ │ + b.n b07c8 │ │ stc2 10, cr14, [r0, #-1020]! @ 0xfffffc04 @ │ │ movs r0, r0 │ │ - b.n b1326 │ │ + b.n b1336 │ │ stc2l 10, cr0, [r7, #-1020] @ 0xfffffc04 @ │ │ asrs r0, r7, #1 │ │ - b.n b07c8 │ │ + b.n b07d8 │ │ adds r0, #16 │ │ - b.n b07b2 │ │ + b.n b07c2 │ │ asrs r0, r0, #32 │ │ - b.n b07b8 │ │ + b.n b07c8 │ │ movs r0, #0 │ │ - b.n b07bc │ │ + b.n b07cc │ │ movs r0, #1 │ │ - b.n b11a2 │ │ + b.n b11b2 │ │ movs r0, #0 │ │ - b.n b07a4 │ │ + b.n b07b4 │ │ adds r1, #2 │ │ - b.n b0ba8 │ │ + b.n b0bb8 │ │ movs r4, r2 │ │ - b.n b07ca │ │ + b.n b07da │ │ @ instruction: 0xfff4eaff │ │ - @ instruction: 0xeb840002 │ │ + @ instruction: 0xeb940002 │ │ movs r0, r0 │ │ - b.n b135e │ │ + b.n b136e │ │ lsls r5, r7, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, r7 │ │ - b.n b07f8 │ │ + b.n b0808 │ │ str r0, [r0, #0] │ │ - b.n b07e2 │ │ + b.n b07f2 │ │ adds r0, #4 │ │ - b.n b07e6 │ │ + b.n b07f6 │ │ lsls r0, r0, #1 │ │ - b.n b0804 │ │ + b.n b0814 │ │ lsls r1, r0, #8 │ │ ldmia.w r0, {ip, sp, lr} │ │ - b.n b0d7e │ │ + b.n b0d8e │ │ strb r1, [r1, #0] │ │ - b.n b0e7c │ │ + b.n b0e8c │ │ movs r0, r5 │ │ cmp r2, #0 │ │ strb r0, [r0, #0] │ │ - b.n b0d8a │ │ + b.n b0d9a │ │ asrs r0, r0, #32 │ │ - b.n b1422 │ │ + b.n b1432 │ │ strb r1, [r1, #0] │ │ - b.n b0e8c │ │ + b.n b0e9c │ │ strh r0, [r0, #0] │ │ - b.n b142a │ │ + b.n b143a │ │ movs r5, r0 │ │ subs r2, #0 │ │ strb r0, [r0, #1] │ │ - b.n b0826 │ │ + b.n b0836 │ │ strb r4, [r0, #0] │ │ - b.n b0824 │ │ + b.n b0834 │ │ strb r1, [r0, #12] │ │ - b.n b1128 │ │ + b.n b1138 │ │ strb r0, [r0, #7] │ │ asrs r2, r3, #22 │ │ str r0, [r0, r0] │ │ asrs r6, r0, #1 │ │ strh r5, [r0, #0] │ │ asrs r7, r0, #2 │ │ strb r6, [r0, #0] │ │ - b.n b0daa │ │ - b.n b0d14 │ │ - b.n b14ce │ │ + b.n b0dba │ │ + b.n b0d24 │ │ + b.n b14de │ │ adds r0, #3 │ │ - b.n b0ec4 │ │ + b.n b0ed4 │ │ lsls r7, r6, #1 │ │ cmp r2, #0 │ │ str r0, [r0, #28] │ │ - b.n b084e │ │ + b.n b085e │ │ movs r0, r0 │ │ - b.n b13ca │ │ + b.n b13da │ │ lsls r4, r6, #1 │ │ lsrs r0, r0, #8 │ │ stmia r1!, {r3, r6, r7} │ │ - b.n b085a │ │ + b.n b086a │ │ strb r4, [r1, #0] │ │ - b.n b106a │ │ + b.n b107a │ │ str r6, [r0, r4] │ │ - b.n b0d4a │ │ + b.n b0d5a │ │ adds r0, #7 │ │ - b.n b1072 │ │ + b.n b1082 │ │ str r5, [r0, r0] │ │ - b.n b0c9c │ │ + b.n b0cac │ │ str r0, [r0, r0] │ │ - b.n b0de4 │ │ + b.n b0df4 │ │ asrs r4, r0, #32 │ │ - b.n b0864 │ │ + b.n b0874 │ │ str r1, [r0, r0] │ │ - b.n b124e │ │ + b.n b125e │ │ asrs r1, r1, #32 │ │ - b.n b0ee8 │ │ + b.n b0ef8 │ │ strb r3, [r0, #0] │ │ adds r1, #160 @ 0xa0 │ │ str r5, [r4, #8] │ │ - b.n b108e │ │ + b.n b109e │ │ movs r5, r0 │ │ - b.n b13fc │ │ + b.n b140c │ │ @ instruction: 0xfff48aff │ │ movs r4, r0 │ │ - b.n b1404 │ │ + b.n b1414 │ │ lsls r1, r3, #1 │ │ subs r2, #0 │ │ str r0, [r0, #0] │ │ - b.n b0890 │ │ + b.n b08a0 │ │ asrs r4, r0, #32 │ │ - b.n b0894 │ │ + b.n b08a4 │ │ adds r0, #0 │ │ - b.n b0e16 │ │ + b.n b0e26 │ │ asrs r1, r1, #32 │ │ - b.n b0f10 │ │ + b.n b0f20 │ │ asrs r0, r0, #32 │ │ - b.n b14b2 │ │ + b.n b14c2 │ │ asrs r1, r0, #32 │ │ adds r3, #0 │ │ strb r1, [r0, #6] │ │ - b.n b0e88 │ │ + b.n b0e98 │ │ lsls r4, r2, #1 │ │ and.w r1, r0, r0, lsl #31 │ │ - b.n b08b6 │ │ + b.n b08c6 │ │ str r0, [r0, r0] │ │ - b.n b0e12 │ │ + b.n b0e22 │ │ str r5, [r0, r0] │ │ - b.n b0e98 │ │ + b.n b0ea8 │ │ movs r1, r0 │ │ - b.n b1438 │ │ + b.n b1448 │ │ @ instruction: 0xffd11aff │ │ movs r0, r0 │ │ - b.n b1444 │ │ + b.n b1454 │ │ movs r1, r3 │ │ lsrs r0, r0, #8 │ │ movs r1, #200 @ 0xc8 │ │ - b.n b08d2 │ │ + b.n b08e2 │ │ strb r0, [r0, #0] │ │ - b.n b14e2 │ │ + b.n b14f2 │ │ lsrs r0, r2 │ │ - b.n b112a │ │ + b.n b113a │ │ movs r0, #0 │ │ - b.n b0e52 │ │ + b.n b0e62 │ │ movs r0, #9 │ │ - b.n b0f58 │ │ + b.n b0f68 │ │ strb r1, [r0, #0] │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n b1464 │ │ + b.n b1474 │ │ movs r0, #9 │ │ - b.n b10fa │ │ + b.n b110a │ │ movs r0, #5 │ │ asrs r0, r4, #6 │ │ str r6, [r0, #0] │ │ - b.n b0e62 │ │ + b.n b0e72 │ │ asrs r3, r0, #32 │ │ - b.n b0f78 │ │ + b.n b0f88 │ │ asrs r0, r0, #32 │ │ - b.n b150a │ │ + b.n b151a │ │ asrs r1, r0, #32 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n b1474 │ │ + b.n b1484 │ │ movs r0, #5 │ │ lsls r0, r4, #6 │ │ movs r0, r0 │ │ - b.n b1488 │ │ + b.n b1498 │ │ movs r4, r0 │ │ asrs r0, r4, #6 │ │ movs r0, r0 │ │ - b.n b1484 │ │ + b.n b1494 │ │ movs r4, r0 │ │ lsls r0, r4, #6 │ │ movs r6, r1 │ │ @ instruction: 0xea00f000 │ │ - b.n b142e │ │ - blx 4b1430 │ │ + b.n b143e │ │ + blx 4b1440 │ │ @ instruction: 0xffffffff │ │ @ instruction: 0xffffffff │ │ ... │ │ movs r0, #6 │ │ - b.n b0ea6 │ │ + b.n b0eb6 │ │ asrs r0, r0, #32 │ │ - b.n b15ca │ │ + b.n b15da │ │ movs r0, #3 │ │ - b.n b0fc0 │ │ + b.n b0fd0 │ │ movs r0, #0 │ │ - b.n b1552 │ │ + b.n b1562 │ │ movs r0, #1 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n b14be │ │ + b.n b14ce │ │ str r0, [sp, #4] │ │ lsls r0, r4, #6 │ │ movs r1, r0 │ │ lsls r0, r4, #6 │ │ movs r0, #9 │ │ - b.n b1166 │ │ + b.n b1176 │ │ lsls r0, r1, #2 │ │ - b.n b0944 │ │ + b.n b0954 │ │ movs r0, r1 │ │ - b.n b156e │ │ + b.n b157e │ │ movs r4, r4 │ │ - b.n b0848 │ │ + b.n b0858 │ │ lsls r0, r1, #2 │ │ - b.n b1350 │ │ + b.n b1360 │ │ movs r0, r5 │ │ - b.n b0850 │ │ + b.n b0860 │ │ movs r0, r0 │ │ - b.n b157e │ │ + b.n b158e │ │ str r0, [sp, #496] @ 0x1f0 │ │ - b.n b097c │ │ + b.n b098c │ │ adds r0, #48 @ 0x30 │ │ - b.n b12dc │ │ + b.n b12ec │ │ movs r4, r5 │ │ - b.n b0860 │ │ + b.n b0870 │ │ movs r0, r6 │ │ - b.n b0864 │ │ + b.n b0874 │ │ movs r0, r2 │ │ - b.n b1592 │ │ + b.n b15a2 │ │ movs r0, #140 @ 0x8c │ │ - b.n b0970 │ │ + b.n b0980 │ │ movs r0, #40 @ 0x28 │ │ - b.n b12f0 │ │ + b.n b1300 │ │ movs r0, r0 │ │ - b.n b0978 │ │ + b.n b0988 │ │ movs r0, r7 │ │ - b.n b12f8 │ │ + b.n b1308 │ │ asrs r1, r1, #32 │ │ - b.n b11a6 │ │ - pop {r1, r4, r5, r6, pc} │ │ + b.n b11b6 │ │ + pop {r0, r4, r5, r6, pc} │ │ @ instruction: 0xebff5038 │ │ - b.n b08a4 │ │ + b.n b08b4 │ │ movs r0, r0 │ │ - b.n b151c │ │ + b.n b152c │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ asrs r0, r4, #2 │ │ - b.n b09ae │ │ + b.n b09be │ │ movs r0, #64 @ 0x40 │ │ - b.n b09b2 │ │ + b.n b09c2 │ │ movs r4, r5 │ │ - b.n b08b8 │ │ + b.n b08c8 │ │ adds r0, #0 │ │ - b.n b09a8 │ │ + b.n b09b8 │ │ strb r0, [r1, #0] │ │ - b.n b09ae │ │ + b.n b09be │ │ movs r0, #4 │ │ - b.n b15ce │ │ + b.n b15de │ │ movs r1, #3 │ │ - b.n b0f96 │ │ + b.n b0fa6 │ │ adds r0, #2 │ │ - b.n b0f16 │ │ + b.n b0f26 │ │ lsls r7, r0, #2 │ │ - b.n b1140 │ │ + b.n b1150 │ │ lsls r0, r3, #3 │ │ cmp r2, #0 │ │ movs r0, r6 │ │ - b.n b08d8 │ │ - str r1, [sp, #284] @ 0x11c │ │ + b.n b08e8 │ │ + str r1, [sp, #48] @ 0x30 │ │ mla r0, r0, r0, r5 │ │ - b.n b15ea │ │ + b.n b15fa │ │ movs r0, r0 │ │ - b.n b1558 │ │ + b.n b1568 │ │ lsls r6, r6, #2 │ │ subs r0, r0, r0 │ │ lsls r4, r1, #9 │ │ - b.n b09ea │ │ + b.n b09fa │ │ str r0, [r0, r0] │ │ - b.n b15fa │ │ + b.n b160a │ │ movs r0, r0 │ │ - b.n b155e │ │ + b.n b156e │ │ lsls r6, r6, #4 │ │ lsrs r0, r0, #8 │ │ lsls r3, r6, #2 │ │ and.w r0, r0, r0, lsl #24 │ │ - b.n b160a │ │ + b.n b161a │ │ movs r2, r0 │ │ - b.n b1578 │ │ + b.n b1588 │ │ movs r5, r0 │ │ subs r2, #0 │ │ str r0, [r0, #0] │ │ - b.n b0a04 │ │ + b.n b0a14 │ │ asrs r4, r0, #32 │ │ - b.n b0a08 │ │ + b.n b0a18 │ │ movs r0, r0 │ │ - b.n b0f8a │ │ + b.n b0f9a │ │ str r0, [r0, #0] │ │ - b.n b1622 │ │ + b.n b1632 │ │ movs r1, r1 │ │ - b.n b1088 │ │ + b.n b1098 │ │ str r1, [r0, #0] │ │ adds r3, #0 │ │ lsls r6, r0, #6 │ │ - b.n b0ffc │ │ + b.n b100c │ │ movs r4, r1 │ │ - b.n b0f72 │ │ + b.n b0f82 │ │ asrs r0, r0, #7 │ │ - b.n b1236 │ │ + b.n b1246 │ │ asrs r4, r4, #32 │ │ - b.n b0a14 │ │ + b.n b0a24 │ │ asrs r4, r0, #32 │ │ - b.n b0f82 │ │ + b.n b0f92 │ │ movs r0, r0 │ │ - b.n b1642 │ │ + b.n b1652 │ │ adds r0, #0 │ │ - b.n b1646 │ │ + b.n b1656 │ │ ands r0, r5 │ │ - b.n b0a24 │ │ + b.n b0a34 │ │ asrs r4, r0, #2 │ │ - b.n b0a28 │ │ - str r1, [sp, #188] @ 0xbc │ │ + b.n b0a38 │ │ + str r1, [sp, #184] @ 0xb8 │ │ @ instruction: 0xfa006028 │ │ - b.n b0a50 │ │ + b.n b0a60 │ │ ands r0, r0 │ │ - b.n b165a │ │ + b.n b166a │ │ str r0, [sp, #496] @ 0x1f0 │ │ - b.n b0a58 │ │ + b.n b0a68 │ │ stmia r0!, {r0} │ │ - b.n b1262 │ │ + b.n b1272 │ │ strb r0, [r0, #0] │ │ - b.n b1266 │ │ + b.n b1276 │ │ movs r0, r4 │ │ - b.n b0a44 │ │ + b.n b0a54 │ │ asrs r0, r0, #1 │ │ - b.n b0a62 │ │ + b.n b0a72 │ │ str r2, [r1, r0] │ │ - b.n b1272 │ │ + b.n b1282 │ │ movs r0, r7 │ │ - b.n b0a70 │ │ - add r0, pc, #16 @ (adr r0, b0f48 ) │ │ - b.n b0fc6 │ │ + b.n b0a80 │ │ + add r0, pc, #16 @ (adr r0, b0f58 ) │ │ + b.n b0fd6 │ │ strb r4, [r0, #0] │ │ - b.n b0a60 │ │ + b.n b0a70 │ │ asrs r0, r0, #1 │ │ - b.n b0a7c │ │ + b.n b0a8c │ │ movs r1, r1 │ │ ldmia.w r0, {r0, r8, r9} │ │ - b.n b1578 │ │ + b.n b1588 │ │ strh r1, [r0, #0] │ │ asrs r0, r1, #9 │ │ movs r0, #0 │ │ - b.n b0a74 │ │ + b.n b0a84 │ │ asrs r4, r0, #32 │ │ - b.n b0a78 │ │ + b.n b0a88 │ │ str r2, [r0, #0] │ │ - b.n b0ffa │ │ + b.n b100a │ │ adds r0, #1 │ │ - b.n b1104 │ │ + b.n b1114 │ │ lsls r2, r7, #3 │ │ subs r2, #0 │ │ str r0, [r0, #28] │ │ - b.n b0a90 │ │ + b.n b0aa0 │ │ adds r0, #2 │ │ - b.n b0fea │ │ + b.n b0ffa │ │ movs r3, r0 │ │ - b.n b107a │ │ + b.n b108a │ │ movs r0, r0 │ │ - b.n b1222 │ │ + b.n b1232 │ │ lsls r0, r2, #13 │ │ cmp r2, #0 │ │ str r4, [r4, r0] │ │ - b.n b0ab4 │ │ + b.n b0ac4 │ │ movs r0, r0 │ │ - b.n b162a │ │ + b.n b163a │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ movs r5, r0 │ │ - b.n b1236 │ │ + b.n b1246 │ │ movs r3, r0 │ │ cmp r2, #0 │ │ asrs r4, r6, #1 │ │ - b.n b0ac8 │ │ + b.n b0ad8 │ │ asrs r0, r1, #7 │ │ - b.n b0ab4 │ │ + b.n b0ac4 │ │ movs r1, #136 @ 0x88 │ │ - b.n b0ef8 │ │ + b.n b0f08 │ │ movs r3, r1 │ │ and.w r0, r0, r3, lsl #24 │ │ - b.n b10a8 │ │ + b.n b10b8 │ │ movs r6, r0 │ │ - b.n b1252 │ │ + b.n b1262 │ │ movs r4, r0 │ │ cmp r2, #0 │ │ movs r0, #5 │ │ - b.n b104e │ │ + b.n b105e │ │ asrs r0, r0, #32 │ │ - b.n b1530 │ │ + b.n b1540 │ │ movs r0, #8 │ │ - b.n b10d6 │ │ + b.n b10e6 │ │ asrs r0, r0, #32 │ │ - b.n b14f8 │ │ + b.n b1508 │ │ movs r4, r0 │ │ and.w r0, r0, r4, ror #5 │ │ - b.n b0af8 │ │ + b.n b0b08 │ │ movs r0, #3 │ │ - b.n b1052 │ │ + b.n b1062 │ │ asrs r0, r1, #7 │ │ - b.n b0ae8 │ │ + b.n b0af8 │ │ movs r1, #130 @ 0x82 │ │ - b.n b0f2c │ │ + b.n b0f3c │ │ asrs r4, r0, #32 │ │ - b.n b0af0 │ │ + b.n b0b00 │ │ asrs r4, r1, #2 │ │ - b.n b0aec │ │ + b.n b0afc │ │ asrs r1, r0, #32 │ │ - b.n b12fa │ │ + b.n b130a │ │ eors r4, r4 │ │ - b.n b0af4 │ │ + b.n b0b04 │ │ movs r0, #136 @ 0x88 │ │ - b.n b0af8 │ │ + b.n b0b08 │ │ lsls r4, r7, #12 │ │ lsrs r0, r0, #8 │ │ movs r0, r1 │ │ - b.n b1726 │ │ + b.n b1736 │ │ movs r0, #40 @ 0x28 │ │ - b.n b1480 │ │ + b.n b1490 │ │ movs r4, r4 │ │ - b.n b0a04 │ │ + b.n b0a14 │ │ lsls r0, r1, #2 │ │ - b.n b150c │ │ + b.n b151c │ │ movs r0, r5 │ │ - b.n b0a0c │ │ + b.n b0a1c │ │ movs r0, r0 │ │ - b.n b173a │ │ + b.n b174a │ │ movs r4, r5 │ │ - b.n b0a14 │ │ + b.n b0a24 │ │ adds r0, #48 @ 0x30 │ │ - b.n b1498 │ │ + b.n b14a8 │ │ movs r0, r6 │ │ - b.n b0a1c │ │ + b.n b0a2c │ │ movs r0, r2 │ │ - b.n b174a │ │ + b.n b175a │ │ movs r0, r0 │ │ - b.n b0b28 │ │ + b.n b0b38 │ │ lsls r0, r0, #1 │ │ - b.n b14a8 │ │ + b.n b14b8 │ │ asrs r1, r1, #32 │ │ - b.n b1356 │ │ + b.n b1366 │ │ ands r4, r1 │ │ - b.n b135a │ │ - pop {r0, r2, pc} │ │ + b.n b136a │ │ + pop {r2, pc} │ │ @ instruction: 0xebff5040 │ │ - b.n b0a58 │ │ + b.n b0a68 │ │ movs r0, r0 │ │ - b.n b16d0 │ │ + b.n b16e0 │ │ lsls r2, r6, #1 │ │ subs r0, r0, r0 │ │ lsls r1, r0, #12 │ │ - b.n b143c │ │ + b.n b144c │ │ movs r0, #1 │ │ - b.n b1772 │ │ + b.n b1782 │ │ asrs r4, r6, #1 │ │ - b.n b0b70 │ │ + b.n b0b80 │ │ str r2, [r1, #0] │ │ - b.n b137a │ │ + b.n b138a │ │ lsrs r0, r4, #20 │ │ - b.n b1082 │ │ + b.n b1092 │ │ strh r0, [r0, #0] │ │ - b.n b1152 │ │ + b.n b1162 │ │ movs r4, r5 │ │ - b.n b0a7c │ │ + b.n b0a8c │ │ asrs r0, r0, #1 │ │ - b.n b0b6c │ │ + b.n b0b7c │ │ movs r1, #32 │ │ - b.n b10d2 │ │ + b.n b10e2 │ │ movs r0, #108 @ 0x6c │ │ - b.n b0b6c │ │ + b.n b0b7c │ │ movs r0, #0 │ │ - b.n b1816 │ │ + b.n b1826 │ │ movs r1, #32 │ │ - b.n b115e │ │ + b.n b116e │ │ movs r2, r0 │ │ - b.n b1312 │ │ + b.n b1322 │ │ movs r1, r5 │ │ ldr r2, [sp, #0] │ │ adds r0, #7 │ │ - b.n b0c08 │ │ + b.n b0c18 │ │ str r4, [r0, r0] │ │ - b.n b13aa │ │ + b.n b13ba │ │ movs r4, r0 │ │ - b.n b1694 │ │ + b.n b16a4 │ │ adds r0, #8 │ │ - b.n b13b2 │ │ + b.n b13c2 │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ adds r0, #56 @ 0x38 │ │ - b.n b0bb4 │ │ + b.n b0bc4 │ │ str r4, [r0, r0] │ │ - b.n b13be │ │ - b.n b1080 │ │ - b.n b0ba8 │ │ + b.n b13ce │ │ + b.n b1090 │ │ + b.n b0bb8 │ │ str r0, [sp, #16] │ │ - b.n b0bac │ │ + b.n b0bbc │ │ adds r0, #64 @ 0x40 │ │ - b.n b0bc4 │ │ + b.n b0bd4 │ │ asrs r0, r0, #1 │ │ ldmia.w r3, {ip, sp} │ │ - b.n b17d2 │ │ + b.n b17e2 │ │ strb r6, [r0, #0] │ │ - b.n b1152 │ │ + b.n b1162 │ │ strb r4, [r1, #0] │ │ - b.n b124c │ │ + b.n b125c │ │ str r0, [sp, #496] @ 0x1f0 │ │ - b.n b0bd8 │ │ + b.n b0be8 │ │ adds r0, #116 @ 0x74 │ │ movs r5, #157 @ 0x9d │ │ strb r6, [r0, #0] │ │ movs r0, #78 @ 0x4e │ │ adds r1, #192 @ 0xc0 │ │ movs r5, #147 @ 0x93 │ │ adds r0, #7 │ │ movs r0, #131 @ 0x83 │ │ adds r0, #8 │ │ - b.n b1138 │ │ + b.n b1148 │ │ strb r4, [r0, #2] │ │ - b.n b0bf0 │ │ + b.n b0c00 │ │ movs r0, r0 │ │ - b.n b1768 │ │ + b.n b1778 │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ - b.n b1100 │ │ - b.n b0bfc │ │ + b.n b1110 │ │ + b.n b0c0c │ │ movs r0, r0 │ │ - b.n b176c │ │ + b.n b177c │ │ movs r6, r1 │ │ lsrs r0, r0, #8 │ │ adds r2, #158 @ 0x9e │ │ - b.n b11dc │ │ + b.n b11ec │ │ strb r5, [r2, #10] │ │ - b.n b1118 │ │ + b.n b1128 │ │ str r3, [r0, #0] │ │ - b.n b115a │ │ + b.n b116a │ │ movs r2, r0 │ │ - b.n b1786 │ │ + b.n b1796 │ │ movs r2, r1 │ │ subs r2, #0 │ │ str r4, [r0, r2] │ │ - b.n b0c1c │ │ + b.n b0c2c │ │ strb r4, [r5, #1] │ │ - b.n b0c20 │ │ + b.n b0c30 │ │ movs r0, #5 │ │ - b.n b11fe │ │ + b.n b120e │ │ adds r0, #3 │ │ - b.n b1178 │ │ + b.n b1188 │ │ stmia r0!, {r0, r1, r2} │ │ - b.n b11f6 │ │ + b.n b1206 │ │ ldrb r6, [r3, #18] │ │ - b.n b11fa │ │ + b.n b120a │ │ cmp r4, #148 @ 0x94 │ │ - b.n b113e │ │ + b.n b114e │ │ movs r3, r0 │ │ - b.n b13a2 │ │ + b.n b13b2 │ │ str r1, [r0, #0] │ │ adds r2, #70 @ 0x46 │ │ movs r0, r0 │ │ and.w r0, r0, r2, lsl #24 │ │ - b.n b144a │ │ + b.n b145a │ │ movs r0, #4 │ │ - b.n b184e │ │ + b.n b185e │ │ asrs r0, r1, #32 │ │ - b.n b0c34 │ │ + b.n b0c44 │ │ movs r1, #6 │ │ - b.n b121a │ │ + b.n b122a │ │ adds r0, #2 │ │ - b.n b119a │ │ + b.n b11aa │ │ movs r1, r0 │ │ - b.n b13c4 │ │ + b.n b13d4 │ │ movs r6, r5 │ │ cmp r2, #0 │ │ asrs r0, r6, #1 │ │ - b.n b0c60 │ │ + b.n b0c70 │ │ movs r1, #6 │ │ - b.n b146a │ │ + b.n b147a │ │ movs r0, r6 │ │ - b.n b0b64 │ │ + b.n b0b74 │ │ asrs r0, r0, #32 │ │ - b.n b0c54 │ │ + b.n b0c64 │ │ str r4, [r0, #0] │ │ - b.n b0a36 │ │ + b.n b0a46 │ │ asrs r2, r1, #4 │ │ - b.n b123c │ │ + b.n b124c │ │ asrs r6, r0, #4 │ │ - b.n b11c0 │ │ + b.n b11d0 │ │ asrs r4, r0, #32 │ │ - b.n b1644 │ │ - str r0, [sp, #384] @ 0x180 │ │ - @ instruction: 0xfb000084 │ │ - b.n b0c84 │ │ + b.n b1654 │ │ + ldrh r1, [r7, #52] @ 0x34 │ │ + @ instruction: 0xfa000084 │ │ + b.n b0c94 │ │ stmia r0!, {r2} │ │ - b.n b148e │ │ + b.n b149e │ │ asrs r4, r5, #1 │ │ - b.n b0c8c │ │ + b.n b0c9c │ │ eors r4, r4 │ │ - b.n b0c90 │ │ + b.n b0ca0 │ │ movs r0, r0 │ │ - b.n b125c │ │ - add r0, pc, #464 @ (adr r0, b132c ) │ │ - b.n b0c98 │ │ + b.n b126c │ │ + add r0, pc, #464 @ (adr r0, b133c ) │ │ + b.n b0ca8 │ │ movs r6, r0 │ │ - b.n b1262 │ │ + b.n b1272 │ │ ands r4, r0 │ │ - b.n b1272 │ │ + b.n b1282 │ │ str r0, [r5, #0] │ │ - b.n b0ca4 │ │ + b.n b0cb4 │ │ lsls r4, r0, #2 │ │ - b.n b0c88 │ │ + b.n b0c98 │ │ movs r6, r0 │ │ - b.n b141a │ │ + b.n b142a │ │ vpmin.u32 , q14, │ │ strh r0, [r0, #4] │ │ - b.n b0cb4 │ │ + b.n b0cc4 │ │ lsls r4, r1, #9 │ │ - b.n b0cb2 │ │ + b.n b0cc2 │ │ str r0, [r0, r0] │ │ - b.n b18c2 │ │ + b.n b18d2 │ │ movs r0, r0 │ │ - b.n b1826 │ │ + b.n b1836 │ │ lsls r4, r0, #2 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ and.w r0, r0, r1 │ │ - b.n b187c │ │ + b.n b188c │ │ lsls r1, r0, #2 │ │ subs r0, r0, r0 │ │ asrs r4, r6, #5 │ │ - b.n b0cd4 │ │ - ldr r7, [pc, #360] @ (b1304 ) │ │ - b.n b16b8 │ │ + b.n b0ce4 │ │ + ldr r7, [pc, #360] @ (b1314 ) │ │ + b.n b16c8 │ │ movs r0, r5 │ │ - b.n b0cd6 │ │ + b.n b0ce6 │ │ movs r1, #104 @ 0x68 │ │ - b.n b0ce0 │ │ + b.n b0cf0 │ │ movs r0, r0 │ │ - b.n b144c │ │ + b.n b145c │ │ movs r0, #1 │ │ str r2, [sp, #520] @ 0x208 │ │ movs r1, #104 @ 0x68 │ │ - b.n b0ccc │ │ + b.n b0cdc │ │ movs r2, r5 │ │ - b.n b185a │ │ + b.n b186a │ │ @ instruction: 0xfb2a9aff │ │ lsls r0, r6, #1 │ │ and.w r0, r0, sl │ │ - b.n b1502 │ │ + b.n b1512 │ │ asrs r4, r0, #32 │ │ - b.n b1506 │ │ + b.n b1516 │ │ strh r4, [r3, #16] │ │ add.w r0, r0, r0 │ │ - b.n b186e │ │ + b.n b187e │ │ lsls r4, r3, #1 │ │ subs r0, r0, r0 │ │ movs r0, r5 │ │ - b.n b0d0a │ │ - ldr r7, [pc, #360] @ (b1340 ) │ │ - b.n b16f4 │ │ + b.n b0d1a │ │ + ldr r7, [pc, #360] @ (b1350 ) │ │ + b.n b1704 │ │ @ instruction: 0xfb23eaff │ │ subs r0, r4, r5 │ │ - b.n b0d20 │ │ + b.n b0d30 │ │ str r0, [r0, r0] │ │ - b.n b19a6 │ │ + b.n b19b6 │ │ asrs r1, r0, #32 │ │ - b.n b1308 │ │ + b.n b1318 │ │ asrs r2, r3, #1 │ │ - b.n b0d90 │ │ + b.n b0da0 │ │ movs r3, r0 │ │ - b.n b1894 │ │ + b.n b18a4 │ │ movs r4, r1 │ │ cmp r2, #0 │ │ - add r0, pc, #464 @ (adr r0, b13c8 ) │ │ - b.n b0d34 │ │ + add r0, pc, #464 @ (adr r0, b13d8 ) │ │ + b.n b0d44 │ │ strh r0, [r0, #4] │ │ - b.n b0d38 │ │ + b.n b0d48 │ │ vpmin.u32 q7, , │ │ subs r0, r3, r4 │ │ - b.n b0d44 │ │ + b.n b0d54 │ │ str r0, [r0, r0] │ │ - b.n b19ca │ │ + b.n b19da │ │ asrs r1, r0, #32 │ │ - b.n b132c │ │ + b.n b133c │ │ asrs r2, r3, #1 │ │ - b.n b0db4 │ │ + b.n b0dc4 │ │ movs r3, r0 │ │ - b.n b18b8 │ │ + b.n b18c8 │ │ movs r4, r2 │ │ cmp r2, #0 │ │ - add r0, pc, #464 @ (adr r0, b13ec ) │ │ - b.n b0d58 │ │ + add r0, pc, #464 @ (adr r0, b13fc ) │ │ + b.n b0d68 │ │ strh r0, [r0, #4] │ │ - b.n b0d5c │ │ + b.n b0d6c │ │ str r0, [sp, #496] @ 0x1f0 │ │ - b.n b0d60 │ │ + b.n b0d70 │ │ vpmin.u16 q7, , │ │ asrs r0, r1, #2 │ │ - b.n b0d68 │ │ + b.n b0d78 │ │ adds r0, #140 @ 0x8c │ │ - b.n b0d6c │ │ + b.n b0d7c │ │ movs r0, #20 │ │ - b.n b0d50 │ │ + b.n b0d60 │ │ movs r5, #61 @ 0x3d │ │ - b.n b183a │ │ + b.n b184a │ │ asrs r0, r1, #32 │ │ - b.n b0d58 │ │ + b.n b0d68 │ │ adds r0, #12 │ │ - b.n b0d5c │ │ + b.n b0d6c │ │ movs r0, r2 │ │ - b.n b0d60 │ │ + b.n b0d70 │ │ lsrs r4, r7, #11 │ │ - b.n b0d88 │ │ + b.n b0d98 │ │ movs r0, r0 │ │ - b.n b136c │ │ + b.n b137c │ │ movs r0, r0 │ │ - b.n b0d6c │ │ + b.n b0d7c │ │ subs r4, r6, r3 │ │ - b.n b0d94 │ │ + b.n b0da4 │ │ movs r3, r0 │ │ - b.n b199a │ │ + b.n b19aa │ │ subs r2, #240 @ 0xf0 │ │ - b.n b0d9c │ │ + b.n b0dac │ │ asrs r1, r0, #32 │ │ - b.n b1380 │ │ + b.n b1390 │ │ adds r0, #3 │ │ - b.n b1384 │ │ - add r7, pc, #956 @ (adr r7, b1624 ) │ │ + b.n b1394 │ │ + add r7, pc, #952 @ (adr r7, b1630 ) │ │ @ instruction: 0xebffffe1 │ │ @ instruction: 0xeaff1088 │ │ - b.n b0dac │ │ + b.n b0dbc │ │ adds r0, #140 @ 0x8c │ │ - b.n b0db0 │ │ + b.n b0dc0 │ │ movs r0, #20 │ │ - b.n b0d94 │ │ + b.n b0da4 │ │ movs r5, #1 │ │ - b.n b187e │ │ + b.n b188e │ │ asrs r0, r1, #32 │ │ - b.n b0d9c │ │ + b.n b0dac │ │ adds r0, #12 │ │ - b.n b0da0 │ │ + b.n b0db0 │ │ movs r0, r2 │ │ - b.n b0da4 │ │ + b.n b0db4 │ │ lsrs r4, r2, #10 │ │ - b.n b0dcc │ │ + b.n b0ddc │ │ movs r0, r0 │ │ - b.n b13b0 │ │ + b.n b13c0 │ │ movs r0, r0 │ │ - b.n b0db0 │ │ + b.n b0dc0 │ │ subs r4, r1, r2 │ │ - b.n b0dd8 │ │ + b.n b0de8 │ │ movs r3, r0 │ │ - b.n b19de │ │ + b.n b19ee │ │ subs r2, #136 @ 0x88 │ │ - b.n b0de0 │ │ + b.n b0df0 │ │ asrs r1, r0, #32 │ │ - b.n b13c4 │ │ + b.n b13d4 │ │ adds r0, #3 │ │ - b.n b13c8 │ │ - add r7, pc, #888 @ (adr r7, b1624 ) │ │ + b.n b13d8 │ │ + add r7, pc, #884 @ (adr r7, b1630 ) │ │ @ instruction: 0xebffffd9 │ │ - @ instruction: 0xeaff087f │ │ + @ instruction: 0xeaff086f │ │ vcvta.s16.f16 d19, d6 │ │ - b.n b0e6e │ │ + b.n b0e7e │ │ ldrb r2, [r5, #10] │ │ - b.n b18d2 │ │ + b.n b18e2 │ │ ldrb r2, [r5, #10] │ │ - b.n b195a │ │ + b.n b196a │ │ movs r0, r1 │ │ - b.n b18ec │ │ + b.n b18fc │ │ ldrb r4, [r5, #10] │ │ lsls r2, r1, #12 │ │ ldrb r2, [r5, #10] │ │ lsls r0, r1, #13 │ │ adds r0, #2 │ │ - b.n b13e0 │ │ + b.n b13f0 │ │ strb r1, [r0, #0] │ │ - b.n b1a16 │ │ + b.n b1a26 │ │ movs r3, r0 │ │ - b.n b157a │ │ + b.n b158a │ │ strb r4, [r0, #1] │ │ - b.n b0df8 │ │ + b.n b0e08 │ │ @ instruction: 0xfa0e0aff │ │ movs r4, r7 │ │ - b.n b0e20 │ │ + b.n b0e30 │ │ adds r0, #1 │ │ - b.n b1a2a │ │ + b.n b1a3a │ │ movs r1, r1 │ │ stmia.w sp, {r0, ip, sp} │ │ - b.n b1632 │ │ + b.n b1642 │ │ lsls r4, r3, #1 │ │ - b.n b0e30 │ │ + b.n b0e40 │ │ ldr r5, [r2, #60] @ 0x3c │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n b163e │ │ + b.n b164e │ │ movs r0, r0 │ │ - b.n b19a2 │ │ + b.n b19b2 │ │ movs r0, r0 │ │ - b.n b1a46 │ │ + b.n b1a56 │ │ lsls r4, r0, #1 │ │ - b.n b0e24 │ │ + b.n b0e34 │ │ @ instruction: 0xfa030aff │ │ lsrs r0, r3, #7 │ │ - b.n b0e50 │ │ + b.n b0e60 │ │ movs r0, r0 │ │ - b.n b1434 │ │ + b.n b1444 │ │ lsls r2, r3, #1 │ │ - b.n b0eba │ │ + b.n b0eca │ │ movs r0, r0 │ │ - b.n b19be │ │ + b.n b19ce │ │ lsls r6, r4, #8 │ │ lsrs r0, r0, #8 │ │ adds r0, r1, r7 │ │ - b.n b0e64 │ │ + b.n b0e74 │ │ movs r1, r0 │ │ - b.n b1a6a │ │ + b.n b1a7a │ │ subs r1, #196 @ 0xc4 │ │ - b.n b0e6c │ │ + b.n b0e7c │ │ movs r0, #223 @ 0xdf │ │ - b.n b1a72 │ │ - ldr r1, [pc, #768] @ (b1634 ) │ │ - b.n b0e74 │ │ + b.n b1a82 │ │ + ldr r1, [pc, #768] @ (b1644 ) │ │ + b.n b0e84 │ │ asrs r1, r0, #32 │ │ - b.n b1458 │ │ + b.n b1468 │ │ adds r0, #3 │ │ - b.n b145c │ │ + b.n b146c │ │ ands r4, r0 │ │ - b.n b1460 │ │ + b.n b1470 │ │ lsls r4, r0, #4 │ │ and.w r0, r0, r0, lsl #20 │ │ - b.n b168a │ │ + b.n b169a │ │ movs r3, r2 │ │ and.w r9, r0, r0, asr #3 │ │ - b.n b0e90 │ │ + b.n b0ea0 │ │ movs r0, r0 │ │ - b.n b1474 │ │ + b.n b1484 │ │ asrs r2, r3, #1 │ │ - b.n b0efa │ │ + b.n b0f0a │ │ movs r0, r0 │ │ - b.n b1a9e │ │ + b.n b1aae │ │ lsls r4, r1, #2 │ │ - b.n b0e7c │ │ + b.n b0e8c │ │ lsls r0, r1, #2 │ │ - b.n b0e80 │ │ + b.n b0e90 │ │ movs r0, r0 │ │ - b.n b1a0c │ │ + b.n b1a1c │ │ lsls r7, r7, #3 │ │ subs r0, r0, r0 │ │ ldrsb r5, [r0, r7] │ │ - b.n b1982 │ │ + b.n b1992 │ │ ldrsh r7, [r7, r7] │ │ - b.n b1a14 │ │ - add r0, pc, #464 @ (adr r0, b1548 ) │ │ - b.n b0eb4 │ │ + b.n b1a24 │ │ + add r0, pc, #464 @ (adr r0, b1558 ) │ │ + b.n b0ec4 │ │ strh r0, [r0, #4] │ │ - b.n b0eb8 │ │ + b.n b0ec8 │ │ movs r6, r0 │ │ and.w r9, r0, r4, ror #1 │ │ - b.n b0ec4 │ │ + b.n b0ed4 │ │ ldrsb r5, [r0, r7] │ │ - b.n b199a │ │ + b.n b19aa │ │ ldrsh r7, [r7, r7] │ │ - b.n b1a2c │ │ + b.n b1a3c │ │ movs r0, r0 │ │ - b.n b14b0 │ │ + b.n b14c0 │ │ lsls r2, r3, #1 │ │ - b.n b0f36 │ │ + b.n b0f46 │ │ movs r0, r0 │ │ - b.n b1a3a │ │ + b.n b1a4a │ │ lsls r2, r1, #4 │ │ subs r0, r0, r0 │ │ lsls r4, r2, #1 │ │ - b.n b0ed6 │ │ + b.n b0ee6 │ │ asrs r4, r1, #11 │ │ - b.n b0ee0 │ │ + b.n b0ef0 │ │ asrs r0, r0, #32 │ │ - b.n b0eaa │ │ + b.n b0eba │ │ asrs r0, r0, #32 │ │ - b.n b1aee │ │ + b.n b1afe │ │ lsls r0, r4, #2 │ │ - b.n b0ee6 │ │ + b.n b0ef6 │ │ asrs r0, r0, #32 │ │ - b.n b0eb6 │ │ + b.n b0ec6 │ │ asrs r4, r0, #32 │ │ - b.n b0eea │ │ + b.n b0efa │ │ asrs r0, r0, #2 │ │ - b.n b0ed8 │ │ + b.n b0ee8 │ │ asrs r0, r0, #32 │ │ - b.n b1b02 │ │ + b.n b1b12 │ │ lsls r0, r6, #6 │ │ - b.n b0f00 │ │ + b.n b0f10 │ │ asrs r0, r6, #6 │ │ - b.n b0ee4 │ │ + b.n b0ef4 │ │ asrs r4, r6, #32 │ │ - b.n b0f08 │ │ + b.n b0f18 │ │ str r0, [sp, #0] │ │ - b.n b0f02 │ │ + b.n b0f12 │ │ movs r1, r0 │ │ - b.n b1676 │ │ + b.n b1686 │ │ movs r0, r0 │ │ lsrs r0, r0, #8 │ │ ldr r4, [sp, #992] @ 0x3e0 │ │ add.w r0, r0, r8, lsr #1 │ │ - b.n b0f1c │ │ + b.n b0f2c │ │ movs r0, r0 │ │ - b.n b1a86 │ │ + b.n b1a96 │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ asrs r0, r1, #2 │ │ - b.n b1908 │ │ + b.n b1918 │ │ movs r1, r0 │ │ - b.n b1b32 │ │ + b.n b1b42 │ │ ldr r6, [sp, #40] @ 0x28 │ │ add.w r0, r0, r0 │ │ - b.n b1a9a │ │ + b.n b1aaa │ │ asrs r0, r0, #32 │ │ - b.n b1b3e │ │ + b.n b1b4e │ │ movs r0, r0 │ │ - b.n b1b42 │ │ + b.n b1b52 │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ movs r0, #136 @ 0x88 │ │ - b.n b0f44 │ │ + b.n b0f54 │ │ subs r2, #0 │ │ - b.n b1a26 │ │ + b.n b1a36 │ │ lsls r4, r1, #2 │ │ - b.n b0f4c │ │ + b.n b0f5c │ │ subs r2, r7, #7 │ │ - b.n b1b56 │ │ + b.n b1b66 │ │ subs r3, #154 @ 0x9a │ │ - b.n b1aa0 │ │ + b.n b1ab0 │ │ lsls r0, r2, #6 │ │ - b.n b1420 │ │ + b.n b1430 │ │ lsrs r2, r0, #31 │ │ - b.n b1762 │ │ + b.n b1772 │ │ lsls r0, r2, #14 │ │ - b.n b1426 │ │ + b.n b1436 │ │ asrs r2, r2, #14 │ │ - b.n b156a │ │ + b.n b157a │ │ strb r0, [r1, #1] │ │ - b.n b0f68 │ │ + b.n b0f78 │ │ movs r2, #216 @ 0xd8 │ │ - b.n b17c0 │ │ + b.n b17d0 │ │ movs r0, #2 │ │ - b.n b14d8 │ │ + b.n b14e8 │ │ adds r0, #3 │ │ - b.n b15ba │ │ + b.n b15ca │ │ movs r2, #248 @ 0xf8 │ │ - b.n b17cc │ │ + b.n b17dc │ │ movs r0, r0 │ │ - b.n b1aec │ │ + b.n b1afc │ │ lsls r5, r3, #7 │ │ subs r0, r0, r0 │ │ asrs r4, r1, #1 │ │ - b.n b0f7e │ │ + b.n b0f8e │ │ strb r0, [r5, #1] │ │ - b.n b0f88 │ │ + b.n b0f98 │ │ lsls r4, r0, #1 │ │ - b.n b0f86 │ │ + b.n b0f96 │ │ movs r0, #0 │ │ - b.n b0ff8 │ │ + b.n b1008 │ │ movs r1, r0 │ │ - b.n b1a7e │ │ + b.n b1a8e │ │ movs r0, #7 │ │ - b.n b179e │ │ + b.n b17ae │ │ movs r0, #40 @ 0x28 │ │ lsls r0, r0, #10 │ │ movs r0, #208 @ 0xd0 │ │ - b.n b17ea │ │ + b.n b17fa │ │ movs r2, #248 @ 0xf8 │ │ - b.n b17ea │ │ + b.n b17fa │ │ asrs r1, r0, #32 │ │ - b.n b1010 │ │ + b.n b1020 │ │ movs r1, r0 │ │ - b.n b1a94 │ │ + b.n b1aa4 │ │ asrs r7, r0, #32 │ │ - b.n b17b6 │ │ + b.n b17c6 │ │ asrs r0, r3, #1 │ │ lsls r0, r0, #10 │ │ movs r0, #208 @ 0xd0 │ │ - b.n b1800 │ │ + b.n b1810 │ │ movs r5, #248 @ 0xf8 │ │ - b.n b1802 │ │ + b.n b1812 │ │ lsls r0, r3, #1 │ │ - b.n b0fc0 │ │ + b.n b0fd0 │ │ movs r0, r0 │ │ - b.n b1b2a │ │ + b.n b1b3a │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ lsrs r0, r1, #2 │ │ - b.n b0fd0 │ │ + b.n b0fe0 │ │ asrs r0, r1, #2 │ │ - b.n b19b0 │ │ + b.n b19c0 │ │ movs r0, r0 │ │ - b.n b15b8 │ │ + b.n b15c8 │ │ movs r4, r5 │ │ - b.n b0fbe │ │ + b.n b0fce │ │ ldr r5, [sp, #428] @ 0x1ac │ │ add.w r0, r0, r0 │ │ - b.n b1b46 │ │ + b.n b1b56 │ │ lsls r6, r2, #3 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #2 │ │ - b.n b0fe8 │ │ + b.n b0ff8 │ │ ldrb r0, [r0, #8] │ │ - b.n b1aca │ │ + b.n b1ada │ │ ldrb r2, [r3, #14] │ │ - b.n b1b3c │ │ + b.n b1b4c │ │ asrs r4, r1, #2 │ │ - b.n b0ff4 │ │ + b.n b1004 │ │ movs r7, #144 @ 0x90 │ │ - b.n b15c4 │ │ + b.n b15d4 │ │ lsrs r0, r0, #31 │ │ - b.n b1802 │ │ + b.n b1812 │ │ adds r7, #144 @ 0x90 │ │ - b.n b150c │ │ + b.n b151c │ │ movs r1, r0 │ │ - b.n b15ee │ │ + b.n b15fe │ │ subs r1, r0, #7 │ │ - b.n b1614 │ │ + b.n b1624 │ │ movs r0, #72 @ 0x48 │ │ - b.n b100c │ │ + b.n b101c │ │ movs r0, r1 │ │ - b.n b0fda │ │ + b.n b0fea │ │ asrs r4, r1, #32 │ │ - b.n b0fde │ │ + b.n b0fee │ │ movs r0, r2 │ │ - b.n b0fe2 │ │ + b.n b0ff2 │ │ asrs r4, r2, #32 │ │ - b.n b0fe6 │ │ + b.n b0ff6 │ │ asrs r0, r0, #9 │ │ - b.n b101a │ │ + b.n b102a │ │ movs r0, r0 │ │ - b.n b1b8c │ │ + b.n b1b9c │ │ movs r1, r3 │ │ lsrs r0, r0, #8 │ │ lsls r4, r0, #1 │ │ - b.n b102c │ │ + b.n b103c │ │ movs r0, r0 │ │ - b.n b1b96 │ │ + b.n b1ba6 │ │ movs r2, r7 │ │ subs r0, r0, r0 │ │ lsls r4, r3, #1 │ │ - b.n b1038 │ │ + b.n b1048 │ │ movs r0, #40 @ 0x28 │ │ - b.n b1062 │ │ + b.n b1072 │ │ movs r1, r0 │ │ - b.n b1bea │ │ + b.n b1bfa │ │ movs r6, r6 │ │ lsrs r0, r0, #8 │ │ movs r0, #92 @ 0x5c │ │ - b.n b1048 │ │ + b.n b1058 │ │ asrs r4, r0, #32 │ │ - b.n b1034 │ │ + b.n b1044 │ │ movs r0, #208 @ 0xd0 │ │ - b.n b103a │ │ + b.n b104a │ │ movs r2, r0 │ │ - b.n b17bc │ │ + b.n b17cc │ │ movs r1, r6 │ │ ldrh r0, [r0, #16] │ │ asrs r4, r3, #1 │ │ - b.n b105c │ │ + b.n b106c │ │ asrs r0, r1, #1 │ │ - b.n b1048 │ │ + b.n b1058 │ │ movs r1, #92 @ 0x5c │ │ - b.n b104c │ │ + b.n b105c │ │ adds r1, #88 @ 0x58 │ │ - b.n b1050 │ │ + b.n b1060 │ │ strb r4, [r3, #5] │ │ - b.n b1054 │ │ + b.n b1064 │ │ str r0, [r3, #20] │ │ - b.n b1058 │ │ + b.n b1068 │ │ str r7, [r0, r0] │ │ - b.n b157e │ │ + b.n b158e │ │ ands r6, r0 │ │ - b.n b1584 │ │ + b.n b1594 │ │ str r5, [r0, r0] │ │ - b.n b186a │ │ + b.n b187a │ │ movs r5, r4 │ │ lsrs r0, r0, #8 │ │ movs r0, #7 │ │ - b.n b188a │ │ + b.n b189a │ │ adds r0, #6 │ │ - b.n b188e │ │ - blx 4b2b90 │ │ + b.n b189e │ │ + blx 4b2ba0 │ │ @ instruction: 0xfff5eaff │ │ strb r4, [r3, #1] │ │ - b.n b1094 │ │ + b.n b10a4 │ │ asrs r0, r2, #9 │ │ - b.n b1092 │ │ + b.n b10a2 │ │ lsls r0, r1, #1 │ │ - b.n b1090 │ │ + b.n b10a0 │ │ lsrs r6, r2, #29 │ │ - b.n b1a66 │ │ + b.n b1a76 │ │ movs r0, #208 @ 0xd0 │ │ - b.n b18ea │ │ + b.n b18fa │ │ ands r1, r0 │ │ - b.n b1692 │ │ + b.n b16a2 │ │ str r0, [r0, r0] │ │ - b.n b1ab8 │ │ + b.n b1ac8 │ │ lsrs r0, r6 │ │ - b.n b18f6 │ │ + b.n b1906 │ │ lsls r0, r1, #1 │ │ - b.n b10a8 │ │ + b.n b10b8 │ │ lsrs r5, r2, #24 │ │ - b.n b1a7e │ │ + b.n b1a8e │ │ lsls r0, r2, #3 │ │ - b.n b1902 │ │ + b.n b1912 │ │ movs r1, r0 │ │ - b.n b18a6 │ │ + b.n b18b6 │ │ lsls r3, r3, #4 │ │ subs r0, r0, r0 │ │ lsls r4, r5, #31 │ │ - b.n b10cc │ │ + b.n b10dc │ │ asrs r0, r1, #2 │ │ - b.n b1aac │ │ + b.n b1abc │ │ movs r0, r0 │ │ - b.n b16b4 │ │ + b.n b16c4 │ │ movs r4, r5 │ │ - b.n b10ba │ │ + b.n b10ca │ │ ldr r5, [sp, #176] @ 0xb0 │ │ add.w r0, r0, r0 │ │ - b.n b1c42 │ │ + b.n b1c52 │ │ lsls r0, r5, #6 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #2 │ │ - b.n b10e4 │ │ + b.n b10f4 │ │ ldrb r0, [r0, #8] │ │ - b.n b1bc6 │ │ + b.n b1bd6 │ │ ldrb r2, [r3, #14] │ │ - b.n b1c38 │ │ + b.n b1c48 │ │ movs r0, #140 @ 0x8c │ │ - b.n b10f0 │ │ + b.n b1100 │ │ asrs r0, r2, #30 │ │ - b.n b16c0 │ │ + b.n b16d0 │ │ lsrs r0, r0, #31 │ │ - b.n b18fe │ │ + b.n b190e │ │ adds r7, #144 @ 0x90 │ │ - b.n b1608 │ │ + b.n b1618 │ │ movs r2, r0 │ │ - b.n b16e8 │ │ + b.n b16f8 │ │ subs r2, r0, #7 │ │ - b.n b1710 │ │ + b.n b1720 │ │ movs r0, #92 @ 0x5c │ │ - b.n b1108 │ │ + b.n b1118 │ │ movs r0, #72 @ 0x48 │ │ - b.n b10f6 │ │ + b.n b1106 │ │ cmp r6, #21 │ │ - b.n b1ada │ │ + b.n b1aea │ │ lsls r0, r6, #3 │ │ - b.n b195e │ │ + b.n b196e │ │ lsls r6, r0, #4 │ │ and.w r0, r0, r2, lsl #4 │ │ - b.n b1908 │ │ + b.n b1918 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ lsls r4, r3, #1 │ │ - b.n b1124 │ │ + b.n b1134 │ │ movs r4, r2 │ │ - b.n b1aee │ │ + b.n b1afe │ │ adds r0, #64 @ 0x40 │ │ - b.n b1126 │ │ + b.n b1136 │ │ asrs r0, r0, #9 │ │ - b.n b112a │ │ + b.n b113a │ │ movs r0, r0 │ │ - b.n b111a │ │ + b.n b112a │ │ movs r0, #72 @ 0x48 │ │ - b.n b1124 │ │ + b.n b1134 │ │ lsls r0, r2, #2 │ │ - b.n b111c │ │ + b.n b112c │ │ lsrs r2, r2, #24 │ │ - b.n b1b0c │ │ + b.n b1b1c │ │ asrs r4, r0, #32 │ │ - b.n b112c │ │ + b.n b113c │ │ adds r0, #136 @ 0x88 │ │ - b.n b1128 │ │ + b.n b1138 │ │ lsls r4, r1, #2 │ │ - b.n b112c │ │ + b.n b113c │ │ strb r0, [r4, #2] │ │ - b.n b113a │ │ + b.n b114a │ │ movs r0, #0 │ │ - b.n b1d5a │ │ + b.n b1d6a │ │ adds r1, #36 @ 0x24 │ │ - b.n b1144 │ │ + b.n b1154 │ │ movs r0, r0 │ │ - b.n b1cd0 │ │ + b.n b1ce0 │ │ strb r0, [r0, #0] │ │ - b.n b1d66 │ │ + b.n b1d76 │ │ strb r0, [r0, #0] │ │ lsls r0, r4, #15 │ │ movs r0, r4 │ │ - b.n b1cd0 │ │ + b.n b1ce0 │ │ asrs r0, r4, #32 │ │ str r3, [sp, #640] @ 0x280 │ │ lsrs r1, r0, #32 │ │ - b.n b1cd8 │ │ + b.n b1ce8 │ │ adds r1, r0, r0 │ │ movs r3, #160 @ 0xa0 │ │ movs r1, r0 │ │ - b.n b18e4 │ │ + b.n b18f4 │ │ strb r4, [r4, #2] │ │ - b.n b115c │ │ + b.n b116c │ │ strb r0, [r4, #2] │ │ - b.n b1160 │ │ + b.n b1170 │ │ lsls r1, r6, #1 │ │ subs r2, #0 │ │ movs r0, #148 @ 0x94 │ │ - b.n b1168 │ │ + b.n b1178 │ │ asrs r4, r0, #32 │ │ - b.n b1172 │ │ - add r0, pc, #0 @ (adr r0, b1654 ) │ │ - b.n b1d96 │ │ - add r0, pc, #48 @ (adr r0, b1688 ) │ │ - b.n b115a │ │ + b.n b1182 │ │ + add r0, pc, #0 @ (adr r0, b1664 ) │ │ + b.n b1da6 │ │ + add r0, pc, #48 @ (adr r0, b1698 ) │ │ + b.n b116a │ │ movs r1, #2 │ │ - b.n b1e1e │ │ + b.n b1e2e │ │ asrs r0, r0, #32 │ │ - b.n b1162 │ │ + b.n b1172 │ │ lsls r4, r6, #1 │ │ - b.n b11a0 │ │ + b.n b11b0 │ │ negs r0, r0 │ │ - b.n b118a │ │ + b.n b119a │ │ movs r3, r0 │ │ - b.n b1dae │ │ + b.n b1dbe │ │ lsls r4, r3, #2 │ │ - b.n b118c │ │ + b.n b119c │ │ lsls r0, r2, #3 │ │ - b.n b19fe │ │ + b.n b1a0e │ │ movs r0, #152 @ 0x98 │ │ - b.n b1194 │ │ + b.n b11a4 │ │ movs r1, r0 │ │ - b.n b191e │ │ + b.n b192e │ │ lsls r6, r6, #1 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n b1d26 │ │ + b.n b1d36 │ │ str r0, [sp, #496] @ 0x1f0 │ │ - b.n b11a4 │ │ + b.n b11b4 │ │ lsls r1, r7, #1 │ │ lsrs r0, r0, #8 │ │ str r4, [r3, #0] │ │ - b.n b1b9a │ │ + b.n b1baa │ │ strh r1, [r0, #0] │ │ - b.n b1dd6 │ │ + b.n b1de6 │ │ str r0, [sp, #0] │ │ - b.n b1dda │ │ + b.n b1dea │ │ movs r0, r2 │ │ - b.n b1ba6 │ │ + b.n b1bb6 │ │ lsls r4, r0, #2 │ │ - b.n b11bc │ │ + b.n b11cc │ │ movs r4, r1 │ │ @ instruction: 0xea00a001 │ │ - b.n b1bbe │ │ + b.n b1bce │ │ movs r0, #132 @ 0x84 │ │ - b.n b11e8 │ │ + b.n b11f8 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr1, [r6, #552] @ 0x228 │ │ - b.n b17ca │ │ + b.n b17da │ │ movs r0, r1 │ │ - b.n b11e6 │ │ + b.n b11f6 │ │ asrs r1, r0, #4 │ │ - b.n b17c2 │ │ + b.n b17d2 │ │ movs r0, r1 │ │ - b.n b11c4 │ │ + b.n b11d4 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr0, [r1, #16] │ │ - b.n b11f2 │ │ + b.n b1202 │ │ strh r1, [r0, #0] │ │ - b.n b1bde │ │ + b.n b1bee │ │ str r4, [r1, #0] │ │ - b.n b1bde │ │ + b.n b1bee │ │ movs r0, r0 │ │ - b.n b1986 │ │ + b.n b1996 │ │ lsls r0, r5, #1 │ │ ldrh r0, [r0, #16] │ │ movs r0, r0 │ │ - b.n b120a │ │ + b.n b121a │ │ asrs r2, r7, #2 │ │ - b.n b1a82 │ │ + b.n b1a92 │ │ lsrs r1, r0, #4 │ │ - b.n b1d08 │ │ + b.n b1d18 │ │ @ instruction: 0xffee1aff │ │ asrs r0, r5, #1 │ │ - b.n b1228 │ │ + b.n b1238 │ │ movs r0, #116 @ 0x74 │ │ - b.n b122c │ │ + b.n b123c │ │ strb r0, [r1, #0] │ │ - b.n b1222 │ │ + b.n b1232 │ │ movs r2, r1 │ │ ldmia.w r1, {r6, sp} │ │ - b.n b1222 │ │ + b.n b1232 │ │ lsls r1, r0, #2 │ │ stmia.w sp, {r0} │ │ - b.n b1a46 │ │ + b.n b1a56 │ │ asrs r3, r0, #32 │ │ - b.n b1a4a │ │ + b.n b1a5a │ │ adds r0, #136 @ 0x88 │ │ - b.n b1c28 │ │ + b.n b1c38 │ │ ldr r0, [r0, r2] │ │ add.w r0, r0, r0 │ │ - b.n b1db6 │ │ + b.n b1dc6 │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n b182c │ │ + b.n b183c │ │ @ instruction: 0xffe8eaff │ │ str r0, [r0, r0] │ │ - b.n b1a66 │ │ + b.n b1a76 │ │ lsls r0, r0, #25 │ │ - b.n b1268 │ │ + b.n b1278 │ │ movs r0, r0 │ │ - b.n b184c │ │ + b.n b185c │ │ lsls r2, r3, #1 │ │ - b.n b12d2 │ │ + b.n b12e2 │ │ movs r0, r0 │ │ - b.n b1dd6 │ │ + b.n b1de6 │ │ lsls r0, r4, #4 │ │ lsrs r0, r0, #8 │ │ asrs r0, r6, #24 │ │ - b.n b127c │ │ + b.n b128c │ │ movs r1, r0 │ │ - b.n b1e82 │ │ + b.n b1e92 │ │ adds r6, #44 @ 0x2c │ │ - b.n b1284 │ │ + b.n b1294 │ │ movs r1, #74 @ 0x4a │ │ - b.n b1d4a │ │ + b.n b1d5a │ │ mov r0, r5 │ │ - b.n b128c │ │ + b.n b129c │ │ asrs r1, r0, #32 │ │ - b.n b1870 │ │ + b.n b1880 │ │ adds r0, #3 │ │ - b.n b1874 │ │ + b.n b1884 │ │ ands r4, r0 │ │ - b.n b1878 │ │ + b.n b1888 │ │ lsrs r0, r6 │ │ - b.n b1af8 │ │ - add r6, pc, #708 @ (adr r6, b1a24 ) │ │ + b.n b1b08 │ │ + add r6, pc, #704 @ (adr r6, b1a30 ) │ │ @ instruction: 0xebff0005 │ │ - b.n b1aa6 │ │ - beq.n b17a0 │ │ - b.n b1c00 │ │ + b.n b1ab6 │ │ + beq.n b17b0 │ │ + b.n b1c10 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r6, r7, r8, sl, ip} │ │ - b.n b12b0 │ │ + b.n b12c0 │ │ movs r1, #104 @ 0x68 │ │ - b.n b12b0 │ │ + b.n b12c0 │ │ adds r5, #196 @ 0xc4 │ │ - b.n b12b8 │ │ + b.n b12c8 │ │ asrs r1, r0, #32 │ │ - b.n b189c │ │ + b.n b18ac │ │ lsls r1, r0, #16 │ │ stmia.w sp, {r0} │ │ - b.n b1ec6 │ │ + b.n b1ed6 │ │ adds r0, #3 │ │ - b.n b18a8 │ │ + b.n b18b8 │ │ movs r0, #8 │ │ - b.n b12a8 │ │ + b.n b12b8 │ │ movs r5, #21 │ │ - b.n b1d92 │ │ - add r6, pc, #656 @ (adr r6, b1a24 ) │ │ + b.n b1da2 │ │ + add r6, pc, #652 @ (adr r6, b1a30 ) │ │ @ instruction: 0xebfffef4 │ │ @ instruction: 0xeaff5000 │ │ - b.n b1ade │ │ + b.n b1aee │ │ lsls r4, r2, #1 │ │ - b.n b12ce │ │ + b.n b12de │ │ asrs r4, r2, #8 │ │ - b.n b12e0 │ │ + b.n b12f0 │ │ asrs r4, r0, #32 │ │ - b.n b12aa │ │ + b.n b12ba │ │ movs r5, r0 │ │ - b.n b1aee │ │ - beq.n b17e8 │ │ - b.n b1c48 │ │ + b.n b1afe │ │ + beq.n b17f8 │ │ + b.n b1c58 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {ip, lr} │ │ - b.n b1afa │ │ + b.n b1b0a │ │ mrc2 10, 7, lr, cr13, cr15, {7} @ │ │ movs r2, r1 │ │ - b.n b1b02 │ │ - bcc.n b1786 │ │ + b.n b1b12 │ │ + bcc.n b1794 │ │ @ instruction: 0xebfff98d │ │ @ instruction: 0xeaff1530 │ │ - b.n b130c │ │ + b.n b131c │ │ lsls r0, r5, #1 │ │ - b.n b130c │ │ + b.n b131c │ │ asrs r1, r0, #32 │ │ - b.n b18f4 │ │ + b.n b1904 │ │ lsls r1, r0, #2 │ │ ldmia.w r0, {r2, r5, r8, sl, ip, sp} │ │ - b.n b131c │ │ + b.n b132c │ │ lsls r1, r0, #2 │ │ stmia.w sp, {r0} │ │ - b.n b1f26 │ │ + b.n b1f36 │ │ adds r0, #3 │ │ - b.n b1908 │ │ + b.n b1918 │ │ movs r0, #8 │ │ - b.n b1308 │ │ + b.n b1318 │ │ movs r5, #100 @ 0x64 │ │ - b.n b1df2 │ │ - add r6, pc, #560 @ (adr r6, b1a24 ) │ │ + b.n b1e02 │ │ + add r6, pc, #556 @ (adr r6, b1a30 ) │ │ @ instruction: 0xebfffee8 │ │ @ instruction: 0xeaff0000 │ │ - b.n b1f3e │ │ + b.n b1f4e │ │ asrs r0, r0, #32 │ │ - b.n b1f42 │ │ + b.n b1f52 │ │ ldrsh.w lr, [lr, ] │ │ movs r0, r0 │ │ - b.n b1f4a │ │ + b.n b1f5a │ │ asrs r0, r0, #32 │ │ - b.n b1f4e │ │ + b.n b1f5e │ │ vpmin.u32 q7, q15, │ │ ldr r7, [r3, r0] │ │ add.w r0, r0, r0 │ │ - b.n b1eba │ │ + b.n b1eca │ │ lsls r4, r2, #2 │ │ - b.n b1338 │ │ + b.n b1348 │ │ lsls r0, r6, #4 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, r0] │ │ - b.n b1b66 │ │ + b.n b1b76 │ │ lsls r0, r5, #20 │ │ - b.n b1368 │ │ + b.n b1378 │ │ movs r0, r0 │ │ - b.n b194c │ │ + b.n b195c │ │ lsls r2, r3, #1 │ │ - b.n b13d2 │ │ + b.n b13e2 │ │ movs r0, r0 │ │ - b.n b1ed6 │ │ + b.n b1ee6 │ │ lsls r0, r4, #3 │ │ lsrs r0, r0, #8 │ │ asrs r0, r3, #20 │ │ - b.n b137c │ │ + b.n b138c │ │ movs r1, r0 │ │ - b.n b1f82 │ │ + b.n b1f92 │ │ adds r5, #20 │ │ - b.n b1384 │ │ + b.n b1394 │ │ cmp r7, #81 @ 0x51 │ │ - b.n b1f8a │ │ + b.n b1f9a │ │ cmp r0, r2 │ │ - b.n b138c │ │ + b.n b139c │ │ asrs r1, r0, #32 │ │ - b.n b1970 │ │ + b.n b1980 │ │ adds r0, #3 │ │ - b.n b1974 │ │ + b.n b1984 │ │ ands r4, r0 │ │ - b.n b1978 │ │ + b.n b1988 │ │ @ instruction: 0xffbeeaff │ │ movs r4, r0 │ │ - b.n b1ba2 │ │ + b.n b1bb2 │ │ asrs r0, r0, #15 │ │ add.w r0, r0, r4 │ │ - b.n b1392 │ │ + b.n b13a2 │ │ movs r0, r0 │ │ - b.n b1f0e │ │ + b.n b1f1e │ │ str r0, [sp, #496] @ 0x1f0 │ │ - b.n b138c │ │ + b.n b139c │ │ @ instruction: 0xff851aff │ │ strh r1, [r0, #0] │ │ - b.n b1fba │ │ + b.n b1fca │ │ str r0, [sp, #0] │ │ - b.n b1fbe │ │ + b.n b1fce │ │ lsls r4, r1, #2 │ │ - b.n b13bc │ │ + b.n b13cc │ │ lsls r0, r2, #3 │ │ - b.n b1c06 │ │ + b.n b1c16 │ │ movs r0, r0 │ │ - b.n b1b2c │ │ + b.n b1b3c │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ lsls r0, r1, #2 │ │ - b.n b1dac │ │ + b.n b1dbc │ │ ldrsb r0, [r6, r5] │ │ add.w r0, r0, r0 │ │ - b.n b1f3a │ │ + b.n b1f4a │ │ lsls r3, r4, #3 │ │ subs r0, r0, r0 │ │ adds r0, #116 @ 0x74 │ │ - b.n b13dc │ │ + b.n b13ec │ │ str r0, [r0, r0] │ │ - b.n b1fe6 │ │ + b.n b1ff6 │ │ asrs r0, r2, #2 │ │ - b.n b13e4 │ │ + b.n b13f4 │ │ lsls r0, r0, #1 │ │ - b.n b13d4 │ │ + b.n b13e4 │ │ movs r0, #20 │ │ - b.n b13d2 │ │ + b.n b13e2 │ │ movs r2, r0 │ │ - b.n b1b58 │ │ + b.n b1b68 │ │ movs r0, r4 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #1 │ │ - b.n b13de │ │ + b.n b13ee │ │ cmp r7, #86 @ 0x56 │ │ - b.n b1dc2 │ │ + b.n b1dd2 │ │ lsls r0, r2, #3 │ │ - b.n b1c4a │ │ + b.n b1c5a │ │ str r1, [r1, #0] │ │ - b.n b19ea │ │ + b.n b19fa │ │ strb r0, [r0, #0] │ │ - b.n b1e10 │ │ + b.n b1e20 │ │ str r0, [r6, #12] │ │ - b.n b1c56 │ │ + b.n b1c66 │ │ lsls r0, r0, #1 │ │ - b.n b13fc │ │ + b.n b140c │ │ lsls r0, r1, #1 │ │ - b.n b13fa │ │ + b.n b140a │ │ lsrs r5, r2, #24 │ │ - b.n b1dde │ │ + b.n b1dee │ │ lsls r0, r2, #3 │ │ - b.n b1c62 │ │ + b.n b1c72 │ │ movs r1, r0 │ │ - b.n b1c06 │ │ + b.n b1c16 │ │ movs r4, r2 │ │ subs r0, r0, r0 │ │ lsls r4, r6, #17 │ │ - b.n b142c │ │ + b.n b143c │ │ asrs r0, r5, #32 │ │ - b.n b1d88 │ │ + b.n b1d98 │ │ movs r0, r0 │ │ - b.n b1a14 │ │ + b.n b1a24 │ │ movs r4, r5 │ │ - b.n b141a │ │ + b.n b142a │ │ ldr r4, [sp, #336] @ 0x150 │ │ add.w r0, r0, r0 │ │ - b.n b1fa2 │ │ + b.n b1fb2 │ │ lsls r3, r2, #3 │ │ subs r0, r0, r0 │ │ movs r0, r5 │ │ - b.n b1340 │ │ + b.n b1350 │ │ ldrb r0, [r0, #8] │ │ - b.n b1f26 │ │ + b.n b1f36 │ │ ldrb r2, [r3, #14] │ │ - b.n b1f98 │ │ + b.n b1fa8 │ │ movs r0, #36 @ 0x24 │ │ - b.n b134c │ │ + b.n b135c │ │ asrs r0, r2, #30 │ │ - b.n b1a20 │ │ + b.n b1a30 │ │ lsrs r0, r0, #31 │ │ - b.n b1c5e │ │ + b.n b1c6e │ │ adds r7, #144 @ 0x90 │ │ - b.n b1968 │ │ + b.n b1978 │ │ movs r2, r0 │ │ - b.n b1a48 │ │ + b.n b1a58 │ │ subs r2, r0, #7 │ │ - b.n b1a70 │ │ + b.n b1a80 │ │ adds r0, #116 @ 0x74 │ │ - b.n b1468 │ │ + b.n b1478 │ │ movs r0, #64 @ 0x40 │ │ - b.n b1458 │ │ + b.n b1468 │ │ movs r0, #72 @ 0x48 │ │ - b.n b145a │ │ + b.n b146a │ │ cmp r6, #21 │ │ - b.n b1e3e │ │ + b.n b1e4e │ │ lsls r0, r6, #3 │ │ - b.n b1cc2 │ │ + b.n b1cd2 │ │ lsls r0, r0, #9 │ │ - b.n b1468 │ │ + b.n b1478 │ │ movs r0, #4 │ │ - b.n b146e │ │ + b.n b147e │ │ asrs r0, r1, #32 │ │ - b.n b146a │ │ + b.n b147a │ │ movs r2, r0 │ │ - b.n b1bfe │ │ + b.n b1c0e │ │ asrs r1, r1, #32 │ │ - b.n b19d4 │ │ + b.n b19e4 │ │ asrs r0, r1, #32 │ │ - b.n b1456 │ │ + b.n b1466 │ │ movs r2, r0 │ │ ldr r2, [sp, #0] │ │ str r0, [sp, #496] @ 0x1f0 │ │ - b.n b1498 │ │ + b.n b14a8 │ │ movs r2, r2 │ │ - @ instruction: 0xea00dcd0 │ │ + @ instruction: 0xea00dce0 │ │ movs r2, r0 │ │ lsls r0, r1, #2 │ │ - b.n b1a7a │ │ + b.n b1a8a │ │ asrs r2, r1, #2 │ │ - b.n b1a82 │ │ + b.n b1a92 │ │ str r0, [sp, #496] @ 0x1f0 │ │ - b.n b14ac │ │ + b.n b14bc │ │ lsls r0, r0, #4 │ │ - b.n b1a7e │ │ + b.n b1a8e │ │ asrs r1, r0, #4 │ │ - b.n b1a82 │ │ + b.n b1a92 │ │ movs r0, r2 │ │ - b.n b1e7e │ │ + b.n b1e8e │ │ asrs r4, r3, #32 │ │ - b.n b1e84 │ │ + b.n b1e94 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr8, [r0, #4] │ │ - b.n b1e9a │ │ + b.n b1eaa │ │ movs r0, #8 │ │ - b.n b14ae │ │ + b.n b14be │ │ movs r4, r1 │ │ - b.n b1e92 │ │ + b.n b1ea2 │ │ movs r0, #8 │ │ - b.n b1498 │ │ - add r0, pc, #4 @ (adr r0, b199c ) │ │ - b.n b1eae │ │ + b.n b14a8 │ │ + add r0, pc, #4 @ (adr r0, b19ac ) │ │ + b.n b1ebe │ │ lsrs r0, r0, #12 │ │ stcl 0, cr1, [r1, #48] @ 0x30 │ │ - b.n b1ea4 │ │ + b.n b1eb4 │ │ movs r0, #4 │ │ - b.n b14ce │ │ + b.n b14de │ │ movs r2, r0 │ │ - b.n b1c5a │ │ + b.n b1c6a │ │ @ instruction: 0xfff49aff │ │ lsls r2, r1, #2 │ │ - b.n b1ac6 │ │ - add r0, pc, #0 @ (adr r0, b19b4 ) │ │ - b.n b14be │ │ - add r0, pc, #16 @ (adr r0, b19c8 ) │ │ - b.n b14c2 │ │ + b.n b1ad6 │ │ + add r0, pc, #0 @ (adr r0, b19c4 ) │ │ + b.n b14ce │ │ + add r0, pc, #16 @ (adr r0, b19d8 ) │ │ + b.n b14d2 │ │ asrs r1, r0, #32 │ │ - b.n b20fe │ │ + b.n b210e │ │ adds r3, #164 @ 0xa4 │ │ - b.n b1500 │ │ + b.n b1510 │ │ lsls r0, r0, #4 │ │ - b.n b1ace │ │ + b.n b1ade │ │ movs r0, #0 │ │ - b.n b218a │ │ + b.n b219a │ │ movs r0, r0 │ │ - b.n b2078 │ │ + b.n b2088 │ │ adds r0, #3 │ │ - b.n b1af0 │ │ + b.n b1b00 │ │ adds r0, #28 │ │ - b.n b14d6 │ │ + b.n b14e6 │ │ movs r0, #32 │ │ - b.n b14da │ │ + b.n b14ea │ │ asrs r4, r4, #32 │ │ - b.n b14de │ │ + b.n b14ee │ │ movs r2, r1 │ │ - b.n b1da2 │ │ - add r0, pc, #464 @ (adr r0, b1bb4 ) │ │ - b.n b1520 │ │ + b.n b1db2 │ │ + add r0, pc, #464 @ (adr r0, b1bc4 ) │ │ + b.n b1530 │ │ movs r0, r0 │ │ - b.n b1afa │ │ + b.n b1b0a │ │ asrs r4, r7, #8 │ │ - b.n b1522 │ │ + b.n b1532 │ │ movs r1, r0 │ │ - b.n b1af2 │ │ + b.n b1b02 │ │ lsls r4, r7, #8 │ │ - b.n b150a │ │ + b.n b151a │ │ vpmin.u8 , q13, │ │ lsls r0, r3, #1 │ │ - b.n b1538 │ │ + b.n b1548 │ │ lsls r0, r0 │ │ - b.n b1f16 │ │ + b.n b1f26 │ │ movs r0, r0 │ │ - b.n b20a6 │ │ + b.n b20b6 │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ lsls r0, r6, #13 │ │ - b.n b154c │ │ + b.n b155c │ │ asrs r0, r1, #2 │ │ - b.n b1f2c │ │ + b.n b1f3c │ │ movs r0, r0 │ │ - b.n b1b34 │ │ + b.n b1b44 │ │ movs r4, r5 │ │ - b.n b153a │ │ + b.n b154a │ │ ldr r4, [sp, #48] @ 0x30 │ │ add.w r0, r0, r0 │ │ - b.n b20c2 │ │ + b.n b20d2 │ │ lsls r2, r7, #1 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #2 │ │ - b.n b1564 │ │ + b.n b1574 │ │ ldrb r0, [r0, #8] │ │ - b.n b2046 │ │ + b.n b2056 │ │ ldrb r2, [r3, #14] │ │ - b.n b20b8 │ │ + b.n b20c8 │ │ asrs r4, r1, #2 │ │ - b.n b1570 │ │ + b.n b1580 │ │ movs r7, #144 @ 0x90 │ │ - b.n b1b40 │ │ + b.n b1b50 │ │ lsrs r0, r0, #31 │ │ - b.n b1d7e │ │ + b.n b1d8e │ │ adds r7, #144 @ 0x90 │ │ - b.n b1a88 │ │ + b.n b1a98 │ │ movs r1, r0 │ │ - b.n b1b6a │ │ + b.n b1b7a │ │ subs r1, r0, #7 │ │ - b.n b1b90 │ │ + b.n b1ba0 │ │ movs r0, #72 @ 0x48 │ │ - b.n b1588 │ │ + b.n b1598 │ │ lsls r0, r7, #7 │ │ - b.n b1dd6 │ │ + b.n b1de6 │ │ str r4, [r7, r0] │ │ - b.n b1590 │ │ + b.n b15a0 │ │ strb r0, [r3, #0] │ │ - b.n b1f6e │ │ + b.n b1f7e │ │ adds r2, #68 @ 0x44 │ │ - b.n b1592 │ │ + b.n b15a2 │ │ strh r0, [r0, #0] │ │ - b.n b21a2 │ │ + b.n b21b2 │ │ lsrs r5, r1, #10 │ │ orn r0, r7, #6815744 @ 0x680000 │ │ - b.n b1df4 │ │ + b.n b1e04 │ │ movs r1, #176 @ 0xb0 │ │ - b.n b1e18 │ │ + b.n b1e28 │ │ str r2, [r2, #0] │ │ - b.n b161c │ │ + b.n b162c │ │ asrs r4, r1, #2 │ │ - b.n b1590 │ │ + b.n b15a0 │ │ asrs r3, r2, #32 │ │ - b.n b1624 │ │ + b.n b1634 │ │ lsls r0, r1, #2 │ │ - b.n b1598 │ │ + b.n b15a8 │ │ cmp r1, #184 @ 0xb8 │ │ - b.n b1e1c │ │ + b.n b1e2c │ │ movs r0, #136 @ 0x88 │ │ - b.n b1fa0 │ │ + b.n b1fb0 │ │ str r2, [r3, #8] │ │ - b.n b1624 │ │ + b.n b1634 │ │ asrs r3, r3, #2 │ │ - b.n b1628 │ │ + b.n b1638 │ │ asrs r0, r0, #32 │ │ - b.n b15b8 │ │ + b.n b15c8 │ │ lsls r0, r7, #2 │ │ - b.n b15c0 │ │ + b.n b15d0 │ │ adds r0, #0 │ │ - b.n b15c8 │ │ + b.n b15d8 │ │ strb r4, [r2, #0] │ │ - b.n b1fa2 │ │ + b.n b1fb2 │ │ lsrs r5, r1, #10 │ │ orr.w r0, r7, #8454144 @ 0x810000 │ │ - b.n b1bc6 │ │ + b.n b1bd6 │ │ str r4, [r7, #8] │ │ - b.n b15d4 │ │ + b.n b15e4 │ │ asrs r4, r0, #1 │ │ - b.n b15e2 │ │ + b.n b15f2 │ │ lsls r0, r0, #5 │ │ - b.n b15cc │ │ + b.n b15dc │ │ movs r0, r0 │ │ - b.n b2002 │ │ + b.n b2012 │ │ lsls r4, r0, #5 │ │ - b.n b15d4 │ │ + b.n b15e4 │ │ movs r0, r5 │ │ - b.n b1fc2 │ │ + b.n b1fd2 │ │ adds r0, #0 │ │ - b.n b15d0 │ │ + b.n b15e0 │ │ lsrs r5, r1, #10 │ │ orn sl, r1, #288768 @ 0x46800 │ │ orn sl, r1, #18048 @ 0x4680 │ │ orn sl, r1, #6717440 @ 0x668000 │ │ orr.w sl, r0, #419840 @ 0x66800 │ │ orr.w sl, r0, #26240 @ 0x6680 │ │ orr.w sl, r0, #4620288 @ 0x468000 │ │ orn sl, r1, #288768 @ 0x46800 │ │ orn sl, r1, #18304 @ 0x4780 │ │ orn r0, r1, #3538944 @ 0x360000 │ │ - b.n b1ffe │ │ + b.n b200e │ │ lsrs r5, r1, #11 │ │ orr.w sl, r0, #419840 @ 0x66800 │ │ orr.w sl, r0, #6717440 @ 0x668000 │ │ orn sl, r1, #26240 @ 0x6680 │ │ orr.w sl, r0, #423936 @ 0x67800 │ │ orn r0, r1, #1703936 @ 0x1a0000 │ │ - b.n b200c │ │ + b.n b201c │ │ lsrs r5, r1, #11 │ │ orr.w sl, r0, #419840 @ 0x66800 │ │ orr.w sl, r0, #4685824 @ 0x478000 │ │ orn r2, r1, #3840 @ 0xf00 │ │ - b.n b1650 │ │ + b.n b1660 │ │ strh r0, [r0, #0] │ │ - b.n b1616 │ │ + b.n b1626 │ │ strh r4, [r0, #0] │ │ - b.n b161a │ │ + b.n b162a │ │ lsls r0, r2, #3 │ │ - b.n b2022 │ │ + b.n b2032 │ │ str r6, [r0, #0] │ │ - b.n b1c40 │ │ + b.n b1c50 │ │ str r1, [sp, #224] @ 0xe0 │ │ - b.n b1640 │ │ + b.n b1650 │ │ lsrs r7, r1, #11 │ │ orr.w r0, r0, #12582912 @ 0xc00000 │ │ - b.n b203a │ │ + b.n b204a │ │ lsrs r7, r5, #11 │ │ orn r0, r0, #6291456 @ 0x600000 │ │ - b.n b203a │ │ + b.n b204a │ │ lsrs r7, r1, #11 │ │ orr.w r0, r0, #4194304 @ 0x400000 │ │ - b.n b1678 │ │ + b.n b1688 │ │ lsls r4, r7, #4 │ │ - b.n b165c │ │ + b.n b166c │ │ lsls r4, r2, #2 │ │ - b.n b1660 │ │ + b.n b1670 │ │ lsls r4, r3, #1 │ │ - b.n b1684 │ │ + b.n b1694 │ │ str r0, [sp, #576] @ 0x240 │ │ - b.n b1668 │ │ + b.n b1678 │ │ adds r0, #4 │ │ - b.n b1686 │ │ + b.n b1696 │ │ asrs r4, r0, #32 │ │ - b.n b1676 │ │ + b.n b1686 │ │ asrs r3, r0, #32 │ │ - b.n b1e5c │ │ + b.n b1e6c │ │ adds r0, #4 │ │ - b.n b1e9e │ │ + b.n b1eae │ │ asrs r1, r0, #4 │ │ - b.n b2264 │ │ - bvc.n b1bf4 │ │ + b.n b2274 │ │ + bvc.n b1c02 │ │ @ instruction: 0xebff5000 │ │ - b.n b1eaa │ │ + b.n b1eba │ │ lsls r0, r3, #1 │ │ - b.n b16a8 │ │ + b.n b16b8 │ │ movs r0, r0 │ │ - b.n b2212 │ │ + b.n b2222 │ │ movs r7, r1 │ │ lsrs r0, r0, #8 │ │ movs r4, r5 │ │ - b.n b16a6 │ │ + b.n b16b6 │ │ asrs r0, r5, #32 │ │ - b.n b2014 │ │ + b.n b2024 │ │ ldr r3, [sp, #716] @ 0x2cc │ │ add.w r0, r0, r0 │ │ - b.n b2226 │ │ + b.n b2236 │ │ movs r4, r4 │ │ subs r0, r0, r0 │ │ movs r0, r5 │ │ - b.n b15c4 │ │ + b.n b15d4 │ │ ldrb r0, [r0, #8] │ │ - b.n b21aa │ │ + b.n b21ba │ │ ldrb r2, [r3, #14] │ │ - b.n b221c │ │ + b.n b222c │ │ asrs r4, r4, #32 │ │ - b.n b15d0 │ │ + b.n b15e0 │ │ movs r7, #144 @ 0x90 │ │ - b.n b1ca4 │ │ + b.n b1cb4 │ │ lsrs r0, r0, #31 │ │ - b.n b1ee2 │ │ + b.n b1ef2 │ │ adds r7, #144 @ 0x90 │ │ - b.n b1be6 │ │ + b.n b1bf6 │ │ strh r1, [r0, #0] │ │ - b.n b1cce │ │ + b.n b1cde │ │ ldr r7, [sp, #772] @ 0x304 │ │ - b.n b1cee │ │ + b.n b1cfe │ │ lsls r0, r1, #1 │ │ - b.n b16ec │ │ + b.n b16fc │ │ strh r0, [r6, #22] │ │ - b.n b1f36 │ │ + b.n b1f46 │ │ movs r0, r0 │ │ - b.n b2264 │ │ + b.n b2274 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n b1f02 │ │ - beq.n b1bfc │ │ - b.n b205c │ │ + b.n b1f12 │ │ + beq.n b1c0c │ │ + b.n b206c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r0, r1, r6, r7, sl, sp, lr, pc} │ │ - vqrdmlsh.s q12, , d9[0] │ │ + ldmia.w sp!, {r1, r6, r9, sl, sp, lr, pc} │ │ + vshr.u32 d25, d12, #11 │ │ vshr.u32 q9, q6, #11 │ │ - b.n b1710 │ │ + b.n b1720 │ │ asrs r2, r3, #1 │ │ - b.n b1786 │ │ + b.n b1796 │ │ movs r4, r0 │ │ - b.n b1702 │ │ + b.n b1712 │ │ movs r0, r0 │ │ - b.n b2284 │ │ + b.n b2294 │ │ lsls r2, r0, #4 │ │ - b.n b22e6 │ │ + b.n b22f6 │ │ movs r4, r0 │ │ - b.n b16ee │ │ + b.n b16fe │ │ @ instruction: 0xfff30aff │ │ asrs r4, r2, #6 │ │ - b.n b1730 │ │ + b.n b1740 │ │ movs r1, r0 │ │ - b.n b2336 │ │ + b.n b2346 │ │ adds r1, #144 @ 0x90 │ │ - b.n b1738 │ │ + b.n b1748 │ │ movs r1, #110 @ 0x6e │ │ - b.n b21fe │ │ + b.n b220e │ │ sbcs r4, r1 │ │ - b.n b1740 │ │ + b.n b1750 │ │ asrs r1, r0, #32 │ │ - b.n b1d24 │ │ + b.n b1d34 │ │ adds r0, #3 │ │ - b.n b1d28 │ │ + b.n b1d38 │ │ ands r4, r0 │ │ - b.n b1d2c │ │ + b.n b1d3c │ │ mrc2 10, 6, lr, cr1, cr15, {7} @ │ │ movs r0, r0 │ │ - b.n b2356 │ │ + b.n b2366 │ │ asrs r0, r0, #32 │ │ - b.n b235a │ │ + b.n b236a │ │ @ instruction: 0xff8aeaff │ │ str r0, [sp, #0] │ │ - b.n b2362 │ │ + b.n b2372 │ │ @ instruction: 0xffe1eaff │ │ - strh r6, [r2, #42] @ 0x2a │ │ - vclt.s16 , q6, #0 │ │ + strh r0, [r6, #34] @ 0x22 │ │ + vrsra.u32 d29, d16, #11 │ │ vcgt.s16 d21, d0, #0 │ │ - b.n b1f72 │ │ + b.n b1f82 │ │ adds r0, #116 @ 0x74 │ │ - b.n b1770 │ │ + b.n b1780 │ │ vpmin.u8 q15, q8, │ │ str r0, [r0, r0] │ │ - b.n b1f7e │ │ + b.n b1f8e │ │ movs r5, r0 │ │ - b.n b1f82 │ │ - beq.n b1c7c │ │ - b.n b20dc │ │ + b.n b1f92 │ │ + beq.n b1c8c │ │ + b.n b20ec │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {} │ │ - b.n b238e │ │ + b.n b239e │ │ asrs r0, r0, #32 │ │ - b.n b1f92 │ │ + b.n b1fa2 │ │ mrc2 10, 2, lr, cr12, cr15, {7} @ │ │ movs r0, r0 │ │ - b.n b239a │ │ + b.n b23aa │ │ asrs r5, r0, #32 │ │ - b.n b1f9e │ │ + b.n b1fae │ │ vpmin.u q7, , │ │ lsls r0, r4, #2 │ │ - b.n b17a4 │ │ + b.n b17b4 │ │ movs r0, r0 │ │ - b.n b1d88 │ │ + b.n b1d98 │ │ lsls r2, r3, #1 │ │ - b.n b180e │ │ + b.n b181e │ │ movs r0, r0 │ │ - b.n b2312 │ │ + b.n b2322 │ │ ldc2 10, cr0, [sp, #1020]! @ 0x3fc @ │ │ asrs r0, r2, #2 │ │ - b.n b17b8 │ │ + b.n b17c8 │ │ ldrsb r5, [r0, r7] │ │ - b.n b228e │ │ + b.n b229e │ │ adds r0, #140 @ 0x8c │ │ - b.n b17c0 │ │ + b.n b17d0 │ │ ldrsh r7, [r7, r7] │ │ - b.n b2324 │ │ + b.n b2334 │ │ lsls r0, r1, #2 │ │ - b.n b17c8 │ │ + b.n b17d8 │ │ asrs r1, r0, #32 │ │ - b.n b1dac │ │ + b.n b1dbc │ │ movs r0, #132 @ 0x84 │ │ - b.n b17d0 │ │ + b.n b17e0 │ │ adds r0, #3 │ │ - b.n b1db4 │ │ + b.n b1dc4 │ │ movs r0, r0 │ │ - b.n b1db8 │ │ + b.n b1dc8 │ │ movs r0, r0 │ │ - b.n b17b8 │ │ + b.n b17c8 │ │ movs r0, #2 │ │ - b.n b1dc0 │ │ + b.n b1dd0 │ │ movs r0, #8 │ │ - b.n b17c0 │ │ + b.n b17d0 │ │ movs r1, r0 │ │ - b.n b23ea │ │ + b.n b23fa │ │ movs r4, #171 @ 0xab │ │ - b.n b22ae │ │ + b.n b22be │ │ str r4, [r0, r0] │ │ - b.n b17cc │ │ - add r5, pc, #368 @ (adr r5, b1e24 ) │ │ + b.n b17dc │ │ + add r5, pc, #364 @ (adr r5, b1e30 ) │ │ @ instruction: 0xebfffdae │ │ @ instruction: 0xeaff1078 │ │ - b.n b17fc │ │ + b.n b180c │ │ movs r0, #0 │ │ - b.n b2402 │ │ + b.n b2412 │ │ movs r0, #140 @ 0x8c │ │ - b.n b17e0 │ │ + b.n b17f0 │ │ asrs r1, r0, #32 │ │ - b.n b1de8 │ │ + b.n b1df8 │ │ movs r0, #136 @ 0x88 │ │ - b.n b17e8 │ │ + b.n b17f8 │ │ asrs r2, r3, #1 │ │ - b.n b1874 │ │ + b.n b1884 │ │ stc2 10, cr14, [r3, #1020]! @ 0x3fc @ │ │ asrs r4, r2, #1 │ │ - b.n b1818 │ │ + b.n b1828 │ │ asrs r1, r0, #32 │ │ - b.n b1dfc │ │ + b.n b1e0c │ │ asrs r2, r3, #1 │ │ - b.n b1884 │ │ - ldc2 10, cr14, [pc, #1020] @ b20e0 @ │ │ + b.n b1894 │ │ + ldc2 10, cr14, [pc, #1020] @ b20f0 @ │ │ lsls r4, r1, #2 │ │ - b.n b1824 │ │ + b.n b1834 │ │ mrc2 10, 2, lr, cr7, cr15, {7} @ │ │ - bpl.n b1d60 │ │ - movs r2, r0 │ │ - beq.n b1d9a │ │ - vcgt.s16 d28, d22, #0 │ │ - vshr.u64 , q12, #11 │ │ - vsri.64 d29, d28, #11 │ │ - movs r2, r0 │ │ - cbz r4, b1d48 │ │ - vqrshrn.u64 d23, q14, #11 │ │ - vtbx.8 d28, {d21-d24}, d20 │ │ + bpl.n b1d90 │ │ movs r2, r0 │ │ - strb r6, [r7, #19] │ │ - vcvt.u32.f32 d28, d11, #11 │ │ - @ instruction: 0xfff59cf6 │ │ - @ instruction: 0xfff5cdab │ │ - vrsra.u64 d29, d20, #11 │ │ + beq.n b1cb4 │ │ + vsra.u32 q14, q3, #11 │ │ + vsra.u32 d23, d26, #11 │ │ + vcge.f16 , q6, #0 │ │ movs r2, r0 │ │ - bvs.n b1da4 │ │ + cbz r1, b1d5e │ │ + @ instruction: 0xfff57896 │ │ + @ instruction: 0xfff5cbf4 │ │ movs r2, r0 │ │ - ble.n b1de2 │ │ - vclt.f16 q14, , #0 │ │ - vtbl.8 d29, {d21-d23}, d23 │ │ - @ instruction: 0xfff5cb70 │ │ + strb r0, [r3, #16] │ │ + vshr.u64 d29, d13, #11 │ │ + @ instruction: 0xfff59cd6 │ │ + vcvt.u32.f32 q14, q13, #11 │ │ + vneg.s16 , q2 │ │ movs r2, r0 │ │ - bmi.n b1d28 │ │ + bvs.n b1dd4 │ │ movs r2, r0 │ │ - ldmia r3!, {r2, r7} │ │ + udf #220 @ 0xdc │ │ + vqshl.u32 d28, d8, #21 │ │ + vdup.8 d29, d25[2] │ │ + vtbl.8 d28, {d21-d24}, d0 │ │ movs r2, r0 │ │ - stmia r1!, {r0, r1, r4, r5, r6} │ │ - vshll.u32 , d11, #21 │ │ - vclt.f16 , q10, #0 │ │ + bpl.n b1d58 │ │ movs r2, r0 │ │ - ldmia r7!, {r1, r2, r3, r4, r5} │ │ - vrsubhn.i d28, , │ │ - vtbx.8 d29, {d21-d23}, d27 │ │ - vcgt.s16 d29, d16, #0 │ │ + ldmia r3!, {r2, r4, r7} │ │ movs r2, r0 │ │ - ldmia r3, {r0, r1, r3, r4, r5} │ │ - vtbl.8 d27, {d5-d8}, d14 │ │ - vrsra.u32 d26, d28, #11 │ │ - vcvt.u32.f32 q14, q4, #11 │ │ - movs r2, r0 │ │ - bl 27dd58 │ │ - bne.n b1db0 │ │ + stmia r2!, {r6} │ │ + vqshrn.u64 d23, , #11 │ │ + vqshlu.s32 , q10, #21 │ │ movs r2, r0 │ │ - ldmia r4, {r0, r1, r3, r4, r5} │ │ - vdup.8 d27, d14[2] │ │ - vneg.s16 d24, d0 │ │ - vrshr.u64 d29, d24, #11 │ │ + ldmia r7, {r0, r1, r6, r7} │ │ + vqshl.u32 q14, q6, #21 │ │ + vdup.8 , d29[2] │ │ + vshr.u32 d29, d16, #11 │ │ + movs r2, r0 │ │ + ldmia r3!, {r6, r7} │ │ + vcvt.f16.u16 d27, d30, #11 │ │ + vrsra.u32 q13, , #11 │ │ + vqrdmlsh.s q14, , d24[0] │ │ + movs r2, r0 │ │ + bl 26dd68 │ │ + bne.n b1de0 │ │ + movs r2, r0 │ │ + ldmia r4!, {r6, r7} │ │ + vcvt.u16.f16 d27, d30, #11 │ │ + vsri.32 q12, , #11 │ │ + vmlal.u , d21, d8[0] │ │ movs r2, r0 │ │ - ldmia r6!, {r3, r4, r5} │ │ + ldmia r6, {r3, r6} │ │ movs r2, r0 │ │ - ldmia r5, {r2, r3, r5} │ │ + ldmia r5, {r2, r3, r4, r5} │ │ movs r2, r0 │ │ - stmia r7!, {r0, r1, r2, r7} │ │ - vqshl.u32 , q5, #21 │ │ - vcvt.f32.u32 d28, d26, #11 │ │ + ldmia r0!, {r2, r3} │ │ + vtbl.8 d27, {d21}, d10 │ │ + vcgt.s16 d29, d9, #0 │ │ @ instruction: 0xfff54bf0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n b22b8 │ │ + b.n b22c8 │ │ udf #25 │ │ - b.n b223c │ │ + b.n b224c │ │ str r0, [sp, #24] │ │ - b.n b22c0 │ │ + b.n b22d0 │ │ movs r1, r1 │ │ - b.n b20ea │ │ + b.n b20fa │ │ ldr r3, [sp, #640] @ 0x280 │ │ add.w r0, r0, r0 │ │ - b.n b2452 │ │ + b.n b2462 │ │ movs r1, r6 │ │ subs r0, r0, r0 │ │ strh r2, [r0, #4] │ │ - b.n b22cc │ │ + b.n b22dc │ │ strh r0, [r0, #0] │ │ - b.n b18d8 │ │ + b.n b18e8 │ │ asrs r0, r1, #2 │ │ - b.n b197c │ │ + b.n b198c │ │ strb r0, [r0, #3] │ │ - b.n b1904 │ │ + b.n b1914 │ │ movs r0, r0 │ │ - b.n b246c │ │ + b.n b247c │ │ strb r7, [r0, #0] │ │ - b.n b1eec │ │ + b.n b1efc │ │ movs r3, r3 │ │ lsrs r0, r0, #8 │ │ ands r0, r0 │ │ - b.n b2516 │ │ + b.n b2526 │ │ str r5, [r1, #0] │ │ - b.n b211a │ │ + b.n b212a │ │ str r0, [r3, r0] │ │ - b.n b251e │ │ + b.n b252e │ │ movs r0, r1 │ │ - b.n b2122 │ │ + b.n b2132 │ │ asrs r0, r6, #32 │ │ - b.n b2268 │ │ + b.n b2278 │ │ movs r1, r1 │ │ - b.n b248c │ │ + b.n b249c │ │ movs r5, r1 │ │ ldrh r0, [r0, #16] │ │ asrs r6, r0, #32 │ │ - b.n b2132 │ │ + b.n b2142 │ │ movs r0, #10 │ │ - b.n b2536 │ │ + b.n b2546 │ │ ldr r3, [sp, #580] @ 0x244 │ │ add.w r0, r0, r1 │ │ - b.n b249e │ │ + b.n b24ae │ │ movs r5, r0 │ │ rev r0, r0 │ │ lsls r7, r7, #3 │ │ - b.n b24a6 │ │ + b.n b24b6 │ │ asrs r4, r3, #1 │ │ - b.n b1938 │ │ + b.n b1948 │ │ movs r1, #132 @ 0x84 │ │ - b.n b1e98 │ │ + b.n b1ea8 │ │ lsls r7, r7, #3 │ │ movs r3, #160 @ 0xa0 │ │ lsls r0, r2, #8 │ │ - b.n b1f18 │ │ + b.n b1f28 │ │ lsls r4, r3, #1 │ │ - b.n b1928 │ │ + b.n b1938 │ │ movs r0, r0 │ │ - b.n b1958 │ │ + b.n b1968 │ │ ands r1, r0 │ │ - b.n b232a │ │ + b.n b233a │ │ movs r1, r0 │ │ and.w r0, r0, r1 │ │ - b.n b232a │ │ + b.n b233a │ │ movs r0, r0 │ │ - b.n b1948 │ │ + b.n b1958 │ │ asrs r0, r0, #32 │ │ - b.n b19d2 │ │ + b.n b19e2 │ │ movs r0, r0 │ │ - b.n b24d8 │ │ + b.n b24e8 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n b24e6 │ │ + b.n b24f6 │ │ @ instruction: 0xffe7baff │ │ lsls r3, r0, #3 │ │ - b.n b2358 │ │ + b.n b2368 │ │ movs r0, r2 │ │ add.w r0, r0, r1, lsl #16 │ │ - b.n b258e │ │ + b.n b259e │ │ movs r1, r0 │ │ - b.n b24f2 │ │ + b.n b2502 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r6, r0 │ │ - b.n b2374 │ │ + b.n b2384 │ │ movs r3, r1 │ │ add.w r0, r0, r1 │ │ - b.n b2502 │ │ + b.n b2512 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r1 │ │ - b.n b21aa │ │ + b.n b21ba │ │ movs r7, r0 │ │ add.w r0, r0, r1 │ │ - b.n b22f2 │ │ + b.n b2302 │ │ lsrs r0, r2, #28 │ │ - b.n b2154 │ │ + b.n b2164 │ │ cmp r0, r4 │ │ - b.n b21ba │ │ + b.n b21ca │ │ eors r3, r3 │ │ - b.n b1a0c │ │ + b.n b1a1c │ │ movs r2, r7 │ │ @ instruction: 0xeb00d018 │ │ - b.n b231c │ │ + b.n b232c │ │ ldrh r0, [r6, #30] │ │ - ldmia.w sp!, {r7, r9, fp, lr, pc} │ │ + ldmia.w sp!, {r4, r7, r9, fp, lr, pc} │ │ movs r2, r0 │ │ - ldr r4, [pc, #64] @ (b1ed0 ) │ │ + ldr r4, [pc, #64] @ (b1ee0 ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n b23b0 │ │ + b.n b23c0 │ │ asrs r4, r7, #2 │ │ - b.n b19d8 │ │ + b.n b19e8 │ │ ands r0, r0 │ │ - b.n b21de │ │ + b.n b21ee │ │ asrs r1, r0, #32 │ │ - b.n b1fc0 │ │ + b.n b1fd0 │ │ ldr r3, [sp, #424] @ 0x1a8 │ │ add.w r0, r0, r0 │ │ - b.n b254a │ │ + b.n b255a │ │ movs r3, r1 │ │ lsrs r0, r0, #8 │ │ movs r3, r0 │ │ - b.n b1a52 │ │ + b.n b1a62 │ │ asrs r2, r6, #32 │ │ - b.n b2336 │ │ + b.n b2346 │ │ asrs r1, r6, #1 │ │ - b.n b1c98 │ │ + b.n b1ca8 │ │ movs r7, r0 │ │ - b.n b2560 │ │ + b.n b2570 │ │ movs r1, r2 │ │ ldr r2, [sp, #0] │ │ asrs r4, r2, #2 │ │ - b.n b1a04 │ │ + b.n b1a14 │ │ movs r4, r0 │ │ - b.n b220a │ │ + b.n b221a │ │ asrs r1, r0, #32 │ │ - b.n b1fec │ │ + b.n b1ffc │ │ ldr r3, [sp, #380] @ 0x17c │ │ add.w r0, r0, r0 │ │ - b.n b2576 │ │ + b.n b2586 │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ movs r2, r2 │ │ and.w r0, r0, r0, lsl #6 │ │ - b.n b1a20 │ │ + b.n b1a30 │ │ movs r4, r0 │ │ - b.n b2226 │ │ + b.n b2236 │ │ asrs r1, r0, #32 │ │ - b.n b2008 │ │ + b.n b2018 │ │ ldr r3, [sp, #352] @ 0x160 │ │ add.w r0, r0, r0 │ │ - b.n b2592 │ │ + b.n b25a2 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ movs r3, r0 │ │ - b.n b1a9a │ │ + b.n b1aaa │ │ asrs r2, r6, #32 │ │ - b.n b237e │ │ + b.n b238e │ │ asrs r1, r6, #1 │ │ - b.n b1ce0 │ │ + b.n b1cf0 │ │ movs r7, r0 │ │ - b.n b25a8 │ │ + b.n b25b8 │ │ movs r7, r0 │ │ ldrh r0, [r0, #16] │ │ movs r0, r6 │ │ - b.n b238e │ │ + b.n b239e │ │ movs r5, r1 │ │ and.w r0, r0, r0, lsr #5 │ │ - b.n b1a54 │ │ + b.n b1a64 │ │ movs r4, r0 │ │ - b.n b225a │ │ + b.n b226a │ │ asrs r1, r0, #32 │ │ - b.n b203c │ │ + b.n b204c │ │ ldr r3, [sp, #316] @ 0x13c │ │ add.w r0, r0, r0 │ │ - b.n b25c6 │ │ + b.n b25d6 │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r6 │ │ - b.n b1a6c │ │ + b.n b1a7c │ │ movs r0, #0 │ │ - b.n b2532 │ │ + b.n b2542 │ │ movs r4, #19 │ │ - b.n b25b6 │ │ + b.n b25c6 │ │ movs r0, r0 │ │ - b.n b2058 │ │ + b.n b2068 │ │ asrs r4, r3, #1 │ │ - b.n b1a5e │ │ + b.n b1a6e │ │ movs r2, r0 │ │ - b.n b2682 │ │ + b.n b2692 │ │ movs r2, r0 │ │ - b.n b21e8 │ │ + b.n b21f8 │ │ movs r1, r0 │ │ adds r3, #0 │ │ lsls r0, r6, #1 │ │ - b.n b1d2c │ │ + b.n b1d3c │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {} │ │ - b.n b2696 │ │ + b.n b26a6 │ │ @ instruction: 0xfffbeaff │ │ - ldr r4, [sp, #852] @ 0x354 │ │ - vshll.u32 , d21, #21 │ │ - vqshrn.u64 d28, q2, #11 │ │ + ldr r5, [sp, #40] @ 0x28 │ │ + vshll.u32 , d5, #21 │ │ + vtbl.8 d28, {d5-d6}, d20 │ │ movs r2, r0 │ │ - ldr r2, [sp, #100] @ 0x64 │ │ - vsri.32 d22, d5, #11 │ │ + ldr r1, [sp, #996] @ 0x3e4 │ │ + vsri.32 q11, , #11 │ │ @ instruction: 0xfff54bf0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n b2490 │ │ - beq.n b1f98 │ │ - b.n b2414 │ │ + b.n b24a0 │ │ + beq.n b1fa8 │ │ + b.n b2424 │ │ str r1, [sp, #304] @ 0x130 │ │ - b.n b1abc │ │ + b.n b1acc │ │ strb r0, [r0, #0] │ │ - b.n b26c2 │ │ + b.n b26d2 │ │ asrs r0, r0, #32 │ │ - b.n b26c6 │ │ + b.n b26d6 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n b20a8 │ │ + b.n b20b8 │ │ lsls r4, r4, #1 │ │ - b.n b24a0 │ │ + b.n b24b0 │ │ strb r1, [r7, #22] │ │ - b.n b2324 │ │ + b.n b2334 │ │ ldr r2, [sp, #920] @ 0x398 │ │ add.w r0, r0, r0 │ │ - b.n b263a │ │ + b.n b264a │ │ lsls r5, r0, #1 │ │ subs r0, r0, r0 │ │ movs r6, r4 │ │ - b.n b26e2 │ │ + b.n b26f2 │ │ ldr r2, [sp, #232] @ 0xe8 │ │ add.w r0, r0, r4, lsr #32 │ │ - b.n b1abc │ │ + b.n b1acc │ │ movs r0, r5 │ │ - b.n b26ee │ │ + b.n b26fe │ │ ldr r2, [sp, #220] @ 0xdc │ │ add.w r0, r0, r0, lsl #6 │ │ - b.n b22f6 │ │ + b.n b2306 │ │ subs r1, #1 │ │ - b.n b26fa │ │ + b.n b270a │ │ lsrs r1, r0, #4 │ │ - b.n b2660 │ │ + b.n b2670 │ │ lsls r0, r2, #1 │ │ - b.n b1ad4 │ │ + b.n b1ae4 │ │ adds r1, #0 │ │ strh r0, [r4, #12] │ │ lsrs r0, r6, #28 │ │ - b.n b1dc8 │ │ + b.n b1dd8 │ │ lsrs r0, r2, #28 │ │ - b.n b22ac │ │ + b.n b22bc │ │ strh r5, [r1, #0] │ │ - b.n b2312 │ │ + b.n b2322 │ │ lsls r0, r3, #1 │ │ - b.n b1b68 │ │ + b.n b1b78 │ │ movs r7, r0 │ │ - b.n b271a │ │ + b.n b272a │ │ asrs r0, r1, #32 │ │ - b.n b231e │ │ + b.n b232e │ │ adds r0, #84 @ 0x54 │ │ - b.n b1af4 │ │ + b.n b1b04 │ │ ldr r2, [sp, #616] @ 0x268 │ │ add.w sl, r0, r0, lsl #16 │ │ - b.n b2602 │ │ + b.n b2612 │ │ ldrb r5, [r4, r5] │ │ - b.n b2606 │ │ + b.n b2616 │ │ asrs r1, r0, #32 │ │ - b.n b2732 │ │ + b.n b2742 │ │ movs r0, r0 │ │ - b.n b2696 │ │ + b.n b26a6 │ │ asrs r0, r1, #32 │ │ - b.n b1b8c │ │ + b.n b1b9c │ │ asrs r7, r0, #32 │ │ lsls r0, r0, #12 │ │ str r0, [r0, #0] │ │ - b.n b27c2 │ │ - ldr r3, [pc, #616] @ (b226c ) │ │ - b.n b268c │ │ + b.n b27d2 │ │ + ldr r3, [pc, #616] @ (b227c ) │ │ + b.n b269c │ │ str r5, [r3, r0] │ │ - b.n b268a │ │ + b.n b269a │ │ asrs r4, r5, #32 │ │ - b.n b1b20 │ │ + b.n b1b30 │ │ movs r1, r0 │ │ - b.n b26fe │ │ + b.n b270e │ │ movs r0, r0 │ │ - b.n b27d6 │ │ + b.n b27e6 │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n b275e │ │ + b.n b276e │ │ lsrs r2, r0, #4 │ │ - b.n b2762 │ │ + b.n b2772 │ │ lsls r6, r2, #18 │ │ - b.n b2168 │ │ + b.n b2178 │ │ movs r0, #5 │ │ - b.n b236a │ │ + b.n b237a │ │ adds r0, #0 │ │ - b.n b276e │ │ + b.n b277e │ │ lsls r0, r4, #18 │ │ - b.n b2372 │ │ + b.n b2382 │ │ lsrs r1, r0, #14 │ │ - b.n b2336 │ │ + b.n b2346 │ │ asrs r1, r4, #18 │ │ - b.n b237a │ │ + b.n b238a │ │ lsls r7, r7, #1 │ │ - b.n b27be │ │ - ldrh r3, [r4, #38] @ 0x26 │ │ + b.n b27ce │ │ + ldrh r2, [r4, #38] @ 0x26 │ │ @ instruction: 0xfa003001 │ │ - b.n b24f2 │ │ + b.n b2502 │ │ adds r0, #7 │ │ adds r1, #160 @ 0xa0 │ │ movs r0, #1 │ │ - b.n b257a │ │ + b.n b258a │ │ asrs r0, r0, #32 │ │ - b.n b25a0 │ │ + b.n b25b0 │ │ movs r0, r0 │ │ - b.n b22fa │ │ + b.n b230a │ │ movs r0, #0 │ │ - b.n b279a │ │ + b.n b27aa │ │ movs r0, #1 │ │ movs r3, #0 │ │ movs r3, r0 │ │ - b.n b2302 │ │ + b.n b2312 │ │ movs r5, r1 │ │ subs r2, #0 │ │ movs r2, r0 │ │ - b.n b238c │ │ + b.n b239c │ │ movs r3, r1 │ │ lsrs r0, r0, #8 │ │ lsls r6, r4, #2 │ │ - b.n b23b2 │ │ + b.n b23c2 │ │ movs r0, r0 │ │ - b.n b2722 │ │ + b.n b2732 │ │ str r0, [r0, #0] │ │ - b.n b23ba │ │ + b.n b23ca │ │ @ instruction: 0xffe31aff │ │ movs r0, r1 │ │ - b.n b23c2 │ │ + b.n b23d2 │ │ ldrb r7, [r4, #12] │ │ add.w sl, r0, pc, lsl #3 │ │ orn r0, r8, #12582912 @ 0xc00000 │ │ - b.n b25a0 │ │ + b.n b25b0 │ │ lsrs r7, r5, #11 │ │ orr.w sl, r0, #510 @ 0x1fe │ │ @ instruction: 0xeb00d018 │ │ - b.n b2530 │ │ + b.n b2540 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r2, r4, r5} │ │ - b.n b1be0 │ │ + b.n b1bf0 │ │ cmp r5, #178 @ 0xb2 │ │ - b.n b26a6 │ │ + b.n b26b6 │ │ asrs r0, r6, #32 │ │ - b.n b1be8 │ │ + b.n b1bf8 │ │ movs r0, r0 │ │ - b.n b21cc │ │ + b.n b21dc │ │ asrs r1, r0, #32 │ │ - b.n b21d0 │ │ - add r3, pc, #320 @ (adr r3, b21f4 ) │ │ + b.n b21e0 │ │ + add r3, pc, #316 @ (adr r3, b2200 ) │ │ @ instruction: 0xebff0014 │ │ - b.n b1bf8 │ │ + b.n b1c08 │ │ movs r0, #182 @ 0xb6 │ │ - b.n b27fe │ │ + b.n b280e │ │ asrs r0, r2, #32 │ │ - b.n b1c00 │ │ + b.n b1c10 │ │ movs r0, r0 │ │ - b.n b21e4 │ │ + b.n b21f4 │ │ asrs r1, r0, #32 │ │ - b.n b21e8 │ │ - add r3, pc, #296 @ (adr r3, b21f4 ) │ │ - @ instruction: 0xebffc8c4 │ │ - movs r2, r0 │ │ - ldr r7, [sp, #784] @ 0x310 │ │ - vneg.f16 , q11 │ │ - vcle.s16 d28, d24, #0 │ │ - vcle.s16 q14, , #0 │ │ + b.n b21f8 │ │ + add r3, pc, #292 @ (adr r3, b2200 ) │ │ + @ instruction: 0xebffc8d4 │ │ + movs r2, r0 │ │ + ldr r7, [sp, #536] @ 0x218 │ │ + @ instruction: 0xfff5b8b3 │ │ + vclt.s16 d28, d29, #0 │ │ + vrshr.u32 q14, q10, #11 │ │ @ instruction: 0xfff5ffff │ │ @ instruction: 0xeaff4800 │ │ stmdb sp!, {r0, r2, r3, ip, sp, pc} │ │ - b.n b242e │ │ + b.n b243e │ │ ldr r2, [sp, #508] @ 0x1fc │ │ add.w ip, r0, r9, lsr #29 │ │ add.w r0, r0, r8, asr #32 │ │ - b.n b1c38 │ │ + b.n b1c48 │ │ movs r0, r0 │ │ - b.n b221c │ │ + b.n b222c │ │ lsls r4, r4, #1 │ │ - b.n b2602 │ │ + b.n b2612 │ │ ldr r2, [sp, #568] @ 0x238 │ │ add.w r0, r0, r0 │ │ - b.n b27aa │ │ + b.n b27ba │ │ ldrh r0, [r0, #0] │ │ lsrs r5, r7, #2 │ │ movs r4, r2 │ │ - b.n b1c50 │ │ + b.n b1c60 │ │ movs r0, #199 @ 0xc7 │ │ - b.n b2856 │ │ + b.n b2866 │ │ asrs r0, r2, #32 │ │ - b.n b1c58 │ │ + b.n b1c68 │ │ movs r0, r0 │ │ - b.n b223c │ │ + b.n b224c │ │ asrs r1, r0, #32 │ │ - b.n b2240 │ │ - add r3, pc, #208 @ (adr r3, b21f4 ) │ │ - @ instruction: 0xebffc750 │ │ + b.n b2250 │ │ + add r3, pc, #204 @ (adr r3, b2200 ) │ │ + @ instruction: 0xebffc760 │ │ movs r2, r0 │ │ - stmia r5!, {r2, r3, r5, r6} │ │ - vcvt.u16.f16 q12, , #11 │ │ + stmia r7!, {r1, r2, r4, r5} │ │ + vmull.u q12, d21, d22 │ │ vcgt.s16 d16, d0, #0 │ │ - b.n b27d6 │ │ + b.n b27e6 │ │ movs r4, r3 │ │ lsrs r0, r0, #8 │ │ adds r0, #4 │ │ - b.n b1c5e │ │ + b.n b1c6e │ │ movs r0, r0 │ │ - b.n b27e8 │ │ + b.n b27f8 │ │ movs r4, r3 │ │ lsrs r0, r0, #8 │ │ - ldr r5, [pc, #960] @ (b2508 ) │ │ + ldr r5, [pc, #960] @ (b2518 ) │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n b2668 │ │ - beq.n b2160 │ │ - b.n b25ec │ │ + b.n b2678 │ │ + beq.n b2170 │ │ + b.n b25fc │ │ strh r1, [r0, #0] │ │ - b.n b2496 │ │ + b.n b24a6 │ │ asrs r0, r0, #32 │ │ - b.n b289a │ │ + b.n b28aa │ │ movs r0, r0 │ │ - b.n b280e │ │ + b.n b281e │ │ lsls r2, r1, #1 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n b280a │ │ + b.n b281a │ │ lsls r0, r1, #1 │ │ subs r2, #0 │ │ asrs r0, r0, #32 │ │ - b.n b1c8e │ │ + b.n b1c9e │ │ movs r0, r0 │ │ - b.n b2814 │ │ + b.n b2824 │ │ movs r3, r2 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, #0] │ │ - b.n b28ba │ │ + b.n b28ca │ │ str r6, [r0, r0] │ │ - b.n b2120 │ │ + b.n b2130 │ │ str r7, [r7, r1] │ │ - b.n b260c │ │ + b.n b261c │ │ lsls r7, r3, #1 │ │ - b.n b2870 │ │ + b.n b2880 │ │ movs r5, r2 │ │ subs r2, #0 │ │ str r1, [r0, #0] │ │ - b.n b269a │ │ + b.n b26aa │ │ movs r6, r0 │ │ - b.n b2438 │ │ + b.n b2448 │ │ @ instruction: 0xfff81aff │ │ stmia r1!, {r4} │ │ - b.n b1cd8 │ │ + b.n b1ce8 │ │ lsls r6, r0, #4 │ │ - b.n b2884 │ │ + b.n b2894 │ │ asrs r0, r0, #32 │ │ - b.n b1cbc │ │ + b.n b1ccc │ │ adds r1, #2 │ │ movs r3, #224 @ 0xe0 │ │ stmia r0!, {r2, r3} │ │ - b.n b22c8 │ │ + b.n b22d8 │ │ movs r7, r0 │ │ and.w r0, r0, r8, asr #7 │ │ - b.n b1cf0 │ │ + b.n b1d00 │ │ asrs r1, r0, #32 │ │ - b.n b22d4 │ │ + b.n b22e4 │ │ movs r6, r6 │ │ and.w r0, r0, r0, asr #7 │ │ - b.n b1cfc │ │ + b.n b1d0c │ │ asrs r1, r0, #32 │ │ - b.n b22e0 │ │ + b.n b22f0 │ │ movs r3, r6 │ │ @ instruction: 0xea00c0d8 │ │ - b.n b1d08 │ │ + b.n b1d18 │ │ stmia r0!, {r2, r3} │ │ - b.n b22ec │ │ + b.n b22fc │ │ asrs r2, r0, #32 │ │ - b.n b2512 │ │ + b.n b2522 │ │ movs r0, r1 │ │ - b.n b2516 │ │ + b.n b2526 │ │ movs r0, #12 │ │ - b.n b251a │ │ + b.n b252a │ │ ldr r2, [sp, #544] @ 0x220 │ │ add.w r0, r0, r9, asr #32 │ │ and.w r0, r0, ip, ror #24 │ │ - b.n b2926 │ │ + b.n b2936 │ │ adds r0, #8 │ │ - b.n b252a │ │ + b.n b253a │ │ str r1, [r0, #0] │ │ - b.n b1b74 │ │ + b.n b1b84 │ │ ands r0, r0 │ │ - b.n b2932 │ │ + b.n b2942 │ │ str r4, [r0, #0] │ │ - b.n b1d16 │ │ + b.n b1d26 │ │ movs r3, r0 │ │ - b.n b289e │ │ + b.n b28ae │ │ ands r1, r0 │ │ stmia r3!, {} │ │ movs r0, r0 │ │ - b.n b28ae │ │ + b.n b28be │ │ movs r1, r3 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n b28ae │ │ + b.n b28be │ │ movs r7, r2 │ │ rev r0, r0 │ │ str r4, [r2, #8] │ │ - b.n b1d50 │ │ + b.n b1d60 │ │ movs r0, #2 │ │ - b.n b2326 │ │ + b.n b2336 │ │ movs r0, #2 │ │ - b.n b269e │ │ + b.n b26ae │ │ str r0, [r0, r0] │ │ - b.n b295e │ │ + b.n b296e │ │ str r6, [r0, #0] │ │ - b.n b2340 │ │ + b.n b2350 │ │ ands r5, r0 │ │ - b.n b21c8 │ │ + b.n b21d8 │ │ tst r4, r4 │ │ - b.n b21d6 │ │ + b.n b21e6 │ │ ands r0, r0 │ │ - b.n b1db4 │ │ + b.n b1dc4 │ │ ands r5, r0 │ │ - b.n b21d4 │ │ + b.n b21e4 │ │ str r1, [r0, r0] │ │ - b.n b2740 │ │ + b.n b2750 │ │ ands r7, r1 │ │ - b.n b2642 │ │ + b.n b2652 │ │ ands r4, r0 │ │ - b.n b21ea │ │ + b.n b21fa │ │ ands r1, r0 │ │ - b.n b1dc8 │ │ + b.n b1dd8 │ │ adds r0, #2 │ │ - b.n b274c │ │ + b.n b275c │ │ strb r4, [r0, #0] │ │ - b.n b1d6a │ │ + b.n b1d7a │ │ movs r2, r0 │ │ - b.n b24f4 │ │ + b.n b2504 │ │ ands r0, r0 │ │ - b.n b2992 │ │ + b.n b29a2 │ │ ands r1, r0 │ │ adds r3, #0 │ │ movs r7, r0 │ │ - b.n b2504 │ │ + b.n b2514 │ │ movs r1, r0 │ │ cmp r2, #0 │ │ movs r2, r0 │ │ - b.n b2508 │ │ + b.n b2518 │ │ @ instruction: 0xffee3aff │ │ movs r1, r0 │ │ - b.n b26f0 │ │ + b.n b2700 │ │ movs r0, r0 │ │ and.w r0, r0, r8 │ │ - b.n b25b2 │ │ + b.n b25c2 │ │ movs r0, r0 │ │ - b.n b291e │ │ + b.n b292e │ │ asrs r6, r7, #32 │ │ asrs r0, r4, #14 │ │ asrs r0, r0, #32 │ │ asrs r3, r0, #23 │ │ adds r0, #2 │ │ asrs r0, r0, #10 │ │ movs r0, r0 │ │ - b.n b29c6 │ │ + b.n b29d6 │ │ movs r0, r0 │ │ - b.n b1e10 │ │ + b.n b1e20 │ │ asrs r0, r1, #32 │ │ - b.n b25ce │ │ - beq.n b22c0 │ │ - b.n b2728 │ │ - ldr r5, [pc, #960] @ (b2654 ) │ │ + b.n b25de │ │ + beq.n b22d0 │ │ + b.n b2738 │ │ + ldr r5, [pc, #960] @ (b2664 ) │ │ ldmia.w sp!, {r0} │ │ - b.n b25da │ │ + b.n b25ea │ │ vrhadd.u16 d14, d14, d31 │ │ - itttt hi │ │ - @ instruction: 0xfff5d9fd │ │ - vneghi.s16 , q7 │ │ - vneghi.f16 q8, q14 │ │ - @ instruction: 0xfff698d2 │ │ + stmia r0!, {r1, r2} │ │ + vshll.u32 , d29, #21 │ │ + vneg.s16 d25, d30 │ │ + vqshl.u64 q8, q6, #53 @ 0x35 │ │ + vtbl.8 d25, {d6-d7}, d7 │ │ vcvt.f16.u16 q10, q8, #11 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n b27d4 │ │ + b.n b27e4 │ │ udf #17 │ │ - b.n b2758 │ │ + b.n b2768 │ │ str r0, [r0, #0] │ │ - b.n b2602 │ │ + b.n b2612 │ │ lsls r4, r1, #2 │ │ - b.n b1e04 │ │ + b.n b1e14 │ │ movs r0, r0 │ │ - b.n b23e8 │ │ + b.n b23f8 │ │ lsls r2, r3, #1 │ │ - b.n b1e6e │ │ + b.n b1e7e │ │ movs r5, r0 │ │ - b.n b2972 │ │ + b.n b2982 │ │ movs r1, r0 │ │ cmp r2, #0 │ │ - beq.n b22f8 │ │ - b.n b2770 │ │ + beq.n b2308 │ │ + b.n b2780 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r0, ip, lr} │ │ - b.n b2622 │ │ + b.n b2632 │ │ asrs r0, r2, #32 │ │ - b.n b2800 │ │ + b.n b2810 │ │ ands r2, r0 │ │ - b.n b262a │ │ + b.n b263a │ │ movs r6, r0 │ │ - b.n b262e │ │ + b.n b263e │ │ cmp r4, #1 │ │ - b.n b2a32 │ │ - bgt.n b22b2 │ │ + b.n b2a42 │ │ + bgt.n b22c0 │ │ @ instruction: 0xebff17b2 │ │ - b.n b290a │ │ + b.n b291a │ │ adds r0, #88 @ 0x58 │ │ - b.n b1e3c │ │ + b.n b1e4c │ │ stmia r0!, {r3, r4, r6} │ │ - b.n b1e40 │ │ + b.n b1e50 │ │ subs r7, r7, #7 │ │ - b.n b29a4 │ │ - b.n b23b0 │ │ - b.n b1e48 │ │ + b.n b29b4 │ │ + b.n b23c0 │ │ + b.n b1e58 │ │ asrs r1, r0, #32 │ │ - b.n b23ba │ │ + b.n b23ca │ │ movs r0, #0 │ │ - b.n b2ad2 │ │ + b.n b2ae2 │ │ asrs r1, r0, #32 │ │ asrs r0, r0, #12 │ │ movs r0, #2 │ │ - b.n b23c6 │ │ + b.n b23d6 │ │ stmia r0!, {r2, r3} │ │ - b.n b243c │ │ + b.n b244c │ │ movs r0, #1 │ │ asrs r0, r0, #12 │ │ asrs r1, r0, #32 │ │ - b.n b234a │ │ - b.n b2344 │ │ - b.n b2448 │ │ + b.n b235a │ │ + b.n b2354 │ │ + b.n b2458 │ │ movs r0, r1 │ │ - b.n b1e48 │ │ + b.n b1e58 │ │ movs r4, r0 │ │ - b.n b2a72 │ │ + b.n b2a82 │ │ adds r0, #3 │ │ - b.n b2454 │ │ - b.n b2350 │ │ + b.n b2464 │ │ + b.n b2360 │ │ asrs r0, r4, #6 │ │ movs r1, r0 │ │ asrs r0, r0, #12 │ │ asrs r5, r0, #32 │ │ - b.n b2682 │ │ + b.n b2692 │ │ movs r0, #4 │ │ - b.n b2686 │ │ - b.n b2348 │ │ - b.n b1e64 │ │ + b.n b2696 │ │ + b.n b2358 │ │ + b.n b1e74 │ │ str r4, [r0, #0] │ │ - b.n b1e68 │ │ - add r3, pc, #724 @ (adr r3, b2624 ) │ │ + b.n b1e78 │ │ + add r3, pc, #720 @ (adr r3, b2630 ) │ │ @ instruction: 0xebffffdf │ │ - @ instruction: 0xeaffc584 │ │ + @ instruction: 0xeaffc594 │ │ movs r2, r0 │ │ - stmia r4!, {r0, r1, r4, r5, r6, r7} │ │ - vtbx.8 d26, {d21-d23}, d14 │ │ - vrsra.u64 d23, d3, #11 │ │ + stmia r6!, {r1, r6, r7} │ │ + vtbx.8 d26, {d5-d8}, d1 │ │ + vcgt.f16 , q11, #0 │ │ vcgt.s16 d18, d4, #0 │ │ - b.n b1e8a │ │ + b.n b1e9a │ │ asrs r0, r0, #1 │ │ - b.n b2a70 │ │ + b.n b2a80 │ │ asrs r1, r0, #32 │ │ - b.n b2376 │ │ + b.n b2386 │ │ lsls r0, r4, #1 │ │ - b.n b2a18 │ │ + b.n b2a28 │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ asrs r0, r0, #32 │ │ - b.n b2abe │ │ - b.n b1d08 │ │ + b.n b2ace │ │ + b.n b1d18 │ │ @ instruction: 0xeaff4c10 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n b28a4 │ │ + b.n b28b4 │ │ asrs r4, r3, #32 │ │ - b.n b1ecc │ │ + b.n b1edc │ │ @ instruction: 0x47c2 │ │ - b.n b29a2 │ │ - ldr r7, [pc, #1020] @ (b2790 ) │ │ - b.n b2a34 │ │ + b.n b29b2 │ │ + ldr r7, [pc, #1020] @ (b27a0 ) │ │ + b.n b2a44 │ │ movs r1, #153 @ 0x99 │ │ - b.n b299a │ │ + b.n b29aa │ │ asrs r1, r0, #32 │ │ - b.n b24bc │ │ + b.n b24cc │ │ movs r4, r0 │ │ - b.n b26e2 │ │ + b.n b26f2 │ │ @ instruction: 0xffc2ebff │ │ movs r4, r0 │ │ - b.n b26ea │ │ + b.n b26fa │ │ ldrh r0, [r2, #32] │ │ - ldmia.w sp!, {r1, r2, r3, r8, sl, sp, pc} │ │ + ldmia.w sp!, {r0, r1, r5, r8, sl, sp, pc} │ │ vcvt.f16.u16 d20, d0, #11 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n b28d4 │ │ + b.n b28e4 │ │ asrs r2, r0, #32 │ │ - b.n b26fe │ │ + b.n b270e │ │ movs r0, #0 │ │ - b.n b2b02 │ │ + b.n b2b12 │ │ ands r0, r0 │ │ - b.n b2b06 │ │ + b.n b2b16 │ │ ldr r2, [sp, #164] @ 0xa4 │ │ add.w r0, r0, r1 │ │ - b.n b2aae │ │ + b.n b2abe │ │ movs r1, r0 │ │ - bge.n b23d2 │ │ + bge.n b23e2 │ │ movs r4, r0 │ │ - b.n b2716 │ │ + b.n b2726 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r2, r3, r4, r8, fp, ip, pc} │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n b1f02 │ │ + b.n b1f12 │ │ movs r4, r0 │ │ - b.n b2726 │ │ + b.n b2736 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r4, r5, r6, sl, fp, lr} │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n b290c │ │ + b.n b291c │ │ ands r2, r0 │ │ - b.n b2736 │ │ + b.n b2746 │ │ movs r4, #63 @ 0x3f │ │ - b.n b2b3a │ │ + b.n b2b4a │ │ lsls r7, r7, #16 │ │ - b.n b2aa6 │ │ + b.n b2ab6 │ │ str r1, [r0, r0] │ │ - b.n b2742 │ │ + b.n b2752 │ │ movs r0, #4 │ │ adds r1, #160 @ 0xa0 │ │ str r0, [r0, #0] │ │ - b.n b274a │ │ + b.n b275a │ │ ldr r1, [sp, #512] @ 0x200 │ │ add.w r0, r0, r4 │ │ - b.n b26b2 │ │ + b.n b26c2 │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n b2b5a │ │ + b.n b2b6a │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r0} │ │ - b.n b2b02 │ │ + b.n b2b12 │ │ movs r2, r0 │ │ - bge.n b2426 │ │ + bge.n b2436 │ │ str r5, [r0, r0] │ │ - b.n b252a │ │ + b.n b253a │ │ ands r0, r0 │ │ - b.n b24b6 │ │ + b.n b24c6 │ │ movs r3, r0 │ │ @ instruction: 0xea009906 │ │ add.w r0, r0, r0 │ │ - b.n b1f5a │ │ + b.n b1f6a │ │ movs r4, r0 │ │ - b.n b2ade │ │ + b.n b2aee │ │ @ instruction: 0xfff51aff │ │ lsls r7, r7, #16 │ │ - b.n b2aee │ │ + b.n b2afe │ │ movs r4, #63 @ 0x3f │ │ - b.n b2b8a │ │ + b.n b2b9a │ │ movs r0, #4 │ │ adds r1, #160 @ 0xa0 │ │ movs r6, r0 │ │ - b.n b2792 │ │ + b.n b27a2 │ │ asrs r5, r0, #32 │ │ - b.n b2796 │ │ + b.n b27a6 │ │ ldr r1, [sp, #436] @ 0x1b4 │ │ add.w r0, r0, r0 │ │ - b.n b2706 │ │ + b.n b2716 │ │ @ instruction: 0xffec0aff │ │ @ instruction: 0xffedeaff │ │ - ldr r7, [pc, #960] @ (b2828 ) │ │ + ldr r7, [pc, #960] @ (b2838 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n b2988 │ │ + b.n b2998 │ │ svc 139 @ 0x8b │ │ - b.n b290c │ │ + b.n b291c │ │ movs r0, #40 @ 0x28 │ │ - b.n b1f90 │ │ + b.n b1fa0 │ │ str r0, [sp, #4] │ │ - b.n b27ba │ │ + b.n b27ca │ │ ldrsb r0, [r6, r3] │ │ - b.n b1fbc │ │ + b.n b1fcc │ │ asrs r3, r0, #32 │ │ - b.n b27c2 │ │ + b.n b27d2 │ │ eors r4, r3 │ │ - b.n b2026 │ │ + b.n b2036 │ │ str r5, [r0, r0] │ │ - b.n b25a8 │ │ + b.n b25b8 │ │ movs r4, r5 │ │ - b.n b1fa8 │ │ + b.n b1fb8 │ │ adds r0, #36 @ 0x24 │ │ - b.n b1fac │ │ + b.n b1fbc │ │ strb r0, [r2, #1] │ │ - b.n b1fc0 │ │ + b.n b1fd0 │ │ lsls r7, r1, #13 │ │ @ instruction: 0xeb00a000 │ │ - b.n b27de │ │ + b.n b27ee │ │ lsls r0, r0, #1 │ │ - b.n b29ac │ │ + b.n b29bc │ │ str r1, [r1, r0] │ │ - b.n b27e6 │ │ + b.n b27f6 │ │ lsrs r7, r5, #11 │ │ - bne.w fffd24b0 │ │ - b.n b2bee │ │ + bne.w fffd24c0 │ │ + b.n b2bfe │ │ asrs r0, r0, #3 │ │ - b.n b29c6 │ │ + b.n b29d6 │ │ movs r0, r6 │ │ - b.n b2020 │ │ + b.n b2030 │ │ movs r0, r1 │ │ - b.n b1fce │ │ + b.n b1fde │ │ lsls r0, r6, #2 │ │ - b.n b1fd2 │ │ + b.n b1fe2 │ │ movs r4, r0 │ │ - b.n b1fec │ │ + b.n b1ffc │ │ movs r4, r1 │ │ - b.n b1fda │ │ + b.n b1fea │ │ lsls r4, r6, #2 │ │ - b.n b1fde │ │ + b.n b1fee │ │ lsls r0, r3, #16 │ │ - b.n b25dc │ │ + b.n b25ec │ │ str r1, [r0, #0] │ │ - b.n b2952 │ │ + b.n b2962 │ │ movs r4, r1 │ │ - b.n b200c │ │ + b.n b201c │ │ strb r0, [r0, #0] │ │ - b.n b29a8 │ │ + b.n b29b8 │ │ lsrs r7, r1, #10 │ │ orr.w r0, r1, #8519680 @ 0x820000 │ │ - b.n b2b02 │ │ + b.n b2b12 │ │ lsls r6, r1, #4 │ │ subs r0, r0, r0 │ │ movs r4, #208 @ 0xd0 │ │ - b.n b2874 │ │ + b.n b2884 │ │ asrs r0, r3, #16 │ │ - b.n b282e │ │ + b.n b283e │ │ movs r7, r0 │ │ - b.n b24fe │ │ + b.n b250e │ │ stmia r0!, {r7} │ │ - b.n b2a0a │ │ + b.n b2a1a │ │ asrs r0, r3, #32 │ │ - b.n b2014 │ │ + b.n b2024 │ │ asrs r3, r0, #32 │ │ - b.n b2822 │ │ + b.n b2832 │ │ movs r0, r2 │ │ lsrs r0, r0, #8 │ │ asrs r0, r3, #1 │ │ - b.n b2a18 │ │ + b.n b2a28 │ │ movs r0, #216 @ 0xd8 │ │ - b.n b289e │ │ + b.n b28ae │ │ strb r4, [r6, #2] │ │ - b.n b2042 │ │ + b.n b2052 │ │ lsls r0, r6 │ │ - b.n b2046 │ │ + b.n b2056 │ │ lsrs r5, r1, #10 │ │ orn r0, r1, #540 @ 0x21c │ │ - b.n b2560 │ │ + b.n b2570 │ │ str r4, [r0, #0] │ │ - b.n b2562 │ │ + b.n b2572 │ │ ands r0, r0 │ │ - b.n b2c62 │ │ + b.n b2c72 │ │ cmp r3, #0 │ │ ldcl 0, cr1, [r1, #544] @ 0x220 │ │ - b.n b2a3e │ │ + b.n b2a4e │ │ strb r7, [r0, #0] │ │ - b.n b285a │ │ + b.n b286a │ │ lsrs r5, r1, #10 │ │ orr.w r0, r1, #135168 @ 0x21000 │ │ asrs r0, r4, #6 │ │ ands r2, r0 │ │ lsls r0, r4, #6 │ │ ands r0, r4 │ │ - b.n b2056 │ │ + b.n b2066 │ │ adds r0, #36 @ 0x24 │ │ - b.n b205a │ │ + b.n b206a │ │ cmp r3, #0 │ │ stcl 0, cr4, [r1, #144] @ 0x90 │ │ - b.n b2084 │ │ + b.n b2094 │ │ movs r0, r0 │ │ - b.n b2656 │ │ + b.n b2666 │ │ movs r0, r4 │ │ - b.n b206c │ │ + b.n b207c │ │ lsls r4, r0, #1 │ │ - b.n b2088 │ │ + b.n b2098 │ │ asrs r0, r7, #32 │ │ - b.n b207a │ │ + b.n b208a │ │ movs r1, r0 │ │ - b.n b2c40 │ │ + b.n b2c50 │ │ lsls r2, r6, #3 │ │ lsrs r0, r0, #8 │ │ lsls r0, r1, #2 │ │ - b.n b2a80 │ │ + b.n b2a90 │ │ asrs r1, r1, #32 │ │ - b.n b28aa │ │ + b.n b28ba │ │ movs r0, #0 │ │ - b.n b2cae │ │ + b.n b2cbe │ │ stmia r0!, {r2, r4} │ │ - b.n b208c │ │ + b.n b209c │ │ str r0, [r2, r0] │ │ - b.n b2090 │ │ - add r0, sp, #720 @ 0x2d0 │ │ + b.n b20a0 │ │ + add r0, sp, #716 @ 0x2cc │ │ @ instruction: 0xebff0000 │ │ - b.n b2c1e │ │ + b.n b2c2e │ │ lsls r3, r4, #3 │ │ subs r0, r0, r0 │ │ lsls r4, r0, #1 │ │ - b.n b20b8 │ │ + b.n b20c8 │ │ asrs r0, r0, #2 │ │ - b.n b2aa4 │ │ + b.n b2ab4 │ │ movs r0, #120 @ 0x78 │ │ - b.n b2aa8 │ │ + b.n b2ab8 │ │ strb r4, [r1, #0] │ │ - b.n b20b2 │ │ + b.n b20c2 │ │ str r0, [r2, r0] │ │ - b.n b20b6 │ │ + b.n b20c6 │ │ str r4, [r2, #0] │ │ - b.n b20ba │ │ + b.n b20ca │ │ lsls r0, r1, #2 │ │ - b.n b2ab8 │ │ - add r5, sp, #216 @ 0xd8 │ │ + b.n b2ac8 │ │ + add r5, sp, #212 @ 0xd4 │ │ @ instruction: 0xebff4000 │ │ - b.n b28e6 │ │ + b.n b28f6 │ │ movs r7, r0 │ │ - b.n b26b4 │ │ + b.n b26c4 │ │ strh r6, [r0, #0] │ │ - b.n b26ae │ │ + b.n b26be │ │ movs r0, r0 │ │ - b.n b2c5a │ │ + b.n b2c6a │ │ movs r5, r2 │ │ subs r0, r0, r0 │ │ movs r0, #124 @ 0x7c │ │ - b.n b20f4 │ │ + b.n b2104 │ │ movs r3, r0 │ │ - b.n b2be2 │ │ + b.n b2bf2 │ │ lsls r1, r0, #4 │ │ subs r0, r0, r0 │ │ lsls r0, r7, #1 │ │ - b.n b2100 │ │ + b.n b2110 │ │ str r1, [r1, r0] │ │ - b.n b290a │ │ + b.n b291a │ │ str r0, [sp, #0] │ │ - b.n b20ee │ │ + b.n b20fe │ │ asrs r1, r0, #32 │ │ - b.n b2ae4 │ │ + b.n b2af4 │ │ lsls r1, r0, #4 │ │ - b.n b287a │ │ + b.n b288a │ │ lsls r3, r7, #3 │ │ subs r2, #0 │ │ asrs r0, r5, #32 │ │ - b.n b2108 │ │ + b.n b2118 │ │ lsls r0, r7, #13 │ │ add.w r0, r0, r0 │ │ - b.n b2c86 │ │ + b.n b2c96 │ │ lsls r5, r1, #4 │ │ lsrs r0, r0, #8 │ │ lsls r0, r1, #2 │ │ - b.n b2b08 │ │ + b.n b2b18 │ │ asrs r0, r0, #2 │ │ - b.n b2b0c │ │ + b.n b2b1c │ │ movs r0, #120 @ 0x78 │ │ - b.n b2b10 │ │ + b.n b2b20 │ │ adds r0, #8 │ │ - b.n b2d3a │ │ - cbnz r4, b266a │ │ + b.n b2d4a │ │ + cbnz r3, b267a │ │ @ instruction: 0xebff8008 │ │ - b.n b2714 │ │ + b.n b2724 │ │ ands r0, r0 │ │ - b.n b2946 │ │ + b.n b2956 │ │ str r0, [sp, #20] │ │ - b.n b294a │ │ + b.n b295a │ │ @ instruction: 0xffe7eaff │ │ lsls r2, r6, #30 │ │ - b.n b2c22 │ │ + b.n b2c32 │ │ lsrs r7, r7, #31 │ │ - b.n b2cb4 │ │ + b.n b2cc4 │ │ movs r0, r0 │ │ - b.n b28c2 │ │ + b.n b28d2 │ │ lsls r5, r7, #2 │ │ subs r0, r0, r0 │ │ movs r0, r5 │ │ - b.n b2154 │ │ + b.n b2164 │ │ lsls r0, r2, #1 │ │ - b.w f72686 │ │ - b.n b2144 │ │ + b.w f72696 │ │ + b.n b2154 │ │ movs r0, r1 │ │ - b.n b26ae │ │ + b.n b26be │ │ movs r4, r4 │ │ - b.n b2146 │ │ + b.n b2156 │ │ lsls r4, r0, #1 │ │ - b.n b2168 │ │ + b.n b2178 │ │ str r0, [sp, #352] @ 0x160 │ │ - b.n b2b4e │ │ + b.n b2b5e │ │ movs r0, r6 │ │ - b.n b2b3e │ │ + b.n b2b4e │ │ asrs r1, r1, #32 │ │ - b.n b2982 │ │ + b.n b2992 │ │ lsls r4, r7, #3 │ │ ldmia.w r0!, {r2, r3, r4, r5, r6, r7} │ │ stmia.w r1!, {r2, r3, r4, r5, r6, r7} │ │ ldmia.w r0, {r2, r3, r4, r5, r6, r7} │ │ stmia.w r1, {r3, r4, r5, ip, lr} │ │ - b.n b2b70 │ │ + b.n b2b80 │ │ asrs r4, r1, #32 │ │ - b.n b2d9a │ │ + b.n b2daa │ │ strh r5, [r0, #0] │ │ - b.n b299e │ │ + b.n b29ae │ │ lsrs r5, r1, #11 │ │ orr.w r0, r8, #8912896 @ 0x880000 │ │ - b.n b29a6 │ │ + b.n b29b6 │ │ lsrs r5, r1, #11 │ │ orr.w sl, r0, #6324224 @ 0x608000 │ │ orr.w r0, r0, #2097152 @ 0x200000 │ │ - b.n b2db2 │ │ + b.n b2dc2 │ │ lsrs r7, r1, #10 │ │ orr.w r0, r0, #8912896 @ 0x880000 │ │ - b.n b29ba │ │ + b.n b29ca │ │ ldr r1, [sp, #176] @ 0xb0 │ │ add.w r0, r0, r0 │ │ - b.n b2d22 │ │ + b.n b2d32 │ │ lsls r2, r4, #2 │ │ subs r0, r0, r0 │ │ str r4, [r2, #0] │ │ - b.n b2b94 │ │ + b.n b2ba4 │ │ asrs r0, r0, #32 │ │ - b.n b2dce │ │ + b.n b2dde │ │ movs r6, r0 │ │ - b.n b29d2 │ │ + b.n b29e2 │ │ ldr r1, [sp, #488] @ 0x1e8 │ │ add.w r0, r0, r0 │ │ - b.n b2d3a │ │ + b.n b2d4a │ │ lsls r6, r3, #3 │ │ subs r0, r0, r0 │ │ str r0, [r3, r0] │ │ - b.n b2bac │ │ + b.n b2bbc │ │ asrs r0, r0, #32 │ │ - b.n b2de6 │ │ + b.n b2df6 │ │ movs r5, r0 │ │ - b.n b29ea │ │ + b.n b29fa │ │ ldr r1, [sp, #464] @ 0x1d0 │ │ add.w r0, r0, r0 │ │ - b.n b2d52 │ │ + b.n b2d62 │ │ lsls r7, r5, #3 │ │ subs r0, r0, r0 │ │ ands r0, r4 │ │ - b.n b21f4 │ │ + b.n b2204 │ │ asrs r2, r0, #24 │ │ - b.n b2dfe │ │ + b.n b2e0e │ │ str r4, [r3, r0] │ │ - b.n b21dc │ │ + b.n b21ec │ │ movs r4, r0 │ │ - b.n b2a06 │ │ - ldrh r1, [r5, #24] │ │ - @ instruction: 0xfa000601 │ │ - b.n b2bd6 │ │ + b.n b2a16 │ │ + ldrh r1, [r3, #22] │ │ + mla r6, r0, r1, r0 │ │ + b.n b2be6 │ │ movs r4, #200 @ 0xc8 │ │ - b.n b2210 │ │ + b.n b2220 │ │ lsls r0, r4, #1 │ │ - b.n b21f0 │ │ + b.n b2200 │ │ movs r3, r0 │ │ - b.n b2e1a │ │ + b.n b2e2a │ │ lsls r4, r0, #1 │ │ - b.n b21f8 │ │ + b.n b2208 │ │ str r0, [r7, r0] │ │ - b.n b2bfc │ │ + b.n b2c0c │ │ movs r0, r5 │ │ - b.n b2220 │ │ + b.n b2230 │ │ movs r0, #2 │ │ - b.n b2808 │ │ + b.n b2818 │ │ lsls r0, r6, #1 │ │ - b.n b2208 │ │ + b.n b2218 │ │ asrs r0, r0, #32 │ │ - b.n b2e32 │ │ + b.n b2e42 │ │ movs r4, r5 │ │ - b.n b2230 │ │ + b.n b2240 │ │ adds r0, #5 │ │ - b.n b2a3a │ │ + b.n b2a4a │ │ movs r0, r7 │ │ - b.n b2218 │ │ + b.n b2228 │ │ movs r0, r6 │ │ - b.n b223c │ │ + b.n b224c │ │ movs r4, r7 │ │ - b.n b2220 │ │ + b.n b2230 │ │ movs r4, r6 │ │ - b.n b2c24 │ │ + b.n b2c34 │ │ strb r4, [r1, #0] │ │ - b.n b2244 │ │ + b.n b2254 │ │ eors r4, r3 │ │ - b.n b222c │ │ + b.n b223c │ │ strb r0, [r0, #1] │ │ - b.n b2230 │ │ + b.n b2240 │ │ ldr r0, [sp, #420] @ 0x1a4 │ │ add.w r0, r0, r0 │ │ - b.n b2dbe │ │ + b.n b2dce │ │ lsls r3, r7, #1 │ │ subs r0, r0, r0 │ │ movs r0, r1 │ │ - b.n b225c │ │ + b.n b226c │ │ movs r0, r0 │ │ - b.n b2dca │ │ + b.n b2dda │ │ movs r1, r4 │ │ lsrs r0, r0, #8 │ │ movs r0, #20 │ │ - b.n b226c │ │ + b.n b227c │ │ lsls r0, r2, #3 │ │ - b.n b2aba │ │ + b.n b2aca │ │ movs r1, r0 │ │ - b.n b2a5a │ │ + b.n b2a6a │ │ movs r0, r2 │ │ lsls r5, r3, #22 │ │ lsls r0, r2, #3 │ │ lsls r0, r0, #7 │ │ lsls r0, r6, #3 │ │ lsls r2, r0, #7 │ │ asrs r2, r1, #32 │ │ - b.n b2a8a │ │ + b.n b2a9a │ │ movs r4, r5 │ │ - b.n b2288 │ │ + b.n b2298 │ │ lsls r5, r4, #11 │ │ add.w r0, r0, r8 │ │ - b.n b2d84 │ │ + b.n b2d94 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ movs r0, r5 │ │ - b.n b2298 │ │ + b.n b22a8 │ │ asrs r4, r4, #32 │ │ - b.n b229c │ │ + b.n b22ac │ │ movs r0, #24 │ │ - b.n b22a0 │ │ + b.n b22b0 │ │ vqrdmlah.s16 q7, , │ │ movs r6, r1 │ │ and.w r0, r0, r0, rrx │ │ - b.n b22ac │ │ + b.n b22bc │ │ asrs r0, r0, #32 │ │ - b.n b2eb6 │ │ - b.n b2d4c │ │ + b.n b2ec6 │ │ + b.n b2d5c │ │ @ instruction: 0xebff0028 │ │ - b.n b22b8 │ │ + b.n b22c8 │ │ asrs r4, r4, #32 │ │ - b.n b22bc │ │ + b.n b22cc │ │ movs r0, #24 │ │ - b.n b22c0 │ │ + b.n b22d0 │ │ vqrdmlah.s16 q7, , │ │ ands r0, r0 │ │ - b.n b2ace │ │ + b.n b2ade │ │ movs r0, r1 │ │ - b.n b2dc0 │ │ + b.n b2dd0 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n b2e42 │ │ + b.n b2e52 │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ movs r0, r6 │ │ - b.n b22dc │ │ + b.n b22ec │ │ asrs r0, r0, #32 │ │ - b.n b2ee6 │ │ - b.n b2f1c │ │ + b.n b2ef6 │ │ + b.n b2f2c │ │ @ instruction: 0xebff4000 │ │ - b.n b2aee │ │ + b.n b2afe │ │ movs r0, r0 │ │ - b.n b2e5a │ │ + b.n b2e6a │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ movs r0, r7 │ │ - b.n b2cd4 │ │ + b.n b2ce4 │ │ asrs r1, r1, #32 │ │ - b.n b2afe │ │ + b.n b2b0e │ │ lsls r7, r5, #13 │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n b2b06 │ │ + b.n b2b16 │ │ lsls r4, r2, #1 │ │ - b.n b2304 │ │ + b.n b2314 │ │ movs r1, r0 │ │ - b.n b2bce │ │ + b.n b2bde │ │ lsls r0, r0, #4 │ │ - b.n b2adc │ │ + b.n b2aec │ │ movs r4, r5 │ │ - b.n b22f6 │ │ + b.n b2306 │ │ movs r0, r0 │ │ - b.n b2e7a │ │ + b.n b2e8a │ │ movs r0, r7 │ │ asrs r5, r1, #10 │ │ lsls r3, r3, #14 │ │ subs r0, r0, r4 │ │ str r0, [sp, #192] @ 0xc0 │ │ - b.n b2320 │ │ + b.n b2330 │ │ str r6, [r0, r0] │ │ - b.n b2b2a │ │ + b.n b2b3a │ │ movs r0, r0 │ │ - b.n b2e96 │ │ + b.n b2ea6 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ lsls r4, r0, #1 │ │ - b.n b2330 │ │ + b.n b2340 │ │ ands r0, r0 │ │ - b.n b2f3a │ │ + b.n b2f4a │ │ movs r0, #36 @ 0x24 │ │ - b.n b2332 │ │ + b.n b2342 │ │ movs r0, r0 │ │ - b.n b2aa6 │ │ + b.n b2ab6 │ │ lsls r1, r4, #2 │ │ subs r0, r0, r0 │ │ movs r0, r7 │ │ - b.n b2d24 │ │ + b.n b2d34 │ │ lsls r0, r2, #14 │ │ add.w r0, r0, r4, rrx │ │ - b.n b234c │ │ + b.n b235c │ │ asrs r4, r4, #32 │ │ - b.n b2cac │ │ + b.n b2cbc │ │ asrs r4, r4, #32 │ │ - b.n b2230 │ │ + b.n b2240 │ │ ldr r1, [sp, #112] @ 0x70 │ │ add.w r0, r0, r0, lsl #24 │ │ - b.n b2b62 │ │ + b.n b2b72 │ │ movs r0, r1 │ │ - b.n b2b66 │ │ + b.n b2b76 │ │ ldr r0, [sp, #788] @ 0x314 │ │ add.w r0, r0, r5 │ │ - b.n b2b6e │ │ + b.n b2b7e │ │ ldr r1, [sp, #108] @ 0x6c │ │ add.w r0, r0, ip, lsr #32 │ │ - b.n b2370 │ │ + b.n b2380 │ │ ldr r1, [sp, #100] @ 0x64 │ │ add.w r0, r0, r0 │ │ - b.n b2f7e │ │ + b.n b2f8e │ │ movs r0, r0 │ │ - b.n b2eee │ │ + b.n b2efe │ │ movs r0, r0 │ │ - b.n b2356 │ │ + b.n b2366 │ │ movs r4, r0 │ │ - b.n b235a │ │ + b.n b236a │ │ movs r0, r1 │ │ - b.n b235e │ │ + b.n b236e │ │ lsls r5, r0, #3 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n b2efe │ │ + b.n b2f0e │ │ movs r6, r5 │ │ subs r0, r0, r0 │ │ lsls r4, r5, #1 │ │ - b.n b2398 │ │ + b.n b23a8 │ │ movs r0, r0 │ │ - b.n b2f02 │ │ + b.n b2f12 │ │ lsls r6, r7, #2 │ │ subs r0, r0, r0 │ │ movs r0, r1 │ │ - b.n b23a0 │ │ + b.n b23b0 │ │ movs r0, r0 │ │ - b.n b2f0e │ │ + b.n b2f1e │ │ movs r6, r7 │ │ lsrs r0, r0, #8 │ │ movs r0, r1 │ │ - b.n b2ea4 │ │ + b.n b2eb4 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r1, r1 │ │ - b.n b2bbe │ │ + b.n b2bce │ │ asrs r0, r0, #32 │ │ - b.n b2fc2 │ │ - b.n b2dd2 │ │ + b.n b2fd2 │ │ + b.n b2de2 │ │ @ instruction: 0xebff62d0 │ │ - b.n b2c1e │ │ + b.n b2c2e │ │ movs r7, r0 │ │ - b.n b2b3a │ │ + b.n b2b4a │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ ands r0, r0 │ │ - b.n b2fd6 │ │ + b.n b2fe6 │ │ movs r6, r3 │ │ and.w r0, r0, ip, asr #32 │ │ - b.n b23d8 │ │ + b.n b23e8 │ │ eors r4, r3 │ │ - b.n b2442 │ │ + b.n b2452 │ │ movs r0, r1 │ │ - b.n b23dc │ │ + b.n b23ec │ │ strb r6, [r2, r0] │ │ - b.n b2bea │ │ + b.n b2bfa │ │ movs r0, r0 │ │ - b.n b2f4e │ │ + b.n b2f5e │ │ movs r3, r2 │ │ lsrs r0, r0, #8 │ │ - add r0, pc, #128 @ (adr r0, b2934 ) │ │ - b.n b23f0 │ │ + add r0, pc, #128 @ (adr r0, b2944 ) │ │ + b.n b2400 │ │ asrs r1, r0, #24 │ │ - b.n b2ffa │ │ + b.n b300a │ │ strh r1, [r0, #48] @ 0x30 │ │ - b.n b2ffe │ │ + b.n b300e │ │ movs r2, r1 │ │ - b.n b2c02 │ │ - ldrh r2, [r5, #20] │ │ - @ instruction: 0xfa009028 │ │ - b.n b2404 │ │ + b.n b2c12 │ │ + ldrh r2, [r3, #18] │ │ + @ instruction: 0xfb009028 │ │ + b.n b2414 │ │ strb r7, [r2, #16] │ │ - b.n b2c0e │ │ + b.n b2c1e │ │ movs r7, r0 │ │ - b.n b2b7c │ │ + b.n b2b8c │ │ @ instruction: 0xffee9aff │ │ str r7, [r0, #0] │ │ - b.n b2964 │ │ + b.n b2974 │ │ movs r1, r1 │ │ - b.n b2c1e │ │ + b.n b2c2e │ │ lsls r1, r0, #24 │ │ - b.n b2f8e │ │ + b.n b2f9e │ │ asrs r2, r1, #32 │ │ - b.n b2c26 │ │ + b.n b2c36 │ │ str r0, [r1, #0] │ │ movs r1, #160 @ 0xa0 │ │ movs r0, #6 │ │ - b.n b2c2e │ │ + b.n b2c3e │ │ mrc2 11, 5, lr, cr13, cr15, {7} @ │ │ strb r7, [r0, #0] │ │ - b.n b2a02 │ │ + b.n b2a12 │ │ movs r0, r0 │ │ - b.n b2f9a │ │ + b.n b2faa │ │ @ instruction: 0xfff30aff │ │ movs r3, r0 │ │ and.w r0, r0, r8, asr #32 │ │ - b.n b2440 │ │ + b.n b2450 │ │ movs r0, #5 │ │ - b.n b2c4a │ │ + b.n b2c5a │ │ adds r0, #0 │ │ - b.n b304e │ │ + b.n b305e │ │ lsls r7, r7, #13 │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n b2c56 │ │ + b.n b2c66 │ │ movs r4, r0 │ │ - b.n b2c5a │ │ - beq.n b2954 │ │ - b.n b2db4 │ │ + b.n b2c6a │ │ + beq.n b2964 │ │ + b.n b2dc4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, r3} │ │ - b.n b2c66 │ │ + b.n b2c76 │ │ lsls r7, r0, #9 │ │ @ instruction: 0xeb00feed │ │ @ instruction: 0xeaff03b0 │ │ - b.n b2cd2 │ │ + b.n b2ce2 │ │ asrs r2, r1, #32 │ │ - b.n b2c76 │ │ + b.n b2c86 │ │ lsls r0, r7, #22 │ │ - b.n b2cce │ │ + b.n b2cde │ │ movs r4, r5 │ │ - b.n b2478 │ │ + b.n b2488 │ │ lsls r1, r5, #9 │ │ add.w r0, r0, r8 │ │ - b.n b247c │ │ + b.n b248c │ │ strb r4, [r1, #0] │ │ - b.n b2480 │ │ + b.n b2490 │ │ movs r0, r0 │ │ - b.n b2fee │ │ + b.n b2ffe │ │ @ instruction: 0xffc70aff │ │ movs r0, r1 │ │ - b.n b2f84 │ │ + b.n b2f94 │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ movs r0, r5 │ │ - b.n b2498 │ │ + b.n b24a8 │ │ asrs r4, r0, #32 │ │ - b.n b2ca2 │ │ + b.n b2cb2 │ │ movs r0, #24 │ │ - b.n b24a0 │ │ + b.n b24b0 │ │ mrc2 11, 4, lr, cr15, cr15, {7} @ │ │ movs r2, r2 │ │ and.w r0, r0, ip, asr #32 │ │ - b.n b24ac │ │ + b.n b24bc │ │ asrs r2, r1, #32 │ │ - b.n b2cb6 │ │ + b.n b2cc6 │ │ lsls r3, r3, #9 │ │ @ instruction: 0xeb00ffbc │ │ @ instruction: 0xeaff0009 │ │ - b.n b2cc2 │ │ + b.n b2cd2 │ │ asrs r0, r0, #32 │ │ - b.n b30c6 │ │ - b.n b2e54 │ │ + b.n b30d6 │ │ + b.n b2e64 │ │ @ instruction: 0xebff0028 │ │ - b.n b24c8 │ │ + b.n b24d8 │ │ asrs r4, r0, #32 │ │ - b.n b2cd2 │ │ + b.n b2ce2 │ │ movs r0, #24 │ │ - b.n b24d0 │ │ + b.n b24e0 │ │ mrc2 11, 4, lr, cr3, cr15, {7} @ │ │ ands r0, r0 │ │ - b.n b2cde │ │ + b.n b2cee │ │ movs r0, r1 │ │ - b.n b2fd0 │ │ + b.n b2fe0 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n b3052 │ │ + b.n b3062 │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ movs r1, r1 │ │ - b.n b2cf2 │ │ + b.n b2d02 │ │ asrs r0, r0, #32 │ │ - b.n b30f6 │ │ - b.n b3024 │ │ + b.n b3106 │ │ + b.n b3034 │ │ @ instruction: 0xebff4000 │ │ - b.n b2cfe │ │ + b.n b2d0e │ │ movs r0, r0 │ │ - b.n b306a │ │ + b.n b307a │ │ @ instruction: 0xffd31aff │ │ @ instruction: 0xffa9eaff │ │ lsls r4, r4, #6 │ │ - b.n b250c │ │ + b.n b251c │ │ blxns r6 │ │ - b.n b2fe2 │ │ - ldr r7, [pc, #1020] @ (b2dd0 ) │ │ - b.n b3074 │ │ + b.n b2ff2 │ │ + ldr r7, [pc, #1020] @ (b2de0 ) │ │ + b.n b3084 │ │ movs r0, r0 │ │ - b.n b2af8 │ │ + b.n b2b08 │ │ lsls r2, r3, #1 │ │ - b.n b257e │ │ + b.n b258e │ │ movs r0, r0 │ │ - b.n b3082 │ │ + b.n b3092 │ │ @ instruction: 0xffcb0aff │ │ asrs r4, r1, #6 │ │ - b.n b2528 │ │ + b.n b2538 │ │ adds r1, #140 @ 0x8c │ │ - b.n b252c │ │ + b.n b253c │ │ lsls r4, r1, #6 │ │ - b.n b2530 │ │ + b.n b2540 │ │ asrs r1, r0, #32 │ │ - b.n b2b14 │ │ + b.n b2b24 │ │ strb r0, [r1, #6] │ │ - b.n b2538 │ │ + b.n b2548 │ │ adds r0, #3 │ │ - b.n b2b1c │ │ + b.n b2b2c │ │ movs r0, r0 │ │ - b.n b2b20 │ │ + b.n b2b30 │ │ movs r0, #12 │ │ - b.n b2520 │ │ + b.n b2530 │ │ strb r7, [r0, #0] │ │ - b.n b2b28 │ │ + b.n b2b38 │ │ lsls r1, r2, #2 │ │ stmia.w sp, {r0} │ │ - b.n b3152 │ │ + b.n b3162 │ │ movs r1, #134 @ 0x86 │ │ - b.n b3016 │ │ + b.n b3026 │ │ movs r4, r2 │ │ and.w r0, r0, r0, lsl #16 │ │ - b.n b2d5e │ │ + b.n b2d6e │ │ movs r7, r2 │ │ and.w r1, r0, r0, asr #1 │ │ - b.n b2564 │ │ + b.n b2574 │ │ blxns r6 │ │ - b.n b303a │ │ - ldr r7, [pc, #1020] @ (b2e28 ) │ │ - b.n b30cc │ │ + b.n b304a │ │ + ldr r7, [pc, #1020] @ (b2e38 ) │ │ + b.n b30dc │ │ movs r0, r0 │ │ - b.n b2b50 │ │ + b.n b2b60 │ │ lsls r2, r3, #1 │ │ - b.n b25d6 │ │ + b.n b25e6 │ │ movs r0, r0 │ │ - b.n b30da │ │ + b.n b30ea │ │ @ instruction: 0xffb50aff │ │ asrs r0, r1, #5 │ │ - b.n b2580 │ │ + b.n b2590 │ │ adds r1, #72 @ 0x48 │ │ - b.n b2584 │ │ + b.n b2594 │ │ lsls r0, r1, #5 │ │ - b.n b2588 │ │ + b.n b2598 │ │ asrs r1, r0, #32 │ │ - b.n b2b6c │ │ + b.n b2b7c │ │ movs r1, #68 @ 0x44 │ │ - b.n b2590 │ │ + b.n b25a0 │ │ adds r0, #3 │ │ - b.n b2b74 │ │ + b.n b2b84 │ │ movs r0, r0 │ │ - b.n b2b78 │ │ + b.n b2b88 │ │ movs r0, #2 │ │ - b.n b2b7c │ │ + b.n b2b8c │ │ movs r1, r2 │ │ stmia.w sp, {r0} │ │ - b.n b31a6 │ │ + b.n b31b6 │ │ movs r0, #8 │ │ - b.n b2584 │ │ + b.n b2594 │ │ movs r1, #138 @ 0x8a │ │ - b.n b306e │ │ - add r1, pc, #948 @ (adr r1, b2e24 ) │ │ + b.n b307e │ │ + add r1, pc, #944 @ (adr r1, b2e30 ) │ │ @ instruction: 0xebffffa7 │ │ @ instruction: 0xeaff4000 │ │ - b.n b2dba │ │ + b.n b2dca │ │ movs r6, r0 │ │ - b.n b2dbe │ │ + b.n b2dce │ │ ldr r0, [sp, #540] @ 0x21c │ │ add.w r0, r0, r8 │ │ - b.n b2dc6 │ │ + b.n b2dd6 │ │ ldr r0, [sp, #180] @ 0xb4 │ │ @ instruction: 0xeb00ffa1 │ │ @ instruction: 0xeaff0002 │ │ - b.n b2d32 │ │ + b.n b2d42 │ │ movs r6, r2 │ │ ldr r2, [sp, #0] │ │ asrs r4, r0, #4 │ │ - b.n b25d8 │ │ + b.n b25e8 │ │ blxns r6 │ │ - b.n b30ae │ │ - ldr r7, [pc, #1020] @ (b2e9c ) │ │ - b.n b3140 │ │ + b.n b30be │ │ + ldr r7, [pc, #1020] @ (b2eac ) │ │ + b.n b3150 │ │ asrs r1, r0, #32 │ │ - b.n b2bc4 │ │ + b.n b2bd4 │ │ asrs r2, r3, #1 │ │ - b.n b264c │ │ + b.n b265c │ │ movs r0, r0 │ │ - b.n b3150 │ │ + b.n b3160 │ │ movs r7, r1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r5, #3 │ │ - b.n b25f4 │ │ + b.n b2604 │ │ str r6, [r7, #0] │ │ - b.n b31fa │ │ + b.n b320a │ │ adds r0, #232 @ 0xe8 │ │ - b.n b25fc │ │ + b.n b260c │ │ strb r0, [r5, #3] │ │ - b.n b2600 │ │ + b.n b2610 │ │ asrs r1, r0, #32 │ │ - b.n b2be4 │ │ + b.n b2bf4 │ │ adds r0, #3 │ │ - b.n b2be8 │ │ + b.n b2bf8 │ │ lsls r1, r0, #1 │ │ @ instruction: 0xe98d7007 │ │ - b.n b2bf0 │ │ + b.n b2c00 │ │ movs r0, #12 │ │ - b.n b25f0 │ │ + b.n b2600 │ │ movs r1, r0 │ │ - b.n b321a │ │ + b.n b322a │ │ cmp r7, #111 @ 0x6f │ │ - b.n b321e │ │ + b.n b322e │ │ strb r0, [r0, #0] │ │ - b.n b25fc │ │ + b.n b260c │ │ strb r4, [r1, #0] │ │ - b.n b261c │ │ - add r1, pc, #828 @ (adr r1, b2e24 ) │ │ + b.n b262c │ │ + add r1, pc, #824 @ (adr r1, b2e30 ) │ │ @ instruction: 0xebff2024 │ │ - b.n b2622 │ │ + b.n b2632 │ │ lsls r4, r0, #1 │ │ - b.n b262c │ │ + b.n b263c │ │ movs r2, r0 │ │ - b.n b2d96 │ │ + b.n b2da6 │ │ movs r7, r2 │ │ cmp r2, #0 │ │ asrs r0, r6, #2 │ │ - b.n b263c │ │ + b.n b264c │ │ asrs r1, r0, #32 │ │ - b.n b2c20 │ │ + b.n b2c30 │ │ asrs r2, r3, #1 │ │ - b.n b26a8 │ │ + b.n b26b8 │ │ movs r2, r0 │ │ - b.n b31ac │ │ + b.n b31bc │ │ movs r5, r1 │ │ subs r2, #0 │ │ asrs r0, r4, #2 │ │ - b.n b2650 │ │ + b.n b2660 │ │ str r4, [r7, #0] │ │ - b.n b3256 │ │ + b.n b3266 │ │ adds r0, #156 @ 0x9c │ │ - b.n b2658 │ │ + b.n b2668 │ │ strb r4, [r3, #2] │ │ - b.n b265c │ │ + b.n b266c │ │ asrs r1, r0, #32 │ │ - b.n b2c40 │ │ + b.n b2c50 │ │ adds r0, #3 │ │ - b.n b2c44 │ │ + b.n b2c54 │ │ lsls r1, r0, #1 │ │ @ instruction: 0xe98d0002 │ │ - b.n b326e │ │ + b.n b327e │ │ movs r0, #12 │ │ - b.n b264c │ │ + b.n b265c │ │ movs r1, #193 @ 0xc1 │ │ - b.n b3136 │ │ + b.n b3146 │ │ strb r7, [r0, #0] │ │ - b.n b2c58 │ │ + b.n b2c68 │ │ strb r0, [r0, #0] │ │ - b.n b2658 │ │ - add r1, pc, #740 @ (adr r1, b2e24 ) │ │ + b.n b2668 │ │ + add r1, pc, #736 @ (adr r1, b2e30 ) │ │ @ instruction: 0xebff0044 │ │ - b.n b2680 │ │ + b.n b2690 │ │ asrs r0, r1, #32 │ │ - b.n b2680 │ │ + b.n b2690 │ │ strb r4, [r1, #0] │ │ - b.n b2684 │ │ + b.n b2694 │ │ movs r0, r0 │ │ - b.n b31f4 │ │ + b.n b3204 │ │ blxns r6 │ │ asrs r0, r1, #12 │ │ - ldr r7, [pc, #1020] @ (b2f54 ) │ │ + ldr r7, [pc, #1020] @ (b2f64 ) │ │ asrs r7, r1, #13 │ │ movs r4, r4 │ │ - b.n b2672 │ │ + b.n b2682 │ │ vpmin.u32 q7, q12, │ │ eors r4, r5 │ │ - b.n b26a0 │ │ + b.n b26b0 │ │ vpmin.u32 q15, q13, │ │ ands r6, r0 │ │ - b.n b2eae │ │ + b.n b2ebe │ │ vpmin.u32 q15, q12, │ │ - stmia r3!, {r2, r6, r7} │ │ - movs r2, r0 │ │ - bkpt 0x0074 │ │ + stmia r3!, {r2, r4, r6, r7} │ │ movs r2, r0 │ │ - ldr r1, [r2, #76] @ 0x4c │ │ - vneg.f16 q13, q0 │ │ - vqshl.u32 q13, , #21 │ │ - vrshr.u64 q12, , #11 │ │ - vcvt.f32.u32 d27, d12, #11 │ │ + bkpt 0x0084 │ │ movs r2, r0 │ │ - ldr r1, [r7, #68] @ 0x44 │ │ - vsra.u32 q14, , #11 │ │ - vabs.f16 d26, d1 │ │ - @ instruction: 0xfff56fb9 │ │ + ldr r4, [r4, #88] @ 0x58 │ │ + @ instruction: 0xfff5a8f0 │ │ + vtbl.8 d26, {d21}, d9 │ │ + vclt.s16 d24, d22, #0 │ │ + @ instruction: 0xfff5be2c │ │ + movs r2, r0 │ │ + ldr r4, [r1, #84] @ 0x54 │ │ + vrshr.u64 q14, , #11 │ │ + vqshrun.s64 d26, , #11 │ │ + vcge.s16 d23, d12, #0 │ │ vcvt.u16.f16 q8, q2, #11 │ │ movs r0, r0 │ │ - pop {r3, r5, r7, pc} │ │ + pop {r3, r4, r5, r7, pc} │ │ movs r2, r0 │ │ - ldr r1, [r0, #64] @ 0x40 │ │ - vceq.f16 q11, q14, #0 │ │ - vabs.s16 d26, d16 │ │ - vqrdmulh.s , , d12[0] │ │ + ldr r4, [r2, #76] @ 0x4c │ │ + vcge.f16 d22, d6, #0 │ │ + vrsra.u64 d26, d3, #11 │ │ + vcvt.u16.f16 , q6, #11 │ │ movs r2, r0 │ │ - ldr r5, [r4, #56] @ 0x38 │ │ - vsli.32 d22, d0, #21 │ │ - @ instruction: 0xfff57d9a │ │ + ldr r0, [r7, #68] @ 0x44 │ │ + vcgt.f16 d22, d26, #0 │ │ + @ instruction: 0xfff57d02 │ │ @ instruction: 0xfff54ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n b30e4 │ │ - beq.n b2ca4 │ │ - b.n b3068 │ │ + b.n b30f4 │ │ + beq.n b2cb4 │ │ + b.n b3078 │ │ movs r4, r4 │ │ - b.n b26ec │ │ + b.n b26fc │ │ str r1, [r0, r0] │ │ - b.n b2f16 │ │ + b.n b2f26 │ │ movs r4, r1 │ │ - b.n b2710 │ │ + b.n b2720 │ │ asrs r0, r0, #32 │ │ - b.n b331e │ │ + b.n b332e │ │ ands r2, r0 │ │ - b.n b2f22 │ │ + b.n b2f32 │ │ adds r0, #16 │ │ - b.n b2700 │ │ + b.n b2710 │ │ movs r0, r4 │ │ - b.n b320a │ │ + b.n b321a │ │ asrs r4, r0, #32 │ │ - b.n b2708 │ │ + b.n b2718 │ │ movs r4, r0 │ │ asrs r5, r2, #22 │ │ lsrs r2, r0, #32 │ │ asrs r0, r2, #8 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r4 │ │ - b.n b2738 │ │ + b.n b2748 │ │ asrs r1, r0, #32 │ │ - b.n b3342 │ │ - add r2, pc, #608 @ (adr r2, b2e64 ) │ │ + b.n b3352 │ │ + add r2, pc, #604 @ (adr r2, b2e70 ) │ │ @ instruction: 0xebff0000 │ │ - b.n b32aa │ │ + b.n b32ba │ │ lsls r5, r6, #3 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n b3352 │ │ + b.n b3362 │ │ movs r4, r0 │ │ - b.n b2730 │ │ + b.n b2740 │ │ str r4, [r4, #0] │ │ - b.n b2754 │ │ + b.n b2764 │ │ strb r0, [r0, #1] │ │ - b.n b30b4 │ │ + b.n b30c4 │ │ ands r0, r4 │ │ - b.n b273c │ │ + b.n b274c │ │ movs r7, r0 │ │ - b.n b2f66 │ │ + b.n b2f76 │ │ asrs r6, r0, #32 │ │ - b.n b2f6a │ │ + b.n b2f7a │ │ eors r4, r3 │ │ - b.n b27da │ │ - add r0, pc, #908 @ (adr r0, b2fbc ) │ │ + b.n b27ea │ │ + add r0, pc, #904 @ (adr r0, b2fc8 ) │ │ @ instruction: 0xebff0003 │ │ - b.n b3376 │ │ + b.n b3386 │ │ asrs r0, r2, #32 │ │ - b.n b2766 │ │ + b.n b2776 │ │ movs r4, #16 │ │ - b.n b2f7e │ │ + b.n b2f8e │ │ ands r0, r2 │ │ - b.n b277c │ │ + b.n b278c │ │ movs r0, #8 │ │ - b.n b2760 │ │ + b.n b2770 │ │ movs r4, r0 │ │ - b.n b2f8a │ │ - ldrh r5, [r3, #14] │ │ + b.n b2f9a │ │ + ldrh r2, [r4, #12] │ │ @ instruction: 0xfb00105c │ │ - b.n b27fe │ │ + b.n b280e │ │ str r0, [sp, #80] @ 0x50 │ │ - b.n b315e │ │ + b.n b316e │ │ adds r0, #63 @ 0x3f │ │ - b.n b2710 │ │ + b.n b2720 │ │ movs r0, #6 │ │ - b.n b2808 │ │ + b.n b2818 │ │ lsls r3, r2, #4 │ │ - b.n b2d74 │ │ + b.n b2d84 │ │ asrs r4, r7, #16 │ │ - b.n b27a4 │ │ + b.n b27b4 │ │ movs r2, r0 │ │ - b.n b328e │ │ + b.n b329e │ │ str r4, [r3, r0] │ │ - b.n b2788 │ │ + b.n b2798 │ │ asrs r1, r0, #32 │ │ - b.n b2d90 │ │ + b.n b2da0 │ │ lsls r2, r4, #1 │ │ lsrs r0, r0, #8 │ │ strh r0, [r6, #0] │ │ - b.n b3184 │ │ + b.n b3194 │ │ movs r0, #8 │ │ - b.n b318c │ │ + b.n b319c │ │ asrs r0, r0, #1 │ │ - b.n b3184 │ │ + b.n b3194 │ │ movs r0, #12 │ │ - b.n b27a0 │ │ + b.n b27b0 │ │ asrs r0, r3, #32 │ │ - b.n b27a4 │ │ + b.n b27b4 │ │ asrs r4, r1, #32 │ │ - b.n b27c8 │ │ + b.n b27d8 │ │ movs r4, r2 │ │ - b.n b27ac │ │ + b.n b27bc │ │ lsls r3, r0, #6 │ │ - b.n b2bf8 │ │ + b.n b2c08 │ │ movs r0, #208 @ 0xd0 │ │ - b.n b302a │ │ + b.n b303a │ │ asrs r4, r0, #32 │ │ - b.n b27c0 │ │ + b.n b27d0 │ │ movs r2, r0 │ │ - b.n b2ce2 │ │ + b.n b2cf2 │ │ asrs r3, r0, #32 │ │ - b.n b2ce8 │ │ + b.n b2cf8 │ │ movs r1, r0 │ │ - b.n b2fca │ │ + b.n b2fda │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ - add r0, pc, #0 @ (adr r0, b2cb0 ) │ │ - b.n b33f2 │ │ + add r0, pc, #0 @ (adr r0, b2cc0 ) │ │ + b.n b3402 │ │ movs r3, r5 │ │ and.w r0, r0, ip │ │ - b.n b27f0 │ │ + b.n b2800 │ │ movs r0, r4 │ │ - b.n b32de │ │ + b.n b32ee │ │ movs r5, r4 │ │ subs r0, r0, r0 │ │ stmia r0!, {r6} │ │ - b.n b277c │ │ + b.n b278c │ │ add r1, sp, #216 @ 0xd8 │ │ - b.n b32da │ │ + b.n b32ea │ │ movs r0, #12 │ │ - b.n b2808 │ │ + b.n b2818 │ │ asrs r0, r0, #32 │ │ - b.n b3412 │ │ + b.n b3422 │ │ add r7, sp, #1020 @ 0x3fc │ │ - b.n b3374 │ │ + b.n b3384 │ │ movs r4, r4 │ │ - b.n b2814 │ │ + b.n b2824 │ │ lsrs r0, r2 │ │ - b.n b306e │ │ + b.n b307e │ │ str r4, [r3, #4] │ │ - b.n b2882 │ │ + b.n b2892 │ │ movs r1, r1 │ │ ldmia.w r2, {r0, r2, ip, sp, lr} │ │ - b.n b2d30 │ │ - b.n b290e │ │ - b.n b2e00 │ │ + b.n b2d40 │ │ + b.n b291e │ │ + b.n b2e10 │ │ str r4, [r0, #0] │ │ - b.n b2d32 │ │ + b.n b2d42 │ │ str r7, [r0, #0] │ │ - b.n b3022 │ │ + b.n b3032 │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ str r1, [r0, #0] │ │ - b.n b343e │ │ + b.n b344e │ │ str r6, [r2, #16] │ │ - b.n b2d1a │ │ + b.n b2d2a │ │ str r2, [r1, #0] │ │ - b.n b3032 │ │ + b.n b3042 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ - add r0, pc, #0 @ (adr r0, b2d0c ) │ │ - b.n b344e │ │ - b.n b2d38 │ │ - b.n b282c │ │ + add r0, pc, #0 @ (adr r0, b2d1c ) │ │ + b.n b345e │ │ + b.n b2d48 │ │ + b.n b283c │ │ movs r3, r1 │ │ and.w r0, r0, r0 │ │ - b.n b2dc2 │ │ + b.n b2dd2 │ │ movs r3, r0 │ │ - b.n b2ec8 │ │ + b.n b2ed8 │ │ movs r0, r1 │ │ cmp r2, #0 │ │ movs r0, r3 │ │ - b.n b2860 │ │ + b.n b2870 │ │ lsrs r7, r5, #11 │ │ orn r0, r0, #8388608 @ 0x800000 │ │ - b.n b346e │ │ + b.n b347e │ │ lsls r0, r6, #2 │ │ - b.n b284e │ │ + b.n b285e │ │ lsls r4, r6, #2 │ │ - b.n b2852 │ │ + b.n b2862 │ │ movs r0, r1 │ │ - b.n b2856 │ │ + b.n b2866 │ │ movs r4, r1 │ │ - b.n b285a │ │ + b.n b286a │ │ lsls r0, r0, #3 │ │ - b.n b325e │ │ + b.n b326e │ │ lsrs r7, r1, #10 │ │ orr.w r0, r0, #2113536 @ 0x204000 │ │ - b.n b324c │ │ + b.n b325c │ │ movs r0, #8 │ │ - b.n b3252 │ │ + b.n b3262 │ │ movs r3, r0 │ │ - b.n b33f4 │ │ + b.n b3404 │ │ @ instruction: 0xffdf1aff │ │ movs r2, r0 │ │ and.w r0, r0, ip, lsr #32 │ │ - b.n b2898 │ │ + b.n b28a8 │ │ stmia.w pc!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, fp, sp, lr, pc} │ │ - add r0, pc, #0 @ (adr r0, b2d64 ) │ │ - b.n b30a6 │ │ + add r0, pc, #0 @ (adr r0, b2d74 ) │ │ + b.n b30b6 │ │ movs r4, r0 │ │ - b.n b28a4 │ │ + b.n b28b4 │ │ movs r0, r0 │ │ - b.n b340e │ │ + b.n b341e │ │ movs r6, r3 │ │ subs r0, r0, r0 │ │ ands r0, r5 │ │ - b.n b3290 │ │ + b.n b32a0 │ │ asrs r4, r4, #32 │ │ - b.n b28b4 │ │ + b.n b28c4 │ │ movs r4, r0 │ │ - b.n b30be │ │ - add r0, pc, #572 @ (adr r0, b2fbc ) │ │ + b.n b30ce │ │ + add r0, pc, #568 @ (adr r0, b2fc8 ) │ │ @ instruction: 0xebff0040 │ │ - b.n b321c │ │ + b.n b322c │ │ asrs r4, r0, #32 │ │ - b.n b30ca │ │ + b.n b30da │ │ movs r0, #32 │ │ - b.n b34ce │ │ + b.n b34de │ │ str r6, [sp, #716] @ 0x2cc │ │ add.w r0, r0, r0 │ │ - b.n b3436 │ │ + b.n b3446 │ │ movs r6, r2 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n b3452 │ │ + b.n b3462 │ │ movs r4, r2 │ │ subs r0, r0, r0 │ │ movs r0, r5 │ │ - b.n b32c0 │ │ + b.n b32d0 │ │ ands r4, r4 │ │ - b.n b28e4 │ │ + b.n b28f4 │ │ lsrs r5, r1, #11 │ │ orn sl, r0, #423936 @ 0x67800 │ │ orn r0, r0, #12582912 @ 0xc00000 │ │ - b.n b324c │ │ + b.n b325c │ │ lsrs r5, r1, #11 │ │ orr.w sl, r0, #423936 @ 0x67800 │ │ orr.w r0, r0, #2359296 @ 0x240000 │ │ - b.n b28ea │ │ + b.n b28fa │ │ movs r0, r2 │ │ - b.n b2900 │ │ + b.n b2910 │ │ movs r0, #8 │ │ - b.n b2904 │ │ - ldrh r5, [r7, #10] │ │ + b.n b2914 │ │ + ldrh r2, [r0, #10] │ │ mls r0, r0, ip, r2 │ │ - b.n b290c │ │ + b.n b291c │ │ asrs r4, r3, #1 │ │ - b.n b297e │ │ + b.n b298e │ │ adds r0, #63 @ 0x3f │ │ - b.n b2890 │ │ + b.n b28a0 │ │ movs r0, #6 │ │ - b.n b2982 │ │ + b.n b2992 │ │ lsls r3, r2, #4 │ │ - b.n b2ef4 │ │ + b.n b2f04 │ │ movs r2, r0 │ │ - b.n b340a │ │ + b.n b341a │ │ @ instruction: 0xffa71aff │ │ movs r4, r0 │ │ and.w r0, r0, r4, asr #32 │ │ - b.n b292c │ │ - add r2, pc, #444 @ (adr r2, b2fb0 ) │ │ + b.n b293c │ │ + add r2, pc, #440 @ (adr r2, b2fbc ) │ │ @ instruction: 0xebff0014 │ │ - b.n b2934 │ │ + b.n b2944 │ │ movs r0, r0 │ │ - b.n b34b2 │ │ + b.n b34c2 │ │ lsls r5, r4, #2 │ │ subs r0, r0, r0 │ │ ands r4, r1 │ │ - b.n b293c │ │ + b.n b294c │ │ movs r2, r0 │ │ - b.n b3432 │ │ + b.n b3442 │ │ lsls r1, r6, #1 │ │ subs r0, r0, r0 │ │ asrs r0, r0, #32 │ │ - b.n b35d2 │ │ + b.n b35e2 │ │ strh r4, [r3, #0] │ │ - b.n b2950 │ │ + b.n b2960 │ │ asrs r0, r5, #2 │ │ - b.n b291a │ │ + b.n b292a │ │ movs r0, r1 │ │ - b.n b3446 │ │ + b.n b3456 │ │ asrs r4, r5, #2 │ │ - b.n b2922 │ │ + b.n b2932 │ │ movs r4, r4 │ │ - b.n b2960 │ │ + b.n b2970 │ │ str r0, [sp, #160] @ 0xa0 │ │ - b.n b295a │ │ + b.n b296a │ │ strb r0, [r1, #0] │ │ - b.n b2964 │ │ + b.n b2974 │ │ lsls r4, r3, #1 │ │ - b.n b29d2 │ │ + b.n b29e2 │ │ movs r4, r2 │ │ - b.n b2950 │ │ + b.n b2960 │ │ movs r4, r4 │ │ - b.n b296a │ │ + b.n b297a │ │ movs r4, r0 │ │ - b.n b2958 │ │ + b.n b2968 │ │ strh r4, [r4, r1] │ │ - b.n b2980 │ │ + b.n b2990 │ │ str r0, [r1, #0] │ │ - b.n b2980 │ │ + b.n b2990 │ │ str r5, [r0, r0] │ │ - b.n b2f68 │ │ + b.n b2f78 │ │ lsls r0, r2, #1 │ │ - b.n b2978 │ │ + b.n b2988 │ │ movs r4, r1 │ │ - b.n b296c │ │ + b.n b297c │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r1 │ │ - b.n b319a │ │ + b.n b31aa │ │ asrs r0, r0, #32 │ │ - b.n b359e │ │ - b.n b30c0 │ │ + b.n b35ae │ │ + b.n b30d0 │ │ @ instruction: 0xebffa000 │ │ - b.n b35a6 │ │ + b.n b35b6 │ │ movs r0, r0 │ │ - b.n b3518 │ │ + b.n b3528 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r4 │ │ - b.n b29ac │ │ + b.n b29bc │ │ movs r0, #6 │ │ - b.n b31b6 │ │ + b.n b31c6 │ │ asrs r0, r2, #32 │ │ - b.n b29b4 │ │ + b.n b29c4 │ │ ldc2l 11, cr14, [sl, #-1020] @ 0xfffffc04 @ │ │ - add r0, pc, #0 @ (adr r0, b2e80 ) │ │ - b.n b31c2 │ │ + add r0, pc, #0 @ (adr r0, b2e90 ) │ │ + b.n b31d2 │ │ movs r4, r2 │ │ - b.n b29c0 │ │ + b.n b29d0 │ │ str r0, [sp, #100] @ 0x64 │ │ - b.n b31ca │ │ + b.n b31da │ │ lsls r0, r2, #1 │ │ - b.n b29b8 │ │ + b.n b29c8 │ │ asrs r0, r0, #32 │ │ - b.n b2f9e │ │ + b.n b2fae │ │ movs r0, r0 │ │ - b.n b3356 │ │ + b.n b3366 │ │ asrs r1, r0, #32 │ │ - b.n b331c │ │ + b.n b332c │ │ movs r0, r0 │ │ - b.n b2ea0 │ │ + b.n b2eb0 │ │ asrs r0, r2, #32 │ │ - b.n b29dc │ │ + b.n b29ec │ │ movs r0, r0 │ │ - b.n b2fa8 │ │ + b.n b2fb8 │ │ movs r0, r3 │ │ - b.n b29c4 │ │ + b.n b29d4 │ │ movs r0, r0 │ │ - b.n b3562 │ │ + b.n b3572 │ │ lsls r3, r2, #1 │ │ subs r0, r0, r0 │ │ movs r1, r1 │ │ - b.n b3162 │ │ + b.n b3172 │ │ lsls r1, r2, #1 │ │ cmp r2, #0 │ │ movs r0, r1 │ │ - b.n b34e6 │ │ + b.n b34f6 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r1 │ │ - b.n b3206 │ │ + b.n b3216 │ │ asrs r0, r0, #32 │ │ - b.n b360a │ │ - b.n b32ae │ │ + b.n b361a │ │ + b.n b32be │ │ @ instruction: 0xebff0000 │ │ - b.n b3572 │ │ + b.n b3582 │ │ lsls r7, r5, #1 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n b3588 │ │ + b.n b3598 │ │ movs r3, r4 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n b2a8c │ │ + b.n b2a9c │ │ movs r0, r0 │ │ - b.n b3586 │ │ + b.n b3596 │ │ movs r0, r4 │ │ subs r0, r0, r0 │ │ movs r4, r4 │ │ - b.n b2a28 │ │ + b.n b2a38 │ │ adds r0, #6 │ │ - b.n b2f84 │ │ + b.n b2f94 │ │ movs r0, #40 @ 0x28 │ │ - b.n b3410 │ │ + b.n b3420 │ │ str r0, [r5, #0] │ │ - b.n b2a14 │ │ + b.n b2a24 │ │ asrs r4, r2, #32 │ │ - b.n b2a1e │ │ + b.n b2a2e │ │ movs r0, r4 │ │ - b.n b2a3c │ │ + b.n b2a4c │ │ str r7, [sp, #424] @ 0x1a8 │ │ add.w r0, r0, r1 │ │ - b.n b35aa │ │ + b.n b35ba │ │ movs r0, r1 │ │ rev r0, r0 │ │ str r0, [r5, #0] │ │ - b.n b2a4c │ │ - add r0, pc, #0 @ (adr r0, b2f14 ) │ │ - b.n b3656 │ │ + b.n b2a5c │ │ + add r0, pc, #0 @ (adr r0, b2f24 ) │ │ + b.n b3666 │ │ movs r0, r1 │ │ - b.n b3542 │ │ + b.n b3552 │ │ @ instruction: 0xffe20aff │ │ movs r0, r1 │ │ - b.n b3262 │ │ + b.n b3272 │ │ asrs r0, r0, #32 │ │ - b.n b3666 │ │ - b.n b3124 │ │ + b.n b3676 │ │ + b.n b3134 │ │ @ instruction: 0xebffa000 │ │ - b.n b326e │ │ + b.n b327e │ │ @ instruction: 0xffddeaff │ │ movs r0, r0 │ │ - b.n b35d6 │ │ + b.n b35e6 │ │ movs r0, r6 │ │ lsrs r0, r0, #8 │ │ str r6, [sp, #272] @ 0x110 │ │ @ instruction: 0xeb00a000 │ │ - b.n b2a62 │ │ + b.n b2a72 │ │ movs r5, r4 │ │ - b.n b35fa │ │ + b.n b360a │ │ movs r3, r0 │ │ ldmia r2!, {} │ │ movs r1, r0 │ │ - b.n b3642 │ │ + b.n b3652 │ │ movs r3, r1 │ │ asrs r2, r3, #13 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ movs r1, r5 │ │ and.w r0, r0, pc, lsr #1 │ │ - b.n b3612 │ │ + b.n b3622 │ │ movs r6, r4 │ │ asrs r2, r3, #13 │ │ movs r6, r4 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n b36aa │ │ + b.n b36ba │ │ movs r0, r0 │ │ - b.n b2af8 │ │ + b.n b2b08 │ │ movs r4, r4 │ │ - b.n b2aac │ │ + b.n b2abc │ │ strh r6, [r0, #0] │ │ - b.n b3008 │ │ + b.n b3018 │ │ str r0, [r3, r0] │ │ - b.n b2ab4 │ │ + b.n b2ac4 │ │ lsls r1, r0, #24 │ │ - b.n b362e │ │ + b.n b363e │ │ strh r1, [r0, #48] @ 0x30 │ │ movs r3, #160 @ 0xa0 │ │ movs r0, r2 │ │ - b.n b2aa6 │ │ + b.n b2ab6 │ │ movs r0, #8 │ │ - b.n b32ca │ │ + b.n b32da │ │ asrs r0, r0, #32 │ │ - b.n b309a │ │ + b.n b30aa │ │ movs r5, r0 │ │ - b.n b32d2 │ │ - ldrh r3, [r1, #8] │ │ + b.n b32e2 │ │ + ldrh r0, [r2, #6] │ │ mla r0, r0, r8, r0 │ │ - b.n b35c2 │ │ + b.n b35d2 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r3 │ │ - b.n b2adc │ │ + b.n b2aec │ │ asrs r0, r0, #32 │ │ - b.n b36e6 │ │ - b.n b3164 │ │ + b.n b36f6 │ │ + b.n b3174 │ │ @ instruction: 0xebff0020 │ │ - b.n b2ae8 │ │ + b.n b2af8 │ │ asrs r5, r0, #32 │ │ - b.n b32f2 │ │ + b.n b3302 │ │ movs r0, #8 │ │ - b.n b32f6 │ │ + b.n b3306 │ │ stc2 11, cr14, [fp, #-1020] @ 0xfffffc04 @ │ │ str r6, [r0, #0] │ │ - b.n b30ce │ │ + b.n b30de │ │ strh r4, [r3, #0] │ │ - b.n b2afc │ │ + b.n b2b0c │ │ str r4, [r4, r3] │ │ - b.n b2b04 │ │ - add r0, pc, #0 @ (adr r0, b2fc8 ) │ │ - b.n b330a │ │ + b.n b2b14 │ │ + add r0, pc, #0 @ (adr r0, b2fd8 ) │ │ + b.n b331a │ │ ands r4, r1 │ │ - b.n b2b04 │ │ + b.n b2b14 │ │ str r5, [r0, r0] │ │ - b.n b30f0 │ │ + b.n b3100 │ │ @ instruction: 0xffb4eaff │ │ str r0, [r0, r0] │ │ - b.n b331a │ │ + b.n b332a │ │ lsls r2, r3, #2 │ │ add.w r0, r0, r5 │ │ - b.n b3322 │ │ + b.n b3332 │ │ @ instruction: 0xff89eaff │ │ - add r0, pc, #0 @ (adr r0, b2fe8 ) │ │ - b.n b332a │ │ + add r0, pc, #0 @ (adr r0, b2ff8 ) │ │ + b.n b333a │ │ lsls r6, r0, #31 │ │ - b.n b35fe │ │ + b.n b360e │ │ lsrs r7, r7, #31 │ │ - b.n b3690 │ │ + b.n b36a0 │ │ movs r0, r0 │ │ - b.n b32aa │ │ + b.n b32ba │ │ vpmin.u8 q0, q11, │ │ movs r6, r4 │ │ @ instruction: 0xea00a03d │ │ - b.n b3742 │ │ + b.n b3752 │ │ ands r0, r3 │ │ - b.n b2b40 │ │ + b.n b2b50 │ │ movs r0, r0 │ │ - b.n b36be │ │ + b.n b36ce │ │ movs r2, r4 │ │ subs r0, r0, r0 │ │ movs r4, r2 │ │ - b.n b2b4c │ │ - add r0, pc, #0 @ (adr r0, b3014 ) │ │ - b.n b3756 │ │ + b.n b2b5c │ │ + add r0, pc, #0 @ (adr r0, b3024 ) │ │ + b.n b3766 │ │ movs r0, #4 │ │ - b.n b2b54 │ │ + b.n b2b64 │ │ asrs r4, r1, #32 │ │ - b.n b2b58 │ │ + b.n b2b68 │ │ movs r2, r2 │ │ - b.n b3124 │ │ + b.n b3134 │ │ asrs r0, r0, #32 │ │ - b.n b34e8 │ │ + b.n b34f8 │ │ movs r1, r0 │ │ - b.n b34aa │ │ + b.n b34ba │ │ str r1, [r0, #0] │ │ - b.n b302e │ │ + b.n b303e │ │ movs r1, r1 │ │ - b.n b32de │ │ + b.n b32ee │ │ movs r0, r3 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n b36e8 │ │ + b.n b36f8 │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n b3382 │ │ + b.n b3392 │ │ asrs r1, r0, #24 │ │ - b.n b3786 │ │ + b.n b3796 │ │ strh r1, [r0, #48] @ 0x30 │ │ - b.n b378a │ │ - ldrh r0, [r1, #6] │ │ - @ instruction: 0xfa000006 │ │ - b.n b3304 │ │ + b.n b379a │ │ + ldrh r0, [r7, #2] │ │ + mla r0, r0, r6, r0 │ │ + b.n b3314 │ │ movs r0, r2 │ │ cmp r2, #0 │ │ strb r1, [r1, #0] │ │ - b.n b30e6 │ │ + b.n b30f6 │ │ movs r0, r4 │ │ - b.n b2b98 │ │ + b.n b2ba8 │ │ lsls r1, r0, #24 │ │ - b.n b3710 │ │ + b.n b3720 │ │ asrs r4, r0, #32 │ │ - b.n b33a6 │ │ + b.n b33b6 │ │ strb r0, [r1, #0] │ │ movs r1, #160 @ 0xa0 │ │ movs r0, #7 │ │ - b.n b33ae │ │ + b.n b33be │ │ ldc2l 11, cr14, [sp], {255} @ 0xff @ │ │ - add r0, pc, #0 @ (adr r0, b3074 ) │ │ - b.n b33b6 │ │ + add r0, pc, #0 @ (adr r0, b3084 ) │ │ + b.n b33c6 │ │ movs r0, r0 │ │ - b.n b371a │ │ + b.n b372a │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n b3190 │ │ + b.n b31a0 │ │ @ instruction: 0xfff1eaff │ │ movs r0, r4 │ │ - b.n b2bc4 │ │ + b.n b2bd4 │ │ movs r0, #6 │ │ - b.n b33ce │ │ + b.n b33de │ │ adds r0, #0 │ │ - b.n b37d2 │ │ + b.n b37e2 │ │ lsls r6, r3, #6 │ │ @ instruction: 0xeb00a000 │ │ - b.n b33da │ │ + b.n b33ea │ │ movs r2, r1 │ │ - b.n b33de │ │ - beq.n b30d8 │ │ - b.n b3538 │ │ + b.n b33ee │ │ + beq.n b30e8 │ │ + b.n b3548 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r2, r3, r4, r6, r7, r8, r9, fp, ip, sp, pc} │ │ + ldmia.w sp!, {r2, r3, r5, r6, r7, r8, r9, fp, ip, sp, pc} │ │ movs r2, r0 │ │ - rev r4, r0 │ │ + rev r4, r2 │ │ movs r2, r0 │ │ - @ instruction: 0xb87c │ │ + @ instruction: 0xb88c │ │ movs r2, r0 │ │ asrs r6, r0, #32 │ │ - b.n b34d8 │ │ + b.n b34e8 │ │ movs r4, r0 │ │ asrs r1, r2, #13 │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n b3802 │ │ + b.n b3812 │ │ vrhadd.u16 d14, d14, d31 │ │ - ldr r4, [pc, #64] @ (b3108 ) │ │ + ldr r4, [pc, #64] @ (b3118 ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n b35e8 │ │ + b.n b35f8 │ │ movs r2, r0 │ │ - b.n b3774 │ │ + b.n b3784 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ ands r0, r0 │ │ - b.n b341a │ │ + b.n b342a │ │ str r6, [sp, #720] @ 0x2d0 │ │ add.w r0, r0, r0 │ │ - b.n b3782 │ │ + b.n b3792 │ │ movs r7, r1 │ │ lsrs r0, r0, #8 │ │ str r5, [sp, #868] @ 0x364 │ │ add.w r0, r0, r0, lsl #4 │ │ - b.n b2c0e │ │ + b.n b2c1e │ │ movs r4, r0 │ │ - b.n b3432 │ │ + b.n b3442 │ │ movs r4, r0 │ │ - b.n b3798 │ │ + b.n b37a8 │ │ @ instruction: 0xfff60aff │ │ movs r2, r1 │ │ and.w r0, r0, r0, lsl #16 │ │ - b.n b3442 │ │ + b.n b3452 │ │ str r6, [sp, #696] @ 0x2b8 │ │ add.w r0, r0, r0 │ │ - b.n b37aa │ │ + b.n b37ba │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ str r5, [sp, #828] @ 0x33c │ │ add.w r0, r0, r0, lsl #4 │ │ - b.n b2c36 │ │ + b.n b2c46 │ │ movs r4, r0 │ │ - b.n b345a │ │ + b.n b346a │ │ movs r4, r0 │ │ - b.n b37c0 │ │ + b.n b37d0 │ │ @ instruction: 0xfff60aff │ │ movs r0, r0 │ │ and.w r0, r0, r0, lsl #4 │ │ - b.n b386a │ │ - ldr r4, [pc, #64] @ (b316c ) │ │ + b.n b387a │ │ + ldr r4, [pc, #64] @ (b317c ) │ │ ldmia.w sp!, {r0} │ │ - b.n b3472 │ │ + b.n b3482 │ │ vrhadd.u16 d14, d14, d31 │ │ asrs r0, r0, #32 │ │ - b.n b387a │ │ - ldr r4, [pc, #64] @ (b317c ) │ │ + b.n b388a │ │ + ldr r4, [pc, #64] @ (b318c ) │ │ ldmia.w sp!, {r0} │ │ - b.n b3482 │ │ + b.n b3492 │ │ vrhadd.u16 d14, d14, d31 │ │ - ldr r5, [pc, #960] @ (b3508 ) │ │ + ldr r5, [pc, #960] @ (b3518 ) │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n b3668 │ │ + b.n b3678 │ │ strb r0, [r1, #0] │ │ - b.n b2c88 │ │ + b.n b2c98 │ │ ands r2, r0 │ │ - b.n b3496 │ │ + b.n b34a6 │ │ movs r4, #63 @ 0x3f │ │ - b.n b389a │ │ + b.n b38aa │ │ lsls r7, r7, #16 │ │ - b.n b3806 │ │ + b.n b3816 │ │ movs r0, #4 │ │ adds r1, #160 @ 0xa0 │ │ str r1, [r0, r0] │ │ - b.n b34a6 │ │ + b.n b34b6 │ │ adds r0, #7 │ │ - b.n b34aa │ │ + b.n b34ba │ │ str r0, [r0, #0] │ │ - b.n b34ae │ │ + b.n b34be │ │ str r6, [sp, #604] @ 0x25c │ │ add.w r0, r0, r4 │ │ - b.n b3416 │ │ + b.n b3426 │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n b38be │ │ + b.n b38ce │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {r2, r3, pc} │ │ - b.n b2cbc │ │ + b.n b2ccc │ │ movs r1, r0 │ │ - b.n b386a │ │ + b.n b387a │ │ movs r4, r0 │ │ - bge.n b318e │ │ + bge.n b319e │ │ strb r0, [r0, #0] │ │ - b.n b32c0 │ │ + b.n b32d0 │ │ str r5, [r0, r0] │ │ - b.n b3296 │ │ + b.n b32a6 │ │ ands r0, r0 │ │ - b.n b3222 │ │ + b.n b3232 │ │ strh r0, [r0, #0] │ │ - b.n b36ee │ │ + b.n b36fe │ │ movs r3, r0 │ │ @ instruction: 0xea0095aa │ │ add.w r0, r0, r0 │ │ - b.n b2cca │ │ + b.n b2cda │ │ movs r4, r0 │ │ - b.n b384e │ │ + b.n b385e │ │ @ instruction: 0xfff21aff │ │ lsls r7, r7, #16 │ │ - b.n b385e │ │ + b.n b386e │ │ movs r4, #63 @ 0x3f │ │ - b.n b38fa │ │ + b.n b390a │ │ movs r0, #4 │ │ adds r1, #160 @ 0xa0 │ │ movs r6, r0 │ │ - b.n b3502 │ │ + b.n b3512 │ │ asrs r5, r0, #32 │ │ - b.n b3506 │ │ + b.n b3516 │ │ adds r0, #7 │ │ - b.n b350a │ │ + b.n b351a │ │ str r6, [sp, #512] @ 0x200 │ │ add.w r0, r0, r0 │ │ - b.n b347a │ │ + b.n b348a │ │ @ instruction: 0xffe80aff │ │ @ instruction: 0xffeaeaff │ │ - ldr r4, [pc, #448] @ (b339c ) │ │ + ldr r4, [pc, #448] @ (b33ac ) │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n b36fc │ │ - beq.n b3204 │ │ - b.n b3680 │ │ + b.n b370c │ │ + beq.n b3214 │ │ + b.n b3690 │ │ str r0, [r0, r0] │ │ - b.n b352a │ │ + b.n b353a │ │ ands r5, r1 │ │ - b.n b352e │ │ + b.n b353e │ │ str r1, [r0, #0] │ │ - b.n b3532 │ │ + b.n b3542 │ │ movs r4, r0 │ │ - b.n b3536 │ │ + b.n b3546 │ │ asrs r5, r0, #32 │ │ - b.n b353a │ │ + b.n b354a │ │ lsls r6, r1, #6 │ │ add.w r0, r0, r5 │ │ - b.n b3542 │ │ + b.n b3552 │ │ asrs r6, r0, #32 │ │ - b.n b3546 │ │ + b.n b3556 │ │ movs r0, #0 │ │ - b.n b394a │ │ + b.n b395a │ │ adds r0, #4 │ │ - b.n b354e │ │ + b.n b355e │ │ lsls r5, r2, #11 │ │ add.w r0, r0, r0, lsl #4 │ │ - b.n b3556 │ │ + b.n b3566 │ │ movs r5, r0 │ │ - b.n b355a │ │ + b.n b356a │ │ movs r0, #1 │ │ - b.n b395e │ │ + b.n b396e │ │ adds r0, #4 │ │ - b.n b3562 │ │ + b.n b3572 │ │ lsls r0, r2, #11 │ │ add.w r0, r0, r0, lsl #24 │ │ - b.n b356a │ │ + b.n b357a │ │ movs r5, r0 │ │ - b.n b356e │ │ + b.n b357e │ │ asrs r6, r0, #32 │ │ - b.n b3572 │ │ + b.n b3582 │ │ movs r0, #2 │ │ - b.n b3976 │ │ + b.n b3986 │ │ adds r0, #4 │ │ - b.n b357a │ │ + b.n b358a │ │ lsls r2, r1, #11 │ │ add.w r0, r0, r4, lsr #32 │ │ - b.n b374e │ │ - beq.n b3264 │ │ - b.n b36dc │ │ + b.n b375e │ │ + beq.n b3274 │ │ + b.n b36ec │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r4, sl, fp, lr} │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n b376c │ │ + b.n b377c │ │ ands r0, r0 │ │ - b.n b3596 │ │ + b.n b35a6 │ │ lsls r4, r6, #6 │ │ - b.n b35fa │ │ + b.n b360a │ │ asrs r3, r0, #32 │ │ - b.n b399e │ │ + b.n b39ae │ │ movs r0, r0 │ │ - b.n b3902 │ │ + b.n b3912 │ │ asrs r0, r3, #32 │ │ - b.n b2d6e │ │ + b.n b2d7e │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ movs r4, r3 │ │ - b.n b2d96 │ │ + b.n b2da6 │ │ adds r1, r6, #0 │ │ - b.n b3872 │ │ + b.n b3882 │ │ asrs r3, r0, #3 │ │ - b.n b38fc │ │ + b.n b390c │ │ movs r3, r0 │ │ - b.n b36fa │ │ + b.n b370a │ │ lsls r0, r4, #2 │ │ - b.n b35be │ │ + b.n b35ce │ │ lsls r0, r2, #6 │ │ - b.n b3384 │ │ + b.n b3394 │ │ movs r1, r0 │ │ - b.n b39c6 │ │ + b.n b39d6 │ │ lsls r1, r4, #4 │ │ - b.n b338a │ │ - ldmia r6!, {r0, r3} │ │ + b.n b339a │ │ + ldmia r6!, {r3} │ │ @ instruction: 0xebff01b4 │ │ - b.n b361a │ │ + b.n b362a │ │ asrs r6, r6, #6 │ │ - b.n b363e │ │ + b.n b364e │ │ movs r0, r0 │ │ - b.n b393c │ │ + b.n b394c │ │ ldrh r0, [r2, #32] │ │ adds r5, r7, r2 │ │ asrs r1, r0, #32 │ │ - b.n b38b2 │ │ + b.n b38c2 │ │ movs r0, #1 │ │ - b.n b32a6 │ │ + b.n b32b6 │ │ movs r1, r0 │ │ - b.n b354e │ │ + b.n b355e │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ cmp r7, #255 @ 0xff │ │ - b.n b38d0 │ │ + b.n b38e0 │ │ adds r1, r0, r0 │ │ - b.n b39f6 │ │ + b.n b3a06 │ │ movs r2, r0 │ │ - b.n b355a │ │ + b.n b356a │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ asrs r0, r2, #3 │ │ - b.n b3296 │ │ + b.n b32a6 │ │ lsls r0, r4, #24 │ │ - b.n b3606 │ │ + b.n b3616 │ │ asrs r1, r0, #32 │ │ - b.n b37cc │ │ + b.n b37dc │ │ cmp r1, #2 │ │ - b.n b3a0e │ │ + b.n b3a1e │ │ asrs r1, r2, #32 │ │ - b.n b33d6 │ │ + b.n b33e6 │ │ movs r0, r0 │ │ and.w r0, r0, r0, lsl #4 │ │ - b.n b361a │ │ + b.n b362a │ │ lsls r1, r0, #2 │ │ - b.n b361e │ │ - ldmia r5, {r2, r4, r5, r6, r7} │ │ + b.n b362e │ │ + ldmia r5, {r0, r1, r4, r5, r6, r7} │ │ @ instruction: 0xebff01b6 │ │ - b.n b366e │ │ + b.n b367e │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r4, r5, r6, r7, fp, lr} │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n b380c │ │ + b.n b381c │ │ str r0, [r2, #44] @ 0x2c │ │ - b.n b3678 │ │ + b.n b3688 │ │ ands r1, r0 │ │ - b.n b363a │ │ + b.n b364a │ │ movs r6, r0 │ │ - b.n b35ac │ │ + b.n b35bc │ │ movs r4, r4 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, r0] │ │ - b.n b3646 │ │ + b.n b3656 │ │ lsls r4, r6, #6 │ │ - b.n b36b2 │ │ + b.n b36c2 │ │ asrs r1, r0, #32 │ │ - b.n b391e │ │ + b.n b392e │ │ strb r0, [r4, #0] │ │ - b.n b2e1a │ │ + b.n b2e2a │ │ movs r0, r0 │ │ - b.n b39b6 │ │ + b.n b39c6 │ │ lsls r6, r6, #6 │ │ lsls r4, r2, #7 │ │ movs r0, #1 │ │ - b.n b331e │ │ + b.n b332e │ │ movs r1, r0 │ │ - b.n b35c6 │ │ + b.n b35d6 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ subs r7, r7, #7 │ │ - b.n b3948 │ │ + b.n b3958 │ │ ldr r1, [r0, #0] │ │ - b.n b3a6e │ │ + b.n b3a7e │ │ movs r1, r0 │ │ - b.n b35d2 │ │ + b.n b35e2 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r2, #3 │ │ - b.n b330e │ │ + b.n b331e │ │ lsls r0, r4, #24 │ │ - b.n b367e │ │ + b.n b368e │ │ asrs r1, r0, #32 │ │ - b.n b3844 │ │ + b.n b3854 │ │ cmp r1, #2 │ │ - b.n b3a86 │ │ + b.n b3a96 │ │ str r1, [r2, #0] │ │ - b.n b344e │ │ + b.n b345e │ │ movs r2, r0 │ │ and.w r0, r0, r0 │ │ - b.n b39f2 │ │ + b.n b3a02 │ │ str r0, [r0, #0] │ │ - b.n b3696 │ │ + b.n b36a6 │ │ movs r6, r1 │ │ lsrs r0, r0, #8 │ │ movs r7, r0 │ │ - b.n b369e │ │ + b.n b36ae │ │ asrs r6, r0, #32 │ │ - b.n b36a2 │ │ - ldrh r2, [r5, #4] │ │ + b.n b36b2 │ │ + ldrh r1, [r5, #4] │ │ @ instruction: 0xfa000054 │ │ - b.n b2ea8 │ │ + b.n b2eb8 │ │ movs r0, #7 │ │ - b.n b347a │ │ + b.n b348a │ │ adds r0, #92 @ 0x5c │ │ - b.n b2f1c │ │ + b.n b2f2c │ │ asrs r1, r0, #32 │ │ - b.n b33fa │ │ + b.n b340a │ │ movs r0, r0 │ │ - b.n b3498 │ │ + b.n b34a8 │ │ lsls r0, r2, #1 │ │ - b.n b2e9e │ │ + b.n b2eae │ │ asrs r1, r2, #12 │ │ - b.n b3482 │ │ + b.n b3492 │ │ movs r0, r0 │ │ - b.n b3846 │ │ + b.n b3856 │ │ asrs r1, r0, #32 │ │ - b.n b380c │ │ + b.n b381c │ │ movs r0, r0 │ │ - b.n b3390 │ │ + b.n b33a0 │ │ strb r0, [r6, #12] │ │ - b.n b36d2 │ │ + b.n b36e2 │ │ strb r0, [r4, #0] │ │ - b.n b2e9e │ │ + b.n b2eae │ │ movs r0, r3 │ │ - b.n b2ec2 │ │ + b.n b2ed2 │ │ movs r0, r0 │ │ - b.n b364c │ │ + b.n b365c │ │ movs r0, r4 │ │ adds r5, #132 @ 0x84 │ │ strb r0, [r0, #0] │ │ adds r1, #160 @ 0xa0 │ │ movs r4, r3 │ │ - b.n b2ed2 │ │ + b.n b2ee2 │ │ movs r0, r0 │ │ - b.n b365c │ │ + b.n b366c │ │ movs r0, r4 │ │ strh r4, [r0, #44] @ 0x2c │ │ movs r0, r0 │ │ - b.n b3b76 │ │ + b.n b3b86 │ │ lsls r0, r5, #2 │ │ - b.n b2ec2 │ │ + b.n b2ed2 │ │ lsls r4, r5, #2 │ │ - b.n b2ec6 │ │ + b.n b2ed6 │ │ ldrh r0, [r6, #6] │ │ - ldmia.w sp!, {r2, r4, r6, r7, sl, ip, sp, pc} │ │ + ldmia.w sp!, {r2, r5, r6, r7, sl, ip, sp, pc} │ │ movs r2, r0 │ │ - ldr r0, [pc, #0] @ (b33c8 ) │ │ + ldr r0, [pc, #0] @ (b33d8 ) │ │ stmdb sp!, {r0, r2, r3, ip, sp, pc} │ │ - b.n b370e │ │ + b.n b371e │ │ movs r0, #0 │ │ - b.n b2ef2 │ │ + b.n b2f02 │ │ movs r0, r0 │ │ - b.n b3a7a │ │ + b.n b3a8a │ │ movs r7, r2 │ │ lsrs r0, r0, #8 │ │ stmia r0!, {} │ │ - b.n b371e │ │ + b.n b372e │ │ movs r0, r0 │ │ - b.n b3b22 │ │ + b.n b3b32 │ │ lsrs r7, r7, #1 │ │ - b.n b3a8a │ │ + b.n b3a9a │ │ movs r2, r2 │ │ ldrh r0, [r0, #16] │ │ adds r1, #2 │ │ - b.n b3326 │ │ + b.n b3336 │ │ movs r3, r0 │ │ - b.n b3a98 │ │ + b.n b3aa8 │ │ movs r7, r1 │ │ subs r2, #0 │ │ - b.n b3400 │ │ - b.n b2f32 │ │ + b.n b3410 │ │ + b.n b2f42 │ │ movs r1, r0 │ │ - b.n b36ba │ │ + b.n b36ca │ │ movs r4, r1 │ │ cmp r2, #0 │ │ movs r1, r0 │ │ - b.n b3aaa │ │ + b.n b3aba │ │ movs r3, r1 │ │ lsrs r0, r0, #8 │ │ asrs r7, r0, #32 │ │ - b.n b3bce │ │ + b.n b3bde │ │ asrs r2, r0, #4 │ │ - b.n b3514 │ │ + b.n b3524 │ │ movs r0, #8 │ │ - b.n b392e │ │ + b.n b393e │ │ movs r0, r0 │ │ - b.n b3abc │ │ + b.n b3acc │ │ adds r0, #14 │ │ - b.n b375e │ │ - b.n b3428 │ │ - b.n b2d46 │ │ + b.n b376e │ │ + b.n b3438 │ │ + b.n b2d56 │ │ asrs r4, r0, #32 │ │ asrs r1, r0, #9 │ │ movs r6, r1 │ │ asrs r3, r2, #5 │ │ @ instruction: 0xfff98aff │ │ movs r6, r1 │ │ - b.n b36d8 │ │ + b.n b36e8 │ │ movs r1, r0 │ │ strh r0, [r4, #28] │ │ ldrh r0, [r0, #0] │ │ ldmia.w sp!, {r0} │ │ - b.n b3b7e │ │ + b.n b3b8e │ │ ldrh r0, [r0, #0] │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n b3964 │ │ - beq.n b3464 │ │ - b.n b38e8 │ │ + b.n b3974 │ │ + beq.n b3474 │ │ + b.n b38f8 │ │ str r0, [r1, r0] │ │ - b.n b396c │ │ + b.n b397c │ │ ands r0, r0 │ │ - b.n b3796 │ │ + b.n b37a6 │ │ movs r5, r0 │ │ - b.n b379a │ │ + b.n b37aa │ │ str r6, [sp, #96] @ 0x60 │ │ add.w r0, r0, r5 │ │ - b.n b37a2 │ │ + b.n b37b2 │ │ asrs r5, r1, #32 │ │ - b.n b3ba6 │ │ + b.n b3bb6 │ │ str r6, [sp, #100] @ 0x64 │ │ add.w r0, r0, r0 │ │ - b.n b3bae │ │ + b.n b3bbe │ │ asrs r5, r0, #32 │ │ - b.n b37b2 │ │ + b.n b37c2 │ │ movs r0, #0 │ │ - b.n b3bb6 │ │ + b.n b3bc6 │ │ str r0, [sp, #0] │ │ - b.n b3bba │ │ + b.n b3bca │ │ str r6, [sp, #96] @ 0x60 │ │ @ instruction: 0xeb00a010 │ │ - b.n b398a │ │ + b.n b399a │ │ movs r4, r6 │ │ - b.n b2f8e │ │ + b.n b2f9e │ │ movs r2, r1 │ │ - b.n b37ca │ │ + b.n b37da │ │ lsls r2, r5, #18 │ │ add.w r0, r0, r4, rrx │ │ - b.n b2fba │ │ + b.n b2fca │ │ movs r0, r0 │ │ - b.n b3b36 │ │ + b.n b3b46 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ movs r2, r1 │ │ - b.n b37de │ │ + b.n b37ee │ │ str r5, [sp, #572] @ 0x23c │ │ add.w r0, r0, r0 │ │ - b.n b3be6 │ │ - beq.n b34e0 │ │ - b.n b3940 │ │ + b.n b3bf6 │ │ + beq.n b34f0 │ │ + b.n b3950 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r4, sp, lr} │ │ - b.n b39ba │ │ + b.n b39ca │ │ str r4, [r4, r0] │ │ - b.n b39be │ │ + b.n b39ce │ │ strh r4, [r5, #0] │ │ - b.n b39c2 │ │ + b.n b39d2 │ │ movs r0, r3 │ │ - b.n b39c6 │ │ + b.n b39d6 │ │ movs r0, r0 │ │ - b.n b2fdc │ │ + b.n b2fec │ │ movs r0, r4 │ │ - b.n b2fee │ │ + b.n b2ffe │ │ asrs r4, r3, #32 │ │ - b.n b2ff2 │ │ + b.n b3002 │ │ movs r1, r0 │ │ - b.n b376e │ │ + b.n b377e │ │ movs r4, r6 │ │ lsls r4, r2, #22 │ │ movs r0, r0 │ │ lsls r0, r2, #13 │ │ movs r6, r2 │ │ lsrs r0, r0, #8 │ │ movs r0, r4 │ │ - b.n b3006 │ │ + b.n b3016 │ │ movs r1, r0 │ │ - b.n b38e2 │ │ + b.n b38f2 │ │ movs r1, #0 │ │ - b.n b3416 │ │ + b.n b3426 │ │ movs r0, r0 │ │ - b.n b3b8e │ │ + b.n b3b9e │ │ movs r0, r3 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #4 │ │ - b.n b341c │ │ + b.n b342c │ │ adds r0, #52 @ 0x34 │ │ - b.n b301e │ │ + b.n b302e │ │ str r1, [sp, #0] │ │ - b.n b340a │ │ + b.n b341a │ │ movs r0, r0 │ │ - b.n b3ba4 │ │ + b.n b3bb4 │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ movs r0, r7 │ │ - b.n b302e │ │ + b.n b303e │ │ @ instruction: 0xfbb7ebff │ │ movs r0, r0 │ │ - b.n b3bae │ │ + b.n b3bbe │ │ movs r3, r2 │ │ subs r0, r0, r0 │ │ movs r0, r4 │ │ - b.n b303e │ │ + b.n b304e │ │ movs r1, r0 │ │ - b.n b3a1a │ │ + b.n b3a2a │ │ movs r0, r4 │ │ - b.n b3026 │ │ + b.n b3036 │ │ movs r6, r0 │ │ - b.n b3862 │ │ + b.n b3872 │ │ str r5, [sp, #968] @ 0x3c8 │ │ add.w r0, r0, r4, rrx │ │ - b.n b3052 │ │ + b.n b3062 │ │ movs r0, r0 │ │ - b.n b3bce │ │ + b.n b3bde │ │ @ instruction: 0xffe30aff │ │ @ instruction: 0xffd8eaff │ │ movs r0, r0 │ │ - b.n b3074 │ │ + b.n b3084 │ │ asrs r2, r1, #32 │ │ - b.n b387e │ │ + b.n b388e │ │ str r5, [sp, #956] @ 0x3bc │ │ add.w r0, r0, r0 │ │ - b.n b3be6 │ │ + b.n b3bf6 │ │ @ instruction: 0xffdd0aff │ │ movs r4, r6 │ │ - b.n b3056 │ │ + b.n b3066 │ │ @ instruction: 0xffd1eaff │ │ movs r0, r4 │ │ - b.n b307e │ │ + b.n b308e │ │ movs r1, r0 │ │ - b.n b3a5a │ │ + b.n b3a6a │ │ movs r0, r4 │ │ - b.n b3066 │ │ + b.n b3076 │ │ @ instruction: 0xffcdeaff │ │ strb r0, [r0, #0] │ │ - b.n b38a6 │ │ + b.n b38b6 │ │ movs r0, r4 │ │ - b.n b3c0a │ │ + b.n b3c1a │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ movs r0, r1 │ │ - b.n b3a8c │ │ + b.n b3a9c │ │ asrs r4, r0, #32 │ │ - b.n b3a90 │ │ + b.n b3aa0 │ │ str r5, [sp, #916] @ 0x394 │ │ add.w r0, r0, r4, ror #28 │ │ - b.n b3086 │ │ + b.n b3096 │ │ @ instruction: 0xffc5eaff │ │ - ldr r3, [pc, #960] @ (b3944 ) │ │ + ldr r3, [pc, #960] @ (b3954 ) │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n b3aa4 │ │ + b.n b3ab4 │ │ svc 114 @ 0x72 │ │ - b.n b3a28 │ │ + b.n b3a38 │ │ ands r1, r0 │ │ - b.n b38d2 │ │ + b.n b38e2 │ │ str r0, [r0, r0] │ │ - b.n b38d6 │ │ + b.n b38e6 │ │ movs r0, r1 │ │ - b.n b3102 │ │ + b.n b3112 │ │ movs r1, r0 │ │ - b.n b3c7e │ │ + b.n b3c8e │ │ movs r0, r5 │ │ lsrs r0, r0, #8 │ │ strb r0, [r5, #0] │ │ - b.n b3ac0 │ │ + b.n b3ad0 │ │ str r1, [r0, #0] │ │ - b.n b38ea │ │ + b.n b38fa │ │ subs r7, r4, #5 │ │ - b.n b3cee │ │ + b.n b3cfe │ │ movs r7, r0 │ │ - b.n b38f2 │ │ - strh r5, [r6, #54] @ 0x36 │ │ + b.n b3902 │ │ + strh r5, [r2, #56] @ 0x38 │ │ @ instruction: 0xfb000090 │ │ - b.n b30f8 │ │ + b.n b3108 │ │ adds r0, #8 │ │ - b.n b3ad8 │ │ + b.n b3ae8 │ │ asrs r4, r0, #32 │ │ - b.n b30ec │ │ + b.n b30fc │ │ movs r0, #6 │ │ - b.n b3906 │ │ + b.n b3916 │ │ movs r0, r0 │ │ - b.n b36e8 │ │ + b.n b36f8 │ │ lsrs r5, r1, #11 │ │ orn sl, r0, #423936 @ 0x67800 │ │ orn sl, r0, #13500416 @ 0xce0000 │ │ - b.n b3bda │ │ + b.n b3bea │ │ lsls r2, r7, #7 │ │ - b.n b3c6a │ │ + b.n b3c7a │ │ lsls r0, r4, #3 │ │ - b.n b30f8 │ │ + b.n b3108 │ │ movs r3, r0 │ │ - b.n b3922 │ │ + b.n b3932 │ │ lsrs r5, r1, #11 │ │ orr.w sl, r0, #423936 @ 0x67800 │ │ orr.w r0, r0, #8847360 @ 0x870000 │ │ - b.n b392e │ │ + b.n b393e │ │ lsls r3, r5, #17 │ │ add.w r0, r0, r0 │ │ - b.n b3c96 │ │ + b.n b3ca6 │ │ movs r0, r2 │ │ subs r0, r0, r0 │ │ asrs r6, r5, #32 │ │ - b.n b31b8 │ │ + b.n b31c8 │ │ movs r0, r5 │ │ - b.n b316e │ │ + b.n b317e │ │ movs r0, #230 @ 0xe6 │ │ - b.n b31c0 │ │ + b.n b31d0 │ │ adds r0, #144 @ 0x90 │ │ - b.n b3d0c │ │ + b.n b3d1c │ │ asrs r4, r0, #32 │ │ - b.n b313a │ │ + b.n b314a │ │ movs r0, #144 @ 0x90 │ │ - b.n b3d16 │ │ + b.n b3d26 │ │ movs r0, #230 @ 0xe6 │ │ - b.n b31b0 │ │ + b.n b31c0 │ │ movs r0, #1 │ │ - b.n b393a │ │ + b.n b394a │ │ adds r0, #46 @ 0x2e │ │ - b.n b31b8 │ │ + b.n b31c8 │ │ movs r4, r0 │ │ lsls r5, r2, #22 │ │ movs r0, #4 │ │ - b.n b3966 │ │ + b.n b3976 │ │ lsls r0, r2, #15 │ │ lsls r0, r0, #7 │ │ lsls r0, r6, #3 │ │ lsls r6, r0, #7 │ │ lsls r0, r6, #3 │ │ - b.n b39cc │ │ + b.n b39dc │ │ asrs r0, r5, #32 │ │ - b.n b3b50 │ │ + b.n b3b60 │ │ movs r5, r0 │ │ - b.n b397a │ │ + b.n b398a │ │ lsls r3, r2, #18 │ │ @ instruction: 0xeb00d018 │ │ - b.n b3ad8 │ │ + b.n b3ae8 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {} │ │ - b.n b3d8a │ │ + b.n b3d9a │ │ @ instruction: 0xfffbeaff │ │ - cmp r3, #108 @ 0x6c │ │ + cmp r3, #92 @ 0x5c │ │ vcvt.f16.u16 q10, q8, #10 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n b3b74 │ │ + b.n b3b84 │ │ str r0, [r2, r0] │ │ - b.n b3b5e │ │ + b.n b3b6e │ │ ands r0, r0 │ │ - b.n b39a2 │ │ + b.n b39b2 │ │ movs r5, r0 │ │ - b.n b39a6 │ │ + b.n b39b6 │ │ lsls r3, r6, #16 │ │ add.w r0, r0, ip, lsr #32 │ │ - b.n b3196 │ │ + b.n b31a6 │ │ movs r1, r0 │ │ - b.n b3b72 │ │ + b.n b3b82 │ │ movs r4, r3 │ │ - b.n b317e │ │ + b.n b318e │ │ movs r0, r3 │ │ - b.n b3b82 │ │ + b.n b3b92 │ │ str r5, [sp, #624] @ 0x270 │ │ add.w r0, r0, r4, rrx │ │ - b.n b31aa │ │ + b.n b31ba │ │ movs r0, r0 │ │ - b.n b3d26 │ │ + b.n b3d36 │ │ movs r5, r3 │ │ subs r0, r0, r0 │ │ str r4, [r2, #0] │ │ - b.n b3b96 │ │ + b.n b3ba6 │ │ movs r4, r3 │ │ - b.n b31ba │ │ + b.n b31ca │ │ asrs r0, r4, #32 │ │ - b.n b31be │ │ + b.n b31ce │ │ movs r1, r0 │ │ - b.n b371a │ │ + b.n b372a │ │ movs r2, r0 │ │ - b.n b3d3e │ │ + b.n b3d4e │ │ movs r7, r2 │ │ subs r0, r0, r0 │ │ movs r0, r1 │ │ - b.n b324e │ │ + b.n b325e │ │ movs r0, r1 │ │ - b.n b3cca │ │ + b.n b3cda │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n b31da │ │ + b.n b31ea │ │ asrs r0, r0, #32 │ │ - b.n b3df6 │ │ + b.n b3e06 │ │ svc 26 │ │ @ instruction: 0xebff0006 │ │ - b.n b39fe │ │ + b.n b3a0e │ │ asrs r5, r0, #32 │ │ - b.n b3a02 │ │ + b.n b3a12 │ │ str r5, [sp, #568] @ 0x238 │ │ add.w r0, r0, r0 │ │ - b.n b3d6a │ │ + b.n b3d7a │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r6 │ │ - b.n b31da │ │ + b.n b31ea │ │ movs r7, r0 │ │ and.w r0, r0, r8 │ │ - b.n b3282 │ │ + b.n b3292 │ │ movs r0, r1 │ │ - b.n b3cfe │ │ + b.n b3d0e │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n b320e │ │ + b.n b321e │ │ asrs r0, r0, #32 │ │ - b.n b3e2a │ │ + b.n b3e3a │ │ svc 233 @ 0xe9 │ │ @ instruction: 0xebff0000 │ │ - b.n b3d92 │ │ + b.n b3da2 │ │ movs r4, r6 │ │ asrs r4, r0, #22 │ │ movs r4, r6 │ │ - b.n b3222 │ │ + b.n b3232 │ │ movs r0, r0 │ │ - b.n b3d9e │ │ + b.n b3dae │ │ @ instruction: 0xffe20aff │ │ movs r5, r0 │ │ - b.n b3a46 │ │ + b.n b3a56 │ │ str r4, [sp, #980] @ 0x3d4 │ │ add.w r0, r0, r4, rrx │ │ - b.n b3236 │ │ + b.n b3246 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r4, r5, r6, r7, fp, lr} │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n b3c34 │ │ - beq.n b37cc │ │ - b.n b3bb8 │ │ + b.n b3c44 │ │ + beq.n b37dc │ │ + b.n b3bc8 │ │ ands r2, r0 │ │ - b.n b3a62 │ │ + b.n b3a72 │ │ asrs r0, r0, #32 │ │ - b.n b3e66 │ │ + b.n b3e76 │ │ movs r0, #0 │ │ - b.n b3e6a │ │ + b.n b3e7a │ │ adds r0, #4 │ │ - b.n b3a6e │ │ + b.n b3a7e │ │ str r0, [r0, r0] │ │ - b.n b3a72 │ │ + b.n b3a82 │ │ strb r0, [r0, #0] │ │ - b.n b3e76 │ │ + b.n b3e86 │ │ str r5, [sp, #484] @ 0x1e4 │ │ add.w r0, r0, r0 │ │ - b.n b3dde │ │ + b.n b3dee │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ str r4, [sp, #264] @ 0x108 │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n b326a │ │ + b.n b327a │ │ str r0, [r0, #0] │ │ - b.n b3a8e │ │ + b.n b3a9e │ │ movs r5, r4 │ │ - b.n b3e00 │ │ + b.n b3e10 │ │ movs r7, r0 │ │ - bge.n b3756 │ │ + bge.n b3766 │ │ movs r6, r4 │ │ - b.n b3e08 │ │ + b.n b3e18 │ │ lsls r7, r3, #1 │ │ asrs r7, r2, #13 │ │ movs r0, r5 │ │ lsrs r0, r0, #8 │ │ lsls r1, r7, #1 │ │ - b.n b3e14 │ │ + b.n b3e24 │ │ movs r6, r4 │ │ lsrs r0, r0, #8 │ │ movs r7, r0 │ │ - b.n b3aae │ │ - beq.n b3790 │ │ - b.n b3c08 │ │ + b.n b3abe │ │ + beq.n b37a0 │ │ + b.n b3c18 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r0} │ │ - b.n b3e68 │ │ + b.n b3e78 │ │ movs r1, r4 │ │ lsrs r0, r0, #8 │ │ movs r4, r3 │ │ - b.n b3e30 │ │ + b.n b3e40 │ │ @ instruction: 0xfff81aff │ │ asrs r5, r1, #32 │ │ - b.n b3aca │ │ + b.n b3ada │ │ movs r5, r0 │ │ - b.n b3ace │ │ + b.n b3ade │ │ str r5, [sp, #412] @ 0x19c │ │ add.w r0, r0, r0 │ │ - b.n b3e36 │ │ + b.n b3e46 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n b32ca │ │ + b.n b32da │ │ strb r4, [r3, #0] │ │ - b.n b3ee2 │ │ + b.n b3ef2 │ │ movs r1, r0 │ │ - b.n b3e86 │ │ + b.n b3e96 │ │ @ instruction: 0xffef1aff │ │ movs r5, r2 │ │ and.w r0, r0, r0 │ │ - b.n b32ec │ │ + b.n b32fc │ │ adds r3, r2, r6 │ │ - b.n b3db8 │ │ + b.n b3dc8 │ │ asrs r2, r0, #4 │ │ - b.n b3e3a │ │ + b.n b3e4a │ │ movs r1, r0 │ │ - b.n b3a5e │ │ + b.n b3a6e │ │ movs r1, r1 │ │ - bge.n b37c2 │ │ + bge.n b37d2 │ │ adds r4, r2, r6 │ │ - b.n b3dc8 │ │ + b.n b3dd8 │ │ asrs r2, r0, #4 │ │ - b.n b3e4a │ │ + b.n b3e5a │ │ movs r1, r0 │ │ - b.n b3a6e │ │ + b.n b3a7e │ │ adds r5, r0, #5 │ │ asrs r3, r0, #12 │ │ adds r5, r1, r3 │ │ asrs r2, r0, #13 │ │ movs r1, r0 │ │ asrs r0, r2, #5 │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r5, #13 │ │ - b.n b3df0 │ │ + b.n b3e00 │ │ asrs r1, r6, #13 │ │ - b.n b3e74 │ │ + b.n b3e84 │ │ movs r4, r0 │ │ and.w r8, r0, r6, ror #7 │ │ - b.n b3df8 │ │ + b.n b3e08 │ │ asrs r4, r0, #22 │ │ - b.n b3e82 │ │ + b.n b3e92 │ │ movs r1, r0 │ │ - b.n b3a96 │ │ + b.n b3aa6 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ asrs r5, r6, #9 │ │ - b.n b3e0c │ │ + b.n b3e1c │ │ movs r1, r0 │ │ - b.n b3aa2 │ │ + b.n b3ab2 │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n b3b4a │ │ + b.n b3b5a │ │ asrs r4, r0, #32 │ │ - b.n b3b4e │ │ + b.n b3b5e │ │ str r4, [sp, #892] @ 0x37c │ │ add.w r0, r0, r0 │ │ - b.n b3eb6 │ │ + b.n b3ec6 │ │ strb r0, [r0, #0] │ │ - b.n b3f5a │ │ + b.n b3f6a │ │ strb r0, [r0, #0] │ │ asrs r6, r2, #22 │ │ movs r7, r0 │ │ - b.n b3b62 │ │ - beq.n b3844 │ │ - b.n b3cbc │ │ + b.n b3b72 │ │ + beq.n b3854 │ │ + b.n b3ccc │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r2, r3, r4, ip, sp, lr} │ │ - b.n b3f6e │ │ + b.n b3f7e │ │ movs r7, r0 │ │ - b.n b3b72 │ │ - beq.n b3854 │ │ - b.n b3ccc │ │ + b.n b3b82 │ │ + beq.n b3864 │ │ + b.n b3cdc │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n b3d5c │ │ - beq.n b375c │ │ - b.n b3ce0 │ │ + b.n b3d6c │ │ + beq.n b376c │ │ + b.n b3cf0 │ │ asrs r4, r1, #32 │ │ - b.n b3364 │ │ + b.n b3374 │ │ str r0, [sp, #0] │ │ - b.n b3b8e │ │ + b.n b3b9e │ │ lsls r4, r7, #19 │ │ - b.n b3390 │ │ + b.n b33a0 │ │ asrs r4, r0, #1 │ │ - b.n b3d70 │ │ + b.n b3d80 │ │ movs r0, r0 │ │ - b.n b3978 │ │ + b.n b3988 │ │ movs r4, r5 │ │ - b.n b337e │ │ + b.n b338e │ │ str r4, [sp, #492] @ 0x1ec │ │ add.w sl, r0, r0, lsl #28 │ │ - b.n b3e7e │ │ + b.n b3e8e │ │ movs r0, r0 │ │ - b.n b3f0a │ │ + b.n b3f1a │ │ ldrb r2, [r3, #14] │ │ - b.n b3ef4 │ │ + b.n b3f04 │ │ lsls r4, r6, #4 │ │ subs r0, r0, r0 │ │ lsls r4, r0, #1 │ │ - b.n b33b0 │ │ + b.n b33c0 │ │ movs r0, #72 @ 0x48 │ │ - b.n b33b4 │ │ + b.n b33c4 │ │ asrs r0, r2, #30 │ │ - b.n b3984 │ │ + b.n b3994 │ │ lsrs r0, r0, #31 │ │ - b.n b3bc2 │ │ + b.n b3bd2 │ │ adds r7, #144 @ 0x90 │ │ - b.n b38c6 │ │ + b.n b38d6 │ │ asrs r2, r0, #32 │ │ - b.n b39ac │ │ + b.n b39bc │ │ cmp r7, #194 @ 0xc2 │ │ - b.n b39ce │ │ + b.n b39de │ │ lsls r0, r0, #19 │ │ - b.n b33d0 │ │ + b.n b33e0 │ │ lsls r0, r2, #1 │ │ movt r0, #272 @ 0x110 │ │ - b.n b33b4 │ │ + b.n b33c4 │ │ asrs r1, r1, #32 │ │ - b.n b3bde │ │ + b.n b3bee │ │ movs r0, r0 │ │ - b.n b39c0 │ │ + b.n b39d0 │ │ movs r0, #20 │ │ - b.n b33c0 │ │ + b.n b33d0 │ │ lsrs r7, r1, #11 │ │ orr.w r2, r9, #10354688 @ 0x9e0000 │ │ @ instruction: 0xeb008333 │ │ - b.n b3eb8 │ │ - add r1, pc, #4 @ (adr r1, b38b8 ) │ │ - b.n b3eb6 │ │ + b.n b3ec8 │ │ + add r1, pc, #4 @ (adr r1, b38c8 ) │ │ + b.n b3ec6 │ │ movs r0, r0 │ │ - b.n b3f5a │ │ + b.n b3f6a │ │ strh r3, [r6, #24] │ │ - b.n b3f44 │ │ - add r1, pc, #4 @ (adr r1, b38c4 ) │ │ - b.n b3f42 │ │ + b.n b3f54 │ │ + add r1, pc, #4 @ (adr r1, b38d4 ) │ │ + b.n b3f52 │ │ lsls r1, r0, #1 │ │ lsrs r0, r0, #8 │ │ adds r0, #0 │ │ - b.n b33fc │ │ + b.n b340c │ │ cmp r5, sl │ │ - b.n b3ed8 │ │ + b.n b3ee8 │ │ lsls r2, r0, #1 │ │ @ instruction: 0xe9994555 │ │ - b.n b3f60 │ │ + b.n b3f70 │ │ movs r3, r0 │ │ - b.n b3926 │ │ + b.n b3936 │ │ vcgt.s8 d14, d15, d0 │ │ movs r0, #12 │ │ - b.n b3414 │ │ + b.n b3424 │ │ strb r0, [r4, #2] │ │ - b.n b38ee │ │ + b.n b38fe │ │ vcgt.s8 q7, , q0 │ │ movs r7, r0 │ │ - b.n b396e │ │ + b.n b397e │ │ strb r0, [r1, #0] │ │ - b.n b38f2 │ │ + b.n b3902 │ │ lsls r0, r4, #4 │ │ - b.n b3906 │ │ + b.n b3916 │ │ movs r0, r0 │ │ - b.n b3a08 │ │ + b.n b3a18 │ │ lsls r0, r4, #8 │ │ - b.n b39fe │ │ + b.n b3a0e │ │ movs r6, r1 │ │ - b.n b3902 │ │ + b.n b3912 │ │ lsrs r0, r2, #10 │ │ - b.n b391e │ │ + b.n b392e │ │ lsls r2, r4, #2 │ │ - b.n b3912 │ │ + b.n b3922 │ │ movs r0, r0 │ │ - b.n b3992 │ │ + b.n b39a2 │ │ strb r0, [r1, #0] │ │ - b.n b3912 │ │ + b.n b3922 │ │ lsls r0, r4, #4 │ │ - b.n b3926 │ │ + b.n b3936 │ │ movs r0, r0 │ │ - b.n b3a28 │ │ + b.n b3a38 │ │ lsls r0, r4, #8 │ │ - b.n b3a1e │ │ + b.n b3a2e │ │ movs r6, r1 │ │ - b.n b3922 │ │ + b.n b3932 │ │ lsrs r0, r2, #10 │ │ - b.n b3934 │ │ + b.n b3944 │ │ lsls r1, r4, #2 │ │ - b.n b3932 │ │ + b.n b3942 │ │ movs r0, r0 │ │ - b.n b39b0 │ │ + b.n b39c0 │ │ str r0, [r1, r0] │ │ - b.n b3932 │ │ + b.n b3942 │ │ asrs r1, r0, #32 │ │ - b.n b397a │ │ + b.n b398a │ │ lsls r0, r4, #4 │ │ - b.n b394a │ │ + b.n b395a │ │ movs r0, r0 │ │ - b.n b3a48 │ │ + b.n b3a58 │ │ str r6, [r4, r2] │ │ - b.n b394a │ │ + b.n b395a │ │ str r5, [r0, #0] │ │ - b.n b39d2 │ │ + b.n b39e2 │ │ movs r0, #161 @ 0xa1 │ │ - b.n b3952 │ │ + b.n b3962 │ │ str r0, [r1, r0] │ │ - b.n b395a │ │ + b.n b396a │ │ asrs r2, r0, #32 │ │ - b.n b39d4 │ │ + b.n b39e4 │ │ str r6, [r4, #16] │ │ - b.n b3966 │ │ + b.n b3976 │ │ lsls r0, r4, #8 │ │ - b.n b3a5a │ │ + b.n b3a6a │ │ str r6, [r0, #0] │ │ - b.n b3a68 │ │ + b.n b3a78 │ │ str r3, [r4, r2] │ │ - b.n b396a │ │ + b.n b397a │ │ adds r0, #5 │ │ - b.n b39ec │ │ + b.n b39fc │ │ movs r0, #8 │ │ - b.n b396c │ │ + b.n b397c │ │ str r0, [r1, r0] │ │ - b.n b3974 │ │ + b.n b3984 │ │ str r6, [r4, #32] │ │ - b.n b3a7e │ │ + b.n b3a8e │ │ adds r1, #35 @ 0x23 │ │ - b.n b3986 │ │ + b.n b3996 │ │ str r6, [r1, #0] │ │ - b.n b3986 │ │ + b.n b3996 │ │ adds r0, #3 │ │ - b.n b3a88 │ │ + b.n b3a98 │ │ asrs r1, r4, #4 │ │ - b.n b3992 │ │ + b.n b39a2 │ │ movs r6, r1 │ │ - b.n b3986 │ │ + b.n b3996 │ │ asrs r1, r0, #32 │ │ - b.n b3a8e │ │ + b.n b3a9e │ │ adds r2, #35 @ 0x23 │ │ - b.n b3a94 │ │ + b.n b3aa4 │ │ lsrs r6, r2, #10 │ │ - b.n b399e │ │ + b.n b39ae │ │ adds r0, #14 │ │ - b.n b399c │ │ + b.n b39ac │ │ asrs r1, r4, #8 │ │ - b.n b3a9c │ │ + b.n b3aac │ │ lsrs r0, r2, #10 │ │ - b.n b399e │ │ + b.n b39ae │ │ asrs r6, r1, #32 │ │ - b.n b39a4 │ │ + b.n b39b4 │ │ lsrs r3, r2, #10 │ │ - b.n b39ac │ │ + b.n b39bc │ │ lsrs r1, r2, #10 │ │ - b.n b39ac │ │ + b.n b39bc │ │ cmp r4, #38 @ 0x26 │ │ - b.n b3cee │ │ + b.n b3cfe │ │ cmp r4, #35 @ 0x23 │ │ - b.n b3ab6 │ │ + b.n b3ac6 │ │ lsrs r0, r4, #16 │ │ - b.n b3aba │ │ + b.n b3aca │ │ lsrs r7, r4, #16 │ │ - b.n b3aba │ │ + b.n b3aca │ │ lsrs r4, r5, #16 │ │ - b.n b3abe │ │ + b.n b3ace │ │ lsrs r1, r4, #16 │ │ - b.n b3ac2 │ │ + b.n b3ad2 │ │ lsrs r7, r0, #20 │ │ - b.n b3dc6 │ │ + b.n b3dd6 │ │ lsls r0, r0, #1 │ │ - b.n b406a │ │ + b.n b407a │ │ lsls r0, r2, #1 │ │ lsrs r0, r0, #8 │ │ lsls r4, r0, #14 │ │ - b.n b3510 │ │ + b.n b3520 │ │ asrs r0, r0, #32 │ │ - b.n b4116 │ │ + b.n b4126 │ │ movs r0, r0 │ │ - b.n b3af8 │ │ + b.n b3b08 │ │ str r4, [sp, #0] │ │ add.w r0, r0, r1 │ │ - b.n b40c2 │ │ + b.n b40d2 │ │ lsls r4, r1, #1 │ │ lsrs r0, r0, #8 │ │ asrs r1, r1, #32 │ │ - b.n b3d2a │ │ + b.n b3d3a │ │ movs r0, #16 │ │ - b.n b412e │ │ + b.n b413e │ │ str r0, [r0, #0] │ │ - b.n b3d32 │ │ + b.n b3d42 │ │ str r3, [sp, #776] @ 0x308 │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n b3d3a │ │ + b.n b3d4a │ │ movs r6, r0 │ │ - b.n b3d3e │ │ + b.n b3d4e │ │ str r3, [sp, #924] @ 0x39c │ │ add.w r0, r0, r0, lsr #32 │ │ - b.n b40b4 │ │ + b.n b40c4 │ │ lsls r3, r0, #1 │ │ subs r0, r0, r0 │ │ adds r0, #0 │ │ - b.n b3540 │ │ + b.n b3550 │ │ cmp r5, sl │ │ - b.n b401c │ │ + b.n b402c │ │ lsls r2, r0, #1 │ │ @ instruction: 0xe9994555 │ │ - b.n b40a4 │ │ + b.n b40b4 │ │ movs r3, r0 │ │ - b.n b3a6a │ │ + b.n b3a7a │ │ movs r0, #12 │ │ - b.n b3554 │ │ + b.n b3564 │ │ vcgt.s8 d14, d15, d0 │ │ strb r0, [r4, #2] │ │ - b.n b3a32 │ │ + b.n b3a42 │ │ vcgt.s8 q7, , q0 │ │ movs r7, r0 │ │ - b.n b3ab2 │ │ + b.n b3ac2 │ │ strb r0, [r1, #0] │ │ - b.n b3a36 │ │ + b.n b3a46 │ │ lsls r0, r4, #4 │ │ - b.n b3a4a │ │ + b.n b3a5a │ │ movs r0, r0 │ │ - b.n b3b4c │ │ + b.n b3b5c │ │ strb r2, [r4, #2] │ │ - b.n b3a4a │ │ + b.n b3a5a │ │ strb r7, [r0, #0] │ │ - b.n b3aca │ │ + b.n b3ada │ │ str r0, [r1, r0] │ │ - b.n b3a58 │ │ + b.n b3a68 │ │ lsls r0, r4, #8 │ │ - b.n b3b4e │ │ + b.n b3b5e │ │ strb r7, [r4, #4] │ │ - b.n b3a62 │ │ + b.n b3a72 │ │ movs r6, r1 │ │ - b.n b3a56 │ │ + b.n b3a66 │ │ strb r7, [r0, #0] │ │ - b.n b3b64 │ │ + b.n b3b74 │ │ str r1, [r4, r2] │ │ - b.n b3a66 │ │ + b.n b3a76 │ │ str r5, [r0, r0] │ │ - b.n b3ae4 │ │ + b.n b3af4 │ │ lsrs r0, r2, #10 │ │ - b.n b3a7e │ │ + b.n b3a8e │ │ movs r0, r1 │ │ - b.n b3a74 │ │ + b.n b3a84 │ │ str r5, [r4, r4] │ │ - b.n b3a7e │ │ + b.n b3a8e │ │ asrs r1, r0, #32 │ │ - b.n b3ab6 │ │ + b.n b3ac6 │ │ movs r5, r0 │ │ - b.n b3b76 │ │ + b.n b3b86 │ │ strb r7, [r4, #8] │ │ - b.n b3b88 │ │ + b.n b3b98 │ │ movs r0, #161 @ 0xa1 │ │ - b.n b3a86 │ │ + b.n b3a96 │ │ strb r6, [r1, #0] │ │ - b.n b3a90 │ │ + b.n b3aa0 │ │ lsls r0, r4, #8 │ │ - b.n b3b86 │ │ + b.n b3b96 │ │ asrs r2, r0, #32 │ │ - b.n b3b0c │ │ + b.n b3b1c │ │ movs r6, r1 │ │ - b.n b3a8e │ │ + b.n b3a9e │ │ movs r0, #8 │ │ - b.n b3a94 │ │ + b.n b3aa4 │ │ asrs r1, r4, #4 │ │ - b.n b3aa6 │ │ + b.n b3ab6 │ │ lsrs r7, r2, #10 │ │ - b.n b3aa8 │ │ + b.n b3ab8 │ │ asrs r1, r0, #32 │ │ - b.n b3ba2 │ │ + b.n b3bb2 │ │ lsrs r0, r2, #10 │ │ - b.n b3aac │ │ + b.n b3abc │ │ lsls r6, r4, #2 │ │ - b.n b3aae │ │ + b.n b3abe │ │ movs r0, r0 │ │ - b.n b3b36 │ │ + b.n b3b46 │ │ str r0, [r1, #0] │ │ - b.n b3aae │ │ + b.n b3abe │ │ asrs r1, r4, #8 │ │ - b.n b3bb4 │ │ + b.n b3bc4 │ │ lsls r0, r4, #4 │ │ - b.n b3ac6 │ │ + b.n b3ad6 │ │ asrs r6, r1, #32 │ │ - b.n b3abc │ │ + b.n b3acc │ │ movs r0, r0 │ │ - b.n b3bca │ │ + b.n b3bda │ │ str r3, [r4, #8] │ │ - b.n b3aca │ │ + b.n b3ada │ │ adds r0, #6 │ │ - b.n b3b4c │ │ + b.n b3b5c │ │ lsrs r1, r2, #10 │ │ - b.n b3acc │ │ + b.n b3adc │ │ str r0, [r1, #0] │ │ - b.n b3ad4 │ │ + b.n b3ae4 │ │ adds r1, #35 @ 0x23 │ │ - b.n b3ae2 │ │ + b.n b3af2 │ │ lsls r0, r4, #8 │ │ - b.n b3bd6 │ │ + b.n b3be6 │ │ adds r0, #3 │ │ - b.n b3be6 │ │ + b.n b3bf6 │ │ movs r6, r1 │ │ - b.n b3ade │ │ + b.n b3aee │ │ adds r2, #35 @ 0x23 │ │ - b.n b3be8 │ │ + b.n b3bf8 │ │ lsrs r0, r2, #10 │ │ - b.n b3ae6 │ │ + b.n b3af6 │ │ adds r0, #14 │ │ - b.n b3af0 │ │ + b.n b3b00 │ │ lsrs r3, r2, #10 │ │ - b.n b3af4 │ │ + b.n b3b04 │ │ lsrs r0, r4, #16 │ │ - b.n b3e32 │ │ + b.n b3e42 │ │ lsrs r3, r4, #16 │ │ - b.n b3bf6 │ │ + b.n b3c06 │ │ lsrs r5, r4, #16 │ │ - b.n b3bfa │ │ + b.n b3c0a │ │ lsrs r7, r4, #16 │ │ - b.n b3bfe │ │ + b.n b3c0e │ │ lsrs r4, r5, #16 │ │ - b.n b3c02 │ │ + b.n b3c12 │ │ lsrs r1, r4, #16 │ │ - b.n b3c06 │ │ + b.n b3c16 │ │ lsrs r7, r0, #20 │ │ - b.n b3f0a │ │ + b.n b3f1a │ │ lsls r0, r0, #1 │ │ - b.n b41ae │ │ + b.n b41be │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ - beq.n b3b4c │ │ - b.n b3fac │ │ + beq.n b3b5c │ │ + b.n b3fbc │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, r4, r5, r9} │ │ - b.n b365c │ │ + b.n b366c │ │ asrs r1, r1, #32 │ │ - b.n b3e62 │ │ + b.n b3e72 │ │ ands r4, r1 │ │ - b.n b3660 │ │ + b.n b3670 │ │ str r0, [r2, r0] │ │ - b.n b4044 │ │ + b.n b4054 │ │ movs r0, r0 │ │ - b.n b3c4c │ │ + b.n b3c5c │ │ cmp r7, #222 @ 0xde │ │ - b.n b4272 │ │ + b.n b4282 │ │ lsls r0, r0, #1 │ │ - b.n b4036 │ │ + b.n b4046 │ │ str r0, [r1, #0] │ │ - b.n b4044 │ │ + b.n b4054 │ │ lsrs r7, r5, #11 │ │ orn r0, r0, #8912896 @ 0x880000 │ │ - b.n b4282 │ │ + b.n b4292 │ │ lsrs r0, r0, #11 │ │ orr.w r0, r1, #8978432 @ 0x890000 │ │ - b.n b3e8a │ │ + b.n b3e9a │ │ asrs r0, r1, #32 │ │ - b.n b3668 │ │ + b.n b3678 │ │ asrs r4, r0, #32 │ │ - b.n b3e92 │ │ + b.n b3ea2 │ │ lsls r1, r4, #6 │ │ @ instruction: 0xeb0093d5 │ │ add.w r0, r0, r8, asr #32 │ │ - b.n b3678 │ │ + b.n b3688 │ │ str r3, [sp, #908] @ 0x38c │ │ add.w r1, r0, r8, ror #7 │ │ - b.n b36a4 │ │ + b.n b36b4 │ │ ands r4, r6 │ │ - b.n b3684 │ │ + b.n b3694 │ │ eors r4, r0 │ │ - b.n b4088 │ │ + b.n b4098 │ │ asrs r1, r0, #32 │ │ - b.n b3c90 │ │ + b.n b3ca0 │ │ movs r4, r5 │ │ - b.n b3690 │ │ + b.n b36a0 │ │ movs r0, r1 │ │ - b.n b4086 │ │ + b.n b4096 │ │ asrs r0, r7, #32 │ │ - b.n b3698 │ │ + b.n b36a8 │ │ str r0, [r6, r0] │ │ - b.n b369c │ │ + b.n b36ac │ │ str r4, [r1, #0] │ │ - b.n b36a0 │ │ + b.n b36b0 │ │ movs r4, r0 │ │ - b.n b36a4 │ │ + b.n b36b4 │ │ movs r1, r0 │ │ - b.n b42ce │ │ + b.n b42de │ │ asrs r4, r0, #32 │ │ - b.n b3ed2 │ │ + b.n b3ee2 │ │ str r4, [sp, #136] @ 0x88 │ │ add.w sl, r0, r0, lsl #20 │ │ - b.n b41b2 │ │ + b.n b41c2 │ │ movs r0, r0 │ │ - b.n b423e │ │ + b.n b424e │ │ str r0, [r0, #0] │ │ - b.n b42e2 │ │ + b.n b42f2 │ │ movs r0, r0 │ │ - b.n b42e6 │ │ + b.n b42f6 │ │ asrs r0, r0, #32 │ │ - b.n b42ea │ │ + b.n b42fa │ │ ldrh r2, [r3, r6] │ │ - b.n b4234 │ │ + b.n b4244 │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ movs r0, #68 @ 0x44 │ │ - b.n b36f0 │ │ + b.n b3700 │ │ subs r2, r7, #7 │ │ - b.n b42fa │ │ + b.n b430a │ │ lsls r0, r1, #1 │ │ - b.n b36f8 │ │ + b.n b3708 │ │ lsls r0, r2, #6 │ │ - b.n b3bc2 │ │ + b.n b3bd2 │ │ subs r2, r0, #7 │ │ - b.n b3f06 │ │ + b.n b3f16 │ │ lsls r1, r2, #22 │ │ - b.n b3bcc │ │ + b.n b3bdc │ │ lsls r2, r2, #22 │ │ - b.n b3d10 │ │ + b.n b3d20 │ │ movs r0, #4 │ │ - b.n b370c │ │ + b.n b371c │ │ lsls r0, r6, #3 │ │ - b.n b3f5a │ │ + b.n b3f6a │ │ asrs r4, r0, #32 │ │ - b.n b3f1a │ │ + b.n b3f2a │ │ lsls r4, r0, #6 │ │ - b.n b371c │ │ + b.n b372c │ │ movs r0, r0 │ │ - b.n b3d00 │ │ + b.n b3d10 │ │ movs r4, r5 │ │ - b.n b3706 │ │ + b.n b3716 │ │ str r3, [sp, #612] @ 0x264 │ │ add.w r0, r0, r0 │ │ - b.n b428e │ │ + b.n b429e │ │ lsls r2, r2, #1 │ │ subs r0, r0, r0 │ │ lsls r4, r0, #1 │ │ - b.n b3730 │ │ + b.n b3740 │ │ asrs r0, r1, #1 │ │ - b.n b3734 │ │ + b.n b3744 │ │ movs r5, #144 @ 0x90 │ │ - b.n b3d04 │ │ + b.n b3d14 │ │ lsrs r0, r0, #31 │ │ - b.n b3f42 │ │ + b.n b3f52 │ │ adds r5, #144 @ 0x90 │ │ - b.n b3c46 │ │ + b.n b3c56 │ │ str r1, [r0, #0] │ │ - b.n b3d2e │ │ + b.n b3d3e │ │ subs r1, r0, #7 │ │ - b.n b3d4e │ │ + b.n b3d5e │ │ movs r4, r1 │ │ - b.n b374c │ │ + b.n b375c │ │ movs r0, #48 @ 0x30 │ │ - b.n b4356 │ │ + b.n b4366 │ │ str r0, [r0, #0] │ │ - b.n b371a │ │ + b.n b372a │ │ asrs r4, r0, #32 │ │ - b.n b371e │ │ + b.n b372e │ │ asrs r0, r2, #32 │ │ - b.n b413c │ │ + b.n b414c │ │ movs r1, r1 │ │ - b.n b3f66 │ │ + b.n b3f76 │ │ lsls r4, r5, #5 │ │ add.w r0, r0, r8 │ │ - b.n b3768 │ │ + b.n b3778 │ │ cmp r5, sl │ │ - b.n b423c │ │ + b.n b424c │ │ movs r4, r4 │ │ ldmia.w r9, {r0, r2, r4, r6, r8, sl, lr} │ │ - b.n b42c4 │ │ + b.n b42d4 │ │ ldmia r7!, {r0, r1, r2, r3} │ │ - b.n b423e │ │ + b.n b424e │ │ str r0, [r0, #0] │ │ - b.n b3762 │ │ + b.n b3772 │ │ ldmia r7!, {r0, r1, r2, r3} │ │ - b.n b42c6 │ │ + b.n b42d6 │ │ adds r0, #4 │ │ - b.n b376a │ │ + b.n b377a │ │ movs r2, r0 │ │ - b.n b3c9a │ │ + b.n b3caa │ │ asrs r0, r4, #2 │ │ - b.n b3c5a │ │ + b.n b3c6a │ │ movs r1, r0 │ │ - b.n b3cd6 │ │ + b.n b3ce6 │ │ asrs r0, r1, #32 │ │ - b.n b3c5a │ │ + b.n b3c6a │ │ lsls r0, r4, #4 │ │ - b.n b3c6e │ │ + b.n b3c7e │ │ movs r0, r0 │ │ - b.n b3d64 │ │ + b.n b3d74 │ │ asrs r5, r0, #32 │ │ - b.n b3cac │ │ + b.n b3cbc │ │ strb r1, [r4, #2] │ │ - b.n b3c72 │ │ + b.n b3c82 │ │ lsls r0, r4, #8 │ │ - b.n b3d6e │ │ + b.n b3d7e │ │ asrs r7, r0, #32 │ │ - b.n b3cf4 │ │ + b.n b3d04 │ │ movs r4, r1 │ │ - b.n b3c76 │ │ + b.n b3c86 │ │ strb r0, [r1, #0] │ │ - b.n b3c7c │ │ + b.n b3c8c │ │ asrs r1, r4, #4 │ │ - b.n b3c8e │ │ + b.n b3c9e │ │ lsrs r0, r2, #10 │ │ - b.n b3c82 │ │ + b.n b3c92 │ │ asrs r1, r0, #32 │ │ - b.n b3d94 │ │ + b.n b3da4 │ │ strb r3, [r4, #2] │ │ - b.n b3c92 │ │ + b.n b3ca2 │ │ adds r0, #7 │ │ - b.n b3d14 │ │ + b.n b3d24 │ │ asrs r1, r4, #8 │ │ - b.n b3d94 │ │ + b.n b3da4 │ │ strb r0, [r1, #0] │ │ - b.n b3c9c │ │ + b.n b3cac │ │ asrs r4, r1, #32 │ │ - b.n b3c9c │ │ + b.n b3cac │ │ adds r1, #35 @ 0x23 │ │ - b.n b3cae │ │ + b.n b3cbe │ │ adds r0, #3 │ │ - b.n b3db0 │ │ + b.n b3dc0 │ │ strb r5, [r4, #2] │ │ - b.n b3cae │ │ + b.n b3cbe │ │ strb r7, [r0, #0] │ │ - b.n b3d34 │ │ + b.n b3d44 │ │ lsrs r1, r2, #10 │ │ - b.n b3cb0 │ │ + b.n b3cc0 │ │ str r0, [r1, r0] │ │ - b.n b3cc0 │ │ + b.n b3cd0 │ │ strb r7, [r4, #4] │ │ - b.n b3cc6 │ │ + b.n b3cd6 │ │ adds r2, #35 @ 0x23 │ │ - b.n b3dc0 │ │ + b.n b3dd0 │ │ strb r7, [r0, #0] │ │ - b.n b3dc8 │ │ + b.n b3dd8 │ │ str r6, [r4, r2] │ │ - b.n b3cca │ │ + b.n b3cda │ │ str r5, [r0, #0] │ │ - b.n b3d52 │ │ + b.n b3d62 │ │ adds r0, #12 │ │ - b.n b3cd0 │ │ + b.n b3ce0 │ │ str r0, [r1, r0] │ │ - b.n b3cda │ │ + b.n b3cea │ │ strb r7, [r4, #8] │ │ - b.n b3de0 │ │ + b.n b3df0 │ │ str r6, [r4, #16] │ │ - b.n b3ce6 │ │ + b.n b3cf6 │ │ strb r4, [r1, #0] │ │ - b.n b3ce8 │ │ + b.n b3cf8 │ │ str r6, [r0, #0] │ │ - b.n b3de8 │ │ + b.n b3df8 │ │ str r2, [r4, r2] │ │ - b.n b3cea │ │ + b.n b3cfa │ │ movs r0, #5 │ │ - b.n b3d6a │ │ + b.n b3d7a │ │ lsrs r7, r2, #10 │ │ - b.n b3cf8 │ │ + b.n b3d08 │ │ str r0, [r1, r0] │ │ - b.n b3cf2 │ │ + b.n b3d02 │ │ movs r1, #34 @ 0x22 │ │ - b.n b3d02 │ │ + b.n b3d12 │ │ str r6, [r4, #32] │ │ - b.n b3e02 │ │ + b.n b3e12 │ │ movs r0, #2 │ │ - b.n b3e04 │ │ + b.n b3e14 │ │ str r4, [r1, #0] │ │ - b.n b3d0a │ │ + b.n b3d1a │ │ lsrs r3, r2, #10 │ │ - b.n b3d08 │ │ + b.n b3d18 │ │ eors r4, r0 │ │ - b.n b4220 │ │ + b.n b4230 │ │ movs r2, #34 @ 0x22 │ │ - b.n b3e0e │ │ + b.n b3e1e │ │ movs r0, #12 │ │ - b.n b3d12 │ │ + b.n b3d22 │ │ lsrs r6, r2, #10 │ │ - b.n b3d1e │ │ + b.n b3d2e │ │ lsrs r2, r2, #10 │ │ - b.n b3d1a │ │ + b.n b3d2a │ │ ldr r6, [r4, #64] @ 0x40 │ │ - b.n b405a │ │ + b.n b406a │ │ cmp r4, #34 @ 0x22 │ │ - b.n b3e2a │ │ + b.n b3e3a │ │ cmp r4, #39 @ 0x27 │ │ - b.n b3e26 │ │ + b.n b3e36 │ │ cmp r4, #35 @ 0x23 │ │ - b.n b3e2a │ │ + b.n b3e3a │ │ lsrs r0, r4, #16 │ │ - b.n b3e2e │ │ + b.n b3e3e │ │ lsrs r1, r4, #16 │ │ - b.n b3e2e │ │ + b.n b3e3e │ │ lsrs r7, r0, #20 │ │ - b.n b4132 │ │ + b.n b4142 │ │ lsls r0, r0, #1 │ │ - b.n b43d6 │ │ + b.n b43e6 │ │ @ instruction: 0xff931aff │ │ vpmin.u q15, q10, │ │ asrs r0, r0, #32 │ │ - b.n b4482 │ │ + b.n b4492 │ │ @ instruction: 0xffb1eaff │ │ asrs r0, r0, #32 │ │ - b.n b448a │ │ + b.n b449a │ │ movs r0, #0 │ │ - b.n b448e │ │ + b.n b449e │ │ mcr2 10, 6, lr, cr14, cr15, {7} @ │ │ - add r7, sp, #976 @ 0x3d0 │ │ + add sp, #16 │ │ movs r2, r0 │ │ - pop {r0, r1, r2, r4, r5, r7, pc} │ │ - vtbl.8 d26, {d5-d8}, d24 │ │ - @ instruction: 0xfff5ad20 │ │ + bkpt 0x003d │ │ + @ instruction: 0xfff5acf2 │ │ + vcvt.u16.f16 d26, d16, #11 │ │ movs r2, r0 │ │ stc2l 15, cr15, [r4], {255} @ 0xff │ │ - add r4, sp, #432 @ 0x1b0 │ │ + add r4, sp, #496 @ 0x1f0 │ │ movs r2, r0 │ │ - ldr r7, [pc, #960] @ (b412c ) │ │ + ldr r7, [pc, #960] @ (b413c ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n b428c │ │ - beq.n b3d8c │ │ - b.n b4210 │ │ + b.n b429c │ │ + beq.n b3d9c │ │ + b.n b4220 │ │ str r0, [sp, #4] │ │ - b.n b40ba │ │ + b.n b40ca │ │ asrs r0, r1, #32 │ │ - b.n b389e │ │ + b.n b38ae │ │ strh r0, [r0, #0] │ │ - b.n b40c2 │ │ + b.n b40d2 │ │ movs r1, r0 │ │ - b.n b4208 │ │ + b.n b4218 │ │ movs r0, r0 │ │ - b.n b3fac │ │ + b.n b3fbc │ │ lsls r5, r7, #1 │ │ subs r0, r0, r0 │ │ lsls r7, r7, #3 │ │ - b.n b4434 │ │ + b.n b4444 │ │ lsls r1, r0, #2 │ │ ldr r2, [sp, #0] │ │ lsrs r1, r0, #32 │ │ - b.n b443c │ │ + b.n b444c │ │ lsls r5, r0, #2 │ │ ldrh r0, [r0, #16] │ │ lsls r0, r5, #3 │ │ - b.n b38d2 │ │ + b.n b38e2 │ │ ands r2, r0 │ │ - b.n b40e6 │ │ + b.n b40f6 │ │ movs r4, #32 │ │ - b.n b40ea │ │ + b.n b40fa │ │ movs r2, r0 │ │ - b.n b4452 │ │ + b.n b4462 │ │ lsls r6, r0, #2 │ │ ldr r2, [sp, #0] │ │ movs r0, #236 @ 0xec │ │ - b.n b38e6 │ │ + b.n b38f6 │ │ lsls r7, r7, #17 │ │ - b.n b445e │ │ + b.n b446e │ │ lsls r1, r1, #2 │ │ ldrh r0, [r0, #16] │ │ strb r0, [r6, #3] │ │ - b.n b38f2 │ │ + b.n b3902 │ │ movs r0, r0 │ │ - b.n b4074 │ │ + b.n b4084 │ │ lsls r4, r1, #2 │ │ subs r2, #0 │ │ movs r2, r0 │ │ - b.n b407c │ │ + b.n b408c │ │ lsls r0, r2, #2 │ │ ldrh r0, [r0, #16] │ │ movs r1, r1 │ │ - b.n b4116 │ │ + b.n b4126 │ │ adds r0, #0 │ │ - b.n b38f4 │ │ - strh r4, [r4, #42] @ 0x2a │ │ - @ instruction: 0xfa000103 │ │ - b.n b43e4 │ │ + b.n b3904 │ │ + strh r4, [r2, #40] @ 0x28 │ │ + mla r1, r0, r3, r0 │ │ + b.n b43f4 │ │ strb r1, [r1, #0] │ │ - b.n b4126 │ │ + b.n b4136 │ │ lsrs r4, r1, #29 │ │ - b.n b4486 │ │ - add r0, pc, #368 @ (adr r0, b3f5c ) │ │ - b.n b399e │ │ + b.n b4496 │ │ + add r0, pc, #368 @ (adr r0, b3f6c ) │ │ + b.n b39ae │ │ movs r4, r2 │ │ - b.n b3940 │ │ + b.n b3950 │ │ lsrs r5, r7, #22 │ │ - b.n b4408 │ │ + b.n b4418 │ │ lsrs r5, r4, #5 │ │ - b.n b4484 │ │ + b.n b4494 │ │ adds r0, #8 │ │ - b.n b453e │ │ + b.n b454e │ │ movs r4, r0 │ │ - b.n b3910 │ │ + b.n b3920 │ │ ands r4, r0 │ │ - b.n b3814 │ │ + b.n b3824 │ │ lsrs r0, r3, #27 │ │ - b.n b419a │ │ + b.n b41aa │ │ movs r0, #244 @ 0xf4 │ │ - b.n b393e │ │ + b.n b394e │ │ ldrh r1, [r6, r0] │ │ - b.n b4152 │ │ + b.n b4162 │ │ ands r0, r1 │ │ - b.n b3930 │ │ - ldr r2, [pc, #192] @ (b3ed8 ) │ │ - b.n b415a │ │ + b.n b3940 │ │ + ldr r2, [pc, #192] @ (b3ee8 ) │ │ + b.n b416a │ │ adds r0, #186 @ 0xba │ │ - b.n b40ac │ │ + b.n b40bc │ │ lsrs r2, r6, #8 │ │ - b.n b4162 │ │ + b.n b4172 │ │ rors r0, r7 │ │ - b.n b41b4 │ │ - ldmia r3!, {r1, r5} │ │ + b.n b41c4 │ │ + ldmia r3!, {r0, r5} │ │ @ instruction: 0xebff6000 │ │ - b.n b416e │ │ + b.n b417e │ │ lsls r0, r7, #3 │ │ - b.n b3962 │ │ + b.n b3972 │ │ str r4, [r6, #24] │ │ - b.n b41c4 │ │ + b.n b41d4 │ │ lsrs r0, r6, #8 │ │ - b.n b417a │ │ - ldmia r3, {r0, r2, r3, r4} │ │ + b.n b418a │ │ + ldmia r3, {r2, r3, r4} │ │ @ instruction: 0xebff20f0 │ │ - b.n b3972 │ │ + b.n b3982 │ │ asrs r3, r0, #32 │ │ - b.n b4586 │ │ + b.n b4596 │ │ movs r4, r0 │ │ - b.n b3964 │ │ + b.n b3974 │ │ movs r2, r0 │ │ - b.n b44f6 │ │ + b.n b4506 │ │ lsls r6, r6, #6 │ │ - b.n b41e0 │ │ + b.n b41f0 │ │ lsrs r2, r6, #8 │ │ - b.n b4196 │ │ + b.n b41a6 │ │ lsls r0, r6, #11 │ │ - b.n b41e8 │ │ + b.n b41f8 │ │ lsls r3, r6, #1 │ │ ldr r2, [sp, #0] │ │ lsls r6, r0, #4 │ │ - b.n b450c │ │ + b.n b451c │ │ lsls r7, r6, #1 │ │ cmp r2, #0 │ │ movs r4, r0 │ │ - b.n b410a │ │ + b.n b411a │ │ lsls r3, r7, #1 │ │ subs r2, #0 │ │ movs r5, r0 │ │ - b.n b4112 │ │ + b.n b4122 │ │ lsls r7, r7, #1 │ │ ldrh r0, [r0, #16] │ │ movs r1, r0 │ │ - b.n b448a │ │ + b.n b449a │ │ asrs r0, r0, #32 │ │ - b.n b3e8a │ │ + b.n b3e9a │ │ movs r0, r0 │ │ - b.n b4124 │ │ + b.n b4134 │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ lsrs r7, r7, #31 │ │ - b.n b44a8 │ │ + b.n b44b8 │ │ movs r0, r0 │ │ - b.n b413a │ │ + b.n b414a │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ lsls r6, r2, #3 │ │ - b.n b3e6a │ │ + b.n b3e7a │ │ asrs r6, r4, #24 │ │ - b.n b41da │ │ + b.n b41ea │ │ movs r1, r0 │ │ - b.n b439e │ │ + b.n b43ae │ │ cmp r1, #2 │ │ - b.n b45e2 │ │ + b.n b45f2 │ │ lsls r0, r2, #4 │ │ - b.n b3faa │ │ + b.n b3fba │ │ movs r2, r0 │ │ and.w r0, r0, r6 │ │ - b.n b41ee │ │ + b.n b41fe │ │ movs r0, r0 │ │ and.w r8, r0, r1 │ │ - b.n b45f6 │ │ - ldmia r2, {r1, r2, r3, r4, r5, r6, r7} │ │ + b.n b4606 │ │ + ldmia r2, {r0, r2, r3, r4, r5, r6, r7} │ │ @ instruction: 0xebff0000 │ │ - b.n b416a │ │ + b.n b417a │ │ lsls r2, r6, #1 │ │ subs r0, r0, r0 │ │ str r4, [r0, r0] │ │ - b.n b3a00 │ │ + b.n b3a10 │ │ movs r1, r0 │ │ - b.n b44da │ │ + b.n b44ea │ │ asrs r0, r0, #32 │ │ - b.n b3ed8 │ │ + b.n b3ee8 │ │ movs r0, r0 │ │ - b.n b4174 │ │ + b.n b4184 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ ands r0, r1 │ │ - b.n b3a14 │ │ + b.n b3a24 │ │ lsrs r7, r7, #31 │ │ - b.n b44fc │ │ + b.n b450c │ │ movs r0, r0 │ │ - b.n b418c │ │ + b.n b419c │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ lsls r5, r2, #3 │ │ - b.n b3ebe │ │ + b.n b3ece │ │ asrs r5, r4, #24 │ │ - b.n b422e │ │ + b.n b423e │ │ movs r1, r0 │ │ - b.n b43f2 │ │ + b.n b4402 │ │ cmp r1, #2 │ │ - b.n b4636 │ │ + b.n b4646 │ │ lsls r0, r2, #4 │ │ - b.n b3ffe │ │ + b.n b400e │ │ movs r3, r0 │ │ and.w r0, r0, r5 │ │ - b.n b4242 │ │ + b.n b4252 │ │ ands r0, r1 │ │ - b.n b3a40 │ │ + b.n b3a50 │ │ movs r0, r0 │ │ and.w r8, r0, r1 │ │ - b.n b464e │ │ - ldmia r2!, {r3, r5, r6, r7} │ │ + b.n b465e │ │ + ldmia r2, {r0, r1, r2, r5, r6, r7} │ │ @ instruction: 0xebff0000 │ │ - b.n b41c0 │ │ + b.n b41d0 │ │ lsls r2, r4, #1 │ │ subs r0, r0, r0 │ │ lsls r4, r3, #6 │ │ - b.n b3a5c │ │ + b.n b3a6c │ │ asrs r0, r0, #32 │ │ - b.n b46e2 │ │ + b.n b46f2 │ │ movs r0, #8 │ │ - b.n b3a56 │ │ + b.n b3a66 │ │ adds r0, #8 │ │ - b.n b466a │ │ + b.n b467a │ │ movs r0, r0 │ │ - b.n b404c │ │ + b.n b405c │ │ movs r0, #64 @ 0x40 │ │ - b.n b3a44 │ │ + b.n b3a54 │ │ asrs r4, r6, #1 │ │ - b.n b3a48 │ │ + b.n b3a58 │ │ lsls r0, r0, #1 │ │ - b.n b443a │ │ + b.n b444a │ │ adds r3, #188 @ 0xbc │ │ - b.n b42d0 │ │ + b.n b42e0 │ │ asrs r4, r0, #1 │ │ - b.n b3a54 │ │ + b.n b3a64 │ │ movs r0, #0 │ │ - b.n b3a80 │ │ + b.n b3a90 │ │ cmp r2, #239 @ 0xef │ │ orn r0, r0, #6291456 @ 0x600000 │ │ - b.n b445c │ │ + b.n b446c │ │ lsrs r7, r1, #10 │ │ orn r0, r2, #528384 @ 0x81000 │ │ - b.n b447e │ │ + b.n b448e │ │ cmp r2, #141 @ 0x8d │ │ orr.w sl, r0, #4685824 @ 0x478000 │ │ orr.w r0, r0, #8388608 @ 0x800000 │ │ - b.n b46a2 │ │ + b.n b46b2 │ │ adds r0, #0 │ │ - b.n b44a6 │ │ + b.n b44b6 │ │ lsls r0, r0, #3 │ │ - b.n b447c │ │ + b.n b448c │ │ asrs r4, r7, #2 │ │ - b.n b3a80 │ │ + b.n b3a90 │ │ movs r1, #252 @ 0xfc │ │ - b.n b4304 │ │ + b.n b4314 │ │ movs r6, r1 │ │ stmia.w r0, {r3} │ │ - b.n b3aaa │ │ + b.n b3aba │ │ movs r1, r1 │ │ - b.n b407e │ │ - beq.n b3fb8 │ │ - b.n b4418 │ │ + b.n b408e │ │ + beq.n b3fc8 │ │ + b.n b4428 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r4, r5, r8} │ │ - b.n b3ac8 │ │ + b.n b3ad8 │ │ movs r1, #45 @ 0x2d │ │ - b.n b458e │ │ + b.n b459e │ │ asrs r0, r6, #4 │ │ - b.n b3ad0 │ │ + b.n b3ae0 │ │ movs r0, r0 │ │ - b.n b40b4 │ │ + b.n b40c4 │ │ asrs r1, r0, #32 │ │ - b.n b40b8 │ │ - ldr r3, [sp, #600] @ 0x258 │ │ + b.n b40c8 │ │ + ldr r3, [sp, #596] @ 0x254 │ │ @ instruction: 0xebff0124 │ │ - b.n b3ae0 │ │ + b.n b3af0 │ │ movs r1, #46 @ 0x2e │ │ - b.n b45a6 │ │ + b.n b45b6 │ │ asrs r0, r4, #4 │ │ - b.n b3ae8 │ │ + b.n b3af8 │ │ movs r0, r0 │ │ - b.n b40cc │ │ + b.n b40dc │ │ asrs r1, r0, #32 │ │ - b.n b40d0 │ │ - ldr r3, [sp, #576] @ 0x240 │ │ + b.n b40e0 │ │ + ldr r3, [sp, #572] @ 0x23c │ │ @ instruction: 0xebff0114 │ │ - b.n b3af8 │ │ + b.n b3b08 │ │ movs r1, #47 @ 0x2f │ │ - b.n b45be │ │ + b.n b45ce │ │ asrs r0, r2, #4 │ │ - b.n b3b00 │ │ + b.n b3b10 │ │ movs r0, r0 │ │ - b.n b40e4 │ │ + b.n b40f4 │ │ asrs r1, r0, #32 │ │ - b.n b40e8 │ │ - ldr r3, [sp, #552] @ 0x228 │ │ + b.n b40f8 │ │ + ldr r3, [sp, #548] @ 0x224 │ │ @ instruction: 0xebff0104 │ │ - b.n b3b10 │ │ + b.n b3b20 │ │ cmp r6, #19 │ │ - b.n b4716 │ │ + b.n b4726 │ │ asrs r0, r0, #4 │ │ - b.n b3b18 │ │ + b.n b3b28 │ │ movs r0, r0 │ │ - b.n b40fc │ │ + b.n b410c │ │ asrs r1, r0, #32 │ │ - b.n b4100 │ │ - ldr r3, [sp, #528] @ 0x210 │ │ + b.n b4110 │ │ + ldr r3, [sp, #524] @ 0x20c │ │ @ instruction: 0xebff00f4 │ │ - b.n b3b28 │ │ + b.n b3b38 │ │ movs r1, #49 @ 0x31 │ │ - b.n b45ee │ │ + b.n b45fe │ │ asrs r0, r6, #3 │ │ - b.n b3b30 │ │ + b.n b3b40 │ │ movs r0, r0 │ │ - b.n b4114 │ │ + b.n b4124 │ │ asrs r1, r0, #32 │ │ - b.n b4118 │ │ - ldr r3, [sp, #504] @ 0x1f8 │ │ + b.n b4128 │ │ + ldr r3, [sp, #500] @ 0x1f4 │ │ @ instruction: 0xebff00e4 │ │ - b.n b3b40 │ │ + b.n b3b50 │ │ movs r1, #50 @ 0x32 │ │ - b.n b4606 │ │ + b.n b4616 │ │ asrs r0, r4, #3 │ │ - b.n b3b48 │ │ + b.n b3b58 │ │ movs r0, r0 │ │ - b.n b412c │ │ + b.n b413c │ │ asrs r1, r0, #32 │ │ - b.n b4130 │ │ - ldr r3, [sp, #480] @ 0x1e0 │ │ + b.n b4140 │ │ + ldr r3, [sp, #476] @ 0x1dc │ │ @ instruction: 0xebff00d4 │ │ - b.n b3b58 │ │ + b.n b3b68 │ │ movs r1, #51 @ 0x33 │ │ - b.n b461e │ │ + b.n b462e │ │ asrs r0, r2, #3 │ │ - b.n b3b60 │ │ + b.n b3b70 │ │ movs r0, r0 │ │ - b.n b4144 │ │ + b.n b4154 │ │ asrs r1, r0, #32 │ │ - b.n b4148 │ │ - ldr r3, [sp, #456] @ 0x1c8 │ │ + b.n b4158 │ │ + ldr r3, [sp, #452] @ 0x1c4 │ │ @ instruction: 0xebff00c4 │ │ - b.n b3b70 │ │ + b.n b3b80 │ │ movs r1, #66 @ 0x42 │ │ - b.n b4636 │ │ + b.n b4646 │ │ asrs r0, r0, #3 │ │ - b.n b3b78 │ │ + b.n b3b88 │ │ movs r0, r0 │ │ - b.n b415c │ │ + b.n b416c │ │ asrs r1, r0, #32 │ │ - b.n b4160 │ │ - ldr r3, [sp, #432] @ 0x1b0 │ │ + b.n b4170 │ │ + ldr r3, [sp, #428] @ 0x1ac │ │ @ instruction: 0xebff00b4 │ │ - b.n b3b88 │ │ + b.n b3b98 │ │ movs r1, #67 @ 0x43 │ │ - b.n b464e │ │ + b.n b465e │ │ asrs r0, r6, #2 │ │ - b.n b3b90 │ │ + b.n b3ba0 │ │ movs r0, r0 │ │ - b.n b4174 │ │ + b.n b4184 │ │ asrs r1, r0, #32 │ │ - b.n b4178 │ │ - ldr r3, [sp, #408] @ 0x198 │ │ + b.n b4188 │ │ + ldr r3, [sp, #404] @ 0x194 │ │ @ instruction: 0xebff00a4 │ │ - b.n b3ba0 │ │ + b.n b3bb0 │ │ cmp r7, #81 @ 0x51 │ │ - b.n b47a6 │ │ + b.n b47b6 │ │ asrs r0, r4, #2 │ │ - b.n b3ba8 │ │ + b.n b3bb8 │ │ movs r0, r0 │ │ - b.n b418c │ │ + b.n b419c │ │ asrs r1, r0, #32 │ │ - b.n b4190 │ │ - ldr r3, [sp, #384] @ 0x180 │ │ + b.n b41a0 │ │ + ldr r3, [sp, #380] @ 0x17c │ │ @ instruction: 0xebff0094 │ │ - b.n b3bb8 │ │ + b.n b3bc8 │ │ movs r1, #69 @ 0x45 │ │ - b.n b467e │ │ + b.n b468e │ │ asrs r0, r2, #2 │ │ - b.n b3bc0 │ │ + b.n b3bd0 │ │ movs r0, r0 │ │ - b.n b41a4 │ │ + b.n b41b4 │ │ asrs r1, r0, #32 │ │ - b.n b41a8 │ │ - ldr r3, [sp, #360] @ 0x168 │ │ + b.n b41b8 │ │ + ldr r3, [sp, #356] @ 0x164 │ │ @ instruction: 0xebff0084 │ │ - b.n b3bd0 │ │ + b.n b3be0 │ │ cmp r7, #82 @ 0x52 │ │ - b.n b47d6 │ │ + b.n b47e6 │ │ asrs r0, r0, #2 │ │ - b.n b3bd8 │ │ + b.n b3be8 │ │ movs r0, r0 │ │ - b.n b41bc │ │ + b.n b41cc │ │ asrs r1, r0, #32 │ │ - b.n b41c0 │ │ - ldr r3, [sp, #336] @ 0x150 │ │ + b.n b41d0 │ │ + ldr r3, [sp, #332] @ 0x14c │ │ @ instruction: 0xebff0074 │ │ - b.n b3be8 │ │ + b.n b3bf8 │ │ movs r1, #73 @ 0x49 │ │ - b.n b46ae │ │ + b.n b46be │ │ asrs r0, r6, #1 │ │ - b.n b3bf0 │ │ + b.n b3c00 │ │ movs r0, r0 │ │ - b.n b41d4 │ │ + b.n b41e4 │ │ asrs r1, r0, #32 │ │ - b.n b41d8 │ │ - ldr r3, [sp, #312] @ 0x138 │ │ - @ instruction: 0xebffa920 │ │ + b.n b41e8 │ │ + ldr r3, [sp, #308] @ 0x134 │ │ + @ instruction: 0xebffa930 │ │ movs r2, r0 │ │ - strh r2, [r4, r6] │ │ - @ instruction: 0xfff57e88 │ │ - @ instruction: 0xfff55fbf │ │ - vcvt.f32.u32 , q8, #11 │ │ - vrsubhn.i d25, , │ │ - vcvt.f32.u32 , q4, #11 │ │ - vqdmulh.s q11, , d3[0] │ │ - vqrdmlah.s , , d0[0] │ │ - @ instruction: 0xfff5bb36 │ │ - @ instruction: 0xfff57e28 │ │ - vceq.i16 d23, d8, #0 │ │ - vcvt.f32.u32 d23, d0, #11 │ │ - @ instruction: 0xfff5af07 │ │ - @ instruction: 0xfff57df8 │ │ - vtbl.8 d27, {d21-d24}, d9 │ │ - vqrdmulh.s , , d16[0] │ │ - vrshr.u64 , , #11 │ │ - vqrdmulh.s , , d8[0] │ │ - vneg.f16 q13, │ │ - @ instruction: 0xfff57db0 │ │ - vcle.s16 d27, d14, #0 │ │ - @ instruction: 0xfff57d98 │ │ - vtbx.8 d20, {d21-d22}, d13 │ │ - @ instruction: 0xfff57d80 │ │ - vcvt.u16.f16 , , #11 │ │ - vqrdmulh.s , , d24[0] │ │ + strh r3, [r2, r7] │ │ + vqrdmlah.s , , d10[0] │ │ + vshr.u64 d22, d4, #11 │ │ + vcvt.f32.u32 d23, d18, #11 │ │ + vabs.f16 , q7 │ │ + vcvt.f32.u32 d23, d10, #11 │ │ + @ instruction: 0xfff56bf2 │ │ + @ instruction: 0xfff57e02 │ │ + @ instruction: 0xfff5bb76 │ │ + vqrdmulh.s , , d26[0] │ │ + vcgt.s16 , , #0 │ │ + @ instruction: 0xfff57dd2 │ │ + vcge.s16 d27, d6, #0 │ │ + @ instruction: 0xfff57dba │ │ + vtbx.8 d27, {d21-d24}, d9 │ │ + @ instruction: 0xfff57da2 │ │ + vabs.s16 d21, d24 │ │ + @ instruction: 0xfff57d8a │ │ + @ instruction: 0xfff5a996 │ │ + vcvt.u16.f16 , q9, #11 │ │ + vrshr.u64 d27, d20, #11 │ │ + vcvt.u16.f16 , q5, #11 │ │ + vtbl.8 d20, {d5-d6}, d8 │ │ + vqrdmulh.s , , d2[0] │ │ + vcvt.u16.f16 d23, d25, #11 │ │ + @ instruction: 0xfff57d2a │ │ @ instruction: 0xfff548f0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n b464c │ │ - beq.n b4044 │ │ - b.n b45d0 │ │ + b.n b465c │ │ + beq.n b4054 │ │ + b.n b45e0 │ │ str r1, [r0, r0] │ │ - b.n b447a │ │ + b.n b448a │ │ adds r2, r0, r4 │ │ - b.n b487e │ │ + b.n b488e │ │ str r2, [sp, #156] @ 0x9c │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n b4886 │ │ + b.n b4896 │ │ movs r1, r0 │ │ - b.n b482a │ │ + b.n b483a │ │ movs r6, r1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r6, #32 │ │ - b.n b466c │ │ + b.n b467c │ │ str r0, [r0, #0] │ │ - b.n b4496 │ │ + b.n b44a6 │ │ str r2, [sp, #980] @ 0x3d4 │ │ add.w r0, r0, r0 │ │ - b.n b47fe │ │ + b.n b480e │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ movs r0, r6 │ │ - b.n b3ca0 │ │ + b.n b3cb0 │ │ subs r0, r4, #6 │ │ - b.n b477c │ │ + b.n b478c │ │ movs r1, r0 │ │ - b.n b440e │ │ + b.n b441e │ │ movs r3, r1 │ │ lsrs r0, r0, #8 │ │ adds r4, r2, r6 │ │ - b.n b4778 │ │ + b.n b4788 │ │ asrs r2, r0, #4 │ │ - b.n b47fa │ │ + b.n b480a │ │ movs r1, r0 │ │ - b.n b441e │ │ + b.n b442e │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ movs r6, r0 │ │ - b.n b44c6 │ │ + b.n b44d6 │ │ str r2, [sp, #20] │ │ add.w r0, r0, r4 │ │ - b.n b44ce │ │ - beq.n b41b0 │ │ - b.n b4628 │ │ + b.n b44de │ │ + beq.n b41c0 │ │ + b.n b4638 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r3, r5, r7} │ │ add.w r0, r0, r0 │ │ - b.n b483e │ │ + b.n b484e │ │ @ instruction: 0xfff70aff │ │ asrs r6, r0, #32 │ │ - b.n b46c0 │ │ + b.n b46d0 │ │ movs r6, r0 │ │ - b.n b44ea │ │ + b.n b44fa │ │ movs r0, #42 @ 0x2a │ │ - b.n b48ee │ │ + b.n b48fe │ │ str r1, [sp, #844] @ 0x34c │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n b44f6 │ │ + b.n b4506 │ │ movs r6, r0 │ │ - b.n b44fa │ │ + b.n b450a │ │ str r1, [sp, #992] @ 0x3e0 │ │ add.w r0, r0, r0 │ │ - b.n b4870 │ │ + b.n b4880 │ │ @ instruction: 0xfff0daff │ │ asrs r6, r0, #32 │ │ - b.n b46e4 │ │ + b.n b46f4 │ │ movs r5, r0 │ │ - b.n b450e │ │ + b.n b451e │ │ movs r0, #7 │ │ - b.n b4512 │ │ + b.n b4522 │ │ lsls r0, r1, #3 │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n b451a │ │ + b.n b452a │ │ @ instruction: 0xffeaeaff │ │ - ldr r7, [pc, #960] @ (b45a0 ) │ │ + ldr r7, [pc, #960] @ (b45b0 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n b4700 │ │ - beq.n b41f0 │ │ - b.n b4684 │ │ + b.n b4710 │ │ + beq.n b4200 │ │ + b.n b4694 │ │ ands r0, r0 │ │ - b.n b452e │ │ - add r0, pc, #0 @ (adr r0, b41f0 ) │ │ - b.n b4532 │ │ + b.n b453e │ │ + add r0, pc, #0 @ (adr r0, b4200 ) │ │ + b.n b4542 │ │ subs r1, #237 @ 0xed │ │ - b.n b4802 │ │ + b.n b4812 │ │ movs r0, r1 │ │ - b.n b3d62 │ │ + b.n b3d72 │ │ subs r1, #204 @ 0xcc │ │ - b.n b488e │ │ + b.n b489e │ │ str r4, [r1, #0] │ │ - b.n b3d36 │ │ + b.n b3d46 │ │ movs r3, r0 │ │ - b.n b4326 │ │ + b.n b4336 │ │ subs r6, #219 @ 0xdb │ │ - b.n b4810 │ │ + b.n b4820 │ │ adds r0, #229 @ 0xe5 │ │ - b.n b488e │ │ + b.n b489e │ │ strh r0, [r2, #6] │ │ - b.n b45a6 │ │ + b.n b45b6 │ │ adds r0, #3 │ │ - b.n b4362 │ │ + b.n b4372 │ │ movs r0, r0 │ │ - b.n b3d22 │ │ + b.n b3d32 │ │ strb r1, [r5, r3] │ │ - b.n b42ae │ │ + b.n b42be │ │ movs r0, r0 │ │ - b.n b48c6 │ │ + b.n b48d6 │ │ ldr r3, [r4, #44] @ 0x2c │ │ - b.n b4326 │ │ + b.n b4336 │ │ lsrs r0, r4, #1 │ │ - b.n b427c │ │ + b.n b428c │ │ strh r3, [r0, #0] │ │ - b.n b4338 │ │ + b.n b4348 │ │ str r0, [sp, #20] │ │ - b.n b4332 │ │ + b.n b4342 │ │ adds r0, #12 │ │ - b.n b3d4a │ │ + b.n b3d5a │ │ movs r5, r4 │ │ lsrs r0, r0, #8 │ │ ldmia r2, {r0, r1, r2, r3, r5} │ │ - b.n b4840 │ │ + b.n b4850 │ │ stmia r0!, {r0, r1, r2, r3, r4, r6, r7} │ │ - b.n b48c2 │ │ + b.n b48d2 │ │ subs r0, #104 @ 0x68 │ │ - b.n b4292 │ │ + b.n b42a2 │ │ lsls r6, r4, #19 │ │ - b.n b42ca │ │ + b.n b42da │ │ str r0, [r0, #0] │ │ - b.n b4354 │ │ + b.n b4364 │ │ ldrh r1, [r5, r3] │ │ - b.n b4362 │ │ + b.n b4372 │ │ movs r0, r0 │ │ - b.n b4368 │ │ + b.n b4378 │ │ movs r0, r5 │ │ stmia.w sl, {r2, sp, lr, pc} │ │ - b.n b459e │ │ + b.n b45ae │ │ movs r0, r1 │ │ - b.n b3d76 │ │ + b.n b3d86 │ │ lsls r1, r3, #21 │ │ - b.n b487a │ │ + b.n b488a │ │ str r4, [r1, #0] │ │ - b.n b3d7e │ │ + b.n b3d8e │ │ lsrs r3, r2, #26 │ │ - b.n b4902 │ │ + b.n b4912 │ │ str r1, [r0, #0] │ │ - b.n b3c14 │ │ + b.n b3c24 │ │ adds r4, #229 @ 0xe5 │ │ - b.n b42fc │ │ + b.n b430c │ │ strh r0, [r2, #6] │ │ - b.n b4602 │ │ + b.n b4612 │ │ lsls r6, r2, #2 │ │ - b.n b438c │ │ + b.n b439c │ │ ands r0, r1 │ │ - b.n b42c2 │ │ + b.n b42d2 │ │ lsrs r4, r4, #1 │ │ - b.n b42d0 │ │ + b.n b42e0 │ │ movs r0, r0 │ │ - b.n b3d9e │ │ + b.n b3dae │ │ str r3, [r0, r0] │ │ - b.n b438e │ │ + b.n b439e │ │ str r4, [r1, r0] │ │ - b.n b3da6 │ │ + b.n b3db6 │ │ ldrb r1, [r5, r5] │ │ - b.n b48a0 │ │ + b.n b48b0 │ │ str r5, [r5, r2] │ │ - b.n b491a │ │ + b.n b492a │ │ strb r6, [r2, #22] │ │ - b.n b42e8 │ │ + b.n b42f8 │ │ str r1, [r1, r0] │ │ - b.n b42ec │ │ + b.n b42fc │ │ adds r0, #5 │ │ - b.n b43ac │ │ + b.n b43bc │ │ adds r0, #8 │ │ - b.n b3dbe │ │ + b.n b3dce │ │ strh r0, [r0, #0] │ │ - b.n b3dea │ │ + b.n b3dfa │ │ ldr r5, [r4, #44] @ 0x2c │ │ - b.n b43ba │ │ + b.n b43ca │ │ adds r0, #4 │ │ - b.n b3df2 │ │ + b.n b3e02 │ │ ands r6, r1 │ │ - b.n b45fa │ │ + b.n b460a │ │ strh r4, [r1, #0] │ │ - b.n b43ee │ │ + b.n b43fe │ │ str r4, [r0, #0] │ │ - b.n b3dd6 │ │ + b.n b3de6 │ │ str r0, [sp, #0] │ │ - b.n b480c │ │ + b.n b481c │ │ movs r0, #1 │ │ - b.n b476e │ │ + b.n b477e │ │ strh r0, [r6, #6] │ │ - b.n b4656 │ │ + b.n b4666 │ │ @ instruction: 0xffdb1aff │ │ lsls r6, r4, #19 │ │ - b.n b4356 │ │ + b.n b4366 │ │ ldrb r0, [r5, #1] │ │ - b.n b4326 │ │ + b.n b4336 │ │ ldrh r1, [r5, #22] │ │ - b.n b43ee │ │ + b.n b43fe │ │ adds r0, #0 │ │ - b.n b43f0 │ │ + b.n b4400 │ │ movs r0, #0 │ │ - b.n b43f8 │ │ + b.n b4408 │ │ movs r7, r0 │ │ - b.n b462a │ │ + b.n b463a │ │ movs r0, #248 @ 0xf8 │ │ - b.n b4682 │ │ + b.n b4692 │ │ asrs r0, r1, #32 │ │ - b.n b4632 │ │ + b.n b4642 │ │ movs r0, #61 @ 0x3d │ │ - b.n b4a36 │ │ + b.n b4a46 │ │ adds r0, #0 │ │ - b.n b4a3a │ │ + b.n b4a4a │ │ str r0, [r0, r0] │ │ - b.n b3e26 │ │ - strh r3, [r6, #32] │ │ + b.n b3e36 │ │ + strh r2, [r6, #32] │ │ @ instruction: 0xfa00001f │ │ - b.n b47ca │ │ + b.n b47da │ │ asrs r4, r0, #32 │ │ - b.n b3e32 │ │ + b.n b3e42 │ │ stmia r0!, {r0} │ │ - b.n b4812 │ │ - b.n b434e │ │ - b.n b47b6 │ │ + b.n b4822 │ │ + b.n b435e │ │ + b.n b47c6 │ │ movs r5, r6 │ │ - b.n b4656 │ │ + b.n b4666 │ │ movs r0, #63 @ 0x3f │ │ - b.n b475e │ │ + b.n b476e │ │ lsrs r1, r2, #16 │ │ - b.n b461e │ │ + b.n b462e │ │ lsrs r5, r2, #24 │ │ str r0, [r4, r6] │ │ adds r2, #49 @ 0x31 │ │ - b.n b4666 │ │ + b.n b4676 │ │ str r0, [r4, #0] │ │ - b.n b47ce │ │ + b.n b47de │ │ adds r0, #0 │ │ strh r0, [r0, r4] │ │ movs r3, r0 │ │ - b.n b4632 │ │ + b.n b4642 │ │ adds r2, #53 @ 0x35 │ │ - b.n b4676 │ │ + b.n b4686 │ │ movs r0, #32 │ │ - b.n b47fe │ │ + b.n b480e │ │ movs r0, r0 │ │ - b.n b49ea │ │ + b.n b49fa │ │ movs r2, #17 │ │ - b.n b4648 │ │ + b.n b4658 │ │ adds r4, #232 @ 0xe8 │ │ - b.n b43d4 │ │ + b.n b43e4 │ │ movs r6, #49 @ 0x31 │ │ str r0, [r4, r6] │ │ adds r5, r2, #0 │ │ - b.n b468e │ │ + b.n b469e │ │ movs r0, r0 │ │ - b.n b4a0e │ │ + b.n b4a1e │ │ asrs r0, r0, #32 │ │ strh r0, [r0, r4] │ │ asrs r2, r0, #32 │ │ - b.n b465c │ │ + b.n b466c │ │ cmp r2, #224 @ 0xe0 │ │ - b.n b4460 │ │ + b.n b4470 │ │ adds r1, r4, r1 │ │ - b.n b43b2 │ │ + b.n b43c2 │ │ str r2, [r4, #76] @ 0x4c │ │ - b.n b43e8 │ │ + b.n b43f8 │ │ asrs r3, r0, #32 │ │ - b.n b446c │ │ + b.n b447c │ │ adds r0, #0 │ │ - b.n b4474 │ │ + b.n b4484 │ │ strh r1, [r0, #0] │ │ - b.n b447e │ │ + b.n b448e │ │ lsrs r3, r4, #1 │ │ - b.n b43ba │ │ + b.n b43ca │ │ movs r0, #59 @ 0x3b │ │ - b.n b4aba │ │ + b.n b4aca │ │ str r0, [sp, #0] │ │ - b.n b448a │ │ + b.n b449a │ │ strh r0, [r7, #6] │ │ - b.n b4716 │ │ + b.n b4726 │ │ ldrh r1, [r4, #22] │ │ - b.n b448c │ │ + b.n b449c │ │ adds r0, #0 │ │ - b.n b4aca │ │ + b.n b4ada │ │ str r0, [sp, #0] │ │ - b.n b46ce │ │ + b.n b46de │ │ asrs r0, r1, #32 │ │ - b.n b46d2 │ │ - strh r6, [r1, #32] │ │ + b.n b46e2 │ │ + strh r5, [r1, #32] │ │ @ instruction: 0xfa0000d0 │ │ - b.n b4722 │ │ + b.n b4732 │ │ adds r0, #31 │ │ - b.n b4862 │ │ + b.n b4872 │ │ stmia r0!, {r0} │ │ - b.n b48a6 │ │ + b.n b48b6 │ │ str r7, [r3, r0] │ │ - b.n b484a │ │ + b.n b485a │ │ movs r0, #63 @ 0x3f │ │ - b.n b47ee │ │ + b.n b47fe │ │ adds r3, #48 @ 0x30 │ │ - b.n b46ee │ │ + b.n b46fe │ │ subs r4, #17 │ │ - b.n b46b8 │ │ + b.n b46c8 │ │ str r1, [r6, #32] │ │ - b.n b46f6 │ │ + b.n b4706 │ │ adds r5, #16 │ │ str r0, [r4, r6] │ │ strb r0, [r4, #0] │ │ - b.n b4862 │ │ + b.n b4872 │ │ str r0, [r0, #0] │ │ strh r0, [r0, r4] │ │ adds r0, #6 │ │ - b.n b46cc │ │ + b.n b46dc │ │ str r0, [r6, #32] │ │ - b.n b470a │ │ + b.n b471a │ │ movs r0, #32 │ │ - b.n b4892 │ │ + b.n b48a2 │ │ movs r0, r0 │ │ - b.n b4a80 │ │ + b.n b4a90 │ │ lsrs r0, r2, #16 │ │ - b.n b4716 │ │ + b.n b4726 │ │ movs r2, #17 │ │ - b.n b46e6 │ │ + b.n b46f6 │ │ movs r7, #49 @ 0x31 │ │ str r0, [r4, r6] │ │ movs r0, r0 │ │ - b.n b4a8c │ │ + b.n b4a9c │ │ movs r0, r0 │ │ strh r0, [r0, r4] │ │ strb r0, [r5, #19] │ │ - b.n b447c │ │ + b.n b448c │ │ movs r2, r0 │ │ - b.n b46ee │ │ + b.n b46fe │ │ subs r3, r4, r3 │ │ - b.n b44f2 │ │ + b.n b4502 │ │ adds r0, #3 │ │ - b.n b4504 │ │ + b.n b4514 │ │ lsrs r0, r4, #1 │ │ - b.n b444a │ │ + b.n b445a │ │ movs r4, #225 @ 0xe1 │ │ - b.n b447e │ │ + b.n b448e │ │ movs r7, r0 │ │ - b.n b4502 │ │ + b.n b4512 │ │ str r0, [r0, #0] │ │ - b.n b450a │ │ + b.n b451a │ │ adds r3, r4, r1 │ │ - b.n b444c │ │ + b.n b445c │ │ lsrs r0, r4, #11 │ │ - b.n b4514 │ │ + b.n b4524 │ │ movs r0, #1 │ │ - b.n b4516 │ │ + b.n b4526 │ │ ldrb r6, [r4, #1] │ │ - b.n b4456 │ │ + b.n b4466 │ │ strb r0, [r0, #0] │ │ - b.n b3f2e │ │ + b.n b3f3e │ │ lsls r0, r4, #19 │ │ - b.n b44a0 │ │ + b.n b44b0 │ │ subs r2, #226 @ 0xe2 │ │ - b.n b452e │ │ + b.n b453e │ │ asrs r0, r0, #32 │ │ - b.n b4534 │ │ + b.n b4544 │ │ movs r0, r0 │ │ - b.n b452e │ │ + b.n b453e │ │ adds r0, #4 │ │ - b.n b3f42 │ │ + b.n b3f52 │ │ movs r0, r1 │ │ - b.n b3f46 │ │ + b.n b3f56 │ │ asrs r4, r1, #32 │ │ - b.n b3f4a │ │ - beq.n b4470 │ │ - b.n b48d0 │ │ + b.n b3f5a │ │ + beq.n b4480 │ │ + b.n b48e0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, sl, fp, lr} │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n b4960 │ │ + b.n b4970 │ │ lsls r4, r3, #2 │ │ - b.n b3f88 │ │ + b.n b3f98 │ │ asrs r4, r3, #2 │ │ - b.n b3f8c │ │ + b.n b3f9c │ │ movs r0, r0 │ │ - b.n b4570 │ │ + b.n b4580 │ │ asrs r1, r0, #32 │ │ - b.n b4574 │ │ + b.n b4584 │ │ str r2, [sp, #228] @ 0xe4 │ │ add.w r0, r0, r0 │ │ - b.n b4afe │ │ + b.n b4b0e │ │ movs r2, r3 │ │ lsrs r0, r0, #8 │ │ ands r0, r0 │ │ - b.n b47a6 │ │ + b.n b47b6 │ │ str r2, [sp, #228] @ 0xe4 │ │ @ instruction: 0xeb008000 │ │ - b.n b4bae │ │ + b.n b4bbe │ │ movs r0, r0 │ │ - b.n b4b12 │ │ + b.n b4b22 │ │ movs r0, r3 │ │ lsrs r0, r0, #8 │ │ str r4, [r6, #4] │ │ - b.n b3fb8 │ │ + b.n b3fc8 │ │ str r0, [r0, r0] │ │ - b.n b47be │ │ + b.n b47ce │ │ strb r0, [r6, #1] │ │ - b.n b3fc0 │ │ + b.n b3fd0 │ │ str r6, [r0, #0] │ │ - b.n b45a4 │ │ + b.n b45b4 │ │ strb r7, [r0, #0] │ │ - b.n b45a8 │ │ + b.n b45b8 │ │ movs r0, r0 │ │ - b.n b3fb8 │ │ + b.n b3fc8 │ │ asrs r6, r0, #32 │ │ - b.n b47d2 │ │ + b.n b47e2 │ │ str r2, [sp, #200] @ 0xc8 │ │ add.w r0, r0, r0 │ │ - b.n b4b3a │ │ + b.n b4b4a │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n b3fcc │ │ + b.n b3fdc │ │ asrs r7, r0, #32 │ │ - b.n b47e6 │ │ + b.n b47f6 │ │ movs r0, #6 │ │ - b.n b4bea │ │ + b.n b4bfa │ │ str r2, [sp, #192] @ 0xc0 │ │ add.w r0, r0, r0 │ │ - b.n b4b52 │ │ + b.n b4b62 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n b47fa │ │ + b.n b480a │ │ str r2, [sp, #144] @ 0x90 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n b4802 │ │ + b.n b4812 │ │ movs r0, r0 │ │ - b.n b4b66 │ │ + b.n b4b76 │ │ @ instruction: 0xffef1aff │ │ movs r2, r0 │ │ @ instruction: 0xea008000 │ │ - b.n b4c12 │ │ + b.n b4c22 │ │ movs r2, r0 │ │ @ instruction: 0xea008001 │ │ - b.n b4c1a │ │ + b.n b4c2a │ │ movs r4, r0 │ │ - b.n b481e │ │ + b.n b482e │ │ str r2, [sp, #156] @ 0x9c │ │ add.w r0, r0, r8 │ │ - b.n b4826 │ │ + b.n b4836 │ │ ldrh r0, [r6, #46] @ 0x2e │ │ - ldmia.w sp!, {r2, r5, r9, ip, sp, pc} │ │ - vqshrun.s64 d25, , #11 │ │ - vcge.s16 d26, d9, #0 │ │ - vsra.u64 d25, d22, #11 │ │ + ldmia.w sp!, {r1, r3, r5, r7, r9, ip, sp, pc} │ │ + vqshrn.u64 d25, , #11 │ │ + vrshr.u32 q13, , #11 │ │ + vsubl.u , d21, d3 │ │ @ instruction: 0xfff54ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n b4a1c │ │ - beq.n b451c │ │ - b.n b49a0 │ │ + b.n b4a2c │ │ + beq.n b452c │ │ + b.n b49b0 │ │ adds r0, #2 │ │ - b.n b484a │ │ + b.n b485a │ │ movs r0, #0 │ │ - b.n b484e │ │ + b.n b485e │ │ movs r0, r4 │ │ - b.n b4bb8 │ │ + b.n b4bc8 │ │ movs r3, r5 │ │ subs r2, #0 │ │ stmia r0!, {r3} │ │ - b.n b4a1e │ │ - b.n b451c │ │ - b.n b4c5e │ │ - add r0, pc, #4 @ (adr r0, b4524 ) │ │ - b.n b4862 │ │ + b.n b4a2e │ │ + b.n b452c │ │ + b.n b4c6e │ │ + add r0, pc, #4 @ (adr r0, b4534 ) │ │ + b.n b4872 │ │ str r3, [r0, r0] │ │ - b.n b4866 │ │ + b.n b4876 │ │ asrs r4, r0, #32 │ │ - b.n b4044 │ │ + b.n b4054 │ │ adds r0, #8 │ │ - b.n b4048 │ │ + b.n b4058 │ │ str r1, [r0, #0] │ │ - b.n b3ee6 │ │ + b.n b3ef6 │ │ adds r0, #48 @ 0x30 │ │ - b.n b49c2 │ │ + b.n b49d2 │ │ lsls r3, r6, #1 │ │ - b.n b4318 │ │ + b.n b4328 │ │ movs r2, r1 │ │ - b.n b4bde │ │ + b.n b4bee │ │ movs r2, r1 │ │ subs r2, #0 │ │ lsls r1, r4, #1 │ │ - b.n b49d2 │ │ + b.n b49e2 │ │ lsls r0, r6, #1 │ │ - b.n b4328 │ │ + b.n b4338 │ │ movs r5, r0 │ │ - b.n b4bee │ │ + b.n b4bfe │ │ movs r1, r0 │ │ ldrh r0, [r0, #16] │ │ adds r0, #87 @ 0x57 │ │ - b.n b49e2 │ │ + b.n b49f2 │ │ movs r4, r0 │ │ and.w r0, r0, r1, lsl #1 │ │ - b.n b49ea │ │ + b.n b49fa │ │ lsls r0, r6, #1 │ │ - b.n b4340 │ │ + b.n b4350 │ │ movs r5, r0 │ │ - b.n b4c06 │ │ + b.n b4c16 │ │ movs r0, r2 │ │ ldrh r0, [r0, #16] │ │ adds r0, #55 @ 0x37 │ │ - b.n b49fa │ │ + b.n b4a0a │ │ lsls r1, r0, #8 │ │ ldmia.w ip, {r0, r3, r9, pc} │ │ - b.n b48b6 │ │ - b.n b4580 │ │ - b.n b4a96 │ │ + b.n b48c6 │ │ + b.n b4590 │ │ + b.n b4aa6 │ │ str r0, [r2, #12] │ │ - b.n b4902 │ │ + b.n b4912 │ │ asrs r2, r0, #32 │ │ - b.n b48c2 │ │ + b.n b48d2 │ │ tst r0, r0 │ │ - b.n b48c6 │ │ + b.n b48d6 │ │ lsrs r0, r4, #24 │ │ - b.n b489a │ │ - ldr r6, [pc, #156] @ (b4628 ) │ │ - b.n b4896 │ │ + b.n b48aa │ │ + ldr r6, [pc, #156] @ (b4638 ) │ │ + b.n b48a6 │ │ ands r0, r0 │ │ - b.n b40aa │ │ + b.n b40ba │ │ movs r4, r0 │ │ - b.n b40ae │ │ + b.n b40be │ │ lsls r7, r0, #8 │ │ - b.n b48da │ │ + b.n b48ea │ │ ldrb r6, [r4, #24] │ │ - b.n b489e │ │ + b.n b48ae │ │ lsrs r1, r5, #24 │ │ - b.n b45e8 │ │ + b.n b45f8 │ │ lsls r0, r6, #1 │ │ - b.n b4384 │ │ + b.n b4394 │ │ str r6, [r0, #32] │ │ - b.n b48aa │ │ + b.n b48ba │ │ str r0, [r6, #12] │ │ - b.n b4930 │ │ + b.n b4940 │ │ str r1, [r0, r0] │ │ - b.n b4a5c │ │ + b.n b4a6c │ │ @ instruction: 0xffdd1aff │ │ movs r1, r0 │ │ - b.n b4cfa │ │ + b.n b4d0a │ │ lsls r7, r7, #1 │ │ - b.n b4c7a │ │ + b.n b4c8a │ │ movs r2, r1 │ │ @ instruction: 0xe99d004d │ │ cmp r2, #0 │ │ movs r0, r2 │ │ - b.n b4c70 │ │ + b.n b4c80 │ │ lsls r5, r1, #1 │ │ subs r2, #0 │ │ lsls r1, r2, #1 │ │ subs r0, r0, r0 │ │ lsrs r7, r1, #8 │ │ orn r0, r1, #2129920 @ 0x208000 │ │ - b.n b491a │ │ + b.n b492a │ │ cmp r2, #207 @ 0xcf │ │ orn r8, r2, #7340032 @ 0x700000 │ │ - bls.w 166c44 │ │ + bls.w 166c54 │ │ mrrc 10, 12, r0, r0, cr15 @ │ │ - blx ffcf5c48 │ │ + blx ffcf5c58 │ │ mrrc 0, 0, r3, r2, cr14 │ │ - b.n b4642 │ │ + b.n b4652 │ │ str r5, [r2, #84] @ 0x54 │ │ - b.n b4c00 │ │ + b.n b4c10 │ │ str r5, [r2, #84] @ 0x54 │ │ - b.n b4c84 │ │ + b.n b4c94 │ │ strh r3, [r6, r4] │ │ - b.n b4c04 │ │ + b.n b4c14 │ │ strb r3, [r4, #2] │ │ - b.n b460e │ │ + b.n b461e │ │ strh r3, [r6, r4] │ │ - b.n b4c8c │ │ + b.n b4c9c │ │ adds r0, #7 │ │ - b.n b4690 │ │ - ldr r7, [pc, #60] @ (b4648 ) │ │ - b.n b4c0e │ │ + b.n b46a0 │ │ + ldr r7, [pc, #60] @ (b4658 ) │ │ + b.n b4c1e │ │ strb r5, [r0, #0] │ │ - b.n b4618 │ │ - ldr r7, [pc, #60] @ (b4650 ) │ │ - b.n b4c96 │ │ + b.n b4628 │ │ + ldr r7, [pc, #60] @ (b4660 ) │ │ + b.n b4ca6 │ │ adds r1, #35 @ 0x23 │ │ - b.n b4624 │ │ + b.n b4634 │ │ adds r0, #3 │ │ - b.n b472c │ │ + b.n b473c │ │ adds r2, #35 @ 0x23 │ │ - b.n b4728 │ │ + b.n b4738 │ │ strb r4, [r0, #0] │ │ - b.n b462c │ │ + b.n b463c │ │ adds r1, #1 │ │ - b.n b4c2a │ │ + b.n b4c3a │ │ adds r1, #1 │ │ - b.n b4cae │ │ + b.n b4cbe │ │ lsls r7, r2, #14 │ │ - b.n b464a │ │ + b.n b465a │ │ strb r2, [r0, #0] │ │ - b.n b4676 │ │ + b.n b4686 │ │ asrs r7, r4, #2 │ │ - b.n b4646 │ │ + b.n b4656 │ │ asrs r1, r0, #32 │ │ - b.n b46cc │ │ + b.n b46dc │ │ strb r5, [r0, #0] │ │ - b.n b4644 │ │ + b.n b4654 │ │ asrs r1, r4, #4 │ │ - b.n b4650 │ │ + b.n b4660 │ │ asrs r1, r0, #32 │ │ - b.n b4758 │ │ + b.n b4768 │ │ str r2, [sp, #132] @ 0x84 │ │ - b.n b4750 │ │ + b.n b4760 │ │ asrs r0, r4, #2 │ │ - b.n b465e │ │ + b.n b466e │ │ movs r1, r0 │ │ - b.n b46d6 │ │ + b.n b46e6 │ │ asrs r5, r0, #32 │ │ - b.n b465a │ │ + b.n b466a │ │ lsls r0, r4, #4 │ │ - b.n b4668 │ │ + b.n b4678 │ │ movs r0, r0 │ │ - b.n b4764 │ │ + b.n b4774 │ │ asrs r2, r4, #2 │ │ - b.n b4672 │ │ + b.n b4682 │ │ asrs r1, r0, #32 │ │ - b.n b46ee │ │ + b.n b46fe │ │ movs r0, #5 │ │ - b.n b4670 │ │ + b.n b4680 │ │ lsls r0, r4, #8 │ │ - b.n b4772 │ │ + b.n b4782 │ │ asrs r1, r4, #4 │ │ - b.n b4680 │ │ + b.n b4690 │ │ movs r4, r0 │ │ - b.n b467a │ │ + b.n b468a │ │ asrs r1, r0, #32 │ │ - b.n b4782 │ │ + b.n b4792 │ │ movs r0, #168 @ 0xa8 │ │ - b.n b468e │ │ + b.n b469e │ │ movs r0, #2 │ │ - b.n b4716 │ │ + b.n b4726 │ │ str r6, [r5, #8] │ │ - b.n b4696 │ │ + b.n b46a6 │ │ strb r5, [r0, #0] │ │ - b.n b4692 │ │ + b.n b46a2 │ │ asrs r1, r4, #8 │ │ - b.n b4794 │ │ + b.n b47a4 │ │ movs r1, #34 @ 0x22 │ │ - b.n b46a0 │ │ + b.n b46b0 │ │ asrs r4, r0, #32 │ │ - b.n b469c │ │ + b.n b46ac │ │ movs r0, #2 │ │ - b.n b47ac │ │ + b.n b47bc │ │ strb r6, [r0, #0] │ │ - b.n b473e │ │ + b.n b474e │ │ str r5, [r0, #0] │ │ - b.n b46b4 │ │ + b.n b46c4 │ │ lsls r1, r2, #14 │ │ - b.n b46ac │ │ + b.n b46bc │ │ strb r7, [r4, #4] │ │ - b.n b46b8 │ │ + b.n b46c8 │ │ strb r7, [r0, #0] │ │ - b.n b47be │ │ + b.n b47ce │ │ movs r2, #34 @ 0x22 │ │ - b.n b47ba │ │ + b.n b47ca │ │ movs r0, #4 │ │ - b.n b46be │ │ + b.n b46ce │ │ lsls r0, r2, #14 │ │ - b.n b46be │ │ + b.n b46ce │ │ strb r7, [r4, #8] │ │ - b.n b47d0 │ │ + b.n b47e0 │ │ strb r4, [r0, #0] │ │ - b.n b46d4 │ │ + b.n b46e4 │ │ lsls r2, r2, #14 │ │ - b.n b46ce │ │ + b.n b46de │ │ str r4, [r0, #0] │ │ - b.n b46e0 │ │ + b.n b46f0 │ │ lsls r7, r2, #14 │ │ - b.n b46e0 │ │ + b.n b46f0 │ │ lsls r6, r2, #14 │ │ - b.n b46dc │ │ + b.n b46ec │ │ cmp r4, #34 @ 0x22 │ │ - b.n b4a1a │ │ + b.n b4a2a │ │ cmp r4, #39 @ 0x27 │ │ - b.n b47e2 │ │ + b.n b47f2 │ │ adds r1, r4, #0 │ │ - b.n b47e6 │ │ + b.n b47f6 │ │ lsrs r0, r4, #16 │ │ - b.n b47e8 │ │ + b.n b47f8 │ │ lsrs r4, r5, #16 │ │ - b.n b47ea │ │ + b.n b47fa │ │ lsrs r3, r4, #16 │ │ - b.n b47ee │ │ + b.n b47fe │ │ lsrs r7, r0, #20 │ │ - b.n b4af2 │ │ + b.n b4b02 │ │ lsls r0, r0, #1 │ │ - b.n b4b76 │ │ + b.n b4b86 │ │ lsrs r0, r2, #28 │ │ - b.n b49d8 │ │ + b.n b49e8 │ │ lsls r0, r4, #10 │ │ - b.n b4a3e │ │ - beq.n b4738 │ │ - b.n b4b98 │ │ + b.n b4a4e │ │ + beq.n b4748 │ │ + b.n b4ba8 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1} │ │ - b.n b4a4a │ │ + b.n b4a5a │ │ movs r0, #3 │ │ - b.n b4a4e │ │ + b.n b4a5e │ │ mrc2 11, 5, lr, cr2, cr15, {7} @ │ │ movs r0, r0 │ │ - b.n b4e56 │ │ + b.n b4e66 │ │ @ instruction: 0xfff8eaff │ │ ands r2, r0 │ │ - b.n b4a5e │ │ + b.n b4a6e │ │ movs r2, r0 │ │ - b.n b4a62 │ │ + b.n b4a72 │ │ movs r0, #3 │ │ - b.n b4a66 │ │ + b.n b4a76 │ │ mcr2 11, 5, lr, cr12, cr15, {7} @ │ │ - b.n b472c │ │ - b.n b4256 │ │ + b.n b473c │ │ + b.n b4266 │ │ movs r4, r1 │ │ - b.n b425a │ │ + b.n b426a │ │ lsls r4, r0, #4 │ │ @ instruction: 0xe994ffac │ │ @ instruction: 0xeaff4c10 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n b4c5c │ │ - beq.n b4764 │ │ - b.n b4be0 │ │ + b.n b4c6c │ │ + beq.n b4774 │ │ + b.n b4bf0 │ │ ands r0, r0 │ │ - b.n b4a8a │ │ + b.n b4a9a │ │ str r0, [sp, #528] @ 0x210 │ │ add.w r8, r0, r1 │ │ - b.n b4df2 │ │ + b.n b4e02 │ │ movs r3, r0 │ │ add r2, sp, #0 │ │ movs r4, r0 │ │ - b.n b4a9a │ │ - beq.n b476c │ │ - b.n b4bf4 │ │ - ldr r4, [pc, #64] @ (b47a0 ) │ │ + b.n b4aaa │ │ + beq.n b477c │ │ + b.n b4c04 │ │ + ldr r4, [pc, #64] @ (b47b0 ) │ │ ldmia.w sp!, {r1, r3, r4, r6, r7, ip, pc} │ │ and.w r0, r0, ip, asr #4 │ │ - b.n b42a8 │ │ + b.n b42b8 │ │ movs r0, #38 @ 0x26 │ │ - b.n b4eae │ │ + b.n b4ebe │ │ adds r0, #40 @ 0x28 │ │ - b.n b42b0 │ │ + b.n b42c0 │ │ asrs r1, r0, #32 │ │ - b.n b4894 │ │ + b.n b48a4 │ │ movs r0, #0 │ │ - b.n b4294 │ │ + b.n b42a4 │ │ adds r0, #3 │ │ - b.n b489c │ │ + b.n b48ac │ │ movs r4, r0 │ │ - b.n b429c │ │ + b.n b42ac │ │ movs r0, r1 │ │ - b.n b42a0 │ │ + b.n b42b0 │ │ movs r0, r0 │ │ - b.n b4eca │ │ + b.n b4eda │ │ movs r2, #241 @ 0xf1 │ │ - b.n b4d8e │ │ - ldr r2, [sp, #660] @ 0x294 │ │ + b.n b4d9e │ │ + ldr r2, [sp, #656] @ 0x290 │ │ @ instruction: 0xebffd008 │ │ - b.n b4c2c │ │ + b.n b4c3c │ │ ldrh r0, [r2, #32] │ │ - ldmia.w sp!, {r0, r1, r2, r3, r4, r7, r8, sl, fp, ip, pc} │ │ - vceq.i16 q11, , #0 │ │ + ldmia.w sp!, {r0, r3, r5, r6, r8, r9, sl, fp, ip, pc} │ │ + vcge.s16 q11, , #0 │ │ @ instruction: 0xfff548f0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n b4cc4 │ │ + b.n b4cd4 │ │ str r3, [r5, r0] │ │ - b.n b4f6e │ │ + b.n b4f7e │ │ stmia r0!, {r2, r3, r6} │ │ - b.n b42d4 │ │ + b.n b42e4 │ │ str r4, [r6, r2] │ │ - b.n b4b36 │ │ + b.n b4b46 │ │ strb r1, [r6, r6] │ │ - b.n b4dd4 │ │ + b.n b4de4 │ │ eors r0, r0 │ │ - b.n b42e0 │ │ - b.n b47c0 │ │ - b.n b4f02 │ │ + b.n b42f0 │ │ + b.n b47d0 │ │ + b.n b4f12 │ │ ldrsh r5, [r0, r0] │ │ - b.n b4e54 │ │ - b.n b4928 │ │ - b.n b42ca │ │ + b.n b4e64 │ │ + b.n b4938 │ │ + b.n b42da │ │ str r0, [r0, r0] │ │ - b.n b42ce │ │ + b.n b42de │ │ str r4, [r0, #0] │ │ - b.n b42fa │ │ + b.n b430a │ │ eors r5, r7 │ │ - b.n b4f96 │ │ + b.n b4fa6 │ │ adds r0, #20 │ │ - b.n b42da │ │ + b.n b42ea │ │ movs r0, #16 │ │ - b.n b42de │ │ + b.n b42ee │ │ lsrs r2, r0, #8 │ │ - b.n b4e0e │ │ + b.n b4e1e │ │ asrs r4, r1, #32 │ │ - b.n b42e6 │ │ + b.n b42f6 │ │ ands r2, r0 │ │ lsls r0, r0, #12 │ │ stmia r0!, {r3} │ │ - b.n b42ee │ │ - b.n b4820 │ │ - b.n b42f2 │ │ + b.n b42fe │ │ + b.n b4830 │ │ + b.n b4302 │ │ lsls r4, r5, #2 │ │ - b.n b42f6 │ │ + b.n b4306 │ │ strb r0, [r0, #0] │ │ - b.n b439e │ │ + b.n b43ae │ │ ands r6, r0 │ │ - b.n b437e │ │ + b.n b438e │ │ movs r4, r0 │ │ - b.n b4e30 │ │ + b.n b4e40 │ │ movs r0, r2 │ │ lsrs r0, r0, #8 │ │ str r0, [r7, r2] │ │ - b.n b434a │ │ + b.n b435a │ │ strb r4, [r1, #0] │ │ - b.n b4d14 │ │ + b.n b4d24 │ │ ldr r4, [r2, #124] @ 0x7c │ │ - b.n b4e30 │ │ + b.n b4e40 │ │ str r1, [r0, r0] │ │ - b.n b4d22 │ │ + b.n b4d32 │ │ strb r4, [r2, #0] │ │ - b.n b431a │ │ + b.n b432a │ │ strb r4, [r6, #2] │ │ - b.n b4d1e │ │ + b.n b4d2e │ │ str r4, [r6, r2] │ │ - b.n b4ba2 │ │ + b.n b4bb2 │ │ strb r0, [r2, #0] │ │ - b.n b4326 │ │ + b.n b4336 │ │ strb r0, [r0, #0] │ │ - b.n b43ce │ │ - b.n b485c │ │ - b.n b432e │ │ + b.n b43de │ │ + b.n b486c │ │ + b.n b433e │ │ strb r0, [r2, #0] │ │ - b.n b4c40 │ │ + b.n b4c50 │ │ asrs r4, r1, #32 │ │ - b.n b4336 │ │ + b.n b4346 │ │ stmia r0!, {r3} │ │ - b.n b433a │ │ + b.n b434a │ │ strb r7, [r0, #2] │ │ - b.n b4b46 │ │ + b.n b4b56 │ │ strb r6, [r0, #0] │ │ - b.n b43c2 │ │ + b.n b43d2 │ │ lsls r4, r5, #2 │ │ - b.n b4346 │ │ + b.n b4356 │ │ lsls r0, r4, #2 │ │ - b.n b424a │ │ + b.n b425a │ │ movs r0, r0 │ │ - b.n b4406 │ │ + b.n b4416 │ │ movs r2, r0 │ │ - b.n b4e72 │ │ + b.n b4e82 │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n b437c │ │ + b.n b438c │ │ asrs r4, r2, #32 │ │ - b.n b4384 │ │ + b.n b4394 │ │ movs r0, r0 │ │ - b.n b4f04 │ │ + b.n b4f14 │ │ movs r0, r0 │ │ asrs r0, r4, #14 │ │ ldrh r0, [r6, #6] │ │ adds r5, r7, r2 │ │ asrs r3, r0, #32 │ │ - b.n b4bae │ │ - ldr r0, [pc, #960] @ (b4c30 ) │ │ + b.n b4bbe │ │ + ldr r0, [pc, #960] @ (b4c40 ) │ │ ldmia.w sp!, {r0, r4, r5, r6, r8} │ │ and.w r0, r0, ip, lsl #1 │ │ - b.n b439c │ │ + b.n b43ac │ │ movs r0, #0 │ │ - b.n b4916 │ │ + b.n b4926 │ │ movs r1, r0 │ │ - b.n b4bc2 │ │ + b.n b4bd2 │ │ asrs r2, r0, #32 │ │ - b.n b4bc6 │ │ - ldr r0, [pc, #960] @ (b4c48 ) │ │ - ldmia.w sp!, {r0, r3, r5, r9, ip, sp, pc} │ │ + b.n b4bd6 │ │ + ldr r0, [pc, #960] @ (b4c58 ) │ │ + ldmia.w sp!, {r3, r5, r9, ip, sp, pc} │ │ @ instruction: 0xeaff4ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n b4db0 │ │ - beq.n b4920 │ │ - b.n b4d34 │ │ + b.n b4dc0 │ │ + beq.n b4930 │ │ + b.n b4d44 │ │ movs r4, r5 │ │ - b.n b42b4 │ │ + b.n b42c4 │ │ movs r0, r0 │ │ - b.n b4fe2 │ │ + b.n b4ff2 │ │ movs r5, r0 │ │ - b.n b4428 │ │ + b.n b4438 │ │ str r1, [r0, #0] │ │ - b.n b4bea │ │ + b.n b4bfa │ │ adds r0, #12 │ │ - b.n b43e4 │ │ - add r0, pc, #112 @ (adr r0, b4920 ) │ │ - b.n b4dbe │ │ + b.n b43f4 │ │ + add r0, pc, #112 @ (adr r0, b4930 ) │ │ + b.n b4dce │ │ asrs r0, r0, #32 │ │ - b.n b43da │ │ + b.n b43ea │ │ ands r6, r0 │ │ - b.n b4bfa │ │ + b.n b4c0a │ │ strh r2, [r0, #0] │ │ - b.n b4bfe │ │ + b.n b4c0e │ │ movs r0, #8 │ │ - b.n b43f8 │ │ + b.n b4408 │ │ lsls r4, r7, #30 │ │ - b.n b4c8e │ │ + b.n b4c9e │ │ movs r6, r0 │ │ - b.n b4c0a │ │ + b.n b4c1a │ │ movs r0, #240 @ 0xf0 │ │ - b.n b4c68 │ │ + b.n b4c78 │ │ movs r0, #10 │ │ - b.n b4c12 │ │ + b.n b4c22 │ │ lsls r4, r2, #8 │ │ add.w r0, r0, r0 │ │ - b.n b4f7a │ │ + b.n b4f8a │ │ lsls r6, r7, #4 │ │ subs r0, r0, r0 │ │ movs r6, r0 │ │ - b.n b4c22 │ │ + b.n b4c32 │ │ asrs r0, r0, #32 │ │ - b.n b5026 │ │ + b.n b5036 │ │ movs r0, #4 │ │ - b.n b502a │ │ + b.n b503a │ │ lsls r1, r2, #11 │ │ add.w r0, r0, r0 │ │ - b.n b4f92 │ │ + b.n b4fa2 │ │ lsls r0, r7, #4 │ │ subs r0, r0, r0 │ │ movs r4, r5 │ │ - b.n b4330 │ │ + b.n b4340 │ │ strb r5, [r2, #3] │ │ - b.n b4caa │ │ + b.n b4cba │ │ str r0, [r0, r0] │ │ - b.n b4422 │ │ + b.n b4432 │ │ asrs r2, r0, #32 │ │ - b.n b4e14 │ │ + b.n b4e24 │ │ lsls r4, r3, #1 │ │ - b.n b44b4 │ │ + b.n b44c4 │ │ movs r1, r2 │ │ - b.n b4c4e │ │ - ldrh r7, [r6, #60] @ 0x3c │ │ + b.n b4c5e │ │ + ldrh r3, [r7, #60] @ 0x3c │ │ add.w r0, r0, r0 │ │ - b.n b4fb6 │ │ + b.n b4fc6 │ │ lsls r7, r2, #4 │ │ lsrs r0, r0, #8 │ │ str r0, [sp, #0] │ │ - b.n b505e │ │ + b.n b506e │ │ movs r0, r0 │ │ - b.n b4fd0 │ │ + b.n b4fe0 │ │ strb r0, [r4, #0] │ │ - b.n b4440 │ │ + b.n b4450 │ │ movs r4, r3 │ │ - b.n b4444 │ │ + b.n b4454 │ │ lsls r7, r2, #4 │ │ - ldr r2, [pc, #0] @ (b492c ) │ │ + ldr r2, [pc, #0] @ (b493c ) │ │ movs r0, #8 │ │ - b.n b445c │ │ + b.n b446c │ │ str r7, [r0, r0] │ │ - b.n b5076 │ │ + b.n b5086 │ │ strb r0, [r0, #0] │ │ - b.n b4c7a │ │ + b.n b4c8a │ │ strh r0, [r3, #0] │ │ - b.n b4458 │ │ + b.n b4468 │ │ asrs r5, r0, #4 │ │ - b.n b486e │ │ + b.n b487e │ │ movs r7, r0 │ │ - b.n b4c86 │ │ + b.n b4c96 │ │ lsls r4, r6, #13 │ │ add.w r0, r0, ip, asr #32 │ │ - b.n b4384 │ │ + b.n b4394 │ │ asrs r7, r0, #32 │ │ - b.n b4ddc │ │ + b.n b4dec │ │ strb r5, [r0, #4] │ │ - b.n b4862 │ │ + b.n b4872 │ │ str r1, [r0, r0] │ │ - b.n b4e64 │ │ + b.n b4e74 │ │ movs r0, r0 │ │ - b.n b447e │ │ + b.n b448e │ │ movs r0, #8 │ │ - b.n b4482 │ │ + b.n b4492 │ │ lsls r5, r2, #3 │ │ - b.n b4d12 │ │ + b.n b4d22 │ │ strb r7, [r0, #0] │ │ - b.n b4a6e │ │ + b.n b4a7e │ │ movs r0, r0 │ │ - b.n b4c10 │ │ + b.n b4c20 │ │ @ instruction: 0xfff2baff │ │ movs r0, r0 │ │ - b.n b5016 │ │ + b.n b5026 │ │ lsls r4, r0, #4 │ │ - ldr r2, [pc, #0] @ (b4978 ) │ │ + ldr r2, [pc, #0] @ (b4988 ) │ │ subs r3, r3, #5 │ │ - b.n b4e8a │ │ + b.n b4e9a │ │ asrs r4, r2, #32 │ │ - b.n b449c │ │ + b.n b44ac │ │ asrs r4, r2, #32 │ │ - b.n b4e94 │ │ + b.n b4ea4 │ │ asrs r0, r5, #32 │ │ - b.n b44a4 │ │ + b.n b44b4 │ │ ands r4, r4 │ │ - b.n b44a8 │ │ - add r0, pc, #176 @ (adr r0, b4a40 ) │ │ - b.n b44ac │ │ + b.n b44b8 │ │ + add r0, pc, #176 @ (adr r0, b4a50 ) │ │ + b.n b44bc │ │ adds r0, #112 @ 0x70 │ │ - b.n b4774 │ │ + b.n b4784 │ │ asrs r3, r0, #4 │ │ - b.n b48ce │ │ + b.n b48de │ │ asrs r0, r4, #32 │ │ - b.n b43b4 │ │ + b.n b43c4 │ │ movs r0, #188 @ 0xbc │ │ - b.n b4d44 │ │ + b.n b4d54 │ │ str r2, [r1, r0] │ │ - b.n b4548 │ │ + b.n b4558 │ │ lsls r2, r4, #2 │ │ - b.n b4cea │ │ + b.n b4cfa │ │ movs r2, r0 │ │ - b.n b4fd8 │ │ + b.n b4fe8 │ │ movs r0, r7 │ │ subs r0, r0, r0 │ │ movs r0, #131 @ 0x83 │ │ - b.n b4abe │ │ + b.n b4ace │ │ adds r0, #176 @ 0xb0 │ │ - b.n b4d5e │ │ + b.n b4d6e │ │ adds r0, #1 │ │ - b.n b4ec4 │ │ + b.n b4ed4 │ │ adds r0, #176 @ 0xb0 │ │ - b.n b4d46 │ │ + b.n b4d56 │ │ movs r0, #176 @ 0xb0 │ │ - b.n b4d6a │ │ + b.n b4d7a │ │ movs r2, r0 │ │ - b.n b4c6a │ │ + b.n b4c7a │ │ movs r1, r7 │ │ ldr r2, [sp, #0] │ │ movs r4, r2 │ │ - b.n b4ed4 │ │ + b.n b4ee4 │ │ strh r0, [r0, #0] │ │ - b.n b44f8 │ │ + b.n b4508 │ │ movs r0, #130 @ 0x82 │ │ - b.n b4ada │ │ + b.n b4aea │ │ str r0, [sp, #16] │ │ - b.n b4500 │ │ + b.n b4510 │ │ movs r0, #176 @ 0xb0 │ │ - b.n b4d86 │ │ + b.n b4d96 │ │ asrs r2, r0, #32 │ │ - b.n b4906 │ │ + b.n b4916 │ │ movs r0, #32 │ │ - b.n b4e80 │ │ + b.n b4e90 │ │ movs r6, r0 │ │ - b.n b4d2e │ │ + b.n b4d3e │ │ strh r0, [r6, #6] │ │ - b.n b4d8c │ │ + b.n b4d9c │ │ lsls r4, r1, #7 │ │ add.w r0, r0, r0 │ │ - b.n b509a │ │ + b.n b50aa │ │ lsls r0, r5, #3 │ │ subs r0, r0, r0 │ │ strh r7, [r0, #0] │ │ - b.n b4d42 │ │ + b.n b4d52 │ │ strb r0, [r4, #0] │ │ - b.n b4540 │ │ + b.n b4550 │ │ movs r5, r0 │ │ - b.n b45b6 │ │ + b.n b45c6 │ │ movs r1, r0 │ │ - b.n b4f0e │ │ + b.n b4f1e │ │ movs r5, r0 │ │ - b.n b459e │ │ + b.n b45ae │ │ lsls r0, r6, #1 │ │ - b.n b4774 │ │ + b.n b4784 │ │ movs r0, r0 │ │ - b.n b4cc8 │ │ + b.n b4cd8 │ │ lsls r2, r4, #3 │ │ rev r0, r0 │ │ str r0, [r4, r0] │ │ - b.n b4458 │ │ + b.n b4468 │ │ lsls r0, r0, #2 │ │ - b.n b4b2e │ │ + b.n b4b3e │ │ asrs r0, r0, #32 │ │ - b.n b516a │ │ + b.n b517a │ │ asrs r0, r6, #2 │ │ - b.n b4dae │ │ + b.n b4dbe │ │ asrs r2, r7, #2 │ │ - b.n b4ddc │ │ + b.n b4dec │ │ lsls r5, r2, #3 │ │ - b.n b4de2 │ │ + b.n b4df2 │ │ movs r1, r0 │ │ - b.n b505c │ │ + b.n b506c │ │ lsls r3, r0, #1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r5, #32 │ │ - b.n b4478 │ │ + b.n b4488 │ │ lsls r0, r0, #4 │ │ - b.n b497a │ │ + b.n b498a │ │ asrs r0, r0, #32 │ │ - b.n b456c │ │ + b.n b457c │ │ movs r0, #8 │ │ - b.n b4570 │ │ + b.n b4580 │ │ asrs r5, r0, #32 │ │ - b.n b4d92 │ │ + b.n b4da2 │ │ lsls r1, r6, #12 │ │ add.w r0, r0, r5, lsr #3 │ │ - b.n b4e06 │ │ + b.n b4e16 │ │ asrs r4, r2, #32 │ │ - b.n b4f68 │ │ + b.n b4f78 │ │ adds r0, #4 │ │ - b.n b458c │ │ + b.n b459c │ │ movs r0, #0 │ │ - b.n b4590 │ │ + b.n b45a0 │ │ lsls r0, r0, #2 │ │ - b.n b4b72 │ │ + b.n b4b82 │ │ lsls r0, r6, #2 │ │ - b.n b4e0e │ │ + b.n b4e1e │ │ lsls r0, r0, #2 │ │ - b.n b4b74 │ │ + b.n b4b84 │ │ lsls r0, r6, #2 │ │ - b.n b4e16 │ │ + b.n b4e26 │ │ asrs r0, r0, #32 │ │ - b.n b499c │ │ + b.n b49ac │ │ movs r6, r0 │ │ - b.n b4dbe │ │ + b.n b4dce │ │ movs r0, #240 @ 0xf0 │ │ - b.n b4e1c │ │ + b.n b4e2c │ │ movs r0, #32 │ │ - b.n b4f1c │ │ + b.n b4f2c │ │ lsls r7, r4, #6 │ │ add.w r0, r0, r0 │ │ - b.n b512e │ │ + b.n b513e │ │ @ instruction: 0xffdc0aff │ │ lsls r2, r0, #3 │ │ and.w r0, r0, r4, lsl #12 │ │ - b.n b4646 │ │ + b.n b4656 │ │ movs r1, r0 │ │ - b.n b50c4 │ │ + b.n b50d4 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ movs r2, r0 │ │ - b.n b514a │ │ + b.n b515a │ │ movs r7, r5 │ │ cmp r2, #0 │ │ ands r7, r0 │ │ - b.n b4dee │ │ + b.n b4dfe │ │ asrs r0, r4, #32 │ │ - b.n b44c8 │ │ + b.n b44d8 │ │ movs r0, r0 │ │ and.w r0, r0, r7, lsl #16 │ │ - b.n b4dfa │ │ + b.n b4e0a │ │ movs r4, r5 │ │ - b.n b44f4 │ │ + b.n b4504 │ │ movs r0, #186 @ 0xba │ │ - b.n b4e64 │ │ + b.n b4e74 │ │ strb r4, [r7, #2] │ │ - b.n b4e68 │ │ + b.n b4e78 │ │ strh r4, [r1, #0] │ │ - b.n b45ea │ │ + b.n b45fa │ │ movs r0, r4 │ │ - b.n b50f2 │ │ + b.n b5102 │ │ lsls r0, r4, #2 │ │ subs r0, r0, r0 │ │ movs r4, r5 │ │ - b.n b450c │ │ + b.n b451c │ │ str r1, [r0, r0] │ │ - b.n b521a │ │ + b.n b522a │ │ adds r0, #190 @ 0xbe │ │ - b.n b4e80 │ │ + b.n b4e90 │ │ movs r0, #0 │ │ - b.n b4602 │ │ + b.n b4612 │ │ movs r0, #8 │ │ - b.n b460a │ │ + b.n b461a │ │ str r0, [r0, r0] │ │ - b.n b4604 │ │ + b.n b4614 │ │ movs r0, #3 │ │ - b.n b4b72 │ │ + b.n b4b82 │ │ adds r0, #20 │ │ - b.n b4f76 │ │ + b.n b4f86 │ │ movs r0, #20 │ │ - b.n b5004 │ │ + b.n b5014 │ │ lsls r7, r5, #16 │ │ @ instruction: 0xeb009000 │ │ - b.n b4e3e │ │ + b.n b4e4e │ │ movs r0, r0 │ │ - b.n b51a2 │ │ + b.n b51b2 │ │ lsls r1, r4, #2 │ │ subs r0, r0, r0 │ │ lsls r5, r2, #3 │ │ - b.n b4eb6 │ │ + b.n b4ec6 │ │ movs r0, r0 │ │ - b.n b51ae │ │ + b.n b51be │ │ lsls r3, r3, #2 │ │ lsrs r0, r0, #8 │ │ - add r0, pc, #176 @ (adr r0, b4bc4 ) │ │ - b.n b4650 │ │ + add r0, pc, #176 @ (adr r0, b4bd4 ) │ │ + b.n b4660 │ │ strb r4, [r0, #0] │ │ - b.n b4e5a │ │ + b.n b4e6a │ │ movs r1, r0 │ │ - b.n b4f9e │ │ + b.n b4fae │ │ ands r4, r4 │ │ - b.n b465c │ │ + b.n b466c │ │ asrs r0, r0, #4 │ │ - b.n b4a5a │ │ + b.n b4a6a │ │ lsls r0, r0, #2 │ │ - b.n b4c32 │ │ + b.n b4c42 │ │ lsls r0, r6, #2 │ │ - b.n b4ece │ │ + b.n b4ede │ │ asrs r4, r2, #32 │ │ - b.n b5034 │ │ + b.n b5044 │ │ lsls r0, r0, #2 │ │ - b.n b4c38 │ │ + b.n b4c48 │ │ lsls r0, r6, #2 │ │ - b.n b4eda │ │ + b.n b4eea │ │ strh r0, [r0, #0] │ │ - b.n b4a40 │ │ + b.n b4a50 │ │ movs r5, r0 │ │ - b.n b46ee │ │ + b.n b46fe │ │ movs r1, r0 │ │ - b.n b4fc6 │ │ + b.n b4fd6 │ │ movs r5, r0 │ │ - b.n b46d6 │ │ + b.n b46e6 │ │ movs r2, r0 │ │ and.w r1, r0, r0, lsl #20 │ │ - b.n b4a66 │ │ + b.n b4a76 │ │ strb r0, [r1, #0] │ │ - b.n b4e96 │ │ + b.n b4ea6 │ │ movs r5, r0 │ │ - b.n b4706 │ │ + b.n b4716 │ │ asrs r0, r6, #1 │ │ - b.n b48bc │ │ + b.n b48cc │ │ movs r0, r0 │ │ - b.n b5204 │ │ + b.n b5214 │ │ @ instruction: 0xff8a5aff │ │ lsls r7, r0, #2 │ │ @ instruction: 0xea00a080 │ │ - b.n b4eae │ │ + b.n b4ebe │ │ ands r3, r2 │ │ - b.n b5332 │ │ + b.n b5342 │ │ lsls r4, r6, #2 │ │ - b.n b4d98 │ │ + b.n b4da8 │ │ movs r0, #0 │ │ - b.n b4c7c │ │ + b.n b4c8c │ │ strh r4, [r2, #0] │ │ - b.n b5082 │ │ + b.n b5092 │ │ movs r0, r3 │ │ - b.n b4726 │ │ + b.n b4736 │ │ movs r1, r0 │ │ - b.n b5226 │ │ + b.n b5236 │ │ movs r3, r6 │ │ subs r0, r0, r0 │ │ movs r7, r0 │ │ - b.n b4e30 │ │ + b.n b4e40 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ lsls r5, r2, #3 │ │ - b.n b4f42 │ │ + b.n b4f52 │ │ movs r0, #44 @ 0x2c │ │ - b.n b46d4 │ │ + b.n b46e4 │ │ strb r0, [r0, #4] │ │ - b.n b4aa2 │ │ + b.n b4ab2 │ │ movs r4, r5 │ │ - b.n b45d8 │ │ + b.n b45e8 │ │ movs r0, r0 │ │ - b.n b46c6 │ │ + b.n b46d6 │ │ movs r0, #8 │ │ - b.n b46ca │ │ + b.n b46da │ │ movs r7, r0 │ │ - b.n b4eee │ │ + b.n b4efe │ │ lsls r2, r3, #11 │ │ add.w r0, r0, r4, ror #2 │ │ - b.n b4de4 │ │ + b.n b4df4 │ │ asrs r0, r5, #32 │ │ - b.n b46f4 │ │ + b.n b4704 │ │ strh r0, [r0, #0] │ │ - b.n b4cc0 │ │ + b.n b4cd0 │ │ lsls r6, r6, #2 │ │ - b.n b4f72 │ │ + b.n b4f82 │ │ str r0, [r1, r0] │ │ - b.n b50d6 │ │ + b.n b50e6 │ │ asrs r0, r0, #32 │ │ - b.n b46f8 │ │ + b.n b4708 │ │ adds r0, #4 │ │ - b.n b46fc │ │ + b.n b470c │ │ movs r0, #0 │ │ - b.n b4afc │ │ + b.n b4b0c │ │ movs r0, r5 │ │ - b.n b506c │ │ + b.n b507c │ │ movs r2, r1 │ │ stmia.w sp, {r1, r2, ip} │ │ - b.n b4f1e │ │ + b.n b4f2e │ │ lsls r4, r3, #12 │ │ @ instruction: 0xeb009024 │ │ - b.n b461c │ │ + b.n b462c │ │ movs r0, r0 │ │ - b.n b529c │ │ + b.n b52ac │ │ lsls r7, r4, #1 │ │ subs r0, r0, r0 │ │ ands r0, r6 │ │ - b.n b470c │ │ + b.n b471c │ │ asrs r0, r1, #32 │ │ - b.n b4f36 │ │ + b.n b4f46 │ │ ands r4, r5 │ │ - b.n b4630 │ │ + b.n b4640 │ │ strh r6, [r0, #0] │ │ - b.n b4f3e │ │ + b.n b4f4e │ │ adds r0, #182 @ 0xb6 │ │ - b.n b4fa4 │ │ + b.n b4fb4 │ │ str r7, [r0, #0] │ │ - b.n b4f46 │ │ + b.n b4f56 │ │ strb r0, [r0, #0] │ │ - b.n b472c │ │ + b.n b473c │ │ movs r0, r0 │ │ - b.n b4736 │ │ + b.n b4746 │ │ movs r0, #12 │ │ - b.n b473a │ │ + b.n b474a │ │ movs r0, #3 │ │ - b.n b4b20 │ │ + b.n b4b30 │ │ movs r0, #19 │ │ - b.n b5128 │ │ + b.n b5138 │ │ adds r0, #1 │ │ - b.n b535e │ │ + b.n b536e │ │ lsls r4, r3, #1 │ │ - b.n b47c2 │ │ + b.n b47d2 │ │ asrs r0, r5, #32 │ │ - b.n b465c │ │ + b.n b466c │ │ movs r2, r6 │ │ - b.n b4d30 │ │ + b.n b4d40 │ │ movs r0, #20 │ │ - b.n b513c │ │ + b.n b514c │ │ movs r0, r0 │ │ - b.n b474c │ │ + b.n b475c │ │ movs r4, r0 │ │ - b.n b4f76 │ │ + b.n b4f86 │ │ adds r0, #0 │ │ - b.n b537a │ │ + b.n b538a │ │ lsls r6, r3, #15 │ │ add.w r0, r0, r0 │ │ - b.n b52e2 │ │ + b.n b52f2 │ │ lsls r6, r2, #1 │ │ subs r0, r0, r0 │ │ strb r6, [r0, #0] │ │ - b.n b4f8a │ │ + b.n b4f9a │ │ asrs r6, r0, #32 │ │ - b.n b4f8e │ │ + b.n b4f9e │ │ str r0, [r1, #0] │ │ - b.n b4f92 │ │ + b.n b4fa2 │ │ ands r0, r6 │ │ - b.n b4790 │ │ + b.n b47a0 │ │ movs r4, r5 │ │ and.w r0, r0, r2 │ │ - b.n b527e │ │ + b.n b528e │ │ movs r2, r5 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n b4796 │ │ + b.n b47a6 │ │ movs r0, r6 │ │ - b.n b530a │ │ + b.n b531a │ │ lsls r2, r2, #1 │ │ subs r0, r0, r0 │ │ movs r7, r0 │ │ - b.n b4f14 │ │ + b.n b4f24 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ lsls r5, r2, #3 │ │ - b.n b5026 │ │ + b.n b5036 │ │ movs r0, #44 @ 0x2c │ │ - b.n b47b8 │ │ + b.n b47c8 │ │ strb r0, [r0, #4] │ │ - b.n b4b86 │ │ + b.n b4b96 │ │ movs r4, r5 │ │ - b.n b46bc │ │ + b.n b46cc │ │ movs r0, r0 │ │ - b.n b47aa │ │ + b.n b47ba │ │ movs r0, #8 │ │ - b.n b47ae │ │ + b.n b47be │ │ movs r7, r0 │ │ - b.n b4fd2 │ │ + b.n b4fe2 │ │ lsls r1, r4, #10 │ │ add.w r0, r0, r4, ror #2 │ │ - b.n b4ec8 │ │ + b.n b4ed8 │ │ asrs r0, r5, #32 │ │ - b.n b47d8 │ │ + b.n b47e8 │ │ strh r0, [r0, #0] │ │ - b.n b4da4 │ │ + b.n b4db4 │ │ movs r4, r0 │ │ - b.n b4856 │ │ + b.n b4866 │ │ movs r4, r0 │ │ - b.n b52ca │ │ + b.n b52da │ │ movs r4, r3 │ │ lsrs r0, r0, #8 │ │ movs r6, r0 │ │ - b.n b4ff2 │ │ + b.n b5002 │ │ asrs r0, r1, #32 │ │ - b.n b4ff6 │ │ + b.n b5006 │ │ movs r0, #7 │ │ - b.n b4ffa │ │ + b.n b500a │ │ lsls r4, r2, #17 │ │ add.w r0, r0, r0 │ │ - b.n b5362 │ │ + b.n b5372 │ │ movs r6, r6 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #32 │ │ - b.n b47f8 │ │ + b.n b4808 │ │ str r0, [r3, r0] │ │ - b.n b47fa │ │ + b.n b480a │ │ movs r0, r0 │ │ - b.n b4800 │ │ + b.n b4810 │ │ lsls r0, r6, #3 │ │ - b.n b5070 │ │ + b.n b5080 │ │ movs r0, #188 @ 0xbc │ │ - b.n b51e4 │ │ + b.n b51f4 │ │ movs r4, r5 │ │ - b.n b4714 │ │ + b.n b4724 │ │ asrs r5, r0, #32 │ │ - b.n b5022 │ │ + b.n b5032 │ │ mcr2 11, 7, lr, cr9, cr15, {7} @ │ │ str r0, [sp, #0] │ │ - b.n b502a │ │ + b.n b503a │ │ asrs r4, r6, #2 │ │ - b.n b51f8 │ │ + b.n b5208 │ │ movs r0, r0 │ │ - b.n b53a4 │ │ + b.n b53b4 │ │ movs r5, r4 │ │ subs r0, r0, r0 │ │ lsls r6, r6, #2 │ │ - b.n b50aa │ │ + b.n b50ba │ │ movs r0, #48 @ 0x30 │ │ - b.n b543e │ │ + b.n b544e │ │ movs r0, r0 │ │ - b.n b4e12 │ │ + b.n b4e22 │ │ movs r0, r1 │ │ - b.n b5206 │ │ - strh r6, [r5, #12] │ │ + b.n b5216 │ │ + strh r3, [r6, #10] │ │ mla r0, r0, r7, r1 │ │ - b.n b504e │ │ + b.n b505e │ │ ands r2, r0 │ │ - b.n b519a │ │ + b.n b51aa │ │ movs r4, r0 │ │ - b.n b4e2a │ │ + b.n b4e3a │ │ movs r4, r2 │ │ - b.n b53fa │ │ + b.n b540a │ │ @ instruction: 0xff941aff │ │ vpmin.u32 q15, , │ │ lsls r6, r6, #2 │ │ - b.n b50d6 │ │ + b.n b50e6 │ │ movs r0, #48 @ 0x30 │ │ - b.n b546a │ │ + b.n b547a │ │ str r4, [r2, r0] │ │ - b.n b4868 │ │ + b.n b4878 │ │ movs r0, r0 │ │ - b.n b4e42 │ │ + b.n b4e52 │ │ asrs r0, r1, #32 │ │ - b.n b5236 │ │ + b.n b5246 │ │ movs r5, r0 │ │ - b.n b507a │ │ - strh r1, [r4, #12] │ │ + b.n b508a │ │ + strh r6, [r4, #10] │ │ @ instruction: 0xfb00002c │ │ - b.n b4778 │ │ + b.n b4788 │ │ asrs r5, r0, #32 │ │ - b.n b5086 │ │ + b.n b5096 │ │ @ instruction: 0xfa0debff │ │ str r0, [sp, #0] │ │ - b.n b508e │ │ + b.n b509e │ │ asrs r5, r0, #32 │ │ - b.n b5092 │ │ + b.n b50a2 │ │ @ instruction: 0xffe5eaff │ │ movs r0, #184 @ 0xb8 │ │ - b.n b50fc │ │ + b.n b510c │ │ lsls r7, r4, #2 │ │ - b.n b509e │ │ + b.n b50ae │ │ adds r0, #0 │ │ - b.n b54a2 │ │ + b.n b54b2 │ │ lsls r0, r2, #10 │ │ - b.n b4d66 │ │ + b.n b4d76 │ │ movs r0, #1 │ │ - b.n b54aa │ │ + b.n b54ba │ │ movs r0, #0 │ │ - b.n b4888 │ │ + b.n b4898 │ │ movs r0, #20 │ │ - b.n b5272 │ │ + b.n b5282 │ │ movs r4, r5 │ │ - b.n b47ac │ │ + b.n b47bc │ │ vpmin.u16 q15, q15, │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n b54be │ │ + b.n b54ce │ │ movs r4, r0 │ │ and.w r0, r0, r8, lsr #32 │ │ - b.n b48c0 │ │ + b.n b48d0 │ │ strh r0, [r0, #0] │ │ - b.n b488a │ │ + b.n b489a │ │ str r0, [sp, #0] │ │ - b.n b54ce │ │ + b.n b54de │ │ movs r4, r3 │ │ - b.n b48cc │ │ + b.n b48dc │ │ ldrh r2, [r1, #52] @ 0x34 │ │ add.w r0, r0, r9 │ │ - b.n b50da │ │ - beq.n b4dd4 │ │ - b.n b5234 │ │ + b.n b50ea │ │ + beq.n b4de4 │ │ + b.n b5244 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {ip, pc} │ │ - b.n b50e6 │ │ + b.n b50f6 │ │ @ instruction: 0xfff8eaff │ │ lsls r4, r6, #30 │ │ - b.n b53be │ │ + b.n b53ce │ │ lsrs r7, r7, #31 │ │ - b.n b5450 │ │ + b.n b5460 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n b52b6 │ │ + b.n b52c6 │ │ @ instruction: 0xfff4eaff │ │ asrs r0, r5, #1 │ │ - b.n b48fc │ │ + b.n b490c │ │ asrs r1, r0, #32 │ │ - b.n b4ee0 │ │ + b.n b4ef0 │ │ asrs r2, r3, #1 │ │ - b.n b4968 │ │ + b.n b4978 │ │ movs r0, r0 │ │ - b.n b546c │ │ + b.n b547c │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ str r7, [sp, #720] @ 0x2d0 │ │ - b.n b53e2 │ │ + b.n b53f2 │ │ ldr r7, [sp, #1020] @ 0x3fc │ │ - b.n b5474 │ │ + b.n b5484 │ │ @ instruction: 0xffeceaff │ │ str r0, [sp, #0] │ │ - b.n b511e │ │ + b.n b512e │ │ @ instruction: 0xffeceaff │ │ asrs r4, r0, #1 │ │ - b.n b4924 │ │ + b.n b4934 │ │ str r7, [sp, #720] @ 0x2d0 │ │ - b.n b53fa │ │ + b.n b540a │ │ adds r0, #64 @ 0x40 │ │ - b.n b492c │ │ + b.n b493c │ │ ldr r7, [sp, #1020] @ 0x3fc │ │ - b.n b5490 │ │ + b.n b54a0 │ │ movs r0, #60 @ 0x3c │ │ - b.n b4934 │ │ + b.n b4944 │ │ asrs r1, r0, #32 │ │ - b.n b4f18 │ │ + b.n b4f28 │ │ strb r0, [r7, #0] │ │ - b.n b493c │ │ + b.n b494c │ │ adds r0, #3 │ │ - b.n b4f20 │ │ + b.n b4f30 │ │ movs r0, #2 │ │ - b.n b4f24 │ │ + b.n b4f34 │ │ movs r0, #0 │ │ - b.n b4924 │ │ + b.n b4934 │ │ movs r4, r1 │ │ - b.n b4928 │ │ + b.n b4938 │ │ movs r1, r0 │ │ - b.n b5552 │ │ + b.n b5562 │ │ movs r0, #207 @ 0xcf │ │ - b.n b5556 │ │ + b.n b5566 │ │ strb r7, [r0, #0] │ │ - b.n b4f38 │ │ + b.n b4f48 │ │ str r0, [sp, #16] │ │ - b.n b4938 │ │ + b.n b4948 │ │ strb r0, [r1, #0] │ │ - b.n b493c │ │ - ldr r1, [sp, #0] │ │ + b.n b494c │ │ + ldr r0, [sp, #1020] @ 0x3fc │ │ @ instruction: 0xebffffd8 │ │ - @ instruction: 0xeaff9a8c │ │ + @ instruction: 0xeaff9a9c │ │ movs r2, r0 │ │ - str r3, [r6, #120] @ 0x78 │ │ - vcvt.f32.u32 d20, d23, #11 │ │ - vrsra.u32 q12, , #11 │ │ - vqshl.u32 , q3, #21 │ │ + str r3, [r2, #120] @ 0x78 │ │ + @ instruction: 0xfff54efc │ │ + vcge.f16 d24, d5, #0 │ │ + vqshl.u64 d19, d8, #53 @ 0x35 │ │ @ instruction: 0xfff548f0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n b5360 │ │ - beq.n b4e68 │ │ - b.n b52e4 │ │ - bl 51094a │ │ + b.n b5370 │ │ + beq.n b4e78 │ │ + b.n b52f4 │ │ + bl 51095a │ │ stmia r0!, {r4, r5, r7} │ │ - b.n b51f6 │ │ + b.n b5206 │ │ adds r0, #10 │ │ - b.n b55ee │ │ + b.n b55fe │ │ movs r3, r6 │ │ - b.n b5500 │ │ + b.n b5510 │ │ movs r6, r0 │ │ - bge.n b4e5e │ │ + bge.n b4e6e │ │ lsls r3, r2, #1 │ │ - b.n b5508 │ │ + b.n b5518 │ │ movs r3, r4 │ │ ldmia r2!, {} │ │ movs r4, r6 │ │ - b.n b5510 │ │ + b.n b5520 │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ lsls r4, r0, #1 │ │ - b.n b5518 │ │ + b.n b5528 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ movs r1, r4 │ │ and.w r0, r0, r4, lsr #32 │ │ - b.n b5524 │ │ + b.n b5534 │ │ movs r7, r3 │ │ ldrh r0, [r0, #16] │ │ - b.n b4ea6 │ │ - b.n b5486 │ │ + b.n b4eb6 │ │ + b.n b5496 │ │ ands r1, r0 │ │ - b.n b55ca │ │ - b.n b4eac │ │ - b.n b550e │ │ + b.n b55da │ │ + b.n b4ebc │ │ + b.n b551e │ │ lsls r4, r2, #12 │ │ - b.n b50ce │ │ + b.n b50de │ │ movs r2, r3 │ │ lsrs r0, r0, #8 │ │ adds r0, #10 │ │ - b.n b52b2 │ │ + b.n b52c2 │ │ movs r2, r1 │ │ - b.n b5544 │ │ + b.n b5554 │ │ movs r6, r4 │ │ lsrs r0, r0, #8 │ │ ands r0, r4 │ │ - b.n b52de │ │ - b.n b4eb0 │ │ - b.n b55ea │ │ + b.n b52ee │ │ + b.n b4ec0 │ │ + b.n b55fa │ │ adds r0, #2 │ │ - b.n b55ee │ │ - b.n b5208 │ │ + b.n b55fe │ │ + b.n b5218 │ │ movs r3, r0 │ │ ands r0, r1 │ │ - b.n b55f6 │ │ + b.n b5606 │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ lsls r4, r2, #1 │ │ - b.n b54f6 │ │ + b.n b5506 │ │ movs r0, r5 │ │ lsrs r0, r0, #8 │ │ adds r4, #190 @ 0xbe │ │ - b.n b5266 │ │ + b.n b5276 │ │ ands r0, r1 │ │ - b.n b5350 │ │ + b.n b5360 │ │ movs r0, r6 │ │ - b.n b5506 │ │ + b.n b5516 │ │ movs r0, #4 │ │ asrs r2, r2, #22 │ │ movs r0, r0 │ │ asrs r2, r2, #13 │ │ movs r1, r6 │ │ lsrs r0, r0, #8 │ │ movs r6, r1 │ │ - b.n b5182 │ │ + b.n b5192 │ │ lsls r0, r6, #1 │ │ subs r2, #0 │ │ movs r4, r0 │ │ - b.n b518a │ │ + b.n b519a │ │ lsls r6, r5, #1 │ │ ldrh r0, [r0, #16] │ │ - b.n b4ef0 │ │ - b.n b522e │ │ + b.n b4f00 │ │ + b.n b523e │ │ ands r2, r0 │ │ - b.n b5232 │ │ + b.n b5242 │ │ movs r2, r5 │ │ and.w r0, r0, r4, lsr #1 │ │ - b.n b55a0 │ │ + b.n b55b0 │ │ lsls r4, r6, #1 │ │ asrs r3, r2, #13 │ │ @ instruction: 0xffe40aff │ │ lsls r4, r5, #7 │ │ - b.n b4a44 │ │ + b.n b4a54 │ │ movs r0, r0 │ │ - b.n b5028 │ │ + b.n b5038 │ │ asrs r2, r3, #1 │ │ - b.n b4aae │ │ + b.n b4abe │ │ movs r3, r0 │ │ - b.n b55b4 │ │ + b.n b55c4 │ │ movs r4, r1 │ │ subs r2, #0 │ │ asrs r4, r3, #7 │ │ - b.n b4a58 │ │ + b.n b4a68 │ │ ands r2, r0 │ │ - b.n b525e │ │ + b.n b526e │ │ adds r1, #216 @ 0xd8 │ │ - b.n b4a60 │ │ + b.n b4a70 │ │ movs r3, r0 │ │ - b.n b5666 │ │ + b.n b5676 │ │ asrs r1, r0, #32 │ │ - b.n b5048 │ │ + b.n b5058 │ │ movs r0, #190 @ 0xbe │ │ - b.n b566e │ │ + b.n b567e │ │ adds r0, #3 │ │ - b.n b5050 │ │ + b.n b5060 │ │ stmia r0!, {} │ │ - b.n b4a50 │ │ - ldr r0, [sp, #748] @ 0x2ec │ │ + b.n b4a60 │ │ + ldr r0, [sp, #744] @ 0x2e8 │ │ @ instruction: 0xebff2004 │ │ - b.n b527e │ │ + b.n b528e │ │ lsls r4, r7, #6 │ │ - b.n b4a80 │ │ + b.n b4a90 │ │ movs r0, r0 │ │ - b.n b5064 │ │ + b.n b5074 │ │ asrs r2, r3, #1 │ │ - b.n b4aea │ │ + b.n b4afa │ │ lsls r4, r6, #30 │ │ - b.n b555e │ │ + b.n b556e │ │ movs r0, r0 │ │ - b.n b55f4 │ │ + b.n b5604 │ │ lsrs r7, r7, #31 │ │ - b.n b55f4 │ │ + b.n b5604 │ │ movs r4, r1 │ │ - b.n b545a │ │ + b.n b546a │ │ lsls r4, r0, #1 │ │ subs r0, r0, r0 │ │ - beq.n b4f80 │ │ - b.n b53f8 │ │ + beq.n b4f90 │ │ + b.n b5408 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r2, r3, r4, r6, ip, sp} │ │ - b.n b4b0a │ │ + b.n b4b1a │ │ ldr r7, [r7, r5] │ │ - b.n b56ae │ │ + b.n b56be │ │ cmp lr, pc │ │ - b.n b56b2 │ │ + b.n b56c2 │ │ str r5, [r2, #48] @ 0x30 │ │ - b.n b52b6 │ │ + b.n b52c6 │ │ lsls r6, r7, #23 │ │ - b.n b5626 │ │ + b.n b5636 │ │ orrs r5, r2 │ │ adds r1, #160 @ 0xa0 │ │ str r0, [r0, r0] │ │ - b.n b5582 │ │ + b.n b5592 │ │ ldrsh r0, [r6, r7] │ │ - b.n b5614 │ │ + b.n b5624 │ │ adds r3, #53 @ 0x35 │ │ - b.n b52ca │ │ + b.n b52da │ │ lsrs r7, r7, #5 │ │ - b.n b5634 │ │ + b.n b5644 │ │ cmp lr, pc │ │ adds r3, #160 @ 0xa0 │ │ movs r0, r6 │ │ - b.n b55ce │ │ + b.n b55de │ │ movs r0, #4 │ │ asrs r2, r2, #22 │ │ movs r0, r0 │ │ asrs r2, r2, #13 │ │ @ instruction: 0xffcd1aff │ │ movs r0, #4 │ │ - b.n b56e6 │ │ + b.n b56f6 │ │ movs r0, r1 │ │ - b.n b55e2 │ │ + b.n b55f2 │ │ movs r0, #172 @ 0xac │ │ - b.n b4fb2 │ │ + b.n b4fc2 │ │ movs r0, #4 │ │ - b.n b4ab4 │ │ + b.n b4ac4 │ │ movs r0, #8 │ │ - b.n b56f6 │ │ + b.n b5706 │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ movs r4, #190 @ 0xbe │ │ - b.n b535e │ │ + b.n b536e │ │ lsls r4, r6, #1 │ │ - b.n b55fa │ │ + b.n b560a │ │ adds r0, #8 │ │ - b.n b544a │ │ + b.n b545a │ │ movs r5, r1 │ │ lsrs r0, r0, #8 │ │ lsls r4, r7, #18 │ │ - b.n b536e │ │ + b.n b537e │ │ movs r0, #56 @ 0x38 │ │ - b.n b5452 │ │ + b.n b5462 │ │ movs r2, r0 │ │ - b.n b527c │ │ + b.n b528c │ │ movs r0, #3 │ │ - cbz r0, b5002 │ │ + cbz r0, b5012 │ │ movs r0, #8 │ │ - b.n b4ae0 │ │ + b.n b4af0 │ │ movs r0, r0 │ │ - b.n b4b04 │ │ + b.n b4b14 │ │ movs r0, r0 │ │ - b.n b5686 │ │ + b.n b5696 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ - b.n b500c │ │ - b.n b4af0 │ │ + b.n b501c │ │ + b.n b4b00 │ │ movs r0, r0 │ │ - b.n b5732 │ │ + b.n b5742 │ │ ands r4, r2 │ │ - b.n b4af8 │ │ - bl 510af6 │ │ - beq.n b501c │ │ - b.n b5494 │ │ + b.n b4b08 │ │ + bl 510b06 │ │ + beq.n b502c │ │ + b.n b54a4 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r0, r1, sp} │ │ - b.n b5346 │ │ + b.n b5356 │ │ movs r0, #8 │ │ - b.n b4b0c │ │ + b.n b4b1c │ │ movs r0, r0 │ │ - b.n b4b30 │ │ + b.n b4b40 │ │ movs r0, r0 │ │ - b.n b56b2 │ │ + b.n b56c2 │ │ @ instruction: 0xfff41aff │ │ lsls r4, r7, #3 │ │ - b.n b4b58 │ │ + b.n b4b68 │ │ lsls r0, r0, #1 │ │ - b.n b5656 │ │ + b.n b5666 │ │ movs r0, #248 @ 0xf8 │ │ - b.n b4b60 │ │ + b.n b4b70 │ │ strb r4, [r4, #0] │ │ - b.n b543e │ │ + b.n b544e │ │ adds r0, #244 @ 0xf4 │ │ - b.n b4b68 │ │ + b.n b4b78 │ │ movs r0, r0 │ │ - b.n b514c │ │ + b.n b515c │ │ str r0, [r6, r3] │ │ - b.n b4b70 │ │ + b.n b4b80 │ │ movs r0, #2 │ │ - b.n b5154 │ │ + b.n b5164 │ │ adds r0, #3 │ │ - b.n b5158 │ │ + b.n b5168 │ │ str r0, [r0, #0] │ │ - b.n b537e │ │ + b.n b538e │ │ str r5, [r0, r0] │ │ - b.n b5160 │ │ + b.n b5170 │ │ str r3, [r0, #0] │ │ lsls r0, r4, #6 │ │ movs r4, r0 │ │ - b.n b5682 │ │ + b.n b5692 │ │ str r2, [r0, r0] │ │ asrs r0, r4, #6 │ │ movs r4, r0 │ │ - b.n b5700 │ │ + b.n b5710 │ │ str r6, [r0, r0] │ │ lsls r0, r4, #6 │ │ movs r0, r1 │ │ - b.n b5692 │ │ + b.n b56a2 │ │ movs r0, #3 │ │ lsls r0, r4, #6 │ │ movs r2, r0 │ │ - b.n b569a │ │ + b.n b56aa │ │ movs r0, #0 │ │ asrs r0, r4, #6 │ │ str r4, [r1, r0] │ │ - b.n b4b6c │ │ + b.n b4b7c │ │ movs r0, #0 │ │ - b.n b4b70 │ │ + b.n b4b80 │ │ @ instruction: 0xffddeaff │ │ asrs r4, r1, #2 │ │ - b.n b4bb4 │ │ + b.n b4bc4 │ │ ands r0, r0 │ │ - b.n b53ba │ │ + b.n b53ca │ │ movs r0, #176 @ 0xb0 │ │ - b.n b5422 │ │ + b.n b5432 │ │ movs r1, r0 │ │ - b.n b57c2 │ │ + b.n b57d2 │ │ adds r0, #128 @ 0x80 │ │ - b.n b4bc4 │ │ + b.n b4bd4 │ │ asrs r1, r0, #32 │ │ - b.n b51a8 │ │ + b.n b51b8 │ │ movs r0, #0 │ │ - b.n b4ba8 │ │ + b.n b4bb8 │ │ movs r0, #10 │ │ - b.n b57d2 │ │ + b.n b57e2 │ │ adds r0, #3 │ │ - b.n b51b4 │ │ - ldr r0, [sp, #396] @ 0x18c │ │ + b.n b51c4 │ │ + ldr r0, [sp, #392] @ 0x188 │ │ @ instruction: 0xebff0004 │ │ - b.n b53de │ │ - beq.n b50c0 │ │ - b.n b5538 │ │ + b.n b53ee │ │ + beq.n b50d0 │ │ + b.n b5548 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r5, r6} │ │ - b.n b4be8 │ │ + b.n b4bf8 │ │ movs r0, r0 │ │ - b.n b51cc │ │ + b.n b51dc │ │ asrs r2, r3, #1 │ │ - b.n b4c52 │ │ + b.n b4c62 │ │ lsls r4, r6, #30 │ │ - b.n b56c6 │ │ + b.n b56d6 │ │ lsrs r7, r7, #31 │ │ - b.n b5758 │ │ + b.n b5768 │ │ movs r0, r0 │ │ - b.n b5760 │ │ + b.n b5770 │ │ @ instruction: 0xffa60aff │ │ asrs r0, r1, #1 │ │ - b.n b4c04 │ │ + b.n b4c14 │ │ adds r0, #72 @ 0x48 │ │ - b.n b4c08 │ │ + b.n b4c18 │ │ ands r4, r0 │ │ stmia.w sp, {r0, ip} │ │ - b.n b51f0 │ │ + b.n b5200 │ │ adds r0, #3 │ │ - b.n b51f4 │ │ + b.n b5204 │ │ ands r0, r1 │ │ - b.n b4bf4 │ │ + b.n b4c04 │ │ ands r0, r0 │ │ - b.n b541e │ │ + b.n b542e │ │ movs r1, r0 │ │ - b.n b5822 │ │ + b.n b5832 │ │ movs r0, #18 │ │ - b.n b5826 │ │ - ldr r0, [sp, #316] @ 0x13c │ │ + b.n b5836 │ │ + ldr r0, [sp, #312] @ 0x138 │ │ @ instruction: 0xebff0004 │ │ - b.n b542e │ │ - beq.n b5110 │ │ - b.n b5588 │ │ + b.n b543e │ │ + beq.n b5120 │ │ + b.n b5598 │ │ ldrh r0, [r6, #6] │ │ - ldmia.w sp!, {r2, r6, r8, fp, ip, pc} │ │ + ldmia.w sp!, {r2, r4, r6, r8, fp, ip, pc} │ │ movs r2, r0 │ │ - ldrh r7, [r5, r2] │ │ - vceq.i16 q10, q5, #0 │ │ - vtbl.8 d25, {d5-d6}, d8 │ │ - movs r2, r0 │ │ - add r1, pc, #772 @ (adr r1, b540c ) │ │ - @ instruction: 0xfff57d86 │ │ - vneg.f16 d25, d16 │ │ + ldrh r7, [r2, r0] │ │ + vcgt.s16 q10, q10, #0 │ │ + vqshrn.u64 d25, q4, #11 │ │ + movs r2, r0 │ │ + add r2, pc, #924 @ (adr r2, b54b4 ) │ │ + @ instruction: 0xfff57df9 │ │ + vqshl.u64 d25, d16, #53 @ 0x35 │ │ movs r2, r0 │ │ - add r1, pc, #484 @ (adr r1, b52f8 ) │ │ - @ instruction: 0xfff5ab1a │ │ + add r2, pc, #636 @ (adr r2, b53a0 ) │ │ + @ instruction: 0xfff5ab5a │ │ vsri.64 q14, q6, #11 │ │ movs r0, r0 │ │ stmia r5!, {r3, r5, r7} │ │ movs r0, r0 │ │ stmia r6!, {r2, r6, r7} │ │ movs r0, r0 │ │ stmia r7!, {r2, r3, r5} │ │ movs r0, r0 │ │ - ldr r7, [pc, #960] @ (b54ec ) │ │ + ldr r7, [pc, #960] @ (b54fc ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n b564c │ │ - beq.n b516c │ │ - b.n b55d0 │ │ + b.n b565c │ │ + beq.n b517c │ │ + b.n b55e0 │ │ strh r4, [r1, #0] │ │ - b.n b4c5a │ │ - add r0, pc, #0 @ (adr r0, b513c ) │ │ - b.n b547e │ │ + b.n b4c6a │ │ + add r0, pc, #0 @ (adr r0, b514c ) │ │ + b.n b548e │ │ str r1, [r0, #0] │ │ - b.n b5482 │ │ + b.n b5492 │ │ movs r0, r5 │ │ - b.n b4c76 │ │ + b.n b4c86 │ │ movs r1, r0 │ │ - b.n b53ea │ │ + b.n b53fa │ │ lsls r0, r1, #1 │ │ ldr r2, [sp, #0] │ │ strb r0, [r0, #1] │ │ - b.n b4c82 │ │ + b.n b4c92 │ │ movs r0, #16 │ │ - b.n b4c70 │ │ + b.n b4c80 │ │ movs r0, #6 │ │ - b.n b4d0a │ │ + b.n b4d1a │ │ lsls r4, r3, #1 │ │ - b.n b4d0c │ │ + b.n b4d1c │ │ asrs r0, r2, #32 │ │ - b.n b4c90 │ │ + b.n b4ca0 │ │ movs r2, r1 │ │ - b.n b578a │ │ + b.n b579a │ │ str r6, [r2, r0] │ │ - b.n b526c │ │ + b.n b527c │ │ movs r7, r3 │ │ lsrs r0, r0, #8 │ │ movs r0, #16 │ │ - b.n b4c9c │ │ + b.n b4cac │ │ movs r6, r0 │ │ - b.n b541a │ │ + b.n b542a │ │ lsls r3, r2, #1 │ │ subs r0, r0, r0 │ │ asrs r6, r2, #3 │ │ - b.n b5532 │ │ + b.n b5542 │ │ movs r4, r1 │ │ - b.n b4cb8 │ │ + b.n b4cc8 │ │ ands r0, r1 │ │ - b.n b4cbc │ │ + b.n b4ccc │ │ movs r1, r0 │ │ - b.n b586c │ │ + b.n b587c │ │ lsls r3, r2, #1 │ │ - bge.n b518e │ │ + bge.n b519e │ │ movs r0, #186 @ 0xba │ │ - b.n b553c │ │ + b.n b554c │ │ subs r4, r3, #7 │ │ - b.n b57b0 │ │ + b.n b57c0 │ │ movs r1, r0 │ │ - b.n b53be │ │ + b.n b53ce │ │ lsls r4, r3, #1 │ │ subs r0, r0, r0 │ │ movs r0, #0 │ │ - b.n b4ccc │ │ + b.n b4cdc │ │ adds r0, #4 │ │ - b.n b4cd0 │ │ + b.n b4ce0 │ │ asrs r2, r0, #32 │ │ - b.n b5252 │ │ + b.n b5262 │ │ asrs r3, r0, #32 │ │ - b.n b534e │ │ + b.n b535e │ │ lsls r5, r5, #1 │ │ subs r2, #0 │ │ movs r0, #188 @ 0xbc │ │ - b.n b5560 │ │ + b.n b5570 │ │ adds r0, #190 @ 0xbe │ │ - b.n b5564 │ │ + b.n b5574 │ │ movs r2, r0 │ │ - b.n b5464 │ │ + b.n b5474 │ │ movs r4, r4 │ │ subs r2, #0 │ │ movs r1, r0 │ │ - b.n b55ea │ │ + b.n b55fa │ │ movs r2, r4 │ │ subs r0, r0, r0 │ │ strb r0, [r1, #0] │ │ - b.n b4cfc │ │ + b.n b4d0c │ │ asrs r4, r2, #32 │ │ - b.n b56d8 │ │ + b.n b56e8 │ │ movs r0, r0 │ │ - b.n b5916 │ │ + b.n b5926 │ │ movs r7, r0 │ │ - b.n b547c │ │ + b.n b548c │ │ movs r6, r3 │ │ ldrh r0, [r0, #16] │ │ movs r0, #16 │ │ - b.n b4d1c │ │ + b.n b4d2c │ │ str r0, [r0, r0] │ │ - b.n b4cea │ │ - beq.n b5220 │ │ - b.n b5680 │ │ + b.n b4cfa │ │ + beq.n b5230 │ │ + b.n b5690 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, ip, pc} │ │ - b.n b5532 │ │ + b.n b5542 │ │ movs r4, r0 │ │ - b.n b4da8 │ │ + b.n b4db8 │ │ movs r0, r1 │ │ - b.n b581a │ │ + b.n b582a │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ negs r0, r0 │ │ - b.n b4d34 │ │ + b.n b4d44 │ │ asrs r6, r0, #32 │ │ - b.n b5546 │ │ + b.n b5556 │ │ movs r4, r0 │ │ - b.n b554a │ │ + b.n b555a │ │ lsls r3, r7, #15 │ │ add.w r0, r0, r0, lsl #2 │ │ - b.n b5312 │ │ + b.n b5322 │ │ lsls r0, r0, #4 │ │ - b.n b531e │ │ + b.n b532e │ │ asrs r4, r2, #32 │ │ - b.n b4d3a │ │ + b.n b4d4a │ │ movs r6, r0 │ │ - b.n b54c0 │ │ + b.n b54d0 │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ str r0, [sp, #64] @ 0x40 │ │ - b.n b4d58 │ │ + b.n b4d68 │ │ movs r0, r0 │ │ - b.n b58dc │ │ + b.n b58ec │ │ @ instruction: 0xffcf0aff │ │ @ instruction: 0xffefeaff │ │ lsls r4, r2, #9 │ │ - b.n b4d68 │ │ + b.n b4d78 │ │ asrs r6, r0, #32 │ │ - b.n b557a │ │ + b.n b558a │ │ lsls r3, r3, #15 │ │ add.w r0, r0, r0 │ │ - b.n b58e2 │ │ + b.n b58f2 │ │ @ instruction: 0xffed0aff │ │ @ instruction: 0xffc8eaff │ │ movs r0, r2 │ │ - b.n b574e │ │ + b.n b575e │ │ str r0, [r0, r0] │ │ - b.n b4d72 │ │ + b.n b4d82 │ │ @ instruction: 0xffc5eaff │ │ strb r0, [r1, #0] │ │ - b.n b4d88 │ │ + b.n b4d98 │ │ asrs r0, r2, #7 │ │ - b.n b4d9c │ │ + b.n b4dac │ │ movs r4, r2 │ │ - b.n b56f0 │ │ + b.n b5700 │ │ movs r0, r0 │ │ - b.n b4d80 │ │ + b.n b4d90 │ │ asrs r1, r0, #32 │ │ - b.n b5388 │ │ + b.n b5398 │ │ movs r5, r0 │ │ - b.n b55ae │ │ + b.n b55be │ │ movs r3, r6 │ │ and.w r1, r0, r8, lsl #6 │ │ - b.n b4db4 │ │ + b.n b4dc4 │ │ lsls r4, r6, #30 │ │ - b.n b588a │ │ + b.n b589a │ │ lsrs r7, r7, #31 │ │ - b.n b591c │ │ + b.n b592c │ │ str r0, [r0, r0] │ │ - b.n b59c2 │ │ + b.n b59d2 │ │ asrs r1, r0, #32 │ │ - b.n b53a4 │ │ + b.n b53b4 │ │ movs r1, r0 │ │ - b.n b570a │ │ + b.n b571a │ │ asrs r2, r3, #1 │ │ - b.n b4e30 │ │ + b.n b4e40 │ │ movs r0, r0 │ │ - b.n b5934 │ │ + b.n b5944 │ │ movs r6, r5 │ │ lsrs r0, r0, #8 │ │ asrs r0, r5, #5 │ │ - b.n b4dd8 │ │ + b.n b4de8 │ │ ands r0, r0 │ │ - b.n b55de │ │ + b.n b55ee │ │ adds r1, #100 @ 0x64 │ │ - b.n b4de0 │ │ + b.n b4df0 │ │ movs r1, r0 │ │ - b.n b59e6 │ │ + b.n b59f6 │ │ asrs r1, r0, #32 │ │ - b.n b53c8 │ │ + b.n b53d8 │ │ str r0, [r0, #0] │ │ - b.n b4dc8 │ │ + b.n b4dd8 │ │ adds r0, #3 │ │ - b.n b53d0 │ │ + b.n b53e0 │ │ str r2, [r0, #0] │ │ - b.n b55f6 │ │ + b.n b5606 │ │ cmp r7, #106 @ 0x6a │ │ - b.n b59fa │ │ - str r7, [sp, #872] @ 0x368 │ │ + b.n b5a0a │ │ + str r7, [sp, #868] @ 0x364 │ │ @ instruction: 0xebff2006 │ │ - b.n b5602 │ │ + b.n b5612 │ │ movs r4, r0 │ │ - b.n b5606 │ │ + b.n b5616 │ │ movs r1, r4 │ │ and.w r1, r0, ip, ror #4 │ │ - b.n b4e0c │ │ + b.n b4e1c │ │ movs r5, r0 │ │ - b.n b5612 │ │ + b.n b5622 │ │ adds r0, #6 │ │ - b.n b5616 │ │ + b.n b5626 │ │ asrs r1, r0, #32 │ │ - b.n b53f8 │ │ + b.n b5408 │ │ movs r0, r3 │ │ and.w r0, r0, r0, lsl #16 │ │ - b.n b4dfc │ │ + b.n b4e0c │ │ subs r4, r3, #7 │ │ - b.n b5900 │ │ + b.n b5910 │ │ movs r4, r0 │ │ - b.n b4e04 │ │ + b.n b4e14 │ │ movs r4, r2 │ │ - b.n b5808 │ │ + b.n b5818 │ │ movs r0, #5 │ │ - b.n b5632 │ │ + b.n b5642 │ │ adds r0, #10 │ │ - b.n b5636 │ │ + b.n b5646 │ │ lsls r1, r3, #17 │ │ add.w r0, r0, r4, lsr #20 │ │ - b.n b4e38 │ │ + b.n b4e48 │ │ movs r0, r3 │ │ - b.n b4e3c │ │ + b.n b4e4c │ │ movs r0, #16 │ │ - b.n b4e40 │ │ + b.n b4e50 │ │ str r0, [r0, r0] │ │ - b.n b4e0e │ │ - beq.n b5344 │ │ - b.n b57a4 │ │ + b.n b4e1e │ │ + beq.n b5354 │ │ + b.n b57b4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r4, r6, r7, r8, r9, sl, fp} │ │ - b.n b5930 │ │ + b.n b5940 │ │ movs r0, r0 │ │ - b.n b553e │ │ + b.n b554e │ │ movs r3, r5 │ │ subs r0, r0, r0 │ │ asrs r0, r6, #3 │ │ - b.n b4e60 │ │ + b.n b4e70 │ │ movs r5, r0 │ │ - b.n b5666 │ │ + b.n b5676 │ │ strb r4, [r5, #3] │ │ - b.n b4e68 │ │ + b.n b4e78 │ │ adds r0, #236 @ 0xec │ │ - b.n b4e6c │ │ + b.n b4e7c │ │ asrs r1, r0, #32 │ │ - b.n b5450 │ │ + b.n b5460 │ │ strb r7, [r0, #0] │ │ - b.n b5454 │ │ + b.n b5464 │ │ movs r0, #0 │ │ - b.n b4e54 │ │ + b.n b4e64 │ │ adds r0, #3 │ │ - b.n b545c │ │ + b.n b546c │ │ movs r0, #7 │ │ - b.n b5682 │ │ + b.n b5692 │ │ lsls r3, r2, #16 │ │ add.w r7, r0, r4, ror #2 │ │ - b.n b595a │ │ + b.n b596a │ │ movs r0, #16 │ │ - b.n b4e88 │ │ + b.n b4e98 │ │ lsrs r7, r7, #31 │ │ - b.n b59f0 │ │ + b.n b5a00 │ │ asrs r4, r0, #32 │ │ - b.n b4e86 │ │ + b.n b4e96 │ │ asrs r2, r0, #32 │ │ - b.n b5a5c │ │ + b.n b5a6c │ │ asrs r4, r0, #32 │ │ - b.n b4e6e │ │ + b.n b4e7e │ │ str r0, [r0, r0] │ │ - b.n b4e66 │ │ - beq.n b539c │ │ - b.n b57fc │ │ + b.n b4e76 │ │ + beq.n b53ac │ │ + b.n b580c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r5, sp, lr, pc} │ │ - b.n b587e │ │ + b.n b588e │ │ stmia r0!, {r3} │ │ - b.n b4eae │ │ + b.n b4ebe │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n b4eb2 │ │ + b.n b4ec2 │ │ str r2, [r0, #0] │ │ - b.n b5432 │ │ + b.n b5442 │ │ str r3, [r0, #0] │ │ - b.n b5530 │ │ + b.n b5540 │ │ movs r4, r0 │ │ subs r2, #0 │ │ str r0, [r0, #0] │ │ - b.n b4ec2 │ │ + b.n b4ed2 │ │ asrs r4, r0, #32 │ │ - b.n b4ec6 │ │ + b.n b4ed6 │ │ str r6, [r0, #0] │ │ - b.n b5436 │ │ + b.n b5446 │ │ asrs r1, r0, #32 │ │ - b.n b5532 │ │ + b.n b5542 │ │ @ instruction: 0xff862aff │ │ asrs r4, r0, #32 │ │ - b.n b53f2 │ │ + b.n b5402 │ │ strb r0, [r0, #0] │ │ - b.n b53f0 │ │ + b.n b5400 │ │ asrs r7, r0, #32 │ │ - b.n b56c4 │ │ + b.n b56d4 │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ stmia r0!, {r3, r4, r5, r6} │ │ - b.n b4ee8 │ │ + b.n b4ef8 │ │ strb r0, [r7, #1] │ │ - b.n b4eec │ │ + b.n b4efc │ │ lsls r0, r0, #9 │ │ ldmia.w lr, {r2, r3, lr, pc} │ │ - b.n b54d4 │ │ + b.n b54e4 │ │ asrs r0, r0, #32 │ │ - b.n b540c │ │ + b.n b541c │ │ str r4, [r0, #0] │ │ - b.n b540a │ │ + b.n b541a │ │ strb r7, [r0, #0] │ │ - b.n b54e0 │ │ + b.n b54f0 │ │ asrs r1, r0, #32 │ │ - b.n b56f2 │ │ + b.n b5702 │ │ strb r4, [r1, #0] │ │ lsls r0, r4, #6 │ │ movs r6, r0 │ │ and.w r0, r0, ip, ror #4 │ │ - b.n b4f10 │ │ + b.n b4f20 │ │ movs r5, r0 │ │ - b.n b5716 │ │ + b.n b5726 │ │ asrs r1, r0, #32 │ │ - b.n b54f8 │ │ + b.n b5508 │ │ lsls r5, r5, #15 │ │ @ instruction: 0xeb00ffd8 │ │ @ instruction: 0xeaff7038 │ │ - b.n b4f24 │ │ + b.n b4f34 │ │ strb r7, [r0, #0] │ │ - b.n b5508 │ │ + b.n b5518 │ │ asrs r4, r7, #32 │ │ - b.n b4f2c │ │ + b.n b4f3c │ │ ands r0, r1 │ │ - b.n b4f0c │ │ + b.n b4f1c │ │ asrs r1, r0, #32 │ │ - b.n b5514 │ │ + b.n b5524 │ │ movs r4, r1 │ │ - b.n b4f14 │ │ + b.n b4f24 │ │ strb r0, [r0, #0] │ │ - b.n b4f18 │ │ + b.n b4f28 │ │ @ instruction: 0xff99eaff │ │ - str r5, [sp, #800] @ 0x320 │ │ + str r5, [sp, #864] @ 0x360 │ │ movs r2, r0 │ │ - add r1, sp, #500 @ 0x1f4 │ │ - vrsra.u64 q13, , #11 │ │ - @ instruction: 0xfff59cb4 │ │ - vqrdmlah.s q9, , d5[0] │ │ - vtbl.8 d26, {d5-d6}, d29 │ │ - vcvt.u32.f32 d23, d2, #11 │ │ - vtbl.8 d21, {d5-d7}, d8 │ │ - vtbx.8 d24, {d21}, d23 │ │ - vqshrn.u64 d24, , #11 │ │ - vtbl.8 d22, {d5-d8}, d10 │ │ - vsri.32 , , #11 │ │ - vsri.64 d26, d18, #11 │ │ + add r1, sp, #756 @ 0x2f4 │ │ + vsri.32 q13, , #11 │ │ + vcvt.f32.u32 d25, d19, #11 │ │ + @ instruction: 0xfff52e87 │ │ + vtbx.8 d26, {d5-d6}, d29 │ │ + vcgt.s16 q12, q1, #0 │ │ + vqshrn.u64 d21, , #11 │ │ + vtbx.8 d24, {d21-d22}, d11 │ │ + @ instruction: 0xfff589ff │ │ + vtbx.8 d22, {d21-d23}, d12 │ │ + vclt.f16 , q7, #0 │ │ + vsli.32 d26, d24, #21 │ │ @ instruction: 0xfff54ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n b5958 │ │ - beq.n b5478 │ │ - b.n b58dc │ │ + b.n b5968 │ │ + beq.n b5488 │ │ + b.n b58ec │ │ ands r0, r0 │ │ - b.n b5786 │ │ + b.n b5796 │ │ lsls r5, r2, #3 │ │ - b.n b57ea │ │ - add r0, pc, #112 @ (adr r0, b54bc ) │ │ - b.n b5956 │ │ + b.n b57fa │ │ + add r0, pc, #112 @ (adr r0, b54cc ) │ │ + b.n b5966 │ │ movs r4, r0 │ │ - b.n b5a76 │ │ + b.n b5a86 │ │ str r2, [r0, r0] │ │ - b.n b5796 │ │ + b.n b57a6 │ │ strh r0, [r0, #0] │ │ - b.n b5b9a │ │ + b.n b5baa │ │ str r0, [r0, #16] │ │ - b.n b5392 │ │ + b.n b53a2 │ │ asrs r4, r1, #32 │ │ - b.n b4f7c │ │ + b.n b4f8c │ │ asrs r0, r0, #32 │ │ lsls r0, r4, #15 │ │ str r0, [r3, #0] │ │ - b.n b4f84 │ │ + b.n b4f94 │ │ lsls r4, r7, #2 │ │ lsls r6, r2, #7 │ │ movs r0, #186 @ 0xba │ │ - b.n b581e │ │ + b.n b582e │ │ strh r0, [r4, #4] │ │ lsls r1, r0, #2 │ │ movs r1, r0 │ │ - b.n b5a9e │ │ + b.n b5aae │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ movs r6, r0 │ │ - b.n b502a │ │ + b.n b503a │ │ asrs r2, r0, #32 │ │ - b.n b54c6 │ │ + b.n b54d6 │ │ movs r0, r0 │ │ - b.n b5bca │ │ + b.n b5bda │ │ movs r7, r4 │ │ - b.n b5ab0 │ │ + b.n b5ac0 │ │ lsls r3, r1, #2 │ │ subs r0, r0, r0 │ │ - beq.n b54cc │ │ - b.n b592c │ │ + beq.n b54dc │ │ + b.n b593c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, r4, r5, r6, ip, pc} │ │ - b.n b59a6 │ │ + b.n b59b6 │ │ movs r1, r1 │ │ and.w r0, r0, r4, lsl #4 │ │ - b.n b57e6 │ │ + b.n b57f6 │ │ asrs r4, r6, #2 │ │ add.w r0, r0, r0 │ │ - b.n b5b4e │ │ + b.n b5b5e │ │ lsls r2, r5, #1 │ │ subs r0, r0, r0 │ │ lsls r5, r2, #3 │ │ - b.n b585e │ │ + b.n b586e │ │ str r0, [r0, #16] │ │ - b.n b53ee │ │ + b.n b53fe │ │ str r0, [r3, #0] │ │ - b.n b4fd8 │ │ + b.n b4fe8 │ │ movs r0, #186 @ 0xba │ │ - b.n b586e │ │ + b.n b587e │ │ movs r1, r0 │ │ - b.n b5aea │ │ + b.n b5afa │ │ @ instruction: 0xffec0aff │ │ movs r4, r1 │ │ - b.n b5af8 │ │ + b.n b5b08 │ │ movs r3, r1 │ │ subs r0, r0, r0 │ │ movs r0, #12 │ │ - b.n b5010 │ │ + b.n b5020 │ │ movs r0, r2 │ │ - b.n b59f4 │ │ + b.n b5a04 │ │ asrs r4, r0, #32 │ │ - b.n b581e │ │ + b.n b582e │ │ lsrs r6, r5, #31 │ │ add.w r0, r0, r0, lsr #32 │ │ - b.n b5020 │ │ + b.n b5030 │ │ movs r0, r0 │ │ - b.n b5b8a │ │ + b.n b5b9a │ │ lsls r5, r2, #3 │ │ asrs r4, r2, #7 │ │ asrs r4, r2, #32 │ │ asrs r5, r3, #23 │ │ lsls r0, r0, #2 │ │ asrs r1, r1, #2 │ │ lsls r0, r6, #2 │ │ asrs r0, r2, #7 │ │ movs r1, r0 │ │ asrs r0, r0, #2 │ │ strh r1, [r0, #0] │ │ asrs r0, r0, #9 │ │ movs r4, r2 │ │ - b.n b5a12 │ │ + b.n b5a22 │ │ adds r0, #4 │ │ - b.n b5036 │ │ + b.n b5046 │ │ asrs r0, r1, #2 │ │ - b.n b560e │ │ + b.n b561e │ │ movs r0, #0 │ │ - b.n b503e │ │ + b.n b504e │ │ asrs r0, r6, #2 │ │ - b.n b58b8 │ │ + b.n b58c8 │ │ asrs r1, r0, #32 │ │ - b.n b543a │ │ + b.n b544a │ │ movs r4, r0 │ │ - b.n b585e │ │ + b.n b586e │ │ movs r0, #240 @ 0xf0 │ │ - b.n b58bc │ │ + b.n b58cc │ │ movs r0, #24 │ │ - b.n b5a40 │ │ + b.n b5a50 │ │ mrc2 11, 7, lr, cr15, cr15, {7} @ │ │ movs r0, r0 │ │ - b.n b5bce │ │ + b.n b5bde │ │ lsls r2, r1, #1 │ │ subs r0, r0, r0 │ │ lsls r5, r2, #3 │ │ - b.n b58de │ │ + b.n b58ee │ │ movs r4, r0 │ │ - b.n b5b64 │ │ + b.n b5b74 │ │ asrs r0, r0, #32 │ │ lsls r0, r4, #15 │ │ lsls r0, r0, #2 │ │ - b.n b5654 │ │ + b.n b5664 │ │ strh r0, [r6, #4] │ │ - b.n b58c6 │ │ + b.n b58d6 │ │ strh r0, [r0, #0] │ │ - b.n b5c8a │ │ + b.n b5c9a │ │ movs r0, r3 │ │ lsls r5, r3, #22 │ │ lsls r4, r7, #2 │ │ lsls r0, r2, #7 │ │ strh r0, [r4, #4] │ │ lsls r1, r0, #2 │ │ lsls r5, r2, #3 │ │ - b.n b5902 │ │ + b.n b5912 │ │ movs r7, r2 │ │ - b.n b5bfe │ │ + b.n b5c0e │ │ movs r3, r4 │ │ add r2, sp, #0 │ │ movs r1, r0 │ │ - b.n b5a66 │ │ + b.n b5a76 │ │ movs r5, r0 │ │ - b.n b50f2 │ │ + b.n b5102 │ │ str r0, [r3, #0] │ │ - b.n b50a8 │ │ + b.n b50b8 │ │ movs r1, r0 │ │ - b.n b5b9c │ │ + b.n b5bac │ │ lsls r0, r6, #1 │ │ - b.n b52d4 │ │ + b.n b52e4 │ │ str r0, [r0, #16] │ │ - b.n b548e │ │ + b.n b549e │ │ lsls r5, r2, #3 │ │ - b.n b5926 │ │ + b.n b5936 │ │ lsls r0, r0, #2 │ │ - b.n b5694 │ │ + b.n b56a4 │ │ strh r0, [r6, #4] │ │ - b.n b5906 │ │ + b.n b5916 │ │ @ instruction: 0xffcc0aff │ │ asrs r5, r2, #3 │ │ - b.n b5936 │ │ + b.n b5946 │ │ movs r4, r1 │ │ - b.n b50ba │ │ + b.n b50ca │ │ movs r1, #1 │ │ - b.n b54ca │ │ + b.n b54da │ │ str r0, [r7, #0] │ │ - b.n b50ba │ │ + b.n b50ca │ │ asrs r4, r7, #32 │ │ - b.n b50be │ │ + b.n b50ce │ │ adds r0, #0 │ │ - b.n b50c6 │ │ + b.n b50d6 │ │ strb r4, [r0, #0] │ │ - b.n b50ca │ │ + b.n b50da │ │ adds r0, #6 │ │ - b.n b55f0 │ │ + b.n b5600 │ │ asrs r1, r0, #32 │ │ - b.n b55fc │ │ + b.n b560c │ │ asrs r1, r0, #32 │ │ - b.n b58d8 │ │ + b.n b58e8 │ │ @ instruction: 0xffba1aff │ │ str r0, [r0, #36] @ 0x24 │ │ - b.n b50da │ │ + b.n b50ea │ │ movs r0, r0 │ │ - b.n b5c6a │ │ + b.n b5c7a │ │ @ instruction: 0xffbb0aff │ │ asrs r2, r7, #2 │ │ - b.n b596a │ │ + b.n b597a │ │ lsls r0, r0, #1 │ │ - b.n b5bec │ │ + b.n b5bfc │ │ @ instruction: 0xffb81aff │ │ asrs r0, r2, #32 │ │ - b.n b50f6 │ │ + b.n b5106 │ │ strb r0, [r7, #8] │ │ - b.n b50f6 │ │ + b.n b5106 │ │ movs r6, r0 │ │ - b.n b591a │ │ + b.n b592a │ │ lsls r7, r0, #12 │ │ add.w r0, r0, r0, lsl #2 │ │ - b.n b56e2 │ │ + b.n b56f2 │ │ lsls r0, r0, #4 │ │ - b.n b56f2 │ │ + b.n b5702 │ │ movs r0, r2 │ │ - b.n b510a │ │ + b.n b511a │ │ strb r4, [r0, #0] │ │ - b.n b4fee │ │ + b.n b4ffe │ │ @ instruction: 0xffafeaff │ │ asrs r4, r0, #32 │ │ - b.n b5936 │ │ + b.n b5946 │ │ lsrs r0, r2, #31 │ │ - b.n b5c18 │ │ + b.n b5c28 │ │ movs r0, #4 │ │ - b.n b51e0 │ │ + b.n b51f0 │ │ movs r1, r0 │ │ - b.n b5c26 │ │ + b.n b5c36 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ asrs r0, r3, #32 │ │ - b.n b5132 │ │ + b.n b5142 │ │ movs r0, #180 @ 0xb4 │ │ - b.n b59b6 │ │ + b.n b59c6 │ │ movs r0, r0 │ │ - b.n b5cb4 │ │ + b.n b5cc4 │ │ movs r0, #0 │ │ - b.n b591a │ │ + b.n b592a │ │ movs r0, #180 @ 0xb4 │ │ - b.n b59a2 │ │ + b.n b59b2 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, #0 │ │ - b.n b5d62 │ │ + b.n b5d72 │ │ movs r0, #188 @ 0xbc │ │ - b.n b5128 │ │ + b.n b5138 │ │ asrs r4, r0, #32 │ │ - b.n b5b2c │ │ + b.n b5b3c │ │ movs r2, r0 │ │ and.w r0, r0, r0, lsr #8 │ │ - b.n b515a │ │ + b.n b516a │ │ adds r0, #0 │ │ - b.n b5d76 │ │ + b.n b5d86 │ │ adds r0, #8 │ │ - b.n b513e │ │ + b.n b514e │ │ movs r1, r0 │ │ - b.n b5b3e │ │ + b.n b5b4e │ │ lsls r0, r6, #2 │ │ - b.n b59c4 │ │ + b.n b59d4 │ │ movs r4, r1 │ │ - b.n b516e │ │ + b.n b517e │ │ asrs r4, r0, #32 │ │ - b.n b516a │ │ + b.n b517a │ │ asrs r2, r0, #32 │ │ - b.n b5d50 │ │ + b.n b5d60 │ │ asrs r4, r0, #32 │ │ - b.n b5152 │ │ + b.n b5162 │ │ lsls r4, r6, #30 │ │ - b.n b5c66 │ │ + b.n b5c76 │ │ lsrs r7, r7, #31 │ │ - b.n b5cf8 │ │ + b.n b5d08 │ │ movs r1, r1 │ │ - b.n b5d5e │ │ + b.n b5d6e │ │ movs r0, #4 │ │ - b.n b59a2 │ │ + b.n b59b2 │ │ subs r0, r2, #7 │ │ - b.n b5c84 │ │ + b.n b5c94 │ │ adds r0, #4 │ │ - b.n b524e │ │ + b.n b525e │ │ movs r1, r0 │ │ - b.n b5c94 │ │ + b.n b5ca4 │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ movs r0, #24 │ │ - b.n b519e │ │ + b.n b51ae │ │ adds r0, #180 @ 0xb4 │ │ - b.n b5a22 │ │ + b.n b5a32 │ │ movs r0, r0 │ │ - b.n b5d22 │ │ + b.n b5d32 │ │ adds r0, #1 │ │ - b.n b5988 │ │ + b.n b5998 │ │ adds r0, #180 @ 0xb4 │ │ - b.n b5a0e │ │ + b.n b5a1e │ │ @ instruction: 0xff810aff │ │ adds r0, #0 │ │ - b.n b5dce │ │ + b.n b5dde │ │ adds r0, #188 @ 0xbc │ │ - b.n b5196 │ │ + b.n b51a6 │ │ movs r0, #4 │ │ - b.n b5b9a │ │ + b.n b5baa │ │ asrs r1, r0, #32 │ │ - b.n b5b9c │ │ + b.n b5bac │ │ asrs r0, r6, #2 │ │ - b.n b5a22 │ │ - beq.n b56d8 │ │ - b.n b5b38 │ │ + b.n b5a32 │ │ + beq.n b56e8 │ │ + b.n b5b48 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, ip, sp} │ │ - b.n b51d2 │ │ + b.n b51e2 │ │ strb r0, [r0, #0] │ │ - b.n b5dee │ │ + b.n b5dfe │ │ strb r0, [r1, #0] │ │ - b.n b51b8 │ │ + b.n b51c8 │ │ asrs r1, r0, #32 │ │ - b.n b5bb8 │ │ + b.n b5bc8 │ │ asrs r0, r6, #2 │ │ - b.n b5a3e │ │ - beq.n b56f4 │ │ - b.n b5b54 │ │ + b.n b5a4e │ │ + beq.n b5704 │ │ + b.n b5b64 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r6} │ │ - b.n b5204 │ │ + b.n b5214 │ │ movs r0, r0 │ │ - b.n b57e8 │ │ + b.n b57f8 │ │ asrs r2, r3, #1 │ │ - b.n b526e │ │ + b.n b527e │ │ lsls r4, r6, #30 │ │ - b.n b5ce2 │ │ + b.n b5cf2 │ │ lsrs r7, r7, #31 │ │ - b.n b5d74 │ │ + b.n b5d84 │ │ movs r0, r0 │ │ - b.n b5d7c │ │ + b.n b5d8c │ │ @ instruction: 0xffdf0aff │ │ asrs r0, r6, #32 │ │ - b.n b5220 │ │ + b.n b5230 │ │ str r0, [r0, r0] │ │ - b.n b5a26 │ │ + b.n b5a36 │ │ str r0, [r2, #0] │ │ - b.n b5216 │ │ + b.n b5226 │ │ movs r1, r0 │ │ - b.n b5e2e │ │ + b.n b5e3e │ │ adds r0, #36 @ 0x24 │ │ - b.n b5230 │ │ + b.n b5240 │ │ asrs r1, r0, #32 │ │ - b.n b5814 │ │ + b.n b5824 │ │ str r0, [r0, #0] │ │ - b.n b5214 │ │ + b.n b5224 │ │ adds r0, #3 │ │ - b.n b581c │ │ + b.n b582c │ │ movs r0, #4 │ │ - b.n b521c │ │ + b.n b522c │ │ movs r0, #126 @ 0x7e │ │ - b.n b5e46 │ │ - str r6, [sp, #796] @ 0x31c │ │ + b.n b5e56 │ │ + str r6, [sp, #792] @ 0x318 │ │ @ instruction: 0xebff0005 │ │ - b.n b5a4e │ │ + b.n b5a5e │ │ @ instruction: 0xffd2eaff │ │ - str r1, [sp, #528] @ 0x210 │ │ + str r1, [sp, #592] @ 0x250 │ │ movs r2, r0 │ │ - ldr r0, [sp, #852] @ 0x354 │ │ - vcvt.f32.u32 d18, d17, #11 │ │ + ldr r2, [sp, #336] @ 0x150 │ │ + vcvt.f32.u32 q9, , #11 │ │ @ instruction: 0xfff548f0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n b5c40 │ │ - beq.n b5738 │ │ - b.n b5bc4 │ │ + b.n b5c50 │ │ + beq.n b5748 │ │ + b.n b5bd4 │ │ lsls r2, r7 │ │ - b.n b5ad0 │ │ + b.n b5ae0 │ │ movs r0, r4 │ │ - b.n b5d5a │ │ + b.n b5d6a │ │ movs r3, r3 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n b5d62 │ │ + b.n b5d72 │ │ movs r6, r2 │ │ subs r0, r0, r0 │ │ adds r0, #188 @ 0xbc │ │ - b.n b5ae4 │ │ + b.n b5af4 │ │ str r6, [r7, #8] │ │ - b.n b5ae8 │ │ + b.n b5af8 │ │ str r3, [r0, r0] │ │ - b.n b57d6 │ │ + b.n b57e6 │ │ lsls r1, r0, #3 │ │ - b.n b5df8 │ │ + b.n b5e08 │ │ movs r1, r2 │ │ rev r0, r0 │ │ str r4, [r2, #0] │ │ - b.n b5c62 │ │ + b.n b5c72 │ │ str r3, [r0, #0] │ │ - b.n b5ee6 │ │ + b.n b5ef6 │ │ movs r6, r0 │ │ - b.n b5a02 │ │ + b.n b5a12 │ │ movs r4, r3 │ │ subs r2, #0 │ │ ldrsh r4, [r7, r7] │ │ - b.n b5d84 │ │ + b.n b5d94 │ │ adds r0, #23 │ │ - b.n b5c70 │ │ + b.n b5c80 │ │ str r1, [r0, r0] │ │ - b.n b5dee │ │ + b.n b5dfe │ │ adds r0, #5 │ │ - b.n b5778 │ │ + b.n b5788 │ │ strb r2, [r0, #0] │ │ - b.n b5ab6 │ │ + b.n b5ac6 │ │ ands r0, r0 │ │ - b.n b5aba │ │ + b.n b5aca │ │ movs r0, #3 │ │ - b.n b5abe │ │ + b.n b5ace │ │ str r1, [r0, r0] │ │ - b.n b5ac2 │ │ - ldrb r7, [r1, #28] │ │ + b.n b5ad2 │ │ + ldrb r4, [r2, #27] │ │ mla r0, r0, r5, r1 │ │ - b.n b5aca │ │ + b.n b5ada │ │ movs r4, r0 │ │ - b.n b5ace │ │ + b.n b5ade │ │ movs r0, #6 │ │ - b.n b5820 │ │ + b.n b5830 │ │ asrs r5, r0, #32 │ │ - b.n b58a2 │ │ + b.n b58b2 │ │ movs r4, r0 │ │ - b.n b58a6 │ │ - beq.n b57bc │ │ - b.n b5c34 │ │ - ldr r0, [pc, #960] @ (b5b60 ) │ │ + b.n b58b6 │ │ + beq.n b57cc │ │ + b.n b5c44 │ │ + ldr r0, [pc, #960] @ (b5b70 ) │ │ ldmia.w sp!, {r1, r2, r3, r5, r6, r7, r8, r9, fp, pc} │ │ and.w r0, r0, ip, ror #14 │ │ - b.n b5b4c │ │ + b.n b5b5c │ │ str r0, [r7, #8] │ │ - b.n b5b50 │ │ + b.n b5b60 │ │ str r3, [r4, r2] │ │ - b.n b5af2 │ │ + b.n b5b02 │ │ lsls r5, r2, #26 │ │ - b.n b57c2 │ │ + b.n b57d2 │ │ str r4, [r2, #0] │ │ - b.n b5cc6 │ │ + b.n b5cd6 │ │ movs r2, r0 │ │ - b.n b5a6a │ │ + b.n b5a7a │ │ movs r4, r0 │ │ ldrh r0, [r0, #16] │ │ str r6, [r0, r0] │ │ - b.n b5b06 │ │ + b.n b5b16 │ │ movs r0, #6 │ │ - b.n b5b0a │ │ - beq.n b57ec │ │ - b.n b5c64 │ │ - ldr r0, [pc, #960] @ (b5b90 ) │ │ + b.n b5b1a │ │ + beq.n b57fc │ │ + b.n b5c74 │ │ + ldr r0, [pc, #960] @ (b5ba0 ) │ │ ldmia.w sp!, {r1, r5, r6, r7, r8, r9, fp, pc} │ │ and.w r0, r0, r2, lsl #24 │ │ - b.n b5b1a │ │ + b.n b5b2a │ │ str r0, [r0, r0] │ │ - b.n b5b1e │ │ + b.n b5b2e │ │ movs r0, r4 │ │ - b.n b5e0a │ │ + b.n b5e1a │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ stmia r0!, {r5, r6} │ │ - b.n b5328 │ │ + b.n b5338 │ │ lsls r6, r7, #2 │ │ - b.n b5b90 │ │ + b.n b5ba0 │ │ movs r0, #92 @ 0x5c │ │ - b.n b5330 │ │ + b.n b5340 │ │ stmia r0!, {r2, r3} │ │ - b.n b5914 │ │ + b.n b5924 │ │ movs r0, r0 │ │ - b.n b5314 │ │ + b.n b5324 │ │ movs r0, #2 │ │ - b.n b591c │ │ + b.n b592c │ │ movs r6, r0 │ │ @ instruction: 0xea00c03c │ │ - b.n b5344 │ │ + b.n b5354 │ │ lsls r3, r4, #2 │ │ - b.n b5b4a │ │ + b.n b5b5a │ │ strb r0, [r7, #2] │ │ - b.n b5bb0 │ │ + b.n b5bc0 │ │ movs r0, #52 @ 0x34 │ │ - b.n b5350 │ │ + b.n b5360 │ │ stmia r0!, {r2, r3} │ │ - b.n b5934 │ │ + b.n b5944 │ │ lsls r1, r0, #2 │ │ stmia.w sp, {r1, sp} │ │ - b.n b593c │ │ + b.n b594c │ │ movs r1, r0 │ │ - b.n b5b62 │ │ + b.n b5b72 │ │ adds r0, #1 │ │ - b.n b5b66 │ │ + b.n b5b76 │ │ asrs r4, r1, #32 │ │ - b.n b5b6a │ │ + b.n b5b7a │ │ lsls r1, r3, #11 │ │ add.w r0, r0, r5 │ │ - b.n b5b72 │ │ + b.n b5b82 │ │ asrs r6, r0, #32 │ │ - b.n b5b76 │ │ + b.n b5b86 │ │ movs r0, #255 @ 0xff │ │ - b.n b5f7a │ │ - ldrb r4, [r3, #24] │ │ - mls r0, r0, r0, sp │ │ - b.n b5cd8 │ │ + b.n b5f8a │ │ + ldrb r1, [r2, #26] │ │ + @ instruction: 0xfa00d010 │ │ + b.n b5ce8 │ │ ldrh r0, [r6, #6] │ │ - ldmia.w sp!, {r1, r3, r4, r6, r7, r8, fp, sp, pc} │ │ - vqrdmlsh.s , , d24[0] │ │ - vrshr.u32 d21, d4, #11 │ │ - @ instruction: 0xfff59f88 │ │ + ldmia.w sp!, {r1, r3, r6, r7, r8, fp, sp, pc} │ │ + vqrdmlsh.s , , d30[0] │ │ + vsra.u32 , q14, #11 │ │ + vcgt.s16 d26, d14, #0 │ │ @ instruction: 0xfff54ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n b5d78 │ │ - beq.n b58a8 │ │ - b.n b5cfc │ │ + b.n b5d88 │ │ + beq.n b58b8 │ │ + b.n b5d0c │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n b5388 │ │ + b.n b5398 │ │ str r2, [r0, r0] │ │ - b.n b5baa │ │ - b.n b586c │ │ - b.n b5bae │ │ + b.n b5bba │ │ + b.n b587c │ │ + b.n b5bbe │ │ str r0, [sp, #128] @ 0x80 │ │ - b.n b538c │ │ - add r0, pc, #160 @ (adr r0, b5914 ) │ │ - b.n b53a8 │ │ + b.n b539c │ │ + add r0, pc, #160 @ (adr r0, b5924 ) │ │ + b.n b53b8 │ │ movs r2, r0 │ │ - b.n b5b2e │ │ + b.n b5b3e │ │ lsls r4, r3, #1 │ │ ldr r2, [sp, #0] │ │ lsls r0, r0, #1 │ │ - b.n b53b4 │ │ + b.n b53c4 │ │ strb r1, [r0, #0] │ │ - b.n b5bc6 │ │ + b.n b5bd6 │ │ movs r0, #6 │ │ - b.n b543c │ │ + b.n b544c │ │ ands r4, r1 │ │ - b.n b53c4 │ │ + b.n b53d4 │ │ asrs r4, r3, #1 │ │ - b.n b5432 │ │ + b.n b5442 │ │ movs r2, r1 │ │ - b.n b5eba │ │ + b.n b5eca │ │ movs r0, r2 │ │ - b.n b53ba │ │ + b.n b53ca │ │ str r0, [r1, #0] │ │ - b.n b53d4 │ │ + b.n b53e4 │ │ strh r5, [r2, #8] │ │ - b.n b59a2 │ │ + b.n b59b2 │ │ movs r2, r5 │ │ lsrs r0, r0, #8 │ │ movs r0, #16 │ │ - b.n b53da │ │ + b.n b53ea │ │ movs r5, r0 │ │ - b.n b5b52 │ │ + b.n b5b62 │ │ lsls r4, r4, #1 │ │ subs r0, r0, r0 │ │ lsls r6, r2, #3 │ │ - b.n b5c64 │ │ + b.n b5c74 │ │ movs r1, r0 │ │ - b.n b5f9a │ │ + b.n b5faa │ │ lsls r4, r5, #1 │ │ - bge.n b58be │ │ + bge.n b58ce │ │ movs r0, #186 @ 0xba │ │ - b.n b5c72 │ │ + b.n b5c82 │ │ lsrs r3, r7, #31 │ │ - b.n b5ee0 │ │ + b.n b5ef0 │ │ movs r0, r0 │ │ - b.n b5aee │ │ + b.n b5afe │ │ lsls r1, r6, #1 │ │ subs r0, r0, r0 │ │ movs r0, #0 │ │ - b.n b5402 │ │ + b.n b5412 │ │ adds r0, #4 │ │ - b.n b5406 │ │ + b.n b5416 │ │ movs r2, r0 │ │ - b.n b5986 │ │ + b.n b5996 │ │ movs r3, r0 │ │ - b.n b5a86 │ │ + b.n b5a96 │ │ lsls r2, r7, #1 │ │ subs r2, #0 │ │ movs r0, #12 │ │ - b.n b5416 │ │ + b.n b5426 │ │ lsls r7, r0, #4 │ │ - b.n b5dee │ │ + b.n b5dfe │ │ lsls r7, r0, #4 │ │ - b.n b5f8e │ │ + b.n b5f9e │ │ movs r1, r7 │ │ ldr r2, [sp, #0] │ │ movs r0, #5 │ │ - b.n b59fa │ │ + b.n b5a0a │ │ movs r2, r1 │ │ - b.n b5b9e │ │ + b.n b5bae │ │ strb r0, [r0, #0] │ │ str r3, [sp, #640] @ 0x280 │ │ strh r0, [r0, #0] │ │ str r5, [sp, #568] @ 0x238 │ │ strb r4, [r0, #0] │ │ str r5, [sp, #568] @ 0x238 │ │ - beq.n b5940 │ │ + beq.n b5950 │ │ str r2, [sp, #300] @ 0x12c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldr r0, [sp, #756] @ 0x2f4 │ │ asrs r0, r4, #10 │ │ - b.n b5450 │ │ + b.n b5460 │ │ movs r0, r1 │ │ - b.n b5c56 │ │ + b.n b5c66 │ │ adds r0, #10 │ │ - b.n b5c5a │ │ + b.n b5c6a │ │ ands r6, r1 │ │ - b.n b5c5e │ │ + b.n b5c6e │ │ asrs r1, r0, #32 │ │ - b.n b5a40 │ │ + b.n b5a50 │ │ lsls r3, r3, #10 │ │ add.w r7, r0, r4, ror #30 │ │ - b.n b5f3a │ │ - b.n b5934 │ │ - b.n b5c6e │ │ + b.n b5f4a │ │ + b.n b5944 │ │ + b.n b5c7e │ │ ldrb r7, [r7, #31] │ │ - b.n b5fd0 │ │ + b.n b5fe0 │ │ str r0, [sp, #128] @ 0x80 │ │ - b.n b5470 │ │ + b.n b5480 │ │ movs r4, r0 │ │ - b.n b546c │ │ + b.n b547c │ │ strh r0, [r0, #0] │ │ - b.n b545a │ │ + b.n b546a │ │ movs r2, r0 │ │ - b.n b6042 │ │ + b.n b6052 │ │ strb r4, [r0, #0] │ │ - b.n b5462 │ │ + b.n b5472 │ │ movs r4, r0 │ │ - b.n b545c │ │ - beq.n b5984 │ │ - b.n b5de4 │ │ + b.n b546c │ │ + beq.n b5994 │ │ + b.n b5df4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, r4, sp, lr, pc} │ │ - b.n b5470 │ │ + b.n b5480 │ │ ands r0, r3 │ │ - b.n b5474 │ │ + b.n b5484 │ │ str r4, [r2, #0] │ │ - b.n b5478 │ │ + b.n b5488 │ │ str r4, [r2, #0] │ │ - b.n b549c │ │ + b.n b54ac │ │ movs r4, r0 │ │ - b.n b5518 │ │ + b.n b5528 │ │ movs r0, r1 │ │ - b.n b5f8a │ │ + b.n b5f9a │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ negs r0, r0 │ │ - b.n b54a4 │ │ + b.n b54b4 │ │ asrs r5, r0, #32 │ │ - b.n b5cb6 │ │ + b.n b5cc6 │ │ movs r4, r0 │ │ - b.n b5cba │ │ + b.n b5cca │ │ lsls r7, r3, #8 │ │ add.w r0, r0, r0, lsl #2 │ │ - b.n b5a82 │ │ + b.n b5a92 │ │ lsls r0, r0, #4 │ │ - b.n b5a8e │ │ + b.n b5a9e │ │ asrs r4, r2, #32 │ │ - b.n b54aa │ │ + b.n b54ba │ │ movs r5, r0 │ │ - b.n b5c30 │ │ + b.n b5c40 │ │ movs r3, r1 │ │ lsrs r0, r0, #8 │ │ str r0, [sp, #64] @ 0x40 │ │ - b.n b54c8 │ │ - b.n b59d0 │ │ - b.n b54d4 │ │ + b.n b54d8 │ │ + b.n b59e0 │ │ + b.n b54e4 │ │ ands r0, r3 │ │ - b.n b54d8 │ │ + b.n b54e8 │ │ movs r0, r0 │ │ - b.n b6054 │ │ + b.n b6064 │ │ @ instruction: 0xffbf0aff │ │ @ instruction: 0xffedeaff │ │ lsls r4, r2, #9 │ │ - b.n b54e0 │ │ + b.n b54f0 │ │ asrs r5, r0, #32 │ │ - b.n b5cf2 │ │ + b.n b5d02 │ │ lsls r5, r7, #7 │ │ add.w r0, r0, r0 │ │ - b.n b605a │ │ + b.n b606a │ │ @ instruction: 0xffeb0aff │ │ movs r1, r0 │ │ and.w r0, r0, r0, lsr #32 │ │ - b.n b5ec6 │ │ + b.n b5ed6 │ │ strh r0, [r0, #0] │ │ - b.n b54ea │ │ - b.n b5a04 │ │ - b.n b5508 │ │ + b.n b54fa │ │ + b.n b5a14 │ │ + b.n b5518 │ │ ands r0, r3 │ │ - b.n b550c │ │ + b.n b551c │ │ str r4, [r2, #0] │ │ - b.n b5510 │ │ + b.n b5520 │ │ @ instruction: 0xffb2eaff │ │ asrs r0, r2, #7 │ │ - b.n b551c │ │ + b.n b552c │ │ movs r0, r1 │ │ - b.n b5d22 │ │ + b.n b5d32 │ │ ands r6, r1 │ │ - b.n b5d26 │ │ + b.n b5d36 │ │ asrs r1, r0, #32 │ │ - b.n b5b08 │ │ + b.n b5b18 │ │ lsls r1, r5, #9 │ │ @ instruction: 0xeb00ffcc │ │ @ instruction: 0xeaff0188 │ │ - b.n b5534 │ │ + b.n b5544 │ │ asrs r4, r6, #30 │ │ - b.n b600a │ │ + b.n b601a │ │ subs r7, r7, #7 │ │ - b.n b609c │ │ + b.n b60ac │ │ strb r1, [r0, #0] │ │ - b.n b5e84 │ │ + b.n b5e94 │ │ movs r0, r0 │ │ - b.n b5b24 │ │ + b.n b5b34 │ │ strh r0, [r0, #0] │ │ - b.n b614a │ │ + b.n b615a │ │ lsls r2, r3, #1 │ │ - b.n b55ae │ │ + b.n b55be │ │ movs r0, r0 │ │ - b.n b60b2 │ │ + b.n b60c2 │ │ @ instruction: 0xffc70aff │ │ asrs r0, r5, #5 │ │ - b.n b5558 │ │ + b.n b5568 │ │ movs r1, r0 │ │ - b.n b615e │ │ + b.n b616e │ │ adds r1, #100 @ 0x64 │ │ - b.n b5560 │ │ + b.n b5570 │ │ cmp r7, #106 @ 0x6a │ │ - b.n b6166 │ │ + b.n b6176 │ │ asrs r1, r0, #32 │ │ - b.n b5b48 │ │ + b.n b5b58 │ │ str r0, [r0, r0] │ │ - b.n b5548 │ │ + b.n b5558 │ │ adds r0, #3 │ │ - b.n b5b50 │ │ + b.n b5b60 │ │ ands r6, r1 │ │ - b.n b5d76 │ │ - str r5, [sp, #1004] @ 0x3ec │ │ + b.n b5d86 │ │ + str r5, [sp, #1000] @ 0x3e8 │ │ @ instruction: 0xebff9020 │ │ - b.n b5578 │ │ - b.n b5a48 │ │ - b.n b5d82 │ │ + b.n b5588 │ │ + b.n b5a58 │ │ + b.n b5d92 │ │ @ instruction: 0xffbbeaff │ │ asrs r0, r0, #5 │ │ - b.n b5588 │ │ + b.n b5598 │ │ movs r0, r1 │ │ - b.n b5d8e │ │ + b.n b5d9e │ │ adds r0, #5 │ │ - b.n b5d92 │ │ + b.n b5da2 │ │ ands r6, r1 │ │ - b.n b5d96 │ │ + b.n b5da6 │ │ asrs r1, r0, #32 │ │ - b.n b5b78 │ │ + b.n b5b88 │ │ lsls r5, r1, #9 │ │ add.w r7, r0, r4, ror #30 │ │ - b.n b6072 │ │ + b.n b6082 │ │ str r0, [sp, #128] @ 0x80 │ │ - b.n b55a0 │ │ - b.n b5a70 │ │ - b.n b5daa │ │ + b.n b55b0 │ │ + b.n b5a80 │ │ + b.n b5dba │ │ ldrb r7, [r7, #31] │ │ - b.n b610c │ │ + b.n b611c │ │ @ instruction: 0xffb0eaff │ │ str r0, [r1, #0] │ │ - b.n b558c │ │ + b.n b559c │ │ movs r6, r1 │ │ - b.n b5dba │ │ + b.n b5dca │ │ ands r4, r1 │ │ - b.n b5594 │ │ + b.n b55a4 │ │ subs r3, r7, #7 │ │ - b.n b609c │ │ + b.n b60ac │ │ movs r0, #8 │ │ - b.n b5dc6 │ │ + b.n b5dd6 │ │ adds r0, #7 │ │ - b.n b5dca │ │ - beq.n b5ac4 │ │ - b.n b5f24 │ │ - ldr r7, [pc, #960] @ (b5e50 ) │ │ + b.n b5dda │ │ + beq.n b5ad4 │ │ + b.n b5f34 │ │ + ldr r7, [pc, #960] @ (b5e60 ) │ │ ldmia.w sp!, {r1, r4, r5, r6, r9} │ │ and.w pc, r0, r8, lsr #3 │ │ - b.n b60b4 │ │ + b.n b60c4 │ │ ands r6, r1 │ │ - b.n b5dde │ │ + b.n b5dee │ │ movs r0, r0 │ │ - b.n b5cc6 │ │ + b.n b5cd6 │ │ movs r5, r4 │ │ subs r0, r0, r0 │ │ asrs r0, r5, #3 │ │ - b.n b55e8 │ │ + b.n b55f8 │ │ movs r0, r1 │ │ - b.n b5dee │ │ + b.n b5dfe │ │ strb r4, [r4, #3] │ │ - b.n b55f0 │ │ + b.n b5600 │ │ adds r0, #228 @ 0xe4 │ │ - b.n b55f4 │ │ + b.n b5604 │ │ asrs r1, r0, #32 │ │ - b.n b5bd8 │ │ + b.n b5be8 │ │ strb r7, [r0, #0] │ │ - b.n b5bdc │ │ + b.n b5bec │ │ movs r0, #0 │ │ - b.n b55dc │ │ + b.n b55ec │ │ adds r0, #3 │ │ - b.n b5be4 │ │ + b.n b5bf4 │ │ movs r0, #7 │ │ - b.n b5e0a │ │ + b.n b5e1a │ │ @ instruction: 0xff94eaff │ │ movs r0, r4 │ │ - b.n b560c │ │ + b.n b561c │ │ asrs r0, r6, #32 │ │ - b.n b5fd6 │ │ + b.n b5fe6 │ │ stmia r0!, {r3} │ │ - b.n b55fc │ │ + b.n b560c │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n b5600 │ │ + b.n b5610 │ │ strb r2, [r0, #0] │ │ - b.n b5b9a │ │ + b.n b5baa │ │ strb r3, [r0, #0] │ │ - b.n b5c98 │ │ + b.n b5ca8 │ │ movs r3, r0 │ │ subs r2, #0 │ │ lsls r1, r0, #2 │ │ ldmia.w r1, {} │ │ - b.n b5b9e │ │ + b.n b5bae │ │ movs r7, r0 │ │ - b.n b5c9e │ │ + b.n b5cae │ │ vpmin.u q9, , │ │ movs r6, r0 │ │ - b.n b5b56 │ │ + b.n b5b66 │ │ strb r4, [r0, #0] │ │ - b.n b5b54 │ │ - add r0, pc, #56 @ (adr r0, b5b3c ) │ │ - b.n b5e46 │ │ - b.n b5b14 │ │ - b.n b5e4a │ │ + b.n b5b64 │ │ + add r0, pc, #56 @ (adr r0, b5b4c ) │ │ + b.n b5e56 │ │ + b.n b5b24 │ │ + b.n b5e5a │ │ stmia r0!, {r2} │ │ - b.n b5e4e │ │ + b.n b5e5e │ │ movs r7, r0 │ │ - b.n b5e32 │ │ + b.n b5e42 │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #2 │ │ - b.n b5658 │ │ + b.n b5668 │ │ strb r0, [r1, #2] │ │ - b.n b565c │ │ + b.n b566c │ │ lsrs r0, r2 │ │ - b.n b5ea4 │ │ + b.n b5eb4 │ │ asrs r4, r1, #32 │ │ - b.n b5b70 │ │ + b.n b5b80 │ │ movs r0, r0 │ │ - b.n b5c48 │ │ + b.n b5c58 │ │ strb r7, [r0, #0] │ │ - b.n b5c4c │ │ + b.n b5c5c │ │ str r6, [r1, r0] │ │ - b.n b5b7a │ │ + b.n b5b8a │ │ asrs r1, r0, #32 │ │ - b.n b5e60 │ │ + b.n b5e70 │ │ strb r0, [r0, #0] │ │ lsls r0, r4, #6 │ │ movs r6, r0 │ │ and.w r0, r0, ip, lsl #5 │ │ - b.n b5680 │ │ + b.n b5690 │ │ movs r0, r1 │ │ - b.n b5e86 │ │ + b.n b5e96 │ │ asrs r1, r0, #32 │ │ - b.n b5c68 │ │ + b.n b5c78 │ │ lsls r1, r2, #8 │ │ @ instruction: 0xeb00ff74 │ │ @ instruction: 0xeaff7048 │ │ - b.n b5694 │ │ + b.n b56a4 │ │ strb r7, [r0, #0] │ │ - b.n b5c78 │ │ + b.n b5c88 │ │ asrs r4, r1, #1 │ │ - b.n b569c │ │ + b.n b56ac │ │ movs r0, r1 │ │ - b.n b5ea2 │ │ - b.n b5b74 │ │ - b.n b5680 │ │ + b.n b5eb2 │ │ + b.n b5b84 │ │ + b.n b5690 │ │ asrs r1, r0, #32 │ │ - b.n b5c88 │ │ + b.n b5c98 │ │ stmia r0!, {r2, r3} │ │ - b.n b5688 │ │ + b.n b5698 │ │ strb r0, [r0, #0] │ │ - b.n b568c │ │ + b.n b569c │ │ lsls r7, r0, #8 │ │ add.w r7, r0, r4, ror #30 │ │ - b.n b618a │ │ - b.n b5b90 │ │ - b.n b5ebe │ │ + b.n b619a │ │ + b.n b5ba0 │ │ + b.n b5ece │ │ vpmin.u32 q15, q13, │ │ - ldrh r0, [r1, #50] @ 0x32 │ │ + ldrh r0, [r3, #50] @ 0x32 │ │ movs r2, r0 │ │ - add r1, pc, #1012 @ (adr r1, b5f7c ) │ │ - vcvt.f16.u16 , , #11 │ │ - vsli.32 d25, d20, #21 │ │ - vqshlu.s64 q9, , #53 @ 0x35 │ │ - vcle.s16 d26, d21, #0 │ │ - vsubl.u , d21, d8 │ │ - vneg.f16 d23, d2 │ │ - vsra.u32 q12, , #11 │ │ - vcle.s16 d24, d23, #0 │ │ - vrsra.u64 d22, d14, #11 │ │ - @ instruction: 0xfff58d0b │ │ - vtbx.8 d21, {d21-d24}, d22 │ │ - vtbl.8 d23, {d21}, d27 │ │ + add r2, pc, #244 @ (adr r2, b5c8c ) │ │ + @ instruction: 0xfff59cd7 │ │ + vqshlu.s64 d25, d19, #53 @ 0x35 │ │ + vqshl.u32 d18, d7, #21 │ │ + vcle.s16 q13, , #0 │ │ + vsra.u64 d21, d23, #11 │ │ + @ instruction: 0xfff578b2 │ │ + vrshr.u32 q12, , #11 │ │ + vsubl.u q12, d21, d11 │ │ + vabs.s16 q11, q8 │ │ + @ instruction: 0xfff58eda │ │ + vtbx.8 d21, {d21-d24}, d6 │ │ + @ instruction: 0xfff579db │ │ @ instruction: 0xfff54ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n b60dc │ │ - beq.n b5bec │ │ - b.n b6060 │ │ + b.n b60ec │ │ + beq.n b5bfc │ │ + b.n b6070 │ │ asrs r4, r0, #32 │ │ - b.n b56e4 │ │ + b.n b56f4 │ │ str r0, [sp, #176] @ 0xb0 │ │ - b.n b60ce │ │ + b.n b60de │ │ asrs r0, r1, #32 │ │ - b.n b5708 │ │ + b.n b5718 │ │ movs r0, r0 │ │ - b.n b627a │ │ - add r0, pc, #48 @ (adr r0, b5c08 ) │ │ - b.n b56fa │ │ + b.n b628a │ │ + add r0, pc, #48 @ (adr r0, b5c18 ) │ │ + b.n b570a │ │ adds r0, #0 │ │ - b.n b56f8 │ │ + b.n b5708 │ │ asrs r1, r0, #32 │ │ - b.n b5cf6 │ │ + b.n b5d06 │ │ asrs r4, r1, #32 │ │ - b.n b56e6 │ │ + b.n b56f6 │ │ asrs r4, r4, #32 │ │ - b.n b60ea │ │ + b.n b60fa │ │ asrs r4, r1, #32 │ │ - b.n b5708 │ │ + b.n b5718 │ │ movs r0, r2 │ │ - b.n b570c │ │ + b.n b571c │ │ movs r0, #8 │ │ - b.n b5710 │ │ + b.n b5720 │ │ movs r0, r7 │ │ lsrs r0, r0, #8 │ │ lsls r0, r0, #5 │ │ @ instruction: 0xe99d0010 │ │ - b.n b573c │ │ + b.n b574c │ │ movs r0, r0 │ │ - b.n b62ba │ │ + b.n b62ca │ │ asrs r4, r2, #32 │ │ - b.n b634a │ │ + b.n b635a │ │ asrs r1, r0, #32 │ │ lsls r0, r0, #12 │ │ movs r4, r3 │ │ - b.n b5732 │ │ + b.n b5742 │ │ ands r1, r0 │ │ - b.n b6016 │ │ + b.n b6026 │ │ lsls r4, r0, #4 │ │ - b.n b5b4c │ │ + b.n b5b5c │ │ strb r1, [r0, #24] │ │ - b.n b60de │ │ + b.n b60ee │ │ movs r1, r0 │ │ - b.n b5ed0 │ │ + b.n b5ee0 │ │ movs r0, r5 │ │ subs r2, #0 │ │ asrs r4, r1, #32 │ │ - b.n b5764 │ │ + b.n b5774 │ │ movs r7, r0 │ │ - b.n b5ede │ │ + b.n b5eee │ │ strb r0, [r1, #0] │ │ adds r1, #160 @ 0xa0 │ │ movs r0, r0 │ │ - b.n b62e2 │ │ + b.n b62f2 │ │ asrs r4, r0, #4 │ │ - b.n b5b5c │ │ + b.n b5b6c │ │ str r0, [r0, r0] │ │ - b.n b5d40 │ │ + b.n b5d50 │ │ movs r6, r2 │ │ lsrs r0, r0, #8 │ │ movs r5, r0 │ │ - b.n b5f86 │ │ + b.n b5f96 │ │ asrs r6, r0, #32 │ │ - b.n b5f8a │ │ + b.n b5f9a │ │ movs r0, #7 │ │ - b.n b5f8e │ │ - ldrb r4, [r3, #23] │ │ + b.n b5f9e │ │ + ldrb r1, [r4, #22] │ │ mla r0, r0, r0, r0 │ │ - b.n b630a │ │ + b.n b631a │ │ movs r5, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n b5788 │ │ + b.n b5798 │ │ asrs r4, r0, #32 │ │ - b.n b578c │ │ - add r0, pc, #64 @ (adr r0, b5ca4 ) │ │ - b.n b5770 │ │ + b.n b579c │ │ + add r0, pc, #64 @ (adr r0, b5cb4 ) │ │ + b.n b5780 │ │ movs r1, r0 │ │ - b.n b5f8a │ │ + b.n b5f9a │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n b57ac │ │ + b.n b57bc │ │ movs r4, r0 │ │ - b.n b5796 │ │ + b.n b57a6 │ │ lsls r0, r2, #15 │ │ - b.n b5ffa │ │ + b.n b600a │ │ movs r0, r0 │ │ - b.n b5788 │ │ + b.n b5798 │ │ asrs r4, r0, #32 │ │ - b.n b578c │ │ + b.n b579c │ │ lsls r2, r7, #2 │ │ - b.n b6030 │ │ + b.n b6040 │ │ movs r4, r0 │ │ - b.n b632a │ │ + b.n b633a │ │ movs r0, r1 │ │ lsls r3, r3, #22 │ │ movs r4, r1 │ │ lsls r5, r0, #22 │ │ str r6, [r0, #0] │ │ - b.n b5da4 │ │ - add r0, pc, #0 @ (adr r0, b5c98 ) │ │ - b.n b63da │ │ + b.n b5db4 │ │ + add r0, pc, #0 @ (adr r0, b5ca8 ) │ │ + b.n b63ea │ │ movs r3, r0 │ │ and.w r0, r0, r5 │ │ - b.n b5fe2 │ │ + b.n b5ff2 │ │ asrs r7, r0, #32 │ │ - b.n b5fe6 │ │ - ldrb r1, [r6, #22] │ │ - @ instruction: 0xfa006000 │ │ - b.n b63ee │ │ + b.n b5ff6 │ │ + ldrb r1, [r4, #21] │ │ + mla r0, r0, r0, r6 │ │ + b.n b63fe │ │ lsls r4, r0, #4 │ │ - b.n b5be4 │ │ + b.n b5bf4 │ │ strh r7, [r0, #0] │ │ - b.n b5d46 │ │ + b.n b5d56 │ │ movs r7, r0 │ │ - b.n b5dba │ │ + b.n b5dca │ │ lsls r4, r0, #4 │ │ - b.n b5bd0 │ │ + b.n b5be0 │ │ movs r0, r0 │ │ - b.n b6372 │ │ + b.n b6382 │ │ @ instruction: 0xffcd1aff │ │ movs r4, r0 │ │ and.w r0, r0, r0, lsr #32 │ │ - b.n b5808 │ │ - bf 18, b54ce │ │ + b.n b5818 │ │ + bf 18, b54de │ │ movs r0, r0 │ │ - b.n b6376 │ │ + b.n b6386 │ │ @ instruction: 0xfff80aff │ │ lsls r2, r1, #1 │ │ @ instruction: 0xea008010 │ │ - b.n b581c │ │ + b.n b582c │ │ strb r0, [r0, #0] │ │ - b.n b5820 │ │ + b.n b5830 │ │ movs r0, #8 │ │ - b.n b5824 │ │ + b.n b5834 │ │ movs r0, r0 │ │ - b.n b581e │ │ + b.n b582e │ │ adds r0, #8 │ │ - b.n b5828 │ │ + b.n b5838 │ │ movs r0, #2 │ │ - b.n b5e04 │ │ - add r0, pc, #48 @ (adr r0, b5d28 ) │ │ - b.n b5834 │ │ + b.n b5e14 │ │ + add r0, pc, #48 @ (adr r0, b5d38 ) │ │ + b.n b5844 │ │ asrs r4, r3, #1 │ │ - b.n b589e │ │ + b.n b58ae │ │ asrs r3, r2 │ │ - b.n b5dc6 │ │ + b.n b5dd6 │ │ movs r0, r0 │ │ - b.n b63ae │ │ + b.n b63be │ │ movs r0, r3 │ │ lsrs r0, r0, #8 │ │ movs r4, r3 │ │ - b.n b583e │ │ + b.n b584e │ │ str r1, [r0, #0] │ │ - b.n b6112 │ │ + b.n b6122 │ │ lsls r6, r0, #4 │ │ - b.n b5c48 │ │ + b.n b5c58 │ │ lsls r1, r0, #24 │ │ - b.n b63ba │ │ + b.n b63ca │ │ movs r5, r1 │ │ lsrs r0, r0, #8 │ │ asrs r6, r0, #4 │ │ - b.n b5c56 │ │ + b.n b5c66 │ │ ldrsb r1, [r0, r0] │ │ - b.n b61e6 │ │ + b.n b61f6 │ │ movs r5, r0 │ │ - b.n b5fd2 │ │ + b.n b5fe2 │ │ str r4, [r0, r0] │ │ adds r1, #160 @ 0xa0 │ │ movs r0, r0 │ │ - b.n b5e34 │ │ + b.n b5e44 │ │ asrs r5, r0, #32 │ │ - b.n b6076 │ │ - ldrb r5, [r1, #22] │ │ - @ instruction: 0xfa000106 │ │ - b.n b5c70 │ │ + b.n b6086 │ │ + ldrb r5, [r7, #20] │ │ + mla r1, r0, r6, r0 │ │ + b.n b5c80 │ │ ands r5, r0 │ │ - b.n b5dca │ │ + b.n b5dda │ │ movs r5, r0 │ │ - b.n b5e46 │ │ + b.n b5e56 │ │ lsls r6, r0, #4 │ │ - b.n b5c5c │ │ + b.n b5c6c │ │ movs r0, r0 │ │ - b.n b63f6 │ │ + b.n b6406 │ │ @ instruction: 0xffed1aff │ │ movs r4, r0 │ │ and.w r0, r0, r8 │ │ - b.n b609a │ │ - bfcsel 18, b655a , 1a, │ │ + b.n b60aa │ │ + bfcsel 18, b656a , 1a, │ │ movs r0, r0 │ │ - b.n b6402 │ │ + b.n b6412 │ │ @ instruction: 0xfff80aff │ │ movs r7, r4 │ │ and.w r0, r0, r0 │ │ - b.n b589e │ │ + b.n b58ae │ │ movs r0, r0 │ │ - b.n b6420 │ │ + b.n b6430 │ │ movs r3, r4 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #32 │ │ - b.n b58b4 │ │ + b.n b58c4 │ │ movs r0, r1 │ │ - b.n b589e │ │ + b.n b58ae │ │ asrs r7, r0, #32 │ │ - b.n b5e04 │ │ + b.n b5e14 │ │ str r0, [r0, #0] │ │ - b.n b5e88 │ │ + b.n b5e98 │ │ movs r4, r3 │ │ - b.n b58ba │ │ + b.n b58ca │ │ ands r1, r0 │ │ - b.n b618e │ │ + b.n b619e │ │ lsls r4, r0, #4 │ │ - b.n b5cc4 │ │ + b.n b5cd4 │ │ lsls r1, r0, #24 │ │ - b.n b6436 │ │ + b.n b6446 │ │ movs r5, r2 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #4 │ │ - b.n b5cd2 │ │ + b.n b5ce2 │ │ ldrsb r1, [r0, r0] │ │ - b.n b6262 │ │ + b.n b6272 │ │ movs r5, r0 │ │ - b.n b6054 │ │ + b.n b6064 │ │ str r7, [r0, r0] │ │ adds r1, #160 @ 0xa0 │ │ movs r0, r0 │ │ - b.n b645a │ │ + b.n b646a │ │ movs r0, r0 │ │ - b.n b5eb4 │ │ + b.n b5ec4 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ asrs r6, r0, #32 │ │ - b.n b60fa │ │ + b.n b610a │ │ movs r0, #5 │ │ - b.n b60fe │ │ - ldrb r0, [r0, #22] │ │ + b.n b610e │ │ + ldrb r5, [r0, #21] │ │ mla r0, r0, r6, r6 │ │ - b.n b5ed0 │ │ + b.n b5ee0 │ │ movs r2, r0 │ │ and.w r0, r0, r5, lsl #4 │ │ - b.n b610e │ │ - ldrb r7, [r4, #21] │ │ - @ instruction: 0xfa006000 │ │ - b.n b6516 │ │ + b.n b611e │ │ + ldrb r7, [r2, #20] │ │ + mla r0, r0, r0, r6 │ │ + b.n b6526 │ │ lsls r4, r0, #4 │ │ - b.n b5d0c │ │ + b.n b5d1c │ │ strb r5, [r0, #0] │ │ - b.n b5e6c │ │ + b.n b5e7c │ │ movs r5, r0 │ │ - b.n b5ee2 │ │ + b.n b5ef2 │ │ lsls r4, r0, #4 │ │ - b.n b5cf8 │ │ + b.n b5d08 │ │ movs r0, r0 │ │ - b.n b6498 │ │ + b.n b64a8 │ │ @ instruction: 0xffe51aff │ │ movs r4, r0 │ │ and.w r0, r0, r8 │ │ - b.n b6136 │ │ - bfcsel 18, b55f6 , 1a, pl │ │ + b.n b6146 │ │ + bfcsel 18, b5606 , 1a, pl │ │ movs r0, r0 │ │ - b.n b649e │ │ + b.n b64ae │ │ @ instruction: 0xfff80aff │ │ movs r0, r0 │ │ and.w r0, r0, r0 │ │ - b.n b654a │ │ - beq.n b5e44 │ │ - b.n b62a4 │ │ + b.n b655a │ │ + beq.n b5e54 │ │ + b.n b62b4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r5, r6, r7, fp, lr} │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n b6334 │ │ - beq.n b5e3c │ │ - b.n b62b8 │ │ + b.n b6344 │ │ + beq.n b5e4c │ │ + b.n b62c8 │ │ str r0, [r3, r0] │ │ - b.n b5942 │ │ + b.n b5952 │ │ movs r0, r0 │ │ - b.n b64d0 │ │ + b.n b64e0 │ │ lsls r6, r6, #1 │ │ lsrs r0, r0, #8 │ │ ands r4, r0 │ │ - b.n b59d0 │ │ + b.n b59e0 │ │ adds r0, #212 @ 0xd4 │ │ - b.n b633c │ │ + b.n b634c │ │ movs r4, r0 │ │ - b.n b64de │ │ + b.n b64ee │ │ movs r0, r4 │ │ lsrs r0, r0, #8 │ │ movs r6, r0 │ │ - b.n b64e6 │ │ + b.n b64f6 │ │ lsls r3, r3, #1 │ │ subs r0, r0, r0 │ │ ands r0, r0 │ │ - b.n b5968 │ │ + b.n b5978 │ │ movs r0, r6 │ │ - b.n b64f2 │ │ + b.n b6502 │ │ lsls r7, r5, #1 │ │ subs r0, r0, r0 │ │ strb r6, [r6, #2] │ │ - b.n b61f4 │ │ + b.n b6204 │ │ asrs r7, r0, #32 │ │ - b.n b5f58 │ │ + b.n b5f68 │ │ asrs r0, r1, #32 │ │ - b.n b635c │ │ + b.n b636c │ │ lsrs r5, r1, #8 │ │ orn sl, r1, #577536 @ 0x8d000 │ │ orn sl, r1, #36608 @ 0x8f00 │ │ orn r0, r1, #1474560 @ 0x168000 │ │ - b.n b6374 │ │ + b.n b6384 │ │ lsrs r5, r1, #8 │ │ orr.w sl, r1, #577536 @ 0x8d000 │ │ orr.w sl, r1, #36608 @ 0x8f00 │ │ orr.w r0, r1, #32768 @ 0x8000 │ │ - b.n b599e │ │ + b.n b59ae │ │ str r0, [r3, #12] │ │ - b.n b6204 │ │ + b.n b6214 │ │ movs r0, #4 │ │ - b.n b59a6 │ │ + b.n b59b6 │ │ asrs r6, r0, #32 │ │ - b.n b5f2e │ │ + b.n b5f3e │ │ asrs r7, r0, #32 │ │ - b.n b602e │ │ + b.n b603e │ │ lsls r2, r7, #1 │ │ subs r2, #0 │ │ asrs r6, r5, #32 │ │ - b.n b6652 │ │ + b.n b6662 │ │ lsls r0, r7 │ │ - b.n b59c0 │ │ + b.n b59d0 │ │ asrs r4, r0, #32 │ │ - b.n b659c │ │ + b.n b65ac │ │ asrs r4, r6, #2 │ │ - b.n b6228 │ │ + b.n b6238 │ │ movs r0, #16 │ │ - b.n b59c2 │ │ + b.n b59d2 │ │ strb r4, [r0, #0] │ │ - b.n b59ca │ │ + b.n b59da │ │ asrs r0, r0, #32 │ │ - b.n b65ea │ │ + b.n b65fa │ │ movs r7, r0 │ │ - b.n b6156 │ │ + b.n b6166 │ │ movs r4, r5 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n b61f6 │ │ - beq.n b5ed8 │ │ - b.n b6350 │ │ + b.n b6206 │ │ + beq.n b5ee8 │ │ + b.n b6360 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {ip, sp, lr} │ │ - b.n b59e4 │ │ + b.n b59f4 │ │ movs r4, r2 │ │ - b.n b6574 │ │ + b.n b6584 │ │ lsls r6, r3, #1 │ │ ldr r2, [sp, #0] │ │ strb r6, [r6, #2] │ │ - b.n b6270 │ │ + b.n b6280 │ │ ands r0, r0 │ │ - b.n b6612 │ │ + b.n b6622 │ │ stmia r0!, {r0} │ │ - b.n b6616 │ │ + b.n b6626 │ │ lsrs r0, r1 │ │ - b.n b59e4 │ │ + b.n b59f4 │ │ asrs r7, r0, #32 │ │ - b.n b5fe0 │ │ + b.n b5ff0 │ │ stmia r0!, {r2, r6, r7} │ │ - b.n b59ec │ │ + b.n b59fc │ │ lsrs r0, r0 │ │ - b.n b59f0 │ │ - b.n b5ef8 │ │ - b.n b63ec │ │ + b.n b5a00 │ │ + b.n b5f08 │ │ + b.n b63fc │ │ ldmia r3!, {r1, r2, r4, r5, r7} │ │ - b.n b6278 │ │ + b.n b6288 │ │ strb r4, [r6, #6] │ │ - b.n b6294 │ │ + b.n b62a4 │ │ ands r4, r0 │ │ - b.n b59fc │ │ - b.n b5f30 │ │ - b.n b5a04 │ │ + b.n b5a0c │ │ + b.n b5f40 │ │ + b.n b5a14 │ │ strb r7, [r4, #2] │ │ - b.n b623e │ │ + b.n b624e │ │ blxns r7 │ │ - b.n b628c │ │ + b.n b629c │ │ strb r0, [r0, #0] │ │ - b.n b5a0c │ │ + b.n b5a1c │ │ strb r0, [r0, #0] │ │ - b.n b5a2e │ │ + b.n b5a3e │ │ str r4, [r0, #0] │ │ - b.n b5a32 │ │ + b.n b5a42 │ │ stmia r0!, {r2, r4, r5, r7} │ │ - b.n b629c │ │ + b.n b62ac │ │ movs r0, #16 │ │ - b.n b5a36 │ │ + b.n b5a46 │ │ strb r0, [r1, #0] │ │ - b.n b5a20 │ │ + b.n b5a30 │ │ strb r0, [r1, #0] │ │ - b.n b665e │ │ + b.n b666e │ │ str r4, [r1, #0] │ │ - b.n b5a28 │ │ + b.n b5a38 │ │ adds r0, #2 │ │ - b.n b6666 │ │ + b.n b6676 │ │ asrs r0, r6, #2 │ │ - b.n b62ce │ │ + b.n b62de │ │ lsls r4, r7 │ │ - b.n b5a38 │ │ + b.n b5a48 │ │ adds r2, #161 @ 0xa1 │ │ - b.n b5f38 │ │ + b.n b5f48 │ │ strb r1, [r4, #4] │ │ - b.n b5f44 │ │ + b.n b5f54 │ │ asrs r0, r2, #32 │ │ - b.n b633c │ │ + b.n b634c │ │ asrs r1, r0, #32 │ │ - b.n b624c │ │ + b.n b625c │ │ asrs r3, r0, #32 │ │ - b.n b6244 │ │ + b.n b6254 │ │ subs r4, r6, r6 │ │ - b.n b62d0 │ │ + b.n b62e0 │ │ asrs r0, r0, #32 │ │ - b.n b5aee │ │ + b.n b5afe │ │ movs r0, r2 │ │ - b.n b6570 │ │ + b.n b6580 │ │ lsls r0, r7 │ │ asrs r6, r3, #7 │ │ lsls r0, r7 │ │ - b.n b5a60 │ │ + b.n b5a70 │ │ strb r4, [r0, #0] │ │ - b.n b5a7e │ │ + b.n b5a8e │ │ asrs r0, r0, #32 │ │ - b.n b669e │ │ + b.n b66ae │ │ movs r7, r0 │ │ - b.n b620a │ │ + b.n b621a │ │ @ instruction: 0xffd20aff │ │ movs r0, r0 │ │ - b.n b6618 │ │ + b.n b6628 │ │ lsls r0, r4, #1 │ │ subs r0, r0, r0 │ │ strb r0, [r6, #2] │ │ - b.n b6316 │ │ + b.n b6326 │ │ movs r0, r2 │ │ - b.n b65a4 │ │ + b.n b65b4 │ │ lsls r2, r5, #1 │ │ lsrs r0, r0, #8 │ │ movs r4, r2 │ │ - b.n b5a9e │ │ + b.n b5aae │ │ stmia r0!, {r4} │ │ - b.n b5aa2 │ │ + b.n b5ab2 │ │ movs r4, r1 │ │ - b.n b622e │ │ + b.n b623e │ │ lsls r2, r1, #1 │ │ subs r2, #0 │ │ adds r0, #20 │ │ - b.n b5aae │ │ + b.n b5abe │ │ movs r3, r0 │ │ - b.n b623a │ │ + b.n b624a │ │ lsls r7, r0, #1 │ │ ldrh r0, [r0, #16] │ │ ands r4, r0 │ │ - b.n b5a9e │ │ + b.n b5aae │ │ movs r0, #184 @ 0xb8 │ │ - b.n b5ac8 │ │ + b.n b5ad8 │ │ movs r0, #16 │ │ - b.n b5aa2 │ │ + b.n b5ab2 │ │ movs r0, #20 │ │ - b.n b5aa6 │ │ + b.n b5ab6 │ │ movs r1, r0 │ │ - b.n b62ea │ │ - beq.n b5fcc │ │ - b.n b6444 │ │ + b.n b62fa │ │ + beq.n b5fdc │ │ + b.n b6454 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r5, r7, r8} │ │ - b.n b5af4 │ │ + b.n b5b04 │ │ movs r0, r0 │ │ - b.n b60d8 │ │ + b.n b60e8 │ │ lsls r2, r3, #1 │ │ - b.n b5b5e │ │ + b.n b5b6e │ │ movs r0, r0 │ │ - b.n b6662 │ │ + b.n b6672 │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ movs r6, r5 │ │ - b.n b678a │ │ + b.n b679a │ │ lsls r4, r6, #2 │ │ - b.n b6358 │ │ + b.n b6368 │ │ asrs r4, r6, #30 │ │ - b.n b65e2 │ │ + b.n b65f2 │ │ subs r7, r7, #7 │ │ - b.n b6674 │ │ + b.n b6684 │ │ movs r1, r0 │ │ - b.n b631a │ │ - beq.n b5ffc │ │ - b.n b6474 │ │ + b.n b632a │ │ + beq.n b600c │ │ + b.n b6484 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r2, r4, r5, r6, r8, ip} │ │ - b.n b5b24 │ │ + b.n b5b34 │ │ movs r1, r0 │ │ - b.n b672a │ │ + b.n b673a │ │ adds r1, #112 @ 0x70 │ │ - b.n b5b2c │ │ + b.n b5b3c │ │ movs r1, #74 @ 0x4a │ │ - b.n b65f2 │ │ + b.n b6602 │ │ asrs r1, r0, #32 │ │ - b.n b6114 │ │ + b.n b6124 │ │ ands r0, r0 │ │ - b.n b5b14 │ │ + b.n b5b24 │ │ adds r0, #3 │ │ - b.n b611c │ │ - str r4, [sp, #548] @ 0x224 │ │ + b.n b612c │ │ + str r4, [sp, #544] @ 0x220 │ │ @ instruction: 0xebffffef │ │ @ instruction: 0xeaff27d9 │ │ @ instruction: 0xeb00ffef │ │ @ instruction: 0xeaff0150 │ │ - b.n b5b50 │ │ + b.n b5b60 │ │ movs r0, r0 │ │ - b.n b6134 │ │ + b.n b6144 │ │ lsls r2, r3, #1 │ │ - b.n b5bba │ │ + b.n b5bca │ │ movs r0, r0 │ │ - b.n b66be │ │ + b.n b66ce │ │ @ instruction: 0xffe80aff │ │ asrs r0, r0, #5 │ │ - b.n b5b64 │ │ + b.n b5b74 │ │ strb r0, [r6, #0] │ │ - b.n b676a │ │ + b.n b677a │ │ adds r1, #60 @ 0x3c │ │ - b.n b5b6c │ │ + b.n b5b7c │ │ movs r1, r0 │ │ - b.n b6772 │ │ + b.n b6782 │ │ asrs r1, r0, #32 │ │ - b.n b6154 │ │ + b.n b6164 │ │ lsls r0, r2, #2 │ │ stmia.w sp, {r0, r1, ip, sp} │ │ - b.n b615c │ │ + b.n b616c │ │ movs r1, #78 @ 0x4e │ │ - b.n b6642 │ │ + b.n b6652 │ │ @ instruction: 0xffedeaff │ │ lsls r0, r6, #4 │ │ - b.n b5b88 │ │ + b.n b5b98 │ │ movs r0, r0 │ │ - b.n b616c │ │ + b.n b617c │ │ lsls r2, r3, #1 │ │ - b.n b5bf2 │ │ + b.n b5c02 │ │ movs r0, r0 │ │ - b.n b66f6 │ │ + b.n b6706 │ │ @ instruction: 0xffda0aff │ │ asrs r0, r4, #4 │ │ - b.n b5b9c │ │ + b.n b5bac │ │ movs r1, r0 │ │ - b.n b67a2 │ │ + b.n b67b2 │ │ adds r1, #28 │ │ - b.n b5ba4 │ │ + b.n b5bb4 │ │ movs r1, #91 @ 0x5b │ │ - b.n b666a │ │ + b.n b667a │ │ asrs r1, r0, #32 │ │ - b.n b618c │ │ + b.n b619c │ │ strb r0, [r0, #0] │ │ - b.n b5b8c │ │ + b.n b5b9c │ │ adds r0, #3 │ │ - b.n b6194 │ │ + b.n b61a4 │ │ @ instruction: 0xffe0eaff │ │ lsls r0, r6, #3 │ │ - b.n b5bbc │ │ + b.n b5bcc │ │ movs r0, r0 │ │ - b.n b61a0 │ │ + b.n b61b0 │ │ lsls r2, r3, #1 │ │ - b.n b5c26 │ │ + b.n b5c36 │ │ movs r0, r0 │ │ - b.n b672a │ │ + b.n b673a │ │ @ instruction: 0xffcd0aff │ │ asrs r0, r4, #3 │ │ - b.n b5bd0 │ │ + b.n b5be0 │ │ movs r1, r0 │ │ - b.n b67d6 │ │ + b.n b67e6 │ │ adds r0, #220 @ 0xdc │ │ - b.n b5bd8 │ │ + b.n b5be8 │ │ movs r0, #12 │ │ - b.n b5bb8 │ │ + b.n b5bc8 │ │ asrs r1, r0, #32 │ │ - b.n b61c0 │ │ + b.n b61d0 │ │ adds r0, #3 │ │ - b.n b61c4 │ │ + b.n b61d4 │ │ lsls r0, r0, #3 │ │ stmia.w sp, {r0, r2, r4, r6, r8, r9, sl, fp, sp} │ │ - b.n b67ee │ │ + b.n b67fe │ │ ands r0, r1 │ │ - b.n b5bcc │ │ + b.n b5bdc │ │ @ instruction: 0xffd1eaff │ │ asrs r4, r4, #3 │ │ - b.n b5bf8 │ │ + b.n b5c08 │ │ asrs r1, r0, #32 │ │ - b.n b61dc │ │ + b.n b61ec │ │ asrs r2, r3, #1 │ │ - b.n b5c64 │ │ + b.n b5c74 │ │ movs r0, r0 │ │ - b.n b6768 │ │ + b.n b6778 │ │ @ instruction: 0xffbe0aff │ │ asrs r4, r2, #3 │ │ - b.n b5c0c │ │ + b.n b5c1c │ │ movs r1, #123 @ 0x7b │ │ - b.n b66d2 │ │ + b.n b66e2 │ │ movs r4, r2 │ │ - b.n b5bf6 │ │ + b.n b5c06 │ │ adds r0, #204 @ 0xcc │ │ - b.n b5c18 │ │ + b.n b5c28 │ │ asrs r1, r0, #32 │ │ - b.n b61fc │ │ + b.n b620c │ │ movs r0, r1 │ │ - b.n b5bfc │ │ + b.n b5c0c │ │ movs r1, r0 │ │ - b.n b6826 │ │ + b.n b6836 │ │ adds r0, #3 │ │ - b.n b6208 │ │ + b.n b6218 │ │ asrs r0, r2, #32 │ │ stmia.w sp, {r1, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ @ instruction: 0xeaff0090 │ │ - b.n b5c34 │ │ + b.n b5c44 │ │ movs r0, r0 │ │ - b.n b6218 │ │ + b.n b6228 │ │ lsls r2, r3, #1 │ │ - b.n b5c9e │ │ + b.n b5cae │ │ movs r0, r0 │ │ - b.n b67a2 │ │ + b.n b67b2 │ │ @ instruction: 0xffaf0aff │ │ asrs r0, r0, #2 │ │ - b.n b5c48 │ │ + b.n b5c58 │ │ movs r1, r0 │ │ - b.n b684e │ │ + b.n b685e │ │ adds r0, #124 @ 0x7c │ │ - b.n b5c50 │ │ + b.n b5c60 │ │ cmp r6, #23 │ │ - b.n b6856 │ │ + b.n b6866 │ │ asrs r1, r0, #32 │ │ - b.n b6238 │ │ + b.n b6248 │ │ strb r0, [r0, #0] │ │ - b.n b5c38 │ │ + b.n b5c48 │ │ adds r0, #3 │ │ - b.n b6240 │ │ + b.n b6250 │ │ @ instruction: 0xffb5eaff │ │ lsls r0, r5, #1 │ │ - b.n b5c68 │ │ + b.n b5c78 │ │ movs r0, r0 │ │ - b.n b624c │ │ + b.n b625c │ │ lsls r2, r3, #1 │ │ - b.n b5cd2 │ │ + b.n b5ce2 │ │ movs r0, r0 │ │ - b.n b67d6 │ │ + b.n b67e6 │ │ @ instruction: 0xffa20aff │ │ asrs r0, r3, #1 │ │ - b.n b5c7c │ │ + b.n b5c8c │ │ movs r1, r0 │ │ - b.n b6882 │ │ + b.n b6892 │ │ adds r0, #84 @ 0x54 │ │ - b.n b5c84 │ │ + b.n b5c94 │ │ cmp r7, #93 @ 0x5d │ │ - b.n b688a │ │ + b.n b689a │ │ asrs r1, r0, #32 │ │ - b.n b626c │ │ + b.n b627c │ │ strb r0, [r0, #0] │ │ - b.n b5c6c │ │ + b.n b5c7c │ │ adds r0, #3 │ │ - b.n b6274 │ │ + b.n b6284 │ │ @ instruction: 0xffa8eaff │ │ - ldrh r4, [r2, #4] │ │ + ldrh r4, [r4, #4] │ │ movs r2, r0 │ │ - ldrb r5, [r2, #20] │ │ - vcvt.u32.f32 , q14, #11 │ │ - vqshrun.s64 d24, q12, #11 │ │ + ldrb r1, [r7, #23] │ │ + vcvt.u32.f32 d21, d30, #11 │ │ + vtbx.8 d24, {d5}, d8 │ │ + movs r2, r0 │ │ + ldrb r1, [r7, #22] │ │ + @ instruction: 0xfff55a78 │ │ + vqshl.u64 q12, q6, #53 @ 0x35 │ │ + movs r2, r0 │ │ + ldrb r5, [r1, #21] │ │ + vcgt.s16 q10, , #0 │ │ + vqshrun.s64 d24, q0, #11 │ │ + movs r2, r0 │ │ + ldrb r1, [r0, #22] │ │ + vneg.f16 , q7 │ │ + vabs.f16 q12, q10 │ │ movs r2, r0 │ │ ldrb r5, [r2, #19] │ │ - vtbx.8 d21, {d5-d7}, d3 │ │ - vneg.f16 q12, q6 │ │ + vtbx.8 d20, {d5}, d21 │ │ + vqshl.u32 d24, d16, #21 │ │ movs r2, r0 │ │ - ldrb r1, [r5, #17] │ │ - @ instruction: 0xfff53f94 │ │ - vtbl.8 d24, {d5}, d0 │ │ - movs r2, r0 │ │ - ldrb r5, [r3, #18] │ │ - vneg.f16 , q15 │ │ - vqshl.u32 q12, q2, #21 │ │ - movs r2, r0 │ │ - ldrb r1, [r6, #15] │ │ - @ instruction: 0xfff548fd │ │ - vabs.f16 d24, d16 │ │ - movs r2, r0 │ │ - ldrb r5, [r7, #14] │ │ - vcvt.u32.f32 d19, d4, #11 │ │ - vqshl.u64 d24, d0, #53 @ 0x35 │ │ + ldrb r1, [r4, #18] │ │ + vqrdmlsh.s , , d25[0] │ │ + vneg.f16 d24, d16 │ │ movs r2, r0 │ │ - ldrb r5, [r5, #16] │ │ - vcge.f16 d24, d2, #0 │ │ + ldrb r1, [r2, #20] │ │ + vclt.f16 q12, q6, #0 │ │ vqshrun.s64 d20, q8, #11 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n b66d0 │ │ + b.n b66e0 │ │ str r0, [r0, r0] │ │ - b.n b64fa │ │ + b.n b650a │ │ movs r0, r0 │ │ - b.n b68fe │ │ + b.n b690e │ │ movs r0, r0 │ │ - b.n b686c │ │ + b.n b687c │ │ ldrh r0, [r6, #0] │ │ lsrs r5, r7, #2 │ │ lsls r1, r0 │ │ - b.n b650a │ │ + b.n b651a │ │ movs r5, r0 │ │ - b.n b650e │ │ + b.n b651e │ │ asrs r4, r0, #32 │ │ - b.n b6512 │ │ + b.n b6522 │ │ lsls r2, r0, #5 │ │ add.w r0, r0, r0, lsl #8 │ │ - b.n b5d04 │ │ + b.n b5d14 │ │ asrs r0, r0, #32 │ │ - b.n b651e │ │ + b.n b652e │ │ movs r0, r0 │ │ - b.n b6922 │ │ + b.n b6932 │ │ movs r2, r0 │ │ - b.n b6488 │ │ + b.n b6498 │ │ movs r3, r0 │ │ ldrh r0, [r0, #16] │ │ lsls r1, r0, #4 │ │ - b.n b6118 │ │ + b.n b6128 │ │ movs r4, r0 │ │ - b.n b6492 │ │ + b.n b64a2 │ │ asrs r0, r0, #32 │ │ asrs r0, r4, #14 │ │ movs r1, r0 │ │ - b.n b653a │ │ + b.n b654a │ │ ldrh r0, [r6, #0] │ │ ldmia.w sp!, {r4, r5, fp, lr} │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n b6720 │ │ + b.n b6730 │ │ lsrs r0, r2 │ │ - b.n b658a │ │ + b.n b659a │ │ movs r0, #4 │ │ - b.n b6298 │ │ + b.n b62a8 │ │ movs r7, r0 │ │ - b.n b68b6 │ │ + b.n b68c6 │ │ movs r6, r6 │ │ ldrh r0, [r0, #16] │ │ adds r0, #4 │ │ - b.n b6738 │ │ + b.n b6748 │ │ movs r1, #2 │ │ - b.n b6144 │ │ - bfcsel 0, b6324 , 4, eq │ │ + b.n b6154 │ │ + bfcsel 0, b6334 , 4, eq │ │ lsls r0, r4, #3 │ │ movs r0, r0 │ │ lsls r0, r6, #2 │ │ movs r0, r0 │ │ lsls r0, r3, #2 │ │ movs r0, r0 │ │ lsls r0, r0, #2 │ │ @@ -224260,996 +224140,996 @@ │ │ lsls r0, r2, #1 │ │ movs r0, r0 │ │ movs r0, r7 │ │ movs r0, r0 │ │ movs r0, r4 │ │ movs r0, r0 │ │ movs r0, #6 │ │ - b.n b66d0 │ │ + b.n b66e0 │ │ adds r0, #130 @ 0x82 │ │ - b.n b634e │ │ + b.n b635e │ │ adds r1, #3 │ │ - b.n b634e │ │ + b.n b635e │ │ adds r0, #20 │ │ - b.n b5d78 │ │ + b.n b5d88 │ │ movs r1, r0 │ │ - b.n b64fc │ │ + b.n b650c │ │ movs r3, r4 │ │ lsrs r0, r0, #8 │ │ movs r0, #5 │ │ - b.n b66e8 │ │ + b.n b66f8 │ │ adds r0, #130 @ 0x82 │ │ - b.n b6366 │ │ + b.n b6376 │ │ adds r1, #3 │ │ - b.n b6366 │ │ + b.n b6376 │ │ adds r0, #20 │ │ - b.n b5d90 │ │ + b.n b5da0 │ │ movs r1, r0 │ │ - b.n b6514 │ │ + b.n b6524 │ │ movs r5, r3 │ │ lsrs r0, r0, #8 │ │ movs r0, #4 │ │ - b.n b6700 │ │ + b.n b6710 │ │ adds r0, #130 @ 0x82 │ │ - b.n b637e │ │ + b.n b638e │ │ adds r1, #3 │ │ - b.n b637e │ │ + b.n b638e │ │ adds r0, #20 │ │ - b.n b5da8 │ │ + b.n b5db8 │ │ movs r1, r0 │ │ - b.n b652c │ │ + b.n b653c │ │ movs r7, r2 │ │ lsrs r0, r0, #8 │ │ movs r0, #3 │ │ - b.n b6718 │ │ + b.n b6728 │ │ adds r0, #130 @ 0x82 │ │ - b.n b6396 │ │ + b.n b63a6 │ │ adds r1, #3 │ │ - b.n b6396 │ │ + b.n b63a6 │ │ adds r0, #20 │ │ - b.n b5dc0 │ │ + b.n b5dd0 │ │ movs r1, r0 │ │ - b.n b6544 │ │ + b.n b6554 │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ movs r0, #2 │ │ - b.n b6730 │ │ + b.n b6740 │ │ adds r0, #130 @ 0x82 │ │ - b.n b63ae │ │ + b.n b63be │ │ adds r1, #3 │ │ - b.n b63ae │ │ + b.n b63be │ │ adds r0, #20 │ │ - b.n b5dd8 │ │ + b.n b5de8 │ │ movs r1, r0 │ │ - b.n b655c │ │ + b.n b656c │ │ movs r3, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, #1 │ │ - b.n b6748 │ │ + b.n b6758 │ │ adds r0, #130 @ 0x82 │ │ - b.n b63c6 │ │ + b.n b63d6 │ │ adds r1, #3 │ │ - b.n b63c6 │ │ + b.n b63d6 │ │ adds r0, #20 │ │ - b.n b5df0 │ │ + b.n b5e00 │ │ movs r1, r0 │ │ - b.n b6574 │ │ + b.n b6584 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #133 @ 0x85 │ │ - b.n b63e0 │ │ + b.n b63f0 │ │ movs r1, #2 │ │ - b.n b63da │ │ + b.n b63ea │ │ movs r0, #20 │ │ - b.n b5e02 │ │ + b.n b5e12 │ │ movs r1, r0 │ │ - b.n b6586 │ │ + b.n b6596 │ │ movs r0, #5 │ │ - b.n b6626 │ │ + b.n b6636 │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ movs r2, r0 │ │ - b.n b662e │ │ + b.n b663e │ │ ldrh r0, [r6, #0] │ │ ldmia.w sp!, {r0, lr} │ │ - b.n b6636 │ │ + b.n b6646 │ │ lsls r3, r3, #4 │ │ add.w r0, r0, r4, lsl #4 │ │ - b.n b663e │ │ + b.n b664e │ │ ands r0, r0 │ │ - b.n b5e22 │ │ + b.n b5e32 │ │ movs r0, #28 │ │ - b.n b6806 │ │ + b.n b6816 │ │ adds r0, #164 @ 0xa4 │ │ - b.n b664a │ │ + b.n b665a │ │ adds r0, #131 @ 0x83 │ │ - b.n b6414 │ │ + b.n b6424 │ │ adds r1, #3 │ │ - b.n b6416 │ │ + b.n b6426 │ │ str r4, [r0, r0] │ │ - b.n b5e3c │ │ + b.n b5e4c │ │ movs r1, r0 │ │ - b.n b65c4 │ │ + b.n b65d4 │ │ str r1, [r0, r0] │ │ - b.n b6826 │ │ + b.n b6836 │ │ movs r0, #3 │ │ adds r1, #160 @ 0xa0 │ │ movs r5, r0 │ │ - b.n b69d0 │ │ + b.n b69e0 │ │ lsls r5, r4 │ │ - b.n b666a │ │ + b.n b667a │ │ @ instruction: 0xfff58aff │ │ movs r0, r2 │ │ - b.n b6832 │ │ + b.n b6842 │ │ movs r4, r0 │ │ - b.n b69e0 │ │ + b.n b69f0 │ │ movs r6, r0 │ │ subs r2, #0 │ │ adds r0, #4 │ │ - b.n b5e62 │ │ + b.n b5e72 │ │ str r0, [r0, r0] │ │ - b.n b6a82 │ │ + b.n b6a92 │ │ movs r1, r0 │ │ - b.n b65ec │ │ + b.n b65fc │ │ str r1, [r0, r0] │ │ adds r3, #0 │ │ adds r0, #133 @ 0x85 │ │ - b.n b6658 │ │ + b.n b6668 │ │ movs r1, #3 │ │ - b.n b6456 │ │ + b.n b6466 │ │ movs r2, r0 │ │ and.w r0, r0, r0, lsl #12 │ │ - b.n b6a9a │ │ + b.n b6aaa │ │ movs r2, r0 │ │ - b.n b6a08 │ │ + b.n b6a18 │ │ movs r3, r0 │ │ subs r2, #0 │ │ str r4, [r0, r0] │ │ - b.n b5e8a │ │ + b.n b5e9a │ │ adds r0, #0 │ │ - b.n b6aaa │ │ + b.n b6aba │ │ movs r1, r0 │ │ - b.n b6618 │ │ + b.n b6628 │ │ adds r0, #1 │ │ adds r3, #0 │ │ asrs r3, r0, #2 │ │ - b.n b647c │ │ + b.n b648c │ │ asrs r1, r0, #4 │ │ - b.n b647e │ │ + b.n b648e │ │ movs r0, r0 │ │ - b.n b6400 │ │ + b.n b6410 │ │ subs r3, r5, r2 │ │ - b.n b6996 │ │ + b.n b69a6 │ │ subs r2, r5, r2 │ │ - b.n b6a1a │ │ + b.n b6a2a │ │ lsls r0, r0, #5 │ │ - b.n b66ca │ │ + b.n b66da │ │ lsls r0, r2, #6 │ │ - b.n b6392 │ │ + b.n b63a2 │ │ movs r2, r0 │ │ - b.n b66d2 │ │ + b.n b66e2 │ │ ldrh r0, [r6, #0] │ │ ldmia.w sp!, {r3, ip, lr, pc} │ │ - b.n b6834 │ │ - ldr r0, [pc, #192] @ (b645c ) │ │ + b.n b6844 │ │ + ldr r0, [pc, #192] @ (b646c ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n b68bc │ │ - beq.n b63e4 │ │ - b.n b6840 │ │ + b.n b68cc │ │ + beq.n b63f4 │ │ + b.n b6850 │ │ ands r1, r0 │ │ - b.n b66ea │ │ + b.n b66fa │ │ asrs r0, r4, #2 │ │ - b.n b5eec │ │ + b.n b5efc │ │ str r0, [r0, r0] │ │ - b.n b66f2 │ │ + b.n b6702 │ │ movs r0, #8 │ │ - b.n b5ecc │ │ + b.n b5edc │ │ asrs r1, r0, #32 │ │ - b.n b64d8 │ │ + b.n b64e8 │ │ adds r0, #12 │ │ - b.n b5ed4 │ │ + b.n b5ee4 │ │ lsls r2, r3, #1 │ │ - b.n b5f64 │ │ + b.n b5f74 │ │ movs r0, r0 │ │ - b.n b6a66 │ │ + b.n b6a76 │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ - beq.n b63dc │ │ - b.n b6864 │ │ - ldr r0, [pc, #192] @ (b6490 ) │ │ + beq.n b63ec │ │ + b.n b6874 │ │ + ldr r0, [pc, #192] @ (b64a0 ) │ │ ldmia.w sp!, {r3, ip, lr, pc} │ │ - b.n b68f0 │ │ + b.n b6900 │ │ vrhadd.u16 d14, d14, d31 │ │ movs r4, r1 │ │ - b.n b5f00 │ │ + b.n b5f10 │ │ movs r5, r0 │ │ - b.n b6682 │ │ + b.n b6692 │ │ movs r0, r2 │ │ lsrs r0, r0, #8 │ │ movs r2, r1 │ │ - b.n b5f94 │ │ + b.n b5fa4 │ │ str r4, [r1, r0] │ │ - b.n b5ef0 │ │ + b.n b5f00 │ │ asrs r0, r2, #32 │ │ - b.n b690c │ │ + b.n b691c │ │ lsls r1, r6, #24 │ │ add.w r0, r0, r8, lsr #5 │ │ - b.n b5f38 │ │ + b.n b5f48 │ │ movs r0, #0 │ │ - b.n b5f28 │ │ + b.n b5f38 │ │ stmia r0!, {r2} │ │ - b.n b5f2c │ │ + b.n b5f3c │ │ asrs r1, r0, #32 │ │ - b.n b6524 │ │ + b.n b6534 │ │ str r0, [r2, r0] │ │ - b.n b5f34 │ │ + b.n b5f44 │ │ adds r0, #72 @ 0x48 │ │ - b.n b5f4c │ │ + b.n b5f5c │ │ movs r1, r4 │ │ stmia.w sp, {r0} │ │ - b.n b6b56 │ │ + b.n b6b66 │ │ adds r0, #3 │ │ - b.n b6538 │ │ + b.n b6548 │ │ movs r0, #8 │ │ - b.n b5f38 │ │ + b.n b5f48 │ │ movs r0, #0 │ │ - b.n b6b62 │ │ + b.n b6b72 │ │ stmia r0!, {r2, r3} │ │ - b.n b5f40 │ │ - str r3, [sp, #508] @ 0x1fc │ │ + b.n b5f50 │ │ + str r3, [sp, #504] @ 0x1f8 │ │ @ instruction: 0xebff102c │ │ - b.n b5f6c │ │ + b.n b5f7c │ │ movs r0, r1 │ │ - b.n b6948 │ │ + b.n b6958 │ │ movs r0, r2 │ │ - b.n b5f50 │ │ + b.n b5f60 │ │ movs r0, #0 │ │ - b.n b6b7a │ │ + b.n b6b8a │ │ asrs r1, r0, #32 │ │ - b.n b655c │ │ + b.n b656c │ │ movs r0, r0 │ │ - b.n b5f5c │ │ + b.n b5f6c │ │ movs r1, r0 │ │ - b.n b6b86 │ │ + b.n b6b96 │ │ adds r0, #4 │ │ - b.n b678a │ │ + b.n b679a │ │ lsls r5, r2, #25 │ │ @ instruction: 0xeb00ffdd │ │ - @ instruction: 0xeaff8494 │ │ + @ instruction: 0xeaff84a4 │ │ movs r2, r0 │ │ - cmp sp, ip │ │ - vsra.u32 d24, d1, #11 │ │ - vcle.f16 d20, d29, #0 │ │ + cmp r5, r9 │ │ + vrshr.u64 q12, , #11 │ │ + vsli.32 d20, d5, #21 │ │ @ instruction: 0xfff54ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n b6984 │ │ - beq.n b64a4 │ │ - b.n b6908 │ │ + b.n b6994 │ │ + beq.n b64b4 │ │ + b.n b6918 │ │ str r2, [r7, #8] │ │ - b.n b6816 │ │ - add r0, pc, #12 @ (adr r0, b6480 ) │ │ - b.n b67b6 │ │ + b.n b6826 │ │ + add r0, pc, #12 @ (adr r0, b6490 ) │ │ + b.n b67c6 │ │ stmia r0!, {r2, r3} │ │ - b.n b5fa0 │ │ + b.n b5fb0 │ │ str r0, [r0, r0] │ │ - b.n b67be │ │ + b.n b67ce │ │ movs r1, r0 │ │ - b.n b66ae │ │ + b.n b66be │ │ movs r0, #0 │ │ - b.n b5f86 │ │ + b.n b5f96 │ │ movs r5, r5 │ │ subs r0, r0, r0 │ │ strh r0, [r1, #0] │ │ - b.n b5fc4 │ │ + b.n b5fd4 │ │ ands r0, r0 │ │ - b.n b5fb6 │ │ + b.n b5fc6 │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n b5fcc │ │ + b.n b5fdc │ │ adds r0, #4 │ │ - b.n b5fbe │ │ + b.n b5fce │ │ strb r4, [r0, #0] │ │ - b.n b654e │ │ + b.n b655e │ │ strb r3, [r0, #0] │ │ - b.n b6654 │ │ + b.n b6664 │ │ movs r6, r6 │ │ subs r2, #0 │ │ movs r4, r0 │ │ - b.n b6acc │ │ + b.n b6adc │ │ movs r7, r1 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n b68be │ │ + b.n b68ce │ │ asrs r3, r4, #32 │ │ - b.n b68b8 │ │ + b.n b68c8 │ │ movs r0, r0 │ │ - b.n b67dc │ │ + b.n b67ec │ │ movs r5, r1 │ │ lsrs r0, r0, #8 │ │ str r4, [r1, #0] │ │ - b.n b5fe6 │ │ + b.n b5ff6 │ │ lsls r7, r0, #4 │ │ - b.n b69d2 │ │ + b.n b69e2 │ │ lsls r7, r0, #4 │ │ - b.n b6b6a │ │ + b.n b6b7a │ │ lsls r0, r3, #1 │ │ ldr r2, [sp, #0] │ │ movs r0, r2 │ │ - b.n b5ff6 │ │ + b.n b6006 │ │ adds r0, #40 @ 0x28 │ │ - b.n b600e │ │ + b.n b601e │ │ str r6, [r0, #0] │ │ - b.n b65da │ │ + b.n b65ea │ │ movs r3, r0 │ │ - b.n b678a │ │ + b.n b679a │ │ movs r7, r1 │ │ ldr r2, [sp, #0] │ │ asrs r4, r6, #7 │ │ - b.n b6024 │ │ + b.n b6034 │ │ asrs r1, r0, #32 │ │ - b.n b6608 │ │ + b.n b6618 │ │ lsls r1, r1, #1 │ │ and.w r0, r0, r3, asr #32 │ │ - b.n b6b14 │ │ + b.n b6b24 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ str r4, [r7, #8] │ │ - b.n b689e │ │ + b.n b68ae │ │ adds r0, #190 @ 0xbe │ │ - b.n b68a2 │ │ + b.n b68b2 │ │ movs r6, r0 │ │ - b.n b67a8 │ │ + b.n b67b8 │ │ movs r5, r7 │ │ subs r2, #0 │ │ movs r1, r0 │ │ - b.n b6936 │ │ + b.n b6946 │ │ movs r3, r7 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n b604a │ │ + b.n b605a │ │ asrs r4, r2, #32 │ │ - b.n b6a1c │ │ + b.n b6a2c │ │ movs r0, r1 │ │ - b.n b603a │ │ + b.n b604a │ │ movs r0, r0 │ │ - b.n b67c0 │ │ + b.n b67d0 │ │ movs r0, r7 │ │ ldrh r0, [r0, #16] │ │ movs r2, r1 │ │ - b.n b6866 │ │ + b.n b6876 │ │ asrs r2, r0, #32 │ │ - b.n b686a │ │ + b.n b687a │ │ lsls r4, r3, #26 │ │ add.w r0, r0, r0 │ │ - b.n b6bd2 │ │ + b.n b6be2 │ │ movs r4, r0 │ │ - b.n b6040 │ │ + b.n b6050 │ │ lsls r5, r0, #1 │ │ subs r0, r0, r0 │ │ - beq.n b6574 │ │ - b.n b69d4 │ │ + beq.n b6584 │ │ + b.n b69e4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r4, r6, r7, r8, r9, sl, fp, ip, sp} │ │ - b.n b6b60 │ │ + b.n b6b70 │ │ movs r3, r0 │ │ - b.n b67ec │ │ + b.n b67fc │ │ movs r5, r6 │ │ lsrs r0, r0, #8 │ │ adds r0, #3 │ │ - b.n b657e │ │ + b.n b658e │ │ movs r3, r6 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n b6b7c │ │ + b.n b6b8c │ │ lsls r1, r0, #1 │ │ subs r0, r0, r0 │ │ movs r3, r4 │ │ - b.n b6b84 │ │ + b.n b6b94 │ │ @ instruction: 0xffc80aff │ │ asrs r4, r1, #5 │ │ - b.n b60a8 │ │ + b.n b60b8 │ │ adcs r4, r1 │ │ - b.n b60ac │ │ + b.n b60bc │ │ adds r1, #76 @ 0x4c │ │ - b.n b60b0 │ │ + b.n b60c0 │ │ asrs r1, r0, #32 │ │ - b.n b6694 │ │ + b.n b66a4 │ │ ands r4, r0 │ │ - b.n b6698 │ │ + b.n b66a8 │ │ adds r0, #3 │ │ - b.n b669c │ │ + b.n b66ac │ │ movs r6, r7 │ │ and.w r0, r0, r0, rrx │ │ - b.n b6a9e │ │ - b.n b6598 │ │ - b.n b60aa │ │ + b.n b6aae │ │ + b.n b65a8 │ │ + b.n b60ba │ │ strb r4, [r1, #0] │ │ - b.n b60ae │ │ - b.n b65b8 │ │ - b.n b60ac │ │ - b.n b659c │ │ - b.n b6652 │ │ + b.n b60be │ │ + b.n b65c8 │ │ + b.n b60bc │ │ + b.n b65ac │ │ + b.n b6662 │ │ strb r0, [r3, #0] │ │ - b.n b60b4 │ │ + b.n b60c4 │ │ strb r3, [r0, #0] │ │ - b.n b674c │ │ + b.n b675c │ │ movs r5, r0 │ │ subs r2, #0 │ │ strb r0, [r0, #0] │ │ - b.n b68e6 │ │ + b.n b68f6 │ │ ands r1, r0 │ │ ldmia.w r0, {} │ │ - b.n b665e │ │ + b.n b666e │ │ movs r6, r1 │ │ - b.n b6764 │ │ + b.n b6774 │ │ movs r7, r0 │ │ - b.n b68f6 │ │ + b.n b6906 │ │ @ instruction: 0xffba2aff │ │ asrs r0, r3, #32 │ │ - b.n b60f8 │ │ + b.n b6108 │ │ strb r0, [r0, #0] │ │ - b.n b6902 │ │ + b.n b6912 │ │ movs r4, r2 │ │ - b.n b6100 │ │ + b.n b6110 │ │ asrs r1, r1, #32 │ │ - b.n b660c │ │ + b.n b661c │ │ movs r0, r1 │ │ - b.n b660e │ │ + b.n b661e │ │ movs r1, r0 │ │ - b.n b68f2 │ │ + b.n b6902 │ │ movs r5, r5 │ │ subs r0, r0, r0 │ │ asrs r4, r5, #3 │ │ - b.n b6118 │ │ + b.n b6128 │ │ lsls r4, r5, #3 │ │ - b.n b611c │ │ + b.n b612c │ │ str r0, [r2, #12] │ │ - b.n b6970 │ │ + b.n b6980 │ │ asrs r1, r0, #32 │ │ - b.n b6704 │ │ + b.n b6714 │ │ strb r1, [r1, #0] │ │ - b.n b6638 │ │ + b.n b6648 │ │ movs r0, r0 │ │ - b.n b670c │ │ + b.n b671c │ │ str r0, [r1, #0] │ │ - b.n b663e │ │ + b.n b664e │ │ strb r7, [r0, #0] │ │ - b.n b6922 │ │ + b.n b6932 │ │ movs r1, r0 │ │ lsls r0, r4, #6 │ │ movs r5, r4 │ │ and.w r0, r0, r0, lsl #1 │ │ - b.n b613a │ │ + b.n b614a │ │ movs r0, r1 │ │ - b.n b6126 │ │ + b.n b6136 │ │ asrs r4, r1, #3 │ │ - b.n b6148 │ │ + b.n b6158 │ │ movs r4, r2 │ │ - b.n b6a8e │ │ + b.n b6a9e │ │ movs r0, r0 │ │ - b.n b612c │ │ + b.n b613c │ │ asrs r1, r0, #32 │ │ - b.n b6734 │ │ + b.n b6744 │ │ movs r2, r0 │ │ - b.n b695a │ │ + b.n b696a │ │ movs r0, #6 │ │ - b.n b695e │ │ + b.n b696e │ │ vqrdmlah.s16 q15, q14, │ │ movs r7, r0 │ │ and.w r0, r0, ip, ror #5 │ │ - b.n b6168 │ │ + b.n b6178 │ │ asrs r1, r0, #32 │ │ - b.n b674c │ │ + b.n b675c │ │ movs r1, r0 │ │ and.w r0, r0, ip, lsr #6 │ │ - b.n b6174 │ │ + b.n b6184 │ │ asrs r1, r0, #32 │ │ - b.n b6758 │ │ + b.n b6768 │ │ movs r2, r0 │ │ - b.n b697e │ │ + b.n b698e │ │ movs r0, #6 │ │ - b.n b6982 │ │ + b.n b6992 │ │ vqrdmlah.s16 q15, , │ │ lsls r4, r6, #30 │ │ - b.n b6c5a │ │ + b.n b6c6a │ │ lsrs r7, r7, #31 │ │ - b.n b6cec │ │ + b.n b6cfc │ │ movs r4, r0 │ │ - b.n b615c │ │ + b.n b616c │ │ movs r4, r1 │ │ - b.n b618a │ │ + b.n b619a │ │ asrs r4, r0, #32 │ │ - b.n b617a │ │ + b.n b618a │ │ asrs r2, r0, #32 │ │ - b.n b6d60 │ │ + b.n b6d70 │ │ asrs r4, r0, #32 │ │ - b.n b6162 │ │ + b.n b6172 │ │ @ instruction: 0xffb4eaff │ │ asrs r0, r0, #1 │ │ - b.n b61a8 │ │ + b.n b61b8 │ │ eors r0, r0 │ │ - b.n b61ac │ │ + b.n b61bc │ │ adds r0, #64 @ 0x40 │ │ - b.n b61b0 │ │ + b.n b61c0 │ │ asrs r1, r0, #32 │ │ - b.n b6794 │ │ + b.n b67a4 │ │ ands r4, r0 │ │ - b.n b6798 │ │ + b.n b67a8 │ │ adds r0, #3 │ │ - b.n b679c │ │ + b.n b67ac │ │ str r0, [r0, #0] │ │ - b.n b619c │ │ + b.n b61ac │ │ movs r2, r0 │ │ - b.n b69c6 │ │ + b.n b69d6 │ │ movs r0, #4 │ │ - b.n b69ca │ │ + b.n b69da │ │ @ instruction: 0xffe3eaff │ │ movs r0, r6 │ │ - b.n b61d0 │ │ + b.n b61e0 │ │ movs r0, r0 │ │ - b.n b67b4 │ │ + b.n b67c4 │ │ asrs r4, r6, #32 │ │ - b.n b61d8 │ │ + b.n b61e8 │ │ strh r0, [r7, #6] │ │ - b.n b6a38 │ │ + b.n b6a48 │ │ asrs r1, r0, #32 │ │ - b.n b67c0 │ │ + b.n b67d0 │ │ movs r0, r0 │ │ - b.n b61c0 │ │ + b.n b61d0 │ │ @ instruction: 0xfff5eaff │ │ - subs r1, r6, r7 │ │ - vcle.f16 , , #0 │ │ - vtbx.8 d22, {d21-d24}, d14 │ │ - vmlsl.u q10, d21, d8[0] │ │ - vmlsl.u , d21, d25[0] │ │ - vneg.f16 q10, q6 │ │ - vqdmulh.s q11, , d10[0] │ │ - vqshlu.s32 d23, d27, #21 │ │ - vmlsl.u , d21, d27[0] │ │ - @ instruction: 0xfff558de │ │ - vsra.u64 q12, , #11 │ │ - @ instruction: 0xfff54f96 │ │ - vceq.i16 d25, d6, #0 │ │ - vqdmulh.s q11, , d19[0] │ │ + adds r3, r6, #0 │ │ + vclt.f16 d25, d25, #0 │ │ + @ instruction: 0xfff56cfe │ │ + vsli.64 q10, , #53 @ 0x35 │ │ + vabs.f16 d25, d25 │ │ + vqshlu.s64 q10, , #53 @ 0x35 │ │ + @ instruction: 0xfff56dfa │ │ + vqshl.u32 d23, d15, #21 │ │ + vneg.f16 , │ │ + vtbl.8 d21, {d21}, d16 │ │ + vneg.s16 d24, d18 │ │ + vcvt.u32.f32 q10, q11, #11 │ │ + vcle.s16 d25, d12, #0 │ │ + vcvt.f32.u32 d22, d3, #11 │ │ vcvt.f16.u16 d20, d0, #11 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n b6c04 │ │ + b.n b6c14 │ │ adds r0, #4 │ │ - b.n b600e │ │ + b.n b601e │ │ stmia r0!, {r1} │ │ - b.n b6eb2 │ │ - b.n b66f4 │ │ - b.n b6a36 │ │ + b.n b6ec2 │ │ + b.n b6704 │ │ + b.n b6a46 │ │ movs r0, #131 @ 0x83 │ │ - b.n b6712 │ │ + b.n b6722 │ │ ands r6, r1 │ │ - b.n b6a3e │ │ + b.n b6a4e │ │ movs r0, #2 │ │ - b.n b666a │ │ + b.n b667a │ │ movs r1, r0 │ │ - b.n b69aa │ │ + b.n b69ba │ │ movs r0, #1 │ │ - b.n b6c10 │ │ - b.n b6714 │ │ + b.n b6c20 │ │ + b.n b6724 │ │ strh r0, [r4, #12] │ │ movs r5, r0 │ │ - b.n b6db6 │ │ + b.n b6dc6 │ │ adds r0, #162 @ 0xa2 │ │ - b.n b6a56 │ │ + b.n b6a66 │ │ @ instruction: 0xfff68aff │ │ movs r4, r0 │ │ - b.n b6dc2 │ │ + b.n b6dd2 │ │ movs r5, r0 │ │ subs r2, #0 │ │ movs r0, #0 │ │ - b.n b6262 │ │ + b.n b6272 │ │ adds r0, #0 │ │ - b.n b6e6a │ │ + b.n b6e7a │ │ movs r1, r0 │ │ - b.n b69d2 │ │ + b.n b69e2 │ │ adds r0, #1 │ │ strh r0, [r0, #24] │ │ - b.n b693a │ │ - b.n b6852 │ │ + b.n b694a │ │ + b.n b6862 │ │ movs r2, r0 │ │ and.w r0, r0, r0, lsl #12 │ │ - b.n b6e7e │ │ + b.n b6e8e │ │ movs r2, r0 │ │ - b.n b6de6 │ │ + b.n b6df6 │ │ movs r3, r0 │ │ subs r2, #0 │ │ movs r0, #0 │ │ - b.n b6286 │ │ + b.n b6296 │ │ adds r0, #0 │ │ - b.n b6e8e │ │ + b.n b6e9e │ │ movs r1, r0 │ │ - b.n b69f6 │ │ + b.n b6a06 │ │ adds r0, #1 │ │ strh r0, [r0, #24] │ │ asrs r3, r0, #4 │ │ - b.n b6876 │ │ + b.n b6886 │ │ movs r0, r0 │ │ - b.n b67e0 │ │ + b.n b67f0 │ │ asrs r1, r0, #32 │ │ - b.n b6ea2 │ │ + b.n b6eb2 │ │ lsls r0, r0, #5 │ │ - b.n b6868 │ │ + b.n b6878 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r4, r5, r6, r7, fp, lr} │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n b6c8c │ │ + b.n b6c9c │ │ str r0, [r0, #0] │ │ - b.n b6296 │ │ + b.n b62a6 │ │ ands r0, r0 │ │ - b.n b6aba │ │ + b.n b6aca │ │ adds r0, #4 │ │ - b.n b629e │ │ + b.n b62ae │ │ movs r0, #6 │ │ - b.n b6808 │ │ + b.n b6818 │ │ lsls r6, r1, #2 │ │ - b.n b6e2a │ │ + b.n b6e3a │ │ movs r6, r6 │ │ cmp r2, #0 │ │ movs r4, r0 │ │ - b.n b6ece │ │ + b.n b6ede │ │ asrs r2, r4, #4 │ │ - b.n b6892 │ │ + b.n b68a2 │ │ movs r4, r3 │ │ - b.n b6c9e │ │ + b.n b6cae │ │ strb r0, [r2, #0] │ │ - b.n b6ca2 │ │ + b.n b6cb2 │ │ movs r1, r0 │ │ - b.n b6a4a │ │ + b.n b6a5a │ │ movs r0, r5 │ │ ldr r2, [sp, #0] │ │ asrs r6, r0, #2 │ │ - b.n b68b2 │ │ + b.n b68c2 │ │ asrs r1, r0, #4 │ │ - b.n b68aa │ │ + b.n b68ba │ │ movs r1, r0 │ │ - b.n b6eee │ │ + b.n b6efe │ │ lsls r3, r0, #2 │ │ - b.n b6ab2 │ │ + b.n b6ac2 │ │ lsls r0, r0, #2 │ │ - b.n b68b6 │ │ + b.n b68c6 │ │ str r0, [r0, r4] │ │ - b.n b68c8 │ │ + b.n b68d8 │ │ movs r0, r0 │ │ - b.n b6c82 │ │ + b.n b6c92 │ │ lsls r0, r0, #2 │ │ - b.n b68c2 │ │ + b.n b68d2 │ │ str r0, [r0, #16] │ │ - b.n b68d0 │ │ + b.n b68e0 │ │ lsls r2, r0, #2 │ │ - b.n b68ce │ │ + b.n b68de │ │ movs r1, #0 │ │ - b.n b6b0e │ │ + b.n b6b1e │ │ movs r6, r0 │ │ - b.n b6b12 │ │ - ldrb r4, [r7, #10] │ │ - mla r0, r0, r6, r0 │ │ - b.n b6b1a │ │ + b.n b6b22 │ │ + ldrb r5, [r2, #4] │ │ + @ instruction: 0xfa000006 │ │ + b.n b6b2a │ │ asrs r5, r0, #32 │ │ - b.n b6b1e │ │ + b.n b6b2e │ │ lsls r3, r2, #2 │ │ add.w r0, r0, r0, lsr #3 │ │ - b.n b6b6e │ │ + b.n b6b7e │ │ str r4, [r1, #0] │ │ - b.n b6c74 │ │ + b.n b6c84 │ │ asrs r1, r0, #2 │ │ - b.n b68f0 │ │ + b.n b6900 │ │ lsls r0, r0, #2 │ │ - b.n b68f2 │ │ + b.n b6902 │ │ asrs r1, r0, #4 │ │ - b.n b6904 │ │ + b.n b6914 │ │ lsls r0, r0, #4 │ │ - b.n b6908 │ │ + b.n b6918 │ │ adds r0, #4 │ │ - b.n b632a │ │ + b.n b633a │ │ movs r0, #6 │ │ - b.n b6b42 │ │ + b.n b6b52 │ │ strb r4, [r0, #0] │ │ - b.n b6326 │ │ + b.n b6336 │ │ movs r3, r0 │ │ - b.n b6ab8 │ │ + b.n b6ac8 │ │ movs r0, #0 │ │ strh r0, [r4, #12] │ │ movs r3, r0 │ │ - b.n b6ac0 │ │ + b.n b6ad0 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr6, [r2, #48] @ 0x30 │ │ str r2, [sp, #280] @ 0x118 │ │ movs r0, #8 │ │ - b.n b6342 │ │ + b.n b6352 │ │ movs r4, r1 │ │ strh r0, [r0, #18] │ │ movs r0, #8 │ │ - b.n b6328 │ │ + b.n b6338 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr1, [r1, #48] @ 0x30 │ │ - b.n b6cb0 │ │ + b.n b6cc0 │ │ movs r0, r0 │ │ - b.n b6ad4 │ │ + b.n b6ae4 │ │ @ instruction: 0xfff08aff │ │ movs r4, r0 │ │ - b.n b6362 │ │ + b.n b6372 │ │ movs r0, r0 │ │ - b.n b6346 │ │ + b.n b6356 │ │ movs r4, r0 │ │ - b.n b6b82 │ │ + b.n b6b92 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r0, r1, r7, ip} │ │ - b.n b6950 │ │ + b.n b6960 │ │ asrs r1, r0, #4 │ │ - b.n b695c │ │ + b.n b696c │ │ asrs r4, r1, #32 │ │ - b.n b6d54 │ │ + b.n b6d64 │ │ lsls r6, r6, #1 │ │ add.w r0, r0, r4 │ │ - b.n b6382 │ │ + b.n b6392 │ │ movs r0, r0 │ │ - b.n b6366 │ │ + b.n b6376 │ │ movs r4, r0 │ │ - b.n b6ba2 │ │ + b.n b6bb2 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r2, r3, r4} │ │ - b.n b6d72 │ │ + b.n b6d82 │ │ asrs r3, r0, #32 │ │ - b.n b6bae │ │ + b.n b6bbe │ │ movs r3, r0 │ │ add.w r0, r0, r4 │ │ - b.n b639e │ │ + b.n b63ae │ │ movs r0, r0 │ │ - b.n b6382 │ │ + b.n b6392 │ │ movs r4, r0 │ │ - b.n b6bbe │ │ + b.n b6bce │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n b6da4 │ │ - beq.n b68c4 │ │ - b.n b6d28 │ │ - blt.n b6894 │ │ - b.n b6d2c │ │ + b.n b6db4 │ │ + beq.n b68d4 │ │ + b.n b6d38 │ │ + blt.n b68a4 │ │ + b.n b6d3c │ │ movs r0, #129 @ 0x81 │ │ - b.n b6998 │ │ - b.n b6898 │ │ - b.n b6bda │ │ + b.n b69a8 │ │ + b.n b68a8 │ │ + b.n b6bea │ │ strh r0, [r3, #0] │ │ - b.n b6db8 │ │ + b.n b6dc8 │ │ str r0, [sp, #0] │ │ - b.n b6fe2 │ │ + b.n b6ff2 │ │ lsls r2, r0, #4 │ │ - b.n b69a6 │ │ + b.n b69b6 │ │ add r3, sp, #4 │ │ - b.n b6dba │ │ + b.n b6dca │ │ adds r0, #16 │ │ - b.n b6dae │ │ + b.n b6dbe │ │ ands r4, r1 │ │ - b.n b6db2 │ │ + b.n b6dc2 │ │ lsls r2, r0, #4 │ │ - b.n b6bf6 │ │ + b.n b6c06 │ │ adds r0, #12 │ │ - b.n b63d4 │ │ + b.n b63e4 │ │ movs r0, r1 │ │ - b.n b63d8 │ │ + b.n b63e8 │ │ lsls r1, r0, #4 │ │ - b.n b6944 │ │ + b.n b6954 │ │ movs r0, #4 │ │ - b.n b63e0 │ │ + b.n b63f0 │ │ str r0, [r0, r4] │ │ - b.n b6c0a │ │ + b.n b6c1a │ │ ands r0, r2 │ │ - b.n b63e8 │ │ + b.n b63f8 │ │ str r4, [r2, r0] │ │ - b.n b63ec │ │ + b.n b63fc │ │ movs r0, r1 │ │ - b.n b6c16 │ │ + b.n b6c26 │ │ subs r2, r0, r4 │ │ - b.n b701a │ │ + b.n b702a │ │ ands r6, r1 │ │ - b.n b6c1e │ │ - ldrb r2, [r5, #8] │ │ + b.n b6c2e │ │ + ldrb r2, [r1, #9] │ │ mla r0, r0, r4, r0 │ │ - b.n b640e │ │ - b.n b68f0 │ │ - b.n b6c2a │ │ + b.n b641e │ │ + b.n b6900 │ │ + b.n b6c3a │ │ asrs r0, r0, #32 │ │ - b.n b702e │ │ + b.n b703e │ │ stmia r0!, {} │ │ - b.n b7032 │ │ + b.n b7042 │ │ ldr r0, [r6, r4] │ │ - b.n b6c36 │ │ + b.n b6c46 │ │ adds r0, #1 │ │ - b.n b6996 │ │ + b.n b69a6 │ │ asrs r4, r1, #32 │ │ - b.n b6d80 │ │ + b.n b6d90 │ │ adds r0, #4 │ │ - b.n b6428 │ │ + b.n b6438 │ │ cmp r1, #51 @ 0x33 │ │ - b.n b6c46 │ │ + b.n b6c56 │ │ eors r2, r6 │ │ - b.n b66e8 │ │ + b.n b66f8 │ │ str r4, [r0, #16] │ │ - b.n b683e │ │ + b.n b684e │ │ strb r2, [r2, #17] │ │ - b.n b68e0 │ │ + b.n b68f0 │ │ lsls r7, r0, #4 │ │ - b.n b684a │ │ + b.n b685a │ │ str r1, [r0, #0] │ │ - b.n b6e26 │ │ + b.n b6e36 │ │ str r4, [r0, #16] │ │ - b.n b682e │ │ + b.n b683e │ │ movs r1, r0 │ │ - b.n b6e22 │ │ + b.n b6e32 │ │ lsls r7, r0, #4 │ │ - b.n b683a │ │ + b.n b684a │ │ lsrs r3, r6, #4 │ │ - b.n b6974 │ │ + b.n b6984 │ │ stmia r0!, {r2, r3} │ │ - b.n b6c2e │ │ + b.n b6c3e │ │ movs r4, r2 │ │ - b.n b646c │ │ + b.n b647c │ │ str r2, [r0, r0] │ │ - b.n b6c76 │ │ + b.n b6c86 │ │ movs r1, r0 │ │ - b.n b6bda │ │ + b.n b6bea │ │ @ instruction: 0xffed1aff │ │ str r4, [r2, r0] │ │ - b.n b647c │ │ + b.n b648c │ │ asrs r0, r0, #32 │ │ - b.n b7086 │ │ + b.n b7096 │ │ movs r0, #0 │ │ - b.n b708a │ │ + b.n b709a │ │ adds r0, #0 │ │ - b.n b708e │ │ + b.n b709e │ │ strb r1, [r0, #4] │ │ - b.n b6a62 │ │ + b.n b6a72 │ │ lsls r1, r0, #4 │ │ - b.n b6886 │ │ + b.n b6896 │ │ adds r1, #1 │ │ - b.n b686a │ │ + b.n b687a │ │ asrs r1, r0, #32 │ │ - b.n b6e60 │ │ + b.n b6e70 │ │ str r0, [r0, #64] @ 0x40 │ │ - b.n b6490 │ │ + b.n b64a0 │ │ adds r0, #3 │ │ - b.n b6a66 │ │ + b.n b6a76 │ │ movs r4, #0 │ │ - b.n b6478 │ │ + b.n b6488 │ │ lsrs r1, r0, #16 │ │ - b.n b7010 │ │ + b.n b7020 │ │ movs r0, #2 │ │ - b.n b6a7e │ │ + b.n b6a8e │ │ @ instruction: 0xfff51aff │ │ ands r0, r2 │ │ - b.n b64b4 │ │ + b.n b64c4 │ │ asrs r0, r0, #32 │ │ - b.n b70be │ │ + b.n b70ce │ │ movs r1, r0 │ │ - b.n b6a1e │ │ + b.n b6a2e │ │ asrs r4, r1, #32 │ │ - b.n b6e08 │ │ + b.n b6e18 │ │ movs r1, r0 │ │ - b.n b6c34 │ │ + b.n b6c44 │ │ movs r0, #212 @ 0xd4 │ │ - b.n b6d0e │ │ + b.n b6d1e │ │ lsrs r0, r0, #12 │ │ @ instruction: 0xedd02932 │ │ - b.n b6cd6 │ │ + b.n b6ce6 │ │ movs r0, #114 @ 0x72 │ │ - b.n b6778 │ │ + b.n b6788 │ │ strb r2, [r0, #4] │ │ - b.n b68ce │ │ + b.n b68de │ │ movs r1, r0 │ │ - b.n b6eb0 │ │ + b.n b6ec0 │ │ lsls r2, r0, #4 │ │ - b.n b68b6 │ │ + b.n b68c6 │ │ lsls r7, r0, #2 │ │ - b.n b6ab8 │ │ + b.n b6ac8 │ │ lsls r0, r0, #4 │ │ - b.n b6ab6 │ │ + b.n b6ac6 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr3, [r0, #32] │ │ - b.n b64b6 │ │ + b.n b64c6 │ │ @ instruction: 0xfff01aff │ │ asrs r4, r1, #32 │ │ - b.n b64f8 │ │ + b.n b6508 │ │ lsrs r1, r0, #16 │ │ - b.n b707a │ │ + b.n b708a │ │ movs r0, #8 │ │ - b.n b6500 │ │ + b.n b6510 │ │ movs r2, r2 │ │ subs r2, #0 │ │ movs r1, r1 │ │ ldmia.w r1, {r2, r3, sp} │ │ - b.n b6e76 │ │ + b.n b6e86 │ │ lsrs r0, r6, #4 │ │ - b.n b6d16 │ │ + b.n b6d26 │ │ lsls r0, r2, #17 │ │ - b.n b69a8 │ │ + b.n b69b8 │ │ lsrs r1, r0, #12 │ │ ldcl 0, cr1, [r1, #-48] @ 0xffffffd0 │ │ - b.n b6ee4 │ │ + b.n b6ef4 │ │ strb r0, [r0, #4] │ │ - b.n b691a │ │ + b.n b692a │ │ str r1, [r0, #0] │ │ - b.n b6ef8 │ │ + b.n b6f08 │ │ str r0, [r0, #16] │ │ - b.n b6902 │ │ + b.n b6912 │ │ lsls r7, r0, #2 │ │ - b.n b6b00 │ │ + b.n b6b10 │ │ lsls r0, r0, #4 │ │ - b.n b6b12 │ │ + b.n b6b22 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr3, [r0, #32] │ │ - b.n b64fe │ │ + b.n b650e │ │ @ instruction: 0xfff11aff │ │ str r0, [sp, #64] @ 0x40 │ │ - b.n b6f18 │ │ + b.n b6f28 │ │ lsrs r4, r5, #32 │ │ - b.n b6d6a │ │ + b.n b6d7a │ │ @ instruction: 0xffb01aff │ │ - beq.n b6a48 │ │ - b.n b6ea8 │ │ + beq.n b6a58 │ │ + b.n b6eb8 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2} │ │ - b.n b6554 │ │ + b.n b6564 │ │ asrs r4, r0, #32 │ │ - b.n b6d5e │ │ + b.n b6d6e │ │ movs r1, #0 │ │ - b.n b6d62 │ │ + b.n b6d72 │ │ movs r6, r1 │ │ - b.n b6d66 │ │ - ldrb r7, [r4, #8] │ │ - mls r0, r0, ip, sp │ │ - b.n b6ec4 │ │ + b.n b6d76 │ │ + ldrb r0, [r0, #2] │ │ + @ instruction: 0xfa00d01c │ │ + b.n b6ed4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n b6f54 │ │ + b.n b6f64 │ │ svc 75 @ 0x4b │ │ - b.n b6ed8 │ │ - add r0, pc, #160 @ (adr r0, b6ae0 ) │ │ - b.n b6f5c │ │ + b.n b6ee8 │ │ + add r0, pc, #160 @ (adr r0, b6af0 ) │ │ + b.n b6f6c │ │ ldrh r3, [r5, #20] │ │ - b.n b705a │ │ + b.n b706a │ │ stmia r0!, {r2, r3} │ │ - b.n b6ecc │ │ + b.n b6edc │ │ ldrh r2, [r5, #20] │ │ - b.n b70e2 │ │ + b.n b70f2 │ │ str r0, [sp, #40] @ 0x28 │ │ - b.n b6d92 │ │ + b.n b6da2 │ │ movs r4, r0 │ │ and.w r0, r0, ip, lsl #12 │ │ - b.n b6d9a │ │ + b.n b6daa │ │ movs r0, #5 │ │ - b.n b6d9e │ │ + b.n b6dae │ │ stmia r0!, {r0} │ │ - b.n b6da2 │ │ + b.n b6db2 │ │ movs r0, #240 @ 0xf0 │ │ - b.n b6df8 │ │ + b.n b6e08 │ │ str r0, [sp, #32] │ │ - b.n b6f7c │ │ + b.n b6f8c │ │ asrs r0, r0, #32 │ │ - b.n b6b06 │ │ + b.n b6b16 │ │ lsls r7, r3, #1 │ │ - b.n b7114 │ │ + b.n b7124 │ │ movs r1, #65 @ 0x41 │ │ - b.n b6db6 │ │ + b.n b6dc6 │ │ lsrs r2, r2, #2 │ │ - b.n b6a7e │ │ + b.n b6a8e │ │ movs r1, r3 │ │ ldmia r2!, {} │ │ asrs r1, r0, #32 │ │ - b.n b6f86 │ │ + b.n b6f96 │ │ movs r0, #4 │ │ - b.n b6fa4 │ │ + b.n b6fb4 │ │ asrs r1, r0, #4 │ │ - b.n b69ae │ │ - blx 4b7b90 │ │ + b.n b69be │ │ + blx 4b7ba0 │ │ asrs r4, r1, #8 │ │ movs r0, r0 │ │ asrs r4, r1, #8 │ │ movs r0, r0 │ │ movs r4, r4 │ │ movs r0, r0 │ │ lsls r4, r4, #8 │ │ @@ -225261,3031 +225141,3031 @@ │ │ lsls r0, r1, #16 │ │ movs r0, r0 │ │ lsls r4, r0, #10 │ │ movs r0, r0 │ │ lsls r0, r6, #19 │ │ movs r0, r0 │ │ asrs r4, r0, #32 │ │ - b.n b65d6 │ │ + b.n b65e6 │ │ movs r0, #16 │ │ - b.n b65da │ │ + b.n b65ea │ │ movs r2, r0 │ │ - b.n b6d60 │ │ + b.n b6d70 │ │ lsls r5, r6, #17 │ │ subs r2, #0 │ │ movs r0, #0 │ │ - b.n b65e6 │ │ + b.n b65f6 │ │ adds r0, #20 │ │ - b.n b65ea │ │ + b.n b65fa │ │ strb r0, [r1, #0] │ │ - b.n b65ee │ │ + b.n b65fe │ │ lsrs r3, r0, #12 │ │ ldcl 0, cr3, [r0, #32] │ │ - b.n b65d6 │ │ + b.n b65e6 │ │ movs r0, #12 │ │ - b.n b65da │ │ + b.n b65ea │ │ asrs r0, r2, #32 │ │ - b.n b65de │ │ + b.n b65ee │ │ strb r4, [r2, #0] │ │ - b.n b65e2 │ │ + b.n b65f2 │ │ lsls r3, r5, #17 │ │ and.w r0, r0, r2, asr #10 │ │ - b.n b6e2a │ │ + b.n b6e3a │ │ asrs r4, r0, #32 │ │ - b.n b660e │ │ + b.n b661e │ │ movs r0, #130 @ 0x82 │ │ - b.n b6bf6 │ │ + b.n b6c06 │ │ movs r1, #2 │ │ - b.n b6bf6 │ │ + b.n b6c06 │ │ strb r4, [r0, #0] │ │ - b.n b661e │ │ + b.n b662e │ │ movs r7, r0 │ │ - b.n b6da0 │ │ + b.n b6db0 │ │ movs r7, r6 │ │ cmp r2, #0 │ │ asrs r4, r0, #32 │ │ - b.n b663e │ │ + b.n b664e │ │ movs r1, r0 │ │ - b.n b6db8 │ │ + b.n b6dc8 │ │ lsls r0, r0, #1 │ │ cmp r2, #0 │ │ asrs r4, r0, #32 │ │ - b.n b6632 │ │ + b.n b6642 │ │ movs r7, r0 │ │ - b.n b6db8 │ │ + b.n b6dc8 │ │ movs r0, r1 │ │ subs r2, #0 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr7, [r2, #32] │ │ - b.n b6642 │ │ + b.n b6652 │ │ str r0, [r1, #0] │ │ - b.n b664a │ │ + b.n b665a │ │ adds r0, #0 │ │ - b.n b664a │ │ + b.n b665a │ │ str r0, [r1, #0] │ │ - b.n b662e │ │ + b.n b663e │ │ lsrs r0, r0, #12 │ │ stcl 0, cr0, [r0, #520] @ 0x208 │ │ @ instruction: 0xe9827001 │ │ - b.n b6e7a │ │ + b.n b6e8a │ │ adds r0, #0 │ │ - b.n b6642 │ │ - b.n b6b40 │ │ - b.n b7002 │ │ + b.n b6652 │ │ + b.n b6b50 │ │ + b.n b7012 │ │ asrs r4, r1, #32 │ │ - b.n b6e86 │ │ + b.n b6e96 │ │ str r0, [r0, r0] │ │ - b.n b6e8a │ │ + b.n b6e9a │ │ adds r0, #5 │ │ - b.n b6be6 │ │ + b.n b6bf6 │ │ str r0, [r2, #0] │ │ - b.n b667c │ │ + b.n b668c │ │ adds r0, #12 │ │ - b.n b6fdc │ │ + b.n b6fec │ │ str r4, [r1, r0] │ │ - b.n b7064 │ │ + b.n b7074 │ │ movs r7, r0 │ │ - b.n b6e0a │ │ + b.n b6e1a │ │ @ instruction: 0xfffa3aff │ │ str r1, [r0, #0] │ │ - b.n b6c82 │ │ + b.n b6c92 │ │ ands r0, r1 │ │ - b.n b658c │ │ + b.n b659c │ │ str r4, [r1, #0] │ │ - b.n b6ffa │ │ + b.n b700a │ │ asrs r4, r1, #32 │ │ - b.n b6ff4 │ │ + b.n b7004 │ │ movs r4, r0 │ │ - b.n b6e24 │ │ + b.n b6e34 │ │ @ instruction: 0xfffa3aff │ │ movs r1, r0 │ │ - b.n b6e28 │ │ + b.n b6e38 │ │ movs r1, r2 │ │ ldrh r0, [r0, #16] │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr0, [r5, #8] │ │ - b.n b6e2c │ │ + b.n b6e3c │ │ adds r0, #8 │ │ - b.n b66b8 │ │ + b.n b66c8 │ │ adds r0, #32 │ │ - b.n b66ac │ │ + b.n b66bc │ │ lsrs r6, r0, #12 │ │ vstr d17, [sp] │ │ ldcl 0, cr4, [r1, #32] │ │ - b.n b66c0 │ │ + b.n b66d0 │ │ ands r0, r1 │ │ - b.n b66ac │ │ + b.n b66bc │ │ subs r0, r0, r4 │ │ stcl 0, cr3, [r5, #32] │ │ - b.n b66ac │ │ + b.n b66bc │ │ adds r0, #2 │ │ - b.n b6eee │ │ + b.n b6efe │ │ adds r0, #5 │ │ lsls r0, r4, #6 │ │ movs r2, r0 │ │ - b.n b6e60 │ │ + b.n b6e70 │ │ adds r0, #1 │ │ lsls r0, r4, #6 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr7, [r1, #16] │ │ - b.n b66e8 │ │ + b.n b66f8 │ │ movs r0, #3 │ │ - b.n b6f06 │ │ + b.n b6f16 │ │ @ instruction: 0xffdfeaff │ │ movs r3, r0 │ │ - b.n b6e7a │ │ + b.n b6e8a │ │ @ instruction: 0xffa0daff │ │ movs r0, #0 │ │ - b.n b6f16 │ │ + b.n b6f26 │ │ adds r0, #1 │ │ - b.n b6f1a │ │ + b.n b6f2a │ │ movs r5, r0 │ │ - b.n b6f1e │ │ + b.n b6f2e │ │ @ instruction: 0xff9feaff │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr7, [r2, #32] │ │ - b.n b670a │ │ + b.n b671a │ │ str r0, [r1, #0] │ │ - b.n b6712 │ │ + b.n b6722 │ │ adds r0, #0 │ │ - b.n b6712 │ │ + b.n b6722 │ │ str r0, [r1, #0] │ │ - b.n b66f6 │ │ + b.n b6706 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr0, [r0, #520] @ 0x208 │ │ @ instruction: 0xe9827001 │ │ - b.n b6f42 │ │ + b.n b6f52 │ │ adds r0, #0 │ │ - b.n b670a │ │ + b.n b671a │ │ asrs r4, r0, #32 │ │ - b.n b6742 │ │ + b.n b6752 │ │ movs r1, r0 │ │ - b.n b6ebc │ │ + b.n b6ecc │ │ @ instruction: 0xffbe3aff │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr3, [ip, #32] │ │ - b.n b673e │ │ + b.n b674e │ │ str r0, [r1, #0] │ │ - b.n b6756 │ │ + b.n b6766 │ │ asrs r0, r0, #32 │ │ - b.n b6746 │ │ + b.n b6756 │ │ str r0, [r1, #0] │ │ - b.n b672a │ │ + b.n b673a │ │ lsrs r0, r0, #12 │ │ stcl 0, cr3, [r2, #32] │ │ - b.n b6746 │ │ + b.n b6756 │ │ strb r4, [r0, #0] │ │ - b.n b674a │ │ + b.n b675a │ │ strb r4, [r0, #0] │ │ - b.n b675a │ │ + b.n b676a │ │ asrs r0, r0, #32 │ │ - b.n b6752 │ │ + b.n b6762 │ │ asrs r4, r0, #32 │ │ - b.n b675e │ │ + b.n b676e │ │ movs r7, r0 │ │ - b.n b6ee4 │ │ + b.n b6ef4 │ │ @ instruction: 0xffb42aff │ │ @ instruction: 0xffbceaff │ │ movs r0, #4 │ │ - b.n b676e │ │ - b.n b6c68 │ │ - b.n b7152 │ │ + b.n b677e │ │ + b.n b6c78 │ │ + b.n b7162 │ │ strb r0, [r2, #0] │ │ - b.n b6776 │ │ + b.n b6786 │ │ movs r7, r0 │ │ - b.n b6efe │ │ + b.n b6f0e │ │ movs r1, r1 │ │ subs r2, #0 │ │ strb r0, [r1, #0] │ │ - b.n b6782 │ │ + b.n b6792 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr6, [lr, #32] │ │ - b.n b67a6 │ │ + b.n b67b6 │ │ adds r0, #0 │ │ - b.n b678e │ │ + b.n b679e │ │ strb r4, [r2, #0] │ │ - b.n b6772 │ │ + b.n b6782 │ │ strb r2, [r0, #0] │ │ - b.n b6fb6 │ │ + b.n b6fc6 │ │ str r0, [r1, #0] │ │ - b.n b677a │ │ + b.n b678a │ │ adds r0, #12 │ │ - b.n b677e │ │ + b.n b678e │ │ movs r0, #16 │ │ - b.n b6782 │ │ + b.n b6792 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr3, [r0, #112] @ 0x70 │ │ - b.n b67aa │ │ + b.n b67ba │ │ str r4, [r4, #0] │ │ - b.n b718e │ │ + b.n b719e │ │ ands r0, r5 │ │ - b.n b67b2 │ │ + b.n b67c2 │ │ movs r0, #24 │ │ - b.n b7196 │ │ + b.n b71a6 │ │ movs r4, r0 │ │ - b.n b6f40 │ │ + b.n b6f50 │ │ lsls r1, r3, #4 │ │ cmp r2, #0 │ │ str r3, [r0, r0] │ │ - b.n b6fe2 │ │ + b.n b6ff2 │ │ adds r0, #4 │ │ - b.n b67c6 │ │ + b.n b67d6 │ │ movs r5, r0 │ │ - b.n b6f50 │ │ + b.n b6f60 │ │ lsls r3, r4, #4 │ │ cmp r2, #0 │ │ lsls r4, r5, #4 │ │ and.w r0, r0, r0, lsr #28 │ │ - b.n b67d6 │ │ + b.n b67e6 │ │ str r0, [r3, #0] │ │ - b.n b71ba │ │ + b.n b71ca │ │ adds r0, #28 │ │ - b.n b67de │ │ + b.n b67ee │ │ asrs r4, r1, #32 │ │ - b.n b71c2 │ │ + b.n b71d2 │ │ movs r3, r0 │ │ - b.n b6f74 │ │ + b.n b6f84 │ │ movs r1, r1 │ │ subs r2, #0 │ │ adds r0, #20 │ │ - b.n b67ee │ │ + b.n b67fe │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr5, [r6, #32] │ │ - b.n b6802 │ │ + b.n b6812 │ │ movs r0, #12 │ │ - b.n b67fa │ │ + b.n b680a │ │ adds r0, #32 │ │ - b.n b67de │ │ + b.n b67ee │ │ adds r0, #7 │ │ - b.n b7022 │ │ + b.n b7032 │ │ movs r0, #24 │ │ - b.n b67e6 │ │ + b.n b67f6 │ │ strb r4, [r3, #0] │ │ - b.n b67ea │ │ + b.n b67fa │ │ str r0, [r1, r0] │ │ - b.n b67f0 │ │ + b.n b6800 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr2, [r1, #16] │ │ - b.n b6816 │ │ + b.n b6826 │ │ movs r3, r0 │ │ - b.n b6f9e │ │ + b.n b6fae │ │ lsls r4, r6, #4 │ │ cmp r2, #0 │ │ adds r0, #2 │ │ - b.n b7042 │ │ + b.n b7052 │ │ movs r0, #16 │ │ - b.n b6826 │ │ + b.n b6836 │ │ movs r2, r0 │ │ - b.n b6fb0 │ │ + b.n b6fc0 │ │ lsls r5, r7, #4 │ │ cmp r2, #0 │ │ lsls r1, r4, #15 │ │ and.w r0, r0, r4, lsl #8 │ │ - b.n b6836 │ │ + b.n b6846 │ │ stmia r0!, {r4, r5} │ │ - b.n b721a │ │ + b.n b722a │ │ asrs r4, r6, #32 │ │ - b.n b683e │ │ + b.n b684e │ │ movs r1, r0 │ │ - b.n b6fc6 │ │ + b.n b6fd6 │ │ movs r0, r1 │ │ subs r2, #0 │ │ asrs r0, r0, #32 │ │ - b.n b684a │ │ - b.n b6d8c │ │ - b.n b722e │ │ + b.n b685a │ │ + b.n b6d9c │ │ + b.n b723e │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr3, [ip, #32] │ │ - b.n b6856 │ │ + b.n b6866 │ │ strb r0, [r1, #0] │ │ - b.n b6872 │ │ + b.n b6882 │ │ movs r6, r1 │ │ stmia.w lr, {r1, ip} │ │ - b.n b7082 │ │ + b.n b7092 │ │ strb r0, [r1, #0] │ │ - b.n b6846 │ │ + b.n b6856 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr2, [r0, #64] @ 0x40 │ │ - b.n b686e │ │ + b.n b687e │ │ adds r0, #60 @ 0x3c │ │ - b.n b7252 │ │ + b.n b7262 │ │ strh r0, [r0, #2] │ │ - b.n b6876 │ │ + b.n b6886 │ │ adds r0, #16 │ │ - b.n b6874 │ │ + b.n b6884 │ │ adds r0, #12 │ │ - b.n b725e │ │ + b.n b726e │ │ movs r0, r1 │ │ - b.n b7006 │ │ + b.n b7016 │ │ adds r0, #20 │ │ - b.n b6880 │ │ + b.n b6890 │ │ movs r3, r1 │ │ subs r2, #0 │ │ strb r0, [r2, #0] │ │ - b.n b68a8 │ │ + b.n b68b8 │ │ strh r2, [r0, #0] │ │ - b.n b70b2 │ │ + b.n b70c2 │ │ adds r0, #12 │ │ - b.n b6896 │ │ + b.n b68a6 │ │ ands r4, r2 │ │ - b.n b689a │ │ + b.n b68aa │ │ str r0, [r1, r0] │ │ - b.n b68ac │ │ + b.n b68bc │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr3, [r7, #240] @ 0xf0 │ │ - b.n b6886 │ │ + b.n b6896 │ │ adds r0, #20 │ │ - b.n b68c4 │ │ + b.n b68d4 │ │ movs r0, #64 @ 0x40 │ │ - b.n b688e │ │ + b.n b689e │ │ eors r4, r0 │ │ - b.n b6892 │ │ + b.n b68a2 │ │ str r0, [r1, r0] │ │ - b.n b689c │ │ + b.n b68ac │ │ lsrs r0, r0, #12 │ │ stcl 0, cr4, [r3, #112] @ 0x70 │ │ - b.n b68be │ │ + b.n b68ce │ │ movs r0, #72 @ 0x48 │ │ - b.n b72a2 │ │ + b.n b72b2 │ │ strb r4, [r1, #1] │ │ - b.n b68c6 │ │ - add r0, pc, #96 @ (adr r0, b6e08 ) │ │ - b.n b72aa │ │ + b.n b68d6 │ │ + add r0, pc, #96 @ (adr r0, b6e18 ) │ │ + b.n b72ba │ │ movs r0, #12 │ │ - b.n b68c8 │ │ + b.n b68d8 │ │ movs r7, r0 │ │ - b.n b705a │ │ + b.n b706a │ │ lsls r3, r3, #4 │ │ cmp r2, #0 │ │ movs r0, #4 │ │ - b.n b70fa │ │ + b.n b710a │ │ ands r4, r0 │ │ - b.n b68de │ │ + b.n b68ee │ │ movs r2, r0 │ │ - b.n b706a │ │ + b.n b707a │ │ lsls r5, r4, #4 │ │ cmp r2, #0 │ │ lsls r5, r5, #4 │ │ and.w r0, r0, r4, lsl #12 │ │ - b.n b68ee │ │ - b.n b6e30 │ │ - b.n b72d2 │ │ + b.n b68fe │ │ + b.n b6e40 │ │ + b.n b72e2 │ │ movs r0, #52 @ 0x34 │ │ - b.n b68f6 │ │ + b.n b6906 │ │ movs r2, r0 │ │ - b.n b7080 │ │ + b.n b7090 │ │ movs r0, r1 │ │ subs r2, #0 │ │ movs r0, #0 │ │ - b.n b6902 │ │ + b.n b6912 │ │ asrs r0, r6, #32 │ │ - b.n b72e6 │ │ + b.n b72f6 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr7, [lr, #32] │ │ - b.n b690e │ │ + b.n b691e │ │ str r0, [r1, #0] │ │ - b.n b692e │ │ + b.n b693e │ │ lsls r4, r1, #2 │ │ stmia.w r1, {r0, r1, sp} │ │ - b.n b713a │ │ + b.n b714a │ │ str r0, [r1, #0] │ │ - b.n b68fe │ │ + b.n b690e │ │ lsrs r0, r0, #12 │ │ stcl 0, cr3, [r0, #64] @ 0x40 │ │ - b.n b6926 │ │ + b.n b6936 │ │ stmia r0!, {r2, r5} │ │ - b.n b730a │ │ + b.n b731a │ │ strb r0, [r5, #0] │ │ - b.n b692e │ │ + b.n b693e │ │ strh r4, [r1, #0] │ │ - b.n b7312 │ │ + b.n b7322 │ │ movs r7, r0 │ │ - b.n b70bc │ │ + b.n b70cc │ │ movs r1, r1 │ │ subs r2, #0 │ │ strb r4, [r1, #0] │ │ - b.n b693e │ │ + b.n b694e │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr5, [ip, #32] │ │ - b.n b695e │ │ + b.n b696e │ │ str r4, [r2, #0] │ │ - b.n b694a │ │ + b.n b695a │ │ strb r4, [r4, #0] │ │ - b.n b692e │ │ + b.n b693e │ │ strb r3, [r0, #0] │ │ - b.n b7172 │ │ + b.n b7182 │ │ adds r0, #40 @ 0x28 │ │ - b.n b6936 │ │ + b.n b6946 │ │ str r4, [r5, #0] │ │ - b.n b693a │ │ + b.n b694a │ │ str r0, [r1, r0] │ │ - b.n b694e │ │ + b.n b695e │ │ lsrs r0, r0, #12 │ │ stcl 0, cr6, [r8, #16] │ │ - b.n b6966 │ │ + b.n b6976 │ │ str r0, [r3, r0] │ │ - b.n b734a │ │ + b.n b735a │ │ adds r0, #28 │ │ - b.n b696e │ │ + b.n b697e │ │ movs r3, r0 │ │ - b.n b70fe │ │ + b.n b710e │ │ lsls r2, r1, #7 │ │ cmp r2, #0 │ │ movs r2, r0 │ │ - b.n b7100 │ │ + b.n b7110 │ │ lsls r4, r2, #7 │ │ cmp r2, #0 │ │ adds r0, #4 │ │ - b.n b6982 │ │ + b.n b6992 │ │ str r0, [r2, #0] │ │ - b.n b6986 │ │ + b.n b6996 │ │ movs r6, r0 │ │ - b.n b7110 │ │ + b.n b7120 │ │ lsls r6, r3, #7 │ │ cmp r2, #0 │ │ adds r0, #28 │ │ - b.n b6992 │ │ + b.n b69a2 │ │ movs r7, r0 │ │ - b.n b711c │ │ + b.n b712c │ │ lsls r7, r4, #7 │ │ cmp r2, #0 │ │ movs r2, r0 │ │ - b.n b712a │ │ + b.n b713a │ │ lsls r1, r6, #7 │ │ cmp r2, #0 │ │ adds r0, #6 │ │ - b.n b71c6 │ │ + b.n b71d6 │ │ asrs r4, r3, #32 │ │ - b.n b69aa │ │ + b.n b69ba │ │ movs r1, r0 │ │ - b.n b7134 │ │ + b.n b7144 │ │ lsls r3, r7, #7 │ │ cmp r2, #0 │ │ lsls r2, r0, #8 │ │ and.w r0, r0, r0, lsr #4 │ │ - b.n b69ba │ │ + b.n b69ca │ │ stmia r0!, {r3, r4} │ │ - b.n b739e │ │ + b.n b73ae │ │ strb r4, [r3, #0] │ │ - b.n b69c2 │ │ + b.n b69d2 │ │ movs r0, #12 │ │ - b.n b73a6 │ │ + b.n b73b6 │ │ movs r0, #20 │ │ - b.n b69c4 │ │ + b.n b69d4 │ │ movs r7, r0 │ │ - b.n b7150 │ │ + b.n b7160 │ │ movs r2, r1 │ │ subs r2, #0 │ │ movs r0, #12 │ │ - b.n b69d6 │ │ + b.n b69e6 │ │ strb r1, [r0, #0] │ │ - b.n b71fa │ │ + b.n b720a │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr4, [ip, #32] │ │ - b.n b69fa │ │ + b.n b6a0a │ │ movs r0, #24 │ │ - b.n b69c6 │ │ + b.n b69d6 │ │ movs r0, #20 │ │ - b.n b6a04 │ │ + b.n b6a14 │ │ adds r0, #20 │ │ - b.n b69ee │ │ + b.n b69fe │ │ asrs r4, r3, #32 │ │ - b.n b69d2 │ │ + b.n b69e2 │ │ adds r0, #32 │ │ - b.n b69d6 │ │ + b.n b69e6 │ │ ands r0, r1 │ │ - b.n b69de │ │ + b.n b69ee │ │ lsrs r0, r0, #12 │ │ stcl 0, cr1, [r2, #208] @ 0xd0 │ │ - b.n b6a02 │ │ + b.n b6a12 │ │ str r4, [r7, r0] │ │ - b.n b73e6 │ │ + b.n b73f6 │ │ movs r0, #64 @ 0x40 │ │ - b.n b6a0a │ │ + b.n b6a1a │ │ strh r0, [r6, #0] │ │ - b.n b73ee │ │ + b.n b73fe │ │ movs r2, r0 │ │ - b.n b7194 │ │ + b.n b71a4 │ │ lsls r6, r6, #7 │ │ cmp r2, #0 │ │ asrs r4, r0, #32 │ │ - b.n b6a1a │ │ + b.n b6a2a │ │ movs r7, r0 │ │ - b.n b71a0 │ │ + b.n b71b0 │ │ lsls r0, r0, #8 │ │ cmp r2, #0 │ │ asrs r0, r5, #32 │ │ - b.n b6a26 │ │ - b.n b6f50 │ │ - b.n b740a │ │ + b.n b6a36 │ │ + b.n b6f60 │ │ + b.n b741a │ │ movs r2, r0 │ │ - b.n b71b0 │ │ + b.n b71c0 │ │ lsls r2, r1, #8 │ │ cmp r2, #0 │ │ asrs r4, r0, #32 │ │ - b.n b6a36 │ │ + b.n b6a46 │ │ ands r0, r2 │ │ - b.n b6a3a │ │ + b.n b6a4a │ │ movs r4, r0 │ │ - b.n b71c0 │ │ + b.n b71d0 │ │ lsls r4, r2, #8 │ │ cmp r2, #0 │ │ adds r0, #40 @ 0x28 │ │ - b.n b6a46 │ │ + b.n b6a56 │ │ asrs r4, r6, #32 │ │ - b.n b6a4a │ │ + b.n b6a5a │ │ movs r1, r0 │ │ - b.n b71d4 │ │ + b.n b71e4 │ │ lsls r7, r3, #8 │ │ cmp r2, #0 │ │ movs r2, r0 │ │ - b.n b71e4 │ │ + b.n b71f4 │ │ lsls r3, r5, #8 │ │ cmp r2, #0 │ │ adds r0, #4 │ │ - b.n b6a5e │ │ + b.n b6a6e │ │ movs r0, #40 @ 0x28 │ │ - b.n b6a62 │ │ + b.n b6a72 │ │ movs r2, r0 │ │ - b.n b71ec │ │ + b.n b71fc │ │ lsls r4, r6, #8 │ │ cmp r2, #0 │ │ - add r0, pc, #160 @ (adr r0, b6fec ) │ │ - b.n b7468 │ │ + add r0, pc, #160 @ (adr r0, b6ffc ) │ │ + b.n b7478 │ │ movs r1, r0 │ │ - b.n b71fa │ │ + b.n b720a │ │ lsls r5, r7, #8 │ │ cmp r2, #0 │ │ adds r0, #28 │ │ - b.n b6a7a │ │ + b.n b6a8a │ │ movs r1, r0 │ │ - b.n b7204 │ │ + b.n b7214 │ │ lsls r0, r1, #9 │ │ cmp r2, #0 │ │ asrs r0, r2, #32 │ │ - b.n b6a86 │ │ + b.n b6a96 │ │ movs r2, r0 │ │ - b.n b720c │ │ + b.n b721c │ │ lsls r0, r2, #9 │ │ cmp r2, #0 │ │ asrs r4, r3, #32 │ │ - b.n b6a92 │ │ + b.n b6aa2 │ │ movs r2, r0 │ │ - b.n b7218 │ │ + b.n b7228 │ │ lsls r3, r3, #9 │ │ cmp r2, #0 │ │ lsls r6, r0, #13 │ │ and.w r0, r0, r4, lsl #4 │ │ - b.n b6aa2 │ │ + b.n b6ab2 │ │ str r0, [r6, #0] │ │ - b.n b7486 │ │ + b.n b7496 │ │ str r4, [r6, r0] │ │ - b.n b6aaa │ │ + b.n b6aba │ │ movs r5, r0 │ │ - b.n b7230 │ │ + b.n b7240 │ │ movs r1, r1 │ │ subs r2, #0 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr5, [r6, #4] │ │ - b.n b72da │ │ + b.n b72ea │ │ movs r0, #0 │ │ - b.n b6abe │ │ + b.n b6ace │ │ strb r0, [r1, #0] │ │ - b.n b6ace │ │ + b.n b6ade │ │ adds r0, #8 │ │ - b.n b6ac6 │ │ + b.n b6ad6 │ │ movs r0, #48 @ 0x30 │ │ - b.n b6aaa │ │ + b.n b6aba │ │ asrs r4, r6, #32 │ │ - b.n b6aae │ │ + b.n b6abe │ │ adds r0, #56 @ 0x38 │ │ - b.n b6ab2 │ │ + b.n b6ac2 │ │ strb r0, [r1, #0] │ │ - b.n b6ab6 │ │ + b.n b6ac6 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr1, [r0, #64] @ 0x40 │ │ - b.n b6ade │ │ + b.n b6aee │ │ movs r0, #60 @ 0x3c │ │ - b.n b74c2 │ │ - b.n b7044 │ │ - b.n b6ae6 │ │ + b.n b74d2 │ │ + b.n b7054 │ │ + b.n b6af6 │ │ movs r0, #20 │ │ - b.n b6ae4 │ │ + b.n b6af4 │ │ movs r0, #12 │ │ - b.n b74ce │ │ + b.n b74de │ │ movs r6, r1 │ │ - b.n b7274 │ │ + b.n b7284 │ │ str r0, [r1, #0] │ │ - b.n b6af0 │ │ + b.n b6b00 │ │ movs r0, #16 │ │ - b.n b6af4 │ │ + b.n b6b04 │ │ movs r3, r1 │ │ subs r2, #0 │ │ strb r4, [r2, #0] │ │ - b.n b6b1c │ │ - b.n b6fe6 │ │ - b.n b7326 │ │ + b.n b6b2c │ │ + b.n b6ff6 │ │ + b.n b7336 │ │ movs r0, #12 │ │ - b.n b6b0a │ │ + b.n b6b1a │ │ adds r0, #20 │ │ - b.n b6b0e │ │ + b.n b6b1e │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr7, [r7, #32] │ │ - b.n b6b24 │ │ + b.n b6b34 │ │ movs r0, #60 @ 0x3c │ │ - b.n b6afa │ │ + b.n b6b0a │ │ movs r0, #16 │ │ - b.n b6b38 │ │ + b.n b6b48 │ │ asrs r0, r0, #1 │ │ - b.n b6b02 │ │ + b.n b6b12 │ │ adds r0, #68 @ 0x44 │ │ - b.n b6b06 │ │ + b.n b6b16 │ │ strb r0, [r1, #0] │ │ - b.n b6b0e │ │ + b.n b6b1e │ │ lsrs r0, r0, #12 │ │ stcl 0, cr1, [r2, #112] @ 0x70 │ │ - b.n b6b32 │ │ + b.n b6b42 │ │ str r0, [r1, #4] │ │ - b.n b7516 │ │ + b.n b7526 │ │ movs r0, #76 @ 0x4c │ │ - b.n b6b3a │ │ + b.n b6b4a │ │ adds r0, #24 │ │ - b.n b751e │ │ + b.n b752e │ │ adds r0, #12 │ │ - b.n b6b3c │ │ + b.n b6b4c │ │ movs r2, r0 │ │ - b.n b72c8 │ │ + b.n b72d8 │ │ movs r2, r1 │ │ subs r2, #0 │ │ movs r0, #24 │ │ - b.n b6b4e │ │ + b.n b6b5e │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr7, [r6, #32] │ │ - b.n b6b62 │ │ + b.n b6b72 │ │ movs r0, #72 @ 0x48 │ │ - b.n b6b3a │ │ + b.n b6b4a │ │ movs r0, #12 │ │ - b.n b6b78 │ │ + b.n b6b88 │ │ adds r0, #32 │ │ - b.n b6b62 │ │ + b.n b6b72 │ │ asrs r4, r1, #1 │ │ - b.n b6b46 │ │ + b.n b6b56 │ │ strb r0, [r1, #0] │ │ - b.n b6b4e │ │ + b.n b6b5e │ │ lsrs r0, r0, #12 │ │ stcl 0, cr2, [r2, #4] │ │ - b.n b7392 │ │ + b.n b73a2 │ │ adds r0, #80 @ 0x50 │ │ - b.n b6b56 │ │ + b.n b6b66 │ │ asrs r0, r5, #32 │ │ - b.n b6b7a │ │ - add r0, pc, #336 @ (adr r0, b71ac ) │ │ - b.n b755e │ │ + b.n b6b8a │ │ + add r0, pc, #336 @ (adr r0, b71bc ) │ │ + b.n b756e │ │ stmia r0!, {r3, r4, r6} │ │ - b.n b6b82 │ │ + b.n b6b92 │ │ strh r4, [r4, #0] │ │ - b.n b7566 │ │ + b.n b7576 │ │ str r4, [r0, #0] │ │ - b.n b6b84 │ │ + b.n b6b94 │ │ movs r4, r1 │ │ - b.n b7310 │ │ + b.n b7320 │ │ lsls r7, r4, #8 │ │ cmp r2, #0 │ │ ands r4, r0 │ │ - b.n b6b96 │ │ + b.n b6ba6 │ │ asrs r4, r3, #32 │ │ - b.n b6b9a │ │ + b.n b6baa │ │ movs r1, r0 │ │ - b.n b7326 │ │ + b.n b7336 │ │ lsls r1, r6, #8 │ │ cmp r2, #0 │ │ ands r0, r2 │ │ - b.n b6ba6 │ │ + b.n b6bb6 │ │ str r0, [r5, #0] │ │ - b.n b6baa │ │ + b.n b6bba │ │ movs r6, r0 │ │ - b.n b7336 │ │ + b.n b7346 │ │ lsls r4, r7, #8 │ │ cmp r2, #0 │ │ movs r2, r0 │ │ - b.n b7340 │ │ + b.n b7350 │ │ lsls r7, r0, #9 │ │ cmp r2, #0 │ │ movs r4, r1 │ │ - b.n b735a │ │ + b.n b736a │ │ lsls r3, r2, #9 │ │ cmp r2, #0 │ │ ands r4, r6 │ │ - b.n b6bc6 │ │ - b.n b70b8 │ │ - b.n b6be4 │ │ + b.n b6bd6 │ │ + b.n b70c8 │ │ + b.n b6bf4 │ │ movs r4, r0 │ │ - b.n b7350 │ │ + b.n b7360 │ │ lsls r6, r3, #9 │ │ cmp r2, #0 │ │ asrs r0, r0, #1 │ │ - b.n b6bd6 │ │ + b.n b6be6 │ │ movs r1, r0 │ │ - b.n b7366 │ │ + b.n b7376 │ │ lsls r1, r5, #9 │ │ cmp r2, #0 │ │ str r4, [r0, #0] │ │ - b.n b6be2 │ │ + b.n b6bf2 │ │ adds r0, #16 │ │ - b.n b6be6 │ │ + b.n b6bf6 │ │ movs r3, r0 │ │ - b.n b7376 │ │ + b.n b7386 │ │ lsls r4, r6, #9 │ │ cmp r2, #0 │ │ movs r4, r1 │ │ - b.n b7376 │ │ + b.n b7386 │ │ stmia r0!, {r2} │ │ - b.n b6c10 │ │ + b.n b6c20 │ │ lsls r6, r7, #9 │ │ cmp r2, #0 │ │ movs r0, #28 │ │ - b.n b6bfe │ │ + b.n b6c0e │ │ strb r0, [r5, #0] │ │ - b.n b6c02 │ │ + b.n b6c12 │ │ movs r7, r0 │ │ - b.n b738a │ │ + b.n b739a │ │ lsls r7, r0, #10 │ │ cmp r2, #0 │ │ - add r0, pc, #160 @ (adr r0, b718c ) │ │ - b.n b7608 │ │ + add r0, pc, #160 @ (adr r0, b719c ) │ │ + b.n b7618 │ │ movs r1, r0 │ │ - b.n b739a │ │ + b.n b73aa │ │ lsls r2, r2, #10 │ │ cmp r2, #0 │ │ str r4, [r0, r0] │ │ - b.n b743a │ │ + b.n b744a │ │ movs r5, r0 │ │ - b.n b73a4 │ │ + b.n b73b4 │ │ lsls r5, r3, #10 │ │ cmp r2, #0 │ │ lsls r6, r4, #10 │ │ and.w fp, r0, r0 │ │ ldcl 0, cr5, [r6, #32] │ │ - b.n b6c3a │ │ + b.n b6c4a │ │ ands r0, r3 │ │ - b.n b6c32 │ │ + b.n b6c42 │ │ stmia r0!, {r5} │ │ - b.n b6c36 │ │ + b.n b6c46 │ │ str r0, [r1, r0] │ │ - b.n b6c1e │ │ + b.n b6c2e │ │ lsrs r0, r0, #12 │ │ stcl 0, cr5, [r2, #112] @ 0x70 │ │ - b.n b6c42 │ │ + b.n b6c52 │ │ ands r4, r4 │ │ - b.n b6c26 │ │ + b.n b6c36 │ │ ands r3, r0 │ │ - b.n b746a │ │ + b.n b747a │ │ adds r0, #40 @ 0x28 │ │ - b.n b6c2e │ │ + b.n b6c3e │ │ stmia r0!, {r2, r3, r5} │ │ - b.n b6c32 │ │ + b.n b6c42 │ │ adds r0, #4 │ │ - b.n b6c56 │ │ + b.n b6c66 │ │ movs r5, r0 │ │ - b.n b73e0 │ │ + b.n b73f0 │ │ movs r1, r1 │ │ subs r2, #0 │ │ str r0, [r0, r0] │ │ - b.n b6c62 │ │ + b.n b6c72 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr1, [r2, #32] │ │ - b.n b6c6e │ │ + b.n b6c7e │ │ stmia r0!, {r3} │ │ - b.n b6c6e │ │ + b.n b6c7e │ │ str r0, [r3, r0] │ │ - b.n b6c52 │ │ + b.n b6c62 │ │ str r3, [r0, r0] │ │ - b.n b7496 │ │ + b.n b74a6 │ │ adds r0, #28 │ │ - b.n b6c5a │ │ + b.n b6c6a │ │ stmia r0!, {r5} │ │ - b.n b6c5e │ │ + b.n b6c6e │ │ asrs r0, r1, #32 │ │ - b.n b6c62 │ │ + b.n b6c72 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr0, [r0, #16] │ │ - b.n b7418 │ │ + b.n b7428 │ │ movs r3, r0 │ │ cmp r2, #0 │ │ adds r0, #7 │ │ - b.n b74b2 │ │ + b.n b74c2 │ │ movs r5, r0 │ │ - b.n b741c │ │ + b.n b742c │ │ movs r4, r1 │ │ cmp r2, #0 │ │ lsls r6, r0, #11 │ │ and.w fp, r0, r0 │ │ ldcl 0, cr3, [r6, #32] │ │ - b.n b6cb2 │ │ + b.n b6cc2 │ │ asrs r4, r1, #32 │ │ - b.n b6caa │ │ + b.n b6cba │ │ ands r4, r2 │ │ - b.n b6cae │ │ + b.n b6cbe │ │ adds r0, #8 │ │ - b.n b6cae │ │ + b.n b6cbe │ │ lsrs r0, r0, #12 │ │ stcl 0, cr3, [lr, #64] @ 0x40 │ │ - b.n b6cba │ │ + b.n b6cca │ │ asrs r4, r4, #32 │ │ - b.n b6c9e │ │ + b.n b6cae │ │ strb r0, [r5, #0] │ │ - b.n b6ca2 │ │ + b.n b6cb2 │ │ ands r4, r5 │ │ - b.n b6ca6 │ │ + b.n b6cb6 │ │ movs r5, r0 │ │ - b.n b7450 │ │ + b.n b7460 │ │ lsls r2, r7, #10 │ │ subs r2, #0 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr1, [r2, #48] @ 0x30 │ │ - b.n b6cd6 │ │ + b.n b6ce6 │ │ strb r4, [r2, #0] │ │ - b.n b6cda │ │ + b.n b6cea │ │ movs r0, r3 │ │ - b.n b76be │ │ + b.n b76ce │ │ movs r0, #8 │ │ - b.n b6ce6 │ │ + b.n b6cf6 │ │ lsls r2, r1, #2 │ │ stmia.w r0, {r3, sp} │ │ - b.n b6ce6 │ │ + b.n b6cf6 │ │ lsrs r0, r0, #12 │ │ stcl 2, cr0, [lr, #708] @ 0x2c4 │ │ and.w fp, r0, r0 │ │ ldcl 0, cr7, [r6] │ │ - b.n b6cfa │ │ + b.n b6d0a │ │ lsrs r0, r0, #12 │ │ stcl 0, cr3, [r0, #16] │ │ - b.n b6d02 │ │ + b.n b6d12 │ │ str r0, [r1, #0] │ │ - b.n b6d12 │ │ + b.n b6d22 │ │ str r0, [r1, r0] │ │ - b.n b6d0a │ │ + b.n b6d1a │ │ strb r0, [r3, #0] │ │ - b.n b6cee │ │ + b.n b6cfe │ │ movs r0, #28 │ │ - b.n b6cf2 │ │ + b.n b6d02 │ │ str r0, [r4, r0] │ │ - b.n b6cf6 │ │ + b.n b6d06 │ │ str r0, [r1, #0] │ │ - b.n b6cfa │ │ + b.n b6d0a │ │ movs r0, #16 │ │ - b.n b6d1e │ │ + b.n b6d2e │ │ movs r2, r0 │ │ - b.n b74a8 │ │ + b.n b74b8 │ │ lsls r4, r4, #10 │ │ subs r2, #0 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr12, [r1, #32] │ │ - b.n b770e │ │ + b.n b771e │ │ asrs r0, r1, #32 │ │ - b.n b6d34 │ │ + b.n b6d44 │ │ strb r0, [r1, #0] │ │ - b.n b6d36 │ │ + b.n b6d46 │ │ movs r0, #0 │ │ - b.n b6d3a │ │ + b.n b6d4a │ │ movs r6, r1 │ │ stmia.w ip, {r2, r4, ip, sp, lr} │ │ - b.n b6d22 │ │ + b.n b6d32 │ │ lsls r3, r3, #10 │ │ and.w fp, r0, r0 │ │ ldcl 0, cr7, [r2, #16] │ │ - b.n b756e │ │ + b.n b757e │ │ movs r0, #8 │ │ - b.n b6d56 │ │ + b.n b6d66 │ │ str r0, [r3, r0] │ │ - b.n b6d56 │ │ + b.n b6d66 │ │ str r0, [r4, #0] │ │ - b.n b6d5a │ │ + b.n b6d6a │ │ movs r0, #8 │ │ - b.n b6d52 │ │ + b.n b6d62 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr2, [sl, #112] @ 0x70 │ │ - b.n b6d66 │ │ + b.n b6d76 │ │ str r0, [r1, r1] │ │ - b.n b6d4a │ │ + b.n b6d5a │ │ eors r4, r1 │ │ - b.n b6d4e │ │ + b.n b6d5e │ │ str r0, [r2, #4] │ │ - b.n b6d52 │ │ + b.n b6d62 │ │ ands r4, r0 │ │ - b.n b6d76 │ │ + b.n b6d86 │ │ movs r2, r0 │ │ - b.n b7502 │ │ + b.n b7512 │ │ movs r0, r1 │ │ subs r2, #0 │ │ movs r0, #0 │ │ - b.n b6d82 │ │ + b.n b6d92 │ │ adds r0, #24 │ │ - b.n b7766 │ │ + b.n b7776 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr5, [sl, #32] │ │ - b.n b6d8e │ │ + b.n b6d9e │ │ str r0, [r1, #0] │ │ - b.n b6da6 │ │ + b.n b6db6 │ │ movs r4, r6 │ │ stmia.w r3, {r2, sp} │ │ - b.n b75ba │ │ + b.n b75ca │ │ str r0, [r1, #0] │ │ - b.n b6d7e │ │ + b.n b6d8e │ │ lsrs r0, r0, #12 │ │ stcl 0, cr5, [r0, #64] @ 0x40 │ │ - b.n b6da6 │ │ - b.n b72d0 │ │ - b.n b778a │ │ + b.n b6db6 │ │ + b.n b72e0 │ │ + b.n b779a │ │ str r0, [r5, #0] │ │ - b.n b6dae │ │ + b.n b6dbe │ │ movs r6, r0 │ │ - b.n b753c │ │ + b.n b754c │ │ movs r4, r1 │ │ subs r2, #0 │ │ adds r0, #20 │ │ - b.n b6dba │ │ + b.n b6dca │ │ ands r4, r1 │ │ - b.n b75de │ │ + b.n b75ee │ │ stmia r0!, {r3} │ │ - b.n b6dde │ │ + b.n b6dee │ │ adds r0, #44 @ 0x2c │ │ - b.n b6da6 │ │ + b.n b6db6 │ │ adds r0, #20 │ │ - b.n b6de4 │ │ + b.n b6df4 │ │ str r4, [r1, #0] │ │ - b.n b6dce │ │ + b.n b6dde │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr6, [lr, #144] @ 0x90 │ │ - b.n b6db6 │ │ + b.n b6dc6 │ │ str r5, [r0, #0] │ │ - b.n b75fa │ │ + b.n b760a │ │ stmia r0!, {r3} │ │ - b.n b6dc4 │ │ + b.n b6dd4 │ │ stmia r0!, {r2} │ │ - b.n b7602 │ │ + b.n b7612 │ │ str r0, [r5, r0] │ │ - b.n b6dc6 │ │ + b.n b6dd6 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr0, [r3, #28] │ │ - b.n b7570 │ │ + b.n b7580 │ │ movs r3, r0 │ │ cmp r2, #0 │ │ str r1, [r0, r0] │ │ - b.n b7616 │ │ + b.n b7626 │ │ movs r5, r0 │ │ - b.n b757e │ │ + b.n b758e │ │ movs r6, r1 │ │ cmp r2, #0 │ │ movs r6, r2 │ │ and.w r0, r0, ip, lsl #16 │ │ - b.n b6e20 │ │ + b.n b6e30 │ │ adds r0, #48 @ 0x30 │ │ - b.n b6e0a │ │ + b.n b6e1a │ │ strb r0, [r7, #0] │ │ - b.n b6e0e │ │ + b.n b6e1e │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr5, [r4, #32] │ │ - b.n b6e1e │ │ + b.n b6e2e │ │ str r0, [r1, r0] │ │ - b.n b6e12 │ │ + b.n b6e22 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr5, [ip, #208] @ 0xd0 │ │ - b.n b6e22 │ │ + b.n b6e32 │ │ strb r0, [r2, #1] │ │ - b.n b6e06 │ │ + b.n b6e16 │ │ strb r1, [r0, #0] │ │ - b.n b764a │ │ + b.n b765a │ │ adds r0, #72 @ 0x48 │ │ - b.n b6e0e │ │ + b.n b6e1e │ │ asrs r4, r1, #1 │ │ - b.n b6e12 │ │ + b.n b6e22 │ │ movs r5, r0 │ │ - b.n b75ba │ │ + b.n b75ca │ │ movs r0, r1 │ │ subs r2, #0 │ │ asrs r0, r3, #32 │ │ - b.n b6e3e │ │ + b.n b6e4e │ │ ands r0, r6 │ │ - b.n b7822 │ │ + b.n b7832 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr5, [ip, #32] │ │ - b.n b6e62 │ │ + b.n b6e72 │ │ adds r0, #32 │ │ - b.n b6e4e │ │ + b.n b6e5e │ │ str r0, [r1, r0] │ │ - b.n b6e46 │ │ + b.n b6e56 │ │ str r2, [r0, r0] │ │ - b.n b7676 │ │ + b.n b7686 │ │ movs r6, r1 │ │ stmia.w r4, {r8, r9, fp} │ │ stcl 0, cr0, [sl, #32] │ │ - b.n b75ee │ │ + b.n b75fe │ │ movs r5, r1 │ │ cmp r2, #0 │ │ movs r0, #4 │ │ - b.n b6e6a │ │ + b.n b6e7a │ │ asrs r0, r2, #32 │ │ - b.n b6e6e │ │ + b.n b6e7e │ │ movs r1, r0 │ │ - b.n b75f6 │ │ + b.n b7606 │ │ movs r0, r3 │ │ cmp r2, #0 │ │ str r4, [r3, #0] │ │ - b.n b6e7a │ │ + b.n b6e8a │ │ movs r0, #40 @ 0x28 │ │ - b.n b6e7e │ │ + b.n b6e8e │ │ movs r2, r0 │ │ - b.n b760e │ │ + b.n b761e │ │ movs r2, r4 │ │ cmp r2, #0 │ │ movs r0, r1 │ │ - b.n b7614 │ │ + b.n b7624 │ │ movs r4, r5 │ │ cmp r2, #0 │ │ str r5, [r0, #0] │ │ - b.n b76b2 │ │ + b.n b76c2 │ │ movs r6, r0 │ │ - b.n b7618 │ │ + b.n b7628 │ │ movs r7, r6 │ │ cmp r2, #0 │ │ lsls r1, r0, #1 │ │ and.w r0, r0, r0, lsr #12 │ │ - b.n b6ebc │ │ + b.n b6ecc │ │ strh r6, [r0, #0] │ │ - b.n b76c6 │ │ + b.n b76d6 │ │ asrs r4, r4, #32 │ │ - b.n b6eaa │ │ + b.n b6eba │ │ movs r0, #44 @ 0x2c │ │ - b.n b6eae │ │ + b.n b6ebe │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr3, [r3, #32] │ │ - b.n b6ebc │ │ + b.n b6ecc │ │ asrs r4, r7, #32 │ │ - b.n b6e9a │ │ + b.n b6eaa │ │ str r0, [r0, #4] │ │ - b.n b6e9e │ │ + b.n b6eae │ │ movs r0, #68 @ 0x44 │ │ - b.n b6ea2 │ │ + b.n b6eb2 │ │ adds r0, #8 │ │ - b.n b6ec2 │ │ + b.n b6ed2 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr2, [lr, #16] │ │ - b.n b6ece │ │ + b.n b6ede │ │ asrs r0, r2, #32 │ │ - b.n b6ed2 │ │ + b.n b6ee2 │ │ movs r1, r0 │ │ - b.n b765a │ │ + b.n b766a │ │ @ instruction: 0xffe63aff │ │ ands r4, r2 │ │ - b.n b6ef8 │ │ + b.n b6f08 │ │ asrs r0, r0, #32 │ │ - b.n b6ee2 │ │ + b.n b6ef2 │ │ adds r0, #8 │ │ - b.n b6ee6 │ │ + b.n b6ef6 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr6, [r4, #32] │ │ - b.n b6ef6 │ │ + b.n b6f06 │ │ ands r4, r1 │ │ - b.n b78d2 │ │ + b.n b78e2 │ │ movs r6, r1 │ │ stmia.w r4, {r1, ip} │ │ - b.n b771a │ │ + b.n b772a │ │ str r0, [r1, #0] │ │ - b.n b6ede │ │ + b.n b6eee │ │ lsrs r0, r0, #12 │ │ stcl 0, cr6, [r0, #112] @ 0x70 │ │ - b.n b6f06 │ │ + b.n b6f16 │ │ movs r0, #40 @ 0x28 │ │ - b.n b6f0a │ │ + b.n b6f1a │ │ movs r2, r0 │ │ - b.n b769a │ │ + b.n b76aa │ │ @ instruction: 0xffdc3aff │ │ movs r0, #24 │ │ - b.n b6f16 │ │ + b.n b6f26 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr4, [lr, #32] │ │ - b.n b6f3a │ │ + b.n b6f4a │ │ adds r0, #32 │ │ - b.n b6f22 │ │ + b.n b6f32 │ │ movs r0, #36 @ 0x24 │ │ - b.n b6f06 │ │ + b.n b6f16 │ │ movs r0, #6 │ │ - b.n b774a │ │ + b.n b775a │ │ str r0, [r5, #0] │ │ - b.n b6f0e │ │ + b.n b6f1e │ │ adds r0, #44 @ 0x2c │ │ - b.n b6f12 │ │ + b.n b6f22 │ │ ands r0, r1 │ │ - b.n b6f2a │ │ + b.n b6f3a │ │ lsrs r0, r0, #12 │ │ stcl 0, cr0, [sl, #32] │ │ - b.n b76c8 │ │ + b.n b76d8 │ │ @ instruction: 0xffd23aff │ │ str r0, [r2, #0] │ │ - b.n b6f60 │ │ + b.n b6f70 │ │ strh r5, [r0, #0] │ │ - b.n b776a │ │ + b.n b777a │ │ adds r0, #48 @ 0x30 │ │ - b.n b6f4e │ │ + b.n b6f5e │ │ ands r0, r7 │ │ - b.n b6f52 │ │ + b.n b6f62 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr6, [r6, #32] │ │ - b.n b6f66 │ │ + b.n b6f76 │ │ str r0, [r1, #0] │ │ - b.n b6f56 │ │ + b.n b6f66 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr6, [ip, #208] @ 0xd0 │ │ - b.n b6f66 │ │ + b.n b6f76 │ │ adds r0, #60 @ 0x3c │ │ - b.n b6f4a │ │ + b.n b6f5a │ │ str r0, [r0, r1] │ │ - b.n b6f4e │ │ + b.n b6f5e │ │ eors r4, r0 │ │ - b.n b6f52 │ │ + b.n b6f62 │ │ movs r6, r0 │ │ - b.n b76f8 │ │ + b.n b7708 │ │ movs r2, r1 │ │ subs r2, #0 │ │ adds r0, #12 │ │ - b.n b6f7e │ │ + b.n b6f8e │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr5, [ip, #32] │ │ - b.n b6f9e │ │ + b.n b6fae │ │ adds r0, #48 @ 0x30 │ │ - b.n b6f6a │ │ + b.n b6f7a │ │ adds r0, #20 │ │ - b.n b6fa8 │ │ + b.n b6fb8 │ │ str r4, [r2, #0] │ │ - b.n b6f92 │ │ + b.n b6fa2 │ │ str r0, [r7, #0] │ │ - b.n b6f76 │ │ + b.n b6f86 │ │ str r1, [r0, #0] │ │ - b.n b77ba │ │ + b.n b77ca │ │ asrs r4, r6, #32 │ │ - b.n b6f7e │ │ + b.n b6f8e │ │ str r0, [r1, r0] │ │ - b.n b6f88 │ │ + b.n b6f98 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr0, [r3, #28] │ │ - b.n b772e │ │ + b.n b773e │ │ movs r2, r1 │ │ cmp r2, #0 │ │ asrs r0, r2, #32 │ │ - b.n b6fb2 │ │ + b.n b6fc2 │ │ movs r0, #28 │ │ - b.n b6fb6 │ │ + b.n b6fc6 │ │ movs r2, r0 │ │ - b.n b773c │ │ + b.n b774c │ │ movs r4, r2 │ │ cmp r2, #0 │ │ asrs r0, r5, #32 │ │ - b.n b6fc2 │ │ + b.n b6fd2 │ │ movs r6, r0 │ │ - b.n b7748 │ │ + b.n b7758 │ │ movs r6, r3 │ │ cmp r2, #0 │ │ - add r0, pc, #160 @ (adr r0, b754c ) │ │ - b.n b79c8 │ │ + add r0, pc, #160 @ (adr r0, b755c ) │ │ + b.n b79d8 │ │ movs r7, r0 │ │ - b.n b7762 │ │ + b.n b7772 │ │ movs r7, r4 │ │ cmp r2, #0 │ │ lsls r7, r6, #7 │ │ and.w r0, r0, ip, lsl #16 │ │ - b.n b6ff8 │ │ + b.n b7008 │ │ asrs r4, r4, #32 │ │ - b.n b6fe2 │ │ + b.n b6ff2 │ │ adds r0, #44 @ 0x2c │ │ - b.n b6fe6 │ │ + b.n b6ff6 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr7, [r4, #32] │ │ - b.n b6ff6 │ │ + b.n b7006 │ │ eors r0, r1 │ │ - b.n b79d2 │ │ + b.n b79e2 │ │ strb r0, [r1, #0] │ │ - b.n b6ff2 │ │ + b.n b7002 │ │ strb r2, [r0, #0] │ │ - b.n b781a │ │ + b.n b782a │ │ movs r6, r1 │ │ stmia.w r4, {r8, r9, fp} │ │ stcl 0, cr1, [lr, #64] @ 0x40 │ │ - b.n b7006 │ │ + b.n b7016 │ │ movs r0, #28 │ │ - b.n b700a │ │ + b.n b701a │ │ movs r2, r0 │ │ - b.n b7790 │ │ + b.n b77a0 │ │ @ instruction: 0xffea3aff │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr5, [sl, #32] │ │ - b.n b702e │ │ + b.n b703e │ │ asrs r4, r3, #32 │ │ - b.n b6ffe │ │ + b.n b700e │ │ asrs r4, r2, #32 │ │ - b.n b703c │ │ + b.n b704c │ │ movs r0, #12 │ │ - b.n b7026 │ │ + b.n b7036 │ │ adds r0, #20 │ │ - b.n b702a │ │ + b.n b703a │ │ movs r0, #24 │ │ - b.n b700e │ │ + b.n b701e │ │ adds r0, #32 │ │ - b.n b7012 │ │ + b.n b7022 │ │ str r0, [r1, r0] │ │ - b.n b7018 │ │ + b.n b7028 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr1, [r1, #160] @ 0xa0 │ │ - b.n b703e │ │ + b.n b704e │ │ movs r6, r0 │ │ - b.n b77c4 │ │ + b.n b77d4 │ │ @ instruction: 0xffe03aff │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr2, [ip, #144] @ 0x90 │ │ - b.n b704e │ │ + b.n b705e │ │ str r0, [r1, #0] │ │ - b.n b706a │ │ + b.n b707a │ │ adds r0, #44 @ 0x2c │ │ - b.n b7056 │ │ + b.n b7066 │ │ movs r0, #48 @ 0x30 │ │ - b.n b703a │ │ + b.n b704a │ │ asrs r4, r6, #32 │ │ - b.n b703e │ │ + b.n b704e │ │ adds r0, #56 @ 0x38 │ │ - b.n b7042 │ │ + b.n b7052 │ │ str r0, [r1, #0] │ │ - b.n b7062 │ │ + b.n b7072 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr10, [lr, #160] @ 0xa0 │ │ - b.n b7a68 │ │ + b.n b7a78 │ │ movs r7, r0 │ │ - b.n b7802 │ │ + b.n b7812 │ │ lsls r0, r2, #7 │ │ subs r2, #0 │ │ adds r0, #12 │ │ - b.n b7094 │ │ + b.n b70a4 │ │ asrs r4, r7, #32 │ │ - b.n b707e │ │ + b.n b708e │ │ movs r0, #68 @ 0x44 │ │ - b.n b7082 │ │ + b.n b7092 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr3, [r3, #32] │ │ - b.n b7090 │ │ + b.n b70a0 │ │ asrs r0, r1, #1 │ │ - b.n b706e │ │ + b.n b707e │ │ strh r4, [r1, #2] │ │ - b.n b7072 │ │ + b.n b7082 │ │ movs r0, #80 @ 0x50 │ │ - b.n b7076 │ │ + b.n b7086 │ │ movs r0, r2 │ │ - b.n b70b4 │ │ + b.n b70c4 │ │ adds r0, #8 │ │ - b.n b707e │ │ + b.n b708e │ │ lsls r4, r0, #7 │ │ and.w r0, r0, r0, lsl #12 │ │ - b.n b70a6 │ │ + b.n b70b6 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr4, [r5, #32] │ │ - b.n b70b8 │ │ + b.n b70c8 │ │ asrs r0, r1, #32 │ │ - b.n b70b2 │ │ + b.n b70c2 │ │ adds r0, #24 │ │ - b.n b7096 │ │ + b.n b70a6 │ │ adds r0, #6 │ │ - b.n b78da │ │ + b.n b78ea │ │ str r4, [r3, #0] │ │ - b.n b709e │ │ + b.n b70ae │ │ asrs r0, r4, #32 │ │ - b.n b70a2 │ │ + b.n b70b2 │ │ ands r0, r1 │ │ - b.n b70a6 │ │ + b.n b70b6 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr0, [r0, #8] │ │ - b.n b7854 │ │ + b.n b7864 │ │ mcr2 10, 1, r3, cr10, cr15, {7} @ │ │ movs r0, #32 │ │ - b.n b70d6 │ │ + b.n b70e6 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr4, [lr, #32] │ │ - b.n b70fa │ │ + b.n b710a │ │ asrs r0, r3, #32 │ │ - b.n b70e2 │ │ + b.n b70f2 │ │ movs r0, #56 @ 0x38 │ │ - b.n b70c6 │ │ + b.n b70d6 │ │ movs r0, #3 │ │ - b.n b790a │ │ + b.n b791a │ │ asrs r0, r6, #32 │ │ - b.n b70ce │ │ + b.n b70de │ │ adds r0, #52 @ 0x34 │ │ - b.n b70d2 │ │ + b.n b70e2 │ │ ands r0, r1 │ │ - b.n b70e0 │ │ + b.n b70f0 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr3, [r5, #16] │ │ - b.n b70fe │ │ + b.n b710e │ │ str r0, [r2, #0] │ │ - b.n b7102 │ │ + b.n b7112 │ │ movs r6, r0 │ │ - b.n b788c │ │ + b.n b789c │ │ mcr2 10, 1, r3, cr0, cr15, {7} @ │ │ asrs r0, r0, #32 │ │ - b.n b710e │ │ + b.n b711e │ │ str r0, [r1, #0] │ │ - b.n b7122 │ │ + b.n b7132 │ │ ands r0, r1 │ │ - b.n b7116 │ │ + b.n b7126 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr6, [r8, #32] │ │ - b.n b70fe │ │ + b.n b710e │ │ str r4, [r1, #0] │ │ - b.n b7b02 │ │ + b.n b7b12 │ │ movs r2, r3 │ │ stmia.w r6, {r0, r1, sp, lr} │ │ - b.n b794a │ │ + b.n b795a │ │ lsrs r0, r0, #12 │ │ stcl 0, cr3, [r0, #112] @ 0x70 │ │ - b.n b7132 │ │ + b.n b7142 │ │ movs r7, r0 │ │ - b.n b78bc │ │ + b.n b78cc │ │ mrc2 10, 0, r3, cr7, cr15, {7} @ │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr7, [ip, #32] │ │ - b.n b715a │ │ + b.n b716a │ │ asrs r0, r3, #32 │ │ - b.n b7146 │ │ + b.n b7156 │ │ ands r0, r4 │ │ - b.n b714a │ │ + b.n b715a │ │ strb r0, [r1, #0] │ │ - b.n b7138 │ │ + b.n b7148 │ │ strb r3, [r0, #0] │ │ - b.n b7972 │ │ + b.n b7982 │ │ asrs r4, r4, #32 │ │ - b.n b7136 │ │ + b.n b7146 │ │ adds r0, #40 @ 0x28 │ │ - b.n b713a │ │ + b.n b714a │ │ ands r4, r5 │ │ - b.n b713e │ │ + b.n b714e │ │ lsrs r0, r0, #12 │ │ stcl 0, cr0, [r5, #8] │ │ - b.n b78f2 │ │ + b.n b7902 │ │ mcr2 10, 0, r3, cr13, cr15, {7} @ │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr3, [lr, #32] │ │ - b.n b718e │ │ + b.n b719e │ │ asrs r4, r1, #32 │ │ - b.n b7176 │ │ + b.n b7186 │ │ movs r0, #20 │ │ - b.n b717a │ │ + b.n b718a │ │ adds r0, #8 │ │ - b.n b716e │ │ + b.n b717e │ │ lsrs r0, r0, #12 │ │ stcl 0, cr3, [r8, #64] @ 0x40 │ │ - b.n b7186 │ │ + b.n b7196 │ │ movs r0, #56 @ 0x38 │ │ - b.n b716a │ │ + b.n b717a │ │ movs r0, #6 │ │ - b.n b79ae │ │ + b.n b79be │ │ asrs r0, r6, #32 │ │ - b.n b7172 │ │ + b.n b7182 │ │ str r4, [r6, #0] │ │ - b.n b7176 │ │ + b.n b7186 │ │ asrs r4, r3, #32 │ │ - b.n b719a │ │ + b.n b71aa │ │ movs r1, r0 │ │ - b.n b7924 │ │ + b.n b7934 │ │ movs r7, r0 │ │ subs r2, #0 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr6, [r5, #96] @ 0x60 │ │ - b.n b7b8a │ │ + b.n b7b9a │ │ asrs r4, r1, #32 │ │ - b.n b71ae │ │ + b.n b71be │ │ str r0, [r1, r0] │ │ - b.n b71bc │ │ + b.n b71cc │ │ ands r4, r2 │ │ - b.n b71b6 │ │ + b.n b71c6 │ │ movs r2, r3 │ │ stmia.w r6, {r3, ip, lr} │ │ - b.n b71ae │ │ + b.n b71be │ │ lsrs r0, r0, #12 │ │ stcl 0, cr0, [r8, #8] │ │ - b.n b7954 │ │ + b.n b7964 │ │ lsls r3, r7, #5 │ │ subs r2, #0 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr1, [lr, #144] @ 0x90 │ │ - b.n b71d2 │ │ + b.n b71e2 │ │ adds r0, #8 │ │ - b.n b71f2 │ │ + b.n b7202 │ │ movs r0, #44 @ 0x2c │ │ - b.n b71da │ │ + b.n b71ea │ │ asrs r0, r6, #32 │ │ - b.n b71be │ │ + b.n b71ce │ │ strb r4, [r6, #0] │ │ - b.n b71c2 │ │ + b.n b71d2 │ │ movs r0, #56 @ 0x38 │ │ - b.n b71c6 │ │ + b.n b71d6 │ │ adds r0, #8 │ │ - b.n b71e2 │ │ + b.n b71f2 │ │ lsrs r0, r0, #12 │ │ stcl 1, cr0, [ip, #452] @ 0x1c4 │ │ and.w r0, r0, r0, ror #8 │ │ - b.n b71f6 │ │ + b.n b7206 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr4, [r5, #32] │ │ - b.n b7208 │ │ + b.n b7218 │ │ adds r0, #56 @ 0x38 │ │ - b.n b7202 │ │ + b.n b7212 │ │ movs r0, #60 @ 0x3c │ │ - b.n b71e6 │ │ + b.n b71f6 │ │ movs r0, #1 │ │ - b.n b7a2a │ │ + b.n b7a3a │ │ asrs r0, r0, #1 │ │ - b.n b71ee │ │ + b.n b71fe │ │ adds r0, #68 @ 0x44 │ │ - b.n b71f2 │ │ + b.n b7202 │ │ ands r0, r1 │ │ - b.n b7206 │ │ + b.n b7216 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr1, [r8, #16] │ │ - b.n b721e │ │ + b.n b722e │ │ movs r7, r0 │ │ - b.n b79a4 │ │ + b.n b79b4 │ │ ldc2l 10, cr3, [lr, #1020]! @ 0x3fc @ │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr7, [ip, #32] │ │ - b.n b7246 │ │ + b.n b7256 │ │ adds r0, #0 │ │ - b.n b7232 │ │ + b.n b7242 │ │ ands r0, r1 │ │ - b.n b7236 │ │ + b.n b7246 │ │ strb r0, [r1, #0] │ │ - b.n b721a │ │ + b.n b722a │ │ strb r1, [r0, #0] │ │ - b.n b7a5e │ │ + b.n b7a6e │ │ adds r0, #24 │ │ - b.n b7222 │ │ + b.n b7232 │ │ asrs r4, r3, #32 │ │ - b.n b7226 │ │ + b.n b7236 │ │ ands r0, r4 │ │ - b.n b722a │ │ + b.n b723a │ │ lsrs r0, r0, #12 │ │ stcl 0, cr1, [r0, #160] @ 0xa0 │ │ - b.n b7252 │ │ - b.n b777c │ │ - b.n b7c36 │ │ + b.n b7262 │ │ + b.n b778c │ │ + b.n b7c46 │ │ movs r2, r0 │ │ - b.n b79dc │ │ + b.n b79ec │ │ ldc2l 10, cr3, [r4, #1020]! @ 0x3fc @ │ │ movs r0, #36 @ 0x24 │ │ - b.n b7262 │ │ + b.n b7272 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr4, [r5, #32] │ │ - b.n b7274 │ │ + b.n b7284 │ │ adds r0, #44 @ 0x2c │ │ - b.n b726e │ │ + b.n b727e │ │ movs r0, #60 @ 0x3c │ │ - b.n b7252 │ │ + b.n b7262 │ │ movs r0, #1 │ │ - b.n b7a96 │ │ + b.n b7aa6 │ │ asrs r0, r0, #1 │ │ - b.n b725a │ │ + b.n b726a │ │ adds r0, #68 @ 0x44 │ │ - b.n b725e │ │ + b.n b726e │ │ ands r0, r1 │ │ - b.n b727e │ │ + b.n b728e │ │ lsrs r0, r0, #12 │ │ stcl 0, cr1, [lr, #16] │ │ - b.n b728a │ │ + b.n b729a │ │ ands r0, r2 │ │ - b.n b728e │ │ + b.n b729e │ │ movs r4, r0 │ │ - b.n b7a14 │ │ + b.n b7a24 │ │ stc2l 10, cr3, [sl, #1020]! @ 0x3fc @ │ │ str r4, [r2, #0] │ │ - b.n b72b4 │ │ + b.n b72c4 │ │ ands r0, r1 │ │ - b.n b729e │ │ + b.n b72ae │ │ adds r0, #0 │ │ - b.n b72a2 │ │ + b.n b72b2 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr6, [r6, #32] │ │ - b.n b72b6 │ │ + b.n b72c6 │ │ ands r4, r2 │ │ - b.n b728e │ │ + b.n b729e │ │ ands r1, r0 │ │ - b.n b7ad2 │ │ + b.n b7ae2 │ │ str r0, [r1, #0] │ │ - b.n b7296 │ │ + b.n b72a6 │ │ adds r0, #12 │ │ - b.n b729a │ │ + b.n b72aa │ │ asrs r0, r2, #32 │ │ - b.n b729e │ │ + b.n b72ae │ │ lsrs r0, r0, #12 │ │ stcl 0, cr3, [r0, #160] @ 0xa0 │ │ - b.n b72c6 │ │ + b.n b72d6 │ │ asrs r4, r6, #32 │ │ - b.n b72ca │ │ + b.n b72da │ │ movs r1, r0 │ │ - b.n b7a54 │ │ - ldc2l 10, cr3, [pc, #1020] @ b7bac @ │ │ - add r0, pc, #48 @ (adr r0, b77e4 ) │ │ - b.n b7af6 │ │ + b.n b7a64 │ │ + ldc2l 10, cr3, [pc, #1020] @ b7bbc @ │ │ + add r0, pc, #48 @ (adr r0, b77f4 ) │ │ + b.n b7b06 │ │ asrs r4, r4, #32 │ │ - b.n b72da │ │ + b.n b72ea │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr12, [r8, #32] │ │ - b.n b72f2 │ │ + b.n b7302 │ │ str r4, [r5, #0] │ │ - b.n b72e6 │ │ + b.n b72f6 │ │ asrs r0, r6, #32 │ │ - b.n b72ca │ │ + b.n b72da │ │ asrs r3, r0, #32 │ │ - b.n b7b0e │ │ + b.n b7b1e │ │ stmia r0!, {r3} │ │ - b.n b72ee │ │ + b.n b72fe │ │ stmia r0!, {r1, r3} │ │ - b.n b7b16 │ │ + b.n b7b26 │ │ adds r0, #52 @ 0x34 │ │ - b.n b72da │ │ + b.n b72ea │ │ str r0, [r7, #0] │ │ - b.n b72de │ │ + b.n b72ee │ │ lsrs r0, r0, #12 │ │ stcl 0, cr0, [lr, #8] │ │ - b.n b7a94 │ │ + b.n b7aa4 │ │ ldc2l 10, cr3, [r3, #1020] @ 0x3fc @ │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr2, [r5, #96] @ 0x60 │ │ - b.n b7312 │ │ + b.n b7322 │ │ str r0, [r1, #0] │ │ - b.n b7320 │ │ + b.n b7330 │ │ adds r0, #32 │ │ - b.n b731a │ │ + b.n b732a │ │ movs r0, #60 @ 0x3c │ │ - b.n b72fe │ │ + b.n b730e │ │ strb r0, [r0, #1] │ │ - b.n b7302 │ │ + b.n b7312 │ │ adds r0, #68 @ 0x44 │ │ - b.n b7306 │ │ + b.n b7316 │ │ str r0, [r1, #0] │ │ - b.n b7322 │ │ + b.n b7332 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr3, [ip, #16] │ │ - b.n b7332 │ │ + b.n b7342 │ │ movs r0, #40 @ 0x28 │ │ - b.n b7336 │ │ + b.n b7346 │ │ movs r2, r0 │ │ - b.n b7ac0 │ │ + b.n b7ad0 │ │ stc2l 10, cr3, [sl, #1020] @ 0x3fc @ │ │ movs r0, #0 │ │ - b.n b7342 │ │ + b.n b7352 │ │ str r4, [r4, r0] │ │ - b.n b7d26 │ │ + b.n b7d36 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr7, [lr, #32] │ │ - b.n b734e │ │ + b.n b735e │ │ str r0, [r1, #0] │ │ - b.n b736e │ │ + b.n b737e │ │ lsls r4, r1, #2 │ │ stmia.w r5, {r0, r1, sp} │ │ - b.n b7b7a │ │ + b.n b7b8a │ │ str r0, [r1, #0] │ │ - b.n b733e │ │ + b.n b734e │ │ lsrs r0, r0, #12 │ │ stcl 0, cr10, [r0, #160] @ 0xa0 │ │ - b.n b7d60 │ │ + b.n b7d70 │ │ movs r1, r0 │ │ - b.n b7af2 │ │ + b.n b7b02 │ │ stc2l 10, cr3, [r1, #1020] @ 0x3fc @ │ │ asrs r4, r1, #32 │ │ - b.n b7372 │ │ + b.n b7382 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr7, [r8, #32] │ │ - b.n b738a │ │ + b.n b739a │ │ asrs r0, r6, #32 │ │ - b.n b735e │ │ + b.n b736e │ │ asrs r4, r2, #32 │ │ - b.n b739c │ │ + b.n b73ac │ │ adds r0, #20 │ │ - b.n b7386 │ │ + b.n b7396 │ │ ands r4, r6 │ │ - b.n b736a │ │ + b.n b737a │ │ strb r0, [r1, #0] │ │ - b.n b7370 │ │ + b.n b7380 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr1, [r1, #16] │ │ - b.n b7bb6 │ │ + b.n b7bc6 │ │ adds r0, #56 @ 0x38 │ │ - b.n b737a │ │ + b.n b738a │ │ adds r0, #28 │ │ - b.n b739e │ │ + b.n b73ae │ │ movs r1, r0 │ │ - b.n b7b28 │ │ + b.n b7b38 │ │ ldc2 10, cr3, [r6, #1020]! @ 0x3fc @ │ │ asrs r0, r3, #32 │ │ - b.n b73aa │ │ + b.n b73ba │ │ ands r0, r6 │ │ - b.n b7d8e │ │ + b.n b7d9e │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr6, [r8, #32] │ │ - b.n b73c6 │ │ + b.n b73d6 │ │ strb r0, [r4, #0] │ │ - b.n b73ba │ │ + b.n b73ca │ │ lsls r2, r1, #2 │ │ stmia.w r4, {r3, sp, lr} │ │ - b.n b73ba │ │ + b.n b73ca │ │ lsrs r0, r0, #12 │ │ stcl 0, cr1, [ip, #64] @ 0x40 │ │ - b.n b73ca │ │ + b.n b73da │ │ movs r2, r0 │ │ - b.n b7b50 │ │ + b.n b7b60 │ │ stc2 10, cr3, [lr, #1020]! @ 0x3fc @ │ │ movs r0, #12 │ │ - b.n b73d6 │ │ + b.n b73e6 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr7, [lr, #32] │ │ - b.n b73fa │ │ + b.n b740a │ │ movs r0, #36 @ 0x24 │ │ - b.n b73c2 │ │ + b.n b73d2 │ │ movs r0, #20 │ │ - b.n b7400 │ │ + b.n b7410 │ │ adds r0, #20 │ │ - b.n b73ea │ │ + b.n b73fa │ │ asrs r0, r5, #32 │ │ - b.n b73ce │ │ + b.n b73de │ │ strb r0, [r1, #0] │ │ - b.n b73d6 │ │ + b.n b73e6 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr2, [r2, #4] │ │ - b.n b7c1a │ │ + b.n b7c2a │ │ adds r0, #44 @ 0x2c │ │ - b.n b73de │ │ + b.n b73ee │ │ asrs r4, r3, #32 │ │ - b.n b7402 │ │ + b.n b7412 │ │ movs r2, r0 │ │ - b.n b7b88 │ │ + b.n b7b98 │ │ lsls r3, r5, #3 │ │ subs r2, #0 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr2, [lr, #96] @ 0x60 │ │ - b.n b7412 │ │ + b.n b7422 │ │ strb r0, [r1, #0] │ │ - b.n b7432 │ │ + b.n b7442 │ │ adds r0, #32 │ │ - b.n b741a │ │ + b.n b742a │ │ movs r0, #36 @ 0x24 │ │ - b.n b73fe │ │ + b.n b740e │ │ asrs r0, r5, #32 │ │ - b.n b7402 │ │ + b.n b7412 │ │ adds r0, #44 @ 0x2c │ │ - b.n b7406 │ │ + b.n b7416 │ │ strb r0, [r1, #0] │ │ - b.n b7422 │ │ + b.n b7432 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr0, [ip, #900] @ 0x384 │ │ and.w fp, r0, r0 │ │ ldcl 0, cr12, [sl, #4] │ │ - b.n b7c5a │ │ + b.n b7c6a │ │ adds r0, #36 @ 0x24 │ │ - b.n b743e │ │ + b.n b744e │ │ str r0, [r1, #0] │ │ - b.n b7456 │ │ + b.n b7466 │ │ strb r4, [r5, #0] │ │ - b.n b7446 │ │ + b.n b7456 │ │ adds r0, #84 @ 0x54 │ │ - b.n b742a │ │ + b.n b743a │ │ asrs r0, r3, #1 │ │ - b.n b742e │ │ + b.n b743e │ │ strb r4, [r3, #1] │ │ - b.n b7432 │ │ + b.n b7442 │ │ str r0, [r1, #0] │ │ - b.n b7446 │ │ + b.n b7456 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr4, [r8, #16] │ │ - b.n b745e │ │ + b.n b746e │ │ asrs r4, r3, #32 │ │ - b.n b7462 │ │ + b.n b7472 │ │ movs r1, r0 │ │ - b.n b7bee │ │ + b.n b7bfe │ │ stc2l 10, cr3, [sp, #1020] @ 0x3fc @ │ │ str r4, [r1, #0] │ │ - b.n b7488 │ │ + b.n b7498 │ │ asrs r0, r0, #32 │ │ - b.n b7472 │ │ + b.n b7482 │ │ adds r0, #8 │ │ - b.n b7476 │ │ + b.n b7486 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr6, [r6, #32] │ │ - b.n b748a │ │ + b.n b749a │ │ asrs r0, r3, #32 │ │ - b.n b7462 │ │ + b.n b7472 │ │ asrs r4, r0, #32 │ │ - b.n b7ca6 │ │ + b.n b7cb6 │ │ ands r4, r3 │ │ - b.n b746a │ │ + b.n b747a │ │ adds r0, #32 │ │ - b.n b746e │ │ + b.n b747e │ │ str r0, [r1, #0] │ │ - b.n b7472 │ │ + b.n b7482 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr4, [r0, #64] @ 0x40 │ │ - b.n b749a │ │ + b.n b74aa │ │ str r0, [r5, #0] │ │ - b.n b749e │ │ + b.n b74ae │ │ movs r6, r0 │ │ - b.n b7c2a │ │ + b.n b7c3a │ │ stc2l 10, cr3, [r2, #1020] @ 0x3fc @ │ │ adds r0, #12 │ │ - b.n b74aa │ │ + b.n b74ba │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr7, [r8, #32] │ │ - b.n b74c2 │ │ + b.n b74d2 │ │ adds r0, #36 @ 0x24 │ │ - b.n b7496 │ │ + b.n b74a6 │ │ adds r0, #16 │ │ - b.n b74d4 │ │ + b.n b74e4 │ │ str r4, [r2, #0] │ │ - b.n b74be │ │ + b.n b74ce │ │ str r4, [r5, #0] │ │ - b.n b74a2 │ │ + b.n b74b2 │ │ str r4, [r0, #0] │ │ - b.n b7ce6 │ │ + b.n b7cf6 │ │ ands r0, r5 │ │ - b.n b74aa │ │ + b.n b74ba │ │ strb r0, [r1, #0] │ │ - b.n b74b4 │ │ + b.n b74c4 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr0, [r3, #8] │ │ - b.n b7c60 │ │ + b.n b7c70 │ │ ldc2 10, cr3, [r7, #1020]! @ 0x3fc @ │ │ ands r4, r0 │ │ - b.n b74f8 │ │ + b.n b7508 │ │ movs r0, #48 @ 0x30 │ │ - b.n b74e2 │ │ + b.n b74f2 │ │ adds r0, #56 @ 0x38 │ │ - b.n b74e6 │ │ + b.n b74f6 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr4, [r4, #32] │ │ - b.n b74f6 │ │ + b.n b7506 │ │ movs r0, #72 @ 0x48 │ │ - b.n b74d2 │ │ + b.n b74e2 │ │ movs r0, #8 │ │ - b.n b7510 │ │ + b.n b7520 │ │ str r4, [r1, r1] │ │ - b.n b74da │ │ + b.n b74ea │ │ adds r0, #80 @ 0x50 │ │ - b.n b74de │ │ + b.n b74ee │ │ ands r0, r1 │ │ - b.n b74e6 │ │ + b.n b74f6 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr2, [r2, #20] │ │ - b.n b7d2a │ │ + b.n b7d3a │ │ movs r4, r1 │ │ - b.n b7caa │ │ + b.n b7cba │ │ stc2 10, cr3, [fp, #1020]! @ 0x3fc @ │ │ adds r0, #60 @ 0x3c │ │ - b.n b7516 │ │ + b.n b7526 │ │ stmia r0!, {r1, r2, r3} │ │ - b.n b7d3a │ │ + b.n b7d4a │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr5, [sl, #32] │ │ - b.n b7536 │ │ + b.n b7546 │ │ adds r0, #84 @ 0x54 │ │ - b.n b7506 │ │ + b.n b7516 │ │ adds r0, #20 │ │ - b.n b7544 │ │ + b.n b7554 │ │ strb r4, [r0, #1] │ │ - b.n b752e │ │ - b.n b7ac0 │ │ - b.n b7512 │ │ + b.n b753e │ │ + b.n b7ad0 │ │ + b.n b7522 │ │ strb r4, [r3, #1] │ │ - b.n b7516 │ │ + b.n b7526 │ │ str r0, [r1, r0] │ │ - b.n b7520 │ │ + b.n b7530 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr4, [r3, #208] @ 0xd0 │ │ - b.n b7542 │ │ - b.n b7a34 │ │ - b.n b7560 │ │ + b.n b7552 │ │ + b.n b7a44 │ │ + b.n b7570 │ │ movs r4, r0 │ │ - b.n b7ccc │ │ + b.n b7cdc │ │ stc2 10, cr3, [r0, #1020]! @ 0x3fc @ │ │ adds r0, #24 │ │ - b.n b7552 │ │ + b.n b7562 │ │ ands r1, r0 │ │ - b.n b7d76 │ │ + b.n b7d86 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr5, [lr, #32] │ │ - b.n b757a │ │ + b.n b758a │ │ adds r0, #48 @ 0x30 │ │ - b.n b7542 │ │ + b.n b7552 │ │ adds r0, #12 │ │ - b.n b7580 │ │ + b.n b7590 │ │ strb r0, [r4, #0] │ │ - b.n b756a │ │ + b.n b757a │ │ asrs r4, r6, #32 │ │ - b.n b754e │ │ + b.n b755e │ │ strb r0, [r7, #0] │ │ - b.n b7552 │ │ + b.n b7562 │ │ str r0, [r1, r0] │ │ - b.n b755c │ │ + b.n b756c │ │ lsrs r0, r0, #12 │ │ stcl 0, cr1, [r3, #256] @ 0x100 │ │ - b.n b757e │ │ + b.n b758e │ │ movs r1, r0 │ │ - b.n b7d0e │ │ + b.n b7d1e │ │ ldc2 10, cr3, [r5, #1020] @ 0x3fc @ │ │ str r4, [r2, r0] │ │ - b.n b75a4 │ │ + b.n b75b4 │ │ asrs r4, r4, #32 │ │ - b.n b758e │ │ + b.n b759e │ │ adds r0, #44 @ 0x2c │ │ - b.n b7592 │ │ + b.n b75a2 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr7, [r5, #32] │ │ - b.n b75a4 │ │ + b.n b75b4 │ │ asrs r4, r7, #32 │ │ - b.n b757e │ │ + b.n b758e │ │ asrs r6, r0, #32 │ │ - b.n b7dc2 │ │ + b.n b7dd2 │ │ str r0, [r0, #4] │ │ - b.n b7586 │ │ + b.n b7596 │ │ adds r0, #68 @ 0x44 │ │ - b.n b758a │ │ + b.n b759a │ │ strb r0, [r1, #0] │ │ - b.n b759e │ │ + b.n b75ae │ │ lsrs r0, r0, #12 │ │ stcl 0, cr6, [r8, #16] │ │ - b.n b75b6 │ │ + b.n b75c6 │ │ adds r0, #16 │ │ - b.n b75ba │ │ + b.n b75ca │ │ movs r3, r0 │ │ - b.n b7d4a │ │ + b.n b7d5a │ │ stc2 10, cr3, [sl, #1020] @ 0x3fc @ │ │ str r0, [r2, r0] │ │ - b.n b75e0 │ │ + b.n b75f0 │ │ adds r0, #0 │ │ - b.n b75ca │ │ + b.n b75da │ │ strb r0, [r1, #0] │ │ - b.n b75ce │ │ + b.n b75de │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr5, [r5, #32] │ │ - b.n b75e0 │ │ + b.n b75f0 │ │ str r0, [r1, r0] │ │ - b.n b75ba │ │ + b.n b75ca │ │ str r4, [r1, r0] │ │ - b.n b7fbe │ │ + b.n b7fce │ │ lsls r0, r1, #3 │ │ stmia.w r5, {r1, r2, ip, sp} │ │ - b.n b7e06 │ │ + b.n b7e16 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr0, [r0, #48] @ 0x30 │ │ - b.n b7d72 │ │ + b.n b7d82 │ │ stmia r0!, {r2} │ │ - b.n b760c │ │ + b.n b761c │ │ stc2 10, cr3, [r0, #1020] @ 0x3fc @ │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr7, [sl, #288] @ 0x120 │ │ - b.n b75fe │ │ + b.n b760e │ │ str r0, [r1, r0] │ │ - b.n b7616 │ │ + b.n b7626 │ │ str r0, [r2, #4] │ │ - b.n b7606 │ │ + b.n b7616 │ │ strb r4, [r2, #1] │ │ - b.n b75ea │ │ + b.n b75fa │ │ movs r0, #88 @ 0x58 │ │ - b.n b75ee │ │ + b.n b75fe │ │ str r4, [r3, #4] │ │ - b.n b75f2 │ │ + b.n b7602 │ │ str r0, [r1, r0] │ │ - b.n b760e │ │ + b.n b761e │ │ lsrs r0, r0, #12 │ │ stcl 0, cr2, [ip, #112] @ 0x70 │ │ - b.n b761e │ │ + b.n b762e │ │ strb r0, [r5, #0] │ │ - b.n b7622 │ │ + b.n b7632 │ │ movs r7, r0 │ │ - b.n b7daa │ │ + b.n b7dba │ │ ldc2l 10, cr3, [r7, #-1020]! @ 0xfffffc04 @ │ │ str r0, [r4, #0] │ │ - b.n b762e │ │ + b.n b763e │ │ str r0, [r1, r0] │ │ - b.n b7642 │ │ + b.n b7652 │ │ str r4, [r5, #0] │ │ - b.n b7616 │ │ + b.n b7626 │ │ str r4, [r1, #0] │ │ - b.n b7654 │ │ + b.n b7664 │ │ strb r0, [r3, #0] │ │ - b.n b763e │ │ + b.n b764e │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr7, [r8, #144] @ 0x90 │ │ - b.n b7626 │ │ + b.n b7636 │ │ strb r2, [r0, #0] │ │ - b.n b7e6a │ │ + b.n b7e7a │ │ movs r0, #40 @ 0x28 │ │ - b.n b762e │ │ + b.n b763e │ │ str r0, [r1, r0] │ │ - b.n b763e │ │ + b.n b764e │ │ lsrs r0, r0, #12 │ │ stcl 0, cr10, [r6, #160] @ 0xa0 │ │ - b.n b8054 │ │ + b.n b8064 │ │ movs r1, r0 │ │ - b.n b7de6 │ │ + b.n b7df6 │ │ stc2l 10, cr3, [ip, #-1020]! @ 0xfffffc04 @ │ │ str r4, [r2, #0] │ │ - b.n b7680 │ │ + b.n b7690 │ │ asrs r0, r6, #32 │ │ - b.n b766a │ │ + b.n b767a │ │ movs r0, #56 @ 0x38 │ │ - b.n b766e │ │ + b.n b767e │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr6, [r6, #32] │ │ - b.n b7682 │ │ + b.n b7692 │ │ str r0, [r1, #0] │ │ - b.n b7676 │ │ + b.n b7686 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr5, [lr, #208] @ 0xd0 │ │ - b.n b7682 │ │ + b.n b7692 │ │ asrs r4, r7, #32 │ │ - b.n b7666 │ │ + b.n b7676 │ │ asrs r4, r0, #32 │ │ - b.n b7eaa │ │ + b.n b7eba │ │ eors r0, r0 │ │ - b.n b766e │ │ + b.n b767e │ │ movs r0, #68 @ 0x44 │ │ - b.n b7672 │ │ + b.n b7682 │ │ movs r5, r0 │ │ - b.n b7e1c │ │ + b.n b7e2c │ │ movs r1, r1 │ │ subs r2, #0 │ │ movs r0, #12 │ │ - b.n b769e │ │ + b.n b76ae │ │ ands r0, r6 │ │ - b.n b8082 │ │ + b.n b8092 │ │ str r4, [r2, #0] │ │ - b.n b76a6 │ │ + b.n b76b6 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr5, [lr, #32] │ │ - b.n b76ca │ │ + b.n b76da │ │ lsls r4, r1, #1 │ │ stmia.w r4, {r4, sp} │ │ - b.n b76d0 │ │ + b.n b76e0 │ │ str r0, [r1, r0] │ │ - b.n b769e │ │ + b.n b76ae │ │ str r3, [r0, r0] │ │ - b.n b7ede │ │ + b.n b7eee │ │ lsrs r0, r0, #12 │ │ stcl 0, cr2, [r2, #304] @ 0x130 │ │ - b.n b76c6 │ │ + b.n b76d6 │ │ movs r2, r0 │ │ - b.n b7e58 │ │ + b.n b7e68 │ │ movs r1, r1 │ │ cmp r2, #0 │ │ adds r0, #16 │ │ - b.n b76d2 │ │ + b.n b76e2 │ │ strb r4, [r3, #0] │ │ - b.n b76d6 │ │ + b.n b76e6 │ │ movs r7, r0 │ │ - b.n b7e60 │ │ + b.n b7e70 │ │ movs r3, r2 │ │ cmp r2, #0 │ │ adds r0, #40 @ 0x28 │ │ - b.n b76e2 │ │ + b.n b76f2 │ │ movs r5, r0 │ │ - b.n b7e6c │ │ + b.n b7e7c │ │ movs r6, r3 │ │ cmp r2, #0 │ │ movs r2, r0 │ │ - b.n b7e70 │ │ + b.n b7e80 │ │ movs r7, r4 │ │ cmp r2, #0 │ │ movs r0, r6 │ │ and.w r0, r0, r4, asr #8 │ │ - b.n b76fa │ │ + b.n b770a │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr6, [ip, #32] │ │ - b.n b771a │ │ + b.n b772a │ │ adds r0, #44 @ 0x2c │ │ - b.n b7706 │ │ + b.n b7716 │ │ movs r0, #72 @ 0x48 │ │ - b.n b76ea │ │ + b.n b76fa │ │ movs r0, #7 │ │ - b.n b7f2e │ │ + b.n b7f3e │ │ strb r4, [r1, #1] │ │ - b.n b76f2 │ │ + b.n b7702 │ │ adds r0, #80 @ 0x50 │ │ - b.n b76f6 │ │ + b.n b7706 │ │ str r0, [r1, #0] │ │ - b.n b770a │ │ + b.n b771a │ │ lsrs r0, r0, #12 │ │ stcl 0, cr3, [r8, #64] @ 0x40 │ │ - b.n b7722 │ │ + b.n b7732 │ │ strb r4, [r3, #0] │ │ - b.n b7726 │ │ + b.n b7736 │ │ movs r7, r0 │ │ - b.n b7eb0 │ │ + b.n b7ec0 │ │ @ instruction: 0xffeb3aff │ │ ands r4, r1 │ │ - b.n b774c │ │ + b.n b775c │ │ strb r4, [r1, #0] │ │ - b.n b7736 │ │ + b.n b7746 │ │ str r4, [r2, #0] │ │ - b.n b773a │ │ + b.n b774a │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr4, [r4, #32] │ │ - b.n b774a │ │ + b.n b775a │ │ adds r0, #28 │ │ - b.n b7726 │ │ + b.n b7736 │ │ adds r0, #16 │ │ - b.n b7764 │ │ + b.n b7774 │ │ strb r0, [r3, #0] │ │ - b.n b772e │ │ + b.n b773e │ │ str r0, [r4, #0] │ │ - b.n b7732 │ │ + b.n b7742 │ │ ands r0, r1 │ │ - b.n b773c │ │ + b.n b774c │ │ lsrs r0, r0, #12 │ │ stcl 0, cr3, [r3, #160] @ 0xa0 │ │ - b.n b775e │ │ + b.n b776e │ │ movs r5, r0 │ │ - b.n b7ee8 │ │ + b.n b7ef8 │ │ @ instruction: 0xffe03aff │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr7, [lr, #144] @ 0x90 │ │ - b.n b776e │ │ + b.n b777e │ │ str r0, [r1, r0] │ │ - b.n b778e │ │ + b.n b779e │ │ str r4, [r5, #0] │ │ - b.n b7776 │ │ + b.n b7786 │ │ strb r0, [r6, #0] │ │ - b.n b775a │ │ + b.n b776a │ │ adds r0, #52 @ 0x34 │ │ - b.n b775e │ │ + b.n b776e │ │ str r0, [r7, #0] │ │ - b.n b7762 │ │ + b.n b7772 │ │ str r0, [r1, r0] │ │ - b.n b7776 │ │ + b.n b7786 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr0, [r8, #8] │ │ - b.n b7f10 │ │ + b.n b7f20 │ │ movs r1, r1 │ │ subs r2, #0 │ │ movs r0, #60 @ 0x3c │ │ - b.n b7796 │ │ + b.n b77a6 │ │ adds r0, #68 @ 0x44 │ │ - b.n b779a │ │ + b.n b77aa │ │ strb r0, [r1, #0] │ │ - b.n b77b6 │ │ + b.n b77c6 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr2, [ip, #288] @ 0x120 │ │ - b.n b7786 │ │ + b.n b7796 │ │ asrs r4, r1, #1 │ │ - b.n b778a │ │ + b.n b779a │ │ adds r0, #80 @ 0x50 │ │ - b.n b778e │ │ + b.n b779e │ │ movs r4, r2 │ │ - b.n b77cc │ │ + b.n b77dc │ │ strb r0, [r1, #0] │ │ - b.n b7796 │ │ + b.n b77a6 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr0, [r0, #40] @ 0x28 │ │ - b.n b7f50 │ │ + b.n b7f60 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r1 │ │ - b.n b7718 │ │ + b.n b7728 │ │ ldrh r3, [r5, #20] │ │ - b.n b82be │ │ + b.n b82ce │ │ ldrh r2, [r5, #20] │ │ - b.n b8342 │ │ + b.n b8352 │ │ stmia r0!, {r2} │ │ - b.n b77e4 │ │ + b.n b77f4 │ │ @ instruction: 0xfb6ceaff │ │ - beq.n b7cf0 │ │ - b.n b8150 │ │ + beq.n b7d00 │ │ + b.n b8160 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, sl, fp, lr} │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n b81e0 │ │ + b.n b81f0 │ │ ands r1, r0 │ │ - b.n b800a │ │ + b.n b801a │ │ adds r0, #0 │ │ - b.n b800e │ │ + b.n b801e │ │ movs r1, r4 │ │ - b.n b8372 │ │ + b.n b8382 │ │ movs r0, r1 │ │ - bge.n b7cd6 │ │ + bge.n b7ce6 │ │ lsls r1, r4, #1 │ │ - b.n b8380 │ │ + b.n b8390 │ │ movs r7, r1 │ │ ldmia r2!, {} │ │ movs r2, r4 │ │ - b.n b8388 │ │ + b.n b8398 │ │ movs r5, r3 │ │ lsrs r0, r0, #8 │ │ lsls r2, r0, #1 │ │ - b.n b8390 │ │ + b.n b83a0 │ │ movs r5, r2 │ │ subs r0, r0, r0 │ │ lsls r0, r3 │ │ - b.n b7830 │ │ + b.n b7840 │ │ ands r4, r0 │ │ - b.n b7e14 │ │ + b.n b7e24 │ │ movs r0, r4 │ │ and.w r0, r0, r1 │ │ - b.n b83a4 │ │ + b.n b83b4 │ │ movs r5, r1 │ │ lsrs r0, r0, #8 │ │ movs r2, r0 │ │ - b.n b83ac │ │ + b.n b83bc │ │ movs r2, r3 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n b83b4 │ │ + b.n b83c4 │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ eors r0, r6 │ │ - b.n b7854 │ │ + b.n b7864 │ │ ands r4, r0 │ │ - b.n b7e38 │ │ + b.n b7e48 │ │ movs r7, r2 │ │ and.w r0, r0, r2, asr #1 │ │ - b.n b83c8 │ │ + b.n b83d8 │ │ movs r0, r2 │ │ lsrs r0, r0, #8 │ │ lsls r2, r6, #1 │ │ - b.n b83d0 │ │ + b.n b83e0 │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ eors r4, r3 │ │ - b.n b7870 │ │ + b.n b7880 │ │ ands r4, r0 │ │ - b.n b7e54 │ │ + b.n b7e64 │ │ movs r0, r2 │ │ and.w r0, r0, r4, lsl #17 │ │ - b.n b787c │ │ + b.n b788c │ │ ands r4, r0 │ │ - b.n b7e60 │ │ + b.n b7e70 │ │ movs r5, r1 │ │ and.w r0, r0, r4, lsr #9 │ │ - b.n b7888 │ │ + b.n b7898 │ │ movs r4, r0 │ │ - b.n b808e │ │ + b.n b809e │ │ asrs r0, r2, #32 │ │ - b.n b8492 │ │ + b.n b84a2 │ │ movs r0, #2 │ │ - b.n b7e74 │ │ + b.n b7e84 │ │ strh r1, [r5, #28] │ │ add.w r0, r0, r7 │ │ and.w r0, r0, r4, ror #16 │ │ - b.n b78a0 │ │ + b.n b78b0 │ │ ands r4, r0 │ │ - b.n b7e84 │ │ + b.n b7e94 │ │ movs r4, r0 │ │ and.w r0, r0, ip, asr #16 │ │ - b.n b78ac │ │ + b.n b78bc │ │ ands r4, r0 │ │ - b.n b7e90 │ │ + b.n b7ea0 │ │ movs r1, r0 │ │ and.w r0, r0, r8, lsr #16 │ │ - b.n b78b8 │ │ + b.n b78c8 │ │ ands r4, r0 │ │ - b.n b7e9c │ │ + b.n b7eac │ │ movs r4, r0 │ │ - b.n b80c2 │ │ + b.n b80d2 │ │ ldrh r0, [r2, #32] │ │ - ldmia.w sp!, {r1, r5, r8, fp, ip, lr} │ │ - @ instruction: 0xfff53b1c │ │ - vcvt.u16.f16 d17, d27, #11 │ │ - vcge.f16 d19, d20, #0 │ │ - vneg.s16 q12, │ │ - vcvt.f32.u32 q11, q3, #11 │ │ - @ instruction: 0xfff558f9 │ │ - vshr.u64 , q8, #11 │ │ + ldmia.w sp!, {r0, r1, r2, r3, r5, r6, r7, r8, fp, ip, lr} │ │ + @ instruction: 0xfff53afc │ │ + @ instruction: 0xfff51e0e │ │ + vneg.s16 , │ │ + vrsra.u64 q12, , #11 │ │ + @ instruction: 0xfff56fd8 │ │ + vtbx.8 d21, {d21-d22}, d6 │ │ + vceq.i16 , , #0 │ │ @ instruction: 0xfff54ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n b82c8 │ │ - beq.n b7dc8 │ │ - b.n b824c │ │ + b.n b82d8 │ │ + beq.n b7dd8 │ │ + b.n b825c │ │ str r0, [sp, #12] │ │ - b.n b80f6 │ │ - add r0, pc, #8 @ (adr r0, b7dc0 ) │ │ - b.n b80fa │ │ + b.n b8106 │ │ + add r0, pc, #8 @ (adr r0, b7dd0 ) │ │ + b.n b810a │ │ strb r1, [r0, #0] │ │ - b.n b80fe │ │ + b.n b810e │ │ strh r0, [r0, #0] │ │ - b.n b8102 │ │ + b.n b8112 │ │ strh r6, [r4, #22] │ │ add.w r8, r0, r1 │ │ - b.n b846a │ │ + b.n b847a │ │ lsls r5, r2, #1 │ │ add r2, sp, #0 │ │ str r4, [r4, #24] │ │ - b.n b7910 │ │ + b.n b7920 │ │ str r6, [r0, #0] │ │ - b.n b7ef4 │ │ + b.n b7f04 │ │ eors r4, r4 │ │ - b.n b82e6 │ │ + b.n b82f6 │ │ movs r4, r0 │ │ - b.n b811e │ │ + b.n b812e │ │ strh r3, [r7, #24] │ │ add.w r0, r0, r0 │ │ - b.n b8486 │ │ + b.n b8496 │ │ lsls r1, r3, #1 │ │ subs r0, r0, r0 │ │ str r0, [r4, r1] │ │ - b.n b791a │ │ + b.n b792a │ │ adds r0, #8 │ │ - b.n b7928 │ │ + b.n b7938 │ │ movs r0, r0 │ │ - b.n b84a0 │ │ + b.n b84b0 │ │ movs r6, r1 │ │ lsrs r0, r0, #8 │ │ lsls r4, r5, #1 │ │ - b.n b792a │ │ + b.n b793a │ │ movs r0, r0 │ │ - b.n b84a2 │ │ + b.n b84b2 │ │ movs r4, r3 │ │ lsrs r0, r0, #8 │ │ asrs r0, r5, #1 │ │ - b.n b7936 │ │ + b.n b7946 │ │ movs r0, #9 │ │ - b.n b814e │ │ + b.n b815e │ │ strh r3, [r0, #26] │ │ add.w r0, r0, r1 │ │ - b.n b84b6 │ │ + b.n b84c6 │ │ movs r5, r3 │ │ rev r0, r0 │ │ str r0, [r4, r1] │ │ - b.n b794a │ │ + b.n b795a │ │ asrs r7, r0, #32 │ │ - b.n b8162 │ │ + b.n b8172 │ │ adds r0, #108 @ 0x6c │ │ - b.n b7952 │ │ + b.n b7962 │ │ movs r0, #10 │ │ - b.n b816a │ │ + b.n b817a │ │ movs r0, r0 │ │ - b.n b7948 │ │ + b.n b7958 │ │ movs r0, r1 │ │ - b.n b8172 │ │ + b.n b8182 │ │ movs r5, r2 │ │ and.w r0, r0, r0 │ │ - b.n b84e8 │ │ + b.n b84f8 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n b84f6 │ │ + b.n b8506 │ │ movs r5, r3 │ │ add r2, sp, #0 │ │ movs r0, r0 │ │ - b.n b84f8 │ │ + b.n b8508 │ │ movs r5, r4 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n b8506 │ │ + b.n b8516 │ │ movs r1, r5 │ │ add r2, sp, #0 │ │ str r0, [r7, r4] │ │ - b.n b7998 │ │ + b.n b79a8 │ │ asrs r1, r1, #32 │ │ - b.n b819e │ │ + b.n b81ae │ │ movs r0, #3 │ │ - b.n b81a2 │ │ + b.n b81b2 │ │ str r5, [r0, r0] │ │ - b.n b7da4 │ │ + b.n b7db4 │ │ movs r0, r0 │ │ - b.n b7994 │ │ + b.n b79a4 │ │ strh r0, [r1, #30] │ │ add.w r0, r0, r0 │ │ - b.n b799c │ │ + b.n b79ac │ │ strh r2, [r1, #30] │ │ add.w r0, r0, r5 │ │ and.w r0, r0, r0, lsl #12 │ │ - b.n b7998 │ │ + b.n b79a8 │ │ movs r0, r1 │ │ - b.n b81c2 │ │ + b.n b81d2 │ │ asrs r7, r0, #32 │ │ - b.n b81c6 │ │ + b.n b81d6 │ │ movs r0, #10 │ │ - b.n b81ca │ │ + b.n b81da │ │ adds r0, #9 │ │ - b.n b81ce │ │ + b.n b81de │ │ vrhadd.u d14, d5, d31 │ │ movs r4, r0 │ │ - b.n b81d6 │ │ + b.n b81e6 │ │ strh r1, [r2, #24] │ │ add.w r0, r0, r0 │ │ - b.n b853e │ │ - beq.n b7ed8 │ │ + b.n b854e │ │ + beq.n b7ee8 │ │ lsls r3, r1, #9 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ lsrs r5, r7, #2 │ │ lsls r4, r5, #3 │ │ - b.n b79e8 │ │ + b.n b79f8 │ │ movs r0, #52 @ 0x34 │ │ - b.n b85ee │ │ + b.n b85fe │ │ asrs r0, r5, #3 │ │ - b.n b79f0 │ │ + b.n b7a00 │ │ movs r0, r0 │ │ - b.n b7fd4 │ │ + b.n b7fe4 │ │ asrs r1, r0, #32 │ │ - b.n b7fd8 │ │ - ldrh r6, [r1, #30] │ │ + b.n b7fe8 │ │ + ldrh r5, [r1, #30] │ │ @ instruction: 0xebff10b8 │ │ - b.n b7a00 │ │ + b.n b7a10 │ │ str r3, [r0, r0] │ │ - b.n b8206 │ │ + b.n b8216 │ │ lsls r4, r6, #2 │ │ - b.n b7a08 │ │ + b.n b7a18 │ │ movs r0, #7 │ │ - b.n b820e │ │ + b.n b821e │ │ asrs r1, r0, #32 │ │ - b.n b7ff0 │ │ + b.n b8000 │ │ adds r0, #10 │ │ - b.n b8216 │ │ + b.n b8226 │ │ movs r0, r0 │ │ - b.n b7e18 │ │ + b.n b7e28 │ │ movs r0, r0 │ │ - b.n b79fe │ │ + b.n b7a0e │ │ strh r3, [r6, #28] │ │ add.w r0, r0, sp │ │ and.w r0, r0, r8, lsr #6 │ │ - b.n b7a28 │ │ + b.n b7a38 │ │ movs r0, #7 │ │ - b.n b822e │ │ + b.n b823e │ │ lsls r4, r2, #2 │ │ - b.n b7a30 │ │ + b.n b7a40 │ │ asrs r1, r0, #32 │ │ - b.n b8014 │ │ + b.n b8024 │ │ movs r0, r0 │ │ - b.n b7e38 │ │ + b.n b7e48 │ │ movs r4, r0 │ │ and.w r0, r0, r8, lsl #6 │ │ - b.n b7a40 │ │ + b.n b7a50 │ │ movs r0, #10 │ │ - b.n b8246 │ │ + b.n b8256 │ │ lsls r4, r0, #2 │ │ - b.n b7a48 │ │ + b.n b7a58 │ │ asrs r1, r0, #32 │ │ - b.n b802c │ │ + b.n b803c │ │ movs r0, r0 │ │ - b.n b7e50 │ │ + b.n b7e60 │ │ movs r0, r0 │ │ - b.n b7a36 │ │ + b.n b7a46 │ │ str r3, [r0, r0] │ │ - b.n b825a │ │ + b.n b826a │ │ strh r4, [r4, #28] │ │ add.w r0, r0, r5, lsl #12 │ │ - b.n b8262 │ │ + b.n b8272 │ │ @ instruction: 0xffcbeaff │ │ asrs r4, r7, #32 │ │ - b.n b7a68 │ │ + b.n b7a78 │ │ movs r0, #38 @ 0x26 │ │ - b.n b866e │ │ + b.n b867e │ │ adds r0, #56 @ 0x38 │ │ - b.n b7a70 │ │ + b.n b7a80 │ │ asrs r1, r0, #32 │ │ - b.n b8054 │ │ + b.n b8064 │ │ movs r0, #0 │ │ - b.n b7a54 │ │ + b.n b7a64 │ │ adds r0, #3 │ │ - b.n b805c │ │ + b.n b806c │ │ movs r4, r0 │ │ - b.n b7a5c │ │ + b.n b7a6c │ │ movs r0, r1 │ │ - b.n b7a60 │ │ + b.n b7a70 │ │ movs r0, r0 │ │ - b.n b868a │ │ + b.n b869a │ │ movs r2, #241 @ 0xf1 │ │ - b.n b854e │ │ - ldrh r5, [r6, #36] @ 0x24 │ │ + b.n b855e │ │ + ldrh r4, [r6, #36] @ 0x24 │ │ @ instruction: 0xebff0018 │ │ - b.n b7a94 │ │ + b.n b7aa4 │ │ movs r0, #10 │ │ - b.n b869a │ │ + b.n b86aa │ │ asrs r4, r2, #32 │ │ - b.n b7a9c │ │ + b.n b7aac │ │ movs r0, r0 │ │ - b.n b8080 │ │ + b.n b8090 │ │ asrs r1, r0, #32 │ │ - b.n b8084 │ │ - ldrh r3, [r4, #28] │ │ - @ instruction: 0xebff65df │ │ - vtbl.8 d18, {d21-d22}, d23 │ │ - vsri.32 d17, d8, #11 │ │ - @ instruction: 0xfff51ad3 │ │ - @ instruction: 0xfff56a78 │ │ + b.n b8094 │ │ + ldrh r2, [r4, #28] │ │ + @ instruction: 0xebff67a9 │ │ + vtbl.8 d18, {d5-d6}, d15 │ │ + vcgt.f16 , , #0 │ │ + vtbl.8 d17, {d21-d24}, d22 │ │ + vtbl.8 d22, {d21-d23}, d8 │ │ movs r2, r0 │ │ - ldr r1, [pc, #972] @ (b834c ) │ │ + ldr r2, [pc, #32] @ (b7fb0 ) │ │ vneg.f16 d20, d20 │ │ movs r2, r0 │ │ - strb r5, [r7, #2] │ │ + strb r4, [r7, #8] │ │ vneg.f16 d20, d4 │ │ movs r2, r0 │ │ - ldrsb r4, [r5, r5] │ │ + ldr r1, [r7, r0] │ │ vabs.f16 q10, q14 │ │ movs r2, r0 │ │ - ldr r0, [pc, #96] @ (b7ff8 ) │ │ + ldr r0, [pc, #96] @ (b8008 ) │ │ movs r2, r0 │ │ - strb r0, [r5, #31] │ │ - @ instruction: 0xfff51b7f │ │ + ldrb r6, [r5, #1] │ │ + vcvt.f16.u16 , q1, #11 │ │ @ instruction: 0xfff54ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n b84c4 │ │ + b.n b84d4 │ │ svc 157 @ 0x9d │ │ - b.n b8448 │ │ + b.n b8458 │ │ movs r0, #16 │ │ - b.n b7ad4 │ │ - add r0, pc, #4 @ (adr r0, b7fb8 ) │ │ - b.n b82f6 │ │ + b.n b7ae4 │ │ + add r0, pc, #4 @ (adr r0, b7fc8 ) │ │ + b.n b8306 │ │ str r0, [sp, #0] │ │ - b.n b86fa │ │ + b.n b870a │ │ movs r4, r5 │ │ - b.n b7ad8 │ │ + b.n b7ae8 │ │ movs r2, r0 │ │ - b.n b8666 │ │ + b.n b8676 │ │ lsls r6, r4, #16 │ │ - bge.n b7fc6 │ │ + bge.n b7fd6 │ │ str r0, [r0, #0] │ │ - b.n b830a │ │ + b.n b831a │ │ movs r4, r1 │ │ - b.n b7aee │ │ + b.n b7afe │ │ strh r0, [r0, #2] │ │ - b.n b7af2 │ │ + b.n b7b02 │ │ asrs r0, r2, #32 │ │ - b.n b7b06 │ │ + b.n b7b16 │ │ adds r0, #1 │ │ - b.n b808e │ │ + b.n b809e │ │ movs r1, r1 │ │ - ldr r2, [pc, #0] @ (b7fdc ) │ │ + ldr r2, [pc, #0] @ (b7fec ) │ │ asrs r4, r3, #1 │ │ - b.n b7b92 │ │ + b.n b7ba2 │ │ movs r0, #40 @ 0x28 │ │ - b.n b7b06 │ │ + b.n b7b16 │ │ strb r2, [r7, #2] │ │ - b.n b839e │ │ + b.n b83ae │ │ asrs r2, r2, #4 │ │ - b.n b832e │ │ + b.n b833e │ │ movs r0, #21 │ │ - b.n b8732 │ │ + b.n b8742 │ │ lsls r0, r0, #1 │ │ - b.n b8624 │ │ + b.n b8634 │ │ movs r0, #8 │ │ lsls r0, r3, #22 │ │ asrs r2, r0, #32 │ │ - b.n b8080 │ │ + b.n b8090 │ │ movs r1, r0 │ │ - b.n b82a8 │ │ + b.n b82b8 │ │ movs r0, r3 │ │ - bge.n b8006 │ │ + bge.n b8016 │ │ asrs r6, r0, #32 │ │ - b.n b7bba │ │ + b.n b7bca │ │ movs r0, r1 │ │ - b.n b8630 │ │ + b.n b8640 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ mvns r0, r2 │ │ - b.n b8396 │ │ + b.n b83a6 │ │ lsrs r0, r3, #30 │ │ - b.n b8634 │ │ + b.n b8644 │ │ asrs r0, r0, #32 │ │ - b.n b7b52 │ │ + b.n b7b62 │ │ strb r0, [r0, #0] │ │ - b.n b8762 │ │ + b.n b8772 │ │ movs r0, #4 │ │ - b.n b7b5a │ │ + b.n b7b6a │ │ asrs r1, r0, #32 │ │ - b.n b80d2 │ │ + b.n b80e2 │ │ asrs r2, r0, #32 │ │ - b.n b81d8 │ │ + b.n b81e8 │ │ movs r3, r2 │ │ subs r2, #0 │ │ asrs r2, r7, #2 │ │ - b.n b83ea │ │ + b.n b83fa │ │ lsls r0, r0, #1 │ │ - b.n b865c │ │ + b.n b866c │ │ movs r0, r2 │ │ subs r0, r0, r0 │ │ subs r0, r4, #7 │ │ - b.n b7b80 │ │ + b.n b7b90 │ │ movs r2, r1 │ │ - b.n b8386 │ │ + b.n b8396 │ │ movs r0, #10 │ │ - b.n b838a │ │ + b.n b839a │ │ asrs r1, r0, #32 │ │ - b.n b816c │ │ + b.n b817c │ │ ldr.w lr, [r0, #3071] @ 0xbff │ │ str r7, [sp, #720] @ 0x2d0 │ │ - b.n b8666 │ │ + b.n b8676 │ │ str r4, [r5, #0] │ │ - b.n b7b94 │ │ + b.n b7ba4 │ │ lsrs r0, r3, #30 │ │ - b.n b8678 │ │ + b.n b8688 │ │ strb r0, [r0, #0] │ │ - b.n b87a2 │ │ + b.n b87b2 │ │ ldr r7, [sp, #1020] @ 0x3fc │ │ - b.n b8704 │ │ + b.n b8714 │ │ movs r5, r0 │ │ and.w r0, r0, r8 │ │ - b.n b7b9e │ │ + b.n b7bae │ │ lsls r6, r0, #4 │ │ - b.n b84f2 │ │ + b.n b8502 │ │ movs r3, r0 │ │ - b.n b8096 │ │ + b.n b80a6 │ │ movs r1, r0 │ │ asrs r0, r0, #12 │ │ strb r0, [r0, #12] │ │ - b.n b83be │ │ + b.n b83ce │ │ lsrs r0, r3, #31 │ │ - b.n b869c │ │ + b.n b86ac │ │ asrs r2, r7, #2 │ │ - b.n b843a │ │ + b.n b844a │ │ movs r0, #1 │ │ - b.n b808a │ │ + b.n b809a │ │ movs r7, r0 │ │ - b.n b8332 │ │ + b.n b8342 │ │ lsls r3, r7, #15 │ │ subs r0, r0, r0 │ │ movs r0, #113 @ 0x71 │ │ - b.n b7e74 │ │ + b.n b7e84 │ │ movs r1, r4 │ │ - b.n b873e │ │ + b.n b874e │ │ movs r0, r3 │ │ ldmia r2!, {} │ │ movs r1, r0 │ │ - b.n b8746 │ │ + b.n b8756 │ │ movs r7, r5 │ │ lsrs r0, r0, #8 │ │ movs r2, r0 │ │ - b.n b874e │ │ + b.n b875e │ │ movs r6, r6 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n b8756 │ │ + b.n b8766 │ │ lsls r4, r2, #15 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n b7c66 │ │ + b.n b7c76 │ │ asrs r6, r0, #32 │ │ - b.n b83fe │ │ + b.n b840e │ │ movs r1, r0 │ │ - b.n b86e2 │ │ + b.n b86f2 │ │ lsls r2, r4, #17 │ │ subs r0, r0, r0 │ │ str r4, [r1, #0] │ │ - b.n b7bfe │ │ + b.n b7c0e │ │ lsls r7, r0, #4 │ │ - b.n b85da │ │ + b.n b85ea │ │ lsls r7, r0, #4 │ │ - b.n b8772 │ │ + b.n b8782 │ │ lsls r5, r5, #17 │ │ ldr r2, [sp, #0] │ │ movs r4, r1 │ │ - b.n b7bfc │ │ + b.n b7c0c │ │ asrs r0, r2, #32 │ │ - b.n b7c12 │ │ + b.n b7c22 │ │ adds r0, #40 @ 0x28 │ │ - b.n b7c02 │ │ + b.n b7c12 │ │ movs r0, #6 │ │ - b.n b81e8 │ │ + b.n b81f8 │ │ movs r3, r0 │ │ - b.n b838e │ │ + b.n b839e │ │ lsls r5, r6, #1 │ │ ldr r2, [sp, #0] │ │ subs r4, r6, #6 │ │ - b.n b7c30 │ │ + b.n b7c40 │ │ movs r2, r1 │ │ - b.n b8436 │ │ + b.n b8446 │ │ asrs r1, r0, #32 │ │ - b.n b8218 │ │ + b.n b8228 │ │ strh.w lr, [r5, #3071] @ 0xbff │ │ lsls r5, r0, #15 │ │ and.w r0, r0, r2, asr #32 │ │ - b.n b87aa │ │ + b.n b87ba │ │ movs r0, r3 │ │ lsrs r0, r0, #8 │ │ lsls r2, r0, #1 │ │ - b.n b87b2 │ │ + b.n b87c2 │ │ movs r7, r3 │ │ lsrs r0, r0, #8 │ │ lsls r2, r4, #1 │ │ - b.n b87ba │ │ + b.n b87ca │ │ lsls r3, r7, #14 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n b7c4a │ │ + b.n b7c5a │ │ movs r0, #6 │ │ - b.n b8462 │ │ + b.n b8472 │ │ asrs r2, r6, #2 │ │ - b.n b84c6 │ │ + b.n b84d6 │ │ movs r1, r0 │ │ - b.n b87cc │ │ + b.n b87dc │ │ movs r0, r2 │ │ lsrs r0, r0, #8 │ │ subs r0, r7, #5 │ │ - b.n b7c70 │ │ + b.n b7c80 │ │ cmp r7, #120 @ 0x78 │ │ - b.n b7c74 │ │ + b.n b7c84 │ │ lsls r0, r6, #2 │ │ - b.n b84da │ │ + b.n b84ea │ │ asrs r1, r0, #32 │ │ - b.n b825c │ │ + b.n b826c │ │ subs r7, #112 @ 0x70 │ │ - b.n b7c80 │ │ + b.n b7c90 │ │ movs r0, #2 │ │ - b.n b8264 │ │ + b.n b8274 │ │ movs r0, r0 │ │ - b.n b7c64 │ │ + b.n b7c74 │ │ movs r2, r1 │ │ - b.n b848e │ │ + b.n b849e │ │ adds r0, #3 │ │ - b.n b8270 │ │ - strb.w lr, [pc, #3071] @ b8d53 │ │ + b.n b8280 │ │ + strb.w lr, [pc, #3071] @ b8d63 │ │ movs r0, #44 @ 0x2c │ │ - b.n b7c94 │ │ + b.n b7ca4 │ │ str r7, [sp, #720] @ 0x2d0 │ │ - b.n b876e │ │ + b.n b877e │ │ ldr r7, [sp, #1020] @ 0x3fc │ │ - b.n b8800 │ │ + b.n b8810 │ │ movs r2, r0 │ │ and.w r0, r0, r6, lsl #8 │ │ - b.n b84aa │ │ + b.n b84ba │ │ movs r0, r2 │ │ and.w r0, r0, r6, lsl #8 │ │ - b.n b84b2 │ │ + b.n b84c2 │ │ movs r6, r0 │ │ - b.n b7d1a │ │ + b.n b7d2a │ │ movs r0, r4 │ │ - b.n b879a │ │ + b.n b87aa │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ subs r4, r6, #7 │ │ - b.n b7cc0 │ │ + b.n b7cd0 │ │ asrs r1, r0, #32 │ │ - b.n b82a4 │ │ + b.n b82b4 │ │ lsls r2, r3, #16 │ │ and.w r0, r0, r6, lsl #8 │ │ - b.n b84ce │ │ + b.n b84de │ │ movs r4, r0 │ │ and.w r0, r0, r0, lsr #32 │ │ - b.n b7cc2 │ │ + b.n b7cd2 │ │ movs r0, #6 │ │ - b.n b84da │ │ + b.n b84ea │ │ asrs r2, r6, #2 │ │ - b.n b853e │ │ + b.n b854e │ │ movs r1, r0 │ │ - b.n b8844 │ │ + b.n b8854 │ │ lsls r4, r3, #16 │ │ subs r0, r0, r0 │ │ movs r6, r0 │ │ - b.n b7d4e │ │ + b.n b7d5e │ │ movs r0, r4 │ │ - b.n b87ce │ │ + b.n b87de │ │ lsls r6, r1, #16 │ │ subs r0, r0, r0 │ │ str r4, [r7, #8] │ │ - b.n b856a │ │ + b.n b857a │ │ adds r0, #190 @ 0xbe │ │ - b.n b856e │ │ + b.n b857e │ │ movs r6, r0 │ │ - b.n b8464 │ │ + b.n b8474 │ │ lsls r1, r3, #14 │ │ subs r2, #0 │ │ movs r1, r0 │ │ - b.n b85f2 │ │ + b.n b8602 │ │ lsls r7, r2, #14 │ │ subs r0, r0, r0 │ │ ands r0, r1 │ │ - b.n b7cfe │ │ + b.n b7d0e │ │ movs r4, r2 │ │ - b.n b86d8 │ │ + b.n b86e8 │ │ movs r4, r0 │ │ - b.n b8476 │ │ + b.n b8486 │ │ lsls r4, r2, #14 │ │ ldrh r0, [r0, #16] │ │ lsls r2, r7, #2 │ │ - b.n b8592 │ │ + b.n b85a2 │ │ asrs r6, r4, #2 │ │ - b.n b8522 │ │ + b.n b8532 │ │ asrs r0, r0, #1 │ │ - b.n b7d00 │ │ + b.n b7d10 │ │ adds r0, #1 │ │ - b.n b85ea │ │ + b.n b85fa │ │ lsls r6, r4, #2 │ │ - b.n b8494 │ │ + b.n b84a4 │ │ lsls r1, r6, #14 │ │ cmp r2, #0 │ │ - b.n b8364 │ │ - b.n b85aa │ │ + b.n b8374 │ │ + b.n b85ba │ │ movs r0, r4 │ │ - b.n b881a │ │ + b.n b882a │ │ str r0, [r1, r0] │ │ - b.n b7d2e │ │ - b.n b8250 │ │ - b.n b7d1c │ │ + b.n b7d3e │ │ + b.n b8260 │ │ + b.n b7d2c │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ adds r0, #2 │ │ - b.n b854a │ │ + b.n b855a │ │ movs r0, #190 @ 0xbe │ │ - b.n b85c2 │ │ + b.n b85d2 │ │ movs r1, r0 │ │ - b.n b8836 │ │ + b.n b8846 │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n b7d54 │ │ + b.n b7d64 │ │ lsls r0, r0, #6 │ │ - b.n b831e │ │ + b.n b832e │ │ movs r2, r0 │ │ - b.n b8322 │ │ + b.n b8332 │ │ movs r3, r2 │ │ - b.n b8726 │ │ + b.n b8736 │ │ movs r5, r0 │ │ - b.n b84ca │ │ + b.n b84da │ │ movs r5, r2 │ │ ldr r2, [sp, #0] │ │ subs r0, r4, #7 │ │ - b.n b7d70 │ │ + b.n b7d80 │ │ movs r4, r2 │ │ - b.n b86c0 │ │ + b.n b86d0 │ │ movs r0, r0 │ │ - b.n b7d54 │ │ + b.n b7d64 │ │ asrs r1, r0, #32 │ │ - b.n b835c │ │ + b.n b836c │ │ lsls r2, r4, #15 │ │ and.w r0, r0, r0, lsr #32 │ │ - b.n b7d6a │ │ + b.n b7d7a │ │ asrs r2, r0, #32 │ │ - b.n b858a │ │ + b.n b859a │ │ adds r0, #1 │ │ - b.n b858e │ │ + b.n b859e │ │ asrs r4, r0, #32 │ │ - b.n b7df4 │ │ + b.n b7e04 │ │ movs r0, #176 @ 0xb0 │ │ - b.n b85f6 │ │ + b.n b8606 │ │ movs r1, r0 │ │ - b.n b887c │ │ + b.n b888c │ │ asrs r0, r2, #32 │ │ asrs r2, r2, #8 │ │ lsls r3, r1, #15 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n b7d86 │ │ + b.n b7d96 │ │ movs r6, r1 │ │ - b.n b850a │ │ + b.n b851a │ │ lsls r6, r1, #15 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n b7dac │ │ + b.n b7dbc │ │ movs r0, #190 @ 0xbe │ │ - b.n b862a │ │ + b.n b863a │ │ movs r0, r0 │ │ - b.n b8296 │ │ + b.n b82a6 │ │ movs r2, r0 │ │ - b.n b82be │ │ + b.n b82ce │ │ movs r1, r0 │ │ - b.n b88a2 │ │ + b.n b88b2 │ │ lsls r6, r1, #15 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n b7e30 │ │ + b.n b7e40 │ │ asrs r0, r0, #32 │ │ - b.n b89ce │ │ + b.n b89de │ │ movs r0, #3 │ │ - b.n b85d2 │ │ + b.n b85e2 │ │ asrs r4, r4, #1 │ │ - b.n b7db0 │ │ + b.n b7dc0 │ │ movs r1, r0 │ │ - b.n b88ba │ │ + b.n b88ca │ │ asrs r0, r4, #1 │ │ - b.n b7db8 │ │ + b.n b7dc8 │ │ lsls r6, r6, #14 │ │ subs r0, r0, r0 │ │ movs r4, r2 │ │ - b.n b7dca │ │ + b.n b7dda │ │ asrs r4, r1, #32 │ │ - b.n b7dca │ │ + b.n b7dda │ │ asrs r4, r3, #32 │ │ - b.n b7dc8 │ │ + b.n b7dd8 │ │ stmia r0!, {r4} │ │ - b.n b7dd2 │ │ + b.n b7de2 │ │ asrs r4, r2, #32 │ │ - b.n b7dd6 │ │ + b.n b7de6 │ │ movs r2, r0 │ │ - b.n b8966 │ │ + b.n b8976 │ │ str r0, [sp, #96] @ 0x60 │ │ - b.n b7dd8 │ │ + b.n b7de8 │ │ movs r3, r0 │ │ cmp r2, #0 │ │ str r0, [sp, #96] @ 0x60 │ │ - b.n b7e00 │ │ + b.n b7e10 │ │ movs r1, r1 │ │ - b.n b860a │ │ - beq.n b8304 │ │ - b.n b8764 │ │ + b.n b861a │ │ + beq.n b8314 │ │ + b.n b8774 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r6, ip} │ │ - b.n b7df0 │ │ + b.n b7e00 │ │ asrs r6, r3, #32 │ │ - b.n b8764 │ │ + b.n b8774 │ │ movs r1, r0 │ │ - b.n b8a9e │ │ + b.n b8aae │ │ strh r4, [r2, #0] │ │ - b.n b7dfc │ │ + b.n b7e0c │ │ lsls r1, r4, #2 │ │ - b.n b82e6 │ │ + b.n b82f6 │ │ strh r0, [r0, #2] │ │ - b.n b7e24 │ │ + b.n b7e34 │ │ movs r2, r1 │ │ - b.n b876e │ │ + b.n b877e │ │ strb r2, [r1, #0] │ │ - b.n b83fa │ │ + b.n b840a │ │ movs r4, r4 │ │ - b.n b7e10 │ │ + b.n b7e20 │ │ movs r4, r2 │ │ - b.n b880e │ │ + b.n b881e │ │ movs r4, r7 │ │ - b.n b7e18 │ │ + b.n b7e28 │ │ lsls r2, r6, #1 │ │ - b.n b881c │ │ + b.n b882c │ │ str r0, [sp, #0] │ │ - b.n b8a46 │ │ + b.n b8a56 │ │ lsls r7, r7, #3 │ │ - b.n b880a │ │ + b.n b881a │ │ movs r4, r1 │ │ - b.n b7e28 │ │ + b.n b7e38 │ │ strb r0, [r7, #0] │ │ - b.n b7e2c │ │ + b.n b7e3c │ │ lsls r2, r7, #2 │ │ - b.n b86ca │ │ + b.n b86da │ │ movs r0, r4 │ │ - b.n b893a │ │ + b.n b894a │ │ lsls r4, r4, #1 │ │ subs r0, r0, r0 │ │ asrs r4, r7, #32 │ │ - b.n b7e5c │ │ + b.n b7e6c │ │ lsls r1, r1, #2 │ │ - b.n b8428 │ │ + b.n b8438 │ │ lsls r0, r6, #2 │ │ - b.n b86ca │ │ + b.n b86da │ │ ands r0, r0 │ │ - b.n b8430 │ │ + b.n b8440 │ │ str r0, [r1, r0] │ │ - b.n b883a │ │ + b.n b884a │ │ movs r7, r0 │ │ - b.n b85e0 │ │ + b.n b85f0 │ │ lsls r7, r3, #8 │ │ ldrh r0, [r0, #16] │ │ str r6, [r6, #8] │ │ - b.n b86e6 │ │ + b.n b86f6 │ │ movs r4, r4 │ │ - b.n b7e7c │ │ + b.n b7e8c │ │ movs r6, r0 │ │ - b.n b85e6 │ │ + b.n b85f6 │ │ lsls r7, r4, #8 │ │ subs r2, #0 │ │ movs r6, r0 │ │ - b.n b8458 │ │ + b.n b8468 │ │ movs r7, r0 │ │ - b.n b85f2 │ │ + b.n b8602 │ │ lsls r3, r6, #8 │ │ ldrh r0, [r0, #16] │ │ lsls r2, r7, #2 │ │ - b.n b870e │ │ + b.n b871e │ │ movs r2, r0 │ │ - b.n b875e │ │ + b.n b876e │ │ movs r0, r0 │ │ - b.n b8694 │ │ + b.n b86a4 │ │ movs r4, r3 │ │ lsrs r0, r0, #8 │ │ movs r4, r2 │ │ - b.n b7e8e │ │ + b.n b7e9e │ │ lsls r4, r2, #3 │ │ - b.n b86ee │ │ + b.n b86fe │ │ movs r6, r0 │ │ - b.n b8612 │ │ + b.n b8622 │ │ lsls r0, r0, #9 │ │ ldrh r0, [r0, #16] │ │ movs r6, r0 │ │ - b.n b861c │ │ + b.n b862c │ │ lsls r6, r7, #8 │ │ subs r2, #0 │ │ movs r6, r0 │ │ - b.n b7f26 │ │ + b.n b7f36 │ │ movs r0, r2 │ │ - b.n b89a6 │ │ + b.n b89b6 │ │ movs r3, r2 │ │ subs r0, r0, r0 │ │ lsls r0, r4, #1 │ │ - b.n b7ec8 │ │ + b.n b7ed8 │ │ str r4, [r5, #4] │ │ - b.n b7eac │ │ + b.n b7ebc │ │ movs r0, r0 │ │ - b.n b8a36 │ │ + b.n b8a46 │ │ str r0, [r5, r1] │ │ - b.n b7eb4 │ │ + b.n b7ec4 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ movs r4, r2 │ │ - b.n b7ec6 │ │ + b.n b7ed6 │ │ asrs r0, r5, #1 │ │ - b.n b88c0 │ │ + b.n b88d0 │ │ stmia r0!, {r2, r3, r6} │ │ - b.n b7ec4 │ │ + b.n b7ed4 │ │ movs r0, #0 │ │ - b.n b7ece │ │ + b.n b7ede │ │ lsls r0, r4, #1 │ │ - b.n b88cc │ │ + b.n b88dc │ │ vrhadd.u d14, d2, d31 │ │ stmia r0!, {r2, r3, r6} │ │ - b.n b7ef4 │ │ + b.n b7f04 │ │ movs r0, r0 │ │ - b.n b8a5e │ │ - b.n b8410 │ │ - b.n b7efc │ │ + b.n b8a6e │ │ + b.n b8420 │ │ + b.n b7f0c │ │ movs r0, #44 @ 0x2c │ │ - b.n b7f00 │ │ + b.n b7f10 │ │ lsls r5, r5, #10 │ │ ldrh r0, [r0, r0] │ │ lsls r0, r5, #1 │ │ - b.n b7f08 │ │ + b.n b7f18 │ │ asrs r4, r5, #1 │ │ - b.n b7f0c │ │ + b.n b7f1c │ │ asrs r4, r4, #1 │ │ - b.n b7ef0 │ │ + b.n b7f00 │ │ lsls r0, r4, #1 │ │ - b.n b7ef4 │ │ + b.n b7f04 │ │ lsls r2, r7, #2 │ │ - b.n b8792 │ │ + b.n b87a2 │ │ movs r1, r0 │ │ - b.n b8a02 │ │ + b.n b8a12 │ │ lsls r4, r2, #1 │ │ subs r0, r0, r0 │ │ adds r0, #4 │ │ - b.n b7f92 │ │ + b.n b7fa2 │ │ str r0, [r1, #0] │ │ - b.n b872e │ │ + b.n b873e │ │ strh r7, [r0, #0] │ │ - b.n b8732 │ │ + b.n b8742 │ │ movs r6, r0 │ │ - b.n b8a9c │ │ + b.n b8aac │ │ lsls r5, r2, #7 │ │ ldrh r0, [r0, #16] │ │ movs r1, r0 │ │ - b.n b8b3e │ │ + b.n b8b4e │ │ asrs r7, r2, #1 │ │ - b.n b8b42 │ │ + b.n b8b52 │ │ lsls r0, r2, #12 │ │ - b.n b8628 │ │ + b.n b8638 │ │ lsls r1, r2, #7 │ │ lsrs r0, r0, #8 │ │ lsls r6, r6, #2 │ │ - b.n b87b6 │ │ + b.n b87c6 │ │ strb r2, [r1, #0] │ │ - b.n b8752 │ │ + b.n b8762 │ │ asrs r0, r0, #32 │ │ - b.n b7f3e │ │ - add r0, pc, #56 @ (adr r0, b8450 ) │ │ - b.n b875a │ │ - b.n b841c │ │ - b.n b8528 │ │ + b.n b7f4e │ │ + add r0, pc, #56 @ (adr r0, b8460 ) │ │ + b.n b876a │ │ + b.n b842c │ │ + b.n b8538 │ │ movs r1, r0 │ │ - b.n b8a48 │ │ + b.n b8a58 │ │ lsls r1, r3, #1 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n b8546 │ │ + b.n b8556 │ │ str r1, [r0, r0] │ │ - b.n b876e │ │ + b.n b877e │ │ movs r0, r1 │ │ - b.n b86d2 │ │ - b.n b8474 │ │ - b.n b7f50 │ │ + b.n b86e2 │ │ + b.n b8484 │ │ + b.n b7f60 │ │ lsls r0, r1, #1 │ │ - b.n b7f54 │ │ + b.n b7f64 │ │ lsls r6, r2, #9 │ │ ldrh r0, [r0, #16] │ │ movs r6, r0 │ │ - b.n b8ae8 │ │ + b.n b8af8 │ │ lsls r5, r7, #6 │ │ ldrh r0, [r0, #16] │ │ movs r4, r2 │ │ - b.n b8968 │ │ - b.n b8460 │ │ - b.n b878e │ │ - add r0, pc, #28 @ (adr r0, b846c ) │ │ - b.n b8792 │ │ + b.n b8978 │ │ + b.n b8470 │ │ + b.n b879e │ │ + add r0, pc, #28 @ (adr r0, b847c ) │ │ + b.n b87a2 │ │ strb r0, [r1, #0] │ │ - b.n b8796 │ │ + b.n b87a6 │ │ asrs r3, r0, #4 │ │ - b.n b837a │ │ + b.n b838a │ │ strh r6, [r0, #0] │ │ - b.n b879e │ │ - blx 4b9560 │ │ + b.n b87ae │ │ + blx 4b9570 │ │ movs r4, r3 │ │ movs r0, r0 │ │ lsls r0, r1, #8 │ │ movs r0, r0 │ │ lsls r0, r3, #26 │ │ movs r0, r0 │ │ lsls r0, r1, #8 │ │ @@ -228293,2335 +228173,2335 @@ │ │ lsls r0, r3, #8 │ │ movs r0, r0 │ │ lsls r0, r1, #8 │ │ movs r0, r0 │ │ lsls r0, r7, #26 │ │ movs r0, r0 │ │ lsls r4, r0, #1 │ │ - b.n b7fbc │ │ + b.n b7fcc │ │ movs r4, r1 │ │ - b.n b8730 │ │ + b.n b8740 │ │ movs r1, r0 │ │ subs r2, #0 │ │ movs r0, r0 │ │ - b.n b8738 │ │ + b.n b8748 │ │ lsls r5, r6, #1 │ │ ldr r2, [sp, #0] │ │ movs r0, r0 │ │ - b.n b7fb0 │ │ + b.n b7fc0 │ │ movs r2, r1 │ │ - b.n b87da │ │ + b.n b87ea │ │ subs r4, r5, #2 │ │ - b.n b7fdc │ │ + b.n b7fec │ │ ands r4, r1 │ │ - b.n b87e2 │ │ + b.n b87f2 │ │ movs r0, #5 │ │ - b.n b87e6 │ │ + b.n b87f6 │ │ adds r0, #12 │ │ - b.n b87ea │ │ + b.n b87fa │ │ asrs r1, r0, #32 │ │ - b.n b85cc │ │ + b.n b85dc │ │ lsls r2, r4, #7 │ │ and.w r0, r0, r8, ror #2 │ │ - b.n b886a │ │ + b.n b887a │ │ asrs r4, r7, #32 │ │ - b.n b7ff4 │ │ + b.n b8004 │ │ asrs r1, r3, #2 │ │ - b.n b8506 │ │ + b.n b8516 │ │ movs r6, r1 │ │ - b.n b85ca │ │ + b.n b85da │ │ movs r7, r0 │ │ - b.n b8766 │ │ + b.n b8776 │ │ lsls r0, r0, #7 │ │ ldrh r0, [r0, #16] │ │ movs r4, r2 │ │ - b.n b7ff2 │ │ + b.n b8002 │ │ adds r0, #4 │ │ - b.n b7ff2 │ │ + b.n b8002 │ │ movs r6, r1 │ │ - b.n b877c │ │ + b.n b878c │ │ lsls r0, r4, #7 │ │ subs r0, r0, r0 │ │ movs r6, r0 │ │ - b.n b8082 │ │ + b.n b8092 │ │ movs r0, r2 │ │ - b.n b8b02 │ │ + b.n b8b12 │ │ lsls r0, r4, #1 │ │ subs r0, r0, r0 │ │ lsls r0, r4, #1 │ │ - b.n b8024 │ │ - b.n b85c4 │ │ - b.n b8008 │ │ + b.n b8034 │ │ + b.n b85d4 │ │ + b.n b8018 │ │ movs r0, r0 │ │ - b.n b8b92 │ │ + b.n b8ba2 │ │ eors r0, r5 │ │ - b.n b8010 │ │ + b.n b8020 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ movs r4, r2 │ │ - b.n b8022 │ │ + b.n b8032 │ │ asrs r0, r5, #1 │ │ - b.n b8a1c │ │ + b.n b8a2c │ │ ands r4, r1 │ │ - b.n b8846 │ │ + b.n b8856 │ │ movs r0, #0 │ │ - b.n b802a │ │ + b.n b803a │ │ lsls r0, r4, #1 │ │ - b.n b8a28 │ │ + b.n b8a38 │ │ vrhadd.u d14, d2, d31 │ │ - b.n b8564 │ │ - b.n b8050 │ │ + b.n b8574 │ │ + b.n b8060 │ │ stmia r0!, {r2} │ │ - b.n b885a │ │ + b.n b886a │ │ movs r0, #44 @ 0x2c │ │ - b.n b8058 │ │ + b.n b8068 │ │ movs r0, r0 │ │ - b.n b8bc2 │ │ + b.n b8bd2 │ │ lsls r7, r6, #7 │ │ ldrh r0, [r0, r0] │ │ lsls r0, r5, #1 │ │ - b.n b8064 │ │ + b.n b8074 │ │ asrs r4, r5, #1 │ │ - b.n b8068 │ │ + b.n b8078 │ │ asrs r4, r4, #1 │ │ - b.n b804c │ │ + b.n b805c │ │ lsls r0, r4, #1 │ │ - b.n b8050 │ │ + b.n b8060 │ │ lsls r3, r1, #1 │ │ and.w r0, r0, r6 │ │ - b.n b80e2 │ │ + b.n b80f2 │ │ movs r0, r1 │ │ - b.n b8b62 │ │ + b.n b8b72 │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n b8bf6 │ │ + b.n b8c06 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n b8c04 │ │ + b.n b8c14 │ │ lsls r2, r0, #8 │ │ lsrs r0, r0, #8 │ │ adds r0, #0 │ │ - b.n b8082 │ │ + b.n b8092 │ │ movs r3, r0 │ │ - b.n b8c04 │ │ + b.n b8c14 │ │ lsls r3, r3, #7 │ │ subs r2, #0 │ │ movs r4, r1 │ │ - b.n b808a │ │ + b.n b809a │ │ asrs r0, r5, #32 │ │ - b.n b808a │ │ + b.n b809a │ │ movs r1, r0 │ │ - b.n b8814 │ │ + b.n b8824 │ │ lsls r1, r2, #7 │ │ cmp r2, #0 │ │ adds r0, #4 │ │ - b.n b811e │ │ + b.n b812e │ │ movs r0, r0 │ │ - b.n b8c20 │ │ + b.n b8c30 │ │ movs r2, r7 │ │ lsrs r0, r0, #8 │ │ adds r0, r4, #6 │ │ - b.n b80c0 │ │ + b.n b80d0 │ │ movs r2, r1 │ │ - b.n b88c6 │ │ + b.n b88d6 │ │ asrs r1, r0, #32 │ │ - b.n b86a8 │ │ + b.n b86b8 │ │ lsls r1, r5, #6 │ │ and.w r0, r0, r1, lsl #12 │ │ - b.n b88d2 │ │ + b.n b88e2 │ │ asrs r4, r0, #32 │ │ - b.n b8ab2 │ │ + b.n b8ac2 │ │ movs r0, r1 │ │ - b.n b883c │ │ + b.n b884c │ │ lsls r5, r1, #8 │ │ ldrh r0, [r0, #16] │ │ - b.n b85b4 │ │ - b.n b88e2 │ │ + b.n b85c4 │ │ + b.n b88f2 │ │ str r3, [r0, #0] │ │ - b.n b88e6 │ │ + b.n b88f6 │ │ movs r4, r1 │ │ - b.n b8850 │ │ - add r0, pc, #28 @ (adr r0, b85c8 ) │ │ - b.n b88ee │ │ + b.n b8860 │ │ + add r0, pc, #28 @ (adr r0, b85d8 ) │ │ + b.n b88fe │ │ stmia r0!, {r2, r3, r6} │ │ - b.n b80cc │ │ + b.n b80dc │ │ lsls r3, r4, #8 │ │ ldr r2, [sp, #0] │ │ asrs r4, r0, #1 │ │ - b.n b80f4 │ │ + b.n b8104 │ │ movs r1, r0 │ │ - b.n b886a │ │ + b.n b887a │ │ lsls r0, r4, #8 │ │ ldrh r0, [r0, #16] │ │ asrs r4, r1, #32 │ │ - b.n b80ea │ │ + b.n b80fa │ │ adds r0, #2 │ │ - b.n b890a │ │ + b.n b891a │ │ movs r0, r0 │ │ - b.n b86da │ │ + b.n b86ea │ │ strb r0, [r1, #0] │ │ - b.n b8912 │ │ + b.n b8922 │ │ movs r1, r0 │ │ - b.n b8ad6 │ │ + b.n b8ae6 │ │ movs r0, #64 @ 0x40 │ │ - b.n b80fc │ │ + b.n b810c │ │ movs r1, r0 │ │ - b.n b8d5e │ │ + b.n b8d6e │ │ movs r0, r1 │ │ - b.n b8ae2 │ │ + b.n b8af2 │ │ movs r4, #188 @ 0xbc │ │ - b.n b898a │ │ + b.n b899a │ │ movs r2, r0 │ │ - b.n b888a │ │ + b.n b889a │ │ movs r0, #3 │ │ - b.n b892e │ │ + b.n b893e │ │ lsls r0, r1, #8 │ │ ldr r2, [sp, #0] │ │ movs r6, r0 │ │ - b.n b819a │ │ + b.n b81aa │ │ asrs r2, r0, #32 │ │ - b.n b893a │ │ + b.n b894a │ │ lsls r0, r0, #1 │ │ - b.n b8c1e │ │ + b.n b8c2e │ │ movs r6, r2 │ │ subs r0, r0, r0 │ │ lsls r6, r6, #2 │ │ - b.n b89ae │ │ + b.n b89be │ │ ands r0, r0 │ │ - b.n b813e │ │ + b.n b814e │ │ adds r0, #4 │ │ - b.n b8142 │ │ + b.n b8152 │ │ movs r0, #0 │ │ - b.n b853c │ │ + b.n b854c │ │ lsls r0, r3, #1 │ │ - b.n b8b30 │ │ + b.n b8b40 │ │ ands r0, r0 │ │ - b.n b8134 │ │ + b.n b8144 │ │ adds r0, #4 │ │ - b.n b8138 │ │ - bfcsel 12, b8e1e , 14, cc │ │ + b.n b8148 │ │ + bfcsel 12, b8e2e , 14, cc │ │ lsls r4, r3, #1 │ │ - b.n b8160 │ │ + b.n b8170 │ │ movs r0, r0 │ │ - b.n b8cca │ │ + b.n b8cda │ │ lsls r4, r3, #11 │ │ subs r0, r0, r0 │ │ asrs r4, r2, #32 │ │ - b.n b816c │ │ + b.n b817c │ │ adds r0, #19 │ │ - b.n b8b42 │ │ + b.n b8b52 │ │ lsls r0, r3, #1 │ │ - b.n b8174 │ │ + b.n b8184 │ │ str r1, [r0, r0] │ │ - b.n b8d7e │ │ + b.n b8d8e │ │ asrs r4, r3, #1 │ │ - b.n b81e4 │ │ + b.n b81f4 │ │ stmia r0!, {r2, r3} │ │ - b.n b8166 │ │ + b.n b8176 │ │ asrs r3, r6, #4 │ │ - b.n b8754 │ │ + b.n b8764 │ │ movs r1, r0 │ │ - b.n b8906 │ │ + b.n b8916 │ │ lsls r3, r4, #8 │ │ subs r0, r0, r0 │ │ movs r0, #44 @ 0x2c │ │ - b.n b8190 │ │ - b.n b86a8 │ │ - b.n b8194 │ │ + b.n b81a0 │ │ + b.n b86b8 │ │ + b.n b81a4 │ │ movs r0, r0 │ │ and.w r0, r0, r1, lsl #8 │ │ - b.n b89a2 │ │ + b.n b89b2 │ │ stmia r0!, {r2, r3, r6} │ │ - b.n b81a0 │ │ + b.n b81b0 │ │ strh r0, [r0, #2] │ │ - b.n b81a4 │ │ + b.n b81b4 │ │ str r0, [sp, #4] │ │ - b.n b8b80 │ │ + b.n b8b90 │ │ movs r0, r1 │ │ - b.n b8924 │ │ + b.n b8934 │ │ vpmin.u32 , q11, │ │ vpmin.u16 q7, , │ │ ands r4, r1 │ │ - b.n b89be │ │ + b.n b89ce │ │ movs r4, r2 │ │ - b.n b8d2c │ │ + b.n b8d3c │ │ lsls r6, r4, #8 │ │ ldr r2, [sp, #0] │ │ adds r0, #32 │ │ - b.n b81c4 │ │ + b.n b81d4 │ │ str r2, [r7, #8] │ │ - b.n b8a34 │ │ + b.n b8a44 │ │ movs r0, r4 │ │ - b.n b8d9e │ │ + b.n b8dae │ │ movs r0, r2 │ │ - b.n b8e16 │ │ + b.n b8e26 │ │ lsls r2, r4, #1 │ │ - b.n b8d3a │ │ + b.n b8d4a │ │ lsls r2, r7, #4 │ │ subs r0, r0, r0 │ │ lsls r4, r7, #2 │ │ - b.n b8a48 │ │ - add r0, pc, #64 @ (adr r0, b86e4 ) │ │ - b.n b81c0 │ │ + b.n b8a58 │ │ + add r0, pc, #64 @ (adr r0, b86f4 ) │ │ + b.n b81d0 │ │ lsls r0, r4, #2 │ │ - b.n b8a0a │ │ + b.n b8a1a │ │ movs r4, r6 │ │ - b.n b81c8 │ │ + b.n b81d8 │ │ lsls r0, r4, #8 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #1 │ │ - b.n b81f0 │ │ + b.n b8200 │ │ str r4, [r2, r0] │ │ - b.n b8bc0 │ │ - add r0, pc, #0 @ (adr r0, b86bc ) │ │ - b.n b8dfe │ │ + b.n b8bd0 │ │ + add r0, pc, #0 @ (adr r0, b86cc ) │ │ + b.n b8e0e │ │ stmia r0!, {r2} │ │ - b.n b8a02 │ │ - add r0, pc, #336 @ (adr r0, b8814 ) │ │ - b.n b81e0 │ │ - movs r5, r0 │ │ - b.n b8a0a │ │ - add r0, pc, #320 @ (adr r0, b880c ) │ │ - b.n b81e8 │ │ + b.n b8a12 │ │ + add r0, pc, #336 @ (adr r0, b8824 ) │ │ + b.n b81f0 │ │ + movs r5, r0 │ │ + b.n b8a1a │ │ + add r0, pc, #320 @ (adr r0, b881c ) │ │ + b.n b81f8 │ │ str r0, [r6, r0] │ │ - b.n b81ec │ │ + b.n b81fc │ │ lsls r2, r7, #2 │ │ - b.n b8a7c │ │ + b.n b8a8c │ │ movs r0, r4 │ │ - b.n b8cfa │ │ + b.n b8d0a │ │ lsls r2, r0, #1 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #1 │ │ - b.n b81fc │ │ + b.n b820c │ │ lsls r0, r6, #2 │ │ - b.n b8a90 │ │ + b.n b8aa0 │ │ asrs r0, r6, #32 │ │ - b.n b8224 │ │ + b.n b8234 │ │ stmia r0!, {r2, r3, r6} │ │ - b.n b8208 │ │ + b.n b8218 │ │ str r0, [r0, #0] │ │ - b.n b87f4 │ │ + b.n b8804 │ │ lsls r0, r1, #1 │ │ - b.n b8230 │ │ + b.n b8240 │ │ ands r0, r1 │ │ - b.n b8c06 │ │ + b.n b8c16 │ │ movs r4, r0 │ │ - b.n b899e │ │ + b.n b89ae │ │ lsls r0, r2, #2 │ │ subs r2, #0 │ │ stmia r0!, {r1, r2, r3} │ │ - b.n b8a46 │ │ - b.n b870c │ │ - b.n b8a4a │ │ + b.n b8a56 │ │ + b.n b871c │ │ + b.n b8a5a │ │ movs r0, #4 │ │ - b.n b82ba │ │ + b.n b82ca │ │ movs r0, r0 │ │ - b.n b8db6 │ │ + b.n b8dc6 │ │ lsls r3, r5, #2 │ │ subs r0, r0, r0 │ │ strb r0, [r0, #0] │ │ - b.n b8246 │ │ + b.n b8256 │ │ str r6, [r6, #8] │ │ - b.n b8aca │ │ + b.n b8ada │ │ lsls r4, r1, #1 │ │ - b.n b825c │ │ + b.n b826c │ │ asrs r4, r0, #1 │ │ - b.n b8260 │ │ + b.n b8270 │ │ movs r6, r0 │ │ - b.n b89ca │ │ + b.n b89da │ │ lsls r2, r4, #3 │ │ ldrh r0, [r0, #16] │ │ movs r0, #14 │ │ - b.n b8a72 │ │ + b.n b8a82 │ │ strh r0, [r0, #0] │ │ - b.n b8a76 │ │ - b.n b8750 │ │ - b.n b8a7a │ │ + b.n b8a86 │ │ + b.n b8760 │ │ + b.n b8a8a │ │ movs r6, r0 │ │ - b.n b89e0 │ │ + b.n b89f0 │ │ lsls r5, r3, #3 │ │ subs r2, #0 │ │ movs r6, r0 │ │ - b.n b82ea │ │ + b.n b82fa │ │ movs r0, r2 │ │ - b.n b8d6a │ │ + b.n b8d7a │ │ lsls r2, r3, #1 │ │ subs r0, r0, r0 │ │ lsls r0, r2, #1 │ │ - b.n b828c │ │ + b.n b829c │ │ str r4, [r3, #4] │ │ - b.n b8270 │ │ + b.n b8280 │ │ movs r0, r0 │ │ - b.n b8dfa │ │ + b.n b8e0a │ │ eors r0, r3 │ │ - b.n b8278 │ │ + b.n b8288 │ │ lsls r3, r3, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, #28 │ │ - b.n b82a0 │ │ + b.n b82b0 │ │ lsls r0, r2, #1 │ │ - b.n b8c84 │ │ + b.n b8c94 │ │ asrs r0, r3, #1 │ │ - b.n b8c88 │ │ + b.n b8c98 │ │ vrhadd.u d14, d2, d31 │ │ adds r0, #32 │ │ - b.n b82b0 │ │ + b.n b82c0 │ │ movs r0, r0 │ │ - b.n b8e1a │ │ + b.n b8e2a │ │ stmia r0!, {r2, r3, r6} │ │ - b.n b82b8 │ │ - b.n b87d0 │ │ - b.n b82bc │ │ + b.n b82c8 │ │ + b.n b87e0 │ │ + b.n b82cc │ │ movs r0, #44 @ 0x2c │ │ - b.n b82c0 │ │ + b.n b82d0 │ │ lsls r2, r2, #1 │ │ - ldr r2, [pc, #0] @ (b8788 ) │ │ + ldr r2, [pc, #0] @ (b8798 ) │ │ lsls r0, r2, #1 │ │ - b.n b8ca8 │ │ + b.n b8cb8 │ │ asrs r2, r6, #1 │ │ - b.n b8cac │ │ + b.n b8cbc │ │ movs r0, #255 @ 0xff │ │ - b.n b8ed6 │ │ - b.n b8462 │ │ + b.n b8ee6 │ │ + b.n b8472 │ │ @ instruction: 0xebff100c │ │ - b.n b82d8 │ │ + b.n b82e8 │ │ strh r0, [r0, #0] │ │ - b.n b8ae2 │ │ + b.n b8af2 │ │ lsls r0, r3, #1 │ │ - b.n b8cc0 │ │ + b.n b8cd0 │ │ movs r0, #255 @ 0xff │ │ - b.n b8eea │ │ - b.n b846c │ │ + b.n b8efa │ │ + b.n b847c │ │ @ instruction: 0xebff0000 │ │ - b.n b82cc │ │ + b.n b82dc │ │ movs r0, #10 │ │ - b.n b8af6 │ │ + b.n b8b06 │ │ movs r0, r2 │ │ - b.n b82f4 │ │ + b.n b8304 │ │ adds r0, #8 │ │ - b.n b8afe │ │ + b.n b8b0e │ │ subs r4, r7, r6 │ │ - b.n b8300 │ │ + b.n b8310 │ │ asrs r1, r0, #32 │ │ - b.n b88e4 │ │ + b.n b88f4 │ │ @ instruction: 0xf6f2ebff │ │ adds r0, #32 │ │ - b.n b8308 │ │ + b.n b8318 │ │ lsls r4, r6, #30 │ │ - b.n b8de2 │ │ + b.n b8df2 │ │ stmia r0!, {r2, r3, r6} │ │ - b.n b8310 │ │ + b.n b8320 │ │ lsrs r7, r7, #31 │ │ - b.n b8e78 │ │ - b.n b882c │ │ - b.n b8318 │ │ + b.n b8e88 │ │ + b.n b883c │ │ + b.n b8328 │ │ movs r0, #44 @ 0x2c │ │ - b.n b831c │ │ + b.n b832c │ │ movs r0, r3 │ │ - b.n b8300 │ │ + b.n b8310 │ │ movs r2, r7 │ │ and.w r0, r0, r8, ror #26 │ │ - b.n b8b94 │ │ + b.n b8ba4 │ │ movs r0, r6 │ │ - b.n b832c │ │ + b.n b833c │ │ eors r0, r1 │ │ - b.n b8330 │ │ + b.n b8340 │ │ lsls r2, r3, #26 │ │ - b.n b884a │ │ + b.n b885a │ │ movs r6, r0 │ │ - b.n b890e │ │ + b.n b891e │ │ movs r0, r0 │ │ - b.n b8aaa │ │ + b.n b8aba │ │ lsls r6, r3, #1 │ │ subs r2, #0 │ │ movs r6, r0 │ │ - b.n b8ac2 │ │ + b.n b8ad2 │ │ lsls r0, r7, #1 │ │ subs r0, r0, r0 │ │ ands r1, r0 │ │ - b.n b8b52 │ │ + b.n b8b62 │ │ strb r4, [r1, #0] │ │ - b.n b8b56 │ │ + b.n b8b66 │ │ movs r6, r0 │ │ - b.n b83be │ │ + b.n b83ce │ │ movs r0, r2 │ │ - b.n b8e3e │ │ + b.n b8e4e │ │ movs r7, r4 │ │ subs r0, r0, r0 │ │ lsls r0, r2, #1 │ │ - b.n b8360 │ │ + b.n b8370 │ │ str r4, [r3, #4] │ │ - b.n b8344 │ │ + b.n b8354 │ │ movs r0, r0 │ │ - b.n b8ece │ │ + b.n b8ede │ │ strh r0, [r3, #2] │ │ - b.n b834c │ │ + b.n b835c │ │ movs r5, r6 │ │ lsrs r0, r0, #8 │ │ movs r0, #28 │ │ - b.n b8374 │ │ + b.n b8384 │ │ lsls r0, r2, #1 │ │ - b.n b8d58 │ │ + b.n b8d68 │ │ asrs r0, r3, #1 │ │ - b.n b8d5c │ │ + b.n b8d6c │ │ vrhadd.u d14, d2, d31 │ │ adds r0, #32 │ │ - b.n b8384 │ │ + b.n b8394 │ │ movs r0, r0 │ │ - b.n b8eee │ │ - b.n b88a0 │ │ - b.n b838c │ │ + b.n b8efe │ │ + b.n b88b0 │ │ + b.n b839c │ │ movs r0, #44 @ 0x2c │ │ - b.n b8390 │ │ + b.n b83a0 │ │ strh r0, [r0, #2] │ │ - b.n b8394 │ │ + b.n b83a4 │ │ movs r4, r5 │ │ - ldr r2, [pc, #0] @ (b885c ) │ │ + ldr r2, [pc, #0] @ (b886c ) │ │ lsls r0, r2, #1 │ │ - b.n b8d7c │ │ + b.n b8d8c │ │ asrs r2, r6, #1 │ │ - b.n b8d80 │ │ + b.n b8d90 │ │ movs r0, #255 @ 0xff │ │ - b.n b8faa │ │ - b.n b84cc │ │ + b.n b8fba │ │ + b.n b84dc │ │ @ instruction: 0xebff100c │ │ - b.n b83ac │ │ + b.n b83bc │ │ str r0, [r0, #0] │ │ - b.n b8bb6 │ │ + b.n b8bc6 │ │ lsls r0, r3, #1 │ │ - b.n b8d94 │ │ + b.n b8da4 │ │ movs r0, #255 @ 0xff │ │ - b.n b8fbe │ │ - b.n b84d6 │ │ + b.n b8fce │ │ + b.n b84e6 │ │ @ instruction: 0xebff0000 │ │ - b.n b83a0 │ │ + b.n b83b0 │ │ movs r0, #10 │ │ - b.n b8bca │ │ + b.n b8bda │ │ movs r0, r2 │ │ - b.n b83c8 │ │ + b.n b83d8 │ │ adds r0, #6 │ │ - b.n b8bd2 │ │ + b.n b8be2 │ │ subs r0, r3, r3 │ │ - b.n b83d4 │ │ + b.n b83e4 │ │ asrs r1, r0, #32 │ │ - b.n b89b8 │ │ - bfcsel 1a, b809a , 1c, │ │ + b.n b89c8 │ │ + bfcsel 1a, b80aa , 1c, │ │ adds r0, #32 │ │ - b.n b83dc │ │ + b.n b83ec │ │ lsls r4, r6, #30 │ │ - b.n b8eb6 │ │ - b.n b88f8 │ │ - b.n b83e4 │ │ + b.n b8ec6 │ │ + b.n b8908 │ │ + b.n b83f4 │ │ lsrs r7, r7, #31 │ │ - b.n b8f4c │ │ + b.n b8f5c │ │ movs r0, #44 @ 0x2c │ │ - b.n b83ec │ │ + b.n b83fc │ │ movs r0, r3 │ │ - b.n b83d0 │ │ + b.n b83e0 │ │ movs r5, r2 │ │ @ instruction: 0xea00c008 │ │ - b.n b8bfe │ │ + b.n b8c0e │ │ movs r1, r1 │ │ @ instruction: 0xea00c007 │ │ - b.n b8c06 │ │ + b.n b8c16 │ │ asrs r4, r0, #32 │ │ - b.n b8c0a │ │ + b.n b8c1a │ │ strh r0, [r0, #2] │ │ - b.n b8408 │ │ + b.n b8418 │ │ movs r5, r2 │ │ @ instruction: 0xea00c008 │ │ - b.n b8c16 │ │ + b.n b8c26 │ │ asrs r4, r3, #1 │ │ - b.n b8414 │ │ + b.n b8424 │ │ asrs r4, r2, #1 │ │ - b.n b83f8 │ │ + b.n b8408 │ │ asrs r4, r0, #1 │ │ - b.n b841c │ │ + b.n b842c │ │ lsls r0, r3, #1 │ │ - b.n b8420 │ │ + b.n b8430 │ │ lsls r0, r2, #1 │ │ - b.n b8404 │ │ + b.n b8414 │ │ movs r0, r0 │ │ - b.n b8f9c │ │ + b.n b8fac │ │ lsls r4, r2, #1 │ │ subs r0, r0, r0 │ │ movs r6, r0 │ │ - b.n b89fe │ │ + b.n b8a0e │ │ eors r0, r1 │ │ - b.n b8434 │ │ + b.n b8444 │ │ movs r0, r0 │ │ - b.n b8ba6 │ │ + b.n b8bb6 │ │ lsls r6, r3, #1 │ │ subs r2, #0 │ │ strb r0, [r7, #0] │ │ - b.n b8440 │ │ + b.n b8450 │ │ strh r0, [r0, #2] │ │ - b.n b8444 │ │ + b.n b8454 │ │ movs r7, r0 │ │ @ instruction: 0xea008040 │ │ - b.n b844c │ │ + b.n b845c │ │ lsls r0, r3, #1 │ │ - b.n b8450 │ │ + b.n b8460 │ │ stmia r0!, {r0, r1, r2} │ │ - b.n b8c5a │ │ + b.n b8c6a │ │ asrs r4, r3, #1 │ │ - b.n b8458 │ │ + b.n b8468 │ │ asrs r4, r2, #1 │ │ - b.n b843c │ │ + b.n b844c │ │ asrs r4, r0, #32 │ │ - b.n b8c66 │ │ + b.n b8c76 │ │ lsls r0, r2, #1 │ │ - b.n b8444 │ │ + b.n b8454 │ │ strb r0, [r7, #0] │ │ - b.n b8468 │ │ + b.n b8478 │ │ movs r4, r6 │ │ - b.n b846c │ │ - add r0, pc, #4 @ (adr r0, b8938 ) │ │ - b.n b8e4a │ │ + b.n b847c │ │ + add r0, pc, #4 @ (adr r0, b8948 ) │ │ + b.n b8e5a │ │ str r2, [r0, r0] │ │ - b.n b8e44 │ │ + b.n b8e54 │ │ movs r2, r1 │ │ - b.n b8bde │ │ + b.n b8bee │ │ vpmin.u32 , , │ │ lsls r4, r0, #6 │ │ and.w r0, r0, r8, lsl #1 │ │ - b.n b8484 │ │ + b.n b8494 │ │ movs r0, #4 │ │ - b.n b89ce │ │ + b.n b89de │ │ movs r0, r2 │ │ - b.n b848c │ │ + b.n b849c │ │ subs r4, r3, r0 │ │ - b.n b8494 │ │ + b.n b84a4 │ │ asrs r1, r0, #32 │ │ - b.n b8a78 │ │ - bfcsel 1a, b815a , 1c, cc │ │ + b.n b8a88 │ │ + bfcsel 1a, b816a , 1c, cc │ │ lsls r4, r6, #30 │ │ - b.n b8f72 │ │ + b.n b8f82 │ │ adds r0, #32 │ │ - b.n b84a0 │ │ + b.n b84b0 │ │ lsrs r7, r7, #31 │ │ - b.n b9008 │ │ - b.n b89bc │ │ - b.n b84a8 │ │ + b.n b9018 │ │ + b.n b89cc │ │ + b.n b84b8 │ │ movs r0, #44 @ 0x2c │ │ - b.n b84ac │ │ + b.n b84bc │ │ movs r0, r3 │ │ - b.n b8490 │ │ + b.n b84a0 │ │ asrs r4, r0, #1 │ │ - b.n b84b4 │ │ + b.n b84c4 │ │ stmia r0!, {r2, r3, r6} │ │ - b.n b84b8 │ │ + b.n b84c8 │ │ @ instruction: 0xffe0eaff │ │ movs r0, #72 @ 0x48 │ │ - b.n b84c0 │ │ + b.n b84d0 │ │ ands r1, r0 │ │ - b.n b8cca │ │ + b.n b8cda │ │ str r4, [r1, #0] │ │ - b.n b8cce │ │ + b.n b8cde │ │ movs r0, #2 │ │ - b.n b8a12 │ │ + b.n b8a22 │ │ movs r0, r2 │ │ - b.n b84d0 │ │ + b.n b84e0 │ │ adds r4, r1, r7 │ │ - b.n b84d8 │ │ + b.n b84e8 │ │ asrs r1, r0, #32 │ │ - b.n b8abc │ │ + b.n b8acc │ │ bflx 18, ip │ │ lsls r4, r6, #30 │ │ - b.n b8fb6 │ │ + b.n b8fc6 │ │ adds r0, #32 │ │ - b.n b84e4 │ │ + b.n b84f4 │ │ lsrs r7, r7, #31 │ │ - b.n b904c │ │ + b.n b905c │ │ stmia r0!, {r1, r2} │ │ - b.n b8cf2 │ │ + b.n b8d02 │ │ asrs r4, r0, #32 │ │ - b.n b8cf6 │ │ - b.n b8a08 │ │ - b.n b84f4 │ │ + b.n b8d06 │ │ + b.n b8a18 │ │ + b.n b8504 │ │ movs r0, #44 @ 0x2c │ │ - b.n b84f8 │ │ + b.n b8508 │ │ movs r0, r3 │ │ - b.n b84dc │ │ + b.n b84ec │ │ @ instruction: 0xffcfeaff │ │ movs r0, r2 │ │ - b.n b8504 │ │ + b.n b8514 │ │ adds r0, r5, r6 │ │ - b.n b850c │ │ + b.n b851c │ │ asrs r1, r0, #32 │ │ - b.n b8af0 │ │ + b.n b8b00 │ │ bfx 18, pc @ │ │ adds r0, #32 │ │ - b.n b8514 │ │ + b.n b8524 │ │ lsls r4, r6, #30 │ │ - b.n b8fee │ │ + b.n b8ffe │ │ stmia r0!, {r3, r5} │ │ - b.n b851c │ │ + b.n b852c │ │ lsrs r7, r7, #31 │ │ - b.n b9084 │ │ - b.n b8a40 │ │ - b.n b8524 │ │ + b.n b9094 │ │ + b.n b8a50 │ │ + b.n b8534 │ │ movs r0, r3 │ │ - b.n b8508 │ │ + b.n b8518 │ │ vpmin.u8 q15, q12, │ │ movs r3, r0 │ │ ldrh r0, [r0, #16] │ │ movs r6, r0 │ │ - b.n b8c9c │ │ + b.n b8cac │ │ ands r6, r0 │ │ - b.n b8d3e │ │ + b.n b8d4e │ │ strb r6, [r0, #0] │ │ - b.n b8d42 │ │ + b.n b8d52 │ │ @ instruction: 0xff832aff │ │ asrs r0, r0, #32 │ │ - b.n b8524 │ │ + b.n b8534 │ │ ands r1, r0 │ │ - b.n b8d4e │ │ + b.n b8d5e │ │ movs r0, r2 │ │ - b.n b854c │ │ + b.n b855c │ │ movs r0, #6 │ │ - b.n b8d56 │ │ + b.n b8d66 │ │ adds r0, r2, r5 │ │ - b.n b8558 │ │ + b.n b8568 │ │ adds r0, #12 │ │ - b.n b8d5e │ │ + b.n b8d6e │ │ strb r4, [r1, #0] │ │ - b.n b8d62 │ │ + b.n b8d72 │ │ asrs r1, r0, #32 │ │ - b.n b8b44 │ │ - bf 18, b3226 │ │ + b.n b8b54 │ │ + bf 18, b3236 │ │ adds r0, #32 │ │ - b.n b8568 │ │ + b.n b8578 │ │ lsls r4, r6, #30 │ │ - b.n b9042 │ │ - b.n b8a84 │ │ - b.n b8570 │ │ + b.n b9052 │ │ + b.n b8a94 │ │ + b.n b8580 │ │ lsrs r7, r7, #31 │ │ - b.n b90d8 │ │ + b.n b90e8 │ │ movs r0, #44 @ 0x2c │ │ - b.n b8578 │ │ + b.n b8588 │ │ movs r0, r3 │ │ - b.n b855c │ │ + b.n b856c │ │ vpmin.u q15, , │ │ movs r0, r2 │ │ - b.n b8584 │ │ + b.n b8594 │ │ movs r0, #7 │ │ - b.n b8d8e │ │ + b.n b8d9e │ │ adds r0, r6, r4 │ │ - b.n b8590 │ │ + b.n b85a0 │ │ asrs r1, r0, #32 │ │ - b.n b8b74 │ │ - bf 18, c7256 │ │ + b.n b8b84 │ │ + bf 18, c7266 │ │ adds r0, #32 │ │ - b.n b8598 │ │ + b.n b85a8 │ │ lsls r4, r6, #30 │ │ - b.n b9072 │ │ + b.n b9082 │ │ stmia r0!, {r2, r3, r6} │ │ - b.n b85a0 │ │ + b.n b85b0 │ │ lsrs r7, r7, #31 │ │ - b.n b9108 │ │ + b.n b9118 │ │ asrs r4, r0, #1 │ │ - b.n b85a8 │ │ - b.n b8ac0 │ │ - b.n b85ac │ │ + b.n b85b8 │ │ + b.n b8ad0 │ │ + b.n b85bc │ │ movs r0, #44 @ 0x2c │ │ - b.n b85b0 │ │ + b.n b85c0 │ │ movs r0, r3 │ │ - b.n b8594 │ │ + b.n b85a4 │ │ @ instruction: 0xff9ceaff │ │ asrs r0, r1, #1 │ │ - b.n b85bc │ │ + b.n b85cc │ │ movs r0, #1 │ │ - b.n b8b06 │ │ + b.n b8b16 │ │ movs r0, r2 │ │ - b.n b85c4 │ │ + b.n b85d4 │ │ adds r0, r7, r3 │ │ - b.n b85cc │ │ + b.n b85dc │ │ asrs r1, r0, #32 │ │ - b.n b8bb0 │ │ - bfcsel 18, b8292 , 1c, │ │ + b.n b8bc0 │ │ + bfcsel 18, b82a2 , 1c, │ │ adds r0, #32 │ │ - b.n b85d4 │ │ + b.n b85e4 │ │ lsls r4, r6, #30 │ │ - b.n b90ae │ │ + b.n b90be │ │ stmia r0!, {r2, r3, r6} │ │ - b.n b85dc │ │ + b.n b85ec │ │ lsrs r7, r7, #31 │ │ - b.n b9144 │ │ + b.n b9154 │ │ asrs r4, r0, #1 │ │ - b.n b85e4 │ │ - b.n b8afc │ │ - b.n b85e8 │ │ + b.n b85f4 │ │ + b.n b8b0c │ │ + b.n b85f8 │ │ movs r0, #44 @ 0x2c │ │ - b.n b85ec │ │ + b.n b85fc │ │ movs r0, r3 │ │ - b.n b85d0 │ │ + b.n b85e0 │ │ @ instruction: 0xff91eaff │ │ asrs r0, r0, #32 │ │ - b.n b85d8 │ │ + b.n b85e8 │ │ movs r0, #6 │ │ - b.n b8e02 │ │ + b.n b8e12 │ │ movs r0, r2 │ │ - b.n b8600 │ │ + b.n b8610 │ │ adds r0, r6, r2 │ │ - b.n b8608 │ │ + b.n b8618 │ │ adds r0, #76 @ 0x4c │ │ - b.n b8608 │ │ + b.n b8618 │ │ asrs r1, r0, #32 │ │ - b.n b8bf0 │ │ - bfcsel 18, b82d2 , 1c, lt │ │ + b.n b8c00 │ │ + bfcsel 18, b82e2 , 1c, lt │ │ adds r0, #32 │ │ - b.n b8614 │ │ + b.n b8624 │ │ lsls r4, r6, #30 │ │ - b.n b90ee │ │ + b.n b90fe │ │ strh r4, [r1, #2] │ │ - b.n b861c │ │ + b.n b862c │ │ lsrs r7, r7, #31 │ │ - b.n b9184 │ │ + b.n b9194 │ │ asrs r4, r0, #1 │ │ - b.n b8624 │ │ - b.n b8b3c │ │ - b.n b8628 │ │ + b.n b8634 │ │ + b.n b8b4c │ │ + b.n b8638 │ │ movs r0, #44 @ 0x2c │ │ - b.n b862c │ │ + b.n b863c │ │ movs r0, r3 │ │ - b.n b8610 │ │ + b.n b8620 │ │ vpmin.u16 q7, , │ │ movs r0, r6 │ │ - b.n b91a8 │ │ + b.n b91b8 │ │ mrc2 10, 6, r0, cr9, cr15, {7} @ │ │ adds r0, r1, r1 │ │ - b.n b8644 │ │ + b.n b8654 │ │ movs r2, r1 │ │ - b.n b8e4a │ │ + b.n b8e5a │ │ ands r4, r1 │ │ - b.n b8e4e │ │ + b.n b8e5e │ │ movs r0, #5 │ │ - b.n b8e52 │ │ + b.n b8e62 │ │ asrs r1, r0, #32 │ │ - b.n b8c34 │ │ + b.n b8c44 │ │ movs r1, r6 │ │ and.w r0, r0, r0, rrx │ │ - b.n b91c8 │ │ + b.n b91d8 │ │ mrc2 10, 6, r0, cr1, cr15, {7} @ │ │ adds r4, r5, r0 │ │ - b.n b8664 │ │ + b.n b8674 │ │ movs r2, r1 │ │ - b.n b8e6a │ │ + b.n b8e7a │ │ ands r4, r1 │ │ - b.n b8e6e │ │ + b.n b8e7e │ │ movs r0, #5 │ │ - b.n b8e72 │ │ + b.n b8e82 │ │ asrs r1, r0, #32 │ │ - b.n b8c54 │ │ + b.n b8c64 │ │ adds r0, #48 @ 0x30 │ │ - b.n b927a │ │ + b.n b928a │ │ movs r7, r7 │ │ @ instruction: 0xea00e00a │ │ - b.n b8e82 │ │ - add r0, pc, #28 @ (adr r0, b8b60 ) │ │ - b.n b8e86 │ │ + b.n b8e92 │ │ + add r0, pc, #28 @ (adr r0, b8b70 ) │ │ + b.n b8e96 │ │ strb r0, [r1, #0] │ │ - b.n b8e8a │ │ + b.n b8e9a │ │ strh r6, [r0, #0] │ │ - b.n b8e8e │ │ + b.n b8e9e │ │ mcr2 10, 6, lr, cr5, cr15, {7} @ │ │ asrs r0, r2, #31 │ │ - b.n b8694 │ │ + b.n b86a4 │ │ movs r2, r1 │ │ - b.n b8e9a │ │ + b.n b8eaa │ │ movs r0, #9 │ │ - b.n b8e9e │ │ + b.n b8eae │ │ strb r4, [r1, #0] │ │ - b.n b8ea2 │ │ + b.n b8eb2 │ │ asrs r1, r0, #32 │ │ - b.n b8c84 │ │ - bfcsel 18, b9366 , 1c, cs │ │ - b.n b8bbc │ │ - b.n b86a8 │ │ + b.n b8c94 │ │ + bfcsel 18, b9376 , 1c, cs │ │ + b.n b8bcc │ │ + b.n b86b8 │ │ lsls r4, r6, #30 │ │ - b.n b9182 │ │ + b.n b9192 │ │ movs r0, #44 @ 0x2c │ │ - b.n b86b0 │ │ + b.n b86c0 │ │ lsrs r7, r7, #31 │ │ - b.n b9218 │ │ + b.n b9228 │ │ adds r0, #4 │ │ - b.n b8726 │ │ + b.n b8736 │ │ stmia r0!, {r0, r1, r2} │ │ - b.n b8ec2 │ │ + b.n b8ed2 │ │ movs r0, r3 │ │ - b.n b86a0 │ │ + b.n b86b0 │ │ mrc2 10, 0, lr, cr15, cr15, {7} @ │ │ asrs r4, r7, #31 │ │ - b.n b86cc │ │ + b.n b86dc │ │ movs r2, r1 │ │ - b.n b8ed2 │ │ + b.n b8ee2 │ │ movs r0, #6 │ │ - b.n b8ed6 │ │ + b.n b8ee6 │ │ asrs r1, r0, #32 │ │ - b.n b8cb8 │ │ + b.n b8cc8 │ │ @ instruction: 0xf5fdebff │ │ lsls r4, r6, #30 │ │ - b.n b91b2 │ │ - b.n b8bf4 │ │ - b.n b86e0 │ │ + b.n b91c2 │ │ + b.n b8c04 │ │ + b.n b86f0 │ │ lsrs r7, r7, #31 │ │ - b.n b9248 │ │ + b.n b9258 │ │ movs r0, #44 @ 0x2c │ │ - b.n b86e8 │ │ + b.n b86f8 │ │ movs r0, r3 │ │ - b.n b86cc │ │ + b.n b86dc │ │ stmia r0!, {r2} │ │ - b.n b8ef6 │ │ + b.n b8f06 │ │ mcr2 10, 5, lr, cr11, cr15, {7} @ │ │ asrs r0, r1, #29 │ │ - b.n b86fc │ │ + b.n b870c │ │ adds r0, #7 │ │ - b.n b8c4c │ │ + b.n b8c5c │ │ movs r2, r1 │ │ - b.n b8f06 │ │ + b.n b8f16 │ │ asrs r1, r0, #32 │ │ - b.n b8ce8 │ │ + b.n b8cf8 │ │ movs r1, r3 │ │ and.w r7, r0, r8, asr #4 │ │ - b.n b8710 │ │ + b.n b8720 │ │ movs r0, #7 │ │ - b.n b8c56 │ │ + b.n b8c66 │ │ ands r4, r1 │ │ - b.n b8f1a │ │ + b.n b8f2a │ │ movs r2, r1 │ │ - b.n b8f1e │ │ + b.n b8f2e │ │ asrs r1, r0, #32 │ │ - b.n b8d00 │ │ + b.n b8d10 │ │ @ instruction: 0xf5ebebff │ │ movs r5, r2 │ │ and.w r7, r0, ip, lsr #4 │ │ - b.n b872c │ │ + b.n b873c │ │ movs r2, r1 │ │ - b.n b8f32 │ │ + b.n b8f42 │ │ movs r0, #9 │ │ - b.n b8f36 │ │ + b.n b8f46 │ │ adds r0, #6 │ │ - b.n b8f3a │ │ + b.n b8f4a │ │ asrs r1, r0, #32 │ │ - b.n b8d1c │ │ + b.n b8d2c │ │ strh r4, [r1, #0] │ │ - b.n b8f42 │ │ + b.n b8f52 │ │ @ instruction: 0xf5e3ebff │ │ stmia r0!, {r3} │ │ - b.n b8f4a │ │ + b.n b8f5a │ │ strh r0, [r0, #2] │ │ - b.n b8748 │ │ - b.n b8c60 │ │ - b.n b874c │ │ + b.n b8758 │ │ + b.n b8c70 │ │ + b.n b875c │ │ lsls r4, r6, #30 │ │ - b.n b9226 │ │ + b.n b9236 │ │ movs r0, #44 @ 0x2c │ │ - b.n b8754 │ │ + b.n b8764 │ │ lsrs r7, r7, #31 │ │ - b.n b92bc │ │ + b.n b92cc │ │ movs r0, r3 │ │ - b.n b873c │ │ + b.n b874c │ │ stc2l 10, cr14, [r8, #1020] @ 0x3fc @ │ │ asrs r4, r4, #27 │ │ - b.n b8768 │ │ + b.n b8778 │ │ adds r0, #7 │ │ - b.n b8cae │ │ + b.n b8cbe │ │ movs r2, r1 │ │ - b.n b8f72 │ │ + b.n b8f82 │ │ asrs r1, r0, #32 │ │ - b.n b8d54 │ │ + b.n b8d64 │ │ ands r4, r1 │ │ - b.n b8f7a │ │ + b.n b8f8a │ │ movs r0, #9 │ │ - b.n b8f7e │ │ - bf 16, ad43e │ │ + b.n b8f8e │ │ + bf 16, ad44e │ │ lsls r4, r6, #30 │ │ - b.n b9256 │ │ + b.n b9266 │ │ stmia r0!, {r2} │ │ - b.n b8f8a │ │ + b.n b8f9a │ │ lsrs r7, r7, #31 │ │ - b.n b92ec │ │ - b.n b8ca0 │ │ - b.n b878c │ │ + b.n b92fc │ │ + b.n b8cb0 │ │ + b.n b879c │ │ movs r0, #44 @ 0x2c │ │ - b.n b8790 │ │ + b.n b87a0 │ │ movs r0, r3 │ │ - b.n b8774 │ │ + b.n b8784 │ │ mcr2 10, 4, lr, cr2, cr15, {7} @ │ │ asrs r0, r1, #32 │ │ - b.n b8782 │ │ + b.n b8792 │ │ lsls r2, r3, #3 │ │ ldrh r0, [r0, #16] │ │ movs r6, r1 │ │ - b.n b8f0c │ │ + b.n b8f1c │ │ lsls r0, r3, #3 │ │ subs r2, #0 │ │ - b.n b8c78 │ │ - b.n b8772 │ │ - b.n b8c84 │ │ - b.n b8776 │ │ + b.n b8c88 │ │ + b.n b8782 │ │ + b.n b8c94 │ │ + b.n b8786 │ │ mrc2 10, 0, lr, cr7, cr15, {7} @ │ │ lsls r0, r6, #3 │ │ - b.n b9018 │ │ + b.n b9028 │ │ movs r2, r1 │ │ - b.n b8fc2 │ │ + b.n b8fd2 │ │ asrs r4, r1, #26 │ │ - b.n b87c4 │ │ + b.n b87d4 │ │ movs r0, #9 │ │ - b.n b8fca │ │ + b.n b8fda │ │ adds r0, #6 │ │ - b.n b8fce │ │ + b.n b8fde │ │ strh r4, [r1, #0] │ │ - b.n b8fd2 │ │ + b.n b8fe2 │ │ asrs r1, r0, #32 │ │ - b.n b8db4 │ │ - bfcsel 16, b9496 , 1a, │ │ + b.n b8dc4 │ │ + bfcsel 16, b94a6 , 1a, │ │ stmia r0!, {r3} │ │ - b.n b8fde │ │ + b.n b8fee │ │ strh r0, [r0, #2] │ │ - b.n b87dc │ │ - b.n b8cf4 │ │ - b.n b87e0 │ │ + b.n b87ec │ │ + b.n b8d04 │ │ + b.n b87f0 │ │ lsls r4, r6, #30 │ │ - b.n b92ba │ │ + b.n b92ca │ │ movs r0, #44 @ 0x2c │ │ - b.n b87e8 │ │ + b.n b87f8 │ │ lsrs r7, r7, #31 │ │ - b.n b9350 │ │ + b.n b9360 │ │ movs r0, r3 │ │ - b.n b87d0 │ │ + b.n b87e0 │ │ ldc2 10, cr14, [r0, #1020]! @ 0x3fc @ │ │ movs r4, r4 │ │ - b.n b87de │ │ + b.n b87ee │ │ movs r0, r0 │ │ - b.n b8f68 │ │ + b.n b8f78 │ │ movs r2, r0 │ │ cmp r2, #0 │ │ movs r6, r0 │ │ - b.n b886e │ │ + b.n b887e │ │ lsls r0, r0, #1 │ │ - b.n b92ee │ │ + b.n b92fe │ │ mcr2 10, 1, r1, cr7, cr15, {7} @ │ │ asrs r0, r1, #25 │ │ - b.n b8814 │ │ + b.n b8824 │ │ movs r2, r1 │ │ - b.n b901a │ │ + b.n b902a │ │ movs r0, #9 │ │ - b.n b901e │ │ + b.n b902e │ │ str r4, [r1, r0] │ │ - b.n b9022 │ │ + b.n b9032 │ │ asrs r1, r0, #32 │ │ - b.n b8e04 │ │ - bfcsel 16, b94e6 , 1a, ge │ │ - b.n b8d3c │ │ - b.n b8828 │ │ + b.n b8e14 │ │ + bfcsel 16, b94f6 , 1a, ge │ │ + b.n b8d4c │ │ + b.n b8838 │ │ lsls r4, r6, #30 │ │ - b.n b9302 │ │ + b.n b9312 │ │ movs r0, #44 @ 0x2c │ │ - b.n b8830 │ │ + b.n b8840 │ │ stmia r0!, {r0, r2} │ │ - b.n b903a │ │ + b.n b904a │ │ lsrs r7, r7, #31 │ │ - b.n b939c │ │ + b.n b93ac │ │ movs r0, r3 │ │ - b.n b881c │ │ + b.n b882c │ │ mrc2 10, 0, lr, cr10, cr15, {7} @ │ │ lsls r0, r4, #1 │ │ - b.n b9224 │ │ + b.n b9234 │ │ asrs r2, r6, #1 │ │ - b.n b9228 │ │ + b.n b9238 │ │ movs r0, #255 @ 0xff │ │ - b.n b9452 │ │ - b.n b8720 │ │ + b.n b9462 │ │ + b.n b8730 │ │ @ instruction: 0xebff100c │ │ - b.n b8854 │ │ + b.n b8864 │ │ str r0, [r0, #0] │ │ - b.n b905e │ │ + b.n b906e │ │ lsls r0, r5, #1 │ │ - b.n b923c │ │ + b.n b924c │ │ movs r0, #255 @ 0xff │ │ - b.n b9466 │ │ - b.n b872a │ │ + b.n b9476 │ │ + b.n b873a │ │ @ instruction: 0xebff0000 │ │ - b.n b8848 │ │ + b.n b8858 │ │ movs r2, r1 │ │ - b.n b9072 │ │ + b.n b9082 │ │ asrs r4, r1, #23 │ │ - b.n b8874 │ │ + b.n b8884 │ │ movs r0, #9 │ │ - b.n b907a │ │ + b.n b908a │ │ adds r0, #6 │ │ - b.n b907e │ │ + b.n b908e │ │ asrs r1, r0, #32 │ │ - b.n b8e60 │ │ - bfcsel 16, b8542 , 1a, mi │ │ - b.n b8d98 │ │ - b.n b8884 │ │ + b.n b8e70 │ │ + bfcsel 16, b8552 , 1a, mi │ │ + b.n b8da8 │ │ + b.n b8894 │ │ lsls r4, r6, #30 │ │ - b.n b935e │ │ + b.n b936e │ │ movs r0, #44 @ 0x2c │ │ - b.n b888c │ │ + b.n b889c │ │ stmia r0!, {r2} │ │ - b.n b9096 │ │ + b.n b90a6 │ │ lsrs r7, r7, #31 │ │ - b.n b93f8 │ │ + b.n b9408 │ │ movs r0, r3 │ │ - b.n b8878 │ │ + b.n b8888 │ │ ldc2l 10, cr14, [r0, #1020]! @ 0x3fc @ │ │ asrs r4, r6, #22 │ │ - b.n b88a4 │ │ + b.n b88b4 │ │ movs r2, r1 │ │ - b.n b90aa │ │ + b.n b90ba │ │ movs r0, #0 │ │ - b.n b94ae │ │ + b.n b94be │ │ adds r0, #6 │ │ - b.n b90b2 │ │ + b.n b90c2 │ │ asrs r1, r0, #32 │ │ - b.n b8e94 │ │ + b.n b8ea4 │ │ str r4, [r1, r0] │ │ - b.n b90ba │ │ - bfcsel 16, b857a , 18, ne │ │ - b.n b8dd0 │ │ - b.n b88bc │ │ + b.n b90ca │ │ + bfcsel 16, b858a , 18, ne │ │ + b.n b8de0 │ │ + b.n b88cc │ │ lsls r4, r6, #30 │ │ - b.n b9396 │ │ + b.n b93a6 │ │ movs r0, #44 @ 0x2c │ │ - b.n b88c4 │ │ + b.n b88d4 │ │ stmia r0!, {r0, r2} │ │ - b.n b90ce │ │ + b.n b90de │ │ lsrs r7, r7, #31 │ │ - b.n b9430 │ │ + b.n b9440 │ │ movs r0, r3 │ │ - b.n b88b0 │ │ + b.n b88c0 │ │ stc2l 10, cr14, [lr, #1020]! @ 0x3fc @ │ │ lsls r0, r1, #1 │ │ - b.n b88d8 │ │ - add r0, pc, #28 @ (adr r0, b8dbc ) │ │ - b.n b90e2 │ │ + b.n b88e8 │ │ + add r0, pc, #28 @ (adr r0, b8dcc ) │ │ + b.n b90f2 │ │ str r0, [r0, #0] │ │ - b.n b88c0 │ │ + b.n b88d0 │ │ strb r0, [r1, #0] │ │ - b.n b90ea │ │ + b.n b90fa │ │ movs r0, r1 │ │ - b.n b8e2e │ │ + b.n b8e3e │ │ movs r0, r1 │ │ - b.n b88cc │ │ + b.n b88dc │ │ str r4, [r0, r0] │ │ - b.n b88d0 │ │ + b.n b88e0 │ │ strh r6, [r0, #0] │ │ - b.n b90fa │ │ + b.n b910a │ │ asrs r4, r0, #22 │ │ - b.n b88fc │ │ + b.n b890c │ │ movs r2, r1 │ │ - b.n b9102 │ │ + b.n b9112 │ │ movs r5, #128 @ 0x80 │ │ - b.n b8904 │ │ + b.n b8914 │ │ ands r4, r1 │ │ - b.n b910a │ │ + b.n b911a │ │ asrs r1, r0, #32 │ │ - b.n b8eec │ │ + b.n b8efc │ │ movs r0, #2 │ │ - b.n b8ef0 │ │ + b.n b8f00 │ │ movs r5, r1 │ │ and.w r0, r0, r3 │ │ - b.n b8ef6 │ │ + b.n b8f06 │ │ str r0, [r0, #0] │ │ - b.n b88f8 │ │ + b.n b8908 │ │ movs r0, r1 │ │ - b.n b8e62 │ │ + b.n b8e72 │ │ adds r0, #4 │ │ - b.n b8900 │ │ + b.n b8910 │ │ movs r0, r1 │ │ - b.n b8904 │ │ - add r0, pc, #28 @ (adr r0, b8e08 ) │ │ - b.n b912e │ │ + b.n b8914 │ │ + add r0, pc, #28 @ (adr r0, b8e18 ) │ │ + b.n b913e │ │ asrs r0, r7, #20 │ │ - b.n b8930 │ │ + b.n b8940 │ │ strb r0, [r1, #0] │ │ - b.n b9136 │ │ + b.n b9146 │ │ movs r5, #52 @ 0x34 │ │ - b.n b8938 │ │ + b.n b8948 │ │ strh r6, [r0, #0] │ │ - b.n b913e │ │ + b.n b914e │ │ asrs r1, r0, #32 │ │ - b.n b8f20 │ │ + b.n b8f30 │ │ movs r2, r1 │ │ - b.n b9146 │ │ + b.n b9156 │ │ movs r0, #2 │ │ - b.n b8f28 │ │ + b.n b8f38 │ │ ands r4, r1 │ │ - b.n b914e │ │ + b.n b915e │ │ adds r0, #9 │ │ - b.n b9152 │ │ + b.n b9162 │ │ @ instruction: 0xff89eaff │ │ lsls r4, r0, #1 │ │ - b.n b893c │ │ + b.n b894c │ │ asrs r0, r2, #32 │ │ - b.n b8942 │ │ + b.n b8952 │ │ movs r0, r0 │ │ - b.n b90c4 │ │ + b.n b90d4 │ │ ldc2l 10, cr0, [r2, #1020]! @ 0x3fc @ │ │ asrs r4, r1, #20 │ │ - b.n b8968 │ │ + b.n b8978 │ │ movs r2, r1 │ │ - b.n b916e │ │ + b.n b917e │ │ movs r0, #6 │ │ - b.n b9172 │ │ + b.n b9182 │ │ asrs r1, r0, #32 │ │ - b.n b8f54 │ │ + b.n b8f64 │ │ lsls r5, r2, #5 │ │ @ instruction: 0xeb00e028 │ │ - b.n b8978 │ │ + b.n b8988 │ │ movs r0, #44 @ 0x2c │ │ - b.n b897c │ │ + b.n b898c │ │ stc2l 10, cr14, [sl, #1020]! @ 0x3fc @ │ │ lsls r4, r0, #1 │ │ - b.n b8984 │ │ + b.n b8994 │ │ movs r0, #6 │ │ - b.n b918e │ │ + b.n b919e │ │ movs r0, r0 │ │ - b.n b896c │ │ + b.n b897c │ │ movs r2, r1 │ │ - b.n b9196 │ │ + b.n b91a6 │ │ asrs r0, r3, #19 │ │ - b.n b8998 │ │ + b.n b89a8 │ │ adds r0, #76 @ 0x4c │ │ - b.n b8998 │ │ + b.n b89a8 │ │ asrs r1, r0, #32 │ │ - b.n b8f80 │ │ - bf 14, c4662 │ │ - b.n b8eb8 │ │ - b.n b89a4 │ │ + b.n b8f90 │ │ + bf 14, c4672 │ │ + b.n b8ec8 │ │ + b.n b89b4 │ │ asrs r4, r6, #30 │ │ - b.n b947e │ │ + b.n b948e │ │ movs r0, #44 @ 0x2c │ │ - b.n b89ac │ │ + b.n b89bc │ │ subs r7, r7, #7 │ │ - b.n b9514 │ │ + b.n b9524 │ │ lsls r6, r6, #2 │ │ - b.n b9222 │ │ + b.n b9232 │ │ asrs r0, r3, #32 │ │ - b.n b8998 │ │ - stc2l 10, cr14, [pc, #1020] @ b927c @ │ │ + b.n b89a8 │ │ + stc2l 10, cr14, [pc, #1020] @ b928c @ │ │ lsls r0, r4, #1 │ │ - b.n b93a0 │ │ + b.n b93b0 │ │ asrs r2, r6, #1 │ │ - b.n b93a4 │ │ + b.n b93b4 │ │ movs r0, #255 @ 0xff │ │ - b.n b95ce │ │ - b.n b87de │ │ + b.n b95de │ │ + b.n b87ee │ │ @ instruction: 0xebff100c │ │ - b.n b89d0 │ │ + b.n b89e0 │ │ strb r0, [r0, #0] │ │ - b.n b91da │ │ + b.n b91ea │ │ lsls r0, r5, #1 │ │ - b.n b93b8 │ │ + b.n b93c8 │ │ movs r0, #255 @ 0xff │ │ - b.n b95e2 │ │ - b.n b87e8 │ │ + b.n b95f2 │ │ + b.n b87f8 │ │ @ instruction: 0xebff0000 │ │ - b.n b89c4 │ │ + b.n b89d4 │ │ movs r2, r1 │ │ - b.n b91ee │ │ + b.n b91fe │ │ asrs r4, r4, #17 │ │ - b.n b89f0 │ │ + b.n b8a00 │ │ adds r0, #7 │ │ - b.n b91f6 │ │ + b.n b9206 │ │ movs r0, #9 │ │ - b.n b91fa │ │ + b.n b920a │ │ strb r0, [r7, #0] │ │ - b.n b89f8 │ │ + b.n b8a08 │ │ asrs r1, r0, #32 │ │ - b.n b8fe0 │ │ - bfcsel 14, b86c2 , 18, gt │ │ + b.n b8ff0 │ │ + bfcsel 14, b86d2 , 18, gt │ │ stmia r0!, {r2, r3, r6} │ │ - b.n b8a04 │ │ + b.n b8a14 │ │ lsls r4, r6, #30 │ │ - b.n b94de │ │ - b.n b8f20 │ │ - b.n b8a0c │ │ + b.n b94ee │ │ + b.n b8f30 │ │ + b.n b8a1c │ │ lsrs r7, r7, #31 │ │ - b.n b9574 │ │ + b.n b9584 │ │ movs r0, #44 @ 0x2c │ │ - b.n b8a14 │ │ + b.n b8a24 │ │ movs r0, r3 │ │ - b.n b89f8 │ │ + b.n b8a08 │ │ ldc2 10, cr14, [r9, #-1020]! @ 0xfffffc04 @ │ │ asrs r4, r5, #32 │ │ - b.n b8a20 │ │ + b.n b8a30 │ │ movs r6, r3 │ │ subs r2, #0 │ │ lsrs r4, r3 │ │ - b.n b9270 │ │ + b.n b9280 │ │ movs r0, #1 │ │ - b.n b9232 │ │ - b.n b8f44 │ │ - b.n b8a30 │ │ + b.n b9242 │ │ + b.n b8f54 │ │ + b.n b8a40 │ │ asrs r4, r0, #1 │ │ - b.n b8a22 │ │ + b.n b8a32 │ │ movs r1, r0 │ │ - b.n b91a8 │ │ + b.n b91b8 │ │ ldc2l 10, cr0, [r7, #1020] @ 0x3fc @ │ │ asrs r0, r7, #16 │ │ - b.n b8a44 │ │ + b.n b8a54 │ │ movs r0, #12 │ │ - b.n b924a │ │ + b.n b925a │ │ adds r0, #6 │ │ - b.n b924e │ │ + b.n b925e │ │ asrs r1, r0, #32 │ │ - b.n b9030 │ │ + b.n b9040 │ │ lsls r6, r3, #4 │ │ @ instruction: 0xeb00e028 │ │ - b.n b8a54 │ │ + b.n b8a64 │ │ movs r0, #44 @ 0x2c │ │ - b.n b8a58 │ │ - stc2l 10, cr14, [pc, #1020] @ b931c @ │ │ + b.n b8a68 │ │ + stc2l 10, cr14, [pc, #1020] @ b932c @ │ │ asrs r0, r6, #16 │ │ - b.n b8a64 │ │ + b.n b8a74 │ │ movs r2, r1 │ │ - b.n b926a │ │ + b.n b927a │ │ movs r0, #5 │ │ - b.n b926e │ │ + b.n b927e │ │ asrs r1, r0, #32 │ │ - b.n b9050 │ │ + b.n b9060 │ │ vpmin.u16 q7, q12, │ │ movs r6, r0 │ │ - b.n b8ade │ │ + b.n b8aee │ │ movs r0, r1 │ │ - b.n b955e │ │ + b.n b956e │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n b8a6a │ │ + b.n b8a7a │ │ lsls r0, r2, #11 │ │ - b.n b92ca │ │ + b.n b92da │ │ movs r1, r0 │ │ - b.n b926e │ │ + b.n b927e │ │ movs r7, r1 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #1 │ │ - b.n b8a90 │ │ + b.n b8aa0 │ │ stmia r0!, {r2} │ │ - b.n b929a │ │ - add r0, pc, #64 @ (adr r0, b8f9c ) │ │ - b.n b8a98 │ │ + b.n b92aa │ │ + add r0, pc, #64 @ (adr r0, b8fac ) │ │ + b.n b8aa8 │ │ asrs r4, r0, #1 │ │ - b.n b8a7c │ │ + b.n b8a8c │ │ stc2l 10, cr14, [r0, #1020] @ 0x3fc @ │ │ asrs r0, r2, #15 │ │ - b.n b8aa8 │ │ + b.n b8ab8 │ │ movs r0, #12 │ │ - b.n b92ae │ │ + b.n b92be │ │ adds r0, #6 │ │ - b.n b92b2 │ │ + b.n b92c2 │ │ asrs r1, r0, #32 │ │ - b.n b9094 │ │ - bfcsel 14, b9776 , 18, ne │ │ + b.n b90a4 │ │ + bfcsel 14, b9786 , 18, ne │ │ lsls r4, r6, #30 │ │ - b.n b958e │ │ + b.n b959e │ │ movs r0, #44 @ 0x2c │ │ - b.n b8abc │ │ + b.n b8acc │ │ lsrs r7, r7, #31 │ │ - b.n b9624 │ │ - b.n b8fd8 │ │ - b.n b8ac4 │ │ + b.n b9634 │ │ + b.n b8fe8 │ │ + b.n b8ad4 │ │ movs r0, r3 │ │ - b.n b8aa8 │ │ + b.n b8ab8 │ │ ldc2 10, cr14, [r3, #1020]! @ 0x3fc @ │ │ movs r3, #196 @ 0xc4 │ │ - b.n b8ad4 │ │ + b.n b8ae4 │ │ movs r0, r4 │ │ - b.n b95c6 │ │ + b.n b95d6 │ │ lsls r0, r0, #15 │ │ - b.n b8adc │ │ + b.n b8aec │ │ movs r0, #2 │ │ - b.n b90c0 │ │ + b.n b90d0 │ │ movs r0, r0 │ │ - b.n b90c4 │ │ + b.n b90d4 │ │ movs r0, #0 │ │ lsls r0, r4, #6 │ │ movs r0, r2 │ │ - b.n b8ae8 │ │ + b.n b8af8 │ │ asrs r0, r6, #14 │ │ - b.n b8af0 │ │ + b.n b8b00 │ │ asrs r1, r0, #32 │ │ - b.n b90d4 │ │ + b.n b90e4 │ │ @ instruction: 0xf4f6ebff │ │ - b.n b900c │ │ - b.n b8af8 │ │ + b.n b901c │ │ + b.n b8b08 │ │ lsls r4, r6, #30 │ │ - b.n b95d2 │ │ + b.n b95e2 │ │ movs r0, #44 @ 0x2c │ │ - b.n b8b00 │ │ + b.n b8b10 │ │ lsrs r7, r7, #31 │ │ - b.n b9668 │ │ + b.n b9678 │ │ movs r0, r3 │ │ - b.n b8ae8 │ │ + b.n b8af8 │ │ @ instruction: 0xffdfeaff │ │ asrs r0, r0, #32 │ │ - b.n b8af0 │ │ + b.n b8b00 │ │ movs r2, r1 │ │ - b.n b931a │ │ + b.n b932a │ │ asrs r0, r4, #12 │ │ - b.n b8b1c │ │ + b.n b8b2c │ │ movs r0, #14 │ │ - b.n b9322 │ │ + b.n b9332 │ │ str r4, [r1, r0] │ │ - b.n b9326 │ │ + b.n b9336 │ │ asrs r1, r0, #32 │ │ - b.n b9108 │ │ + b.n b9118 │ │ @ instruction: 0xf4e9ebff │ │ lsls r4, r6, #30 │ │ - b.n b9602 │ │ + b.n b9612 │ │ stmia r0!, {r0, r2} │ │ - b.n b9336 │ │ + b.n b9346 │ │ lsrs r7, r7, #31 │ │ - b.n b9698 │ │ - b.n b904c │ │ - b.n b8b38 │ │ + b.n b96a8 │ │ + b.n b905c │ │ + b.n b8b48 │ │ movs r0, #44 @ 0x2c │ │ - b.n b8b3c │ │ + b.n b8b4c │ │ movs r0, r3 │ │ - b.n b8b20 │ │ + b.n b8b30 │ │ ldc2 10, cr14, [r3, #-1020]! @ 0xfffffc04 @ │ │ asrs r0, r5, #10 │ │ - b.n b8b4c │ │ + b.n b8b5c │ │ movs r2, r1 │ │ - b.n b9352 │ │ + b.n b9362 │ │ asrs r1, r0, #32 │ │ - b.n b9134 │ │ - bf 12, b7816 │ │ + b.n b9144 │ │ + bf 12, b7826 │ │ str r7, [sp, #720] @ 0x2d0 │ │ - b.n b962e │ │ + b.n b963e │ │ ldr r7, [sp, #1020] @ 0x3fc │ │ - b.n b96c0 │ │ + b.n b96d0 │ │ stc2 10, cr14, [r7], #1020 @ 0x3fc @ │ │ - subs r6, #52 @ 0x34 │ │ + subs r5, #246 @ 0xf6 │ │ vcgt.s16 d20, d8, #0 │ │ - b.n b8b5e │ │ + b.n b8b6e │ │ asrs r0, r5, #10 │ │ - b.n b8b70 │ │ + b.n b8b80 │ │ movs r4, r2 │ │ - b.n b94be │ │ + b.n b94ce │ │ movs r0, r0 │ │ - b.n b8b54 │ │ + b.n b8b64 │ │ movs r2, r1 │ │ - b.n b937e │ │ + b.n b938e │ │ asrs r1, r0, #32 │ │ - b.n b9160 │ │ + b.n b9170 │ │ movs r0, #6 │ │ - b.n b9386 │ │ - bf 12, ab846 │ │ + b.n b9396 │ │ + bf 12, ab856 │ │ movs r0, #44 @ 0x2c │ │ - b.n b8b88 │ │ + b.n b8b98 │ │ str r7, [sp, #720] @ 0x2d0 │ │ - b.n b9662 │ │ + b.n b9672 │ │ str r4, [r7, #8] │ │ - b.n b940a │ │ + b.n b941a │ │ ldr r7, [sp, #1020] @ 0x3fc │ │ - b.n b96f8 │ │ + b.n b9708 │ │ ands r0, r1 │ │ - b.n b8b8e │ │ + b.n b8b9e │ │ mrrc2 10, 15, lr, sp, cr15 │ │ asrs r0, r1, #9 │ │ - b.n b8ba4 │ │ + b.n b8bb4 │ │ movs r2, r1 │ │ - b.n b93aa │ │ + b.n b93ba │ │ asrs r1, r0, #32 │ │ - b.n b918c │ │ - bf 12, c186e │ │ + b.n b919c │ │ + bf 12, c187e │ │ movs r4, r5 │ │ - b.n b8bb0 │ │ + b.n b8bc0 │ │ str r7, [sp, #720] @ 0x2d0 │ │ - b.n b968a │ │ + b.n b969a │ │ ldr r7, [sp, #1020] @ 0x3fc │ │ - b.n b971c │ │ + b.n b972c │ │ @ instruction: 0xfbd0eaff │ │ asrs r4, r5, #8 │ │ - b.n b8bc4 │ │ + b.n b8bd4 │ │ movs r2, r1 │ │ - b.n b93ca │ │ + b.n b93da │ │ adds r0, #7 │ │ - b.n b93ce │ │ + b.n b93de │ │ asrs r1, r0, #32 │ │ - b.n b91b0 │ │ - bfcsel 12, b8892 , 16, │ │ + b.n b91c0 │ │ + bfcsel 12, b88a2 , 16, │ │ str r4, [r5, #0] │ │ - b.n b8bd4 │ │ + b.n b8be4 │ │ str r7, [sp, #720] @ 0x2d0 │ │ - b.n b96ae │ │ + b.n b96be │ │ asrs r2, r1, #32 │ │ - b.n b8c56 │ │ + b.n b8c66 │ │ ldr r7, [sp, #1020] @ 0x3fc │ │ - b.n b9744 │ │ + b.n b9754 │ │ @ instruction: 0xfbf9eaff │ │ - str r3, [r2, r3] │ │ - vqrdmlah.s , , d12[0] │ │ - vcge.f16 d19, d31, #0 │ │ - vmlsl.u , d21, d26[0] │ │ + strh r3, [r0, r0] │ │ + @ instruction: 0xfff51f21 │ │ + vcge.f16 d19, d15, #0 │ │ + vmlsl.u , d21, d10[0] │ │ vcgt.s16 d17, d4, #0 │ │ - b.n b8c62 │ │ + b.n b8c72 │ │ movs r1, r0 │ │ - b.n b96e4 │ │ + b.n b96f4 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ asrs r0, r2, #32 │ │ - b.n b8bee │ │ + b.n b8bfe │ │ strb r2, [r0, #0] │ │ - b.n b940e │ │ + b.n b941e │ │ movs r0, #32 │ │ - b.n b8bf4 │ │ + b.n b8c04 │ │ asrs r4, r4, #32 │ │ - b.n b8bf8 │ │ + b.n b8c08 │ │ asrs r1, r0, #32 │ │ - b.n b93fe │ │ + b.n b940e │ │ movs r0, #7 │ │ - b.n b941e │ │ + b.n b942e │ │ mcrr2 10, 15, r0, r3, cr15 │ │ asrs r6, r0, #32 │ │ - b.n b8c8a │ │ + b.n b8c9a │ │ movs r0, r1 │ │ - b.n b970c │ │ + b.n b971c │ │ movs r7, r1 │ │ lsrs r0, r0, #8 │ │ lsls r0, r0, #1 │ │ - b.n b9712 │ │ + b.n b9722 │ │ ldc2 10, cr1, [lr], #-1020 @ 0xfffffc04 @ │ │ asrs r4, r1, #32 │ │ - b.n b8c1e │ │ + b.n b8c2e │ │ stmia r0!, {r1} │ │ - b.n b943e │ │ + b.n b944e │ │ movs r0, #0 │ │ - b.n b8c36 │ │ + b.n b8c46 │ │ str r0, [r1, r0] │ │ - b.n b9446 │ │ + b.n b9456 │ │ strb r1, [r1, #0] │ │ - b.n b944a │ │ - b.n b9114 │ │ - b.n b8c42 │ │ + b.n b945a │ │ + b.n b9124 │ │ + b.n b8c52 │ │ strh r0, [r3, #30] │ │ - b.n b9494 │ │ + b.n b94a4 │ │ asrs r0, r1, #32 │ │ - b.n b915a │ │ + b.n b916a │ │ movs r0, #9 │ │ - b.n b9176 │ │ + b.n b9186 │ │ asrs r2, r0, #32 │ │ - b.n b9440 │ │ + b.n b9450 │ │ str r0, [sp, #28] │ │ - b.n b9462 │ │ + b.n b9472 │ │ strh r5, [r0, #0] │ │ - b.n b9466 │ │ + b.n b9476 │ │ movs r0, #12 │ │ - b.n b946a │ │ + b.n b947a │ │ ldc2 10, cr0, [r0], #-1020 @ 0xfffffc04 @ │ │ lsls r4, r5, #6 │ │ - b.n b8c70 │ │ + b.n b8c80 │ │ movs r0, r0 │ │ - b.n b97dc │ │ + b.n b97ec │ │ asrs r0, r5, #6 │ │ - b.n b8c78 │ │ + b.n b8c88 │ │ strb r2, [r0, #0] │ │ - b.n b987e │ │ + b.n b988e │ │ movs r1, #164 @ 0xa4 │ │ - b.n b8c80 │ │ + b.n b8c90 │ │ movs r0, r0 │ │ - b.n b9264 │ │ + b.n b9274 │ │ adds r0, #64 @ 0x40 │ │ - b.n b8c84 │ │ + b.n b8c94 │ │ asrs r1, r0, #32 │ │ - b.n b926c │ │ + b.n b927c │ │ movs r0, #2 │ │ - b.n b9270 │ │ + b.n b9280 │ │ strb r1, [r0, #0] │ │ lsls r0, r0, #12 │ │ movs r0, #0 │ │ asrs r0, r4, #6 │ │ movs r2, r1 │ │ - b.n b949e │ │ + b.n b94ae │ │ strb r0, [r0, #0] │ │ - b.n b8c7c │ │ - bfcsel 12, b8962 , 16, cs │ │ + b.n b8c8c │ │ + bfcsel 12, b8972 , 16, cs │ │ movs r0, #44 @ 0x2c │ │ - b.n b8ca4 │ │ + b.n b8cb4 │ │ str r7, [sp, #720] @ 0x2d0 │ │ - b.n b977e │ │ + b.n b978e │ │ lsls r2, r7, #2 │ │ - b.n b9526 │ │ + b.n b9536 │ │ ldr r7, [sp, #1020] @ 0x3fc │ │ - b.n b9814 │ │ + b.n b9824 │ │ ldc2 10, cr14, [sp], {255} @ 0xff @ │ │ - movs r2, #150 @ 0x96 │ │ + movs r2, #189 @ 0xbd │ │ vsra.u32 q8, q10, #11 │ │ - b.n b8cc0 │ │ + b.n b8cd0 │ │ stmia r0!, {} │ │ - b.n b98c6 │ │ + b.n b98d6 │ │ movs r0, r0 │ │ - b.n b92a8 │ │ + b.n b92b8 │ │ movs r4, r3 │ │ - b.n b8ca8 │ │ + b.n b8cb8 │ │ mcrr2 10, 15, lr, r8, cr15 │ │ asrs r4, r2, #5 │ │ - b.n b8cd4 │ │ + b.n b8ce4 │ │ movs r2, r1 │ │ - b.n b94da │ │ + b.n b94ea │ │ asrs r1, r0, #32 │ │ - b.n b92bc │ │ + b.n b92cc │ │ movs r5, r0 │ │ and.w r0, r0, r8, lsr #32 │ │ - b.n b8cc0 │ │ + b.n b8cd0 │ │ mcrr2 10, 15, lr, r5, cr15 │ │ asrs r0, r0, #5 │ │ - b.n b8cec │ │ + b.n b8cfc │ │ movs r2, r1 │ │ - b.n b94f2 │ │ + b.n b9502 │ │ movs r0, #14 │ │ - b.n b94f6 │ │ + b.n b9506 │ │ asrs r1, r0, #32 │ │ - b.n b92d8 │ │ + b.n b92e8 │ │ bflx 10, r5 │ │ movs r5, r0 │ │ and.w r1, r0, ip, asr #4 │ │ - b.n b8d04 │ │ - b.n b91c8 │ │ - b.n b8ce4 │ │ + b.n b8d14 │ │ + b.n b91d8 │ │ + b.n b8cf4 │ │ asrs r1, r0, #32 │ │ - b.n b92ec │ │ + b.n b92fc │ │ adds r0, #64 @ 0x40 │ │ - b.n b8d0c │ │ + b.n b8d1c │ │ movs r2, r1 │ │ - b.n b9516 │ │ + b.n b9526 │ │ bfx 10, lr │ │ - b.n b922c │ │ - b.n b8d18 │ │ + b.n b923c │ │ + b.n b8d28 │ │ str r7, [sp, #720] @ 0x2d0 │ │ - b.n b97f2 │ │ + b.n b9802 │ │ adds r0, #44 @ 0x2c │ │ - b.n b8d20 │ │ + b.n b8d30 │ │ ldr r7, [sp, #1020] @ 0x3fc │ │ - b.n b9888 │ │ + b.n b9898 │ │ stc2 10, cr14, [r5], #-1020 @ 0xfffffc04 @ │ │ asrs r4, r4, #3 │ │ - b.n b8d30 │ │ + b.n b8d40 │ │ asrs r1, r0, #32 │ │ - b.n b9314 │ │ + b.n b9324 │ │ movs r0, r2 │ │ - b.n b8d1e │ │ + b.n b8d2e │ │ movs r0, #176 @ 0xb0 │ │ - b.n b959e │ │ + b.n b95ae │ │ movs r2, r1 │ │ - b.n b9542 │ │ + b.n b9552 │ │ bfx 10, r3 │ │ movs r0, #44 @ 0x2c │ │ - b.n b8d44 │ │ + b.n b8d54 │ │ str r7, [sp, #720] @ 0x2d0 │ │ - b.n b981e │ │ + b.n b982e │ │ ldr r7, [sp, #1020] @ 0x3fc │ │ - b.n b98b0 │ │ + b.n b98c0 │ │ @ instruction: 0xfbe6eaff │ │ - lsrs r7, r5, #25 │ │ + lsrs r1, r1, #22 │ │ vcge.s16 d17, d28, #0 │ │ - b.n b8d5c │ │ + b.n b8d6c │ │ movs r0, #172 @ 0xac │ │ - b.n b8d60 │ │ + b.n b8d70 │ │ lsls r0, r6, #2 │ │ - b.n b95c6 │ │ + b.n b95d6 │ │ asrs r1, r0, #32 │ │ - b.n b9348 │ │ + b.n b9358 │ │ adds r0, #164 @ 0xa4 │ │ - b.n b8d6c │ │ + b.n b8d7c │ │ movs r0, #2 │ │ - b.n b9350 │ │ + b.n b9360 │ │ movs r0, r0 │ │ - b.n b8d50 │ │ + b.n b8d60 │ │ movs r2, r1 │ │ - b.n b957a │ │ + b.n b958a │ │ adds r0, #3 │ │ - b.n b935c │ │ - bf 10, ada3e │ │ + b.n b936c │ │ + bf 10, ada4e │ │ movs r0, #44 @ 0x2c │ │ - b.n b8d80 │ │ + b.n b8d90 │ │ str r7, [sp, #720] @ 0x2d0 │ │ - b.n b985a │ │ + b.n b986a │ │ ldr r7, [sp, #1020] @ 0x3fc │ │ - b.n b98ec │ │ + b.n b98fc │ │ @ instruction: 0xfbd4eaff │ │ movs r0, r2 │ │ - b.n b8d78 │ │ + b.n b8d88 │ │ asrs r0, r4, #1 │ │ - b.n b8d98 │ │ + b.n b8da8 │ │ movs r0, #96 @ 0x60 │ │ - b.n b8d9c │ │ + b.n b8dac │ │ lsls r0, r6, #2 │ │ - b.n b9602 │ │ + b.n b9612 │ │ asrs r1, r0, #32 │ │ - b.n b9384 │ │ + b.n b9394 │ │ adds r0, #88 @ 0x58 │ │ - b.n b8da8 │ │ + b.n b8db8 │ │ movs r0, #2 │ │ - b.n b938c │ │ + b.n b939c │ │ movs r0, r0 │ │ - b.n b8d8c │ │ + b.n b8d9c │ │ movs r2, r1 │ │ - b.n b95b6 │ │ + b.n b95c6 │ │ adds r0, #3 │ │ - b.n b9398 │ │ - bf 10, bea7a │ │ + b.n b93a8 │ │ + bf 10, bea8a │ │ asrs r4, r5, #32 │ │ - b.n b8dbc │ │ + b.n b8dcc │ │ str r7, [sp, #720] @ 0x2d0 │ │ - b.n b9896 │ │ + b.n b98a6 │ │ ldr r7, [sp, #1020] @ 0x3fc │ │ - b.n b9928 │ │ + b.n b9938 │ │ @ instruction: 0xfb8deaff │ │ asrs r4, r6, #32 │ │ - b.n b8dd0 │ │ + b.n b8de0 │ │ movs r2, r1 │ │ - b.n b95d6 │ │ + b.n b95e6 │ │ movs r0, #6 │ │ - b.n b95da │ │ + b.n b95ea │ │ asrs r1, r0, #32 │ │ - b.n b93bc │ │ - bfcsel 10, b9a9e , 12, │ │ + b.n b93cc │ │ + bfcsel 10, b9aae , 12, │ │ asrs r4, r5, #32 │ │ - b.n b8de0 │ │ + b.n b8df0 │ │ str r7, [sp, #720] @ 0x2d0 │ │ - b.n b98ba │ │ + b.n b98ca │ │ ldr r7, [sp, #1020] @ 0x3fc │ │ - b.n b994c │ │ + b.n b995c │ │ @ instruction: 0xfb88eaff │ │ - ldrsh r2, [r1, r5] │ │ - vcge.s16 , q8, #0 │ │ - vcle.f16 d18, d23, #0 │ │ - @ instruction: 0xfff50d24 │ │ - vcle.f16 q9, q4, #0 │ │ - @ instruction: 0xfff55fdb │ │ - vrsra.u32 d18, d18, #11 │ │ - vqrdmulh.s q8, , d16[0] │ │ - vqshlu.s32 d21, d26, #21 │ │ - vsli.64 q9, q15, #53 @ 0x35 │ │ - vqshlu.s64 , q3, #53 @ 0x35 │ │ - vsra.u64 d18, d20, #11 │ │ - vsli.32 d20, d14, #21 │ │ - vqrdmlsh.s , , d5[0] │ │ - vshr.u32 d23, d11, #12 │ │ - vcge.s16 d18, d9, #0 │ │ - vceq.f16 d16, d18, #0 │ │ - vshr.u32 d20, d29, #11 │ │ + str r1, [r1, #12] │ │ + vshr.u64 , q0, #11 │ │ + vcle.f16 d18, d7, #0 │ │ + @ instruction: 0xfff50df9 │ │ + vcle.f16 d18, d24, #0 │ │ + vceq.i16 d22, d1, #0 │ │ + vrsra.u32 d18, d2, #11 │ │ + vcvt.f32.u32 d16, d21, #11 │ │ + vtbl.8 d21, {d5}, d9 │ │ + vsli.64 q9, q7, #53 @ 0x35 │ │ + vmlsl.u , d21, d27[0] │ │ + vshr.u64 q9, , #11 │ │ + vcle.f16 q10, , #0 │ │ + vcvt.f32.u32 , , #11 │ │ + vrev64.16 d23, d11 │ │ + vqrdmlsh.s , , d8[0] │ │ + vsli.64 q8, , #53 @ 0x35 │ │ + vceq.i16 q10, , #0 │ │ vrshr.u64 q8, q0, #11 │ │ movs r0, r0 │ │ - ldr r5, [r5, #44] @ 0x2c │ │ - @ instruction: 0xfff50c96 │ │ - @ instruction: 0xfff56ef5 │ │ - vneg.s16 , │ │ - vclt.f16 q11, , #0 │ │ - vrshr.u32 , , #11 │ │ - vcvt.u32.f32 d21, d18, #11 │ │ - vqrdmulh.s q10, , d7[0] │ │ - vcgt.f16 d23, d31, #0 │ │ - vqrdmlsh.s q10, , d9[0] │ │ - vqdmulh.s q9, , d4[0] │ │ - vqrdmlah.s q8, , d16[0] │ │ - vcge.f16 d22, d5, #0 │ │ - vcle.s16 , q6, #0 │ │ - vcvt.f16.u16 , q5, #11 │ │ - vsri.32 d18, d27, #12 │ │ - vcgt.s16 , , #0 │ │ - vclt.s16 d21, d30, #0 │ │ - vsri.64 d22, d25, #11 │ │ - vcvt.f32.u32 d21, d16, #11 │ │ - vclt.f16 q8, q5, #0 │ │ - vshr.u64 q11, , #11 │ │ - vqrdmlsh.s q9, , d11[0] │ │ - vneg.f16 q8, │ │ - vqshlu.s32 q9, , #21 │ │ - vtbx.8 d21, {d21}, d6 │ │ - vmlsl.u q10, d21, d9[0] │ │ - vcvt.u16.f16 q11, , #11 │ │ - vtbl.8 d16, {d21-d22}, d5 │ │ - vtbx.8 d17, {d21-d24}, d2 │ │ - vqshlu.s64 d17, d26, #53 @ 0x35 │ │ - vshr.u64 d17, d2, #11 │ │ - vneg.s16 d20, d1 │ │ - vsli.32 q9, q2, #21 │ │ - vtbl.8 d18, {d21-d24}, d25 │ │ - vtbl.8 d22, {d5}, d27 │ │ - vqrdmulh.s , , d26[0] │ │ + ldr r3, [r6, #52] @ 0x34 │ │ + vcvt.u16.f16 q8, , #11 │ │ + vcvt.u32.f32 d22, d21, #11 │ │ + vcge.f16 , q0, #0 │ │ + vqshl.u64 d22, d1, #53 @ 0x35 │ │ + vrshr.u32 d19, d19, #11 │ │ + vshr.u64 d22, d20, #11 │ │ + @ instruction: 0xfff54eab │ │ + vsri.32 d23, d15, #11 │ │ + vcge.s16 d21, d29, #0 │ │ + vdup.8 d18, d3[2] │ │ + @ instruction: 0xfff50fb3 │ │ + vcle.f16 d22, d27, #0 │ │ + vsubl.u , d21, d17 │ │ + @ instruction: 0xfff5fb95 │ │ + vrsra.u32 q9, q13, #12 │ │ + vceq.i16 , q1, #0 │ │ + vrshr.u64 d21, d19, #11 │ │ + vsli.64 q11, , #53 @ 0x35 │ │ + @ instruction: 0xfff55fb2 │ │ + vcle.f16 d16, d5, #0 │ │ + vrshr.u32 q11, , #11 │ │ + @ instruction: 0xfff52f80 │ │ + @ instruction: 0xfff50896 │ │ + vqshlu.s32 d18, d19, #21 │ │ + @ instruction: 0xfff55a95 │ │ + vqshl.u64 d20, d6, #53 @ 0x35 │ │ + @ instruction: 0xfff56dd9 │ │ + @ instruction: 0xfff509b6 │ │ + vtbx.8 d17, {d21-d24}, d25 │ │ + vneg.f16 d17, d15 │ │ + vceq.i16 , , #0 │ │ + vrsra.u64 q10, q10, #11 │ │ + vcge.f16 d18, d3, #0 │ │ + vtbl.8 d18, {d21-d24}, d9 │ │ + vqrshrn.u64 d22, , #11 │ │ + vcvt.u16.f16 , , #11 │ │ vcgt.s16 d29, d8, #0 │ │ - b.n b9830 │ │ - ldr r0, [pc, #192] @ (b9458 ) │ │ + b.n b9840 │ │ + ldr r0, [pc, #192] @ (b9468 ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n b98b8 │ │ - beq.n b93e0 │ │ - b.n b983c │ │ + b.n b98c8 │ │ + beq.n b93f0 │ │ + b.n b984c │ │ ands r1, r0 │ │ - b.n b96e6 │ │ + b.n b96f6 │ │ asrs r0, r4, #2 │ │ - b.n b8ee8 │ │ + b.n b8ef8 │ │ str r0, [r0, r0] │ │ - b.n b96ee │ │ + b.n b96fe │ │ movs r0, #8 │ │ - b.n b8ec8 │ │ + b.n b8ed8 │ │ asrs r1, r0, #32 │ │ - b.n b94d4 │ │ + b.n b94e4 │ │ adds r0, #12 │ │ - b.n b8ed0 │ │ + b.n b8ee0 │ │ lsls r2, r3, #1 │ │ - b.n b8f60 │ │ + b.n b8f70 │ │ movs r3, r0 │ │ - b.n b9a62 │ │ + b.n b9a72 │ │ movs r3, r0 │ │ cmp r2, #0 │ │ - beq.n b93d8 │ │ - b.n b9860 │ │ - ldr r0, [pc, #192] @ (b948c ) │ │ + beq.n b93e8 │ │ + b.n b9870 │ │ + ldr r0, [pc, #192] @ (b949c ) │ │ ldmia.w sp!, {r3, ip, lr, pc} │ │ - b.n b98ec │ │ + b.n b98fc │ │ vrhadd.u16 d14, d14, d31 │ │ movs r0, r2 │ │ - b.n b8efc │ │ + b.n b8f0c │ │ movs r5, r0 │ │ - b.n b967e │ │ + b.n b968e │ │ movs r0, r2 │ │ lsrs r0, r0, #8 │ │ movs r2, r1 │ │ - b.n b8f90 │ │ + b.n b8fa0 │ │ str r0, [r2, r0] │ │ - b.n b8eec │ │ + b.n b8efc │ │ asrs r0, r2, #32 │ │ - b.n b9908 │ │ + b.n b9918 │ │ @ instruction: 0xfa32ebff │ │ asrs r0, r3, #1 │ │ - b.n b8f34 │ │ + b.n b8f44 │ │ movs r0, #0 │ │ - b.n b8f24 │ │ + b.n b8f34 │ │ stmia r0!, {r2} │ │ - b.n b8f28 │ │ + b.n b8f38 │ │ asrs r1, r0, #32 │ │ - b.n b9520 │ │ + b.n b9530 │ │ str r0, [r2, r0] │ │ - b.n b8f30 │ │ + b.n b8f40 │ │ adds r0, #72 @ 0x48 │ │ - b.n b8f48 │ │ + b.n b8f58 │ │ movs r1, r4 │ │ stmia.w sp, {r0, r1} │ │ - b.n b9b52 │ │ + b.n b9b62 │ │ adds r0, #3 │ │ - b.n b9534 │ │ + b.n b9544 │ │ movs r0, #8 │ │ - b.n b8f34 │ │ + b.n b8f44 │ │ movs r0, #0 │ │ - b.n b9b5e │ │ + b.n b9b6e │ │ stmia r0!, {r2, r3} │ │ - b.n b8f3c │ │ - strh r0, [r0, #60] @ 0x3c │ │ + b.n b8f4c │ │ + strh r7, [r7, #58] @ 0x3a │ │ @ instruction: 0xebff102c │ │ - b.n b8f68 │ │ + b.n b8f78 │ │ movs r0, r1 │ │ - b.n b9944 │ │ + b.n b9954 │ │ movs r0, r2 │ │ - b.n b8f4c │ │ + b.n b8f5c │ │ movs r0, #0 │ │ - b.n b9b76 │ │ + b.n b9b86 │ │ asrs r1, r0, #32 │ │ - b.n b9558 │ │ + b.n b9568 │ │ movs r0, r0 │ │ - b.n b8f58 │ │ + b.n b8f68 │ │ movs r3, r0 │ │ - b.n b9b82 │ │ + b.n b9b92 │ │ adds r0, #4 │ │ - b.n b9786 │ │ + b.n b9796 │ │ @ instruction: 0xfa56ebff │ │ @ instruction: 0xffddeaff │ │ - strb r0, [r3, r2] │ │ + strb r0, [r5, r2] │ │ movs r2, r0 │ │ - lsls r6, r3, #12 │ │ - vrsra.u32 d16, d3, #11 │ │ - vmlal.u q8, d21, d22[0] │ │ + lsls r1, r6, #15 │ │ + vneg.s16 q8, q11 │ │ + vrsra.u64 d16, d25, #11 │ │ vcgt.s16 d18, d4, #0 │ │ - b.n b8f82 │ │ + b.n b8f92 │ │ stmia r0!, {} │ │ - b.n b9c26 │ │ + b.n b9c36 │ │ adds r0, #4 │ │ - b.n b8f8c │ │ + b.n b8f9c │ │ movs r3, r0 │ │ - b.n b9712 │ │ + b.n b9722 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r1 │ │ - b.n b97b6 │ │ + b.n b97c6 │ │ vrhadd.u16 d14, d14, d31 │ │ - ldr r0, [pc, #0] @ (b947c ) │ │ + ldr r0, [pc, #0] @ (b948c ) │ │ stmdb sp!, {r0, r2, r3, ip, sp, pc} │ │ - b.n b97c2 │ │ + b.n b97d2 │ │ asrs r0, r0, #32 │ │ - b.n b8fa8 │ │ + b.n b8fb8 │ │ movs r0, r0 │ │ - b.n b8faa │ │ + b.n b8fba │ │ movs r1, #21 │ │ @ instruction: 0xeb00c001 │ │ - b.n b9912 │ │ - ldr r0, [pc, #0] @ (b9494 ) │ │ + b.n b9922 │ │ + ldr r0, [pc, #0] @ (b94a4 ) │ │ ldmia.w sp!, {r2, r3} │ │ - b.n b97da │ │ + b.n b97ea │ │ vrhadd.u16 d14, d14, d31 │ │ - ldr r7, [pc, #960] @ (b9860 ) │ │ + ldr r7, [pc, #960] @ (b9870 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n b99c0 │ │ - beq.n b94d0 │ │ - b.n b9944 │ │ + b.n b99d0 │ │ + beq.n b94e0 │ │ + b.n b9954 │ │ strb r5, [r2, #3] │ │ - b.n b9850 │ │ + b.n b9860 │ │ str r1, [r0, r0] │ │ - b.n b97f2 │ │ - add r0, pc, #8 @ (adr r0, b94bc ) │ │ - b.n b97f6 │ │ + b.n b9802 │ │ + add r0, pc, #8 @ (adr r0, b94cc ) │ │ + b.n b9806 │ │ movs r0, #0 │ │ - b.n b9bfa │ │ + b.n b9c0a │ │ movs r0, r1 │ │ - b.n b8fd8 │ │ + b.n b8fe8 │ │ asrs r7, r0, #4 │ │ - b.n b95c4 │ │ + b.n b95d4 │ │ movs r0, #4 │ │ - b.n b9046 │ │ + b.n b9056 │ │ str r4, [r3, #0] │ │ - b.n b8fec │ │ + b.n b8ffc │ │ asrs r2, r7, #2 │ │ - b.n b987a │ │ + b.n b988a │ │ adds r0, #188 @ 0xbc │ │ - b.n b987e │ │ + b.n b988e │ │ ands r1, r0 │ │ - b.n b98d8 │ │ + b.n b98e8 │ │ lsls r3, r4, #2 │ │ - b.n b9782 │ │ + b.n b9792 │ │ movs r2, r6 │ │ cmp r2, #0 │ │ movs r0, r0 │ │ - b.n b9ca2 │ │ + b.n b9cb2 │ │ strh r3, [r4, #4] │ │ - b.n b95e6 │ │ + b.n b95f6 │ │ lsls r3, r4, #2 │ │ - b.n b982a │ │ + b.n b983a │ │ movs r0, r4 │ │ - b.n b9b10 │ │ + b.n b9b20 │ │ movs r4, r0 │ │ - b.n b900c │ │ + b.n b901c │ │ movs r4, r2 │ │ - b.n b9020 │ │ + b.n b9030 │ │ strb r0, [r0, #0] │ │ - b.n b901a │ │ + b.n b902a │ │ movs r0, r6 │ │ subs r0, r0, r0 │ │ str r0, [sp, #80] @ 0x50 │ │ - b.n b9a0e │ │ + b.n b9a1e │ │ str r0, [r1, #0] │ │ - b.n b960e │ │ + b.n b961e │ │ movs r1, r0 │ │ - b.n b9c96 │ │ + b.n b9ca6 │ │ movs r0, r0 │ │ - b.n b9620 │ │ + b.n b9630 │ │ lsls r0, r6, #2 │ │ - b.n b98b2 │ │ + b.n b98c2 │ │ movs r0, r0 │ │ - b.n b9628 │ │ + b.n b9638 │ │ asrs r6, r6, #2 │ │ - b.n b98ba │ │ + b.n b98ca │ │ movs r0, r1 │ │ - b.n b9a1e │ │ + b.n b9a2e │ │ asrs r0, r2, #32 │ │ - b.n b903c │ │ + b.n b904c │ │ asrs r4, r1, #32 │ │ - b.n b9a40 │ │ + b.n b9a50 │ │ movs r4, r1 │ │ - b.n b9044 │ │ + b.n b9054 │ │ movs r2, r1 │ │ - b.n b986e │ │ + b.n b987e │ │ vrhadd.u d14, d7, d31 │ │ asrs r6, r0, #3 │ │ - b.n b9876 │ │ + b.n b9886 │ │ movs r1, r0 │ │ - b.n b9bda │ │ + b.n b9bea │ │ movs r4, r0 │ │ rev r0, r0 │ │ asrs r1, r0, #32 │ │ - b.n b9a44 │ │ + b.n b9a54 │ │ ands r1, r0 │ │ - b.n b9886 │ │ + b.n b9896 │ │ movs r0, r1 │ │ - b.n b97f2 │ │ + b.n b9802 │ │ @ instruction: 0xffecdaff │ │ movs r4, r0 │ │ and.w r0, r0, r1 │ │ - b.n b9c36 │ │ + b.n b9c46 │ │ movs r7, r1 │ │ ldmia r2!, {} │ │ strh r1, [r0, #0] │ │ - b.n b99e0 │ │ + b.n b99f0 │ │ movs r0, r1 │ │ - b.n b980a │ │ + b.n b981a │ │ @ instruction: 0xffe6daff │ │ lsls r5, r2, #3 │ │ - b.n b9914 │ │ + b.n b9924 │ │ movs r0, #4 │ │ - b.n b90a8 │ │ + b.n b90b8 │ │ lsls r0, r0, #2 │ │ - b.n b967c │ │ + b.n b968c │ │ movs r2, r0 │ │ - b.n b9818 │ │ + b.n b9828 │ │ asrs r4, r7, #30 │ │ - b.n b98fa │ │ + b.n b990a │ │ movs r0, r0 │ │ - b.n b9cbe │ │ + b.n b9cce │ │ lsls r1, r0, #2 │ │ sub sp, #36 @ 0x24 │ │ lsls r0, r6, #2 │ │ - cbz r0, b95ba │ │ + cbz r0, b95ca │ │ movs r0, r0 │ │ sub sp, #36 @ 0x24 │ │ asrs r0, r1, #32 │ │ - b.n b90c8 │ │ + b.n b90d8 │ │ movs r0, r0 │ │ - b.n b9094 │ │ - beq.n b95cc │ │ - b.n b9a2c │ │ + b.n b90a4 │ │ + beq.n b95dc │ │ + b.n b9a3c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, sp} │ │ - b.n b90d8 │ │ + b.n b90e8 │ │ movs r1, r0 │ │ - b.n b9ce2 │ │ + b.n b9cf2 │ │ movs r4, r0 │ │ - b.n b912a │ │ + b.n b913a │ │ @ instruction: 0xffeeeaff │ │ movs r0, r1 │ │ - b.n b90e8 │ │ + b.n b90f8 │ │ movs r0, #0 │ │ - b.n b90b2 │ │ + b.n b90c2 │ │ lsls r7, r0, #2 │ │ - b.n b96c0 │ │ + b.n b96d0 │ │ movs r7, #188 @ 0xbc │ │ - b.n b993a │ │ - beq.n b95f4 │ │ - b.n b9a54 │ │ + b.n b994a │ │ + beq.n b9604 │ │ + b.n b9a64 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r4, r5, r7} │ │ - b.n b9972 │ │ + b.n b9982 │ │ movs r0, r2 │ │ - b.n b90e4 │ │ + b.n b90f4 │ │ movs r4, r2 │ │ - b.n b9ada │ │ + b.n b9aea │ │ movs r0, r0 │ │ - b.n b90ec │ │ + b.n b90fc │ │ asrs r0, r1, #32 │ │ - b.n b96de │ │ + b.n b96ee │ │ lsls r0, r7, #2 │ │ - b.n b9986 │ │ + b.n b9996 │ │ movs r0, #0 │ │ - b.n b9118 │ │ + b.n b9128 │ │ str r0, [sp, #772] @ 0x304 │ │ - b.n b9922 │ │ + b.n b9932 │ │ asrs r1, r7, #1 │ │ - b.n b93e4 │ │ + b.n b93f4 │ │ movs r0, #145 @ 0x91 │ │ - b.n b962a │ │ + b.n b963a │ │ asrs r4, r1, #32 │ │ - b.n b9b08 │ │ + b.n b9b18 │ │ movs r4, r1 │ │ - b.n b910c │ │ + b.n b911c │ │ movs r2, r1 │ │ - b.n b9936 │ │ + b.n b9946 │ │ vrhadd.u d14, d7, d31 │ │ movs r1, r0 │ │ - b.n b9c9e │ │ + b.n b9cae │ │ movs r2, r0 │ │ rev r0, r0 │ │ str r0, [sp, #4] │ │ - b.n b9b18 │ │ + b.n b9b28 │ │ ands r1, r1 │ │ - b.n b994a │ │ + b.n b995a │ │ movs r2, r0 │ │ and.w r0, r0, r1 │ │ - b.n b9cf2 │ │ + b.n b9d02 │ │ movs r5, r1 │ │ ldmia r2!, {} │ │ strh r1, [r0, #0] │ │ - b.n b9aac │ │ + b.n b9abc │ │ movs r0, r1 │ │ - b.n b98c6 │ │ + b.n b98d6 │ │ @ instruction: 0xffebdaff │ │ lsls r5, r2, #3 │ │ - b.n b99d0 │ │ + b.n b99e0 │ │ asrs r4, r0, #32 │ │ - b.n b9164 │ │ + b.n b9174 │ │ lsls r0, r0, #2 │ │ - b.n b9738 │ │ + b.n b9748 │ │ movs r1, r0 │ │ - b.n b98e4 │ │ + b.n b98f4 │ │ str r7, [sp, #752] @ 0x2f0 │ │ - b.n b99b6 │ │ + b.n b99c6 │ │ movs r0, r0 │ │ - b.n b9d7a │ │ + b.n b9d8a │ │ movs r0, r0 │ │ - cbz r0, b96b6 │ │ + cbz r0, b96c6 │ │ asrs r0, r1, #32 │ │ - b.n b917c │ │ + b.n b918c │ │ movs r0, r0 │ │ - b.n b9148 │ │ - beq.n b9680 │ │ - b.n b9ae0 │ │ + b.n b9158 │ │ + beq.n b9690 │ │ + b.n b9af0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, ip} │ │ - b.n b918c │ │ + b.n b919c │ │ movs r1, r0 │ │ - b.n b9d96 │ │ + b.n b9da6 │ │ movs r4, r0 │ │ - b.n b91dc │ │ + b.n b91ec │ │ @ instruction: 0xfff0eaff │ │ adds r0, #213 @ 0xd5 │ │ - b.n b9a02 │ │ + b.n b9a12 │ │ movs r7, r2 │ │ - b.n b9d0c │ │ + b.n b9d1c │ │ adds r0, #1 │ │ uxth r3, r0 │ │ adds r0, #5 │ │ push {r6, r7, lr} │ │ adds r0, #115 @ 0x73 │ │ @ instruction: 0xb6af │ │ adds r1, #3 │ │ sub sp, #0 │ │ asrs r4, r3, #32 │ │ push {r0, r1, r7, lr} │ │ asrs r5, r2, #3 │ │ - cbz r0, b96b2 │ │ + cbz r0, b96c2 │ │ lsls r1, r0, #2 │ │ sub sp, #0 │ │ movs r7, #188 @ 0xbc │ │ - cbz r0, b96b6 │ │ + cbz r0, b96c6 │ │ movs r0, r0 │ │ - cbz r0, b96f2 │ │ + cbz r0, b9702 │ │ vrhadd.u16 d11, d14, d31 │ │ movs r0, #0 │ │ - b.n b99d2 │ │ + b.n b99e2 │ │ ldmia r7, {r4, r6, r7} │ │ - b.n b9cb4 │ │ + b.n b9cc4 │ │ adds r0, #4 │ │ - b.n b927e │ │ + b.n b928e │ │ movs r1, r0 │ │ - b.n b9cc4 │ │ + b.n b9cd4 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ movs r0, #24 │ │ - b.n b91c6 │ │ + b.n b91d6 │ │ asrs r4, r6, #2 │ │ - b.n b9a4a │ │ + b.n b9a5a │ │ movs r0, r0 │ │ - b.n b9d52 │ │ + b.n b9d62 │ │ asrs r4, r1, #32 │ │ - b.n b99b4 │ │ + b.n b99c4 │ │ asrs r4, r6, #2 │ │ - b.n b9a36 │ │ + b.n b9a46 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n b9dfe │ │ + b.n b9e0e │ │ asrs r4, r7, #2 │ │ - b.n b91c6 │ │ + b.n b91d6 │ │ movs r0, #4 │ │ - b.n b9bca │ │ + b.n b9bda │ │ movs r2, r0 │ │ and.w r0, r0, r0, lsr #12 │ │ - b.n b91ee │ │ + b.n b91fe │ │ asrs r0, r0, #32 │ │ - b.n b9e12 │ │ + b.n b9e22 │ │ asrs r0, r1, #32 │ │ - b.n b91dc │ │ + b.n b91ec │ │ asrs r1, r0, #32 │ │ - b.n b9bf2 │ │ + b.n b9c02 │ │ asrs r0, r6, #2 │ │ - b.n b9a62 │ │ + b.n b9a72 │ │ movs r4, r1 │ │ - b.n b9202 │ │ + b.n b9212 │ │ asrs r4, r0, #32 │ │ - b.n b9206 │ │ + b.n b9216 │ │ asrs r2, r0, #32 │ │ - b.n b9dec │ │ + b.n b9dfc │ │ asrs r4, r0, #32 │ │ - b.n b91ee │ │ + b.n b91fe │ │ lsls r5, r7, #30 │ │ - b.n b9d02 │ │ + b.n b9d12 │ │ lsrs r7, r7, #31 │ │ - b.n b9d94 │ │ + b.n b9da4 │ │ vrhadd.u16 d14, d14, d31 │ │ - ldr r4, [pc, #448] @ (b98bc ) │ │ + ldr r4, [pc, #448] @ (b98cc ) │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n b9c1c │ │ + b.n b9c2c │ │ movs r0, #213 @ 0xd5 │ │ - b.n b9aa6 │ │ + b.n b9ab6 │ │ asrs r0, r0, #32 │ │ - b.n b9a4a │ │ + b.n b9a5a │ │ movs r4, r1 │ │ - b.n b922e │ │ + b.n b923e │ │ movs r1, #2 │ │ - b.n b9814 │ │ + b.n b9824 │ │ str r0, [r7, #0] │ │ - b.n b9236 │ │ + b.n b9246 │ │ movs r0, #28 │ │ - b.n b923e │ │ + b.n b924e │ │ str r4, [r7, r0] │ │ - b.n b923e │ │ + b.n b924e │ │ adds r0, #0 │ │ - b.n b9246 │ │ + b.n b9256 │ │ ands r4, r0 │ │ - b.n b924a │ │ + b.n b925a │ │ adds r0, #6 │ │ - b.n b9770 │ │ + b.n b9780 │ │ str r5, [r0, r0] │ │ - b.n b9776 │ │ + b.n b9786 │ │ adds r0, #5 │ │ - b.n b9a58 │ │ + b.n b9a68 │ │ movs r7, r1 │ │ subs r0, r0, r0 │ │ negs r0, r0 │ │ - b.n b925a │ │ + b.n b926a │ │ movs r0, r0 │ │ - b.n b9de6 │ │ + b.n b9df6 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ asrs r2, r7, #2 │ │ - b.n b9aea │ │ + b.n b9afa │ │ lsls r0, r0, #1 │ │ - b.n b9d6c │ │ + b.n b9d7c │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ asrs r0, r2, #32 │ │ - b.n b9276 │ │ + b.n b9286 │ │ strh r0, [r7, r0] │ │ - b.n b9276 │ │ + b.n b9286 │ │ movs r4, r0 │ │ - b.n b9a9a │ │ - bfcsel a, b8f5a , e, ls │ │ + b.n b9aaa │ │ + bfcsel a, b8f6a , e, ls │ │ lsls r0, r0, #2 │ │ - b.n b9862 │ │ + b.n b9872 │ │ lsls r0, r0, #4 │ │ - b.n b986e │ │ + b.n b987e │ │ movs r0, r2 │ │ - b.n b928a │ │ + b.n b929a │ │ str r4, [r0, r0] │ │ - b.n b916e │ │ + b.n b917e │ │ movs r0, r0 │ │ - b.n b9eb2 │ │ + b.n b9ec2 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r4, r5, r6, sl, fp, lr} │ │ ldmia.w sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ @ instruction: 0xeaff4ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n b9ca0 │ │ - beq.n b97e0 │ │ - b.n b9c24 │ │ + b.n b9cb0 │ │ + beq.n b97f0 │ │ + b.n b9c34 │ │ ands r2, r0 │ │ - b.n b9ace │ │ + b.n b9ade │ │ movs r0, #186 @ 0xba │ │ - b.n b9b36 │ │ + b.n b9b46 │ │ str r0, [sp, #192] @ 0xc0 │ │ - b.n b9c96 │ │ + b.n b9ca6 │ │ lsls r0, r0, #1 │ │ - b.n b9dbe │ │ + b.n b9dce │ │ lsls r1, r1, #1 │ │ subs r0, r0, r0 │ │ str r1, [r0, r0] │ │ - b.n b9ae2 │ │ - add r0, pc, #0 @ (adr r0, b97a4 ) │ │ - b.n b9ae6 │ │ + b.n b9af2 │ │ + add r0, pc, #0 @ (adr r0, b97b4 ) │ │ + b.n b9af6 │ │ strb r0, [r0, #0] │ │ - b.n b92d2 │ │ + b.n b92e2 │ │ lsls r0, r2, #3 │ │ - b.n b9b40 │ │ + b.n b9b50 │ │ str r4, [r0, #0] │ │ - b.n b92da │ │ + b.n b92ea │ │ adds r0, #0 │ │ - b.n b9864 │ │ + b.n b9874 │ │ adds r0, #1 │ │ - b.n b9966 │ │ + b.n b9976 │ │ lsls r7, r0, #1 │ │ cmp r2, #0 │ │ strb r4, [r1, #0] │ │ - b.n b92ec │ │ + b.n b92fc │ │ lsls r0, r1, #9 │ │ - b.n b92f4 │ │ + b.n b9304 │ │ movs r0, r0 │ │ - b.n b9e6a │ │ + b.n b9e7a │ │ lsls r2, r2, #3 │ │ lsrs r0, r0, #8 │ │ asrs r0, r5, #32 │ │ - b.n b9300 │ │ + b.n b9310 │ │ movs r2, #52 @ 0x34 │ │ - b.n b9304 │ │ + b.n b9314 │ │ movs r1, r0 │ │ - b.n b9a7e │ │ + b.n b9a8e │ │ lsls r1, r1, #3 │ │ ldrh r0, [r0, #16] │ │ asrs r4, r1, #9 │ │ - b.n b9310 │ │ + b.n b9320 │ │ movs r0, #20 │ │ - b.n b9306 │ │ + b.n b9316 │ │ asrs r1, r0, #32 │ │ - b.n b9c6c │ │ + b.n b9c7c │ │ asrs r4, r1, #9 │ │ - b.n b92fc │ │ + b.n b930c │ │ asrs r0, r0, #32 │ │ - b.n b9f32 │ │ + b.n b9f42 │ │ str r0, [r7, #0] │ │ - b.n b9324 │ │ + b.n b9334 │ │ adds r0, #60 @ 0x3c │ │ - b.n b9328 │ │ + b.n b9338 │ │ movs r2, #72 @ 0x48 │ │ - b.n b930c │ │ + b.n b931c │ │ adds r0, #4 │ │ - b.n b9302 │ │ + b.n b9312 │ │ str r0, [r0, #0] │ │ - b.n b9306 │ │ + b.n b9316 │ │ asrs r0, r5, #32 │ │ - b.n b9324 │ │ + b.n b9334 │ │ movs r4, r4 │ │ - b.n b9328 │ │ + b.n b9338 │ │ movs r0, r5 │ │ - b.n b934c │ │ + b.n b935c │ │ movs r0, r0 │ │ - b.n b9eb6 │ │ + b.n b9ec6 │ │ lsls r3, r5, #2 │ │ subs r0, r0, r0 │ │ str r2, [r1, #0] │ │ - b.n b9b5e │ │ + b.n b9b6e │ │ strb r4, [r4, #0] │ │ - b.n b935c │ │ + b.n b936c │ │ lsls r4, r0, #9 │ │ - b.n b9392 │ │ + b.n b93a2 │ │ strh r0, [r2, #0] │ │ - b.n b9352 │ │ + b.n b9362 │ │ movs r0, #212 @ 0xd4 │ │ - b.n b9aae │ │ + b.n b9abe │ │ asrs r1, r0, #32 │ │ - b.n b9d38 │ │ + b.n b9d48 │ │ movs r1, r0 │ │ - b.n b9ada │ │ + b.n b9aea │ │ lsls r5, r0, #3 │ │ subs r2, #0 │ │ asrs r0, r0, #32 │ │ - b.n b933e │ │ + b.n b934e │ │ strh r1, [r0, #8] │ │ - b.n b9742 │ │ + b.n b9752 │ │ lsls r5, r2, #3 │ │ - b.n b9bf0 │ │ + b.n b9c00 │ │ str r0, [r2, #0] │ │ - b.n b9378 │ │ + b.n b9388 │ │ movs r0, r0 │ │ - b.n b9eee │ │ + b.n b9efe │ │ str r0, [sp, #128] @ 0x80 │ │ - b.n b936c │ │ + b.n b937c │ │ movs r0, r2 │ │ lsls r5, r2, #22 │ │ movs r0, r1 │ │ lsls r0, r0, #10 │ │ movs r1, r0 │ │ asrs r0, r0, #9 │ │ asrs r0, r0, #2 │ │ @@ -230637,5874 +230517,5874 @@ │ │ asrs r1, r0, #2 │ │ asrs r0, r0, #2 │ │ asrs r0, r6, #2 │ │ asrs r1, r2, #7 │ │ movs r1, r0 │ │ asrs r0, r0, #2 │ │ asrs r0, r0, #1 │ │ - b.n b93b6 │ │ + b.n b93c6 │ │ asrs r0, r1, #1 │ │ - b.n b93a8 │ │ + b.n b93b8 │ │ str r0, [r0, #0] │ │ - b.n b938a │ │ + b.n b939a │ │ movs r4, #216 @ 0xd8 │ │ - b.n b9c10 │ │ + b.n b9c20 │ │ strh r1, [r0, #0] │ │ - b.n b9db6 │ │ + b.n b9dc6 │ │ str r0, [sp, #0] │ │ - b.n b9ddc │ │ + b.n b9dec │ │ strh r0, [r7, #38] @ 0x26 │ │ - b.n b9c1c │ │ + b.n b9c2c │ │ asrs r4, r0, #32 │ │ - b.n b9bde │ │ + b.n b9bee │ │ lsls r0, r0, #1 │ │ - b.n b93d6 │ │ + b.n b93e6 │ │ movs r0, #8 │ │ - b.n b93c6 │ │ + b.n b93d6 │ │ movs r7, r0 │ │ - b.n b9bea │ │ + b.n b9bfa │ │ @ instruction: 0xef9bebff │ │ movs r0, r4 │ │ - b.n b93ec │ │ + b.n b93fc │ │ lsls r0, r3, #3 │ │ - b.n b9c36 │ │ + b.n b9c46 │ │ str r0, [r2, #0] │ │ - b.n b93c8 │ │ + b.n b93d8 │ │ asrs r4, r0, #32 │ │ - b.n b93cc │ │ + b.n b93dc │ │ movs r0, r0 │ │ - b.n b93d0 │ │ + b.n b93e0 │ │ movs r1, r6 │ │ and.w r0, r0, r8, lsr #3 │ │ - b.n b9c5c │ │ + b.n b9c6c │ │ movs r0, r0 │ │ - b.n b93d6 │ │ + b.n b93e6 │ │ movs r0, r0 │ │ - b.n ba012 │ │ + b.n ba022 │ │ asrs r4, r0, #32 │ │ - b.n b93de │ │ - beq.n b9910 │ │ - b.n b9d70 │ │ + b.n b93ee │ │ + beq.n b9920 │ │ + b.n b9d80 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {} │ │ - b.n b9930 │ │ + b.n b9940 │ │ asrs r1, r0, #32 │ │ - b.n b9932 │ │ + b.n b9942 │ │ movs r1, r0 │ │ - b.n b9c0a │ │ + b.n b9c1a │ │ lsls r0, r5, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, r2 │ │ - b.n b9426 │ │ + b.n b9436 │ │ movs r0, r0 │ │ - b.n b9f96 │ │ + b.n b9fa6 │ │ lsls r5, r3, #2 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, #4] │ │ - b.n b9432 │ │ + b.n b9442 │ │ strb r4, [r3, #4] │ │ - b.n b942e │ │ + b.n b943e │ │ movs r0, r0 │ │ - b.n b9fb4 │ │ + b.n b9fc4 │ │ lsls r5, r7, #2 │ │ lsrs r0, r0, #8 │ │ adds r0, #7 │ │ - b.n b94ba │ │ + b.n b94ca │ │ asrs r0, r1, #32 │ │ - b.n b943e │ │ + b.n b944e │ │ lsls r0, r3, #4 │ │ - b.n b9442 │ │ + b.n b9452 │ │ movs r1, r0 │ │ - b.n b9f40 │ │ + b.n b9f50 │ │ movs r0, #20 │ │ - b.n b944c │ │ + b.n b945c │ │ movs r1, r0 │ │ - b.n b9da2 │ │ + b.n b9db2 │ │ lsls r0, r3, #4 │ │ - b.n b9432 │ │ + b.n b9442 │ │ movs r1, #28 │ │ - b.n b9436 │ │ + b.n b9446 │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ movs r4, r2 │ │ - b.n b9e40 │ │ + b.n b9e50 │ │ asrs r4, r2, #32 │ │ - b.n b9db8 │ │ - ldr r5, [r1, #104] @ 0x68 │ │ - @ instruction: 0xfa000001 │ │ - b.n ba07e │ │ + b.n b9dc8 │ │ + ldr r5, [r7, #96] @ 0x60 │ │ + mla r0, r0, r1, r0 │ │ + b.n ba08e │ │ asrs r4, r0, #32 │ │ - b.n b9c82 │ │ + b.n b9c92 │ │ movs r4, r1 │ │ - b.n b9454 │ │ + b.n b9464 │ │ lsls r0, r0, #1 │ │ - b.n b947e │ │ + b.n b948e │ │ movs r0, #8 │ │ - b.n b946e │ │ + b.n b947e │ │ movs r0, r0 │ │ - b.n ba092 │ │ + b.n ba0a2 │ │ lsls r2, r7, #2 │ │ - b.n b9ce4 │ │ + b.n b9cf4 │ │ movs r7, r0 │ │ - b.n b9c9a │ │ + b.n b9caa │ │ vpadd.i32 q15, , │ │ movs r2, r1 │ │ - b.n b9ca2 │ │ + b.n b9cb2 │ │ asrs r7, r0, #32 │ │ - b.n b9ca6 │ │ + b.n b9cb6 │ │ movs r0, #1 │ │ - b.n ba0aa │ │ + b.n ba0ba │ │ lsls r4, r6, #5 │ │ add.w r0, r0, r0 │ │ - b.n ba012 │ │ + b.n ba022 │ │ lsls r5, r1, #1 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n b94ae │ │ + b.n b94be │ │ str r0, [r1, #4] │ │ - b.n b949e │ │ + b.n b94ae │ │ movs r5, #208 @ 0xd0 │ │ - b.n b9d0e │ │ + b.n b9d1e │ │ movs r1, r0 │ │ - b.n b9eaa │ │ + b.n b9eba │ │ asrs r0, r0, #32 │ │ - b.n b9ed0 │ │ + b.n b9ee0 │ │ lsls r0, r6, #23 │ │ - b.n b9d1a │ │ + b.n b9d2a │ │ lsls r5, r2, #3 │ │ - b.n b9d3c │ │ + b.n b9d4c │ │ lsls r0, r0, #4 │ │ - b.n b9aa0 │ │ + b.n b9ab0 │ │ strb r4, [r3, #0] │ │ - b.n b949a │ │ + b.n b94aa │ │ lsls r0, r3, #3 │ │ - b.n b9d28 │ │ + b.n b9d38 │ │ asrs r4, r1, #1 │ │ - b.n b94c4 │ │ + b.n b94d4 │ │ movs r0, #84 @ 0x54 │ │ - b.n b94da │ │ + b.n b94ea │ │ movs r1, r0 │ │ - b.n b9a2a │ │ + b.n b9a3a │ │ adds r0, #4 │ │ - b.n b9558 │ │ + b.n b9568 │ │ asrs r0, r0, #4 │ │ - b.n b98d6 │ │ + b.n b98e6 │ │ movs r0, r0 │ │ - b.n ba0f6 │ │ + b.n ba106 │ │ movs r1, r0 │ │ - b.n b9fe0 │ │ + b.n b9ff0 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n ba064 │ │ + b.n ba074 │ │ movs r0, r6 │ │ lsrs r0, r0, #8 │ │ stmia r0!, {r2, r4} │ │ - b.n b9ed8 │ │ + b.n b9ee8 │ │ movs r7, r1 │ │ and.w r0, r0, ip, asr #6 │ │ - b.n b94f4 │ │ + b.n b9504 │ │ movs r0, r0 │ │ - b.n ba078 │ │ + b.n ba088 │ │ movs r3, r5 │ │ lsrs r0, r0, #8 │ │ adds r0, #24 │ │ - b.n b9500 │ │ + b.n b9510 │ │ movs r0, #213 @ 0xd5 │ │ - b.n b9d8c │ │ + b.n b9d9c │ │ str r5, [r2, #12] │ │ - b.n b9d8c │ │ + b.n b9d9c │ │ movs r2, r0 │ │ - b.n b9c96 │ │ + b.n b9ca6 │ │ @ instruction: 0xfff7baff │ │ adds r0, #28 │ │ - b.n b9ef8 │ │ + b.n b9f08 │ │ str r2, [r0, #16] │ │ - b.n b991c │ │ + b.n b992c │ │ movs r4, r0 │ │ - b.n b9ca6 │ │ + b.n b9cb6 │ │ strb r2, [r0, #4] │ │ lsls r3, r0, #30 │ │ @ instruction: 0xfff2eaff │ │ asrs r4, r5, #2 │ │ - b.n b9528 │ │ + b.n b9538 │ │ movs r0, r0 │ │ - b.n ba0ac │ │ + b.n ba0bc │ │ movs r6, r3 │ │ lsrs r0, r0, #8 │ │ adds r0, #213 @ 0xd5 │ │ - b.n b9dbc │ │ + b.n b9dcc │ │ str r5, [r2, #12] │ │ - b.n b9db8 │ │ + b.n b9dc8 │ │ movs r3, r0 │ │ - b.n b9cc6 │ │ + b.n b9cd6 │ │ @ instruction: 0xfff8baff │ │ str r4, [r3, #0] │ │ - b.n b9f24 │ │ + b.n b9f34 │ │ movs r1, #3 │ │ - b.n b9952 │ │ + b.n b9962 │ │ movs r4, r0 │ │ - b.n b9cce │ │ + b.n b9cde │ │ @ instruction: 0xfff41aff │ │ movs r0, #186 @ 0xba │ │ - b.n b9de0 │ │ + b.n b9df0 │ │ strb r3, [r0, #4] │ │ - b.n b9942 │ │ + b.n b9952 │ │ movs r2, r0 │ │ - b.n ba05e │ │ + b.n ba06e │ │ adds r0, #24 │ │ asrs r1, r2, #22 │ │ movs r0, r0 │ │ asrs r3, r2, #13 │ │ @ instruction: 0xffee0aff │ │ movs r0, #213 @ 0xd5 │ │ - b.n b9df0 │ │ + b.n b9e00 │ │ movs r0, r0 │ │ - b.n ba0f2 │ │ + b.n ba102 │ │ @ instruction: 0xffeb4aff │ │ movs r0, #213 @ 0xd5 │ │ - b.n b9e00 │ │ + b.n b9e10 │ │ movs r0, #130 @ 0x82 │ │ - b.n b9b5c │ │ + b.n b9b6c │ │ movs r7, #188 @ 0xbc │ │ - b.n b9e02 │ │ + b.n b9e12 │ │ movs r0, #130 @ 0x82 │ │ - b.n b9b7a │ │ + b.n b9b8a │ │ movs r0, #176 @ 0xb0 │ │ - b.n b9e0a │ │ + b.n b9e1a │ │ str r2, [r0, #0] │ │ - b.n b9b82 │ │ + b.n b9b92 │ │ movs r0, #4 │ │ - b.n b961a │ │ + b.n b962a │ │ movs r0, #6 │ │ - b.n b9e76 │ │ + b.n b9e86 │ │ movs r4, r0 │ │ - b.n ba11a │ │ + b.n ba12a │ │ movs r0, #182 @ 0xb6 │ │ lsls r6, r2, #7 │ │ movs r0, #2 │ │ lsls r6, r0, #2 │ │ movs r0, #8 │ │ lsls r2, r0, #10 │ │ movs r0, #28 │ │ lsls r3, r0, #22 │ │ @ instruction: 0xffddeaff │ │ - beq.n b9ac4 │ │ - b.n b9f24 │ │ + beq.n b9ad4 │ │ + b.n b9f34 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r5} │ │ - b.n b9fb0 │ │ + b.n b9fc0 │ │ asrs r2, r1, #32 │ │ - b.n b9dda │ │ + b.n b9dea │ │ movs r0, #4 │ │ - b.n b9dde │ │ + b.n b9dee │ │ lsls r6, r6, #1 │ │ add.w r0, r0, r8, asr #32 │ │ - b.n b95e0 │ │ + b.n b95f0 │ │ movs r0, r0 │ │ - b.n ba14a │ │ + b.n ba15a │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #32 │ │ - b.n b95e6 │ │ + b.n b95f6 │ │ asrs r2, r0, #32 │ │ - b.n ba1b8 │ │ + b.n ba1c8 │ │ asrs r4, r0, #32 │ │ - b.n b95ce │ │ - beq.n b9af4 │ │ - b.n b9f54 │ │ + b.n b95de │ │ + beq.n b9b04 │ │ + b.n b9f64 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r5, ip, sp, lr} │ │ - b.n b9600 │ │ + b.n b9610 │ │ @ instruction: 0xffb0eaff │ │ asrs r4, r1, #1 │ │ - b.n b9602 │ │ + b.n b9612 │ │ movs r0, #8 │ │ - b.n b95fc │ │ + b.n b960c │ │ movs r1, r0 │ │ - b.n b9d7a │ │ + b.n b9d8a │ │ @ instruction: 0xfff41aff │ │ cmp r1, #50 @ 0x32 │ │ - b.n ba0ee │ │ + b.n ba0fe │ │ asrs r0, r0, #32 │ │ - b.n b9e22 │ │ + b.n b9e32 │ │ cmp r7, #255 @ 0xff │ │ - b.n ba184 │ │ + b.n ba194 │ │ movs r2, r0 │ │ - b.n b9d8a │ │ + b.n b9d9a │ │ lsls r0, r7, #30 │ │ asrs r0, r1, #12 │ │ lsrs r7, r7, #31 │ │ asrs r7, r1, #13 │ │ movs r0, r0 │ │ asrs r1, r2, #5 │ │ lsls r1, r3, #1 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n b9e3e │ │ - beq.n b9b38 │ │ - b.n b9f98 │ │ + b.n b9e4e │ │ + beq.n b9b48 │ │ + b.n b9fa8 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r1, r2} │ │ - b.n b9e4a │ │ + b.n b9e5a │ │ lsls r2, r3, #7 │ │ add.w r2, r0, r8, lsl #1 │ │ - b.n b9640 │ │ + b.n b9650 │ │ movs r0, r0 │ │ - b.n ba1b6 │ │ + b.n ba1c6 │ │ vpmin.u , q8, │ │ lsls r0, r4, #2 │ │ - b.n b964c │ │ + b.n b965c │ │ movs r0, #0 │ │ - b.n b9642 │ │ + b.n b9652 │ │ movs r0, r0 │ │ - b.n ba1ca │ │ + b.n ba1da │ │ lsls r2, r0, #1 │ │ lsrs r0, r0, #8 │ │ adds r1, #2 │ │ - b.n b9a4e │ │ + b.n b9a5e │ │ movs r0, #1 │ │ - b.n b9fb6 │ │ + b.n b9fc6 │ │ asrs r0, r0, #1 │ │ - b.n b9664 │ │ + b.n b9674 │ │ movs r0, #0 │ │ - b.n b963a │ │ + b.n b964a │ │ movs r1, r0 │ │ - b.n ba27e │ │ + b.n ba28e │ │ movs r0, r0 │ │ - b.n b965c │ │ + b.n b966c │ │ movs r4, r4 │ │ - b.n ba060 │ │ + b.n ba070 │ │ movs r0, #7 │ │ - b.n b9e8a │ │ + b.n b9e9a │ │ lsls r0, r2, #9 │ │ @ instruction: 0xeb00ff2e │ │ @ instruction: 0xeaff0006 │ │ - b.n b9e96 │ │ + b.n b9ea6 │ │ asrs r7, r2, #25 │ │ add.w r0, r0, r0 │ │ - b.n ba1fe │ │ + b.n ba20e │ │ @ instruction: 0xffd21aff │ │ movs r0, r0 │ │ - b.n b9692 │ │ + b.n b96a2 │ │ asrs r0, r0, #32 │ │ - b.n b968a │ │ + b.n b969a │ │ asrs r1, r0, #32 │ │ - b.n ba070 │ │ + b.n ba080 │ │ vpmin.u q7, , │ │ lsls r0, r6, #3 │ │ - b.n b96b4 │ │ + b.n b96c4 │ │ movs r0, r0 │ │ - b.n b9c98 │ │ + b.n b9ca8 │ │ asrs r2, r3, #1 │ │ - b.n b971e │ │ + b.n b972e │ │ lsls r5, r0, #31 │ │ - b.n ba192 │ │ + b.n ba1a2 │ │ lsrs r7, r7, #31 │ │ - b.n ba224 │ │ + b.n ba234 │ │ movs r0, r0 │ │ - b.n ba22c │ │ + b.n ba23c │ │ @ instruction: 0xffc70aff │ │ asrs r4, r1, #32 │ │ - b.n b96bc │ │ + b.n b96cc │ │ movs r1, r0 │ │ - b.n ba1ba │ │ + b.n ba1ca │ │ str r0, [r2, r0] │ │ - b.n b96c2 │ │ + b.n b96d2 │ │ movs r0, #227 @ 0xe3 │ │ - b.n ba2de │ │ + b.n ba2ee │ │ stmia r0!, {r3, r6, r7} │ │ - b.n b96e0 │ │ + b.n b96f0 │ │ ands r0, r6 │ │ - b.n b96c8 │ │ - b.n b9c10 │ │ - b.n b96cc │ │ + b.n b96d8 │ │ + b.n b9c20 │ │ + b.n b96dc │ │ stmia r0!, {r2, r3} │ │ - b.n b9ccc │ │ + b.n b9cdc │ │ strh r0, [r7, #0] │ │ - b.n b96d4 │ │ + b.n b96e4 │ │ str r0, [sp, #240] @ 0xf0 │ │ - b.n b96d8 │ │ + b.n b96e8 │ │ asrs r4, r6, #2 │ │ - b.n b96f8 │ │ + b.n b9708 │ │ adds r0, #180 @ 0xb4 │ │ - b.n b96fc │ │ + b.n b970c │ │ asrs r1, r0, #32 │ │ - b.n b9ce0 │ │ + b.n b9cf0 │ │ ands r0, r2 │ │ - b.n b96e0 │ │ + b.n b96f0 │ │ asrs r4, r1, #32 │ │ lsls r0, r4, #6 │ │ adds r0, #3 │ │ - b.n b9cec │ │ + b.n b9cfc │ │ lsls r2, r4, #2 │ │ stmia.w sp, {lr} │ │ - b.n b9f16 │ │ + b.n b9f26 │ │ asrs r3, r0, #32 │ │ - b.n b9f1a │ │ + b.n b9f2a │ │ str r4, [r1, #0] │ │ - b.n b96f8 │ │ + b.n b9708 │ │ movs r1, r0 │ │ - b.n ba322 │ │ - b.n b9c0c │ │ - b.n b9700 │ │ + b.n ba332 │ │ + b.n b9c1c │ │ + b.n b9710 │ │ strh r0, [r3, #0] │ │ - b.n b9704 │ │ + b.n b9714 │ │ str r0, [sp, #112] @ 0x70 │ │ - b.n b9708 │ │ + b.n b9718 │ │ adds r0, #132 @ 0x84 │ │ - b.n b9730 │ │ + b.n b9740 │ │ adds r0, #3 │ │ - b.n b9d14 │ │ - strh r3, [r1, #44] @ 0x2c │ │ + b.n b9d24 │ │ + strh r2, [r1, #44] @ 0x2c │ │ @ instruction: 0xebff0004 │ │ - b.n b9f3e │ │ + b.n b9f4e │ │ @ instruction: 0xffaaeaff │ │ str r0, [sp, #368] @ 0x170 │ │ - b.n b97b2 │ │ + b.n b97c2 │ │ strh r1, [r0, #0] │ │ - b.n ba34a │ │ + b.n ba35a │ │ movs r4, r0 │ │ - b.n ba34e │ │ + b.n ba35e │ │ lsrs r0, r3, #4 │ │ - b.n b9d12 │ │ - ldrb r6, [r6, #11] │ │ + b.n b9d22 │ │ + ldrb r2, [r7, #11] │ │ add.w r0, r0, r0 │ │ - b.n ba2ba │ │ + b.n ba2ca │ │ movs r3, r1 │ │ lsrs r0, r0, #8 │ │ asrs r7, r0, #32 │ │ - b.n b97ce │ │ + b.n b97de │ │ strb r4, [r0, #0] │ │ - b.n ba126 │ │ + b.n ba136 │ │ movs r1, r0 │ │ - b.n ba24c │ │ + b.n ba25c │ │ vpmin.u8 , q9, │ │ adds r0, r3, r4 │ │ - b.n b9f72 │ │ + b.n b9f82 │ │ vpmin.u q7, , │ │ movs r4, r4 │ │ - b.n ba154 │ │ + b.n ba164 │ │ asrs r5, r0, #32 │ │ - b.n b9f7e │ │ + b.n b9f8e │ │ movs r0, #1 │ │ - b.n ba382 │ │ + b.n ba392 │ │ adds r0, #0 │ │ - b.n ba386 │ │ + b.n ba396 │ │ lsls r4, r2, #13 │ │ @ instruction: 0xeb00feef │ │ @ instruction: 0xeaff0004 │ │ - b.n b9786 │ │ + b.n b9796 │ │ movs r2, r0 │ │ - b.n ba356 │ │ + b.n ba366 │ │ movs r4, r0 │ │ - b.n b976e │ │ + b.n b977e │ │ movs r4, r1 │ │ - b.n ba39e │ │ + b.n ba3ae │ │ @ instruction: 0xff92eaff │ │ movs r1, r0 │ │ - b.n b9fa6 │ │ + b.n b9fb6 │ │ @ instruction: 0xff90eaff │ │ - ldr r4, [pc, #848] @ (b9fbc ) │ │ + ldr r4, [pc, #912] @ (ba00c ) │ │ movs r2, r0 │ │ - str r7, [r7, #88] @ 0x58 │ │ - vtbl.8 d19, {d21-d23}, d18 │ │ - @ instruction: 0xfff50e25 │ │ - vcvt.u32.f32 d30, d26, #11 │ │ + str r7, [r5, #88] @ 0x58 │ │ + vtbx.8 d19, {d5-d8}, d31 │ │ + @ instruction: 0xfff50d8d │ │ + vcvt.f32.u32 q15, , #11 │ │ @ instruction: 0xfff44ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n ba1a0 │ │ - beq.n b9cf0 │ │ - b.n ba124 │ │ - add r0, pc, #192 @ (adr r0, b9d4c ) │ │ - b.n ba190 │ │ + b.n ba1b0 │ │ + beq.n b9d00 │ │ + b.n ba134 │ │ + add r0, pc, #192 @ (adr r0, b9d5c ) │ │ + b.n ba1a0 │ │ strh r2, [r0, #0] │ │ - b.n b9fd2 │ │ + b.n b9fe2 │ │ str r0, [sp, #4] │ │ - b.n b9fd6 │ │ + b.n b9fe6 │ │ adds r0, #0 │ │ - b.n b9fda │ │ + b.n b9fea │ │ str r1, [r0, r0] │ │ - b.n b9fde │ │ + b.n b9fee │ │ negs r4, r2 │ │ - b.n b97cc │ │ + b.n b97dc │ │ movs r0, r0 │ │ - b.n ba34e │ │ + b.n ba35e │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ str r0, [r2, r0] │ │ - b.n b97d8 │ │ + b.n b97e8 │ │ movs r0, r0 │ │ - b.n ba35c │ │ + b.n ba36c │ │ movs r4, r0 │ │ asrs r5, r2, #23 │ │ movs r0, r1 │ │ asrs r0, r2, #12 │ │ @ instruction: 0xfff71aff │ │ movs r5, r7 │ │ and.w r0, r0, r0, lsr #32 │ │ - b.n b97f6 │ │ + b.n b9806 │ │ adds r0, #32 │ │ - b.n b96e0 │ │ + b.n b96f0 │ │ str r0, [r0, #8] │ │ - b.n ba00e │ │ + b.n ba01e │ │ movs r4, r0 │ │ - b.n ba012 │ │ + b.n ba022 │ │ asrs r6, r0, #32 │ │ - b.n ba016 │ │ - bfcsel a, b94d6 , c, eq │ │ + b.n ba026 │ │ + bfcsel a, b94e6 , c, eq │ │ strb r0, [r0, #0] │ │ - b.n ba01e │ │ + b.n ba02e │ │ movs r0, r0 │ │ - b.n b980a │ │ + b.n b981a │ │ adds r0, #32 │ │ - b.n b971c │ │ + b.n b972c │ │ movs r0, r0 │ │ - b.n b9f98 │ │ + b.n b9fa8 │ │ @ instruction: 0xffee8aff │ │ movs r0, r0 │ │ - b.n ba3a0 │ │ + b.n ba3b0 │ │ @ instruction: 0xffec0aff │ │ lsls r7, r0, #4 │ │ - b.n b9c22 │ │ + b.n b9c32 │ │ movs r6, r0 │ │ - b.n b9f9e │ │ + b.n b9fae │ │ @ instruction: 0xffe91aff │ │ lsls r2, r7, #2 │ │ - b.n ba0b6 │ │ + b.n ba0c6 │ │ str r1, [r0, #0] │ │ - b.n ba44a │ │ + b.n ba45a │ │ movs r4, r0 │ │ - b.n ba32e │ │ + b.n ba33e │ │ movs r1, r1 │ │ - b.n ba052 │ │ + b.n ba062 │ │ str r4, [r1, #0] │ │ asrs r0, r3, #22 │ │ asrs r6, r0, #32 │ │ - b.n ba05a │ │ + b.n ba06a │ │ lsls r4, r2, #1 │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n ba062 │ │ + b.n ba072 │ │ movs r0, r4 │ │ - b.n b975c │ │ + b.n b976c │ │ movs r0, r0 │ │ - b.n ba3d2 │ │ + b.n ba3e2 │ │ ands r0, r0 │ │ - b.n b982e │ │ + b.n b983e │ │ lsls r0, r1, #1 │ │ lsrs r0, r0, #8 │ │ lsls r0, r0, #1 │ │ - b.n b9868 │ │ + b.n b9878 │ │ asrs r0, r1, #32 │ │ - b.n ba07a │ │ + b.n ba08a │ │ lsls r4, r3, #1 │ │ - b.n b98de │ │ + b.n b98ee │ │ movs r0, #22 │ │ - b.n ba082 │ │ + b.n ba092 │ │ movs r4, r0 │ │ - b.n ba086 │ │ + b.n ba096 │ │ vmov.s8 lr, d20[7] │ │ movs r1, r1 │ │ - b.n b9ff8 │ │ + b.n ba008 │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ movs r1, r1 │ │ - b.n ba096 │ │ + b.n ba0a6 │ │ asrs r7, r0, #32 │ │ - b.n ba09a │ │ + b.n ba0aa │ │ movs r0, #6 │ │ - b.n ba09e │ │ + b.n ba0ae │ │ asrs r3, r3, #31 │ │ add.w r0, r0, r9 │ │ - b.n ba0a6 │ │ + b.n ba0b6 │ │ asrs r4, r0, #32 │ │ - b.n ba0aa │ │ + b.n ba0ba │ │ movs r0, #6 │ │ - b.n ba0ae │ │ + b.n ba0be │ │ lsls r3, r6, #1 │ │ add.w r0, r0, r0, asr #4 │ │ - b.n b97ac │ │ + b.n b97bc │ │ movs r0, r0 │ │ - b.n ba41a │ │ + b.n ba42a │ │ movs r4, r0 │ │ - b.n b9880 │ │ + b.n b9890 │ │ movs r6, r2 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n b98b8 │ │ + b.n b98c8 │ │ lsls r0, r1, #1 │ │ - b.n b98aa │ │ + b.n b98ba │ │ movs r7, #208 @ 0xd0 │ │ - b.n ba10e │ │ + b.n ba11e │ │ str r6, [r0, #0] │ │ - b.n b9eb6 │ │ + b.n b9ec6 │ │ strb r0, [r0, #0] │ │ - b.n ba2dc │ │ + b.n ba2ec │ │ str r0, [r6, #124] @ 0x7c │ │ - b.n ba11a │ │ + b.n ba12a │ │ movs r0, r0 │ │ - b.n ba4de │ │ + b.n ba4ee │ │ movs r4, r0 │ │ - b.n b98a4 │ │ + b.n b98b4 │ │ asrs r1, r1, #32 │ │ - b.n b9e50 │ │ + b.n b9e60 │ │ lsls r2, r7, #2 │ │ - b.n ba152 │ │ + b.n ba162 │ │ asrs r1, r0, #32 │ │ asrs r0, r0, #12 │ │ lsls r1, r0, #26 │ │ - b.n ba0b2 │ │ + b.n ba0c2 │ │ lsls r2, r7, #2 │ │ - b.n ba13e │ │ + b.n ba14e │ │ movs r0, r1 │ │ and.w r0, r0, r4, asr #2 │ │ - b.n b98fc │ │ + b.n b990c │ │ movs r0, r0 │ │ - b.n b9ee0 │ │ + b.n b9ef0 │ │ lsls r2, r3, #1 │ │ - b.n b9966 │ │ + b.n b9976 │ │ movs r0, r0 │ │ - b.n ba46a │ │ + b.n ba47a │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ asrs r5, r0, #31 │ │ - b.n ba3e2 │ │ + b.n ba3f2 │ │ movs r0, r0 │ │ - b.n ba516 │ │ + b.n ba526 │ │ subs r7, r7, #7 │ │ - b.n ba478 │ │ + b.n ba488 │ │ lsls r0, r6, #3 │ │ - b.n ba164 │ │ - beq.n b9e18 │ │ - b.n ba278 │ │ + b.n ba174 │ │ + beq.n b9e28 │ │ + b.n ba288 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r6, ip} │ │ - b.n b991c │ │ - b.n b9dec │ │ - b.n b9922 │ │ + b.n b992c │ │ + b.n b9dfc │ │ + b.n b9932 │ │ lsls r4, r0, #18 │ │ @ instruction: 0xe99a1084 │ │ - b.n b9918 │ │ + b.n b9928 │ │ str r0, [r0, r0] │ │ - b.n b992a │ │ + b.n b993a │ │ str r0, [sp, #192] @ 0xc0 │ │ - b.n ba300 │ │ + b.n ba310 │ │ ands r4, r0 │ │ - b.n b9932 │ │ + b.n b9942 │ │ stmia r0!, {r4} │ │ - b.n b9936 │ │ + b.n b9946 │ │ lsls r1, r0, #13 │ │ ldmia.w r9, {r5, ip, sp} │ │ - b.n b9824 │ │ + b.n b9834 │ │ strh r0, [r7, #22] │ │ - b.n ba1ac │ │ + b.n ba1bc │ │ asrs r0, r2, #1 │ │ - b.n b9954 │ │ + b.n b9964 │ │ adds r0, #80 @ 0x50 │ │ - b.n b9958 │ │ - b.n b9e3c │ │ - b.n b9938 │ │ - b.n b9e48 │ │ - b.n ba33c │ │ + b.n b9968 │ │ + b.n b9e4c │ │ + b.n b9948 │ │ + b.n b9e58 │ │ + b.n ba34c │ │ asrs r1, r0, #32 │ │ - b.n b9f44 │ │ + b.n b9f54 │ │ adds r0, #3 │ │ - b.n b9f48 │ │ + b.n b9f58 │ │ lsls r4, r0, #18 │ │ stmia.w lr, {r2, r3, r7, sp} │ │ - b.n ba572 │ │ + b.n ba582 │ │ movs r0, r4 │ │ - b.n b9950 │ │ + b.n b9960 │ │ movs r1, r0 │ │ - b.n ba57a │ │ + b.n ba58a │ │ str r0, [r1, r0] │ │ - b.n b9958 │ │ + b.n b9968 │ │ ands r4, r1 │ │ - b.n b995c │ │ + b.n b996c │ │ str r4, [r4, #0] │ │ - b.n b9960 │ │ + b.n b9970 │ │ stmia r0!, {} │ │ - b.n b9964 │ │ - strh r6, [r6, #38] @ 0x26 │ │ + b.n b9974 │ │ + strh r5, [r6, #38] @ 0x26 │ │ @ instruction: 0xebff3020 │ │ - b.n b9888 │ │ + b.n b9898 │ │ @ instruction: 0xffddeaff │ │ asrs r0, r4, #32 │ │ - b.n b9890 │ │ + b.n b98a0 │ │ movs r4, r1 │ │ - b.n ba59e │ │ + b.n ba5ae │ │ movs r4, r0 │ │ - b.n b9964 │ │ + b.n b9974 │ │ @ instruction: 0xffddeaff │ │ - ldr r2, [pc, #560] @ (ba098 ) │ │ + ldr r2, [pc, #624] @ (ba0e8 ) │ │ movs r2, r0 │ │ - adds r0, r0, #3 │ │ - vcle.f16 , q0, #0 │ │ + adds r5, r6, #3 │ │ + vsli.64 , , #53 @ 0x35 │ │ @ instruction: 0xfff448f0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n ba394 │ │ + b.n ba3a4 │ │ str r0, [r0, #4] │ │ - b.n b999e │ │ + b.n b99ae │ │ ands r1, r0 │ │ - b.n ba1c2 │ │ + b.n ba1d2 │ │ movs r1, r0 │ │ - b.n ba528 │ │ + b.n ba538 │ │ movs r4, r2 │ │ subs r0, r0, r0 │ │ str r4, [r3, r4] │ │ - b.n b99ba │ │ + b.n b99ca │ │ movs r0, r0 │ │ - b.n ba53c │ │ + b.n ba54c │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ movs r1, #24 │ │ - b.n b99c6 │ │ + b.n b99d6 │ │ movs r7, r0 │ │ - b.n b9a4a │ │ + b.n b9a5a │ │ asrs r0, r1, #32 │ │ - b.n b99ce │ │ + b.n b99de │ │ movs r0, #1 │ │ - b.n ba32a │ │ + b.n ba33a │ │ adds r0, #20 │ │ - b.n b99d4 │ │ + b.n b99e4 │ │ movs r1, r0 │ │ - b.n ba4ce │ │ + b.n ba4de │ │ movs r1, #24 │ │ - b.n b99be │ │ + b.n b99ce │ │ movs r0, #20 │ │ - b.n ba5f6 │ │ + b.n ba606 │ │ adds r1, #28 │ │ - b.n b99c6 │ │ + b.n b99d6 │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n b9fc6 │ │ + b.n b9fd6 │ │ asrs r2, r0, #32 │ │ - b.n b9f48 │ │ - ldr r1, [r5, #80] @ 0x50 │ │ - @ instruction: 0xfa000000 │ │ - b.n ba60e │ │ + b.n b9f58 │ │ + ldr r1, [r3, #76] @ 0x4c │ │ + mla r0, r0, r0, r0 │ │ + b.n ba61e │ │ ands r4, r1 │ │ - b.n b99dc │ │ + b.n b99ec │ │ lsls r2, r7, #2 │ │ - b.n ba260 │ │ + b.n ba270 │ │ movs r5, r0 │ │ - b.n ba21a │ │ + b.n ba22a │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r2, r3, r4, r6, ip, sp, lr} │ │ - b.n b9a8e │ │ + b.n b9a9e │ │ str r0, [r0, r0] │ │ - b.n ba226 │ │ + b.n ba236 │ │ movs r4, r0 │ │ - b.n ba62a │ │ + b.n ba63a │ │ lsls r4, r2, #28 │ │ - b.n b9fee │ │ - ldrb r7, [r7, #8] │ │ + b.n b9ffe │ │ + ldrb r3, [r0, #9] │ │ add.w r0, r0, r0 │ │ - b.n ba596 │ │ + b.n ba5a6 │ │ movs r4, r1 │ │ lsrs r0, r0, #8 │ │ asrs r7, r0, #32 │ │ - b.n b9aaa │ │ + b.n b9aba │ │ str r4, [r0, r0] │ │ - b.n ba402 │ │ + b.n ba412 │ │ movs r1, r0 │ │ - b.n ba528 │ │ + b.n ba538 │ │ @ instruction: 0xffef1aff │ │ asrs r4, r2, #28 │ │ - b.n ba24e │ │ + b.n ba25e │ │ movs r2, r0 │ │ - b.n ba5ba │ │ + b.n ba5ca │ │ movs r3, r0 │ │ subs r2, #0 │ │ movs r1, r0 │ │ - b.n ba3a2 │ │ + b.n ba3b2 │ │ movs r0, #20 │ │ - b.n ba65e │ │ + b.n ba66e │ │ movs r7, #16 │ │ - b.n ba026 │ │ + b.n ba036 │ │ @ instruction: 0xffe5eaff │ │ movs r0, #20 │ │ - b.n ba66a │ │ + b.n ba67a │ │ @ instruction: 0xffe3eaff │ │ movs r4, r0 │ │ - b.n b9a5c │ │ + b.n b9a6c │ │ movs r2, r0 │ │ - b.n ba636 │ │ + b.n ba646 │ │ movs r4, r0 │ │ - b.n b9a44 │ │ + b.n b9a54 │ │ movs r0, r0 │ │ - b.n ba67e │ │ + b.n ba68e │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n ba464 │ │ - beq.n b9f54 │ │ - b.n ba3e8 │ │ + b.n ba474 │ │ + beq.n b9f64 │ │ + b.n ba3f8 │ │ mvns r0, r3 │ │ - b.n ba2d2 │ │ + b.n ba2e2 │ │ ands r0, r0 │ │ - b.n b9a58 │ │ + b.n b9a68 │ │ str r4, [r0, r0] │ │ - b.n b9a5c │ │ + b.n b9a6c │ │ adds r2, #64 @ 0x40 │ │ - b.n b9a7e │ │ + b.n b9a8e │ │ movs r0, r0 │ │ - b.n ba608 │ │ + b.n ba618 │ │ lsls r0, r1, #1 │ │ lsrs r0, r0, #8 │ │ strb r4, [r7, #8] │ │ - b.n b9a8a │ │ + b.n b9a9a │ │ movs r0, r0 │ │ - b.n ba61c │ │ + b.n ba62c │ │ lsls r4, r1, #1 │ │ lsrs r0, r0, #8 │ │ adds r0, #6 │ │ - b.n b9b16 │ │ + b.n b9b26 │ │ strh r0, [r2, #0] │ │ - b.n b9a9c │ │ + b.n b9aac │ │ movs r0, r1 │ │ - b.n ba5a4 │ │ + b.n ba5b4 │ │ adds r2, #56 @ 0x38 │ │ lsls r0, r2, #22 │ │ adds r0, #4 │ │ lsls r1, r0, #20 │ │ adds r2, #64 @ 0x40 │ │ - b.n b9aaa │ │ - add r0, pc, #16 @ (adr r0, b9f9c ) │ │ - b.n b9ab4 │ │ + b.n b9aba │ │ + add r0, pc, #16 @ (adr r0, b9fac ) │ │ + b.n b9ac4 │ │ strb r4, [r1, #0] │ │ - b.n b9ab8 │ │ + b.n b9ac8 │ │ movs r7, r0 │ │ - b.n ba24a │ │ + b.n ba25a │ │ lsls r7, r4, #1 │ │ lsrs r0, r0, #8 │ │ strb r0, [r1, #0] │ │ - b.n b9ac4 │ │ + b.n b9ad4 │ │ str r0, [sp, #0] │ │ - b.n ba6e2 │ │ + b.n ba6f2 │ │ lsls r2, r1 │ │ - b.n ba0ba │ │ - b.n b9fc8 │ │ - b.n ba4b0 │ │ + b.n ba0ca │ │ + b.n b9fd8 │ │ + b.n ba4c0 │ │ strb r2, [r0, #0] │ │ - b.n ba0bc │ │ + b.n ba0cc │ │ strb r0, [r1, #0] │ │ - b.n b9ab8 │ │ + b.n b9ac8 │ │ strb r2, [r5, #0] │ │ - b.n ba46a │ │ + b.n ba47a │ │ asrs r4, r0 │ │ - b.n ba0d6 │ │ + b.n ba0e6 │ │ strb r1, [r1, #0] │ │ adds r1, #160 @ 0xa0 │ │ stmia r0!, {r0, r1, r2, r7} │ │ - b.n ba0d0 │ │ + b.n ba0e0 │ │ lsrs r3, r0, #12 │ │ ldcl 0, cr7, [r4, #80] @ 0x50 │ │ - b.n b9af2 │ │ + b.n b9b02 │ │ str r4, [r1, #16] │ │ - b.n ba0ea │ │ + b.n ba0fa │ │ stmia r0!, {r2} │ │ - b.n b9afe │ │ + b.n b9b0e │ │ strb r0, [r4, #0] │ │ - b.n b9ade │ │ + b.n b9aee │ │ lsrs r6, r0, #12 │ │ stcl 0, cr6, [r4, #16] │ │ - b.n b9b04 │ │ + b.n b9b14 │ │ strb r0, [r0, #0] │ │ - b.n b9b08 │ │ + b.n b9b18 │ │ str r1, [r0, #0] │ │ - b.n ba4f2 │ │ + b.n ba502 │ │ str r4, [r0, #0] │ │ - b.n b9af0 │ │ + b.n b9b00 │ │ str r2, [r5, #0] │ │ - b.n ba482 │ │ + b.n ba492 │ │ movs r7, r0 │ │ - b.n ba29e │ │ + b.n ba2ae │ │ movs r3, r3 │ │ ldmia r2!, {} │ │ movs r0, r1 │ │ - b.n ba2b2 │ │ + b.n ba2c2 │ │ movs r1, r3 │ │ cmp r2, #0 │ │ strb r1, [r0, #0] │ │ - b.n ba510 │ │ + b.n ba520 │ │ strb r0, [r0, #0] │ │ - b.n b9b0c │ │ + b.n b9b1c │ │ movs r7, r0 │ │ - b.n ba2be │ │ + b.n ba2ce │ │ movs r2, r1 │ │ rev r0, r0 │ │ adds r0, #135 @ 0x87 │ │ - b.n ba120 │ │ + b.n ba130 │ │ adds r1, #3 │ │ - b.n ba132 │ │ + b.n ba142 │ │ strb r0, [r0, #0] │ │ - b.n b9b42 │ │ + b.n b9b52 │ │ str r4, [r0, #0] │ │ - b.n b9b46 │ │ + b.n b9b56 │ │ str r0, [r1, r0] │ │ - b.n b9b4a │ │ + b.n b9b5a │ │ strb r4, [r1, #0] │ │ - b.n b9b2e │ │ + b.n b9b3e │ │ str r0, [r2, #0] │ │ - b.n b9b32 │ │ + b.n b9b42 │ │ str r4, [r2, r0] │ │ - b.n b9b36 │ │ + b.n b9b46 │ │ ands r4, r1 │ │ - b.n ba4ba │ │ + b.n ba4ca │ │ movs r3, r0 │ │ - b.n ba2de │ │ + b.n ba2ee │ │ @ instruction: 0xfff62aff │ │ adds r0, #4 │ │ - b.n b9b66 │ │ + b.n b9b76 │ │ movs r0, r1 │ │ - b.n ba2e8 │ │ + b.n ba2f8 │ │ movs r7, r0 │ │ ldr r2, [sp, #0] │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr3, [r4, #32] │ │ - b.n b9b76 │ │ + b.n b9b86 │ │ strb r0, [r1, #0] │ │ - b.n b9a7a │ │ + b.n b9a8a │ │ adds r0, #20 │ │ - b.n b9b5e │ │ + b.n b9b6e │ │ lsrs r3, r0, #12 │ │ stcl 0, cr4, [r4, #48] @ 0x30 │ │ - b.n ba4e6 │ │ + b.n ba4f6 │ │ movs r0, r1 │ │ - b.n ba310 │ │ + b.n ba320 │ │ @ instruction: 0xfff78aff │ │ asrs r4, r1, #32 │ │ - b.n b9b72 │ │ + b.n b9b82 │ │ strh r0, [r2, #0] │ │ - b.n b9b76 │ │ + b.n b9b86 │ │ movs r0, #20 │ │ - b.n b9b7a │ │ + b.n b9b8a │ │ asrs r4, r7, #8 │ │ - b.n b9b96 │ │ + b.n b9ba6 │ │ asrs r1, r0, #32 │ │ - b.n ba4fc │ │ + b.n ba50c │ │ asrs r4, r7, #8 │ │ - b.n b9b7e │ │ + b.n b9b8e │ │ movs r1, r1 │ │ - b.n ba3c2 │ │ - beq.n ba0bc │ │ - b.n ba51c │ │ + b.n ba3d2 │ │ + beq.n ba0cc │ │ + b.n ba52c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r6, r9, ip} │ │ - b.n b9bae │ │ + b.n b9bbe │ │ str r0, [sp, #0] │ │ - b.n ba7d2 │ │ + b.n ba7e2 │ │ asrs r2, r0, #32 │ │ - b.n ba198 │ │ + b.n ba1a8 │ │ asrs r0, r2, #9 │ │ - b.n b9b9a │ │ + b.n b9baa │ │ movs r1, r1 │ │ - b.n ba3de │ │ - beq.n ba0d8 │ │ - b.n ba538 │ │ + b.n ba3ee │ │ + beq.n ba0e8 │ │ + b.n ba548 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, r6, r9, ip, sp, lr} │ │ - b.n b9bca │ │ + b.n b9bda │ │ movs r0, r0 │ │ - b.n ba75c │ │ + b.n ba76c │ │ movs r3, r6 │ │ lsrs r0, r0, #8 │ │ strh r0, [r1, r1] │ │ - b.n b9bd6 │ │ + b.n b9be6 │ │ strh r1, [r0, #0] │ │ - b.n ba3fa │ │ + b.n ba40a │ │ ands r0, r0 │ │ - b.n ba3fe │ │ + b.n ba40e │ │ lsls r0, r4, #2 │ │ - b.n ba5c2 │ │ + b.n ba5d2 │ │ str r2, [r0, #0] │ │ - b.n ba406 │ │ + b.n ba416 │ │ movs r0, #1 │ │ - b.n ba80a │ │ + b.n ba81a │ │ asrs r0, r2, #32 │ │ - b.n b9bf8 │ │ + b.n b9c08 │ │ asrs r3, r5, #28 │ │ add.w r0, r0, r0 │ │ - b.n ba776 │ │ + b.n ba786 │ │ lsls r7, r3, #1 │ │ subs r0, r0, r0 │ │ strb r4, [r0, #0] │ │ - b.n ba41e │ │ + b.n ba42e │ │ negs r0, r0 │ │ - b.n b9c0a │ │ + b.n b9c1a │ │ asrs r0, r2, #32 │ │ - b.n b9c10 │ │ + b.n b9c20 │ │ movs r4, r0 │ │ - b.n ba42a │ │ - bf 0, bd8ea │ │ + b.n ba43a │ │ + bf 0, bd8fa │ │ asrs r0, r0, #32 │ │ - b.n ba432 │ │ + b.n ba442 │ │ movs r4, r0 │ │ - b.n ba436 │ │ + b.n ba446 │ │ asrs r1, r6, #29 │ │ add.w r2, r0, ip, lsl #5 │ │ - b.n b9c2c │ │ + b.n b9c3c │ │ adds r2, #60 @ 0x3c │ │ - b.n b9c30 │ │ + b.n b9c40 │ │ lsls r0, r0, #1 │ │ - b.n b9c34 │ │ + b.n b9c44 │ │ asrs r1, r0, #32 │ │ - b.n ba58c │ │ + b.n ba59c │ │ movs r0, #20 │ │ - b.n b9c38 │ │ + b.n b9c48 │ │ asrs r4, r1, #9 │ │ - b.n b9c20 │ │ + b.n b9c30 │ │ asrs r1, r0, #32 │ │ - b.n ba61c │ │ + b.n ba62c │ │ movs r2, #72 @ 0x48 │ │ - b.n b9c28 │ │ + b.n b9c38 │ │ movs r0, #1 │ │ - b.n ba85e │ │ + b.n ba86e │ │ asrs r4, r7, #8 │ │ - b.n b9c30 │ │ + b.n b9c40 │ │ asrs r5, r0, #32 │ │ - b.n ba466 │ │ + b.n ba476 │ │ lsrs r1, r3, #8 │ │ add.w r0, r0, r7 │ │ - b.n ba46e │ │ + b.n ba47e │ │ movs r0, #6 │ │ - b.n ba472 │ │ + b.n ba482 │ │ asrs r0, r1, #32 │ │ - b.n ba476 │ │ + b.n ba486 │ │ @ instruction: 0xff8deaff │ │ lsrs r7, r7, #1 │ │ - b.n ba7f2 │ │ + b.n ba802 │ │ movs r3, r6 │ │ cmp r2, #0 │ │ str r1, [r0, r0] │ │ - b.n ba486 │ │ + b.n ba496 │ │ strb r2, [r0, #0] │ │ - b.n ba48a │ │ + b.n ba49a │ │ movs r7, #88 @ 0x58 │ │ - b.n ba762 │ │ + b.n ba772 │ │ asrs r2, r5, #2 │ │ - b.n ba266 │ │ + b.n ba276 │ │ movs r2, r0 │ │ - b.n ba40a │ │ + b.n ba41a │ │ ands r0, r0 │ │ - b.n ba49a │ │ + b.n ba4aa │ │ asrs r2, r1, #2 │ │ adds r1, #160 @ 0xa0 │ │ asrs r4, r5, #29 │ │ add.w r0, r0, r0 │ │ - b.n ba806 │ │ + b.n ba816 │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ - add r0, pc, #16 @ (adr r0, ba17c ) │ │ - b.n b9c8e │ │ + add r0, pc, #16 @ (adr r0, ba18c ) │ │ + b.n b9c9e │ │ adds r0, #0 │ │ - b.n ba4b2 │ │ + b.n ba4c2 │ │ movs r4, r0 │ │ - b.n ba4b6 │ │ + b.n ba4c6 │ │ movs r0, #7 │ │ - b.n ba4ba │ │ + b.n ba4ca │ │ asrs r5, r0, #32 │ │ - b.n ba4be │ │ + b.n ba4ce │ │ @ instruction: 0xff85eaff │ │ strb r0, [r3, #3] │ │ - b.n b9cc4 │ │ + b.n b9cd4 │ │ strb r7, [r0, #0] │ │ - b.n ba2a8 │ │ + b.n ba2b8 │ │ strb r2, [r3, #1] │ │ - b.n b9d3c │ │ + b.n b9d4c │ │ movs r0, r0 │ │ - b.n ba840 │ │ + b.n ba850 │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n b9cba │ │ + b.n b9cca │ │ lsrs r4, r7, #7 │ │ @ instruction: 0xeb0097bc │ │ - b.n ba7b2 │ │ + b.n ba7c2 │ │ ldr r7, [sp, #1020] @ 0x3fc │ │ - b.n ba844 │ │ + b.n ba854 │ │ movs r1, r1 │ │ - b.n ba4ea │ │ - beq.n ba1e4 │ │ - b.n ba644 │ │ + b.n ba4fa │ │ + beq.n ba1f4 │ │ + b.n ba654 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, ip, pc} │ │ - b.n ba8f6 │ │ + b.n ba906 │ │ movs r4, r0 │ │ - b.n b9ce2 │ │ + b.n b9cf2 │ │ movs r2, r0 │ │ - b.n ba8be │ │ + b.n ba8ce │ │ movs r4, r0 │ │ - b.n b9cca │ │ + b.n b9cda │ │ movs r1, r1 │ │ - b.n ba506 │ │ - beq.n ba200 │ │ - b.n ba660 │ │ + b.n ba516 │ │ + beq.n ba210 │ │ + b.n ba670 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r7, ip, lr} │ │ - b.n b9d10 │ │ + b.n b9d20 │ │ ands r0, r0 │ │ - b.n ba516 │ │ + b.n ba526 │ │ strb r4, [r0, #0] │ │ - b.n b9d00 │ │ + b.n b9d10 │ │ movs r1, r0 │ │ - b.n ba91e │ │ + b.n ba92e │ │ adds r0, #132 @ 0x84 │ │ - b.n b9d20 │ │ + b.n b9d30 │ │ str r5, [r0, r0] │ │ - b.n ba304 │ │ + b.n ba314 │ │ str r1, [r0, #0] │ │ - b.n ba52a │ │ + b.n ba53a │ │ strb r0, [r0, #0] │ │ - b.n b9d08 │ │ + b.n b9d18 │ │ adds r0, #3 │ │ - b.n ba310 │ │ + b.n ba320 │ │ asrs r5, r0, #32 │ │ - b.n ba536 │ │ + b.n ba546 │ │ str r2, [r0, r0] │ │ - b.n ba53a │ │ + b.n ba54a │ │ cmp r7, #175 @ 0xaf │ │ - b.n ba93e │ │ - strh r1, [r1, #32] │ │ + b.n ba94e │ │ + strh r0, [r1, #32] │ │ @ instruction: 0xebff1006 │ │ - b.n ba546 │ │ + b.n ba556 │ │ movs r0, #5 │ │ - b.n ba54a │ │ + b.n ba55a │ │ movs r4, r0 │ │ - b.n ba54e │ │ + b.n ba55e │ │ @ instruction: 0xffe0eaff │ │ ands r0, r0 │ │ - b.n ba556 │ │ + b.n ba566 │ │ lsls r0, r2, #1 │ │ - b.n b9d58 │ │ + b.n b9d68 │ │ str r7, [sp, #752] @ 0x2f0 │ │ - b.n ba82e │ │ + b.n ba83e │ │ movs r0, r0 │ │ - b.n ba340 │ │ + b.n ba350 │ │ ldr r7, [sp, #1020] @ 0x3fc │ │ - b.n ba8c4 │ │ + b.n ba8d4 │ │ lsls r2, r3, #1 │ │ - b.n b9dca │ │ + b.n b9dda │ │ movs r0, r0 │ │ - b.n ba8ce │ │ + b.n ba8de │ │ @ instruction: 0xffe00aff │ │ asrs r0, r7, #32 │ │ - b.n b9d74 │ │ + b.n b9d84 │ │ lsrs r7, r7, #1 │ │ - b.n ba97a │ │ + b.n ba98a │ │ adds r0, #52 @ 0x34 │ │ - b.n b9d7c │ │ + b.n b9d8c │ │ movs r0, #237 @ 0xed │ │ - b.n ba982 │ │ + b.n ba992 │ │ asrs r1, r0, #32 │ │ - b.n ba364 │ │ + b.n ba374 │ │ movs r0, r0 │ │ - b.n b9d64 │ │ + b.n b9d74 │ │ adds r0, #3 │ │ - b.n ba36c │ │ + b.n ba37c │ │ movs r1, r0 │ │ - b.n ba992 │ │ - strh r4, [r6, #30] │ │ + b.n ba9a2 │ │ + strh r3, [r6, #30] │ │ @ instruction: 0xebffffd6 │ │ @ instruction: 0xeaff9000 │ │ - b.n ba59e │ │ + b.n ba5ae │ │ @ instruction: 0xffd4eaff │ │ - mov ip, r8 │ │ + mov ip, sl │ │ movs r2, r0 │ │ - @ instruction: 0xfadbfff4 │ │ - b.n b9cd4 │ │ - vpadal.s16 d20, d28 │ │ + @ instruction: 0xfba0fff4 │ │ + b.n b9d68 │ │ + vqshlu.s32 d20, d28, #20 │ │ movs r2, r0 │ │ - ldrh r3, [r7, r0] │ │ - @ instruction: 0xfff5fa7e │ │ + ldrh r3, [r7, r1] │ │ + vtbx.8 d31, {d5-d8}, d3 │ │ @ instruction: 0xfff44ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n ba79c │ │ - beq.n ba2ac │ │ - b.n ba720 │ │ + b.n ba7ac │ │ + beq.n ba2bc │ │ + b.n ba730 │ │ str r0, [r5, r0] │ │ - b.n b9daa │ │ + b.n b9dba │ │ ands r0, r0 │ │ - b.n ba5ce │ │ + b.n ba5de │ │ lsls r0, r1, #9 │ │ - b.n b9db2 │ │ + b.n b9dc2 │ │ movs r0, r0 │ │ - b.n ba936 │ │ + b.n ba946 │ │ strb r5, [r0, #0] │ │ - b.n ba5da │ │ + b.n ba5ea │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ lsls r4, r6, #8 │ │ - b.n b9dca │ │ + b.n b9dda │ │ strb r5, [r0, #0] │ │ - b.n ba5e6 │ │ + b.n ba5f6 │ │ movs r5, r0 │ │ - b.n ba54a │ │ + b.n ba55a │ │ movs r2, r0 │ │ ldr r2, [sp, #0] │ │ movs r4, r0 │ │ - b.n ba5f2 │ │ + b.n ba602 │ │ lsrs r5, r6, #1 │ │ add.w r0, r0, r8, asr #28 │ │ - b.n b9de2 │ │ + b.n b9df2 │ │ str r4, [r0, r0] │ │ - b.n b9dd8 │ │ + b.n b9de8 │ │ ands r0, r1 │ │ - b.n b9ddc │ │ + b.n b9dec │ │ asrs r0, r4, #2 │ │ - b.n b9dee │ │ + b.n b9dfe │ │ str r1, [r0, #0] │ │ - b.n ba60a │ │ + b.n ba61a │ │ movs r4, r0 │ │ - b.n b9bfa │ │ + b.n b9c0a │ │ movs r0, r2 │ │ - b.n b9dec │ │ + b.n b9dfc │ │ movs r0, r0 │ │ - b.n ba976 │ │ + b.n ba986 │ │ lsls r3, r1, #1 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n b9e00 │ │ + b.n b9e10 │ │ movs r0, #1 │ │ - b.n ba770 │ │ + b.n ba780 │ │ movs r2, r0 │ │ - b.n ba586 │ │ + b.n ba596 │ │ lsls r4, r4, #1 │ │ subs r0, r0, r0 │ │ str r0, [r2, r0] │ │ - b.n b9e28 │ │ + b.n b9e38 │ │ movs r0, #4 │ │ - b.n ba7fe │ │ + b.n ba80e │ │ ands r1, r0 │ │ - b.n baa36 │ │ + b.n baa46 │ │ movs r0, r0 │ │ - b.n baa3a │ │ + b.n baa4a │ │ adds r0, #1 │ │ - b.n ba788 │ │ + b.n ba798 │ │ str r4, [r1, #0] │ │ - b.n b9e1c │ │ + b.n b9e2c │ │ stmia r0!, {} │ │ - b.n ba646 │ │ + b.n ba656 │ │ movs r0, r2 │ │ - b.n b9e44 │ │ + b.n b9e54 │ │ str r0, [sp, #16] │ │ - b.n ba64e │ │ + b.n ba65e │ │ ands r1, r0 │ │ - b.n ba81a │ │ + b.n ba82a │ │ str r1, [r0, #0] │ │ - b.n ba7a4 │ │ + b.n ba7b4 │ │ str r1, [r0, r0] │ │ - b.n ba7a4 │ │ - add r0, pc, #8 @ (adr r0, ba324 ) │ │ - b.n ba65e │ │ + b.n ba7b4 │ │ + add r0, pc, #8 @ (adr r0, ba334 ) │ │ + b.n ba66e │ │ strh r3, [r0, #0] │ │ - b.n ba662 │ │ + b.n ba672 │ │ movs r0, r0 │ │ - b.n ba5ce │ │ + b.n ba5de │ │ movs r7, r0 │ │ ldrh r0, [r0, #16] │ │ - b.n ba534 │ │ - b.n ba250 │ │ + b.n ba544 │ │ + b.n ba260 │ │ strb r2, [r0, #0] │ │ - b.n ba7c0 │ │ + b.n ba7d0 │ │ adds r0, #1 │ │ - b.n ba7c6 │ │ + b.n ba7d6 │ │ movs r0, #4 │ │ - b.n ba84e │ │ + b.n ba85e │ │ movs r1, r0 │ │ - b.n ba856 │ │ + b.n ba866 │ │ movs r6, r1 │ │ - b.n ba5f0 │ │ + b.n ba600 │ │ strb r6, [r0, #0] │ │ - b.n ba686 │ │ + b.n ba696 │ │ @ instruction: 0xffed0aff │ │ movs r0, r2 │ │ - b.n b9e88 │ │ + b.n b9e98 │ │ movs r1, r1 │ │ - b.n ba3f2 │ │ + b.n ba402 │ │ movs r0, r0 │ │ - b.n b9e58 │ │ + b.n b9e68 │ │ movs r6, r3 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n baa08 │ │ + b.n baa18 │ │ ands r1, r0 │ │ - b.n baaa2 │ │ + b.n baab2 │ │ ands r5, r0 │ │ strh r0, [r4, #12] │ │ strb r0, [r0, #0] │ │ - b.n baaaa │ │ + b.n baaba │ │ movs r4, r0 │ │ - b.n baa18 │ │ + b.n baa28 │ │ movs r7, r1 │ │ subs r2, #0 │ │ lsls r4, r1, #4 │ │ - b.n ba6b6 │ │ + b.n ba6c6 │ │ movs r4, r2 │ │ - b.n baa5a │ │ + b.n baa6a │ │ movs r4, r1 │ │ ldrh r0, [r0, #16] │ │ movs r1, r0 │ │ - b.n baa32 │ │ + b.n baa42 │ │ movs r1, r0 │ │ - b.n baac6 │ │ + b.n baad6 │ │ movs r0, r1 │ │ strh r0, [r4, #12] │ │ adds r0, #12 │ │ - b.n b9ec8 │ │ + b.n b9ed8 │ │ movs r3, r0 │ │ - b.n bab12 │ │ + b.n bab22 │ │ strb r3, [r0, #0] │ │ - b.n bab1e │ │ + b.n bab2e │ │ movs r0, #10 │ │ - b.n ba6da │ │ + b.n ba6ea │ │ lsrs r5, r1, #10 │ │ orn r0, r2, #8650752 @ 0x840000 │ │ - b.n ba842 │ │ + b.n ba852 │ │ lsrs r5, r1, #10 │ │ - bl ffcfe39c │ │ + bl ffcfe3ac │ │ subs r7, r7, r3 │ │ movs r7, r0 │ │ - b.n ba656 │ │ + b.n ba666 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n baa66 │ │ + b.n baa76 │ │ movs r1, r0 │ │ - b.n baafa │ │ + b.n bab0a │ │ strh r0, [r0, #0] │ │ str r1, [sp, #640] @ 0x280 │ │ movs r4, r0 │ │ - b.n ba8c4 │ │ + b.n ba8d4 │ │ asrs r7, r0, #4 │ │ - b.n ba2fa │ │ + b.n ba30a │ │ asrs r7, r0, #4 │ │ - b.n ba2ca │ │ + b.n ba2da │ │ strb r1, [r0, #0] │ │ - b.n ba8dc │ │ + b.n ba8ec │ │ movs r7, r0 │ │ - b.n ba682 │ │ + b.n ba692 │ │ @ instruction: 0xfffa1aff │ │ ands r0, r1 │ │ - b.n b9f14 │ │ + b.n b9f24 │ │ lsls r0, r1, #9 │ │ - b.n b9f06 │ │ + b.n b9f16 │ │ str r0, [r5, #0] │ │ - b.n b9eea │ │ + b.n b9efa │ │ movs r0, r0 │ │ - b.n baa86 │ │ + b.n baa96 │ │ lsls r4, r6, #8 │ │ asrs r4, r2, #22 │ │ movs r6, r0 │ │ asrs r0, r2, #5 │ │ movs r6, r0 │ │ ldr r2, [sp, #0] │ │ movs r4, r0 │ │ - b.n ba736 │ │ + b.n ba746 │ │ lsrs r4, r4, #32 │ │ add.w r0, r0, r8, asr #28 │ │ - b.n b9f26 │ │ + b.n b9f36 │ │ movs r7, r0 │ │ - b.n ba6ae │ │ + b.n ba6be │ │ @ instruction: 0xffae1aff │ │ movs r0, r0 │ │ and.w r0, r0, r7, lsl #24 │ │ - b.n ba74e │ │ + b.n ba75e │ │ movs r4, r0 │ │ - b.n b9f4c │ │ + b.n b9f5c │ │ movs r6, r0 │ │ - b.n ba6b6 │ │ + b.n ba6c6 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ lsls r4, r2, #9 │ │ - b.n b9f46 │ │ + b.n b9f56 │ │ movs r0, r0 │ │ - b.n baac2 │ │ + b.n baad2 │ │ strb r0, [r2, #9] │ │ asrs r4, r2, #22 │ │ lsls r6, r0, #4 │ │ asrs r7, r6, #13 │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ - beq.n ba468 │ │ - b.n ba8c8 │ │ + beq.n ba478 │ │ + b.n ba8d8 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {sp} │ │ - b.n b9f5a │ │ + b.n b9f6a │ │ movs r2, r0 │ │ - b.n ba6ec │ │ + b.n ba6fc │ │ movs r0, r1 │ │ ldrh r0, [r0, #16] │ │ adds r0, #1 │ │ - b.n bab86 │ │ + b.n bab96 │ │ asrs r7, r0, #32 │ │ - b.n ba78a │ │ + b.n ba79a │ │ str r1, [r0, #16] │ │ - b.n ba36e │ │ + b.n ba37e │ │ asrs r1, r0, #32 │ │ - b.n ba954 │ │ + b.n ba964 │ │ movs r2, r0 │ │ - b.n ba6f8 │ │ + b.n ba708 │ │ str r7, [r0, #16] │ │ - b.n ba35a │ │ + b.n ba36a │ │ str r6, [r0, #0] │ │ - b.n ba7e4 │ │ + b.n ba7f4 │ │ strb r7, [r0, #0] │ │ - b.n ba56e │ │ + b.n ba57e │ │ @ instruction: 0xfff89aff │ │ asrs r1, r0, #32 │ │ - b.n ba8f8 │ │ + b.n ba908 │ │ asrs r0, r0, #32 │ │ - b.n b9f6e │ │ + b.n b9f7e │ │ lsls r2, r0, #4 │ │ - b.n bac32 │ │ + b.n bac42 │ │ lsls r0, r2, #9 │ │ - b.n b9f7e │ │ - beq.n ba4b0 │ │ - b.n ba910 │ │ + b.n b9f8e │ │ + beq.n ba4c0 │ │ + b.n ba920 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r1, r2, sp, lr} │ │ - b.n ba7c2 │ │ + b.n ba7d2 │ │ movs r4, r0 │ │ - b.n b9fc0 │ │ + b.n b9fd0 │ │ movs r6, r0 │ │ - b.n ba72a │ │ + b.n ba73a │ │ @ instruction: 0xffe21aff │ │ @ instruction: 0xffe6eaff │ │ - ldr r7, [pc, #960] @ (ba854 ) │ │ + ldr r7, [pc, #960] @ (ba864 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n ba9b4 │ │ + b.n ba9c4 │ │ svc 141 @ 0x8d │ │ - b.n ba938 │ │ + b.n ba948 │ │ movs r2, r0 │ │ - b.n bab48 │ │ + b.n bab58 │ │ lsls r5, r1, #2 │ │ ldr r2, [sp, #0] │ │ strh r0, [r0, #0] │ │ - b.n ba7ea │ │ + b.n ba7fa │ │ movs r4, r0 │ │ - b.n b9fd0 │ │ - b.n ba4c0 │ │ - b.n b9fe8 │ │ + b.n b9fe0 │ │ + b.n ba4d0 │ │ + b.n b9ff8 │ │ stmia r3!, {r1} │ │ - b.n ba8b6 │ │ + b.n ba8c6 │ │ lsls r2, r0, #28 │ │ - b.n baada │ │ + b.n baaea │ │ movs r2, r4 │ │ subs r0, r0, r0 │ │ - add r0, pc, #256 @ (adr r0, ba5c0 ) │ │ - b.n b9fe6 │ │ + add r0, pc, #256 @ (adr r0, ba5d0 ) │ │ + b.n b9ff6 │ │ movs r1, r0 │ │ - b.n bab82 │ │ + b.n bab92 │ │ lsls r2, r1, #2 │ │ subs r0, r0, r0 │ │ str r4, [r3, r4] │ │ - b.n ba002 │ │ + b.n ba012 │ │ movs r0, r0 │ │ - b.n bab7c │ │ + b.n bab8c │ │ lsls r7, r0, #2 │ │ lsrs r0, r0, #8 │ │ strb r0, [r3, #4] │ │ - b.n ba00e │ │ + b.n ba01e │ │ movs r7, r0 │ │ - b.n ba092 │ │ + b.n ba0a2 │ │ ands r0, r1 │ │ - b.n ba016 │ │ + b.n ba026 │ │ strb r1, [r0, #0] │ │ - b.n ba974 │ │ + b.n ba984 │ │ str r4, [r2, #0] │ │ - b.n ba014 │ │ + b.n ba024 │ │ movs r1, r0 │ │ - b.n bab0e │ │ + b.n bab1e │ │ strb r0, [r3, #4] │ │ - b.n ba006 │ │ + b.n ba016 │ │ strb r4, [r2, #0] │ │ - b.n bac36 │ │ + b.n bac46 │ │ str r4, [r3, #16] │ │ - b.n ba00e │ │ + b.n ba01e │ │ lsls r6, r4, #1 │ │ subs r0, r0, r0 │ │ str r4, [r1, #0] │ │ - b.n ba842 │ │ + b.n ba852 │ │ asrs r4, r5, #32 │ │ - b.n ba020 │ │ + b.n ba030 │ │ str r0, [sp, #56] @ 0x38 │ │ - b.n ba84a │ │ + b.n ba85a │ │ adds r0, #32 │ │ - b.n ba028 │ │ + b.n ba038 │ │ movs r0, #36 @ 0x24 │ │ - b.n ba02c │ │ + b.n ba03c │ │ movs r5, r0 │ │ - b.n ba624 │ │ + b.n ba634 │ │ asrs r7, r0, #32 │ │ - b.n ba5a2 │ │ - ldr r4, [r2, #56] @ 0x38 │ │ - @ instruction: 0xfa002024 │ │ - b.n ba05c │ │ + b.n ba5b2 │ │ + ldr r4, [r0, #52] @ 0x34 │ │ + @ instruction: 0xfb002024 │ │ + b.n ba06c │ │ movs r0, r0 │ │ - b.n bac66 │ │ + b.n bac76 │ │ adds r0, #32 │ │ - b.n ba064 │ │ - b.n ba53e │ │ - b.n ba86e │ │ + b.n ba074 │ │ + b.n ba54e │ │ + b.n ba87e │ │ asrs r4, r5, #32 │ │ - b.n ba06c │ │ + b.n ba07c │ │ movs r0, r0 │ │ - b.n babe2 │ │ + b.n babf2 │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n ba044 │ │ + b.n ba054 │ │ lsls r2, r7, #2 │ │ - b.n ba8c8 │ │ + b.n ba8d8 │ │ str r0, [r0, r0] │ │ - b.n ba052 │ │ + b.n ba062 │ │ lsls r3, r3, #1 │ │ lsrs r0, r0, #8 │ │ lsls r6, r4, #3 │ │ and.w r0, r0, ip, lsr #17 │ │ - b.n ba0f0 │ │ + b.n ba100 │ │ movs r0, r2 │ │ - b.n ba074 │ │ + b.n ba084 │ │ strb r0, [r6, #8] │ │ - b.n ba0fa │ │ + b.n ba10a │ │ strb r3, [r2, r0] │ │ - b.n ba65a │ │ + b.n ba66a │ │ str r0, [r0, r0] │ │ - b.n ba06e │ │ + b.n ba07e │ │ movs r0, r0 │ │ - b.n bac10 │ │ + b.n bac20 │ │ lsls r1, r2, #1 │ │ lsrs r0, r0, #8 │ │ strb r1, [r0, #0] │ │ - b.n bacaa │ │ + b.n bacba │ │ str r0, [sp, #32] │ │ - b.n ba090 │ │ + b.n ba0a0 │ │ lsls r0, r0, #2 │ │ - b.n ba094 │ │ + b.n ba0a4 │ │ ldrb r4, [r5, #22] │ │ - b.n ba5c4 │ │ - add r4, pc, #76 @ (adr r4, ba5c4 ) │ │ - b.n ba8ba │ │ + b.n ba5d4 │ │ + add r4, pc, #76 @ (adr r4, ba5d4 ) │ │ + b.n ba8ca │ │ movs r1, r0 │ │ - b.n bac3a │ │ + b.n bac4a │ │ lsls r1, r3, #28 │ │ - b.n ba682 │ │ + b.n ba692 │ │ movs r4, r3 │ │ - b.n ba0a0 │ │ + b.n ba0b0 │ │ asrs r4, r5, #32 │ │ - b.n ba0a4 │ │ + b.n ba0b4 │ │ stmia r0!, {r3, r5} │ │ - b.n ba0a8 │ │ - add r0, pc, #96 @ (adr r0, ba5f0 ) │ │ - b.n ba0ac │ │ + b.n ba0b8 │ │ + add r0, pc, #96 @ (adr r0, ba600 ) │ │ + b.n ba0bc │ │ lsls r6, r5, #1 │ │ subs r0, r0, r0 │ │ strb r4, [r6, #15] │ │ - b.n ba0d8 │ │ + b.n ba0e8 │ │ lsls r0, r1, #1 │ │ - b.n ba0c0 │ │ + b.n ba0d0 │ │ strb r7, [r0, #0] │ │ - b.n ba6c0 │ │ + b.n ba6d0 │ │ str r0, [r3, #4] │ │ - b.n ba154 │ │ + b.n ba164 │ │ strb r0, [r2, #1] │ │ - b.n ba0d8 │ │ + b.n ba0e8 │ │ movs r6, r0 │ │ - b.n ba856 │ │ + b.n ba866 │ │ stmia r1!, {r4, r5, r6} │ │ - b.n ba0d2 │ │ + b.n ba0e2 │ │ str r4, [r0, #0] │ │ strh r0, [r4, #12] │ │ ands r0, r0 │ │ - b.n baa88 │ │ + b.n baa98 │ │ ands r4, r0 │ │ - b.n ba5d2 │ │ + b.n ba5e2 │ │ strb r4, [r6, #24] │ │ - b.n ba69a │ │ + b.n ba6aa │ │ movs r7, r7 │ │ - b.n bac74 │ │ + b.n bac84 │ │ lsls r7, r2, #2 │ │ ldrh r0, [r0, #16] │ │ stmia r0!, {r0} │ │ - b.n bad0e │ │ + b.n bad1e │ │ str r0, [sp, #64] @ 0x40 │ │ - b.n ba0ec │ │ - add r7, pc, #112 @ (adr r7, ba644 ) │ │ - b.n ba916 │ │ + b.n ba0fc │ │ + add r7, pc, #112 @ (adr r7, ba654 ) │ │ + b.n ba926 │ │ str r0, [sp, #128] @ 0x80 │ │ - b.n baa88 │ │ + b.n baa98 │ │ strb r0, [r4, #0] │ │ - b.n baaac │ │ + b.n baabc │ │ sbcs r0, r0 │ │ - b.n ba102 │ │ + b.n ba112 │ │ str r4, [r0, #24] │ │ - b.n ba106 │ │ - add r0, pc, #0 @ (adr r0, ba5e8 ) │ │ + b.n ba116 │ │ + add r0, pc, #0 @ (adr r0, ba5f8 ) │ │ strh r0, [r0, r4] │ │ strb r4, [r7, #28] │ │ - b.n ba92e │ │ + b.n ba93e │ │ movs r0, r0 │ │ - b.n baca4 │ │ + b.n bacb4 │ │ ldrb r4, [r3, #4] │ │ str r0, [r4, r6] │ │ stmia r0!, {r0, r1, r2} │ │ - b.n ba906 │ │ + b.n ba916 │ │ asrs r0, r1, #32 │ │ - b.n ba93e │ │ + b.n ba94e │ │ strh r2, [r1, #0] │ │ - b.n ba90a │ │ + b.n ba91a │ │ strh r0, [r0, #12] │ │ - b.n ba106 │ │ + b.n ba116 │ │ strh r1, [r0, #0] │ │ - b.n ba94a │ │ + b.n ba95a │ │ stmia r1!, {r2, r7} │ │ - b.n ba10e │ │ + b.n ba11e │ │ movs r2, r1 │ │ - b.n ba61a │ │ + b.n ba62a │ │ stmia r0!, {r3, r5} │ │ - b.n ba150 │ │ + b.n ba160 │ │ strb r7, [r0, #0] │ │ - b.n ba626 │ │ + b.n ba636 │ │ asrs r4, r5, #32 │ │ - b.n ba158 │ │ + b.n ba168 │ │ movs r7, r0 │ │ - b.n ba942 │ │ + b.n ba952 │ │ movs r1, r4 │ │ subs r0, r0, r0 │ │ str r4, [r1, r0] │ │ - b.n ba144 │ │ - add r0, pc, #8 @ (adr r0, ba634 ) │ │ - b.n ba96e │ │ + b.n ba154 │ │ + add r0, pc, #8 @ (adr r0, ba644 ) │ │ + b.n ba97e │ │ str r4, [r2, r0] │ │ - b.n ba154 │ │ + b.n ba164 │ │ movs r4, #63 @ 0x3f │ │ - b.n bad76 │ │ + b.n bad86 │ │ str r0, [sp, #64] @ 0x40 │ │ - b.n ba174 │ │ + b.n ba184 │ │ strb r1, [r0, #0] │ │ - b.n ba97e │ │ + b.n ba98e │ │ str r4, [r3, #0] │ │ - b.n ba17c │ │ + b.n ba18c │ │ ands r0, r3 │ │ - b.n ba180 │ │ + b.n ba190 │ │ lsls r7, r7, #16 │ │ - b.n bacfc │ │ + b.n bad0c │ │ strh r0, [r1, #0] │ │ - b.n ba168 │ │ + b.n ba178 │ │ strh r3, [r0, #0] │ │ - b.n ba992 │ │ + b.n ba9a2 │ │ movs r0, #9 │ │ adds r1, #160 @ 0xa0 │ │ movs r5, r0 │ │ - b.n ba99a │ │ + b.n ba9aa │ │ asrs r6, r0, #32 │ │ - b.n ba99e │ │ + b.n ba9ae │ │ adds r0, #4 │ │ - b.n ba9a2 │ │ + b.n ba9b2 │ │ ldrb r2, [r3, #5] │ │ add.w r0, r0, r0 │ │ - b.n ba91c │ │ + b.n ba92c │ │ lsls r4, r6, #2 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #1 │ │ - b.n ba1a0 │ │ - b.n ba684 │ │ - b.n ba1ac │ │ + b.n ba1b0 │ │ + b.n ba694 │ │ + b.n ba1bc │ │ cmp r1, #208 @ 0xd0 │ │ - b.n ba9fa │ │ + b.n baa0a │ │ ands r1, r0 │ │ - b.n baba2 │ │ + b.n babb2 │ │ str r0, [r0, r0] │ │ - b.n babc8 │ │ + b.n babd8 │ │ movs r0, #10 │ │ - b.n ba9c6 │ │ + b.n ba9d6 │ │ adds r0, #8 │ │ - b.n ba9ca │ │ - ldr r1, [pc, #960] @ (baa4c ) │ │ - b.n baa0e │ │ + b.n ba9da │ │ + ldr r1, [pc, #960] @ (baa5c ) │ │ + b.n baa1e │ │ str r4, [r1, r0] │ │ - b.n ba1cc │ │ + b.n ba1dc │ │ strh r0, [r1, #0] │ │ - b.n ba1d0 │ │ + b.n ba1e0 │ │ movs r6, r0 │ │ and.w r0, r0, r1 │ │ - b.n badde │ │ + b.n badee │ │ str r0, [r0, r0] │ │ - b.n ba1b2 │ │ + b.n ba1c2 │ │ movs r4, r1 │ │ - b.n ba1b0 │ │ + b.n ba1c0 │ │ movs r0, r0 │ │ - b.n badea │ │ + b.n badfa │ │ lsls r2, r7, #2 │ │ - b.n baa38 │ │ + b.n baa48 │ │ movs r0, r0 │ │ - b.n bad6a │ │ + b.n bad7a │ │ lsls r3, r1, #2 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n badfa │ │ + b.n bae0a │ │ asrs r5, r0, #32 │ │ - b.n ba9fe │ │ + b.n baa0e │ │ movs r0, r1 │ │ - b.n ba1cc │ │ + b.n ba1dc │ │ movs r2, r0 │ │ - b.n baa06 │ │ + b.n baa16 │ │ movs r0, #14 │ │ - b.n baa0a │ │ + b.n baa1a │ │ adds r0, #16 │ │ - b.n ba1d8 │ │ + b.n ba1e8 │ │ mrc2 11, 0, lr, cr11, cr15, {7} @ │ │ movs r4, r0 │ │ - b.n ba1e6 │ │ - beq.n ba710 │ │ - b.n bab70 │ │ + b.n ba1f6 │ │ + beq.n ba720 │ │ + b.n bab80 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r5, r7, r9} │ │ - b.n ba220 │ │ + b.n ba230 │ │ movs r2, #221 @ 0xdd │ │ - b.n bace6 │ │ + b.n bacf6 │ │ asrs r4, r5, #10 │ │ - b.n ba228 │ │ + b.n ba238 │ │ movs r0, r0 │ │ - b.n ba80c │ │ + b.n ba81c │ │ asrs r1, r0, #32 │ │ - b.n ba810 │ │ - strh r0, [r0, #14] │ │ + b.n ba820 │ │ + strh r7, [r7, #12] │ │ @ instruction: 0xebff705c │ │ - b.n ba2ae │ │ + b.n ba2be │ │ movs r4, r0 │ │ - b.n bae3e │ │ + b.n bae4e │ │ str r4, [r1, #0] │ │ - b.n baa42 │ │ + b.n baa52 │ │ asrs r4, r5, #32 │ │ - b.n ba220 │ │ + b.n ba230 │ │ adds r0, #32 │ │ - b.n ba224 │ │ + b.n ba234 │ │ str r0, [sp, #56] @ 0x38 │ │ - b.n baa4e │ │ + b.n baa5e │ │ lsls r6, r3, #28 │ │ - b.n ba812 │ │ + b.n ba822 │ │ movs r0, #36 @ 0x24 │ │ - b.n ba230 │ │ - ldrb r5, [r6, #0] │ │ + b.n ba240 │ │ + ldrb r1, [r7, #0] │ │ add.w r0, r0, r0 │ │ - b.n badbe │ │ + b.n badce │ │ lsls r5, r7, #1 │ │ lsrs r0, r0, #8 │ │ asrs r7, r0, #32 │ │ - b.n ba2da │ │ + b.n ba2ea │ │ str r4, [r0, r0] │ │ - b.n bac2a │ │ + b.n bac3a │ │ movs r1, r0 │ │ - b.n bad50 │ │ + b.n bad60 │ │ vpmin.u , q13, │ │ bx r3 │ │ - b.n baa76 │ │ + b.n baa86 │ │ movs r2, r0 │ │ - b.n badec │ │ + b.n badfc │ │ lsls r5, r3, #1 │ │ subs r2, #0 │ │ movs r1, r1 │ │ - b.n baa82 │ │ + b.n baa92 │ │ asrs r4, r2, #32 │ │ - b.n bae86 │ │ + b.n bae96 │ │ movs r1, r0 │ │ - b.n babdc │ │ + b.n babec │ │ strb r0, [r2, #28] │ │ - b.n ba850 │ │ + b.n ba860 │ │ vpmin.u32 q15, , │ │ movs r0, r0 │ │ - b.n bae12 │ │ + b.n bae22 │ │ str r4, [r1, r0] │ │ - b.n ba274 │ │ + b.n ba284 │ │ movs r0, #36 @ 0x24 │ │ - b.n ba278 │ │ + b.n ba288 │ │ adds r0, #32 │ │ - b.n ba27c │ │ + b.n ba28c │ │ lsls r5, r2, #1 │ │ lsrs r0, r0, #8 │ │ strh r0, [r1, #0] │ │ - b.n ba284 │ │ + b.n ba294 │ │ strh r0, [r6, #0] │ │ - b.n bac88 │ │ + b.n bac98 │ │ strb r0, [r0, #0] │ │ - b.n baeb2 │ │ - add r0, pc, #12 @ (adr r0, ba780 ) │ │ - b.n baab6 │ │ + b.n baec2 │ │ + add r0, pc, #12 @ (adr r0, ba790 ) │ │ + b.n baac6 │ │ str r6, [r1, #0] │ │ - b.n baaba │ │ + b.n baaca │ │ str r0, [sp, #0] │ │ - b.n baebe │ │ + b.n baece │ │ movs r3, r0 │ │ and.w r0, r0, ip, asr #4 │ │ - b.n ba2c0 │ │ - add r0, pc, #4 @ (adr r0, ba78c ) │ │ - b.n bac9e │ │ + b.n ba2d0 │ │ + add r0, pc, #4 @ (adr r0, ba79c ) │ │ + b.n bacae │ │ str r1, [r0, #0] │ │ - b.n bac3a │ │ + b.n bac4a │ │ movs r6, r6 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n baad6 │ │ + b.n baae6 │ │ asrs r2, r1, #32 │ │ - b.n baada │ │ + b.n baaea │ │ lsrs r5, r7, #11 │ │ add.w r0, r0, r0 │ │ - b.n bae42 │ │ + b.n bae52 │ │ @ instruction: 0xfff61aff │ │ asrs r4, r5, #32 │ │ - b.n ba2e4 │ │ + b.n ba2f4 │ │ strb r1, [r0, #0] │ │ - b.n bacbc │ │ + b.n baccc │ │ movs r0, #28 │ │ - b.n ba2ec │ │ + b.n ba2fc │ │ adds r0, #8 │ │ - b.n baaf6 │ │ + b.n bab06 │ │ movs r1, #137 @ 0x89 │ │ - b.n ba6ca │ │ + b.n ba6da │ │ movs r1, #137 @ 0x89 │ │ - b.n ba8ce │ │ + b.n ba8de │ │ str r0, [sp, #4] │ │ - b.n bacd4 │ │ + b.n bace4 │ │ movs r0, r1 │ │ - b.n ba2e8 │ │ + b.n ba2f8 │ │ lsls r0, r0, #1 │ │ - b.n bae7c │ │ + b.n bae8c │ │ movs r4, r0 │ │ - b.n ba2d2 │ │ + b.n ba2e2 │ │ @ instruction: 0xffec1aff │ │ movs r4, r2 │ │ - b.n ba2f8 │ │ + b.n ba308 │ │ str r0, [sp, #0] │ │ - b.n baf1a │ │ + b.n baf2a │ │ asrs r0, r3, #32 │ │ - b.n ba318 │ │ + b.n ba328 │ │ movs r0, #64 @ 0x40 │ │ - b.n baf22 │ │ + b.n baf32 │ │ lsls r2, r0, #8 │ │ stmia.w sp, {r3, ip} │ │ - b.n bab2a │ │ + b.n bab3a │ │ lsrs r0, r2, #12 │ │ add.w r0, r0, ip, asr #4 │ │ - b.n ba32c │ │ + b.n ba33c │ │ lsls r0, r1, #1 │ │ - b.n ba318 │ │ + b.n ba328 │ │ cmp r1, #208 @ 0xd0 │ │ - b.n bab7a │ │ + b.n bab8a │ │ movs r1, #240 @ 0xf0 │ │ - b.n bab98 │ │ + b.n baba8 │ │ movs r1, #208 @ 0xd0 │ │ - b.n bab9c │ │ + b.n babac │ │ rors r0, r2 │ │ - b.n baba0 │ │ + b.n babb0 │ │ movs r0, #1 │ │ - b.n bad2e │ │ + b.n bad3e │ │ adds r0, #0 │ │ - b.n bad58 │ │ + b.n bad68 │ │ cmp r1, #240 @ 0xf0 │ │ - b.n bab92 │ │ + b.n baba2 │ │ movs r0, #64 @ 0x40 │ │ - b.n baf56 │ │ + b.n baf66 │ │ lsls r4, r3, #1 │ │ - b.n ba3bc │ │ + b.n ba3cc │ │ adds r0, #24 │ │ - b.n ba358 │ │ + b.n ba368 │ │ adds r0, #18 │ │ - b.n ba928 │ │ + b.n ba938 │ │ adds r0, #24 │ │ - b.n ba340 │ │ + b.n ba350 │ │ @ instruction: 0xffd6eaff │ │ movs r4, r5 │ │ - b.n ba368 │ │ + b.n ba378 │ │ asrs r4, r6, #24 │ │ - b.n bab72 │ │ + b.n bab82 │ │ str r2, [r0, #0] │ │ - b.n bab76 │ │ + b.n bab86 │ │ strb r3, [r0, #0] │ │ - b.n bab7a │ │ + b.n bab8a │ │ str r0, [sp, #56] @ 0x38 │ │ - b.n bab7e │ │ + b.n bab8e │ │ ands r0, r0 │ │ - b.n bab82 │ │ + b.n bab92 │ │ lsrs r0, r3, #12 │ │ @ instruction: 0xeb00c028 │ │ - b.n ba384 │ │ + b.n ba394 │ │ asrs r4, r0, #32 │ │ - b.n bab8e │ │ - b.n ba862 │ │ - b.n bab92 │ │ + b.n bab9e │ │ + b.n ba872 │ │ + b.n baba2 │ │ adds r0, #7 │ │ - b.n bab96 │ │ + b.n baba6 │ │ movs r0, #6 │ │ - b.n bab9a │ │ + b.n babaa │ │ movs r0, r0 │ │ - b.n baefe │ │ + b.n baf0e │ │ @ instruction: 0xff921aff │ │ movs r0, r1 │ │ - b.n ba388 │ │ + b.n ba398 │ │ movs r0, r2 │ │ - b.n ba384 │ │ + b.n ba394 │ │ vpmin.u32 q15, , │ │ movs r0, r0 │ │ - b.n baf24 │ │ + b.n baf34 │ │ movs r5, r1 │ │ lsrs r0, r0, #8 │ │ movs r4, r2 │ │ - b.n ba39c │ │ + b.n ba3ac │ │ asrs r0, r0, #32 │ │ - b.n bafbe │ │ + b.n bafce │ │ movs r0, #24 │ │ - b.n ba3bc │ │ + b.n ba3cc │ │ movs r0, #0 │ │ - b.n ba3a0 │ │ + b.n ba3b0 │ │ movs r0, #9 │ │ - b.n babca │ │ + b.n babda │ │ asrs r4, r0, #32 │ │ - b.n ba3a8 │ │ + b.n ba3b8 │ │ asrs r0, r6, #32 │ │ - b.n badac │ │ + b.n badbc │ │ lsrs r6, r4, #11 │ │ add.w r0, r0, ip, asr #4 │ │ - b.n ba3d4 │ │ + b.n ba3e4 │ │ lsls r0, r1, #1 │ │ - b.n ba3c0 │ │ + b.n ba3d0 │ │ cmp r1, #208 @ 0xd0 │ │ - b.n bac22 │ │ + b.n bac32 │ │ ands r1, r0 │ │ - b.n badca │ │ + b.n badda │ │ str r0, [r0, r0] │ │ - b.n badf0 │ │ - ldr r1, [pc, #960] @ (bac6c ) │ │ - b.n bac2e │ │ + b.n bae00 │ │ + ldr r1, [pc, #960] @ (bac7c ) │ │ + b.n bac3e │ │ strh r0, [r1, #0] │ │ - b.n ba3ec │ │ + b.n ba3fc │ │ movs r2, r0 │ │ and.w r0, r0, r4, lsr #28 │ │ - b.n baffa │ │ + b.n bb00a │ │ vpmin.u16 q7, q10, │ │ strb r0, [r0, #0] │ │ - b.n bb002 │ │ + b.n bb012 │ │ movs r0, r5 │ │ - b.n ba400 │ │ + b.n ba410 │ │ movs r0, #36 @ 0x24 │ │ - b.n ba404 │ │ + b.n ba414 │ │ adds r0, #32 │ │ - b.n ba408 │ │ + b.n ba418 │ │ movs r0, r0 │ │ - b.n baf72 │ │ - b.n ba8e4 │ │ - b.n ba40c │ │ + b.n baf82 │ │ + b.n ba8f4 │ │ + b.n ba41c │ │ str r4, [r1, r0] │ │ - b.n ba414 │ │ + b.n ba424 │ │ vpmin.u q8, , │ │ movs r6, r1 │ │ - b.n bab90 │ │ + b.n baba0 │ │ vpmin.u q8, , │ │ lsls r4, r3, #1 │ │ - b.n ba48c │ │ + b.n ba49c │ │ ands r2, r0 │ │ - b.n bac2e │ │ + b.n bac3e │ │ movs r0, #255 @ 0xff │ │ - b.n bb032 │ │ + b.n bb042 │ │ str r3, [r0, #0] │ │ - b.n bac36 │ │ + b.n bac46 │ │ asrs r6, r3, #32 │ │ - b.n bac3a │ │ + b.n bac4a │ │ movs r5, r0 │ │ - b.n bac3e │ │ + b.n bac4e │ │ str r6, [r1, r0] │ │ - b.n bac42 │ │ - ldr r2, [r5, #28] │ │ - mla r0, r0, r5, lr │ │ - b.n bac4a │ │ + b.n bac52 │ │ + ldr r7, [r3, #36] @ 0x24 │ │ + @ instruction: 0xfa00e005 │ │ + b.n bac5a │ │ str r0, [r0, r0] │ │ - b.n ba43e │ │ + b.n ba44e │ │ adds r0, #6 │ │ - b.n bac52 │ │ + b.n bac62 │ │ movs r0, #4 │ │ - b.n bac56 │ │ + b.n bac66 │ │ vpmin.u32 q15, q11, │ │ movs r4, r4 │ │ - b.n ba458 │ │ + b.n ba468 │ │ movs r0, #0 │ │ - b.n bb062 │ │ + b.n bb072 │ │ movs r0, #0 │ │ - b.n ba436 │ │ + b.n ba446 │ │ asrs r4, r0, #32 │ │ - b.n ba44a │ │ + b.n ba45a │ │ asrs r2, r0, #32 │ │ - b.n bb030 │ │ + b.n bb040 │ │ asrs r4, r0, #32 │ │ - b.n ba432 │ │ + b.n ba442 │ │ movs r4, r1 │ │ - b.n bb076 │ │ + b.n bb086 │ │ movs r4, r0 │ │ - b.n ba44a │ │ - beq.n ba974 │ │ - b.n badd4 │ │ + b.n ba45a │ │ + beq.n ba984 │ │ + b.n bade4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0} │ │ - b.n bb026 │ │ + b.n bb036 │ │ movs r3, r0 │ │ - bge.n ba94a │ │ + bge.n ba95a │ │ str r6, [r0, #0] │ │ - b.n baa4e │ │ + b.n baa5e │ │ ands r4, r0 │ │ - b.n baa52 │ │ + b.n baa62 │ │ str r0, [sp, #0] │ │ - b.n ba9e8 │ │ + b.n ba9f8 │ │ movs r3, r0 │ │ and.w r7, r0, ip, ror #30 │ │ add.w r0, r0, r0 │ │ - b.n ba482 │ │ + b.n ba492 │ │ movs r4, r0 │ │ - b.n bb006 │ │ + b.n bb016 │ │ vpmin.u8 , q8, │ │ lsls r7, r7, #16 │ │ - b.n bb020 │ │ + b.n bb030 │ │ movs r4, #63 @ 0x3f │ │ - b.n bb0b2 │ │ + b.n bb0c2 │ │ movs r0, #9 │ │ adds r1, #160 @ 0xa0 │ │ movs r5, r0 │ │ - b.n bacba │ │ + b.n bacca │ │ asrs r6, r0, #32 │ │ - b.n bacbe │ │ + b.n bacce │ │ adds r0, #4 │ │ - b.n bacc2 │ │ + b.n bacd2 │ │ ldrb r2, [r2, #2] │ │ add.w r0, r0, r0 │ │ - b.n bac3c │ │ + b.n bac4c │ │ vpmin.u q0, , │ │ @ instruction: 0xffebeaff │ │ - cmp r4, r5 │ │ + cmp r4, r7 │ │ movs r2, r0 │ │ - cmp r3, #105 @ 0x69 │ │ - vqshl.u64 d18, d15, #53 @ 0x35 │ │ + cmp r4, #153 @ 0x99 │ │ + vqshrun.s64 d18, q1, #11 │ │ @ instruction: 0xfff54ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n baec0 │ │ + b.n baed0 │ │ svc 109 @ 0x6d │ │ - b.n bae44 │ │ + b.n bae54 │ │ strb r4, [r1, #0] │ │ - b.n ba4d0 │ │ + b.n ba4e0 │ │ str r0, [r0, #0] │ │ - b.n bacf2 │ │ + b.n bad02 │ │ asrs r4, r5, #1 │ │ - b.n ba4d0 │ │ + b.n ba4e0 │ │ strh r3, [r0, #0] │ │ - b.n bacfa │ │ + b.n bad0a │ │ movs r0, r6 │ │ - b.n baecc │ │ + b.n baedc │ │ lsls r4, r3, #1 │ │ - b.n ba4dc │ │ - add r0, pc, #256 @ (adr r0, baac4 ) │ │ - b.n ba4f4 │ │ + b.n ba4ec │ │ + add r0, pc, #256 @ (adr r0, baad4 ) │ │ + b.n ba504 │ │ str r2, [r0, r0] │ │ - b.n bad0a │ │ + b.n bad1a │ │ ldr r7, [sp, #736] @ 0x2e0 │ │ - b.n ba50c │ │ + b.n ba51c │ │ movs r2, r0 │ │ - b.n bb076 │ │ + b.n bb086 │ │ str r0, [r2, #8] │ │ - b.n ba4f0 │ │ + b.n ba500 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n baaf8 │ │ + b.n bab08 │ │ movs r0, #112 @ 0x70 │ │ - b.n ba4f8 │ │ + b.n ba508 │ │ strb r4, [r2, #2] │ │ - b.n ba4fc │ │ + b.n ba50c │ │ movs r0, r2 │ │ subs r2, #0 │ │ lsrs r0, r2, #19 │ │ - b.n bad7e │ │ + b.n bad8e │ │ movs r1, r0 │ │ - b.n bad0e │ │ + b.n bad1e │ │ movs r6, r2 │ │ lsrs r0, r0, #8 │ │ movs r4, r5 │ │ - b.n ba528 │ │ + b.n ba538 │ │ asrs r0, r5, #2 │ │ - b.n baf14 │ │ + b.n baf24 │ │ ldrb r4, [r2, #0] │ │ @ instruction: 0xeb00c00a │ │ - b.n bad42 │ │ + b.n bad52 │ │ movs r0, r0 │ │ - b.n bb0a6 │ │ + b.n bb0b6 │ │ lsls r3, r1, #25 │ │ subs r0, r0, r0 │ │ asrs r4, r5, #2 │ │ - b.n ba548 │ │ + b.n ba558 │ │ cmp r2, #0 │ │ - b.n bb02a │ │ + b.n bb03a │ │ lsls r0, r5, #2 │ │ - b.n ba550 │ │ + b.n ba560 │ │ cmp r3, #154 @ 0x9a │ │ - b.n bb0a0 │ │ + b.n bb0b0 │ │ vaddw.s8 q15, , d16 │ │ asrs r0, r2, #10 │ │ - b.n babfe │ │ - add r0, pc, #32 @ (adr r0, baa44 ) │ │ - b.n bad66 │ │ + b.n bac0e │ │ + add r0, pc, #32 @ (adr r0, baa54 ) │ │ + b.n bad76 │ │ movs r4, r1 │ │ and.w r0, r0, r0 │ │ - b.n bb16e │ │ + b.n bb17e │ │ asrs r0, r0, #32 │ │ - b.n bb172 │ │ + b.n bb182 │ │ lsls r4, r2, #1 │ │ - b.n ba550 │ │ + b.n ba560 │ │ movs r1, r0 │ │ - b.n bb17a │ │ - b.n baa3c │ │ - b.n bb17e │ │ + b.n bb18a │ │ + b.n baa4c │ │ + b.n bb18e │ │ asrs r4, r5, #32 │ │ - b.n ba458 │ │ + b.n ba468 │ │ asrs r0, r6, #32 │ │ - b.n ba45c │ │ + b.n ba46c │ │ movs r0, r5 │ │ - b.n ba460 │ │ + b.n ba470 │ │ movs r6, r1 │ │ @ instruction: 0xea00c00a │ │ - b.n bad92 │ │ - add r0, pc, #32 @ (adr r0, baa74 ) │ │ - b.n bad96 │ │ - asrs r0, r0, #32 │ │ - b.n bb19a │ │ - b.n baa5c │ │ - b.n bb19e │ │ + b.n bada2 │ │ + add r0, pc, #32 @ (adr r0, baa84 ) │ │ + b.n bada6 │ │ + asrs r0, r0, #32 │ │ + b.n bb1aa │ │ + b.n baa6c │ │ + b.n bb1ae │ │ strh r0, [r4, #4] │ │ - b.n ba590 │ │ + b.n ba5a0 │ │ movs r1, r0 │ │ - b.n bb1a6 │ │ + b.n bb1b6 │ │ asrs r4, r2, #1 │ │ - b.n ba584 │ │ + b.n ba594 │ │ asrs r0, r6, #32 │ │ - b.n ba484 │ │ + b.n ba494 │ │ asrs r0, r0, #32 │ │ - b.n ba5a2 │ │ + b.n ba5b2 │ │ movs r0, r5 │ │ - b.n ba48c │ │ + b.n ba49c │ │ movs r5, r0 │ │ - b.n bad1c │ │ - b.n baad4 │ │ - b.n ba494 │ │ + b.n bad2c │ │ + b.n baae4 │ │ + b.n ba4a4 │ │ lsls r4, r0, #16 │ │ cmp r2, #0 │ │ strh r2, [r1, #0] │ │ - b.n badc6 │ │ - add r0, pc, #48 @ (adr r0, baab8 ) │ │ - b.n badca │ │ + b.n badd6 │ │ + add r0, pc, #48 @ (adr r0, baac8 ) │ │ + b.n badda │ │ asrs r4, r5, #1 │ │ - b.n ba5c8 │ │ + b.n ba5d8 │ │ lsls r4, r0, #1 │ │ - b.n ba5c0 │ │ - b.n bab44 │ │ - b.n ba5b0 │ │ + b.n ba5d0 │ │ + b.n bab54 │ │ + b.n ba5c0 │ │ asrs r0, r2, #32 │ │ - b.n ba5bc │ │ - add r0, pc, #480 @ (adr r0, bac7c ) │ │ - b.n ba5b8 │ │ + b.n ba5cc │ │ + add r0, pc, #480 @ (adr r0, bac8c ) │ │ + b.n ba5c8 │ │ movs r0, r0 │ │ - b.n bad44 │ │ + b.n bad54 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ asrs r4, r5, #1 │ │ - b.n ba5e4 │ │ + b.n ba5f4 │ │ asrs r4, r0, #32 │ │ - b.n ba650 │ │ + b.n ba660 │ │ asrs r0, r1, #32 │ │ - b.n badb4 │ │ + b.n badc4 │ │ movs r2, r0 │ │ - b.n bb0d8 │ │ + b.n bb0e8 │ │ lsls r7, r0, #17 │ │ lsrs r0, r0, #8 │ │ movs r2, #208 @ 0xd0 │ │ - b.n bae3e │ │ + b.n bae4e │ │ asrs r3, r0, #32 │ │ - b.n bade6 │ │ + b.n badf6 │ │ lsls r1, r2, #22 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #32 │ │ - b.n ba5fe │ │ + b.n ba60e │ │ movs r0, #16 │ │ - b.n bb20e │ │ + b.n bb21e │ │ movs r0, r0 │ │ - b.n bb17c │ │ + b.n bb18c │ │ subs r1, r4, r4 │ │ - b.n baada │ │ + b.n baaea │ │ strh r0, [r1, #0] │ │ - b.n babdc │ │ + b.n babec │ │ asrs r4, r1, #32 │ │ asrs r0, r2, #22 │ │ movs r0, r0 │ │ asrs r1, r2, #13 │ │ lsls r1, r3, #16 │ │ subs r0, r0, r0 │ │ asrs r4, r7, #3 │ │ - b.n ba69e │ │ + b.n ba6ae │ │ movs r0, r0 │ │ - b.n bb190 │ │ + b.n bb1a0 │ │ lsls r6, r3, #16 │ │ lsrs r0, r0, #8 │ │ subs r3, r4, #0 │ │ - b.n bb004 │ │ + b.n bb014 │ │ movs r0, #0 │ │ - b.n bb23a │ │ + b.n bb24a │ │ movs r0, #0 │ │ - b.n ba680 │ │ + b.n ba690 │ │ asrs r4, r0, #2 │ │ - b.n ba636 │ │ + b.n ba646 │ │ adds r0, #43 @ 0x2b │ │ - b.n bb2c6 │ │ + b.n bb2d6 │ │ movs r0, #76 @ 0x4c │ │ - b.n ba638 │ │ + b.n ba648 │ │ ldrsh r6, [r2, r6] │ │ - b.n bb010 │ │ + b.n bb020 │ │ str r4, [r3, r2] │ │ - b.n ba62c │ │ + b.n ba63c │ │ lsls r0, r5, #9 │ │ - b.n ba618 │ │ + b.n ba628 │ │ lsrs r2, r1, #29 │ │ - b.n bb028 │ │ + b.n bb038 │ │ adds r0, #180 @ 0xb4 │ │ - b.n baea8 │ │ + b.n baeb8 │ │ adds r0, #92 @ 0x5c │ │ - b.n ba65c │ │ + b.n ba66c │ │ lsls r0, r4, #1 │ │ - b.n ba640 │ │ + b.n ba650 │ │ lsls r0, r4, #2 │ │ - b.n bb038 │ │ + b.n bb048 │ │ ldrsh r2, [r4, r5] │ │ - b.n bb034 │ │ + b.n bb044 │ │ str r4, [r0, r2] │ │ - b.n ba64c │ │ + b.n ba65c │ │ ldrb r6, [r0, r4] │ │ - b.n bb03c │ │ + b.n bb04c │ │ str r4, [r1, r2] │ │ - b.n ba654 │ │ + b.n ba664 │ │ str r0, [r0, r3] │ │ - b.n bb052 │ │ + b.n bb062 │ │ movs r2, #96 @ 0x60 │ │ - b.n ba644 │ │ + b.n ba654 │ │ lsls r4, r7, #1 │ │ - b.n ba660 │ │ + b.n ba670 │ │ movs r0, #136 @ 0x88 │ │ - b.n bb058 │ │ + b.n bb068 │ │ lsls r0, r0, #2 │ │ - b.n bb05c │ │ + b.n bb06c │ │ str r0, [r1, r1] │ │ - b.n ba66c │ │ + b.n ba67c │ │ ldrsh r6, [r3, r5] │ │ - b.n bb05c │ │ + b.n bb06c │ │ lsls r4, r1, #1 │ │ - b.n ba674 │ │ + b.n ba684 │ │ lsrs r5, r6, #30 │ │ - b.n bb060 │ │ - add r0, pc, #16 @ (adr r0, bab70 ) │ │ - b.n bb322 │ │ + b.n bb070 │ │ + add r0, pc, #16 @ (adr r0, bab80 ) │ │ + b.n bb332 │ │ str r4, [r0, r1] │ │ - b.n ba680 │ │ + b.n ba690 │ │ str r0, [r0, r2] │ │ - b.n bb070 │ │ + b.n bb080 │ │ adds r0, #120 @ 0x78 │ │ - b.n bb074 │ │ + b.n bb084 │ │ lsls r0, r5, #1 │ │ - b.n ba68c │ │ + b.n ba69c │ │ lsrs r5, r3, #30 │ │ - b.n bb078 │ │ + b.n bb088 │ │ str r0, [r1, r2] │ │ - b.n ba694 │ │ + b.n ba6a4 │ │ adds r0, #152 @ 0x98 │ │ - b.n ba698 │ │ + b.n ba6a8 │ │ strb r4, [r4, #9] │ │ - b.n ba684 │ │ + b.n ba694 │ │ lsls r4, r4, #1 │ │ - b.n ba6a0 │ │ + b.n ba6b0 │ │ movs r0, #80 @ 0x50 │ │ - b.n ba6a4 │ │ + b.n ba6b4 │ │ lsls r2, r0, #2 │ │ - b.n ba73c │ │ + b.n ba74c │ │ asrs r2, r0, #32 │ │ - b.n baed2 │ │ + b.n baee2 │ │ strh r0, [r0, #4] │ │ - b.n ba6b0 │ │ + b.n ba6c0 │ │ movs r1, #128 @ 0x80 │ │ - b.n baafc │ │ + b.n bab0c │ │ lsls r0, r0, #1 │ │ - b.n ba6cc │ │ + b.n ba6dc │ │ adds r0, #4 │ │ - b.n ba6c4 │ │ + b.n ba6d4 │ │ asrs r6, r5, #13 │ │ add.w r0, r0, r0, lsl #9 │ │ - b.n ba6d8 │ │ + b.n ba6e8 │ │ adds r1, #8 │ │ - b.n ba712 │ │ + b.n ba722 │ │ strb r4, [r0, #0] │ │ - b.n ba6d6 │ │ + b.n ba6e6 │ │ adds r0, #3 │ │ - b.n babf6 │ │ + b.n bac06 │ │ strb r7, [r0, #0] │ │ - b.n babfc │ │ + b.n bac0c │ │ adds r0, #7 │ │ - b.n baee4 │ │ + b.n baef4 │ │ strb r4, [r2, #2] │ │ - b.n ba6fc │ │ + b.n ba70c │ │ lsls r0, r6, #3 │ │ asrs r2, r0, #7 │ │ lsls r0, r0, #1 │ │ - b.n ba6f8 │ │ + b.n ba708 │ │ asrs r4, r3, #1 │ │ - b.n ba708 │ │ + b.n ba718 │ │ movs r1, #8 │ │ - b.n ba6f2 │ │ + b.n ba702 │ │ lsrs r0, r2 │ │ - b.n baf58 │ │ + b.n baf68 │ │ lsls r4, r1, #4 │ │ - b.n ba6fa │ │ + b.n ba70a │ │ asrs r4, r0, #32 │ │ - b.n bac82 │ │ + b.n bac92 │ │ asrs r5, r0, #32 │ │ - b.n bad82 │ │ + b.n bad92 │ │ lsls r3, r2, #20 │ │ cmp r2, #0 │ │ str r0, [sp, #512] @ 0x200 │ │ - b.n ba724 │ │ + b.n ba734 │ │ asrs r0, r0, #32 │ │ - b.n bb32e │ │ + b.n bb33e │ │ asrs r4, r6, #32 │ │ - b.n ba608 │ │ + b.n ba618 │ │ movs r0, r2 │ │ - b.n bb228 │ │ + b.n bb238 │ │ asrs r0, r7, #32 │ │ - b.n ba610 │ │ + b.n ba620 │ │ movs r2, r3 │ │ subs r0, r0, r0 │ │ asrs r0, r1, #2 │ │ - b.n ba73c │ │ + b.n ba74c │ │ lsrs r0, r2 │ │ - b.n baf88 │ │ + b.n baf98 │ │ asrs r0, r3, #2 │ │ - b.n ba744 │ │ + b.n ba754 │ │ stmia r0!, {} │ │ - b.n ba730 │ │ + b.n ba740 │ │ str r0, [sp, #16] │ │ - b.n ba734 │ │ + b.n ba744 │ │ asrs r0, r7, #2 │ │ - b.n ba744 │ │ + b.n ba754 │ │ movs r0, r0 │ │ - b.n bb2bc │ │ + b.n bb2cc │ │ movs r6, r2 │ │ lsrs r0, r0, #8 │ │ adds r0, #192 @ 0xc0 │ │ - b.n ba750 │ │ + b.n ba760 │ │ asrs r1, r0, #6 │ │ - b.n bad2c │ │ + b.n bad3c │ │ strh r0, [r1, #0] │ │ - b.n ba64c │ │ + b.n ba65c │ │ strb r4, [r0, #0] │ │ - b.n ba650 │ │ + b.n ba660 │ │ asrs r4, r0, #32 │ │ - b.n bace2 │ │ + b.n bacf2 │ │ asrs r5, r0, #32 │ │ - b.n bade4 │ │ + b.n badf4 │ │ asrs r0, r0, #32 │ │ - b.n bb37a │ │ + b.n bb38a │ │ asrs r1, r0, #32 │ │ adds r3, #0 │ │ adds r0, #4 │ │ - b.n bacfa │ │ + b.n bad0a │ │ adds r0, #5 │ │ - b.n badf8 │ │ + b.n bae08 │ │ adds r0, #0 │ │ - b.n bb38a │ │ + b.n bb39a │ │ adds r0, #1 │ │ adds r3, #0 │ │ stmia r0!, {r0} │ │ - b.n bac58 │ │ + b.n bac68 │ │ asrs r1, r0, #32 │ │ - b.n bb0fe │ │ + b.n bb10e │ │ adds r0, #0 │ │ - b.n bb1e4 │ │ + b.n bb1f4 │ │ movs r0, r0 │ │ - b.n bb316 │ │ + b.n bb326 │ │ adds r0, #7 │ │ lsls r0, r4, #6 │ │ asrs r0, r1, #32 │ │ lsls r0, r4, #6 │ │ movs r1, r1 │ │ and.w r0, r0, r8, ror #8 │ │ - b.n ba684 │ │ + b.n ba694 │ │ strh r1, [r2, #0] │ │ - b.n bb3b2 │ │ + b.n bb3c2 │ │ movs r4, r6 │ │ - b.n ba68c │ │ + b.n ba69c │ │ movs r3, r3 │ │ and.w r0, r0, r1, lsl #4 │ │ - b.n bb126 │ │ + b.n bb136 │ │ strh r0, [r0, #0] │ │ - b.n bb3c2 │ │ + b.n bb3d2 │ │ adds r0, #0 │ │ - b.n bb210 │ │ + b.n bb220 │ │ strb r4, [r0, #0] │ │ - b.n bad42 │ │ + b.n bad52 │ │ strb r5, [r0, #0] │ │ - b.n bae40 │ │ + b.n bae50 │ │ movs r3, r2 │ │ cmp r2, #0 │ │ str r0, [r6, r1] │ │ - b.n ba7d0 │ │ + b.n ba7e0 │ │ strb r3, [r0, #0] │ │ - b.n bafbc │ │ + b.n bafcc │ │ str r0, [sp, #512] @ 0x200 │ │ - b.n ba7d8 │ │ + b.n ba7e8 │ │ eors r4, r7 │ │ - b.n ba7dc │ │ + b.n ba7ec │ │ asrs r0, r7, #32 │ │ - b.n ba6bc │ │ + b.n ba6cc │ │ adds r0, #52 @ 0x34 │ │ - b.n ba6c0 │ │ + b.n ba6d0 │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ asrs r1, r0, #32 │ │ - b.n bb1d4 │ │ + b.n bb1e4 │ │ strb r4, [r2, #2] │ │ - b.n ba7f0 │ │ + b.n ba800 │ │ adds r0, #0 │ │ - b.n bb200 │ │ + b.n bb210 │ │ asrs r0, r7, #32 │ │ - b.n ba6d4 │ │ + b.n ba6e4 │ │ asrs r2, r0, #32 │ │ - b.n bad64 │ │ + b.n bad74 │ │ strh r1, [r2, #0] │ │ - b.n bb406 │ │ + b.n bb416 │ │ movs r0, r0 │ │ - b.n bae70 │ │ + b.n bae80 │ │ adds r0, #52 @ 0x34 │ │ - b.n ba6e4 │ │ + b.n ba6f4 │ │ movs r5, r0 │ │ subs r2, #0 │ │ lsls r4, r6, #9 │ │ @ instruction: 0xea008000 │ │ - b.n bb41a │ │ + b.n bb42a │ │ strb r4, [r2, #2] │ │ - b.n ba818 │ │ + b.n ba828 │ │ movs r1, r0 │ │ and.w r0, r0, r4, lsr #30 │ │ - b.n ba820 │ │ + b.n ba830 │ │ str r0, [sp, #512] @ 0x200 │ │ - b.n ba824 │ │ + b.n ba834 │ │ str r0, [sp, #512] @ 0x200 │ │ - b.n ba808 │ │ + b.n ba818 │ │ str r0, [sp, #484] @ 0x1e4 │ │ - b.n baad0 │ │ + b.n baae0 │ │ movs r0, r7 │ │ - b.n bb18c │ │ + b.n bb19c │ │ lsls r0, r0, #1 │ │ - b.n ba710 │ │ + b.n ba720 │ │ movs r0, r1 │ │ - b.n bb43e │ │ + b.n bb44e │ │ asrs r0, r0, #1 │ │ - b.n bb198 │ │ + b.n bb1a8 │ │ movs r4, r7 │ │ - b.n ba71c │ │ + b.n ba72c │ │ movs r0, #0 │ │ - b.n bb44a │ │ + b.n bb45a │ │ lsls r4, r3, #2 │ │ - b.n ba848 │ │ + b.n ba858 │ │ adds r0, #8 │ │ - b.n bb052 │ │ + b.n bb062 │ │ ands r0, r1 │ │ - b.n bb056 │ │ - ldrh r4, [r1, #4] │ │ + b.n bb066 │ │ + ldrh r3, [r1, #4] │ │ @ instruction: 0xebff0000 │ │ - b.n bb3be │ │ + b.n bb3ce │ │ movs r4, r0 │ │ - b.n ba82e │ │ + b.n ba83e │ │ lsls r1, r7, #3 │ │ subs r0, r0, r0 │ │ movs r4, r7 │ │ - b.n ba760 │ │ + b.n ba770 │ │ movs r0, r1 │ │ - b.n bb3ce │ │ + b.n bb3de │ │ lsls r6, r3, #14 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n ba76c │ │ + b.n ba77c │ │ movs r0, r2 │ │ - b.n bb36c │ │ + b.n bb37c │ │ movs r0, #64 @ 0x40 │ │ - b.n ba86c │ │ + b.n ba87c │ │ lsls r0, r2, #3 │ │ - b.n bb0c2 │ │ + b.n bb0d2 │ │ adds r1, #8 │ │ - b.n ba86a │ │ + b.n ba87a │ │ movs r1, #12 │ │ - b.n ba86e │ │ + b.n ba87e │ │ asrs r4, r6, #32 │ │ - b.n ba764 │ │ + b.n ba774 │ │ movs r0, r7 │ │ - b.n ba768 │ │ + b.n ba778 │ │ movs r0, r5 │ │ subs r0, r0, r0 │ │ adds r0, #3 │ │ - b.n badfa │ │ + b.n bae0a │ │ movs r0, #2 │ │ - b.n baf00 │ │ + b.n baf10 │ │ lsls r3, r3, #8 │ │ cmp r2, #0 │ │ movs r0, #152 @ 0x98 │ │ - b.n ba8a0 │ │ + b.n ba8b0 │ │ movs r0, #208 @ 0xd0 │ │ - b.n bb0ee │ │ + b.n bb0fe │ │ movs r0, #2 │ │ - b.n bae0e │ │ + b.n bae1e │ │ movs r0, #3 │ │ - b.n baf14 │ │ + b.n baf24 │ │ movs r5, r0 │ │ subs r2, #0 │ │ movs r0, #136 @ 0x88 │ │ - b.n ba8b4 │ │ + b.n ba8c4 │ │ strh r0, [r1, #0] │ │ - b.n bb4be │ │ + b.n bb4ce │ │ movs r0, #208 @ 0xd0 │ │ - b.n bb106 │ │ + b.n bb116 │ │ movs r0, #2 │ │ - b.n bae26 │ │ + b.n bae36 │ │ movs r0, #3 │ │ - b.n baf2c │ │ + b.n baf3c │ │ @ instruction: 0xffd83aff │ │ lsls r0, r7 │ │ - b.n ba8c0 │ │ + b.n ba8d0 │ │ movs r0, r0 │ │ - b.n bb43e │ │ + b.n bb44e │ │ lsls r3, r2, #1 │ │ lsrs r0, r0, #8 │ │ stmia r0!, {r6, r7} │ │ - b.n ba8cc │ │ + b.n ba8dc │ │ movs r0, #4 │ │ - b.n bb0e2 │ │ + b.n bb0f2 │ │ str r4, [r1, r0] │ │ - b.n bb0e6 │ │ + b.n bb0f6 │ │ strb r2, [r0, #4] │ │ - b.n badbe │ │ + b.n badce │ │ adds r0, #5 │ │ - b.n bb0ee │ │ + b.n bb0fe │ │ strb r7, [r0, #0] │ │ - b.n bad18 │ │ + b.n bad28 │ │ str r4, [r0, #0] │ │ - b.n ba8dc │ │ + b.n ba8ec │ │ strb r0, [r0, #0] │ │ - b.n bae68 │ │ + b.n bae78 │ │ strb r1, [r0, #0] │ │ - b.n baf6a │ │ + b.n baf7a │ │ strb r1, [r0, #0] │ │ - b.n bb2c6 │ │ + b.n bb2d6 │ │ str r3, [r0, r0] │ │ adds r1, #160 @ 0xa0 │ │ movs r5, r0 │ │ - b.n bb478 │ │ + b.n bb488 │ │ movs r0, #167 @ 0xa7 │ │ - b.n bb10e │ │ + b.n bb11e │ │ @ instruction: 0xfff48aff │ │ movs r4, r0 │ │ - b.n bb484 │ │ + b.n bb494 │ │ movs r7, r5 │ │ subs r2, #0 │ │ movs r0, #208 @ 0xd0 │ │ - b.n bb168 │ │ + b.n bb178 │ │ str r0, [r2, #8] │ │ - b.n ba91c │ │ + b.n ba92c │ │ movs r0, #0 │ │ - b.n bae8a │ │ + b.n bae9a │ │ movs r0, #1 │ │ - b.n baf90 │ │ + b.n bafa0 │ │ movs r0, #0 │ │ - b.n bb52e │ │ + b.n bb53e │ │ movs r0, #1 │ │ adds r3, #0 │ │ str r2, [r0, r6] │ │ - b.n baf00 │ │ + b.n baf10 │ │ movs r3, r5 │ │ and.w r0, r0, r3, lsl #12 │ │ - b.n bae9e │ │ + b.n baeae │ │ strh r4, [r1, #0] │ │ - b.n bb542 │ │ + b.n bb552 │ │ movs r0, #2 │ │ - b.n bafa8 │ │ + b.n bafb8 │ │ @ instruction: 0xffb92aff │ │ movs r0, #152 @ 0x98 │ │ - b.n ba948 │ │ + b.n ba958 │ │ movs r0, #208 @ 0xd0 │ │ - b.n bb196 │ │ + b.n bb1a6 │ │ movs r0, #2 │ │ - b.n baeb6 │ │ + b.n baec6 │ │ movs r0, #3 │ │ - b.n bafbc │ │ + b.n bafcc │ │ movs r4, r0 │ │ subs r2, #0 │ │ movs r0, #136 @ 0x88 │ │ - b.n ba95c │ │ + b.n ba96c │ │ movs r0, #208 @ 0xd0 │ │ - b.n bb1aa │ │ + b.n bb1ba │ │ movs r0, #2 │ │ - b.n baeca │ │ + b.n baeda │ │ movs r0, #3 │ │ - b.n bafd0 │ │ + b.n bafe0 │ │ @ instruction: 0xffaf3aff │ │ - b.n bafa4 │ │ - b.n ba964 │ │ + b.n bafb4 │ │ + b.n ba974 │ │ movs r0, r0 │ │ - b.n bb4f6 │ │ + b.n bb506 │ │ lsls r0, r7, #1 │ │ lsrs r0, r0, #8 │ │ stmia r0!, {r6, r7} │ │ - b.n ba970 │ │ + b.n ba980 │ │ movs r0, #14 │ │ - b.n bb186 │ │ + b.n bb196 │ │ str r4, [r1, r0] │ │ - b.n bb18a │ │ + b.n bb19a │ │ strb r2, [r0, #4] │ │ - b.n bae62 │ │ + b.n bae72 │ │ adds r0, #5 │ │ - b.n bb192 │ │ + b.n bb1a2 │ │ strb r7, [r0, #0] │ │ - b.n badbc │ │ + b.n badcc │ │ strb r0, [r0, #0] │ │ - b.n baf08 │ │ + b.n baf18 │ │ ands r4, r0 │ │ - b.n ba984 │ │ + b.n ba994 │ │ strb r1, [r0, #0] │ │ - b.n bb366 │ │ + b.n bb376 │ │ ands r1, r0 │ │ - b.n bb00e │ │ + b.n bb01e │ │ str r3, [r0, r0] │ │ adds r1, #160 @ 0xa0 │ │ movs r0, #167 @ 0xa7 │ │ - b.n bb1ae │ │ + b.n bb1be │ │ movs r5, r0 │ │ - b.n bb520 │ │ + b.n bb530 │ │ @ instruction: 0xfff48aff │ │ movs r4, r0 │ │ - b.n bb528 │ │ + b.n bb538 │ │ lsls r6, r2, #1 │ │ subs r2, #0 │ │ movs r0, #208 @ 0xd0 │ │ - b.n bb20c │ │ + b.n bb21c │ │ movs r0, #0 │ │ - b.n baf2a │ │ + b.n baf3a │ │ movs r0, #1 │ │ - b.n bb030 │ │ + b.n bb040 │ │ movs r0, #0 │ │ - b.n bb5ce │ │ + b.n bb5de │ │ movs r0, #1 │ │ adds r3, #0 │ │ str r2, [r0, r6] │ │ - b.n bafa0 │ │ + b.n bafb0 │ │ lsls r2, r2, #1 │ │ and.w r0, r0, r0, lsr #26 │ │ - b.n ba9d8 │ │ + b.n ba9e8 │ │ movs r0, #0 │ │ - b.n bb5e2 │ │ + b.n bb5f2 │ │ movs r2, r0 │ │ - b.n bb554 │ │ + b.n bb564 │ │ movs r4, r0 │ │ subs r2, #0 │ │ movs r0, #208 @ 0xd0 │ │ - b.n bb238 │ │ + b.n bb248 │ │ movs r0, #0 │ │ - b.n baf56 │ │ + b.n baf66 │ │ movs r0, #1 │ │ - b.n bb05c │ │ + b.n bb06c │ │ movs r0, #0 │ │ - b.n bb5fa │ │ + b.n bb60a │ │ movs r0, #1 │ │ adds r3, #0 │ │ strb r4, [r2, #2] │ │ - b.n ba9fc │ │ + b.n baa0c │ │ movs r1, #130 @ 0x82 │ │ - b.n bafd0 │ │ + b.n bafe0 │ │ adds r1, #132 @ 0x84 │ │ - b.n bafe2 │ │ + b.n baff2 │ │ movs r3, r0 │ │ - b.n bb172 │ │ + b.n bb182 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #208 @ 0xd0 │ │ - b.n bb25a │ │ + b.n bb26a │ │ strh r0, [r1, #0] │ │ - b.n bb61a │ │ + b.n bb62a │ │ adds r0, #1 │ │ - b.n baf24 │ │ + b.n baf34 │ │ movs r0, #0 │ │ - b.n baf26 │ │ + b.n baf36 │ │ movs r0, #3 │ │ - b.n bb20a │ │ + b.n bb21a │ │ @ instruction: 0xff810aff │ │ movs r0, #140 @ 0x8c │ │ - b.n baa28 │ │ + b.n baa38 │ │ movs r0, #208 @ 0xd0 │ │ - b.n bb276 │ │ + b.n bb286 │ │ movs r0, #2 │ │ - b.n baf96 │ │ + b.n bafa6 │ │ movs r0, #3 │ │ - b.n bb09c │ │ + b.n bb0ac │ │ movs r5, r0 │ │ subs r2, #0 │ │ movs r0, #132 @ 0x84 │ │ - b.n baa3c │ │ + b.n baa4c │ │ strh r0, [r1, #0] │ │ - b.n bb646 │ │ + b.n bb656 │ │ movs r0, #208 @ 0xd0 │ │ - b.n bb28e │ │ + b.n bb29e │ │ movs r0, #2 │ │ - b.n bafae │ │ + b.n bafbe │ │ movs r0, #3 │ │ - b.n bb0b4 │ │ + b.n bb0c4 │ │ vpmin.u , q11, │ │ rors r0, r0 │ │ - b.n baa48 │ │ + b.n baa58 │ │ strh r0, [r1, #0] │ │ - b.n bb65e │ │ + b.n bb66e │ │ movs r0, r0 │ │ - b.n bb5ca │ │ + b.n bb5da │ │ lsls r5, r0, #2 │ │ lsrs r0, r0, #8 │ │ stmia r1!, {r3, r6, r7} │ │ - b.n baa58 │ │ + b.n baa68 │ │ movs r0, #4 │ │ - b.n bb26e │ │ + b.n bb27e │ │ str r4, [r1, r0] │ │ - b.n bb272 │ │ + b.n bb282 │ │ strb r2, [r0, #4] │ │ - b.n baf4a │ │ + b.n baf5a │ │ adds r0, #5 │ │ - b.n bb27a │ │ + b.n bb28a │ │ strb r7, [r0, #0] │ │ - b.n baea4 │ │ + b.n baeb4 │ │ str r4, [r0, #0] │ │ - b.n baa68 │ │ + b.n baa78 │ │ strb r0, [r0, #0] │ │ - b.n baff4 │ │ + b.n bb004 │ │ strb r1, [r0, #0] │ │ - b.n bb0f6 │ │ + b.n bb106 │ │ strb r1, [r0, #0] │ │ - b.n bb452 │ │ + b.n bb462 │ │ str r3, [r0, r0] │ │ adds r1, #160 @ 0xa0 │ │ movs r5, r0 │ │ - b.n bb604 │ │ + b.n bb614 │ │ movs r0, #167 @ 0xa7 │ │ - b.n bb29a │ │ + b.n bb2aa │ │ @ instruction: 0xfff48aff │ │ movs r4, r0 │ │ - b.n bb610 │ │ + b.n bb620 │ │ movs r7, r0 │ │ subs r2, #0 │ │ movs r0, #208 @ 0xd0 │ │ - b.n bb2f4 │ │ + b.n bb304 │ │ str r0, [r2, #8] │ │ - b.n baaa8 │ │ + b.n baab8 │ │ movs r0, #0 │ │ - b.n bb016 │ │ + b.n bb026 │ │ movs r0, #1 │ │ - b.n bb11c │ │ + b.n bb12c │ │ movs r0, #0 │ │ - b.n bb6ba │ │ + b.n bb6ca │ │ movs r0, #1 │ │ adds r3, #0 │ │ str r2, [r0, r6] │ │ - b.n bb08c │ │ + b.n bb09c │ │ movs r3, r0 │ │ and.w r0, r0, r0, lsr #26 │ │ - b.n baac4 │ │ + b.n baad4 │ │ movs r0, #0 │ │ - b.n bb6ce │ │ + b.n bb6de │ │ movs r2, r0 │ │ - b.n bb640 │ │ + b.n bb650 │ │ movs r4, r0 │ │ subs r2, #0 │ │ movs r0, #208 @ 0xd0 │ │ - b.n bb324 │ │ + b.n bb334 │ │ movs r0, #0 │ │ - b.n bb042 │ │ + b.n bb052 │ │ movs r0, #1 │ │ - b.n bb148 │ │ + b.n bb158 │ │ movs r0, #0 │ │ - b.n bb6e6 │ │ + b.n bb6f6 │ │ movs r0, #1 │ │ adds r3, #0 │ │ strb r4, [r2, #2] │ │ - b.n baae8 │ │ + b.n baaf8 │ │ movs r1, #130 @ 0x82 │ │ - b.n bb0bc │ │ + b.n bb0cc │ │ adds r1, #132 @ 0x84 │ │ - b.n bb0ce │ │ + b.n bb0de │ │ movs r3, r0 │ │ - b.n bb25e │ │ + b.n bb26e │ │ lsls r7, r3, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, #208 @ 0xd0 │ │ - b.n bb346 │ │ + b.n bb356 │ │ asrs r1, r0, #32 │ │ - b.n bb00c │ │ + b.n bb01c │ │ strh r0, [r1, #0] │ │ - b.n bb70a │ │ + b.n bb71a │ │ movs r0, r0 │ │ - b.n bb012 │ │ + b.n bb022 │ │ movs r1, r0 │ │ - b.n bb2f2 │ │ + b.n bb302 │ │ vpmin.u8 q8, q11, │ │ lsls r0, r3, #1 │ │ and.w r0, r0, r0, lsl #8 │ │ - b.n bb71e │ │ + b.n bb72e │ │ movs r2, r0 │ │ - b.n bb690 │ │ + b.n bb6a0 │ │ movs r4, r0 │ │ subs r2, #0 │ │ movs r0, #208 @ 0xd0 │ │ - b.n bb374 │ │ + b.n bb384 │ │ movs r0, #0 │ │ - b.n bb092 │ │ + b.n bb0a2 │ │ movs r0, #1 │ │ - b.n bb198 │ │ + b.n bb1a8 │ │ movs r0, #0 │ │ - b.n bb736 │ │ + b.n bb746 │ │ movs r0, #1 │ │ adds r3, #0 │ │ strb r4, [r2, #2] │ │ - b.n bab38 │ │ + b.n bab48 │ │ movs r1, #130 @ 0x82 │ │ - b.n bb10c │ │ + b.n bb11c │ │ adds r1, #142 @ 0x8e │ │ - b.n bb11e │ │ + b.n bb12e │ │ movs r3, r0 │ │ - b.n bb2ae │ │ + b.n bb2be │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #208 @ 0xd0 │ │ - b.n bb396 │ │ + b.n bb3a6 │ │ adds r0, #1 │ │ - b.n bb05c │ │ + b.n bb06c │ │ movs r0, #0 │ │ - b.n bb05e │ │ + b.n bb06e │ │ movs r0, #3 │ │ - b.n bb342 │ │ + b.n bb352 │ │ vpmin.u q0, , │ │ movs r0, #140 @ 0x8c │ │ - b.n bab60 │ │ + b.n bab70 │ │ movs r0, #208 @ 0xd0 │ │ - b.n bb3ae │ │ + b.n bb3be │ │ movs r0, #2 │ │ - b.n bb0ce │ │ + b.n bb0de │ │ movs r0, #3 │ │ - b.n bb1d4 │ │ + b.n bb1e4 │ │ movs r4, r0 │ │ subs r2, #0 │ │ movs r0, #132 @ 0x84 │ │ - b.n bab74 │ │ + b.n bab84 │ │ movs r0, #208 @ 0xd0 │ │ - b.n bb3c2 │ │ + b.n bb3d2 │ │ movs r0, #2 │ │ - b.n bb0e2 │ │ + b.n bb0f2 │ │ movs r0, #3 │ │ - b.n bb1e8 │ │ + b.n bb1f8 │ │ vpmin.u32 , , │ │ rors r0, r0 │ │ - b.n bab7c │ │ + b.n bab8c │ │ strh r4, [r1, #0] │ │ - b.n bb792 │ │ + b.n bb7a2 │ │ movs r0, r0 │ │ - b.n bb6fe │ │ + b.n bb70e │ │ movs r0, r7 │ │ lsrs r0, r0, #8 │ │ stmia r1!, {r3, r6, r7} │ │ - b.n bab8c │ │ + b.n bab9c │ │ movs r0, #4 │ │ - b.n bb3a2 │ │ + b.n bb3b2 │ │ str r4, [r1, r0] │ │ - b.n bb3a6 │ │ + b.n bb3b6 │ │ strb r2, [r0, #4] │ │ - b.n bb07e │ │ + b.n bb08e │ │ adds r0, #5 │ │ - b.n bb3ae │ │ + b.n bb3be │ │ strb r7, [r0, #0] │ │ - b.n bafd8 │ │ + b.n bafe8 │ │ str r4, [r0, #0] │ │ - b.n bab9c │ │ + b.n babac │ │ strb r0, [r0, #0] │ │ - b.n bb128 │ │ + b.n bb138 │ │ strb r1, [r0, #0] │ │ - b.n bb22a │ │ + b.n bb23a │ │ strb r1, [r0, #0] │ │ - b.n bb586 │ │ + b.n bb596 │ │ str r3, [r0, r0] │ │ adds r1, #160 @ 0xa0 │ │ movs r5, r0 │ │ - b.n bb738 │ │ + b.n bb748 │ │ movs r0, #167 @ 0xa7 │ │ - b.n bb3ce │ │ + b.n bb3de │ │ @ instruction: 0xfff48aff │ │ movs r4, r0 │ │ - b.n bb744 │ │ + b.n bb754 │ │ movs r7, r0 │ │ subs r2, #0 │ │ movs r0, #208 @ 0xd0 │ │ - b.n bb428 │ │ + b.n bb438 │ │ str r0, [r2, #8] │ │ - b.n babdc │ │ + b.n babec │ │ movs r0, #0 │ │ - b.n bb14a │ │ + b.n bb15a │ │ movs r0, #1 │ │ - b.n bb250 │ │ + b.n bb260 │ │ movs r0, #0 │ │ - b.n bb7ee │ │ + b.n bb7fe │ │ movs r0, #1 │ │ adds r3, #0 │ │ str r2, [r0, r6] │ │ - b.n bb1c0 │ │ + b.n bb1d0 │ │ movs r3, r0 │ │ and.w r0, r0, r0, lsr #26 │ │ - b.n babf8 │ │ + b.n bac08 │ │ movs r0, #0 │ │ - b.n bb802 │ │ + b.n bb812 │ │ movs r2, r0 │ │ - b.n bb774 │ │ + b.n bb784 │ │ movs r4, r0 │ │ subs r2, #0 │ │ movs r0, #208 @ 0xd0 │ │ - b.n bb458 │ │ + b.n bb468 │ │ movs r0, #0 │ │ - b.n bb176 │ │ + b.n bb186 │ │ movs r0, #1 │ │ - b.n bb27c │ │ + b.n bb28c │ │ movs r0, #0 │ │ - b.n bb81a │ │ + b.n bb82a │ │ movs r0, #1 │ │ adds r3, #0 │ │ strb r4, [r2, #2] │ │ - b.n bac1c │ │ + b.n bac2c │ │ movs r1, #130 @ 0x82 │ │ - b.n bb1f0 │ │ + b.n bb200 │ │ adds r1, #132 @ 0x84 │ │ - b.n bb202 │ │ + b.n bb212 │ │ movs r3, r0 │ │ - b.n bb392 │ │ + b.n bb3a2 │ │ movs r2, r2 │ │ lsrs r0, r0, #8 │ │ movs r0, #208 @ 0xd0 │ │ - b.n bb47a │ │ + b.n bb48a │ │ asrs r1, r0, #32 │ │ - b.n bb140 │ │ + b.n bb150 │ │ strh r4, [r1, #0] │ │ - b.n bb83e │ │ + b.n bb84e │ │ movs r0, r0 │ │ - b.n bb146 │ │ + b.n bb156 │ │ movs r1, r0 │ │ - b.n bb426 │ │ + b.n bb436 │ │ mrc2 10, 7, r0, cr9, cr15, {7} @ │ │ movs r3, r1 │ │ and.w r0, r0, r0, lsl #20 │ │ - b.n bb452 │ │ + b.n bb462 │ │ lsls r2, r6, #30 │ │ - b.n bb726 │ │ + b.n bb736 │ │ lsrs r7, r7, #31 │ │ - b.n bb7b8 │ │ + b.n bb7c8 │ │ movs r0, r0 │ │ - b.n bb3c8 │ │ + b.n bb3d8 │ │ lsls r4, r0, #16 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #2 │ │ - b.n bac60 │ │ + b.n bac70 │ │ movs r0, r2 │ │ - b.n bb74a │ │ + b.n bb75a │ │ lsls r0, r5, #4 │ │ lsrs r0, r0, #8 │ │ strh r4, [r1, #0] │ │ - b.n bb872 │ │ + b.n bb882 │ │ movs r1, r2 │ │ - b.n bb7de │ │ + b.n bb7ee │ │ mcr2 10, 7, r0, cr13, cr15, {7} @ │ │ lsls r4, r4, #4 │ │ and.w r0, r0, r4 │ │ - b.n bac70 │ │ + b.n bac80 │ │ asrs r4, r4, #1 │ │ - b.n bac80 │ │ + b.n bac90 │ │ lsls r0, r0, #2 │ │ - b.n bb8ca │ │ + b.n bb8da │ │ movs r4, r0 │ │ - b.n bac5c │ │ + b.n bac6c │ │ lsls r4, r3, #2 │ │ - b.n bac8c │ │ + b.n bac9c │ │ lsls r5, r2, #3 │ │ - b.n bb4f6 │ │ + b.n bb506 │ │ movs r1, #0 │ │ - b.n bb07c │ │ + b.n bb08c │ │ asrs r0, r5, #1 │ │ - b.n bac98 │ │ + b.n baca8 │ │ lsls r0, r0, #2 │ │ - b.n bb264 │ │ + b.n bb274 │ │ asrs r4, r2, #32 │ │ - b.n bb66a │ │ + b.n bb67a │ │ lsls r0, r6, #2 │ │ - b.n bb50a │ │ + b.n bb51a │ │ lsls r0, r0, #2 │ │ - b.n bb270 │ │ + b.n bb280 │ │ lsls r0, r6, #2 │ │ - b.n bb512 │ │ + b.n bb522 │ │ movs r0, r0 │ │ - b.n bb0d8 │ │ + b.n bb0e8 │ │ lsls r4, r0, #1 │ │ - b.n bab90 │ │ + b.n baba0 │ │ adds r0, #182 @ 0xb6 │ │ - b.n bb520 │ │ + b.n bb530 │ │ strb r4, [r0, #0] │ │ - b.n bad24 │ │ + b.n bad34 │ │ adds r0, #3 │ │ - b.n bb288 │ │ + b.n bb298 │ │ ands r0, r1 │ │ - b.n bb690 │ │ + b.n bb6a0 │ │ movs r1, r0 │ │ - b.n bb83c │ │ + b.n bb84c │ │ eors r0, r1 │ │ - b.n baba8 │ │ + b.n babb8 │ │ lsls r4, r0, #2 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n bb8da │ │ + b.n bb8ea │ │ asrs r4, r0, #32 │ │ - b.n bacaa │ │ + b.n bacba │ │ strb r4, [r2, #2] │ │ - b.n bacdc │ │ + b.n bacec │ │ movs r3, r0 │ │ - b.n bb7c6 │ │ + b.n bb7d6 │ │ lsls r1, r7, #12 │ │ subs r0, r0, r0 │ │ str r0, [r0, r0] │ │ - b.n bacd6 │ │ + b.n bace6 │ │ asrs r1, r0, #32 │ │ - b.n bb6bc │ │ + b.n bb6cc │ │ lsls r1, r0, #4 │ │ - b.n bb456 │ │ + b.n bb466 │ │ lsls r5, r6, #12 │ │ subs r2, #0 │ │ asrs r0, r5, #32 │ │ - b.n bacec │ │ + b.n bacfc │ │ movs r4, r0 │ │ - b.n bb502 │ │ - b.n bb2c2 │ │ + b.n bb512 │ │ + b.n bb2d2 │ │ @ instruction: 0xebff0000 │ │ - b.n bb86a │ │ + b.n bb87a │ │ lsls r0, r6, #12 │ │ lsrs r0, r0, #8 │ │ lsls r0, r6, #1 │ │ - b.n bad0c │ │ + b.n bad1c │ │ movs r0, r0 │ │ - b.n bb876 │ │ + b.n bb886 │ │ lsls r2, r0, #2 │ │ lsrs r0, r0, #8 │ │ lsls r0, r7, #1 │ │ - b.n bad18 │ │ + b.n bad28 │ │ stmia r0!, {r2, r3, r4, r5, r6} │ │ - b.n bad1c │ │ + b.n bad2c │ │ movs r0, #148 @ 0x94 │ │ - b.n bad06 │ │ - b.n bb1e8 │ │ - b.n bad22 │ │ + b.n bad16 │ │ + b.n bb1f8 │ │ + b.n bad32 │ │ movs r0, r0 │ │ - b.n bad2a │ │ + b.n bad3a │ │ asrs r5, r0, #32 │ │ - b.n bb2f2 │ │ + b.n bb302 │ │ movs r2, r0 │ │ - b.n bb498 │ │ + b.n bb4a8 │ │ lsls r7, r0, #2 │ │ cmp r2, #0 │ │ movs r4, r0 │ │ - b.n bac3a │ │ + b.n bac4a │ │ movs r1, r0 │ │ - b.n bb4a2 │ │ + b.n bb4b2 │ │ lsls r7, r3, #2 │ │ subs r2, #0 │ │ movs r0, r0 │ │ - b.n bb94a │ │ + b.n bb95a │ │ movs r4, r0 │ │ - b.n bad1a │ │ + b.n bad2a │ │ str r0, [sp, #0] │ │ - b.n bad3a │ │ + b.n bad4a │ │ asrs r0, r0, #32 │ │ - b.n bad52 │ │ + b.n bad62 │ │ movs r0, r0 │ │ - b.n bb8cc │ │ + b.n bb8dc │ │ movs r1, r5 │ │ lsrs r0, r0, #8 │ │ adds r0, #9 │ │ - b.n bb324 │ │ + b.n bb334 │ │ adds r0, #116 @ 0x74 │ │ - b.n bad40 │ │ + b.n bad50 │ │ movs r5, r2 │ │ - b.n bb8d0 │ │ + b.n bb8e0 │ │ movs r0, r2 │ │ cmp r2, #0 │ │ str r6, [r1, r0] │ │ - b.n bb572 │ │ + b.n bb582 │ │ movs r0, r0 │ │ - b.n bb9f6 │ │ + b.n bba06 │ │ lsls r1, r0, #4 │ │ - b.n baf44 │ │ + b.n baf54 │ │ asrs r1, r1, #4 │ │ - b.n bb346 │ │ + b.n bb356 │ │ movs r1, #3 │ │ - b.n bb35e │ │ + b.n bb36e │ │ adds r0, #1 │ │ - b.n bb586 │ │ + b.n bb596 │ │ movs r5, r0 │ │ - b.n bb58a │ │ + b.n bb59a │ │ str r4, [r0, #0] │ │ - b.n baa74 │ │ + b.n baa84 │ │ strb r4, [r0, #0] │ │ - b.n baa72 │ │ + b.n baa82 │ │ movs r7, r0 │ │ - b.n bb502 │ │ + b.n bb512 │ │ strb r6, [r0, #0] │ │ adds r1, #160 @ 0xa0 │ │ str r0, [r0, r0] │ │ strh r0, [r4, #12] │ │ strb r4, [r0, #0] │ │ - b.n baa66 │ │ + b.n baa76 │ │ asrs r3, r0, #32 │ │ str r1, [sp, #640] @ 0x280 │ │ movs r4, r0 │ │ - b.n bb50c │ │ + b.n bb51c │ │ @ instruction: 0xfff48aff │ │ movs r6, r1 │ │ and.w r0, r0, r0 │ │ - b.n bb918 │ │ + b.n bb928 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ str r4, [r0, r0] │ │ - b.n bb5be │ │ + b.n bb5ce │ │ lsls r1, r0, #4 │ │ - b.n bb1be │ │ + b.n bb1ce │ │ movs r0, #4 │ │ - b.n badf0 │ │ + b.n bae00 │ │ movs r2, r0 │ │ - b.n bb52a │ │ + b.n bb53a │ │ movs r0, r7 │ │ ldr r2, [sp, #0] │ │ lsls r1, r0, #4 │ │ - b.n bb3ae │ │ + b.n bb3be │ │ asrs r4, r0, #32 │ │ - b.n bb79e │ │ + b.n bb7ae │ │ movs r4, r0 │ │ - b.n bb79a │ │ + b.n bb7aa │ │ movs r1, #9 │ │ - b.n bb5de │ │ + b.n bb5ee │ │ ands r6, r1 │ │ - b.n bb5e2 │ │ - ldr r0, [r1, #0] │ │ - mla r0, r0, r4, lr │ │ - b.n bb5ea │ │ + b.n bb5f2 │ │ + str r1, [r4, #100] @ 0x64 │ │ + @ instruction: 0xfa00e004 │ │ + b.n bb5fa │ │ stmia r0!, {r2, r3, r4, r5, r6} │ │ - b.n bade8 │ │ + b.n badf8 │ │ lsls r4, r6, #1 │ │ - b.n badec │ │ + b.n badfc │ │ movs r0, r0 │ │ - b.n badd2 │ │ - b.n bb2b8 │ │ - b.n badf2 │ │ + b.n bade2 │ │ + b.n bb2c8 │ │ + b.n bae02 │ │ str r0, [r2, #8] │ │ - b.n badf8 │ │ + b.n bae08 │ │ strb r4, [r2, #2] │ │ - b.n badfc │ │ + b.n bae0c │ │ asrs r0, r0, #32 │ │ - b.n bae02 │ │ + b.n bae12 │ │ str r0, [sp, #512] @ 0x200 │ │ - b.n bae04 │ │ + b.n bae14 │ │ movs r0, r0 │ │ - b.n bb970 │ │ + b.n bb980 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r5 │ │ - b.n bae04 │ │ + b.n bae14 │ │ asrs r4, r0, #32 │ │ - b.n bae16 │ │ + b.n bae26 │ │ movs r1, r0 │ │ - b.n bb75e │ │ + b.n bb76e │ │ movs r0, r0 │ │ - b.n bb584 │ │ + b.n bb594 │ │ lsls r4, r6, #1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r5, #1 │ │ - b.n bae24 │ │ + b.n bae34 │ │ str r0, [sp, #32] │ │ - b.n bba00 │ │ + b.n bba10 │ │ lsls r4, r1, #1 │ │ - b.n bae20 │ │ + b.n bae30 │ │ asrs r0, r1, #32 │ │ - b.n bae18 │ │ + b.n bae28 │ │ movs r0, r0 │ │ - b.n bb59c │ │ + b.n bb5ac │ │ lsls r5, r6, #1 │ │ lsrs r0, r0, #8 │ │ lsls r4, r3 │ │ - b.n bae3c │ │ + b.n bae4c │ │ movs r0, #3 │ │ - b.n bba46 │ │ + b.n bba56 │ │ asrs r0, r0, #32 │ │ - b.n bae42 │ │ + b.n bae52 │ │ movs r0, r2 │ │ - b.n bae36 │ │ + b.n bae46 │ │ asrs r0, r0, #32 │ │ - b.n bae34 │ │ + b.n bae44 │ │ lsls r2, r6, #2 │ │ - b.n bb6b6 │ │ + b.n bb6c6 │ │ lsls r0, r0, #2 │ │ - b.n bb41e │ │ + b.n bb42e │ │ movs r0, r0 │ │ - b.n bb5c0 │ │ + b.n bb5d0 │ │ lsls r4, r5, #1 │ │ ldr r2, [sp, #0] │ │ lsls r4, r2, #1 │ │ - b.n bae54 │ │ + b.n bae64 │ │ asrs r0, r0, #32 │ │ - b.n bae4a │ │ + b.n bae5a │ │ asrs r4, r5, #2 │ │ - b.n bae36 │ │ + b.n bae46 │ │ asrs r0, r0, #32 │ │ - b.n bba72 │ │ + b.n bba82 │ │ ands r0, r0 │ │ - b.n bae36 │ │ + b.n bae46 │ │ movs r4, r0 │ │ - b.n bb67a │ │ - ldrh r5, [r3, #34] @ 0x22 │ │ + b.n bb68a │ │ + ldrh r4, [r3, #34] @ 0x22 │ │ @ instruction: 0xebff5000 │ │ - b.n bb682 │ │ + b.n bb692 │ │ lsls r4, r2, #1 │ │ - b.n bae74 │ │ + b.n bae84 │ │ asrs r4, r5, #2 │ │ - b.n bae72 │ │ + b.n bae82 │ │ movs r0, r0 │ │ - b.n bb9f8 │ │ + b.n bba08 │ │ str r4, [r0, r0] │ │ - b.n bae5e │ │ + b.n bae6e │ │ asrs r0, r0, #32 │ │ - b.n bae56 │ │ + b.n bae66 │ │ lsls r3, r3, #1 │ │ subs r0, r0, r0 │ │ lsls r4, r0, #1 │ │ - b.n bae8c │ │ + b.n bae9c │ │ lsls r0, r2, #11 │ │ - b.n bb6e2 │ │ + b.n bb6f2 │ │ movs r1, r0 │ │ - b.n bb686 │ │ + b.n bb696 │ │ lsls r3, r5, #1 │ │ lsrs r0, r0, #8 │ │ lsls r0, r4, #1 │ │ - b.n baea8 │ │ + b.n baeb8 │ │ lsls r1, r3, #1 │ │ and.w r0, r0, lr, lsl #24 │ │ - b.n bb6b6 │ │ + b.n bb6c6 │ │ lsls r1, r1, #4 │ │ - b.n bb2a2 │ │ + b.n bb2b2 │ │ movs r0, #4 │ │ - b.n baeea │ │ + b.n baefa │ │ movs r2, r0 │ │ - b.n bb622 │ │ + b.n bb632 │ │ @ instruction: 0xffa99aff │ │ lsls r1, r1, #4 │ │ - b.n bb496 │ │ + b.n bb4a6 │ │ movs r1, #1 │ │ - b.n bb6ce │ │ + b.n bb6de │ │ asrs r6, r0, #32 │ │ - b.n bb6d2 │ │ + b.n bb6e2 │ │ ands r6, r1 │ │ - b.n bb6d6 │ │ - ldr r3, [r1, #0] │ │ + b.n bb6e6 │ │ + str r4, [r7, #112] @ 0x70 │ │ mla r1, r0, r9, r2 │ │ - b.n bb6de │ │ + b.n bb6ee │ │ movs r6, r0 │ │ - b.n bb6e2 │ │ + b.n bb6f2 │ │ asrs r5, r0, #32 │ │ - b.n bb6e6 │ │ + b.n bb6f6 │ │ @ instruction: 0xffbdeaff │ │ movs r0, r0 │ │ - b.n baed2 │ │ + b.n baee2 │ │ adds r0, #4 │ │ - b.n baed6 │ │ + b.n baee6 │ │ movs r0, #72 @ 0x48 │ │ - b.n bb84c │ │ + b.n bb85c │ │ movs r1, r1 │ │ stmia.w sp, {r2, r3, r4, r7} │ │ - b.n baef8 │ │ + b.n baf08 │ │ asrs r3, r7, #31 │ │ add.w r0, r0, r0 │ │ - b.n bba66 │ │ + b.n bba76 │ │ movs r4, r0 │ │ - b.n baed6 │ │ + b.n baee6 │ │ lsls r4, r4, #11 │ │ subs r0, r0, r0 │ │ eors r0, r1 │ │ - b.n bae08 │ │ + b.n bae18 │ │ lsls r4, r0, #1 │ │ - b.n bae0c │ │ + b.n bae1c │ │ strb r4, [r2, #2] │ │ - b.n baf14 │ │ + b.n baf24 │ │ movs r3, r0 │ │ - b.n bb9fe │ │ + b.n bba0e │ │ vpmin.u q8, , │ │ lsls r2, r5, #10 │ │ and.w r0, r0, r8, ror #1 │ │ - b.n baf24 │ │ + b.n baf34 │ │ stmia r0!, {r2, r3, r4, r5, r6} │ │ - b.n baf28 │ │ + b.n baf38 │ │ movs r0, #148 @ 0x94 │ │ - b.n baf12 │ │ - b.n bb3f4 │ │ - b.n baf2e │ │ + b.n baf22 │ │ + b.n bb404 │ │ + b.n baf3e │ │ lsls r2, r4, #4 │ │ - b.n bb73a │ │ + b.n bb74a │ │ lsls r0, r0, #2 │ │ - b.n bb4fe │ │ + b.n bb50e │ │ movs r0, r0 │ │ - b.n bb6ac │ │ + b.n bb6bc │ │ vpmin.u , q12, │ │ movs r0, r0 │ │ - b.n baf46 │ │ + b.n baf56 │ │ movs r5, r0 │ │ - b.n bb50e │ │ + b.n bb51e │ │ movs r2, r0 │ │ - b.n bb6b2 │ │ + b.n bb6c2 │ │ vpmin.u , q10, │ │ lsls r5, r1, #15 │ │ and.w r0, r0, r8 │ │ - b.n bba50 │ │ + b.n bba60 │ │ movs r7, r1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r6, #1 │ │ - b.n baf60 │ │ + b.n baf70 │ │ movs r1, r0 │ │ - b.n bb6ca │ │ + b.n bb6da │ │ movs r4, r1 │ │ subs r2, #0 │ │ movs r1, r0 │ │ - b.n bbad4 │ │ + b.n bbae4 │ │ lsls r3, r2, #11 │ │ lsrs r0, r0, #8 │ │ asrs r0, r6, #1 │ │ - b.n baf74 │ │ + b.n baf84 │ │ movs r7, r0 │ │ - b.n bb77e │ │ + b.n bb78e │ │ movs r0, #9 │ │ - b.n bb782 │ │ + b.n bb792 │ │ lsrs r4, r0, #4 │ │ add.w r0, r0, r0 │ │ - b.n bbaea │ │ + b.n bbafa │ │ lsls r2, r4, #15 │ │ subs r0, r0, r0 │ │ stmia r0!, {r2, r3, r4, r5, r6} │ │ - b.n baf8c │ │ + b.n baf9c │ │ str r0, [r2, #8] │ │ - b.n baf90 │ │ + b.n bafa0 │ │ strb r4, [r2, #2] │ │ - b.n baf94 │ │ - b.n bb45c │ │ - b.n baf96 │ │ + b.n bafa4 │ │ + b.n bb46c │ │ + b.n bafa6 │ │ movs r0, r0 │ │ - b.n baf9e │ │ + b.n bafae │ │ asrs r0, r7, #1 │ │ - b.n bafa0 │ │ + b.n bafb0 │ │ movs r0, #128 @ 0x80 │ │ - b.n bafa4 │ │ + b.n bafb4 │ │ asrs r4, r6, #2 │ │ - b.n baf90 │ │ + b.n bafa0 │ │ movs r0, #243 @ 0xf3 │ │ - b.n bb876 │ │ + b.n bb886 │ │ movs r0, #128 @ 0x80 │ │ - b.n baf90 │ │ + b.n bafa0 │ │ movs r1, r0 │ │ - b.n bb71a │ │ + b.n bb72a │ │ movs r4, r5 │ │ cmp r2, #0 │ │ asrs r5, r0, #32 │ │ - b.n bb582 │ │ + b.n bb592 │ │ vpmin.u16 q15, q14, │ │ movs r4, r1 │ │ - b.n bb7ca │ │ + b.n bb7da │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n bb7ce │ │ + b.n bb7de │ │ asrs r1, r1, #32 │ │ add.w r0, r0, r0 │ │ - b.n bbb36 │ │ + b.n bbb46 │ │ movs r4, r0 │ │ - b.n bafa6 │ │ + b.n bafb6 │ │ lsls r2, r6, #5 │ │ subs r0, r0, r0 │ │ - b.n bb4a0 │ │ - b.n bafd4 │ │ + b.n bb4b0 │ │ + b.n bafe4 │ │ stmia r0!, {r0, r3} │ │ - b.n bb7e6 │ │ + b.n bb7f6 │ │ str r0, [sp, #0] │ │ - b.n bafd2 │ │ + b.n bafe2 │ │ asrs r0, r0, #32 │ │ - b.n bafea │ │ + b.n baffa │ │ movs r0, r0 │ │ - b.n bbb64 │ │ + b.n bbb74 │ │ vpmin.u16 , , │ │ @ instruction: 0xff82eaff │ │ movs r7, r0 │ │ - b.n bb7fe │ │ + b.n bb80e │ │ @ instruction: 0xfb6debff │ │ stmia r0!, {r2, r3, r4, r5, r6} │ │ - b.n bb000 │ │ + b.n bb010 │ │ @ instruction: 0xff86eaff │ │ movs r4, r0 │ │ - b.n bb07c │ │ + b.n bb08c │ │ movs r2, r0 │ │ - b.n bbaf2 │ │ + b.n bbb02 │ │ lsls r1, r5, #10 │ │ subs r0, r0, r0 │ │ lsls r0, r3, #2 │ │ - b.n bb014 │ │ + b.n bb024 │ │ movs r0, #56 @ 0x38 │ │ - b.n baf14 │ │ + b.n baf24 │ │ adds r0, #52 @ 0x34 │ │ - b.n baf18 │ │ + b.n baf28 │ │ lsrs r2, r2, #6 │ │ add.w r0, r0, r0 │ │ - b.n bbb8a │ │ + b.n bbb9a │ │ movs r4, r0 │ │ - b.n baffa │ │ + b.n bb00a │ │ lsls r1, r4, #10 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n bbb28 │ │ + b.n bbb38 │ │ movs r7, r5 │ │ lsrs r0, r0, #8 │ │ eors r4, r7 │ │ - b.n bb038 │ │ + b.n bb048 │ │ asrs r0, r7, #1 │ │ - b.n bb03c │ │ + b.n bb04c │ │ movs r0, r0 │ │ - b.n bb02e │ │ + b.n bb03e │ │ asrs r4, r2, #2 │ │ - b.n bb02c │ │ + b.n bb03c │ │ movs r0, r0 │ │ - b.n bb02e │ │ + b.n bb03e │ │ lsls r1, r4, #2 │ │ - b.n bb7b2 │ │ + b.n bb7c2 │ │ ldc2l 10, cr3, [r4, #1020]! @ 0x3fc @ │ │ movs r2, r5 │ │ and.w r0, r0, r4 │ │ - b.n bb04c │ │ + b.n bb05c │ │ str r0, [sp, #1004] @ 0x3ec │ │ - b.n bb934 │ │ + b.n bb944 │ │ strh r0, [r0, #0] │ │ - b.n bbc66 │ │ + b.n bbc76 │ │ lsls r0, r0, #2 │ │ - b.n bbc2a │ │ + b.n bbc3a │ │ movs r4, r0 │ │ - b.n bb03c │ │ + b.n bb04c │ │ @ instruction: 0xff8deaff │ │ asrs r0, r6, #1 │ │ - b.n bb070 │ │ + b.n bb080 │ │ movs r0, r0 │ │ - b.n bbbdc │ │ + b.n bbbec │ │ movs r7, r2 │ │ lsrs r0, r0, #8 │ │ movs r0, #148 @ 0x94 │ │ - b.n bb07c │ │ + b.n bb08c │ │ adds r0, #112 @ 0x70 │ │ - b.n bb080 │ │ + b.n bb090 │ │ asrs r0, r4, #32 │ │ - b.n bb06e │ │ + b.n bb07e │ │ movs r0, #40 @ 0x28 │ │ - b.n bb072 │ │ + b.n bb082 │ │ movs r0, #3 │ │ - b.n bb656 │ │ + b.n bb666 │ │ movs r2, r0 │ │ - b.n bb7f8 │ │ + b.n bb808 │ │ movs r0, r2 │ │ subs r2, #0 │ │ lsls r4, r2, #1 │ │ - b.n bb098 │ │ + b.n bb0a8 │ │ movs r0, #48 @ 0x30 │ │ - b.n bb9f8 │ │ + b.n bba08 │ │ asrs r0, r3, #1 │ │ - b.n bb0a0 │ │ + b.n bb0b0 │ │ lsrs r5, r1, #5 │ │ add.w r0, r0, r4, lsl #9 │ │ - b.n bb0a8 │ │ + b.n bb0b8 │ │ strb r0, [r1, #1] │ │ - b.n bb0ac │ │ + b.n bb0bc │ │ movs r0, #208 @ 0xd0 │ │ - b.n bb8fa │ │ + b.n bb90a │ │ str r0, [r2, #12] │ │ - b.n bb908 │ │ + b.n bb918 │ │ movs r0, r0 │ │ - b.n bb6a2 │ │ + b.n bb6b2 │ │ asrs r1, r0, #32 │ │ - b.n bb6c8 │ │ + b.n bb6d8 │ │ movs r6, r0 │ │ - b.n bb626 │ │ + b.n bb636 │ │ movs r7, r0 │ │ - b.n bb72c │ │ + b.n bb73c │ │ movs r5, r2 │ │ cmp r2, #0 │ │ lsls r4, r7, #1 │ │ - b.n bb0cc │ │ + b.n bb0dc │ │ movs r0, r0 │ │ - b.n bb0b6 │ │ - b.n bb598 │ │ - b.n bb8da │ │ + b.n bb0c6 │ │ + b.n bb5a8 │ │ + b.n bb8ea │ │ movs r0, r0 │ │ - b.n bb0be │ │ + b.n bb0ce │ │ asrs r5, r0, #32 │ │ - b.n bb6a2 │ │ + b.n bb6b2 │ │ lsrs r7, r7, #1 │ │ - b.n bbc48 │ │ + b.n bbc58 │ │ movs r6, r1 │ │ cmp r2, #0 │ │ str r0, [r2, #8] │ │ - b.n bb0e8 │ │ + b.n bb0f8 │ │ strb r4, [r2, #2] │ │ - b.n bb0ec │ │ + b.n bb0fc │ │ stmia r0!, {r2, r3, r4, r5, r6} │ │ - b.n bb0f0 │ │ + b.n bb100 │ │ vpmin.u8 q7, , │ │ str r0, [r6, r1] │ │ - b.n bb0f8 │ │ + b.n bb108 │ │ eors r4, r7 │ │ - b.n bb0fc │ │ + b.n bb10c │ │ movs r4, r5 │ │ and.w r0, r0, r0, ror #21 │ │ - b.n bb104 │ │ + b.n bb114 │ │ str r0, [sp, #16] │ │ - b.n bba60 │ │ + b.n bba70 │ │ movs r1, r5 │ │ and.w r0, r0, r0, ror #21 │ │ - b.n bb110 │ │ + b.n bb120 │ │ strh r4, [r0, #0] │ │ - b.n bb91a │ │ + b.n bb92a │ │ str r0, [sp, #512] @ 0x200 │ │ - b.n bb118 │ │ + b.n bb128 │ │ eors r4, r7 │ │ - b.n bb11c │ │ + b.n bb12c │ │ movs r0, r6 │ │ and.w lr, r0, ip, lsl #1 │ │ - b.n bb128 │ │ + b.n bb138 │ │ movs r0, r0 │ │ - b.n bb70c │ │ + b.n bb71c │ │ lsls r2, r3, #1 │ │ - b.n bb192 │ │ + b.n bb1a2 │ │ movs r3, r0 │ │ - b.n bbc96 │ │ + b.n bbca6 │ │ movs r3, r0 │ │ cmp r2, #0 │ │ str r0, [r2, #8] │ │ - b.n bb138 │ │ + b.n bb148 │ │ str r0, [r6, r1] │ │ - b.n bb13c │ │ + b.n bb14c │ │ strb r4, [r2, #2] │ │ - b.n bb140 │ │ + b.n bb150 │ │ @ instruction: 0xfff3eaff │ │ eors r4, r7 │ │ - b.n bb148 │ │ + b.n bb158 │ │ asrs r0, r7, #1 │ │ - b.n bb14c │ │ + b.n bb15c │ │ movs r0, r0 │ │ - b.n bb13e │ │ + b.n bb14e │ │ asrs r4, r6, #2 │ │ - b.n bb13c │ │ + b.n bb14c │ │ movs r0, r0 │ │ - b.n bb13e │ │ + b.n bb14e │ │ subs r6, #24 │ │ - b.n bb160 │ │ + b.n bb170 │ │ ldrb r0, [r3, #24] │ │ - b.n bb164 │ │ + b.n bb174 │ │ movs r0, #5 │ │ - b.n bb72a │ │ + b.n bb73a │ │ lsrs r7, r7, #1 │ │ - b.n bbcd2 │ │ + b.n bbce2 │ │ adds r0, #3 │ │ - b.n bb750 │ │ + b.n bb760 │ │ strb r7, [r0, #0] │ │ - b.n bb754 │ │ + b.n bb764 │ │ movs r1, r4 │ │ @ instruction: 0xe98d0003 │ │ - b.n bbd7e │ │ + b.n bbd8e │ │ adds r0, #7 │ │ adds r1, #160 @ 0xa0 │ │ movs r0, #12 │ │ - b.n bb160 │ │ + b.n bb170 │ │ adds r0, #0 │ │ - b.n bb164 │ │ + b.n bb174 │ │ movs r4, #18 │ │ - b.n bbc4e │ │ + b.n bbc5e │ │ asrs r0, r2, #32 │ │ - b.n bb16c │ │ + b.n bb17c │ │ adds r4, r5, #7 │ │ - b.n bb194 │ │ + b.n bb1a4 │ │ subs r5, #236 @ 0xec │ │ - b.n bb198 │ │ + b.n bb1a8 │ │ asrs r1, r0, #32 │ │ - b.n bb77c │ │ + b.n bb78c │ │ adds r0, #3 │ │ - b.n bb780 │ │ - ldrb r0, [r6, #27] │ │ + b.n bb790 │ │ + ldrb r7, [r5, #27] │ │ @ instruction: 0xebff6090 │ │ - b.n bb1a4 │ │ + b.n bb1b4 │ │ str r0, [r6, r1] │ │ - b.n bb1a8 │ │ + b.n bb1b8 │ │ strb r4, [r2, #2] │ │ - b.n bb1ac │ │ + b.n bb1bc │ │ str r0, [sp, #512] @ 0x200 │ │ - b.n bb1b0 │ │ + b.n bb1c0 │ │ movs r3, r1 │ │ and.w r0, r0, r1 │ │ - b.n bbd28 │ │ + b.n bbd38 │ │ movs r1, r0 │ │ ldrh r0, [r0, #16] │ │ movs r2, r0 │ │ - b.n bbab8 │ │ + b.n bbac8 │ │ lsls r2, r2, #7 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n bb1b6 │ │ + b.n bb1c6 │ │ asrs r0, r0, #32 │ │ - b.n bb1b2 │ │ + b.n bb1c2 │ │ movs r5, r0 │ │ - b.n bb938 │ │ + b.n bb948 │ │ movs r3, r4 │ │ cmp r2, #0 │ │ movs r4, r0 │ │ - b.n bb24c │ │ + b.n bb25c │ │ str r0, [sp, #32] │ │ - b.n bbb34 │ │ + b.n bbb44 │ │ lsls r0, r0, #2 │ │ - b.n bbcc6 │ │ - stc2 10, cr0, [pc, #1020] @ bbaa4 @ │ │ + b.n bbcd6 │ │ + stc2 10, cr0, [pc, #1020] @ bbab4 @ │ │ movs r4, r0 │ │ - b.n bb1dc │ │ + b.n bb1ec │ │ movs r0, r1 │ │ - b.n bbce4 │ │ + b.n bbcf4 │ │ lsls r0, r0, #2 │ │ - b.n bbdb6 │ │ + b.n bbdc6 │ │ movs r4, r0 │ │ - b.n bb1c8 │ │ + b.n bb1d8 │ │ @ instruction: 0xffee1aff │ │ lsls r0, r7, #1 │ │ - b.n bb1fc │ │ + b.n bb20c │ │ movs r0, #5 │ │ - b.n bba06 │ │ + b.n bba16 │ │ asrs r2, r0, #2 │ │ - b.n bb278 │ │ + b.n bb288 │ │ strh r1, [r0, #4] │ │ - b.n bb27c │ │ + b.n bb28c │ │ str r4, [r3, r1] │ │ - b.n bb272 │ │ + b.n bb282 │ │ movs r0, r5 │ │ - b.n bb204 │ │ + b.n bb214 │ │ str r0, [sp, #512] @ 0x200 │ │ - b.n bb1f4 │ │ + b.n bb204 │ │ str r0, [sp, #8] │ │ - b.n bb7de │ │ + b.n bb7ee │ │ lsls r0, r3, #20 │ │ - b.n bba22 │ │ + b.n bba32 │ │ lsls r1, r2, #20 │ │ - b.n bb986 │ │ + b.n bb996 │ │ lsls r4, r2, #2 │ │ asrs r5, r3, #22 │ │ movs r0, #1 │ │ asrs r0, r4, #14 │ │ lsls r0, r0, #2 │ │ asrs r0, r2, #23 │ │ lsls r2, r2, #4 │ │ asrs r0, r2, #32 │ │ movs r5, r2 │ │ subs r0, r0, r0 │ │ lsls r0, r7, #1 │ │ - b.n bb238 │ │ + b.n bb248 │ │ lsls r0, r1, #1 │ │ - b.n bb222 │ │ + b.n bb232 │ │ lsls r0, r1, #7 │ │ - b.n bb226 │ │ - bl 517206 │ │ + b.n bb236 │ │ + bl 517216 │ │ strb r4, [r2, #2] │ │ - b.n bb248 │ │ + b.n bb258 │ │ movs r1, r0 │ │ - b.n bbdb2 │ │ + b.n bbdc2 │ │ lsls r5, r3, #2 │ │ subs r0, r0, r0 │ │ movs r7, r0 │ │ - b.n bba5a │ │ - add r4, sp, #44 @ 0x2c │ │ + b.n bba6a │ │ + add r4, sp, #40 @ 0x28 │ │ @ instruction: 0xebff0000 │ │ - b.n bbdc2 │ │ + b.n bbdd2 │ │ stc2 10, cr1, [r7, #-1020]! @ 0xfffffc04 @ │ │ lsls r0, r3, #2 │ │ and.w r0, r0, r1 │ │ - b.n bbdd8 │ │ + b.n bbde8 │ │ lsls r7, r1, #3 │ │ lsrs r0, r0, #8 │ │ movs r0, #121 @ 0x79 │ │ - b.n bb514 │ │ + b.n bb524 │ │ movs r7, r0 │ │ - b.n bba7a │ │ + b.n bba8a │ │ asrs r5, r0, #32 │ │ - b.n bba7e │ │ + b.n bba8e │ │ lsrs r5, r0, #1 │ │ add.w r0, r0, ip, ror #17 │ │ - b.n bb280 │ │ + b.n bb290 │ │ movs r0, r0 │ │ - b.n bbdea │ │ + b.n bbdfa │ │ lsls r7, r6, #11 │ │ subs r0, r0, r0 │ │ @ instruction: 0xffd1eaff │ │ adds r0, #148 @ 0x94 │ │ - b.n bb290 │ │ + b.n bb2a0 │ │ lsls r0, r2, #1 │ │ - b.n bb294 │ │ + b.n bb2a4 │ │ adds r0, #64 @ 0x40 │ │ - b.n bb284 │ │ + b.n bb294 │ │ movs r1, #129 @ 0x81 │ │ - b.n bb6c2 │ │ + b.n bb6d2 │ │ str r0, [r1, #16] │ │ - b.n bb28c │ │ + b.n bb29c │ │ movs r4, r0 │ │ - b.n bb28a │ │ + b.n bb29a │ │ adds r1, #12 │ │ - b.n bb294 │ │ + b.n bb2a4 │ │ movs r0, #2 │ │ - b.n bb7be │ │ + b.n bb7ce │ │ str r0, [r2, #8] │ │ - b.n bb2b0 │ │ + b.n bb2c0 │ │ movs r0, r0 │ │ - b.n bb7c0 │ │ + b.n bb7d0 │ │ movs r0, r0 │ │ - b.n bbaa2 │ │ + b.n bbab2 │ │ @ instruction: 0xffdd1aff │ │ strb r0, [r7, #1] │ │ - b.n bb2c0 │ │ + b.n bb2d0 │ │ str r0, [sp, #256] @ 0x100 │ │ - b.n bb2a4 │ │ + b.n bb2b4 │ │ adds r0, #72 @ 0x48 │ │ - b.n bb2bc │ │ - b.n bb7b0 │ │ - b.n bb2c0 │ │ + b.n bb2cc │ │ + b.n bb7c0 │ │ + b.n bb2d0 │ │ stmia r0!, {r4} │ │ - b.n bb2bc │ │ + b.n bb2cc │ │ movs r0, #28 │ │ - b.n bb2c0 │ │ + b.n bb2d0 │ │ ands r0, r3 │ │ - b.n bb2c4 │ │ + b.n bb2d4 │ │ str r0, [sp, #112] @ 0x70 │ │ - b.n bb2c8 │ │ + b.n bb2d8 │ │ movs r0, r3 │ │ - b.n bb2cc │ │ + b.n bb2dc │ │ movs r0, #116 @ 0x74 │ │ - b.n bb2c4 │ │ + b.n bb2d4 │ │ str r1, [r1, #0] │ │ - b.n bb7f2 │ │ + b.n bb802 │ │ movs r0, #0 │ │ - b.n bb7fa │ │ + b.n bb80a │ │ movs r0, #6 │ │ - b.n bbada │ │ + b.n bbaea │ │ lsls r3, r3, #1 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n bb2ec │ │ + b.n bb2fc │ │ movs r0, #20 │ │ - b.n bbcde │ │ + b.n bbcee │ │ str r0, [r2, #8] │ │ - b.n bb300 │ │ + b.n bb310 │ │ adds r0, #12 │ │ - b.n bbad2 │ │ + b.n bbae2 │ │ str r0, [sp, #256] @ 0x100 │ │ - b.n bb308 │ │ + b.n bb318 │ │ lsrs r1, r2, #32 │ │ - b.n bbbd2 │ │ + b.n bbbe2 │ │ lsrs r1, r2, #32 │ │ - b.n bbe76 │ │ + b.n bbe86 │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ lsls r4, r6, #1 │ │ - b.n bb318 │ │ + b.n bb328 │ │ movs r0, r0 │ │ - b.n bbb08 │ │ + b.n bbb18 │ │ lsls r5, r2, #2 │ │ lsrs r0, r0, #8 │ │ lsls r1, r2, #20 │ │ - b.n bb8ee │ │ + b.n bb8fe │ │ movs r0, r4 │ │ - b.n bb30e │ │ + b.n bb31e │ │ movs r0, r0 │ │ - b.n bbaa4 │ │ + b.n bbab4 │ │ lsls r1, r2, #2 │ │ cmp r2, #0 │ │ movs r0, r0 │ │ - b.n bbeb2 │ │ + b.n bbec2 │ │ adds r0, #60 @ 0x3c │ │ - b.n bb318 │ │ + b.n bb328 │ │ movs r0, #56 @ 0x38 │ │ - b.n bb31c │ │ + b.n bb32c │ │ movs r7, r1 │ │ lsrs r0, r0, #8 │ │ lsls r0, r7, #1 │ │ - b.n bb344 │ │ + b.n bb354 │ │ strb r4, [r0, #0] │ │ - b.n bbb4e │ │ + b.n bbb5e │ │ asrs r0, r1, #1 │ │ - b.n bb332 │ │ + b.n bb342 │ │ movs r1, #92 @ 0x5c │ │ - b.n bb338 │ │ + b.n bb348 │ │ adds r1, #88 @ 0x58 │ │ - b.n bb33c │ │ - b.n bbad4 │ │ - b.n bb340 │ │ + b.n bb34c │ │ + b.n bbae4 │ │ + b.n bb350 │ │ lsls r0, r3, #5 │ │ - b.n bb344 │ │ + b.n bb354 │ │ str r6, [r1, #0] │ │ - b.n bb86a │ │ + b.n bb87a │ │ ands r0, r0 │ │ - b.n bb870 │ │ + b.n bb880 │ │ ands r6, r0 │ │ - b.n bbb56 │ │ + b.n bbb66 │ │ lsls r0, r1, #1 │ │ subs r0, r0, r0 │ │ str r0, [r2, #8] │ │ - b.n bb370 │ │ + b.n bb380 │ │ movs r4, r1 │ │ - b.n bb8e0 │ │ + b.n bb8f0 │ │ movs r0, r0 │ │ - b.n bbde2 │ │ + b.n bbdf2 │ │ ands r7, r0 │ │ - b.n bbb82 │ │ + b.n bbb92 │ │ lsls r2, r5, #1 │ │ cmp r2, #0 │ │ lsls r4, r6, #1 │ │ - b.n bb384 │ │ + b.n bb394 │ │ movs r0, r0 │ │ - b.n bbb76 │ │ + b.n bbb86 │ │ movs r5, r4 │ │ lsrs r0, r0, #8 │ │ lsls r0, r7, #1 │ │ - b.n bb390 │ │ + b.n bb3a0 │ │ lsls r0, r1, #1 │ │ - b.n bb37a │ │ + b.n bb38a │ │ asrs r4, r2, #5 │ │ - b.n bb37e │ │ + b.n bb38e │ │ strb r0, [r2, #5] │ │ - b.n bb382 │ │ + b.n bb392 │ │ stmia r1!, {r2, r4, r6} │ │ - b.n bb386 │ │ + b.n bb396 │ │ movs r1, #80 @ 0x50 │ │ - b.n bb38a │ │ + b.n bb39a │ │ adds r0, #12 │ │ - b.n bb8b0 │ │ + b.n bb8c0 │ │ str r2, [r0, #0] │ │ - b.n bb8c0 │ │ + b.n bb8d0 │ │ adds r0, #3 │ │ - b.n bbba2 │ │ + b.n bbbb2 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ asrs r4, r1, #32 │ │ - b.n bbbbe │ │ + b.n bbbce │ │ strb r2, [r0, #0] │ │ - b.n bbbc2 │ │ - blx 4bcec4 │ │ + b.n bbbd2 │ │ + blx 4bced4 │ │ @ instruction: 0xfff5eaff │ │ str r0, [r2, #8] │ │ - b.n bb3c8 │ │ + b.n bb3d8 │ │ movs r1, r0 │ │ - b.n bbbc0 │ │ + b.n bbbd0 │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ asrs r4, r6, #32 │ │ - b.n bb3b4 │ │ + b.n bb3c4 │ │ asrs r0, r5, #2 │ │ - b.n bbdb8 │ │ + b.n bbdc8 │ │ lsrs r4, r5, #14 │ │ - b.n bb3e0 │ │ + b.n bb3f0 │ │ movs r0, r0 │ │ - b.n bb9c4 │ │ + b.n bb9d4 │ │ movs r4, r5 │ │ - b.n bb3ca │ │ + b.n bb3da │ │ strb r0, [r5, #17] │ │ add.w r0, r0, r0 │ │ - b.n bbf52 │ │ + b.n bbf62 │ │ movs r1, r6 │ │ subs r0, r0, r0 │ │ lsls r4, r5, #2 │ │ - b.n bb3f4 │ │ + b.n bb404 │ │ subs r2, #0 │ │ - b.n bbed6 │ │ + b.n bbee6 │ │ movs r0, #168 @ 0xa8 │ │ - b.n bb3fc │ │ + b.n bb40c │ │ subs r3, #154 @ 0x9a │ │ - b.n bbf4c │ │ + b.n bbf5c │ │ subs r0, r0, #7 │ │ - b.n bbc0a │ │ + b.n bbc1a │ │ lsls r2, r2, #14 │ │ - b.n bba90 │ │ + b.n bbaa0 │ │ movs r0, #52 @ 0x34 │ │ - b.n bb40c │ │ + b.n bb41c │ │ movs r7, r0 │ │ - b.n bb976 │ │ + b.n bb986 │ │ asrs r2, r0, #32 │ │ - b.n bba5c │ │ + b.n bba6c │ │ movs r4, r0 │ │ - b.n bb97e │ │ + b.n bb98e │ │ lsls r4, r6, #1 │ │ - b.n bb41c │ │ + b.n bb42c │ │ movs r0, r0 │ │ - b.n bba88 │ │ + b.n bba98 │ │ lsls r1, r0, #1 │ │ cmp r2, #0 │ │ lsls r4, r2, #2 │ │ - b.n bb428 │ │ + b.n bb438 │ │ movs r0, r4 │ │ - b.n bb412 │ │ + b.n bb422 │ │ movs r0, r0 │ │ - b.n bbba8 │ │ + b.n bbbb8 │ │ movs r5, r7 │ │ cmp r2, #0 │ │ lsls r0, r6, #1 │ │ - b.n bb438 │ │ + b.n bb448 │ │ movs r0, r0 │ │ - b.n bbfa2 │ │ + b.n bbfb2 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ lsls r4, r2, #2 │ │ - b.n bb444 │ │ + b.n bb454 │ │ movs r4, r4 │ │ - b.n bb42e │ │ + b.n bb43e │ │ movs r0, r0 │ │ - b.n bbbc4 │ │ + b.n bbbd4 │ │ vpmin.u , q12, │ │ lsls r4, r6, #1 │ │ - b.n bb454 │ │ + b.n bb464 │ │ asrs r4, r7, #32 │ │ - b.n bb458 │ │ + b.n bb468 │ │ movs r0, r0 │ │ - b.n bbc44 │ │ + b.n bbc54 │ │ vpmin.u , q10, │ │ movs r1, r6 │ │ @ instruction: 0xea00f001 │ │ - b.n bbf6e │ │ + b.n bbf7e │ │ movs r0, #9 │ │ - b.n bbc72 │ │ + b.n bbc82 │ │ ands r0, r0 │ │ - b.n bbc76 │ │ + b.n bbc86 │ │ str r0, [sp, #112] @ 0x70 │ │ - b.n bb460 │ │ + b.n bb470 │ │ movs r0, r3 │ │ - b.n bb464 │ │ + b.n bb474 │ │ movs r0, #116 @ 0x74 │ │ - b.n bb45c │ │ + b.n bb46c │ │ movs r0, #9 │ │ - b.n bb98a │ │ + b.n bb99a │ │ str r0, [r0, #0] │ │ - b.n bb992 │ │ + b.n bb9a2 │ │ movs r0, #2 │ │ - b.n bbc7a │ │ + b.n bbc8a │ │ @ instruction: 0xff990aff │ │ @ instruction: 0xfff4eaff │ │ - blx 4bcf98 │ │ + blx 4bcfa8 │ │ movs r0, #14 │ │ - b.n bbc9e │ │ + b.n bbcae │ │ adds r0, #0 │ │ - b.n bbca2 │ │ - b.n bbc1c │ │ - b.n bb488 │ │ + b.n bbcb2 │ │ + b.n bbc2c │ │ + b.n bb498 │ │ lsls r0, r3, #5 │ │ - b.n bb48c │ │ + b.n bb49c │ │ ands r6, r1 │ │ - b.n bb9b2 │ │ + b.n bb9c2 │ │ str r0, [r0, #0] │ │ - b.n bb9b8 │ │ + b.n bb9c8 │ │ ands r4, r0 │ │ - b.n bbca2 │ │ + b.n bbcb2 │ │ @ instruction: 0xffad0aff │ │ @ instruction: 0xfff5eaff │ │ movs r0, r0 │ │ - b.n bc0c2 │ │ + b.n bc0d2 │ │ asrs r0, r0, #32 │ │ - b.n bc0c6 │ │ + b.n bc0d6 │ │ @ instruction: 0xffd0eaff │ │ - subs r6, #116 @ 0x74 │ │ + subs r6, #132 @ 0x84 │ │ movs r2, r0 │ │ lsls r0, r0, #2 │ │ - b.n bb4cc │ │ + b.n bb4dc │ │ strh r0, [r0, #0] │ │ - b.n bbcd6 │ │ + b.n bbce6 │ │ lsls r0, r6, #1 │ │ - b.n bb778 │ │ + b.n bb788 │ │ movs r2, r0 │ │ - b.n bbfbe │ │ + b.n bbfce │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ movs r4, r4 │ │ - b.n bb4d4 │ │ + b.n bb4e4 │ │ movs r0, r0 │ │ - b.n bbc5c │ │ + b.n bbc6c │ │ lsls r2, r3, #5 │ │ ldr r2, [sp, #0] │ │ lsls r0, r0, #1 │ │ - b.n bb4e0 │ │ + b.n bb4f0 │ │ asrs r4, r3, #1 │ │ - b.n bb4f0 │ │ + b.n bb500 │ │ movs r1, #8 │ │ - b.n bb4da │ │ + b.n bb4ea │ │ lsrs r0, r2 │ │ - b.n bbd40 │ │ + b.n bbd50 │ │ adds r1, #12 │ │ - b.n bb4e2 │ │ + b.n bb4f2 │ │ movs r2, r0 │ │ - b.n bba6e │ │ + b.n bba7e │ │ asrs r3, r0, #32 │ │ - b.n bbb54 │ │ + b.n bbb64 │ │ movs r2, r0 │ │ - b.n bbe6e │ │ + b.n bbe7e │ │ movs r0, r0 │ │ - b.n bbf74 │ │ + b.n bbf84 │ │ lsls r7, r7, #1 │ │ subs r2, #0 │ │ lsls r0, r7, #1 │ │ - b.n bb514 │ │ + b.n bb524 │ │ lsrs r5, r2, #20 │ │ @ instruction: 0xeb008080 │ │ - b.n bb51c │ │ + b.n bb52c │ │ movs r0, r0 │ │ - b.n bc086 │ │ + b.n bc096 │ │ movs r0, #80 @ 0x50 │ │ - b.n bb524 │ │ + b.n bb534 │ │ stc2l 10, cr1, [r6], #-1020 @ 0xfffffc04 @ │ │ lsls r1, r7, #1 │ │ and.w r0, r0, r8, rrx │ │ - b.n bb530 │ │ + b.n bb540 │ │ lsls r0, r5 │ │ - b.n bbf14 │ │ + b.n bbf24 │ │ movs r0, #224 @ 0xe0 │ │ - b.n bc13e │ │ + b.n bc14e │ │ asrs r0, r3, #20 │ │ - b.n bbb02 │ │ + b.n bbb12 │ │ movs r4, r0 │ │ - b.n bbd46 │ │ - str r7, [r5, #96] @ 0x60 │ │ - @ instruction: 0xfb000078 │ │ - b.n bb548 │ │ + b.n bbd56 │ │ + str r0, [r1, #72] @ 0x48 │ │ + @ instruction: 0xfa000078 │ │ + b.n bb558 │ │ movs r0, #4 │ │ - b.n bbd52 │ │ + b.n bbd62 │ │ adds r0, #76 @ 0x4c │ │ - b.n bb550 │ │ + b.n bb560 │ │ asrs r4, r0, #32 │ │ - b.n bb53a │ │ + b.n bb54a │ │ asrs r2, r0, #28 │ │ - b.n bbe20 │ │ - add r7, sp, #612 @ 0x264 │ │ + b.n bbe30 │ │ + add r7, sp, #608 @ 0x260 │ │ @ instruction: 0xebff0004 │ │ - b.n bb532 │ │ + b.n bb542 │ │ movs r0, r0 │ │ - b.n bc0ca │ │ + b.n bc0da │ │ strb r4, [r2, #2] │ │ - b.n bb568 │ │ + b.n bb578 │ │ strh r0, [r0, #4] │ │ - b.n bb56c │ │ + b.n bb57c │ │ movs r0, #80 @ 0x50 │ │ - b.n bb570 │ │ + b.n bb580 │ │ mrrc2 10, 15, r0, r3, cr15 │ │ movs r2, r1 │ │ and.w r0, r0, r4, lsr #30 │ │ - b.n bb57c │ │ + b.n bb58c │ │ lsls r0, r0, #1 │ │ - b.n bb574 │ │ + b.n bb584 │ │ movs r1, #8 │ │ - b.n bb56a │ │ + b.n bb57a │ │ adds r1, #12 │ │ - b.n bb56e │ │ + b.n bb57e │ │ lsls r0, r7, #1 │ │ - b.n bb58c │ │ + b.n bb59c │ │ lsrs r6, r1, #18 │ │ add.w r0, r0, r0 │ │ - b.n bc0fa │ │ + b.n bc10a │ │ movs r4, r0 │ │ - b.n bb56a │ │ + b.n bb57a │ │ strh r0, [r0, #4] │ │ - b.n bb59c │ │ + b.n bb5ac │ │ movs r0, #80 @ 0x50 │ │ - b.n bb5a0 │ │ + b.n bb5b0 │ │ mcrr2 10, 15, r0, r7, cr15 │ │ str r0, [r0, r0] │ │ - b.n bbdae │ │ + b.n bbdbe │ │ lsls r0, r6, #6 │ │ and.w r1, r0, r1, lsl #12 │ │ - b.n bb996 │ │ + b.n bb9a6 │ │ asrs r1, r0, #32 │ │ - b.n bbefc │ │ + b.n bbf0c │ │ strh r1, [r1, #0] │ │ - b.n bbdbe │ │ + b.n bbdce │ │ asrs r0, r0, #32 │ │ - b.n bb582 │ │ - b.n bbb34 │ │ - b.n bb5c0 │ │ + b.n bb592 │ │ + b.n bbb44 │ │ + b.n bb5d0 │ │ ldr r1, [sp, #768] @ 0x300 │ │ - b.n bb5c8 │ │ - add r0, pc, #480 @ (adr r0, bbc6c ) │ │ - b.n bb5c8 │ │ + b.n bb5d8 │ │ + add r0, pc, #480 @ (adr r0, bbc7c ) │ │ + b.n bb5d8 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n bbbb0 │ │ + b.n bbbc0 │ │ movs r2, r2 │ │ and.w r0, r0, r8 │ │ - b.n bbdda │ │ + b.n bbdea │ │ ands r6, r1 │ │ - b.n bbdde │ │ + b.n bbdee │ │ movs r1, #1 │ │ - b.n bba02 │ │ - b.n bbaa6 │ │ - b.n bbf70 │ │ + b.n bba12 │ │ + b.n bbab6 │ │ + b.n bbf80 │ │ adds r1, #14 │ │ - b.n bb9ca │ │ + b.n bb9da │ │ adds r0, #2 │ │ - b.n bbb34 │ │ + b.n bbb44 │ │ movs r0, #1 │ │ - b.n bbf3c │ │ + b.n bbf4c │ │ movs r2, r0 │ │ - b.n bbd5c │ │ + b.n bbd6c │ │ lsls r3, r4, #1 │ │ subs r0, r0, r0 │ │ movs r2, r0 │ │ - b.n bc0f2 │ │ + b.n bc102 │ │ lsls r7, r4, #8 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n bbb48 │ │ + b.n bbb58 │ │ movs r0, r0 │ │ - b.n bb5da │ │ + b.n bb5ea │ │ adds r1, #1 │ │ - b.n bb9fe │ │ + b.n bba0e │ │ strh r2, [r1, #0] │ │ - b.n bbe12 │ │ - add r0, pc, #48 @ (adr r0, bbb04 ) │ │ - b.n bbe16 │ │ - b.n bbae0 │ │ - b.n bbe1a │ │ + b.n bbe22 │ │ + add r0, pc, #48 @ (adr r0, bbb14 ) │ │ + b.n bbe26 │ │ + b.n bbaf0 │ │ + b.n bbe2a │ │ movs r0, r0 │ │ - b.n bc184 │ │ + b.n bc194 │ │ @ instruction: 0xfbe90aff │ │ movs r0, r0 │ │ - b.n bc226 │ │ + b.n bc236 │ │ movs r2, r0 │ │ - b.n bc11a │ │ + b.n bc12a │ │ movs r4, r0 │ │ - b.n bb5fa │ │ + b.n bb60a │ │ lsls r2, r7, #2 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n bc19c │ │ + b.n bc1ac │ │ ands r0, r1 │ │ - b.n bbe3a │ │ + b.n bbe4a │ │ adds r0, #40 @ 0x28 │ │ lsls r7, r2, #22 │ │ asrs r2, r1, #32 │ │ - b.n bbe42 │ │ + b.n bbe52 │ │ movs r0, #7 │ │ - b.n bbe46 │ │ + b.n bbe56 │ │ strh r6, [r1, #0] │ │ - b.n bbe4a │ │ + b.n bbe5a │ │ movs r5, r0 │ │ lsls r3, r0, #2 │ │ movs r0, r5 │ │ lsls r7, r0, #22 │ │ lsls r0, r5, #2 │ │ - b.n bc030 │ │ + b.n bc040 │ │ lsls r0, r0 │ │ - b.n bb634 │ │ + b.n bb644 │ │ str r0, [r0, r0] │ │ - b.n bb638 │ │ + b.n bb648 │ │ @ instruction: 0xfa5bebff │ │ str r4, [r5, r2] │ │ - b.n bb660 │ │ + b.n bb670 │ │ lsls r0, r5 │ │ - b.n bb664 │ │ + b.n bb674 │ │ movs r0, r0 │ │ - b.n bc1d8 │ │ + b.n bc1e8 │ │ lsrs r0, r6 │ │ - b.n bbebe │ │ + b.n bbece │ │ ands r0, r1 │ │ - b.n bbe76 │ │ + b.n bbe86 │ │ lsls r1, r0, #6 │ │ subs r0, r0, r0 │ │ lsls r0, r6, #1 │ │ - b.n bb678 │ │ + b.n bb688 │ │ movs r2, r0 │ │ - b.n bc1e2 │ │ + b.n bc1f2 │ │ lsls r0, r2, #6 │ │ cmp r2, #0 │ │ - beq.n bbb80 │ │ - b.n bbfe0 │ │ + beq.n bbb90 │ │ + b.n bbff0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r5, r7, ip} │ │ - b.n bb680 │ │ + b.n bb690 │ │ movs r0, #148 @ 0x94 │ │ - b.n bb68a │ │ + b.n bb69a │ │ asrs r0, r0, #32 │ │ - b.n bb67c │ │ + b.n bb68c │ │ lsls r2, r4, #2 │ │ - b.n bbe00 │ │ + b.n bbe10 │ │ strh r4, [r0, #0] │ │ adds r2, #136 @ 0x88 │ │ asrs r4, r7, #3 │ │ - b.n bb71a │ │ + b.n bb72a │ │ movs r0, r0 │ │ - b.n bc20c │ │ + b.n bc21c │ │ @ instruction: 0xfbe01aff │ │ movs r0, #212 @ 0xd4 │ │ - b.n bb726 │ │ + b.n bb736 │ │ asrs r7, r0, #32 │ │ - b.n bbeb6 │ │ + b.n bbec6 │ │ movs r2, #48 @ 0x30 │ │ - b.n bb73c │ │ + b.n bb74c │ │ movs r0, r0 │ │ - b.n bc222 │ │ + b.n bc232 │ │ @ instruction: 0xfbde0aff │ │ movs r0, #72 @ 0x48 │ │ - b.n bb6ba │ │ + b.n bb6ca │ │ strb r4, [r1, #0] │ │ - b.n bb6aa │ │ + b.n bb6ba │ │ movs r1, #108 @ 0x6c │ │ - b.n bb6b2 │ │ + b.n bb6c2 │ │ movs r0, r0 │ │ - b.n bc240 │ │ + b.n bc250 │ │ adds r0, #162 @ 0xa2 │ │ - b.n bbed6 │ │ + b.n bbee6 │ │ lsls r5, r4, #1 │ │ lsrs r0, r0, #8 │ │ strb r4, [r2, #2] │ │ - b.n bb6d8 │ │ + b.n bb6e8 │ │ movs r1, r0 │ │ - b.n bc1c6 │ │ + b.n bc1d6 │ │ movs r5, r0 │ │ asrs r3, r2, #5 │ │ @ instruction: 0xfbd49aff │ │ @ instruction: 0xfbd1eaff │ │ ldr r0, [sp, #304] @ 0x130 │ │ - b.n bb6f0 │ │ + b.n bb700 │ │ ldrsb r4, [r6, r6] │ │ - b.n bc1c6 │ │ + b.n bc1d6 │ │ ldrsh r7, [r7, r7] │ │ - b.n bc258 │ │ + b.n bc268 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n bbcdc │ │ + b.n bbcec │ │ lsls r2, r3, #1 │ │ - b.n bb774 │ │ + b.n bb784 │ │ movs r0, r0 │ │ - b.n bc266 │ │ + b.n bc276 │ │ lsls r5, r0, #3 │ │ subs r0, r0, r0 │ │ str r4, [r0, r0] │ │ - b.n bb6da │ │ + b.n bb6ea │ │ eors r0, r3 │ │ - b.n bb70c │ │ + b.n bb71c │ │ lsls r2, r3, #5 │ │ @ instruction: 0xea008080 │ │ - b.n bb714 │ │ + b.n bb724 │ │ movs r2, r0 │ │ - b.n bc20e │ │ + b.n bc21e │ │ lsls r7, r1, #5 │ │ subs r0, r0, r0 │ │ lsls r4, r2, #11 │ │ - b.n bbf74 │ │ + b.n bbf84 │ │ adds r0, #0 │ │ - b.n bc32a │ │ + b.n bc33a │ │ str r0, [r6, r1] │ │ - b.n bb728 │ │ + b.n bb738 │ │ ldr r0, [sp, #416] @ 0x1a0 │ │ - b.n bb730 │ │ + b.n bb740 │ │ str r5, [r0, #0] │ │ - b.n bbcf8 │ │ + b.n bbd08 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n bbd18 │ │ + b.n bbd28 │ │ movs r0, r0 │ │ - b.n bbeaa │ │ + b.n bbeba │ │ lsls r0, r6, #1 │ │ ldr r2, [sp, #0] │ │ str r0, [r4, r0] │ │ - b.n bb734 │ │ + b.n bb744 │ │ eors r0, r3 │ │ - b.n bb744 │ │ - add r0, pc, #480 @ (adr r0, bbdec ) │ │ - b.n bb748 │ │ + b.n bb754 │ │ + add r0, pc, #480 @ (adr r0, bbdfc ) │ │ + b.n bb758 │ │ movs r5, r0 │ │ - b.n bbebe │ │ + b.n bbece │ │ strh r0, [r0, #4] │ │ - b.n bb730 │ │ + b.n bb740 │ │ movs r2, r0 │ │ ldrh r0, [r0, #16] │ │ lsls r0, r7, #6 │ │ - b.n bbfcc │ │ + b.n bbfdc │ │ movs r0, r0 │ │ - b.n bc2c2 │ │ + b.n bc2d2 │ │ lsls r5, r6, #3 │ │ subs r0, r0, r0 │ │ lsls r2, r3, #1 │ │ - b.n bb7dc │ │ + b.n bb7ec │ │ movs r3, r0 │ │ - b.n bc2ce │ │ + b.n bc2de │ │ lsls r0, r4, #3 │ │ cmp r2, #0 │ │ str r0, [r2, #8] │ │ - b.n bb770 │ │ + b.n bb780 │ │ lsls r4, r6, #30 │ │ - b.n bc24a │ │ + b.n bc25a │ │ lsrs r7, r7, #31 │ │ - b.n bc2dc │ │ + b.n bc2ec │ │ str r4, [r0, r0] │ │ - b.n bc142 │ │ + b.n bc152 │ │ str r4, [r0, r0] │ │ - b.n bb752 │ │ + b.n bb762 │ │ lsls r5, r7, #4 │ │ and.w r1, r0, r2, lsl #12 │ │ - b.n bbd5e │ │ + b.n bbd6e │ │ movs r0, #2 │ │ - b.n bc15c │ │ + b.n bc16c │ │ @ instruction: 0xeb90eea0 │ │ movs r1, r0 │ │ - b.n bbefe │ │ + b.n bbf0e │ │ adds r0, #156 @ 0x9c │ │ - b.n bb778 │ │ + b.n bb788 │ │ movs r2, r3 │ │ cmp r2, #0 │ │ movs r0, #0 │ │ - b.n bc3a6 │ │ + b.n bc3b6 │ │ str r5, [r0, #16] │ │ - b.n bbcee │ │ + b.n bbcfe │ │ movs r0, #3 │ │ - b.n bc42e │ │ + b.n bc43e │ │ str r1, [r0, r4] │ │ - b.n bbcb6 │ │ + b.n bbcc6 │ │ movs r1, #1 │ │ - b.n bbd86 │ │ + b.n bbd96 │ │ adds r0, #12 │ │ - b.n bc180 │ │ + b.n bc190 │ │ strb r6, [r0, #0] │ │ - b.n bbd7e │ │ + b.n bbd8e │ │ strb r0, [r1, #0] │ │ - b.n bc110 │ │ + b.n bc120 │ │ cmp r2, #143 @ 0x8f │ │ orn r0, r7, #560 @ 0x230 │ │ - b.n bc10a │ │ - ldr r2, [pc, #572] @ (bbec8 ) │ │ + b.n bc11a │ │ + ldr r2, [pc, #572] @ (bbed8 ) │ │ orn r8, r7, #462848 @ 0x71000 │ │ @ instruction: 0xf36428f0 │ │ @ instruction: 0xf3622222 │ │ @ instruction: 0xf3f62123 │ │ @ instruction: 0xf3f27b90 │ │ cdp 0, 1, cr0, cr2, cr0, {0} │ │ - b.n bc354 │ │ + b.n bc364 │ │ movs r6, r5 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n bc12e │ │ + b.n bc13e │ │ str r0, [r2, r0] │ │ - b.n bc1bc │ │ + b.n bc1cc │ │ movs r0, #16 │ │ - b.n bc13a │ │ + b.n bc14a │ │ movs r3, r0 │ │ - b.n bbf5a │ │ + b.n bbf6a │ │ @ instruction: 0xffee8aff │ │ movs r0, #112 @ 0x70 │ │ - b.n bb7fc │ │ + b.n bb80c │ │ lsls r2, r0, #4 │ │ - b.n bbfb0 │ │ + b.n bbfc0 │ │ str r2, [r0, r0] │ │ - b.n bc00a │ │ + b.n bc01a │ │ lsls r7, r0, #1 │ │ lsrs r0, r0, #8 │ │ str r0, [r2, #8] │ │ - b.n bb80c │ │ + b.n bb81c │ │ movs r1, #14 │ │ - b.n bbdd6 │ │ + b.n bbde6 │ │ lsrs r7, r7, #27 │ │ - b.n bc2fe │ │ + b.n bc30e │ │ lsls r5, r4, #6 │ │ lsrs r0, r0, #8 │ │ movs r1, #14 │ │ - b.n bc022 │ │ + b.n bc032 │ │ adds r0, #12 │ │ - b.n bc166 │ │ + b.n bc176 │ │ cmp r2, #130 @ 0x82 │ │ orn r0, r3, #640 @ 0x280 │ │ - b.n bc42e │ │ - ldr r2, [pc, #572] @ (bbf2c ) │ │ + b.n bc43e │ │ + ldr r2, [pc, #572] @ (bbf3c ) │ │ orn r8, r3, #466944 @ 0x72000 │ │ @ instruction: 0xf36208f0 │ │ @ instruction: 0xf3620220 │ │ @ instruction: 0xf3f60121 │ │ @ instruction: 0xf3f2309c │ │ - b.n bb840 │ │ + b.n bb850 │ │ cmp r3, #144 @ 0x90 │ │ cdp 0, 1, cr3, cr0, cr0, {0} │ │ - b.n bbd94 │ │ + b.n bbda4 │ │ adds r0, #131 @ 0x83 │ │ - b.n bbe20 │ │ + b.n bbe30 │ │ strb r0, [r0, #0] │ │ - b.n bc4d6 │ │ + b.n bc4e6 │ │ strb r7, [r2, #12] │ │ - b.n bbd3e │ │ + b.n bbd4e │ │ movs r4, r6 │ │ lsrs r0, r0, #8 │ │ cmp r7, #23 │ │ - b.n bc000 │ │ - b.n bbd2c │ │ - b.n bc066 │ │ + b.n bc010 │ │ + b.n bbd3c │ │ + b.n bc076 │ │ lsls r2, r4, #2 │ │ - b.n bbfca │ │ + b.n bbfda │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ movs r5, r2 │ │ and.w r0, r0, r5 │ │ - b.n bbfdc │ │ + b.n bbfec │ │ adds r0, #148 @ 0x94 │ │ - b.n bb874 │ │ + b.n bb884 │ │ strb r0, [r0, #0] │ │ - b.n bc47e │ │ + b.n bc48e │ │ str r2, [r2, #76] @ 0x4c │ │ - b.n bc342 │ │ + b.n bc352 │ │ strb r1, [r0, #0] │ │ strh r0, [r0, #24] │ │ adds r0, #36 @ 0x24 │ │ - b.n bb870 │ │ + b.n bb880 │ │ movs r6, r0 │ │ - b.n bbff4 │ │ + b.n bc004 │ │ lsls r4, r1, #1 │ │ subs r2, #0 │ │ movs r0, #7 │ │ - b.n bbd7a │ │ + b.n bbd8a │ │ str r0, [r2, #8] │ │ - b.n bb894 │ │ + b.n bb8a4 │ │ strb r4, [r2, #2] │ │ - b.n bb898 │ │ + b.n bb8a8 │ │ @ instruction: 0xfb660aff │ │ @ instruction: 0xfb63eaff │ │ str r0, [r2, #8] │ │ - b.n bb8a4 │ │ + b.n bb8b4 │ │ movs r2, r0 │ │ - b.n bc0ae │ │ + b.n bc0be │ │ str r0, [r6, r1] │ │ - b.n bb8ac │ │ + b.n bb8bc │ │ cmp r7, #23 │ │ - b.n bc054 │ │ - b.n bbd80 │ │ - b.n bc0ba │ │ + b.n bc064 │ │ + b.n bbd90 │ │ + b.n bc0ca │ │ lsls r2, r4, #2 │ │ - b.n bc01e │ │ + b.n bc02e │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ strb r4, [r2, #2] │ │ - b.n bb8c0 │ │ + b.n bb8d0 │ │ @ instruction: 0xfb3deaff │ │ lsls r2, r4, #2 │ │ - b.n bbe0e │ │ + b.n bbe1e │ │ strb r4, [r2, #2] │ │ - b.n bb8cc │ │ + b.n bb8dc │ │ movs r2, r0 │ │ - b.n bc3ca │ │ + b.n bc3da │ │ lsls r3, r1, #6 │ │ subs r0, r0, r0 │ │ ands r0, r0 │ │ - b.n bc0de │ │ + b.n bc0ee │ │ movs r0, #5 │ │ - b.n bbe24 │ │ + b.n bbe34 │ │ adds r0, #4 │ │ - b.n bb6ce │ │ + b.n bb6de │ │ movs r0, #0 │ │ - b.n bb8ba │ │ + b.n bb8ca │ │ movs r0, #160 @ 0xa0 │ │ - b.n bb8dc │ │ + b.n bb8ec │ │ movs r1, #1 │ │ - b.n bbeb6 │ │ + b.n bbec6 │ │ movs r2, r0 │ │ - b.n bc05e │ │ + b.n bc06e │ │ movs r2, r2 │ │ ldr r2, [sp, #0] │ │ strh r2, [r1, #0] │ │ - b.n bc0fe │ │ - add r0, pc, #48 @ (adr r0, bbdf0 ) │ │ - b.n bc102 │ │ + b.n bc10e │ │ + add r0, pc, #48 @ (adr r0, bbe00 ) │ │ + b.n bc112 │ │ vpmin.u8 q15, q10, │ │ - b.n bbe78 │ │ - b.n bb904 │ │ + b.n bbe88 │ │ + b.n bb914 │ │ str r0, [r2, #8] │ │ - b.n bb908 │ │ - add r0, pc, #480 @ (adr r0, bbfb0 ) │ │ - b.n bb90c │ │ + b.n bb918 │ │ + add r0, pc, #480 @ (adr r0, bbfc0 ) │ │ + b.n bb91c │ │ vpmin.u8 q15, q9, │ │ movs r0, r0 │ │ - b.n bc51a │ │ + b.n bc52a │ │ movs r4, r0 │ │ - b.n bb8ea │ │ + b.n bb8fa │ │ movs r0, r0 │ │ - b.n bc522 │ │ + b.n bc532 │ │ movs r0, r0 │ │ - b.n bb8f2 │ │ - beq.n bbe20 │ │ - b.n bc280 │ │ + b.n bb902 │ │ + beq.n bbe30 │ │ + b.n bc290 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r7, sp, lr} │ │ - b.n bb92c │ │ + b.n bb93c │ │ strh r2, [r1, #0] │ │ - b.n bc136 │ │ + b.n bc146 │ │ strb r4, [r2, #2] │ │ - b.n bb934 │ │ - add r0, pc, #48 @ (adr r0, bbe2c ) │ │ - b.n bc13e │ │ - b.n bbe08 │ │ - b.n bc142 │ │ + b.n bb944 │ │ + add r0, pc, #48 @ (adr r0, bbe3c ) │ │ + b.n bc14e │ │ + b.n bbe18 │ │ + b.n bc152 │ │ @ instruction: 0xfb20eaff │ │ asrs r1, r0, #32 │ │ - b.n bc30e │ │ + b.n bc31e │ │ strb r0, [r1, #0] │ │ - b.n bc30e │ │ + b.n bc31e │ │ movs r7, r0 │ │ - b.n bc0b4 │ │ + b.n bc0c4 │ │ strh r2, [r1, #0] │ │ - b.n bc156 │ │ + b.n bc166 │ │ strb r1, [r0, #0] │ │ strh r0, [r4, #12] │ │ movs r0, r0 │ │ - b.n bbeac │ │ + b.n bbebc │ │ asrs r5, r0, #32 │ │ - b.n bc2a2 │ │ + b.n bc2b2 │ │ movs r4, r1 │ │ - b.n bc4c8 │ │ + b.n bc4d8 │ │ lsls r4, r0, #1 │ │ subs r2, #0 │ │ movs r0, r0 │ │ - b.n bc56e │ │ - add r0, pc, #48 @ (adr r0, bbe60 ) │ │ - b.n bc172 │ │ + b.n bc57e │ │ + add r0, pc, #48 @ (adr r0, bbe70 ) │ │ + b.n bc182 │ │ lsls r5, r0, #4 │ │ - b.n bbeb6 │ │ + b.n bbec6 │ │ movs r0, r2 │ │ - b.n bc4da │ │ + b.n bc4ea │ │ movs r5, r7 │ │ subs r2, #0 │ │ - b.n bbef0 │ │ - b.n bb95c │ │ + b.n bbf00 │ │ + b.n bb96c │ │ strb r1, [r0, #0] │ │ - b.n bc586 │ │ - b.n bc08a │ │ - b.n bbf58 │ │ + b.n bc596 │ │ + b.n bc09a │ │ + b.n bbf68 │ │ str r3, [r0, r0] │ │ - b.n bc5ea │ │ + b.n bc5fa │ │ asrs r5, r0, #4 │ │ - b.n bbf5a │ │ + b.n bbf6a │ │ str r5, [r0, #0] │ │ - b.n bc196 │ │ + b.n bc1a6 │ │ strb r0, [r0, #0] │ │ - b.n bbf62 │ │ + b.n bbf72 │ │ lsrs r5, r1, #10 │ │ orn r0, r4, #2112 @ 0x840 │ │ - b.n bc30e │ │ + b.n bc31e │ │ lsrs r7, r1, #10 │ │ - bl ffd03e5a │ │ + bl ffd03e6a │ │ subs r7, r7, r3 │ │ movs r5, r0 │ │ - b.n bc12a │ │ + b.n bc13a │ │ str r0, [r2, #8] │ │ - b.n bb9ac │ │ + b.n bb9bc │ │ str r0, [r6, r1] │ │ - b.n bb9b0 │ │ - b.n bbf28 │ │ - b.n bb9b4 │ │ + b.n bb9c0 │ │ + b.n bbf38 │ │ + b.n bb9c4 │ │ movs r1, r6 │ │ subs r0, r0, r0 │ │ strb r4, [r2, #2] │ │ - b.n bb9bc │ │ + b.n bb9cc │ │ vpmin.u16 q7, q10, │ │ str r0, [r2, #8] │ │ - b.n bb9c4 │ │ + b.n bb9d4 │ │ strb r4, [r2, #2] │ │ - b.n bb9c8 │ │ + b.n bb9d8 │ │ @ instruction: 0xfb18eaff │ │ str r5, [sp, #512] @ 0x200 │ │ - b.n bb9d4 │ │ + b.n bb9e4 │ │ ldrsb r4, [r6, r6] │ │ - b.n bc4aa │ │ + b.n bc4ba │ │ ldrsh r7, [r7, r7] │ │ - b.n bc53c │ │ + b.n bc54c │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n bbfc0 │ │ + b.n bbfd0 │ │ lsls r2, r3, #1 │ │ - b.n bba58 │ │ + b.n bba68 │ │ movs r0, r0 │ │ - b.n bc54a │ │ + b.n bc55a │ │ vpmin.u8 q8, q11, │ │ asrs r0, r5, #21 │ │ - b.n bb9f0 │ │ + b.n bba00 │ │ adds r5, #104 @ 0x68 │ │ - b.n bb9f4 │ │ + b.n bba04 │ │ lsls r0, r5, #21 │ │ - b.n bb9f8 │ │ + b.n bba08 │ │ asrs r1, r0, #32 │ │ - b.n bbfdc │ │ + b.n bbfec │ │ movs r5, #100 @ 0x64 │ │ - b.n bba00 │ │ + b.n bba10 │ │ adds r0, #3 │ │ - b.n bbfe4 │ │ + b.n bbff4 │ │ movs r0, r0 │ │ - b.n bbfe8 │ │ + b.n bbff8 │ │ movs r0, #2 │ │ - b.n bbfec │ │ + b.n bbffc │ │ movs r1, r4 │ │ stmia.w sp, {r0} │ │ - b.n bc616 │ │ + b.n bc626 │ │ movs r0, #8 │ │ - b.n bb9f4 │ │ + b.n bba04 │ │ movs r3, #221 @ 0xdd │ │ - b.n bc4de │ │ + b.n bc4ee │ │ movs r3, r1 │ │ and.w r5, r0, ip, lsr #4 │ │ - b.n bba24 │ │ + b.n bba34 │ │ adds r5, #28 │ │ - b.n bba28 │ │ + b.n bba38 │ │ lsls r4, r3, #20 │ │ - b.n bba2c │ │ + b.n bba3c │ │ asrs r1, r0, #32 │ │ - b.n bc010 │ │ + b.n bc020 │ │ movs r5, #24 │ │ - b.n bba34 │ │ + b.n bba44 │ │ adds r0, #3 │ │ - b.n bc018 │ │ + b.n bc028 │ │ movs r0, r0 │ │ - b.n bc01c │ │ + b.n bc02c │ │ movs r0, #2 │ │ - b.n bc020 │ │ + b.n bc030 │ │ movs r1, r4 │ │ stmia.w sp, {r0} │ │ - b.n bc64a │ │ + b.n bc65a │ │ movs r0, #8 │ │ - b.n bba28 │ │ + b.n bba38 │ │ movs r3, #193 @ 0xc1 │ │ - b.n bc512 │ │ - ldrb r4, [r0, #19] │ │ + b.n bc522 │ │ + ldrb r3, [r0, #19] │ │ @ instruction: 0xebffff2b │ │ @ instruction: 0xeaffe058 │ │ - b.n bba58 │ │ + b.n bba68 │ │ adds r0, #0 │ │ - b.n bc662 │ │ + b.n bc672 │ │ str r5, [sp, #176] @ 0xb0 │ │ - b.n bba64 │ │ + b.n bba74 │ │ str r0, [r6, r1] │ │ - b.n bba64 │ │ + b.n bba74 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n bc04c │ │ - add r0, pc, #480 @ (adr r0, bc110 ) │ │ - b.n bba6c │ │ + b.n bc05c │ │ + add r0, pc, #480 @ (adr r0, bc120 ) │ │ + b.n bba7c │ │ mcr2 10, 7, lr, cr10, cr15, {7} @ │ │ asrs r4, r0, #32 │ │ - b.n bc27a │ │ + b.n bc28a │ │ movs r1, r0 │ │ and.w r0, r0, r4, lsl #4 │ │ - b.n bc282 │ │ - add r0, pc, #48 @ (adr r0, bbf74 ) │ │ - b.n bc286 │ │ + b.n bc292 │ │ + add r0, pc, #48 @ (adr r0, bbf84 ) │ │ + b.n bc296 │ │ strb r4, [r2, #2] │ │ - b.n bba84 │ │ + b.n bba94 │ │ movs r0, r0 │ │ - b.n bba70 │ │ + b.n bba80 │ │ lsls r5, r0, #4 │ │ - b.n bbd54 │ │ + b.n bbd64 │ │ asrs r4, r0, #32 │ │ - b.n bc458 │ │ + b.n bc468 │ │ movs r2, r0 │ │ - b.n bc1fc │ │ + b.n bc20c │ │ @ instruction: 0xfffa9aff │ │ mrc2 10, 6, lr, cr13, cr15, {7} @ │ │ eors r0, r3 │ │ - b.n bbaa0 │ │ + b.n bbab0 │ │ str r0, [r0, r0] │ │ - b.n bc2aa │ │ + b.n bc2ba │ │ str r4, [sp, #656] @ 0x290 │ │ - b.n bbaac │ │ + b.n bbabc │ │ strb r4, [r2, #2] │ │ - b.n bbaac │ │ + b.n bbabc │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n bc094 │ │ + b.n bc0a4 │ │ lsls r1, r6, #1 │ │ and.w r0, r0, r0, lsl #20 │ │ - b.n bc2be │ │ + b.n bc2ce │ │ str r0, [sp, #512] @ 0x200 │ │ - b.n bba9c │ │ + b.n bbaac │ │ lsls r3, r5, #1 │ │ and.w r0, r0, r2 │ │ - b.n bc5bc │ │ + b.n bc5cc │ │ movs r3, r2 │ │ subs r0, r0, r0 │ │ adds r1, #0 │ │ - b.n bbece │ │ + b.n bbede │ │ movs r1, r0 │ │ - b.n bc416 │ │ + b.n bc426 │ │ movs r0, r0 │ │ - b.n bbab6 │ │ - b.n bc04c │ │ - b.n bbad8 │ │ + b.n bbac6 │ │ + b.n bc05c │ │ + b.n bbae8 │ │ str r4, [sp, #560] @ 0x230 │ │ - b.n bbae0 │ │ + b.n bbaf0 │ │ str r0, [r6, r1] │ │ - b.n bbae0 │ │ + b.n bbaf0 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n bc0c8 │ │ + b.n bc0d8 │ │ strh r0, [r0, #4] │ │ - b.n bbae8 │ │ - add r0, pc, #480 @ (adr r0, bc190 ) │ │ - b.n bbaec │ │ + b.n bbaf8 │ │ + add r0, pc, #480 @ (adr r0, bc1a0 ) │ │ + b.n bbafc │ │ mcr2 10, 6, lr, cr10, cr15, {7} @ │ │ asrs r4, r4, #18 │ │ - b.n bbaf8 │ │ + b.n bbb08 │ │ movs r3, r0 │ │ - b.n bc6fe │ │ + b.n bc70e │ │ adds r4, #160 @ 0xa0 │ │ - b.n bbb00 │ │ + b.n bbb10 │ │ movs r4, #235 @ 0xeb │ │ - b.n bc5c6 │ │ + b.n bc5d6 │ │ asrs r1, r0, #32 │ │ - b.n bc0e8 │ │ + b.n bc0f8 │ │ str r0, [r0, #0] │ │ - b.n bbae8 │ │ + b.n bbaf8 │ │ adds r0, #3 │ │ - b.n bc0f0 │ │ + b.n bc100 │ │ str r4, [r0, r0] │ │ - b.n bbaf0 │ │ - ldrb r3, [r2, #18] │ │ + b.n bbb00 │ │ + ldrb r2, [r2, #18] │ │ @ instruction: 0xebffff14 │ │ @ instruction: 0xeaffe058 │ │ - b.n bbb1c │ │ + b.n bbb2c │ │ adds r0, #0 │ │ - b.n bc7a6 │ │ + b.n bc7b6 │ │ str r4, [sp, #256] @ 0x100 │ │ - b.n bbb28 │ │ + b.n bbb38 │ │ str r0, [r6, r1] │ │ - b.n bbb28 │ │ + b.n bbb38 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n bc110 │ │ + b.n bc120 │ │ strh r0, [r0, #4] │ │ - b.n bbb30 │ │ - add r0, pc, #480 @ (adr r0, bc1d8 ) │ │ - b.n bbb34 │ │ + b.n bbb40 │ │ + add r0, pc, #480 @ (adr r0, bc1e8 ) │ │ + b.n bbb44 │ │ mrc2 10, 5, lr, cr8, cr15, {7} @ │ │ asrs r1, r0, #32 │ │ - b.n bc612 │ │ + b.n bc622 │ │ movs r0, #1 │ │ - b.n bc006 │ │ + b.n bc016 │ │ movs r1, r0 │ │ - b.n bc2ae │ │ + b.n bc2be │ │ movs r6, r2 │ │ subs r0, r0, r0 │ │ subs r7, r7, #7 │ │ - b.n bc630 │ │ - ldr r0, [pc, #4] @ (bc018 ) │ │ - b.n bc756 │ │ + b.n bc640 │ │ + ldr r0, [pc, #4] @ (bc028 ) │ │ + b.n bc766 │ │ movs r1, r0 │ │ - b.n bc2ba │ │ + b.n bc2ca │ │ movs r3, r2 │ │ lsrs r0, r0, #8 │ │ asrs r0, r2, #3 │ │ - b.n bbff6 │ │ + b.n bc006 │ │ lsls r0, r4, #24 │ │ - b.n bc366 │ │ + b.n bc376 │ │ asrs r1, r0, #32 │ │ - b.n bc52c │ │ + b.n bc53c │ │ cmp r1, #2 │ │ - b.n bc76e │ │ + b.n bc77e │ │ ands r1, r2 │ │ - b.n bc136 │ │ + b.n bc146 │ │ movs r5, r1 │ │ and.w r3, r0, ip, ror #6 │ │ - b.n bbb78 │ │ + b.n bbb88 │ │ adds r3, #188 @ 0xbc │ │ - b.n bbb7c │ │ + b.n bbb8c │ │ asrs r1, r0, #32 │ │ - b.n bc160 │ │ + b.n bc170 │ │ movs r0, #0 │ │ - b.n bbb60 │ │ + b.n bbb70 │ │ adds r0, #3 │ │ - b.n bc168 │ │ + b.n bc178 │ │ movs r1, r6 │ │ @ instruction: 0xe98d0000 │ │ - b.n bc792 │ │ + b.n bc7a2 │ │ cmp r7, #230 @ 0xe6 │ │ - b.n bc796 │ │ - ldrb r3, [r6, #17] │ │ + b.n bc7a6 │ │ + ldrb r2, [r6, #17] │ │ @ instruction: 0xebff07b4 │ │ - b.n bc66e │ │ + b.n bc67e │ │ lsrs r7, r7, #31 │ │ - b.n bc700 │ │ + b.n bc710 │ │ str r1, [r2, r0] │ │ - b.n bc566 │ │ + b.n bc576 │ │ movs r1, r6 │ │ and.w r0, r0, r0, lsl #16 │ │ - b.n bc3ae │ │ + b.n bc3be │ │ movs r6, r0 │ │ - b.n bc3b2 │ │ + b.n bc3c2 │ │ asrs r4, r0, #32 │ │ - b.n bc3b6 │ │ - str r5, [r4, #84] @ 0x54 │ │ + b.n bc3c6 │ │ + str r4, [r4, #84] @ 0x54 │ │ @ instruction: 0xfa000006 │ │ - b.n bc186 │ │ + b.n bc196 │ │ movs r0, #92 @ 0x5c │ │ - b.n bbc36 │ │ + b.n bbc46 │ │ adds r0, #80 @ 0x50 │ │ - b.n bbbb8 │ │ + b.n bbbc8 │ │ movs r1, r0 │ │ - b.n bc10a │ │ + b.n bc11a │ │ strh r5, [r0, #0] │ │ - b.n bc3ce │ │ + b.n bc3de │ │ lsls r0, r2, #8 │ │ - b.n bc198 │ │ + b.n bc1a8 │ │ asrs r0, r0, #32 │ │ - b.n bc55c │ │ + b.n bc56c │ │ movs r1, r0 │ │ - b.n bc51a │ │ + b.n bc52a │ │ adds r0, #0 │ │ - b.n bc7de │ │ + b.n bc7ee │ │ movs r1, r0 │ │ - b.n bc0a2 │ │ + b.n bc0b2 │ │ lsls r0, r6, #8 │ │ - b.n bc350 │ │ + b.n bc360 │ │ strh r0, [r6, #16] │ │ strh r0, [r4, #12] │ │ movs r2, r1 │ │ - b.n bc3ee │ │ + b.n bc3fe │ │ asrs r0, r1, #32 │ │ - b.n bc3f2 │ │ + b.n bc402 │ │ movs r0, #5 │ │ - b.n bc3f6 │ │ - add r3, sp, #256 @ 0x100 │ │ + b.n bc406 │ │ + add r3, sp, #252 @ 0xfc │ │ @ instruction: 0xebff6090 │ │ - b.n bbbf8 │ │ + b.n bbc08 │ │ movs r0, r0 │ │ - b.n bc762 │ │ + b.n bc772 │ │ movs r4, r0 │ │ - b.n bbbd2 │ │ + b.n bbbe2 │ │ lsls r1, r2, #2 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, r0] │ │ - b.n bc40e │ │ + b.n bc41e │ │ lsls r2, r3, #1 │ │ - b.n bbc84 │ │ + b.n bbc94 │ │ eors r0, r3 │ │ - b.n bbc10 │ │ + b.n bbc20 │ │ movs r0, r0 │ │ - b.n bc77a │ │ + b.n bc78a │ │ movs r0, r3 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #14 │ │ - b.n bbc20 │ │ + b.n bbc30 │ │ movs r4, #251 @ 0xfb │ │ - b.n bc6e6 │ │ + b.n bc6f6 │ │ movs r4, r4 │ │ - b.n bbc18 │ │ + b.n bbc28 │ │ adds r3, #124 @ 0x7c │ │ - b.n bbc2c │ │ + b.n bbc3c │ │ asrs r1, r0, #32 │ │ - b.n bc210 │ │ + b.n bc220 │ │ movs r0, r0 │ │ - b.n bc186 │ │ + b.n bc196 │ │ strh r0, [r0, #0] │ │ - b.n bbc14 │ │ + b.n bbc24 │ │ adds r0, #3 │ │ - b.n bc21c │ │ + b.n bc22c │ │ movs r1, r4 │ │ @ instruction: 0xe98d0001 │ │ - b.n bc846 │ │ - ldrb r7, [r0, #17] │ │ + b.n bc856 │ │ + ldrb r6, [r0, #17] │ │ @ instruction: 0xebff000c │ │ and.w r0, r0, r4 │ │ - b.n bbc40 │ │ + b.n bbc50 │ │ lsls r0, r0, #2 │ │ - b.n bc816 │ │ + b.n bc826 │ │ movs r4, r0 │ │ - b.n bbc28 │ │ + b.n bbc38 │ │ movs r2, r0 │ │ - b.n bc74e │ │ + b.n bc75e │ │ mcr2 10, 5, r0, cr15, cr15, {7} @ │ │ lsls r4, r6, #30 │ │ - b.n bc736 │ │ + b.n bc746 │ │ strh r0, [r0, #4] │ │ - b.n bbc44 │ │ + b.n bbc54 │ │ lsrs r7, r7, #31 │ │ - b.n bc7cc │ │ + b.n bc7dc │ │ str r2, [r0, r0] │ │ - b.n bc5b2 │ │ + b.n bc5c2 │ │ str r4, [r0, r0] │ │ - b.n bbc42 │ │ + b.n bbc52 │ │ eors r0, r3 │ │ - b.n bbc74 │ │ + b.n bbc84 │ │ str r3, [sp, #96] @ 0x60 │ │ - b.n bbc7c │ │ + b.n bbc8c │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n bc260 │ │ + b.n bc270 │ │ lsls r0, r0, #2 │ │ - b.n bbc80 │ │ + b.n bbc90 │ │ movs r1, r0 │ │ - b.n bc76a │ │ + b.n bc77a │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ movs r0, #112 @ 0x70 │ │ - b.n bbf30 │ │ + b.n bbf40 │ │ movs r3, r0 │ │ - b.n bc896 │ │ + b.n bc8a6 │ │ movs r2, r0 │ │ - b.n bc77e │ │ + b.n bc78e │ │ movs r4, r0 │ │ lsls r7, r2, #22 │ │ movs r2, r0 │ │ lsls r0, r0, #14 │ │ movs r4, r0 │ │ lsls r7, r0, #22 │ │ asrs r2, r3, #1 │ │ - b.n bbd1c │ │ + b.n bbd2c │ │ movs r1, r0 │ │ lsls r0, r4, #14 │ │ movs r1, r0 │ │ - b.n bc412 │ │ + b.n bc422 │ │ movs r4, r4 │ │ ldr r2, [sp, #0] │ │ movs r0, r0 │ │ - b.n bc8ba │ │ + b.n bc8ca │ │ movs r0, r0 │ │ - b.n bbc8a │ │ + b.n bbc9a │ │ lsls r0, r6, #1 │ │ - b.n bbcbc │ │ + b.n bbccc │ │ movs r2, r0 │ │ - b.n bc826 │ │ + b.n bc836 │ │ mcr2 10, 3, r3, cr14, cr15, {7} @ │ │ movs r0, #40 @ 0x28 │ │ - b.n bbbc4 │ │ + b.n bbbd4 │ │ movs r0, r0 │ │ - b.n bc836 │ │ + b.n bc846 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r6 │ │ - b.n bbbd0 │ │ + b.n bbbe0 │ │ movs r0, #1 │ │ - b.n bc622 │ │ + b.n bc632 │ │ asrs r4, r5, #32 │ │ - b.n bbbd8 │ │ + b.n bbbe8 │ │ movs r3, r1 │ │ and.w r0, r0, ip, asr #32 │ │ - b.n bbcdc │ │ + b.n bbcec │ │ asrs r0, r5, #2 │ │ - b.n bc6c8 │ │ + b.n bc6d8 │ │ strb r7, [r4, #8] │ │ add.w r0, r0, r0 │ │ - b.n bc856 │ │ + b.n bc866 │ │ lsls r2, r4, #1 │ │ subs r0, r0, r0 │ │ lsls r4, r5, #2 │ │ - b.n bbcf8 │ │ + b.n bbd08 │ │ subs r2, #0 │ │ - b.n bc7da │ │ + b.n bc7ea │ │ movs r0, #168 @ 0xa8 │ │ - b.n bbd00 │ │ + b.n bbd10 │ │ subs r3, #154 @ 0x9a │ │ - b.n bc850 │ │ + b.n bc860 │ │ subs r0, r0, #7 │ │ - b.n bc50e │ │ + b.n bc51e │ │ lsls r2, r2, #14 │ │ - b.n bc394 │ │ + b.n bc3a4 │ │ movs r0, #14 │ │ - b.n bc916 │ │ + b.n bc926 │ │ str r4, [r3, #4] │ │ - b.n bbd14 │ │ + b.n bbd24 │ │ str r4, [r2, r1] │ │ - b.n bbd18 │ │ + b.n bbd28 │ │ movs r0, #40 @ 0x28 │ │ - b.n bbbf8 │ │ + b.n bbc08 │ │ adds r1, #120 @ 0x78 │ │ - b.n bbd12 │ │ + b.n bbd22 │ │ movs r5, r0 │ │ - b.n bc28a │ │ + b.n bc29a │ │ strb r4, [r7, #5] │ │ - b.n bbd1a │ │ + b.n bbd2a │ │ asrs r4, r0, #32 │ │ - b.n bc374 │ │ + b.n bc384 │ │ movs r3, r0 │ │ - b.n bc316 │ │ + b.n bc326 │ │ lsls r0, r7, #5 │ │ - b.n bbd06 │ │ + b.n bbd16 │ │ asrs r7, r0, #32 │ │ - b.n bc340 │ │ + b.n bc350 │ │ asrs r4, r7, #5 │ │ - b.n bbd0e │ │ - beq.n bc23c │ │ - b.n bc69c │ │ + b.n bbd1e │ │ + beq.n bc24c │ │ + b.n bc6ac │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r5, r6, lr, pc} │ │ - b.n bbd48 │ │ + b.n bbd58 │ │ eors r0, r3 │ │ - b.n bbd2c │ │ + b.n bbd3c │ │ movs r0, r0 │ │ - b.n bc8ce │ │ + b.n bc8de │ │ movs r4, r2 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #1 │ │ - b.n bbd4c │ │ + b.n bbd5c │ │ adds r0, #160 @ 0xa0 │ │ - b.n bbd50 │ │ - add r0, pc, #16 @ (adr r0, bc234 ) │ │ - b.n bbd54 │ │ + b.n bbd60 │ │ + add r0, pc, #16 @ (adr r0, bc244 ) │ │ + b.n bbd64 │ │ str r0, [sp, #128] @ 0x80 │ │ - b.n bbd4c │ │ + b.n bbd5c │ │ strh r4, [r2, #0] │ │ - b.n bbd50 │ │ + b.n bbd60 │ │ str r4, [r1, #36] @ 0x24 │ │ - b.n bbd60 │ │ - b.n bc24c │ │ - b.n bbd58 │ │ + b.n bbd70 │ │ + b.n bc25c │ │ + b.n bbd68 │ │ stmia r0!, {r4} │ │ - b.n bbd5c │ │ + b.n bbd6c │ │ ands r0, r0 │ │ - b.n bbd64 │ │ + b.n bbd74 │ │ strb r2, [r6, #2] │ │ - b.n bc5e4 │ │ + b.n bc5f4 │ │ strh r0, [r6, #22] │ │ - b.n bc5e0 │ │ + b.n bc5f0 │ │ asrs r4, r6, #8 │ │ - b.n bbd88 │ │ + b.n bbd98 │ │ adds r2, #52 @ 0x34 │ │ - b.n bbd8c │ │ + b.n bbd9c │ │ lsls r4, r4, #16 │ │ stmia.w sp, {r2, r3, sp} │ │ - b.n bc770 │ │ + b.n bc780 │ │ asrs r1, r0, #32 │ │ - b.n bc378 │ │ + b.n bc388 │ │ adds r0, #3 │ │ - b.n bc37c │ │ + b.n bc38c │ │ lsrs r0, r2 │ │ stmia.w r2, {r0, r3, r5, r8, sl, sp} │ │ - b.n bc866 │ │ + b.n bc876 │ │ stmia r0!, {r2, r3, r4} │ │ - b.n bbd84 │ │ + b.n bbd94 │ │ movs r2, r4 │ │ and.w r0, r0, r4, lsl #4 │ │ - b.n bbda0 │ │ + b.n bbdb0 │ │ movs r2, r0 │ │ - b.n bc89a │ │ + b.n bc8aa │ │ asrs r4, r3, #2 │ │ - b.n bbd94 │ │ + b.n bbda4 │ │ asrs r4, r0, #1 │ │ - b.n bbdac │ │ + b.n bbdbc │ │ adds r0, #160 @ 0xa0 │ │ - b.n bbdb0 │ │ - b.n bc71c │ │ - b.n bbdb4 │ │ + b.n bbdc0 │ │ + b.n bc72c │ │ + b.n bbdc4 │ │ ands r4, r1 │ │ - b.n bbdac │ │ + b.n bbdbc │ │ strb r0, [r2, #0] │ │ - b.n bbdb0 │ │ + b.n bbdc0 │ │ str r4, [r2, #0] │ │ - b.n bbdb4 │ │ + b.n bbdc4 │ │ strh r0, [r4, #0] │ │ - b.n bbdb8 │ │ + b.n bbdc8 │ │ str r0, [sp, #0] │ │ - b.n bbdc0 │ │ - add r0, pc, #712 @ (adr r0, bc564 ) │ │ - b.n bc640 │ │ + b.n bbdd0 │ │ + add r0, pc, #712 @ (adr r0, bc574 ) │ │ + b.n bc650 │ │ adds r1, #204 @ 0xcc │ │ - b.n bbde0 │ │ + b.n bbdf0 │ │ asrs r4, r1, #7 │ │ - b.n bbde4 │ │ + b.n bbdf4 │ │ adds r0, #3 │ │ - b.n bc3c8 │ │ + b.n bc3d8 │ │ ands r0, r4 │ │ - b.n bbdc8 │ │ + b.n bbdd8 │ │ strb r4, [r4, #0] │ │ - b.n bbdcc │ │ + b.n bbddc │ │ asrs r1, r0, #32 │ │ - b.n bc3d4 │ │ + b.n bc3e4 │ │ str r0, [r5, #0] │ │ - b.n bbdd4 │ │ + b.n bbde4 │ │ asrs r3, r0, #32 │ │ asrs r0, r4, #6 │ │ strh r4, [r5, #0] │ │ - b.n bbddc │ │ + b.n bbdec │ │ str r0, [r6, #24] │ │ - b.n bbe04 │ │ + b.n bbe14 │ │ sbcs r0, r6 │ │ - b.n bbe08 │ │ + b.n bbe18 │ │ asrs r2, r0, #32 │ │ stmia.w sp, {r1, r2, sp, lr} │ │ - b.n bc3f0 │ │ + b.n bc400 │ │ ands r4, r0 │ │ - b.n bc3f4 │ │ + b.n bc404 │ │ asrs r4, r3, #2 │ │ - b.n bbe14 │ │ + b.n bbe24 │ │ movs r0, #8 │ │ - b.n bbdf8 │ │ + b.n bbe08 │ │ movs r0, #16 │ │ - b.n bc7fc │ │ + b.n bc80c │ │ tst r2, r0 │ │ stmia.w r2, {r1, r2, ip} │ │ - b.n bc62a │ │ + b.n bc63a │ │ cmp r6, #82 @ 0x52 │ │ - b.n bca2e │ │ + b.n bca3e │ │ str r4, [r1, r0] │ │ - b.n bbe0c │ │ + b.n bbe1c │ │ adds r0, #4 │ │ - b.n bc636 │ │ - add r0, pc, #112 @ (adr r0, bc368 ) │ │ - b.n bbe14 │ │ - ldrb r2, [r1, #15] │ │ + b.n bc646 │ │ + add r0, pc, #112 @ (adr r0, bc378 ) │ │ + b.n bbe24 │ │ + ldrb r1, [r1, #15] │ │ @ instruction: 0xebff4058 │ │ - b.n bbe3c │ │ + b.n bbe4c │ │ str r0, [r2, #8] │ │ - b.n bbe40 │ │ + b.n bbe50 │ │ str r1, [sp, #496] @ 0x1f0 │ │ - b.n bbe48 │ │ + b.n bbe58 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n bc42c │ │ + b.n bc43c │ │ @ instruction: 0xff98eaff │ │ lsls r4, r0, #4 │ │ - b.n bbe4a │ │ + b.n bbe5a │ │ adds r0, #0 │ │ - b.n bca5a │ │ + b.n bca6a │ │ str r0, [r6, r1] │ │ - b.n bbe58 │ │ - b.n bc3d0 │ │ - b.n bbe5c │ │ + b.n bbe68 │ │ + b.n bc3e0 │ │ + b.n bbe6c │ │ strh r4, [r4, #0] │ │ - b.n bbe26 │ │ + b.n bbe36 │ │ strh r0, [r0, #4] │ │ - b.n bbe64 │ │ + b.n bbe74 │ │ stc2l 10, cr14, [ip, #1020]! @ 0x3fc @ │ │ adds r0, #0 │ │ - b.n bc672 │ │ + b.n bc682 │ │ strh r1, [r1, #0] │ │ - b.n bc676 │ │ + b.n bc686 │ │ ldc2l 10, cr14, [r1, #1020] @ 0x3fc @ │ │ asrs r0, r0, #32 │ │ - b.n bca7e │ │ - b.n bc340 │ │ - b.n bca82 │ │ + b.n bca8e │ │ + b.n bc350 │ │ + b.n bca92 │ │ ldrsh.w lr, [r6, #2815] @ 0xaff │ │ movs r0, r0 │ │ - b.n bca8a │ │ + b.n bca9a │ │ asrs r0, r0, #32 │ │ - b.n bca8e │ │ + b.n bca9e │ │ @ instruction: 0xff9feaff │ │ lsls r4, r6, #30 │ │ - b.n bc966 │ │ + b.n bc976 │ │ lsrs r7, r7, #31 │ │ - b.n bc9f8 │ │ + b.n bca08 │ │ movs r2, r0 │ │ - b.n bc7de │ │ + b.n bc7ee │ │ mrc2 10, 4, lr, cr13, cr15, {7} @ │ │ strh r2, [r1, #0] │ │ - b.n bc6a6 │ │ + b.n bc6b6 │ │ adds r0, #0 │ │ - b.n bcb2a │ │ - add r0, pc, #48 @ (adr r0, bc39c ) │ │ - b.n bc6ae │ │ - b.n bc378 │ │ - b.n bc6b2 │ │ + b.n bcb3a │ │ + add r0, pc, #48 @ (adr r0, bc3ac ) │ │ + b.n bc6be │ │ + b.n bc388 │ │ + b.n bc6c2 │ │ ldc2l 10, cr14, [sl, #1020] @ 0x3fc @ │ │ movs r0, #4 │ │ - b.n bcaba │ │ + b.n bcaca │ │ str r4, [r3, #8] │ │ - b.n bbeb8 │ │ + b.n bbec8 │ │ movs r1, #5 │ │ - b.n bc406 │ │ + b.n bc416 │ │ adds r0, #2 │ │ - b.n bc2a6 │ │ + b.n bc2b6 │ │ str r0, [r0, r0] │ │ - b.n bbeaa │ │ + b.n bbeba │ │ adds r0, #3 │ │ - b.n bc418 │ │ + b.n bc428 │ │ movs r6, r1 │ │ - b.n bc638 │ │ + b.n bc648 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n bc81a │ │ + b.n bc82a │ │ movs r6, r0 │ │ - b.n bc63e │ │ + b.n bc64e │ │ @ instruction: 0xfff71aff │ │ str r0, [r2, #8] │ │ - b.n bbee0 │ │ - b.n bc3b0 │ │ - b.n bc6ea │ │ + b.n bbef0 │ │ + b.n bc3c0 │ │ + b.n bc6fa │ │ str r0, [r6, r1] │ │ - b.n bbee8 │ │ + b.n bbef8 │ │ mrc2 10, 3, lr, cr3, cr15, {7} @ │ │ - b.n bc3bc │ │ - b.n bc6f6 │ │ + b.n bc3cc │ │ + b.n bc706 │ │ str r0, [r2, #8] │ │ - b.n bbef4 │ │ + b.n bbf04 │ │ str r0, [r6, r1] │ │ - b.n bbef8 │ │ + b.n bbf08 │ │ strb r4, [r2, #2] │ │ - b.n bbefc │ │ + b.n bbf0c │ │ movs r2, r0 │ │ - b.n bc9fa │ │ + b.n bca0a │ │ mrc2 10, 3, r0, cr3, cr15, {7} @ │ │ strh r2, [r1, #0] │ │ - b.n bc70e │ │ + b.n bc71e │ │ adds r0, #0 │ │ - b.n bcb92 │ │ - add r0, pc, #48 @ (adr r0, bc404 ) │ │ - b.n bc716 │ │ + b.n bcba2 │ │ + add r0, pc, #48 @ (adr r0, bc414 ) │ │ + b.n bc726 │ │ stc2l 10, cr14, [r1, #1020] @ 0x3fc @ │ │ - b.n bc48c │ │ - b.n bbf18 │ │ + b.n bc49c │ │ + b.n bbf28 │ │ adds r0, #0 │ │ - b.n bc722 │ │ + b.n bc732 │ │ str r0, [r2, #8] │ │ - b.n bbf20 │ │ + b.n bbf30 │ │ str r0, [sp, #288] @ 0x120 │ │ - b.n bbf28 │ │ + b.n bbf38 │ │ str r0, [r6, r1] │ │ - b.n bbf28 │ │ + b.n bbf38 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n bc510 │ │ + b.n bc520 │ │ strb r4, [r2, #2] │ │ - b.n bbf30 │ │ + b.n bbf40 │ │ mcr2 10, 7, lr, cr11, cr15, {7} @ │ │ - mrc2 15, 4, pc, cr4, cr4, {7} │ │ - ldmia r3!, {r4, r5, r6} │ │ - @ instruction: 0xfff42c90 │ │ + mrc2 15, 2, pc, cr6, cr4, {7} │ │ + ldmia r2!, {r0, r1, r3, r5, r7} │ │ + vmull.u q9, d20, d16 │ │ movs r2, r0 │ │ - @ instruction: 0xffe4fff4 │ │ - cmp r4, #183 @ 0xb7 │ │ - vrshr.u32 , , #11 │ │ - @ instruction: 0xfff51ddb │ │ - @ instruction: 0xfff528d8 │ │ + @ instruction: 0xffa6fff4 │ │ + cmp r6, #57 @ 0x39 │ │ + vneg.s16 d17, d13 │ │ + @ instruction: 0xfff51ebf │ │ + vtbx.8 d18, {d21}, d24 │ │ movs r2, r0 │ │ - cmp r1, #172 @ 0xac │ │ + cmp r1, #188 @ 0xbc │ │ movs r2, r0 │ │ - movs r0, r3 │ │ - vqdmulh.s q9, , d27[0] │ │ - vrshr.u64 d17, d1, #11 │ │ - @ instruction: 0xfff51e25 │ │ - vqrshrun.s64 d18, q6, #11 │ │ + @ instruction: 0xffdafff4 │ │ + cmp r6, #109 @ 0x6d │ │ + vneg.s16 , │ │ + @ instruction: 0xfff51f09 │ │ + vtbx.8 d18, {d5}, d28 │ │ movs r2, r0 │ │ - cmp r0, #164 @ 0xa4 │ │ + cmp r0, #180 @ 0xb4 │ │ movs r2, r0 │ │ - movs r4, #92 @ 0x5c │ │ + movs r4, #108 @ 0x6c │ │ movs r2, r0 │ │ - adds r2, #96 @ 0x60 │ │ + adds r2, #112 @ 0x70 │ │ movs r2, r0 │ │ - lsls r4, r3, #8 │ │ - @ instruction: 0xfff50db3 │ │ - vqrshrun.s64 d16, q12, #11 │ │ - vqshlu.s64 , q11, #53 @ 0x35 │ │ - @ instruction: 0xfff42dbc │ │ + lsls r4, r7, #7 │ │ + @ instruction: 0xfff50dbe │ │ + vqshrun.s64 d16, q13, #11 │ │ + vclt.f16 d31, d21, #0 │ │ + vqrdmulh.s q9, q10, d12[0] │ │ movs r2, r0 │ │ - cmp r7, #168 @ 0xa8 │ │ + cmp r7, #184 @ 0xb8 │ │ movs r2, r0 │ │ - cmp r1, #32 │ │ + cmp r1, #48 @ 0x30 │ │ movs r2, r0 │ │ - movs r7, #12 │ │ + movs r7, #28 │ │ movs r2, r0 │ │ - cmp r4, #84 @ 0x54 │ │ + cmp r4, #100 @ 0x64 │ │ movs r2, r0 │ │ - vmaxnm.f32 , q14, q10 │ │ - bl fff2d450 │ │ - stc2l 15, cr15, [r4, #976]! @ 0x3d0 │ │ - adds r6, #80 @ 0x50 │ │ - vcgt.s16 , , #0 │ │ - vqrdmlsh.s q15, , d23[0] │ │ - vdup.32 d31, d4[0] │ │ - vdup.32 d31, d12[0] │ │ - vcvt.f16.u16 , q14, #12 │ │ - @ instruction: 0xfff4bfdc │ │ - @ instruction: 0xfff42540 │ │ + mcr2 15, 6, pc, cr14, cr4, {7} @ │ │ + bl fff0d460 │ │ + stc2 15, cr15, [r6, #976]! @ 0x3d0 │ │ + adds r6, #214 @ 0xd6 │ │ + vsra.u32 , , #11 │ │ + @ instruction: 0xfff5ef26 │ │ + vtbx.8 d31, {d20-d23}, d6 │ │ + vtbx.8 d31, {d20-d23}, d14 │ │ + vcvt.f16.u16 d31, d30, #12 │ │ + vshr.u32 d28, d14, #12 │ │ + vsli.32 q9, q0, #20 │ │ movs r2, r0 │ │ - ldr r7, [pc, #960] @ (bc850 ) │ │ + ldr r7, [pc, #960] @ (bc860 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n bc9b0 │ │ + b.n bc9c0 │ │ svc 129 @ 0x81 │ │ - b.n bc934 │ │ + b.n bc944 │ │ strh r0, [r0, #18] │ │ - b.n bbfbe │ │ + b.n bbfce │ │ ands r0, r0 │ │ - b.n bc7e2 │ │ + b.n bc7f2 │ │ movs r0, r0 │ │ - b.n bcb56 │ │ + b.n bcb66 │ │ movs r4, r6 │ │ lsrs r0, r0, #8 │ │ lsls r0, r2, #3 │ │ - b.n bc83e │ │ + b.n bc84e │ │ strh r4, [r1, r1] │ │ - b.n bbfda │ │ + b.n bbfea │ │ movs r0, #0 │ │ - b.n bc538 │ │ + b.n bc548 │ │ movs r5, r0 │ │ - b.n bc75e │ │ + b.n bc76e │ │ movs r0, r6 │ │ ldrh r0, [r0, #16] │ │ movs r0, r0 │ │ - b.n bc764 │ │ + b.n bc774 │ │ lsls r3, r0, #4 │ │ subs r0, r0, r0 │ │ movs r0, #129 @ 0x81 │ │ - b.n bc5cc │ │ + b.n bc5dc │ │ movs r0, r2 │ │ - b.n bc9de │ │ + b.n bc9ee │ │ strb r0, [r5, #0] │ │ - b.n bbffa │ │ + b.n bc00a │ │ movs r1, #2 │ │ - b.n bc5d6 │ │ + b.n bc5e6 │ │ strb r1, [r0, #0] │ │ - b.n bc968 │ │ + b.n bc978 │ │ adds r0, #4 │ │ - b.n bc002 │ │ + b.n bc012 │ │ movs r7, r0 │ │ - b.n bc788 │ │ + b.n bc798 │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ strb r0, [r0, #0] │ │ - b.n bc00e │ │ + b.n bc01e │ │ strb r2, [r7, #2] │ │ - b.n bc89c │ │ + b.n bc8ac │ │ lsrs r1, r0, #4 │ │ - b.n bcba0 │ │ + b.n bcbb0 │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ adds r0, #40 @ 0x28 │ │ - b.n bc002 │ │ + b.n bc012 │ │ strb r4, [r1, #0] │ │ - b.n bc982 │ │ + b.n bc992 │ │ str r0, [r1, #0] │ │ - b.n bbf26 │ │ + b.n bbf36 │ │ movs r0, #1 │ │ - b.n bc98c │ │ + b.n bc99c │ │ asrs r1, r0, #32 │ │ - b.n bc98c │ │ + b.n bc99c │ │ movs r2, r0 │ │ - b.n bc7ba │ │ + b.n bc7ca │ │ movs r0, #7 │ │ - b.n bc852 │ │ + b.n bc862 │ │ adds r0, #6 │ │ - b.n bc856 │ │ + b.n bc866 │ │ @ instruction: 0xfff20aff │ │ str r1, [r0, #8] │ │ - b.n bc620 │ │ + b.n bc630 │ │ adds r3, #196 @ 0xc4 │ │ - b.n bc060 │ │ + b.n bc070 │ │ movs r0, #0 │ │ - b.n bc056 │ │ + b.n bc066 │ │ strb r1, [r0, #0] │ │ - b.n bcc6a │ │ + b.n bcc7a │ │ lsls r6, r0, #4 │ │ - b.n bc62e │ │ + b.n bc63e │ │ adds r0, #3 │ │ - b.n bc650 │ │ + b.n bc660 │ │ movs r1, r0 │ │ - b.n bc7da │ │ + b.n bc7ea │ │ movs r4, r1 │ │ - b.n bca3a │ │ + b.n bca4a │ │ str r0, [r0, #0] │ │ - b.n bccfe │ │ + b.n bcd0e │ │ asrs r4, r0, #32 │ │ - b.n bc052 │ │ + b.n bc062 │ │ lsls r0, r1, #3 │ │ stmia.w r0, {r1, r2, r3, r4, r6, r7} │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n bc05e │ │ + b.n bc06e │ │ asrs r1, r0, #32 │ │ - b.n bc5d6 │ │ + b.n bc5e6 │ │ lsls r4, r7, #8 │ │ - b.n bc07e │ │ - add r0, pc, #52 @ (adr r0, bc58c ) │ │ - b.n bc89a │ │ + b.n bc08e │ │ + add r0, pc, #52 @ (adr r0, bc59c ) │ │ + b.n bc8aa │ │ adds r2, #76 @ 0x4c │ │ - b.n bc086 │ │ + b.n bc096 │ │ movs r1, r0 │ │ - b.n bc662 │ │ + b.n bc672 │ │ lsls r4, r7, #8 │ │ - b.n bc06e │ │ + b.n bc07e │ │ movs r0, #1 │ │ - b.n bc5f0 │ │ + b.n bc600 │ │ movs r2, #76 @ 0x4c │ │ - b.n bc076 │ │ + b.n bc086 │ │ movs r0, r1 │ │ - b.n bc0a2 │ │ + b.n bc0b2 │ │ movs r1, r0 │ │ - b.n bc5f6 │ │ + b.n bc606 │ │ movs r0, r1 │ │ - b.n bc08a │ │ + b.n bc09a │ │ lsls r5, r2, #2 │ │ and.w r2, r0, ip, lsl #21 │ │ - b.n bc0aa │ │ + b.n bc0ba │ │ movs r7, r7 │ │ - b.n bcc30 │ │ + b.n bcc40 │ │ movs r5, r2 │ │ subs r2, #0 │ │ movs r3, r2 │ │ - b.n bcb90 │ │ + b.n bcba0 │ │ lsls r5, r0, #6 │ │ - b.n bc692 │ │ + b.n bc6a2 │ │ movs r7, r3 │ │ - b.n bc52c │ │ + b.n bc53c │ │ strb r0, [r1, #0] │ │ - b.n bca1a │ │ + b.n bca2a │ │ movs r7, r0 │ │ - b.n bc8de │ │ - strb r3, [r2, #2] │ │ + b.n bc8ee │ │ + strb r7, [r2, #2] │ │ add.w r0, r0, r0 │ │ - b.n bcc46 │ │ + b.n bcc56 │ │ lsls r0, r1, #3 │ │ lsrs r0, r0, #8 │ │ - add r0, pc, #0 @ (adr r0, bc5ac ) │ │ - b.n bc8ee │ │ + add r0, pc, #0 @ (adr r0, bc5bc ) │ │ + b.n bc8fe │ │ movs r2, r0 │ │ - b.n bcd72 │ │ + b.n bcd82 │ │ lsls r7, r4, #4 │ │ - b.n bc6b6 │ │ + b.n bc6c6 │ │ lsls r0, r4, #2 │ │ - b.n bc8fa │ │ + b.n bc90a │ │ movs r0, r0 │ │ - b.n bc0d2 │ │ + b.n bc0e2 │ │ movs r0, r0 │ │ - b.n bcd02 │ │ + b.n bcd12 │ │ movs r4, r0 │ │ - b.n bc11a │ │ + b.n bc12a │ │ asrs r0, r1, #9 │ │ - b.n bc0f2 │ │ + b.n bc102 │ │ str r0, [sp, #160] @ 0xa0 │ │ - b.n bc0f6 │ │ + b.n bc106 │ │ movs r0, r0 │ │ - b.n bcc74 │ │ + b.n bcc84 │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ strb r3, [r0, #0] │ │ - b.n bcd1a │ │ + b.n bcd2a │ │ movs r0, r0 │ │ - b.n bcd1e │ │ + b.n bcd2e │ │ movs r2, r2 │ │ @ instruction: 0xea00a00d │ │ - b.n bc926 │ │ + b.n bc936 │ │ asrs r0, r1, #9 │ │ - b.n bc112 │ │ + b.n bc122 │ │ str r0, [sp, #160] @ 0xa0 │ │ - b.n bc116 │ │ + b.n bc126 │ │ movs r0, r0 │ │ - b.n bcc94 │ │ + b.n bcca4 │ │ @ instruction: 0xfff70aff │ │ movs r0, #5 │ │ - b.n bc68c │ │ + b.n bc69c │ │ movs r0, r0 │ │ - b.n bcd3e │ │ + b.n bcd4e │ │ strb r3, [r0, #0] │ │ - b.n bcd42 │ │ + b.n bcd52 │ │ adds r0, #16 │ │ - b.n bc128 │ │ + b.n bc138 │ │ movs r3, r0 │ │ - b.n bc8ae │ │ + b.n bc8be │ │ movs r4, r0 │ │ ldrh r0, [r0, #16] │ │ movs r1, r0 │ │ - b.n bcb12 │ │ + b.n bcb22 │ │ adds r1, #0 │ │ - b.n bc52a │ │ + b.n bc53a │ │ adds r0, #16 │ │ - b.n bc13c │ │ + b.n bc14c │ │ movs r7, r0 │ │ - b.n bc8c4 │ │ + b.n bc8d4 │ │ strb r3, [r0, #0] │ │ strh r0, [r4, #12] │ │ asrs r4, r2, #32 │ │ - b.n bc148 │ │ + b.n bc158 │ │ movs r0, r0 │ │ - b.n bcccc │ │ + b.n bccdc │ │ @ instruction: 0xfff41aff │ │ asrs r1, r0, #32 │ │ - b.n bcb40 │ │ + b.n bcb50 │ │ movs r1, r1 │ │ - b.n bc8d8 │ │ + b.n bc8e8 │ │ lsls r5, r3, #2 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n bc152 │ │ + b.n bc162 │ │ movs r2, r1 │ │ - b.n bc982 │ │ + b.n bc992 │ │ lsls r4, r6, #3 │ │ add.w r0, r0, r0, lsl #4 │ │ - b.n bc17e │ │ + b.n bc18e │ │ movs r1, r0 │ │ - b.n bcaf0 │ │ + b.n bcb00 │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ asrs r1, r0, #32 │ │ - b.n bc6e8 │ │ + b.n bc6f8 │ │ movs r0, #8 │ │ - b.n bcb6e │ │ + b.n bcb7e │ │ adds r0, #4 │ │ - b.n bbf82 │ │ + b.n bbf92 │ │ str r1, [r0, #0] │ │ - b.n bcaf0 │ │ + b.n bcb00 │ │ movs r6, r0 │ │ - b.n bc90c │ │ + b.n bc91c │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n bcb0e │ │ + b.n bcb1e │ │ strb r3, [r0, #0] │ │ - b.n bc9b2 │ │ + b.n bc9c2 │ │ @ instruction: 0xfff81aff │ │ strb r1, [r0, #0] │ │ - b.n bc9ba │ │ + b.n bc9ca │ │ movs r0, r5 │ │ - b.n bc1a6 │ │ + b.n bc1b6 │ │ movs r0, r0 │ │ - b.n bcd32 │ │ + b.n bcd42 │ │ asrs r4, r1, #9 │ │ - b.n bc1ae │ │ + b.n bc1be │ │ movs r7, r0 │ │ - b.n bc70a │ │ + b.n bc71a │ │ strb r0, [r5, #0] │ │ - b.n bc196 │ │ + b.n bc1a6 │ │ asrs r0, r0, #32 │ │ - b.n bc714 │ │ + b.n bc724 │ │ asrs r4, r1, #9 │ │ - b.n bc19e │ │ + b.n bc1ae │ │ lsls r6, r1, #1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r7, #8 │ │ - b.n bc1c6 │ │ + b.n bc1d6 │ │ asrs r0, r0, #32 │ │ - b.n bc7a4 │ │ + b.n bc7b4 │ │ asrs r4, r7, #8 │ │ - b.n bc1ae │ │ + b.n bc1be │ │ str r0, [r0, r0] │ │ - b.n bc1da │ │ + b.n bc1ea │ │ asrs r0, r1, #32 │ │ - b.n bc1de │ │ + b.n bc1ee │ │ movs r0, r0 │ │ - b.n bcd5c │ │ + b.n bcd6c │ │ movs r0, r0 │ │ - b.n bc738 │ │ + b.n bc748 │ │ movs r0, r1 │ │ - b.n bc1ca │ │ + b.n bc1da │ │ movs r5, r3 │ │ lsrs r0, r0, #8 │ │ movs r0, #32 │ │ - b.n bcbd2 │ │ + b.n bcbe2 │ │ stmia r0!, {r4} │ │ - b.n bcbd6 │ │ + b.n bcbe6 │ │ str r0, [r0, #0] │ │ - b.n bce0a │ │ + b.n bce1a │ │ movs r0, r0 │ │ - b.n bce0e │ │ + b.n bce1e │ │ movs r3, r0 │ │ and.w r0, r0, r1, lsl #24 │ │ - b.n bca16 │ │ + b.n bca26 │ │ movs r1, r0 │ │ - b.n bcbda │ │ + b.n bcbea │ │ movs r5, r0 │ │ - b.n bc97e │ │ + b.n bc98e │ │ movs r7, r1 │ │ cmp r2, #0 │ │ adds r0, #2 │ │ - b.n bca26 │ │ + b.n bca36 │ │ asrs r4, r1, #32 │ │ - b.n bc00e │ │ + b.n bc01e │ │ movs r7, r0 │ │ - b.n bc990 │ │ + b.n bc9a0 │ │ @ instruction: 0xfff82aff │ │ asrs r1, r0, #32 │ │ - b.n bcc02 │ │ + b.n bcc12 │ │ movs r6, r0 │ │ - b.n bc99a │ │ + b.n bc9aa │ │ @ instruction: 0xfff40aff │ │ str r1, [r0, #8] │ │ - b.n bc804 │ │ + b.n bc814 │ │ adds r0, #4 │ │ - b.n bcb8c │ │ + b.n bcb9c │ │ lsrs r0, r0, #12 │ │ ldcl 1, cr6, [r3, #24] │ │ - b.n bc826 │ │ + b.n bc836 │ │ adds r0, #8 │ │ - b.n bc238 │ │ + b.n bc248 │ │ adds r0, #8 │ │ - b.n bc222 │ │ + b.n bc232 │ │ lsrs r0, r0, #12 │ │ stcl 0, cr5, [r6] │ │ - b.n bc24e │ │ + b.n bc25e │ │ @ instruction: 0xffebeaff │ │ str r0, [r0, #0] │ │ - b.n bc236 │ │ + b.n bc246 │ │ str r4, [r0, r0] │ │ - b.n bc25a │ │ + b.n bc26a │ │ movs r5, r0 │ │ - b.n bc9ce │ │ + b.n bc9de │ │ movs r5, r0 │ │ subs r2, #0 │ │ movs r5, r3 │ │ and.w r0, r0, r0, lsl #24 │ │ - b.n bce7a │ │ + b.n bce8a │ │ movs r0, r0 │ │ - b.n bce7e │ │ + b.n bce8e │ │ str r4, [r0, r0] │ │ - b.n bc272 │ │ + b.n bc282 │ │ movs r5, r0 │ │ - b.n bc9e6 │ │ + b.n bc9f6 │ │ movs r0, r3 │ │ cmp r2, #0 │ │ asrs r0, r0, #2 │ │ - b.n bc84e │ │ + b.n bc85e │ │ stmia r0!, {r4} │ │ - b.n bcc62 │ │ + b.n bcc72 │ │ asrs r1, r0, #4 │ │ - b.n bc866 │ │ + b.n bc876 │ │ movs r0, #32 │ │ - b.n bcc5c │ │ + b.n bcc6c │ │ movs r3, r0 │ │ and.w r0, r0, r1, lsl #24 │ │ - b.n bcaa2 │ │ + b.n bcab2 │ │ movs r1, r0 │ │ - b.n bcc66 │ │ + b.n bcc76 │ │ movs r5, r0 │ │ - b.n bca0a │ │ + b.n bca1a │ │ movs r7, r1 │ │ cmp r2, #0 │ │ adds r0, #2 │ │ - b.n bcab2 │ │ + b.n bcac2 │ │ asrs r4, r1, #32 │ │ - b.n bc09a │ │ + b.n bc0aa │ │ movs r7, r0 │ │ - b.n bca1c │ │ + b.n bca2c │ │ @ instruction: 0xfff82aff │ │ asrs r1, r0, #32 │ │ - b.n bcc8e │ │ + b.n bcc9e │ │ movs r6, r0 │ │ - b.n bca26 │ │ + b.n bca36 │ │ @ instruction: 0xfff40aff │ │ str r1, [r0, #8] │ │ - b.n bc890 │ │ + b.n bc8a0 │ │ adds r0, #4 │ │ - b.n bcc18 │ │ + b.n bcc28 │ │ lsrs r0, r0, #12 │ │ ldcl 1, cr6, [r3, #24] │ │ - b.n bc8b2 │ │ + b.n bc8c2 │ │ adds r0, #8 │ │ - b.n bc2c4 │ │ + b.n bc2d4 │ │ adds r0, #8 │ │ - b.n bc2ae │ │ + b.n bc2be │ │ lsrs r0, r0, #12 │ │ stcl 0, cr5, [r6, #16] │ │ - b.n bc2da │ │ + b.n bc2ea │ │ @ instruction: 0xffebeaff │ │ asrs r6, r0, #2 │ │ - b.n bc8be │ │ + b.n bc8ce │ │ lsls r4, r5, #4 │ │ - b.n bc2f4 │ │ + b.n bc304 │ │ movs r0, #1 │ │ - b.n bcefa │ │ + b.n bcf0a │ │ adds r0, #0 │ │ - b.n bcf7e │ │ + b.n bcf8e │ │ asrs r1, r0, #4 │ │ - b.n bc8d2 │ │ + b.n bc8e2 │ │ movs r0, r0 │ │ - b.n bc8e4 │ │ + b.n bc8f4 │ │ str r4, [r0, #0] │ │ - b.n bc2da │ │ + b.n bc2ea │ │ movs r4, r3 │ │ - b.n bc2d0 │ │ + b.n bc2e0 │ │ adds r0, #32 │ │ - b.n bc2d4 │ │ + b.n bc2e4 │ │ movs r0, #36 @ 0x24 │ │ - b.n bc2d8 │ │ + b.n bc2e8 │ │ strb r4, [r0, #0] │ │ - b.n bcb1a │ │ + b.n bcb2a │ │ strh r0, [r1, r1] │ │ - b.n bc34c │ │ + b.n bc35c │ │ movs r0, r0 │ │ - b.n bce8c │ │ + b.n bce9c │ │ movs r2, r6 │ │ lsrs r0, r0, #8 │ │ strh r1, [r0, #0] │ │ - b.n bcf2a │ │ + b.n bcf3a │ │ movs r3, r0 │ │ and.w r0, r0, r0, lsl #28 │ │ - b.n bcb32 │ │ + b.n bcb42 │ │ str r0, [r0, r0] │ │ - b.n bc324 │ │ + b.n bc334 │ │ movs r0, r0 │ │ - b.n bcea4 │ │ + b.n bceb4 │ │ movs r4, r5 │ │ lsrs r0, r0, #8 │ │ asrs r0, r2, #32 │ │ - b.n bc32c │ │ + b.n bc33c │ │ movs r4, r2 │ │ - b.n bcd10 │ │ + b.n bcd20 │ │ movs r0, #40 @ 0x28 │ │ - b.n bc332 │ │ + b.n bc342 │ │ movs r1, r0 │ │ - b.n bcab2 │ │ + b.n bcac2 │ │ @ instruction: 0xfff68aff │ │ movs r0, r0 │ │ - b.n bc336 │ │ + b.n bc346 │ │ movs r0, r0 │ │ - b.n bc328 │ │ + b.n bc338 │ │ asrs r6, r0, #32 │ │ - b.n bc3c6 │ │ + b.n bc3d6 │ │ movs r0, r1 │ │ - b.n bce44 │ │ + b.n bce54 │ │ movs r0, r2 │ │ subs r0, r0, r0 │ │ str r0, [r0, #4] │ │ - b.n bc352 │ │ + b.n bc362 │ │ movs r7, r0 │ │ - b.n bc3da │ │ + b.n bc3ea │ │ movs r0, r1 │ │ - b.n bce52 │ │ + b.n bce62 │ │ movs r0, r2 │ │ subs r0, r0, r0 │ │ asrs r0, r6, #2 │ │ - b.n bc366 │ │ + b.n bc376 │ │ lsls r0, r3, #4 │ │ - b.n bc36a │ │ + b.n bc37a │ │ movs r1, r0 │ │ - b.n bcae2 │ │ + b.n bcaf2 │ │ movs r5, r2 │ │ cmp r2, #0 │ │ asrs r4, r3, #4 │ │ - b.n bc376 │ │ + b.n bc386 │ │ movs r1, r0 │ │ - b.n bcd4e │ │ + b.n bcd5e │ │ asrs r4, r2, #32 │ │ - b.n bc35c │ │ + b.n bc36c │ │ lsls r0, r3, #4 │ │ - b.n bc362 │ │ + b.n bc372 │ │ str r4, [r3, r4] │ │ - b.n bc366 │ │ + b.n bc376 │ │ str r0, [r0, r0] │ │ - b.n bc38c │ │ + b.n bc39c │ │ movs r0, r0 │ │ - b.n bcf0c │ │ + b.n bcf1c │ │ @ instruction: 0xffe51aff │ │ movs r1, r2 │ │ and.w r0, r0, r0, lsl #20 │ │ - b.n bcbae │ │ + b.n bcbbe │ │ movs r0, r0 │ │ - b.n bcf1c │ │ + b.n bcf2c │ │ @ instruction: 0xffe11aff │ │ movs r5, r1 │ │ and.w r0, r0, ip, lsr #1 │ │ - b.n bc42a │ │ + b.n bc43a │ │ movs r0, #255 @ 0xff │ │ - b.n bcfc2 │ │ + b.n bcfd2 │ │ asrs r0, r3, #32 │ │ - b.n bcbc6 │ │ + b.n bcbd6 │ │ movs r5, r0 │ │ - b.n bcbca │ │ - str r0, [r1, #32] │ │ - @ instruction: 0xfb0010b0 │ │ - b.n bc3be │ │ + b.n bcbda │ │ + str r5, [r7, #36] @ 0x24 │ │ + @ instruction: 0xfa0010b0 │ │ + b.n bc3ce │ │ lsls r0, r3, #4 │ │ - b.n bc3c2 │ │ + b.n bc3d2 │ │ movs r1, r0 │ │ - b.n bcb3a │ │ + b.n bcb4a │ │ @ instruction: 0xffe93aff │ │ movs r4, r0 │ │ - b.n bcd2c │ │ + b.n bcd3c │ │ ldr r6, [r0, #124] @ 0x7c │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n bc3d8 │ │ + b.n bc3e8 │ │ movs r0, r0 │ │ - b.n bcf58 │ │ + b.n bcf68 │ │ @ instruction: 0xffd21aff │ │ movs r5, r1 │ │ - b.n bcbf6 │ │ + b.n bcc06 │ │ movs r0, r0 │ │ - b.n bcb6e │ │ + b.n bcb7e │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n bcd56 │ │ + b.n bcd66 │ │ ldr r6, [r7, #120] @ 0x78 │ │ add.w r0, r0, r8, asr #32 │ │ - b.n bc3f2 │ │ + b.n bc402 │ │ lsls r4, r6, #8 │ │ - b.n bc3d6 │ │ - beq.n bc908 │ │ - b.n bcd68 │ │ + b.n bc3e6 │ │ + beq.n bc918 │ │ + b.n bcd78 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3} │ │ - b.n bcc1a │ │ - b.n bc820 │ │ + b.n bcc2a │ │ + b.n bc830 │ │ @ instruction: 0xebff1004 │ │ - b.n bc412 │ │ + b.n bc422 │ │ mrc2 10, 7, lr, cr7, cr15, {7} @ │ │ - mvns r7, r2 │ │ - vcvt.bf16.f32 d20, │ │ + mvns r7, r0 │ │ + vqshlu.s32 q10, , #22 │ │ vrshr.u32 , q0, #10 │ │ - b.n bc412 │ │ + b.n bc422 │ │ lsls r6, r0, #4 │ │ - b.n bcfdc │ │ + b.n bcfec │ │ vrhadd.u16 d0, d14, d31 │ │ - ldr r4, [pc, #64] @ (bc93c ) │ │ + ldr r4, [pc, #64] @ (bc94c ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n bce1c │ │ + b.n bce2c │ │ movs r2, #84 @ 0x54 │ │ - b.n bc426 │ │ - b.n bc908 │ │ - b.n bc42e │ │ + b.n bc436 │ │ + b.n bc918 │ │ + b.n bc43e │ │ movs r6, r1 │ │ - b.n bcbb4 │ │ + b.n bcbc4 │ │ movs r0, r1 │ │ ldrh r0, [r0, #16] │ │ stmia r0!, {r0} │ │ - b.n bd056 │ │ + b.n bd066 │ │ asrs r3, r0, #32 │ │ - b.n bcc5a │ │ + b.n bcc6a │ │ asrs r1, r0 │ │ - b.n bc842 │ │ + b.n bc852 │ │ asrs r1, r0, #32 │ │ - b.n bce24 │ │ + b.n bce34 │ │ movs r6, r1 │ │ - b.n bcbc8 │ │ + b.n bcbd8 │ │ asrs r3, r0 │ │ - b.n bc82e │ │ + b.n bc83e │ │ ands r4, r0 │ │ - b.n bccc6 │ │ + b.n bccd6 │ │ adds r0, #3 │ │ - b.n bca3a │ │ + b.n bca4a │ │ @ instruction: 0xfff89aff │ │ asrs r1, r0, #32 │ │ - b.n bcdc0 │ │ + b.n bcdd0 │ │ asrs r0, r0, #32 │ │ - b.n bc442 │ │ + b.n bc452 │ │ asrs r2, r0, #4 │ │ - b.n bd102 │ │ + b.n bd112 │ │ asrs r0, r2, #9 │ │ - b.n bc446 │ │ - ldr r4, [pc, #64] @ (bc988 ) │ │ + b.n bc456 │ │ + ldr r4, [pc, #64] @ (bc998 ) │ │ ldmia.w sp!, {r1, r2, r3, r4, r8, r9, sl, fp, ip, sp, lr, pc} │ │ - b.n bcbac │ │ - ldr r4, [pc, #64] @ (bc990 ) │ │ + b.n bcbbc │ │ + ldr r4, [pc, #64] @ (bc9a0 ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n bce70 │ │ + b.n bce80 │ │ asrs r3, r2, #32 │ │ - b.n bcf5c │ │ + b.n bcf6c │ │ lsls r0, r0, #6 │ │ - b.n bca60 │ │ + b.n bca70 │ │ movs r7, r3 │ │ - b.n bc8f8 │ │ + b.n bc908 │ │ ands r0, r1 │ │ - b.n bcde6 │ │ + b.n bcdf6 │ │ movs r4, r0 │ │ - b.n bccaa │ │ - ldr r0, [r4, #120] @ 0x78 │ │ + b.n bccba │ │ + ldr r4, [r4, #120] @ 0x78 │ │ add.w r0, r0, r0 │ │ - b.n bd012 │ │ + b.n bd022 │ │ asrs r2, r0, #32 │ │ asrs r0, r4, #15 │ │ movs r0, r0 │ │ lsls r0, r4, #14 │ │ asrs r4, r4, #4 │ │ asrs r1, r0, #2 │ │ asrs r1, r4, #2 │ │ @@ -236513,127 +236393,127 @@ │ │ asrs r0, r0, #22 │ │ asrs r0, r0, #32 │ │ asrs r0, r4, #14 │ │ asrs r4, r0, #32 │ │ asrs r0, r4, #22 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r0, r1, r2, ip, sp} │ │ - b.n bc536 │ │ + b.n bc546 │ │ movs r0, r1 │ │ - b.n bcfc0 │ │ + b.n bcfd0 │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n bd046 │ │ + b.n bd056 │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ adds r0, #176 @ 0xb0 │ │ - b.n bc4ca │ │ + b.n bc4da │ │ movs r1, #24 │ │ - b.n bc4ce │ │ + b.n bc4de │ │ movs r3, r0 │ │ - b.n bcc56 │ │ + b.n bcc66 │ │ adds r1, #28 │ │ adds r5, #144 @ 0x90 │ │ movs r0, #1 │ │ adds r2, #130 @ 0x82 │ │ adds r0, #20 │ │ adds r5, #129 @ 0x81 │ │ movs r1, #24 │ │ adds r5, #128 @ 0x80 │ │ asrs r4, r3, #4 │ │ adds r5, #128 @ 0x80 │ │ vrhadd.u16 d3, d14, d31 │ │ movs r4, r0 │ │ - b.n bce50 │ │ + b.n bce60 │ │ ldr r3, [r7, #116] @ 0x74 │ │ and.w ip, r0, r0, ror #17 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n bcef4 │ │ + b.n bcf04 │ │ adds r0, #92 @ 0x5c │ │ - b.n bc57e │ │ + b.n bc58e │ │ ands r0, r0 │ │ - b.n bcd22 │ │ + b.n bcd32 │ │ movs r1, r0 │ │ - b.n bcd26 │ │ + b.n bcd36 │ │ str r1, [r0, r0] │ │ - b.n bcd2a │ │ + b.n bcd3a │ │ str r2, [r0, #0] │ │ - b.n bcd2e │ │ + b.n bcd3e │ │ adds r3, #18 │ │ - b.n bcd32 │ │ + b.n bcd42 │ │ movs r0, #255 @ 0xff │ │ - b.n bd136 │ │ + b.n bd146 │ │ asrs r3, r0, #32 │ │ - b.n bcd3a │ │ - str r4, [r5, #24] │ │ - mla r0, r0, r6, r2 │ │ - b.n bcd42 │ │ + b.n bcd4a │ │ + str r1, [r4, #32] │ │ + @ instruction: 0xfa002006 │ │ + b.n bcd52 │ │ movs r4, r0 │ │ - b.n bcd46 │ │ + b.n bcd56 │ │ asrs r5, r0, #32 │ │ - b.n bcd4a │ │ - ldr r4, [pc, #448] @ (bcbcc ) │ │ + b.n bcd5a │ │ + ldr r4, [pc, #448] @ (bcbdc ) │ │ ldmia.w sp!, {r0} │ │ - b.n bd0b6 │ │ + b.n bd0c6 │ │ @ instruction: 0xffe30aff │ │ @ instruction: 0xffebeaff │ │ movs r0, #0 │ │ - b.n bcd5e │ │ + b.n bcd6e │ │ asrs r4, r0, #32 │ │ - b.n bc342 │ │ + b.n bc352 │ │ lsls r6, r1, #2 │ │ - b.n bd0c8 │ │ + b.n bd0d8 │ │ lsls r0, r7, #7 │ │ cmp r2, #0 │ │ - ldr r7, [pc, #960] @ (bcdec ) │ │ + ldr r7, [pc, #960] @ (bcdfc ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n bcf4c │ │ + b.n bcf5c │ │ svc 70 @ 0x46 │ │ - b.n bced0 │ │ + b.n bcee0 │ │ stmia r1!, {r0} │ │ - b.n bcb3e │ │ + b.n bcb4e │ │ ands r4, r2 │ │ - b.n bcf58 │ │ + b.n bcf68 │ │ asrs r0, r0, #32 │ │ - b.n bcada │ │ + b.n bcaea │ │ asrs r1, r0, #5 │ │ - b.n bcd86 │ │ + b.n bcd96 │ │ movs r7, r0 │ │ - b.n bd0ec │ │ + b.n bd0fc │ │ lsls r6, r7, #4 │ │ ldmia r2!, {} │ │ movs r1, r1 │ │ and.w r0, r0, ip, lsl #12 │ │ - b.n bcd96 │ │ + b.n bcda6 │ │ movs r0, #5 │ │ - b.n bcd9a │ │ + b.n bcdaa │ │ stmia r0!, {r2} │ │ - b.n bcd9e │ │ + b.n bcdae │ │ ands r0, r1 │ │ - b.n bcda2 │ │ + b.n bcdb2 │ │ movs r0, #240 @ 0xf0 │ │ - b.n bcdee │ │ + b.n bcdfe │ │ ands r0, r1 │ │ - b.n bcf7a │ │ + b.n bcf8a │ │ asrs r0, r0, #32 │ │ - b.n bcb06 │ │ + b.n bcb16 │ │ asrs r1, r0, #5 │ │ - b.n bcdb2 │ │ + b.n bcdc2 │ │ movs r7, r0 │ │ - b.n bd118 │ │ + b.n bd128 │ │ lsls r3, r6, #4 │ │ ldmia r2!, {} │ │ asrs r1, r0, #32 │ │ - b.n bcf80 │ │ + b.n bcf90 │ │ movs r0, #4 │ │ - b.n bcfa0 │ │ + b.n bcfb0 │ │ asrs r1, r0, #4 │ │ - b.n bc9aa │ │ - blx 4bdb8c │ │ + b.n bc9ba │ │ + blx 4bdb9c │ │ lsls r4, r3, #18 │ │ movs r0, r0 │ │ lsls r4, r3, #18 │ │ movs r0, r0 │ │ movs r4, r4 │ │ movs r0, r0 │ │ lsls r0, r2, #3 │ │ @@ -236645,6296 +236525,6296 @@ │ │ lsls r4, r7, #13 │ │ movs r0, r0 │ │ lsls r0, r4, #4 │ │ movs r0, r0 │ │ lsls r4, r3, #22 │ │ movs r0, r0 │ │ movs r0, #208 @ 0xd0 │ │ - b.n bce32 │ │ + b.n bce42 │ │ asrs r3, r0, #32 │ │ - b.n bcdf6 │ │ + b.n bce06 │ │ movs r3, r0 │ │ - b.n bcd5e │ │ + b.n bcd6e │ │ adds r0, #2 │ │ strh r0, [r4, #12] │ │ asrs r2, r0, #32 │ │ adds r1, #160 @ 0xa0 │ │ adds r0, #0 │ │ - b.n bc5c6 │ │ + b.n bc5d6 │ │ asrs r4, r0, #32 │ │ - b.n bc5ca │ │ + b.n bc5da │ │ movs r4, r2 │ │ - b.n bcfe8 │ │ + b.n bcff8 │ │ movs r0, r0 │ │ - b.n bcd7a │ │ + b.n bcd8a │ │ lsls r6, r2, #4 │ │ subs r0, r0, r0 │ │ lsls r2, r1, #7 │ │ and.w r0, r0, ip, lsl #2 │ │ ldmia.w r0, {r0, r1, sp, lr} │ │ - b.n bce22 │ │ + b.n bce32 │ │ asrs r4, r1, #32 │ │ - b.n bc606 │ │ + b.n bc616 │ │ movs r3, r0 │ │ - b.n bcd8e │ │ + b.n bcd9e │ │ str r2, [r0, #0] │ │ adds r1, #160 @ 0xa0 │ │ movs r1, r0 │ │ - b.n bcda0 │ │ + b.n bcdb0 │ │ str r1, [r0, r0] │ │ - b.n bce36 │ │ + b.n bce46 │ │ str r7, [r0, r0] │ │ adds r1, #160 @ 0xa0 │ │ movs r5, r0 │ │ - b.n bcdaa │ │ + b.n bcdba │ │ stmia r0!, {r0, r2} │ │ - b.n bce42 │ │ + b.n bce52 │ │ stmia r0!, {r1, r2} │ │ adds r1, #160 @ 0xa0 │ │ movs r3, r0 │ │ - b.n bcdae │ │ + b.n bcdbe │ │ adds r0, #2 │ │ strh r0, [r4, #12] │ │ movs r1, r0 │ │ - b.n bcdc0 │ │ + b.n bcdd0 │ │ asrs r7, r0, #32 │ │ strh r0, [r4, #12] │ │ movs r1, r0 │ │ - b.n bcdc0 │ │ + b.n bcdd0 │ │ movs r0, #1 │ │ - b.n bce5e │ │ + b.n bce6e │ │ movs r0, #3 │ │ strh r0, [r4, #12] │ │ movs r5, r0 │ │ - b.n bcdd2 │ │ + b.n bcde2 │ │ str r6, [r0, r0] │ │ strh r0, [r4, #12] │ │ movs r1, r0 │ │ - b.n bcdd4 │ │ + b.n bcde4 │ │ asrs r3, r0, #32 │ │ adds r1, #160 @ 0xa0 │ │ movs r1, r0 │ │ - b.n bcde0 │ │ + b.n bcdf0 │ │ adds r0, #1 │ │ - b.n bce7a │ │ + b.n bce8a │ │ asrs r5, r0, #32 │ │ strh r0, [r4, #12] │ │ adds r0, #5 │ │ adds r1, #160 @ 0xa0 │ │ movs r0, #0 │ │ - b.n bc646 │ │ + b.n bc656 │ │ asrs r2, r1, #32 │ │ @ instruction: 0xe9800014 │ │ - b.n bd068 │ │ + b.n bd078 │ │ movs r0, r0 │ │ - b.n bcdfa │ │ + b.n bce0a │ │ lsls r6, r6, #3 │ │ subs r0, r0, r0 │ │ lsls r2, r5, #6 │ │ and.w r0, r0, lr │ │ ldmia.w r0, {r0, r1} │ │ - b.n bce06 │ │ + b.n bce16 │ │ strb r3, [r0, #0] │ │ - b.n bcea6 │ │ + b.n bceb6 │ │ strb r2, [r0, #0] │ │ adds r1, #160 @ 0xa0 │ │ movs r7, r0 │ │ - b.n bce10 │ │ + b.n bce20 │ │ str r7, [r0, #0] │ │ - b.n bceb2 │ │ + b.n bcec2 │ │ strb r1, [r0, #0] │ │ strh r0, [r4, #12] │ │ str r1, [r0, #0] │ │ adds r1, #160 @ 0xa0 │ │ movs r3, r0 │ │ - b.n bce22 │ │ + b.n bce32 │ │ adds r0, #2 │ │ strh r0, [r4, #12] │ │ movs r3, r0 │ │ - b.n bce28 │ │ + b.n bce38 │ │ asrs r7, r0, #32 │ │ - b.n bceca │ │ + b.n bceda │ │ asrs r3, r0, #32 │ │ strh r0, [r4, #12] │ │ adds r0, #7 │ │ strh r0, [r4, #12] │ │ adds r0, #0 │ │ - b.n bc696 │ │ + b.n bc6a6 │ │ lsls r2, r0, #1 │ │ @ instruction: 0xe9800014 │ │ - b.n bd0b8 │ │ + b.n bd0c8 │ │ movs r0, r0 │ │ - b.n bce4a │ │ + b.n bce5a │ │ lsls r2, r4, #3 │ │ subs r0, r0, r0 │ │ lsls r6, r2, #6 │ │ @ instruction: 0xea00c010 │ │ - b.n bc6ce │ │ + b.n bc6de │ │ str r0, [r0, r0] │ │ - b.n bc6d2 │ │ + b.n bc6e2 │ │ adds r0, #24 │ │ - b.n bc6d6 │ │ + b.n bc6e6 │ │ movs r4, r1 │ │ - b.n bce64 │ │ + b.n bce74 │ │ strb r4, [r1, #0] │ │ - b.n bcefe │ │ + b.n bcf0e │ │ lsls r2, r0, #16 │ │ @ instruction: 0xe9907005 │ │ strh r0, [r4, #12] │ │ movs r3, r0 │ │ - b.n bce7e │ │ + b.n bce8e │ │ str r0, [sp, #12] │ │ - b.n bcf0e │ │ + b.n bcf1e │ │ str r4, [r2, #0] │ │ - b.n bc6f2 │ │ + b.n bc702 │ │ str r0, [sp, #40] @ 0x28 │ │ strh r0, [r4, #12] │ │ strh r4, [r1, #0] │ │ - b.n bc6fa │ │ + b.n bc70a │ │ movs r1, r1 │ │ - b.n bce8c │ │ - b.n bcbf2 │ │ - b.n bcf22 │ │ + b.n bce9c │ │ + b.n bcc02 │ │ + b.n bcf32 │ │ ands r0, r2 │ │ - b.n bc700 │ │ - b.n bcbf6 │ │ + b.n bc710 │ │ + b.n bcc06 │ │ strh r0, [r4, #12] │ │ ands r1, r0 │ │ - b.n bcf2e │ │ + b.n bcf3e │ │ movs r6, r0 │ │ - b.n bce94 │ │ + b.n bcea4 │ │ asrs r6, r0, #32 │ │ - b.n bcf36 │ │ + b.n bcf46 │ │ strh r4, [r1, #0] │ │ - b.n bc714 │ │ + b.n bc724 │ │ asrs r4, r0, #32 │ │ strh r0, [r4, #12] │ │ movs r0, r1 │ │ - b.n bcea4 │ │ + b.n bceb4 │ │ strh r1, [r0, #0] │ │ strh r0, [r4, #12] │ │ movs r0, r1 │ │ - b.n bcec6 │ │ + b.n bced6 │ │ movs r0, #8 │ │ - b.n bcf4e │ │ + b.n bcf5e │ │ movs r0, #14 │ │ strh r0, [r4, #12] │ │ movs r1, r1 │ │ - b.n bcec4 │ │ + b.n bced4 │ │ str r0, [sp, #28] │ │ adds r1, #160 @ 0xa0 │ │ movs r4, r1 │ │ - b.n bcec8 │ │ + b.n bced8 │ │ stmia r0!, {r0, r2} │ │ adds r1, #160 @ 0xa0 │ │ movs r3, r0 │ │ - b.n bceda │ │ + b.n bceea │ │ adds r0, #10 │ │ adds r1, #160 @ 0xa0 │ │ movs r3, r0 │ │ - b.n bcee6 │ │ + b.n bcef6 │ │ str r3, [r0, r0] │ │ - b.n bcf72 │ │ + b.n bcf82 │ │ movs r0, #0 │ │ - b.n bc736 │ │ + b.n bc746 │ │ str r4, [r1, r0] │ │ strh r0, [r4, #12] │ │ movs r5, r0 │ │ - b.n bcef0 │ │ - add r0, pc, #20 @ (adr r0, bcc54 ) │ │ - b.n bcf82 │ │ + b.n bcf00 │ │ + add r0, pc, #20 @ (adr r0, bcc64 ) │ │ + b.n bcf92 │ │ str r1, [r1, r0] │ │ strh r0, [r4, #12] │ │ - add r0, pc, #36 @ (adr r0, bcc6c ) │ │ + add r0, pc, #36 @ (adr r0, bcc7c ) │ │ adds r1, #160 @ 0xa0 │ │ movs r3, r0 │ │ - b.n bcf06 │ │ + b.n bcf16 │ │ movs r0, #12 │ │ - b.n bc78c │ │ + b.n bc79c │ │ adds r0, #12 │ │ adds r1, #160 @ 0xa0 │ │ movs r6, r0 │ │ - b.n bcf02 │ │ + b.n bcf12 │ │ str r4, [r0, #0] │ │ adds r1, #160 @ 0xa0 │ │ movs r2, r0 │ │ - b.n bcf04 │ │ + b.n bcf14 │ │ asrs r2, r0, #32 │ │ movs r1, #160 @ 0xa0 │ │ movs r6, r0 │ │ - b.n bcf0c │ │ + b.n bcf1c │ │ strb r6, [r0, #0] │ │ - b.n bcfae │ │ + b.n bcfbe │ │ movs r0, #3 │ │ - b.n bcfb2 │ │ + b.n bcfc2 │ │ strb r1, [r0, #0] │ │ adds r1, #160 @ 0xa0 │ │ asrs r6, r0, #32 │ │ str r1, [sp, #640] @ 0x280 │ │ movs r7, r0 │ │ - b.n bcf32 │ │ + b.n bcf42 │ │ stmia r0!, {r0, r1, r2} │ │ - b.n bcfc2 │ │ + b.n bcfd2 │ │ stmia r0!, {r1, r3} │ │ adds r1, #160 @ 0xa0 │ │ movs r1, r0 │ │ - b.n bcf34 │ │ + b.n bcf44 │ │ str r1, [r0, #0] │ │ - b.n bcfce │ │ + b.n bcfde │ │ str r5, [r0, #0] │ │ adds r1, #160 @ 0xa0 │ │ movs r3, r0 │ │ - b.n bcf42 │ │ + b.n bcf52 │ │ movs r0, #6 │ │ adds r1, #160 @ 0xa0 │ │ movs r2, r0 │ │ - b.n bcf56 │ │ + b.n bcf66 │ │ ands r2, r0 │ │ - b.n bcfe2 │ │ + b.n bcff2 │ │ movs r0, #12 │ │ strh r0, [r4, #12] │ │ ands r4, r1 │ │ adds r1, #160 @ 0xa0 │ │ movs r3, r0 │ │ - b.n bcf5a │ │ + b.n bcf6a │ │ str r3, [r0, #0] │ │ str r1, [sp, #640] @ 0x280 │ │ movs r7, r0 │ │ - b.n bcf6a │ │ + b.n bcf7a │ │ strb r2, [r1, #0] │ │ strh r0, [r4, #12] │ │ movs r0, r1 │ │ - b.n bcf7a │ │ + b.n bcf8a │ │ strh r6, [r1, #0] │ │ adds r1, #160 @ 0xa0 │ │ movs r0, #20 │ │ - b.n bc7c6 │ │ + b.n bc7d6 │ │ movs r7, r0 │ │ - b.n bcf7a │ │ + b.n bcf8a │ │ movs r0, #7 │ │ - b.n bd00e │ │ + b.n bd01e │ │ movs r0, #8 │ │ adds r1, #160 @ 0xa0 │ │ movs r2, r0 │ │ - b.n bcf82 │ │ + b.n bcf92 │ │ adds r0, #2 │ │ - b.n bd01a │ │ + b.n bd02a │ │ movs r0, #6 │ │ strh r0, [r4, #12] │ │ adds r0, #6 │ │ adds r1, #160 @ 0xa0 │ │ movs r1, r0 │ │ - b.n bcf90 │ │ + b.n bcfa0 │ │ asrs r5, r0, #32 │ │ strh r0, [r4, #12] │ │ movs r7, r0 │ │ - b.n bcf9e │ │ + b.n bcfae │ │ strh r7, [r0, #0] │ │ str r1, [sp, #640] @ 0x280 │ │ movs r0, #12 │ │ - b.n bc7f6 │ │ + b.n bc806 │ │ movs r1, r0 │ │ - b.n bcfaa │ │ + b.n bcfba │ │ movs r0, #1 │ │ - b.n bd03e │ │ + b.n bd04e │ │ movs r0, #8 │ │ adds r1, #160 @ 0xa0 │ │ strh r1, [r0, #0] │ │ str r1, [sp, #640] @ 0x280 │ │ ands r0, r3 │ │ - b.n bc80a │ │ + b.n bc81a │ │ ands r0, r2 │ │ - b.n bc848 │ │ + b.n bc858 │ │ adds r0, #16 │ │ - b.n bc812 │ │ + b.n bc822 │ │ movs r0, #8 │ │ - b.n bc816 │ │ + b.n bc826 │ │ strh r4, [r0, #0] │ │ - b.n bc81a │ │ + b.n bc82a │ │ movs r4, r2 │ │ - b.n bd238 │ │ + b.n bd248 │ │ movs r0, r0 │ │ - b.n bcfca │ │ + b.n bcfda │ │ lsls r2, r0, #2 │ │ subs r0, r0, r0 │ │ lsls r6, r6, #4 │ │ and.w r0, r0, r0, lsr #28 │ │ - b.n bc84e │ │ + b.n bc85e │ │ str r0, [r0, r4] │ │ ldmia.w r0, {r1, r2, r3, sp, lr} │ │ - b.n bd076 │ │ + b.n bd086 │ │ str r4, [r1, r0] │ │ - b.n bc85a │ │ + b.n bc86a │ │ movs r7, r0 │ │ - b.n bcfee │ │ + b.n bcffe │ │ adds r0, #7 │ │ - b.n bd082 │ │ + b.n bd092 │ │ adds r0, #8 │ │ strh r0, [r4, #12] │ │ movs r6, r1 │ │ - b.n bcff0 │ │ + b.n bd000 │ │ str r3, [r0, #0] │ │ strh r0, [r4, #12] │ │ movs r5, r0 │ │ - b.n bd00a │ │ + b.n bd01a │ │ asrs r5, r0, #32 │ │ - b.n bd096 │ │ + b.n bd0a6 │ │ asrs r4, r1, #32 │ │ strh r0, [r4, #12] │ │ movs r1, r0 │ │ - b.n bd00a │ │ + b.n bd01a │ │ movs r0, #1 │ │ - b.n bd0a2 │ │ + b.n bd0b2 │ │ movs r0, #6 │ │ strh r0, [r4, #12] │ │ movs r7, r0 │ │ - b.n bd01a │ │ + b.n bd02a │ │ strb r0, [r1, #0] │ │ adds r1, #160 @ 0xa0 │ │ movs r6, r1 │ │ - b.n bd018 │ │ + b.n bd028 │ │ adds r0, #14 │ │ movs r1, #160 @ 0xa0 │ │ movs r7, r0 │ │ - b.n bd020 │ │ - b.n bcd8a │ │ - b.n bd0be │ │ + b.n bd030 │ │ + b.n bcd9a │ │ + b.n bd0ce │ │ movs r0, #0 │ │ - b.n bc882 │ │ - b.n bcd8a │ │ + b.n bc892 │ │ + b.n bcd9a │ │ strh r0, [r4, #12] │ │ movs r5, r0 │ │ - b.n bd042 │ │ + b.n bd052 │ │ str r4, [r1, r0] │ │ adds r1, #160 @ 0xa0 │ │ movs r5, r0 │ │ - b.n bd04e │ │ + b.n bd05e │ │ movs r0, #5 │ │ - b.n bd0d6 │ │ + b.n bd0e6 │ │ movs r0, #14 │ │ adds r1, #160 @ 0xa0 │ │ movs r7, r0 │ │ - b.n bd044 │ │ + b.n bd054 │ │ adds r0, #7 │ │ movs r1, #160 @ 0xa0 │ │ movs r1, r0 │ │ - b.n bd052 │ │ + b.n bd062 │ │ asrs r6, r0, #32 │ │ adds r1, #160 @ 0xa0 │ │ movs r3, r0 │ │ - b.n bd050 │ │ + b.n bd060 │ │ str r3, [r0, #0] │ │ - b.n bd0f2 │ │ + b.n bd102 │ │ str r1, [r0, #0] │ │ adds r1, #160 @ 0xa0 │ │ movs r6, r0 │ │ - b.n bd05e │ │ + b.n bd06e │ │ strb r6, [r0, #0] │ │ - b.n bd0fe │ │ + b.n bd10e │ │ str r2, [r0, #0] │ │ strh r0, [r4, #12] │ │ strb r2, [r0, #0] │ │ adds r1, #160 @ 0xa0 │ │ movs r3, r0 │ │ - b.n bd06c │ │ + b.n bd07c │ │ asrs r3, r0, #32 │ │ str r1, [sp, #640] @ 0x280 │ │ movs r5, r0 │ │ - b.n bd08e │ │ + b.n bd09e │ │ str r6, [r1, r0] │ │ strh r0, [r4, #12] │ │ movs r5, r0 │ │ - b.n bd07c │ │ + b.n bd08c │ │ movs r0, #5 │ │ - b.n bd11e │ │ + b.n bd12e │ │ str r1, [r0, r0] │ │ strh r0, [r4, #12] │ │ movs r0, #1 │ │ adds r1, #160 @ 0xa0 │ │ strb r0, [r2, #0] │ │ - b.n bc8ea │ │ + b.n bc8fa │ │ str r4, [r1, #0] │ │ - b.n bc8ee │ │ + b.n bc8fe │ │ movs r0, #8 │ │ - b.n bc8f2 │ │ + b.n bc902 │ │ str r4, [r0, r0] │ │ - b.n bc8f6 │ │ + b.n bc906 │ │ movs r4, r2 │ │ - b.n bd314 │ │ + b.n bd324 │ │ movs r0, r0 │ │ - b.n bd0a6 │ │ + b.n bd0b6 │ │ lsls r3, r1, #1 │ │ subs r0, r0, r0 │ │ lsls r7, r7, #3 │ │ and.w r0, r0, r4, lsr #20 │ │ - b.n bc92a │ │ + b.n bc93a │ │ str r0, [r2, #0] │ │ - b.n bc92e │ │ + b.n bc93e │ │ asrs r2, r0 │ │ @ instruction: 0xe9902008 │ │ - b.n bd156 │ │ + b.n bd166 │ │ movs r5, r0 │ │ - b.n bd0c6 │ │ + b.n bd0d6 │ │ adds r0, #5 │ │ - b.n bd15e │ │ - add r0, pc, #0 @ (adr r0, bce20 ) │ │ - b.n bc942 │ │ + b.n bd16e │ │ + add r0, pc, #0 @ (adr r0, bce30 ) │ │ + b.n bc952 │ │ adds r0, #6 │ │ adds r1, #160 @ 0xa0 │ │ movs r3, r0 │ │ - b.n bd0e6 │ │ + b.n bd0f6 │ │ str r0, [sp, #12] │ │ - b.n bd16e │ │ + b.n bd17e │ │ ands r0, r2 │ │ - b.n bc94c │ │ + b.n bc95c │ │ str r0, [sp, #56] @ 0x38 │ │ adds r1, #160 @ 0xa0 │ │ movs r0, r1 │ │ - b.n bd0dc │ │ + b.n bd0ec │ │ movs r0, #1 │ │ adds r1, #160 @ 0xa0 │ │ movs r2, r0 │ │ - b.n bd0f6 │ │ + b.n bd106 │ │ strb r2, [r0, #0] │ │ - b.n bd186 │ │ + b.n bd196 │ │ ands r1, r0 │ │ - b.n bd18a │ │ + b.n bd19a │ │ strb r2, [r1, #0] │ │ adds r1, #160 @ 0xa0 │ │ movs r1, r1 │ │ - b.n bd100 │ │ + b.n bd110 │ │ asrs r1, r1, #32 │ │ - b.n bd196 │ │ + b.n bd1a6 │ │ asrs r7, r0, #32 │ │ adds r1, #160 @ 0xa0 │ │ movs r2, r0 │ │ - b.n bd112 │ │ + b.n bd122 │ │ movs r0, #10 │ │ strh r0, [r4, #12] │ │ movs r5, r0 │ │ - b.n bd112 │ │ + b.n bd122 │ │ str r6, [r0, r0] │ │ strh r0, [r4, #12] │ │ movs r3, r0 │ │ - b.n bd12a │ │ + b.n bd13a │ │ adds r0, #14 │ │ strh r0, [r4, #12] │ │ movs r5, r0 │ │ - b.n bd132 │ │ + b.n bd142 │ │ stmia r0!, {r0, r2} │ │ - b.n bd1ba │ │ + b.n bd1ca │ │ asrs r4, r2, #32 │ │ - b.n bc97e │ │ + b.n bc98e │ │ stmia r0!, {r0, r1} │ │ strh r0, [r4, #12] │ │ movs r0, r1 │ │ - b.n bd12e │ │ + b.n bd13e │ │ strh r4, [r0, #0] │ │ strh r0, [r4, #12] │ │ movs r0, r1 │ │ - b.n bd142 │ │ + b.n bd152 │ │ asrs r0, r1, #32 │ │ - b.n bd1d2 │ │ + b.n bd1e2 │ │ str r4, [r1, #0] │ │ - b.n bd1d6 │ │ + b.n bd1e6 │ │ asrs r2, r0, #32 │ │ strh r0, [r4, #12] │ │ movs r4, r1 │ │ - b.n bd140 │ │ + b.n bd150 │ │ str r1, [r0, #0] │ │ strh r0, [r4, #12] │ │ movs r1, r1 │ │ - b.n bd154 │ │ + b.n bd164 │ │ strb r1, [r1, #0] │ │ str r1, [sp, #640] @ 0x280 │ │ movs r5, r0 │ │ - b.n bd16a │ │ + b.n bd17a │ │ adds r0, #5 │ │ strh r0, [r4, #12] │ │ movs r0, r1 │ │ - b.n bd16a │ │ + b.n bd17a │ │ strh r2, [r0, #0] │ │ str r1, [sp, #640] @ 0x280 │ │ str r0, [r0, #0] │ │ - b.n bc9be │ │ + b.n bc9ce │ │ movs r3, r0 │ │ - b.n bd172 │ │ + b.n bd182 │ │ str r3, [r0, #0] │ │ - b.n bd206 │ │ + b.n bd216 │ │ str r0, [r1, #0] │ │ adds r1, #160 @ 0xa0 │ │ movs r6, r0 │ │ - b.n bd17c │ │ + b.n bd18c │ │ movs r0, #6 │ │ - b.n bd212 │ │ + b.n bd222 │ │ ands r0, r2 │ │ - b.n bca10 │ │ + b.n bca20 │ │ movs r0, #7 │ │ adds r1, #160 @ 0xa0 │ │ movs r3, r0 │ │ - b.n bd18e │ │ + b.n bd19e │ │ strh r3, [r0, #0] │ │ str r1, [sp, #640] @ 0x280 │ │ movs r4, r1 │ │ - b.n bd188 │ │ + b.n bd198 │ │ asrs r4, r1, #32 │ │ movs r1, #160 @ 0xa0 │ │ movs r0, #16 │ │ - b.n bc9ee │ │ + b.n bc9fe │ │ movs r1, r0 │ │ - b.n bd1a2 │ │ + b.n bd1b2 │ │ movs r0, #1 │ │ - b.n bd236 │ │ + b.n bd246 │ │ movs r0, #8 │ │ strh r0, [r4, #12] │ │ movs r6, r0 │ │ - b.n bd1ac │ │ + b.n bd1bc │ │ str r7, [r0, #0] │ │ strh r0, [r4, #12] │ │ movs r1, r0 │ │ - b.n bd1b6 │ │ + b.n bd1c6 │ │ asrs r0, r1, #32 │ │ adds r1, #160 @ 0xa0 │ │ movs r0, #4 │ │ - b.n bca0e │ │ + b.n bca1e │ │ movs r1, r0 │ │ - b.n bd1be │ │ + b.n bd1ce │ │ movs r0, #1 │ │ - b.n bd256 │ │ + b.n bd266 │ │ movs r0, #6 │ │ adds r1, #160 @ 0xa0 │ │ asrs r6, r0, #32 │ │ strh r0, [r4, #12] │ │ movs r0, #12 │ │ - b.n bca22 │ │ + b.n bca32 │ │ asrs r0, r1, #32 │ │ - b.n bca26 │ │ + b.n bca36 │ │ movs r4, r2 │ │ - b.n bd444 │ │ + b.n bd454 │ │ movs r0, r0 │ │ - b.n bd1d6 │ │ + b.n bd1e6 │ │ lsls r4, r6, #2 │ │ lsrs r0, r0, #8 │ │ movs r0, r1 │ │ - b.n bc99e │ │ + b.n bc9ae │ │ stmia r0!, {r2} │ │ - b.n bca62 │ │ + b.n bca72 │ │ asrs r0, r0, #32 │ │ - b.n bcfd6 │ │ + b.n bcfe6 │ │ asrs r1, r0, #5 │ │ - b.n bd282 │ │ + b.n bd292 │ │ movs r7, r0 │ │ - b.n bd5e8 │ │ + b.n bd5f8 │ │ mcr2 10, 6, sp, cr11, cr15, {7} @ │ │ movs r0, #2 │ │ - b.n bd70e │ │ + b.n bd71e │ │ asrs r1, r0, #2 │ │ - b.n bcf56 │ │ + b.n bcf66 │ │ str r0, [sp, #0] │ │ - b.n bd296 │ │ + b.n bd2a6 │ │ movs r0, #0 │ │ - b.n bca7a │ │ + b.n bca8a │ │ asrs r1, r0, #32 │ │ - b.n bced0 │ │ - b.n bcf60 │ │ - b.n bd422 │ │ + b.n bcee0 │ │ + b.n bcf70 │ │ + b.n bd432 │ │ strh r4, [r0, #0] │ │ - b.n bd2a6 │ │ + b.n bd2b6 │ │ ands r4, r1 │ │ - b.n bd2aa │ │ + b.n bd2ba │ │ movs r1, r0 │ │ - b.n bd212 │ │ + b.n bd222 │ │ str r0, [r0, r0] │ │ - b.n bd2b2 │ │ + b.n bd2c2 │ │ asrs r2, r0, #32 │ │ strh r0, [r4, #12] │ │ asrs r0, r0, #32 │ │ - b.n bca7a │ │ + b.n bca8a │ │ movs r0, #0 │ │ strh r1, [r3, #44] @ 0x2c │ │ movs r0, #0 │ │ - b.n bca94 │ │ + b.n bcaa4 │ │ asrs r0, r0, #32 │ │ - b.n bcabe │ │ + b.n bcace │ │ movs r1, r0 │ │ - b.n bd22e │ │ + b.n bd23e │ │ asrs r2, r0, #32 │ │ strh r0, [r4, #12] │ │ asrs r0, r0, #32 │ │ - b.n bcaa4 │ │ + b.n bcab4 │ │ movs r0, #0 │ │ strh r4, [r3, #44] @ 0x2c │ │ movs r0, #0 │ │ - b.n bcab2 │ │ + b.n bcac2 │ │ asrs r0, r0, #32 │ │ - b.n bcad0 │ │ + b.n bcae0 │ │ str r0, [r0, #0] │ │ - b.n bcac2 │ │ + b.n bcad2 │ │ movs r1, r0 │ │ - b.n bd252 │ │ + b.n bd262 │ │ asrs r6, r0, #32 │ │ strh r0, [r4, #12] │ │ asrs r0, r0, #32 │ │ - b.n bcaae │ │ + b.n bcabe │ │ str r0, [r0, #0] │ │ strh r1, [r3, #44] @ 0x2c │ │ str r0, [r0, #0] │ │ - b.n bcac8 │ │ + b.n bcad8 │ │ strb r5, [r0, #0] │ │ - b.n bd052 │ │ + b.n bd062 │ │ movs r0, #4 │ │ - b.n bcb28 │ │ + b.n bcb38 │ │ strb r4, [r0, #0] │ │ - b.n bd450 │ │ + b.n bd460 │ │ movs r6, r0 │ │ - b.n bd26a │ │ + b.n bd27a │ │ @ instruction: 0xfffb8aff │ │ adds r0, #4 │ │ - b.n bd0ea │ │ + b.n bd0fa │ │ asrs r4, r0, #32 │ │ - b.n bca3a │ │ + b.n bca4a │ │ adds r0, #4 │ │ - b.n bd45c │ │ + b.n bd46c │ │ movs r1, r0 │ │ - b.n bd286 │ │ + b.n bd296 │ │ @ instruction: 0xfffb8aff │ │ movs r4, r0 │ │ - b.n bd28c │ │ + b.n bd29c │ │ movs r1, r1 │ │ ldrh r0, [r0, #16] │ │ asrs r0, r0, #32 │ │ - b.n bcaf4 │ │ + b.n bcb04 │ │ movs r1, r1 │ │ - b.n bd296 │ │ + b.n bd2a6 │ │ asrs r1, r1, #32 │ │ - b.n bd332 │ │ + b.n bd342 │ │ movs r0, #0 │ │ - b.n bcafe │ │ + b.n bcb0e │ │ asrs r5, r0, #32 │ │ lsls r0, r4, #6 │ │ movs r1, r1 │ │ - b.n bd2a8 │ │ + b.n bd2b8 │ │ asrs r4, r0, #32 │ │ lsls r0, r4, #6 │ │ str r0, [r0, #0] │ │ - b.n bcb28 │ │ + b.n bcb38 │ │ str r0, [sp, #4] │ │ - b.n bd34a │ │ + b.n bd35a │ │ @ instruction: 0xffe9eaff │ │ movs r7, r0 │ │ - b.n bd2b8 │ │ + b.n bd2c8 │ │ mcr2 10, 4, sp, cr14, cr15, {7} @ │ │ movs r0, #0 │ │ - b.n bd35a │ │ + b.n bd36a │ │ adds r0, #4 │ │ - b.n bd35e │ │ + b.n bd36e │ │ movs r5, r0 │ │ - b.n bd362 │ │ + b.n bd372 │ │ mcr2 10, 4, lr, cr13, cr15, {7} @ │ │ stmia r0!, {r4} │ │ - b.n bcb4a │ │ - add r0, pc, #0 @ (adr r0, bd02c ) │ │ - b.n bcb4e │ │ + b.n bcb5a │ │ + add r0, pc, #0 @ (adr r0, bd03c ) │ │ + b.n bcb5e │ │ adds r0, #8 │ │ - b.n bcb52 │ │ + b.n bcb62 │ │ movs r0, #24 │ │ - b.n bcb56 │ │ + b.n bcb66 │ │ movs r4, r1 │ │ - b.n bd2ee │ │ + b.n bd2fe │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n bd37e │ │ + b.n bd38e │ │ asrs r4, r0, #32 │ │ - b.n bcb62 │ │ + b.n bcb72 │ │ asrs r4, r0, #32 │ │ - b.n bcb60 │ │ + b.n bcb70 │ │ str r0, [sp, #40] @ 0x28 │ │ adds r1, #160 @ 0xa0 │ │ ands r0, r2 │ │ - b.n bcb68 │ │ + b.n bcb78 │ │ ands r3, r0 │ │ - b.n bd392 │ │ + b.n bd3a2 │ │ strb r4, [r2, #0] │ │ - b.n bcb76 │ │ + b.n bcb86 │ │ movs r2, r0 │ │ - b.n bd300 │ │ + b.n bd310 │ │ adds r0, #12 │ │ - b.n bcb78 │ │ + b.n bcb88 │ │ adds r0, #2 │ │ - b.n bd3a2 │ │ + b.n bd3b2 │ │ adds r0, #4 │ │ adds r1, #160 @ 0xa0 │ │ str r4, [r3, #0] │ │ - b.n bcb8a │ │ - b.n bd084 │ │ - b.n bcb8e │ │ + b.n bcb9a │ │ + b.n bd094 │ │ + b.n bcb9e │ │ movs r3, r0 │ │ - b.n bd324 │ │ + b.n bd334 │ │ ands r3, r0 │ │ - b.n bd3b6 │ │ + b.n bd3c6 │ │ str r7, [r0, r0] │ │ - b.n bd3ba │ │ + b.n bd3ca │ │ ands r1, r1 │ │ adds r1, #160 @ 0xa0 │ │ movs r7, r0 │ │ - b.n bd324 │ │ + b.n bd334 │ │ str r1, [r0, r0] │ │ adds r1, #160 @ 0xa0 │ │ movs r6, r0 │ │ - b.n bd346 │ │ + b.n bd356 │ │ asrs r6, r0, #32 │ │ - b.n bd3ce │ │ + b.n bd3de │ │ str r0, [r1, r0] │ │ - b.n bcbac │ │ + b.n bcbbc │ │ asrs r6, r1, #32 │ │ adds r1, #160 @ 0xa0 │ │ movs r1, r0 │ │ - b.n bd344 │ │ + b.n bd354 │ │ strh r1, [r0, #0] │ │ - b.n bd3de │ │ + b.n bd3ee │ │ strh r5, [r0, #0] │ │ adds r1, #160 @ 0xa0 │ │ movs r0, r1 │ │ - b.n bd34e │ │ + b.n bd35e │ │ str r0, [r1, r0] │ │ - b.n bd3ea │ │ + b.n bd3fa │ │ str r4, [r0, r0] │ │ adds r1, #160 @ 0xa0 │ │ movs r4, r1 │ │ - b.n bd366 │ │ + b.n bd376 │ │ str r4, [r3, r0] │ │ - b.n bcbb6 │ │ + b.n bcbc6 │ │ stmia r0!, {r1, r3} │ │ strh r0, [r4, #12] │ │ str r4, [r1, r0] │ │ - b.n bcbf8 │ │ + b.n bcc08 │ │ movs r2, r0 │ │ - b.n bd36c │ │ + b.n bd37c │ │ movs r0, #5 │ │ strh r0, [r4, #12] │ │ str r4, [r0, r0] │ │ - b.n bcc04 │ │ + b.n bcc14 │ │ movs r7, r0 │ │ - b.n bd378 │ │ + b.n bd388 │ │ strb r5, [r0, #0] │ │ strh r0, [r4, #12] │ │ movs r6, r0 │ │ - b.n bd392 │ │ + b.n bd3a2 │ │ str r6, [r1, #0] │ │ strh r0, [r4, #12] │ │ movs r2, r0 │ │ - b.n bd396 │ │ - b.n bd0e4 │ │ - b.n bd422 │ │ - add r0, pc, #24 @ (adr r0, bd0fc ) │ │ - b.n bd426 │ │ - b.n bd100 │ │ + b.n bd3a6 │ │ + b.n bd0f4 │ │ + b.n bd432 │ │ + add r0, pc, #24 @ (adr r0, bd10c ) │ │ + b.n bd436 │ │ + b.n bd110 │ │ strh r0, [r4, #12] │ │ movs r6, r0 │ │ - b.n bd39c │ │ - add r0, pc, #28 @ (adr r0, bd10c ) │ │ + b.n bd3ac │ │ + add r0, pc, #28 @ (adr r0, bd11c ) │ │ strh r0, [r4, #12] │ │ movs r2, r1 │ │ - b.n bd3b2 │ │ + b.n bd3c2 │ │ str r2, [r1, r0] │ │ - b.n bd43a │ │ - b.n bd114 │ │ - b.n bcc18 │ │ + b.n bd44a │ │ + b.n bd124 │ │ + b.n bcc28 │ │ str r6, [r1, r0] │ │ strh r0, [r4, #12] │ │ movs r0, r1 │ │ - b.n bd3ae │ │ + b.n bd3be │ │ strh r4, [r0, #0] │ │ strh r0, [r4, #12] │ │ movs r2, r0 │ │ - b.n bd3c6 │ │ + b.n bd3d6 │ │ movs r0, #12 │ │ adds r1, #160 @ 0xa0 │ │ movs r3, r0 │ │ - b.n bd3c8 │ │ + b.n bd3d8 │ │ adds r0, #9 │ │ strh r0, [r4, #12] │ │ movs r3, r0 │ │ - b.n bd3c2 │ │ + b.n bd3d2 │ │ stmia r0!, {r0, r1} │ │ - b.n bd462 │ │ + b.n bd472 │ │ adds r0, #2 │ │ strh r0, [r4, #12] │ │ stmia r0!, {r1} │ │ adds r1, #160 @ 0xa0 │ │ movs r0, #8 │ │ - b.n bcc68 │ │ + b.n bcc78 │ │ movs r6, r0 │ │ - b.n bd3e0 │ │ + b.n bd3f0 │ │ str r0, [r0, r0] │ │ - b.n bcc36 │ │ + b.n bcc46 │ │ str r7, [r0, #0] │ │ adds r1, #160 @ 0xa0 │ │ movs r1, r0 │ │ - b.n bd3e2 │ │ + b.n bd3f2 │ │ asrs r2, r0, #32 │ │ strh r0, [r4, #12] │ │ movs r1, r0 │ │ - b.n bd3f2 │ │ + b.n bd402 │ │ str r0, [sp, #4] │ │ - b.n bd48a │ │ + b.n bd49a │ │ asrs r6, r0, #32 │ │ strh r0, [r4, #12] │ │ str r0, [sp, #24] │ │ adds r1, #160 @ 0xa0 │ │ movs r1, r1 │ │ - b.n bd40e │ │ - b.n bd16a │ │ - b.n bd49a │ │ + b.n bd41e │ │ + b.n bd17a │ │ + b.n bd4aa │ │ strb r1, [r0, #0] │ │ - b.n bd49e │ │ - b.n bd178 │ │ + b.n bd4ae │ │ + b.n bd188 │ │ adds r1, #160 @ 0xa0 │ │ movs r1, r0 │ │ - b.n bd40c │ │ + b.n bd41c │ │ strb r3, [r0, #0] │ │ adds r1, #160 @ 0xa0 │ │ movs r0, r1 │ │ - b.n bd41c │ │ + b.n bd42c │ │ str r0, [r1, #0] │ │ - b.n bd4b2 │ │ + b.n bd4c2 │ │ movs r0, #12 │ │ - b.n bccb0 │ │ + b.n bccc0 │ │ str r7, [r0, #0] │ │ adds r1, #160 @ 0xa0 │ │ movs r6, r0 │ │ - b.n bd43a │ │ + b.n bd44a │ │ str r6, [r0, r0] │ │ - b.n bd4c2 │ │ + b.n bd4d2 │ │ str r6, [r1, #0] │ │ strh r0, [r4, #12] │ │ str r6, [r1, r0] │ │ adds r1, #160 @ 0xa0 │ │ movs r0, r1 │ │ - b.n bd43c │ │ + b.n bd44c │ │ strb r0, [r1, #0] │ │ str r1, [sp, #640] @ 0x280 │ │ movs r1, r1 │ │ - b.n bd44e │ │ + b.n bd45e │ │ str r0, [sp, #48] @ 0x30 │ │ strh r0, [r4, #12] │ │ movs r2, r1 │ │ - b.n bd442 │ │ - add r0, pc, #8 @ (adr r0, bd1a8 ) │ │ + b.n bd452 │ │ + add r0, pc, #8 @ (adr r0, bd1b8 ) │ │ adds r1, #160 @ 0xa0 │ │ str r4, [r2, #0] │ │ - b.n bcca6 │ │ + b.n bccb6 │ │ movs r1, r1 │ │ - b.n bd45e │ │ + b.n bd46e │ │ str r1, [r1, #0] │ │ - b.n bd4ee │ │ + b.n bd4fe │ │ str r2, [r1, #0] │ │ adds r1, #160 @ 0xa0 │ │ movs r6, r0 │ │ - b.n bd464 │ │ + b.n bd474 │ │ movs r0, #6 │ │ - b.n bd4fa │ │ + b.n bd50a │ │ str r7, [r0, #0] │ │ strh r0, [r4, #12] │ │ movs r0, #7 │ │ adds r1, #160 @ 0xa0 │ │ movs r1, r0 │ │ - b.n bd46c │ │ + b.n bd47c │ │ asrs r3, r0, #32 │ │ strh r0, [r4, #12] │ │ movs r1, r1 │ │ - b.n bd482 │ │ + b.n bd492 │ │ ands r0, r2 │ │ - b.n bcd0c │ │ - add r0, pc, #36 @ (adr r0, bd1f8 ) │ │ + b.n bcd1c │ │ + add r0, pc, #36 @ (adr r0, bd208 ) │ │ str r1, [sp, #640] @ 0x280 │ │ movs r0, #16 │ │ - b.n bccda │ │ + b.n bccea │ │ movs r1, r0 │ │ - b.n bd492 │ │ + b.n bd4a2 │ │ movs r0, #1 │ │ - b.n bd522 │ │ + b.n bd532 │ │ str r0, [r3, r0] │ │ - b.n bcce6 │ │ + b.n bccf6 │ │ movs r0, #10 │ │ adds r1, #160 @ 0xa0 │ │ - add r0, pc, #4 @ (adr r0, bd1f0 ) │ │ + add r0, pc, #4 @ (adr r0, bd200 ) │ │ str r1, [sp, #640] @ 0x280 │ │ str r4, [r1, #0] │ │ - b.n bccf2 │ │ + b.n bcd02 │ │ movs r0, #8 │ │ - b.n bccf6 │ │ - add r0, pc, #16 @ (adr r0, bd208 ) │ │ - b.n bccfa │ │ + b.n bcd06 │ │ + add r0, pc, #16 @ (adr r0, bd218 ) │ │ + b.n bcd0a │ │ movs r4, r2 │ │ - b.n bd718 │ │ + b.n bd728 │ │ movs r0, r0 │ │ - b.n bd4aa │ │ + b.n bd4ba │ │ vpmin.u8 , q13, │ │ - beq.n bd240 │ │ - b.n bd6a0 │ │ + beq.n bd250 │ │ + b.n bd6b0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ @ instruction: 0xeaff4ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n bd734 │ │ - beq.n bd244 │ │ - b.n bd6b8 │ │ - blt.n bd224 │ │ - b.n bd6bc │ │ - add r0, pc, #64 @ (adr r0, bd264 ) │ │ - b.n bd740 │ │ + b.n bd744 │ │ + beq.n bd254 │ │ + b.n bd6c8 │ │ + blt.n bd234 │ │ + b.n bd6cc │ │ + add r0, pc, #64 @ (adr r0, bd274 ) │ │ + b.n bd750 │ │ str r0, [sp, #0] │ │ - b.n bd96a │ │ + b.n bd97a │ │ str r1, [r0, r4] │ │ - b.n bd2c0 │ │ + b.n bd2d0 │ │ ldrh r1, [r0, #24] │ │ - b.n bd746 │ │ + b.n bd756 │ │ asrs r1, r0 │ │ - b.n bd336 │ │ + b.n bd346 │ │ movs r4, r1 │ │ - b.n bcd54 │ │ + b.n bcd64 │ │ lsls r1, r0, #4 │ │ - b.n bd57e │ │ + b.n bd58e │ │ asrs r0, r0, #32 │ │ - b.n bcd5c │ │ + b.n bcd6c │ │ movs r4, r0 │ │ - b.n bcd60 │ │ + b.n bcd70 │ │ ands r0, r1 │ │ - b.n bcd64 │ │ + b.n bcd74 │ │ movs r2, r1 │ │ - b.n bd58e │ │ + b.n bd59e │ │ subs r2, r0, r4 │ │ - b.n bd992 │ │ - ldrsh r5, [r1, r7] │ │ + b.n bd9a2 │ │ + ldrsh r5, [r5, r7] │ │ mla r0, r0, ip, r0 │ │ - b.n bcd94 │ │ + b.n bcda4 │ │ asrs r0, r0, #32 │ │ - b.n bd99e │ │ + b.n bd9ae │ │ stmia r0!, {} │ │ - b.n bd9a2 │ │ + b.n bd9b2 │ │ movs r0, r0 │ │ - b.n bcd86 │ │ + b.n bcd96 │ │ movs r0, r0 │ │ - b.n bd62a │ │ + b.n bd63a │ │ ldr r0, [r6, #16] │ │ - b.n bd5ae │ │ + b.n bd5be │ │ movs r4, r1 │ │ - b.n bcdac │ │ - b.n bd27e │ │ - b.n bd5b6 │ │ + b.n bcdbc │ │ + b.n bd28e │ │ + b.n bd5c6 │ │ adds r0, #1 │ │ - b.n bd09a │ │ + b.n bd0aa │ │ asrs r4, r0, #32 │ │ - b.n bd700 │ │ + b.n bd710 │ │ movs r1, r0 │ │ - b.n bd53e │ │ + b.n bd54e │ │ adds r0, #3 │ │ - b.n bd646 │ │ + b.n bd656 │ │ cmp r1, #51 @ 0x33 │ │ - b.n bd5ca │ │ + b.n bd5da │ │ eors r2, r6 │ │ - b.n bd06c │ │ + b.n bd07c │ │ strb r4, [r0, #4] │ │ - b.n bd1c6 │ │ + b.n bd1d6 │ │ strb r2, [r2, r1] │ │ - b.n bd264 │ │ + b.n bd274 │ │ lsls r5, r0, #4 │ │ - b.n bd1ca │ │ + b.n bd1da │ │ strb r1, [r0, #0] │ │ - b.n bd7ac │ │ + b.n bd7bc │ │ strb r4, [r0, #4] │ │ - b.n bd1b6 │ │ + b.n bd1c6 │ │ movs r1, r0 │ │ - b.n bd7a6 │ │ + b.n bd7b6 │ │ lsls r5, r0, #4 │ │ - b.n bd1ba │ │ + b.n bd1ca │ │ lsrs r3, r6, #4 │ │ - b.n bd2fa │ │ + b.n bd30a │ │ stmia r0!, {r2, r3} │ │ - b.n bd5b2 │ │ + b.n bd5c2 │ │ str r6, [r1, r0] │ │ - b.n bd5f6 │ │ + b.n bd606 │ │ str r2, [r0, #0] │ │ - b.n bd5fa │ │ + b.n bd60a │ │ @ instruction: 0xffeb1aff │ │ asrs r0, r0, #32 │ │ - b.n bda02 │ │ + b.n bda12 │ │ movs r0, #0 │ │ - b.n bda06 │ │ + b.n bda16 │ │ adds r0, #0 │ │ - b.n bda0a │ │ + b.n bda1a │ │ strb r1, [r0, #4] │ │ - b.n bd3e2 │ │ + b.n bd3f2 │ │ lsls r1, r0, #4 │ │ - b.n bd206 │ │ + b.n bd216 │ │ adds r1, #1 │ │ - b.n bd1ea │ │ + b.n bd1fa │ │ asrs r1, r0, #32 │ │ - b.n bd7dc │ │ + b.n bd7ec │ │ str r0, [r0, #64] @ 0x40 │ │ - b.n bce0c │ │ + b.n bce1c │ │ adds r0, #3 │ │ - b.n bd3e2 │ │ + b.n bd3f2 │ │ movs r4, #0 │ │ - b.n bcdf4 │ │ + b.n bce04 │ │ lsrs r1, r0, #16 │ │ - b.n bd98c │ │ + b.n bd99c │ │ movs r0, #2 │ │ - b.n bd3fa │ │ + b.n bd40a │ │ @ instruction: 0xfff51aff │ │ ands r0, r1 │ │ - b.n bce30 │ │ + b.n bce40 │ │ asrs r0, r0, #32 │ │ - b.n bda3a │ │ + b.n bda4a │ │ movs r4, r1 │ │ - b.n bce38 │ │ + b.n bce48 │ │ movs r1, r0 │ │ - b.n bd122 │ │ + b.n bd132 │ │ asrs r4, r0, #32 │ │ - b.n bd788 │ │ + b.n bd798 │ │ movs r1, r0 │ │ - b.n bd5b4 │ │ + b.n bd5c4 │ │ movs r0, #0 │ │ - b.n bd6ce │ │ + b.n bd6de │ │ cmp r1, #50 @ 0x32 │ │ - b.n bd652 │ │ + b.n bd662 │ │ movs r0, #114 @ 0x72 │ │ - b.n bd0f4 │ │ + b.n bd104 │ │ adds r1, #2 │ │ - b.n bd24e │ │ + b.n bd25e │ │ strb r1, [r0, #0] │ │ - b.n bd824 │ │ + b.n bd834 │ │ strb r2, [r0, #4] │ │ - b.n bd236 │ │ + b.n bd246 │ │ lsls r3, r0, #4 │ │ - b.n bd22e │ │ + b.n bd23e │ │ @ instruction: 0xfff31aff │ │ asrs r4, r0, #32 │ │ - b.n bce68 │ │ + b.n bce78 │ │ lsrs r1, r0, #16 │ │ - b.n bd9ea │ │ + b.n bd9fa │ │ movs r0, #4 │ │ - b.n bd676 │ │ + b.n bd686 │ │ movs r7, r1 │ │ subs r2, #0 │ │ movs r4, r0 │ │ - b.n bcc62 │ │ + b.n bcc72 │ │ asrs r4, r0, #32 │ │ - b.n bd7e4 │ │ + b.n bd7f4 │ │ adds r0, #0 │ │ - b.n bd706 │ │ + b.n bd716 │ │ subs r1, #51 @ 0x33 │ │ - b.n bd68a │ │ + b.n bd69a │ │ adds r4, #83 @ 0x53 │ │ - b.n bd31c │ │ + b.n bd32c │ │ strb r3, [r0, #4] │ │ - b.n bd282 │ │ + b.n bd292 │ │ str r1, [r0, #0] │ │ - b.n bd864 │ │ + b.n bd874 │ │ str r3, [r0, #16] │ │ - b.n bd26a │ │ + b.n bd27a │ │ adds r0, #12 │ │ - b.n bce98 │ │ + b.n bcea8 │ │ lsls r7, r0, #4 │ │ - b.n bd268 │ │ + b.n bd278 │ │ @ instruction: 0xfff41aff │ │ str r0, [sp, #64] @ 0x40 │ │ - b.n bd87c │ │ + b.n bd88c │ │ lsrs r4, r5, #32 │ │ - b.n bd6ce │ │ + b.n bd6de │ │ @ instruction: 0xffb51aff │ │ - beq.n bd3ac │ │ - b.n bd80c │ │ + beq.n bd3bc │ │ + b.n bd81c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {} │ │ - b.n bceb8 │ │ + b.n bcec8 │ │ asrs r4, r0, #32 │ │ - b.n bd6c2 │ │ + b.n bd6d2 │ │ movs r1, #0 │ │ - b.n bd6c6 │ │ + b.n bd6d6 │ │ movs r4, r1 │ │ - b.n bcec4 │ │ - ldrsh r6, [r1, r7] │ │ - mls r0, r0, ip, sp │ │ - b.n bd828 │ │ + b.n bced4 │ │ + ldrsh r7, [r4, r0] │ │ + @ instruction: 0xfa00d01c │ │ + b.n bd838 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r5, fp, lr} │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n bd8b8 │ │ + b.n bd8c8 │ │ stmia r0!, {r3, r7} │ │ - b.n bcee0 │ │ - b.n bd434 │ │ - b.n bcec6 │ │ + b.n bcef0 │ │ + b.n bd444 │ │ + b.n bced6 │ │ stmia r0!, {r2, r3} │ │ - b.n bd4c8 │ │ + b.n bd4d8 │ │ movs r0, #92 @ 0x5c │ │ - b.n bcf4e │ │ + b.n bcf5e │ │ adds r0, #88 @ 0x58 │ │ - b.n bcf6a │ │ + b.n bcf7a │ │ stmia r0!, {r4, r6} │ │ - b.n bceee │ │ + b.n bcefe │ │ movs r3, r0 │ │ - b.n bd65e │ │ + b.n bd66e │ │ str r0, [r6, r5] │ │ - b.n bcefa │ │ + b.n bcf0a │ │ ands r0, r0 │ │ - b.n bd89a │ │ + b.n bd8aa │ │ adds r0, #2 │ │ strh r0, [r4, #12] │ │ stmia r2!, {r0, r4} │ │ - b.n bd3d2 │ │ + b.n bd3e2 │ │ asrs r4, r7, #12 │ │ - b.n bd498 │ │ + b.n bd4a8 │ │ movs r7, r7 │ │ - b.n bda74 │ │ + b.n bda84 │ │ movs r2, r2 │ │ ldrh r0, [r0, #16] │ │ stmia r0!, {r0} │ │ - b.n bdb1a │ │ + b.n bdb2a │ │ ands r0, r4 │ │ - b.n bd880 │ │ + b.n bd890 │ │ str r4, [r3, r4] │ │ - b.n bd722 │ │ + b.n bd732 │ │ asrs r0, r4, #32 │ │ - b.n bd8a8 │ │ + b.n bd8b8 │ │ movs r1, #128 @ 0x80 │ │ - b.n bcf26 │ │ + b.n bcf36 │ │ str r0, [r0, r0] │ │ strh r0, [r0, r4] │ │ adds r1, #132 @ 0x84 │ │ - b.n bcf2e │ │ + b.n bcf3e │ │ asrs r4, r7, #4 │ │ - b.n bd736 │ │ + b.n bd746 │ │ movs r0, r0 │ │ - b.n bdaa2 │ │ + b.n bdab2 │ │ movs r5, r0 │ │ - b.n bd702 │ │ + b.n bd712 │ │ asrs r4, r3, #16 │ │ str r0, [r4, r6] │ │ ands r1, r0 │ │ - b.n bd70c │ │ + b.n bd71c │ │ lsls r0, r0, #6 │ │ - b.n bcf26 │ │ + b.n bcf36 │ │ movs r5, r0 │ │ - b.n bd412 │ │ + b.n bd422 │ │ asrs r1, r0, #32 │ │ - b.n bd418 │ │ + b.n bd428 │ │ sbcs r4, r0 │ │ - b.n bcf32 │ │ + b.n bcf42 │ │ movs r1, r0 │ │ - b.n bd73a │ │ + b.n bd74a │ │ movs r1, r0 │ │ asrs r0, r0, #12 │ │ ldrh r0, [r6, #0] │ │ ldmia.w sp!, {r2, r3, r4, r5, r8, r9, ip} │ │ - b.n bd766 │ │ - ldr r0, [pc, #192] @ (bd4e8 ) │ │ + b.n bd776 │ │ + ldr r0, [pc, #192] @ (bd4f8 ) │ │ ldmia.w sp!, {r1, r2, r3, r4} │ │ - and.w r4, r0, r4, asr #6 │ │ + and.w r4, r0, r4, ror #6 │ │ movs r2, r0 │ │ - ldr r5, [pc, #960] @ (bd7f4 ) │ │ + ldr r5, [pc, #960] @ (bd804 ) │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n bd954 │ │ + b.n bd964 │ │ strh r0, [r1, #0] │ │ - b.n bcf74 │ │ + b.n bcf84 │ │ ands r2, r0 │ │ - b.n bd782 │ │ + b.n bd792 │ │ str r1, [r0, r0] │ │ - b.n bd786 │ │ + b.n bd796 │ │ str r0, [r0, #0] │ │ - b.n bd78a │ │ + b.n bd79a │ │ movs r0, r0 │ │ - b.n bdaf2 │ │ + b.n bdb02 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n bd960 │ │ + b.n bd970 │ │ strb r0, [r0, #0] │ │ - b.n bdb9a │ │ + b.n bdbaa │ │ asrs r4, r0, #32 │ │ - b.n bd79e │ │ + b.n bd7ae │ │ movs r0, #8 │ │ - b.n bcd82 │ │ + b.n bcd92 │ │ asrs r1, r0, #32 │ │ - b.n bd908 │ │ + b.n bd918 │ │ strb r7, [r0, #0] │ │ - b.n bd56e │ │ + b.n bd57e │ │ @ instruction: 0xfffb1aff │ │ movs r0, r0 │ │ and.w r0, r0, r0, lsl #28 │ │ - b.n bdbb6 │ │ + b.n bdbc6 │ │ movs r6, r0 │ │ - b.n bd7ba │ │ + b.n bd7ca │ │ asrs r5, r0, #32 │ │ - b.n bd7be │ │ + b.n bd7ce │ │ movs r0, #4 │ │ - b.n bd7c2 │ │ + b.n bd7d2 │ │ adds r0, #8 │ │ - b.n bd7c6 │ │ + b.n bd7d6 │ │ ldr r5, [r1, #100] @ 0x64 │ │ add.w r0, r0, r0 │ │ - b.n bd73c │ │ + b.n bd74c │ │ ldrh r0, [r6, #46] @ 0x2e │ │ lsrs r5, r7, #2 │ │ ldr r6, [r5, #76] @ 0x4c │ │ add.w r0, r0, r0 │ │ - b.n bcfba │ │ + b.n bcfca │ │ movs r4, r0 │ │ - b.n bdb3e │ │ + b.n bdb4e │ │ @ instruction: 0xfff40aff │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {r2, r4, r6, r7, sl, ip, lr, pc} │ │ - bmi.n bd452 │ │ - ldr r7, [pc, #960] @ (bd86c ) │ │ + bmi.n bd462 │ │ + ldr r7, [pc, #960] @ (bd87c ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n bd9cc │ │ - beq.n bd4ec │ │ - b.n bd950 │ │ + b.n bd9dc │ │ + beq.n bd4fc │ │ + b.n bd960 │ │ eors r0, r1 │ │ - b.n bcfda │ │ + b.n bcfea │ │ strb r1, [r0, #0] │ │ - b.n bdbfe │ │ + b.n bdc0e │ │ add r5, sp, #24 │ │ - b.n bd9ca │ │ + b.n bd9da │ │ stmia r1!, {r2, r4, r5, r6} │ │ - b.n bcfee │ │ + b.n bcffe │ │ movs r0, #12 │ │ - b.n bd54c │ │ + b.n bd55c │ │ movs r7, r7 │ │ - b.n bdb72 │ │ + b.n bdb82 │ │ movs r0, r6 │ │ ldrh r0, [r0, #16] │ │ ldrsh r7, [r2, r0] │ │ - b.n bd9de │ │ + b.n bd9ee │ │ ands r1, r0 │ │ - b.n bd988 │ │ + b.n bd998 │ │ asrs r2, r1, #32 │ │ - b.n bd81e │ │ + b.n bd82e │ │ adds r0, #10 │ │ - b.n bd822 │ │ + b.n bd832 │ │ str r4, [r0, #24] │ │ - b.n bd448 │ │ - b.n bd7f6 │ │ - b.n bd450 │ │ + b.n bd458 │ │ + b.n bd806 │ │ + b.n bd460 │ │ str r0, [sp, #16] │ │ - b.n bd010 │ │ + b.n bd020 │ │ asrs r4, r0, #32 │ │ - b.n bd018 │ │ + b.n bd028 │ │ lsls r4, r0, #4 │ │ - b.n bd420 │ │ + b.n bd430 │ │ lsls r0, r0, #9 │ │ stmia.w r3, {r0, r1, r2, r8} │ │ - b.n bd408 │ │ + b.n bd418 │ │ movs r2, r2 │ │ lsrs r0, r0, #8 │ │ str r2, [r0, #0] │ │ - b.n bd9b4 │ │ + b.n bd9c4 │ │ movs r2, r1 │ │ - b.n bd84a │ │ + b.n bd85a │ │ adds r1, #6 │ │ - b.n bd438 │ │ + b.n bd448 │ │ strh r6, [r0, #12] │ │ - b.n bd472 │ │ + b.n bd482 │ │ adds r1, #4 │ │ - b.n bd420 │ │ + b.n bd430 │ │ adds r0, #10 │ │ - b.n bd85a │ │ + b.n bd86a │ │ movs r4, r0 │ │ - b.n bd03e │ │ + b.n bd04e │ │ strh r4, [r0, #12] │ │ - b.n bd468 │ │ + b.n bd478 │ │ movs r4, r0 │ │ - b.n bd02c │ │ + b.n bd03c │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r3, r0 │ │ - b.n bd9bc │ │ + b.n bd9cc │ │ adds r0, #10 │ │ - b.n bd872 │ │ + b.n bd882 │ │ sbcs r0, r0 │ │ - b.n bd49c │ │ + b.n bd4ac │ │ lsls r0, r0, #4 │ │ - b.n bd464 │ │ + b.n bd474 │ │ adds r0, #4 │ │ - b.n bd064 │ │ + b.n bd074 │ │ lsls r6, r0, #4 │ │ - b.n bd44c │ │ + b.n bd45c │ │ movs r2, r1 │ │ - b.n bd886 │ │ + b.n bd896 │ │ sbcs r6, r0 │ │ - b.n bd48a │ │ + b.n bd49a │ │ adds r0, #4 │ │ - b.n bd04e │ │ + b.n bd05e │ │ movs r1, r0 │ │ - b.n bdc92 │ │ + b.n bdca2 │ │ strb r0, [r4, #0] │ │ - b.n bd9fa │ │ + b.n bda0a │ │ adds r2, #16 │ │ - b.n bd89a │ │ + b.n bd8aa │ │ movs r0, #32 │ │ - b.n bda22 │ │ + b.n bda32 │ │ adds r0, #0 │ │ strh r0, [r0, r4] │ │ movs r0, r0 │ │ - b.n bdc14 │ │ + b.n bdc24 │ │ movs r2, #48 @ 0x30 │ │ - b.n bd8aa │ │ + b.n bd8ba │ │ stmia r0!, {} │ │ - b.n bd078 │ │ + b.n bd088 │ │ movs r7, #16 │ │ str r0, [r4, r6] │ │ str r2, [r0, r0] │ │ - b.n bd878 │ │ + b.n bd888 │ │ movs r3, r0 │ │ - b.n bd596 │ │ + b.n bd5a6 │ │ asrs r2, r0, #32 │ │ - b.n bd580 │ │ + b.n bd590 │ │ movs r1, r0 │ │ - b.n bd8a2 │ │ + b.n bd8b2 │ │ ands r3, r0 │ │ - b.n bd8a2 │ │ + b.n bd8b2 │ │ lsrs r0, r6 │ │ - b.n bd91e │ │ + b.n bd92e │ │ movs r1, r0 │ │ asrs r0, r0, #12 │ │ - beq.n bd5c8 │ │ - b.n bda28 │ │ + beq.n bd5d8 │ │ + b.n bda38 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r4, r5, r6, r8, lr, pc} │ │ - b.n bd0c2 │ │ + b.n bd0d2 │ │ strb r2, [r0, #0] │ │ - b.n bdcde │ │ + b.n bdcee │ │ movs r0, #12 │ │ - b.n bd624 │ │ + b.n bd634 │ │ lsls r0, r0, #1 │ │ - b.n bdc4a │ │ + b.n bdc5a │ │ @ instruction: 0xffc93aff │ │ stmia r1!, {r2, r3, r4, r5, r6} │ │ - b.n bd0d6 │ │ + b.n bd0e6 │ │ strb r3, [r0, #0] │ │ - b.n bdcf2 │ │ + b.n bdd02 │ │ movs r0, #12 │ │ - b.n bd638 │ │ + b.n bd648 │ │ lsls r0, r0, #1 │ │ - b.n bdc5e │ │ + b.n bdc6e │ │ @ instruction: 0xffc43aff │ │ asrs r0, r5, #32 │ │ - b.n bcfd8 │ │ + b.n bcfe8 │ │ asrs r0, r3, #2 │ │ - b.n bdace │ │ + b.n bdade │ │ asrs r4, r5, #32 │ │ - b.n bcfe0 │ │ + b.n bcff0 │ │ asrs r0, r7, #9 │ │ - b.n bd10c │ │ + b.n bd11c │ │ movs r0, #8 │ │ - b.n bd0f2 │ │ + b.n bd102 │ │ asrs r1, r0, #32 │ │ - b.n bd6f4 │ │ + b.n bd704 │ │ adds r0, #88 @ 0x58 │ │ - b.n bd17c │ │ + b.n bd18c │ │ adds r0, #36 @ 0x24 │ │ - b.n bcff4 │ │ + b.n bd004 │ │ adds r0, #80 @ 0x50 │ │ - b.n bd104 │ │ + b.n bd114 │ │ movs r3, r0 │ │ - b.n bd88a │ │ + b.n bd89a │ │ movs r7, r0 │ │ ldr r2, [sp, #0] │ │ movs r0, #92 @ 0x5c │ │ - b.n bd18e │ │ + b.n bd19e │ │ adds r0, #64 @ 0x40 │ │ - b.n bdd32 │ │ + b.n bdd42 │ │ asrs r4, r4, #32 │ │ - b.n bd02c │ │ + b.n bd03c │ │ strb r1, [r0, #0] │ │ - b.n bd67e │ │ + b.n bd68e │ │ str r2, [r0, r0] │ │ - b.n bd93e │ │ + b.n bd94e │ │ asrs r3, r2, #28 │ │ - b.n bd942 │ │ + b.n bd952 │ │ asrs r0, r6, #32 │ │ - b.n bd01c │ │ + b.n bd02c │ │ movs r3, r0 │ │ and.w r0, r0, r0, lsl #5 │ │ - b.n bdd4e │ │ + b.n bdd5e │ │ strb r0, [r0, #0] │ │ - b.n bdd52 │ │ + b.n bdd62 │ │ asrs r0, r6, #32 │ │ - b.n bd02c │ │ + b.n bd03c │ │ str r4, [r4, r0] │ │ - b.n bd050 │ │ + b.n bd060 │ │ asrs r4, r5, #32 │ │ - b.n bd054 │ │ + b.n bd064 │ │ stmia r0!, {r2, r3, r4} │ │ - b.n bd142 │ │ + b.n bd152 │ │ strh r0, [r2, #6] │ │ - b.n bd9a8 │ │ + b.n bd9b8 │ │ movs r0, #1 │ │ - b.n bdb5a │ │ + b.n bdb6a │ │ adds r0, #0 │ │ - b.n bdb80 │ │ + b.n bdb90 │ │ movs r0, #240 @ 0xf0 │ │ - b.n bd9b4 │ │ + b.n bd9c4 │ │ adds r0, #40 @ 0x28 │ │ - b.n bd06c │ │ + b.n bd07c │ │ movs r0, #48 @ 0x30 │ │ - b.n bd070 │ │ - b.n bd684 │ │ - b.n bd074 │ │ + b.n bd080 │ │ + b.n bd694 │ │ + b.n bd084 │ │ asrs r3, r2, #20 │ │ - b.n bd982 │ │ + b.n bd992 │ │ str r3, [r2, #80] @ 0x50 │ │ - b.n bd6de │ │ + b.n bd6ee │ │ asrs r0, r7, #32 │ │ - b.n bd060 │ │ + b.n bd070 │ │ strh r2, [r0, #0] │ │ - b.n bd98e │ │ + b.n bd99e │ │ subs r2, r2, #0 │ │ - b.n bd754 │ │ + b.n bd764 │ │ asrs r4, r6, #32 │ │ - b.n bd06c │ │ + b.n bd07c │ │ movs r4, r1 │ │ - b.n bd8fc │ │ + b.n bd90c │ │ ldrh r6, [r6, #48] @ 0x30 │ │ strh r0, [r4, #12] │ │ asrs r7, r0, #32 │ │ - b.n bdb72 │ │ + b.n bdb82 │ │ asrs r7, r0, #32 │ │ - b.n bdde8 │ │ + b.n bddf8 │ │ str r0, [sp, #4] │ │ - b.n bd704 │ │ - beq.n bd67e │ │ - b.n bd9ae │ │ + b.n bd714 │ │ + beq.n bd68e │ │ + b.n bd9be │ │ asrs r4, r6, #32 │ │ - b.n bd0a8 │ │ + b.n bd0b8 │ │ movs r0, r2 │ │ - b.n bd196 │ │ + b.n bd1a6 │ │ movs r4, r1 │ │ - b.n bd91c │ │ + b.n bd92c │ │ ldr r2, [r2, #96] @ 0x60 │ │ str r1, [sp, #640] @ 0x280 │ │ lsls r3, r2, #20 │ │ - b.n bd782 │ │ + b.n bd792 │ │ asrs r6, r0, #32 │ │ - b.n bd9c6 │ │ + b.n bd9d6 │ │ movs r0, #9 │ │ - b.n bd9ca │ │ + b.n bd9da │ │ str r6, [r0, r0] │ │ - b.n bd9ce │ │ + b.n bd9de │ │ ldr r7, [r1, #92] @ 0x5c │ │ add.w r0, r0, r0 │ │ - b.n bdd36 │ │ + b.n bdd46 │ │ lsls r7, r1, #1 │ │ subs r0, r0, r0 │ │ adds r0, #44 @ 0x2c │ │ - b.n bd0d4 │ │ + b.n bd0e4 │ │ movs r0, r0 │ │ - b.n bdd52 │ │ + b.n bdd62 │ │ lsls r0, r2, #3 │ │ - b.n bda3a │ │ + b.n bda4a │ │ movs r1, #112 @ 0x70 │ │ - b.n bd1d2 │ │ + b.n bd1e2 │ │ lsls r0, r6, #3 │ │ - b.n bd1b4 │ │ + b.n bd1c4 │ │ lsls r0, r7, #3 │ │ - b.n bd1b8 │ │ + b.n bd1c8 │ │ lsls r0, r0, #4 │ │ - b.n bd1bc │ │ + b.n bd1cc │ │ movs r0, r5 │ │ - b.n bd0f0 │ │ + b.n bd100 │ │ asrs r4, r6, #3 │ │ - b.n bd1c4 │ │ + b.n bd1d4 │ │ asrs r4, r7, #3 │ │ - b.n bd1c8 │ │ + b.n bd1d8 │ │ asrs r4, r0, #4 │ │ - b.n bd1cc │ │ + b.n bd1dc │ │ lsls r0, r6, #5 │ │ - b.n bd1d2 │ │ + b.n bd1e2 │ │ movs r1, #116 @ 0x74 │ │ - b.n bd1d6 │ │ + b.n bd1e6 │ │ movs r1, #120 @ 0x78 │ │ - b.n bd1da │ │ + b.n bd1ea │ │ movs r1, #124 @ 0x7c │ │ - b.n bd1de │ │ + b.n bd1ee │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n bdd8e │ │ + b.n bdd9e │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n bde26 │ │ + b.n bde36 │ │ movs r0, #0 │ │ - b.n bde2a │ │ + b.n bde3a │ │ asrs r0, r0, #32 │ │ - b.n bde2e │ │ + b.n bde3e │ │ movs r7, r3 │ │ and.w r0, r0, r0 │ │ - b.n bdeb6 │ │ + b.n bdec6 │ │ asrs r0, r0, #32 │ │ - b.n bdeba │ │ + b.n bdeca │ │ movs r0, r6 │ │ and.w fp, r0, r0, lsr #30 │ │ cdp 0, 8, cr0, cr4, cr1, {0} │ │ - b.n bde96 │ │ + b.n bdea6 │ │ lsls r0, r2, #1 │ │ movt fp, #588 @ 0x24c │ │ - ldcl 0, cr3, [pc, #68] @ bd750 │ │ + ldcl 0, cr3, [pc, #68] @ bd760 │ │ movt r0, #256 @ 0x100 │ │ - b.n bda56 │ │ + b.n bda66 │ │ bics r4, r4 │ │ @ instruction: 0xf3f92009 │ │ - b.n bda5e │ │ + b.n bda6e │ │ ldr r1, [r6, #100] @ 0x64 │ │ movt r0, #1298 @ 0x512 │ │ - blt.w bdf64 │ │ + blt.w bdf74 │ │ @ instruction: 0xf4e21002 │ │ - b.n bdbd0 │ │ + b.n bdbe0 │ │ movs r0, #2 │ │ - b.n bdc36 │ │ + b.n bdc46 │ │ ldrh r0, [r7, #16] │ │ undefined (bcc, cond=0xF) │ │ undefined (bcc, cond=0xF) │ │ - b.w f11082 │ │ + b.w f11092 │ │ @ instruction: 0xf36428a5 │ │ - bls.w 19fbb6 │ │ + bls.w 19fbc6 │ │ mrs sl, LR_irq │ │ undefined (bcc, cond=0xF) │ │ - bls.w c8126 │ │ + bls.w c8136 │ │ @ instruction: 0xf37801f0 │ │ - bl 32673c │ │ + bl 32674c │ │ subs r7, r7, r3 │ │ lsls r1, r6, #6 │ │ @ instruction: 0xf2600000 │ │ - b.n bda16 │ │ + b.n bda26 │ │ subs r0, r2, r6 │ │ vmov.32 r2, d16[1] │ │ mrc 0, 0, r0, cr0, cr1, {0} │ │ lsrs r0, r0, #8 │ │ stmia r0!, {r0, r1, r2, r3, r4} │ │ - b.n bdf36 │ │ - b.n bd77a │ │ - b.n bdeba │ │ + b.n bdf46 │ │ + b.n bd78a │ │ + b.n bdeca │ │ str r0, [r4, r0] │ │ - b.n bdebe │ │ + b.n bdece │ │ str r0, [r0, #0] │ │ - b.n bd734 │ │ + b.n bd744 │ │ adds r7, #48 @ 0x30 │ │ - b.n bd89e │ │ + b.n bd8ae │ │ bx r6 │ │ - b.n bdaca │ │ + b.n bdada │ │ movs r0, r0 │ │ - b.n bde34 │ │ + b.n bde44 │ │ str r6, [r0, #0] │ │ - b.n bdb2e │ │ + b.n bdb3e │ │ add r6, r2 │ │ - b.n bdad6 │ │ + b.n bdae6 │ │ ands r0, r0 │ │ strh r0, [r0, r4] │ │ movs r0, #2 │ │ - b.n bdaa6 │ │ + b.n bdab6 │ │ bx r6 │ │ - b.n bd82c │ │ + b.n bd83c │ │ movs r1, r0 │ │ - b.n bdca6 │ │ + b.n bdcb6 │ │ add r6, r6 │ │ - b.n bdaea │ │ + b.n bdafa │ │ orrs r6, r2 │ │ str r0, [r4, r6] │ │ asrs r1, r0, #32 │ │ - b.n bdaba │ │ + b.n bdaca │ │ movs r0, r0 │ │ - b.n bda66 │ │ + b.n bda76 │ │ @ instruction: 0xfff01aff │ │ movs r2, r0 │ │ - b.n bdb7e │ │ + b.n bdb8e │ │ asrs r1, r0, #32 │ │ - b.n bdb82 │ │ + b.n bdb92 │ │ movs r0, #1 │ │ - b.n bdec6 │ │ + b.n bded6 │ │ movs r0, #0 │ │ - b.n bd2de │ │ + b.n bd2ee │ │ asrs r4, r0, #32 │ │ - b.n bd2e2 │ │ + b.n bd2f2 │ │ movs r1, r0 │ │ - b.n bdbd2 │ │ - beq.n bd80c │ │ - b.n bdc6c │ │ + b.n bdbe2 │ │ + beq.n bd81c │ │ + b.n bdc7c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, r5, r6} │ │ - b.n bd31c │ │ + b.n bd32c │ │ movs r0, r0 │ │ - b.n bd900 │ │ + b.n bd910 │ │ lsls r2, r3, #1 │ │ - b.n bd386 │ │ + b.n bd396 │ │ movs r3, r0 │ │ - b.n bde8a │ │ + b.n bde9a │ │ movs r2, r0 │ │ cmp r2, #0 │ │ movs r0, r0 │ │ - b.n bdf32 │ │ - beq.n bd82c │ │ - b.n bdc8c │ │ + b.n bdf42 │ │ + beq.n bd83c │ │ + b.n bdc9c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r4, sl, fp, sp, lr} │ │ add.w r0, r0, ip, lsl #5 │ │ - b.n bd340 │ │ + b.n bd350 │ │ movs r0, r0 │ │ - b.n bd326 │ │ + b.n bd336 │ │ adds r0, #72 @ 0x48 │ │ - b.n bd348 │ │ + b.n bd358 │ │ asrs r1, r0, #32 │ │ - b.n bd92c │ │ + b.n bd93c │ │ adds r0, #3 │ │ - b.n bd930 │ │ - beq.n bd834 │ │ - b.n bdcb0 │ │ + b.n bd940 │ │ + beq.n bd844 │ │ + b.n bdcc0 │ │ movs r0, #56 @ 0x38 │ │ - b.n bd250 │ │ + b.n bd260 │ │ movs r0, r1 │ │ - b.n bd338 │ │ + b.n bd348 │ │ movs r3, r0 │ │ - b.n bdf62 │ │ + b.n bdf72 │ │ movs r4, r4 │ │ stmia.w sp, {r3, r4, r5, sp} │ │ - b.n bdf6a │ │ - strb r6, [r7, #25] │ │ + b.n bdf7a │ │ + strb r5, [r7, #25] │ │ @ instruction: 0xebffd010 │ │ - b.n bdd4c │ │ + b.n bdd5c │ │ movs r0, r0 │ │ - b.n bdf76 │ │ - beq.n bd870 │ │ - b.n bdcd0 │ │ + b.n bdf86 │ │ + beq.n bd880 │ │ + b.n bdce0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {ip, sp, lr, pc} │ │ - b.n bde82 │ │ + b.n bde92 │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r1, r0 │ │ movs r0, r0 │ │ - asrs r0, r7, #9 │ │ + asrs r0, r1, #10 │ │ movs r2, r0 │ │ - asrs r4, r5, #1 │ │ + asrs r4, r7, #1 │ │ movs r2, r0 │ │ - subs r1, r3, r3 │ │ - vcvt.f32.u32 d29, d4, #11 │ │ + subs r7, r7, r7 │ │ + @ instruction: 0xfff5ddf4 │ │ @ instruction: 0xfff44ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n bdd7c │ │ - beq.n bd874 │ │ - b.n bdd00 │ │ - add r0, pc, #640 @ (adr r0, bdae8 ) │ │ - b.n bd38a │ │ + b.n bdd8c │ │ + beq.n bd884 │ │ + b.n bdd10 │ │ + add r0, pc, #640 @ (adr r0, bdaf8 ) │ │ + b.n bd39a │ │ str r0, [sp, #4] │ │ - b.n bdd30 │ │ - b.n bd870 │ │ - b.n bd3a6 │ │ + b.n bdd40 │ │ + b.n bd880 │ │ + b.n bd3b6 │ │ ands r2, r1 │ │ - b.n bdbb6 │ │ + b.n bdbc6 │ │ adds r1, #14 │ │ - b.n bd7e2 │ │ + b.n bd7f2 │ │ strb r1, [r1, #4] │ │ - b.n bd7a6 │ │ + b.n bd7b6 │ │ strb r3, [r0, #0] │ │ - b.n bd910 │ │ + b.n bd920 │ │ adds r0, #1 │ │ - b.n bdd08 │ │ + b.n bdd18 │ │ movs r3, r0 │ │ - b.n bdb38 │ │ + b.n bdb48 │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ movs r2, r0 │ │ - b.n bdeb6 │ │ + b.n bdec6 │ │ movs r1, r0 │ │ lsls r6, r1, #1 │ │ stmia r0!, {} │ │ asrs r0, r4, #15 │ │ movs r0, r0 │ │ lsls r2, r1, #22 │ │ stmia r1!, {r1, r2, r3} │ │ lsls r2, r3, #30 │ │ movs r4, r1 │ │ - b.n bdbe6 │ │ - beq.n bd8e0 │ │ - b.n bdd40 │ │ + b.n bdbf6 │ │ + beq.n bd8f0 │ │ + b.n bdd50 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r1, r8, pc} │ │ - b.n bd9c6 │ │ + b.n bd9d6 │ │ adds r0, #2 │ │ - b.n bddb8 │ │ + b.n bddc8 │ │ ldr r3, [sp, #576] @ 0x240 │ │ cdp 0, 10, cr0, cr0, cr14, {0} │ │ - b.n bdb64 │ │ + b.n bdb74 │ │ movs r0, r3 │ │ cmp r2, #0 │ │ adds r0, #0 │ │ - b.n be006 │ │ + b.n be016 │ │ stmia r1!, {r0} │ │ - b.n bd950 │ │ + b.n bd960 │ │ adds r0, #3 │ │ - b.n be08e │ │ + b.n be09e │ │ strb r6, [r1, #4] │ │ - b.n bd918 │ │ + b.n bd928 │ │ adds r1, #14 │ │ - b.n bd9ea │ │ + b.n bd9fa │ │ str r4, [r1, #0] │ │ - b.n bddea │ │ + b.n bddfa │ │ str r4, [r1, r0] │ │ - b.n bd9e6 │ │ + b.n bd9f6 │ │ str r0, [r1, r0] │ │ - b.n bdd6c │ │ + b.n bdd7c │ │ cmp r2, #143 @ 0x8f │ │ orn r0, r5, #8960 @ 0x2300 │ │ - b.n bdd72 │ │ - ldr r2, [pc, #572] @ (bdb28 ) │ │ + b.n bdd82 │ │ + ldr r2, [pc, #572] @ (bdb38 ) │ │ orn r8, r5, #462848 @ 0x71000 │ │ @ instruction: 0xf36428f0 │ │ @ instruction: 0xf3622222 │ │ @ instruction: 0xf3f62123 │ │ @ instruction: 0xf3f25b90 │ │ cdp 0, 1, cr0, cr2, cr0, {0} │ │ - b.n bdfb0 │ │ + b.n bdfc0 │ │ movs r7, r3 │ │ subs r0, r0, r0 │ │ ands r0, r2 │ │ - b.n bdd96 │ │ + b.n bdda6 │ │ strb r0, [r2, #0] │ │ - b.n bde20 │ │ + b.n bde30 │ │ adds r0, #16 │ │ - b.n bdd9c │ │ + b.n bddac │ │ movs r6, r0 │ │ - b.n bdbc2 │ │ + b.n bdbd2 │ │ @ instruction: 0xffee8aff │ │ lsls r1, r0, #4 │ │ - b.n bdc10 │ │ + b.n bdc20 │ │ lsls r1, r0, #1 │ │ lsrs r0, r0, #8 │ │ adds r1, #9 │ │ - b.n bda32 │ │ + b.n bda42 │ │ lsrs r7, r7, #27 │ │ - b.n bdf54 │ │ + b.n bdf64 │ │ lsls r7, r1, #1 │ │ lsrs r0, r0, #8 │ │ adds r1, #9 │ │ - b.n bdc76 │ │ + b.n bdc86 │ │ strb r4, [r1, #0] │ │ - b.n bddc2 │ │ + b.n bddd2 │ │ cmp r2, #131 @ 0x83 │ │ orn r0, r7, #2560 @ 0xa00 │ │ - b.n be082 │ │ - ldr r2, [pc, #572] @ (bdb80 ) │ │ + b.n be092 │ │ + ldr r2, [pc, #572] @ (bdb90 ) │ │ orn r0, r7, #528 @ 0x210 │ │ - b.n bd9da │ │ + b.n bd9ea │ │ cmp r0, #228 @ 0xe4 │ │ bfi r0, r2, #30, #4294967274 │ │ - b.n bda5e │ │ + b.n bda6e │ │ str r0, [r0, #0] │ │ - b.n be116 │ │ + b.n be126 │ │ lsrs r0, r6, #3 │ │ @ instruction: 0xf3620220 │ │ @ instruction: 0xf3f60121 │ │ @ instruction: 0xf3f23b90 │ │ mrc 7, 0, r5, cr0, cr6, {0} │ │ - b.n bd990 │ │ + b.n bd9a0 │ │ movs r7, r5 │ │ lsrs r0, r0, #8 │ │ subs r7, #21 │ │ - b.n bdc50 │ │ + b.n bdc60 │ │ stmia r0!, {} │ │ - b.n be0b6 │ │ + b.n be0c6 │ │ lsls r3, r4, #2 │ │ - b.n bdc22 │ │ + b.n bdc32 │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ movs r4, r1 │ │ - b.n bdcc2 │ │ - beq.n bd9bc │ │ - b.n bde1c │ │ + b.n bdcd2 │ │ + beq.n bd9cc │ │ + b.n bde2c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r1, lr} │ │ - b.n bdcce │ │ + b.n bdcde │ │ subs r7, #21 │ │ - b.n bdc70 │ │ + b.n bdc80 │ │ stmia r0!, {} │ │ - b.n be0d6 │ │ + b.n be0e6 │ │ lsls r3, r4, #2 │ │ - b.n bdc42 │ │ + b.n bdc52 │ │ @ instruction: 0xfff70aff │ │ lsls r3, r4 │ │ - b.n bda2a │ │ + b.n bda3a │ │ movs r2, r0 │ │ - b.n bdfca │ │ + b.n bdfda │ │ movs r5, r5 │ │ subs r0, r0, r0 │ │ movs r0, #4 │ │ - b.n bdcee │ │ + b.n bdcfe │ │ adds r0, #1 │ │ - b.n bda4e │ │ + b.n bda5e │ │ stmia r0!, {r2} │ │ - b.n bd2da │ │ + b.n bd2ea │ │ adds r0, #0 │ │ - b.n bd4ce │ │ + b.n bd4de │ │ lsls r0, r4, #2 │ │ - b.n bd4de │ │ + b.n bd4ee │ │ lsls r6, r1, #4 │ │ - b.n bdac2 │ │ + b.n bdad2 │ │ movs r0, r0 │ │ - b.n bdc6a │ │ + b.n bdc7a │ │ @ instruction: 0xffec8aff │ │ adds r0, #1 │ │ - b.n bdece │ │ + b.n bdede │ │ strb r0, [r1, #0] │ │ - b.n bdeda │ │ + b.n bdeea │ │ movs r7, r0 │ │ - b.n bdc7c │ │ + b.n bdc8c │ │ strb r3, [r0, #0] │ │ strh r0, [r4, #12] │ │ adds r0, #4 │ │ - b.n bda6c │ │ + b.n bda7c │ │ adds r0, #5 │ │ - b.n bde68 │ │ + b.n bde78 │ │ movs r4, r1 │ │ - b.n be08c │ │ + b.n be09c │ │ movs r6, r2 │ │ subs r2, #0 │ │ strb r0, [r0, #0] │ │ - b.n be12e │ │ + b.n be13e │ │ strb r1, [r0, #4] │ │ - b.n bda80 │ │ + b.n bda90 │ │ movs r0, r2 │ │ - b.n be0a4 │ │ + b.n be0b4 │ │ movs r0, r2 │ │ subs r2, #0 │ │ str r1, [r0, #0] │ │ - b.n be13e │ │ - b.n bdc46 │ │ - b.n bdb0e │ │ + b.n be14e │ │ + b.n bdc56 │ │ + b.n bdb1e │ │ ands r3, r0 │ │ - b.n be1a2 │ │ + b.n be1b2 │ │ adds r1, #4 │ │ - b.n bdb0e │ │ + b.n bdb1e │ │ str r4, [r0, r0] │ │ - b.n bdd4e │ │ + b.n bdd5e │ │ str r7, [r0, #0] │ │ - b.n bdb16 │ │ + b.n bdb26 │ │ lsrs r5, r1, #10 │ │ orn r0, r2, #8448 @ 0x2100 │ │ - b.n bdec4 │ │ + b.n bded4 │ │ lsrs r7, r1, #10 │ │ - bl ffd04a12 │ │ + bl ffd04a22 │ │ subs r7, r7, r3 │ │ movs r4, r0 │ │ - b.n bdce2 │ │ + b.n bdcf2 │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ @ instruction: 0xffd3eaff │ │ stmia r0!, {} │ │ - b.n be172 │ │ + b.n be182 │ │ movs r4, r1 │ │ - b.n bdd76 │ │ - beq.n bda70 │ │ - b.n bded0 │ │ + b.n bdd86 │ │ + beq.n bda80 │ │ + b.n bdee0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, ip, sp} │ │ - b.n bdd82 │ │ + b.n bdd92 │ │ movs r0, r0 │ │ and.w r0, r0, r2, lsl #12 │ │ - b.n bdd8a │ │ + b.n bdd9a │ │ movs r0, #0 │ │ - b.n bd574 │ │ + b.n bd584 │ │ movs r1, #1 │ │ - b.n bd858 │ │ + b.n bd868 │ │ adds r0, #4 │ │ - b.n bdf5c │ │ + b.n bdf6c │ │ movs r0, r0 │ │ - b.n bdd00 │ │ + b.n bdd10 │ │ @ instruction: 0xfffa9aff │ │ @ instruction: 0xffc6eaff │ │ stmia r0!, {} │ │ - b.n be226 │ │ + b.n be236 │ │ movs r4, r1 │ │ - b.n bddaa │ │ - beq.n bdaa4 │ │ - b.n bdf04 │ │ + b.n bddba │ │ + beq.n bdab4 │ │ + b.n bdf14 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, ip, sp} │ │ - b.n be1b6 │ │ + b.n be1c6 │ │ stmia r0!, {} │ │ - b.n be1ba │ │ + b.n be1ca │ │ adds r1, #1 │ │ - b.n bdb04 │ │ + b.n bdb14 │ │ strb r3, [r0, #0] │ │ - b.n bd9aa │ │ + b.n bd9ba │ │ str r0, [r0, #0] │ │ - b.n bd5ae │ │ + b.n bd5be │ │ strb r7, [r0, #0] │ │ - b.n bdb16 │ │ + b.n bdb26 │ │ movs r1, r1 │ │ - b.n bdd3c │ │ + b.n bdd4c │ │ @ instruction: 0xffc30aff │ │ ands r4, r0 │ │ - b.n bdf1e │ │ + b.n bdf2e │ │ movs r0, r1 │ │ - b.n bdd42 │ │ + b.n bdd52 │ │ @ instruction: 0xfff71aff │ │ @ instruction: 0xffb6eaff │ │ - ldr r4, [pc, #448] @ (bdc64 ) │ │ + ldr r4, [pc, #448] @ (bdc74 ) │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n bdfc4 │ │ - beq.n bdabc │ │ - b.n bdf48 │ │ + b.n bdfd4 │ │ + beq.n bdacc │ │ + b.n bdf58 │ │ str r2, [r0, r0] │ │ - b.n bddf2 │ │ + b.n bde02 │ │ movs r0, #8 │ │ - b.n bd5da │ │ + b.n bd5ea │ │ ands r1, r0 │ │ - b.n bddfa │ │ + b.n bde0a │ │ str r0, [r0, #0] │ │ - b.n bddfe │ │ + b.n bde0e │ │ movs r0, r0 │ │ - b.n be166 │ │ + b.n be176 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ lsls r0, r2, #3 │ │ - b.n bde54 │ │ + b.n bde64 │ │ movs r0, #1 │ │ - b.n bdf52 │ │ + b.n bdf62 │ │ movs r6, r1 │ │ and.w r0, r0, r4, lsr #1 │ │ - b.n bd614 │ │ + b.n bd624 │ │ asrs r5, r1, #32 │ │ - b.n bde1a │ │ + b.n bde2a │ │ movs r0, r0 │ │ - b.n bdbfc │ │ + b.n bdc0c │ │ movs r4, r5 │ │ - b.n bd602 │ │ + b.n bd612 │ │ ldr r2, [r3, #60] @ 0x3c │ │ add.w r0, r0, r0 │ │ - b.n be18a │ │ + b.n be19a │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n bd62c │ │ + b.n bd63c │ │ subs r2, #0 │ │ - b.n be10e │ │ + b.n be11e │ │ movs r0, #0 │ │ - b.n bd634 │ │ + b.n bd644 │ │ subs r3, #154 @ 0x9a │ │ - b.n be184 │ │ + b.n be194 │ │ subs r0, r0, #7 │ │ - b.n bde42 │ │ + b.n bde52 │ │ lsls r2, r2, #14 │ │ - b.n bdcc8 │ │ + b.n bdcd8 │ │ movs r0, #14 │ │ - b.n be24a │ │ + b.n be25a │ │ lsls r0, r6, #3 │ │ - b.n bde98 │ │ + b.n bdea8 │ │ movs r6, r0 │ │ - b.n bdbb2 │ │ + b.n bdbc2 │ │ movs r0, #8 │ │ - b.n bd620 │ │ + b.n bd630 │ │ asrs r4, r0, #32 │ │ - b.n bdc9c │ │ - beq.n bdb3c │ │ - b.n bdfb4 │ │ + b.n bdcac │ │ + beq.n bdb4c │ │ + b.n bdfc4 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {} │ │ - b.n be266 │ │ + b.n be276 │ │ asrs r0, r0, #32 │ │ - b.n be26a │ │ + b.n be27a │ │ @ instruction: 0xfff5eaff │ │ - lsrs r0, r6, #21 │ │ + lsrs r0, r0, #22 │ │ movs r2, r0 │ │ - ldr r7, [pc, #960] @ (bdef4 ) │ │ + ldr r7, [pc, #960] @ (bdf04 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n be054 │ │ - beq.n bdbd4 │ │ - b.n bdfd8 │ │ + b.n be064 │ │ + beq.n bdbe4 │ │ + b.n bdfe8 │ │ str r0, [r0, #0] │ │ - b.n bde82 │ │ + b.n bde92 │ │ lsls r2, r0, #16 │ │ ldmia.w r0, {r0, r1, sp, lr, pc} │ │ - b.n bde8a │ │ + b.n bde9a │ │ strh r0, [r1, #0] │ │ - b.n bd6ba │ │ + b.n bd6ca │ │ str r0, [sp, #0] │ │ - b.n bde92 │ │ + b.n bdea2 │ │ adds r0, #12 │ │ - b.n bd676 │ │ + b.n bd686 │ │ stmia r0!, {r1} │ │ - b.n bde9a │ │ + b.n bdeaa │ │ movs r0, r1 │ │ - b.n bdc00 │ │ + b.n bdc10 │ │ movs r3, r0 │ │ - b.n bdd16 │ │ + b.n bdd26 │ │ movs r6, r4 │ │ cmp r2, #0 │ │ movs r1, r0 │ │ - b.n bdc22 │ │ + b.n bdc32 │ │ movs r2, r1 │ │ - b.n bdd2a │ │ + b.n bdd3a │ │ lsls r4, r0, #1 │ │ cmp r2, #0 │ │ movs r1, r0 │ │ - b.n be0ae │ │ + b.n be0be │ │ movs r0, #0 │ │ - b.n be0d6 │ │ + b.n be0e6 │ │ movs r1, r0 │ │ - b.n bdbbe │ │ + b.n bdbce │ │ movs r0, #10 │ │ - b.n bdbc6 │ │ + b.n bdbd6 │ │ movs r2, r0 │ │ - b.n bdea6 │ │ + b.n bdeb6 │ │ lsls r1, r4, #3 │ │ subs r0, r0, r0 │ │ - add r0, pc, #64 @ (adr r0, bdbcc ) │ │ - b.n bd6c0 │ │ + add r0, pc, #64 @ (adr r0, bdbdc ) │ │ + b.n bd6d0 │ │ movs r0, r0 │ │ - b.n be246 │ │ + b.n be256 │ │ lsls r7, r1, #11 │ │ lsrs r0, r0, #8 │ │ movs r0, #24 │ │ - b.n bd6cc │ │ + b.n bd6dc │ │ movs r4, r0 │ │ - b.n be35e │ │ + b.n be36e │ │ asrs r2, r1, #32 │ │ - b.n bdee2 │ │ + b.n bdef2 │ │ adds r0, #40 @ 0x28 │ │ - b.n bd5bc │ │ + b.n bd5cc │ │ str r0, [r6, #0] │ │ - b.n bd5c0 │ │ + b.n bd5d0 │ │ movs r0, #32 │ │ - b.n bd5c4 │ │ + b.n bd5d4 │ │ str r1, [r0, #16] │ │ - b.n bdbb2 │ │ + b.n bdbc2 │ │ adds r0, #2 │ │ - b.n bdef6 │ │ + b.n bdf06 │ │ ands r1, r0 │ │ - b.n be0bc │ │ + b.n be0cc │ │ str r6, [r0, #0] │ │ - b.n bdb24 │ │ + b.n bdb34 │ │ asrs r4, r4, #2 │ │ - b.n bdf02 │ │ + b.n bdf12 │ │ str r4, [r0, r0] │ │ - b.n bd6ec │ │ + b.n bd6fc │ │ str r4, [r1, #0] │ │ - b.n bdc76 │ │ + b.n bdc86 │ │ str r6, [r1, #0] │ │ - b.n bdd78 │ │ + b.n bdd88 │ │ movs r0, #3 │ │ adds r1, #160 @ 0xa0 │ │ movs r5, r0 │ │ - b.n be27e │ │ + b.n be28e │ │ @ instruction: 0xfff48aff │ │ movs r4, r0 │ │ - b.n be286 │ │ + b.n be296 │ │ str r0, [sp, #176] @ 0xb0 │ │ - b.n bd5f8 │ │ + b.n bd608 │ │ lsls r2, r0, #6 │ │ subs r2, #0 │ │ lsls r0, r2, #3 │ │ - b.n bdf6e │ │ + b.n bdf7e │ │ adds r0, #0 │ │ - b.n be32e │ │ + b.n be33e │ │ movs r4, r1 │ │ - b.n bdc92 │ │ + b.n bdca2 │ │ movs r6, r1 │ │ - b.n bdd98 │ │ + b.n bdda8 │ │ adds r0, #1 │ │ adds r3, #0 │ │ movs r1, #131 @ 0x83 │ │ - b.n bdd02 │ │ + b.n bdd12 │ │ lsls r6, r7, #5 │ │ and.w r0, r0, r1, lsl #12 │ │ - b.n be13e │ │ + b.n be14e │ │ ands r0, r2 │ │ - b.n bd73c │ │ - add r0, pc, #0 @ (adr r0, bdc0c ) │ │ - b.n be16a │ │ + b.n bd74c │ │ + add r0, pc, #0 @ (adr r0, bdc1c ) │ │ + b.n be17a │ │ movs r0, r0 │ │ - b.n be2ba │ │ + b.n be2ca │ │ lsls r0, r2, #2 │ │ lsrs r0, r0, #8 │ │ movs r0, r3 │ │ - b.n bd74c │ │ + b.n bd75c │ │ asrs r4, r0, #32 │ │ - b.n be3de │ │ + b.n be3ee │ │ strb r4, [r0, #0] │ │ - b.n bdf62 │ │ + b.n bdf72 │ │ str r0, [r6, #0] │ │ - b.n bd63c │ │ + b.n bd64c │ │ movs r0, r4 │ │ - b.n bd640 │ │ + b.n bd650 │ │ str r7, [r0, #16] │ │ - b.n bdc30 │ │ + b.n bdc40 │ │ str r0, [r0, r0] │ │ - b.n bdf72 │ │ + b.n bdf82 │ │ movs r0, #6 │ │ - b.n bdba0 │ │ + b.n bdbb0 │ │ str r4, [r0, #0] │ │ - b.n bd764 │ │ + b.n bd774 │ │ movs r0, #12 │ │ - b.n bdce2 │ │ + b.n bdcf2 │ │ movs r0, #14 │ │ - b.n bddee │ │ + b.n bddfe │ │ str r1, [r0, #0] │ │ - b.n be154 │ │ + b.n be164 │ │ movs r5, r0 │ │ adds r1, #160 @ 0xa0 │ │ movs r5, r0 │ │ - b.n be2fa │ │ + b.n be30a │ │ strb r6, [r4, #2] │ │ - b.n bdf92 │ │ + b.n bdfa2 │ │ @ instruction: 0xfff48aff │ │ movs r4, r0 │ │ - b.n be306 │ │ + b.n be316 │ │ str r0, [sp, #176] @ 0xb0 │ │ - b.n bd674 │ │ - add r0, pc, #208 @ (adr r0, bdd30 ) │ │ - b.n bd77c │ │ + b.n bd684 │ │ + add r0, pc, #208 @ (adr r0, bdd40 ) │ │ + b.n bd78c │ │ movs r6, r1 │ │ subs r2, #0 │ │ movs r0, #0 │ │ - b.n bd78a │ │ + b.n bd79a │ │ strb r0, [r0, #0] │ │ - b.n be3ae │ │ + b.n be3be │ │ asrs r4, r0, #32 │ │ - b.n bd792 │ │ + b.n bd7a2 │ │ movs r0, #12 │ │ - b.n bdd1a │ │ + b.n bdd2a │ │ asrs r6, r1, #32 │ │ - b.n bde1c │ │ + b.n bde2c │ │ strb r1, [r0, #0] │ │ adds r3, #0 │ │ lsls r7, r0, #6 │ │ - b.n bdd82 │ │ + b.n bdd92 │ │ movs r1, r1 │ │ and.w r0, r0, r8 │ │ - b.n bdd42 │ │ + b.n bdd52 │ │ movs r0, #0 │ │ - b.n be44e │ │ + b.n be45e │ │ movs r3, r0 │ │ - b.n bde4e │ │ + b.n bde5e │ │ lsls r6, r6, #1 │ │ cmp r2, #0 │ │ movs r2, r0 │ │ - b.n bdfda │ │ - beq.n bdcd4 │ │ - b.n be134 │ │ + b.n bdfea │ │ + beq.n bdce4 │ │ + b.n be144 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {ip, lr} │ │ - b.n be3e6 │ │ + b.n be3f6 │ │ movs r2, r0 │ │ - b.n be356 │ │ + b.n be366 │ │ movs r5, r0 │ │ subs r2, #0 │ │ movs r0, #0 │ │ - b.n bd7d2 │ │ + b.n bd7e2 │ │ str r0, [r0, r0] │ │ - b.n be3f6 │ │ + b.n be406 │ │ asrs r4, r0, #32 │ │ - b.n bd7da │ │ + b.n bd7ea │ │ movs r0, #12 │ │ - b.n bdd62 │ │ + b.n bdd72 │ │ asrs r6, r1, #32 │ │ - b.n bde64 │ │ + b.n bde74 │ │ str r1, [r0, r0] │ │ adds r3, #0 │ │ movs r1, #133 @ 0x85 │ │ - b.n bddca │ │ + b.n bddda │ │ asrs r0, r4, #32 │ │ - b.n bd704 │ │ - add r0, pc, #32 @ (adr r0, bdcf0 ) │ │ - b.n be156 │ │ + b.n bd714 │ │ + add r0, pc, #32 @ (adr r0, bdd00 ) │ │ + b.n be166 │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n be016 │ │ + b.n be026 │ │ strb r0, [r0, #0] │ │ - b.n be41a │ │ + b.n be42a │ │ asrs r4, r0, #6 │ │ - b.n bdde0 │ │ + b.n bddf0 │ │ ands r0, r6 │ │ - b.n bd7fc │ │ + b.n bd80c │ │ asrs r0, r5, #32 │ │ - b.n bd6fc │ │ + b.n bd70c │ │ str r4, [r5, r0] │ │ - b.n bd804 │ │ + b.n bd814 │ │ movs r0, #36 @ 0x24 │ │ - b.n bd704 │ │ + b.n bd714 │ │ asrs r0, r4, #32 │ │ - b.n bd728 │ │ + b.n bd738 │ │ ands r7, r0 │ │ - b.n bddfa │ │ + b.n bde0a │ │ str r6, [r1, r0] │ │ - b.n be03a │ │ + b.n be04a │ │ movs r1, r0 │ │ - b.n bdfa6 │ │ + b.n bdfb6 │ │ movs r3, r2 │ │ ldr r2, [sp, #0] │ │ asrs r2, r1, #32 │ │ - b.n be046 │ │ + b.n be056 │ │ strh r1, [r0, #0] │ │ - b.n be1bc │ │ + b.n be1cc │ │ str r7, [r0, #0] │ │ - b.n bdc70 │ │ - b.n bdd10 │ │ - b.n be29c │ │ + b.n bdc80 │ │ + b.n bdd20 │ │ + b.n be2ac │ │ stmia r0!, {r2} │ │ - b.n bd838 │ │ + b.n bd848 │ │ asrs r0, r1, #32 │ │ - b.n bddc6 │ │ + b.n bddd6 │ │ asrs r6, r1, #32 │ │ - b.n bded6 │ │ + b.n bdee6 │ │ movs r3, r1 │ │ subs r2, #0 │ │ movs r0, #14 │ │ - b.n bdd7e │ │ + b.n bdd8e │ │ asrs r0, r1, #32 │ │ - b.n bdd76 │ │ + b.n bdd86 │ │ asrs r2, r0, #32 │ │ - b.n be050 │ │ + b.n be060 │ │ movs r0, #36 @ 0x24 │ │ - b.n bd768 │ │ + b.n bd778 │ │ strb r0, [r1, #0] │ │ - b.n be1c4 │ │ + b.n be1d4 │ │ str r0, [sp, #24] │ │ - b.n be07a │ │ - b.n bdd54 │ │ - b.n be07e │ │ + b.n be08a │ │ + b.n bdd64 │ │ + b.n be08e │ │ @ instruction: 0xffea0aff │ │ movs r0, #0 │ │ - b.n be506 │ │ + b.n be516 │ │ movs r2, r0 │ │ - b.n be08a │ │ - beq.n bdd84 │ │ - b.n be1e4 │ │ + b.n be09a │ │ + beq.n bdd94 │ │ + b.n be1f4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r5, ip} │ │ - b.n bd78c │ │ + b.n bd79c │ │ movs r1, r0 │ │ - b.n bdffe │ │ + b.n be00e │ │ movs r5, r2 │ │ cmp r2, #0 │ │ strh r0, [r6, #0] │ │ - b.n bd798 │ │ - b.n bdd6e │ │ - b.n be0a6 │ │ - add r0, pc, #208 @ (adr r0, bde38 ) │ │ - b.n bd8a4 │ │ + b.n bd7a8 │ │ + b.n bdd7e │ │ + b.n be0b6 │ │ + add r0, pc, #208 @ (adr r0, bde48 ) │ │ + b.n bd8b4 │ │ stmia r0!, {r0, r3} │ │ - b.n be0ae │ │ + b.n be0be │ │ str r0, [r0, #0] │ │ - b.n bd896 │ │ + b.n bd8a6 │ │ asrs r4, r0, #32 │ │ - b.n bd89a │ │ + b.n bd8aa │ │ str r6, [r0, r0] │ │ - b.n bde20 │ │ + b.n bde30 │ │ str r1, [r0, r0] │ │ - b.n bdf32 │ │ + b.n bdf42 │ │ movs r1, r1 │ │ subs r2, #0 │ │ str r3, [r0, #0] │ │ - b.n bddd2 │ │ + b.n bdde2 │ │ asrs r2, r1, #32 │ │ - b.n bddcc │ │ + b.n bdddc │ │ asrs r1, r0, #32 │ │ - b.n be0ba │ │ + b.n be0ca │ │ @ instruction: 0xffeb1aff │ │ adds r0, #1 │ │ - b.n be2bc │ │ + b.n be2cc │ │ asrs r0, r5, #32 │ │ - b.n bd7d0 │ │ - add r0, pc, #0 @ (adr r0, bdd9c ) │ │ - b.n be2f2 │ │ + b.n bd7e0 │ │ + add r0, pc, #0 @ (adr r0, bddac ) │ │ + b.n be302 │ │ movs r0, #8 │ │ - b.n be2a6 │ │ + b.n be2b6 │ │ movs r1, r0 │ │ - b.n be04a │ │ + b.n be05a │ │ @ instruction: 0xfff03aff │ │ movs r2, r0 │ │ - b.n be056 │ │ + b.n be066 │ │ movs r6, r0 │ │ subs r2, #0 │ │ movs r6, r4 │ │ @ instruction: 0xea008030 │ │ - b.n bd7f0 │ │ - b.n bddc6 │ │ - b.n be0fe │ │ + b.n bd800 │ │ + b.n bddd6 │ │ + b.n be10e │ │ stmia r0!, {r0, r3} │ │ - b.n be102 │ │ - add r0, pc, #208 @ (adr r0, bde94 ) │ │ - b.n bd900 │ │ + b.n be112 │ │ + add r0, pc, #208 @ (adr r0, bdea4 ) │ │ + b.n bd910 │ │ movs r2, r0 │ │ - b.n be072 │ │ + b.n be082 │ │ movs r0, r4 │ │ cmp r2, #0 │ │ asrs r4, r5, #32 │ │ - b.n bd90c │ │ + b.n bd91c │ │ str r0, [r6, r0] │ │ - b.n bd910 │ │ + b.n bd920 │ │ lsls r1, r0, #6 │ │ - b.n bdeda │ │ + b.n bdeea │ │ asrs r0, r0, #32 │ │ - b.n bde62 │ │ + b.n bde72 │ │ asrs r7, r0, #32 │ │ - b.n bde64 │ │ + b.n bde74 │ │ asrs r1, r0, #7 │ │ - b.n bde70 │ │ + b.n bde80 │ │ str r4, [r5, r0] │ │ - b.n bd820 │ │ + b.n bd830 │ │ asrs r0, r2, #32 │ │ - b.n bd8f8 │ │ + b.n bd908 │ │ str r0, [r5, r0] │ │ - b.n bd828 │ │ + b.n bd838 │ │ movs r5, r0 │ │ - b.n be09a │ │ + b.n be0aa │ │ movs r5, r2 │ │ cmp r2, #0 │ │ asrs r0, r1, #32 │ │ - b.n be302 │ │ + b.n be312 │ │ str r2, [r0, #0] │ │ - b.n be1c2 │ │ + b.n be1d2 │ │ movs r1, r0 │ │ - b.n be0b0 │ │ + b.n be0c0 │ │ asrs r5, r0, #32 │ │ strh r0, [r4, #12] │ │ str r6, [r0, #0] │ │ - b.n bdf10 │ │ + b.n bdf20 │ │ lsls r0, r1, #1 │ │ - b.n be4be │ │ + b.n be4ce │ │ movs r3, r0 │ │ subs r2, #0 │ │ movs r2, r0 │ │ - b.n bde9a │ │ + b.n bdeaa │ │ movs r7, r0 │ │ - b.n bdf1e │ │ + b.n bdf2e │ │ movs r0, r2 │ │ - b.n be4c2 │ │ + b.n be4d2 │ │ lsls r3, r3, #6 │ │ cmp r2, #0 │ │ asrs r2, r0, #32 │ │ - b.n be16a │ │ + b.n be17a │ │ str r0, [r1, #0] │ │ - b.n be16e │ │ + b.n be17e │ │ str r0, [sp, #176] @ 0xb0 │ │ - b.n bd868 │ │ + b.n bd878 │ │ movs r0, #40 @ 0x28 │ │ - b.n bd86c │ │ + b.n bd87c │ │ movs r1, r4 │ │ ldmia.w r1, {r3, ip} │ │ - b.n be340 │ │ + b.n be350 │ │ movs r2, r0 │ │ - b.n be0e4 │ │ + b.n be0f4 │ │ movs r1, r4 │ │ stmia.w r4, {r3, lr} │ │ - b.n be352 │ │ + b.n be362 │ │ @ instruction: 0xfff93aff │ │ movs r1, r0 │ │ @ instruction: 0xea00902c │ │ - b.n bd88c │ │ + b.n bd89c │ │ str r0, [r1, #0] │ │ - b.n be19a │ │ + b.n be1aa │ │ lsls r0, r1, #16 │ │ stmia.w r6, {ip, lr} │ │ stmia.w r9, {sp} │ │ - b.n be5a6 │ │ + b.n be5b6 │ │ movs r2, r0 │ │ - b.n be1aa │ │ - beq.n bdea4 │ │ - b.n be304 │ │ + b.n be1ba │ │ + beq.n bdeb4 │ │ + b.n be314 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3} │ │ - b.n bdec6 │ │ + b.n bded6 │ │ movs r0, #14 │ │ - b.n bdec0 │ │ + b.n bded0 │ │ movs r2, r0 │ │ - b.n be19e │ │ + b.n be1ae │ │ movs r3, r4 │ │ subs r0, r0, r0 │ │ movs r0, #16 │ │ - b.n bd9b8 │ │ + b.n bd9c8 │ │ ands r1, r0 │ │ - b.n be3c2 │ │ + b.n be3d2 │ │ movs r0, r0 │ │ - b.n be3ea │ │ + b.n be3fa │ │ movs r0, r5 │ │ - b.n bd8a8 │ │ + b.n bd8b8 │ │ movs r0, r0 │ │ - b.n be53a │ │ + b.n be54a │ │ lsls r0, r6, #7 │ │ lsrs r0, r0, #8 │ │ str r0, [r3, r0] │ │ - b.n bd9d0 │ │ + b.n bd9e0 │ │ strh r4, [r1, #0] │ │ - b.n be1e2 │ │ + b.n be1f2 │ │ ands r0, r6 │ │ - b.n bd9c0 │ │ + b.n bd9d0 │ │ movs r4, r0 │ │ - b.n be66a │ │ + b.n be67a │ │ ands r2, r0 │ │ - b.n be1ee │ │ + b.n be1fe │ │ strb r4, [r1, #0] │ │ - b.n be1f2 │ │ + b.n be202 │ │ str r0, [r6, #0] │ │ - b.n bd8cc │ │ + b.n bd8dc │ │ movs r0, #52 @ 0x34 │ │ - b.n bd9d4 │ │ + b.n bd9e4 │ │ str r0, [r4, r0] │ │ - b.n bd8d4 │ │ + b.n bd8e4 │ │ movs r1, #4 │ │ - b.n bdec2 │ │ + b.n bded2 │ │ adds r0, #5 │ │ - b.n be206 │ │ + b.n be216 │ │ movs r0, #2 │ │ - b.n bde30 │ │ + b.n bde40 │ │ str r4, [r0, #0] │ │ - b.n bd9f4 │ │ + b.n bda04 │ │ movs r0, #7 │ │ - b.n bdf76 │ │ + b.n bdf86 │ │ movs r0, #14 │ │ - b.n be082 │ │ + b.n be092 │ │ movs r0, #1 │ │ - b.n be3e2 │ │ + b.n be3f2 │ │ str r3, [r0, r0] │ │ adds r1, #160 @ 0xa0 │ │ movs r5, r0 │ │ - b.n be586 │ │ + b.n be596 │ │ lsls r2, r4 │ │ - b.n be226 │ │ + b.n be236 │ │ @ instruction: 0xfff48aff │ │ movs r4, r0 │ │ - b.n be592 │ │ + b.n be5a2 │ │ str r0, [sp, #176] @ 0xb0 │ │ - b.n bd908 │ │ + b.n bd918 │ │ lsls r3, r4, #4 │ │ subs r2, #0 │ │ movs r1, r1 │ │ ldmia.w r5, {sp} │ │ - b.n be63e │ │ + b.n be64e │ │ movs r0, r1 │ │ - b.n bdfa2 │ │ + b.n bdfb2 │ │ movs r6, r1 │ │ - b.n be0ac │ │ + b.n be0bc │ │ movs r0, #1 │ │ adds r3, #0 │ │ str r2, [r0, r6] │ │ - b.n be018 │ │ + b.n be028 │ │ lsls r7, r3, #4 │ │ and.w r0, r0, r0, lsr #16 │ │ - b.n bda48 │ │ + b.n bda58 │ │ movs r1, r0 │ │ - b.n be43c │ │ + b.n be44c │ │ movs r0, #0 │ │ - b.n be472 │ │ + b.n be482 │ │ movs r1, r0 │ │ - b.n be5ca │ │ + b.n be5da │ │ movs r0, r0 │ │ movs r0, r5 │ │ movs r0, #2 │ │ movs r3, r4 │ │ movs r2, r0 │ │ lsls r0, r2, #6 │ │ movs r0, r4 │ │ lsrs r0, r0, #8 │ │ movs r4, r2 │ │ - b.n bda68 │ │ + b.n bda78 │ │ movs r0, r0 │ │ - b.n be1e2 │ │ + b.n be1f2 │ │ lsls r7, r1, #9 │ │ lsrs r0, r0, #8 │ │ asrs r0, r3, #32 │ │ - b.n bda74 │ │ + b.n bda84 │ │ movs r0, r0 │ │ - b.n be5ee │ │ + b.n be5fe │ │ lsls r3, r4, #9 │ │ lsrs r0, r0, #8 │ │ lsls r4, r0, #6 │ │ - b.n be050 │ │ + b.n be060 │ │ asrs r4, r6, #32 │ │ - b.n bda6c │ │ + b.n bda7c │ │ movs r0, #0 │ │ - b.n be716 │ │ + b.n be726 │ │ asrs r0, r0, #32 │ │ - b.n be69a │ │ + b.n be6aa │ │ str r0, [sp, #176] @ 0xb0 │ │ - b.n bd974 │ │ + b.n bd984 │ │ str r0, [r6, #0] │ │ - b.n bd978 │ │ + b.n bd988 │ │ strh r0, [r1, #0] │ │ - b.n bd986 │ │ + b.n bd996 │ │ adds r0, #4 │ │ - b.n bd98a │ │ + b.n bd99a │ │ strb r0, [r1, #0] │ │ - b.n be026 │ │ + b.n be036 │ │ strb r3, [r0, #0] │ │ - b.n be12e │ │ + b.n be13e │ │ movs r7, r5 │ │ cmp r2, #0 │ │ strh r0, [r0, #0] │ │ - b.n bda7a │ │ + b.n bda8a │ │ asrs r1, r0, #32 │ │ - b.n be400 │ │ + b.n be410 │ │ adds r0, #4 │ │ - b.n bda82 │ │ + b.n bda92 │ │ movs r0, #1 │ │ - b.n be48a │ │ + b.n be49a │ │ movs r0, r1 │ │ - b.n be40a │ │ + b.n be41a │ │ adds r0, #1 │ │ - b.n be0b6 │ │ + b.n be0c6 │ │ @ instruction: 0xfff31aff │ │ str r4, [r6, r0] │ │ - b.n bdad0 │ │ + b.n bdae0 │ │ ands r1, r0 │ │ - b.n be4a2 │ │ + b.n be4b2 │ │ movs r0, #0 │ │ - b.n be6de │ │ + b.n be6ee │ │ movs r0, r2 │ │ - b.n be64a │ │ + b.n be65a │ │ ands r0, r2 │ │ - b.n bdab8 │ │ + b.n bdac8 │ │ stmia r0!, {} │ │ - b.n bdab4 │ │ - b.n bdfb4 │ │ - b.n bdab8 │ │ + b.n bdac4 │ │ + b.n bdfc4 │ │ + b.n bdac8 │ │ movs r5, r6 │ │ ldrh r0, [r0, #16] │ │ vpmin.u q7, , │ │ movs r0, r3 │ │ - b.n bdaec │ │ + b.n bdafc │ │ movs r0, #1 │ │ - b.n be4f6 │ │ + b.n be506 │ │ strb r0, [r0, #0] │ │ - b.n be51e │ │ + b.n be52e │ │ str r1, [r0, r0] │ │ - b.n be47e │ │ + b.n be48e │ │ strh r0, [r0, #0] │ │ - b.n bdaea │ │ + b.n bdafa │ │ adds r0, #4 │ │ - b.n bdaee │ │ + b.n bdafe │ │ movs r0, #2 │ │ - b.n be022 │ │ + b.n be032 │ │ strb r7, [r0, #0] │ │ - b.n be01c │ │ + b.n be02c │ │ movs r0, #7 │ │ - b.n be2de │ │ + b.n be2ee │ │ strb r0, [r0, #0] │ │ - b.n be57a │ │ + b.n be58a │ │ movs r0, r0 │ │ - b.n be686 │ │ + b.n be696 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ str r0, [r6, #0] │ │ - b.n bda00 │ │ + b.n bda10 │ │ movs r0, #5 │ │ - b.n be03e │ │ + b.n be04e │ │ str r7, [r0, #0] │ │ - b.n be038 │ │ + b.n be048 │ │ movs r0, #6 │ │ - b.n be31a │ │ + b.n be32a │ │ str r0, [r6, #0] │ │ - b.n bda30 │ │ + b.n bda40 │ │ @ instruction: 0xffcc1aff │ │ lsls r2, r0, #16 │ │ stmia.w r0, {r0, r2} │ │ - b.n be056 │ │ + b.n be066 │ │ asrs r7, r0, #32 │ │ - b.n be050 │ │ + b.n be060 │ │ movs r1, r0 │ │ - b.n be32e │ │ + b.n be33e │ │ stmia r0!, {r0, r2} │ │ lsls r0, r4, #6 │ │ - b.n be022 │ │ + b.n be032 │ │ lsls r0, r4, #6 │ │ movs r2, r0 │ │ - b.n be552 │ │ + b.n be562 │ │ str r0, [r0, r0] │ │ stmia.w r9, {ip} │ │ - b.n be57e │ │ + b.n be58e │ │ lsls r0, r6, #3 │ │ - b.n be3b2 │ │ + b.n be3c2 │ │ movs r0, #0 │ │ - b.n be76a │ │ + b.n be77a │ │ movs r2, r0 │ │ - b.n be36e │ │ - beq.n be068 │ │ - b.n be4c8 │ │ + b.n be37e │ │ + beq.n be078 │ │ + b.n be4d8 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, ip, sp, lr} │ │ - b.n be08a │ │ + b.n be09a │ │ str r6, [r1, #0] │ │ - b.n be084 │ │ + b.n be094 │ │ strb r6, [r0, #0] │ │ - b.n be370 │ │ + b.n be380 │ │ str r1, [r0, r0] │ │ - b.n be14e │ │ + b.n be15e │ │ str r0, [r6, r0] │ │ - b.n bdb64 │ │ + b.n bdb74 │ │ lsls r2, r5, #8 │ │ lsrs r0, r0, #8 │ │ str r4, [r6, r0] │ │ - b.n bdb8c │ │ + b.n bdb9c │ │ ands r1, r0 │ │ - b.n be55e │ │ + b.n be56e │ │ movs r0, #0 │ │ - b.n be79a │ │ + b.n be7aa │ │ movs r1, r2 │ │ - b.n be706 │ │ + b.n be716 │ │ stmia r0!, {} │ │ - b.n bdb62 │ │ + b.n bdb72 │ │ ands r0, r2 │ │ - b.n bdb78 │ │ - b.n be070 │ │ - b.n bdb6a │ │ + b.n bdb88 │ │ + b.n be080 │ │ + b.n bdb7a │ │ vpmin.u8 , , │ │ movs r1, r0 │ │ - b.n be52a │ │ + b.n be53a │ │ movs r0, #48 @ 0x30 │ │ - b.n bdbb0 │ │ + b.n bdbc0 │ │ asrs r0, r0, #32 │ │ - b.n be616 │ │ + b.n be626 │ │ movs r0, r0 │ │ - b.n be0ce │ │ + b.n be0de │ │ asrs r1, r0, #32 │ │ - b.n be0c8 │ │ + b.n be0d8 │ │ movs r1, r0 │ │ - b.n be3a6 │ │ + b.n be3b6 │ │ movs r6, r1 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n be592 │ │ + b.n be5a2 │ │ movs r4, r0 │ │ - b.n be332 │ │ + b.n be342 │ │ vpmin.u q9, q9, │ │ asrs r5, r0, #32 │ │ - b.n be3da │ │ + b.n be3ea │ │ str r2, [r0, #0] │ │ - b.n be3de │ │ + b.n be3ee │ │ lsls r0, r0, #6 │ │ - b.n be004 │ │ + b.n be014 │ │ movs r0, #1 │ │ - b.n be5de │ │ + b.n be5ee │ │ adds r0, #0 │ │ - b.n be606 │ │ + b.n be616 │ │ str r0, [r6, #0] │ │ - b.n bdbc8 │ │ + b.n bdbd8 │ │ asrs r4, r0, #32 │ │ - b.n bdbd4 │ │ + b.n bdbe4 │ │ movs r2, r0 │ │ - b.n be0f6 │ │ + b.n be106 │ │ movs r0, #0 │ │ - b.n be7fa │ │ + b.n be80a │ │ asrs r3, r0, #32 │ │ - b.n be100 │ │ + b.n be110 │ │ movs r1, r0 │ │ - b.n be3e2 │ │ + b.n be3f2 │ │ mrc2 10, 7, r1, cr3, cr15, {7} @ │ │ ands r4, r5 │ │ - b.n bdbe4 │ │ + b.n bdbf4 │ │ strb r4, [r1, #0] │ │ - b.n be40e │ │ + b.n be41e │ │ ands r0, r6 │ │ - b.n bdc0c │ │ + b.n bdc1c │ │ adds r0, #14 │ │ - b.n be416 │ │ + b.n be426 │ │ stmia r0!, {r2, r5} │ │ - b.n bdbf4 │ │ + b.n bdc04 │ │ asrs r0, r0, #32 │ │ - b.n be5a6 │ │ + b.n be5b6 │ │ asrs r0, r4, #32 │ │ - b.n bdaf8 │ │ - add r1, pc, #528 @ (adr r1, be2f4 ) │ │ - b.n be1f0 │ │ + b.n bdb08 │ │ + add r1, pc, #528 @ (adr r1, be304 ) │ │ + b.n be200 │ │ asrs r4, r0, #6 │ │ - b.n be42a │ │ + b.n be43a │ │ movs r0, r2 │ │ - b.n be582 │ │ + b.n be592 │ │ str r0, [sp, #4] │ │ - b.n be5fa │ │ + b.n be60a │ │ asrs r0, r4, #32 │ │ - b.n bdc10 │ │ + b.n bdc20 │ │ asrs r0, r0, #32 │ │ - b.n be83a │ │ - b.n be14c │ │ - b.n bdc18 │ │ - b.n be140 │ │ - b.n bdb38 │ │ + b.n be84a │ │ + b.n be15c │ │ + b.n bdc28 │ │ + b.n be150 │ │ + b.n bdb48 │ │ stmia r0!, {r2} │ │ - b.n be446 │ │ + b.n be456 │ │ str r1, [r0, #0] │ │ - b.n be44a │ │ + b.n be45a │ │ strh r0, [r0, #0] │ │ - b.n be44e │ │ + b.n be45e │ │ str r2, [r1, r0] │ │ - b.n be452 │ │ + b.n be462 │ │ movs r0, #9 │ │ - b.n be456 │ │ + b.n be466 │ │ movs r0, r0 │ │ - b.n be7c2 │ │ + b.n be7d2 │ │ adds r0, #36 @ 0x24 │ │ - b.n bdb34 │ │ + b.n bdb44 │ │ strb r0, [r5, #0] │ │ - b.n bdb38 │ │ + b.n bdb48 │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ movs r4, r6 │ │ - b.n bdc64 │ │ + b.n bdc74 │ │ ands r1, r0 │ │ - b.n be5c6 │ │ + b.n be5d6 │ │ asrs r4, r4, #32 │ │ - b.n bdb68 │ │ + b.n bdb78 │ │ str r0, [sp, #4] │ │ - b.n be5ba │ │ - add r0, pc, #32 @ (adr r0, be158 ) │ │ - b.n be5c4 │ │ + b.n be5ca │ │ + add r0, pc, #32 @ (adr r0, be168 ) │ │ + b.n be5d4 │ │ strb r4, [r0, #6] │ │ - b.n be09e │ │ + b.n be0ae │ │ adds r0, #4 │ │ - b.n bdc62 │ │ + b.n bdc72 │ │ movs r0, r5 │ │ - b.n bdb7c │ │ + b.n bdb8c │ │ movs r1, r0 │ │ - b.n be5ea │ │ + b.n be5fa │ │ asrs r0, r0, #32 │ │ - b.n be6d0 │ │ + b.n be6e0 │ │ movs r0, r0 │ │ - b.n be1a0 │ │ + b.n be1b0 │ │ asrs r1, r0, #32 │ │ - b.n be19c │ │ + b.n be1ac │ │ movs r1, r0 │ │ - b.n be47a │ │ + b.n be48a │ │ asrs r1, r0, #32 │ │ - b.n be66a │ │ + b.n be67a │ │ movs r1, r0 │ │ - b.n be67e │ │ + b.n be68e │ │ movs r0, r4 │ │ - b.n bdb7c │ │ + b.n bdb8c │ │ movs r0, r1 │ │ - b.n be5fa │ │ + b.n be60a │ │ @ instruction: 0xffe30aff │ │ adds r0, #48 @ 0x30 │ │ - b.n bdcac │ │ - add r0, pc, #24 @ (adr r0, be18c ) │ │ - b.n be4b6 │ │ - b.n be1a0 │ │ - b.n bdc94 │ │ - b.n be17e │ │ - b.n be684 │ │ + b.n bdcbc │ │ + add r0, pc, #24 @ (adr r0, be19c ) │ │ + b.n be4c6 │ │ + b.n be1b0 │ │ + b.n bdca4 │ │ + b.n be18e │ │ + b.n be694 │ │ ands r4, r5 │ │ - b.n bdcbc │ │ + b.n bdccc │ │ str r0, [r3, r0] │ │ - b.n bdca0 │ │ + b.n bdcb0 │ │ movs r6, r1 │ │ - b.n be432 │ │ + b.n be442 │ │ str r6, [r1, r0] │ │ - b.n be4ce │ │ + b.n be4de │ │ str r4, [r0, r0] │ │ strh r0, [r4, #12] │ │ movs r1, r0 │ │ - b.n be620 │ │ + b.n be630 │ │ movs r0, r4 │ │ - b.n bdbb0 │ │ + b.n bdbc0 │ │ movs r0, r4 │ │ - b.n bdcd8 │ │ + b.n bdce8 │ │ str r0, [r5, #0] │ │ - b.n bdcdc │ │ + b.n bdcec │ │ str r0, [sp, #144] @ 0x90 │ │ - b.n bdce0 │ │ + b.n bdcf0 │ │ movs r0, r1 │ │ - b.n be6aa │ │ + b.n be6ba │ │ strb r4, [r6, #0] │ │ - b.n bdce8 │ │ + b.n bdcf8 │ │ movs r0, #16 │ │ - b.n bdccc │ │ + b.n bdcdc │ │ str r0, [sp, #4] │ │ - b.n be6e8 │ │ + b.n be6f8 │ │ adds r0, #1 │ │ - b.n be6c0 │ │ + b.n be6d0 │ │ str r0, [r0, #0] │ │ - b.n be70a │ │ + b.n be71a │ │ movs r4, r0 │ │ - b.n be468 │ │ + b.n be478 │ │ lsls r3, r1, #3 │ │ cmp r2, #0 │ │ asrs r7, r0, #32 │ │ - b.n be50a │ │ + b.n be51a │ │ movs r0, #0 │ │ - b.n be130 │ │ + b.n be140 │ │ movs r0, r1 │ │ - b.n be6d2 │ │ + b.n be6e2 │ │ asrs r4, r0, #32 │ │ - b.n bdcf8 │ │ + b.n bdd08 │ │ movs r0, #9 │ │ - b.n be21e │ │ + b.n be22e │ │ asrs r6, r0, #32 │ │ - b.n be220 │ │ + b.n be230 │ │ asrs r1, r0, #32 │ │ - b.n be506 │ │ + b.n be516 │ │ @ instruction: 0xfff20aff │ │ movs r1, r0 │ │ - b.n be670 │ │ + b.n be680 │ │ movs r0, r4 │ │ - b.n bdc04 │ │ + b.n bdc14 │ │ lsls r1, r0, #3 │ │ and.w r0, r0, r0, lsl #12 │ │ - b.n be936 │ │ + b.n be946 │ │ movs r2, r0 │ │ - b.n be8a2 │ │ + b.n be8b2 │ │ movs r4, r0 │ │ subs r2, #0 │ │ lsls r0, r2, #3 │ │ - b.n be586 │ │ + b.n be596 │ │ adds r0, #0 │ │ - b.n be946 │ │ + b.n be956 │ │ movs r4, r1 │ │ - b.n be2aa │ │ + b.n be2ba │ │ movs r6, r1 │ │ - b.n be3b0 │ │ + b.n be3c0 │ │ adds r0, #1 │ │ adds r3, #0 │ │ movs r0, r4 │ │ - b.n bdc4c │ │ + b.n bdc5c │ │ strb r4, [r1, #0] │ │ - b.n be55a │ │ + b.n be56a │ │ adds r0, #48 @ 0x30 │ │ - b.n bdd38 │ │ + b.n bdd48 │ │ adds r1, #131 @ 0x83 │ │ - b.n be326 │ │ + b.n be336 │ │ lsls r2, r1, #6 │ │ - b.n be326 │ │ + b.n be336 │ │ ands r0, r1 │ │ - b.n be6b0 │ │ + b.n be6c0 │ │ movs r4, r4 │ │ - b.n bdc44 │ │ + b.n bdc54 │ │ movs r0, r0 │ │ - b.n be972 │ │ - add r0, pc, #208 @ (adr r0, be304 ) │ │ - b.n bdd50 │ │ + b.n be982 │ │ + add r0, pc, #208 @ (adr r0, be314 ) │ │ + b.n bdd60 │ │ asrs r0, r4, #32 │ │ - b.n bdc70 │ │ + b.n bdc80 │ │ str r0, [r0, r0] │ │ - b.n be344 │ │ + b.n be354 │ │ str r0, [sp, #56] @ 0x38 │ │ - b.n be582 │ │ + b.n be592 │ │ movs r1, r0 │ │ - b.n be4f0 │ │ + b.n be500 │ │ movs r7, r1 │ │ ldr r2, [sp, #0] │ │ asrs r4, r0, #32 │ │ - b.n be58e │ │ - b.n be252 │ │ - b.n be700 │ │ + b.n be59e │ │ + b.n be262 │ │ + b.n be710 │ │ str r0, [r0, #0] │ │ - b.n be1b8 │ │ - add r0, pc, #0 @ (adr r0, be258 ) │ │ - b.n be7ec │ │ + b.n be1c8 │ │ + add r0, pc, #0 @ (adr r0, be268 ) │ │ + b.n be7fc │ │ stmia r0!, {r2} │ │ - b.n bdd80 │ │ + b.n bdd90 │ │ asrs r6, r1, #32 │ │ - b.n be30e │ │ + b.n be31e │ │ asrs r2, r1, #32 │ │ - b.n be41e │ │ + b.n be42e │ │ movs r7, r0 │ │ subs r2, #0 │ │ asrs r6, r1, #32 │ │ - b.n be2ba │ │ + b.n be2ca │ │ str r2, [r1, r0] │ │ - b.n be2ca │ │ + b.n be2da │ │ movs r0, r1 │ │ - b.n be6f6 │ │ + b.n be706 │ │ asrs r5, r0, #32 │ │ - b.n be59c │ │ + b.n be5ac │ │ strb r6, [r0, #0] │ │ - b.n be5be │ │ - b.n be298 │ │ - b.n be5c2 │ │ + b.n be5ce │ │ + b.n be2a8 │ │ + b.n be5d2 │ │ @ instruction: 0xffeb0aff │ │ mcr2 10, 5, lr, cr13, cr15, {7} @ │ │ asrs r4, r4, #32 │ │ - b.n bdcc4 │ │ + b.n bdcd4 │ │ ands r3, r0 │ │ - b.n be5d2 │ │ - b.n be2a6 │ │ - b.n be5d6 │ │ + b.n be5e2 │ │ + b.n be2b6 │ │ + b.n be5e6 │ │ stmia r0!, {r0, r1, r2} │ │ - b.n be5da │ │ + b.n be5ea │ │ movs r1, r0 │ │ - b.n be544 │ │ + b.n be554 │ │ adds r0, #44 @ 0x2c │ │ - b.n bddbc │ │ + b.n bddcc │ │ movs r0, r2 │ │ cmp r2, #0 │ │ - add r0, pc, #160 @ (adr r0, be348 ) │ │ - b.n bdce0 │ │ + add r0, pc, #160 @ (adr r0, be358 ) │ │ + b.n bdcf0 │ │ str r0, [r0, #0] │ │ - b.n bddd6 │ │ + b.n bdde6 │ │ asrs r4, r0, #32 │ │ - b.n bddda │ │ + b.n bddea │ │ adds r0, #6 │ │ - b.n be366 │ │ + b.n be376 │ │ adds r0, #1 │ │ - b.n be46e │ │ + b.n be47e │ │ movs r3, r1 │ │ subs r2, #0 │ │ adds r0, #8 │ │ - b.n be30e │ │ + b.n be31e │ │ asrs r2, r1, #32 │ │ - b.n be308 │ │ + b.n be318 │ │ asrs r1, r0, #32 │ │ - b.n be5f0 │ │ + b.n be600 │ │ mrc2 10, 4, r1, cr12, cr15, {7} @ │ │ strh r1, [r0, #0] │ │ - b.n be802 │ │ + b.n be812 │ │ asrs r4, r4, #32 │ │ - b.n bdd0c │ │ - add r0, pc, #0 @ (adr r0, be2d8 ) │ │ - b.n be82e │ │ + b.n bdd1c │ │ + add r0, pc, #0 @ (adr r0, be2e8 ) │ │ + b.n be83e │ │ ands r0, r1 │ │ - b.n be7e6 │ │ + b.n be7f6 │ │ movs r1, r0 │ │ - b.n be58a │ │ + b.n be59a │ │ @ instruction: 0xfff03aff │ │ movs r0, r0 │ │ @ instruction: 0xea00a028 │ │ - b.n bdd24 │ │ + b.n bdd34 │ │ movs r4, r0 │ │ - b.n be59c │ │ - add r0, pc, #160 @ (adr r0, be394 ) │ │ - b.n bdd0c │ │ + b.n be5ac │ │ + add r0, pc, #160 @ (adr r0, be3a4 ) │ │ + b.n bdd1c │ │ movs r7, r3 │ │ cmp r2, #0 │ │ asrs r0, r6, #32 │ │ - b.n bde38 │ │ + b.n bde48 │ │ adds r0, #52 @ 0x34 │ │ - b.n bde3c │ │ - add r0, pc, #144 @ (adr r0, be394 ) │ │ - b.n bdd3c │ │ + b.n bde4c │ │ + add r0, pc, #144 @ (adr r0, be3a4 ) │ │ + b.n bdd4c │ │ asrs r1, r0, #6 │ │ - b.n be40e │ │ + b.n be41e │ │ str r0, [r6, #0] │ │ - b.n bdd44 │ │ + b.n bdd54 │ │ movs r0, #1 │ │ - b.n be39a │ │ + b.n be3aa │ │ movs r2, r1 │ │ - b.n be5be │ │ + b.n be5ce │ │ movs r0, #0 │ │ - b.n be39e │ │ + b.n be3ae │ │ movs r1, #194 @ 0xc2 │ │ - b.n be3a4 │ │ + b.n be3b4 │ │ adds r0, #44 @ 0x2c │ │ - b.n bdd58 │ │ + b.n bdd68 │ │ movs r0, #16 │ │ - b.n bde2c │ │ + b.n bde3c │ │ lsls r0, r5, #3 │ │ cmp r2, #0 │ │ movs r0, #8 │ │ - b.n be836 │ │ + b.n be846 │ │ adds r0, #4 │ │ - b.n be6f2 │ │ + b.n be702 │ │ movs r2, r0 │ │ - b.n be5ea │ │ + b.n be5fa │ │ movs r0, #10 │ │ strh r0, [r4, #12] │ │ movs r0, #3 │ │ - b.n be442 │ │ + b.n be452 │ │ lsls r0, r1, #1 │ │ - b.n be9e6 │ │ + b.n be9f6 │ │ movs r3, r0 │ │ subs r2, #0 │ │ asrs r4, r0, #32 │ │ - b.n be3cc │ │ + b.n be3dc │ │ asrs r0, r0, #32 │ │ - b.n be450 │ │ + b.n be460 │ │ movs r0, r2 │ │ - b.n be9f4 │ │ + b.n bea04 │ │ lsls r0, r1, #3 │ │ cmp r2, #0 │ │ movs r4, r0 │ │ - b.n be69a │ │ + b.n be6aa │ │ str r0, [sp, #176] @ 0xb0 │ │ - b.n bdd94 │ │ + b.n bdda4 │ │ movs r0, #208 @ 0xd0 │ │ - b.n be6e2 │ │ + b.n be6f2 │ │ movs r0, r1 │ │ - b.n be866 │ │ + b.n be876 │ │ movs r0, #240 @ 0xf0 │ │ - b.n be6f4 │ │ + b.n be704 │ │ str r0, [r1, r0] │ │ - b.n be878 │ │ + b.n be888 │ │ movs r2, r1 │ │ - b.n be612 │ │ + b.n be622 │ │ @ instruction: 0xfff93aff │ │ lsls r5, r2, #3 │ │ @ instruction: 0xea00902c │ │ - b.n bddb4 │ │ + b.n bddc4 │ │ str r0, [r6, #0] │ │ - b.n bddb8 │ │ + b.n bddc8 │ │ lsls r2, r2, #3 │ │ and.w r0, r0, r0, lsl #28 │ │ - b.n beaca │ │ + b.n beada │ │ movs r2, r0 │ │ - b.n bea32 │ │ + b.n bea42 │ │ movs r4, r0 │ │ subs r2, #0 │ │ movs r1, r1 │ │ ldmia.w r5, {ip, sp, lr} │ │ - b.n beada │ │ + b.n beaea │ │ movs r0, r1 │ │ - b.n be43e │ │ + b.n be44e │ │ movs r6, r1 │ │ - b.n be548 │ │ + b.n be558 │ │ strb r1, [r0, #0] │ │ adds r3, #0 │ │ movs r4, r6 │ │ - b.n bdee4 │ │ + b.n bdef4 │ │ movs r0, #32 │ │ - b.n bdde4 │ │ + b.n bddf4 │ │ strb r4, [r5, #0] │ │ - b.n bdecc │ │ + b.n bdedc │ │ lsls r0, r0, #6 │ │ - b.n be4ba │ │ + b.n be4ca │ │ movs r4, r4 │ │ - b.n bddd0 │ │ + b.n bdde0 │ │ lsls r7, r0, #6 │ │ - b.n be4c8 │ │ + b.n be4d8 │ │ strb r0, [r0, #0] │ │ - b.n beb02 │ │ + b.n beb12 │ │ strh r0, [r1, #0] │ │ - b.n be846 │ │ + b.n be856 │ │ stmia r0!, {} │ │ - b.n be70a │ │ + b.n be71a │ │ str r7, [r0, #0] │ │ - b.n be4ce │ │ + b.n be4de │ │ movs r0, r4 │ │ - b.n bde08 │ │ + b.n bde18 │ │ movs r0, r0 │ │ - b.n be682 │ │ + b.n be692 │ │ movs r0, r2 │ │ ldr r2, [sp, #0] │ │ adds r0, #8 │ │ - b.n be71e │ │ + b.n be72e │ │ str r0, [sp, #4] │ │ - b.n be884 │ │ + b.n be894 │ │ movs r0, #7 │ │ - b.n be34c │ │ + b.n be35c │ │ ands r0, r0 │ │ - b.n be97e │ │ + b.n be98e │ │ adds r0, #4 │ │ - b.n bdf14 │ │ - b.n be402 │ │ - b.n be496 │ │ + b.n bdf24 │ │ + b.n be412 │ │ + b.n be4a6 │ │ movs r4, r0 │ │ - b.n be59c │ │ + b.n be5ac │ │ movs r0, r1 │ │ subs r2, #0 │ │ movs r1, r1 │ │ - b.n be442 │ │ + b.n be452 │ │ asrs r4, r0, #32 │ │ - b.n be448 │ │ + b.n be458 │ │ movs r1, r0 │ │ - b.n be726 │ │ + b.n be736 │ │ strb r0, [r1, #0] │ │ - b.n be898 │ │ + b.n be8a8 │ │ asrs r2, r0, #32 │ │ - b.n be74e │ │ - add r0, pc, #12 @ (adr r0, be41c ) │ │ - b.n be752 │ │ + b.n be75e │ │ + add r0, pc, #12 @ (adr r0, be42c ) │ │ + b.n be762 │ │ movs r4, r1 │ │ - b.n be756 │ │ + b.n be766 │ │ @ instruction: 0xffea0aff │ │ mcr2 10, 2, lr, cr8, cr15, {7} @ │ │ movs r4, r4 │ │ - b.n bde58 │ │ - b.n be426 │ │ - b.n be766 │ │ + b.n bde68 │ │ + b.n be436 │ │ + b.n be776 │ │ asrs r4, r1, #32 │ │ - b.n be76a │ │ + b.n be77a │ │ movs r0, r0 │ │ - b.n be6e6 │ │ + b.n be6f6 │ │ movs r4, r1 │ │ - b.n be772 │ │ + b.n be782 │ │ movs r3, r2 │ │ cmp r2, #0 │ │ str r0, [sp, #176] @ 0xb0 │ │ - b.n bde70 │ │ + b.n bde80 │ │ ands r0, r6 │ │ - b.n bdf78 │ │ + b.n bdf88 │ │ strh r0, [r5, #0] │ │ - b.n bde78 │ │ + b.n bde88 │ │ movs r0, #208 @ 0xd0 │ │ - b.n be7c6 │ │ + b.n be7d6 │ │ asrs r4, r0, #32 │ │ - b.n be78a │ │ + b.n be79a │ │ ands r2, r0 │ │ - b.n be4f6 │ │ + b.n be506 │ │ ands r3, r0 │ │ - b.n be602 │ │ + b.n be612 │ │ lsls r7, r2, #1 │ │ subs r2, #0 │ │ movs r0, #1 │ │ - b.n be49e │ │ + b.n be4ae │ │ adds r0, #8 │ │ - b.n be4a4 │ │ + b.n be4b4 │ │ movs r0, #3 │ │ - b.n be786 │ │ + b.n be796 │ │ mrc2 10, 1, r1, cr6, cr15, {7} @ │ │ ands r1, r0 │ │ - b.n be7aa │ │ + b.n be7ba │ │ movs r0, r1 │ │ - b.n be96e │ │ + b.n be97e │ │ ands r1, r0 │ │ - b.n be994 │ │ + b.n be9a4 │ │ asrs r4, r4, #32 │ │ - b.n bdeac │ │ + b.n bdebc │ │ strh r0, [r0, #0] │ │ - b.n be9ca │ │ + b.n be9da │ │ movs r1, r0 │ │ - b.n be71e │ │ + b.n be72e │ │ @ instruction: 0xffef3aff │ │ lsls r4, r1, #1 │ │ @ instruction: 0xea00902c │ │ - b.n bdec0 │ │ + b.n bded0 │ │ ands r0, r6 │ │ - b.n bdfc8 │ │ + b.n bdfd8 │ │ strh r0, [r5, #0] │ │ - b.n bdec8 │ │ + b.n bded8 │ │ lsls r0, r1, #1 │ │ and.w r0, r0, r1 │ │ - b.n bebda │ │ + b.n bebea │ │ stmia r1!, {r1, r2, r5, r7} │ │ - b.n be59e │ │ + b.n be5ae │ │ movs r4, r4 │ │ - b.n bded8 │ │ + b.n bdee8 │ │ str r1, [r0, #0] │ │ - b.n bec3e │ │ - add r0, pc, #208 @ (adr r0, be578 ) │ │ - b.n bdfc4 │ │ - add r0, pc, #28 @ (adr r0, be4c8 ) │ │ - b.n be5ae │ │ + b.n bec4e │ │ + add r0, pc, #208 @ (adr r0, be588 ) │ │ + b.n bdfd4 │ │ + add r0, pc, #28 @ (adr r0, be4d8 ) │ │ + b.n be5be │ │ asrs r6, r0, #6 │ │ - b.n be5b6 │ │ + b.n be5c6 │ │ sbcs r6, r0 │ │ - b.n be5ca │ │ + b.n be5da │ │ strb r0, [r0, #0] │ │ - b.n bebfa │ │ + b.n bec0a │ │ str r6, [r0, r0] │ │ - b.n be7fe │ │ + b.n be80e │ │ movs r7, r0 │ │ - b.n be5c6 │ │ + b.n be5d6 │ │ str r2, [r0, r0] │ │ - b.n be970 │ │ + b.n be980 │ │ lsrs r7, r1, #11 │ │ orn r0, r0, #8847360 @ 0x870000 │ │ - b.n be5e2 │ │ + b.n be5f2 │ │ strb r0, [r2, #0] │ │ - b.n be9e0 │ │ + b.n be9f0 │ │ lsrs r7, r1, #11 │ │ - bl ffcff4c6 │ │ + bl ffcff4d6 │ │ subs r7, r7, r3 │ │ - add r0, pc, #208 @ (adr r0, be5ac ) │ │ - b.n be018 │ │ + add r0, pc, #208 @ (adr r0, be5bc ) │ │ + b.n be028 │ │ movs r6, r0 │ │ - b.n be79a │ │ + b.n be7aa │ │ stmia r0!, {r0, r3} │ │ - b.n be826 │ │ + b.n be836 │ │ str r0, [r1, #0] │ │ - b.n be82a │ │ + b.n be83a │ │ mcr2 10, 2, r1, cr15, cr15, {7} @ │ │ str r0, [sp, #176] @ 0xb0 │ │ - b.n bdf28 │ │ + b.n bdf38 │ │ mrc2 10, 2, lr, cr8, cr15, {7} @ │ │ adds r0, #5 │ │ - b.n be83a │ │ + b.n be84a │ │ asrs r4, r1, #32 │ │ - b.n be584 │ │ + b.n be594 │ │ movs r0, #0 │ │ - b.n bec42 │ │ + b.n bec52 │ │ movs r4, r0 │ │ - b.n beba8 │ │ + b.n bebb8 │ │ stc2l 10, cr3, [r2, #1020]! @ 0x3fc @ │ │ movs r4, r5 │ │ - b.n bdf44 │ │ - b.n be510 │ │ - b.n be02c │ │ + b.n bdf54 │ │ + b.n be520 │ │ + b.n be03c │ │ asrs r0, r1, #32 │ │ - b.n be030 │ │ + b.n be040 │ │ str r0, [r0, r0] │ │ - b.n be03a │ │ + b.n be04a │ │ movs r0, r6 │ │ - b.n bdf54 │ │ + b.n bdf64 │ │ str r4, [r3, r0] │ │ - b.n be03c │ │ + b.n be04c │ │ movs r0, r0 │ │ - b.n be046 │ │ + b.n be056 │ │ movs r4, r0 │ │ - b.n be044 │ │ + b.n be054 │ │ movs r5, r0 │ │ - b.n be5ae │ │ + b.n be5be │ │ movs r0, r0 │ │ - b.n be7d4 │ │ + b.n be7e4 │ │ ldc2l 10, cr9, [r7, #1020] @ 0x3fc @ │ │ movs r4, r1 │ │ - b.n be054 │ │ + b.n be064 │ │ asrs r4, r0, #32 │ │ - b.n be87e │ │ + b.n be88e │ │ movs r4, r5 │ │ - b.n bdf78 │ │ + b.n bdf88 │ │ str r7, [r0, r0] │ │ - b.n be886 │ │ + b.n be896 │ │ str r0, [sp, #144] @ 0x90 │ │ - b.n be064 │ │ + b.n be074 │ │ str r0, [sp, #16] │ │ - b.n bed0e │ │ + b.n bed1e │ │ str r0, [r5, #0] │ │ - b.n be06c │ │ - b.n be55c │ │ - b.n be076 │ │ + b.n be07c │ │ + b.n be56c │ │ + b.n be086 │ │ movs r4, r3 │ │ - b.n be094 │ │ + b.n be0a4 │ │ movs r1, #1 │ │ - b.n be570 │ │ + b.n be580 │ │ ands r5, r0 │ │ - b.n be8a2 │ │ + b.n be8b2 │ │ movs r0, #2 │ │ - b.n be4ce │ │ + b.n be4de │ │ str r4, [r0, #0] │ │ - b.n be092 │ │ + b.n be0a2 │ │ movs r0, #0 │ │ - b.n be612 │ │ + b.n be622 │ │ movs r0, #14 │ │ - b.n be71e │ │ + b.n be72e │ │ movs r0, #1 │ │ - b.n bea78 │ │ + b.n bea88 │ │ str r4, [r0, r0] │ │ adds r1, #160 @ 0xa0 │ │ movs r5, r0 │ │ - b.n bec22 │ │ + b.n bec32 │ │ asrs r2, r4, #2 │ │ - b.n be8c2 │ │ + b.n be8d2 │ │ @ instruction: 0xfff48aff │ │ movs r4, r0 │ │ - b.n bec2e │ │ + b.n bec3e │ │ lsls r0, r3, #1 │ │ subs r2, #0 │ │ lsls r0, r2, #3 │ │ - b.n be91c │ │ + b.n be92c │ │ movs r0, #0 │ │ - b.n becd6 │ │ + b.n bece6 │ │ ands r4, r3 │ │ - b.n be0d4 │ │ + b.n be0e4 │ │ str r4, [r1, #0] │ │ - b.n be8de │ │ + b.n be8ee │ │ movs r4, r0 │ │ - b.n be642 │ │ + b.n be652 │ │ ands r4, r5 │ │ - b.n be0e0 │ │ + b.n be0f0 │ │ movs r6, r1 │ │ - b.n be74c │ │ + b.n be75c │ │ movs r0, #1 │ │ adds r3, #0 │ │ str r2, [r0, r6] │ │ - b.n be6bc │ │ + b.n be6cc │ │ lsls r3, r2, #1 │ │ and.w r0, r0, r1, lsl #16 │ │ - b.n be8fa │ │ + b.n be90a │ │ movs r0, r0 │ │ - b.n be86a │ │ + b.n be87a │ │ movs r2, r4 │ │ cmp r2, #0 │ │ asrs r4, r5, #32 │ │ - b.n be100 │ │ + b.n be110 │ │ strh r0, [r5, #0] │ │ - b.n bdfe0 │ │ + b.n bdff0 │ │ strh r1, [r0, #12] │ │ - b.n be6d8 │ │ + b.n be6e8 │ │ asrs r4, r6, #32 │ │ - b.n be10c │ │ + b.n be11c │ │ movs r0, #8 │ │ - b.n be656 │ │ + b.n be666 │ │ movs r0, #7 │ │ - b.n be65e │ │ + b.n be66e │ │ movs r1, #194 @ 0xc2 │ │ - b.n be660 │ │ + b.n be670 │ │ movs r0, #16 │ │ - b.n be0f4 │ │ + b.n be104 │ │ movs r0, #36 @ 0x24 │ │ - b.n be01c │ │ + b.n be02c │ │ asrs r6, r1, #32 │ │ - b.n be92a │ │ + b.n be93a │ │ movs r2, r0 │ │ - b.n be88e │ │ + b.n be89e │ │ movs r1, r3 │ │ cmp r2, #0 │ │ str r0, [r1, r0] │ │ - b.n beaf6 │ │ + b.n beb06 │ │ adds r0, #0 │ │ - b.n be9ba │ │ + b.n be9ca │ │ movs r5, r0 │ │ - b.n be8a2 │ │ + b.n be8b2 │ │ ands r0, r6 │ │ - b.n be11c │ │ + b.n be12c │ │ str r2, [r0, r0] │ │ strh r0, [r4, #12] │ │ - b.n be60e │ │ - b.n be714 │ │ + b.n be61e │ │ + b.n be724 │ │ lsls r0, r1, #1 │ │ - b.n becca │ │ + b.n becda │ │ movs r3, r0 │ │ subs r2, #0 │ │ adds r0, #0 │ │ - b.n be6a6 │ │ + b.n be6b6 │ │ adds r0, #7 │ │ - b.n be720 │ │ + b.n be730 │ │ movs r0, r2 │ │ - b.n becc4 │ │ + b.n becd4 │ │ lsls r1, r0, #2 │ │ cmp r2, #0 │ │ ands r0, r0 │ │ - b.n be966 │ │ + b.n be976 │ │ strh r0, [r5, #0] │ │ - b.n be060 │ │ + b.n be070 │ │ movs r1, r1 │ │ ldmia.w r4, {r3, lr} │ │ - b.n beb3a │ │ + b.n beb4a │ │ movs r2, r0 │ │ - b.n be8de │ │ + b.n be8ee │ │ movs r1, r1 │ │ stmia.w r6, {r3, sp, lr} │ │ - b.n beb4a │ │ + b.n beb5a │ │ @ instruction: 0xfff93aff │ │ str r0, [r6, #0] │ │ - b.n be07c │ │ + b.n be08c │ │ ands r0, r6 │ │ - b.n be184 │ │ + b.n be194 │ │ movs r4, r0 │ │ and.w r0, r0, r0, ror #24 │ │ - b.n be088 │ │ + b.n be098 │ │ asrs r6, r1, #32 │ │ - b.n be996 │ │ + b.n be9a6 │ │ movs r1, r0 │ │ and.w r0, r0, r0, ror #24 │ │ - b.n be094 │ │ + b.n be0a4 │ │ strh r0, [r5, #0] │ │ - b.n be098 │ │ + b.n be0a8 │ │ lsls r0, r2, #4 │ │ stmia.w r6, {r1, sl} │ │ stmia.w r9, {sp} │ │ - b.n bedae │ │ + b.n bedbe │ │ movs r2, r0 │ │ - b.n be9b2 │ │ - beq.n be6ac │ │ - b.n beb0c │ │ + b.n be9c2 │ │ + beq.n be6bc │ │ + b.n beb1c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, ip} │ │ - b.n bedbe │ │ + b.n bedce │ │ stmia r1!, {r1, r5, r7} │ │ - b.n be784 │ │ + b.n be794 │ │ asrs r4, r5, #32 │ │ - b.n be1c0 │ │ - b.n be68a │ │ - b.n bee22 │ │ + b.n be1d0 │ │ + b.n be69a │ │ + b.n bee32 │ │ movs r0, #0 │ │ - b.n be790 │ │ + b.n be7a0 │ │ lsls r6, r1, #6 │ │ - b.n be79a │ │ + b.n be7aa │ │ str r6, [r1, r6] │ │ - b.n be79a │ │ + b.n be7aa │ │ asrs r0, r0, #32 │ │ - b.n bedda │ │ + b.n bedea │ │ adds r0, #14 │ │ - b.n be9de │ │ + b.n be9ee │ │ str r1, [r0, #0] │ │ - b.n be7aa │ │ + b.n be7ba │ │ adds r0, #2 │ │ - b.n beb4c │ │ + b.n beb5c │ │ lsrs r7, r1, #11 │ │ orn r0, r6, #2064 @ 0x810 │ │ - b.n be7b2 │ │ + b.n be7c2 │ │ asrs r0, r2, #32 │ │ - b.n bebb4 │ │ + b.n bebc4 │ │ lsrs r7, r1, #11 │ │ - bl ffd056a6 │ │ + bl ffd056b6 │ │ subs r7, r7, r3 │ │ str r0, [r6, #0] │ │ - b.n be0f4 │ │ + b.n be104 │ │ movs r6, r1 │ │ - b.n be97a │ │ - b.n be6d6 │ │ - b.n bea06 │ │ + b.n be98a │ │ + b.n be6e6 │ │ + b.n bea16 │ │ stmia r0!, {r0, r1, r2} │ │ - b.n bea0a │ │ + b.n bea1a │ │ vpmin.u32 , q9, │ │ str r0, [sp, #176] @ 0xb0 │ │ - b.n be108 │ │ + b.n be118 │ │ adds r0, #40 @ 0x28 │ │ - b.n be10c │ │ + b.n be11c │ │ strh r0, [r0, #0] │ │ - b.n be1e6 │ │ + b.n be1f6 │ │ adds r0, #4 │ │ - b.n be1ea │ │ + b.n be1fa │ │ str r0, [r0, r0] │ │ stmia.w r9, {sp} │ │ - b.n bee26 │ │ + b.n bee36 │ │ movs r2, r0 │ │ - b.n bea2a │ │ - beq.n be724 │ │ - b.n beb84 │ │ + b.n bea3a │ │ + beq.n be734 │ │ + b.n beb94 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, r5, lr} │ │ - b.n be230 │ │ + b.n be240 │ │ movs r0, r0 │ │ - b.n bee3a │ │ + b.n bee4a │ │ movs r2, r0 │ │ - b.n beda2 │ │ + b.n bedb2 │ │ str r4, [r1, #0] │ │ - b.n bea42 │ │ + b.n bea52 │ │ movs r5, r0 │ │ subs r2, #0 │ │ lsls r4, r0, #8 │ │ ldmia.w r5, {} │ │ - b.n bee4e │ │ + b.n bee5e │ │ asrs r4, r3, #32 │ │ - b.n be24c │ │ + b.n be25c │ │ movs r0, #1 │ │ - b.n be7ba │ │ + b.n be7ca │ │ asrs r6, r1, #32 │ │ - b.n be8cc │ │ + b.n be8dc │ │ movs r1, r0 │ │ adds r3, #0 │ │ lsls r0, r0, #6 │ │ - b.n be82c │ │ + b.n be83c │ │ movs r0, #0 │ │ - b.n bee66 │ │ + b.n bee76 │ │ movs r7, r0 │ │ - b.n be7aa │ │ + b.n be7ba │ │ strb r4, [r1, #0] │ │ - b.n be268 │ │ + b.n be278 │ │ asrs r0, r0, #7 │ │ - b.n be7be │ │ + b.n be7ce │ │ lsls r0, r0, #7 │ │ - b.n be9e2 │ │ + b.n be9f2 │ │ asrs r2, r0, #32 │ │ adds r1, #160 @ 0xa0 │ │ movs r0, #32 │ │ - b.n be174 │ │ + b.n be184 │ │ movs r0, #2 │ │ - b.n beb02 │ │ + b.n beb12 │ │ movs r0, #2 │ │ - b.n be84e │ │ + b.n be85e │ │ movs r0, #7 │ │ - b.n be84e │ │ + b.n be85e │ │ asrs r1, r0, #32 │ │ - b.n be852 │ │ + b.n be862 │ │ movs r0, #48 @ 0x30 │ │ - b.n be28c │ │ + b.n be29c │ │ movs r0, #2 │ │ - b.n be7de │ │ + b.n be7ee │ │ movs r2, r0 │ │ - b.n be9fc │ │ + b.n bea0c │ │ movs r0, #0 │ │ - b.n bee9e │ │ + b.n beeae │ │ stc2l 10, cr2, [ip, #-1020] @ 0xfffffc04 @ │ │ str r0, [r0, r7] │ │ - b.n beaa6 │ │ + b.n beab6 │ │ movs r5, r0 │ │ - b.n bea22 │ │ + b.n bea32 │ │ lsls r7, r0, #2 │ │ ldr r2, [sp, #0] │ │ movs r0, #5 │ │ - b.n be80a │ │ + b.n be81a │ │ lsls r0, r0, #7 │ │ - b.n be80e │ │ + b.n be81e │ │ movs r0, r6 │ │ - b.n bee1e │ │ + b.n bee2e │ │ asrs r4, r1, #32 │ │ - b.n beabe │ │ + b.n beace │ │ movs r0, r4 │ │ - b.n be198 │ │ + b.n be1a8 │ │ movs r1, r2 │ │ subs r2, #0 │ │ asrs r0, r6, #32 │ │ - b.n be2c4 │ │ + b.n be2d4 │ │ movs r2, r1 │ │ - b.n beb4e │ │ + b.n beb5e │ │ strb r4, [r6, #0] │ │ - b.n be2cc │ │ + b.n be2dc │ │ movs r0, r0 │ │ - b.n be898 │ │ + b.n be8a8 │ │ asrs r0, r4, #32 │ │ - b.n be2d4 │ │ + b.n be2e4 │ │ movs r5, r0 │ │ - b.n be81e │ │ + b.n be82e │ │ asrs r2, r1, #6 │ │ - b.n be824 │ │ + b.n be834 │ │ asrs r7, r0, #32 │ │ - b.n be8a8 │ │ + b.n be8b8 │ │ strb r4, [r1, #0] │ │ - b.n be2e4 │ │ + b.n be2f4 │ │ asrs r0, r1, #32 │ │ - b.n bec30 │ │ + b.n bec40 │ │ strb r7, [r0, #6] │ │ - b.n be8b4 │ │ + b.n be8c4 │ │ str r0, [r0, #24] │ │ - b.n be844 │ │ + b.n be854 │ │ movs r7, r0 │ │ - b.n bea66 │ │ + b.n bea76 │ │ movs r3, r0 │ │ ldrh r0, [r0, #16] │ │ strb r0, [r0, #6] │ │ - b.n be844 │ │ + b.n be854 │ │ movs r1, r0 │ │ - b.n bea74 │ │ + b.n bea84 │ │ lsls r6, r3, #8 │ │ str r3, [sp, #448] @ 0x1c0 │ │ lsls r2, r3, #4 │ │ ldr r2, [sp, #0] │ │ movs r4, r0 │ │ - b.n be30c │ │ + b.n be31c │ │ asrs r4, r3, #32 │ │ - b.n be310 │ │ + b.n be320 │ │ lsls r0, r0, #6 │ │ - b.n beb1a │ │ + b.n beb2a │ │ lsls r1, r0, #6 │ │ - b.n be85e │ │ + b.n be86e │ │ asrs r4, r6, #32 │ │ - b.n be31c │ │ + b.n be32c │ │ asrs r4, r1, #6 │ │ - b.n be8e8 │ │ + b.n be8f8 │ │ asrs r0, r1, #32 │ │ - b.n bec6c │ │ + b.n bec7c │ │ lsls r4, r0, #2 │ │ ldmia.w r1, {r3, sp, lr} │ │ - b.n bec74 │ │ + b.n bec84 │ │ movs r0, #0 │ │ - b.n be738 │ │ + b.n be748 │ │ strb r4, [r0, #0] │ │ - b.n be2fc │ │ + b.n be30c │ │ asrs r4, r1, #32 │ │ - b.n beb3e │ │ + b.n beb4e │ │ asrs r1, r0, #32 │ │ - b.n bec9a │ │ + b.n becaa │ │ movs r5, r0 │ │ - b.n beaa8 │ │ + b.n beab8 │ │ stmia r0!, {r0} │ │ - b.n beb4a │ │ + b.n beb5a │ │ asrs r6, r0, #32 │ │ - b.n beb4e │ │ + b.n beb5e │ │ @ instruction: 0xfff58aff │ │ stmia r0!, {r0, r2} │ │ - b.n beb56 │ │ + b.n beb66 │ │ asrs r4, r1, #32 │ │ - b.n be354 │ │ + b.n be364 │ │ movs r0, r0 │ │ - b.n bef5e │ │ + b.n bef6e │ │ movs r0, r1 │ │ - b.n beec4 │ │ + b.n beed4 │ │ lsls r0, r3, #2 │ │ cmp r2, #0 │ │ lsls r5, r4, #2 │ │ and.w r0, r0, r1, lsl #12 │ │ - b.n bef6e │ │ + b.n bef7e │ │ movs r0, #7 │ │ - b.n be94a │ │ + b.n be95a │ │ adds r1, #174 @ 0xae │ │ - b.n be93c │ │ + b.n be94c │ │ strh r0, [r5, #0] │ │ - b.n be270 │ │ - b.n be83e │ │ - b.n befc4 │ │ + b.n be280 │ │ + b.n be84e │ │ + b.n befd4 │ │ strb r0, [r0, #0] │ │ - b.n bef82 │ │ + b.n bef92 │ │ stmia r0!, {r0, r1} │ │ - b.n beb86 │ │ + b.n beb96 │ │ str r6, [r1, #24] │ │ - b.n be94e │ │ + b.n be95e │ │ sbcs r6, r1 │ │ - b.n be94e │ │ + b.n be95e │ │ str r6, [r1, r0] │ │ - b.n beb92 │ │ + b.n beba2 │ │ adds r0, #7 │ │ - b.n be956 │ │ + b.n be966 │ │ str r2, [r0, r0] │ │ - b.n bed04 │ │ + b.n bed14 │ │ lsrs r7, r1, #11 │ │ orn r0, r3, #138240 @ 0x21c00 │ │ - b.n be966 │ │ + b.n be976 │ │ strb r0, [r2, #0] │ │ - b.n bed74 │ │ + b.n bed84 │ │ lsrs r7, r1, #11 │ │ - bl ffd0285a │ │ + bl ffd0286a │ │ subs r7, r7, r3 │ │ movs r0, #36 @ 0x24 │ │ - b.n be2a8 │ │ + b.n be2b8 │ │ movs r6, r1 │ │ - b.n beb2e │ │ + b.n beb3e │ │ vpmin.u32 , , │ │ vpmin.u q15, q8, │ │ movs r2, r0 │ │ - b.n befc2 │ │ + b.n befd2 │ │ asrs r4, r0, #2 │ │ - b.n be986 │ │ + b.n be996 │ │ movs r6, r7 │ │ - b.n bef2c │ │ + b.n bef3c │ │ movs r1, r1 │ │ - b.n bebce │ │ + b.n bebde │ │ asrs r6, r7, #32 │ │ str r3, [sp, #640] @ 0x280 │ │ lsls r7, r7, #15 │ │ - b.n bef78 │ │ + b.n bef88 │ │ asrs r7, r7, #14 │ │ movs r3, #224 @ 0xe0 │ │ movs r4, r0 │ │ - b.n beb40 │ │ + b.n beb50 │ │ asrs r2, r5, #32 │ │ str r2, [sp, #528] @ 0x210 │ │ strb r6, [r0, #0] │ │ - b.n bebe6 │ │ + b.n bebf6 │ │ str r6, [r1, r0] │ │ - b.n bebea │ │ + b.n bebfa │ │ str r4, [r1, #0] │ │ - b.n bebee │ │ + b.n bebfe │ │ lsls r0, r7, #12 │ │ add.w r0, r0, r0, lsl #8 │ │ - b.n bebf6 │ │ + b.n bec06 │ │ movs r0, r0 │ │ - b.n bef5a │ │ + b.n bef6a │ │ ldc2l 10, cr1, [r5], #1020 @ 0x3fc @ │ │ ands r0, r2 │ │ - b.n be3f4 │ │ + b.n be404 │ │ stmia r0!, {r1, r2} │ │ - b.n bec06 │ │ - b.n be8d2 │ │ - b.n bec0a │ │ + b.n bec16 │ │ + b.n be8e2 │ │ + b.n bec1a │ │ str r7, [r0, #0] │ │ - b.n bec0e │ │ + b.n bec1e │ │ asrs r0, r3, #32 │ │ - b.n be404 │ │ + b.n be414 │ │ movs r0, r0 │ │ - b.n bef7e │ │ + b.n bef8e │ │ ldc2 10, cr1, [fp, #1020] @ 0x3fc @ │ │ movs r1, r0 │ │ - b.n bf01e │ │ + b.n bf02e │ │ stmia r0!, {} │ │ - b.n be3e4 │ │ + b.n be3f4 │ │ movs r0, r2 │ │ - b.n be3f8 │ │ - b.n be8f0 │ │ - b.n be3ec │ │ + b.n be408 │ │ + b.n be900 │ │ + b.n be3fc │ │ movs r0, #0 │ │ - b.n bf02e │ │ + b.n bf03e │ │ movs r2, r0 │ │ - b.n bec32 │ │ - beq.n be92c │ │ - b.n bed8c │ │ + b.n bec42 │ │ + beq.n be93c │ │ + b.n bed9c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, ip, sp} │ │ - b.n bea06 │ │ + b.n bea16 │ │ str r1, [r0, r0] │ │ - b.n bee08 │ │ + b.n bee18 │ │ movs r4, r0 │ │ - b.n bebb0 │ │ + b.n bebc0 │ │ stc2 10, cr2, [sp, #-1020] @ 0xfffffc04 @ │ │ movs r3, r0 │ │ - b.n beff0 │ │ + b.n bf000 │ │ movs r0, r2 │ │ ldrh r0, [r0, #16] │ │ movs r0, #1 │ │ - b.n bf09a │ │ + b.n bf0aa │ │ strb r1, [r0, #0] │ │ - b.n becda │ │ + b.n becea │ │ adds r0, #2 │ │ - b.n bea20 │ │ + b.n bea30 │ │ movs r0, #4 │ │ - b.n bea26 │ │ + b.n bea36 │ │ asrs r1, r0, #32 │ │ - b.n bea2a │ │ + b.n bea3a │ │ movs r0, #1 │ │ - b.n bf0b8 │ │ + b.n bf0c8 │ │ str r1, [r0, r0] │ │ - b.n bee30 │ │ + b.n bee40 │ │ asrs r1, r0, #32 │ │ - b.n bf0c0 │ │ + b.n bf0d0 │ │ adds r0, #3 │ │ - b.n bea3e │ │ + b.n bea4e │ │ adds r0, #48 @ 0x30 │ │ - b.n be454 │ │ + b.n be464 │ │ str r0, [r1, #0] │ │ - b.n bee3e │ │ + b.n bee4e │ │ movs r0, #2 │ │ - b.n bede6 │ │ + b.n bedf6 │ │ lsrs r7, r1, #11 │ │ orn sl, r6, #6717440 @ 0x668000 │ │ - bl ffcff93e │ │ + bl ffcff94e │ │ subs r7, r7, r3 │ │ movs r1, r0 │ │ - b.n bec00 │ │ + b.n bec10 │ │ ldc2l 10, cr0, [sl], #1020 @ 0x3fc @ │ │ str r4, [r6, #0] │ │ - b.n be494 │ │ + b.n be4a4 │ │ asrs r0, r6, #32 │ │ - b.n be498 │ │ + b.n be4a8 │ │ lsls r5, r0, #6 │ │ - b.n bea6e │ │ + b.n bea7e │ │ adds r0, #5 │ │ - b.n beca6 │ │ + b.n becb6 │ │ movs r4, r4 │ │ ldmia.w r0, {r1, r2, ip, sp, lr} │ │ - b.n becae │ │ + b.n becbe │ │ movs r1, #129 @ 0x81 │ │ - b.n be8c0 │ │ + b.n be8d0 │ │ movs r0, r1 │ │ - b.n bee76 │ │ + b.n bee86 │ │ asrs r3, r0, #32 │ │ - b.n becba │ │ + b.n becca │ │ str r4, [r0, r0] │ │ - b.n be48c │ │ + b.n be49c │ │ str r1, [r0, r0] │ │ - b.n bee88 │ │ + b.n bee98 │ │ movs r5, r0 │ │ - b.n bec2e │ │ + b.n bec3e │ │ @ instruction: 0xfff51aff │ │ stc2l 10, cr14, [ip], #1020 @ 0x3fc @ │ │ movs r0, r0 │ │ - b.n bf0d2 │ │ + b.n bf0e2 │ │ movs r3, r0 │ │ - b.n bec40 │ │ + b.n bec50 │ │ movs r0, r4 │ │ - b.n be3b0 │ │ + b.n be3c0 │ │ movs r6, r6 │ │ ldr r2, [sp, #0] │ │ movs r0, r1 │ │ - b.n be4dc │ │ + b.n be4ec │ │ strb r2, [r1, #0] │ │ - b.n bece6 │ │ + b.n becf6 │ │ asrs r0, r0, #32 │ │ - b.n be4e4 │ │ + b.n be4f4 │ │ movs r0, #48 @ 0x30 │ │ - b.n be4e8 │ │ + b.n be4f8 │ │ movs r0, r0 │ │ - b.n bea3c │ │ + b.n bea4c │ │ asrs r2, r1, #32 │ │ - b.n bea38 │ │ + b.n bea48 │ │ movs r0, r0 │ │ - b.n bec5c │ │ + b.n bec6c │ │ movs r0, #2 │ │ - b.n bea52 │ │ + b.n bea62 │ │ asrs r0, r0, #32 │ │ str r1, [sp, #640] @ 0x280 │ │ - b.n be9c8 │ │ - b.n beac8 │ │ + b.n be9d8 │ │ + b.n bead8 │ │ movs r0, r1 │ │ - b.n bf086 │ │ + b.n bf096 │ │ movs r3, r3 │ │ subs r2, #0 │ │ movs r0, #48 @ 0x30 │ │ - b.n be50c │ │ + b.n be51c │ │ asrs r3, r0, #32 │ │ - b.n beaea │ │ + b.n beafa │ │ asrs r1, r0, #32 │ │ - b.n bea5e │ │ + b.n bea6e │ │ movs r2, #30 │ │ - b.n bf19e │ │ + b.n bf1ae │ │ movs r2, r0 │ │ - b.n bec04 │ │ + b.n bec14 │ │ movs r5, r2 │ │ lsrs r0, r0, #8 │ │ asrs r4, r6, #32 │ │ - b.n be524 │ │ + b.n be534 │ │ strh r1, [r0, #0] │ │ - b.n bf18a │ │ - add r0, pc, #64 @ (adr r0, bea30 ) │ │ - b.n be52c │ │ + b.n bf19a │ │ + add r0, pc, #64 @ (adr r0, bea40 ) │ │ + b.n be53c │ │ movs r0, #8 │ │ - b.n beb0e │ │ + b.n beb1e │ │ sbcs r3, r0 │ │ - b.n beafc │ │ + b.n beb0c │ │ asrs r0, r1, #32 │ │ - b.n beb04 │ │ + b.n beb14 │ │ adds r0, #3 │ │ - b.n bea8c │ │ + b.n bea9c │ │ strb r4, [r2, #0] │ │ - b.n be540 │ │ + b.n be550 │ │ adds r0, #12 │ │ - b.n beb10 │ │ + b.n beb20 │ │ movs r3, r0 │ │ - b.n becc2 │ │ + b.n becd2 │ │ adds r0, #10 │ │ strh r0, [r4, #12] │ │ adds r0, #7 │ │ - b.n beb1c │ │ + b.n beb2c │ │ adds r0, #1 │ │ - b.n bf1a0 │ │ + b.n bf1b0 │ │ lsrs r5, r1, #11 │ │ orn r0, r4, #133120 @ 0x20800 │ │ - b.n beec8 │ │ + b.n beed8 │ │ strb r0, [r3, #0] │ │ - b.n be560 │ │ + b.n be570 │ │ lsrs r5, r1, #11 │ │ orr.w r0, r7, #608 @ 0x260 │ │ - b.n be548 │ │ + b.n be558 │ │ @ instruction: 0xfff91aff │ │ movs r0, r1 │ │ - b.n becf2 │ │ + b.n bed02 │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ movs r4, r1 │ │ and.w r0, r0, ip, lsl #8 │ │ - b.n bed82 │ │ + b.n bed92 │ │ asrs r3, r0, #32 │ │ - b.n bed86 │ │ + b.n bed96 │ │ strb r4, [r6, #0] │ │ - b.n be584 │ │ + b.n be594 │ │ adds r1, #129 @ 0x81 │ │ - b.n beb5c │ │ + b.n beb6c │ │ strb r2, [r0, #6] │ │ - b.n beb60 │ │ + b.n beb70 │ │ lsrs r0, r2 │ │ - b.n beddc │ │ + b.n bedec │ │ movs r0, #1 │ │ - b.n bef5e │ │ + b.n bef6e │ │ lsrs r0, r6 │ │ - b.n bedec │ │ + b.n bedfc │ │ adds r0, #8 │ │ - b.n bef68 │ │ + b.n bef78 │ │ strb r0, [r1, #0] │ │ - b.n bef74 │ │ + b.n bef84 │ │ asrs r1, r0, #32 │ │ - b.n bef6c │ │ + b.n bef7c │ │ movs r0, r0 │ │ - b.n bed12 │ │ + b.n bed22 │ │ @ instruction: 0xfff73aff │ │ stmia r0!, {r1} │ │ - b.n bedb6 │ │ + b.n bedc6 │ │ adds r0, #1 │ │ - b.n bedba │ │ + b.n bedca │ │ asrs r4, r1, #32 │ │ - b.n be5b8 │ │ + b.n be5c8 │ │ movs r0, r0 │ │ - b.n bf1c2 │ │ + b.n bf1d2 │ │ movs r0, r1 │ │ - b.n bf128 │ │ + b.n bf138 │ │ movs r5, r1 │ │ subs r2, #0 │ │ asrs r4, r6, #32 │ │ - b.n be5c8 │ │ + b.n be5d8 │ │ movs r0, #48 @ 0x30 │ │ - b.n be4c8 │ │ + b.n be4d8 │ │ asrs r4, r1, #6 │ │ - b.n beb98 │ │ + b.n beba8 │ │ movs r2, r0 │ │ - b.n bed3c │ │ + b.n bed4c │ │ lsls r3, r2, #1 │ │ cmp r2, #0 │ │ movs r0, #4 │ │ - b.n be5dc │ │ + b.n be5ec │ │ strb r4, [r3, #0] │ │ - b.n be5e0 │ │ + b.n be5f0 │ │ movs r0, #2 │ │ - b.n bebc2 │ │ + b.n bebd2 │ │ movs r0, #7 │ │ - b.n beb32 │ │ + b.n beb42 │ │ strb r4, [r6, #0] │ │ - b.n be5ec │ │ + b.n be5fc │ │ strb r2, [r0, #6] │ │ - b.n bebc4 │ │ + b.n bebd4 │ │ movs r0, #44 @ 0x2c │ │ - b.n be4f0 │ │ + b.n be500 │ │ movs r2, r0 │ │ - b.n bed6c │ │ + b.n bed7c │ │ lsls r2, r1, #1 │ │ ldr r2, [sp, #0] │ │ asrs r4, r5, #32 │ │ - b.n be4fc │ │ + b.n be50c │ │ strb r4, [r1, #0] │ │ - b.n be604 │ │ + b.n be614 │ │ movs r0, #52 @ 0x34 │ │ - b.n be608 │ │ + b.n be618 │ │ movs r1, #140 @ 0x8c │ │ - b.n bebd6 │ │ + b.n bebe6 │ │ lsrs r0, r2 │ │ - b.n bee58 │ │ + b.n bee68 │ │ stmia r0!, {r0} │ │ - b.n beff2 │ │ + b.n bf002 │ │ ands r0, r0 │ │ - b.n bec06 │ │ + b.n bec16 │ │ movs r1, r0 │ │ - b.n befe2 │ │ + b.n beff2 │ │ str r0, [r0, r0] │ │ - b.n bf030 │ │ + b.n bf040 │ │ movs r0, r0 │ │ - b.n bed98 │ │ + b.n beda8 │ │ lsrs r0, r6 │ │ - b.n bee72 │ │ + b.n bee82 │ │ movs r0, #8 │ │ - b.n beff6 │ │ + b.n bf006 │ │ @ instruction: 0xfff61aff │ │ movs r4, r5 │ │ - b.n be634 │ │ + b.n be644 │ │ movs r3, r0 │ │ - b.n bed9e │ │ + b.n bedae │ │ movs r6, r4 │ │ ldr r2, [sp, #0] │ │ movs r4, r5 │ │ - b.n be640 │ │ + b.n be650 │ │ movs r3, r0 │ │ - b.n beb8a │ │ + b.n beb9a │ │ movs r6, r0 │ │ - b.n bf1ae │ │ + b.n bf1be │ │ movs r4, r2 │ │ subs r2, #0 │ │ asrs r0, r4, #32 │ │ - b.n be54c │ │ + b.n be55c │ │ movs r2, #30 │ │ - b.n bf2da │ │ + b.n bf2ea │ │ asrs r4, r1, #32 │ │ - b.n bec20 │ │ + b.n bec30 │ │ asrs r3, r0, #32 │ │ - b.n beba4 │ │ + b.n bebb4 │ │ movs r2, r0 │ │ - b.n bed48 │ │ + b.n bed58 │ │ movs r6, r1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r4, #32 │ │ - b.n be564 │ │ + b.n be574 │ │ str r1, [r0, r0] │ │ - b.n bf2b2 │ │ + b.n bf2c2 │ │ movs r0, #52 @ 0x34 │ │ - b.n be670 │ │ + b.n be680 │ │ asrs r1, r0, #6 │ │ - b.n bec3e │ │ + b.n bec4e │ │ strb r3, [r0, #6] │ │ - b.n bec42 │ │ + b.n bec52 │ │ asrs r4, r1, #6 │ │ - b.n bec44 │ │ + b.n bec54 │ │ stmia r0!, {r0, r2} │ │ - b.n bec5e │ │ + b.n bec6e │ │ adds r0, #5 │ │ - b.n bec50 │ │ + b.n bec60 │ │ movs r0, #5 │ │ - b.n bee8e │ │ + b.n bee9e │ │ lsrs r5, r1, #11 │ │ orn r0, r7, #532480 @ 0x82000 │ │ - b.n beffa │ │ + b.n bf00a │ │ lsrs r5, r1, #11 │ │ - bl ffd00b50 │ │ + bl ffd00b60 │ │ subs r7, r7, r3 │ │ movs r5, r0 │ │ - b.n bee02 │ │ + b.n bee12 │ │ movs r5, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, #32 │ │ - b.n be5a0 │ │ + b.n be5b0 │ │ movs r4, r5 │ │ - b.n be6a8 │ │ + b.n be6b8 │ │ strb r4, [r6, #0] │ │ - b.n be6ac │ │ + b.n be6bc │ │ movs r1, #130 @ 0x82 │ │ - b.n beeb6 │ │ + b.n beec6 │ │ movs r3, r0 │ │ - b.n bebfa │ │ + b.n bec0a │ │ movs r1, #140 @ 0x8c │ │ - b.n bec82 │ │ + b.n bec92 │ │ asrs r3, r0, #6 │ │ - b.n bec90 │ │ + b.n beca0 │ │ movs r0, #2 │ │ - b.n bec94 │ │ + b.n beca4 │ │ lsrs r0, r2 │ │ - b.n bef0c │ │ + b.n bef1c │ │ movs r1, r0 │ │ - b.n bf02e │ │ + b.n bf03e │ │ lsrs r0, r6 │ │ - b.n bef16 │ │ + b.n bef26 │ │ movs r0, #8 │ │ - b.n bf09a │ │ + b.n bf0aa │ │ asrs r0, r1, #32 │ │ - b.n bf09c │ │ + b.n bf0ac │ │ @ instruction: 0xfff91aff │ │ movs r4, r5 │ │ - b.n be5d8 │ │ + b.n be5e8 │ │ movs r0, #40 @ 0x28 │ │ - b.n be5dc │ │ + b.n be5ec │ │ asrs r4, r4, #32 │ │ - b.n be5e0 │ │ + b.n be5f0 │ │ movs r0, #0 │ │ - b.n be6ae │ │ + b.n be6be │ │ movs r0, #48 @ 0x30 │ │ - b.n be5e8 │ │ + b.n be5f8 │ │ asrs r4, r0, #32 │ │ - b.n be6b6 │ │ + b.n be6c6 │ │ adds r0, #36 @ 0x24 │ │ - b.n be6f4 │ │ + b.n be704 │ │ asrs r0, r5, #32 │ │ - b.n be6f8 │ │ + b.n be708 │ │ adds r0, #0 │ │ - b.n be6c6 │ │ + b.n be6d6 │ │ asrs r4, r0, #32 │ │ - b.n be6ca │ │ + b.n be6da │ │ asrs r4, r5, #32 │ │ - b.n be704 │ │ + b.n be714 │ │ movs r0, #8 │ │ - b.n be708 │ │ + b.n be718 │ │ asrs r2, r0, #32 │ │ - b.n bec54 │ │ + b.n bec64 │ │ movs r0, #12 │ │ - b.n be710 │ │ + b.n be720 │ │ asrs r2, r0, #32 │ │ - b.n becdc │ │ + b.n becec │ │ asrs r0, r2, #32 │ │ - b.n be6de │ │ + b.n be6ee │ │ movs r0, #0 │ │ - b.n bf322 │ │ + b.n bf332 │ │ movs r2, r0 │ │ - b.n bef26 │ │ - beq.n bec20 │ │ - b.n bf080 │ │ + b.n bef36 │ │ + beq.n bec30 │ │ + b.n bf090 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, r5} │ │ - b.n be628 │ │ + b.n be638 │ │ asrs r2, r2, #32 │ │ movt fp, #35 @ 0x23 │ │ - vldr d18, [pc] @ bebf8 │ │ + vldr d18, [pc] @ bec08 │ │ ldcl 0, cr0, [r0, #48] @ 0x30 │ │ - b.n be73c │ │ + b.n be74c │ │ adds r1, #178 @ 0xb2 │ │ @ instruction: 0xf2620001 │ │ - b.n bf38a │ │ + b.n bf39a │ │ stmia r0!, {} │ │ - b.n bed26 │ │ + b.n bed36 │ │ movs r0, #0 │ │ - b.n bef52 │ │ + b.n bef62 │ │ sbcs r0, r4 │ │ @ instruction: 0xf3e22002 │ │ - b.n bf0be │ │ + b.n bf0ce │ │ lsrs r1, r4, #2 │ │ @ instruction: 0xf2604acd │ │ - bl ffd00c16 │ │ + bl ffd00c26 │ │ subs r7, r7, r3 │ │ strb r4, [r1, #0] │ │ - b.n be764 │ │ + b.n be774 │ │ asrs r4, r5, #32 │ │ - b.n be664 │ │ + b.n be674 │ │ movs r7, r0 │ │ - b.n beed2 │ │ + b.n beee2 │ │ @ instruction: 0xffa41aff │ │ @ instruction: 0xffaeeaff │ │ movs r4, r3 │ │ - b.n be778 │ │ + b.n be788 │ │ asrs r4, r0, #32 │ │ - b.n be77c │ │ + b.n be78c │ │ movs r1, r0 │ │ - b.n becc6 │ │ + b.n becd6 │ │ asrs r6, r3, #8 │ │ - b.n bf40a │ │ + b.n bf41a │ │ movs r1, r0 │ │ - b.n bee6e │ │ + b.n bee7e │ │ mrc2 10, 6, r0, cr14, cr15, {7} @ │ │ movs r4, r1 │ │ - b.n be790 │ │ + b.n be7a0 │ │ strb r1, [r0, #0] │ │ - b.n bf3de │ │ + b.n bf3ee │ │ stmia r0!, {r0, r1, r2} │ │ - b.n becf6 │ │ + b.n bed06 │ │ asrs r0, r0, #6 │ │ - b.n befa2 │ │ + b.n befb2 │ │ movs r7, r0 │ │ - b.n befa6 │ │ + b.n befb6 │ │ str r0, [r2, #0] │ │ - b.n bf0fa │ │ + b.n bf10a │ │ lsrs r1, r0, #11 │ │ orn r0, r8, #8519680 @ 0x820000 │ │ - b.n bf112 │ │ + b.n bf122 │ │ lsrs r7, r1, #11 │ │ - bne.w fffc6c82 │ │ - b.n befba │ │ + bne.w fffc6c92 │ │ + b.n befca │ │ @ instruction: 0xfff91aff │ │ movs r7, r0 │ │ - b.n bef26 │ │ + b.n bef36 │ │ mrc2 10, 6, r1, cr1, cr15, {7} @ │ │ mcr2 10, 7, lr, cr1, cr15, {7} @ │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r1, r0 │ │ movs r0, r0 │ │ - ldr r0, [pc, #960] @ (bf054 ) │ │ + ldr r0, [pc, #960] @ (bf064 ) │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n bf1b4 │ │ - beq.n becec │ │ - b.n bf138 │ │ + b.n bf1c4 │ │ + beq.n becfc │ │ + b.n bf148 │ │ ands r0, r0 │ │ - b.n befe2 │ │ + b.n beff2 │ │ movs r0, r0 │ │ - b.n bf3e6 │ │ + b.n bf3f6 │ │ movs r0, r0 │ │ - b.n be7c4 │ │ + b.n be7d4 │ │ movs r4, r0 │ │ - b.n befee │ │ + b.n beffe │ │ str r3, [r0, #0] │ │ - b.n beff2 │ │ + b.n bf002 │ │ strb r2, [r0, #0] │ │ - b.n beff6 │ │ + b.n bf006 │ │ lsls r7, r4, #10 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n beffe │ │ + b.n bf00e │ │ movs r1, r0 │ │ - b.n bf1c2 │ │ + b.n bf1d2 │ │ movs r1, r0 │ │ - b.n bf366 │ │ + b.n bf376 │ │ movs r2, r7 │ │ ldrh r0, [r0, #16] │ │ movs r1, r0 │ │ - b.n bf40e │ │ + b.n bf41e │ │ movs r0, #7 │ │ - b.n bf012 │ │ + b.n bf022 │ │ movs r0, r0 │ │ - b.n be7f0 │ │ + b.n be800 │ │ movs r4, r0 │ │ - b.n bf01a │ │ + b.n bf02a │ │ adds r0, #6 │ │ - b.n bf01e │ │ + b.n bf02e │ │ lsls r5, r3, #10 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n bf026 │ │ + b.n bf036 │ │ movs r1, r0 │ │ - b.n bf1ea │ │ + b.n bf1fa │ │ movs r1, r0 │ │ - b.n bf38e │ │ + b.n bf39e │ │ movs r0, r6 │ │ ldrh r0, [r0, #16] │ │ movs r2, r0 │ │ - b.n bf436 │ │ + b.n bf446 │ │ movs r0, #7 │ │ - b.n bf03a │ │ + b.n bf04a │ │ movs r0, r0 │ │ - b.n be818 │ │ + b.n be828 │ │ movs r4, r0 │ │ - b.n bf042 │ │ + b.n bf052 │ │ adds r0, #6 │ │ - b.n bf046 │ │ + b.n bf056 │ │ lsls r3, r2, #10 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n bf04e │ │ + b.n bf05e │ │ movs r1, r0 │ │ - b.n bf3f2 │ │ + b.n bf402 │ │ movs r7, r4 │ │ subs r0, r0, r0 │ │ movs r6, r0 │ │ - b.n be8c2 │ │ + b.n be8d2 │ │ movs r0, r1 │ │ - b.n bf33e │ │ + b.n bf34e │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ asrs r4, r2, #32 │ │ - b.n be84e │ │ + b.n be85e │ │ str r0, [r0, r0] │ │ - b.n bf46a │ │ + b.n bf47a │ │ movs r4, r5 │ │ - b.n be856 │ │ + b.n be866 │ │ movs r1, r0 │ │ - b.n befd2 │ │ + b.n befe2 │ │ movs r7, r3 │ │ subs r0, r0, r0 │ │ asrs r2, r1, #32 │ │ - b.n bf47a │ │ - beq.n becf4 │ │ + b.n bf48a │ │ + beq.n bed04 │ │ @ instruction: 0xebff5000 │ │ - b.n bf082 │ │ + b.n bf092 │ │ lsls r0, r1, #1 │ │ - b.n be86e │ │ + b.n be87e │ │ cmp r0, #216 @ 0xd8 │ │ - b.n bf0ca │ │ + b.n bf0da │ │ str r1, [r0, #0] │ │ - b.n bf272 │ │ + b.n bf282 │ │ strb r0, [r0, #0] │ │ - b.n bf298 │ │ + b.n bf2a8 │ │ ldr r0, [r7, #12] │ │ - b.n bf0d6 │ │ + b.n bf0e6 │ │ movs r6, r2 │ │ and.w r0, r0, r0, lsr #3 │ │ - b.n be89c │ │ + b.n be8ac │ │ adds r0, #3 │ │ - b.n bf4a2 │ │ + b.n bf4b2 │ │ asrs r4, r3, #1 │ │ - b.n be90e │ │ + b.n be91e │ │ movs r0, r0 │ │ - b.n bee88 │ │ + b.n bee98 │ │ movs r0, #80 @ 0x50 │ │ - b.n be88e │ │ + b.n be89e │ │ movs r0, r2 │ │ - b.n be89a │ │ + b.n be8aa │ │ asrs r3, r2, #4 │ │ - b.n bee7a │ │ + b.n bee8a │ │ movs r0, #0 │ │ - b.n bf23e │ │ + b.n bf24e │ │ asrs r1, r0, #32 │ │ - b.n bf200 │ │ + b.n bf210 │ │ asrs r2, r0, #32 │ │ - b.n bed84 │ │ + b.n bed94 │ │ movs r0, #4 │ │ - b.n bf4c6 │ │ + b.n bf4d6 │ │ str r1, [r6, #116] @ 0x74 │ │ add.w r0, r0, r0 │ │ - b.n bf42e │ │ + b.n bf43e │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ str r6, [r5, #104] @ 0x68 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n be8ba │ │ + b.n be8ca │ │ movs r0, r0 │ │ and.w r0, r0, r0, lsl #20 │ │ - b.n bf4e2 │ │ + b.n bf4f2 │ │ lsls r0, r1, #1 │ │ - b.n be8ce │ │ + b.n be8de │ │ cmp r0, #208 @ 0xd0 │ │ - b.n bf12a │ │ + b.n bf13a │ │ str r1, [r0, #0] │ │ - b.n bf2d2 │ │ + b.n bf2e2 │ │ strb r0, [r0, #0] │ │ - b.n bf2f8 │ │ + b.n bf308 │ │ ldr r0, [r6, #12] │ │ - b.n bf136 │ │ + b.n bf146 │ │ lsls r0, r1, #1 │ │ - b.n be8e2 │ │ + b.n be8f2 │ │ str r0, [r1, #0] │ │ - b.n bf2d8 │ │ + b.n bf2e8 │ │ asrs r1, r0, #32 │ │ - b.n bf502 │ │ + b.n bf512 │ │ asrs r0, r1, #7 │ │ - b.n be8c6 │ │ + b.n be8d6 │ │ movs r6, r0 │ │ - b.n bf10a │ │ + b.n bf11a │ │ asrs r4, r0, #32 │ │ - b.n bf10e │ │ + b.n bf11e │ │ strb r4, [r0, #2] │ │ - b.n be8fa │ │ - strb r2, [r7, #1] │ │ + b.n be90a │ │ + strb r1, [r7, #1] │ │ @ instruction: 0xebff0acd │ │ orn r0, r6, #4194304 @ 0x400000 │ │ - b.n bf2ec │ │ + b.n bf2fc │ │ cmp r2, #207 @ 0xcf │ │ orn sl, r6, #6717440 @ 0x668000 │ │ orr.w sl, r0, #423936 @ 0x67800 │ │ orr.w r0, r0, #4325376 @ 0x420000 │ │ - b.n be916 │ │ + b.n be926 │ │ movs r4, r2 │ │ - b.n be912 │ │ + b.n be922 │ │ movs r0, r0 │ │ - b.n bf496 │ │ + b.n bf4a6 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #2 │ │ - b.n be926 │ │ + b.n be936 │ │ asrs r0, r0, #2 │ │ - b.n bf304 │ │ + b.n bf314 │ │ lsrs r5, r1, #11 │ │ orn sl, r1, #423936 @ 0x67800 │ │ orn r0, r1, #2424832 @ 0x250000 │ │ - b.n be92e │ │ + b.n be93e │ │ lsls r0, r0, #2 │ │ - b.n bf312 │ │ + b.n bf322 │ │ lsrs r5, r1, #11 │ │ orr.w r0, r0, #8388608 @ 0x800000 │ │ - b.n bf4bc │ │ + b.n bf4cc │ │ cmp r2, #207 @ 0xcf │ │ orr.w r0, r0, #8454144 @ 0x810000 │ │ - b.n bf162 │ │ + b.n bf172 │ │ @ instruction: 0xfff41aff │ │ movs r5, r0 │ │ - b.n bf16a │ │ - beq.n bee4c │ │ - b.n bf2c4 │ │ + b.n bf17a │ │ + beq.n bee5c │ │ + b.n bf2d4 │ │ ldrh r0, [r6, #6] │ │ - ldmia.w sp!, {r2, r5, r6, r7, r9, fp, ip, sp, lr, pc} │ │ + ldmia.w sp!, {r2, r4, r5, r6, r7, r9, fp, ip, sp, lr, pc} │ │ movs r1, r0 │ │ - ldr r7, [pc, #960] @ (bf1f8 ) │ │ + ldr r7, [pc, #960] @ (bf208 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n bf358 │ │ - beq.n beee8 │ │ - b.n bf2dc │ │ - bl 51a942 │ │ + b.n bf368 │ │ + beq.n beef8 │ │ + b.n bf2ec │ │ + bl 51a952 │ │ ands r0, r0 │ │ - b.n bf18a │ │ + b.n bf19a │ │ strb r0, [r0, #0] │ │ - b.n bf60e │ │ + b.n bf61e │ │ lsls r4, r4, #2 │ │ - b.n be972 │ │ + b.n be982 │ │ movs r4, r4 │ │ - b.n be970 │ │ + b.n be980 │ │ movs r0, r0 │ │ - b.n bf59a │ │ - add r0, pc, #4 @ (adr r0, bee60 ) │ │ - b.n bf59e │ │ + b.n bf5aa │ │ + add r0, pc, #4 @ (adr r0, bee70 ) │ │ + b.n bf5ae │ │ str r1, [r0, #0] │ │ - b.n bf622 │ │ + b.n bf632 │ │ str r3, [r0, r0] │ │ - b.n bf1a6 │ │ + b.n bf1b6 │ │ strh r2, [r0, #0] │ │ - b.n bf1aa │ │ + b.n bf1ba │ │ movs r0, r7 │ │ - b.n be988 │ │ + b.n be998 │ │ movs r0, r4 │ │ - b.n be98c │ │ + b.n be99c │ │ adds r0, #32 │ │ - b.n be88c │ │ + b.n be89c │ │ movs r0, #36 @ 0x24 │ │ - b.n be890 │ │ + b.n be8a0 │ │ ands r0, r6 │ │ - b.n be894 │ │ + b.n be8a4 │ │ asrs r4, r0, #4 │ │ - b.n be9aa │ │ + b.n be9ba │ │ lsls r0, r1, #1 │ │ - b.n be9ae │ │ + b.n be9be │ │ movs r0, #130 @ 0x82 │ │ - b.n bea2c │ │ + b.n bea3c │ │ asrs r2, r0, #6 │ │ - b.n bef90 │ │ + b.n befa0 │ │ ldrh r0, [r3, #6] │ │ - b.n bf214 │ │ - add r1, pc, #800 @ (adr r1, bf1b4 ) │ │ - b.n be996 │ │ + b.n bf224 │ │ + add r1, pc, #800 @ (adr r1, bf1c4 ) │ │ + b.n be9a6 │ │ movs r4, r0 │ │ - b.n bf1da │ │ + b.n bf1ea │ │ adds r0, #9 │ │ - b.n bf1de │ │ + b.n bf1ee │ │ movs r0, #8 │ │ - b.n bf1e2 │ │ + b.n bf1f2 │ │ lsls r6, r5, #10 │ │ add.w r0, r0, r9, lsl #8 │ │ - b.n beeec │ │ + b.n beefc │ │ adds r0, #8 │ │ - b.n beeee │ │ + b.n beefe │ │ movs r0, #2 │ │ - b.n bf1d8 │ │ + b.n bf1e8 │ │ lsls r5, r6, #4 │ │ lsrs r0, r0, #8 │ │ strh r4, [r4, #0] │ │ - b.n be8f0 │ │ + b.n be900 │ │ str r0, [r4, r0] │ │ - b.n be8f4 │ │ + b.n be904 │ │ movs r4, r5 │ │ - b.n be9dc │ │ + b.n be9ec │ │ movs r0, r0 │ │ - b.n bef76 │ │ + b.n bef86 │ │ movs r1, r0 │ │ - b.n bf074 │ │ + b.n bf084 │ │ asrs r0, r5, #32 │ │ - b.n be9e8 │ │ + b.n be9f8 │ │ lsls r2, r6, #4 │ │ subs r2, #0 │ │ ands r0, r6 │ │ - b.n be90c │ │ + b.n be91c │ │ str r0, [r6, r0] │ │ - b.n bea02 │ │ + b.n bea12 │ │ movs r0, r0 │ │ - b.n bf588 │ │ + b.n bf598 │ │ lsls r1, r6, #4 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n bf226 │ │ + b.n bf236 │ │ asrs r0, r0, #32 │ │ - b.n bf62a │ │ + b.n bf63a │ │ movs r0, #0 │ │ - b.n bf62e │ │ - add r6, pc, #392 @ (adr r6, bf078 ) │ │ + b.n bf63e │ │ + add r6, pc, #388 @ (adr r6, bf084 ) │ │ @ instruction: 0xebff0001 │ │ - b.n bf5d6 │ │ + b.n bf5e6 │ │ lsls r4, r0, #4 │ │ subs r0, r0, r0 │ │ lsls r4, r0, #7 │ │ - b.n bea28 │ │ + b.n bea38 │ │ movs r0, r0 │ │ - b.n bf5a2 │ │ + b.n bf5b2 │ │ lsls r7, r4, #4 │ │ lsrs r0, r0, #8 │ │ lsrs r2, r0, #16 │ │ - b.n bf414 │ │ + b.n bf424 │ │ movs r4, r5 │ │ - b.n be924 │ │ + b.n be934 │ │ movs r0, r0 │ │ - b.n bf652 │ │ - add r0, pc, #0 @ (adr r0, bef14 ) │ │ - b.n bf656 │ │ + b.n bf662 │ │ + add r0, pc, #0 @ (adr r0, bef24 ) │ │ + b.n bf666 │ │ movs r4, r6 │ │ - b.n be930 │ │ + b.n be940 │ │ movs r4, r6 │ │ - b.n bea38 │ │ + b.n bea48 │ │ movs r0, r6 │ │ - b.n bea3c │ │ + b.n bea4c │ │ str r0, [r5, r0] │ │ - b.n be93c │ │ + b.n be94c │ │ movs r4, r5 │ │ - b.n be960 │ │ + b.n be970 │ │ str r2, [sp, #552] @ 0x228 │ │ - b.n bf02e │ │ + b.n bf03e │ │ movs r1, r1 │ │ - b.n bf272 │ │ + b.n bf282 │ │ asrs r1, r0, #32 │ │ - b.n bf676 │ │ - add r6, pc, #152 @ (adr r6, befd0 ) │ │ + b.n bf686 │ │ + add r6, pc, #148 @ (adr r6, befdc ) │ │ @ instruction: 0xebff20d0 │ │ - b.n bf2d0 │ │ + b.n bf2e0 │ │ ands r3, r0 │ │ - b.n bef84 │ │ + b.n bef94 │ │ movs r0, #2 │ │ - b.n bef86 │ │ + b.n bef96 │ │ movs r0, #4 │ │ - b.n bf26e │ │ + b.n bf27e │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ - blx 4c0590 │ │ + blx 4c05a0 │ │ @ instruction: 0xfff5eaff │ │ movs r0, #32 │ │ - b.n be990 │ │ + b.n be9a0 │ │ movs r0, r1 │ │ - b.n bef9e │ │ + b.n befae │ │ asrs r2, r0, #32 │ │ - b.n befa4 │ │ + b.n befb4 │ │ movs r1, r0 │ │ - b.n bf286 │ │ + b.n bf296 │ │ lsls r5, r5, #1 │ │ subs r0, r0, r0 │ │ strh r0, [r1, #0] │ │ - b.n bf480 │ │ + b.n bf490 │ │ ands r0, r2 │ │ - b.n beaa4 │ │ - bl 51aa72 │ │ + b.n beab4 │ │ + bl 51aa82 │ │ movs r0, r0 │ │ - b.n bf622 │ │ + b.n bf632 │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ lsls r6, r4, #1 │ │ @ instruction: 0xea00f001 │ │ - b.n bf5c6 │ │ + b.n bf5d6 │ │ movs r0, r1 │ │ - b.n bf2ca │ │ + b.n bf2da │ │ asrs r1, r0, #32 │ │ - b.n bf6ce │ │ - add r6, pc, #64 @ (adr r6, befd0 ) │ │ + b.n bf6de │ │ + add r6, pc, #60 @ (adr r6, befdc ) │ │ @ instruction: 0xebff20d0 │ │ - b.n bf326 │ │ + b.n bf336 │ │ str r3, [r0, r0] │ │ - b.n befdc │ │ + b.n befec │ │ movs r0, #2 │ │ - b.n befde │ │ + b.n befee │ │ movs r0, #5 │ │ - b.n bf2c6 │ │ + b.n bf2d6 │ │ @ instruction: 0xfff61aff │ │ movs r7, r0 │ │ - b.n befea │ │ + b.n beffa │ │ asrs r7, r0, #32 │ │ - b.n beff0 │ │ + b.n bf000 │ │ movs r1, r0 │ │ - b.n bf2d2 │ │ + b.n bf2e2 │ │ lsls r3, r2, #1 │ │ subs r0, r0, r0 │ │ lsrs r7, r3, #30 │ │ - b.n bf32a │ │ + b.n bf33a │ │ movs r0, #7 │ │ - b.n beffe │ │ + b.n bf00e │ │ movs r7, r0 │ │ - b.n bf004 │ │ + b.n bf014 │ │ movs r0, r0 │ │ - b.n bf2ea │ │ + b.n bf2fa │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ - bl 51aaca │ │ + bl 51aada │ │ lsrs r6, r2, #30 │ │ - b.n bf322 │ │ + b.n bf332 │ │ movs r0, r0 │ │ - b.n bf676 │ │ + b.n bf686 │ │ movs r7, r2 │ │ lsrs r0, r0, #8 │ │ lsrs r7, r3, #30 │ │ - b.n bf34e │ │ + b.n bf35e │ │ movs r0, #7 │ │ - b.n bf022 │ │ + b.n bf032 │ │ movs r7, r0 │ │ - b.n bf028 │ │ + b.n bf038 │ │ movs r0, r0 │ │ - b.n bf30e │ │ + b.n bf31e │ │ @ instruction: 0xfff70aff │ │ - bl 4deaee │ │ - bl 51aaf2 │ │ + bl 4deafe │ │ + bl 51ab02 │ │ movs r1, r1 │ │ - b.n bf33a │ │ + b.n bf34a │ │ asrs r1, r0, #32 │ │ - b.n bf73e │ │ - add r5, pc, #976 @ (adr r5, bf3d0 ) │ │ + b.n bf74e │ │ + add r5, pc, #972 @ (adr r5, bf3dc ) │ │ @ instruction: 0xebff20d0 │ │ - b.n bf398 │ │ + b.n bf3a8 │ │ str r3, [r0, r0] │ │ - b.n bf04c │ │ + b.n bf05c │ │ movs r0, #2 │ │ - b.n bf04e │ │ + b.n bf05e │ │ movs r0, #5 │ │ - b.n bf336 │ │ + b.n bf346 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ - blx 4c0658 │ │ + blx 4c0668 │ │ @ instruction: 0xfff5eaff │ │ movs r0, #36 @ 0x24 │ │ - b.n bea58 │ │ + b.n bea68 │ │ movs r2, r0 │ │ - b.n bf066 │ │ + b.n bf076 │ │ movs r0, #32 │ │ - b.n bea60 │ │ + b.n bea70 │ │ asrs r2, r0, #32 │ │ - b.n bf070 │ │ + b.n bf080 │ │ movs r1, r0 │ │ - b.n bf352 │ │ + b.n bf362 │ │ @ instruction: 0xffcd0aff │ │ movs r0, r7 │ │ @ instruction: 0xea00f05b │ │ sbcs.w pc, pc, #5210112 @ 0x4f8000 │ │ - b.n bf3b4 │ │ + b.n bf3c4 │ │ strh r4, [r4, #0] │ │ - b.n bea7c │ │ + b.n bea8c │ │ adds r0, #32 │ │ - b.n bea80 │ │ + b.n bea90 │ │ movs r0, #8 │ │ - b.n bf08e │ │ + b.n bf09e │ │ movs r3, r0 │ │ - b.n bf094 │ │ + b.n bf0a4 │ │ movs r0, r0 │ │ - b.n bf37a │ │ + b.n bf38a │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ - bl 51ab5a │ │ + bl 51ab6a │ │ movs r7, r0 │ │ - b.n bf3a2 │ │ + b.n bf3b2 │ │ asrs r7, r0, #32 │ │ - b.n bf3a6 │ │ + b.n bf3b6 │ │ cmp r7, #144 @ 0x90 │ │ - b.n bf3bc │ │ + b.n bf3cc │ │ movs r0, r0 │ │ - b.n bf712 │ │ + b.n bf722 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ lsrs r7, r3, #30 │ │ - b.n bf3e8 │ │ + b.n bf3f8 │ │ movs r0, #8 │ │ - b.n bf0ba │ │ + b.n bf0ca │ │ movs r3, r0 │ │ - b.n bf0c0 │ │ + b.n bf0d0 │ │ movs r0, r0 │ │ - b.n bf3a6 │ │ + b.n bf3b6 │ │ @ instruction: 0xfff50aff │ │ movs r0, r0 │ │ - b.n bf7ca │ │ - bl 4deb8a │ │ + b.n bf7da │ │ + bl 4deb9a │ │ movs r0, r0 │ │ and.w r0, r0, r1 │ │ - b.n bf7d6 │ │ - bl 51ab96 │ │ + b.n bf7e6 │ │ + bl 51aba6 │ │ asrs r0, r7, #15 │ │ - b.n bebdc │ │ + b.n bebec │ │ str r0, [r5, r0] │ │ - b.n bead8 │ │ + b.n beae8 │ │ asrs r1, r0, #32 │ │ - b.n bf1c4 │ │ + b.n bf1d4 │ │ asrs r2, r3, #1 │ │ - b.n bec4c │ │ + b.n bec5c │ │ movs r3, r0 │ │ - b.n bf750 │ │ + b.n bf760 │ │ movs r4, r3 │ │ subs r2, #0 │ │ asrs r0, r4, #32 │ │ - b.n beaec │ │ + b.n beafc │ │ movs r0, r0 │ │ - b.n bf75a │ │ + b.n bf76a │ │ strb r0, [r3, #0] │ │ - b.n bebd8 │ │ + b.n bebe8 │ │ movs r1, #101 @ 0x65 │ │ - b.n bf6c2 │ │ + b.n bf6d2 │ │ strb r4, [r3, #0] │ │ - b.n bebe0 │ │ + b.n bebf0 │ │ strh r0, [r1, #0] │ │ - b.n bebe4 │ │ + b.n bebf4 │ │ asrs r4, r1, #32 │ │ - b.n bebe8 │ │ + b.n bebf8 │ │ ands r0, r2 │ │ - b.n bebec │ │ + b.n bebfc │ │ lsls r4, r0, #15 │ │ - b.n bec14 │ │ + b.n bec24 │ │ asrs r4, r0, #15 │ │ - b.n bec18 │ │ + b.n bec28 │ │ movs r0, r0 │ │ - b.n bf1fc │ │ + b.n bf20c │ │ asrs r1, r0, #32 │ │ - b.n bf200 │ │ + b.n bf210 │ │ movs r1, r0 │ │ asrs r0, r4, #6 │ │ movs r0, r0 │ │ - b.n bec04 │ │ + b.n bec14 │ │ movs r3, r0 │ │ - b.n bf82e │ │ + b.n bf83e │ │ asrs r0, r6, #14 │ │ - b.n bec30 │ │ + b.n bec40 │ │ adds r3, #176 @ 0xb0 │ │ - b.n bec34 │ │ + b.n bec44 │ │ asrs r1, r0, #32 │ │ - b.n bf218 │ │ + b.n bf228 │ │ adds r0, #3 │ │ - b.n bf21c │ │ - strb r1, [r1, #1] │ │ + b.n bf22c │ │ + strb r0, [r1, #1] │ │ @ instruction: 0xebff0007 │ │ and.w r0, r0, r8, lsr #32 │ │ - b.n bf61c │ │ + b.n bf62c │ │ asrs r0, r0, #32 │ │ - b.n bf84e │ │ - add r5, pc, #704 @ (adr r5, bf3d0 ) │ │ + b.n bf85e │ │ + add r5, pc, #700 @ (adr r5, bf3dc ) │ │ @ instruction: 0xebff0034 │ │ - b.n bec30 │ │ + b.n bec40 │ │ asrs r0, r6, #32 │ │ - b.n bec34 │ │ + b.n bec44 │ │ str r0, [sp, #208] @ 0xd0 │ │ - b.n beb34 │ │ + b.n beb44 │ │ strh r4, [r4, #0] │ │ - b.n beb58 │ │ + b.n beb68 │ │ str r0, [r5, r0] │ │ - b.n beb5c │ │ + b.n beb6c │ │ lsls r4, r0, #7 │ │ - b.n bec54 │ │ - add r0, pc, #4 @ (adr r0, bf130 ) │ │ - b.n bf642 │ │ + b.n bec64 │ │ + add r0, pc, #4 @ (adr r0, bf140 ) │ │ + b.n bf652 │ │ movs r0, r0 │ │ - b.n bf3e6 │ │ + b.n bf3f6 │ │ vpmin.u , , │ │ movs r4, r4 │ │ - b.n bec74 │ │ + b.n bec84 │ │ ands r0, r6 │ │ - b.n beb74 │ │ + b.n beb84 │ │ movs r0, r0 │ │ - b.n bf7e2 │ │ + b.n bf7f2 │ │ lsls r0, r3, #2 │ │ lsrs r0, r0, #8 │ │ movs r4, r6 │ │ - b.n beb80 │ │ + b.n beb90 │ │ str r0, [r4, r0] │ │ - b.n beb84 │ │ + b.n beb94 │ │ movs r0, r0 │ │ - b.n bf7f2 │ │ + b.n bf802 │ │ lsls r5, r2, #2 │ │ lsrs r0, r0, #8 │ │ strh r0, [r1, #0] │ │ - b.n bf65a │ │ + b.n bf66a │ │ str r0, [sp, #64] @ 0x40 │ │ - b.n bec7e │ │ + b.n bec8e │ │ ands r0, r0 │ │ - b.n bf4a2 │ │ + b.n bf4b2 │ │ asrs r1, r0, #32 │ │ - b.n bf8a6 │ │ + b.n bf8b6 │ │ movs r0, r1 │ │ - b.n bf4aa │ │ - bl 51ac6a │ │ - add r5, pc, #608 @ (adr r5, bf3d0 ) │ │ + b.n bf4ba │ │ + bl 51ac7a │ │ + add r5, pc, #604 @ (adr r5, bf3dc ) │ │ @ instruction: 0xebff20d8 │ │ - b.n bf4fe │ │ + b.n bf50e │ │ str r3, [r0, r0] │ │ - b.n bf1bc │ │ - add r0, pc, #4 @ (adr r0, bf180 ) │ │ - b.n bf8be │ │ + b.n bf1cc │ │ + add r0, pc, #4 @ (adr r0, bf190 ) │ │ + b.n bf8ce │ │ asrs r2, r0, #32 │ │ - b.n bf1c2 │ │ + b.n bf1d2 │ │ asrs r5, r0, #32 │ │ - b.n bf4a8 │ │ + b.n bf4b8 │ │ lsls r7, r4, #1 │ │ subs r0, r0, r0 │ │ movs r0, r5 │ │ - b.n beba4 │ │ + b.n bebb4 │ │ movs r4, r0 │ │ - b.n bf4d2 │ │ + b.n bf4e2 │ │ asrs r1, r0, #32 │ │ - b.n bf8d6 │ │ - add r5, pc, #568 @ (adr r5, bf3d0 ) │ │ + b.n bf8e6 │ │ + add r5, pc, #564 @ (adr r5, bf3dc ) │ │ @ instruction: 0xebff20d0 │ │ - b.n bf526 │ │ + b.n bf536 │ │ str r3, [r0, r0] │ │ - b.n bf1e4 │ │ + b.n bf1f4 │ │ movs r0, #2 │ │ - b.n bf1e6 │ │ + b.n bf1f6 │ │ movs r0, #5 │ │ - b.n bf4ce │ │ + b.n bf4de │ │ lsls r1, r5, #1 │ │ subs r0, r0, r0 │ │ str r0, [r4, r0] │ │ - b.n bebe8 │ │ + b.n bebf8 │ │ strh r4, [r4, #0] │ │ - b.n bebec │ │ + b.n bebfc │ │ ands r0, r6 │ │ - b.n bebf0 │ │ + b.n bec00 │ │ movs r0, r1 │ │ - b.n bf1fe │ │ + b.n bf20e │ │ asrs r5, r0, #32 │ │ - b.n bf204 │ │ + b.n bf214 │ │ movs r1, r0 │ │ - b.n bf4e6 │ │ + b.n bf4f6 │ │ lsls r2, r1, #1 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n bf880 │ │ + b.n bf890 │ │ lsls r0, r1, #1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #4 │ │ - b.n becfe │ │ - b.n bf290 │ │ - b.n bed82 │ │ + b.n bed0e │ │ + b.n bf2a0 │ │ + b.n bed92 │ │ adds r0, #16 │ │ - b.n bed06 │ │ + b.n bed16 │ │ movs r0, #129 @ 0x81 │ │ - b.n bed84 │ │ - add r0, pc, #224 @ (adr r0, bf2c4 ) │ │ - b.n bed20 │ │ + b.n bed94 │ │ + add r0, pc, #224 @ (adr r0, bf2d4 ) │ │ + b.n bed30 │ │ subs r6, #18 │ │ - b.n bf2f0 │ │ + b.n bf300 │ │ movs r1, #130 @ 0x82 │ │ - b.n bf2f0 │ │ + b.n bf300 │ │ lsls r4, r1, #3 │ │ - b.n bed18 │ │ + b.n bed28 │ │ stmia r0!, {r4, r6, r7} │ │ - b.n bed1c │ │ + b.n bed2c │ │ cmp r0, #216 @ 0xd8 │ │ - b.n bf57e │ │ - add r0, pc, #64 @ (adr r0, bf23c ) │ │ - b.n bed18 │ │ + b.n bf58e │ │ + add r0, pc, #64 @ (adr r0, bf24c ) │ │ + b.n bed28 │ │ movs r0, #8 │ │ - b.n bf2a6 │ │ + b.n bf2b6 │ │ strh r0, [r0, #0] │ │ - b.n bed20 │ │ + b.n bed30 │ │ adds r0, #5 │ │ - b.n bf3b0 │ │ + b.n bf3c0 │ │ str r4, [r0, r0] │ │ - b.n bed28 │ │ + b.n bed38 │ │ adds r0, #52 @ 0x34 │ │ - b.n bed4c │ │ + b.n bed5c │ │ movs r0, #7 │ │ asrs r0, r4, #6 │ │ movs r0, #8 │ │ - b.n bed34 │ │ + b.n bed44 │ │ movs r0, #0 │ │ - b.n bf2c4 │ │ + b.n bf2d4 │ │ adds r0, #3 │ │ - b.n bf2a2 │ │ + b.n bf2b2 │ │ movs r0, #48 @ 0x30 │ │ - b.n bed60 │ │ + b.n bed70 │ │ movs r4, r0 │ │ - b.n bf56a │ │ + b.n bf57a │ │ ands r4, r4 │ │ - b.n bed68 │ │ + b.n bed78 │ │ movs r0, #12 │ │ - b.n bf3d6 │ │ + b.n bf3e6 │ │ movs r0, #0 │ │ - b.n bf976 │ │ + b.n bf986 │ │ movs r0, #1 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n bf8e2 │ │ + b.n bf8f2 │ │ cmp r6, #19 │ │ asrs r0, r4, #6 │ │ adds r0, #40 @ 0x28 │ │ - b.n bec7c │ │ + b.n bec8c │ │ movs r0, #12 │ │ - b.n bed64 │ │ + b.n bed74 │ │ movs r0, #9 │ │ - b.n bf58e │ │ + b.n bf59e │ │ vrhadd.u d14, d4, d31 │ │ movs r0, r0 │ │ - b.n bf8f6 │ │ + b.n bf906 │ │ lsls r0, r2, #1 │ │ - ldr r2, [pc, #0] @ (bf258 ) │ │ - add r0, pc, #4 @ (adr r0, bf260 ) │ │ - b.n bf99e │ │ + ldr r2, [pc, #0] @ (bf268 ) │ │ + add r0, pc, #4 @ (adr r0, bf270 ) │ │ + b.n bf9ae │ │ movs r6, r2 │ │ lsrs r0, r0, #8 │ │ ands r0, r6 │ │ - b.n bec9c │ │ + b.n becac │ │ movs r1, r0 │ │ - b.n bf90a │ │ + b.n bf91a │ │ movs r1, r3 │ │ subs r0, r0, r0 │ │ adds r0, #52 @ 0x34 │ │ - b.n beca8 │ │ + b.n becb8 │ │ lsrs r7, r3, #30 │ │ - b.n bf5dc │ │ + b.n bf5ec │ │ movs r0, #8 │ │ - b.n bf2ba │ │ + b.n bf2ca │ │ movs r5, r0 │ │ - b.n bf2c0 │ │ + b.n bf2d0 │ │ movs r0, r0 │ │ - b.n bf5a6 │ │ + b.n bf5b6 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ - bl 51ad86 │ │ + bl 51ad96 │ │ movs r7, r0 │ │ - b.n bf5ce │ │ + b.n bf5de │ │ asrs r7, r0, #32 │ │ - b.n bf5d2 │ │ + b.n bf5e2 │ │ cmp r7, #144 @ 0x90 │ │ - b.n bf5dc │ │ + b.n bf5ec │ │ movs r0, r0 │ │ - b.n bf93e │ │ + b.n bf94e │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ lsrs r7, r3, #30 │ │ - b.n bf608 │ │ + b.n bf618 │ │ movs r0, #8 │ │ - b.n bf2e6 │ │ + b.n bf2f6 │ │ movs r5, r0 │ │ - b.n bf2ec │ │ + b.n bf2fc │ │ movs r0, r0 │ │ - b.n bf5d2 │ │ + b.n bf5e2 │ │ @ instruction: 0xfff50aff │ │ - bl 4dedb2 │ │ - bl 51adb6 │ │ + bl 4dedc2 │ │ + bl 51adc6 │ │ movs r5, r1 │ │ and.w r0, r0, r0, asr #32 │ │ - b.n bedfc │ │ + b.n bee0c │ │ ands r0, r6 │ │ - b.n becfc │ │ + b.n bed0c │ │ movs r1, r0 │ │ - b.n bf8ea │ │ + b.n bf8fa │ │ movs r1, r0 │ │ lsls r0, r0, #12 │ │ movs r0, r4 │ │ - b.n bedec │ │ + b.n bedfc │ │ movs r7, r0 │ │ @ instruction: 0xea00f05b │ │ sbcs.w r0, pc, #8388608 @ 0x800000 │ │ - b.n bfa1e │ │ + b.n bfa2e │ │ asrs r4, r6, #32 │ │ - b.n bed18 │ │ + b.n bed28 │ │ strb r4, [r0, #0] │ │ - b.n bede8 │ │ + b.n bedf8 │ │ movs r0, r1 │ │ - b.n bedec │ │ + b.n bedfc │ │ movs r4, r1 │ │ - b.n bedf0 │ │ - bl 51adee │ │ + b.n bee00 │ │ + bl 51adfe │ │ movs r0, r2 │ │ - b.n bedf8 │ │ + b.n bee08 │ │ movs r0, r7 │ │ - b.n bee34 │ │ + b.n bee44 │ │ movs r1, r0 │ │ - b.n bf7fe │ │ + b.n bf80e │ │ movs r0, r7 │ │ - b.n bee1c │ │ + b.n bee2c │ │ lsls r6, r0, #4 │ │ - b.n bf9e6 │ │ + b.n bf9f6 │ │ mrc2 10, 6, r1, cr12, cr15, {7} @ │ │ lsls r6, r1, #1 │ │ and.w r0, r0, r0, rrx │ │ - b.n bed48 │ │ + b.n bed58 │ │ asrs r0, r0, #32 │ │ - b.n bfa56 │ │ + b.n bfa66 │ │ movs r0, #0 │ │ - b.n bfa5a │ │ - add r5, pc, #348 @ (adr r5, bf478 ) │ │ + b.n bfa6a │ │ + add r5, pc, #344 @ (adr r5, bf484 ) │ │ @ instruction: 0xebff0000 │ │ - b.n bf9c2 │ │ + b.n bf9d2 │ │ mrc2 10, 7, r0, cr4, cr15, {7} @ │ │ movs r6, r3 │ │ and.w r0, r0, r8 │ │ - b.n bf66e │ │ + b.n bf67e │ │ asrs r1, r0, #32 │ │ - b.n bfa72 │ │ - blx 4c0974 │ │ - add r5, pc, #152 @ (adr r5, bf3d0 ) │ │ + b.n bfa82 │ │ + blx 4c0984 │ │ + add r5, pc, #148 @ (adr r5, bf3dc ) │ │ @ instruction: 0xebff20d0 │ │ - b.n bf6ce │ │ + b.n bf6de │ │ str r3, [r0, r0] │ │ - b.n bf384 │ │ + b.n bf394 │ │ asrs r2, r0, #32 │ │ - b.n bf386 │ │ + b.n bf396 │ │ asrs r5, r0, #32 │ │ - b.n bf66c │ │ + b.n bf67c │ │ @ instruction: 0xfff61aff │ │ ands r4, r6 │ │ - b.n bed88 │ │ + b.n bed98 │ │ @ instruction: 0xff8ceaff │ │ str r0, [r4, r0] │ │ - b.n bed90 │ │ + b.n beda0 │ │ strh r4, [r4, #0] │ │ - b.n bed94 │ │ - blx 4c09a0 │ │ + b.n beda4 │ │ + blx 4c09b0 │ │ movs r4, r6 │ │ - b.n bed9c │ │ + b.n bedac │ │ asrs r1, r0, #32 │ │ - b.n bfaaa │ │ - add r5, pc, #100 @ (adr r5, bf3d0 ) │ │ + b.n bfaba │ │ + add r5, pc, #96 @ (adr r5, bf3dc ) │ │ @ instruction: 0xebff2034 │ │ - b.n beda8 │ │ + b.n bedb8 │ │ ands r0, r6 │ │ - b.n bedac │ │ + b.n bedbc │ │ movs r0, #208 @ 0xd0 │ │ - b.n bf6fe │ │ + b.n bf70e │ │ stmia r0!, {r0, r1} │ │ - b.n bf3c0 │ │ + b.n bf3d0 │ │ movs r0, #2 │ │ - b.n bf3c2 │ │ + b.n bf3d2 │ │ movs r0, #12 │ │ - b.n bf6aa │ │ + b.n bf6ba │ │ @ instruction: 0xff8b0aff │ │ @ instruction: 0xfff3eaff │ │ strh r4, [r5, #0] │ │ - b.n beeac │ │ + b.n beebc │ │ str r0, [sp, #160] @ 0xa0 │ │ - b.n beeb0 │ │ + b.n beec0 │ │ str r0, [r4, r0] │ │ - b.n bedd0 │ │ + b.n bede0 │ │ strh r4, [r4, #0] │ │ - b.n bedd4 │ │ + b.n bede4 │ │ ands r0, r6 │ │ - b.n bedd8 │ │ + b.n bede8 │ │ movs r1, r0 │ │ and.w r0, r0, r0, ror #16 │ │ - b.n bede0 │ │ + b.n bedf0 │ │ str r0, [r4, r0] │ │ - b.n bede4 │ │ + b.n bedf4 │ │ movs r0, r4 │ │ - b.n beeec │ │ + b.n beefc │ │ movs r1, r0 │ │ - b.n bf9d6 │ │ + b.n bf9e6 │ │ movs r3, r3 │ │ lsrs r0, r0, #8 │ │ movs r0, #44 @ 0x2c │ │ - b.n beef8 │ │ + b.n bef08 │ │ adds r0, #40 @ 0x28 │ │ - b.n beefc │ │ + b.n bef0c │ │ strb r0, [r1, #0] │ │ - b.n bf46a │ │ + b.n bf47a │ │ movs r0, r1 │ │ - b.n bf40e │ │ + b.n bf41e │ │ asrs r5, r0, #32 │ │ - b.n bf414 │ │ + b.n bf424 │ │ str r5, [r0, #0] │ │ - b.n bf558 │ │ + b.n bf568 │ │ movs r1, r0 │ │ - b.n bf6d6 │ │ + b.n bf6e6 │ │ movs r0, r0 │ │ - b.n bfa7a │ │ + b.n bfa8a │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ lsls r0, r1, #3 │ │ - b.n bef20 │ │ + b.n bef30 │ │ movs r0, r0 │ │ - b.n bf504 │ │ + b.n bf514 │ │ lsls r2, r3, #1 │ │ - b.n bef8a │ │ + b.n bef9a │ │ movs r3, r0 │ │ - b.n bfa8e │ │ + b.n bfa9e │ │ movs r0, r3 │ │ cmp r2, #0 │ │ movs r0, r0 │ │ - b.n bfaa2 │ │ + b.n bfab2 │ │ movs r0, r7 │ │ - b.n bef34 │ │ + b.n bef44 │ │ strb r0, [r0, #0] │ │ asrs r0, r4, #15 │ │ asrs r4, r0, #4 │ │ - b.n bef2a │ │ + b.n bef3a │ │ lsls r0, r4, #2 │ │ @ instruction: 0xe98d0000 │ │ - b.n bf8ca │ │ + b.n bf8da │ │ movs r0, #0 │ │ - b.n bfb4e │ │ + b.n bfb5e │ │ strb r4, [r4, #0] │ │ - b.n bef4c │ │ + b.n bef5c │ │ adds r0, #0 │ │ - b.n bfb56 │ │ + b.n bfb66 │ │ movs r0, r2 │ │ - b.n bef34 │ │ + b.n bef44 │ │ movs r4, r0 │ │ - b.n bf75e │ │ + b.n bf76e │ │ strh r0, [r0, #0] │ │ - b.n bef3c │ │ + b.n bef4c │ │ movs r0, #12 │ │ - b.n bef40 │ │ + b.n bef50 │ │ vrhadd.u d14, d7, d31 │ │ asrs r4, r5, #32 │ │ - b.n bef68 │ │ + b.n bef78 │ │ movs r0, r0 │ │ - b.n bfb72 │ │ + b.n bfb82 │ │ asrs r1, r0, #32 │ │ - b.n bf4e6 │ │ + b.n bf4f6 │ │ asrs r0, r5, #32 │ │ - b.n bef74 │ │ + b.n bef84 │ │ asrs r1, r0, #32 │ │ - b.n bf5e8 │ │ + b.n bf5f8 │ │ movs r1, r0 │ │ adds r3, #0 │ │ - beq.n bf47c │ │ - b.n bf8dc │ │ + beq.n bf48c │ │ + b.n bf8ec │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, r8} │ │ - b.n bfc0e │ │ + b.n bfc1e │ │ movs r0, r7 │ │ - b.n bef6c │ │ + b.n bef7c │ │ @ instruction: 0xffd5eaff │ │ asrs r4, r2, #1 │ │ - b.n bef98 │ │ + b.n befa8 │ │ movs r1, #154 @ 0x9a │ │ - b.n bfa5e │ │ + b.n bfa6e │ │ adds r0, #80 @ 0x50 │ │ - b.n befa0 │ │ + b.n befb0 │ │ movs r4, r5 │ │ - b.n befa0 │ │ + b.n befb0 │ │ asrs r1, r0, #32 │ │ - b.n bf588 │ │ + b.n bf598 │ │ movs r0, r1 │ │ - b.n bef88 │ │ + b.n bef98 │ │ adds r0, #3 │ │ - b.n bf590 │ │ + b.n bf5a0 │ │ movs r0, r5 │ │ - b.n befb0 │ │ + b.n befc0 │ │ movs r4, r1 │ │ - b.n bef94 │ │ + b.n befa4 │ │ movs r3, r0 │ │ - b.n bfbbe │ │ + b.n bfbce │ │ strh r0, [r0, #0] │ │ - b.n bef9c │ │ + b.n befac │ │ str r4, [r0, r0] │ │ - b.n befa0 │ │ + b.n befb0 │ │ strb r0, [r2, #0] │ │ - b.n befa4 │ │ + b.n befb4 │ │ str r4, [r2, #0] │ │ - b.n befa8 │ │ - ldr r5, [r4, #116] @ 0x74 │ │ + b.n befb8 │ │ + ldr r4, [r4, #116] @ 0x74 │ │ @ instruction: 0xebff4030 │ │ - b.n beecc │ │ + b.n beedc │ │ @ instruction: 0xffd5eaff │ │ - @ instruction: 0xf7a80001 │ │ - bl ffd34488 │ │ - str r2, [sp, #0] │ │ - vrsra.u32 d29, d31, #12 │ │ - @ instruction: 0xfff4c9b4 │ │ - vcls.s16 , q12 │ │ + @ instruction: 0xf7b80001 │ │ + bl ffefe498 │ │ + str r2, [sp, #264] @ 0x108 │ │ + @ instruction: 0xfff4d34a │ │ + vtbx.8 d28, {d20-d21}, d25 │ │ + vsri.32 , q12, #12 │ │ movs r1, r0 │ │ - ldmia r7, {r0, r1, r2, r3, r6, r7} │ │ - vrshr.u32 d25, d29, #12 │ │ + ldmia r7, {r1, r3, r4, r6, r7} │ │ + vrshr.u32 , , #12 │ │ vcvt.f16.u16 q10, q8, #12 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n bf9dc │ │ - beq.n bf4d4 │ │ - b.n bf960 │ │ + b.n bf9ec │ │ + beq.n bf4e4 │ │ + b.n bf970 │ │ str r0, [r0, r0] │ │ - b.n bf80a │ │ + b.n bf81a │ │ movs r0, r0 │ │ - b.n befee │ │ + b.n beffe │ │ movs r0, #1 │ │ - b.n bf812 │ │ + b.n bf822 │ │ ands r0, r0 │ │ - b.n bfc16 │ │ + b.n bfc26 │ │ asrs r4, r0, #32 │ │ - b.n bef3a │ │ + b.n bef4a │ │ movs r2, r0 │ │ - b.n bf780 │ │ + b.n bf790 │ │ movs r3, r2 │ │ cmp r2, #0 │ │ lsrs r7, r7, #1 │ │ - b.n bfb8a │ │ + b.n bfb9a │ │ movs r4, r2 │ │ ldrh r0, [r0, #16] │ │ asrs r2, r0, #2 │ │ - b.n bf5b0 │ │ + b.n bf5c0 │ │ movs r0, #19 │ │ - b.n bfaf4 │ │ + b.n bfb04 │ │ lsrs r7, r7, #1 │ │ - b.n bfb98 │ │ + b.n bfba8 │ │ adds r7, r7, r1 │ │ movs r3, #160 @ 0xa0 │ │ asrs r1, r0, #6 │ │ - b.n bf602 │ │ + b.n bf612 │ │ movs r0, #0 │ │ - b.n bfb20 │ │ + b.n bfb30 │ │ movs r7, #255 @ 0xff │ │ - b.n bfb86 │ │ + b.n bfb96 │ │ asrs r2, r0, #32 │ │ - b.n bf50c │ │ + b.n bf51c │ │ str r0, [r1, #0] │ │ - b.n bf990 │ │ + b.n bf9a0 │ │ asrs r6, r0, #32 │ │ - b.n bf852 │ │ + b.n bf862 │ │ str r6, [r2, #76] @ 0x4c │ │ add.w r0, r0, r0 │ │ - b.n bfbba │ │ + b.n bfbca │ │ asrs r2, r0, #32 │ │ asrs r0, r4, #15 │ │ ands r4, r1 │ │ lsls r0, r4, #14 │ │ asrs r6, r4, #4 │ │ asrs r1, r0, #2 │ │ asrs r1, r4, #2 │ │ asrs r0, r4, #6 │ │ asrs r4, r0, #32 │ │ asrs r0, r0, #18 │ │ movs r0, r0 │ │ asrs r5, r0, #22 │ │ movs r4, r0 │ │ - b.n bf876 │ │ - beq.n bf558 │ │ - b.n bf9d0 │ │ + b.n bf886 │ │ + beq.n bf568 │ │ + b.n bf9e0 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r2, r6} │ │ - b.n bf080 │ │ + b.n bf090 │ │ blxns r7 │ │ - b.n bfb56 │ │ - ldr r7, [pc, #1020] @ (bf944 ) │ │ - b.n bfbe8 │ │ + b.n bfb66 │ │ + ldr r7, [pc, #1020] @ (bf954 ) │ │ + b.n bfbf8 │ │ movs r0, r0 │ │ - b.n bf66c │ │ + b.n bf67c │ │ lsls r2, r3, #1 │ │ - b.n bf0f2 │ │ + b.n bf102 │ │ movs r0, r0 │ │ - b.n bfbf6 │ │ + b.n bfc06 │ │ @ instruction: 0xfff50aff │ │ asrs r4, r5, #32 │ │ - b.n bf09c │ │ + b.n bf0ac │ │ ldr r7, [r7, r1] │ │ - b.n bfca2 │ │ + b.n bfcb2 │ │ adds r0, #40 @ 0x28 │ │ - b.n bf0a4 │ │ + b.n bf0b4 │ │ movs r1, r0 │ │ - b.n bfcaa │ │ + b.n bfcba │ │ asrs r1, r0, #32 │ │ - b.n bf68c │ │ + b.n bf69c │ │ movs r4, r4 │ │ stmia.w sp, {r0, r1, ip, sp} │ │ - b.n bf694 │ │ + b.n bf6a4 │ │ movs r0, #59 @ 0x3b │ │ - b.n bfcba │ │ - ldr r2, [r5, #112] @ 0x70 │ │ + b.n bfcca │ │ + ldr r1, [r5, #112] @ 0x70 │ │ @ instruction: 0xebff0004 │ │ - b.n bf8c2 │ │ - beq.n bf5a4 │ │ - b.n bfa1c │ │ + b.n bf8d2 │ │ + beq.n bf5b4 │ │ + b.n bfa2c │ │ ldrh r0, [r6, #34] @ 0x22 │ │ - ldmia.w sp!, {r8, r9, ip, sp, lr, pc} │ │ + ldmia.w sp!, {r4, r8, r9, ip, sp, lr, pc} │ │ movs r1, r0 │ │ - ldrh r0, [r5, #42] @ 0x2a │ │ - vrsra.u32 d31, d16, #12 │ │ + ldrh r2, [r5, #44] @ 0x2c │ │ + vsri.64 , , #12 │ │ @ instruction: 0xfff448f0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n bfab8 │ │ - beq.n bf5b0 │ │ - b.n bfa3c │ │ + b.n bfac8 │ │ + beq.n bf5c0 │ │ + b.n bfa4c │ │ movs r0, #1 │ │ - b.n bf8e6 │ │ + b.n bf8f6 │ │ lsls r7, r7, #14 │ │ - b.n bfc8c │ │ + b.n bfc9c │ │ movs r5, r5 │ │ cmp r2, #0 │ │ strb r0, [r2, #0] │ │ - b.n bf0d2 │ │ + b.n bf0e2 │ │ str r0, [r0, r0] │ │ - b.n bf8f6 │ │ + b.n bf906 │ │ movs r2, r0 │ │ - b.n bf868 │ │ + b.n bf878 │ │ movs r4, r7 │ │ ldrh r0, [r0, #16] │ │ movs r4, r1 │ │ - b.n bfc66 │ │ + b.n bfc76 │ │ lsls r5, r1, #1 │ │ ldr r2, [sp, #0] │ │ movs r4, r2 │ │ - b.n bf0f4 │ │ + b.n bf104 │ │ ands r0, r0 │ │ - b.n bfd0e │ │ + b.n bfd1e │ │ movs r2, r0 │ │ - b.n bf872 │ │ + b.n bf882 │ │ movs r0, r3 │ │ lsrs r0, r0, #8 │ │ lsls r7, r0, #4 │ │ - b.n bfbda │ │ + b.n bfbea │ │ asrs r2, r0, #6 │ │ - b.n bf6de │ │ + b.n bf6ee │ │ cmp r7, #0 │ │ - b.n bfc00 │ │ + b.n bfc10 │ │ movs r0, r3 │ │ - b.n bf110 │ │ + b.n bf120 │ │ cmp r7, #255 @ 0xff │ │ - b.n bfc70 │ │ + b.n bfc80 │ │ asrs r2, r0, #32 │ │ - b.n bf5f0 │ │ + b.n bf600 │ │ str r0, [r4, #0] │ │ - b.n bfafc │ │ + b.n bfb0c │ │ strb r0, [r1, #0] │ │ - b.n bfa78 │ │ + b.n bfa88 │ │ movs r6, r0 │ │ - b.n bf89a │ │ + b.n bf8aa │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ asrs r7, r0, #32 │ │ - b.n bf942 │ │ + b.n bf952 │ │ str r2, [r3, #72] @ 0x48 │ │ add.w r0, r0, r0 │ │ - b.n bfcaa │ │ + b.n bfcba │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ asrs r0, r3, #32 │ │ - b.n bf13c │ │ + b.n bf14c │ │ movs r1, #167 @ 0xa7 │ │ - b.n bf956 │ │ + b.n bf966 │ │ movs r0, #20 │ │ - b.n bf124 │ │ + b.n bf134 │ │ movs r6, r0 │ │ - b.n bf8c0 │ │ + b.n bf8d0 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ asrs r6, r0, #32 │ │ - b.n bf966 │ │ + b.n bf976 │ │ movs r0, #96 @ 0x60 │ │ - b.n bfd6a │ │ + b.n bfd7a │ │ strb r0, [r0, #0] │ │ - b.n bf96e │ │ - ldrsb r4, [r4, r5] │ │ + b.n bf97e │ │ + ldrsb r1, [r5, r4] │ │ mla r0, r0, r7, r0 │ │ - b.n bf976 │ │ + b.n bf986 │ │ movs r0, r3 │ │ - b.n bf144 │ │ + b.n bf154 │ │ movs r4, r0 │ │ - b.n bf97e │ │ - beq.n bf660 │ │ - b.n bfad8 │ │ + b.n bf98e │ │ + beq.n bf670 │ │ + b.n bfae8 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r0, r1, r2} │ │ - b.n bf98a │ │ - str r0, [r5, #68] @ 0x44 │ │ + b.n bf99a │ │ + str r4, [r5, #68] @ 0x44 │ │ add.w r0, r0, r0 │ │ - b.n bfcf2 │ │ + b.n bfd02 │ │ @ instruction: 0xffed1aff │ │ ands r4, r1 │ │ - b.n bfd9a │ │ + b.n bfdaa │ │ movs r4, r0 │ │ - b.n bf99e │ │ - beq.n bf680 │ │ - b.n bfaf8 │ │ + b.n bf9ae │ │ + beq.n bf690 │ │ + b.n bfb08 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r2, r4, r6, r7} │ │ - b.n bf1a8 │ │ + b.n bf1b8 │ │ blxns r7 │ │ - b.n bfc7e │ │ - ldr r7, [pc, #1020] @ (bfa6c ) │ │ - b.n bfd10 │ │ + b.n bfc8e │ │ + ldr r7, [pc, #1020] @ (bfa7c ) │ │ + b.n bfd20 │ │ movs r0, r0 │ │ - b.n bf794 │ │ + b.n bf7a4 │ │ lsls r2, r3, #1 │ │ - b.n bf21a │ │ + b.n bf22a │ │ movs r0, r0 │ │ - b.n bfd1e │ │ + b.n bfd2e │ │ @ instruction: 0xffed0aff │ │ asrs r4, r7, #2 │ │ - b.n bf1c4 │ │ + b.n bf1d4 │ │ strh r7, [r7, r6] │ │ - b.n bfe4a │ │ + b.n bfe5a │ │ adds r0, #184 @ 0xb8 │ │ - b.n bf1cc │ │ + b.n bf1dc │ │ movs r1, r0 │ │ - b.n bfdd2 │ │ + b.n bfde2 │ │ asrs r1, r0, #32 │ │ - b.n bf7b4 │ │ + b.n bf7c4 │ │ movs r4, r4 │ │ stmia.w sp, {r0, r1, ip, sp} │ │ - b.n bf7bc │ │ + b.n bf7cc │ │ movs r0, #67 @ 0x43 │ │ - b.n bfde2 │ │ - ldr r0, [r4, #108] @ 0x6c │ │ + b.n bfdf2 │ │ + ldr r7, [r3, #108] @ 0x6c │ │ @ instruction: 0xebff0004 │ │ - b.n bf9ea │ │ - beq.n bf6cc │ │ - b.n bfb44 │ │ + b.n bf9fa │ │ + beq.n bf6dc │ │ + b.n bfb54 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r2, r4, r7} │ │ - b.n bf1f4 │ │ + b.n bf204 │ │ asrs r4, r7, #30 │ │ - b.n bfcca │ │ + b.n bfcda │ │ subs r7, r7, #7 │ │ - b.n bfd5c │ │ + b.n bfd6c │ │ ands r1, r1 │ │ - b.n bfbc4 │ │ + b.n bfbd4 │ │ movs r0, r0 │ │ - b.n bf7e4 │ │ + b.n bf7f4 │ │ lsls r2, r3, #1 │ │ - b.n bf26a │ │ + b.n bf27a │ │ movs r0, r0 │ │ - b.n bfd6e │ │ + b.n bfd7e │ │ @ instruction: 0xffd90aff │ │ asrs r0, r7, #1 │ │ - b.n bf214 │ │ + b.n bf224 │ │ movs r1, r0 │ │ - b.n bfe1a │ │ + b.n bfe2a │ │ adds r0, #116 @ 0x74 │ │ - b.n bf21c │ │ + b.n bf22c │ │ asrs r1, r0, #32 │ │ - b.n bf800 │ │ + b.n bf810 │ │ lsls r4, r0, #2 │ │ stmia.w sp, {r0, r1, ip, sp} │ │ - b.n bf808 │ │ + b.n bf818 │ │ movs r0, #71 @ 0x47 │ │ - b.n bfe2e │ │ - ldr r5, [r1, #108] @ 0x6c │ │ + b.n bfe3e │ │ + ldr r4, [r1, #108] @ 0x6c │ │ @ instruction: 0xebff0004 │ │ - b.n bfa36 │ │ - beq.n bf718 │ │ - b.n bfb90 │ │ + b.n bfa46 │ │ + beq.n bf728 │ │ + b.n bfba0 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r3, r4, ip, sp, lr} │ │ - b.n bf22c │ │ + b.n bf23c │ │ str r0, [r4, #0] │ │ - b.n bfc10 │ │ + b.n bfc20 │ │ ands r0, r0 │ │ - b.n bfe4a │ │ + b.n bfe5a │ │ movs r6, r0 │ │ - b.n bf9bc │ │ + b.n bf9cc │ │ @ instruction: 0xffc90aff │ │ movs r6, r0 │ │ - b.n bfa56 │ │ + b.n bfa66 │ │ asrs r7, r0, #32 │ │ - b.n bfa5a │ │ + b.n bfa6a │ │ movs r0, #96 @ 0x60 │ │ - b.n bfe5e │ │ - strb r3, [r1, r5] │ │ - @ instruction: 0xfa00000c │ │ - b.n bfe66 │ │ + b.n bfe6e │ │ + ldrsb r3, [r3, r1] │ │ + mla r0, r0, ip, r0 │ │ + b.n bfe76 │ │ movs r4, r2 │ │ - b.n bf234 │ │ + b.n bf244 │ │ movs r7, r0 │ │ - b.n bfa6e │ │ + b.n bfa7e │ │ str r3, [r4, #64] @ 0x40 │ │ add.w r0, r0, r8, lsr #24 │ │ - b.n bf240 │ │ + b.n bf250 │ │ movs r4, r0 │ │ - b.n bfa7a │ │ - beq.n bf75c │ │ - b.n bfbd4 │ │ + b.n bfa8a │ │ + beq.n bf76c │ │ + b.n bfbe4 │ │ ldrh r0, [r6, #6] │ │ - ldmia.w sp!, {r3, r4, r6, r7, r8, ip, sp, lr, pc} │ │ + ldmia.w sp!, {r3, r5, r6, r7, r8, ip, sp, lr, pc} │ │ movs r1, r0 │ │ - str r5, [sp, #376] @ 0x178 │ │ - @ instruction: 0xfff40b37 │ │ - vcle.s16 d31, d8, #0 │ │ + str r4, [sp, #612] @ 0x264 │ │ + vtbl.8 d16, {d4-d7}, d23 │ │ + vsra.u64 d31, d8, #11 │ │ movs r1, r0 │ │ - str r5, [sp, #72] @ 0x48 │ │ - @ instruction: 0xfff4cd22 │ │ + str r4, [sp, #308] @ 0x134 │ │ + @ instruction: 0xfff4cd2d │ │ @ instruction: 0xfff44bf0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n bfc7c │ │ - beq.n bf794 │ │ - b.n bfc00 │ │ + b.n bfc8c │ │ + beq.n bf7a4 │ │ + b.n bfc10 │ │ stmia r0!, {r3} │ │ - b.n bf2a0 │ │ + b.n bf2b0 │ │ asrs r4, r3, #1 │ │ - b.n bf30e │ │ + b.n bf31e │ │ str r0, [r2, #0] │ │ - b.n bf292 │ │ + b.n bf2a2 │ │ strb r4, [r3, #4] │ │ - b.n bf882 │ │ + b.n bf892 │ │ asrs r0, r0, #32 │ │ - b.n bfeba │ │ - b.n bf8f4 │ │ - b.n bf2ec │ │ + b.n bfeca │ │ + b.n bf904 │ │ + b.n bf2fc │ │ ldrh r0, [r2, #22] │ │ - b.n bfa10 │ │ + b.n bfa20 │ │ lsrs r0, r3 │ │ - b.n bfb14 │ │ + b.n bfb24 │ │ str r5, [r0, r0] │ │ - b.n bf7dc │ │ + b.n bf7ec │ │ str r4, [r0, #0] │ │ - b.n bf2bc │ │ + b.n bf2cc │ │ ands r4, r0 │ │ - b.n bf7e2 │ │ + b.n bf7f2 │ │ ands r5, r0 │ │ - b.n bfabe │ │ + b.n bface │ │ str r0, [sp, #4] │ │ asrs r0, r4, #6 │ │ strh r1, [r0, #0] │ │ asrs r0, r4, #6 │ │ str r2, [r0, r0] │ │ - b.n bfc5e │ │ + b.n bfc6e │ │ str r0, [r0, #0] │ │ - b.n bfd52 │ │ + b.n bfd62 │ │ movs r7, r3 │ │ subs r2, #0 │ │ movs r0, #8 │ │ - b.n bf852 │ │ + b.n bf862 │ │ movs r0, #9 │ │ - b.n bf958 │ │ + b.n bf968 │ │ movs r4, r3 │ │ subs r2, #0 │ │ asrs r0, r6, #4 │ │ - b.n bf2f8 │ │ + b.n bf308 │ │ asrs r1, r0, #32 │ │ - b.n bf8dc │ │ + b.n bf8ec │ │ asrs r2, r3, #1 │ │ - b.n bf364 │ │ + b.n bf374 │ │ movs r2, r0 │ │ - b.n bfe68 │ │ + b.n bfe78 │ │ movs r2, r4 │ │ cmp r2, #0 │ │ movs r0, #6 │ │ - b.n bf36e │ │ + b.n bf37e │ │ asrs r0, r0, #32 │ │ - b.n bff12 │ │ + b.n bff22 │ │ asrs r4, r2, #32 │ │ - b.n bf2f0 │ │ + b.n bf300 │ │ movs r0, r1 │ │ - b.n bfdfe │ │ + b.n bfe0e │ │ asrs r0, r2, #32 │ │ - b.n bf2f8 │ │ + b.n bf308 │ │ movs r4, r2 │ │ subs r0, r0, r0 │ │ str r0, [r1, #4] │ │ - b.n bf306 │ │ + b.n bf316 │ │ asrs r0, r2, #32 │ │ - b.n bf30a │ │ + b.n bf31a │ │ blx fp │ │ - b.n bfb7a │ │ + b.n bfb8a │ │ movs r0, #1 │ │ - b.n bfd1a │ │ + b.n bfd2a │ │ adds r0, #0 │ │ - b.n bfd40 │ │ + b.n bfd50 │ │ str r1, [r0, r0] │ │ - b.n bf888 │ │ + b.n bf898 │ │ strb r0, [r1, #0] │ │ - b.n bff3e │ │ + b.n bff4e │ │ movs r7, #248 @ 0xf8 │ │ - b.n bfb8e │ │ + b.n bfb9e │ │ str r0, [r2, #0] │ │ - b.n bfd20 │ │ + b.n bfd30 │ │ ands r4, r5 │ │ - b.n bf32a │ │ + b.n bf33a │ │ movs r0, #8 │ │ - b.n bff4e │ │ + b.n bff5e │ │ asrs r6, r0, #32 │ │ - b.n bfb52 │ │ + b.n bfb62 │ │ adds r0, #5 │ │ - b.n bfb56 │ │ + b.n bfb66 │ │ movs r4, r0 │ │ - b.n bfb5a │ │ + b.n bfb6a │ │ str r4, [r5, #76] @ 0x4c │ │ add.w r0, r0, r0, lsl #4 │ │ - b.n bffe2 │ │ + b.n bfff2 │ │ movs r0, r1 │ │ - b.n bfec6 │ │ + b.n bfed6 │ │ movs r5, r2 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n bfb6e │ │ - beq.n bf860 │ │ - b.n bfcc8 │ │ + b.n bfb7e │ │ + beq.n bf870 │ │ + b.n bfcd8 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r3, r5, r7} │ │ - b.n bfcc8 │ │ + b.n bfcd8 │ │ asrs r0, r5, #2 │ │ - b.n bf33e │ │ + b.n bf34e │ │ asrs r4, r5, #2 │ │ - b.n bf342 │ │ + b.n bf352 │ │ asrs r0, r0, #32 │ │ - b.n c0006 │ │ - bl 51b346 │ │ + b.n c0016 │ │ + bl 51b356 │ │ movs r1, r0 │ │ - b.n bfb8e │ │ - beq.n bf880 │ │ - b.n bfce8 │ │ + b.n bfb9e │ │ + beq.n bf890 │ │ + b.n bfcf8 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r2, r4, r7, ip} │ │ - b.n bf398 │ │ + b.n bf3a8 │ │ ands r0, r0 │ │ - b.n bfb9e │ │ + b.n bfbae │ │ adds r0, #144 @ 0x90 │ │ - b.n bf3a0 │ │ + b.n bf3b0 │ │ movs r2, r0 │ │ - b.n bffa6 │ │ + b.n bffb6 │ │ asrs r1, r0, #32 │ │ - b.n bf988 │ │ + b.n bf998 │ │ movs r0, #207 @ 0xcf │ │ - b.n bffae │ │ + b.n bffbe │ │ adds r0, #3 │ │ - b.n bf990 │ │ + b.n bf9a0 │ │ asrs r0, r0, #12 │ │ - stmia.w sp, {r0, r1, r3, r5, r6, r9, sl, fp, sp, lr} │ │ + stmia.w sp, {r1, r3, r5, r6, r9, sl, fp, sp, lr} │ │ @ instruction: 0xebff0004 │ │ - b.n bfbbe │ │ + b.n bfbce │ │ @ instruction: 0xffd1eaff │ │ movs r1, r0 │ │ - b.n bff66 │ │ + b.n bff76 │ │ movs r3, r0 │ │ - bge.n bf88a │ │ + bge.n bf89a │ │ str r6, [r0, #0] │ │ - b.n bf98e │ │ + b.n bf99e │ │ str r5, [r0, r0] │ │ - b.n bf992 │ │ + b.n bf9a2 │ │ strb r0, [r0, #0] │ │ - b.n bf924 │ │ + b.n bf934 │ │ movs r3, r0 │ │ and.w r3, r0, ip, asr #27 │ │ add.w r0, r0, r0 │ │ - b.n bf3c2 │ │ + b.n bf3d2 │ │ movs r4, r0 │ │ - b.n bff46 │ │ + b.n bff56 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ lsls r7, r7, #16 │ │ - b.n bff5c │ │ + b.n bff6c │ │ movs r0, #7 │ │ - b.n bfbf2 │ │ + b.n bfc02 │ │ movs r4, #63 @ 0x3f │ │ movs r3, #160 @ 0xa0 │ │ movs r4, r0 │ │ - b.n bfbfa │ │ + b.n bfc0a │ │ asrs r6, r0, #32 │ │ - b.n bfbfe │ │ + b.n bfc0e │ │ adds r0, #5 │ │ - b.n bfc02 │ │ + b.n bfc12 │ │ str r2, [r0, #76] @ 0x4c │ │ add.w r0, r0, r0 │ │ - b.n bfb78 │ │ + b.n bfb88 │ │ asrs r0, r0, #32 │ │ - b.n c008e │ │ + b.n c009e │ │ @ instruction: 0xffd50aff │ │ @ instruction: 0xffeaeaff │ │ movs r0, r0 │ │ - b.n bff7a │ │ + b.n bff8a │ │ asrs r0, r0, #32 │ │ - b.n c009e │ │ + b.n c00ae │ │ asrs r0, r0, #32 │ │ asrs r0, r4, #6 │ │ movs r1, r0 │ │ - b.n bfc26 │ │ - beq.n bf918 │ │ - b.n bfd80 │ │ + b.n bfc36 │ │ + beq.n bf928 │ │ + b.n bfd90 │ │ ldrh r0, [r6, #30] │ │ - ldmia.w sp!, {r4, r7, ip, sp, lr, pc} │ │ + ldmia.w sp!, {r5, r7, ip, sp, lr, pc} │ │ movs r1, r0 │ │ - add r4, pc, #292 @ (adr r4, bfa18 ) │ │ - @ instruction: 0xfff4e8fc │ │ + add r5, pc, #56 @ (adr r5, bf93c ) │ │ + vtbl.8 d30, {d20-d21}, d1 │ │ vcvt.f16.u16 q10, q8, #12 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n bfe1c │ │ + b.n bfe2c │ │ ands r0, r0 │ │ - b.n c0046 │ │ + b.n c0056 │ │ movs r0, r0 │ │ - b.n bffae │ │ + b.n bffbe │ │ movs r2, r2 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, #0] │ │ - b.n bfc52 │ │ + b.n bfc62 │ │ movs r0, r0 │ │ - b.n bf436 │ │ + b.n bf446 │ │ str r2, [r0, r0] │ │ - b.n bfc5a │ │ + b.n bfc6a │ │ movs r0, #4 │ │ - b.n c005e │ │ + b.n c006e │ │ movs r2, r0 │ │ - b.n bff4c │ │ + b.n bff5c │ │ movs r0, #1 │ │ lsls r0, r0, #12 │ │ str r1, [r1, #72] @ 0x48 │ │ add.w r0, r0, r0 │ │ - b.n bffce │ │ + b.n bffde │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ str r6, [r0, #60] @ 0x3c │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n bf45a │ │ + b.n bf46a │ │ movs r4, r0 │ │ - b.n bfc7e │ │ + b.n bfc8e │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r2} │ │ - b.n bff70 │ │ + b.n bff80 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n bf47a │ │ + b.n bf48a │ │ str r3, [r3, #72] @ 0x48 │ │ add.w r0, r0, r0 │ │ - b.n bfff6 │ │ + b.n c0006 │ │ @ instruction: 0xfff51aff │ │ movs r4, r0 │ │ - b.n bfc9e │ │ + b.n bfcae │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n bfe84 │ │ - beq.n bfa04 │ │ - b.n bfe08 │ │ + b.n bfe94 │ │ + beq.n bfa14 │ │ + b.n bfe18 │ │ str r0, [r6, r0] │ │ - b.n bf492 │ │ - ldr r6, [pc, #404] @ (bfb08 ) │ │ - b.n bff82 │ │ - ldr r6, [pc, #444] @ (bfb34 ) │ │ - b.n c0002 │ │ + b.n bf4a2 │ │ + ldr r6, [pc, #404] @ (bfb18 ) │ │ + b.n bff92 │ │ + ldr r6, [pc, #444] @ (bfb44 ) │ │ + b.n c0012 │ │ movs r0, r0 │ │ - b.n c0028 │ │ + b.n c0038 │ │ movs r3, #240 @ 0xf0 │ │ - b.n bfc18 │ │ + b.n bfc28 │ │ lsls r5, r0, #3 │ │ lsrs r0, r0, #8 │ │ asrs r4, r1, #5 │ │ - b.n bf4b4 │ │ - bl 51b48a │ │ + b.n bf4c4 │ │ + bl 51b49a │ │ lsls r0, r1, #5 │ │ - b.n bf4bc │ │ - bl 51b492 │ │ + b.n bf4cc │ │ + bl 51b4a2 │ │ movs r1, #76 @ 0x4c │ │ - b.n bf4c4 │ │ - bl 51b49a │ │ + b.n bf4d4 │ │ + bl 51b4aa │ │ adds r1, #72 @ 0x48 │ │ - b.n bf4cc │ │ - bl 51b4a2 │ │ + b.n bf4dc │ │ + bl 51b4b2 │ │ strb r2, [r0, #0] │ │ - b.n bf9ec │ │ + b.n bf9fc │ │ str r3, [r0, #0] │ │ - b.n bf9ee │ │ + b.n bf9fe │ │ strb r7, [r0, #0] │ │ - b.n bfcde │ │ + b.n bfcee │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ asrs r2, r0, #32 │ │ - b.n bfcfa │ │ + b.n bfd0a │ │ movs r3, r0 │ │ - b.n bfcfe │ │ - blx 4c1000 │ │ + b.n bfd0e │ │ + blx 4c1010 │ │ @ instruction: 0xfff3eaff │ │ movs r1, #200 @ 0xc8 │ │ - b.n bf4f4 │ │ - bl 51b4ca │ │ + b.n bf504 │ │ + bl 51b4da │ │ movs r4, r0 │ │ - b.n bfc76 │ │ + b.n bfc86 │ │ lsls r7, r5, #2 │ │ lsrs r0, r0, #8 │ │ cmp r4, #2 │ │ - b.n bfee4 │ │ + b.n bfef4 │ │ movs r0, #40 @ 0x28 │ │ - b.n bf3f4 │ │ + b.n bf404 │ │ movs r0, #0 │ │ - b.n c01a2 │ │ + b.n c01b2 │ │ str r4, [r6, r0] │ │ - b.n bf500 │ │ + b.n bf510 │ │ movs r2, #248 @ 0xf8 │ │ - b.n bfd84 │ │ + b.n bfd94 │ │ movs r0, r1 │ │ and.w r0, r0, r0, lsl #28 │ │ - b.n bfd32 │ │ - add r0, pc, #4 @ (adr r0, bf9f8 ) │ │ - b.n bfd36 │ │ + b.n bfd42 │ │ + add r0, pc, #4 @ (adr r0, bfa08 ) │ │ + b.n bfd46 │ │ str r4, [r6, r0] │ │ - b.n bf534 │ │ - ldr r6, [pc, #404] @ (bfb90 ) │ │ - b.n c000a │ │ - ldr r6, [pc, #444] @ (bfbbc ) │ │ - b.n c008a │ │ + b.n bf544 │ │ + ldr r6, [pc, #404] @ (bfba0 ) │ │ + b.n c001a │ │ + ldr r6, [pc, #444] @ (bfbcc ) │ │ + b.n c009a │ │ movs r1, #200 @ 0xc8 │ │ - b.n bf530 │ │ - bl 51b506 │ │ + b.n bf540 │ │ + bl 51b516 │ │ movs r4, r0 │ │ - b.n bfcb2 │ │ + b.n bfcc2 │ │ lsls r0, r3, #2 │ │ lsrs r0, r0, #8 │ │ rors r0, r1 │ │ - b.n bf520 │ │ + b.n bf530 │ │ movs r1, #196 @ 0xc4 │ │ - b.n bf544 │ │ - bl 51b51a │ │ + b.n bf554 │ │ + bl 51b52a │ │ movs r0, #36 @ 0x24 │ │ - b.n bf438 │ │ + b.n bf448 │ │ movs r0, r0 │ │ - b.n c00ca │ │ + b.n c00da │ │ movs r3, #208 @ 0xd0 │ │ - b.n bfcc0 │ │ - add r0, pc, #12 @ (adr r0, bfa38 ) │ │ - b.n bfd6e │ │ + b.n bfcd0 │ │ + add r0, pc, #12 @ (adr r0, bfa48 ) │ │ + b.n bfd7e │ │ strb r2, [r0, #0] │ │ - b.n bfd72 │ │ + b.n bfd82 │ │ @ instruction: 0xffef0aff │ │ movs r3, #208 @ 0xd0 │ │ - b.n bfcd0 │ │ + b.n bfce0 │ │ str r0, [r0, #0] │ │ - b.n c017e │ │ - add r0, pc, #12 @ (adr r0, bfa4c ) │ │ - b.n bfd82 │ │ + b.n c018e │ │ + add r0, pc, #12 @ (adr r0, bfa5c ) │ │ + b.n bfd92 │ │ strb r2, [r0, #0] │ │ - b.n bfd86 │ │ + b.n bfd96 │ │ movs r3, r1 │ │ and.w r0, r0, r4, ror #12 │ │ - b.n bf588 │ │ - ldr r6, [pc, #404] @ (bfbe4 ) │ │ - b.n c005e │ │ - ldr r6, [pc, #444] @ (bfc10 ) │ │ - b.n c00de │ │ + b.n bf598 │ │ + ldr r6, [pc, #404] @ (bfbf4 ) │ │ + b.n c006e │ │ + ldr r6, [pc, #444] @ (bfc20 ) │ │ + b.n c00ee │ │ adds r1, #200 @ 0xc8 │ │ - b.n bf580 │ │ - bl 51b55a │ │ + b.n bf590 │ │ + bl 51b56a │ │ strb r0, [r4, #0] │ │ - b.n bf498 │ │ + b.n bf4a8 │ │ movs r4, r0 │ │ - b.n bfd0c │ │ + b.n bfd1c │ │ lsls r5, r1, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, #36 @ 0x24 │ │ - b.n bf4a4 │ │ + b.n bf4b4 │ │ str r1, [r0, #0] │ │ - b.n bff7e │ │ + b.n bff8e │ │ movs r2, r0 │ │ - b.n bfd22 │ │ + b.n bfd32 │ │ @ instruction: 0xffde0aff │ │ movs r0, #40 @ 0x28 │ │ - b.n bf4b4 │ │ + b.n bf4c4 │ │ strh r6, [r0, r2] │ │ - b.n bfb86 │ │ + b.n bfb96 │ │ stmia r0!, {r4} │ │ - b.n bf5b0 │ │ - bl 51b586 │ │ + b.n bf5c0 │ │ + bl 51b596 │ │ movs r0, r0 │ │ - b.n c0146 │ │ + b.n c0156 │ │ @ instruction: 0xfff50aff │ │ strb r0, [r4, #0] │ │ - b.n bf4ac │ │ - b.n bfaa0 │ │ - b.n bf5c4 │ │ - bl 51b59a │ │ + b.n bf4bc │ │ + b.n bfab0 │ │ + b.n bf5d4 │ │ + bl 51b5aa │ │ movs r0, #0 │ │ - b.n bf5cc │ │ - bl 51b5a2 │ │ + b.n bf5dc │ │ + bl 51b5b2 │ │ adds r0, #4 │ │ - b.n bf5d4 │ │ - bl 51b5aa │ │ + b.n bf5e4 │ │ + bl 51b5ba │ │ strb r0, [r0, #0] │ │ - b.n bf5dc │ │ + b.n bf5ec │ │ ands r3, r0 │ │ - b.n bfb12 │ │ + b.n bfb22 │ │ str r0, [sp, #28] │ │ - b.n bfafe │ │ + b.n bfb0e │ │ ands r4, r0 │ │ - b.n bfdf0 │ │ - bl 51b5be │ │ + b.n bfe00 │ │ + bl 51b5ce │ │ movs r3, r4 │ │ lsrs r0, r0, #8 │ │ - blx 4c1108 │ │ - b.n bfad2 │ │ - b.n bfe0e │ │ + blx 4c1118 │ │ + b.n bfae2 │ │ + b.n bfe1e │ │ movs r0, #7 │ │ - b.n bfe12 │ │ + b.n bfe22 │ │ adds r0, #4 │ │ - b.n bf600 │ │ - bl 51b5d6 │ │ + b.n bf610 │ │ + bl 51b5e6 │ │ strb r0, [r0, #0] │ │ - b.n bf608 │ │ + b.n bf618 │ │ str r0, [sp, #12] │ │ - b.n bfb3e │ │ + b.n bfb4e │ │ ands r7, r0 │ │ - b.n bfb2a │ │ + b.n bfb3a │ │ ands r1, r1 │ │ - b.n bfe12 │ │ - bl 51b5ea │ │ + b.n bfe22 │ │ + bl 51b5fa │ │ movs r0, r3 │ │ lsrs r0, r0, #8 │ │ @ instruction: 0xfff3eaff │ │ - blx 4c1138 │ │ - b.n bfb04 │ │ - b.n bf628 │ │ - bl 51b5fe │ │ + blx 4c1148 │ │ + b.n bfb14 │ │ + b.n bf638 │ │ + bl 51b60e │ │ movs r0, #0 │ │ - b.n bf630 │ │ - bl 51b606 │ │ + b.n bf640 │ │ + bl 51b616 │ │ strh r4, [r0, #0] │ │ - b.n bf638 │ │ - bl 51b60e │ │ + b.n bf648 │ │ + bl 51b61e │ │ strb r0, [r0, #0] │ │ - b.n bf640 │ │ + b.n bf650 │ │ ands r0, r1 │ │ - b.n bfb76 │ │ + b.n bfb86 │ │ adds r0, #7 │ │ - b.n bfb62 │ │ + b.n bfb72 │ │ adds r0, #4 │ │ - b.n bfe48 │ │ - bl 51b622 │ │ + b.n bfe58 │ │ + bl 51b632 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ - blx 4c116c │ │ - b.n bfb40 │ │ - b.n bfe72 │ │ + blx 4c117c │ │ + b.n bfb50 │ │ + b.n bfe82 │ │ movs r0, #7 │ │ - b.n bfe76 │ │ + b.n bfe86 │ │ strh r4, [r0, #0] │ │ - b.n bf664 │ │ - bl 51b63a │ │ + b.n bf674 │ │ + bl 51b64a │ │ strb r0, [r0, #0] │ │ - b.n bf66c │ │ + b.n bf67c │ │ adds r0, #8 │ │ - b.n bfba2 │ │ + b.n bfbb2 │ │ ands r7, r0 │ │ - b.n bfb8e │ │ + b.n bfb9e │ │ adds r0, #3 │ │ - b.n bfe76 │ │ - bl 51b64e │ │ + b.n bfe86 │ │ + bl 51b65e │ │ @ instruction: 0xfff41aff │ │ strh r0, [r2, #6] │ │ - b.n bfee4 │ │ + b.n bfef4 │ │ adds r0, #9 │ │ - b.n bfbba │ │ + b.n bfbca │ │ ands r0, r1 │ │ - b.n bfba6 │ │ + b.n bfbb6 │ │ adds r0, #3 │ │ - b.n bfe8e │ │ + b.n bfe9e │ │ @ instruction: 0xffe21aff │ │ adds r0, #0 │ │ - b.n bfc12 │ │ + b.n bfc22 │ │ adds r0, #1 │ │ - b.n bfd2e │ │ + b.n bfd3e │ │ @ instruction: 0xffb43aff │ │ strb r0, [r4, #0] │ │ - b.n bf5b0 │ │ + b.n bf5c0 │ │ adds r0, #7 │ │ - b.n bfc22 │ │ + b.n bfc32 │ │ adds r0, #10 │ │ - b.n bfd3e │ │ + b.n bfd4e │ │ @ instruction: 0xffb82aff │ │ adds r0, #0 │ │ - b.n bfbce │ │ + b.n bfbde │ │ strb r1, [r0, #0] │ │ - b.n bfbea │ │ + b.n bfbfa │ │ adds r0, #7 │ │ - b.n bfeb8 │ │ + b.n bfec8 │ │ strb r2, [r0, #0] │ │ - b.n bfed6 │ │ - add r0, pc, #56 @ (adr r0, bfbd0 ) │ │ - b.n bfeda │ │ + b.n bfee6 │ │ + add r0, pc, #56 @ (adr r0, bfbe0 ) │ │ + b.n bfeea │ │ @ instruction: 0xffb21aff │ │ @ instruction: 0xff92eaff │ │ ldrh r7, [r3, #60] @ 0x3c │ │ - b.n bff10 │ │ + b.n bff20 │ │ adds r0, #2 │ │ - b.n bfbfa │ │ + b.n bfc0a │ │ ands r6, r1 │ │ - b.n bfc00 │ │ + b.n bfc10 │ │ adds r0, #4 │ │ - b.n bfed8 │ │ + b.n bfee8 │ │ movs r3, r1 │ │ subs r0, r0, r0 │ │ - bl 51b6b6 │ │ + bl 51b6c6 │ │ strh r0, [r3, #22] │ │ - b.n bff58 │ │ + b.n bff68 │ │ str r0, [sp, #32] │ │ - b.n bff02 │ │ + b.n bff12 │ │ strh r0, [r7, #22] │ │ - b.n bff60 │ │ + b.n bff70 │ │ subs r7, #152 @ 0x98 │ │ - b.n bff14 │ │ + b.n bff24 │ │ movs r0, r0 │ │ - b.n c0274 │ │ + b.n c0284 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ ldrh r7, [r3, #60] @ 0x3c │ │ - b.n bff40 │ │ + b.n bff50 │ │ adds r0, #2 │ │ - b.n bfc2a │ │ + b.n bfc3a │ │ ands r6, r1 │ │ - b.n bfc30 │ │ + b.n bfc40 │ │ adds r0, #4 │ │ - b.n bff08 │ │ + b.n bff18 │ │ @ instruction: 0xfff40aff │ │ adds r0, #0 │ │ - b.n c032a │ │ - bl 4df6ea │ │ + b.n c033a │ │ + bl 4df6fa │ │ movs r0, r0 │ │ and.w r0, r0, r1, lsl #12 │ │ - b.n c0336 │ │ + b.n c0346 │ │ movs r0, r0 │ │ - b.n c02a0 │ │ - bl 51b6fa │ │ + b.n c02b0 │ │ + bl 51b70a │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ adds r0, #188 @ 0xbc │ │ - b.n bf744 │ │ + b.n bf754 │ │ adds r0, #3 │ │ - b.n bfd28 │ │ + b.n bfd38 │ │ adds r0, #90 @ 0x5a │ │ - b.n bf7b4 │ │ + b.n bf7c4 │ │ movs r3, r0 │ │ - b.n c02b8 │ │ + b.n c02c8 │ │ movs r1, r0 │ │ cmp r2, #0 │ │ strb r0, [r4, #0] │ │ - b.n bf650 │ │ + b.n bf660 │ │ @ instruction: 0xff92eaff │ │ ands r0, r0 │ │ - b.n bff62 │ │ + b.n bff72 │ │ movs r0, r3 │ │ - b.n bf740 │ │ + b.n bf750 │ │ str r1, [r0, r0] │ │ - b.n bff6a │ │ + b.n bff7a │ │ asrs r4, r3, #32 │ │ - b.n bf748 │ │ + b.n bf758 │ │ lsls r0, r2, #15 │ │ - b.n bfec8 │ │ + b.n bfed8 │ │ movs r0, r4 │ │ - b.n bf750 │ │ + b.n bf760 │ │ asrs r4, r4, #32 │ │ - b.n bf754 │ │ + b.n bf764 │ │ movs r4, r4 │ │ - b.n bf674 │ │ + b.n bf684 │ │ movs r0, #16 │ │ - b.n bf75c │ │ + b.n bf76c │ │ movs r0, #106 @ 0x6a │ │ - b.n c0386 │ │ + b.n c0396 │ │ asrs r1, r0, #32 │ │ @ instruction: 0xe98d0003 │ │ - b.n c038e │ │ - b.n bfc78 │ │ - b.n bf76c │ │ + b.n c039e │ │ + b.n bfc88 │ │ + b.n bf77c │ │ str r0, [r0, #0] │ │ - b.n bf770 │ │ + b.n bf780 │ │ asrs r4, r5, #1 │ │ - b.n bf798 │ │ + b.n bf7a8 │ │ adds r0, #108 @ 0x6c │ │ - b.n bf79c │ │ + b.n bf7ac │ │ asrs r1, r0, #32 │ │ - b.n bfd80 │ │ + b.n bfd90 │ │ adds r0, #3 │ │ - b.n bfd84 │ │ - ldr r7, [r5, #84] @ 0x54 │ │ + b.n bfd94 │ │ + ldr r6, [r5, #84] @ 0x54 │ │ @ instruction: 0xebff0004 │ │ - b.n bffae │ │ + b.n bffbe │ │ asrs r5, r0, #32 │ │ - b.n bffb2 │ │ + b.n bffc2 │ │ @ instruction: 0xffe7eaff │ │ movs r0, #0 │ │ - b.n bfcc8 │ │ + b.n bfcd8 │ │ adds r0, #1 │ │ - b.n bfcd2 │ │ + b.n bfce2 │ │ movs r0, #3 │ │ - b.n bffa6 │ │ + b.n bffb6 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ movs r7, r0 │ │ - b.n bffca │ │ + b.n bffda │ │ asrs r2, r1, #32 │ │ - b.n bffce │ │ + b.n bffde │ │ strb r0, [r1, #5] │ │ - b.n bf79c │ │ - add r1, pc, #304 @ (adr r1, bfdc4 ) │ │ - b.n bf7a0 │ │ - beq.n bfcd0 │ │ - b.n c0130 │ │ + b.n bf7ac │ │ + add r1, pc, #304 @ (adr r1, bfdd4 ) │ │ + b.n bf7b0 │ │ + beq.n bfce0 │ │ + b.n c0140 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r6, ip} │ │ - b.n bf7c2 │ │ + b.n bf7d2 │ │ rors r0, r1 │ │ - b.n bf7a8 │ │ + b.n bf7b8 │ │ lsls r0, r1, #1 │ │ - b.n bf7ca │ │ + b.n bf7da │ │ movs r3, #208 @ 0xd0 │ │ - b.n bff44 │ │ + b.n bff54 │ │ lsrs r2, r2, #29 │ │ - b.n c01b2 │ │ + b.n c01c2 │ │ asrs r3, r0, #32 │ │ - b.n bfff6 │ │ + b.n c0006 │ │ movs r0, #240 @ 0xf0 │ │ - b.n c003a │ │ + b.n c004a │ │ movs r2, r0 │ │ - b.n bfffe │ │ - beq.n bfcf8 │ │ - b.n c0158 │ │ + b.n c000e │ │ + beq.n bfd08 │ │ + b.n c0168 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r2, r6, sl, fp, sp, lr, pc} │ │ + ldmia.w sp!, {r2, r4, r6, sl, fp, sp, lr, pc} │ │ movs r1, r0 │ │ - ldrd pc, pc, [r5], #976 @ 0x3d0 │ │ - ldrh r1, [r6, #18] │ │ + @ instruction: 0xeabffff4 │ │ + ldrh r3, [r6, #20] │ │ vqshrun.s64 d20, q8, #12 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n c01f4 │ │ + b.n c0204 │ │ adds r2, #80 @ 0x50 │ │ - b.n bf7fe │ │ + b.n bf80e │ │ stmia r2!, {r2, r4, r6} │ │ - b.n bf802 │ │ + b.n bf812 │ │ movs r1, r0 │ │ - b.n bff8c │ │ + b.n bff9c │ │ adds r0, #1 │ │ movs r1, #160 @ 0xa0 │ │ adds r2, #80 @ 0x50 │ │ - b.n bf7ee │ │ + b.n bf7fe │ │ adds r1, #1 │ │ - b.n bfc2a │ │ + b.n bfc3a │ │ adds r0, #1 │ │ - b.n c03fc │ │ + b.n c040c │ │ adds r1, #1 │ │ - b.n bfc12 │ │ + b.n bfc22 │ │ stmia r2!, {r2, r4, r6} │ │ - b.n bf81e │ │ + b.n bf82e │ │ adds r0, #0 │ │ - b.n bf83a │ │ + b.n bf84a │ │ movs r1, r0 │ │ - b.n bffac │ │ + b.n bffbc │ │ adds r0, #1 │ │ lsls r3, r0, #9 │ │ movs r2, r0 │ │ - b.n c03b2 │ │ + b.n c03c2 │ │ adds r0, #0 │ │ - b.n bf82a │ │ + b.n bf83a │ │ ldrh r0, [r6, #0] │ │ subs r0, #189 @ 0xbd │ │ stmia r0!, {r0} │ │ - b.n c045a │ │ - b.n bfd1e │ │ - b.n c01c0 │ │ + b.n c046a │ │ + b.n bfd2e │ │ + b.n c01d0 │ │ movs r6, r2 │ │ lsrs r0, r0, #8 │ │ adds r2, #84 @ 0x54 │ │ - b.n bf846 │ │ + b.n bf856 │ │ asrs r1, r0 │ │ - b.n bfc50 │ │ + b.n bfc60 │ │ adds r0, #4 │ │ - b.n c01b4 │ │ + b.n c01c4 │ │ str r1, [r0, r4] │ │ - b.n bfc58 │ │ + b.n bfc68 │ │ lsls r4, r4 │ │ - b.n bfe4e │ │ + b.n bfe5e │ │ lsls r5, r4, #2 │ │ - b.n bffe2 │ │ + b.n bfff2 │ │ movs r7, r1 │ │ subs r0, r0, r0 │ │ negs r0, r2 │ │ - b.n bf862 │ │ + b.n bf872 │ │ movs r0, #1 │ │ - b.n c01ca │ │ + b.n c01da │ │ movs r4, r0 │ │ - b.n c0006 │ │ + b.n c0016 │ │ ands r6, r1 │ │ adds r1, #160 @ 0xa0 │ │ negs r0, r2 │ │ - b.n bf852 │ │ + b.n bf862 │ │ asrs r1, r0 │ │ - b.n bfc7c │ │ + b.n bfc8c │ │ ands r1, r0 │ │ - b.n c0462 │ │ + b.n c0472 │ │ asrs r1, r0 │ │ - b.n bfc64 │ │ + b.n bfc74 │ │ asrs r4, r2, #9 │ │ - b.n bf882 │ │ + b.n bf892 │ │ adds r0, #0 │ │ - b.n bf888 │ │ + b.n bf898 │ │ movs r3, r0 │ │ - b.n c0026 │ │ + b.n c0036 │ │ adds r0, #1 │ │ lsls r3, r0, #9 │ │ adds r0, #0 │ │ - b.n bf874 │ │ + b.n bf884 │ │ movs r1, r0 │ │ - b.n c041a │ │ + b.n c042a │ │ asrs r6, r1, #32 │ │ - b.n c00ba │ │ + b.n c00ca │ │ @ instruction: 0xffe68aff │ │ ldrh r0, [r6, #0] │ │ ldmia.w sp!, {r4, r5, r6, r7, fp, lr} │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n c02a4 │ │ + b.n c02b4 │ │ adds r0, #0 │ │ - b.n bf8ae │ │ + b.n bf8be │ │ str r0, [r0, r0] │ │ - b.n bf8b8 │ │ + b.n bf8c8 │ │ str r4, [r0, #0] │ │ - b.n bf7bc │ │ + b.n bf7cc │ │ ands r2, r0 │ │ - b.n bfea4 │ │ + b.n bfeb4 │ │ movs r4, r0 │ │ - b.n c004a │ │ + b.n c005a │ │ movs r7, r1 │ │ subs r2, #0 │ │ movs r0, r0 │ │ - b.n c04e6 │ │ + b.n c04f6 │ │ movs r0, r0 │ │ - b.n c0454 │ │ + b.n c0464 │ │ ands r0, r0 │ │ - b.n bf8b4 │ │ + b.n bf8c4 │ │ movs r3, r3 │ │ lsrs r0, r0, #8 │ │ strb r5, [r0, #4] │ │ - b.n bfcdc │ │ + b.n bfcec │ │ movs r1, r0 │ │ - b.n c0068 │ │ + b.n c0078 │ │ movs r5, r0 │ │ ldrh r0, [r0, #16] │ │ strb r4, [r0, #4] │ │ - b.n bfcc8 │ │ + b.n bfcd8 │ │ ands r1, r0 │ │ - b.n c024e │ │ + b.n c025e │ │ str r1, [r0, r0] │ │ - b.n c0274 │ │ + b.n c0284 │ │ @ instruction: 0xfff81aff │ │ str r0, [r0, r0] │ │ - b.n c0512 │ │ + b.n c0522 │ │ ands r2, r0 │ │ - b.n c0116 │ │ + b.n c0126 │ │ movs r5, r0 │ │ - b.n c0082 │ │ + b.n c0092 │ │ movs r3, r2 │ │ ldrh r0, [r0, #16] │ │ movs r0, r6 │ │ and.w r0, r0, r1, lsl #24 │ │ - b.n c0126 │ │ + b.n c0136 │ │ asrs r4, r0, #32 │ │ - b.n c012a │ │ + b.n c013a │ │ strb r2, [r0, #0] │ │ - b.n c012e │ │ + b.n c013e │ │ str r0, [r0, r0] │ │ - b.n c0132 │ │ + b.n c0142 │ │ ldc2 11, cr14, [r0, #1020]! @ 0x3fc @ │ │ movs r0, r0 │ │ - b.n c049a │ │ + b.n c04aa │ │ ldrh r0, [r6, #6] │ │ adds r5, r7, r2 │ │ adds r0, #0 │ │ - b.n bf92c │ │ + b.n bf93c │ │ movs r0, #7 │ │ - b.n c0146 │ │ + b.n c0156 │ │ asrs r6, r0, #32 │ │ - b.n c014a │ │ + b.n c015a │ │ str r0, [r0, r0] │ │ - b.n bf934 │ │ + b.n bf944 │ │ ands r7, r0 │ │ - b.n bff1c │ │ + b.n bff2c │ │ movs r0, r0 │ │ - b.n c0556 │ │ + b.n c0566 │ │ movs r0, r0 │ │ - b.n c04c4 │ │ + b.n c04d4 │ │ ands r0, r0 │ │ - b.n bf924 │ │ + b.n bf934 │ │ @ instruction: 0xffe31aff │ │ str r0, [r0, r0] │ │ - b.n c0566 │ │ + b.n c0576 │ │ movs r5, r0 │ │ - b.n c00d2 │ │ + b.n c00e2 │ │ movs r5, r3 │ │ ldr r2, [sp, #0] │ │ stmia r0!, {r0, r2} │ │ - b.n bfeba │ │ + b.n bfeca │ │ movs r4, r0 │ │ - b.n c04ee │ │ + b.n c04fe │ │ movs r1, r0 │ │ cmp r2, #0 │ │ movs r0, #4 │ │ - b.n c017e │ │ + b.n c018e │ │ movs r3, r2 │ │ and.w r0, r0, r8, asr #9 │ │ - b.n c0364 │ │ - b.n bfe4e │ │ - b.n c05e2 │ │ + b.n c0374 │ │ + b.n bfe5e │ │ + b.n c05f2 │ │ lsrs r7, r5, #11 │ │ orn r0, r2, #581632 @ 0x8e000 │ │ - b.n bfeda │ │ + b.n bfeea │ │ asrs r4, r0 │ │ - b.n bff5c │ │ + b.n bff6c │ │ str r7, [r1, #0] │ │ - b.n c061a │ │ + b.n c062a │ │ subs r0, r2, r6 │ │ cdp 0, 10, cr1, cr2, cr1, {0} │ │ - b.n bff7e │ │ + b.n bff8e │ │ lsrs r0, r4, #3 │ │ @ instruction: 0xf262400c │ │ - b.n c02f2 │ │ + b.n c0302 │ │ movs r0, #84 @ 0x54 │ │ movt r0, #1806 @ 0x70e │ │ - b.n c01b2 │ │ + b.n c01c2 │ │ eors r0, r4 │ │ @ instruction: 0xf3f808e2 │ │ @ instruction: 0xf2607004 │ │ - b.n c032c │ │ - ldr r0, [pc, #912] @ (c0210 ) │ │ + b.n c033c │ │ + ldr r0, [pc, #912] @ (c0220 ) │ │ @ instruction: 0xf2f44a86 │ │ - bl ffd04e78 │ │ + bl ffd04e88 │ │ subs r7, r7, r3 │ │ movs r6, r1 │ │ - b.n c0146 │ │ + b.n c0156 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ asrs r2, r0, #4 │ │ - b.n bfd9c │ │ + b.n bfdac │ │ movs r0, #1 │ │ - b.n c031e │ │ + b.n c032e │ │ asrs r1, r0, #32 │ │ - b.n c03a0 │ │ + b.n c03b0 │ │ movs r5, r0 │ │ - b.n c0146 │ │ + b.n c0156 │ │ @ instruction: 0xfffa8aff │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {ip, sp, lr, pc} │ │ - b.n c04ee │ │ - blx 4c04f0 │ │ + b.n c04fe │ │ + blx 4c0500 │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r1, r0 │ │ movs r0, r0 │ │ movs r2, r0 │ │ movs r0, r0 │ │ movs r3, r0 │ │ movs r0, r0 │ │ - ldr r4, [pc, #64] @ (bff04 ) │ │ + ldr r4, [pc, #64] @ (bff14 ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n c03e4 │ │ + b.n c03f4 │ │ asrs r4, r1, #32 │ │ ldmia.w r0, {r0, sp, lr, pc} │ │ - b.n c0358 │ │ + b.n c0368 │ │ adds r0, #129 @ 0x81 │ │ - b.n bffd8 │ │ + b.n bffe8 │ │ movs r1, r0 │ │ - b.n c017e │ │ - b.n bfee4 │ │ - b.n bf9de │ │ + b.n c018e │ │ + b.n bfef4 │ │ + b.n bf9ee │ │ adds r1, #3 │ │ - b.n bffe2 │ │ + b.n bfff2 │ │ movs r0, #1 │ │ movs r2, #66 @ 0x42 │ │ movs r0, #0 │ │ - b.n bf9ea │ │ + b.n bf9fa │ │ ands r0, r3 │ │ - b.n bfa14 │ │ + b.n bfa24 │ │ movs r0, #4 │ │ - b.n bff8a │ │ + b.n bff9a │ │ movs r0, #8 │ │ - b.n bf9f6 │ │ + b.n bfa06 │ │ movs r1, r0 │ │ - b.n bff96 │ │ + b.n bffa6 │ │ asrs r0, r3, #32 │ │ - b.n c063e │ │ + b.n c064e │ │ lsls r0, r0, #2 │ │ - b.n c0002 │ │ + b.n c0012 │ │ movs r1, #0 │ │ - b.n c0008 │ │ + b.n c0018 │ │ movs r0, r2 │ │ - b.n c0410 │ │ + b.n c0420 │ │ asrs r4, r3, #32 │ │ - b.n c0414 │ │ - strb r5, [r5, r4] │ │ + b.n c0424 │ │ + strb r6, [r3, r1] │ │ mls ip, r0, r0, r8 │ │ ldmia.w sp!, {r4, r5, fp, lr} │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n c0438 │ │ + b.n c0448 │ │ lsrs r7, r7, #1 │ │ - b.n c05c4 │ │ + b.n c05d4 │ │ movs r0, #239 @ 0xef │ │ - b.n c052a │ │ + b.n c053a │ │ adds r7, r7, r1 │ │ movs r3, #160 @ 0xa0 │ │ ands r0, r0 │ │ - b.n c026e │ │ + b.n c027e │ │ asrs r1, r0, #2 │ │ - b.n c0034 │ │ + b.n c0044 │ │ lsls r0, r0, #9 │ │ - b.n bfa56 │ │ + b.n bfa66 │ │ asrs r1, r0, #6 │ │ - b.n c003e │ │ + b.n c004e │ │ movs r0, #0 │ │ - b.n c055a │ │ + b.n c056a │ │ cmp r7, #255 @ 0xff │ │ - b.n c05c4 │ │ + b.n c05d4 │ │ str r2, [r0, r0] │ │ - b.n bff48 │ │ + b.n bff58 │ │ asrs r0, r1, #32 │ │ - b.n c03d4 │ │ + b.n c03e4 │ │ str r0, [r1, #36] @ 0x24 │ │ add.w r0, r0, r0 │ │ - b.n c05f2 │ │ + b.n c0602 │ │ cmp r2, #171 @ 0xab │ │ asrs r2, r1, #12 │ │ asrs r0, r6, #3 │ │ asrs r5, r0, #9 │ │ cmp r2, #170 @ 0xaa │ │ asrs r2, r1, #13 │ │ lsls r0, r0, #9 │ │ @@ -242944,23032 +242824,23032 @@ │ │ asrs r2, r4, #8 │ │ asrs r0, r4, #6 │ │ asrs r4, r1, #32 │ │ asrs r0, r0, #22 │ │ ldrh r0, [r6, #0] │ │ ldmia.w sp!, {r4, sl, fp, lr} │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n c0494 │ │ - beq.n bff8c │ │ - b.n c0418 │ │ + b.n c04a4 │ │ + beq.n bff9c │ │ + b.n c0428 │ │ ands r0, r0 │ │ - b.n c02c2 │ │ + b.n c02d2 │ │ lsls r4, r4, #2 │ │ - b.n bfac4 │ │ + b.n bfad4 │ │ movs r0, r0 │ │ - b.n c00a8 │ │ + b.n c00b8 │ │ lsls r2, r3, #1 │ │ - b.n bfb2e │ │ + b.n bfb3e │ │ movs r0, r0 │ │ - b.n c0632 │ │ + b.n c0642 │ │ movs r1, r3 │ │ subs r0, r0, r0 │ │ movs r4, r1 │ │ - b.n bfac2 │ │ + b.n bfad2 │ │ asrs r4, r0, #32 │ │ - b.n bfabe │ │ + b.n bface │ │ asrs r2, r0, #32 │ │ - b.n c06a4 │ │ + b.n c06b4 │ │ asrs r4, r0, #32 │ │ - b.n bfaa6 │ │ + b.n bfab6 │ │ asrs r4, r0, #32 │ │ - b.n c02ea │ │ + b.n c02fa │ │ lsrs r0, r2, #31 │ │ - b.n c05cc │ │ + b.n c05dc │ │ movs r0, #4 │ │ - b.n bfb94 │ │ + b.n bfba4 │ │ movs r1, r0 │ │ - b.n c05da │ │ + b.n c05ea │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ asrs r0, r3, #32 │ │ - b.n bfae6 │ │ + b.n bfaf6 │ │ movs r0, #180 @ 0xb4 │ │ - b.n c036a │ │ + b.n c037a │ │ movs r0, r0 │ │ - b.n c0668 │ │ + b.n c0678 │ │ movs r0, #0 │ │ - b.n c02ce │ │ + b.n c02de │ │ movs r0, #180 @ 0xb4 │ │ - b.n c0356 │ │ + b.n c0366 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, #0 │ │ - b.n c0716 │ │ + b.n c0726 │ │ movs r0, #188 @ 0xbc │ │ - b.n bfadc │ │ + b.n bfaec │ │ asrs r4, r0, #32 │ │ - b.n c04e0 │ │ + b.n c04f0 │ │ movs r2, r0 │ │ and.w r0, r0, r0, lsr #8 │ │ - b.n bfb0e │ │ + b.n bfb1e │ │ adds r0, #0 │ │ - b.n c072a │ │ + b.n c073a │ │ adds r0, #8 │ │ - b.n bfaf2 │ │ + b.n bfb02 │ │ movs r1, r0 │ │ - b.n c04f2 │ │ + b.n c0502 │ │ lsls r0, r6, #2 │ │ - b.n c0378 │ │ - beq.n c0008 │ │ - b.n c0490 │ │ + b.n c0388 │ │ + beq.n c0018 │ │ + b.n c04a0 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r3, r4, r6, r7} │ │ - b.n c038a │ │ + b.n c039a │ │ movs r0, #76 @ 0x4c │ │ - b.n bfb28 │ │ + b.n bfb38 │ │ asrs r4, r4, #32 │ │ - b.n bfb48 │ │ + b.n bfb58 │ │ adds r0, #36 @ 0x24 │ │ - b.n bfb4c │ │ + b.n bfb5c │ │ movs r2, r0 │ │ - b.n c0092 │ │ + b.n c00a2 │ │ asrs r1, r0, #32 │ │ - b.n c0134 │ │ + b.n c0144 │ │ movs r0, r0 │ │ - b.n bfb34 │ │ + b.n bfb44 │ │ adds r0, #3 │ │ - b.n c013c │ │ + b.n c014c │ │ movs r1, r0 │ │ - b.n c0762 │ │ + b.n c0772 │ │ movs r1, #59 @ 0x3b │ │ - b.n c0626 │ │ - ldr r7, [r7, #68] @ 0x44 │ │ + b.n c0636 │ │ + ldr r6, [r7, #68] @ 0x44 │ │ @ instruction: 0xebffffd9 │ │ - @ instruction: 0xeaffe8c4 │ │ + @ instruction: 0xeaffe8d4 │ │ movs r1, r0 │ │ - ldc 15, cr15, [r3], {244} @ 0xf4 │ │ - @ instruction: 0xb864 │ │ + ldc 15, cr15, [r5, #976] @ 0x3d0 │ │ + @ instruction: 0xb844 │ │ vtbl.8 d20, {d4}, d0 │ │ stmdb sp!, {r0, r2, r3, ip, sp, pc} │ │ - b.n c0382 │ │ - beq.n c00f4 │ │ - b.n c04e0 │ │ + b.n c0392 │ │ + beq.n c0104 │ │ + b.n c04f0 │ │ asrs r5, r1, #32 │ │ - b.n c038a │ │ + b.n c039a │ │ str r0, [r7, #48] @ 0x30 │ │ add.w r0, r0, r0 │ │ - b.n c06f2 │ │ + b.n c0702 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ str r5, [r7, #28] │ │ add.w r0, r0, r0 │ │ - b.n bfb7e │ │ - beq.n c0076 │ │ - b.n c03a2 │ │ + b.n bfb8e │ │ + beq.n c0086 │ │ + b.n c03b2 │ │ ldrh r0, [r0, #0] │ │ ldmia.w sp!, {ip} │ │ - b.n bfba4 │ │ + b.n bfbb4 │ │ cmp r1, #147 @ 0x93 │ │ - b.n c0670 │ │ + b.n c0680 │ │ movs r1, #2 │ │ - b.n c06f2 │ │ + b.n c0702 │ │ movs r0, r0 │ │ - b.n c0836 │ │ + b.n c0846 │ │ movs r2, r0 │ │ - b.n c031c │ │ + b.n c032c │ │ movs r0, r1 │ │ - bge.n c007e │ │ + bge.n c008e │ │ cmp r1, #148 @ 0x94 │ │ - b.n c0684 │ │ + b.n c0694 │ │ movs r1, #2 │ │ - b.n c0706 │ │ + b.n c0716 │ │ movs r2, r0 │ │ - b.n c032c │ │ + b.n c033c │ │ cmp r5, #69 @ 0x45 │ │ asrs r3, r0, #12 │ │ cmp r0, #205 @ 0xcd │ │ asrs r2, r0, #13 │ │ movs r2, r0 │ │ asrs r1, r2, #5 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ - beq.n c00b2 │ │ - b.n c03de │ │ + beq.n c00c2 │ │ + b.n c03ee │ │ ldrh r0, [r0, #0] │ │ ldmia.w sp!, {r1, r2, r4, r5, r6, r7, fp, sp} │ │ - b.n c06b0 │ │ + b.n c06c0 │ │ movs r5, #132 @ 0x84 │ │ - b.n c073a │ │ + b.n c074a │ │ movs r2, r0 │ │ - b.n c0350 │ │ + b.n c0360 │ │ @ instruction: 0xfff90aff │ │ movs r2, #117 @ 0x75 │ │ - b.n c06c4 │ │ + b.n c06d4 │ │ movs r2, r0 │ │ - b.n c035c │ │ + b.n c036c │ │ movs r0, r0 │ │ asrs r0, r4, #14 │ │ - beq.n c00d6 │ │ - b.n c0402 │ │ + beq.n c00e6 │ │ + b.n c0412 │ │ ldrh r0, [r0, #0] │ │ ldmia.w sp!, {r3, r5, r6, r8, r9, sp} │ │ - b.n c06d8 │ │ + b.n c06e8 │ │ movs r3, #113 @ 0x71 │ │ - b.n c075c │ │ + b.n c076c │ │ movs r2, r0 │ │ - b.n c0374 │ │ + b.n c0384 │ │ movs r0, r0 │ │ asrs r0, r4, #14 │ │ - beq.n c00ee │ │ - b.n c041a │ │ + beq.n c00fe │ │ + b.n c042a │ │ ldrh r0, [r0, #0] │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n c0600 │ │ + b.n c0610 │ │ svc 95 @ 0x5f │ │ - b.n c0584 │ │ - bge.n c00ee │ │ - b.n c0588 │ │ + b.n c0594 │ │ + bge.n c00fe │ │ + b.n c0598 │ │ str r1, [r0, r0] │ │ - b.n c0432 │ │ + b.n c0442 │ │ asrs r4, r1, #1 │ │ - b.n c058c │ │ + b.n c059c │ │ ands r0, r0 │ │ - b.n c043a │ │ + b.n c044a │ │ str r0, [r7, #48] @ 0x30 │ │ add.w r0, r0, r0 │ │ - b.n c07a2 │ │ + b.n c07b2 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ asrs r0, r5, #2 │ │ - b.n c05a0 │ │ + b.n c05b0 │ │ movs r4, r0 │ │ - b.n c044e │ │ + b.n c045e │ │ str r7, [r0, #48] @ 0x30 │ │ add.w r0, r0, r0 │ │ - b.n c07b6 │ │ + b.n c07c6 │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ subs r1, r2, #0 │ │ - b.n c05b4 │ │ + b.n c05c4 │ │ movs r4, r0 │ │ - b.n c0462 │ │ + b.n c0472 │ │ str r0, [r5, #8] │ │ - b.n bfb5c │ │ + b.n bfb6c │ │ str r5, [r2, #32] │ │ add.w r0, r0, r0 │ │ - b.n c07ce │ │ + b.n c07de │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ str r6, [r0, #28] │ │ add.w r0, r0, r0 │ │ - b.n bfc5a │ │ - beq.n c0174 │ │ - b.n c05d4 │ │ + b.n bfc6a │ │ + beq.n c0184 │ │ + b.n c05e4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, r5, r7, r9} │ │ - b.n bfc84 │ │ + b.n bfc94 │ │ asrs r4, r5, #10 │ │ - b.n bfc88 │ │ + b.n bfc98 │ │ movs r0, r0 │ │ - b.n c026c │ │ + b.n c027c │ │ asrs r1, r0, #32 │ │ - b.n c0270 │ │ + b.n c0280 │ │ str r2, [r7, #44] @ 0x2c │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n c049a │ │ + b.n c04aa │ │ movs r0, r0 │ │ - b.n c07fe │ │ + b.n c080e │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ lsls r4, r2, #10 │ │ - b.n bfca4 │ │ + b.n bfcb4 │ │ asrs r4, r2, #10 │ │ - b.n bfca8 │ │ + b.n bfcb8 │ │ movs r0, r0 │ │ - b.n c028c │ │ + b.n c029c │ │ asrs r1, r0, #32 │ │ - b.n c0290 │ │ + b.n c02a0 │ │ str r2, [r6, #44] @ 0x2c │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n c04ba │ │ + b.n c04ca │ │ movs r0, r0 │ │ - b.n c081e │ │ + b.n c082e │ │ lsls r1, r5, #1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r6, #1 │ │ - b.n c06a0 │ │ + b.n c06b0 │ │ movs r0, #136 @ 0x88 │ │ - b.n c06a4 │ │ + b.n c06b4 │ │ movs r7, r0 │ │ - b.n c04ce │ │ + b.n c04de │ │ subs r2, #1 │ │ - b.n c08d2 │ │ + b.n c08e2 │ │ str r0, [r0, #0] │ │ - b.n bfcb0 │ │ + b.n bfcc0 │ │ str r4, [r0, r0] │ │ - b.n bfcb4 │ │ + b.n bfcc4 │ │ str r4, [r2, #48] @ 0x30 │ │ add.w r0, r0, r0 │ │ - b.n c0842 │ │ + b.n c0852 │ │ lsls r4, r3, #1 │ │ lsrs r0, r0, #8 │ │ - add r1, pc, #64 @ (adr r1, c01e8 ) │ │ - b.n bfbe0 │ │ + add r1, pc, #64 @ (adr r1, c01f8 ) │ │ + b.n bfbf0 │ │ str r0, [r1, #0] │ │ - b.n c06c8 │ │ + b.n c06d8 │ │ strh r4, [r1, #8] │ │ - b.n bfbe8 │ │ + b.n bfbf8 │ │ str r0, [sp, #448] @ 0x1c0 │ │ - b.n c06d0 │ │ + b.n c06e0 │ │ lsls r0, r1 │ │ - b.n c06d4 │ │ + b.n c06e4 │ │ str r0, [r0, r0] │ │ - b.n c04fe │ │ + b.n c050e │ │ movs r7, r0 │ │ and.w r0, r0, r7 │ │ - b.n c0506 │ │ + b.n c0516 │ │ asrs r1, r1, #32 │ │ - b.n c050a │ │ + b.n c051a │ │ movs r0, #4 │ │ - b.n c050e │ │ + b.n c051e │ │ subs r2, #1 │ │ - b.n c0912 │ │ + b.n c0922 │ │ str r6, [r0, #48] @ 0x30 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n c051a │ │ + b.n c052a │ │ movs r0, r0 │ │ - b.n c087e │ │ + b.n c088e │ │ lsls r5, r1, #1 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n bfd10 │ │ + b.n bfd20 │ │ asrs r6, r0, #32 │ │ - b.n c052a │ │ + b.n c053a │ │ str r0, [r1, #28] │ │ add.w r0, r0, r0 │ │ - b.n c0892 │ │ + b.n c08a2 │ │ @ instruction: 0xfff21aff │ │ movs r0, r1 │ │ - b.n bfd34 │ │ + b.n bfd44 │ │ asrs r4, r1, #32 │ │ - b.n bfd38 │ │ + b.n bfd48 │ │ movs r2, r1 │ │ - b.n c0242 │ │ + b.n c0252 │ │ asrs r0, r1, #32 │ │ - b.n c0248 │ │ + b.n c0258 │ │ movs r1, r0 │ │ - b.n c052a │ │ + b.n c053a │ │ @ instruction: 0xffec1aff │ │ strh r0, [r0, #0] │ │ - b.n bfd3c │ │ + b.n bfd4c │ │ movs r0, r1 │ │ - b.n c0556 │ │ - str r1, [r6, #20] │ │ + b.n c0566 │ │ + str r5, [r6, #20] │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n c055e │ │ + b.n c056e │ │ movs r7, r0 │ │ - b.n c0562 │ │ + b.n c0572 │ │ str r6, [r2, #44] @ 0x2c │ │ add.w r0, r0, r4, lsl #20 │ │ - b.n bfd64 │ │ + b.n bfd74 │ │ movs r0, r0 │ │ - b.n c08d6 │ │ + b.n c08e6 │ │ str r0, [r0, #0] │ │ - b.n bfd6c │ │ + b.n bfd7c │ │ movs r4, r7 │ │ lsrs r0, r0, #8 │ │ movs r3, r0 │ │ - b.n c08e2 │ │ + b.n c08f2 │ │ movs r6, r0 │ │ subs r2, #0 │ │ lsls r0, r0, #7 │ │ - b.n bfd80 │ │ + b.n bfd90 │ │ asrs r0, r1, #32 │ │ - b.n c0586 │ │ + b.n c0596 │ │ movs r0, #3 │ │ - b.n c098a │ │ + b.n c099a │ │ movs r0, r0 │ │ - b.n c036c │ │ + b.n c037c │ │ str r3, [r5, #44] @ 0x2c │ │ add.w r0, r0, r0 │ │ - b.n c08f6 │ │ + b.n c0906 │ │ lsls r2, r1, #1 │ │ lsrs r0, r0, #8 │ │ lsls r0, r5, #6 │ │ - b.n bfd9c │ │ + b.n bfdac │ │ asrs r0, r1, #32 │ │ - b.n c05a2 │ │ + b.n c05b2 │ │ movs r0, #4 │ │ - b.n c05a6 │ │ + b.n c05b6 │ │ movs r0, r0 │ │ - b.n c0388 │ │ + b.n c0398 │ │ str r4, [r4, #44] @ 0x2c │ │ add.w r0, r0, r0 │ │ - b.n c0912 │ │ + b.n c0922 │ │ lsls r3, r0, #1 │ │ lsrs r0, r0, #8 │ │ lsls r0, r2, #6 │ │ - b.n bfdb8 │ │ + b.n bfdc8 │ │ asrs r0, r1, #32 │ │ - b.n c05be │ │ + b.n c05ce │ │ movs r0, #4 │ │ - b.n c05c2 │ │ + b.n c05d2 │ │ movs r0, r0 │ │ - b.n c03a4 │ │ + b.n c03b4 │ │ str r5, [r3, #44] @ 0x2c │ │ add.w r0, r0, r0 │ │ - b.n c092e │ │ + b.n c093e │ │ movs r4, r7 │ │ lsrs r0, r0, #8 │ │ lsls r0, r7, #5 │ │ - b.n bfdd4 │ │ + b.n bfde4 │ │ asrs r0, r1, #32 │ │ - b.n c05da │ │ + b.n c05ea │ │ movs r0, #4 │ │ - b.n c05de │ │ + b.n c05ee │ │ movs r0, r0 │ │ - b.n c03c0 │ │ + b.n c03d0 │ │ str r6, [r2, #44] @ 0x2c │ │ add.w r0, r0, r0 │ │ - b.n c094a │ │ + b.n c095a │ │ movs r5, r6 │ │ lsrs r0, r0, #8 │ │ lsls r0, r4, #5 │ │ - b.n bfdf0 │ │ + b.n bfe00 │ │ asrs r0, r1, #32 │ │ - b.n c05f6 │ │ + b.n c0606 │ │ movs r0, r0 │ │ - b.n c03d8 │ │ + b.n c03e8 │ │ str r4, [r2, #44] @ 0x2c │ │ add.w r0, r0, r0 │ │ - b.n c0962 │ │ + b.n c0972 │ │ movs r7, r5 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n c0972 │ │ + b.n c0982 │ │ movs r0, r6 │ │ subs r2, #0 │ │ lsls r4, r0, #5 │ │ - b.n bfe10 │ │ + b.n bfe20 │ │ asrs r0, r1, #32 │ │ - b.n c0616 │ │ + b.n c0626 │ │ movs r0, #4 │ │ - b.n c0a1a │ │ + b.n c0a2a │ │ movs r0, r0 │ │ - b.n c03fc │ │ + b.n c040c │ │ str r7, [r0, #44] @ 0x2c │ │ add.w r0, r0, r0 │ │ - b.n c0986 │ │ + b.n c0996 │ │ movs r1, r5 │ │ subs r0, r0, r0 │ │ lsls r4, r5, #4 │ │ - b.n bfe2c │ │ + b.n bfe3c │ │ asrs r0, r1, #32 │ │ - b.n c0632 │ │ + b.n c0642 │ │ movs r0, #4 │ │ - b.n c0636 │ │ + b.n c0646 │ │ movs r0, r0 │ │ - b.n c0418 │ │ + b.n c0428 │ │ str r0, [r0, #44] @ 0x2c │ │ add.w r5, r0, r1 │ │ - b.n c092c │ │ + b.n c093c │ │ movs r2, r4 │ │ subs r0, r0, r0 │ │ asrs r0, r0, #32 │ │ - b.n c064a │ │ + b.n c065a │ │ lsls r1, r7, #1 │ │ - b.n c0a4e │ │ + b.n c0a5e │ │ movs r0, r0 │ │ - b.n c09b4 │ │ + b.n c09c4 │ │ movs r6, r2 │ │ subs r0, r0, r0 │ │ movs r5, r3 │ │ and.w r0, r0, r7 │ │ - b.n c065e │ │ + b.n c066e │ │ str r7, [r2, #40] @ 0x28 │ │ add.w r0, r0, r4, lsl #20 │ │ - b.n bfe60 │ │ + b.n bfe70 │ │ str r0, [r0, #0] │ │ - b.n bfe64 │ │ + b.n bfe74 │ │ lsls r3, r1, #25 │ │ - b.n c0938 │ │ + b.n c0948 │ │ movs r0, r0 │ │ - b.n c05de │ │ + b.n c05ee │ │ movs r5, r0 │ │ ldmia r2!, {} │ │ lsrs r2, r0, #21 │ │ - b.n c0942 │ │ + b.n c0952 │ │ lsrs r3, r2, #29 │ │ - b.n c09dc │ │ + b.n c09ec │ │ movs r0, r0 │ │ - b.n c05ee │ │ + b.n c05fe │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ lsls r3, r7, #5 │ │ - b.n c0954 │ │ + b.n c0964 │ │ movs r3, r0 │ │ and.w r9, r0, r9, asr #1 │ │ - b.n c095e │ │ + b.n c096e │ │ movs r0, r0 │ │ - b.n c0602 │ │ + b.n c0612 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ lsls r4, r1, #25 │ │ - b.n c0968 │ │ + b.n c0978 │ │ movs r0, r0 │ │ - b.n c060e │ │ + b.n c061e │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ lsls r1, r7, #1 │ │ - b.n c0aaa │ │ + b.n c0aba │ │ lsls r1, r0, #20 │ │ - b.n c0998 │ │ + b.n c09a8 │ │ movs r0, r0 │ │ asrs r0, r4, #14 │ │ - beq.n c03ac │ │ - b.n c080c │ │ + beq.n c03bc │ │ + b.n c081c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {} │ │ - b.n c0abe │ │ - beq.n c03b8 │ │ - b.n c0818 │ │ + b.n c0ace │ │ + beq.n c03c8 │ │ + b.n c0828 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r3, r4, r5, r6} │ │ - b.n c0aca │ │ + b.n c0ada │ │ lsls r1, r0, #20 │ │ - b.n c09b8 │ │ + b.n c09c8 │ │ @ instruction: 0xfff70aff │ │ lsls r0, r1, #2 │ │ - b.n bfed4 │ │ + b.n bfee4 │ │ asrs r0, r1, #32 │ │ - b.n c06da │ │ + b.n c06ea │ │ movs r0, r0 │ │ - b.n c04bc │ │ + b.n c04cc │ │ str r3, [r3, #40] @ 0x28 │ │ add.w r0, r0, r0, lsl #4 │ │ - b.n c06e6 │ │ + b.n c06f6 │ │ lsls r1, r7, #1 │ │ - b.n c0aea │ │ + b.n c0afa │ │ movs r0, r0 │ │ - b.n c0a50 │ │ + b.n c0a60 │ │ @ instruction: 0xffef0aff │ │ lsls r4, r5, #1 │ │ - b.n bfef4 │ │ + b.n bff04 │ │ asrs r0, r1, #32 │ │ - b.n c06fa │ │ + b.n c070a │ │ movs r0, r0 │ │ - b.n c04dc │ │ + b.n c04ec │ │ str r3, [r2, #40] @ 0x28 │ │ add.w r0, r0, r0 │ │ - b.n c0a66 │ │ + b.n c0a76 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ lsls r0, r3, #1 │ │ - b.n bff0c │ │ + b.n bff1c │ │ asrs r0, r1, #32 │ │ - b.n c0712 │ │ + b.n c0722 │ │ movs r0, r0 │ │ - b.n c04f4 │ │ + b.n c0504 │ │ str r5, [r1, #40] @ 0x28 │ │ add.w r0, r0, r0 │ │ - b.n c0a7e │ │ + b.n c0a8e │ │ lsls r1, r7, #1 │ │ - b.n c0b22 │ │ + b.n c0b32 │ │ @ instruction: 0xffd01aff │ │ @ instruction: 0xffe1eaff │ │ lsls r1, r7, #1 │ │ - b.n c0b2e │ │ - beq.n c0428 │ │ - b.n c0888 │ │ - ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r3, r5, r8, sl, ip, sp, lr, pc} │ │ - @ instruction: 0xfff4db35 │ │ - @ instruction: 0xfff4fb1e │ │ - @ instruction: 0xfff4db15 │ │ - vqrdmulh.s , q2, d3[0] │ │ - vrev64.16 d29, d10 │ │ - @ instruction: 0xfff4bd0f │ │ - @ instruction: 0xfff4a1e7 │ │ - vqrdmulh.s , q10, d15[0] │ │ - @ instruction: 0xfff4dea9 │ │ - vsra.u32 , q7, #12 │ │ - vrev32.16 , q1 │ │ - vtbx.8 d26, {d20-d21}, d23 │ │ - vqshl.u32 d27, d13, #20 │ │ + b.n c0b3e │ │ + beq.n c0438 │ │ + b.n c0898 │ │ + ldrh r0, [r6, #62] @ 0x3e │ │ + ldmia.w sp!, {r1, r2, r3, r5, r7, r8, sl, ip, sp, lr, pc} │ │ + vcvt.f16.u16 d29, d9, #12 │ │ + @ instruction: 0xfff4fb5e │ │ + @ instruction: 0xfff4dbf9 │ │ + @ instruction: 0xfff4bd05 │ │ + vsra.u32 d29, d26, #12 │ │ + @ instruction: 0xfff4bcd1 │ │ + vpaddl.s16 d26, d14 │ │ + @ instruction: 0xfff49ea4 │ │ + @ instruction: 0xfff4df2e │ │ + vaddw.u , q10, d15 │ │ + vshr.u64 , , #12 │ │ + vqshrn.u64 d26, q3, #12 │ │ + vqshl.u32 , q1, #20 │ │ @ instruction: 0xfff44bf0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n c0950 │ │ + b.n c0960 │ │ str r0, [sp, #256] @ 0x100 │ │ - b.n bff5a │ │ + b.n bff6a │ │ str r0, [r0, #0] │ │ - b.n c077e │ │ + b.n c078e │ │ lsls r4, r0, #31 │ │ - b.n c0a52 │ │ + b.n c0a62 │ │ lsrs r7, r7, #31 │ │ - b.n c0ae4 │ │ + b.n c0af4 │ │ movs r1, #20 │ │ - b.n bff7c │ │ + b.n bff8c │ │ movs r1, r0 │ │ - b.n c06f2 │ │ + b.n c0702 │ │ lsls r2, r3, #1 │ │ ldr r2, [sp, #0] │ │ movs r0, #140 @ 0x8c │ │ - b.n bff88 │ │ + b.n bff98 │ │ movs r0, #1 │ │ - b.n c03fe │ │ + b.n c040e │ │ movs r0, r0 │ │ - b.n c0b02 │ │ + b.n c0b12 │ │ lsls r6, r2, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, #8 │ │ - b.n bff92 │ │ + b.n bffa2 │ │ strb r7, [r3, #0] │ │ - b.n c086c │ │ + b.n c087c │ │ adds r0, #1 │ │ - b.n c0bae │ │ + b.n c0bbe │ │ strh r1, [r4, r2] │ │ - b.n c07b2 │ │ + b.n c07c2 │ │ strh r3, [r2, #56] @ 0x38 │ │ - b.n c07b6 │ │ + b.n c07c6 │ │ movs r1, r0 │ │ - b.n c071e │ │ + b.n c072e │ │ movs r0, r2 │ │ ldr r2, [sp, #0] │ │ movs r0, #6 │ │ - b.n c07c2 │ │ + b.n c07d2 │ │ adds r0, #72 @ 0x48 │ │ - b.n bffea │ │ + b.n bfffa │ │ adds r1, #5 │ │ - b.n c03b0 │ │ + b.n c03c0 │ │ movs r0, r1 │ │ - b.n c06b4 │ │ + b.n c06c4 │ │ movs r6, r4 │ │ lsrs r0, r0, #8 │ │ movs r0, #76 @ 0x4c │ │ - b.n bffc2 │ │ + b.n bffd2 │ │ adds r0, #1 │ │ - b.n c043e │ │ + b.n c044e │ │ movs r0, r0 │ │ - b.n c0b44 │ │ + b.n c0b54 │ │ movs r5, r5 │ │ lsrs r0, r0, #8 │ │ strb r4, [r2, #1] │ │ - b.n bffd2 │ │ + b.n bffe2 │ │ strb r1, [r0, #4] │ │ - b.n c03d8 │ │ + b.n c03e8 │ │ movs r0, r0 │ │ - b.n c0b5c │ │ + b.n c0b6c │ │ lsls r0, r5, #1 │ │ subs r0, r0, r0 │ │ lsls r0, r2, #1 │ │ - b.n c0adc │ │ + b.n c0aec │ │ movs r1, r6 │ │ lsrs r0, r0, #8 │ │ adds r0, #144 @ 0x90 │ │ - b.n bfff0 │ │ + b.n c0000 │ │ lsls r6, r4, #1 │ │ and.w r0, r0, pc, lsr #8 │ │ - b.n c09ca │ │ + b.n c09da │ │ lsls r2, r4, #10 │ │ - b.n c0774 │ │ + b.n c0784 │ │ movs r4, r1 │ │ subs r2, #0 │ │ adds r2, #162 @ 0xa2 │ │ - b.n c0812 │ │ + b.n c0822 │ │ movs r0, #72 @ 0x48 │ │ - b.n c0002 │ │ + b.n c0012 │ │ strb r4, [r0, #0] │ │ - b.n c0c1a │ │ + b.n c0c2a │ │ ands r0, r0 │ │ - b.n c081e │ │ + b.n c082e │ │ movs r1, #3 │ │ - b.n c05e6 │ │ + b.n c05f6 │ │ adds r0, #3 │ │ - b.n c0570 │ │ + b.n c0580 │ │ adds r1, #3 │ │ - b.n c05f8 │ │ + b.n c0608 │ │ strb r1, [r0, #0] │ │ - b.n c082e │ │ + b.n c083e │ │ movs r2, r0 │ │ - b.n c0832 │ │ + b.n c0842 │ │ asrs r3, r0, #32 │ │ - b.n c0836 │ │ - str r4, [r1, r7] │ │ - @ instruction: 0xfa000004 │ │ - b.n c083e │ │ + b.n c0846 │ │ + strh r3, [r7, r4] │ │ + mla r0, r0, r4, r0 │ │ + b.n c084e │ │ asrs r7, r0, #32 │ │ - b.n c0842 │ │ + b.n c0852 │ │ movs r0, #1 │ │ - b.n c0a08 │ │ + b.n c0a18 │ │ adds r0, #0 │ │ - b.n c0c4a │ │ + b.n c0c5a │ │ ands r6, r0 │ │ - b.n c084e │ │ + b.n c085e │ │ strb r4, [r1, #1] │ │ - b.n c003a │ │ + b.n c004a │ │ movs r0, #8 │ │ - b.n c001e │ │ + b.n c002e │ │ adds r0, #1 │ │ - b.n c04a8 │ │ + b.n c04b8 │ │ ands r0, r2 │ │ - b.n c0046 │ │ + b.n c0056 │ │ movs r0, r0 │ │ - b.n c0bca │ │ + b.n c0bda │ │ @ instruction: 0xfff91aff │ │ movs r0, #72 @ 0x48 │ │ - b.n c0a36 │ │ + b.n c0a46 │ │ movs r6, r0 │ │ and.w r0, r0, r0, lsl #12 │ │ - b.n c0c72 │ │ + b.n c0c82 │ │ strb r6, [r0, #0] │ │ - b.n c0876 │ │ + b.n c0886 │ │ eors r4, r1 │ │ - b.n c0068 │ │ + b.n c0078 │ │ adds r0, #1 │ │ - b.n c04c6 │ │ + b.n c04d6 │ │ strb r0, [r2, #0] │ │ - b.n c0070 │ │ + b.n c0080 │ │ movs r0, r0 │ │ - b.n c0bf4 │ │ + b.n c0c04 │ │ @ instruction: 0xfffa1aff │ │ movs r0, #0 │ │ - b.n c0072 │ │ + b.n c0082 │ │ adds r1, #5 │ │ - b.n c0476 │ │ + b.n c0486 │ │ adds r0, #8 │ │ - b.n c085c │ │ + b.n c086c │ │ adds r1, #5 │ │ - b.n c045e │ │ + b.n c046e │ │ adds r0, #84 @ 0x54 │ │ - b.n c008a │ │ + b.n c009a │ │ movs r0, #0 │ │ - b.n c0ca2 │ │ + b.n c0cb2 │ │ movs r1, #1 │ │ - b.n c046c │ │ + b.n c047c │ │ str r0, [r2, r0] │ │ - b.n c0096 │ │ + b.n c00a6 │ │ movs r0, r0 │ │ - b.n c0c18 │ │ + b.n c0c28 │ │ movs r7, r3 │ │ subs r0, r0, r0 │ │ add ip, fp │ │ - b.n c0902 │ │ + b.n c0912 │ │ movs r1, #1 │ │ - b.n c0484 │ │ + b.n c0494 │ │ movs r0, #128 @ 0x80 │ │ - b.n c0cbe │ │ + b.n c0cce │ │ movs r0, #1 │ │ - b.n c050a │ │ + b.n c051a │ │ movs r0, #144 @ 0x90 │ │ - b.n c00b8 │ │ + b.n c00c8 │ │ adds r1, #1 │ │ - b.n c04ae │ │ - bl 51c08a │ │ + b.n c04be │ │ + bl 51c09a │ │ str r3, [r0, r0] │ │ - b.n c08d2 │ │ + b.n c08e2 │ │ cmp r0, #220 @ 0xdc │ │ - b.n c0928 │ │ + b.n c0938 │ │ movs r0, #1 │ │ - b.n c069e │ │ + b.n c06ae │ │ movs r0, #208 @ 0xd0 │ │ - b.n c0942 │ │ + b.n c0952 │ │ adds r1, #1 │ │ - b.n c04c8 │ │ - bl 51c0a2 │ │ + b.n c04d8 │ │ + bl 51c0b2 │ │ movs r5, r0 │ │ - b.n c0850 │ │ + b.n c0860 │ │ @ instruction: 0xfff71aff │ │ adds r0, #80 @ 0x50 │ │ - b.n c00de │ │ + b.n c00ee │ │ movs r1, r0 │ │ - b.n c0c9a │ │ + b.n c0caa │ │ str r1, [r0, r4] │ │ - b.n c04c0 │ │ + b.n c04d0 │ │ movs r0, r0 │ │ - bge.n c05be │ │ + bge.n c05ce │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r2, r6} │ │ - b.n c00f2 │ │ + b.n c0102 │ │ strb r1, [r0, #2] │ │ - b.n c06cc │ │ + b.n c06dc │ │ adds r0, #76 @ 0x4c │ │ - b.n c00fa │ │ + b.n c010a │ │ movs r0, #126 @ 0x7e │ │ - b.n c09d6 │ │ + b.n c09e6 │ │ lsls r7, r0, #8 │ │ - b.n c06d6 │ │ + b.n c06e6 │ │ movs r1, r0 │ │ - b.n c0c7c │ │ + b.n c0c8c │ │ movs r0, #176 @ 0xb0 │ │ - b.n c095e │ │ + b.n c096e │ │ lsls r7, r5, #1 │ │ - b.n c0da2 │ │ + b.n c0db2 │ │ lsls r5, r5, #1 │ │ strh r0, [r4, #30] │ │ movs r1, r0 │ │ - b.n c0570 │ │ + b.n c0580 │ │ movs r0, r0 │ │ - b.n c0d2e │ │ + b.n c0d3e │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r0, r2} │ │ - b.n c0936 │ │ + b.n c0946 │ │ ands r1, r0 │ │ - b.n c093a │ │ - ldr r6, [r2, #124] @ 0x7c │ │ + b.n c094a │ │ + ldr r5, [r2, #124] @ 0x7c │ │ @ instruction: 0xebff204c │ │ - b.n c012c │ │ + b.n c013c │ │ movs r0, r0 │ │ - b.n c0ca6 │ │ + b.n c0cb6 │ │ adds r0, #76 @ 0x4c │ │ - b.n c0136 │ │ + b.n c0146 │ │ movs r0, #4 │ │ - b.n c05b2 │ │ + b.n c05c2 │ │ movs r0, #242 @ 0xf2 │ │ - b.n c0a16 │ │ + b.n c0a26 │ │ movs r0, #4 │ │ - b.n c059c │ │ + b.n c05ac │ │ @ instruction: 0xffe81aff │ │ lsls r4, r0, #1 │ │ - b.n c0148 │ │ + b.n c0158 │ │ movs r0, #132 @ 0x84 │ │ - b.n c072a │ │ + b.n c073a │ │ adds r0, #68 @ 0x44 │ │ - b.n c0152 │ │ + b.n c0162 │ │ asrs r4, r0, #32 │ │ - b.n c096a │ │ + b.n c097a │ │ lsls r2, r0, #8 │ │ - b.n c072e │ │ + b.n c073e │ │ lsrs r5, r1, #10 │ │ orn sl, r0, #288768 @ 0x46800 │ │ orn sl, r0, #18304 @ 0x4780 │ │ orn r2, r0, #8519680 @ 0x820000 │ │ - b.n c0744 │ │ + b.n c0754 │ │ lsrs r5, r1, #10 │ │ orr.w sl, r0, #288768 @ 0x46800 │ │ orr.w sl, r0, #18304 @ 0x4780 │ │ orr.w r0, r0, #8716288 @ 0x850000 │ │ - b.n c098e │ │ - ldr r3, [pc, #960] @ (c0a10 ) │ │ + b.n c099e │ │ + ldr r3, [pc, #960] @ (c0a20 ) │ │ ldmia.w sp!, {r0, r1, r2} │ │ and.w r0, r0, r0, lsr #14 │ │ - b.n c018c │ │ + b.n c019c │ │ lsrs r7, r2, #24 │ │ - b.n c0b5e │ │ + b.n c0b6e │ │ adds r1, #1 │ │ - b.n c0588 │ │ + b.n c0598 │ │ strb r0, [r2, #1] │ │ - b.n c0192 │ │ + b.n c01a2 │ │ adds r1, #1 │ │ - b.n c0578 │ │ + b.n c0588 │ │ adds r0, #192 @ 0xc0 │ │ - b.n c0dae │ │ + b.n c0dbe │ │ adds r0, #1 │ │ - b.n c05f6 │ │ + b.n c0606 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n c0b98 │ │ - beq.n c0688 │ │ - b.n c0b1c │ │ + b.n c0ba8 │ │ + beq.n c0698 │ │ + b.n c0b2c │ │ str r1, [r0, r0] │ │ - b.n c09c6 │ │ + b.n c09d6 │ │ asrs r4, r2, #1 │ │ - b.n c01aa │ │ + b.n c01ba │ │ str r5, [r0, #16] │ │ - b.n c05b0 │ │ + b.n c05c0 │ │ asrs r0, r0, #32 │ │ - b.n c0dd2 │ │ + b.n c0de2 │ │ movs r0, r0 │ │ - b.n c0d42 │ │ + b.n c0d52 │ │ movs r7, r6 │ │ lsrs r0, r0, #8 │ │ str r0, [sp, #80] @ 0x50 │ │ - b.n c01be │ │ + b.n c01ce │ │ asrs r1, r6, #22 │ │ - b.n c0cbc │ │ + b.n c0ccc │ │ subs r5, r0, #0 │ │ - b.n c0d34 │ │ + b.n c0d44 │ │ movs r6, r0 │ │ and.w r7, r0, r7, asr #10 │ │ - b.n c0cc0 │ │ + b.n c0cd0 │ │ movs r0, #226 @ 0xe2 │ │ - b.n c0d34 │ │ + b.n c0d44 │ │ movs r2, r0 │ │ - b.n c0956 │ │ + b.n c0966 │ │ movs r2, r6 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n c0d6e │ │ + b.n c0d7e │ │ str r0, [r1, #0] │ │ - b.n c0a02 │ │ + b.n c0a12 │ │ movs r3, r5 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n c01f6 │ │ + b.n c0206 │ │ strh r4, [r5, #4] │ │ - b.n c01fa │ │ + b.n c020a │ │ movs r1, r0 │ │ - b.n c0972 │ │ + b.n c0982 │ │ @ instruction: 0xfff41aff │ │ strb r0, [r3, #0] │ │ - b.n c0206 │ │ + b.n c0216 │ │ lsrs r6, r4, #29 │ │ - b.n c0e1e │ │ + b.n c0e2e │ │ movs r0, r0 │ │ - b.n c0d90 │ │ + b.n c0da0 │ │ lsls r4, r6, #2 │ │ lsls r0, r0, #12 │ │ - str r1, [r0, #4] │ │ + str r5, [r0, #4] │ │ add.w r0, r0, r0 │ │ - b.n c0d8e │ │ + b.n c0d9e │ │ movs r2, r5 │ │ lsrs r0, r0, #8 │ │ asrs r6, r0, #32 │ │ - b.n c0a36 │ │ + b.n c0a46 │ │ movs r0, #180 @ 0xb4 │ │ - b.n c0e3a │ │ + b.n c0e4a │ │ ands r0, r0 │ │ - b.n c0a3e │ │ - strh r1, [r6, r3] │ │ - @ instruction: 0xfb00104c │ │ - b.n c0238 │ │ + b.n c0a4e │ │ + str r2, [r1, r5] │ │ + @ instruction: 0xfa00104c │ │ + b.n c0248 │ │ movs r0, #133 @ 0x85 │ │ - b.n c0814 │ │ + b.n c0824 │ │ lsls r4, r0, #1 │ │ - b.n c0240 │ │ + b.n c0250 │ │ movs r0, r0 │ │ - b.n c0dc0 │ │ - add r0, pc, #20 @ (adr r0, c0728 ) │ │ - b.n c0818 │ │ + b.n c0dd0 │ │ + add r0, pc, #20 @ (adr r0, c0738 ) │ │ + b.n c0828 │ │ lsls r0, r6 │ │ - b.n c0226 │ │ + b.n c0236 │ │ lsls r2, r0, #8 │ │ - b.n c081e │ │ - add r0, pc, #32 @ (adr r0, c0740 ) │ │ - b.n c022e │ │ + b.n c082e │ │ + add r0, pc, #32 @ (adr r0, c0750 ) │ │ + b.n c023e │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n c0232 │ │ + b.n c0242 │ │ movs r0, r2 │ │ - b.n c0236 │ │ + b.n c0246 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ lsls r4, r6, #2 │ │ - b.n c0c3a │ │ + b.n c0c4a │ │ asrs r7, r0, #32 │ │ - b.n c0a76 │ │ + b.n c0a86 │ │ movs r0, #228 @ 0xe4 │ │ - b.n c0e7a │ │ - strh r2, [r4, r3] │ │ - mla r0, r0, r8, sl │ │ - b.n c0250 │ │ + b.n c0e8a │ │ + str r3, [r7, r4] │ │ + @ instruction: 0xfa00a008 │ │ + b.n c0260 │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n c0254 │ │ + b.n c0264 │ │ asrs r4, r2, #1 │ │ - b.n c027c │ │ + b.n c028c │ │ movs r4, r0 │ │ - b.n c0280 │ │ + b.n c0290 │ │ movs r1, #5 │ │ - b.n c0674 │ │ + b.n c0684 │ │ lsrs r1, r0, #16 │ │ - b.n c0e56 │ │ + b.n c0e66 │ │ movs r4, r0 │ │ - b.n c026c │ │ + b.n c027c │ │ movs r0, #172 @ 0xac │ │ - b.n c026a │ │ + b.n c027a │ │ str r5, [r0, #16] │ │ - b.n c0664 │ │ + b.n c0674 │ │ asrs r1, r6, #22 │ │ - b.n c0d80 │ │ + b.n c0d90 │ │ subs r5, r0, #0 │ │ - b.n c0df8 │ │ + b.n c0e08 │ │ movs r0, r0 │ │ - b.n c0e1e │ │ + b.n c0e2e │ │ str r0, [r1, #0] │ │ - b.n c0ab2 │ │ + b.n c0ac2 │ │ @ instruction: 0xffd31aff │ │ asrs r0, r0, #32 │ │ - b.n c0eba │ │ + b.n c0eca │ │ movs r1, r0 │ │ - b.n c0abe │ │ - beq.n c07b8 │ │ - b.n c0c18 │ │ + b.n c0ace │ │ + beq.n c07c8 │ │ + b.n c0c28 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r4, r5} │ │ - b.n c02c8 │ │ + b.n c02d8 │ │ movs r0, #42 @ 0x2a │ │ - b.n c0ece │ │ + b.n c0ede │ │ asrs r4, r6, #32 │ │ - b.n c02d0 │ │ + b.n c02e0 │ │ movs r0, r0 │ │ - b.n c08b4 │ │ + b.n c08c4 │ │ asrs r1, r0, #32 │ │ - b.n c08b8 │ │ - ldr r6, [r2, #24] │ │ + b.n c08c8 │ │ + ldr r5, [r2, #24] │ │ @ instruction: 0xebff004c │ │ - b.n c02d4 │ │ + b.n c02e4 │ │ asrs r2, r0, #3 │ │ - b.n c0ee6 │ │ + b.n c0ef6 │ │ asrs r5, r0, #32 │ │ - b.n c072a │ │ + b.n c073a │ │ asrs r4, r1, #32 │ │ - b.n c0eee │ │ + b.n c0efe │ │ movs r4, r0 │ │ - b.n c02e4 │ │ + b.n c02f4 │ │ movs r2, r0 │ │ - b.n c0eb6 │ │ + b.n c0ec6 │ │ movs r4, r0 │ │ - b.n c02cc │ │ + b.n c02dc │ │ movs r1, r0 │ │ - b.n c0afe │ │ - beq.n c07f8 │ │ - b.n c0c58 │ │ + b.n c0b0e │ │ + beq.n c0808 │ │ + b.n c0c68 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r2, r3, r4, ip, sp, lr, pc} │ │ - vsri.64 , q14, #12 │ │ + ldmia.w sp!, {r1, r5, r7, ip, sp, lr, pc} │ │ + vsli.32 d31, d28, #20 │ │ @ instruction: 0xfff44ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n c0cf0 │ │ - beq.n c07f0 │ │ - b.n c0c74 │ │ + b.n c0d00 │ │ + beq.n c0800 │ │ + b.n c0c84 │ │ str r0, [r0, r0] │ │ - b.n c0b1e │ │ + b.n c0b2e │ │ lsls r5, r2, #3 │ │ - b.n c0b82 │ │ + b.n c0b92 │ │ stmia r0!, {r1} │ │ - b.n c0b26 │ │ + b.n c0b36 │ │ str r0, [sp, #4] │ │ - b.n c0b2a │ │ + b.n c0b3a │ │ movs r1, r0 │ │ - b.n c0ece │ │ + b.n c0ede │ │ movs r4, r4 │ │ - bge.n c07f2 │ │ + bge.n c0802 │ │ str r4, [r3, #0] │ │ - b.n c0d00 │ │ + b.n c0d10 │ │ strh r4, [r7, #2] │ │ - b.n c0d04 │ │ + b.n c0d14 │ │ movs r0, #4 │ │ - b.n c03a8 │ │ + b.n c03b8 │ │ asrs r0, r0, #2 │ │ - b.n c0b42 │ │ - add r1, pc, #0 @ (adr r1, c0804 ) │ │ - b.n c0732 │ │ + b.n c0b52 │ │ + add r1, pc, #0 @ (adr r1, c0814 ) │ │ + b.n c0742 │ │ movs r0, r1 │ │ - b.n c0b4a │ │ + b.n c0b5a │ │ lsls r1, r6 │ │ - b.n c0b6e │ │ + b.n c0b7e │ │ asrs r0, r5, #3 │ │ - b.n c0c36 │ │ + b.n c0c46 │ │ movs r6, r4 │ │ subs r0, r0, r0 │ │ movs r6, r1 │ │ - b.n c0ec0 │ │ + b.n c0ed0 │ │ lsls r0, r1, #1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r3, #32 │ │ - b.n c034c │ │ + b.n c035c │ │ lsls r2, r6, #30 │ │ - b.n c0e36 │ │ + b.n c0e46 │ │ lsrs r7, r7, #31 │ │ - b.n c0ec8 │ │ + b.n c0ed8 │ │ movs r0, r0 │ │ - b.n c0ed0 │ │ + b.n c0ee0 │ │ lsls r1, r0, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, #213 @ 0xd5 │ │ - b.n c0bd8 │ │ + b.n c0be8 │ │ movs r0, r0 │ │ - b.n c0ede │ │ + b.n c0eee │ │ movs r6, r7 │ │ - ldr r2, [pc, #0] @ (c083c ) │ │ + ldr r2, [pc, #0] @ (c084c ) │ │ movs r1, r0 │ │ - b.n c0b82 │ │ + b.n c0b92 │ │ asrs r4, r1, #32 │ │ - b.n c0b86 │ │ + b.n c0b96 │ │ adds r0, #8 │ │ - b.n c0364 │ │ + b.n c0374 │ │ strb r4, [r1, #0] │ │ - b.n c0b8e │ │ + b.n c0b9e │ │ lsls r1, r7, #4 │ │ add.w r0, r0, r0 │ │ - b.n c0ef6 │ │ + b.n c0f06 │ │ movs r5, r5 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n c0f9e │ │ + b.n c0fae │ │ movs r0, r0 │ │ - b.n c0f14 │ │ + b.n c0f24 │ │ lsls r3, r3, #2 │ │ lsrs r0, r0, #8 │ │ asrs r4, r2, #32 │ │ - b.n c0d7e │ │ + b.n c0d8e │ │ movs r0, #132 @ 0x84 │ │ - b.n c0970 │ │ + b.n c0980 │ │ movs r0, #176 @ 0xb0 │ │ - b.n c0c16 │ │ + b.n c0c26 │ │ asrs r2, r0, #32 │ │ - b.n c0978 │ │ + b.n c0988 │ │ movs r0, #8 │ │ - b.n c0d7c │ │ + b.n c0d8c │ │ movs r0, #0 │ │ - b.n c0390 │ │ + b.n c03a0 │ │ asrs r6, r6, #2 │ │ - b.n c0c24 │ │ + b.n c0c34 │ │ lsls r2, r2, #2 │ │ and.w r0, r0, r4, lsl #4 │ │ - b.n c0434 │ │ + b.n c0444 │ │ movs r4, r0 │ │ - b.n c0eb0 │ │ + b.n c0ec0 │ │ movs r0, r2 │ │ subs r0, r0, r0 │ │ lsls r0, r2, #3 │ │ - b.n c0fd6 │ │ + b.n c0fe6 │ │ movs r0, r1 │ │ - b.n c0ebc │ │ + b.n c0ecc │ │ movs r4, r0 │ │ - b.n c0428 │ │ + b.n c0438 │ │ lsls r2, r6, #30 │ │ - b.n c0eb2 │ │ + b.n c0ec2 │ │ lsrs r7, r7, #31 │ │ - b.n c0f44 │ │ + b.n c0f54 │ │ movs r5, r7 │ │ lsls r0, r0, #12 │ │ - beq.n c08e4 │ │ - b.n c0d44 │ │ + beq.n c08f4 │ │ + b.n c0d54 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, r4, r5, r6, sp} │ │ - b.n c0614 │ │ + b.n c0624 │ │ movs r0, r0 │ │ - b.n c0f5e │ │ + b.n c0f6e │ │ movs r3, r1 │ │ - ldr r2, [pc, #0] @ (c08bc ) │ │ + ldr r2, [pc, #0] @ (c08cc ) │ │ movs r5, r1 │ │ - b.n c0f68 │ │ + b.n c0f78 │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ lsls r2, r6, #30 │ │ - b.n c0eda │ │ + b.n c0eea │ │ lsrs r7, r7, #31 │ │ - b.n c0f6c │ │ - beq.n c0908 │ │ - b.n c0d68 │ │ + b.n c0f7c │ │ + beq.n c0918 │ │ + b.n c0d78 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r2} │ │ - b.n c0c1a │ │ + b.n c0c2a │ │ asrs r1, r1, #32 │ │ - b.n c0c1e │ │ + b.n c0c2e │ │ movs r0, #12 │ │ - b.n c0c22 │ │ - beq.n c091c │ │ - b.n c0d7c │ │ - ldr r7, [pc, #960] @ (c0ca8 ) │ │ - ldmia.w sp!, {r4, r5, r7, r9, sl, sp, pc} │ │ + b.n c0c32 │ │ + beq.n c092c │ │ + b.n c0d8c │ │ + ldr r7, [pc, #960] @ (c0cb8 ) │ │ + ldmia.w sp!, {r0, r1, r2, r3, r5, r7, r9, sl, sp, pc} │ │ @ instruction: 0xeaff003d │ │ - b.n c1032 │ │ - beq.n c092c │ │ - b.n c0d8c │ │ + b.n c1042 │ │ + beq.n c093c │ │ + b.n c0d9c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r6} │ │ - b.n c0fa0 │ │ + b.n c0fb0 │ │ movs r5, r2 │ │ subs r2, #0 │ │ asrs r4, r7, #2 │ │ - b.n c0cba │ │ + b.n c0cca │ │ asrs r1, r4, #2 │ │ - b.n c0c4a │ │ + b.n c0c5a │ │ asrs r1, r0, #32 │ │ - b.n c0d90 │ │ + b.n c0da0 │ │ movs r6, r2 │ │ and.w r7, r0, r2, ror #6 │ │ - b.n c0f26 │ │ + b.n c0f36 │ │ stmia r0!, {r0, r1, r2} │ │ - b.n c0c5a │ │ + b.n c0c6a │ │ subs r7, r7, #7 │ │ - b.n c0fbc │ │ + b.n c0fcc │ │ movs r1, r0 │ │ - b.n c0bc2 │ │ + b.n c0bd2 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ adds r0, #8 │ │ - b.n c0464 │ │ + b.n c0474 │ │ movs r5, r7 │ │ - b.n c0fce │ │ + b.n c0fde │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ lsls r7, r4, #1 │ │ and.w r0, r0, r8, lsl #12 │ │ - b.n c0474 │ │ + b.n c0484 │ │ movs r5, r1 │ │ - b.n c0fe4 │ │ + b.n c0ff4 │ │ lsls r4, r4, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, r3 │ │ - b.n c0470 │ │ + b.n c0480 │ │ movs r0, r0 │ │ - b.n c0fea │ │ + b.n c0ffa │ │ asrs r6, r5, #32 │ │ asrs r0, r4, #15 │ │ asrs r4, r6, #2 │ │ asrs r0, r0, #7 │ │ asrs r0, r0, #32 │ │ asrs r0, r4, #14 │ │ asrs r4, r7, #2 │ │ asrs r0, r0, #22 │ │ movs r0, r0 │ │ - b.n c1006 │ │ + b.n c1016 │ │ lsls r6, r3, #1 │ │ lsrs r0, r0, #8 │ │ lsls r5, r2, #3 │ │ - b.n c0d10 │ │ + b.n c0d20 │ │ asrs r1, r0, #32 │ │ - b.n c0df2 │ │ + b.n c0e02 │ │ lsls r0, r0, #2 │ │ - b.n c0a7e │ │ + b.n c0a8e │ │ asrs r0, r6, #2 │ │ - b.n c0cf2 │ │ + b.n c0d02 │ │ lsls r5, r2, #3 │ │ - b.n c0d20 │ │ + b.n c0d30 │ │ asrs r6, r0, #32 │ │ - b.n c0524 │ │ + b.n c0534 │ │ movs r1, #0 │ │ - b.n c08aa │ │ + b.n c08ba │ │ strb r2, [r7, #2] │ │ - b.n c0d26 │ │ + b.n c0d36 │ │ asrs r7, r0, #32 │ │ - b.n c09c8 │ │ + b.n c09d8 │ │ movs r7, r4 │ │ - b.n c0fac │ │ + b.n c0fbc │ │ lsls r2, r3, #1 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #2 │ │ - b.n c0aa2 │ │ + b.n c0ab2 │ │ asrs r4, r2, #32 │ │ - b.n c0e9a │ │ + b.n c0eaa │ │ lsls r0, r6, #2 │ │ - b.n c0d3a │ │ + b.n c0d4a │ │ lsls r0, r0, #2 │ │ - b.n c0aa0 │ │ + b.n c0ab0 │ │ lsls r0, r6, #2 │ │ - b.n c0d42 │ │ + b.n c0d52 │ │ strb r0, [r0, #0] │ │ - b.n c0aa8 │ │ + b.n c0ab8 │ │ movs r4, r0 │ │ - b.n c0558 │ │ + b.n c0568 │ │ movs r4, r0 │ │ - b.n c0fce │ │ + b.n c0fde │ │ movs r7, r2 │ │ subs r0, r0, r0 │ │ movs r0, r3 │ │ - b.n c04e0 │ │ + b.n c04f0 │ │ movs r0, r0 │ │ - b.n c105a │ │ + b.n c106a │ │ asrs r6, r5, #32 │ │ asrs r0, r4, #15 │ │ asrs r4, r6, #2 │ │ asrs r0, r0, #7 │ │ asrs r0, r0, #32 │ │ asrs r0, r4, #14 │ │ asrs r4, r7, #2 │ │ asrs r0, r0, #22 │ │ movs r0, r0 │ │ - b.n c1086 │ │ + b.n c1096 │ │ movs r6, r6 │ │ lsrs r0, r0, #8 │ │ lsls r6, r6, #2 │ │ - b.n c0d84 │ │ + b.n c0d94 │ │ asrs r0, r0, #32 │ │ - b.n c0508 │ │ + b.n c0518 │ │ movs r0, r0 │ │ - b.n c0aec │ │ + b.n c0afc │ │ movs r0, r1 │ │ - b.n c0ee2 │ │ + b.n c0ef2 │ │ lsls r0, r6, #3 │ │ - b.n c0d7e │ │ + b.n c0d8e │ │ movs r4, r0 │ │ - b.n c0598 │ │ + b.n c05a8 │ │ movs r1, r0 │ │ - b.n c108e │ │ + b.n c109e │ │ movs r6, r5 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #32 │ │ - b.n c051a │ │ + b.n c052a │ │ movs r0, r0 │ │ - b.n c051e │ │ + b.n c052e │ │ movs r0, #12 │ │ - b.n c0d3e │ │ + b.n c0d4e │ │ lsls r0, r6, #3 │ │ - b.n c0d9c │ │ + b.n c0dac │ │ movs r5, r0 │ │ - b.n c0d46 │ │ + b.n c0d56 │ │ asrs r7, r0, #32 │ │ - b.n c0d4a │ │ + b.n c0d5a │ │ lsls r0, r5, #9 │ │ add.w r0, r0, r0, asr #32 │ │ and.w r0, r0, r5 │ │ - b.n c0d56 │ │ + b.n c0d66 │ │ asrs r7, r0, #32 │ │ - b.n c0d5a │ │ + b.n c0d6a │ │ ands r4, r1 │ │ - b.n c0d5e │ │ - bmi.n c0a16 │ │ + b.n c0d6e │ │ + bmi.n c0a26 │ │ @ instruction: 0xebff0000 │ │ - b.n c10c6 │ │ + b.n c10d6 │ │ movs r2, r5 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #32 │ │ - b.n c05dc │ │ + b.n c05ec │ │ movs r0, r3 │ │ - b.n c055c │ │ + b.n c056c │ │ movs r2, r0 │ │ - b.n c1058 │ │ + b.n c1068 │ │ movs r4, r2 │ │ subs r0, r0, r0 │ │ adds r4, r6, #6 │ │ - b.n c0dde │ │ + b.n c0dee │ │ movs r0, r0 │ │ - b.n c10ea │ │ + b.n c10fa │ │ movs r0, #4 │ │ - b.n c05e6 │ │ + b.n c05f6 │ │ asrs r1, r0, #32 │ │ - b.n c0ecc │ │ + b.n c0edc │ │ asrs r4, r7, #30 │ │ - b.n c0dce │ │ + b.n c0dde │ │ asrs r0, r4, #32 │ │ - b.n c1156 │ │ + b.n c1166 │ │ asrs r4, r0, #32 │ │ - b.n c05d6 │ │ + b.n c05e6 │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ asrs r0, r3, #32 │ │ - b.n c0588 │ │ + b.n c0598 │ │ movs r4, r3 │ │ - b.n c0584 │ │ + b.n c0594 │ │ movs r7, #188 @ 0xbc │ │ - b.n c0e08 │ │ + b.n c0e18 │ │ adds r0, #20 │ │ - b.n c0f6a │ │ + b.n c0f7a │ │ asrs r2, r7, #2 │ │ - b.n c0e0e │ │ + b.n c0e1e │ │ movs r0, r4 │ │ - b.n c1094 │ │ + b.n c10a4 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ lsls r2, r0, #2 │ │ - b.n c0b7a │ │ + b.n c0b8a │ │ lsls r4, r6, #6 │ │ - b.n c0e1e │ │ + b.n c0e2e │ │ movs r0, r0 │ │ - b.n c0b88 │ │ + b.n c0b98 │ │ asrs r6, r6, #2 │ │ - b.n c0e26 │ │ + b.n c0e36 │ │ movs r0, r1 │ │ - b.n c0f8a │ │ + b.n c0f9a │ │ movs r6, r0 │ │ and.w r0, r0, r4, lsl #4 │ │ - b.n c0dd2 │ │ + b.n c0de2 │ │ lsls r5, r5, #5 │ │ add.w r0, r0, r0 │ │ - b.n c113a │ │ + b.n c114a │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r1 │ │ and.w r0, r0, r8, ror #6 │ │ - b.n c0e46 │ │ + b.n c0e56 │ │ adds r2, #145 @ 0x91 │ │ - b.n c0aea │ │ + b.n c0afa │ │ lsls r0, r6, #3 │ │ - b.n c0e36 │ │ + b.n c0e46 │ │ movs r4, r0 │ │ - b.n c065c │ │ + b.n c066c │ │ movs r0, r0 │ │ - b.n c1168 │ │ + b.n c1178 │ │ movs r3, r0 │ │ - b.n c0eba │ │ + b.n c0eca │ │ movs r4, r0 │ │ - b.n c0648 │ │ + b.n c0658 │ │ movs r0, r0 │ │ - b.n c1202 │ │ + b.n c1212 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ asrs r0, r1, #32 │ │ - b.n c0fd8 │ │ + b.n c0fe8 │ │ asrs r0, r0, #32 │ │ - b.n c05e0 │ │ + b.n c05f0 │ │ asrs r6, r6, #2 │ │ - b.n c0e80 │ │ + b.n c0e90 │ │ asrs r4, r0, #32 │ │ - b.n c05e8 │ │ - beq.n c0b10 │ │ - b.n c0f70 │ │ + b.n c05f8 │ │ + beq.n c0b20 │ │ + b.n c0f80 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r2} │ │ - b.n c0e22 │ │ + b.n c0e32 │ │ ands r4, r1 │ │ - b.n c0e26 │ │ + b.n c0e36 │ │ lsls r1, r6, #6 │ │ @ instruction: 0xeb00c004 │ │ - b.n c0e2e │ │ + b.n c0e3e │ │ movs r0, r0 │ │ - b.n c1192 │ │ + b.n c11a2 │ │ @ instruction: 0xfff71aff │ │ @ instruction: 0xff9deaff │ │ lsls r4, r1, #1 │ │ - b.n c063c │ │ + b.n c064c │ │ asrs r2, r6, #30 │ │ - b.n c1112 │ │ + b.n c1122 │ │ subs r7, r7, #7 │ │ - b.n c11a4 │ │ + b.n c11b4 │ │ movs r0, r0 │ │ - b.n c0c28 │ │ + b.n c0c38 │ │ adds r0, #90 @ 0x5a │ │ - b.n c06ae │ │ + b.n c06be │ │ movs r2, r0 │ │ - b.n c1014 │ │ + b.n c1024 │ │ movs r0, r0 │ │ - b.n c11bc │ │ + b.n c11cc │ │ @ instruction: 0xffee0aff │ │ asrs r0, r6, #32 │ │ - b.n c065c │ │ + b.n c066c │ │ ands r0, r0 │ │ - b.n c0e62 │ │ + b.n c0e72 │ │ str r0, [r2, #0] │ │ - b.n c064a │ │ + b.n c065a │ │ movs r1, r0 │ │ - b.n c126a │ │ + b.n c127a │ │ adds r0, #36 @ 0x24 │ │ - b.n c066c │ │ + b.n c067c │ │ asrs r1, r0, #32 │ │ - b.n c0c50 │ │ + b.n c0c60 │ │ movs r1, #233 @ 0xe9 │ │ - b.n c1136 │ │ + b.n c1146 │ │ str r0, [r6, #12] │ │ - b.n c0ed4 │ │ + b.n c0ee4 │ │ adds r0, #3 │ │ - b.n c0c5c │ │ - ldr r1, [r7, #24] │ │ + b.n c0c6c │ │ + ldr r0, [r7, #24] │ │ @ instruction: 0xebff0004 │ │ - b.n c0e86 │ │ - beq.n c0b80 │ │ - b.n c0fe0 │ │ + b.n c0e96 │ │ + beq.n c0b90 │ │ + b.n c0ff0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r2, r6, r8, sl, fp, ip, lr, pc} │ │ + ldmia.w sp!, {r2, r4, r6, r8, sl, fp, ip, lr, pc} │ │ movs r1, r0 │ │ - ldrh r7, [r3, #32] │ │ - @ instruction: 0xfff479f1 │ │ + ldrh r2, [r6, #38] @ 0x26 │ │ + vshll.u32 , d19, #20 │ │ @ instruction: 0xfff44bf0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n c107c │ │ - beq.n c0b74 │ │ - b.n c1000 │ │ + b.n c108c │ │ + beq.n c0b84 │ │ + b.n c1010 │ │ movs r0, #213 @ 0xd5 │ │ - b.n c0f0a │ │ + b.n c0f1a │ │ movs r1, r0 │ │ - b.n c1252 │ │ + b.n c1262 │ │ movs r3, r6 │ │ - bge.n c0b72 │ │ + bge.n c0b82 │ │ str r0, [sp, #112] @ 0x70 │ │ - b.n c1076 │ │ + b.n c1086 │ │ strh r4, [r7, #2] │ │ - b.n c107a │ │ + b.n c108a │ │ str r2, [r0, #8] │ │ - b.n c0ebe │ │ + b.n c0ece │ │ strb r4, [r0, #0] │ │ - b.n c0722 │ │ + b.n c0732 │ │ adds r1, #2 │ │ - b.n c0ab8 │ │ + b.n c0ac8 │ │ lsls r0, r5, #3 │ │ - b.n c11b8 │ │ + b.n c11c8 │ │ lsls r4, r7 │ │ - b.n c0f34 │ │ + b.n c0f44 │ │ adds r0, #8 │ │ - b.n c0ed2 │ │ + b.n c0ee2 │ │ str r6, [r6, #8] │ │ - b.n c0efc │ │ + b.n c0f0c │ │ lsls r4, r4 │ │ - b.n c0eda │ │ + b.n c0eea │ │ movs r3, r6 │ │ subs r0, r0, r0 │ │ strb r1, [r0, #0] │ │ - b.n c10ae │ │ + b.n c10be │ │ movs r4, r0 │ │ - b.n c0e54 │ │ + b.n c0e64 │ │ movs r1, r7 │ │ cmp r2, #0 │ │ strb r0, [r6, #2] │ │ - b.n c0f34 │ │ + b.n c0f44 │ │ adds r0, #114 @ 0x72 │ │ - b.n c0910 │ │ + b.n c0920 │ │ strb r6, [r0, #0] │ │ - b.n c0756 │ │ + b.n c0766 │ │ movs r1, #3 │ │ - b.n c0aec │ │ + b.n c0afc │ │ str r2, [r7, r2] │ │ - b.n c0f62 │ │ + b.n c0f72 │ │ strb r5, [r0, #0] │ │ - b.n c0c10 │ │ + b.n c0c20 │ │ movs r7, r4 │ │ - b.n c11f4 │ │ + b.n c1204 │ │ movs r2, r7 │ │ subs r0, r0, r0 │ │ adds r0, #131 @ 0x83 │ │ - b.n c0cde │ │ + b.n c0cee │ │ movs r0, r4 │ │ - b.n c11fc │ │ + b.n c120c │ │ adds r0, #176 @ 0xb0 │ │ - b.n c0f7c │ │ + b.n c0f8c │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ adds r0, #131 @ 0x83 │ │ - b.n c0ce2 │ │ + b.n c0cf2 │ │ strb r4, [r0, #0] │ │ - b.n c0782 │ │ + b.n c0792 │ │ movs r0, r0 │ │ - b.n c1288 │ │ + b.n c1298 │ │ adds r1, #180 @ 0xb4 │ │ - b.n c0f90 │ │ + b.n c0fa0 │ │ strb r3, [r0, #0] │ │ - b.n c0ffc │ │ + b.n c100c │ │ strb r4, [r0, #0] │ │ - b.n c0772 │ │ + b.n c0782 │ │ movs r0, r0 │ │ - b.n c1336 │ │ + b.n c1346 │ │ movs r0, #3 │ │ asrs r2, r0, #2 │ │ adds r0, #28 │ │ asrs r2, r0, #10 │ │ adds r0, #0 │ │ asrs r1, r0, #22 │ │ movs r1, #186 @ 0xba │ │ asrs r2, r2, #7 │ │ movs r0, #4 │ │ asrs r1, r0, #22 │ │ - beq.n c0c3c │ │ - b.n c10a4 │ │ + beq.n c0c4c │ │ + b.n c10b4 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r2, ip, sp, lr} │ │ - b.n c07b6 │ │ + b.n c07c6 │ │ movs r0, r0 │ │ - b.n c12bc │ │ + b.n c12cc │ │ strb r3, [r0, #0] │ │ - b.n c102c │ │ + b.n c103c │ │ strb r4, [r0, #0] │ │ - b.n c07a2 │ │ + b.n c07b2 │ │ str r0, [r7, r2] │ │ asrs r2, r2, #7 │ │ movs r0, r0 │ │ - b.n c136a │ │ + b.n c137a │ │ movs r3, #149 @ 0x95 │ │ asrs r2, r4, #32 │ │ ands r4, r2 │ │ asrs r2, r0, #10 │ │ lsrs r0, r6 │ │ asrs r1, r0, #7 │ │ - beq.n c0c68 │ │ + beq.n c0c78 │ │ asrs r3, r1, #9 │ │ ldrh r0, [r6, #30] │ │ adds r5, r7, r2 │ │ @ instruction: 0xfff1eaff │ │ movs r0, #4 │ │ - b.n c07e6 │ │ + b.n c07f6 │ │ movs r4, r0 │ │ - b.n c126e │ │ + b.n c127e │ │ movs r6, r5 │ │ subs r0, r0, r0 │ │ asrs r1, r2, #3 │ │ - b.n c1392 │ │ + b.n c13a2 │ │ movs r0, r1 │ │ - b.n c127a │ │ + b.n c128a │ │ asrs r4, r0, #32 │ │ - b.n c07da │ │ + b.n c07ea │ │ lsls r2, r6, #30 │ │ - b.n c126e │ │ + b.n c127e │ │ lsrs r7, r7, #31 │ │ - b.n c1300 │ │ + b.n c1310 │ │ movs r5, r7 │ │ lsls r0, r0, #12 │ │ - beq.n c0c98 │ │ - b.n c1100 │ │ + beq.n c0ca8 │ │ + b.n c1110 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r0, r1, r2, r4, r5, r6, ip, lr} │ │ - b.n c09d0 │ │ + b.n c09e0 │ │ movs r0, r0 │ │ - b.n c1320 │ │ + b.n c1330 │ │ movs r6, r4 │ │ - ldr r2, [pc, #0] @ (c0c78 ) │ │ + ldr r2, [pc, #0] @ (c0c88 ) │ │ movs r0, r1 │ │ - b.n c12ac │ │ + b.n c12bc │ │ movs r7, r4 │ │ subs r0, r0, r0 │ │ lsls r2, r6, #30 │ │ - b.n c1296 │ │ + b.n c12a6 │ │ lsrs r7, r7, #31 │ │ - b.n c1328 │ │ - beq.n c0cbc │ │ - b.n c1124 │ │ + b.n c1338 │ │ + beq.n c0ccc │ │ + b.n c1134 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r0, lr} │ │ - b.n c0fd6 │ │ + b.n c0fe6 │ │ str r0, [r0, #0] │ │ - b.n c0fda │ │ - strb r3, [r1, #16] │ │ + b.n c0fea │ │ + strb r2, [r1, #16] │ │ @ instruction: 0xebff0000 │ │ - b.n c1342 │ │ + b.n c1352 │ │ @ instruction: 0xffd81aff │ │ movs r0, #5 │ │ - b.n c0856 │ │ + b.n c0866 │ │ movs r6, r0 │ │ - b.n c0fee │ │ + b.n c0ffe │ │ asrs r4, r0, #32 │ │ - b.n c0ff2 │ │ + b.n c1002 │ │ @ instruction: 0xffbdeaff │ │ lsls r0, r6, #1 │ │ - b.n c07f8 │ │ + b.n c0808 │ │ asrs r2, r6, #30 │ │ - b.n c12ce │ │ + b.n c12de │ │ subs r7, r7, #7 │ │ - b.n c1360 │ │ + b.n c1370 │ │ movs r0, r0 │ │ - b.n c0de4 │ │ + b.n c0df4 │ │ adds r0, #90 @ 0x5a │ │ - b.n c086a │ │ + b.n c087a │ │ movs r2, r0 │ │ - b.n c11d0 │ │ + b.n c11e0 │ │ movs r0, r0 │ │ - b.n c1378 │ │ + b.n c1388 │ │ @ instruction: 0xffcc0aff │ │ asrs r4, r2, #1 │ │ - b.n c0818 │ │ + b.n c0828 │ │ ands r0, r2 │ │ - b.n c0802 │ │ + b.n c0812 │ │ movs r1, #233 @ 0xe9 │ │ - b.n c12e2 │ │ + b.n c12f2 │ │ adds r0, #76 @ 0x4c │ │ - b.n c0824 │ │ + b.n c0834 │ │ asrs r1, r0, #32 │ │ - b.n c0e08 │ │ + b.n c0e18 │ │ lsrs r0, r6 │ │ - b.n c1088 │ │ + b.n c1098 │ │ ands r0, r0 │ │ - b.n c1032 │ │ + b.n c1042 │ │ adds r0, #3 │ │ - b.n c0e14 │ │ + b.n c0e24 │ │ movs r1, r0 │ │ - b.n c143a │ │ - ldr r2, [r1, #20] │ │ + b.n c144a │ │ + ldr r1, [r1, #20] │ │ @ instruction: 0xebff0004 │ │ - b.n c1042 │ │ - beq.n c0d34 │ │ - b.n c119c │ │ + b.n c1052 │ │ + beq.n c0d44 │ │ + b.n c11ac │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r3, r4, ip, lr, pc} │ │ - b.n c11a4 │ │ - ldr r3, [pc, #960] @ (c10d0 ) │ │ + b.n c11b4 │ │ + ldr r3, [pc, #960] @ (c10e0 ) │ │ ldmia.w sp!, {r0, r1, r3, r4, r5, r6} │ │ and.w r0, r0, sp, rrx │ │ - b.n c145a │ │ - beq.n c0d4c │ │ - b.n c11b4 │ │ + b.n c146a │ │ + beq.n c0d5c │ │ + b.n c11c4 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r1, r2} │ │ - b.n c0fce │ │ + b.n c0fde │ │ @ instruction: 0xff9c9aff │ │ @ instruction: 0xff9feaff │ │ - blt.n c0c40 │ │ + blt.n c0c70 │ │ movs r1, r0 │ │ - ldrh r7, [r4, #18] │ │ - vqshrun.s64 d23, , #12 │ │ + ldrh r2, [r7, #24] │ │ + vqrshrun.s64 d23, , #12 │ │ @ instruction: 0xfff44df0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n c125c │ │ - beq.n c0d54 │ │ - b.n c11e0 │ │ + b.n c126c │ │ + beq.n c0d64 │ │ + b.n c11f0 │ │ movs r0, #213 @ 0xd5 │ │ - b.n c10ea │ │ + b.n c10fa │ │ movs r1, r0 │ │ - b.n c1432 │ │ + b.n c1442 │ │ movs r0, r6 │ │ - bge.n c0d52 │ │ + bge.n c0d62 │ │ eors r4, r7 │ │ - b.n c1256 │ │ + b.n c1266 │ │ strb r4, [r0, #0] │ │ - b.n c08fa │ │ + b.n c090a │ │ str r2, [r0, #8] │ │ - b.n c109e │ │ + b.n c10ae │ │ strh r4, [r3, #0] │ │ - b.n c1262 │ │ + b.n c1272 │ │ adds r0, #4 │ │ - b.n c10a6 │ │ + b.n c10b6 │ │ str r6, [r6, r2] │ │ - b.n c10d0 │ │ + b.n c10e0 │ │ str r0, [r5, #12] │ │ - b.n c119c │ │ + b.n c11ac │ │ movs r4, r6 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n c1420 │ │ + b.n c1430 │ │ movs r4, r7 │ │ lsrs r0, r0, #8 │ │ strb r1, [r0, #0] │ │ - b.n c1208 │ │ + b.n c1218 │ │ strb r0, [r6, #2] │ │ - b.n c1108 │ │ + b.n c1118 │ │ adds r0, #114 @ 0x72 │ │ - b.n c0ae4 │ │ + b.n c0af4 │ │ strb r6, [r0, #0] │ │ - b.n c092a │ │ + b.n c093a │ │ movs r1, #3 │ │ - b.n c0cbe │ │ + b.n c0cce │ │ str r2, [r7, r2] │ │ - b.n c1136 │ │ + b.n c1146 │ │ strb r5, [r0, #0] │ │ - b.n c0de4 │ │ + b.n c0df4 │ │ movs r7, r4 │ │ - b.n c13c8 │ │ + b.n c13d8 │ │ movs r4, r7 │ │ subs r0, r0, r0 │ │ adds r0, #131 @ 0x83 │ │ - b.n c0eaa │ │ + b.n c0eba │ │ movs r0, r4 │ │ - b.n c13d0 │ │ + b.n c13e0 │ │ adds r0, #176 @ 0xb0 │ │ - b.n c1150 │ │ + b.n c1160 │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ adds r0, #131 @ 0x83 │ │ - b.n c0eb6 │ │ + b.n c0ec6 │ │ strb r4, [r0, #0] │ │ - b.n c0956 │ │ + b.n c0966 │ │ movs r0, r0 │ │ - b.n c145c │ │ + b.n c146c │ │ adds r1, #180 @ 0xb4 │ │ - b.n c1164 │ │ + b.n c1174 │ │ strb r3, [r0, #0] │ │ - b.n c11d0 │ │ + b.n c11e0 │ │ strb r4, [r0, #0] │ │ - b.n c0946 │ │ + b.n c0956 │ │ movs r0, r0 │ │ - b.n c150a │ │ + b.n c151a │ │ movs r0, #3 │ │ asrs r2, r0, #2 │ │ adds r0, #28 │ │ asrs r2, r0, #10 │ │ adds r0, #0 │ │ asrs r1, r0, #22 │ │ movs r1, #186 @ 0xba │ │ asrs r2, r2, #7 │ │ movs r0, #4 │ │ asrs r1, r0, #22 │ │ - beq.n c0e10 │ │ - b.n c1278 │ │ + beq.n c0e20 │ │ + b.n c1288 │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {r2, ip, sp, lr} │ │ - b.n c098a │ │ + b.n c099a │ │ movs r0, r0 │ │ - b.n c1490 │ │ + b.n c14a0 │ │ strb r3, [r0, #0] │ │ - b.n c1200 │ │ + b.n c1210 │ │ strb r4, [r0, #0] │ │ - b.n c0976 │ │ + b.n c0986 │ │ str r0, [r7, r2] │ │ asrs r2, r2, #7 │ │ movs r0, r0 │ │ - b.n c153e │ │ + b.n c154e │ │ movs r3, #149 @ 0x95 │ │ asrs r2, r4, #32 │ │ ands r4, r2 │ │ asrs r2, r0, #10 │ │ lsrs r0, r6 │ │ asrs r1, r0, #7 │ │ - beq.n c0e3c │ │ + beq.n c0e4c │ │ asrs r3, r1, #9 │ │ ldrh r0, [r6, #46] @ 0x2e │ │ adds r5, r7, r2 │ │ @ instruction: 0xfff1eaff │ │ movs r0, #4 │ │ - b.n c09ba │ │ + b.n c09ca │ │ movs r4, r0 │ │ - b.n c1442 │ │ + b.n c1452 │ │ movs r7, r5 │ │ subs r0, r0, r0 │ │ asrs r1, r2, #3 │ │ - b.n c1566 │ │ + b.n c1576 │ │ movs r0, r1 │ │ - b.n c144e │ │ + b.n c145e │ │ asrs r4, r0, #32 │ │ - b.n c09ae │ │ + b.n c09be │ │ lsls r4, r6, #30 │ │ - b.n c1442 │ │ + b.n c1452 │ │ lsrs r7, r7, #31 │ │ - b.n c14d4 │ │ + b.n c14e4 │ │ movs r2, r0 │ │ - b.n c12ba │ │ + b.n c12ca │ │ movs r5, r7 │ │ lsls r0, r0, #12 │ │ - beq.n c0e70 │ │ - b.n c12d8 │ │ + beq.n c0e80 │ │ + b.n c12e8 │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {r0, r1, r2, r4, r5, r6, ip, sp, lr} │ │ - b.n c0ba8 │ │ + b.n c0bb8 │ │ movs r0, r0 │ │ - b.n c14fc │ │ + b.n c150c │ │ movs r6, r4 │ │ - ldr r2, [pc, #0] @ (c0e50 ) │ │ + ldr r2, [pc, #0] @ (c0e60 ) │ │ lsls r0, r0, #1 │ │ - b.n c1502 │ │ + b.n c1512 │ │ @ instruction: 0xffc53aff │ │ strb r2, [r0, #4] │ │ - b.n c0d8e │ │ + b.n c0d9e │ │ strb r4, [r7, #2] │ │ - b.n c1210 │ │ + b.n c1220 │ │ strb r7, [r4, #2] │ │ - b.n c11a6 │ │ + b.n c11b6 │ │ strb r1, [r0, #0] │ │ - b.n c12f8 │ │ + b.n c1308 │ │ @ instruction: 0xffc3eaff │ │ str r1, [r0, r0] │ │ - b.n c11b2 │ │ + b.n c11c2 │ │ strb r0, [r0, #0] │ │ - b.n c11b6 │ │ + b.n c11c6 │ │ lsls r5, r1, #3 │ │ add.w r0, r0, r0 │ │ - b.n c151e │ │ + b.n c152e │ │ @ instruction: 0xffd61aff │ │ movs r0, #5 │ │ - b.n c0a34 │ │ + b.n c0a44 │ │ movs r7, r0 │ │ - b.n c11ca │ │ + b.n c11da │ │ asrs r5, r0, #32 │ │ - b.n c11ce │ │ + b.n c11de │ │ @ instruction: 0xffbbeaff │ │ lsls r0, r4, #1 │ │ - b.n c09d4 │ │ + b.n c09e4 │ │ movs r0, r0 │ │ - b.n c0fb8 │ │ + b.n c0fc8 │ │ asrs r2, r3, #1 │ │ - b.n c0a3e │ │ + b.n c0a4e │ │ lsls r4, r6, #30 │ │ - b.n c14b2 │ │ + b.n c14c2 │ │ lsrs r7, r7, #31 │ │ - b.n c1544 │ │ + b.n c1554 │ │ movs r0, r0 │ │ - b.n c154c │ │ + b.n c155c │ │ @ instruction: 0xffcb0aff │ │ asrs r0, r1, #1 │ │ - b.n c09f0 │ │ + b.n c0a00 │ │ ands r0, r2 │ │ - b.n c09da │ │ + b.n c09ea │ │ movs r1, #233 @ 0xe9 │ │ - b.n c14ba │ │ + b.n c14ca │ │ adds r0, #64 @ 0x40 │ │ - b.n c09fc │ │ + b.n c0a0c │ │ asrs r1, r0, #32 │ │ - b.n c0fe0 │ │ + b.n c0ff0 │ │ lsrs r0, r6 │ │ - b.n c1260 │ │ + b.n c1270 │ │ ands r0, r0 │ │ - b.n c120a │ │ + b.n c121a │ │ adds r0, #3 │ │ - b.n c0fec │ │ + b.n c0ffc │ │ movs r1, r0 │ │ - b.n c1612 │ │ - ldr r4, [r2, #12] │ │ + b.n c1622 │ │ + ldr r3, [r2, #12] │ │ @ instruction: 0xebff0004 │ │ - b.n c121a │ │ - beq.n c0f0c │ │ - b.n c1374 │ │ + b.n c122a │ │ + beq.n c0f1c │ │ + b.n c1384 │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {r3, r4, ip, lr, pc} │ │ - b.n c137c │ │ - ldr r5, [pc, #960] @ (c12a8 ) │ │ + b.n c138c │ │ + ldr r5, [pc, #960] @ (c12b8 ) │ │ ldmia.w sp!, {r0, r1, r2, r4, r6} │ │ and.w r0, r0, sp, rrx │ │ - b.n c1632 │ │ - beq.n c0f24 │ │ - b.n c138c │ │ + b.n c1642 │ │ + beq.n c0f34 │ │ + b.n c139c │ │ ldrh r0, [r6, #46] @ 0x2e │ │ - ldmia.w sp!, {r2, r4, r5, r7, r8, fp, ip, lr, pc} │ │ + ldmia.w sp!, {r2, r6, r7, r8, fp, ip, lr, pc} │ │ movs r1, r0 │ │ - ldrh r7, [r1, #4] │ │ - vpadal.s16 , │ │ + ldrh r2, [r4, #10] │ │ + vpadal.u16 d23, d19 │ │ @ instruction: 0xfff448f0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n c1428 │ │ - beq.n c0f20 │ │ - b.n c13ac │ │ + b.n c1438 │ │ + beq.n c0f30 │ │ + b.n c13bc │ │ str r0, [r0, r0] │ │ - b.n c1256 │ │ + b.n c1266 │ │ movs r5, r0 │ │ - b.n c0aba │ │ + b.n c0aca │ │ ands r1, r0 │ │ - b.n c125e │ │ + b.n c126e │ │ str r0, [r0, #0] │ │ - b.n c1662 │ │ + b.n c1672 │ │ movs r0, r0 │ │ - b.n c15c6 │ │ + b.n c15d6 │ │ asrs r0, r0, #32 │ │ - b.n c166a │ │ + b.n c167a │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ movs r5, r0 │ │ - b.n c1272 │ │ + b.n c1282 │ │ movs r0, #4 │ │ - b.n c1676 │ │ - add r1, pc, #220 @ (adr r1, c1014 ) │ │ + b.n c1686 │ │ + add r1, pc, #216 @ (adr r1, c1020 ) │ │ @ instruction: 0xebff0000 │ │ - b.n c15de │ │ + b.n c15ee │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ - beq.n c0f64 │ │ - b.n c13dc │ │ + beq.n c0f74 │ │ + b.n c13ec │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r0, r2, r4, r6, r7, ip} │ │ - b.n c12f8 │ │ + b.n c1308 │ │ lsls r4, r7, #1 │ │ - b.n c145c │ │ + b.n c146c │ │ adds r0, #6 │ │ - b.n c0b00 │ │ + b.n c0b10 │ │ asrs r1, r0, #2 │ │ - b.n c105a │ │ + b.n c106a │ │ str r0, [r6, #8] │ │ - b.n c12e0 │ │ + b.n c12f0 │ │ asrs r5, r2, #3 │ │ - b.n c130c │ │ + b.n c131c │ │ movs r1, #1 │ │ - b.n c1070 │ │ + b.n c1080 │ │ movs r0, #28 │ │ - b.n c0a8e │ │ + b.n c0a9e │ │ strb r2, [r7, #2] │ │ - b.n c1312 │ │ + b.n c1322 │ │ adds r0, #7 │ │ - b.n c0fb8 │ │ + b.n c0fc8 │ │ movs r7, r4 │ │ - b.n c159c │ │ + b.n c15ac │ │ movs r5, r3 │ │ subs r0, r0, r0 │ │ lsls r1, r0, #2 │ │ - b.n c107e │ │ + b.n c108e │ │ movs r0, r4 │ │ - b.n c15b0 │ │ + b.n c15c0 │ │ asrs r0, r6, #2 │ │ - b.n c1326 │ │ + b.n c1336 │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ asrs r1, r0, #2 │ │ - b.n c1092 │ │ + b.n c10a2 │ │ movs r4, r0 │ │ - b.n c0b3c │ │ + b.n c0b4c │ │ movs r0, r0 │ │ - b.n c163e │ │ + b.n c164e │ │ asrs r4, r6, #6 │ │ - b.n c133c │ │ + b.n c134c │ │ movs r3, r0 │ │ - b.n c139e │ │ + b.n c13ae │ │ movs r4, r0 │ │ - b.n c0b2c │ │ + b.n c0b3c │ │ movs r0, r0 │ │ - b.n c16e6 │ │ + b.n c16f6 │ │ asrs r1, r0, #32 │ │ asrs r2, r0, #2 │ │ movs r0, #28 │ │ asrs r1, r0, #10 │ │ movs r0, #0 │ │ asrs r4, r0, #22 │ │ asrs r2, r7, #6 │ │ asrs r1, r2, #7 │ │ asrs r4, r0, #32 │ │ asrs r4, r0, #22 │ │ - beq.n c0fdc │ │ - b.n c1454 │ │ + beq.n c0fec │ │ + b.n c1464 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r2} │ │ - b.n c0b70 │ │ + b.n c0b80 │ │ movs r0, r0 │ │ - b.n c1672 │ │ + b.n c1682 │ │ movs r3, r0 │ │ - b.n c13ce │ │ + b.n c13de │ │ movs r4, r0 │ │ - b.n c0b5c │ │ + b.n c0b6c │ │ adds r0, #184 @ 0xb8 │ │ asrs r2, r2, #7 │ │ movs r0, r0 │ │ - b.n c171a │ │ + b.n c172a │ │ movs r1, #147 @ 0x93 │ │ asrs r1, r4, #32 │ │ movs r0, #20 │ │ asrs r1, r0, #10 │ │ movs r0, #240 @ 0xf0 │ │ asrs r4, r0, #7 │ │ - beq.n c1008 │ │ + beq.n c1018 │ │ asrs r3, r1, #9 │ │ ldrh r0, [r6, #6] │ │ adds r5, r7, r2 │ │ @ instruction: 0xffd3eaff │ │ lsls r0, r1, #1 │ │ - b.n c0b34 │ │ + b.n c0b44 │ │ movs r0, r0 │ │ - b.n c1118 │ │ + b.n c1128 │ │ asrs r2, r3, #1 │ │ - b.n c0b9e │ │ + b.n c0bae │ │ lsls r4, r6, #30 │ │ - b.n c1612 │ │ + b.n c1622 │ │ lsrs r7, r7, #31 │ │ - b.n c16a4 │ │ + b.n c16b4 │ │ movs r0, r0 │ │ - b.n c16ac │ │ + b.n c16bc │ │ @ instruction: 0xffcc0aff │ │ asrs r0, r6, #32 │ │ - b.n c0b50 │ │ + b.n c0b60 │ │ ands r0, r0 │ │ - b.n c1356 │ │ + b.n c1366 │ │ str r0, [r2, #0] │ │ - b.n c0b3e │ │ + b.n c0b4e │ │ movs r1, r0 │ │ - b.n c175e │ │ + b.n c176e │ │ adds r0, #36 @ 0x24 │ │ - b.n c0b60 │ │ + b.n c0b70 │ │ asrs r1, r0, #32 │ │ - b.n c1144 │ │ + b.n c1154 │ │ movs r1, #233 @ 0xe9 │ │ - b.n c162a │ │ + b.n c163a │ │ str r0, [r6, #12] │ │ - b.n c13c8 │ │ + b.n c13d8 │ │ adds r0, #3 │ │ - b.n c1150 │ │ - ldr r4, [r7, #4] │ │ + b.n c1160 │ │ + ldr r3, [r7, #4] │ │ @ instruction: 0xebff0004 │ │ - b.n c137a │ │ - beq.n c105c │ │ - b.n c14d4 │ │ + b.n c138a │ │ + beq.n c106c │ │ + b.n c14e4 │ │ ldrh r0, [r6, #6] │ │ - ldmia.w sp!, {r2, r4, r6, fp, ip, lr, pc} │ │ + ldmia.w sp!, {r2, r5, r6, fp, ip, lr, pc} │ │ movs r1, r0 │ │ - strh r3, [r5, #56] @ 0x38 │ │ - vsri.64 , , #12 │ │ + strh r6, [r7, #62] @ 0x3e │ │ + vsli.32 d23, d31, #20 │ │ @ instruction: 0xfff448f0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n c1570 │ │ - beq.n c1068 │ │ - b.n c14f4 │ │ + b.n c1580 │ │ + beq.n c1078 │ │ + b.n c1504 │ │ str r0, [r0, r0] │ │ - b.n c139e │ │ + b.n c13ae │ │ movs r5, r0 │ │ - b.n c0c02 │ │ + b.n c0c12 │ │ ands r1, r0 │ │ - b.n c13a6 │ │ + b.n c13b6 │ │ movs r0, r0 │ │ - b.n c170a │ │ + b.n c171a │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ movs r5, r0 │ │ - b.n c13b2 │ │ + b.n c13c2 │ │ asrs r0, r0, #32 │ │ - b.n c17b6 │ │ + b.n c17c6 │ │ movs r0, #8 │ │ - b.n c17ba │ │ - add r0, pc, #920 @ (adr r0, c1414 ) │ │ + b.n c17ca │ │ + add r0, pc, #916 @ (adr r0, c1420 ) │ │ @ instruction: 0xebff0000 │ │ - b.n c1722 │ │ + b.n c1732 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ - beq.n c10a8 │ │ - b.n c1520 │ │ + beq.n c10b8 │ │ + b.n c1530 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {ip} │ │ - b.n c17d2 │ │ + b.n c17e2 │ │ movs r0, r0 │ │ and.w r0, r0, r5, lsr #7 │ │ - b.n c1444 │ │ + b.n c1454 │ │ movs r0, #28 │ │ - b.n c15a8 │ │ + b.n c15b8 │ │ strb r0, [r0, #0] │ │ - b.n c1862 │ │ + b.n c1872 │ │ lsls r1, r0, #4 │ │ - b.n c0fca │ │ + b.n c0fda │ │ adds r0, #188 @ 0xbc │ │ - b.n c144a │ │ + b.n c145a │ │ lsls r4, r7, #1 │ │ - b.n c15b8 │ │ + b.n c15c8 │ │ asrs r1, r0, #2 │ │ - b.n c11b2 │ │ + b.n c11c2 │ │ adds r0, #163 @ 0xa3 │ │ - b.n c11c4 │ │ + b.n c11d4 │ │ adds r0, #176 @ 0xb0 │ │ - b.n c143c │ │ + b.n c144c │ │ asrs r5, r2, #3 │ │ - b.n c1468 │ │ + b.n c1478 │ │ adds r0, #6 │ │ - b.n c0c6c │ │ + b.n c0c7c │ │ movs r1, #1 │ │ - b.n c0fea │ │ + b.n c0ffa │ │ strb r2, [r7, #2] │ │ - b.n c146e │ │ + b.n c147e │ │ adds r0, #7 │ │ - b.n c1114 │ │ + b.n c1124 │ │ movs r7, r4 │ │ - b.n c16f8 │ │ + b.n c1708 │ │ movs r7, r3 │ │ subs r0, r0, r0 │ │ lsls r1, r0, #2 │ │ - b.n c11da │ │ + b.n c11ea │ │ movs r0, r4 │ │ - b.n c170c │ │ + b.n c171c │ │ asrs r0, r6, #2 │ │ - b.n c1482 │ │ + b.n c1492 │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ asrs r1, r0, #2 │ │ - b.n c11ee │ │ + b.n c11fe │ │ movs r4, r0 │ │ - b.n c0c98 │ │ + b.n c0ca8 │ │ movs r0, r0 │ │ - b.n c179a │ │ + b.n c17aa │ │ adds r0, #8 │ │ - b.n c1836 │ │ + b.n c1846 │ │ asrs r4, r6, #6 │ │ - b.n c149c │ │ + b.n c14ac │ │ lsls r3, r2, #4 │ │ - b.n c10bc │ │ + b.n c10cc │ │ movs r4, r0 │ │ - b.n c0c8c │ │ + b.n c0c9c │ │ asrs r1, r0, #32 │ │ asrs r2, r0, #2 │ │ movs r0, r0 │ │ - b.n c184a │ │ + b.n c185a │ │ movs r0, #28 │ │ asrs r1, r0, #10 │ │ movs r0, #0 │ │ asrs r4, r0, #22 │ │ asrs r2, r7, #6 │ │ asrs r1, r2, #7 │ │ asrs r4, r0, #32 │ │ asrs r4, r0, #22 │ │ - beq.n c113c │ │ - b.n c15b4 │ │ + beq.n c114c │ │ + b.n c15c4 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r2} │ │ - b.n c0cd0 │ │ + b.n c0ce0 │ │ adds r0, #8 │ │ - b.n c186a │ │ + b.n c187a │ │ movs r0, r0 │ │ - b.n c17d6 │ │ + b.n c17e6 │ │ lsls r3, r2, #4 │ │ - b.n c10f0 │ │ + b.n c1100 │ │ movs r4, r0 │ │ - b.n c0cc0 │ │ + b.n c0cd0 │ │ adds r0, #184 @ 0xb8 │ │ asrs r2, r2, #7 │ │ movs r0, r0 │ │ - b.n c187e │ │ + b.n c188e │ │ movs r1, #147 @ 0x93 │ │ asrs r1, r4, #32 │ │ movs r0, #20 │ │ asrs r1, r0, #10 │ │ movs r0, #240 @ 0xf0 │ │ asrs r4, r0, #7 │ │ - beq.n c116c │ │ + beq.n c117c │ │ asrs r3, r1, #9 │ │ ldrh r0, [r6, #6] │ │ adds r5, r7, r2 │ │ @ instruction: 0xffcbeaff │ │ lsls r0, r1, #1 │ │ - b.n c0c98 │ │ + b.n c0ca8 │ │ movs r0, r0 │ │ - b.n c127c │ │ + b.n c128c │ │ asrs r2, r3, #1 │ │ - b.n c0d02 │ │ + b.n c0d12 │ │ lsls r4, r6, #30 │ │ - b.n c1776 │ │ + b.n c1786 │ │ lsrs r7, r7, #31 │ │ - b.n c1808 │ │ + b.n c1818 │ │ movs r0, r0 │ │ - b.n c1810 │ │ + b.n c1820 │ │ @ instruction: 0xffc40aff │ │ asrs r0, r6, #32 │ │ - b.n c0cb4 │ │ + b.n c0cc4 │ │ ands r0, r0 │ │ - b.n c14ba │ │ + b.n c14ca │ │ str r0, [r2, #0] │ │ - b.n c0ca2 │ │ + b.n c0cb2 │ │ movs r1, r0 │ │ - b.n c18c2 │ │ + b.n c18d2 │ │ adds r0, #36 @ 0x24 │ │ - b.n c0cc4 │ │ + b.n c0cd4 │ │ asrs r1, r0, #32 │ │ - b.n c12a8 │ │ + b.n c12b8 │ │ movs r1, #233 @ 0xe9 │ │ - b.n c178e │ │ + b.n c179e │ │ str r0, [r6, #12] │ │ - b.n c152c │ │ + b.n c153c │ │ adds r0, #3 │ │ - b.n c12b4 │ │ - ldr r3, [r4, #0] │ │ + b.n c12c4 │ │ + ldr r2, [r4, #0] │ │ @ instruction: 0xebff0004 │ │ - b.n c14de │ │ - beq.n c11c0 │ │ - b.n c1638 │ │ + b.n c14ee │ │ + beq.n c11d0 │ │ + b.n c1648 │ │ ldrh r0, [r6, #6] │ │ - ldmia.w sp!, {r4, r5, r6, r7, r9, sl, ip, lr, pc} │ │ + ldmia.w sp!, {r8, r9, sl, ip, lr, pc} │ │ movs r1, r0 │ │ - strh r7, [r0, #46] @ 0x2e │ │ - vrsra.u64 d23, d9, #12 │ │ + strh r2, [r3, #52] @ 0x34 │ │ + vrsra.u64 , , #12 │ │ vcvt.u32.f32 q10, q8, #12 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n c16d4 │ │ - beq.n c11dc │ │ - b.n c1658 │ │ + b.n c16e4 │ │ + beq.n c11ec │ │ + b.n c1668 │ │ ands r0, r0 │ │ - b.n c1502 │ │ + b.n c1512 │ │ lsls r5, r2, #3 │ │ - b.n c1566 │ │ + b.n c1576 │ │ movs r1, r0 │ │ - b.n c186a │ │ + b.n c187a │ │ lsls r6, r5, #1 │ │ rev r0, r0 │ │ movs r1, r0 │ │ - b.n c1652 │ │ + b.n c1662 │ │ str r4, [r7, r1] │ │ - b.n c16de │ │ + b.n c16ee │ │ movs r5, r0 │ │ - b.n c0d62 │ │ + b.n c0d72 │ │ asrs r0, r6, #1 │ │ - b.n c0fbc │ │ + b.n c0fcc │ │ movs r0, #129 @ 0x81 │ │ - b.n c1522 │ │ + b.n c1532 │ │ asrs r5, r0, #32 │ │ - b.n c1526 │ │ + b.n c1536 │ │ movs r0, #178 @ 0xb2 │ │ - b.n c154c │ │ + b.n c155c │ │ movs r0, r0 │ │ - b.n c1892 │ │ + b.n c18a2 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #1 │ │ - b.n c167a │ │ + b.n c168a │ │ movs r0, #176 @ 0xb0 │ │ - b.n c157c │ │ + b.n c158c │ │ movs r4, r0 │ │ and.w r0, r0, r4 │ │ - b.n c1542 │ │ + b.n c1552 │ │ @ instruction: 0xffeaebff │ │ movs r0, r0 │ │ - b.n c18aa │ │ + b.n c18ba │ │ lsls r7, r2, #1 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n c0dba │ │ + b.n c0dca │ │ str r4, [r3, #0] │ │ - b.n c171e │ │ + b.n c172e │ │ lsls r0, r6, #1 │ │ - b.n c0f78 │ │ + b.n c0f88 │ │ movs r1, #0 │ │ - b.n c114a │ │ + b.n c115a │ │ lsls r0, r0, #2 │ │ - b.n c132c │ │ + b.n c133c │ │ lsls r0, r6, #2 │ │ - b.n c15c6 │ │ + b.n c15d6 │ │ asrs r4, r2, #32 │ │ - b.n c172e │ │ + b.n c173e │ │ movs r0, #12 │ │ - b.n c0d48 │ │ + b.n c0d58 │ │ str r0, [sp, #16] │ │ - b.n c0d56 │ │ + b.n c0d66 │ │ lsls r0, r0, #2 │ │ - b.n c1338 │ │ + b.n c1348 │ │ strh r0, [r0, #0] │ │ - b.n c0d5e │ │ + b.n c0d6e │ │ movs r0, #12 │ │ - b.n c1758 │ │ + b.n c1768 │ │ lsls r0, r6, #2 │ │ - b.n c15e2 │ │ + b.n c15f2 │ │ asrs r0, r0, #32 │ │ - b.n c1168 │ │ + b.n c1178 │ │ movs r4, r0 │ │ - b.n c158a │ │ + b.n c159a │ │ strh r0, [r6, #6] │ │ - b.n c15e8 │ │ + b.n c15f8 │ │ ldmia r7, {r0, r2, r4, r5, r7} │ │ @ instruction: 0xebff0000 │ │ - b.n c18f6 │ │ + b.n c1906 │ │ movs r2, r5 │ │ subs r0, r0, r0 │ │ lsls r5, r2, #3 │ │ - b.n c1606 │ │ + b.n c1616 │ │ movs r7, r2 │ │ - b.n c1902 │ │ + b.n c1912 │ │ asrs r4, r1, #32 │ │ push {r0, r2, r3, r4, r7, lr} │ │ movs r1, r0 │ │ uxth r0, r0 │ │ movs r0, #188 @ 0xbc │ │ - cbz r1, c12a2 │ │ + cbz r1, c12b2 │ │ movs r5, r0 │ │ push {r2, r6, r7, lr} │ │ lsls r0, r6, #1 │ │ @ instruction: 0xb6af │ │ asrs r0, r0, #4 │ │ @ instruction: 0xb786 │ │ asrs r0, r0, #32 │ │ - cbz r0, c12f6 │ │ + cbz r0, c1306 │ │ asrs r2, r4, #2 │ │ sub sp, #4 │ │ lsls r5, r2, #3 │ │ - cbz r4, c12ba │ │ + cbz r4, c12ca │ │ lsls r0, r0, #2 │ │ sub sp, #20 │ │ asrs r0, r6, #2 │ │ - cbz r0, c12be │ │ + cbz r0, c12ce │ │ movs r0, r0 │ │ - cbz r0, c12fa │ │ - beq.n c12c4 │ │ + cbz r0, c130a │ │ + beq.n c12d4 │ │ sxtb r3, r1 │ │ ldrh r0, [r6, #58] @ 0x3a │ │ @ instruction: 0xb8bd │ │ asrs r4, r0, #32 │ │ - b.n c15de │ │ + b.n c15ee │ │ lsrs r0, r2, #31 │ │ - b.n c18c0 │ │ + b.n c18d0 │ │ movs r0, #4 │ │ - b.n c0e88 │ │ + b.n c0e98 │ │ movs r1, r0 │ │ - b.n c18ce │ │ + b.n c18de │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ asrs r0, r3, #32 │ │ - b.n c0dda │ │ + b.n c0dea │ │ movs r0, #180 @ 0xb4 │ │ - b.n c165e │ │ + b.n c166e │ │ movs r0, r0 │ │ - b.n c195c │ │ + b.n c196c │ │ movs r0, #0 │ │ - b.n c15c2 │ │ + b.n c15d2 │ │ movs r0, #180 @ 0xb4 │ │ - b.n c164a │ │ + b.n c165a │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, #0 │ │ - b.n c1a0a │ │ + b.n c1a1a │ │ movs r0, #188 @ 0xbc │ │ - b.n c0dd0 │ │ + b.n c0de0 │ │ asrs r4, r0, #32 │ │ - b.n c17d4 │ │ + b.n c17e4 │ │ movs r2, r0 │ │ and.w r0, r0, r0, lsr #8 │ │ - b.n c0e02 │ │ + b.n c0e12 │ │ adds r0, #0 │ │ - b.n c1a1e │ │ + b.n c1a2e │ │ adds r0, #8 │ │ - b.n c0de6 │ │ + b.n c0df6 │ │ movs r1, r0 │ │ - b.n c17e6 │ │ + b.n c17f6 │ │ lsls r0, r6, #2 │ │ - b.n c166c │ │ + b.n c167c │ │ movs r4, r1 │ │ - b.n c0e16 │ │ + b.n c0e26 │ │ asrs r4, r0, #32 │ │ - b.n c0e12 │ │ + b.n c0e22 │ │ asrs r2, r0, #32 │ │ - b.n c19f8 │ │ + b.n c1a08 │ │ asrs r4, r0, #32 │ │ - b.n c0dfa │ │ + b.n c0e0a │ │ lsls r2, r6, #30 │ │ - b.n c190e │ │ + b.n c191e │ │ lsrs r7, r7, #31 │ │ - b.n c19a0 │ │ + b.n c19b0 │ │ movs r3, r1 │ │ - b.n c1806 │ │ + b.n c1816 │ │ movs r0, #4 │ │ - b.n c164a │ │ + b.n c165a │ │ subs r0, r2, #7 │ │ - b.n c192c │ │ + b.n c193c │ │ adds r0, #4 │ │ - b.n c0ef6 │ │ + b.n c0f06 │ │ movs r1, r0 │ │ - b.n c193c │ │ + b.n c194c │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ movs r0, #24 │ │ - b.n c0e46 │ │ + b.n c0e56 │ │ adds r0, #180 @ 0xb4 │ │ - b.n c16ca │ │ + b.n c16da │ │ movs r0, r0 │ │ - b.n c19ca │ │ + b.n c19da │ │ adds r0, #1 │ │ - b.n c1630 │ │ + b.n c1640 │ │ adds r0, #180 @ 0xb4 │ │ - b.n c16b6 │ │ + b.n c16c6 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ adds r0, #0 │ │ - b.n c1a76 │ │ + b.n c1a86 │ │ adds r0, #188 @ 0xbc │ │ - b.n c0e3e │ │ + b.n c0e4e │ │ movs r0, #4 │ │ - b.n c1842 │ │ + b.n c1852 │ │ movs r2, r0 │ │ and.w r0, r0, r0, lsr #12 │ │ - b.n c0e6e │ │ + b.n c0e7e │ │ str r0, [r0, #0] │ │ - b.n c1a8a │ │ + b.n c1a9a │ │ str r0, [r1, #0] │ │ - b.n c0e54 │ │ + b.n c0e64 │ │ asrs r1, r0, #32 │ │ - b.n c1854 │ │ + b.n c1864 │ │ asrs r0, r6, #2 │ │ - b.n c16da │ │ + b.n c16ea │ │ asrs r2, r6, #30 │ │ - b.n c196a │ │ + b.n c197a │ │ subs r7, r7, #7 │ │ - b.n c19fc │ │ + b.n c1a0c │ │ movs r1, r0 │ │ - b.n c1602 │ │ + b.n c1612 │ │ movs r0, r2 │ │ lsrs r0, r0, #8 │ │ - beq.n c1398 │ │ - b.n c1800 │ │ + beq.n c13a8 │ │ + b.n c1810 │ │ ldrh r0, [r6, #58] @ 0x3a │ │ ldmia.w sp!, {r1, r4, r5, r7, r8, r9, sl, ip} │ │ - b.n c1982 │ │ + b.n c1992 │ │ subs r7, r7, #7 │ │ - b.n c1a14 │ │ + b.n c1a24 │ │ movs r1, r0 │ │ - b.n c161a │ │ + b.n c162a │ │ @ instruction: 0xfff91aff │ │ movs r5, r0 │ │ - b.n c0f2a │ │ + b.n c0f3a │ │ movs r1, r0 │ │ - b.n c1886 │ │ + b.n c1896 │ │ movs r5, r0 │ │ - b.n c0f12 │ │ + b.n c0f22 │ │ lsls r0, r6, #1 │ │ - b.n c10ec │ │ + b.n c10fc │ │ asrs r0, r0, #32 │ │ - b.n c1ad2 │ │ + b.n c1ae2 │ │ lsls r0, r0, #2 │ │ - b.n c149e │ │ + b.n c14ae │ │ asrs r4, r7, #30 │ │ - b.n c171a │ │ + b.n c172a │ │ lsls r2, r6, #30 │ │ - b.n c19ae │ │ + b.n c19be │ │ lsrs r7, r7, #31 │ │ - b.n c1a40 │ │ - beq.n c13d4 │ │ - b.n c183c │ │ + b.n c1a50 │ │ + beq.n c13e4 │ │ + b.n c184c │ │ ldrh r0, [r6, #58] @ 0x3a │ │ ldmia.w sp!, {r0, r2} │ │ - b.n c0f56 │ │ + b.n c0f66 │ │ @ instruction: 0xfff5eaff │ │ - ldr r0, [pc, #960] @ (c1774 ) │ │ + ldr r0, [pc, #960] @ (c1784 ) │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n c18d4 │ │ - beq.n c13dc │ │ - b.n c1858 │ │ + b.n c18e4 │ │ + beq.n c13ec │ │ + b.n c1868 │ │ str r0, [r0, r0] │ │ - b.n c1702 │ │ + b.n c1712 │ │ lsls r6, r6, #2 │ │ - b.n c1768 │ │ + b.n c1778 │ │ ands r2, r0 │ │ - b.n c170a │ │ + b.n c171a │ │ strb r4, [r1, #0] │ │ - b.n c0f04 │ │ + b.n c0f14 │ │ movs r0, r0 │ │ - b.n c14d4 │ │ + b.n c14e4 │ │ str r0, [r1, #0] │ │ - b.n c0f0c │ │ + b.n c0f1c │ │ asrs r5, r0, #32 │ │ - b.n c171a │ │ + b.n c172a │ │ movs r0, #8 │ │ - b.n c0efe │ │ + b.n c0f0e │ │ movs r0, r1 │ │ - b.n c18fc │ │ + b.n c190c │ │ str r0, [r6, #12] │ │ - b.n c1780 │ │ - bne.n c141c │ │ + b.n c1790 │ │ + bne.n c142c │ │ @ instruction: 0xebff100c │ │ - b.n c0f28 │ │ + b.n c0f38 │ │ movs r0, r0 │ │ - b.n c1a94 │ │ + b.n c1aa4 │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ asrs r4, r1, #32 │ │ - b.n c0f24 │ │ + b.n c0f34 │ │ strb r1, [r0, #0] │ │ - b.n c1b3e │ │ + b.n c1b4e │ │ movs r0, r1 │ │ - b.n c0f3c │ │ + b.n c0f4c │ │ adds r0, #4 │ │ - b.n c0f2e │ │ + b.n c0f3e │ │ asrs r0, r0, #1 │ │ - b.n c0f2c │ │ + b.n c0f3c │ │ movs r0, #20 │ │ - b.n c190e │ │ + b.n c191e │ │ movs r0, #0 │ │ - b.n c0f1a │ │ + b.n c0f2a │ │ str r3, [r2, #0] │ │ - b.n c191c │ │ + b.n c192c │ │ movs r0, #12 │ │ - b.n c0f3a │ │ + b.n c0f4a │ │ asrs r4, r3, #1 │ │ - b.n c0fc0 │ │ + b.n c0fd0 │ │ strb r6, [r6, #4] │ │ - b.n c1530 │ │ + b.n c1540 │ │ asrs r0, r0, #32 │ │ - b.n c1b66 │ │ + b.n c1b76 │ │ movs r7, r0 │ │ - b.n c16ce │ │ + b.n c16de │ │ movs r2, r0 │ │ subs r2, #0 │ │ movs r1, r0 │ │ - b.n c1772 │ │ - beq.n c1454 │ │ - b.n c18cc │ │ + b.n c1782 │ │ + beq.n c1464 │ │ + b.n c18dc │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r3, r4, ip} │ │ - b.n c0f7c │ │ + b.n c0f8c │ │ asrs r1, r0, #32 │ │ - b.n c1560 │ │ - bcc.n c13ea │ │ + b.n c1570 │ │ + bcc.n c13fa │ │ @ instruction: 0xebff17b4 │ │ - b.n c1a5a │ │ + b.n c1a6a │ │ subs r7, r7, #7 │ │ - b.n c1aec │ │ + b.n c1afc │ │ movs r1, r0 │ │ - b.n c1792 │ │ - beq.n c1474 │ │ - b.n c18ec │ │ + b.n c17a2 │ │ + beq.n c1484 │ │ + b.n c18fc │ │ ldrh r0, [r6, #6] │ │ - ldmia.w sp!, {r0, r5, r7, r8, r9, fp, pc} │ │ + ldmia.w sp!, {r1, r2, r4, r5, r6, sl, fp, pc} │ │ @ instruction: 0xfff44cd0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n c1980 │ │ - beq.n c1478 │ │ - b.n c1904 │ │ + b.n c1990 │ │ + beq.n c1488 │ │ + b.n c1914 │ │ asrs r0, r0, #32 │ │ - b.n c1bae │ │ + b.n c1bbe │ │ str r0, [r0, #0] │ │ - b.n c17b2 │ │ + b.n c17c2 │ │ ands r0, r0 │ │ - b.n c1bb6 │ │ + b.n c1bc6 │ │ ldrsh r1, [r5, r1] │ │ add.w r0, r0, r0 │ │ - b.n c1b1e │ │ + b.n c1b2e │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ ldrb r2, [r6, r3] │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n c0faa │ │ + b.n c0fba │ │ movs r3, r2 │ │ - b.n c1b3c │ │ + b.n c1b4c │ │ movs r5, r1 │ │ ldmia r2!, {} │ │ movs r0, r0 │ │ - b.n c1b44 │ │ + b.n c1b54 │ │ movs r2, r0 │ │ asrs r7, r2, #13 │ │ movs r4, r1 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n c1b90 │ │ + b.n c1ba0 │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ ldrb r3, [r6, #4] │ │ - b.n c1aba │ │ + b.n c1aca │ │ ldrb r7, [r7, #31] │ │ - b.n c1b4c │ │ + b.n c1b5c │ │ lsls r4, r1, #1 │ │ - b.n c0ff0 │ │ + b.n c1000 │ │ movs r0, r0 │ │ - b.n c15d4 │ │ + b.n c15e4 │ │ lsls r2, r3, #1 │ │ - b.n c105a │ │ + b.n c106a │ │ movs r0, r0 │ │ - b.n c1b5e │ │ + b.n c1b6e │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ ands r7, r0 │ │ - b.n c1806 │ │ + b.n c1816 │ │ movs r1, r0 │ │ and.w r0, r0, r4, lsr #32 │ │ - b.n c1b7c │ │ + b.n c1b8c │ │ @ instruction: 0xfff61aff │ │ movs r4, r0 │ │ - b.n c1816 │ │ - beq.n c14f8 │ │ - b.n c1970 │ │ + b.n c1826 │ │ + beq.n c1508 │ │ + b.n c1980 │ │ ldrh r0, [r2, #38] @ 0x26 │ │ ldmia.w sp!, {r5, ip} │ │ - b.n c1020 │ │ + b.n c1030 │ │ movs r1, r0 │ │ - b.n c1c26 │ │ + b.n c1c36 │ │ adds r0, #28 │ │ - b.n c1028 │ │ + b.n c1038 │ │ movs r0, #46 @ 0x2e │ │ - b.n c1c2e │ │ + b.n c1c3e │ │ asrs r1, r0, #32 │ │ - b.n c1610 │ │ + b.n c1620 │ │ str r0, [r6, #12] │ │ - b.n c1890 │ │ + b.n c18a0 │ │ adds r0, #3 │ │ - b.n c1618 │ │ - str r2, [r1, #116] @ 0x74 │ │ + b.n c1628 │ │ + str r1, [r1, #116] @ 0x74 │ │ @ instruction: 0xebffffef │ │ - @ instruction: 0xeaffd398 │ │ + @ instruction: 0xeaffd3a8 │ │ movs r1, r0 │ │ - udf #11 │ │ - vabal.u q12, d20, d10 │ │ + svc 49 @ 0x31 │ │ + vqshlu.s32 q12, , #20 │ │ vcvt.f16.u16 q10, q8, #12 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n c1a30 │ │ + b.n c1a40 │ │ stmia r0!, {r2} │ │ - b.n c103c │ │ - b.n c1524 │ │ - b.n c103e │ │ + b.n c104c │ │ + b.n c1534 │ │ + b.n c104e │ │ movs r4, r1 │ │ - b.n c17de │ │ + b.n c17ee │ │ movs r0, #12 │ │ - b.n c1866 │ │ + b.n c1876 │ │ movs r0, #14 │ │ adds r1, #160 @ 0xa0 │ │ movs r0, r0 │ │ - b.n c1bd2 │ │ + b.n c1be2 │ │ movs r5, r4 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n c1058 │ │ + b.n c1068 │ │ adds r0, #0 │ │ - b.n c105a │ │ + b.n c106a │ │ movs r1, r0 │ │ - b.n c1656 │ │ + b.n c1666 │ │ asrs r3, r0, #32 │ │ - b.n c165e │ │ + b.n c166e │ │ adds r0, #0 │ │ - b.n c1c86 │ │ + b.n c1c96 │ │ ands r3, r0 │ │ - b.n c164e │ │ + b.n c165e │ │ movs r4, r0 │ │ - b.n c1bf6 │ │ + b.n c1c06 │ │ movs r1, r1 │ │ subs r2, #0 │ │ ands r3, r0 │ │ - b.n c1658 │ │ + b.n c1668 │ │ str r3, [r0, r0] │ │ - b.n c165a │ │ + b.n c166a │ │ adds r0, #4 │ │ - b.n c19e4 │ │ + b.n c19f4 │ │ str r4, [r0, r0] │ │ - b.n c0f8c │ │ + b.n c0f9c │ │ ands r4, r0 │ │ - b.n c0f8e │ │ + b.n c0f9e │ │ movs r5, r0 │ │ - b.n c1812 │ │ + b.n c1822 │ │ @ instruction: 0xfff50aff │ │ movs r1, r0 │ │ - b.n c1cb2 │ │ + b.n c1cc2 │ │ movs r0, r0 │ │ adds r3, #224 @ 0xe0 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r1} │ │ - b.n c1864 │ │ + b.n c1874 │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ movs r3, r0 │ │ - b.n c1686 │ │ + b.n c1696 │ │ asrs r3, r0, #32 │ │ - b.n c168c │ │ + b.n c169c │ │ movs r0, #0 │ │ - b.n c18ce │ │ + b.n c18de │ │ str r1, [r0, r0] │ │ - b.n c18d2 │ │ + b.n c18e2 │ │ adds r0, #4 │ │ - b.n c147a │ │ + b.n c148a │ │ str r4, [r0, #0] │ │ - b.n c1484 │ │ + b.n c1494 │ │ movs r0, #164 @ 0xa4 │ │ - b.n c1542 │ │ + b.n c1552 │ │ lsls r4, r4 │ │ - b.n c154c │ │ + b.n c155c │ │ movs r1, r0 │ │ - b.n c1046 │ │ + b.n c1056 │ │ asrs r1, r0, #32 │ │ - b.n c104c │ │ + b.n c105c │ │ movs r4, #2 │ │ - b.n c18b4 │ │ + b.n c18c4 │ │ cmp r0, #0 │ │ - b.n c18b6 │ │ + b.n c18c6 │ │ lsls r4, r0, #16 │ │ - b.n c18c2 │ │ + b.n c18d2 │ │ adds r1, r0, r0 │ │ - b.n c18ba │ │ + b.n c18ca │ │ movs r1, r0 │ │ - b.n c1cfe │ │ + b.n c1d0e │ │ movs r2, r0 │ │ - b.n c1864 │ │ + b.n c1874 │ │ movs r0, r0 │ │ adds r3, #224 @ 0xe0 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ asrs r1, r0, #32 │ │ - b.n c1d0e │ │ + b.n c1d1e │ │ movs r4, r1 │ │ - b.n c188e │ │ + b.n c189e │ │ asrs r0, r0, #32 │ │ adds r3, #224 @ 0xe0 │ │ movs r4, r1 │ │ - b.n c1696 │ │ + b.n c16a6 │ │ movs r1, r0 │ │ asrs r0, r4, #6 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r4, r5, r6, sl, fp, lr} │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n c1b04 │ │ - beq.n c160c │ │ - b.n c1a88 │ │ + b.n c1b14 │ │ + beq.n c161c │ │ + b.n c1a98 │ │ str r4, [r0, r0] │ │ - b.n c1114 │ │ + b.n c1124 │ │ ands r4, r0 │ │ - b.n c1116 │ │ + b.n c1126 │ │ movs r5, r0 │ │ - b.n c18a2 │ │ + b.n c18b2 │ │ movs r4, r4 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n c1caa │ │ + b.n c1cba │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ asrs r0, r0, #32 │ │ - b.n c112c │ │ + b.n c113c │ │ movs r0, #1 │ │ - b.n c1d4e │ │ + b.n c1d5e │ │ movs r0, r0 │ │ - b.n c1132 │ │ + b.n c1142 │ │ asrs r0, r0, #32 │ │ - b.n c1138 │ │ + b.n c1148 │ │ movs r0, r0 │ │ - b.n c113a │ │ + b.n c114a │ │ movs r1, r0 │ │ - b.n c18be │ │ + b.n c18ce │ │ movs r0, #0 │ │ adds r3, #224 @ 0xe0 │ │ movs r1, r0 │ │ - b.n c16c6 │ │ + b.n c16d6 │ │ movs r2, r0 │ │ asrs r0, r4, #6 │ │ - beq.n c164c │ │ - b.n c1ac4 │ │ + beq.n c165c │ │ + b.n c1ad4 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r3} │ │ - b.n c1cde │ │ + b.n c1cee │ │ movs r5, r2 │ │ subs r0, r0, r0 │ │ movs r0, #0 │ │ - b.n c115e │ │ + b.n c116e │ │ str r1, [r0, #0] │ │ - b.n c1982 │ │ + b.n c1992 │ │ movs r1, r0 │ │ - b.n c1d86 │ │ + b.n c1d96 │ │ asrs r2, r0, #32 │ │ - b.n c198a │ │ - ldrh r2, [r1, #62] @ 0x3e │ │ + b.n c199a │ │ + ldrh r1, [r1, #62] @ 0x3e │ │ @ instruction: 0xebff5001 │ │ - b.n c1992 │ │ + b.n c19a2 │ │ asrs r0, r0, #32 │ │ - b.n c1182 │ │ + b.n c1192 │ │ ands r0, r0 │ │ - b.n c199a │ │ + b.n c19aa │ │ movs r1, r0 │ │ - b.n c1d9e │ │ - ldrh r5, [r0, #62] @ 0x3e │ │ + b.n c1dae │ │ + ldrh r4, [r0, #62] @ 0x3e │ │ @ instruction: 0xebff2000 │ │ - b.n c19a6 │ │ + b.n c19b6 │ │ str r2, [r0, #0] │ │ - b.n c16b2 │ │ + b.n c16c2 │ │ adds r0, #1 │ │ - b.n c16b8 │ │ + b.n c16c8 │ │ movs r0, #2 │ │ - b.n c171a │ │ + b.n c172a │ │ movs r1, r0 │ │ - b.n c1db6 │ │ + b.n c1dc6 │ │ asrs r1, r0, #32 │ │ - b.n c1824 │ │ + b.n c1834 │ │ adds r0, #3 │ │ - b.n c198a │ │ + b.n c199a │ │ movs r0, r0 │ │ adds r3, #224 @ 0xe0 │ │ movs r0, r0 │ │ - b.n c1d2c │ │ + b.n c1d3c │ │ movs r3, r0 │ │ lsls r0, r4, #6 │ │ - beq.n c16ac │ │ - b.n c1b24 │ │ + beq.n c16bc │ │ + b.n c1b34 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {ip, sp} │ │ - b.n c19d6 │ │ + b.n c19e6 │ │ lsls r0, r3, #1 │ │ - b.n c11d8 │ │ + b.n c11e8 │ │ movs r0, r0 │ │ - b.n c17bc │ │ + b.n c17cc │ │ movs r0, #90 @ 0x5a │ │ - b.n c1242 │ │ + b.n c1252 │ │ movs r0, r0 │ │ - b.n c1de6 │ │ + b.n c1df6 │ │ movs r0, r0 │ │ - b.n c1d4e │ │ + b.n c1d5e │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ - beq.n c16d0 │ │ - b.n c1b48 │ │ + beq.n c16e0 │ │ + b.n c1b58 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r2, r3, r4, r5, sp} │ │ - b.n c11f8 │ │ + b.n c1208 │ │ movs r0, r0 │ │ - b.n c11e4 │ │ + b.n c11f4 │ │ asrs r0, r0, #32 │ │ - b.n c11e4 │ │ + b.n c11f4 │ │ movs r0, #2 │ │ - b.n c17e4 │ │ + b.n c17f4 │ │ adds r0, #48 @ 0x30 │ │ - b.n c1208 │ │ + b.n c1218 │ │ movs r1, r2 │ │ stmia.w sp, {r0} │ │ - b.n c1e12 │ │ + b.n c1e22 │ │ adds r0, #3 │ │ - b.n c17f4 │ │ + b.n c1804 │ │ asrs r0, r1, #32 │ │ - b.n c11f4 │ │ + b.n c1204 │ │ asrs r2, r0, #32 │ │ - b.n c1a1e │ │ + b.n c1a2e │ │ movs r0, #126 @ 0x7e │ │ - b.n c1e22 │ │ + b.n c1e32 │ │ str r4, [r1, r0] │ │ - b.n c1200 │ │ - str r7, [r1, #108] @ 0x6c │ │ + b.n c1210 │ │ + str r6, [r1, #108] @ 0x6c │ │ @ instruction: 0xebff0000 │ │ - b.n c1e2e │ │ - beq.n c1710 │ │ - b.n c1b88 │ │ + b.n c1e3e │ │ + beq.n c1720 │ │ + b.n c1b98 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ - ldmia.w sp!, {r4, r5, r7, r8, ip, lr, pc} │ │ + ldmia.w sp!, {r6, r7, r8, ip, lr, pc} │ │ movs r1, r0 │ │ - bls.n c1730 │ │ - @ instruction: 0xfff4cedf │ │ + bge.n c163e │ │ + vrev32.16 d29, d25 │ │ vcvt.f16.u16 d20, d0, #12 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n c1c24 │ │ + b.n c1c34 │ │ movs r0, #4 │ │ - b.n c1230 │ │ + b.n c1240 │ │ adds r0, #4 │ │ - b.n c1232 │ │ + b.n c1242 │ │ movs r2, r0 │ │ - b.n c19bc │ │ + b.n c19cc │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n c1dc4 │ │ + b.n c1dd4 │ │ movs r7, r1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n c1248 │ │ + b.n c1258 │ │ movs r0, #3 │ │ - b.n c1a6a │ │ + b.n c1a7a │ │ movs r0, r0 │ │ - b.n c124e │ │ - ldr r4, [pc, #64] @ (c1770 ) │ │ + b.n c125e │ │ + ldr r4, [pc, #64] @ (c1780 ) │ │ ldmia.w sp!, {r1, r3, r6, sl, fp, ip, lr} │ │ and.w r0, r0, r1, lsl #16 │ │ - b.n c1e7a │ │ + b.n c1e8a │ │ movs r0, #3 │ │ adds r1, #160 @ 0xa0 │ │ ands r0, r0 │ │ adds r3, #224 @ 0xe0 │ │ movs r0, r0 │ │ - b.n c1dea │ │ + b.n c1dfa │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n c1270 │ │ + b.n c1280 │ │ movs r0, r0 │ │ - b.n c1272 │ │ + b.n c1282 │ │ ldrb r2, [r0, r1] │ │ add.w r0, r0, r0 │ │ - b.n c1dfa │ │ + b.n c1e0a │ │ movs r4, r0 │ │ lsls r0, r4, #6 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {} │ │ - b.n c1ea6 │ │ + b.n c1eb6 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r2} │ │ - b.n c1aae │ │ + b.n c1abe │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r2, lr, pc} │ │ - b.n c1298 │ │ + b.n c12a8 │ │ adds r0, #1 │ │ - b.n c1eba │ │ + b.n c1eca │ │ movs r0, #4 │ │ - b.n c129e │ │ + b.n c12ae │ │ movs r4, r1 │ │ - b.n c1a26 │ │ + b.n c1a36 │ │ adds r0, #0 │ │ adds r3, #224 @ 0xe0 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r3, r0 │ │ - b.n c1ace │ │ + b.n c1ade │ │ vrhadd.u16 d14, d14, d31 │ │ movs r0, r0 │ │ - b.n c1e3a │ │ + b.n c1e4a │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n c12c0 │ │ + b.n c12d0 │ │ movs r0, r0 │ │ - b.n c12c2 │ │ + b.n c12d2 │ │ ldrb r6, [r5, r0] │ │ and.w r0, r0, r0, lsl #12 │ │ - b.n c1eea │ │ + b.n c1efa │ │ movs r3, r0 │ │ - b.n c1aee │ │ + b.n c1afe │ │ vrhadd.u16 d14, d14, d31 │ │ - ldr r0, [pc, #192] @ (c1874 ) │ │ + ldr r0, [pc, #192] @ (c1884 ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n c1cd4 │ │ - beq.n c17dc │ │ - b.n c1c58 │ │ + b.n c1ce4 │ │ + beq.n c17ec │ │ + b.n c1c68 │ │ asrs r4, r1, #32 │ │ - b.n c1cdc │ │ + b.n c1cec │ │ movs r0, #8 │ │ - b.n c1ce0 │ │ + b.n c1cf0 │ │ ands r0, r0 │ │ - b.n c1b0a │ │ + b.n c1b1a │ │ movs r0, r0 │ │ - b.n c1f0e │ │ - ldr r6, [sp, #632] @ 0x278 │ │ + b.n c1f1e │ │ + ldr r6, [sp, #628] @ 0x274 │ │ @ instruction: 0xebff0000 │ │ - b.n c1e76 │ │ + b.n c1e86 │ │ movs r7, r5 │ │ subs r0, r0, r0 │ │ movs r4, r1 │ │ - b.n c1318 │ │ + b.n c1328 │ │ asrs r0, r1, #32 │ │ - b.n c131c │ │ + b.n c132c │ │ movs r0, #8 │ │ - b.n c130e │ │ + b.n c131e │ │ movs r0, r0 │ │ - b.n c18ec │ │ + b.n c18fc │ │ adds r1, r6, #0 │ │ - b.n c1dee │ │ + b.n c1dfe │ │ asrs r3, r0, #3 │ │ - b.n c1e78 │ │ + b.n c1e88 │ │ movs r0, r0 │ │ - b.n c1e9a │ │ + b.n c1eaa │ │ lsls r0, r4, #2 │ │ - b.n c1b3a │ │ + b.n c1b4a │ │ lsls r0, r2, #6 │ │ - b.n c1900 │ │ + b.n c1910 │ │ str r1, [r4, r4] │ │ - b.n c1b42 │ │ + b.n c1b52 │ │ movs r0, r2 │ │ lsrs r0, r0, #8 │ │ lsls r4, r2, #3 │ │ - b.n c1348 │ │ + b.n c1358 │ │ movs r0, r0 │ │ - b.n c192c │ │ + b.n c193c │ │ asrs r0, r2, #1 │ │ - b.n c1332 │ │ + b.n c1342 │ │ movs r1, r0 │ │ - b.n c1aba │ │ + b.n c1aca │ │ movs r6, r0 │ │ ldr r2, [sp, #0] │ │ movs r2, r0 │ │ - b.n c1b5e │ │ + b.n c1b6e │ │ str r3, [r6, r2] │ │ add.w r0, r0, r0, lsl #4 │ │ - b.n c1b66 │ │ + b.n c1b76 │ │ movs r5, r0 │ │ - b.n c1b6a │ │ + b.n c1b7a │ │ str r0, [r6, r2] │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n c1b72 │ │ + b.n c1b82 │ │ movs r4, r0 │ │ and.w r0, r0, r3 │ │ cmp r2, #0 │ │ movs r1, r0 │ │ - b.n c1b7e │ │ + b.n c1b8e │ │ asrs r2, r0, #32 │ │ - b.n c1b82 │ │ + b.n c1b92 │ │ str r2, [r5, r2] │ │ add.w r5, r0, r0, lsr #2 │ │ - b.n c1854 │ │ + b.n c1864 │ │ movs r0, r1 │ │ - b.n c1376 │ │ + b.n c1386 │ │ movs r0, r0 │ │ - b.n c1ef2 │ │ + b.n c1f02 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ lsls r4, r5, #3 │ │ - b.n c1382 │ │ + b.n c1392 │ │ movs r0, #2 │ │ - b.n c201e │ │ + b.n c202e │ │ asrs r4, r3, #1 │ │ - b.n c140a │ │ + b.n c141a │ │ movs r0, r0 │ │ - b.n c1f06 │ │ + b.n c1f16 │ │ lsls r7, r7, #17 │ │ lsls r0, r4, #14 │ │ lsls r0, r6, #4 │ │ - b.n c1972 │ │ + b.n c1982 │ │ movs r1, r0 │ │ and.w pc, r0, sp, ror #3 │ │ - b.n c1e94 │ │ + b.n c1ea4 │ │ lsls r6, r7, #1 │ │ - b.n c1efa │ │ + b.n c1f0a │ │ movs r0, r0 │ │ - b.n c1b28 │ │ + b.n c1b38 │ │ movs r5, r0 │ │ adds r1, #160 @ 0xa0 │ │ lsrs r7, r7, #1 │ │ - b.n c1f26 │ │ + b.n c1f36 │ │ lsrs r7, r7, #1 │ │ movs r3, #160 @ 0xa0 │ │ lsls r0, r4, #1 │ │ - b.n c1f2e │ │ + b.n c1f3e │ │ lsls r0, r4, #1 │ │ str r3, [sp, #640] @ 0x280 │ │ - beq.n c18a4 │ │ - b.n c1d2c │ │ + beq.n c18b4 │ │ + b.n c1d3c │ │ ldrh r0, [r6, #0] │ │ ldmia.w sp!, {r2, r4, r5, ip} │ │ - b.n c13dc │ │ + b.n c13ec │ │ ldrh r1, [r0, r4] │ │ - b.n c1fe2 │ │ + b.n c1ff2 │ │ asrs r1, r0, #32 │ │ - b.n c19c4 │ │ + b.n c19d4 │ │ asrs r2, r3, #1 │ │ - b.n c144c │ │ + b.n c145c │ │ movs r0, r0 │ │ - b.n c1f50 │ │ + b.n c1f60 │ │ @ instruction: 0xffe50aff │ │ asrs r0, r4, #32 │ │ - b.n c13f4 │ │ + b.n c1404 │ │ movs r0, #16 │ │ - b.n c1ffa │ │ + b.n c200a │ │ adds r0, #28 │ │ - b.n c13fc │ │ + b.n c140c │ │ asrs r1, r0, #32 │ │ - b.n c19e0 │ │ + b.n c19f0 │ │ movs r0, r0 │ │ - b.n c13e0 │ │ + b.n c13f0 │ │ adds r0, #3 │ │ - b.n c19e8 │ │ + b.n c19f8 │ │ movs r1, r0 │ │ - b.n c200e │ │ - str r5, [r2, #100] @ 0x64 │ │ + b.n c201e │ │ + str r4, [r2, #100] @ 0x64 │ │ @ instruction: 0xebffffdc │ │ - @ instruction: 0xeaffcfa8 │ │ + @ instruction: 0xeaffcfb8 │ │ movs r1, r0 │ │ - strd pc, pc, [pc, #-976] @ c150c @ 0x3d0 │ │ - ldr r1, [r4, #32] │ │ - vrev64.16 , q0 │ │ + ldmdb pc!, {r2, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ + ldr r3, [r4, #36] @ 0x24 │ │ + vshr.u32 , q0, #12 │ │ movs r1, r0 │ │ - ldr r4, [pc, #64] @ (c1928 ) │ │ + ldr r4, [pc, #64] @ (c1938 ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n c1e08 │ │ + b.n c1e18 │ │ movs r4, r0 │ │ - b.n c1f96 │ │ + b.n c1fa6 │ │ movs r3, r1 │ │ subs r2, #0 │ │ movs r0, r1 │ │ - b.n c1f9e │ │ + b.n c1fae │ │ movs r3, r3 │ │ ldrh r0, [r0, #16] │ │ adds r0, #2 │ │ - b.n c1624 │ │ + b.n c1634 │ │ movs r0, #2 │ │ - b.n c1626 │ │ + b.n c1636 │ │ asrs r4, r0, #32 │ │ - b.n c132c │ │ + b.n c133c │ │ movs r4, r0 │ │ - b.n c132e │ │ + b.n c133e │ │ movs r0, #3 │ │ - b.n c1956 │ │ + b.n c1966 │ │ movs r1, r0 │ │ - b.n c1956 │ │ + b.n c1966 │ │ movs r0, r0 │ │ - b.n c1c1e │ │ + b.n c1c2e │ │ lsrs r0, r2, #28 │ │ - b.n c1bfc │ │ + b.n c1c0c │ │ lsls r0, r4, #10 │ │ - b.n c1c62 │ │ + b.n c1c72 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {} │ │ - b.n c1fce │ │ + b.n c1fde │ │ movs r3, r2 │ │ lsrs r0, r0, #8 │ │ ands r2, r0 │ │ - b.n c1a34 │ │ + b.n c1a44 │ │ adds r0, #162 @ 0xa2 │ │ - b.n c18d8 │ │ + b.n c18e8 │ │ stmia r0!, {r1, r5, r7} │ │ - b.n c18da │ │ - b.n c193c │ │ - b.n c14de │ │ + b.n c18ea │ │ + b.n c194c │ │ + b.n c14ee │ │ movs r2, r0 │ │ - b.n c1a42 │ │ + b.n c1a52 │ │ asrs r0, r0, #32 │ │ - b.n c14e8 │ │ + b.n c14f8 │ │ ands r1, r0 │ │ - b.n c13f2 │ │ + b.n c1402 │ │ movs r1, r0 │ │ - b.n c13ee │ │ + b.n c13fe │ │ asrs r3, r0, #16 │ │ - b.n c1c54 │ │ + b.n c1c64 │ │ movs r4, #12 │ │ - b.n c1c72 │ │ + b.n c1c82 │ │ adds r4, r0, r0 │ │ - b.n c1c5c │ │ + b.n c1c6c │ │ lsrs r0, r0, #32 │ │ - b.n c1c62 │ │ + b.n c1c72 │ │ movs r1, r0 │ │ - b.n c19e2 │ │ + b.n c19f2 │ │ lsrs r0, r2, #28 │ │ - b.n c1c44 │ │ + b.n c1c54 │ │ lsls r0, r4, #10 │ │ - b.n c1caa │ │ + b.n c1cba │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r0, r1, r3, r4, r5, r7, r8, r9, fp, ip, lr} │ │ add.w pc, r0, r0, lsr #32 │ │ - b.n c1c54 │ │ + b.n c1c64 │ │ lsls r0, r4, #10 │ │ - b.n c1cba │ │ + b.n c1cca │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r0} │ │ - b.n c20c2 │ │ + b.n c20d2 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r4, sl, fp, lr} │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n c1ea8 │ │ - beq.n c1a60 │ │ - b.n c1e2c │ │ + b.n c1eb8 │ │ + beq.n c1a70 │ │ + b.n c1e3c │ │ ands r1, r0 │ │ - b.n c1cd6 │ │ + b.n c1ce6 │ │ asrs r5, r1, #32 │ │ - b.n c1cda │ │ + b.n c1cea │ │ ldrh r0, [r7, r7] │ │ add.w r0, r0, r0 │ │ - b.n c2042 │ │ + b.n c2052 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ ldrh r1, [r5, r6] │ │ add.w r0, r0, r0 │ │ - b.n c14ce │ │ - beq.n c19c0 │ │ - b.n c1e48 │ │ + b.n c14de │ │ + beq.n c19d0 │ │ + b.n c1e58 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r2, r4, r5, ip} │ │ - b.n c14f4 │ │ + b.n c1504 │ │ movs r0, r6 │ │ - b.n c14f8 │ │ + b.n c1508 │ │ lsls r0, r6, #3 │ │ - b.n c1d4a │ │ + b.n c1d5a │ │ movs r0, r0 │ │ - b.n c2106 │ │ - beq.n c19d8 │ │ - b.n c1e60 │ │ + b.n c2116 │ │ + beq.n c19e8 │ │ + b.n c1e70 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, fp, lr} │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n c1ef0 │ │ + b.n c1f00 │ │ str r0, [r0, #0] │ │ - b.n c1d1a │ │ - b.n c19dc │ │ - b.n c211e │ │ + b.n c1d2a │ │ + b.n c19ec │ │ + b.n c212e │ │ str r0, [sp, #32] │ │ - b.n c154e │ │ + b.n c155e │ │ stmia r0!, {} │ │ - b.n c2126 │ │ + b.n c2136 │ │ movs r0, r7 │ │ @ instruction: 0xe9961004 │ │ - b.n c1a40 │ │ + b.n c1a50 │ │ strb r5, [r0, #0] │ │ - b.n c1a38 │ │ + b.n c1a48 │ │ strh r3, [r0, #0] │ │ - b.n c1d08 │ │ + b.n c1d18 │ │ asrs r7, r0, #32 │ │ - b.n c1d1c │ │ + b.n c1d2c │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ strb r0, [r0, #0] │ │ - b.n c15a2 │ │ + b.n c15b2 │ │ movs r0, r0 │ │ - b.n c20b6 │ │ + b.n c20c6 │ │ asrs r0, r1, #32 │ │ - b.n c1d4a │ │ + b.n c1d5a │ │ asrs r1, r0, #32 │ │ asrs r0, r0, #12 │ │ stmia r0!, {r0, r1, r2, r5, r7} │ │ - b.n c1a60 │ │ + b.n c1a70 │ │ strb r1, [r0, #0] │ │ - b.n c2156 │ │ + b.n c2166 │ │ strb r4, [r1, #0] │ │ - b.n c1da8 │ │ + b.n c1db8 │ │ stmia r0!, {r0, r1, r2} │ │ - b.n c1a20 │ │ + b.n c1a30 │ │ str r0, [r2, #28] │ │ - b.n c1dae │ │ + b.n c1dbe │ │ asrs r7, r0, #32 │ │ - b.n c1a70 │ │ + b.n c1a80 │ │ movs r0, #6 │ │ - b.n c1a72 │ │ + b.n c1a82 │ │ asrs r1, r0, #32 │ │ - b.n c1d52 │ │ + b.n c1d62 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ asrs r0, r0, #32 │ │ - b.n c15d6 │ │ + b.n c15e6 │ │ movs r0, #5 │ │ - b.n c1d62 │ │ + b.n c1d72 │ │ movs r0, #1 │ │ asrs r0, r0, #12 │ │ str r1, [r4, r2] │ │ - b.n c1d82 │ │ + b.n c1d92 │ │ asrs r1, r4, #4 │ │ - b.n c1a90 │ │ + b.n c1aa0 │ │ str r1, [r0, r0] │ │ - b.n c218a │ │ + b.n c219a │ │ asrs r1, r0, #32 │ │ - b.n c1dd8 │ │ + b.n c1de8 │ │ asrs r1, r0, #32 │ │ - b.n c1a56 │ │ - b.n c1a56 │ │ - b.n c1e78 │ │ - b.n c1a5c │ │ + b.n c1a66 │ │ + b.n c1a66 │ │ + b.n c1e88 │ │ + b.n c1a6c │ │ asrs r0, r0, #12 │ │ asrs r1, r1, #32 │ │ - b.n c1aaa │ │ + b.n c1aba │ │ movs r0, #3 │ │ - b.n c1ab0 │ │ + b.n c1ac0 │ │ asrs r2, r0, #32 │ │ - b.n c1d88 │ │ + b.n c1d98 │ │ movs r0, #0 │ │ - b.n c21aa │ │ + b.n c21ba │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n c1612 │ │ + b.n c1622 │ │ movs r0, r0 │ │ - b.n c2126 │ │ + b.n c2136 │ │ asrs r1, r0, #32 │ │ - b.n c21ba │ │ + b.n c21ca │ │ strh r1, [r0, #0] │ │ asrs r0, r0, #12 │ │ lsls r0, r4, #4 │ │ - b.n c1ac2 │ │ + b.n c1ad2 │ │ movs r0, r0 │ │ - b.n c1e08 │ │ + b.n c1e18 │ │ movs r0, r0 │ │ - b.n c1a9a │ │ + b.n c1aaa │ │ movs r0, #1 │ │ - b.n c1eae │ │ + b.n c1ebe │ │ movs r0, #4 │ │ asrs r0, r0, #12 │ │ movs r4, r1 │ │ - b.n c1db2 │ │ + b.n c1dc2 │ │ movs r2, r0 │ │ - b.n c1d9a │ │ + b.n c1daa │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r4, r5, r6, r7, fp, lr} │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n c1fc0 │ │ - beq.n c1ac8 │ │ - b.n c1f44 │ │ + b.n c1fd0 │ │ + beq.n c1ad8 │ │ + b.n c1f54 │ │ str r0, [r0, #0] │ │ - b.n c1dee │ │ + b.n c1dfe │ │ lsls r0, r3, #1 │ │ - b.n c15d2 │ │ - bl 51d5b2 │ │ + b.n c15e2 │ │ + bl 51d5c2 │ │ movs r1, r0 │ │ - b.n c1d5a │ │ + b.n c1d6a │ │ movs r7, r2 │ │ ldr r2, [sp, #0] │ │ strb r4, [r3, #1] │ │ - b.n c166e │ │ + b.n c167e │ │ ands r1, r0 │ │ - b.n c1e06 │ │ + b.n c1e16 │ │ movs r0, r2 │ │ - b.n c15f6 │ │ + b.n c1606 │ │ ldrsb r1, [r2, r4] │ │ - b.n c1b52 │ │ + b.n c1b62 │ │ lsls r1, r2, #28 │ │ - b.n c1bd2 │ │ + b.n c1be2 │ │ asrs r5, r0, #32 │ │ - b.n c1e16 │ │ + b.n c1e26 │ │ ldrb r5, [r2, r3] │ │ add.w r0, r0, r0 │ │ - b.n c217e │ │ + b.n c218e │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ ldrh r2, [r3, r5] │ │ add.w r0, r0, r0 │ │ - b.n c160a │ │ + b.n c161a │ │ movs r0, r0 │ │ - b.n c218e │ │ + b.n c219e │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ movs r6, r0 │ │ - b.n c1e36 │ │ + b.n c1e46 │ │ asrs r4, r0, #32 │ │ - b.n c1e3a │ │ + b.n c1e4a │ │ movs r0, #0 │ │ - b.n c223e │ │ - beq.n c1b20 │ │ - b.n c1f98 │ │ - ldr r0, [pc, #960] @ (c1ec4 ) │ │ - ldmia.w sp!, {r0, r1, r2, r4, r6, r9, sl, sp, lr} │ │ + b.n c224e │ │ + beq.n c1b30 │ │ + b.n c1fa8 │ │ + ldr r0, [pc, #960] @ (c1ed4 ) │ │ + ldmia.w sp!, {r1, r2, r4, r6, r9, sl, sp, lr} │ │ @ instruction: 0xeaff1040 │ │ - b.n c164c │ │ + b.n c165c │ │ asrs r1, r0, #32 │ │ - b.n c1c30 │ │ + b.n c1c40 │ │ asrs r2, r3, #1 │ │ - b.n c16b8 │ │ + b.n c16c8 │ │ movs r2, r0 │ │ - b.n c21bc │ │ + b.n c21cc │ │ movs r1, r0 │ │ cmp r2, #0 │ │ - beq.n c1b40 │ │ - b.n c1fb8 │ │ + beq.n c1b50 │ │ + b.n c1fc8 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r3, r5, ip} │ │ - b.n c1668 │ │ + b.n c1678 │ │ movs r7, #20 │ │ - b.n c1e6e │ │ + b.n c1e7e │ │ adds r0, #36 @ 0x24 │ │ - b.n c1670 │ │ + b.n c1680 │ │ asrs r1, r0, #32 │ │ - b.n c1c54 │ │ + b.n c1c64 │ │ movs r4, r4 │ │ stmia.w sp, {r0, r1, ip, sp} │ │ - b.n c1c5c │ │ + b.n c1c6c │ │ movs r0, r1 │ │ - b.n c165c │ │ + b.n c166c │ │ movs r2, r0 │ │ - b.n c2286 │ │ + b.n c2296 │ │ cmp r7, #75 @ 0x4b │ │ - b.n c228a │ │ - str r6, [r6, #88] @ 0x58 │ │ + b.n c229a │ │ + str r5, [r6, #88] @ 0x58 │ │ @ instruction: 0xebfffff2 │ │ - @ instruction: 0xeaffcd3c │ │ + @ instruction: 0xeaffcd4c │ │ movs r1, r0 │ │ - ldrh r1, [r3, #10] │ │ - vsli.32 q12, , #20 │ │ + ldrh r0, [r0, #12] │ │ + vpadal.s16 d24, d26 │ │ @ instruction: 0xfff44ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n c2080 │ │ - beq.n c1c00 │ │ - b.n c2004 │ │ + b.n c2090 │ │ + beq.n c1c10 │ │ + b.n c2014 │ │ ands r0, r1 │ │ - b.n c16a4 │ │ + b.n c16b4 │ │ str r0, [r0, r0] │ │ - b.n c22b2 │ │ + b.n c22c2 │ │ stmia r0!, {r2, r3} │ │ - b.n c16ac │ │ - add r0, pc, #0 @ (adr r0, c1b78 ) │ │ - b.n c22ba │ │ + b.n c16bc │ │ + add r0, pc, #0 @ (adr r0, c1b88 ) │ │ + b.n c22ca │ │ strh r0, [r3, #22] │ │ - b.n c1f06 │ │ + b.n c1f16 │ │ str r0, [r3, #92] @ 0x5c │ │ - b.n c1f0a │ │ + b.n c1f1a │ │ str r0, [r6, #60] @ 0x3c │ │ - b.n c1e1c │ │ + b.n c1e2c │ │ str r0, [r4, #0] │ │ - b.n c16c2 │ │ + b.n c16d2 │ │ asrs r0, r1, #32 │ │ - b.n c16b6 │ │ + b.n c16c6 │ │ strb r0, [r2, #0] │ │ - b.n c16b2 │ │ + b.n c16c2 │ │ str r0, [r4, r0] │ │ - b.n c15ac │ │ + b.n c15bc │ │ movs r0, r0 │ │ - b.n c2248 │ │ + b.n c2258 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r6, r0 │ │ - b.n c1e44 │ │ + b.n c1e54 │ │ str r4, [r3, r1] │ │ adds r5, #208 @ 0xd0 │ │ - add r5, pc, #68 @ (adr r5, c1bec ) │ │ + add r5, pc, #68 @ (adr r5, c1bfc ) │ │ adds r0, #135 @ 0x87 │ │ - b.n c1c1c │ │ - b.n c16d6 │ │ + b.n c1c2c │ │ + b.n c16e6 │ │ movs r0, r0 │ │ - b.n c2260 │ │ + b.n c2270 │ │ asrs r4, r6, #32 │ │ - b.n c16d0 │ │ + b.n c16e0 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ movs r6, r0 │ │ - b.n c1e7a │ │ + b.n c1e8a │ │ str r4, [r3, r1] │ │ adds r5, #208 @ 0xd0 │ │ strb r6, [r3, #20] │ │ adds r0, #135 @ 0x87 │ │ strb r0, [r4, #0] │ │ adds r5, #11 │ │ asrs r4, r6, #32 │ │ - b.n c1708 │ │ + b.n c1718 │ │ strb r0, [r0, #0] │ │ - b.n c2312 │ │ + b.n c2322 │ │ ands r0, r0 │ │ - b.n c170e │ │ + b.n c171e │ │ ands r0, r6 │ │ - b.n c16f4 │ │ + b.n c1704 │ │ movs r6, r0 │ │ - b.n c1e80 │ │ + b.n c1e90 │ │ str r1, [r0, r0] │ │ - b.n c20e4 │ │ + b.n c20f4 │ │ asrs r4, r0, #32 │ │ - b.n c171e │ │ + b.n c172e │ │ asrs r4, r5, #32 │ │ - b.n c1704 │ │ + b.n c1714 │ │ subs r5, r2, #4 │ │ - b.n c1ecc │ │ + b.n c1edc │ │ strb r1, [r0, #0] │ │ adds r3, #0 │ │ asrs r1, r4, #10 │ │ - b.n c1f36 │ │ + b.n c1f46 │ │ asrs r7, r0, #32 │ │ - b.n c1f1c │ │ + b.n c1f2c │ │ asrs r4, r4, #32 │ │ - b.n c1614 │ │ + b.n c1624 │ │ lsls r3, r0, #3 │ │ lsrs r0, r0, #8 │ │ mvns r0, r2 │ │ - b.n c1e9c │ │ + b.n c1eac │ │ movs r1, r0 │ │ - b.n c2306 │ │ + b.n c2316 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r6, r0 │ │ - b.n c1ece │ │ + b.n c1ede │ │ lsls r6, r2, #2 │ │ cmp r2, #0 │ │ str r3, [r0, #16] │ │ - b.n c221c │ │ + b.n c222c │ │ asrs r0, r1, #32 │ │ - b.n c1cc2 │ │ + b.n c1cd2 │ │ ldr r4, [r1, #116] @ 0x74 │ │ - b.n c22be │ │ + b.n c22ce │ │ asrs r1, r1, #32 │ │ - b.n c1dcc │ │ + b.n c1ddc │ │ movs r7, r7 │ │ subs r2, #0 │ │ asrs r1, r1, #32 │ │ - b.n c1f5e │ │ + b.n c1f6e │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n c22ea │ │ + b.n c22fa │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ asrs r0, r6, #32 │ │ - b.n c1778 │ │ + b.n c1788 │ │ ldmia r5, {r0, r2, r3, r4, r5, r7} │ │ - b.n c2254 │ │ + b.n c2264 │ │ strb r4, [r5, #0] │ │ - b.n c1780 │ │ + b.n c1790 │ │ ldmia r1!, {r0, r2, r5, r6} │ │ - b.n c22d4 │ │ + b.n c22e4 │ │ asrs r6, r0, #32 │ │ - b.n c1c90 │ │ + b.n c1ca0 │ │ strb r4, [r1, #0] │ │ - b.n c1ca0 │ │ + b.n c1cb0 │ │ asrs r7, r0, #32 │ │ - b.n c1f78 │ │ + b.n c1f88 │ │ movs r3, r6 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #32 │ │ - b.n c1d02 │ │ + b.n c1d12 │ │ asrs r5, r0, #32 │ │ - b.n c1e08 │ │ + b.n c1e18 │ │ lsls r2, r3, #1 │ │ subs r2, #0 │ │ asrs r5, r0, #32 │ │ - b.n c1f92 │ │ + b.n c1fa2 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ asrs r0, r4, #32 │ │ - b.n c16a8 │ │ + b.n c16b8 │ │ movs r0, r0 │ │ - b.n c2318 │ │ + b.n c2328 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ asrs r0, r6, #32 │ │ - b.n c17b8 │ │ + b.n c17c8 │ │ ldrb r5, [r7, #22] │ │ - b.n c2294 │ │ + b.n c22a4 │ │ ldrb r5, [r4, #5] │ │ - b.n c2310 │ │ + b.n c2320 │ │ asrs r6, r0, #32 │ │ - b.n c1ccc │ │ + b.n c1cdc │ │ str r4, [r5, #0] │ │ - b.n c17c8 │ │ + b.n c17d8 │ │ strb r7, [r0, #0] │ │ - b.n c1cde │ │ + b.n c1cee │ │ asrs r7, r0, #32 │ │ - b.n c1fb8 │ │ + b.n c1fc8 │ │ lsls r5, r1, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n c2352 │ │ + b.n c2362 │ │ asrs r1, r1, #32 │ │ asrs r0, r3, #6 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r2, #32 │ │ - b.n c17ca │ │ + b.n c17da │ │ movs r0, #24 │ │ - b.n c17ce │ │ + b.n c17de │ │ asrs r2, r1, #32 │ │ - b.n c1d34 │ │ + b.n c1d44 │ │ movs r2, r0 │ │ - b.n c1f58 │ │ + b.n c1f68 │ │ movs r5, r0 │ │ cmp r2, #0 │ │ movs r0, #0 │ │ - b.n c17f2 │ │ + b.n c1802 │ │ str r4, [r0, #0] │ │ - b.n c17f6 │ │ + b.n c1806 │ │ adds r0, #8 │ │ - b.n c1d0a │ │ + b.n c1d1a │ │ asrs r1, r1, #32 │ │ - b.n c1d16 │ │ + b.n c1d26 │ │ asrs r1, r0, #32 │ │ - b.n c1ff4 │ │ + b.n c2004 │ │ lsls r6, r6, #2 │ │ subs r0, r0, r0 │ │ adds r0, #32 │ │ - b.n c170c │ │ + b.n c171c │ │ movs r0, r0 │ │ - b.n c2380 │ │ + b.n c2390 │ │ asrs r5, r0, #32 │ │ asrs r4, r2, #6 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r2, #32 │ │ - b.n c1806 │ │ + b.n c1816 │ │ movs r0, #24 │ │ - b.n c180a │ │ + b.n c181a │ │ asrs r3, r0, #32 │ │ - b.n c1d70 │ │ + b.n c1d80 │ │ movs r2, r0 │ │ - b.n c1f94 │ │ + b.n c1fa4 │ │ movs r5, r0 │ │ cmp r2, #0 │ │ strb r4, [r0, #0] │ │ - b.n c1820 │ │ + b.n c1830 │ │ movs r0, #0 │ │ - b.n c1824 │ │ + b.n c1834 │ │ asrs r5, r0, #32 │ │ - b.n c1d50 │ │ + b.n c1d60 │ │ adds r0, #4 │ │ - b.n c1d4a │ │ + b.n c1d5a │ │ asrs r1, r0, #32 │ │ - b.n c2030 │ │ + b.n c2040 │ │ lsls r6, r1, #3 │ │ subs r0, r0, r0 │ │ movs r0, #36 @ 0x24 │ │ - b.n c1748 │ │ + b.n c1758 │ │ asrs r1, r0, #32 │ │ - b.n c2456 │ │ + b.n c2466 │ │ movs r0, r0 │ │ - b.n c23be │ │ + b.n c23ce │ │ lsls r2, r2, #3 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n c2062 │ │ - beq.n c1d5c │ │ - b.n c21bc │ │ + b.n c2072 │ │ + beq.n c1d6c │ │ + b.n c21cc │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {ip} │ │ - b.n c246e │ │ + b.n c247e │ │ asrs r4, r4, #32 │ │ - b.n c1748 │ │ + b.n c1758 │ │ asrs r0, r2, #32 │ │ - b.n c186c │ │ + b.n c187c │ │ movs r0, r0 │ │ - b.n c23dc │ │ + b.n c23ec │ │ @ instruction: 0xffc60aff │ │ asrs r0, r1, #16 │ │ - b.n c1880 │ │ + b.n c1890 │ │ asrs r1, r0, #32 │ │ - b.n c1e64 │ │ + b.n c1e74 │ │ asrs r2, r3, #1 │ │ - b.n c18ec │ │ + b.n c18fc │ │ movs r2, r0 │ │ - b.n c23f0 │ │ + b.n c2400 │ │ @ instruction: 0xffc13aff │ │ strb r0, [r7, #15] │ │ - b.n c1894 │ │ + b.n c18a4 │ │ strh r0, [r7, r7] │ │ - b.n c1898 │ │ + b.n c18a8 │ │ cmp sp, fp │ │ - b.n c20fe │ │ + b.n c210e │ │ strb r7, [r0, #0] │ │ - b.n c1e80 │ │ + b.n c1e90 │ │ asrs r0, r6, #15 │ │ - b.n c18a4 │ │ + b.n c18b4 │ │ str r5, [r0, r0] │ │ - b.n c1e88 │ │ + b.n c1e98 │ │ stmia r3!, {r2, r3, r5, r6, r7} │ │ - b.n c18ac │ │ + b.n c18bc │ │ movs r0, r0 │ │ - b.n c241a │ │ - b.n c1dc4 │ │ - b.n c1890 │ │ + b.n c242a │ │ + b.n c1dd4 │ │ + b.n c18a0 │ │ str r7, [r0, r0] │ │ sbcs r0, r4 │ │ stmia r0!, {r2, r3} │ │ - b.n c1e9c │ │ - b.n c2538 │ │ - b.n c18c0 │ │ + b.n c1eac │ │ + b.n c2548 │ │ + b.n c18d0 │ │ ands r0, r2 │ │ - b.n c22a0 │ │ + b.n c22b0 │ │ asrs r1, r0, #32 │ │ - b.n c1ea8 │ │ + b.n c1eb8 │ │ movs r4, r5 │ │ stmia.w r4, {lr} │ │ - b.n c20d2 │ │ + b.n c20e2 │ │ str r2, [r0, r0] │ │ - b.n c20d6 │ │ + b.n c20e6 │ │ strb r3, [r0, #0] │ │ - b.n c20da │ │ + b.n c20ea │ │ movs r2, r0 │ │ - b.n c24de │ │ + b.n c24ee │ │ movs r0, #42 @ 0x2a │ │ - b.n c24e2 │ │ + b.n c24f2 │ │ adds r0, #12 │ │ - b.n c20e6 │ │ - b.n c1dc4 │ │ - b.n c1ec8 │ │ + b.n c20f6 │ │ + b.n c1dd4 │ │ + b.n c1ed8 │ │ strh r0, [r1, #0] │ │ - b.n c18c8 │ │ + b.n c18d8 │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n c18cc │ │ - b.n c1db4 │ │ - b.n c18d0 │ │ - str r3, [r3, #80] @ 0x50 │ │ + b.n c18dc │ │ + b.n c1dc4 │ │ + b.n c18e0 │ │ + str r2, [r3, #80] @ 0x50 │ │ @ instruction: 0xebffe028 │ │ - b.n c18f8 │ │ + b.n c1908 │ │ movs r0, #5 │ │ - b.n c2102 │ │ + b.n c2112 │ │ movs r4, r0 │ │ - b.n c2106 │ │ + b.n c2116 │ │ mvns r0, r2 │ │ - b.n c2060 │ │ + b.n c2070 │ │ adds r0, #7 │ │ - b.n c210e │ │ + b.n c211e │ │ @ instruction: 0xffa1eaff │ │ asrs r0, r0, #32 │ │ - b.n c2516 │ │ + b.n c2526 │ │ asrs r4, r4, #32 │ │ - b.n c17f0 │ │ + b.n c1800 │ │ asrs r0, r2, #32 │ │ - b.n c1914 │ │ + b.n c1924 │ │ movs r0, r0 │ │ - b.n c2484 │ │ + b.n c2494 │ │ @ instruction: 0xffac0aff │ │ asrs r0, r7, #13 │ │ - b.n c1928 │ │ + b.n c1938 │ │ asrs r1, r0, #32 │ │ - b.n c1f0c │ │ + b.n c1f1c │ │ asrs r2, r3, #1 │ │ - b.n c1994 │ │ + b.n c19a4 │ │ movs r2, r0 │ │ - b.n c2498 │ │ + b.n c24a8 │ │ @ instruction: 0xffa73aff │ │ muls r0, r5 │ │ - b.n c193c │ │ + b.n c194c │ │ strb r6, [r1, #0] │ │ - b.n c2142 │ │ + b.n c2152 │ │ str r4, [r4, #52] @ 0x34 │ │ - b.n c1944 │ │ + b.n c1954 │ │ strb r5, [r3, r7] │ │ - b.n c21aa │ │ + b.n c21ba │ │ ands r4, r0 │ │ - b.n c1f2c │ │ + b.n c1f3c │ │ str r6, [r0, #0] │ │ - b.n c1f30 │ │ + b.n c1f40 │ │ asrs r0, r3, #13 │ │ - b.n c1954 │ │ + b.n c1964 │ │ movs r0, r0 │ │ - b.n c24c4 │ │ + b.n c24d4 │ │ stmia r3!, {r2, r4, r6} │ │ - b.n c195c │ │ - b.n c24c8 │ │ - b.n c1960 │ │ + b.n c196c │ │ + b.n c24d8 │ │ + b.n c1970 │ │ str r4, [r0, #0] │ │ sbcs r0, r4 │ │ mvns r0, r2 │ │ - b.n c20c0 │ │ + b.n c20d0 │ │ stmia r0!, {r2, r3} │ │ - b.n c1f4c │ │ + b.n c1f5c │ │ ands r0, r1 │ │ - b.n c194c │ │ + b.n c195c │ │ asrs r1, r0, #32 │ │ - b.n c1f54 │ │ + b.n c1f64 │ │ mvns r0, r2 │ │ - b.n c20d0 │ │ - b.n c1e58 │ │ - b.n c1f5c │ │ - b.n c1e40 │ │ - b.n c195c │ │ + b.n c20e0 │ │ + b.n c1e68 │ │ + b.n c1f6c │ │ + b.n c1e50 │ │ + b.n c196c │ │ str r4, [r1, r0] │ │ - b.n c1960 │ │ + b.n c1970 │ │ ands r0, r2 │ │ - b.n c2364 │ │ + b.n c2374 │ │ lsls r4, r1, #1 │ │ stmia.w r4, {lr} │ │ - b.n c2192 │ │ + b.n c21a2 │ │ movs r2, r0 │ │ - b.n c2596 │ │ + b.n c25a6 │ │ movs r0, #50 @ 0x32 │ │ - b.n c259a │ │ + b.n c25aa │ │ adds r0, #12 │ │ - b.n c219e │ │ - str r1, [r6, #76] @ 0x4c │ │ + b.n c21ae │ │ + str r0, [r6, #76] @ 0x4c │ │ @ instruction: 0xebff0004 │ │ - b.n c21a6 │ │ + b.n c21b6 │ │ mvns r0, r2 │ │ - b.n c2100 │ │ - b.n c1e7a │ │ - b.n c21ae │ │ + b.n c2110 │ │ + b.n c1e8a │ │ + b.n c21be │ │ @ instruction: 0xff89eaff │ │ asrs r0, r0, #32 │ │ - b.n c25b6 │ │ + b.n c25c6 │ │ asrs r4, r4, #32 │ │ - b.n c1890 │ │ + b.n c18a0 │ │ asrs r0, r2, #32 │ │ - b.n c19b4 │ │ + b.n c19c4 │ │ movs r0, r0 │ │ - b.n c2524 │ │ + b.n c2534 │ │ vpmin.u32 q8, , │ │ asrs r0, r5, #10 │ │ - b.n c19c8 │ │ + b.n c19d8 │ │ asrs r1, r0, #32 │ │ - b.n c1fac │ │ + b.n c1fbc │ │ asrs r2, r3, #1 │ │ - b.n c1a34 │ │ + b.n c1a44 │ │ movs r2, r0 │ │ - b.n c2538 │ │ + b.n c2548 │ │ vpmin.u16 , q15, │ │ strb r0, [r3, #10] │ │ - b.n c19dc │ │ + b.n c19ec │ │ str r0, [r3, #40] @ 0x28 │ │ - b.n c19e0 │ │ + b.n c19f0 │ │ strb r5, [r3, r7] │ │ - b.n c2246 │ │ + b.n c2256 │ │ strb r7, [r0, #0] │ │ - b.n c1fc8 │ │ + b.n c1fd8 │ │ asrs r0, r2, #10 │ │ - b.n c19ec │ │ + b.n c19fc │ │ str r6, [r0, #0] │ │ - b.n c1fd0 │ │ + b.n c1fe0 │ │ stmia r2!, {r2, r3, r7} │ │ - b.n c19f4 │ │ + b.n c1a04 │ │ movs r0, r0 │ │ - b.n c2564 │ │ + b.n c2574 │ │ cmp r0, r1 │ │ - b.n c19fc │ │ + b.n c1a0c │ │ str r7, [r0, #0] │ │ sbcs r0, r4 │ │ stmia r0!, {r2, r3} │ │ - b.n c1fe4 │ │ + b.n c1ff4 │ │ asrs r1, r0, #32 │ │ - b.n c1fe8 │ │ + b.n c1ff8 │ │ ands r4, r0 │ │ - b.n c1fec │ │ + b.n c1ffc │ │ str r2, [r0, r0] │ │ - b.n c2212 │ │ + b.n c2222 │ │ ands r0, r2 │ │ stmia.w sp, {r3, lr} │ │ - b.n c23f4 │ │ + b.n c2404 │ │ strb r6, [r1, #0] │ │ - b.n c221e │ │ + b.n c222e │ │ lsls r4, r1, #1 │ │ stmia.w r4, {lr} │ │ - b.n c2226 │ │ + b.n c2236 │ │ str r3, [r0, #0] │ │ - b.n c222a │ │ + b.n c223a │ │ movs r2, r0 │ │ - b.n c262e │ │ + b.n c263e │ │ movs r0, #34 @ 0x22 │ │ - b.n c2632 │ │ + b.n c2642 │ │ adds r0, #12 │ │ - b.n c2236 │ │ - str r3, [r1, #76] @ 0x4c │ │ + b.n c2246 │ │ + str r2, [r1, #76] @ 0x4c │ │ @ instruction: 0xebff2005 │ │ - b.n c223e │ │ + b.n c224e │ │ movs r4, r0 │ │ - b.n c2242 │ │ + b.n c2252 │ │ mvns r0, r2 │ │ - b.n c219c │ │ - b.n c1f16 │ │ - b.n c224a │ │ + b.n c21ac │ │ + b.n c1f26 │ │ + b.n c225a │ │ adds r0, #6 │ │ - b.n c224e │ │ + b.n c225e │ │ vpmin.u8 q15, q8, │ │ asrs r0, r2, #32 │ │ - b.n c1a4c │ │ + b.n c1a5c │ │ movs r0, r0 │ │ - b.n c25bc │ │ + b.n c25cc │ │ vpmin.u q0, q12, │ │ asrs r0, r7, #7 │ │ - b.n c1a60 │ │ + b.n c1a70 │ │ asrs r1, r0, #32 │ │ - b.n c2044 │ │ + b.n c2054 │ │ asrs r2, r3, #1 │ │ - b.n c1acc │ │ + b.n c1adc │ │ movs r2, r0 │ │ - b.n c25d0 │ │ + b.n c25e0 │ │ vpmin.u , , │ │ - b.n c1f84 │ │ - b.n c1a50 │ │ - b.n c2300 │ │ - b.n c1a78 │ │ + b.n c1f94 │ │ + b.n c1a60 │ │ + b.n c2310 │ │ + b.n c1a88 │ │ str r4, [r4, r7] │ │ - b.n c1a7c │ │ + b.n c1a8c │ │ cmp sp, fp │ │ - b.n c22e2 │ │ - b.n c1f60 │ │ - b.n c2064 │ │ + b.n c22f2 │ │ + b.n c1f70 │ │ + b.n c2074 │ │ asrs r4, r3, #7 │ │ - b.n c1a88 │ │ + b.n c1a98 │ │ str r5, [r0, r0] │ │ - b.n c206c │ │ + b.n c207c │ │ stmia r1!, {r3, r4, r6, r7} │ │ - b.n c1a90 │ │ + b.n c1aa0 │ │ movs r0, r0 │ │ - b.n c25fe │ │ + b.n c260e │ │ strb r4, [r2, #7] │ │ - b.n c1a98 │ │ + b.n c1aa8 │ │ str r6, [r1, r0] │ │ sbcs r0, r4 │ │ stmia r0!, {r2, r3} │ │ - b.n c2080 │ │ - b.n c1f74 │ │ - b.n c2480 │ │ + b.n c2090 │ │ + b.n c1f84 │ │ + b.n c2490 │ │ strb r7, [r0, #0] │ │ - b.n c2088 │ │ + b.n c2098 │ │ strb r0, [r0, #0] │ │ - b.n c1a88 │ │ + b.n c1a98 │ │ strb r4, [r6, #0] │ │ - b.n c1aac │ │ + b.n c1abc │ │ asrs r1, r0, #32 │ │ - b.n c2094 │ │ + b.n c20a4 │ │ strb r4, [r0, #0] │ │ - b.n c1a94 │ │ + b.n c1aa4 │ │ ands r0, r0 │ │ - b.n c22be │ │ + b.n c22ce │ │ movs r4, r5 │ │ stmia.w lr, {r1, ip, lr} │ │ - b.n c22c6 │ │ + b.n c22d6 │ │ strb r3, [r0, #0] │ │ - b.n c22ca │ │ + b.n c22da │ │ movs r2, r0 │ │ - b.n c26ce │ │ + b.n c26de │ │ movs r0, #27 │ │ - b.n c26d2 │ │ + b.n c26e2 │ │ adds r0, #12 │ │ - b.n c22d6 │ │ - str r3, [r4, #72] @ 0x48 │ │ + b.n c22e6 │ │ + str r2, [r4, #72] @ 0x48 │ │ @ instruction: 0xebffe028 │ │ - b.n c1ad8 │ │ + b.n c1ae8 │ │ movs r0, #5 │ │ - b.n c22e2 │ │ + b.n c22f2 │ │ adds r0, #7 │ │ - b.n c22e6 │ │ + b.n c22f6 │ │ movs r4, r0 │ │ - b.n c22ea │ │ + b.n c22fa │ │ vpmin.u16 q7, q10, │ │ asrs r0, r0, #32 │ │ - b.n c26f2 │ │ + b.n c2702 │ │ asrs r4, r4, #32 │ │ - b.n c19cc │ │ + b.n c19dc │ │ asrs r0, r2, #32 │ │ - b.n c1af0 │ │ + b.n c1b00 │ │ movs r0, r0 │ │ - b.n c2660 │ │ + b.n c2670 │ │ vpmin.u8 q8, , │ │ asrs r4, r6, #6 │ │ - b.n c1b04 │ │ + b.n c1b14 │ │ asrs r1, r0, #32 │ │ - b.n c20e8 │ │ + b.n c20f8 │ │ asrs r2, r3, #1 │ │ - b.n c1b70 │ │ + b.n c1b80 │ │ movs r2, r0 │ │ - b.n c2674 │ │ + b.n c2684 │ │ vpmin.u , q15, │ │ - add r1, pc, #656 @ (adr r1, c2268 ) │ │ - b.n c1b18 │ │ + add r1, pc, #656 @ (adr r1, c2278 ) │ │ + b.n c1b28 │ │ str r4, [r4, r6] │ │ - b.n c1b1c │ │ + b.n c1b2c │ │ cmp sp, fp │ │ - b.n c2382 │ │ - add r0, pc, #40 @ (adr r0, c200c ) │ │ - b.n c2104 │ │ + b.n c2392 │ │ + add r0, pc, #40 @ (adr r0, c201c ) │ │ + b.n c2114 │ │ asrs r4, r3, #6 │ │ - b.n c1b28 │ │ + b.n c1b38 │ │ str r5, [r0, r0] │ │ - b.n c210c │ │ + b.n c211c │ │ adds r1, #152 @ 0x98 │ │ - b.n c1b30 │ │ + b.n c1b40 │ │ movs r0, r0 │ │ - b.n c269e │ │ + b.n c26ae │ │ stmia r1!, {r2, r4, r7} │ │ - b.n c1b38 │ │ + b.n c1b48 │ │ ands r0, r1 │ │ - b.n c2518 │ │ + b.n c2528 │ │ asrs r1, r0, #32 │ │ - b.n c2120 │ │ + b.n c2130 │ │ adds r0, #3 │ │ - b.n c2124 │ │ + b.n c2134 │ │ stmia r0!, {r2, r3} │ │ - b.n c2128 │ │ + b.n c2138 │ │ asrs r4, r0, #1 │ │ stmia.w r4, {r1, r3, ip, lr} │ │ sbcs r0, r4 │ │ movs r0, #52 @ 0x34 │ │ - b.n c1b50 │ │ + b.n c1b60 │ │ ands r0, r0 │ │ - b.n c235a │ │ + b.n c236a │ │ movs r0, #0 │ │ - b.n c1b38 │ │ + b.n c1b48 │ │ movs r2, r0 │ │ - b.n c2762 │ │ + b.n c2772 │ │ movs r0, #68 @ 0x44 │ │ - b.n c2766 │ │ + b.n c2776 │ │ str r0, [r4, r0] │ │ - b.n c1b44 │ │ + b.n c1b54 │ │ strh r0, [r3, #0] │ │ - b.n c1b48 │ │ + b.n c1b58 │ │ str r6, [r1, r0] │ │ - b.n c2372 │ │ + b.n c2382 │ │ str r0, [sp, #112] @ 0x70 │ │ - b.n c1b50 │ │ - str r3, [r7, #68] @ 0x44 │ │ + b.n c1b60 │ │ + str r2, [r7, #68] @ 0x44 │ │ @ instruction: 0xebffe005 │ │ - b.n c237e │ │ + b.n c238e │ │ movs r4, r0 │ │ - b.n c2382 │ │ + b.n c2392 │ │ mvns r0, r2 │ │ - b.n c22dc │ │ + b.n c22ec │ │ vpmin.u32 q7, , │ │ asrs r0, r2, #32 │ │ - b.n c1b84 │ │ + b.n c1b94 │ │ movs r0, r0 │ │ - b.n c26f4 │ │ + b.n c2704 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ asrs r0, r7, #4 │ │ - b.n c1b98 │ │ + b.n c1ba8 │ │ asrs r1, r0, #32 │ │ - b.n c217c │ │ + b.n c218c │ │ asrs r2, r3, #1 │ │ - b.n c1c04 │ │ + b.n c1c14 │ │ movs r2, r0 │ │ - b.n c2708 │ │ + b.n c2718 │ │ movs r5, r1 │ │ cmp r2, #0 │ │ movs r0, #16 │ │ - b.n c1ba4 │ │ + b.n c1bb4 │ │ asrs r0, r0, #32 │ │ - b.n c27b2 │ │ + b.n c27c2 │ │ movs r0, r0 │ │ - b.n c271a │ │ + b.n c272a │ │ vpmin.u32 q0, q12, │ │ lsls r0, r1, #1 │ │ - b.n c1b9e │ │ + b.n c1bae │ │ movs r1, #2 │ │ - b.n c2842 │ │ + b.n c2852 │ │ adds r0, #160 @ 0xa0 │ │ - b.n c1ba6 │ │ + b.n c1bb6 │ │ lsls r2, r1, #4 │ │ - b.n c2770 │ │ + b.n c2780 │ │ movs r0, #160 @ 0xa0 │ │ str r5, [sp, #576] @ 0x240 │ │ movs r0, #1 │ │ str r2, [sp, #520] @ 0x208 │ │ movs r0, #160 @ 0xa0 │ │ - b.n c1b96 │ │ + b.n c1ba6 │ │ movs r1, r0 │ │ - b.n c23da │ │ - beq.n c20d4 │ │ - b.n c2534 │ │ + b.n c23ea │ │ + beq.n c20e4 │ │ + b.n c2544 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r5, r6, r7, sp, pc} │ │ - b.n c1be4 │ │ + b.n c1bf4 │ │ strh r4, [r0, #0] │ │ - b.n c23ea │ │ + b.n c23fa │ │ str r0, [sp, #20] │ │ - b.n c23ee │ │ + b.n c23fe │ │ str r0, [r5, r3] │ │ - b.n c1bf0 │ │ + b.n c1c00 │ │ cmp sp, fp │ │ - b.n c2456 │ │ - add r0, pc, #40 @ (adr r0, c20e0 ) │ │ - b.n c21d8 │ │ + b.n c2466 │ │ + add r0, pc, #40 @ (adr r0, c20f0 ) │ │ + b.n c21e8 │ │ asrs r0, r4, #3 │ │ - b.n c1bfc │ │ + b.n c1c0c │ │ str r5, [r0, r0] │ │ - b.n c21e0 │ │ + b.n c21f0 │ │ adds r0, #220 @ 0xdc │ │ - b.n c1c04 │ │ + b.n c1c14 │ │ movs r0, r0 │ │ - b.n c2772 │ │ + b.n c2782 │ │ stmia r0!, {r3, r4, r6, r7} │ │ - b.n c1c0c │ │ + b.n c1c1c │ │ asrs r1, r0, #32 │ │ - b.n c21f0 │ │ + b.n c2200 │ │ adds r0, #3 │ │ - b.n c21f4 │ │ + b.n c2204 │ │ ands r0, r1 │ │ - b.n c25f4 │ │ + b.n c2604 │ │ stmia r0!, {r2, r3} │ │ - b.n c21fc │ │ + b.n c220c │ │ asrs r4, r0, #2 │ │ stmia.w r4, {r1, r3, ip, lr} │ │ sbcs r0, r4 │ │ ands r0, r0 │ │ - b.n c242a │ │ + b.n c243a │ │ movs r2, r0 │ │ - b.n c282e │ │ + b.n c283e │ │ movs r0, #83 @ 0x53 │ │ - b.n c2832 │ │ + b.n c2842 │ │ strh r0, [r3, #0] │ │ - b.n c1c10 │ │ + b.n c1c20 │ │ str r0, [sp, #112] @ 0x70 │ │ - b.n c1c14 │ │ + b.n c1c24 │ │ str r0, [r4, r0] │ │ - b.n c1c18 │ │ - b.n c2100 │ │ - b.n c1c1c │ │ - str r0, [r1, #68] @ 0x44 │ │ + b.n c1c28 │ │ + b.n c2110 │ │ + b.n c1c2c │ │ + str r7, [r0, #68] @ 0x44 │ │ @ instruction: 0xebff0004 │ │ - b.n c244a │ │ + b.n c245a │ │ movs r0, #16 │ │ - b.n c1c44 │ │ + b.n c1c54 │ │ asrs r0, r0, #32 │ │ - b.n c2852 │ │ + b.n c2862 │ │ movs r0, r0 │ │ - b.n c27ba │ │ + b.n c27ca │ │ vpmin.u8 q0, q8, │ │ @ instruction: 0xffd6eaff │ │ - ldmia r1!, {r3, r5} │ │ - movs r1, r0 │ │ - add r7, sp, #380 @ 0x17c │ │ - vrshr.u64 q15, q2, #12 │ │ - vclz.i16 , q15 │ │ - vqrshrun.s64 d29, q14, #12 │ │ - vsli.32 d24, d19, #20 │ │ - vtbx.8 d28, {d20-d21}, d0 │ │ - movs r1, r0 │ │ - add r7, sp, #1004 @ 0x3ec │ │ - vrsra.u32 q15, q8, #12 │ │ - vsli.64 d23, d10, #52 @ 0x34 │ │ - vqshrn.u64 d29, q4, #12 │ │ - vdup.32 d25, d27[0] │ │ - vtbl.8 d28, {d4-d7}, d8 │ │ - movs r1, r0 │ │ - cbz r3, c2164 │ │ - vsri.64 d30, d24, #12 │ │ - vqshlu.s64 , q5, #52 @ 0x34 │ │ - vrshr.u32 , q12, #12 │ │ - vqshlu.s64 q12, , #52 @ 0x34 │ │ - vtbx.8 d28, {d4-d6}, d16 │ │ + ldmia r1!, {r3, r4, r5} │ │ movs r1, r0 │ │ - sub sp, #92 @ 0x5c │ │ - vsri.32 d30, d0, #12 │ │ - vpadal.s16 d23, d30 │ │ - @ instruction: 0xfff4d1c8 │ │ - @ instruction: 0xfff49cbb │ │ - vtbl.8 d28, {d20}, d4 │ │ - movs r1, r0 │ │ - add r6, sp, #764 @ 0x2fc │ │ - vrshr.u32 d30, d20, #12 │ │ - vcls.s16 , q9 │ │ - vmull.u , d20, d19 │ │ - vsri.64 d24, d3, #12 │ │ - vqshl.u64 q14, q8, #52 @ 0x34 │ │ - movs r1, r0 │ │ - add r5, sp, #940 @ 0x3ac │ │ - vrev16.16 q15, q8 │ │ - vrsra.u64 d23, d2, #12 │ │ - @ instruction: 0xfff4dbd3 │ │ - vshll.u32 , d11, #20 │ │ + add r7, sp, #840 @ 0x348 │ │ + vpaddl.u16 q15, q2 │ │ + vsli.32 d23, d15, #20 │ │ + vtbl.8 d29, {d4-d5}, d2 │ │ + vsli.32 q12, q5, #20 │ │ + @ instruction: 0xfff4c9d0 │ │ + movs r1, r0 │ │ + add sp, #440 @ 0x1b8 │ │ + @ instruction: 0xfff4e360 │ │ + @ instruction: 0xfff475cb │ │ + @ instruction: 0xfff4d99e │ │ + vdup.32 , d16[0] │ │ + @ instruction: 0xfff4cb18 │ │ + movs r1, r0 │ │ + cbz r6, c2190 │ │ + vclz.i16 d30, d24 │ │ + vqabs.s16 d23, d11 │ │ + vrsra.u64 , , #12 │ │ + vqshl.u32 d24, d10, #20 │ │ + @ instruction: 0xfff4ca70 │ │ + movs r1, r0 │ │ + cbz r2, c217e │ │ + vcls.s16 d30, d0 │ │ + vqshlu.s32 , , #20 │ │ + @ instruction: 0xfff4d347 │ │ + @ instruction: 0xfff49cf0 │ │ + @ instruction: 0xfff4c894 │ │ + movs r1, r0 │ │ + add r7, sp, #200 @ 0xc8 │ │ + vpaddl.s16 d30, d20 │ │ + vsri.64 d23, d3, #12 │ │ + vqdmulh.s , q10, d19[0] │ │ + vsri.64 d24, d26, #12 │ │ + vtbl.8 d28, {d4}, d0 │ │ + movs r1, r0 │ │ + add r6, sp, #376 @ 0x178 │ │ + vsra.u32 q15, q0, #12 │ │ + @ instruction: 0xfff473c3 │ │ + vcvt.f16.u16 d29, d3, #12 │ │ + @ instruction: 0xfff49a50 │ │ vrev64.16 d18, d0 │ │ - b.n c24f2 │ │ + b.n c2502 │ │ movs r0, r1 │ │ - b.n c1cd6 │ │ - bl 51dcb6 │ │ + b.n c1ce6 │ │ + bl 51dcc6 │ │ asrs r4, r1, #32 │ │ - b.n c1ce2 │ │ - bl 51dcbe │ │ + b.n c1cf2 │ │ + bl 51dcce │ │ adds r0, #168 @ 0xa8 │ │ - b.n c1cea │ │ + b.n c1cfa │ │ adds r0, #172 @ 0xac │ │ - b.n c1cee │ │ + b.n c1cfe │ │ adds r0, #176 @ 0xb0 │ │ - b.n c1cf2 │ │ - bl 51dcce │ │ + b.n c1d02 │ │ + bl 51dcde │ │ movs r0, #180 @ 0xb4 │ │ - b.n c1cfa │ │ - bl 51dcd6 │ │ + b.n c1d0a │ │ + bl 51dce6 │ │ adds r0, #3 │ │ - b.n c221e │ │ + b.n c222e │ │ movs r0, #2 │ │ - b.n c2224 │ │ + b.n c2234 │ │ movs r0, #2 │ │ - b.n c250c │ │ + b.n c251c │ │ movs r0, r0 │ │ asrs r0, r4, #14 │ │ asrs r0, r0, #32 │ │ asrs r0, r4, #14 │ │ vrhadd.u16 d14, d14, d31 │ │ - ldr r0, [pc, #960] @ (c25b4 ) │ │ + ldr r0, [pc, #960] @ (c25c4 ) │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n c2714 │ │ - beq.n c220c │ │ - b.n c2698 │ │ + b.n c2724 │ │ + beq.n c221c │ │ + b.n c26a8 │ │ ands r2, r0 │ │ - b.n c2542 │ │ + b.n c2552 │ │ str r1, [r0, #0] │ │ - b.n c2546 │ │ + b.n c2556 │ │ movs r0, r0 │ │ - b.n c28aa │ │ + b.n c28ba │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, r0] │ │ - b.n c2552 │ │ + b.n c2562 │ │ lsls r0, r2, #3 │ │ - b.n c2596 │ │ + b.n c25a6 │ │ strb r1, [r0, #0] │ │ - b.n c251a │ │ - str r6, [r0, #52] @ 0x34 │ │ + b.n c252a │ │ + str r5, [r0, #52] @ 0x34 │ │ @ instruction: 0xebff0000 │ │ - b.n c28d0 │ │ + b.n c28e0 │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ lsls r0, r6, #3 │ │ - b.n c25b4 │ │ - bl 51dd2a │ │ + b.n c25c4 │ │ + bl 51dd3a │ │ ldr r7, [r6, r5] │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n c29f6 │ │ + b.n c2a06 │ │ movs r4, r0 │ │ - b.n c257a │ │ - beq.n c225c │ │ - b.n c26d4 │ │ + b.n c258a │ │ + beq.n c226c │ │ + b.n c26e4 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r4, r6, r7, sp} │ │ - b.n c25d0 │ │ + b.n c25e0 │ │ movs r2, r0 │ │ - b.n c22ea │ │ + b.n c22fa │ │ cmp r5, #62 @ 0x3e │ │ - b.n c2864 │ │ + b.n c2874 │ │ asrs r3, r0, #32 │ │ - b.n c23d4 │ │ + b.n c23e4 │ │ movs r5, #245 @ 0xf5 │ │ - b.n c28d6 │ │ + b.n c28e6 │ │ movs r2, r0 │ │ - b.n c22fa │ │ + b.n c230a │ │ movs r0, r0 │ │ - b.n c2800 │ │ + b.n c2810 │ │ @ instruction: 0xfff13aff │ │ lsls r5, r3, #23 │ │ - b.n c260e │ │ + b.n c261e │ │ @ instruction: 0x47c5 │ │ - b.n c287a │ │ - ldr r7, [pc, #1020] @ (c2668 ) │ │ - b.n c290c │ │ + b.n c288a │ │ + ldr r7, [pc, #1020] @ (c2678 ) │ │ + b.n c291c │ │ movs r0, r0 │ │ - b.n c291e │ │ + b.n c292e │ │ movs r0, r2 │ │ - ldr r2, [pc, #0] @ (c2274 ) │ │ + ldr r2, [pc, #0] @ (c2284 ) │ │ movs r6, r0 │ │ - b.n c251a │ │ + b.n c252a │ │ movs r6, r1 │ │ lsrs r0, r0, #8 │ │ lsls r4, r7, #1 │ │ - b.n c1dc0 │ │ + b.n c1dd0 │ │ movs r0, r0 │ │ - b.n c23a4 │ │ + b.n c23b4 │ │ lsls r2, r3, #1 │ │ - b.n c1e2a │ │ + b.n c1e3a │ │ movs r0, r0 │ │ - b.n c292e │ │ + b.n c293e │ │ @ instruction: 0xffe80aff │ │ asrs r4, r5, #1 │ │ - b.n c1dd4 │ │ + b.n c1de4 │ │ movs r1, r0 │ │ - b.n c29da │ │ + b.n c29ea │ │ adds r0, #104 @ 0x68 │ │ - b.n c1ddc │ │ + b.n c1dec │ │ movs r0, #99 @ 0x63 │ │ - b.n c29e2 │ │ + b.n c29f2 │ │ strb r4, [r4, #1] │ │ - b.n c1de4 │ │ + b.n c1df4 │ │ asrs r1, r0, #32 │ │ - b.n c23c8 │ │ + b.n c23d8 │ │ adds r0, #3 │ │ - b.n c23cc │ │ + b.n c23dc │ │ strb r7, [r0, #0] │ │ - b.n c23d0 │ │ + b.n c23e0 │ │ str r0, [r6, #12] │ │ - b.n c2650 │ │ + b.n c2660 │ │ movs r7, r1 │ │ and.w r0, r0, r1 │ │ - b.n c299e │ │ + b.n c29ae │ │ @ instruction: 0xffdccaff │ │ lsls r0, r1, #1 │ │ - b.n c1e04 │ │ + b.n c1e14 │ │ movs r0, r0 │ │ - b.n c23e8 │ │ + b.n c23f8 │ │ lsls r2, r3, #1 │ │ - b.n c1e6e │ │ + b.n c1e7e │ │ movs r0, r0 │ │ - b.n c2972 │ │ + b.n c2982 │ │ @ instruction: 0xffd70aff │ │ asrs r0, r7, #32 │ │ - b.n c1e18 │ │ + b.n c1e28 │ │ movs r0, #101 @ 0x65 │ │ - b.n c2a1e │ │ + b.n c2a2e │ │ adds r0, #52 @ 0x34 │ │ - b.n c1e20 │ │ + b.n c1e30 │ │ movs r4, r6 │ │ - b.n c1e24 │ │ + b.n c1e34 │ │ asrs r1, r0, #32 │ │ - b.n c2408 │ │ + b.n c2418 │ │ adds r0, #3 │ │ - b.n c240c │ │ + b.n c241c │ │ movs r0, r0 │ │ - b.n c2410 │ │ + b.n c2420 │ │ movs r0, r0 │ │ - b.n c1e10 │ │ + b.n c1e20 │ │ movs r1, r0 │ │ - b.n c2a3a │ │ - str r2, [r1, #60] @ 0x3c │ │ + b.n c2a4a │ │ + str r1, [r1, #60] @ 0x3c │ │ @ instruction: 0xebffffcc │ │ - @ instruction: 0xeaffc5c8 │ │ + @ instruction: 0xeaffc5d8 │ │ movs r1, r0 │ │ - ldrh r0, [r0, #24] │ │ - vtbl.8 d23, {d4}, d4 │ │ - @ instruction: 0xfff4abf3 │ │ - vabal.u q14, d20, d4 │ │ - movs r1, r0 │ │ - ldrh r0, [r0, #22] │ │ - vaddw.u , q10, d6 │ │ - @ instruction: 0xfff47dbd │ │ + ldrh r7, [r5, #16] │ │ + @ instruction: 0xfff478d7 │ │ + vdup.32 q13, d22[0] │ │ + vsli.64 d28, d4, #52 @ 0x34 │ │ + movs r1, r0 │ │ + ldrh r7, [r5, #14] │ │ + vsra.u64 d23, d23, #12 │ │ + @ instruction: 0xfff47e92 │ │ @ instruction: 0xfff44ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n c2844 │ │ - beq.n c22b4 │ │ - b.n c27c8 │ │ + b.n c2854 │ │ + beq.n c22c4 │ │ + b.n c27d8 │ │ ands r0, r0 │ │ - b.n c2672 │ │ + b.n c2682 │ │ movs r4, r1 │ │ - b.n c1e56 │ │ + b.n c1e66 │ │ str r4, [r0, #0] │ │ - b.n c283e │ │ + b.n c284e │ │ strh r3, [r0, #0] │ │ - b.n c267e │ │ + b.n c268e │ │ str r2, [r0, r0] │ │ - b.n c2682 │ │ + b.n c2692 │ │ lsls r0, r0, #1 │ │ - b.n c296c │ │ + b.n c297c │ │ str r0, [sp, #256] @ 0x100 │ │ - b.n c1e6a │ │ + b.n c1e7a │ │ asrs r0, r2, #1 │ │ - b.n c1e68 │ │ + b.n c1e78 │ │ movs r0, #72 @ 0x48 │ │ - b.n c1e6c │ │ + b.n c1e7c │ │ str r0, [r0, #4] │ │ - b.n c1e70 │ │ + b.n c1e80 │ │ str r0, [sp, #304] @ 0x130 │ │ - b.n c1e74 │ │ + b.n c1e84 │ │ lsls r5, r3, #1 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n c1f0a │ │ + b.n c1f1a │ │ movs r1, r0 │ │ - b.n c2986 │ │ + b.n c2996 │ │ lsls r2, r3, #1 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n c296e │ │ + b.n c297e │ │ movs r2, r0 │ │ - b.n c29f2 │ │ + b.n c2a02 │ │ movs r0, r0 │ │ - b.n c25a6 │ │ + b.n c25b6 │ │ lsls r0, r6, #21 │ │ subs r0, r0, r0 │ │ asrs r0, r5, #32 │ │ - b.n c2814 │ │ + b.n c2824 │ │ movs r0, #48 @ 0x30 │ │ - b.n c2818 │ │ + b.n c2828 │ │ movs r4, r0 │ │ - b.n c26c6 │ │ + b.n c26d6 │ │ adds r0, #4 │ │ - b.n c2aca │ │ - ldr r7, [r5, #44] @ 0x2c │ │ + b.n c2ada │ │ + ldr r6, [r5, #44] @ 0x2c │ │ @ instruction: 0xebff0000 │ │ - b.n c2a32 │ │ + b.n c2a42 │ │ lsls r6, r3, #18 │ │ subs r0, r0, r0 │ │ movs r4, r2 │ │ - b.n c1ec2 │ │ + b.n c1ed2 │ │ asrs r0, r5, #32 │ │ - b.n c2834 │ │ + b.n c2844 │ │ movs r0, #0 │ │ - b.n c1ec2 │ │ + b.n c1ed2 │ │ lsls r0, r2, #1 │ │ - b.n c1ee0 │ │ + b.n c1ef0 │ │ vrhadd.u d14, d2, d31 │ │ movs r0, r0 │ │ - b.n c2a4e │ │ + b.n c2a5e │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ lsrs r6, r5, #4 │ │ - b.n c29c6 │ │ + b.n c29d6 │ │ lsrs r7, r7, #31 │ │ - b.n c2a58 │ │ - beq.n c23f4 │ │ - b.n c2854 │ │ + b.n c2a68 │ │ + beq.n c2404 │ │ + b.n c2864 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r4} │ │ - b.n c1eee │ │ + b.n c1efe │ │ lsls r2, r0, #28 │ │ - b.n c29fa │ │ + b.n c2a0a │ │ lsls r3, r0, #3 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n c2a72 │ │ + b.n c2a82 │ │ movs r3, r5 │ │ lsrs r0, r0, #8 │ │ asrs r5, r2, #3 │ │ - b.n c2782 │ │ + b.n c2792 │ │ movs r0, #129 @ 0x81 │ │ - b.n c24e6 │ │ + b.n c24f6 │ │ asrs r1, r0, #4 │ │ - b.n c24ea │ │ + b.n c24fa │ │ movs r7, #188 @ 0xbc │ │ - b.n c278a │ │ + b.n c279a │ │ asrs r4, r3, #32 │ │ - b.n c1f0c │ │ + b.n c1f1c │ │ movs r0, #130 @ 0x82 │ │ - b.n c24f0 │ │ + b.n c2500 │ │ movs r1, #180 @ 0xb4 │ │ - b.n c2796 │ │ + b.n c27a6 │ │ asrs r2, r0, #32 │ │ - b.n c24f8 │ │ + b.n c2508 │ │ asrs r0, r3, #32 │ │ - b.n c1f9c │ │ + b.n c1fac │ │ movs r4, r0 │ │ - b.n c2a20 │ │ + b.n c2a30 │ │ movs r0, r3 │ │ subs r0, r0, r0 │ │ lsls r0, r2, #1 │ │ - b.n c1f40 │ │ + b.n c1f50 │ │ movs r0, r0 │ │ - b.n c2aaa │ │ + b.n c2aba │ │ movs r4, r0 │ │ asrs r0, r2, #22 │ │ movs r1, r0 │ │ asrs r0, r0, #10 │ │ movs r1, r0 │ │ lsls r0, r4, #14 │ │ movs r0, r0 │ │ - b.n c2ac4 │ │ + b.n c2ad4 │ │ asrs r0, r0, #32 │ │ asrs r6, r2, #22 │ │ asrs r0, r0, #32 │ │ lsls r0, r4, #14 │ │ movs r0, r0 │ │ - b.n c2528 │ │ + b.n c2538 │ │ movs r1, r0 │ │ - b.n c2baa │ │ + b.n c2bba │ │ asrs r4, r7, #18 │ │ - b.n c27e0 │ │ + b.n c27f0 │ │ movs r0, r1 │ │ - b.n c2932 │ │ + b.n c2942 │ │ movs r1, r0 │ │ - b.n c26d6 │ │ + b.n c26e6 │ │ movs r2, r2 │ │ ldr r2, [sp, #0] │ │ movs r4, r0 │ │ - b.n c277e │ │ + b.n c278e │ │ asrs r0, r0, #32 │ │ - b.n c2b82 │ │ + b.n c2b92 │ │ strb r4, [r0, #0] │ │ - b.n c2786 │ │ - strb r2, [r3, #0] │ │ + b.n c2796 │ │ + strb r1, [r3, #0] │ │ @ instruction: 0xebff0000 │ │ - b.n c2aee │ │ + b.n c2afe │ │ lsls r3, r7, #20 │ │ subs r0, r0, r0 │ │ strh r0, [r0, #2] │ │ - b.n c28e6 │ │ + b.n c28f6 │ │ str r0, [r1, r1] │ │ - b.n c1f94 │ │ + b.n c1fa4 │ │ str r0, [r0, #4] │ │ - b.n c1f98 │ │ + b.n c1fa8 │ │ ands r7, r0 │ │ - b.n c27a2 │ │ + b.n c27b2 │ │ lsls r3, r5, #2 │ │ and.w sp, r0, r4, lsr #3 │ │ - b.n c27ea │ │ + b.n c27fa │ │ movs r1, r0 │ │ - b.n c294e │ │ + b.n c295e │ │ movs r0, r0 │ │ - b.n c2a54 │ │ + b.n c2a64 │ │ movs r1, r2 │ │ subs r2, #0 │ │ movs r4, r5 │ │ - b.n c1eb0 │ │ + b.n c1ec0 │ │ asrs r0, r0, #32 │ │ - b.n c1faa │ │ + b.n c1fba │ │ movs r1, r0 │ │ - b.n c2722 │ │ + b.n c2732 │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ lsrs r1, r0, #32 │ │ - b.n c2aba │ │ + b.n c2aca │ │ movs r1, r2 │ │ subs r0, r0, r0 │ │ movs r0, #44 @ 0x2c │ │ - b.n c1ec8 │ │ + b.n c1ed8 │ │ movs r0, r0 │ │ - b.n c1fc2 │ │ + b.n c1fd2 │ │ movs r0, r0 │ │ - b.n c273e │ │ + b.n c274e │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ movs r0, r6 │ │ - b.n c1ed8 │ │ + b.n c1ee8 │ │ asrs r0, r0, #32 │ │ - b.n c1fd0 │ │ + b.n c1fe0 │ │ stc2 11, cr14, [lr, #-1020] @ 0xfffffc04 @ │ │ asrs r0, r0, #32 │ │ - b.n c27ee │ │ + b.n c27fe │ │ movs r0, r0 │ │ - b.n c2bf2 │ │ + b.n c2c02 │ │ movs r0, r0 │ │ - b.n c2b58 │ │ + b.n c2b68 │ │ lsls r5, r2, #17 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ and.w r0, r0, r0, lsl #6 │ │ - b.n c28d2 │ │ + b.n c28e2 │ │ movs r4, r0 │ │ - b.n c2806 │ │ - ldr r2, [r7, #124] @ 0x7c │ │ + b.n c2816 │ │ + ldr r1, [r7, #124] @ 0x7c │ │ @ instruction: 0xebff0000 │ │ - b.n c2b6e │ │ + b.n c2b7e │ │ lsls r7, r1, #17 │ │ subs r0, r0, r0 │ │ strh r0, [r0, #2] │ │ - b.n c2966 │ │ + b.n c2976 │ │ movs r0, r2 │ │ - b.n c2002 │ │ + b.n c2012 │ │ asrs r2, r6, #2 │ │ - b.n c287e │ │ + b.n c288e │ │ movs r0, r0 │ │ - b.n c2b84 │ │ + b.n c2b94 │ │ lsls r0, r2, #2 │ │ lsrs r0, r0, #8 │ │ strb r0, [r0, #0] │ │ - b.n c2c2a │ │ + b.n c2c3a │ │ lsls r0, r0, #1 │ │ - b.n c2b1e │ │ + b.n c2b2e │ │ lsls r0, r2, #2 │ │ subs r0, r0, r0 │ │ lsrs r2, r0, #32 │ │ - b.n c2b26 │ │ + b.n c2b36 │ │ lsls r0, r2, #11 │ │ asrs r0, r0, #7 │ │ movs r1, r0 │ │ asrs r0, r2, #6 │ │ movs r4, r4 │ │ subs r0, r0, r0 │ │ movs r7, r1 │ │ - b.n c2c46 │ │ + b.n c2c56 │ │ movs r0, #80 @ 0x50 │ │ - b.n c2044 │ │ + b.n c2054 │ │ movs r0, r0 │ │ - b.n c2028 │ │ + b.n c2038 │ │ movs r0, r6 │ │ - b.n c29a8 │ │ + b.n c29b8 │ │ adds r0, #40 @ 0x28 │ │ - b.n c29ac │ │ + b.n c29bc │ │ asrs r4, r0, #32 │ │ - b.n c285a │ │ - strb r5, [r0, #31] │ │ + b.n c286a │ │ + strb r4, [r0, #31] │ │ @ instruction: 0xebff102c │ │ - b.n c1fd8 │ │ + b.n c1fe8 │ │ movs r0, r6 │ │ - b.n c1f5c │ │ + b.n c1f6c │ │ movs r0, r0 │ │ - b.n c2bcc │ │ + b.n c2bdc │ │ movs r7, r6 │ │ lsrs r0, r0, #8 │ │ - add r0, pc, #20 @ (adr r0, c2544 ) │ │ - b.n c2872 │ │ + add r0, pc, #20 @ (adr r0, c2554 ) │ │ + b.n c2882 │ │ movs r0, r2 │ │ - b.n c2b66 │ │ + b.n c2b76 │ │ lsls r3, r3, #1 │ │ subs r0, r0, r0 │ │ str r4, [r0, r0] │ │ - b.n c287e │ │ + b.n c288e │ │ str r0, [sp, #32] │ │ - b.n c2882 │ │ + b.n c2892 │ │ asrs r4, r0, #32 │ │ - b.n c2130 │ │ + b.n c2140 │ │ movs r1, r0 │ │ - b.n c2b6c │ │ + b.n c2b7c │ │ lsls r5, r3, #1 │ │ subs r0, r0, r0 │ │ asrs r0, r3, #32 │ │ - b.n c207a │ │ + b.n c208a │ │ movs r0, r0 │ │ - b.n c2bf8 │ │ + b.n c2c08 │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, #213 @ 0xd5 │ │ - b.n c2900 │ │ + b.n c2910 │ │ movs r0, r0 │ │ - b.n c2c06 │ │ + b.n c2c16 │ │ movs r6, r0 │ │ - ldr r2, [pc, #0] @ (c2564 ) │ │ + ldr r2, [pc, #0] @ (c2574 ) │ │ lsls r0, r0, #2 │ │ - b.n c2b9c │ │ + b.n c2bac │ │ lsls r7, r1, #20 │ │ subs r0, r0, r0 │ │ lsrs r1, r1, #32 │ │ - b.n c2ba4 │ │ + b.n c2bb4 │ │ movs r0, #9 │ │ - b.n c28b6 │ │ + b.n c28c6 │ │ movs r2, r6 │ │ lsrs r0, r0, #8 │ │ strb r0, [r0, #0] │ │ - b.n c28be │ │ + b.n c28ce │ │ lsls r5, r0, #1 │ │ @ instruction: 0xea008009 │ │ - b.n c28c6 │ │ + b.n c28d6 │ │ lsrs r1, r1, #32 │ │ - b.n c2bbc │ │ + b.n c2bcc │ │ movs r5, r4 │ │ lsrs r0, r0, #8 │ │ strb r0, [r0, #0] │ │ - b.n c28d2 │ │ + b.n c28e2 │ │ lsls r1, r0, #1 │ │ and.w r0, r0, r0, lsl #4 │ │ - b.n c2cda │ │ + b.n c2cea │ │ movs r4, r0 │ │ - b.n c2146 │ │ + b.n c2156 │ │ asrs r4, r4, #32 │ │ - b.n c1fb8 │ │ + b.n c1fc8 │ │ asrs r0, r5, #32 │ │ - b.n c1fbc │ │ + b.n c1fcc │ │ asrs r0, r6, #32 │ │ - b.n c2a40 │ │ + b.n c2a50 │ │ movs r1, r0 │ │ - b.n c2bce │ │ + b.n c2bde │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ movs r0, #40 @ 0x28 │ │ - b.n c2a4c │ │ + b.n c2a5c │ │ movs r4, r0 │ │ - b.n c28fa │ │ - ldr r7, [sp, #496] @ 0x1f0 │ │ + b.n c290a │ │ + ldr r7, [sp, #492] @ 0x1ec │ │ @ instruction: 0xebff0001 │ │ and.w r0, r0, r4 │ │ - b.n c2906 │ │ + b.n c2916 │ │ @ instruction: 0xfaa0ebff │ │ movs r0, r0 │ │ - b.n c2c6e │ │ + b.n c2c7e │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ movs r4, r2 │ │ - b.n c20fe │ │ + b.n c210e │ │ asrs r0, r6, #32 │ │ - b.n c2a70 │ │ + b.n c2a80 │ │ movs r0, #0 │ │ - b.n c20fe │ │ + b.n c210e │ │ lsls r0, r2, #1 │ │ - b.n c211c │ │ + b.n c212c │ │ vrhadd.u d14, d2, d31 │ │ movs r1, r0 │ │ - b.n c2c8a │ │ + b.n c2c9a │ │ lsls r2, r5, #19 │ │ rev r0, r0 │ │ lsls r5, r2, #3 │ │ - b.n c299a │ │ + b.n c29aa │ │ lsls r0, r0, #2 │ │ - b.n c26fe │ │ + b.n c270e │ │ asrs r4, r7, #30 │ │ - b.n c299a │ │ + b.n c29aa │ │ asrs r1, r0, #32 │ │ - b.n c2b00 │ │ + b.n c2b10 │ │ asrs r4, r7, #30 │ │ - b.n c2982 │ │ + b.n c2992 │ │ lsls r1, r6, #30 │ │ - b.n c2c16 │ │ + b.n c2c26 │ │ lsrs r7, r7, #31 │ │ - b.n c2ca8 │ │ + b.n c2cb8 │ │ movs r1, r0 │ │ - b.n c2b0e │ │ + b.n c2b1e │ │ asrs r1, r6, #30 │ │ - b.n c2c22 │ │ + b.n c2c32 │ │ subs r7, r7, #7 │ │ - b.n c2cb4 │ │ + b.n c2cc4 │ │ strb r1, [r0, #0] │ │ - b.n c2b1c │ │ + b.n c2b2c │ │ movs r7, r0 │ │ - b.n c28be │ │ + b.n c28ce │ │ lsls r4, r0, #1 │ │ lsrs r0, r0, #8 │ │ lsls r2, r7, #15 │ │ and.w r0, r0, r4, asr #12 │ │ - b.n c2060 │ │ + b.n c2070 │ │ str r2, [r1, r0] │ │ - b.n c296e │ │ + b.n c297e │ │ movs r0, #0 │ │ - b.n c215e │ │ + b.n c216e │ │ movs r3, r0 │ │ - b.n c28da │ │ + b.n c28ea │ │ lsls r0, r6, #19 │ │ lsrs r0, r0, #8 │ │ strb r0, [r0, #0] │ │ - b.n c297e │ │ + b.n c298e │ │ str r0, [sp, #304] @ 0x130 │ │ - b.n c217c │ │ + b.n c218c │ │ movs r3, r7 │ │ and.w r0, r0, r0, lsl #24 │ │ - b.n c298a │ │ + b.n c299a │ │ movs r1, r1 │ │ ldmia.w sl, {r3, r5, sp} │ │ - b.n c2ae8 │ │ + b.n c2af8 │ │ movs r0, r5 │ │ - b.n c206c │ │ + b.n c207c │ │ movs r1, r2 │ │ - b.n c2d9a │ │ + b.n c2daa │ │ movs r0, r0 │ │ - b.n c2178 │ │ + b.n c2188 │ │ movs r0, r6 │ │ - b.n c2af8 │ │ + b.n c2b08 │ │ adds r0, #36 @ 0x24 │ │ - b.n c207c │ │ + b.n c208c │ │ adds r0, #0 │ │ - b.n c2daa │ │ - strb r1, [r6, #29] │ │ + b.n c2dba │ │ + strb r0, [r6, #29] │ │ @ instruction: 0xebff002c │ │ - b.n c2128 │ │ + b.n c2138 │ │ movs r0, r0 │ │ - b.n c2d16 │ │ + b.n c2d26 │ │ lsls r7, r5, #19 │ │ subs r0, r0, r0 │ │ movs r0, r6 │ │ - b.n c20b4 │ │ + b.n c20c4 │ │ movs r0, r0 │ │ - b.n c2d22 │ │ + b.n c2d32 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ asrs r2, r6, #30 │ │ - b.n c2c9a │ │ + b.n c2caa │ │ subs r7, r7, #7 │ │ - b.n c2d2c │ │ + b.n c2d3c │ │ movs r1, r0 │ │ - b.n c2932 │ │ + b.n c2942 │ │ lsls r1, r7, #19 │ │ subs r0, r0, r0 │ │ strb r6, [r0, #0] │ │ - b.n c29da │ │ + b.n c29ea │ │ strh r1, [r1, #0] │ │ - b.n c29de │ │ + b.n c29ee │ │ str r0, [sp, #304] @ 0x130 │ │ - b.n c21dc │ │ + b.n c21ec │ │ str r2, [r1, r0] │ │ - b.n c29e6 │ │ + b.n c29f6 │ │ movs r2, r4 │ │ and.w r0, r0, r4, asr #4 │ │ - b.n c20e4 │ │ + b.n c20f4 │ │ movs r0, r5 │ │ - b.n c20e8 │ │ + b.n c20f8 │ │ lsls r0, r6, #3 │ │ - b.n c2a4a │ │ + b.n c2a5a │ │ lsls r1, r6, #30 │ │ - b.n c2cca │ │ + b.n c2cda │ │ lsrs r7, r7, #31 │ │ - b.n c2d5c │ │ - beq.n c26f8 │ │ - b.n c2b58 │ │ + b.n c2d6c │ │ + beq.n c2708 │ │ + b.n c2b68 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r3, r8, sl, fp} │ │ - b.n c2a0a │ │ + b.n c2a1a │ │ asrs r1, r6, #30 │ │ - b.n c2cde │ │ + b.n c2cee │ │ subs r7, r7, #7 │ │ - b.n c2d70 │ │ + b.n c2d80 │ │ lsrs r0, r0, #31 │ │ - b.n c26d8 │ │ - beq.n c2710 │ │ - b.n c2b70 │ │ + b.n c26e8 │ │ + beq.n c2720 │ │ + b.n c2b80 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {} │ │ - b.n c2d82 │ │ + b.n c2d92 │ │ lsls r5, r2, #18 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #2 │ │ - b.n c2afa │ │ + b.n c2b0a │ │ movs r4, r0 │ │ - b.n c2a2e │ │ - ldr r0, [r6, #116] @ 0x74 │ │ + b.n c2a3e │ │ + ldr r7, [r5, #116] @ 0x74 │ │ @ instruction: 0xebff0000 │ │ - b.n c2d96 │ │ + b.n c2da6 │ │ lsls r1, r2, #18 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #1 │ │ - b.n c2238 │ │ + b.n c2248 │ │ movs r4, r1 │ │ - b.n c2222 │ │ + b.n c2232 │ │ movs r0, r0 │ │ - b.n c2da6 │ │ + b.n c2db6 │ │ lsls r1, r1, #3 │ │ lsrs r0, r0, #8 │ │ str r0, [r1, r1] │ │ - b.n c2248 │ │ + b.n c2258 │ │ strh r0, [r0, #2] │ │ - b.n c2ba2 │ │ + b.n c2bb2 │ │ str r0, [r0, #4] │ │ - b.n c2250 │ │ + b.n c2260 │ │ str r0, [sp, #304] @ 0x130 │ │ - b.n c2254 │ │ + b.n c2264 │ │ movs r0, r2 │ │ - b.n c2246 │ │ + b.n c2256 │ │ asrs r2, r6, #2 │ │ - b.n c2ac2 │ │ + b.n c2ad2 │ │ movs r0, r0 │ │ - b.n c2dc8 │ │ + b.n c2dd8 │ │ vpmin.u32 , q15, │ │ lsrs r6, r5, #4 │ │ - b.n c2d3e │ │ + b.n c2d4e │ │ lsrs r7, r7, #31 │ │ - b.n c2dd0 │ │ + b.n c2de0 │ │ strb r1, [r5, #0] │ │ - b.n c2c36 │ │ + b.n c2c46 │ │ movs r4, r0 │ │ - b.n c22e2 │ │ + b.n c22f2 │ │ asrs r0, r0, #32 │ │ - b.n c2e7e │ │ + b.n c2e8e │ │ lsls r2, r0, #28 │ │ - b.n c2d72 │ │ + b.n c2d82 │ │ movs r0, #0 │ │ - b.n c2e86 │ │ + b.n c2e96 │ │ lsls r7, r6, #3 │ │ - b.n c2b4a │ │ + b.n c2b5a │ │ movs r4, r0 │ │ - b.n c22d6 │ │ + b.n c22e6 │ │ lsls r3, r7, #14 │ │ subs r0, r0, r0 │ │ asrs r0, r5, #32 │ │ - b.n c2270 │ │ + b.n c2280 │ │ movs r4, r0 │ │ - b.n c2a9a │ │ + b.n c2aaa │ │ asrs r0, r2, #1 │ │ - b.n c2298 │ │ + b.n c22a8 │ │ movs r0, #56 @ 0x38 │ │ - b.n c227c │ │ + b.n c228c │ │ movs r0, #5 │ │ - b.n c2aa6 │ │ + b.n c2ab6 │ │ lsls r6, r0, #21 │ │ add.w r0, r0, r0 │ │ - b.n c2e0e │ │ + b.n c2e1e │ │ lsls r7, r4, #14 │ │ subs r0, r0, r0 │ │ lsrs r6, r5, #4 │ │ - b.n c2d86 │ │ + b.n c2d96 │ │ lsrs r7, r7, #31 │ │ - b.n c2e18 │ │ + b.n c2e28 │ │ movs r1, r5 │ │ - b.n c2c7e │ │ + b.n c2c8e │ │ movs r0, r0 │ │ - b.n c2a30 │ │ + b.n c2a40 │ │ lsls r5, r6, #14 │ │ lsrs r0, r0, #8 │ │ movs r0, r7 │ │ - b.n c2c20 │ │ - add r0, pc, #512 @ (adr r0, c298c ) │ │ - b.n c22c0 │ │ + b.n c2c30 │ │ + add r0, pc, #512 @ (adr r0, c299c ) │ │ + b.n c22d0 │ │ movs r4, r0 │ │ - b.n c2c92 │ │ + b.n c2ca2 │ │ movs r4, r6 │ │ - b.n c22b0 │ │ + b.n c22c0 │ │ lsls r0, r5, #1 │ │ - b.n c2cb4 │ │ + b.n c2cc4 │ │ movs r0, r0 │ │ - b.n c2e4c │ │ + b.n c2e5c │ │ movs r0, r3 │ │ - b.n c2ca2 │ │ + b.n c2cb2 │ │ movs r4, r7 │ │ - b.n c22c0 │ │ + b.n c22d0 │ │ movs r4, r1 │ │ - b.n c22d2 │ │ + b.n c22e2 │ │ lsls r0, r3, #15 │ │ - b.n c2b2e │ │ + b.n c2b3e │ │ movs r0, r0 │ │ - b.n c22c6 │ │ + b.n c22d6 │ │ movs r0, r0 │ │ - b.n c2ef6 │ │ + b.n c2f06 │ │ asrs r4, r0, #32 │ │ - b.n c22ce │ │ + b.n c22de │ │ asrs r0, r0, #32 │ │ - b.n c2efe │ │ + b.n c2f0e │ │ asrs r4, r7, #32 │ │ - b.n c21d8 │ │ + b.n c21e8 │ │ lsls r4, r0, #1 │ │ - b.n c22e0 │ │ + b.n c22f0 │ │ asrs r0, r0, #1 │ │ - b.n c21e0 │ │ + b.n c21f0 │ │ movs r3, r5 │ │ lsrs r0, r0, #8 │ │ movs r0, r2 │ │ - b.n c22fa │ │ - b.n c27d8 │ │ - b.n c2f16 │ │ + b.n c230a │ │ + b.n c27e8 │ │ + b.n c2f26 │ │ lsls r0, r6, #2 │ │ - b.n c2b7a │ │ + b.n c2b8a │ │ movs r4, r0 │ │ - b.n c2dfe │ │ + b.n c2e0e │ │ movs r2, r4 │ │ lsrs r0, r0, #8 │ │ movs r0, r3 │ │ - b.n c230e │ │ + b.n c231e │ │ movs r0, r0 │ │ - b.n c2e8a │ │ + b.n c2e9a │ │ asrs r6, r5, #32 │ │ asrs r0, r4, #15 │ │ asrs r4, r6, #2 │ │ asrs r0, r0, #7 │ │ asrs r0, r0, #32 │ │ asrs r0, r4, #14 │ │ asrs r4, r7, #2 │ │ asrs r0, r0, #22 │ │ lsls r0, r2, #1 │ │ - b.n c2338 │ │ + b.n c2348 │ │ asrs r4, r0, #1 │ │ - b.n c231c │ │ + b.n c232c │ │ movs r0, r0 │ │ - b.n c2ea6 │ │ + b.n c2eb6 │ │ movs r4, r0 │ │ asrs r0, r2, #22 │ │ movs r1, r0 │ │ asrs r0, r0, #10 │ │ movs r1, r0 │ │ lsls r0, r4, #14 │ │ movs r0, r0 │ │ - b.n c2ec0 │ │ + b.n c2ed0 │ │ asrs r0, r0, #1 │ │ asrs r5, r3, #22 │ │ asrs r0, r0, #32 │ │ asrs r1, r2, #22 │ │ movs r0, r0 │ │ - b.n c2924 │ │ + b.n c2934 │ │ asrs r4, r7, #18 │ │ - b.n c2bd8 │ │ + b.n c2be8 │ │ movs r1, r0 │ │ - b.n c2faa │ │ + b.n c2fba │ │ movs r0, r1 │ │ - b.n c2d2e │ │ + b.n c2d3e │ │ movs r1, r0 │ │ - b.n c2ad2 │ │ + b.n c2ae2 │ │ movs r5, r1 │ │ ldr r2, [sp, #0] │ │ movs r0, r2 │ │ - b.n c2362 │ │ + b.n c2372 │ │ stmia r0!, {r0} │ │ - b.n c2f7e │ │ + b.n c2f8e │ │ strh r4, [r2, #2] │ │ - b.n c235c │ │ + b.n c236c │ │ asrs r0, r6, #2 │ │ - b.n c2be6 │ │ + b.n c2bf6 │ │ movs r0, r0 │ │ - b.n c2f8a │ │ + b.n c2f9a │ │ movs r0, r2 │ │ - b.n c2e70 │ │ + b.n c2e80 │ │ asrs r0, r0, #32 │ │ - b.n c2f92 │ │ + b.n c2fa2 │ │ asrs r0, r0, #1 │ │ asrs r5, r3, #22 │ │ asrs r0, r0, #32 │ │ asrs r1, r2, #22 │ │ movs r4, r1 │ │ - b.n c2372 │ │ + b.n c2382 │ │ movs r4, r2 │ │ - b.n c2fa2 │ │ + b.n c2fb2 │ │ asrs r0, r7, #2 │ │ - b.n c2bfa │ │ + b.n c2c0a │ │ lsls r4, r0, #1 │ │ - b.n c2280 │ │ + b.n c2290 │ │ lsls r7, r2, #5 │ │ @ instruction: 0xea00a001 │ │ - b.n c2fb2 │ │ + b.n c2fc2 │ │ str r0, [r0, #4] │ │ - b.n c23b0 │ │ + b.n c23c0 │ │ stmia r0!, {r0, r2} │ │ - b.n c2bba │ │ + b.n c2bca │ │ lsls r0, r4, #7 │ │ and.w r0, r0, r5, lsr #3 │ │ - b.n c2c2a │ │ + b.n c2c3a │ │ asrs r0, r0, #4 │ │ - b.n c298e │ │ + b.n c299e │ │ asrs r4, r3, #32 │ │ - b.n c23ac │ │ + b.n c23bc │ │ movs r0, #186 @ 0xba │ │ - b.n c2c30 │ │ + b.n c2c40 │ │ movs r0, r4 │ │ - b.n c2eb6 │ │ + b.n c2ec6 │ │ lsls r6, r1, #1 │ │ subs r0, r0, r0 │ │ lsls r0, r6, #1 │ │ - b.n c2678 │ │ + b.n c2688 │ │ asrs r2, r0, #32 │ │ - b.n c2fde │ │ + b.n c2fee │ │ movs r0, #28 │ │ - b.n c2daa │ │ + b.n c2dba │ │ asrs r4, r5, #32 │ │ - b.n c23c0 │ │ + b.n c23d0 │ │ asrs r0, r6, #1 │ │ - b.n c2608 │ │ + b.n c2618 │ │ movs r0, #36 @ 0x24 │ │ - b.n c23c8 │ │ + b.n c23d8 │ │ lsls r1, r0, #4 │ │ - b.n c27d6 │ │ + b.n c27e6 │ │ asrs r1, r0, #2 │ │ - b.n c29be │ │ + b.n c29ce │ │ adds r7, #177 @ 0xb1 │ │ - b.n c2eca │ │ + b.n c2eda │ │ asrs r4, r7, #30 │ │ - b.n c2c60 │ │ + b.n c2c70 │ │ subs r7, #255 @ 0xff │ │ - b.n c2f60 │ │ + b.n c2f70 │ │ movs r0, #20 │ │ - b.n c2dc6 │ │ + b.n c2dd6 │ │ strh r4, [r2, #2] │ │ - b.n c23e4 │ │ + b.n c23f4 │ │ asrs r1, r0, #2 │ │ - b.n c29d2 │ │ + b.n c29e2 │ │ asrs r0, r6, #2 │ │ - b.n c2c74 │ │ + b.n c2c84 │ │ str r1, [r0, r0] │ │ - b.n c29da │ │ + b.n c29ea │ │ str r4, [r0, r1] │ │ - b.n c23f4 │ │ + b.n c2404 │ │ asrs r4, r0, #32 │ │ - b.n c2488 │ │ + b.n c2498 │ │ movs r1, r0 │ │ - b.n c2f04 │ │ + b.n c2f14 │ │ lsls r0, r3, #14 │ │ subs r0, r0, r0 │ │ asrs r0, r2, #32 │ │ - b.n c2412 │ │ + b.n c2422 │ │ strb r0, [r1, #0] │ │ - b.n c2df8 │ │ + b.n c2e08 │ │ stmia r0!, {} │ │ - b.n c241c │ │ + b.n c242c │ │ movs r0, #182 @ 0xb6 │ │ - b.n c2ca0 │ │ + b.n c2cb0 │ │ stmia r0!, {r2, r6} │ │ - b.n c2310 │ │ + b.n c2320 │ │ asrs r0, r0, #32 │ │ - b.n c24a0 │ │ - add r0, pc, #8 @ (adr r0, c2908 ) │ │ - b.n c2a10 │ │ - add r0, pc, #288 @ (adr r0, c2a24 ) │ │ - b.n c231c │ │ + b.n c24b0 │ │ + add r0, pc, #8 @ (adr r0, c2918 ) │ │ + b.n c2a20 │ │ + add r0, pc, #288 @ (adr r0, c2a34 ) │ │ + b.n c232c │ │ movs r4, r0 │ │ - b.n c2f2c │ │ + b.n c2f3c │ │ movs r0, r2 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n c24bc │ │ + b.n c24cc │ │ str r0, [r0, #4] │ │ - b.n c2450 │ │ + b.n c2460 │ │ movs r0, r0 │ │ - b.n c296a │ │ + b.n c297a │ │ movs r2, r0 │ │ - b.n c2f3e │ │ + b.n c2f4e │ │ lsls r3, r0, #16 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n c2452 │ │ + b.n c2462 │ │ movs r4, r1 │ │ - b.n c2bca │ │ + b.n c2bda │ │ lsls r1, r0, #2 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n c2c72 │ │ + b.n c2c82 │ │ asrs r0, r0, #32 │ │ - b.n c3076 │ │ - add r0, pc, #0 @ (adr r0, c2938 ) │ │ - b.n c307a │ │ + b.n c3086 │ │ + add r0, pc, #0 @ (adr r0, c2948 ) │ │ + b.n c308a │ │ lsls r4, r6, #25 │ │ @ instruction: 0xeb00e02c │ │ - b.n c247c │ │ + b.n c248c │ │ movs r0, r0 │ │ - b.n c3086 │ │ + b.n c3096 │ │ stmia r0!, {r3, r6} │ │ - b.n c2484 │ │ + b.n c2494 │ │ lsls r4, r0, #1 │ │ - b.n c2468 │ │ + b.n c2478 │ │ lsls r3, r5, #6 │ │ @ instruction: 0xea009080 │ │ - b.n c2488 │ │ + b.n c2498 │ │ movs r0, r2 │ │ - b.n c247a │ │ + b.n c248a │ │ str r0, [sp, #224] @ 0xe0 │ │ - b.n c2374 │ │ + b.n c2384 │ │ movs r0, r2 │ │ - b.n c2474 │ │ + b.n c2484 │ │ asrs r4, r0, #32 │ │ - b.n c2510 │ │ + b.n c2520 │ │ movs r4, r0 │ │ - b.n c2f8c │ │ + b.n c2f9c │ │ movs r3, r6 │ │ subs r0, r0, r0 │ │ lsls r4, r2, #1 │ │ - b.n c24ac │ │ + b.n c24bc │ │ lsls r1, r0, #28 │ │ - b.n c2f96 │ │ + b.n c2fa6 │ │ movs r7, r7 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n c24b8 │ │ + b.n c24c8 │ │ movs r0, r0 │ │ - b.n c24a2 │ │ + b.n c24b2 │ │ movs r4, r1 │ │ - b.n c2c26 │ │ + b.n c2c36 │ │ lsls r4, r0, #1 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #1 │ │ - b.n c24c8 │ │ + b.n c24d8 │ │ asrs r2, r1, #32 │ │ - b.n c2cd2 │ │ + b.n c2ce2 │ │ movs r0, #12 │ │ - b.n c2cd6 │ │ + b.n c2ce6 │ │ str r4, [r1, #0] │ │ - b.n c2cda │ │ + b.n c2cea │ │ movs r0, r0 │ │ - b.n c24be │ │ + b.n c24ce │ │ @ instruction: 0xfbd0ebff │ │ str r4, [r0, r1] │ │ - b.n c24e0 │ │ + b.n c24f0 │ │ stmia r0!, {r1, r2} │ │ - b.n c2cea │ │ + b.n c2cfa │ │ movs r0, r0 │ │ - b.n c304e │ │ + b.n c305e │ │ movs r2, r7 │ │ lsrs r0, r0, #8 │ │ strh r4, [r2, #2] │ │ - b.n c24f0 │ │ + b.n c2500 │ │ lsls r1, r6, #30 │ │ - b.n c2fca │ │ + b.n c2fda │ │ movs r0, #72 @ 0x48 │ │ - b.n c24f8 │ │ + b.n c2508 │ │ lsrs r7, r7, #31 │ │ - b.n c3060 │ │ + b.n c3070 │ │ str r0, [sp, #304] @ 0x130 │ │ - b.n c2500 │ │ + b.n c2510 │ │ movs r0, r4 │ │ - b.n c2ffa │ │ + b.n c300a │ │ lsls r4, r1, #12 │ │ lsrs r0, r0, #8 │ │ lsls r7, r1, #12 │ │ and.w r0, r0, r0, lsr #8 │ │ - b.n c24fe │ │ + b.n c250e │ │ str r0, [r2, #4] │ │ - b.n c2514 │ │ + b.n c2524 │ │ movs r0, #4 │ │ - b.n c2502 │ │ + b.n c2512 │ │ adds r0, #4 │ │ - b.n c250e │ │ + b.n c251e │ │ movs r2, r0 │ │ - b.n c2c8c │ │ + b.n c2c9c │ │ lsls r7, r2, #15 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #2 │ │ - b.n c2af6 │ │ + b.n c2b06 │ │ adds r0, #184 @ 0xb8 │ │ - b.n c2d94 │ │ + b.n c2da4 │ │ lsls r4, r7, #30 │ │ - b.n c2d96 │ │ + b.n c2da6 │ │ asrs r3, r2, #2 │ │ - b.n c2a3a │ │ + b.n c2a4a │ │ strb r4, [r2, #0] │ │ - b.n c2efe │ │ + b.n c2f0e │ │ asrs r0, r0, #32 │ │ - b.n c252e │ │ + b.n c253e │ │ movs r7, r0 │ │ - b.n c2d46 │ │ + b.n c2d56 │ │ str r6, [r0, r0] │ │ - b.n c2d4a │ │ - ldr r2, [pc, #436] @ (c2bc0 ) │ │ + b.n c2d5a │ │ + ldr r2, [pc, #200] @ (c2ae4 ) │ │ @ instruction: 0xfb0010d5 │ │ - b.n c2dba │ │ + b.n c2dca │ │ movs r0, #113 @ 0x71 │ │ - b.n c27f4 │ │ + b.n c2804 │ │ movs r0, r0 │ │ - b.n c30be │ │ + b.n c30ce │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ lsls r4, r7, #1 │ │ - b.n c2f2a │ │ + b.n c2f3a │ │ asrs r1, r0, #2 │ │ - b.n c2b26 │ │ + b.n c2b36 │ │ asrs r0, r6, #2 │ │ - b.n c2dcc │ │ + b.n c2ddc │ │ movs r0, r0 │ │ - b.n c30d0 │ │ + b.n c30e0 │ │ lsls r5, r1, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n c3176 │ │ - beq.n c2a70 │ │ - b.n c2ed0 │ │ + b.n c3186 │ │ + beq.n c2a80 │ │ + b.n c2ee0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1} │ │ - b.n c3064 │ │ + b.n c3074 │ │ movs r1, r6 │ │ subs r0, r0, r0 │ │ adds r0, #84 @ 0x54 │ │ - b.n c2584 │ │ + b.n c2594 │ │ asrs r0, r4, #32 │ │ - b.n c3154 │ │ + b.n c3164 │ │ lsls r0, r4, #1 │ │ - b.n c30f4 │ │ + b.n c3104 │ │ lsls r7, r1, #2 │ │ subs r0, r0, r0 │ │ asrs r4, r1, #32 │ │ - b.n c2582 │ │ + b.n c2592 │ │ movs r0, #24 │ │ - b.n c2586 │ │ + b.n c2596 │ │ strh r0, [r3, #30] │ │ - b.n c2de4 │ │ + b.n c2df4 │ │ movs r0, r2 │ │ - b.n c257a │ │ - add r0, pc, #112 @ (adr r0, c2ad8 ) │ │ - b.n c256e │ │ + b.n c258a │ │ + add r0, pc, #112 @ (adr r0, c2ae8 ) │ │ + b.n c257e │ │ strh r0, [r0, #0] │ │ - b.n c2582 │ │ + b.n c2592 │ │ strh r4, [r0, #0] │ │ - b.n c3178 │ │ + b.n c3188 │ │ str r0, [sp, #16] │ │ - b.n c258a │ │ + b.n c259a │ │ movs r6, r4 │ │ and.w r0, r0, r4, lsr #32 │ │ - b.n c25a6 │ │ + b.n c25b6 │ │ asrs r0, r1, #1 │ │ - b.n c2f18 │ │ + b.n c2f28 │ │ movs r0, #12 │ │ - b.n c25a6 │ │ + b.n c25b6 │ │ lsls r0, r1, #1 │ │ - b.n c25c4 │ │ + b.n c25d4 │ │ vrhadd.u d14, d2, d31 │ │ movs r1, r0 │ │ - b.n c3132 │ │ + b.n c3142 │ │ mcr2 10, 2, fp, cr6, cr15, {7} @ │ │ stmia r0!, {r2, r6} │ │ - b.n c24d0 │ │ + b.n c24e0 │ │ str r4, [r0, r1] │ │ - b.n c25d8 │ │ + b.n c25e8 │ │ lsls r4, r2, #1 │ │ - b.n c25dc │ │ + b.n c25ec │ │ str r0, [r0, #4] │ │ - b.n c25e0 │ │ + b.n c25f0 │ │ lsls r0, r0, #1 │ │ - b.n c30ca │ │ + b.n c30da │ │ movs r5, r3 │ │ subs r0, r0, r0 │ │ asrs r0, r1, #1 │ │ - b.n c24e8 │ │ + b.n c24f8 │ │ movs r4, r2 │ │ - b.n c2fc8 │ │ + b.n c2fd8 │ │ movs r0, #12 │ │ - b.n c2dfa │ │ + b.n c2e0a │ │ lsls r0, r0, #1 │ │ - b.n c24d4 │ │ + b.n c24e4 │ │ stmia r0!, {r2, r3, r4, r5} │ │ - b.n c24d8 │ │ + b.n c24e8 │ │ strb r4, [r1, #0] │ │ - b.n c2e06 │ │ - ldr r2, [pc, #248] @ (c2bc0 ) │ │ + b.n c2e16 │ │ + ldr r2, [pc, #12] @ (c2ae4 ) │ │ @ instruction: 0xfb00e042 │ │ - b.n c320e │ │ + b.n c321e │ │ movs r0, #7 │ │ - b.n c2e12 │ │ - b.n c2ae8 │ │ - b.n c25e8 │ │ + b.n c2e22 │ │ + b.n c2af8 │ │ + b.n c25f8 │ │ movs r0, r2 │ │ - b.n c2602 │ │ + b.n c2612 │ │ adds r0, #0 │ │ - b.n c260a │ │ + b.n c261a │ │ asrs r3, r0, #32 │ │ - b.n c2bf0 │ │ + b.n c2c00 │ │ movs r0, r0 │ │ - b.n c2686 │ │ + b.n c2696 │ │ str r4, [r2, #0] │ │ - b.n c2fec │ │ + b.n c2ffc │ │ str r4, [r6, #0] │ │ - b.n c2504 │ │ + b.n c2514 │ │ movs r0, r2 │ │ - b.n c3112 │ │ + b.n c3122 │ │ movs r7, r5 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n c2efe │ │ + b.n c2f0e │ │ asrs r1, r0, #32 │ │ - b.n c2f04 │ │ + b.n c2f14 │ │ movs r0, r0 │ │ - b.n c2c04 │ │ + b.n c2c14 │ │ str r4, [r1, r1] │ │ - b.n c2640 │ │ + b.n c2650 │ │ movs r4, r2 │ │ - b.n c320a │ │ + b.n c321a │ │ movs r0, r7 │ │ @ instruction: 0xea008054 │ │ - b.n c264c │ │ + b.n c265c │ │ strh r6, [r0, #0] │ │ - b.n c3226 │ │ + b.n c3236 │ │ movs r0, r0 │ │ - b.n c325a │ │ - add r0, pc, #0 @ (adr r0, c2b1c ) │ │ - b.n c325e │ │ + b.n c326a │ │ + add r0, pc, #0 @ (adr r0, c2b2c ) │ │ + b.n c326e │ │ movs r0, r6 │ │ - b.n c263c │ │ + b.n c264c │ │ lsls r7, r3, #7 │ │ @ instruction: 0xea008054 │ │ - b.n c2664 │ │ + b.n c2674 │ │ movs r0, r0 │ │ - b.n c265a │ │ + b.n c266a │ │ movs r4, r1 │ │ - b.n c2dd2 │ │ + b.n c2de2 │ │ vpmin.u , , │ │ lsrs r1, r0, #32 │ │ - b.n c316a │ │ + b.n c317a │ │ lsls r6, r6, #10 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n c26ea │ │ + b.n c26fa │ │ movs r1, r0 │ │ - b.n c3166 │ │ + b.n c3176 │ │ lsls r1, r7, #10 │ │ subs r0, r0, r0 │ │ asrs r0, r1, #1 │ │ - b.n c2688 │ │ + b.n c2698 │ │ movs r0, #12 │ │ - b.n c2e92 │ │ + b.n c2ea2 │ │ lsls r0, r1, #1 │ │ - b.n c258c │ │ + b.n c259c │ │ asrs r0, r0, #32 │ │ - b.n c267c │ │ - ldr r2, [pc, #100] @ (c2bc0 ) │ │ + b.n c268c │ │ + ldr r1, [pc, #888] @ (c2ee4 ) │ │ mla r0, r0, r0, r0 │ │ - b.n c32a2 │ │ - beq.n c2b9c │ │ - b.n c2ffc │ │ + b.n c32b2 │ │ + beq.n c2bac │ │ + b.n c300c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, ip, sp, lr} │ │ - b.n c2ff2 │ │ + b.n c3002 │ │ strb r5, [r0, #0] │ │ - b.n c26fa │ │ + b.n c270a │ │ lsls r7, r7, #3 │ │ - b.n c31a4 │ │ + b.n c31b4 │ │ lsls r2, r2, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, #2 │ │ - b.n c3002 │ │ + b.n c3012 │ │ adds r0, #2 │ │ - b.n c32c2 │ │ + b.n c32d2 │ │ str r2, [r6, #4] │ │ - b.n c294c │ │ + b.n c295c │ │ movs r0, #1 │ │ - b.n c32ca │ │ + b.n c32da │ │ adds r0, #119 @ 0x77 │ │ - b.n c28ec │ │ + b.n c28fc │ │ adds r0, #131 @ 0x83 │ │ - b.n c2c92 │ │ + b.n c2ca2 │ │ adds r0, #176 @ 0xb0 │ │ - b.n c2f3c │ │ + b.n c2f4c │ │ movs r0, r0 │ │ - b.n c3240 │ │ + b.n c3250 │ │ lsls r4, r1, #1 │ │ subs r0, r0, r0 │ │ strb r1, [r0, #0] │ │ - b.n c3030 │ │ + b.n c3040 │ │ movs r0, #1 │ │ - b.n c30aa │ │ + b.n c30ba │ │ lsls r7, r7, #3 │ │ - b.n c31d8 │ │ + b.n c31e8 │ │ strb r5, [r0, #0] │ │ - b.n c2736 │ │ + b.n c2746 │ │ @ instruction: 0xfff51aff │ │ lsls r4, r0, #1 │ │ and.w r0, r0, r2, asr #1 │ │ - b.n c32fa │ │ + b.n c330a │ │ adds r0, #184 @ 0xb8 │ │ - b.n c2f50 │ │ + b.n c2f60 │ │ lsls r2, r7, #2 │ │ - b.n c2f54 │ │ + b.n c2f64 │ │ lsls r5, r2, #3 │ │ - b.n c2f6e │ │ + b.n c2f7e │ │ asrs r4, r4, #32 │ │ - b.n c2704 │ │ + b.n c2714 │ │ str r4, [r1, r1] │ │ - b.n c2708 │ │ + b.n c2718 │ │ lsls r0, r0, #4 │ │ - b.n c2af4 │ │ + b.n c2b04 │ │ asrs r4, r7, #2 │ │ - b.n c2f76 │ │ + b.n c2f86 │ │ lsls r6, r7, #2 │ │ - b.n c2f7a │ │ + b.n c2f8a │ │ asrs r1, r0, #32 │ │ - b.n c2c62 │ │ + b.n c2c72 │ │ movs r0, #6 │ │ - b.n c2f22 │ │ + b.n c2f32 │ │ asrs r0, r0, #32 │ │ - b.n c2ce8 │ │ + b.n c2cf8 │ │ movs r5, r0 │ │ - b.n c2f2a │ │ + b.n c2f3a │ │ lsls r1, r6, #21 │ │ @ instruction: 0xeb00e062 │ │ - b.n c3332 │ │ + b.n c3342 │ │ movs r0, #6 │ │ - b.n c2cf6 │ │ + b.n c2d06 │ │ movs r0, #52 @ 0x34 │ │ - b.n c2610 │ │ + b.n c2620 │ │ movs r4, r2 │ │ - b.n c3082 │ │ + b.n c3092 │ │ lsls r6, r7, #2 │ │ - b.n c2f94 │ │ + b.n c2fa4 │ │ movs r0, #68 @ 0x44 │ │ - b.n c261c │ │ + b.n c262c │ │ strh r0, [r0, #0] │ │ - b.n c334a │ │ + b.n c335a │ │ strb r0, [r6, r6] │ │ - b.n c2fb8 │ │ - add r0, pc, #36 @ (adr r0, c2c34 ) │ │ - b.n c2f52 │ │ + b.n c2fc8 │ │ + add r0, pc, #36 @ (adr r0, c2c44 ) │ │ + b.n c2f62 │ │ movs r0, #48 @ 0x30 │ │ - b.n c2730 │ │ + b.n c2740 │ │ stmia r0!, {} │ │ - b.n c335a │ │ + b.n c336a │ │ movs r5, r0 │ │ - b.n c2ec2 │ │ + b.n c2ed2 │ │ lsls r2, r5, #1 │ │ ldrh r0, [r0, #16] │ │ lsls r4, r0, #1 │ │ - b.n c2760 │ │ + b.n c2770 │ │ strb r4, [r1, #1] │ │ - b.n c2764 │ │ + b.n c2774 │ │ lsls r6, r6, #2 │ │ - b.n c2fce │ │ + b.n c2fde │ │ adds r4, #188 @ 0xbc │ │ - b.n c2fe0 │ │ + b.n c2ff0 │ │ asrs r1, r0, #32 │ │ - b.n c3136 │ │ + b.n c3146 │ │ movs r2, r0 │ │ - b.n c2d3c │ │ + b.n c2d4c │ │ movs r1, r0 │ │ - b.n c33be │ │ + b.n c33ce │ │ movs r0, r1 │ │ - b.n c3142 │ │ + b.n c3152 │ │ movs r3, r0 │ │ - b.n c2ee6 │ │ + b.n c2ef6 │ │ lsls r0, r4, #1 │ │ ldrh r0, [r0, #16] │ │ movs r5, #178 @ 0xb2 │ │ - b.n c2ffc │ │ + b.n c300c │ │ movs r0, r0 │ │ - b.n c32f6 │ │ + b.n c3306 │ │ lsls r5, r0, #1 │ │ lsrs r0, r0, #8 │ │ adds r0, #213 @ 0xd5 │ │ - b.n c3002 │ │ + b.n c3012 │ │ movs r2, r0 │ │ - b.n c2d5e │ │ + b.n c2d6e │ │ strb r4, [r4, #0] │ │ - b.n c279c │ │ + b.n c27ac │ │ adds r1, #3 │ │ - b.n c2b94 │ │ + b.n c2ba4 │ │ strb r4, [r7, #2] │ │ - b.n c3010 │ │ + b.n c3020 │ │ adds r0, #190 @ 0xbe │ │ - b.n c3014 │ │ + b.n c3024 │ │ adds r0, #7 │ │ - b.n c2cf8 │ │ + b.n c2d08 │ │ strb r0, [r6, #0] │ │ - b.n c27b0 │ │ + b.n c27c0 │ │ asrs r1, r0, #32 │ │ - b.n c2d88 │ │ + b.n c2d98 │ │ asrs r1, r0, #32 │ │ - b.n c3400 │ │ + b.n c3410 │ │ asrs r1, r0, #32 │ │ - b.n c2d88 │ │ + b.n c2d98 │ │ asrs r0, r1, #32 │ │ - b.n c3188 │ │ + b.n c3198 │ │ movs r0, r0 │ │ - b.n c2f2c │ │ + b.n c2f3c │ │ movs r0, r0 │ │ - b.n c33ce │ │ + b.n c33de │ │ lsls r6, r1, #1 │ │ subs r2, #0 │ │ lsls r7, r3, #2 │ │ @ instruction: 0xea00e0ba │ │ - b.n c304e │ │ + b.n c305e │ │ movs r0, r4 │ │ - b.n c32da │ │ + b.n c32ea │ │ movs r7, r3 │ │ subs r0, r0, r0 │ │ movs r0, #72 @ 0x48 │ │ - b.n c27e0 │ │ + b.n c27f0 │ │ asrs r1, r0, #32 │ │ - b.n c33ea │ │ + b.n c33fa │ │ movs r0, r0 │ │ - b.n c3352 │ │ + b.n c3362 │ │ asrs r0, r0, #1 │ │ asrs r5, r3, #22 │ │ asrs r0, r0, #32 │ │ asrs r1, r2, #22 │ │ asrs r1, r0, #32 │ │ asrs r1, r0, #10 │ │ asrs r1, r0, #32 │ │ - b.n c3440 │ │ + b.n c3450 │ │ asrs r2, r1, #32 │ │ - b.n c31c4 │ │ + b.n c31d4 │ │ movs r7, r2 │ │ and.w r0, r0, r1, lsl #24 │ │ - b.n c340a │ │ + b.n c341a │ │ strb r0, [r0, #0] │ │ - b.n c340e │ │ + b.n c341e │ │ movs r0, r0 │ │ and.w r0, r0, r2, lsl #24 │ │ - b.n c3016 │ │ + b.n c3026 │ │ movs r0, #119 @ 0x77 │ │ - b.n c2a38 │ │ + b.n c2a48 │ │ asrs r5, r0, #32 │ │ - b.n c301e │ │ + b.n c302e │ │ lsls r2, r0, #2 │ │ - b.n c2de2 │ │ + b.n c2df2 │ │ lsls r0, r6, #2 │ │ - b.n c3086 │ │ + b.n c3096 │ │ movs r0, r0 │ │ - b.n c338a │ │ + b.n c339a │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n c3032 │ │ + b.n c3042 │ │ lsls r1, r5, #19 │ │ add.w r0, r0, r5, lsl #4 │ │ - b.n c28a2 │ │ + b.n c28b2 │ │ movs r0, r0 │ │ - b.n c339e │ │ + b.n c33ae │ │ asrs r6, r0, #32 │ │ - b.n c2e04 │ │ + b.n c2e14 │ │ asrs r5, r0, #32 │ │ - b.n c288e │ │ + b.n c289e │ │ lsls r1, r0, #9 │ │ subs r0, r0, r0 │ │ vpmin.u8 q15, q12, │ │ movs r6, r0 │ │ - b.n c2e20 │ │ + b.n c2e30 │ │ movs r5, r0 │ │ - b.n c289e │ │ + b.n c28ae │ │ movs r0, r0 │ │ - b.n c345a │ │ - beq.n c2d54 │ │ - b.n c31b4 │ │ + b.n c346a │ │ + beq.n c2d64 │ │ + b.n c31c4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r4, r5, r7, ip} │ │ - b.n c30da │ │ + b.n c30ea │ │ movs r0, #188 @ 0xbc │ │ - b.n c30de │ │ + b.n c30ee │ │ adds r0, #190 @ 0xbe │ │ - b.n c30e2 │ │ + b.n c30f2 │ │ movs r0, #2 │ │ - b.n c2db8 │ │ + b.n c2dc8 │ │ adds r0, #84 @ 0x54 │ │ - b.n c2870 │ │ + b.n c2880 │ │ movs r1, r0 │ │ - b.n c2fde │ │ + b.n c2fee │ │ vpmin.u8 q9, , │ │ lsls r4, r1, #1 │ │ - b.n c287c │ │ + b.n c288c │ │ stmia r0!, {r4, r5} │ │ - b.n c2860 │ │ + b.n c2870 │ │ strb r0, [r6, r6] │ │ - b.n c30ea │ │ + b.n c30fa │ │ movs r1, r0 │ │ - b.n c3150 │ │ + b.n c3160 │ │ strh r1, [r0, #0] │ │ - b.n c2e52 │ │ + b.n c2e62 │ │ movs r0, #12 │ │ - b.n c2e66 │ │ + b.n c2e76 │ │ stmia r0!, {} │ │ - b.n c349a │ │ + b.n c34aa │ │ movs r5, r0 │ │ - b.n c3002 │ │ + b.n c3012 │ │ movs r0, #52 @ 0x34 │ │ - b.n c2778 │ │ + b.n c2788 │ │ movs r3, r0 │ │ ldr r2, [sp, #0] │ │ - b.n c2dc0 │ │ - b.n c28a4 │ │ + b.n c2dd0 │ │ + b.n c28b4 │ │ movs r7, r2 │ │ and.w r0, r0, r0 │ │ - b.n c34b2 │ │ + b.n c34c2 │ │ lsls r7, r4, #1 │ │ and.w r0, r0, r0, asr #32 │ │ - b.n c33b6 │ │ + b.n c33c6 │ │ movs r7, r1 │ │ lsrs r0, r0, #8 │ │ lsls r5, r2, #3 │ │ - b.n c312a │ │ + b.n c313a │ │ str r6, [r1, #0] │ │ - b.n c30c6 │ │ + b.n c30d6 │ │ asrs r4, r4, #32 │ │ - b.n c28c4 │ │ + b.n c28d4 │ │ adds r0, #64 @ 0x40 │ │ - b.n c28c8 │ │ + b.n c28d8 │ │ strb r0, [r6, #0] │ │ - b.n c28cc │ │ + b.n c28dc │ │ lsls r0, r0, #4 │ │ - b.n c2cb8 │ │ + b.n c2cc8 │ │ adds r0, #0 │ │ - b.n c28c0 │ │ + b.n c28d0 │ │ asrs r4, r7, #2 │ │ - b.n c313e │ │ + b.n c314e │ │ lsls r6, r7, #2 │ │ - b.n c3142 │ │ + b.n c3152 │ │ asrs r1, r0, #32 │ │ - b.n c2e34 │ │ + b.n c2e44 │ │ asrs r0, r0, #32 │ │ - b.n c2eac │ │ + b.n c2ebc │ │ lsls r4, r1, #1 │ │ - b.n c28e8 │ │ + b.n c28f8 │ │ lsls r0, r0, #20 │ │ @ instruction: 0xeb008008 │ │ - b.n c2eb6 │ │ - b.n c2dc4 │ │ - b.n c30fa │ │ + b.n c2ec6 │ │ + b.n c2dd4 │ │ + b.n c310a │ │ movs r0, #7 │ │ - b.n c2ece │ │ + b.n c2ede │ │ movs r0, #52 @ 0x34 │ │ - b.n c27d8 │ │ + b.n c27e8 │ │ stmia r0!, {} │ │ - b.n c3506 │ │ + b.n c3516 │ │ movs r5, r0 │ │ - b.n c306e │ │ + b.n c307e │ │ @ instruction: 0xff949aff │ │ movs r0, r2 │ │ - b.n c28fa │ │ + b.n c290a │ │ adds r0, #2 │ │ - b.n c3516 │ │ + b.n c3526 │ │ strb r0, [r1, #0] │ │ - b.n c351a │ │ + b.n c352a │ │ asrs r0, r0, #32 │ │ - b.n c351e │ │ + b.n c352e │ │ str r4, [r1, r0] │ │ - b.n c290a │ │ + b.n c291a │ │ movs r0, #176 @ 0xb0 │ │ - b.n c3186 │ │ + b.n c3196 │ │ asrs r4, r5, #1 │ │ - b.n c2904 │ │ + b.n c2914 │ │ adds r2, #162 @ 0xa2 │ │ - b.n c2df4 │ │ + b.n c2e04 │ │ strb r2, [r4, #4] │ │ - b.n c2e00 │ │ + b.n c2e10 │ │ movs r0, #16 │ │ - b.n c31fa │ │ + b.n c320a │ │ movs r0, #2 │ │ - b.n c3108 │ │ + b.n c3118 │ │ movs r0, #3 │ │ - b.n c3102 │ │ + b.n c3112 │ │ movs r6, #184 @ 0xb8 │ │ - b.n c319c │ │ + b.n c31ac │ │ movs r0, r0 │ │ - b.n c29a6 │ │ + b.n c29b6 │ │ cmp r7, #191 @ 0xbf │ │ - b.n c3428 │ │ - b.n c2e10 │ │ - b.n c2e2a │ │ + b.n c3438 │ │ + b.n c2e20 │ │ + b.n c2e3a │ │ adds r0, #60 @ 0x3c │ │ - b.n c294c │ │ + b.n c295c │ │ movs r0, r2 │ │ - b.n c3436 │ │ + b.n c3446 │ │ lsls r0, r7, #2 │ │ asrs r2, r3, #7 │ │ - b.n c2e5c │ │ + b.n c2e6c │ │ asrs r6, r1, #14 │ │ lsls r4, r5, #1 │ │ asrs r5, r1, #22 │ │ movs r1, r0 │ │ - b.n c3566 │ │ + b.n c3576 │ │ asrs r4, r7, #1 │ │ - b.n c2944 │ │ + b.n c2954 │ │ lsls r0, r7, #1 │ │ - b.n c2948 │ │ + b.n c2958 │ │ lsls r2, r7, #26 │ │ - b.n c31cc │ │ + b.n c31dc │ │ asrs r4, r6, #1 │ │ - b.n c2950 │ │ + b.n c2960 │ │ movs r0, #188 @ 0xbc │ │ - b.n c31ee │ │ + b.n c31fe │ │ lsls r0, r1, #9 │ │ - b.n c2968 │ │ + b.n c2978 │ │ movs r0, #162 @ 0xa2 │ │ - b.n c3182 │ │ + b.n c3192 │ │ movs r0, r0 │ │ - b.n c34e6 │ │ + b.n c34f6 │ │ movs r0, #8 │ │ - b.n c2950 │ │ + b.n c2960 │ │ asrs r4, r1, #32 │ │ - b.n c2954 │ │ + b.n c2964 │ │ asrs r0, r6, #32 │ │ - b.n c3592 │ │ + b.n c35a2 │ │ asrs r4, r6, #32 │ │ - b.n c286c │ │ + b.n c287c │ │ asrs r0, r5, #1 │ │ - b.n c3374 │ │ + b.n c3384 │ │ asrs r0, r7, #32 │ │ - b.n c2874 │ │ + b.n c2884 │ │ lsls r3, r0, #10 │ │ lsrs r0, r0, #8 │ │ asrs r0, r5, #32 │ │ - b.n c2990 │ │ + b.n c29a0 │ │ movs r2, #52 @ 0x34 │ │ - b.n c2994 │ │ + b.n c29a4 │ │ movs r1, r0 │ │ - b.n c3112 │ │ + b.n c3122 │ │ lsls r6, r6, #9 │ │ ldrh r0, [r0, #16] │ │ asrs r4, r1, #9 │ │ - b.n c29a0 │ │ + b.n c29b0 │ │ strh r0, [r3, #30] │ │ - b.n c3204 │ │ + b.n c3214 │ │ asrs r1, r0, #32 │ │ - b.n c3300 │ │ + b.n c3310 │ │ movs r0, #20 │ │ - b.n c29a2 │ │ + b.n c29b2 │ │ asrs r4, r1, #9 │ │ - b.n c2990 │ │ + b.n c29a0 │ │ asrs r0, r0, #32 │ │ - b.n c35ca │ │ + b.n c35da │ │ movs r2, #72 @ 0x48 │ │ - b.n c2998 │ │ + b.n c29a8 │ │ str r0, [sp, #16] │ │ - b.n c2992 │ │ + b.n c29a2 │ │ strh r0, [r0, #0] │ │ - b.n c2996 │ │ + b.n c29a6 │ │ asrs r4, r4, #1 │ │ - b.n c29b4 │ │ + b.n c29c4 │ │ lsls r0, r4, #1 │ │ - b.n c29b8 │ │ + b.n c29c8 │ │ adds r0, #76 @ 0x4c │ │ - b.n c29dc │ │ + b.n c29ec │ │ lsls r4, r4, #1 │ │ - b.n c29e0 │ │ + b.n c29f0 │ │ movs r0, #84 @ 0x54 │ │ - b.n c29e4 │ │ + b.n c29f4 │ │ movs r0, r0 │ │ - b.n c354e │ │ + b.n c355e │ │ lsls r7, r2, #7 │ │ subs r0, r0, r0 │ │ lsls r4, r3, #3 │ │ - b.n c323e │ │ + b.n c324e │ │ str r2, [r0, r0] │ │ - b.n c31fa │ │ + b.n c320a │ │ movs r0, #16 │ │ - b.n c29e0 │ │ + b.n c29f0 │ │ str r4, [r0, #0] │ │ - b.n c3202 │ │ + b.n c3212 │ │ adds r0, #8 │ │ - b.n c29ec │ │ + b.n c29fc │ │ str r6, [r0, r0] │ │ - b.n c35d4 │ │ + b.n c35e4 │ │ movs r0, #1 │ │ - b.n c33d2 │ │ + b.n c33e2 │ │ strb r4, [r6, #0] │ │ - b.n c29f2 │ │ + b.n c2a02 │ │ movs r0, r6 │ │ - b.n c29f6 │ │ + b.n c2a06 │ │ movs r0, #16 │ │ - b.n c29dc │ │ + b.n c29ec │ │ asrs r0, r0, #32 │ │ - b.n c361e │ │ + b.n c362e │ │ movs r0, #60 @ 0x3c │ │ - b.n c2a1c │ │ + b.n c2a2c │ │ str r0, [sp, #384] @ 0x180 │ │ - b.n c2a20 │ │ + b.n c2a30 │ │ eors r4, r0 │ │ - b.n c2920 │ │ + b.n c2930 │ │ movs r0, r2 │ │ - b.n c29f2 │ │ + b.n c2a02 │ │ asrs r0, r0, #32 │ │ - b.n c29f6 │ │ + b.n c2a06 │ │ strh r4, [r0, #0] │ │ - b.n c2f7c │ │ + b.n c2f8c │ │ asrs r4, r0, #32 │ │ - b.n c29fe │ │ + b.n c2a0e │ │ strb r4, [r2, #0] │ │ - b.n c2a02 │ │ + b.n c2a12 │ │ movs r0, r2 │ │ - b.n c2a34 │ │ + b.n c2a44 │ │ lsls r0, r6, #1 │ │ - b.n c2a20 │ │ + b.n c2a30 │ │ movs r1, r1 │ │ - b.n c324a │ │ + b.n c325a │ │ ands r0, r6 │ │ - b.n c2a28 │ │ + b.n c2a38 │ │ ands r6, r0 │ │ - b.n c3252 │ │ + b.n c3262 │ │ str r4, [r2, r1] │ │ - b.n c2a30 │ │ + b.n c2a40 │ │ movs r2, r1 │ │ - b.n c31cc │ │ + b.n c31dc │ │ lsls r4, r0, #1 │ │ - b.n c2a38 │ │ + b.n c2a48 │ │ movs r3, r5 │ │ lsrs r0, r0, #8 │ │ movs r4, r1 │ │ - b.n c2a4e │ │ + b.n c2a5e │ │ strb r4, [r2, #0] │ │ - b.n c343c │ │ - b.n c30a0 │ │ - b.n c32c0 │ │ + b.n c344c │ │ + b.n c30b0 │ │ + b.n c32d0 │ │ str r4, [r2, r0] │ │ - b.n c3446 │ │ + b.n c3456 │ │ asrs r0, r7, #2 │ │ - b.n c32ea │ │ + b.n c32fa │ │ str r6, [r1, #0] │ │ - b.n c327a │ │ + b.n c328a │ │ adds r0, #60 @ 0x3c │ │ - b.n c2a5e │ │ + b.n c2a6e │ │ movs r0, r4 │ │ - b.n c357e │ │ + b.n c358e │ │ movs r0, r7 │ │ - b.n c2a66 │ │ + b.n c2a76 │ │ asrs r0, r7, #2 │ │ - b.n c32dc │ │ + b.n c32ec │ │ adds r0, #4 │ │ - b.n c2a60 │ │ + b.n c2a70 │ │ movs r0, r0 │ │ - b.n c2a64 │ │ + b.n c2a74 │ │ lsls r4, r7, #2 │ │ - b.n c330a │ │ + b.n c331a │ │ lsls r4, r7, #2 │ │ - b.n c32ec │ │ + b.n c32fc │ │ lsls r6, r7, #2 │ │ - b.n c3312 │ │ + b.n c3322 │ │ stmia r0!, {r2, r3, r5} │ │ - b.n c2a7c │ │ + b.n c2a8c │ │ movs r0, r1 │ │ - b.n c3066 │ │ + b.n c3076 │ │ lsls r6, r7, #2 │ │ - b.n c32fc │ │ + b.n c330c │ │ lsls r3, r4, #9 │ │ subs r0, r0, r0 │ │ movs r0, #190 @ 0xbe │ │ - b.n c3326 │ │ + b.n c3336 │ │ lsls r0, r6, #1 │ │ - b.n c2d64 │ │ + b.n c2d74 │ │ adds r0, #48 @ 0x30 │ │ - b.n c2ab4 │ │ + b.n c2ac4 │ │ asrs r2, r0, #32 │ │ - b.n c3088 │ │ + b.n c3098 │ │ movs r0, #2 │ │ - b.n c3008 │ │ + b.n c3018 │ │ movs r0, #20 │ │ - b.n c340a │ │ - ldr r1, [pc, #56] @ (c2fc0 ) │ │ + b.n c341a │ │ + ldr r0, [pc, #844] @ (c32e4 ) │ │ @ instruction: 0xfb0000bc │ │ - b.n c3342 │ │ + b.n c3352 │ │ asrs r5, r0, #32 │ │ - b.n c32d2 │ │ + b.n c32e2 │ │ movs r0, #1 │ │ - b.n c3716 │ │ + b.n c3726 │ │ movs r7, r0 │ │ - b.n c32da │ │ - ldr r1, [pc, #36] @ (c2fc0 ) │ │ + b.n c32ea │ │ + ldr r0, [pc, #824] @ (c32e4 ) │ │ @ instruction: 0xfb0000bc │ │ - b.n c3356 │ │ - b.n c2fb0 │ │ - b.n c32e6 │ │ + b.n c3366 │ │ + b.n c2fc0 │ │ + b.n c32f6 │ │ stmia r0!, {r2, r3, r5} │ │ - b.n c2ae4 │ │ + b.n c2af4 │ │ movs r2, r0 │ │ - b.n c364e │ │ + b.n c365e │ │ movs r7, r0 │ │ subs r2, #0 │ │ movs r0, r0 │ │ - b.n c36f6 │ │ + b.n c3706 │ │ asrs r0, r6, #2 │ │ - b.n c3368 │ │ + b.n c3378 │ │ movs r1, r0 │ │ - b.n c34be │ │ + b.n c34ce │ │ asrs r0, r1, #32 │ │ - b.n c30c4 │ │ + b.n c30d4 │ │ asrs r2, r6, #2 │ │ - b.n c3154 │ │ + b.n c3164 │ │ asrs r4, r7, #2 │ │ - b.n c337e │ │ + b.n c338e │ │ lsls r1, r4, #2 │ │ - b.n c326e │ │ + b.n c327e │ │ @ instruction: 0xfff83aff │ │ - add r0, pc, #48 @ (adr r0, c3004 ) │ │ - b.n c3316 │ │ + add r0, pc, #48 @ (adr r0, c3014 ) │ │ + b.n c3326 │ │ movs r0, r0 │ │ - b.n c3692 │ │ + b.n c36a2 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n c3322 │ │ + b.n c3332 │ │ asrs r0, r0, #32 │ │ - b.n c3726 │ │ + b.n c3736 │ │ str r6, [r1, r0] │ │ - b.n c332a │ │ + b.n c333a │ │ lsls r0, r1, #19 │ │ @ instruction: 0xeb00e005 │ │ - b.n c3332 │ │ + b.n c3342 │ │ strh r4, [r2, #2] │ │ - b.n c2b30 │ │ + b.n c2b40 │ │ stmia r0!, {r3, r4, r5} │ │ - b.n c3490 │ │ + b.n c34a0 │ │ str r4, [r6, #0] │ │ - b.n c2b38 │ │ + b.n c2b48 │ │ strh r4, [r0, #0] │ │ - b.n c3712 │ │ + b.n c3722 │ │ lsls r5, r2, #3 │ │ - b.n c33ae │ │ + b.n c33be │ │ strb r4, [r3, #0] │ │ - b.n c3512 │ │ + b.n c3522 │ │ movs r0, #6 │ │ - b.n c360e │ │ + b.n c361e │ │ str r0, [sp, #320] @ 0x140 │ │ - b.n c2b4c │ │ + b.n c2b5c │ │ movs r0, #3 │ │ - b.n c3696 │ │ + b.n c36a6 │ │ asrs r0, r0, #4 │ │ - b.n c2f48 │ │ + b.n c2f58 │ │ movs r0, #2 │ │ - b.n c302e │ │ + b.n c303e │ │ adds r0, #186 @ 0xba │ │ - b.n c33c4 │ │ + b.n c33d4 │ │ movs r0, r4 │ │ - b.n c364c │ │ + b.n c365c │ │ movs r2, r4 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n c36e0 │ │ + b.n c36f0 │ │ str r1, [r0, r0] │ │ - b.n c3772 │ │ + b.n c3782 │ │ adds r0, #4 │ │ asrs r1, r3, #22 │ │ strh r4, [r2, #2] │ │ - b.n c2b54 │ │ + b.n c2b64 │ │ str r1, [r0, r0] │ │ asrs r3, r0, #10 │ │ adds r0, #0 │ │ - b.n c3782 │ │ + b.n c3792 │ │ movs r0, r0 │ │ - b.n c36fe │ │ - b.n c30a8 │ │ - b.n c2b64 │ │ + b.n c370e │ │ + b.n c30b8 │ │ + b.n c2b74 │ │ adds r0, #0 │ │ asrs r6, r2, #22 │ │ str r4, [r1, #4] │ │ - b.n c2b8c │ │ + b.n c2b9c │ │ adds r0, #5 │ │ - b.n c315c │ │ + b.n c316c │ │ adds r0, #1 │ │ - b.n c37e0 │ │ + b.n c37f0 │ │ strb r4, [r7, r2] │ │ - b.n c340a │ │ + b.n c341a │ │ str r0, [r1, #0] │ │ - b.n c3568 │ │ + b.n c3578 │ │ movs r5, r0 │ │ - b.n c3312 │ │ + b.n c3322 │ │ adds r0, #4 │ │ strh r1, [r3, #44] @ 0x2c │ │ adds r0, #1 │ │ strh r3, [r0, #20] │ │ adds r0, #1 │ │ strh r3, [r0, #30] │ │ str r4, [r1, #0] │ │ strh r3, [r0, #20] │ │ adds r0, #188 @ 0xbc │ │ - b.n c341c │ │ + b.n c342c │ │ asrs r6, r7, #2 │ │ - b.n c3420 │ │ + b.n c3430 │ │ asrs r3, r0, #32 │ │ - b.n c3104 │ │ + b.n c3114 │ │ adds r0, #2 │ │ - b.n c3592 │ │ + b.n c35a2 │ │ movs r3, r0 │ │ - b.n c332c │ │ + b.n c333c │ │ movs r1, r2 │ │ subs r2, #0 │ │ lsls r0, r0, #2 │ │ - b.n c319a │ │ + b.n c31aa │ │ adds r0, #12 │ │ - b.n c33d6 │ │ + b.n c33e6 │ │ asrs r4, r7, #30 │ │ - b.n c343a │ │ + b.n c344a │ │ movs r4, r0 │ │ - b.n c33de │ │ + b.n c33ee │ │ movs r0, #0 │ │ - b.n c2bbc │ │ + b.n c2bcc │ │ movs r0, #9 │ │ - b.n c33e6 │ │ + b.n c33f6 │ │ lsrs r7, r4, #18 │ │ add.w r0, r0, r0 │ │ - b.n c374e │ │ + b.n c375e │ │ movs r5, r5 │ │ lsrs r0, r0, #8 │ │ lsls r2, r6, #8 │ │ @ instruction: 0xea00e030 │ │ - b.n c2bd4 │ │ - b.n c3234 │ │ - b.n c3460 │ │ + b.n c2be4 │ │ + b.n c3244 │ │ + b.n c3470 │ │ str r6, [r7, #8] │ │ - b.n c3464 │ │ + b.n c3474 │ │ adds r0, #4 │ │ - b.n c2bf8 │ │ + b.n c2c08 │ │ str r6, [r1, r0] │ │ - b.n c3156 │ │ + b.n c3166 │ │ strh r4, [r2, #2] │ │ - b.n c2be8 │ │ + b.n c2bf8 │ │ movs r3, r0 │ │ - b.n c337c │ │ + b.n c338c │ │ movs r2, r1 │ │ cmp r2, #0 │ │ movs r0, r0 │ │ - b.n c378e │ │ + b.n c379e │ │ movs r4, r0 │ │ - b.n c341e │ │ + b.n c342e │ │ movs r7, #1 │ │ lsls r2, r0, #14 │ │ movs r0, #0 │ │ - b.n c2c00 │ │ + b.n c2c10 │ │ asrs r1, r1, #32 │ │ - b.n c342a │ │ + b.n c343a │ │ movs r0, #12 │ │ - b.n c342e │ │ + b.n c343e │ │ adds r0, #0 │ │ - b.n c38b2 │ │ + b.n c38c2 │ │ lsls r5, r2, #19 │ │ add.w r0, r0, r0 │ │ - b.n c379a │ │ + b.n c37aa │ │ lsls r4, r2, #1 │ │ lsrs r0, r0, #8 │ │ lsls r7, r3, #8 │ │ and.w r0, r0, r0, lsr #8 │ │ - b.n c2c2e │ │ + b.n c2c3e │ │ strh r4, [r0, #0] │ │ - b.n c2c2e │ │ + b.n c2c3e │ │ movs r0, #8 │ │ - b.n c319a │ │ + b.n c31aa │ │ adds r0, #2 │ │ - b.n c3616 │ │ + b.n c3626 │ │ movs r0, #2 │ │ - b.n c3632 │ │ + b.n c3642 │ │ movs r3, r0 │ │ - b.n c33be │ │ + b.n c33ce │ │ lsls r7, r1, #8 │ │ ldmia r2!, {} │ │ lsls r0, r0, #2 │ │ - b.n c322a │ │ + b.n c323a │ │ str r0, [r7, #8] │ │ - b.n c34c8 │ │ + b.n c34d8 │ │ lsls r4, r7, #30 │ │ - b.n c34ca │ │ + b.n c34da │ │ adds r0, #190 @ 0xbe │ │ - b.n c34b0 │ │ + b.n c34c0 │ │ lsls r6, r5, #2 │ │ - b.n c33d2 │ │ + b.n c33e2 │ │ movs r0, #188 @ 0xbc │ │ - b.n c34b8 │ │ + b.n c34c8 │ │ asrs r6, r2, #2 │ │ - b.n c3186 │ │ + b.n c3196 │ │ str r4, [r2, #0] │ │ - b.n c364a │ │ + b.n c365a │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ asrs r6, r5, #2 │ │ - b.n c3486 │ │ + b.n c3496 │ │ movs r0, r0 │ │ - b.n c31cc │ │ + b.n c31dc │ │ asrs r6, r0, #32 │ │ - b.n c348e │ │ + b.n c349e │ │ lsrs r0, r2, #2 │ │ - b.n c3156 │ │ + b.n c3166 │ │ movs r0, r1 │ │ - b.n c3262 │ │ - ldr r0, [pc, #172] @ (c3204 ) │ │ + b.n c3272 │ │ + ldr r0, [pc, #428] @ (c3314 ) │ │ mla r0, r0, r0, r1 │ │ - b.n c2c90 │ │ + b.n c2ca0 │ │ movs r6, r0 │ │ - b.n c34a2 │ │ + b.n c34b2 │ │ movs r0, #8 │ │ - b.n c34a6 │ │ - ldr r0, [pc, #600] @ (c33c0 ) │ │ + b.n c34b6 │ │ + ldr r0, [pc, #364] @ (c32e4 ) │ │ @ instruction: 0xfb0000d8 │ │ - b.n c34f6 │ │ + b.n c3506 │ │ movs r0, #76 @ 0x4c │ │ - b.n c2c94 │ │ + b.n c2ca4 │ │ asrs r4, r2, #1 │ │ - b.n c2c98 │ │ + b.n c2ca8 │ │ movs r2, r0 │ │ - b.n c31fa │ │ + b.n c320a │ │ lsls r0, r0, #4 │ │ - b.n c30a0 │ │ + b.n c30b0 │ │ movs r0, r0 │ │ - b.n c3822 │ │ + b.n c3832 │ │ movs r2, r6 │ │ lsrs r0, r0, #8 │ │ asrs r5, r2, #3 │ │ - b.n c3532 │ │ - b.n c3284 │ │ - b.n c3696 │ │ + b.n c3542 │ │ + b.n c3294 │ │ + b.n c36a6 │ │ asrs r1, r0, #4 │ │ - b.n c30c0 │ │ + b.n c30d0 │ │ stmia r0!, {r2, r4} │ │ - b.n c3698 │ │ + b.n c36a8 │ │ movs r2, r0 │ │ and.w r0, r0, ip, asr #2 │ │ - b.n c2cbe │ │ + b.n c2cce │ │ movs r0, r0 │ │ - b.n c3842 │ │ + b.n c3852 │ │ movs r2, r5 │ │ lsrs r0, r0, #8 │ │ movs r0, #4 │ │ - b.n c2d52 │ │ + b.n c2d62 │ │ strb r0, [r0, #0] │ │ - b.n c34ee │ │ + b.n c34fe │ │ movs r1, r0 │ │ - b.n c37d6 │ │ + b.n c37e6 │ │ strb r0, [r3, #0] │ │ asrs r0, r2, #22 │ │ movs r4, r0 │ │ - b.n c3468 │ │ + b.n c3478 │ │ @ instruction: 0xfff60aff │ │ movs r0, #213 @ 0xd5 │ │ - b.n c3570 │ │ + b.n c3580 │ │ str r5, [r2, r3] │ │ - b.n c356e │ │ + b.n c357e │ │ movs r2, r0 │ │ - b.n c3474 │ │ + b.n c3484 │ │ @ instruction: 0xfff2caff │ │ movs r1, #5 │ │ - b.n c32e0 │ │ + b.n c32f0 │ │ movs r0, #28 │ │ - b.n c2cfa │ │ + b.n c2d0a │ │ movs r1, r0 │ │ - b.n c347e │ │ + b.n c348e │ │ @ instruction: 0xffee1aff │ │ movs r0, #124 @ 0x7c │ │ - b.n c36f0 │ │ + b.n c3700 │ │ adds r0, #133 @ 0x85 │ │ - b.n c3526 │ │ + b.n c3536 │ │ str r5, [r0, r2] │ │ - b.n c3306 │ │ + b.n c3316 │ │ str r2, [r0, #0] │ │ - b.n c352e │ │ + b.n c353e │ │ adds r0, #179 @ 0xb3 │ │ - b.n c355e │ │ + b.n c356e │ │ str r0, [r6, r2] │ │ - b.n c35a0 │ │ + b.n c35b0 │ │ movs r5, r0 │ │ - b.n c34a0 │ │ + b.n c34b0 │ │ adds r0, #10 │ │ movs r0, #131 @ 0x83 │ │ adds r0, #176 @ 0xb0 │ │ movs r1, #198 @ 0xc6 │ │ strb r0, [r3, #0] │ │ - b.n c2d34 │ │ + b.n c2d44 │ │ movs r0, r0 │ │ - b.n c38b8 │ │ + b.n c38c8 │ │ @ instruction: 0xffe20aff │ │ adds r0, #213 @ 0xd5 │ │ - b.n c35c0 │ │ + b.n c35d0 │ │ movs r0, r0 │ │ - b.n c38bc │ │ + b.n c38cc │ │ @ instruction: 0xffdf4aff │ │ adds r0, #213 @ 0xd5 │ │ - b.n c35c6 │ │ + b.n c35d6 │ │ movs r0, #131 @ 0x83 │ │ - b.n c3326 │ │ + b.n c3336 │ │ movs r0, #176 @ 0xb0 │ │ - b.n c35ca │ │ + b.n c35da │ │ movs r0, #130 @ 0x82 │ │ - b.n c3342 │ │ + b.n c3352 │ │ movs r0, #176 @ 0xb0 │ │ - b.n c35d2 │ │ + b.n c35e2 │ │ movs r0, #2 │ │ - b.n c334a │ │ + b.n c335a │ │ adds r0, #4 │ │ - b.n c2dda │ │ + b.n c2dea │ │ adds r0, #6 │ │ - b.n c3640 │ │ + b.n c3650 │ │ movs r4, r0 │ │ - b.n c38e4 │ │ + b.n c38f4 │ │ adds r0, #182 @ 0xb6 │ │ lsls r2, r2, #7 │ │ movs r0, #3 │ │ lsls r2, r0, #2 │ │ movs r0, #8 │ │ lsls r2, r0, #10 │ │ movs r0, #28 │ │ lsls r7, r0, #22 │ │ @ instruction: 0xffd1eaff │ │ strh r4, [r2, #2] │ │ - b.n c2d90 │ │ + b.n c2da0 │ │ movs r4, r0 │ │ - b.n c388a │ │ + b.n c389a │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ asrs r0, r6, #32 │ │ - b.n c2d9c │ │ + b.n c2dac │ │ movs r0, r0 │ │ - b.n c39a6 │ │ + b.n c39b6 │ │ asrs r4, r5, #32 │ │ - b.n c2d84 │ │ + b.n c2d94 │ │ strb r1, [r0, #0] │ │ - b.n c39ae │ │ + b.n c39be │ │ movs r0, r0 │ │ - b.n c3926 │ │ + b.n c3936 │ │ asrs r0, r0, #32 │ │ - b.n c39b6 │ │ + b.n c39c6 │ │ str r0, [sp, #304] @ 0x130 │ │ - b.n c2db4 │ │ + b.n c2dc4 │ │ lsls r3, r2, #3 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n c3924 │ │ + b.n c3934 │ │ movs r0, #72 @ 0x48 │ │ - b.n c2dc0 │ │ + b.n c2dd0 │ │ lsls r0, r3, #3 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n c392e │ │ + b.n c393e │ │ lsls r3, r3, #3 │ │ lsrs r0, r0, #8 │ │ lsls r6, r3, #3 │ │ and.w r0, r0, r0, rrx │ │ - b.n c2dd4 │ │ - add r0, pc, #192 @ (adr r0, c335c ) │ │ - b.n c2db8 │ │ - add r0, pc, #272 @ (adr r0, c33b0 ) │ │ - b.n c2ddc │ │ + b.n c2de4 │ │ + add r0, pc, #192 @ (adr r0, c336c ) │ │ + b.n c2dc8 │ │ + add r0, pc, #272 @ (adr r0, c33c0 ) │ │ + b.n c2dec │ │ movs r4, r5 │ │ - b.n c2dc0 │ │ + b.n c2dd0 │ │ lsls r5, r2, #3 │ │ - b.n c3652 │ │ + b.n c3662 │ │ str r0, [sp, #112] @ 0x70 │ │ - b.n c37b6 │ │ + b.n c37c6 │ │ asrs r4, r7, #1 │ │ - b.n c37ba │ │ + b.n c37ca │ │ asrs r0, r4, #32 │ │ - b.n c2dd0 │ │ + b.n c2de0 │ │ adds r0, #0 │ │ - b.n c39fa │ │ + b.n c3a0a │ │ lsls r0, r0, #1 │ │ - b.n c38ee │ │ + b.n c38fe │ │ movs r1, #0 │ │ - b.n c31f4 │ │ + b.n c3204 │ │ lsls r0, r0, #2 │ │ - b.n c33c8 │ │ + b.n c33d8 │ │ strh r4, [r2, #2] │ │ - b.n c2de4 │ │ + b.n c2df4 │ │ lsls r0, r6, #2 │ │ - b.n c366e │ │ + b.n c367e │ │ asrs r4, r2, #32 │ │ - b.n c37d6 │ │ + b.n c37e6 │ │ lsls r0, r0, #2 │ │ - b.n c33d8 │ │ + b.n c33e8 │ │ lsls r0, r6, #2 │ │ - b.n c367a │ │ + b.n c368a │ │ adds r0, #88 @ 0x58 │ │ - b.n c2df8 │ │ + b.n c2e08 │ │ str r0, [r0, #0] │ │ - b.n c33e4 │ │ + b.n c33f4 │ │ movs r0, r2 │ │ - b.n c3a26 │ │ + b.n c3a36 │ │ str r0, [r5, r2] │ │ - b.n c32ea │ │ + b.n c32fa │ │ adds r0, #92 @ 0x5c │ │ - b.n c2e08 │ │ + b.n c2e18 │ │ adds r0, #64 @ 0x40 │ │ - b.n c39fc │ │ + b.n c3a0c │ │ lsls r0, r5, #2 │ │ - b.n c3636 │ │ + b.n c3646 │ │ lsls r4, r0, #1 │ │ - b.n c2e14 │ │ + b.n c2e24 │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n c3642 │ │ + b.n c3652 │ │ asrs r6, r0, #32 │ │ - b.n c3646 │ │ + b.n c3656 │ │ ldmia r2!, {r0, r6, r7} │ │ @ instruction: 0xebff0000 │ │ - b.n c39ae │ │ + b.n c39be │ │ adds r0, #5 │ │ - b.n c3652 │ │ + b.n c3662 │ │ lsls r2, r3, #6 │ │ subs r0, r0, r0 │ │ strh r6, [r0, #0] │ │ - b.n c365a │ │ + b.n c366a │ │ str r0, [r3, #0] │ │ - b.n c2e46 │ │ + b.n c2e56 │ │ movs r0, r0 │ │ - b.n c39d6 │ │ + b.n c39e6 │ │ asrs r0, r0, #1 │ │ - b.n c2d5c │ │ + b.n c2d6c │ │ movs r0, r0 │ │ asrs r0, r4, #14 │ │ adds r0, #36 @ 0x24 │ │ - b.n c2e48 │ │ + b.n c2e58 │ │ lsls r4, r7, #30 │ │ asrs r6, r0, #7 │ │ movs r1, r0 │ │ asrs r0, r4, #14 │ │ - add r0, pc, #112 @ (adr r0, c33a8 ) │ │ + add r0, pc, #112 @ (adr r0, c33b8 ) │ │ asrs r6, r0, #22 │ │ lsls r4, r6, #2 │ │ asrs r6, r0, #7 │ │ movs r0, r0 │ │ - b.n c39e4 │ │ + b.n c39f4 │ │ movs r3, r5 │ │ lsrs r0, r0, #8 │ │ movs r6, r0 │ │ - b.n c368a │ │ + b.n c369a │ │ movs r0, #28 │ │ - b.n c2eae │ │ + b.n c2ebe │ │ movs r0, #186 @ 0xba │ │ - b.n c36f6 │ │ + b.n c3706 │ │ movs r0, r4 │ │ - b.n c397a │ │ + b.n c398a │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n c3a9e │ │ + b.n c3aae │ │ movs r0, #64 @ 0x40 │ │ - b.n c37f8 │ │ + b.n c3808 │ │ adds r0, #88 @ 0x58 │ │ - b.n c3880 │ │ + b.n c3890 │ │ movs r0, r0 │ │ - b.n c2e84 │ │ + b.n c2e94 │ │ movs r6, r0 │ │ - b.n c36ae │ │ + b.n c36be │ │ asrs r0, r0, #32 │ │ - b.n c3ab2 │ │ + b.n c3ac2 │ │ lsrs r4, r6, #15 │ │ add.w r0, r0, r0 │ │ - b.n c3a1a │ │ + b.n c3a2a │ │ movs r0, r3 │ │ lsrs r0, r0, #8 │ │ lsls r2, r2, #5 │ │ and.w r0, r0, r5, lsr #11 │ │ - b.n c3732 │ │ + b.n c3742 │ │ adds r0, #16 │ │ - b.n c2eb6 │ │ + b.n c2ec6 │ │ lsls r2, r0, #4 │ │ - b.n c32ae │ │ + b.n c32be │ │ strb r4, [r0, #0] │ │ - b.n c2eb8 │ │ + b.n c2ec8 │ │ str r6, [r7, r2] │ │ - b.n c3736 │ │ + b.n c3746 │ │ movs r0, #188 @ 0xbc │ │ - b.n c373a │ │ + b.n c374a │ │ str r7, [r0, r0] │ │ - b.n c3428 │ │ + b.n c3438 │ │ adds r0, #2 │ │ - b.n c38a6 │ │ + b.n c38b6 │ │ str r2, [r0, r0] │ │ - b.n c38b0 │ │ + b.n c38c0 │ │ movs r5, r0 │ │ - b.n c3650 │ │ + b.n c3660 │ │ lsls r5, r5, #5 │ │ ldmia r2!, {} │ │ str r6, [r7, r2] │ │ - b.n c3732 │ │ + b.n c3742 │ │ str r4, [r2, r0] │ │ - b.n c38b6 │ │ + b.n c38c6 │ │ movs r0, #162 @ 0xa2 │ │ - b.n c371a │ │ + b.n c372a │ │ adds r0, #188 @ 0xbc │ │ - b.n c373e │ │ + b.n c374e │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ lsls r7, r2, #10 │ │ - b.n c33ca │ │ + b.n c33da │ │ movs r7, r0 │ │ - b.n c34d4 │ │ + b.n c34e4 │ │ asrs r5, r0, #32 │ │ - b.n c370e │ │ - @ instruction: 0x478d │ │ + b.n c371e │ │ + @ instruction: 0x47cd │ │ @ instruction: 0xfb001040 │ │ - b.n c2e0c │ │ + b.n c2e1c │ │ movs r5, r0 │ │ - b.n c371a │ │ + b.n c372a │ │ movs r0, #7 │ │ - b.n c371e │ │ - blx pc │ │ + b.n c372e │ │ + @ instruction: 0x47bd │ │ mls r0, r0, r0, r0 │ │ - b.n c2f12 │ │ + b.n c2f22 │ │ movs r0, #1 │ │ - b.n c3b2a │ │ + b.n c3b3a │ │ asrs r0, r0, #32 │ │ - b.n c3b2e │ │ + b.n c3b3e │ │ movs r0, #32 │ │ - b.n c2ef2 │ │ + b.n c2f02 │ │ asrs r4, r4, #32 │ │ - b.n c2ef6 │ │ + b.n c2f06 │ │ movs r0, r0 │ │ - b.n c3aae │ │ + b.n c3abe │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n c2fb2 │ │ + b.n c2fc2 │ │ movs r2, r0 │ │ - b.n c3826 │ │ + b.n c3836 │ │ lsls r6, r1, #1 │ │ subs r0, r0, r0 │ │ lsls r0, r3, #3 │ │ - b.n c3796 │ │ + b.n c37a6 │ │ movs r0, #76 @ 0x4c │ │ - b.n c2f34 │ │ + b.n c2f44 │ │ asrs r4, r2, #1 │ │ - b.n c2f38 │ │ + b.n c2f48 │ │ movs r2, r0 │ │ - b.n c349a │ │ + b.n c34aa │ │ lsls r0, r0, #4 │ │ - b.n c3340 │ │ + b.n c3350 │ │ movs r0, r0 │ │ - b.n c3ac2 │ │ + b.n c3ad2 │ │ lsls r7, r0, #1 │ │ lsrs r0, r0, #8 │ │ asrs r5, r2, #3 │ │ - b.n c37d2 │ │ - add r0, pc, #720 @ (adr r0, c36fc ) │ │ - b.n c393a │ │ + b.n c37e2 │ │ + add r0, pc, #720 @ (adr r0, c370c ) │ │ + b.n c394a │ │ asrs r1, r0, #4 │ │ - b.n c3364 │ │ + b.n c3374 │ │ str r0, [sp, #256] @ 0x100 │ │ - b.n c2e6c │ │ + b.n c2e7c │ │ str r4, [r2, r0] │ │ - b.n c393c │ │ + b.n c394c │ │ movs r0, #188 @ 0xbc │ │ - b.n c37e0 │ │ - b.n c3584 │ │ - b.n c3782 │ │ + b.n c37f0 │ │ + b.n c3594 │ │ + b.n c3792 │ │ movs r2, r0 │ │ and.w r0, r0, ip, asr #2 │ │ - b.n c2f6a │ │ + b.n c2f7a │ │ movs r0, r0 │ │ - b.n c3aee │ │ + b.n c3afe │ │ movs r4, r7 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n c36f6 │ │ + b.n c3706 │ │ @ instruction: 0xfffa0aff │ │ strb r5, [r2, #3] │ │ - b.n c37fe │ │ + b.n c380e │ │ adds r0, #213 @ 0xd5 │ │ - b.n c380a │ │ + b.n c381a │ │ movs r7, r0 │ │ - b.n c370c │ │ + b.n c371c │ │ @ instruction: 0xfff6caff │ │ strb r3, [r0, #4] │ │ - b.n c356e │ │ + b.n c357e │ │ strb r4, [r3, #0] │ │ - b.n c2fa0 │ │ + b.n c2fb0 │ │ movs r1, r0 │ │ - b.n c3724 │ │ + b.n c3734 │ │ @ instruction: 0xfff21aff │ │ strb r4, [r0, #0] │ │ - b.n c301e │ │ + b.n c302e │ │ movs r7, r7 │ │ - b.n c3b30 │ │ + b.n c3b40 │ │ movs r3, r3 │ │ ldrh r0, [r0, #16] │ │ movs r0, #32 │ │ - b.n c2fc4 │ │ + b.n c2fd4 │ │ stmia r0!, {r0, r1, r7} │ │ - b.n c358e │ │ + b.n c359e │ │ strb r3, [r0, #2] │ │ - b.n c3596 │ │ + b.n c35a6 │ │ movs r7, #188 @ 0xbc │ │ - b.n c384e │ │ + b.n c385e │ │ strb r0, [r6, #2] │ │ - b.n c3848 │ │ + b.n c3858 │ │ movs r7, r0 │ │ - b.n c3742 │ │ + b.n c3752 │ │ movs r4, r2 │ │ subs r0, r0, r0 │ │ movs r0, #10 │ │ - b.n c37e6 │ │ + b.n c37f6 │ │ adds r0, #24 │ │ - b.n c2fca │ │ + b.n c2fda │ │ lsrs r5, r1, #10 │ │ orn r0, r2, #8388608 @ 0x800000 │ │ - b.n c3b64 │ │ + b.n c3b74 │ │ cmp r2, #141 @ 0x8d │ │ orn sl, r2, #18304 @ 0x4780 │ │ orn r0, r2, #368640 @ 0x5a000 │ │ - b.n c39c4 │ │ + b.n c39d4 │ │ lsrs r5, r1, #10 │ │ orr.w sl, r2, #288768 @ 0x46800 │ │ orr.w sl, r2, #18304 @ 0x4780 │ │ orr.w r0, r2, #622592 @ 0x98000 │ │ - b.n c2fee │ │ + b.n c2ffe │ │ adds r0, #28 │ │ - b.n c2ffe │ │ + b.n c300e │ │ adds r0, #28 │ │ - b.n c2fda │ │ + b.n c2fea │ │ @ instruction: 0xffda0aff │ │ movs r0, #24 │ │ - b.n c2ffe │ │ + b.n c300e │ │ adds r0, #1 │ │ - b.n c3c22 │ │ + b.n c3c32 │ │ adds r0, #180 @ 0xb4 │ │ - b.n c386a │ │ + b.n c387a │ │ adds r0, #0 │ │ - b.n c3c2a │ │ + b.n c3c3a │ │ movs r0, #24 │ │ - b.n c300e │ │ + b.n c301e │ │ adds r7, #188 @ 0xbc │ │ - b.n c3876 │ │ + b.n c3886 │ │ @ instruction: 0xffd3eaff │ │ movs r0, #48 @ 0x30 │ │ - b.n c3034 │ │ + b.n c3044 │ │ movs r0, r0 │ │ - b.n c3ba2 │ │ + b.n c3bb2 │ │ @ instruction: 0xffd01aff │ │ movs r0, #131 @ 0x83 │ │ - b.n c3606 │ │ + b.n c3616 │ │ adds r7, #188 @ 0xbc │ │ - b.n c38ae │ │ + b.n c38be │ │ movs r3, r0 │ │ - b.n c37ca │ │ + b.n c37da │ │ @ instruction: 0xffcc9aff │ │ movs r0, #131 @ 0x83 │ │ - b.n c3620 │ │ + b.n c3630 │ │ movs r0, #176 @ 0xb0 │ │ - b.n c38be │ │ + b.n c38ce │ │ adds r0, #2 │ │ - b.n c3628 │ │ + b.n c3638 │ │ movs r0, #4 │ │ - b.n c30c8 │ │ + b.n c30d8 │ │ movs r0, #6 │ │ - b.n c392a │ │ + b.n c393a │ │ movs r4, r0 │ │ - b.n c3bce │ │ + b.n c3bde │ │ @ instruction: 0xffc51aff │ │ strb r6, [r6, #2] │ │ - b.n c38d8 │ │ + b.n c38e8 │ │ movs r0, #24 │ │ - b.n c3056 │ │ + b.n c3066 │ │ adds r0, #7 │ │ - b.n c3640 │ │ + b.n c3650 │ │ adds r0, #8 │ │ - b.n c3a44 │ │ + b.n c3a54 │ │ adds r0, #28 │ │ - b.n c3046 │ │ + b.n c3056 │ │ @ instruction: 0xffbfeaff │ │ asrs r4, r0, #1 │ │ - b.n c3084 │ │ + b.n c3094 │ │ movs r0, #36 @ 0x24 │ │ - b.n c3088 │ │ + b.n c3098 │ │ adds r2, r0, r0 │ │ - b.n c3954 │ │ + b.n c3964 │ │ movs r0, r3 │ │ - b.n c307e │ │ + b.n c308e │ │ adds r0, #1 │ │ - b.n c385e │ │ + b.n c386e │ │ asrs r0, r1, #1 │ │ - b.n c3098 │ │ + b.n c30a8 │ │ movs r0, #88 @ 0x58 │ │ - b.n c3a7c │ │ + b.n c3a8c │ │ str r4, [r2, r3] │ │ - b.n c3086 │ │ + b.n c3096 │ │ @ instruction: 0xfb6debff │ │ asrs r4, r2, #1 │ │ - b.n c30a8 │ │ + b.n c30b8 │ │ movs r2, r0 │ │ - b.n c3b94 │ │ + b.n c3ba4 │ │ movs r5, r1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r1, #32 │ │ - b.n c30a2 │ │ + b.n c30b2 │ │ movs r0, #24 │ │ - b.n c30a6 │ │ + b.n c30b6 │ │ str r0, [r2, #60] @ 0x3c │ │ - b.n c3904 │ │ + b.n c3914 │ │ adds r0, #180 @ 0xb4 │ │ - b.n c3a8a │ │ + b.n c3a9a │ │ asrs r6, r6, #2 │ │ - b.n c393a │ │ + b.n c394a │ │ lsrs r5, r1, #8 │ │ orn r0, r3, #2113536 @ 0x204000 │ │ - b.n c36a2 │ │ + b.n c36b2 │ │ cmp r2, #13 │ │ orn r0, r3, #2228224 @ 0x220000 │ │ - b.n c3a9c │ │ + b.n c3aac │ │ ldr r4, [r7, #92] @ 0x5c │ │ - b.n c3922 │ │ - ldr r2, [pc, #60] @ (c35dc ) │ │ + b.n c3932 │ │ + ldr r2, [pc, #60] @ (c35ec ) │ │ orn sl, r3, #9240576 @ 0x8d0000 │ │ orr.w sl, r1, #577536 @ 0x8d000 │ │ orr.w sl, r1, #36608 @ 0x8f00 │ │ orr.w r0, r1, #2490368 @ 0x260000 │ │ - b.n c30da │ │ + b.n c30ea │ │ strb r0, [r6, #0] │ │ - b.n c30f0 │ │ + b.n c3100 │ │ strh r4, [r2, #2] │ │ - b.n c30f4 │ │ + b.n c3104 │ │ asrs r4, r2, #3 │ │ - b.n c30e0 │ │ + b.n c30f0 │ │ movs r1, r0 │ │ - b.n c386c │ │ + b.n c387c │ │ asrs r7, r0, #32 │ │ - b.n c3906 │ │ + b.n c3916 │ │ str r0, [sp, #304] @ 0x130 │ │ - b.n c3104 │ │ + b.n c3114 │ │ vpmin.u32 q0, , │ │ asrs r0, r2, #32 │ │ - b.n c30fa │ │ + b.n c310a │ │ movs r2, #208 @ 0xd0 │ │ - b.n c3958 │ │ + b.n c3968 │ │ movs r0, #1 │ │ - b.n c3afe │ │ + b.n c3b0e │ │ adds r0, #0 │ │ - b.n c3b24 │ │ + b.n c3b34 │ │ movs r0, r0 │ │ - b.n c3c90 │ │ + b.n c3ca0 │ │ movs r2, #240 @ 0xf0 │ │ - b.n c3968 │ │ + b.n c3978 │ │ movs r0, #72 @ 0x48 │ │ - b.n c3124 │ │ + b.n c3134 │ │ vpmin.u32 q0, q11, │ │ movs r0, r0 │ │ - b.n c3c92 │ │ + b.n c3ca2 │ │ lsls r5, r6, #2 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n c31a2 │ │ + b.n c31b2 │ │ movs r3, r0 │ │ - b.n c39fe │ │ + b.n c3a0e │ │ movs r4, r0 │ │ - b.n c318a │ │ + b.n c319a │ │ asrs r0, r7, #32 │ │ - b.n c3140 │ │ + b.n c3150 │ │ movs r0, r0 │ │ - b.n c3d4a │ │ + b.n c3d5a │ │ movs r0, r0 │ │ - b.n c3cb0 │ │ + b.n c3cc0 │ │ movs r6, r7 │ │ subs r0, r0, r0 │ │ - beq.n c364c │ │ - b.n c3aac │ │ + beq.n c365c │ │ + b.n c3abc │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r6} │ │ - b.n c3054 │ │ + b.n c3064 │ │ asrs r0, r1, #1 │ │ - b.n c315c │ │ + b.n c316c │ │ movs r0, r0 │ │ - b.n c3128 │ │ + b.n c3138 │ │ movs r0, r0 │ │ - b.n c3d6a │ │ - beq.n c3664 │ │ - b.n c3ac4 │ │ + b.n c3d7a │ │ + beq.n c3674 │ │ + b.n c3ad4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r6, sp, lr} │ │ - b.n c3170 │ │ + b.n c3180 │ │ movs r0, #4 │ │ - b.n c3166 │ │ + b.n c3176 │ │ movs r0, #182 @ 0xb6 │ │ - b.n c39c8 │ │ + b.n c39d8 │ │ stc2l 10, cr14, [lr], #1020 @ 0x3fc @ │ │ movs r0, #5 │ │ - b.n c3986 │ │ + b.n c3996 │ │ movs r0, r0 │ │ - b.n c3d8a │ │ + b.n c3d9a │ │ asrs r4, r1, #32 │ │ - b.n c31b2 │ │ + b.n c31c2 │ │ movs r0, r0 │ │ - b.n c3cf4 │ │ + b.n c3d04 │ │ @ instruction: 0xffee0aff │ │ movs r0, r0 │ │ - b.n c315e │ │ + b.n c316e │ │ ldc2 10, cr14, [ip], #-1020 @ 0xfffffc04 @ │ │ movs r0, r5 │ │ - b.n c3af8 │ │ + b.n c3b08 │ │ asrs r4, r0, #32 │ │ - b.n c39a6 │ │ + b.n c39b6 │ │ movs r0, #2 │ │ - b.n c3daa │ │ - add r0, pc, #20 @ (adr r0, c3680 ) │ │ - b.n c39ae │ │ + b.n c3dba │ │ + add r0, pc, #20 @ (adr r0, c3690 ) │ │ + b.n c39be │ │ lsls r5, r4, #8 │ │ add.w r0, r0, r4, asr #32 │ │ - b.n c30ac │ │ + b.n c30bc │ │ movs r0, r0 │ │ - b.n c3d1a │ │ + b.n c3d2a │ │ @ instruction: 0xffe41aff │ │ str r0, [r5, r0] │ │ - b.n c30b8 │ │ + b.n c30c8 │ │ movs r4, r0 │ │ - b.n c39c6 │ │ + b.n c39d6 │ │ movs r0, #0 │ │ - b.n c3dca │ │ + b.n c3dda │ │ asrs r5, r0, #32 │ │ - b.n c39ce │ │ - bvc.n c3674 │ │ + b.n c39de │ │ + bvc.n c3684 │ │ @ instruction: 0xebff0000 │ │ - b.n c3d36 │ │ + b.n c3d46 │ │ @ instruction: 0xffdd1aff │ │ movs r0, r2 │ │ - b.n c31c6 │ │ + b.n c31d6 │ │ asrs r0, r2, #32 │ │ - b.n c31cc │ │ + b.n c31dc │ │ asrs r0, r1, #32 │ │ - b.n c31a6 │ │ + b.n c31b6 │ │ asrs r0, r6, #2 │ │ - b.n c3a4a │ │ + b.n c3a5a │ │ movs r0, #178 @ 0xb2 │ │ - b.n c3a4e │ │ + b.n c3a5e │ │ movs r0, r1 │ │ - b.n c3cd4 │ │ + b.n c3ce4 │ │ movs r0, #1 │ │ - b.n c3bba │ │ + b.n c3bca │ │ movs r0, #178 @ 0xb2 │ │ - b.n c3a3a │ │ + b.n c3a4a │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ adds r0, #80 @ 0x50 │ │ - b.n c31fc │ │ + b.n c320c │ │ movs r0, #20 │ │ - b.n c31ee │ │ + b.n c31fe │ │ adds r0, #4 │ │ - b.n c31f0 │ │ + b.n c3200 │ │ adds r0, #4 │ │ - b.n c31d2 │ │ + b.n c31e2 │ │ adds r0, #8 │ │ - b.n c31d6 │ │ + b.n c31e6 │ │ movs r0, r6 │ │ - b.n c3cf8 │ │ + b.n c3d08 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, #64 @ 0x40 │ │ - b.n c3218 │ │ + b.n c3228 │ │ asrs r4, r2, #32 │ │ - b.n c320a │ │ + b.n c321a │ │ movs r0, #0 │ │ - b.n c320a │ │ + b.n c321a │ │ movs r0, #4 │ │ - b.n c31ea │ │ + b.n c31fa │ │ movs r0, #16 │ │ - b.n c31f0 │ │ + b.n c3200 │ │ movs r0, #20 │ │ - b.n c31f4 │ │ + b.n c3204 │ │ movs r4, r0 │ │ - b.n c329e │ │ + b.n c32ae │ │ movs r1, r0 │ │ - b.n c3d1a │ │ + b.n c3d2a │ │ lsls r2, r7, #2 │ │ asrs r5, r2, #7 │ │ movs r0, r4 │ │ asrs r0, r0, #14 │ │ lsls r2, r7, #2 │ │ asrs r5, r0, #7 │ │ str r2, [r1, r0] │ │ - b.n c3a4a │ │ + b.n c3a5a │ │ ldc2 10, cr14, [sp], {255} @ 0xff @ │ │ asrs r0, r7, #32 │ │ - b.n c324c │ │ + b.n c325c │ │ movs r0, r0 │ │ - b.n c3238 │ │ + b.n c3248 │ │ movs r1, r0 │ │ - b.n c3c1a │ │ + b.n c3c2a │ │ movs r0, r0 │ │ - b.n c3220 │ │ + b.n c3230 │ │ asrs r0, r5, #32 │ │ - b.n c325c │ │ + b.n c326c │ │ movs r1, r0 │ │ - b.n c39c6 │ │ + b.n c39d6 │ │ stc2l 10, cr2, [r1], {255} @ 0xff @ │ │ lsls r0, r2, #3 │ │ - b.n c3ab2 │ │ + b.n c3ac2 │ │ movs r0, r0 │ │ - b.n c3834 │ │ + b.n c3844 │ │ movs r0, r0 │ │ - b.n c323a │ │ + b.n c324a │ │ asrs r0, r0, #32 │ │ - b.n c3e7a │ │ + b.n c3e8a │ │ movs r5, r0 │ │ - b.n c32e6 │ │ + b.n c32f6 │ │ asrs r0, r0, #1 │ │ - b.n c3158 │ │ + b.n c3168 │ │ asrs r4, r5, #32 │ │ - b.n c3280 │ │ + b.n c3290 │ │ mrrc2 10, 15, lr, r4, cr15 │ │ movs r0, #80 @ 0x50 │ │ - b.n c3288 │ │ + b.n c3298 │ │ asrs r1, r0, #32 │ │ - b.n c3e92 │ │ + b.n c3ea2 │ │ str r0, [r0, #0] │ │ - b.n c3e96 │ │ + b.n c3ea6 │ │ movs r0, r0 │ │ - b.n c3dfe │ │ + b.n c3e0e │ │ asrs r4, r0, #32 │ │ asrs r2, r2, #22 │ │ movs r0, #72 @ 0x48 │ │ - b.n c329c │ │ + b.n c32ac │ │ asrs r1, r0, #32 │ │ asrs r1, r0, #10 │ │ movs r0, r0 │ │ - b.n c3e0e │ │ + b.n c3e1e │ │ movs r0, #0 │ │ - b.n c3eae │ │ + b.n c3ebe │ │ movs r0, #64 @ 0x40 │ │ asrs r5, r3, #22 │ │ movs r0, #0 │ │ asrs r2, r2, #22 │ │ asrs r1, r0, #32 │ │ - b.n c387e │ │ + b.n c388e │ │ movs r4, #188 @ 0xbc │ │ - b.n c3b30 │ │ + b.n c3b40 │ │ asrs r1, r0, #32 │ │ - b.n c3f04 │ │ + b.n c3f14 │ │ asrs r0, r1, #32 │ │ - b.n c3c88 │ │ + b.n c3c98 │ │ movs r2, r0 │ │ - b.n c3a2c │ │ + b.n c3a3c │ │ movs r5, r0 │ │ ldr r2, [sp, #0] │ │ asrs r0, r0, #1 │ │ - b.n c32cc │ │ + b.n c32dc │ │ adds r0, #1 │ │ - b.n c3ed6 │ │ + b.n c3ee6 │ │ movs r0, #92 @ 0x5c │ │ - b.n c334c │ │ + b.n c335c │ │ asrs r0, r0, #32 │ │ - b.n c32c0 │ │ + b.n c32d0 │ │ asrs r3, r2, #32 │ │ - b.n c3ca4 │ │ + b.n c3cb4 │ │ str r1, [r6, #32] │ │ - b.n c38ac │ │ + b.n c38bc │ │ asrs r6, r6, #2 │ │ - b.n c3b54 │ │ + b.n c3b64 │ │ strh r0, [r0, #0] │ │ - b.n c32ce │ │ + b.n c32de │ │ asrs r1, r0, #32 │ │ - b.n c38bc │ │ + b.n c38cc │ │ adds r0, #4 │ │ - b.n c32d6 │ │ + b.n c32e6 │ │ movs r0, r5 │ │ - b.n c3c50 │ │ + b.n c3c60 │ │ movs r0, #8 │ │ - b.n c32e0 │ │ + b.n c32f0 │ │ asrs r4, r0, #32 │ │ - b.n c3b02 │ │ + b.n c3b12 │ │ strh r0, [r0, #0] │ │ - b.n c32e0 │ │ + b.n c32f0 │ │ adds r0, #4 │ │ - b.n c32e4 │ │ + b.n c32f4 │ │ strb r2, [r0, #0] │ │ - b.n c3b0e │ │ + b.n c3b1e │ │ ldmia r0!, {r5} │ │ @ instruction: 0xebff0024 │ │ - b.n c320c │ │ + b.n c321c │ │ movs r0, r0 │ │ - b.n c3e7a │ │ + b.n c3e8a │ │ @ instruction: 0xff8c1aff │ │ asrs r4, r1, #32 │ │ - b.n c330a │ │ + b.n c331a │ │ str r6, [r0, r0] │ │ - b.n c3b26 │ │ + b.n c3b36 │ │ movs r0, #40 @ 0x28 │ │ - b.n c3220 │ │ + b.n c3230 │ │ adds r0, #16 │ │ - b.n c3316 │ │ + b.n c3326 │ │ lsls r4, r0, #1 │ │ - b.n c3314 │ │ + b.n c3324 │ │ str r0, [sp, #0] │ │ - b.n c331a │ │ + b.n c332a │ │ movs r0, r0 │ │ - b.n c3aa0 │ │ + b.n c3ab0 │ │ adds r0, #1 │ │ - b.n c3b3e │ │ - b.n c3860 │ │ - b.n c3368 │ │ + b.n c3b4e │ │ + b.n c3870 │ │ + b.n c3378 │ │ str r1, [r0, r0] │ │ lsls r5, r0, #10 │ │ stmia r0!, {r2, r4, r5} │ │ - b.n c332c │ │ + b.n c333c │ │ strh r4, [r0, #0] │ │ - b.n c3332 │ │ + b.n c3342 │ │ movs r6, r1 │ │ - b.n c38c4 │ │ + b.n c38d4 │ │ movs r4, r1 │ │ - b.n c39c6 │ │ - add r0, pc, #48 @ (adr r0, c3848 ) │ │ + b.n c39d6 │ │ + add r0, pc, #48 @ (adr r0, c3858 ) │ │ movs r5, #146 @ 0x92 │ │ movs r6, r0 │ │ movs r1, #90 @ 0x5a │ │ movs r1, r0 │ │ subs r2, #0 │ │ movs r5, r0 │ │ - b.n c3ada │ │ + b.n c3aea │ │ lsls r3, r1, #2 │ │ ldr r2, [sp, #0] │ │ adds r0, #186 @ 0xba │ │ - b.n c3bd2 │ │ + b.n c3be2 │ │ movs r4, r0 │ │ - b.n c3b72 │ │ + b.n c3b82 │ │ asrs r0, r2, #32 │ │ - b.n c335a │ │ + b.n c336a │ │ asrs r1, r0, #7 │ │ add.w r0, r0, r0 │ │ - b.n c3ede │ │ + b.n c3eee │ │ vpmin.u , , │ │ strh r4, [r2, #2] │ │ - b.n c3380 │ │ + b.n c3390 │ │ str r0, [r0, #4] │ │ - b.n c3384 │ │ + b.n c3394 │ │ ldc2 10, cr14, [r7], #-1020 @ 0xfffffc04 @ │ │ movs r5, r0 │ │ - b.n c3b92 │ │ + b.n c3ba2 │ │ strh r6, [r1, #0] │ │ - b.n c3b96 │ │ + b.n c3ba6 │ │ strb r4, [r1, #0] │ │ - b.n c3b9a │ │ - bge.n c3768 │ │ + b.n c3baa │ │ + bge.n c3778 │ │ @ instruction: 0xebff0248 │ │ - b.n c338c │ │ + b.n c339c │ │ stmia r0!, {r0, r1, r2} │ │ - b.n c3ba6 │ │ - b.n c3878 │ │ - b.n c3baa │ │ + b.n c3bb6 │ │ + b.n c3888 │ │ + b.n c3bba │ │ movs r0, r0 │ │ - b.n c3f0e │ │ - ldc2l 10, cr1, [pc, #-1020]! @ c3474 @ │ │ + b.n c3f1e │ │ + ldc2l 10, cr1, [pc, #-1020]! @ c3484 @ │ │ lsls r0, r4, #2 │ │ - b.n c33a0 │ │ + b.n c33b0 │ │ strh r4, [r1, #0] │ │ - b.n c3bba │ │ + b.n c3bca │ │ strb r6, [r1, #0] │ │ - b.n c3bbe │ │ + b.n c3bce │ │ movs r0, #0 │ │ - b.n c33a2 │ │ + b.n c33b2 │ │ movs r0, r0 │ │ - b.n c3f2a │ │ + b.n c3f3a │ │ lsls r4, r7, #2 │ │ lsrs r0, r0, #8 │ │ adds r1, #2 │ │ - b.n c37ae │ │ + b.n c37be │ │ movs r0, #1 │ │ - b.n c3d16 │ │ + b.n c3d26 │ │ asrs r0, r0, #1 │ │ - b.n c33c0 │ │ + b.n c33d0 │ │ movs r0, #0 │ │ - b.n c339a │ │ + b.n c33aa │ │ movs r1, r0 │ │ - b.n c3fde │ │ + b.n c3fee │ │ movs r0, r0 │ │ - b.n c33bc │ │ + b.n c33cc │ │ lsls r0, r4, #1 │ │ - b.n c3dc0 │ │ + b.n c3dd0 │ │ movs r0, #5 │ │ - b.n c3bea │ │ - bge.n c389c │ │ + b.n c3bfa │ │ + bge.n c38ac │ │ @ instruction: 0xebff304c │ │ - b.n c33ec │ │ - b.n c38c2 │ │ - b.n c3bf6 │ │ + b.n c33fc │ │ + b.n c38d2 │ │ + b.n c3c06 │ │ stmia r0!, {r3} │ │ - b.n c3bfa │ │ + b.n c3c0a │ │ lsls r4, r4, #1 │ │ - b.n c33f8 │ │ + b.n c3408 │ │ movs r0, #84 @ 0x54 │ │ - b.n c33fc │ │ + b.n c340c │ │ movs r0, r0 │ │ - b.n c3f66 │ │ + b.n c3f76 │ │ ldc2l 10, cr0, [r9, #-1020]! @ 0xfffffc04 @ │ │ vpmin.u16 q15, q8, │ │ movs r7, #177 @ 0xb1 │ │ - b.n c3ee2 │ │ + b.n c3ef2 │ │ cmp r7, #255 @ 0xff │ │ - b.n c3f74 │ │ + b.n c3f84 │ │ movs r2, r0 │ │ - b.n c3b7a │ │ + b.n c3b8a │ │ movs r0, r5 │ │ subs r0, r0, r0 │ │ lsls r4, r2, #14 │ │ - b.n c3420 │ │ + b.n c3430 │ │ str r4, [r2, r0] │ │ - b.n c3dea │ │ + b.n c3dfa │ │ movs r0, r0 │ │ - b.n c3a08 │ │ + b.n c3a18 │ │ lsls r2, r3, #1 │ │ - b.n c348e │ │ + b.n c349e │ │ movs r0, r0 │ │ - b.n c3f92 │ │ + b.n c3fa2 │ │ lsls r7, r5, #2 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n c3c3a │ │ + b.n c3c4a │ │ movs r0, r4 │ │ and.w r0, r0, ip, ror #2 │ │ - b.n c3cb6 │ │ + b.n c3cc6 │ │ asrs r0, r7, #2 │ │ - b.n c3cba │ │ + b.n c3cca │ │ lsls r0, r4, #2 │ │ - b.n c3c4a │ │ + b.n c3c5a │ │ lsls r0, r2, #6 │ │ - b.n c3912 │ │ + b.n c3922 │ │ movs r7, r0 │ │ - b.n c3c52 │ │ + b.n c3c62 │ │ asrs r5, r0, #32 │ │ - b.n c3c56 │ │ - mov sl, r5 │ │ + b.n c3c66 │ │ + mov r7, sp │ │ mla r0, r0, r6, lr │ │ - b.n c3c5e │ │ + b.n c3c6e │ │ stmia r0!, {r2, r3, r5} │ │ - b.n c345c │ │ - add r0, pc, #48 @ (adr r0, c3954 ) │ │ - b.n c3c66 │ │ + b.n c346c │ │ + add r0, pc, #48 @ (adr r0, c3964 ) │ │ + b.n c3c76 │ │ movs r0, r0 │ │ - b.n c3fe2 │ │ + b.n c3ff2 │ │ stc2 10, cr0, [fp, #1020]! @ 0x3fc @ │ │ - stc2 10, cr14, [pc, #1020]! @ c3d2c @ │ │ + stc2 10, cr14, [pc, #1020]! @ c3d3c @ │ │ movs r7, r1 │ │ - b.n c3e3c │ │ - beq.n c3970 │ │ - b.n c3dd0 │ │ + b.n c3e4c │ │ + beq.n c3980 │ │ + b.n c3de0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, r2, r4} │ │ - b.n c4082 │ │ - beq.n c397c │ │ - b.n c3ddc │ │ + b.n c4092 │ │ + beq.n c398c │ │ + b.n c3dec │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r4, r5, r7, r8, r9, sl} │ │ - b.n c3f5e │ │ + b.n c3f6e │ │ lsrs r7, r7, #31 │ │ - b.n c3ff0 │ │ + b.n c4000 │ │ movs r2, r2 │ │ - b.n c3e56 │ │ - beq.n c3990 │ │ - b.n c3df0 │ │ + b.n c3e66 │ │ + beq.n c39a0 │ │ + b.n c3e00 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3} │ │ - b.n c348a │ │ + b.n c349a │ │ movs r0, r0 │ │ and.w r0, r0, ip │ │ - b.n c3496 │ │ + b.n c34a6 │ │ asrs r4, r0, #32 │ │ - b.n c348e │ │ + b.n c349e │ │ asrs r2, r0, #32 │ │ - b.n c4074 │ │ + b.n c4084 │ │ asrs r4, r0, #32 │ │ - b.n c3476 │ │ + b.n c3486 │ │ lsls r1, r6, #30 │ │ - b.n c3f8a │ │ + b.n c3f9a │ │ lsrs r7, r7, #31 │ │ - b.n c401c │ │ + b.n c402c │ │ movs r5, r1 │ │ - b.n c3e82 │ │ + b.n c3e92 │ │ asrs r4, r1, #32 │ │ - b.n c34ae │ │ + b.n c34be │ │ movs r0, #4 │ │ - b.n c34ac │ │ + b.n c34bc │ │ movs r0, #2 │ │ - b.n c4092 │ │ + b.n c40a2 │ │ movs r0, #4 │ │ - b.n c3494 │ │ - beq.n c39cc │ │ - b.n c3e2c │ │ + b.n c34a4 │ │ + beq.n c39dc │ │ + b.n c3e3c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {ip} │ │ - b.n c3cde │ │ + b.n c3cee │ │ movs r0, r0 │ │ - b.n c40e2 │ │ + b.n c40f2 │ │ movs r0, r0 │ │ - b.n c4048 │ │ + b.n c4058 │ │ @ instruction: 0xfae00aff │ │ @ instruction: 0xfa80eaff │ │ movs r4, r0 │ │ - b.n c3cf2 │ │ + b.n c3d02 │ │ asrs r0, r0, #2 │ │ - b.n c40f6 │ │ + b.n c4106 │ │ str r4, [r0, r0] │ │ - b.n c3cfa │ │ - ldr r5, [r7, #40] @ 0x28 │ │ + b.n c3d0a │ │ + ldr r4, [r7, #40] @ 0x28 │ │ @ instruction: 0xebff0000 │ │ - b.n c4062 │ │ + b.n c4072 │ │ @ instruction: 0xffde1aff │ │ adds r6, r5, r4 │ │ - b.n c3fda │ │ + b.n c3fea │ │ lsls r5, r2, #3 │ │ - b.n c3d78 │ │ + b.n c3d88 │ │ subs r7, r7, #7 │ │ - b.n c4070 │ │ + b.n c4080 │ │ strb r1, [r5, #0] │ │ - b.n c3ed8 │ │ + b.n c3ee8 │ │ asrs r1, r6, #30 │ │ - b.n c3fea │ │ + b.n c3ffa │ │ strh r1, [r1, #0] │ │ - b.n c3d1e │ │ + b.n c3d2e │ │ movs r1, r0 │ │ - b.n c40c2 │ │ + b.n c40d2 │ │ ands r5, r0 │ │ - b.n c3d26 │ │ + b.n c3d36 │ │ subs r7, r7, #7 │ │ - b.n c4088 │ │ + b.n c4098 │ │ strh r0, [r0, #4] │ │ - b.n c3e80 │ │ + b.n c3e90 │ │ strb r1, [r0, #0] │ │ stmia r2!, {r0, r7} │ │ str r0, [r1, r1] │ │ - b.n c3530 │ │ + b.n c3540 │ │ str r0, [sp, #304] @ 0x130 │ │ - b.n c3534 │ │ + b.n c3544 │ │ @ instruction: 0xfb4deaff │ │ adds r0, #5 │ │ - b.n c3d42 │ │ + b.n c3d52 │ │ str r1, [r0, r0] │ │ - b.n c3d46 │ │ + b.n c3d56 │ │ strb r0, [r0, #0] │ │ - b.n c3d4a │ │ + b.n c3d5a │ │ asrs r0, r5, #32 │ │ - b.n c3444 │ │ + b.n c3454 │ │ movs r0, r0 │ │ - b.n c3538 │ │ - bfcsel 1e, c3212 , 22, gt │ │ + b.n c3548 │ │ + bfcsel 1e, c3222 , 22, gt │ │ movs r0, r0 │ │ - b.n c40ba │ │ + b.n c40ca │ │ lsls r6, r1, #2 │ │ lsrs r0, r0, #8 │ │ movs r0, r4 │ │ - b.n c3e54 │ │ + b.n c3e64 │ │ lsls r1, r6, #30 │ │ asrs r0, r1, #12 │ │ lsrs r7, r7, #31 │ │ asrs r7, r1, #13 │ │ movs r0, r0 │ │ - b.n c40d8 │ │ + b.n c40e8 │ │ movs r5, r0 │ │ lsls r0, r4, #6 │ │ - beq.n c3a6c │ │ - b.n c3ecc │ │ + beq.n c3a7c │ │ + b.n c3edc │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r5} │ │ - b.n c4070 │ │ + b.n c4080 │ │ @ instruction: 0xfb1c1aff │ │ lsls r1, r1, #26 │ │ - b.n c3d86 │ │ + b.n c3d96 │ │ adds r6, r5, r4 │ │ - b.n c405a │ │ + b.n c406a │ │ subs r7, r7, #7 │ │ - b.n c40ec │ │ + b.n c40fc │ │ lsrs r0, r0, #31 │ │ - b.n c3a54 │ │ - beq.n c3a8c │ │ - b.n c3eec │ │ + b.n c3a64 │ │ + beq.n c3a9c │ │ + b.n c3efc │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, sp, lr} │ │ - b.n c3d9e │ │ + b.n c3dae │ │ str r4, [r1, r0] │ │ - b.n c3588 │ │ + b.n c3598 │ │ movs r0, #8 │ │ - b.n c358c │ │ + b.n c359c │ │ movs r5, r0 │ │ - b.n c3aba │ │ + b.n c3aca │ │ adds r0, #2 │ │ - b.n c3ac0 │ │ + b.n c3ad0 │ │ movs r0, r0 │ │ - b.n c3d98 │ │ + b.n c3da8 │ │ movs r2, r2 │ │ subs r0, r0, r0 │ │ str r6, [r0, r0] │ │ - b.n c3dba │ │ + b.n c3dca │ │ movs r7, r5 │ │ and.w r0, r0, r0, lsl #8 │ │ - b.n c362c │ │ + b.n c363c │ │ subs r1, r2, #7 │ │ - b.n c40a4 │ │ + b.n c40b4 │ │ movs r1, r0 │ │ - b.n c40ae │ │ + b.n c40be │ │ movs r5, r6 │ │ subs r0, r0, r0 │ │ movs r0, #24 │ │ - b.n c35ba │ │ + b.n c35ca │ │ strb r1, [r0, #0] │ │ - b.n c3f18 │ │ + b.n c3f28 │ │ adds r0, #180 @ 0xb4 │ │ - b.n c3e42 │ │ + b.n c3e52 │ │ movs r0, r0 │ │ - b.n c4142 │ │ + b.n c4152 │ │ adds r0, #7 │ │ - b.n c3da8 │ │ + b.n c3db8 │ │ adds r0, #180 @ 0xb4 │ │ - b.n c3e2e │ │ + b.n c3e3e │ │ mrc2 10, 6, r0, cr9, cr15, {7} @ │ │ str r4, [r0, r0] │ │ - b.n c3fb2 │ │ + b.n c3fc2 │ │ adds r0, #0 │ │ - b.n c41f2 │ │ + b.n c4202 │ │ adds r0, #188 @ 0xbc │ │ - b.n c35ba │ │ + b.n c35ca │ │ asrs r0, r6, #2 │ │ - b.n c3e44 │ │ - beq.n c3af4 │ │ - b.n c3f54 │ │ + b.n c3e54 │ │ + beq.n c3b04 │ │ + b.n c3f64 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, r2, r3} │ │ - b.n c3b18 │ │ + b.n c3b28 │ │ adds r0, #12 │ │ - b.n c3b1a │ │ + b.n c3b2a │ │ movs r3, r0 │ │ - b.n c3dee │ │ + b.n c3dfe │ │ movs r0, r6 │ │ lsrs r0, r0, #8 │ │ movs r0, r2 │ │ - b.n c35f8 │ │ + b.n c3608 │ │ movs r0, r0 │ │ - b.n c417a │ │ + b.n c418a │ │ movs r6, r7 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n c3e22 │ │ + b.n c3e32 │ │ asrs r2, r1, #32 │ │ - b.n c3e26 │ │ - bhi.n c3aaa │ │ + b.n c3e36 │ │ + bhi.n c3aba │ │ @ instruction: 0xebff0000 │ │ - b.n c418e │ │ + b.n c419e │ │ lsls r4, r0, #1 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, r0] │ │ - b.n c3e36 │ │ + b.n c3e46 │ │ lsrs r5, r1, #8 │ │ orn r0, r6, #2179072 @ 0x214000 │ │ - b.n c3e3e │ │ + b.n c3e4e │ │ movs r0, #10 │ │ - b.n c3e42 │ │ + b.n c3e52 │ │ movs r0, r0 │ │ - b.n c3632 │ │ + b.n c3642 │ │ lsrs r5, r1, #8 │ │ orr.w r0, r1, #8388608 @ 0x800000 │ │ - b.n c3610 │ │ + b.n c3620 │ │ asrs r5, r0, #32 │ │ - b.n c3e52 │ │ + b.n c3e62 │ │ movs r4, r1 │ │ - b.n c363e │ │ - bls.n c3b2a │ │ + b.n c364e │ │ + bls.n c3b3a │ │ @ instruction: 0xebff0000 │ │ - b.n c41be │ │ + b.n c41ce │ │ @ instruction: 0xff871aff │ │ movs r4, r1 │ │ - b.n c364e │ │ + b.n c365e │ │ lsls r0, r0, #1 │ │ - b.n c364a │ │ + b.n c365a │ │ str r0, [r1, #4] │ │ - b.n c364e │ │ + b.n c365e │ │ movs r5, #208 @ 0xd0 │ │ - b.n c3ebe │ │ + b.n c3ece │ │ movs r2, r1 │ │ - b.n c3c5a │ │ + b.n c3c6a │ │ asrs r0, r0, #32 │ │ - b.n c4080 │ │ + b.n c4090 │ │ lsls r0, r6, #23 │ │ - b.n c3eca │ │ + b.n c3eda │ │ lsls r0, r0, #1 │ │ - b.n c367c │ │ + b.n c368c │ │ asrs r4, r2, #1 │ │ - b.n c3680 │ │ + b.n c3690 │ │ movs r0, #0 │ │ - b.n c366a │ │ + b.n c367a │ │ lsrs r1, r0, #32 │ │ - b.n c4170 │ │ + b.n c4180 │ │ lsls r4, r0, #1 │ │ - b.n c368c │ │ + b.n c369c │ │ movs r0, #0 │ │ - b.n c3656 │ │ + b.n c3666 │ │ movs r4, r2 │ │ - b.n c4064 │ │ + b.n c4074 │ │ mcr2 10, 5, r1, cr15, cr15, {7} @ │ │ asrs r0, r1, #1 │ │ - b.n c369c │ │ + b.n c36ac │ │ @ instruction: 0xfbfbeaff │ │ movs r0, #16 │ │ - b.n c3692 │ │ + b.n c36a2 │ │ adds r0, #0 │ │ - b.n c42ae │ │ + b.n c42be │ │ adds r0, #8 │ │ - b.n c3676 │ │ + b.n c3686 │ │ asrs r0, r6, #2 │ │ - b.n c3f00 │ │ - beq.n c3bb0 │ │ - b.n c4010 │ │ + b.n c3f10 │ │ + beq.n c3bc0 │ │ + b.n c4020 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r5, r6} │ │ - b.n c409c │ │ + b.n c40ac │ │ asrs r4, r0, #32 │ │ - b.n c3ec6 │ │ + b.n c3ed6 │ │ movs r0, #1 │ │ - b.n c42ca │ │ + b.n c42da │ │ adds r0, #0 │ │ - b.n c42ce │ │ - blt.n c3a94 │ │ + b.n c42de │ │ + blt.n c3aa4 │ │ @ instruction: 0xebffff45 │ │ @ instruction: 0xeaff0030 │ │ - b.n c4030 │ │ + b.n c4040 │ │ movs r0, #6 │ │ - b.n c3ede │ │ - bhi.n c3c0c │ │ + b.n c3eee │ │ + bhi.n c3c1c │ │ @ instruction: 0xebff002c │ │ - b.n c35dc │ │ + b.n c35ec │ │ movs r0, r0 │ │ - b.n c424a │ │ + b.n c425a │ │ mrc2 10, 4, r1, cr8, cr15, {7} @ │ │ str r0, [r6, r0] │ │ - b.n c35e8 │ │ + b.n c35f8 │ │ @ instruction: 0xffe1eaff │ │ asrs r0, r0, #3 │ │ - b.n c36f8 │ │ + b.n c3708 │ │ movs r1, r0 │ │ - b.n c42fe │ │ + b.n c430e │ │ adds r0, #188 @ 0xbc │ │ - b.n c3700 │ │ + b.n c3710 │ │ asrs r1, r0, #32 │ │ - b.n c3ce4 │ │ + b.n c3cf4 │ │ movs r0, #0 │ │ - b.n c36e4 │ │ + b.n c36f4 │ │ adds r0, #3 │ │ - b.n c3cec │ │ + b.n c3cfc │ │ movs r5, #153 @ 0x99 │ │ - b.n c41d2 │ │ - ldrb r4, [r2, r6] │ │ + b.n c41e2 │ │ + ldrb r3, [r2, r6] │ │ @ instruction: 0xebffff46 │ │ @ instruction: 0xeaff0088 │ │ - b.n c371c │ │ + b.n c372c │ │ asrs r1, r6, #30 │ │ - b.n c41f2 │ │ + b.n c4202 │ │ subs r7, r7, #7 │ │ - b.n c4284 │ │ + b.n c4294 │ │ ands r4, r2 │ │ - b.n c40ec │ │ + b.n c40fc │ │ movs r0, r0 │ │ - b.n c3d0c │ │ + b.n c3d1c │ │ lsls r2, r3, #1 │ │ - b.n c3792 │ │ + b.n c37a2 │ │ movs r0, r0 │ │ - b.n c4296 │ │ + b.n c42a6 │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n c3f3e │ │ - beq.n c3c38 │ │ - b.n c4098 │ │ + b.n c3f4e │ │ + beq.n c3c48 │ │ + b.n c40a8 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3} │ │ - b.n c434a │ │ - beq.n c3c44 │ │ - b.n c40a4 │ │ + b.n c435a │ │ + beq.n c3c54 │ │ + b.n c40b4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r4, r6, ip} │ │ - b.n c3754 │ │ + b.n c3764 │ │ adds r0, #84 @ 0x54 │ │ - b.n c3758 │ │ + b.n c3768 │ │ lsls r4, r2, #1 │ │ - b.n c375c │ │ + b.n c376c │ │ asrs r1, r0, #32 │ │ - b.n c3d40 │ │ + b.n c3d50 │ │ adds r0, #3 │ │ - b.n c3d44 │ │ + b.n c3d54 │ │ movs r0, #24 │ │ - b.n c3744 │ │ + b.n c3754 │ │ movs r0, r0 │ │ - b.n c3d4c │ │ + b.n c3d5c │ │ movs r3, #223 @ 0xdf │ │ - b.n c4232 │ │ + b.n c4242 │ │ lsls r1, r0, #10 │ │ stmia.w sp, {r0} │ │ - b.n c437a │ │ + b.n c438a │ │ strh r4, [r1, #0] │ │ - b.n c3758 │ │ - b.n c3c60 │ │ - b.n c375c │ │ + b.n c3768 │ │ + b.n c3c70 │ │ + b.n c376c │ │ stmia r0!, {r2, r4} │ │ - b.n c3760 │ │ + b.n c3770 │ │ str r4, [r3, r0] │ │ - b.n c3764 │ │ - ldrb r6, [r6, r5] │ │ + b.n c3774 │ │ + ldrb r5, [r6, r5] │ │ @ instruction: 0xebff0004 │ │ - b.n c3f92 │ │ - beq.n c3c8c │ │ - b.n c40ec │ │ + b.n c3fa2 │ │ + beq.n c3c9c │ │ + b.n c40fc │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r3, pc} │ │ - b.n c3f9e │ │ + b.n c3fae │ │ str r0, [r1, r1] │ │ - b.n c379c │ │ + b.n c37ac │ │ str r0, [sp, #304] @ 0x130 │ │ - b.n c37a0 │ │ + b.n c37b0 │ │ @ instruction: 0xfab2eaff │ │ - add r4, sp, #384 @ 0x180 │ │ + add r4, sp, #448 @ 0x1c0 │ │ movs r1, r0 │ │ - strb r1, [r0, r3] │ │ - @ instruction: 0xfff44f0a │ │ - vqshlu.s32 d25, d10, #20 │ │ - vqrdmlsh.s q13, q2, d20[0] │ │ + strh r3, [r3, r7] │ │ + vqrdmlah.s q10, q2, d5[0] │ │ + vqabs.s16 , q5 │ │ + vcvt.u32.f32 q13, q10, #12 │ │ movs r1, r0 │ │ - strb r5, [r3, r4] │ │ - @ instruction: 0xfff46e9c │ │ + strb r7, [r6, r0] │ │ + @ instruction: 0xfff46e04 │ │ @ instruction: 0xfff44bf0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n c41a8 │ │ - beq.n c3ca0 │ │ - b.n c412c │ │ + b.n c41b8 │ │ + beq.n c3cb0 │ │ + b.n c413c │ │ ands r0, r0 │ │ - b.n c3fd6 │ │ + b.n c3fe6 │ │ movs r4, r0 │ │ - b.n c383a │ │ + b.n c384a │ │ movs r1, r0 │ │ - b.n c42be │ │ + b.n c42ce │ │ lsls r6, r2, #1 │ │ subs r0, r0, r0 │ │ str r4, [r1, r0] │ │ - b.n c37ce │ │ + b.n c37de │ │ adds r5, #86 @ 0x56 │ │ - b.n c42b4 │ │ + b.n c42c4 │ │ adds r5, #85 @ 0x55 │ │ - b.n c4338 │ │ + b.n c4348 │ │ lsls r0, r7, #8 │ │ - b.n c37dc │ │ + b.n c37ec │ │ movs r1, r0 │ │ - b.n c41b6 │ │ + b.n c41c6 │ │ lsls r0, r7, #8 │ │ - b.n c37c4 │ │ + b.n c37d4 │ │ movs r3, r0 │ │ - b.n c3f5e │ │ + b.n c3f6e │ │ movs r2, r2 │ │ cmp r2, #0 │ │ movs r0, r1 │ │ - b.n c37ee │ │ + b.n c37fe │ │ adds r0, #0 │ │ - b.n c386a │ │ + b.n c387a │ │ movs r1, r0 │ │ - b.n c42f4 │ │ + b.n c4304 │ │ movs r0, r3 │ │ lsrs r0, r0, #8 │ │ adds r0, #12 │ │ - b.n c37fe │ │ + b.n c380e │ │ strb r4, [r1, #1] │ │ - b.n c3800 │ │ + b.n c3810 │ │ movs r7, r0 │ │ - b.n c3f7e │ │ + b.n c3f8e │ │ movs r1, r4 │ │ lsrs r0, r0, #8 │ │ str r4, [r0, #4] │ │ - b.n c3810 │ │ + b.n c3820 │ │ strb r1, [r0, #0] │ │ - b.n c41f8 │ │ + b.n c4208 │ │ movs r0, r0 │ │ - b.n c3f9c │ │ + b.n c3fac │ │ adds r0, #178 @ 0xb2 │ │ - b.n c409e │ │ + b.n c40ae │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ lsls r2, r6, #14 │ │ - b.n c40a6 │ │ + b.n c40b6 │ │ movs r0, r0 │ │ - b.n c3e04 │ │ + b.n c3e14 │ │ adds r0, #33 @ 0x21 │ │ - b.n c4202 │ │ + b.n c4212 │ │ movs r1, r3 │ │ and.w r0, r0, lr, lsr #12 │ │ - b.n c4210 │ │ + b.n c4220 │ │ movs r7, r2 │ │ and.w r0, r0, r6 │ │ - b.n c38bc │ │ + b.n c38cc │ │ movs r0, r1 │ │ - b.n c4336 │ │ + b.n c4346 │ │ @ instruction: 0xffe91aff │ │ movs r5, r0 │ │ - b.n c405e │ │ + b.n c406e │ │ str r2, [r0, #0] │ │ - b.n c4062 │ │ + b.n c4072 │ │ strb r1, [r0, #0] │ │ - b.n c4066 │ │ + b.n c4076 │ │ lsrs r2, r6, #10 │ │ add.w r0, r0, r7, lsl #4 │ │ - b.n c406e │ │ + b.n c407e │ │ movs r0, #6 │ │ - b.n c4072 │ │ + b.n c4082 │ │ @ instruction: 0xffe2eaff │ │ movs r4, r0 │ │ - b.n c407a │ │ + b.n c408a │ │ str r2, [r0, #0] │ │ - b.n c407e │ │ + b.n c408e │ │ strb r1, [r0, #0] │ │ - b.n c4082 │ │ + b.n c4092 │ │ lsrs r5, r3, #9 │ │ add.w r0, r0, r0 │ │ - b.n c43ea │ │ + b.n c43fa │ │ lsls r5, r4, #1 │ │ subs r0, r0, r0 │ │ movs r0, r1 │ │ - b.n c387a │ │ + b.n c388a │ │ asrs r7, r0, #32 │ │ - b.n c4096 │ │ + b.n c40a6 │ │ movs r0, #6 │ │ - b.n c409a │ │ + b.n c40aa │ │ adds r0, #12 │ │ - b.n c3886 │ │ + b.n c3896 │ │ strb r4, [r1, #1] │ │ - b.n c3888 │ │ + b.n c3898 │ │ movs r7, r0 │ │ - b.n c4006 │ │ + b.n c4016 │ │ @ instruction: 0xffdd1aff │ │ adds r0, #27 │ │ - b.n c44ae │ │ + b.n c44be │ │ movs r0, r0 │ │ - b.n c4414 │ │ + b.n c4424 │ │ strb r3, [r0, #2] │ │ - b.n c40b6 │ │ + b.n c40c6 │ │ movs r4, r0 │ │ asrs r1, r2, #22 │ │ adds r2, #64 @ 0x40 │ │ - b.n c38a8 │ │ + b.n c38b8 │ │ asrs r1, r0, #32 │ │ asrs r0, r0, #10 │ │ lsls r0, r0, #1 │ │ - b.n c38b0 │ │ + b.n c38c0 │ │ asrs r1, r0, #32 │ │ lsls r0, r4, #14 │ │ movs r0, r0 │ │ - b.n c4432 │ │ + b.n c4442 │ │ movs r0, #4 │ │ asrs r2, r2, #22 │ │ movs r0, #0 │ │ lsls r0, r4, #14 │ │ asrs r1, r0, #32 │ │ - b.n c3e9e │ │ + b.n c3eae │ │ asrs r1, r0, #32 │ │ - b.n c4520 │ │ + b.n c4530 │ │ movs r0, #92 @ 0x5c │ │ - b.n c3942 │ │ + b.n c3952 │ │ asrs r0, r1, #32 │ │ - b.n c42a8 │ │ + b.n c42b8 │ │ movs r0, r0 │ │ - b.n c4450 │ │ + b.n c4460 │ │ asrs r1, r6, #8 │ │ - b.n c3ebc │ │ + b.n c3ecc │ │ asrs r1, r0, #32 │ │ - b.n c42b4 │ │ + b.n c42c4 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ movs r2, #60 @ 0x3c │ │ - b.n c38e4 │ │ + b.n c38f4 │ │ strb r4, [r1, #9] │ │ - b.n c38e8 │ │ + b.n c38f8 │ │ movs r0, #7 │ │ - b.n c3ec6 │ │ + b.n c3ed6 │ │ movs r0, #2 │ │ - b.n c3e48 │ │ + b.n c3e58 │ │ movs r1, r0 │ │ and.w r2, r0, ip, lsl #29 │ │ - b.n c38f8 │ │ + b.n c3908 │ │ movs r0, #0 │ │ - b.n c4512 │ │ + b.n c4522 │ │ str r0, [r1, #0] │ │ - b.n c42dc │ │ + b.n c42ec │ │ movs r0, r0 │ │ - b.n c4480 │ │ + b.n c4490 │ │ ldr r5, [r4, #96] @ 0x60 │ │ lsls r5, r0, #10 │ │ lsls r0, r7, #2 │ │ - b.n c3902 │ │ + b.n c3912 │ │ adds r0, #0 │ │ - b.n c3912 │ │ + b.n c3922 │ │ movs r0, r0 │ │ - b.n c3ef8 │ │ + b.n c3f08 │ │ adds r0, #3 │ │ - b.n c3ef0 │ │ + b.n c3f00 │ │ adds r0, #0 │ │ - b.n c3e78 │ │ + b.n c3e88 │ │ movs r0, r0 │ │ - b.n c449c │ │ + b.n c44ac │ │ movs r1, r0 │ │ - bcc.n c3e9e │ │ + bcc.n c3eae │ │ movs r3, r7 │ │ add r2, sp, #0 │ │ str r5, [r2, #12] │ │ - b.n c41aa │ │ + b.n c41ba │ │ movs r0, r0 │ │ - b.n c4546 │ │ + b.n c4556 │ │ movs r0, r0 │ │ - b.n c44b6 │ │ + b.n c44c6 │ │ movs r5, r6 │ │ - ldr r2, [pc, #0] @ (c3e0c ) │ │ + ldr r2, [pc, #0] @ (c3e1c ) │ │ asrs r4, r1, #32 │ │ - b.n c393a │ │ + b.n c394a │ │ movs r0, #4 │ │ - b.n c39b8 │ │ + b.n c39c8 │ │ movs r0, r1 │ │ - b.n c443e │ │ + b.n c444e │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ movs r1, #6 │ │ - b.n c3f2a │ │ + b.n c3f3a │ │ strh r0, [r3, #30] │ │ - b.n c41a8 │ │ + b.n c41b8 │ │ movs r0, #28 │ │ - b.n c394e │ │ + b.n c395e │ │ asrs r0, r0, #32 │ │ - b.n c3952 │ │ + b.n c3962 │ │ movs r0, #4 │ │ - b.n c3956 │ │ + b.n c3966 │ │ asrs r0, r1, #32 │ │ - b.n c3e78 │ │ + b.n c3e88 │ │ movs r0, #9 │ │ - b.n c3e7e │ │ + b.n c3e8e │ │ asrs r2, r0, #32 │ │ - b.n c4160 │ │ + b.n c4170 │ │ movs r0, r5 │ │ lsrs r0, r0, #8 │ │ strb r4, [r3, #0] │ │ - b.n c434e │ │ + b.n c435e │ │ asrs r0, r0, #32 │ │ - b.n c458a │ │ + b.n c459a │ │ asrs r5, r0, #32 │ │ - b.n c39d6 │ │ + b.n c39e6 │ │ movs r1, r1 │ │ and.w r0, r0, r4, lsl #4 │ │ - b.n c4196 │ │ - bvs.n c3ee8 │ │ + b.n c41a6 │ │ + bvs.n c3ef8 │ │ @ instruction: 0xebff0000 │ │ - b.n c44fe │ │ + b.n c450e │ │ movs r0, r4 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n c3a0e │ │ + b.n c3a1e │ │ movs r1, r0 │ │ - b.n c436a │ │ + b.n c437a │ │ movs r5, r0 │ │ - b.n c39f6 │ │ + b.n c3a06 │ │ asrs r0, r6, #1 │ │ - b.n c3bd0 │ │ + b.n c3be0 │ │ movs r6, r0 │ │ - b.n c4118 │ │ + b.n c4128 │ │ movs r0, r3 │ │ ldmia r2!, {} │ │ asrs r1, r6, #1 │ │ - b.n c3bdc │ │ + b.n c3bec │ │ movs r4, r1 │ │ - b.n c39aa │ │ + b.n c39ba │ │ movs r1, #1 │ │ - b.n c3db4 │ │ + b.n c3dc4 │ │ strh r0, [r3, #30] │ │ - b.n c420a │ │ + b.n c421a │ │ asrs r0, r0, #32 │ │ - b.n c39b2 │ │ + b.n c39c2 │ │ adds r0, #4 │ │ - b.n c39b6 │ │ + b.n c39c6 │ │ asrs r0, r1, #32 │ │ - b.n c3ed8 │ │ + b.n c3ee8 │ │ adds r0, #9 │ │ - b.n c3ee0 │ │ + b.n c3ef0 │ │ asrs r3, r0, #32 │ │ - b.n c41c0 │ │ + b.n c41d0 │ │ @ instruction: 0xffeb1aff │ │ strh r0, [r0, r1] │ │ - b.n c39c6 │ │ + b.n c39d6 │ │ movs r0, r0 │ │ - b.n c4554 │ │ + b.n c4564 │ │ @ instruction: 0xffec0aff │ │ asrs r2, r7, #2 │ │ - b.n c4256 │ │ + b.n c4266 │ │ lsls r0, r0, #1 │ │ - b.n c44d8 │ │ + b.n c44e8 │ │ @ instruction: 0xffe91aff │ │ asrs r0, r2, #32 │ │ - b.n c39e2 │ │ + b.n c39f2 │ │ strh r0, [r7, #16] │ │ - b.n c39e2 │ │ + b.n c39f2 │ │ movs r5, r0 │ │ - b.n c4206 │ │ + b.n c4216 │ │ ldmia r0!, {r2, r3, r6, r7} │ │ @ instruction: 0xebff0080 │ │ - b.n c3fce │ │ + b.n c3fde │ │ lsls r0, r0, #4 │ │ - b.n c3fdc │ │ + b.n c3fec │ │ movs r0, r2 │ │ - b.n c39f6 │ │ + b.n c3a06 │ │ strh r4, [r0, #0] │ │ - b.n c38da │ │ + b.n c38ea │ │ @ instruction: 0xffe0eaff │ │ movs r0, r0 │ │ - b.n c4622 │ │ + b.n c4632 │ │ str r5, [r0, #0] │ │ - b.n c3a6e │ │ - beq.n c3f18 │ │ - b.n c4380 │ │ + b.n c3a7e │ │ + beq.n c3f28 │ │ + b.n c4390 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {ip} │ │ - b.n c3a0c │ │ + b.n c3a1c │ │ movs r5, r0 │ │ - b.n c4236 │ │ + b.n c4246 │ │ asrs r4, r0, #32 │ │ - b.n c423a │ │ + b.n c424a │ │ lsrs r5, r2, #9 │ │ add.w r0, r0, r0 │ │ - b.n c45a2 │ │ + b.n c45b2 │ │ @ instruction: 0xfff71aff │ │ @ instruction: 0xffbceaff │ │ - ldr r3, [pc, #960] @ (c42cc ) │ │ + ldr r3, [pc, #960] @ (c42dc ) │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n c442c │ │ - beq.n c3f24 │ │ - b.n c43b0 │ │ + b.n c443c │ │ + beq.n c3f34 │ │ + b.n c43c0 │ │ ands r4, r1 │ │ - b.n c3a3c │ │ + b.n c3a4c │ │ str r0, [r1, #36] @ 0x24 │ │ - b.n c3a46 │ │ + b.n c3a56 │ │ movs r0, r0 │ │ - b.n c45ce │ │ + b.n c45de │ │ movs r7, r6 │ │ lsrs r0, r0, #8 │ │ adds r0, #40 @ 0x28 │ │ - b.n c3a52 │ │ + b.n c3a62 │ │ strb r4, [r6, #8] │ │ - b.n c3a56 │ │ + b.n c3a66 │ │ movs r3, r0 │ │ - b.n c41e0 │ │ + b.n c41f0 │ │ movs r0, r5 │ │ ldrh r0, [r0, #16] │ │ adds r2, #76 @ 0x4c │ │ - b.n c3a62 │ │ + b.n c3a72 │ │ strb r4, [r2, #0] │ │ - b.n c3a6a │ │ + b.n c3a7a │ │ strh r0, [r3, #30] │ │ - b.n c42ca │ │ + b.n c42da │ │ adds r0, #1 │ │ - b.n c43cc │ │ + b.n c43dc │ │ strb r0, [r1, #9] │ │ - b.n c3a52 │ │ + b.n c3a62 │ │ strb r0, [r0, #0] │ │ - b.n c468e │ │ + b.n c469e │ │ adds r2, #76 @ 0x4c │ │ - b.n c3a5a │ │ + b.n c3a6a │ │ str r0, [r6, #12] │ │ - b.n c42d6 │ │ + b.n c42e6 │ │ str r0, [sp, #16] │ │ - b.n c3a66 │ │ + b.n c3a76 │ │ strh r0, [r0, #0] │ │ - b.n c3a6a │ │ + b.n c3a7a │ │ adds r0, #4 │ │ - b.n c3a82 │ │ + b.n c3a92 │ │ movs r0, r0 │ │ - b.n c460c │ │ + b.n c461c │ │ movs r1, r3 │ │ subs r0, r0, r0 │ │ adds r0, #12 │ │ - b.n c3a90 │ │ + b.n c3aa0 │ │ movs r0, r0 │ │ - b.n c3a92 │ │ + b.n c3aa2 │ │ adds r0, #64 @ 0x40 │ │ - b.n c3a9c │ │ + b.n c3aac │ │ movs r0, #186 @ 0xba │ │ - b.n c42fa │ │ + b.n c430a │ │ adds r0, #72 @ 0x48 │ │ - b.n c3aa4 │ │ + b.n c3ab4 │ │ add r8, sl │ │ - b.n c4308 │ │ + b.n c4318 │ │ str r1, [r0, #0] │ │ - b.n c44ae │ │ + b.n c44be │ │ strb r0, [r0, #0] │ │ - b.n c44d4 │ │ + b.n c44e4 │ │ str r0, [r6, #76] @ 0x4c │ │ - b.n c4314 │ │ + b.n c4324 │ │ adds r0, #0 │ │ - b.n c46d2 │ │ + b.n c46e2 │ │ adds r0, #188 @ 0xbc │ │ - b.n c4316 │ │ + b.n c4326 │ │ adds r0, #12 │ │ - b.n c3abc │ │ + b.n c3acc │ │ adds r0, #64 @ 0x40 │ │ - b.n c3ac4 │ │ + b.n c3ad4 │ │ adds r0, #184 @ 0xb8 │ │ - b.n c4348 │ │ + b.n c4358 │ │ adds r0, #20 │ │ - b.n c442c │ │ + b.n c443c │ │ adds r0, #190 @ 0xbe │ │ - b.n c432a │ │ + b.n c433a │ │ adds r0, #16 │ │ - b.n c3ad0 │ │ + b.n c3ae0 │ │ movs r1, r0 │ │ - b.n c43b6 │ │ + b.n c43c6 │ │ movs r0, #1 │ │ - b.n c43f6 │ │ + b.n c4406 │ │ lsrs r4, r3 │ │ - b.n c4340 │ │ + b.n c4350 │ │ str r2, [r0, r0] │ │ - b.n c40c8 │ │ + b.n c40d8 │ │ ands r0, r0 │ │ - b.n c40ca │ │ + b.n c40da │ │ lsrs r4, r7 │ │ - b.n c434c │ │ + b.n c435c │ │ asrs r4, r0, #32 │ │ - b.n c3b6c │ │ + b.n c3b7c │ │ movs r1, r0 │ │ - b.n c45f0 │ │ + b.n c4600 │ │ movs r2, r4 │ │ subs r0, r0, r0 │ │ - beq.n c4004 │ │ - b.n c446c │ │ + beq.n c4014 │ │ + b.n c447c │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {ip, lr} │ │ - b.n c431e │ │ + b.n c432e │ │ movs r4, r0 │ │ - b.n c4322 │ │ + b.n c4332 │ │ str r1, [r0, #0] │ │ - b.n c4326 │ │ + b.n c4336 │ │ strb r2, [r0, #0] │ │ - b.n c432a │ │ - bhi.n c3f30 │ │ + b.n c433a │ │ + bhi.n c3f40 │ │ @ instruction: 0xebff1006 │ │ - b.n c4332 │ │ + b.n c4342 │ │ str r0, [r1, #36] @ 0x24 │ │ - b.n c3b1e │ │ + b.n c3b2e │ │ movs r5, r0 │ │ - b.n c433a │ │ + b.n c434a │ │ movs r0, #7 │ │ - b.n c433e │ │ + b.n c434e │ │ movs r0, r0 │ │ - b.n c46ae │ │ + b.n c46be │ │ @ instruction: 0xffcb1aff │ │ str r2, [r0, #0] │ │ - b.n c434a │ │ + b.n c435a │ │ movs r0, #160 @ 0xa0 │ │ - b.n c3b36 │ │ + b.n c3b46 │ │ strb r1, [r0, #0] │ │ - b.n c4352 │ │ + b.n c4362 │ │ str r0, [r0, r0] │ │ - b.n c3b3a │ │ + b.n c3b4a │ │ movs r0, r0 │ │ - b.n c46c4 │ │ + b.n c46d4 │ │ movs r7, r2 │ │ lsrs r0, r0, #8 │ │ adds r1, #5 │ │ - b.n c3f46 │ │ + b.n c3f56 │ │ str r1, [r0, r0] │ │ - b.n c44b0 │ │ + b.n c44c0 │ │ asrs r0, r0, #1 │ │ - b.n c3b52 │ │ + b.n c3b62 │ │ str r0, [r0, r0] │ │ - b.n c3b32 │ │ + b.n c3b42 │ │ movs r0, #1 │ │ - b.n c4772 │ │ + b.n c4782 │ │ movs r0, #0 │ │ - b.n c3b50 │ │ + b.n c3b60 │ │ movs r0, #4 │ │ - b.n c437a │ │ + b.n c438a │ │ str r0, [r0, r0] │ │ - b.n c437e │ │ - bls.n c4066 │ │ + b.n c438e │ │ + bls.n c4076 │ │ @ instruction: 0xebff0005 │ │ - b.n c4386 │ │ + b.n c4396 │ │ asrs r7, r0, #32 │ │ - b.n c438a │ │ + b.n c439a │ │ movs r0, #6 │ │ - b.n c438e │ │ + b.n c439e │ │ adds r0, #4 │ │ - b.n c3b72 │ │ + b.n c3b82 │ │ movs r0, r0 │ │ - b.n c46fc │ │ + b.n c470c │ │ @ instruction: 0xffc30aff │ │ @ instruction: 0xffdceaff │ │ asrs r4, r3, #5 │ │ - b.n c3a88 │ │ + b.n c3a98 │ │ lsrs r4, r3 │ │ - b.n c43e8 │ │ + b.n c43f8 │ │ adds r0, #2 │ │ - b.n c4174 │ │ + b.n c4184 │ │ movs r0, r0 │ │ - b.n c4176 │ │ + b.n c4186 │ │ movs r4, r1 │ │ - b.n c3b74 │ │ + b.n c3b84 │ │ adds r0, #16 │ │ - b.n c3b78 │ │ - beq.n c40a8 │ │ - b.n c4510 │ │ + b.n c3b88 │ │ + beq.n c40b8 │ │ + b.n c4520 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r0, r1, r2, ip} │ │ - b.n c43c2 │ │ + b.n c43d2 │ │ movs r0, #1 │ │ - b.n c47c6 │ │ + b.n c47d6 │ │ adds r0, #0 │ │ - b.n c47ca │ │ + b.n c47da │ │ ands r0, r0 │ │ - b.n c43ce │ │ + b.n c43de │ │ str r7, [r0, r0] │ │ - b.n c43d2 │ │ - bge.n c4116 │ │ + b.n c43e2 │ │ + bge.n c4126 │ │ @ instruction: 0xebff0004 │ │ - b.n c43da │ │ + b.n c43ea │ │ @ instruction: 0xffe9eaff │ │ - ldr r3, [pc, #960] @ (c4460 ) │ │ + ldr r3, [pc, #960] @ (c4470 ) │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n c45c0 │ │ - beq.n c40b8 │ │ - b.n c4544 │ │ + b.n c45d0 │ │ + beq.n c40c8 │ │ + b.n c4554 │ │ strh r1, [r0, #0] │ │ - b.n c43ee │ │ + b.n c43fe │ │ asrs r5, r2, #3 │ │ - b.n c4452 │ │ + b.n c4462 │ │ movs r0, #129 @ 0x81 │ │ - b.n c41b6 │ │ + b.n c41c6 │ │ asrs r1, r0, #4 │ │ - b.n c41ba │ │ + b.n c41ca │ │ str r4, [r3, #0] │ │ - b.n c3be0 │ │ + b.n c3bf0 │ │ movs r7, #188 @ 0xbc │ │ - b.n c4466 │ │ + b.n c4476 │ │ str r4, [r2, r0] │ │ - b.n c45d2 │ │ + b.n c45e2 │ │ asrs r2, r0, #2 │ │ - b.n c440a │ │ + b.n c441a │ │ str r0, [sp, #20] │ │ - b.n c440e │ │ + b.n c441e │ │ adds r0, #177 @ 0xb1 │ │ - b.n c4444 │ │ + b.n c4454 │ │ movs r0, #4 │ │ - b.n c3c06 │ │ + b.n c3c16 │ │ strb r3, [r0, #0] │ │ - b.n c41e4 │ │ + b.n c41f4 │ │ ands r1, r0 │ │ - b.n c45e2 │ │ + b.n c45f2 │ │ asrs r6, r6, #2 │ │ - b.n c4490 │ │ + b.n c44a0 │ │ ands r1, r0 │ │ - b.n c486e │ │ + b.n c487e │ │ asrs r1, r0, #32 │ │ - b.n c45ec │ │ + b.n c45fc │ │ asrs r1, r0, #32 │ │ - b.n c4870 │ │ + b.n c4880 │ │ ands r1, r0 │ │ - b.n c419a │ │ + b.n c41aa │ │ movs r6, r4 │ │ lsrs r0, r0, #8 │ │ asrs r4, r7, #2 │ │ - b.n c44a6 │ │ + b.n c44b6 │ │ stmia r0!, {r1, r2, r3, r4, r5, r7} │ │ - b.n c44aa │ │ + b.n c44ba │ │ movs r0, #1 │ │ - b.n c419a │ │ + b.n c41aa │ │ movs r2, r0 │ │ - b.n c43ae │ │ + b.n c43be │ │ movs r4, r1 │ │ - bge.n c410a │ │ + bge.n c411a │ │ asrs r0, r0, #32 │ │ - b.n c484e │ │ + b.n c485e │ │ str r0, [r0, r0] │ │ - b.n c3c40 │ │ + b.n c3c50 │ │ str r0, [r0, #0] │ │ - b.n c4456 │ │ + b.n c4466 │ │ lsls r5, r7, #1 │ │ add.w r7, r0, r1 │ │ - b.n c485e │ │ + b.n c486e │ │ asrs r0, r1, #32 │ │ - b.n c4462 │ │ + b.n c4472 │ │ movs r0, r0 │ │ - b.n c3c40 │ │ + b.n c3c50 │ │ movs r6, r0 │ │ - b.n c446a │ │ + b.n c447a │ │ movs r0, #0 │ │ - b.n c486e │ │ + b.n c487e │ │ adds r0, #5 │ │ - b.n c4472 │ │ + b.n c4482 │ │ lsls r5, r0, #3 │ │ @ instruction: 0xeb00d018 │ │ - b.n c45d0 │ │ + b.n c45e0 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r0, r5, r7} │ │ - b.n c44a2 │ │ + b.n c44b2 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ asrs r5, r0, #32 │ │ - b.n c448a │ │ + b.n c449a │ │ strb r0, [r6, #2] │ │ - b.n c44f0 │ │ + b.n c4500 │ │ movs r3, r0 │ │ - b.n c4400 │ │ + b.n c4410 │ │ movs r0, #4 │ │ str r0, [sp, #284] @ 0x11c │ │ movs r0, #176 @ 0xb0 │ │ str r1, [sp, #772] @ 0x304 │ │ asrs r2, r0, #32 │ │ - b.n c4660 │ │ + b.n c4670 │ │ movs r1, r0 │ │ - b.n c4602 │ │ + b.n c4612 │ │ @ instruction: 0xfff81aff │ │ movs r0, #12 │ │ - b.n c41f0 │ │ + b.n c4200 │ │ asrs r4, r1, #32 │ │ - b.n c4278 │ │ + b.n c4288 │ │ movs r4, r0 │ │ - b.n c41f4 │ │ + b.n c4204 │ │ movs r0, #8 │ │ - b.n c467a │ │ - add r3, r4 │ │ + b.n c468a │ │ + add r3, ip │ │ @ instruction: 0xfb0000be │ │ - b.n c452a │ │ + b.n c453a │ │ asrs r0, r6, #2 │ │ - b.n c4534 │ │ + b.n c4544 │ │ movs r4, r0 │ │ - b.n c4206 │ │ + b.n c4216 │ │ lsls r6, r7, #2 │ │ - b.n c4516 │ │ + b.n c4526 │ │ movs r0, #4 │ │ - b.n c3cbe │ │ + b.n c3cce │ │ strb r1, [r0, #0] │ │ - b.n c429c │ │ + b.n c42ac │ │ movs r0, r0 │ │ - b.n c483a │ │ + b.n c484a │ │ movs r0, #182 @ 0xb6 │ │ - b.n c4528 │ │ + b.n c4538 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n c3cd2 │ │ + b.n c3ce2 │ │ movs r0, r1 │ │ - b.n c46b4 │ │ - add lr, r0 │ │ + b.n c46c4 │ │ + add r3, r9 │ │ mla r0, r0, r0, r0 │ │ - b.n c48ee │ │ - beq.n c41e0 │ │ - b.n c4648 │ │ + b.n c48fe │ │ + beq.n c41f0 │ │ + b.n c4658 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, fp, lr} │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n c46d8 │ │ + b.n c46e8 │ │ cmp lr, r6 │ │ - b.n c4562 │ │ + b.n c4572 │ │ stmia r0!, {} │ │ - b.n c4906 │ │ + b.n c4916 │ │ movs r3, r0 │ │ - b.n c4472 │ │ + b.n c4482 │ │ movs r1, r1 │ │ subs r2, #0 │ │ str r3, [r0, #0] │ │ - b.n c42d6 │ │ - b.n c3d34 │ │ - b.n c4576 │ │ + b.n c42e6 │ │ + b.n c3d44 │ │ + b.n c4586 │ │ str r1, [r0, r0] │ │ - b.n c46e6 │ │ + b.n c46f6 │ │ strb r1, [r0, #0] │ │ - b.n c4968 │ │ + b.n c4978 │ │ movs r6, r1 │ │ - b.n c4490 │ │ + b.n c44a0 │ │ movs r3, r0 │ │ ldrh r0, [r0, #16] │ │ strb r4, [r6, r6] │ │ - b.n c458a │ │ + b.n c459a │ │ movs r5, r0 │ │ - b.n c42fc │ │ + b.n c430c │ │ movs r1, r0 │ │ - b.n c4492 │ │ + b.n c44a2 │ │ movs r3, r0 │ │ ldr r2, [sp, #0] │ │ movs r2, r0 │ │ - b.n c453a │ │ + b.n c454a │ │ movs r1, r0 │ │ - b.n c45fe │ │ + b.n c460e │ │ movs r0, r0 │ │ - b.n c431a │ │ + b.n c432a │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r0, r1, r7} │ │ - b.n c44b2 │ │ + b.n c44c2 │ │ movs r6, r0 │ │ subs r2, #0 │ │ movs r3, r0 │ │ - b.n c431e │ │ + b.n c432e │ │ strb r1, [r0, #0] │ │ - b.n c4716 │ │ + b.n c4726 │ │ strb r1, [r0, #0] │ │ - b.n c49a8 │ │ + b.n c49b8 │ │ movs r6, r1 │ │ - b.n c44cc │ │ + b.n c44dc │ │ strb r5, [r0, #0] │ │ str r0, [sp, #540] @ 0x21c │ │ movs r1, r0 │ │ str r1, [sp, #348] @ 0x15c │ │ movs r4, r0 │ │ ldr r2, [sp, #0] │ │ movs r6, r0 │ │ - b.n c456e │ │ + b.n c457e │ │ stmia r0!, {r0, r1} │ │ - b.n c4572 │ │ + b.n c4582 │ │ movs r1, r0 │ │ - b.n c4636 │ │ + b.n c4646 │ │ movs r0, r0 │ │ - b.n c4352 │ │ + b.n c4362 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r0, r1, r7, ip, sp, lr} │ │ - b.n c4348 │ │ + b.n c4358 │ │ stmia r0!, {r0, r1, r7} │ │ - b.n c4586 │ │ + b.n c4596 │ │ movs r4, r0 │ │ - b.n c44f8 │ │ + b.n c4508 │ │ @ instruction: 0xffea8aff │ │ str r0, [sp, #12] │ │ - b.n c4352 │ │ + b.n c4362 │ │ str r1, [r0, #0] │ │ - b.n c4768 │ │ + b.n c4778 │ │ str r1, [r0, #0] │ │ - b.n c49e6 │ │ + b.n c49f6 │ │ movs r6, r1 │ │ - b.n c450a │ │ + b.n c451a │ │ str r5, [r0, #0] │ │ str r0, [sp, #536] @ 0x218 │ │ movs r1, r0 │ │ str r1, [sp, #344] @ 0x158 │ │ @ instruction: 0xffe38aff │ │ lsls r3, r0, #4 │ │ - b.n c4516 │ │ + b.n c4526 │ │ movs r4, r0 │ │ cmp r2, #0 │ │ movs r1, r1 │ │ - b.n c45b6 │ │ + b.n c45c6 │ │ stmia r0!, {r0, r1, r2} │ │ - b.n c45ba │ │ + b.n c45ca │ │ movs r1, r0 │ │ - b.n c467e │ │ + b.n c468e │ │ movs r0, r0 │ │ - b.n c439a │ │ + b.n c43aa │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r0, r1, pc} │ │ - b.n c439c │ │ + b.n c43ac │ │ movs r1, r0 │ │ - b.n c479e │ │ + b.n c47ae │ │ movs r1, r0 │ │ - b.n c4a12 │ │ + b.n c4a22 │ │ movs r6, r1 │ │ - b.n c4536 │ │ + b.n c4546 │ │ @ instruction: 0xfff58aff │ │ movs r5, r0 │ │ - b.n c439e │ │ + b.n c43ae │ │ stmia r0!, {r0, r1, r2} │ │ - b.n c45e2 │ │ + b.n c45f2 │ │ movs r1, r0 │ │ - b.n c4546 │ │ + b.n c4556 │ │ movs r1, r1 │ │ - b.n c45ea │ │ + b.n c45fa │ │ @ instruction: 0xffd28aff │ │ lsls r3, r0, #4 │ │ - b.n c43b8 │ │ + b.n c43c8 │ │ stmia r1!, {r0, r1} │ │ - b.n c45f6 │ │ + b.n c4606 │ │ movs r4, r0 │ │ - b.n c455a │ │ + b.n c456a │ │ movs r3, r0 │ │ ldr r2, [sp, #0] │ │ movs r0, r1 │ │ - b.n c4602 │ │ + b.n c4612 │ │ movs r1, r0 │ │ - b.n c46c6 │ │ + b.n c46d6 │ │ movs r0, r0 │ │ - b.n c43e2 │ │ + b.n c43f2 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r0, r1, ip, sp} │ │ - b.n c43e2 │ │ + b.n c43f2 │ │ strb r0, [r0, #0] │ │ - b.n c4a16 │ │ + b.n c4a26 │ │ adds r0, #1 │ │ - b.n c47e0 │ │ + b.n c47f0 │ │ ands r0, r0 │ │ - b.n c4a1e │ │ + b.n c4a2e │ │ adds r0, #1 │ │ - b.n c4a68 │ │ + b.n c4a78 │ │ movs r6, r1 │ │ - b.n c458c │ │ + b.n c459c │ │ adds r0, #5 │ │ - b.n c43f0 │ │ + b.n c4400 │ │ strb r1, [r0, #0] │ │ strh r0, [r0, #24] │ │ movs r1, r0 │ │ - b.n c4598 │ │ + b.n c45a8 │ │ ands r1, r0 │ │ strh r0, [r0, #24] │ │ asrs r4, r0, #32 │ │ - b.n c4628 │ │ + b.n c4638 │ │ strh r2, [r0, #0] │ │ lsls r0, r0, #2 │ │ stmia r0!, {} │ │ lsls r0, r4, #6 │ │ movs r0, r1 │ │ - b.n c4646 │ │ + b.n c4656 │ │ movs r1, r0 │ │ - b.n c470a │ │ + b.n c471a │ │ movs r0, r0 │ │ - b.n c4426 │ │ + b.n c4436 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, fp, lr} │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n c4834 │ │ + b.n c4844 │ │ movs r0, #213 @ 0xd5 │ │ - b.n c46be │ │ + b.n c46ce │ │ adds r1, #2 │ │ - b.n c4422 │ │ + b.n c4432 │ │ lsls r2, r0, #2 │ │ - b.n c4426 │ │ + b.n c4436 │ │ strh r4, [r3, #0] │ │ - b.n c3e50 │ │ + b.n c3e60 │ │ lsls r4, r7, #30 │ │ - b.n c46ce │ │ + b.n c46de │ │ stmia r0!, {r2, r3, r4, r5, r7} │ │ - b.n c46e2 │ │ + b.n c46f2 │ │ lsls r2, r7 │ │ - b.n c46e6 │ │ + b.n c46f6 │ │ movs r0, #172 @ 0xac │ │ - b.n c467a │ │ + b.n c468a │ │ movs r0, r4 │ │ - b.n c4966 │ │ + b.n c4976 │ │ movs r6, r3 │ │ subs r0, r0, r0 │ │ strb r4, [r2, #0] │ │ - b.n c4856 │ │ + b.n c4866 │ │ movs r2, r0 │ │ - b.n c4972 │ │ + b.n c4982 │ │ asrs r0, r0, #2 │ │ - b.n c445c │ │ + b.n c446c │ │ str r0, [sp, #704] @ 0x2c0 │ │ - b.n c46f4 │ │ + b.n c4704 │ │ str r1, [r1, r0] │ │ - b.n c4464 │ │ + b.n c4474 │ │ asrs r6, r6, #2 │ │ - b.n c4704 │ │ + b.n c4714 │ │ asrs r0, r1, #32 │ │ - b.n c4860 │ │ + b.n c4870 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ ands r4, r0 │ │ - b.n c3f10 │ │ - b.n c4370 │ │ - b.n c4aaa │ │ + b.n c3f20 │ │ + b.n c4380 │ │ + b.n c4aba │ │ movs r1, r0 │ │ - b.n c4996 │ │ - b.n c4370 │ │ + b.n c49a6 │ │ + b.n c4380 │ │ lsls r5, r2, #22 │ │ asrs r1, r0, #32 │ │ - b.n c4492 │ │ + b.n c44a2 │ │ asrs r1, r0, #32 │ │ - b.n c487c │ │ + b.n c488c │ │ ldrsh r6, [r7, r7] │ │ - b.n c499c │ │ + b.n c49ac │ │ str r5, [r0, r0] │ │ - b.n c4384 │ │ - b.n c4386 │ │ - b.n c4b08 │ │ + b.n c4394 │ │ + b.n c4396 │ │ + b.n c4b18 │ │ movs r2, r0 │ │ - b.n c4a42 │ │ + b.n c4a52 │ │ movs r7, r3 │ │ cmp r2, #0 │ │ lsls r6, r7, #2 │ │ - b.n c4742 │ │ + b.n c4752 │ │ asrs r0, r0, #32 │ │ - b.n c44a4 │ │ + b.n c44b4 │ │ movs r0, #0 │ │ - b.n c442c │ │ + b.n c443c │ │ movs r6, r1 │ │ - b.n c44a0 │ │ - bics r1, r3 │ │ + b.n c44b0 │ │ + mvns r1, r3 │ │ @ instruction: 0xfb0000bc │ │ - b.n c4756 │ │ + b.n c4766 │ │ asrs r6, r7, #2 │ │ - b.n c475a │ │ + b.n c476a │ │ movs r2, r0 │ │ - b.n c482e │ │ + b.n c483e │ │ lsls r4, r7, #2 │ │ - b.n c4742 │ │ + b.n c4752 │ │ movs r5, r0 │ │ - b.n c44b8 │ │ + b.n c44c8 │ │ lsls r6, r7, #2 │ │ - b.n c474a │ │ + b.n c475a │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {ip, sp} │ │ - b.n c4782 │ │ + b.n c4792 │ │ movs r0, #3 │ │ - b.n c44ea │ │ + b.n c44fa │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ adds r0, #184 @ 0xb8 │ │ - b.n c477e │ │ + b.n c478e │ │ lsls r2, r2, #6 │ │ - b.n c43d6 │ │ + b.n c43e6 │ │ ands r1, r0 │ │ - b.n c4716 │ │ + b.n c4726 │ │ strh r3, [r2, #4] │ │ - b.n c441a │ │ + b.n c442a │ │ movs r4, r2 │ │ - b.n c48de │ │ + b.n c48ee │ │ adds r0, #1 │ │ - b.n c44e2 │ │ + b.n c44f2 │ │ asrs r3, r0, #32 │ │ - b.n c4726 │ │ - bics r7, r0 │ │ + b.n c4736 │ │ + mvns r7, r0 │ │ @ instruction: 0xfb00c0bc │ │ - b.n c479e │ │ + b.n c47ae │ │ asrs r4, r0, #32 │ │ - b.n c4732 │ │ + b.n c4742 │ │ lsls r6, r7, #2 │ │ - b.n c47a6 │ │ + b.n c47b6 │ │ movs r0, #2 │ │ - b.n c4892 │ │ + b.n c48a2 │ │ movs r0, #188 @ 0xbc │ │ - b.n c478e │ │ + b.n c479e │ │ movs r0, r0 │ │ - b.n c4504 │ │ + b.n c4514 │ │ movs r2, r0 │ │ - b.n c4886 │ │ + b.n c4896 │ │ lsls r6, r7, #2 │ │ - b.n c479a │ │ + b.n c47aa │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {lr} │ │ - b.n c4b52 │ │ + b.n c4b62 │ │ asrs r7, r0, #32 │ │ - b.n c4756 │ │ + b.n c4766 │ │ movs r3, r0 │ │ and.w r0, r0, r2, lsl #4 │ │ - b.n c4920 │ │ + b.n c4930 │ │ movs r1, r0 │ │ - b.n c48a2 │ │ + b.n c48b2 │ │ movs r0, #1 │ │ - b.n c48ca │ │ + b.n c48da │ │ @ instruction: 0xffd80aff │ │ movs r0, r0 │ │ - b.n c4ace │ │ + b.n c4ade │ │ @ instruction: 0xfff90aff │ │ str r0, [r6, #8] │ │ - b.n c47d8 │ │ + b.n c47e8 │ │ adds r0, #132 @ 0x84 │ │ - b.n c4548 │ │ + b.n c4558 │ │ ands r1, r0 │ │ - b.n c4946 │ │ + b.n c4956 │ │ movs r1, r1 │ │ - b.n c46ee │ │ + b.n c46fe │ │ str r5, [r0, #0] │ │ adds r0, #134 @ 0x86 │ │ str r0, [r6, #8] │ │ - b.n c47d0 │ │ + b.n c47e0 │ │ @ instruction: 0xfff2eaff │ │ - ldr r7, [pc, #960] @ (c4810 ) │ │ + ldr r7, [pc, #960] @ (c4820 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n c4970 │ │ + b.n c4980 │ │ svc 143 @ 0x8f │ │ - b.n c48f4 │ │ + b.n c4904 │ │ ands r0, r0 │ │ - b.n c479e │ │ + b.n c47ae │ │ str r4, [r1, r0] │ │ - b.n c3f82 │ │ + b.n c3f92 │ │ lsls r5, r2, #3 │ │ - b.n c4806 │ │ + b.n c4816 │ │ asrs r4, r1, #1 │ │ - b.n c3f84 │ │ + b.n c3f94 │ │ asrs r4, r3, #32 │ │ - b.n c4976 │ │ + b.n c4986 │ │ movs r0, #68 @ 0x44 │ │ - b.n c3f8c │ │ + b.n c3f9c │ │ movs r1, #0 │ │ - b.n c4398 │ │ + b.n c43a8 │ │ asrs r0, r3, #1 │ │ - b.n c3f94 │ │ + b.n c3fa4 │ │ asrs r4, r7, #1 │ │ - b.n c4986 │ │ - add r0, pc, #256 @ (adr r0, c4580 ) │ │ - b.n c3fac │ │ + b.n c4996 │ │ + add r0, pc, #256 @ (adr r0, c4590 ) │ │ + b.n c3fbc │ │ lsls r0, r0, #2 │ │ - b.n c4588 │ │ + b.n c4598 │ │ adds r0, #56 @ 0x38 │ │ - b.n c3fa4 │ │ + b.n c3fb4 │ │ str r2, [r7, #8] │ │ - b.n c4832 │ │ + b.n c4842 │ │ strb r0, [r6, #2] │ │ - b.n c4832 │ │ + b.n c4842 │ │ lsls r0, r1, #9 │ │ - b.n c3fc0 │ │ + b.n c3fd0 │ │ strh r4, [r7, #4] │ │ - b.n c483e │ │ + b.n c484e │ │ movs r0, r0 │ │ - b.n c4b3e │ │ + b.n c4b4e │ │ asrs r0, r2, #1 │ │ - b.n c3fbc │ │ + b.n c3fcc │ │ movs r0, #116 @ 0x74 │ │ - b.n c3fc0 │ │ + b.n c3fd0 │ │ eors r0, r6 │ │ - b.n c3fc4 │ │ + b.n c3fd4 │ │ lsls r3, r3, #23 │ │ lsrs r0, r0, #8 │ │ asrs r0, r5, #32 │ │ - b.n c3fdc │ │ + b.n c3fec │ │ movs r2, #52 @ 0x34 │ │ - b.n c3fe0 │ │ + b.n c3ff0 │ │ movs r1, r0 │ │ - b.n c475e │ │ + b.n c476e │ │ lsls r2, r2, #23 │ │ ldrh r0, [r0, #16] │ │ asrs r4, r1, #9 │ │ - b.n c3fec │ │ + b.n c3ffc │ │ movs r0, #20 │ │ - b.n c3fe6 │ │ + b.n c3ff6 │ │ asrs r1, r0, #32 │ │ - b.n c494c │ │ + b.n c495c │ │ asrs r4, r1, #9 │ │ - b.n c3fd8 │ │ + b.n c3fe8 │ │ asrs r0, r0, #32 │ │ - b.n c4c12 │ │ + b.n c4c22 │ │ ands r0, r7 │ │ - b.n c4000 │ │ + b.n c4010 │ │ adds r0, #60 @ 0x3c │ │ - b.n c4004 │ │ + b.n c4014 │ │ movs r2, #72 @ 0x48 │ │ - b.n c3fe8 │ │ + b.n c3ff8 │ │ ands r0, r0 │ │ - b.n c3fe2 │ │ + b.n c3ff2 │ │ adds r0, #4 │ │ - b.n c3fe6 │ │ + b.n c3ff6 │ │ eors r0, r6 │ │ - b.n c4024 │ │ + b.n c4034 │ │ asrs r4, r6, #32 │ │ - b.n c3f04 │ │ + b.n c3f14 │ │ movs r0, r7 │ │ - b.n c3f08 │ │ + b.n c3f18 │ │ str r0, [sp, #208] @ 0xd0 │ │ - b.n c3f2c │ │ + b.n c3f3c │ │ movs r0, r0 │ │ - b.n c4bac │ │ + b.n c4bbc │ │ lsls r4, r0, #22 │ │ subs r0, r0, r0 │ │ movs r4, r1 │ │ - b.n c402a │ │ + b.n c403a │ │ asrs r0, r0, #32 │ │ - b.n c4c46 │ │ - b.n c4578 │ │ - b.n c3f40 │ │ + b.n c4c56 │ │ + b.n c4588 │ │ + b.n c3f50 │ │ stmia r0!, {r0} │ │ - b.n c491a │ │ + b.n c492a │ │ lsls r0, r0, #1 │ │ - b.n c4032 │ │ + b.n c4042 │ │ lsls r0, r1, #1 │ │ - b.n c4036 │ │ + b.n c4046 │ │ str r2, [r7, #8] │ │ - b.n c48b6 │ │ + b.n c48c6 │ │ movs r4, #208 @ 0xd0 │ │ - b.n c489e │ │ + b.n c48ae │ │ ands r1, r0 │ │ - b.n c4a46 │ │ + b.n c4a56 │ │ str r0, [r0, r0] │ │ - b.n c4a6c │ │ + b.n c4a7c │ │ add r8, lr │ │ - b.n c48aa │ │ + b.n c48ba │ │ movs r0, r0 │ │ - b.n c4c6e │ │ + b.n c4c7e │ │ eors r0, r6 │ │ - b.n c406c │ │ + b.n c407c │ │ asrs r4, r7, #2 │ │ - b.n c48d2 │ │ + b.n c48e2 │ │ asrs r1, r0, #32 │ │ - b.n c4992 │ │ + b.n c49a2 │ │ movs r0, r6 │ │ - b.n c4058 │ │ + b.n c4068 │ │ movs r4, r1 │ │ - b.n c406a │ │ + b.n c407a │ │ lsls r0, r0, #1 │ │ - b.n c4066 │ │ + b.n c4076 │ │ lsls r0, r7, #2 │ │ - b.n c48ea │ │ + b.n c48fa │ │ movs r4, r2 │ │ - b.n c49ce │ │ + b.n c49de │ │ lsls r6, r7, #2 │ │ - b.n c48ee │ │ + b.n c48fe │ │ movs r0, r2 │ │ - b.n c407e │ │ + b.n c408e │ │ movs r0, #220 @ 0xdc │ │ - b.n c48da │ │ + b.n c48ea │ │ adds r0, #1 │ │ - b.n c4664 │ │ + b.n c4674 │ │ movs r0, #12 │ │ - b.n c4666 │ │ + b.n c4676 │ │ movs r0, #252 @ 0xfc │ │ - b.n c48e6 │ │ + b.n c48f6 │ │ movs r0, #4 │ │ - b.n c4112 │ │ + b.n c4122 │ │ movs r1, r0 │ │ - b.n c4b92 │ │ + b.n c4ba2 │ │ lsls r0, r7, #22 │ │ subs r0, r0, r0 │ │ asrs r4, r6, #1 │ │ - b.n c40b0 │ │ + b.n c40c0 │ │ strb r4, [r5, #1] │ │ - b.n c4094 │ │ - b.n c463c │ │ - b.n c4098 │ │ + b.n c40a4 │ │ + b.n c464c │ │ + b.n c40a8 │ │ lsls r0, r7, #2 │ │ - b.n c4964 │ │ + b.n c4974 │ │ lsls r0, r7, #2 │ │ - b.n c4922 │ │ + b.n c4932 │ │ lsls r5, r2, #3 │ │ - b.n c4932 │ │ + b.n c4942 │ │ strh r4, [r3, #0] │ │ - b.n c40a8 │ │ + b.n c40b8 │ │ movs r0, r0 │ │ - b.n c4c32 │ │ + b.n c4c42 │ │ asrs r4, r2, #1 │ │ - b.n c40b0 │ │ + b.n c40c0 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ asrs r1, r0, #32 │ │ - b.n c4a1e │ │ + b.n c4a2e │ │ lsls r0, r5, #1 │ │ and.w r0, r0, ip, lsl #20 │ │ - b.n c40ce │ │ + b.n c40de │ │ lsls r0, r1, #9 │ │ - b.n c40d4 │ │ + b.n c40e4 │ │ movs r0, r0 │ │ - b.n c4c4e │ │ + b.n c4c5e │ │ lsls r0, r5, #25 │ │ lsrs r0, r0, #8 │ │ asrs r0, r5, #32 │ │ - b.n c40e0 │ │ + b.n c40f0 │ │ movs r2, #52 @ 0x34 │ │ - b.n c40e4 │ │ + b.n c40f4 │ │ movs r1, r0 │ │ - b.n c4862 │ │ + b.n c4872 │ │ lsls r4, r3, #25 │ │ ldrh r0, [r0, #16] │ │ asrs r4, r1, #9 │ │ - b.n c40f0 │ │ + b.n c4100 │ │ movs r0, #20 │ │ - b.n c40ea │ │ + b.n c40fa │ │ asrs r1, r0, #32 │ │ - b.n c4a50 │ │ + b.n c4a60 │ │ asrs r4, r1, #9 │ │ - b.n c40dc │ │ + b.n c40ec │ │ ands r0, r7 │ │ - b.n c4100 │ │ + b.n c4110 │ │ asrs r0, r0, #32 │ │ - b.n c4d1a │ │ + b.n c4d2a │ │ adds r0, #60 @ 0x3c │ │ - b.n c4108 │ │ + b.n c4118 │ │ movs r2, #72 @ 0x48 │ │ - b.n c40ec │ │ + b.n c40fc │ │ ands r0, r0 │ │ - b.n c40e6 │ │ + b.n c40f6 │ │ adds r0, #4 │ │ - b.n c40ea │ │ + b.n c40fa │ │ eors r0, r6 │ │ - b.n c4128 │ │ + b.n c4138 │ │ asrs r4, r4, #32 │ │ - b.n c4008 │ │ + b.n c4018 │ │ movs r0, r5 │ │ - b.n c400c │ │ + b.n c401c │ │ movs r4, r4 │ │ - b.n c4030 │ │ + b.n c4040 │ │ movs r0, r0 │ │ - b.n c4c9e │ │ + b.n c4cae │ │ movs r0, r3 │ │ subs r0, r0, r0 │ │ movs r4, r1 │ │ - b.n c412e │ │ + b.n c413e │ │ movs r0, #1 │ │ - b.n c4d4a │ │ + b.n c4d5a │ │ asrs r0, r5, #32 │ │ - b.n c4044 │ │ + b.n c4054 │ │ lsls r0, r0, #1 │ │ - b.n c4132 │ │ + b.n c4142 │ │ lsls r0, r1, #1 │ │ - b.n c4136 │ │ + b.n c4146 │ │ movs r0, #186 @ 0xba │ │ - b.n c499c │ │ + b.n c49ac │ │ movs r4, #208 @ 0xd0 │ │ - b.n c499e │ │ + b.n c49ae │ │ ands r1, r0 │ │ - b.n c4b46 │ │ + b.n c4b56 │ │ str r0, [r0, r0] │ │ - b.n c4b6c │ │ + b.n c4b7c │ │ add r8, lr │ │ - b.n c49aa │ │ + b.n c49ba │ │ movs r0, r0 │ │ - b.n c4d6e │ │ + b.n c4d7e │ │ eors r0, r6 │ │ - b.n c416c │ │ + b.n c417c │ │ lsls r4, r7, #2 │ │ - b.n c49b8 │ │ + b.n c49c8 │ │ movs r4, r1 │ │ - b.n c4162 │ │ + b.n c4172 │ │ lsls r0, r0, #1 │ │ - b.n c415e │ │ + b.n c416e │ │ lsls r0, r7, #2 │ │ - b.n c49e2 │ │ + b.n c49f2 │ │ movs r4, r2 │ │ - b.n c4ac6 │ │ + b.n c4ad6 │ │ lsls r6, r7, #2 │ │ - b.n c49cc │ │ + b.n c49dc │ │ movs r0, r2 │ │ - b.n c4176 │ │ + b.n c4186 │ │ asrs r4, r1, #32 │ │ - b.n c4172 │ │ + b.n c4182 │ │ asrs r1, r0, #32 │ │ - b.n c4b58 │ │ + b.n c4b68 │ │ asrs r4, r1, #32 │ │ - b.n c415a │ │ + b.n c416a │ │ asrs r4, r0, #32 │ │ - b.n c4206 │ │ + b.n c4216 │ │ movs r1, r0 │ │ - b.n c4c84 │ │ + b.n c4c94 │ │ lsls r7, r1, #25 │ │ subs r0, r0, r0 │ │ str r0, [sp, #144] @ 0x90 │ │ - b.n c40a0 │ │ + b.n c40b0 │ │ movs r0, #40 @ 0x28 │ │ - b.n c40a4 │ │ + b.n c40b4 │ │ movs r0, r0 │ │ - b.n c4d24 │ │ + b.n c4d34 │ │ str r0, [sp, #208] @ 0xd0 │ │ - b.n c408c │ │ + b.n c409c │ │ movs r0, #56 @ 0x38 │ │ - b.n c4090 │ │ + b.n c40a0 │ │ lsls r1, r4, #25 │ │ subs r0, r0, r0 │ │ str r4, [r7, #4] │ │ - b.n c41aa │ │ + b.n c41ba │ │ str r0, [sp, #112] @ 0x70 │ │ - b.n c4b8e │ │ + b.n c4b9e │ │ strb r0, [r2, #0] │ │ - b.n c41ae │ │ + b.n c41be │ │ str r6, [r7, #4] │ │ - b.n c4196 │ │ + b.n c41a6 │ │ str r0, [r0, #0] │ │ - b.n c4dd2 │ │ + b.n c4de2 │ │ lsls r4, r3, #3 │ │ - b.n c4a1e │ │ + b.n c4a2e │ │ str r4, [r7, #120] @ 0x78 │ │ - b.n c4a22 │ │ + b.n c4a32 │ │ str r2, [r6, #8] │ │ - b.n c4a40 │ │ + b.n c4a50 │ │ adds r0, #28 │ │ - b.n c41ca │ │ + b.n c41da │ │ str r0, [r4, r0] │ │ - b.n c41ce │ │ + b.n c41de │ │ movs r4, r5 │ │ stmia.w r9, {r3, ip, sp, lr} │ │ - b.n c41b0 │ │ + b.n c41c0 │ │ strb r1, [r0, #0] │ │ - b.n c4bbe │ │ + b.n c4bce │ │ movs r0, #64 @ 0x40 │ │ - b.n c41d6 │ │ + b.n c41e6 │ │ strb r2, [r6, #2] │ │ - b.n c4a3c │ │ + b.n c4a4c │ │ str r0, [r6, #0] │ │ - b.n c41d8 │ │ + b.n c41e8 │ │ movs r4, #190 @ 0xbe │ │ - b.n c4a66 │ │ + b.n c4a76 │ │ movs r7, r0 │ │ - b.n c4d6a │ │ + b.n c4d7a │ │ lsls r3, r7, #24 │ │ ldr r2, [sp, #0] │ │ movs r0, #213 @ 0xd5 │ │ - b.n c4a76 │ │ + b.n c4a86 │ │ strb r0, [r3, #1] │ │ - b.n c420c │ │ + b.n c421c │ │ str r2, [r0, r4] │ │ - b.n c4604 │ │ + b.n c4614 │ │ strb r6, [r7, #2] │ │ - b.n c4a84 │ │ + b.n c4a94 │ │ movs r0, #188 @ 0xbc │ │ - b.n c4a88 │ │ + b.n c4a98 │ │ str r0, [r1, #0] │ │ - b.n c4b70 │ │ + b.n c4b80 │ │ strb r2, [r0, #0] │ │ - b.n c4bea │ │ + b.n c4bfa │ │ movs r6, r0 │ │ - b.n c4998 │ │ + b.n c49a8 │ │ lsls r6, r6, #24 │ │ ldmia r2!, {} │ │ lsls r4, r6, #1 │ │ - b.n c422c │ │ + b.n c423c │ │ movs r2, r0 │ │ - b.n c4d9a │ │ + b.n c4daa │ │ str r0, [sp, #64] @ 0x40 │ │ - b.n c421a │ │ + b.n c422a │ │ movs r1, r1 │ │ subs r2, #0 │ │ movs r6, r2 │ │ - b.n c4c0c │ │ + b.n c4c1c │ │ asrs r4, r2, #32 │ │ - b.n c4c10 │ │ + b.n c4c20 │ │ movs r0, #1 │ │ - b.n c4e8e │ │ + b.n c4e9e │ │ strh r2, [r1, #0] │ │ - b.n c4a4e │ │ - add r0, pc, #48 @ (adr r0, c4740 ) │ │ - b.n c4a52 │ │ - cmp r4, r7 │ │ + b.n c4a5e │ │ + add r0, pc, #48 @ (adr r0, c4750 ) │ │ + b.n c4a62 │ │ + cmn r4, r7 │ │ mla r0, r0, sl, ip │ │ - b.n c4a5a │ │ - add r0, pc, #32 @ (adr r0, c473c ) │ │ - b.n c4a5e │ │ + b.n c4a6a │ │ + add r0, pc, #32 @ (adr r0, c474c ) │ │ + b.n c4a6e │ │ strh r4, [r3, #0] │ │ - b.n c425c │ │ - b.n c47e4 │ │ - b.n c4260 │ │ + b.n c426c │ │ + b.n c47f4 │ │ + b.n c4270 │ │ str r4, [r6, #24] │ │ - b.n c4af4 │ │ + b.n c4b04 │ │ asrs r0, r0, #32 │ │ - b.n c4e6e │ │ + b.n c4e7e │ │ movs r1, r0 │ │ - b.n c4e72 │ │ + b.n c4e82 │ │ str r6, [r6, #8] │ │ - b.n c49c0 │ │ + b.n c49d0 │ │ strb r0, [r7, #2] │ │ - b.n c49c4 │ │ + b.n c49d4 │ │ str r0, [sp, #24] │ │ - b.n c4688 │ │ + b.n c4698 │ │ asrs r4, r0, #32 │ │ - b.n c424c │ │ + b.n c425c │ │ movs r5, r0 │ │ - b.n c42ce │ │ + b.n c42de │ │ movs r0, #216 @ 0xd8 │ │ - b.n c4ad2 │ │ + b.n c4ae2 │ │ movs r0, r0 │ │ - b.n c4e8e │ │ + b.n c4e9e │ │ asrs r0, r1, #1 │ │ - b.n c426c │ │ + b.n c427c │ │ strb r0, [r0, #2] │ │ - b.n c4e96 │ │ + b.n c4ea6 │ │ asrs r4, r0, #32 │ │ - b.n c4302 │ │ + b.n c4312 │ │ lsls r4, r6, #4 │ │ - b.n c4278 │ │ + b.n c4288 │ │ movs r1, r0 │ │ - b.n c4d84 │ │ + b.n c4d94 │ │ lsls r0, r6, #4 │ │ - b.n c4280 │ │ + b.n c4290 │ │ lsls r4, r3, #2 │ │ - b.n c4284 │ │ + b.n c4294 │ │ lsls r0, r3, #2 │ │ - b.n c4288 │ │ + b.n c4298 │ │ lsls r4, r2, #2 │ │ - b.n c428c │ │ + b.n c429c │ │ strb r2, [r1, #2] │ │ - b.n c4310 │ │ + b.n c4320 │ │ lsrs r0, r7, #2 │ │ - b.n c4b14 │ │ + b.n c4b24 │ │ adds r0, #144 @ 0x90 │ │ - b.n c4298 │ │ + b.n c42a8 │ │ movs r0, #140 @ 0x8c │ │ - b.n c429c │ │ + b.n c42ac │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ movs r0, #132 @ 0x84 │ │ - b.n c4ca4 │ │ + b.n c4cb4 │ │ movs r7, r0 │ │ and.w r1, r0, ip, asr #3 │ │ - b.n c42ac │ │ + b.n c42bc │ │ lsls r0, r5, #7 │ │ - b.n c42b0 │ │ + b.n c42c0 │ │ lsls r4, r2, #5 │ │ - b.n c42b4 │ │ + b.n c42c4 │ │ lsls r4, r0, #2 │ │ - b.n c4cb8 │ │ + b.n c4cc8 │ │ movs r1, #68 @ 0x44 │ │ - b.n c42bc │ │ + b.n c42cc │ │ movs r0, #184 @ 0xb8 │ │ - b.n c4ca6 │ │ + b.n c4cb6 │ │ adds r1, #72 @ 0x48 │ │ - b.n c42c4 │ │ + b.n c42d4 │ │ movs r0, #156 @ 0x9c │ │ - b.n c42c8 │ │ + b.n c42d8 │ │ adds r0, #180 @ 0xb4 │ │ - b.n c4b5a │ │ + b.n c4b6a │ │ movs r1, r0 │ │ - b.n c4cce │ │ + b.n c4cde │ │ movs r4, r5 │ │ - b.n c42d4 │ │ + b.n c42e4 │ │ str r0, [sp, #672] @ 0x2a0 │ │ - b.n c4afe │ │ + b.n c4b0e │ │ movs r0, r2 │ │ - b.n c42ea │ │ + b.n c42fa │ │ stmia r0!, {r2, r5, r6} │ │ - b.n c42e0 │ │ + b.n c42f0 │ │ stmia r4!, {r0, r1, r5} │ │ - b.n c4b0a │ │ + b.n c4b1a │ │ strb r4, [r2, #0] │ │ - b.n c42f6 │ │ + b.n c4306 │ │ movs r0, r2 │ │ - b.n c42d6 │ │ + b.n c42e6 │ │ lsls r3, r6, #1 │ │ - b.n c4554 │ │ + b.n c4564 │ │ asrs r6, r0, #32 │ │ - b.n c4382 │ │ + b.n c4392 │ │ movs r0, r0 │ │ - b.n c4e7e │ │ + b.n c4e8e │ │ asrs r6, r0, #32 │ │ - b.n c4366 │ │ + b.n c4376 │ │ strb r0, [r0, #1] │ │ - b.n c4300 │ │ + b.n c4310 │ │ strb r4, [r2, #0] │ │ - b.n c42ee │ │ + b.n c42fe │ │ movs r0, #92 @ 0x5c │ │ - b.n c4308 │ │ + b.n c4318 │ │ adds r0, #180 @ 0xb4 │ │ - b.n c4b76 │ │ - add r0, pc, #144 @ (adr r0, c4884 ) │ │ - b.n c4310 │ │ + b.n c4b86 │ │ + add r0, pc, #144 @ (adr r0, c4894 ) │ │ + b.n c4320 │ │ str r0, [sp, #416] @ 0x1a0 │ │ - b.n c4314 │ │ + b.n c4324 │ │ movs r1, r6 │ │ - ldr r2, [pc, #0] @ (c47fc ) │ │ + ldr r2, [pc, #0] @ (c480c ) │ │ movs r0, #0 │ │ - b.n c4f42 │ │ + b.n c4f52 │ │ lsrs r3, r0, #16 │ │ - b.n c4eac │ │ + b.n c4ebc │ │ strh r0, [r0, #0] │ │ - b.n c4f4a │ │ + b.n c4f5a │ │ movs r2, r3 │ │ subs r2, #0 │ │ - b.n c4812 │ │ - b.n c4d2a │ │ - add r0, pc, #448 @ (adr r0, c49d4 ) │ │ - b.n c4350 │ │ + b.n c4822 │ │ + b.n c4d3a │ │ + add r0, pc, #448 @ (adr r0, c49e4 ) │ │ + b.n c4360 │ │ str r0, [sp, #368] @ 0x170 │ │ - b.n c4354 │ │ + b.n c4364 │ │ lsrs r7, r7, #24 │ │ - b.n c4f5e │ │ + b.n c4f6e │ │ asrs r6, r1, #4 │ │ - b.n c4822 │ │ + b.n c4832 │ │ strh r4, [r7, #6] │ │ - b.n c4c42 │ │ + b.n c4c52 │ │ strb r0, [r0, #0] │ │ - b.n c4f6a │ │ + b.n c4f7a │ │ lsls r4, r7, #1 │ │ - b.n c4f6e │ │ + b.n c4f7e │ │ str r0, [r0, #0] │ │ - b.n c4946 │ │ + b.n c4956 │ │ ands r7, r0 │ │ - b.n c4948 │ │ + b.n c4958 │ │ ands r4, r3 │ │ - b.n c4d42 │ │ + b.n c4d52 │ │ lsls r7, r1, #29 │ │ orn r0, r6, #2160 @ 0x870 │ │ - b.n c4956 │ │ + b.n c4966 │ │ str r4, [r3, #0] │ │ - b.n c4d52 │ │ + b.n c4d62 │ │ strb r0, [r2, #0] │ │ - b.n c4d58 │ │ + b.n c4d68 │ │ cmp r2, #143 @ 0x8f │ │ orn r0, r6, #8847360 @ 0x870000 │ │ - b.n c4af4 │ │ + b.n c4b04 │ │ cmp r2, #143 @ 0x8f │ │ orr.w r0, r4, #32768 @ 0x8000 │ │ - b.n c496c │ │ + b.n c497c │ │ movs r0, r1 │ │ - b.n c4d5e │ │ + b.n c4d6e │ │ lsls r7, r1, #29 │ │ - bl ffd09844 │ │ + bl ffd09854 │ │ subs r7, r7, r3 │ │ movs r6, r1 │ │ - b.n c4b1a │ │ - add r0, pc, #144 @ (adr r0, c48fc ) │ │ - b.n c43a8 │ │ - b.n c4930 │ │ - b.n c43ac │ │ + b.n c4b2a │ │ + add r0, pc, #144 @ (adr r0, c490c ) │ │ + b.n c43b8 │ │ + b.n c4940 │ │ + b.n c43bc │ │ str r0, [sp, #416] @ 0x1a0 │ │ - b.n c43b0 │ │ + b.n c43c0 │ │ movs r2, r2 │ │ lsrs r0, r0, #8 │ │ movs r7, r0 │ │ - b.n c4d8e │ │ + b.n c4d9e │ │ eors r0, r6 │ │ - b.n c43bc │ │ + b.n c43cc │ │ str r4, [r3, r1] │ │ - b.n c43c0 │ │ + b.n c43d0 │ │ str r6, [r7, #0] │ │ - b.n c4d9a │ │ + b.n c4daa │ │ adds r4, #35 @ 0x23 │ │ - b.n c495e │ │ + b.n c496e │ │ asrs r0, r0, #4 │ │ - b.n c499a │ │ + b.n c49aa │ │ strb r0, [r0, #4] │ │ - b.n c49a0 │ │ + b.n c49b0 │ │ lsls r6, r0, #2 │ │ - b.n c49a2 │ │ + b.n c49b2 │ │ str r6, [r0, #8] │ │ - b.n c49a8 │ │ + b.n c49b8 │ │ adds r0, #1 │ │ - b.n c4da8 │ │ + b.n c4db8 │ │ str r2, [r0, r2] │ │ - b.n c47c8 │ │ + b.n c47d8 │ │ ands r2, r0 │ │ - b.n c49aa │ │ + b.n c49ba │ │ adds r0, #1 │ │ - b.n c4d54 │ │ + b.n c4d64 │ │ str r2, [r0, r2] │ │ - b.n c47c0 │ │ + b.n c47d0 │ │ str r2, [r0, r0] │ │ - b.n c49c2 │ │ + b.n c49d2 │ │ movs r0, #2 │ │ - b.n c4dbe │ │ + b.n c4dce │ │ lsls r0, r6 │ │ - b.n c4c66 │ │ + b.n c4c76 │ │ lsls r0, r6 │ │ - b.n c4c4c │ │ + b.n c4c5c │ │ @ instruction: 0xfff61aff │ │ movs r0, #92 @ 0x5c │ │ - b.n c4404 │ │ + b.n c4414 │ │ lsls r4, r7, #1 │ │ - b.n c462c │ │ + b.n c463c │ │ strb r4, [r5, #1] │ │ - b.n c440c │ │ + b.n c441c │ │ asrs r4, r3, #32 │ │ - b.n c4dda │ │ + b.n c4dea │ │ asrs r0, r4, #32 │ │ - b.n c43f4 │ │ + b.n c4404 │ │ adds r0, #124 @ 0x7c │ │ - b.n c4de2 │ │ + b.n c4df2 │ │ strh r0, [r1, #2] │ │ - b.n c441c │ │ - b.n c4ae4 │ │ - b.n c47e8 │ │ + b.n c442c │ │ + b.n c4af4 │ │ + b.n c47f8 │ │ movs r7, r0 │ │ - b.n c4b9c │ │ + b.n c4bac │ │ ands r3, r0 │ │ - b.n c4c2e │ │ + b.n c4c3e │ │ asrs r5, r2, #3 │ │ - b.n c4c96 │ │ + b.n c4ca6 │ │ movs r0, #0 │ │ - b.n c5036 │ │ + b.n c5046 │ │ movs r0, #124 @ 0x7c │ │ - b.n c4414 │ │ + b.n c4424 │ │ movs r0, #120 @ 0x78 │ │ - b.n c4418 │ │ + b.n c4428 │ │ asrs r1, r0, #2 │ │ - b.n c4a08 │ │ + b.n c4a18 │ │ str r0, [r2, #4] │ │ - b.n c4440 │ │ + b.n c4450 │ │ adds r0, #12 │ │ - b.n c4424 │ │ + b.n c4434 │ │ movs r0, #176 @ 0xb0 │ │ - b.n c4c90 │ │ + b.n c4ca0 │ │ asrs r1, r0, #32 │ │ - b.n c4e24 │ │ + b.n c4e34 │ │ movs r0, #44 @ 0x2c │ │ - b.n c4450 │ │ + b.n c4460 │ │ str r2, [r0, r0] │ │ - b.n c499c │ │ + b.n c49ac │ │ str r0, [r5, r0] │ │ - b.n c4438 │ │ + b.n c4448 │ │ str r1, [r4, r2] │ │ strh r0, [r4, #12] │ │ asrs r0, r1, #2 │ │ - b.n c4c66 │ │ + b.n c4c76 │ │ movs r0, #177 @ 0xb1 │ │ - b.n c4c96 │ │ + b.n c4ca6 │ │ str r0, [r1, #0] │ │ - b.n c4448 │ │ + b.n c4458 │ │ movs r0, #1 │ │ - b.n c4e36 │ │ + b.n c4e46 │ │ movs r0, #177 @ 0xb1 │ │ - b.n c4c7e │ │ + b.n c4c8e │ │ asrs r4, r4, #1 │ │ - b.n c4474 │ │ + b.n c4484 │ │ movs r1, r0 │ │ - b.n c4bec │ │ + b.n c4bfc │ │ lsls r2, r1, #19 │ │ ldr r2, [sp, #0] │ │ movs r5, r0 │ │ - b.n c4bf8 │ │ + b.n c4c08 │ │ ands r0, r2 │ │ - b.n c4464 │ │ + b.n c4474 │ │ str r4, [r6, r0] │ │ - b.n c4468 │ │ + b.n c4478 │ │ lsls r0, r3, #19 │ │ lsrs r0, r0, #8 │ │ eors r0, r6 │ │ - b.n c4490 │ │ + b.n c44a0 │ │ movs r0, r0 │ │ - b.n c509a │ │ + b.n c50aa │ │ str r0, [sp, #368] @ 0x170 │ │ - b.n c4498 │ │ + b.n c44a8 │ │ movs r0, r0 │ │ - b.n c500c │ │ + b.n c501c │ │ lsls r4, r2, #1 │ │ - b.n c4480 │ │ + b.n c4490 │ │ lsls r4, r3, #19 │ │ lsrs r0, r0, #8 │ │ lsls r2, r7, #2 │ │ - b.n c4d2a │ │ + b.n c4d3a │ │ movs r0, r4 │ │ - b.n c4f92 │ │ + b.n c4fa2 │ │ movs r7, r4 │ │ subs r0, r0, r0 │ │ str r4, [r1, #0] │ │ - b.n c44a2 │ │ + b.n c44b2 │ │ str r0, [r0, r1] │ │ - b.n c44aa │ │ + b.n c44ba │ │ strh r4, [r3, #8] │ │ - b.n c44ac │ │ + b.n c44bc │ │ movs r0, r0 │ │ - b.n c5036 │ │ + b.n c5046 │ │ lsls r5, r4, #20 │ │ lsrs r0, r0, #8 │ │ lsls r0, r3, #4 │ │ - b.n c44b8 │ │ + b.n c44c8 │ │ movs r0, #20 │ │ - b.n c44c2 │ │ + b.n c44d2 │ │ adds r0, #7 │ │ - b.n c4540 │ │ + b.n c4550 │ │ movs r1, r0 │ │ - b.n c4e1a │ │ + b.n c4e2a │ │ asrs r0, r1, #32 │ │ - b.n c44c8 │ │ + b.n c44d8 │ │ lsls r0, r3, #4 │ │ - b.n c44ac │ │ + b.n c44bc │ │ movs r1, r0 │ │ - b.n c4fcc │ │ + b.n c4fdc │ │ movs r1, #28 │ │ - b.n c44b4 │ │ + b.n c44c4 │ │ str r4, [r0, r1] │ │ - b.n c44e8 │ │ + b.n c44f8 │ │ str r0, [sp, #416] @ 0x1a0 │ │ - b.n c44ec │ │ + b.n c44fc │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ movs r4, r2 │ │ - b.n c4eca │ │ + b.n c4eda │ │ asrs r4, r2, #32 │ │ - b.n c4e40 │ │ - negs r3, r5 │ │ - @ instruction: 0xfa001001 │ │ - b.n c5106 │ │ + b.n c4e50 │ │ + tst r3, r3 │ │ + mla r0, r0, r1, r1 │ │ + b.n c5116 │ │ movs r0, #0 │ │ - b.n c510a │ │ + b.n c511a │ │ asrs r4, r1, #32 │ │ - b.n c44de │ │ + b.n c44ee │ │ movs r0, r1 │ │ - b.n c4506 │ │ + b.n c4516 │ │ movs r0, #186 @ 0xba │ │ - b.n c4d66 │ │ + b.n c4d76 │ │ movs r0, #116 @ 0x74 │ │ - b.n c4514 │ │ + b.n c4524 │ │ movs r0, #186 @ 0xba │ │ - b.n c4d82 │ │ + b.n c4d92 │ │ movs r2, r0 │ │ - b.n c5006 │ │ + b.n c5016 │ │ lsls r2, r2, #1 │ │ subs r0, r0, r0 │ │ asrs r4, r1, #1 │ │ - b.n c4524 │ │ + b.n c4534 │ │ movs r0, r0 │ │ - b.n c5090 │ │ + b.n c50a0 │ │ lsls r2, r2, #2 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #32 │ │ - b.n c4518 │ │ + b.n c4528 │ │ asrs r1, r0, #32 │ │ - b.n c4efc │ │ + b.n c4f0c │ │ asrs r1, r0, #32 │ │ - b.n c5180 │ │ + b.n c5190 │ │ asrs r0, r1, #32 │ │ - b.n c4f04 │ │ + b.n c4f14 │ │ movs r4, #190 @ 0xbe │ │ - b.n c4dba │ │ + b.n c4dca │ │ str r4, [r6, r0] │ │ - b.n c4544 │ │ + b.n c4554 │ │ movs r2, r0 │ │ - b.n c4cb0 │ │ + b.n c4cc0 │ │ lsls r7, r1, #2 │ │ ldr r2, [sp, #0] │ │ lsls r4, r1, #23 │ │ and.w r0, r0, r0, lsr #32 │ │ - b.n c4542 │ │ + b.n c4552 │ │ stmia r0!, {r0, r1, r2} │ │ - b.n c4d5e │ │ + b.n c4d6e │ │ movs r0, #104 @ 0x68 │ │ - b.n c455c │ │ + b.n c456c │ │ strb r4, [r6, #1] │ │ - b.n c4560 │ │ + b.n c4570 │ │ asrs r5, r2, #3 │ │ - b.n c4dd2 │ │ + b.n c4de2 │ │ movs r0, #5 │ │ - b.n c4ab2 │ │ + b.n c4ac2 │ │ str r4, [r0, #0] │ │ - b.n c4552 │ │ + b.n c4562 │ │ lsls r0, r2, #1 │ │ - b.n c4570 │ │ + b.n c4580 │ │ adds r0, #188 @ 0xbc │ │ - b.n c4de8 │ │ + b.n c4df8 │ │ lsls r1, r0, #2 │ │ - b.n c4b3e │ │ + b.n c4b4e │ │ lsls r6, r2, #10 │ │ - b.n c4a52 │ │ + b.n c4a62 │ │ asrs r2, r0, #2 │ │ - b.n c4acc │ │ + b.n c4adc │ │ lsls r0, r6, #2 │ │ - b.n c4dea │ │ + b.n c4dfa │ │ asrs r4, r7, #2 │ │ - b.n c4ddc │ │ + b.n c4dec │ │ asrs r4, r7, #2 │ │ - b.n c4e0e │ │ + b.n c4e1e │ │ adds r0, #184 @ 0xb8 │ │ - b.n c4e04 │ │ + b.n c4e14 │ │ asrs r2, r0, #2 │ │ - b.n c4b5c │ │ + b.n c4b6c │ │ asrs r4, r7, #2 │ │ - b.n c4dfa │ │ + b.n c4e0a │ │ asrs r2, r0, #2 │ │ - b.n c4af2 │ │ + b.n c4b02 │ │ movs r0, #190 @ 0xbe │ │ - b.n c4e14 │ │ + b.n c4e24 │ │ str r4, [r7, #4] │ │ - b.n c4584 │ │ + b.n c4594 │ │ movs r0, #1 │ │ - b.n c4b72 │ │ + b.n c4b82 │ │ movs r0, #190 @ 0xbe │ │ - b.n c4e00 │ │ + b.n c4e10 │ │ strb r4, [r2, #0] │ │ - b.n c4f84 │ │ + b.n c4f94 │ │ movs r0, #117 @ 0x75 │ │ - b.n c4878 │ │ + b.n c4888 │ │ strb r2, [r2, #14] │ │ - b.n c4ad2 │ │ + b.n c4ae2 │ │ movs r0, #190 @ 0xbe │ │ - b.n c4e3e │ │ + b.n c4e4e │ │ asrs r1, r0, #32 │ │ - b.n c4b0a │ │ + b.n c4b1a │ │ asrs r6, r7, #2 │ │ - b.n c4e26 │ │ + b.n c4e36 │ │ asrs r5, r0, #32 │ │ - b.n c4dce │ │ + b.n c4dde │ │ str r5, [r0, r0] │ │ - b.n c4b12 │ │ + b.n c4b22 │ │ movs r4, r1 │ │ - b.n c4d38 │ │ + b.n c4d48 │ │ movs r2, r1 │ │ - b.n c4dda │ │ + b.n c4dea │ │ lsls r4, r1, #1 │ │ lsls r5, r3, #22 │ │ movs r0, r0 │ │ lsls r0, r2, #22 │ │ movs r1, r0 │ │ - b.n c5190 │ │ + b.n c51a0 │ │ lsls r0, r7, #1 │ │ - b.n c45c4 │ │ + b.n c45d4 │ │ movs r4, r6 │ │ - bge.n c4aae │ │ + bge.n c4abe │ │ lsls r5, r2, #26 │ │ - b.n c4ab6 │ │ + b.n c4ac6 │ │ strb r4, [r2, #0] │ │ - b.n c4fd2 │ │ + b.n c4fe2 │ │ asrs r2, r1, #32 │ │ - b.n c4dfa │ │ + b.n c4e0a │ │ movs r7, r0 │ │ - b.n c4dfe │ │ - negs r0, r0 │ │ + b.n c4e0e │ │ + tst r5, r0 │ │ @ instruction: 0xfb000060 │ │ - b.n c4600 │ │ + b.n c4610 │ │ asrs r5, r6, #1 │ │ - b.n c48c8 │ │ + b.n c48d8 │ │ movs r0, #6 │ │ - b.n c4e0e │ │ + b.n c4e1e │ │ lsls r0, r7, #2 │ │ - b.n c4e72 │ │ + b.n c4e82 │ │ strb r1, [r2, #2] │ │ - b.n c4b24 │ │ + b.n c4b34 │ │ lsls r4, r1, #1 │ │ - b.n c4614 │ │ + b.n c4624 │ │ asrs r0, r0, #32 │ │ - b.n c45fe │ │ + b.n c460e │ │ movs r7, r0 │ │ - b.n c4e22 │ │ - tst r7, r6 │ │ + b.n c4e32 │ │ + rors r4, r7 │ │ @ instruction: 0xfb00a695 │ │ - b.n c4b2c │ │ + b.n c4b3c │ │ movs r6, r0 │ │ - b.n c4bfc │ │ + b.n c4c0c │ │ strh r5, [r2, #52] @ 0x34 │ │ - b.n c4bb6 │ │ - tst r3, r6 │ │ + b.n c4bc6 │ │ + rors r0, r7 │ │ @ instruction: 0xfb00e060 │ │ - b.n c4634 │ │ + b.n c4644 │ │ lsls r4, r7, #2 │ │ - b.n c4eba │ │ + b.n c4eca │ │ asrs r6, r7, #2 │ │ - b.n c4ebe │ │ + b.n c4ece │ │ movs r2, r0 │ │ - b.n c5006 │ │ + b.n c5016 │ │ lsls r4, r7, #2 │ │ - b.n c4ea6 │ │ + b.n c4eb6 │ │ movs r6, r0 │ │ - b.n c4b90 │ │ + b.n c4ba0 │ │ asrs r0, r2, #1 │ │ - b.n c464c │ │ + b.n c465c │ │ movs r2, r0 │ │ - b.n c5016 │ │ + b.n c5026 │ │ lsls r6, r7, #2 │ │ - b.n c4eb6 │ │ + b.n c4ec6 │ │ lsls r5, r2, #3 │ │ - b.n c4ec6 │ │ + b.n c4ed6 │ │ lsls r0, r0, #2 │ │ - b.n c4c24 │ │ + b.n c4c34 │ │ str r0, [r6, r2] │ │ - b.n c4ea6 │ │ + b.n c4eb6 │ │ str r4, [r6, r0] │ │ - b.n c4664 │ │ + b.n c4674 │ │ str r5, [r0, #0] │ │ - b.n c4e6e │ │ + b.n c4e7e │ │ movs r7, r7 │ │ and.w r0, r0, ip, lsl #9 │ │ - b.n c4670 │ │ + b.n c4680 │ │ movs r0, r0 │ │ - b.n c51de │ │ + b.n c51ee │ │ asrs r4, r0, #32 │ │ asrs r2, r2, #22 │ │ asrs r1, r0, #32 │ │ asrs r1, r0, #10 │ │ movs r0, r0 │ │ - b.n c51f0 │ │ + b.n c5200 │ │ movs r0, #4 │ │ asrs r5, r2, #22 │ │ movs r0, #0 │ │ lsls r0, r4, #14 │ │ asrs r1, r0, #32 │ │ - b.n c4c56 │ │ + b.n c4c66 │ │ asrs r1, r0, #32 │ │ - b.n c52d8 │ │ + b.n c52e8 │ │ str r4, [r6, r0] │ │ - b.n c4694 │ │ + b.n c46a4 │ │ movs r4, #188 @ 0xbc │ │ - b.n c4f12 │ │ + b.n c4f22 │ │ asrs r0, r1, #32 │ │ - b.n c5064 │ │ + b.n c5074 │ │ movs r2, r0 │ │ - b.n c4e08 │ │ + b.n c4e18 │ │ movs r1, r7 │ │ ldr r2, [sp, #0] │ │ asrs r4, r1, #1 │ │ - b.n c46a8 │ │ + b.n c46b8 │ │ asrs r4, r0, #32 │ │ - b.n c4694 │ │ + b.n c46a4 │ │ asrs r1, r0, #32 │ │ - b.n c5078 │ │ + b.n c5088 │ │ asrs r1, r0, #32 │ │ - b.n c52fc │ │ + b.n c530c │ │ asrs r4, r1, #32 │ │ - b.n c5080 │ │ + b.n c5090 │ │ movs r3, r6 │ │ and.w r0, r0, r5, lsr #3 │ │ - b.n c4f2e │ │ + b.n c4f3e │ │ str r0, [sp, #80] @ 0x50 │ │ - b.n c50a6 │ │ + b.n c50b6 │ │ eors r0, r2 │ │ - b.n c46c8 │ │ + b.n c46d8 │ │ movs r0, #8 │ │ - b.n c4ed2 │ │ + b.n c4ee2 │ │ str r4, [r6, r1] │ │ - b.n c46d0 │ │ + b.n c46e0 │ │ lsls r0, r0, #2 │ │ - b.n c4ca2 │ │ + b.n c4cb2 │ │ asrs r0, r7, #2 │ │ - b.n c4f48 │ │ + b.n c4f58 │ │ lsls r0, r6, #2 │ │ - b.n c4f42 │ │ + b.n c4f52 │ │ asrs r4, r4, #1 │ │ - b.n c46c0 │ │ + b.n c46d0 │ │ asrs r2, r1, #32 │ │ - b.n c4eea │ │ + b.n c4efa │ │ lsls r0, r0, #1 │ │ - b.n c46c8 │ │ + b.n c46d8 │ │ movs r1, r1 │ │ - b.n c4ef2 │ │ - tst r3, r0 │ │ + b.n c4f02 │ │ + rors r0, r1 │ │ @ instruction: 0xfb000070 │ │ - b.n c46f4 │ │ + b.n c4704 │ │ asrs r4, r4, #1 │ │ - b.n c46f8 │ │ + b.n c4708 │ │ movs r0, #64 @ 0x40 │ │ - b.n c46fc │ │ + b.n c470c │ │ lsls r5, r2, #3 │ │ - b.n c4f66 │ │ + b.n c4f76 │ │ strh r4, [r6, #0] │ │ - b.n c4704 │ │ + b.n c4714 │ │ strb r1, [r2, #10] │ │ - b.n c4c1c │ │ + b.n c4c2c │ │ str r0, [sp, #480] @ 0x1e0 │ │ - b.n c46ec │ │ + b.n c46fc │ │ lsls r0, r0, #2 │ │ - b.n c4cde │ │ + b.n c4cee │ │ eors r0, r6 │ │ - b.n c4714 │ │ + b.n c4724 │ │ lsls r0, r6, #2 │ │ - b.n c4f7e │ │ + b.n c4f8e │ │ str r0, [sp, #368] @ 0x170 │ │ - b.n c471c │ │ + b.n c472c │ │ movs r0, r0 │ │ - b.n c4c76 │ │ + b.n c4c86 │ │ asrs r7, r0, #32 │ │ - b.n c4f2a │ │ + b.n c4f3a │ │ lsls r0, r2, #26 │ │ - b.n c4bf2 │ │ + b.n c4c02 │ │ movs r6, r0 │ │ - b.n c4d00 │ │ - sbcs r4, r0 │ │ + b.n c4d10 │ │ + rors r4, r0 │ │ @ instruction: 0xfb00004c │ │ - b.n c4734 │ │ + b.n c4744 │ │ movs r0, #6 │ │ - b.n c4f3e │ │ + b.n c4f4e │ │ asrs r0, r0, #32 │ │ - b.n c4722 │ │ + b.n c4732 │ │ movs r7, r0 │ │ - b.n c4f46 │ │ - rors r6, r5 │ │ + b.n c4f56 │ │ + sbcs r3, r6 │ │ @ instruction: 0xfb0000bc │ │ - b.n c4fb8 │ │ + b.n c4fc8 │ │ asrs r6, r7, #2 │ │ - b.n c4fbc │ │ + b.n c4fcc │ │ movs r2, r0 │ │ - b.n c5116 │ │ + b.n c5126 │ │ lsls r4, r7, #2 │ │ - b.n c4fa4 │ │ + b.n c4fb4 │ │ movs r6, r0 │ │ - b.n c4ca0 │ │ - b.n c4ce0 │ │ - b.n c475c │ │ + b.n c4cb0 │ │ + b.n c4cf0 │ │ + b.n c476c │ │ movs r2, r0 │ │ - b.n c5126 │ │ + b.n c5136 │ │ lsls r6, r7, #2 │ │ - b.n c4fb4 │ │ + b.n c4fc4 │ │ str r0, [r1, r0] │ │ - b.n c4f6e │ │ + b.n c4f7e │ │ str r0, [r1, #0] │ │ - b.n c4f72 │ │ - add r0, pc, #144 @ (adr r0, c4cc4 ) │ │ - b.n c4770 │ │ + b.n c4f82 │ │ + add r0, pc, #144 @ (adr r0, c4cd4 ) │ │ + b.n c4780 │ │ strb r4, [r5, #1] │ │ - b.n c4774 │ │ + b.n c4784 │ │ lsls r5, r2, #3 │ │ and.w r0, r0, r8, lsl #4 │ │ - b.n c5382 │ │ + b.n c5392 │ │ movs r4, #190 @ 0xbe │ │ - b.n c4ffa │ │ + b.n c500a │ │ str r4, [r6, r0] │ │ - b.n c4784 │ │ + b.n c4794 │ │ movs r2, r0 │ │ - b.n c4ef0 │ │ + b.n c4f00 │ │ lsls r5, r7, #20 │ │ ldrh r0, [r0, #16] │ │ movs r0, r0 │ │ - b.n c5304 │ │ + b.n c5314 │ │ movs r0, r2 │ │ lsrs r0, r0, #8 │ │ movs r0, #108 @ 0x6c │ │ - b.n c4798 │ │ + b.n c47a8 │ │ str r0, [r0, #0] │ │ - b.n c53a2 │ │ + b.n c53b2 │ │ movs r0, r1 │ │ - b.n c530a │ │ + b.n c531a │ │ movs r0, #116 @ 0x74 │ │ movs r5, #157 @ 0x9d │ │ movs r0, #2 │ │ movs r0, #72 @ 0x48 │ │ movs r0, r2 │ │ movs r3, #82 @ 0x52 │ │ lsls r4, r6, #14 │ │ cmp r2, #0 │ │ movs r0, #108 @ 0x6c │ │ - b.n c47b4 │ │ + b.n c47c4 │ │ strb r2, [r1, #0] │ │ - b.n c518a │ │ + b.n c519a │ │ adds r0, #6 │ │ - b.n c4d06 │ │ + b.n c4d16 │ │ movs r0, #116 @ 0x74 │ │ - b.n c47c0 │ │ + b.n c47d0 │ │ movs r0, #135 @ 0x87 │ │ - b.n c4d8e │ │ + b.n c4d9e │ │ strb r7, [r0, #2] │ │ - b.n c4d9e │ │ + b.n c4dae │ │ str r2, [r6, #8] │ │ - b.n c4e36 │ │ + b.n c4e46 │ │ adds r0, #1 │ │ - b.n c513c │ │ + b.n c514c │ │ str r2, [r6, #8] │ │ - b.n c4e28 │ │ + b.n c4e38 │ │ @ instruction: 0xfffb1aff │ │ adds r0, #108 @ 0x6c │ │ - b.n c47dc │ │ + b.n c47ec │ │ movs r4, r2 │ │ - b.n c5126 │ │ + b.n c5136 │ │ movs r4, r7 │ │ - b.n c47c4 │ │ + b.n c47d4 │ │ movs r4, r2 │ │ - b.n c51be │ │ + b.n c51ce │ │ movs r4, r0 │ │ - b.n c47cc │ │ + b.n c47dc │ │ movs r3, r0 │ │ - b.n c4f68 │ │ + b.n c4f78 │ │ lsls r3, r0, #2 │ │ - b.n c4dba │ │ + b.n c4dca │ │ cmp r7, #255 @ 0xff │ │ - b.n c52dc │ │ + b.n c52ec │ │ movs r0, #176 @ 0xb0 │ │ - b.n c5042 │ │ + b.n c5052 │ │ movs r3, r4 │ │ ldr r2, [sp, #0] │ │ lsls r4, r5, #1 │ │ - b.n c4804 │ │ + b.n c4814 │ │ adds r0, #0 │ │ - b.n c4d60 │ │ + b.n c4d70 │ │ movs r0, r1 │ │ - b.n c5378 │ │ + b.n c5388 │ │ movs r5, r2 │ │ subs r2, #0 │ │ lsls r4, r6, #1 │ │ - b.n c4814 │ │ + b.n c4824 │ │ movs r0, r0 │ │ - b.n c4d6e │ │ + b.n c4d7e │ │ movs r2, r0 │ │ - b.n c51e2 │ │ + b.n c51f2 │ │ movs r0, r2 │ │ - b.n c5386 │ │ + b.n c5396 │ │ lsls r4, r5, #1 │ │ - b.n c4824 │ │ + b.n c4834 │ │ movs r7, r1 │ │ subs r2, #0 │ │ strb r4, [r5, #1] │ │ - b.n c482c │ │ + b.n c483c │ │ stmia r0!, {r0, r1, r2} │ │ - b.n c547c │ │ + b.n c548c │ │ movs r0, #116 @ 0x74 │ │ - b.n c4834 │ │ + b.n c4844 │ │ movs r7, r0 │ │ - b.n c4e16 │ │ + b.n c4e26 │ │ movs r0, #135 @ 0x87 │ │ - b.n c4e06 │ │ + b.n c4e16 │ │ str r4, [r2, #0] │ │ - b.n c520a │ │ + b.n c521a │ │ movs r0, #135 @ 0x87 │ │ - b.n c4e1a │ │ + b.n c4e2a │ │ str r6, [r2, r0] │ │ - b.n c5212 │ │ + b.n c5222 │ │ strb r4, [r1, #0] │ │ - b.n c5052 │ │ + b.n c5062 │ │ lsrs r5, r1, #8 │ │ orn r0, r6, #544 @ 0x220 │ │ - b.n c51c8 │ │ + b.n c51d8 │ │ lsrs r5, r1, #8 │ │ - bl ffd0ad14 │ │ + bl ffd0ad24 │ │ subs r7, r7, r3 │ │ str r4, [r6, r0] │ │ - b.n c4860 │ │ + b.n c4870 │ │ movs r4, r1 │ │ - b.n c4fd0 │ │ + b.n c4fe0 │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, #116 @ 0x74 │ │ - b.n c486c │ │ + b.n c487c │ │ adds r0, #0 │ │ - b.n c4dc8 │ │ + b.n c4dd8 │ │ movs r0, #128 @ 0x80 │ │ - b.n c4e3e │ │ + b.n c4e4e │ │ lsls r0, r0, #2 │ │ - b.n c4e4e │ │ + b.n c4e5e │ │ strb r4, [r2, #0] │ │ - b.n c5246 │ │ + b.n c5256 │ │ movs r6, r2 │ │ - b.n c5246 │ │ + b.n c5256 │ │ movs r0, #178 @ 0xb2 │ │ - b.n c4ef8 │ │ + b.n c4f08 │ │ adds r0, #1 │ │ - b.n c51f4 │ │ + b.n c5204 │ │ movs r0, #178 @ 0xb2 │ │ - b.n c4ed2 │ │ + b.n c4ee2 │ │ @ instruction: 0xfffb1aff │ │ adds r0, #116 @ 0x74 │ │ - b.n c4894 │ │ + b.n c48a4 │ │ movs r2, r0 │ │ - b.n c5260 │ │ + b.n c5270 │ │ lsls r0, r0, #1 │ │ - b.n c487c │ │ + b.n c488c │ │ movs r0, #0 │ │ - b.n c5526 │ │ + b.n c5536 │ │ strb r4, [r5, #1] │ │ - b.n c48a4 │ │ + b.n c48b4 │ │ lsls r2, r7, #2 │ │ - b.n c5114 │ │ + b.n c5124 │ │ adds r0, #16 │ │ - b.n c4898 │ │ + b.n c48a8 │ │ movs r7, r0 │ │ - b.n c5020 │ │ + b.n c5030 │ │ lsls r2, r7, #2 │ │ - b.n c510a │ │ + b.n c511a │ │ movs r0, r0 │ │ - b.n c54be │ │ + b.n c54ce │ │ adds r0, #16 │ │ - b.n c4892 │ │ + b.n c48a2 │ │ adds r0, #5 │ │ - b.n c50c6 │ │ + b.n c50d6 │ │ lsls r4, r7, #2 │ │ - b.n c511a │ │ + b.n c512a │ │ movs r4, r7 │ │ - b.n c48c8 │ │ + b.n c48d8 │ │ movs r0, #4 │ │ - b.n c48a2 │ │ + b.n c48b2 │ │ movs r0, #0 │ │ - b.n c48a6 │ │ + b.n c48b6 │ │ lsls r6, r7, #2 │ │ - b.n c512a │ │ + b.n c513a │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ movs r4, r3 │ │ - b.n c48dc │ │ + b.n c48ec │ │ adds r0, #5 │ │ - b.n c50e6 │ │ + b.n c50f6 │ │ movs r2, r1 │ │ - b.n c544a │ │ + b.n c545a │ │ lsls r4, r6, #1 │ │ movs r5, #157 @ 0x9d │ │ lsls r2, r7, #2 │ │ movs r1, #208 @ 0xd0 │ │ movs r1, r0 │ │ movs r2, #0 │ │ adds r0, #7 │ │ movs r0, #128 @ 0x80 │ │ movs r7, r0 │ │ - b.n c5064 │ │ + b.n c5074 │ │ movs r3, r0 │ │ - b.n c5102 │ │ + b.n c5112 │ │ movs r0, r0 │ │ strh r1, [r1, #2] │ │ movs r0, #11 │ │ - b.n c550a │ │ + b.n c551a │ │ strh r4, [r2, #2] │ │ - b.n c48e8 │ │ + b.n c48f8 │ │ lsls r0, r2, #10 │ │ - b.n c4dd2 │ │ + b.n c4de2 │ │ movs r0, #64 @ 0x40 │ │ - b.n c4910 │ │ + b.n c4920 │ │ adds r0, #100 @ 0x64 │ │ - b.n c48f4 │ │ + b.n c4904 │ │ movs r0, r0 │ │ - b.n c5082 │ │ + b.n c5092 │ │ movs r1, r1 │ │ cmp r2, #0 │ │ lsls r4, r1, #1 │ │ - b.n c4920 │ │ + b.n c4930 │ │ str r4, [r4, #4] │ │ - b.n c4924 │ │ + b.n c4934 │ │ str r4, [r6, r0] │ │ - b.n c4928 │ │ + b.n c4938 │ │ lsls r0, r2, #3 │ │ - b.n c5172 │ │ + b.n c5182 │ │ movs r7, r0 │ │ - b.n c50a2 │ │ + b.n c50b2 │ │ lsls r0, r7, #1 │ │ - b.n c4914 │ │ + b.n c4924 │ │ asrs r4, r7, #1 │ │ - b.n c4918 │ │ + b.n c4928 │ │ lsls r0, r3, #1 │ │ subs r0, r0, r0 │ │ str r7, [r0, #0] │ │ - b.n c5146 │ │ + b.n c5156 │ │ lsls r7, r3, #1 │ │ and.w r0, r0, r7 │ │ - b.n c50b4 │ │ + b.n c50c4 │ │ str r1, [r1, r0] │ │ - b.n c5152 │ │ + b.n c5162 │ │ stmia r0!, {} │ │ - b.n c5556 │ │ + b.n c5566 │ │ str r0, [r0, r0] │ │ strh r0, [r0, #24] │ │ stmia r0!, {r0} │ │ strh r0, [r0, #24] │ │ movs r4, r1 │ │ - b.n c4f2c │ │ + b.n c4f3c │ │ movs r0, #133 @ 0x85 │ │ - b.n c4f36 │ │ + b.n c4f46 │ │ movs r0, r0 │ │ - b.n c4eb0 │ │ + b.n c4ec0 │ │ str r4, [r2, #0] │ │ - b.n c5332 │ │ + b.n c5342 │ │ movs r0, #3 │ │ - b.n c4eca │ │ + b.n c4eda │ │ movs r7, r0 │ │ - b.n c50dc │ │ + b.n c50ec │ │ adds r0, #116 @ 0x74 │ │ - b.n c4974 │ │ + b.n c4984 │ │ movs r0, #20 │ │ - b.n c4958 │ │ - b.n c4e40 │ │ - b.n c5582 │ │ + b.n c4968 │ │ + b.n c4e50 │ │ + b.n c5592 │ │ movs r0, #8 │ │ - b.n c497a │ │ + b.n c498a │ │ strh r2, [r0, #8] │ │ - b.n c560a │ │ + b.n c561a │ │ stmia r0!, {r2, r3, r4} │ │ - b.n c4968 │ │ + b.n c4978 │ │ stmia r0!, {} │ │ - b.n c5612 │ │ + b.n c5622 │ │ asrs r2, r0, #32 │ │ - b.n c4f58 │ │ + b.n c4f68 │ │ movs r0, #188 @ 0xbc │ │ - b.n c5200 │ │ + b.n c5210 │ │ stmia r0!, {r0} │ │ strh r0, [r0, #24] │ │ asrs r2, r0, #32 │ │ - b.n c4f64 │ │ + b.n c4f74 │ │ movs r0, #190 @ 0xbe │ │ - b.n c520c │ │ - add r0, pc, #560 @ (adr r0, c5098 ) │ │ - b.n c51aa │ │ + b.n c521c │ │ + add r0, pc, #560 @ (adr r0, c50a8 ) │ │ + b.n c51ba │ │ asrs r2, r0, #32 │ │ - b.n c4ef0 │ │ + b.n c4f00 │ │ movs r0, #20 │ │ - b.n c5378 │ │ + b.n c5388 │ │ adds r0, #60 @ 0x3c │ │ - b.n c49b0 │ │ + b.n c49c0 │ │ asrs r2, r2, #32 │ │ - b.n c52fc │ │ + b.n c530c │ │ movs r0, #24 │ │ - b.n c4998 │ │ + b.n c49a8 │ │ movs r6, r1 │ │ and.w r0, r0, r1, lsl #8 │ │ - b.n c538c │ │ + b.n c539c │ │ eors r0, r6 │ │ - b.n c49c4 │ │ + b.n c49d4 │ │ adds r0, #60 @ 0x3c │ │ - b.n c49c8 │ │ + b.n c49d8 │ │ movs r0, #1 │ │ - b.n c5616 │ │ - b.n c4eb0 │ │ - b.n c4f9a │ │ + b.n c5626 │ │ + b.n c4ec0 │ │ + b.n c4faa │ │ asrs r2, r0, #32 │ │ - b.n c4f1c │ │ + b.n c4f2c │ │ movs r3, r0 │ │ - b.n c515a │ │ + b.n c516a │ │ movs r3, r0 │ │ str r1, [sp, #324] @ 0x144 │ │ movs r0, r3 │ │ ldr r2, [sp, #0] │ │ movs r0, #104 @ 0x68 │ │ - b.n c49e4 │ │ + b.n c49f4 │ │ str r4, [r1, r0] │ │ - b.n c4fb8 │ │ + b.n c4fc8 │ │ movs r4, r1 │ │ - b.n c4f32 │ │ + b.n c4f42 │ │ str r2, [r1, #0] │ │ - b.n c4fc2 │ │ + b.n c4fd2 │ │ movs r2, r0 │ │ - b.n c5164 │ │ + b.n c5174 │ │ @ instruction: 0xffc82aff │ │ movs r0, #64 @ 0x40 │ │ - b.n c49fc │ │ + b.n c4a0c │ │ movs r5, r0 │ │ - b.n c5174 │ │ + b.n c5184 │ │ @ instruction: 0xfff10aff │ │ movs r0, #176 @ 0xb0 │ │ - b.n c527a │ │ + b.n c528a │ │ adds r0, #24 │ │ - b.n c4a0c │ │ + b.n c4a1c │ │ eors r4, r6 │ │ - b.n c4a10 │ │ + b.n c4a20 │ │ movs r0, #2 │ │ - b.n c4fe0 │ │ + b.n c4ff0 │ │ adds r0, #182 @ 0xb6 │ │ - b.n c5282 │ │ + b.n c5292 │ │ lsls r2, r7 │ │ - b.n c528a │ │ + b.n c529a │ │ adds r0, #10 │ │ - b.n c53ec │ │ + b.n c53fc │ │ movs r2, r0 │ │ - b.n c5512 │ │ + b.n c5522 │ │ @ instruction: 0xffe40aff │ │ strb r4, [r0, #0] │ │ - b.n c4a96 │ │ + b.n c4aa6 │ │ ands r4, r0 │ │ - b.n c5636 │ │ + b.n c5646 │ │ movs r1, r0 │ │ - b.n c5528 │ │ + b.n c5538 │ │ strb r4, [r5, #1] │ │ - b.n c4a38 │ │ + b.n c4a48 │ │ ands r0, r0 │ │ lsls r2, r2, #22 │ │ adds r0, #3 │ │ - b.n c500e │ │ + b.n c501e │ │ @ instruction: 0xffddeaff │ │ movs r0, #28 │ │ - b.n c4a48 │ │ + b.n c4a58 │ │ str r0, [sp, #20] │ │ - b.n c5016 │ │ + b.n c5026 │ │ movs r0, #44 @ 0x2c │ │ - b.n c4a50 │ │ + b.n c4a60 │ │ movs r2, r0 │ │ - b.n c51cc │ │ + b.n c51dc │ │ @ instruction: 0xffe13aff │ │ movs r0, #40 @ 0x28 │ │ - b.n c4a5c │ │ + b.n c4a6c │ │ movs r2, r0 │ │ - b.n c51d8 │ │ + b.n c51e8 │ │ @ instruction: 0xffde8aff │ │ movs r0, r0 │ │ - b.n c55ce │ │ + b.n c55de │ │ movs r0, #0 │ │ - b.n c5272 │ │ + b.n c5282 │ │ movs r0, #0 │ │ negs r0, r4 │ │ movs r0, r1 │ │ - b.n c51de │ │ + b.n c51ee │ │ @ instruction: 0xffa82aff │ │ adds r0, #20 │ │ - b.n c4a7c │ │ + b.n c4a8c │ │ strh r2, [r0, #0] │ │ - b.n c5286 │ │ + b.n c5296 │ │ str r0, [sp, #400] @ 0x190 │ │ - b.n c4a64 │ │ + b.n c4a74 │ │ adds r0, #5 │ │ - b.n c5074 │ │ + b.n c5084 │ │ adds r0, #60 @ 0x3c │ │ - b.n c4a8c │ │ + b.n c4a9c │ │ @ instruction: 0xffd31aff │ │ movs r4, r3 │ │ - b.n c4a94 │ │ + b.n c4aa4 │ │ movs r5, r0 │ │ - b.n c505e │ │ + b.n c506e │ │ lsls r4, r4, #1 │ │ - b.n c4a7c │ │ + b.n c4a8c │ │ @ instruction: 0xff9eeaff │ │ movs r4, r0 │ │ - b.n c4aa4 │ │ + b.n c4ab4 │ │ asrs r4, r6, #1 │ │ - b.n c4aa8 │ │ + b.n c4ab8 │ │ lsls r6, r0, #2 │ │ - b.n c5072 │ │ + b.n c5082 │ │ lsls r0, r6, #2 │ │ - b.n c5316 │ │ + b.n c5326 │ │ movs r0, r0 │ │ - b.n c507c │ │ + b.n c508c │ │ asrs r2, r7, #6 │ │ - b.n c531e │ │ + b.n c532e │ │ movs r4, r3 │ │ - b.n c5482 │ │ + b.n c5492 │ │ lsls r0, r7, #1 │ │ - b.n c4aa0 │ │ + b.n c4ab0 │ │ asrs r4, r7, #1 │ │ - b.n c4aa4 │ │ - add r0, pc, #144 @ (adr r0, c501c ) │ │ - b.n c4ac8 │ │ - b.n c5050 │ │ - b.n c4acc │ │ + b.n c4ab4 │ │ + add r0, pc, #144 @ (adr r0, c502c ) │ │ + b.n c4ad8 │ │ + b.n c5060 │ │ + b.n c4adc │ │ str r0, [sp, #368] @ 0x170 │ │ - b.n c4ad0 │ │ + b.n c4ae0 │ │ strh r0, [r1, #2] │ │ - b.n c4ad4 │ │ + b.n c4ae4 │ │ lsls r4, r7, #1 │ │ - b.n c4ad8 │ │ + b.n c4ae8 │ │ movs r4, #190 @ 0xbe │ │ - b.n c5356 │ │ + b.n c5366 │ │ movs r1, r0 │ │ - b.n c54a6 │ │ + b.n c54b6 │ │ movs r1, r0 │ │ - b.n c572a │ │ + b.n c573a │ │ asrs r0, r1, #32 │ │ - b.n c54ae │ │ + b.n c54be │ │ movs r2, r0 │ │ - b.n c5254 │ │ + b.n c5264 │ │ lsls r4, r4, #17 │ │ ldrh r0, [r0, #16] │ │ movs r0, #32 │ │ - b.n c4af4 │ │ + b.n c4b04 │ │ movs r2, r1 │ │ - b.n c54be │ │ + b.n c54ce │ │ movs r0, r5 │ │ - b.n c4adc │ │ + b.n c4aec │ │ str r4, [r4, #4] │ │ - b.n c4ae0 │ │ + b.n c4af0 │ │ movs r1, #8 │ │ - b.n c4eee │ │ + b.n c4efe │ │ adds r0, #188 @ 0xbc │ │ - b.n c5372 │ │ + b.n c5382 │ │ movs r0, #190 @ 0xbe │ │ - b.n c5376 │ │ + b.n c5386 │ │ movs r0, #3 │ │ - b.n c505a │ │ + b.n c506a │ │ movs r0, #44 @ 0x2c │ │ - b.n c4af4 │ │ + b.n c4b04 │ │ movs r0, r0 │ │ - b.n c5282 │ │ + b.n c5292 │ │ movs r7, r5 │ │ cmp r2, #0 │ │ movs r0, #5 │ │ - b.n c4b98 │ │ + b.n c4ba8 │ │ lsls r0, r3, #3 │ │ - b.n c537c │ │ + b.n c538c │ │ movs r0, #1 │ │ - b.n c5472 │ │ + b.n c5482 │ │ movs r0, #5 │ │ - b.n c4b84 │ │ + b.n c4b94 │ │ movs r0, #76 @ 0x4c │ │ - b.n c4b18 │ │ + b.n c4b28 │ │ asrs r4, r2, #1 │ │ - b.n c4b1c │ │ + b.n c4b2c │ │ movs r2, r0 │ │ - b.n c507e │ │ + b.n c508e │ │ adds r0, #16 │ │ - b.n c4b3e │ │ + b.n c4b4e │ │ strh r5, [r2, #6] │ │ - b.n c53ae │ │ + b.n c53be │ │ movs r1, #0 │ │ - b.n c4f2c │ │ + b.n c4f3c │ │ movs r1, #48 @ 0x30 │ │ - b.n c4b28 │ │ + b.n c4b38 │ │ movs r0, #132 @ 0x84 │ │ - b.n c552c │ │ + b.n c553c │ │ movs r1, #0 │ │ - b.n c4f18 │ │ + b.n c4f28 │ │ movs r0, r0 │ │ - b.n c575a │ │ + b.n c576a │ │ asrs r0, r7, #1 │ │ - b.n c5538 │ │ + b.n c5548 │ │ movs r0, r0 │ │ - b.n c4b3c │ │ + b.n c4b4c │ │ movs r1, r1 │ │ - b.n c5366 │ │ + b.n c5376 │ │ movs r0, #0 │ │ - b.n c576a │ │ + b.n c577a │ │ stc2 11, cr14, [r7, #-1020] @ 0xfffffc04 @ │ │ asrs r1, r1, #32 │ │ - b.n c5372 │ │ + b.n c5382 │ │ str r0, [sp, #0] │ │ - b.n c5376 │ │ + b.n c5386 │ │ lsls r0, r3, #3 │ │ - b.n c53bc │ │ + b.n c53cc │ │ movs r0, r0 │ │ - b.n c56f0 │ │ + b.n c5700 │ │ movs r0, #76 @ 0x4c │ │ - b.n c4b64 │ │ + b.n c4b74 │ │ asrs r4, r2, #1 │ │ - b.n c4b68 │ │ + b.n c4b78 │ │ movs r2, r0 │ │ - b.n c50ca │ │ + b.n c50da │ │ adds r1, #48 @ 0x30 │ │ - b.n c4b88 │ │ + b.n c4b98 │ │ adds r1, #0 │ │ - b.n c4f54 │ │ + b.n c4f64 │ │ lsls r3, r2, #10 │ │ subs r0, r0, r0 │ │ adds r0, #213 @ 0xd5 │ │ - b.n c5402 │ │ + b.n c5412 │ │ asrs r0, r1, #1 │ │ - b.n c4b98 │ │ + b.n c4ba8 │ │ movs r0, r1 │ │ - b.n c50e8 │ │ - add r0, pc, #4 @ (adr r0, c5068 ) │ │ - b.n c5166 │ │ + b.n c50f8 │ │ + add r0, pc, #4 @ (adr r0, c5078 ) │ │ + b.n c5176 │ │ lsls r0, r3, #1 │ │ - b.n c4ba4 │ │ + b.n c4bb4 │ │ asrs r0, r4, #32 │ │ - b.n c4ba8 │ │ + b.n c4bb8 │ │ lsls r2, r1, #4 │ │ - b.n c4f92 │ │ + b.n c4fa2 │ │ str r1, [sp, #40] @ 0x28 │ │ - b.n c4f98 │ │ + b.n c4fa8 │ │ movs r0, r0 │ │ - b.n c532c │ │ + b.n c533c │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ - b.n c5120 │ │ - b.n c4bbc │ │ + b.n c5130 │ │ + b.n c4bcc │ │ asrs r2, r1, #2 │ │ - b.n c53c6 │ │ + b.n c53d6 │ │ lsls r4, r7, #2 │ │ - b.n c542a │ │ + b.n c543a │ │ asrs r1, r6, #2 │ │ - b.n c540a │ │ + b.n c541a │ │ lsls r0, r4, #2 │ │ - b.n c5334 │ │ + b.n c5344 │ │ movs r2, r4 │ │ cmp r2, #0 │ │ strh r2, [r1, #0] │ │ - b.n c53da │ │ - add r0, pc, #464 @ (adr r0, c526c ) │ │ - b.n c4bd8 │ │ + b.n c53ea │ │ + add r0, pc, #464 @ (adr r0, c527c ) │ │ + b.n c4be8 │ │ lsls r7, r0, #2 │ │ @ instruction: 0xea00a074 │ │ - b.n c4be0 │ │ + b.n c4bf0 │ │ movs r0, r0 │ │ - b.n c5754 │ │ + b.n c5764 │ │ lsls r2, r6, #12 │ │ lsrs r0, r0, #8 │ │ movs r5, r0 │ │ - b.n c4c64 │ │ + b.n c4c74 │ │ strb r4, [r1, #0] │ │ - b.n c4be8 │ │ + b.n c4bf8 │ │ movs r1, r0 │ │ - b.n c553a │ │ + b.n c554a │ │ movs r5, r0 │ │ - b.n c4c50 │ │ + b.n c4c60 │ │ movs r0, #64 @ 0x40 │ │ - b.n c4bf0 │ │ + b.n c4c00 │ │ movs r4, #190 @ 0xbe │ │ - b.n c546a │ │ + b.n c547a │ │ movs r2, r0 │ │ - b.n c536c │ │ + b.n c537c │ │ lsls r6, r3, #16 │ │ ldrh r0, [r0, #16] │ │ movs r0, #32 │ │ - b.n c4c0c │ │ + b.n c4c1c │ │ lsls r0, r6, #1 │ │ - b.n c4e34 │ │ + b.n c4e44 │ │ lsls r0, r0, #4 │ │ - b.n c4ffe │ │ + b.n c500e │ │ adds r0, #190 @ 0xbe │ │ - b.n c547e │ │ + b.n c548e │ │ movs r0, #188 @ 0xbc │ │ - b.n c5482 │ │ + b.n c5492 │ │ asrs r1, r0, #32 │ │ - b.n c516c │ │ + b.n c517c │ │ str r0, [sp, #8] │ │ - b.n c55ee │ │ + b.n c55fe │ │ movs r1, r0 │ │ - b.n c53a0 │ │ + b.n c53b0 │ │ lsls r4, r3, #13 │ │ ldmia r2!, {} │ │ adds r0, #16 │ │ - b.n c4c30 │ │ + b.n c4c40 │ │ stmia r0!, {r4} │ │ - b.n c4c36 │ │ + b.n c4c46 │ │ strb r0, [r6, #2] │ │ - b.n c54a4 │ │ + b.n c54b4 │ │ lsls r2, r4, #2 │ │ - b.n c53b0 │ │ + b.n c53c0 │ │ lsls r2, r3, #1 │ │ cmp r2, #0 │ │ movs r0, #162 @ 0xa2 │ │ - b.n c544a │ │ + b.n c545a │ │ strh r7, [r0, #0] │ │ - b.n c5192 │ │ + b.n c51a2 │ │ movs r0, r1 │ │ - b.n c57c2 │ │ + b.n c57d2 │ │ movs r6, r7 │ │ cmp r2, #0 │ │ str r2, [r0, #0] │ │ - b.n c545a │ │ + b.n c546a │ │ strh r0, [r1, #2] │ │ - b.n c4c58 │ │ + b.n c4c68 │ │ lsls r2, r1, #1 │ │ and.w r0, r0, r1 │ │ - b.n c57da │ │ + b.n c57ea │ │ movs r4, r5 │ │ rev r0, r0 │ │ movs r0, #0 │ │ - b.n c586e │ │ + b.n c587e │ │ movs r4, r0 │ │ - b.n c57e6 │ │ + b.n c57f6 │ │ stmia r0!, {} │ │ - b.n c5876 │ │ + b.n c5886 │ │ movs r3, r2 │ │ subs r2, #0 │ │ stmia r1!, {r1, r2, r3} │ │ - b.n c58d2 │ │ + b.n c58e2 │ │ eors r0, r6 │ │ - b.n c4c7c │ │ + b.n c4c8c │ │ str r4, [r3, r1] │ │ - b.n c4c80 │ │ + b.n c4c90 │ │ strb r4, [r3, #0] │ │ - b.n c588a │ │ + b.n c589a │ │ str r4, [r7, #4] │ │ - b.n c588e │ │ + b.n c589e │ │ movs r4, r1 │ │ - b.n c5492 │ │ + b.n c54a2 │ │ asrs r7, r0, #32 │ │ - b.n c5260 │ │ + b.n c5270 │ │ movs r4, r0 │ │ - b.n c55fa │ │ + b.n c560a │ │ lsrs r7, r1, #10 │ │ orn r0, r1, #2195456 @ 0x218000 │ │ - b.n c526c │ │ + b.n c527c │ │ movs r7, #79 @ 0x4f │ │ orn r0, r1, #2211840 @ 0x21c000 │ │ - b.n c5272 │ │ + b.n c5282 │ │ strb r0, [r2, #0] │ │ - b.n c567c │ │ + b.n c568c │ │ lsrs r7, r1, #10 │ │ orr.w r0, r1, #2195456 @ 0x218000 │ │ - b.n c527e │ │ + b.n c528e │ │ str r0, [r1, #0] │ │ - b.n c5686 │ │ + b.n c5696 │ │ movs r7, #79 @ 0x4f │ │ - bl ffd07164 │ │ + bl ffd07174 │ │ subs r7, r7, r3 │ │ movs r4, r1 │ │ - b.n c543a │ │ + b.n c544a │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ movs r7, r0 │ │ - b.n c56a6 │ │ + b.n c56b6 │ │ str r4, [r3, r1] │ │ - b.n c4ccc │ │ + b.n c4cdc │ │ eors r0, r6 │ │ - b.n c4cd0 │ │ + b.n c4ce0 │ │ asrs r6, r7, #32 │ │ - b.n c56b2 │ │ + b.n c56c2 │ │ strb r0, [r0, #4] │ │ - b.n c52a8 │ │ + b.n c52b8 │ │ str r0, [r0, #16] │ │ - b.n c52aa │ │ + b.n c52ba │ │ lsls r1, r0, #2 │ │ - b.n c52b0 │ │ + b.n c52c0 │ │ asrs r1, r0, #2 │ │ - b.n c52b2 │ │ + b.n c52c2 │ │ eors r0, r1 │ │ - b.n c4ce8 │ │ + b.n c4cf8 │ │ adds r0, #3 │ │ - b.n c52ba │ │ + b.n c52ca │ │ adds r0, #12 │ │ - b.n c523c │ │ + b.n c524c │ │ adds r0, #8 │ │ - b.n c5240 │ │ + b.n c5250 │ │ lsls r2, r0 │ │ - b.n c50ec │ │ + b.n c50fc │ │ str r2, [r0, r0] │ │ - b.n c52c2 │ │ + b.n c52d2 │ │ adds r0, #1 │ │ - b.n c566c │ │ + b.n c567c │ │ lsls r2, r0 │ │ - b.n c50d6 │ │ + b.n c50e6 │ │ ands r2, r0 │ │ - b.n c52d0 │ │ + b.n c52e0 │ │ movs r0, #2 │ │ - b.n c56d6 │ │ + b.n c56e6 │ │ str r0, [r6, r2] │ │ - b.n c5580 │ │ + b.n c5590 │ │ str r0, [r6, r2] │ │ - b.n c5562 │ │ + b.n c5572 │ │ @ instruction: 0xfff61aff │ │ movs r4, r1 │ │ - b.n c4d1c │ │ + b.n c4d2c │ │ asrs r0, r3, #1 │ │ - b.n c4d20 │ │ + b.n c4d30 │ │ lsls r2, r1, #2 │ │ - b.n c52ea │ │ + b.n c52fa │ │ lsls r0, r6, #2 │ │ - b.n c558e │ │ + b.n c559e │ │ str r1, [sp, #40] @ 0x28 │ │ - b.n c50f4 │ │ + b.n c5104 │ │ movs r0, r0 │ │ - b.n c5896 │ │ + b.n c58a6 │ │ lsls r1, r4, #9 │ │ lsrs r0, r0, #8 │ │ strh r2, [r1, #0] │ │ - b.n c553e │ │ + b.n c554e │ │ eors r0, r6 │ │ - b.n c4d3c │ │ - add r0, pc, #464 @ (adr r0, c53d4 ) │ │ - b.n c4d40 │ │ + b.n c4d4c │ │ + add r0, pc, #464 @ (adr r0, c53e4 ) │ │ + b.n c4d50 │ │ movs r1, r0 │ │ - b.n c568a │ │ + b.n c569a │ │ lsls r0, r6, #2 │ │ - b.n c55aa │ │ + b.n c55ba │ │ movs r1, r5 │ │ @ instruction: 0xea00e007 │ │ - b.n c59a6 │ │ + b.n c59b6 │ │ str r7, [r1, r0] │ │ - b.n c59da │ │ + b.n c59ea │ │ str r6, [r1, #0] │ │ - b.n c52a2 │ │ + b.n c52b2 │ │ movs r0, #130 @ 0x82 │ │ - b.n c5322 │ │ + b.n c5332 │ │ movs r0, #6 │ │ - b.n c572a │ │ + b.n c573a │ │ adds r0, #14 │ │ - b.n c556a │ │ + b.n c557a │ │ ands r2, r0 │ │ - b.n c56b2 │ │ + b.n c56c2 │ │ adds r0, #8 │ │ - b.n c56d8 │ │ + b.n c56e8 │ │ lsrs r7, r1, #8 │ │ orn sl, r4, #8716288 @ 0x850000 │ │ - bl ffd0822e │ │ + bl ffd0823e │ │ subs r7, r7, r3 │ │ movs r6, r1 │ │ - b.n c54f2 │ │ + b.n c5502 │ │ eors r0, r6 │ │ - b.n c4d80 │ │ + b.n c4d90 │ │ strh r0, [r1, #2] │ │ - b.n c4d84 │ │ + b.n c4d94 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, #134 @ 0x86 │ │ - b.n c5352 │ │ + b.n c5362 │ │ str r4, [r2, r0] │ │ - b.n c575a │ │ + b.n c576a │ │ movs r0, #5 │ │ - b.n c559a │ │ + b.n c55aa │ │ adds r0, #178 @ 0xb2 │ │ - b.n c5542 │ │ + b.n c5552 │ │ str r1, [r0, #0] │ │ - b.n c56ee │ │ + b.n c56fe │ │ adds r0, #176 @ 0xb0 │ │ - b.n c55f0 │ │ + b.n c5600 │ │ movs r7, r0 │ │ - b.n c5516 │ │ + b.n c5526 │ │ str r2, [r0, r0] │ │ - b.n c55ae │ │ + b.n c55be │ │ @ instruction: 0xfff98aff │ │ asrs r6, r7, #2 │ │ - b.n c55f6 │ │ + b.n c5606 │ │ str r0, [sp, #752] @ 0x2f0 │ │ - b.n c55fa │ │ + b.n c560a │ │ movs r4, r2 │ │ - b.n c577e │ │ + b.n c578e │ │ movs r0, #135 @ 0x87 │ │ - b.n c5382 │ │ + b.n c5392 │ │ asrs r0, r6, #2 │ │ - b.n c560a │ │ + b.n c561a │ │ asrs r1, r6, #1 │ │ - b.n c5088 │ │ + b.n c5098 │ │ stmia r0!, {r0} │ │ - b.n c51ce │ │ + b.n c51de │ │ asrs r0, r0, #32 │ │ - b.n c59d2 │ │ + b.n c59e2 │ │ asrs r4, r6, #2 │ │ - b.n c5616 │ │ + b.n c5626 │ │ movs r0, #124 @ 0x7c │ │ - b.n c4dd4 │ │ + b.n c4de4 │ │ asrs r0, r7, #1 │ │ - b.n c4dd8 │ │ + b.n c4de8 │ │ movs r0, #182 @ 0xb6 │ │ - b.n c5622 │ │ + b.n c5632 │ │ movs r0, r1 │ │ - b.n c57a6 │ │ - eors r6, r0 │ │ + b.n c57b6 │ │ + ands r3, r1 │ │ @ instruction: 0xfb00105c │ │ - b.n c4de8 │ │ + b.n c4df8 │ │ movs r5, r0 │ │ - b.n c4e54 │ │ + b.n c4e64 │ │ movs r1, r0 │ │ - b.n c57b6 │ │ + b.n c57c6 │ │ movs r5, r0 │ │ - b.n c4e3c │ │ + b.n c4e4c │ │ strb r4, [r5, #1] │ │ - b.n c4df8 │ │ + b.n c4e08 │ │ str r4, [r6, r0] │ │ - b.n c4dfc │ │ + b.n c4e0c │ │ adds r0, #100 @ 0x64 │ │ - b.n c4e00 │ │ + b.n c4e10 │ │ lsrs r5, r2, #28 │ │ - b.n c55a8 │ │ + b.n c55b8 │ │ movs r0, r0 │ │ - b.n c5978 │ │ + b.n c5988 │ │ lsls r0, r4, #10 │ │ - b.n c5612 │ │ + b.n c5622 │ │ movs r4, r3 │ │ - b.n c4df0 │ │ + b.n c4e00 │ │ lsls r0, r5, #1 │ │ - b.n c4e14 │ │ + b.n c4e24 │ │ movs r5, r0 │ │ asrs r0, r2, #5 │ │ lsls r2, r4, #10 │ │ lsrs r0, r0, #8 │ │ movs r0, #84 @ 0x54 │ │ - b.n c4e20 │ │ + b.n c4e30 │ │ str r0, [r4, #4] │ │ - b.n c4e24 │ │ + b.n c4e34 │ │ movs r0, r0 │ │ - b.n c5992 │ │ + b.n c59a2 │ │ lsls r5, r7, #1 │ │ lsrs r0, r0, #8 │ │ lsls r5, r2, #3 │ │ - b.n c569e │ │ + b.n c56ae │ │ str r3, [r0, r0] │ │ - b.n c563a │ │ + b.n c564a │ │ asrs r0, r3, #1 │ │ - b.n c4e38 │ │ + b.n c4e48 │ │ strh r0, [r1, #2] │ │ - b.n c4e1c │ │ + b.n c4e2c │ │ strh r0, [r5, #0] │ │ - b.n c579c │ │ + b.n c57ac │ │ str r0, [r0, #16] │ │ - b.n c520c │ │ + b.n c521c │ │ movs r4, r2 │ │ - b.n c5822 │ │ - add r0, pc, #0 @ (adr r0, c5310 ) │ │ - b.n c5a52 │ │ + b.n c5832 │ │ + add r0, pc, #0 @ (adr r0, c5320 ) │ │ + b.n c5a62 │ │ lsls r0, r0, #1 │ │ - b.n c4e30 │ │ + b.n c4e40 │ │ movs r4, r2 │ │ - b.n c581e │ │ + b.n c582e │ │ movs r4, r7 │ │ - b.n c4e38 │ │ + b.n c4e48 │ │ movs r7, r0 │ │ and.w r0, r0, r5, lsr #3 │ │ - b.n c56ce │ │ - add r0, pc, #0 @ (adr r0, c5328 ) │ │ - b.n c5a6a │ │ + b.n c56de │ │ + add r0, pc, #0 @ (adr r0, c5338 ) │ │ + b.n c5a7a │ │ asrs r0, r3, #1 │ │ - b.n c4e68 │ │ + b.n c4e78 │ │ str r0, [r0, r0] │ │ - b.n c5a72 │ │ + b.n c5a82 │ │ movs r0, #84 @ 0x54 │ │ - b.n c4e70 │ │ + b.n c4e80 │ │ movs r1, #0 │ │ - b.n c523c │ │ + b.n c524c │ │ movs r3, r0 │ │ - b.n c55e8 │ │ + b.n c55f8 │ │ lsls r0, r2, #1 │ │ lsrs r0, r0, #8 │ │ movs r7, r0 │ │ - b.n c55f0 │ │ + b.n c5600 │ │ movs r5, r3 │ │ subs r0, r0, r0 │ │ asrs r4, r1, #1 │ │ - b.n c4e88 │ │ + b.n c4e98 │ │ lsls r5, r2, #3 │ │ - b.n c56fa │ │ + b.n c570a │ │ strb r0, [r2, #1] │ │ - b.n c4e90 │ │ + b.n c4ea0 │ │ movs r0, #208 @ 0xd0 │ │ - b.n c56dc │ │ + b.n c56ec │ │ asrs r4, r6, #1 │ │ - b.n c4e98 │ │ + b.n c4ea8 │ │ lsls r0, r0, #2 │ │ - b.n c5470 │ │ + b.n c5480 │ │ adds r0, #36 @ 0x24 │ │ - b.n c4d7c │ │ + b.n c4d8c │ │ adds r0, #0 │ │ - b.n c5aaa │ │ + b.n c5aba │ │ movs r0, #40 @ 0x28 │ │ - b.n c4d84 │ │ + b.n c4d94 │ │ asrs r2, r7, #2 │ │ - b.n c5714 │ │ - add r0, pc, #704 @ (adr r0, c5634 ) │ │ - b.n c56f6 │ │ + b.n c5724 │ │ + add r0, pc, #704 @ (adr r0, c5644 ) │ │ + b.n c5706 │ │ movs r0, r7 │ │ - b.n c4eb4 │ │ + b.n c4ec4 │ │ movs r2, r0 │ │ - b.n c59a0 │ │ + b.n c59b0 │ │ adds r0, #0 │ │ lsls r0, r4, #6 │ │ lsrs r1, r0, #28 │ │ - b.n c56c6 │ │ + b.n c56d6 │ │ asrs r4, r0, #1 │ │ - b.n c4ec4 │ │ + b.n c4ed4 │ │ ldrb r0, [r0, #31] │ │ - b.n c5390 │ │ + b.n c53a0 │ │ movs r0, r1 │ │ - b.n c4ec8 │ │ + b.n c4ed8 │ │ movs r0, #10 │ │ - b.n c4f42 │ │ + b.n c4f52 │ │ movs r2, r0 │ │ - b.n c5a3e │ │ + b.n c5a4e │ │ movs r6, r4 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n c5a46 │ │ + b.n c5a56 │ │ lsls r1, r2, #8 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n c5a5e │ │ + b.n c5a6e │ │ movs r0, #10 │ │ - b.n c56ee │ │ + b.n c56fe │ │ movs r0, #8 │ │ asrs r0, r4, #6 │ │ movs r4, r0 │ │ - b.n c56f6 │ │ + b.n c5706 │ │ asrs r2, r1, #32 │ │ - b.n c56fa │ │ + b.n c570a │ │ lsrs r3, r4, #26 │ │ add.w r0, r0, r3, asr #32 │ │ and.w r0, r0, ip, rrx │ │ - b.n c4f00 │ │ + b.n c4f10 │ │ asrs r4, r6, #1 │ │ - b.n c4f04 │ │ + b.n c4f14 │ │ lsls r5, r0, #2 │ │ - b.n c54ce │ │ + b.n c54de │ │ adds r0, #10 │ │ - b.n c4f74 │ │ + b.n c4f84 │ │ lsls r0, r6, #2 │ │ - b.n c5776 │ │ + b.n c5786 │ │ asrs r0, r0, #1 │ │ - b.n c4f14 │ │ + b.n c4f24 │ │ movs r2, r0 │ │ - b.n c5a04 │ │ + b.n c5a14 │ │ movs r0, r0 │ │ - b.n c54e4 │ │ + b.n c54f4 │ │ movs r0, #8 │ │ - b.n c58e6 │ │ + b.n c58f6 │ │ asrs r6, r6, #2 │ │ - b.n c578a │ │ + b.n c579a │ │ movs r0, #40 @ 0x28 │ │ - b.n c4e04 │ │ + b.n c4e14 │ │ asrs r4, r4, #32 │ │ - b.n c4e08 │ │ + b.n c4e18 │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ adds r0, #0 │ │ - b.n c4f1a │ │ + b.n c4f2a │ │ strb r0, [r0, #0] │ │ - b.n c5b3e │ │ + b.n c5b4e │ │ movs r4, r0 │ │ - b.n c4fa2 │ │ + b.n c4fb2 │ │ movs r0, #10 │ │ - b.n c4fb2 │ │ + b.n c4fc2 │ │ movs r2, r0 │ │ - b.n c5aae │ │ + b.n c5abe │ │ @ instruction: 0xffe31aff │ │ movs r1, r1 │ │ and.w r0, r0, r1, lsl #4 │ │ - b.n c551a │ │ + b.n c552a │ │ asrs r0, r6, #32 │ │ - b.n c4e30 │ │ + b.n c4e40 │ │ asrs r0, r0, #32 │ │ - b.n c4f3e │ │ + b.n c4f4e │ │ strb r0, [r6, #0] │ │ - b.n c58b8 │ │ + b.n c58c8 │ │ asrs r4, r5, #32 │ │ - b.n c4e3c │ │ + b.n c4e4c │ │ adds r0, #0 │ │ - b.n c5b6a │ │ + b.n c5b7a │ │ movs r4, r0 │ │ - b.n c4fce │ │ + b.n c4fde │ │ movs r0, #10 │ │ - b.n c4fde │ │ + b.n c4fee │ │ movs r2, r0 │ │ - b.n c5ada │ │ + b.n c5aea │ │ @ instruction: 0xffd81aff │ │ movs r0, r0 │ │ - b.n c4f58 │ │ + b.n c4f68 │ │ movs r4, r0 │ │ - b.n c5782 │ │ + b.n c5792 │ │ asrs r2, r1, #32 │ │ - b.n c5786 │ │ + b.n c5796 │ │ movs r0, #8 │ │ - b.n c578a │ │ + b.n c579a │ │ adds r0, #7 │ │ - b.n c578e │ │ + b.n c579e │ │ lsls r5, r7, #14 │ │ add.w r0, r0, ip, asr #29 │ │ - b.n c4f90 │ │ + b.n c4fa0 │ │ str r0, [sp, #0] │ │ - b.n c579a │ │ + b.n c57aa │ │ str r0, [r4, #4] │ │ - b.n c4f98 │ │ + b.n c4fa8 │ │ movs r0, r0 │ │ - b.n c5b02 │ │ + b.n c5b12 │ │ adds r0, #100 @ 0x64 │ │ - b.n c4fa0 │ │ + b.n c4fb0 │ │ lsls r6, r1, #6 │ │ subs r0, r0, r0 │ │ lsls r0, r5, #1 │ │ - b.n c4fa8 │ │ + b.n c4fb8 │ │ str r1, [r0, r0] │ │ - b.n c597c │ │ + b.n c598c │ │ movs r0, r0 │ │ - b.n c5720 │ │ + b.n c5730 │ │ @ instruction: 0xffa98aff │ │ - add r0, pc, #4 @ (adr r0, c5480 ) │ │ - b.n c5992 │ │ + add r0, pc, #4 @ (adr r0, c5490 ) │ │ + b.n c59a2 │ │ movs r3, r0 │ │ - b.n c572c │ │ + b.n c573c │ │ @ instruction: 0xffae1aff │ │ lsls r4, r2, #1 │ │ - b.n c4fc4 │ │ + b.n c4fd4 │ │ movs r0, #188 @ 0xbc │ │ - b.n c582e │ │ + b.n c583e │ │ lsls r2, r4, #2 │ │ - b.n c57f2 │ │ + b.n c5802 │ │ lsls r4, r2, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, r2 │ │ - b.n c5b3e │ │ - add r0, pc, #464 @ (adr r0, c566c ) │ │ - b.n c4fd8 │ │ + b.n c5b4e │ │ + add r0, pc, #464 @ (adr r0, c567c ) │ │ + b.n c4fe8 │ │ movs r0, #84 @ 0x54 │ │ movs r5, #157 @ 0x9d │ │ asrs r0, r0, #32 │ │ - b.n c5be6 │ │ + b.n c5bf6 │ │ str r4, [r4, r0] │ │ - b.n c4fe4 │ │ + b.n c4ff4 │ │ strh r0, [r1, #2] │ │ - b.n c4fe8 │ │ + b.n c4ff8 │ │ movs r0, #2 │ │ movs r0, #74 @ 0x4a │ │ movs r0, r2 │ │ movs r3, #82 @ 0x52 │ │ lsls r0, r3, #6 │ │ cmp r2, #0 │ │ movs r0, #1 │ │ - b.n c553e │ │ + b.n c554e │ │ adds r0, #10 │ │ - b.n c59c4 │ │ + b.n c59d4 │ │ asrs r4, r2, #1 │ │ - b.n c5000 │ │ + b.n c5010 │ │ asrs r3, r0, #2 │ │ - b.n c55cc │ │ + b.n c55dc │ │ adds r0, #131 @ 0x83 │ │ - b.n c55e2 │ │ + b.n c55f2 │ │ strb r2, [r6, #2] │ │ - b.n c5674 │ │ + b.n c5684 │ │ movs r0, #1 │ │ - b.n c597a │ │ + b.n c598a │ │ strb r2, [r6, #2] │ │ - b.n c5660 │ │ + b.n c5670 │ │ @ instruction: 0xfffb1aff │ │ str r4, [r2, #4] │ │ - b.n c501c │ │ + b.n c502c │ │ movs r0, #188 @ 0xbc │ │ - b.n c5892 │ │ + b.n c58a2 │ │ lsls r3, r0, #1 │ │ and.w r0, r0, r7 │ │ - b.n c5794 │ │ + b.n c57a4 │ │ lsls r2, r3, #2 │ │ ldrh r0, [r0, #16] │ │ movs r0, r4 │ │ - b.n c5030 │ │ + b.n c5040 │ │ asrs r0, r2, #1 │ │ - b.n c5034 │ │ + b.n c5044 │ │ adds r0, #136 @ 0x88 │ │ - b.n c5600 │ │ + b.n c5610 │ │ movs r1, #8 │ │ - b.n c5422 │ │ + b.n c5432 │ │ lsls r5, r2, #3 │ │ - b.n c58ae │ │ + b.n c58be │ │ asrs r0, r3, #1 │ │ - b.n c5044 │ │ + b.n c5054 │ │ strb r0, [r6, #2] │ │ - b.n c58b4 │ │ + b.n c58c4 │ │ str r0, [r0, #16] │ │ - b.n c5414 │ │ + b.n c5424 │ │ movs r1, r0 │ │ - b.n c5a24 │ │ + b.n c5a34 │ │ asrs r0, r1, #4 │ │ - b.n c543c │ │ + b.n c544c │ │ lsls r0, r6, #2 │ │ - b.n c58a4 │ │ + b.n c58b4 │ │ movs r1, r0 │ │ - b.n c57c6 │ │ + b.n c57d6 │ │ lsls r5, r1, #2 │ │ lsrs r0, r0, #8 │ │ asrs r4, r7, #2 │ │ - b.n c58cc │ │ + b.n c58dc │ │ lsls r0, r6, #1 │ │ - b.n c532c │ │ + b.n c533c │ │ adds r0, #48 @ 0x30 │ │ - b.n c506c │ │ + b.n c507c │ │ lsls r1, r4, #2 │ │ - b.n c57d6 │ │ + b.n c57e6 │ │ lsls r1, r1, #2 │ │ subs r2, #0 │ │ movs r0, r0 │ │ - b.n c5bee │ │ + b.n c5bfe │ │ lsls r7, r0, #2 │ │ - ldr r2, [pc, #0] @ (c5540 ) │ │ + ldr r2, [pc, #0] @ (c5550 ) │ │ str r4, [r3, #4] │ │ - b.n c5080 │ │ + b.n c5090 │ │ movs r0, r0 │ │ - b.n c5c8a │ │ + b.n c5c9a │ │ movs r3, r0 │ │ - b.n c5bfe │ │ + b.n c5c0e │ │ stmia r0!, {} │ │ - b.n c5c92 │ │ + b.n c5ca2 │ │ movs r2, r2 │ │ subs r2, #0 │ │ movs r0, #1 │ │ - b.n c5a6a │ │ + b.n c5a7a │ │ adds r0, #28 │ │ - b.n c5c9e │ │ + b.n c5cae │ │ stmia r1!, {r1, r2, r3} │ │ - b.n c5ce6 │ │ + b.n c5cf6 │ │ strb r4, [r7, #1] │ │ - b.n c5ca6 │ │ + b.n c5cb6 │ │ asrs r4, r1, #32 │ │ - b.n c58aa │ │ + b.n c58ba │ │ str r3, [r0, r0] │ │ - b.n c567a │ │ + b.n c568a │ │ asrs r4, r0, #32 │ │ - b.n c5a14 │ │ + b.n c5a24 │ │ lsrs r7, r1, #10 │ │ orn r0, r5, #8640 @ 0x21c0 │ │ - b.n c5686 │ │ + b.n c5696 │ │ movs r7, #79 @ 0x4f │ │ orn r0, r5, #8384 @ 0x20c0 │ │ - b.n c568a │ │ + b.n c569a │ │ adds r0, #16 │ │ - b.n c5a8c │ │ + b.n c5a9c │ │ lsrs r7, r1, #10 │ │ orr.w r0, r5, #8640 @ 0x21c0 │ │ - b.n c5696 │ │ + b.n c56a6 │ │ strb r0, [r1, #0] │ │ - b.n c5aa0 │ │ + b.n c5ab0 │ │ movs r7, #79 @ 0x4f │ │ - bl ffd0b57c │ │ + bl ffd0b58c │ │ subs r7, r7, r3 │ │ movs r4, r1 │ │ - b.n c5842 │ │ + b.n c5852 │ │ lsls r6, r5, #1 │ │ lsrs r0, r0, #8 │ │ asrs r7, r0, #32 │ │ - b.n c5abe │ │ + b.n c5ace │ │ strb r6, [r7, #0] │ │ - b.n c5ac2 │ │ + b.n c5ad2 │ │ movs r1, #1 │ │ - b.n c56ba │ │ + b.n c56ca │ │ adds r0, #135 @ 0x87 │ │ - b.n c56be │ │ + b.n c56ce │ │ asrs r1, r0, #4 │ │ - b.n c56be │ │ + b.n c56ce │ │ strb r7, [r0, #2] │ │ - b.n c56c2 │ │ + b.n c56d2 │ │ str r1, [r0, #0] │ │ - b.n c5a56 │ │ + b.n c5a66 │ │ str r0, [r0, r2] │ │ - b.n c54e6 │ │ + b.n c54f6 │ │ ands r0, r0 │ │ - b.n c56cc │ │ + b.n c56dc │ │ str r1, [r0, #0] │ │ - b.n c5ad6 │ │ + b.n c5ae6 │ │ str r0, [r0, r2] │ │ - b.n c54d0 │ │ + b.n c54e0 │ │ str r0, [r0, r0] │ │ - b.n c56e0 │ │ + b.n c56f0 │ │ movs r2, r0 │ │ - b.n c5ad6 │ │ + b.n c5ae6 │ │ lsls r0, r6 │ │ - b.n c5982 │ │ + b.n c5992 │ │ movs r6, r0 │ │ - b.n c588e │ │ + b.n c589e │ │ lsls r0, r6 │ │ - b.n c596c │ │ + b.n c597c │ │ @ instruction: 0xfff51aff │ │ lsls r3, r3, #1 │ │ and.w r0, r0, r4, asr #20 │ │ - b.n c5128 │ │ - add r0, pc, #464 @ (adr r0, c57c0 ) │ │ - b.n c512c │ │ + b.n c5138 │ │ + add r0, pc, #464 @ (adr r0, c57d0 ) │ │ + b.n c513c │ │ strh r0, [r1, #2] │ │ - b.n c5130 │ │ + b.n c5140 │ │ str r4, [r2, #4] │ │ - b.n c5134 │ │ + b.n c5144 │ │ movs r0, #188 @ 0xbc │ │ - b.n c5992 │ │ + b.n c59a2 │ │ asrs r6, r7, #2 │ │ - b.n c59ae │ │ + b.n c59be │ │ movs r0, #60 @ 0x3c │ │ - b.n c5140 │ │ + b.n c5150 │ │ asrs r6, r7, #2 │ │ - b.n c599e │ │ + b.n c59ae │ │ asrs r1, r0, #32 │ │ - b.n c5dce │ │ + b.n c5dde │ │ lsls r0, r0, #2 │ │ - b.n c5714 │ │ + b.n c5724 │ │ adds r0, #190 @ 0xbe │ │ - b.n c59c2 │ │ + b.n c59d2 │ │ asrs r0, r0, #32 │ │ - b.n c572e │ │ + b.n c573e │ │ movs r0, r0 │ │ - b.n c5722 │ │ + b.n c5732 │ │ strb r0, [r1, #0] │ │ - b.n c514c │ │ + b.n c515c │ │ movs r0, #176 @ 0xb0 │ │ - b.n c59c6 │ │ + b.n c59d6 │ │ asrs r4, r6, #6 │ │ - b.n c59cc │ │ + b.n c59dc │ │ lsls r0, r0, #1 │ │ - b.n c5168 │ │ + b.n c5178 │ │ movs r1, r0 │ │ - b.n c5732 │ │ + b.n c5742 │ │ asrs r2, r0, #32 │ │ - b.n c5742 │ │ + b.n c5752 │ │ movs r0, #3 │ │ - b.n c56c8 │ │ + b.n c56d8 │ │ asrs r4, r2, #32 │ │ - b.n c5b40 │ │ + b.n c5b50 │ │ movs r0, #20 │ │ - b.n c5ac6 │ │ - subs r7, #95 @ 0x5f │ │ + b.n c5ad6 │ │ + subs r7, #36 @ 0x24 │ │ @ instruction: 0xfb0000d5 │ │ - b.n c59f2 │ │ + b.n c5a02 │ │ asrs r4, r5, #1 │ │ - b.n c5188 │ │ + b.n c5198 │ │ movs r0, #100 @ 0x64 │ │ - b.n c518c │ │ + b.n c519c │ │ movs r1, r0 │ │ - b.n c58fa │ │ + b.n c590a │ │ movs r2, r0 │ │ ldr r2, [sp, #0] │ │ asrs r0, r3, #1 │ │ - b.n c5198 │ │ - add r1, pc, #0 @ (adr r1, c5660 ) │ │ - b.n c5564 │ │ + b.n c51a8 │ │ + add r1, pc, #0 @ (adr r1, c5670 ) │ │ + b.n c5574 │ │ movs r5, r7 │ │ and.w r0, r0, r0, asr #4 │ │ - b.n c51a4 │ │ + b.n c51b4 │ │ str r0, [r4, #4] │ │ - b.n c51a8 │ │ + b.n c51b8 │ │ movs r1, #8 │ │ - b.n c5594 │ │ + b.n c55a4 │ │ asrs r0, r2, #1 │ │ - b.n c51b0 │ │ + b.n c51c0 │ │ adds r0, #136 @ 0x88 │ │ - b.n c577c │ │ + b.n c578c │ │ asrs r0, r3, #1 │ │ - b.n c51b8 │ │ + b.n c51c8 │ │ strb r0, [r6, #2] │ │ - b.n c5a28 │ │ + b.n c5a38 │ │ str r0, [r0, #16] │ │ - b.n c5588 │ │ + b.n c5598 │ │ movs r1, r0 │ │ - b.n c5b98 │ │ + b.n c5ba8 │ │ asrs r0, r1, #4 │ │ - b.n c55b0 │ │ + b.n c55c0 │ │ lsls r0, r6, #2 │ │ - b.n c5a18 │ │ + b.n c5a28 │ │ movs r1, r0 │ │ - b.n c593a │ │ + b.n c594a │ │ movs r0, r6 │ │ lsrs r0, r0, #8 │ │ asrs r4, r7, #2 │ │ - b.n c5a40 │ │ + b.n c5a50 │ │ lsls r0, r6, #1 │ │ - b.n c54a0 │ │ + b.n c54b0 │ │ adds r0, #48 @ 0x30 │ │ - b.n c51e0 │ │ + b.n c51f0 │ │ lsls r1, r4, #2 │ │ - b.n c594a │ │ + b.n c595a │ │ movs r4, r5 │ │ subs r2, #0 │ │ movs r0, r0 │ │ - b.n c5d62 │ │ + b.n c5d72 │ │ movs r2, r5 │ │ - ldr r2, [pc, #0] @ (c56b4 ) │ │ + ldr r2, [pc, #0] @ (c56c4 ) │ │ str r4, [r3, #4] │ │ - b.n c51f4 │ │ + b.n c5204 │ │ movs r0, r0 │ │ - b.n c5dfe │ │ + b.n c5e0e │ │ movs r3, r0 │ │ - b.n c5d72 │ │ + b.n c5d82 │ │ stmia r0!, {} │ │ - b.n c5e06 │ │ + b.n c5e16 │ │ movs r2, r2 │ │ subs r2, #0 │ │ movs r0, #1 │ │ - b.n c5bde │ │ + b.n c5bee │ │ adds r0, #28 │ │ - b.n c5e12 │ │ + b.n c5e22 │ │ stmia r1!, {r1, r2, r3} │ │ - b.n c5e5a │ │ + b.n c5e6a │ │ strb r4, [r7, #1] │ │ - b.n c5e1a │ │ + b.n c5e2a │ │ asrs r4, r1, #32 │ │ - b.n c5a1e │ │ + b.n c5a2e │ │ str r3, [r0, r0] │ │ - b.n c57ee │ │ + b.n c57fe │ │ asrs r4, r0, #32 │ │ - b.n c5b88 │ │ + b.n c5b98 │ │ lsrs r7, r1, #10 │ │ orn r0, r5, #8640 @ 0x21c0 │ │ - b.n c57fa │ │ + b.n c580a │ │ movs r7, #79 @ 0x4f │ │ orn r0, r5, #8384 @ 0x20c0 │ │ - b.n c57fe │ │ + b.n c580e │ │ adds r0, #16 │ │ - b.n c5c00 │ │ + b.n c5c10 │ │ lsrs r7, r1, #10 │ │ orr.w r0, r5, #8640 @ 0x21c0 │ │ - b.n c580a │ │ + b.n c581a │ │ strb r0, [r1, #0] │ │ - b.n c5c14 │ │ + b.n c5c24 │ │ movs r7, #79 @ 0x4f │ │ - bl ffd0b6f0 │ │ + bl ffd0b700 │ │ subs r7, r7, r3 │ │ movs r4, r1 │ │ - b.n c59b6 │ │ + b.n c59c6 │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ asrs r7, r0, #32 │ │ - b.n c5c32 │ │ + b.n c5c42 │ │ strb r6, [r7, #0] │ │ - b.n c5c36 │ │ + b.n c5c46 │ │ movs r1, #1 │ │ - b.n c582e │ │ + b.n c583e │ │ adds r0, #135 @ 0x87 │ │ - b.n c5832 │ │ + b.n c5842 │ │ asrs r1, r0, #4 │ │ - b.n c5832 │ │ + b.n c5842 │ │ strb r7, [r0, #2] │ │ - b.n c5836 │ │ + b.n c5846 │ │ str r1, [r0, #0] │ │ - b.n c5bca │ │ + b.n c5bda │ │ str r0, [r0, r2] │ │ - b.n c565a │ │ + b.n c566a │ │ ands r0, r0 │ │ - b.n c5840 │ │ + b.n c5850 │ │ str r1, [r0, #0] │ │ - b.n c5c4a │ │ + b.n c5c5a │ │ str r0, [r0, r2] │ │ - b.n c5644 │ │ + b.n c5654 │ │ str r0, [r0, r0] │ │ - b.n c5854 │ │ + b.n c5864 │ │ movs r2, r0 │ │ - b.n c5c4a │ │ + b.n c5c5a │ │ lsls r0, r6 │ │ - b.n c5af6 │ │ + b.n c5b06 │ │ movs r6, r0 │ │ - b.n c5a02 │ │ + b.n c5a12 │ │ lsls r0, r6 │ │ - b.n c5ae0 │ │ + b.n c5af0 │ │ @ instruction: 0xfff51aff │ │ eors r0, r6 │ │ - b.n c5298 │ │ + b.n c52a8 │ │ adds r0, #48 @ 0x30 │ │ - b.n c529c │ │ + b.n c52ac │ │ lsls r0, r3, #3 │ │ - b.n c5aee │ │ + b.n c5afe │ │ movs r0, #76 @ 0x4c │ │ - b.n c528c │ │ + b.n c529c │ │ asrs r4, r2, #1 │ │ - b.n c5290 │ │ + b.n c52a0 │ │ movs r2, r0 │ │ - b.n c57f2 │ │ + b.n c5802 │ │ lsls r0, r0, #4 │ │ - b.n c5698 │ │ + b.n c56a8 │ │ movs r0, r0 │ │ - b.n c5e1a │ │ + b.n c5e2a │ │ lsls r0, r1, #3 │ │ lsrs r0, r0, #8 │ │ asrs r4, r7, #2 │ │ - b.n c5b36 │ │ + b.n c5b46 │ │ stmia r0!, {r2} │ │ - b.n c5ec6 │ │ + b.n c5ed6 │ │ movs r0, #8 │ │ - b.n c52c0 │ │ - b.n c579e │ │ - b.n c5f4e │ │ + b.n c52d0 │ │ + b.n c57ae │ │ + b.n c5f5e │ │ strh r0, [r1, #2] │ │ - b.n c52ac │ │ + b.n c52bc │ │ strb r1, [r4, #2] │ │ - b.n c5ad6 │ │ + b.n c5ae6 │ │ asrs r6, r6, #1 │ │ - b.n c5eda │ │ + b.n c5eea │ │ asrs r3, r0, #2 │ │ - b.n c58a0 │ │ + b.n c58b0 │ │ asrs r0, r0, #1 │ │ - b.n c52bc │ │ + b.n c52cc │ │ asrs r0, r2, #32 │ │ - b.n c5ee6 │ │ + b.n c5ef6 │ │ strb r4, [r1, #1] │ │ - b.n c52c4 │ │ + b.n c52d4 │ │ asrs r3, r0, #4 │ │ - b.n c58b0 │ │ + b.n c58c0 │ │ asrs r4, r7, #32 │ │ - b.n c52cc │ │ + b.n c52dc │ │ asrs r0, r2, #1 │ │ - b.n c52f0 │ │ + b.n c5300 │ │ asrs r0, r1, #2 │ │ - b.n c58bc │ │ + b.n c58cc │ │ asrs r0, r3, #32 │ │ - b.n c52d8 │ │ + b.n c52e8 │ │ asrs r1, r0, #32 │ │ - b.n c5f02 │ │ + b.n c5f12 │ │ strh r3, [r2, #0] │ │ - b.n c5f86 │ │ + b.n c5f96 │ │ adds r2, r4, r4 │ │ - b.n c5b4c │ │ + b.n c5b5c │ │ asrs r4, r2, #32 │ │ - b.n c52e8 │ │ + b.n c52f8 │ │ asrs r4, r3, #32 │ │ - b.n c530c │ │ + b.n c531c │ │ asrs r7, r0, #32 │ │ - b.n c58d8 │ │ + b.n c58e8 │ │ asrs r0, r5, #1 │ │ - b.n c52f4 │ │ + b.n c5304 │ │ asrs r1, r0, #32 │ │ - b.n c5ce4 │ │ + b.n c5cf4 │ │ asrs r0, r7, #32 │ │ - b.n c52fc │ │ + b.n c530c │ │ asrs r3, r0, #32 │ │ - b.n c5f68 │ │ + b.n c5f78 │ │ asrs r4, r4, #1 │ │ - b.n c5304 │ │ + b.n c5314 │ │ asrs r1, r0, #32 │ │ - b.n c5874 │ │ + b.n c5884 │ │ asrs r0, r4, #32 │ │ - b.n c530c │ │ + b.n c531c │ │ movs r2, r0 │ │ and.w r0, r0, ip, asr #2 │ │ - b.n c531a │ │ + b.n c532a │ │ movs r0, r0 │ │ - b.n c5e9e │ │ + b.n c5eae │ │ lsls r7, r4, #2 │ │ lsrs r0, r0, #8 │ │ movs r0, #4 │ │ - b.n c53ae │ │ + b.n c53be │ │ str r0, [r0, r0] │ │ - b.n c5b4a │ │ + b.n c5b5a │ │ movs r1, r0 │ │ - b.n c5e32 │ │ + b.n c5e42 │ │ str r0, [r3, r0] │ │ asrs r0, r2, #22 │ │ movs r4, r0 │ │ - b.n c5ac0 │ │ + b.n c5ad0 │ │ @ instruction: 0xfff60aff │ │ str r5, [r2, #12] │ │ - b.n c5bc8 │ │ + b.n c5bd8 │ │ movs r0, r0 │ │ - b.n c5ece │ │ + b.n c5ede │ │ @ instruction: 0xfff34aff │ │ movs r0, r0 │ │ - b.n c5ed0 │ │ + b.n c5ee0 │ │ movs r0, r6 │ │ lsrs r0, r0, #8 │ │ movs r0, #28 │ │ - b.n c535c │ │ + b.n c536c │ │ movs r2, r1 │ │ - b.n c5ada │ │ + b.n c5aea │ │ @ instruction: 0xffee1aff │ │ movs r3, r0 │ │ - b.n c5ee4 │ │ + b.n c5ef4 │ │ movs r0, #3 │ │ - b.n c5b82 │ │ + b.n c5b92 │ │ movs r0, r2 │ │ subs r2, #0 │ │ asrs r0, r0, #1 │ │ - b.n c5384 │ │ + b.n c5394 │ │ movs r0, #100 @ 0x64 │ │ - b.n c5388 │ │ + b.n c5398 │ │ strb r1, [r0, #0] │ │ - b.n c595c │ │ + b.n c596c │ │ asrs r4, r7, #32 │ │ - b.n c5390 │ │ + b.n c53a0 │ │ str r1, [r0, #0] │ │ - b.n c5964 │ │ + b.n c5974 │ │ asrs r2, r0, #32 │ │ - b.n c5f9e │ │ + b.n c5fae │ │ lsls r1, r0, #29 │ │ orn r0, r7, #540672 @ 0x84000 │ │ - b.n c5d0a │ │ + b.n c5d1a │ │ cmp r2, #140 @ 0x8c │ │ orn r7, r6, #13500416 @ 0xce0000 │ │ orr.w sl, r7, #278528 @ 0x44000 │ │ - bl ffd0c864 │ │ + bl ffd0c874 │ │ subs r7, r7, r3 │ │ asrs r0, r7, #32 │ │ - b.n c53b4 │ │ + b.n c53c4 │ │ movs r0, #100 @ 0x64 │ │ - b.n c53b8 │ │ + b.n c53c8 │ │ movs r2, r0 │ │ - b.n c5b24 │ │ + b.n c5b34 │ │ movs r0, #32 │ │ - b.n c53c0 │ │ + b.n c53d0 │ │ movs r3, r1 │ │ lsrs r0, r0, #8 │ │ strb r1, [r0, #0] │ │ - b.n c5d92 │ │ + b.n c5da2 │ │ str r2, [r0, #8] │ │ - b.n c5bd2 │ │ + b.n c5be2 │ │ movs r0, #6 │ │ - b.n c59a0 │ │ + b.n c59b0 │ │ asrs r6, r0, #2 │ │ - b.n c59a4 │ │ + b.n c59b4 │ │ strb r1, [r0, #0] │ │ - b.n c5d2c │ │ + b.n c5d3c │ │ str r2, [r0, #0] │ │ - b.n c5d2e │ │ + b.n c5d3e │ │ movs r0, r0 │ │ - b.n c5f54 │ │ + b.n c5f64 │ │ blxns r7 │ │ - b.n c5c4e │ │ + b.n c5c5e │ │ adds r0, #28 │ │ - b.n c53d0 │ │ + b.n c53e0 │ │ @ instruction: 0x47be │ │ - b.n c5c36 │ │ + b.n c5c46 │ │ adds r0, #32 │ │ - b.n c53b8 │ │ + b.n c53c8 │ │ @ instruction: 0xfff5caff │ │ asrs r0, r3, #1 │ │ - b.n c53f8 │ │ + b.n c5408 │ │ ands r5, r0 │ │ - b.n c546c │ │ + b.n c547c │ │ movs r7, #188 @ 0xbc │ │ - b.n c5c70 │ │ + b.n c5c80 │ │ str r0, [r0, #0] │ │ - b.n c53ec │ │ + b.n c53fc │ │ asrs r0, r5, #1 │ │ - b.n c5408 │ │ + b.n c5418 │ │ str r4, [r3, #0] │ │ - b.n c53dc │ │ + b.n c53ec │ │ str r1, [r0, #0] │ │ - b.n c5dde │ │ + b.n c5dee │ │ eors r0, r6 │ │ - b.n c5414 │ │ + b.n c5424 │ │ movs r2, r0 │ │ - b.n c5b80 │ │ + b.n c5b90 │ │ adds r0, #48 @ 0x30 │ │ - b.n c541c │ │ + b.n c542c │ │ movs r0, #0 │ │ - b.n c6026 │ │ + b.n c6036 │ │ movs r0, #1 │ │ str r3, [sp, #0] │ │ str r5, [r0, #0] │ │ - b.n c5478 │ │ + b.n c5488 │ │ movs r7, #188 @ 0xbc │ │ - b.n c5c7c │ │ + b.n c5c8c │ │ str r0, [sp, #852] @ 0x354 │ │ - b.n c5c9e │ │ + b.n c5cae │ │ str r6, [r6, #4] │ │ - b.n c5658 │ │ + b.n c5668 │ │ movs r1, r1 │ │ - b.n c5baa │ │ + b.n c5bba │ │ movs r6, r2 │ │ add r2, sp, #0 │ │ asrs r4, r5, #32 │ │ - b.n c5440 │ │ + b.n c5450 │ │ movs r0, #40 @ 0x28 │ │ - b.n c5444 │ │ + b.n c5454 │ │ movs r2, r0 │ │ - b.n c5bb0 │ │ + b.n c5bc0 │ │ lsls r7, r0, #1 │ │ subs r2, #0 │ │ asrs r0, r1, #1 │ │ - b.n c5450 │ │ + b.n c5460 │ │ movs r6, r0 │ │ - b.n c5bbc │ │ + b.n c5bcc │ │ lsls r4, r0, #1 │ │ ldmia r2!, {} │ │ asrs r0, r3, #1 │ │ - b.n c545c │ │ + b.n c546c │ │ movs r0, #72 @ 0x48 │ │ - b.n c5460 │ │ + b.n c5470 │ │ asrs r2, r0, #4 │ │ - b.n c584c │ │ + b.n c585c │ │ movs r1, #2 │ │ - b.n c5a38 │ │ + b.n c5a48 │ │ movs r0, #28 │ │ - b.n c5456 │ │ + b.n c5466 │ │ movs r1, r0 │ │ - b.n c5bda │ │ + b.n c5bea │ │ movs r5, r7 │ │ subs r0, r0, r0 │ │ movs r0, #72 @ 0x48 │ │ - b.n c5478 │ │ + b.n c5488 │ │ asrs r0, r3, #32 │ │ - b.n c547c │ │ + b.n c548c │ │ movs r0, #130 @ 0x82 │ │ - b.n c5a50 │ │ + b.n c5a60 │ │ asrs r0, r6, #2 │ │ - b.n c5cec │ │ + b.n c5cfc │ │ blxns r7 │ │ - b.n c5d32 │ │ + b.n c5d42 │ │ movs r1, r0 │ │ - b.n c5bfa │ │ + b.n c5c0a │ │ asrs r1, r0, #32 │ │ movs r2, #132 @ 0x84 │ │ asrs r0, r6, #2 │ │ movs r1, #194 @ 0xc2 │ │ movs r4, r6 │ │ and.w r0, r0, r4, ror #4 │ │ - b.n c549c │ │ + b.n c54ac │ │ movs r0, r0 │ │ - b.n c6008 │ │ + b.n c6018 │ │ @ instruction: 0xffe50aff │ │ strb r4, [r3, #0] │ │ - b.n c5e78 │ │ + b.n c5e88 │ │ asrs r1, r1, #4 │ │ - b.n c58a0 │ │ + b.n c58b0 │ │ movs r2, r1 │ │ - b.n c5c18 │ │ + b.n c5c28 │ │ @ instruction: 0xffe11aff │ │ - add r0, pc, #496 @ (adr r0, c5b6c ) │ │ - b.n c5e88 │ │ + add r0, pc, #496 @ (adr r0, c5b7c ) │ │ + b.n c5e98 │ │ asrs r1, r1, #2 │ │ - b.n c5cc2 │ │ + b.n c5cd2 │ │ ands r2, r1 │ │ - b.n c5cc6 │ │ + b.n c5cd6 │ │ movs r0, #177 @ 0xb1 │ │ - b.n c5cf2 │ │ + b.n c5d02 │ │ asrs r4, r5, #1 │ │ - b.n c54c8 │ │ + b.n c54d8 │ │ movs r1, r0 │ │ - b.n c5c36 │ │ + b.n c5c46 │ │ movs r6, r0 │ │ subs r2, #0 │ │ asrs r4, r2, #32 │ │ - b.n c54d4 │ │ + b.n c54e4 │ │ asrs r1, r0, #32 │ │ - b.n c5aa2 │ │ + b.n c5ab2 │ │ asrs r0, r6, #2 │ │ - b.n c5d2a │ │ + b.n c5d3a │ │ asrs r0, r6, #1 │ │ - b.n c54e0 │ │ + b.n c54f0 │ │ str r0, [sp, #852] @ 0x354 │ │ - b.n c5d4c │ │ + b.n c5d5c │ │ asrs r1, r1, #2 │ │ - b.n c5ac2 │ │ + b.n c5ad2 │ │ movs r0, #176 @ 0xb0 │ │ - b.n c5d54 │ │ + b.n c5d64 │ │ asrs r4, r1, #1 │ │ - b.n c54f0 │ │ + b.n c5500 │ │ movs r2, r0 │ │ - b.n c5c5c │ │ + b.n c5c6c │ │ movs r4, r3 │ │ ldrh r0, [r0, #16] │ │ adds r0, #112 @ 0x70 │ │ - b.n c54fc │ │ + b.n c550c │ │ asrs r0, r4, #1 │ │ - b.n c5500 │ │ + b.n c5510 │ │ asrs r1, r1, #4 │ │ - b.n c58d8 │ │ + b.n c58e8 │ │ asrs r5, r2, #3 │ │ - b.n c5d74 │ │ + b.n c5d84 │ │ eors r4, r1 │ │ - b.n c550c │ │ + b.n c551c │ │ asrs r1, r0, #2 │ │ - b.n c5aea │ │ + b.n c5afa │ │ movs r0, #176 @ 0xb0 │ │ - b.n c5d7c │ │ + b.n c5d8c │ │ movs r0, #4 │ │ - b.n c5a62 │ │ + b.n c5a72 │ │ movs r0, #176 @ 0xb0 │ │ - b.n c5d64 │ │ + b.n c5d74 │ │ asrs r5, r2, #3 │ │ - b.n c5d8c │ │ + b.n c5d9c │ │ adds r0, #48 @ 0x30 │ │ - b.n c5524 │ │ + b.n c5534 │ │ movs r1, r0 │ │ - b.n c6090 │ │ + b.n c60a0 │ │ movs r7, r1 │ │ rev r0, r0 │ │ str r7, [r0, #0] │ │ - b.n c6136 │ │ + b.n c6146 │ │ strb r4, [r7, #1] │ │ - b.n c613a │ │ + b.n c614a │ │ movs r0, #92 @ 0x5c │ │ - b.n c5538 │ │ + b.n c5548 │ │ asrs r6, r0, #4 │ │ - b.n c5926 │ │ + b.n c5936 │ │ asrs r6, r0, #4 │ │ - b.n c5910 │ │ + b.n c5920 │ │ asrs r7, r0, #32 │ │ - b.n c5b0e │ │ + b.n c5b1e │ │ movs r0, #7 │ │ - b.n c5b18 │ │ + b.n c5b28 │ │ asrs r0, r6, #2 │ │ - b.n c5db4 │ │ + b.n c5dc4 │ │ strb r2, [r0, #0] │ │ - b.n c5f24 │ │ + b.n c5f34 │ │ asrs r0, r6, #2 │ │ - b.n c5d9e │ │ + b.n c5dae │ │ asrs r6, r0, #32 │ │ - b.n c5eaa │ │ + b.n c5eba │ │ movs r0, #112 @ 0x70 │ │ - b.n c555c │ │ + b.n c556c │ │ str r1, [r0, #0] │ │ - b.n c5f32 │ │ + b.n c5f42 │ │ movs r0, #213 @ 0xd5 │ │ - b.n c5dce │ │ + b.n c5dde │ │ movs r2, r0 │ │ - b.n c5cd0 │ │ + b.n c5ce0 │ │ @ instruction: 0xfff1baff │ │ strb r0, [r3, #0] │ │ - b.n c5560 │ │ + b.n c5570 │ │ eors r0, r6 │ │ - b.n c5574 │ │ - add r0, pc, #464 @ (adr r0, c5c0c ) │ │ - b.n c5578 │ │ + b.n c5584 │ │ + add r0, pc, #464 @ (adr r0, c5c1c ) │ │ + b.n c5588 │ │ movs r0, r0 │ │ - b.n c60f0 │ │ + b.n c6100 │ │ vpmin.u32 q8, , │ │ asrs r5, r2, #3 │ │ - b.n c5df8 │ │ + b.n c5e08 │ │ movs r0, r0 │ │ - b.n c60f0 │ │ + b.n c6100 │ │ vpmin.u32 q10, q12, │ │ asrs r2, r7, #2 │ │ - b.n c5e0a │ │ + b.n c5e1a │ │ movs r2, r0 │ │ - b.n c607c │ │ + b.n c608c │ │ vpmin.u32 q8, , │ │ asrs r5, r2, #3 │ │ - b.n c5e0a │ │ + b.n c5e1a │ │ movs r0, #129 @ 0x81 │ │ - b.n c5b70 │ │ + b.n c5b80 │ │ asrs r1, r0, #4 │ │ - b.n c5b74 │ │ + b.n c5b84 │ │ asrs r4, r3, #32 │ │ - b.n c5590 │ │ + b.n c55a0 │ │ movs r7, #188 @ 0xbc │ │ - b.n c5e16 │ │ + b.n c5e26 │ │ asrs r4, r2, #32 │ │ - b.n c5f78 │ │ + b.n c5f88 │ │ movs r0, #130 @ 0x82 │ │ - b.n c5b7c │ │ + b.n c5b8c │ │ movs r0, #176 @ 0xb0 │ │ - b.n c5e22 │ │ + b.n c5e32 │ │ movs r0, #2 │ │ - b.n c5b84 │ │ + b.n c5b94 │ │ asrs r4, r0, #32 │ │ - b.n c562a │ │ + b.n c563a │ │ asrs r6, r0, #32 │ │ - b.n c5e8c │ │ + b.n c5e9c │ │ movs r4, r0 │ │ - b.n c6130 │ │ + b.n c6140 │ │ asrs r6, r6, #2 │ │ lsls r2, r2, #7 │ │ asrs r1, r0, #32 │ │ lsls r2, r0, #2 │ │ asrs r0, r1, #32 │ │ lsls r1, r0, #10 │ │ asrs r4, r3, #32 │ │ lsls r7, r0, #22 │ │ vpmin.u16 q15, q10, │ │ str r0, [sp, #0] │ │ - b.n c61e6 │ │ + b.n c61f6 │ │ str r4, [r2, #4] │ │ - b.n c55e4 │ │ + b.n c55f4 │ │ str r4, [r4, r0] │ │ - b.n c55e8 │ │ + b.n c55f8 │ │ movs r0, r0 │ │ - b.n c615e │ │ + b.n c616e │ │ movs r3, r1 │ │ lsrs r0, r0, #8 │ │ movs r7, r0 │ │ - b.n c5664 │ │ + b.n c5674 │ │ movs r0, r1 │ │ - b.n c60de │ │ + b.n c60ee │ │ lsls r3, r3, #2 │ │ subs r0, r0, r0 │ │ asrs r0, r6, #2 │ │ - b.n c55f0 │ │ + b.n c5600 │ │ lsls r0, r3, #4 │ │ - b.n c55f4 │ │ + b.n c5604 │ │ movs r1, r0 │ │ - b.n c5d6e │ │ + b.n c5d7e │ │ lsls r1, r4, #2 │ │ cmp r2, #0 │ │ asrs r4, r3, #4 │ │ - b.n c5600 │ │ + b.n c5610 │ │ movs r1, r0 │ │ - b.n c5fda │ │ + b.n c5fea │ │ asrs r4, r2, #32 │ │ - b.n c55ea │ │ + b.n c55fa │ │ lsls r0, r3, #4 │ │ - b.n c55ec │ │ + b.n c55fc │ │ str r4, [r3, #16] │ │ - b.n c55f0 │ │ + b.n c5600 │ │ movs r0, r0 │ │ - b.n c619c │ │ + b.n c61ac │ │ lsls r5, r0, #5 │ │ subs r0, r0, r0 │ │ movs r0, r1 │ │ - b.n c5628 │ │ + b.n c5638 │ │ lsrs r1, r0, #32 │ │ - b.n c6116 │ │ + b.n c6126 │ │ lsls r2, r7, #1 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #1 │ │ - b.n c5628 │ │ + b.n c5638 │ │ str r0, [sp, #0] │ │ - b.n c6242 │ │ + b.n c6252 │ │ movs r5, #216 @ 0xd8 │ │ - b.n c5e86 │ │ + b.n c5e96 │ │ ands r1, r0 │ │ - b.n c602e │ │ + b.n c603e │ │ str r0, [r0, r0] │ │ - b.n c6054 │ │ + b.n c6064 │ │ cmp r8, pc │ │ - b.n c5e92 │ │ + b.n c5ea2 │ │ movs r1, r1 │ │ - b.n c5e56 │ │ - beq.n c5b50 │ │ - b.n c5fb0 │ │ + b.n c5e66 │ │ + beq.n c5b60 │ │ + b.n c5fc0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r1, r2, ip} │ │ - b.n c62a2 │ │ + b.n c62b2 │ │ adds r0, #64 @ 0x40 │ │ - b.n c5660 │ │ + b.n c5670 │ │ str r4, [r7, #0] │ │ - b.n c5664 │ │ + b.n c5674 │ │ movs r0, #1 │ │ - b.n c5e6e │ │ + b.n c5e7e │ │ lsrs r5, r1, #8 │ │ orn r0, r6, #557056 @ 0x88000 │ │ - b.n c5fda │ │ + b.n c5fea │ │ lsrs r5, r1, #8 │ │ - bl ffd09b30 │ │ + bl ffd09b40 │ │ subs r7, r7, r3 │ │ movs r0, r0 │ │ - b.n c5de4 │ │ + b.n c5df4 │ │ mrc2 10, 2, r1, cr12, cr15, {7} @ │ │ mcr2 10, 3, lr, cr4, cr15, {7} @ │ │ movs r0, #116 @ 0x74 │ │ - b.n c5688 │ │ + b.n c5698 │ │ adds r0, #20 │ │ - b.n c6062 │ │ + b.n c6072 │ │ strb r4, [r2, #0] │ │ - b.n c605a │ │ + b.n c606a │ │ movs r0, #108 @ 0x6c │ │ - b.n c5694 │ │ + b.n c56a4 │ │ str r7, [r0, #0] │ │ - b.n c62e2 │ │ + b.n c62f2 │ │ movs r0, #6 │ │ - b.n c5ea2 │ │ + b.n c5eb2 │ │ lsrs r5, r1, #8 │ │ orn r0, r7, #557056 @ 0x88000 │ │ - b.n c600e │ │ + b.n c601e │ │ lsrs r5, r1, #8 │ │ - bl ffd09b64 │ │ + bl ffd09b74 │ │ subs r7, r7, r3 │ │ movs r0, #108 @ 0x6c │ │ - b.n c56b0 │ │ + b.n c56c0 │ │ movs r2, r0 │ │ - b.n c5e26 │ │ + b.n c5e36 │ │ ldc2 10, cr1, [sp], #-1020 @ 0xfffffc04 @ │ │ mcrr2 10, 15, lr, r6, cr15 │ │ eors r0, r6 │ │ - b.n c56c0 │ │ + b.n c56d0 │ │ movs r0, r0 │ │ - b.n c62ca │ │ + b.n c62da │ │ lsls r0, r6, #2 │ │ - b.n c5f2a │ │ + b.n c5f3a │ │ movs r4, r0 │ │ - b.n c5ed2 │ │ + b.n c5ee2 │ │ vstr d14, [r6, #1020] @ 0x3fc │ │ strh r2, [r1, #0] │ │ - b.n c5eda │ │ - add r0, pc, #464 @ (adr r0, c5d6c ) │ │ - b.n c56d8 │ │ + b.n c5eea │ │ + add r0, pc, #464 @ (adr r0, c5d7c ) │ │ + b.n c56e8 │ │ strb r4, [r5, #1] │ │ - b.n c56dc │ │ + b.n c56ec │ │ movs r0, r0 │ │ - b.n c6246 │ │ + b.n c6256 │ │ str r4, [r6, r0] │ │ - b.n c56e4 │ │ + b.n c56f4 │ │ adds r0, #100 @ 0x64 │ │ - b.n c56e8 │ │ + b.n c56f8 │ │ stc2l 10, cr0, [r4, #1020] @ 0x3fc @ │ │ str r0, [sp, #0] │ │ - b.n c5ef6 │ │ + b.n c5f06 │ │ lsls r2, r6, #30 │ │ - b.n c61ca │ │ + b.n c61da │ │ lsrs r7, r7, #31 │ │ - b.n c625c │ │ + b.n c626c │ │ movs r0, r0 │ │ - b.n c5e74 │ │ + b.n c5e84 │ │ @ instruction: 0xffb71aff │ │ asrs r0, r7, #26 │ │ - b.n c5708 │ │ + b.n c5718 │ │ lsls r4, r6, #30 │ │ - b.n c61de │ │ + b.n c61ee │ │ lsrs r7, r7, #31 │ │ - b.n c6270 │ │ + b.n c6280 │ │ str r0, [sp, #68] @ 0x44 │ │ - b.n c60d6 │ │ + b.n c60e6 │ │ asrs r1, r0, #32 │ │ - b.n c5cf8 │ │ + b.n c5d08 │ │ asrs r2, r3, #1 │ │ - b.n c5780 │ │ + b.n c5790 │ │ movs r0, r0 │ │ - b.n c6284 │ │ + b.n c6294 │ │ lsls r6, r0, #6 │ │ subs r0, r0, r0 │ │ eors r0, r6 │ │ - b.n c5724 │ │ + b.n c5734 │ │ @ instruction: 0xffadeaff │ │ asrs r0, r4, #26 │ │ - b.n c5730 │ │ + b.n c5740 │ │ movs r6, r0 │ │ - b.n c5f36 │ │ + b.n c5f46 │ │ asrs r1, r0, #32 │ │ - b.n c5d18 │ │ + b.n c5d28 │ │ stmia r1!, {r0, r2, r5, r6, r7} │ │ @ instruction: 0xebff97b4 │ │ - b.n c6212 │ │ + b.n c6222 │ │ ldr r7, [sp, #1020] @ 0x3fc │ │ - b.n c62a4 │ │ + b.n c62b4 │ │ @ instruction: 0xffa6eaff │ │ movs r5, r0 │ │ - b.n c5f4e │ │ - bne.n c5b42 │ │ + b.n c5f5e │ │ + bne.n c5b52 │ │ @ instruction: 0xebff0248 │ │ - b.n c5740 │ │ + b.n c5750 │ │ movs r0, r0 │ │ - b.n c62ba │ │ + b.n c62ca │ │ @ instruction: 0xfa271aff │ │ lsls r0, r4, #2 │ │ - b.n c574c │ │ + b.n c575c │ │ movs r0, #0 │ │ - b.n c5746 │ │ + b.n c5756 │ │ movs r0, r0 │ │ - b.n c62ce │ │ + b.n c62de │ │ lsls r7, r7, #5 │ │ lsrs r0, r0, #8 │ │ adds r1, #2 │ │ - b.n c5b52 │ │ + b.n c5b62 │ │ movs r0, #1 │ │ - b.n c60ba │ │ + b.n c60ca │ │ asrs r0, r0, #1 │ │ - b.n c5764 │ │ + b.n c5774 │ │ movs r0, #0 │ │ - b.n c573e │ │ + b.n c574e │ │ movs r1, r0 │ │ - b.n c6382 │ │ + b.n c6392 │ │ movs r0, r0 │ │ - b.n c5760 │ │ + b.n c5770 │ │ movs r0, r7 │ │ - b.n c60e0 │ │ + b.n c60f0 │ │ movs r0, #5 │ │ - b.n c5f8e │ │ - bcs.n c5c6e │ │ + b.n c5f9e │ │ + bcs.n c5c7e │ │ @ instruction: 0xebfffa26 │ │ @ instruction: 0xeaff015c │ │ - b.n c567a │ │ + b.n c568a │ │ movs r0, #220 @ 0xdc │ │ - b.n c5fde │ │ + b.n c5fee │ │ adds r0, #1 │ │ - b.n c5d68 │ │ + b.n c5d78 │ │ movs r0, #12 │ │ - b.n c5d6a │ │ + b.n c5d7a │ │ movs r0, #252 @ 0xfc │ │ - b.n c5fea │ │ + b.n c5ffa │ │ @ instruction: 0xfa40eaff │ │ asrs r0, r1, #32 │ │ - b.n c57a8 │ │ + b.n c57b8 │ │ str r4, [r5, r0] │ │ - b.n c57b0 │ │ + b.n c57c0 │ │ lsls r1, r0, #28 │ │ - b.n c629c │ │ + b.n c62ac │ │ @ instruction: 0xfb301aff │ │ str r4, [r5, r0] │ │ - b.n c57bc │ │ + b.n c57cc │ │ movs r0, r0 │ │ - b.n c6334 │ │ + b.n c6344 │ │ @ instruction: 0xfb2d1aff │ │ movs r1, r0 │ │ - b.n c632e │ │ + b.n c633e │ │ lsls r3, r1, #4 │ │ rev r0, r0 │ │ asrs r0, r0, #32 │ │ - b.n c63d6 │ │ + b.n c63e6 │ │ movs r0, #80 @ 0x50 │ │ - b.n c57d4 │ │ + b.n c57e4 │ │ movs r0, #177 @ 0xb1 │ │ - b.n c5ec2 │ │ + b.n c5ed2 │ │ movs r0, r0 │ │ - b.n c6346 │ │ + b.n c6356 │ │ lsls r2, r6, #3 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n c614a │ │ + b.n c615a │ │ asrs r2, r0, #32 │ │ - b.n c6130 │ │ + b.n c6140 │ │ @ instruction: 0xfff81aff │ │ lsls r2, r0, #4 │ │ and.w r0, r0, ip, lsl #1 │ │ - b.n c57f4 │ │ + b.n c5804 │ │ str r1, [r1, #0] │ │ - b.n c5ffe │ │ + b.n c600e │ │ eors r0, r6 │ │ - b.n c57fc │ │ + b.n c580c │ │ str r0, [sp, #368] @ 0x170 │ │ - b.n c5800 │ │ + b.n c5810 │ │ lsls r0, r2, #3 │ │ - b.n c604a │ │ + b.n c605a │ │ lsls r0, r7, #1 │ │ - b.n c57e8 │ │ + b.n c57f8 │ │ movs r0, r0 │ │ - b.n c6412 │ │ + b.n c6422 │ │ asrs r4, r7, #1 │ │ - b.n c57f0 │ │ + b.n c5800 │ │ lsls r4, r2, #1 │ │ - b.n c57f4 │ │ + b.n c5804 │ │ stc2 10, cr14, [lr], #1020 @ 0x3fc @ │ │ str r0, [r0, #0] │ │ - b.n c6422 │ │ + b.n c6432 │ │ stc2 10, cr14, [ip], #1020 @ 0x3fc @ │ │ lsls r5, r2, #3 │ │ - b.n c6092 │ │ + b.n c60a2 │ │ asrs r0, r3, #1 │ │ - b.n c5828 │ │ + b.n c5838 │ │ movs r0, #80 @ 0x50 │ │ - b.n c582c │ │ + b.n c583c │ │ asrs r0, r0, #4 │ │ - b.n c5c18 │ │ + b.n c5c28 │ │ lsls r0, r0, #2 │ │ - b.n c5dfe │ │ + b.n c5e0e │ │ lsls r0, r6, #2 │ │ - b.n c609e │ │ + b.n c60ae │ │ asrs r4, r2, #32 │ │ - b.n c6204 │ │ + b.n c6214 │ │ lsls r0, r0, #2 │ │ - b.n c5e08 │ │ + b.n c5e18 │ │ lsls r0, r6, #2 │ │ - b.n c60aa │ │ + b.n c60ba │ │ movs r0, r0 │ │ - b.n c5e10 │ │ + b.n c5e20 │ │ asrs r4, r0, #32 │ │ - b.n c58b2 │ │ + b.n c58c2 │ │ movs r1, r0 │ │ - b.n c6338 │ │ + b.n c6348 │ │ vpmin.u , , │ │ asrs r6, r6, #2 │ │ - b.n c60be │ │ + b.n c60ce │ │ movs r1, r0 │ │ - b.n c5e22 │ │ + b.n c5e32 │ │ asrs r4, r0, #1 │ │ - b.n c5860 │ │ + b.n c5870 │ │ movs r0, r1 │ │ - b.n c622a │ │ + b.n c623a │ │ movs r0, r0 │ │ - b.n c5830 │ │ + b.n c5840 │ │ vpmin.u q15, , │ │ lsls r4, r3, #1 │ │ - b.n c58e0 │ │ + b.n c58f0 │ │ asrs r1, r0, #32 │ │ - b.n c647a │ │ + b.n c648a │ │ movs r0, #255 @ 0xff │ │ - b.n c647e │ │ + b.n c648e │ │ asrs r1, r2, #32 │ │ - b.n c6082 │ │ + b.n c6092 │ │ movs r6, r0 │ │ - b.n c6086 │ │ - subs r4, #217 @ 0xd9 │ │ - @ instruction: 0xfb0010b0 │ │ - b.n c5878 │ │ + b.n c6096 │ │ + subs r5, #78 @ 0x4e │ │ + @ instruction: 0xfa0010b0 │ │ + b.n c5888 │ │ lsls r0, r3, #4 │ │ - b.n c587c │ │ + b.n c588c │ │ movs r1, r0 │ │ - b.n c5ff6 │ │ + b.n c6006 │ │ vpmin.u16 , , │ │ movs r4, r0 │ │ - b.n c61ea │ │ - ldr r2, [pc, #604] @ (c5fbc ) │ │ + b.n c61fa │ │ + ldr r2, [pc, #604] @ (c5fcc ) │ │ add.w r0, r0, r0 │ │ - b.n c6418 │ │ + b.n c6428 │ │ vpmin.u32 q8, q8, │ │ lsls r5, r4, #2 │ │ @ instruction: 0xea008048 │ │ - b.n c588c │ │ + b.n c589c │ │ movs r5, r0 │ │ - b.n c591e │ │ + b.n c592e │ │ movs r3, r2 │ │ and.w r0, r0, r8, lsl #20 │ │ - b.n c58b8 │ │ + b.n c58c8 │ │ strh r5, [r0, #0] │ │ - b.n c590a │ │ + b.n c591a │ │ lsls r4, r1, #1 │ │ - b.n c58c0 │ │ + b.n c58d0 │ │ asrs r0, r6, #2 │ │ - b.n c6134 │ │ + b.n c6144 │ │ adds r0, #16 │ │ - b.n c58ca │ │ + b.n c58da │ │ movs r0, r0 │ │ - b.n c6434 │ │ + b.n c6444 │ │ movs r0, #1 │ │ - b.n c60d6 │ │ + b.n c60e6 │ │ movs r0, #0 │ │ asrs r0, r4, #6 │ │ movs r4, r0 │ │ - b.n c60de │ │ + b.n c60ee │ │ lsrs r2, r5, #16 │ │ add.w r0, r0, r0 │ │ - b.n c6446 │ │ + b.n c6456 │ │ lsls r4, r5, #4 │ │ subs r0, r0, r0 │ │ lsls r0, r6, #2 │ │ - b.n c6158 │ │ + b.n c6168 │ │ movs r0, r0 │ │ - b.n c6452 │ │ + b.n c6462 │ │ lsls r5, r3, #2 │ │ lsrs r0, r0, #8 │ │ movs r5, r0 │ │ - b.n c5962 │ │ + b.n c5972 │ │ asrs r1, r0, #32 │ │ - b.n c64fe │ │ + b.n c650e │ │ asrs r4, r3, #32 │ │ - b.n c58dc │ │ + b.n c58ec │ │ movs r1, r0 │ │ - b.n c62c6 │ │ + b.n c62d6 │ │ movs r5, r0 │ │ - b.n c5952 │ │ + b.n c5962 │ │ movs r0, #96 @ 0x60 │ │ - b.n c5908 │ │ + b.n c5918 │ │ asrs r0, r3, #1 │ │ - b.n c590c │ │ + b.n c591c │ │ lsls r0, r6, #1 │ │ - b.n c5b34 │ │ + b.n c5b44 │ │ movs r1, #0 │ │ - b.n c5cdc │ │ + b.n c5cec │ │ lsls r5, r2, #3 │ │ - b.n c6186 │ │ + b.n c6196 │ │ asrs r0, r2, #1 │ │ - b.n c591c │ │ + b.n c592c │ │ lsls r0, r0, #2 │ │ - b.n c5ee8 │ │ + b.n c5ef8 │ │ asrs r0, r0, #32 │ │ - b.n c652a │ │ + b.n c653a │ │ asrs r0, r6, #2 │ │ - b.n c616e │ │ + b.n c617e │ │ movs r0, #10 │ │ - b.n c5996 │ │ + b.n c59a6 │ │ movs r2, r4 │ │ - b.n c649a │ │ + b.n c64aa │ │ movs r5, r4 │ │ lsrs r0, r0, #8 │ │ adds r0, #76 @ 0x4c │ │ - b.n c5938 │ │ + b.n c5948 │ │ movs r2, r0 │ │ - b.n c64a6 │ │ + b.n c64b6 │ │ lsls r2, r7, #3 │ │ subs r0, r0, r0 │ │ movs r0, #3 │ │ - b.n c614a │ │ + b.n c615a │ │ adds r0, #68 @ 0x44 │ │ - b.n c5948 │ │ + b.n c5958 │ │ movs r0, r1 │ │ - b.n c5948 │ │ + b.n c5958 │ │ movs r0, r0 │ │ - b.n c5930 │ │ + b.n c5940 │ │ movs r4, r0 │ │ - b.n c615a │ │ + b.n c616a │ │ lsls r2, r1, #5 │ │ add.w r0, r0, lr, lsr #32 │ │ and.w r0, r0, ip, lsr #29 │ │ - b.n c59d0 │ │ + b.n c59e0 │ │ strh r1, [r0, #0] │ │ - b.n c656a │ │ + b.n c657a │ │ movs r4, r0 │ │ - b.n c656e │ │ + b.n c657e │ │ lsls r0, r3, #28 │ │ - b.n c5f32 │ │ - ldr r2, [pc, #440] @ (c5fec ) │ │ + b.n c5f42 │ │ + ldr r2, [pc, #456] @ (c600c ) │ │ @ instruction: 0xeb009068 │ │ - b.n c5974 │ │ + b.n c5984 │ │ movs r0, r0 │ │ - b.n c64de │ │ + b.n c64ee │ │ lsls r3, r1, #4 │ │ lsrs r0, r0, #8 │ │ asrs r7, r0, #32 │ │ - b.n c59f0 │ │ + b.n c5a00 │ │ movs r4, r0 │ │ - b.n c634a │ │ + b.n c635a │ │ str r4, [r0, r1] │ │ - b.n c5988 │ │ + b.n c5998 │ │ movs r1, r0 │ │ - b.n c6474 │ │ + b.n c6484 │ │ lsls r2, r6, #1 │ │ subs r0, r0, r0 │ │ asrs r0, r3, #28 │ │ - b.n c619a │ │ + b.n c61aa │ │ strb r4, [r5, #1] │ │ - b.n c5998 │ │ + b.n c59a8 │ │ strh r0, [r0, #0] │ │ - b.n c61a2 │ │ + b.n c61b2 │ │ @ instruction: 0xfad3eaff │ │ movs r4, r0 │ │ - b.n c5998 │ │ + b.n c59a8 │ │ asrs r4, r3, #1 │ │ - b.n c59a8 │ │ + b.n c59b8 │ │ movs r2, r0 │ │ - b.n c6572 │ │ + b.n c6582 │ │ movs r4, r0 │ │ - b.n c5984 │ │ + b.n c5994 │ │ movs r5, r0 │ │ - b.n c5a1c │ │ + b.n c5a2c │ │ movs r1, r0 │ │ - b.n c637e │ │ + b.n c638e │ │ movs r5, r0 │ │ - b.n c5a04 │ │ + b.n c5a14 │ │ lsls r4, r6, #30 │ │ - b.n c6496 │ │ + b.n c64a6 │ │ lsrs r7, r7, #31 │ │ - b.n c6528 │ │ + b.n c6538 │ │ str r0, [sp, #40] @ 0x28 │ │ - b.n c658e │ │ + b.n c659e │ │ vpmin.u8 q7, q10, │ │ movs r0, #76 @ 0x4c │ │ - b.n c59d0 │ │ + b.n c59e0 │ │ movs r4, r0 │ │ - b.n c61da │ │ + b.n c61ea │ │ lsls r0, r0, #4 │ │ @ instruction: 0xeb009000 │ │ - b.n c61e2 │ │ + b.n c61f2 │ │ movs r0, r0 │ │ - b.n c6546 │ │ + b.n c6556 │ │ mrc2 10, 7, r1, cr14, cr15, {7} @ │ │ asrs r5, r2, #3 │ │ - b.n c6256 │ │ + b.n c6266 │ │ movs r4, r6 │ │ - b.n c59ec │ │ + b.n c59fc │ │ movs r0, #104 @ 0x68 │ │ - b.n c59f0 │ │ + b.n c5a00 │ │ movs r0, r0 │ │ - b.n c615e │ │ + b.n c616e │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ - add r0, pc, #464 @ (adr r0, c6090 ) │ │ - b.n c59fc │ │ + add r0, pc, #464 @ (adr r0, c60a0 ) │ │ + b.n c5a0c │ │ movs r1, r0 │ │ - b.n c6568 │ │ + b.n c6578 │ │ lsls r5, r6, #2 │ │ rev r0, r0 │ │ lsls r1, r0, #2 │ │ - b.n c620e │ │ + b.n c621e │ │ asrs r4, r1, #32 │ │ - b.n c5a0c │ │ + b.n c5a1c │ │ movs r0, #112 @ 0x70 │ │ - b.n c5cb4 │ │ + b.n c5cc4 │ │ lsls r0, r2, #1 │ │ - b.n c5a14 │ │ - subs r5, #57 @ 0x39 │ │ + b.n c5a24 │ │ + subs r4, #254 @ 0xfe │ │ @ instruction: 0xfb0000af │ │ and.w r0, r0, r2 │ │ - b.n c6588 │ │ + b.n c6598 │ │ lsls r4, r5, #2 │ │ rev r0, r0 │ │ lsls r0, r2, #1 │ │ - b.n c5a28 │ │ + b.n c5a38 │ │ lsls r1, r0, #2 │ │ - b.n c5ff2 │ │ + b.n c6002 │ │ lsls r2, r6, #2 │ │ - b.n c6196 │ │ + b.n c61a6 │ │ movs r0, r0 │ │ - b.n c659a │ │ + b.n c65aa │ │ lsls r7, r4, #2 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n c6642 │ │ + b.n c6652 │ │ str r2, [r0, r0] │ │ - b.n c6646 │ │ + b.n c6656 │ │ lsls r1, r0, #2 │ │ - b.n c5f8a │ │ + b.n c5f9a │ │ asrs r0, r0, #32 │ │ - b.n c63d0 │ │ + b.n c63e0 │ │ movs r0, #0 │ │ - b.n c5f9a │ │ + b.n c5faa │ │ movs r7, #184 @ 0xb8 │ │ - b.n c62ba │ │ + b.n c62ca │ │ movs r0, r0 │ │ - b.n c65be │ │ + b.n c65ce │ │ lsls r5, r1, #2 │ │ subs r0, r0, r0 │ │ str r1, [r0, r0] │ │ - b.n c642c │ │ + b.n c643c │ │ movs r2, r0 │ │ - b.n c6426 │ │ + b.n c6436 │ │ movs r0, #5 │ │ - b.n c602c │ │ + b.n c603c │ │ movs r1, r0 │ │ - b.n c65d2 │ │ + b.n c65e2 │ │ @ instruction: 0xfff61aff │ │ lsls r1, r3, #2 │ │ and.w r0, r0, r5 │ │ - b.n c627a │ │ + b.n c628a │ │ str r4, [r1, #0] │ │ - b.n c627e │ │ - beq.n c5eda │ │ + b.n c628e │ │ + beq.n c5eea │ │ @ instruction: 0xebff0248 │ │ - b.n c5a70 │ │ + b.n c5a80 │ │ stmia r0!, {r1, r2} │ │ - b.n c628a │ │ - b.n c600c │ │ - b.n c5a88 │ │ + b.n c629a │ │ + b.n c601c │ │ + b.n c5a98 │ │ movs r0, r0 │ │ - b.n c65f2 │ │ + b.n c6602 │ │ ldrsb.w r1, [sl, #2815] @ 0xaff │ │ lsls r0, r4, #2 │ │ - b.n c5a84 │ │ + b.n c5a94 │ │ str r4, [r1, #0] │ │ - b.n c629e │ │ + b.n c62ae │ │ movs r0, #0 │ │ - b.n c5a82 │ │ + b.n c5a92 │ │ movs r0, r0 │ │ - b.n c660a │ │ + b.n c661a │ │ lsls r6, r6, #2 │ │ lsrs r0, r0, #8 │ │ adds r1, #2 │ │ - b.n c5e8e │ │ + b.n c5e9e │ │ movs r0, #1 │ │ - b.n c63f6 │ │ + b.n c6406 │ │ asrs r0, r0, #1 │ │ - b.n c5aa0 │ │ + b.n c5ab0 │ │ movs r0, #0 │ │ - b.n c5a7a │ │ + b.n c5a8a │ │ movs r1, r0 │ │ - b.n c66be │ │ + b.n c66ce │ │ movs r0, r0 │ │ - b.n c5a9c │ │ + b.n c5aac │ │ movs r0, r5 │ │ - b.n c641c │ │ + b.n c642c │ │ movs r0, #5 │ │ - b.n c62ca │ │ - bne.n c600c │ │ + b.n c62da │ │ + bne.n c601c │ │ @ instruction: 0xebffe060 │ │ - b.n c5acc │ │ + b.n c5adc │ │ stmia r0!, {r1, r2} │ │ - b.n c62d6 │ │ + b.n c62e6 │ │ movs r4, r4 │ │ - b.n c59d0 │ │ + b.n c59e0 │ │ movs r0, r0 │ │ - b.n c663e │ │ + b.n c664e │ │ ldrsb.w r0, [r7, #2815] @ 0xaff │ │ vld3.32 @ instruction: 0xf9afeaff │ │ lsls r4, r3, #5 │ │ - b.n c59ca │ │ + b.n c59da │ │ asrs r4, r1, #32 │ │ - b.n c5ace │ │ + b.n c5ade │ │ asrs r1, r0, #32 │ │ - b.n c64b4 │ │ + b.n c64c4 │ │ asrs r4, r1, #32 │ │ - b.n c5ab6 │ │ + b.n c5ac6 │ │ vld3.32 @ instruction: 0xf9aaeaff │ │ lsls r0, r3, #11 │ │ - b.n c5afc │ │ + b.n c5b0c │ │ asrs r0, r1, #32 │ │ - b.n c6702 │ │ + b.n c6712 │ │ movs r0, r0 │ │ - b.n c60e4 │ │ - ldrh r7, [r4, r4] │ │ + b.n c60f4 │ │ + ldrh r6, [r4, r4] │ │ @ instruction: 0xebff2004 │ │ - b.n c5aee │ │ + b.n c5afe │ │ strb r6, [r7, #30] │ │ - b.n c637a │ │ + b.n c638a │ │ adds r0, #28 │ │ - b.n c5ade │ │ + b.n c5aee │ │ movs r0, #2 │ │ - b.n c66de │ │ + b.n c66ee │ │ strb r4, [r7, #30] │ │ - b.n c6366 │ │ + b.n c6376 │ │ movs r0, #4 │ │ - b.n c5ae2 │ │ + b.n c5af2 │ │ lsls r2, r6, #2 │ │ - b.n c6388 │ │ + b.n c6398 │ │ movs r0, #116 @ 0x74 │ │ - b.n c5b24 │ │ + b.n c5b34 │ │ movs r1, r0 │ │ - b.n c646e │ │ + b.n c647e │ │ movs r0, #16 │ │ - b.n c5b16 │ │ + b.n c5b26 │ │ lsls r2, r6, #2 │ │ - b.n c6378 │ │ + b.n c6388 │ │ lsls r4, r6, #30 │ │ - b.n c660a │ │ + b.n c661a │ │ lsrs r7, r7, #31 │ │ - b.n c669c │ │ + b.n c66ac │ │ movs r0, #8 │ │ - b.n c5b04 │ │ + b.n c5b14 │ │ str r0, [sp, #40] @ 0x28 │ │ - b.n c6706 │ │ + b.n c6716 │ │ movs r4, r1 │ │ - b.n c5b32 │ │ + b.n c5b42 │ │ asrs r4, r0, #32 │ │ - b.n c5b2e │ │ + b.n c5b3e │ │ asrs r2, r0, #32 │ │ - b.n c6714 │ │ + b.n c6724 │ │ asrs r4, r0, #32 │ │ - b.n c5b16 │ │ + b.n c5b26 │ │ movs r1, r1 │ │ - b.n c635a │ │ - beq.n c6054 │ │ - b.n c64b4 │ │ + b.n c636a │ │ + beq.n c6064 │ │ + b.n c64c4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, r5, r6, ip, sp, lr} │ │ - b.n c5b60 │ │ + b.n c5b70 │ │ strh r0, [r0, #0] │ │ - b.n c636a │ │ + b.n c637a │ │ @ instruction: 0xfa64eaff │ │ asrs r1, r0, #32 │ │ - b.n c6772 │ │ + b.n c6782 │ │ movs r1, r0 │ │ - b.n c6776 │ │ + b.n c6786 │ │ asrs r0, r6, #2 │ │ - b.n c63c4 │ │ + b.n c63d4 │ │ asrs r0, r7, #1 │ │ - b.n c6558 │ │ + b.n c6568 │ │ movs r4, r3 │ │ - b.n c5b5c │ │ + b.n c5b6c │ │ movs r4, r0 │ │ - b.n c6386 │ │ + b.n c6396 │ │ ldrb.w lr, [r4], #255 │ │ str r0, [sp, #0] │ │ - b.n c638e │ │ + b.n c639e │ │ movs r0, r0 │ │ - b.n c6792 │ │ + b.n c67a2 │ │ lsls r0, r6, #2 │ │ - b.n c63e0 │ │ + b.n c63f0 │ │ movs r0, r0 │ │ - b.n c670c │ │ + b.n c671c │ │ movs r5, r0 │ │ - b.n c5c06 │ │ + b.n c5c16 │ │ movs r0, #96 @ 0x60 │ │ - b.n c5b9c │ │ + b.n c5bac │ │ movs r1, r0 │ │ - b.n c6566 │ │ + b.n c6576 │ │ movs r5, r0 │ │ - b.n c5bf2 │ │ + b.n c5c02 │ │ mcr2 10, 4, r1, cr13, cr15, {7} @ │ │ vpmin.u16 q15, q11, │ │ lsls r0, r2, #1 │ │ - b.n c5bb0 │ │ + b.n c5bc0 │ │ lsls r1, r0, #2 │ │ - b.n c60fa │ │ + b.n c610a │ │ lsls r0, r4, #1 │ │ - b.n c5a9e │ │ + b.n c5aae │ │ movs r4, r2 │ │ - b.n c6582 │ │ + b.n c6592 │ │ asrs r2, r0, #2 │ │ - b.n c6186 │ │ + b.n c6196 │ │ asrs r0, r6, #2 │ │ - b.n c642c │ │ + b.n c643c │ │ movs r1, r0 │ │ - b.n c618e │ │ + b.n c619e │ │ asrs r0, r1, #32 │ │ - b.n c6592 │ │ + b.n c65a2 │ │ asrs r0, r7, #1 │ │ - b.n c5bb0 │ │ + b.n c5bc0 │ │ asrs r0, r0, #1 │ │ - b.n c5bd4 │ │ + b.n c5be4 │ │ lsls r6, r6, #2 │ │ - b.n c643e │ │ + b.n c644e │ │ movs r0, #0 │ │ - b.n c5bc4 │ │ + b.n c5bd4 │ │ asrs r0, r7, #1 │ │ - b.n c65c0 │ │ + b.n c65d0 │ │ lsls r4, r7, #1 │ │ - b.n c5bc4 │ │ + b.n c5bd4 │ │ lsls r4, r1, #1 │ │ - b.n c5be8 │ │ + b.n c5bf8 │ │ vrhadd.u d14, d2, d31 │ │ - b.n c6174 │ │ - b.n c5bf0 │ │ + b.n c6184 │ │ + b.n c5c00 │ │ movs r0, r0 │ │ - b.n c675a │ │ + b.n c676a │ │ str r4, [r5, r0] │ │ - b.n c5bf8 │ │ + b.n c5c08 │ │ @ instruction: 0xfa1f5aff │ │ asrs r4, r6, #1 │ │ - b.n c5c00 │ │ + b.n c5c10 │ │ lsls r2, r7, #2 │ │ - b.n c646c │ │ + b.n c647c │ │ movs r0, r4 │ │ - b.n c66ee │ │ + b.n c66fe │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n c6416 │ │ + b.n c6426 │ │ asrs r4, r6, #6 │ │ - b.n c64ba │ │ + b.n c64ca │ │ asrs r1, r0, #32 │ │ - b.n c61de │ │ + b.n c61ee │ │ movs r0, r1 │ │ - b.n c65e4 │ │ + b.n c65f4 │ │ asrs r6, r0, #32 │ │ - b.n c65e8 │ │ + b.n c65f8 │ │ movs r1, r0 │ │ and.w r0, r0, r4, lsr #32 │ │ - b.n c65f0 │ │ + b.n c6600 │ │ asrs r4, r2, #1 │ │ - b.n c5c2c │ │ + b.n c5c3c │ │ asrs r0, r6, #2 │ │ - b.n c6498 │ │ + b.n c64a8 │ │ lsls r0, r7, #1 │ │ - b.n c5c14 │ │ + b.n c5c24 │ │ lsrs r4, r7, #31 │ │ - b.n c671c │ │ + b.n c672c │ │ movs r1, r0 │ │ - b.n c6782 │ │ + b.n c6792 │ │ asrs r4, r7, #1 │ │ - b.n c5c20 │ │ + b.n c5c30 │ │ movs r2, r0 │ │ - b.n c680a │ │ + b.n c681a │ │ asrs r1, r0, #32 │ │ - b.n c6610 │ │ + b.n c6620 │ │ movs r0, r0 │ │ - b.n c6114 │ │ + b.n c6124 │ │ movs r4, #190 @ 0xbe │ │ - b.n c64ca │ │ + b.n c64da │ │ asrs r0, r1, #32 │ │ - b.n c661a │ │ + b.n c662a │ │ movs r2, r0 │ │ - b.n c63c0 │ │ + b.n c63d0 │ │ movs r1, r1 │ │ ldrh r0, [r0, #16] │ │ asrs r0, r3, #1 │ │ - b.n c5c60 │ │ + b.n c5c70 │ │ movs r2, r1 │ │ - b.n c662a │ │ + b.n c663a │ │ str r4, [r5, r0] │ │ - b.n c5c68 │ │ + b.n c5c78 │ │ asrs r0, r1, #4 │ │ - b.n c6054 │ │ + b.n c6064 │ │ movs r0, #188 @ 0xbc │ │ - b.n c64d8 │ │ + b.n c64e8 │ │ asrs r6, r7, #2 │ │ - b.n c64dc │ │ + b.n c64ec │ │ asrs r2, r0, #32 │ │ - b.n c61c0 │ │ + b.n c61d0 │ │ movs r0, r0 │ │ - b.n c63e4 │ │ + b.n c63f4 │ │ str r0, [r0, r0] │ │ movs r3, #160 @ 0xa0 │ │ ldr??.w lr, [sp, #2815] @ 0xaff │ │ lsls r4, r1, #5 │ │ - b.n c5c8c │ │ + b.n c5c9c │ │ movs r0, r0 │ │ - b.n c6270 │ │ - ldrh r4, [r0, r3] │ │ + b.n c6280 │ │ + ldrh r3, [r0, r3] │ │ @ instruction: 0xebff0080 │ │ - b.n c61e2 │ │ + b.n c61f2 │ │ movs r4, r2 │ │ - b.n c5c7e │ │ + b.n c5c8e │ │ movs r4, r2 │ │ - b.n c6662 │ │ + b.n c6672 │ │ asrs r2, r0, #2 │ │ - b.n c6266 │ │ + b.n c6276 │ │ movs r0, #20 │ │ - b.n c5c92 │ │ + b.n c5ca2 │ │ asrs r0, r6, #2 │ │ - b.n c6510 │ │ + b.n c6520 │ │ movs r1, r0 │ │ - b.n c6272 │ │ + b.n c6282 │ │ asrs r6, r6, #2 │ │ - b.n c6516 │ │ + b.n c6526 │ │ movs r0, r1 │ │ - b.n c667a │ │ + b.n c668a │ │ lsls r0, r7, #1 │ │ - b.n c5c98 │ │ + b.n c5ca8 │ │ movs r0, #0 │ │ - b.n c5ca6 │ │ + b.n c5cb6 │ │ lsls r4, r1, #1 │ │ - b.n c5cc0 │ │ + b.n c5cd0 │ │ asrs r4, r7, #1 │ │ - b.n c5ca4 │ │ + b.n c5cb4 │ │ asrs r0, r7, #1 │ │ - b.n c66a8 │ │ + b.n c66b8 │ │ vrhadd.u d14, d2, d31 │ │ movs r1, r0 │ │ - b.n c6876 │ │ + b.n c6886 │ │ movs r4, r0 │ │ - bge.n c619a │ │ + bge.n c61aa │ │ eors r0, r6 │ │ - b.n c5cd8 │ │ - add r0, pc, #464 @ (adr r0, c6370 ) │ │ - b.n c5cdc │ │ + b.n c5ce8 │ │ + add r0, pc, #464 @ (adr r0, c6380 ) │ │ + b.n c5cec │ │ adds r0, #48 @ 0x30 │ │ - b.n c5ce0 │ │ + b.n c5cf0 │ │ strh r0, [r1, #2] │ │ - b.n c5ce4 │ │ + b.n c5cf4 │ │ stc2l 10, cr14, [ip, #-1020]! @ 0xfffffc04 @ │ │ eors r0, r6 │ │ - b.n c5cec │ │ + b.n c5cfc │ │ asrs r4, r1, #1 │ │ - b.n c5cf0 │ │ + b.n c5d00 │ │ movs r5, r0 │ │ - b.n c5d62 │ │ + b.n c5d72 │ │ movs r5, r0 │ │ - b.n c623e │ │ + b.n c624e │ │ movs r5, r0 │ │ - b.n c5d4a │ │ + b.n c5d5a │ │ movs r4, r0 │ │ - b.n c6506 │ │ - bfcsel 1e, c69c6 , 20, le │ │ - add r0, pc, #464 @ (adr r0, c639c ) │ │ - b.n c5d08 │ │ + b.n c6516 │ │ + bfcsel 1e, c69d6 , 20, le │ │ + add r0, pc, #464 @ (adr r0, c63ac ) │ │ + b.n c5d18 │ │ str r0, [sp, #0] │ │ - b.n c6512 │ │ + b.n c6522 │ │ adds r0, #48 @ 0x30 │ │ - b.n c5d10 │ │ + b.n c5d20 │ │ movs r0, r0 │ │ - b.n c688c │ │ + b.n c689c │ │ strh r0, [r1, #2] │ │ - b.n c5d18 │ │ + b.n c5d28 │ │ movs r5, r0 │ │ - b.n c5d8a │ │ + b.n c5d9a │ │ movs r5, r0 │ │ - b.n c62e6 │ │ + b.n c62f6 │ │ movs r5, r0 │ │ - b.n c5d72 │ │ + b.n c5d82 │ │ ldc2l 10, cr0, [ip, #-1020] @ 0xfffffc04 @ │ │ mcr2 10, 1, lr, cr12, cr15, {7} @ │ │ asrs r0, r3, #2 │ │ - b.n c5d34 │ │ + b.n c5d44 │ │ lsls r0, r4, #1 │ │ - b.n c5d34 │ │ + b.n c5d44 │ │ asrs r1, r0, #32 │ │ - b.n c631c │ │ + b.n c632c │ │ mrc2 10, 3, lr, cr13, cr15, {7} @ │ │ asrs r0, r0, #2 │ │ - b.n c5d44 │ │ + b.n c5d54 │ │ movs r2, r0 │ │ - b.n c668a │ │ + b.n c669a │ │ adds r0, #124 @ 0x7c │ │ - b.n c5d4c │ │ + b.n c5d5c │ │ movs r4, #252 @ 0xfc │ │ - b.n c6812 │ │ + b.n c6822 │ │ asrs r1, r0, #32 │ │ - b.n c6334 │ │ + b.n c6344 │ │ movs r0, r0 │ │ - b.n c5d34 │ │ + b.n c5d44 │ │ adds r0, #3 │ │ - b.n c633c │ │ + b.n c634c │ │ movs r1, r0 │ │ - b.n c6962 │ │ - strb r0, [r0, r0] │ │ + b.n c6972 │ │ + strh r7, [r7, r7] │ │ @ instruction: 0xebff4070 │ │ - b.n c5d64 │ │ + b.n c5d74 │ │ mrc2 10, 0, lr, cr13, cr15, {7} @ │ │ movs r0, r7 │ │ - b.n c66c8 │ │ + b.n c66d8 │ │ asrs r4, r0, #32 │ │ - b.n c6576 │ │ + b.n c6586 │ │ movs r0, #1 │ │ - b.n c697a │ │ + b.n c698a │ │ adds r0, #0 │ │ - b.n c697e │ │ - bne.n c61ec │ │ + b.n c698e │ │ + bne.n c61fc │ │ @ instruction: 0xebfff8aa │ │ @ instruction: 0xeaff0028 │ │ - b.n c66e0 │ │ + b.n c66f0 │ │ asrs r4, r0, #32 │ │ - b.n c658e │ │ + b.n c659e │ │ movs r0, #1 │ │ - b.n c6992 │ │ + b.n c69a2 │ │ adds r0, #0 │ │ - b.n c6996 │ │ - bne.n c61f8 │ │ + b.n c69a6 │ │ + bne.n c6208 │ │ @ instruction: 0xebffff4b │ │ @ instruction: 0xeaff9000 │ │ - b.n c65a2 │ │ + b.n c65b2 │ │ movs r5, r0 │ │ - b.n c5e0e │ │ + b.n c5e1e │ │ movs r1, r0 │ │ - b.n c676a │ │ + b.n c677a │ │ movs r5, r0 │ │ - b.n c5df6 │ │ + b.n c5e06 │ │ mcr2 10, 0, lr, cr12, cr15, {7} @ │ │ movs r4, r0 │ │ - b.n c5da2 │ │ + b.n c5db2 │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n c69ba │ │ + b.n c69ca │ │ movs r2, r0 │ │ - b.n c697e │ │ + b.n c698e │ │ movs r4, r0 │ │ - b.n c5d8e │ │ + b.n c5d9e │ │ vpmin.u16 q15, , │ │ - ldrh r4, [r6, #34] @ 0x22 │ │ + ldrh r4, [r0, #36] @ 0x24 │ │ movs r1, r0 │ │ - subs r0, #202 @ 0xca │ │ - vtbl.8 d20, {d20}, d4 │ │ - vqshl.u32 q11, q2, #20 │ │ - vcvt.u16.f16 q11, q4, #12 │ │ - vpaddl.s16 q13, q14 │ │ - vrev32.16 q13, q8 │ │ + subs r1, #157 @ 0x9d │ │ + vqneg.s16 q10, q14 │ │ + vqabs.s16 q11, │ │ + vqrdmulh.s q11, q2, d29[0] │ │ + vrshr.u32 q13, q6, #12 │ │ + vshr.u64 q13, q0, #12 │ │ @ instruction: 0xfff44df0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n c67c4 │ │ + b.n c67d4 │ │ strh r2, [r0, #0] │ │ - b.n c65ee │ │ + b.n c65fe │ │ movs r0, #213 @ 0xd5 │ │ - b.n c6652 │ │ + b.n c6662 │ │ str r0, [r2, #0] │ │ - b.n c5dd6 │ │ + b.n c5de6 │ │ movs r1, #2 │ │ - b.n c63ba │ │ + b.n c63ca │ │ str r4, [r0, r0] │ │ - b.n c5dea │ │ + b.n c5dfa │ │ adds r0, #28 │ │ - b.n c5de6 │ │ + b.n c5df6 │ │ lsls r6, r7 │ │ - b.n c666c │ │ + b.n c667c │ │ movs r0, #188 @ 0xbc │ │ - b.n c6670 │ │ + b.n c6680 │ │ ands r5, r0 │ │ - b.n c6356 │ │ + b.n c6366 │ │ str r2, [r0, #0] │ │ - b.n c67d6 │ │ + b.n c67e6 │ │ ands r2, r0 │ │ - b.n c67de │ │ + b.n c67ee │ │ movs r4, r0 │ │ - b.n c6586 │ │ + b.n c6596 │ │ movs r3, r2 │ │ ldmia r2!, {} │ │ lsls r0, r7, #2 │ │ - b.n c6688 │ │ + b.n c6698 │ │ strb r1, [r6, #1] │ │ - b.n c60e4 │ │ + b.n c60f4 │ │ str r4, [r7, #8] │ │ - b.n c6670 │ │ + b.n c6680 │ │ lsls r2, r4, #2 │ │ - b.n c6590 │ │ + b.n c65a0 │ │ lsls r6, r7 │ │ - b.n c6678 │ │ + b.n c6688 │ │ adds r0, #151 @ 0x97 │ │ - b.n c6336 │ │ + b.n c6346 │ │ str r4, [r2, #0] │ │ - b.n c67fa │ │ + b.n c680a │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ lsls r2, r4, #2 │ │ - b.n c6642 │ │ + b.n c6652 │ │ movs r1, r0 │ │ - b.n c6386 │ │ + b.n c6396 │ │ asrs r6, r0, #32 │ │ - b.n c664a │ │ + b.n c665a │ │ lsls r0, r2, #22 │ │ - b.n c6312 │ │ + b.n c6322 │ │ movs r5, r0 │ │ - b.n c641e │ │ - subs r3, #188 @ 0xbc │ │ + b.n c642e │ │ + subs r3, #252 @ 0xfc │ │ mla r0, r0, r0, r1 │ │ - b.n c5e4a │ │ + b.n c5e5a │ │ movs r6, r0 │ │ - b.n c665e │ │ + b.n c666e │ │ movs r0, #5 │ │ - b.n c6662 │ │ - subs r4, #39 @ 0x27 │ │ + b.n c6672 │ │ + subs r3, #236 @ 0xec │ │ mla r0, r0, r0, r0 │ │ - b.n c6a6a │ │ + b.n c6a7a │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {r2, r3} │ │ - b.n c5e52 │ │ + b.n c5e62 │ │ asrs r4, r0, #32 │ │ - b.n c5e56 │ │ + b.n c5e66 │ │ asrs r2, r0, #32 │ │ - b.n c6a3c │ │ + b.n c6a4c │ │ asrs r4, r0, #32 │ │ - b.n c5e3e │ │ + b.n c5e4e │ │ lsls r6, r7, #30 │ │ - b.n c6952 │ │ + b.n c6962 │ │ lsrs r7, r7, #31 │ │ - b.n c69e4 │ │ + b.n c69f4 │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n c686c │ │ - beq.n c638c │ │ - b.n c67f0 │ │ + b.n c687c │ │ + beq.n c639c │ │ + b.n c6800 │ │ strh r3, [r0, #0] │ │ - b.n c669a │ │ + b.n c66aa │ │ adds r0, #213 @ 0xd5 │ │ - b.n c66fe │ │ + b.n c670e │ │ str r0, [sp, #32] │ │ - b.n c5e98 │ │ + b.n c5ea8 │ │ adds r1, #3 │ │ - b.n c6466 │ │ + b.n c6476 │ │ movs r1, r0 │ │ - b.n c699c │ │ + b.n c69ac │ │ str r4, [r3, #0] │ │ - b.n c5e94 │ │ + b.n c5ea4 │ │ lsls r7, r3, #1 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n c6a1a │ │ + b.n c6a2a │ │ adds r0, #4 │ │ asrs r2, r2, #22 │ │ strb r1, [r0, #0] │ │ asrs r3, r0, #10 │ │ adds r0, #12 │ │ - b.n c5ea2 │ │ + b.n c5eb2 │ │ strb r1, [r0, #0] │ │ lsls r0, r4, #14 │ │ movs r0, r0 │ │ - b.n c6a3a │ │ + b.n c6a4a │ │ str r4, [r0, r0] │ │ asrs r0, r3, #22 │ │ adds r0, #64 @ 0x40 │ │ - b.n c5eb8 │ │ + b.n c5ec8 │ │ str r0, [r0, r0] │ │ lsls r0, r4, #14 │ │ strb r7, [r0, #0] │ │ - b.n c64a4 │ │ + b.n c64b4 │ │ strb r1, [r0, #0] │ │ - b.n c6b2c │ │ + b.n c6b3c │ │ strb r4, [r7, r2] │ │ - b.n c6748 │ │ + b.n c6758 │ │ ands r0, r1 │ │ - b.n c68b4 │ │ + b.n c68c4 │ │ movs r5, r0 │ │ - b.n c6652 │ │ + b.n c6662 │ │ lsls r0, r4, #1 │ │ ldrh r0, [r0, #16] │ │ adds r0, #9 │ │ - b.n c6b72 │ │ + b.n c6b82 │ │ stmia r0!, {r0, r1, r2} │ │ - b.n c643c │ │ - add r0, pc, #0 @ (adr r0, c63b8 ) │ │ - b.n c6afa │ │ + b.n c644c │ │ + add r0, pc, #0 @ (adr r0, c63c8 ) │ │ + b.n c6b0a │ │ strb r4, [r7, #2] │ │ - b.n c676a │ │ + b.n c677a │ │ lsls r7, r4, #2 │ │ - b.n c6664 │ │ + b.n c6674 │ │ movs r0, r4 │ │ cmp r2, #0 │ │ strb r7, [r4, #2] │ │ - b.n c670a │ │ + b.n c671a │ │ adds r0, #1 │ │ - b.n c645c │ │ + b.n c646c │ │ movs r0, r1 │ │ - b.n c6a78 │ │ + b.n c6a88 │ │ movs r1, r0 │ │ cmp r2, #0 │ │ str r7, [r0, r0] │ │ - b.n c671a │ │ + b.n c672a │ │ movs r0, r2 │ │ @ instruction: 0xea00a010 │ │ - b.n c5efc │ │ - add r0, pc, #28 @ (adr r0, c6400 ) │ │ - b.n c6b6c │ │ + b.n c5f0c │ │ + add r0, pc, #28 @ (adr r0, c6410 ) │ │ + b.n c6b7c │ │ str r2, [r1, r0] │ │ - b.n c6478 │ │ + b.n c6488 │ │ strb r7, [r0, #2] │ │ - b.n c64fa │ │ + b.n c650a │ │ ands r6, r0 │ │ - b.n c6900 │ │ + b.n c6910 │ │ strb r7, [r1, #0] │ │ - b.n c6bb6 │ │ - b.n c640c │ │ - b.n c673a │ │ + b.n c6bc6 │ │ + b.n c641c │ │ + b.n c674a │ │ stmia r0!, {r2, r3} │ │ - b.n c5f18 │ │ + b.n c5f28 │ │ stmia r0!, {r1} │ │ - b.n c688a │ │ - b.n c6414 │ │ - b.n c68c2 │ │ + b.n c689a │ │ + b.n c6424 │ │ + b.n c68d2 │ │ lsrs r7, r1, #8 │ │ orn sl, ip, #8847360 @ 0x870000 │ │ - bl ffd0b402 │ │ + bl ffd0b412 │ │ subs r7, r7, r3 │ │ movs r2, r1 │ │ - b.n c66bc │ │ - add r0, pc, #64 @ (adr r0, c6458 ) │ │ - b.n c5f54 │ │ + b.n c66cc │ │ + add r0, pc, #64 @ (adr r0, c6468 ) │ │ + b.n c5f64 │ │ stmia r0!, {r2, r3} │ │ - b.n c5f58 │ │ + b.n c5f68 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ adds r0, #133 @ 0x85 │ │ - b.n c6532 │ │ + b.n c6542 │ │ strb r4, [r2, #0] │ │ - b.n c6930 │ │ + b.n c6940 │ │ adds r0, #7 │ │ - b.n c676e │ │ + b.n c677e │ │ lsls r2, r6 │ │ - b.n c6718 │ │ + b.n c6728 │ │ str r1, [r0, r0] │ │ - b.n c68c0 │ │ + b.n c68d0 │ │ lsls r0, r6 │ │ - b.n c67c8 │ │ + b.n c67d8 │ │ movs r1, r0 │ │ - b.n c66e8 │ │ + b.n c66f8 │ │ strb r3, [r0, #0] │ │ - b.n c6782 │ │ + b.n c6792 │ │ @ instruction: 0xfff98aff │ │ strb r4, [r7, #2] │ │ - b.n c67f6 │ │ + b.n c6806 │ │ adds r0, #190 @ 0xbe │ │ - b.n c67fa │ │ + b.n c680a │ │ strb r2, [r0, #0] │ │ - b.n c6960 │ │ + b.n c6970 │ │ adds r0, #3 │ │ - b.n c656e │ │ + b.n c657e │ │ adds r0, #2 │ │ - b.n c6960 │ │ + b.n c6970 │ │ movs r3, r0 │ │ - b.n c670c │ │ + b.n c671c │ │ movs r1, r5 │ │ ldmia r2!, {} │ │ movs r4, r2 │ │ - b.n c6972 │ │ + b.n c6982 │ │ adds r0, #190 @ 0xbe │ │ - b.n c67f6 │ │ + b.n c6806 │ │ asrs r1, r0, #2 │ │ - b.n c656e │ │ + b.n c657e │ │ eors r3, r6 │ │ - b.n c6252 │ │ + b.n c6262 │ │ strb r4, [r7, #2] │ │ - b.n c6802 │ │ + b.n c6812 │ │ str r0, [r1, r0] │ │ - b.n c6982 │ │ + b.n c6992 │ │ adds r0, #176 @ 0xb0 │ │ - b.n c6800 │ │ + b.n c6810 │ │ asrs r0, r0, #32 │ │ - b.n c6bc2 │ │ + b.n c6bd2 │ │ strb r4, [r0, #0] │ │ - b.n c5faa │ │ + b.n c5fba │ │ adds r0, #115 @ 0x73 │ │ - b.n c6288 │ │ + b.n c6298 │ │ asrs r5, r0, #32 │ │ - b.n c6016 │ │ + b.n c6026 │ │ str r0, [sp, #16] │ │ - b.n c601a │ │ + b.n c602a │ │ str r4, [r0, #0] │ │ - b.n c5fc6 │ │ + b.n c5fd6 │ │ str r3, [r0, #0] │ │ - b.n c639a │ │ + b.n c63aa │ │ movs r5, r0 │ │ - b.n c67de │ │ + b.n c67ee │ │ asrs r0, r0, #32 │ │ - b.n c5fc6 │ │ + b.n c5fd6 │ │ movs r0, #4 │ │ - b.n c5fca │ │ + b.n c5fda │ │ strb r6, [r6, #2] │ │ - b.n c6832 │ │ - subs r3, #197 @ 0xc5 │ │ + b.n c6842 │ │ + subs r3, #138 @ 0x8a │ │ @ instruction: 0xfb0000b6 │ │ - b.n c685a │ │ + b.n c686a │ │ movs r0, r0 │ │ - b.n c6b6a │ │ + b.n c6b7a │ │ movs r0, r0 │ │ - b.n c65c4 │ │ + b.n c65d4 │ │ movs r6, r7 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n c6af4 │ │ + b.n c6b04 │ │ lsls r6, r0, #1 │ │ subs r0, r0, r0 │ │ lsrs r1, r0, #32 │ │ - b.n c6afc │ │ + b.n c6b0c │ │ movs r7, r7 │ │ subs r0, r0, r0 │ │ movs r0, #4 │ │ - b.n c6002 │ │ + b.n c6012 │ │ str r0, [r0, r0] │ │ - b.n c6c16 │ │ + b.n c6c26 │ │ movs r0, r0 │ │ - b.n c6b7e │ │ + b.n c6b8e │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n c6012 │ │ - subs r3, #183 @ 0xb7 │ │ + b.n c6022 │ │ + subs r3, #124 @ 0x7c │ │ mla r0, r0, r5, r0 │ │ - b.n c682a │ │ - beq.n c6524 │ │ - b.n c6984 │ │ + b.n c683a │ │ + beq.n c6534 │ │ + b.n c6994 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, ip, sp} │ │ - b.n c601a │ │ + b.n c602a │ │ strb r5, [r1, #0] │ │ - b.n c6cba │ │ + b.n c6cca │ │ adds r0, #1 │ │ - b.n c6a04 │ │ + b.n c6a14 │ │ adds r0, #1 │ │ - b.n c6c88 │ │ + b.n c6c98 │ │ stmia r0!, {r0, r1} │ │ - b.n c6594 │ │ + b.n c65a4 │ │ @ instruction: 0xffaaeaff │ │ movs r4, r1 │ │ - b.n c602e │ │ + b.n c603e │ │ asrs r4, r0, #32 │ │ - b.n c6032 │ │ + b.n c6042 │ │ asrs r2, r0, #32 │ │ - b.n c6c18 │ │ + b.n c6c28 │ │ asrs r4, r0, #32 │ │ - b.n c601a │ │ + b.n c602a │ │ lsls r5, r0, #31 │ │ - b.n c6b2e │ │ + b.n c6b3e │ │ lsrs r7, r7, #31 │ │ - b.n c6bc0 │ │ + b.n c6bd0 │ │ str r7, [r0, r0] │ │ - b.n c69a6 │ │ + b.n c69b6 │ │ movs r5, r0 │ │ - b.n c686a │ │ - beq.n c6564 │ │ - b.n c69c4 │ │ + b.n c687a │ │ + beq.n c6574 │ │ + b.n c69d4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, ip, sp, lr} │ │ - b.n c6056 │ │ + b.n c6066 │ │ strb r0, [r6, #2] │ │ - b.n c68e8 │ │ + b.n c68f8 │ │ movs r4, r0 │ │ - b.n c6b6c │ │ + b.n c6b7c │ │ movs r6, r5 │ │ subs r0, r0, r0 │ │ movs r6, r0 │ │ - b.n c6b78 │ │ + b.n c6b88 │ │ asrs r0, r2, #32 │ │ - b.n c6064 │ │ + b.n c6074 │ │ movs r7, r7 │ │ subs r0, r0, r0 │ │ ands r0, r0 │ │ - b.n c6892 │ │ + b.n c68a2 │ │ movs r4, r0 │ │ - b.n c6086 │ │ + b.n c6096 │ │ asrs r4, r3, #1 │ │ - b.n c6100 │ │ + b.n c6110 │ │ strb r2, [r0, #0] │ │ - b.n c689e │ │ + b.n c68ae │ │ movs r3, r2 │ │ - b.n c6a62 │ │ + b.n c6a72 │ │ movs r0, #1 │ │ - b.n c6ca6 │ │ + b.n c6cb6 │ │ movs r1, #48 @ 0x30 │ │ - b.n c666e │ │ + b.n c667e │ │ movs r4, r2 │ │ - b.n c6a88 │ │ + b.n c6a98 │ │ asrs r4, r0, #32 │ │ - b.n c68b2 │ │ + b.n c68c2 │ │ lsrs r3, r0, #11 │ │ add.w r0, r0, r8, lsr #20 │ │ - b.n c60b4 │ │ + b.n c60c4 │ │ movs r0, r0 │ │ - b.n c6c28 │ │ + b.n c6c38 │ │ @ instruction: 0xffd81aff │ │ movs r4, r0 │ │ - b.n c60b4 │ │ + b.n c60c4 │ │ asrs r5, r1, #32 │ │ - b.n c6d4a │ │ + b.n c6d5a │ │ movs r0, #7 │ │ - b.n c68ce │ │ - add r0, pc, #80 @ (adr r0, c65e0 ) │ │ - b.n c60cc │ │ + b.n c68de │ │ + add r0, pc, #80 @ (adr r0, c65f0 ) │ │ + b.n c60dc │ │ movs r1, r0 │ │ - b.n c6a96 │ │ + b.n c6aa6 │ │ str r0, [sp, #4] │ │ - b.n c6cac │ │ + b.n c6cbc │ │ movs r1, r0 │ │ - b.n c6d1e │ │ + b.n c6d2e │ │ stmia r0!, {} │ │ - b.n c6624 │ │ + b.n c6634 │ │ asrs r0, r2, #32 │ │ - b.n c60e0 │ │ + b.n c60f0 │ │ movs r4, r0 │ │ - b.n c68ea │ │ + b.n c68fa │ │ strb r4, [r7, #2] │ │ - b.n c695a │ │ + b.n c696a │ │ lsls r7, r4, #2 │ │ - b.n c6854 │ │ + b.n c6864 │ │ @ instruction: 0xff833aff │ │ @ instruction: 0xffa3eaff │ │ asrs r0, r2, #32 │ │ - b.n c60f2 │ │ + b.n c6102 │ │ asrs r0, r0, #32 │ │ - b.n c60c2 │ │ + b.n c60d2 │ │ movs r4, r2 │ │ - b.n c6ada │ │ + b.n c6aea │ │ lsrs r1, r0, #32 │ │ - b.n c6bfc │ │ + b.n c6c0c │ │ @ instruction: 0xffbf0aff │ │ movs r0, r0 │ │ - b.n c60e2 │ │ + b.n c60f2 │ │ str r0, [r0, r0] │ │ - b.n c6d16 │ │ + b.n c6d26 │ │ movs r5, r0 │ │ - b.n c691a │ │ - beq.n c6614 │ │ - b.n c6a74 │ │ + b.n c692a │ │ + beq.n c6624 │ │ + b.n c6a84 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {ip} │ │ - b.n c6116 │ │ + b.n c6126 │ │ str r0, [r0, r0] │ │ - b.n c6d2a │ │ + b.n c6d3a │ │ asrs r0, r0, #32 │ │ - b.n c6110 │ │ + b.n c6120 │ │ asrs r0, r0, #32 │ │ - b.n c60f2 │ │ + b.n c6102 │ │ movs r5, r0 │ │ - b.n c6936 │ │ - beq.n c6630 │ │ - b.n c6a90 │ │ + b.n c6946 │ │ + beq.n c6640 │ │ + b.n c6aa0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r4, r7} │ │ - b.n c6140 │ │ + b.n c6150 │ │ ldrsb r5, [r0, r7] │ │ - b.n c6c16 │ │ + b.n c6c26 │ │ ldrsh r7, [r7, r7] │ │ - b.n c6ca8 │ │ + b.n c6cb8 │ │ movs r0, r0 │ │ - b.n c672c │ │ + b.n c673c │ │ lsls r2, r3, #1 │ │ - b.n c61b2 │ │ + b.n c61c2 │ │ movs r0, r0 │ │ - b.n c6cb6 │ │ + b.n c6cc6 │ │ @ instruction: 0xffb20aff │ │ asrs r0, r0, #2 │ │ - b.n c615c │ │ + b.n c616c │ │ movs r1, r0 │ │ - b.n c6d62 │ │ + b.n c6d72 │ │ adds r0, #124 @ 0x7c │ │ - b.n c6164 │ │ + b.n c6174 │ │ movs r0, #109 @ 0x6d │ │ - b.n c6d6a │ │ + b.n c6d7a │ │ str r0, [r7, #4] │ │ - b.n c616c │ │ + b.n c617c │ │ asrs r1, r0, #32 │ │ - b.n c6750 │ │ + b.n c6760 │ │ adds r0, #3 │ │ - b.n c6754 │ │ + b.n c6764 │ │ str r6, [r0, #0] │ │ - b.n c6758 │ │ + b.n c6768 │ │ str r0, [r6, #12] │ │ - b.n c69d8 │ │ - strh r1, [r7, r3] │ │ + b.n c69e8 │ │ + strh r0, [r7, r3] │ │ @ instruction: 0xebff0005 │ │ - b.n c6986 │ │ - beq.n c6680 │ │ - b.n c6ae0 │ │ + b.n c6996 │ │ + beq.n c6690 │ │ + b.n c6af0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r4, r6} │ │ - b.n c6190 │ │ + b.n c61a0 │ │ ldrsb r5, [r0, r7] │ │ - b.n c6c66 │ │ + b.n c6c76 │ │ ldrsh r7, [r7, r7] │ │ - b.n c6cf8 │ │ + b.n c6d08 │ │ movs r0, r0 │ │ - b.n c677c │ │ + b.n c678c │ │ lsls r2, r3, #1 │ │ - b.n c6202 │ │ + b.n c6212 │ │ movs r0, r0 │ │ - b.n c6d06 │ │ + b.n c6d16 │ │ @ instruction: 0xff9e0aff │ │ asrs r0, r0, #1 │ │ - b.n c61ac │ │ + b.n c61bc │ │ movs r1, r0 │ │ - b.n c6db2 │ │ + b.n c6dc2 │ │ adds r0, #60 @ 0x3c │ │ - b.n c61b4 │ │ + b.n c61c4 │ │ movs r0, #113 @ 0x71 │ │ - b.n c6dba │ │ + b.n c6dca │ │ strh r0, [r7, #0] │ │ - b.n c61bc │ │ + b.n c61cc │ │ asrs r1, r0, #32 │ │ - b.n c67a0 │ │ + b.n c67b0 │ │ adds r0, #3 │ │ - b.n c67a4 │ │ + b.n c67b4 │ │ strh r0, [r1, #0] │ │ - b.n c67a8 │ │ + b.n c67b8 │ │ strh r0, [r6, #6] │ │ - b.n c6a28 │ │ - strh r5, [r4, r3] │ │ + b.n c6a38 │ │ + strh r4, [r4, r3] │ │ @ instruction: 0xebff0005 │ │ - b.n c69d6 │ │ - beq.n c66d0 │ │ - b.n c6b30 │ │ - ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r6, r9, pc} │ │ - movs r1, r0 │ │ - strh r2, [r1, #48] @ 0x30 │ │ - vrsra.u32 d22, d16, #12 │ │ - vqshlu.s32 d24, d0, #20 │ │ - vsra.u64 q12, q8, #12 │ │ - movs r1, r0 │ │ - strh r2, [r7, #44] @ 0x2c │ │ - vpaddl.u16 q11, q8 │ │ - vtbx.8 d25, {d20-d23}, d15 │ │ + b.n c69e6 │ │ + beq.n c66e0 │ │ + b.n c6b40 │ │ + ldrh r0, [r6, #62] @ 0x3e │ │ + ldmia.w sp!, {r4, r6, r9, pc} │ │ + movs r1, r0 │ │ + strh r4, [r1, #60] @ 0x3c │ │ + @ instruction: 0xfff46345 │ │ + vqshl.u64 d24, d2, #52 @ 0x34 │ │ + vpaddl.s16 d24, d0 │ │ + movs r1, r0 │ │ + strh r4, [r7, #56] @ 0x38 │ │ + vrshr.u64 q11, , #12 │ │ + @ instruction: 0xfff49bbf │ │ vcvt.f16.u16 d20, d0, #12 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n c6be0 │ │ + b.n c6bf0 │ │ udf #26 │ │ - b.n c6b64 │ │ + b.n c6b74 │ │ asrs r0, r1, #32 │ │ - b.n c61ee │ │ + b.n c61fe │ │ movs r0, #0 │ │ - b.n c6274 │ │ + b.n c6284 │ │ movs r0, #1 │ │ - b.n c6dda │ │ + b.n c6dea │ │ movs r0, #0 │ │ - b.n c625c │ │ + b.n c626c │ │ adds r0, #12 │ │ - b.n c61fe │ │ + b.n c620e │ │ ands r0, r1 │ │ - b.n c6202 │ │ + b.n c6212 │ │ asrs r4, r0, #32 │ │ - b.n c620c │ │ + b.n c621c │ │ stmia r0!, {r2, r3, r6} │ │ - b.n c6210 │ │ + b.n c6220 │ │ asrs r4, r0, #32 │ │ - b.n c6df0 │ │ + b.n c6e00 │ │ asrs r4, r0, #32 │ │ - b.n c61f8 │ │ + b.n c6208 │ │ movs r0, #2 │ │ - b.n c6c0e │ │ + b.n c6c1e │ │ asrs r0, r0, #32 │ │ - b.n c6e3a │ │ + b.n c6e4a │ │ movs r4, r0 │ │ - b.n c69a2 │ │ + b.n c69b2 │ │ movs r6, r2 │ │ ldrh r0, [r0, #16] │ │ asrs r0, r1, #32 │ │ - b.n c622c │ │ + b.n c623c │ │ movs r2, r0 │ │ - b.n c6dac │ │ + b.n c6dbc │ │ movs r6, r2 │ │ subs r2, #0 │ │ asrs r0, r1, #1 │ │ - b.n c6238 │ │ + b.n c6248 │ │ asrs r0, r0, #32 │ │ - b.n c62b8 │ │ + b.n c62c8 │ │ movs r2, r0 │ │ - b.n c6d3c │ │ + b.n c6d4c │ │ movs r2, r2 │ │ lsrs r0, r0, #8 │ │ asrs r1, r2, #3 │ │ - b.n c6ada │ │ + b.n c6aea │ │ movs r1, r0 │ │ - b.n c6e08 │ │ + b.n c6e18 │ │ movs r7, r1 │ │ ldmia r2!, {} │ │ movs r0, #64 @ 0x40 │ │ - b.n c6254 │ │ + b.n c6264 │ │ movs r0, #144 @ 0x90 │ │ - b.n c6256 │ │ + b.n c6266 │ │ movs r0, #4 │ │ - b.n c625a │ │ - bl 522236 │ │ + b.n c626a │ │ + bl 522246 │ │ eors r0, r2 │ │ - b.n c6264 │ │ + b.n c6274 │ │ ands r4, r0 │ │ - b.n c626a │ │ + b.n c627a │ │ movs r4, r0 │ │ - b.n c69ea │ │ + b.n c69fa │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ asrs r1, r6, #1 │ │ - b.n c652c │ │ + b.n c653c │ │ movs r0, r2 │ │ - b.n c6d74 │ │ + b.n c6d84 │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #31 │ │ - b.n c6d6a │ │ + b.n c6d7a │ │ subs r7, r7, #7 │ │ - b.n c6dfc │ │ + b.n c6e0c │ │ movs r1, r0 │ │ - b.n c6aa2 │ │ - beq.n c6774 │ │ - b.n c6bfc │ │ + b.n c6ab2 │ │ + beq.n c6784 │ │ + b.n c6c0c │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {lr} │ │ - b.n c6aae │ │ + b.n c6abe │ │ movs r3, r0 │ │ - b.n c6ab2 │ │ + b.n c6ac2 │ │ asrs r1, r0, #32 │ │ - b.n c6eb6 │ │ - b.n c65d0 │ │ + b.n c6ec6 │ │ + b.n c65e0 │ │ @ instruction: 0xebff1000 │ │ - b.n c6abe │ │ + b.n c6ace │ │ movs r4, r0 │ │ - b.n c6ac2 │ │ + b.n c6ad2 │ │ movs r0, r0 │ │ - b.n c6e28 │ │ + b.n c6e38 │ │ @ instruction: 0xfff41aff │ │ asrs r4, r1, #32 │ │ - b.n c62ae │ │ + b.n c62be │ │ ands r0, r0 │ │ - b.n c6ad2 │ │ + b.n c6ae2 │ │ movs r4, r0 │ │ - b.n c6cb0 │ │ + b.n c6cc0 │ │ movs r0, #1 │ │ - b.n c6eda │ │ - ldr r3, [r5, r0] │ │ + b.n c6eea │ │ + ldr r2, [r5, r0] │ │ @ instruction: 0xebff0000 │ │ - b.n c6e42 │ │ + b.n c6e52 │ │ movs r7, r1 │ │ subs r0, r0, r0 │ │ movs r4, r1 │ │ - b.n c62d2 │ │ + b.n c62e2 │ │ movs r0, #1 │ │ - b.n c6eee │ │ + b.n c6efe │ │ lsls r4, r1, #1 │ │ - b.n c62d2 │ │ + b.n c62e2 │ │ asrs r1, r0, #32 │ │ - b.n c6356 │ │ + b.n c6366 │ │ asrs r1, r0, #32 │ │ - b.n c6ebc │ │ + b.n c6ecc │ │ asrs r1, r0, #32 │ │ - b.n c633e │ │ + b.n c634e │ │ movs r4, r2 │ │ - b.n c62ea │ │ + b.n c62fa │ │ asrs r0, r3, #32 │ │ - b.n c6cc6 │ │ + b.n c6cd6 │ │ movs r4, r0 │ │ - b.n c6ce4 │ │ - ldrh r2, [r2, #24] │ │ + b.n c6cf4 │ │ + ldrh r1, [r2, #24] │ │ @ instruction: 0xebff0000 │ │ - b.n c6e72 │ │ + b.n c6e82 │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ asrs r0, r0, #32 │ │ - b.n c6f1a │ │ + b.n c6f2a │ │ movs r1, r0 │ │ - b.n c6b1e │ │ - beq.n c67f0 │ │ - b.n c6c78 │ │ + b.n c6b2e │ │ + beq.n c6800 │ │ + b.n c6c88 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {ip} │ │ - b.n c6b2a │ │ + b.n c6b3a │ │ movs r1, r0 │ │ - b.n c6b2e │ │ - beq.n c6800 │ │ - b.n c6c88 │ │ + b.n c6b3e │ │ + beq.n c6810 │ │ + b.n c6c98 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {fp, lr} │ │ stmdb sp!, {r0, r2, r3, ip, sp, pc} │ │ - b.n c6b3e │ │ + b.n c6b4e │ │ movs r2, r0 │ │ and.w r0, r0, r0, lsr #32 │ │ - b.n c6326 │ │ + b.n c6336 │ │ movs r0, r0 │ │ - b.n c6eaa │ │ + b.n c6eba │ │ ldrh r0, [r0, #0] │ │ lsrs r5, r7, #2 │ │ movs r2, #56 @ 0x38 │ │ - b.n c6332 │ │ + b.n c6342 │ │ stmia r2!, {r6} │ │ - b.n c6336 │ │ + b.n c6346 │ │ movs r0, #162 @ 0xa2 │ │ - b.n c6b5a │ │ + b.n c6b6a │ │ movs r2, #56 @ 0x38 │ │ - b.n c631e │ │ + b.n c632e │ │ movs r0, #4 │ │ - b.n c635a │ │ + b.n c636a │ │ movs r0, r0 │ │ - b.n c6eca │ │ + b.n c6eda │ │ @ instruction: 0xfff50aff │ │ movs r0, #28 │ │ - b.n c6d46 │ │ + b.n c6d56 │ │ adds r0, #1 │ │ - b.n c6f72 │ │ - b.n c684c │ │ - b.n c615a │ │ + b.n c6f82 │ │ + b.n c685c │ │ + b.n c616a │ │ adds r0, #1 │ │ - b.n c6d40 │ │ + b.n c6d50 │ │ asrs r4, r0, #32 │ │ - b.n c627a │ │ + b.n c628a │ │ asrs r1, r4, #2 │ │ - b.n c6b82 │ │ + b.n c6b92 │ │ asrs r4, r0, #32 │ │ - b.n c6262 │ │ + b.n c6272 │ │ asrs r4, r0, #32 │ │ - b.n c6382 │ │ + b.n c6392 │ │ movs r1, r0 │ │ - b.n c6af4 │ │ + b.n c6b04 │ │ @ instruction: 0xfff79aff │ │ @ instruction: 0xffeaeaff │ │ - ldr r7, [pc, #960] @ (c6c18 ) │ │ + ldr r7, [pc, #960] @ (c6c28 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n c6d78 │ │ - beq.n c6938 │ │ - b.n c6cfc │ │ - blt.n c6868 │ │ - b.n c6d00 │ │ + b.n c6d88 │ │ + beq.n c6948 │ │ + b.n c6d0c │ │ + blt.n c6878 │ │ + b.n c6d10 │ │ stmia r0!, {} │ │ - b.n c6baa │ │ + b.n c6bba │ │ lsls r0, r0, #9 │ │ - b.n c638e │ │ + b.n c639e │ │ asrs r0, r4, #32 │ │ - b.n c638c │ │ + b.n c639c │ │ subs r5, r4, #0 │ │ - b.n c6d8e │ │ + b.n c6d9e │ │ movs r0, r0 │ │ - b.n c6f1a │ │ + b.n c6f2a │ │ asrs r4, r0, #1 │ │ - b.n c6398 │ │ + b.n c63a8 │ │ asrs r0, r1, #32 │ │ asrs r0, r0, #10 │ │ negs r4, r1 │ │ - b.n c63be │ │ + b.n c63ce │ │ adds r0, #16 │ │ - b.n c63a4 │ │ + b.n c63b4 │ │ str r0, [sp, #0] │ │ - b.n c63b0 │ │ + b.n c63c0 │ │ movs r0, #20 │ │ - b.n c63ac │ │ + b.n c63bc │ │ movs r4, r0 │ │ - b.n c6b48 │ │ + b.n c6b58 │ │ lsls r3, r6, #10 │ │ ldr r2, [sp, #0] │ │ - add r0, pc, #256 @ (adr r0, c699c ) │ │ - b.n c63d6 │ │ + add r0, pc, #256 @ (adr r0, c69ac ) │ │ + b.n c63e6 │ │ movs r0, r0 │ │ - b.n c6f42 │ │ + b.n c6f52 │ │ movs r4, r0 │ │ asrs r0, r2, #22 │ │ strh r1, [r0, #0] │ │ - b.n c6fea │ │ + b.n c6ffa │ │ str r1, [r0, r0] │ │ - b.n c6fee │ │ + b.n c6ffe │ │ stmia r0!, {r3, r4, r5} │ │ - b.n c63cc │ │ + b.n c63dc │ │ str r2, [r1, #12] │ │ - b.n c646a │ │ + b.n c647a │ │ strh r4, [r0, #0] │ │ asrs r0, r0, #1 │ │ movs r0, r0 │ │ - b.n c6f6a │ │ + b.n c6f7a │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ movs r6, r0 │ │ - b.n c69d6 │ │ + b.n c69e6 │ │ asrs r6, r0, #32 │ │ - b.n c6c0a │ │ + b.n c6c1a │ │ movs r1, r0 │ │ - b.n c6d4e │ │ + b.n c6d5e │ │ subs r4, #135 @ 0x87 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n c6c16 │ │ + b.n c6c26 │ │ strb r1, [r1, #3] │ │ - b.n c648e │ │ + b.n c649e │ │ movs r0, r0 │ │ - b.n c6f8c │ │ + b.n c6f9c │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r1 │ │ - b.n c6c26 │ │ + b.n c6c36 │ │ asrs r7, r0, #32 │ │ - b.n c6c2a │ │ + b.n c6c3a │ │ subs r4, #128 @ 0x80 │ │ add.w r0, r0, r0 │ │ and.w r0, r0, r0 │ │ - b.n c7036 │ │ + b.n c7046 │ │ asrs r4, r2, #32 │ │ - b.n c6434 │ │ + b.n c6444 │ │ movs r0, r0 │ │ - b.n c698e │ │ + b.n c699e │ │ str r0, [sp, #16] │ │ - b.n c6994 │ │ + b.n c69a4 │ │ movs r1, r0 │ │ - b.n c6ba6 │ │ + b.n c6bb6 │ │ asrs r0, r0, #32 │ │ - cbz r0, c6932 │ │ + cbz r0, c6942 │ │ movs r5, r0 │ │ - b.n c6bb0 │ │ + b.n c6bc0 │ │ asrs r5, r0, #32 │ │ - bne.n c6852 │ │ + bne.n c6862 │ │ movs r0, r0 │ │ - b.n c6fc2 │ │ + b.n c6fd2 │ │ asrs r4, r2, #32 │ │ - b.n c6434 │ │ + b.n c6444 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ movs r6, r0 │ │ - b.n c6a34 │ │ + b.n c6a44 │ │ asrs r6, r0, #32 │ │ - b.n c6c66 │ │ + b.n c6c76 │ │ movs r1, r0 │ │ - b.n c6daa │ │ + b.n c6dba │ │ subs r4, #112 @ 0x70 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n c6c72 │ │ + b.n c6c82 │ │ movs r0, r0 │ │ and.w r0, r0, r1, lsl #20 │ │ - b.n c707a │ │ + b.n c708a │ │ movs r0, r0 │ │ - b.n c6fec │ │ + b.n c6ffc │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ movs r1, r1 │ │ - b.n c6c86 │ │ + b.n c6c96 │ │ asrs r7, r0, #32 │ │ - b.n c6c8a │ │ + b.n c6c9a │ │ subs r4, #104 @ 0x68 │ │ add.w r0, r0, r0 │ │ and.w r0, r0, r0 │ │ - b.n c7096 │ │ + b.n c70a6 │ │ str r0, [r2, #0] │ │ - b.n c6494 │ │ + b.n c64a4 │ │ movs r0, r0 │ │ - b.n c69f0 │ │ + b.n c6a00 │ │ stmia r0!, {r3, r4, r5} │ │ - b.n c649c │ │ + b.n c64ac │ │ movs r6, r0 │ │ - b.n c6c06 │ │ + b.n c6c16 │ │ str r0, [r0, #0] │ │ - cbz r0, c6992 │ │ + cbz r0, c69a2 │ │ movs r4, r2 │ │ - b.n c64a8 │ │ + b.n c64b8 │ │ movs r5, r0 │ │ - b.n c6c1e │ │ + b.n c6c2e │ │ str r5, [r0, #0] │ │ - bne.n c68b6 │ │ + bne.n c68c6 │ │ movs r6, r0 │ │ - b.n c6c1a │ │ + b.n c6c2a │ │ str r0, [r2, #0] │ │ - b.n c6498 │ │ + b.n c64a8 │ │ str r0, [r0, #0] │ │ strh r0, [r4, #12] │ │ movs r0, r0 │ │ - b.n c7032 │ │ + b.n c7042 │ │ lsls r7, r6, #9 │ │ lsrs r0, r0, #8 │ │ lsrs r4, r3, #13 │ │ - b.n c64cc │ │ + b.n c64dc │ │ asrs r6, r0, #32 │ │ - b.n c654a │ │ + b.n c655a │ │ movs r0, r0 │ │ - b.n c6ab4 │ │ + b.n c6ac4 │ │ movs r0, r1 │ │ - b.n c6fbc │ │ + b.n c6fcc │ │ lsls r2, r3, #1 │ │ - b.n c653e │ │ + b.n c654e │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ movs r3, r0 │ │ - b.n c7046 │ │ + b.n c7056 │ │ lsls r7, r7, #9 │ │ cmp r2, #0 │ │ strb r4, [r1, #0] │ │ - b.n c6cee │ │ + b.n c6cfe │ │ lsls r4, r2, #9 │ │ - b.n c6520 │ │ + b.n c6530 │ │ movs r0, r0 │ │ - b.n c7056 │ │ + b.n c7066 │ │ movs r6, r4 │ │ lsrs r0, r0, #8 │ │ movs r4, r1 │ │ - b.n c6cfe │ │ + b.n c6d0e │ │ ands r4, r1 │ │ - b.n c6d02 │ │ - bvc.n c6956 │ │ + b.n c6d12 │ │ + bvc.n c6966 │ │ @ instruction: 0xebff0007 │ │ - b.n c6d0a │ │ + b.n c6d1a │ │ asrs r6, r0, #32 │ │ - b.n c6d0e │ │ - b.n c6f42 │ │ + b.n c6d1e │ │ + b.n c6f52 │ │ @ instruction: 0xebff0028 │ │ and.w r0, r0, r3 │ │ - b.n c707a │ │ + b.n c708a │ │ lsls r2, r0, #10 │ │ cmp r2, #0 │ │ asrs r4, r3, #1 │ │ - b.n c6596 │ │ + b.n c65a6 │ │ movs r0, #40 @ 0x28 │ │ - b.n c651e │ │ + b.n c652e │ │ lsrs r0, r2, #12 │ │ - b.n c6528 │ │ + b.n c6538 │ │ movs r0, r0 │ │ - b.n c6b0c │ │ + b.n c6b1c │ │ adds r0, #80 @ 0x50 │ │ - b.n c6512 │ │ + b.n c6522 │ │ movs r0, r2 │ │ - b.n c652a │ │ + b.n c653a │ │ asrs r2, r2, #4 │ │ - b.n c6b00 │ │ + b.n c6b10 │ │ movs r0, #0 │ │ - b.n c6ec4 │ │ + b.n c6ed4 │ │ asrs r1, r0, #32 │ │ - b.n c6e84 │ │ + b.n c6e94 │ │ asrs r2, r0, #32 │ │ - b.n c6a08 │ │ + b.n c6a18 │ │ movs r0, #1 │ │ - b.n c714a │ │ - ldr r0, [pc, #320] @ (c6b4c ) │ │ + b.n c715a │ │ + ldr r0, [pc, #320] @ (c6b5c ) │ │ add.w r0, r0, r0 │ │ - b.n c70b2 │ │ + b.n c70c2 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ @ instruction: 0x478d │ │ add.w r0, r0, r0 │ │ - b.n c653e │ │ + b.n c654e │ │ movs r0, r0 │ │ - b.n c70c2 │ │ + b.n c70d2 │ │ lsls r4, r5, #10 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #1 │ │ - b.n c655e │ │ + b.n c656e │ │ strb r4, [r0, #1] │ │ - b.n c6568 │ │ + b.n c6578 │ │ lsrs r6, r2, #29 │ │ - b.n c6f32 │ │ + b.n c6f42 │ │ asrs r0, r0, #32 │ │ - b.n c6564 │ │ + b.n c6574 │ │ movs r0, #208 @ 0xd0 │ │ - b.n c6dba │ │ + b.n c6dca │ │ ands r1, r0 │ │ - b.n c6b62 │ │ + b.n c6b72 │ │ str r0, [r0, r0] │ │ - b.n c6f88 │ │ + b.n c6f98 │ │ lsrs r0, r6 │ │ - b.n c6dc6 │ │ + b.n c6dd6 │ │ movs r0, r0 │ │ - b.n c718a │ │ + b.n c719a │ │ movs r0, r0 │ │ - b.n c655c │ │ + b.n c656c │ │ stmia r0!, {r3, r4, r5} │ │ - b.n c658c │ │ + b.n c659c │ │ lsls r4, r0, #9 │ │ and.w r0, r0, r4, lsl #5 │ │ - b.n c6594 │ │ + b.n c65a4 │ │ lsls r2, r0, #4 │ │ - b.n c721e │ │ + b.n c722e │ │ ands r4, r1 │ │ - b.n c6da2 │ │ + b.n c6db2 │ │ movs r0, r0 │ │ - b.n c6568 │ │ + b.n c6578 │ │ movs r6, r0 │ │ - b.n c6daa │ │ - bvc.n c69da │ │ + b.n c6dba │ │ + bvc.n c69ea │ │ @ instruction: 0xebff0000 │ │ - b.n c7112 │ │ + b.n c7122 │ │ movs r0, r0 │ │ - b.n c6584 │ │ + b.n c6594 │ │ lsls r6, r2, #10 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, #36] @ 0x24 │ │ - b.n c65a6 │ │ + b.n c65b6 │ │ stmia r0!, {r2} │ │ - b.n c6dc2 │ │ + b.n c6dd2 │ │ lsls r0, r2, #3 │ │ - b.n c6e12 │ │ + b.n c6e22 │ │ movs r1, r0 │ │ - b.n c6d2a │ │ + b.n c6d3a │ │ lsls r7, r5, #9 │ │ subs r0, r0, r0 │ │ lsls r0, r7, #8 │ │ - b.n c65ca │ │ + b.n c65da │ │ asrs r6, r2, #21 │ │ - b.n c70a0 │ │ + b.n c70b0 │ │ asrs r5, r2, #21 │ │ - b.n c7124 │ │ + b.n c7134 │ │ movs r1, r0 │ │ - b.n c6f9e │ │ + b.n c6fae │ │ lsls r0, r7, #8 │ │ - b.n c65ba │ │ + b.n c65ca │ │ movs r1, r0 │ │ - b.n c6d46 │ │ + b.n c6d56 │ │ lsls r4, r5, #9 │ │ cmp r2, #0 │ │ - add r0, pc, #128 @ (adr r0, c6b2c ) │ │ - b.n c65e8 │ │ + add r0, pc, #128 @ (adr r0, c6b3c ) │ │ + b.n c65f8 │ │ movs r0, r6 │ │ - b.n c6fca │ │ + b.n c6fda │ │ strb r0, [r5, #0] │ │ - b.n c65d0 │ │ + b.n c65e0 │ │ movs r0, r0 │ │ - b.n c716e │ │ + b.n c717e │ │ str r4, [r4, #0] │ │ - b.n c65d8 │ │ + b.n c65e8 │ │ movs r4, r5 │ │ - b.n c65dc │ │ + b.n c65ec │ │ lsls r1, r0, #1 │ │ lsrs r0, r0, #8 │ │ str r0, [sp, #20] │ │ - b.n c667e │ │ + b.n c668e │ │ movs r0, r1 │ │ - b.n c6fce │ │ + b.n c6fde │ │ lsls r0, r0, #1 │ │ - b.n c65ec │ │ + b.n c65fc │ │ movs r0, r0 │ │ - b.n c7216 │ │ + b.n c7226 │ │ movs r4, r6 │ │ - b.n c65f4 │ │ + b.n c6604 │ │ lsls r1, r7, #1 │ │ - b.n c683c │ │ + b.n c684c │ │ movs r0, r0 │ │ - b.n c7182 │ │ + b.n c7192 │ │ movs r3, r7 │ │ - ldr r2, [pc, #0] @ (c6ae4 ) │ │ + ldr r2, [pc, #0] @ (c6af4 ) │ │ lsls r0, r0, #1 │ │ - b.n c6624 │ │ + b.n c6634 │ │ strb r0, [r0, #0] │ │ - b.n c660e │ │ + b.n c661e │ │ str r4, [r0, #0] │ │ - b.n c6612 │ │ + b.n c6622 │ │ movs r7, r0 │ │ - b.n c7236 │ │ + b.n c7246 │ │ strb r4, [r0, #1] │ │ - b.n c6614 │ │ + b.n c6624 │ │ ands r0, r0 │ │ - b.n c6e3e │ │ + b.n c6e4e │ │ lsls r0, r0, #4 │ │ - b.n c6a36 │ │ + b.n c6a46 │ │ asrs r0, r0, #32 │ │ - b.n c6626 │ │ + b.n c6636 │ │ movs r0, #4 │ │ - b.n c662a │ │ + b.n c663a │ │ asrs r7, r0, #32 │ │ - b.n c6b50 │ │ + b.n c6b60 │ │ movs r0, #6 │ │ - b.n c6b56 │ │ + b.n c6b66 │ │ asrs r2, r0, #32 │ │ - b.n c6e38 │ │ + b.n c6e48 │ │ movs r3, r3 │ │ subs r0, r0, r0 │ │ strb r6, [r0, #0] │ │ - b.n c6e5e │ │ + b.n c6e6e │ │ str r0, [r2, #0] │ │ - b.n c6642 │ │ + b.n c6652 │ │ strh r0, [r0, r1] │ │ - b.n c665e │ │ + b.n c666e │ │ strh r4, [r1, #0] │ │ - b.n c6e6a │ │ + b.n c6e7a │ │ asrs r6, r0, #32 │ │ - b.n c6e6e │ │ + b.n c6e7e │ │ movs r5, r0 │ │ - b.n c6e72 │ │ + b.n c6e82 │ │ pop {r0, r4, r5, r7, pc} │ │ @ instruction: 0xebff0080 │ │ - b.n c6c3a │ │ + b.n c6c4a │ │ lsls r0, r0, #4 │ │ - b.n c6c48 │ │ + b.n c6c58 │ │ asrs r4, r2, #32 │ │ - b.n c6662 │ │ + b.n c6672 │ │ movs r6, r0 │ │ - b.n c6de8 │ │ + b.n c6df8 │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n c704e │ │ + b.n c705e │ │ asrs r0, r7, #8 │ │ - b.n c6682 │ │ + b.n c6692 │ │ stmia r0!, {r3} │ │ - b.n c6e96 │ │ + b.n c6ea6 │ │ movs r0, r0 │ │ - b.n c667a │ │ + b.n c668a │ │ movs r0, #4 │ │ - b.n c657e │ │ + b.n c658e │ │ movs r2, r0 │ │ - b.n c6e04 │ │ + b.n c6e14 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #32 │ │ - b.n c656a │ │ + b.n c657a │ │ str r0, [sp, #20] │ │ - b.n c6722 │ │ + b.n c6732 │ │ movs r4, r6 │ │ - b.n c66ac │ │ + b.n c66bc │ │ movs r1, r0 │ │ - b.n c7076 │ │ + b.n c7086 │ │ movs r4, r6 │ │ - b.n c6694 │ │ + b.n c66a4 │ │ movs r0, r0 │ │ @ instruction: 0xea00c008 │ │ - b.n c6ec2 │ │ + b.n c6ed2 │ │ str r7, [r0, #0] │ │ - b.n c6ec6 │ │ + b.n c6ed6 │ │ strb r4, [r0, #1] │ │ - b.n c66c4 │ │ + b.n c66d4 │ │ movs r1, r0 │ │ - b.n c7096 │ │ + b.n c70a6 │ │ movs r0, #7 │ │ - b.n c701a │ │ + b.n c702a │ │ asrs r1, r7, #1 │ │ - b.n c68f4 │ │ + b.n c6904 │ │ movs r1, r0 │ │ - b.n c6e3e │ │ + b.n c6e4e │ │ @ instruction: 0xffd6baff │ │ - add r0, pc, #96 @ (adr r0, c6c00 ) │ │ - b.n c66d6 │ │ + add r0, pc, #96 @ (adr r0, c6c10 ) │ │ + b.n c66e6 │ │ str r4, [r4, #0] │ │ - b.n c66e0 │ │ + b.n c66f0 │ │ movs r0, r0 │ │ - b.n c725e │ │ + b.n c726e │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ str r0, [sp, #852] @ 0x354 │ │ - b.n c6f66 │ │ + b.n c6f76 │ │ movs r0, r0 │ │ - b.n c7268 │ │ + b.n c7278 │ │ movs r6, r0 │ │ - ldr r2, [pc, #0] @ (c6bb8 ) │ │ + ldr r2, [pc, #0] @ (c6bc8 ) │ │ movs r4, r3 │ │ - b.n c66f2 │ │ + b.n c6702 │ │ lsls r2, r7, #2 │ │ - b.n c6f62 │ │ + b.n c6f72 │ │ lsls r0, r0, #1 │ │ - b.n c71e6 │ │ + b.n c71f6 │ │ @ instruction: 0xffc30aff │ │ movs r1, r0 │ │ and.w r0, r0, r0 │ │ - b.n c7312 │ │ + b.n c7322 │ │ movs r4, r6 │ │ - b.n c66f0 │ │ + b.n c6700 │ │ movs r0, r1 │ │ - b.n c6712 │ │ + b.n c6722 │ │ movs r0, r0 │ │ - b.n c727e │ │ + b.n c728e │ │ lsls r4, r7, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, #72 @ 0x48 │ │ - b.n c671e │ │ + b.n c672e │ │ adds r0, #0 │ │ - b.n c732a │ │ + b.n c733a │ │ asrs r4, r5, #32 │ │ - b.n c6728 │ │ + b.n c6738 │ │ movs r0, #12 │ │ - b.n c670c │ │ + b.n c671c │ │ strb r0, [r0, #0] │ │ - b.n c671a │ │ + b.n c672a │ │ asrs r0, r1, #32 │ │ - b.n c70fc │ │ + b.n c710c │ │ asrs r4, r7, #32 │ │ - b.n c6718 │ │ + b.n c6728 │ │ movs r1, r0 │ │ - b.n c7230 │ │ + b.n c7240 │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n c72b8 │ │ + b.n c72c8 │ │ lsls r7, r4, #1 │ │ lsrs r0, r0, #8 │ │ subs r7, r6, #4 │ │ - b.n c6a10 │ │ + b.n c6a20 │ │ subs r1, r2, #4 │ │ - b.n c6ef4 │ │ + b.n c6f04 │ │ strb r7, [r6, #4] │ │ - b.n c6f5a │ │ + b.n c6f6a │ │ asrs r1, r0, #32 │ │ - b.n c6d24 │ │ + b.n c6d34 │ │ adds r0, #1 │ │ - b.n c70a4 │ │ + b.n c70b4 │ │ lsls r0, r5, #1 │ │ and.w r0, r0, ip, lsl #5 │ │ - b.n c6762 │ │ + b.n c6772 │ │ strb r7, [r4, #2] │ │ - b.n c6f6e │ │ + b.n c6f7e │ │ asrs r3, r0, #32 │ │ - b.n c6bd4 │ │ + b.n c6be4 │ │ asrs r1, r2, #32 │ │ - b.n c7038 │ │ + b.n c7048 │ │ movs r1, r2 │ │ - b.n c72dc │ │ + b.n c72ec │ │ lsls r2, r4, #1 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #1 │ │ - b.n c677a │ │ + b.n c678a │ │ movs r0, #131 @ 0x83 │ │ - b.n c6d4c │ │ + b.n c6d5c │ │ asrs r2, r0, #8 │ │ - b.n c6d4c │ │ + b.n c6d5c │ │ asrs r0, r1, #32 │ │ - b.n c6770 │ │ + b.n c6780 │ │ movs r1, r0 │ │ - b.n c7334 │ │ + b.n c7344 │ │ lsls r4, r3, #1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r2, #1 │ │ - b.n c6792 │ │ - add r1, pc, #12 @ (adr r1, c6c68 ) │ │ - b.n c6b80 │ │ + b.n c67a2 │ │ + add r1, pc, #12 @ (adr r1, c6c78 ) │ │ + b.n c6b90 │ │ movs r0, r0 │ │ - b.n c7316 │ │ + b.n c7326 │ │ lsls r0, r3, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, r4 │ │ - b.n c67a4 │ │ + b.n c67b4 │ │ adds r0, #28 │ │ - b.n c6788 │ │ + b.n c6798 │ │ strb r0, [r3, #0] │ │ - b.n c678c │ │ + b.n c679c │ │ movs r0, r0 │ │ - b.n c6f2a │ │ + b.n c6f3a │ │ lsls r7, r0, #1 │ │ lsrs r0, r0, #8 │ │ ands r5, r0 │ │ - b.n c6832 │ │ + b.n c6842 │ │ movs r0, r0 │ │ - b.n c73c2 │ │ + b.n c73d2 │ │ strb r2, [r1, #0] │ │ - b.n c6fc6 │ │ + b.n c6fd6 │ │ lsls r0, r0, #1 │ │ - b.n c67a4 │ │ - add r0, pc, #192 @ (adr r0, c6d4c ) │ │ - b.n c67a8 │ │ + b.n c67b4 │ │ + add r0, pc, #192 @ (adr r0, c6d5c ) │ │ + b.n c67b8 │ │ lsls r4, r6, #1 │ │ - b.n c69f0 │ │ + b.n c6a00 │ │ movs r0, r0 │ │ - b.n c7336 │ │ + b.n c7346 │ │ movs r6, r6 │ │ - ldr r2, [pc, #0] @ (c6c98 ) │ │ + ldr r2, [pc, #0] @ (c6ca8 ) │ │ movs r4, r7 │ │ - b.n c67d8 │ │ + b.n c67e8 │ │ lsls r0, r0, #17 │ │ ldmia.w r0, {r0, r1, r2} │ │ - b.n c73e6 │ │ - add r0, pc, #272 @ (adr r0, c6db8 ) │ │ - b.n c67c4 │ │ + b.n c73f6 │ │ + add r0, pc, #272 @ (adr r0, c6dc8 ) │ │ + b.n c67d4 │ │ str r0, [sp, #0] │ │ - b.n c6fee │ │ + b.n c6ffe │ │ lsls r0, r0, #4 │ │ - b.n c6be0 │ │ + b.n c6bf0 │ │ asrs r0, r0, #32 │ │ - b.n c67d6 │ │ + b.n c67e6 │ │ movs r0, #4 │ │ - b.n c67da │ │ + b.n c67ea │ │ asrs r6, r0, #32 │ │ - b.n c6d00 │ │ + b.n c6d10 │ │ movs r0, #10 │ │ - b.n c6d06 │ │ + b.n c6d16 │ │ asrs r2, r0, #32 │ │ - b.n c6fe8 │ │ + b.n c6ff8 │ │ movs r3, r3 │ │ subs r0, r0, r0 │ │ - add r0, pc, #24 @ (adr r0, c6ce4 ) │ │ - b.n c700e │ │ + add r0, pc, #24 @ (adr r0, c6cf4 ) │ │ + b.n c701e │ │ str r0, [r2, #0] │ │ - b.n c67f2 │ │ + b.n c6802 │ │ strh r0, [r0, r1] │ │ - b.n c680e │ │ + b.n c681e │ │ strh r4, [r1, #0] │ │ - b.n c701a │ │ + b.n c702a │ │ asrs r6, r0, #32 │ │ - b.n c701e │ │ + b.n c702e │ │ movs r5, r0 │ │ - b.n c7022 │ │ + b.n c7032 │ │ pop {r0, r2, r6, pc} │ │ @ instruction: 0xebff0080 │ │ - b.n c6dea │ │ + b.n c6dfa │ │ lsls r0, r0, #4 │ │ - b.n c6df8 │ │ + b.n c6e08 │ │ asrs r4, r2, #32 │ │ - b.n c6812 │ │ + b.n c6822 │ │ movs r6, r0 │ │ - b.n c6f98 │ │ + b.n c6fa8 │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n c71fe │ │ + b.n c720e │ │ asrs r0, r7, #8 │ │ - b.n c6832 │ │ + b.n c6842 │ │ stmia r0!, {r3} │ │ - b.n c7046 │ │ + b.n c7056 │ │ movs r0, r0 │ │ - b.n c682a │ │ + b.n c683a │ │ movs r0, #4 │ │ - b.n c672e │ │ + b.n c673e │ │ movs r2, r0 │ │ - b.n c6fb4 │ │ + b.n c6fc4 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #32 │ │ - b.n c671a │ │ + b.n c672a │ │ ands r5, r0 │ │ - b.n c68cc │ │ + b.n c68dc │ │ lsls r0, r0, #1 │ │ - b.n c685c │ │ + b.n c686c │ │ movs r1, r0 │ │ - b.n c7226 │ │ + b.n c7236 │ │ lsls r0, r0, #1 │ │ - b.n c6844 │ │ + b.n c6854 │ │ movs r0, r0 │ │ @ instruction: 0xea00c008 │ │ - b.n c7072 │ │ + b.n c7082 │ │ str r2, [r1, #0] │ │ - b.n c7076 │ │ - add r0, pc, #272 @ (adr r0, c6e48 ) │ │ - b.n c6874 │ │ + b.n c7086 │ │ + add r0, pc, #272 @ (adr r0, c6e58 ) │ │ + b.n c6884 │ │ movs r1, r0 │ │ - b.n c7250 │ │ + b.n c7260 │ │ movs r0, #7 │ │ - b.n c71d4 │ │ + b.n c71e4 │ │ asrs r4, r6, #1 │ │ - b.n c6aa4 │ │ + b.n c6ab4 │ │ movs r1, r0 │ │ - b.n c6fee │ │ + b.n c6ffe │ │ @ instruction: 0xffd6baff │ │ strb r0, [r3, #0] │ │ - b.n c6880 │ │ + b.n c6890 │ │ movs r0, r0 │ │ - b.n c7404 │ │ + b.n c7414 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ lsrs r5, r2 │ │ - b.n c710c │ │ + b.n c711c │ │ movs r0, r0 │ │ - b.n c740a │ │ + b.n c741a │ │ movs r3, r0 │ │ - ldr r2, [pc, #0] @ (c6d64 ) │ │ + ldr r2, [pc, #0] @ (c6d74 ) │ │ movs r4, r3 │ │ - b.n c6898 │ │ + b.n c68a8 │ │ lsls r2, r7, #2 │ │ - b.n c710e │ │ + b.n c711e │ │ lsls r0, r0, #1 │ │ - b.n c7392 │ │ + b.n c73a2 │ │ @ instruction: 0xffc50aff │ │ movs r4, r6 │ │ - b.n c68b4 │ │ + b.n c68c4 │ │ asrs r0, r0, #1 │ │ - b.n c68b8 │ │ + b.n c68c8 │ │ str r4, [r4, #0] │ │ - b.n c68bc │ │ + b.n c68cc │ │ movs r0, r0 │ │ - b.n c6e88 │ │ + b.n c6e98 │ │ movs r4, r6 │ │ - b.n c68a4 │ │ + b.n c68b4 │ │ movs r0, r4 │ │ - b.n c68c8 │ │ + b.n c68d8 │ │ adds r0, #28 │ │ - b.n c68cc │ │ + b.n c68dc │ │ strb r0, [r3, #0] │ │ - b.n c68d0 │ │ - add r0, pc, #192 @ (adr r0, c6e58 ) │ │ - b.n c68d4 │ │ - add r0, pc, #688 @ (adr r0, c704c ) │ │ - b.n c68d2 │ │ + b.n c68e0 │ │ + add r0, pc, #192 @ (adr r0, c6e68 ) │ │ + b.n c68e4 │ │ + add r0, pc, #688 @ (adr r0, c705c ) │ │ + b.n c68e2 │ │ movs r0, r0 │ │ - b.n c7456 │ │ + b.n c7466 │ │ @ instruction: 0xffb21aff │ │ movs r0, r1 │ │ - b.n c68e2 │ │ + b.n c68f2 │ │ movs r6, r0 │ │ and.w r0, r0, r1, lsl #4 │ │ - b.n c7238 │ │ + b.n c7248 │ │ movs r0, #12 │ │ - b.n c68f0 │ │ + b.n c6900 │ │ adds r0, #31 │ │ - b.n c74bc │ │ + b.n c74cc │ │ asrs r1, r0, #32 │ │ - b.n c72c4 │ │ + b.n c72d4 │ │ strb r1, [r4, #6] │ │ - b.n c6ce6 │ │ + b.n c6cf6 │ │ movs r0, r0 │ │ - b.n c7474 │ │ + b.n c7484 │ │ adds r0, #32 │ │ lsls r3, r0, #10 │ │ adds r0, #1 │ │ - b.n c72d4 │ │ + b.n c72e4 │ │ movs r0, r0 │ │ - b.n c7078 │ │ + b.n c7088 │ │ @ instruction: 0xff893aff │ │ lsls r4, r1, #9 │ │ - b.n c6912 │ │ + b.n c6922 │ │ movs r0, #52 @ 0x34 │ │ - b.n c6918 │ │ + b.n c6928 │ │ asrs r4, r0, #32 │ │ - b.n c690e │ │ + b.n c691e │ │ movs r2, r0 │ │ - b.n c6ee6 │ │ + b.n c6ef6 │ │ movs r1, r0 │ │ - b.n c708a │ │ + b.n c709a │ │ lsls r2, r4, #4 │ │ cmp r2, #0 │ │ - add r0, pc, #4 @ (adr r0, c6df4 ) │ │ - b.n c72f4 │ │ + add r0, pc, #4 @ (adr r0, c6e04 ) │ │ + b.n c7304 │ │ movs r2, #64 @ 0x40 │ │ - b.n c692e │ │ + b.n c693e │ │ movs r2, r0 │ │ - b.n c74ae │ │ + b.n c74be │ │ lsls r0, r7, #8 │ │ - b.n c6936 │ │ + b.n c6946 │ │ asrs r2, r1, #32 │ │ - b.n c7142 │ │ + b.n c7152 │ │ movs r0, #28 │ │ - b.n c730a │ │ + b.n c731a │ │ asrs r2, r0, #32 │ │ str r3, [sp, #640] @ 0x280 │ │ ands r0, r0 │ │ - b.n c754e │ │ + b.n c755e │ │ asrs r1, r0, #32 │ │ - b.n c7294 │ │ + b.n c72a4 │ │ adds r0, #12 │ │ - b.n c673a │ │ + b.n c674a │ │ adds r0, #4 │ │ - b.n c6840 │ │ + b.n c6850 │ │ adds r0, #3 │ │ - b.n c6e9e │ │ + b.n c6eae │ │ movs r3, r0 │ │ - b.n c70ca │ │ + b.n c70da │ │ ands r3, r0 │ │ str r1, [sp, #640] @ 0x280 │ │ asrs r1, r0, #32 │ │ - b.n c72cc │ │ + b.n c72dc │ │ @ instruction: 0xfff81aff │ │ ldrh r2, [r0, #50] @ 0x32 │ │ - b.n c72c8 │ │ + b.n c72d8 │ │ subs r1, r0, r4 │ │ - b.n c7576 │ │ + b.n c7586 │ │ movs r0, r1 │ │ - b.n c717a │ │ - subs r0, #211 @ 0xd3 │ │ + b.n c718a │ │ + subs r0, #243 @ 0xf3 │ │ @ instruction: 0xfb009068 │ │ - b.n c735c │ │ + b.n c736c │ │ subs r1, r0, r4 │ │ - b.n c7586 │ │ + b.n c7596 │ │ movs r1, r1 │ │ - b.n c718a │ │ - subs r0, #207 @ 0xcf │ │ + b.n c719a │ │ + subs r0, #239 @ 0xef │ │ mla r0, r0, r1, r1 │ │ - b.n c735a │ │ + b.n c736a │ │ lsls r7, r7, #19 │ │ - b.n c7596 │ │ + b.n c75a6 │ │ subs r3, #37 @ 0x25 │ │ @ instruction: 0xeb00c038 │ │ - b.n c6998 │ │ + b.n c69a8 │ │ movs r2, r0 │ │ - b.n c7516 │ │ - add r0, pc, #8 @ (adr r0, c6e6c ) │ │ + b.n c7526 │ │ + add r0, pc, #8 @ (adr r0, c6e7c ) │ │ str r3, [sp, #640] @ 0x280 │ │ str r1, [r0, #0] │ │ - b.n c75aa │ │ + b.n c75ba │ │ ands r0, r0 │ │ - b.n c75ae │ │ + b.n c75be │ │ str r4, [r4, r0] │ │ - b.n c75b2 │ │ + b.n c75c2 │ │ strb r0, [r0, #0] │ │ - b.n c75b6 │ │ + b.n c75c6 │ │ movs r4, r6 │ │ - b.n c6994 │ │ + b.n c69a4 │ │ movs r0, #52 @ 0x34 │ │ - b.n c69b8 │ │ + b.n c69c8 │ │ movs r4, r1 │ │ - b.n c71c2 │ │ + b.n c71d2 │ │ asrs r6, r0, #32 │ │ - b.n c71c6 │ │ + b.n c71d6 │ │ lsls r7, r4, #6 │ │ add.w r0, r0, pc, ror #3 │ │ - b.n c752e │ │ + b.n c753e │ │ movs r1, r1 │ │ ldrh r0, [r0, #16] │ │ asrs r4, r4, #32 │ │ - b.n c69d0 │ │ + b.n c69e0 │ │ ands r1, r0 │ │ - b.n c73a2 │ │ + b.n c73b2 │ │ movs r1, #0 │ │ - b.n c6dce │ │ + b.n c6dde │ │ adds r1, #0 │ │ - b.n c6dd4 │ │ + b.n c6de4 │ │ asrs r5, r0, #32 │ │ - b.n c6dc8 │ │ + b.n c6dd8 │ │ movs r0, #1 │ │ - b.n c73ae │ │ + b.n c73be │ │ movs r1, #0 │ │ - b.n c6dbe │ │ + b.n c6dce │ │ strb r7, [r0, #0] │ │ - b.n c6fb4 │ │ + b.n c6fc4 │ │ movs r0, #1 │ │ - b.n c6fbc │ │ + b.n c6fcc │ │ movs r1, #0 │ │ - b.n c6dcc │ │ + b.n c6ddc │ │ stmia r0!, {r3, r4, r5} │ │ - b.n c69f8 │ │ + b.n c6a08 │ │ str r1, [r0, #0] │ │ - b.n c73ce │ │ + b.n c73de │ │ str r4, [r1, r0] │ │ - b.n c73d0 │ │ + b.n c73e0 │ │ movs r6, r0 │ │ - b.n c717e │ │ + b.n c718e │ │ @ instruction: 0xffea1aff │ │ movs r0, r0 │ │ - b.n c757a │ │ + b.n c758a │ │ lsls r4, r4, #4 │ │ lsrs r0, r0, #8 │ │ adds r0, #20 │ │ - b.n c6a14 │ │ + b.n c6a24 │ │ str r1, [r0, #0] │ │ - b.n c761e │ │ + b.n c762e │ │ movs r0, #16 │ │ - b.n c6a1c │ │ + b.n c6a2c │ │ ldrb r1, [r0, r0] │ │ - b.n c7626 │ │ + b.n c7636 │ │ lsls r0, r5, #1 │ │ - b.n c6a24 │ │ + b.n c6a34 │ │ adds r0, #3 │ │ - b.n c6ff6 │ │ + b.n c7006 │ │ asrs r0, r4, #16 │ │ - b.n c6928 │ │ - b.n c6ef8 │ │ - b.n c7004 │ │ - add r0, pc, #144 @ (adr r0, c6f88 ) │ │ - b.n c6a34 │ │ + b.n c6938 │ │ + b.n c6f08 │ │ + b.n c7014 │ │ + add r0, pc, #144 @ (adr r0, c6f98 ) │ │ + b.n c6a44 │ │ strb r0, [r0, #0] │ │ - b.n c763e │ │ + b.n c764e │ │ strb r0, [r6, #0] │ │ - b.n c6a1c │ │ + b.n c6a2c │ │ strb r0, [r0, #2] │ │ - b.n c7646 │ │ + b.n c7656 │ │ ands r4, r2 │ │ - b.n c6a44 │ │ + b.n c6a54 │ │ movs r4, r0 │ │ - b.n c71b0 │ │ + b.n c71c0 │ │ ands r0, r2 │ │ movs r5, #157 @ 0x9d │ │ movs r4, r0 │ │ movs r1, #80 @ 0x50 │ │ movs r2, r0 │ │ cmp r2, #0 │ │ lsls r5, r4 │ │ - b.n c702a │ │ + b.n c703a │ │ str r0, [r6, #0] │ │ - b.n c6a3c │ │ + b.n c6a4c │ │ movs r7, r0 │ │ and.w r0, r0, r1, lsl #2 │ │ - b.n c71d0 │ │ + b.n c71e0 │ │ movs r4, r0 │ │ ldrh r0, [r0, #16] │ │ lsls r0, r0 │ │ - b.n c7272 │ │ + b.n c7282 │ │ movs r6, r1 │ │ - b.n c71de │ │ + b.n c71ee │ │ ands r6, r0 │ │ - b.n c727a │ │ + b.n c728a │ │ movs r1, r0 │ │ subs r2, #0 │ │ movs r2, r1 │ │ and.w r0, r0, r6, lsl #16 │ │ - b.n c7286 │ │ + b.n c7296 │ │ strb r6, [r0, #4] │ │ - b.n c6e7a │ │ + b.n c6e8a │ │ movs r0, #4 │ │ - b.n c728e │ │ + b.n c729e │ │ asrs r6, r0 │ │ - b.n c6e84 │ │ + b.n c6e94 │ │ str r1, [r0, #0] │ │ - b.n c7462 │ │ + b.n c7472 │ │ asrs r1, r0, #32 │ │ - b.n c7068 │ │ + b.n c7078 │ │ str r1, [r0, r0] │ │ - b.n c73e8 │ │ + b.n c73f8 │ │ movs r0, r0 │ │ - b.n c706a │ │ + b.n c707a │ │ strb r2, [r0, #0] │ │ - b.n c72a6 │ │ + b.n c72b6 │ │ lsrs r1, r0, #16 │ │ - b.n c7616 │ │ + b.n c7626 │ │ @ instruction: 0xffe51aff │ │ eors r0, r0 │ │ - b.n c6aaa │ │ + b.n c6aba │ │ movs r0, r4 │ │ - b.n c7618 │ │ + b.n c7628 │ │ asrs r0, r4, #32 │ │ str r3, [sp, #640] @ 0x280 │ │ lsrs r1, r0, #32 │ │ - b.n c7620 │ │ + b.n c7630 │ │ lsrs r2, r2, #24 │ │ - b.n c748a │ │ + b.n c749a │ │ movs r0, #0 │ │ - b.n c76c6 │ │ + b.n c76d6 │ │ adds r1, #36 @ 0x24 │ │ - b.n c6ab2 │ │ + b.n c6ac2 │ │ adds r1, r0, r0 │ │ movs r3, #160 @ 0xa0 │ │ strb r0, [r3, #0] │ │ - b.n c6aac │ │ + b.n c6abc │ │ strb r4, [r2, #0] │ │ - b.n c6abe │ │ + b.n c6ace │ │ movs r1, r0 │ │ - b.n c7240 │ │ + b.n c7250 │ │ movs r0, #100 @ 0x64 │ │ - b.n c6ab8 │ │ + b.n c6ac8 │ │ movs r0, #96 @ 0x60 │ │ - b.n c6abc │ │ + b.n c6acc │ │ eors r0, r1 │ │ - b.n c6ac0 │ │ + b.n c6ad0 │ │ lsls r4, r1, #1 │ │ - b.n c6ac4 │ │ + b.n c6ad4 │ │ strb r0, [r2, #1] │ │ - b.n c6ac8 │ │ + b.n c6ad8 │ │ lsls r1, r6, #4 │ │ subs r2, #0 │ │ movs r3, r0 │ │ - b.n c76f6 │ │ + b.n c7706 │ │ movs r1, #44 @ 0x2c │ │ - b.n c6ac2 │ │ + b.n c6ad2 │ │ lsls r4, r3, #1 │ │ - b.n c6ad8 │ │ + b.n c6ae8 │ │ lsls r2, r0, #4 │ │ - b.n c7782 │ │ + b.n c7792 │ │ adds r1, #32 │ │ - b.n c6ace │ │ + b.n c6ade │ │ lsls r0, r3, #1 │ │ - b.n c6ae4 │ │ + b.n c6af4 │ │ movs r0, #84 @ 0x54 │ │ - b.n c6ae8 │ │ + b.n c6af8 │ │ strh r4, [r6, #0] │ │ - b.n c6b0c │ │ + b.n c6b1c │ │ movs r4, r2 │ │ - b.n c74ea │ │ + b.n c74fa │ │ movs r4, r1 │ │ - b.n c6af4 │ │ + b.n c6b04 │ │ movs r0, r2 │ │ - b.n c74f2 │ │ + b.n c7502 │ │ movs r4, r7 │ │ - b.n c6afc │ │ + b.n c6b0c │ │ movs r0, r0 │ │ - b.n c7726 │ │ - add r0, pc, #0 @ (adr r0, c6fe8 ) │ │ - b.n c772a │ │ + b.n c7736 │ │ + add r0, pc, #0 @ (adr r0, c6ff8 ) │ │ + b.n c773a │ │ str r0, [r0, r0] │ │ - b.n c772e │ │ + b.n c773e │ │ strb r0, [r0, #0] │ │ - b.n c7732 │ │ + b.n c7742 │ │ str r0, [sp, #0] │ │ - b.n c7736 │ │ + b.n c7746 │ │ lsls r4, r0, #1 │ │ - b.n c6b14 │ │ + b.n c6b24 │ │ movs r4, r2 │ │ - b.n c6b38 │ │ + b.n c6b48 │ │ movs r0, r0 │ │ - b.n c72b4 │ │ + b.n c72c4 │ │ movs r3, r0 │ │ subs r2, #0 │ │ movs r0, r2 │ │ - b.n c6b44 │ │ + b.n c6b54 │ │ asrs r4, r0, #1 │ │ - b.n c6b48 │ │ + b.n c6b58 │ │ movs r0, r0 │ │ - b.n c72b4 │ │ + b.n c72c4 │ │ lsls r0, r0, #2 │ │ cmp r2, #0 │ │ strb r1, [r0, #0] │ │ - b.n c7528 │ │ + b.n c7538 │ │ asrs r1, r0, #32 │ │ - b.n c7528 │ │ + b.n c7538 │ │ movs r0, #60 @ 0x3c │ │ - b.n c6b5c │ │ + b.n c6b6c │ │ lsls r7, r0, #2 │ │ - b.n c7134 │ │ + b.n c7144 │ │ adds r0, #129 @ 0x81 │ │ - b.n c712c │ │ + b.n c713c │ │ asrs r0, r0, #1 │ │ - b.n c6b48 │ │ + b.n c6b58 │ │ lsls r0, r0, #4 │ │ - b.n c7136 │ │ + b.n c7146 │ │ asrs r3, r0 │ │ - b.n c713a │ │ + b.n c714a │ │ movs r0, #8 │ │ - b.n c737a │ │ + b.n c738a │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr0, [r0, #32] │ │ - b.n c6b62 │ │ + b.n c6b72 │ │ movs r0, r1 │ │ - b.n c6b4e │ │ + b.n c6b5e │ │ movs r4, r1 │ │ - b.n c738a │ │ + b.n c739a │ │ lsrs r0, r0, #12 │ │ stcl 1, cr0, [r4, #212] @ 0xd4 │ │ add.w r0, r0, r0, ror #4 │ │ - b.n c6b90 │ │ + b.n c6ba0 │ │ movs r1, r0 │ │ - b.n c72fa │ │ + b.n c730a │ │ movs r0, r1 │ │ ldr r2, [sp, #0] │ │ asrs r0, r3, #32 │ │ - b.n c6b9c │ │ + b.n c6bac │ │ movs r1, r0 │ │ - b.n c7306 │ │ + b.n c7316 │ │ lsls r5, r4, #1 │ │ cmp r2, #0 │ │ movs r4, r0 │ │ - b.n c6b96 │ │ + b.n c6ba6 │ │ stmia r0!, {r3, r4, r5} │ │ - b.n c6bac │ │ + b.n c6bbc │ │ movs r0, r0 │ │ - b.n c732a │ │ + b.n c733a │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, r1] │ │ - b.n c6bb8 │ │ + b.n c6bc8 │ │ lsls r1, r4, #1 │ │ @ instruction: 0xea00a004 │ │ - b.n c6bae │ │ + b.n c6bbe │ │ stmia r0!, {r3, r4, r5} │ │ - b.n c6bc4 │ │ + b.n c6bd4 │ │ lsls r5, r0, #2 │ │ - b.n c7198 │ │ + b.n c71a8 │ │ movs r0, #12 │ │ - b.n c6bcc │ │ + b.n c6bdc │ │ asrs r0, r1, #32 │ │ - b.n c6bbe │ │ + b.n c6bce │ │ ands r0, r3 │ │ - b.n c6bd4 │ │ + b.n c6be4 │ │ str r0, [r0, #16] │ │ - b.n c71a2 │ │ + b.n c71b2 │ │ movs r1, r0 │ │ - b.n c71b6 │ │ + b.n c71c6 │ │ strb r0, [r4, #0] │ │ - b.n c6bc0 │ │ + b.n c6bd0 │ │ movs r4, r3 │ │ - b.n c6bc4 │ │ + b.n c6bd4 │ │ asrs r5, r0, #32 │ │ - b.n c73ee │ │ + b.n c73fe │ │ movs r0, r0 │ │ - b.n c775c │ │ + b.n c776c │ │ movs r7, r1 │ │ lsrs r0, r0, #8 │ │ strb r0, [r0, #0] │ │ - b.n c6be6 │ │ + b.n c6bf6 │ │ adds r0, #4 │ │ - b.n c6bea │ │ + b.n c6bfa │ │ movs r3, r0 │ │ - b.n c71d0 │ │ + b.n c71e0 │ │ movs r2, r1 │ │ - b.n c7366 │ │ + b.n c7376 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ movs r4, r1 │ │ - b.n c740e │ │ + b.n c741e │ │ movs r0, #8 │ │ - b.n c7412 │ │ + b.n c7422 │ │ str r1, [r0, r0] │ │ - b.n c7416 │ │ + b.n c7426 │ │ lsls r3, r2, #4 │ │ @ instruction: 0xeb00c038 │ │ - b.n c6c18 │ │ + b.n c6c28 │ │ asrs r5, r0, #32 │ │ - b.n c7422 │ │ + b.n c7432 │ │ str r4, [r1, #0] │ │ - b.n c7572 │ │ + b.n c7582 │ │ str r1, [r0, r0] │ │ - b.n c7574 │ │ + b.n c7584 │ │ movs r4, r0 │ │ - b.n c738e │ │ - add r0, pc, #28 @ (adr r0, c710c ) │ │ - b.n c7432 │ │ + b.n c739e │ │ + add r0, pc, #28 @ (adr r0, c711c ) │ │ + b.n c7442 │ │ @ instruction: 0xffec3aff │ │ strb r1, [r0, #0] │ │ - b.n c75fc │ │ - add r0, pc, #4 @ (adr r0, c7100 ) │ │ - b.n c743e │ │ + b.n c760c │ │ + add r0, pc, #4 @ (adr r0, c7110 ) │ │ + b.n c744e │ │ lsls r0, r0, #1 │ │ - b.n c6c3c │ │ + b.n c6c4c │ │ movs r0, r0 │ │ - b.n c73b4 │ │ + b.n c73c4 │ │ movs r0, r7 │ │ ldrh r0, [r0, #16] │ │ lsls r0, r0, #1 │ │ - b.n c6c46 │ │ + b.n c6c56 │ │ asrs r7, r0, #2 │ │ - b.n c7220 │ │ + b.n c7230 │ │ movs r0, #60 @ 0x3c │ │ - b.n c6c50 │ │ + b.n c6c60 │ │ str r1, [r1, #0] │ │ - b.n c745a │ │ + b.n c746a │ │ lsls r0, r1, #1 │ │ - b.n c6c3e │ │ + b.n c6c4e │ │ asrs r1, r0, #4 │ │ - b.n c7086 │ │ + b.n c7096 │ │ str r0, [r1, r0] │ │ - b.n c6c4a │ │ + b.n c6c5a │ │ movs r6, #216 @ 0xd8 │ │ - b.n c74aa │ │ + b.n c74ba │ │ strh r5, [r0, #0] │ │ - b.n c7252 │ │ + b.n c7262 │ │ str r0, [sp, #0] │ │ - b.n c7678 │ │ + b.n c7688 │ │ strh r0, [r7, #54] @ 0x36 │ │ - b.n c74b6 │ │ + b.n c74c6 │ │ str r0, [sp, #24] │ │ - b.n c747a │ │ + b.n c748a │ │ movs r4, r5 │ │ - b.n c6c78 │ │ + b.n c6c88 │ │ movs r0, #64 @ 0x40 │ │ - b.n c6c7a │ │ + b.n c6c8a │ │ str r0, [r2, #0] │ │ - b.n c6c68 │ │ + b.n c6c78 │ │ movs r1, r1 │ │ ldmia.w r0, {r1, r5} │ │ stmia.w sp, {r0, r1, ip} │ │ - b.n c7492 │ │ + b.n c74a2 │ │ adds r0, #72 @ 0x48 │ │ - b.n c7670 │ │ + b.n c7680 │ │ lsls r6, r5, #7 │ │ add.w r0, r0, r4, lsl #17 │ │ - b.n c6c98 │ │ + b.n c6ca8 │ │ str r0, [sp, #4] │ │ - b.n c7674 │ │ + b.n c7684 │ │ movs r0, r0 │ │ - b.n c7806 │ │ + b.n c7816 │ │ ands r4, r0 │ │ - b.n c7274 │ │ + b.n c7284 │ │ eors r4, r0 │ │ - b.n c6c88 │ │ + b.n c6c98 │ │ lsls r1, r1, #2 │ │ subs r0, r0, r0 │ │ movs r0, r5 │ │ - b.n c6cb0 │ │ + b.n c6cc0 │ │ movs r0, r0 │ │ - b.n c6c9a │ │ + b.n c6caa │ │ movs r0, #212 @ 0xd4 │ │ - b.n c73fe │ │ + b.n c740e │ │ asrs r5, r0, #32 │ │ - b.n c7288 │ │ + b.n c7298 │ │ movs r1, r0 │ │ - b.n c742a │ │ + b.n c743a │ │ movs r0, r1 │ │ subs r2, #0 │ │ asrs r6, r0, #2 │ │ - b.n c74ce │ │ + b.n c74de │ │ movs r1, r0 │ │ - b.n c783c │ │ + b.n c784c │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ movs r0, #1 │ │ - b.n c76a0 │ │ + b.n c76b0 │ │ movs r0, #0 │ │ - b.n c6c9e │ │ + b.n c6cae │ │ stmia r0!, {r3, r4, r5} │ │ - b.n c6cdc │ │ + b.n c6cec │ │ asrs r2, r0, #4 │ │ - b.n c70a6 │ │ + b.n c70b6 │ │ strb r1, [r0, #0] │ │ - b.n c76b8 │ │ + b.n c76c8 │ │ @ instruction: 0xffd3eaff │ │ strh r0, [r5, #0] │ │ - b.n c6cec │ │ + b.n c6cfc │ │ movs r0, r1 │ │ - b.n c74f6 │ │ - b.n c7336 │ │ + b.n c7506 │ │ + b.n c7346 │ │ @ instruction: 0xebff0000 │ │ - b.n c785e │ │ + b.n c786e │ │ lsls r5, r6, #1 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n c6cf6 │ │ + b.n c6d06 │ │ adds r0, #0 │ │ - b.n c6cea │ │ + b.n c6cfa │ │ @ instruction: 0xffeeeaff │ │ stmia r0!, {r3, r4, r5} │ │ - b.n c6d0c │ │ + b.n c6d1c │ │ movs r0, #5 │ │ - b.n c72dc │ │ + b.n c72ec │ │ movs r1, #3 │ │ - b.n c6eda │ │ + b.n c6eea │ │ asrs r5, r0, #4 │ │ - b.n c70de │ │ + b.n c70ee │ │ str r1, [r0, r0] │ │ - b.n c768c │ │ + b.n c769c │ │ asrs r2, r0, #32 │ │ - b.n c76e8 │ │ + b.n c76f8 │ │ @ instruction: 0xfffb1aff │ │ @ instruction: 0xffedeaff │ │ str r2, [r1, r0] │ │ - b.n c7532 │ │ - add r0, pc, #112 @ (adr r0, c7264 ) │ │ - b.n c6d30 │ │ + b.n c7542 │ │ + add r0, pc, #112 @ (adr r0, c7274 ) │ │ + b.n c6d40 │ │ strh r4, [r6, #0] │ │ - b.n c6d34 │ │ + b.n c6d44 │ │ strb r0, [r4, #0] │ │ - b.n c6d38 │ │ + b.n c6d48 │ │ movs r1, r0 │ │ and.w r0, r0, r0, lsl #21 │ │ - b.n c6d40 │ │ + b.n c6d50 │ │ stmia r0!, {r3, r4, r5} │ │ - b.n c6d44 │ │ + b.n c6d54 │ │ movs r4, r4 │ │ - b.n c6d48 │ │ + b.n c6d58 │ │ movs r4, r0 │ │ - b.n c6d32 │ │ + b.n c6d42 │ │ movs r0, r0 │ │ - b.n c74c4 │ │ + b.n c74d4 │ │ vpmin.u , , │ │ movs r0, r0 │ │ - b.n c795e │ │ - add r0, pc, #144 @ (adr r0, c72b0 ) │ │ - b.n c6d5c │ │ + b.n c796e │ │ + add r0, pc, #144 @ (adr r0, c72c0 ) │ │ + b.n c6d6c │ │ asrs r4, r0, #32 │ │ - b.n c6d5a │ │ + b.n c6d6a │ │ movs r1, r0 │ │ - b.n c74d8 │ │ + b.n c74e8 │ │ movs r0, r4 │ │ cmp r2, #0 │ │ asrs r7, r0, #2 │ │ - b.n c7340 │ │ + b.n c7350 │ │ movs r0, #133 @ 0x85 │ │ - b.n c7340 │ │ + b.n c7350 │ │ str r4, [r0, #4] │ │ - b.n c6d74 │ │ + b.n c6d84 │ │ asrs r1, r0, #4 │ │ - b.n c7352 │ │ + b.n c7362 │ │ movs r1, #2 │ │ - b.n c7356 │ │ + b.n c7366 │ │ asrs r4, r3, #32 │ │ - b.n c7748 │ │ + b.n c7758 │ │ movs r0, #28 │ │ - b.n c774e │ │ + b.n c775e │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr7, [r1, #4] │ │ - b.n c7760 │ │ + b.n c7770 │ │ adds r0, #8 │ │ - b.n c6d78 │ │ + b.n c6d88 │ │ asrs r4, r1, #32 │ │ - b.n c775c │ │ + b.n c776c │ │ adds r0, #8 │ │ - b.n c6d62 │ │ + b.n c6d72 │ │ str r1, [r0, r0] │ │ - b.n c776c │ │ + b.n c777c │ │ lsrs r0, r0, #12 │ │ stcl 0, cr2, [r2, #48] @ 0x30 │ │ - b.n c776e │ │ + b.n c777e │ │ adds r0, #4 │ │ - b.n c6da2 │ │ + b.n c6db2 │ │ movs r3, r0 │ │ - b.n c7520 │ │ + b.n c7530 │ │ @ instruction: 0xfff43aff │ │ movs r6, r1 │ │ and.w r2, r0, ip, lsl #2 │ │ - b.n c6dbc │ │ + b.n c6dcc │ │ movs r0, r0 │ │ - b.n c73a0 │ │ + b.n c73b0 │ │ lsls r2, r3, #1 │ │ - b.n c6e26 │ │ + b.n c6e36 │ │ movs r0, r0 │ │ - b.n c792a │ │ + b.n c793a │ │ movs r6, r6 │ │ lsrs r0, r0, #8 │ │ asrs r4, r7, #9 │ │ - b.n c6dd0 │ │ + b.n c6de0 │ │ cmp r7, #66 @ 0x42 │ │ - b.n c79d6 │ │ + b.n c79e6 │ │ adds r2, #120 @ 0x78 │ │ - b.n c6dd8 │ │ + b.n c6de8 │ │ movs r4, r6 │ │ - b.n c6dd8 │ │ + b.n c6de8 │ │ asrs r1, r0, #32 │ │ - b.n c73c0 │ │ + b.n c73d0 │ │ movs r0, r0 │ │ - b.n c6dc0 │ │ + b.n c6dd0 │ │ adds r0, #3 │ │ - b.n c73c8 │ │ + b.n c73d8 │ │ movs r1, r0 │ │ - b.n c79ee │ │ + b.n c79fe │ │ lsls r4, r4, #1 │ │ and.w r0, r0, r4, lsl #25 │ │ - b.n c6df0 │ │ + b.n c6e00 │ │ movs r0, #133 @ 0x85 │ │ - b.n c73c4 │ │ + b.n c73d4 │ │ asrs r0, r3, #9 │ │ - b.n c6dfc │ │ + b.n c6e0c │ │ adds r0, #1 │ │ - b.n c7a02 │ │ + b.n c7a12 │ │ strb r0, [r0, #0] │ │ - b.n c7a86 │ │ + b.n c7a96 │ │ movs r1, #2 │ │ - b.n c73de │ │ + b.n c73ee │ │ asrs r1, r0, #32 │ │ - b.n c73ec │ │ + b.n c73fc │ │ str r0, [r0, r0] │ │ - b.n c6de6 │ │ + b.n c6df6 │ │ adds r0, #36 @ 0x24 │ │ - b.n c6dda │ │ + b.n c6dea │ │ str r4, [r0, r0] │ │ - b.n c6dee │ │ + b.n c6dfe │ │ asrs r4, r3, #32 │ │ - b.n c6de2 │ │ + b.n c6df2 │ │ strb r0, [r4, #0] │ │ - b.n c6de6 │ │ + b.n c6df6 │ │ asrs r4, r7, #8 │ │ - b.n c6e1e │ │ + b.n c6e2e │ │ adds r0, #76 @ 0x4c │ │ - b.n c6e24 │ │ + b.n c6e34 │ │ movs r2, #64 @ 0x40 │ │ - b.n c6e26 │ │ + b.n c6e36 │ │ asrs r1, r1, #32 │ │ - b.n c73f4 │ │ + b.n c7404 │ │ asrs r4, r7, #8 │ │ - b.n c6e0e │ │ + b.n c6e1e │ │ lsrs r0, r2 │ │ - b.n c7680 │ │ + b.n c7690 │ │ asrs r0, r1, #32 │ │ - b.n c6e22 │ │ + b.n c6e32 │ │ movs r4, r0 │ │ - b.n c75ac │ │ + b.n c75bc │ │ asrs r6, r0, #32 │ │ - b.n c7388 │ │ + b.n c7398 │ │ asrs r0, r1, #32 │ │ - b.n c6e0e │ │ + b.n c6e1e │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ lsls r0, r1, #1 │ │ - b.n c782c │ │ + b.n c783c │ │ lsls r0, r2, #3 │ │ @ instruction: 0xeb00c038 │ │ - b.n c6e54 │ │ + b.n c6e64 │ │ movs r0, r0 │ │ - b.n c79be │ │ + b.n c79ce │ │ lsls r5, r5, #1 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n c6e5e │ │ + b.n c6e6e │ │ lsls r0, r1, #1 │ │ - b.n c6e4a │ │ + b.n c6e5a │ │ lsrs r6, r2, #29 │ │ - b.n c782e │ │ + b.n c783e │ │ movs r0, #208 @ 0xd0 │ │ - b.n c76b2 │ │ + b.n c76c2 │ │ ands r6, r0 │ │ - b.n c745a │ │ + b.n c746a │ │ str r0, [r0, r0] │ │ - b.n c7880 │ │ + b.n c7890 │ │ lsrs r0, r6 │ │ - b.n c76be │ │ + b.n c76ce │ │ lsls r4, r2, #9 │ │ - b.n c6e7a │ │ - bpl.n c72ac │ │ + b.n c6e8a │ │ + bpl.n c72bc │ │ @ instruction: 0xebffc038 │ │ - b.n c6e84 │ │ + b.n c6e94 │ │ movs r4, r0 │ │ - b.n c6e86 │ │ + b.n c6e96 │ │ asrs r0, r1, #7 │ │ - b.n c6e90 │ │ + b.n c6ea0 │ │ movs r0, r1 │ │ - b.n c7a56 │ │ + b.n c7a66 │ │ movs r4, r0 │ │ - b.n c6e72 │ │ + b.n c6e82 │ │ asrs r1, r0, #32 │ │ - b.n c747c │ │ + b.n c748c │ │ asrs r2, r3, #1 │ │ - b.n c6f04 │ │ + b.n c6f14 │ │ movs r3, r0 │ │ - b.n c7a08 │ │ + b.n c7a18 │ │ movs r4, r5 │ │ cmp r2, #0 │ │ asrs r0, r1, #32 │ │ - b.n c6ea4 │ │ + b.n c6eb4 │ │ lsls r4, r7, #8 │ │ - b.n c6eaa │ │ + b.n c6eba │ │ movs r2, #76 @ 0x4c │ │ - b.n c6eae │ │ + b.n c6ebe │ │ movs r0, r3 │ │ - b.n c7a1c │ │ + b.n c7a2c │ │ asrs r0, r3, #32 │ │ movs r3, #160 @ 0xa0 │ │ movs r0, #0 │ │ - b.n c7486 │ │ + b.n c7496 │ │ lsls r4, r7, #30 │ │ - b.n c7996 │ │ + b.n c79a6 │ │ lsrs r7, r7, #31 │ │ - b.n c7a28 │ │ + b.n c7a38 │ │ movs r1, r0 │ │ - b.n c7632 │ │ + b.n c7642 │ │ movs r0, r0 │ │ strh r0, [r0, #24] │ │ - beq.n c73cc │ │ - b.n c782c │ │ + beq.n c73dc │ │ + b.n c783c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r4, r5, lr, pc} │ │ - b.n c6ed8 │ │ + b.n c6ee8 │ │ str r2, [r1, r0] │ │ - b.n c76e2 │ │ + b.n c76f2 │ │ strb r0, [r4, #0] │ │ - b.n c6ee0 │ │ + b.n c6ef0 │ │ @ instruction: 0xff9ceaff │ │ asrs r0, r2, #5 │ │ - b.n c6eec │ │ + b.n c6efc │ │ movs r0, #229 @ 0xe5 │ │ - b.n c7af2 │ │ + b.n c7b02 │ │ adds r1, #76 @ 0x4c │ │ - b.n c6ef4 │ │ + b.n c6f04 │ │ lsls r4, r1, #5 │ │ - b.n c6ef8 │ │ + b.n c6f08 │ │ asrs r1, r0, #32 │ │ - b.n c74dc │ │ + b.n c74ec │ │ adds r0, #3 │ │ - b.n c74e0 │ │ + b.n c74f0 │ │ movs r0, r0 │ │ - b.n c74e4 │ │ + b.n c74f4 │ │ movs r0, r0 │ │ - b.n c6ee4 │ │ + b.n c6ef4 │ │ movs r4, r2 │ │ - b.n c6f08 │ │ + b.n c6f18 │ │ movs r4, r0 │ │ - b.n c6eec │ │ + b.n c6efc │ │ movs r0, r2 │ │ - b.n c6f10 │ │ + b.n c6f20 │ │ movs r0, r1 │ │ - b.n c6ef4 │ │ + b.n c6f04 │ │ movs r3, r0 │ │ - b.n c7b1e │ │ - ldr r7, [pc, #580] @ (c7624 ) │ │ + b.n c7b2e │ │ + ldr r7, [pc, #576] @ (c7630 ) │ │ @ instruction: 0xebffc038 │ │ - b.n c6f20 │ │ - stc2l 10, cr14, [pc, #-1020]! @ c6fec @ │ │ + b.n c6f30 │ │ + stc2l 10, cr14, [pc, #-1020]! @ c6ffc @ │ │ asrs r0, r0, #4 │ │ - b.n c6f2c │ │ + b.n c6f3c │ │ movs r0, #199 @ 0xc7 │ │ - b.n c7b32 │ │ + b.n c7b42 │ │ adds r0, #252 @ 0xfc │ │ - b.n c6f34 │ │ + b.n c6f44 │ │ lsls r4, r7, #3 │ │ - b.n c6f38 │ │ + b.n c6f48 │ │ asrs r1, r0, #32 │ │ - b.n c751c │ │ + b.n c752c │ │ adds r0, #3 │ │ - b.n c7520 │ │ + b.n c7530 │ │ movs r0, r0 │ │ - b.n c7524 │ │ + b.n c7534 │ │ lsls r1, r0, #12 │ │ stmia.w sp, {r0, r1} │ │ - b.n c7b4e │ │ - ldr r7, [pc, #532] @ (c7624 ) │ │ + b.n c7b5e │ │ + ldr r7, [pc, #528] @ (c7630 ) │ │ @ instruction: 0xebffc038 │ │ - b.n c6f50 │ │ - add r0, pc, #256 @ (adr r0, c7518 ) │ │ - b.n c6f52 │ │ - stc2l 10, cr14, [pc, #-1020]! @ c7020 @ │ │ + b.n c6f60 │ │ + add r0, pc, #256 @ (adr r0, c7528 ) │ │ + b.n c6f62 │ │ + stc2l 10, cr14, [pc, #-1020]! @ c7030 @ │ │ asrs r4, r7, #3 │ │ - b.n c6f60 │ │ + b.n c6f70 │ │ cmp r7, #102 @ 0x66 │ │ - b.n c7b66 │ │ + b.n c7b76 │ │ lsls r4, r7, #8 │ │ - b.n c6f62 │ │ + b.n c6f72 │ │ adds r0, #244 @ 0xf4 │ │ - b.n c6f6c │ │ + b.n c6f7c │ │ asrs r1, r0, #32 │ │ - b.n c7550 │ │ + b.n c7560 │ │ movs r0, r1 │ │ - b.n c6f50 │ │ + b.n c6f60 │ │ movs r3, r0 │ │ - b.n c7b7a │ │ + b.n c7b8a │ │ adds r0, #3 │ │ - b.n c755c │ │ + b.n c756c │ │ str r0, [sp, #0] │ │ - b.n c6f5c │ │ + b.n c6f6c │ │ str r4, [r0, #0] │ │ - b.n c6f60 │ │ - ldr r7, [pc, #476] @ (c7624 ) │ │ + b.n c6f70 │ │ + ldr r7, [pc, #472] @ (c7630 ) │ │ @ instruction: 0xebfffd7f │ │ @ instruction: 0xeaff0006 │ │ - b.n c7792 │ │ + b.n c77a2 │ │ pop {r2, r6, r7} │ │ @ instruction: 0xebffc038 │ │ - b.n c6f94 │ │ + b.n c6fa4 │ │ stc2 10, cr14, [fp, #1020] @ 0x3fc @ │ │ movs r6, r0 │ │ - b.n c701a │ │ + b.n c702a │ │ movs r0, r1 │ │ - b.n c7a86 │ │ - stc2 10, cr1, [pc, #1020] @ c7864 @ │ │ + b.n c7a96 │ │ + stc2 10, cr1, [pc, #1020] @ c7874 @ │ │ movs r4, r1 │ │ - b.n c77ae │ │ + b.n c77be │ │ stc2l 11, cr14, [r0], #1020 @ 0x3fc @ │ │ stmia r0!, {r3, r4, r5} │ │ - b.n c6fb0 │ │ + b.n c6fc0 │ │ stc2 10, cr14, [fp, #1020] @ 0x3fc @ │ │ lsls r5, r0, #4 │ │ @ instruction: 0xeb00c038 │ │ - b.n c6fbc │ │ + b.n c6fcc │ │ movs r0, r0 │ │ - b.n c7b26 │ │ + b.n c7b36 │ │ lsls r4, r2, #1 │ │ - b.n c6fa4 │ │ + b.n c6fb4 │ │ movs r2, r2 │ │ subs r0, r0, r0 │ │ - add r0, pc, #144 @ (adr r0, c7520 ) │ │ - b.n c6fcc │ │ + add r0, pc, #144 @ (adr r0, c7530 ) │ │ + b.n c6fdc │ │ str r0, [sp, #0] │ │ - b.n c7bd6 │ │ + b.n c7be6 │ │ asrs r4, r4, #4 │ │ - b.n c6fc2 │ │ + b.n c6fd2 │ │ strb r0, [r0, #0] │ │ - b.n c7bde │ │ + b.n c7bee │ │ strh r4, [r6, #0] │ │ - b.n c6fdc │ │ + b.n c6fec │ │ str r0, [r0, r0] │ │ - b.n c7be6 │ │ + b.n c7bf6 │ │ movs r4, r0 │ │ - b.n c6fde │ │ + b.n c6fee │ │ asrs r0, r4, #4 │ │ - b.n c6fb6 │ │ + b.n c6fc6 │ │ asrs r3, r0, #32 │ │ - b.n c7bf2 │ │ + b.n c7c02 │ │ asrs r4, r3, #1 │ │ - b.n c6fd0 │ │ + b.n c6fe0 │ │ asrs r2, r0, #4 │ │ - b.n c7c7a │ │ + b.n c7c8a │ │ movs r0, r0 │ │ - b.n c7b5e │ │ + b.n c7b6e │ │ movs r0, r0 │ │ - b.n c7c02 │ │ + b.n c7c12 │ │ str r1, [sp, #176] @ 0xb0 │ │ - b.n c6fce │ │ + b.n c6fde │ │ asrs r0, r3, #1 │ │ - b.n c6fe4 │ │ + b.n c6ff4 │ │ lsls r4, r0, #1 │ │ - b.n c6fe8 │ │ + b.n c6ff8 │ │ mrc2 10, 5, r1, cr15, cr15, {7} @ │ │ vpmin.u16 q15, q9, │ │ movs r4, r1 │ │ - b.n c7c1a │ │ + b.n c7c2a │ │ movs r0, #56 @ 0x38 │ │ - b.n c7018 │ │ + b.n c7028 │ │ asrs r4, r0, #32 │ │ - b.n c7006 │ │ + b.n c7016 │ │ asrs r2, r0, #32 │ │ - b.n c7be8 │ │ + b.n c7bf8 │ │ asrs r4, r0, #32 │ │ - b.n c6fee │ │ + b.n c6ffe │ │ @ instruction: 0xffa8eaff │ │ - ldrb r0, [r7, #26] │ │ + ldrb r0, [r1, #27] │ │ movs r1, r0 │ │ - adds r2, r5, r0 │ │ - @ instruction: 0xfff46d90 │ │ - vcvt.u32.f32 d23, d4, #12 │ │ - vqrdmlah.s , q2, d16[0] │ │ - movs r1, r0 │ │ - adds r2, r5, r1 │ │ - @ instruction: 0xfff46dd0 │ │ - vqshl.u32 d18, d4, #20 │ │ - @ instruction: 0xfff475cc │ │ + asrs r5, r4, #29 │ │ + vcvt.f32.u32 d22, d5, #12 │ │ + vshr.u32 d24, d26, #12 │ │ + vcvt.f32.u32 , q8, #12 │ │ + movs r1, r0 │ │ + asrs r5, r4, #30 │ │ + vcvt.f32.u32 q11, , #12 │ │ + vqneg.s16 q9, │ │ + vsli.64 , q6, #52 @ 0x34 │ │ movs r1, r0 │ │ - adds r6, r0, r6 │ │ - vsra.u64 , q12, #12 │ │ - vtbx.8 d25, {d20}, d15 │ │ - vsri.64 , q8, #11 │ │ + adds r1, r0, r3 │ │ + vrshr.u32 d19, d15, #12 │ │ + @ instruction: 0xfff498bf │ │ + vceq.f16 d23, d0, #0 │ │ movs r1, r0 │ │ - asrs r6, r6, #31 │ │ - vmull.u q9, d20, d29 │ │ + asrs r1, r6, #28 │ │ + @ instruction: 0xfff42d82 │ │ @ instruction: 0xfff44ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n c7a4c │ │ - beq.n c754c │ │ - b.n c79d0 │ │ + b.n c7a5c │ │ + beq.n c755c │ │ + b.n c79e0 │ │ adds r0, #0 │ │ - b.n c787a │ │ + b.n c788a │ │ str r0, [r7, #32] │ │ - b.n c705e │ │ + b.n c706e │ │ lsls r0, r0, #9 │ │ - b.n c7062 │ │ + b.n c7072 │ │ asrs r1, r0, #2 │ │ - b.n c7648 │ │ + b.n c7658 │ │ asrs r1, r0, #4 │ │ - b.n c764a │ │ + b.n c765a │ │ lsrs r1, r0, #16 │ │ - b.n c7c8e │ │ + b.n c7c9e │ │ strb r0, [r2, #0] │ │ - b.n c7074 │ │ + b.n c7084 │ │ ands r4, r0 │ │ - b.n c6f84 │ │ + b.n c6f94 │ │ movs r4, r0 │ │ - b.n c7806 │ │ + b.n c7816 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ - add r0, pc, #744 @ (adr r0, c7848 ) │ │ - b.n c7910 │ │ + add r0, pc, #744 @ (adr r0, c7858 ) │ │ + b.n c7920 │ │ lsrs r6, r0, #8 │ │ - b.n c7b9a │ │ + b.n c7baa │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ - beq.n c75a4 │ │ - b.n c7a04 │ │ + beq.n c75b4 │ │ + b.n c7a14 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, pc} │ │ - b.n c709c │ │ + b.n c70ac │ │ str r0, [sp, #96] @ 0x60 │ │ - b.n c709c │ │ + b.n c70ac │ │ movs r0, r0 │ │ - b.n c7c2e │ │ + b.n c7c3e │ │ movs r4, r0 │ │ asrs r0, r3, #23 │ │ movs r0, r1 │ │ asrs r0, r2, #12 │ │ movs r4, r2 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n c761a │ │ + b.n c762a │ │ movs r1, r0 │ │ - b.n c7c44 │ │ + b.n c7c54 │ │ lsls r0, r2, #10 │ │ - b.n c7596 │ │ + b.n c75a6 │ │ lsrs r0, r4, #16 │ │ - b.n c78da │ │ + b.n c78ea │ │ lsrs r1, r0, #16 │ │ lsls r0, r4, #9 │ │ - beq.n c75d8 │ │ + beq.n c75e8 │ │ lsls r3, r1, #9 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ lsrs r5, r7, #2 │ │ asrs r1, r5, #2 │ │ - b.n c78bc │ │ + b.n c78cc │ │ asrs r1, r4, #4 │ │ - b.n c78b0 │ │ + b.n c78c0 │ │ asrs r1, r4, #8 │ │ - b.n c78b4 │ │ + b.n c78c4 │ │ asrs r1, r4, #16 │ │ - b.n c78b8 │ │ + b.n c78c8 │ │ adds r1, r4, r0 │ │ - b.n c78bc │ │ + b.n c78cc │ │ asrs r1, r0, #32 │ │ - b.n c7ac0 │ │ + b.n c7ad0 │ │ subs r1, r6, #4 │ │ - b.n c73c0 │ │ + b.n c73d0 │ │ subs r1, r2, #4 │ │ - b.n c78a4 │ │ + b.n c78b4 │ │ lsls r1, r0, #2 │ │ - b.n c788c │ │ + b.n c789c │ │ movs r0, r0 │ │ - b.n c7d0e │ │ + b.n c7d1e │ │ lsls r3, r4, #1 │ │ - b.n c7c74 │ │ + b.n c7c84 │ │ lsls r2, r4, #1 │ │ adds r2, #97 @ 0x61 │ │ - beq.n c7610 │ │ - b.n c7a70 │ │ + beq.n c7620 │ │ + b.n c7a80 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r4} │ │ - b.n c7104 │ │ + b.n c7114 │ │ adds r0, #0 │ │ - b.n c7da6 │ │ + b.n c7db6 │ │ asrs r1, r1, #32 │ │ - b.n c76ea │ │ - b.n c76ec │ │ - b.n c792e │ │ + b.n c76fa │ │ + b.n c76fc │ │ + b.n c793e │ │ asrs r1, r0, #2 │ │ - b.n c76f8 │ │ + b.n c7708 │ │ strh r4, [r2, r1] │ │ - b.n c7126 │ │ + b.n c7136 │ │ movs r0, r0 │ │ - b.n c7ca4 │ │ + b.n c7cb4 │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ strh r0, [r2, #0] │ │ - b.n c7132 │ │ + b.n c7142 │ │ movs r0, r0 │ │ - b.n c7cb6 │ │ + b.n c7cc6 │ │ @ instruction: 0xfff91aff │ │ @ instruction: 0xffdeeaff │ │ movs r5, r0 │ │ - b.n c7952 │ │ + b.n c7962 │ │ movs r6, r0 │ │ @ instruction: 0xe98de000 │ │ - b.n c7134 │ │ + b.n c7144 │ │ pop {r4, r5} │ │ @ instruction: 0xebffe000 │ │ - b.n c715c │ │ + b.n c716c │ │ stmia r0!, {} │ │ - b.n c7966 │ │ + b.n c7976 │ │ adds r0, #0 │ │ - b.n c7154 │ │ + b.n c7164 │ │ lsrs r1, r0, #16 │ │ - b.n c7d6e │ │ + b.n c7d7e │ │ movs r0, #8 │ │ - b.n c716c │ │ + b.n c717c │ │ asrs r4, r0, #32 │ │ - b.n c7170 │ │ + b.n c7180 │ │ movs r3, r0 │ │ - b.n c78f2 │ │ + b.n c7902 │ │ @ instruction: 0xffef8aff │ │ adds r1, #12 │ │ - b.n c756c │ │ + b.n c757c │ │ movs r6, r1 │ │ - b.n c78ec │ │ + b.n c78fc │ │ @ instruction: 0xffec3aff │ │ subs r2, r0, r0 │ │ - b.n c7d62 │ │ + b.n c7d72 │ │ asrs r2, r7, #2 │ │ - b.n c79e0 │ │ - beq.n c768c │ │ - b.n c7aec │ │ + b.n c79f0 │ │ + beq.n c769c │ │ + b.n c7afc │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n c7b7c │ │ - beq.n c768c │ │ - b.n c7b00 │ │ + b.n c7b8c │ │ + beq.n c769c │ │ + b.n c7b10 │ │ movs r0, r1 │ │ - b.n c7184 │ │ + b.n c7194 │ │ str r0, [r0, #0] │ │ - b.n c7dae │ │ + b.n c7dbe │ │ lsls r4, r2, #3 │ │ - b.n c79f2 │ │ + b.n c7a02 │ │ movs r0, r2 │ │ - b.n c7190 │ │ + b.n c71a0 │ │ asrs r4, r1, #32 │ │ - b.n c7194 │ │ + b.n c71a4 │ │ strh r0, [r2, #0] │ │ - b.n c719e │ │ + b.n c71ae │ │ movs r2, r2 │ │ and.w r0, r0, r0, lsl #20 │ │ - b.n c71b6 │ │ + b.n c71c6 │ │ movs r4, #63 @ 0x3f │ │ - b.n c7dca │ │ + b.n c7dda │ │ ands r0, r1 │ │ - b.n c71be │ │ + b.n c71ce │ │ strb r4, [r1, #0] │ │ - b.n c71c2 │ │ + b.n c71d2 │ │ movs r4, r1 │ │ - b.n c71d0 │ │ + b.n c71e0 │ │ adds r0, #5 │ │ - b.n c79da │ │ + b.n c79ea │ │ lsls r7, r7, #16 │ │ - b.n c7d4c │ │ + b.n c7d5c │ │ asrs r4, r0, #32 │ │ - b.n c79e2 │ │ + b.n c79f2 │ │ movs r0, #7 │ │ adds r1, #160 @ 0xa0 │ │ cmp r1, r9 │ │ add.w r0, r0, r0 │ │ - b.n c795c │ │ + b.n c796c │ │ movs r2, r5 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n c7df6 │ │ + b.n c7e06 │ │ asrs r4, r0, #32 │ │ - b.n c71ea │ │ + b.n c71fa │ │ str r1, [r0, #0] │ │ - b.n c7bca │ │ + b.n c7bda │ │ movs r0, r0 │ │ - b.n c7d62 │ │ + b.n c7d72 │ │ asrs r1, r0, #6 │ │ - b.n c77d6 │ │ + b.n c77e6 │ │ strh r0, [r1, #0] │ │ - b.n c7bcc │ │ + b.n c7bdc │ │ movs r0, r7 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n c720c │ │ + b.n c721c │ │ movs r4, r1 │ │ - b.n c71f6 │ │ + b.n c7206 │ │ movs r0, r0 │ │ - b.n c798a │ │ + b.n c799a │ │ movs r3, r6 │ │ ldrh r0, [r0, #16] │ │ str r4, [r0, r0] │ │ - b.n c7212 │ │ + b.n c7222 │ │ movs r1, r0 │ │ - b.n c7d90 │ │ + b.n c7da0 │ │ @ instruction: 0xffe50aff │ │ str r0, [sp, #0] │ │ - b.n c721e │ │ + b.n c722e │ │ movs r0, r0 │ │ - b.n c7d9c │ │ + b.n c7dac │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r1 │ │ - b.n c7c0a │ │ - add r0, pc, #0 @ (adr r0, c76fc ) │ │ - b.n c7e3e │ │ + b.n c7c1a │ │ + add r0, pc, #0 @ (adr r0, c770c ) │ │ + b.n c7e4e │ │ asrs r5, r0, #32 │ │ - b.n c7a42 │ │ + b.n c7a52 │ │ movs r0, #8 │ │ - b.n c7026 │ │ + b.n c7036 │ │ asrs r1, r0, #32 │ │ - b.n c7bac │ │ - add r0, pc, #40 @ (adr r0, c7734 ) │ │ - b.n c7812 │ │ + b.n c7bbc │ │ + add r0, pc, #40 @ (adr r0, c7744 ) │ │ + b.n c7822 │ │ @ instruction: 0xfffb1aff │ │ movs r0, r0 │ │ @ instruction: 0xea00a000 │ │ - b.n c7e5a │ │ + b.n c7e6a │ │ strb r0, [r1, #0] │ │ - b.n c7c2e │ │ + b.n c7c3e │ │ movs r4, r1 │ │ - b.n c725c │ │ + b.n c726c │ │ asrs r7, r0, #32 │ │ - b.n c7a66 │ │ + b.n c7a76 │ │ movs r0, #5 │ │ - b.n c7a6a │ │ + b.n c7a7a │ │ adds r0, #9 │ │ - b.n c7a6e │ │ + b.n c7a7e │ │ cmp fp, r4 │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n c7a76 │ │ + b.n c7a86 │ │ movs r0, r0 │ │ - b.n c7e7a │ │ + b.n c7e8a │ │ movs r4, r0 │ │ - b.n c79f2 │ │ + b.n c7a02 │ │ @ instruction: 0xffdc0aff │ │ add r2, r8 │ │ add.w r0, r0, r0 │ │ - b.n c726a │ │ + b.n c727a │ │ movs r4, r0 │ │ - b.n c7dee │ │ + b.n c7dfe │ │ @ instruction: 0xfff20aff │ │ movs r0, r0 │ │ - b.n c7dfe │ │ + b.n c7e0e │ │ @ instruction: 0xffd64aff │ │ movs r2, r6 │ │ and.w r0, r0, r1 │ │ - b.n c7e42 │ │ + b.n c7e52 │ │ movs r3, r0 │ │ - bge.n c7766 │ │ + bge.n c7776 │ │ ands r4, r0 │ │ - b.n c786a │ │ + b.n c787a │ │ str r0, [r0, r0] │ │ - b.n c7878 │ │ + b.n c7888 │ │ strb r0, [r0, #0] │ │ - b.n c7800 │ │ + b.n c7810 │ │ movs r3, r0 │ │ and.w r4, r0, r5, ror #16 │ │ add.w r0, r0, r0 │ │ - b.n c729e │ │ + b.n c72ae │ │ movs r4, r0 │ │ - b.n c7e22 │ │ + b.n c7e32 │ │ @ instruction: 0xffcb1aff │ │ movs r4, r1 │ │ - b.n c72c4 │ │ + b.n c72d4 │ │ lsls r7, r7, #16 │ │ - b.n c7e3c │ │ + b.n c7e4c │ │ movs r4, #63 @ 0x3f │ │ - b.n c7ed2 │ │ + b.n c7ee2 │ │ asrs r4, r0, #32 │ │ - b.n c7ad6 │ │ + b.n c7ae6 │ │ movs r0, #7 │ │ adds r1, #160 @ 0xa0 │ │ adds r0, #5 │ │ - b.n c7ade │ │ + b.n c7aee │ │ cmp r3, r1 │ │ add.w r0, r0, r0 │ │ - b.n c7a54 │ │ + b.n c7a64 │ │ @ instruction: 0xffc10aff │ │ @ instruction: 0xffebeaff │ │ movs r0, r0 │ │ - b.n c7ef2 │ │ + b.n c7f02 │ │ strb r0, [r1, #0] │ │ - b.n c72f0 │ │ + b.n c7300 │ │ asrs r0, r0, #32 │ │ - b.n c72e8 │ │ + b.n c72f8 │ │ asrs r0, r1, #1 │ │ - b.n c72e0 │ │ + b.n c72f0 │ │ movs r7, #216 @ 0xd8 │ │ - b.n c7b44 │ │ + b.n c7b54 │ │ ands r6, r0 │ │ - b.n c78ea │ │ + b.n c78fa │ │ str r0, [r0, r0] │ │ - b.n c7d10 │ │ + b.n c7d20 │ │ movs r0, r0 │ │ - b.n c7e6e │ │ + b.n c7e7e │ │ blx pc │ │ - b.n c7b54 │ │ + b.n c7b64 │ │ movs r4, r1 │ │ - b.n c72e4 │ │ + b.n c72f4 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ movs r7, r0 │ │ - b.n c7b1e │ │ + b.n c7b2e │ │ lsls r4, r2, #4 │ │ add.w r0, r0, ip │ │ - b.n c7314 │ │ - beq.n c7820 │ │ - b.n c7c80 │ │ + b.n c7324 │ │ + beq.n c7830 │ │ + b.n c7c90 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r6, ip} │ │ - b.n c7330 │ │ + b.n c7340 │ │ asrs r1, r0, #32 │ │ - b.n c7914 │ │ + b.n c7924 │ │ asrs r2, r3, #1 │ │ - b.n c739c │ │ + b.n c73ac │ │ movs r0, r0 │ │ - b.n c7ea0 │ │ + b.n c7eb0 │ │ @ instruction: 0xfff50aff │ │ - strh r4, [r7, #60] @ 0x3c │ │ + strh r3, [r7, #60] @ 0x3c │ │ @ instruction: 0xebff102c │ │ - b.n c7348 │ │ + b.n c7358 │ │ movs r0, #136 @ 0x88 │ │ - b.n c7f4e │ │ + b.n c7f5e │ │ adds r0, #40 @ 0x28 │ │ - b.n c7350 │ │ + b.n c7360 │ │ asrs r1, r0, #32 │ │ - b.n c7934 │ │ + b.n c7944 │ │ movs r0, r0 │ │ - b.n c7334 │ │ + b.n c7344 │ │ adds r0, #3 │ │ - b.n c793c │ │ + b.n c794c │ │ movs r1, r0 │ │ - b.n c7f62 │ │ - ldr r6, [pc, #512] @ (c7a24 ) │ │ + b.n c7f72 │ │ + ldr r6, [pc, #508] @ (c7a30 ) │ │ @ instruction: 0xebffffeb │ │ @ instruction: 0xeaff6001 │ │ - b.n c7d3a │ │ + b.n c7d4a │ │ movs r5, r0 │ │ - b.n c7f72 │ │ + b.n c7f82 │ │ @ instruction: 0xffdeeaff │ │ - strb r0, [r3, #1] │ │ + strb r0, [r5, #1] │ │ movs r1, r0 │ │ - ldrh r3, [r4, r1] │ │ - vtbx.8 d16, {d20-d22}, d27 │ │ + ldrh r3, [r2, r6] │ │ + vtbl.8 d16, {d4-d7}, d29 │ │ vqshrun.s64 d20, q8, #12 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n c7d64 │ │ + b.n c7d74 │ │ ands r0, r0 │ │ - b.n c7b8e │ │ + b.n c7b9e │ │ movs r0, r0 │ │ - b.n c7f92 │ │ + b.n c7fa2 │ │ movs r0, r0 │ │ - b.n c7efe │ │ + b.n c7f0e │ │ ldrh r0, [r6, #0] │ │ lsrs r5, r7, #2 │ │ movs r1, r0 │ │ - b.n c7962 │ │ + b.n c7972 │ │ str r1, [r0, r0] │ │ - b.n c7ba2 │ │ + b.n c7bb2 │ │ asrs r0, r0, #32 │ │ - b.n c8026 │ │ + b.n c8036 │ │ asrs r0, r0, #2 │ │ - b.n c796c │ │ + b.n c797c │ │ movs r4, r0 │ │ - b.n c7bae │ │ - cbnz r3, c78d6 │ │ + b.n c7bbe │ │ + cbnz r3, c78e6 │ │ @ instruction: 0xebff2000 │ │ - b.n c739e │ │ + b.n c73ae │ │ asrs r0, r0, #32 │ │ - b.n c7bba │ │ + b.n c7bca │ │ movs r0, r0 │ │ - b.n c7fbe │ │ + b.n c7fce │ │ movs r2, r0 │ │ - b.n c7b24 │ │ + b.n c7b34 │ │ movs r2, r0 │ │ ldrh r0, [r0, #16] │ │ asrs r1, r0, #4 │ │ - b.n c77b2 │ │ + b.n c77c2 │ │ lsls r5, r0, #2 │ │ - b.n c7b30 │ │ + b.n c7b40 │ │ movs r1, r0 │ │ movs r3, #0 │ │ ldrh r0, [r6, #0] │ │ ldmia.w sp!, {r4, r5, r6, r7, fp, lr} │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n c7db8 │ │ + b.n c7dc8 │ │ str r0, [r0, #0] │ │ - b.n c7be2 │ │ + b.n c7bf2 │ │ movs r4, r0 │ │ - b.n c73c6 │ │ + b.n c73d6 │ │ ands r0, r0 │ │ - b.n c7fea │ │ + b.n c7ffa │ │ movs r1, r0 │ │ - b.n c7b4e │ │ + b.n c7b5e │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ strh r6, [r0, #44] @ 0x2c │ │ str r1, [r0, r0] │ │ - b.n c7bfa │ │ + b.n c7c0a │ │ movs r0, r2 │ │ - b.n c73ea │ │ + b.n c73fa │ │ asrs r0, r0, #32 │ │ strh r0, [r4, #28] │ │ asrs r4, r1, #32 │ │ strh r6, [r0, #44] @ 0x2c │ │ asrs r5, r0, #8 │ │ - b.n c7c0a │ │ + b.n c7c1a │ │ mvns r0, r5 │ │ add.w r0, r0, r0 │ │ - b.n c7f72 │ │ + b.n c7f82 │ │ movs r5, r1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #32 │ │ - b.n c7406 │ │ + b.n c7416 │ │ strb r0, [r0, #0] │ │ - b.n c7c1e │ │ + b.n c7c2e │ │ movs r0, r2 │ │ - b.n c73ee │ │ + b.n c73fe │ │ movs r1, r0 │ │ - b.n c7b90 │ │ + b.n c7ba0 │ │ movs r3, r0 │ │ ldr r2, [sp, #0] │ │ lsls r1, r0, #8 │ │ - b.n c79fc │ │ + b.n c7a0c │ │ asrs r1, r0, #32 │ │ - b.n c797c │ │ + b.n c798c │ │ asrs r1, r0, #8 │ │ - b.n c7c36 │ │ - adds r4, #204 @ 0xcc │ │ - @ instruction: 0xfa000005 │ │ - b.n c7a0c │ │ + b.n c7c46 │ │ + adds r6, #59 @ 0x3b │ │ + mla r0, r0, r5, r0 │ │ + b.n c7a1c │ │ movs r4, r2 │ │ - b.n c740e │ │ + b.n c741e │ │ str r4, [r0, r0] │ │ - b.n c7412 │ │ + b.n c7422 │ │ movs r4, r0 │ │ - b.n c7c4a │ │ + b.n c7c5a │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r2, r3} │ │ - b.n c8052 │ │ + b.n c8062 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n c7e38 │ │ - beq.n c7928 │ │ - b.n c7dbc │ │ + b.n c7e48 │ │ + beq.n c7938 │ │ + b.n c7dcc │ │ ands r0, r1 │ │ - b.n c745c │ │ + b.n c746c │ │ strh r4, [r1, #0] │ │ - b.n c7460 │ │ + b.n c7470 │ │ strb r0, [r0, #0] │ │ - b.n c7456 │ │ + b.n c7466 │ │ str r4, [r0, #0] │ │ - b.n c745a │ │ + b.n c746a │ │ strb r7, [r0, #0] │ │ - b.n c79d6 │ │ + b.n c79e6 │ │ strb r6, [r0, #0] │ │ - b.n c7adc │ │ + b.n c7aec │ │ movs r7, r3 │ │ cmp r2, #0 │ │ str r4, [r0, r0] │ │ - b.n c7468 │ │ + b.n c7478 │ │ strb r4, [r3, #1] │ │ - b.n c74ea │ │ + b.n c74fa │ │ movs r0, r0 │ │ - b.n c7452 │ │ + b.n c7462 │ │ movs r0, r2 │ │ - b.n c7476 │ │ + b.n c7486 │ │ str r4, [r1, #0] │ │ - b.n c747c │ │ - add r7, pc, #96 @ (adr r7, c79b4 ) │ │ - b.n c7c96 │ │ + b.n c748c │ │ + add r7, pc, #96 @ (adr r7, c79c4 ) │ │ + b.n c7ca6 │ │ asrs r4, r0, #32 │ │ - b.n c7462 │ │ + b.n c7472 │ │ asrs r0, r2, #28 │ │ - b.n c7c9e │ │ + b.n c7cae │ │ movs r0, r0 │ │ - b.n c800e │ │ + b.n c801e │ │ movs r3, r4 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n c7496 │ │ + b.n c74a6 │ │ strb r0, [r1, #0] │ │ - b.n c7498 │ │ + b.n c74a8 │ │ movs r0, r0 │ │ - b.n c7a80 │ │ + b.n c7a90 │ │ movs r1, r0 │ │ - b.n c7c16 │ │ + b.n c7c26 │ │ movs r4, r4 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n c74aa │ │ + b.n c74ba │ │ strb r2, [r0, #0] │ │ - b.n c7cc2 │ │ + b.n c7cd2 │ │ lsls r0, r0, #6 │ │ - b.n c7a92 │ │ + b.n c7aa2 │ │ str r0, [sp, #32] │ │ - b.n c7e8a │ │ + b.n c7e9a │ │ movs r0, r0 │ │ - b.n c74b8 │ │ + b.n c74c8 │ │ movs r0, r0 │ │ - b.n c8032 │ │ + b.n c8042 │ │ movs r4, r7 │ │ lsrs r0, r0, #8 │ │ - add r0, pc, #48 @ (adr r0, c79c8 ) │ │ - b.n c74ac │ │ + add r0, pc, #48 @ (adr r0, c79d8 ) │ │ + b.n c74bc │ │ ands r0, r1 │ │ - b.n c74b0 │ │ + b.n c74c0 │ │ movs r0, r0 │ │ - b.n c74cc │ │ + b.n c74dc │ │ asrs r0, r0, #32 │ │ - b.n c74b8 │ │ + b.n c74c8 │ │ asrs r1, r0, #32 │ │ - b.n c80ea │ │ - add r0, pc, #32 @ (adr r0, c79cc ) │ │ - b.n c74b8 │ │ + b.n c80fa │ │ + add r0, pc, #32 @ (adr r0, c79dc ) │ │ + b.n c74c8 │ │ movs r1, r0 │ │ - b.n c7e32 │ │ + b.n c7e42 │ │ asrs r4, r0, #32 │ │ - b.n c74c8 │ │ + b.n c74d8 │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n c74c4 │ │ + b.n c74d4 │ │ movs r0, r0 │ │ - b.n c74c8 │ │ + b.n c74d8 │ │ movs r0, r2 │ │ - b.n c74ea │ │ + b.n c74fa │ │ movs r0, #16 │ │ - b.n c74ec │ │ + b.n c74fc │ │ asrs r4, r2, #32 │ │ - b.n c74f0 │ │ + b.n c7500 │ │ movs r0, r0 │ │ - b.n c7c72 │ │ + b.n c7c82 │ │ movs r2, r0 │ │ adds r1, #160 @ 0xa0 │ │ movs r0, r2 │ │ - b.n c74dc │ │ + b.n c74ec │ │ movs r0, r2 │ │ - b.n c7502 │ │ + b.n c7512 │ │ movs r0, r1 │ │ - b.n c7ade │ │ + b.n c7aee │ │ movs r0, r0 │ │ - b.n c7c84 │ │ + b.n c7c94 │ │ movs r1, r0 │ │ strh r0, [r4, #12] │ │ movs r4, r2 │ │ - b.n c74f0 │ │ + b.n c7500 │ │ movs r0, r0 │ │ - b.n c812e │ │ - beq.n c7a28 │ │ - b.n c7e88 │ │ + b.n c813e │ │ + beq.n c7a38 │ │ + b.n c7e98 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, ip, sp, lr} │ │ - b.n c7d3a │ │ + b.n c7d4a │ │ str r0, [sp, #64] @ 0x40 │ │ - b.n c7528 │ │ + b.n c7538 │ │ movs r0, r0 │ │ - b.n c752c │ │ + b.n c753c │ │ movs r0, r0 │ │ - b.n c80a6 │ │ + b.n c80b6 │ │ @ instruction: 0xffe21aff │ │ movs r6, r3 │ │ and.w r0, r0, sl │ │ - b.n c7b20 │ │ + b.n c7b30 │ │ lsls r7, r7, #16 │ │ - b.n c80b6 │ │ + b.n c80c6 │ │ @ instruction: 0xffd78aff │ │ stmia r0!, {r2} │ │ - b.n c754a │ │ - b.n c7a30 │ │ - b.n c7f2e │ │ + b.n c755a │ │ + b.n c7a40 │ │ + b.n c7f3e │ │ strb r4, [r1, #6] │ │ - b.n c7b42 │ │ + b.n c7b52 │ │ movs r0, r1 │ │ - b.n c7498 │ │ + b.n c74a8 │ │ str r0, [sp, #16] │ │ - b.n c755c │ │ + b.n c756c │ │ movs r0, r0 │ │ - b.n c7b44 │ │ + b.n c7b54 │ │ movs r4, r0 │ │ - b.n c7cd6 │ │ + b.n c7ce6 │ │ movs r4, r5 │ │ lsrs r0, r0, #8 │ │ lsls r4, r0, #3 │ │ - b.n c757c │ │ + b.n c758c │ │ movs r0, r0 │ │ - b.n c7b60 │ │ + b.n c7b70 │ │ movs r4, r2 │ │ - b.n c7566 │ │ + b.n c7576 │ │ movs r0, r0 │ │ - b.n c7d02 │ │ + b.n c7d12 │ │ @ instruction: 0xffca2aff │ │ movs r0, r0 │ │ - b.n c757c │ │ + b.n c758c │ │ strb r2, [r0, #0] │ │ - b.n c7d96 │ │ + b.n c7da6 │ │ movs r0, r0 │ │ - b.n c80fa │ │ + b.n c810a │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ sbcs r4, r1 │ │ - b.n c79be │ │ - add r0, pc, #16 @ (adr r0, c7a74 ) │ │ - b.n c7582 │ │ + b.n c79ce │ │ + add r0, pc, #16 @ (adr r0, c7a84 ) │ │ + b.n c7592 │ │ movs r4, r0 │ │ - b.n c7596 │ │ + b.n c75a6 │ │ movs r0, #8 │ │ - b.n c7598 │ │ + b.n c75a8 │ │ movs r1, r0 │ │ - b.n c7f72 │ │ + b.n c7f82 │ │ asrs r0, r0, #32 │ │ - b.n c75a0 │ │ + b.n c75b0 │ │ movs r4, r0 │ │ - b.n c7586 │ │ + b.n c7596 │ │ movs r2, r1 │ │ - b.n c7b82 │ │ + b.n c7b92 │ │ movs r0, r1 │ │ - b.n c758c │ │ + b.n c759c │ │ movs r1, r0 │ │ - b.n c7f08 │ │ + b.n c7f18 │ │ @ instruction: 0xffcbeaff │ │ movs r0, r0 │ │ - b.n c824e │ │ + b.n c825e │ │ str r3, [r0, r0] │ │ - b.n c7dd2 │ │ + b.n c7de2 │ │ movs r4, r1 │ │ - b.n c759c │ │ + b.n c75ac │ │ movs r3, r0 │ │ - b.n c7dda │ │ + b.n c7dea │ │ mcr2 11, 7, lr, cr14, cr15, {7} @ │ │ adds r0, #5 │ │ - b.n c7de2 │ │ + b.n c7df2 │ │ movs r0, r0 │ │ - b.n c8146 │ │ + b.n c8156 │ │ @ instruction: 0xffc41aff │ │ movs r0, #92 @ 0x5c │ │ - b.n c765c │ │ + b.n c766c │ │ asrs r0, r2, #32 │ │ - b.n c75da │ │ + b.n c75ea │ │ movs r4, r0 │ │ - b.n c75dc │ │ + b.n c75ec │ │ adds r2, #24 │ │ - b.n c7dfa │ │ + b.n c7e0a │ │ asrs r1, r2, #8 │ │ - b.n c7dfe │ │ + b.n c7e0e │ │ movs r0, #4 │ │ - b.n c7e02 │ │ + b.n c7e12 │ │ movs r0, r2 │ │ add.w r0, r0, r5, lsl #12 │ │ - b.n c7e0a │ │ + b.n c7e1a │ │ movs r0, r0 │ │ - b.n c816e │ │ + b.n c817e │ │ @ instruction: 0xffba0aff │ │ movs r3, r0 │ │ - b.n c7e16 │ │ + b.n c7e26 │ │ ands r3, r0 │ │ - b.n c7e1a │ │ + b.n c7e2a │ │ lsls r5, r2, #1 │ │ add.w r0, r0, r0 │ │ - b.n c82a2 │ │ + b.n c82b2 │ │ movs r4, r1 │ │ - b.n c75ee │ │ - beq.n c7b20 │ │ - b.n c7f80 │ │ + b.n c75fe │ │ + beq.n c7b30 │ │ + b.n c7f90 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, r3} │ │ - b.n c7c04 │ │ + b.n c7c14 │ │ movs r4, r0 │ │ - b.n c7604 │ │ + b.n c7614 │ │ movs r0, r1 │ │ - b.n c7624 │ │ + b.n c7634 │ │ movs r2, r1 │ │ - b.n c7bfe │ │ + b.n c7c0e │ │ movs r0, r1 │ │ - b.n c760c │ │ + b.n c761c │ │ @ instruction: 0xffadeaff │ │ - ldr r4, [r1, #96] @ 0x60 │ │ + ldr r4, [r3, #96] @ 0x60 │ │ movs r1, r0 │ │ - ldr r0, [pc, #960] @ (c7ecc ) │ │ + ldr r0, [pc, #960] @ (c7edc ) │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n c802c │ │ + b.n c803c │ │ ands r3, r0 │ │ - b.n c7e56 │ │ + b.n c7e66 │ │ adds r0, #12 │ │ - b.n c763a │ │ + b.n c764a │ │ movs r0, r0 │ │ - b.n c81c4 │ │ + b.n c81d4 │ │ movs r5, r2 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, #0] │ │ - b.n c764c │ │ + b.n c765c │ │ str r0, [r1, r0] │ │ - b.n c764a │ │ + b.n c765a │ │ str r6, [r0, #0] │ │ - b.n c7c38 │ │ + b.n c7c48 │ │ movs r1, r0 │ │ - b.n c7dde │ │ + b.n c7dee │ │ movs r5, r2 │ │ lsrs r0, r0, #8 │ │ strb r4, [r0, #0] │ │ - b.n c7660 │ │ + b.n c7670 │ │ adds r1, #135 @ 0x87 │ │ - b.n c7c44 │ │ + b.n c7c54 │ │ str r0, [r1, r0] │ │ - b.n c8048 │ │ + b.n c8058 │ │ adds r0, #0 │ │ - b.n c7666 │ │ + b.n c7676 │ │ movs r0, r0 │ │ - b.n c81f0 │ │ + b.n c8200 │ │ movs r7, r5 │ │ lsrs r0, r0, #8 │ │ movs r0, #8 │ │ - b.n c765c │ │ + b.n c766c │ │ movs r0, #1 │ │ - b.n c8296 │ │ + b.n c82a6 │ │ ands r4, r1 │ │ - b.n c7664 │ │ + b.n c7674 │ │ asrs r0, r0, #32 │ │ - b.n c7668 │ │ + b.n c7678 │ │ asrs r0, r0, #32 │ │ - b.n c7682 │ │ + b.n c7692 │ │ movs r0, #4 │ │ - b.n c7670 │ │ + b.n c7680 │ │ asrs r1, r0, #32 │ │ - b.n c7fec │ │ + b.n c7ffc │ │ lsrs r0, r7 │ │ - b.n c7eee │ │ + b.n c7efe │ │ asrs r0, r0, #32 │ │ - b.n c7672 │ │ + b.n c7682 │ │ movs r0, r0 │ │ - b.n c82b6 │ │ + b.n c82c6 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r4, ip, lr} │ │ - b.n c769e │ │ + b.n c76ae │ │ adds r0, #0 │ │ - b.n c76a2 │ │ + b.n c76b2 │ │ movs r0, r0 │ │ - b.n c822c │ │ + b.n c823c │ │ @ instruction: 0xfff01aff │ │ movs r7, r3 │ │ and.w r0, r0, r4, lsl #24 │ │ - b.n c7c9c │ │ + b.n c7cac │ │ lsls r7, r7, #16 │ │ - b.n c8242 │ │ + b.n c8252 │ │ @ instruction: 0xffe68aff │ │ - b.n c7ba4 │ │ - b.n c76c4 │ │ + b.n c7bb4 │ │ + b.n c76d4 │ │ stmia r0!, {r3} │ │ - b.n c80a8 │ │ + b.n c80b8 │ │ str r6, [r1, r6] │ │ - b.n c7cbe │ │ + b.n c7cce │ │ strb r0, [r1, #0] │ │ - b.n c7614 │ │ + b.n c7624 │ │ str r4, [r0, #0] │ │ - b.n c76d8 │ │ + b.n c76e8 │ │ strb r7, [r0, #0] │ │ - b.n c7cbe │ │ + b.n c7cce │ │ movs r2, r0 │ │ - b.n c7e64 │ │ + b.n c7e74 │ │ movs r6, r2 │ │ lsrs r0, r0, #8 │ │ str r0, [r6, r1] │ │ - b.n c76fc │ │ + b.n c770c │ │ str r5, [r0, r0] │ │ - b.n c7ce0 │ │ + b.n c7cf0 │ │ str r4, [r2, r0] │ │ - b.n c76f0 │ │ + b.n c7700 │ │ movs r5, r0 │ │ - b.n c7e86 │ │ + b.n c7e96 │ │ @ instruction: 0xffd92aff │ │ asrs r0, r0, #32 │ │ - b.n c76f2 │ │ + b.n c7702 │ │ movs r0, r0 │ │ - b.n c8278 │ │ + b.n c8288 │ │ movs r4, r1 │ │ lsrs r0, r0, #8 │ │ movs r1, #142 @ 0x8e │ │ - b.n c7b36 │ │ + b.n c7b46 │ │ ands r4, r0 │ │ - b.n c76fa │ │ + b.n c770a │ │ asrs r4, r0, #32 │ │ - b.n c770c │ │ + b.n c771c │ │ strb r0, [r1, #0] │ │ - b.n c770a │ │ + b.n c771a │ │ asrs r1, r0, #32 │ │ - b.n c80f0 │ │ + b.n c8100 │ │ movs r0, #0 │ │ - b.n c7712 │ │ + b.n c7722 │ │ asrs r4, r0, #32 │ │ - b.n c76fc │ │ + b.n c770c │ │ asrs r4, r0, #32 │ │ - b.n c7d08 │ │ + b.n c7d18 │ │ asrs r0, r1, #32 │ │ - b.n c76fe │ │ + b.n c770e │ │ asrs r1, r0, #32 │ │ - b.n c8086 │ │ + b.n c8096 │ │ asrs r0, r0, #32 │ │ - b.n c7706 │ │ + b.n c7716 │ │ movs r0, r0 │ │ - b.n c834a │ │ + b.n c835a │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {} │ │ - b.n c83d2 │ │ + b.n c83e2 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r2, ip} │ │ - b.n c7d26 │ │ + b.n c7d36 │ │ asrs r4, r0, #32 │ │ - b.n c7728 │ │ + b.n c7738 │ │ asrs r0, r1, #32 │ │ - b.n c7742 │ │ + b.n c7752 │ │ asrs r4, r0, #32 │ │ - b.n c7d28 │ │ + b.n c7d38 │ │ asrs r0, r1, #32 │ │ - b.n c772a │ │ + b.n c773a │ │ movs r0, r0 │ │ - b.n c836e │ │ + b.n c837e │ │ ldrh r0, [r6, #6] │ │ - ldmia.w sp!, {r2, r3, r7, sl, fp, sp, lr} │ │ + ldmia.w sp!, {r2, r3, r4, r7, sl, fp, sp, lr} │ │ movs r1, r0 │ │ - ldr r7, [pc, #960] @ (c7ff8 ) │ │ + ldr r7, [pc, #960] @ (c8008 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n c8158 │ │ - beq.n c7c88 │ │ - b.n c80dc │ │ + b.n c8168 │ │ + beq.n c7c98 │ │ + b.n c80ec │ │ movs r4, r3 │ │ - b.n c7760 │ │ + b.n c7770 │ │ movs r0, r0 │ │ - b.n c776a │ │ + b.n c777a │ │ movs r6, r0 │ │ - b.n c77ee │ │ + b.n c77fe │ │ movs r0, r1 │ │ - b.n c8272 │ │ + b.n c8282 │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ movs r4, r3 │ │ - b.n c7794 │ │ + b.n c77a4 │ │ movs r4, r0 │ │ - b.n c777e │ │ + b.n c778e │ │ movs r0, r2 │ │ - b.n c777c │ │ + b.n c778c │ │ movs r0, #16 │ │ - b.n c7786 │ │ + b.n c7796 │ │ movs r4, r1 │ │ - b.n c778a │ │ + b.n c779a │ │ movs r0, r0 │ │ - b.n c7f12 │ │ + b.n c7f22 │ │ movs r7, r0 │ │ ldr r2, [sp, #0] │ │ movs r4, r3 │ │ - b.n c77b0 │ │ + b.n c77c0 │ │ movs r0, #0 │ │ - b.n c83ba │ │ + b.n c83ca │ │ movs r4, r0 │ │ - b.n c779e │ │ + b.n c77ae │ │ asrs r4, r0, #32 │ │ - b.n c77a2 │ │ + b.n c77b2 │ │ movs r0, #12 │ │ - b.n c7786 │ │ + b.n c7796 │ │ asrs r0, r0, #32 │ │ - b.n c778a │ │ - beq.n c7cc4 │ │ - b.n c8124 │ │ + b.n c779a │ │ + beq.n c7cd4 │ │ + b.n c8134 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, r4} │ │ - b.n c77d0 │ │ + b.n c77e0 │ │ movs r0, r3 │ │ - b.n c819a │ │ + b.n c81aa │ │ movs r0, r3 │ │ - b.n c77b8 │ │ + b.n c77c8 │ │ movs r5, r0 │ │ and.w r0, r0, r0, lsr #4 │ │ - b.n c77e0 │ │ + b.n c77f0 │ │ lsls r1, r1, #6 │ │ - b.n c7dae │ │ + b.n c7dbe │ │ movs r0, #8 │ │ - b.n c81ae │ │ + b.n c81be │ │ asrs r4, r1, #32 │ │ - b.n c77d4 │ │ + b.n c77e4 │ │ movs r2, r0 │ │ - b.n c7f58 │ │ + b.n c7f68 │ │ @ instruction: 0xffed3aff │ │ movs r2, r0 │ │ - b.n c7ffe │ │ + b.n c800e │ │ str r0, [sp, #0] │ │ - b.n c8402 │ │ - add r0, pc, #32 @ (adr r0, c7ce4 ) │ │ - b.n c75e6 │ │ + b.n c8412 │ │ + add r0, pc, #32 @ (adr r0, c7cf4 ) │ │ + b.n c75f6 │ │ movs r0, r4 │ │ - b.n c77e4 │ │ + b.n c77f4 │ │ movs r0, #20 │ │ - b.n c77e8 │ │ + b.n c77f8 │ │ ands r0, r4 │ │ - b.n c780c │ │ + b.n c781c │ │ movs r4, r3 │ │ - b.n c7810 │ │ + b.n c7820 │ │ str r1, [r1, #24] │ │ - b.n c7c42 │ │ + b.n c7c52 │ │ strb r0, [r0, #0] │ │ - b.n c77fe │ │ + b.n c780e │ │ movs r4, r1 │ │ - b.n c7802 │ │ + b.n c7812 │ │ str r4, [r0, r0] │ │ - b.n c780e │ │ + b.n c781e │ │ movs r0, r0 │ │ - b.n c838a │ │ + b.n c839a │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ movs r0, r3 │ │ - b.n c782c │ │ + b.n c783c │ │ lsls r0, r2, #3 │ │ - b.n c8076 │ │ + b.n c8086 │ │ movs r1, r0 │ │ - b.n c7cfa │ │ + b.n c7d0a │ │ movs r1, r0 │ │ - b.n c83de │ │ + b.n c83ee │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r2 │ │ - b.n c7834 │ │ + b.n c7844 │ │ movs r0, #5 │ │ - b.n c804a │ │ + b.n c805a │ │ strh r0, [r0, #0] │ │ - b.n c7e22 │ │ + b.n c7e32 │ │ movs r6, r0 │ │ - b.n c8052 │ │ + b.n c8062 │ │ asrs r0, r1, #32 │ │ - b.n c8056 │ │ + b.n c8066 │ │ cmn r1, r2 │ │ add.w r0, r0, r4, lsr #8 │ │ - b.n c7858 │ │ + b.n c7868 │ │ movs r0, r0 │ │ - b.n c83c2 │ │ + b.n c83d2 │ │ lsls r1, r2, #1 │ │ subs r0, r0, r0 │ │ movs r0, r1 │ │ - b.n c7858 │ │ + b.n c7868 │ │ movs r5, r0 │ │ - b.n c7fce │ │ + b.n c7fde │ │ movs r2, r2 │ │ subs r0, r0, r0 │ │ movs r7, r0 │ │ - b.n c78e4 │ │ + b.n c78f4 │ │ movs r0, r1 │ │ - b.n c835a │ │ + b.n c836a │ │ movs r4, r7 │ │ subs r0, r0, r0 │ │ asrs r0, r6, #2 │ │ - b.n c7870 │ │ + b.n c7880 │ │ lsls r0, r3, #4 │ │ - b.n c7874 │ │ + b.n c7884 │ │ movs r1, r0 │ │ - b.n c7fea │ │ + b.n c7ffa │ │ lsls r3, r0, #1 │ │ cmp r2, #0 │ │ asrs r4, r3, #4 │ │ - b.n c7880 │ │ + b.n c7890 │ │ movs r1, r0 │ │ - b.n c8256 │ │ + b.n c8266 │ │ asrs r4, r2, #32 │ │ - b.n c7866 │ │ + b.n c7876 │ │ lsls r0, r3, #4 │ │ - b.n c786c │ │ + b.n c787c │ │ str r4, [r3, #16] │ │ - b.n c7870 │ │ + b.n c7880 │ │ movs r4, r0 │ │ - b.n c788e │ │ + b.n c789e │ │ str r0, [sp, #4] │ │ - b.n c827c │ │ + b.n c828c │ │ asrs r4, r0, #32 │ │ - b.n c7892 │ │ - add r0, pc, #40 @ (adr r0, c7d98 ) │ │ - b.n c7e72 │ │ + b.n c78a2 │ │ + add r0, pc, #40 @ (adr r0, c7da8 ) │ │ + b.n c7e82 │ │ movs r1, r0 │ │ - b.n c8028 │ │ + b.n c8038 │ │ @ instruction: 0xffd41aff │ │ @ instruction: 0xffc8eaff │ │ lsls r2, r7, #2 │ │ - b.n c812e │ │ + b.n c813e │ │ strh r1, [r0, #0] │ │ - b.n c84c6 │ │ + b.n c84d6 │ │ stmia r0!, {r2, r3, r4, r6} │ │ - b.n c7938 │ │ + b.n c7948 │ │ movs r4, r0 │ │ - b.n c83ae │ │ + b.n c83be │ │ movs r7, r0 │ │ - b.n c7940 │ │ + b.n c7950 │ │ strh r4, [r1, #0] │ │ asrs r6, r2, #22 │ │ movs r0, r1 │ │ - b.n c83ba │ │ + b.n c83ca │ │ adds r0, r3, #0 │ │ - b.n c80de │ │ + b.n c80ee │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n c8456 │ │ + b.n c8466 │ │ movs r6, r2 │ │ subs r0, r0, r0 │ │ adds r0, #176 @ 0xb0 │ │ - b.n c78dc │ │ + b.n c78ec │ │ lsls r0, r3, #4 │ │ - b.n c78e0 │ │ + b.n c78f0 │ │ movs r3, r0 │ │ - b.n c8056 │ │ + b.n c8066 │ │ movs r2, r2 │ │ cmp r2, #0 │ │ adds r1, #28 │ │ - b.n c78ec │ │ + b.n c78fc │ │ movs r1, r0 │ │ - b.n c82c2 │ │ + b.n c82d2 │ │ adds r0, #20 │ │ - b.n c78d2 │ │ + b.n c78e2 │ │ lsls r0, r3, #4 │ │ - b.n c78d8 │ │ + b.n c78e8 │ │ str r4, [r3, #16] │ │ - b.n c78dc │ │ + b.n c78ec │ │ ldr r0, [r3, #64] @ 0x40 │ │ - b.n c7ede │ │ + b.n c7eee │ │ str r1, [r0, r0] │ │ - b.n c7e80 │ │ + b.n c7e90 │ │ @ instruction: 0xffe81aff │ │ @ instruction: 0xffe0eaff │ │ movs r6, r0 │ │ - b.n c8122 │ │ + b.n c8132 │ │ movs r0, #255 @ 0xff │ │ - b.n c8526 │ │ + b.n c8536 │ │ asrs r4, r1, #32 │ │ - b.n c7904 │ │ + b.n c7914 │ │ stmia r0!, {r3} │ │ - b.n c7908 │ │ - adds r4, #175 @ 0xaf │ │ - mla r0, r0, r8, ip │ │ - b.n c7930 │ │ + b.n c7918 │ │ + adds r5, #36 @ 0x24 │ │ + @ instruction: 0xfa00c008 │ │ + b.n c7940 │ │ asrs r4, r1, #32 │ │ - b.n c7934 │ │ + b.n c7944 │ │ movs r0, #20 │ │ - b.n c7938 │ │ + b.n c7948 │ │ movs r1, r0 │ │ - b.n c84b2 │ │ + b.n c84c2 │ │ @ instruction: 0xffe80aff │ │ movs r4, r0 │ │ - b.n c8296 │ │ + b.n c82a6 │ │ asrs r4, r1, #32 │ │ - b.n c7928 │ │ + b.n c7938 │ │ stmia r0!, {r3} │ │ - b.n c792c │ │ + b.n c793c │ │ negs r2, r5 │ │ @ instruction: 0xeb00c008 │ │ - b.n c7954 │ │ + b.n c7964 │ │ asrs r4, r1, #32 │ │ - b.n c7958 │ │ + b.n c7968 │ │ movs r0, #20 │ │ - b.n c795c │ │ + b.n c796c │ │ ldr r0, [r3, #64] @ 0x40 │ │ - b.n c7f32 │ │ + b.n c7f42 │ │ str r1, [r0, r0] │ │ - b.n c7ed4 │ │ + b.n c7ee4 │ │ @ instruction: 0xffd31aff │ │ @ instruction: 0xffcbeaff │ │ lsls r4, r3, #1 │ │ - b.n c79e4 │ │ + b.n c79f4 │ │ asrs r1, r0, #32 │ │ - b.n c857a │ │ + b.n c858a │ │ movs r0, #255 @ 0xff │ │ - b.n c857e │ │ + b.n c858e │ │ asrs r1, r2, #32 │ │ - b.n c8182 │ │ + b.n c8192 │ │ movs r6, r0 │ │ - b.n c8186 │ │ - adds r4, #153 @ 0x99 │ │ - mls r0, r0, r4, r2 │ │ - b.n c7988 │ │ + b.n c8196 │ │ + adds r5, #14 │ │ + @ instruction: 0xfa002014 │ │ + b.n c7998 │ │ asrs r0, r6, #2 │ │ - b.n c7980 │ │ + b.n c7990 │ │ lsls r0, r3, #4 │ │ - b.n c7984 │ │ + b.n c7994 │ │ movs r1, r0 │ │ - b.n c80fa │ │ + b.n c810a │ │ @ instruction: 0xffbb3aff │ │ movs r4, r0 │ │ - b.n c82ee │ │ + b.n c82fe │ │ negs r6, r2 │ │ add.w r0, r0, r4, lsr #8 │ │ - b.n c79a4 │ │ + b.n c79b4 │ │ @ instruction: 0xffbceaff │ │ asrs r0, r3, #32 │ │ - b.n c79ac │ │ + b.n c79bc │ │ movs r0, #0 │ │ - b.n c85b6 │ │ + b.n c85c6 │ │ lsls r0, r1, #1 │ │ - b.n c79a8 │ │ + b.n c79b8 │ │ movs r0, #0 │ │ - b.n c7980 │ │ + b.n c7990 │ │ movs r0, #4 │ │ - b.n c7984 │ │ + b.n c7994 │ │ asrs r2, r0, #4 │ │ - b.n c8646 │ │ + b.n c8656 │ │ movs r0, #160 @ 0xa0 │ │ - b.n c79aa │ │ + b.n c79ba │ │ lsls r2, r1, #4 │ │ - b.n c8572 │ │ + b.n c8582 │ │ asrs r0, r4, #2 │ │ str r5, [sp, #576] @ 0x240 │ │ movs r0, #148 @ 0x94 │ │ - b.n c79d4 │ │ + b.n c79e4 │ │ asrs r1, r0, #32 │ │ str r2, [sp, #516] @ 0x204 │ │ movs r0, #2 │ │ - b.n c7fbc │ │ + b.n c7fcc │ │ movs r0, #90 @ 0x5a │ │ - b.n c7a46 │ │ + b.n c7a56 │ │ asrs r0, r4, #2 │ │ - b.n c79a6 │ │ + b.n c79b6 │ │ movs r2, r0 │ │ - b.n c854e │ │ + b.n c855e │ │ movs r5, r1 │ │ cmp r2, #0 │ │ asrs r0, r2, #32 │ │ - b.n c79de │ │ + b.n c79ee │ │ movs r0, #7 │ │ - b.n c81f6 │ │ + b.n c8206 │ │ movs r0, r3 │ │ - b.n c79f4 │ │ + b.n c7a04 │ │ stlexd pc, lr, fp, [ip] │ │ movs r1, r0 │ │ - b.n c85a2 │ │ + b.n c85b2 │ │ movs r3, r2 │ │ subs r0, r0, r0 │ │ movs r6, r0 │ │ - b.n c820a │ │ + b.n c821a │ │ asrs r0, r1, #32 │ │ - b.n c820e │ │ + b.n c821e │ │ movs r0, #5 │ │ - b.n c8212 │ │ + b.n c8222 │ │ negs r2, r4 │ │ add.w r0, r0, r4, lsr #8 │ │ - b.n c7a14 │ │ + b.n c7a24 │ │ movs r0, r0 │ │ - b.n c857e │ │ + b.n c858e │ │ @ instruction: 0xff900aff │ │ @ instruction: 0xfff1eaff │ │ movs r0, r2 │ │ - b.n c7a16 │ │ + b.n c7a26 │ │ movs r0, #94 @ 0x5e │ │ - b.n c862e │ │ + b.n c863e │ │ asrs r4, r7, #32 │ │ - b.n c7a30 │ │ + b.n c7a40 │ │ asrs r1, r0, #32 │ │ - b.n c8014 │ │ + b.n c8024 │ │ lsls r0, r6, #3 │ │ - b.n c8294 │ │ + b.n c82a4 │ │ movs r2, r0 │ │ - b.n c863e │ │ + b.n c864e │ │ asrs r0, r6, #32 │ │ - b.n c7a40 │ │ + b.n c7a50 │ │ adds r0, #48 @ 0x30 │ │ - b.n c7a44 │ │ + b.n c7a54 │ │ asrs r1, r0, #32 │ │ - b.n c8028 │ │ + b.n c8038 │ │ adds r0, #3 │ │ - b.n c802c │ │ - ldr r4, [pc, #788] @ (c8224 ) │ │ + b.n c803c │ │ + ldr r4, [pc, #784] @ (c8230 ) │ │ @ instruction: 0xebffffe5 │ │ @ instruction: 0xeaff001c │ │ - b.n c7a54 │ │ + b.n c7a64 │ │ asrs r5, r0, #31 │ │ - b.n c852e │ │ + b.n c853e │ │ subs r7, r7, #7 │ │ - b.n c85c0 │ │ + b.n c85d0 │ │ movs r0, #20 │ │ - b.n c7a60 │ │ + b.n c7a70 │ │ asrs r4, r1, #32 │ │ - b.n c7a2a │ │ + b.n c7a3a │ │ vpmin.u q15, , │ │ - ldr r0, [r6, #24] │ │ + ldr r0, [r0, #28] │ │ movs r1, r0 │ │ - ldr r7, [pc, #700] @ (c81f0 ) │ │ - @ instruction: 0xfff42eb2 │ │ - vshll.u32 q10, d14, #20 │ │ + str r2, [r4, r0] │ │ + vqrdmulh.s q9, q10, d17[0] │ │ + vshll.u32 q10, d19, #20 │ │ vsri.64 , q2, #12 │ │ - bmi.n c7eea │ │ - ldr r7, [pc, #960] @ (c8304 ) │ │ + bmi.n c7efa │ │ + ldr r7, [pc, #960] @ (c8314 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n c8464 │ │ - beq.n c7f84 │ │ - b.n c83e8 │ │ + b.n c8474 │ │ + beq.n c7f94 │ │ + b.n c83f8 │ │ strh r4, [r1, #0] │ │ - b.n c7a72 │ │ - add r0, pc, #4 @ (adr r0, c7f58 ) │ │ - b.n c8296 │ │ - b.n c7f58 │ │ - b.n c829a │ │ + b.n c7a82 │ │ + add r0, pc, #4 @ (adr r0, c7f68 ) │ │ + b.n c82a6 │ │ + b.n c7f68 │ │ + b.n c82aa │ │ movs r0, r0 │ │ - b.n c8602 │ │ + b.n c8612 │ │ strb r0, [r6, #0] │ │ - b.n c8472 │ │ + b.n c8482 │ │ lsls r4, r6, #3 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n c7a8e │ │ + b.n c7a9e │ │ lsrs r0, r2 │ │ - b.n c82fc │ │ + b.n c830c │ │ asrs r4, r0, #32 │ │ - b.n c7a96 │ │ + b.n c7aa6 │ │ str r4, [r0, #0] │ │ - b.n c8016 │ │ + b.n c8026 │ │ str r5, [r0, #0] │ │ - b.n c811c │ │ + b.n c812c │ │ movs r5, r0 │ │ cmp r2, #0 │ │ movs r0, r0 │ │ - b.n c86c2 │ │ + b.n c86d2 │ │ strb r1, [r0, #0] │ │ - b.n c86c6 │ │ + b.n c86d6 │ │ movs r0, r2 │ │ - b.n c7aa4 │ │ + b.n c7ab4 │ │ asrs r0, r0, #32 │ │ - b.n c86ce │ │ + b.n c86de │ │ str r0, [sp, #0] │ │ - b.n c86d2 │ │ + b.n c86e2 │ │ movs r7, r5 │ │ and.w r0, r0, r8, lsr #27 │ │ - b.n c8328 │ │ + b.n c8338 │ │ strb r7, [r0, #0] │ │ - b.n c7fe0 │ │ + b.n c7ff0 │ │ str r6, [r0, #0] │ │ - b.n c7fe2 │ │ + b.n c7ff2 │ │ strb r7, [r0, #0] │ │ - b.n c82d2 │ │ + b.n c82e2 │ │ movs r6, r2 │ │ subs r0, r0, r0 │ │ strb r0, [r0, #9] │ │ - b.n c7ade │ │ + b.n c7aee │ │ str r0, [sp, #4] │ │ - b.n c86f2 │ │ + b.n c8702 │ │ movs r0, r0 │ │ - b.n c8664 │ │ + b.n c8674 │ │ movs r2, r4 │ │ lsrs r0, r0, #8 │ │ movs r7, r0 │ │ - b.n c82fe │ │ + b.n c830e │ │ asrs r2, r1, #32 │ │ - b.n c8302 │ │ + b.n c8312 │ │ str r6, [r1, #0] │ │ - b.n c8306 │ │ + b.n c8316 │ │ ands r2, r0 │ │ - b.n c830a │ │ + b.n c831a │ │ str r3, [r0, r0] │ │ - b.n c830e │ │ + b.n c831e │ │ @ instruction: 0xb88a │ │ @ instruction: 0xebff1080 │ │ - b.n c80d6 │ │ + b.n c80e6 │ │ adds r0, #5 │ │ - b.n c831a │ │ + b.n c832a │ │ movs r0, #4 │ │ - b.n c831e │ │ - b.n c7fec │ │ - b.n c8322 │ │ + b.n c832e │ │ + b.n c7ffc │ │ + b.n c8332 │ │ asrs r1, r0, #4 │ │ - b.n c80f4 │ │ + b.n c8104 │ │ strb r4, [r2, #0] │ │ - b.n c7b0c │ │ + b.n c7b1c │ │ asrs r0, r0, #32 │ │ - b.n c872e │ │ + b.n c873e │ │ movs r2, r1 │ │ - b.n c82a0 │ │ + b.n c82b0 │ │ strb r0, [r0, #0] │ │ - b.n c8736 │ │ + b.n c8746 │ │ movs r1, r0 │ │ asrs r0, r4, #6 │ │ movs r0, r2 │ │ - b.n c7b18 │ │ + b.n c7b28 │ │ movs r0, r0 │ │ - b.n c8742 │ │ + b.n c8752 │ │ movs r3, r2 │ │ and.w r0, r0, r0 │ │ - b.n c80b2 │ │ + b.n c80c2 │ │ movs r1, r0 │ │ - b.n c81b8 │ │ + b.n c81c8 │ │ movs r3, r0 │ │ cmp r2, #0 │ │ asrs r0, r0, #32 │ │ - b.n c8756 │ │ + b.n c8766 │ │ movs r1, r0 │ │ - b.n c875a │ │ + b.n c876a │ │ asrs r0, r2, #32 │ │ - b.n c7b38 │ │ + b.n c7b48 │ │ movs r5, r0 │ │ and.w r2, r0, r4, lsr #29 │ │ - b.n c7b56 │ │ + b.n c7b66 │ │ movs r0, r0 │ │ - b.n c876a │ │ + b.n c877a │ │ movs r0, r2 │ │ - b.n c7b48 │ │ + b.n c7b58 │ │ movs r0, r0 │ │ - b.n c86e0 │ │ + b.n c86f0 │ │ lsls r4, r4, #6 │ │ subs r0, r0, r0 │ │ asrs r0, r0, #32 │ │ - b.n c877a │ │ + b.n c878a │ │ strb r0, [r0, #0] │ │ - b.n c877e │ │ + b.n c878e │ │ str r0, [sp, #0] │ │ - b.n c8782 │ │ + b.n c8792 │ │ movs r3, r0 │ │ and.w r0, r0, r0 │ │ - b.n c878a │ │ + b.n c879a │ │ asrs r0, r0, #32 │ │ - b.n c878e │ │ + b.n c879e │ │ movs r0, r2 │ │ - b.n c7b6c │ │ + b.n c7b7c │ │ strb r0, [r0, #0] │ │ - b.n c8796 │ │ + b.n c87a6 │ │ movs r4, r0 │ │ - b.n c8680 │ │ + b.n c8690 │ │ lsls r2, r1, #3 │ │ subs r0, r0, r0 │ │ str r1, [r0, #0] │ │ - b.n c8468 │ │ + b.n c8478 │ │ ands r4, r0 │ │ - b.n c7c22 │ │ + b.n c7c32 │ │ stmia r0!, {r4} │ │ - b.n c7ba6 │ │ + b.n c7bb6 │ │ adds r0, #1 │ │ - b.n c84ba │ │ + b.n c84ca │ │ movs r1, r0 │ │ - b.n c869a │ │ + b.n c86aa │ │ lsls r1, r1, #3 │ │ subs r0, r0, r0 │ │ str r4, [r1, r0] │ │ - b.n c7bb2 │ │ + b.n c7bc2 │ │ str r6, [r0, #0] │ │ - b.n c8108 │ │ + b.n c8118 │ │ str r4, [r1, #0] │ │ - b.n c7b9a │ │ + b.n c7baa │ │ str r0, [r2, r0] │ │ - b.n c859e │ │ + b.n c85ae │ │ str r1, [r0, #0] │ │ - b.n c87ca │ │ + b.n c87da │ │ ands r0, r0 │ │ - b.n c7bb8 │ │ + b.n c7bc8 │ │ movs r0, r0 │ │ - b.n c8740 │ │ + b.n c8750 │ │ adds r0, #3 │ │ - b.n c811e │ │ + b.n c812e │ │ adds r0, #0 │ │ - b.n c7ba4 │ │ + b.n c7bb4 │ │ movs r3, r1 │ │ lsrs r0, r0, #8 │ │ movs r2, #68 @ 0x44 │ │ - b.n c7c12 │ │ + b.n c7c22 │ │ adds r0, #0 │ │ - b.n c7bca │ │ + b.n c7bda │ │ movs r4, r0 │ │ - b.n c7ace │ │ + b.n c7ade │ │ asrs r6, r0, #32 │ │ - b.n c81b4 │ │ + b.n c81c4 │ │ movs r1, r0 │ │ - b.n c8352 │ │ + b.n c8362 │ │ lsls r7, r7, #2 │ │ subs r2, #0 │ │ movs r1, r0 │ │ - b.n c8766 │ │ + b.n c8776 │ │ lsls r5, r0, #3 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n c85c8 │ │ + b.n c85d8 │ │ movs r0, r0 │ │ - b.n c7bca │ │ - add r1, pc, #0 @ (adr r1, c80c8 ) │ │ - b.n c7fce │ │ + b.n c7bda │ │ + add r1, pc, #0 @ (adr r1, c80d8 ) │ │ + b.n c7fde │ │ movs r7, r4 │ │ and.w r0, r0, r8, asr #12 │ │ - b.n c7c02 │ │ + b.n c7c12 │ │ strb r2, [r1, #0] │ │ - b.n c81e2 │ │ + b.n c81f2 │ │ movs r3, r0 │ │ - b.n c8388 │ │ + b.n c8398 │ │ lsls r3, r1, #3 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n c8794 │ │ + b.n c87a4 │ │ movs r4, r4 │ │ lsrs r0, r0, #8 │ │ strb r0, [r0, #0] │ │ - b.n c88aa │ │ + b.n c88ba │ │ movs r1, r0 │ │ - b.n c879a │ │ + b.n c87aa │ │ lsls r2, r6, #3 │ │ subs r0, r0, r0 │ │ asrs r0, r0, #1 │ │ - b.n c7c26 │ │ + b.n c7c36 │ │ lsls r4, r1, #9 │ │ - b.n c7c2a │ │ + b.n c7c3a │ │ str r0, [r1, r3] │ │ - b.n c7ca0 │ │ + b.n c7cb0 │ │ movs r5, r0 │ │ - b.n c83a2 │ │ + b.n c83b2 │ │ lsls r6, r5, #3 │ │ cmp r2, #0 │ │ movs r5, r0 │ │ - b.n c83b0 │ │ + b.n c83c0 │ │ movs r2, r0 │ │ ldr r2, [sp, #0] │ │ movs r2, r1 │ │ - b.n c821c │ │ + b.n c822c │ │ movs r0, r0 │ │ - b.n c83bc │ │ + b.n c83cc │ │ lsls r1, r5, #3 │ │ ldr r2, [sp, #0] │ │ adds r0, #16 │ │ - b.n c7c58 │ │ + b.n c7c68 │ │ movs r0, r0 │ │ - b.n c87c8 │ │ + b.n c87d8 │ │ movs r0, r7 │ │ lsrs r0, r0, #8 │ │ movs r7, r0 │ │ - b.n c7ccc │ │ + b.n c7cdc │ │ movs r0, r1 │ │ - b.n c874e │ │ + b.n c875e │ │ lsls r1, r0, #4 │ │ subs r0, r0, r0 │ │ lsrs r1, r0, #4 │ │ - b.n c8876 │ │ + b.n c8886 │ │ strb r0, [r0, #0] │ │ - b.n c7c3e │ │ + b.n c7c4e │ │ lsls r2, r7, #2 │ │ - b.n c84c2 │ │ + b.n c84d2 │ │ strb r4, [r0, #0] │ │ - b.n c7c46 │ │ + b.n c7c56 │ │ lsls r0, r1, #9 │ │ - b.n c7c76 │ │ + b.n c7c86 │ │ movs r4, r2 │ │ - b.n c7c4e │ │ + b.n c7c5e │ │ asrs r4, r1, #9 │ │ - b.n c7c7e │ │ + b.n c7c8e │ │ lsls r4, r6, #8 │ │ - b.n c7c82 │ │ + b.n c7c92 │ │ asrs r1, r0, #32 │ │ - b.n c8658 │ │ + b.n c8668 │ │ asrs r4, r1, #9 │ │ - b.n c7c6a │ │ + b.n c7c7a │ │ asrs r2, r0, #32 │ │ - b.n c8672 │ │ + b.n c8682 │ │ movs r2, #72 @ 0x48 │ │ - b.n c7c72 │ │ + b.n c7c82 │ │ movs r0, r0 │ │ - b.n c8408 │ │ + b.n c8418 │ │ movs r1, r0 │ │ strh r0, [r4, #12] │ │ lsls r4, r6, #8 │ │ - b.n c7c7e │ │ + b.n c7c8e │ │ movs r0, r0 │ │ - b.n c88b2 │ │ - beq.n c81ac │ │ - b.n c860c │ │ + b.n c88c2 │ │ + beq.n c81bc │ │ + b.n c861c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {} │ │ - b.n c8820 │ │ + b.n c8830 │ │ movs r6, r3 │ │ lsrs r0, r0, #8 │ │ lsls r0, r2, #9 │ │ - b.n c7cb6 │ │ + b.n c7cc6 │ │ movs r2, #84 @ 0x54 │ │ - b.n c7cba │ │ + b.n c7cca │ │ movs r1, r0 │ │ - b.n c842e │ │ + b.n c843e │ │ movs r1, r0 │ │ movs r1, #160 @ 0xa0 │ │ lsls r0, r2, #9 │ │ - b.n c7ca6 │ │ + b.n c7cb6 │ │ lsls r1, r0, #4 │ │ - b.n c80be │ │ + b.n c80ce │ │ movs r1, r0 │ │ - b.n c889e │ │ + b.n c88ae │ │ lsls r1, r0, #4 │ │ - b.n c80a6 │ │ + b.n c80b6 │ │ lsls r4, r2, #9 │ │ - b.n c7cd6 │ │ + b.n c7ce6 │ │ movs r0, #0 │ │ - b.n c7cca │ │ + b.n c7cda │ │ movs r1, r0 │ │ - b.n c8452 │ │ + b.n c8462 │ │ movs r0, #1 │ │ lsls r2, r0, #9 │ │ movs r2, r0 │ │ - b.n c8862 │ │ + b.n c8872 │ │ movs r0, #0 │ │ - b.n c7cba │ │ + b.n c7cca │ │ lsls r3, r2, #4 │ │ cmp r2, #0 │ │ str r0, [r1, r0] │ │ - b.n c8502 │ │ + b.n c8512 │ │ str r0, [r2, r0] │ │ - b.n c7cf0 │ │ + b.n c7d00 │ │ movs r0, r0 │ │ - b.n c8874 │ │ + b.n c8884 │ │ lsls r4, r0, #1 │ │ lsrs r0, r0, #8 │ │ strb r0, [r0, #9] │ │ - b.n c7cfc │ │ + b.n c7d0c │ │ asrs r2, r1, #32 │ │ - b.n c8516 │ │ + b.n c8526 │ │ movs r7, r0 │ │ - b.n c851a │ │ + b.n c852a │ │ @ instruction: 0xb807 │ │ @ instruction: 0xebff0000 │ │ - b.n c8882 │ │ + b.n c8892 │ │ @ instruction: 0xfff60aff │ │ lsls r0, r0, #2 │ │ - b.n c82ea │ │ + b.n c82fa │ │ lsls r0, r0, #4 │ │ - b.n c82fc │ │ + b.n c830c │ │ movs r4, r2 │ │ - b.n c7d12 │ │ + b.n c7d22 │ │ movs r2, r1 │ │ - b.n c8496 │ │ + b.n c84a6 │ │ @ instruction: 0xfff11aff │ │ @ instruction: 0xffa7eaff │ │ movs r0, r0 │ │ - b.n c88a2 │ │ + b.n c88b2 │ │ @ instruction: 0xffa50aff │ │ movs r5, r6 │ │ and.w r2, r0, r0, lsl #1 │ │ - b.n c7d3e │ │ + b.n c7d4e │ │ movs r0, r0 │ │ - b.n c88b2 │ │ + b.n c88c2 │ │ @ instruction: 0xffc30aff │ │ movs r7, r0 │ │ - b.n c7dbc │ │ + b.n c7dcc │ │ movs r0, r1 │ │ - b.n c883e │ │ + b.n c884e │ │ lsls r3, r5, #2 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n c8966 │ │ + b.n c8976 │ │ strb r0, [r0, #0] │ │ - b.n c7d2e │ │ + b.n c7d3e │ │ lsls r2, r7, #2 │ │ - b.n c85b2 │ │ + b.n c85c2 │ │ strb r4, [r0, #0] │ │ - b.n c7d36 │ │ + b.n c7d46 │ │ asrs r0, r0, #9 │ │ - b.n c7d66 │ │ + b.n c7d76 │ │ movs r0, r0 │ │ - b.n c88dc │ │ + b.n c88ec │ │ movs r4, r4 │ │ lsrs r0, r0, #8 │ │ str r2, [r0, r0] │ │ - b.n c8582 │ │ + b.n c8592 │ │ movs r5, r0 │ │ ldmia.w r1, {r0, r1, ip, sp, lr} │ │ - b.n c858a │ │ + b.n c859a │ │ adds r0, #8 │ │ - b.n c7d70 │ │ + b.n c7d80 │ │ movs r7, r0 │ │ - b.n c84f2 │ │ + b.n c8502 │ │ movs r0, #1 │ │ - b.n c86da │ │ + b.n c86ea │ │ movs r1, r0 │ │ movs r2, #64 @ 0x40 │ │ adds r0, #6 │ │ - b.n c82e4 │ │ + b.n c82f4 │ │ movs r5, r1 │ │ stmia.w r1, {r0, r1, r2} │ │ - b.n c82ea │ │ + b.n c82fa │ │ movs r0, #24 │ │ - b.n c89aa │ │ + b.n c89ba │ │ lsls r0, r0, #2 │ │ - b.n c836e │ │ + b.n c837e │ │ movs r1, #0 │ │ - b.n c8376 │ │ + b.n c8386 │ │ lsls r7, r0, #2 │ │ - b.n c8384 │ │ + b.n c8394 │ │ asrs r0, r0, #4 │ │ - b.n c837c │ │ + b.n c838c │ │ movs r0, r2 │ │ - b.n c8780 │ │ + b.n c8790 │ │ asrs r4, r3, #32 │ │ - b.n c8784 │ │ - adds r4, #80 @ 0x50 │ │ + b.n c8794 │ │ + adds r3, #129 @ 0x81 │ │ @ instruction: 0xfb00023c │ │ - b.n c7dba │ │ + b.n c7dca │ │ strb r0, [r0, #1] │ │ - b.n c7dbe │ │ + b.n c7dce │ │ movs r1, r0 │ │ - b.n c8792 │ │ + b.n c87a2 │ │ lsls r4, r7, #8 │ │ - b.n c7da6 │ │ + b.n c7db6 │ │ movs r7, r0 │ │ - b.n c7e48 │ │ + b.n c7e58 │ │ movs r0, r1 │ │ - b.n c88be │ │ + b.n c88ce │ │ lsls r2, r7, #4 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n c8952 │ │ + b.n c8962 │ │ lsls r7, r7, #4 │ │ subs r0, r0, r0 │ │ asrs r0, r6, #2 │ │ - b.n c7ddc │ │ + b.n c7dec │ │ lsls r0, r3, #4 │ │ - b.n c7de0 │ │ + b.n c7df0 │ │ movs r1, r0 │ │ - b.n c8556 │ │ + b.n c8566 │ │ lsls r3, r7, #4 │ │ cmp r2, #0 │ │ asrs r4, r3, #4 │ │ - b.n c7dec │ │ + b.n c7dfc │ │ movs r1, r0 │ │ - b.n c87c2 │ │ + b.n c87d2 │ │ asrs r4, r2, #32 │ │ - b.n c7dd0 │ │ + b.n c7de0 │ │ lsls r0, r3, #4 │ │ - b.n c7dd8 │ │ + b.n c7de8 │ │ str r4, [r3, r4] │ │ - b.n c7ddc │ │ + b.n c7dec │ │ movs r3, r0 │ │ and.w r2, r0, r0, lsr #1 │ │ - b.n c7e06 │ │ + b.n c7e16 │ │ movs r6, r0 │ │ - b.n c837a │ │ + b.n c838a │ │ movs r0, r0 │ │ adds r3, #160 @ 0xa0 │ │ lsls r0, r2, #9 │ │ - b.n c7df2 │ │ + b.n c7e02 │ │ movs r0, #160 @ 0xa0 │ │ - b.n c7e56 │ │ + b.n c7e66 │ │ adds r0, #0 │ │ - b.n c7e0e │ │ + b.n c7e1e │ │ movs r4, r0 │ │ - b.n c7d12 │ │ + b.n c7d22 │ │ asrs r6, r0, #32 │ │ - b.n c83f8 │ │ + b.n c8408 │ │ movs r1, r0 │ │ - b.n c8596 │ │ + b.n c85a6 │ │ lsls r7, r2, #2 │ │ subs r2, #0 │ │ movs r0, r0 │ │ - b.n c8a3e │ │ + b.n c8a4e │ │ movs r0, r0 │ │ - b.n c89a8 │ │ + b.n c89b8 │ │ asrs r0, r0, #32 │ │ - b.n c7e0a │ │ + b.n c7e1a │ │ lsls r6, r3, #2 │ │ lsrs r0, r0, #8 │ │ strb r3, [r0, #4] │ │ - b.n c8232 │ │ + b.n c8242 │ │ movs r2, r1 │ │ - b.n c85c0 │ │ + b.n c85d0 │ │ movs r5, r0 │ │ ldrh r0, [r0, #16] │ │ strb r1, [r0, #4] │ │ - b.n c821e │ │ + b.n c822e │ │ asrs r1, r0, #32 │ │ - b.n c87a0 │ │ + b.n c87b0 │ │ adds r0, #1 │ │ - b.n c87c8 │ │ + b.n c87d8 │ │ @ instruction: 0xfff81aff │ │ adds r0, #0 │ │ - b.n c8a6a │ │ + b.n c8a7a │ │ asrs r6, r0, #32 │ │ - b.n c866e │ │ + b.n c867e │ │ movs r3, r0 │ │ - b.n c85d4 │ │ + b.n c85e4 │ │ @ instruction: 0xff8e9aff │ │ lsls r5, r2, #2 │ │ and.w r9, r0, r2 │ │ - b.n c8964 │ │ + b.n c8974 │ │ movs r3, r5 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n c89ec │ │ + b.n c89fc │ │ str r6, [r1, r0] │ │ - b.n c868a │ │ + b.n c869a │ │ str r0, [r0, #36] @ 0x24 │ │ asrs r0, r3, #22 │ │ movs r0, r0 │ │ asrs r6, r2, #13 │ │ lsls r1, r1, #3 │ │ subs r0, r0, r0 │ │ lsls r0, r3, #3 │ │ - b.n c86e8 │ │ + b.n c86f8 │ │ movs r0, #10 │ │ - b.n c869e │ │ + b.n c86ae │ │ lsls r0, r6, #3 │ │ - b.n c86fc │ │ + b.n c870c │ │ movs r4, r2 │ │ - b.n c8880 │ │ + b.n c8890 │ │ asrs r5, r0, #32 │ │ - b.n c86aa │ │ + b.n c86ba │ │ lsls r0, r0, #5 │ │ add.w r0, r0, r8, lsr #32 │ │ - b.n c7eac │ │ + b.n c7ebc │ │ movs r0, r0 │ │ - b.n c8a16 │ │ + b.n c8a26 │ │ vpmin.u , , │ │ movs r0, #20 │ │ - b.n c7eb8 │ │ - b.n c838a │ │ - b.n c86c2 │ │ + b.n c7ec8 │ │ + b.n c839a │ │ + b.n c86d2 │ │ adds r0, #186 @ 0xba │ │ - b.n c872a │ │ + b.n c873a │ │ mrc2 10, 7, lr, cr6, cr15, {7} @ │ │ str r0, [r2, #0] │ │ - b.n c7eca │ │ + b.n c7eda │ │ adds r0, #12 │ │ - b.n c7eb6 │ │ + b.n c7ec6 │ │ str r4, [r2, r0] │ │ - b.n c88a2 │ │ + b.n c88b2 │ │ str r3, [r0, #0] │ │ - b.n c86da │ │ + b.n c86ea │ │ vpmin.u q7, q13, │ │ - b.n c8658 │ │ - b.n c7dda │ │ + b.n c8668 │ │ + b.n c7dea │ │ lsrs r4, r3 │ │ - b.n c8742 │ │ + b.n c8752 │ │ str r3, [r0, r0] │ │ - b.n c8434 │ │ + b.n c8444 │ │ ands r6, r0 │ │ - b.n c8436 │ │ + b.n c8446 │ │ lsrs r4, r7 │ │ - b.n c874e │ │ + b.n c875e │ │ vpmin.u32 q7, , │ │ movs r0, r1 │ │ - b.n c86fa │ │ - bgt.n c8438 │ │ + b.n c870a │ │ + bgt.n c8448 │ │ @ instruction: 0xebff0000 │ │ - b.n c8a62 │ │ + b.n c8a72 │ │ vpmin.u32 , q13, │ │ movs r0, #0 │ │ - b.n c7efa │ │ + b.n c7f0a │ │ adds r0, #0 │ │ - b.n c7ef2 │ │ + b.n c7f02 │ │ movs r1, r0 │ │ - b.n c8a7e │ │ + b.n c8a8e │ │ vpmin.u q0, , │ │ movs r6, r0 │ │ - b.n c84e0 │ │ + b.n c84f0 │ │ movs r4, r0 │ │ - b.n c8a8a │ │ + b.n c8a9a │ │ movs r0, r0 │ │ - b.n c7ee6 │ │ + b.n c7ef6 │ │ movs r0, r2 │ │ cmp r2, #0 │ │ asrs r6, r0, #32 │ │ - b.n c872a │ │ + b.n c873a │ │ stmia r0!, {} │ │ - b.n c872e │ │ + b.n c873e │ │ movs r3, r4 │ │ and.w r0, r0, r0 │ │ - b.n c8b36 │ │ + b.n c8b46 │ │ strb r1, [r0, #0] │ │ - b.n c8b3a │ │ + b.n c8b4a │ │ movs r0, r2 │ │ - b.n c7f18 │ │ + b.n c7f28 │ │ asrs r0, r0, #32 │ │ - b.n c8b42 │ │ + b.n c8b52 │ │ str r0, [sp, #0] │ │ - b.n c8b46 │ │ + b.n c8b56 │ │ movs r0, #0 │ │ - b.n c8b4a │ │ + b.n c8b5a │ │ vpmin.u16 q7, , │ │ movs r0, r0 │ │ - b.n c8ac4 │ │ + b.n c8ad4 │ │ movs r1, r4 │ │ lsrs r0, r0, #8 │ │ asrs r0, r2, #32 │ │ - b.n c7f54 │ │ + b.n c7f64 │ │ movs r0, r1 │ │ - b.n c875e │ │ + b.n c876e │ │ adds r0, #6 │ │ - b.n c8762 │ │ + b.n c8772 │ │ lsls r0, r6, #7 │ │ add.w r0, r0, r0, asr #32 │ │ and.w lr, r0, r9, ror #4 │ │ - b.n c894c │ │ + b.n c895c │ │ adds r0, #3 │ │ - b.n c8bbe │ │ + b.n c8bce │ │ lsrs r7, r5, #11 │ │ - bfl 10, a943a │ │ - b.n c84ba │ │ + bfl 10, a944a │ │ + b.n c84ca │ │ lsls r0, r0, #4 │ │ - b.n c8542 │ │ + b.n c8552 │ │ asrs r3, r0, #32 │ │ - b.n c884e │ │ + b.n c885e │ │ add r3, sp, #576 @ 0x240 │ │ cdp 0, 10, cr10, cr2, cr10, {0} │ │ - b.n c8550 │ │ + b.n c8560 │ │ lsrs r0, r4, #3 │ │ @ instruction: 0xf262000c │ │ - b.n c88d2 │ │ + b.n c88e2 │ │ movs r0, #84 @ 0x54 │ │ movt r0, #1295 @ 0x50f │ │ - b.n c8c1a │ │ + b.n c8c2a │ │ strb r3, [r0, #0] │ │ - b.n c879e │ │ + b.n c87ae │ │ eors r0, r4 │ │ @ instruction: 0xf3f808e2 │ │ @ instruction: 0xf2607004 │ │ - b.n c8918 │ │ - ldr r0, [pc, #912] @ (c87fc ) │ │ + b.n c8928 │ │ + ldr r0, [pc, #912] @ (c880c ) │ │ @ instruction: 0xf2f44a85 │ │ - bl ffd09464 │ │ + bl ffd09474 │ │ subs r7, r7, r3 │ │ movs r0, r0 │ │ - b.n c8bba │ │ + b.n c8bca │ │ movs r3, r0 │ │ - b.n c872a │ │ + b.n c873a │ │ vpmin.u q0, , │ │ movs r1, #12 │ │ - b.n c858a │ │ + b.n c859a │ │ movs r0, r0 │ │ - b.n c8bca │ │ - add r0, pc, #16 @ (adr r0, c849c ) │ │ - b.n c7c92 │ │ - asrs r1, r0, #32 │ │ - b.n c8934 │ │ - add r0, pc, #4 @ (adr r0, c8498 ) │ │ - b.n c89aa │ │ + b.n c8bda │ │ + add r0, pc, #16 @ (adr r0, c84ac ) │ │ + b.n c7ca2 │ │ + asrs r1, r0, #32 │ │ + b.n c8944 │ │ + add r0, pc, #4 @ (adr r0, c84a8 ) │ │ + b.n c89ba │ │ @ instruction: 0xfffb1aff │ │ vpmin.u q7, q10, │ │ movs r0, r0 │ │ - b.n c8b44 │ │ + b.n c8b54 │ │ movs r0, r1 │ │ asrs r0, r4, #6 │ │ movs r0, #6 │ │ asrs r0, r4, #6 │ │ udf #8 │ │ subs r7, r7, r7 │ │ movs r0, r1 │ │ - b.n c87f2 │ │ - add r0, pc, #160 @ (adr r0, c8554 ) │ │ - b.n c7fc6 │ │ + b.n c8802 │ │ + add r0, pc, #160 @ (adr r0, c8564 ) │ │ + b.n c7fd6 │ │ stmia r7!, {r0, r1, r2, r3, r5, r6} │ │ @ instruction: 0xebffff2b │ │ @ instruction: 0xeaff1040 │ │ - b.n c7ff2 │ │ + b.n c8002 │ │ adds r0, #16 │ │ - b.n c8000 │ │ + b.n c8010 │ │ movs r7, r0 │ │ - b.n c806c │ │ + b.n c807c │ │ movs r0, r1 │ │ - b.n c8aee │ │ + b.n c8afe │ │ vpmin.u16 q8, , │ │ str r0, [r1, r0] │ │ - b.n c8816 │ │ + b.n c8826 │ │ str r0, [r2, r0] │ │ - b.n c8004 │ │ + b.n c8014 │ │ str r0, [sp, #12] │ │ - b.n c881e │ │ + b.n c882e │ │ ands r2, r0 │ │ - b.n c8822 │ │ + b.n c8832 │ │ movs r0, r0 │ │ - b.n c8b90 │ │ + b.n c8ba0 │ │ movs r4, r0 │ │ asrs r5, r2, #23 │ │ movs r0, r1 │ │ asrs r0, r2, #12 │ │ lsls r6, r3, #2 │ │ lsrs r0, r0, #8 │ │ lsls r4, r2, #9 │ │ - b.n c8020 │ │ + b.n c8030 │ │ asrs r2, r1, #32 │ │ - b.n c883a │ │ + b.n c884a │ │ movs r0, #6 │ │ - b.n c883e │ │ + b.n c884e │ │ stc2l 11, cr14, [pc], {255} @ 0xff @ │ │ movs r0, r0 │ │ - b.n c8ba6 │ │ + b.n c8bb6 │ │ movs r0, #4 │ │ - b.n c884a │ │ + b.n c885a │ │ adds r0, #9 │ │ - b.n c884e │ │ + b.n c885e │ │ vpmin.u8 , , │ │ lsls r0, r0, #9 │ │ - b.n c8040 │ │ + b.n c8050 │ │ asrs r2, r1, #32 │ │ - b.n c885a │ │ + b.n c886a │ │ movs r0, #6 │ │ - b.n c885e │ │ + b.n c886e │ │ lsls r7, r5, #7 │ │ add.w r0, r0, r4, lsl #8 │ │ - b.n c8866 │ │ + b.n c8876 │ │ adds r0, #9 │ │ - b.n c886a │ │ + b.n c887a │ │ movs r0, r0 │ │ - b.n c8bce │ │ + b.n c8bde │ │ asrs r0, r0, #32 │ │ - b.n c8872 │ │ + b.n c8882 │ │ @ instruction: 0xffe70aff │ │ vpmin.u q7, , │ │ asrs r0, r1, #32 │ │ - b.n c8060 │ │ + b.n c8070 │ │ movs r4, r2 │ │ - b.n c8a46 │ │ + b.n c8a56 │ │ ands r2, r0 │ │ - b.n c8886 │ │ + b.n c8896 │ │ movs r0, #255 @ 0xff │ │ - b.n c8c8a │ │ + b.n c8c9a │ │ asrs r4, r2, #32 │ │ - b.n c89d0 │ │ - adds r2, #215 @ 0xd7 │ │ - mla r0, r0, r4, r2 │ │ - b.n c8896 │ │ + b.n c89e0 │ │ + adds r3, #76 @ 0x4c │ │ + @ instruction: 0xfa002004 │ │ + b.n c88a6 │ │ mrc2 10, 7, lr, cr5, cr15, {7} @ │ │ movs r0, r1 │ │ - b.n c889e │ │ - blt.n c850a │ │ + b.n c88ae │ │ + blt.n c851a │ │ @ instruction: 0xebff0000 │ │ - b.n c8c06 │ │ + b.n c8c16 │ │ vpmin.u8 , , │ │ movs r0, #0 │ │ - b.n c809e │ │ + b.n c80ae │ │ adds r0, #0 │ │ - b.n c8096 │ │ + b.n c80a6 │ │ asrs r6, r0, #32 │ │ - b.n c867c │ │ + b.n c868c │ │ movs r0, r0 │ │ - b.n c8cba │ │ + b.n c8cca │ │ movs r0, r0 │ │ - b.n c8c24 │ │ + b.n c8c34 │ │ asrs r0, r0, #32 │ │ - b.n c8086 │ │ + b.n c8096 │ │ vpmin.u32 , q8, │ │ adds r0, #0 │ │ - b.n c8cca │ │ + b.n c8cda │ │ movs r3, r0 │ │ - b.n c8830 │ │ + b.n c8840 │ │ mrc2 10, 7, r9, cr7, cr15, {7} @ │ │ - b.n c859a │ │ - b.n c8618 │ │ + b.n c85aa │ │ + b.n c8628 │ │ movs r4, r0 │ │ - b.n c8c56 │ │ + b.n c8c66 │ │ movs r1, r0 │ │ cmp r2, #0 │ │ strb r1, [r0, #0] │ │ - b.n c88e2 │ │ + b.n c88f2 │ │ movs r3, r2 │ │ and.w pc, r0, sp, asr #30 │ │ - b.n c8ac8 │ │ + b.n c8ad8 │ │ stmia r0!, {r0, r1} │ │ - b.n c8d4a │ │ + b.n c8d5a │ │ lsrs r7, r5, #11 │ │ orn r0, r7, #560 @ 0x230 │ │ - b.n c8638 │ │ + b.n c8648 │ │ asrs r1, r0, #4 │ │ - b.n c86be │ │ + b.n c86ce │ │ str r7, [r1, r0] │ │ - b.n c8d7e │ │ + b.n c8d8e │ │ add r3, sp, #576 @ 0x240 │ │ cdp 0, 10, cr10, cr2, cr10, {0} │ │ - b.n c86de │ │ + b.n c86ee │ │ lsrs r0, r4, #3 │ │ @ instruction: 0xf262100c │ │ - b.n c8a50 │ │ + b.n c8a60 │ │ movs r0, #84 @ 0x54 │ │ movt r0, #1548 @ 0x60c │ │ - b.n c8916 │ │ + b.n c8926 │ │ eors r0, r4 │ │ @ instruction: 0xf3f808e2 │ │ @ instruction: 0xf2606004 │ │ - b.n c8a8e │ │ - ldr r0, [pc, #912] @ (c8974 ) │ │ + b.n c8a9e │ │ + ldr r0, [pc, #912] @ (c8984 ) │ │ @ instruction: 0xf2f44a85 │ │ - bl ffd0a5dc │ │ + bl ffd0a5ec │ │ subs r7, r7, r3 │ │ movs r4, r1 │ │ - b.n c88ae │ │ + b.n c88be │ │ mrc2 10, 6, r0, cr14, cr15, {7} @ │ │ - add r1, pc, #28 @ (adr r1, c8614 ) │ │ - b.n c84fe │ │ + add r1, pc, #28 @ (adr r1, c8624 ) │ │ + b.n c850e │ │ strb r1, [r0, #0] │ │ - b.n c8a8c │ │ - add r0, pc, #4 @ (adr r0, c8604 ) │ │ - b.n c8b16 │ │ + b.n c8a9c │ │ + add r0, pc, #4 @ (adr r0, c8614 ) │ │ + b.n c8b26 │ │ movs r3, r0 │ │ - b.n c88b4 │ │ + b.n c88c4 │ │ @ instruction: 0xfffa8aff │ │ mrc2 10, 6, lr, cr8, cr15, {7} @ │ │ movs r1, r0 │ │ - b.n c8d52 │ │ + b.n c8d62 │ │ movs r0, #6 │ │ - b.n c8956 │ │ + b.n c8966 │ │ adds r0, #1 │ │ - b.n c8abc │ │ + b.n c8acc │ │ mcr2 10, 7, r0, cr7, cr15, {7} @ │ │ strb r4, [r2, #9] │ │ - b.n c8152 │ │ + b.n c8162 │ │ str r1, [r0, r4] │ │ - b.n c8554 │ │ + b.n c8564 │ │ strb r4, [r0, #0] │ │ - b.n c8ab8 │ │ + b.n c8ac8 │ │ asrs r1, r0 │ │ - b.n c855c │ │ + b.n c856c │ │ str r5, [r4, r2] │ │ - b.n c8732 │ │ + b.n c8742 │ │ lsls r4, r4, #2 │ │ - b.n c88e0 │ │ + b.n c88f0 │ │ mcr2 10, 7, r1, cr0, cr15, {7} @ │ │ strh r0, [r2, r1] │ │ - b.n c816e │ │ + b.n c817e │ │ movs r0, #1 │ │ - b.n c8ac6 │ │ + b.n c8ad6 │ │ movs r5, r0 │ │ - b.n c88ec │ │ + b.n c88fc │ │ str r3, [r0, r0] │ │ adds r1, #160 @ 0xa0 │ │ strh r0, [r2, r1] │ │ - b.n c815e │ │ + b.n c816e │ │ str r1, [r0, r4] │ │ - b.n c8580 │ │ + b.n c8590 │ │ str r1, [r0, r0] │ │ - b.n c8d60 │ │ + b.n c8d70 │ │ str r1, [r0, r4] │ │ - b.n c8568 │ │ + b.n c8578 │ │ asrs r4, r2, #9 │ │ - b.n c818e │ │ + b.n c819e │ │ strb r0, [r0, #0] │ │ - b.n c8184 │ │ + b.n c8194 │ │ movs r7, r0 │ │ - b.n c890c │ │ + b.n c891c │ │ strb r1, [r0, #0] │ │ lsls r7, r0, #9 │ │ strb r0, [r0, #0] │ │ - b.n c8170 │ │ + b.n c8180 │ │ movs r1, r0 │ │ - b.n c8d16 │ │ + b.n c8d26 │ │ asrs r3, r0, #32 │ │ - b.n c89b6 │ │ + b.n c89c6 │ │ mrc2 10, 6, r9, cr0, cr15, {7} @ │ │ @ instruction: 0xffe5eaff │ │ movs r6, r0 │ │ - b.n c89c2 │ │ + b.n c89d2 │ │ asrs r2, r1, #32 │ │ - b.n c89c6 │ │ + b.n c89d6 │ │ ands r3, r0 │ │ - b.n c89ca │ │ + b.n c89da │ │ @ instruction: 0xb6db │ │ @ instruction: 0xebff0000 │ │ - b.n c8d32 │ │ + b.n c8d42 │ │ movs r7, r3 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #2 │ │ - b.n c879a │ │ + b.n c87aa │ │ movs r0, #16 │ │ - b.n c8baa │ │ + b.n c8bba │ │ adds r1, #1 │ │ - b.n c87a6 │ │ + b.n c87b6 │ │ adds r0, #4 │ │ - b.n c81cc │ │ + b.n c81dc │ │ movs r2, r1 │ │ - b.n c8950 │ │ + b.n c8960 │ │ movs r1, r3 │ │ subs r0, r0, r0 │ │ movs r1, #1 │ │ - b.n c85d6 │ │ + b.n c85e6 │ │ str r0, [sp, #4] │ │ - b.n c8df6 │ │ + b.n c8e06 │ │ movs r0, r2 │ │ - b.n c81d4 │ │ + b.n c81e4 │ │ asrs r0, r0, #32 │ │ - b.n c8dfe │ │ + b.n c8e0e │ │ strb r0, [r0, #0] │ │ - b.n c8e02 │ │ + b.n c8e12 │ │ movs r0, r0 │ │ - b.n c8e06 │ │ + b.n c8e16 │ │ lsls r0, r4, #1 │ │ and.w r0, r0, sl, lsl #26 │ │ - b.n c8a0e │ │ + b.n c8a1e │ │ movs r7, r0 │ │ - b.n c8a12 │ │ + b.n c8a22 │ │ asrs r6, r0, #32 │ │ - b.n c8a16 │ │ + b.n c8a26 │ │ adds r0, #12 │ │ - b.n c81f4 │ │ + b.n c8204 │ │ ands r6, r1 │ │ - b.n c8a1e │ │ + b.n c8a2e │ │ str r2, [r0, r0] │ │ - b.n c8a22 │ │ + b.n c8a32 │ │ @ instruction: 0xb7fe │ │ @ instruction: 0xebff1000 │ │ - b.n c8a2a │ │ + b.n c8a3a │ │ movs r0, r0 │ │ - b.n c821c │ │ + b.n c822c │ │ movs r0, r0 │ │ - b.n c8994 │ │ + b.n c89a4 │ │ movs r1, r2 │ │ ldr r2, [sp, #0] │ │ adds r0, #0 │ │ - b.n c8e3a │ │ + b.n c8e4a │ │ asrs r0, r0, #32 │ │ - b.n c8e3e │ │ + b.n c8e4e │ │ strb r0, [r0, #0] │ │ - b.n c8e42 │ │ + b.n c8e52 │ │ str r0, [sp, #0] │ │ - b.n c8e46 │ │ + b.n c8e56 │ │ movs r0, r0 │ │ - b.n c8e4a │ │ + b.n c8e5a │ │ movs r0, #5 │ │ - b.n c8a4e │ │ + b.n c8a5e │ │ adds r0, #16 │ │ - b.n c822c │ │ + b.n c823c │ │ movs r2, r2 │ │ and.w r2, r0, r4, lsr #1 │ │ - b.n c824a │ │ + b.n c825a │ │ asrs r2, r1, #32 │ │ - b.n c8a5e │ │ + b.n c8a6e │ │ @ instruction: 0xb6a2 │ │ @ instruction: 0xebff0000 │ │ - b.n c8dc6 │ │ + b.n c8dd6 │ │ movs r2, r4 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n c8a6e │ │ + b.n c8a7e │ │ movs r0, r0 │ │ - b.n c8e72 │ │ + b.n c8e82 │ │ movs r0, r2 │ │ - b.n c8250 │ │ + b.n c8260 │ │ strb r0, [r0, #0] │ │ - b.n c8e7a │ │ + b.n c8e8a │ │ lsls r1, r0, #1 │ │ and.w r1, r0, r1, lsl #8 │ │ - b.n c8670 │ │ + b.n c8680 │ │ adds r0, #0 │ │ - b.n c8e86 │ │ + b.n c8e96 │ │ movs r0, r0 │ │ - b.n c8e8a │ │ + b.n c8e9a │ │ strb r0, [r0, #0] │ │ - b.n c8e8e │ │ + b.n c8e9e │ │ str r0, [sp, #0] │ │ - b.n c8e92 │ │ + b.n c8ea2 │ │ movs r6, r0 │ │ - b.n c89fa │ │ + b.n c8a0a │ │ movs r0, #5 │ │ - b.n c8a9a │ │ + b.n c8aaa │ │ asrs r3, r0, #32 │ │ asrs r0, r4, #6 │ │ movs r0, r2 │ │ - b.n c827c │ │ + b.n c828c │ │ adds r0, #12 │ │ - b.n c82a0 │ │ - b.n c8770 │ │ - b.n c8aaa │ │ + b.n c82b0 │ │ + b.n c8780 │ │ + b.n c8aba │ │ mrc2 10, 1, lr, cr9, cr15, {7} @ │ │ movs r0, r1 │ │ - b.n c8ab2 │ │ + b.n c8ac2 │ │ asrs r4, r0, #32 │ │ - b.n c8ab6 │ │ + b.n c8ac6 │ │ movs r0, #10 │ │ - b.n c8aba │ │ + b.n c8aca │ │ adds r0, #6 │ │ - b.n c8abe │ │ + b.n c8ace │ │ lsls r3, r5, #5 │ │ add.w r0, r0, r4, lsl #8 │ │ - b.n c8ac6 │ │ + b.n c8ad6 │ │ adds r0, #9 │ │ - b.n c8aca │ │ + b.n c8ada │ │ mcr2 10, 5, lr, cr4, cr15, {7} @ │ │ lsls r4, r3, #1 │ │ - b.n c8340 │ │ + b.n c8350 │ │ movs r0, #255 @ 0xff │ │ - b.n c8ed6 │ │ + b.n c8ee6 │ │ asrs r6, r2, #32 │ │ - b.n c8ada │ │ + b.n c8aea │ │ movs r5, r0 │ │ - b.n c8ade │ │ - adds r2, #67 @ 0x43 │ │ - mla r0, r0, r1, r0 │ │ - b.n c8e52 │ │ + b.n c8aee │ │ + adds r2, #184 @ 0xb8 │ │ + @ instruction: 0xfa000001 │ │ + b.n c8e62 │ │ mrc2 10, 5, r0, cr15, cr15, {7} @ │ │ movs r4, r0 │ │ - b.n c8c38 │ │ + b.n c8c48 │ │ ands r3, r0 │ │ @ instruction: 0xeb00feca │ │ @ instruction: 0xeaff6008 │ │ - b.n c8afa │ │ + b.n c8b0a │ │ movs r2, r1 │ │ @ instruction: 0xea00f000 │ │ - b.n c8e02 │ │ + b.n c8e12 │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r1, r0 │ │ movs r0, r0 │ │ movs r2, r0 │ │ movs r0, r0 │ │ movs r3, r0 │ │ movs r0, r0 │ │ lsls r4, r2, #9 │ │ - b.n c8302 │ │ + b.n c8312 │ │ asrs r2, r1, #32 │ │ - b.n c8b1a │ │ + b.n c8b2a │ │ cpsid if │ │ @ instruction: 0xebff0000 │ │ - b.n c8e82 │ │ + b.n c8e92 │ │ asrs r0, r0, #32 │ │ - b.n c8b26 │ │ + b.n c8b36 │ │ movs r3, r2 │ │ subs r0, r0, r0 │ │ str r0, [r2, #0] │ │ - b.n c831a │ │ + b.n c832a │ │ lsrs r6, r2, #28 │ │ - b.n c8ad0 │ │ + b.n c8ae0 │ │ movs r0, r0 │ │ - b.n c8ea2 │ │ + b.n c8eb2 │ │ strb r0, [r4, #10] │ │ - b.n c8b3a │ │ + b.n c8b4a │ │ movs r6, r1 │ │ lsrs r0, r0, #8 │ │ str r2, [sp, #256] @ 0x100 │ │ - b.n c832e │ │ + b.n c833e │ │ asrs r2, r1, #32 │ │ - b.n c8b46 │ │ + b.n c8b56 │ │ movs r1, r1 │ │ - b.n c8b4a │ │ + b.n c8b5a │ │ @ instruction: 0xb67b │ │ @ instruction: 0xebff0000 │ │ - b.n c8eb2 │ │ + b.n c8ec2 │ │ @ instruction: 0xffee0aff │ │ lsls r0, r0, #2 │ │ - b.n c891a │ │ + b.n c892a │ │ lsls r0, r0, #4 │ │ - b.n c8930 │ │ + b.n c8940 │ │ movs r4, r2 │ │ - b.n c8342 │ │ + b.n c8352 │ │ movs r2, r1 │ │ - b.n c8ac6 │ │ + b.n c8ad6 │ │ @ instruction: 0xffe91aff │ │ movs r0, r0 │ │ - b.n c8f6e │ │ + b.n c8f7e │ │ movs r0, r2 │ │ - b.n c834c │ │ + b.n c835c │ │ movs r1, r0 │ │ - b.n c8f76 │ │ + b.n c8f86 │ │ movs r1, r0 │ │ and.w r0, r0, r0 │ │ - b.n c8f7e │ │ + b.n c8f8e │ │ movs r0, r2 │ │ - b.n c835c │ │ + b.n c836c │ │ asrs r0, r0, #32 │ │ - b.n c8f86 │ │ + b.n c8f96 │ │ str r0, [sp, #0] │ │ - b.n c8f8a │ │ + b.n c8f9a │ │ movs r0, #0 │ │ - b.n c8f8e │ │ - b.n c885a │ │ - b.n c8b92 │ │ + b.n c8f9e │ │ + b.n c886a │ │ + b.n c8ba2 │ │ adds r0, #4 │ │ - b.n c8b96 │ │ + b.n c8ba6 │ │ ldc2l 10, cr14, [lr, #1020]! @ 0x3fc @ │ │ - blx 4c8e9c │ │ - blx 4c8ea0 │ │ + blx 4c8eac │ │ + blx 4c8eb0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r1, r0 │ │ movs r0, r0 │ │ movs r2, r0 │ │ movs r0, r0 │ │ movs r3, r0 │ │ movs r0, r0 │ │ - ldr r7, [pc, #960] @ (c8c34 ) │ │ + ldr r7, [pc, #960] @ (c8c44 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n c8d94 │ │ - beq.n c88c4 │ │ - b.n c8d18 │ │ + b.n c8da4 │ │ + beq.n c88d4 │ │ + b.n c8d28 │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n c83a4 │ │ + b.n c83b4 │ │ adds r0, #0 │ │ - b.n c8bc6 │ │ + b.n c8bd6 │ │ str r2, [r0, r0] │ │ - b.n c8bca │ │ + b.n c8bda │ │ str r0, [sp, #96] @ 0x60 │ │ - b.n c83a8 │ │ + b.n c83b8 │ │ movs r0, r5 │ │ - b.n c83c4 │ │ + b.n c83d4 │ │ movs r2, r0 │ │ - b.n c8b36 │ │ + b.n c8b46 │ │ lsls r6, r2, #1 │ │ ldr r2, [sp, #0] │ │ - add r0, pc, #256 @ (adr r0, c899c ) │ │ - b.n c83d0 │ │ + add r0, pc, #256 @ (adr r0, c89ac ) │ │ + b.n c83e0 │ │ strb r1, [r0, #0] │ │ - b.n c8be2 │ │ + b.n c8bf2 │ │ movs r4, r3 │ │ - b.n c83c0 │ │ + b.n c83d0 │ │ movs r0, #6 │ │ - b.n c845c │ │ + b.n c846c │ │ lsls r4, r3, #1 │ │ - b.n c8462 │ │ + b.n c8472 │ │ asrs r0, r2, #32 │ │ - b.n c83e6 │ │ + b.n c83f6 │ │ movs r2, r1 │ │ - b.n c8eda │ │ + b.n c8eea │ │ ands r4, r1 │ │ - b.n c83f0 │ │ + b.n c8400 │ │ str r0, [r1, #0] │ │ - b.n c83f4 │ │ + b.n c8404 │ │ strh r5, [r2, #0] │ │ - b.n c89c4 │ │ + b.n c89d4 │ │ adds r0, #32 │ │ - b.n c83e0 │ │ + b.n c83f0 │ │ movs r1, r5 │ │ lsrs r0, r0, #8 │ │ movs r0, #16 │ │ - b.n c83fe │ │ + b.n c840e │ │ movs r5, r0 │ │ - b.n c8b76 │ │ + b.n c8b86 │ │ lsls r4, r3, #1 │ │ subs r0, r0, r0 │ │ lsls r6, r2, #3 │ │ - b.n c8c88 │ │ + b.n c8c98 │ │ movs r1, r0 │ │ - b.n c8fbe │ │ + b.n c8fce │ │ lsls r4, r4, #1 │ │ - bge.n c88e2 │ │ + bge.n c88f2 │ │ strb r2, [r7, #2] │ │ - b.n c8c96 │ │ + b.n c8ca6 │ │ lsrs r0, r3, #31 │ │ - b.n c8f04 │ │ + b.n c8f14 │ │ movs r0, r0 │ │ - b.n c8b1c │ │ + b.n c8b2c │ │ lsls r1, r5, #1 │ │ subs r0, r0, r0 │ │ movs r0, #0 │ │ - b.n c8426 │ │ + b.n c8436 │ │ adds r0, #4 │ │ - b.n c842a │ │ + b.n c843a │ │ movs r2, r0 │ │ - b.n c89aa │ │ + b.n c89ba │ │ movs r3, r0 │ │ - b.n c8aaa │ │ + b.n c8aba │ │ lsls r1, r5, #1 │ │ subs r2, #0 │ │ movs r4, r0 │ │ - b.n c8f38 │ │ + b.n c8f48 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ movs r0, #188 @ 0xbc │ │ - b.n c8cc2 │ │ + b.n c8cd2 │ │ adds r0, #190 @ 0xbe │ │ - b.n c8cc6 │ │ + b.n c8cd6 │ │ movs r2, r0 │ │ - b.n c8bc0 │ │ + b.n c8bd0 │ │ lsls r4, r0, #2 │ │ subs r2, #0 │ │ movs r1, r0 │ │ - b.n c8d46 │ │ + b.n c8d56 │ │ lsls r2, r0, #2 │ │ subs r0, r0, r0 │ │ movs r0, r1 │ │ - b.n c845e │ │ + b.n c846e │ │ asrs r4, r2, #32 │ │ - b.n c8e34 │ │ + b.n c8e44 │ │ movs r0, r0 │ │ - b.n c8bd4 │ │ + b.n c8be4 │ │ movs r0, r1 │ │ ldr r2, [sp, #0] │ │ lsls r6, r7, #1 │ │ and.w r0, r0, ip, lsl #8 │ │ - b.n c846e │ │ + b.n c847e │ │ lsls r7, r0, #4 │ │ - b.n c8e46 │ │ + b.n c8e56 │ │ lsls r7, r0, #4 │ │ - b.n c8fe6 │ │ + b.n c8ff6 │ │ lsls r4, r6, #1 │ │ ldr r2, [sp, #0] │ │ adds r0, #28 │ │ - b.n c8488 │ │ + b.n c8498 │ │ movs r0, #5 │ │ - b.n c8a56 │ │ + b.n c8a66 │ │ movs r3, r0 │ │ - b.n c8bfa │ │ + b.n c8c0a │ │ lsls r3, r7, #1 │ │ ldrh r0, [r0, #16] │ │ movs r0, r4 │ │ - b.n c8498 │ │ + b.n c84a8 │ │ strb r0, [r0, #0] │ │ - b.n c90a2 │ │ + b.n c90b2 │ │ strh r0, [r0, #0] │ │ - b.n c8466 │ │ + b.n c8476 │ │ strb r4, [r0, #0] │ │ - b.n c846a │ │ - beq.n c89a4 │ │ - b.n c8e04 │ │ + b.n c847a │ │ + beq.n c89b4 │ │ + b.n c8e14 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r4, lr} │ │ - b.n c8490 │ │ + b.n c84a0 │ │ str r0, [r2, #0] │ │ - b.n c8494 │ │ + b.n c84a4 │ │ str r0, [r2, #0] │ │ - b.n c84b8 │ │ + b.n c84c8 │ │ movs r4, r0 │ │ - b.n c8534 │ │ + b.n c8544 │ │ movs r0, r1 │ │ - b.n c8fa6 │ │ + b.n c8fb6 │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ negs r0, r0 │ │ - b.n c84c0 │ │ + b.n c84d0 │ │ asrs r5, r0, #32 │ │ - b.n c8cd2 │ │ + b.n c8ce2 │ │ movs r4, r0 │ │ - b.n c8cd6 │ │ + b.n c8ce6 │ │ setpan #1 │ │ @ instruction: 0xebff0080 │ │ - b.n c8a9e │ │ + b.n c8aae │ │ lsls r0, r0, #4 │ │ - b.n c8aaa │ │ + b.n c8aba │ │ asrs r4, r2, #32 │ │ - b.n c84c6 │ │ + b.n c84d6 │ │ movs r5, r0 │ │ - b.n c8c4c │ │ + b.n c8c5c │ │ movs r3, r1 │ │ lsrs r0, r0, #8 │ │ str r0, [sp, #64] @ 0x40 │ │ - b.n c84e4 │ │ + b.n c84f4 │ │ adds r0, #32 │ │ - b.n c84f0 │ │ + b.n c8500 │ │ ands r4, r2 │ │ - b.n c84f4 │ │ + b.n c8504 │ │ movs r0, r0 │ │ - b.n c9070 │ │ + b.n c9080 │ │ @ instruction: 0xffc10aff │ │ @ instruction: 0xffedeaff │ │ lsls r4, r2, #9 │ │ - b.n c84fc │ │ + b.n c850c │ │ asrs r5, r0, #32 │ │ - b.n c8d0e │ │ + b.n c8d1e │ │ push {r1, r2, r4, r5, r6, r7, lr} │ │ @ instruction: 0xebff0000 │ │ - b.n c9076 │ │ + b.n c9086 │ │ @ instruction: 0xffeb0aff │ │ movs r1, r0 │ │ and.w r0, r0, r0, lsr #32 │ │ - b.n c8ee2 │ │ + b.n c8ef2 │ │ strh r0, [r0, #0] │ │ - b.n c8506 │ │ + b.n c8516 │ │ adds r0, #32 │ │ - b.n c8524 │ │ + b.n c8534 │ │ ands r4, r2 │ │ - b.n c8528 │ │ + b.n c8538 │ │ str r0, [r2, #0] │ │ - b.n c852c │ │ + b.n c853c │ │ @ instruction: 0xffb4eaff │ │ lsls r4, r7, #6 │ │ - b.n c8538 │ │ + b.n c8548 │ │ asrs r4, r6, #30 │ │ - b.n c900e │ │ + b.n c901e │ │ subs r7, r7, #7 │ │ - b.n c90a0 │ │ + b.n c90b0 │ │ strb r1, [r0, #0] │ │ - b.n c8e88 │ │ + b.n c8e98 │ │ movs r0, r0 │ │ - b.n c8b28 │ │ + b.n c8b38 │ │ strh r0, [r0, #0] │ │ - b.n c914e │ │ + b.n c915e │ │ lsls r2, r3, #1 │ │ - b.n c85b2 │ │ + b.n c85c2 │ │ movs r0, r0 │ │ - b.n c90b6 │ │ + b.n c90c6 │ │ lsls r3, r2, #1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r3, #6 │ │ - b.n c855c │ │ + b.n c856c │ │ ands r3, r0 │ │ - b.n c8d62 │ │ + b.n c8d72 │ │ adds r1, #152 @ 0x98 │ │ - b.n c8564 │ │ + b.n c8574 │ │ movs r1, r0 │ │ - b.n c916a │ │ + b.n c917a │ │ asrs r1, r0, #32 │ │ - b.n c8b4c │ │ + b.n c8b5c │ │ cmp r7, #106 @ 0x6a │ │ - b.n c9172 │ │ + b.n c9182 │ │ adds r0, #3 │ │ - b.n c8b54 │ │ + b.n c8b64 │ │ str r0, [r0, r0] │ │ - b.n c8554 │ │ - ldr r1, [pc, #1000] @ (c8e24 ) │ │ + b.n c8564 │ │ + ldr r1, [pc, #996] @ (c8e30 ) │ │ @ instruction: 0xebff3004 │ │ - b.n c8d82 │ │ + b.n c8d92 │ │ str r0, [sp, #96] @ 0x60 │ │ - b.n c8580 │ │ + b.n c8590 │ │ lsls r7, r0, #1 │ │ and.w r1, r0, r4, ror #5 │ │ - b.n c858c │ │ + b.n c859c │ │ ands r3, r0 │ │ - b.n c8d92 │ │ + b.n c8da2 │ │ movs r0, r1 │ │ - b.n c8d96 │ │ + b.n c8da6 │ │ adds r0, #5 │ │ - b.n c8d9a │ │ + b.n c8daa │ │ asrs r1, r0, #32 │ │ - b.n c8b7c │ │ + b.n c8b8c │ │ @ instruction: 0xb64c │ │ @ instruction: 0xebff77b4 │ │ - b.n c9076 │ │ + b.n c9086 │ │ adds r0, #4 │ │ - b.n c8daa │ │ + b.n c8dba │ │ str r0, [sp, #96] @ 0x60 │ │ - b.n c85a8 │ │ + b.n c85b8 │ │ ldrb r7, [r7, #31] │ │ - b.n c9110 │ │ + b.n c9120 │ │ movs r4, r7 │ │ and.w r0, r0, r8, lsl #24 │ │ - b.n c8590 │ │ + b.n c85a0 │ │ movs r3, r0 │ │ - b.n c8dbe │ │ + b.n c8dce │ │ ands r4, r1 │ │ - b.n c8598 │ │ + b.n c85a8 │ │ subs r0, r3, #7 │ │ - b.n c90a0 │ │ + b.n c90b0 │ │ movs r0, #8 │ │ - b.n c8dca │ │ + b.n c8dda │ │ adds r0, #7 │ │ - b.n c8dce │ │ - beq.n c8ac8 │ │ - b.n c8f28 │ │ - ldr r7, [pc, #960] @ (c8e54 ) │ │ + b.n c8dde │ │ + beq.n c8ad8 │ │ + b.n c8f38 │ │ + ldr r7, [pc, #960] @ (c8e64 ) │ │ ldmia.w sp!, {r0, r4, r5, r6, r9, sl, ip, sp, pc} │ │ @ instruction: 0xeaff1128 │ │ - b.n c85dc │ │ + b.n c85ec │ │ movs r0, r1 │ │ - b.n c8de2 │ │ + b.n c8df2 │ │ movs r0, #7 │ │ - b.n c8de6 │ │ + b.n c8df6 │ │ asrs r1, r0, #32 │ │ - b.n c8bc8 │ │ + b.n c8bd8 │ │ movs r6, r3 │ │ and.w r0, r0, r8, lsr #32 │ │ - b.n c85ec │ │ - b.n c8b14 │ │ - b.n c8fb6 │ │ + b.n c85fc │ │ + b.n c8b24 │ │ + b.n c8fc6 │ │ stmia r0!, {r3} │ │ - b.n c85f6 │ │ + b.n c8606 │ │ movs r4, r1 │ │ - b.n c85fa │ │ + b.n c860a │ │ asrs r2, r0, #32 │ │ - b.n c8b7a │ │ + b.n c8b8a │ │ asrs r3, r0, #32 │ │ - b.n c8c66 │ │ + b.n c8c76 │ │ movs r3, r0 │ │ subs r2, #0 │ │ lsls r2, r0, #8 │ │ ldmia.w lr, {r0, ip} │ │ - b.n c8b7e │ │ + b.n c8b8e │ │ asrs r1, r1, #32 │ │ - b.n c8c7e │ │ + b.n c8c8e │ │ @ instruction: 0xff8a2aff │ │ str r0, [sp, #128] @ 0x80 │ │ - b.n c8618 │ │ + b.n c8628 │ │ asrs r6, r0, #32 │ │ - b.n c8b3a │ │ + b.n c8b4a │ │ strb r4, [r0, #0] │ │ - b.n c8b26 │ │ - add r0, pc, #24 @ (adr r0, c8b00 ) │ │ - b.n c8e2a │ │ + b.n c8b36 │ │ + add r0, pc, #24 @ (adr r0, c8b10 ) │ │ + b.n c8e3a │ │ stmia r0!, {r2} │ │ - b.n c8e2e │ │ + b.n c8e3e │ │ asrs r7, r0, #32 │ │ - b.n c8e14 │ │ + b.n c8e24 │ │ movs r3, r4 │ │ subs r0, r0, r0 │ │ asrs r4, r2, #3 │ │ - b.n c8638 │ │ + b.n c8648 │ │ strb r4, [r2, #3] │ │ - b.n c863c │ │ + b.n c864c │ │ movs r1, r4 │ │ ldmia.w lr, {r0, ip} │ │ - b.n c8c24 │ │ + b.n c8c34 │ │ str r4, [r1, r0] │ │ - b.n c8b54 │ │ + b.n c8b64 │ │ movs r2, r1 │ │ - b.n c8b4e │ │ + b.n c8b5e │ │ strb r7, [r0, #0] │ │ - b.n c8c30 │ │ + b.n c8c40 │ │ movs r5, r0 │ │ - b.n c8e36 │ │ + b.n c8e46 │ │ strb r1, [r0, #0] │ │ lsls r0, r4, #6 │ │ movs r3, r3 │ │ and.w r0, r0, ip, ror #6 │ │ - b.n c8660 │ │ + b.n c8670 │ │ movs r0, r1 │ │ - b.n c8e66 │ │ + b.n c8e76 │ │ asrs r1, r0, #32 │ │ - b.n c8c48 │ │ + b.n c8c58 │ │ @ instruction: 0xb619 │ │ @ instruction: 0xebff0009 │ │ and.w r0, r0, r8 │ │ - b.n c866a │ │ + b.n c867a │ │ asrs r0, r4, #2 │ │ - b.n c8678 │ │ + b.n c8688 │ │ movs r4, r2 │ │ - b.n c8fbe │ │ + b.n c8fce │ │ movs r0, r0 │ │ - b.n c865c │ │ + b.n c866c │ │ asrs r1, r0, #32 │ │ - b.n c8c64 │ │ + b.n c8c74 │ │ movs r1, r0 │ │ and.w r0, r0, r4, lsr #6 │ │ - b.n c868c │ │ + b.n c869c │ │ asrs r1, r0, #32 │ │ - b.n c8c70 │ │ + b.n c8c80 │ │ movs r0, r1 │ │ - b.n c8e96 │ │ + b.n c8ea6 │ │ @ instruction: 0xb60e │ │ @ instruction: 0xebff77b4 │ │ - b.n c916e │ │ + b.n c917e │ │ str r0, [sp, #96] @ 0x60 │ │ - b.n c869c │ │ + b.n c86ac │ │ ldrb r7, [r7, #31] │ │ - b.n c9204 │ │ + b.n c9214 │ │ adds r0, #32 │ │ - b.n c86a4 │ │ + b.n c86b4 │ │ movs r4, r0 │ │ - b.n c86a0 │ │ + b.n c86b0 │ │ strh r0, [r0, #0] │ │ - b.n c8678 │ │ + b.n c8688 │ │ movs r2, r0 │ │ - b.n c9276 │ │ + b.n c9286 │ │ strb r4, [r0, #0] │ │ - b.n c8680 │ │ + b.n c8690 │ │ movs r4, r0 │ │ - b.n c8690 │ │ - beq.n c8bb8 │ │ - b.n c9018 │ │ + b.n c86a0 │ │ + beq.n c8bc8 │ │ + b.n c9028 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r6, ip, sp, lr} │ │ - b.n c86c8 │ │ + b.n c86d8 │ │ strb r7, [r0, #0] │ │ - b.n c8cac │ │ + b.n c8cbc │ │ asrs r4, r0, #1 │ │ - b.n c86d0 │ │ + b.n c86e0 │ │ movs r0, r1 │ │ - b.n c8ed6 │ │ - add r0, pc, #32 @ (adr r0, c8bb8 ) │ │ - b.n c86b4 │ │ + b.n c8ee6 │ │ + add r0, pc, #32 @ (adr r0, c8bc8 ) │ │ + b.n c86c4 │ │ asrs r1, r0, #32 │ │ - b.n c8cbc │ │ + b.n c8ccc │ │ stmia r0!, {r2, r3} │ │ - b.n c86bc │ │ + b.n c86cc │ │ strb r0, [r0, #0] │ │ - b.n c86c0 │ │ + b.n c86d0 │ │ push {r1, r3, r4, r5, r6, r7, lr} │ │ @ instruction: 0xebff77b4 │ │ - b.n c91be │ │ + b.n c91ce │ │ adds r0, #9 │ │ - b.n c8ef2 │ │ + b.n c8f02 │ │ ldrb r7, [r7, #31] │ │ - b.n c9254 │ │ + b.n c9264 │ │ @ instruction: 0xffa1eaff │ │ - ldrsh r4, [r0, r1] │ │ + ldrsh r4, [r2, r1] │ │ movs r1, r0 │ │ - strb r1, [r7, #7] │ │ - vdup.32 q11, d13[0] │ │ - vsli.32 d22, d16, #20 │ │ - vqshl.u32 , , #20 │ │ - @ instruction: 0xfff35143 │ │ - @ instruction: 0xfff451cb │ │ - vrsra.u64 d19, d26, #12 │ │ - @ instruction: 0xfff45cd7 │ │ - @ instruction: 0xfff46bd6 │ │ - vtbl.8 d18, {d20-d22}, d22 │ │ - vqshlu.s32 q10, , #20 │ │ + strb r1, [r7, #8] │ │ + @ instruction: 0xfff46cd3 │ │ + vpadal.u16 d22, d31 │ │ + vqshl.u64 d31, d23, #52 @ 0x34 │ │ + vsubl.u , d3, d23 │ │ + vpaddl.u16 d21, d31 │ │ + vrsra.u32 , q14, #12 │ │ + @ instruction: 0xfff45ea6 │ │ + vcvt.f16.u16 q11, q6, #12 │ │ + vtbl.8 d18, {d20-d22}, d6 │ │ + vqneg.s16 d20, d27 │ │ @ instruction: 0xfff448f0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n c910c │ │ + b.n c911c │ │ str r0, [r0, #0] │ │ - b.n c8f36 │ │ + b.n c8f46 │ │ movs r0, r0 │ │ - b.n c93ba │ │ + b.n c93ca │ │ movs r4, r0 │ │ - b.n c8702 │ │ + b.n c8712 │ │ str r3, [r0, r0] │ │ - b.n c8f42 │ │ + b.n c8f52 │ │ movs r0, r0 │ │ - b.n c870a │ │ + b.n c871a │ │ movs r0, r2 │ │ - b.n c934a │ │ + b.n c935a │ │ lsls r2, r7, #2 │ │ - b.n c8f92 │ │ + b.n c8fa2 │ │ lsls r0, r0, #9 │ │ - b.n c873e │ │ + b.n c874e │ │ movs r0, r0 │ │ - b.n c92b6 │ │ + b.n c92c6 │ │ movs r4, r4 │ │ lsrs r0, r0, #8 │ │ ands r2, r0 │ │ - b.n c8f5e │ │ + b.n c8f6e │ │ lsls r4, r1, #2 │ │ ldmia.w r0, {r0, ip, sp} │ │ - b.n c90ac │ │ + b.n c90bc │ │ movs r1, r0 │ │ - b.n c8ece │ │ + b.n c8ede │ │ strb r5, [r0, #0] │ │ - b.n c8cbc │ │ + b.n c8ccc │ │ movs r0, #1 │ │ movs r2, #66 @ 0x42 │ │ lsls r4, r1, #2 │ │ stmia.w r0, {r0, sp} │ │ - b.n c8cc0 │ │ + b.n c8cd0 │ │ asrs r1, r0, #2 │ │ - b.n c8d40 │ │ + b.n c8d50 │ │ movs r0, #130 @ 0x82 │ │ - b.n c8d46 │ │ + b.n c8d56 │ │ adds r0, #24 │ │ - b.n c9386 │ │ + b.n c9396 │ │ asrs r1, r0, #4 │ │ - b.n c8d4a │ │ + b.n c8d5a │ │ movs r0, r2 │ │ - b.n c9150 │ │ + b.n c9160 │ │ movs r1, #2 │ │ - b.n c8d58 │ │ + b.n c8d68 │ │ asrs r4, r3, #32 │ │ - b.n c9158 │ │ - adds r1, #219 @ 0xdb │ │ + b.n c9168 │ │ + adds r1, #12 │ │ @ instruction: 0xfb00023c │ │ - b.n c878a │ │ + b.n c879a │ │ strb r0, [r0, #1] │ │ - b.n c878e │ │ + b.n c879e │ │ movs r1, r0 │ │ - b.n c9166 │ │ + b.n c9176 │ │ lsls r4, r7, #8 │ │ - b.n c8776 │ │ + b.n c8786 │ │ movs r7, r0 │ │ - b.n c881c │ │ + b.n c882c │ │ movs r0, r1 │ │ - b.n c9292 │ │ + b.n c92a2 │ │ movs r2, r2 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n c9324 │ │ + b.n c9334 │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ asrs r0, r6, #2 │ │ - b.n c87b0 │ │ + b.n c87c0 │ │ lsls r0, r3, #4 │ │ - b.n c87b4 │ │ + b.n c87c4 │ │ movs r1, r0 │ │ - b.n c8f2a │ │ + b.n c8f3a │ │ asrs r4, r3, #4 │ │ adds r5, #151 @ 0x97 │ │ movs r1, r0 │ │ adds r2, #128 @ 0x80 │ │ asrs r4, r2, #32 │ │ adds r5, #132 @ 0x84 │ │ lsls r0, r3, #4 │ │ adds r5, #135 @ 0x87 │ │ asrs r4, r3 │ │ adds r5, #135 @ 0x87 │ │ ldrh r0, [r6, #6] │ │ subs r0, #189 @ 0xbd │ │ movs r4, r0 │ │ - b.n c912e │ │ - ldr r0, [pc, #960] @ (c9068 ) │ │ + b.n c913e │ │ + ldr r0, [pc, #960] @ (c9078 ) │ │ ldmia.w sp!, {r2, r6, r7, r9, sl, fp, ip, sp} │ │ and.w r2, r0, r0, lsr #1 │ │ - b.n c87de │ │ + b.n c87ee │ │ movs r5, r0 │ │ - b.n c8d56 │ │ + b.n c8d66 │ │ movs r0, r0 │ │ adds r3, #160 @ 0xa0 │ │ lsls r0, r2, #9 │ │ - b.n c87ca │ │ + b.n c87da │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r2, r3, r4, r6} │ │ - b.n c8874 │ │ + b.n c8884 │ │ movs r0, #255 @ 0xff │ │ - b.n c940a │ │ + b.n c941a │ │ asrs r5, r2, #32 │ │ - b.n c900e │ │ + b.n c901e │ │ movs r4, r0 │ │ - b.n c9012 │ │ - adds r0, #246 @ 0xf6 │ │ - mla r0, r0, r1, r0 │ │ - b.n c9384 │ │ + b.n c9022 │ │ + adds r1, #107 @ 0x6b │ │ + @ instruction: 0xfa000001 │ │ + b.n c9394 │ │ @ instruction: 0xffe70aff │ │ @ instruction: 0xffefeaff │ │ - ldr r4, [pc, #448] @ (c8ea4 ) │ │ + ldr r4, [pc, #448] @ (c8eb4 ) │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n c9204 │ │ + b.n c9214 │ │ str r2, [r0, r0] │ │ - b.n c902e │ │ + b.n c903e │ │ ands r1, r0 │ │ - b.n c9032 │ │ + b.n c9042 │ │ str r0, [r0, #0] │ │ - b.n c9036 │ │ + b.n c9046 │ │ push {r6, lr} │ │ @ instruction: 0xebff0080 │ │ - b.n c8dfe │ │ + b.n c8e0e │ │ asrs r0, r2, #32 │ │ - b.n c920e │ │ + b.n c921e │ │ movs r0, #4 │ │ - b.n c8e10 │ │ + b.n c8e20 │ │ asrs r0, r0, #4 │ │ - b.n c8e0c │ │ + b.n c8e1c │ │ movs r1, r0 │ │ - b.n c944e │ │ + b.n c945e │ │ adds r0, #4 │ │ - b.n c8834 │ │ + b.n c8844 │ │ movs r3, r0 │ │ - b.n c8fba │ │ + b.n c8fca │ │ movs r4, r0 │ │ ldrh r0, [r0, #16] │ │ lsls r0, r3, #3 │ │ - b.n c8fa0 │ │ + b.n c8fb0 │ │ asrs r1, r0, #32 │ │ - b.n c8e22 │ │ + b.n c8e32 │ │ movs r0, r0 │ │ - b.n c9466 │ │ + b.n c9476 │ │ movs r4, r0 │ │ - b.n c8fcc │ │ + b.n c8fdc │ │ movs r1, r0 │ │ strh r0, [r0, #24] │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, fp, lr} │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n c9254 │ │ + b.n c9264 │ │ udf #33 @ 0x21 │ │ - b.n c91d8 │ │ + b.n c91e8 │ │ str r1, [r0, r0] │ │ - b.n c9082 │ │ + b.n c9092 │ │ strb r0, [r0, #0] │ │ - b.n c9086 │ │ + b.n c9096 │ │ str r0, [sp, #8] │ │ - b.n c908a │ │ + b.n c909a │ │ lsls r0, r2, #15 │ │ - b.n c90ce │ │ + b.n c90de │ │ movs r0, #0 │ │ - b.n c887c │ │ + b.n c888c │ │ str r0, [r0, #4] │ │ - b.n c8884 │ │ + b.n c8894 │ │ ands r4, r0 │ │ - b.n c8884 │ │ + b.n c8894 │ │ movs r0, r0 │ │ - b.n c8e02 │ │ + b.n c8e12 │ │ movs r1, r0 │ │ - b.n c8f0a │ │ + b.n c8f1a │ │ movs r5, r4 │ │ cmp r2, #0 │ │ lsls r4, r3, #1 │ │ - b.n c8916 │ │ + b.n c8926 │ │ str r1, [r0, r0] │ │ - b.n c9214 │ │ + b.n c9224 │ │ movs r0, #8 │ │ - b.n c889e │ │ + b.n c88ae │ │ asrs r0, r0, #2 │ │ - b.n c88a2 │ │ + b.n c88b2 │ │ strh r1, [r3, #0] │ │ - b.n c90ba │ │ + b.n c90ca │ │ str r0, [sp, #4] │ │ - b.n c94be │ │ + b.n c94ce │ │ asrs r1, r0, #32 │ │ - b.n c8e86 │ │ + b.n c8e96 │ │ movs r0, #12 │ │ - b.n c88a0 │ │ + b.n c88b0 │ │ asrs r0, r1, #32 │ │ - b.n c88a4 │ │ + b.n c88b4 │ │ movs r3, r2 │ │ lsrs r0, r0, #8 │ │ ands r0, r1 │ │ - b.n c92ac │ │ + b.n c92bc │ │ strb r0, [r0, #1] │ │ - b.n c94d6 │ │ + b.n c94e6 │ │ movs r0, r1 │ │ - b.n c88d4 │ │ + b.n c88e4 │ │ asrs r4, r1, #32 │ │ - b.n c88d8 │ │ + b.n c88e8 │ │ lsls r1, r1, #6 │ │ - b.n c8caa │ │ + b.n c8cba │ │ lsls r1, r1, #6 │ │ - b.n c8eae │ │ + b.n c8ebe │ │ str r0, [sp, #4] │ │ - b.n c92bc │ │ + b.n c92cc │ │ lsls r0, r0, #1 │ │ - b.n c9460 │ │ + b.n c9470 │ │ asrs r4, r0, #32 │ │ - b.n c88b2 │ │ + b.n c88c2 │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ movs r4, r2 │ │ - b.n c88e6 │ │ + b.n c88f6 │ │ str r0, [sp, #0] │ │ - b.n c94fe │ │ + b.n c950e │ │ asrs r4, r0, #32 │ │ - b.n c9102 │ │ + b.n c9112 │ │ movs r0, #64 @ 0x40 │ │ - b.n c9506 │ │ + b.n c9516 │ │ strh r0, [r6, #6] │ │ - b.n c9164 │ │ - bne.n c8cfc │ │ + b.n c9174 │ │ + bne.n c8d0c │ │ @ instruction: 0xebff005c │ │ - b.n c897e │ │ + b.n c898e │ │ strh r7, [r2, #0] │ │ - b.n c8ee6 │ │ + b.n c8ef6 │ │ str r1, [r0, r0] │ │ - b.n c9284 │ │ + b.n c9294 │ │ @ instruction: 0xffed1aff │ │ movs r4, r2 │ │ - b.n c890e │ │ + b.n c891e │ │ asrs r0, r0, #32 │ │ - b.n c9526 │ │ + b.n c9536 │ │ strh r0, [r0, #0] │ │ - b.n c8904 │ │ + b.n c8914 │ │ movs r0, #9 │ │ - b.n c912e │ │ + b.n c913e │ │ asrs r4, r0, #32 │ │ - b.n c890c │ │ + b.n c891c │ │ asrs r0, r1, #32 │ │ - b.n c9310 │ │ - bne.n c8d12 │ │ + b.n c9320 │ │ + bne.n c8d22 │ │ @ instruction: 0xebff0011 │ │ and.w r0, r0, ip, lsr #1 │ │ - b.n c89ae │ │ + b.n c89be │ │ movs r0, #255 @ 0xff │ │ - b.n c9546 │ │ + b.n c9556 │ │ strh r3, [r2, #0] │ │ - b.n c914a │ │ + b.n c915a │ │ movs r5, r0 │ │ - b.n c914e │ │ + b.n c915e │ │ asrs r0, r1, #32 │ │ - b.n c9152 │ │ - adds r0, #166 @ 0xa6 │ │ - mls r0, r0, r0, r9 │ │ - b.n c8924 │ │ + b.n c9162 │ │ + adds r1, #27 │ │ + @ instruction: 0xfa009010 │ │ + b.n c8934 │ │ movs r6, r0 │ │ - b.n c89cc │ │ + b.n c89dc │ │ movs r0, r1 │ │ - b.n c9442 │ │ + b.n c9452 │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ asrs r4, r3, #1 │ │ - b.n c89d6 │ │ + b.n c89e6 │ │ adds r0, #0 │ │ - b.n c956e │ │ + b.n c957e │ │ movs r4, r2 │ │ - b.n c895e │ │ + b.n c896e │ │ movs r1, #25 │ │ - b.n c9176 │ │ + b.n c9186 │ │ asrs r5, r0, #32 │ │ - b.n c917a │ │ + b.n c918a │ │ movs r0, #240 @ 0xf0 │ │ - b.n c91d8 │ │ + b.n c91e8 │ │ movs r0, #8 │ │ - b.n c9182 │ │ + b.n c9192 │ │ add r0, sp, #764 @ 0x2fc │ │ @ instruction: 0xebffd018 │ │ - b.n c92e0 │ │ + b.n c92f0 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n c9370 │ │ - beq.n c8e60 │ │ - b.n c92f4 │ │ + b.n c9380 │ │ + beq.n c8e70 │ │ + b.n c9304 │ │ str r4, [r1, r0] │ │ - b.n c897e │ │ + b.n c898e │ │ movs r0, r0 │ │ - b.n c9506 │ │ + b.n c9516 │ │ strb r0, [r0, #1] │ │ - b.n c8990 │ │ + b.n c89a0 │ │ movs r7, r2 │ │ lsrs r0, r0, #8 │ │ str r4, [r0, #0] │ │ - b.n c8992 │ │ + b.n c89a2 │ │ str r1, [r0, #0] │ │ - b.n c937e │ │ + b.n c938e │ │ str r1, [r0, #0] │ │ - b.n c9602 │ │ + b.n c9612 │ │ ands r0, r1 │ │ - b.n c9386 │ │ + b.n c9396 │ │ stmia r4!, {r1, r2, r3, r4, r5, r7} │ │ - b.n c922c │ │ + b.n c923c │ │ movs r4, r1 │ │ - b.n c912a │ │ + b.n c913a │ │ movs r4, r2 │ │ ldrh r0, [r0, #16] │ │ strb r5, [r2, #3] │ │ - b.n c922a │ │ + b.n c923a │ │ lsls r7, r0, #4 │ │ - b.n c8f8e │ │ - add r0, pc, #112 @ (adr r0, c8f00 ) │ │ - b.n c89b2 │ │ + b.n c8f9e │ │ + add r0, pc, #112 @ (adr r0, c8f10 ) │ │ + b.n c89c2 │ │ strb r6, [r7, #2] │ │ - b.n c924a │ │ + b.n c925a │ │ str r4, [r7, #8] │ │ - b.n c924e │ │ - b.n c8ea4 │ │ - b.n c8f2c │ │ + b.n c925e │ │ + b.n c8eb4 │ │ + b.n c8f3c │ │ stmia r0!, {r1} │ │ - b.n c93ae │ │ + b.n c93be │ │ movs r6, r1 │ │ - b.n c915e │ │ + b.n c916e │ │ movs r2, r7 │ │ ldmia r2!, {} │ │ lsls r6, r4, #2 │ │ - b.n c9150 │ │ + b.n c9160 │ │ movs r4, r4 │ │ cmp r2, #0 │ │ str r6, [r4, r2] │ │ - b.n c91f6 │ │ + b.n c9206 │ │ str r0, [sp, #4] │ │ - b.n c8f44 │ │ + b.n c8f54 │ │ movs r0, r1 │ │ - b.n c9570 │ │ + b.n c9580 │ │ movs r2, r1 │ │ cmp r2, #0 │ │ ands r5, r0 │ │ - b.n c9206 │ │ + b.n c9216 │ │ movs r5, r2 │ │ and.w r0, r0, r8, lsl #16 │ │ - b.n c960e │ │ + b.n c961e │ │ stmia r4!, {r1, r2, r3, r4, r5, r7} │ │ - b.n c9280 │ │ + b.n c9290 │ │ movs r4, r1 │ │ - b.n c917e │ │ + b.n c918e │ │ @ instruction: 0xffea9aff │ │ lsls r4, r2, #3 │ │ - b.n c8a1c │ │ + b.n c8a2c │ │ asrs r4, r0, #32 │ │ - b.n c9222 │ │ + b.n c9232 │ │ movs r0, #12 │ │ - b.n c9226 │ │ + b.n c9236 │ │ movs r0, r0 │ │ - b.n c9008 │ │ - ldr r7, [pc, #376] @ (c9064 ) │ │ + b.n c9018 │ │ + ldr r7, [pc, #372] @ (c9070 ) │ │ @ instruction: 0xebff8007 │ │ - b.n c9684 │ │ + b.n c9694 │ │ str r7, [r1, #0] │ │ - b.n c96b6 │ │ + b.n c96c6 │ │ ands r0, r1 │ │ - b.n c8f84 │ │ + b.n c8f94 │ │ str r5, [r0, r2] │ │ - b.n c9012 │ │ + b.n c9022 │ │ strb r6, [r0, #0] │ │ - b.n c940c │ │ + b.n c941c │ │ str r0, [r1, r0] │ │ - b.n c9246 │ │ + b.n c9256 │ │ movs r2, r0 │ │ - b.n c9398 │ │ + b.n c93a8 │ │ str r0, [r1, r0] │ │ - b.n c93b8 │ │ + b.n c93c8 │ │ lsrs r7, r1, #8 │ │ orn sl, r0, #8781824 @ 0x860000 │ │ - bl ffd10f0a │ │ + bl ffd10f1a │ │ subs r7, r7, r3 │ │ movs r0, r1 │ │ - b.n c91d0 │ │ + b.n c91e0 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ lsls r4, r0, #2 │ │ - b.n c903a │ │ + b.n c904a │ │ str r4, [r2, #0] │ │ - b.n c942a │ │ + b.n c943a │ │ str r6, [r0, r0] │ │ - b.n c926e │ │ + b.n c927e │ │ lsls r2, r6, #2 │ │ - b.n c921c │ │ + b.n c922c │ │ ands r1, r0 │ │ - b.n c93be │ │ + b.n c93ce │ │ lsls r0, r6, #2 │ │ - b.n c92c6 │ │ + b.n c92d6 │ │ movs r1, r0 │ │ - b.n c91e6 │ │ + b.n c91f6 │ │ str r5, [r0, #0] │ │ - b.n c9282 │ │ + b.n c9292 │ │ @ instruction: 0xfff98aff │ │ movs r4, r2 │ │ - b.n c945e │ │ - b.n c90c8 │ │ - b.n c92e2 │ │ + b.n c946e │ │ + b.n c90d8 │ │ + b.n c92f2 │ │ asrs r1, r0, #2 │ │ - b.n c9052 │ │ + b.n c9062 │ │ stmia r0!, {r2, r3, r4, r5, r7} │ │ - b.n c92ea │ │ + b.n c92fa │ │ ands r0, r0 │ │ - b.n c969a │ │ + b.n c96aa │ │ movs r0, r0 │ │ - b.n c9602 │ │ - b.n c90c0 │ │ - b.n c92e4 │ │ + b.n c9612 │ │ + b.n c90d0 │ │ + b.n c92f4 │ │ asrs r6, r7, #1 │ │ - b.n c8d64 │ │ + b.n c8d74 │ │ adds r0, #1 │ │ - b.n c8eaa │ │ + b.n c8eba │ │ ands r4, r0 │ │ - b.n c8a6e │ │ + b.n c8a7e │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #208 @ 0xd0 │ │ - b.n c92fa │ │ + b.n c930a │ │ adds r0, #182 @ 0xb6 │ │ - b.n c92fa │ │ + b.n c930a │ │ movs r0, r1 │ │ - b.n c947e │ │ + b.n c948e │ │ asrs r2, r0, #32 │ │ - b.n c92c2 │ │ + b.n c92d2 │ │ movs r0, #3 │ │ - b.n c92c6 │ │ - adds r1, #14 │ │ + b.n c92d6 │ │ + adds r0, #211 @ 0xd3 │ │ mla r0, r0, r4, r0 │ │ - b.n c92ce │ │ - beq.n c8fc8 │ │ - b.n c9428 │ │ + b.n c92de │ │ + beq.n c8fd8 │ │ + b.n c9438 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2} │ │ - b.n c8ac4 │ │ + b.n c8ad4 │ │ @ instruction: 0x47be │ │ - b.n c95ae │ │ - ldr r7, [pc, #1020] @ (c939c ) │ │ - b.n c9640 │ │ + b.n c95be │ │ + ldr r7, [pc, #1020] @ (c93ac ) │ │ + b.n c9650 │ │ movs r2, r0 │ │ - b.n c96a6 │ │ + b.n c96b6 │ │ movs r4, r0 │ │ - b.n c8ab4 │ │ + b.n c8ac4 │ │ movs r4, r0 │ │ - b.n c92ee │ │ - beq.n c8fe8 │ │ - b.n c9448 │ │ + b.n c92fe │ │ + beq.n c8ff8 │ │ + b.n c9458 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r3, r6, r8, r9, ip, sp, lr} │ │ + ldmia.w sp!, {r3, r4, r5, r8, r9, ip, sp, lr} │ │ vqshrun.s64 d20, q8, #12 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n c94dc │ │ + b.n c94ec │ │ lsrs r0, r3 │ │ - b.n c9346 │ │ + b.n c9356 │ │ movs r0, #0 │ │ - b.n c970a │ │ + b.n c971a │ │ adds r0, #128 @ 0x80 │ │ - b.n c970e │ │ + b.n c971e │ │ movs r0, #172 @ 0xac │ │ - b.n c8ad4 │ │ + b.n c8ae4 │ │ movs r0, #176 @ 0xb0 │ │ - b.n c8ad8 │ │ + b.n c8ae8 │ │ adds r0, #6 │ │ - b.n c8b5c │ │ + b.n c8b6c │ │ movs r0, #180 @ 0xb4 │ │ - b.n c9360 │ │ + b.n c9370 │ │ ands r0, r1 │ │ - b.n c8ae4 │ │ + b.n c8af4 │ │ str r4, [r1, r0] │ │ - b.n c8ae8 │ │ + b.n c8af8 │ │ movs r0, #16 │ │ - b.n c8aec │ │ + b.n c8afc │ │ movs r0, #20 │ │ - b.n c8af0 │ │ + b.n c8b00 │ │ movs r0, #24 │ │ - b.n c8af4 │ │ + b.n c8b04 │ │ adds r0, #4 │ │ - b.n c8b96 │ │ + b.n c8ba6 │ │ movs r1, r0 │ │ - b.n c9620 │ │ + b.n c9630 │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ movs r0, #1 │ │ - b.n c9342 │ │ + b.n c9352 │ │ movs r6, r0 │ │ and.w r1, r0, r4, asr #9 │ │ - b.n c8b0c │ │ + b.n c8b1c │ │ movs r1, #104 @ 0x68 │ │ - b.n c8b10 │ │ + b.n c8b20 │ │ movs r0, #208 @ 0xd0 │ │ - b.n c8b14 │ │ + b.n c8b24 │ │ movs r0, #184 @ 0xb8 │ │ - b.n c9518 │ │ + b.n c9528 │ │ lsrs r0, r3 │ │ - b.n c939a │ │ + b.n c93aa │ │ movs r0, #24 │ │ - b.n c8b20 │ │ - ldr r4, [pc, #960] @ (c93e0 ) │ │ - b.n c93a4 │ │ + b.n c8b30 │ │ + ldr r4, [pc, #960] @ (c93f0 ) │ │ + b.n c93b4 │ │ rors r0, r2 │ │ - b.n c93a6 │ │ + b.n c93b6 │ │ asrs r6, r0, #32 │ │ - b.n c8bca │ │ + b.n c8bda │ │ asrs r6, r0, #32 │ │ - b.n c8bb2 │ │ + b.n c8bc2 │ │ rors r0, r6 │ │ - b.n c93b6 │ │ + b.n c93c6 │ │ asrs r4, r6, #2 │ │ - b.n c93d6 │ │ + b.n c93e6 │ │ asrs r4, r6, #2 │ │ - b.n c93be │ │ + b.n c93ce │ │ asrs r5, r2, #3 │ │ - b.n c93de │ │ + b.n c93ee │ │ movs r0, r0 │ │ - b.n c96e4 │ │ + b.n c96f4 │ │ movs r5, r1 │ │ - ldr r2, [pc, #0] @ (c9044 ) │ │ + ldr r2, [pc, #0] @ (c9054 ) │ │ asrs r7, r0, #32 │ │ - b.n c978a │ │ + b.n c979a │ │ adds r0, #124 @ 0x7c │ │ - b.n c978e │ │ + b.n c979e │ │ str r1, [r0, r4] │ │ - b.n c8f72 │ │ + b.n c8f82 │ │ ands r3, r0 │ │ - b.n c915a │ │ + b.n c916a │ │ str r1, [r0, r4] │ │ - b.n c8f5e │ │ + b.n c8f6e │ │ str r3, [r0, r0] │ │ - b.n c915e │ │ + b.n c916e │ │ adds r0, #2 │ │ - b.n c9568 │ │ + b.n c9578 │ │ str r0, [r6, r2] │ │ - b.n c9410 │ │ + b.n c9420 │ │ str r0, [r6, r2] │ │ - b.n c93f2 │ │ + b.n c9402 │ │ str r7, [r0, r0] │ │ - b.n c94f0 │ │ + b.n c9500 │ │ lsrs r5, r2 │ │ - b.n c9412 │ │ + b.n c9422 │ │ asrs r1, r0, #32 │ │ - b.n c9578 │ │ + b.n c9588 │ │ movs r4, r0 │ │ - b.n c9324 │ │ + b.n c9334 │ │ @ instruction: 0xfff3baff │ │ movs r2, r0 │ │ - b.n c93c2 │ │ + b.n c93d2 │ │ ldrh r0, [r6, #0] │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, fp, lr} │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n c95a8 │ │ - beq.n c90a0 │ │ - b.n c952c │ │ + b.n c95b8 │ │ + beq.n c90b0 │ │ + b.n c953c │ │ ands r2, r0 │ │ - b.n c93d6 │ │ + b.n c93e6 │ │ str r1, [r0, r0] │ │ - b.n c93da │ │ + b.n c93ea │ │ movs r1, r0 │ │ - b.n c9742 │ │ + b.n c9752 │ │ movs r5, r4 │ │ subs r0, r0, r0 │ │ str r4, [r1, #0] │ │ - b.n c8bd0 │ │ + b.n c8be0 │ │ movs r2, #72 @ 0x48 │ │ - b.n c8bd6 │ │ + b.n c8be6 │ │ movs r0, r0 │ │ - b.n c9752 │ │ + b.n c9762 │ │ movs r7, r5 │ │ lsrs r0, r0, #8 │ │ asrs r0, r5, #32 │ │ - b.n c8be2 │ │ + b.n c8bf2 │ │ adds r2, #52 @ 0x34 │ │ - b.n c8be6 │ │ + b.n c8bf6 │ │ movs r1, r0 │ │ - b.n c9364 │ │ + b.n c9374 │ │ movs r4, r4 │ │ ldrh r0, [r0, #16] │ │ asrs r4, r1, #9 │ │ - b.n c8bf2 │ │ + b.n c8c02 │ │ adds r0, #20 │ │ - b.n c8bee │ │ + b.n c8bfe │ │ strh r0, [r3, #30] │ │ - b.n c945a │ │ + b.n c946a │ │ asrs r1, r0, #32 │ │ - b.n c9554 │ │ + b.n c9564 │ │ adds r2, #72 @ 0x48 │ │ - b.n c8be2 │ │ + b.n c8bf2 │ │ adds r0, #0 │ │ - b.n c981a │ │ + b.n c982a │ │ asrs r4, r1, #9 │ │ - b.n c8bea │ │ + b.n c8bfa │ │ movs r0, #240 @ 0xf0 │ │ - b.n c9462 │ │ + b.n c9472 │ │ str r0, [sp, #16] │ │ - b.n c8bea │ │ + b.n c8bfa │ │ strh r0, [r0, #0] │ │ - b.n c8bee │ │ + b.n c8bfe │ │ asrs r4, r0, #32 │ │ - b.n c8c0e │ │ + b.n c8c1e │ │ movs r0, r0 │ │ - b.n c9794 │ │ + b.n c97a4 │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ asrs r4, r1, #32 │ │ - b.n c8c24 │ │ + b.n c8c34 │ │ movs r0, #4 │ │ - b.n c983e │ │ + b.n c984e │ │ movs r0, r0 │ │ - b.n c8c22 │ │ + b.n c8c32 │ │ asrs r0, r0, #1 │ │ - b.n c8c28 │ │ + b.n c8c38 │ │ movs r0, #186 @ 0xba │ │ - b.n c948a │ │ + b.n c949a │ │ asrs r0, r1, #1 │ │ - b.n c8c30 │ │ + b.n c8c40 │ │ movs r4, #208 @ 0xd0 │ │ - b.n c9494 │ │ + b.n c94a4 │ │ str r4, [r0, #0] │ │ - b.n c923a │ │ + b.n c924a │ │ strb r0, [r0, #0] │ │ - b.n c9660 │ │ + b.n c9670 │ │ str r0, [r6, #76] @ 0x4c │ │ - b.n c94a0 │ │ + b.n c94b0 │ │ asrs r0, r2, #32 │ │ - b.n c8c4c │ │ + b.n c8c5c │ │ movs r0, #20 │ │ - b.n c8c48 │ │ + b.n c8c58 │ │ movs r0, #4 │ │ - b.n c922e │ │ + b.n c923e │ │ movs r0, #20 │ │ - b.n c8c30 │ │ + b.n c8c40 │ │ ands r4, r1 │ │ - b.n c8c32 │ │ - beq.n c9164 │ │ - b.n c95cc │ │ + b.n c8c42 │ │ + beq.n c9174 │ │ + b.n c95dc │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {sp, lr} │ │ - b.n c947e │ │ + b.n c948e │ │ asrs r5, r0, #32 │ │ - b.n c9482 │ │ + b.n c9492 │ │ movs r0, #4 │ │ - b.n c9486 │ │ + b.n c9496 │ │ adds r0, #0 │ │ - b.n c988a │ │ + b.n c989a │ │ stmia r6!, {r0, r1, r4} │ │ @ instruction: 0xebff0006 │ │ - b.n c9492 │ │ + b.n c94a2 │ │ @ instruction: 0xffe4eaff │ │ strb r0, [r0, #0] │ │ - b.n c949a │ │ + b.n c94aa │ │ movs r6, r0 │ │ - b.n c949e │ │ + b.n c94ae │ │ stmia r4!, {r0, r2, r6} │ │ @ instruction: 0xebff2248 │ │ - b.n c8c92 │ │ + b.n c8ca2 │ │ movs r7, r0 │ │ - b.n c94aa │ │ + b.n c94ba │ │ movs r0, r0 │ │ - b.n c9812 │ │ + b.n c9822 │ │ @ instruction: 0xffd31aff │ │ movs r0, #160 @ 0xa0 │ │ - b.n c8ca2 │ │ + b.n c8cb2 │ │ strb r0, [r0, #0] │ │ - b.n c8c9e │ │ + b.n c8cae │ │ movs r0, r0 │ │ - b.n c982c │ │ + b.n c983c │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ adds r1, #7 │ │ - b.n c90aa │ │ + b.n c90ba │ │ strb r1, [r0, #0] │ │ - b.n c9618 │ │ + b.n c9628 │ │ asrs r0, r0, #1 │ │ - b.n c8cba │ │ + b.n c8cca │ │ strb r0, [r0, #0] │ │ - b.n c8c96 │ │ + b.n c8ca6 │ │ movs r0, #1 │ │ - b.n c98d6 │ │ + b.n c98e6 │ │ movs r0, #0 │ │ - b.n c8cb4 │ │ + b.n c8cc4 │ │ movs r0, #6 │ │ - b.n c94de │ │ + b.n c94ee │ │ strb r0, [r0, #0] │ │ - b.n c94e2 │ │ + b.n c94f2 │ │ stmia r4!, {r1, r3, r4, r5, r7} │ │ @ instruction: 0xebff0007 │ │ - b.n c94ea │ │ + b.n c94fa │ │ @ instruction: 0xffceeaff │ │ str r0, [r0, #0] │ │ - b.n c94f2 │ │ + b.n c9502 │ │ asrs r5, r0, #32 │ │ - b.n c94f6 │ │ + b.n c9506 │ │ movs r0, #1 │ │ - b.n c98fa │ │ + b.n c990a │ │ @ instruction: 0xffe1eaff │ │ - ldr r7, [pc, #960] @ (c9580 ) │ │ + ldr r7, [pc, #960] @ (c9590 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n c96e0 │ │ + b.n c96f0 │ │ svc 143 @ 0x8f │ │ - b.n c9664 │ │ - add r0, pc, #852 @ (adr r0, c9520 ) │ │ - b.n c956e │ │ + b.n c9674 │ │ + add r0, pc, #852 @ (adr r0, c9530 ) │ │ + b.n c957e │ │ str r4, [r3, #0] │ │ - b.n c96d2 │ │ + b.n c96e2 │ │ asrs r4, r1, #32 │ │ - b.n c8cf6 │ │ + b.n c8d06 │ │ ands r0, r0 │ │ - b.n c951a │ │ + b.n c952a │ │ adds r0, #16 │ │ - b.n c8cfe │ │ + b.n c8d0e │ │ strb r2, [r1, #4] │ │ - b.n c910e │ │ + b.n c911e │ │ str r0, [sp, #272] @ 0x110 │ │ - b.n c8d08 │ │ + b.n c8d18 │ │ lsls r0, r0, #1 │ │ - b.n c8d0c │ │ + b.n c8d1c │ │ movs r1, r1 │ │ - b.n c9494 │ │ + b.n c94a4 │ │ movs r0, #186 @ 0xba │ │ - b.n c95a0 │ │ + b.n c95b0 │ │ movs r0, #1 │ │ - b.n c95fa │ │ + b.n c960a │ │ lsls r1, r1, #7 │ │ lsrs r0, r0, #8 │ │ stmia r0!, {r0, r2, r4, r6, r7} │ │ - b.n c8d9e │ │ + b.n c8dae │ │ str r5, [sp, #760] @ 0x2f8 │ │ - b.n c95a2 │ │ + b.n c95b2 │ │ strh r4, [r7, #4] │ │ - b.n c95b4 │ │ + b.n c95c4 │ │ lsls r6, r7, #2 │ │ - b.n c95b8 │ │ + b.n c95c8 │ │ str r0, [r1, r0] │ │ - b.n c928e │ │ + b.n c929e │ │ movs r0, r0 │ │ - b.n c9952 │ │ + b.n c9962 │ │ lsls r0, r5, #2 │ │ - b.n c94ba │ │ + b.n c94ca │ │ movs r3, r0 │ │ cmp r2, #0 │ │ movs r1, r1 │ │ - b.n c94c8 │ │ + b.n c94d8 │ │ movs r1, r0 │ │ ldrh r0, [r0, #16] │ │ - beq.n c925c │ │ - b.n c96bc │ │ + beq.n c926c │ │ + b.n c96cc │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r7, sp} │ │ - b.n c8d48 │ │ + b.n c8d58 │ │ movs r0, #122 @ 0x7a │ │ - b.n c9010 │ │ + b.n c9020 │ │ movs r0, r0 │ │ - b.n c98da │ │ + b.n c98ea │ │ lsls r0, r2 │ │ - b.n c8d54 │ │ + b.n c8d64 │ │ lsls r1, r4, #7 │ │ lsrs r0, r0, #8 │ │ asrs r4, r3, #2 │ │ - b.n c975c │ │ + b.n c976c │ │ movs r4, r0 │ │ - b.n c9586 │ │ + b.n c9596 │ │ strb r0, [r6, #0] │ │ - b.n c8d64 │ │ + b.n c8d74 │ │ stmia r0!, {r2, r3, r4, r5} │ │ - b.n c8d68 │ │ + b.n c8d78 │ │ str r4, [r6, r0] │ │ - b.n c8d6c │ │ + b.n c8d7c │ │ str r6, [r0, r0] │ │ - b.n c9596 │ │ + b.n c95a6 │ │ vqrdmlah.s16 q15, , │ │ ands r0, r0 │ │ - b.n c959e │ │ + b.n c95ae │ │ movs r0, #124 @ 0x7c │ │ - b.n c976a │ │ - add r0, pc, #4 @ (adr r0, c9268 ) │ │ - b.n c96fa │ │ + b.n c977a │ │ + add r0, pc, #4 @ (adr r0, c9278 ) │ │ + b.n c970a │ │ movs r0, r0 │ │ - b.n c99aa │ │ + b.n c99ba │ │ strb r2, [r0, #0] │ │ - b.n c95ae │ │ + b.n c95be │ │ lsls r0, r3, #2 │ │ - b.n c8d8c │ │ + b.n c8d9c │ │ asrs r2, r1, #2 │ │ - b.n c95b6 │ │ + b.n c95c6 │ │ movs r0, #108 @ 0x6c │ │ - b.n c8d94 │ │ + b.n c8da4 │ │ asrs r1, r6, #2 │ │ - b.n c95ec │ │ + b.n c95fc │ │ lsls r4, r2, #2 │ │ - b.n c8d9c │ │ + b.n c8dac │ │ movs r0, r0 │ │ - b.n c9928 │ │ + b.n c9938 │ │ movs r3, r2 │ │ lsrs r0, r0, #8 │ │ movs r1, #10 │ │ - b.n c9396 │ │ + b.n c93a6 │ │ lsls r0, r2, #2 │ │ - b.n c8dcc │ │ + b.n c8ddc │ │ movs r0, #28 │ │ - b.n c8dba │ │ + b.n c8dca │ │ lsls r5, r2, #3 │ │ - b.n c963a │ │ + b.n c964a │ │ movs r0, #20 │ │ - b.n c97a2 │ │ + b.n c97b2 │ │ asrs r1, r0, #2 │ │ - b.n c93a6 │ │ + b.n c93b6 │ │ lsls r0, r0, #4 │ │ - b.n c91d2 │ │ + b.n c91e2 │ │ asrs r2, r6, #2 │ │ - b.n c954c │ │ + b.n c955c │ │ asrs r1, r0, #32 │ │ - b.n c91d2 │ │ + b.n c91e2 │ │ movs r0, #152 @ 0x98 │ │ - b.n c97cc │ │ + b.n c97dc │ │ adds r0, #0 │ │ - b.n c8dd6 │ │ + b.n c8de6 │ │ movs r4, r0 │ │ - b.n c8dda │ │ + b.n c8dea │ │ adds r0, #0 │ │ - b.n c8dd8 │ │ + b.n c8de8 │ │ movs r4, r0 │ │ - b.n c8ddc │ │ + b.n c8dec │ │ movs r4, r0 │ │ - b.n c9606 │ │ + b.n c9616 │ │ add r7, sp, #604 @ 0x25c │ │ @ instruction: 0xebff0000 │ │ - b.n c996e │ │ + b.n c997e │ │ @ instruction: 0xffd31aff │ │ lsls r0, r6, #2 │ │ - b.n c9684 │ │ + b.n c9694 │ │ str r5, [r0, #0] │ │ - b.n c961a │ │ + b.n c962a │ │ asrs r4, r3, #32 │ │ - b.n c97e6 │ │ + b.n c97f6 │ │ asrs r0, r1, #2 │ │ - b.n c8dfc │ │ + b.n c8e0c │ │ movs r0, #1 │ │ - b.n c97e6 │ │ + b.n c97f6 │ │ adds r1, #10 │ │ - b.n c920c │ │ + b.n c921c │ │ asrs r4, r7, #2 │ │ - b.n c9694 │ │ + b.n c96a4 │ │ lsls r1, r4, #2 │ │ - b.n c9596 │ │ + b.n c95a6 │ │ asrs r0, r2, #2 │ │ - b.n c8e30 │ │ + b.n c8e40 │ │ movs r7, r1 │ │ cmp r2, #0 │ │ lsls r5, r2, #3 │ │ - b.n c96a0 │ │ + b.n c96b0 │ │ asrs r4, r2, #32 │ │ - b.n c9808 │ │ + b.n c9818 │ │ movs r0, #130 @ 0x82 │ │ - b.n c9408 │ │ + b.n c9418 │ │ lsls r0, r0, #4 │ │ - b.n c9236 │ │ + b.n c9246 │ │ movs r0, #176 @ 0xb0 │ │ - b.n c96b2 │ │ + b.n c96c2 │ │ adds r0, #4 │ │ - b.n c8e32 │ │ + b.n c8e42 │ │ asrs r2, r0, #32 │ │ - b.n c9238 │ │ + b.n c9248 │ │ movs r0, #0 │ │ - b.n c8e3a │ │ + b.n c8e4a │ │ movs r0, #240 @ 0xf0 │ │ - b.n c96b8 │ │ + b.n c96c8 │ │ movs r0, #148 @ 0x94 │ │ - b.n c983c │ │ + b.n c984c │ │ movs r4, r0 │ │ - b.n c9666 │ │ + b.n c9676 │ │ add r7, sp, #508 @ 0x1fc │ │ @ instruction: 0xebff0000 │ │ - b.n c99ce │ │ + b.n c99de │ │ @ instruction: 0xffbb1aff │ │ lsls r0, r6, #2 │ │ - b.n c96e4 │ │ + b.n c96f4 │ │ asrs r0, r2, #2 │ │ - b.n c8e74 │ │ - add r0, pc, #608 @ (adr r0, c959c ) │ │ - b.n c8e78 │ │ + b.n c8e84 │ │ + add r0, pc, #608 @ (adr r0, c95ac ) │ │ + b.n c8e88 │ │ movs r0, #0 │ │ - b.n c9a82 │ │ + b.n c9a92 │ │ movs r0, #140 @ 0x8c │ │ - b.n c8e60 │ │ + b.n c8e70 │ │ str r0, [r0, #0] │ │ - b.n c9a8a │ │ + b.n c9a9a │ │ movs r0, r0 │ │ - b.n c9a02 │ │ - b.n c9478 │ │ - b.n c8e8c │ │ + b.n c9a12 │ │ + b.n c9488 │ │ + b.n c8e9c │ │ movs r0, #188 @ 0xbc │ │ asrs r2, r3, #7 │ │ str r4, [r7, r1] │ │ - b.n c985c │ │ + b.n c986c │ │ adds r0, #190 @ 0xbe │ │ asrs r2, r3, #7 │ │ str r2, [r0, #0] │ │ asrs r3, r0, #1 │ │ movs r0, r0 │ │ - b.n c9a22 │ │ + b.n c9a32 │ │ stmia r0!, {r2, r3, r4, r5, r7} │ │ asrs r6, r3, #7 │ │ strb r6, [r7, #2] │ │ asrs r6, r3, #7 │ │ movs r0, #213 @ 0xd5 │ │ - b.n c971a │ │ + b.n c972a │ │ strb r4, [r1, #0] │ │ asrs r7, r0, #1 │ │ strb r4, [r1, #2] │ │ asrs r5, r1, #22 │ │ strb r0, [r1, #2] │ │ - b.n c8eb8 │ │ + b.n c8ec8 │ │ movs r0, r0 │ │ - b.n c9a36 │ │ + b.n c9a46 │ │ adds r0, #213 @ 0xd5 │ │ - b.n c9728 │ │ + b.n c9738 │ │ str r0, [r7, r1] │ │ - b.n c8ea4 │ │ + b.n c8eb4 │ │ movs r1, #2 │ │ - b.n c92bc │ │ + b.n c92cc │ │ strb r0, [r0, #0] │ │ - b.n c9ad2 │ │ + b.n c9ae2 │ │ strb r4, [r7, #2] │ │ asrs r2, r3, #7 │ │ adds r0, #131 @ 0x83 │ │ - b.n c94a4 │ │ + b.n c94b4 │ │ str r0, [r0, r0] │ │ - b.n c9ade │ │ + b.n c9aee │ │ str r4, [r0, r2] │ │ - b.n c8ebc │ │ + b.n c8ecc │ │ strb r7, [r4, #2] │ │ asrs r0, r4, #6 │ │ stmia r0!, {r4, r5, r7} │ │ - b.n c9750 │ │ + b.n c9760 │ │ strb r4, [r0, #2] │ │ asrs r5, r1, #22 │ │ strb r0, [r0, #0] │ │ asrs r0, r4, #14 │ │ movs r0, r0 │ │ - b.n c9a72 │ │ + b.n c9a82 │ │ movs r0, #188 @ 0xbc │ │ - b.n c975e │ │ + b.n c976e │ │ adds r0, #188 @ 0xbc │ │ asrs r6, r3, #7 │ │ movs r0, #162 @ 0xa2 │ │ - b.n c9702 │ │ + b.n c9712 │ │ strb r3, [r4, #2] │ │ asrs r0, r4, #6 │ │ adds r0, #128 @ 0x80 │ │ - b.n c8f04 │ │ + b.n c8f14 │ │ adds r0, #1 │ │ - b.n c98d4 │ │ + b.n c98e4 │ │ adds r0, #88 @ 0x58 │ │ - b.n c8eec │ │ + b.n c8efc │ │ adds r0, #168 @ 0xa8 │ │ - b.n c9716 │ │ + b.n c9726 │ │ strh r0, [r0, #0] │ │ - b.n c9b1a │ │ + b.n c9b2a │ │ adds r0, #44 @ 0x2c │ │ - b.n c8ef8 │ │ + b.n c8f08 │ │ adds r0, #0 │ │ - b.n c9b22 │ │ + b.n c9b32 │ │ movs r0, #84 @ 0x54 │ │ - b.n c8f00 │ │ + b.n c8f10 │ │ movs r0, #140 @ 0x8c │ │ - b.n c8f24 │ │ + b.n c8f34 │ │ str r4, [r0, r2] │ │ - b.n c8f28 │ │ + b.n c8f38 │ │ movs r6, r0 │ │ - b.n c9696 │ │ + b.n c96a6 │ │ movs r0, #0 │ │ - b.n c9b36 │ │ + b.n c9b46 │ │ movs r0, #1 │ │ adds r3, #0 │ │ movs r5, r0 │ │ - b.n c96ac │ │ + b.n c96bc │ │ adds r0, #1 │ │ strh r0, [r0, #24] │ │ movs r0, #2 │ │ - b.n c940c │ │ + b.n c941c │ │ movs r0, #72 @ 0x48 │ │ - b.n c8f24 │ │ + b.n c8f34 │ │ movs r0, #5 │ │ - b.n c9526 │ │ + b.n c9536 │ │ movs r0, #92 @ 0x5c │ │ - b.n c8f2c │ │ + b.n c8f3c │ │ cmp r7, #30 │ │ - b.n c96f4 │ │ + b.n c9704 │ │ movs r0, r0 │ │ - b.n c9ad6 │ │ + b.n c9ae6 │ │ str r1, [r0, r0] │ │ - b.n c98a8 │ │ + b.n c98b8 │ │ adds r2, #162 @ 0xa2 │ │ - b.n c9762 │ │ + b.n c9772 │ │ cmp r7, #26 │ │ - b.n c9704 │ │ + b.n c9714 │ │ adds r0, #116 @ 0x74 │ │ - b.n c8f44 │ │ + b.n c8f54 │ │ movs r2, #162 @ 0xa2 │ │ - b.n c976e │ │ + b.n c977e │ │ adds r0, #3 │ │ - b.n c9736 │ │ + b.n c9746 │ │ movs r0, #14 │ │ - b.n c9776 │ │ + b.n c9786 │ │ movs r0, #1 │ │ asrs r0, r0, #12 │ │ movs r0, r0 │ │ - b.n c9af2 │ │ + b.n c9b02 │ │ movs r0, #112 @ 0x70 │ │ - b.n c8f5c │ │ + b.n c8f6c │ │ movs r0, #10 │ │ - b.n c9786 │ │ + b.n c9796 │ │ movs r0, #1 │ │ asrs r0, r0, #12 │ │ str r4, [r4, r1] │ │ - b.n c8f68 │ │ + b.n c8f78 │ │ str r1, [r0, r0] │ │ - b.n c9952 │ │ + b.n c9962 │ │ str r0, [r2, r1] │ │ - b.n c8f70 │ │ + b.n c8f80 │ │ movs r1, r0 │ │ - b.n c98da │ │ + b.n c98ea │ │ lsls r0, r4, #1 │ │ - b.n c8f78 │ │ + b.n c8f88 │ │ movs r0, #56 @ 0x38 │ │ - b.n c8f7c │ │ + b.n c8f8c │ │ strb r4, [r0, #1] │ │ - b.n c8f80 │ │ + b.n c8f90 │ │ str r0, [sp, #496] @ 0x1f0 │ │ - b.n c8f84 │ │ + b.n c8f94 │ │ movs r0, r0 │ │ - b.n c9b22 │ │ + b.n c9b32 │ │ str r0, [r7, r1] │ │ - b.n c8fac │ │ + b.n c8fbc │ │ movs r2, r0 │ │ - b.n c97b6 │ │ + b.n c97c6 │ │ movs r0, r2 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n c9aa4 │ │ + b.n c9ab4 │ │ movs r2, r0 │ │ - b.n c97c2 │ │ + b.n c97d2 │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ movs r4, r1 │ │ - b.n c8fac │ │ + b.n c8fbc │ │ str r0, [sp, #20] │ │ - b.n c97ce │ │ + b.n c97de │ │ str r3, [r0, r0] │ │ - b.n c97d2 │ │ + b.n c97e2 │ │ movs r0, #0 │ │ - b.n c8fca │ │ + b.n c8fda │ │ adds r0, #4 │ │ - b.n c8fce │ │ + b.n c8fde │ │ strb r4, [r7, #0] │ │ - b.n c8fbe │ │ + b.n c8fce │ │ movs r0, r7 │ │ - b.n c8fc2 │ │ + b.n c8fd2 │ │ adds r0, #7 │ │ - b.n c94ec │ │ + b.n c94fc │ │ movs r0, r0 │ │ - b.n c94ee │ │ + b.n c94fe │ │ movs r3, r0 │ │ - b.n c97ae │ │ + b.n c97be │ │ adds r0, #5 │ │ - b.n c97f2 │ │ + b.n c9802 │ │ lsrs r0, r2, #28 │ │ - b.n c9794 │ │ + b.n c97a4 │ │ str r1, [r1, r0] │ │ - b.n c97fa │ │ + b.n c980a │ │ lsls r0, r4, #10 │ │ - b.n c97fe │ │ + b.n c980e │ │ movs r0, #116 @ 0x74 │ │ - b.n c8ffc │ │ + b.n c900c │ │ adds r0, #64 @ 0x40 │ │ - b.n c8fe0 │ │ + b.n c8ff0 │ │ movs r0, #3 │ │ - b.n c97ce │ │ + b.n c97de │ │ adds r0, #112 @ 0x70 │ │ - b.n c9008 │ │ + b.n c9018 │ │ movs r1, r0 │ │ - b.n c9af6 │ │ + b.n c9b06 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ movs r0, #12 │ │ - b.n c8ffc │ │ + b.n c900c │ │ adds r0, #0 │ │ - b.n c901a │ │ + b.n c902a │ │ strb r4, [r0, #0] │ │ - b.n c901e │ │ + b.n c902e │ │ str r0, [sp, #240] @ 0xf0 │ │ - b.n c900a │ │ + b.n c901a │ │ movs r0, #56 @ 0x38 │ │ - b.n c900e │ │ + b.n c901e │ │ strb r1, [r1, #0] │ │ - b.n c953c │ │ + b.n c954c │ │ movs r0, #2 │ │ - b.n c9538 │ │ + b.n c9548 │ │ movs r0, #7 │ │ - b.n c97fa │ │ + b.n c980a │ │ cmp r7, #18 │ │ - b.n c97d8 │ │ + b.n c97e8 │ │ adds r2, #162 @ 0xa2 │ │ - b.n c983e │ │ + b.n c984e │ │ movs r1, r0 │ │ - b.n c9962 │ │ + b.n c9972 │ │ lsls r4, r1, #1 │ │ - b.n c9020 │ │ + b.n c9030 │ │ adds r0, #104 @ 0x68 │ │ - b.n c9024 │ │ + b.n c9034 │ │ movs r1, r7 │ │ subs r0, r0, r0 │ │ lsls r4, r7, #1 │ │ - b.n c904c │ │ + b.n c905c │ │ movs r0, r0 │ │ - b.n c97c2 │ │ + b.n c97d2 │ │ movs r6, r6 │ │ ldr r2, [sp, #0] │ │ lsls r4, r1, #2 │ │ - b.n c9058 │ │ + b.n c9068 │ │ movs r0, r0 │ │ - b.n c97ce │ │ + b.n c97de │ │ movs r3, r6 │ │ subs r2, #0 │ │ lsls r5, r2, #3 │ │ - b.n c98d2 │ │ + b.n c98e2 │ │ str r0, [sp, #20] │ │ - b.n c986e │ │ + b.n c987e │ │ movs r0, #136 @ 0x88 │ │ - b.n c906c │ │ + b.n c907c │ │ strb r4, [r5, #1] │ │ - b.n c9070 │ │ + b.n c9080 │ │ str r4, [r4, r1] │ │ - b.n c9074 │ │ - add r1, pc, #0 @ (adr r1, c953c ) │ │ - b.n c9442 │ │ + b.n c9084 │ │ + add r1, pc, #0 @ (adr r1, c954c ) │ │ + b.n c9452 │ │ lsls r5, r2, #3 │ │ - b.n c98ea │ │ + b.n c98fa │ │ movs r0, #96 @ 0x60 │ │ - b.n c9080 │ │ + b.n c9090 │ │ lsls r0, r0, #2 │ │ - b.n c9658 │ │ + b.n c9668 │ │ movs r0, #178 @ 0xb2 │ │ - b.n c97ce │ │ + b.n c97de │ │ lsls r5, r2, #3 │ │ - b.n c98fa │ │ + b.n c990a │ │ movs r0, #216 @ 0xd8 │ │ - b.n c98de │ │ + b.n c98ee │ │ lsls r0, r0, #2 │ │ - b.n c9668 │ │ + b.n c9678 │ │ str r0, [r6, r2] │ │ - b.n c98de │ │ + b.n c98ee │ │ str r4, [r3, r2] │ │ - b.n c9a7c │ │ + b.n c9a8c │ │ lsls r5, r2, #3 │ │ - b.n c9908 │ │ + b.n c9918 │ │ asrs r4, r1, #1 │ │ - b.n c9090 │ │ + b.n c90a0 │ │ adds r0, #84 @ 0x54 │ │ - b.n c9094 │ │ + b.n c90a4 │ │ lsls r0, r0, #2 │ │ - b.n c9684 │ │ + b.n c9694 │ │ asrs r1, r0, #32 │ │ - b.n c95fa │ │ + b.n c960a │ │ strh r0, [r6, #4] │ │ - b.n c98fa │ │ + b.n c990a │ │ strh r4, [r1, #0] │ │ - b.n c98be │ │ + b.n c98ce │ │ lsls r5, r2, #3 │ │ - b.n c992a │ │ + b.n c993a │ │ movs r1, #1 │ │ - b.n c94ac │ │ + b.n c94bc │ │ movs r1, #72 @ 0x48 │ │ - b.n c90a4 │ │ + b.n c90b4 │ │ movs r0, #128 @ 0x80 │ │ - b.n c969c │ │ + b.n c96ac │ │ lsls r0, r0, #2 │ │ - b.n c96a4 │ │ + b.n c96b4 │ │ str r1, [r0, r4] │ │ - b.n c949c │ │ + b.n c94ac │ │ asrs r4, r0, #32 │ │ - b.n c98da │ │ + b.n c98ea │ │ strb r0, [r6, #2] │ │ - b.n c9942 │ │ + b.n c9952 │ │ str r1, [r1, r0] │ │ - b.n c98e2 │ │ + b.n c98f2 │ │ lsls r0, r6, #2 │ │ - b.n c9946 │ │ + b.n c9956 │ │ movs r7, r0 │ │ - b.n c96aa │ │ + b.n c96ba │ │ strb r6, [r1, #0] │ │ - b.n c98ee │ │ + b.n c98fe │ │ movs r1, r0 │ │ - b.n c9ab2 │ │ + b.n c9ac2 │ │ lsls r0, r6, #2 │ │ - b.n c993a │ │ + b.n c994a │ │ lsls r0, r2, #2 │ │ - b.n c90f4 │ │ + b.n c9104 │ │ lsls r5, r4, #7 │ │ add.w r0, r0, ip, lsl #12 │ │ - b.n c90ea │ │ - b.n c95d2 │ │ - b.n c9906 │ │ + b.n c90fa │ │ + b.n c95e2 │ │ + b.n c9916 │ │ stmia r0!, {r3} │ │ - b.n c90f2 │ │ + b.n c9102 │ │ movs r1, r0 │ │ - b.n c9cae │ │ + b.n c9cbe │ │ movs r1, #72 @ 0x48 │ │ - b.n c910c │ │ + b.n c911c │ │ strb r4, [r1, #1] │ │ - b.n c90fc │ │ + b.n c910c │ │ adds r0, #84 @ 0x54 │ │ - b.n c9100 │ │ + b.n c9110 │ │ strb r7, [r0, #0] │ │ - b.n c9676 │ │ + b.n c9686 │ │ asrs r0, r2, #2 │ │ - b.n c911c │ │ + b.n c912c │ │ stmia r0!, {r3} │ │ - b.n c9926 │ │ + b.n c9936 │ │ strh r0, [r0, #0] │ │ - b.n c9d2a │ │ + b.n c9d3a │ │ movs r1, #7 │ │ - b.n c94f4 │ │ + b.n c9504 │ │ adds r0, #104 @ 0x68 │ │ - b.n c912c │ │ + b.n c913c │ │ lsls r1, r3, #3 │ │ subs r0, r0, r0 │ │ str r0, [r5, #0] │ │ - b.n c9114 │ │ + b.n c9124 │ │ lsls r4, r7, #1 │ │ - b.n c9138 │ │ + b.n c9148 │ │ movs r0, #140 @ 0x8c │ │ - b.n c913c │ │ + b.n c914c │ │ movs r0, r0 │ │ - b.n c98aa │ │ + b.n c98ba │ │ movs r0, r0 │ │ - b.n c9d4a │ │ + b.n c9d5a │ │ movs r1, r0 │ │ strh r0, [r0, #24] │ │ movs r0, r0 │ │ - b.n c9618 │ │ + b.n c9628 │ │ movs r1, r0 │ │ - b.n c9cb6 │ │ + b.n c9cc6 │ │ movs r6, r5 │ │ subs r0, r0, r0 │ │ lsls r5, r2, #3 │ │ - b.n c99c6 │ │ + b.n c99d6 │ │ movs r0, #136 @ 0x88 │ │ - b.n c915c │ │ + b.n c916c │ │ str r4, [r5, #4] │ │ - b.n c9160 │ │ - b.n c9828 │ │ - b.n c952e │ │ + b.n c9170 │ │ + b.n c9838 │ │ + b.n c953e │ │ movs r5, r0 │ │ - b.n c996e │ │ + b.n c997e │ │ movs r0, #213 @ 0xd5 │ │ - b.n c99da │ │ + b.n c99ea │ │ str r0, [r2, r1] │ │ - b.n c9170 │ │ + b.n c9180 │ │ adds r0, #12 │ │ - b.n c9162 │ │ + b.n c9172 │ │ movs r0, #130 @ 0x82 │ │ - b.n c974a │ │ + b.n c975a │ │ str r0, [sp, #32] │ │ - b.n c916a │ │ + b.n c917a │ │ str r2, [r6, r2] │ │ - b.n c98ca │ │ + b.n c98da │ │ str r0, [r0, r0] │ │ - b.n c998a │ │ + b.n c999a │ │ movs r0, #213 @ 0xd5 │ │ - b.n c99f6 │ │ + b.n c9a06 │ │ strb r4, [r1, #1] │ │ - b.n c9178 │ │ + b.n c9188 │ │ adds r0, #84 @ 0x54 │ │ - b.n c917c │ │ + b.n c918c │ │ movs r0, #130 @ 0x82 │ │ - b.n c9766 │ │ + b.n c9776 │ │ movs r7, r0 │ │ - b.n c96f0 │ │ + b.n c9700 │ │ str r6, [r1, #0] │ │ - b.n c99a2 │ │ + b.n c99b2 │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n c99a6 │ │ + b.n c99b6 │ │ strh r0, [r6, #4] │ │ - b.n c99ee │ │ + b.n c99fe │ │ movs r0, #156 @ 0x9c │ │ - b.n c9b88 │ │ + b.n c9b98 │ │ asrs r5, r2, #3 │ │ - b.n c9a14 │ │ + b.n c9a24 │ │ strb r0, [r0, #4] │ │ - b.n c959c │ │ + b.n c95ac │ │ strb r0, [r1, #5] │ │ - b.n c9194 │ │ + b.n c91a4 │ │ movs r1, #0 │ │ - b.n c9584 │ │ + b.n c9594 │ │ lsls r1, r0, #2 │ │ - b.n c978c │ │ + b.n c979c │ │ asrs r4, r2, #1 │ │ - b.n c91c0 │ │ + b.n c91d0 │ │ asrs r0, r6, #2 │ │ - b.n c9a0a │ │ + b.n c9a1a │ │ movs r4, r0 │ │ - b.n c99ce │ │ + b.n c99de │ │ asrs r0, r2, #2 │ │ - b.n c91cc │ │ + b.n c91dc │ │ lsls r7, r5, #6 │ │ add.w r0, r0, ip, lsl #12 │ │ - b.n c91c2 │ │ + b.n c91d2 │ │ movs r1, r0 │ │ - b.n c9d7e │ │ + b.n c9d8e │ │ stmia r0!, {r3} │ │ - b.n c91ca │ │ - b.n c96b0 │ │ - b.n c99e6 │ │ + b.n c91da │ │ + b.n c96c0 │ │ + b.n c99f6 │ │ asrs r0, r2, #2 │ │ - b.n c91e4 │ │ + b.n c91f4 │ │ strb r4, [r1, #1] │ │ - b.n c91d4 │ │ + b.n c91e4 │ │ adds r0, #84 @ 0x54 │ │ - b.n c91d8 │ │ + b.n c91e8 │ │ strb r7, [r0, #0] │ │ - b.n c974e │ │ + b.n c975e │ │ movs r1, #72 @ 0x48 │ │ - b.n c91f4 │ │ + b.n c9204 │ │ stmia r0!, {r0, r3} │ │ - b.n c99fe │ │ + b.n c9a0e │ │ movs r1, #7 │ │ - b.n c95c8 │ │ + b.n c95d8 │ │ asrs r5, r2, #3 │ │ asrs r1, r2, #7 │ │ asrs r1, r0, #2 │ │ asrs r5, r0, #2 │ │ stmia r0!, {r4, r5, r7} │ │ asrs r1, r0, #7 │ │ - beq.n c9708 │ │ + beq.n c9718 │ │ asrs r3, r1, #9 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ adds r5, r7, r2 │ │ stmia r0!, {r2, r5} │ │ - b.n c91f4 │ │ - b.n c971c │ │ - b.n c91f8 │ │ + b.n c9204 │ │ + b.n c972c │ │ + b.n c9208 │ │ lsls r4, r0, #2 │ │ - b.n c921c │ │ + b.n c922c │ │ movs r0, #88 @ 0x58 │ │ - b.n c9220 │ │ + b.n c9230 │ │ movs r2, r0 │ │ - b.n c998a │ │ + b.n c999a │ │ movs r0, r0 │ │ - b.n c9e2e │ │ + b.n c9e3e │ │ movs r0, #76 @ 0x4c │ │ - b.n c922c │ │ + b.n c923c │ │ movs r1, r0 │ │ str r3, [sp, #0] │ │ movs r0, r0 │ │ - b.n c99fe │ │ + b.n c9a0e │ │ movs r0, #72 @ 0x48 │ │ - b.n c9238 │ │ + b.n c9248 │ │ movs r2, r0 │ │ - b.n c9a22 │ │ + b.n c9a32 │ │ lsls r7, r2, #1 │ │ lsrs r0, r0, #8 │ │ lsls r4, r0, #1 │ │ - b.n c9244 │ │ + b.n c9254 │ │ stmia r0!, {} │ │ - b.n c9e4e │ │ + b.n c9e5e │ │ movs r0, #88 @ 0x58 │ │ - b.n c924c │ │ + b.n c925c │ │ movs r2, r0 │ │ - b.n c99b6 │ │ + b.n c99c6 │ │ movs r0, r0 │ │ - b.n c9e5a │ │ + b.n c9e6a │ │ movs r0, #104 @ 0x68 │ │ - b.n c9258 │ │ + b.n c9268 │ │ movs r1, r0 │ │ strh r0, [r0, #24] │ │ movs r0, r0 │ │ - b.n c972a │ │ + b.n c973a │ │ movs r1, r0 │ │ - b.n c9dca │ │ + b.n c9dda │ │ movs r7, r5 │ │ subs r0, r0, r0 │ │ lsls r5, r2, #3 │ │ - b.n c9ada │ │ + b.n c9aea │ │ movs r0, #136 @ 0x88 │ │ - b.n c9270 │ │ + b.n c9280 │ │ adds r0, #32 │ │ - b.n c9274 │ │ + b.n c9284 │ │ str r4, [r5, #4] │ │ - b.n c9278 │ │ + b.n c9288 │ │ adds r1, #0 │ │ - b.n c9646 │ │ + b.n c9656 │ │ movs r5, r0 │ │ - b.n c9a86 │ │ + b.n c9a96 │ │ movs r0, #213 @ 0xd5 │ │ - b.n c9af2 │ │ + b.n c9b02 │ │ str r0, [r2, r1] │ │ - b.n c9288 │ │ + b.n c9298 │ │ adds r0, #12 │ │ - b.n c927a │ │ + b.n c928a │ │ movs r0, #130 @ 0x82 │ │ - b.n c9862 │ │ + b.n c9872 │ │ strh r0, [r1, #0] │ │ - b.n c9282 │ │ + b.n c9292 │ │ str r2, [r6, r2] │ │ - b.n c99e2 │ │ + b.n c99f2 │ │ str r0, [r0, r0] │ │ - b.n c9aa2 │ │ + b.n c9ab2 │ │ movs r0, #213 @ 0xd5 │ │ - b.n c9b0e │ │ + b.n c9b1e │ │ strb r4, [r1, #1] │ │ - b.n c9290 │ │ + b.n c92a0 │ │ adds r0, #84 @ 0x54 │ │ - b.n c9294 │ │ + b.n c92a4 │ │ movs r0, #130 @ 0x82 │ │ - b.n c987e │ │ + b.n c988e │ │ movs r7, r0 │ │ - b.n c9806 │ │ + b.n c9816 │ │ stmia r0!, {r4, r5, r7} │ │ - b.n c9afe │ │ + b.n c9b0e │ │ movs r0, #156 @ 0x9c │ │ - b.n c9c98 │ │ + b.n c9ca8 │ │ asrs r5, r2, #3 │ │ - b.n c9b24 │ │ + b.n c9b34 │ │ strb r0, [r0, #4] │ │ - b.n c96ac │ │ + b.n c96bc │ │ strb r0, [r1, #5] │ │ - b.n c92a4 │ │ + b.n c92b4 │ │ movs r1, #0 │ │ - b.n c9694 │ │ + b.n c96a4 │ │ lsls r1, r0, #2 │ │ - b.n c989c │ │ + b.n c98ac │ │ movs r0, #0 │ │ - b.n c9ed6 │ │ + b.n c9ee6 │ │ asrs r4, r2, #1 │ │ - b.n c92d4 │ │ + b.n c92e4 │ │ asrs r0, r6, #2 │ │ - b.n c9b1e │ │ + b.n c9b2e │ │ movs r4, r0 │ │ - b.n c9ae2 │ │ + b.n c9af2 │ │ asrs r0, r2, #2 │ │ - b.n c92e0 │ │ + b.n c92f0 │ │ lsls r3, r3, #15 │ │ add.w r0, r0, ip, lsl #12 │ │ - b.n c92d6 │ │ + b.n c92e6 │ │ movs r1, r0 │ │ - b.n c9e92 │ │ + b.n c9ea2 │ │ strh r0, [r1, #0] │ │ - b.n c92de │ │ + b.n c92ee │ │ asrs r0, r2, #2 │ │ - b.n c92f4 │ │ + b.n c9304 │ │ strb r4, [r1, #1] │ │ - b.n c92e4 │ │ + b.n c92f4 │ │ adds r0, #84 @ 0x54 │ │ - b.n c92e8 │ │ + b.n c92f8 │ │ strb r7, [r0, #0] │ │ - b.n c9856 │ │ + b.n c9866 │ │ movs r1, #72 @ 0x48 │ │ - b.n c9304 │ │ + b.n c9314 │ │ movs r1, #7 │ │ - b.n c96d4 │ │ + b.n c96e4 │ │ movs r0, #0 │ │ asrs r0, r4, #6 │ │ lsls r5, r2, #3 │ │ asrs r1, r2, #7 │ │ asrs r4, r4, #32 │ │ asrs r5, r3, #22 │ │ lsls r0, r0, #2 │ │ asrs r5, r0, #2 │ │ asrs r0, r6, #2 │ │ asrs r0, r0, #7 │ │ movs r2, r0 │ │ asrs r0, r4, #6 │ │ - beq.n c9820 │ │ + beq.n c9830 │ │ asrs r3, r1, #9 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ adds r5, r7, r2 │ │ lsls r0, r0, #2 │ │ - b.n c932c │ │ + b.n c933c │ │ asrs r4, r2, #1 │ │ - b.n c9330 │ │ + b.n c9340 │ │ movs r0, r0 │ │ - b.n c9a9c │ │ + b.n c9aac │ │ lsls r0, r2, #4 │ │ ldrh r0, [r0, #16] │ │ strb r4, [r7, #1] │ │ - b.n c933c │ │ + b.n c934c │ │ strh r0, [r0, #0] │ │ - b.n c9f46 │ │ + b.n c9f56 │ │ adds r0, #64 @ 0x40 │ │ - b.n c9344 │ │ + b.n c9354 │ │ movs r0, r0 │ │ - b.n c9ebc │ │ + b.n c9ecc │ │ movs r0, #60 @ 0x3c │ │ - b.n c934c │ │ + b.n c935c │ │ movs r7, r0 │ │ - b.n c9b56 │ │ + b.n c9b66 │ │ asrs r1, r0, #32 │ │ - b.n c9c60 │ │ + b.n c9c70 │ │ movs r1, r0 │ │ asrs r0, r0, #12 │ │ movs r0, r0 │ │ - b.n c9ec6 │ │ + b.n c9ed6 │ │ movs r0, r0 │ │ - b.n c982a │ │ + b.n c983a │ │ str r0, [r5, #0] │ │ - b.n c9364 │ │ + b.n c9374 │ │ asrs r1, r0, #32 │ │ - b.n c9b2e │ │ - b.n c9870 │ │ - b.n c936c │ │ + b.n c9b3e │ │ + b.n c9880 │ │ + b.n c937c │ │ movs r1, r0 │ │ - b.n c9876 │ │ + b.n c9886 │ │ stmia r0!, {r2, r5} │ │ - b.n c9374 │ │ + b.n c9384 │ │ adds r0, #3 │ │ - b.n c9b3e │ │ + b.n c9b4e │ │ movs r7, r0 │ │ - b.n c9b82 │ │ + b.n c9b92 │ │ movs r0, r0 │ │ asrs r0, r0, #12 │ │ str r0, [sp, #4] │ │ - b.n c9c6c │ │ + b.n c9c7c │ │ str r0, [sp, #0] │ │ asrs r0, r4, #6 │ │ lsls r4, r7, #1 │ │ lsls r5, r3, #22 │ │ asrs r0, r2, #2 │ │ - b.n c9390 │ │ + b.n c93a0 │ │ movs r0, #56 @ 0x38 │ │ - b.n c9394 │ │ + b.n c93a4 │ │ movs r0, r0 │ │ lsls r0, r2, #13 │ │ vpmin.u8 , q8, │ │ lsls r6, r7, #3 │ │ and.w r0, r0, r5, lsr #3 │ │ - b.n c9c12 │ │ + b.n c9c22 │ │ movs r0, #136 @ 0x88 │ │ - b.n c93a8 │ │ + b.n c93b8 │ │ str r4, [r5, #4] │ │ - b.n c93ac │ │ - add r1, pc, #0 @ (adr r1, c9874 ) │ │ - b.n c977a │ │ + b.n c93bc │ │ + add r1, pc, #0 @ (adr r1, c9884 ) │ │ + b.n c978a │ │ movs r5, r0 │ │ - b.n c9bba │ │ + b.n c9bca │ │ movs r0, #213 @ 0xd5 │ │ - b.n c9c26 │ │ + b.n c9c36 │ │ str r0, [r4, r1] │ │ - b.n c93bc │ │ + b.n c93cc │ │ adds r0, #12 │ │ - b.n c93ae │ │ + b.n c93be │ │ movs r0, #130 @ 0x82 │ │ - b.n c9996 │ │ + b.n c99a6 │ │ stmia r0!, {r3} │ │ - b.n c93b6 │ │ + b.n c93c6 │ │ str r2, [r6, r2] │ │ - b.n c9b16 │ │ + b.n c9b26 │ │ str r0, [r0, r0] │ │ - b.n c9bd6 │ │ + b.n c9be6 │ │ movs r0, #213 @ 0xd5 │ │ - b.n c9c42 │ │ + b.n c9c52 │ │ strb r4, [r1, #1] │ │ - b.n c93c4 │ │ + b.n c93d4 │ │ adds r0, #84 @ 0x54 │ │ - b.n c93c8 │ │ + b.n c93d8 │ │ movs r0, #130 @ 0x82 │ │ - b.n c99b2 │ │ + b.n c99c2 │ │ str r4, [r4, #4] │ │ - b.n c93e4 │ │ + b.n c93f4 │ │ movs r7, r0 │ │ - b.n c9946 │ │ + b.n c9956 │ │ str r0, [r6, #8] │ │ - b.n c9c36 │ │ + b.n c9c46 │ │ movs r0, #156 @ 0x9c │ │ - b.n c9dd0 │ │ + b.n c9de0 │ │ asrs r5, r2, #3 │ │ - b.n c9c5c │ │ + b.n c9c6c │ │ strb r0, [r0, #4] │ │ - b.n c97e4 │ │ + b.n c97f4 │ │ strb r0, [r1, #5] │ │ - b.n c93dc │ │ + b.n c93ec │ │ movs r1, #0 │ │ - b.n c97cc │ │ + b.n c97dc │ │ lsls r1, r0, #2 │ │ - b.n c99d4 │ │ + b.n c99e4 │ │ movs r0, #1 │ │ - b.n ca00e │ │ + b.n ca01e │ │ asrs r0, r2, #2 │ │ - b.n c940c │ │ + b.n c941c │ │ strh r0, [r6, #4] │ │ - b.n c9c56 │ │ + b.n c9c66 │ │ movs r4, r0 │ │ - b.n c9c1a │ │ + b.n c9c2a │ │ lsls r6, r1, #14 │ │ add.w r0, r0, ip, lsl #12 │ │ - b.n c940a │ │ + b.n c941a │ │ movs r1, r0 │ │ - b.n c9fc6 │ │ + b.n c9fd6 │ │ stmia r0!, {r3} │ │ - b.n c9412 │ │ + b.n c9422 │ │ asrs r0, r2, #2 │ │ - b.n c9428 │ │ + b.n c9438 │ │ strb r4, [r1, #1] │ │ - b.n c9418 │ │ + b.n c9428 │ │ adds r0, #84 @ 0x54 │ │ - b.n c941c │ │ + b.n c942c │ │ strb r7, [r0, #0] │ │ - b.n c9992 │ │ + b.n c99a2 │ │ movs r1, #72 @ 0x48 │ │ - b.n c9438 │ │ + b.n c9448 │ │ movs r1, #7 │ │ - b.n c9808 │ │ + b.n c9818 │ │ vpmin.u q8, , │ │ asrs r5, r2, #3 │ │ - b.n c9cac │ │ + b.n c9cbc │ │ movs r0, #36 @ 0x24 │ │ - b.n c9448 │ │ + b.n c9458 │ │ asrs r1, r0, #2 │ │ - b.n c9a1c │ │ + b.n c9a2c │ │ movs r0, #1 │ │ - b.n c9e1a │ │ + b.n c9e2a │ │ movs r0, #176 @ 0xb0 │ │ - b.n c9c9c │ │ - beq.n c9954 │ │ - b.n c9db4 │ │ + b.n c9cac │ │ + beq.n c9964 │ │ + b.n c9dc4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, ip, lr} │ │ - b.n c9c66 │ │ + b.n c9c76 │ │ movs r0, #160 @ 0xa0 │ │ - b.n c944c │ │ + b.n c945c │ │ stmia r2!, {r2, r3, r6} │ │ - b.n c9450 │ │ - b.n c9a94 │ │ - b.n c9cd8 │ │ + b.n c9460 │ │ + b.n c9aa4 │ │ + b.n c9ce8 │ │ movs r0, #0 │ │ - b.n c945a │ │ + b.n c946a │ │ strh r0, [r1, #0] │ │ - b.n c945a │ │ + b.n c946a │ │ movs r0, r0 │ │ - b.n ca07e │ │ + b.n ca08e │ │ movs r0, #12 │ │ - b.n c9a46 │ │ + b.n c9a56 │ │ stmia r0!, {r0} │ │ - b.n ca086 │ │ + b.n ca096 │ │ lsls r6, r1, #2 │ │ - b.n c9bee │ │ + b.n c9bfe │ │ movs r0, #20 │ │ - b.n c9dde │ │ + b.n c9dee │ │ movs r1, r0 │ │ strh r0, [r0, #24] │ │ str r0, [sp, #200] @ 0xc8 │ │ - b.n c9c96 │ │ + b.n c9ca6 │ │ movs r0, #5 │ │ - b.n c9c9a │ │ + b.n c9caa │ │ mcr2 10, 1, lr, cr8, cr15, {7} @ │ │ movs r0, #180 @ 0xb4 │ │ - b.n c9d0a │ │ + b.n c9d1a │ │ movs r0, #180 @ 0xb4 │ │ - b.n c9ce8 │ │ + b.n c9cf8 │ │ adds r0, #213 @ 0xd5 │ │ - b.n c9d12 │ │ + b.n c9d22 │ │ movs r4, #34 @ 0x22 │ │ - b.n c9cae │ │ + b.n c9cbe │ │ movs r0, r0 │ │ - b.n ca018 │ │ + b.n ca028 │ │ lsls r4, r5, #2 │ │ - ldr r2, [pc, #0] @ (c9974 ) │ │ + ldr r2, [pc, #0] @ (c9984 ) │ │ adds r0, #7 │ │ - b.n ca0ba │ │ + b.n ca0ca │ │ strb r4, [r7, #1] │ │ - b.n ca0be │ │ + b.n ca0ce │ │ str r3, [r0, #16] │ │ - b.n c98aa │ │ + b.n c98ba │ │ str r7, [r0, r0] │ │ - b.n c9a88 │ │ + b.n c9a98 │ │ str r3, [r0, #16] │ │ - b.n c988c │ │ + b.n c989c │ │ str r7, [r0, #0] │ │ - b.n c9a96 │ │ + b.n c9aa6 │ │ strb r2, [r0, #0] │ │ - b.n c9ea0 │ │ + b.n c9eb0 │ │ str r0, [r6, #8] │ │ - b.n c9d42 │ │ + b.n c9d52 │ │ str r0, [r6, #8] │ │ - b.n c9d24 │ │ + b.n c9d34 │ │ str r7, [r0, #0] │ │ - b.n c9e24 │ │ + b.n c9e34 │ │ str r5, [r2, r3] │ │ - b.n c9d4a │ │ + b.n c9d5a │ │ adds r0, #1 │ │ - b.n c9eac │ │ + b.n c9ebc │ │ movs r5, r0 │ │ - b.n c9c56 │ │ + b.n c9c66 │ │ @ instruction: 0xfff3baff │ │ asrs r2, r6, #1 │ │ - b.n c9710 │ │ + b.n c9720 │ │ asrs r1, r0, #2 │ │ - b.n c9ac8 │ │ + b.n c9ad8 │ │ movs r0, #92 @ 0x5c │ │ - b.n c94f4 │ │ + b.n c9504 │ │ movs r0, #176 @ 0xb0 │ │ - b.n c9d40 │ │ - beq.n c99f8 │ │ - b.n c9e58 │ │ + b.n c9d50 │ │ + beq.n c9a08 │ │ + b.n c9e68 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {sp} │ │ - b.n c94f6 │ │ + b.n c9506 │ │ str r4, [r7, r2] │ │ - b.n c9d72 │ │ + b.n c9d82 │ │ movs r1, r0 │ │ - b.n ca07c │ │ + b.n ca08c │ │ movs r3, r5 │ │ ldrh r0, [r0, #16] │ │ adds r0, #76 @ 0x4c │ │ - b.n c94fc │ │ + b.n c950c │ │ strb r0, [r1, #0] │ │ - b.n c9506 │ │ + b.n c9516 │ │ asrs r4, r2, #1 │ │ - b.n c9504 │ │ + b.n c9514 │ │ adds r0, #3 │ │ - b.n c9a74 │ │ + b.n c9a84 │ │ asrs r3, r0, #4 │ │ - b.n c990c │ │ + b.n c991c │ │ movs r0, r0 │ │ - b.n ca090 │ │ + b.n ca0a0 │ │ lsls r2, r3, #1 │ │ lsrs r0, r0, #8 │ │ vsubw.s16 q15, q0, d15 │ │ stmia r0!, {} │ │ - b.n ca13a │ │ + b.n ca14a │ │ movs r2, r1 │ │ and.w r0, r0, r0, lsr #12 │ │ - b.n c952e │ │ + b.n c953e │ │ stmia r0!, {r3} │ │ - b.n c950c │ │ + b.n c951c │ │ adds r0, #5 │ │ - b.n c9d4a │ │ + b.n c9d5a │ │ str r1, [r0, #0] │ │ - b.n c9f2a │ │ + b.n c9f3a │ │ str r0, [r6, #8] │ │ - b.n c9d98 │ │ + b.n c9da8 │ │ strb r0, [r0, #0] │ │ - b.n c95c0 │ │ + b.n c95d0 │ │ adds r0, #8 │ │ - b.n ca128 │ │ + b.n ca138 │ │ adds r0, #0 │ │ - b.n c95a8 │ │ + b.n c95b8 │ │ asrs r4, r5, #2 │ │ - b.n c9544 │ │ + b.n c9554 │ │ movs r0, r0 │ │ - b.n ca0c8 │ │ + b.n ca0d8 │ │ lsls r4, r1, #1 │ │ lsrs r0, r0, #8 │ │ adds r0, #4 │ │ - b.n c95d6 │ │ + b.n c95e6 │ │ str r1, [r0, #0] │ │ - b.n c9d72 │ │ + b.n c9d82 │ │ movs r1, r0 │ │ - b.n ca05c │ │ + b.n ca06c │ │ str r0, [r3, #0] │ │ asrs r1, r2, #22 │ │ adds r0, #213 @ 0xd5 │ │ - b.n c9dea │ │ + b.n c9dfa │ │ movs r0, r0 │ │ - b.n ca0e8 │ │ + b.n ca0f8 │ │ @ instruction: 0xfff54aff │ │ adds r0, #28 │ │ - b.n c9576 │ │ + b.n c9586 │ │ movs r2, r0 │ │ - b.n c9cf4 │ │ + b.n c9d04 │ │ @ instruction: 0xfff21aff │ │ str r6, [r0, r0] │ │ - b.n c9d96 │ │ + b.n c9da6 │ │ adds r0, #4 │ │ - b.n c9644 │ │ + b.n c9654 │ │ movs r1, r0 │ │ - b.n ca084 │ │ + b.n ca094 │ │ @ instruction: 0xffe61aff │ │ strb r4, [r6, #2] │ │ - b.n c9e12 │ │ + b.n c9e22 │ │ adds r0, #24 │ │ - b.n c9596 │ │ + b.n c95a6 │ │ strb r6, [r1, #0] │ │ - b.n c9d7c │ │ + b.n c9d8c │ │ strb r4, [r6, #2] │ │ - b.n c9dfe │ │ + b.n c9e0e │ │ movs r0, r0 │ │ - b.n ca11c │ │ + b.n ca12c │ │ @ instruction: 0xffe60aff │ │ stmia r0!, {r2, r3, r4, r5, r7} │ │ - b.n c9584 │ │ + b.n c9594 │ │ adds r0, #4 │ │ - b.n c9f88 │ │ + b.n c9f98 │ │ @ instruction: 0xffe0eaff │ │ asrs r2, r7, #2 │ │ - b.n c9e2e │ │ + b.n c9e3e │ │ lsls r0, r0, #1 │ │ - b.n ca0b0 │ │ + b.n ca0c0 │ │ stc2l 10, cr1, [r3, #1020]! @ 0x3fc @ │ │ strb r6, [r0, #0] │ │ - b.n c9dd6 │ │ + b.n c9de6 │ │ str r1, [r0, #0] │ │ - b.n ca224 │ │ + b.n ca234 │ │ movs r2, r0 │ │ - b.n ca14a │ │ - ldc2l 10, cr1, [pc, #1020] @ c9e9c @ │ │ + b.n ca15a │ │ + ldc2l 10, cr1, [pc, #1020] @ c9eac @ │ │ asrs r1, r0, #32 │ │ - b.n c9ec8 │ │ + b.n c9ed8 │ │ ldc2l 10, cr0, [sp, #1020] @ 0x3fc @ │ │ movs r2, r0 │ │ - b.n c9dee │ │ + b.n c9dfe │ │ strh r2, [r0, #0] │ │ - b.n c9df2 │ │ + b.n c9e02 │ │ asrs r4, r6, #6 │ │ - b.n c9e96 │ │ + b.n c9ea6 │ │ str r0, [sp, #16] │ │ - b.n c95de │ │ + b.n c95ee │ │ asrs r1, r0, #32 │ │ - b.n c99de │ │ + b.n c99ee │ │ movs r0, r0 │ │ - b.n c95e6 │ │ + b.n c95f6 │ │ asrs r0, r1, #32 │ │ - b.n c95cc │ │ + b.n c95dc │ │ movs r0, #7 │ │ - b.n c9e0a │ │ + b.n c9e1a │ │ lsls r1, r0, #8 │ │ stmia.w sp, {r2} │ │ - b.n c9e12 │ │ + b.n c9e22 │ │ add r5, sp, #592 @ 0x250 │ │ @ instruction: 0xebff0000 │ │ - b.n ca17a │ │ + b.n ca18a │ │ ldc2l 10, cr1, [r0, #1020] @ 0x3fc @ │ │ lsls r0, r2, #2 │ │ - b.n c961c │ │ + b.n c962c │ │ asrs r0, r2, #32 │ │ - b.n c9606 │ │ + b.n c9616 │ │ movs r0, #178 @ 0xb2 │ │ - b.n c9e8c │ │ + b.n c9e9c │ │ movs r0, #1 │ │ - b.n c9f72 │ │ + b.n c9f82 │ │ movs r0, #178 @ 0xb2 │ │ - b.n c9e74 │ │ + b.n c9e84 │ │ movs r7, #190 @ 0xbe │ │ - b.n c9e96 │ │ + b.n c9ea6 │ │ movs r7, #188 @ 0xbc │ │ - b.n c9e7a │ │ + b.n c9e8a │ │ movs r0, #178 @ 0xb2 │ │ - b.n c9ea0 │ │ + b.n c9eb0 │ │ movs r2, r0 │ │ - b.n ca1a6 │ │ + b.n ca1b6 │ │ movs r4, r1 │ │ subs r2, #0 │ │ movs r0, #1 │ │ - b.n ca24a │ │ + b.n ca25a │ │ adds r0, #0 │ │ - b.n ca24e │ │ + b.n ca25e │ │ strb r3, [r0, #0] │ │ - b.n c9c12 │ │ + b.n c9c22 │ │ lsls r3, r0 │ │ - b.n c9c16 │ │ + b.n c9c26 │ │ adds r0, #2 │ │ - b.n ca020 │ │ + b.n ca030 │ │ movs r0, #1 │ │ - b.n ca022 │ │ + b.n ca032 │ │ ldr r0, [r6, #8] │ │ - b.n c9ed0 │ │ + b.n c9ee0 │ │ str r6, [r7, #120] @ 0x78 │ │ - b.n c9eb4 │ │ + b.n c9ec4 │ │ strb r2, [r6, #2] │ │ - b.n c9ecc │ │ + b.n c9edc │ │ str r4, [r4, r0] │ │ - b.n c9656 │ │ + b.n c9666 │ │ movs r7, r0 │ │ - b.n c9dd6 │ │ + b.n c9de6 │ │ str r0, [r4, r0] │ │ - b.n c963e │ │ + b.n c964e │ │ @ instruction: 0xfff43aff │ │ movs r0, #216 @ 0xd8 │ │ - b.n c9ebe │ │ + b.n c9ece │ │ asrs r4, r1, #1 │ │ - b.n c9668 │ │ + b.n c9678 │ │ adds r0, #84 @ 0x54 │ │ - b.n c966c │ │ + b.n c967c │ │ asrs r1, r0, #32 │ │ - b.n c9bce │ │ + b.n c9bde │ │ movs r0, #8 │ │ - b.n c9e8e │ │ - b.n c9d52 │ │ - b.n c9a78 │ │ + b.n c9e9e │ │ + b.n c9d62 │ │ + b.n c9a88 │ │ movs r0, r0 │ │ - b.n ca212 │ │ + b.n ca222 │ │ movs r3, r2 │ │ subs r0, r0, r0 │ │ movs r0, r1 │ │ and.w r0, r0, sl, ror #6 │ │ - b.n c9f06 │ │ + b.n c9f16 │ │ lsls r0, r0, #1 │ │ - b.n ca188 │ │ + b.n ca198 │ │ stc2 10, cr1, [sp, #1020]! @ 0x3fc @ │ │ movs r0, r2 │ │ - b.n c9696 │ │ + b.n c96a6 │ │ asrs r0, r0, #32 │ │ - b.n ca2b2 │ │ + b.n ca2c2 │ │ asrs r2, r6, #2 │ │ - b.n c9ef6 │ │ + b.n c9f06 │ │ asrs r0, r0, #32 │ │ - b.n ca33a │ │ + b.n ca34a │ │ asrs r0, r1, #32 │ │ - b.n c967e │ │ + b.n c968e │ │ movs r4, r0 │ │ - b.n c9ec2 │ │ + b.n c9ed2 │ │ adds r0, #186 @ 0xba │ │ - b.n c9f2a │ │ + b.n c9f3a │ │ asrs r0, r2, #32 │ │ - b.n c96ae │ │ - beq.n c9bc4 │ │ - b.n ca024 │ │ - ldr r7, [pc, #960] @ (c9f50 ) │ │ + b.n c96be │ │ + beq.n c9bd4 │ │ + b.n ca034 │ │ + ldr r7, [pc, #960] @ (c9f60 ) │ │ ldmia.w sp!, {r1, r3, r5, r6, r7, fp, ip, sp, lr, pc} │ │ @ instruction: 0xeaff7001 │ │ - b.n ca032 │ │ + b.n ca042 │ │ strb r5, [r0, #0] │ │ - b.n c9724 │ │ - b.n c9cf8 │ │ - b.n c96de │ │ + b.n c9734 │ │ + b.n c9d08 │ │ + b.n c96ee │ │ movs r0, r0 │ │ - b.n ca262 │ │ + b.n ca272 │ │ @ instruction: 0xfff50aff │ │ adds r0, #4 │ │ - b.n c974e │ │ + b.n c975e │ │ movs r1, r0 │ │ - b.n ca1d8 │ │ + b.n ca1e8 │ │ adds r0, #14 │ │ - b.n c9ef6 │ │ + b.n c9f06 │ │ adds r0, #24 │ │ asrs r6, r3, #22 │ │ movs r0, r0 │ │ - b.n c9e64 │ │ + b.n c9e74 │ │ @ instruction: 0xfff60aff │ │ str r5, [r2, #12] │ │ - b.n c9f66 │ │ + b.n c9f76 │ │ stmia r0!, {r0, r2, r4, r6, r7} │ │ - b.n c9f70 │ │ + b.n c9f80 │ │ movs r4, r1 │ │ - b.n c9e7a │ │ + b.n c9e8a │ │ @ instruction: 0xfff2caff │ │ str r4, [r3, #0] │ │ - b.n c96fc │ │ + b.n c970c │ │ movs r2, r0 │ │ - b.n c9e86 │ │ + b.n c9e96 │ │ @ instruction: 0xffef1aff │ │ str r0, [r2, #0] │ │ - b.n c9702 │ │ + b.n c9712 │ │ str r2, [r6, #8] │ │ - b.n c9f92 │ │ + b.n c9fa2 │ │ movs r0, r0 │ │ - b.n ca296 │ │ + b.n ca2a6 │ │ @ instruction: 0xffe90aff │ │ eors r4, r7 │ │ - b.n ca0f8 │ │ + b.n ca108 │ │ str r0, [r0, #0] │ │ - b.n ca336 │ │ + b.n ca346 │ │ str r4, [r0, r0] │ │ - b.n c9f3a │ │ + b.n c9f4a │ │ strb r6, [r0, #4] │ │ - b.n c9d04 │ │ + b.n c9d14 │ │ str r1, [r0, #0] │ │ - b.n ca10e │ │ + b.n ca11e │ │ asrs r0, r4, #32 │ │ - b.n c9734 │ │ + b.n c9744 │ │ asrs r4, r3, #32 │ │ - b.n c9718 │ │ + b.n c9728 │ │ asrs r0, r2, #32 │ │ - b.n c972e │ │ + b.n c973e │ │ strb r2, [r6, #2] │ │ - b.n c9ffc │ │ + b.n ca00c │ │ strb r0, [r6, #2] │ │ - b.n c9f9e │ │ + b.n c9fae │ │ asrs r2, r6, #2 │ │ - b.n c9fbc │ │ + b.n c9fcc │ │ ands r5, r0 │ │ - b.n c9f5e │ │ + b.n c9f6e │ │ movs r1, r0 │ │ - b.n c9ece │ │ + b.n c9ede │ │ @ instruction: 0xfff43aff │ │ @ instruction: 0xffdaeaff │ │ asrs r2, r6, #1 │ │ - b.n c998c │ │ + b.n c999c │ │ asrs r1, r0, #2 │ │ - b.n c9d3c │ │ + b.n c9d4c │ │ movs r0, #92 @ 0x5c │ │ - b.n c9770 │ │ + b.n c9780 │ │ movs r0, #176 @ 0xb0 │ │ - b.n c9fbc │ │ - beq.n c9c74 │ │ - b.n ca0d4 │ │ + b.n c9fcc │ │ + beq.n c9c84 │ │ + b.n ca0e4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r7} │ │ - b.n c9780 │ │ + b.n c9790 │ │ asrs r4, r4, #32 │ │ - b.n c9784 │ │ + b.n c9794 │ │ lsls r5, r2, #3 │ │ - b.n c9fee │ │ + b.n c9ffe │ │ lsls r0, r0, #2 │ │ - b.n c9d5c │ │ + b.n c9d6c │ │ asrs r0, r6, #2 │ │ - b.n c9fd6 │ │ + b.n c9fe6 │ │ movs r0, r0 │ │ - b.n ca39a │ │ - beq.n c9c94 │ │ - b.n ca0f4 │ │ + b.n ca3aa │ │ + beq.n c9ca4 │ │ + b.n ca104 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r4, r6, r7} │ │ - b.n c97a4 │ │ + b.n c97b4 │ │ @ instruction: 0x47c5 │ │ - b.n ca27a │ │ - ldr r7, [pc, #1020] @ (ca068 ) │ │ - b.n ca30c │ │ + b.n ca28a │ │ + ldr r7, [pc, #1020] @ (ca078 ) │ │ + b.n ca31c │ │ movs r0, r0 │ │ - b.n c9d90 │ │ + b.n c9da0 │ │ lsls r2, r3, #1 │ │ - b.n c9816 │ │ + b.n c9826 │ │ movs r0, r0 │ │ - b.n ca31a │ │ + b.n ca32a │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n c9fc2 │ │ - beq.n c9cbc │ │ - b.n ca11c │ │ + b.n c9fd2 │ │ + beq.n c9ccc │ │ + b.n ca12c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r7} │ │ - b.n c97c8 │ │ + b.n c97d8 │ │ str r0, [r6, #0] │ │ - b.n c97cc │ │ + b.n c97dc │ │ movs r4, r1 │ │ - b.n c97b6 │ │ + b.n c97c6 │ │ movs r0, #188 @ 0xbc │ │ - b.n ca046 │ │ + b.n ca056 │ │ adds r0, #190 @ 0xbe │ │ - b.n ca04a │ │ + b.n ca05a │ │ lsls r0, r0, #1 │ │ - b.n c97c2 │ │ + b.n c97d2 │ │ movs r0, r1 │ │ - b.n c97c6 │ │ + b.n c97d6 │ │ asrs r4, r2, #32 │ │ - b.n ca12a │ │ + b.n ca13a │ │ movs r2, r0 │ │ - b.n c9db0 │ │ + b.n c9dc0 │ │ str r3, [r0, r0] │ │ - b.n c9d32 │ │ + b.n c9d42 │ │ lsrs r2, r7, #31 │ │ - b.n ca3f6 │ │ + b.n ca406 │ │ lsls r5, r2, #2 │ │ - b.n c9cba │ │ + b.n c9cca │ │ lsls r1, r4, #2 │ │ - b.n c9dbe │ │ + b.n c9dce │ │ cmp r7, #139 @ 0x8b │ │ add.w ip, r0, sp, lsl #7 │ │ - b.n ca2de │ │ + b.n ca2ee │ │ movs r0, #186 @ 0xba │ │ - b.n ca076 │ │ + b.n ca086 │ │ adds r4, r1, #3 │ │ - b.n ca366 │ │ - b.n c9cf0 │ │ - b.n c97fe │ │ + b.n ca376 │ │ + b.n c9d00 │ │ + b.n c980e │ │ asrs r0, r2, #6 │ │ - b.n c9de2 │ │ + b.n c9df2 │ │ stmia r0!, {r3, r5, r6} │ │ - b.n c9818 │ │ + b.n c9828 │ │ strb r0, [r5, #1] │ │ - b.n c981c │ │ + b.n c982c │ │ stmia r0!, {r2, r3} │ │ - b.n c9e00 │ │ + b.n c9e10 │ │ movs r2, r0 │ │ - b.n ca30a │ │ + b.n ca31a │ │ strb r7, [r0, #0] │ │ - b.n c9e08 │ │ + b.n c9e18 │ │ strb r4, [r1, #0] │ │ asrs r0, r4, #6 │ │ asrs r0, r3, #1 │ │ - b.n c9830 │ │ + b.n c9840 │ │ adds r0, #88 @ 0x58 │ │ - b.n c9834 │ │ + b.n c9844 │ │ movs r1, #166 @ 0xa6 │ │ - b.n ca03a │ │ + b.n ca04a │ │ lsls r0, r0 │ │ stmia.w sp, {r1, r8, sp, lr} │ │ - b.n c9e06 │ │ + b.n c9e16 │ │ strb r4, [r5, #0] │ │ - b.n c9840 │ │ + b.n c9850 │ │ asrs r1, r0, #32 │ │ - b.n c9e28 │ │ + b.n c9e38 │ │ lsls r6, r0, #2 │ │ - b.n c9d8e │ │ + b.n c9d9e │ │ movs r0, #12 │ │ - b.n c982c │ │ + b.n c983c │ │ strb r0, [r1, #0] │ │ - b.n c9830 │ │ + b.n c9840 │ │ adds r0, #3 │ │ - b.n c9e38 │ │ + b.n c9e48 │ │ movs r0, r2 │ │ - b.n c9838 │ │ + b.n c9848 │ │ movs r3, #163 @ 0xa3 │ │ - b.n ca322 │ │ + b.n ca332 │ │ str r4, [r2, r0] │ │ - b.n c9840 │ │ + b.n c9850 │ │ movs r4, r6 │ │ - b.n c9864 │ │ + b.n c9874 │ │ movs r0, r3 │ │ - b.n c9848 │ │ + b.n c9858 │ │ movs r1, r0 │ │ - b.n ca472 │ │ - cmp r4, r7 │ │ + b.n ca482 │ │ + cmp r3, r7 │ │ @ instruction: 0xebff0004 │ │ - b.n ca07a │ │ - beq.n c9d74 │ │ - b.n ca1d4 │ │ - ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r2, r3, r4, r6, r7, r8, r9, fp, lr} │ │ - movs r1, r0 │ │ - str r3, [r1, #72] @ 0x48 │ │ - vqrshrn.u64 d19, q13, #12 │ │ - @ instruction: 0xfff4f3e4 │ │ - vraddhn.i d20, , │ │ + b.n ca08a │ │ + beq.n c9d84 │ │ + b.n ca1e4 │ │ + ldrh r0, [r6, #62] @ 0x3e │ │ + ldmia.w sp!, {r2, r3, r5, r6, r7, r8, r9, fp, lr} │ │ + movs r1, r0 │ │ + str r3, [r7, #68] @ 0x44 │ │ + vtbx.8 d19, {d4-d6}, d7 │ │ + vrshr.u64 , q15, #12 │ │ + vabal.u q10, d3, d30 │ │ @ instruction: 0xfff44ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n ca278 │ │ + b.n ca288 │ │ svc 121 @ 0x79 │ │ - b.n ca1fc │ │ - add r0, pc, #0 @ (adr r0, c9d64 ) │ │ - b.n ca0a6 │ │ + b.n ca20c │ │ + add r0, pc, #0 @ (adr r0, c9d74 ) │ │ + b.n ca0b6 │ │ lsls r5, r2, #3 │ │ - b.n ca10a │ │ + b.n ca11a │ │ str r0, [sp, #4] │ │ - b.n ca0ae │ │ + b.n ca0be │ │ movs r0, #28 │ │ - b.n ca286 │ │ + b.n ca296 │ │ asrs r5, r2, #3 │ │ - b.n ca118 │ │ + b.n ca128 │ │ stmia r0!, {r2, r3, r4} │ │ - b.n ca28c │ │ + b.n ca29c │ │ adds r1, #0 │ │ - b.n c9ca2 │ │ + b.n c9cb2 │ │ movs r0, #12 │ │ - b.n c989c │ │ + b.n c98ac │ │ str r1, [r0, #16] │ │ - b.n c9cbe │ │ + b.n c9cce │ │ str r0, [sp, #176] @ 0xb0 │ │ - b.n c98a4 │ │ + b.n c98b4 │ │ asrs r4, r7, #2 │ │ - b.n ca134 │ │ + b.n ca144 │ │ str r2, [r7, r2] │ │ - b.n ca138 │ │ + b.n ca148 │ │ movs r0, #188 @ 0xbc │ │ - b.n ca142 │ │ + b.n ca152 │ │ asrs r1, r4, #2 │ │ - b.n ca0fa │ │ + b.n ca10a │ │ stmia r0!, {r4, r5} │ │ - b.n c98b8 │ │ + b.n c98c8 │ │ asrs r0, r5, #32 │ │ - b.n c98bc │ │ + b.n c98cc │ │ asrs r0, r6, #1 │ │ - b.n c9b84 │ │ + b.n c9b94 │ │ strh r2, [r4, #4] │ │ - b.n ca0ea │ │ + b.n ca0fa │ │ movs r0, #5 │ │ - b.n ca0ee │ │ + b.n ca0fe │ │ str r0, [r2, r0] │ │ - b.n c98cc │ │ + b.n c98dc │ │ adds r0, #20 │ │ - b.n c98d0 │ │ + b.n c98e0 │ │ strh r4, [r4, #0] │ │ - b.n c98d4 │ │ + b.n c98e4 │ │ lsls r1, r2, #5 │ │ lsrs r0, r0, #8 │ │ movs r0, r4 │ │ - b.n ca3ec │ │ - add r0, pc, #32 @ (adr r0, c9de4 ) │ │ - b.n c98e0 │ │ + b.n ca3fc │ │ + add r0, pc, #32 @ (adr r0, c9df4 ) │ │ + b.n c98f0 │ │ lsls r0, r2, #5 │ │ subs r0, r0, r0 │ │ movs r1, #180 @ 0xb4 │ │ - b.n ca1b4 │ │ + b.n ca1c4 │ │ movs r1, r0 │ │ - b.n ca3fc │ │ + b.n ca40c │ │ adds r0, #52 @ 0x34 │ │ - b.n c98f0 │ │ - b.n c9ddc │ │ - b.n c9ee0 │ │ + b.n c9900 │ │ + b.n c9dec │ │ + b.n c9ef0 │ │ adds r0, #8 │ │ - b.n ca2fa │ │ + b.n ca30a │ │ movs r0, #182 @ 0xb6 │ │ - b.n ca19e │ │ + b.n ca1ae │ │ adds r0, #40 @ 0x28 │ │ - b.n c97fc │ │ + b.n c980c │ │ movs r0, #36 @ 0x24 │ │ - b.n c9800 │ │ + b.n c9810 │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ movs r4, r1 │ │ - b.n c9924 │ │ + b.n c9934 │ │ lsls r6, r6, #1 │ │ and.w r0, r0, r8, lsr #19 │ │ - b.n ca18e │ │ + b.n ca19e │ │ movs r0, #0 │ │ - b.n ca53e │ │ + b.n ca54e │ │ adds r0, #4 │ │ - b.n c99b6 │ │ + b.n c99c6 │ │ strb r0, [r0, #2] │ │ - b.n ca546 │ │ + b.n ca556 │ │ movs r0, #232 @ 0xe8 │ │ - b.n c9924 │ │ + b.n c9934 │ │ movs r1, r0 │ │ - b.n ca434 │ │ + b.n ca444 │ │ movs r0, #228 @ 0xe4 │ │ - b.n c992c │ │ + b.n c993c │ │ movs r0, #80 @ 0x50 │ │ - b.n c9930 │ │ + b.n c9940 │ │ movs r0, #76 @ 0x4c │ │ - b.n c9934 │ │ + b.n c9944 │ │ movs r0, #72 @ 0x48 │ │ - b.n c9938 │ │ + b.n c9948 │ │ strb r6, [r7, #0] │ │ - b.n c99bc │ │ + b.n c99cc │ │ movs r3, #188 @ 0xbc │ │ - b.n ca1c0 │ │ + b.n ca1d0 │ │ str r4, [r0, r1] │ │ - b.n c9944 │ │ + b.n c9954 │ │ eors r0, r0 │ │ - b.n c9948 │ │ + b.n c9958 │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ strh r0, [r7, #0] │ │ - b.n ca350 │ │ + b.n ca360 │ │ movs r7, r0 │ │ and.w r1, r0, r0, asr #10 │ │ - b.n c9958 │ │ + b.n c9968 │ │ movs r1, #156 @ 0x9c │ │ - b.n c995c │ │ + b.n c996c │ │ movs r1, #8 │ │ - b.n c9960 │ │ + b.n c9970 │ │ movs r0, #56 @ 0x38 │ │ - b.n ca364 │ │ + b.n ca374 │ │ strh r0, [r7, #4] │ │ - b.n ca352 │ │ + b.n ca362 │ │ str r4, [r7, r3] │ │ - b.n c996c │ │ + b.n c997c │ │ lsrs r0, r7 │ │ - b.n c9970 │ │ + b.n c9980 │ │ strh r0, [r2, #2] │ │ - b.n c9974 │ │ + b.n c9984 │ │ movs r1, #208 @ 0xd0 │ │ - b.n ca1f2 │ │ + b.n ca202 │ │ str r0, [r4, #0] │ │ - b.n c997c │ │ + b.n c998c │ │ str r4, [r6, #8] │ │ - b.n ca21a │ │ + b.n ca22a │ │ str r6, [r0, r0] │ │ - b.n c9a1e │ │ + b.n c9a2e │ │ movs r1, #240 @ 0xf0 │ │ - b.n ca1fe │ │ + b.n ca20e │ │ movs r0, #113 @ 0x71 │ │ - b.n c9bd0 │ │ + b.n c9be0 │ │ movs r0, r0 │ │ - b.n ca51a │ │ - b.n c9eb0 │ │ - b.n c9994 │ │ + b.n ca52a │ │ + b.n c9ec0 │ │ + b.n c99a4 │ │ str r6, [r0, r0] │ │ - b.n c9a0e │ │ + b.n c9a1e │ │ str r4, [r6, #8] │ │ - b.n ca212 │ │ + b.n ca222 │ │ movs r2, r5 │ │ - ldr r2, [pc, #0] @ (c9e84 ) │ │ + ldr r2, [pc, #0] @ (c9e94 ) │ │ movs r0, #0 │ │ - b.n ca5ca │ │ + b.n ca5da │ │ movs r3, r0 │ │ - b.n ca530 │ │ - b.n c9e90 │ │ - b.n ca5d2 │ │ + b.n ca540 │ │ + b.n c9ea0 │ │ + b.n ca5e2 │ │ movs r5, r2 │ │ subs r2, #0 │ │ stmia r0!, {r0} │ │ - b.n ca39a │ │ + b.n ca3aa │ │ subs r7, r7, #0 │ │ - b.n ca5de │ │ - b.n ca098 │ │ - b.n ca2ba │ │ + b.n ca5ee │ │ + b.n ca0a8 │ │ + b.n ca2ca │ │ str r0, [r0, r0] │ │ - b.n ca5e6 │ │ + b.n ca5f6 │ │ str r4, [r1, #16] │ │ - b.n c9eac │ │ + b.n c9ebc │ │ eors r4, r7 │ │ - b.n ca5ee │ │ + b.n ca5fe │ │ asrs r4, r0, #32 │ │ - b.n c9fc6 │ │ + b.n c9fd6 │ │ adds r0, #5 │ │ - b.n c9fc6 │ │ + b.n c9fd6 │ │ lsls r7, r1, #29 │ │ orn r0, r1, #2179072 @ 0x214000 │ │ - b.n c9fd2 │ │ + b.n c9fe2 │ │ asrs r4, r3, #32 │ │ - b.n ca3c4 │ │ + b.n ca3d4 │ │ str r0, [r2, r0] │ │ - b.n ca3d0 │ │ + b.n ca3e0 │ │ cmp r2, #143 @ 0x8f │ │ orn r0, r1, #2555904 @ 0x270000 │ │ - b.n ca3d4 │ │ + b.n ca3e4 │ │ movs r5, r0 │ │ - b.n ca17e │ │ + b.n ca18e │ │ cmp r2, #143 @ 0x8f │ │ orr.w r0, r1, #2162688 @ 0x210000 │ │ - b.n c9fea │ │ + b.n c9ffa │ │ ands r0, r1 │ │ - b.n ca3e6 │ │ + b.n ca3f6 │ │ lsls r7, r1, #29 │ │ - bl ffd0bec4 │ │ + bl ffd0bed4 │ │ subs r7, r7, r3 │ │ movs r6, r1 │ │ - b.n ca1a2 │ │ + b.n ca1b2 │ │ movs r0, r2 │ │ lsrs r0, r0, #8 │ │ asrs r7, r0, #32 │ │ - b.n ca40e │ │ + b.n ca41e │ │ movs r6, r1 │ │ - b.n c9f76 │ │ + b.n c9f86 │ │ movs r1, r0 │ │ - b.n ca3fa │ │ + b.n ca40a │ │ adds r1, #1 │ │ - b.n ca012 │ │ + b.n ca022 │ │ str r1, [r0, #16] │ │ - b.n ca012 │ │ + b.n ca022 │ │ asrs r6, r7, #32 │ │ - b.n ca422 │ │ + b.n ca432 │ │ str r1, [r0, r2] │ │ - b.n ca01e │ │ + b.n ca02e │ │ lsls r1, r0 │ │ - b.n ca01e │ │ + b.n ca02e │ │ asrs r2, r0, #2 │ │ - b.n c9e38 │ │ + b.n c9e48 │ │ strb r2, [r0, #0] │ │ - b.n ca020 │ │ + b.n ca030 │ │ movs r1, r0 │ │ - b.n ca3ba │ │ + b.n ca3ca │ │ asrs r2, r0, #2 │ │ - b.n c9e2a │ │ + b.n c9e3a │ │ asrs r2, r0, #32 │ │ - b.n ca02a │ │ + b.n ca03a │ │ movs r0, #2 │ │ - b.n ca42a │ │ + b.n ca43a │ │ strb r0, [r6, #2] │ │ - b.n ca2d8 │ │ + b.n ca2e8 │ │ strb r0, [r6, #2] │ │ - b.n ca2b0 │ │ + b.n ca2c0 │ │ @ instruction: 0xfff61aff │ │ movs r0, r1 │ │ - b.n ca276 │ │ + b.n ca286 │ │ lsls r6, r1, #26 │ │ add.w r0, r0, r0 │ │ - b.n ca5de │ │ + b.n ca5ee │ │ lsls r4, r4, #7 │ │ subs r0, r0, r0 │ │ movs r0, #213 @ 0xd5 │ │ - b.n ca2f6 │ │ + b.n ca306 │ │ lsls r2, r0, #4 │ │ - b.n ca05a │ │ + b.n ca06a │ │ movs r4, r3 │ │ - b.n c9a6e │ │ + b.n c9a7e │ │ asrs r2, r7, #2 │ │ - b.n ca2f2 │ │ + b.n ca302 │ │ movs r0, r4 │ │ - b.n ca578 │ │ + b.n ca588 │ │ lsls r0, r4, #7 │ │ subs r0, r0, r0 │ │ asrs r4, r6, #6 │ │ - b.n ca33e │ │ + b.n ca34e │ │ movs r1, r0 │ │ - b.n ca062 │ │ + b.n ca072 │ │ asrs r6, r6, #2 │ │ - b.n ca306 │ │ + b.n ca316 │ │ movs r0, r1 │ │ - b.n ca46a │ │ + b.n ca47a │ │ movs r0, r5 │ │ - b.n c9984 │ │ + b.n c9994 │ │ movs r4, r1 │ │ - b.n c9aa4 │ │ + b.n c9ab4 │ │ strb r4, [r2, #0] │ │ - b.n c9ab0 │ │ - b.n c9fb0 │ │ - b.n c9ab4 │ │ + b.n c9ac0 │ │ + b.n c9fc0 │ │ + b.n c9ac4 │ │ eors r0, r0 │ │ - b.n c9a9e │ │ + b.n c9aae │ │ asrs r4, r4, #32 │ │ - b.n c9998 │ │ + b.n c99a8 │ │ str r0, [r4, r0] │ │ - b.n c9ac0 │ │ + b.n c9ad0 │ │ adds r0, #190 @ 0xbe │ │ - b.n ca338 │ │ + b.n ca348 │ │ movs r0, #182 @ 0xb6 │ │ - b.n ca34a │ │ + b.n ca35a │ │ strb r4, [r7, #2] │ │ - b.n ca340 │ │ + b.n ca350 │ │ ands r0, r1 │ │ - b.n c9abe │ │ + b.n c9ace │ │ movs r0, #2 │ │ - b.n ca0a0 │ │ + b.n ca0b0 │ │ str r4, [r7, #8] │ │ - b.n ca348 │ │ + b.n ca358 │ │ adds r0, #7 │ │ - b.n ca0aa │ │ + b.n ca0ba │ │ str r6, [r7, r2] │ │ - b.n ca350 │ │ + b.n ca360 │ │ movs r0, #2 │ │ - b.n ca030 │ │ + b.n ca040 │ │ stmia r0!, {r4, r5} │ │ - b.n c9ae8 │ │ + b.n c9af8 │ │ asrs r1, r0, #32 │ │ - b.n ca0b6 │ │ + b.n ca0c6 │ │ strh r4, [r4, #0] │ │ - b.n c9af0 │ │ + b.n c9b00 │ │ asrs r4, r2, #32 │ │ - b.n ca43c │ │ + b.n ca44c │ │ movs r0, #6 │ │ - b.n ca048 │ │ + b.n ca058 │ │ movs r2, r0 │ │ - b.n ca264 │ │ + b.n ca274 │ │ lsls r3, r1, #7 │ │ ldrh r0, [r0, #16] │ │ asrs r5, r2, #3 │ │ - b.n ca37c │ │ + b.n ca38c │ │ str r0, [r2, r0] │ │ - b.n c9b08 │ │ + b.n c9b18 │ │ str r1, [r0, #16] │ │ - b.n c9f0a │ │ + b.n c9f1a │ │ movs r3, #216 @ 0xd8 │ │ - b.n ca356 │ │ + b.n ca366 │ │ asrs r0, r0, #32 │ │ - b.n c9b06 │ │ + b.n c9b16 │ │ strb r4, [r0, #0] │ │ - b.n c9b0a │ │ + b.n c9b1a │ │ asrs r2, r0, #32 │ │ - b.n ca024 │ │ + b.n ca034 │ │ adds r0, #3 │ │ - b.n ca034 │ │ + b.n ca044 │ │ asrs r3, r0, #32 │ │ - b.n ca30c │ │ + b.n ca31c │ │ movs r4, r2 │ │ subs r0, r0, r0 │ │ strb r0, [r0, #9] │ │ - b.n c9b12 │ │ + b.n c9b22 │ │ movs r0, r0 │ │ - b.n ca6a4 │ │ + b.n ca6b4 │ │ movs r2, r3 │ │ lsrs r0, r0, #8 │ │ asrs r2, r7, #2 │ │ - b.n ca3aa │ │ + b.n ca3ba │ │ lsls r0, r0, #1 │ │ - b.n ca624 │ │ + b.n ca634 │ │ movs r7, r2 │ │ subs r0, r0, r0 │ │ asrs r0, r2, #32 │ │ - b.n c9b36 │ │ + b.n c9b46 │ │ str r6, [r1, #0] │ │ - b.n ca34e │ │ + b.n ca35e │ │ lsls r0, r7, #8 │ │ - b.n c9b32 │ │ + b.n c9b42 │ │ ands r4, r1 │ │ - b.n ca356 │ │ + b.n ca366 │ │ movs r0, r4 │ │ - b.n c9b34 │ │ + b.n c9b44 │ │ movs r7, r0 │ │ - b.n ca35e │ │ + b.n ca36e │ │ add sp, #472 @ 0x1d8 │ │ @ instruction: 0xebff0080 │ │ - b.n ca126 │ │ + b.n ca136 │ │ asrs r0, r4, #32 │ │ - b.n c9b64 │ │ + b.n c9b74 │ │ stmia r0!, {r2} │ │ - b.n ca36e │ │ - b.n ca03c │ │ - b.n ca372 │ │ + b.n ca37e │ │ + b.n ca04c │ │ + b.n ca382 │ │ lsls r0, r0, #4 │ │ - b.n ca144 │ │ + b.n ca154 │ │ movs r0, r2 │ │ - b.n c9b5a │ │ + b.n c9b6a │ │ asrs r4, r0, #32 │ │ - b.n c9a3e │ │ + b.n c9a4e │ │ movs r0, r1 │ │ and.w r0, r0, r6, lsl #8 │ │ - b.n ca386 │ │ + b.n ca396 │ │ asrs r1, r1, #32 │ │ - b.n ca38a │ │ + b.n ca39a │ │ ands r6, r1 │ │ - b.n ca38e │ │ + b.n ca39e │ │ str r4, [r1, #0] │ │ - b.n ca392 │ │ + b.n ca3a2 │ │ pop {r0, r3, r6, r7, pc} │ │ @ instruction: 0xebffc006 │ │ - b.n ca39a │ │ - b.n ca064 │ │ - b.n ca39e │ │ + b.n ca3aa │ │ + b.n ca074 │ │ + b.n ca3ae │ │ movs r0, r0 │ │ - b.n ca702 │ │ + b.n ca712 │ │ lsls r3, r3, #6 │ │ subs r0, r0, r0 │ │ movs r2, r0 │ │ - b.n ca694 │ │ + b.n ca6a4 │ │ lsls r3, r6, #1 │ │ subs r0, r0, r0 │ │ ands r4, r1 │ │ - b.n c9ba4 │ │ + b.n c9bb4 │ │ movs r4, r4 │ │ - b.n c9aac │ │ + b.n c9abc │ │ asrs r0, r0, #1 │ │ - b.n c9ba2 │ │ + b.n c9bb2 │ │ movs r1, r0 │ │ - b.n ca57e │ │ + b.n ca58e │ │ movs r1, r0 │ │ - b.n ca802 │ │ + b.n ca812 │ │ movs r4, #190 @ 0xbe │ │ - b.n ca428 │ │ + b.n ca438 │ │ asrs r0, r1, #32 │ │ - b.n ca58a │ │ + b.n ca59a │ │ movs r2, r0 │ │ - b.n ca330 │ │ + b.n ca340 │ │ lsls r1, r3, #2 │ │ ldrh r0, [r0, #16] │ │ lsls r5, r2, #3 │ │ - b.n ca448 │ │ + b.n ca458 │ │ str r1, [sp, #0] │ │ - b.n c9fd2 │ │ + b.n c9fe2 │ │ movs r0, #9 │ │ - b.n ca3de │ │ + b.n ca3ee │ │ adds r0, #9 │ │ - b.n ca3e2 │ │ + b.n ca3f2 │ │ str r6, [r7, #8] │ │ - b.n ca48a │ │ + b.n ca49a │ │ strb r4, [r7, #2] │ │ - b.n ca490 │ │ + b.n ca4a0 │ │ asrs r1, r0, #32 │ │ - b.n ca13a │ │ + b.n ca14a │ │ stmia r0!, {r1} │ │ - b.n ca5c0 │ │ + b.n ca5d0 │ │ movs r1, r0 │ │ - b.n ca36e │ │ + b.n ca37e │ │ lsls r0, r3, #1 │ │ ldmia r2!, {} │ │ strh r4, [r4, #0] │ │ - b.n c9bf8 │ │ + b.n c9c08 │ │ str r0, [r0, #0] │ │ - b.n ca802 │ │ - add r0, pc, #0 @ (adr r0, ca0c4 ) │ │ - b.n ca596 │ │ - b.n ca0c8 │ │ - b.n c9c06 │ │ + b.n ca812 │ │ + add r0, pc, #0 @ (adr r0, ca0d4 ) │ │ + b.n ca5a6 │ │ + b.n ca0d8 │ │ + b.n c9c16 │ │ strb r7, [r2, #3] │ │ - b.n ca0aa │ │ + b.n ca0ba │ │ movs r7, r0 │ │ - b.n ca382 │ │ + b.n ca392 │ │ movs r1, r4 │ │ cmp r2, #0 │ │ movs r4, r4 │ │ - b.n c9c14 │ │ + b.n c9c24 │ │ str r0, [r0, r0] │ │ - b.n ca1ea │ │ + b.n ca1fa │ │ ands r5, r0 │ │ - b.n ca170 │ │ + b.n ca180 │ │ movs r0, r1 │ │ - b.n ca78e │ │ + b.n ca79e │ │ movs r3, r2 │ │ subs r2, #0 │ │ str r7, [r0, r2] │ │ - b.n ca200 │ │ - b.n ca130 │ │ - b.n c9c0c │ │ - movs r7, r0 │ │ - b.n ca87e │ │ - b.n ca104 │ │ - b.n ca604 │ │ + b.n ca210 │ │ + b.n ca140 │ │ + b.n c9c1c │ │ + movs r7, r0 │ │ + b.n ca88e │ │ + b.n ca114 │ │ + b.n ca614 │ │ str r7, [r0, r0] │ │ - b.n ca212 │ │ + b.n ca222 │ │ movs r4, r3 │ │ - b.n c9c1c │ │ + b.n c9c2c │ │ movs r0, r0 │ │ - b.n ca194 │ │ + b.n ca1a4 │ │ strb r7, [r0, #0] │ │ - b.n ca894 │ │ + b.n ca8a4 │ │ movs r0, r3 │ │ - b.n c9c28 │ │ + b.n c9c38 │ │ movs r7, r1 │ │ - b.n ca8d2 │ │ + b.n ca8e2 │ │ str r2, [r0, r0] │ │ - b.n ca5b2 │ │ + b.n ca5c2 │ │ strb r0, [r1, #0] │ │ - b.n ca5c8 │ │ + b.n ca5d8 │ │ lsrs r7, r1, #8 │ │ orn sl, r5, #8388608 @ 0x800000 │ │ - bl ffd19116 │ │ + bl ffd19126 │ │ subs r7, r7, r3 │ │ movs r4, r3 │ │ - b.n c9c64 │ │ + b.n c9c74 │ │ strb r0, [r3, #0] │ │ - b.n c9c68 │ │ - b.n ca170 │ │ - b.n c9c6c │ │ + b.n c9c78 │ │ + b.n ca180 │ │ + b.n c9c7c │ │ movs r0, r0 │ │ - b.n ca3de │ │ + b.n ca3ee │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ str r7, [r0, r2] │ │ - b.n ca250 │ │ + b.n ca260 │ │ str r4, [r2, r0] │ │ - b.n ca64c │ │ + b.n ca65c │ │ ands r5, r0 │ │ - b.n ca486 │ │ + b.n ca496 │ │ lsls r2, r6, #2 │ │ - b.n ca432 │ │ + b.n ca442 │ │ strb r1, [r0, #0] │ │ - b.n ca5dc │ │ + b.n ca5ec │ │ lsls r0, r6, #2 │ │ - b.n ca4dc │ │ + b.n ca4ec │ │ movs r0, r1 │ │ - b.n ca404 │ │ + b.n ca414 │ │ str r4, [r0, r0] │ │ - b.n ca49a │ │ + b.n ca4aa │ │ @ instruction: 0xfff98aff │ │ movs r4, r2 │ │ - b.n ca674 │ │ + b.n ca684 │ │ asrs r0, r6, #2 │ │ - b.n ca4ea │ │ + b.n ca4fa │ │ movs r0, #136 @ 0x88 │ │ - b.n ca26a │ │ + b.n ca27a │ │ stmia r0!, {r4, r5, r7} │ │ - b.n ca4f4 │ │ + b.n ca504 │ │ asrs r0, r6, #2 │ │ - b.n ca4f6 │ │ + b.n ca506 │ │ asrs r1, r6, #1 │ │ - b.n c9f74 │ │ - b.n ca17a │ │ - b.n ca0ba │ │ + b.n c9f84 │ │ + b.n ca18a │ │ + b.n ca0ca │ │ asrs r0, r0, #32 │ │ - b.n ca8be │ │ + b.n ca8ce │ │ asrs r4, r6, #2 │ │ - b.n ca502 │ │ + b.n ca512 │ │ movs r0, #36 @ 0x24 │ │ - b.n c9bbc │ │ + b.n c9bcc │ │ asrs r0, r5, #32 │ │ - b.n c9bc0 │ │ + b.n c9bd0 │ │ movs r0, #182 @ 0xb6 │ │ - b.n ca50e │ │ + b.n ca51e │ │ movs r0, r1 │ │ - b.n ca692 │ │ - cmp r4, #139 @ 0x8b │ │ + b.n ca6a2 │ │ + cmp r4, #80 @ 0x50 │ │ @ instruction: 0xfb000028 │ │ - b.n c9cd4 │ │ + b.n c9ce4 │ │ str r1, [r0, #0] │ │ - b.n ca6aa │ │ + b.n ca6ba │ │ str r0, [sp, #176] @ 0xb0 │ │ - b.n c9cdc │ │ + b.n c9cec │ │ movs r0, r0 │ │ - b.n ca452 │ │ + b.n ca462 │ │ lsls r2, r6, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, #52 @ 0x34 │ │ - b.n c9ce8 │ │ + b.n c9cf8 │ │ ands r4, r1 │ │ - b.n c9ce4 │ │ + b.n c9cf4 │ │ lsls r6, r0, #2 │ │ - b.n ca2ba │ │ + b.n ca2ca │ │ lsls r0, r6, #2 │ │ - b.n ca55a │ │ + b.n ca56a │ │ asrs r0, r0, #1 │ │ - b.n c9ce6 │ │ - b.n ca1c0 │ │ - b.n ca2c6 │ │ + b.n c9cf6 │ │ + b.n ca1d0 │ │ + b.n ca2d6 │ │ movs r0, #8 │ │ - b.n ca6e2 │ │ + b.n ca6f2 │ │ lsls r6, r6, #2 │ │ - b.n ca586 │ │ + b.n ca596 │ │ movs r4, r4 │ │ - b.n c9be4 │ │ + b.n c9bf4 │ │ movs r1, r0 │ │ - b.n ca6d2 │ │ + b.n ca6e2 │ │ movs r0, #40 @ 0x28 │ │ - b.n c9bec │ │ + b.n c9bfc │ │ movs r4, #190 @ 0xbe │ │ - b.n ca57c │ │ + b.n ca58c │ │ movs r1, r0 │ │ - b.n ca95e │ │ + b.n ca96e │ │ asrs r0, r1, #32 │ │ - b.n ca6e2 │ │ + b.n ca6f2 │ │ movs r2, r0 │ │ - b.n ca488 │ │ + b.n ca498 │ │ lsls r3, r0, #1 │ │ ldrh r0, [r0, #16] │ │ lsls r5, r2, #3 │ │ - b.n ca5a0 │ │ - add r0, pc, #4 @ (adr r0, ca1f4 ) │ │ - b.n ca686 │ │ + b.n ca5b0 │ │ + add r0, pc, #4 @ (adr r0, ca204 ) │ │ + b.n ca696 │ │ movs r0, #48 @ 0x30 │ │ - b.n c9d30 │ │ + b.n c9d40 │ │ strh r1, [r0, #0] │ │ - b.n ca70a │ │ + b.n ca71a │ │ str r1, [sp, #0] │ │ - b.n ca122 │ │ + b.n ca132 │ │ movs r0, #9 │ │ - b.n ca542 │ │ + b.n ca552 │ │ adds r0, #9 │ │ - b.n ca546 │ │ + b.n ca556 │ │ str r6, [r7, r2] │ │ - b.n ca5ee │ │ + b.n ca5fe │ │ strb r4, [r7, #2] │ │ - b.n ca5f4 │ │ + b.n ca604 │ │ asrs r1, r0, #32 │ │ - b.n ca29c │ │ + b.n ca2ac │ │ stmia r0!, {r1} │ │ - b.n ca724 │ │ + b.n ca734 │ │ movs r1, r0 │ │ - b.n ca4d2 │ │ + b.n ca4e2 │ │ @ instruction: 0xffa9daff │ │ movs r4, r0 │ │ - b.n c9d4a │ │ + b.n c9d5a │ │ movs r2, r0 │ │ - b.n ca926 │ │ + b.n ca936 │ │ movs r4, r0 │ │ - b.n c9d32 │ │ + b.n c9d42 │ │ lsls r5, r7, #30 │ │ - b.n ca83e │ │ + b.n ca84e │ │ lsrs r7, r7, #31 │ │ - b.n ca8d0 │ │ + b.n ca8e0 │ │ movs r1, r0 │ │ - b.n ca736 │ │ - beq.n ca270 │ │ - b.n ca6d0 │ │ + b.n ca746 │ │ + beq.n ca280 │ │ + b.n ca6e0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, r2, r4, r5, r7} │ │ - b.n ca5fe │ │ + b.n ca60e │ │ movs r0, #40 @ 0x28 │ │ - b.n ca6dc │ │ + b.n ca6ec │ │ asrs r0, r0, #32 │ │ - b.n c9d86 │ │ + b.n c9d96 │ │ adds r0, #56 @ 0x38 │ │ - b.n ca768 │ │ + b.n ca778 │ │ movs r0, r0 │ │ - b.n ca36e │ │ + b.n ca37e │ │ asrs r4, r7, #32 │ │ - b.n c9d70 │ │ + b.n c9d80 │ │ movs r0, r1 │ │ - b.n ca75a │ │ + b.n ca76a │ │ movs r0, r7 │ │ - b.n c9d78 │ │ + b.n c9d88 │ │ movs r4, r0 │ │ - b.n c9e1e │ │ + b.n c9e2e │ │ asrs r0, r1, #32 │ │ - b.n ca5a6 │ │ + b.n ca5b6 │ │ movs r0, r0 │ │ - b.n c9d84 │ │ + b.n c9d94 │ │ movs r1, r1 │ │ - b.n ca5ae │ │ - bfcsel 0, c9a6e , 2, le │ │ + b.n ca5be │ │ + bfcsel 0, c9a7e , 2, le │ │ movs r0, r0 │ │ - b.n ca916 │ │ + b.n ca926 │ │ lsls r6, r2, #4 │ │ subs r0, r0, r0 │ │ movs r0, r5 │ │ - b.n c9db8 │ │ + b.n c9dc8 │ │ strb r1, [r0, #0] │ │ - b.n ca792 │ │ + b.n ca7a2 │ │ ands r4, r6 │ │ - b.n c9dc0 │ │ + b.n c9dd0 │ │ strh r0, [r5, #0] │ │ - b.n ca720 │ │ + b.n ca730 │ │ str r1, [r0, r0] │ │ - b.n ca70e │ │ + b.n ca71e │ │ movs r4, r2 │ │ - b.n c9dcc │ │ - add r0, pc, #224 @ (adr r0, ca374 ) │ │ - b.n ca7b0 │ │ + b.n c9ddc │ │ + add r0, pc, #224 @ (adr r0, ca384 ) │ │ + b.n ca7c0 │ │ str r6, [r2, #0] │ │ - b.n ca79a │ │ + b.n ca7aa │ │ movs r0, r0 │ │ - b.n ca948 │ │ + b.n ca958 │ │ movs r4, r6 │ │ lsrs r0, r0, #8 │ │ lsls r2, r6, #2 │ │ - b.n ca452 │ │ + b.n ca462 │ │ asrs r0, r0, #32 │ │ - b.n ca3b2 │ │ + b.n ca3c2 │ │ adds r0, #8 │ │ - b.n ca7b0 │ │ + b.n ca7c0 │ │ movs r0, #182 @ 0xb6 │ │ - b.n ca654 │ │ + b.n ca664 │ │ movs r0, #36 @ 0x24 │ │ - b.n c9ccc │ │ + b.n c9cdc │ │ adds r0, #40 @ 0x28 │ │ - b.n c9cd0 │ │ + b.n c9ce0 │ │ movs r0, #2 │ │ - b.n ca3c4 │ │ + b.n ca3d4 │ │ movs r0, r0 │ │ - b.n ca1ea │ │ + b.n ca1fa │ │ adds r0, #10 │ │ - b.n ca606 │ │ + b.n ca616 │ │ movs r0, #56 @ 0x38 │ │ - b.n c9de4 │ │ + b.n c9df4 │ │ movs r4, r7 │ │ - b.n c9de8 │ │ + b.n c9df8 │ │ movs r0, #8 │ │ - b.n ca612 │ │ + b.n ca622 │ │ movs r4, r0 │ │ - b.n c9e78 │ │ + b.n c9e88 │ │ asrs r7, r0, #32 │ │ - b.n ca61a │ │ + b.n ca62a │ │ movs r0, r0 │ │ - b.n c9df8 │ │ + b.n c9e08 │ │ movs r1, r1 │ │ - b.n ca622 │ │ - bfcsel 0, caae2 , 2, vs │ │ + b.n ca632 │ │ + bfcsel 0, caaf2 , 2, vs │ │ str r1, [r0, r0] │ │ - b.n ca774 │ │ + b.n ca784 │ │ strb r1, [r0, #0] │ │ - b.n ca7fc │ │ + b.n ca80c │ │ movs r0, r0 │ │ - b.n ca992 │ │ + b.n ca9a2 │ │ @ instruction: 0xffe80aff │ │ lsls r6, r6, #3 │ │ and.w r4, r0, r4, lsr #32 │ │ - b.n c9e3c │ │ + b.n c9e4c │ │ movs r0, r0 │ │ - b.n ca420 │ │ - ldr r2, [pc, #352] @ (ca464 ) │ │ + b.n ca430 │ │ + ldr r2, [pc, #348] @ (ca470 ) │ │ @ instruction: 0xebff6020 │ │ - b.n c9e24 │ │ + b.n c9e34 │ │ movs r7, r3 │ │ and.w r0, r0, r9 │ │ - b.n ca652 │ │ + b.n ca662 │ │ pop {r3, r4, r5, r6, r7} │ │ @ instruction: 0xebff0000 │ │ - b.n ca9ba │ │ + b.n ca9ca │ │ lsls r5, r5, #3 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n c9e56 │ │ + b.n c9e66 │ │ ands r0, r5 │ │ - b.n ca7bc │ │ + b.n ca7cc │ │ asrs r4, r2, #32 │ │ - b.n c9e64 │ │ + b.n c9e74 │ │ movs r4, r0 │ │ - b.n c9e4e │ │ + b.n c9e5e │ │ asrs r4, r2, #32 │ │ - b.n ca834 │ │ + b.n ca844 │ │ asrs r0, r5, #32 │ │ - b.n c9d4c │ │ + b.n c9d5c │ │ movs r4, r4 │ │ - b.n c9d50 │ │ + b.n c9d60 │ │ movs r1, r1 │ │ - b.n ca67e │ │ + b.n ca68e │ │ asrs r0, r1, #32 │ │ - b.n ca682 │ │ + b.n ca692 │ │ movs r0, #4 │ │ - b.n ca686 │ │ + b.n ca696 │ │ @ instruction: 0xefd5ebff │ │ movs r0, r0 │ │ - b.n ca9ee │ │ + b.n ca9fe │ │ lsls r0, r4, #3 │ │ subs r0, r0, r0 │ │ movs r0, r5 │ │ - b.n c9d8c │ │ + b.n c9d9c │ │ strh r1, [r0, #0] │ │ - b.n ca86a │ │ + b.n ca87a │ │ asrs r4, r4, #32 │ │ - b.n c9d94 │ │ + b.n c9da4 │ │ movs r0, r0 │ │ - b.n ca464 │ │ + b.n ca474 │ │ movs r0, r5 │ │ - b.n c9d7c │ │ + b.n c9d8c │ │ movs r0, r5 │ │ - b.n c9ea4 │ │ + b.n c9eb4 │ │ movs r1, r0 │ │ - b.n ca80e │ │ + b.n ca81e │ │ movs r0, r5 │ │ - b.n c9e8c │ │ + b.n c9e9c │ │ @ instruction: 0xfff01aff │ │ - add r0, pc, #32 @ (adr r0, ca398 ) │ │ - b.n c9eb4 │ │ + add r0, pc, #32 @ (adr r0, ca3a8 ) │ │ + b.n c9ec4 │ │ lsls r5, r2, #3 │ │ - b.n ca730 │ │ + b.n ca740 │ │ movs r0, #48 @ 0x30 │ │ - b.n c9ebc │ │ + b.n c9ecc │ │ asrs r5, r0, #32 │ │ - b.n c9f3a │ │ + b.n c9f4a │ │ lsls r0, r0, #4 │ │ - b.n ca2ae │ │ + b.n ca2be │ │ movs r0, r4 │ │ - b.n c9ea8 │ │ + b.n c9eb8 │ │ movs r1, r0 │ │ - b.n ca814 │ │ + b.n ca824 │ │ movs r5, r0 │ │ - b.n c9f2a │ │ + b.n c9f3a │ │ movs r2, r1 │ │ - b.n ca6da │ │ + b.n ca6ea │ │ asrs r0, r0, #32 │ │ - b.n caade │ │ + b.n caaee │ │ str r0, [r0, r0] │ │ - b.n caae2 │ │ - b.n ca358 │ │ + b.n caaf2 │ │ + b.n ca368 │ │ @ instruction: 0xebff00d5 │ │ - b.n ca75e │ │ + b.n ca76e │ │ strh r4, [r7, #2] │ │ - b.n ca8c2 │ │ + b.n ca8d2 │ │ asrs r0, r0, #2 │ │ - b.n ca4c2 │ │ + b.n ca4d2 │ │ asrs r0, r6, #2 │ │ - b.n ca758 │ │ + b.n ca768 │ │ movs r0, r0 │ │ - b.n caa5c │ │ + b.n caa6c │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ lsls r0, r6, #1 │ │ - b.n ca1a0 │ │ + b.n ca1b0 │ │ movs r7, r0 │ │ and.w r0, r0, r8, ror #4 │ │ - b.n ca8e4 │ │ + b.n ca8f4 │ │ movs r2, r1 │ │ - b.n ca70e │ │ + b.n ca71e │ │ str r4, [r7, r0] │ │ - b.n c9eec │ │ + b.n c9efc │ │ str r0, [r7, r0] │ │ - b.n c9ef0 │ │ - b.n ca238 │ │ + b.n c9f00 │ │ + b.n ca248 │ │ @ instruction: 0xebff0000 │ │ - b.n caa7e │ │ + b.n caa8e │ │ lsls r7, r0, #3 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n c9f9a │ │ + b.n c9faa │ │ movs r1, r0 │ │ - b.n ca8ea │ │ + b.n ca8fa │ │ movs r0, #216 @ 0xd8 │ │ - b.n ca782 │ │ + b.n ca792 │ │ movs r5, r0 │ │ - b.n c9f86 │ │ + b.n c9f96 │ │ lsls r4, r1, #1 │ │ - b.n c9f1c │ │ + b.n c9f2c │ │ asrs r4, r2, #1 │ │ - b.n c9f20 │ │ + b.n c9f30 │ │ movs r0, r0 │ │ - b.n ca482 │ │ + b.n ca492 │ │ ands r4, r2 │ │ - b.n c9f3c │ │ + b.n c9f4c │ │ lsls r0, r0, #4 │ │ - b.n ca328 │ │ + b.n ca338 │ │ asrs r4, r1, #32 │ │ - b.n c9f44 │ │ + b.n c9f54 │ │ movs r0, r0 │ │ - b.n caaae │ │ + b.n caabe │ │ lsls r2, r1, #1 │ │ lsrs r0, r0, #8 │ │ stmia r0!, {r2, r5} │ │ - b.n c9f50 │ │ - b.n ca510 │ │ - b.n ca92c │ │ + b.n c9f60 │ │ + b.n ca520 │ │ + b.n ca93c │ │ movs r6, r2 │ │ and.w r0, r0, r0, asr #8 │ │ - b.n c9f5c │ │ + b.n c9f6c │ │ movs r1, #6 │ │ - b.n ca334 │ │ + b.n ca344 │ │ str r4, [r7, #4] │ │ - b.n ca930 │ │ + b.n ca940 │ │ movs r0, #213 @ 0xd5 │ │ - b.n ca7e2 │ │ + b.n ca7f2 │ │ movs r0, #130 @ 0x82 │ │ - b.n ca53e │ │ + b.n ca54e │ │ str r0, [r6, r2] │ │ - b.n ca7da │ │ + b.n ca7ea │ │ str r4, [r1, r0] │ │ - b.n ca544 │ │ + b.n ca554 │ │ str r0, [r6, r2] │ │ - b.n ca7c2 │ │ + b.n ca7d2 │ │ movs r0, #213 @ 0xd5 │ │ - b.n ca7f6 │ │ + b.n ca806 │ │ str r1, [r0, r0] │ │ - b.n cac06 │ │ + b.n cac16 │ │ movs r0, #130 @ 0x82 │ │ - b.n ca554 │ │ + b.n ca564 │ │ str r2, [r0, r0] │ │ - b.n ca56a │ │ + b.n ca57a │ │ movs r0, #2 │ │ - b.n ca55e │ │ + b.n ca56e │ │ str r0, [r6, r2] │ │ - b.n ca800 │ │ + b.n ca810 │ │ str r0, [r6, r2] │ │ - b.n ca7de │ │ + b.n ca7ee │ │ movs r0, #186 @ 0xba │ │ - b.n ca806 │ │ + b.n ca816 │ │ movs r2, r0 │ │ - b.n caa86 │ │ + b.n caa96 │ │ str r0, [r3, #0] │ │ asrs r3, r2, #22 │ │ movs r0, r0 │ │ asrs r6, r2, #13 │ │ movs r5, r3 │ │ subs r0, r0, r0 │ │ lsls r4, r5, #2 │ │ - b.n c9f92 │ │ + b.n c9fa2 │ │ movs r0, r0 │ │ - b.n cab16 │ │ + b.n cab26 │ │ movs r0, r6 │ │ lsrs r0, r0, #8 │ │ movs r0, #4 │ │ - b.n ca032 │ │ + b.n ca042 │ │ adds r0, #0 │ │ - b.n ca7c2 │ │ + b.n ca7d2 │ │ movs r1, r0 │ │ - b.n caaaa │ │ + b.n caaba │ │ adds r0, #24 │ │ asrs r0, r2, #22 │ │ movs r2, r1 │ │ - b.n ca734 │ │ + b.n ca744 │ │ @ instruction: 0xfff60aff │ │ movs r0, #213 @ 0xd5 │ │ - b.n ca83c │ │ + b.n ca84c │ │ str r5, [r2, #12] │ │ - b.n ca84e │ │ + b.n ca85e │ │ movs r2, r0 │ │ - b.n ca74a │ │ + b.n ca75a │ │ @ instruction: 0xfff2caff │ │ strb r4, [r3, #0] │ │ - b.n ca9ac │ │ + b.n ca9bc │ │ movs r1, #6 │ │ - b.n ca3d8 │ │ + b.n ca3e8 │ │ movs r4, r0 │ │ - b.n ca752 │ │ + b.n ca762 │ │ @ instruction: 0xffda0aff │ │ str r1, [r0, #0] │ │ - b.n ca942 │ │ + b.n ca952 │ │ movs r1, #6 │ │ - b.n ca3dc │ │ + b.n ca3ec │ │ str r6, [r0, r4] │ │ - b.n ca3ec │ │ + b.n ca3fc │ │ movs r2, r0 │ │ - b.n ca76c │ │ + b.n ca77c │ │ @ instruction: 0xffe41aff │ │ str r6, [r0, r2] │ │ - b.n ca5d0 │ │ + b.n ca5e0 │ │ str r6, [r0, #8] │ │ - b.n ca5de │ │ + b.n ca5ee │ │ movs r7, #188 @ 0xbc │ │ - b.n ca8bc │ │ + b.n ca8cc │ │ str r0, [r6, #8] │ │ - b.n ca882 │ │ + b.n ca892 │ │ movs r6, r0 │ │ - b.n ca77e │ │ + b.n ca78e │ │ movs r0, #1 │ │ strh r2, [r0, #18] │ │ movs r0, #176 @ 0xb0 │ │ strh r5, [r0, #14] │ │ @ instruction: 0xffdceaff │ │ movs r0, #213 @ 0xd5 │ │ - b.n ca896 │ │ + b.n ca8a6 │ │ movs r0, r0 │ │ - b.n cab92 │ │ + b.n caba2 │ │ @ instruction: 0xffde4aff │ │ movs r0, #213 @ 0xd5 │ │ - b.n ca8aa │ │ + b.n ca8ba │ │ strb r2, [r0, #4] │ │ - b.n ca428 │ │ + b.n ca438 │ │ movs r0, #130 @ 0x82 │ │ - b.n ca604 │ │ + b.n ca614 │ │ movs r7, #188 @ 0xbc │ │ - b.n ca8a6 │ │ + b.n ca8b6 │ │ str r4, [r7, r2] │ │ - b.n ca8b4 │ │ + b.n ca8c4 │ │ lsls r5, r4, #2 │ │ - b.n ca7ae │ │ + b.n ca7be │ │ @ instruction: 0xffd72aff │ │ adds r0, #20 │ │ - b.n caa20 │ │ + b.n caa30 │ │ movs r0, #130 @ 0x82 │ │ - b.n ca61c │ │ + b.n ca62c │ │ movs r0, #176 @ 0xb0 │ │ - b.n ca8be │ │ + b.n ca8ce │ │ adds r0, #2 │ │ - b.n ca624 │ │ + b.n ca634 │ │ movs r0, #4 │ │ - b.n ca0c8 │ │ + b.n ca0d8 │ │ movs r0, #6 │ │ - b.n ca92a │ │ + b.n ca93a │ │ movs r4, r0 │ │ - b.n cabce │ │ + b.n cabde │ │ movs r0, #182 @ 0xb6 │ │ lsls r3, r2, #7 │ │ movs r0, #2 │ │ lsls r3, r0, #2 │ │ movs r0, #8 │ │ lsls r2, r0, #10 │ │ movs r0, #28 │ │ lsls r6, r0, #22 │ │ @ instruction: 0xffcbeaff │ │ adds r0, #186 @ 0xba │ │ - b.n ca8ea │ │ + b.n ca8fa │ │ movs r2, r1 │ │ - b.n ca886 │ │ + b.n ca896 │ │ asrs r0, r2, #32 │ │ - b.n ca072 │ │ + b.n ca082 │ │ movs r0, #4 │ │ - b.n ca88e │ │ + b.n ca89e │ │ bflx 18, fp │ │ movs r0, r0 │ │ - b.n cabf6 │ │ + b.n cac06 │ │ lsls r6, r3, #1 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n ca090 │ │ + b.n ca0a0 │ │ eors r4, r7 │ │ - b.n caa74 │ │ + b.n caa84 │ │ str r5, [r2, #12] │ │ - b.n ca918 │ │ + b.n ca928 │ │ asrs r0, r6, #32 │ │ - b.n ca0a4 │ │ + b.n ca0b4 │ │ strb r4, [r0, #0] │ │ - b.n ca8ae │ │ + b.n ca8be │ │ str r2, [r6, r2] │ │ - b.n ca912 │ │ + b.n ca922 │ │ lsls r6, r0, #2 │ │ - b.n ca8b6 │ │ + b.n ca8c6 │ │ lsls r0, r6, #2 │ │ - b.n ca8e8 │ │ + b.n ca8f8 │ │ movs r4, r6 │ │ - b.n ca098 │ │ + b.n ca0a8 │ │ movs r1, r0 │ │ - b.n caa0e │ │ - add r1, pc, #24 @ (adr r1, ca59c ) │ │ - b.n ca4a8 │ │ + b.n caa1e │ │ + add r1, pc, #24 @ (adr r1, ca5ac ) │ │ + b.n ca4b8 │ │ movs r5, r0 │ │ - b.n ca11c │ │ + b.n ca12c │ │ movs r1, r1 │ │ - b.n ca8ce │ │ + b.n ca8de │ │ @ instruction: 0xfb0aebff │ │ movs r0, r0 │ │ - b.n cac36 │ │ + b.n cac46 │ │ lsls r6, r1, #1 │ │ subs r0, r0, r0 │ │ movs r4, r1 │ │ - b.n ca0d0 │ │ - b.n ca5aa │ │ - b.n ca8e2 │ │ + b.n ca0e0 │ │ + b.n ca5ba │ │ + b.n ca8f2 │ │ stmia r0!, {r2} │ │ - b.n ca8e6 │ │ + b.n ca8f6 │ │ lsls r0, r0, #1 │ │ - b.n ca0ca │ │ + b.n ca0da │ │ lsls r0, r1, #1 │ │ - b.n ca0ce │ │ + b.n ca0de │ │ movs r6, #208 @ 0xd0 │ │ - b.n ca932 │ │ + b.n ca942 │ │ strh r1, [r0, #0] │ │ - b.n caada │ │ + b.n caaea │ │ str r0, [sp, #0] │ │ - b.n cab00 │ │ + b.n cab10 │ │ strh r0, [r6, #54] @ 0x36 │ │ - b.n ca93e │ │ + b.n ca94e │ │ str r4, [r5, r0] │ │ - b.n ca0fc │ │ + b.n ca10c │ │ ands r0, r6 │ │ - b.n ca100 │ │ + b.n ca110 │ │ lsls r5, r2, #3 │ │ - b.n ca974 │ │ + b.n ca984 │ │ asrs r0, r0, #4 │ │ - b.n ca4f6 │ │ + b.n ca506 │ │ movs r0, r0 │ │ - b.n cad12 │ │ + b.n cad22 │ │ movs r0, #186 @ 0xba │ │ - b.n ca978 │ │ + b.n ca988 │ │ movs r2, r0 │ │ - b.n cabfe │ │ + b.n cac0e │ │ movs r5, r7 │ │ subs r0, r0, r0 │ │ adds r0, #16 │ │ - b.n ca11c │ │ + b.n ca12c │ │ movs r0, #10 │ │ - b.n ca19a │ │ + b.n ca1aa │ │ adds r0, #115 @ 0x73 │ │ - b.n ca3c8 │ │ + b.n ca3d8 │ │ movs r2, r0 │ │ - b.n ca894 │ │ + b.n ca8a4 │ │ movs r2, r4 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n ca8aa │ │ + b.n ca8ba │ │ movs r6, r6 │ │ lsrs r0, r0, #8 │ │ asrs r6, r1, #32 │ │ - b.n ca68a │ │ + b.n ca69a │ │ movs r1, r0 │ │ - b.n cace4 │ │ + b.n cacf4 │ │ movs r5, r3 │ │ ldmia r2!, {} │ │ movs r0, #16 │ │ - b.n ca134 │ │ + b.n ca144 │ │ movs r0, #178 @ 0xb2 │ │ - b.n ca9b2 │ │ + b.n ca9c2 │ │ asrs r2, r0, #32 │ │ - b.n ca734 │ │ + b.n ca744 │ │ movs r1, r3 │ │ - ldr r2, [pc, #0] @ (ca614 ) │ │ + ldr r2, [pc, #0] @ (ca624 ) │ │ adds r1, #1 │ │ - b.n ca542 │ │ + b.n ca552 │ │ movs r3, r0 │ │ - b.n ca8d2 │ │ + b.n ca8e2 │ │ movs r3, r2 │ │ lsrs r0, r0, #8 │ │ movs r2, r0 │ │ - b.n ca8e2 │ │ + b.n ca8f2 │ │ movs r4, r2 │ │ ldr r2, [sp, #0] │ │ movs r1, #6 │ │ - b.n ca556 │ │ + b.n ca566 │ │ movs r2, r1 │ │ - b.n ca8d6 │ │ + b.n ca8e6 │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ adds r0, #176 @ 0xb0 │ │ - b.n ca9e8 │ │ + b.n ca9f8 │ │ str r4, [r6, #0] │ │ - b.n ca178 │ │ + b.n ca188 │ │ movs r6, r0 │ │ - b.n ca8e8 │ │ + b.n ca8f8 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ adds r0, #10 │ │ - b.n caa0a │ │ + b.n caa1a │ │ movs r3, r0 │ │ - b.n ca8f2 │ │ + b.n ca902 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ movs r0, #176 @ 0xb0 │ │ - b.n caa04 │ │ + b.n caa14 │ │ adds r0, #52 @ 0x34 │ │ - b.n ca194 │ │ + b.n ca1a4 │ │ movs r3, r0 │ │ - b.n ca902 │ │ + b.n ca912 │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ movs r0, #129 @ 0x81 │ │ - b.n ca77e │ │ + b.n ca78e │ │ adds r0, #52 @ 0x34 │ │ - b.n ca1a4 │ │ - add r1, pc, #4 @ (adr r1, ca670 ) │ │ - b.n ca576 │ │ + b.n ca1b4 │ │ + add r1, pc, #4 @ (adr r1, ca680 ) │ │ + b.n ca586 │ │ adds r0, #176 @ 0xb0 │ │ - b.n ca9f6 │ │ + b.n caa06 │ │ asrs r5, r0, #32 │ │ - b.n ca200 │ │ - beq.n ca6b0 │ │ - b.n cab10 │ │ + b.n ca210 │ │ + beq.n ca6c0 │ │ + b.n cab20 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r2, sp} │ │ - b.n ca9c2 │ │ + b.n ca9d2 │ │ lsls r5, r7, #30 │ │ - b.n cac96 │ │ + b.n caca6 │ │ adds r0, #4 │ │ - b.n ca26e │ │ + b.n ca27e │ │ subs r0, r2, #7 │ │ - b.n cacac │ │ + b.n cacbc │ │ lsrs r7, r7, #31 │ │ - b.n cad30 │ │ + b.n cad40 │ │ movs r1, r0 │ │ - b.n cacbc │ │ + b.n caccc │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ movs r0, #24 │ │ - b.n ca1c8 │ │ + b.n ca1d8 │ │ adds r0, #180 @ 0xb4 │ │ - b.n caa4c │ │ + b.n caa5c │ │ movs r0, r0 │ │ - b.n cad4a │ │ + b.n cad5a │ │ adds r0, #1 │ │ - b.n ca9b0 │ │ + b.n ca9c0 │ │ adds r0, #180 @ 0xb4 │ │ - b.n caa38 │ │ + b.n caa48 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ adds r0, #0 │ │ - b.n cadf6 │ │ + b.n cae06 │ │ adds r0, #188 @ 0xbc │ │ - b.n ca1be │ │ + b.n ca1ce │ │ movs r0, #4 │ │ - b.n cabc2 │ │ + b.n cabd2 │ │ movs r2, r0 │ │ and.w r0, r0, r0, lsr #12 │ │ - b.n ca1f0 │ │ + b.n ca200 │ │ strb r0, [r0, #0] │ │ - b.n cae0a │ │ + b.n cae1a │ │ strb r0, [r1, #0] │ │ - b.n ca1d4 │ │ + b.n ca1e4 │ │ asrs r1, r0, #32 │ │ - b.n cabd4 │ │ + b.n cabe4 │ │ asrs r0, r6, #2 │ │ - b.n caa5a │ │ - beq.n ca710 │ │ - b.n cab70 │ │ + b.n caa6a │ │ + beq.n ca720 │ │ + b.n cab80 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, r7, sp} │ │ - b.n ca7f2 │ │ + b.n ca802 │ │ asrs r0, r7, #2 │ │ - b.n caa86 │ │ + b.n caa96 │ │ movs r7, #188 @ 0xbc │ │ - b.n caa8e │ │ + b.n caa9e │ │ lsls r1, r2, #10 │ │ - b.n ca72e │ │ + b.n ca73e │ │ movs r4, r2 │ │ - b.n cabf2 │ │ + b.n cac02 │ │ mrc2 10, 0, lr, cr12, cr15, {7} @ │ │ movs r0, r0 │ │ - b.n caeba │ │ - beq.n ca734 │ │ - b.n cab94 │ │ + b.n caeca │ │ + beq.n ca744 │ │ + b.n caba4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r2, ip} │ │ - b.n ca2ba │ │ + b.n ca2ca │ │ asrs r1, r0, #32 │ │ - b.n cac0c │ │ + b.n cac1c │ │ asrs r5, r0, #32 │ │ - b.n ca2a2 │ │ - beq.n ca748 │ │ - b.n caba8 │ │ + b.n ca2b2 │ │ + beq.n ca758 │ │ + b.n cabb8 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r4, r5, r8, r9, sl, fp, ip, lr} │ │ + ldmia.w sp!, {r5, r8, r9, sl, fp, ip, lr} │ │ @ instruction: 0xfff44ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n cac3c │ │ + b.n cac4c │ │ svc 121 @ 0x79 │ │ - b.n cabc0 │ │ + b.n cabd0 │ │ str r5, [r2, #12] │ │ - b.n caaca │ │ + b.n caada │ │ str r0, [sp, #0] │ │ - b.n caa6e │ │ + b.n caa7e │ │ movs r4, r3 │ │ - b.n cac32 │ │ + b.n cac42 │ │ strh r5, [r2, #6] │ │ - b.n caad8 │ │ + b.n caae8 │ │ movs r4, r5 │ │ - b.n ca254 │ │ - add r0, pc, #4 @ (adr r0, ca740 ) │ │ - b.n caa7e │ │ + b.n ca264 │ │ + add r0, pc, #4 @ (adr r0, ca750 ) │ │ + b.n caa8e │ │ str r6, [r0, r4] │ │ - b.n ca662 │ │ + b.n ca672 │ │ movs r4, r3 │ │ - b.n cac48 │ │ + b.n cac58 │ │ ands r2, r0 │ │ - b.n caa8a │ │ + b.n caa9a │ │ strb r0, [r1, #4] │ │ - b.n ca66e │ │ + b.n ca67e │ │ movs r0, r5 │ │ - b.n ca26c │ │ + b.n ca27c │ │ asrs r2, r7, #2 │ │ - b.n cab00 │ │ + b.n cab10 │ │ movs r0, #10 │ │ - b.n ca308 │ │ + b.n ca318 │ │ lsls r1, r6, #1 │ │ - b.n ca53c │ │ + b.n ca54c │ │ movs r2, r0 │ │ - b.n caa02 │ │ + b.n caa12 │ │ lsls r3, r6, #3 │ │ subs r0, r0, r0 │ │ movs r2, r4 │ │ - b.n cae0a │ │ + b.n cae1a │ │ movs r4, r7 │ │ lsrs r0, r0, #8 │ │ movs r2, r0 │ │ - b.n cae12 │ │ + b.n cae22 │ │ movs r2, r4 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n cae1a │ │ + b.n cae2a │ │ lsls r5, r5, #3 │ │ subs r0, r0, r0 │ │ adds r0, #134 @ 0x86 │ │ - b.n ca894 │ │ + b.n ca8a4 │ │ movs r0, #20 │ │ - b.n cac90 │ │ + b.n caca0 │ │ lsls r4, r7, #30 │ │ - b.n cab70 │ │ + b.n cab80 │ │ movs r0, r0 │ │ - b.n cae2e │ │ + b.n cae3e │ │ asrs r0, r0, #2 │ │ - b.n ca896 │ │ + b.n ca8a6 │ │ asrs r0, r6, #2 │ │ - b.n cab38 │ │ + b.n cab48 │ │ asrs r1, r0, #32 │ │ - b.n ca6fe │ │ + b.n ca70e │ │ asrs r4, r3, #32 │ │ - b.n ca2b8 │ │ + b.n ca2c8 │ │ asrs r6, r6, #2 │ │ - b.n cab46 │ │ + b.n cab56 │ │ movs r0, #8 │ │ - b.n cacaa │ │ + b.n cacba │ │ movs r0, #40 @ 0x28 │ │ - b.n ca1c0 │ │ + b.n ca1d0 │ │ asrs r4, r4, #32 │ │ - b.n ca1c4 │ │ + b.n ca1d4 │ │ lsls r7, r5, #3 │ │ subs r0, r0, r0 │ │ movs r1, r1 │ │ - b.n caaf6 │ │ + b.n cab06 │ │ strh r3, [r0, #0] │ │ - b.n caafa │ │ + b.n cab0a │ │ lsls r5, r5, #17 │ │ add.w r0, r0, r0 │ │ - b.n cae62 │ │ + b.n cae72 │ │ lsls r1, r4, #12 │ │ subs r0, r0, r0 │ │ lsls r5, r2, #3 │ │ - b.n cab7c │ │ + b.n cab8c │ │ asrs r4, r5, #32 │ │ - b.n ca308 │ │ + b.n ca318 │ │ asrs r0, r0, #4 │ │ - b.n ca6f4 │ │ + b.n ca704 │ │ movs r0, #186 @ 0xba │ │ - b.n cab78 │ │ + b.n cab88 │ │ movs r2, r0 │ │ - b.n cadfe │ │ + b.n cae0e │ │ lsls r5, r2, #3 │ │ lsrs r0, r0, #8 │ │ lsls r6, r6, #1 │ │ - b.n ca5c0 │ │ + b.n ca5d0 │ │ movs r0, r4 │ │ - b.n cae0a │ │ + b.n cae1a │ │ adds r0, #8 │ │ - b.n cab2a │ │ + b.n cab3a │ │ lsls r6, r0, #3 │ │ subs r0, r0, r0 │ │ movs r1, #180 @ 0xb4 │ │ - b.n cabd4 │ │ + b.n cabe4 │ │ asrs r2, r0, #32 │ │ - b.n ca8f8 │ │ + b.n ca908 │ │ movs r0, #8 │ │ - b.n cacfc │ │ + b.n cad0c │ │ asrs r6, r0, #32 │ │ - b.n cad00 │ │ + b.n cad10 │ │ lsls r3, r0, #3 │ │ and.w r0, r0, ip │ │ - b.n ca338 │ │ + b.n ca348 │ │ strh r4, [r0, #0] │ │ - b.n cab4a │ │ + b.n cab5a │ │ movs r0, #0 │ │ - b.n ca338 │ │ + b.n ca348 │ │ adds r0, #4 │ │ - b.n ca33c │ │ + b.n ca34c │ │ ands r0, r7 │ │ - b.n ca336 │ │ + b.n ca346 │ │ strb r4, [r7, #0] │ │ - b.n ca33a │ │ + b.n ca34a │ │ movs r0, #4 │ │ - b.n ca862 │ │ + b.n ca872 │ │ adds r0, #7 │ │ - b.n ca868 │ │ + b.n ca878 │ │ movs r0, #3 │ │ - b.n cab4a │ │ + b.n cab5a │ │ movs r6, r4 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n cae50 │ │ + b.n cae60 │ │ movs r1, r5 │ │ subs r0, r0, r0 │ │ negs r0, r0 │ │ - b.n ca356 │ │ + b.n ca366 │ │ movs r0, r0 │ │ - b.n caee2 │ │ + b.n caef2 │ │ movs r6, r4 │ │ lsrs r0, r0, #8 │ │ asrs r0, r2, #32 │ │ - b.n ca36c │ │ + b.n ca37c │ │ str r0, [r7, #32] │ │ - b.n ca366 │ │ + b.n ca376 │ │ movs r4, r0 │ │ - b.n cab8a │ │ + b.n cab9a │ │ add r6, sp, #428 @ 0x1ac │ │ @ instruction: 0xebff0080 │ │ - b.n ca952 │ │ + b.n ca962 │ │ lsls r0, r0, #4 │ │ - b.n ca95e │ │ + b.n ca96e │ │ movs r0, r2 │ │ - b.n ca37a │ │ + b.n ca38a │ │ str r4, [r0, #0] │ │ - b.n ca25e │ │ + b.n ca26e │ │ movs r5, r3 │ │ and.w r0, r0, ip │ │ - b.n ca398 │ │ + b.n ca3a8 │ │ ands r4, r4 │ │ - b.n ca384 │ │ + b.n ca394 │ │ movs r0, #0 │ │ - b.n ca398 │ │ + b.n ca3a8 │ │ ands r0, r7 │ │ - b.n ca392 │ │ + b.n ca3a2 │ │ adds r0, #4 │ │ - b.n ca3a0 │ │ + b.n ca3b0 │ │ strb r4, [r7, #0] │ │ - b.n ca39a │ │ + b.n ca3aa │ │ movs r0, #4 │ │ - b.n ca8c2 │ │ + b.n ca8d2 │ │ adds r0, #7 │ │ - b.n ca8c8 │ │ + b.n ca8d8 │ │ movs r0, #3 │ │ - b.n cabaa │ │ + b.n cabba │ │ movs r7, r5 │ │ subs r0, r0, r0 │ │ strh r4, [r5, #0] │ │ - b.n ca3c8 │ │ + b.n ca3d8 │ │ lsls r0, r0, #1 │ │ - b.n caeb4 │ │ + b.n caec4 │ │ movs r2, r6 │ │ subs r0, r0, r0 │ │ negs r0, r0 │ │ - b.n ca3ba │ │ + b.n ca3ca │ │ movs r0, r0 │ │ - b.n caf46 │ │ + b.n caf56 │ │ movs r7, r5 │ │ lsrs r0, r0, #8 │ │ asrs r0, r2, #32 │ │ - b.n ca3d0 │ │ + b.n ca3e0 │ │ str r0, [r7, #32] │ │ - b.n ca3ca │ │ + b.n ca3da │ │ movs r4, r0 │ │ - b.n cabee │ │ + b.n cabfe │ │ add r6, sp, #328 @ 0x148 │ │ @ instruction: 0xebff0080 │ │ - b.n ca9b6 │ │ + b.n ca9c6 │ │ lsls r0, r0, #4 │ │ - b.n ca9c2 │ │ + b.n ca9d2 │ │ movs r0, r2 │ │ - b.n ca3de │ │ + b.n ca3ee │ │ str r4, [r0, #0] │ │ - b.n ca2c2 │ │ + b.n ca2d2 │ │ movs r6, r4 │ │ and.w r0, r0, r9, lsl #4 │ │ - b.n cac0a │ │ + b.n cac1a │ │ movs r0, #5 │ │ - b.n cac0e │ │ - cbnz r2, ca93a │ │ + b.n cac1e │ │ + cbnz r2, ca94a │ │ @ instruction: 0xebff0000 │ │ - b.n caf76 │ │ + b.n caf86 │ │ lsls r4, r3, #11 │ │ subs r0, r0, r0 │ │ asrs r5, r2, #3 │ │ - b.n cac92 │ │ + b.n caca2 │ │ str r0, [r5, r0] │ │ - b.n ca41c │ │ + b.n ca42c │ │ movs r4, r1 │ │ - b.n ca41a │ │ + b.n ca42a │ │ movs r1, #1 │ │ - b.n ca814 │ │ + b.n ca824 │ │ ands r0, r7 │ │ - b.n ca40e │ │ + b.n ca41e │ │ asrs r4, r7, #32 │ │ - b.n ca412 │ │ + b.n ca422 │ │ adds r0, #0 │ │ - b.n ca41a │ │ + b.n ca42a │ │ strb r4, [r0, #0] │ │ - b.n ca41e │ │ + b.n ca42e │ │ adds r0, #4 │ │ - b.n ca944 │ │ + b.n ca954 │ │ asrs r1, r0, #32 │ │ - b.n ca950 │ │ + b.n ca960 │ │ asrs r1, r0, #32 │ │ - b.n cac2c │ │ + b.n cac3c │ │ movs r0, r6 │ │ subs r0, r0, r0 │ │ str r0, [r0, #36] @ 0x24 │ │ - b.n ca42e │ │ + b.n ca43e │ │ strb r0, [r1, #0] │ │ - b.n cac52 │ │ + b.n cac62 │ │ movs r0, r0 │ │ - b.n cafc2 │ │ + b.n cafd2 │ │ movs r1, r6 │ │ lsrs r0, r0, #8 │ │ asrs r2, r7, #2 │ │ - b.n cacc2 │ │ + b.n cacd2 │ │ lsls r0, r0, #1 │ │ - b.n caf44 │ │ + b.n caf54 │ │ movs r6, r5 │ │ subs r0, r0, r0 │ │ asrs r0, r2, #32 │ │ - b.n ca44e │ │ + b.n ca45e │ │ tst r0, r7 │ │ - b.n ca44e │ │ + b.n ca45e │ │ movs r6, r0 │ │ - b.n cac72 │ │ + b.n cac82 │ │ add r6, sp, #196 @ 0xc4 │ │ @ instruction: 0xebff0080 │ │ - b.n caa3a │ │ + b.n caa4a │ │ lsls r0, r0, #4 │ │ - b.n caa4a │ │ + b.n caa5a │ │ movs r0, r2 │ │ - b.n ca462 │ │ + b.n ca472 │ │ ands r4, r0 │ │ - b.n ca346 │ │ + b.n ca356 │ │ movs r5, r4 │ │ and.w r0, r0, r9, lsl #4 │ │ - b.n cac8e │ │ + b.n cac9e │ │ movs r0, #5 │ │ - b.n cac92 │ │ - cbnz r1, ca9b6 │ │ + b.n caca2 │ │ + cbnz r1, ca9c6 │ │ @ instruction: 0xebff802c │ │ - b.n ca494 │ │ + b.n ca4a4 │ │ movs r0, r0 │ │ - b.n caffe │ │ + b.n cb00e │ │ lsls r2, r7, #10 │ │ subs r0, r0, r0 │ │ asrs r5, r2, #3 │ │ - b.n cad1a │ │ + b.n cad2a │ │ str r0, [r5, r0] │ │ - b.n ca4a4 │ │ + b.n ca4b4 │ │ movs r4, r1 │ │ - b.n ca4a2 │ │ + b.n ca4b2 │ │ movs r1, #1 │ │ - b.n ca89c │ │ + b.n ca8ac │ │ ands r0, r7 │ │ - b.n ca496 │ │ + b.n ca4a6 │ │ asrs r4, r7, #32 │ │ - b.n ca49a │ │ + b.n ca4aa │ │ adds r0, #0 │ │ - b.n ca4a2 │ │ + b.n ca4b2 │ │ strb r4, [r0, #0] │ │ - b.n ca4a6 │ │ + b.n ca4b6 │ │ adds r0, #4 │ │ - b.n ca9cc │ │ + b.n ca9dc │ │ asrs r1, r0, #32 │ │ - b.n ca9d8 │ │ + b.n ca9e8 │ │ asrs r1, r0, #32 │ │ - b.n cacb4 │ │ + b.n cacc4 │ │ movs r0, r6 │ │ subs r0, r0, r0 │ │ str r0, [r0, #36] @ 0x24 │ │ - b.n ca4b6 │ │ + b.n ca4c6 │ │ movs r0, r0 │ │ - b.n cb046 │ │ + b.n cb056 │ │ movs r1, r6 │ │ lsrs r0, r0, #8 │ │ asrs r2, r7, #2 │ │ - b.n cad46 │ │ + b.n cad56 │ │ lsls r0, r0, #1 │ │ - b.n cafc8 │ │ + b.n cafd8 │ │ movs r6, r5 │ │ subs r0, r0, r0 │ │ asrs r0, r2, #32 │ │ - b.n ca4d2 │ │ + b.n ca4e2 │ │ tst r0, r7 │ │ - b.n ca4d2 │ │ + b.n ca4e2 │ │ movs r6, r0 │ │ - b.n cacf6 │ │ + b.n cad06 │ │ add r6, sp, #64 @ 0x40 │ │ @ instruction: 0xebff0080 │ │ - b.n caabe │ │ + b.n caace │ │ lsls r0, r0, #4 │ │ - b.n caace │ │ + b.n caade │ │ movs r0, r2 │ │ - b.n ca4e6 │ │ + b.n ca4f6 │ │ ands r4, r0 │ │ - b.n ca3ca │ │ + b.n ca3da │ │ movs r5, r4 │ │ and.w r0, r0, sl, lsl #4 │ │ - b.n cad12 │ │ - cbnz r1, caa2e │ │ + b.n cad22 │ │ + cbnz r1, caa3e │ │ @ instruction: 0xebff0000 │ │ - b.n cb07a │ │ + b.n cb08a │ │ strb r0, [r1, #0] │ │ - b.n cad1e │ │ + b.n cad2e │ │ lsls r2, r3, #10 │ │ subs r0, r0, r0 │ │ lsls r5, r2, #3 │ │ - b.n cad98 │ │ + b.n cada8 │ │ asrs r4, r5, #32 │ │ - b.n ca524 │ │ + b.n ca534 │ │ strh r0, [r0, #8] │ │ - b.n ca910 │ │ + b.n ca920 │ │ lsls r0, r0, #2 │ │ - b.n cab04 │ │ + b.n cab14 │ │ asrs r5, r2, #3 │ │ - b.n cadaa │ │ + b.n cadba │ │ lsls r4, r7, #30 │ │ - b.n cad9a │ │ + b.n cadaa │ │ movs r0, #20 │ │ - b.n caf0e │ │ + b.n caf1e │ │ str r1, [r0, r4] │ │ - b.n ca92c │ │ + b.n ca93c │ │ asrs r1, r0, #2 │ │ - b.n cab1a │ │ + b.n cab2a │ │ lsls r0, r0, #2 │ │ - b.n cab0e │ │ + b.n cab1e │ │ asrs r4, r7, #30 │ │ - b.n cadb0 │ │ + b.n cadc0 │ │ lsls r0, r6, #2 │ │ - b.n cadb2 │ │ + b.n cadc2 │ │ movs r0, r0 │ │ - b.n ca97a │ │ + b.n ca98a │ │ movs r4, r7 │ │ - b.n ca534 │ │ + b.n ca544 │ │ adds r0, #8 │ │ - b.n caf22 │ │ + b.n caf32 │ │ lsls r6, r6, #2 │ │ - b.n cadc6 │ │ + b.n cadd6 │ │ movs r4, r4 │ │ - b.n ca43c │ │ + b.n ca44c │ │ movs r0, r0 │ │ - b.n cab30 │ │ + b.n cab40 │ │ adds r0, #40 @ 0x28 │ │ - b.n ca444 │ │ + b.n ca454 │ │ movs r0, r7 │ │ - b.n ca54c │ │ + b.n ca55c │ │ adds r0, #56 @ 0x38 │ │ - b.n caf50 │ │ + b.n caf60 │ │ movs r4, r0 │ │ - b.n ca5de │ │ + b.n ca5ee │ │ movs r0, #40 @ 0x28 │ │ - b.n caed4 │ │ + b.n caee4 │ │ movs r0, r0 │ │ - b.n ca55c │ │ + b.n ca56c │ │ movs r2, r1 │ │ - b.n cad86 │ │ + b.n cad96 │ │ vmov.s16 lr, d31[3] │ │ movs r0, r0 │ │ - b.n cb0ee │ │ + b.n cb0fe │ │ lsls r7, r1, #7 │ │ lsrs r0, r0, #8 │ │ lsls r5, r7, #9 │ │ and.w r0, r0, sl, lsl #4 │ │ - b.n cad9a │ │ - cbnz r7, caaac │ │ + b.n cadaa │ │ + cbnz r7, caabc │ │ @ instruction: 0xebff0000 │ │ - b.n cb102 │ │ + b.n cb112 │ │ lsls r1, r7, #9 │ │ subs r0, r0, r0 │ │ lsls r5, r2, #3 │ │ - b.n cae1c │ │ + b.n cae2c │ │ asrs r5, r2, #3 │ │ - b.n cae22 │ │ + b.n cae32 │ │ strb r0, [r2, #0] │ │ - b.n ca5a6 │ │ + b.n ca5b6 │ │ strh r0, [r0, #8] │ │ - b.n ca9a6 │ │ + b.n ca9b6 │ │ lsls r0, r0, #2 │ │ - b.n cab8c │ │ + b.n cab9c │ │ str r1, [r0, r4] │ │ - b.n ca9a8 │ │ + b.n ca9b8 │ │ lsls r4, r7, #30 │ │ - b.n cae22 │ │ + b.n cae32 │ │ movs r0, #184 @ 0xb8 │ │ - b.n cae36 │ │ + b.n cae46 │ │ movs r0, #36 @ 0x24 │ │ - b.n ca4a0 │ │ + b.n ca4b0 │ │ lsls r6, r7 │ │ - b.n cae38 │ │ + b.n cae48 │ │ strh r2, [r2, #4] │ │ - b.n caad8 │ │ + b.n caae8 │ │ lsls r1, r0, #2 │ │ - b.n cabaa │ │ + b.n cabba │ │ str r4, [r0, #0] │ │ - b.n ca5c8 │ │ + b.n ca5d8 │ │ asrs r4, r7, #2 │ │ - b.n cae48 │ │ + b.n cae58 │ │ lsls r4, r7, #30 │ │ - b.n cae42 │ │ + b.n cae52 │ │ movs r0, #6 │ │ - b.n cab2e │ │ + b.n cab3e │ │ strb r4, [r2, #0] │ │ - b.n cafb0 │ │ + b.n cafc0 │ │ adds r0, #2 │ │ - b.n cafb2 │ │ + b.n cafc2 │ │ movs r0, #2 │ │ - b.n cafb4 │ │ + b.n cafc4 │ │ strb r0, [r5, #0] │ │ - b.n ca4cc │ │ + b.n ca4dc │ │ movs r3, r0 │ │ - b.n cad5e │ │ + b.n cad6e │ │ lsls r7, r2, #14 │ │ ldmia r2!, {} │ │ lsls r0, r7 │ │ - b.n cae6c │ │ + b.n cae7c │ │ lsls r1, r4, #2 │ │ - b.n cad66 │ │ + b.n cad76 │ │ adds r0, #190 @ 0xbe │ │ - b.n cae54 │ │ + b.n cae64 │ │ movs r0, #188 @ 0xbc │ │ - b.n cae58 │ │ + b.n cae68 │ │ str r4, [r2, r2] │ │ - b.n cab1a │ │ + b.n cab2a │ │ ands r4, r2 │ │ - b.n cafde │ │ + b.n cafee │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ asrs r1, r4, #2 │ │ - b.n cae1e │ │ + b.n cae2e │ │ movs r0, r0 │ │ - b.n cab64 │ │ + b.n cab74 │ │ asrs r4, r0, #32 │ │ - b.n cae26 │ │ + b.n cae36 │ │ lsls r0, r2, #26 │ │ - b.n caaee │ │ + b.n caafe │ │ movs r6, r0 │ │ - b.n cabf6 │ │ - cmp r1, #197 @ 0xc5 │ │ + b.n cac06 │ │ + cmp r2, #5 │ │ mla r0, r0, r4, r0 │ │ - b.n cae36 │ │ + b.n cae46 │ │ asrs r7, r0, #32 │ │ - b.n cae3a │ │ + b.n cae4a │ │ movs r0, #6 │ │ - b.n cae3e │ │ - cmp r2, #48 @ 0x30 │ │ + b.n cae4e │ │ + cmp r1, #245 @ 0xf5 │ │ @ instruction: 0xfb007024 │ │ - b.n ca640 │ │ + b.n ca650 │ │ lsls r1, r4, #6 │ │ and.w r0, r0, r4, lsr #8 │ │ - b.n cb010 │ │ + b.n cb020 │ │ asrs r0, r1, #32 │ │ - b.n cb014 │ │ + b.n cb024 │ │ asrs r0, r6, #2 │ │ - b.n caeb8 │ │ + b.n caec8 │ │ movs r5, r0 │ │ - b.n ca6ac │ │ + b.n ca6bc │ │ movs r0, r0 │ │ - b.n cb25e │ │ + b.n cb26e │ │ lsls r0, r6, #2 │ │ - b.n caea8 │ │ + b.n caeb8 │ │ movs r0, #40 @ 0x28 │ │ - b.n ca53c │ │ + b.n ca54c │ │ asrs r4, r4, #32 │ │ - b.n ca540 │ │ + b.n ca550 │ │ lsls r2, r7, #2 │ │ - b.n caed8 │ │ + b.n caee8 │ │ movs r1, r0 │ │ - b.n cb152 │ │ + b.n cb162 │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ lsrs r0, r5, #24 │ │ - b.n ca678 │ │ + b.n ca688 │ │ movs r0, r0 │ │ - b.n cac5c │ │ + b.n cac6c │ │ lsls r2, r3, #1 │ │ - b.n ca6e2 │ │ + b.n ca6f2 │ │ movs r0, r0 │ │ - b.n cb1e6 │ │ + b.n cb1f6 │ │ lsls r6, r4, #13 │ │ subs r0, r0, r0 │ │ movs r4, r1 │ │ - b.n ca680 │ │ + b.n ca690 │ │ asrs r4, r0, #32 │ │ - b.n ca672 │ │ + b.n ca682 │ │ asrs r2, r0, #32 │ │ - b.n cb258 │ │ + b.n cb268 │ │ asrs r4, r0, #32 │ │ - b.n ca65a │ │ + b.n ca66a │ │ lsls r6, r7, #30 │ │ - b.n cb16e │ │ + b.n cb17e │ │ lsrs r7, r7, #31 │ │ - b.n cb200 │ │ + b.n cb210 │ │ movs r7, r0 │ │ - b.n cb066 │ │ - beq.n caba0 │ │ - b.n cb000 │ │ + b.n cb076 │ │ + beq.n cabb0 │ │ + b.n cb010 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r2, r4, r6, r7, pc} │ │ - b.n caf26 │ │ + b.n caf36 │ │ str r4, [r7, #4] │ │ - b.n cb08a │ │ + b.n cb09a │ │ stmia r0!, {r3, r4, r5, r6} │ │ - b.n ca958 │ │ + b.n ca968 │ │ lsls r0, r1, #2 │ │ - b.n cac8a │ │ + b.n cac9a │ │ ands r4, r4 │ │ - b.n ca69c │ │ + b.n ca6ac │ │ str r0, [r3, #0] │ │ - b.n ca6a0 │ │ + b.n ca6b0 │ │ lsls r0, r6, #2 │ │ - b.n caf2a │ │ + b.n caf3a │ │ movs r0, r0 │ │ - b.n cb22e │ │ + b.n cb23e │ │ movs r4, r5 │ │ lsrs r0, r0, #8 │ │ movs r4, r1 │ │ - b.n ca6ca │ │ + b.n ca6da │ │ asrs r1, r0, #32 │ │ - b.n cb09c │ │ + b.n cb0ac │ │ adds r0, #1 │ │ - b.n cb320 │ │ + b.n cb330 │ │ asrs r0, r1, #32 │ │ - b.n cb0a8 │ │ + b.n cb0b8 │ │ movs r0, #64 @ 0x40 │ │ - b.n ca6c6 │ │ + b.n ca6d6 │ │ movs r4, #190 @ 0xbe │ │ - b.n caf4e │ │ + b.n caf5e │ │ movs r2, r0 │ │ - b.n cae50 │ │ + b.n cae60 │ │ lsls r7, r2, #13 │ │ ldrh r0, [r0, #16] │ │ asrs r4, r7, #2 │ │ - b.n caf64 │ │ + b.n caf74 │ │ movs r0, #190 @ 0xbe │ │ - b.n caf68 │ │ + b.n caf78 │ │ str r0, [r5, r0] │ │ - b.n ca6f8 │ │ + b.n ca708 │ │ strh r4, [r5, #0] │ │ - b.n ca6fc │ │ + b.n ca70c │ │ asrs r1, r0, #32 │ │ - b.n cac4a │ │ + b.n cac5a │ │ movs r0, #10 │ │ - b.n cb0d0 │ │ + b.n cb0e0 │ │ movs r1, r0 │ │ - b.n cae72 │ │ + b.n cae82 │ │ lsls r2, r3, #13 │ │ ldrh r0, [r0, #16] │ │ movs r0, #213 @ 0xd5 │ │ - b.n caf88 │ │ + b.n caf98 │ │ asrs r4, r1, #32 │ │ - b.n ca70c │ │ + b.n ca71c │ │ movs r1, #2 │ │ - b.n cab0e │ │ + b.n cab1e │ │ ands r0, r7 │ │ - b.n ca704 │ │ + b.n ca714 │ │ adds r0, #60 @ 0x3c │ │ - b.n ca708 │ │ + b.n ca718 │ │ strb r0, [r0, #0] │ │ - b.n ca70e │ │ + b.n ca71e │ │ str r4, [r0, #0] │ │ - b.n ca712 │ │ + b.n ca722 │ │ strb r4, [r0, #0] │ │ - b.n cac40 │ │ + b.n cac50 │ │ adds r0, #3 │ │ - b.n cac42 │ │ + b.n cac52 │ │ adds r0, #3 │ │ - b.n caf28 │ │ + b.n caf38 │ │ movs r3, r4 │ │ subs r0, r0, r0 │ │ str r0, [r0, #36] @ 0x24 │ │ - b.n ca724 │ │ + b.n ca734 │ │ movs r0, r0 │ │ - b.n cb2b2 │ │ + b.n cb2c2 │ │ movs r6, r4 │ │ lsrs r0, r0, #8 │ │ adds r0, #186 @ 0xba │ │ - b.n cafb2 │ │ + b.n cafc2 │ │ lsls r0, r0, #1 │ │ - b.n cb238 │ │ + b.n cb248 │ │ movs r3, r4 │ │ subs r0, r0, r0 │ │ strb r0, [r7, #8] │ │ - b.n ca73c │ │ + b.n ca74c │ │ ands r0, r0 │ │ - b.n caf5e │ │ + b.n caf6e │ │ asrs r0, r2, #32 │ │ - b.n ca746 │ │ + b.n ca756 │ │ movs r6, r0 │ │ - b.n caf66 │ │ + b.n caf76 │ │ add r5, sp, #464 @ 0x1d0 │ │ @ instruction: 0xebff1000 │ │ - b.n caf6e │ │ + b.n caf7e │ │ movs r4, r0 │ │ - b.n caf72 │ │ + b.n caf82 │ │ asrs r1, r0, #2 │ │ - b.n cad38 │ │ + b.n cad48 │ │ asrs r1, r0, #4 │ │ - b.n cad46 │ │ + b.n cad56 │ │ asrs r0, r2, #32 │ │ - b.n ca760 │ │ + b.n ca770 │ │ strb r4, [r0, #0] │ │ - b.n ca644 │ │ + b.n ca654 │ │ movs r7, r2 │ │ and.w r0, r0, r8, lsr #11 │ │ - b.n cafde │ │ + b.n cafee │ │ movs r0, r0 │ │ - b.n cb38e │ │ + b.n cb39e │ │ asrs r4, r0, #32 │ │ - b.n ca806 │ │ + b.n ca816 │ │ str r0, [r0, #8] │ │ - b.n cb396 │ │ + b.n cb3a6 │ │ lsls r0, r5, #3 │ │ - b.n ca774 │ │ + b.n ca784 │ │ movs r1, r0 │ │ - b.n cb280 │ │ + b.n cb290 │ │ lsls r4, r4, #3 │ │ - b.n ca77c │ │ + b.n ca78c │ │ lsls r0, r2, #1 │ │ - b.n ca780 │ │ + b.n ca790 │ │ lsls r4, r1, #1 │ │ - b.n ca784 │ │ + b.n ca794 │ │ lsls r0, r1, #1 │ │ - b.n ca788 │ │ + b.n ca798 │ │ str r6, [r7, #0] │ │ - b.n ca80c │ │ + b.n ca81c │ │ lsls r4, r7, #14 │ │ - b.n cb010 │ │ + b.n cb020 │ │ adds r0, #68 @ 0x44 │ │ - b.n ca794 │ │ + b.n ca7a4 │ │ movs r0, #64 @ 0x40 │ │ - b.n ca798 │ │ + b.n ca7a8 │ │ strb r0, [r2, #0] │ │ - b.n ca79c │ │ + b.n ca7ac │ │ movs r2, r5 │ │ subs r0, r0, r0 │ │ strb r0, [r7, #0] │ │ - b.n cb1a4 │ │ + b.n cb1b4 │ │ movs r0, r6 │ │ and.w r0, r0, r1 │ │ - b.n cafd2 │ │ + b.n cafe2 │ │ asrs r1, r1, #32 │ │ - b.n cafd6 │ │ + b.n cafe6 │ │ hlt 0x0038 │ │ @ instruction: 0xebff0000 │ │ - b.n cb33e │ │ + b.n cb34e │ │ lsls r2, r5, #7 │ │ subs r0, r0, r0 │ │ movs r4, r1 │ │ - b.n ca7da │ │ + b.n ca7ea │ │ asrs r5, r2, #3 │ │ - b.n cb05e │ │ + b.n cb06e │ │ ands r0, r7 │ │ - b.n ca7ce │ │ + b.n ca7de │ │ movs r1, #1 │ │ - b.n cabdc │ │ + b.n cabec │ │ asrs r4, r7, #32 │ │ - b.n ca7d6 │ │ + b.n ca7e6 │ │ adds r0, #0 │ │ - b.n ca7de │ │ + b.n ca7ee │ │ strb r4, [r0, #0] │ │ - b.n ca7e2 │ │ + b.n ca7f2 │ │ adds r0, #4 │ │ - b.n cad08 │ │ + b.n cad18 │ │ asrs r1, r0, #32 │ │ - b.n cad14 │ │ + b.n cad24 │ │ asrs r1, r0, #32 │ │ - b.n caff0 │ │ + b.n cb000 │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ str r0, [r0, #36] @ 0x24 │ │ - b.n ca7f2 │ │ + b.n ca802 │ │ movs r0, r0 │ │ - b.n cb382 │ │ + b.n cb392 │ │ movs r7, r1 │ │ lsrs r0, r0, #8 │ │ asrs r2, r7, #2 │ │ - b.n cb082 │ │ + b.n cb092 │ │ lsls r0, r0, #1 │ │ - b.n cb304 │ │ + b.n cb314 │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ asrs r0, r2, #32 │ │ - b.n ca80e │ │ + b.n ca81e │ │ tst r0, r7 │ │ - b.n ca80e │ │ + b.n ca81e │ │ movs r6, r0 │ │ - b.n cb032 │ │ + b.n cb042 │ │ add r5, sp, #260 @ 0x104 │ │ @ instruction: 0xebff0080 │ │ - b.n cadfa │ │ + b.n cae0a │ │ lsls r0, r0, #4 │ │ - b.n cae0a │ │ + b.n cae1a │ │ movs r0, r2 │ │ - b.n ca822 │ │ + b.n ca832 │ │ ands r4, r0 │ │ - b.n ca706 │ │ + b.n ca716 │ │ movs r3, r0 │ │ and.w r0, r0, sl, lsl #4 │ │ - b.n cb04e │ │ + b.n cb05e │ │ hlt 0x001a │ │ @ instruction: 0xebff0000 │ │ - b.n cb3b6 │ │ + b.n cb3c6 │ │ lsls r4, r1, #7 │ │ subs r0, r0, r0 │ │ adds r0, #213 @ 0xd5 │ │ - b.n cb0d2 │ │ + b.n cb0e2 │ │ asrs r5, r2, #3 │ │ - b.n cb0d4 │ │ + b.n cb0e4 │ │ lsls r3, r0, #4 │ │ - b.n cac50 │ │ + b.n cac60 │ │ strh r1, [r0, #8] │ │ - b.n cac5a │ │ + b.n cac6a │ │ ands r0, r0 │ │ - b.n cb06e │ │ + b.n cb07e │ │ lsls r3, r2, #3 │ │ and.w r1, r0, r0, asr #2 │ │ - b.n ca850 │ │ + b.n ca860 │ │ lsls r4, r3, #6 │ │ - b.n ca854 │ │ + b.n ca864 │ │ lsls r0, r1, #4 │ │ - b.n ca858 │ │ + b.n ca868 │ │ movs r0, r7 │ │ - b.n cb25c │ │ + b.n cb26c │ │ strb r0, [r7, #2] │ │ - b.n cb246 │ │ + b.n cb256 │ │ adds r0, #252 @ 0xfc │ │ - b.n ca864 │ │ + b.n ca874 │ │ movs r0, #248 @ 0xf8 │ │ - b.n ca868 │ │ + b.n ca878 │ │ strb r0, [r2, #1] │ │ - b.n ca86c │ │ + b.n ca87c │ │ lsls r0, r2, #7 │ │ - b.n cb0ea │ │ + b.n cb0fa │ │ movs r0, #180 @ 0xb4 │ │ - b.n cb10e │ │ + b.n cb11e │ │ adds r0, #6 │ │ - b.n ca912 │ │ + b.n ca922 │ │ lsls r0, r6, #7 │ │ - b.n cb0f0 │ │ + b.n cb100 │ │ lsls r4, r7, #1 │ │ - b.n caac4 │ │ + b.n caad4 │ │ movs r0, r0 │ │ - b.n cb40a │ │ + b.n cb41a │ │ adds r0, #6 │ │ - b.n ca8fc │ │ + b.n ca90c │ │ strb r4, [r2, #0] │ │ - b.n ca88c │ │ + b.n ca89c │ │ movs r0, #180 @ 0xb4 │ │ - b.n cb104 │ │ + b.n cb114 │ │ stmia r0!, {r2, r3} │ │ - b.n ca894 │ │ + b.n ca8a4 │ │ movs r1, r5 │ │ - ldr r2, [pc, #0] @ (cad7c ) │ │ + ldr r2, [pc, #0] @ (cad8c ) │ │ stmia r0!, {r0} │ │ - b.n cb292 │ │ + b.n cb2a2 │ │ movs r0, r0 │ │ - b.n cb4c6 │ │ + b.n cb4d6 │ │ movs r4, r0 │ │ - b.n cb442 │ │ - b.n cad8c │ │ - b.n cb4ce │ │ + b.n cb452 │ │ + b.n cad9c │ │ + b.n cb4de │ │ movs r2, r2 │ │ subs r2, #0 │ │ - b.n cad9a │ │ - b.n cb52e │ │ + b.n cadaa │ │ + b.n cb53e │ │ str r4, [r2, #0] │ │ - b.n ca8d4 │ │ + b.n ca8e4 │ │ adds r0, #28 │ │ - b.n cb4de │ │ + b.n cb4ee │ │ movs r0, #124 @ 0x7c │ │ - b.n cb4e2 │ │ + b.n cb4f2 │ │ asrs r6, r1, #32 │ │ - b.n cb0e6 │ │ + b.n cb0f6 │ │ ands r3, r0 │ │ - b.n caebe │ │ + b.n caece │ │ asrs r4, r0, #32 │ │ - b.n cb250 │ │ + b.n cb260 │ │ lsrs r7, r1, #10 │ │ orn r0, r4, #33280 @ 0x8200 │ │ - b.n caeca │ │ + b.n caeda │ │ movs r7, #79 @ 0x4f │ │ orn r0, r4, #33536 @ 0x8300 │ │ - b.n caeca │ │ + b.n caeda │ │ adds r0, #16 │ │ - b.n cb2c8 │ │ + b.n cb2d8 │ │ lsrs r7, r1, #10 │ │ orr.w r0, r4, #33280 @ 0x8200 │ │ - b.n caed6 │ │ + b.n caee6 │ │ movs r0, #8 │ │ - b.n cb2d2 │ │ + b.n cb2e2 │ │ movs r7, #79 @ 0x4f │ │ - bl ffd0fdb8 │ │ + bl ffd0fdc8 │ │ subs r7, r7, r3 │ │ movs r6, r1 │ │ - b.n cb092 │ │ + b.n cb0a2 │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ asrs r7, r0, #32 │ │ - b.n cb2fe │ │ + b.n cb30e │ │ movs r0, #20 │ │ - b.n ca920 │ │ + b.n ca930 │ │ str r6, [r7, #0] │ │ - b.n cb306 │ │ + b.n cb316 │ │ ands r6, r1 │ │ - b.n cae7e │ │ + b.n cae8e │ │ stmia r1!, {r0} │ │ - b.n caf06 │ │ + b.n caf16 │ │ adds r1, #1 │ │ - b.n caefa │ │ + b.n caf0a │ │ asrs r6, r0, #2 │ │ - b.n caf0e │ │ + b.n caf1e │ │ str r6, [r0, #8] │ │ - b.n caf02 │ │ + b.n caf12 │ │ ands r1, r0 │ │ - b.n cb30a │ │ + b.n cb31a │ │ strb r0, [r0, #2] │ │ - b.n cad3e │ │ + b.n cad4e │ │ movs r0, #0 │ │ - b.n caf0c │ │ + b.n caf1c │ │ ands r1, r0 │ │ - b.n cb2b6 │ │ + b.n cb2c6 │ │ strb r0, [r0, #2] │ │ - b.n cad18 │ │ + b.n cad28 │ │ strb r0, [r0, #0] │ │ - b.n caf22 │ │ + b.n caf32 │ │ movs r2, r0 │ │ - b.n cb31a │ │ + b.n cb32a │ │ movs r0, #176 @ 0xb0 │ │ - b.n cb1c2 │ │ + b.n cb1d2 │ │ movs r0, #176 @ 0xb0 │ │ - b.n cb1b0 │ │ + b.n cb1c0 │ │ @ instruction: 0xfff61aff │ │ ands r4, r2 │ │ - b.n ca964 │ │ + b.n ca974 │ │ movs r4, r0 │ │ - b.n cb16e │ │ + b.n cb17e │ │ lsls r0, r2, #11 │ │ add.w r0, r0, r0 │ │ - b.n cb4d6 │ │ + b.n cb4e6 │ │ lsls r4, r0, #6 │ │ subs r0, r0, r0 │ │ lsls r5, r2, #3 │ │ - b.n cb1e6 │ │ + b.n cb1f6 │ │ stmia r0!, {r2, r3, r4} │ │ - b.n cb34a │ │ + b.n cb35a │ │ strb r0, [r2, #0] │ │ - b.n ca980 │ │ + b.n ca990 │ │ lsls r0, r0, #4 │ │ - b.n cad82 │ │ + b.n cad92 │ │ asrs r2, r7, #2 │ │ - b.n cb1ee │ │ + b.n cb1fe │ │ movs r2, r0 │ │ - b.n cb474 │ │ + b.n cb484 │ │ vpmin.u q0, , │ │ movs r0, r4 │ │ - b.n cb47c │ │ + b.n cb48c │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ asrs r4, r6, #6 │ │ - b.n cb242 │ │ + b.n cb252 │ │ movs r1, r0 │ │ - b.n caf66 │ │ + b.n caf76 │ │ asrs r0, r1, #32 │ │ - b.n cb36a │ │ + b.n cb37a │ │ movs r6, r0 │ │ - b.n cb36e │ │ + b.n cb37e │ │ movs r1, r0 │ │ and.w r0, r0, r4, lsr #4 │ │ - b.n cb376 │ │ + b.n cb386 │ │ movs r0, r1 │ │ - b.n cb37a │ │ + b.n cb38a │ │ str r0, [r6, r2] │ │ - b.n cb21e │ │ + b.n cb22e │ │ str r0, [r1, #8] │ │ - b.n caf8a │ │ + b.n caf9a │ │ adds r0, #12 │ │ - b.n ca9c0 │ │ + b.n ca9d0 │ │ movs r4, r1 │ │ - b.n ca9be │ │ + b.n ca9ce │ │ adds r0, #5 │ │ - b.n caa16 │ │ + b.n caa26 │ │ adds r0, #4 │ │ - b.n cb1d2 │ │ + b.n cb1e2 │ │ ands r0, r0 │ │ - b.n cb5d6 │ │ + b.n cb5e6 │ │ movs r0, #36 @ 0x24 │ │ - b.n ca8d0 │ │ + b.n ca8e0 │ │ blxns r7 │ │ - b.n cb22a │ │ + b.n cb23a │ │ asrs r0, r6, #32 │ │ - b.n ca9bc │ │ + b.n ca9cc │ │ movs r0, #1 │ │ - b.n cb3aa │ │ + b.n cb3ba │ │ asrs r0, r0, #1 │ │ - b.n ca9ca │ │ + b.n ca9da │ │ str r1, [r0, #0] │ │ - b.n cb632 │ │ - b.n caf00 │ │ - b.n ca9ec │ │ + b.n cb642 │ │ + b.n caf10 │ │ + b.n ca9fc │ │ str r4, [r6, r0] │ │ - b.n ca9d0 │ │ + b.n ca9e0 │ │ movs r4, #190 @ 0xbe │ │ - b.n cb25c │ │ + b.n cb26c │ │ asrs r0, r1, #32 │ │ - b.n cb3ca │ │ + b.n cb3da │ │ movs r2, r0 │ │ - b.n cb164 │ │ + b.n cb174 │ │ lsls r2, r2, #10 │ │ ldrh r0, [r0, #16] │ │ asrs r5, r2, #3 │ │ - b.n cb270 │ │ + b.n cb280 │ │ adds r0, #190 @ 0xbe │ │ - b.n cb27c │ │ + b.n cb28c │ │ strh r4, [r5, #0] │ │ - b.n caa0c │ │ + b.n caa1c │ │ asrs r1, r0, #4 │ │ - b.n cae0e │ │ + b.n cae1e │ │ movs r1, #180 @ 0xb4 │ │ - b.n cb27c │ │ + b.n cb28c │ │ asrs r2, r0, #32 │ │ - b.n cafe0 │ │ + b.n caff0 │ │ movs r0, #188 @ 0xbc │ │ - b.n cb290 │ │ + b.n cb2a0 │ │ strb r1, [r0, #0] │ │ - b.n cb3f0 │ │ + b.n cb400 │ │ asrs r2, r7, #6 │ │ - b.n cb28c │ │ + b.n cb29c │ │ strb r1, [r0, #0] │ │ - b.n cb67c │ │ + b.n cb68c │ │ strb r7, [r0, #0] │ │ - b.n caffe │ │ + b.n cb00e │ │ movs r0, #2 │ │ - b.n caf7c │ │ + b.n caf8c │ │ asrs r1, r0, #32 │ │ - b.n cb3fc │ │ + b.n cb40c │ │ asrs r1, r0, #32 │ │ - b.n cb680 │ │ + b.n cb690 │ │ asrs r1, r0, #32 │ │ - b.n caf90 │ │ + b.n cafa0 │ │ asrs r2, r1, #32 │ │ - b.n cb408 │ │ + b.n cb418 │ │ movs r2, r0 │ │ - b.n cb1ac │ │ + b.n cb1bc │ │ lsls r3, r1, #10 │ │ ldmia r2!, {} │ │ movs r0, #213 @ 0xd5 │ │ - b.n cb2c4 │ │ + b.n cb2d4 │ │ str r6, [r1, r0] │ │ - b.n cb256 │ │ + b.n cb266 │ │ asrs r4, r1, #32 │ │ - b.n caa4c │ │ + b.n caa5c │ │ movs r1, #2 │ │ - b.n cae4e │ │ + b.n cae5e │ │ ands r0, r7 │ │ - b.n caa44 │ │ + b.n caa54 │ │ adds r0, #60 @ 0x3c │ │ - b.n caa48 │ │ + b.n caa58 │ │ strb r0, [r0, #0] │ │ - b.n caa4e │ │ + b.n caa5e │ │ str r4, [r0, #0] │ │ - b.n caa52 │ │ + b.n caa62 │ │ strb r4, [r0, #0] │ │ - b.n caf80 │ │ + b.n caf90 │ │ adds r0, #3 │ │ - b.n caf82 │ │ + b.n caf92 │ │ adds r0, #3 │ │ - b.n cb268 │ │ + b.n cb278 │ │ movs r3, r2 │ │ subs r0, r0, r0 │ │ strb r0, [r0, #9] │ │ - b.n caa64 │ │ + b.n caa74 │ │ str r4, [r2, #0] │ │ - b.n caa80 │ │ + b.n caa90 │ │ movs r0, r0 │ │ - b.n cb5f8 │ │ + b.n cb608 │ │ movs r6, r2 │ │ lsrs r0, r0, #8 │ │ adds r0, #186 @ 0xba │ │ - b.n cb2f6 │ │ + b.n cb306 │ │ lsls r0, r0, #1 │ │ - b.n cb57c │ │ + b.n cb58c │ │ movs r3, r2 │ │ subs r0, r0, r0 │ │ str r0, [r7, #32] │ │ - b.n caa80 │ │ + b.n caa90 │ │ ands r0, r0 │ │ - b.n cb2a2 │ │ + b.n cb2b2 │ │ asrs r0, r2, #32 │ │ - b.n caa8a │ │ + b.n caa9a │ │ movs r7, r0 │ │ - b.n cb2aa │ │ + b.n cb2ba │ │ add r4, sp, #652 @ 0x28c │ │ @ instruction: 0xebff1000 │ │ - b.n cb2b2 │ │ + b.n cb2c2 │ │ movs r4, r0 │ │ - b.n cb2b6 │ │ + b.n cb2c6 │ │ asrs r1, r0, #2 │ │ - b.n cb07c │ │ + b.n cb08c │ │ asrs r1, r0, #4 │ │ - b.n cb08c │ │ + b.n cb09c │ │ asrs r0, r2, #32 │ │ - b.n caaa4 │ │ + b.n caab4 │ │ str r4, [r0, #0] │ │ - b.n ca988 │ │ + b.n ca998 │ │ str r4, [r2, #0] │ │ - b.n caac4 │ │ + b.n caad4 │ │ movs r6, r0 │ │ and.w r0, r0, r1 │ │ - b.n cb2d2 │ │ + b.n cb2e2 │ │ asrs r1, r1, #32 │ │ - b.n cb2d6 │ │ - cbnz r0, cafd6 │ │ + b.n cb2e6 │ │ + cbnz r0, cafe6 │ │ @ instruction: 0xebff6014 │ │ - b.n caad8 │ │ + b.n caae8 │ │ movs r0, r0 │ │ - b.n cb642 │ │ + b.n cb652 │ │ lsls r1, r5, #4 │ │ subs r0, r0, r0 │ │ movs r4, r1 │ │ - b.n caade │ │ + b.n caaee │ │ asrs r5, r2, #3 │ │ - b.n cb362 │ │ + b.n cb372 │ │ ands r0, r7 │ │ - b.n caad2 │ │ + b.n caae2 │ │ movs r1, #1 │ │ - b.n caee0 │ │ + b.n caef0 │ │ asrs r4, r7, #32 │ │ - b.n caada │ │ + b.n caaea │ │ adds r0, #0 │ │ - b.n caae2 │ │ + b.n caaf2 │ │ strb r4, [r0, #0] │ │ - b.n caae6 │ │ + b.n caaf6 │ │ adds r0, #4 │ │ - b.n cb00c │ │ + b.n cb01c │ │ asrs r1, r0, #32 │ │ - b.n cb018 │ │ + b.n cb028 │ │ asrs r1, r0, #32 │ │ - b.n cb2f4 │ │ + b.n cb304 │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ strb r0, [r0, #9] │ │ - b.n caaf6 │ │ + b.n cab06 │ │ movs r0, r0 │ │ - b.n cb688 │ │ + b.n cb698 │ │ movs r7, r1 │ │ lsrs r0, r0, #8 │ │ asrs r2, r7, #2 │ │ - b.n cb386 │ │ + b.n cb396 │ │ lsls r0, r0, #1 │ │ - b.n cb608 │ │ + b.n cb618 │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ asrs r0, r2, #32 │ │ - b.n cab12 │ │ + b.n cab22 │ │ tst r0, r7 │ │ - b.n cab12 │ │ + b.n cab22 │ │ movs r7, r0 │ │ - b.n cb336 │ │ + b.n cb346 │ │ add r4, sp, #512 @ 0x200 │ │ @ instruction: 0xebff0080 │ │ - b.n cb0fe │ │ + b.n cb10e │ │ lsls r0, r0, #4 │ │ - b.n cb110 │ │ + b.n cb120 │ │ movs r0, r2 │ │ - b.n cab26 │ │ + b.n cab36 │ │ ands r4, r0 │ │ - b.n caa0a │ │ + b.n caa1a │ │ movs r3, r0 │ │ and.w r0, r0, sl, lsl #4 │ │ - b.n cb352 │ │ - cbnz r1, cb04a │ │ + b.n cb362 │ │ + cbnz r1, cb05a │ │ @ instruction: 0xebff0000 │ │ - b.n cb6ba │ │ + b.n cb6ca │ │ lsls r3, r1, #4 │ │ subs r0, r0, r0 │ │ lsls r0, r3, #3 │ │ - b.n cb3ae │ │ + b.n cb3be │ │ adds r0, #76 @ 0x4c │ │ - b.n cab48 │ │ + b.n cab58 │ │ movs r0, #213 @ 0xd5 │ │ - b.n cb3de │ │ + b.n cb3ee │ │ asrs r4, r2, #1 │ │ - b.n cab50 │ │ + b.n cab60 │ │ movs r3, r0 │ │ - b.n cb0b2 │ │ + b.n cb0c2 │ │ strb r5, [r2, #3] │ │ - b.n cb3e8 │ │ + b.n cb3f8 │ │ asrs r2, r0 │ │ - b.n caf64 │ │ + b.n caf74 │ │ movs r1, #0 │ │ - b.n caf60 │ │ + b.n caf70 │ │ strh r7, [r0, #8] │ │ - b.n caf72 │ │ + b.n caf82 │ │ movs r0, #228 @ 0xe4 │ │ - b.n cab60 │ │ + b.n cab70 │ │ movs r0, #56 @ 0x38 │ │ - b.n cb564 │ │ + b.n cb574 │ │ movs r1, #0 │ │ - b.n caf50 │ │ + b.n caf60 │ │ asrs r0, r6, #32 │ │ - b.n cb56c │ │ + b.n cb57c │ │ movs r6, r0 │ │ - b.n cb396 │ │ - b.n ca878 │ │ + b.n cb3a6 │ │ + b.n ca888 │ │ @ instruction: 0xebff20d8 │ │ - b.n cb3ea │ │ + b.n cb3fa │ │ movs r0, r0 │ │ - b.n cb702 │ │ + b.n cb712 │ │ asrs r4, r1, #1 │ │ - b.n cab8c │ │ + b.n cab9c │ │ adds r0, #84 @ 0x54 │ │ - b.n cab90 │ │ + b.n caba0 │ │ asrs r1, r0, #32 │ │ - b.n cb0f2 │ │ + b.n cb102 │ │ strb r4, [r4, #3] │ │ - b.n cabac │ │ + b.n cabbc │ │ strb r1, [r0, #4] │ │ - b.n caf7c │ │ + b.n caf8c │ │ lsls r4, r6, #3 │ │ subs r0, r0, r0 │ │ adds r0, #213 @ 0xd5 │ │ - b.n cb432 │ │ + b.n cb442 │ │ lsls r3, r0, #4 │ │ - b.n cafac │ │ + b.n cafbc │ │ strb r4, [r1, #0] │ │ - b.n cabba │ │ + b.n cabca │ │ asrs r4, r4, #32 │ │ - b.n caac0 │ │ + b.n caad0 │ │ ands r4, r5 │ │ - b.n caba8 │ │ + b.n cabb8 │ │ movs r0, #64 @ 0x40 │ │ - b.n cabc0 │ │ + b.n cabd0 │ │ asrs r1, r0, #32 │ │ - b.n cb598 │ │ + b.n cb5a8 │ │ asrs r1, r0, #32 │ │ - b.n cb81c │ │ + b.n cb82c │ │ asrs r0, r1, #32 │ │ - b.n cb5a0 │ │ + b.n cb5b0 │ │ movs r4, #190 @ 0xbe │ │ - b.n cb446 │ │ + b.n cb456 │ │ movs r2, r0 │ │ - b.n cb348 │ │ + b.n cb358 │ │ lsls r1, r3, #8 │ │ ldrh r0, [r0, #16] │ │ movs r0, #190 @ 0xbe │ │ - b.n cb44e │ │ + b.n cb45e │ │ str r4, [r7, #8] │ │ - b.n cb452 │ │ + b.n cb462 │ │ asrs r1, r0, #32 │ │ - b.n cb13a │ │ + b.n cb14a │ │ str r2, [r0, r0] │ │ - b.n cb5c6 │ │ + b.n cb5d6 │ │ movs r1, r0 │ │ - b.n cb368 │ │ + b.n cb378 │ │ lsls r1, r4, #8 │ │ ldmia r2!, {} │ │ movs r0, #24 │ │ - b.n cac00 │ │ + b.n cac10 │ │ movs r0, #131 @ 0x83 │ │ - b.n cb1ce │ │ + b.n cb1de │ │ adds r0, #176 @ 0xb0 │ │ - b.n cb472 │ │ + b.n cb482 │ │ lsls r6, r4, #2 │ │ - b.n cb378 │ │ + b.n cb388 │ │ movs r5, r3 │ │ cmp r2, #0 │ │ movs r0, #166 @ 0xa6 │ │ - b.n cb41a │ │ - b.n cb0e2 │ │ - b.n cb162 │ │ + b.n cb42a │ │ + b.n cb0f2 │ │ + b.n cb172 │ │ movs r0, r1 │ │ - b.n cb79e │ │ + b.n cb7ae │ │ movs r1, r0 │ │ cmp r2, #0 │ │ strb r2, [r0, #0] │ │ - b.n cb42a │ │ + b.n cb43a │ │ movs r6, r1 │ │ @ instruction: 0xea00c007 │ │ - b.n cb88e │ │ + b.n cb89e │ │ str r7, [r1, #0] │ │ - b.n cb8b6 │ │ + b.n cb8c6 │ │ strb r4, [r1, #0] │ │ - b.n cb17e │ │ + b.n cb18e │ │ movs r0, #130 @ 0x82 │ │ - b.n cb1fe │ │ + b.n cb20e │ │ ands r6, r0 │ │ - b.n cb606 │ │ + b.n cb616 │ │ movs r0, #12 │ │ - b.n cb446 │ │ + b.n cb456 │ │ stmia r0!, {r3, r5} │ │ - b.n cac24 │ │ + b.n cac34 │ │ stmia r0!, {r1} │ │ - b.n cb596 │ │ + b.n cb5a6 │ │ movs r0, #8 │ │ - b.n cb5b6 │ │ + b.n cb5c6 │ │ lsrs r7, r1, #8 │ │ orn sl, ip, #8781824 @ 0x860000 │ │ - bl ffd1010e │ │ + bl ffd1011e │ │ subs r7, r7, r3 │ │ movs r0, #40 @ 0x28 │ │ - b.n cac5c │ │ + b.n cac6c │ │ movs r2, r0 │ │ - b.n cb3e2 │ │ + b.n cb3f2 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, #135 @ 0x87 │ │ - b.n cb22e │ │ + b.n cb23e │ │ ands r4, r2 │ │ - b.n cb636 │ │ + b.n cb646 │ │ str r4, [r0, #0] │ │ - b.n cb476 │ │ + b.n cb486 │ │ movs r0, #178 @ 0xb2 │ │ - b.n cb426 │ │ + b.n cb436 │ │ strb r1, [r0, #0] │ │ - b.n cb5cc │ │ + b.n cb5dc │ │ movs r0, #176 @ 0xb0 │ │ - b.n cb4ca │ │ + b.n cb4da │ │ movs r3, r0 │ │ - b.n cb3f4 │ │ + b.n cb404 │ │ ands r6, r0 │ │ - b.n cb48a │ │ + b.n cb49a │ │ @ instruction: 0xfff98aff │ │ asrs r6, r7, #2 │ │ - b.n cb4d2 │ │ + b.n cb4e2 │ │ str r4, [r7, r2] │ │ - b.n cb4d6 │ │ + b.n cb4e6 │ │ movs r4, r2 │ │ - b.n cb65a │ │ + b.n cb66a │ │ movs r0, #131 @ 0x83 │ │ - b.n cb25e │ │ + b.n cb26e │ │ asrs r0, r6, #2 │ │ - b.n cb4e6 │ │ + b.n cb4f6 │ │ asrs r1, r6, #1 │ │ - b.n caf64 │ │ + b.n caf74 │ │ movs r0, #28 │ │ - b.n caca4 │ │ + b.n cacb4 │ │ movs r0, #1 │ │ - b.n cb0ae │ │ + b.n cb0be │ │ asrs r0, r0, #32 │ │ - b.n cb8b2 │ │ + b.n cb8c2 │ │ asrs r4, r6, #2 │ │ - b.n cb4f6 │ │ + b.n cb506 │ │ movs r0, #36 @ 0x24 │ │ - b.n cabb0 │ │ + b.n cabc0 │ │ asrs r0, r5, #32 │ │ - b.n cabb4 │ │ + b.n cabc4 │ │ movs r0, #182 @ 0xb6 │ │ - b.n cb502 │ │ + b.n cb512 │ │ movs r0, r1 │ │ - b.n cb686 │ │ - cmp r0, #142 @ 0x8e │ │ + b.n cb696 │ │ + cmp r0, #83 @ 0x53 │ │ @ instruction: 0xfb007024 │ │ - b.n cacc8 │ │ + b.n cacd8 │ │ str r4, [r5, r0] │ │ - b.n caccc │ │ + b.n cacdc │ │ asrs r4, r4, #32 │ │ - b.n cabcc │ │ + b.n cabdc │ │ movs r1, r1 │ │ - b.n cb4da │ │ - b.n caa54 │ │ + b.n cb4ea │ │ + b.n caa64 │ │ @ instruction: 0xebff00d8 │ │ - b.n cb534 │ │ + b.n cb544 │ │ movs r0, r0 │ │ - b.n cb854 │ │ + b.n cb864 │ │ movs r0, #76 @ 0x4c │ │ - b.n caccc │ │ + b.n cacdc │ │ asrs r4, r2, #1 │ │ - b.n cacd0 │ │ + b.n cace0 │ │ movs r2, r0 │ │ - b.n cb232 │ │ + b.n cb242 │ │ lsls r0, r0, #4 │ │ - b.n cb0d8 │ │ + b.n cb0e8 │ │ lsls r4, r2, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n cb85e │ │ + b.n cb86e │ │ lsls r5, r2, #2 │ │ lsrs r0, r0, #8 │ │ stmia r0!, {r2, r3, r4, r5, r6} │ │ - b.n cb6d8 │ │ - b.n cb2c0 │ │ - b.n cb6de │ │ + b.n cb6e8 │ │ + b.n cb2d0 │ │ + b.n cb6ee │ │ movs r4, r1 │ │ and.w r0, r0, ip, lsr #28 │ │ - b.n cb6d8 │ │ + b.n cb6e8 │ │ eors r6, r6 │ │ - b.n caf34 │ │ + b.n caf44 │ │ asrs r4, r0, #4 │ │ - b.n cb108 │ │ + b.n cb118 │ │ movs r0, r1 │ │ - b.n cb480 │ │ + b.n cb490 │ │ movs r0, r4 │ │ lsrs r0, r0, #8 │ │ asrs r2, r7, #2 │ │ - b.n cb596 │ │ + b.n cb5a6 │ │ movs r2, r0 │ │ - b.n cb80c │ │ + b.n cb81c │ │ str r0, [r3, #0] │ │ asrs r3, r2, #22 │ │ movs r0, r0 │ │ asrs r6, r2, #13 │ │ movs r7, r5 │ │ subs r0, r0, r0 │ │ lsls r4, r5, #2 │ │ - b.n cad1a │ │ + b.n cad2a │ │ movs r0, r0 │ │ - b.n cb89e │ │ + b.n cb8ae │ │ lsls r5, r0, #2 │ │ lsrs r0, r0, #8 │ │ adds r0, #4 │ │ - b.n cadb8 │ │ + b.n cadc8 │ │ movs r1, r0 │ │ - b.n cb830 │ │ + b.n cb840 │ │ adds r0, #0 │ │ - b.n cb54e │ │ + b.n cb55e │ │ adds r0, #24 │ │ asrs r0, r2, #22 │ │ movs r1, r1 │ │ - b.n cb4bc │ │ + b.n cb4cc │ │ @ instruction: 0xfff60aff │ │ strb r5, [r2, #3] │ │ - b.n cb5c4 │ │ + b.n cb5d4 │ │ str r5, [r2, #12] │ │ - b.n cb5d4 │ │ + b.n cb5e4 │ │ movs r7, r0 │ │ - b.n cb4d2 │ │ + b.n cb4e2 │ │ @ instruction: 0xfff2caff │ │ movs r2, r1 │ │ - b.n cb4d4 │ │ + b.n cb4e4 │ │ @ instruction: 0xffe60aff │ │ strb r6, [r0, #4] │ │ - b.n cb33c │ │ + b.n cb34c │ │ strb r4, [r3, #0] │ │ - b.n cad68 │ │ + b.n cad78 │ │ movs r5, r0 │ │ - b.n cb4ec │ │ + b.n cb4fc │ │ @ instruction: 0xffe21aff │ │ strb r6, [r0, #2] │ │ - b.n cb34c │ │ + b.n cb35c │ │ asrs r6, r0, #2 │ │ - b.n cb366 │ │ + b.n cb376 │ │ blxns r7 │ │ - b.n cb63c │ │ + b.n cb64c │ │ asrs r0, r6, #2 │ │ - b.n cb5f4 │ │ + b.n cb604 │ │ movs r1, r0 │ │ - b.n cb4fe │ │ + b.n cb50e │ │ asrs r1, r0, #32 │ │ movs r2, #132 @ 0x84 │ │ asrs r0, r6, #2 │ │ movs r1, #199 @ 0xc7 │ │ str r5, [r0, #0] │ │ movs r5, #217 @ 0xd9 │ │ @ instruction: 0xffd9eaff │ │ str r4, [r7, #4] │ │ - b.n cb770 │ │ + b.n cb780 │ │ asrs r4, r0, #2 │ │ - b.n cb386 │ │ + b.n cb396 │ │ movs r0, #132 @ 0x84 │ │ - b.n cb37e │ │ + b.n cb38e │ │ asrs r0, r6, #2 │ │ - b.n cb618 │ │ + b.n cb628 │ │ movs r0, #176 @ 0xb0 │ │ - b.n cb61e │ │ + b.n cb62e │ │ movs r1, r0 │ │ - b.n cb522 │ │ + b.n cb532 │ │ @ instruction: 0xffd71aff │ │ str r4, [r0, r4] │ │ - b.n cb194 │ │ + b.n cb1a4 │ │ asrs r5, r2, #3 │ │ - b.n cb63e │ │ + b.n cb64e │ │ movs r0, #213 @ 0xd5 │ │ - b.n cb640 │ │ + b.n cb650 │ │ asrs r1, r0, #2 │ │ - b.n cb3ae │ │ + b.n cb3be │ │ movs r0, #130 @ 0x82 │ │ - b.n cb3a2 │ │ + b.n cb3b2 │ │ asrs r0, r6, #2 │ │ - b.n cb63c │ │ + b.n cb64c │ │ asrs r0, r6, #2 │ │ - b.n cb622 │ │ + b.n cb632 │ │ asrs r5, r2, #3 │ │ - b.n cb654 │ │ + b.n cb664 │ │ asrs r1, r0, #2 │ │ - b.n cb3b2 │ │ + b.n cb3c2 │ │ movs r0, #178 @ 0xb2 │ │ - b.n cb54c │ │ + b.n cb55c │ │ movs r0, #1 │ │ - b.n cb7b2 │ │ + b.n cb7c2 │ │ movs r0, #178 @ 0xb2 │ │ - b.n cb534 │ │ + b.n cb544 │ │ @ instruction: 0xffcaeaff │ │ asrs r5, r2, #3 │ │ - b.n cb666 │ │ + b.n cb676 │ │ movs r0, r0 │ │ - b.n cb960 │ │ + b.n cb970 │ │ @ instruction: 0xffcc4aff │ │ asrs r5, r2, #3 │ │ - b.n cb678 │ │ + b.n cb688 │ │ strb r1, [r0, #4] │ │ - b.n cb1f8 │ │ + b.n cb208 │ │ asrs r1, r0, #2 │ │ - b.n cb3d4 │ │ + b.n cb3e4 │ │ adds r7, #188 @ 0xbc │ │ - b.n cb674 │ │ + b.n cb684 │ │ movs r0, #188 @ 0xbc │ │ - b.n cb684 │ │ + b.n cb694 │ │ lsls r2, r4, #2 │ │ - b.n cb580 │ │ + b.n cb590 │ │ @ instruction: 0xffc52aff │ │ asrs r4, r2, #32 │ │ - b.n cb7f0 │ │ + b.n cb800 │ │ movs r0, #131 @ 0x83 │ │ - b.n cb3e8 │ │ + b.n cb3f8 │ │ movs r0, #176 @ 0xb0 │ │ - b.n cb68e │ │ + b.n cb69e │ │ adds r0, #2 │ │ - b.n cb3f0 │ │ + b.n cb400 │ │ asrs r4, r0, #32 │ │ - b.n cae98 │ │ + b.n caea8 │ │ asrs r6, r0, #32 │ │ - b.n cb6f8 │ │ + b.n cb708 │ │ movs r4, r0 │ │ - b.n cb99c │ │ + b.n cb9ac │ │ asrs r6, r6, #2 │ │ lsls r3, r2, #7 │ │ asrs r1, r0, #32 │ │ lsls r3, r0, #2 │ │ asrs r0, r1, #32 │ │ lsls r1, r0, #10 │ │ asrs r4, r3, #32 │ │ lsls r6, r0, #22 │ │ @ instruction: 0xffb9eaff │ │ movs r0, r0 │ │ - b.n cb9b2 │ │ + b.n cb9c2 │ │ lsls r0, r0, #1 │ │ lsrs r0, r0, #8 │ │ stmia r0!, {r2, r3, r4, r5, r6} │ │ - b.n cb82e │ │ + b.n cb83e │ │ movs r1, r1 │ │ and.w r0, r0, r1, lsl #4 │ │ - b.n cb7a4 │ │ + b.n cb7b4 │ │ asrs r0, r6, #2 │ │ - b.n cb6b4 │ │ + b.n cb6c4 │ │ asrs r2, r7, #2 │ │ - b.n cb6da │ │ + b.n cb6ea │ │ movs r2, r0 │ │ - b.n cb950 │ │ + b.n cb960 │ │ movs r0, #24 │ │ asrs r2, r2, #22 │ │ movs r0, r0 │ │ asrs r2, r2, #13 │ │ movs r1, r4 │ │ subs r0, r0, r0 │ │ lsls r4, r5, #2 │ │ - b.n cae5e │ │ + b.n cae6e │ │ movs r0, r0 │ │ - b.n cb9e2 │ │ + b.n cb9f2 │ │ movs r4, r6 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #32 │ │ - b.n caefc │ │ + b.n caf0c │ │ movs r0, #0 │ │ - b.n cb68e │ │ + b.n cb69e │ │ movs r1, r0 │ │ - b.n cb974 │ │ + b.n cb984 │ │ movs r0, #24 │ │ asrs r0, r2, #22 │ │ movs r1, r1 │ │ - b.n cb5fe │ │ + b.n cb60e │ │ @ instruction: 0xfff60aff │ │ asrs r5, r2, #3 │ │ - b.n cb706 │ │ + b.n cb716 │ │ str r5, [r2, #12] │ │ - b.n cb718 │ │ + b.n cb728 │ │ movs r1, r0 │ │ - b.n cb616 │ │ + b.n cb626 │ │ @ instruction: 0xfff2caff │ │ adds r0, #28 │ │ - b.n cb876 │ │ + b.n cb886 │ │ asrs r6, r0, #4 │ │ - b.n cb29c │ │ + b.n cb2ac │ │ movs r0, r1 │ │ - b.n cb61c │ │ + b.n cb62c │ │ @ instruction: 0xffee1aff │ │ eors r4, r7 │ │ - b.n cb886 │ │ + b.n cb896 │ │ asrs r6, r0, #2 │ │ - b.n cb6c6 │ │ + b.n cb6d6 │ │ strb r4, [r0, #0] │ │ - b.n cb6ca │ │ + b.n cb6da │ │ asrs r1, r6, #2 │ │ - b.n cb6fc │ │ + b.n cb70c │ │ movs r0, r0 │ │ - b.n cba34 │ │ + b.n cba44 │ │ @ instruction: 0xffe11aff │ │ str r6, [r0, r4] │ │ - b.n cb2a0 │ │ + b.n cb2b0 │ │ asrs r5, r2, #3 │ │ - b.n cb752 │ │ + b.n cb762 │ │ strb r5, [r2, #3] │ │ - b.n cb754 │ │ + b.n cb764 │ │ asrs r1, r0, #2 │ │ - b.n cb4be │ │ + b.n cb4ce │ │ strb r7, [r0, #2] │ │ - b.n cb4b2 │ │ + b.n cb4c2 │ │ asrs r0, r6, #2 │ │ - b.n cb750 │ │ + b.n cb760 │ │ asrs r0, r6, #2 │ │ - b.n cb740 │ │ + b.n cb750 │ │ asrs r5, r2, #3 │ │ - b.n cb768 │ │ + b.n cb778 │ │ strb r1, [r0, #2] │ │ - b.n cb4c2 │ │ + b.n cb4d2 │ │ asrs r2, r6, #2 │ │ - b.n cb6ac │ │ + b.n cb6bc │ │ @ instruction: 0xffd6eaff │ │ asrs r5, r2, #3 │ │ - b.n cb76a │ │ + b.n cb77a │ │ movs r0, r0 │ │ - b.n cba6c │ │ + b.n cba7c │ │ @ instruction: 0xffda4aff │ │ strb r5, [r2, #3] │ │ - b.n cb784 │ │ + b.n cb794 │ │ asrs r7, r0, #4 │ │ - b.n cb2fc │ │ + b.n cb30c │ │ adds r0, #135 @ 0x87 │ │ - b.n cb4e2 │ │ + b.n cb4f2 │ │ adds r0, #176 @ 0xb0 │ │ - b.n cb784 │ │ + b.n cb794 │ │ str r4, [r7, #8] │ │ - b.n cb784 │ │ + b.n cb794 │ │ lsls r6, r4, #2 │ │ - b.n cb68c │ │ + b.n cb69c │ │ @ instruction: 0xffd32aff │ │ asrs r4, r2, #32 │ │ - b.n cb8f0 │ │ + b.n cb900 │ │ adds r0, #131 @ 0x83 │ │ - b.n cb4f4 │ │ + b.n cb504 │ │ adds r0, #176 @ 0xb0 │ │ - b.n cb79c │ │ + b.n cb7ac │ │ asrs r3, r0, #32 │ │ - b.n cb4fc │ │ + b.n cb50c │ │ adds r0, #4 │ │ - b.n cafa0 │ │ + b.n cafb0 │ │ adds r0, #6 │ │ - b.n cb808 │ │ + b.n cb818 │ │ movs r4, r0 │ │ - b.n cbaac │ │ + b.n cbabc │ │ adds r0, #182 @ 0xb6 │ │ lsls r1, r2, #7 │ │ asrs r3, r0, #32 │ │ lsls r1, r0, #2 │ │ asrs r0, r1, #32 │ │ lsls r1, r0, #10 │ │ asrs r4, r3, #32 │ │ lsls r2, r0, #22 │ │ @ instruction: 0xffc7eaff │ │ lsls r5, r2, #3 │ │ - b.n cb7d0 │ │ + b.n cb7e0 │ │ str r4, [r7, #4] │ │ - b.n cb934 │ │ + b.n cb944 │ │ asrs r0, r0, #2 │ │ - b.n cb532 │ │ + b.n cb542 │ │ movs r0, #176 @ 0xb0 │ │ - b.n cb7cc │ │ + b.n cb7dc │ │ movs r0, r0 │ │ - b.n cbad2 │ │ + b.n cbae2 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ asrs r5, r2, #3 │ │ - b.n cb7ea │ │ + b.n cb7fa │ │ str r0, [sp, #496] @ 0x1f0 │ │ - b.n cb94e │ │ + b.n cb95e │ │ movs r0, r0 │ │ - b.n cbb7e │ │ + b.n cbb8e │ │ movs r0, #129 @ 0x81 │ │ - b.n cb554 │ │ + b.n cb564 │ │ adds r0, #176 @ 0xb0 │ │ - b.n cb7ea │ │ + b.n cb7fa │ │ movs r0, r0 │ │ - b.n cbaf0 │ │ + b.n cbb00 │ │ movs r6, r1 │ │ lsrs r0, r0, #8 │ │ - beq.n cb488 │ │ - b.n cb8e8 │ │ + beq.n cb498 │ │ + b.n cb8f8 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, r4, r5, r7, ip} │ │ - b.n cb6fc │ │ + b.n cb70c │ │ movs r0, r0 │ │ - b.n cbb00 │ │ + b.n cbb10 │ │ lsls r0, r1, #2 │ │ lsrs r0, r0, #8 │ │ asrs r2, r7, #2 │ │ - b.n cb816 │ │ + b.n cb826 │ │ str r0, [r5, #0] │ │ - b.n caf84 │ │ + b.n caf94 │ │ movs r0, r4 │ │ - b.n cba90 │ │ + b.n cbaa0 │ │ movs r1, r2 │ │ subs r0, r0, r0 │ │ asrs r0, r1, #32 │ │ - b.n cb7b6 │ │ + b.n cb7c6 │ │ movs r1, #180 @ 0xb4 │ │ - b.n cb85c │ │ + b.n cb86c │ │ movs r0, #2 │ │ - b.n cb580 │ │ + b.n cb590 │ │ asrs r0, r1, #32 │ │ - b.n cb986 │ │ + b.n cb996 │ │ movs r0, #6 │ │ - b.n cb98a │ │ + b.n cb99a │ │ movs r5, r1 │ │ and.w r0, r0, r2, ror #2 │ │ - b.n cb732 │ │ + b.n cb742 │ │ movs r0, r0 │ │ - b.n cbb32 │ │ + b.n cbb42 │ │ lsls r7, r7, #3 │ │ lsrs r0, r0, #8 │ │ lsls r2, r7, #2 │ │ - b.n cb844 │ │ + b.n cb854 │ │ movs r0, r4 │ │ - b.n cbabe │ │ + b.n cbace │ │ lsls r1, r1, #2 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n cb7e6 │ │ + b.n cb7f6 │ │ movs r1, #180 @ 0xb4 │ │ - b.n cb88a │ │ + b.n cb89a │ │ movs r0, #2 │ │ - b.n cb5ae │ │ + b.n cb5be │ │ movs r0, r1 │ │ - b.n cb9b6 │ │ + b.n cb9c6 │ │ movs r0, #6 │ │ - b.n cb9ba │ │ + b.n cb9ca │ │ lsls r5, r0, #2 │ │ and.w r0, r0, r4, lsr #4 │ │ - b.n cb9ce │ │ + b.n cb9de │ │ movs r0, #8 │ │ - b.n cb9d2 │ │ + b.n cb9e2 │ │ movs r0, #176 @ 0xb0 │ │ - b.n cb86a │ │ + b.n cb87a │ │ lsls r0, r0 │ │ - b.n cbc0a │ │ + b.n cbc1a │ │ movs r0, #52 @ 0x34 │ │ - b.n cafe8 │ │ + b.n caff8 │ │ adds r0, #112 @ 0x70 │ │ - b.n cb2b0 │ │ + b.n cb2c0 │ │ str r4, [r0, #0] │ │ - b.n cb088 │ │ + b.n cb098 │ │ movs r0, #8 │ │ - b.n cb00c │ │ + b.n cb01c │ │ strb r4, [r1, #0] │ │ - b.n cb010 │ │ + b.n cb020 │ │ movs r1, r0 │ │ - b.n cbb0e │ │ + b.n cbb1e │ │ asrs r0, r6, #32 │ │ - b.n cb000 │ │ + b.n cb010 │ │ asrs r0, r0, #32 │ │ - b.n cbc2a │ │ + b.n cbc3a │ │ str r4, [r5, r0] │ │ - b.n cb008 │ │ + b.n cb018 │ │ asrs r0, r5, #3 │ │ - b.n cb00c │ │ + b.n cb01c │ │ asrs r4, r4, #3 │ │ - b.n cb010 │ │ + b.n cb020 │ │ asrs r0, r2, #1 │ │ - b.n cb014 │ │ + b.n cb024 │ │ asrs r4, r1, #1 │ │ - b.n cb018 │ │ + b.n cb028 │ │ asrs r0, r1, #1 │ │ - b.n cb01c │ │ + b.n cb02c │ │ ands r6, r7 │ │ - b.n cb0a0 │ │ + b.n cb0b0 │ │ asrs r4, r7, #14 │ │ - b.n cb8a4 │ │ + b.n cb8b4 │ │ strb r4, [r0, #1] │ │ - b.n cb028 │ │ + b.n cb038 │ │ movs r0, #64 @ 0x40 │ │ - b.n cb02c │ │ - add r0, pc, #128 @ (adr r0, cb594 ) │ │ - b.n cb030 │ │ + b.n cb03c │ │ + add r0, pc, #128 @ (adr r0, cb5a4 ) │ │ + b.n cb040 │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ - add r0, pc, #224 @ (adr r0, cb5fc ) │ │ - b.n cba38 │ │ + add r0, pc, #224 @ (adr r0, cb60c ) │ │ + b.n cba48 │ │ movs r7, r0 │ │ and.w r1, r0, r0, asr #6 │ │ - b.n cb040 │ │ + b.n cb050 │ │ asrs r4, r3, #6 │ │ - b.n cb044 │ │ + b.n cb054 │ │ asrs r0, r1, #4 │ │ - b.n cb048 │ │ + b.n cb058 │ │ asrs r0, r7, #32 │ │ - b.n cba4c │ │ - add r0, pc, #736 @ (adr r0, cb814 ) │ │ - b.n cba38 │ │ + b.n cba5c │ │ + add r0, pc, #736 @ (adr r0, cb824 ) │ │ + b.n cba48 │ │ strb r4, [r7, #3] │ │ - b.n cb054 │ │ + b.n cb064 │ │ movs r0, #248 @ 0xf8 │ │ - b.n cb058 │ │ - add r0, pc, #320 @ (adr r0, cb680 ) │ │ - b.n cb05c │ │ + b.n cb068 │ │ + add r0, pc, #320 @ (adr r0, cb690 ) │ │ + b.n cb06c │ │ asrs r4, r6, #2 │ │ - b.n cb8f8 │ │ + b.n cb908 │ │ movs r0, #16 │ │ - b.n cb07c │ │ + b.n cb08c │ │ ands r6, r0 │ │ - b.n cb100 │ │ + b.n cb110 │ │ strb r4, [r2, #0] │ │ - b.n cb084 │ │ + b.n cb094 │ │ stmia r4!, {r0, r5} │ │ - b.n cb896 │ │ + b.n cb8a6 │ │ asrs r4, r6, #2 │ │ - b.n cb8ee │ │ + b.n cb8fe │ │ asrs r3, r6, #1 │ │ - b.n cb2bc │ │ + b.n cb2cc │ │ movs r0, r0 │ │ - b.n cbc04 │ │ + b.n cbc14 │ │ movs r0, #16 │ │ - b.n cb07a │ │ + b.n cb08a │ │ ands r6, r0 │ │ - b.n cb0fe │ │ + b.n cb10e │ │ strb r4, [r2, #0] │ │ - b.n cb082 │ │ + b.n cb092 │ │ movs r4, r5 │ │ - ldr r2, [pc, #0] @ (cb570 ) │ │ + ldr r2, [pc, #0] @ (cb580 ) │ │ movs r0, #0 │ │ - b.n cbcb6 │ │ + b.n cbcc6 │ │ movs r3, r0 │ │ - b.n cbc20 │ │ - b.n cb57c │ │ - b.n cbcbe │ │ + b.n cbc30 │ │ + b.n cb58c │ │ + b.n cbcce │ │ movs r7, r2 │ │ subs r2, #0 │ │ str r1, [r0, #0] │ │ - b.n cba86 │ │ + b.n cba96 │ │ subs r7, r7, #0 │ │ - b.n cbcca │ │ - b.n cb784 │ │ - b.n cb99a │ │ + b.n cbcda │ │ + b.n cb794 │ │ + b.n cb9aa │ │ str r4, [r1, r0] │ │ - b.n cb8d2 │ │ + b.n cb8e2 │ │ asrs r6, r0, #4 │ │ - b.n cb598 │ │ + b.n cb5a8 │ │ strb r0, [r0, #0] │ │ - b.n cbcda │ │ + b.n cbcea │ │ stmia r0!, {r2, r3, r4, r5, r6} │ │ - b.n cbcde │ │ + b.n cbcee │ │ adds r0, #12 │ │ - b.n cb6b4 │ │ + b.n cb6c4 │ │ ands r7, r0 │ │ - b.n cb6ba │ │ + b.n cb6ca │ │ lsls r7, r1, #29 │ │ orn r0, r3, #138240 @ 0x21c00 │ │ - b.n cb6c0 │ │ + b.n cb6d0 │ │ adds r0, #28 │ │ - b.n cbab8 │ │ + b.n cbac8 │ │ strb r0, [r2, #0] │ │ - b.n cbac4 │ │ + b.n cbad4 │ │ cmp r2, #143 @ 0x8f │ │ orn r0, r3, #159744 @ 0x27000 │ │ - b.n cbac6 │ │ + b.n cbad6 │ │ movs r7, r0 │ │ - b.n cb864 │ │ + b.n cb874 │ │ cmp r2, #143 @ 0x8f │ │ orr.w r0, r3, #143360 @ 0x23000 │ │ - b.n cb6de │ │ + b.n cb6ee │ │ stmia r0!, {r3} │ │ - b.n cbae6 │ │ + b.n cbaf6 │ │ lsls r7, r1, #29 │ │ - bl ffd0f5b4 │ │ + bl ffd0f5c4 │ │ subs r7, r7, r3 │ │ movs r6, r1 │ │ - b.n cb886 │ │ + b.n cb896 │ │ stmia r0!, {r0, r2} │ │ - b.n cb91e │ │ + b.n cb92e │ │ movs r0, r2 │ │ lsrs r0, r0, #8 │ │ adds r0, #7 │ │ - b.n cbb02 │ │ + b.n cbb12 │ │ ands r6, r7 │ │ - b.n cbb06 │ │ + b.n cbb16 │ │ movs r6, r1 │ │ - b.n cb66e │ │ + b.n cb67e │ │ asrs r3, r0, #4 │ │ - b.n cb704 │ │ + b.n cb714 │ │ strb r3, [r0, #4] │ │ - b.n cb70a │ │ + b.n cb71a │ │ adds r0, #132 @ 0x84 │ │ - b.n cb70c │ │ + b.n cb71c │ │ lsls r4, r0 │ │ - b.n cb712 │ │ + b.n cb722 │ │ movs r1, r0 │ │ - b.n cbb02 │ │ + b.n cbb12 │ │ str r2, [r0, #8] │ │ - b.n cb528 │ │ + b.n cb538 │ │ str r2, [r0, r0] │ │ - b.n cb710 │ │ + b.n cb720 │ │ movs r1, r0 │ │ - b.n cbaae │ │ + b.n cbabe │ │ str r2, [r0, #8] │ │ - b.n cb520 │ │ + b.n cb530 │ │ str r2, [r0, #0] │ │ - b.n cb71e │ │ + b.n cb72e │ │ movs r0, #2 │ │ - b.n cbb1e │ │ + b.n cbb2e │ │ str r0, [r6, r2] │ │ - b.n cb9c8 │ │ + b.n cb9d8 │ │ str r0, [r6, r2] │ │ - b.n cb9ae │ │ + b.n cb9be │ │ @ instruction: 0xfff61aff │ │ movs r0, #1 │ │ - b.n cbac2 │ │ + b.n cbad2 │ │ lsls r0, r3, #3 │ │ - b.n cb9c2 │ │ + b.n cb9d2 │ │ movs r0, #5 │ │ - b.n cb1c6 │ │ + b.n cb1d6 │ │ movs r0, #76 @ 0x4c │ │ - b.n cb158 │ │ + b.n cb168 │ │ asrs r4, r2, #1 │ │ - b.n cb15c │ │ + b.n cb16c │ │ movs r2, r0 │ │ - b.n cb6be │ │ + b.n cb6ce │ │ movs r1, #0 │ │ - b.n cb564 │ │ + b.n cb574 │ │ movs r0, #228 @ 0xe4 │ │ - b.n cb160 │ │ + b.n cb170 │ │ movs r0, #56 @ 0x38 │ │ - b.n cbb64 │ │ + b.n cbb74 │ │ movs r1, #0 │ │ - b.n cb550 │ │ + b.n cb560 │ │ asrs r0, r6, #32 │ │ - b.n cbb6c │ │ + b.n cbb7c │ │ movs r2, r1 │ │ - b.n cb996 │ │ - b.n cbb78 │ │ + b.n cb9a6 │ │ + b.n cbb88 │ │ @ instruction: 0xebff20d8 │ │ - b.n cb9f2 │ │ + b.n cba02 │ │ movs r0, r0 │ │ - b.n cbd02 │ │ + b.n cbd12 │ │ asrs r4, r1, #1 │ │ - b.n cb18c │ │ + b.n cb19c │ │ adds r0, #84 @ 0x54 │ │ - b.n cb190 │ │ - add r0, pc, #128 @ (adr r0, cb6ec ) │ │ - b.n cb1a8 │ │ + b.n cb1a0 │ │ + add r0, pc, #128 @ (adr r0, cb6fc ) │ │ + b.n cb1b8 │ │ asrs r1, r0, #32 │ │ - b.n cb6f6 │ │ + b.n cb706 │ │ str r4, [r5, r0] │ │ - b.n cb1b0 │ │ + b.n cb1c0 │ │ str r0, [r5, #0] │ │ - b.n cb1b4 │ │ + b.n cb1c4 │ │ strb r4, [r4, #3] │ │ - b.n cb1b8 │ │ + b.n cb1c8 │ │ strb r1, [r0, #4] │ │ - b.n cb588 │ │ + b.n cb598 │ │ vpmin.u , , │ │ lsls r2, r7, #2 │ │ - b.n cba3a │ │ + b.n cba4a │ │ movs r1, r0 │ │ - b.n cbcae │ │ + b.n cbcbe │ │ vpmin.u32 q8, , │ │ lsls r5, r2, #3 │ │ - b.n cba48 │ │ + b.n cba58 │ │ asrs r0, r0, #32 │ │ - b.n cbdda │ │ + b.n cbdea │ │ asrs r4, r7, #32 │ │ - b.n cb1b8 │ │ + b.n cb1c8 │ │ asrs r0, r7, #32 │ │ - b.n cb1bc │ │ + b.n cb1cc │ │ lsls r0, r0, #2 │ │ - b.n cb7b2 │ │ + b.n cb7c2 │ │ lsls r0, r6 │ │ - b.n cba4a │ │ + b.n cba5a │ │ asrs r0, r6, #2 │ │ - b.n cba2e │ │ + b.n cba3e │ │ asrs r0, r7, #32 │ │ - b.n cbbcc │ │ + b.n cbbdc │ │ movs r1, r1 │ │ - b.n cb9f6 │ │ - b.n cbba8 │ │ + b.n cba06 │ │ + b.n cbbb8 │ │ @ instruction: 0xebff00d5 │ │ - b.n cba70 │ │ + b.n cba80 │ │ lsls r0, r0, #2 │ │ - b.n cb7ce │ │ + b.n cb7de │ │ lsls r0, r6 │ │ - b.n cba46 │ │ + b.n cba56 │ │ vpmin.u16 q15, , │ │ movs r4, r2 │ │ - b.n cbbd8 │ │ + b.n cbbe8 │ │ movs r0, #8 │ │ - b.n cbbdc │ │ + b.n cbbec │ │ movs r0, #176 @ 0xb0 │ │ - b.n cba7a │ │ + b.n cba8a │ │ str r0, [r0, #8] │ │ - b.n cbe1a │ │ + b.n cbe2a │ │ str r4, [r5, r0] │ │ - b.n cb1f8 │ │ + b.n cb208 │ │ adds r0, #113 @ 0x71 │ │ - b.n cb4c0 │ │ + b.n cb4d0 │ │ movs r0, #52 @ 0x34 │ │ - b.n cb200 │ │ + b.n cb210 │ │ strb r4, [r0, #0] │ │ - b.n cb29e │ │ + b.n cb2ae │ │ movs r0, #8 │ │ - b.n cb222 │ │ + b.n cb232 │ │ str r4, [r1, r0] │ │ - b.n cb226 │ │ + b.n cb236 │ │ movs r1, r0 │ │ - b.n cbd24 │ │ + b.n cbd34 │ │ movs r0, r6 │ │ - b.n cb214 │ │ + b.n cb224 │ │ movs r0, r0 │ │ - b.n cbe3e │ │ + b.n cbe4e │ │ lsls r0, r5, #3 │ │ - b.n cb21c │ │ + b.n cb22c │ │ lsls r4, r4, #3 │ │ - b.n cb220 │ │ + b.n cb230 │ │ lsls r0, r2, #1 │ │ - b.n cb224 │ │ + b.n cb234 │ │ lsls r4, r1, #1 │ │ - b.n cb228 │ │ + b.n cb238 │ │ lsls r0, r1, #1 │ │ - b.n cb22c │ │ - add r0, pc, #128 @ (adr r0, cb794 ) │ │ - b.n cb230 │ │ + b.n cb23c │ │ + add r0, pc, #128 @ (adr r0, cb7a4 ) │ │ + b.n cb240 │ │ str r6, [r7, #0] │ │ - b.n cb2b4 │ │ + b.n cb2c4 │ │ lsls r4, r7, #14 │ │ - b.n cbab8 │ │ + b.n cbac8 │ │ str r4, [r0, r1] │ │ - b.n cb23c │ │ + b.n cb24c │ │ movs r0, #64 @ 0x40 │ │ - b.n cb240 │ │ + b.n cb250 │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ - add r0, pc, #224 @ (adr r0, cb80c ) │ │ - b.n cbc48 │ │ + add r0, pc, #224 @ (adr r0, cb81c ) │ │ + b.n cbc58 │ │ movs r7, r0 │ │ and.w r1, r0, r0, asr #2 │ │ - b.n cb250 │ │ + b.n cb260 │ │ lsls r4, r3, #6 │ │ - b.n cb254 │ │ + b.n cb264 │ │ lsls r0, r1, #4 │ │ - b.n cb258 │ │ + b.n cb268 │ │ movs r0, r7 │ │ - b.n cbc5c │ │ - add r0, pc, #736 @ (adr r0, cba24 ) │ │ - b.n cbc46 │ │ + b.n cbc6c │ │ + add r0, pc, #736 @ (adr r0, cba34 ) │ │ + b.n cbc56 │ │ str r4, [r7, r3] │ │ - b.n cb264 │ │ + b.n cb274 │ │ movs r0, #248 @ 0xf8 │ │ - b.n cb268 │ │ - add r0, pc, #320 @ (adr r0, cb890 ) │ │ - b.n cb26c │ │ + b.n cb278 │ │ + add r0, pc, #320 @ (adr r0, cb8a0 ) │ │ + b.n cb27c │ │ str r0, [r4, #0] │ │ - b.n cb290 │ │ + b.n cb2a0 │ │ lsls r4, r6, #2 │ │ - b.n cbb06 │ │ + b.n cbb16 │ │ movs r0, #16 │ │ - b.n cb28a │ │ + b.n cb29a │ │ strb r4, [r2, #0] │ │ - b.n cb28e │ │ + b.n cb29e │ │ str r6, [r0, #0] │ │ - b.n cb312 │ │ + b.n cb322 │ │ stmia r4!, {r5} │ │ - b.n cbaaa │ │ + b.n cbaba │ │ lsls r4, r6, #2 │ │ - b.n cbb02 │ │ + b.n cbb12 │ │ lsls r3, r6, #1 │ │ - b.n cb4d0 │ │ + b.n cb4e0 │ │ movs r0, r0 │ │ - b.n cbe16 │ │ + b.n cbe26 │ │ movs r0, #16 │ │ - b.n cb28e │ │ + b.n cb29e │ │ str r6, [r0, #0] │ │ - b.n cb312 │ │ + b.n cb322 │ │ strb r4, [r2, #0] │ │ - b.n cb296 │ │ + b.n cb2a6 │ │ movs r4, r5 │ │ - ldr r2, [pc, #0] @ (cb784 ) │ │ + ldr r2, [pc, #0] @ (cb794 ) │ │ movs r0, #0 │ │ - b.n cbeca │ │ + b.n cbeda │ │ movs r3, r0 │ │ - b.n cbe34 │ │ + b.n cbe44 │ │ strh r0, [r0, #0] │ │ - b.n cbed2 │ │ + b.n cbee2 │ │ movs r6, r2 │ │ subs r2, #0 │ │ - b.n cb79a │ │ - b.n cbc9c │ │ + b.n cb7aa │ │ + b.n cbcac │ │ str r0, [r4, r0] │ │ - b.n cb2d8 │ │ + b.n cb2e8 │ │ lsrs r7, r7, #24 │ │ - b.n cbee2 │ │ + b.n cbef2 │ │ strh r4, [r7, #6] │ │ - b.n cbbc2 │ │ + b.n cbbd2 │ │ str r6, [r1, #16] │ │ - b.n cb7aa │ │ + b.n cb7ba │ │ movs r0, r0 │ │ - b.n cbeee │ │ + b.n cbefe │ │ strb r4, [r7, #1] │ │ - b.n cbef2 │ │ + b.n cbf02 │ │ ands r7, r0 │ │ - b.n cb8c0 │ │ + b.n cb8d0 │ │ adds r0, #0 │ │ - b.n cb8ce │ │ + b.n cb8de │ │ adds r0, #28 │ │ - b.n cbcc4 │ │ + b.n cbcd4 │ │ lsls r7, r1, #29 │ │ orn r0, r4, #32768 @ 0x8000 │ │ - b.n cb8d0 │ │ + b.n cb8e0 │ │ ands r4, r3 │ │ - b.n cbcd2 │ │ + b.n cbce2 │ │ movs r0, r2 │ │ - b.n cbcce │ │ + b.n cbcde │ │ cmp r2, #143 @ 0x8f │ │ orn r0, r4, #8388608 @ 0x800000 │ │ - b.n cba82 │ │ + b.n cba92 │ │ cmp r2, #143 @ 0x8f │ │ orr.w r0, r3, #138240 @ 0x21c00 │ │ - b.n cb8f2 │ │ + b.n cb902 │ │ strb r0, [r1, #0] │ │ - b.n cbcf0 │ │ + b.n cbd00 │ │ lsls r7, r1, #29 │ │ - bl ffd0f7c8 │ │ + bl ffd0f7d8 │ │ subs r7, r7, r3 │ │ movs r0, r1 │ │ - b.n cbaaa │ │ + b.n cbaba │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ movs r7, r0 │ │ - b.n cbd06 │ │ + b.n cbd16 │ │ str r0, [r4, #0] │ │ - b.n cb334 │ │ + b.n cb344 │ │ adds r0, #62 @ 0x3e │ │ - b.n cbd0e │ │ + b.n cbd1e │ │ asrs r0, r1, #32 │ │ - b.n cb884 │ │ + b.n cb894 │ │ strb r0, [r0, #4] │ │ - b.n cb912 │ │ + b.n cb922 │ │ lsls r0, r0, #4 │ │ - b.n cb91e │ │ + b.n cb92e │ │ str r3, [r0, #8] │ │ - b.n cb91a │ │ + b.n cb92a │ │ adds r0, #131 @ 0x83 │ │ - b.n cb926 │ │ + b.n cb936 │ │ asrs r1, r0, #32 │ │ - b.n cbd18 │ │ + b.n cbd28 │ │ lsls r2, r0 │ │ - b.n cb748 │ │ + b.n cb758 │ │ str r2, [r0, r0] │ │ - b.n cb92a │ │ + b.n cb93a │ │ asrs r1, r0, #32 │ │ - b.n cbcc4 │ │ + b.n cbcd4 │ │ lsls r2, r0 │ │ - b.n cb726 │ │ + b.n cb736 │ │ ands r2, r0 │ │ - b.n cb930 │ │ + b.n cb940 │ │ movs r0, #2 │ │ - b.n cbd32 │ │ + b.n cbd42 │ │ str r0, [r6, r2] │ │ - b.n cbbdc │ │ + b.n cbbec │ │ str r0, [r6, r2] │ │ - b.n cbbbe │ │ + b.n cbbce │ │ @ instruction: 0xfff61aff │ │ movs r0, #1 │ │ - b.n cbcd6 │ │ + b.n cbce6 │ │ lsls r0, r3, #3 │ │ - b.n cbbd6 │ │ + b.n cbbe6 │ │ movs r0, #5 │ │ - b.n cb3da │ │ + b.n cb3ea │ │ movs r0, #76 @ 0x4c │ │ - b.n cb36c │ │ + b.n cb37c │ │ asrs r4, r2, #1 │ │ - b.n cb370 │ │ + b.n cb380 │ │ movs r2, r0 │ │ - b.n cb8d2 │ │ + b.n cb8e2 │ │ movs r1, #0 │ │ - b.n cb778 │ │ + b.n cb788 │ │ movs r0, #228 @ 0xe4 │ │ - b.n cb374 │ │ + b.n cb384 │ │ movs r0, #56 @ 0x38 │ │ - b.n cbd78 │ │ + b.n cbd88 │ │ movs r1, #0 │ │ - b.n cb764 │ │ + b.n cb774 │ │ asrs r0, r6, #32 │ │ - b.n cbd80 │ │ + b.n cbd90 │ │ movs r2, r1 │ │ - b.n cbbaa │ │ - b.n cbc82 │ │ + b.n cbbba │ │ + b.n cbc92 │ │ @ instruction: 0xebff20d8 │ │ - b.n cbc06 │ │ + b.n cbc16 │ │ movs r0, r0 │ │ - b.n cbf16 │ │ + b.n cbf26 │ │ asrs r4, r1, #1 │ │ - b.n cb3a0 │ │ + b.n cb3b0 │ │ adds r0, #84 @ 0x54 │ │ - b.n cb3a4 │ │ - add r0, pc, #128 @ (adr r0, cb900 ) │ │ - b.n cb3bc │ │ + b.n cb3b4 │ │ + add r0, pc, #128 @ (adr r0, cb910 ) │ │ + b.n cb3cc │ │ asrs r1, r0, #32 │ │ - b.n cb90a │ │ + b.n cb91a │ │ str r4, [r5, r0] │ │ - b.n cb3c4 │ │ + b.n cb3d4 │ │ strb r4, [r4, #3] │ │ - b.n cb3c8 │ │ + b.n cb3d8 │ │ strb r1, [r0, #4] │ │ - b.n cb798 │ │ + b.n cb7a8 │ │ mcr2 10, 7, r1, cr13, cr15, {7} @ │ │ lsls r2, r7, #2 │ │ - b.n cbc44 │ │ + b.n cbc54 │ │ movs r1, r0 │ │ - b.n cbebe │ │ + b.n cbece │ │ movs r0, r0 │ │ - b.n cbfe2 │ │ + b.n cbff2 │ │ mcr2 10, 7, r0, cr9, cr15, {7} @ │ │ lsls r5, r2, #3 │ │ - b.n cbc5e │ │ + b.n cbc6e │ │ asrs r0, r0, #32 │ │ - b.n cbfee │ │ + b.n cbffe │ │ asrs r4, r7, #32 │ │ - b.n cb3cc │ │ + b.n cb3dc │ │ asrs r0, r7, #32 │ │ - b.n cb3d0 │ │ + b.n cb3e0 │ │ lsls r0, r0, #2 │ │ - b.n cb9cc │ │ + b.n cb9dc │ │ lsls r0, r6 │ │ - b.n cbc5e │ │ + b.n cbc6e │ │ asrs r0, r6, #2 │ │ - b.n cbc42 │ │ + b.n cbc52 │ │ asrs r0, r7, #32 │ │ - b.n cbde0 │ │ + b.n cbdf0 │ │ movs r2, r1 │ │ - b.n cbc0a │ │ - b.n cbcb2 │ │ + b.n cbc1a │ │ + b.n cbcc2 │ │ @ instruction: 0xebff10d5 │ │ - b.n cbc86 │ │ + b.n cbc96 │ │ movs r0, r0 │ │ - b.n cc016 │ │ + b.n cc026 │ │ asrs r1, r0, #2 │ │ - b.n cb9ec │ │ + b.n cb9fc │ │ lsls r0, r6 │ │ - b.n cbc60 │ │ - beq.n cb918 │ │ - b.n cbd78 │ │ + b.n cbc70 │ │ + beq.n cb928 │ │ + b.n cbd88 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, r4, r5, r6, ip} │ │ - b.n cb428 │ │ + b.n cb438 │ │ movs r0, #148 @ 0x94 │ │ - b.n cc02e │ │ + b.n cc03e │ │ movs r2, r1 │ │ - b.n cb49c │ │ + b.n cb4ac │ │ strb r2, [r1, #0] │ │ - b.n cb4a4 │ │ + b.n cb4b4 │ │ asrs r1, r0, #32 │ │ - b.n cba18 │ │ + b.n cba28 │ │ adds r0, #108 @ 0x6c │ │ - b.n cb43c │ │ + b.n cb44c │ │ lsls r1, r0, #2 │ │ stmia.w sp, {r0} │ │ - b.n cc046 │ │ + b.n cc056 │ │ adds r0, #3 │ │ - b.n cba28 │ │ - subs r6, #70 @ 0x46 │ │ + b.n cba38 │ │ + subs r6, #69 @ 0x45 │ │ @ instruction: 0xebfffc8d │ │ @ instruction: 0xeaff0058 │ │ - b.n cb454 │ │ + b.n cb464 │ │ movs r0, r0 │ │ - b.n cba38 │ │ - add sl, sl │ │ + b.n cba48 │ │ + add r9, sl │ │ @ instruction: 0xebff000c │ │ - b.n cb456 │ │ + b.n cb466 │ │ asrs r4, r0, #32 │ │ - b.n cb446 │ │ + b.n cb456 │ │ asrs r2, r0, #32 │ │ - b.n cc02c │ │ + b.n cc03c │ │ asrs r4, r0, #32 │ │ - b.n cb42e │ │ + b.n cb43e │ │ lsls r6, r7, #30 │ │ - b.n cbf42 │ │ + b.n cbf52 │ │ lsrs r7, r7, #31 │ │ - b.n cbfd4 │ │ - beq.n cb970 │ │ - b.n cbdd0 │ │ + b.n cbfe4 │ │ + beq.n cb980 │ │ + b.n cbde0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {} │ │ - b.n cc102 │ │ - beq.n cb97c │ │ - b.n cbddc │ │ + b.n cc112 │ │ + beq.n cb98c │ │ + b.n cbdec │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2} │ │ - b.n cb47c │ │ + b.n cb48c │ │ movs r2, r0 │ │ - b.n cc052 │ │ + b.n cc062 │ │ movs r4, r0 │ │ - b.n cb464 │ │ + b.n cb474 │ │ lsls r6, r7, #30 │ │ - b.n cbf6a │ │ + b.n cbf7a │ │ lsrs r7, r7, #31 │ │ - b.n cbffc │ │ - beq.n cb998 │ │ - b.n cbdf8 │ │ - ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r4, r8, sl, fp, ip, sp} │ │ - movs r1, r0 │ │ - udf #100 @ 0x64 │ │ - @ instruction: 0xfff32fbd │ │ - vqshrn.u64 d20, q4, #12 │ │ + b.n cc00c │ │ + beq.n cb9a8 │ │ + b.n cbe08 │ │ + ldrh r0, [r6, #62] @ 0x3e │ │ + ldmia.w sp!, {r5, r8, sl, fp, ip, sp} │ │ + movs r1, r0 │ │ + svc 55 @ 0x37 │ │ + vaddw.u , , d12 │ │ + vtbl.8 d20, {d4-d5}, d8 │ │ @ instruction: 0xfff448f0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n cbe98 │ │ - beq.n cb9a0 │ │ - b.n cbe1c │ │ + b.n cbea8 │ │ + beq.n cb9b0 │ │ + b.n cbe2c │ │ ands r0, r0 │ │ - b.n cbcc6 │ │ + b.n cbcd6 │ │ lsls r5, r2, #3 │ │ - b.n cbd2a │ │ + b.n cbd3a │ │ str r4, [r3, r0] │ │ - b.n cbe96 │ │ + b.n cbea6 │ │ lsls r0, r0, #4 │ │ - b.n cb8bc │ │ + b.n cb8cc │ │ movs r4, r1 │ │ - b.n cb4b0 │ │ + b.n cb4c0 │ │ asrs r0, r0, #32 │ │ - b.n cbcda │ │ + b.n cbcea │ │ strb r4, [r0, #0] │ │ - b.n cb4be │ │ + b.n cb4ce │ │ movs r1, #180 @ 0xb4 │ │ - b.n cbd84 │ │ + b.n cbd94 │ │ str r0, [r0, #0] │ │ - b.n cb4c6 │ │ + b.n cb4d6 │ │ movs r4, r0 │ │ - b.n cbcea │ │ + b.n cbcfa │ │ asrs r2, r0, #32 │ │ - b.n cb8d0 │ │ + b.n cb8e0 │ │ movs r0, #12 │ │ - b.n cbecc │ │ + b.n cbedc │ │ str r0, [r6, #12] │ │ - b.n cbd50 │ │ - add r5, pc, #876 @ (adr r5, cbd24 ) │ │ + b.n cbd60 │ │ + add r5, pc, #876 @ (adr r5, cbd34 ) │ │ @ instruction: 0xebff0000 │ │ - b.n cc05e │ │ + b.n cc06e │ │ movs r6, r5 │ │ subs r0, r0, r0 │ │ asrs r5, r2, #3 │ │ - b.n cbd6e │ │ + b.n cbd7e │ │ lsls r4, r7, #1 │ │ - b.n cbed2 │ │ + b.n cbee2 │ │ movs r0, #129 @ 0x81 │ │ - b.n cbace │ │ + b.n cbade │ │ asrs r0, r0, #32 │ │ - b.n cc112 │ │ + b.n cc122 │ │ asrs r0, r6, #2 │ │ - b.n cbd5a │ │ + b.n cbd6a │ │ movs r0, #213 @ 0xd5 │ │ - b.n cbd82 │ │ + b.n cbd92 │ │ movs r7, r2 │ │ - b.n cc082 │ │ + b.n cc092 │ │ movs r4, r1 │ │ add r2, sp, #0 │ │ movs r0, #1 │ │ - b.n cbeea │ │ + b.n cbefa │ │ movs r0, #5 │ │ - b.n cb572 │ │ + b.n cb582 │ │ adds r0, #12 │ │ - b.n cb528 │ │ + b.n cb538 │ │ movs r0, #114 @ 0x72 │ │ - b.n cb750 │ │ + b.n cb760 │ │ adds r1, #2 │ │ - b.n cb900 │ │ + b.n cb910 │ │ movs r0, #213 @ 0xd5 │ │ - b.n cbda2 │ │ + b.n cbdb2 │ │ lsls r2, r0, #2 │ │ - b.n cbafe │ │ + b.n cbb0e │ │ movs r0, #4 │ │ - b.n cc142 │ │ + b.n cc152 │ │ asrs r0, r6, #2 │ │ - b.n cbd86 │ │ + b.n cbd96 │ │ movs r4, r0 │ │ - b.n cbd4a │ │ - beq.n cba2c │ │ - b.n cbea4 │ │ - ldr r0, [pc, #960] @ (cbdd0 ) │ │ + b.n cbd5a │ │ + beq.n cba3c │ │ + b.n cbeb4 │ │ + ldr r0, [pc, #960] @ (cbde0 ) │ │ ldmia.w sp!, {r0, r1, r2, r7, r9, sl, sp, pc} │ │ @ instruction: 0xeaff1004 │ │ - b.n cbd5a │ │ + b.n cbd6a │ │ lsrs r0, r2, #31 │ │ - b.n cc03c │ │ + b.n cc04c │ │ movs r0, #4 │ │ - b.n cb604 │ │ + b.n cb614 │ │ movs r1, r0 │ │ - b.n cc04a │ │ + b.n cc05a │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ asrs r0, r3, #32 │ │ - b.n cb556 │ │ + b.n cb566 │ │ movs r0, #180 @ 0xb4 │ │ - b.n cbdda │ │ + b.n cbdea │ │ movs r0, r0 │ │ - b.n cc0d8 │ │ + b.n cc0e8 │ │ movs r0, #0 │ │ - b.n cbd3e │ │ + b.n cbd4e │ │ movs r0, #180 @ 0xb4 │ │ - b.n cbdc6 │ │ + b.n cbdd6 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, #0 │ │ - b.n cc186 │ │ + b.n cc196 │ │ movs r0, #188 @ 0xbc │ │ - b.n cb54c │ │ + b.n cb55c │ │ asrs r4, r0, #32 │ │ - b.n cbf50 │ │ + b.n cbf60 │ │ movs r2, r0 │ │ and.w r0, r0, r0, lsr #8 │ │ - b.n cb57e │ │ + b.n cb58e │ │ adds r0, #0 │ │ - b.n cc19a │ │ + b.n cc1aa │ │ adds r0, #8 │ │ - b.n cb562 │ │ + b.n cb572 │ │ movs r1, r0 │ │ - b.n cbf62 │ │ + b.n cbf72 │ │ lsls r0, r6, #2 │ │ - b.n cbde8 │ │ + b.n cbdf8 │ │ movs r4, r1 │ │ - b.n cb592 │ │ + b.n cb5a2 │ │ asrs r4, r0, #32 │ │ - b.n cb58e │ │ + b.n cb59e │ │ asrs r2, r0, #32 │ │ - b.n cc174 │ │ + b.n cc184 │ │ asrs r4, r0, #32 │ │ - b.n cb576 │ │ + b.n cb586 │ │ lsls r5, r7, #30 │ │ - b.n cc08a │ │ + b.n cc09a │ │ lsrs r7, r7, #31 │ │ - b.n cc11c │ │ - beq.n cbaa0 │ │ - b.n cbf18 │ │ + b.n cc12c │ │ + beq.n cbab0 │ │ + b.n cbf28 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n cbfa8 │ │ - beq.n cbaa8 │ │ - b.n cbf2c │ │ + b.n cbfb8 │ │ + beq.n cbab8 │ │ + b.n cbf3c │ │ eors r0, r0 │ │ - b.n cb5b6 │ │ + b.n cb5c6 │ │ str r0, [r0, r0] │ │ - b.n cbdda │ │ + b.n cbdea │ │ strb r0, [r1, #0] │ │ - b.n cb5d4 │ │ + b.n cb5e4 │ │ lsls r4, r1, #2 │ │ - b.n cb5ca │ │ + b.n cb5da │ │ movs r1, r0 │ │ - b.n cba46 │ │ + b.n cba56 │ │ str r6, [r7, #4] │ │ - b.n cbeaa │ │ + b.n cbeba │ │ lsls r1, r0, #28 │ │ - b.n cc232 │ │ + b.n cc242 │ │ movs r6, r0 │ │ - b.n cbd52 │ │ + b.n cbd62 │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ str r2, [r0, #0] │ │ - b.n cbdfa │ │ + b.n cbe0a │ │ lsls r3, r1, #2 │ │ and.w r1, r0, r1 │ │ - b.n cc166 │ │ + b.n cc176 │ │ lsls r1, r1, #2 │ │ lsrs r0, r0, #8 │ │ lsls r0, r0, #31 │ │ - b.n cc0da │ │ + b.n cc0ea │ │ movs r0, r0 │ │ - b.n cc172 │ │ + b.n cc182 │ │ lsrs r7, r7, #31 │ │ - b.n cc170 │ │ + b.n cc180 │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n cc180 │ │ + b.n cc190 │ │ lsls r5, r1, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, #136 @ 0x88 │ │ - b.n cb60a │ │ + b.n cb61a │ │ movs r2, #129 @ 0x81 │ │ - b.n cba0a │ │ + b.n cba1a │ │ movs r3, r0 │ │ - b.n cbd8e │ │ + b.n cbd9e │ │ lsls r1, r1, #1 │ │ lsrs r0, r0, #8 │ │ - beq.n cbb28 │ │ - b.n cbf88 │ │ + beq.n cbb38 │ │ + b.n cbf98 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r8, r9, sl} │ │ - b.n cc11e │ │ + b.n cc12e │ │ @ instruction: 0xfffb0aff │ │ str r4, [r1, #4] │ │ - b.n cb62c │ │ + b.n cb63c │ │ str r1, [r0, #0] │ │ - b.n cbab2 │ │ + b.n cbac2 │ │ movs r2, r0 │ │ - b.n cc136 │ │ + b.n cc146 │ │ movs r4, r1 │ │ lsrs r0, r0, #8 │ │ strh r0, [r0, #0] │ │ - b.n cbe52 │ │ + b.n cbe62 │ │ movs r5, r0 │ │ - b.n cbe56 │ │ + b.n cbe66 │ │ str r1, [r0, #0] │ │ - b.n cbe5a │ │ + b.n cbe6a │ │ str r0, [sp, #12] │ │ - b.n cbe5e │ │ - add r0, pc, #8 @ (adr r0, cbb28 ) │ │ - b.n cbe62 │ │ - strb r3, [r0, r6] │ │ + b.n cbe6e │ │ + add r0, pc, #8 @ (adr r0, cbb38 ) │ │ + b.n cbe72 │ │ + strb r2, [r0, r6] │ │ @ instruction: 0xebff1006 │ │ - b.n cbe6a │ │ + b.n cbe7a │ │ str r0, [r0, #0] │ │ - b.n cbe6e │ │ + b.n cbe7e │ │ movs r0, #10 │ │ - b.n cbe72 │ │ + b.n cbe82 │ │ adds r0, #9 │ │ - b.n cbe76 │ │ + b.n cbe86 │ │ movs r0, r1 │ │ - b.n cbe7a │ │ + b.n cbe8a │ │ movs r0, r0 │ │ - b.n cc1ea │ │ + b.n cc1fa │ │ movs r4, r7 │ │ lsrs r0, r0, #8 │ │ str r4, [r0, #4] │ │ - b.n cb670 │ │ + b.n cb680 │ │ stmia r0!, {r0, r7} │ │ - b.n cbc4c │ │ + b.n cbc5c │ │ str r4, [r1, #32] │ │ - b.n cbc5a │ │ + b.n cbc6a │ │ str r0, [r2, #0] │ │ - b.n cb67e │ │ + b.n cb68e │ │ movs r0, r0 │ │ - b.n cc202 │ │ + b.n cc212 │ │ @ instruction: 0xffe41aff │ │ str r4, [r2, #4] │ │ - b.n cb688 │ │ + b.n cb698 │ │ str r1, [r0, #16] │ │ - b.n cba8e │ │ + b.n cba9e │ │ movs r0, r0 │ │ - b.n cc212 │ │ + b.n cc222 │ │ lsls r5, r5, #2 │ │ subs r0, r0, r0 │ │ lsls r4, r1, #2 │ │ - b.n cb696 │ │ + b.n cb6a6 │ │ str r7, [r7, #4] │ │ - b.n cc2b2 │ │ + b.n cc2c2 │ │ stmia r0!, {r3} │ │ - b.n cb690 │ │ - add r0, pc, #4 @ (adr r0, cbb7c ) │ │ - b.n cc2ba │ │ + b.n cb6a0 │ │ + add r0, pc, #4 @ (adr r0, cbb8c ) │ │ + b.n cc2ca │ │ str r1, [r0, #0] │ │ - b.n cbafe │ │ + b.n cbb0e │ │ lsls r0, r2, #2 │ │ - b.n cb6aa │ │ + b.n cb6ba │ │ str r1, [r0, #16] │ │ - b.n cbaa6 │ │ - bl 527686 │ │ + b.n cbab6 │ │ + bl 527696 │ │ str r1, [r0, #0] │ │ - b.n cc09a │ │ + b.n cc0aa │ │ movs r1, r0 │ │ - b.n cc23e │ │ + b.n cc24e │ │ str r2, [r1, #0] │ │ str r1, [sp, #640] @ 0x280 │ │ str r1, [r0, #16] │ │ - b.n cba9a │ │ + b.n cbaaa │ │ lsls r0, r2, #2 │ │ - b.n cb6c6 │ │ + b.n cb6d6 │ │ lsls r1, r0, #4 │ │ - b.n cbac2 │ │ - bl 5276a2 │ │ + b.n cbad2 │ │ + bl 5276b2 │ │ movs r1, r0 │ │ - b.n cc0aa │ │ + b.n cc0ba │ │ movs r1, r0 │ │ - b.n cc24e │ │ - add r0, pc, #0 @ (adr r0, cbbb0 ) │ │ + b.n cc25e │ │ + add r0, pc, #0 @ (adr r0, cbbc0 ) │ │ strh r0, [r4, #12] │ │ movs r0, r0 │ │ - b.n cc25c │ │ + b.n cc26c │ │ movs r3, r0 │ │ - b.n cbefa │ │ + b.n cbf0a │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ str r4, [r2, #40] @ 0x28 │ │ - b.n cb700 │ │ + b.n cb710 │ │ movs r0, r1 │ │ - b.n cc1ea │ │ + b.n cc1fa │ │ stmia r2!, {r4, r7} │ │ - b.n cb708 │ │ + b.n cb718 │ │ lsls r0, r2, #10 │ │ - b.n cb70c │ │ + b.n cb71c │ │ str r6, [r0, #0] │ │ - b.n cbcf0 │ │ + b.n cbd00 │ │ stmia r0!, {r2, r3} │ │ - b.n cbcf4 │ │ + b.n cbd04 │ │ movs r0, r0 │ │ - b.n cbcf8 │ │ + b.n cbd08 │ │ movs r6, r0 │ │ asrs r0, r4, #6 │ │ movs r2, r0 │ │ - b.n cc206 │ │ + b.n cc216 │ │ movs r4, r1 │ │ asrs r0, r4, #6 │ │ - b.n cbcf8 │ │ - b.n cb712 │ │ + b.n cbd08 │ │ + b.n cb722 │ │ strh r6, [r7, #2] │ │ - b.n cbff2 │ │ + b.n cc002 │ │ movs r0, r0 │ │ - b.n cc2a0 │ │ + b.n cc2b0 │ │ stmia r0!, {r1, r2, r3} │ │ - b.n cbf36 │ │ + b.n cbf46 │ │ lsls r1, r0, #10 │ │ - b.n cbb52 │ │ + b.n cbb62 │ │ movs r7, r0 │ │ - b.n cbf3e │ │ + b.n cbf4e │ │ movs r2, r3 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n cc22a │ │ + b.n cc23a │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ lsls r4, r2, #9 │ │ - b.n cb74c │ │ + b.n cb75c │ │ movs r0, r0 │ │ - b.n cbd30 │ │ + b.n cbd40 │ │ movs r5, r2 │ │ and.w r0, r0, r0 │ │ - b.n cc2c8 │ │ + b.n cc2d8 │ │ movs r3, r6 │ │ lsrs r0, r0, #8 │ │ movs r0, #136 @ 0x88 │ │ - b.n cb74a │ │ + b.n cb75a │ │ movs r2, #129 @ 0x81 │ │ - b.n cbd2a │ │ + b.n cbd3a │ │ movs r0, #12 │ │ - b.n cb74e │ │ + b.n cb75e │ │ movs r7, r0 │ │ - b.n cbed2 │ │ + b.n cbee2 │ │ @ instruction: 0xffae1aff │ │ movs r5, r5 │ │ and.w r0, r0, r0 │ │ - b.n cc37a │ │ - beq.n cbc74 │ │ - b.n cc0d4 │ │ + b.n cc38a │ │ + beq.n cbc84 │ │ + b.n cc0e4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r5} │ │ - b.n cc26a │ │ + b.n cc27a │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ str r4, [r3, #32] │ │ - b.n cb78c │ │ + b.n cb79c │ │ lsls r0, r0, #1 │ │ - b.n cc276 │ │ + b.n cc286 │ │ lsls r0, r3, #8 │ │ - b.n cb794 │ │ + b.n cb7a4 │ │ str r6, [r0, #0] │ │ - b.n cbd78 │ │ + b.n cbd88 │ │ movs r0, r0 │ │ - b.n cbd7c │ │ + b.n cbd8c │ │ movs r6, r0 │ │ asrs r0, r4, #6 │ │ movs r1, r0 │ │ and.w r1, r0, ip, ror #3 │ │ - b.n cb7a8 │ │ + b.n cb7b8 │ │ movs r0, r0 │ │ - b.n cbd8c │ │ + b.n cbd9c │ │ str r0, [sp, #4] │ │ - b.n cbfb2 │ │ + b.n cbfc2 │ │ asrs r1, r0, #10 │ │ - b.n cbd92 │ │ + b.n cbda2 │ │ str r2, [r0, #0] │ │ - b.n cbfba │ │ + b.n cbfca │ │ movs r0, #68 @ 0x44 │ │ - b.n cb7a8 │ │ + b.n cb7b8 │ │ movs r4, r1 │ │ - b.n cb784 │ │ + b.n cb794 │ │ asrs r4, r1, #32 │ │ - b.n cbfc6 │ │ + b.n cbfd6 │ │ movs r0, r1 │ │ - b.n cb7c4 │ │ + b.n cb7d4 │ │ adds r0, #4 │ │ - b.n cb7a8 │ │ + b.n cb7b8 │ │ lsls r0, r0, #8 │ │ - b.n cbfd2 │ │ + b.n cbfe2 │ │ strh r0, [r6, #4] │ │ - b.n cbfda │ │ + b.n cbfea │ │ movs r0, r0 │ │ - b.n cc3da │ │ + b.n cc3ea │ │ movs r4, r0 │ │ - b.n cb7a2 │ │ + b.n cb7b2 │ │ movs r4, r0 │ │ - b.n cbfe2 │ │ - add r4, pc, #404 @ (adr r4, cbe38 ) │ │ + b.n cbff2 │ │ + add r4, pc, #404 @ (adr r4, cbe48 ) │ │ @ instruction: 0xebff0000 │ │ - b.n cc34a │ │ + b.n cc35a │ │ lsls r7, r3, #1 │ │ subs r0, r0, r0 │ │ lsls r4, r1, #2 │ │ - b.n cb7da │ │ + b.n cb7ea │ │ movs r0, #128 @ 0x80 │ │ - b.n cc3c6 │ │ + b.n cc3d6 │ │ asrs r1, r1, #32 │ │ - b.n cbffa │ │ + b.n cc00a │ │ movs r0, #9 │ │ - b.n cbc3e │ │ + b.n cbc4e │ │ movs r0, #153 @ 0x99 │ │ - b.n cc402 │ │ + b.n cc412 │ │ lsls r0, r2, #2 │ │ - b.n cb7ee │ │ - bl 5277c6 │ │ - add r1, pc, #36 @ (adr r1, cbcf0 ) │ │ - b.n cbbce │ │ + b.n cb7fe │ │ + bl 5277d6 │ │ + add r1, pc, #36 @ (adr r1, cbd00 ) │ │ + b.n cbbde │ │ adds r0, #80 @ 0x50 │ │ - b.n cb7fc │ │ + b.n cb80c │ │ lsls r4, r1, #1 │ │ - b.n cb800 │ │ - add r1, pc, #36 @ (adr r1, cbcfc ) │ │ - b.n cbbe0 │ │ + b.n cb810 │ │ + add r1, pc, #36 @ (adr r1, cbd0c ) │ │ + b.n cbbf0 │ │ movs r0, #9 │ │ - b.n cbc5e │ │ + b.n cbc6e │ │ adds r0, #4 │ │ - b.n cb81c │ │ + b.n cb82c │ │ movs r4, r0 │ │ - b.n cb810 │ │ + b.n cb820 │ │ movs r4, r0 │ │ - b.n cc3ea │ │ + b.n cc3fa │ │ movs r4, r0 │ │ - b.n cb7f8 │ │ + b.n cb808 │ │ movs r0, r0 │ │ - b.n cc398 │ │ + b.n cc3a8 │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ lsls r4, r1, #2 │ │ - b.n cb822 │ │ + b.n cb832 │ │ movs r1, r0 │ │ - b.n cbdfe │ │ + b.n cbe0e │ │ lsls r0, r2, #3 │ │ - b.n cc0a2 │ │ + b.n cc0b2 │ │ movs r1, r0 │ │ - b.n cc3e6 │ │ + b.n cc3f6 │ │ movs r7, r5 │ │ - bge.n cbd0a │ │ + bge.n cbd1a │ │ lsls r4, r4, #5 │ │ - b.n cb84c │ │ + b.n cb85c │ │ movs r0, r1 │ │ - b.n cc33e │ │ + b.n cc34e │ │ movs r1, #96 @ 0x60 │ │ - b.n cb854 │ │ + b.n cb864 │ │ adds r1, #96 @ 0x60 │ │ - b.n cb858 │ │ + b.n cb868 │ │ movs r0, r0 │ │ - b.n cbe3c │ │ + b.n cbe4c │ │ movs r0, #2 │ │ - b.n cbe40 │ │ + b.n cbe50 │ │ adds r0, #3 │ │ - b.n cbe44 │ │ + b.n cbe54 │ │ adds r0, #0 │ │ asrs r0, r4, #6 │ │ movs r2, r0 │ │ - b.n cc35a │ │ + b.n cc36a │ │ adds r0, #2 │ │ asrs r0, r4, #6 │ │ lsls r0, r1, #2 │ │ - b.n cb85e │ │ + b.n cb86e │ │ movs r2, #129 @ 0x81 │ │ - b.n cbc5a │ │ + b.n cbc6a │ │ movs r3, r0 │ │ - b.n cbfe2 │ │ + b.n cbff2 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #140 @ 0x8c │ │ - b.n cb86e │ │ + b.n cb87e │ │ movs r0, #1 │ │ - b.n cbe4e │ │ + b.n cbe5e │ │ movs r0, #208 @ 0xd0 │ │ - b.n cc0f2 │ │ + b.n cc102 │ │ movs r0, r0 │ │ - b.n cc3f6 │ │ + b.n cc406 │ │ movs r7, r1 │ │ - ldr r2, [pc, #0] @ (cbd54 ) │ │ + ldr r2, [pc, #0] @ (cbd64 ) │ │ adds r2, #129 @ 0x81 │ │ - b.n cbc5a │ │ + b.n cbc6a │ │ movs r0, r0 │ │ - b.n cc40c │ │ + b.n cc41c │ │ movs r7, r1 │ │ lsrs r0, r0, #8 │ │ movs r2, #129 @ 0x81 │ │ - b.n cbe66 │ │ + b.n cbe76 │ │ movs r0, r0 │ │ - b.n cc4aa │ │ + b.n cc4ba │ │ adds r0, #12 │ │ - b.n cb8d2 │ │ + b.n cb8e2 │ │ movs r7, r0 │ │ - b.n cc018 │ │ + b.n cc028 │ │ vpmin.u16 q8, , │ │ adds r0, #140 @ 0x8c │ │ - b.n cb8a2 │ │ + b.n cb8b2 │ │ asrs r1, r0, #32 │ │ - b.n cbe84 │ │ + b.n cbe94 │ │ asrs r0, r2, #3 │ │ - b.n cc124 │ │ + b.n cc134 │ │ movs r0, r0 │ │ - b.n cc428 │ │ + b.n cc438 │ │ movs r2, r0 │ │ - ldr r2, [pc, #0] @ (cbd88 ) │ │ + ldr r2, [pc, #0] @ (cbd98 ) │ │ strb r0, [r0, #0] │ │ - b.n cb892 │ │ - beq.n cbdc8 │ │ - b.n cc228 │ │ + b.n cb8a2 │ │ + beq.n cbdd8 │ │ + b.n cc238 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, r2, r4} │ │ - b.n cc4da │ │ - beq.n cbdd4 │ │ - b.n cc234 │ │ + b.n cc4ea │ │ + beq.n cbde4 │ │ + b.n cc244 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, r7, sp} │ │ - b.n cb8ce │ │ + b.n cb8de │ │ movs r0, #1 │ │ - b.n cbeae │ │ + b.n cbebe │ │ movs r0, #208 @ 0xd0 │ │ - b.n cc152 │ │ + b.n cc162 │ │ movs r1, r0 │ │ - b.n cc496 │ │ + b.n cc4a6 │ │ movs r3, r1 │ │ - bge.n cbdb6 │ │ + bge.n cbdc6 │ │ movs r4, r0 │ │ - b.n cc3e6 │ │ + b.n cc3f6 │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ strb r4, [r7, #2] │ │ - b.n cb900 │ │ + b.n cb910 │ │ strb r7, [r0, #0] │ │ - b.n cbee4 │ │ + b.n cbef4 │ │ @ instruction: 0xffe5eaff │ │ lsls r0, r1, #2 │ │ - b.n cb8f6 │ │ + b.n cb906 │ │ adds r2, #129 @ 0x81 │ │ - b.n cbcf2 │ │ + b.n cbd02 │ │ lsls r0, r1, #2 │ │ - b.n cb8fe │ │ + b.n cb90e │ │ movs r2, #129 @ 0x81 │ │ - b.n cbcfa │ │ + b.n cbd0a │ │ movs r3, r0 │ │ - b.n cc082 │ │ + b.n cc092 │ │ @ instruction: 0xffd71aff │ │ @ instruction: 0xffdceaff │ │ movs r2, #129 @ 0x81 │ │ - b.n cbeea │ │ + b.n cbefa │ │ strb r4, [r1, #0] │ │ - b.n cb912 │ │ + b.n cb922 │ │ @ instruction: 0xffdbeaff │ │ movs r0, r4 │ │ - b.n cc422 │ │ + b.n cc432 │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ movs r0, #136 @ 0x88 │ │ - b.n cb93c │ │ + b.n cb94c │ │ lsls r0, r0, #1 │ │ - b.n cc42e │ │ + b.n cc43e │ │ strb r4, [r0, #2] │ │ - b.n cb944 │ │ + b.n cb954 │ │ movs r0, #2 │ │ - b.n cbf28 │ │ + b.n cbf38 │ │ strb r7, [r0, #0] │ │ - b.n cbf2c │ │ + b.n cbf3c │ │ strb r2, [r0, #0] │ │ asrs r0, r4, #6 │ │ @ instruction: 0xffd2eaff │ │ strb r0, [r5, #1] │ │ - b.n cb958 │ │ + b.n cb968 │ │ strb r7, [r0, #0] │ │ - b.n cbf3c │ │ + b.n cbf4c │ │ @ instruction: 0xffcfeaff │ │ lsrs r5, r3, #29 │ │ - b.n cc326 │ │ - beq.n cbe60 │ │ - b.n cc2c0 │ │ + b.n cc336 │ │ + beq.n cbe70 │ │ + b.n cc2d0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, r6} │ │ - b.n cb95c │ │ + b.n cb96c │ │ asrs r0, r0, #2 │ │ - b.n cc576 │ │ + b.n cc586 │ │ asrs r1, r1, #32 │ │ - b.n cbdba │ │ + b.n cbdca │ │ movs r4, r0 │ │ - b.n cb968 │ │ + b.n cb978 │ │ movs r2, r0 │ │ - b.n cc542 │ │ + b.n cc552 │ │ movs r4, r0 │ │ - b.n cb950 │ │ + b.n cb960 │ │ lsls r0, r0, #31 │ │ - b.n cc45a │ │ + b.n cc46a │ │ lsrs r7, r7, #31 │ │ - b.n cc4ec │ │ + b.n cc4fc │ │ movs r5, r0 │ │ - b.n cc352 │ │ - beq.n cbe8c │ │ - b.n cc2ec │ │ + b.n cc362 │ │ + beq.n cbe9c │ │ + b.n cc2fc │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, r9, fp, ip, lr} │ │ vqshrn.u64 d21, q10, #1 │ │ vtbl.8 d21, {d15-d18}, d20 │ │ @ instruction: 0xffff5b5c │ │ vqrshrn.u64 d21, q8, #1 │ │ @ instruction: 0xffff58b0 │ │ @@ -265979,15108 +265859,15108 @@ │ │ @ instruction: 0xffff59d8 │ │ vtbl.8 d21, {d31- instruction: 0xffff57c0 │ │ vabdl.u , d15, d0 │ │ @ instruction: 0xffff58f0 │ │ vcvt.f16.u16 d20, d0, #1 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n cc3b4 │ │ + b.n cc3c4 │ │ adds r0, #8 │ │ - b.n cb9d4 │ │ + b.n cb9e4 │ │ ands r2, r0 │ │ - b.n cc1e2 │ │ + b.n cc1f2 │ │ adds r3, #230 @ 0xe6 │ │ add.w r0, r0, r1 │ │ - b.n cc58a │ │ + b.n cc59a │ │ movs r2, r0 │ │ - bge.n cbeae │ │ + bge.n cbebe │ │ movs r4, r0 │ │ - b.n cbf52 │ │ + b.n cbf62 │ │ movs r5, r7 │ │ asrs r0, r0, #12 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r2, r5, r6, r9, ip, sp} │ │ add.w r0, r0, r0 │ │ - b.n cb9e2 │ │ + b.n cb9f2 │ │ movs r0, r0 │ │ - b.n cc566 │ │ + b.n cc576 │ │ movs r5, r0 │ │ lsls r0, r0, #12 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r4, r5, fp, lr} │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n cc3f0 │ │ - beq.n cbef8 │ │ - b.n cc374 │ │ + b.n cc400 │ │ + beq.n cbf08 │ │ + b.n cc384 │ │ ands r0, r0 │ │ - b.n cc21e │ │ + b.n cc22e │ │ str r0, [r1, r1] │ │ - b.n cba02 │ │ + b.n cba12 │ │ adds r2, #158 @ 0x9e │ │ add.w r8, r0, r1 │ │ - b.n cc58a │ │ + b.n cc59a │ │ movs r0, r1 │ │ add r2, sp, #0 │ │ lsrs r7, r0, #20 │ │ - b.n cc3fc │ │ + b.n cc40c │ │ adds r2, #246 @ 0xf6 │ │ add.w r7, r0, r6, lsl #7 │ │ - b.n cc50a │ │ + b.n cc51a │ │ subs r7, r7, #7 │ │ - b.n cc59c │ │ + b.n cc5ac │ │ movs r1, r0 │ │ - b.n cc1a2 │ │ + b.n cc1b2 │ │ movs r0, r0 │ │ asrs r0, r2, #13 │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ - beq.n cbf1c │ │ - b.n cc3a4 │ │ + beq.n cbf2c │ │ + b.n cc3b4 │ │ ldrh r0, [r6, #0] │ │ ldmia.w sp!, {r2, r6, ip} │ │ - b.n cba54 │ │ + b.n cba64 │ │ movs r0, #38 @ 0x26 │ │ - b.n cc65a │ │ + b.n cc66a │ │ adds r0, #64 @ 0x40 │ │ - b.n cba5c │ │ + b.n cba6c │ │ asrs r1, r0, #32 │ │ - b.n cc040 │ │ + b.n cc050 │ │ movs r0, #0 │ │ - b.n cba40 │ │ + b.n cba50 │ │ adds r0, #3 │ │ - b.n cc048 │ │ + b.n cc058 │ │ movs r4, r0 │ │ - b.n cba48 │ │ + b.n cba58 │ │ movs r0, r1 │ │ - b.n cba4c │ │ + b.n cba5c │ │ movs r0, r0 │ │ - b.n cc676 │ │ + b.n cc686 │ │ movs r2, #241 @ 0xf1 │ │ - b.n cc53a │ │ - subs r4, #186 @ 0xba │ │ + b.n cc54a │ │ + subs r4, #185 @ 0xb9 │ │ @ instruction: 0xebff0026 │ │ - b.n cc682 │ │ + b.n cc692 │ │ str r0, [r0, r0] │ │ - b.n cc286 │ │ + b.n cc296 │ │ movs r4, r0 │ │ - b.n cc28a │ │ + b.n cc29a │ │ asrs r5, r0, #32 │ │ - b.n cc28e │ │ + b.n cc29e │ │ movs r5, r7 │ │ add.w r0, r0, r5 │ │ - b.n cc296 │ │ - beq.n cbf68 │ │ - b.n cc3f0 │ │ + b.n cc2a6 │ │ + beq.n cbf78 │ │ + b.n cc400 │ │ ldrh r0, [r6, #0] │ │ - ldmia.w sp!, {r0, r1, r4, r5, r6, r7, r8, sl, sp} │ │ - @ instruction: 0xfff4e9bb │ │ + ldmia.w sp!, {r0, r2, r3, r4, r5, r7, r8, r9, sl, sp} │ │ + vtbl.8 d30, {d4-d5}, d19 │ │ @ instruction: 0xfff34df0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n cc488 │ │ - beq.n cbf90 │ │ - b.n cc40c │ │ + b.n cc498 │ │ + beq.n cbfa0 │ │ + b.n cc41c │ │ ands r0, r0 │ │ - b.n cc2b6 │ │ + b.n cc2c6 │ │ lsls r0, r1, #1 │ │ - b.n cba9a │ │ + b.n cbaaa │ │ lsrs r7, r0, #20 │ │ - b.n cc47e │ │ + b.n cc48e │ │ adds r2, #215 @ 0xd7 │ │ add.w r0, r0, r0 │ │ - b.n cc626 │ │ + b.n cc636 │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ - beq.n cbfbc │ │ - b.n cc424 │ │ + beq.n cbfcc │ │ + b.n cc434 │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {pc} │ │ - b.n cc2d6 │ │ + b.n cc2e6 │ │ adds r2, #213 @ 0xd5 │ │ add.w r0, r0, r8, asr #29 │ │ - b.n cbac6 │ │ + b.n cbad6 │ │ str r0, [r0, r0] │ │ - b.n cc2e2 │ │ - b.n cbfb4 │ │ - b.n cc2e6 │ │ + b.n cc2f2 │ │ + b.n cbfc4 │ │ + b.n cc2f6 │ │ movs r7, r0 │ │ - b.n cc24a │ │ + b.n cc25a │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ lsls r0, r7, #1 │ │ - b.n cbaf0 │ │ + b.n cbb00 │ │ movs r0, r0 │ │ - b.n cc0d4 │ │ + b.n cc0e4 │ │ lsls r2, r3, #1 │ │ - b.n cbb5a │ │ + b.n cbb6a │ │ movs r3, r0 │ │ - b.n cc65e │ │ + b.n cc66e │ │ movs r4, r2 │ │ subs r2, #0 │ │ asrs r0, r5, #1 │ │ - b.n cbb04 │ │ + b.n cbb14 │ │ adds r0, #104 @ 0x68 │ │ - b.n cbb08 │ │ + b.n cbb18 │ │ stmia r0!, {r3, r5, r6} │ │ - b.n cbb0c │ │ + b.n cbb1c │ │ asrs r1, r0, #32 │ │ - b.n cc0f0 │ │ + b.n cc100 │ │ movs r0, r6 │ │ - b.n cbafe │ │ + b.n cbb0e │ │ adds r0, #3 │ │ - b.n cc0f8 │ │ + b.n cc108 │ │ str r0, [r1, #4] │ │ - b.n cbb06 │ │ + b.n cbb16 │ │ stmia r0!, {r2, r3} │ │ - b.n cc100 │ │ + b.n cc110 │ │ movs r0, #84 @ 0x54 │ │ - b.n cbb24 │ │ + b.n cbb34 │ │ movs r0, r0 │ │ - b.n cc296 │ │ + b.n cc2a6 │ │ ands r0, r0 │ │ - b.n cbb08 │ │ + b.n cbb18 │ │ movs r0, #2 │ │ - b.n cc110 │ │ + b.n cc120 │ │ movs r0, #12 │ │ lsls r0, r4, #6 │ │ movs r7, r0 │ │ - b.n cc0a4 │ │ + b.n cc0b4 │ │ eors r4, r0 │ │ @ instruction: 0xe98d0003 │ │ asrs r0, r0, #12 │ │ cmp r7, #205 @ 0xcd │ │ - b.n cc746 │ │ - subs r4, #135 @ 0x87 │ │ + b.n cc756 │ │ + subs r4, #134 @ 0x86 │ │ @ instruction: 0xebffe008 │ │ - b.n cc34e │ │ + b.n cc35e │ │ movs r7, r0 │ │ - b.n cc2bc │ │ + b.n cc2cc │ │ @ instruction: 0xffdc1aff │ │ movs r4, r4 │ │ - b.n cbb58 │ │ + b.n cbb68 │ │ movs r0, #14 │ │ - b.n cc35e │ │ + b.n cc36e │ │ asrs r0, r4, #32 │ │ - b.n cbb60 │ │ + b.n cbb70 │ │ movs r0, r0 │ │ - b.n cc144 │ │ + b.n cc154 │ │ asrs r1, r0, #32 │ │ - b.n cc148 │ │ - orrs r6, r1 │ │ - @ instruction: 0xebff2898 │ │ - movs r1, r0 │ │ - ble.n cbf3c │ │ - vrsubhn.i d18, , │ │ - vtbx.8 d30, {d20-d22}, d24 │ │ - @ instruction: 0xfff3ffb4 │ │ - vtbl.8 d31, {d19}, d25 │ │ - vqrdmlah.s q8, , d14[0] │ │ + b.n cc158 │ │ + orrs r5, r1 │ │ + @ instruction: 0xebff28a8 │ │ + movs r1, r0 │ │ + udf #73 @ 0x49 │ │ + @ instruction: 0xfff327eb │ │ + @ instruction: 0xfff4ea50 │ │ + vcvt.u32.f32 , q11, #13 │ │ + vtbl.8 d31, {d19}, d9 │ │ + vqrdmlsh.s q8, , d1[0] │ │ vqshrun.s64 d20, q8, #12 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n cc56c │ │ - beq.n cc064 │ │ - b.n cc4f0 │ │ + b.n cc57c │ │ + beq.n cc074 │ │ + b.n cc500 │ │ str r0, [r0, r0] │ │ - b.n cc39a │ │ + b.n cc3aa │ │ lsls r0, r3, #1 │ │ - b.n cbb9c │ │ + b.n cbbac │ │ ands r1, r0 │ │ - b.n cc3a2 │ │ + b.n cc3b2 │ │ movs r0, r0 │ │ - b.n cc184 │ │ + b.n cc194 │ │ lsls r2, r3, #1 │ │ - b.n cbc0a │ │ + b.n cbc1a │ │ movs r0, r0 │ │ - b.n cc70e │ │ + b.n cc71e │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ movs r3, r4 │ │ - b.n cc71e │ │ + b.n cc72e │ │ movs r4, r0 │ │ asrs r5, r2, #22 │ │ lsls r2, r0, #4 │ │ asrs r0, r0, #14 │ │ movs r4, r0 │ │ asrs r5, r0, #22 │ │ movs r4, r0 │ │ - b.n cc3c6 │ │ - beq.n cc098 │ │ - b.n cc520 │ │ + b.n cc3d6 │ │ + beq.n cc0a8 │ │ + b.n cc530 │ │ ldrh r0, [r6, #0] │ │ ldmia.w sp!, {r2} │ │ - b.n cc3d2 │ │ - strb r0, [r3, #22] │ │ + b.n cc3e2 │ │ + strb r7, [r2, #22] │ │ @ instruction: 0xebff1020 │ │ - b.n cbbd8 │ │ + b.n cbbe8 │ │ cmp r6, #46 @ 0x2e │ │ - b.n cc7de │ │ + b.n cc7ee │ │ adds r0, #28 │ │ - b.n cbbe0 │ │ + b.n cbbf0 │ │ asrs r1, r0, #32 │ │ - b.n cc1c4 │ │ + b.n cc1d4 │ │ movs r0, r0 │ │ - b.n cbbc4 │ │ + b.n cbbd4 │ │ adds r0, #3 │ │ - b.n cc1cc │ │ + b.n cc1dc │ │ movs r1, r0 │ │ - b.n cc7f2 │ │ - subs r4, #92 @ 0x5c │ │ + b.n cc802 │ │ + subs r4, #91 @ 0x5b │ │ @ instruction: 0xebffffed │ │ - @ instruction: 0xeaff27e8 │ │ + @ instruction: 0xeaff27f8 │ │ movs r1, r0 │ │ - cmp r0, #96 @ 0x60 │ │ - @ instruction: 0xfff42bbe │ │ + cmp r2, #47 @ 0x2f │ │ + vqrdmulh.s q9, q2, d0[0] │ │ @ instruction: 0xfff44ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n cc5e8 │ │ - beq.n cc108 │ │ - b.n cc56c │ │ - str r0, [sp, #0] │ │ - b.n cc416 │ │ - add r0, pc, #64 @ (adr r0, cc118 ) │ │ - b.n cbc10 │ │ + b.n cc5f8 │ │ + beq.n cc118 │ │ + b.n cc57c │ │ + str r0, [sp, #0] │ │ + b.n cc426 │ │ + add r0, pc, #64 @ (adr r0, cc128 ) │ │ + b.n cbc20 │ │ movs r0, r1 │ │ - b.n cbc14 │ │ + b.n cbc24 │ │ asrs r3, r0, #32 │ │ - b.n cc422 │ │ + b.n cc432 │ │ str r2, [r0, #0] │ │ - b.n cc426 │ │ + b.n cc436 │ │ movs r0, r0 │ │ - b.n cc79e │ │ + b.n cc7ae │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #208 @ 0xd0 │ │ - b.n cc486 │ │ + b.n cc496 │ │ movs r0, #3 │ │ - b.n cc3fa │ │ + b.n cc40a │ │ cmp r7, #18 │ │ - b.n cc3d8 │ │ + b.n cc3e8 │ │ strb r2, [r4, #10] │ │ - b.n cc43e │ │ + b.n cc44e │ │ movs r0, r0 │ │ and.w r0, r0, r1, lsl #28 │ │ - b.n cc846 │ │ + b.n cc856 │ │ strh r4, [r1, #0] │ │ - b.n cbc40 │ │ + b.n cbc50 │ │ movs r0, #8 │ │ - b.n cbc2e │ │ - bl 527c0e │ │ + b.n cbc3e │ │ + bl 527c1e │ │ adds r0, #12 │ │ - b.n cbc36 │ │ - bl 527c16 │ │ + b.n cbc46 │ │ + bl 527c26 │ │ lsls r0, r5 │ │ - b.n cbc3e │ │ + b.n cbc4e │ │ lsls r4, r5 │ │ - b.n cbc42 │ │ + b.n cbc52 │ │ lsls r0, r6 │ │ - b.n cbc46 │ │ - bl 527c26 │ │ + b.n cbc56 │ │ + bl 527c36 │ │ str r4, [r6, r2] │ │ - b.n cbc4e │ │ - bl 527c2e │ │ + b.n cbc5e │ │ + bl 527c3e │ │ ands r4, r0 │ │ - b.n cc17a │ │ + b.n cc18a │ │ str r5, [r0, r0] │ │ - b.n cc180 │ │ + b.n cc190 │ │ str r5, [r0, r0] │ │ - b.n cc466 │ │ + b.n cc476 │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ str r3, [r0, r0] │ │ - b.n cc46a │ │ + b.n cc47a │ │ movs r6, r1 │ │ lsrs r0, r0, #8 │ │ str r6, [r0, #0] │ │ - b.n cc1f2 │ │ + b.n cc202 │ │ asrs r1, r0, #32 │ │ - b.n cc2f8 │ │ + b.n cc308 │ │ movs r3, r1 │ │ subs r2, #0 │ │ asrs r0, r5, #32 │ │ - b.n cc65a │ │ + b.n cc66a │ │ lsls r1, r0, #2 │ │ @ instruction: 0xe98d0009 │ │ - b.n cc4a2 │ │ + b.n cc4b2 │ │ asrs r0, r0, #32 │ │ - b.n cbc80 │ │ - bvs.n cc260 │ │ + b.n cbc90 │ │ + bvs.n cc270 │ │ @ instruction: 0xebff0000 │ │ - b.n cc80e │ │ + b.n cc81e │ │ movs r0, r0 │ │ asrs r0, r4, #14 │ │ - beq.n cc1ac │ │ + beq.n cc1bc │ │ asrs r3, r1, #9 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ adds r5, r7, r2 │ │ movs r0, r5 │ │ and.w r0, r0, r0, lsl #8 │ │ - b.n cc8c2 │ │ + b.n cc8d2 │ │ adds r0, #0 │ │ - b.n cc8c6 │ │ + b.n cc8d6 │ │ movs r0, r0 │ │ - b.n cc838 │ │ + b.n cc848 │ │ movs r4, r4 │ │ lsrs r0, r0, #8 │ │ asrs r0, r1, #1 │ │ - b.n cbcc4 │ │ + b.n cbcd4 │ │ strb r2, [r0, #4] │ │ - b.n cc956 │ │ + b.n cc966 │ │ str r0, [r4, #8] │ │ - b.n cbcbc │ │ + b.n cbccc │ │ lsls r2, r1, #4 │ │ - b.n cc88a │ │ + b.n cc89a │ │ strb r0, [r4, #2] │ │ str r5, [sp, #580] @ 0x244 │ │ str r0, [r2, #8] │ │ - b.n cbce4 │ │ + b.n cbcf4 │ │ strb r1, [r0, #0] │ │ str r2, [sp, #540] @ 0x21c │ │ str r6, [r0, #0] │ │ - b.n cc2cc │ │ + b.n cc2dc │ │ str r2, [r3, #4] │ │ - b.n cbd5e │ │ + b.n cbd6e │ │ strb r0, [r4, #2] │ │ - b.n cbcb8 │ │ + b.n cbcc8 │ │ movs r2, r0 │ │ - b.n cc866 │ │ + b.n cc876 │ │ movs r0, r3 │ │ subs r2, #0 │ │ strb r4, [r3, #1] │ │ - b.n cbd74 │ │ + b.n cbd84 │ │ str r3, [r0, r0] │ │ - b.n cc4ea │ │ + b.n cc4fa │ │ stmia r0!, {r4, r5, r6} │ │ - b.n cbd08 │ │ + b.n cbd18 │ │ eors r0, r6 │ │ - b.n cbd0c │ │ + b.n cbd1c │ │ asrs r0, r6, #1 │ │ - b.n cbd10 │ │ + b.n cbd20 │ │ stmia r0!, {r2, r3} │ │ - b.n cc2f4 │ │ + b.n cc304 │ │ str r0, [r2, #0] │ │ - b.n cbd0c │ │ + b.n cbd1c │ │ ands r4, r0 │ │ - b.n cc2fc │ │ - b.n cc2a8 │ │ - b.n cbd20 │ │ + b.n cc30c │ │ + b.n cc2b8 │ │ + b.n cbd30 │ │ asrs r1, r0, #32 │ │ - b.n cc304 │ │ + b.n cc314 │ │ str r0, [r4, r1] │ │ - b.n cbd28 │ │ + b.n cbd38 │ │ movs r6, r0 │ │ - b.n cc26e │ │ + b.n cc27e │ │ ands r4, r1 │ │ asrs r0, r4, #6 │ │ movs r0, #8 │ │ - b.n cbd10 │ │ + b.n cbd20 │ │ str r5, [r0, r0] │ │ - b.n cc318 │ │ + b.n cc328 │ │ lsls r0, r6, #28 │ │ - b.n cc53e │ │ + b.n cc54e │ │ adds r0, #12 │ │ - b.n cbd1c │ │ + b.n cbd2c │ │ movs r0, #154 @ 0x9a │ │ - b.n cc946 │ │ + b.n cc956 │ │ movs r0, r2 │ │ - b.n cbd24 │ │ + b.n cbd34 │ │ movs r2, r0 │ │ - b.n cc94e │ │ + b.n cc95e │ │ adds r0, #5 │ │ - b.n cc552 │ │ - b.n cc230 │ │ - b.n cc334 │ │ + b.n cc562 │ │ + b.n cc240 │ │ + b.n cc344 │ │ ands r0, r0 │ │ - b.n cbd34 │ │ - b.n cc244 │ │ - b.n cbd38 │ │ - subs r4, #1 │ │ + b.n cbd44 │ │ + b.n cc254 │ │ + b.n cbd48 │ │ + subs r4, #0 │ │ @ instruction: 0xebff000a │ │ - b.n cc566 │ │ + b.n cc576 │ │ asrs r0, r1, #32 │ │ - b.n cc56a │ │ + b.n cc57a │ │ movs r0, #9 │ │ - b.n cc56e │ │ - beq.n cc268 │ │ - b.n cc6c8 │ │ - ldr r7, [pc, #960] @ (cc5f4 ) │ │ + b.n cc57e │ │ + beq.n cc278 │ │ + b.n cc6d8 │ │ + ldr r7, [pc, #960] @ (cc604 ) │ │ ldmia.w sp!, {r0, r2, r3, r5, r6, r7, r8, r9, sl, ip, lr, pc} │ │ - @ instruction: 0xeaff26a0 │ │ + @ instruction: 0xeaff26b0 │ │ movs r1, r0 │ │ - stc2l 15, cr15, [r5, #972] @ 0x3cc │ │ - subs r3, #79 @ 0x4f │ │ - @ instruction: 0xfff40d21 │ │ - vmull.u q8, d20, d15 │ │ - vqneg.s16 d18, d1 │ │ + stc2 15, cr15, [r7, #972] @ 0x3cc │ │ + subs r3, #143 @ 0x8f │ │ + @ instruction: 0xfff40d94 │ │ + @ instruction: 0xfff40d02 │ │ + vqrshrn.u64 d18, q0, #12 │ │ @ instruction: 0xfff448f0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n cc774 │ │ + b.n cc784 │ │ str r0, [r0, r0] │ │ - b.n cc59e │ │ + b.n cc5ae │ │ movs r6, r0 │ │ - b.n cbe02 │ │ + b.n cbe12 │ │ ands r2, r0 │ │ - b.n cc5a6 │ │ + b.n cc5b6 │ │ movs r0, r1 │ │ - b.n cc88a │ │ + b.n cc89a │ │ movs r3, r2 │ │ subs r0, r0, r0 │ │ str r4, [r2, #0] │ │ - b.n cbd9c │ │ + b.n cbdac │ │ movs r6, r0 │ │ - b.n cc5b6 │ │ + b.n cc5c6 │ │ adds r2, #77 @ 0x4d │ │ add.w r0, r0, r0, lsl #4 │ │ - b.n cc5be │ │ + b.n cc5ce │ │ movs r0, r0 │ │ - b.n cc9c2 │ │ + b.n cc9d2 │ │ movs r0, r0 │ │ - b.n cc928 │ │ + b.n cc938 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ adds r1, #112 @ 0x70 │ │ add.w r0, r0, r0 │ │ - b.n cbdb2 │ │ + b.n cbdc2 │ │ movs r4, r0 │ │ - b.n cc936 │ │ + b.n cc946 │ │ @ instruction: 0xfff50aff │ │ asrs r0, r1, #1 │ │ - b.n cbdc8 │ │ + b.n cbdd8 │ │ cmp r0, #216 @ 0xd8 │ │ - b.n cc624 │ │ + b.n cc634 │ │ str r1, [r0, #0] │ │ - b.n cc7ca │ │ + b.n cc7da │ │ strb r0, [r0, #0] │ │ - b.n cc7f0 │ │ + b.n cc800 │ │ ldr r0, [r7, #12] │ │ - b.n cc630 │ │ + b.n cc640 │ │ movs r0, r0 │ │ - b.n cc952 │ │ + b.n cc962 │ │ asrs r0, r1, #1 │ │ lsls r5, r2, #22 │ │ ands r4, r2 │ │ lsls r1, r0, #22 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r2, r5, r6} │ │ - b.n cbe00 │ │ + b.n cbe10 │ │ adds r0, #3 │ │ - b.n cca06 │ │ + b.n cca16 │ │ asrs r4, r3, #1 │ │ - b.n cbe74 │ │ + b.n cbe84 │ │ movs r0, r0 │ │ - b.n cc3ec │ │ + b.n cc3fc │ │ movs r0, #80 @ 0x50 │ │ - b.n cbdf2 │ │ + b.n cbe02 │ │ movs r0, r2 │ │ - b.n cbe00 │ │ + b.n cbe10 │ │ asrs r3, r2, #4 │ │ - b.n cc3de │ │ + b.n cc3ee │ │ movs r0, #0 │ │ - b.n cc7a2 │ │ + b.n cc7b2 │ │ asrs r1, r0, #32 │ │ - b.n cc764 │ │ + b.n cc774 │ │ asrs r2, r0, #32 │ │ - b.n cc2e8 │ │ + b.n cc2f8 │ │ movs r0, #4 │ │ - b.n cca2a │ │ + b.n cca3a │ │ adds r2, #24 │ │ add.w r0, r0, r0 │ │ - b.n cc992 │ │ + b.n cc9a2 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ adds r1, #85 @ 0x55 │ │ add.w r0, r0, r0 │ │ - b.n cbe1e │ │ + b.n cbe2e │ │ movs r0, r0 │ │ and.w r0, r0, r0 │ │ - b.n cca46 │ │ + b.n cca56 │ │ asrs r0, r1, #1 │ │ - b.n cbe34 │ │ + b.n cbe44 │ │ cmp r0, #208 @ 0xd0 │ │ - b.n cc690 │ │ + b.n cc6a0 │ │ str r1, [r0, #0] │ │ - b.n cc836 │ │ + b.n cc846 │ │ strb r0, [r0, #0] │ │ - b.n cc85c │ │ + b.n cc86c │ │ ldr r0, [r6, #12] │ │ - b.n cc69c │ │ + b.n cc6ac │ │ movs r0, r0 │ │ - b.n cc9be │ │ + b.n cc9ce │ │ asrs r0, r1, #1 │ │ lsls r5, r2, #22 │ │ ands r4, r2 │ │ lsls r1, r0, #22 │ │ ldrh r0, [r6, #6] │ │ - ldmia.w sp!, {r7, r8, sl, sp} │ │ + ldmia.w sp!, {r4, r7, r8, sl, sp} │ │ movs r1, r0 │ │ - ldr r3, [pc, #960] @ (cc6f0 ) │ │ + ldr r3, [pc, #960] @ (cc700 ) │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n cc850 │ │ - beq.n cc3a8 │ │ - b.n cc7d4 │ │ + b.n cc860 │ │ + beq.n cc3b8 │ │ + b.n cc7e4 │ │ movs r0, #112 @ 0x70 │ │ - b.n cbe5e │ │ + b.n cbe6e │ │ str r4, [r6, r0] │ │ - b.n cc842 │ │ + b.n cc852 │ │ ands r0, r0 │ │ - b.n cc686 │ │ + b.n cc696 │ │ asrs r0, r0, #32 │ │ - b.n cbe64 │ │ + b.n cbe74 │ │ movs r3, r0 │ │ - b.n cca8e │ │ + b.n cca9e │ │ asrs r4, r0, #32 │ │ - b.n cc692 │ │ + b.n cc6a2 │ │ adds r0, #5 │ │ - b.n cc696 │ │ - ldrb r4, [r4, r3] │ │ + b.n cc6a6 │ │ + ldrb r3, [r4, r3] │ │ @ instruction: 0xebff6000 │ │ - b.n cc69e │ │ + b.n cc6ae │ │ str r0, [sp, #0] │ │ - b.n cc6a2 │ │ + b.n cc6b2 │ │ movs r4, r1 │ │ - b.n cca06 │ │ + b.n cca16 │ │ movs r7, r0 │ │ ldmia r2!, {} │ │ movs r1, r0 │ │ - b.n cca1a │ │ + b.n cca2a │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ movs r2, r0 │ │ - b.n cca22 │ │ + b.n cca32 │ │ movs r3, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n cca2a │ │ + b.n cca3a │ │ strb r1, [r1, #0] │ │ - b.n cc6c2 │ │ + b.n cc6d2 │ │ movs r3, r6 │ │ subs r0, r0, r0 │ │ lsls r4, r1, #1 │ │ and.w r0, r0, lr, lsr #32 │ │ - b.n cca3a │ │ + b.n cca4a │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ movs r5, r1 │ │ - b.n cca42 │ │ + b.n cca52 │ │ movs r5, r5 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n cbec6 │ │ + b.n cbed6 │ │ lsrs r2, r0, #1 │ │ - b.n cc7a2 │ │ + b.n cc7b2 │ │ lsrs r2, r0, #1 │ │ - b.n cca46 │ │ + b.n cca56 │ │ movs r2, r6 │ │ lsrs r0, r0, #8 │ │ movs r6, r0 │ │ - b.n cbf56 │ │ + b.n cbf66 │ │ movs r2, r0 │ │ - b.n cc9d2 │ │ + b.n cc9e2 │ │ movs r6, r4 │ │ lsrs r0, r0, #8 │ │ strh r4, [r2, #0] │ │ - b.n cbee2 │ │ + b.n cbef2 │ │ movs r2, r0 │ │ - b.n cca6a │ │ + b.n cca7a │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ lsls r0, r6, #1 │ │ - b.n cbeee │ │ + b.n cbefe │ │ asrs r4, r1, #32 │ │ - b.n cc8e4 │ │ + b.n cc8f4 │ │ adds r2, #160 @ 0xa0 │ │ add.w r0, r0, r0 │ │ - b.n cca72 │ │ + b.n cca82 │ │ movs r2, r2 │ │ lsrs r0, r0, #8 │ │ adds r1, #29 │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n cbefe │ │ + b.n cbf0e │ │ movs r2, r0 │ │ - b.n cca90 │ │ + b.n ccaa0 │ │ movs r2, r2 │ │ subs r0, r0, r0 │ │ asrs r4, r1, #32 │ │ - b.n cc904 │ │ + b.n cc914 │ │ movs r0, r1 │ │ - b.n cc72e │ │ + b.n cc73e │ │ adds r2, #123 @ 0x7b │ │ add.w r0, r0, r0 │ │ - b.n cca96 │ │ + b.n ccaa6 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ adds r1, #20 │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n cbf22 │ │ + b.n cbf32 │ │ movs r2, r1 │ │ and.w r0, r0, r2 │ │ - b.n ccab6 │ │ + b.n ccac6 │ │ movs r0, r6 │ │ - b.n cbfc8 │ │ + b.n cbfd8 │ │ str r5, [r1, #0] │ │ lsls r0, r0, #12 │ │ movs r1, r0 │ │ - b.n cca36 │ │ + b.n cca46 │ │ strb r6, [r0, #0] │ │ - b.n cc75a │ │ + b.n cc76a │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r2 │ │ and.w r0, r0, r0, rrx │ │ - b.n cbfe0 │ │ + b.n cbff0 │ │ strb r1, [r1, #0] │ │ - b.n cc76a │ │ + b.n cc77a │ │ movs r1, r0 │ │ - b.n cca4e │ │ + b.n cca5e │ │ movs r0, r2 │ │ subs r0, r0, r0 │ │ lsls r7, r3, #1 │ │ - b.n ccae4 │ │ + b.n ccaf4 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n ccaec │ │ + b.n ccafc │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ movs r3, r1 │ │ and.w r0, r0, r6 │ │ - b.n cbff2 │ │ + b.n cc002 │ │ lsls r0, r0, #1 │ │ - b.n cca6e │ │ + b.n cca7e │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ strb r1, [r1, #0] │ │ - b.n cc796 │ │ + b.n cc7a6 │ │ lsls r0, r7, #2 │ │ - b.n cbf98 │ │ + b.n cbfa8 │ │ movs r0, r0 │ │ - b.n cc57c │ │ + b.n cc58c │ │ lsls r2, r3, #1 │ │ - b.n cc002 │ │ + b.n cc012 │ │ movs r0, r0 │ │ - b.n ccb06 │ │ + b.n ccb16 │ │ movs r3, r3 │ │ subs r0, r0, r0 │ │ movs r7, r0 │ │ - b.n cc7ae │ │ - beq.n cc4a0 │ │ - b.n cc908 │ │ + b.n cc7be │ │ + beq.n cc4b0 │ │ + b.n cc918 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r2, r3, r7} │ │ - b.n cbfb8 │ │ + b.n cbfc8 │ │ asrs r0, r0, #32 │ │ - b.n ccc3e │ │ + b.n ccc4e │ │ asrs r0, r0, #32 │ │ - b.n cbf8c │ │ + b.n cbf9c │ │ movs r0, r0 │ │ - b.n cc5a4 │ │ + b.n cc5b4 │ │ lsls r2, r3, #1 │ │ - b.n cc02a │ │ + b.n cc03a │ │ movs r3, r0 │ │ - b.n ccb2e │ │ + b.n ccb3e │ │ movs r2, r1 │ │ subs r2, #0 │ │ asrs r4, r6, #1 │ │ - b.n cbfd4 │ │ + b.n cbfe4 │ │ movs r4, r0 │ │ - b.n cbfc2 │ │ + b.n cbfd2 │ │ movs r0, #116 @ 0x74 │ │ - b.n cbfc6 │ │ + b.n cbfd6 │ │ asrs r1, r0, #32 │ │ - b.n cc5c0 │ │ + b.n cc5d0 │ │ adds r0, #104 @ 0x68 │ │ - b.n cbfe4 │ │ + b.n cbff4 │ │ movs r0, #0 │ │ - b.n cbfc4 │ │ + b.n cbfd4 │ │ movs r0, #163 @ 0xa3 │ │ - b.n ccbee │ │ + b.n ccbfe │ │ adds r0, #3 │ │ - b.n cc5d0 │ │ + b.n cc5e0 │ │ lsls r1, r0, #8 │ │ @ instruction: 0xe98d0003 │ │ - b.n ccbfa │ │ - subs r3, #90 @ 0x5a │ │ + b.n ccc0a │ │ + subs r3, #89 @ 0x59 │ │ @ instruction: 0xebff08d0 │ │ add.w r0, r0, r4 │ │ - b.n cc806 │ │ + b.n cc816 │ │ lsrs r2, r6, #3 │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n cc80e │ │ + b.n cc81e │ │ lsrs r1, r5, #8 │ │ add.w r0, r0, r4 │ │ - b.n cc816 │ │ + b.n cc826 │ │ @ instruction: 0xffe4eaff │ │ asrs r0, r7, #32 │ │ - b.n cc01c │ │ + b.n cc02c │ │ movs r4, r0 │ │ - b.n cc00a │ │ + b.n cc01a │ │ movs r0, #112 @ 0x70 │ │ - b.n cc00e │ │ + b.n cc01e │ │ asrs r1, r0, #32 │ │ - b.n cc608 │ │ + b.n cc618 │ │ adds r0, #44 @ 0x2c │ │ - b.n cc02c │ │ + b.n cc03c │ │ movs r0, #0 │ │ - b.n cc00c │ │ + b.n cc01c │ │ movs r0, #156 @ 0x9c │ │ - b.n ccc36 │ │ + b.n ccc46 │ │ adds r0, #3 │ │ - b.n cc618 │ │ + b.n cc628 │ │ lsls r1, r0, #2 │ │ @ instruction: 0xe98d0001 │ │ - b.n ccc42 │ │ - subs r3, #72 @ 0x48 │ │ + b.n ccc52 │ │ + subs r3, #71 @ 0x47 │ │ @ instruction: 0xebffffd7 │ │ - @ instruction: 0xeaff23c8 │ │ + @ instruction: 0xeaff23d8 │ │ movs r1, r0 │ │ - b.n cc1ac │ │ - vabal.u q8, d3, d28 │ │ - vrsra.u64 q9, q8, #12 │ │ + b.n cc08c │ │ + @ instruction: 0xfff30541 │ │ + vcls.s16 d18, d0 │ │ movs r1, r0 │ │ - b.n cc128 │ │ - @ instruction: 0xfff33362 │ │ + b.n cc008 │ │ + @ instruction: 0xfff333e8 │ │ @ instruction: 0xfff44ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n cca44 │ │ + b.n cca54 │ │ svc 159 @ 0x9f │ │ - b.n cc9c8 │ │ - add r0, pc, #4 @ (adr r0, cc534 ) │ │ - b.n cc872 │ │ + b.n cc9d8 │ │ + add r0, pc, #4 @ (adr r0, cc544 ) │ │ + b.n cc882 │ │ adds r1, r0, #0 │ │ - b.n cc9cc │ │ + b.n cc9dc │ │ adds r0, #2 │ │ - b.n cc87a │ │ + b.n cc88a │ │ movs r0, #10 │ │ - b.n cc87e │ │ + b.n cc88e │ │ strh r0, [r0, #0] │ │ - b.n cc882 │ │ - str r7, [r1, #40] @ 0x28 │ │ + b.n cc892 │ │ + str r6, [r1, #40] @ 0x28 │ │ @ instruction: 0xebff2000 │ │ - b.n ccc8a │ │ + b.n ccc9a │ │ movs r0, r0 │ │ - b.n ccbee │ │ - add r0, pc, #448 @ (adr r0, cc710 ) │ │ - b.n cc06c │ │ + b.n ccbfe │ │ + add r0, pc, #448 @ (adr r0, cc720 ) │ │ + b.n cc07c │ │ lsls r2, r6, #20 │ │ subs r0, r0, r0 │ │ lsls r0, r3, #3 │ │ - b.n cc9f0 │ │ + b.n cca00 │ │ lsls r0, r6, #2 │ │ - b.n cc8fe │ │ + b.n cc90e │ │ asrs r6, r7, #1 │ │ - b.n cc962 │ │ + b.n cc972 │ │ movs r0, r1 │ │ - b.n ccc08 │ │ + b.n ccc18 │ │ lsls r6, r3, #21 │ │ subs r0, r0, r0 │ │ lsls r4, r1, #2 │ │ - b.n cc09e │ │ + b.n cc0ae │ │ asrs r0, r1, #2 │ │ - b.n cccb2 │ │ + b.n cccc2 │ │ movs r0, #100 @ 0x64 │ │ - b.n cc090 │ │ + b.n cc0a0 │ │ movs r0, #4 │ │ - b.n cccba │ │ + b.n cccca │ │ adds r0, #8 │ │ - b.n cccbe │ │ + b.n cccce │ │ asrs r0, r0, #32 │ │ - b.n cc102 │ │ + b.n cc112 │ │ str r0, [r1, #0] │ │ - b.n cc0b6 │ │ + b.n cc0c6 │ │ lsls r0, r1 │ │ - b.n cc0ba │ │ + b.n cc0ca │ │ lsrs r4, r5, #31 │ │ - b.n cc0cc │ │ + b.n cc0dc │ │ subs r4, r5, #7 │ │ - b.n cc0d0 │ │ + b.n cc0e0 │ │ movs r0, r0 │ │ - b.n cc6b4 │ │ + b.n cc6c4 │ │ adds r0, #8 │ │ - b.n cc0a2 │ │ + b.n cc0b2 │ │ asrs r1, r0, #32 │ │ - b.n cc6bc │ │ + b.n cc6cc │ │ asrs r4, r1, #32 │ │ - b.n cc0aa │ │ + b.n cc0ba │ │ movs r1, r1 │ │ stmia.w r4, {r0, r6, r9, sl, ip} │ │ - b.n ccbbc │ │ + b.n ccbcc │ │ subs r1, r1, r2 │ │ - b.n ccc30 │ │ + b.n ccc40 │ │ movs r0, #16 │ │ - b.n cc0ba │ │ + b.n cc0ca │ │ movs r0, r0 │ │ - b.n cc0e6 │ │ + b.n cc0f6 │ │ movs r1, r0 │ │ - b.n cc85a │ │ + b.n cc86a │ │ lsls r2, r3, #21 │ │ subs r0, r0, r0 │ │ movs r6, r0 │ │ - b.n cc902 │ │ + b.n cc912 │ │ asrs r0, r1, #32 │ │ - b.n ccd06 │ │ - subs r2, #37 @ 0x25 │ │ + b.n ccd16 │ │ + subs r2, #36 @ 0x24 │ │ @ instruction: 0xebff0014 │ │ - b.n cc0d6 │ │ + b.n cc0e6 │ │ asrs r4, r2, #3 │ │ - b.n cc008 │ │ + b.n cc018 │ │ movs r1, r0 │ │ - b.n cc882 │ │ + b.n cc892 │ │ lsls r4, r3, #3 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n cc10e │ │ + b.n cc11e │ │ lsrs r2, r0, #32 │ │ - b.n ccc02 │ │ + b.n ccc12 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ movs r0, r1 │ │ - b.n cc92a │ │ + b.n cc93a │ │ lsrs r6, r3, #27 │ │ add.w r0, r0, r0 │ │ - b.n ccc92 │ │ + b.n ccca2 │ │ lsls r0, r7, #20 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n cc12a │ │ + b.n cc13a │ │ subs r4, r5, #7 │ │ - b.n cc13c │ │ + b.n cc14c │ │ movs r1, r0 │ │ - b.n cccf6 │ │ + b.n ccd06 │ │ str r0, [sp, #880] @ 0x370 │ │ - b.n cc03c │ │ + b.n cc04c │ │ lsrs r2, r0, #32 │ │ lsls r0, r2, #8 │ │ asrs r1, r0, #32 │ │ - b.n cc72c │ │ + b.n cc73c │ │ str r4, [r3, r1] │ │ - b.n cc1c2 │ │ + b.n cc1d2 │ │ strb r0, [r2, #1] │ │ - b.n cc138 │ │ + b.n cc148 │ │ stmia r0!, {r0} │ │ - b.n ccaa8 │ │ - b.n cc61c │ │ - b.n ccaec │ │ + b.n ccab8 │ │ + b.n cc62c │ │ + b.n ccafc │ │ asrs r1, r3, #20 │ │ - b.n cc73a │ │ + b.n cc74a │ │ adds r0, #14 │ │ - b.n cc628 │ │ + b.n cc638 │ │ asrs r1, r3, #20 │ │ - b.n cc96a │ │ + b.n cc97a │ │ asrs r4, r6, #1 │ │ - b.n cc148 │ │ + b.n cc158 │ │ adds r0, #108 @ 0x6c │ │ - b.n cc14c │ │ + b.n cc15c │ │ movs r5, r2 │ │ lsrs r0, r0, #8 │ │ strb r0, [r5, #3] │ │ - b.n ccad0 │ │ + b.n ccae0 │ │ lsls r4, r2, #3 │ │ - b.n cc074 │ │ + b.n cc084 │ │ str r1, [r0, #0] │ │ - b.n ccc52 │ │ + b.n ccc62 │ │ ldmia r7, {r0, r1, r2, r3, r4, r5, r6, r7} │ │ - b.n ccc64 │ │ + b.n ccc74 │ │ lsls r6, r0, #2 │ │ ldmia.w r7, {r1, r4, r7} │ │ - b.n cc654 │ │ + b.n cc664 │ │ lsls r7, r2, #2 │ │ - b.n cc656 │ │ + b.n cc666 │ │ strb r0, [r3, #3] │ │ - b.n ccaec │ │ + b.n ccafc │ │ lsls r1, r2, #2 │ │ - b.n cc65c │ │ + b.n cc66c │ │ str r4, [r6, r6] │ │ - b.n cc90c │ │ + b.n cc91c │ │ ands r6, r0 │ │ - b.n cc66c │ │ + b.n cc67c │ │ movs r6, r0 │ │ - b.n cc90e │ │ + b.n cc91e │ │ movs r3, r6 │ │ subs r0, r0, r0 │ │ - ldr r0, [pc, #4] @ (cc670 ) │ │ - b.n ccdae │ │ + ldr r0, [pc, #4] @ (cc680 ) │ │ + b.n ccdbe │ │ movs r4, r1 │ │ - b.n cc91c │ │ + b.n cc92c │ │ movs r1, r6 │ │ lsrs r0, r0, #8 │ │ lsrs r5, r2 │ │ - b.n cc64e │ │ + b.n cc65e │ │ ldrsb r5, [r4, r0] │ │ - b.n cc9be │ │ + b.n cc9ce │ │ ands r1, r0 │ │ - b.n ccb8a │ │ + b.n ccb9a │ │ ldrb r2, [r0, #4] │ │ - b.n ccdc6 │ │ + b.n ccdd6 │ │ cmp r4, r2 │ │ - b.n cc798 │ │ + b.n cc7a8 │ │ movs r3, r5 │ │ and.w r5, r0, sp, lsr #3 │ │ - b.n cca42 │ │ + b.n cca52 │ │ movs r0, r0 │ │ - b.n ccd36 │ │ + b.n ccd46 │ │ @ instruction: 0xffe65aff │ │ movs r0, #240 @ 0xf0 │ │ - b.n cc1ce │ │ + b.n cc1de │ │ movs r0, r0 │ │ - b.n ccd46 │ │ + b.n ccd56 │ │ lsls r3, r0, #1 │ │ lsrs r0, r0, #8 │ │ str r4, [r5, #12] │ │ - b.n cc1da │ │ + b.n cc1ea │ │ movs r3, r0 │ │ - b.n cc952 │ │ + b.n cc962 │ │ movs r0, r1 │ │ - b.n cc1e2 │ │ + b.n cc1f2 │ │ movs r0, #3 │ │ adds r1, #160 @ 0xa0 │ │ adds r0, #240 @ 0xf0 │ │ adds r5, #136 @ 0x88 │ │ movs r3, r0 │ │ - b.n cc96a │ │ + b.n cc97a │ │ str r3, [r0, #0] │ │ adds r1, #160 @ 0xa0 │ │ adds r0, #236 @ 0xec │ │ adds r5, #136 @ 0x88 │ │ movs r0, r0 │ │ - b.n cc978 │ │ + b.n cc988 │ │ asrs r4, r4, #3 │ │ - b.n cc104 │ │ + b.n cc114 │ │ movs r7, r0 │ │ strh r0, [r4, #12] │ │ ands r1, r0 │ │ - b.n ccb56 │ │ + b.n ccb66 │ │ str r0, [r5, #4] │ │ - b.n cc1f4 │ │ + b.n cc204 │ │ adds r0, #6 │ │ - b.n cc7e6 │ │ + b.n cc7f6 │ │ str r0, [r0, #0] │ │ - b.n ccba2 │ │ + b.n ccbb2 │ │ movs r6, r0 │ │ - b.n cc6ec │ │ + b.n cc6fc │ │ lsls r1, r2, #20 │ │ - b.n cc98a │ │ + b.n cc99a │ │ lsls r0, r5, #3 │ │ lsls r0, r3, #22 │ │ asrs r0, r5, #3 │ │ lsls r3, r3, #20 │ │ movs r0, r0 │ │ lsls r4, r0, #2 │ │ movs r6, r0 │ │ movs r0, r0 │ │ lsls r1, r2, #20 │ │ lsls r0, r2, #5 │ │ lsls r7, r0, #1 │ │ lsrs r0, r0, #8 │ │ strb r0, [r7, #3] │ │ - b.n cc236 │ │ + b.n cc246 │ │ movs r0, r0 │ │ - b.n ccdb8 │ │ + b.n ccdc8 │ │ lsls r2, r2, #2 │ │ lsrs r0, r0, #8 │ │ lsls r4, r6, #1 │ │ - b.n cc24c │ │ + b.n cc25c │ │ str r0, [r5, r1] │ │ - b.n cc250 │ │ + b.n cc260 │ │ movs r0, r0 │ │ - b.n cc9be │ │ + b.n cc9ce │ │ lsls r7, r1, #2 │ │ ldr r2, [sp, #0] │ │ lsls r4, r6, #1 │ │ - b.n cc25c │ │ + b.n cc26c │ │ asrs r7, r0, #32 │ │ - b.n cca66 │ │ + b.n cca76 │ │ ands r0, r0 │ │ - b.n cc838 │ │ - movs r3, #184 @ 0xb8 │ │ + b.n cc848 │ │ + movs r3, #183 @ 0xb7 │ │ @ instruction: 0xfa002001 │ │ - b.n cc7ba │ │ + b.n cc7ca │ │ movs r0, #240 @ 0xf0 │ │ - b.n cc246 │ │ + b.n cc256 │ │ lsls r0, r1, #2 │ │ and.w r0, r0, r5, lsl #16 │ │ - b.n cca7e │ │ + b.n cca8e │ │ lsls r4, r2, #2 │ │ - b.n cc74c │ │ + b.n cc75c │ │ strb r0, [r3, #3] │ │ - b.n ccbdc │ │ + b.n ccbec │ │ sbcs r2, r6 │ │ - b.n cc9f8 │ │ + b.n cca08 │ │ strb r6, [r0, #0] │ │ - b.n cc756 │ │ + b.n cc766 │ │ movs r6, r0 │ │ - b.n cca00 │ │ + b.n cca10 │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ ldr r1, [r0, #0] │ │ - b.n cce9a │ │ + b.n cceaa │ │ movs r4, r1 │ │ - b.n cca06 │ │ + b.n cca16 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ strb r4, [r2, #3] │ │ - b.n cc73a │ │ + b.n cc74a │ │ str r4, [r4, #96] @ 0x60 │ │ - b.n ccaaa │ │ + b.n ccaba │ │ strb r1, [r0, #0] │ │ - b.n ccc7c │ │ - ldr r1, [pc, #8] @ (cc778 ) │ │ - b.n cceb2 │ │ + b.n ccc8c │ │ + ldr r1, [pc, #8] @ (cc788 ) │ │ + b.n ccec2 │ │ str r7, [r2, #96] @ 0x60 │ │ - b.n cc87e │ │ + b.n cc88e │ │ movs r0, r0 │ │ and.w r0, r0, r4, lsl #24 │ │ - b.n ccabe │ │ + b.n ccace │ │ lsls r6, r2, #2 │ │ - b.n cc790 │ │ + b.n cc7a0 │ │ movs r0, r1 │ │ - b.n cc2a0 │ │ + b.n cc2b0 │ │ movs r0, r1 │ │ - b.n ccaca │ │ + b.n ccada │ │ lsls r0, r4, #2 │ │ - stmia.w sp, {r1, r2, r3, r4, r5, r6, r8, r9, sp, lr} │ │ + stmia.w sp, {r0, r2, r3, r4, r5, r6, r8, r9, sp, lr} │ │ @ instruction: 0xebff0000 │ │ - b.n cce36 │ │ + b.n cce46 │ │ lsls r0, r0, #22 │ │ subs r0, r0, r0 │ │ lsrs r0, r4 │ │ - b.n cc1d4 │ │ + b.n cc1e4 │ │ str r0, [r6, #12] │ │ - b.n cc2d2 │ │ + b.n cc2e2 │ │ str r4, [r3, r1] │ │ - b.n cc356 │ │ + b.n cc366 │ │ lsrs r4, r4, #31 │ │ - b.n cc2e8 │ │ + b.n cc2f8 │ │ movs r0, r0 │ │ - b.n cc8cc │ │ + b.n cc8dc │ │ strb r0, [r2, #1] │ │ - b.n cc2d2 │ │ + b.n cc2e2 │ │ lsls r3, r0, #1 │ │ and.w r0, r0, r8, asr #19 │ │ - b.n ccc50 │ │ + b.n ccc60 │ │ adds r0, #1 │ │ - b.n ccdce │ │ + b.n ccdde │ │ movs r3, r2 │ │ ldmia.w r4, {r0, r4, r8, sl, ip} │ │ - b.n cc8de │ │ + b.n cc8ee │ │ asrs r6, r1, #32 │ │ - b.n cc7cc │ │ + b.n cc7dc │ │ asrs r4, r5, #3 │ │ - b.n cc2de │ │ + b.n cc2ee │ │ lsls r0, r2, #20 │ │ - b.n cc8ea │ │ + b.n cc8fa │ │ movs r0, #14 │ │ - b.n cc7d6 │ │ + b.n cc7e6 │ │ lsls r4, r2, #20 │ │ - b.n cc8f2 │ │ + b.n cc902 │ │ str r6, [r1, #0] │ │ - b.n cc7de │ │ + b.n cc7ee │ │ lsls r0, r3, #3 │ │ - b.n ccc78 │ │ + b.n ccc88 │ │ movs r0, #232 @ 0xe8 │ │ - b.n cc2f6 │ │ + b.n cc306 │ │ cmp r7, #255 @ 0xff │ │ - b.n cce08 │ │ + b.n cce18 │ │ lsls r4, r6, #6 │ │ - b.n cca8e │ │ + b.n cca9e │ │ str r0, [r6, #12] │ │ - b.n cc302 │ │ + b.n cc312 │ │ asrs r3, r0, #32 │ │ - b.n cc7f6 │ │ + b.n cc806 │ │ movs r3, r0 │ │ - b.n cca9c │ │ + b.n ccaac │ │ movs r3, r3 │ │ subs r0, r0, r0 │ │ adds r1, r0, r0 │ │ - b.n ccf42 │ │ + b.n ccf52 │ │ movs r2, r0 │ │ - b.n ccaa6 │ │ + b.n ccab6 │ │ movs r1, r3 │ │ lsrs r0, r0, #8 │ │ asrs r0, r2, #3 │ │ - b.n cc7e2 │ │ + b.n cc7f2 │ │ lsls r0, r4, #24 │ │ - b.n ccb52 │ │ + b.n ccb62 │ │ str r0, [sp, #4] │ │ - b.n ccd18 │ │ + b.n ccd28 │ │ adds r2, r0, r4 │ │ - b.n ccf5a │ │ + b.n ccf6a │ │ asrs r1, r3, #32 │ │ - b.n cc920 │ │ + b.n cc930 │ │ movs r3, r2 │ │ and.w r0, r0, r8, lsr #7 │ │ - b.n cccbc │ │ + b.n ccccc │ │ lsls r0, r7, #3 │ │ - b.n cc35a │ │ + b.n cc36a │ │ asrs r2, r6, #6 │ │ - b.n ccad0 │ │ + b.n ccae0 │ │ movs r0, r0 │ │ - b.n cc93a │ │ - add r0, pc, #24 @ (adr r0, cc84c ) │ │ - b.n cc836 │ │ + b.n cc94a │ │ + add r0, pc, #24 @ (adr r0, cc85c ) │ │ + b.n cc846 │ │ movs r1, r0 │ │ - b.n cce4a │ │ + b.n cce5a │ │ adds r0, #0 │ │ - b.n cc840 │ │ + b.n cc850 │ │ movs r0, r0 │ │ - b.n ccae8 │ │ + b.n ccaf8 │ │ movs r1, r4 │ │ subs r0, r0, r0 │ │ subs r7, #255 @ 0xff │ │ - b.n cce68 │ │ + b.n cce78 │ │ lsrs r1, r0, #32 │ │ - b.n ccf8e │ │ + b.n ccf9e │ │ movs r3, r0 │ │ - b.n ccaf4 │ │ + b.n ccb04 │ │ movs r6, r3 │ │ lsrs r0, r0, #8 │ │ lsls r1, r2, #3 │ │ - b.n cc82e │ │ + b.n cc83e │ │ asrs r1, r4, #24 │ │ - b.n ccb9e │ │ + b.n ccbae │ │ movs r1, r0 │ │ - b.n ccd62 │ │ + b.n ccd72 │ │ subs r1, #2 │ │ - b.n ccfa6 │ │ + b.n ccfb6 │ │ lsls r0, r2, #4 │ │ - b.n cc970 │ │ + b.n cc980 │ │ movs r0, r3 │ │ and.w r0, r0, r0, lsl #4 │ │ - b.n ccbb2 │ │ + b.n ccbc2 │ │ lsls r0, r3, #3 │ │ - b.n ccd0c │ │ + b.n ccd1c │ │ asrs r1, r2, #20 │ │ - b.n cc992 │ │ + b.n cc9a2 │ │ asrs r6, r1, #32 │ │ - b.n cc880 │ │ + b.n cc890 │ │ asrs r4, r6, #3 │ │ - b.n cc392 │ │ + b.n cc3a2 │ │ lsls r2, r6, #6 │ │ - b.n ccb26 │ │ + b.n ccb36 │ │ asrs r3, r0, #32 │ │ - b.n cc88a │ │ + b.n cc89a │ │ movs r3, r0 │ │ - b.n ccb30 │ │ + b.n ccb40 │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ adds r1, r0, r0 │ │ - b.n ccfd6 │ │ + b.n ccfe6 │ │ movs r2, r0 │ │ - b.n ccb3a │ │ + b.n ccb4a │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ asrs r0, r2, #3 │ │ - b.n cc876 │ │ + b.n cc886 │ │ lsls r0, r4, #24 │ │ - b.n ccbe6 │ │ + b.n ccbf6 │ │ asrs r1, r0, #32 │ │ - b.n ccdac │ │ + b.n ccdbc │ │ cmp r1, #2 │ │ - b.n ccfee │ │ + b.n ccffe │ │ asrs r1, r2, #32 │ │ - b.n cc9b6 │ │ + b.n cc9c6 │ │ movs r0, r0 │ │ and.w r0, r0, r0, lsl #4 │ │ - b.n ccbfa │ │ + b.n ccc0a │ │ lsls r1, r2, #20 │ │ - b.n cc9d6 │ │ + b.n cc9e6 │ │ movs r6, r1 │ │ - b.n cc8c2 │ │ + b.n cc8d2 │ │ lsls r0, r7, #3 │ │ - b.n cc3d6 │ │ + b.n cc3e6 │ │ movs r0, r0 │ │ - b.n cd00a │ │ + b.n cd01a │ │ lsls r5, r3, #1 │ │ and.w r0, r0, r1 │ │ - b.n ccc12 │ │ + b.n ccc22 │ │ lsls r0, r2, #20 │ │ - b.n ccb8a │ │ - add r0, pc, #448 @ (adr r0, cca98 ) │ │ - b.n cc414 │ │ + b.n ccb9a │ │ + add r0, pc, #448 @ (adr r0, ccaa8 ) │ │ + b.n cc424 │ │ @ instruction: 0xff881aff │ │ asrs r0, r3, #3 │ │ - b.n ccd78 │ │ + b.n ccd88 │ │ lsls r4, r6, #3 │ │ - b.n cc416 │ │ + b.n cc426 │ │ adds r0, #1 │ │ - b.n ccefa │ │ + b.n ccf0a │ │ asrs r4, r6, #6 │ │ - b.n ccb90 │ │ + b.n ccba0 │ │ movs r0, r0 │ │ - b.n cc9fa │ │ + b.n cca0a │ │ movs r6, r0 │ │ - b.n cc8f6 │ │ + b.n cc906 │ │ ands r3, r0 │ │ - b.n cc8fc │ │ + b.n cc90c │ │ movs r3, r0 │ │ - b.n ccba6 │ │ + b.n ccbb6 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ subs r7, #255 @ 0xff │ │ - b.n ccf24 │ │ - ldr r0, [pc, #4] @ (cc90c ) │ │ - b.n cd04a │ │ + b.n ccf34 │ │ + ldr r0, [pc, #4] @ (cc91c ) │ │ + b.n cd05a │ │ movs r3, r0 │ │ - b.n ccbb0 │ │ + b.n ccbc0 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ adds r0, #209 @ 0xd1 │ │ - b.n cc8ea │ │ + b.n cc8fa │ │ asrs r1, r4, #24 │ │ - b.n ccc5a │ │ + b.n ccc6a │ │ adds r0, #1 │ │ - b.n cce24 │ │ - ldr r1, [pc, #8] @ (cc928 ) │ │ - b.n cd062 │ │ + b.n cce34 │ │ + ldr r1, [pc, #8] @ (cc938 ) │ │ + b.n cd072 │ │ asrs r3, r2 │ │ - b.n cca2e │ │ + b.n cca3e │ │ movs r0, r0 │ │ and.w r0, r0, r1, lsl #16 │ │ - b.n ccc6e │ │ + b.n ccc7e │ │ lsls r4, r2, #20 │ │ - b.n ccbd2 │ │ + b.n ccbe2 │ │ vpmin.u , q9, │ │ lsrs r0, r4 │ │ - b.n cc370 │ │ + b.n cc380 │ │ lsls r4, r2, #20 │ │ - b.n cca56 │ │ + b.n cca66 │ │ str r6, [r1, #0] │ │ - b.n cc942 │ │ + b.n cc952 │ │ movs r0, r0 │ │ - b.n cd086 │ │ + b.n cd096 │ │ str r0, [r6, #12] │ │ - b.n cc45a │ │ + b.n cc46a │ │ movs r3, r7 │ │ and.w r0, r0, r8 │ │ - b.n ccc92 │ │ - strb r4, [r2, r2] │ │ + b.n ccca2 │ │ + strb r3, [r2, r2] │ │ @ instruction: 0xebffff1f │ │ @ instruction: 0xeaff5068 │ │ - b.n cc498 │ │ + b.n cc4a8 │ │ asrs r0, r5, #3 │ │ - b.n cc492 │ │ + b.n cc4a2 │ │ adds r0, #244 @ 0xf4 │ │ - b.n cc496 │ │ + b.n cc4a6 │ │ lsls r4, r2, #3 │ │ - b.n cc3a0 │ │ + b.n cc3b0 │ │ lsls r0, r1, #2 │ │ stmia.w sp, {r0, r2, ip, sp} │ │ - b.n cccb2 │ │ + b.n cccc2 │ │ movs r0, r1 │ │ - b.n cc490 │ │ + b.n cc4a0 │ │ movs r0, r1 │ │ - b.n cccba │ │ - str r3, [r0, #48] @ 0x30 │ │ + b.n cccca │ │ + str r2, [r0, #48] @ 0x30 │ │ @ instruction: 0xebff0000 │ │ - b.n cd022 │ │ + b.n cd032 │ │ lsls r0, r6, #21 │ │ subs r0, r0, r0 │ │ movs r0, r1 │ │ - b.n cc4ba │ │ + b.n cc4ca │ │ str r0, [r5, #12] │ │ - b.n cce9e │ │ + b.n cceae │ │ subs r4, r3, #7 │ │ - b.n cc4d0 │ │ + b.n cc4e0 │ │ str r4, [r3, r1] │ │ - b.n cc546 │ │ + b.n cc556 │ │ asrs r1, r0, #32 │ │ - b.n ccab8 │ │ + b.n ccac8 │ │ adds r0, #244 @ 0xf4 │ │ - b.n cc4ce │ │ + b.n cc4de │ │ strb r0, [r2, #1] │ │ - b.n cc4c4 │ │ + b.n cc4d4 │ │ lsls r6, r0, #1 │ │ ldmia.w r6, {} │ │ - b.n ccc58 │ │ + b.n ccc68 │ │ movs r7, r0 │ │ strh r0, [r4, #12] │ │ str r0, [sp, #4] │ │ - b.n cce32 │ │ + b.n cce42 │ │ asrs r1, r0, #32 │ │ - b.n ccac8 │ │ - add r0, pc, #0 @ (adr r0, cc9b8 ) │ │ - b.n cce7a │ │ + b.n ccad8 │ │ + add r0, pc, #0 @ (adr r0, cc9c8 ) │ │ + b.n cce8a │ │ movs r2, r1 │ │ - b.n cc9c0 │ │ + b.n cc9d0 │ │ asrs r6, r0, #32 │ │ - b.n ccad4 │ │ + b.n ccae4 │ │ asrs r2, r1, #32 │ │ - b.n cc9c8 │ │ + b.n cc9d8 │ │ lsls r0, r6, #20 │ │ - b.n ccd0a │ │ + b.n ccd1a │ │ lsls r0, r5, #3 │ │ - b.n cc3e4 │ │ + b.n cc3f4 │ │ movs r2, r0 │ │ - b.n ccae4 │ │ + b.n ccaf4 │ │ movs r2, r1 │ │ - b.n cc9d6 │ │ + b.n cc9e6 │ │ cmp r1, r6 │ │ - b.n ccd1a │ │ + b.n ccd2a │ │ asrs r0, r4, #3 │ │ - b.n cc414 │ │ + b.n cc424 │ │ lsls r0, r6, #20 │ │ - b.n ccd22 │ │ + b.n ccd32 │ │ asrs r0, r5, #1 │ │ - b.n cc500 │ │ + b.n cc510 │ │ lsls r4, r4, #3 │ │ - b.n cc400 │ │ + b.n cc410 │ │ movs r3, r0 │ │ - b.n ccb00 │ │ + b.n ccb10 │ │ movs r2, r1 │ │ - b.n cc9f2 │ │ + b.n cca02 │ │ lsrs r0, r4 │ │ - b.n cc40c │ │ + b.n cc41c │ │ lsls r0, r6, #20 │ │ - b.n ccd3a │ │ - ldr r5, [r5, #0] │ │ + b.n ccd4a │ │ + ldr r4, [r5, #0] │ │ @ instruction: 0xebff10d8 │ │ - b.n cce98 │ │ + b.n ccea8 │ │ lsls r4, r6, #6 │ │ - b.n ccc88 │ │ + b.n ccc98 │ │ lsls r0, r7, #3 │ │ - b.n cc53a │ │ + b.n cc54a │ │ movs r0, r0 │ │ - b.n ccb20 │ │ + b.n ccb30 │ │ movs r2, r1 │ │ - b.n cca12 │ │ + b.n cca22 │ │ lsls r0, r6, #20 │ │ - b.n ccd56 │ │ - ldr r6, [r4, #0] │ │ + b.n ccd66 │ │ + ldr r5, [r4, #0] │ │ @ instruction: 0xebff10d8 │ │ - b.n cceb4 │ │ + b.n ccec4 │ │ str r0, [sp, #880] @ 0x370 │ │ - b.n cc458 │ │ - add r0, pc, #448 @ (adr r0, ccbe4 ) │ │ - b.n cc560 │ │ + b.n cc468 │ │ + add r0, pc, #448 @ (adr r0, ccbf4 ) │ │ + b.n cc570 │ │ lsls r2, r6, #6 │ │ - b.n cccac │ │ + b.n cccbc │ │ asrs r0, r0, #32 │ │ - b.n ccefc │ │ + b.n ccf0c │ │ lsls r0, r5, #1 │ │ - b.n cc56c │ │ + b.n cc57c │ │ lsls r0, r2, #20 │ │ - b.n ccb44 │ │ + b.n ccb54 │ │ movs r1, r0 │ │ - b.n cceba │ │ + b.n cceca │ │ movs r1, r0 │ │ - b.n cca3e │ │ + b.n cca4e │ │ movs r1, r1 │ │ - b.n cccea │ │ + b.n cccfa │ │ lsls r6, r4, #19 │ │ subs r2, #0 │ │ asrs r4, r2, #20 │ │ - b.n ccb58 │ │ + b.n ccb68 │ │ movs r0, #0 │ │ - b.n ccf1c │ │ + b.n ccf2c │ │ asrs r1, r0, #32 │ │ - b.n cced4 │ │ + b.n ccee4 │ │ asrs r2, r0, #32 │ │ - b.n cca58 │ │ + b.n cca68 │ │ movs r6, r0 │ │ - b.n cccfc │ │ + b.n ccd0c │ │ lsls r4, r6, #16 │ │ subs r0, r0, r0 │ │ asrs r4, r6, #1 │ │ - b.n cc59c │ │ + b.n cc5ac │ │ movs r1, r0 │ │ - b.n ccd12 │ │ + b.n ccd22 │ │ lsls r7, r6, #16 │ │ subs r2, #0 │ │ ands r0, r4 │ │ - b.n cc59e │ │ + b.n cc5ae │ │ movs r0, r0 │ │ - b.n cd112 │ │ + b.n cd122 │ │ strb r4, [r4, #0] │ │ - b.n cc5a6 │ │ + b.n cc5b6 │ │ movs r6, r0 │ │ lsls r0, r4, #6 │ │ asrs r6, r0, #32 │ │ - b.n ccac6 │ │ + b.n ccad6 │ │ asrs r7, r0, #32 │ │ - b.n ccda4 │ │ + b.n ccdb4 │ │ lsls r6, r6, #16 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n cc5ba │ │ + b.n cc5ca │ │ ands r0, r0 │ │ - b.n cd1ce │ │ + b.n cd1de │ │ asrs r0, r0, #32 │ │ - b.n cd1d2 │ │ + b.n cd1e2 │ │ lsls r2, r0, #20 │ │ - b.n cd0b6 │ │ + b.n cd0c6 │ │ lsls r2, r7, #8 │ │ lsrs r0, r0, #8 │ │ ldr r4, [r3, #108] @ 0x6c │ │ - b.n cce2e │ │ + b.n cce3e │ │ str r0, [sp, #64] @ 0x40 │ │ - b.n ccfb2 │ │ + b.n ccfc2 │ │ movs r0, r0 │ │ - b.n cd15a │ │ + b.n cd16a │ │ asrs r0, r4, #1 │ │ - b.n cc5c4 │ │ + b.n cc5d4 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ asrs r5, r3, #23 │ │ - b.n cce62 │ │ + b.n cce72 │ │ movs r0, r0 │ │ - b.n cd158 │ │ + b.n cd168 │ │ ands r1, r0 │ │ orrs r0, r0 │ │ str r4, [r6, r1] │ │ - b.n cc5ee │ │ + b.n cc5fe │ │ asrs r1, r1, #32 │ │ - b.n cce02 │ │ + b.n cce12 │ │ movs r0, #7 │ │ - b.n cce06 │ │ + b.n cce16 │ │ adds r0, #6 │ │ - b.n cce0a │ │ + b.n cce1a │ │ lsrs r0, r6 │ │ - b.n cce68 │ │ + b.n cce78 │ │ lsrs r7, r1, #10 │ │ add.w r0, r0, r0 │ │ - b.n cd176 │ │ + b.n cd186 │ │ lsls r7, r7, #15 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n cc60e │ │ + b.n cc61e │ │ movs r0, #16 │ │ - b.n cd222 │ │ + b.n cd232 │ │ asrs r0, r3, #32 │ │ - b.n cc616 │ │ + b.n cc626 │ │ cmp r7, #237 @ 0xed │ │ add.w pc, r0, r0, ror #31 │ │ - b.n cc62c │ │ + b.n cc63c │ │ movs r0, r0 │ │ - b.n cd192 │ │ + b.n cd1a2 │ │ strb r7, [r0, #0] │ │ - b.n ccc14 │ │ + b.n ccc24 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ cmp r7, #84 @ 0x54 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n cc622 │ │ + b.n cc632 │ │ movs r3, r1 │ │ - b.n cd1b0 │ │ + b.n cd1c0 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r6, r4 │ │ - b.n cd1b8 │ │ + b.n cd1c8 │ │ lsls r7, r3, #1 │ │ asrs r5, r2, #13 │ │ lsls r5, r6, #7 │ │ subs r0, r0, r0 │ │ lsls r1, r3, #1 │ │ - b.n cc6c8 │ │ + b.n cc6d8 │ │ movs r0, r1 │ │ - b.n cd13e │ │ + b.n cd14e │ │ movs r2, r2 │ │ lsrs r0, r0, #8 │ │ asrs r4, r3, #1 │ │ - b.n cc6d6 │ │ + b.n cc6e6 │ │ adds r0, #3 │ │ - b.n cd26a │ │ + b.n cd27a │ │ movs r0, #80 @ 0x50 │ │ - b.n cc65c │ │ + b.n cc66c │ │ movs r0, r2 │ │ - b.n cc662 │ │ + b.n cc672 │ │ asrs r3, r2, #4 │ │ - b.n ccc3a │ │ + b.n ccc4a │ │ movs r0, #0 │ │ - b.n ccffe │ │ + b.n cd00e │ │ asrs r1, r0, #32 │ │ - b.n ccfc0 │ │ + b.n ccfd0 │ │ asrs r2, r0, #32 │ │ - b.n ccb44 │ │ + b.n ccb54 │ │ movs r0, #17 │ │ - b.n cd286 │ │ + b.n cd296 │ │ cmp r7, #213 @ 0xd5 │ │ add.w r0, r0, r0 │ │ - b.n cd1ee │ │ + b.n cd1fe │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ cmp r7, #62 @ 0x3e │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n cc67a │ │ + b.n cc68a │ │ movs r3, r1 │ │ - b.n cd208 │ │ + b.n cd218 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r6, r4 │ │ - b.n cd210 │ │ + b.n cd220 │ │ lsls r7, r3, #1 │ │ asrs r5, r2, #13 │ │ lsls r4, r1, #8 │ │ subs r0, r0, r0 │ │ lsrs r2, r2, #24 │ │ - b.n cd008 │ │ + b.n cd018 │ │ asrs r0, r1, #32 │ │ - b.n cceb6 │ │ - subs r1, #17 │ │ + b.n ccec6 │ │ + subs r1, #16 │ │ @ instruction: 0xebff05dd │ │ - b.n ccf2e │ │ + b.n ccf3e │ │ str r0, [sp, #416] @ 0x1a0 │ │ - b.n cc69c │ │ + b.n cc6ac │ │ movs r1, r0 │ │ - b.n cd266 │ │ + b.n cd276 │ │ lsls r5, r2, #16 │ │ ldmia r2!, {} │ │ - ldr r6, [pc, #72] @ (ccbd4 ) │ │ - b.n cd024 │ │ + ldr r6, [pc, #72] @ (ccbe4 ) │ │ + b.n cd034 │ │ movs r4, r0 │ │ - b.n cced2 │ │ - bcc.n ccaae │ │ + b.n ccee2 │ │ + bcc.n ccabe │ │ @ instruction: 0xebff0000 │ │ - b.n cd23a │ │ + b.n cd24a │ │ lsls r6, r4, #10 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n cd296 │ │ + b.n cd2a6 │ │ movs r5, r5 │ │ lsrs r0, r0, #8 │ │ lsls r7, r3, #4 │ │ - b.n cc660 │ │ + b.n cc670 │ │ asrs r6, r3, #4 │ │ - b.n cc664 │ │ + b.n cc674 │ │ eors r4, r5 │ │ - b.n cc6ec │ │ + b.n cc6fc │ │ movs r1, r0 │ │ - b.n cce56 │ │ + b.n cce66 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r6 │ │ - b.n cc6ee │ │ + b.n cc6fe │ │ movs r0, r0 │ │ - b.n cd262 │ │ + b.n cd272 │ │ lsls r2, r1, #9 │ │ lsrs r0, r0, #8 │ │ movs r4, r3 │ │ - b.n cc6fa │ │ + b.n cc70a │ │ str r0, [r5, #4] │ │ - b.n cc708 │ │ + b.n cc718 │ │ movs r0, r0 │ │ - b.n cce7a │ │ + b.n cce8a │ │ movs r6, r2 │ │ cmp r2, #0 │ │ asrs r0, r6, #1 │ │ - b.n cc714 │ │ + b.n cc724 │ │ movs r0, r0 │ │ - b.n cd280 │ │ + b.n cd290 │ │ asrs r6, r0, #32 │ │ asrs r0, r3, #23 │ │ movs r0, r1 │ │ asrs r1, r2, #12 │ │ lsls r0, r5, #6 │ │ subs r0, r0, r0 │ │ asrs r2, r3, #1 │ │ - b.n cc79c │ │ + b.n cc7ac │ │ movs r4, r3 │ │ - b.n cc722 │ │ + b.n cc732 │ │ movs r3, r0 │ │ - b.n cd298 │ │ + b.n cd2a8 │ │ lsls r5, r5, #7 │ │ cmp r2, #0 │ │ movs r0, #0 │ │ - b.n cc72a │ │ + b.n cc73a │ │ asrs r4, r0, #32 │ │ - b.n ccc82 │ │ + b.n ccc92 │ │ movs r2, r0 │ │ - b.n ccd0e │ │ + b.n ccd1e │ │ movs r0, #4 │ │ - b.n cd34a │ │ + b.n cd35a │ │ cmp r7, #164 @ 0xa4 │ │ add.w r0, r0, r0 │ │ - b.n cd2b2 │ │ + b.n cd2c2 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ cmp r7, #13 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n cc73e │ │ + b.n cc74e │ │ movs r3, r1 │ │ - b.n cd2cc │ │ + b.n cd2dc │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r6, r4 │ │ - b.n cd2d4 │ │ + b.n cd2e4 │ │ lsls r7, r3, #1 │ │ asrs r5, r2, #13 │ │ lsls r2, r7, #2 │ │ subs r0, r0, r0 │ │ lsls r4, r3, #1 │ │ - b.n cc7e6 │ │ + b.n cc7f6 │ │ adds r0, #1 │ │ - b.n cd37a │ │ + b.n cd38a │ │ asrs r4, r6, #1 │ │ - b.n cc778 │ │ + b.n cc788 │ │ movs r0, #96 @ 0x60 │ │ - b.n cc77c │ │ + b.n cc78c │ │ asrs r1, r6, #32 │ │ - b.n ccf86 │ │ + b.n ccf96 │ │ movs r0, r1 │ │ - b.n ccf8a │ │ - subs r1, #127 @ 0x7f │ │ + b.n ccf9a │ │ + subs r1, #126 @ 0x7e │ │ @ instruction: 0xebff0000 │ │ - b.n cd2f2 │ │ + b.n cd302 │ │ str r4, [r4, r1] │ │ - b.n cc790 │ │ + b.n cc7a0 │ │ str r0, [r0, r0] │ │ asrs r0, r4, #6 │ │ lsls r0, r4, #9 │ │ and.w r0, r0, r8, lsl #20 │ │ - b.n cd16a │ │ + b.n cd17a │ │ str r1, [r0, #0] │ │ - b.n cd3a6 │ │ + b.n cd3b6 │ │ str r4, [r0, r1] │ │ - b.n cc784 │ │ + b.n cc794 │ │ movs r1, #30 │ │ - b.n cc724 │ │ + b.n cc734 │ │ lsls r0, r4, #4 │ │ - b.n cc728 │ │ + b.n cc738 │ │ ands r0, r2 │ │ - b.n cc7a6 │ │ + b.n cc7b6 │ │ asrs r7, r3, #4 │ │ - b.n cc730 │ │ + b.n cc740 │ │ lsls r6, r2, #8 │ │ - b.n ccc9e │ │ + b.n cccae │ │ strb r4, [r3, #1] │ │ - b.n cc832 │ │ + b.n cc842 │ │ adds r0, #20 │ │ - b.n cd18e │ │ + b.n cd19e │ │ lsls r4, r3, #1 │ │ - b.n cc7a4 │ │ + b.n cc7b4 │ │ movs r5, r0 │ │ - b.n ccfce │ │ - add r7, pc, #72 @ (adr r7, cccd8 ) │ │ - b.n ccd98 │ │ + b.n ccfde │ │ + add r7, pc, #72 @ (adr r7, ccce8 ) │ │ + b.n ccda8 │ │ str r7, [sp, #68] @ 0x44 │ │ - b.n ccd9c │ │ + b.n ccdac │ │ adds r1, #130 @ 0x82 │ │ - b.n ccbfa │ │ + b.n ccc0a │ │ adds r0, #72 @ 0x48 │ │ - b.n cc7b8 │ │ + b.n cc7c8 │ │ movs r0, #4 │ │ - b.n cc7c2 │ │ + b.n cc7d2 │ │ movs r5, r0 │ │ - b.n ccfe6 │ │ + b.n ccff6 │ │ asrs r1, r0, #6 │ │ - b.n ccc0a │ │ + b.n ccc1a │ │ asrs r0, r2, #1 │ │ - b.n cc7c8 │ │ + b.n cc7d8 │ │ movs r4, r0 │ │ - b.n cc7d2 │ │ + b.n cc7e2 │ │ lsls r4, r2, #1 │ │ - b.n cc7d0 │ │ + b.n cc7e0 │ │ movs r0, #76 @ 0x4c │ │ - b.n cc7d4 │ │ + b.n cc7e4 │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ str r0, [r3, #8] │ │ - b.n cd1dc │ │ + b.n cd1ec │ │ asrs r2, r1, #32 │ │ - b.n cd006 │ │ + b.n cd016 │ │ movs r0, #224 @ 0xe0 │ │ - b.n cd40a │ │ + b.n cd41a │ │ movs r6, r0 │ │ - b.n cd00e │ │ - movs r1, #125 @ 0x7d │ │ - mla r0, r0, r0, r0 │ │ - b.n cd416 │ │ + b.n cd01e │ │ + subs r6, r2, #7 │ │ + @ instruction: 0xfa000000 │ │ + b.n cd426 │ │ movs r0, #20 │ │ - b.n cd16e │ │ + b.n cd17e │ │ movs r0, r0 │ │ - b.n cc7f8 │ │ + b.n cc808 │ │ movs r4, r0 │ │ - b.n ccd76 │ │ + b.n ccd86 │ │ asrs r6, r0, #32 │ │ - b.n cd026 │ │ + b.n cd036 │ │ adds r7, #48 @ 0x30 │ │ - b.n cd02a │ │ + b.n cd03a │ │ movs r0, r1 │ │ - b.n cd02e │ │ - strb r0, [r1, r0] │ │ + b.n cd03e │ │ + strb r7, [r0, r0] │ │ @ instruction: 0xebff0000 │ │ - b.n cd396 │ │ + b.n cd3a6 │ │ lsls r6, r2, #17 │ │ subs r0, r0, r0 │ │ ldrb r4, [r2, #31] │ │ - b.n cc83c │ │ + b.n cc84c │ │ movs r1, r1 │ │ - b.n ccfb6 │ │ + b.n ccfc6 │ │ strb r7, [r0, #0] │ │ - b.n cce24 │ │ + b.n cce34 │ │ lsls r0, r4, #2 │ │ lsrs r0, r0, #8 │ │ strb r4, [r3, #1] │ │ - b.n cc8be │ │ + b.n cc8ce │ │ ands r0, r2 │ │ - b.n cc842 │ │ + b.n cc852 │ │ str r0, [r3, #8] │ │ - b.n cd230 │ │ + b.n cd240 │ │ asrs r1, r1, #32 │ │ - b.n cd05a │ │ + b.n cd06a │ │ movs r0, #224 @ 0xe0 │ │ - b.n cd45e │ │ + b.n cd46e │ │ movs r6, r0 │ │ - b.n cd062 │ │ - movs r1, #104 @ 0x68 │ │ - mla r0, r0, r0, r0 │ │ - b.n cd46a │ │ + b.n cd072 │ │ + subs r1, r0, #7 │ │ + @ instruction: 0xfa000000 │ │ + b.n cd47a │ │ movs r0, #20 │ │ - b.n cd1c0 │ │ + b.n cd1d0 │ │ movs r0, r0 │ │ - b.n cc84c │ │ + b.n cc85c │ │ movs r4, r0 │ │ - b.n ccdc8 │ │ + b.n ccdd8 │ │ asrs r6, r0, #32 │ │ - b.n cd07a │ │ + b.n cd08a │ │ strb r0, [r6, #28] │ │ - b.n cd07e │ │ + b.n cd08e │ │ movs r0, r1 │ │ - b.n cd082 │ │ + b.n cd092 │ │ adds r0, #7 │ │ - b.n cd086 │ │ - strh r2, [r6, r7] │ │ + b.n cd096 │ │ + strh r1, [r6, r7] │ │ @ instruction: 0xebff0000 │ │ - b.n cd3ee │ │ + b.n cd3fe │ │ movs r0, #0 │ │ - b.n cd092 │ │ + b.n cd0a2 │ │ lsls r0, r3, #1 │ │ - b.n cc870 │ │ + b.n cc880 │ │ lsls r7, r2, #1 │ │ subs r0, r0, r0 │ │ str r7, [r0, #0] │ │ - b.n cd09e │ │ + b.n cd0ae │ │ ldrb r4, [r7, #30] │ │ - b.n cc8a0 │ │ + b.n cc8b0 │ │ lsls r0, r0, #3 │ │ - b.n cd278 │ │ + b.n cd288 │ │ movs r0, #16 │ │ - b.n cd4aa │ │ + b.n cd4ba │ │ strb r7, [r0, #0] │ │ - b.n cce8c │ │ + b.n cce9c │ │ asrs r0, r0, #1 │ │ - b.n cd280 │ │ + b.n cd290 │ │ cmp r6, #186 @ 0xba │ │ add.w r0, r0, r0 │ │ - b.n cd41a │ │ + b.n cd42a │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ str r0, [r0, r1] │ │ - b.n cc8b0 │ │ + b.n cc8c0 │ │ movs r0, #72 @ 0x48 │ │ - b.n cc8b4 │ │ + b.n cc8c4 │ │ eors r4, r0 │ │ - b.n cc8b8 │ │ + b.n cc8c8 │ │ lsls r4, r1, #1 │ │ - b.n cc8bc │ │ + b.n cc8cc │ │ adds r0, #5 │ │ - b.n cd096 │ │ + b.n cd0a6 │ │ asrs r4, r0, #32 │ │ - b.n cd096 │ │ + b.n cd0a6 │ │ asrs r1, r0, #32 │ │ - b.n cd0c0 │ │ + b.n cd0d0 │ │ lsls r3, r4, #1 │ │ subs r0, r0, r0 │ │ lsls r4, r3, #1 │ │ - b.n cc8dc │ │ + b.n cc8ec │ │ movs r0, r0 │ │ - b.n cd446 │ │ + b.n cd456 │ │ lsls r6, r2, #16 │ │ lsrs r0, r0, #8 │ │ movs r6, r0 │ │ - b.n cc95e │ │ + b.n cc96e │ │ movs r2, r0 │ │ - b.n cd3d2 │ │ + b.n cd3e2 │ │ lsls r1, r3, #7 │ │ subs r0, r0, r0 │ │ lsrs r0, r3, #31 │ │ - b.n cc8f8 │ │ + b.n cc908 │ │ str r0, [r3, r1] │ │ - b.n cc8f8 │ │ + b.n cc908 │ │ movs r0, r0 │ │ - b.n ccee0 │ │ + b.n ccef0 │ │ lsls r2, r3, #1 │ │ - b.n cc966 │ │ + b.n cc976 │ │ movs r3, r0 │ │ - b.n cd46a │ │ + b.n cd47a │ │ movs r1, r3 │ │ subs r2, #0 │ │ cmp r7, #196 @ 0xc4 │ │ - b.n cc910 │ │ + b.n cc920 │ │ movs r0, r0 │ │ - b.n cd480 │ │ + b.n cd490 │ │ subs r4, r7, #7 │ │ - b.n cc918 │ │ + b.n cc928 │ │ movs r0, #2 │ │ - b.n ccefc │ │ + b.n ccf0c │ │ asrs r1, r0, #32 │ │ - b.n ccf00 │ │ + b.n ccf10 │ │ movs r2, r0 │ │ - b.n cd126 │ │ + b.n cd136 │ │ movs r1, r0 │ │ lsls r0, r4, #6 │ │ subs r4, r5, #7 │ │ - b.n cc92c │ │ + b.n cc93c │ │ asrs r1, r0, #32 │ │ - b.n ccf10 │ │ + b.n ccf20 │ │ asrs r2, r0, #32 │ │ lsls r0, r4, #6 │ │ cmp r7, #252 @ 0xfc │ │ - b.n cc938 │ │ + b.n cc948 │ │ movs r4, r1 │ │ - b.n cc918 │ │ + b.n cc928 │ │ lsls r0, r2, #1 │ │ - b.n cc93c │ │ + b.n cc94c │ │ movs r0, #2 │ │ - b.n ccf24 │ │ + b.n ccf34 │ │ movs r0, r2 │ │ - b.n cc924 │ │ + b.n cc934 │ │ lsls r4, r2, #1 │ │ - b.n cc948 │ │ + b.n cc958 │ │ movs r0, #0 │ │ - b.n cc92c │ │ + b.n cc93c │ │ movs r3, #62 @ 0x3e │ │ - b.n cd416 │ │ + b.n cd426 │ │ movs r4, r2 │ │ - b.n cc934 │ │ + b.n cc944 │ │ movs r3, r0 │ │ - b.n cd55e │ │ + b.n cd56e │ │ lsls r2, r0, #1 │ │ @ instruction: 0xe98d1fd4 │ │ - b.n cc964 │ │ + b.n cc974 │ │ subs r7, #212 @ 0xd4 │ │ - b.n cc968 │ │ + b.n cc978 │ │ asrs r1, r0, #32 │ │ - b.n ccf4c │ │ + b.n ccf5c │ │ adds r0, #3 │ │ - b.n ccf50 │ │ - subs r0, #252 @ 0xfc │ │ + b.n ccf60 │ │ + subs r0, #251 @ 0xfb │ │ @ instruction: 0xebff4e12 │ │ - b.n cd2d0 │ │ + b.n cd2e0 │ │ movs r4, r0 │ │ - b.n cd17e │ │ + b.n cd18e │ │ lsrs r5, r4, #19 │ │ add.w r0, r0, r0 │ │ - b.n cd4f0 │ │ + b.n cd500 │ │ movs r0, r1 │ │ - b.n cd18a │ │ - add r0, pc, #36 @ (adr r0, cce70 ) │ │ + b.n cd19a │ │ + add r0, pc, #36 @ (adr r0, cce80 ) │ │ lsls r0, r4, #6 │ │ asrs r6, r0, #32 │ │ - b.n cd192 │ │ + b.n cd1a2 │ │ movs r0, #0 │ │ - b.n cd596 │ │ + b.n cd5a6 │ │ adds r0, #0 │ │ - b.n cd59a │ │ - add r0, pc, #0 @ (adr r0, cce5c ) │ │ - b.n cc978 │ │ - ldrsb r7, [r2, r5] │ │ + b.n cd5aa │ │ + add r0, pc, #0 @ (adr r0, cce6c ) │ │ + b.n cc988 │ │ + ldrsb r6, [r2, r5] │ │ @ instruction: 0xebff0000 │ │ - b.n cd506 │ │ + b.n cd516 │ │ lsls r2, r6, #4 │ │ subs r0, r0, r0 │ │ str r0, [r7, r1] │ │ - b.n cd388 │ │ + b.n cd398 │ │ asrs r0, r1, #32 │ │ - b.n cd1b2 │ │ + b.n cd1c2 │ │ movs r5, r0 │ │ - b.n cd1b6 │ │ - subs r0, #81 @ 0x51 │ │ + b.n cd1c6 │ │ + subs r0, #80 @ 0x50 │ │ @ instruction: 0xebff0acd │ │ orn r0, r5, #8650752 @ 0x840000 │ │ - b.n cd1c2 │ │ + b.n cd1d2 │ │ cmp r2, #207 @ 0xcf │ │ orn sl, r5, #6717440 @ 0x668000 │ │ orr.w sl, r0, #423936 @ 0x67800 │ │ orr.w r0, r0, #8978432 @ 0x890000 │ │ - b.n cd1d2 │ │ - bmi.n cce1e │ │ + b.n cd1e2 │ │ + bmi.n cce2e │ │ @ instruction: 0xebff0001 │ │ - b.n cd1ba │ │ + b.n cd1ca │ │ lsls r6, r3, #16 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n cd1e2 │ │ - bcs.n cce36 │ │ + b.n cd1f2 │ │ + bcs.n cce46 │ │ @ instruction: 0xebff5044 │ │ - b.n cc9e4 │ │ + b.n cc9f4 │ │ movs r0, r0 │ │ - b.n cd54e │ │ + b.n cd55e │ │ str r1, [r0, #0] │ │ - b.n cd5f2 │ │ + b.n cd602 │ │ vpmin.u32 q8, q14, │ │ lsls r5, r3, #16 │ │ and.w pc, r0, r8, ror #3 │ │ - b.n cc9fc │ │ + b.n cca0c │ │ asrs r4, r3, #1 │ │ - b.n cc9fc │ │ + b.n cca0c │ │ movs r0, r0 │ │ - b.n ccfe4 │ │ + b.n ccff4 │ │ movs r0, r0 │ │ - b.n cd56c │ │ + b.n cd57c │ │ lsls r2, r3, #1 │ │ - b.n cca6e │ │ + b.n cca7e │ │ lsls r0, r1, #18 │ │ lsrs r0, r0, #8 │ │ - ldr r6, [pc, #72] @ (ccf1c ) │ │ - b.n cd36c │ │ + ldr r6, [pc, #72] @ (ccf2c ) │ │ + b.n cd37c │ │ movs r2, r0 │ │ - b.n cd57a │ │ + b.n cd58a │ │ movs r3, r1 │ │ subs r2, #0 │ │ asrs r0, r2, #1 │ │ - b.n cca1c │ │ + b.n cca2c │ │ movs r3, #22 │ │ - b.n cd4e6 │ │ + b.n cd4f6 │ │ lsls r4, r2, #1 │ │ - b.n cca24 │ │ + b.n cca34 │ │ asrs r0, r1, #32 │ │ - b.n cca08 │ │ + b.n cca18 │ │ movs r4, r1 │ │ - b.n cca0c │ │ + b.n cca1c │ │ movs r2, r0 │ │ - b.n cd636 │ │ + b.n cd646 │ │ strb r0, [r0, #0] │ │ - b.n cca14 │ │ + b.n cca24 │ │ subs r4, r7, #6 │ │ - b.n cca3c │ │ + b.n cca4c │ │ subs r7, #188 @ 0xbc │ │ - b.n cca40 │ │ + b.n cca50 │ │ asrs r1, r0, #32 │ │ - b.n cd024 │ │ + b.n cd034 │ │ adds r0, #3 │ │ - b.n cd028 │ │ - subs r0, #198 @ 0xc6 │ │ + b.n cd038 │ │ + subs r0, #197 @ 0xc5 │ │ @ instruction: 0xebff0004 │ │ - b.n cd252 │ │ + b.n cd262 │ │ str r7, [r0, #0] │ │ - b.n cd256 │ │ + b.n cd266 │ │ lsrs r7, r5, #18 │ │ @ instruction: 0xeb00ffa5 │ │ @ instruction: 0xeaff0001 │ │ - b.n cd3ac │ │ + b.n cd3bc │ │ movs r2, r0 │ │ - b.n cd606 │ │ + b.n cd616 │ │ lsls r5, r5, #6 │ │ subs r2, #0 │ │ vpmin.u8 q15, q8, │ │ adds r0, #6 │ │ - b.n ccae2 │ │ + b.n ccaf2 │ │ asrs r2, r3, #1 │ │ - b.n ccae4 │ │ + b.n ccaf4 │ │ movs r2, r0 │ │ - b.n cd560 │ │ + b.n cd570 │ │ lsls r1, r2, #6 │ │ subs r0, r0, r0 │ │ movs r2, r0 │ │ - b.n cd5e4 │ │ + b.n cd5f4 │ │ lsls r2, r5, #6 │ │ cmp r2, #0 │ │ lsrs r1, r0, #16 │ │ - b.n cd3e0 │ │ + b.n cd3f0 │ │ asrs r0, r3, #2 │ │ - b.n cd468 │ │ + b.n cd478 │ │ movs r0, #224 @ 0xe0 │ │ - b.n cd692 │ │ - subs r6, r7, #4 │ │ - @ instruction: 0xfa002048 │ │ - b.n cca8a │ │ + b.n cd6a2 │ │ + movs r0, #78 @ 0x4e │ │ + @ instruction: 0xfb002048 │ │ + b.n cca9a │ │ lsls r4, r3, #3 │ │ - b.n cc994 │ │ + b.n cc9a4 │ │ cmp r7, #86 @ 0x56 │ │ - b.n cd466 │ │ + b.n cd476 │ │ asrs r0, r0, #32 │ │ - b.n cd6a6 │ │ + b.n cd6b6 │ │ lsls r0, r6, #3 │ │ - b.n cd2ee │ │ + b.n cd2fe │ │ lsls r0, r1, #1 │ │ - b.n cca9e │ │ + b.n ccaae │ │ lsrs r5, r2, #24 │ │ - b.n cd472 │ │ + b.n cd482 │ │ lsls r0, r2, #3 │ │ - b.n cd2f6 │ │ + b.n cd306 │ │ movs r1, r0 │ │ - b.n cd29a │ │ + b.n cd2aa │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ - adds r7, #237 @ 0xed │ │ + adds r7, #236 @ 0xec │ │ @ instruction: 0xebff2048 │ │ - b.n ccab6 │ │ + b.n ccac6 │ │ cmp r6, #21 │ │ - b.n cd48e │ │ + b.n cd49e │ │ lsls r0, r6, #3 │ │ - b.n cd312 │ │ + b.n cd322 │ │ eors r4, r5 │ │ - b.n ccacc │ │ + b.n ccadc │ │ movs r4, r3 │ │ - b.n ccac6 │ │ + b.n ccad6 │ │ asrs r4, r6, #1 │ │ - b.n ccad4 │ │ + b.n ccae4 │ │ movs r1, r0 │ │ - b.n cd23e │ │ + b.n cd24e │ │ lsls r6, r2, #3 │ │ subs r2, #0 │ │ asrs r0, r2, #1 │ │ - b.n ccad4 │ │ + b.n ccae4 │ │ asrs r1, r0, #32 │ │ - b.n cd42c │ │ + b.n cd43c │ │ asrs r0, r0, #32 │ │ - b.n ccfd0 │ │ + b.n ccfe0 │ │ lsls r2, r2, #3 │ │ subs r0, r0, r0 │ │ movs r0, #240 @ 0xf0 │ │ - b.n ccae6 │ │ + b.n ccaf6 │ │ asrs r4, r3, #1 │ │ - b.n ccb6a │ │ + b.n ccb7a │ │ str r0, [r5, #4] │ │ - b.n ccaf8 │ │ + b.n ccb08 │ │ movs r2, r0 │ │ - b.n cd262 │ │ + b.n cd272 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #90 @ 0x5a │ │ - b.n ccb78 │ │ + b.n ccb88 │ │ str r0, [r6, r4] │ │ - b.n cd30e │ │ + b.n cd31e │ │ str r0, [r4, r3] │ │ - b.n cc9e8 │ │ + b.n cc9f8 │ │ movs r3, r0 │ │ - b.n cd67a │ │ + b.n cd68a │ │ lsls r2, r0, #7 │ │ cmp r2, #0 │ │ movs r1, #31 │ │ - b.n cca94 │ │ + b.n ccaa4 │ │ lsls r0, r3, #3 │ │ - b.n cd478 │ │ + b.n cd488 │ │ adds r0, #0 │ │ - b.n ccb12 │ │ + b.n ccb22 │ │ lsls r4, r6, #6 │ │ - b.n cd28a │ │ + b.n cd29a │ │ adds r1, #18 │ │ - b.n cd0f4 │ │ + b.n cd104 │ │ subs r2, r2, #0 │ │ - b.n cd488 │ │ + b.n cd498 │ │ asrs r2, r0, #6 │ │ - b.n cd0f8 │ │ + b.n cd108 │ │ strb r4, [r2, #0] │ │ - b.n cd500 │ │ + b.n cd510 │ │ str r0, [r1, #0] │ │ - b.n ccb20 │ │ + b.n ccb30 │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n ccb24 │ │ + b.n ccb34 │ │ asrs r0, r7, #10 │ │ - b.n cd3ac │ │ + b.n cd3bc │ │ movs r1, r0 │ │ - b.n cd2aa │ │ + b.n cd2ba │ │ movs r0, r2 │ │ subs r0, r0, r0 │ │ movs r0, #216 @ 0xd8 │ │ - b.n cd4a8 │ │ + b.n cd4b8 │ │ adds r1, #182 @ 0xb6 │ │ - b.n cd3c4 │ │ + b.n cd3d4 │ │ movs r1, #178 @ 0xb2 │ │ - b.n cd2be │ │ + b.n cd2ce │ │ movs r3, r0 │ │ - b.n cd2c2 │ │ + b.n cd2d2 │ │ movs r3, r1 │ │ subs r0, r0, r0 │ │ movs r0, #232 @ 0xe8 │ │ - b.n cca5c │ │ + b.n cca6c │ │ adds r0, #24 │ │ - b.n ccb58 │ │ + b.n ccb68 │ │ movs r3, r0 │ │ - b.n cd2d2 │ │ + b.n cd2e2 │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ movs r0, #228 @ 0xe4 │ │ - b.n cca6c │ │ + b.n cca7c │ │ adds r0, #28 │ │ - b.n ccb68 │ │ + b.n ccb78 │ │ movs r3, r0 │ │ - b.n cd2e2 │ │ + b.n cd2f2 │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ movs r0, #224 @ 0xe0 │ │ - b.n cca7c │ │ + b.n cca8c │ │ adds r0, #32 │ │ - b.n ccb78 │ │ + b.n ccb88 │ │ movs r3, r0 │ │ - b.n cd2f2 │ │ + b.n cd302 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, #6 │ │ - b.n ccc06 │ │ + b.n ccc16 │ │ movs r2, r0 │ │ - b.n cd67e │ │ + b.n cd68e │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ movs r5, #221 @ 0xdd │ │ - b.n cd412 │ │ + b.n cd422 │ │ movs r0, r0 │ │ - b.n cd70a │ │ + b.n cd71a │ │ lsls r3, r4, #3 │ │ - ldr r2, [pc, #0] @ (cd068 ) │ │ + ldr r2, [pc, #0] @ (cd078 ) │ │ cmp r7, #236 @ 0xec │ │ - b.n ccbac │ │ + b.n ccbbc │ │ movs r0, #2 │ │ - b.n cd190 │ │ + b.n cd1a0 │ │ movs r0, #90 @ 0x5a │ │ - b.n ccc1a │ │ + b.n ccc2a │ │ movs r2, r0 │ │ - b.n cd71e │ │ + b.n cd72e │ │ lsls r5, r7, #5 │ │ cmp r2, #0 │ │ lsls r4, r3, #1 │ │ - b.n ccc32 │ │ + b.n ccc42 │ │ asrs r0, r1, #1 │ │ - b.n ccbb6 │ │ + b.n ccbc6 │ │ movs r4, r6 │ │ - b.n cd3ca │ │ + b.n cd3da │ │ lsls r0, r5, #5 │ │ - b.n ccb90 │ │ + b.n ccba0 │ │ movs r6, r0 │ │ - b.n ccc42 │ │ + b.n ccc52 │ │ ldrb r0, [r7, #31] │ │ - b.n ccbd4 │ │ + b.n ccbe4 │ │ movs r2, r0 │ │ - b.n cd6ba │ │ + b.n cd6ca │ │ strb r7, [r0, #0] │ │ - b.n cd1bc │ │ + b.n cd1cc │ │ mcr2 10, 6, r1, cr8, cr15, {7} @ │ │ lsls r5, r3, #23 │ │ - b.n cd456 │ │ + b.n cd466 │ │ movs r1, r0 │ │ - b.n cd78a │ │ + b.n cd79a │ │ mcr2 10, 6, ip, cr5, cr15, {7} @ │ │ lsls r1, r3, #1 │ │ - b.n ccc60 │ │ + b.n ccc70 │ │ lsls r0, r0, #1 │ │ - b.n cd6d6 │ │ + b.n cd6e6 │ │ mcr2 10, 6, r1, cr2, cr15, {7} @ │ │ - add r1, pc, #12 @ (adr r1, cd0c8 ) │ │ - b.n cd6c0 │ │ + add r1, pc, #12 @ (adr r1, cd0d8 ) │ │ + b.n cd6d0 │ │ ldr r5, [sp, #756] @ 0x2f4 │ │ - b.n cd6d4 │ │ + b.n cd6e4 │ │ add r7, sp, #304 @ 0x130 │ │ - b.n cd762 │ │ + b.n cd772 │ │ ldr r1, [sp, #404] @ 0x194 │ │ - b.n cd754 │ │ + b.n cd764 │ │ stmia r0!, {r1, r2, r3, r4, r5, r6} │ │ - b.n cd88e │ │ + b.n cd89e │ │ str r0, [r0, #0] │ │ - b.n cd812 │ │ + b.n cd822 │ │ lsls r4, r3, #1 │ │ - b.n ccc86 │ │ + b.n ccc96 │ │ asrs r0, r2, #32 │ │ - b.n ccc0a │ │ + b.n ccc1a │ │ str r6, [r2, r0] │ │ - b.n cd1e0 │ │ + b.n cd1f0 │ │ movs r4, r2 │ │ - b.n ccc4c │ │ + b.n ccc5c │ │ asrs r4, r0, #32 │ │ - b.n ccc10 │ │ + b.n ccc20 │ │ movs r2, r1 │ │ - b.n cd12a │ │ + b.n cd13a │ │ asrs r1, r1, #32 │ │ - b.n cd130 │ │ + b.n cd140 │ │ movs r1, r0 │ │ - b.n cd412 │ │ + b.n cd422 │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ adds r0, #208 @ 0xd0 │ │ - b.n cd604 │ │ + b.n cd614 │ │ movs r7, r1 │ │ ldmia.w r3, {r0, ip} │ │ - b.n cd408 │ │ + b.n cd418 │ │ movs r0, r0 │ │ - b.n cd40a │ │ + b.n cd41a │ │ movs r1, r0 │ │ - b.n cd42a │ │ + b.n cd43a │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ lsls r0, r7, #10 │ │ - b.n cd4bc │ │ + b.n cd4cc │ │ movs r4, r1 │ │ - b.n cd336 │ │ + b.n cd346 │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ str r1, [r0, #0] │ │ - b.n cd62a │ │ + b.n cd63a │ │ movs r3, r0 │ │ - b.n cd7ce │ │ + b.n cd7de │ │ @ instruction: 0xffea1aff │ │ mcr2 10, 5, lr, cr6, cr15, {7} @ │ │ lsls r7, r3, #4 │ │ - b.n ccbe4 │ │ + b.n ccbf4 │ │ movs r0, r0 │ │ - b.n cd3de │ │ + b.n cd3ee │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ lsls r6, r3, #4 │ │ - b.n ccbf0 │ │ + b.n ccc00 │ │ ands r0, r0 │ │ - b.n cd87e │ │ + b.n cd88e │ │ strb r0, [r0, #0] │ │ - b.n cd882 │ │ + b.n cd892 │ │ movs r0, r0 │ │ - b.n cd3f2 │ │ + b.n cd402 │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ ands r0, r1 │ │ - b.n ccc78 │ │ + b.n ccc88 │ │ lsrs r0, r2, #15 │ │ - b.n cd4dc │ │ + b.n cd4ec │ │ strb r4, [r1, #0] │ │ - b.n ccc80 │ │ + b.n ccc90 │ │ movs r0, r0 │ │ - b.n cd1a2 │ │ + b.n cd1b2 │ │ asrs r1, r0, #32 │ │ - b.n cd1ac │ │ + b.n cd1bc │ │ movs r1, r0 │ │ - b.n cd482 │ │ + b.n cd492 │ │ movs r0, r0 │ │ - b.n cd8a6 │ │ + b.n cd8b6 │ │ strb r0, [r0, #0] │ │ asrs r0, r4, #6 │ │ ands r0, r0 │ │ asrs r0, r4, #6 │ │ lsrs r4, r6, #30 │ │ - b.n cccb0 │ │ + b.n cccc0 │ │ movs r0, r0 │ │ - b.n cd294 │ │ + b.n cd2a4 │ │ lsls r2, r3, #1 │ │ - b.n ccd1a │ │ + b.n ccd2a │ │ movs r3, r0 │ │ - b.n cd81e │ │ + b.n cd82e │ │ movs r5, r2 │ │ subs r2, #0 │ │ lsls r0, r5, #2 │ │ - b.n cccb0 │ │ + b.n cccc0 │ │ movs r3, #143 @ 0x8f │ │ - b.n cd78a │ │ + b.n cd79a │ │ asrs r4, r5, #2 │ │ - b.n cccb8 │ │ + b.n cccc8 │ │ movs r1, r0 │ │ - b.n cd672 │ │ + b.n cd682 │ │ ands r0, r2 │ │ - b.n cccb0 │ │ + b.n cccc0 │ │ strb r4, [r2, #0] │ │ - b.n cccb4 │ │ + b.n cccc4 │ │ movs r0, r0 │ │ - b.n cd780 │ │ + b.n cd790 │ │ lsrs r0, r1, #30 │ │ - b.n ccce0 │ │ + b.n cccf0 │ │ subs r0, r1, #6 │ │ - b.n ccce4 │ │ + b.n cccf4 │ │ movs r0, r0 │ │ - b.n cd2c8 │ │ + b.n cd2d8 │ │ asrs r1, r0, #32 │ │ - b.n cd2cc │ │ + b.n cd2dc │ │ movs r1, r0 │ │ adds r1, #160 @ 0xa0 │ │ subs r4, r7, #5 │ │ - b.n cccf4 │ │ + b.n ccd04 │ │ lsls r1, r0, #1 │ │ @ instruction: 0xe98d0003 │ │ - b.n cd8fe │ │ + b.n cd90e │ │ asrs r1, r0, #32 │ │ - b.n cd2e0 │ │ + b.n cd2f0 │ │ asrs r0, r0, #32 │ │ - b.n ccce0 │ │ + b.n cccf0 │ │ subs r4, r5, #5 │ │ - b.n ccd08 │ │ + b.n ccd18 │ │ subs r7, #108 @ 0x6c │ │ - b.n ccd0c │ │ + b.n ccd1c │ │ asrs r1, r0, #32 │ │ - b.n cd2f0 │ │ + b.n cd300 │ │ adds r0, #3 │ │ - b.n cd2f4 │ │ - subs r0, #19 │ │ + b.n cd304 │ │ + subs r0, #18 │ │ @ instruction: 0xebff0008 │ │ - b.n cd51e │ │ + b.n cd52e │ │ asrs r6, r0, #32 │ │ - b.n cd522 │ │ + b.n cd532 │ │ movs r0, #4 │ │ - b.n cd526 │ │ + b.n cd536 │ │ adds r0, #7 │ │ - b.n cd52a │ │ + b.n cd53a │ │ str r0, [r0, r0] │ │ - b.n ccd08 │ │ - ldrsb r3, [r6, r1] │ │ + b.n ccd18 │ │ + ldrsb r2, [r6, r1] │ │ @ instruction: 0xebff0000 │ │ - b.n cd896 │ │ + b.n cd8a6 │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ lsls r0, r3 │ │ - b.n cd718 │ │ + b.n cd728 │ │ asrs r0, r1, #32 │ │ - b.n cd542 │ │ + b.n cd552 │ │ movs r4, r0 │ │ - b.n cd546 │ │ - adds r7, #109 @ 0x6d │ │ + b.n cd556 │ │ + adds r7, #108 @ 0x6c │ │ @ instruction: 0xebff0acd │ │ orn lr, r4, #9568256 @ 0x920000 │ │ - b.n cd6a8 │ │ + b.n cd6b8 │ │ stmia r0!, {r1, r2, r3, r4, r5, r6} │ │ - b.n cd9d6 │ │ + b.n cd9e6 │ │ cmp r2, #207 @ 0xcf │ │ orn sl, r4, #6717440 @ 0x668000 │ │ orr.w sl, r0, #423936 @ 0x67800 │ │ orr.w r0, r0, #60416 @ 0xec00 │ │ - b.n ccd60 │ │ + b.n ccd70 │ │ ldrb r4, [r2, #28] │ │ - b.n ccd68 │ │ + b.n ccd78 │ │ strb r7, [r0, #0] │ │ - b.n cd34c │ │ + b.n cd35c │ │ @ instruction: 0xffb9eaff │ │ str r0, [r0, r0] │ │ - b.n cd576 │ │ + b.n cd586 │ │ lsls r5, r0, #31 │ │ - b.n cd84a │ │ + b.n cd85a │ │ lsrs r7, r7, #31 │ │ - b.n cd8dc │ │ + b.n cd8ec │ │ movs r0, r0 │ │ - b.n cd4ec │ │ + b.n cd4fc │ │ @ instruction: 0xffec0aff │ │ lsrs r0, r7, #27 │ │ - b.n ccd88 │ │ + b.n ccd98 │ │ movs r0, r0 │ │ - b.n cd36c │ │ + b.n cd37c │ │ lsls r2, r3, #1 │ │ - b.n ccdf2 │ │ + b.n cce02 │ │ movs r0, r0 │ │ - b.n cd8f6 │ │ + b.n cd906 │ │ lsls r1, r4, #3 │ │ lsrs r0, r0, #8 │ │ subs r0, r5, #3 │ │ - b.n ccd9c │ │ + b.n ccdac │ │ movs r3, #151 @ 0x97 │ │ - b.n cd862 │ │ + b.n cd872 │ │ subs r6, #228 @ 0xe4 │ │ - b.n ccda4 │ │ + b.n ccdb4 │ │ lsrs r4, r4, #27 │ │ - b.n ccda8 │ │ + b.n ccdb8 │ │ asrs r1, r0, #32 │ │ - b.n cd38c │ │ + b.n cd39c │ │ adds r0, #3 │ │ - b.n cd390 │ │ + b.n cd3a0 │ │ ands r0, r1 │ │ - b.n ccd90 │ │ + b.n ccda0 │ │ movs r0, r0 │ │ - b.n cd398 │ │ + b.n cd3a8 │ │ strb r4, [r1, #0] │ │ - b.n ccd98 │ │ + b.n ccda8 │ │ lsls r1, r0, #1 │ │ stmia.w sp, {r0} │ │ - b.n cd9c6 │ │ + b.n cd9d6 │ │ str r0, [r2, r0] │ │ - b.n ccda4 │ │ + b.n ccdb4 │ │ movs r3, r7 │ │ and.w r5, r0, sp, lsr #7 │ │ - b.n cd642 │ │ + b.n cd652 │ │ movs r1, r0 │ │ - b.n cd978 │ │ + b.n cd988 │ │ mrc2 10, 2, ip, cr3, cr15, {7} @ │ │ asrs r2, r3, #1 │ │ - b.n cce4c │ │ + b.n cce5c │ │ movs r3, r0 │ │ - b.n cd944 │ │ + b.n cd954 │ │ lsls r1, r3, #4 │ │ cmp r2, #0 │ │ movs r0, #0 │ │ - b.n ccdd6 │ │ + b.n ccde6 │ │ asrs r4, r0, #32 │ │ - b.n cd32e │ │ + b.n cd33e │ │ movs r2, r0 │ │ - b.n cd3ba │ │ + b.n cd3ca │ │ movs r0, #9 │ │ - b.n cd9f6 │ │ + b.n cda06 │ │ cmp r5, #249 @ 0xf9 │ │ add.w r0, r0, r0 │ │ - b.n cd95e │ │ + b.n cd96e │ │ mcr2 10, 2, r0, cr9, cr15, {7} @ │ │ cmp r5, #98 @ 0x62 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n ccdea │ │ + b.n ccdfa │ │ movs r3, r1 │ │ - b.n cd978 │ │ + b.n cd988 │ │ mcr2 10, 2, r0, cr5, cr15, {7} @ │ │ movs r6, r4 │ │ - b.n cd980 │ │ + b.n cd990 │ │ lsls r7, r3, #1 │ │ asrs r5, r2, #13 │ │ mcr2 10, 2, r0, cr2, cr15, {7} @ │ │ movs r1, r0 │ │ - b.n cd76c │ │ + b.n cd77c │ │ movs r2, r0 │ │ - b.n cd9c6 │ │ + b.n cd9d6 │ │ lsls r5, r7, #2 │ │ subs r2, #0 │ │ mrc2 10, 1, lr, cr14, cr15, {7} @ │ │ movs r1, r0 │ │ - b.n cd77c │ │ + b.n cd78c │ │ movs r2, r0 │ │ - b.n cd9d6 │ │ + b.n cd9e6 │ │ lsls r1, r7, #2 │ │ subs r2, #0 │ │ mcr2 10, 0, lr, cr5, cr15, {7} @ │ │ asrs r4, r6, #30 │ │ - b.n cd912 │ │ + b.n cd922 │ │ movs r0, #90 @ 0x5a │ │ - b.n cceb4 │ │ + b.n ccec4 │ │ subs r7, r7, #7 │ │ - b.n cd9a8 │ │ + b.n cd9b8 │ │ str r1, [r2, r0] │ │ - b.n cd810 │ │ + b.n cd820 │ │ movs r0, r0 │ │ - b.n cd9b6 │ │ + b.n cd9c6 │ │ lsls r2, r6, #2 │ │ lsrs r0, r0, #8 │ │ subs r0, r1, #5 │ │ - b.n cce58 │ │ + b.n cce68 │ │ movs r3, #79 @ 0x4f │ │ - b.n cd91e │ │ + b.n cd92e │ │ subs r7, #68 @ 0x44 │ │ - b.n cce60 │ │ + b.n cce70 │ │ asrs r1, r0, #32 │ │ - b.n cd444 │ │ + b.n cd454 │ │ movs r0, r0 │ │ - b.n cce44 │ │ + b.n cce54 │ │ adds r0, #3 │ │ - b.n cd44c │ │ + b.n cd45c │ │ movs r1, r0 │ │ - b.n cda72 │ │ + b.n cda82 │ │ movs r1, r2 │ │ and.w r0, r0, r0, lsl #20 │ │ - b.n cd67a │ │ + b.n cd68a │ │ lsrs r0, r0, #27 │ │ - b.n cce7c │ │ + b.n cce8c │ │ movs r0, r0 │ │ - b.n cd460 │ │ + b.n cd470 │ │ lsls r2, r3, #1 │ │ - b.n ccee6 │ │ + b.n ccef6 │ │ movs r0, r0 │ │ - b.n cd9ea │ │ + b.n cd9fa │ │ lsls r4, r4, #2 │ │ lsrs r0, r0, #8 │ │ subs r0, r6, #2 │ │ - b.n cce90 │ │ + b.n ccea0 │ │ movs r3, #67 @ 0x43 │ │ - b.n cd956 │ │ + b.n cd966 │ │ subs r6, #172 @ 0xac │ │ - b.n cce98 │ │ + b.n ccea8 │ │ lsls r0, r2, #1 │ │ - b.n cce98 │ │ + b.n ccea8 │ │ asrs r1, r0, #32 │ │ - b.n cd480 │ │ + b.n cd490 │ │ movs r0, r1 │ │ - b.n cce80 │ │ + b.n cce90 │ │ adds r0, #3 │ │ - b.n cd488 │ │ + b.n cd498 │ │ lsls r4, r2, #1 │ │ - b.n ccea8 │ │ + b.n cceb8 │ │ movs r4, r1 │ │ - b.n cce8c │ │ + b.n cce9c │ │ movs r1, r0 │ │ - b.n cdab6 │ │ + b.n cdac6 │ │ str r0, [r2, r0] │ │ - b.n cce94 │ │ + b.n ccea4 │ │ str r0, [r0, #0] │ │ - b.n cce98 │ │ - adds r7, #169 @ 0xa9 │ │ + b.n ccea8 │ │ + adds r7, #168 @ 0xa8 │ │ @ instruction: 0xebff0096 │ │ and.w r0, r0, r4, ror #1 │ │ - b.n ccec4 │ │ - ldr r7, [r5, #116] @ 0x74 │ │ + b.n cced4 │ │ + ldr r6, [r5, #116] @ 0x74 │ │ @ instruction: 0xebff1001 │ │ - b.n cd892 │ │ + b.n cd8a2 │ │ movs r4, r0 │ │ - b.n ccec6 │ │ + b.n cced6 │ │ subs r1, r2, #4 │ │ - b.n cd678 │ │ + b.n cd688 │ │ asrs r1, r4, #10 │ │ - b.n cd6de │ │ + b.n cd6ee │ │ ldc2 10, cr14, [sp, #1020]! @ 0x3fc @ │ │ movs r1, r0 │ │ - b.n cd8b0 │ │ + b.n cd8c0 │ │ movs r1, r0 │ │ - b.n cda4a │ │ - stc2l 10, cr9, [pc, #1020]! @ cd7a8 @ │ │ + b.n cda5a │ │ + stc2l 10, cr9, [pc, #1020]! @ cd7b8 @ │ │ lsls r3, r1, #2 │ │ and.w r0, r0, r8, lsl #5 │ │ - b.n ccee6 │ │ + b.n ccef6 │ │ movs r1, #104 @ 0x68 │ │ - b.n ccedc │ │ + b.n cceec │ │ subs r0, r7, #3 │ │ - b.n ccefc │ │ + b.n ccf0c │ │ subs r6, #248 @ 0xf8 │ │ - b.n ccf00 │ │ + b.n ccf10 │ │ strb r4, [r3, #1] │ │ - b.n ccf76 │ │ + b.n ccf86 │ │ asrs r1, r0, #32 │ │ - b.n cd4e8 │ │ + b.n cd4f8 │ │ ldrsh r0, [r6, r3] │ │ - b.n ccf0c │ │ + b.n ccf1c │ │ adds r0, #3 │ │ - b.n cd4f0 │ │ + b.n cd500 │ │ movs r0, #4 │ │ - b.n ccef0 │ │ + b.n ccf00 │ │ cmp r6, #59 @ 0x3b │ │ - b.n cdb1a │ │ + b.n cdb2a │ │ lsls r0, r6, #28 │ │ - b.n cd71e │ │ + b.n cd72e │ │ str r5, [r0, r0] │ │ - b.n cd500 │ │ + b.n cd510 │ │ movs r0, r1 │ │ - b.n ccf00 │ │ + b.n ccf10 │ │ movs r3, r0 │ │ - b.n cdb2a │ │ + b.n cdb3a │ │ str r0, [r0, r0] │ │ - b.n ccf08 │ │ - adds r7, #141 @ 0x8d │ │ + b.n ccf18 │ │ + adds r7, #140 @ 0x8c │ │ @ instruction: 0xebff001c │ │ - b.n ccf26 │ │ - ldc2l 10, cr14, [pc, #1020]! @ cd7f4 @ │ │ + b.n ccf36 │ │ + ldc2l 10, cr14, [pc, #1020]! @ cd804 @ │ │ cmp r6, #132 @ 0x84 │ │ - b.n ccf3c │ │ - add r0, pc, #16 @ (adr r0, cd410 ) │ │ - b.n cd742 │ │ + b.n ccf4c │ │ + add r0, pc, #16 @ (adr r0, cd420 ) │ │ + b.n cd752 │ │ ands r1, r0 │ │ - b.n cd932 │ │ + b.n cd942 │ │ movs r0, #2 │ │ - b.n cd528 │ │ + b.n cd538 │ │ str r0, [r0, r0] │ │ - b.n cd960 │ │ + b.n cd970 │ │ movs r1, r0 │ │ - b.n cdafc │ │ + b.n cdb0c │ │ movs r0, #90 @ 0x5a │ │ - b.n ccfba │ │ + b.n ccfca │ │ lsls r4, r0, #12 │ │ lsrs r0, r0, #8 │ │ movs r3, r0 │ │ - b.n cdac2 │ │ + b.n cdad2 │ │ lsls r0, r3, #4 │ │ cmp r2, #0 │ │ lsls r0, r7, #3 │ │ - b.n cce5c │ │ + b.n cce6c │ │ asrs r4, r6, #3 │ │ - b.n cce60 │ │ + b.n cce70 │ │ movs r6, r0 │ │ - b.n cd46e │ │ + b.n cd47e │ │ asrs r1, r1, #32 │ │ - b.n cd474 │ │ + b.n cd484 │ │ movs r1, r0 │ │ - b.n cd756 │ │ + b.n cd766 │ │ lsls r2, r0, #12 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n ccf6e │ │ + b.n ccf7e │ │ cmp r4, #1 │ │ - b.n cd8d8 │ │ + b.n cd8e8 │ │ subs r0, r2, #1 │ │ - b.n ccf84 │ │ + b.n ccf94 │ │ subs r6, #18 │ │ - b.n cd8e0 │ │ + b.n cd8f0 │ │ lsrs r0, r7 │ │ - b.n cce64 │ │ + b.n cce74 │ │ asrs r1, r0, #32 │ │ - b.n cd570 │ │ + b.n cd580 │ │ eors r0, r2 │ │ - b.n cce6c │ │ + b.n cce7c │ │ asrs r0, r0, #1 │ │ - b.n cd95c │ │ + b.n cd96c │ │ str r4, [r1, r1] │ │ - b.n cce74 │ │ + b.n cce84 │ │ lsrs r7, r5, #11 │ │ orn r0, r1, #1572864 @ 0x180000 │ │ - b.n cd96a │ │ + b.n cd97a │ │ lsrs r7, r1, #11 │ │ orr.w r1, r1, #2113536 @ 0x204000 │ │ - b.n cdb6e │ │ + b.n cdb7e │ │ movs r0, r1 │ │ - b.n cd7b2 │ │ + b.n cd7c2 │ │ str r4, [r6, r3] │ │ - b.n cce8c │ │ - ldr r3, [r0, #16] │ │ + b.n cce9c │ │ + ldr r2, [r0, #16] │ │ @ instruction: 0xebff0000 │ │ - b.n cdb1e │ │ + b.n cdb2e │ │ ands r2, r1 │ │ - b.n cd7c2 │ │ + b.n cd7d2 │ │ mrc2 10, 7, r0, cr13, cr15, {7} @ │ │ str r0, [r0, r0] │ │ - b.n cd7ca │ │ + b.n cd7da │ │ lsrs r4, r1, #24 │ │ - b.n ccfcc │ │ + b.n ccfdc │ │ movs r0, r0 │ │ - b.n cd5b0 │ │ + b.n cd5c0 │ │ lsls r2, r3, #1 │ │ - b.n cd036 │ │ + b.n cd046 │ │ movs r0, r0 │ │ - b.n cdb3a │ │ + b.n cdb4a │ │ lsls r0, r2, #1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r3, #32 │ │ - b.n ccfd0 │ │ + b.n ccfe0 │ │ movs r1, r0 │ │ - b.n cdab6 │ │ + b.n cdac6 │ │ asrs r0, r6, #1 │ │ - b.n ccfc4 │ │ + b.n ccfd4 │ │ vext.8 d30, d15, d15, #3 │ │ asrs r4, r3, #32 │ │ - b.n ccfe0 │ │ + b.n ccff0 │ │ movs r1, #182 @ 0xb6 │ │ - b.n cd864 │ │ + b.n cd874 │ │ asrs r4, r6, #1 │ │ - b.n ccfd4 │ │ + b.n ccfe4 │ │ asrs r0, r4, #32 │ │ - b.n ccfec │ │ + b.n ccffc │ │ asrs r4, r5, #1 │ │ - b.n ccfdc │ │ + b.n ccfec │ │ asrs r0, r0, #32 │ │ - b.n cd4ca │ │ + b.n cd4da │ │ movs r0, r0 │ │ - b.n cd76c │ │ + b.n cd77c │ │ lsls r6, r3, #7 │ │ subs r0, r0, r0 │ │ adds r1, r0, r0 │ │ - b.n cdc12 │ │ + b.n cdc22 │ │ movs r6, r1 │ │ - b.n cd77a │ │ + b.n cd78a │ │ lsls r4, r3, #7 │ │ lsrs r0, r0, #8 │ │ asrs r2, r2, #3 │ │ - b.n cd4b2 │ │ + b.n cd4c2 │ │ movs r6, #34 @ 0x22 │ │ - b.n cd822 │ │ + b.n cd832 │ │ asrs r1, r0, #32 │ │ - b.n cd9e8 │ │ + b.n cd9f8 │ │ subs r1, #2 │ │ - b.n cdc2a │ │ + b.n cdc3a │ │ asrs r1, r2, #8 │ │ - b.n cd5f4 │ │ + b.n cd604 │ │ lsls r6, r2, #7 │ │ and.w r0, r0, sl, lsr #1 │ │ - b.n cd0a4 │ │ + b.n cd0b4 │ │ movs r0, r0 │ │ - b.n cdb9a │ │ + b.n cdbaa │ │ movs r4, r6 │ │ lsrs r0, r0, #8 │ │ adds r0, r4, #3 │ │ - b.n cd040 │ │ + b.n cd050 │ │ movs r2, #239 @ 0xef │ │ - b.n cdb06 │ │ + b.n cdb16 │ │ subs r4, #220 @ 0xdc │ │ - b.n cd048 │ │ + b.n cd058 │ │ lsrs r4, r3, #19 │ │ - b.n cd04c │ │ + b.n cd05c │ │ asrs r1, r0, #32 │ │ - b.n cd630 │ │ + b.n cd640 │ │ adds r0, #3 │ │ - b.n cd634 │ │ + b.n cd644 │ │ movs r0, r0 │ │ - b.n cd638 │ │ + b.n cd648 │ │ movs r1, r5 │ │ and.w sp, r0, r0, asr #32 │ │ - b.n cd060 │ │ + b.n cd070 │ │ movs r0, r0 │ │ - b.n cd644 │ │ + b.n cd654 │ │ lsls r2, r3, #1 │ │ - b.n cd0ca │ │ + b.n cd0da │ │ movs r0, r0 │ │ - b.n cdbce │ │ + b.n cdbde │ │ movs r7, r4 │ │ lsrs r0, r0, #8 │ │ adds r0, r2, #4 │ │ - b.n cd074 │ │ + b.n cd084 │ │ subs r5, #16 │ │ - b.n cd078 │ │ + b.n cd088 │ │ lsrs r0, r2, #20 │ │ - b.n cd07c │ │ + b.n cd08c │ │ asrs r1, r0, #32 │ │ - b.n cd660 │ │ + b.n cd670 │ │ movs r0, #80 @ 0x50 │ │ - b.n cd080 │ │ + b.n cd090 │ │ adds r0, #3 │ │ - b.n cd668 │ │ + b.n cd678 │ │ movs r0, #8 │ │ - b.n cd068 │ │ + b.n cd078 │ │ movs r0, r0 │ │ - b.n cd670 │ │ + b.n cd680 │ │ movs r0, #84 @ 0x54 │ │ - b.n cd090 │ │ + b.n cd0a0 │ │ movs r0, #12 │ │ - b.n cd074 │ │ + b.n cd084 │ │ movs r0, #72 @ 0x48 │ │ - b.n cd098 │ │ + b.n cd0a8 │ │ movs r0, #16 │ │ - b.n cd07c │ │ + b.n cd08c │ │ movs r0, #76 @ 0x4c │ │ - b.n cd0a0 │ │ + b.n cd0b0 │ │ movs r0, #20 │ │ - b.n cd084 │ │ + b.n cd094 │ │ movs r3, #53 @ 0x35 │ │ - b.n cdb6e │ │ + b.n cdb7e │ │ movs r0, r3 │ │ - b.n cd08c │ │ + b.n cd09c │ │ lsrs r4, r3, #19 │ │ - b.n cd0b4 │ │ + b.n cd0c4 │ │ movs r0, r0 │ │ - b.n cd698 │ │ + b.n cd6a8 │ │ movs r1, r2 │ │ and.w r0, r0, r8, lsl #21 │ │ vsra.u64 , q0, #1 │ │ vaddl.u q8, d15, d0 │ │ - b.n cdc2c │ │ + b.n cdc3c │ │ movs r0, r2 │ │ lsrs r0, r0, #8 │ │ adds r0, r7, #1 │ │ - b.n cd0d0 │ │ + b.n cd0e0 │ │ subs r4, #120 @ 0x78 │ │ - b.n cd0d4 │ │ + b.n cd0e4 │ │ ldrb r0, [r7, #17] │ │ - b.n cd0d8 │ │ + b.n cd0e8 │ │ asrs r1, r0, #32 │ │ - b.n cd6bc │ │ + b.n cd6cc │ │ movs r0, #16 │ │ - b.n cd0bc │ │ + b.n cd0cc │ │ adds r0, #3 │ │ - b.n cd6c4 │ │ + b.n cd6d4 │ │ strb r7, [r0, #0] │ │ - b.n cd6c8 │ │ + b.n cd6d8 │ │ str r0, [r1, r0] │ │ - b.n cd0c8 │ │ + b.n cd0d8 │ │ ands r4, r1 │ │ - b.n cd0cc │ │ + b.n cd0dc │ │ cmp r6, #50 @ 0x32 │ │ - b.n cdcf6 │ │ + b.n cdd06 │ │ movs r4, r2 │ │ - b.n cd0d4 │ │ + b.n cd0e4 │ │ strb r0, [r3, #0] │ │ - b.n cd0d8 │ │ + b.n cd0e8 │ │ lsrs r4, r2, #17 │ │ - b.n cd100 │ │ + b.n cd110 │ │ movs r0, r0 │ │ - b.n cd6e4 │ │ + b.n cd6f4 │ │ movs r0, r0 │ │ - b.n cd0e4 │ │ + b.n cd0f4 │ │ movs r1, r0 │ │ - b.n cdd0e │ │ - adds r7, #21 │ │ + b.n cdd1e │ │ + adds r7, #20 │ │ @ instruction: 0xebff0e12 │ │ - b.n cda6c │ │ + b.n cda7c │ │ lsrs r7, r7, #11 │ │ add.w r9, r0, sp, asr #20 │ │ - b.n cdbee │ │ + b.n cdbfe │ │ ldrsh r7, [r7, r7] │ │ - b.n cdc80 │ │ + b.n cdc90 │ │ movs r5, r0 │ │ - b.n cd926 │ │ - beq.n cd620 │ │ - b.n cda80 │ │ + b.n cd936 │ │ + beq.n cd630 │ │ + b.n cda90 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r6, r9, sp} │ │ + ldmia.w sp!, {r4, r6, r9, sp} │ │ movs r1, r0 │ │ adds r4, r4, #0 │ │ - b.n cd134 │ │ + b.n cd144 │ │ subs r4, #36 @ 0x24 │ │ - b.n cd138 │ │ + b.n cd148 │ │ movs r0, #16 │ │ - b.n cd118 │ │ + b.n cd128 │ │ asrs r1, r0, #32 │ │ - b.n cd720 │ │ + b.n cd730 │ │ str r0, [r1, r0] │ │ - b.n cd120 │ │ + b.n cd130 │ │ adds r0, #3 │ │ - b.n cd728 │ │ + b.n cd738 │ │ ands r4, r1 │ │ - b.n cd128 │ │ + b.n cd138 │ │ movs r3, #38 @ 0x26 │ │ - b.n cdc12 │ │ + b.n cdc22 │ │ movs r4, r2 │ │ - b.n cd130 │ │ + b.n cd140 │ │ lsrs r0, r1, #16 │ │ - b.n cd158 │ │ + b.n cd168 │ │ movs r0, r0 │ │ - b.n cd73c │ │ + b.n cd74c │ │ movs r0, r3 │ │ - b.n cd13c │ │ + b.n cd14c │ │ lsrs r0, r0, #16 │ │ - b.n cd164 │ │ + b.n cd174 │ │ movs r0, r0 │ │ - b.n cd748 │ │ + b.n cd758 │ │ movs r0, r0 │ │ - b.n cd148 │ │ + b.n cd158 │ │ movs r2, r0 │ │ - b.n cdd72 │ │ - adds r6, #252 @ 0xfc │ │ + b.n cdd82 │ │ + adds r6, #251 @ 0xfb │ │ @ instruction: 0xebfffe42 │ │ @ instruction: 0xeaff105a │ │ - b.n cd1ec │ │ + b.n cd1fc │ │ movs r0, r0 │ │ - b.n cdce4 │ │ + b.n cdcf4 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ subs r0, r2, r6 │ │ - b.n cd188 │ │ + b.n cd198 │ │ movs r2, #225 @ 0xe1 │ │ - b.n cdc4e │ │ + b.n cdc5e │ │ subs r3, #140 @ 0x8c │ │ - b.n cd190 │ │ + b.n cd1a0 │ │ movs r0, r0 │ │ - b.n cd170 │ │ + b.n cd180 │ │ asrs r1, r0, #32 │ │ - b.n cd778 │ │ + b.n cd788 │ │ adds r0, #3 │ │ - b.n cd77c │ │ + b.n cd78c │ │ movs r1, r0 │ │ - b.n cdda2 │ │ - adds r6, #240 @ 0xf0 │ │ + b.n cddb2 │ │ + adds r6, #239 @ 0xef │ │ @ instruction: 0xebff0e12 │ │ - b.n cdb00 │ │ + b.n cdb10 │ │ lsrs r2, r3, #11 │ │ add.w r7, r0, r4, ror #22 │ │ - b.n cdc82 │ │ + b.n cdc92 │ │ @ instruction: 0xffd9eaff │ │ subs r3, #248 @ 0xf8 │ │ - b.n cd1b8 │ │ + b.n cd1c8 │ │ cmp r3, #248 @ 0xf8 │ │ - b.n cd1bc │ │ + b.n cd1cc │ │ str r0, [r3, #0] │ │ - b.n cd1b0 │ │ + b.n cd1c0 │ │ adds r0, #3 │ │ - b.n cd7a4 │ │ + b.n cd7b4 │ │ str r0, [r3, #4] │ │ - b.n cd1a4 │ │ + b.n cd1b4 │ │ movs r0, #2 │ │ - b.n cd7ac │ │ + b.n cd7bc │ │ str r4, [r3, #0] │ │ - b.n cd1c0 │ │ + b.n cd1d0 │ │ str r4, [r3, #4] │ │ - b.n cd1b0 │ │ + b.n cd1c0 │ │ str r0, [r4, #0] │ │ - b.n cd1c8 │ │ + b.n cd1d8 │ │ strb r5, [r3, r7] │ │ - b.n cda4e │ │ + b.n cda5e │ │ str r4, [r2, #4] │ │ - b.n cd1bc │ │ + b.n cd1cc │ │ str r6, [r6, #24] │ │ - b.n cda54 │ │ + b.n cda64 │ │ movs r0, r0 │ │ - b.n cdd54 │ │ + b.n cdd64 │ │ strb r1, [r0, #0] │ │ - b.n cdcbe │ │ + b.n cdcce │ │ movs r0, #3 │ │ sbcs r0, r4 │ │ str r7, [r0, r0] │ │ - b.n cd6c2 │ │ + b.n cd6d2 │ │ subs r7, #255 @ 0xff │ │ - b.n cdcd8 │ │ + b.n cdce8 │ │ movs r7, r0 │ │ - b.n cd968 │ │ + b.n cd978 │ │ movs r6, r4 │ │ subs r0, r0, r0 │ │ ldr r0, [sp, #4] │ │ - b.n cde06 │ │ + b.n cde16 │ │ movs r3, r0 │ │ - b.n cd976 │ │ + b.n cd986 │ │ movs r4, r4 │ │ lsrs r0, r0, #8 │ │ str r6, [r2, r3] │ │ - b.n cd6a6 │ │ + b.n cd6b6 │ │ str r6, [r4, #96] @ 0x60 │ │ - b.n cda16 │ │ + b.n cda26 │ │ str r1, [r0, r0] │ │ - b.n cdbe4 │ │ - ldr r1, [pc, #8] @ (cd6e4 ) │ │ - b.n cde1e │ │ + b.n cdbf4 │ │ + ldr r1, [pc, #8] @ (cd6f4 ) │ │ + b.n cde2e │ │ str r6, [sp, #84] @ 0x54 │ │ - b.n cd7ea │ │ + b.n cd7fa │ │ movs r6, r3 │ │ and.w fp, r0, r0, lsl #6 │ │ - b.n cd228 │ │ + b.n cd238 │ │ movs r3, #85 @ 0x55 │ │ - b.n cdcee │ │ + b.n cdcfe │ │ subs r3, #124 @ 0x7c │ │ - b.n cd230 │ │ + b.n cd240 │ │ asrs r1, r0, #32 │ │ - b.n cd814 │ │ + b.n cd824 │ │ movs r1, r4 │ │ stmia.w sp, {r0, r1, ip, sp} │ │ - b.n cd81c │ │ + b.n cd82c │ │ movs r3, r0 │ │ - b.n cde42 │ │ - adds r6, #200 @ 0xc8 │ │ + b.n cde52 │ │ + adds r6, #199 @ 0xc7 │ │ @ instruction: 0xebff105c │ │ - b.n cd2ba │ │ + b.n cd2ca │ │ mrc2 10, 1, lr, cr2, cr15, {7} @ │ │ asrs r0, r1, #1 │ │ - b.n cd242 │ │ + b.n cd252 │ │ movs r1, #104 @ 0x68 │ │ - b.n cd238 │ │ + b.n cd248 │ │ subs r4, r1, r6 │ │ - b.n cd258 │ │ + b.n cd268 │ │ subs r3, #140 @ 0x8c │ │ - b.n cd25c │ │ + b.n cd26c │ │ strb r4, [r3, #1] │ │ - b.n cd2d2 │ │ + b.n cd2e2 │ │ asrs r1, r0, #32 │ │ - b.n cd844 │ │ + b.n cd854 │ │ ldrh r4, [r0, r6] │ │ - b.n cd268 │ │ + b.n cd278 │ │ adds r0, #3 │ │ - b.n cd84c │ │ + b.n cd85c │ │ lsls r0, r6, #28 │ │ - b.n cda72 │ │ + b.n cda82 │ │ ldrb r4, [r7, #13] │ │ - b.n cd274 │ │ + b.n cd284 │ │ movs r0, #4 │ │ - b.n cd254 │ │ + b.n cd264 │ │ movs r3, #166 @ 0xa6 │ │ - b.n cdd3e │ │ + b.n cdd4e │ │ movs r0, r1 │ │ - b.n cd25c │ │ + b.n cd26c │ │ movs r3, r0 │ │ - b.n cde86 │ │ + b.n cde96 │ │ str r5, [r0, r0] │ │ - b.n cd868 │ │ + b.n cd878 │ │ strb r7, [r0, #0] │ │ - b.n cd86c │ │ + b.n cd87c │ │ str r0, [r0, r0] │ │ - b.n cd26c │ │ - adds r6, #180 @ 0xb4 │ │ + b.n cd27c │ │ + adds r6, #179 @ 0xb3 │ │ @ instruction: 0xebff001c │ │ - b.n cd28a │ │ + b.n cd29a │ │ mrc2 10, 6, lr, cr1, cr15, {7} @ │ │ str r0, [sp, #24] │ │ - b.n cdaa2 │ │ + b.n cdab2 │ │ str r7, [r0, #0] │ │ - b.n cd768 │ │ + b.n cd778 │ │ movs r7, r0 │ │ - b.n cda16 │ │ + b.n cda26 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ ldr r1, [r0, #0] │ │ - b.n cdeb2 │ │ + b.n cdec2 │ │ movs r3, r0 │ │ - b.n cda18 │ │ + b.n cda28 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ strb r1, [r2, #3] │ │ - b.n cd752 │ │ + b.n cd762 │ │ asrs r1, r4, #24 │ │ - b.n cdac2 │ │ + b.n cdad2 │ │ strb r1, [r0, #0] │ │ - b.n cdc94 │ │ + b.n cdca4 │ │ ldr r2, [r0, #16] │ │ - b.n cdeca │ │ + b.n cdeda │ │ str r7, [r2, #16] │ │ - b.n cd89a │ │ + b.n cd8aa │ │ movs r1, r0 │ │ - and.w r0, r0, r0, asr #10 │ │ + and.w r0, r0, r0, ror #10 │ │ movs r1, r0 │ │ str r1, [r0, #0] │ │ - b.n cdada │ │ + b.n cdaea │ │ asrs r0, r3, #3 │ │ - b.n cdc34 │ │ + b.n cdc44 │ │ strb r4, [r4, #3] │ │ - b.n cd1d8 │ │ + b.n cd1e8 │ │ lsrs r0, r4 │ │ - b.n cd1dc │ │ + b.n cd1ec │ │ stmia r1!, {r1, r4, r5, r7} │ │ - b.n cda4c │ │ + b.n cda5c │ │ asrs r0, r5, #3 │ │ - b.n cd1e4 │ │ + b.n cd1f4 │ │ asrs r0, r2, #1 │ │ - b.n cd2cc │ │ + b.n cd2dc │ │ asrs r1, r0, #32 │ │ - b.n cddc6 │ │ + b.n cddd6 │ │ str r1, [r0, r0] │ │ - b.n cd7d2 │ │ + b.n cd7e2 │ │ movs r1, r0 │ │ - b.n cda68 │ │ + b.n cda78 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ @ instruction: 0xe801e3a0 │ │ add r7, sp, #1020 @ 0x3fc │ │ - b.n cdde8 │ │ + b.n cddf8 │ │ movs r3, r0 │ │ - b.n cda86 │ │ + b.n cda96 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ str r4, [r3, r3] │ │ - b.n cd7aa │ │ + b.n cd7ba │ │ adds r6, #44 @ 0x2c │ │ - b.n cdb1a │ │ - b.n cd7de │ │ - b.n cdce8 │ │ + b.n cdb2a │ │ + b.n cd7ee │ │ + b.n cdcf8 │ │ ldr r2, [r0, r4] │ │ - b.n cdf22 │ │ - b.n cde20 │ │ - b.n cd8f0 │ │ + b.n cdf32 │ │ + b.n cde30 │ │ + b.n cd900 │ │ movs r1, r0 │ │ @ instruction: 0xea00afff │ │ - b.n cde0c │ │ - b.n cd808 │ │ - b.n cdb32 │ │ + b.n cde1c │ │ + b.n cd818 │ │ + b.n cdb42 │ │ adds r0, #1 │ │ - b.n cd7f6 │ │ + b.n cd806 │ │ movs r1, r0 │ │ - b.n cdaa0 │ │ + b.n cdab0 │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ ldr r1, [r0, r0] │ │ - b.n cdf42 │ │ + b.n cdf52 │ │ movs r2, r1 │ │ - b.n cdaa6 │ │ + b.n cdab6 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ asrs r0, r2, #3 │ │ - b.n cd7e2 │ │ + b.n cd7f2 │ │ lsls r0, r4, #24 │ │ - b.n cdb52 │ │ + b.n cdb62 │ │ asrs r1, r0, #32 │ │ - b.n cdd18 │ │ + b.n cdd28 │ │ subs r1, #2 │ │ - b.n cdf5a │ │ + b.n cdf6a │ │ str r1, [r2, r0] │ │ - b.n cd924 │ │ + b.n cd934 │ │ movs r0, r0 │ │ and.w r0, r0, r0, lsl #20 │ │ - b.n cdb66 │ │ + b.n cdb76 │ │ subs r0, r2, r1 │ │ - b.n cd368 │ │ + b.n cd378 │ │ subs r2, #80 @ 0x50 │ │ - b.n cd36c │ │ + b.n cd37c │ │ lsls r0, r3, #1 │ │ - b.n cd36c │ │ + b.n cd37c │ │ asrs r1, r0, #32 │ │ - b.n cd954 │ │ + b.n cd964 │ │ movs r4, r0 │ │ - b.n cd354 │ │ + b.n cd364 │ │ adds r0, #3 │ │ - b.n cd95c │ │ + b.n cd96c │ │ lsls r4, r2, #1 │ │ - b.n cd37c │ │ + b.n cd38c │ │ movs r0, r1 │ │ - b.n cd360 │ │ + b.n cd370 │ │ lsls r4, r3, #1 │ │ - b.n cd384 │ │ + b.n cd394 │ │ movs r4, r1 │ │ - b.n cd368 │ │ + b.n cd378 │ │ lsls r0, r2, #1 │ │ - b.n cd38c │ │ + b.n cd39c │ │ movs r0, #0 │ │ - b.n cd370 │ │ + b.n cd380 │ │ movs r3, #101 @ 0x65 │ │ - b.n cde5a │ │ + b.n cde6a │ │ movs r0, r3 │ │ - b.n cd378 │ │ + b.n cd388 │ │ movs r2, r0 │ │ - b.n cdfa2 │ │ + b.n cdfb2 │ │ strb r0, [r4, #0] │ │ - b.n cd380 │ │ - b.n cd8b0 │ │ - b.n cd384 │ │ + b.n cd390 │ │ + b.n cd8c0 │ │ + b.n cd394 │ │ str r0, [r5, r0] │ │ - b.n cd388 │ │ + b.n cd398 │ │ str r0, [sp, #64] @ 0x40 │ │ - b.n cd38c │ │ + b.n cd39c │ │ str r4, [r2, #0] │ │ - b.n cd390 │ │ + b.n cd3a0 │ │ ands r4, r3 │ │ - b.n cd394 │ │ - adds r6, #106 @ 0x6a │ │ + b.n cd3a4 │ │ + adds r6, #105 @ 0x69 │ │ @ instruction: 0xebff406c │ │ - b.n cd3bc │ │ + b.n cd3cc │ │ ldc2l 10, cr14, [sp, #1020]! @ 0x3fc @ │ │ movs r0, #24 │ │ - b.n cd3b8 │ │ + b.n cd3c8 │ │ stmia r0!, {r0} │ │ - b.n cde9e │ │ + b.n cdeae │ │ movs r0, #88 @ 0x58 │ │ - b.n cd3ac │ │ + b.n cd3bc │ │ movs r0, #28 │ │ - b.n cd3c4 │ │ + b.n cd3d4 │ │ adds r1, #182 @ 0xb6 │ │ - b.n cdc48 │ │ + b.n cdc58 │ │ movs r0, #92 @ 0x5c │ │ - b.n cd3b8 │ │ + b.n cd3c8 │ │ movs r0, #32 │ │ - b.n cd3d0 │ │ + b.n cd3e0 │ │ movs r0, #84 @ 0x54 │ │ - b.n cd3c0 │ │ + b.n cd3d0 │ │ movs r0, #12 │ │ - b.n cd8b0 │ │ + b.n cd8c0 │ │ movs r4, r1 │ │ - b.n cdb52 │ │ + b.n cdb62 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ cmp r7, #255 @ 0xff │ │ - b.n cded4 │ │ + b.n cdee4 │ │ @ instruction: 0xe801e3a0 │ │ movs r2, r0 │ │ - b.n cdb64 │ │ + b.n cdb74 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #211 @ 0xd3 │ │ - b.n cd89a │ │ + b.n cd8aa │ │ adds r6, #35 @ 0x23 │ │ - b.n cdc0a │ │ - b.n cd8ce │ │ - b.n cddd2 │ │ + b.n cdc1a │ │ + b.n cd8de │ │ + b.n cdde2 │ │ cmp r1, #2 │ │ - b.n ce012 │ │ - b.n cdf10 │ │ - b.n cd9da │ │ + b.n ce022 │ │ + b.n cdf20 │ │ + b.n cd9ea │ │ movs r0, r0 │ │ @ instruction: 0xea00e003 │ │ - b.n cdc1e │ │ + b.n cdc2e │ │ movs r0, #12 │ │ - b.n cd8e4 │ │ - b.n cd984 │ │ - b.n cd400 │ │ + b.n cd8f4 │ │ + b.n cd994 │ │ + b.n cd410 │ │ movs r4, r1 │ │ - b.n cdb8e │ │ + b.n cdb9e │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ cmp r7, #255 @ 0xff │ │ - b.n cdf10 │ │ + b.n cdf20 │ │ subs r0, #1 │ │ - b.n ce036 │ │ + b.n ce046 │ │ movs r2, r0 │ │ - b.n cdb9c │ │ + b.n cdbac │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #209 @ 0xd1 │ │ - b.n cd8d6 │ │ + b.n cd8e6 │ │ asrs r1, r4, #24 │ │ - b.n cdc46 │ │ + b.n cdc56 │ │ movs r0, #1 │ │ - b.n cde0e │ │ + b.n cde1e │ │ subs r1, #2 │ │ - b.n ce04e │ │ + b.n ce05e │ │ adds r1, #18 │ │ - b.n cda18 │ │ + b.n cda28 │ │ movs r0, r0 │ │ and.w r0, r0, r1, lsl #12 │ │ - b.n cdc5a │ │ + b.n cdc6a │ │ asrs r0, r3, #3 │ │ - b.n cddb4 │ │ + b.n cddc4 │ │ adds r0, #76 @ 0x4c │ │ - b.n cd43c │ │ - b.n cdae4 │ │ - b.n cd35c │ │ + b.n cd44c │ │ + b.n cdaf4 │ │ + b.n cd36c │ │ adds r1, #178 @ 0xb2 │ │ - b.n cdbcc │ │ + b.n cdbdc │ │ asrs r0, r5, #3 │ │ - b.n cd364 │ │ + b.n cd374 │ │ asrs r4, r0, #1 │ │ - b.n cd44c │ │ + b.n cd45c │ │ asrs r4, r4, #3 │ │ - b.n cd36c │ │ + b.n cd37c │ │ asrs r0, r1, #1 │ │ - b.n cd454 │ │ + b.n cd464 │ │ asrs r1, r0, #32 │ │ - b.n cdf4e │ │ + b.n cdf5e │ │ movs r0, #1 │ │ - b.n cd948 │ │ + b.n cd958 │ │ movs r1, r0 │ │ - b.n cdbea │ │ + b.n cdbfa │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ cmp r7, #255 @ 0xff │ │ - b.n cdf6c │ │ + b.n cdf7c │ │ ldmia r0, {r0} │ │ - b.n ce092 │ │ + b.n ce0a2 │ │ movs r2, r0 │ │ - b.n cdbfc │ │ + b.n cdc0c │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #211 @ 0xd3 │ │ - b.n cd932 │ │ + b.n cd942 │ │ adds r6, #35 @ 0x23 │ │ - b.n cdca2 │ │ + b.n cdcb2 │ │ stmia r0!, {r0} │ │ - b.n cde6a │ │ + b.n cde7a │ │ cmp r1, #2 │ │ - b.n ce0aa │ │ + b.n ce0ba │ │ stmia r3!, {r2, r3, r4} │ │ - b.n cda72 │ │ + b.n cda82 │ │ movs r1, r0 │ │ - and.w lr, r0, r4, ror #6 │ │ + and.w lr, r0, r4, lsl #7 │ │ movs r1, r0 │ │ stmia r0!, {r0, r1} │ │ - b.n cdcba │ │ + b.n cdcca │ │ movs r0, #1 │ │ - b.n cd97e │ │ + b.n cd98e │ │ movs r1, r0 │ │ - b.n cdc26 │ │ + b.n cdc36 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ subs r7, r7, #7 │ │ - b.n cdfa8 │ │ + b.n cdfb8 │ │ subs r0, #1 │ │ - b.n ce0ce │ │ + b.n ce0de │ │ movs r1, r0 │ │ - b.n cdc32 │ │ + b.n cdc42 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ asrs r0, r2, #3 │ │ - b.n cd96e │ │ + b.n cd97e │ │ lsls r0, r4, #24 │ │ - b.n cdcde │ │ + b.n cdcee │ │ asrs r1, r0, #32 │ │ - b.n cdea4 │ │ + b.n cdeb4 │ │ cmp r1, #2 │ │ - b.n ce0e6 │ │ + b.n ce0f6 │ │ adds r0, #17 │ │ - b.n cdaae │ │ + b.n cdabe │ │ movs r0, r0 │ │ and.w r0, r0, r0, lsl #12 │ │ - b.n cdcf2 │ │ + b.n cdd02 │ │ adds r0, r3, r3 │ │ - b.n cd4f4 │ │ + b.n cd504 │ │ movs r3, #114 @ 0x72 │ │ - b.n cdfba │ │ + b.n cdfca │ │ lsls r4, r0, #1 │ │ - b.n cd4f8 │ │ + b.n cd508 │ │ movs r0, r4 │ │ - b.n cd4dc │ │ + b.n cd4ec │ │ asrs r1, r0, #32 │ │ - b.n cdae4 │ │ + b.n cdaf4 │ │ lsls r0, r1, #1 │ │ - b.n cd504 │ │ + b.n cd514 │ │ movs r0, r5 │ │ - b.n cd4e8 │ │ + b.n cd4f8 │ │ lsls r0, r3, #1 │ │ - b.n cd50c │ │ + b.n cd51c │ │ movs r0, r0 │ │ - b.n cd4f0 │ │ + b.n cd500 │ │ lsls r4, r2, #1 │ │ - b.n cd514 │ │ + b.n cd524 │ │ movs r4, r0 │ │ - b.n cd4f8 │ │ + b.n cd508 │ │ lsls r4, r3, #1 │ │ - b.n cd51c │ │ + b.n cd52c │ │ movs r0, r1 │ │ - b.n cd500 │ │ + b.n cd510 │ │ lsls r0, r2, #1 │ │ - b.n cd524 │ │ + b.n cd534 │ │ movs r4, r1 │ │ - b.n cd508 │ │ + b.n cd518 │ │ lsls r4, r1, #1 │ │ - b.n cd52c │ │ + b.n cd53c │ │ movs r0, r2 │ │ - b.n cd510 │ │ + b.n cd520 │ │ movs r3, r0 │ │ - b.n ce13a │ │ + b.n ce14a │ │ mvns r0, r7 │ │ - b.n cdd98 │ │ + b.n cdda8 │ │ str r0, [r3, #0] │ │ - b.n cd51c │ │ + b.n cd52c │ │ str r0, [sp, #112] @ 0x70 │ │ - b.n cd520 │ │ - b.n cda50 │ │ - b.n cd524 │ │ + b.n cd530 │ │ + b.n cda60 │ │ + b.n cd534 │ │ stmia r0!, {r2, r3, r5} │ │ - b.n cd528 │ │ + b.n cd538 │ │ adds r0, #48 @ 0x30 │ │ - b.n cd52c │ │ + b.n cd53c │ │ subs r0, #124 @ 0x7c │ │ - b.n cd554 │ │ + b.n cd564 │ │ adds r0, #3 │ │ - b.n cdb38 │ │ - adds r6, #2 │ │ + b.n cdb48 │ │ + adds r6, #1 │ │ @ instruction: 0xebfffe7f │ │ @ instruction: 0xeaff5000 │ │ - b.n cdd66 │ │ + b.n cdd76 │ │ movs r1, r0 │ │ - b.n ce11e │ │ + b.n ce12e │ │ mcr2 10, 7, r1, cr12, cr15, {7} @ │ │ movs r5, r7 │ │ - b.n ce0dc │ │ + b.n ce0ec │ │ movs r6, r0 │ │ lsls r0, r3, #23 │ │ str r5, [r7, r0] │ │ lsls r0, r4, #14 │ │ movs r2, r0 │ │ lsls r0, r2, #12 │ │ mcr2 10, 7, r1, cr7, cr15, {7} @ │ │ lsls r5, r3, #23 │ │ - b.n cddf6 │ │ + b.n cde06 │ │ movs r1, r0 │ │ - b.n ce12a │ │ + b.n ce13a │ │ mcr2 10, 7, ip, cr4, cr15, {7} @ │ │ lsls r0, r6, #3 │ │ - b.n cd582 │ │ + b.n cd592 │ │ movs r0, r0 │ │ - b.n ce0f6 │ │ + b.n ce106 │ │ lsls r1, r0, #6 │ │ lsrs r0, r0, #8 │ │ movs r0, r1 │ │ - b.n cdd9e │ │ + b.n cddae │ │ lsrs r1, r0, #7 │ │ add.w r0, r0, r0 │ │ - b.n ce106 │ │ + b.n ce116 │ │ movs r3, r3 │ │ subs r0, r0, r0 │ │ asrs r0, r0, #2 │ │ - b.n cd59e │ │ + b.n cd5ae │ │ movs r0, r1 │ │ - b.n cddb2 │ │ + b.n cddc2 │ │ str r5, [sp, #864] @ 0x360 │ │ @ instruction: 0xebff1000 │ │ - b.n cddba │ │ + b.n cddca │ │ lsrs r1, r0, #16 │ │ - b.n cdf14 │ │ + b.n cdf24 │ │ movs r0, #224 @ 0xe0 │ │ - b.n ce1c2 │ │ - subs r0, r2, #0 │ │ - mla r0, r0, r8, r2 │ │ - b.n cd5ba │ │ + b.n ce1d2 │ │ + adds r1, r5, #1 │ │ + @ instruction: 0xfa002008 │ │ + b.n cd5ca │ │ ands r0, r0 │ │ - b.n ce1ce │ │ + b.n ce1de │ │ movs r4, r2 │ │ - b.n cd5c2 │ │ + b.n cd5d2 │ │ asrs r0, r0, #2 │ │ - b.n cd5c6 │ │ + b.n cd5d6 │ │ movs r0, #130 @ 0x82 │ │ - b.n cdb9e │ │ + b.n cdbae │ │ ands r0, r0 │ │ - b.n cd5b8 │ │ + b.n cd5c8 │ │ ands r4, r0 │ │ - b.n cd5bc │ │ + b.n cd5cc │ │ str r5, [sp, #668] @ 0x29c │ │ @ instruction: 0xebff0000 │ │ - b.n ce14a │ │ + b.n ce15a │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ movs r0, #240 @ 0xf0 │ │ - b.n cd5e2 │ │ + b.n cd5f2 │ │ adds r0, #0 │ │ - b.n ce1f6 │ │ + b.n ce206 │ │ movs r4, r2 │ │ - b.n cd5ea │ │ + b.n cd5fa │ │ movs r0, #28 │ │ - b.n cd5ce │ │ + b.n cd5de │ │ movs r0, #32 │ │ - b.n cd5d2 │ │ + b.n cd5e2 │ │ ands r4, r4 │ │ - b.n cd5d6 │ │ + b.n cd5e6 │ │ str r7, [sp, #68] @ 0x44 │ │ @ instruction: 0xebffa070 │ │ - b.n cd608 │ │ + b.n cd618 │ │ movs r0, #0 │ │ - b.n ce292 │ │ + b.n ce2a2 │ │ movs r0, r0 │ │ - b.n ce176 │ │ + b.n ce186 │ │ @ instruction: 0xfa9e0aff │ │ str r0, [r0, r0] │ │ - b.n cde1e │ │ + b.n cde2e │ │ mrc2 10, 5, lr, cr15, cr15, {7} @ │ │ - adds r0, r3, #5 │ │ + adds r0, r5, #5 │ │ movs r1, r0 │ │ asrs r0, r5, #25 │ │ - b.n cd628 │ │ + b.n cd638 │ │ movs r7, #180 @ 0xb4 │ │ - b.n ce0fe │ │ + b.n ce10e │ │ cmp r7, #255 @ 0xff │ │ - b.n ce190 │ │ + b.n ce1a0 │ │ str r4, [r1, r0] │ │ - b.n cdffa │ │ + b.n ce00a │ │ asrs r1, r0, #32 │ │ - b.n cdc18 │ │ + b.n cdc28 │ │ asrs r2, r3, #1 │ │ - b.n cd6a0 │ │ + b.n cd6b0 │ │ movs r0, r0 │ │ - b.n ce1a4 │ │ + b.n ce1b4 │ │ mrc2 10, 5, r0, cr6, cr15, {7} @ │ │ asrs r4, r1, #25 │ │ - b.n cd648 │ │ + b.n cd658 │ │ movs r2, #41 @ 0x29 │ │ - b.n ce10e │ │ + b.n ce11e │ │ adds r6, #72 @ 0x48 │ │ - b.n cd650 │ │ + b.n cd660 │ │ strb r0, [r1, #25] │ │ - b.n cd654 │ │ + b.n cd664 │ │ asrs r1, r0, #32 │ │ - b.n cdc38 │ │ + b.n cdc48 │ │ adds r0, #3 │ │ - b.n cdc3c │ │ + b.n cdc4c │ │ strb r7, [r0, #0] │ │ - b.n cdc40 │ │ + b.n cdc50 │ │ lsls r1, r0, #2 │ │ stmia.w sp, {r9, sl, fp, ip, sp, lr, pc} │ │ @ instruction: 0xeaff0000 │ │ - b.n ce2ee │ │ + b.n ce2fe │ │ @ instruction: 0xfaa5eaff │ │ lsls r4, r1, #30 │ │ - b.n cd674 │ │ + b.n cd684 │ │ movs r2, #130 @ 0x82 │ │ - b.n ce13a │ │ + b.n ce14a │ │ asrs r0, r1, #30 │ │ - b.n cd67c │ │ + b.n cd68c │ │ movs r0, r0 │ │ - b.n cdc60 │ │ + b.n cdc70 │ │ asrs r1, r0, #32 │ │ - b.n cdc64 │ │ - adds r4, #171 @ 0xab │ │ + b.n cdc74 │ │ + adds r4, #170 @ 0xaa │ │ @ instruction: 0xebff077c │ │ - b.n cd68c │ │ + b.n cd69c │ │ movs r2, #131 @ 0x83 │ │ - b.n ce152 │ │ + b.n ce162 │ │ asrs r0, r7, #29 │ │ - b.n cd694 │ │ + b.n cd6a4 │ │ movs r0, r0 │ │ - b.n cdc78 │ │ + b.n cdc88 │ │ asrs r1, r0, #32 │ │ - b.n cdc7c │ │ - adds r4, #165 @ 0xa5 │ │ + b.n cdc8c │ │ + adds r4, #164 @ 0xa4 │ │ @ instruction: 0xebff0001 │ │ - b.n ce25a │ │ + b.n ce26a │ │ @ instruction: 0xfbc61aff │ │ asrs r0, r0, #32 │ │ - b.n cdbb6 │ │ + b.n cdbc6 │ │ asrs r7, r0, #32 │ │ - b.n cde94 │ │ + b.n cdea4 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ asrs r0, r2, #24 │ │ - b.n cd6b8 │ │ + b.n cd6c8 │ │ asrs r1, r0, #32 │ │ - b.n cdc9c │ │ + b.n cdcac │ │ asrs r2, r3, #1 │ │ - b.n cd724 │ │ + b.n cd734 │ │ movs r2, r0 │ │ - b.n ce228 │ │ + b.n ce238 │ │ lsls r2, r2, #4 │ │ cmp r2, #0 │ │ lsls r4, r6, #1 │ │ - b.n cd6c8 │ │ + b.n cd6d8 │ │ movs r0, r0 │ │ - b.n cdc3a │ │ + b.n cdc4a │ │ movs r0, r0 │ │ - b.n ce144 │ │ + b.n ce154 │ │ lsls r2, r1, #3 │ │ cmp r2, #0 │ │ lsls r0, r7, #23 │ │ - b.n cd6dc │ │ + b.n cd6ec │ │ ldrsb r4, [r6, r6] │ │ - b.n ce1b2 │ │ + b.n ce1c2 │ │ ldrsh r7, [r7, r7] │ │ - b.n ce244 │ │ + b.n ce254 │ │ movs r0, r0 │ │ - b.n cdcc8 │ │ + b.n cdcd8 │ │ lsls r2, r3, #1 │ │ - b.n cd74e │ │ + b.n cd75e │ │ movs r0, r0 │ │ - b.n ce252 │ │ + b.n ce262 │ │ mcr2 10, 4, r0, cr10, cr15, {7} @ │ │ asrs r0, r4, #23 │ │ - b.n cd6f8 │ │ + b.n cd708 │ │ movs r0, #92 @ 0x5c │ │ - b.n cd76e │ │ + b.n cd77e │ │ lsls r4, r3, #3 │ │ - b.n cd5f8 │ │ + b.n cd608 │ │ asrs r1, r0, #32 │ │ - b.n cdce4 │ │ + b.n cdcf4 │ │ adds r5, #212 @ 0xd4 │ │ - b.n cd708 │ │ + b.n cd718 │ │ strb r4, [r6, #8] │ │ - b.n cdf0e │ │ + b.n cdf1e │ │ lsls r1, r0, #2 │ │ stmia.w sp, {r0, r1, ip, sp} │ │ - b.n cdcf4 │ │ + b.n cdd04 │ │ movs r1, r0 │ │ - b.n ce31a │ │ + b.n ce32a │ │ movs r2, #147 @ 0x93 │ │ - b.n ce1de │ │ + b.n ce1ee │ │ stc2l 10, cr14, [r6, #1020]! @ 0x3fc @ │ │ eors r4, r3 │ │ - b.n cd796 │ │ + b.n cd7a6 │ │ movs r0, #20 │ │ - b.n ce32a │ │ + b.n ce33a │ │ asrs r0, r2, #32 │ │ - b.n cd71e │ │ + b.n cd72e │ │ strb r0, [r3, #2] │ │ - b.n ce10c │ │ + b.n ce11c │ │ strb r0, [r2, r0] │ │ - b.n cdcfa │ │ + b.n cdd0a │ │ movs r7, r0 │ │ - b.n cdf3a │ │ + b.n cdf4a │ │ str r1, [r0, #0] │ │ - b.n cdd08 │ │ + b.n cdd18 │ │ movs r0, #224 @ 0xe0 │ │ - b.n ce342 │ │ + b.n ce352 │ │ asrs r6, r0, #32 │ │ - b.n cdf46 │ │ - adds r7, r5, #6 │ │ - mls r0, r0, r4, r6 │ │ - b.n ce09a │ │ + b.n cdf56 │ │ + adds r0, r1, #0 │ │ + @ instruction: 0xfa006014 │ │ + b.n ce0aa │ │ movs r0, r0 │ │ - b.n ce352 │ │ + b.n ce362 │ │ movs r0, r0 │ │ - b.n cd730 │ │ + b.n cd740 │ │ adds r4, #53 @ 0x35 │ │ - b.n cdf5a │ │ + b.n cdf6a │ │ movs r0, r1 │ │ - b.n cdf5e │ │ + b.n cdf6e │ │ asrs r7, r0, #32 │ │ - b.n cdf62 │ │ + b.n cdf72 │ │ movs r0, #6 │ │ - b.n cdf66 │ │ - str r2, [r7, r0] │ │ + b.n cdf76 │ │ + str r1, [r7, r0] │ │ @ instruction: 0xebff0000 │ │ - b.n ce2ce │ │ + b.n ce2de │ │ lsls r0, r4, #4 │ │ subs r0, r0, r0 │ │ eors r4, r5 │ │ - b.n cd770 │ │ + b.n cd780 │ │ movs r1, r0 │ │ - b.n ce32e │ │ + b.n ce33e │ │ strb r0, [r4, #24] │ │ - b.n cd77c │ │ + b.n cd78c │ │ strb r7, [r0, #0] │ │ - b.n cdd60 │ │ + b.n cdd70 │ │ @ instruction: 0xfbdf1aff │ │ ldc2l 10, cr14, [r1], {255} @ 0xff @ │ │ asrs r2, r0, #32 │ │ - b.n cdf8e │ │ + b.n cdf9e │ │ asrs r0, r5, #1 │ │ - b.n cd76c │ │ + b.n cd77c │ │ asrs r4, r6, #6 │ │ - b.n ce004 │ │ + b.n ce014 │ │ movs r0, #0 │ │ - b.n cdc5c │ │ + b.n cdc6c │ │ movs r0, r0 │ │ - b.n cdf02 │ │ + b.n cdf12 │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ lsrs r1, r0, #32 │ │ - b.n ce3a6 │ │ + b.n ce3b6 │ │ movs r6, r1 │ │ - b.n cdf0c │ │ + b.n cdf1c │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ lsls r1, r2, #3 │ │ - b.n cdc46 │ │ + b.n cdc56 │ │ asrs r1, r4, #24 │ │ - b.n cdfb6 │ │ + b.n cdfc6 │ │ movs r1, r0 │ │ - b.n ce17a │ │ + b.n ce18a │ │ cmp r1, #2 │ │ - b.n ce3be │ │ + b.n ce3ce │ │ lsls r0, r2, #4 │ │ - b.n cdd86 │ │ + b.n cdd96 │ │ movs r0, r0 │ │ and.w r0, r0, r1 │ │ - b.n cdfca │ │ + b.n cdfda │ │ lsls r4, r4, #1 │ │ - b.n cd7a8 │ │ + b.n cd7b8 │ │ lsls r0, r3, #3 │ │ - b.n ce128 │ │ + b.n ce138 │ │ lsrs r0, r5 │ │ - b.n cd6cc │ │ + b.n cd6dc │ │ adds r0, #1 │ │ - b.n ce2aa │ │ + b.n ce2ba │ │ asrs r2, r6, #6 │ │ - b.n cdf3e │ │ + b.n cdf4e │ │ movs r0, #228 @ 0xe4 │ │ - b.n cd6d8 │ │ - add r0, pc, #896 @ (adr r0, ce024 ) │ │ - b.n cd6dc │ │ + b.n cd6e8 │ │ + add r0, pc, #896 @ (adr r0, ce034 ) │ │ + b.n cd6ec │ │ strb r3, [r0, #0] │ │ - b.n cdcac │ │ + b.n cdcbc │ │ movs r3, r0 │ │ - b.n cdf5c │ │ + b.n cdf6c │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ ldmia r0, {r0} │ │ - b.n ce3f6 │ │ + b.n ce406 │ │ movs r6, r1 │ │ - b.n cdf5c │ │ + b.n cdf6c │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ strb r1, [r2, #3] │ │ - b.n cdc96 │ │ + b.n cdca6 │ │ asrs r1, r4, #24 │ │ - b.n ce006 │ │ + b.n ce016 │ │ stmia r0!, {r0} │ │ - b.n ce1d8 │ │ + b.n ce1e8 │ │ ldrb r2, [r0, #4] │ │ - b.n ce40e │ │ + b.n ce41e │ │ stmia r1!, {r2, r3, r4} │ │ - b.n cdde0 │ │ + b.n cddf0 │ │ movs r1, r0 │ │ - and.w fp, r0, r8, lsl #5 │ │ + and.w fp, r0, r8, lsr #5 │ │ movs r1, r0 │ │ stmia r0!, {r0} │ │ - b.n ce01e │ │ + b.n ce02e │ │ lsrs r1, r0, #16 │ │ - b.n ce178 │ │ - b.n cdcf4 │ │ - b.n ce1e6 │ │ + b.n ce188 │ │ + b.n cdd04 │ │ + b.n ce1f6 │ │ lsls r0, r3, #3 │ │ - b.n ce180 │ │ + b.n ce190 │ │ asrs r4, r6, #6 │ │ - b.n cdf8e │ │ + b.n cdf9e │ │ strb r3, [r0, #0] │ │ - b.n cdcf4 │ │ + b.n cdd04 │ │ movs r3, r0 │ │ - b.n cdfa4 │ │ + b.n cdfb4 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ lsrs r7, r7, #31 │ │ - b.n ce31c │ │ + b.n ce32c │ │ ldrh r1, [r0, #0] │ │ - b.n ce442 │ │ + b.n ce452 │ │ movs r0, r0 │ │ - b.n cdfa8 │ │ + b.n cdfb8 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ adds r0, #209 @ 0xd1 │ │ - b.n cdce2 │ │ + b.n cdcf2 │ │ asrs r1, r4, #24 │ │ - b.n ce052 │ │ + b.n ce062 │ │ adds r0, #1 │ │ - b.n ce21c │ │ + b.n ce22c │ │ ldrb r2, [r0, #4] │ │ - b.n ce45a │ │ + b.n ce46a │ │ strh r3, [r2, #8] │ │ - b.n cde2c │ │ + b.n cde3c │ │ movs r1, r0 │ │ - and.w sl, r0, r0, asr #7 │ │ + and.w sl, r0, r0, ror #7 │ │ movs r1, r0 │ │ strh r1, [r0, #0] │ │ - b.n ce06a │ │ + b.n ce07a │ │ asrs r0, r6, #21 │ │ - b.n cd86c │ │ + b.n cd87c │ │ lsls r1, r0, #2 │ │ ldmia.w lr, {r0, ip} │ │ - b.n cde54 │ │ + b.n cde64 │ │ adds r5, #104 @ 0x68 │ │ - b.n cd878 │ │ + b.n cd888 │ │ movs r0, r7 │ │ - b.n cd858 │ │ + b.n cd868 │ │ lsls r0, r6, #1 │ │ - b.n cd87c │ │ + b.n cd88c │ │ adds r0, #3 │ │ - b.n cde64 │ │ + b.n cde74 │ │ movs r4, r0 │ │ - b.n cd864 │ │ + b.n cd874 │ │ lsls r4, r5, #1 │ │ - b.n cd888 │ │ + b.n cd898 │ │ movs r0, r1 │ │ - b.n cd86c │ │ + b.n cd87c │ │ lsls r4, r6, #1 │ │ - b.n cd890 │ │ + b.n cd8a0 │ │ movs r4, r1 │ │ - b.n cd874 │ │ + b.n cd884 │ │ lsls r0, r5, #1 │ │ - b.n cd898 │ │ + b.n cd8a8 │ │ movs r0, r2 │ │ - b.n cd87c │ │ + b.n cd88c │ │ lsls r4, r4, #1 │ │ - b.n cd8a0 │ │ + b.n cd8b0 │ │ movs r0, #40 @ 0x28 │ │ - b.n cd884 │ │ + b.n cd894 │ │ movs r0, #20 │ │ - b.n ce288 │ │ + b.n ce298 │ │ lsls r1, r0, #9 │ │ stmia.w r2, {r0} │ │ - b.n ce4b6 │ │ + b.n ce4c6 │ │ movs r3, #126 @ 0x7e │ │ - b.n ce37a │ │ + b.n ce38a │ │ strb r4, [r7, #0] │ │ - b.n cd898 │ │ + b.n cd8a8 │ │ ands r0, r4 │ │ - b.n cd89c │ │ - add r0, pc, #144 @ (adr r0, cde14 ) │ │ - b.n cd8a0 │ │ + b.n cd8ac │ │ + add r0, pc, #144 @ (adr r0, cde24 ) │ │ + b.n cd8b0 │ │ stmia r0!, {r2, r3, r5} │ │ - b.n cd8a4 │ │ + b.n cd8b4 │ │ strh r0, [r6, #0] │ │ - b.n cd8a8 │ │ + b.n cd8b8 │ │ str r0, [r0, r0] │ │ - b.n cd8ac │ │ + b.n cd8bc │ │ ldc2l 10, cr14, [r9, #-1020]! @ 0xfffffc04 @ │ │ - subs r4, r1, r2 │ │ + subs r4, r3, r2 │ │ movs r1, r0 │ │ - ldmia r6!, {r1, r2, r3, r5} │ │ + ldmia r6!, {r0, r1, r3, r5, r7} │ │ vaddl.u , d3, d0 │ │ - b.n ce0e2 │ │ + b.n ce0f2 │ │ lsls r4, r7, #14 │ │ - b.n cd8e4 │ │ + b.n cd8f4 │ │ movs r0, r0 │ │ - b.n cdec8 │ │ + b.n cded8 │ │ lsls r2, r3, #1 │ │ - b.n cd94e │ │ + b.n cd95e │ │ movs r0, r0 │ │ - b.n ce452 │ │ + b.n ce462 │ │ lsls r4, r6, #1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r5, #14 │ │ - b.n cd8f8 │ │ + b.n cd908 │ │ movs r1, r0 │ │ - b.n ce4fe │ │ + b.n ce50e │ │ adds r3, #168 @ 0xa8 │ │ - b.n cd900 │ │ + b.n cd910 │ │ movs r2, #71 @ 0x47 │ │ - b.n ce3c6 │ │ + b.n ce3d6 │ │ bics r4, r4 │ │ - b.n cd908 │ │ + b.n cd918 │ │ asrs r1, r0, #32 │ │ - b.n cdeec │ │ + b.n cdefc │ │ adds r0, #3 │ │ - b.n cdef0 │ │ + b.n cdf00 │ │ ands r4, r0 │ │ - b.n cdef4 │ │ + b.n cdf04 │ │ lsls r1, r5, #1 │ │ - @ instruction: 0xea00c771 │ │ - vqshl.u64 d29, d9, #51 @ 0x33 │ │ + @ instruction: 0xea00c7a2 │ │ + @ instruction: 0xfff3d7c0 │ │ vrsra.u64 d16, d12, #13 │ │ - b.n cd924 │ │ + b.n cd934 │ │ cmp r7, #158 @ 0x9e │ │ - b.n ce52a │ │ + b.n ce53a │ │ asrs r0, r3, #14 │ │ - b.n cd92c │ │ + b.n cd93c │ │ movs r0, r0 │ │ - b.n cdf10 │ │ + b.n cdf20 │ │ asrs r1, r0, #32 │ │ - b.n cdf14 │ │ - adds r3, #255 @ 0xff │ │ - @ instruction: 0xebfff73f │ │ - vcvt.f32.u32 d27, d16, #13 │ │ - vqshl.u32 d29, d4, #19 │ │ + b.n cdf24 │ │ + adds r3, #254 @ 0xfe │ │ + @ instruction: 0xebfff74a │ │ + vqrdmulh.s , , d27[0] │ │ + vqshl.u32 d29, d27, #19 │ │ vraddhn.i d16, , q8 │ │ - b.n cd948 │ │ + b.n cd958 │ │ movs r0, r0 │ │ - b.n cdf2c │ │ + b.n cdf3c │ │ lsls r2, r3, #1 │ │ - b.n cd9b2 │ │ + b.n cd9c2 │ │ movs r0, r0 │ │ - b.n ce4b6 │ │ + b.n ce4c6 │ │ mrc2 10, 0, r0, cr2, cr15, {7} @ │ │ asrs r0, r2, #16 │ │ - b.n cd95c │ │ + b.n cd96c │ │ adds r4, #16 │ │ - b.n cd960 │ │ + b.n cd970 │ │ lsls r0, r2, #16 │ │ - b.n cd964 │ │ + b.n cd974 │ │ asrs r1, r0, #32 │ │ - b.n cdf48 │ │ + b.n cdf58 │ │ movs r4, #12 │ │ - b.n cd96c │ │ + b.n cd97c │ │ adds r0, #3 │ │ - b.n cdf50 │ │ + b.n cdf60 │ │ strb r0, [r1, #16] │ │ - b.n cd974 │ │ + b.n cd984 │ │ movs r0, r0 │ │ - b.n cdf58 │ │ + b.n cdf68 │ │ movs r0, #2 │ │ - b.n cdf5c │ │ + b.n cdf6c │ │ movs r5, r0 │ │ @ instruction: 0xe98d7007 │ │ - b.n cdf64 │ │ + b.n cdf74 │ │ strb r0, [r0, #0] │ │ - b.n cd964 │ │ + b.n cd974 │ │ movs r1, r0 │ │ - b.n ce58e │ │ + b.n ce59e │ │ movs r3, #47 @ 0x2f │ │ - b.n ce452 │ │ + b.n ce462 │ │ mcr2 10, 0, lr, cr2, cr15, {7} @ │ │ lsls r0, r4, #13 │ │ - b.n cd998 │ │ + b.n cd9a8 │ │ movs r0, r0 │ │ - b.n cdf7c │ │ + b.n cdf8c │ │ lsls r2, r3, #1 │ │ - b.n cda02 │ │ + b.n cda12 │ │ movs r0, r0 │ │ - b.n ce506 │ │ + b.n ce516 │ │ ldc2l 10, cr0, [lr, #1020]! @ 0x3fc @ │ │ lsls r4, r3, #1 │ │ - b.n cda1e │ │ + b.n cda2e │ │ movs r3, #76 @ 0x4c │ │ - b.n cd9b0 │ │ + b.n cd9c0 │ │ asrs r4, r1, #13 │ │ - b.n cd9b4 │ │ + b.n cd9c4 │ │ adds r3, #76 @ 0x4c │ │ - b.n cd9b8 │ │ + b.n cd9c8 │ │ movs r0, #2 │ │ - b.n cdf9c │ │ + b.n cdfac │ │ strb r0, [r2, #0] │ │ - b.n cd9b2 │ │ + b.n cd9c2 │ │ asrs r1, r0, #32 │ │ - b.n cdfa4 │ │ + b.n cdfb4 │ │ strh r0, [r0, r5] │ │ - b.n cd9c8 │ │ + b.n cd9d8 │ │ adds r0, #3 │ │ - b.n cdfac │ │ + b.n cdfbc │ │ strb r7, [r0, #0] │ │ - b.n cdf26 │ │ + b.n cdf36 │ │ str r5, [r0, r0] │ │ - b.n cdfb4 │ │ + b.n cdfc4 │ │ str r0, [r2, r0] │ │ - b.n cd9b4 │ │ + b.n cd9c4 │ │ movs r7, r6 │ │ - b.n ce1de │ │ + b.n ce1ee │ │ movs r5, r0 │ │ stmia.w sp, {r0, r6, r7, r8, r9, sl, fp, sp} │ │ - b.n ce5e6 │ │ + b.n ce5f6 │ │ lsls r0, r1, #1 │ │ - b.n cd9e4 │ │ + b.n cd9f4 │ │ movs r0, r1 │ │ - b.n cd9c8 │ │ + b.n cd9d8 │ │ lsls r4, r1, #1 │ │ - b.n cd9ec │ │ + b.n cd9fc │ │ movs r4, r1 │ │ - b.n cd9d0 │ │ + b.n cd9e0 │ │ stc2l 10, cr14, [r8, #1020]! @ 0x3fc @ │ │ - adds r0, r1, r6 │ │ + adds r0, r3, r6 │ │ movs r1, r0 │ │ - pop {r3, r4, r6, pc} │ │ - @ instruction: 0xfff31d8f │ │ + pop {r0, r1, r4, r7} │ │ + vcvt.u32.f32 d17, d1, #13 │ │ vrev64.16 d16, d6 │ │ - b.n cda7a │ │ + b.n cda8a │ │ movs r2, r0 │ │ - b.n ce4ee │ │ + b.n ce4fe │ │ @ instruction: 0xfaec0aff │ │ asrs r4, r1, #11 │ │ - b.n cda14 │ │ + b.n cda24 │ │ asrs r1, r0, #32 │ │ - b.n cdff8 │ │ + b.n ce008 │ │ lsls r0, r2, #1 │ │ - b.n cda00 │ │ + b.n cda10 │ │ asrs r2, r3, #1 │ │ - b.n cda84 │ │ + b.n cda94 │ │ movs r0, #1 │ │ - b.n ce366 │ │ + b.n ce376 │ │ movs r2, r0 │ │ - b.n ce112 │ │ + b.n ce122 │ │ movs r3, r5 │ │ lsrs r0, r0, #8 │ │ ldr r5, [r5, r4] │ │ - b.n ce502 │ │ + b.n ce512 │ │ movs r0, r0 │ │ - b.n ce598 │ │ + b.n ce5a8 │ │ ldrsh r7, [r7, r7] │ │ - b.n ce598 │ │ + b.n ce5a8 │ │ ldc2 10, cr0, [r8, #1020]! @ 0x3fc @ │ │ asrs r4, r4, #10 │ │ - b.n cda40 │ │ + b.n cda50 │ │ movs r2, #153 @ 0x99 │ │ - b.n ce506 │ │ + b.n ce516 │ │ adds r2, #160 @ 0xa0 │ │ - b.n cda48 │ │ + b.n cda58 │ │ asrs r1, r0, #32 │ │ - b.n ce02c │ │ + b.n ce03c │ │ movs r0, r0 │ │ - b.n cda2c │ │ + b.n cda3c │ │ adds r0, #3 │ │ - b.n ce034 │ │ + b.n ce044 │ │ stc2 10, cr14, [r4, #-1020] @ 0xfffffc04 @ │ │ lsls r4, r6, #14 │ │ - b.n cda5c │ │ + b.n cda6c │ │ movs r3, #71 @ 0x47 │ │ - b.n ce522 │ │ + b.n ce532 │ │ asrs r0, r6, #14 │ │ - b.n cda64 │ │ + b.n cda74 │ │ movs r0, r0 │ │ - b.n ce048 │ │ + b.n ce058 │ │ asrs r1, r0, #32 │ │ - b.n ce04c │ │ - adds r3, #177 @ 0xb1 │ │ + b.n ce05c │ │ + adds r3, #176 @ 0xb0 │ │ @ instruction: 0xebff0320 │ │ - b.n cda74 │ │ + b.n cda84 │ │ cmp r7, #210 @ 0xd2 │ │ - b.n ce67a │ │ + b.n ce68a │ │ asrs r4, r3, #12 │ │ - b.n cda7c │ │ + b.n cda8c │ │ movs r0, r0 │ │ - b.n ce060 │ │ + b.n ce070 │ │ asrs r1, r0, #32 │ │ - b.n ce064 │ │ - adds r3, #171 @ 0xab │ │ + b.n ce074 │ │ + adds r3, #170 @ 0xaa │ │ @ instruction: 0xebff5000 │ │ - b.n ce28e │ │ + b.n ce29e │ │ lsls r0, r4, #8 │ │ - b.n cda90 │ │ + b.n cdaa0 │ │ movs r0, r0 │ │ - b.n ce074 │ │ + b.n ce084 │ │ lsls r2, r3, #1 │ │ - b.n cdafa │ │ + b.n cdb0a │ │ movs r0, r0 │ │ - b.n ce5fe │ │ + b.n ce60e │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r2, #8 │ │ - b.n cdaa4 │ │ + b.n cdab4 │ │ movs r1, r0 │ │ - b.n ce6aa │ │ + b.n ce6ba │ │ adds r2, #12 │ │ - b.n cdaac │ │ + b.n cdabc │ │ movs r2, #99 @ 0x63 │ │ - b.n ce572 │ │ + b.n ce582 │ │ tst r0, r1 │ │ - b.n cdab4 │ │ + b.n cdac4 │ │ asrs r1, r0, #32 │ │ - b.n ce098 │ │ + b.n ce0a8 │ │ adds r0, #3 │ │ - b.n ce09c │ │ + b.n ce0ac │ │ ands r4, r0 │ │ - b.n ce0a0 │ │ + b.n ce0b0 │ │ lsrs r0, r6 │ │ - b.n ce320 │ │ - adds r4, #167 @ 0xa7 │ │ + b.n ce330 │ │ + adds r4, #166 @ 0xa6 │ │ @ instruction: 0xebff07b4 │ │ - b.n ce59e │ │ + b.n ce5ae │ │ movs r6, r2 │ │ - b.n ce63c │ │ + b.n ce64c │ │ lsrs r7, r7, #31 │ │ - b.n ce634 │ │ + b.n ce644 │ │ str r4, [r1, r0] │ │ lsls r0, r0, #10 │ │ ldc2 10, cr14, [r0, #1020] @ 0x3fc @ │ │ - add r0, pc, #448 @ (adr r0, ce160 ) │ │ - b.n cdadc │ │ + add r0, pc, #448 @ (adr r0, ce170 ) │ │ + b.n cdaec │ │ movs r2, r0 │ │ - b.n ce648 │ │ + b.n ce658 │ │ @ instruction: 0xfab63aff │ │ asrs r0, r0, #8 │ │ - b.n cdaec │ │ + b.n cdafc │ │ cmp r7, #167 @ 0xa7 │ │ - b.n ce6f2 │ │ + b.n ce702 │ │ adds r1, #252 @ 0xfc │ │ - b.n cdaf4 │ │ + b.n cdb04 │ │ lsls r4, r7, #7 │ │ - b.n cdaf8 │ │ + b.n cdb08 │ │ asrs r1, r0, #32 │ │ - b.n ce0dc │ │ + b.n ce0ec │ │ adds r0, #3 │ │ - b.n ce0e0 │ │ + b.n ce0f0 │ │ movs r0, r0 │ │ - b.n ce0e4 │ │ + b.n ce0f4 │ │ movs r0, r0 │ │ - b.n cdae4 │ │ + b.n cdaf4 │ │ movs r2, r0 │ │ - b.n ce70e │ │ - adds r4, #149 @ 0x95 │ │ + b.n ce71e │ │ + adds r4, #148 @ 0x94 │ │ @ instruction: 0xebfffaab │ │ @ instruction: 0xeaff11b4 │ │ - b.n cdb18 │ │ + b.n cdb28 │ │ stmia r5!, {r4, r5} │ │ - b.n ce31e │ │ + b.n ce32e │ │ adds r1, #176 @ 0xb0 │ │ - b.n cdb20 │ │ + b.n cdb30 │ │ str r7, [r6, #80] @ 0x50 │ │ - b.n ce326 │ │ + b.n ce336 │ │ movs r0, #32 │ │ - b.n ce494 │ │ - b.n cda54 │ │ - b.n ce32e │ │ + b.n ce4a4 │ │ + b.n cda64 │ │ + b.n ce33e │ │ str r0, [r4, r0] │ │ - b.n ce4bc │ │ + b.n ce4cc │ │ str r0, [r0, #0] │ │ strh r0, [r0, r4] │ │ asrs r1, r0, #32 │ │ - b.n ce118 │ │ + b.n ce128 │ │ adds r0, #3 │ │ - b.n ce11c │ │ + b.n ce12c │ │ strb r7, [r2, r4] │ │ - b.n ce31e │ │ + b.n ce32e │ │ movs r0, r0 │ │ - b.n ce6aa │ │ + b.n ce6ba │ │ strh r7, [r6, r0] │ │ str r0, [r4, r6] │ │ asrs r1, r0, #32 │ │ stmia.w sp, {r1} │ │ - b.n ce752 │ │ + b.n ce762 │ │ cmp r6, #41 @ 0x29 │ │ - b.n ce756 │ │ + b.n ce766 │ │ ands r0, r1 │ │ - b.n cdb34 │ │ + b.n cdb44 │ │ strb r4, [r1, #0] │ │ - b.n cdb38 │ │ + b.n cdb48 │ │ str r0, [r2, r0] │ │ - b.n cdb3c │ │ + b.n cdb4c │ │ str r4, [r2, #0] │ │ - b.n cdb40 │ │ - adds r4, #127 @ 0x7f │ │ + b.n cdb50 │ │ + adds r4, #126 @ 0x7e │ │ @ instruction: 0xebfffed6 │ │ @ instruction: 0xeaff07b4 │ │ - b.n ce642 │ │ + b.n ce652 │ │ movs r0, r0 │ │ - b.n ce6da │ │ + b.n ce6ea │ │ lsrs r7, r7, #31 │ │ - b.n ce6d8 │ │ + b.n ce6e8 │ │ movs r5, r2 │ │ subs r0, r0, r0 │ │ str r0, [r1, r0] │ │ - b.n ce742 │ │ + b.n ce752 │ │ stc2l 10, cr14, [r6, #-1020]! @ 0xfffffc04 @ │ │ lsls r0, r2, #10 │ │ - b.n cdb88 │ │ + b.n cdb98 │ │ cmp r7, #221 @ 0xdd │ │ - b.n ce78e │ │ + b.n ce79e │ │ asrs r4, r1, #10 │ │ - b.n cdb90 │ │ + b.n cdba0 │ │ movs r0, r0 │ │ - b.n ce174 │ │ + b.n ce184 │ │ asrs r1, r0, #32 │ │ - b.n ce178 │ │ - adds r3, #102 @ 0x66 │ │ - @ instruction: 0xebff17dc │ │ + b.n ce188 │ │ + adds r3, #101 @ 0x65 │ │ + @ instruction: 0xebff17ec │ │ movs r1, r0 │ │ movs r0, r0 │ │ - b.n ce826 │ │ + b.n ce836 │ │ asrs r0, r0, #32 │ │ - b.n ce7aa │ │ + b.n ce7ba │ │ movs r0, r0 │ │ - b.n cdb88 │ │ + b.n cdb98 │ │ movs r0, #0 │ │ - b.n ce832 │ │ + b.n ce842 │ │ movs r4, r0 │ │ - b.n cdb90 │ │ + b.n cdba0 │ │ adds r0, #0 │ │ - b.n ce83a │ │ + b.n ce84a │ │ movs r0, r1 │ │ - b.n cdb98 │ │ + b.n cdba8 │ │ movs r0, r1 │ │ - b.n ce3c2 │ │ - ldrb r1, [r0, r5] │ │ + b.n ce3d2 │ │ + ldrb r0, [r0, r5] │ │ @ instruction: 0xebff0000 │ │ - b.n ce72a │ │ + b.n ce73a │ │ mrc2 10, 3, r0, cr2, cr15, {7} @ │ │ mrc2 10, 4, lr, cr1, cr15, {7} @ │ │ - asrs r0, r6, #30 │ │ + asrs r0, r0, #31 │ │ movs r1, r0 │ │ asrs r4, r5, #7 │ │ - b.n cdbd8 │ │ + b.n cdbe8 │ │ str r0, [r1, r0] │ │ - b.n ce59e │ │ + b.n ce5ae │ │ adds r1, #232 @ 0xe8 │ │ - b.n cdbe0 │ │ + b.n cdbf0 │ │ movs r1, r0 │ │ - b.n ce7e6 │ │ + b.n ce7f6 │ │ asrs r1, r0, #32 │ │ - b.n ce1c8 │ │ + b.n ce1d8 │ │ movs r3, #105 @ 0x69 │ │ - b.n ce6ae │ │ + b.n ce6be │ │ adds r0, #3 │ │ - b.n ce1d0 │ │ + b.n ce1e0 │ │ vpmin.u q7, , │ │ lsls r4, r2, #4 │ │ - b.n cdbf8 │ │ + b.n cdc08 │ │ movs r0, r0 │ │ - b.n ce1dc │ │ + b.n ce1ec │ │ lsls r2, r3, #1 │ │ - b.n cdc62 │ │ + b.n cdc72 │ │ movs r0, r0 │ │ - b.n ce766 │ │ + b.n ce776 │ │ stc2l 10, cr0, [r6, #-1020]! @ 0xfffffc04 @ │ │ movs r0, r2 │ │ - b.n cdbfe │ │ + b.n cdc0e │ │ asrs r0, r0, #4 │ │ - b.n cdc10 │ │ + b.n cdc20 │ │ adds r1, #0 │ │ - b.n cdc14 │ │ + b.n cdc24 │ │ movs r0, r0 │ │ - b.n ce166 │ │ + b.n ce176 │ │ movs r0, #92 @ 0x5c │ │ - b.n cdc8e │ │ + b.n cdc9e │ │ asrs r1, r0, #32 │ │ - b.n ce200 │ │ + b.n ce210 │ │ adds r0, #3 │ │ - b.n ce204 │ │ + b.n ce214 │ │ lsls r0, r6, #8 │ │ - b.n ce42a │ │ + b.n ce43a │ │ movs r2, #217 @ 0xd9 │ │ - b.n ce6ee │ │ + b.n ce6fe │ │ movs r0, r0 │ │ - b.n cdc0c │ │ + b.n cdc1c │ │ ldc2l 10, cr14, [r9, #-1020] @ 0xfffffc04 @ │ │ movs r0, r0 │ │ - b.n ce79a │ │ + b.n ce7aa │ │ ldc2l 10, cr0, [r9, #-1020] @ 0xfffffc04 @ │ │ asrs r4, r5, #3 │ │ - b.n cdc40 │ │ + b.n cdc50 │ │ movs r3, #18 │ │ - b.n ce706 │ │ + b.n ce716 │ │ adds r0, #232 @ 0xe8 │ │ - b.n cdc48 │ │ + b.n cdc58 │ │ lsls r0, r5, #3 │ │ - b.n cdc4c │ │ + b.n cdc5c │ │ asrs r1, r0, #32 │ │ - b.n ce230 │ │ + b.n ce240 │ │ str r4, [r4, r3] │ │ - b.n cdc54 │ │ + b.n cdc64 │ │ adds r0, #3 │ │ - b.n ce238 │ │ + b.n ce248 │ │ movs r0, r0 │ │ - b.n ce23c │ │ + b.n ce24c │ │ str r5, [r0, r0] │ │ - b.n ce240 │ │ + b.n ce250 │ │ movs r1, r4 │ │ stmia.w sp, {r2, r3, r6, r8, sl, fp, ip, sp, lr, pc} │ │ - @ instruction: 0xeaff16d8 │ │ - movs r1, r0 │ │ - lsrs r7, r2, #17 │ │ - vclz.i16 d17, d30 │ │ - @ instruction: 0xfff4dcb1 │ │ - vtbl.8 d27, {d19-d21}, d12 │ │ - @ instruction: 0xfff31b56 │ │ - vpadal.s16 d17, d16 │ │ - movs r1, r0 │ │ - asrs r0, r0, #24 │ │ - movs r1, r0 │ │ - cbnz r0, ce188 │ │ - vtbx.8 d30, {d19}, d18 │ │ - vqshlu.s32 d16, d5, #19 │ │ - vcvt.u16.f16 q8, q2, #12 │ │ - movs r1, r0 │ │ - cbz r4, ce16c │ │ - vmla.i , , d17[0] │ │ - vcvt.u32.f32 d28, d30, #13 │ │ - vtbl.8 d16, {d19-d21}, d20 │ │ - movs r1, r0 │ │ - add r6, sp, #576 @ 0x240 │ │ - vrshr.u32 q15, q3, #13 │ │ - vqshl.u32 d30, d8, #19 │ │ - @ instruction: 0xfff308f8 │ │ - movs r1, r0 │ │ - add r4, sp, #912 @ 0x390 │ │ - vaddl.u q15, d19, d26 │ │ - vqrdmlah.s q14, , d7[0] │ │ - vcvt.f32.u32 q13, q11, #13 │ │ - vqrdmlah.s q13, , d24[0] │ │ - @ instruction: 0xfff30cd0 │ │ - movs r1, r0 │ │ - add r4, sp, #400 @ 0x190 │ │ - vmla.i , , d4[0] │ │ - vmull.u q8, d20, d20 │ │ + @ instruction: 0xeaff16e8 │ │ movs r1, r0 │ │ - sub sp, #96 @ 0x60 │ │ - vabal.u q14, d19, d3 │ │ - vqrshrn.u64 d16, q10, #13 │ │ - movs r1, r0 │ │ - add r5, sp, #320 @ 0x140 │ │ - vsli.64 q15, , #51 @ 0x33 │ │ - vmull.u q13, d19, d16 │ │ - @ instruction: 0xfff3b7c6 │ │ - vqshl.u64 d26, d5, #51 @ 0x33 │ │ - @ instruction: 0xfff309f0 │ │ + lsrs r3, r7, #20 │ │ + vqshlu.s32 , q12, #20 │ │ + vtbx.8 d29, {d20-d23}, d16 │ │ + vtbx.8 d27, {d19-d20}, d7 │ │ + @ instruction: 0xfff31cd8 │ │ + vqshlu.s32 d17, d16, #20 │ │ movs r1, r0 │ │ - lsrs r2, r0, #9 │ │ - @ instruction: 0xfff4add8 │ │ - vrshr.u64 q14, q14, #13 │ │ - vrshr.u64 d27, d16, #13 │ │ - vqshl.u64 d16, d0, #51 @ 0x33 │ │ - movs r1, r0 │ │ - add r3, sp, #496 @ 0x1f0 │ │ - vdup.8 , d23[1] │ │ - vpadal.s16 d27, d4 │ │ - vraddhn.i d29, , q13 │ │ - @ instruction: 0xfff3b74c │ │ - vrshr.u32 q14, q9, #13 │ │ - vtbx.8 d16, {d19}, d1 │ │ - vtbx.8 d26, {d4-d7}, d12 │ │ - vsra.u64 d18, d13, #13 │ │ - vqshlu.s32 , q12, #20 │ │ - vcvt.f32.u32 d30, d14, #13 │ │ - vabal.u , d3, d12 │ │ + asrs r0, r2, #24 │ │ movs r1, r0 │ │ - @ instruction: 0xb8fc │ │ - vqrdmlsh.s , , d28[0] │ │ - vmlsl.u , d19, d0[0] │ │ - vtbl.8 d30, {d19-d21}, d14 │ │ - vsra.u64 , , #13 │ │ - vcvt.u32.f32 q15, , #13 │ │ - vqshlu.s32 , q6, #19 │ │ - vtbl.8 d30, {d3-d5}, d26 │ │ - @ instruction: 0xfff3c5ee │ │ - vcvt.u32.f32 d30, d11, #13 │ │ - vtbx.8 d16, {d3-d5}, d0 │ │ + cbnz r3, ce166 │ │ + vqshrn.u64 d30, , #13 │ │ + vmlsl.u q8, d19, d18[0] │ │ + vqrdmulh.s q8, q2, d20[0] │ │ + movs r1, r0 │ │ + add sp, #508 @ 0x1fc │ │ + vshr.u32 d27, d12, #13 │ │ + @ instruction: 0xfff3cea6 │ │ + @ instruction: 0xfff30ab4 │ │ + movs r1, r0 │ │ + add r5, sp, #812 @ 0x32c │ │ + vrshr.u32 d30, d8, #13 │ │ + vabdl.u q15, d3, d19 │ │ + vtbl.8 d16, {d3-d4}, d8 │ │ movs r1, r0 │ │ - add r6, sp, #208 @ 0xd0 │ │ - @ instruction: 0xfff3ccf9 │ │ - vqrshrn.u64 d27, q6, #13 │ │ - vaddw.u , , d2 │ │ - vqshlu.s64 q15, , #51 @ 0x33 │ │ - vsubw.u , , d24 │ │ - movs r1, r0 │ │ - @ instruction: 0xb71c │ │ - vqrdmlsh.s , , d14[0] │ │ - vrshr.u32 d27, d19, #13 │ │ - vqrdmlsh.s q15, , d11[0] │ │ - vcvt.f32.u32 , , #13 │ │ - vcvt.u16.f16 d26, d8, #13 │ │ - vdup.8 d16, d12[1] │ │ - movs r1, r0 │ │ - cbnz r0, ce276 │ │ - vmla.i q15, , d31[0] │ │ - @ instruction: 0xfff3b568 │ │ - vsra.u32 q8, q6, #13 │ │ - vqabs.s16 d28, d26 │ │ - vsra.u32 d27, d6, #13 │ │ - vraddhn.i d27, , q12 │ │ - vsri.64 d17, d8, #13 │ │ - vcls.s16 , q2 │ │ - movs r1, r0 │ │ - add r3, sp, #720 @ 0x2d0 │ │ - @ instruction: 0xfff3fab6 │ │ - vrshr.u64 d27, d8, #13 │ │ - vsubl.u , d19, d27 │ │ - vrsra.u64 , q14, #13 │ │ + add r4, sp, #124 @ 0x7c │ │ + vmla.i q15, , d28[0] │ │ + @ instruction: 0xfff3cdf6 │ │ + @ instruction: 0xfff3adb1 │ │ + @ instruction: 0xfff3ada3 │ │ + vqdmulh.s q8, , d16[0] │ │ + movs r1, r0 │ │ + add r3, sp, #636 @ 0x27c │ │ + @ instruction: 0xfff311c3 │ │ + @ instruction: 0xfff40cb4 │ │ + movs r1, r0 │ │ + add r7, sp, #844 @ 0x34c │ │ + vqshlu.s32 q14, q4, #19 │ │ + vtbl.8 d16, {d19-d20}, d4 │ │ + movs r1, r0 │ │ + add r4, sp, #556 @ 0x22c │ │ + vrsubhn.i d30, , q2 │ │ + @ instruction: 0xfff3abdb │ │ + @ instruction: 0xfff3b899 │ │ + vqshl.u64 q13, , #51 @ 0x33 │ │ + vtbl.8 d16, {d3-d5}, d0 │ │ movs r1, r0 │ │ - asrs r4, r7, #14 │ │ + lsrs r1, r2, #16 │ │ + vcvt.u16.f16 d26, d3, #12 │ │ + vrsra.u64 q14, , #13 │ │ + @ instruction: 0xfff3b1ca │ │ + vabdl.u q8, d19, d16 │ │ + movs r1, r0 │ │ + add r2, sp, #732 @ 0x2dc │ │ + vmull.u , d19, d23 │ │ + vsli.32 d27, d31, #20 │ │ + vsri.32 d29, d2, #13 │ │ + vrsubhn.i d27, , │ │ + @ instruction: 0xfff3c345 │ │ + vtbl.8 d16, {d19-d20}, d21 │ │ + vtbl.8 d26, {d20-d22}, d7 │ │ + vaddw.u q9, , d13 │ │ + vqabs.s16 , │ │ + @ instruction: 0xfff3ee91 │ │ + vsli.32 d17, d12, #19 │ │ + movs r1, r0 │ │ + @ instruction: 0xb837 │ │ + vshr.u64 d16, d12, #13 │ │ + vsli.64 , , #52 @ 0x34 │ │ + @ instruction: 0xfff3ea50 │ │ + vrshr.u32 d27, d13, #13 │ │ + @ instruction: 0xfff3ef8a │ │ + vsli.64 d27, d7, #51 @ 0x33 │ │ + vtbx.8 d30, {d19-d20}, d28 │ │ + vmlsl.u q14, d3, d27[0] │ │ + @ instruction: 0xfff3ef26 │ │ + @ instruction: 0xfff30a50 │ │ + movs r1, r0 │ │ + add r5, sp, #444 @ 0x1bc │ │ + vdup.8 q14, d17[1] │ │ + vtbl.8 d27, {d3-d5}, d31 │ │ + vsra.u32 , , #13 │ │ + vabdl.u q15, d3, d10 │ │ + vrsra.u32 d17, d24, #13 │ │ + movs r1, r0 │ │ + @ instruction: 0xb657 │ │ + @ instruction: 0xfff3bfff │ │ + vrshr.u32 , , #13 │ │ + @ instruction: 0xfff3efd6 │ │ + vcvt.u32.f32 d27, d8, #13 │ │ + vcvt.f16.u16 q13, , #13 │ │ + vcvt.f16.u16 d16, d12, #13 │ │ + movs r1, r0 │ │ + @ instruction: 0xb873 │ │ + @ instruction: 0xfff3dfae │ │ + vraddhn.i d27, , │ │ + vsubl.u q8, d3, d25 │ │ + vqneg.s16 q14, │ │ + vsra.u32 , q4, #13 │ │ + @ instruction: 0xfff3b363 │ │ + vqshlu.s32 d17, d10, #19 │ │ + vsri.32 , q2, #12 │ │ + movs r1, r0 │ │ + add r2, sp, #956 @ 0x3bc │ │ + @ instruction: 0xfff3fb9a │ │ + vsra.u64 , , #13 │ │ + @ instruction: 0xfff3b1e6 │ │ + vraddhn.i d17, , q6 │ │ + movs r1, r0 │ │ + asrs r4, r1, #15 │ │ + movs r1, r0 │ │ + add r6, sp, #396 @ 0x18c │ │ + vcvt.u16.f16 d30, d15, #13 │ │ + vsri.32 , , #13 │ │ + vsra.u32 q14, q6, #13 │ │ + vsubw.u , , d6 │ │ + vsra.u32 d17, d0, #13 │ │ movs r1, r0 │ │ - add r7, sp, #160 @ 0xa0 │ │ - @ instruction: 0xfff3ed0a │ │ - vsli.32 d27, d24, #19 │ │ - vaddl.u q14, d19, d9 │ │ - vrsra.u32 , , #13 │ │ - vaddw.u , , d0 │ │ - movs r1, r0 │ │ - @ instruction: 0xb894 │ │ - @ instruction: 0xfff3c3e5 │ │ - vtbl.8 d31, {d3-d6}, d13 │ │ - vabdl.u q9, d3, d31 │ │ - vsra.u32 d27, d8, #12 │ │ - @ instruction: 0xfff3b147 │ │ - vaddw.u , , d0 │ │ - vdup.8 d29, d12[1] │ │ - vcvt.u16.f16 d26, d16, #13 │ │ - vtbx.8 d17, {d3}, d8 │ │ - vdup.32 d26, d4[0] │ │ + @ instruction: 0xb7cf │ │ + vsri.64 d28, d24, #13 │ │ + vtbl.8 d31, {d19-d22}, d0 │ │ + vqshl.u32 d18, d15, #19 │ │ + vshr.u32 , , #12 │ │ + vaddl.u , d19, d2 │ │ + vshr.u32 d27, d27, #13 │ │ + vdup.8 , d1[1] │ │ + vdup.8 q13, d27[1] │ │ + vtbx.8 d17, {d19}, d14 │ │ + @ instruction: 0xfff4ab3f │ │ vqshrun.s64 d20, q8, #13 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n ce808 │ │ + b.n ce818 │ │ movs r0, #0 │ │ - b.n ce632 │ │ + b.n ce642 │ │ movs r0, r2 │ │ - b.n cde16 │ │ + b.n cde26 │ │ adds r0, #1 │ │ - b.n cea3a │ │ + b.n cea4a │ │ stmia r0!, {r2, r3, r4} │ │ - b.n cde1e │ │ - bl 529dfe │ │ - b.n ce344 │ │ - b.n cde26 │ │ - bl 529e06 │ │ + b.n cde2e │ │ + bl 529e0e │ │ + b.n ce354 │ │ + b.n cde36 │ │ + bl 529e16 │ │ asrs r4, r7, #2 │ │ - b.n cde2e │ │ + b.n cde3e │ │ asrs r0, r0, #3 │ │ - b.n cde32 │ │ + b.n cde42 │ │ asrs r4, r0, #3 │ │ - b.n cde36 │ │ - bl 529e16 │ │ + b.n cde46 │ │ + bl 529e26 │ │ lsls r0, r1, #3 │ │ - b.n cde3e │ │ - bl 529e1e │ │ + b.n cde4e │ │ + bl 529e2e │ │ asrs r1, r0, #32 │ │ - b.n ce37e │ │ + b.n ce38e │ │ movs r0, r0 │ │ - b.n ce386 │ │ + b.n ce396 │ │ movs r0, r0 │ │ - b.n ce650 │ │ + b.n ce660 │ │ asrs r0, r2, #32 │ │ - b.n cde56 │ │ + b.n cde66 │ │ lsls r4, r3, #1 │ │ - b.n cdeda │ │ + b.n cdeea │ │ stmia r0!, {} │ │ asrs r0, r4, #14 │ │ - b.n ce33c │ │ + b.n ce34c │ │ asrs r0, r4, #14 │ │ adds r0, #19 │ │ - b.n ce444 │ │ + b.n ce454 │ │ movs r4, r3 │ │ - b.n cde6c │ │ - bl 529e46 │ │ + b.n cde7c │ │ + bl 529e56 │ │ asrs r0, r4, #32 │ │ - b.n cde74 │ │ - bl 529e4e │ │ + b.n cde84 │ │ + bl 529e5e │ │ lsls r4, r7 │ │ - b.n cde7c │ │ + b.n cde8c │ │ lsrs r0, r0 │ │ - b.n cde80 │ │ + b.n cde90 │ │ lsrs r4, r0 │ │ - b.n cde84 │ │ - bl 529e5e │ │ + b.n cde94 │ │ + bl 529e6e │ │ adds r0, #200 @ 0xc8 │ │ - b.n cde8c │ │ - bl 529e66 │ │ + b.n cde9c │ │ + bl 529e76 │ │ ands r4, r0 │ │ - b.n ce3ae │ │ + b.n ce3be │ │ adds r0, #3 │ │ - b.n ce3b4 │ │ + b.n ce3c4 │ │ adds r0, #3 │ │ - b.n ce69e │ │ + b.n ce6ae │ │ ands r2, r0 │ │ - b.n ceaba │ │ + b.n ceaca │ │ adds r0, #92 @ 0x5c │ │ - b.n cdf22 │ │ + b.n cdf32 │ │ movs r0, r0 │ │ asrs r0, r4, #14 │ │ movs r0, #16 │ │ - b.n cdeaa │ │ + b.n cdeba │ │ asrs r0, r0, #32 │ │ asrs r0, r4, #14 │ │ orrs r4, r2 │ │ - b.n ce492 │ │ + b.n ce4a2 │ │ movs r0, #28 │ │ - b.n cdeba │ │ - bl 529e92 │ │ + b.n cdeca │ │ + bl 529ea2 │ │ adds r0, #32 │ │ - b.n cdec2 │ │ - bl 529e9a │ │ + b.n cded2 │ │ + bl 529eaa │ │ str r4, [r7, r2] │ │ - b.n cdeca │ │ + b.n cdeda │ │ str r0, [r0, r3] │ │ - b.n cdece │ │ + b.n cdede │ │ str r4, [r0, r3] │ │ - b.n cded2 │ │ - bl 529eaa │ │ + b.n cdee2 │ │ + bl 529eba │ │ lsrs r0, r1 │ │ - b.n cdeda │ │ - bl 529eb2 │ │ + b.n cdeea │ │ + bl 529ec2 │ │ str r5, [r0, r0] │ │ - b.n ce3fe │ │ + b.n ce40e │ │ ands r4, r0 │ │ - b.n ce404 │ │ + b.n ce414 │ │ ands r4, r0 │ │ - b.n ce6ec │ │ + b.n ce6fc │ │ movs r0, #0 │ │ asrs r0, r4, #14 │ │ adds r0, #0 │ │ asrs r0, r4, #14 │ │ str r4, [r1, r0] │ │ - b.n ce46e │ │ + b.n ce47e │ │ ands r0, r0 │ │ - b.n ceb12 │ │ + b.n ceb22 │ │ str r6, [r1, r0] │ │ - b.n ce578 │ │ + b.n ce588 │ │ str r0, [r0, r0] │ │ - b.n ceb1a │ │ + b.n ceb2a │ │ str r1, [r0, r0] │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n cea8c │ │ + b.n cea9c │ │ asrs r6, r1, #32 │ │ asrs r0, r4, #6 │ │ movs r4, r1 │ │ asrs r0, r4, #6 │ │ str r0, [r0, r0] │ │ - b.n ce492 │ │ + b.n ce4a2 │ │ str r1, [r0, r0] │ │ - b.n ce598 │ │ + b.n ce5a8 │ │ ands r1, r0 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n ceaa2 │ │ + b.n ceab2 │ │ movs r2, r0 │ │ lsls r0, r4, #6 │ │ asrs r3, r0, #32 │ │ lsls r0, r4, #6 │ │ ldrh r0, [r6, #0] │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n ce928 │ │ - beq.n ce458 │ │ - b.n ce8ac │ │ + b.n ce938 │ │ + beq.n ce468 │ │ + b.n ce8bc │ │ strb r0, [r0, #0] │ │ - b.n ce756 │ │ + b.n ce766 │ │ cmp r1, #181 @ 0xb5 │ │ add.w r0, r0, r0, lsl #24 │ │ - b.n ce75e │ │ + b.n ce76e │ │ lsls r0, r5, #1 │ │ - b.n cdf50 │ │ + b.n cdf60 │ │ movs r0, r0 │ │ - b.n ce6d2 │ │ + b.n ce6e2 │ │ lsls r3, r4, #3 │ │ subs r0, r0, r0 │ │ movs r6, r0 │ │ - b.n cdfdc │ │ + b.n cdfec │ │ lsls r0, r0, #1 │ │ - b.n cea52 │ │ + b.n cea62 │ │ lsls r3, r1, #3 │ │ subs r0, r0, r0 │ │ lsls r0, r2, #14 │ │ - b.n cdf78 │ │ - add r0, pc, #80 @ (adr r0, ce48c ) │ │ - b.n cdf6c │ │ + b.n cdf88 │ │ + add r0, pc, #80 @ (adr r0, ce49c ) │ │ + b.n cdf7c │ │ movs r0, r0 │ │ - b.n ce560 │ │ + b.n ce570 │ │ strb r4, [r1, #0] │ │ - b.n cdf60 │ │ + b.n cdf70 │ │ ands r0, r4 │ │ - b.n cdf6a │ │ + b.n cdf7a │ │ movs r4, r4 │ │ - b.n ce8d6 │ │ + b.n ce8e6 │ │ movs r2, r0 │ │ - b.n ceaf2 │ │ + b.n ceb02 │ │ movs r7, r3 │ │ ldrh r0, [r0, #16] │ │ strh r4, [r2, #0] │ │ - b.n ce974 │ │ + b.n ce984 │ │ strb r0, [r0, #0] │ │ - b.n ceb9e │ │ + b.n cebae │ │ str r0, [sp, #8] │ │ - b.n ceba2 │ │ + b.n cebb2 │ │ movs r2, r1 │ │ - b.n ce7a6 │ │ + b.n ce7b6 │ │ asrs r4, r0, #32 │ │ - b.n ce7aa │ │ + b.n ce7ba │ │ movs r0, #8 │ │ - b.n ce7ae │ │ + b.n ce7be │ │ strb r0, [r4, #0] │ │ - b.n cdf8c │ │ + b.n cdf9c │ │ str r4, [r3, #0] │ │ - b.n cdf90 │ │ + b.n cdfa0 │ │ strb r0, [r3, #0] │ │ - b.n cdf94 │ │ + b.n cdfa4 │ │ str r0, [sp, #80] @ 0x50 │ │ - b.n cdf98 │ │ + b.n cdfa8 │ │ cmp r1, #159 @ 0x9f │ │ add.w r0, r0, r1 │ │ - b.n ceb66 │ │ + b.n ceb76 │ │ movs r3, r7 │ │ subs r0, r0, r0 │ │ cmp r0, #240 @ 0xf0 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n cdfb2 │ │ + b.n cdfc2 │ │ movs r5, r4 │ │ - b.n ceb40 │ │ + b.n ceb50 │ │ movs r3, r0 │ │ ldmia r2!, {} │ │ movs r1, r0 │ │ - b.n ceb88 │ │ + b.n ceb98 │ │ movs r6, r2 │ │ asrs r5, r2, #13 │ │ movs r5, r1 │ │ lsrs r0, r0, #8 │ │ movs r2, r0 │ │ and.w r0, r0, pc, lsr #1 │ │ - b.n ceb58 │ │ + b.n ceb68 │ │ movs r6, r4 │ │ asrs r5, r2, #13 │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n ceb64 │ │ + b.n ceb74 │ │ movs r1, r5 │ │ subs r0, r0, r0 │ │ lsls r4, r1, #12 │ │ - b.n ce000 │ │ + b.n ce010 │ │ movs r0, r0 │ │ - b.n ce5e4 │ │ + b.n ce5f4 │ │ movs r4, r4 │ │ - b.n cdfea │ │ + b.n cdffa │ │ movs r0, r0 │ │ - b.n ce776 │ │ + b.n ce786 │ │ @ instruction: 0xffe31aff │ │ movs r3, r4 │ │ and.w r0, r0, r4, lsl #28 │ │ - b.n ce81a │ │ + b.n ce82a │ │ movs r3, r1 │ │ and.w r2, r0, r0, ror #11 │ │ - b.n ce020 │ │ + b.n ce030 │ │ strb r5, [r0, #0] │ │ - b.n cec26 │ │ + b.n cec36 │ │ movs r6, r4 │ │ - b.n ceb92 │ │ + b.n ceba2 │ │ movs r7, r0 │ │ - b.n cec2e │ │ + b.n cec3e │ │ movs r0, #2 │ │ - b.n ce610 │ │ + b.n ce620 │ │ asrs r6, r0, #32 │ │ - b.n cec36 │ │ + b.n cec46 │ │ strb r0, [r5, #0] │ │ - b.n cdffe │ │ + b.n ce00e │ │ strb r7, [r0, #0] │ │ lsls r0, r0, #12 │ │ movs r5, r4 │ │ - b.n cebaa │ │ + b.n cebba │ │ asrs r0, r4, #32 │ │ - b.n ce00a │ │ + b.n ce01a │ │ strb r6, [r0, #0] │ │ lsls r0, r0, #12 │ │ movs r4, r4 │ │ - b.n ce012 │ │ + b.n ce022 │ │ strh r4, [r2, #0] │ │ - b.n cea2c │ │ + b.n cea3c │ │ ands r0, r0 │ │ - b.n cec56 │ │ + b.n cec66 │ │ str r0, [sp, #8] │ │ - b.n cec5a │ │ + b.n cec6a │ │ movs r2, r1 │ │ - b.n ce85e │ │ + b.n ce86e │ │ asrs r7, r0, #32 │ │ - b.n ce862 │ │ + b.n ce872 │ │ movs r0, #8 │ │ - b.n ce866 │ │ + b.n ce876 │ │ ands r0, r4 │ │ - b.n ce044 │ │ + b.n ce054 │ │ str r4, [r3, #0] │ │ - b.n ce048 │ │ + b.n ce058 │ │ ands r0, r3 │ │ - b.n ce04c │ │ + b.n ce05c │ │ str r0, [sp, #80] @ 0x50 │ │ - b.n ce050 │ │ + b.n ce060 │ │ cmp r1, #113 @ 0x71 │ │ add.w r0, r0, r1 │ │ - b.n cec1e │ │ + b.n cec2e │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ cmp r0, #194 @ 0xc2 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n ce06a │ │ + b.n ce07a │ │ movs r4, r0 │ │ - b.n cebf8 │ │ + b.n cec08 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ lsls r4, r0, #10 │ │ - b.n ce094 │ │ + b.n ce0a4 │ │ movs r0, r0 │ │ - b.n ce678 │ │ + b.n ce688 │ │ movs r4, r4 │ │ - b.n ce07e │ │ + b.n ce08e │ │ movs r0, r0 │ │ - b.n ce810 │ │ + b.n ce820 │ │ @ instruction: 0xffec1aff │ │ movs r4, r1 │ │ - b.n ce0a4 │ │ + b.n ce0b4 │ │ movs r0, r0 │ │ - b.n cec18 │ │ + b.n cec28 │ │ lsls r3, r6, #1 │ │ subs r0, r0, r0 │ │ movs r6, r1 │ │ and.w r0, r0, r7, lsl #16 │ │ - b.n ce8ba │ │ + b.n ce8ca │ │ lsls r4, r6, #6 │ │ - b.n ce938 │ │ + b.n ce948 │ │ asrs r4, r2, #9 │ │ - b.n ce0c0 │ │ + b.n ce0d0 │ │ movs r2, r0 │ │ - b.n cea26 │ │ + b.n cea36 │ │ asrs r1, r0, #32 │ │ - b.n ce6a8 │ │ + b.n ce6b8 │ │ movs r1, r0 │ │ asrs r0, r0, #12 │ │ asrs r0, r5, #32 │ │ - b.n ce0b4 │ │ + b.n ce0c4 │ │ asrs r1, r0, #32 │ │ - b.n ce61e │ │ + b.n ce62e │ │ subs r1, r2, #4 │ │ - b.n ce878 │ │ + b.n ce888 │ │ asrs r1, r4, #10 │ │ - b.n ce8de │ │ + b.n ce8ee │ │ movs r0, r0 │ │ - b.n ce5a4 │ │ + b.n ce5b4 │ │ str r0, [r0, r0] │ │ - b.n cea66 │ │ + b.n cea76 │ │ movs r4, r1 │ │ - b.n ce0e4 │ │ + b.n ce0f4 │ │ movs r0, r0 │ │ - b.n cec58 │ │ + b.n cec68 │ │ lsls r3, r4, #1 │ │ subs r0, r0, r0 │ │ asrs r4, r2, #32 │ │ - b.n ce0d6 │ │ + b.n ce0e6 │ │ asrs r0, r2, #32 │ │ - b.n ce0d4 │ │ + b.n ce0e4 │ │ subs r7, r7, #7 │ │ - b.n cebdc │ │ + b.n cebec │ │ lsls r0, r5, #1 │ │ - b.n ce0e2 │ │ + b.n ce0f2 │ │ subs r7, r5, #7 │ │ - b.n cec54 │ │ + b.n cec64 │ │ strb r0, [r0, #0] │ │ - b.n ce64c │ │ + b.n ce65c │ │ asrs r0, r2, #8 │ │ - b.n ce10c │ │ + b.n ce11c │ │ strh r1, [r0, #0] │ │ - b.n cead2 │ │ + b.n ceae2 │ │ asrs r1, r0, #32 │ │ - b.n ce6f4 │ │ + b.n ce704 │ │ str r0, [r4, #0] │ │ - b.n ce0fc │ │ + b.n ce10c │ │ movs r4, r4 │ │ - b.n cea6a │ │ + b.n cea7a │ │ movs r2, r0 │ │ - b.n cec82 │ │ + b.n cec92 │ │ movs r7, r3 │ │ ldrh r0, [r0, #16] │ │ ands r4, r2 │ │ - b.n ceb04 │ │ + b.n ceb14 │ │ str r0, [sp, #0] │ │ - b.n ced2e │ │ - add r0, pc, #8 @ (adr r0, ce5f8 ) │ │ - b.n ced32 │ │ + b.n ced3e │ │ + add r0, pc, #8 @ (adr r0, ce608 ) │ │ + b.n ced42 │ │ movs r0, r2 │ │ - b.n ce130 │ │ + b.n ce140 │ │ asrs r6, r0, #32 │ │ - b.n ce93a │ │ + b.n ce94a │ │ movs r0, #4 │ │ - b.n ce93e │ │ + b.n ce94e │ │ str r0, [sp, #128] @ 0x80 │ │ - b.n ce11c │ │ + b.n ce12c │ │ strb r4, [r3, #0] │ │ - b.n ce120 │ │ + b.n ce130 │ │ strh r0, [r3, #0] │ │ - b.n ce124 │ │ - add r0, pc, #80 @ (adr r0, ce65c ) │ │ - b.n ce128 │ │ + b.n ce134 │ │ + add r0, pc, #80 @ (adr r0, ce66c ) │ │ + b.n ce138 │ │ cmp r1, #59 @ 0x3b │ │ add.w r0, r0, r1 │ │ - b.n cecf6 │ │ + b.n ced06 │ │ movs r3, r7 │ │ subs r0, r0, r0 │ │ cmp r0, #140 @ 0x8c │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n ce142 │ │ + b.n ce152 │ │ movs r5, r4 │ │ - b.n cecd0 │ │ + b.n cece0 │ │ movs r3, r0 │ │ ldmia r2!, {} │ │ movs r1, r0 │ │ - b.n ced18 │ │ + b.n ced28 │ │ movs r6, r2 │ │ asrs r5, r2, #13 │ │ movs r5, r1 │ │ lsrs r0, r0, #8 │ │ movs r2, r0 │ │ and.w r0, r0, pc, lsr #1 │ │ - b.n cece8 │ │ + b.n cecf8 │ │ movs r6, r4 │ │ asrs r5, r2, #13 │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n cecf4 │ │ + b.n ced04 │ │ movs r1, r5 │ │ subs r0, r0, r0 │ │ lsls r0, r2, #6 │ │ - b.n ce190 │ │ + b.n ce1a0 │ │ movs r0, r0 │ │ - b.n ce774 │ │ + b.n ce784 │ │ movs r4, r4 │ │ - b.n ce17a │ │ + b.n ce18a │ │ movs r0, r0 │ │ - b.n ce90a │ │ + b.n ce91a │ │ @ instruction: 0xffe31aff │ │ movs r3, r4 │ │ and.w r0, r0, r6, lsl #16 │ │ - b.n ce9aa │ │ + b.n ce9ba │ │ movs r3, r1 │ │ and.w r1, r0, r4, ror #9 │ │ - b.n ce1b0 │ │ + b.n ce1c0 │ │ ands r5, r0 │ │ - b.n cedb6 │ │ + b.n cedc6 │ │ movs r6, r4 │ │ - b.n ced26 │ │ + b.n ced36 │ │ movs r7, r0 │ │ - b.n cedbe │ │ + b.n cedce │ │ movs r0, #2 │ │ - b.n ce7a0 │ │ + b.n ce7b0 │ │ asrs r6, r0, #32 │ │ - b.n cedc6 │ │ + b.n cedd6 │ │ ands r0, r5 │ │ - b.n ce18e │ │ + b.n ce19e │ │ ands r7, r0 │ │ lsls r0, r0, #12 │ │ movs r5, r4 │ │ - b.n ced3e │ │ + b.n ced4e │ │ asrs r0, r4, #32 │ │ - b.n ce19a │ │ + b.n ce1aa │ │ ands r6, r0 │ │ lsls r0, r0, #12 │ │ movs r4, r4 │ │ - b.n ce1a2 │ │ + b.n ce1b2 │ │ str r4, [r2, #0] │ │ - b.n cebbc │ │ + b.n cebcc │ │ str r0, [sp, #0] │ │ - b.n cede6 │ │ - add r0, pc, #8 @ (adr r0, ce6b0 ) │ │ - b.n cedea │ │ + b.n cedf6 │ │ + add r0, pc, #8 @ (adr r0, ce6c0 ) │ │ + b.n cedfa │ │ movs r0, r2 │ │ - b.n ce1e8 │ │ + b.n ce1f8 │ │ asrs r4, r0, #32 │ │ - b.n ce9f2 │ │ + b.n cea02 │ │ movs r0, #6 │ │ - b.n ce9f6 │ │ + b.n cea06 │ │ str r0, [sp, #128] @ 0x80 │ │ - b.n ce1d4 │ │ + b.n ce1e4 │ │ strb r4, [r3, #0] │ │ - b.n ce1d8 │ │ + b.n ce1e8 │ │ strh r0, [r3, #0] │ │ - b.n ce1dc │ │ - add r0, pc, #80 @ (adr r0, ce714 ) │ │ - b.n ce1e0 │ │ + b.n ce1ec │ │ + add r0, pc, #80 @ (adr r0, ce724 ) │ │ + b.n ce1f0 │ │ cmp r1, #13 │ │ add.w r0, r0, r1 │ │ - b.n cedae │ │ + b.n cedbe │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ cmp r0, #94 @ 0x5e │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n ce1fa │ │ + b.n ce20a │ │ movs r4, r0 │ │ - b.n ced88 │ │ + b.n ced98 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #4 │ │ - b.n ce224 │ │ + b.n ce234 │ │ movs r0, r0 │ │ - b.n ce808 │ │ + b.n ce818 │ │ movs r4, r4 │ │ - b.n ce20e │ │ + b.n ce21e │ │ movs r0, r0 │ │ - b.n ce99a │ │ + b.n ce9aa │ │ @ instruction: 0xffec1aff │ │ strb r4, [r1, #0] │ │ - b.n ce234 │ │ + b.n ce244 │ │ movs r0, r0 │ │ - b.n ceda8 │ │ + b.n cedb8 │ │ movs r7, r1 │ │ subs r0, r0, r0 │ │ movs r7, r2 │ │ and.w r0, r0, r4, lsl #24 │ │ - b.n cea4a │ │ + b.n cea5a │ │ lsls r4, r6, #6 │ │ - b.n ceac8 │ │ + b.n cead8 │ │ asrs r0, r3, #3 │ │ - b.n ce250 │ │ + b.n ce260 │ │ movs r2, r0 │ │ - b.n cebb6 │ │ + b.n cebc6 │ │ asrs r1, r0, #32 │ │ - b.n ce838 │ │ + b.n ce848 │ │ movs r1, r0 │ │ asrs r0, r0, #12 │ │ asrs r0, r5, #32 │ │ - b.n ce244 │ │ + b.n ce254 │ │ asrs r1, r0, #32 │ │ - b.n ce7b2 │ │ + b.n ce7c2 │ │ subs r1, r2, #4 │ │ - b.n cea08 │ │ + b.n cea18 │ │ asrs r1, r4, #10 │ │ - b.n cea6e │ │ + b.n cea7e │ │ movs r0, r0 │ │ - b.n ce734 │ │ + b.n ce744 │ │ str r0, [r0, r0] │ │ - b.n cebf6 │ │ + b.n cec06 │ │ strb r4, [r1, #0] │ │ - b.n ce274 │ │ + b.n ce284 │ │ movs r0, r0 │ │ - b.n cede8 │ │ + b.n cedf8 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ lsls r4, r5, #2 │ │ - b.n ce284 │ │ + b.n ce294 │ │ movs r0, r0 │ │ - b.n ce868 │ │ + b.n ce878 │ │ lsls r2, r3, #1 │ │ - b.n ce2ee │ │ + b.n ce2fe │ │ movs r0, r0 │ │ - b.n cedf2 │ │ + b.n cee02 │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ ands r5, r0 │ │ - b.n cea9a │ │ + b.n ceaaa │ │ movs r4, r0 │ │ - b.n cea9e │ │ - beq.n ce798 │ │ - b.n cebf8 │ │ + b.n ceaae │ │ + beq.n ce7a8 │ │ + b.n cec08 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r4, r5} │ │ - b.n ce298 │ │ + b.n ce2a8 │ │ asrs r0, r0, #32 │ │ - b.n ceeae │ │ + b.n ceebe │ │ movs r0, #0 │ │ - b.n ceeb2 │ │ + b.n ceec2 │ │ adds r0, #1 │ │ - b.n ceeb6 │ │ + b.n ceec6 │ │ ands r0, r0 │ │ - b.n ceeba │ │ + b.n ceeca │ │ lsls r0, r3, #16 │ │ add.w r0, r0, r0 │ │ - b.n cee22 │ │ + b.n cee32 │ │ @ instruction: 0xfff40aff │ │ str r0, [r0, r0] │ │ - b.n ceaca │ │ + b.n ceada │ │ @ instruction: 0xffeceaff │ │ asrs r4, r4, #1 │ │ - b.n ce2d0 │ │ + b.n ce2e0 │ │ movs r1, r0 │ │ - b.n ceed6 │ │ + b.n ceee6 │ │ adds r0, #96 @ 0x60 │ │ - b.n ce2d8 │ │ + b.n ce2e8 │ │ movs r1, #158 @ 0x9e │ │ - b.n ced9e │ │ + b.n cedae │ │ eors r4, r3 │ │ - b.n ce2e0 │ │ + b.n ce2f0 │ │ asrs r1, r0, #32 │ │ - b.n ce8c4 │ │ + b.n ce8d4 │ │ adds r0, #3 │ │ - b.n ce8c8 │ │ + b.n ce8d8 │ │ ands r4, r0 │ │ - b.n ce8cc │ │ + b.n ce8dc │ │ lsrs r0, r6 │ │ - b.n ceb4c │ │ - adds r2, #156 @ 0x9c │ │ + b.n ceb5c │ │ + adds r2, #155 @ 0x9b │ │ @ instruction: 0xebffffe6 │ │ @ instruction: 0xeaff47b5 │ │ - b.n cedce │ │ - ldr r7, [pc, #1020] @ (cebbc ) │ │ - b.n cee60 │ │ - movs r4, r0 │ │ - b.n ceb06 │ │ - beq.n ce800 │ │ - b.n cec60 │ │ + b.n cedde │ │ + ldr r7, [pc, #1020] @ (cebcc ) │ │ + b.n cee70 │ │ + movs r4, r0 │ │ + b.n ceb16 │ │ + beq.n ce810 │ │ + b.n cec70 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r2, r3, sl} │ │ + ldmia.w sp!, {r2, r3, r4, sl} │ │ movs r1, r0 │ │ - lsls r0, r1, #14 │ │ + lsls r0, r3, #14 │ │ movs r1, r0 │ │ - lsls r4, r3, #13 │ │ + lsls r4, r5, #13 │ │ movs r1, r0 │ │ - lsls r4, r0, #11 │ │ + lsls r4, r2, #11 │ │ movs r1, r0 │ │ - lsls r4, r6, #11 │ │ + lsls r4, r0, #12 │ │ movs r1, r0 │ │ - lsls r0, r7, #9 │ │ + lsls r0, r1, #10 │ │ movs r1, r0 │ │ - lsls r0, r7, #7 │ │ + lsls r0, r1, #8 │ │ movs r1, r0 │ │ - lsls r4, r1, #7 │ │ + lsls r4, r3, #7 │ │ movs r1, r0 │ │ - lsls r4, r6, #4 │ │ + lsls r4, r0, #5 │ │ movs r1, r0 │ │ - lsls r4, r4, #5 │ │ + lsls r4, r6, #5 │ │ movs r1, r0 │ │ - lsls r4, r0, #4 │ │ + lsls r4, r2, #4 │ │ movs r1, r0 │ │ - ldmia r4, {r1, r2, r4, r7} │ │ - @ instruction: 0xfff3fe9c │ │ - vqshlu.s32 , , #19 │ │ + ldmia r3!, {r0, r2, r4, r6, r7} │ │ + vmla.i q8, , d22[0] │ │ + vqshl.u32 d31, d29, #20 │ │ vtbl.8 d20, {d3}, d0 │ │ stmdb sp!, {r0, r2, r3, ip, sp, pc} │ │ - b.n ceb4e │ │ - beq.n ce830 │ │ - b.n cecac │ │ + b.n ceb5e │ │ + beq.n ce840 │ │ + b.n cecbc │ │ cmp r0, #82 @ 0x52 │ │ add.w r8, r0, r1 │ │ - b.n ceeba │ │ + b.n ceeca │ │ movs r7, r0 │ │ add r2, sp, #0 │ │ lsls r4, r5, #1 │ │ - b.n ce360 │ │ + b.n ce370 │ │ movs r0, r0 │ │ - b.n ce944 │ │ + b.n ce954 │ │ movs r0, r3 │ │ - b.n ced2a │ │ + b.n ced3a │ │ cmp r0, #168 @ 0xa8 │ │ add.w r0, r0, r0 │ │ - b.n ceed2 │ │ - beq.n ce84a │ │ + b.n ceee2 │ │ + beq.n ce85a │ │ lsls r0, r4, #6 │ │ ldrh r0, [r0, #0] │ │ lsrs r5, r7, #2 │ │ movs r2, r1 │ │ and.w r0, r0, ip, ror #4 │ │ - b.n ce380 │ │ + b.n ce390 │ │ movs r0, #38 @ 0x26 │ │ - b.n cef86 │ │ + b.n cef96 │ │ adds r0, #56 @ 0x38 │ │ - b.n ce388 │ │ + b.n ce398 │ │ asrs r1, r0, #32 │ │ - b.n ce96c │ │ + b.n ce97c │ │ movs r0, #0 │ │ - b.n ce36c │ │ + b.n ce37c │ │ adds r0, #3 │ │ - b.n ce974 │ │ + b.n ce984 │ │ movs r4, r0 │ │ - b.n ce374 │ │ + b.n ce384 │ │ movs r0, r1 │ │ - b.n ce378 │ │ + b.n ce388 │ │ movs r0, r0 │ │ - b.n cefa2 │ │ + b.n cefb2 │ │ movs r2, #241 @ 0xf1 │ │ - b.n cee66 │ │ - adds r2, #111 @ 0x6f │ │ + b.n cee76 │ │ + adds r2, #110 @ 0x6e │ │ @ instruction: 0xebff0018 │ │ - b.n ce3ac │ │ + b.n ce3bc │ │ movs r0, #211 @ 0xd3 │ │ - b.n cefb2 │ │ + b.n cefc2 │ │ asrs r4, r2, #32 │ │ - b.n ce3b4 │ │ + b.n ce3c4 │ │ movs r0, r0 │ │ - b.n ce998 │ │ + b.n ce9a8 │ │ asrs r1, r0, #32 │ │ - b.n ce99c │ │ - adds r1, #93 @ 0x5d │ │ - @ instruction: 0xebfffcc7 │ │ - vaddl.u q14, d19, d15 │ │ - @ instruction: 0xfff3cad4 │ │ - @ instruction: 0xfff3af0e │ │ - vaddl.u q8, d3, d24 │ │ + b.n ce9ac │ │ + adds r1, #92 @ 0x5c │ │ + @ instruction: 0xebfffe91 │ │ + @ instruction: 0xfff3bff7 │ │ + vshll.u32 q14, d3, #19 │ │ + vqrdmlsh.s q13, , d17[0] │ │ + vshr.u32 d16, d24, #13 │ │ movs r1, r0 │ │ - ldr r7, [pc, #960] @ (cec58 ) │ │ + ldr r7, [pc, #960] @ (cec68 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n cedb8 │ │ - beq.n ce8d8 │ │ - b.n ced3c │ │ + b.n cedc8 │ │ + beq.n ce8e8 │ │ + b.n ced4c │ │ ands r0, r0 │ │ - b.n cebe6 │ │ + b.n cebf6 │ │ lsls r4, r0, #5 │ │ add.w r0, r0, r0 │ │ - b.n cef4e │ │ + b.n cef5e │ │ lsls r2, r7, #3 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n cebf6 │ │ + b.n cec06 │ │ lsls r3, r2, #6 │ │ add.w r0, r0, r0, lsl #24 │ │ - b.n cebfe │ │ + b.n cec0e │ │ movs r1, r0 │ │ - b.n ced42 │ │ + b.n ced52 │ │ movs r2, r0 │ │ - b.n cefa6 │ │ + b.n cefb6 │ │ movs r0, r1 │ │ subs r2, #0 │ │ movs r4, r6 │ │ - b.n ce3f6 │ │ + b.n ce406 │ │ movs r1, r0 │ │ - b.n cefb2 │ │ + b.n cefc2 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n cf09a │ │ + b.n cf0aa │ │ lsls r0, r4, #1 │ │ - b.n ce3e6 │ │ + b.n ce3f6 │ │ lsls r7, r7, #5 │ │ - b.n ceee2 │ │ + b.n ceef2 │ │ movs r0, r0 │ │ - b.n ce9ee │ │ + b.n ce9fe │ │ movs r7, r7 │ │ - b.n cf06a │ │ + b.n cf07a │ │ lsls r0, r1, #1 │ │ - b.n ce3f6 │ │ + b.n ce406 │ │ str r6, [r0, r0] │ │ - b.n cec32 │ │ + b.n cec42 │ │ movs r5, r0 │ │ - b.n cec36 │ │ - beq.n ce930 │ │ - b.n ced90 │ │ + b.n cec46 │ │ + beq.n ce940 │ │ + b.n ceda0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r5, ip, sp, lr} │ │ - b.n cee0a │ │ + b.n cee1a │ │ movs r0, r0 │ │ - b.n cf046 │ │ + b.n cf056 │ │ asrs r0, r3, #32 │ │ - b.n cee24 │ │ + b.n cee34 │ │ movs r0, r3 │ │ - b.n ce428 │ │ + b.n ce438 │ │ movs r7, r0 │ │ - b.n cec52 │ │ + b.n cec62 │ │ lsls r5, r4, #10 │ │ add.w r0, r0, r0 │ │ - b.n cefba │ │ + b.n cefca │ │ lsls r7, r3, #3 │ │ subs r0, r0, r0 │ │ - add r0, pc, #96 @ (adr r0, ce980 ) │ │ - b.n ce45c │ │ + add r0, pc, #96 @ (adr r0, ce990 ) │ │ + b.n ce46c │ │ str r7, [sp, #728] @ 0x2d8 │ │ - b.n cef36 │ │ + b.n cef46 │ │ ldr r7, [sp, #1020] @ 0x3fc │ │ - b.n cefc8 │ │ + b.n cefd8 │ │ movs r0, r0 │ │ - b.n cefe2 │ │ + b.n ceff2 │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ lsls r4, r5, #15 │ │ - b.n ce474 │ │ + b.n ce484 │ │ str r0, [r2, r0] │ │ - b.n cee4c │ │ + b.n cee5c │ │ movs r0, r0 │ │ - b.n cea5c │ │ + b.n cea6c │ │ lsls r1, r3, #1 │ │ - b.n ce4e2 │ │ + b.n ce4f2 │ │ movs r0, r2 │ │ - b.n cef66 │ │ + b.n cef76 │ │ @ instruction: 0xffe90aff │ │ movs r6, r0 │ │ - b.n ce502 │ │ + b.n ce512 │ │ lsls r0, r0, #1 │ │ - b.n cef72 │ │ + b.n cef82 │ │ @ instruction: 0xffe61aff │ │ movs r1, r0 │ │ - b.n cf046 │ │ + b.n cf056 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, #0] │ │ - b.n cf0a2 │ │ + b.n cf0b2 │ │ movs r4, r0 │ │ and.w r0, r0, r4 │ │ - b.n cecaa │ │ + b.n cecba │ │ mcr2 11, 5, lr, cr5, cr15, {7} @ │ │ movs r0, r0 │ │ - b.n cf012 │ │ + b.n cf022 │ │ str r0, [r0, #0] │ │ - b.n cf0b6 │ │ + b.n cf0c6 │ │ lsls r0, r1, #3 │ │ subs r0, r0, r0 │ │ asrs r0, r0, #32 │ │ - b.n cf0be │ │ + b.n cf0ce │ │ movs r4, r6 │ │ - b.n ce4aa │ │ + b.n ce4ba │ │ asrs r4, r2, #32 │ │ - b.n ce4a0 │ │ + b.n ce4b0 │ │ asrs r0, r2, #32 │ │ - b.n ce4a4 │ │ + b.n ce4b4 │ │ asrs r0, r2, #32 │ │ - b.n ceea8 │ │ + b.n ceeb8 │ │ ldmia r3, {r2, r3, r4, r5, r6, r7} │ │ @ instruction: 0xebff0000 │ │ - b.n cf036 │ │ + b.n cf046 │ │ lsls r0, r0, #3 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n cf08a │ │ + b.n cf09a │ │ movs r6, r2 │ │ lsrs r0, r0, #8 │ │ movs r6, r0 │ │ - b.n ce54e │ │ + b.n ce55e │ │ lsls r0, r0, #1 │ │ - b.n cefca │ │ + b.n cefda │ │ movs r7, r5 │ │ subs r0, r0, r0 │ │ strh r0, [r2, #0] │ │ - b.n ce4ec │ │ + b.n ce4fc │ │ asrs r2, r0, #4 │ │ - b.n cf176 │ │ + b.n cf186 │ │ movs r4, r2 │ │ - b.n ce4f4 │ │ + b.n ce504 │ │ asrs r0, r1, #32 │ │ - b.n cea60 │ │ + b.n cea70 │ │ asrs r0, r0, #32 │ │ - b.n cefa2 │ │ + b.n cefb2 │ │ lsls r1, r7, #1 │ │ cmp r2, #0 │ │ asrs r0, r6, #13 │ │ - b.n ce508 │ │ + b.n ce518 │ │ str r7, [r1, r0] │ │ - b.n ceee0 │ │ + b.n ceef0 │ │ asrs r1, r0, #32 │ │ - b.n ceaf0 │ │ + b.n ceb00 │ │ asrs r2, r3, #1 │ │ - b.n ce578 │ │ + b.n ce588 │ │ movs r0, r0 │ │ - b.n cf07c │ │ + b.n cf08c │ │ @ instruction: 0xffc40aff │ │ asrs r4, r3, #13 │ │ - b.n ce520 │ │ + b.n ce530 │ │ movs r0, #53 @ 0x35 │ │ - b.n cf126 │ │ + b.n cf136 │ │ adds r3, #88 @ 0x58 │ │ - b.n ce528 │ │ + b.n ce538 │ │ asrs r1, r0, #32 │ │ - b.n ceb0c │ │ + b.n ceb1c │ │ strh r0, [r0, #0] │ │ - b.n ce50c │ │ + b.n ce51c │ │ adds r0, #3 │ │ - b.n ceb14 │ │ + b.n ceb24 │ │ movs r4, r0 │ │ - b.n ce514 │ │ + b.n ce524 │ │ movs r0, r3 │ │ and.w r3, r0, r4, asr #32 │ │ - b.n ce540 │ │ + b.n ce550 │ │ movs r1, #255 @ 0xff │ │ - b.n cf006 │ │ + b.n cf016 │ │ asrs r0, r4, #1 │ │ - b.n ce532 │ │ + b.n ce542 │ │ movs r0, r0 │ │ - b.n ceb2c │ │ + b.n ceb3c │ │ lsls r0, r2, #1 │ │ - b.n ce532 │ │ + b.n ce542 │ │ asrs r1, r0, #10 │ │ - b.n ceb16 │ │ + b.n ceb26 │ │ movs r0, r0 │ │ - b.n ceeda │ │ + b.n ceeea │ │ asrs r2, r0, #32 │ │ - b.n ceb20 │ │ + b.n ceb30 │ │ strh r0, [r0, #0] │ │ - b.n cea24 │ │ + b.n cea34 │ │ adds r2, r0, #0 │ │ - b.n ceeb6 │ │ + b.n ceec6 │ │ lsls r7, r7, #1 │ │ - b.n cf0cc │ │ + b.n cf0dc │ │ lsls r1, r4, #10 │ │ - b.n ced6e │ │ + b.n ced7e │ │ movs r0, r2 │ │ ldrh r0, [r0, #16] │ │ asrs r4, r6, #11 │ │ - b.n ce574 │ │ + b.n ce584 │ │ str r7, [r1, r0] │ │ - b.n cef4c │ │ + b.n cef5c │ │ asrs r1, r0, #32 │ │ - b.n ceb5c │ │ + b.n ceb6c │ │ asrs r2, r3, #1 │ │ - b.n ce5e4 │ │ + b.n ce5f4 │ │ movs r0, r0 │ │ - b.n cf0e8 │ │ + b.n cf0f8 │ │ @ instruction: 0xffa90aff │ │ asrs r0, r4, #11 │ │ - b.n ce58c │ │ + b.n ce59c │ │ movs r0, #60 @ 0x3c │ │ - b.n cf192 │ │ + b.n cf1a2 │ │ adds r2, #220 @ 0xdc │ │ - b.n ce594 │ │ + b.n ce5a4 │ │ asrs r1, r0, #32 │ │ - b.n ceb78 │ │ + b.n ceb88 │ │ movs r0, r0 │ │ - b.n ce578 │ │ + b.n ce588 │ │ adds r0, #3 │ │ - b.n ceb80 │ │ + b.n ceb90 │ │ movs r1, r0 │ │ - b.n cf1a6 │ │ - adds r1, #239 @ 0xef │ │ + b.n cf1b6 │ │ + adds r1, #238 @ 0xee │ │ @ instruction: 0xebffffa0 │ │ @ instruction: 0xeaff5010 │ │ - b.n cef84 │ │ + b.n cef94 │ │ @ instruction: 0xff9eeaff │ │ lsls r1, r0, #24 │ │ - b.n cf11c │ │ + b.n cf12c │ │ movs r0, #4 │ │ - b.n ce5a6 │ │ + b.n ce5b6 │ │ lsrs r7, r7, #31 │ │ movs r3, #7 │ │ movs r0, r0 │ │ - b.n cf132 │ │ + b.n cf142 │ │ lsls r0, r4, #1 │ │ - b.n ce592 │ │ + b.n ce5a2 │ │ movs r3, r0 │ │ - b.n cf1ce │ │ + b.n cf1de │ │ movs r2, r0 │ │ lsls r0, r0, #12 │ │ adds r0, #112 @ 0x70 │ │ - b.n ce5be │ │ + b.n ce5ce │ │ movs r1, r1 │ │ stmia.w sp, {r0, r8, sl} │ │ - b.n ceea2 │ │ + b.n ceeb2 │ │ lsls r2, r0, #28 │ │ - b.n cf1a2 │ │ + b.n cf1b2 │ │ asrs r7, r0, #32 │ │ - b.n cede6 │ │ + b.n cedf6 │ │ movs r0, #8 │ │ - b.n cedea │ │ + b.n cedfa │ │ adds r0, #8 │ │ - b.n cedee │ │ + b.n cedfe │ │ lsls r7, r2, #10 │ │ add.w r0, r0, r0 │ │ - b.n cf156 │ │ + b.n cf166 │ │ lsls r0, r7, #1 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n ce5ec │ │ + b.n ce5fc │ │ asrs r0, r1, #32 │ │ - b.n cee02 │ │ + b.n cee12 │ │ movs r0, #17 │ │ - b.n cf206 │ │ + b.n cf216 │ │ movs r7, #245 @ 0xf5 │ │ add.w r0, r0, r0 │ │ - b.n cf16e │ │ + b.n cf17e │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ movs r7, #94 @ 0x5e │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n ce5fa │ │ + b.n ce60a │ │ movs r3, r1 │ │ - b.n cf188 │ │ + b.n cf198 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r6, r4 │ │ - b.n cf190 │ │ + b.n cf1a0 │ │ lsls r7, r3, #1 │ │ asrs r5, r2, #13 │ │ lsls r3, r4, #1 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n ce620 │ │ + b.n ce630 │ │ asrs r0, r1, #32 │ │ - b.n cee36 │ │ + b.n cee46 │ │ movs r0, #3 │ │ - b.n cf23a │ │ + b.n cf24a │ │ movs r7, #232 @ 0xe8 │ │ add.w r0, r0, r0 │ │ - b.n cf1a2 │ │ + b.n cf1b2 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ movs r7, #81 @ 0x51 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n ce62e │ │ + b.n ce63e │ │ movs r3, r1 │ │ - b.n cf1bc │ │ + b.n cf1cc │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r6, r4 │ │ - b.n cf1c4 │ │ + b.n cf1d4 │ │ lsls r7, r3, #1 │ │ asrs r5, r2, #13 │ │ lsls r2, r3, #1 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n ce654 │ │ + b.n ce664 │ │ movs r1, r0 │ │ - b.n cf216 │ │ + b.n cf226 │ │ movs r1, r5 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #32 │ │ - b.n ce652 │ │ + b.n ce662 │ │ cmp r5, #189 @ 0xbd │ │ - b.n cf148 │ │ + b.n cf158 │ │ strb r0, [r0, #4] │ │ - b.n cf13c │ │ + b.n cf14c │ │ strh r0, [r0, #0] │ │ - b.n ce65e │ │ + b.n ce66e │ │ cmp r1, #101 @ 0x65 │ │ - b.n cf1cc │ │ + b.n cf1dc │ │ str r2, [r0, r0] │ │ - b.n ceb88 │ │ + b.n ceb98 │ │ ldrb r4, [r1, #29] │ │ - b.n cf1e6 │ │ + b.n cf1f6 │ │ asrs r6, r0, #32 │ │ - b.n cf25c │ │ + b.n cf26c │ │ asrs r1, r0, #32 │ │ - b.n ceba2 │ │ + b.n cebb2 │ │ asrs r5, r0, #32 │ │ - b.n cee78 │ │ + b.n cee88 │ │ movs r5, r7 │ │ subs r0, r0, r0 │ │ movs r4, r1 │ │ - b.n ce678 │ │ + b.n ce688 │ │ ldrsb r3, [r1, r2] │ │ - b.n cf168 │ │ + b.n cf178 │ │ movs r0, r1 │ │ - b.n ce686 │ │ + b.n ce696 │ │ ldrsb r5, [r6, r0] │ │ - b.n cf1f0 │ │ + b.n cf200 │ │ movs r0, #6 │ │ - b.n ceeae │ │ + b.n ceebe │ │ movs r5, r0 │ │ - b.n cee12 │ │ + b.n cee22 │ │ movs r7, r5 │ │ lsrs r0, r0, #8 │ │ asrs r0, r6, #7 │ │ - b.n ce6b8 │ │ + b.n ce6c8 │ │ asrs r1, r0, #32 │ │ - b.n cec9c │ │ + b.n cecac │ │ asrs r2, r3, #1 │ │ - b.n ce724 │ │ + b.n ce734 │ │ movs r0, r0 │ │ - b.n cf228 │ │ + b.n cf238 │ │ movs r2, r7 │ │ lsrs r0, r0, #8 │ │ asrs r0, r4, #7 │ │ - b.n ce6cc │ │ + b.n ce6dc │ │ movs r0, #114 @ 0x72 │ │ - b.n cf2d2 │ │ + b.n cf2e2 │ │ adds r1, #220 @ 0xdc │ │ - b.n ce6d4 │ │ + b.n ce6e4 │ │ asrs r1, r0, #32 │ │ - b.n cecb8 │ │ + b.n cecc8 │ │ movs r1, r4 │ │ stmia.w sp, {r0, r1, ip, sp} │ │ - b.n cecc0 │ │ + b.n cecd0 │ │ movs r1, r0 │ │ - b.n cf2e6 │ │ - adds r1, #159 @ 0x9f │ │ + b.n cf2f6 │ │ + adds r1, #158 @ 0x9e │ │ @ instruction: 0xebff0031 │ │ and.w r1, r0, r4, lsl #6 │ │ - b.n ce6f0 │ │ + b.n ce700 │ │ asrs r1, r0, #32 │ │ - b.n cecd4 │ │ + b.n cece4 │ │ asrs r0, r2, #1 │ │ - b.n ce6dc │ │ + b.n ce6ec │ │ movs r0, #1 │ │ - b.n cec6e │ │ + b.n cec7e │ │ movs r0, #0 │ │ - b.n cf162 │ │ + b.n cf172 │ │ vpmin.u , , │ │ asrs r1, r0, #32 │ │ - b.n cf04c │ │ + b.n cf05c │ │ asrs r1, r0, #32 │ │ - b.n cebfe │ │ + b.n cec0e │ │ @ instruction: 0xff930aff │ │ vpmin.u q15, , │ │ asrs r0, r1, #32 │ │ - b.n cef1a │ │ + b.n cef2a │ │ str r0, [r0, r0] │ │ - b.n cef1e │ │ - adds r2, r5, r5 │ │ + b.n cef2e │ │ + adds r2, r1, r6 │ │ mla r0, r0, r0, r1 │ │ - b.n cf326 │ │ + b.n cf336 │ │ movs r6, #139 @ 0x8b │ │ - b.n cf1f0 │ │ + b.n cf200 │ │ movs r1, r0 │ │ - b.n cf32e │ │ + b.n cf33e │ │ movs r6, #53 @ 0x35 │ │ - b.n cf278 │ │ + b.n cf288 │ │ lsls r0, r7, #31 │ │ - b.n cef80 │ │ + b.n cef90 │ │ asrs r0, r0, #4 │ │ - b.n cf1fc │ │ + b.n cf20c │ │ lsrs r5, r7, #22 │ │ - b.n cf210 │ │ + b.n cf220 │ │ subs r4, r1, #5 │ │ - b.n cf29e │ │ + b.n cf2ae │ │ lsrs r5, r4, #5 │ │ - b.n cf290 │ │ + b.n cf2a0 │ │ asrs r6, r0, #32 │ │ - b.n cf30c │ │ + b.n cf31c │ │ asrs r0, r0, #32 │ │ - b.n ce718 │ │ + b.n ce728 │ │ asrs r0, r1, #32 │ │ - b.n cef52 │ │ + b.n cef62 │ │ movs r4, r0 │ │ - b.n ce720 │ │ + b.n ce730 │ │ movs r7, r0 │ │ - b.n cef5a │ │ + b.n cef6a │ │ movs r0, #8 │ │ - b.n ce728 │ │ + b.n ce738 │ │ movs r0, #6 │ │ - b.n cf362 │ │ + b.n cf372 │ │ str r4, [r1, r0] │ │ - b.n ce740 │ │ + b.n ce750 │ │ stmia r3!, {r0, r1, r4, r5} │ │ @ instruction: 0xebff2000 │ │ - b.n cf3ee │ │ + b.n cf3fe │ │ movs r0, r0 │ │ - b.n cf2d2 │ │ + b.n cf2e2 │ │ movs r3, r5 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n cef7a │ │ + b.n cef8a │ │ asrs r2, r1, #32 │ │ - b.n cef7e │ │ + b.n cef8e │ │ lsls r2, r7, #10 │ │ add.w r0, r0, r0 │ │ - b.n cf2e6 │ │ + b.n cf2f6 │ │ movs r4, r2 │ │ subs r0, r0, r0 │ │ movs r4, r1 │ │ - b.n ce788 │ │ + b.n ce798 │ │ vpmin.u32 q7, , │ │ asrs r0, r0, #4 │ │ - b.n ce794 │ │ + b.n ce7a4 │ │ lsrs r7, r7 │ │ - b.n cf3ea │ │ + b.n cf3fa │ │ asrs r1, r0, #32 │ │ - b.n ced7c │ │ + b.n ced8c │ │ lsls r2, r3, #1 │ │ - b.n ce804 │ │ + b.n ce814 │ │ movs r0, r0 │ │ - b.n cf306 │ │ + b.n cf316 │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ movs r7, r0 │ │ - b.n cecb6 │ │ + b.n cecc6 │ │ movs r5, r0 │ │ - b.n cef92 │ │ + b.n cefa2 │ │ str r0, [sp, #4] │ │ asrs r1, r1, #10 │ │ str r1, [r1, r0] │ │ - b.n cefba │ │ + b.n cefca │ │ vpmin.u16 q7, q14, │ │ movs r1, r0 │ │ - b.n cf10c │ │ + b.n cf11c │ │ movs r2, r0 │ │ - b.n cf366 │ │ + b.n cf376 │ │ vpmin.u16 , , │ │ @ instruction: 0xff97eaff │ │ movs r1, r0 │ │ - b.n cf11c │ │ + b.n cf12c │ │ movs r2, r0 │ │ - b.n cf376 │ │ + b.n cf386 │ │ vpmin.u16 , , │ │ @ instruction: 0xffa0eaff │ │ str r0, [r0, r0] │ │ - b.n cefe2 │ │ + b.n ceff2 │ │ vpmin.u16 q7, q9, │ │ lsls r0, r6, #2 │ │ - b.n ce7e8 │ │ + b.n ce7f8 │ │ str r7, [r0, #0] │ │ - b.n cecf6 │ │ + b.n ced06 │ │ asrs r4, r5, #2 │ │ - b.n ce7f0 │ │ + b.n ce800 │ │ str r5, [r0, #0] │ │ - b.n cefe2 │ │ + b.n ceff2 │ │ adds r0, #168 @ 0xa8 │ │ - b.n ce7f8 │ │ + b.n ce808 │ │ movs r0, r0 │ │ - b.n ceddc │ │ + b.n cedec │ │ movs r0, #164 @ 0xa4 │ │ - b.n ce800 │ │ + b.n ce810 │ │ asrs r1, r0, #32 │ │ - b.n cede4 │ │ + b.n cedf4 │ │ adds r0, #3 │ │ - b.n cede8 │ │ + b.n cedf8 │ │ movs r0, #2 │ │ - b.n cedec │ │ + b.n cedfc │ │ movs r0, #0 │ │ lsls r0, r4, #6 │ │ movs r1, r0 │ │ - b.n cf416 │ │ + b.n cf426 │ │ movs r0, #0 │ │ - b.n ce7f4 │ │ + b.n ce804 │ │ movs r0, #109 @ 0x6d │ │ - b.n cf41e │ │ - adds r1, #81 @ 0x51 │ │ + b.n cf42e │ │ + adds r1, #80 @ 0x50 │ │ @ instruction: 0xebffffe0 │ │ @ instruction: 0xeaff5000 │ │ - b.n cf02a │ │ + b.n cf03a │ │ lsls r0, r3, #1 │ │ - b.n ce82c │ │ + b.n ce83c │ │ movs r0, r0 │ │ - b.n cee10 │ │ + b.n cee20 │ │ lsls r2, r3, #1 │ │ - b.n ce896 │ │ + b.n ce8a6 │ │ movs r0, r0 │ │ - b.n cf39a │ │ + b.n cf3aa │ │ mrc2 10, 7, r0, cr12, cr15, {7} @ │ │ asrs r0, r1, #1 │ │ - b.n ce840 │ │ + b.n ce850 │ │ movs r1, r0 │ │ - b.n cf446 │ │ + b.n cf456 │ │ adds r0, #68 @ 0x44 │ │ - b.n ce848 │ │ + b.n ce858 │ │ movs r0, #100 @ 0x64 │ │ - b.n cf44e │ │ + b.n cf45e │ │ eors r0, r0 │ │ - b.n ce850 │ │ + b.n ce860 │ │ asrs r1, r0, #32 │ │ - b.n cee34 │ │ + b.n cee44 │ │ adds r0, #3 │ │ - b.n cee38 │ │ + b.n cee48 │ │ ands r4, r0 │ │ - b.n cee3c │ │ + b.n cee4c │ │ lsrs r0, r6 │ │ - b.n cf0bc │ │ + b.n cf0cc │ │ vpmin.u8 q15, , │ │ - vhadd.u16 d0, d0, d0 │ │ - cdp2 0, 4, cr0, cr0, cr0, {0} │ │ - cdp2 0, 1, cr0, cr0, cr0, {0} │ │ - svc 199 @ 0xc7 │ │ - vtbx.8 d30, {d3}, d13 │ │ - @ instruction: 0xfff3fc98 │ │ - movs r0, r0 │ │ - cdp2 0, 7, cr0, cr12, cr0, {0} │ │ - b.n cedaa │ │ - @ instruction: 0xfff3b36d │ │ - @ instruction: 0xfff3fb5c │ │ - movs r0, r0 │ │ - ble.n ced66 │ │ - vtbl.8 d31, {d3-d4}, d4 │ │ - vmla.i , , d27[0] │ │ - @ instruction: 0xfff3fbf0 │ │ - movs r0, r0 │ │ - bcs.n ced3a │ │ - vcvt.u16.f16 , , #13 │ │ - vcvt.f16.u16 d28, d10, #13 │ │ - @ instruction: 0xfff3c99e │ │ - @ instruction: 0xfff3fcd0 │ │ + vhadd.u32 d0, d0, d0 │ │ + cdp2 0, 5, cr0, cr0, cr0, {0} │ │ + cdp2 0, 2, cr0, cr0, cr0, {0} │ │ + svc 220 @ 0xdc │ │ + vqrshrn.u64 d30, , #13 │ │ + vmull.u , d19, d24 │ │ + movs r0, r0 │ │ + cdp2 0, 8, cr0, cr12, cr0, {0} │ │ + b.n cede4 │ │ + vsri.32 d27, d18, #13 │ │ + vtbx.8 d31, {d3-d6}, d28 │ │ + movs r0, r0 │ │ + ble.n ceda0 │ │ + vtbx.8 d31, {d19-d21}, d14 │ │ + vsra.u32 d27, d16, #13 │ │ + vdup.8 d31, d0[1] │ │ + movs r0, r0 │ │ + bcs.n cecce │ │ + vcvt.u16.f16 , q8, #13 │ │ + @ instruction: 0xfff3cbfa │ │ + vqrshrn.u64 d28, q15, #13 │ │ + vqdmulh.s , , d16[0] │ │ movs r0, r0 │ │ - udf #135 @ 0x87 │ │ - @ instruction: 0xfff3a56b │ │ + udf #156 @ 0x9c │ │ + vraddhn.i d26, , │ │ vtbl.8 d20, {d3}, d0 │ │ stmdb sp!, {r0, r2, r3, ip, sp, pc} │ │ - b.n cf0c2 │ │ + b.n cf0d2 │ │ movs r0, r5 │ │ - b.n ce8c4 │ │ + b.n ce8d4 │ │ movs r0, r0 │ │ - b.n ceea8 │ │ + b.n ceeb8 │ │ movs r0, r3 │ │ - b.n cf28e │ │ + b.n cf29e │ │ movs r7, #83 @ 0x53 │ │ add.w r0, r0, r0 │ │ - b.n cf436 │ │ + b.n cf446 │ │ ldrh r0, [r0, #0] │ │ lsrs r5, r7, #2 │ │ movs r4, r2 │ │ - b.n ce8dc │ │ + b.n ce8ec │ │ movs r0, #219 @ 0xdb │ │ - b.n cf4e2 │ │ + b.n cf4f2 │ │ asrs r0, r2, #32 │ │ - b.n ce8e4 │ │ + b.n ce8f4 │ │ movs r0, r0 │ │ - b.n ceec8 │ │ + b.n ceed8 │ │ asrs r1, r0, #32 │ │ - b.n ceecc │ │ - adds r0, #17 │ │ - @ instruction: 0xebfffac4 │ │ + b.n ceedc │ │ + adds r0, #16 │ │ + @ instruction: 0xebfffad4 │ │ movs r0, r0 │ │ - bl d9d9e │ │ - ldmia r5, {r2, r3, r4, r5, r6} │ │ + bl 1bddae │ │ + ldmia r5, {r0, r4, r5, r7} │ │ @ instruction: 0xfff34ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n cf2e0 │ │ - beq.n cedd0 │ │ - b.n cf264 │ │ + b.n cf2f0 │ │ + beq.n cede0 │ │ + b.n cf274 │ │ strh r0, [r3, #8] │ │ - b.n ce90c │ │ + b.n ce91c │ │ ands r0, r0 │ │ - b.n cf112 │ │ + b.n cf122 │ │ strh r0, [r1, #0] │ │ - b.n ceef4 │ │ + b.n cef04 │ │ strb r4, [r3, #0] │ │ - b.n ce90a │ │ + b.n ce91a │ │ movs r0, r0 │ │ - b.n cf48c │ │ + b.n cf49c │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ lsls r4, r0, #4 │ │ - b.n ce924 │ │ + b.n ce934 │ │ asrs r7, r0, #32 │ │ - b.n cf12a │ │ + b.n cf13a │ │ movs r0, r0 │ │ - b.n ced2c │ │ + b.n ced3c │ │ movs r0, #0 │ │ - b.n ce912 │ │ + b.n ce922 │ │ movs r4, r0 │ │ - b.n cf09a │ │ + b.n cf0aa │ │ movs r6, r3 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n cf2fe │ │ + b.n cf30e │ │ asrs r1, r0, #32 │ │ - b.n cf2a4 │ │ + b.n cf2b4 │ │ @ instruction: 0xfff91aff │ │ str r4, [r4, #12] │ │ - b.n ce948 │ │ + b.n ce958 │ │ movs r0, r0 │ │ - b.n cf54e │ │ + b.n cf55e │ │ str r4, [r0, r0] │ │ - b.n cf152 │ │ + b.n cf162 │ │ str r6, [r0, #0] │ │ - b.n cef34 │ │ + b.n cef44 │ │ lsls r4, r5, #1 │ │ - b.n ce964 │ │ + b.n ce974 │ │ asrs r4, r0, #32 │ │ - b.n ce94a │ │ + b.n ce95a │ │ movs r1, r0 │ │ - b.n cf0d0 │ │ + b.n cf0e0 │ │ movs r6, r2 │ │ lsrs r0, r0, #8 │ │ movs r6, r0 │ │ - b.n ce9d2 │ │ + b.n ce9e2 │ │ movs r0, r4 │ │ - b.n cf44e │ │ + b.n cf45e │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n cf176 │ │ + b.n cf186 │ │ asrs r0, r0, #32 │ │ - b.n cf57a │ │ + b.n cf58a │ │ movs r6, #192 @ 0xc0 │ │ add.w r0, r0, r0 │ │ - b.n cf4e2 │ │ + b.n cf4f2 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n ce972 │ │ + b.n ce982 │ │ lsls r1, r0, #8 │ │ - b.n cf54e │ │ + b.n cf55e │ │ movs r4, r0 │ │ - b.n ce95a │ │ + b.n ce96a │ │ strb r4, [r3, #0] │ │ - b.n ce986 │ │ + b.n ce996 │ │ lsls r0, r5, #2 │ │ - b.n ce998 │ │ + b.n ce9a8 │ │ movs r0, r0 │ │ - b.n ced9c │ │ + b.n cedac │ │ asrs r7, r0 │ │ - b.n ced62 │ │ + b.n ced72 │ │ movs r1, r0 │ │ - b.n cf374 │ │ + b.n cf384 │ │ movs r4, r3 │ │ - b.n ce97a │ │ + b.n ce98a │ │ movs r0, r0 │ │ - b.n cf5ae │ │ - beq.n ceea8 │ │ - b.n cf308 │ │ + b.n cf5be │ │ + beq.n ceeb8 │ │ + b.n cf318 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r2, r4, r5, r7, r8, r9, sl} │ │ - b.n cf48a │ │ + b.n cf49a │ │ lsrs r7, r7, #31 │ │ - b.n cf51c │ │ + b.n cf52c │ │ @ instruction: 0xfffaeaff │ │ lsls r4, r5, #1 │ │ - b.n ce9c4 │ │ + b.n ce9d4 │ │ asrs r7, r0, #6 │ │ - b.n cf1ca │ │ - add r0, pc, #416 @ (adr r0, cf02c ) │ │ - b.n ce9cc │ │ - movs r0, r0 │ │ - b.n cefb0 │ │ - add r0, pc, #40 @ (adr r0, ceebc ) │ │ - b.n cedd4 │ │ + b.n cf1da │ │ + add r0, pc, #416 @ (adr r0, cf03c ) │ │ + b.n ce9dc │ │ + movs r0, r0 │ │ + b.n cefc0 │ │ + add r0, pc, #40 @ (adr r0, ceecc ) │ │ + b.n cede4 │ │ movs r0, r0 │ │ - b.n cef4e │ │ + b.n cef5e │ │ movs r2, r1 │ │ asrs r0, r4, #6 │ │ movs r6, #115 @ 0x73 │ │ add.w r0, r0, r0 │ │ - b.n cf546 │ │ + b.n cf556 │ │ movs r5, r1 │ │ lsrs r0, r0, #8 │ │ str r0, [sp, #0] │ │ - b.n cf1ee │ │ + b.n cf1fe │ │ lsls r0, r1, #1 │ │ - b.n ce9f0 │ │ + b.n cea00 │ │ movs r0, r0 │ │ - b.n cefd4 │ │ + b.n cefe4 │ │ movs r0, r0 │ │ - b.n cf16e │ │ + b.n cf17e │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ asrs r4, r7, #32 │ │ - b.n cea00 │ │ + b.n cea10 │ │ movs r1, #7 │ │ - b.n cf206 │ │ + b.n cf216 │ │ movs r1, r1 │ │ - b.n cf20a │ │ + b.n cf21a │ │ asrs r1, r0, #32 │ │ - b.n cefec │ │ - adds r5, r7, r3 │ │ - @ instruction: 0xfb001087 │ │ - b.n cf216 │ │ + b.n ceffc │ │ + asrs r6, r2, #29 │ │ + @ instruction: 0xfa001087 │ │ + b.n cf226 │ │ str r0, [sp, #0] │ │ - b.n ce9e6 │ │ + b.n ce9f6 │ │ asrs r4, r0, #32 │ │ - b.n ce9ea │ │ + b.n ce9fa │ │ @ instruction: 0xffd0eaff │ │ movs r4, r1 │ │ - b.n cf626 │ │ + b.n cf636 │ │ @ instruction: 0xffe0eaff │ │ - @ instruction: 0xfa780000 │ │ + @ instruction: 0xfa880000 │ │ adds.w r0, r4, #0 │ │ @ instruction: 0xf0ec0000 │ │ - ldr??.w r0, [ip, r0] │ │ + vst1.8 {d0[0]}, [ip], r0 │ │ orn r0, ip, #0 │ │ - ldr??.w r0, [r8, r0] │ │ - vst4.8 {d16-d19}, [r0], r0 │ │ + vld4.8 {d16-d19}, [r8], r0 │ │ + ldr??.w r0, [r0, r0] │ │ @ instruction: 0xf0a40000 │ │ - ldr r7, [pc, #960] @ (cf2cc ) │ │ + ldr r7, [pc, #960] @ (cf2dc ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n cf42c │ │ - beq.n cef2c │ │ - b.n cf3b0 │ │ + b.n cf43c │ │ + beq.n cef3c │ │ + b.n cf3c0 │ │ ands r0, r0 │ │ - b.n cf25a │ │ + b.n cf26a │ │ movs r6, #244 @ 0xf4 │ │ add.w r0, r0, r8, asr #5 │ │ - b.n cea4a │ │ + b.n cea5a │ │ movs r1, r0 │ │ - b.n cf1c6 │ │ + b.n cf1d6 │ │ lsls r6, r3, #3 │ │ subs r0, r0, r0 │ │ - add r4, pc, #48 @ (adr r4, cef5c ) │ │ - b.n cea6c │ │ - add r0, pc, #40 @ (adr r0, cef58 ) │ │ - b.n cf050 │ │ + add r4, pc, #48 @ (adr r4, cef6c ) │ │ + b.n cea7c │ │ + add r0, pc, #40 @ (adr r0, cef68 ) │ │ + b.n cf060 │ │ lsls r3, r3, #1 │ │ - b.n ceaea │ │ + b.n ceafa │ │ movs r0, r0 │ │ - b.n cf5da │ │ + b.n cf5ea │ │ lsls r4, r3, #3 │ │ subs r0, r0, r0 │ │ movs r0, r4 │ │ - b.n cea76 │ │ + b.n cea86 │ │ movs r0, r0 │ │ - b.n cf5e6 │ │ + b.n cf5f6 │ │ lsls r6, r4, #3 │ │ lsrs r0, r0, #8 │ │ movs r4, r6 │ │ - b.n cea76 │ │ + b.n cea86 │ │ movs r1, r0 │ │ - b.n cf632 │ │ + b.n cf642 │ │ lsls r7, r2, #1 │ │ lsrs r0, r0, #8 │ │ strh r0, [r0, #0] │ │ - b.n cf55a │ │ + b.n cf56a │ │ str r0, [sp, #148] @ 0x94 │ │ - b.n cf55e │ │ + b.n cf56e │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - b.n cf5f0 │ │ + b.n cf600 │ │ str r1, [r0, #0] │ │ - b.n cf6a6 │ │ + b.n cf6b6 │ │ str r1, [sp, #0] │ │ - b.n cf5ea │ │ + b.n cf5fa │ │ movs r4, r6 │ │ - b.n cea96 │ │ + b.n ceaa6 │ │ asrs r1, r0, #32 │ │ - b.n cf6b2 │ │ + b.n cf6c2 │ │ movs r0, #0 │ │ - b.n cf6b6 │ │ + b.n cf6c6 │ │ adds r0, #1 │ │ - b.n cf6ba │ │ + b.n cf6ca │ │ lsls r0, r3, #8 │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n cf2c2 │ │ + b.n cf2d2 │ │ movs r3, r1 │ │ - b.n cf406 │ │ + b.n cf416 │ │ movs r0, r3 │ │ - b.n cf62a │ │ + b.n cf63a │ │ movs r1, r0 │ │ ldrh r0, [r0, #16] │ │ movs r6, r2 │ │ - b.n cf1c4 │ │ + b.n cf1d4 │ │ movs r3, r3 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n cf648 │ │ + b.n cf658 │ │ lsls r6, r4, #2 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n cf2e2 │ │ + b.n cf2f2 │ │ lsls r5, r1, #11 │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n cf2ea │ │ + b.n cf2fa │ │ movs r1, r0 │ │ - b.n cf42e │ │ + b.n cf43e │ │ movs r2, r0 │ │ - b.n cf692 │ │ + b.n cf6a2 │ │ lsls r5, r5, #2 │ │ subs r2, #0 │ │ asrs r4, r0, #32 │ │ - b.n ceae2 │ │ + b.n ceaf2 │ │ movs r0, #0 │ │ - b.n cf6fe │ │ + b.n cf70e │ │ movs r4, r2 │ │ - b.n ceaea │ │ + b.n ceafa │ │ adds r0, #8 │ │ - b.n cf306 │ │ + b.n cf316 │ │ adds r1, r4, r2 │ │ - b.n cf356 │ │ + b.n cf366 │ │ lsls r4, r0, #8 │ │ add.w r0, r0, r0 │ │ - b.n cf672 │ │ + b.n cf682 │ │ lsls r6, r1, #1 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, r0] │ │ - b.n cf31a │ │ + b.n cf32a │ │ movs r4, r0 │ │ - b.n cf31e │ │ + b.n cf32e │ │ lsls r6, r7, #10 │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n cf326 │ │ + b.n cf336 │ │ movs r1, r0 │ │ - b.n cf46a │ │ + b.n cf47a │ │ movs r2, r0 │ │ - b.n cf6ce │ │ + b.n cf6de │ │ lsls r6, r3, #2 │ │ subs r2, #0 │ │ movs r3, r1 │ │ - b.n cf480 │ │ + b.n cf490 │ │ movs r0, r3 │ │ - b.n cf69a │ │ + b.n cf6aa │ │ lsls r1, r1, #2 │ │ ldrh r0, [r0, #16] │ │ movs r6, r2 │ │ - b.n cf234 │ │ + b.n cf244 │ │ lsls r7, r0, #2 │ │ lsrs r0, r0, #8 │ │ movs r4, r6 │ │ - b.n ceb32 │ │ + b.n ceb42 │ │ movs r0, #0 │ │ - b.n cf74e │ │ + b.n cf75e │ │ asrs r4, r4, #32 │ │ - b.n ceb46 │ │ + b.n ceb56 │ │ adds r0, #0 │ │ - b.n cf756 │ │ + b.n cf766 │ │ str r0, [r0, #0] │ │ - b.n ceb34 │ │ + b.n ceb44 │ │ lsls r5, r5, #9 │ │ add.w r0, r0, r0 │ │ - b.n cf6c2 │ │ + b.n cf6d2 │ │ lsls r0, r3, #1 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n cf36a │ │ + b.n cf37a │ │ lsls r3, r5, #10 │ │ add.w r0, r0, r1 │ │ - b.n cf712 │ │ + b.n cf722 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ strb r0, [r0, #0] │ │ - b.n cf37a │ │ + b.n cf38a │ │ movs r0, r0 │ │ - b.n cf6de │ │ + b.n cf6ee │ │ lsls r0, r4, #1 │ │ subs r0, r0, r0 │ │ movs r4, r6 │ │ - b.n ceb6e │ │ + b.n ceb7e │ │ asrs r1, r0, #32 │ │ - b.n cf78a │ │ + b.n cf79a │ │ movs r0, #0 │ │ - b.n cf78e │ │ + b.n cf79e │ │ adds r0, #1 │ │ - b.n cf792 │ │ + b.n cf7a2 │ │ lsls r2, r4, #7 │ │ add.w r0, r0, r0 │ │ - b.n cf6fa │ │ + b.n cf70a │ │ @ instruction: 0xffd50aff │ │ movs r5, r5 │ │ and.w r0, r0, r4, rrx │ │ - b.n ceb8e │ │ + b.n ceb9e │ │ movs r0, #2 │ │ - b.n cf7aa │ │ + b.n cf7ba │ │ asrs r0, r4, #32 │ │ - b.n ceba2 │ │ + b.n cebb2 │ │ adds r0, #0 │ │ - b.n cf7b2 │ │ + b.n cf7c2 │ │ str r0, [r0, #0] │ │ - b.n ceb90 │ │ + b.n ceba0 │ │ lsls r6, r2, #9 │ │ add.w r0, r0, r0 │ │ - b.n cf71e │ │ + b.n cf72e │ │ @ instruction: 0xffb90aff │ │ strb r0, [r0, #0] │ │ - b.n cf3c6 │ │ + b.n cf3d6 │ │ lsls r2, r3, #1 │ │ - b.n cec3e │ │ + b.n cec4e │ │ movs r0, r0 │ │ - b.n cf72e │ │ + b.n cf73e │ │ lsls r6, r6, #1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #11 │ │ - b.n cebd4 │ │ + b.n cebe4 │ │ movs r1, r0 │ │ - b.n cf7da │ │ + b.n cf7ea │ │ adds r2, #188 @ 0xbc │ │ - b.n cebdc │ │ + b.n cebec │ │ cmp r7, #79 @ 0x4f │ │ - b.n cf7e2 │ │ + b.n cf7f2 │ │ str r0, [r7, #40] @ 0x28 │ │ - b.n cebe4 │ │ + b.n cebf4 │ │ asrs r1, r0, #32 │ │ - b.n cf1c8 │ │ + b.n cf1d8 │ │ adds r0, #3 │ │ - b.n cf1cc │ │ + b.n cf1dc │ │ str r6, [r0, #0] │ │ - b.n cf1d0 │ │ + b.n cf1e0 │ │ lsls r3, r5, #1 │ │ and.w r0, r0, r4, lsl #4 │ │ - b.n cebe2 │ │ + b.n cebf2 │ │ adds r0, #0 │ │ - b.n cf6be │ │ + b.n cf6ce │ │ movs r4, r2 │ │ - b.n cebea │ │ + b.n cebfa │ │ movs r0, #1 │ │ - b.n cf806 │ │ + b.n cf816 │ │ subs r7, #240 @ 0xf0 │ │ - b.n cf758 │ │ + b.n cf768 │ │ adds r1, r4, r2 │ │ - b.n cf452 │ │ + b.n cf462 │ │ movs r0, #0 │ │ - b.n cf812 │ │ + b.n cf822 │ │ lsls r2, r0, #7 │ │ add.w r0, r0, r0 │ │ - b.n cf77a │ │ + b.n cf78a │ │ movs r4, r1 │ │ lsrs r0, r0, #8 │ │ strb r0, [r0, #0] │ │ - b.n cf422 │ │ + b.n cf432 │ │ lsls r2, r3, #1 │ │ - b.n cec9a │ │ + b.n cecaa │ │ movs r0, r0 │ │ - b.n cf78a │ │ + b.n cf79a │ │ lsls r7, r3, #1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r3, #9 │ │ - b.n cec30 │ │ + b.n cec40 │ │ movs r1, r0 │ │ - b.n cf836 │ │ + b.n cf846 │ │ adds r2, #84 @ 0x54 │ │ - b.n cec38 │ │ + b.n cec48 │ │ movs r1, #49 @ 0x31 │ │ - b.n cf6fe │ │ + b.n cf70e │ │ str r0, [r2, #36] @ 0x24 │ │ - b.n cec40 │ │ + b.n cec50 │ │ asrs r1, r0, #32 │ │ - b.n cf224 │ │ + b.n cf234 │ │ adds r0, #3 │ │ - b.n cf228 │ │ + b.n cf238 │ │ str r6, [r0, #0] │ │ - b.n cf22c │ │ + b.n cf23c │ │ lsls r4, r2, #1 │ │ and.w r0, r0, r0, lsl #28 │ │ - b.n cf8d6 │ │ + b.n cf8e6 │ │ lsls r4, r2, #1 │ │ and.w r0, r0, r0, lsl #28 │ │ - b.n cf45e │ │ + b.n cf46e │ │ movs r3, r1 │ │ - b.n cf5a2 │ │ + b.n cf5b2 │ │ movs r0, r3 │ │ - b.n cf7c6 │ │ + b.n cf7d6 │ │ movs r2, r6 │ │ ldrh r0, [r0, #16] │ │ asrs r1, r0, #32 │ │ - b.n cf86e │ │ + b.n cf87e │ │ movs r1, r2 │ │ - b.n cf364 │ │ + b.n cf374 │ │ movs r7, r5 │ │ lsrs r0, r0, #8 │ │ adds r0, #4 │ │ - b.n cec62 │ │ + b.n cec72 │ │ movs r4, r2 │ │ - b.n cec66 │ │ + b.n cec76 │ │ movs r0, #104 @ 0x68 │ │ - b.n cec6a │ │ + b.n cec7a │ │ adds r3, r4, r2 │ │ - b.n cf4c8 │ │ + b.n cf4d8 │ │ adds r0, #1 │ │ - b.n cf88a │ │ + b.n cf89a │ │ lsls r4, r4, #6 │ │ add.w r0, r0, r0 │ │ - b.n cf7f2 │ │ + b.n cf802 │ │ movs r1, r3 │ │ lsrs r0, r0, #8 │ │ strb r0, [r0, #0] │ │ - b.n cf49a │ │ + b.n cf4aa │ │ lsls r2, r3, #1 │ │ - b.n ced12 │ │ + b.n ced22 │ │ movs r0, r0 │ │ - b.n cf802 │ │ + b.n cf812 │ │ lsls r1, r0, #1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r6, #8 │ │ - b.n ceca8 │ │ + b.n cecb8 │ │ movs r1, r0 │ │ - b.n cf8ae │ │ + b.n cf8be │ │ adds r2, #48 @ 0x30 │ │ - b.n cecb0 │ │ + b.n cecc0 │ │ movs r1, #135 @ 0x87 │ │ - b.n cf776 │ │ + b.n cf786 │ │ str r4, [r5, #32] │ │ - b.n cecb8 │ │ + b.n cecc8 │ │ asrs r1, r0, #32 │ │ - b.n cf29c │ │ + b.n cf2ac │ │ adds r0, #3 │ │ - b.n cf2a0 │ │ + b.n cf2b0 │ │ str r6, [r0, #0] │ │ - b.n cf2a4 │ │ + b.n cf2b4 │ │ movs r6, r6 │ │ and.w r0, r0, r0, lsl #28 │ │ - b.n cf4ce │ │ + b.n cf4de │ │ lsls r2, r3, #1 │ │ - b.n ced46 │ │ + b.n ced56 │ │ movs r0, r0 │ │ - b.n cf836 │ │ + b.n cf846 │ │ movs r4, r6 │ │ lsrs r0, r0, #8 │ │ asrs r4, r3, #7 │ │ - b.n cecdc │ │ + b.n cecec │ │ movs r1, r0 │ │ - b.n cf8e2 │ │ + b.n cf8f2 │ │ adds r1, #216 @ 0xd8 │ │ - b.n cece4 │ │ + b.n cecf4 │ │ cmp r7, #91 @ 0x5b │ │ - b.n cf8ea │ │ + b.n cf8fa │ │ str r4, [r2, #28] │ │ - b.n cecec │ │ + b.n cecfc │ │ asrs r1, r0, #32 │ │ - b.n cf2d0 │ │ + b.n cf2e0 │ │ adds r0, #3 │ │ - b.n cf2d4 │ │ + b.n cf2e4 │ │ str r6, [r0, #0] │ │ - b.n cf2d8 │ │ + b.n cf2e8 │ │ movs r1, r5 │ │ and.w r0, r0, r0, lsl #28 │ │ - b.n cf902 │ │ + b.n cf912 │ │ movs r1, r5 │ │ and.w r0, r0, sl, lsr #1 │ │ - b.n ced7e │ │ + b.n ced8e │ │ movs r0, r0 │ │ - b.n cf86e │ │ + b.n cf87e │ │ movs r6, r4 │ │ lsrs r0, r0, #8 │ │ asrs r0, r6, #6 │ │ - b.n ced14 │ │ + b.n ced24 │ │ movs r1, r0 │ │ - b.n cf91a │ │ + b.n cf92a │ │ adds r1, #172 @ 0xac │ │ - b.n ced1c │ │ + b.n ced2c │ │ movs r1, #117 @ 0x75 │ │ - b.n cf7e2 │ │ + b.n cf7f2 │ │ str r0, [r5, #24] │ │ - b.n ced24 │ │ + b.n ced34 │ │ asrs r1, r0, #32 │ │ - b.n cf308 │ │ + b.n cf318 │ │ adds r0, #3 │ │ - b.n cf30c │ │ + b.n cf31c │ │ str r6, [r0, #0] │ │ - b.n cf310 │ │ + b.n cf320 │ │ movs r3, r3 │ │ and.w r0, r0, sl, lsr #1 │ │ - b.n cedae │ │ + b.n cedbe │ │ movs r0, r0 │ │ - b.n cf89e │ │ + b.n cf8ae │ │ movs r2, r3 │ │ lsrs r0, r0, #8 │ │ asrs r4, r1, #6 │ │ - b.n ced44 │ │ + b.n ced54 │ │ movs r1, r0 │ │ - b.n cf94a │ │ + b.n cf95a │ │ adds r1, #136 @ 0x88 │ │ - b.n ced4c │ │ + b.n ced5c │ │ movs r1, #127 @ 0x7f │ │ - b.n cf812 │ │ + b.n cf822 │ │ str r4, [r0, #24] │ │ - b.n ced54 │ │ + b.n ced64 │ │ asrs r1, r0, #32 │ │ - b.n cf338 │ │ + b.n cf348 │ │ adds r0, #3 │ │ - b.n cf33c │ │ + b.n cf34c │ │ str r6, [r0, #0] │ │ - b.n cf340 │ │ + b.n cf350 │ │ movs r7, r1 │ │ and.w r0, r0, sl, lsr #1 │ │ - b.n cedde │ │ + b.n cedee │ │ movs r0, r0 │ │ - b.n cf8ce │ │ + b.n cf8de │ │ movs r1, r2 │ │ subs r0, r0, r0 │ │ strb r5, [r0, #0] │ │ - b.n cf576 │ │ + b.n cf586 │ │ movs r4, r1 │ │ and.w r0, r0, sl, lsr #1 │ │ - b.n cedf2 │ │ + b.n cee02 │ │ movs r0, r0 │ │ - b.n cf8e2 │ │ + b.n cf8f2 │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r4, #4 │ │ - b.n ced88 │ │ + b.n ced98 │ │ movs r1, r0 │ │ - b.n cf98e │ │ + b.n cf99e │ │ adds r1, #32 │ │ - b.n ced90 │ │ + b.n ceda0 │ │ movs r1, #91 @ 0x5b │ │ - b.n cf856 │ │ + b.n cf866 │ │ str r4, [r3, #16] │ │ - b.n ced98 │ │ + b.n ceda8 │ │ asrs r1, r0, #32 │ │ - b.n cf37c │ │ + b.n cf38c │ │ adds r0, #3 │ │ - b.n cf380 │ │ + b.n cf390 │ │ str r6, [r0, #0] │ │ - b.n cf384 │ │ + b.n cf394 │ │ str r0, [r6, #12] │ │ - b.n cf604 │ │ - cmp r7, #238 @ 0xee │ │ + b.n cf614 │ │ + cmp r7, #237 @ 0xed │ │ @ instruction: 0xebff0007 │ │ - b.n cf5b2 │ │ - beq.n cf2ac │ │ - b.n cf70c │ │ + b.n cf5c2 │ │ + beq.n cf2bc │ │ + b.n cf71c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r5, r6, r7, ip} │ │ - b.n cedbc │ │ + b.n cedcc │ │ movs r1, r0 │ │ - b.n cf9c2 │ │ + b.n cf9d2 │ │ adds r0, #224 @ 0xe0 │ │ - b.n cedc4 │ │ + b.n cedd4 │ │ cmp r7, #85 @ 0x55 │ │ - b.n cf9ca │ │ + b.n cf9da │ │ lsrs r4, r3 │ │ - b.n cedcc │ │ + b.n ceddc │ │ asrs r1, r0, #32 │ │ - b.n cf3b0 │ │ + b.n cf3c0 │ │ adds r0, #3 │ │ - b.n cf3b4 │ │ + b.n cf3c4 │ │ ands r4, r0 │ │ - b.n cf3b8 │ │ + b.n cf3c8 │ │ lsrs r0, r6 │ │ - b.n cf638 │ │ - cmp r7, #225 @ 0xe1 │ │ + b.n cf648 │ │ + cmp r7, #224 @ 0xe0 │ │ @ instruction: 0xebffffe2 │ │ @ instruction: 0xeaff77b5 │ │ - b.n cf8ba │ │ + b.n cf8ca │ │ ldrb r7, [r7, #31] │ │ - b.n cf94c │ │ + b.n cf95c │ │ @ instruction: 0xffeeeaff │ │ lsls r2, r3, #1 │ │ - b.n cee6a │ │ + b.n cee7a │ │ strb r5, [r4, #0] │ │ - b.n cf9fa │ │ + b.n cfa0a │ │ movs r0, r0 │ │ - b.n cf95e │ │ + b.n cf96e │ │ @ instruction: 0xffea0aff │ │ asrs r0, r7, #1 │ │ - b.n cee04 │ │ + b.n cee14 │ │ movs r1, r0 │ │ - b.n cfa0a │ │ + b.n cfa1a │ │ adds r0, #116 @ 0x74 │ │ - b.n cee0c │ │ + b.n cee1c │ │ movs r1, #35 @ 0x23 │ │ - b.n cf8d2 │ │ + b.n cf8e2 │ │ str r0, [r6, #4] │ │ - b.n cee14 │ │ + b.n cee24 │ │ asrs r1, r0, #32 │ │ - b.n cf3f8 │ │ + b.n cf408 │ │ adds r0, #3 │ │ - b.n cf3fc │ │ + b.n cf40c │ │ str r6, [r0, #0] │ │ - b.n cf400 │ │ + b.n cf410 │ │ @ instruction: 0xffdfeaff │ │ lsls r4, r3, #1 │ │ - b.n cee1e │ │ + b.n cee2e │ │ movs r0, #0 │ │ - b.n cf8ee │ │ + b.n cf8fe │ │ asrs r1, r3, #1 │ │ - b.n ceea6 │ │ + b.n ceeb6 │ │ movs r3, #15 │ │ - b.n cf976 │ │ + b.n cf986 │ │ movs r2, r0 │ │ - b.n cf59a │ │ + b.n cf5aa │ │ adds r0, #0 │ │ - b.n cfa3e │ │ + b.n cfa4e │ │ movs r0, r2 │ │ - b.n cf704 │ │ + b.n cf714 │ │ asrs r1, r0, #32 │ │ - b.n cfa46 │ │ + b.n cfa56 │ │ adds r0, #1 │ │ strh r0, [r0, #24] │ │ movs r0, #7 │ │ - b.n cfa4e │ │ + b.n cfa5e │ │ lsls r0, r4, #8 │ │ - b.n cf354 │ │ + b.n cf364 │ │ asrs r5, r0, #32 │ │ - b.n cfa56 │ │ + b.n cfa66 │ │ movs r3, r0 │ │ - b.n cf33a │ │ + b.n cf34a │ │ adds r0, #6 │ │ - b.n cfa5e │ │ + b.n cfa6e │ │ asrs r4, r4, #32 │ │ asrs r0, r0, #12 │ │ movs r0, #38 @ 0x26 │ │ asrs r0, r0, #12 │ │ movs r0, r0 │ │ - b.n cf9ca │ │ + b.n cf9da │ │ movs r0, #36 @ 0x24 │ │ - b.n cee42 │ │ + b.n cee52 │ │ adds r0, #37 @ 0x25 │ │ asrs r0, r0, #12 │ │ asrs r0, r5, #32 │ │ - b.n cee4a │ │ + b.n cee5a │ │ adds r0, #32 │ │ - b.n cee4e │ │ + b.n cee5e │ │ vpmin.u8 q7, q9, │ │ - ldrsb.w r0, [ip, r0] │ │ - ldmia r0!, {r1, r6} │ │ - @ instruction: 0xfff3f368 │ │ - vsli.32 d30, d7, #19 │ │ - vshll.u32 q14, d6, #19 │ │ - vsli.32 d31, d28, #19 │ │ - @ instruction: 0xfff3cf0e │ │ - @ instruction: 0xfff3ca72 │ │ - vsli.64 d31, d8, #51 @ 0x33 │ │ - vsri.32 q13, q1, #13 │ │ - vtbl.8 d28, {d19}, d10 │ │ - vrsra.u64 d31, d16, #13 │ │ - vsli.64 q8, q11, #51 @ 0x33 │ │ - @ instruction: 0xfff4c8be │ │ - @ instruction: 0xfff3f3e4 │ │ - @ instruction: 0xfff3b894 │ │ - vtbx.8 d28, {d3-d4}, d26 │ │ - vsri.64 d31, d0, #13 │ │ - vqshl.u32 d28, d30, #19 │ │ - vqshrn.u64 d28, q9, #13 │ │ - vsri.32 , q4, #13 │ │ - vmls.i , , d16[0] │ │ - vtbl.8 d28, {d3-d4}, d2 │ │ - vraddhn.i d31, , q12 │ │ - @ instruction: 0xfff3b8d8 │ │ - @ instruction: 0xfff3c99e │ │ - vmls.i , , d4[0] │ │ - vsra.u64 q14, q9, #13 │ │ + vld4.8 {d0-d3}, [ip], r0 │ │ + ldmia r0, {r0, r1, r2, r4, r5, r6} │ │ + vsli.32 d31, d18, #19 │ │ + @ instruction: 0xfff3e5e4 │ │ + vtbx.8 d28, {d3-d5}, d11 │ │ + vabdl.u , d3, d6 │ │ + @ instruction: 0xfff3ced0 │ │ + vtbl.8 d28, {d19-d21}, d23 │ │ + @ instruction: 0xfff3f762 │ │ + vraddhn.i d26, , │ │ + @ instruction: 0xfff3c8bf │ │ + vsli.32 , q13, #19 │ │ + vqshlu.s32 q8, q14, #19 │ │ + @ instruction: 0xfff4c8f3 │ │ + vabal.u , d19, d30 │ │ + vqshl.u64 , q14, #51 @ 0x33 │ │ + @ instruction: 0xfff3c99f │ │ + vqshlu.s32 , q5, #19 │ │ + vqshl.u32 d28, d14, #19 │ │ + vtbx.8 d28, {d3-d4}, d23 │ │ + vrsubhn.i d31, , q9 │ │ + vrsubhn.i d31, , q13 │ │ + vqshrn.u64 d28, , #13 │ │ + vsli.64 , q9, #51 @ 0x33 │ │ + vtbx.8 d27, {d3}, d0 │ │ + @ instruction: 0xfff3c9d3 │ │ + vrsubhn.i d31, , q7 │ │ + vsra.u32 d28, d17, #13 │ │ @ instruction: 0xfff34ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n cf8d0 │ │ - beq.n cf3e0 │ │ - b.n cf854 │ │ + b.n cf8e0 │ │ + beq.n cf3f0 │ │ + b.n cf864 │ │ str r1, [sp, #288] @ 0x120 │ │ - b.n ceefc │ │ + b.n cef0c │ │ str r0, [r0, r0] │ │ - b.n cf702 │ │ + b.n cf712 │ │ movs r0, r0 │ │ - b.n cfb06 │ │ - add r0, pc, #4 @ (adr r0, cf3cc ) │ │ - b.n cf70a │ │ + b.n cfb16 │ │ + add r0, pc, #4 @ (adr r0, cf3dc ) │ │ + b.n cf71a │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n cf4ec │ │ + b.n cf4fc │ │ movs r0, r0 │ │ - b.n ceed4 │ │ + b.n ceee4 │ │ movs r4, r1 │ │ - b.n ceef0 │ │ + b.n cef00 │ │ asrs r4, r3, #32 │ │ - b.n cef0c │ │ + b.n cef1c │ │ movs r0, r1 │ │ - b.n ceef8 │ │ + b.n cef08 │ │ movs r0, r0 │ │ - b.n cfa84 │ │ + b.n cfa94 │ │ movs r1, r7 │ │ lsrs r0, r0, #8 │ │ strh r0, [r1, #0] │ │ - b.n cf904 │ │ + b.n cf914 │ │ str r0, [r0, #0] │ │ - b.n cfb2e │ │ + b.n cfb3e │ │ lsls r0, r3, #4 │ │ - b.n cef30 │ │ + b.n cef40 │ │ movs r0, r0 │ │ - b.n cf334 │ │ + b.n cf344 │ │ asrs r6, r0 │ │ - b.n cf31a │ │ + b.n cf32a │ │ strb r4, [r0, #0] │ │ - b.n cf73e │ │ + b.n cf74e │ │ movs r0, r6 │ │ - b.n cef70 │ │ + b.n cef80 │ │ movs r0, r0 │ │ - b.n cfaa6 │ │ + b.n cfab6 │ │ movs r5, r0 │ │ asrs r7, r2, #5 │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ str r1, [r0, #0] │ │ - b.n cf91e │ │ + b.n cf92e │ │ movs r1, r0 │ │ - b.n cf6c2 │ │ + b.n cf6d2 │ │ @ instruction: 0xfff43aff │ │ movs r2, r5 │ │ and.w r0, r0, r0, asr #32 │ │ - b.n cf922 │ │ + b.n cf932 │ │ asrs r1, r0, #32 │ │ - b.n cfb66 │ │ - str r2, [r5, #76] @ 0x4c │ │ + b.n cfb76 │ │ + str r1, [r5, #76] @ 0x4c │ │ @ instruction: 0xebff0001 │ │ - b.n cf74e │ │ + b.n cf75e │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n cef64 │ │ + b.n cef74 │ │ movs r5, r0 │ │ - b.n cf77a │ │ + b.n cf78a │ │ lsls r0, r0, #9 │ │ add.w r0, r0, r3 │ │ and.w r0, r0, r5 │ │ - b.n cf786 │ │ + b.n cf796 │ │ asrs r7, r0, #32 │ │ - b.n cf78a │ │ + b.n cf79a │ │ movs r0, #8 │ │ - b.n cf78e │ │ + b.n cf79e │ │ lsls r4, r3, #10 │ │ add.w r0, r0, r1 │ │ - b.n cfb36 │ │ + b.n cfb46 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r5, r7 │ │ - b.n cfafe │ │ + b.n cfb0e │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ movs r3, r3 │ │ and.w r0, r0, r5 │ │ - b.n cf7aa │ │ + b.n cf7ba │ │ asrs r7, r0, #32 │ │ - b.n cf7ae │ │ + b.n cf7be │ │ movs r0, #8 │ │ - b.n cf7b2 │ │ + b.n cf7c2 │ │ lsls r3, r2, #10 │ │ add.w r0, r0, r1 │ │ - b.n cfb5a │ │ + b.n cfb6a │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n cefb0 │ │ + b.n cefc0 │ │ adds r2, r0, #0 │ │ - b.n cfbc6 │ │ + b.n cfbd6 │ │ movs r0, #1 │ │ - b.n cfbca │ │ + b.n cfbda │ │ movs r5, #176 @ 0xb0 │ │ add.w r0, r0, r5 │ │ - b.n cf7d2 │ │ + b.n cf7e2 │ │ asrs r7, r0, #32 │ │ - b.n cf7d6 │ │ + b.n cf7e6 │ │ movs r0, #8 │ │ - b.n cf7da │ │ + b.n cf7ea │ │ lsls r1, r1, #10 │ │ add.w r0, r0, r1 │ │ - b.n cfb82 │ │ + b.n cfb92 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n cfb4a │ │ + b.n cfb5a │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ asrs r4, r3, #32 │ │ - b.n cefe4 │ │ + b.n ceff4 │ │ @ instruction: 0xffd5eaff │ │ movs r0, #8 │ │ - b.n cf9d4 │ │ + b.n cf9e4 │ │ movs r5, r0 │ │ - b.n cf7fe │ │ + b.n cf80e │ │ asrs r7, r0, #32 │ │ - b.n cf802 │ │ + b.n cf812 │ │ lsls r7, r7, #9 │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n cefde │ │ + b.n cefee │ │ movs r0, r0 │ │ - b.n cfc0e │ │ - beq.n cf508 │ │ - b.n cf968 │ │ + b.n cfc1e │ │ + beq.n cf518 │ │ + b.n cf978 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2} │ │ - b.n cf004 │ │ + b.n cf014 │ │ asrs r0, r0, #32 │ │ - b.n cfc1e │ │ + b.n cfc2e │ │ asrs r4, r0, #32 │ │ - b.n ceffc │ │ + b.n cf00c │ │ asrs r0, r0, #32 │ │ - b.n cf000 │ │ + b.n cf010 │ │ asrs r5, r1, #32 │ │ - b.n cf82a │ │ + b.n cf83a │ │ ldmia r1!, {r0, r2, r5} │ │ @ instruction: 0xebff1000 │ │ - b.n cf832 │ │ + b.n cf842 │ │ movs r5, r0 │ │ ldmia.w sp, {r1} │ │ - b.n cf81a │ │ + b.n cf82a │ │ movs r5, r7 │ │ asrs r0, r0, #12 │ │ movs r0, r0 │ │ - b.n cfba4 │ │ + b.n cfbb4 │ │ movs r5, r7 │ │ asrs r0, r0, #12 │ │ @ instruction: 0xfff0eaff │ │ - eor.w r0, r0, #8388608 @ 0x800000 │ │ + eors.w r0, r0, #8388608 @ 0x800000 │ │ add.w r0, ip, r0 │ │ - ldr r7, [pc, #960] @ (cf8d4 ) │ │ + ldr r7, [pc, #960] @ (cf8e4 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n cfa34 │ │ - beq.n cf604 │ │ - b.n cf9b8 │ │ + b.n cfa44 │ │ + beq.n cf614 │ │ + b.n cf9c8 │ │ str r0, [r0, #0] │ │ - b.n cf862 │ │ + b.n cf872 │ │ movs r0, r0 │ │ - b.n cfc66 │ │ + b.n cfc76 │ │ str r0, [sp, #32] │ │ - b.n cfa2c │ │ + b.n cfa3c │ │ movs r0, r0 │ │ - b.n cf030 │ │ + b.n cf040 │ │ movs r4, r0 │ │ - b.n cf054 │ │ + b.n cf064 │ │ ands r1, r0 │ │ - b.n cf876 │ │ + b.n cf886 │ │ lsls r0, r2, #1 │ │ movt r0, #264 @ 0x108 │ │ - b.n cfc7e │ │ + b.n cfc8e │ │ strb r1, [r1, #0] │ │ - b.n cf882 │ │ + b.n cf892 │ │ str r3, [r0, r0] │ │ - b.n cf886 │ │ + b.n cf896 │ │ lsrs r1, r0, #11 │ │ orr.w r0, r7, #2195456 @ 0x218000 │ │ - b.n cf88e │ │ + b.n cf89e │ │ strh r2, [r0, #0] │ │ - b.n cf892 │ │ + b.n cf8a2 │ │ stmia r2!, {r0, r5, r6, r7} │ │ @ instruction: 0xebff0000 │ │ - b.n cfbfa │ │ + b.n cfc0a │ │ movs r4, r7 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n cf08a │ │ + b.n cf09a │ │ lsrs r2, r0, #32 │ │ - b.n cfb92 │ │ + b.n cfba2 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ asrs r0, r1, #32 │ │ - b.n cf0a4 │ │ + b.n cf0b4 │ │ asrs r1, r0, #32 │ │ - b.n cf994 │ │ + b.n cf9a4 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #8 │ │ - b.n cf8ba │ │ + b.n cf8ca │ │ adds r0, #0 │ │ - b.n cfcbe │ │ - add r0, pc, #0 @ (adr r0, cf580 ) │ │ - b.n cfcc2 │ │ + b.n cfcce │ │ + add r0, pc, #0 @ (adr r0, cf590 ) │ │ + b.n cfcd2 │ │ str r0, [sp, #392] @ 0x188 │ │ @ instruction: 0xebff0000 │ │ - b.n cfc2a │ │ + b.n cfc3a │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ - beq.n cf5c8 │ │ - b.n cfa28 │ │ + beq.n cf5d8 │ │ + b.n cfa38 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, ip} │ │ - b.n cfab4 │ │ + b.n cfac4 │ │ movs r4, #248 @ 0xf8 │ │ add.w r0, r0, r0 │ │ - b.n cfc42 │ │ + b.n cfc52 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, #169 @ 0xa9 │ │ add.w r0, r0, r0 │ │ - b.n cf0ce │ │ + b.n cf0de │ │ movs r0, r0 │ │ - b.n cfc52 │ │ + b.n cfc62 │ │ @ instruction: 0xfff51aff │ │ strh r0, [r0, #0] │ │ - b.n cf0e8 │ │ + b.n cf0f8 │ │ asrs r4, r0, #32 │ │ - b.n cf0ec │ │ + b.n cf0fc │ │ movs r3, r0 │ │ @ instruction: 0xea008038 │ │ - b.n cf100 │ │ + b.n cf110 │ │ asrs r4, r7, #32 │ │ - b.n cf104 │ │ + b.n cf114 │ │ strh r0, [r0, #0] │ │ - b.n cf0dc │ │ + b.n cf0ec │ │ asrs r4, r0, #32 │ │ - b.n cf0e0 │ │ + b.n cf0f0 │ │ movs r0, r1 │ │ - b.n cf680 │ │ + b.n cf690 │ │ movs r0, r0 │ │ - b.n cfbbc │ │ + b.n cfbcc │ │ strh r5, [r0, #0] │ │ adds r1, #160 @ 0xa0 │ │ movs r0, r0 │ │ and.w r5, r0, r0 │ │ stmia.w r7, {r2} │ │ - b.n cf112 │ │ + b.n cf122 │ │ movs r0, #3 │ │ - b.n cfd2e │ │ + b.n cfd3e │ │ lsls r2, r0, #28 │ │ - b.n cfc1e │ │ + b.n cfc2e │ │ strh r4, [r1, #0] │ │ - b.n cf0fe │ │ + b.n cf10e │ │ strb r0, [r0, #0] │ │ - b.n cfd3a │ │ + b.n cfd4a │ │ lsls r1, r0, #2 │ │ stmia.w sp, {r0, sp} │ │ lsls r0, r0, #12 │ │ movs r0, r0 │ │ - b.n cfd46 │ │ + b.n cfd56 │ │ asrs r5, r0, #32 │ │ - b.n cf94a │ │ + b.n cf95a │ │ adds r0, #1 │ │ - b.n cfc16 │ │ + b.n cfc26 │ │ movs r4, #235 @ 0xeb │ │ add.w r0, r0, r1 │ │ - b.n cfcf6 │ │ + b.n cfd06 │ │ movs r0, r0 │ │ - b.n cf122 │ │ + b.n cf132 │ │ movs r2, r4 │ │ lsrs r0, r0, #8 │ │ asrs r5, r0, #32 │ │ - b.n cf962 │ │ + b.n cf972 │ │ movs r0, #10 │ │ - b.n cfd66 │ │ + b.n cfd76 │ │ str r0, [r0, r0] │ │ - b.n cf13c │ │ + b.n cf14c │ │ movs r5, #28 │ │ add.w r0, r0, r0 │ │ - b.n cfcd2 │ │ + b.n cfce2 │ │ movs r7, r3 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n cf162 │ │ + b.n cf172 │ │ movs r0, #15 │ │ - b.n cfd7e │ │ + b.n cfd8e │ │ asrs r0, r1, #32 │ │ - b.n cf16a │ │ + b.n cf17a │ │ movs r5, #22 │ │ add.w r0, r0, r0 │ │ - b.n cfd8a │ │ - beq.n cf684 │ │ - b.n cfae4 │ │ + b.n cfd9a │ │ + beq.n cf694 │ │ + b.n cfaf4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, sp} │ │ - b.n cf18c │ │ + b.n cf19c │ │ lsls r1, r7, #1 │ │ - b.n cfcfa │ │ + b.n cfd0a │ │ movs r1, r3 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n cfd42 │ │ + b.n cfd52 │ │ @ instruction: 0xffc91aff │ │ lsls r4, r4, #2 │ │ - b.n cf1a8 │ │ + b.n cf1b8 │ │ movs r0, r0 │ │ - b.n cf78c │ │ + b.n cf79c │ │ asrs r2, r3, #1 │ │ - b.n cf212 │ │ + b.n cf222 │ │ lsls r1, r7, #1 │ │ - b.n cfdb6 │ │ + b.n cfdc6 │ │ movs r0, r0 │ │ - b.n cfd1c │ │ + b.n cfd2c │ │ @ instruction: 0xffc30aff │ │ asrs r0, r2, #2 │ │ - b.n cf1c0 │ │ + b.n cf1d0 │ │ movs r1, r0 │ │ - b.n cfdc6 │ │ + b.n cfdd6 │ │ adds r0, #140 @ 0x8c │ │ - b.n cf1c8 │ │ + b.n cf1d8 │ │ asrs r1, r0, #32 │ │ - b.n cf7ac │ │ + b.n cf7bc │ │ movs r0, #0 │ │ - b.n cf1ac │ │ + b.n cf1bc │ │ adds r0, #3 │ │ - b.n cf7b4 │ │ + b.n cf7c4 │ │ cmp r0, #26 │ │ - b.n cfc9a │ │ - cmp r6, #226 @ 0xe2 │ │ + b.n cfcaa │ │ + cmp r6, #225 @ 0xe1 │ │ @ instruction: 0xebff0079 │ │ - b.n cfde2 │ │ - beq.n cf6dc │ │ - b.n cfb3c │ │ + b.n cfdf2 │ │ + beq.n cf6ec │ │ + b.n cfb4c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, ip, sp, lr} │ │ - b.n cf1b6 │ │ + b.n cf1c6 │ │ strb r4, [r1, #0] │ │ - b.n cf1ba │ │ + b.n cf1ca │ │ strb r0, [r0, #0] │ │ - b.n cf1be │ │ + b.n cf1ce │ │ movs r4, #101 @ 0x65 │ │ add.w r0, r0, r0 │ │ - b.n cf1de │ │ - beq.n cf6f8 │ │ - b.n cfb58 │ │ + b.n cf1ee │ │ + beq.n cf708 │ │ + b.n cfb68 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r6} │ │ - b.n cf208 │ │ + b.n cf218 │ │ movs r0, r0 │ │ - b.n cf7ec │ │ + b.n cf7fc │ │ asrs r2, r3, #1 │ │ - b.n cf272 │ │ + b.n cf282 │ │ lsls r1, r7, #1 │ │ - b.n cfe16 │ │ + b.n cfe26 │ │ movs r0, r0 │ │ - b.n cfd7c │ │ + b.n cfd8c │ │ @ instruction: 0xffab0aff │ │ asrs r4, r7, #32 │ │ - b.n cf220 │ │ + b.n cf230 │ │ movs r1, r0 │ │ - b.n cfe26 │ │ + b.n cfe36 │ │ adds r0, #56 @ 0x38 │ │ - b.n cf228 │ │ + b.n cf238 │ │ str r0, [r7, r0] │ │ - b.n cf22c │ │ + b.n cf23c │ │ asrs r1, r0, #32 │ │ - b.n cf810 │ │ + b.n cf820 │ │ adds r0, #3 │ │ - b.n cf814 │ │ + b.n cf824 │ │ str r5, [r0, r0] │ │ - b.n cf818 │ │ + b.n cf828 │ │ movs r4, r4 │ │ stmia.w sp, {r1, r2, r3, r4, fp, sp} │ │ - b.n cfd02 │ │ - cmp r6, #200 @ 0xc8 │ │ + b.n cfd12 │ │ + cmp r6, #199 @ 0xc7 │ │ @ instruction: 0xebff0079 │ │ - b.n cfe4a │ │ - beq.n cf744 │ │ - b.n cfba4 │ │ - ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r5, r6, r7, r8, ip, sp, lr, pc} │ │ - movs r0, r0 │ │ - @ instruction: 0xb7b1 │ │ - vqshlu.s64 d16, d15, #51 @ 0x33 │ │ - vaddw.u , q10, d0 │ │ - movs r0, r0 │ │ - @ instruction: 0xb74d │ │ - vdup.8 , d7[1] │ │ - @ instruction: 0xfff3d347 │ │ + b.n cfe5a │ │ + beq.n cf754 │ │ + b.n cfbb4 │ │ + ldrh r0, [r6, #62] @ 0x3e │ │ + ldmia.w sp!, {r4, r5, r6, r7, r8, ip, sp, lr, pc} │ │ + movs r0, r0 │ │ + @ instruction: 0xb6e0 │ │ + vqshlu.s64 q8, , #51 @ 0x33 │ │ + vsra.u64 d31, d0, #12 │ │ + movs r0, r0 │ │ + @ instruction: 0xb67c │ │ + vqrdmulh.s , , d29[0] │ │ + vrsra.u32 , q6, #13 │ │ vqshrun.s64 d20, q8, #13 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n cfc50 │ │ - beq.n cf748 │ │ - b.n cfbd4 │ │ + b.n cfc60 │ │ + beq.n cf758 │ │ + b.n cfbe4 │ │ movs r0, r0 │ │ - b.n cfde0 │ │ + b.n cfdf0 │ │ str r0, [r0, r0] │ │ - b.n cfe82 │ │ + b.n cfe92 │ │ movs r1, r0 │ │ lsls r2, r6, #13 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r5, r0 │ │ - b.n cfa8e │ │ - beq.n cf760 │ │ - b.n cfbe8 │ │ + b.n cfa9e │ │ + beq.n cf770 │ │ + b.n cfbf8 │ │ ldrh r0, [r6, #0] │ │ ldmia.w sp!, {lr} │ │ - b.n cfa9a │ │ + b.n cfaaa │ │ movs r4, r0 │ │ - b.n cfc78 │ │ + b.n cfc88 │ │ movs r5, #191 @ 0xbf │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n cfaa6 │ │ + b.n cfab6 │ │ movs r0, r0 │ │ - b.n cfe0a │ │ + b.n cfe1a │ │ @ instruction: 0xfff61aff │ │ movs r4, r0 │ │ - b.n cfc8c │ │ + b.n cfc9c │ │ asrs r1, r0, #32 │ │ - b.n cfeb6 │ │ + b.n cfec6 │ │ movs r5, #189 @ 0xbd │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n cfabe │ │ + b.n cface │ │ movs r0, r0 │ │ - b.n cfe22 │ │ + b.n cfe32 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n cfca4 │ │ + b.n cfcb4 │ │ movs r5, #188 @ 0xbc │ │ @ instruction: 0xeb00ffed │ │ @ instruction: 0xeaff0004 │ │ - b.n cfcb0 │ │ + b.n cfcc0 │ │ asrs r2, r0, #32 │ │ - b.n cfeda │ │ + b.n cfeea │ │ movs r5, #188 @ 0xbc │ │ add.w r0, r0, pc, lsr #1 │ │ - b.n cfe42 │ │ + b.n cfe52 │ │ str r0, [r0, r0] │ │ asrs r0, r4, #6 │ │ movs r0, r0 │ │ asrs r0, r2, #13 │ │ @ instruction: 0xfff51aff │ │ movs r0, r6 │ │ - b.n cf2da │ │ + b.n cf2ea │ │ asrs r4, r0, #32 │ │ - b.n cfcd0 │ │ + b.n cfce0 │ │ lsrs r7, r0, #20 │ │ - b.n cfcba │ │ + b.n cfcca │ │ movs r4, #220 @ 0xdc │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n cfb02 │ │ + b.n cfb12 │ │ movs r0, r0 │ │ - b.n cfe66 │ │ + b.n cfe76 │ │ @ instruction: 0xffee1aff │ │ movs r0, r6 │ │ - b.n cf2f6 │ │ + b.n cf306 │ │ asrs r4, r0, #32 │ │ - b.n cfcec │ │ + b.n cfcfc │ │ lsrs r5, r0, #20 │ │ - b.n cfcd6 │ │ + b.n cfce6 │ │ movs r4, #213 @ 0xd5 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n cfb1e │ │ + b.n cfb2e │ │ @ instruction: 0xffe8eaff │ │ - ldr r7, [pc, #960] @ (cfba4 ) │ │ + ldr r7, [pc, #960] @ (cfbb4 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n cfd04 │ │ - beq.n cf824 │ │ - b.n cfc88 │ │ - add r0, pc, #8 @ (adr r0, cf7f8 ) │ │ - b.n cfb32 │ │ + b.n cfd14 │ │ + beq.n cf834 │ │ + b.n cfc98 │ │ + add r0, pc, #8 @ (adr r0, cf808 ) │ │ + b.n cfb42 │ │ str r1, [r0, #0] │ │ - b.n cfb36 │ │ + b.n cfb46 │ │ strb r0, [r0, #0] │ │ - b.n cfb3a │ │ + b.n cfb4a │ │ str r1, [r1, r0] │ │ - b.n cff3e │ │ + b.n cff4e │ │ str r0, [sp, #0] │ │ - b.n cff42 │ │ + b.n cff52 │ │ adds r0, #8 │ │ - b.n cf320 │ │ + b.n cf330 │ │ movs r1, r0 │ │ and.w r2, r0, r8 │ │ - b.n cfe18 │ │ + b.n cfe28 │ │ movs r5, #163 @ 0xa3 │ │ add.w r1, r0, r8, asr #2 │ │ - b.n cf354 │ │ + b.n cf364 │ │ str r4, [r0, r0] │ │ - b.n cf334 │ │ + b.n cf344 │ │ movs r0, r0 │ │ - b.n cf93c │ │ + b.n cf94c │ │ strh r0, [r4, #0] │ │ - b.n cf342 │ │ + b.n cf352 │ │ movs r4, r4 │ │ - b.n cfcb6 │ │ + b.n cfcc6 │ │ movs r2, r0 │ │ - b.n cfeca │ │ + b.n cfeda │ │ movs r6, r3 │ │ ldrh r0, [r0, #16] │ │ movs r0, r1 │ │ - b.n cf36c │ │ + b.n cf37c │ │ movs r0, #12 │ │ - b.n cfd50 │ │ + b.n cfd60 │ │ movs r4, r2 │ │ - b.n cf354 │ │ + b.n cf364 │ │ movs r7, r0 │ │ - b.n cfb7e │ │ + b.n cfb8e │ │ asrs r0, r1, #32 │ │ - b.n cfb82 │ │ + b.n cfb92 │ │ str r0, [sp, #96] @ 0x60 │ │ - b.n cf360 │ │ - add r0, pc, #64 @ (adr r0, cf888 ) │ │ - b.n cf364 │ │ + b.n cf370 │ │ + add r0, pc, #64 @ (adr r0, cf898 ) │ │ + b.n cf374 │ │ str r0, [sp, #760] @ 0x2f8 │ │ - b.n cfbe8 │ │ + b.n cfbf8 │ │ str r4, [r7, #8] │ │ - b.n cfbec │ │ + b.n cfbfc │ │ movs r4, #170 @ 0xaa │ │ add.w r0, r0, r1 │ │ - b.n cff3a │ │ + b.n cff4a │ │ movs r0, r7 │ │ subs r0, r0, r0 │ │ movs r3, #251 @ 0xfb │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n cf386 │ │ + b.n cf396 │ │ movs r5, r4 │ │ - b.n cff12 │ │ + b.n cff22 │ │ movs r3, r0 │ │ ldmia r2!, {} │ │ movs r1, r0 │ │ - b.n cff5a │ │ + b.n cff6a │ │ movs r6, r2 │ │ asrs r4, r2, #13 │ │ movs r5, r1 │ │ lsrs r0, r0, #8 │ │ movs r2, r0 │ │ and.w r0, r0, pc, lsr #1 │ │ - b.n cff2a │ │ + b.n cff3a │ │ movs r6, r4 │ │ asrs r4, r2, #13 │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n cff36 │ │ + b.n cff46 │ │ movs r6, r6 │ │ subs r0, r0, r0 │ │ lsls r4, r5, #4 │ │ - b.n cf3d4 │ │ + b.n cf3e4 │ │ movs r0, r0 │ │ - b.n cf9b8 │ │ + b.n cf9c8 │ │ movs r4, r4 │ │ - b.n cf3be │ │ + b.n cf3ce │ │ movs r0, r0 │ │ - b.n cfb52 │ │ + b.n cfb62 │ │ @ instruction: 0xffe11aff │ │ movs r0, r6 │ │ and.w r0, r0, r8, lsl #20 │ │ - b.n cfbee │ │ + b.n cfbfe │ │ movs r4, r1 │ │ and.w r1, r0, r0, lsr #32 │ │ - b.n cf3f4 │ │ + b.n cf404 │ │ asrs r6, r0, #32 │ │ - b.n cfffa │ │ + b.n d000a │ │ movs r6, r4 │ │ - b.n cff6e │ │ + b.n cff7e │ │ str r5, [r0, r0] │ │ - b.n d0002 │ │ + b.n d0012 │ │ movs r0, r0 │ │ - b.n cf9e4 │ │ + b.n cf9f4 │ │ str r7, [r0, r0] │ │ lsls r0, r0, #12 │ │ movs r5, r4 │ │ - b.n cff7e │ │ + b.n cff8e │ │ asrs r0, r4, #32 │ │ - b.n cf3d2 │ │ + b.n cf3e2 │ │ asrs r7, r0, #32 │ │ - b.n d0016 │ │ + b.n d0026 │ │ asrs r4, r4, #32 │ │ - b.n cf3da │ │ + b.n cf3ea │ │ asrs r5, r0, #32 │ │ - b.n d001e │ │ + b.n d002e │ │ str r6, [r0, r0] │ │ lsls r0, r0, #12 │ │ asrs r0, r5, #32 │ │ - b.n cf3e6 │ │ + b.n cf3f6 │ │ movs r0, r1 │ │ - b.n cf424 │ │ + b.n cf434 │ │ movs r0, #12 │ │ - b.n cfe08 │ │ + b.n cfe18 │ │ movs r4, r2 │ │ - b.n cf40c │ │ + b.n cf41c │ │ movs r7, r0 │ │ - b.n cfc36 │ │ + b.n cfc46 │ │ asrs r5, r0, #32 │ │ - b.n cfc3a │ │ + b.n cfc4a │ │ str r0, [sp, #96] @ 0x60 │ │ - b.n cf418 │ │ - add r0, pc, #64 @ (adr r0, cf940 ) │ │ - b.n cf41c │ │ + b.n cf428 │ │ + add r0, pc, #64 @ (adr r0, cf950 ) │ │ + b.n cf42c │ │ str r0, [sp, #760] @ 0x2f8 │ │ - b.n cfca0 │ │ + b.n cfcb0 │ │ str r4, [r7, #8] │ │ - b.n cfca4 │ │ + b.n cfcb4 │ │ movs r4, #124 @ 0x7c │ │ add.w r0, r0, r1 │ │ - b.n cfff2 │ │ + b.n d0002 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ movs r3, #205 @ 0xcd │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n cf43e │ │ + b.n cf44e │ │ movs r4, r0 │ │ - b.n cffca │ │ + b.n cffda │ │ movs r1, r2 │ │ subs r0, r0, r0 │ │ lsls r4, r4, #2 │ │ - b.n cf468 │ │ + b.n cf478 │ │ movs r0, r0 │ │ - b.n cfa4c │ │ + b.n cfa5c │ │ movs r4, r4 │ │ - b.n cf452 │ │ + b.n cf462 │ │ movs r0, r0 │ │ - b.n cfbe0 │ │ + b.n cfbf0 │ │ @ instruction: 0xffea1aff │ │ movs r3, r1 │ │ @ instruction: 0xea008005 │ │ - b.n cfc82 │ │ + b.n cfc92 │ │ lsls r4, r7, #2 │ │ - b.n cfd00 │ │ + b.n cfd10 │ │ asrs r0, r0, #2 │ │ - b.n cf488 │ │ + b.n cf498 │ │ movs r2, r0 │ │ - b.n cfdee │ │ + b.n cfdfe │ │ asrs r1, r0, #32 │ │ - b.n cfa70 │ │ + b.n cfa80 │ │ movs r1, r0 │ │ asrs r0, r0, #12 │ │ asrs r0, r5, #32 │ │ - b.n cf47c │ │ + b.n cf48c │ │ asrs r1, r0, #32 │ │ - b.n cf9ee │ │ + b.n cf9fe │ │ subs r1, r2, #4 │ │ - b.n cfc40 │ │ + b.n cfc50 │ │ asrs r1, r4, #10 │ │ - b.n cfca6 │ │ + b.n cfcb6 │ │ movs r0, r0 │ │ - b.n cf96c │ │ + b.n cf97c │ │ ands r0, r0 │ │ - b.n cfe2e │ │ + b.n cfe3e │ │ adds r0, #4 │ │ - b.n cf4ac │ │ + b.n cf4bc │ │ movs r3, r1 │ │ - b.n cfdfe │ │ + b.n cfe0e │ │ movs r0, r3 │ │ - b.n d001a │ │ + b.n d002a │ │ movs r5, r1 │ │ ldrh r0, [r0, #16] │ │ asrs r5, r4, #32 │ │ - b.n cff82 │ │ + b.n cff92 │ │ movs r0, #1 │ │ - b.n d00c6 │ │ + b.n d00d6 │ │ asrs r0, r0, #4 │ │ - b.n d000a │ │ + b.n d001a │ │ movs r2, r2 │ │ - b.n cfbb0 │ │ + b.n cfbc0 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r2, r0 │ │ - b.n d003c │ │ + b.n d004c │ │ movs r6, r0 │ │ subs r2, #0 │ │ movs r2, r0 │ │ - b.n d00a4 │ │ + b.n d00b4 │ │ str r1, [r0, r0] │ │ - b.n cfe28 │ │ + b.n cfe38 │ │ movs r6, r0 │ │ - b.n d0046 │ │ + b.n d0056 │ │ @ instruction: 0xff970aff │ │ movs r3, #152 @ 0x98 │ │ add.w r0, r0, r0 │ │ - b.n d0052 │ │ + b.n d0062 │ │ @ instruction: 0xff960aff │ │ movs r4, r0 │ │ - b.n cfcfa │ │ - beq.n cf9f4 │ │ - b.n cfe54 │ │ - ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r4, r5, ip, sp, lr, pc} │ │ - movs r0, r0 │ │ - vext.8 d0, d4, d0, #0 │ │ - vaddl.s8 q0, d8, d0 │ │ - cdp 0, 15, cr0, cr12, cr0, {0} │ │ - vhadd.s32 d0, d0, d0 │ │ - ldr r7, [pc, #960] @ (cfd98 ) │ │ + b.n cfd0a │ │ + beq.n cfa04 │ │ + b.n cfe64 │ │ + ldrh r0, [r6, #62] @ 0x3e │ │ + ldmia.w sp!, {r6, ip, sp, lr, pc} │ │ + movs r0, r0 │ │ + vaddl.s8 q8, d4, d0 │ │ + vaddl.s16 q0, d8, d0 │ │ + vhadd.s8 d0, d12, d0 │ │ + vhadd.s d0, d0, d0 │ │ + ldr r7, [pc, #960] @ (cfda8 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n cfef8 │ │ - beq.n cfa08 │ │ - b.n cfe7c │ │ - add r0, pc, #960 @ (adr r0, cfda4 ) │ │ - b.n cf524 │ │ + b.n cff08 │ │ + beq.n cfa18 │ │ + b.n cfe8c │ │ + add r0, pc, #960 @ (adr r0, cfdb4 ) │ │ + b.n cf534 │ │ str r3, [r0, r0] │ │ - b.n cfd2a │ │ + b.n cfd3a │ │ str r2, [r0, #0] │ │ - b.n cfd2e │ │ + b.n cfd3e │ │ ands r1, r0 │ │ - b.n cfd32 │ │ - add r0, pc, #40 @ (adr r0, cfa1c ) │ │ - b.n cfb14 │ │ + b.n cfd42 │ │ + add r0, pc, #40 @ (adr r0, cfa2c ) │ │ + b.n cfb24 │ │ strb r0, [r0, #0] │ │ - b.n cfd3a │ │ + b.n cfd4a │ │ str r0, [sp, #0] │ │ - b.n d013e │ │ + b.n d014e │ │ strh r4, [r4, #0] │ │ - b.n cfe8a │ │ + b.n cfe9a │ │ movs r0, r1 │ │ - b.n cf53c │ │ + b.n cf54c │ │ movs r0, #4 │ │ - b.n cff24 │ │ + b.n cff34 │ │ movs r4, r1 │ │ - b.n cf528 │ │ + b.n cf538 │ │ movs r7, r0 │ │ - b.n cfd52 │ │ + b.n cfd62 │ │ asrs r4, r0, #32 │ │ - b.n cfd56 │ │ + b.n cfd66 │ │ str r0, [sp, #64] @ 0x40 │ │ - b.n cf534 │ │ + b.n cf544 │ │ str r0, [r1, r0] │ │ - b.n cf538 │ │ + b.n cf548 │ │ str r0, [sp, #728] @ 0x2d8 │ │ - b.n cfdbc │ │ + b.n cfdcc │ │ str r4, [r6, #8] │ │ - b.n cfdc0 │ │ + b.n cfdd0 │ │ movs r4, #53 @ 0x35 │ │ add.w r0, r0, r1 │ │ - b.n d010e │ │ + b.n d011e │ │ movs r6, r3 │ │ subs r0, r0, r0 │ │ movs r3, #134 @ 0x86 │ │ add.w r0, r0, r0 │ │ - b.n cf55a │ │ + b.n cf56a │ │ movs r5, r4 │ │ - b.n d00de │ │ + b.n d00ee │ │ movs r3, r0 │ │ ldmia r2!, {} │ │ movs r1, r0 │ │ - b.n d0126 │ │ + b.n d0136 │ │ movs r6, r2 │ │ asrs r0, r2, #13 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ and.w r0, r0, pc, lsr #1 │ │ - b.n d00f6 │ │ + b.n d0106 │ │ movs r6, r4 │ │ asrs r0, r2, #13 │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ movs r2, r0 │ │ - b.n d0112 │ │ + b.n d0122 │ │ movs r5, r0 │ │ ldr r2, [sp, #0] │ │ movs r4, r0 │ │ - b.n d010a │ │ + b.n d011a │ │ movs r0, r3 │ │ subs r0, r0, r0 │ │ asrs r4, r4, #32 │ │ - b.n cf5a6 │ │ + b.n cf5b6 │ │ movs r1, r0 │ │ - b.n cfd1e │ │ + b.n cfd2e │ │ @ instruction: 0xffe11aff │ │ movs r4, r2 │ │ and.w r0, r0, r6 │ │ - b.n d01c2 │ │ + b.n d01d2 │ │ movs r6, r4 │ │ - b.n d012e │ │ + b.n d013e │ │ movs r0, r4 │ │ - b.n cf59e │ │ + b.n cf5ae │ │ movs r7, r0 │ │ - b.n d01ce │ │ + b.n d01de │ │ movs r4, r4 │ │ - b.n cf5a6 │ │ + b.n cf5b6 │ │ movs r5, r0 │ │ - b.n d01d6 │ │ + b.n d01e6 │ │ movs r0, r5 │ │ - b.n cf5ae │ │ + b.n cf5be │ │ movs r7, r0 │ │ lsls r0, r0, #12 │ │ movs r5, r4 │ │ - b.n d014a │ │ + b.n d015a │ │ movs r6, r0 │ │ lsls r0, r0, #12 │ │ ands r0, r0 │ │ - b.n cfdea │ │ + b.n cfdfa │ │ @ instruction: 0xffd3eaff │ │ asrs r0, r5, #32 │ │ - b.n cf5e6 │ │ + b.n cf5f6 │ │ lsls r4, r6, #2 │ │ - b.n cfe70 │ │ + b.n cfe80 │ │ asrs r1, r0, #32 │ │ - b.n cfb42 │ │ + b.n cfb52 │ │ movs r2, r0 │ │ - b.n cff5e │ │ + b.n cff6e │ │ subs r1, r2, #4 │ │ - b.n cfda0 │ │ + b.n cfdb0 │ │ movs r1, r0 │ │ asrs r0, r0, #12 │ │ asrs r1, r4, #10 │ │ - b.n cfe0a │ │ + b.n cfe1a │ │ movs r0, r0 │ │ - b.n cfad0 │ │ + b.n cfae0 │ │ movs r0, r0 │ │ - b.n cff92 │ │ - beq.n cfb0c │ │ - b.n cff6c │ │ + b.n cffa2 │ │ + beq.n cfb1c │ │ + b.n cff7c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r3, r4, r6, r9, sl, fp, sp, lr, pc} │ │ + ldmia.w sp!, {r3, r5, r6, r9, sl, fp, sp, lr, pc} │ │ movs r0, r0 │ │ - ldr r0, [pc, #960] @ (cfea0 ) │ │ + ldr r0, [pc, #960] @ (cfeb0 ) │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n d0000 │ │ - beq.n cfbd8 │ │ - b.n cff84 │ │ + b.n d0010 │ │ + beq.n cfbe8 │ │ + b.n cff94 │ │ str r0, [r0, r0] │ │ - b.n cfe2e │ │ + b.n cfe3e │ │ ands r0, r2 │ │ - b.n d000c │ │ + b.n d001c │ │ movs r4, r2 │ │ - b.n cf616 │ │ + b.n cf626 │ │ asrs r4, r0, #32 │ │ - b.n cfe3a │ │ + b.n cfe4a │ │ movs r3, #160 @ 0xa0 │ │ add.w r0, r0, r0 │ │ - b.n d01a2 │ │ + b.n d01b2 │ │ movs r3, r2 │ │ lsrs r0, r0, #8 │ │ movs r3, #81 @ 0x51 │ │ add.w r1, r0, r0, asr #7 │ │ - b.n cf64c │ │ + b.n cf65c │ │ str r0, [r0, r0] │ │ - b.n cf632 │ │ + b.n cf642 │ │ asrs r1, r0, #32 │ │ - b.n cfc34 │ │ + b.n cfc44 │ │ lsls r2, r3, #1 │ │ - b.n cf6bc │ │ + b.n cf6cc │ │ movs r0, r0 │ │ - b.n d01be │ │ + b.n d01ce │ │ movs r0, r6 │ │ lsrs r0, r0, #8 │ │ asrs r4, r1, #7 │ │ - b.n cf664 │ │ + b.n cf674 │ │ movs r1, r0 │ │ - b.n d026a │ │ + b.n d027a │ │ adds r1, #200 @ 0xc8 │ │ - b.n cf66c │ │ + b.n cf67c │ │ movs r0, #232 @ 0xe8 │ │ - b.n d0272 │ │ + b.n d0282 │ │ rors r4, r0 │ │ - b.n cf674 │ │ + b.n cf684 │ │ asrs r1, r0, #32 │ │ - b.n cfc58 │ │ + b.n cfc68 │ │ adds r0, #3 │ │ - b.n cfc5c │ │ + b.n cfc6c │ │ ands r4, r0 │ │ - b.n cfc60 │ │ + b.n cfc70 │ │ lsrs r0, r6 │ │ - b.n cfee0 │ │ - cmp r5, #183 @ 0xb7 │ │ + b.n cfef0 │ │ + cmp r5, #182 @ 0xb6 │ │ @ instruction: 0xebff0005 │ │ - b.n cfe8e │ │ - beq.n cfb70 │ │ - b.n cffe8 │ │ + b.n cfe9e │ │ + beq.n cfb80 │ │ + b.n cfff8 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r5, ip} │ │ - b.n cf694 │ │ + b.n cf6a4 │ │ movs r4, r4 │ │ - b.n cf698 │ │ + b.n cf6a8 │ │ subs r7, r1, r0 │ │ - b.n cff64 │ │ + b.n cff74 │ │ lsrs r2, r0, #4 │ │ - b.n d0208 │ │ + b.n d0218 │ │ movs r0, r3 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n d020e │ │ + b.n d021e │ │ movs r6, r2 │ │ lsrs r0, r0, #8 │ │ movs r4, r6 │ │ - b.n cf6a0 │ │ + b.n cf6b0 │ │ asrs r4, r0, #32 │ │ - b.n cfeba │ │ + b.n cfeca │ │ str r0, [r0, #4] │ │ - b.n cf6b8 │ │ + b.n cf6c8 │ │ strb r4, [r0, #1] │ │ - b.n cf6bc │ │ + b.n cf6cc │ │ movs r3, #126 @ 0x7e │ │ add.w r0, r0, r0 │ │ - b.n d022a │ │ + b.n d023a │ │ movs r0, r3 │ │ lsrs r0, r0, #8 │ │ movs r3, #47 @ 0x2f │ │ add.w r1, r0, r0, lsl #6 │ │ - b.n cf6d4 │ │ + b.n cf6e4 │ │ str r0, [r0, r0] │ │ - b.n cf6ba │ │ + b.n cf6ca │ │ asrs r1, r0, #32 │ │ - b.n cfcbc │ │ + b.n cfccc │ │ lsls r2, r3, #1 │ │ - b.n cf744 │ │ + b.n cf754 │ │ movs r0, r0 │ │ - b.n d0246 │ │ + b.n d0256 │ │ movs r6, r1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r5, #5 │ │ - b.n cf6ec │ │ + b.n cf6fc │ │ movs r1, r0 │ │ - b.n d02f2 │ │ + b.n d0302 │ │ adds r1, #104 @ 0x68 │ │ - b.n cf6f4 │ │ + b.n cf704 │ │ movs r0, #255 @ 0xff │ │ - b.n d02fa │ │ + b.n d030a │ │ adcs r4, r4 │ │ - b.n cf6fc │ │ + b.n cf70c │ │ asrs r1, r0, #32 │ │ - b.n cfce0 │ │ + b.n cfcf0 │ │ adds r0, #3 │ │ - b.n cfce4 │ │ + b.n cfcf4 │ │ ands r4, r0 │ │ - b.n cfce8 │ │ + b.n cfcf8 │ │ @ instruction: 0xffdceaff │ │ asrs r4, r5, #4 │ │ - b.n cf710 │ │ + b.n cf720 │ │ str r5, [r1, r1] │ │ - b.n d0316 │ │ + b.n d0326 │ │ asrs r1, r0, #32 │ │ - b.n cfcf8 │ │ + b.n cfd08 │ │ asrs r2, r3, #1 │ │ - b.n cf780 │ │ + b.n cf790 │ │ movs r0, r0 │ │ - b.n d0284 │ │ + b.n d0294 │ │ movs r6, r5 │ │ subs r0, r0, r0 │ │ movs r5, r0 │ │ - b.n cff2a │ │ - beq.n cfc0c │ │ - b.n d0084 │ │ + b.n cff3a │ │ + beq.n cfc1c │ │ + b.n d0094 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r5, ip} │ │ - b.n cf730 │ │ + b.n cf740 │ │ movs r4, r4 │ │ - b.n cf734 │ │ + b.n cf744 │ │ subs r7, r1, r0 │ │ - b.n d0000 │ │ + b.n d0010 │ │ lsrs r2, r0, #4 │ │ - b.n d02a4 │ │ + b.n d02b4 │ │ movs r0, r2 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n d02aa │ │ + b.n d02ba │ │ movs r6, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r6 │ │ - b.n d011a │ │ + b.n d012a │ │ cmp r4, #3 │ │ - b.n d00c2 │ │ + b.n d00d2 │ │ movs r0, #0 │ │ - b.n d01c8 │ │ + b.n d01d8 │ │ asrs r0, r0, #32 │ │ - b.n d035e │ │ + b.n d036e │ │ movs r1, r1 │ │ ldmia.w r0, {sp} │ │ - b.n d0366 │ │ + b.n d0376 │ │ movs r0, #1 │ │ - cbz r0, cfc6a │ │ + cbz r0, cfc7a │ │ lsrs r2, r4, #24 │ │ - b.n d00ce │ │ + b.n d00de │ │ movs r0, r0 │ │ - b.n d01d8 │ │ + b.n d01e8 │ │ asrs r1, r0, #32 │ │ - cbz r0, cfc76 │ │ + cbz r0, cfc86 │ │ movs r2, r0 │ │ - b.n cff3c │ │ + b.n cff4c │ │ str r0, [r0, r0] │ │ - b.n d00fe │ │ + b.n d010e │ │ movs r5, r0 │ │ - b.n cff82 │ │ - beq.n cfc64 │ │ - b.n d00dc │ │ + b.n cff92 │ │ + beq.n cfc74 │ │ + b.n d00ec │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r3, r4, r6, r7, ip} │ │ - b.n cf78c │ │ + b.n cf79c │ │ str r5, [r1, r1] │ │ - b.n d0392 │ │ + b.n d03a2 │ │ asrs r1, r0, #32 │ │ - b.n cfd74 │ │ + b.n cfd84 │ │ asrs r2, r3, #1 │ │ - b.n cf7fc │ │ + b.n cf80c │ │ movs r0, r0 │ │ - b.n d0300 │ │ + b.n d0310 │ │ @ instruction: 0xffe00aff │ │ movs r0, #196 @ 0xc4 │ │ - b.n cf7a4 │ │ + b.n cf7b4 │ │ movs r0, r0 │ │ - b.n d030a │ │ + b.n d031a │ │ asrs r0, r0, #3 │ │ - b.n cf7ac │ │ + b.n cf7bc │ │ movs r1, r0 │ │ - b.n d03b2 │ │ + b.n d03c2 │ │ adds r0, #188 @ 0xbc │ │ - b.n cf7b4 │ │ + b.n cf7c4 │ │ movs r0, #2 │ │ - b.n cfd98 │ │ + b.n cfda8 │ │ strb r0, [r7, #2] │ │ - b.n cf7bc │ │ + b.n cf7cc │ │ asrs r1, r0, #32 │ │ - b.n cfda0 │ │ + b.n cfdb0 │ │ str r4, [r6, #8] │ │ - b.n cf7c4 │ │ + b.n cf7d4 │ │ adds r0, #3 │ │ - b.n cfda8 │ │ + b.n cfdb8 │ │ strb r7, [r0, #0] │ │ - b.n cfdac │ │ + b.n cfdbc │ │ str r0, [r1, r0] │ │ - b.n cf7ac │ │ + b.n cf7bc │ │ strb r2, [r0, #0] │ │ lsls r0, r4, #6 │ │ str r6, [r0, #0] │ │ - b.n cfdb8 │ │ + b.n cfdc8 │ │ movs r1, #9 │ │ - b.n d029e │ │ + b.n d02ae │ │ movs r6, r1 │ │ and.w r0, r0, ip, lsr #9 │ │ - b.n cf7e4 │ │ + b.n cf7f4 │ │ movs r0, r0 │ │ - b.n d034a │ │ + b.n d035a │ │ asrs r0, r3, #1 │ │ - b.n cf7ec │ │ + b.n cf7fc │ │ movs r1, r0 │ │ - b.n d03f2 │ │ + b.n d0402 │ │ adds r0, #84 @ 0x54 │ │ - b.n cf7f4 │ │ + b.n cf804 │ │ movs r0, #2 │ │ - b.n cfdd8 │ │ + b.n cfde8 │ │ strb r0, [r2, #1] │ │ - b.n cf7fc │ │ + b.n cf80c │ │ asrs r1, r0, #32 │ │ - b.n cfde0 │ │ + b.n cfdf0 │ │ str r4, [r1, #4] │ │ - b.n cf804 │ │ + b.n cf814 │ │ adds r0, #3 │ │ - b.n cfde8 │ │ + b.n cfdf8 │ │ strb r7, [r0, #0] │ │ - b.n cfdec │ │ + b.n cfdfc │ │ str r0, [r1, r0] │ │ - b.n cf7ec │ │ + b.n cf7fc │ │ strb r2, [r0, #0] │ │ lsls r0, r4, #6 │ │ str r6, [r0, #0] │ │ - b.n cfdf8 │ │ + b.n cfe08 │ │ movs r0, #242 @ 0xf2 │ │ - b.n d041e │ │ + b.n d042e │ │ lsls r0, r0, #3 │ │ - stmia.w sp, {r4, r6, r8, sl, fp, sp} │ │ + stmia.w sp, {r0, r1, r2, r3, r6, r8, sl, fp, sp} │ │ @ instruction: 0xebff0005 │ │ - b.n d002a │ │ - beq.n cfd0c │ │ - b.n d0184 │ │ + b.n d003a │ │ + beq.n cfd1c │ │ + b.n d0194 │ │ ldrh r0, [r6, #6] │ │ - ldmia.w sp!, {r3, r4, r5, r8, sl, fp, sp, lr, pc} │ │ + ldmia.w sp!, {r3, r6, r8, sl, fp, sp, lr, pc} │ │ movs r0, r0 │ │ - @ instruction: 0xb857 │ │ - vrsubhn.i d26, , q4 │ │ - vqrdmlsh.s , , d20[0] │ │ - vcvt.f16.u16 q15, q10, #13 │ │ - movs r0, r0 │ │ - bl 447cee │ │ - @ instruction: 0xb6cf │ │ - vqrdmulh.s q14, , d24[0] │ │ - vsli.64 d16, d0, #51 @ 0x33 │ │ - vqrdmlah.s , q2, d12[0] │ │ - @ instruction: 0xfff3ecb0 │ │ + @ instruction: 0xb796 │ │ + vqshlu.s64 q13, , #51 @ 0x33 │ │ + vshr.u32 d28, d9, #13 │ │ + vmull.u q15, d19, d4 │ │ movs r0, r0 │ │ - @ instruction: 0xb7cf │ │ - vabal.u q13, d19, d0 │ │ - @ instruction: 0xfff3bab0 │ │ - @ instruction: 0xfff3ebf8 │ │ - movs r0, r0 │ │ - bl 487d16 │ │ - @ instruction: 0xb70f │ │ - @ instruction: 0xfff3cda8 │ │ - vsli.64 q8, q0, #51 @ 0x33 │ │ - vtbx.8 d27, {d20-d21}, d16 │ │ + bl ffdc6cfe │ │ + @ instruction: 0xb60e │ │ + vcvt.u16.f16 q14, , #13 │ │ + vabal.u q8, d19, d0 │ │ + @ instruction: 0xfff4be81 │ │ + vqdmulh.s q15, , d0[0] │ │ + movs r0, r0 │ │ + @ instruction: 0xb70e │ │ + vqshlu.s32 q13, , #19 │ │ + @ instruction: 0xfff3ba90 │ │ + vdup.8 d30, d8[1] │ │ + movs r0, r0 │ │ + bl ffe06d26 │ │ + @ instruction: 0xb64e │ │ + @ instruction: 0xfff3cdbd │ │ + @ instruction: 0xfff305c0 │ │ + vtbx.8 d27, {d20-d21}, d0 │ │ @ instruction: 0xfff348f0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n d0264 │ │ - beq.n cfd5c │ │ - b.n d01e8 │ │ + b.n d0274 │ │ + beq.n cfd6c │ │ + b.n d01f8 │ │ adds r0, #0 │ │ - b.n cf872 │ │ + b.n cf882 │ │ movs r0, r0 │ │ - b.n d03fc │ │ + b.n d040c │ │ movs r7, r3 │ │ lsrs r0, r0, #8 │ │ stmia r0!, {r2, r5} │ │ - b.n cf884 │ │ - bl 52b85e │ │ + b.n cf894 │ │ + bl 52b86e │ │ strb r0, [r4, #0] │ │ - b.n cf88c │ │ - bl 52b866 │ │ - b.n cfdb4 │ │ - b.n cf894 │ │ - bl 52b86e │ │ + b.n cf89c │ │ + bl 52b876 │ │ + b.n cfdc4 │ │ + b.n cf8a4 │ │ + bl 52b87e │ │ movs r0, #32 │ │ - b.n cf89c │ │ + b.n cf8ac │ │ ands r6, r1 │ │ - b.n cfdd2 │ │ + b.n cfde2 │ │ movs r2, r0 │ │ - b.n cfdcc │ │ + b.n cfddc │ │ movs r4, r0 │ │ - b.n d00a2 │ │ - bl 52b882 │ │ + b.n d00b2 │ │ + bl 52b892 │ │ movs r6, r6 │ │ subs r0, r0, r0 │ │ asrs r0, r0, #2 │ │ stmia.w sp, {r2, r5, ip, sp} │ │ - b.n cf8b4 │ │ - bl 52b892 │ │ + b.n cf8c4 │ │ + bl 52b8a2 │ │ ands r0, r4 │ │ - b.n cf8bc │ │ - bl 52b89a │ │ + b.n cf8cc │ │ + bl 52b8aa │ │ movs r4, r4 │ │ - b.n cf8c4 │ │ - bl 52b8a2 │ │ + b.n cf8d4 │ │ + bl 52b8b2 │ │ movs r0, #32 │ │ - b.n cf8cc │ │ + b.n cf8dc │ │ str r0, [r0, r0] │ │ - b.n cfdf4 │ │ + b.n cfe04 │ │ str r2, [r0, #0] │ │ - b.n cfdfa │ │ + b.n cfe0a │ │ str r5, [r0, #0] │ │ - b.n d00e2 │ │ - bl 52b8b6 │ │ + b.n d00f2 │ │ + bl 52b8c6 │ │ movs r5, r6 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n cfe10 │ │ + b.n cfe20 │ │ asrs r3, r0, #32 │ │ - b.n cfe1e │ │ + b.n cfe2e │ │ movs r1, r0 │ │ - b.n d00ea │ │ + b.n d00fa │ │ movs r0, r0 │ │ - b.n d050e │ │ + b.n d051e │ │ movs r0, r0 │ │ lsls r0, r4, #15 │ │ - beq.n cfdf4 │ │ - b.n d026c │ │ + beq.n cfe04 │ │ + b.n d027c │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {ip, lr} │ │ - b.n d011e │ │ + b.n d012e │ │ movs r0, r0 │ │ - b.n d0522 │ │ + b.n d0532 │ │ movs r4, r0 │ │ - b.n cf900 │ │ + b.n cf910 │ │ ands r1, r0 │ │ - b.n d012a │ │ + b.n d013a │ │ movs r0, r0 │ │ - b.n cf908 │ │ + b.n cf918 │ │ movs r1, r0 │ │ - b.n d0132 │ │ + b.n d0142 │ │ adds r2, r0, #0 │ │ - b.n d0536 │ │ + b.n d0546 │ │ movs r0, #4 │ │ - b.n d053a │ │ + b.n d054a │ │ movs r3, #84 @ 0x54 │ │ add.w r0, r0, r0 │ │ - b.n d04a2 │ │ + b.n d04b2 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ movs r2, #145 @ 0x91 │ │ add.w r0, r0, r0 │ │ - b.n cf92e │ │ + b.n cf93e │ │ movs r0, r0 │ │ - b.n d04b2 │ │ + b.n d04c2 │ │ @ instruction: 0xffee1aff │ │ movs r4, r0 │ │ - b.n cf944 │ │ + b.n cf954 │ │ asrs r5, r1, #32 │ │ - b.n d015e │ │ + b.n d016e │ │ movs r0, #8 │ │ - b.n d0562 │ │ + b.n d0572 │ │ adds r0, #32 │ │ - b.n d0566 │ │ + b.n d0576 │ │ movs r4, #5 │ │ add.w r0, r0, r1 │ │ - b.n d050e │ │ + b.n d051e │ │ movs r6, r0 │ │ - bge.n cfe32 │ │ + bge.n cfe42 │ │ asrs r0, r0, #32 │ │ - b.n d0176 │ │ + b.n d0186 │ │ movs r5, r7 │ │ - b.n d057a │ │ + b.n d058a │ │ movs r0, r1 │ │ - b.n d04e0 │ │ + b.n d04f0 │ │ @ instruction: 0xffe31aff │ │ asrs r0, r0, #2 │ │ ldmia.w sp, {r2, ip} │ │ - b.n d018a │ │ + b.n d019a │ │ @ instruction: 0xffcfeaff │ │ movs r2, #127 @ 0x7f │ │ add.w r0, r0, r0 │ │ - b.n cf976 │ │ + b.n cf986 │ │ movs r0, r0 │ │ - b.n d04fa │ │ + b.n d050a │ │ movs r5, r0 │ │ lsls r0, r0, #12 │ │ - beq.n cfe80 │ │ - b.n d02f8 │ │ + beq.n cfe90 │ │ + b.n d0308 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r0, ip, sp, lr, pc} │ │ - b.n d04aa │ │ + b.n d04ba │ │ stmia r0!, {r1, r2, r3} │ │ - b.n d01ae │ │ + b.n d01be │ │ strb r2, [r0, #0] │ │ - b.n d01b2 │ │ - b.n cfebc │ │ - b.n cf99c │ │ - bl 52b976 │ │ + b.n d01c2 │ │ + b.n cfecc │ │ + b.n cf9ac │ │ + bl 52b986 │ │ movs r0, #32 │ │ - b.n cf9a4 │ │ + b.n cf9b4 │ │ movs r6, r1 │ │ - b.n cfeda │ │ + b.n cfeea │ │ ands r2, r0 │ │ - b.n cfed4 │ │ + b.n cfee4 │ │ movs r0, r0 │ │ - b.n d01b2 │ │ - bl 52b98a │ │ + b.n d01c2 │ │ + bl 52b99a │ │ @ instruction: 0xffbd0aff │ │ @ instruction: 0xfff3eaff │ │ - blx 4d14d8 │ │ + blx 4d14e8 │ │ adds r0, #0 │ │ - b.n d01de │ │ + b.n d01ee │ │ ands r2, r0 │ │ - b.n d01e2 │ │ + b.n d01f2 │ │ movs r4, r4 │ │ - b.n cf9c8 │ │ - bl 52b9a6 │ │ + b.n cf9d8 │ │ + bl 52b9b6 │ │ movs r0, #32 │ │ - b.n cf9d0 │ │ + b.n cf9e0 │ │ str r0, [r0, #0] │ │ - b.n cfef8 │ │ + b.n cff08 │ │ str r2, [r0, r0] │ │ - b.n cfefe │ │ + b.n cff0e │ │ str r6, [r0, #0] │ │ - b.n d01e4 │ │ - bl 52b9ba │ │ + b.n d01f4 │ │ + bl 52b9ca │ │ @ instruction: 0xffbe0aff │ │ @ instruction: 0xfff3eaff │ │ - ldr r7, [pc, #960] @ (d0288 ) │ │ + ldr r7, [pc, #960] @ (d0298 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n d03e8 │ │ - beq.n cfef8 │ │ - b.n d036c │ │ + b.n d03f8 │ │ + beq.n cff08 │ │ + b.n d037c │ │ str r0, [r2, #12] │ │ - b.n d025a │ │ + b.n d026a │ │ str r0, [sp, #8] │ │ - b.n d021a │ │ - ldr r7, [pc, #148] @ (cff70 ) │ │ - b.n d04f8 │ │ + b.n d022a │ │ + ldr r7, [pc, #148] @ (cff80 ) │ │ + b.n d0508 │ │ strb r7, [r0, r0] │ │ - b.n d04fe │ │ + b.n d050e │ │ movs r0, #7 │ │ - b.n d0212 │ │ + b.n d0222 │ │ add r3, sp, #124 @ 0x7c │ │ - b.n d04f2 │ │ + b.n d0502 │ │ cmp r4, #101 @ 0x65 │ │ - b.n d04f0 │ │ + b.n d0500 │ │ strh r0, [r0, #0] │ │ - b.n d0502 │ │ + b.n d0512 │ │ cmp r7, #178 @ 0xb2 │ │ - b.n d0588 │ │ - ldr r6, [pc, #608] @ (d0158 ) │ │ - b.n d057c │ │ + b.n d0598 │ │ + ldr r6, [pc, #608] @ (d0168 ) │ │ + b.n d058c │ │ ldrsb r6, [r7, r0] │ │ - b.n d0590 │ │ - add r7, pc, #424 @ (adr r7, d00a8 ) │ │ - b.n d059c │ │ + b.n d05a0 │ │ + add r7, pc, #424 @ (adr r7, d00b8 ) │ │ + b.n d05ac │ │ strh r3, [r0, #16] │ │ - b.n d0594 │ │ + b.n d05a4 │ │ movs r3, r0 │ │ @ instruction: 0xe98d0046 │ │ subs r0, r0, r0 │ │ ldr r4, [r2, #108] @ 0x6c │ │ - b.n d0526 │ │ + b.n d0536 │ │ str r0, [r1, r0] │ │ - b.n d0256 │ │ + b.n d0266 │ │ str r3, [r1, #36] @ 0x24 │ │ - b.n d05ae │ │ + b.n d05be │ │ strh r2, [r0, #0] │ │ - b.n d025e │ │ + b.n d026e │ │ movs r2, #227 @ 0xe3 │ │ add.w r0, r0, r0, lsl #28 │ │ - b.n d0266 │ │ + b.n d0276 │ │ lsls r0, r7, #8 │ │ - b.n cfa68 │ │ + b.n cfa78 │ │ asrs r4, r1, #32 │ │ - b.n d0448 │ │ + b.n d0458 │ │ movs r0, r0 │ │ - b.n d0050 │ │ + b.n d0060 │ │ movs r4, r5 │ │ - b.n cfa56 │ │ + b.n cfa66 │ │ movs r2, #197 @ 0xc5 │ │ add.w r0, r0, r0 │ │ - b.n d05de │ │ + b.n d05ee │ │ lsls r5, r0, #2 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n cfa80 │ │ + b.n cfa90 │ │ subs r2, #0 │ │ - b.n d0562 │ │ + b.n d0572 │ │ movs r0, #12 │ │ - b.n cfa88 │ │ + b.n cfa98 │ │ subs r3, #154 @ 0x9a │ │ - b.n d05d8 │ │ + b.n d05e8 │ │ subs r0, r0, #7 │ │ - b.n d0296 │ │ + b.n d02a6 │ │ lsls r2, r2, #14 │ │ - b.n d011c │ │ + b.n d012c │ │ movs r3, #123 @ 0x7b │ │ - b.n d0566 │ │ - b.n cff74 │ │ - b.n d02a2 │ │ + b.n d0576 │ │ + b.n cff84 │ │ + b.n d02b2 │ │ cmp r7, #232 @ 0xe8 │ │ - b.n d0604 │ │ - add r0, pc, #24 @ (adr r0, cff80 ) │ │ - b.n d02aa │ │ + b.n d0614 │ │ + add r0, pc, #24 @ (adr r0, cff90 ) │ │ + b.n d02ba │ │ movs r2, #151 @ 0x97 │ │ - b.n d0074 │ │ + b.n d0084 │ │ ldr r7, [r7, #96] @ 0x60 │ │ - b.n d058c │ │ + b.n d059c │ │ str r4, [r2, #0] │ │ - b.n d05f6 │ │ + b.n d0606 │ │ stmia r0!, {r0, r2} │ │ - b.n d02ba │ │ + b.n d02ca │ │ adds r6, #151 @ 0x97 │ │ - b.n cffc4 │ │ + b.n cffd4 │ │ strb r7, [r0, r0] │ │ - b.n d059e │ │ + b.n d05ae │ │ ldrsb r6, [r7, r0] │ │ - b.n d0618 │ │ + b.n d0628 │ │ movs r2, r0 │ │ - b.n d00aa │ │ + b.n d00ba │ │ movs r7, #0 │ │ - b.n d02ce │ │ + b.n d02de │ │ asrs r3, r0, #32 │ │ - b.n d00d4 │ │ + b.n d00e4 │ │ adds r3, #129 @ 0x81 │ │ - b.n d02d6 │ │ + b.n d02e6 │ │ cmp r1, #33 @ 0x21 │ │ - b.n d029e │ │ + b.n d02ae │ │ subs r4, #160 @ 0xa0 │ │ - b.n d02a4 │ │ + b.n d02b4 │ │ str r1, [r0, #112] @ 0x70 │ │ - b.n d02e2 │ │ + b.n d02f2 │ │ movs r0, #2 │ │ - b.n cffec │ │ + b.n cfffc │ │ ldr r0, [r4, #16] │ │ - b.n d02b6 │ │ + b.n d02c6 │ │ movs r0, #0 │ │ - b.n cfff2 │ │ + b.n d0002 │ │ lsls r0, r0, #14 │ │ - b.n d02f2 │ │ + b.n d0302 │ │ lsrs r1, r4, #18 │ │ - b.n d02b6 │ │ + b.n d02c6 │ │ adds r5, #146 @ 0x92 │ │ - b.n d00c8 │ │ + b.n d00d8 │ │ movs r6, r0 │ │ - b.n cfffe │ │ + b.n d000e │ │ movs r1, r0 │ │ - b.n d0002 │ │ + b.n d0012 │ │ ldrb r2, [r2, #10] │ │ - b.n d0014 │ │ - add r7, pc, #0 @ (adr r7, cffc8 ) │ │ - b.n d05ca │ │ + b.n d0024 │ │ + add r7, pc, #0 @ (adr r7, cffd8 ) │ │ + b.n d05da │ │ add r6, sp, #912 @ 0x390 │ │ - b.n d0654 │ │ + b.n d0664 │ │ strb r0, [r2, #22] │ │ - b.n d0014 │ │ + b.n d0024 │ │ ldrb r2, [r2, #18] │ │ - b.n d00e2 │ │ + b.n d00f2 │ │ ldr r2, [r2, #104] @ 0x68 │ │ - b.n d0026 │ │ + b.n d0036 │ │ ldrb r1, [r4, #2] │ │ - b.n d02ec │ │ + b.n d02fc │ │ lsrs r2, r2, #10 │ │ - b.n cffe6 │ │ - add r0, pc, #56 @ (adr r0, d001c ) │ │ - b.n d0326 │ │ + b.n cfff6 │ │ + add r0, pc, #56 @ (adr r0, d002c ) │ │ + b.n d0336 │ │ ldr r0, [r2, #72] @ 0x48 │ │ - b.n d002a │ │ + b.n d003a │ │ ldr r3, [r4, #64] @ 0x40 │ │ - b.n d032e │ │ + b.n d033e │ │ str r1, [r0, #64] @ 0x40 │ │ - b.n d02fe │ │ + b.n d030e │ │ strb r7, [r0, #0] │ │ - b.n d0042 │ │ + b.n d0052 │ │ adds r0, #3 │ │ - b.n d0048 │ │ + b.n d0058 │ │ cmp r4, #33 @ 0x21 │ │ - b.n d0302 │ │ + b.n d0312 │ │ str r3, [r2, #72] @ 0x48 │ │ - b.n d0110 │ │ + b.n d0120 │ │ movs r0, r0 │ │ - b.n d004a │ │ + b.n d005a │ │ movs r1, r0 │ │ - b.n d004a │ │ + b.n d005a │ │ ldrb r3, [r2, #2] │ │ - b.n d0054 │ │ + b.n d0064 │ │ strh r4, [r1, #0] │ │ - b.n d0352 │ │ + b.n d0362 │ │ adds r4, #144 @ 0x90 │ │ - b.n d0056 │ │ + b.n d0066 │ │ subs r6, r4, #0 │ │ - b.n d035a │ │ + b.n d036a │ │ ldrb r0, [r4, #24] │ │ - b.n d005e │ │ + b.n d006e │ │ lsls r0, r0, #8 │ │ - b.n d0324 │ │ + b.n d0334 │ │ str r6, [r0, #0] │ │ - b.n d0066 │ │ + b.n d0076 │ │ str r0, [r6, #12] │ │ - b.n d03bc │ │ + b.n d03cc │ │ movs r2, #176 @ 0xb0 │ │ add.w r3, r0, r1, lsr #6 │ │ - b.n d064a │ │ + b.n d065a │ │ subs r1, #156 @ 0x9c │ │ - b.n d063e │ │ + b.n d064e │ │ asrs r4, r7, #24 │ │ - b.n d06c6 │ │ + b.n d06d6 │ │ adds r0, #27 │ │ - b.n d06be │ │ + b.n d06ce │ │ asrs r0, r2, #6 │ │ - b.n d0146 │ │ + b.n d0156 │ │ movs r3, #144 @ 0x90 │ │ - b.n d0086 │ │ + b.n d0096 │ │ asrs r6, r0, #32 │ │ - b.n d016c │ │ + b.n d017c │ │ ldr r4, [r2, #108] @ 0x6c │ │ - b.n d0662 │ │ + b.n d0672 │ │ str r3, [r1, #36] @ 0x24 │ │ - b.n d06e6 │ │ + b.n d06f6 │ │ movs r7, #1 │ │ - b.n d0396 │ │ + b.n d03a6 │ │ movs r7, r0 │ │ - b.n d019a │ │ + b.n d01aa │ │ adds r3, #128 @ 0x80 │ │ - b.n d039e │ │ + b.n d03ae │ │ cmp r1, #32 │ │ - b.n d0366 │ │ + b.n d0376 │ │ subs r4, #161 @ 0xa1 │ │ - b.n d036c │ │ + b.n d037c │ │ movs r0, #2 │ │ - b.n d00b0 │ │ + b.n d00c0 │ │ movs r0, #1 │ │ - b.n d00b2 │ │ + b.n d00c2 │ │ adds r5, #146 @ 0x92 │ │ - b.n d0180 │ │ + b.n d0190 │ │ strb r2, [r2, #26] │ │ - b.n d00c4 │ │ + b.n d00d4 │ │ str r0, [r0, #112] @ 0x70 │ │ - b.n d03ba │ │ + b.n d03ca │ │ ldr r1, [r4, #16] │ │ - b.n d038a │ │ + b.n d039a │ │ asrs r1, r0, #14 │ │ - b.n d03c2 │ │ + b.n d03d2 │ │ adds r0, r4, #2 │ │ - b.n d0388 │ │ + b.n d0398 │ │ asrs r6, r0, #32 │ │ - b.n d00cc │ │ + b.n d00dc │ │ movs r0, r0 │ │ - b.n d00d0 │ │ + b.n d00e0 │ │ strb r0, [r2, #22] │ │ - b.n d00d4 │ │ + b.n d00e4 │ │ ldrsb r0, [r0, r4] │ │ - b.n d0696 │ │ + b.n d06a6 │ │ ldrsh r4, [r4, r3] │ │ - b.n d0720 │ │ + b.n d0730 │ │ ldrb r2, [r2, #2] │ │ - b.n d01aa │ │ + b.n d01ba │ │ ldr r2, [r2, #40] @ 0x28 │ │ - b.n d00ee │ │ + b.n d00fe │ │ ldrb r1, [r4, #2] │ │ - b.n d03b4 │ │ + b.n d03c4 │ │ lsls r2, r2, #22 │ │ - b.n d00ae │ │ + b.n d00be │ │ ldrb r5, [r4, r1] │ │ - b.n d06b0 │ │ + b.n d06c0 │ │ ldr r0, [r2, #8] │ │ - b.n d00f2 │ │ + b.n d0102 │ │ ldr r3, [r4, #64] @ 0x40 │ │ - b.n d03f6 │ │ + b.n d0406 │ │ str r1, [r0, #64] @ 0x40 │ │ - b.n d03c6 │ │ + b.n d03d6 │ │ strb r7, [r0, #0] │ │ - b.n d010a │ │ + b.n d011a │ │ ldrsh r2, [r6, r6] │ │ - b.n d0754 │ │ + b.n d0764 │ │ adds r0, #3 │ │ - b.n d0114 │ │ + b.n d0124 │ │ cmp r4, #33 @ 0x21 │ │ - b.n d03ce │ │ + b.n d03de │ │ strb r3, [r2, #18] │ │ - b.n d01da │ │ + b.n d01ea │ │ movs r0, r0 │ │ - b.n d0116 │ │ + b.n d0126 │ │ movs r1, r0 │ │ - b.n d0116 │ │ + b.n d0126 │ │ movs r0, #4 │ │ - b.n cfc0c │ │ + b.n cfc1c │ │ str r3, [r2, #88] @ 0x58 │ │ - b.n d0124 │ │ + b.n d0134 │ │ str r0, [r1, #0] │ │ - b.n cfc1c │ │ + b.n cfc2c │ │ adds r4, #144 @ 0x90 │ │ - b.n d0126 │ │ + b.n d0136 │ │ subs r6, #39 @ 0x27 │ │ - b.n d042a │ │ + b.n d043a │ │ asrs r0, r0, #32 │ │ - b.n cfc1a │ │ + b.n cfc2a │ │ adds r2, #0 │ │ - b.n d03f8 │ │ + b.n d0408 │ │ lsrs r0, r4, #24 │ │ - b.n d0136 │ │ + b.n d0146 │ │ adds r0, #7 │ │ - b.n d0140 │ │ + b.n d0150 │ │ lsrs r0, r0, #16 │ │ - b.n d043e │ │ + b.n d044e │ │ ldrb r3, [r0, #16] │ │ - b.n d0442 │ │ + b.n d0452 │ │ movs r4, #34 @ 0x22 │ │ - b.n d0414 │ │ + b.n d0424 │ │ movs r0, #32 │ │ - b.n cfc0c │ │ + b.n cfc1c │ │ lsls r3, r4, #16 │ │ - b.n d040e │ │ - bl 52bc0e │ │ + b.n d041e │ │ + bl 52bc1e │ │ movs r4, r4 │ │ - b.n cfc18 │ │ + b.n cfc28 │ │ movs r3, r0 │ │ ldmia.w r9, {r0, r2, r3, r5, r8, r9, sl, fp, sp} │ │ - b.n d072c │ │ + b.n d073c │ │ cmp r4, #149 @ 0x95 │ │ - b.n d07aa │ │ + b.n d07ba │ │ adds r2, #144 @ 0x90 │ │ - b.n d0234 │ │ + b.n d0244 │ │ lsls r1, r2, #10 │ │ - b.n d012e │ │ + b.n d013e │ │ asrs r5, r5, #16 │ │ - b.n d074c │ │ + b.n d075c │ │ adds r1, r2, r1 │ │ - b.n d07bc │ │ + b.n d07cc │ │ strb r0, [r2, #6] │ │ - b.n d0176 │ │ + b.n d0186 │ │ asrs r1, r0, #32 │ │ - b.n d0660 │ │ + b.n d0670 │ │ asrs r0, r0, #32 │ │ - b.n cfc50 │ │ + b.n cfc60 │ │ asrs r0, r0, #32 │ │ - b.n cfc6e │ │ + b.n cfc7e │ │ movs r2, r0 │ │ - b.n d0286 │ │ + b.n d0296 │ │ movs r4, r0 │ │ - b.n cfc5c │ │ + b.n cfc6c │ │ movs r4, r0 │ │ - b.n cfc88 │ │ + b.n cfc98 │ │ mrc2 11, 7, lr, cr11, cr15, {7} @ │ │ - beq.n d018c │ │ - b.n d05ec │ │ + beq.n d019c │ │ + b.n d05fc │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {} │ │ - b.n d089e │ │ + b.n d08ae │ │ asrs r0, r0, #32 │ │ - b.n d08a2 │ │ + b.n d08b2 │ │ vpmin.u q15, q14, │ │ - ldmdb ip, {} │ │ - ldr r0, [pc, #192] @ (d022c ) │ │ + stmdb ip!, {} │ │ + ldr r0, [pc, #192] @ (d023c ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n d068c │ │ + b.n d069c │ │ str r0, [r0, r0] │ │ - b.n d04b6 │ │ + b.n d04c6 │ │ ands r0, r0 │ │ - b.n d04ba │ │ + b.n d04ca │ │ lsls r0, r0, #2 │ │ - b.n cfce8 │ │ + b.n cfcf8 │ │ movs r0, r0 │ │ - b.n d0822 │ │ + b.n d0832 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #1 │ │ - b.n cfcc8 │ │ + b.n cfcd8 │ │ movs r0, #8 │ │ - b.n cfcb6 │ │ + b.n cfcc6 │ │ movs r0, r0 │ │ - b.n d02b0 │ │ + b.n d02c0 │ │ asrs r0, r2, #1 │ │ - b.n cfcb6 │ │ + b.n cfcc6 │ │ movs r0, #130 @ 0x82 │ │ - b.n d029e │ │ + b.n d02ae │ │ movs r5, r0 │ │ - b.n d04de │ │ + b.n d04ee │ │ movs r1, #183 @ 0xb7 │ │ add.w r0, r0, r0 │ │ - b.n d0846 │ │ + b.n d0856 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n cfcd8 │ │ + b.n cfce8 │ │ asrs r0, r1, #32 │ │ - b.n cfcda │ │ + b.n cfcea │ │ movs r0, #255 @ 0xff │ │ - b.n d08f6 │ │ + b.n d0906 │ │ asrs r1, r0, #2 │ │ - b.n d04fa │ │ - asrs r4, r7, #14 │ │ - mla r0, r0, r8, r1 │ │ - b.n cfcea │ │ + b.n d050a │ │ + asrs r1, r6, #16 │ │ + @ instruction: 0xfa001008 │ │ + b.n cfcfa │ │ lsls r0, r0, #2 │ │ - b.n cfcee │ │ + b.n cfcfe │ │ lsls r1, r0, #2 │ │ - b.n d02ca │ │ - asrs r0, r5, #17 │ │ - @ instruction: 0xfa000000 │ │ - b.n d0912 │ │ + b.n d02da │ │ + asrs r0, r3, #16 │ │ + mla r0, r0, r0, r0 │ │ + b.n d0922 │ │ ldrh r0, [r6, #0] │ │ - ldmia.w sp!, {r2, r3, r4, r5, r7, r9, sl, sp, lr, pc} │ │ + ldmia.w sp!, {r2, r3, r6, r7, r9, sl, sp, lr, pc} │ │ movs r0, r0 │ │ asrs r4, r4, #6 │ │ - b.n cfd1c │ │ + b.n cfd2c │ │ asrs r1, r0, #32 │ │ - b.n d0300 │ │ + b.n d0310 │ │ asrs r2, r3, #1 │ │ - b.n cfd88 │ │ + b.n cfd98 │ │ movs r3, r0 │ │ - b.n d088c │ │ + b.n d089c │ │ vrhadd.u16 d3, d14, d31 │ │ - ldr r7, [pc, #960] @ (d05b0 ) │ │ + ldr r7, [pc, #960] @ (d05c0 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n d0710 │ │ - beq.n d0110 │ │ - b.n d0694 │ │ + b.n d0720 │ │ + beq.n d0120 │ │ + b.n d06a4 │ │ strb r0, [r1, #0] │ │ - b.n d06fe │ │ + b.n d070e │ │ strh r1, [r0, #0] │ │ - b.n cfda2 │ │ + b.n cfdb2 │ │ str r2, [r0, r0] │ │ - b.n cfda6 │ │ - b.n d020a │ │ - b.n d094a │ │ + b.n cfdb6 │ │ + b.n d021a │ │ + b.n d095a │ │ str r7, [r0, #0] │ │ - b.n d054e │ │ + b.n d055e │ │ stmia r0!, {r0, r1, r4, r6, r7} │ │ - b.n d05b2 │ │ + b.n d05c2 │ │ movs r0, #0 │ │ - b.n cfdb6 │ │ + b.n cfdc6 │ │ movs r7, r0 │ │ - b.n d055a │ │ + b.n d056a │ │ asrs r0, r1, #6 │ │ - b.n d018a │ │ + b.n d019a │ │ adds r0, #3 │ │ - b.n d063a │ │ + b.n d064a │ │ asrs r0, r5, #32 │ │ - b.n cfc3c │ │ + b.n cfc4c │ │ ands r7, r0 │ │ - b.n d056a │ │ + b.n d057a │ │ asrs r5, r0, #6 │ │ - b.n d018e │ │ + b.n d019e │ │ lsls r0, r0, #1 │ │ - b.n d086a │ │ + b.n d087a │ │ asrs r0, r7, #32 │ │ - b.n cfc4c │ │ + b.n cfc5c │ │ str r0, [sp, #16] │ │ - b.n cfd5a │ │ + b.n cfd6a │ │ movs r0, r0 │ │ - b.n cfd6c │ │ + b.n cfd7c │ │ movs r0, r4 │ │ - b.n cfc58 │ │ + b.n cfc68 │ │ movs r4, r0 │ │ - b.n cfd74 │ │ + b.n cfd84 │ │ movs r4, r4 │ │ - b.n cfc60 │ │ + b.n cfc70 │ │ movs r0, r1 │ │ - b.n cfd7c │ │ + b.n cfd8c │ │ movs r4, r5 │ │ - b.n cfc68 │ │ + b.n cfc78 │ │ movs r4, r1 │ │ - b.n cfd84 │ │ + b.n cfd94 │ │ movs r0, r6 │ │ - b.n cfc70 │ │ + b.n cfc80 │ │ movs r0, r2 │ │ - b.n cfd8c │ │ + b.n cfd9c │ │ asrs r4, r0, #32 │ │ - b.n cfd8e │ │ + b.n cfd9e │ │ movs r4, r7 │ │ - b.n cfc7c │ │ + b.n cfc8c │ │ lsls r1, r3, #1 │ │ - b.n d09aa │ │ + b.n d09ba │ │ str r3, [r0, #24] │ │ - b.n d01d6 │ │ + b.n d01e6 │ │ lsls r6, r1, #1 │ │ lsls r0, r0, #12 │ │ asrs r4, r6, #32 │ │ - b.n cfc8c │ │ + b.n cfc9c │ │ asrs r1, r3, #1 │ │ - b.n d09ba │ │ + b.n d09ca │ │ movs r1, r0 │ │ - b.n d0976 │ │ - add r0, pc, #80 @ (adr r0, d02d0 ) │ │ - b.n cfdb0 │ │ + b.n d0986 │ │ + add r0, pc, #80 @ (adr r0, d02e0 ) │ │ + b.n cfdc0 │ │ asrs r6, r1, #1 │ │ stmia r3!, {} │ │ lsls r2, r6, #12 │ │ - b.n d04c6 │ │ + b.n d04d6 │ │ adds r0, #115 @ 0x73 │ │ - b.n d09ce │ │ + b.n d09de │ │ ands r4, r0 │ │ - b.n cfdba │ │ + b.n cfdca │ │ adds r0, #119 @ 0x77 │ │ lsls r0, r0, #12 │ │ lsls r0, r5, #1 │ │ - b.n cfdb4 │ │ + b.n cfdc4 │ │ lsls r2, r6, #20 │ │ - b.n d04da │ │ + b.n d04ea │ │ lsls r3, r6, #1 │ │ - b.n d09e2 │ │ + b.n d09f2 │ │ lsls r7, r6, #1 │ │ lsls r0, r0, #12 │ │ lsrs r2, r6, #32 │ │ - b.n d04e6 │ │ + b.n d04f6 │ │ lsls r0, r2, #1 │ │ - b.n cfdc8 │ │ + b.n cfdd8 │ │ strb r3, [r6, #1] │ │ - b.n d09f2 │ │ + b.n d0a02 │ │ movs r0, r7 │ │ - b.n cfcec │ │ + b.n cfcfc │ │ lsls r0, r1, #1 │ │ - b.n cfdd4 │ │ + b.n cfde4 │ │ lsls r3, r6, #1 │ │ - b.n d09fe │ │ + b.n d0a0e │ │ lsls r7, r6, #1 │ │ lsls r0, r0, #12 │ │ asrs r4, r4, #1 │ │ - b.n cfde0 │ │ + b.n cfdf0 │ │ lsls r0, r0, #1 │ │ - b.n cfde4 │ │ + b.n cfdf4 │ │ asrs r6, r2, #21 │ │ - b.n d08d8 │ │ + b.n d08e8 │ │ movs r4, r6 │ │ - b.n cfd08 │ │ + b.n cfd18 │ │ asrs r5, r2, #21 │ │ - b.n d0960 │ │ + b.n d0970 │ │ movs r4, r7 │ │ - b.n cfdf4 │ │ + b.n cfe04 │ │ movs r2, r0 │ │ - b.n d0902 │ │ + b.n d0912 │ │ movs r0, r5 │ │ - b.n cfd18 │ │ + b.n cfd28 │ │ movs r0, r7 │ │ - b.n cfe00 │ │ + b.n cfe10 │ │ movs r4, r0 │ │ - b.n d06ee │ │ + b.n d06fe │ │ str r0, [r3, #4] │ │ - b.n cfe08 │ │ + b.n cfe18 │ │ lsls r7, r6, #1 │ │ - b.n d0732 │ │ + b.n d0742 │ │ str r4, [r7, #4] │ │ - b.n d00d4 │ │ + b.n d00e4 │ │ eors r4, r3 │ │ - b.n cfe14 │ │ + b.n cfe24 │ │ asrs r6, r2, #6 │ │ - b.n d0406 │ │ + b.n d0416 │ │ movs r0, r5 │ │ - b.n cfe1c │ │ + b.n cfe2c │ │ movs r4, r7 │ │ - b.n cfd3c │ │ + b.n cfd4c │ │ movs r0, r4 │ │ - b.n cfe24 │ │ + b.n cfe34 │ │ lsls r3, r6, #1 │ │ - b.n d0a4e │ │ + b.n d0a5e │ │ asrs r4, r5, #32 │ │ - b.n cfd48 │ │ + b.n cfd58 │ │ lsls r7, r6, #1 │ │ lsls r0, r0, #12 │ │ asrs r0, r2, #32 │ │ - b.n cfe34 │ │ + b.n cfe44 │ │ asrs r0, r6, #32 │ │ - b.n cfd54 │ │ + b.n cfd64 │ │ movs r1, r0 │ │ - b.n d0946 │ │ + b.n d0956 │ │ adds r0, #96 @ 0x60 │ │ - b.n cfe40 │ │ + b.n cfe50 │ │ strb r7, [r6, #1] │ │ lsls r0, r0, #12 │ │ str r0, [sp, #304] @ 0x130 │ │ - b.n cfe48 │ │ - add r0, pc, #144 @ (adr r0, d03c0 ) │ │ - b.n cfe4c │ │ + b.n cfe58 │ │ + add r0, pc, #144 @ (adr r0, d03d0 ) │ │ + b.n cfe5c │ │ asrs r4, r2, #32 │ │ - b.n cfe50 │ │ + b.n cfe60 │ │ movs r0, r3 │ │ - b.n cfe54 │ │ + b.n cfe64 │ │ asrs r0, r1, #1 │ │ - b.n cfe7c │ │ + b.n cfe8c │ │ movs r0, #44 @ 0x2c │ │ - b.n cfe5c │ │ + b.n cfe6c │ │ movs r0, #196 @ 0xc4 │ │ - b.n d0a86 │ │ + b.n d0a96 │ │ str r4, [r0, r1] │ │ - b.n cfe64 │ │ + b.n cfe74 │ │ asrs r1, r0, #32 │ │ - b.n d046c │ │ + b.n d047c │ │ strh r0, [r6, #0] │ │ - b.n cfe6c │ │ + b.n cfe7c │ │ adds r0, #52 @ 0x34 │ │ - b.n cfe94 │ │ + b.n cfea4 │ │ movs r0, r4 │ │ - b.n cfd90 │ │ + b.n cfda0 │ │ movs r0, r0 │ │ - b.n cfe78 │ │ + b.n cfe88 │ │ adds r0, #3 │ │ - b.n d0480 │ │ + b.n d0490 │ │ movs r4, r4 │ │ - b.n cfd9c │ │ + b.n cfdac │ │ lsls r1, r0, #2 │ │ @ instruction: 0xe98d0084 │ │ - b.n d0476 │ │ + b.n d0486 │ │ movs r0, r0 │ │ - b.n d03fe │ │ + b.n d040e │ │ lsls r4, r2, #1 │ │ - b.n cfe90 │ │ + b.n cfea0 │ │ movs r3, r0 │ │ - b.n d0aba │ │ - cmp r3, #170 @ 0xaa │ │ + b.n d0aca │ │ + cmp r3, #169 @ 0xa9 │ │ @ instruction: 0xebffd01c │ │ - b.n d0818 │ │ + b.n d0828 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r2, r3, r5, r6, r9, sl, sp, lr, pc} │ │ + ldmia.w sp!, {r2, r3, r4, r5, r6, r9, sl, sp, lr, pc} │ │ movs r0, r0 │ │ - str r7, [sp, #628] @ 0x274 │ │ - vmla.i , , d21[0] │ │ + ldr r0, [sp, #448] @ 0x1c0 │ │ + @ instruction: 0xfff3afa4 │ │ vqshrun.s64 d20, q8, #13 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n d08b4 │ │ + b.n d08c4 │ │ str r0, [r0, r0] │ │ - b.n d06de │ │ + b.n d06ee │ │ lsls r0, r5, #1 │ │ - b.n cfec2 │ │ + b.n cfed2 │ │ movs r0, r0 │ │ - b.n d0a46 │ │ + b.n d0a56 │ │ movs r3, r4 │ │ lsrs r0, r0, #8 │ │ movs r5, r0 │ │ - b.n d06ee │ │ + b.n d06fe │ │ lsls r0, r5, #1 │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n d06f6 │ │ + b.n d0706 │ │ stmia r0!, {r2, r7} │ │ - b.n cfef8 │ │ + b.n cff08 │ │ stmia r0!, {r2, r3} │ │ - b.n d04dc │ │ + b.n d04ec │ │ adds r0, #28 │ │ - b.n cfefa │ │ + b.n cff0a │ │ movs r0, r0 │ │ - b.n d0a6c │ │ + b.n d0a7c │ │ movs r1, r3 │ │ lsrs r0, r0, #8 │ │ lsls r4, r6, #1 │ │ - b.n cff0c │ │ + b.n cff1c │ │ movs r0, #0 │ │ - b.n d0b12 │ │ + b.n d0b22 │ │ movs r0, r0 │ │ - b.n d0314 │ │ + b.n d0324 │ │ asrs r2, r0, #4 │ │ - b.n d02fa │ │ + b.n d030a │ │ movs r5, r0 │ │ - b.n d0680 │ │ + b.n d0690 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #1 │ │ - b.n d08ea │ │ + b.n d08fa │ │ movs r2, r0 │ │ - b.n d0690 │ │ + b.n d06a0 │ │ @ instruction: 0xfff91aff │ │ movs r7, r1 │ │ and.w r0, r0, r1, lsl #12 │ │ - b.n d089c │ │ + b.n d08ac │ │ adds r0, #28 │ │ - b.n cff12 │ │ + b.n cff22 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ asrs r3, r0, #4 │ │ - b.n d0322 │ │ + b.n d0332 │ │ asrs r2, r0, #4 │ │ - b.n d0306 │ │ + b.n d0316 │ │ movs r1, r1 │ │ and.w r0, r0, r8, ror #8 │ │ - b.n cff4c │ │ + b.n cff5c │ │ movs r0, #2 │ │ - b.n d0530 │ │ + b.n d0540 │ │ movs r2, r0 │ │ - b.n d06b6 │ │ + b.n d06c6 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ asrs r4, r5, #32 │ │ - b.n cff5c │ │ + b.n cff6c │ │ adds r0, #16 │ │ - b.n d0b62 │ │ + b.n d0b72 │ │ asrs r1, r0, #32 │ │ - b.n d0544 │ │ + b.n d0554 │ │ movs r0, #240 @ 0xf0 │ │ - b.n d07ac │ │ - bl 52bf2a │ │ + b.n d07bc │ │ + bl 52bf3a │ │ movs r0, #227 @ 0xe3 │ │ add.w r0, r0, r4 │ │ - b.n d0776 │ │ + b.n d0786 │ │ ldrh r0, [r6, #0] │ │ ldmia.w sp!, {lr} │ │ - b.n d0b7e │ │ + b.n d0b8e │ │ @ instruction: 0xffdceaff │ │ - b.n cfd64 │ │ + b.n cfd94 │ │ movs r0, r0 │ │ - blt.n d04a0 │ │ + blt.n d04b0 │ │ movs r0, r0 │ │ - b.n d0c44 │ │ + b.n cfc74 │ │ movs r0, r0 │ │ - bge.n d0408 │ │ + bge.n d0418 │ │ movs r0, r0 │ │ - ldr r4, [pc, #64] @ (d0494 ) │ │ + ldr r4, [pc, #64] @ (d04a4 ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n d0974 │ │ + b.n d0984 │ │ ands r0, r0 │ │ - b.n d079e │ │ + b.n d07ae │ │ movs r0, r0 │ │ - b.n cff82 │ │ + b.n cff92 │ │ asrs r0, r1, #32 │ │ - b.n cff8e │ │ + b.n cff9e │ │ movs r1, #89 @ 0x59 │ │ add.w r0, r0, r0 │ │ - b.n d0b0e │ │ + b.n d0b1e │ │ movs r0, r0 │ │ lsls r0, r4, #14 │ │ movs r0, r1 │ │ lsls r4, r0, #22 │ │ movs r4, r1 │ │ lsls r4, r0, #22 │ │ movs r0, r0 │ │ lsls r4, r0, #22 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r4, r5, fp, lr} │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n d09a4 │ │ + b.n d09b4 │ │ ands r0, r0 │ │ - b.n d07ce │ │ + b.n d07de │ │ lsls r0, r0, #9 │ │ - b.n cffb2 │ │ + b.n cffc2 │ │ movs r0, r0 │ │ - b.n d0b36 │ │ + b.n d0b46 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #200 @ 0xc8 │ │ add.w r0, r0, r0 │ │ - b.n d0be2 │ │ + b.n d0bf2 │ │ lsls r0, r0, #9 │ │ - b.n cffae │ │ + b.n cffbe │ │ lsls r0, r0, #3 │ │ - b.n cffd2 │ │ + b.n cffe2 │ │ asrs r0, r1, #3 │ │ - b.n d09b6 │ │ + b.n d09c6 │ │ str r0, [r0, r0] │ │ - b.n d0bf2 │ │ + b.n d0c02 │ │ movs r1, r0 │ │ - b.n d0756 │ │ + b.n d0766 │ │ str r0, [r0, r3] │ │ - b.n cffc2 │ │ + b.n cffd2 │ │ movs r0, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #191 @ 0xbf │ │ add.w r1, r0, r0, lsl #1 │ │ - b.n cffee │ │ + b.n cfffe │ │ subs r2, r2, #5 │ │ - b.n d09d2 │ │ + b.n d09e2 │ │ str r0, [r0, r5] │ │ - b.n cffd6 │ │ + b.n cffe6 │ │ movs r1, r0 │ │ - b.n d0772 │ │ + b.n d0782 │ │ movs r0, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #185 @ 0xb9 │ │ add.w r0, r0, r0, lsl #4 │ │ - b.n d0c1e │ │ + b.n d0c2e │ │ lsls r0, r1, #7 │ │ - b.n d000a │ │ + b.n d001a │ │ asrs r0, r1, #7 │ │ - b.n cffee │ │ + b.n cfffe │ │ subs r5, r3, #0 │ │ - b.n d09f2 │ │ + b.n d0a02 │ │ movs r1, r0 │ │ - b.n d078e │ │ + b.n d079e │ │ movs r0, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #178 @ 0xb2 │ │ add.w r2, r0, r4, lsl #1 │ │ - b.n d0022 │ │ + b.n d0032 │ │ movs r0, r0 │ │ - b.n d0b9e │ │ + b.n d0bae │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n d0986 │ │ + b.n d0996 │ │ movs r0, #173 @ 0xad │ │ add.w r2, r0, r4, lsr #1 │ │ - b.n d0036 │ │ + b.n d0046 │ │ movs r0, r0 │ │ - b.n d0bb2 │ │ + b.n d0bc2 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n d099a │ │ + b.n d09aa │ │ movs r0, #168 @ 0xa8 │ │ add.w r0, r0, r0, asr #2 │ │ - b.n d004a │ │ + b.n d005a │ │ movs r0, r0 │ │ - b.n d0bc6 │ │ + b.n d0bd6 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n d09ae │ │ + b.n d09be │ │ movs r0, #163 @ 0xa3 │ │ add.w r0, r0, r4 │ │ - b.n d0876 │ │ - ldr r0, [pc, #192] @ (d05f8 ) │ │ + b.n d0886 │ │ + ldr r0, [pc, #192] @ (d0608 ) │ │ ldmia.w sp!, {r5, r7, sp} │ │ and.w r8, r0, r0, lsl #16 │ │ stmdb sp!, {r0, r2, r3, ip, sp, pc} │ │ - b.n d0886 │ │ + b.n d0896 │ │ movs r0, #177 @ 0xb1 │ │ add.w r0, r0, r0, ror #10 │ │ add.w r8, r0, r0, lsl #16 │ │ ldmia.w sp!, {r1, r2, r3, r5, r7, sp} │ │ and.w pc, r0, r0, ror #19 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n d0a78 │ │ - beq.n d05a8 │ │ - b.n d09fc │ │ + b.n d0a88 │ │ + beq.n d05b8 │ │ + b.n d0a0c │ │ ands r0, r0 │ │ - b.n d08a6 │ │ + b.n d08b6 │ │ movs r1, #97 @ 0x61 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n d08ae │ │ + b.n d08be │ │ movs r4, r0 │ │ - b.n d08b2 │ │ + b.n d08c2 │ │ movs r0, #48 @ 0x30 │ │ - b.n d00d6 │ │ + b.n d00e6 │ │ strh r0, [r0, #0] │ │ - b.n d0cba │ │ + b.n d0cca │ │ strh r0, [r2, #0] │ │ - b.n d0098 │ │ + b.n d00a8 │ │ movs r0, r0 │ │ - b.n d0c26 │ │ + b.n d0c36 │ │ lsls r5, r2, #2 │ │ lsrs r0, r0, #8 │ │ asrs r0, r5, #1 │ │ - b.n d00b2 │ │ + b.n d00c2 │ │ movs r1, r0 │ │ - b.n d0838 │ │ + b.n d0848 │ │ lsls r2, r2, #2 │ │ subs r0, r0, r0 │ │ asrs r0, r4, #1 │ │ - b.n d00be │ │ + b.n d00ce │ │ movs r1, r0 │ │ - b.n d0c3c │ │ + b.n d0c4c │ │ movs r7, r2 │ │ rev r0, r0 │ │ asrs r1, r0, #10 │ │ - b.n d06a6 │ │ + b.n d06b6 │ │ cmp r4, #2 │ │ - b.n d0aaa │ │ + b.n d0aba │ │ adds r2, r0, #0 │ │ - b.n d0aac │ │ + b.n d0abc │ │ adds r0, #0 │ │ - b.n d0cee │ │ + b.n d0cfe │ │ strb r0, [r0, #0] │ │ - b.n d0cf2 │ │ + b.n d0d02 │ │ str r0, [r2, #0] │ │ - b.n d00da │ │ + b.n d00ea │ │ movs r5, r0 │ │ - b.n d0866 │ │ + b.n d0876 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #32 │ │ - b.n d0ac6 │ │ + b.n d0ad6 │ │ movs r1, r0 │ │ - b.n d086a │ │ + b.n d087a │ │ @ instruction: 0xfff93aff │ │ movs r6, r0 │ │ @ instruction: 0xea00f05b │ │ sbcs.w r0, pc, #147456 @ 0x24000 │ │ - b.n d00da │ │ + b.n d00ea │ │ movs r0, #32 │ │ - b.n d0ade │ │ + b.n d0aee │ │ strb r1, [r0, #0] │ │ - b.n d0d1e │ │ + b.n d0d2e │ │ movs r1, r0 │ │ - b.n d0886 │ │ + b.n d0896 │ │ @ instruction: 0xfff23aff │ │ movs r1, r0 │ │ and.w r0, r0, r1 │ │ - b.n d0c1c │ │ + b.n d0c2c │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n d0116 │ │ + b.n d0126 │ │ movs r0, #1 │ │ - b.n d0d3a │ │ + b.n d0d4a │ │ movs r1, #200 @ 0xc8 │ │ - b.n d0100 │ │ + b.n d0110 │ │ asrs r0, r2, #32 │ │ - b.n d0b1c │ │ + b.n d0b2c │ │ @ instruction: 0xfb69ebff │ │ asrs r0, r2, #32 │ │ - b.n d0144 │ │ - add r0, pc, #0 @ (adr r0, d060c ) │ │ - b.n d094e │ │ + b.n d0154 │ │ + add r0, pc, #0 @ (adr r0, d061c ) │ │ + b.n d095e │ │ movs r0, r0 │ │ - b.n d0cb4 │ │ + b.n d0cc4 │ │ lsls r1, r5, #1 │ │ subs r0, r0, r0 │ │ lsls r4, r3, #2 │ │ - b.n d0142 │ │ + b.n d0152 │ │ asrs r0, r0, #32 │ │ - b.n d0d5e │ │ + b.n d0d6e │ │ movs r0, r0 │ │ - b.n d0cc2 │ │ + b.n d0cd2 │ │ lsls r5, r4, #1 │ │ lsrs r0, r0, #8 │ │ movs r4, r6 │ │ - b.n d0152 │ │ + b.n d0162 │ │ movs r4, r1 │ │ - b.n d0148 │ │ + b.n d0158 │ │ movs r1, r0 │ │ - b.n d0d12 │ │ + b.n d0d22 │ │ lsls r1, r4, #1 │ │ lsrs r0, r0, #8 │ │ lsls r4, r5, #6 │ │ - b.n d0178 │ │ + b.n d0188 │ │ ands r0, r1 │ │ - b.n d0158 │ │ + b.n d0168 │ │ movs r0, r0 │ │ - b.n d0760 │ │ + b.n d0770 │ │ str r0, [sp, #416] @ 0x1a0 │ │ - b.n d016e │ │ - add r0, pc, #16 @ (adr r0, d0658 ) │ │ - b.n d0164 │ │ + b.n d017e │ │ + add r0, pc, #16 @ (adr r0, d0668 ) │ │ + b.n d0174 │ │ ands r0, r4 │ │ - b.n d016e │ │ + b.n d017e │ │ movs r4, r4 │ │ - b.n d0ada │ │ + b.n d0aea │ │ movs r2, r0 │ │ - b.n d0cf6 │ │ + b.n d0d06 │ │ movs r0, r4 │ │ ldrh r0, [r0, #16] │ │ str r4, [r2, #0] │ │ - b.n d0b78 │ │ + b.n d0b88 │ │ strh r0, [r0, #0] │ │ - b.n d0da2 │ │ + b.n d0db2 │ │ strb r1, [r0, #0] │ │ - b.n d0da6 │ │ + b.n d0db6 │ │ movs r2, r0 │ │ - b.n d0daa │ │ + b.n d0dba │ │ asrs r4, r0, #32 │ │ - b.n d09ae │ │ + b.n d09be │ │ movs r4, r2 │ │ - b.n d018c │ │ + b.n d019c │ │ movs r0, #6 │ │ - b.n d09b6 │ │ + b.n d09c6 │ │ movs r4, r1 │ │ - b.n d01b4 │ │ + b.n d01c4 │ │ strh r0, [r4, #0] │ │ - b.n d0198 │ │ + b.n d01a8 │ │ strb r4, [r3, #0] │ │ - b.n d019c │ │ + b.n d01ac │ │ str r0, [sp, #96] @ 0x60 │ │ - b.n d01a0 │ │ + b.n d01b0 │ │ movs r1, #29 │ │ add.w r0, r0, r1 │ │ - b.n d0d6e │ │ + b.n d0d7e │ │ movs r1, r7 │ │ subs r0, r0, r0 │ │ movs r0, #110 @ 0x6e │ │ @ instruction: 0xeb00a000 │ │ - b.n d01ba │ │ + b.n d01ca │ │ movs r5, r4 │ │ - b.n d0d52 │ │ + b.n d0d62 │ │ movs r3, r0 │ │ ldmia r2!, {} │ │ movs r1, r0 │ │ - b.n d0d9a │ │ + b.n d0daa │ │ movs r6, r2 │ │ asrs r2, r3, #13 │ │ movs r5, r1 │ │ lsrs r0, r0, #8 │ │ movs r2, r0 │ │ and.w r0, r0, pc, lsr #1 │ │ - b.n d0d6a │ │ + b.n d0d7a │ │ movs r6, r4 │ │ asrs r2, r3, #13 │ │ movs r1, r1 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n d0d76 │ │ + b.n d0d86 │ │ movs r7, r6 │ │ subs r0, r0, r0 │ │ lsls r0, r4, #4 │ │ - b.n d0208 │ │ + b.n d0218 │ │ movs r0, r0 │ │ - b.n d07ec │ │ + b.n d07fc │ │ movs r4, r4 │ │ - b.n d01f2 │ │ + b.n d0202 │ │ movs r0, r0 │ │ - b.n d097e │ │ + b.n d098e │ │ @ instruction: 0xffe21aff │ │ movs r1, r6 │ │ and.w r0, r0, r4, lsl #24 │ │ - b.n d0a22 │ │ + b.n d0a32 │ │ movs r3, r1 │ │ and.w r1, r0, r4, lsl #8 │ │ - b.n d0228 │ │ + b.n d0238 │ │ str r5, [r0, #0] │ │ - b.n d0e2e │ │ + b.n d0e3e │ │ movs r6, r4 │ │ - b.n d0d9a │ │ + b.n d0daa │ │ movs r7, r0 │ │ - b.n d0e36 │ │ + b.n d0e46 │ │ movs r0, #2 │ │ - b.n d0818 │ │ + b.n d0828 │ │ asrs r6, r0, #32 │ │ - b.n d0e3e │ │ + b.n d0e4e │ │ str r0, [r5, #0] │ │ - b.n d0206 │ │ + b.n d0216 │ │ str r7, [r0, #0] │ │ lsls r0, r0, #12 │ │ movs r5, r4 │ │ - b.n d0db2 │ │ + b.n d0dc2 │ │ asrs r0, r4, #32 │ │ - b.n d0212 │ │ + b.n d0222 │ │ str r6, [r0, #0] │ │ lsls r0, r0, #12 │ │ movs r4, r4 │ │ - b.n d021a │ │ + b.n d022a │ │ ands r4, r2 │ │ - b.n d0c34 │ │ + b.n d0c44 │ │ strb r1, [r0, #0] │ │ - b.n d0e5e │ │ + b.n d0e6e │ │ strh r2, [r0, #0] │ │ - b.n d0e62 │ │ + b.n d0e72 │ │ movs r0, r0 │ │ - b.n d0e66 │ │ + b.n d0e76 │ │ asrs r6, r0, #32 │ │ - b.n d0a6a │ │ + b.n d0a7a │ │ movs r0, r4 │ │ - b.n d0248 │ │ + b.n d0258 │ │ movs r0, #4 │ │ - b.n d0a72 │ │ + b.n d0a82 │ │ movs r4, r1 │ │ - b.n d0270 │ │ + b.n d0280 │ │ strb r4, [r3, #0] │ │ - b.n d0254 │ │ + b.n d0264 │ │ str r0, [sp, #96] @ 0x60 │ │ - b.n d0258 │ │ + b.n d0268 │ │ strh r4, [r2, #0] │ │ - b.n d025c │ │ + b.n d026c │ │ movs r0, #238 @ 0xee │ │ add.w r0, r0, r1 │ │ - b.n d0e2a │ │ + b.n d0e3a │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ movs r0, #63 @ 0x3f │ │ @ instruction: 0xeb00a000 │ │ - b.n d0276 │ │ + b.n d0286 │ │ movs r4, r0 │ │ - b.n d0e0e │ │ + b.n d0e1e │ │ movs r1, r2 │ │ subs r0, r0, r0 │ │ lsls r4, r2, #2 │ │ - b.n d02a0 │ │ + b.n d02b0 │ │ movs r0, r0 │ │ - b.n d0884 │ │ + b.n d0894 │ │ movs r4, r4 │ │ - b.n d028a │ │ + b.n d029a │ │ movs r0, r0 │ │ - b.n d0a1a │ │ + b.n d0a2a │ │ @ instruction: 0xffeb1aff │ │ movs r3, r1 │ │ and.w r0, r0, r6, lsl #16 │ │ - b.n d0aba │ │ + b.n d0aca │ │ lsls r4, r6, #6 │ │ - b.n d0b38 │ │ + b.n d0b48 │ │ asrs r0, r6, #1 │ │ - b.n d02c0 │ │ + b.n d02d0 │ │ movs r2, r0 │ │ - b.n d0c26 │ │ + b.n d0c36 │ │ asrs r1, r0, #32 │ │ - b.n d08a8 │ │ + b.n d08b8 │ │ movs r1, r0 │ │ asrs r0, r0, #12 │ │ asrs r0, r5, #32 │ │ - b.n d02b4 │ │ + b.n d02c4 │ │ asrs r1, r0, #32 │ │ - b.n d081e │ │ + b.n d082e │ │ subs r1, r2, #4 │ │ - b.n d0a78 │ │ + b.n d0a88 │ │ asrs r1, r4, #10 │ │ - b.n d0ade │ │ + b.n d0aee │ │ movs r0, r0 │ │ - b.n d07a4 │ │ - add r0, pc, #0 @ (adr r0, d07a4 ) │ │ - b.n d0c66 │ │ + b.n d07b4 │ │ + add r0, pc, #0 @ (adr r0, d07b4 ) │ │ + b.n d0c76 │ │ movs r4, r0 │ │ - b.n d02e4 │ │ + b.n d02f4 │ │ strh r0, [r0, #0] │ │ - b.n d0eee │ │ + b.n d0efe │ │ ands r0, r1 │ │ - b.n d02ec │ │ + b.n d02fc │ │ asrs r0, r0, #32 │ │ - b.n d0ef6 │ │ + b.n d0f06 │ │ movs r0, r0 │ │ - b.n d0e5a │ │ - add r0, pc, #0 @ (adr r0, d07bc ) │ │ + b.n d0e6a │ │ + add r0, pc, #0 @ (adr r0, d07cc ) │ │ asrs r0, r4, #6 │ │ movs r4, r0 │ │ - b.n d0b02 │ │ + b.n d0b12 │ │ movs r0, #5 │ │ - b.n d0b06 │ │ + b.n d0b16 │ │ movs r4, r1 │ │ add.w r0, r0, r0 │ │ - b.n d0e82 │ │ + b.n d0e92 │ │ strh r0, [r5, #2] │ │ - b.n d02da │ │ + b.n d02ea │ │ movs r2, r1 │ │ asrs r0, r4, #6 │ │ - beq.n d0810 │ │ - b.n d0c70 │ │ + beq.n d0820 │ │ + b.n d0c80 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {ip} │ │ - b.n d0f22 │ │ - add r0, pc, #0 @ (adr r0, d07e4 ) │ │ - b.n d0f26 │ │ + b.n d0f32 │ │ + add r0, pc, #0 @ (adr r0, d07f4 ) │ │ + b.n d0f36 │ │ @ instruction: 0xfff4eaff │ │ - b.n d0c04 │ │ + b.n d0c34 │ │ movs r0, r0 │ │ - b.n d0af0 │ │ + b.n d0b20 │ │ movs r0, r0 │ │ - b.n d0a9c │ │ + b.n d0acc │ │ movs r0, r0 │ │ - b.n d0980 │ │ + b.n d09b0 │ │ movs r0, r0 │ │ - b.n d09cc │ │ + b.n d09fc │ │ movs r0, r0 │ │ - ldr r7, [pc, #960] @ (d0bc0 ) │ │ + ldr r7, [pc, #960] @ (d0bd0 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n d0d20 │ │ - beq.n d0900 │ │ - b.n d0ca4 │ │ + b.n d0d30 │ │ + beq.n d0910 │ │ + b.n d0cb4 │ │ strb r0, [r1, #1] │ │ - b.n d032e │ │ + b.n d033e │ │ strh r2, [r0, #0] │ │ - b.n d0b52 │ │ + b.n d0b62 │ │ ands r1, r0 │ │ - b.n d0b56 │ │ + b.n d0b66 │ │ str r0, [r0, r0] │ │ - b.n d0b5a │ │ + b.n d0b6a │ │ str r0, [r0, #0] │ │ - b.n d0f5e │ │ + b.n d0f6e │ │ movs r0, r0 │ │ - b.n d0ed0 │ │ + b.n d0ee0 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n d0ed2 │ │ + b.n d0ee2 │ │ str r0, [sp, #20] │ │ lsls r0, r4, #6 │ │ movs r0, r6 │ │ lsls r1, r7, #22 │ │ movs r0, r0 │ │ lsls r7, r2, #5 │ │ movs r0, r5 │ │ lsrs r0, r0, #8 │ │ lsls r0, r5, #1 │ │ - b.n d0368 │ │ + b.n d0378 │ │ movs r0, r1 │ │ - b.n d0ae2 │ │ + b.n d0af2 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ asrs r0, r7, #10 │ │ - b.n d0388 │ │ + b.n d0398 │ │ ands r0, r0 │ │ - b.n d0f8e │ │ + b.n d0f9e │ │ asrs r1, r0, #32 │ │ - b.n d0970 │ │ + b.n d0980 │ │ asrs r2, r3, #1 │ │ - b.n d03f8 │ │ + b.n d0408 │ │ movs r3, r0 │ │ - b.n d0efc │ │ + b.n d0f0c │ │ lsls r3, r0, #2 │ │ cmp r2, #0 │ │ movs r0, r5 │ │ - b.n d038c │ │ + b.n d039c │ │ movs r1, r0 │ │ - b.n d0f46 │ │ + b.n d0f56 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #76 @ 0x4c │ │ add.w r0, r0, r0 │ │ - b.n d0f12 │ │ + b.n d0f22 │ │ lsls r2, r2, #2 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n d103a │ │ + b.n d104a │ │ movs r0, r5 │ │ - b.n d0388 │ │ + b.n d0398 │ │ movs r4, r2 │ │ - b.n d03ac │ │ + b.n d03bc │ │ movs r1, r0 │ │ - b.n d0f66 │ │ + b.n d0f76 │ │ lsls r5, r1, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, #68 @ 0x44 │ │ add.w r0, r0, r0 │ │ - b.n d0f32 │ │ + b.n d0f42 │ │ lsls r7, r1, #2 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n d105a │ │ + b.n d106a │ │ movs r0, r0 │ │ - b.n d0f46 │ │ + b.n d0f56 │ │ movs r4, r2 │ │ - b.n d03ac │ │ + b.n d03bc │ │ lsls r6, r0, #1 │ │ lsrs r0, r0, #8 │ │ lsls r4, r4, #9 │ │ - b.n d03e8 │ │ + b.n d03f8 │ │ movs r0, r0 │ │ - b.n d09cc │ │ + b.n d09dc │ │ movs r0, r4 │ │ - b.n d03d2 │ │ + b.n d03e2 │ │ movs r6, r0 │ │ - b.n d0f56 │ │ + b.n d0f66 │ │ movs r0, r0 │ │ lsls r6, r2, #13 │ │ lsls r0, r0, #1 │ │ subs r0, r0, r0 │ │ adds r0, #4 │ │ - b.n d03ea │ │ + b.n d03fa │ │ asrs r1, r0, #32 │ │ - b.n d1006 │ │ + b.n d1016 │ │ movs r4, r2 │ │ - b.n d03f2 │ │ + b.n d0402 │ │ lsls r1, r0, #20 │ │ - b.n d0ef4 │ │ + b.n d0f04 │ │ cmp r0, #163 @ 0xa3 │ │ - b.n d0c54 │ │ + b.n d0c64 │ │ movs r3, r6 │ │ subs r0, r0, r0 │ │ adds r0, #104 @ 0x68 │ │ - b.n d0402 │ │ + b.n d0412 │ │ movs r4, r6 │ │ and.w r2, r0, r8, lsr #4 │ │ - b.n d0420 │ │ - add r0, pc, #0 @ (adr r0, d08e4 ) │ │ - b.n d0ee6 │ │ + b.n d0430 │ │ + add r0, pc, #0 @ (adr r0, d08f4 ) │ │ + b.n d0ef6 │ │ movs r4, r6 │ │ - b.n d0414 │ │ + b.n d0424 │ │ add r7, sp, #960 @ 0x3c0 │ │ - b.n d0f7c │ │ + b.n d0f8c │ │ asrs r1, r0, #32 │ │ - b.n d0a10 │ │ + b.n d0a20 │ │ movs r0, #1 │ │ - b.n d1036 │ │ + b.n d1046 │ │ adds r0, #0 │ │ - b.n d103a │ │ - add r0, pc, #0 @ (adr r0, d08fc ) │ │ - b.n d0418 │ │ + b.n d104a │ │ + add r0, pc, #0 @ (adr r0, d090c ) │ │ + b.n d0428 │ │ asrs r0, r4, #32 │ │ - b.n d0424 │ │ + b.n d0434 │ │ ldc2 11, cr14, [r3], #-1020 @ 0xfffffc04 @ │ │ movs r0, r0 │ │ - b.n d0faa │ │ + b.n d0fba │ │ @ instruction: 0xffca1aff │ │ movs r4, r6 │ │ - b.n d043c │ │ + b.n d044c │ │ asrs r0, r2, #32 │ │ - b.n d0e30 │ │ + b.n d0e40 │ │ movs r0, #25 │ │ add.w r0, r0, r0 │ │ - b.n d0fbe │ │ + b.n d0fce │ │ @ instruction: 0xffc51aff │ │ movs r4, r4 │ │ - b.n d0460 │ │ + b.n d0470 │ │ movs r0, r0 │ │ - b.n d0fca │ │ + b.n d0fda │ │ @ instruction: 0xffc20aff │ │ movs r0, #4 │ │ - b.n d045c │ │ + b.n d046c │ │ adds r0, #1 │ │ - b.n d1076 │ │ + b.n d1086 │ │ movs r4, r2 │ │ - b.n d0464 │ │ + b.n d0474 │ │ asrs r0, r0, #7 │ │ - b.n d047c │ │ + b.n d048c │ │ cmp r0, #162 @ 0xa2 │ │ - b.n d0cc8 │ │ + b.n d0cd8 │ │ adds r0, #0 │ │ - b.n d1086 │ │ + b.n d1096 │ │ asrs r1, r0, #32 │ │ - b.n d0a68 │ │ - add r0, pc, #0 @ (adr r0, d094c ) │ │ - b.n d0468 │ │ + b.n d0a78 │ │ + add r0, pc, #0 @ (adr r0, d095c ) │ │ + b.n d0478 │ │ asrs r0, r4, #32 │ │ - b.n d0474 │ │ + b.n d0484 │ │ ldc2 11, cr14, [pc], {255} @ 0xff @ │ │ movs r0, r0 │ │ - b.n d0ffa │ │ + b.n d100a │ │ @ instruction: 0xffb61aff │ │ lsrs r7, r0, #20 │ │ - b.n d0e70 │ │ + b.n d0e80 │ │ movs r0, #118 @ 0x76 │ │ add.w r0, r0, r0, lsl #24 │ │ - b.n d0caa │ │ + b.n d0cba │ │ movs r0, r0 │ │ - b.n d100e │ │ + b.n d101e │ │ @ instruction: 0xffb11aff │ │ lsrs r5, r0, #20 │ │ - b.n d0e84 │ │ + b.n d0e94 │ │ movs r0, #113 @ 0x71 │ │ add.w r0, r0, r0, lsl #24 │ │ - b.n d0cbe │ │ + b.n d0cce │ │ movs r0, r0 │ │ - b.n d1022 │ │ + b.n d1032 │ │ @ instruction: 0xffac1aff │ │ lsrs r6, r2, #29 │ │ - b.n d0e98 │ │ + b.n d0ea8 │ │ str r0, [r2, #12] │ │ - b.n d0d0e │ │ + b.n d0d1e │ │ movs r1, r1 │ │ - b.n d0cd2 │ │ + b.n d0ce2 │ │ mcr2 11, 5, lr, cr14, cr15, {7} @ │ │ movs r7, r0 │ │ - b.n d0cc6 │ │ + b.n d0cd6 │ │ movs r5, r7 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, #0] │ │ - b.n d10e2 │ │ + b.n d10f2 │ │ @ instruction: 0xffa4eaff │ │ asrs r0, r0, #32 │ │ - b.n d0faa │ │ + b.n d0fba │ │ adds r0, #0 │ │ - b.n d10ee │ │ + b.n d10fe │ │ subs r0, r6, #7 │ │ - b.n d1040 │ │ + b.n d1050 │ │ asrs r0, r0, #32 │ │ - b.n d04d0 │ │ + b.n d04e0 │ │ asrs r7, r0, #32 │ │ - b.n d10fa │ │ + b.n d110a │ │ stc2 11, cr14, [r5], {255} @ 0xff @ │ │ str r0, [r0, #0] │ │ - b.n d0d02 │ │ + b.n d0d12 │ │ movs r4, r6 │ │ - b.n d04f0 │ │ + b.n d0500 │ │ movs r1, r0 │ │ - b.n d10aa │ │ + b.n d10ba │ │ movs r4, r1 │ │ lsrs r0, r0, #8 │ │ subs r3, r6, #7 │ │ add.w r0, r0, r0 │ │ - b.n d1076 │ │ + b.n d1086 │ │ lsls r3, r0, #1 │ │ subs r0, r0, r0 │ │ lsls r4, r6, #4 │ │ - b.n d051c │ │ + b.n d052c │ │ asrs r0, r0, #32 │ │ - b.n d11a2 │ │ + b.n d11b2 │ │ movs r0, r0 │ │ - b.n d108e │ │ + b.n d109e │ │ asrs r4, r6, #32 │ │ - b.n d04f4 │ │ + b.n d0504 │ │ movs r0, r0 │ │ - b.n d0b0c │ │ + b.n d0b1c │ │ movs r0, r4 │ │ - b.n d0512 │ │ + b.n d0522 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r6, r0 │ │ - b.n d109a │ │ + b.n d10aa │ │ movs r0, r0 │ │ lsls r6, r2, #13 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n d10ae │ │ + b.n d10be │ │ str r6, [r0, r0] │ │ - b.n d0d4a │ │ + b.n d0d5a │ │ movs r0, r0 │ │ asrs r6, r2, #13 │ │ movs r4, r0 │ │ asrs r4, r2, #22 │ │ lsls r2, r0, #4 │ │ asrs r0, r0, #14 │ │ movs r4, r0 │ │ asrs r4, r0, #22 │ │ movs r5, r0 │ │ - b.n d0d5e │ │ - beq.n d0a58 │ │ - b.n d0eb8 │ │ + b.n d0d6e │ │ + beq.n d0a68 │ │ + b.n d0ec8 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r4, r5} │ │ - b.n d0552 │ │ + b.n d0562 │ │ asrs r1, r0, #32 │ │ - b.n d116e │ │ + b.n d117e │ │ asrs r0, r0, #32 │ │ - b.n d054c │ │ + b.n d055c │ │ asrs r7, r0, #32 │ │ - b.n d1176 │ │ + b.n d1186 │ │ movs r0, #0 │ │ - b.n d117a │ │ + b.n d118a │ │ adds r0, #0 │ │ - b.n d117e │ │ + b.n d118e │ │ str r0, [r0, r0] │ │ - b.n d1182 │ │ + b.n d1192 │ │ @ instruction: 0xfbe3ebff │ │ str r0, [r0, #0] │ │ - b.n d0d8a │ │ + b.n d0d9a │ │ movs r0, r0 │ │ - b.n d10ee │ │ + b.n d10fe │ │ @ instruction: 0xffeb1aff │ │ lsls r4, r3, #2 │ │ - b.n d057e │ │ + b.n d058e │ │ movs r0, r0 │ │ - b.n d10fa │ │ + b.n d110a │ │ @ instruction: 0xffee0aff │ │ movs r4, r0 │ │ - b.n d0da2 │ │ + b.n d0db2 │ │ movs r4, r5 │ │ add.w r0, r0, r0, lsl #24 │ │ - b.n d0daa │ │ + b.n d0dba │ │ @ instruction: 0xffe4eaff │ │ asrs r4, r2, #2 │ │ - b.n d05b0 │ │ + b.n d05c0 │ │ cmp r7, #121 @ 0x79 │ │ - b.n d11b6 │ │ + b.n d11c6 │ │ adds r0, #144 @ 0x90 │ │ - b.n d05b8 │ │ + b.n d05c8 │ │ asrs r1, r0, #32 │ │ - b.n d0b9c │ │ + b.n d0bac │ │ lsls r1, r0, #4 │ │ @ instruction: 0xe98d3003 │ │ - b.n d0ba4 │ │ + b.n d0bb4 │ │ movs r3, r0 │ │ - b.n d11ca │ │ + b.n d11da │ │ str r0, [r0, r0] │ │ - b.n d05a8 │ │ - cmp r1, #229 @ 0xe5 │ │ + b.n d05b8 │ │ + cmp r1, #228 @ 0xe4 │ │ @ instruction: 0xebffff71 │ │ @ instruction: 0xeaff0034 │ │ - b.n d05c4 │ │ + b.n d05d4 │ │ str r0, [r0, #0] │ │ - b.n d11de │ │ + b.n d11ee │ │ movs r1, r0 │ │ - b.n d1182 │ │ + b.n d1192 │ │ vpmin.u32 q8, q10, │ │ asrs r0, r0, #32 │ │ - b.n d11ea │ │ + b.n d11fa │ │ movs r0, #56 @ 0x38 │ │ add.w r0, r0, r0 │ │ - b.n d1152 │ │ + b.n d1162 │ │ vpmin.u32 q8, q8, │ │ subs r5, r4, #5 │ │ add.w r0, r0, r0, lsl #24 │ │ - b.n d05de │ │ + b.n d05ee │ │ vpmin.u16 q15, , │ │ movs r0, r0 │ │ - b.n d1172 │ │ + b.n d1182 │ │ vpmin.u32 , q13, │ │ subs r0, r4, #5 │ │ add.w r0, r0, r0, lsl #24 │ │ - b.n d05f2 │ │ + b.n d0602 │ │ vpmin.u32 q15, , │ │ movs r0, r0 │ │ - b.n d1186 │ │ + b.n d1196 │ │ vpmin.u32 , , │ │ subs r3, r3, #5 │ │ add.w r0, r0, r0, lsl #24 │ │ - b.n d0606 │ │ + b.n d0616 │ │ vpmin.u32 q15, q13, │ │ movs r0, r0 │ │ - b.n d119a │ │ + b.n d11aa │ │ @ instruction: 0xffb91aff │ │ subs r6, r2, #5 │ │ add.w r0, r0, r0, lsl #24 │ │ - b.n d061a │ │ + b.n d062a │ │ @ instruction: 0xffb6eaff │ │ - svc 92 @ 0x5c │ │ + svc 108 @ 0x6c │ │ movs r0, r0 │ │ - svc 4 │ │ + svc 20 │ │ movs r0, r0 │ │ - svc 252 @ 0xfc │ │ + b.n d0b30 │ │ movs r0, r0 │ │ - ldrd pc, pc, [r2], #972 @ 0x3cc │ │ - ldmia r0!, {r3, r7} │ │ - @ instruction: 0xfff3dfa0 │ │ + @ instruction: 0xea18fff3 │ │ + ldmia r1!, {r3, r4, r5, r7} │ │ + @ instruction: 0xfff3dfb0 │ │ movs r0, r0 │ │ - udf #96 @ 0x60 │ │ + udf #112 @ 0x70 │ │ movs r0, r0 │ │ - ldr r7, [pc, #960] @ (d0edc ) │ │ + ldr r7, [pc, #960] @ (d0eec ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n d103c │ │ - beq.n d0b4c │ │ - b.n d0fc0 │ │ + b.n d104c │ │ + beq.n d0b5c │ │ + b.n d0fd0 │ │ str r0, [r0, r0] │ │ - b.n d0e6a │ │ + b.n d0e7a │ │ subs r0, r6, #7 │ │ add.w r0, r0, r0, lsl #16 │ │ - b.n d0e72 │ │ + b.n d0e82 │ │ lsls r0, r5, #1 │ │ - b.n d0660 │ │ + b.n d0670 │ │ movs r0, r0 │ │ - b.n d0de2 │ │ + b.n d0df2 │ │ lsls r0, r2, #1 │ │ subs r0, r0, r0 │ │ strh r4, [r1, #10] │ │ - b.n d0680 │ │ - add r0, pc, #208 @ (adr r0, d0c14 ) │ │ - b.n d0670 │ │ + b.n d0690 │ │ + add r0, pc, #208 @ (adr r0, d0c24 ) │ │ + b.n d0680 │ │ strh r0, [r1, #0] │ │ - b.n d0c68 │ │ + b.n d0c78 │ │ str r0, [r4, #0] │ │ - b.n d067e │ │ + b.n d068e │ │ movs r4, r4 │ │ - b.n d0fde │ │ + b.n d0fee │ │ movs r2, r0 │ │ - b.n d11f6 │ │ + b.n d1206 │ │ movs r4, r3 │ │ ldrh r0, [r0, #16] │ │ str r4, [r0, r0] │ │ - b.n d1078 │ │ + b.n d1088 │ │ str r0, [sp, #0] │ │ - b.n d12a2 │ │ + b.n d12b2 │ │ strb r1, [r0, #0] │ │ - b.n d12a6 │ │ + b.n d12b6 │ │ movs r0, r1 │ │ - b.n d1084 │ │ + b.n d1094 │ │ asrs r6, r0, #32 │ │ - b.n d0eae │ │ + b.n d0ebe │ │ lsls r0, r2, #10 │ │ stmia.w r0, {r1, r3} │ │ - b.n d0eb6 │ │ + b.n d0ec6 │ │ movs r0, #5 │ │ - b.n d0eba │ │ + b.n d0eca │ │ strb r4, [r0, #0] │ │ - b.n d0698 │ │ + b.n d06a8 │ │ subs r7, r3, #7 │ │ add.w r0, r0, r1 │ │ - b.n d1266 │ │ + b.n d1276 │ │ movs r2, r6 │ │ subs r0, r0, r0 │ │ subs r0, r6, #4 │ │ add.w r0, r0, r0 │ │ - b.n d06b2 │ │ + b.n d06c2 │ │ movs r5, r4 │ │ - b.n d1236 │ │ + b.n d1246 │ │ movs r3, r0 │ │ ldmia r2!, {} │ │ movs r1, r0 │ │ - b.n d127e │ │ + b.n d128e │ │ movs r6, r2 │ │ asrs r0, r2, #13 │ │ movs r3, r1 │ │ lsrs r0, r0, #8 │ │ movs r2, r0 │ │ and.w r0, r0, pc, lsr #1 │ │ - b.n d124e │ │ + b.n d125e │ │ movs r6, r4 │ │ asrs r0, r2, #13 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n d125a │ │ + b.n d126a │ │ movs r2, r4 │ │ subs r0, r0, r0 │ │ asrs r4, r4, #32 │ │ - b.n d06f2 │ │ + b.n d0702 │ │ movs r1, r0 │ │ - b.n d0e72 │ │ + b.n d0e82 │ │ @ instruction: 0xffe61aff │ │ movs r6, r3 │ │ and.w r0, r0, r6, lsl #28 │ │ - b.n d0f12 │ │ + b.n d0f22 │ │ movs r1, r1 │ │ and.w r0, r0, r5, lsl #28 │ │ - b.n d131a │ │ + b.n d132a │ │ movs r6, r4 │ │ - b.n d128a │ │ + b.n d129a │ │ strb r0, [r5, #0] │ │ - b.n d06f2 │ │ + b.n d0702 │ │ strb r7, [r0, #0] │ │ lsls r0, r0, #12 │ │ movs r5, r4 │ │ - b.n d1296 │ │ + b.n d12a6 │ │ movs r7, r0 │ │ - b.n d132e │ │ + b.n d133e │ │ asrs r6, r0, #32 │ │ - b.n d1332 │ │ + b.n d1342 │ │ strb r6, [r0, #0] │ │ lsls r0, r0, #12 │ │ asrs r0, r4, #32 │ │ - b.n d070a │ │ + b.n d071a │ │ movs r4, r4 │ │ - b.n d070e │ │ + b.n d071e │ │ str r4, [r0, #0] │ │ - b.n d111c │ │ + b.n d112c │ │ str r0, [sp, #0] │ │ - b.n d1346 │ │ + b.n d1356 │ │ str r1, [r0, r0] │ │ - b.n d134a │ │ + b.n d135a │ │ movs r0, r1 │ │ - b.n d1128 │ │ + b.n d1138 │ │ asrs r7, r0, #32 │ │ - b.n d0f52 │ │ + b.n d0f62 │ │ lsls r0, r6, #8 │ │ stmia.w r0, {r1, r3} │ │ - b.n d0f5a │ │ + b.n d0f6a │ │ movs r0, #6 │ │ - b.n d0f5e │ │ + b.n d0f6e │ │ str r4, [r0, r0] │ │ - b.n d073c │ │ + b.n d074c │ │ subs r6, r6, #6 │ │ add.w r0, r0, r1 │ │ - b.n d130a │ │ + b.n d131a │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ subs r7, r0, #4 │ │ add.w r0, r0, r0 │ │ - b.n d0756 │ │ + b.n d0766 │ │ movs r4, r0 │ │ - b.n d12da │ │ + b.n d12ea │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ asrs r4, r4, #32 │ │ - b.n d0772 │ │ + b.n d0782 │ │ movs r1, r0 │ │ - b.n d0ef4 │ │ + b.n d0f04 │ │ @ instruction: 0xffef1aff │ │ - beq.n d0c84 │ │ - b.n d10e4 │ │ + beq.n d0c94 │ │ + b.n d10f4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r1, r2, sp, lr} │ │ - b.n d0f96 │ │ + b.n d0fa6 │ │ asrs r0, r5, #32 │ │ - b.n d078a │ │ + b.n d079a │ │ lsls r4, r6, #2 │ │ - b.n d1018 │ │ + b.n d1028 │ │ asrs r1, r0, #32 │ │ - b.n d0cee │ │ + b.n d0cfe │ │ movs r2, r0 │ │ - b.n d1106 │ │ + b.n d1116 │ │ subs r1, r2, #4 │ │ - b.n d0f48 │ │ + b.n d0f58 │ │ movs r1, r0 │ │ asrs r0, r0, #12 │ │ asrs r1, r4, #10 │ │ - b.n d0fb2 │ │ + b.n d0fc2 │ │ movs r0, r0 │ │ - b.n d0c78 │ │ + b.n d0c88 │ │ movs r0, r0 │ │ - b.n d113a │ │ - beq.n d0cb4 │ │ - b.n d1114 │ │ + b.n d114a │ │ + beq.n d0cc4 │ │ + b.n d1124 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r2, r4, r5, r7, r8, r9, sl} │ │ - b.n d1296 │ │ + b.n d12a6 │ │ lsrs r7, r7, #31 │ │ - b.n d1328 │ │ - beq.n d0cc4 │ │ - b.n d1124 │ │ + b.n d1338 │ │ + beq.n d0cd4 │ │ + b.n d1134 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r2, r8, sl, fp, ip, lr, pc} │ │ + ldmia.w sp!, {r2, r4, r8, sl, fp, ip, lr, pc} │ │ movs r0, r0 │ │ - ldr r0, [pc, #0] @ (d0c98 ) │ │ + ldr r0, [pc, #0] @ (d0ca8 ) │ │ stmdb sp!, {r0, r2, r3, ip, sp, pc} │ │ - b.n d0fde │ │ + b.n d0fee │ │ movs r0, #100 @ 0x64 │ │ - b.n d07e0 │ │ + b.n d07f0 │ │ movs r0, r0 │ │ - b.n d13e6 │ │ + b.n d13f6 │ │ asrs r0, r0, #32 │ │ - b.n d13ea │ │ + b.n d13fa │ │ movs r0, #2 │ │ - b.n d0dcc │ │ - add r4, r2 │ │ + b.n d0ddc │ │ + add r0, r2 │ │ @ instruction: 0xebfd0000 │ │ - b.n d1356 │ │ + b.n d1366 │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ lsls r4, r1, #1 │ │ - b.n d07fc │ │ + b.n d080c │ │ asrs r4, r1, #1 │ │ - b.n d0800 │ │ + b.n d0810 │ │ movs r0, r0 │ │ - b.n d0de4 │ │ + b.n d0df4 │ │ asrs r1, r0, #32 │ │ - b.n d0de8 │ │ + b.n d0df8 │ │ movs r0, r6 │ │ - b.n d11ce │ │ + b.n d11de │ │ subs r3, r3, #4 │ │ add.w r0, r0, r0 │ │ - b.n d1376 │ │ + b.n d1386 │ │ ldrh r0, [r0, #0] │ │ lsrs r5, r7, #2 │ │ movs r4, r7 │ │ - b.n d081c │ │ + b.n d082c │ │ movs r1, #206 @ 0xce │ │ - b.n d12e2 │ │ + b.n d12f2 │ │ asrs r0, r7, #32 │ │ - b.n d0824 │ │ + b.n d0834 │ │ movs r0, r0 │ │ - b.n d0e08 │ │ + b.n d0e18 │ │ asrs r1, r0, #32 │ │ - b.n d0e0c │ │ - cmp r0, #65 @ 0x41 │ │ + b.n d0e1c │ │ + cmp r0, #64 @ 0x40 │ │ @ instruction: 0xebff001c │ │ - b.n d0834 │ │ + b.n d0844 │ │ movs r1, #205 @ 0xcd │ │ - b.n d12fa │ │ + b.n d130a │ │ asrs r0, r3, #32 │ │ - b.n d083c │ │ + b.n d084c │ │ movs r0, r0 │ │ - b.n d0e20 │ │ + b.n d0e30 │ │ asrs r1, r0, #32 │ │ - b.n d0e24 │ │ - cmp r0, #59 @ 0x3b │ │ + b.n d0e34 │ │ + cmp r0, #58 @ 0x3a │ │ @ instruction: 0xebff0130 │ │ movs r0, r0 │ │ - blt.n d0c20 │ │ + blt.n d0c50 │ │ movs r0, r0 │ │ lsls r0, r3, #9 │ │ movs r0, r0 │ │ - bl 13acfe │ │ - pop {r2, r4, r6, r7, pc} │ │ - vsli.64 , q10, #51 @ 0x33 │ │ - vqrdmulh.s , , d28[0] │ │ + bl 17ad0e │ │ + pop {r0, r3, r5, r6, r7, pc} │ │ + @ instruction: 0xfff3f5e4 │ │ + @ instruction: 0xfff3be01 │ │ vcvt.f16.u16 q10, q8, #13 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n d1248 │ │ - beq.n d0d90 │ │ - b.n d11cc │ │ + b.n d1258 │ │ + beq.n d0da0 │ │ + b.n d11dc │ │ ands r0, r0 │ │ - b.n d1076 │ │ + b.n d1086 │ │ lsls r0, r3, #2 │ │ - b.n d0878 │ │ + b.n d0888 │ │ lsls r0, r2, #1 │ │ movt r0, #260 @ 0x104 │ │ - b.n d1082 │ │ + b.n d1092 │ │ movs r0, r0 │ │ - b.n d0e64 │ │ + b.n d0e74 │ │ lsrs r7, r1, #11 │ │ - bne.w 55736 │ │ + bne.w 55746 │ │ @ instruction: 0xebff0000 │ │ - b.n d13f2 │ │ + b.n d1402 │ │ movs r0, r3 │ │ subs r0, r0, r0 │ │ lsls r4, r7, #1 │ │ - b.n d0898 │ │ + b.n d08a8 │ │ asrs r0, r0, #32 │ │ - b.n d149e │ │ + b.n d14ae │ │ movs r0, r0 │ │ - b.n d0e80 │ │ + b.n d0e90 │ │ subs r6, r3, #4 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n d10aa │ │ + b.n d10ba │ │ movs r1, r0 │ │ - b.n d144e │ │ + b.n d145e │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ lsls r4, r4, #1 │ │ - b.n d08b4 │ │ + b.n d08c4 │ │ asrs r0, r0, #32 │ │ - b.n d14ba │ │ + b.n d14ca │ │ movs r0, r0 │ │ - b.n d0e9c │ │ + b.n d0eac │ │ subs r7, r2, #4 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n d10c6 │ │ + b.n d10d6 │ │ movs r1, r0 │ │ - b.n d146a │ │ + b.n d147a │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ asrs r6, r0, #32 │ │ - b.n d12ac │ │ + b.n d12bc │ │ movs r5, r0 │ │ - b.n d10d6 │ │ + b.n d10e6 │ │ movs r0, #42 @ 0x2a │ │ - b.n d14da │ │ + b.n d14ea │ │ subs r0, r3, #3 │ │ add.w r0, r0, r0, lsl #24 │ │ - b.n d10e2 │ │ + b.n d10f2 │ │ movs r5, r0 │ │ - b.n d10e6 │ │ + b.n d10f6 │ │ subs r5, r7, #3 │ │ add.w r0, r0, r1 │ │ - b.n d145a │ │ + b.n d146a │ │ movs r3, r0 │ │ add r2, sp, #0 │ │ lsls r0, r2, #1 │ │ movt sl, #207 @ 0xcf │ │ - bl ff114dda │ │ - b.n d1254 │ │ + bl ff114dea │ │ + b.n d1264 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r1, r2, ip} │ │ - b.n d12e0 │ │ + b.n d12f0 │ │ movs r4, r0 │ │ - b.n d110a │ │ + b.n d111a │ │ movs r0, #6 │ │ - b.n d110e │ │ + b.n d111e │ │ ldrh r1, [r1, #46] @ 0x2e │ │ @ instruction: 0xebfffff6 │ │ - @ instruction: 0xeaff8a86 │ │ - @ instruction: 0xfff37fbe │ │ - vtbx.8 d29, {d19}, d21 │ │ + @ instruction: 0xeaff8b59 │ │ + @ instruction: 0xfff37ef9 │ │ + vtbl.8 d29, {d19-d21}, d31 │ │ @ instruction: 0xfff34bf0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n d1304 │ │ - beq.n d0dfc │ │ - b.n d1288 │ │ + b.n d1314 │ │ + beq.n d0e0c │ │ + b.n d1298 │ │ strb r4, [r1, #4] │ │ - b.n d0930 │ │ + b.n d0940 │ │ strb r7, [r0, #0] │ │ - b.n d0f14 │ │ + b.n d0f24 │ │ lsls r2, r3, #1 │ │ - b.n d09a8 │ │ + b.n d09b8 │ │ movs r3, r0 │ │ - b.n d149e │ │ + b.n d14ae │ │ movs r5, r6 │ │ cmp r2, #0 │ │ movs r4, r3 │ │ - b.n d0934 │ │ + b.n d0944 │ │ movs r0, r0 │ │ - b.n d14aa │ │ + b.n d14ba │ │ movs r2, r4 │ │ lsrs r0, r0, #8 │ │ strh r0, [r7, #6] │ │ - b.n d0950 │ │ + b.n d0960 │ │ ands r0, r0 │ │ - b.n d1556 │ │ + b.n d1566 │ │ str r0, [sp, #976] @ 0x3d0 │ │ - b.n d0958 │ │ + b.n d0968 │ │ str r7, [r7, r5] │ │ - b.n d141e │ │ + b.n d142e │ │ strh r0, [r1, #0] │ │ - b.n d0f40 │ │ + b.n d0f50 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n d0f44 │ │ + b.n d0f54 │ │ lsls r0, r5, #3 │ │ - b.n d0968 │ │ + b.n d0978 │ │ movs r0, r0 │ │ - b.n d0d6c │ │ + b.n d0d7c │ │ str r4, [r0, #16] │ │ - b.n d0d52 │ │ + b.n d0d62 │ │ lsls r2, r3, #1 │ │ - b.n d09e4 │ │ + b.n d09f4 │ │ movs r3, r0 │ │ - b.n d14da │ │ + b.n d14ea │ │ movs r5, r0 │ │ subs r2, #0 │ │ movs r3, r0 │ │ - b.n d1582 │ │ + b.n d1592 │ │ asrs r0, r1, #32 │ │ - b.n d1186 │ │ + b.n d1196 │ │ movs r1, #179 @ 0xb3 │ │ - b.n d144a │ │ + b.n d145a │ │ adds r0, #9 │ │ - b.n d118e │ │ + b.n d119e │ │ str r0, [r0, #0] │ │ - b.n d096c │ │ - cmp r0, #244 @ 0xf4 │ │ + b.n d097c │ │ + cmp r0, #243 @ 0xf3 │ │ @ instruction: 0xebff0006 │ │ - b.n d119a │ │ + b.n d11aa │ │ asrs r0, r6, #32 │ │ - b.n d09be │ │ + b.n d09ce │ │ movs r0, r0 │ │ - b.n d1504 │ │ + b.n d1514 │ │ ldc2l 11, cr1, [sl, #-1020]! @ 0xfffffc04 @ │ │ movs r6, r0 │ │ - b.n d11aa │ │ + b.n d11ba │ │ asrs r0, r2, #32 │ │ - b.n d09ce │ │ + b.n d09de │ │ movs r0, r0 │ │ - b.n d1514 │ │ + b.n d1524 │ │ ldc2l 11, cr1, [r6, #-1020]! @ 0xfffffc04 @ │ │ movs r5, r0 │ │ - b.n d0f86 │ │ + b.n d0f96 │ │ movs r7, r7 │ │ - b.n d15fe │ │ + b.n d160e │ │ lsls r0, r1, #1 │ │ - b.n d098e │ │ + b.n d099e │ │ movs r6, r0 │ │ - b.n d11c6 │ │ + b.n d11d6 │ │ ldc2 11, cr14, [r2, #1020]! @ 0x3fc @ │ │ movs r4, r3 │ │ - b.n d09bc │ │ + b.n d09cc │ │ ands r1, r0 │ │ - b.n d139a │ │ + b.n d13aa │ │ movs r0, r0 │ │ - b.n d113e │ │ + b.n d114e │ │ @ instruction: 0xffe23aff │ │ eors r0, r7 │ │ - b.n d09dc │ │ + b.n d09ec │ │ lsls r0, r7, #1 │ │ - b.n d09e0 │ │ + b.n d09f0 │ │ ands r4, r0 │ │ - b.n d0fc4 │ │ + b.n d0fd4 │ │ movs r0, r0 │ │ - b.n d0de8 │ │ + b.n d0df8 │ │ movs r4, r0 │ │ - b.n d114e │ │ + b.n d115e │ │ movs r0, r0 │ │ lsrs r0, r0, #8 │ │ subs r2, r0, #1 │ │ add.w r0, r0, r4, asr #1 │ │ - b.n d09f8 │ │ + b.n d0a08 │ │ str r0, [r2, r0] │ │ - b.n d15fe │ │ + b.n d160e │ │ movs r0, r0 │ │ - b.n d0fe0 │ │ + b.n d0ff0 │ │ lsrs r0, r6 │ │ - b.n d1246 │ │ + b.n d1256 │ │ movs r0, r0 │ │ - b.n d160a │ │ + b.n d161a │ │ movs r4, r3 │ │ - b.n d09dc │ │ + b.n d09ec │ │ movs r4, r6 │ │ - b.n d09e0 │ │ - beq.n d0f04 │ │ - b.n d136c │ │ + b.n d09f0 │ │ + beq.n d0f14 │ │ + b.n d137c │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r2, r5, ip} │ │ - b.n d0a1c │ │ + b.n d0a2c │ │ cmp r6, #27 │ │ - b.n d1622 │ │ + b.n d1632 │ │ movs r4, r3 │ │ - b.n d0a14 │ │ + b.n d0a24 │ │ adds r0, #28 │ │ - b.n d0a28 │ │ + b.n d0a38 │ │ asrs r1, r0, #32 │ │ - b.n d100c │ │ + b.n d101c │ │ movs r0, r0 │ │ - b.n d0a0c │ │ + b.n d0a1c │ │ movs r3, r0 │ │ - b.n d1636 │ │ + b.n d1646 │ │ adds r0, #3 │ │ - b.n d1018 │ │ - cmp r0, #202 @ 0xca │ │ + b.n d1028 │ │ + cmp r0, #201 @ 0xc9 │ │ @ instruction: 0xebffffbf │ │ - @ instruction: 0xeaffda58 │ │ + @ instruction: 0xeaffda68 │ │ movs r0, r0 │ │ - bl ffcf6eee │ │ - @ instruction: 0xb66d │ │ - vsri.64 , , #13 │ │ - vqrshrun.s64 d29, q3, #13 │ │ + bl ffce6efe │ │ + @ instruction: 0xb678 │ │ + vmls.i , , d17[0] │ │ + vtbl.8 d29, {d3-d5}, d16 │ │ vshr.u64 , q2, #13 │ │ movs r0, r0 │ │ - bls.n d0fec │ │ + bls.n d101c │ │ movs r0, r0 │ │ - beq.n d0fd0 │ │ + beq.n d0fe0 │ │ movs r0, r0 │ │ - beq.n d0fa4 │ │ + beq.n d0fb4 │ │ movs r0, r0 │ │ - ldr r7, [pc, #960] @ (d12e8 ) │ │ + ldr r7, [pc, #960] @ (d12f8 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n d1448 │ │ - beq.n d0f78 │ │ - b.n d13cc │ │ - add r0, pc, #0 @ (adr r0, d0f34 ) │ │ - b.n d1276 │ │ - bfcsel 18, d1736 , 1c, gt │ │ + b.n d1458 │ │ + beq.n d0f88 │ │ + b.n d13dc │ │ + add r0, pc, #0 @ (adr r0, d0f44 ) │ │ + b.n d1286 │ │ + bfcsel 18, d1746 , 1c, gt │ │ subs r4, r5, #3 │ │ add.w r2, r0, r4, asr #19 │ │ - b.n d0a80 │ │ + b.n d0a90 │ │ str r0, [r0, r0] │ │ - b.n d1286 │ │ + b.n d1296 │ │ ands r4, r0 │ │ - b.n d1068 │ │ + b.n d1078 │ │ movs r4, r3 │ │ - b.n d0a76 │ │ + b.n d0a86 │ │ movs r0, r0 │ │ - b.n d15f2 │ │ + b.n d1602 │ │ movs r2, r6 │ │ lsrs r0, r0, #8 │ │ strh r0, [r0, #0] │ │ - b.n d169a │ │ + b.n d16aa │ │ strb r0, [r0, #0] │ │ - b.n d169e │ │ + b.n d16ae │ │ lsls r0, r1, #11 │ │ - b.n d0aa0 │ │ + b.n d0ab0 │ │ movs r0, r0 │ │ - b.n d0ea4 │ │ + b.n d0eb4 │ │ str r1, [sp, #28] │ │ - b.n d0e8a │ │ + b.n d0e9a │ │ lsls r0, r5, #1 │ │ - b.n d0aa0 │ │ + b.n d0ab0 │ │ movs r5, r0 │ │ - b.n d1212 │ │ + b.n d1222 │ │ movs r4, r2 │ │ subs r0, r0, r0 │ │ movs r7, r0 │ │ - b.n d0b2c │ │ + b.n d0b3c │ │ movs r0, r2 │ │ - b.n d159e │ │ + b.n d15ae │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ lsls r4, r5, #1 │ │ - b.n d0ab8 │ │ + b.n d0ac8 │ │ subs r1, r5, #0 │ │ add.w r0, r0, r0, lsl #24 │ │ - b.n d12ce │ │ + b.n d12de │ │ movs r0, r6 │ │ - b.n d0ac4 │ │ + b.n d0ad4 │ │ lsrs r2, r0, #16 │ │ - b.n d1496 │ │ + b.n d14a6 │ │ movs r0, r0 │ │ - b.n d1246 │ │ + b.n d1256 │ │ movs r2, r1 │ │ subs r2, #0 │ │ asrs r0, r4, #1 │ │ - b.n d0ad4 │ │ + b.n d0ae4 │ │ lsls r1, r0, #10 │ │ - b.n d10a6 │ │ + b.n d10b6 │ │ movs r0, r0 │ │ - b.n d1256 │ │ + b.n d1266 │ │ movs r6, r0 │ │ cmp r2, #0 │ │ lsls r4, r5, #1 │ │ - b.n d0ae4 │ │ + b.n d0af4 │ │ asrs r0, r0, #32 │ │ - b.n d16f6 │ │ + b.n d1706 │ │ subs r1, r4, #0 │ │ add.w r0, r0, r0 │ │ - b.n d165e │ │ + b.n d166e │ │ movs r0, r2 │ │ lsls r6, r2, #22 │ │ movs r5, r0 │ │ lsls r0, r2, #5 │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r3 │ │ - b.n d0af6 │ │ + b.n d0b06 │ │ strb r1, [r0, #0] │ │ - b.n d14e0 │ │ + b.n d14f0 │ │ movs r0, r0 │ │ - b.n d1284 │ │ + b.n d1294 │ │ @ instruction: 0xffe03aff │ │ movs r0, r2 │ │ and.w r0, r0, r0, lsr #32 │ │ - b.n d14ee │ │ + b.n d14fe │ │ subs r7, r3, #6 │ │ - b.n d1306 │ │ + b.n d1316 │ │ movs r5, r0 │ │ - b.n d128c │ │ + b.n d129c │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ - bl 52caee │ │ + bl 52cafe │ │ subs r0, r3, #6 │ │ - b.n d12f6 │ │ + b.n d1306 │ │ movs r0, r0 │ │ - b.n d169c │ │ + b.n d16ac │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ subs r7, r3, #6 │ │ - b.n d1322 │ │ + b.n d1332 │ │ movs r5, r0 │ │ - b.n d12a8 │ │ + b.n d12b8 │ │ @ instruction: 0xfff90aff │ │ - bl 4f0b0a │ │ - bl 52cb0e │ │ + bl 4f0b1a │ │ + bl 52cb1e │ │ asrs r1, r0, #32 │ │ - b.n d1756 │ │ + b.n d1766 │ │ lsls r0, r1, #1 │ │ - b.n d0b4c │ │ + b.n d0b5c │ │ asrs r0, r1, #7 │ │ - b.n d0b1e │ │ + b.n d0b2e │ │ @ instruction: 0xffe9eaff │ │ lsls r7, r2, #18 │ │ - b.n d1632 │ │ + b.n d1642 │ │ lsrs r1, r3, #13 │ │ - b.n d16c4 │ │ + b.n d16d4 │ │ str r2, [r3, #8] │ │ - b.n d113c │ │ + b.n d114c │ │ subs r7, r3, #2 │ │ add.w sl, r0, r7, lsr #4 │ │ - b.n d1648 │ │ + b.n d1658 │ │ cmp r4, #111 @ 0x6f │ │ - b.n d1648 │ │ + b.n d1658 │ │ adds r2, r4, r5 │ │ - b.n d16c8 │ │ + b.n d16d8 │ │ subs r6, #192 @ 0xc0 │ │ - b.n d165e │ │ + b.n d166e │ │ str r0, [r2, r6] │ │ - b.n d1148 │ │ + b.n d1158 │ │ movs r0, #224 @ 0xe0 │ │ - b.n d16ca │ │ + b.n d16da │ │ adds r0, #240 @ 0xf0 │ │ - b.n d16ce │ │ + b.n d16de │ │ strh r0, [r2, #6] │ │ - b.n d13e6 │ │ + b.n d13f6 │ │ asrs r0, r2, #14 │ │ - b.n d109c │ │ + b.n d10ac │ │ strb r2, [r3, #10] │ │ - b.n d109e │ │ + b.n d10ae │ │ asrs r6, r0, #32 │ │ - b.n d10a8 │ │ + b.n d10b8 │ │ movs r0, #2 │ │ - b.n d10a8 │ │ + b.n d10b8 │ │ adds r0, #13 │ │ - b.n d17a6 │ │ + b.n d17b6 │ │ adds r4, #1 │ │ - b.n d1370 │ │ + b.n d1380 │ │ movs r4, #2 │ │ - b.n d13ae │ │ - ldr r4, [pc, #132] @ (d10f4 ) │ │ - b.n d1376 │ │ + b.n d13be │ │ + ldr r4, [pc, #132] @ (d1104 ) │ │ + b.n d1386 │ │ stmia r0!, {r2} │ │ - b.n d10c8 │ │ + b.n d10d8 │ │ strb r3, [r0, #0] │ │ - b.n d10ca │ │ + b.n d10da │ │ strb r4, [r1, #0] │ │ - b.n d13ac │ │ + b.n d13bc │ │ movs r3, r2 │ │ subs r0, r0, r0 │ │ strh r0, [r7, #14] │ │ - b.n d1420 │ │ + b.n d1430 │ │ ldr r7, [r3, #120] @ 0x78 │ │ - b.n d13fe │ │ + b.n d140e │ │ str r3, [r0, r0] │ │ - b.n d10da │ │ + b.n d10ea │ │ strb r4, [r0, #0] │ │ - b.n d10e0 │ │ + b.n d10f0 │ │ strb r7, [r0, #0] │ │ - b.n d13c0 │ │ + b.n d13d0 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ str r0, [r0, #0] │ │ - b.n d17de │ │ - bl 52cb9e │ │ + b.n d17ee │ │ + bl 52cbae │ │ strb r6, [r0, #0] │ │ - b.n d13e6 │ │ + b.n d13f6 │ │ ldrsh r6, [r2, r6] │ │ - b.n d13fe │ │ + b.n d140e │ │ movs r0, r0 │ │ - b.n d1758 │ │ + b.n d1768 │ │ movs r7, r5 │ │ lsrs r0, r0, #8 │ │ ldrh r7, [r3, #60] @ 0x3c │ │ - b.n d142a │ │ + b.n d143a │ │ str r3, [r0, r0] │ │ - b.n d110a │ │ + b.n d111a │ │ movs r0, #4 │ │ - b.n d1110 │ │ + b.n d1120 │ │ movs r0, #2 │ │ - b.n d13ec │ │ + b.n d13fc │ │ @ instruction: 0xfff60aff │ │ - bl 4f0bc6 │ │ - bl 52cbca │ │ + bl 4f0bd6 │ │ + bl 52cbda │ │ strh r0, [r3, #14] │ │ - b.n d146c │ │ + b.n d147c │ │ movs r0, #192 @ 0xc0 │ │ - b.n d1816 │ │ + b.n d1826 │ │ asrs r1, r0, #16 │ │ - b.n d13de │ │ + b.n d13ee │ │ movs r0, #1 │ │ - b.n d112e │ │ + b.n d113e │ │ movs r0, #12 │ │ - b.n d1406 │ │ + b.n d1416 │ │ movs r1, r2 │ │ subs r0, r0, r0 │ │ cmp r7, #159 @ 0x9f │ │ - b.n d145e │ │ + b.n d146e │ │ strb r1, [r0, #0] │ │ - b.n d1132 │ │ + b.n d1142 │ │ movs r0, #4 │ │ - b.n d1138 │ │ + b.n d1148 │ │ movs r0, #2 │ │ - b.n d1424 │ │ + b.n d1434 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ movs r0, #0 │ │ - b.n d183e │ │ - bl 52cbfe │ │ + b.n d184e │ │ + bl 52cc0e │ │ adds r0, #2 │ │ - b.n d1446 │ │ + b.n d1456 │ │ ldrb r2, [r2, #30] │ │ - b.n d145e │ │ + b.n d146e │ │ movs r0, r0 │ │ - b.n d17bc │ │ + b.n d17cc │ │ movs r3, r3 │ │ lsrs r0, r0, #8 │ │ ldr r7, [r3, #120] @ 0x78 │ │ - b.n d148a │ │ + b.n d149a │ │ str r1, [r0, r0] │ │ - b.n d1166 │ │ + b.n d1176 │ │ strb r4, [r0, #0] │ │ - b.n d116c │ │ + b.n d117c │ │ strb r7, [r0, #0] │ │ - b.n d144c │ │ + b.n d145c │ │ @ instruction: 0xfff60aff │ │ - bl 4f0c26 │ │ - bl 52cc2a │ │ + bl 4f0c36 │ │ + bl 52cc3a │ │ lsrs r4, r7 │ │ - b.n d0c70 │ │ + b.n d0c80 │ │ ands r4, r0 │ │ - b.n d1254 │ │ + b.n d1264 │ │ asrs r2, r3, #1 │ │ - b.n d0ce2 │ │ + b.n d0cf2 │ │ movs r2, r0 │ │ - b.n d17e0 │ │ + b.n d17f0 │ │ movs r1, r4 │ │ cmp r2, #0 │ │ movs r4, r6 │ │ - b.n d0c6e │ │ - bl 52cc46 │ │ + b.n d0c7e │ │ + bl 52cc56 │ │ movs r0, r0 │ │ - b.n d17ee │ │ + b.n d17fe │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ movs r0, r7 │ │ - b.n d165e │ │ + b.n d166e │ │ subs r5, r2, #5 │ │ add.w r0, r0, r0 │ │ - b.n d17fe │ │ + b.n d180e │ │ movs r3, r5 │ │ subs r0, r0, r0 │ │ movs r0, r3 │ │ - b.n d166e │ │ - beq.n d11a0 │ │ - b.n d1600 │ │ - ldr r7, [pc, #960] @ (d152c ) │ │ + b.n d167e │ │ + beq.n d11b0 │ │ + b.n d1610 │ │ + ldr r7, [pc, #960] @ (d153c ) │ │ ldmia.w sp!, {r0, r1, r3, r4, r6, r9, sl, fp, ip} │ │ @ instruction: 0xea00f05b │ │ sbcs.w r0, pc, #28160 @ 0x6e00 │ │ - b.n d0cb8 │ │ + b.n d0cc8 │ │ ands r4, r0 │ │ - b.n d129c │ │ + b.n d12ac │ │ @ instruction: 0xffefeaff │ │ - bl 52cc82 │ │ + bl 52cc92 │ │ lsrs r0, r0 │ │ - b.n d0cc8 │ │ + b.n d0cd8 │ │ ands r4, r0 │ │ - b.n d12ac │ │ + b.n d12bc │ │ asrs r4, r6, #32 │ │ - b.n d169a │ │ + b.n d16aa │ │ lsrs r7, r3, #30 │ │ - b.n d14b8 │ │ + b.n d14c8 │ │ movs r0, #1 │ │ - b.n d161a │ │ + b.n d162a │ │ subs r7, #146 @ 0x92 │ │ - b.n d14a0 │ │ + b.n d14b0 │ │ movs r0, r0 │ │ - b.n d1848 │ │ + b.n d1858 │ │ @ instruction: 0xfffa1aff │ │ movs r0, r0 │ │ - b.n d184a │ │ - bl 52ccaa │ │ + b.n d185a │ │ + bl 52ccba │ │ @ instruction: 0xffe31aff │ │ lsls r0, r3, #2 │ │ - b.n d0cf4 │ │ + b.n d0d04 │ │ movs r1, #54 @ 0x36 │ │ - b.n d17ba │ │ + b.n d17ca │ │ asrs r4, r2, #2 │ │ - b.n d0cfc │ │ + b.n d0d0c │ │ movs r0, r0 │ │ - b.n d12e0 │ │ + b.n d12f0 │ │ asrs r1, r0, #32 │ │ - b.n d12e4 │ │ - movs r7, #11 │ │ + b.n d12f4 │ │ + movs r7, #10 │ │ @ instruction: 0xebff4000 │ │ - b.n d150e │ │ + b.n d151e │ │ subs r7, r0, #1 │ │ add.w r0, r0, ip, lsr #5 │ │ - b.n d0d14 │ │ + b.n d0d24 │ │ stmia r0!, {r3} │ │ - b.n d16f4 │ │ + b.n d1704 │ │ adds r0, #88 @ 0x58 │ │ - b.n d0d1c │ │ + b.n d0d2c │ │ movs r0, #88 @ 0x58 │ │ - b.n d0d20 │ │ + b.n d0d30 │ │ asrs r1, r0, #32 │ │ - b.n d1304 │ │ + b.n d1314 │ │ ands r0, r0 │ │ - b.n d0d04 │ │ + b.n d0d14 │ │ adds r0, #3 │ │ - b.n d130c │ │ + b.n d131c │ │ eors r4, r1 │ │ - b.n d0d30 │ │ + b.n d0d40 │ │ movs r0, #2 │ │ - b.n d1314 │ │ + b.n d1324 │ │ lsls r5, r0, #12 │ │ stmia.w ip, {r1} │ │ - b.n d193e │ │ + b.n d194e │ │ movs r1, #57 @ 0x39 │ │ - b.n d1802 │ │ + b.n d1812 │ │ ands r4, r0 │ │ - b.n d1324 │ │ - add r0, pc, #16 @ (adr r0, d1218 ) │ │ - b.n d0d24 │ │ - cmp r0, #6 │ │ + b.n d1334 │ │ + add r0, pc, #16 @ (adr r0, d1228 ) │ │ + b.n d0d34 │ │ + cmp r0, #5 │ │ @ instruction: 0xebffffcb │ │ @ instruction: 0xeaff002c │ │ - b.n d0d54 │ │ + b.n d0d64 │ │ movs r1, #62 @ 0x3e │ │ - b.n d181a │ │ + b.n d182a │ │ asrs r0, r5, #32 │ │ - b.n d0d5c │ │ + b.n d0d6c │ │ movs r0, r0 │ │ - b.n d1340 │ │ + b.n d1350 │ │ asrs r1, r0, #32 │ │ - b.n d1344 │ │ - movs r6, #243 @ 0xf3 │ │ - @ instruction: 0xebffd904 │ │ + b.n d1354 │ │ + movs r6, #242 @ 0xf2 │ │ + @ instruction: 0xebffd914 │ │ movs r0, r0 │ │ ldmia r7, {r2, r3, r4, r7} │ │ movs r0, r0 │ │ - bvc.n d1264 │ │ + bvc.n d1294 │ │ movs r0, r0 │ │ - ldrh r1, [r3, #62] @ 0x3e │ │ - vqshlu.s64 q15, q2, #51 @ 0x33 │ │ - vqrdmulh.s , , d22[0] │ │ - vmlsl.u , d3, d8[0] │ │ - movs r0, r0 │ │ - udf #115 @ 0x73 │ │ - @ instruction: 0xfff38f99 │ │ - vmlsl.u , d19, d0[0] │ │ + str r0, [sp, #696] @ 0x2b8 │ │ + vqshl.u32 q15, q5, #19 │ │ + @ instruction: 0xfff3bdd9 │ │ + vqshlu.s32 , q4, #19 │ │ movs r0, r0 │ │ - @ instruction: 0xebdffff3 │ │ - ldrh r1, [r7, #62] @ 0x3e │ │ + svc 242 @ 0xf2 │ │ + vmla.i , , d30[0] │ │ vqshlu.s64 , q0, #51 @ 0x33 │ │ movs r0, r0 │ │ - ldr r7, [pc, #960] @ (d1620 ) │ │ + ldc 15, cr15, [pc], {243} @ 0xf3 │ │ + str r0, [sp, #824] @ 0x338 │ │ + vmlsl.u , d19, d16[0] │ │ + movs r0, r0 │ │ + ldr r7, [pc, #960] @ (d1630 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n d1780 │ │ - beq.n d12c0 │ │ - b.n d1704 │ │ + b.n d1790 │ │ + beq.n d12d0 │ │ + b.n d1714 │ │ strh r0, [r0, #0] │ │ - b.n d15ae │ │ + b.n d15be │ │ bfx 14, r4 │ │ strb r0, [r1, #16] │ │ - b.n d0db4 │ │ + b.n d0dc4 │ │ strb r7, [r0, #0] │ │ - b.n d1398 │ │ + b.n d13a8 │ │ movs r0, r6 │ │ - b.n d0dac │ │ + b.n d0dbc │ │ adds r3, r5, #5 │ │ add.w r0, r0, r0 │ │ - b.n d1926 │ │ + b.n d1936 │ │ lsls r1, r4, #1 │ │ lsrs r0, r0, #8 │ │ - add r0, pc, #0 @ (adr r0, d128c ) │ │ - b.n d15ce │ │ + add r0, pc, #0 @ (adr r0, d129c ) │ │ + b.n d15de │ │ lsls r7, r2, #18 │ │ - b.n d189e │ │ + b.n d18ae │ │ lsrs r1, r3, #13 │ │ - b.n d1930 │ │ + b.n d1940 │ │ str r0, [sp, #616] @ 0x268 │ │ - b.n d13a6 │ │ + b.n d13b6 │ │ subs r4, r0, #0 │ │ add.w sl, r0, r7, lsr #4 │ │ - b.n d18b4 │ │ + b.n d18c4 │ │ subs r4, #111 @ 0x6f │ │ - b.n d18b4 │ │ + b.n d18c4 │ │ adds r2, r4, r5 │ │ - b.n d1934 │ │ + b.n d1944 │ │ adds r0, #224 @ 0xe0 │ │ - b.n d192e │ │ + b.n d193e │ │ asrs r0, r2, #6 │ │ - b.n d13b6 │ │ + b.n d13c6 │ │ lsrs r0, r2 │ │ - b.n d164a │ │ + b.n d165a │ │ rors r0, r7 │ │ - b.n d1654 │ │ + b.n d1664 │ │ str r2, [r3, #56] @ 0x38 │ │ - b.n d1304 │ │ + b.n d1314 │ │ ldr r0, [r0, #108] @ 0x6c │ │ - b.n d18de │ │ + b.n d18ee │ │ str r0, [r6, #12] │ │ - b.n d1946 │ │ + b.n d1956 │ │ movs r6, #144 @ 0x90 │ │ - b.n d130e │ │ + b.n d131e │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n d1310 │ │ + b.n d1320 │ │ asrs r3, r0, #32 │ │ - b.n d1316 │ │ + b.n d1326 │ │ movs r0, #13 │ │ - b.n d1a16 │ │ - b.n d0aea │ │ - b.n d15de │ │ + b.n d1a26 │ │ + b.n d0afa │ │ + b.n d15ee │ │ asrs r1, r0, #16 │ │ - b.n d161e │ │ + b.n d162e │ │ movs r0, #14 │ │ - b.n d132a │ │ + b.n d133a │ │ adds r1, r5, #0 │ │ - b.n d15e8 │ │ + b.n d15f8 │ │ stmia r0!, {r0} │ │ - b.n d1334 │ │ + b.n d1344 │ │ movs r0, #12 │ │ - b.n d1612 │ │ + b.n d1622 │ │ movs r2, r2 │ │ subs r0, r0, r0 │ │ cmp r7, #159 @ 0x9f │ │ - b.n d166a │ │ + b.n d167a │ │ ands r6, r1 │ │ - b.n d133e │ │ + b.n d134e │ │ movs r0, #1 │ │ - b.n d1344 │ │ + b.n d1354 │ │ movs r0, #2 │ │ - b.n d162a │ │ + b.n d163a │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ movs r0, #0 │ │ - b.n d1a4a │ │ - bl 52ce0a │ │ + b.n d1a5a │ │ + bl 52ce1a │ │ adds r0, #2 │ │ - b.n d1652 │ │ + b.n d1662 │ │ ldr r2, [r2, #120] @ 0x78 │ │ - b.n d166a │ │ + b.n d167a │ │ movs r0, r0 │ │ - b.n d19c6 │ │ + b.n d19d6 │ │ movs r0, r6 │ │ lsrs r0, r0, #8 │ │ - ldr r7, [pc, #636] @ (d159c ) │ │ - b.n d1696 │ │ + ldr r7, [pc, #636] @ (d15ac ) │ │ + b.n d16a6 │ │ str r6, [r1, #0] │ │ - b.n d136e │ │ + b.n d137e │ │ ands r1, r0 │ │ - b.n d1374 │ │ + b.n d1384 │ │ ands r4, r0 │ │ - b.n d165a │ │ + b.n d166a │ │ @ instruction: 0xfff60aff │ │ - bl 4f0e32 │ │ - bl 52ce36 │ │ + bl 4f0e42 │ │ + bl 52ce46 │ │ rors r0, r3 │ │ - b.n d16d8 │ │ + b.n d16e8 │ │ movs r0, #192 @ 0xc0 │ │ - b.n d1a82 │ │ - b.n d0b56 │ │ - b.n d164a │ │ + b.n d1a92 │ │ + b.n d0b66 │ │ + b.n d165a │ │ movs r0, #14 │ │ - b.n d1392 │ │ + b.n d13a2 │ │ movs r0, #12 │ │ - b.n d1672 │ │ + b.n d1682 │ │ movs r2, r2 │ │ subs r0, r0, r0 │ │ cmp r7, #159 @ 0x9f │ │ - b.n d16ca │ │ + b.n d16da │ │ str r6, [r1, r0] │ │ - b.n d139e │ │ + b.n d13ae │ │ movs r0, #1 │ │ - b.n d13a4 │ │ + b.n d13b4 │ │ movs r0, #2 │ │ - b.n d168c │ │ + b.n d169c │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ movs r0, #0 │ │ - b.n d1aaa │ │ - bl 52ce6a │ │ + b.n d1aba │ │ + bl 52ce7a │ │ adds r0, #2 │ │ - b.n d16b2 │ │ + b.n d16c2 │ │ ldrsh r2, [r2, r6] │ │ - b.n d16ca │ │ + b.n d16da │ │ movs r0, r0 │ │ - b.n d1a24 │ │ + b.n d1a34 │ │ movs r2, r3 │ │ lsrs r0, r0, #8 │ │ - ldr r7, [pc, #636] @ (d15fc ) │ │ - b.n d16f6 │ │ + ldr r7, [pc, #636] @ (d160c ) │ │ + b.n d1706 │ │ str r6, [r1, #0] │ │ - b.n d13ce │ │ + b.n d13de │ │ str r1, [r0, r0] │ │ - b.n d13d4 │ │ + b.n d13e4 │ │ str r5, [r0, #0] │ │ - b.n d16ba │ │ + b.n d16ca │ │ @ instruction: 0xfff60aff │ │ - bl 4f0e92 │ │ - bl 52ce96 │ │ + bl 4f0ea2 │ │ + bl 52cea6 │ │ rors r0, r3 │ │ - b.n d1738 │ │ + b.n d1748 │ │ asrs r2, r3, #1 │ │ - b.n d0f50 │ │ + b.n d0f60 │ │ movs r2, r0 │ │ - b.n d1a48 │ │ + b.n d1a58 │ │ movs r1, r3 │ │ subs r2, #0 │ │ asrs r4, r2, #11 │ │ - b.n d0eec │ │ + b.n d0efc │ │ adds r2, #212 @ 0xd4 │ │ - b.n d0ef0 │ │ + b.n d0f00 │ │ movs r2, #212 @ 0xd4 │ │ - b.n d0ef4 │ │ + b.n d0f04 │ │ asrs r1, r0, #32 │ │ - b.n d14d8 │ │ + b.n d14e8 │ │ lsls r1, r0, #16 │ │ stmia.w sp, {r0, r1, ip, sp} │ │ - b.n d14e0 │ │ + b.n d14f0 │ │ movs r0, #2 │ │ - b.n d14e4 │ │ + b.n d14f4 │ │ movs r4, r1 │ │ - b.n d18e4 │ │ + b.n d18f4 │ │ strh r0, [r1, #0] │ │ - b.n d0ee8 │ │ + b.n d0ef8 │ │ movs r4, r6 │ │ stmia.w r0, {r1} │ │ - b.n d1b16 │ │ + b.n d1b26 │ │ cmp r7, #122 @ 0x7a │ │ - b.n d1b1a │ │ - movs r7, #146 @ 0x92 │ │ + b.n d1b2a │ │ + movs r7, #145 @ 0x91 │ │ @ instruction: 0xebff000b │ │ @ instruction: 0xea00f05b │ │ sbcs.w r0, pc, #8978432 @ 0x890000 │ │ and.w r0, r0, r4, ror #4 │ │ - b.n d18fc │ │ - bl 52ceee │ │ + b.n d190c │ │ + bl 52cefe │ │ lsrs r7, r3, #30 │ │ - b.n d1718 │ │ + b.n d1728 │ │ movs r0, #1 │ │ - b.n d187a │ │ + b.n d188a │ │ subs r7, #146 @ 0x92 │ │ - b.n d1700 │ │ + b.n d1710 │ │ movs r0, r0 │ │ - b.n d1aa8 │ │ + b.n d1ab8 │ │ @ instruction: 0xfffa1aff │ │ movs r0, r0 │ │ - b.n d1aaa │ │ - bl 52cf0a │ │ + b.n d1aba │ │ + bl 52cf1a │ │ lsls r5, r2, #2 │ │ lsrs r0, r0, #8 │ │ asrs r4, r4, #32 │ │ - b.n d1930 │ │ + b.n d1940 │ │ movs r0, r0 │ │ - b.n d1b5a │ │ + b.n d1b6a │ │ adds r4, r1, #6 │ │ add.w r0, r0, r0 │ │ - b.n d1ac2 │ │ + b.n d1ad2 │ │ lsls r2, r1, #2 │ │ subs r0, r0, r0 │ │ asrs r0, r0, #4 │ │ - b.n d1a46 │ │ + b.n d1a56 │ │ movs r0, r5 │ │ - b.n d0f68 │ │ + b.n d0f78 │ │ asrs r5, r6, #23 │ │ - b.n d1ab2 │ │ + b.n d1ac2 │ │ asrs r1, r0, #32 │ │ - b.n d1536 │ │ + b.n d1546 │ │ asrs r0, r5, #32 │ │ - b.n d0f54 │ │ + b.n d0f64 │ │ adds r0, r0, r4 │ │ - b.n d1a5a │ │ + b.n d1a6a │ │ asrs r4, r4, #22 │ │ - b.n d1ac8 │ │ + b.n d1ad8 │ │ movs r1, r0 │ │ - b.n d16e6 │ │ + b.n d16f6 │ │ movs r6, r0 │ │ rev r0, r0 │ │ asrs r0, r0, #28 │ │ - b.n d1a50 │ │ + b.n d1a60 │ │ movs r0, #36 @ 0x24 │ │ - b.n d0f8c │ │ + b.n d0f9c │ │ subs r3, r3, r1 │ │ - b.n d1aee │ │ + b.n d1afe │ │ movs r1, r0 │ │ - b.n d155a │ │ + b.n d156a │ │ movs r0, r5 │ │ - b.n d0f78 │ │ + b.n d0f88 │ │ movs r1, r0 │ │ - b.n d1966 │ │ + b.n d1976 │ │ movs r4, r4 │ │ - b.n d0f80 │ │ + b.n d0f90 │ │ str r2, [sp, #176] @ 0xb0 │ │ - b.n d0fa8 │ │ + b.n d0fb8 │ │ str r4, [r4, #0] │ │ - b.n d1988 │ │ + b.n d1998 │ │ strh r0, [r5, r0] │ │ - b.n d0fb0 │ │ + b.n d0fc0 │ │ ands r4, r0 │ │ - b.n d1c36 │ │ + b.n d1c46 │ │ str r0, [sp, #36] @ 0x24 │ │ - b.n d1598 │ │ + b.n d15a8 │ │ str r5, [r0, r0] │ │ - b.n d159c │ │ + b.n d15ac │ │ asrs r4, r6, #32 │ │ - b.n d0fb0 │ │ - bl 52cf82 │ │ + b.n d0fc0 │ │ + bl 52cf92 │ │ movs r0, r0 │ │ - b.n d1b2c │ │ + b.n d1b3c │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ lsls r2, r3, #1 │ │ - b.n d1040 │ │ + b.n d1050 │ │ movs r3, r0 │ │ - b.n d1b36 │ │ + b.n d1b46 │ │ movs r6, r0 │ │ cmp r2, #0 │ │ movs r0, r7 │ │ - b.n d19ac │ │ + b.n d19bc │ │ asrs r0, r3, #32 │ │ - b.n d19b0 │ │ + b.n d19c0 │ │ movs r0, #6 │ │ - b.n d17e6 │ │ + b.n d17f6 │ │ subs r5, r0, #2 │ │ add.w r0, r0, r4 │ │ - b.n d16ce │ │ + b.n d16de │ │ @ instruction: 0xfff20aff │ │ movs r7, r0 │ │ @ instruction: 0xea008000 │ │ - b.n d0fd4 │ │ + b.n d0fe4 │ │ movs r3, r0 │ │ - b.n d1bfe │ │ + b.n d1c0e │ │ asrs r4, r0, #32 │ │ - b.n d0fdc │ │ + b.n d0fec │ │ asrs r1, r1, #32 │ │ - b.n d1806 │ │ + b.n d1816 │ │ cmp r7, #126 @ 0x7e │ │ - b.n d1c0a │ │ + b.n d1c1a │ │ adds r0, #5 │ │ - b.n d180e │ │ - movs r7, #85 @ 0x55 │ │ + b.n d181e │ │ + movs r7, #84 @ 0x54 │ │ @ instruction: 0xebfffff0 │ │ @ instruction: 0xeaff0030 │ │ - b.n d1008 │ │ + b.n d1018 │ │ adds r4, r3, #4 │ │ add.w r0, r0, r0 │ │ - b.n d1b82 │ │ + b.n d1b92 │ │ lsls r4, r2, #1 │ │ subs r0, r0, r0 │ │ ldc2 11, cr14, [r4], {255} @ 0xff @ │ │ movs r4, r3 │ │ - b.n d101c │ │ + b.n d102c │ │ movs r0, r0 │ │ - b.n d1b92 │ │ + b.n d1ba2 │ │ movs r0, r2 │ │ subs r0, r0, r0 │ │ sbcs r0, r5 │ │ - b.n d1038 │ │ + b.n d1048 │ │ str r0, [r0, r0] │ │ - b.n d1c3e │ │ + b.n d1c4e │ │ asrs r4, r4, #6 │ │ - b.n d1040 │ │ + b.n d1050 │ │ ands r4, r0 │ │ - b.n d1624 │ │ + b.n d1634 │ │ str r4, [r3, r0] │ │ - b.n d1018 │ │ + b.n d1028 │ │ asrs r1, r0, #32 │ │ - b.n d162c │ │ + b.n d163c │ │ str r4, [r0, r0] │ │ - b.n d101a │ │ + b.n d102a │ │ lsls r4, r2, #6 │ │ - b.n d1054 │ │ + b.n d1064 │ │ movs r0, r0 │ │ - b.n d1458 │ │ + b.n d1468 │ │ movs r1, r0 │ │ - b.n d17be │ │ + b.n d17ce │ │ movs r0, r0 │ │ lsrs r0, r0, #8 │ │ adds r6, r4, #2 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n d1032 │ │ - bfcsel 18, d1d2a , 1c, mi │ │ + b.n d1042 │ │ + bfcsel 18, d1d3a , 1c, mi │ │ stc2 11, cr14, [r2], {255} @ 0xff @ │ │ - beq.n d156c │ │ - b.n d19cc │ │ + beq.n d157c │ │ + b.n d19dc │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {sp, pc} │ │ - b.n d1c7e │ │ + b.n d1c8e │ │ str r0, [r0, #0] │ │ - b.n d1c82 │ │ + b.n d1c92 │ │ lsls r0, r3, #5 │ │ - b.n d1084 │ │ + b.n d1094 │ │ movs r0, r0 │ │ - b.n d1488 │ │ + b.n d1498 │ │ str r6, [r0, r4] │ │ - b.n d146e │ │ + b.n d147e │ │ lsls r0, r5, #1 │ │ - b.n d107c │ │ + b.n d108c │ │ movs r0, r1 │ │ - b.n d17f6 │ │ + b.n d1806 │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #32 │ │ - b.n d1088 │ │ + b.n d1098 │ │ lsls r1, r0, #8 │ │ - b.n d1b84 │ │ + b.n d1b94 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ movs r4, r3 │ │ - b.n d1098 │ │ + b.n d10a8 │ │ str r1, [r0, #0] │ │ - b.n d1a7a │ │ + b.n d1a8a │ │ movs r0, r0 │ │ - b.n d181e │ │ + b.n d182e │ │ @ instruction: 0xfff23aff │ │ @ instruction: 0xffdeeaff │ │ lsls r4, r5, #1 │ │ - b.n d10a8 │ │ + b.n d10b8 │ │ asrs r7, r1, #8 │ │ - b.n d1a84 │ │ + b.n d1a94 │ │ ands r0, r6 │ │ - b.n d10b0 │ │ + b.n d10c0 │ │ str r0, [sp, #384] @ 0x180 │ │ - b.n d10b4 │ │ + b.n d10c4 │ │ asrs r4, r0, #32 │ │ - b.n d1098 │ │ + b.n d10a8 │ │ adds r7, r5, #3 │ │ add.w r0, r0, r0 │ │ - b.n d1c36 │ │ + b.n d1c46 │ │ movs r7, r4 │ │ subs r0, r0, r0 │ │ @ instruction: 0xfbe7ebff │ │ movs r1, r0 │ │ - b.n d1c54 │ │ + b.n d1c64 │ │ @ instruction: 0xffefbaff │ │ lsls r1, r1, #10 │ │ - b.n d16b2 │ │ + b.n d16c2 │ │ adds r2, r0, #0 │ │ - b.n d1ab6 │ │ + b.n d1ac6 │ │ lsrs r2, r0, #16 │ │ - b.n d1ab2 │ │ + b.n d1ac2 │ │ movs r0, #0 │ │ - b.n d1cf6 │ │ + b.n d1d06 │ │ asrs r0, r2, #32 │ │ - b.n d1abc │ │ + b.n d1acc │ │ adds r0, #0 │ │ - b.n d10e0 │ │ + b.n d10f0 │ │ movs r0, r1 │ │ - b.n d1868 │ │ + b.n d1878 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ adds r0, #32 │ │ - b.n d1acc │ │ + b.n d1adc │ │ asrs r0, r2, #32 │ │ - b.n d1ad0 │ │ + b.n d1ae0 │ │ movs r0, r0 │ │ - b.n d1874 │ │ + b.n d1884 │ │ asrs r3, r0, #32 │ │ - b.n d1916 │ │ + b.n d1926 │ │ @ instruction: 0xfff73aff │ │ movs r0, r2 │ │ and.w pc, r0, pc, lsr #10 │ │ - b.n d1904 │ │ + b.n d1914 │ │ movs r0, r1 │ │ - b.n d188a │ │ + b.n d189a │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ - bl 52d0ea │ │ + bl 52d0fa │ │ cmp r7, #154 @ 0x9a │ │ - b.n d18f4 │ │ + b.n d1904 │ │ movs r0, r0 │ │ - b.n d1c9a │ │ + b.n d1caa │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ cmp r7, #159 @ 0x9f │ │ - b.n d1920 │ │ + b.n d1930 │ │ movs r0, r1 │ │ - b.n d18a6 │ │ + b.n d18b6 │ │ @ instruction: 0xfff90aff │ │ - bl 4f1106 │ │ + bl 4f1116 │ │ asrs r0, r2, #32 │ │ - b.n d1b10 │ │ + b.n d1b20 │ │ movs r0, #1 │ │ - b.n d1d52 │ │ + b.n d1d62 │ │ movs r0, r0 │ │ - b.n d18b8 │ │ - bl 52d116 │ │ + b.n d18c8 │ │ + bl 52d126 │ │ @ instruction: 0xffe53aff │ │ movs r1, r0 │ │ and.w r0, r0, r1 │ │ - b.n d1c4a │ │ + b.n d1c5a │ │ @ instruction: 0xffce0aff │ │ lsls r0, r1, #1 │ │ - b.n d1158 │ │ + b.n d1168 │ │ asrs r1, r0, #32 │ │ - b.n d1d72 │ │ + b.n d1d82 │ │ asrs r0, r1, #7 │ │ - b.n d1136 │ │ + b.n d1146 │ │ @ instruction: 0xffcaeaff │ │ lsls r0, r7, #1 │ │ - b.n d117c │ │ + b.n d118c │ │ movs r0, #40 @ 0x28 │ │ - b.n d1d82 │ │ + b.n d1d92 │ │ asrs r4, r6, #1 │ │ - b.n d1184 │ │ + b.n d1194 │ │ movs r0, r0 │ │ - b.n d1768 │ │ + b.n d1778 │ │ asrs r1, r0, #32 │ │ - b.n d176c │ │ - movs r5, #233 @ 0xe9 │ │ + b.n d177c │ │ + movs r5, #232 @ 0xe8 │ │ @ instruction: 0xebff0058 │ │ - b.n d1194 │ │ + b.n d11a4 │ │ movs r1, #237 @ 0xed │ │ - b.n d1c5a │ │ + b.n d1c6a │ │ asrs r4, r2, #1 │ │ - b.n d119c │ │ + b.n d11ac │ │ movs r0, r0 │ │ - b.n d1780 │ │ + b.n d1790 │ │ asrs r1, r0, #32 │ │ - b.n d1784 │ │ - movs r5, #227 @ 0xe3 │ │ + b.n d1794 │ │ + movs r5, #226 @ 0xe2 │ │ @ instruction: 0xebff0020 │ │ - b.n d11ac │ │ + b.n d11bc │ │ movs r1, #229 @ 0xe5 │ │ - b.n d1c72 │ │ + b.n d1c82 │ │ asrs r4, r3, #32 │ │ - b.n d11b4 │ │ + b.n d11c4 │ │ movs r0, r0 │ │ - b.n d1798 │ │ + b.n d17a8 │ │ asrs r1, r0, #32 │ │ - b.n d179c │ │ - movs r5, #221 @ 0xdd │ │ - @ instruction: 0xebffd5d4 │ │ - movs r0, r0 │ │ - add r7, pc, #772 @ (adr r7, d198c ) │ │ - vabal.u q15, d3, d0 │ │ - @ instruction: 0xfff3bb96 │ │ - vabdl.u q15, d3, d23 │ │ - vsri.64 q13, , #13 │ │ - vabdl.u q13, d3, d1 │ │ - @ instruction: 0xfff378b2 │ │ + b.n d17ac │ │ + movs r5, #220 @ 0xdc │ │ + @ instruction: 0xebffd5e4 │ │ + movs r0, r0 │ │ + add r7, pc, #984 @ (adr r7, d1a70 ) │ │ + vabal.u q15, d19, d6 │ │ + vdup.8 d27, d9[1] │ │ + @ instruction: 0xfff3e767 │ │ + vsli.32 d26, d18, #19 │ │ + vqshl.u32 d26, d22, #19 │ │ + @ instruction: 0xfff377ed │ │ @ instruction: 0xfff3c9b8 │ │ movs r0, r0 │ │ ldmia r1!, {r2, r3, r4, r5, r6, r7} │ │ movs r0, r0 │ │ - bcc.n d16ac │ │ + bcc.n d16dc │ │ movs r0, r0 │ │ ldmia r1!, {r3, r5, r6, r7} │ │ movs r0, r0 │ │ - strh r2, [r1, #12] │ │ - vsli.32 d26, d5, #19 │ │ - vtbl.8 d29, {d3-d5}, d30 │ │ - vabal.u , d3, d4 │ │ + strh r5, [r3, #18] │ │ + @ instruction: 0xfff3a54a │ │ + vtbl.8 d29, {d19-d22}, d29 │ │ + vmls.i , , d28[0] │ │ @ instruction: 0xfff34ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n d1be4 │ │ - beq.n d16f4 │ │ - b.n d1b68 │ │ + b.n d1bf4 │ │ + beq.n d1704 │ │ + b.n d1b78 │ │ strh r0, [r0, #10] │ │ - b.n d1210 │ │ + b.n d1220 │ │ str r0, [r0, r0] │ │ - b.n d1a16 │ │ - add r0, pc, #4 @ (adr r0, d16dc ) │ │ - b.n d1a1a │ │ + b.n d1a26 │ │ + add r0, pc, #4 @ (adr r0, d16ec ) │ │ + b.n d1a2a │ │ strh r0, [r1, #0] │ │ - b.n d17fc │ │ + b.n d180c │ │ str r0, [r5, #0] │ │ - b.n d1212 │ │ + b.n d1222 │ │ movs r4, r4 │ │ - b.n d1b72 │ │ + b.n d1b82 │ │ movs r2, r0 │ │ - b.n d1d8a │ │ + b.n d1d9a │ │ movs r4, r3 │ │ ldrh r0, [r0, #16] │ │ ands r4, r0 │ │ - b.n d1c0c │ │ + b.n d1c1c │ │ str r0, [sp, #0] │ │ - b.n d1e36 │ │ + b.n d1e46 │ │ strb r1, [r0, #0] │ │ - b.n d1e3a │ │ + b.n d1e4a │ │ movs r5, r0 │ │ - b.n d1a3e │ │ + b.n d1a4e │ │ asrs r6, r0, #32 │ │ - b.n d1a42 │ │ + b.n d1a52 │ │ movs r0, #4 │ │ - b.n d1a46 │ │ + b.n d1a56 │ │ str r0, [sp, #64] @ 0x40 │ │ - b.n d1224 │ │ + b.n d1234 │ │ strb r4, [r1, #0] │ │ - b.n d1228 │ │ + b.n d1238 │ │ lsls r0, r0, #18 │ │ @ instruction: 0xe98d1cfa │ │ add.w r0, r0, r1 │ │ - b.n d1dfa │ │ + b.n d1e0a │ │ movs r2, r6 │ │ subs r0, r0, r0 │ │ adds r3, r1, #1 │ │ add.w r0, r0, r0 │ │ - b.n d1246 │ │ + b.n d1256 │ │ movs r5, r4 │ │ - b.n d1dca │ │ + b.n d1dda │ │ movs r3, r0 │ │ ldmia r2!, {} │ │ movs r1, r0 │ │ - b.n d1e12 │ │ + b.n d1e22 │ │ movs r6, r2 │ │ asrs r0, r2, #13 │ │ movs r3, r1 │ │ lsrs r0, r0, #8 │ │ movs r2, r0 │ │ and.w r0, r0, pc, lsr #1 │ │ - b.n d1de2 │ │ + b.n d1df2 │ │ movs r6, r4 │ │ asrs r0, r2, #13 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n d1dee │ │ + b.n d1dfe │ │ movs r2, r4 │ │ subs r0, r0, r0 │ │ asrs r4, r4, #32 │ │ - b.n d1286 │ │ + b.n d1296 │ │ movs r1, r0 │ │ - b.n d1a06 │ │ + b.n d1a16 │ │ @ instruction: 0xffe61aff │ │ movs r6, r3 │ │ and.w r0, r0, r6, lsl #28 │ │ - b.n d1aa6 │ │ + b.n d1ab6 │ │ movs r1, r1 │ │ and.w r0, r0, r5, lsl #28 │ │ - b.n d1eae │ │ + b.n d1ebe │ │ movs r6, r4 │ │ - b.n d1e1e │ │ + b.n d1e2e │ │ strb r0, [r5, #0] │ │ - b.n d1286 │ │ + b.n d1296 │ │ strb r7, [r0, #0] │ │ lsls r0, r0, #12 │ │ movs r5, r4 │ │ - b.n d1e2a │ │ + b.n d1e3a │ │ movs r7, r0 │ │ - b.n d1ec2 │ │ + b.n d1ed2 │ │ asrs r6, r0, #32 │ │ - b.n d1ec6 │ │ + b.n d1ed6 │ │ strb r6, [r0, #0] │ │ lsls r0, r0, #12 │ │ asrs r0, r4, #32 │ │ - b.n d129e │ │ + b.n d12ae │ │ movs r4, r4 │ │ - b.n d12a2 │ │ + b.n d12b2 │ │ str r4, [r0, #0] │ │ - b.n d1cb0 │ │ + b.n d1cc0 │ │ str r0, [sp, #0] │ │ - b.n d1eda │ │ + b.n d1eea │ │ ands r1, r0 │ │ - b.n d1ede │ │ + b.n d1eee │ │ movs r5, r0 │ │ - b.n d1ae2 │ │ + b.n d1af2 │ │ asrs r7, r0, #32 │ │ - b.n d1ae6 │ │ + b.n d1af6 │ │ movs r0, #6 │ │ - b.n d1aea │ │ + b.n d1afa │ │ str r0, [sp, #64] @ 0x40 │ │ - b.n d12c8 │ │ + b.n d12d8 │ │ ands r4, r1 │ │ - b.n d12cc │ │ + b.n d12dc │ │ lsls r0, r2, #16 │ │ @ instruction: 0xe98d1cd1 │ │ add.w r0, r0, r1 │ │ - b.n d1e9e │ │ + b.n d1eae │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ adds r2, r4, #0 │ │ add.w r0, r0, r0 │ │ - b.n d12ea │ │ + b.n d12fa │ │ movs r4, r0 │ │ - b.n d1e6e │ │ + b.n d1e7e │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ asrs r4, r4, #32 │ │ - b.n d1306 │ │ + b.n d1316 │ │ movs r1, r0 │ │ - b.n d1a88 │ │ + b.n d1a98 │ │ @ instruction: 0xffef1aff │ │ - beq.n d1818 │ │ - b.n d1c78 │ │ + beq.n d1828 │ │ + b.n d1c88 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r1, r2, sp, lr} │ │ - b.n d1b2a │ │ + b.n d1b3a │ │ asrs r0, r5, #32 │ │ - b.n d131e │ │ + b.n d132e │ │ lsls r4, r6, #2 │ │ - b.n d1bac │ │ + b.n d1bbc │ │ asrs r1, r0, #32 │ │ - b.n d1882 │ │ + b.n d1892 │ │ movs r2, r0 │ │ - b.n d1c9a │ │ + b.n d1caa │ │ subs r1, r2, #4 │ │ - b.n d1adc │ │ + b.n d1aec │ │ movs r1, r0 │ │ asrs r0, r0, #12 │ │ asrs r1, r4, #10 │ │ - b.n d1b46 │ │ + b.n d1b56 │ │ movs r0, r0 │ │ - b.n d180c │ │ + b.n d181c │ │ movs r0, r0 │ │ - b.n d1cce │ │ - beq.n d1848 │ │ - b.n d1ca8 │ │ + b.n d1cde │ │ + beq.n d1858 │ │ + b.n d1cb8 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r4, r5, r6, r8, ip, lr, pc} │ │ + ldmia.w sp!, {r7, r8, ip, lr, pc} │ │ movs r0, r0 │ │ - ldr r7, [pc, #960] @ (d1bdc ) │ │ + ldr r7, [pc, #960] @ (d1bec ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n d1d3c │ │ - beq.n d183c │ │ - b.n d1cc0 │ │ + b.n d1d4c │ │ + beq.n d184c │ │ + b.n d1cd0 │ │ stmia r0!, {} │ │ - b.n d1b6a │ │ + b.n d1b7a │ │ movs r0, r1 │ │ - b.n d134e │ │ + b.n d135e │ │ movs r0, r0 │ │ - b.n d1ed2 │ │ + b.n d1ee2 │ │ lsls r4, r5, #1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r1, #1 │ │ - b.n d1372 │ │ + b.n d1382 │ │ str r5, [sp, #708] @ 0x2c4 │ │ - b.n d1e58 │ │ + b.n d1e68 │ │ ldr r6, [sp, #20] │ │ - b.n d1ed0 │ │ - add r0, pc, #0 @ (adr r0, d1844 ) │ │ - b.n d1f86 │ │ + b.n d1ee0 │ │ + add r0, pc, #0 @ (adr r0, d1854 ) │ │ + b.n d1f96 │ │ stmia r0!, {r3} │ │ - b.n d1364 │ │ + b.n d1374 │ │ movs r0, #0 │ │ - b.n d1370 │ │ + b.n d1380 │ │ movs r4, r0 │ │ and.w r0, r0, r8 │ │ - b.n d138e │ │ + b.n d139e │ │ movs r0, #4 │ │ - b.n d1394 │ │ - add r0, pc, #4 @ (adr r0, d1860 ) │ │ - b.n d1d72 │ │ + b.n d13a4 │ │ + add r0, pc, #4 @ (adr r0, d1870 ) │ │ + b.n d1d82 │ │ movs r0, r0 │ │ - b.n d1b16 │ │ + b.n d1b26 │ │ lsls r0, r4, #1 │ │ cmp r2, #0 │ │ movs r1, r0 │ │ - b.n d1e8e │ │ + b.n d1e9e │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n d1f16 │ │ + b.n d1f26 │ │ lsls r4, r2, #1 │ │ lsrs r0, r0, #8 │ │ subs r2, r6, #4 │ │ - b.n d1678 │ │ + b.n d1688 │ │ subs r1, r2, #4 │ │ - b.n d1b5c │ │ + b.n d1b6c │ │ movs r1, #50 @ 0x32 │ │ - b.n d1bc2 │ │ + b.n d1bd2 │ │ asrs r2, r1, #32 │ │ - b.n d1988 │ │ - add r0, pc, #4 @ (adr r0, d188c ) │ │ - b.n d1d0c │ │ + b.n d1998 │ │ + add r0, pc, #4 @ (adr r0, d189c ) │ │ + b.n d1d1c │ │ @ instruction: 0xfff2eaff │ │ asrs r4, r1, #1 │ │ - b.n d13ca │ │ + b.n d13da │ │ movs r0, #162 @ 0xa2 │ │ - b.n d1bd6 │ │ + b.n d1be6 │ │ asrs r2, r1, #32 │ │ - b.n d183c │ │ + b.n d184c │ │ movs r0, r0 │ │ - b.n d1f40 │ │ + b.n d1f50 │ │ @ instruction: 0xffed0aff │ │ asrs r4, r2, #1 │ │ - b.n d13de │ │ + b.n d13ee │ │ str r2, [r1, r4] │ │ - b.n d17cc │ │ + b.n d17dc │ │ movs r0, r0 │ │ - b.n d1f58 │ │ + b.n d1f68 │ │ @ instruction: 0xffe90aff │ │ movs r0, r0 │ │ - b.n d1ff6 │ │ + b.n d2006 │ │ movs r0, #4 │ │ - b.n d13d4 │ │ + b.n d13e4 │ │ lsls r2, r1, #4 │ │ - b.n d17c0 │ │ + b.n d17d0 │ │ movs r7, r1 │ │ and.w r0, r0, r8, lsl #8 │ │ - b.n d1dd4 │ │ + b.n d1de4 │ │ strh r4, [r5, #4] │ │ - b.n d13f8 │ │ + b.n d1408 │ │ adds r0, #176 @ 0xb0 │ │ - b.n d13fc │ │ + b.n d140c │ │ movs r0, r0 │ │ - b.n d1f7e │ │ + b.n d1f8e │ │ movs r7, r0 │ │ ldmia.w r2, {r2, r3, r5, r7, pc} │ │ - b.n d13e4 │ │ + b.n d13f4 │ │ adds r0, #176 @ 0xb0 │ │ - b.n d13e8 │ │ + b.n d13f8 │ │ adds r0, #8 │ │ - b.n d1dec │ │ + b.n d1dfc │ │ movs r7, r0 │ │ stmia.w r3, {r3, r4, r5, r6, r7} │ │ asrs r6, r0, #7 │ │ movs r7, r0 │ │ - b.n d1c2e │ │ + b.n d1c3e │ │ subs r3, r6, r6 │ │ @ instruction: 0xeb00c008 │ │ - b.n d1430 │ │ + b.n d1440 │ │ movs r0, r0 │ │ - b.n d1fa2 │ │ + b.n d1fb2 │ │ str r4, [r0, r0] │ │ - b.n d1c3e │ │ + b.n d1c4e │ │ @ instruction: 0xffd30aff │ │ strh r0, [r0, #0] │ │ - b.n d1430 │ │ + b.n d1440 │ │ lsls r4, r5 │ │ - b.n d1434 │ │ + b.n d1444 │ │ strb r0, [r6, #2] │ │ - b.n d1438 │ │ + b.n d1448 │ │ movs r1, r1 │ │ - b.n d1bc2 │ │ + b.n d1bd2 │ │ movs r3, r2 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n d1fc8 │ │ + b.n d1fd8 │ │ movs r7, r2 │ │ subs r0, r0, r0 │ │ lsls r7, r0, #1 │ │ - b.n d1f36 │ │ + b.n d1f46 │ │ subs r0, r2, #7 │ │ - b.n d1f44 │ │ + b.n d1f54 │ │ lsrs r7, r2, #32 │ │ - b.n d1fae │ │ + b.n d1fbe │ │ asrs r4, r6, #2 │ │ - b.n d1cb8 │ │ + b.n d1cc8 │ │ movs r0, r0 │ │ - b.n d143c │ │ + b.n d144c │ │ movs r1, r0 │ │ - b.n d1e38 │ │ + b.n d1e48 │ │ lsrs r4, r7, #14 │ │ - b.n d1cc4 │ │ + b.n d1cd4 │ │ movs r0, r0 │ │ - b.n d207e │ │ + b.n d208e │ │ lsls r0, r0, #3 │ │ - b.n d144c │ │ + b.n d145c │ │ lsls r4, r0, #3 │ │ - b.n d1450 │ │ + b.n d1460 │ │ movs r0, r1 │ │ - b.n d1454 │ │ + b.n d1464 │ │ movs r4, r1 │ │ - b.n d1458 │ │ + b.n d1468 │ │ movs r0, r2 │ │ - b.n d145c │ │ + b.n d146c │ │ str r4, [r5, r2] │ │ - b.n d1460 │ │ + b.n d1470 │ │ movs r0, r0 │ │ - b.n d2002 │ │ + b.n d2012 │ │ str r4, [r0, r0] │ │ - b.n d1c9e │ │ + b.n d1cae │ │ @ instruction: 0xffe71aff │ │ @ instruction: 0xffbaeaff │ │ lsls r7, r4, #30 │ │ - b.n d1f7c │ │ + b.n d1f8c │ │ lsls r2, r4, #3 │ │ - b.n d1ff0 │ │ + b.n d2000 │ │ movs r0, r0 │ │ - b.n d1c22 │ │ + b.n d1c32 │ │ movs r7, r4 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n d2028 │ │ + b.n d2038 │ │ movs r5, r4 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n d14b0 │ │ + b.n d14c0 │ │ movs r1, r1 │ │ - b.n d1c26 │ │ + b.n d1c36 │ │ movs r4, r3 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n d1546 │ │ + b.n d1556 │ │ str r0, [r3, #0] │ │ - b.n d14bc │ │ + b.n d14cc │ │ movs r2, r0 │ │ - b.n d1fb6 │ │ + b.n d1fc6 │ │ @ instruction: 0xffc90aff │ │ movs r5, r0 │ │ - b.n d1cde │ │ + b.n d1cee │ │ asrs r7, r0, #32 │ │ - b.n d1ce2 │ │ + b.n d1cf2 │ │ movs r0, #180 @ 0xb4 │ │ - b.n d20e6 │ │ - lsrs r7, r0, #25 │ │ - mla r0, r0, r0, r0 │ │ - b.n d205a │ │ + b.n d20f6 │ │ + lsrs r0, r4, #18 │ │ + @ instruction: 0xfa000000 │ │ + b.n d206a │ │ strh r0, [r0, #0] │ │ - b.n d14bc │ │ + b.n d14cc │ │ @ instruction: 0xffcc0aff │ │ asrs r4, r6, #2 │ │ - b.n d1ec8 │ │ + b.n d1ed8 │ │ movs r6, r0 │ │ - b.n d1cfe │ │ + b.n d1d0e │ │ movs r0, #228 @ 0xe4 │ │ - b.n d2102 │ │ - lsrs r0, r0, #25 │ │ - @ instruction: 0xfb00ffc7 │ │ + b.n d2112 │ │ + lsrs r1, r3, #18 │ │ + @ instruction: 0xfa00ffc7 │ │ @ instruction: 0xeaff2001 │ │ - b.n d1e62 │ │ + b.n d1e72 │ │ asrs r0, r1, #1 │ │ - b.n d150a │ │ - add r0, pc, #124 @ (adr r0, d1a50 ) │ │ - b.n d20da │ │ + b.n d151a │ │ + add r0, pc, #124 @ (adr r0, d1a60 ) │ │ + b.n d20ea │ │ movs r0, #1 │ │ - b.n d1eee │ │ + b.n d1efe │ │ movs r1, #162 @ 0xa2 │ │ - b.n d1900 │ │ + b.n d1910 │ │ movs r0, r0 │ │ - b.n d2086 │ │ - add r0, pc, #128 @ (adr r0, d1a64 ) │ │ + b.n d2096 │ │ + add r0, pc, #128 @ (adr r0, d1a74 ) │ │ lsls r2, r1, #10 │ │ @ instruction: 0xff9beaff │ │ movs r4, r0 │ │ - b.n d1526 │ │ + b.n d1536 │ │ lsrs r1, r0, #16 │ │ - b.n d2172 │ │ + b.n d2182 │ │ movs r4, r0 │ │ - b.n d150e │ │ - beq.n d1a30 │ │ - b.n d1e90 │ │ + b.n d151e │ │ + beq.n d1a40 │ │ + b.n d1ea0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r5} │ │ - b.n d1540 │ │ + b.n d1550 │ │ movs r0, #228 @ 0xe4 │ │ - b.n d2146 │ │ + b.n d2156 │ │ asrs r4, r5, #32 │ │ - b.n d1548 │ │ + b.n d1558 │ │ movs r0, r0 │ │ - b.n d1b2c │ │ + b.n d1b3c │ │ asrs r1, r0, #32 │ │ - b.n d1b30 │ │ - movs r4, #248 @ 0xf8 │ │ + b.n d1b40 │ │ + movs r4, #247 @ 0xf7 │ │ @ instruction: 0xebff0010 │ │ - b.n d1558 │ │ + b.n d1568 │ │ movs r0, #221 @ 0xdd │ │ - b.n d215e │ │ + b.n d216e │ │ asrs r4, r1, #32 │ │ - b.n d1560 │ │ + b.n d1570 │ │ movs r0, r0 │ │ - b.n d1b44 │ │ + b.n d1b54 │ │ asrs r1, r0, #32 │ │ - b.n d1b48 │ │ - movs r4, #242 @ 0xf2 │ │ - @ instruction: 0xebffa6ed │ │ - vsri.32 d24, d20, #13 │ │ - vcvt.f32.u32 d23, d5, #13 │ │ - vmls.i q12, , d12[0] │ │ + b.n d1b58 │ │ + movs r4, #241 @ 0xf1 │ │ + @ instruction: 0xebffa6af │ │ + vsri.64 q12, , #13 │ │ + vqrdmlah.s , , d24[0] │ │ + vsli.32 d24, d1, #19 │ │ @ instruction: 0xfff34ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n d1f60 │ │ - beq.n d1a80 │ │ - b.n d1ee4 │ │ + b.n d1f70 │ │ + beq.n d1a90 │ │ + b.n d1ef4 │ │ ands r1, r0 │ │ - b.n d1d8e │ │ + b.n d1d9e │ │ asrs r0, r2, #32 │ │ - b.n d1574 │ │ + b.n d1584 │ │ movs r0, r0 │ │ - b.n d20f8 │ │ + b.n d2108 │ │ movs r2, r5 │ │ lsrs r0, r0, #8 │ │ strb r0, [r6, #0] │ │ - b.n d1f5e │ │ + b.n d1f6e │ │ str r0, [r7, r2] │ │ - b.n d1f6a │ │ + b.n d1f7a │ │ str r0, [r6, #8] │ │ - b.n d1f6e │ │ + b.n d1f7e │ │ strh r4, [r0, #0] │ │ - b.n d1f84 │ │ + b.n d1f94 │ │ str r0, [sp, #80] @ 0x50 │ │ - b.n d1f88 │ │ - add r0, pc, #48 @ (adr r0, d1aa0 ) │ │ - b.n d1f8c │ │ + b.n d1f98 │ │ + add r0, pc, #48 @ (adr r0, d1ab0 ) │ │ + b.n d1f9c │ │ movs r6, r1 │ │ and.w r0, r0, r0 │ │ - b.n d21ba │ │ + b.n d21ca │ │ asrs r0, r0, #32 │ │ - b.n d21be │ │ + b.n d21ce │ │ movs r0, r2 │ │ - b.n d158a │ │ + b.n d159a │ │ movs r5, r0 │ │ - b.n d1dc6 │ │ - adds r2, #138 @ 0x8a │ │ + b.n d1dd6 │ │ + adds r2, #137 @ 0x89 │ │ @ instruction: 0xebff0000 │ │ - b.n d212e │ │ + b.n d213e │ │ movs r5, r3 │ │ subs r0, r0, r0 │ │ lsls r0, r2, #3 │ │ - b.n d1e22 │ │ + b.n d1e32 │ │ movs r0, #208 @ 0xd0 │ │ - b.n d1e28 │ │ + b.n d1e38 │ │ movs r1, r0 │ │ - b.n d1f3e │ │ + b.n d1f4e │ │ asrs r0, r0, #32 │ │ - b.n d2024 │ │ + b.n d2034 │ │ lsls r0, r6, #3 │ │ - b.n d1e32 │ │ + b.n d1e42 │ │ movs r2, r0 │ │ - b.n d1b4a │ │ + b.n d1b5a │ │ movs r3, r0 │ │ - b.n d1c50 │ │ + b.n d1c60 │ │ movs r4, r2 │ │ subs r2, #0 │ │ movs r0, r1 │ │ - b.n d21f6 │ │ + b.n d2206 │ │ asrs r5, r0, #32 │ │ - b.n d1dfa │ │ + b.n d1e0a │ │ movs r0, r3 │ │ - b.n d15d8 │ │ + b.n d15e8 │ │ movs r7, r1 │ │ - b.n d2202 │ │ + b.n d2212 │ │ movs r0, r0 │ │ - b.n d15e0 │ │ + b.n d15f0 │ │ movs r0, r1 │ │ - b.n d1e0a │ │ + b.n d1e1a │ │ movs r0, #9 │ │ - b.n d1e0e │ │ + b.n d1e1e │ │ adds r0, #10 │ │ - b.n d1e12 │ │ + b.n d1e22 │ │ str r4, [r2, #0] │ │ - b.n d15f0 │ │ - subs r2, #86 @ 0x56 │ │ + b.n d1600 │ │ + subs r2, #85 @ 0x55 │ │ @ instruction: 0xebff0004 │ │ - b.n d1618 │ │ + b.n d1628 │ │ movs r0, r0 │ │ - b.n d2182 │ │ + b.n d2192 │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ asrs r0, r1, #32 │ │ - b.n d16a4 │ │ + b.n d16b4 │ │ movs r0, r0 │ │ - b.n d2190 │ │ + b.n d21a0 │ │ @ instruction: 0xffe01aff │ │ asrs r2, r6, #30 │ │ - b.n d2106 │ │ + b.n d2116 │ │ subs r7, r7, #7 │ │ - b.n d2198 │ │ + b.n d21a8 │ │ movs r1, r0 │ │ - b.n d1d9e │ │ + b.n d1dae │ │ @ instruction: 0xffe11aff │ │ @ instruction: 0xffe2eaff │ │ movs r0, r0 │ │ - b.n d224a │ │ - beq.n d1b44 │ │ - b.n d1fa4 │ │ + b.n d225a │ │ + beq.n d1b54 │ │ + b.n d1fb4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n d2034 │ │ - beq.n d1bb4 │ │ - b.n d1fb8 │ │ + b.n d2044 │ │ + beq.n d1bc4 │ │ + b.n d1fc8 │ │ asrs r4, r2, #32 │ │ - b.n d163c │ │ + b.n d164c │ │ asrs r2, r0, #32 │ │ - b.n d1e66 │ │ - add r0, pc, #0 @ (adr r0, d1b28 ) │ │ - b.n d1e6a │ │ + b.n d1e76 │ │ + add r0, pc, #0 @ (adr r0, d1b38 ) │ │ + b.n d1e7a │ │ str r0, [sp, #8] │ │ - b.n d1e6e │ │ + b.n d1e7e │ │ movs r1, r4 │ │ ldmia.w r2, {pc} │ │ - b.n d2276 │ │ + b.n d2286 │ │ adds r0, #12 │ │ - b.n d165e │ │ + b.n d166e │ │ movs r0, #8 │ │ - b.n d16a0 │ │ + b.n d16b0 │ │ asrs r4, r4, #32 │ │ - b.n d165c │ │ + b.n d166c │ │ asrs r0, r0, #32 │ │ - b.n d1bea │ │ + b.n d1bfa │ │ asrs r5, r0, #32 │ │ - b.n d1cf0 │ │ + b.n d1d00 │ │ lsls r4, r6, #6 │ │ subs r2, #0 │ │ subs r2, r1, #5 │ │ - b.n d2066 │ │ + b.n d2076 │ │ asrs r0, r3, #32 │ │ - b.n d1670 │ │ + b.n d1680 │ │ asrs r4, r2, #32 │ │ - b.n d1694 │ │ + b.n d16a4 │ │ strb r0, [r7, #2] │ │ - b.n d2060 │ │ + b.n d2070 │ │ asrs r0, r4, #32 │ │ - b.n d2064 │ │ + b.n d2074 │ │ strb r0, [r4, #0] │ │ - b.n d1680 │ │ + b.n d1690 │ │ asrs r4, r3, #32 │ │ - b.n d1684 │ │ + b.n d1694 │ │ movs r4, r2 │ │ and.w r0, r0, r2, lsl #20 │ │ - b.n d1eb2 │ │ + b.n d1ec2 │ │ ands r1, r0 │ │ - b.n d1eb6 │ │ + b.n d1ec6 │ │ movs r0, r3 │ │ - b.n d16b4 │ │ + b.n d16c4 │ │ movs r0, #5 │ │ - b.n d1ebe │ │ + b.n d1ece │ │ adds r0, #4 │ │ - b.n d1ec2 │ │ + b.n d1ed2 │ │ add r7, sp, #936 @ 0x3a8 │ │ @ instruction: 0xebff8000 │ │ - b.n d1eca │ │ + b.n d1eda │ │ lsls r0, r4, #27 │ │ - b.n d16cc │ │ + b.n d16dc │ │ movs r0, r0 │ │ - b.n d1cb0 │ │ + b.n d1cc0 │ │ lsls r2, r3, #1 │ │ - b.n d1736 │ │ + b.n d1746 │ │ movs r2, r0 │ │ - b.n d223a │ │ + b.n d224a │ │ lsls r5, r6, #5 │ │ cmp r2, #0 │ │ movs r1, r0 │ │ - b.n d2032 │ │ + b.n d2042 │ │ movs r2, r0 │ │ - b.n d2286 │ │ + b.n d2296 │ │ lsls r5, r3, #6 │ │ subs r2, #0 │ │ movs r4, r4 │ │ - b.n d16e8 │ │ + b.n d16f8 │ │ movs r0, #208 @ 0xd0 │ │ - b.n d1f32 │ │ + b.n d1f42 │ │ movs r1, r4 │ │ ldmia.w r9, {ip} │ │ - b.n d1c5e │ │ + b.n d1c6e │ │ asrs r5, r0, #32 │ │ - b.n d1d64 │ │ + b.n d1d74 │ │ lsls r6, r2, #6 │ │ subs r2, #0 │ │ strb r0, [r0, #1] │ │ - b.n d16fa │ │ + b.n d170a │ │ asrs r0, r2, #32 │ │ - b.n d16fc │ │ + b.n d170c │ │ strb r7, [r0, #0] │ │ - b.n d177c │ │ + b.n d178c │ │ movs r4, r0 │ │ - b.n d2200 │ │ + b.n d2210 │ │ movs r5, r2 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n d227c │ │ + b.n d228c │ │ movs r0, r5 │ │ lsrs r0, r0, #8 │ │ asrs r0, r3, #32 │ │ - b.n d1714 │ │ + b.n d1724 │ │ str r0, [r0, #0] │ │ - b.n d2326 │ │ + b.n d2336 │ │ lsls r0, r2, #2 │ │ ldmia.w r1, {ip} │ │ - b.n d1c96 │ │ + b.n d1ca6 │ │ asrs r5, r0, #32 │ │ - b.n d1da0 │ │ + b.n d1db0 │ │ str r1, [r0, #0] │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n d22a6 │ │ + b.n d22b6 │ │ asrs r5, r0, #32 │ │ - b.n d1f3e │ │ + b.n d1f4e │ │ asrs r7, r0, #32 │ │ asrs r0, r4, #6 │ │ movs r0, #2 │ │ - b.n d1ca6 │ │ + b.n d1cb6 │ │ movs r0, #3 │ │ - b.n d1db4 │ │ + b.n d1dc4 │ │ movs r0, #0 │ │ - b.n d234e │ │ + b.n d235e │ │ movs r0, #1 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n d22ba │ │ + b.n d22ca │ │ asrs r7, r0, #32 │ │ lsls r0, r4, #6 │ │ movs r0, r0 │ │ - b.n d22ca │ │ + b.n d22da │ │ movs r4, r0 │ │ asrs r0, r4, #6 │ │ movs r0, r0 │ │ - b.n d22ca │ │ + b.n d22da │ │ movs r4, r0 │ │ lsls r0, r4, #6 │ │ movs r7, r4 │ │ and.w r0, r0, r0 │ │ - b.n d22d4 │ │ + b.n d22e4 │ │ movs r4, r3 │ │ lsrs r0, r0, #8 │ │ strb r0, [r3, #0] │ │ - b.n d176c │ │ + b.n d177c │ │ asrs r1, r0, #6 │ │ - b.n d1d4c │ │ + b.n d1d5c │ │ ands r0, r1 │ │ - b.n d1664 │ │ + b.n d1674 │ │ strb r4, [r0, #0] │ │ - b.n d1668 │ │ + b.n d1678 │ │ asrs r2, r0, #32 │ │ - b.n d1cf2 │ │ + b.n d1d02 │ │ asrs r3, r0, #32 │ │ - b.n d1dfc │ │ + b.n d1e0c │ │ asrs r0, r0, #32 │ │ - b.n d2392 │ │ + b.n d23a2 │ │ asrs r1, r0, #32 │ │ adds r3, #0 │ │ movs r2, r0 │ │ - b.n d1cfa │ │ + b.n d1d0a │ │ movs r3, r0 │ │ - b.n d1e08 │ │ + b.n d1e18 │ │ movs r0, r0 │ │ - b.n d23a2 │ │ + b.n d23b2 │ │ movs r1, r0 │ │ adds r3, #0 │ │ str r1, [r0, #0] │ │ - b.n d1c6a │ │ + b.n d1c7a │ │ movs r1, r0 │ │ - b.n d2112 │ │ + b.n d2122 │ │ asrs r0, r0, #32 │ │ - b.n d21f8 │ │ + b.n d2208 │ │ movs r0, r0 │ │ - b.n d2322 │ │ + b.n d2332 │ │ asrs r7, r0, #32 │ │ lsls r0, r4, #6 │ │ movs r4, r0 │ │ lsls r0, r4, #6 │ │ movs r2, r2 │ │ and.w r0, r0, r2, lsl #4 │ │ - b.n d1d26 │ │ + b.n d1d36 │ │ asrs r3, r0, #32 │ │ - b.n d1e34 │ │ + b.n d1e44 │ │ asrs r0, r0, #32 │ │ - b.n d23ce │ │ + b.n d23de │ │ asrs r1, r0, #32 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n d2338 │ │ + b.n d2348 │ │ asrs r0, r0, #32 │ │ - b.n d245a │ │ + b.n d246a │ │ str r1, [r0, r0] │ │ lsls r0, r4, #6 │ │ movs r1, r0 │ │ lsls r0, r4, #6 │ │ asrs r5, r0, #32 │ │ - b.n d1fe6 │ │ + b.n d1ff6 │ │ movs r0, r1 │ │ and.w r0, r0, r1, lsl #28 │ │ - b.n d2152 │ │ + b.n d2162 │ │ asrs r0, r0, #32 │ │ - b.n d2238 │ │ + b.n d2248 │ │ movs r2, r0 │ │ - b.n d1d56 │ │ + b.n d1d66 │ │ movs r3, r0 │ │ - b.n d1e64 │ │ + b.n d1e74 │ │ movs r0, r0 │ │ - b.n d23fe │ │ + b.n d240e │ │ movs r1, r0 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n d2366 │ │ + b.n d2376 │ │ asrs r0, r0, #32 │ │ lsls r0, r4, #6 │ │ movs r7, r0 │ │ asrs r0, r4, #6 │ │ movs r0, #28 │ │ - b.n d180c │ │ + b.n d181c │ │ movs r0, r6 │ │ - b.n d16ec │ │ + b.n d16fc │ │ asrs r4, r5, #32 │ │ - b.n d16f0 │ │ + b.n d1700 │ │ movs r0, #208 @ 0xd0 │ │ - b.n d2062 │ │ + b.n d2072 │ │ asrs r1, r0, #32 │ │ - b.n d1d28 │ │ + b.n d1d38 │ │ adds r0, #0 │ │ - b.n d2426 │ │ + b.n d2436 │ │ movs r0, r0 │ │ - b.n d1d2e │ │ + b.n d1d3e │ │ movs r0, #48 @ 0x30 │ │ - b.n d2208 │ │ + b.n d2218 │ │ movs r1, r0 │ │ - b.n d2012 │ │ + b.n d2022 │ │ movs r4, r3 │ │ lsls r5, r3, #22 │ │ asrs r0, r0, #32 │ │ lsls r0, r4, #14 │ │ asrs r0, r0, #32 │ │ lsls r0, r0, #22 │ │ asrs r4, r0, #32 │ │ lsls r0, r0, #22 │ │ movs r0, r1 │ │ - b.n d2446 │ │ + b.n d2456 │ │ movs r4, r6 │ │ - b.n d1824 │ │ + b.n d1834 │ │ movs r0, r6 │ │ - b.n d21a4 │ │ + b.n d21b4 │ │ movs r0, r6 │ │ - b.n d182c │ │ + b.n d183c │ │ movs r7, r1 │ │ - b.n d2456 │ │ + b.n d2466 │ │ asrs r0, r4, #32 │ │ - b.n d1854 │ │ + b.n d1864 │ │ movs r0, r0 │ │ - b.n d1838 │ │ + b.n d1848 │ │ movs r0, r5 │ │ - b.n d223c │ │ - subs r1, #195 @ 0xc3 │ │ + b.n d224c │ │ + subs r1, #194 @ 0xc2 │ │ @ instruction: 0xebff8028 │ │ - b.n d1864 │ │ + b.n d1874 │ │ lsls r2, r6, #30 │ │ - b.n d233e │ │ + b.n d234e │ │ lsrs r7, r7, #31 │ │ - b.n d23d0 │ │ + b.n d23e0 │ │ movs r0, r0 │ │ - b.n d1fe6 │ │ + b.n d1ff6 │ │ movs r3, r3 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n d1872 │ │ + b.n d1882 │ │ adds r0, #36 @ 0x24 │ │ - b.n d187c │ │ + b.n d188c │ │ strb r0, [r2, #0] │ │ - b.n d1878 │ │ + b.n d1888 │ │ movs r0, #0 │ │ - b.n d187c │ │ + b.n d188c │ │ strh r0, [r0, #0] │ │ - b.n d1874 │ │ + b.n d1884 │ │ movs r0, r0 │ │ - b.n d2400 │ │ + b.n d2410 │ │ asrs r4, r0, #32 │ │ - b.n d1888 │ │ + b.n d1898 │ │ adds r0, #4 │ │ - b.n d1880 │ │ + b.n d1890 │ │ str r4, [r0, #0] │ │ - b.n d187e │ │ + b.n d188e │ │ lsls r6, r2, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, r3 │ │ - b.n d1898 │ │ + b.n d18a8 │ │ lsls r1, r0, #12 │ │ - b.n d2396 │ │ + b.n d23a6 │ │ lsls r6, r3, #1 │ │ subs r0, r0, r0 │ │ str r0, [r0, r0] │ │ - b.n d1892 │ │ + b.n d18a2 │ │ str r0, [r1, #0] │ │ - b.n d1e1a │ │ + b.n d1e2a │ │ ands r4, r0 │ │ - b.n d189a │ │ + b.n d18aa │ │ str r3, [r0, #0] │ │ - b.n d1f20 │ │ + b.n d1f30 │ │ movs r2, r0 │ │ cmp r2, #0 │ │ str r2, [r0, #0] │ │ - b.n d1e30 │ │ + b.n d1e40 │ │ str r1, [r0, #0] │ │ - b.n d1f32 │ │ + b.n d1f42 │ │ lsls r2, r2, #1 │ │ cmp r2, #0 │ │ str r1, [r0, #0] │ │ - b.n d2240 │ │ + b.n d2250 │ │ str r0, [r2, #0] │ │ - b.n d18a8 │ │ + b.n d18b8 │ │ lsls r0, r4, #1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r1, #32 │ │ - b.n d229e │ │ + b.n d22ae │ │ movs r1, #135 @ 0x87 │ │ - b.n d20e2 │ │ - lsrs r6, r0, #22 │ │ + b.n d20f2 │ │ + lsrs r7, r1, #20 │ │ @ instruction: 0xfb00ff72 │ │ @ instruction: 0xeaff0000 │ │ - b.n d245e │ │ + b.n d246e │ │ lsls r3, r3, #4 │ │ subs r0, r0, r0 │ │ lsls r4, r0, #1 │ │ - b.n d18ea │ │ + b.n d18fa │ │ asrs r0, r4, #2 │ │ - b.n d18ee │ │ + b.n d18fe │ │ adds r2, #76 @ 0x4c │ │ - b.n d18f2 │ │ + b.n d1902 │ │ movs r0, #178 @ 0xb2 │ │ - b.n d2162 │ │ + b.n d2172 │ │ movs r4, r1 │ │ - b.n d18e6 │ │ + b.n d18f6 │ │ ands r1, r0 │ │ - b.n d22ce │ │ + b.n d22de │ │ asrs r0, r0, #32 │ │ - b.n d18f0 │ │ + b.n d1900 │ │ movs r0, r0 │ │ - b.n d207a │ │ + b.n d208a │ │ ands r2, r0 │ │ movs r2, #130 @ 0x82 │ │ asrs r3, r0, #32 │ │ - b.n d1edc │ │ + b.n d1eec │ │ movs r2, r0 │ │ - b.n d1ee6 │ │ + b.n d1ef6 │ │ movs r0, r0 │ │ - b.n d2084 │ │ + b.n d2094 │ │ lsls r5, r6, #3 │ │ ldr r2, [sp, #0] │ │ lsls r0, r0, #1 │ │ - b.n d191e │ │ + b.n d192e │ │ asrs r4, r4, #32 │ │ - b.n d1928 │ │ + b.n d1938 │ │ adds r0, #16 │ │ - b.n d1924 │ │ + b.n d1934 │ │ str r7, [r0, #0] │ │ - b.n d1996 │ │ + b.n d19a6 │ │ lsrs r0, r2 │ │ - b.n d217c │ │ - b.n d1e5c │ │ - b.n d1834 │ │ + b.n d218c │ │ + b.n d1e6c │ │ + b.n d1844 │ │ movs r4, r0 │ │ - b.n d242e │ │ + b.n d243e │ │ stmia r0!, {r2, r3, r5} │ │ - b.n d183c │ │ + b.n d184c │ │ lsls r4, r0, #2 │ │ ldmia.w r9, {r1, r2, r4} │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n d24b8 │ │ + b.n d24c8 │ │ lsls r1, r1, #1 │ │ lsrs r0, r0, #8 │ │ asrs r0, r3, #32 │ │ - b.n d194c │ │ + b.n d195c │ │ movs r0, r0 │ │ - b.n d255e │ │ + b.n d256e │ │ str r0, [r0, #0] │ │ - b.n d1944 │ │ + b.n d1954 │ │ asrs r4, r0, #32 │ │ - b.n d1948 │ │ + b.n d1958 │ │ adds r0, #2 │ │ - b.n d1ed6 │ │ + b.n d1ee6 │ │ adds r0, #7 │ │ - b.n d1fd0 │ │ + b.n d1fe0 │ │ movs r1, r0 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n d24d6 │ │ + b.n d24e6 │ │ adds r0, #7 │ │ - b.n d217a │ │ + b.n d218a │ │ adds r0, #1 │ │ asrs r0, r4, #6 │ │ ands r4, r0 │ │ - b.n d1ee6 │ │ + b.n d1ef6 │ │ ands r5, r0 │ │ - b.n d1ff4 │ │ + b.n d2004 │ │ ands r0, r0 │ │ - b.n d258a │ │ + b.n d259a │ │ ands r1, r0 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n d24fa │ │ + b.n d250a │ │ adds r0, #1 │ │ lsls r0, r4, #6 │ │ movs r0, r0 │ │ - b.n d24fa │ │ + b.n d250a │ │ movs r0, #6 │ │ asrs r0, r4, #6 │ │ movs r0, r0 │ │ - b.n d250a │ │ + b.n d251a │ │ movs r0, #6 │ │ lsls r0, r4, #6 │ │ lsls r7, r0, #1 │ │ and.w r0, r0, r0 │ │ - b.n d2514 │ │ + b.n d2524 │ │ movs r4, r7 │ │ lsrs r0, r0, #8 │ │ str r0, [r3, #0] │ │ - b.n d19a8 │ │ + b.n d19b8 │ │ adds r1, #131 @ 0x83 │ │ - b.n d1f86 │ │ + b.n d1f96 │ │ str r0, [r1, #0] │ │ - b.n d18a4 │ │ + b.n d18b4 │ │ asrs r4, r0, #32 │ │ - b.n d18a8 │ │ + b.n d18b8 │ │ adds r0, #4 │ │ - b.n d1f32 │ │ + b.n d1f42 │ │ adds r0, #5 │ │ - b.n d202c │ │ + b.n d203c │ │ adds r0, #0 │ │ - b.n d25ce │ │ + b.n d25de │ │ adds r0, #1 │ │ adds r3, #0 │ │ movs r0, #4 │ │ - b.n d1f3a │ │ + b.n d1f4a │ │ movs r0, #5 │ │ - b.n d2048 │ │ + b.n d2058 │ │ movs r0, #0 │ │ - b.n d25de │ │ + b.n d25ee │ │ movs r0, #1 │ │ adds r3, #0 │ │ strb r3, [r0, #0] │ │ - b.n d1eaa │ │ + b.n d1eba │ │ movs r0, #1 │ │ - b.n d2352 │ │ + b.n d2362 │ │ adds r0, #0 │ │ - b.n d2438 │ │ + b.n d2448 │ │ movs r0, r0 │ │ - b.n d2560 │ │ + b.n d2570 │ │ adds r0, #1 │ │ lsls r0, r4, #6 │ │ movs r0, #6 │ │ lsls r0, r4, #6 │ │ movs r2, r6 │ │ and.w r0, r0, r8 │ │ - b.n d1f66 │ │ + b.n d1f76 │ │ str r0, [r0, r0] │ │ - b.n d2606 │ │ + b.n d2616 │ │ movs r3, r0 │ │ - b.n d206c │ │ + b.n d207c │ │ ands r0, r0 │ │ - b.n d260e │ │ + b.n d261e │ │ vpmin.u32 q1, q12, │ │ lsls r1, r0, #12 │ │ - b.n d2502 │ │ + b.n d2512 │ │ lsls r6, r6, #1 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n d2402 │ │ + b.n d2412 │ │ str r0, [r0, r0] │ │ - b.n d2424 │ │ + b.n d2434 │ │ movs r1, r4 │ │ stmia.w r9, {r0, r1, r3, r4, r5, r6} │ │ and.w r0, r0, r8, lsl #24 │ │ - b.n d1f92 │ │ + b.n d1fa2 │ │ str r3, [r0, #0] │ │ - b.n d2094 │ │ + b.n d20a4 │ │ movs r4, r0 │ │ cmp r2, #0 │ │ str r7, [r0, #24] │ │ - b.n d1ffa │ │ + b.n d200a │ │ lsrs r0, r3 │ │ - b.n d218a │ │ + b.n d219a │ │ str r4, [r0, #0] │ │ - b.n d1fb2 │ │ + b.n d1fc2 │ │ str r5, [r0, #0] │ │ - b.n d20ac │ │ + b.n d20bc │ │ lsls r2, r5, #1 │ │ cmp r2, #0 │ │ strb r1, [r0, #0] │ │ - b.n d23bc │ │ + b.n d23cc │ │ strb r0, [r2, #0] │ │ - b.n d1a24 │ │ + b.n d1a34 │ │ str r7, [r0, r6] │ │ - b.n d1e76 │ │ + b.n d1e86 │ │ ands r4, r0 │ │ - b.n d1a3a │ │ + b.n d1a4a │ │ vpmin.u16 , , │ │ movs r0, r1 │ │ - b.n d1f66 │ │ + b.n d1f76 │ │ asrs r3, r0, #32 │ │ - b.n d1f68 │ │ + b.n d1f78 │ │ movs r1, r0 │ │ - b.n d224a │ │ + b.n d225a │ │ vpmin.u16 , , │ │ lsrs r3, r1, #31 │ │ - b.n d2450 │ │ + b.n d2460 │ │ lsrs r7, r5, #11 │ │ orn sl, r0, #6782976 @ 0x678000 │ │ - bl ffd1bd54 │ │ + bl ffd1bd64 │ │ @ instruction: 0xeaff0004 │ │ - b.n d1fe6 │ │ + b.n d1ff6 │ │ movs r5, r0 │ │ - b.n d20f4 │ │ + b.n d2104 │ │ movs r0, r0 │ │ - b.n d268a │ │ + b.n d269a │ │ movs r1, r0 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n d25f2 │ │ + b.n d2602 │ │ movs r0, r0 │ │ - b.n d2716 │ │ + b.n d2726 │ │ strb r0, [r0, #0] │ │ lsls r0, r4, #6 │ │ movs r0, #0 │ │ lsls r0, r4, #6 │ │ adds r0, #7 │ │ - b.n d22a2 │ │ + b.n d22b2 │ │ movs r0, r1 │ │ and.w r0, r0, r1, lsl #4 │ │ - b.n d2412 │ │ + b.n d2422 │ │ adds r0, #0 │ │ - b.n d24f8 │ │ + b.n d2508 │ │ movs r0, #4 │ │ - b.n d2016 │ │ + b.n d2026 │ │ movs r0, #5 │ │ - b.n d2124 │ │ + b.n d2134 │ │ movs r0, #0 │ │ - b.n d26ba │ │ + b.n d26ca │ │ movs r0, #1 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n d2626 │ │ + b.n d2636 │ │ adds r0, #2 │ │ lsls r0, r4, #6 │ │ movs r0, #1 │ │ asrs r0, r4, #6 │ │ movs r2, r0 │ │ - b.n d1fea │ │ + b.n d1ffa │ │ asrs r3, r0, #32 │ │ - b.n d1fea │ │ + b.n d1ffa │ │ movs r1, r0 │ │ - b.n d22b6 │ │ + b.n d22c6 │ │ vpmin.u8 , , │ │ movs r0, r4 │ │ - b.n d1ad8 │ │ + b.n d1ae8 │ │ asrs r0, r0, #32 │ │ - b.n d26e2 │ │ - adds r1, #67 @ 0x43 │ │ + b.n d26f2 │ │ + adds r1, #66 @ 0x42 │ │ @ instruction: 0xebff0000 │ │ - b.n d264a │ │ + b.n d265a │ │ lsls r7, r3, #2 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n d1ae6 │ │ + b.n d1af6 │ │ adds r0, #36 @ 0x24 │ │ - b.n d1af0 │ │ + b.n d1b00 │ │ str r0, [r2, r0] │ │ - b.n d1aec │ │ + b.n d1afc │ │ movs r0, #0 │ │ - b.n d1af0 │ │ + b.n d1b00 │ │ strh r0, [r0, #0] │ │ - b.n d1ae8 │ │ + b.n d1af8 │ │ movs r0, r0 │ │ - b.n d2670 │ │ + b.n d2680 │ │ asrs r4, r0, #32 │ │ - b.n d1afc │ │ + b.n d1b0c │ │ adds r0, #4 │ │ - b.n d1af4 │ │ + b.n d1b04 │ │ str r4, [r0, #0] │ │ - b.n d1af2 │ │ + b.n d1b02 │ │ stmia r0!, {r4, r5} │ │ - b.n d1a0c │ │ - b.n d2030 │ │ - b.n d1a10 │ │ + b.n d1a1c │ │ + b.n d2040 │ │ + b.n d1a20 │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ movs r0, r3 │ │ - b.n d1b14 │ │ + b.n d1b24 │ │ lsls r1, r0, #12 │ │ - b.n d2612 │ │ + b.n d2622 │ │ movs r4, r3 │ │ subs r0, r0, r0 │ │ str r0, [r1, #0] │ │ - b.n d2092 │ │ + b.n d20a2 │ │ lsls r0, r2, #2 │ │ ldmia.w r0, {r0, r1, sp, lr} │ │ - b.n d2198 │ │ + b.n d21a8 │ │ movs r2, r0 │ │ cmp r2, #0 │ │ str r2, [r0, #0] │ │ - b.n d20a6 │ │ + b.n d20b6 │ │ str r1, [r0, #0] │ │ - b.n d21b0 │ │ + b.n d21c0 │ │ movs r1, r2 │ │ cmp r2, #0 │ │ str r1, [r0, #0] │ │ - b.n d24b4 │ │ + b.n d24c4 │ │ str r0, [r2, #0] │ │ - b.n d1b20 │ │ + b.n d1b30 │ │ movs r0, r4 │ │ lsrs r0, r0, #8 │ │ asrs r0, r1, #32 │ │ - b.n d2516 │ │ + b.n d2526 │ │ movs r1, #133 @ 0x85 │ │ - b.n d235a │ │ + b.n d236a │ │ str r4, [r1, r0] │ │ - b.n d235e │ │ + b.n d236e │ │ str r6, [r1, #0] │ │ - b.n d2362 │ │ - lsrs r6, r4, #19 │ │ + b.n d2372 │ │ + lsrs r7, r5, #17 │ │ mla r0, r0, r6, lr │ │ - b.n d236a │ │ + b.n d237a │ │ stmia r0!, {r0, r2} │ │ - b.n d236e │ │ + b.n d237e │ │ lsls r5, r0, #1 │ │ and.w r0, r0, r8 │ │ - b.n d20da │ │ + b.n d20ea │ │ ands r0, r0 │ │ - b.n d277a │ │ + b.n d278a │ │ movs r3, r0 │ │ - b.n d21e0 │ │ + b.n d21f0 │ │ strb r0, [r0, #0] │ │ - b.n d2782 │ │ + b.n d2792 │ │ lsls r0, r0, #1 │ │ cmp r2, #0 │ │ lsls r1, r0, #12 │ │ - b.n d2676 │ │ + b.n d2686 │ │ movs r3, r5 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n d2576 │ │ + b.n d2586 │ │ strb r0, [r0, #0] │ │ - b.n d2598 │ │ + b.n d25a8 │ │ lsls r1, r0, #2 │ │ stmia.w r9, {r4, r5} │ │ and.w r0, r0, r8, lsl #28 │ │ - b.n d2106 │ │ + b.n d2116 │ │ strb r3, [r0, #0] │ │ - b.n d2208 │ │ + b.n d2218 │ │ movs r5, r0 │ │ cmp r2, #0 │ │ strb r5, [r0, #6] │ │ - b.n d216e │ │ + b.n d217e │ │ ands r0, r1 │ │ - b.n d1aa0 │ │ + b.n d1ab0 │ │ strb r4, [r0, #0] │ │ - b.n d1aa4 │ │ + b.n d1ab4 │ │ str r4, [r0, #0] │ │ - b.n d212a │ │ + b.n d213a │ │ strb r7, [r0, #0] │ │ - b.n d2224 │ │ + b.n d2234 │ │ movs r6, r3 │ │ cmp r2, #0 │ │ str r1, [r0, #0] │ │ - b.n d2530 │ │ + b.n d2540 │ │ str r0, [r2, #0] │ │ - b.n d1b9c │ │ + b.n d1bac │ │ sbcs r6, r0 │ │ - b.n d1fee │ │ + b.n d1ffe │ │ strb r4, [r0, #0] │ │ - b.n d1bb2 │ │ + b.n d1bc2 │ │ movs r4, r5 │ │ subs r0, r0, r0 │ │ movs r0, r1 │ │ - b.n d20de │ │ + b.n d20ee │ │ asrs r3, r0, #32 │ │ - b.n d20e0 │ │ + b.n d20f0 │ │ movs r1, r0 │ │ - b.n d23c2 │ │ + b.n d23d2 │ │ movs r0, r5 │ │ subs r0, r0, r0 │ │ lsrs r5, r5, #29 │ │ - b.n d25c8 │ │ + b.n d25d8 │ │ lsrs r7, r5, #11 │ │ orn sl, r0, #6782976 @ 0x678000 │ │ orr.w r0, r9, #10747904 @ 0xa40000 │ │ @ instruction: 0xea008001 │ │ - b.n d256a │ │ + b.n d257a │ │ movs r4, r4 │ │ - b.n d1bf8 │ │ + b.n d1c08 │ │ adds r0, #0 │ │ - b.n d2648 │ │ + b.n d2658 │ │ str r1, [r0, r0] │ │ - b.n d2406 │ │ + b.n d2416 │ │ strh r0, [r0, #0] │ │ - b.n d1bca │ │ + b.n d1bda │ │ asrs r3, r0, #32 │ │ - b.n d240e │ │ + b.n d241e │ │ adds r0, #4 │ │ - b.n d1bd2 │ │ + b.n d1be2 │ │ movs r2, r0 │ │ - b.n d2416 │ │ + b.n d2426 │ │ movs r0, #8 │ │ - b.n d241a │ │ + b.n d242a │ │ movs r0, r0 │ │ - b.n d278c │ │ + b.n d279c │ │ movs r0, r1 │ │ movs r0, r4 │ │ adds r0, #3 │ │ movs r5, r4 │ │ movs r3, r0 │ │ lsls r0, r2, #6 │ │ mrc2 10, 4, r1, cr15, cr15, {7} @ │ │ lsrs r3, r3, #29 │ │ - b.n d2610 │ │ + b.n d2620 │ │ lsrs r7, r5, #11 │ │ orn sl, r0, #6782976 @ 0x678000 │ │ - bl ffd1be30 │ │ + bl ffd1be40 │ │ @ instruction: 0xeaff8001 │ │ - b.n d25b2 │ │ + b.n d25c2 │ │ movs r4, r4 │ │ - b.n d1c40 │ │ + b.n d1c50 │ │ adds r0, #0 │ │ - b.n d2690 │ │ + b.n d26a0 │ │ strb r1, [r0, #0] │ │ - b.n d244e │ │ + b.n d245e │ │ strh r0, [r0, #0] │ │ - b.n d1c12 │ │ + b.n d1c22 │ │ asrs r3, r0, #32 │ │ - b.n d2456 │ │ + b.n d2466 │ │ adds r0, #4 │ │ - b.n d1c1a │ │ + b.n d1c2a │ │ movs r2, r0 │ │ - b.n d245e │ │ + b.n d246e │ │ movs r0, #8 │ │ - b.n d2462 │ │ + b.n d2472 │ │ movs r0, r0 │ │ - b.n d27d0 │ │ + b.n d27e0 │ │ movs r0, r1 │ │ movs r0, r4 │ │ adds r0, #3 │ │ movs r7, r4 │ │ movs r3, r0 │ │ lsls r0, r2, #6 │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ lsrs r1, r1, #29 │ │ - b.n d2658 │ │ + b.n d2668 │ │ lsrs r7, r5, #11 │ │ orn sl, r0, #6782976 @ 0x678000 │ │ orr.w r0, r9, #33280 @ 0x8200 │ │ - b.n d2486 │ │ + b.n d2496 │ │ strb r1, [r0, #0] │ │ - b.n d248a │ │ + b.n d249a │ │ movs r4, r0 │ │ - b.n d21a6 │ │ + b.n d21b6 │ │ asrs r7, r0, #32 │ │ - b.n d21ae │ │ + b.n d21be │ │ movs r1, r0 │ │ - b.n d2476 │ │ + b.n d2486 │ │ movs r0, r7 │ │ subs r0, r0, r0 │ │ movs r0, #48 @ 0x30 │ │ - b.n d1b94 │ │ + b.n d1ba4 │ │ adds r0, #44 @ 0x2c │ │ - b.n d1b98 │ │ + b.n d1ba8 │ │ movs r0, r3 │ │ - b.n d1ca0 │ │ + b.n d1cb0 │ │ add r6, sp, #452 @ 0x1c4 │ │ @ instruction: 0xebff0000 │ │ - b.n d280e │ │ + b.n d281e │ │ mcr2 10, 4, r0, cr13, cr15, {7} @ │ │ movs r5, r5 │ │ and.w r0, r0, r0, rrx │ │ - b.n d1bb0 │ │ + b.n d1bc0 │ │ movs r0, #8 │ │ - b.n d2698 │ │ + b.n d26a8 │ │ asrs r4, r5, #32 │ │ - b.n d1bb8 │ │ + b.n d1bc8 │ │ lsls r3, r0, #4 │ │ stmia.w r2, {r0, r2, r5, r6, r7, r8, sp} │ │ - b.n d278a │ │ + b.n d279a │ │ lsls r4, r4, #3 │ │ - b.n d1ccc │ │ + b.n d1cdc │ │ movs r0, r0 │ │ - b.n d22b0 │ │ + b.n d22c0 │ │ movs r0, r0 │ │ - b.n d1cb0 │ │ + b.n d1cc0 │ │ asrs r4, r3, #3 │ │ - b.n d1cd8 │ │ + b.n d1ce8 │ │ movs r2, r0 │ │ - b.n d28de │ │ + b.n d28ee │ │ adds r0, #216 @ 0xd8 │ │ - b.n d1ce0 │ │ + b.n d1cf0 │ │ asrs r1, r0, #32 │ │ - b.n d22c4 │ │ + b.n d22d4 │ │ adds r0, #3 │ │ - b.n d22c8 │ │ - movs r4, #30 │ │ + b.n d22d8 │ │ + movs r4, #29 │ │ @ instruction: 0xebff0001 │ │ - b.n d2642 │ │ + b.n d2652 │ │ movs r2, r0 │ │ - b.n d2896 │ │ + b.n d28a6 │ │ mrc2 10, 3, r2, cr11, cr15, {7} @ │ │ movs r0, r3 │ │ and.w r0, r0, r4, lsr #32 │ │ - b.n d1cfc │ │ + b.n d1d0c │ │ movs r0, r6 │ │ @ instruction: 0xeb008000 │ │ - b.n d250a │ │ + b.n d251a │ │ lsls r0, r4, #2 │ │ - b.n d1d02 │ │ + b.n d1d12 │ │ asrs r4, r1, #9 │ │ - b.n d1d06 │ │ + b.n d1d16 │ │ movs r0, r0 │ │ - b.n d1cf6 │ │ + b.n d1d06 │ │ movs r1, r0 │ │ - b.n d22da │ │ + b.n d22ea │ │ movs r4, r0 │ │ - b.n d247e │ │ + b.n d248e │ │ movs r0, r1 │ │ cmp r2, #0 │ │ movs r0, r0 │ │ - b.n d2896 │ │ + b.n d28a6 │ │ movs r6, r0 │ │ subs r0, r0, r0 │ │ asrs r0, r4, #32 │ │ - b.n d1d28 │ │ + b.n d1d38 │ │ movs r4, r4 │ │ - b.n d2688 │ │ + b.n d2698 │ │ movs r0, #1 │ │ - b.n d2936 │ │ + b.n d2946 │ │ adds r0, #3 │ │ - b.n d293a │ │ - add r1, pc, #924 @ (adr r1, d2598 ) │ │ + b.n d294a │ │ + add r1, pc, #924 @ (adr r1, d25a8 ) │ │ @ instruction: 0xebff8020 │ │ - b.n d1c38 │ │ + b.n d1c48 │ │ @ instruction: 0xfff0eaff │ │ lsls r2, r6, #30 │ │ - b.n d281a │ │ + b.n d282a │ │ lsrs r7, r7, #31 │ │ - b.n d28ac │ │ + b.n d28bc │ │ movs r0, r0 │ │ - b.n d24c2 │ │ + b.n d24d2 │ │ movs r0, r0 │ │ asrs r0, r3, #13 │ │ movs r1, r0 │ │ subs r0, r0, r0 │ │ mrc2 10, 7, lr, cr1, cr15, {7} @ │ │ strh r0, [r0, #0] │ │ - b.n d2962 │ │ + b.n d2972 │ │ movs r0, r1 │ │ - b.n d2566 │ │ - beq.n d2260 │ │ - b.n d26c0 │ │ + b.n d2576 │ │ + beq.n d2270 │ │ + b.n d26d0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {pc} │ │ - b.n d2572 │ │ + b.n d2582 │ │ movs r0, r1 │ │ - b.n d2576 │ │ - beq.n d2270 │ │ - b.n d26d0 │ │ + b.n d2586 │ │ + beq.n d2280 │ │ + b.n d26e0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, r4, r5} │ │ - b.n d1d80 │ │ + b.n d1d90 │ │ movs r1, #247 @ 0xf7 │ │ - b.n d2846 │ │ + b.n d2856 │ │ asrs r0, r7, #32 │ │ - b.n d1d88 │ │ + b.n d1d98 │ │ movs r0, r0 │ │ - b.n d236c │ │ + b.n d237c │ │ asrs r1, r0, #32 │ │ - b.n d2370 │ │ - movs r2, #232 @ 0xe8 │ │ + b.n d2380 │ │ + movs r2, #231 @ 0xe7 │ │ @ instruction: 0xebfff000 │ │ - b.n d289a │ │ - blx 4d289c │ │ - blx 4d28a0 │ │ + b.n d28aa │ │ + blx 4d28ac │ │ + blx 4d28b0 │ │ @ instruction: 0xffffffff │ │ @ instruction: 0xffffffff │ │ ... │ │ - ldmia r4, {r2, r3, r4, r5, r7} │ │ + ldmia r4!, {r2, r3, r6, r7} │ │ movs r0, r0 │ │ - strh r0, [r2, #32] │ │ - vsubl.u , d3, d14 │ │ - vsra.u64 d30, d20, #13 │ │ - vraddhn.i d28, , q9 │ │ - @ instruction: 0xfff3d162 │ │ + strh r7, [r6, #32] │ │ + vrsra.u32 d29, d20, #13 │ │ + vaddw.u q15, , d20 │ │ + vmlsl.u q14, d3, d28[0] │ │ + vsubl.u , d19, d8 │ │ vcvt.f16.u16 d20, d0, #13 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n d27ac │ │ - beq.n d22b4 │ │ - b.n d2730 │ │ + b.n d27bc │ │ + beq.n d22c4 │ │ + b.n d2740 │ │ ands r0, r0 │ │ - b.n d25da │ │ + b.n d25ea │ │ lsls r4, r0, #3 │ │ - b.n d1dbe │ │ + b.n d1dce │ │ movs r0, #8 │ │ - b.n d29e2 │ │ + b.n d29f2 │ │ asrs r4, r7, #2 │ │ - b.n d1e4e │ │ + b.n d1e5e │ │ movs r0, #12 │ │ - b.n d1dc4 │ │ + b.n d1dd4 │ │ movs r0, #13 │ │ - b.n d25ee │ │ + b.n d25fe │ │ lsls r4, r0, #9 │ │ - b.n d1dd2 │ │ + b.n d1de2 │ │ asrs r2, r0, #32 │ │ - b.n d29b8 │ │ + b.n d29c8 │ │ movs r0, r0 │ │ - b.n d1dda │ │ + b.n d1dea │ │ asrs r4, r7, #2 │ │ - b.n d1e46 │ │ + b.n d1e56 │ │ asrs r0, r0, #32 │ │ - b.n d2a02 │ │ + b.n d2a12 │ │ asrs r0, r1, #32 │ │ - b.n d1de0 │ │ + b.n d1df0 │ │ asrs r0, r0, #32 │ │ - b.n d1de4 │ │ + b.n d1df4 │ │ asrs r4, r0, #32 │ │ - b.n d2a0e │ │ + b.n d2a1e │ │ lsls r0, r0, #4 │ │ - b.n d23d4 │ │ + b.n d23e4 │ │ movs r4, r0 │ │ - b.n d1df0 │ │ + b.n d1e00 │ │ lsls r0, r7, #2 │ │ - b.n d27e2 │ │ + b.n d27f2 │ │ asrs r0, r1, #32 │ │ - b.n d27f8 │ │ + b.n d2808 │ │ stmia r6!, {r3, r5, r6} │ │ @ instruction: 0xebff10bc │ │ - b.n d1e8e │ │ + b.n d1e9e │ │ asrs r2, r0, #32 │ │ - b.n d276c │ │ + b.n d277c │ │ asrs r4, r7, #2 │ │ - b.n d1e76 │ │ - beq.n d2300 │ │ - b.n d2788 │ │ + b.n d1e86 │ │ + beq.n d2310 │ │ + b.n d2798 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n d2818 │ │ - beq.n d2228 │ │ - b.n d279c │ │ + b.n d2828 │ │ + beq.n d2238 │ │ + b.n d27ac │ │ ands r1, r0 │ │ - b.n d2646 │ │ + b.n d2656 │ │ asrs r4, r7, #32 │ │ - b.n d1e24 │ │ + b.n d1e34 │ │ strb r0, [r4, #0] │ │ - b.n d1e76 │ │ + b.n d1e86 │ │ str r0, [r0, #0] │ │ - b.n d2652 │ │ + b.n d2662 │ │ asrs r4, r0, #32 │ │ - b.n d1e3e │ │ + b.n d1e4e │ │ movs r1, r0 │ │ - b.n d2648 │ │ + b.n d2658 │ │ movs r6, r2 │ │ subs r0, r0, r0 │ │ lsls r0, r2, #19 │ │ - b.n d26ae │ │ + b.n d26be │ │ movs r2, #208 @ 0xd0 │ │ - b.n d26a8 │ │ + b.n d26b8 │ │ strb r0, [r1, #4] │ │ - b.n d1e4a │ │ + b.n d1e5a │ │ asrs r4, r1, #4 │ │ - b.n d1e4e │ │ + b.n d1e5e │ │ movs r3, r0 │ │ - b.n d2656 │ │ + b.n d2666 │ │ strb r0, [r0, #0] │ │ - b.n d1e3e │ │ + b.n d1e4e │ │ asrs r4, r0, #32 │ │ - b.n d1e42 │ │ + b.n d1e52 │ │ movs r6, r1 │ │ lsrs r0, r0, #8 │ │ movs r4, r7 │ │ - b.n d1e7c │ │ + b.n d1e8c │ │ asrs r0, r2, #1 │ │ - b.n d27dc │ │ + b.n d27ec │ │ movs r0, #0 │ │ - b.n d2a8a │ │ + b.n d2a9a │ │ lsls r0, r7, #2 │ │ - b.n d284e │ │ - cmp r5, #202 @ 0xca │ │ + b.n d285e │ │ + cmp r5, #201 @ 0xc9 │ │ @ instruction: 0xebff0000 │ │ - b.n d29f6 │ │ + b.n d2a06 │ │ lsls r0, r7, #6 │ │ subs r0, r0, r0 │ │ lsls r4, r1, #1 │ │ - b.n d1d94 │ │ + b.n d1da4 │ │ movs r0, r1 │ │ - b.n d2a02 │ │ + b.n d2a12 │ │ lsls r5, r1, #6 │ │ subs r0, r0, r0 │ │ lsls r0, r2, #1 │ │ - b.n d1da0 │ │ + b.n d1db0 │ │ strb r0, [r0, #0] │ │ - b.n d1e8e │ │ + b.n d1e9e │ │ asrs r4, r0, #32 │ │ - b.n d1e92 │ │ + b.n d1ea2 │ │ strb r0, [r0, #0] │ │ - b.n d1e7e │ │ + b.n d1e8e │ │ asrs r4, r0, #32 │ │ - b.n d1e82 │ │ + b.n d1e92 │ │ ldrsh r2, [r1, r5] │ │ - b.n d288a │ │ + b.n d289a │ │ ands r4, r1 │ │ - b.n d1e9c │ │ + b.n d1eac │ │ asrs r0, r3, #32 │ │ - b.n d1ea0 │ │ + b.n d1eb0 │ │ adds r7, r4, r0 │ │ - b.n d26ac │ │ + b.n d26bc │ │ movs r1, r0 │ │ - b.n d281c │ │ - add r0, pc, #256 @ (adr r0, d2490 ) │ │ - b.n d1ebe │ │ + b.n d282c │ │ + add r0, pc, #256 @ (adr r0, d24a0 ) │ │ + b.n d1ece │ │ asrs r0, r7 │ │ - b.n d1ec2 │ │ + b.n d1ed2 │ │ lsrs r7, r7, #31 │ │ asrs r7, r1, #12 │ │ strh r0, [r0, #0] │ │ - b.n d1ec8 │ │ + b.n d1ed8 │ │ asrs r6, r0, #32 │ │ @ instruction: 0xe9950000 │ │ - b.n d2a4e │ │ + b.n d2a5e │ │ movs r4, r6 │ │ - b.n d1ec4 │ │ + b.n d1ed4 │ │ movs r0, r0 │ │ - b.n d2b6e │ │ + b.n d2b7e │ │ strb r4, [r3, #0] │ │ - b.n d1ecc │ │ + b.n d1edc │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ adcs r0, r0 │ │ - b.n d1ee6 │ │ + b.n d1ef6 │ │ str r0, [sp, #0] │ │ - b.n d2afe │ │ - b.n d23c2 │ │ - b.n d2702 │ │ + b.n d2b0e │ │ + b.n d23d2 │ │ + b.n d2712 │ │ adds r0, #0 │ │ - b.n d2b06 │ │ + b.n d2b16 │ │ movs r4, r0 │ │ - b.n d1ef2 │ │ + b.n d1f02 │ │ ands r0, r0 │ │ - b.n d1ef6 │ │ + b.n d1f06 │ │ strb r0, [r1, #0] │ │ - b.n d247a │ │ + b.n d248a │ │ strb r1, [r0, #0] │ │ - b.n d2576 │ │ + b.n d2586 │ │ str r0, [sp, #4] │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n d2a90 │ │ - b.n d23e0 │ │ + b.n d2aa0 │ │ + b.n d23f0 │ │ asrs r0, r4, #6 │ │ movs r0, #2 │ │ - b.n d2496 │ │ + b.n d24a6 │ │ asrs r4, r1, #32 │ │ - b.n d258c │ │ + b.n d259c │ │ adds r0, #1 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n d2a98 │ │ - b.n d23f4 │ │ + b.n d2aa8 │ │ + b.n d2404 │ │ lsls r0, r4, #6 │ │ movs r0, r0 │ │ - b.n d2aac │ │ + b.n d2abc │ │ strh r4, [r0, #0] │ │ asrs r0, r4, #6 │ │ movs r0, r0 │ │ - b.n d2aa8 │ │ + b.n d2ab8 │ │ strh r4, [r0, #0] │ │ lsls r0, r4, #6 │ │ movs r7, r0 │ │ and.w r0, r0, r2, lsl #8 │ │ - b.n d24be │ │ + b.n d24ce │ │ adds r0, #0 │ │ - b.n d2b52 │ │ + b.n d2b62 │ │ movs r0, #12 │ │ - b.n d25b8 │ │ + b.n d25c8 │ │ adds r0, #1 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n d2ac4 │ │ + b.n d2ad4 │ │ asrs r0, r0, #32 │ │ lsls r0, r4, #6 │ │ strh r0, [r0, #0] │ │ lsls r0, r4, #6 │ │ - b.n d242a │ │ - b.n d276a │ │ + b.n d243a │ │ + b.n d277a │ │ lsls r0, r1, #4 │ │ - b.n d1f62 │ │ + b.n d1f72 │ │ movs r0, r4 │ │ - b.n d1f4c │ │ + b.n d1f5c │ │ movs r5, r0 │ │ - b.n d2776 │ │ + b.n d2786 │ │ asrs r0, r1, #2 │ │ - b.n d1f9a │ │ + b.n d1faa │ │ str r0, [r7, r0] │ │ - b.n d1f58 │ │ + b.n d1f68 │ │ str r0, [r0, r7] │ │ - b.n d1f6e │ │ + b.n d1f7e │ │ lsls r0, r3 │ │ - b.n d1f7a │ │ - add r0, pc, #192 @ (adr r0, d2508 ) │ │ - b.n d1f64 │ │ - movs r0, r0 │ │ - b.n d2af8 │ │ - add r1, pc, #48 @ (adr r1, d2480 ) │ │ - b.n d1f86 │ │ + b.n d1f8a │ │ + add r0, pc, #192 @ (adr r0, d2518 ) │ │ + b.n d1f74 │ │ + movs r0, r0 │ │ + b.n d2b08 │ │ + add r1, pc, #48 @ (adr r1, d2490 ) │ │ + b.n d1f96 │ │ asrs r0, r1, #32 │ │ @ instruction: 0xe990002c │ │ - b.n d1f74 │ │ + b.n d1f84 │ │ movs r4, r1 │ │ - b.n d1f7e │ │ + b.n d1f8e │ │ movs r1, r3 │ │ lsrs r0, r0, #8 │ │ str r0, [r1, r7] │ │ - b.n d1f92 │ │ + b.n d1fa2 │ │ movs r0, #0 │ │ - b.n d2baa │ │ + b.n d2bba │ │ str r4, [r1, #0] │ │ - b.n d27ae │ │ + b.n d27be │ │ ands r0, r5 │ │ - b.n d1f8c │ │ + b.n d1f9c │ │ ands r0, r0 │ │ - b.n d2bb6 │ │ + b.n d2bc6 │ │ stmia r0!, {} │ │ - b.n d27ba │ │ + b.n d27ca │ │ str r0, [sp, #0] │ │ - b.n d1fa8 │ │ + b.n d1fb8 │ │ strb r4, [r0, #0] │ │ - b.n d1fac │ │ + b.n d1fbc │ │ str r1, [r0, r0] │ │ - b.n d2538 │ │ + b.n d2548 │ │ str r3, [r0, r0] │ │ - b.n d2638 │ │ + b.n d2648 │ │ movs r0, #1 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n d2b36 │ │ + b.n d2b46 │ │ str r3, [r0, r0] │ │ - b.n d27d6 │ │ + b.n d27e6 │ │ str r7, [r0, r0] │ │ asrs r0, r4, #6 │ │ str r6, [r0, #0] │ │ - b.n d2540 │ │ + b.n d2550 │ │ movs r0, r0 │ │ - b.n d2648 │ │ + b.n d2658 │ │ ands r1, r0 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n d2b52 │ │ + b.n d2b62 │ │ str r7, [r0, r0] │ │ lsls r0, r4, #6 │ │ movs r0, r0 │ │ - b.n d2b56 │ │ + b.n d2b66 │ │ asrs r1, r1, #32 │ │ asrs r0, r4, #6 │ │ movs r0, r0 │ │ - b.n d2b62 │ │ + b.n d2b72 │ │ asrs r1, r1, #32 │ │ lsls r0, r4, #6 │ │ ands r0, r5 │ │ - b.n d1ffc │ │ + b.n d200c │ │ movs r0, #0 │ │ - b.n d2c86 │ │ + b.n d2c96 │ │ movs r0, r1 │ │ and.w r0, r0, ip, lsl #28 │ │ - b.n d2570 │ │ + b.n d2580 │ │ movs r0, #0 │ │ - b.n d2c12 │ │ + b.n d2c22 │ │ movs r0, r0 │ │ - b.n d267c │ │ + b.n d268c │ │ movs r0, #1 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n d2b82 │ │ + b.n d2b92 │ │ movs r0, #0 │ │ - b.n d2ca2 │ │ + b.n d2cb2 │ │ adds r0, #2 │ │ lsls r0, r4, #6 │ │ asrs r2, r0, #32 │ │ lsls r0, r4, #6 │ │ str r3, [r0, r0] │ │ - b.n d282e │ │ + b.n d283e │ │ movs r4, r7 │ │ - b.n d202c │ │ + b.n d203c │ │ adds r0, #0 │ │ - b.n d2c36 │ │ + b.n d2c46 │ │ movs r0, #40 @ 0x28 │ │ - b.n d1f10 │ │ + b.n d1f20 │ │ movs r0, #36 @ 0x24 │ │ - b.n d1f14 │ │ + b.n d1f24 │ │ str r4, [r0, #0] │ │ - b.n d2022 │ │ + b.n d2032 │ │ movs r1, r0 │ │ - b.n d25b6 │ │ + b.n d25c6 │ │ movs r5, r0 │ │ - b.n d26c6 │ │ + b.n d26d6 │ │ stmia r0!, {r3, r4, r5} │ │ - b.n d2048 │ │ + b.n d2058 │ │ movs r0, r0 │ │ - b.n d2c52 │ │ + b.n d2c62 │ │ movs r1, r0 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n d2bba │ │ + b.n d2bca │ │ asrs r0, r1, #32 │ │ asrs r0, r4, #6 │ │ strh r0, [r4, #0] │ │ - b.n d205c │ │ + b.n d206c │ │ str r6, [r1, r0] │ │ asrs r0, r4, #6 │ │ movs r0, r6 │ │ - b.n d2064 │ │ + b.n d2074 │ │ asrs r1, r0, #32 │ │ - b.n d25de │ │ + b.n d25ee │ │ movs r0, #5 │ │ - b.n d26c6 │ │ + b.n d26d6 │ │ movs r7, r0 │ │ - b.n d20d6 │ │ + b.n d20e6 │ │ movs r0, #130 @ 0x82 │ │ - b.n d287a │ │ + b.n d288a │ │ cmp r7, #161 @ 0xa1 │ │ - b.n d2842 │ │ + b.n d2852 │ │ asrs r1, r0, #2 │ │ - b.n d266a │ │ + b.n d267a │ │ movs r0, #0 │ │ - b.n d2a8a │ │ + b.n d2a9a │ │ strb r1, [r0, #0] │ │ - b.n d25fa │ │ + b.n d260a │ │ movs r0, #2 │ │ - b.n d2702 │ │ + b.n d2712 │ │ asrs r0, r0, #32 │ │ - b.n d2a98 │ │ + b.n d2aa8 │ │ asrs r1, r0, #32 │ │ - b.n d29b8 │ │ + b.n d29c8 │ │ movs r0, #0 │ │ asrs r0, r0, #12 │ │ strb r0, [r0, #0] │ │ asrs r0, r0, #12 │ │ movs r4, r0 │ │ - b.n d2b82 │ │ + b.n d2b92 │ │ movs r0, #36 @ 0x24 │ │ - b.n d2080 │ │ + b.n d2090 │ │ strb r0, [r5, #0] │ │ - b.n d2084 │ │ + b.n d2094 │ │ movs r1, r2 │ │ subs r0, r0, r0 │ │ strb r4, [r3, #0] │ │ - b.n d20ac │ │ + b.n d20bc │ │ str r0, [r3, r0] │ │ - b.n d20b0 │ │ + b.n d20c0 │ │ movs r0, r1 │ │ - b.n d2628 │ │ + b.n d2638 │ │ movs r2, r1 │ │ - b.n d2728 │ │ + b.n d2738 │ │ movs r4, r1 │ │ cmp r2, #0 │ │ movs r4, r7 │ │ - b.n d20c0 │ │ + b.n d20d0 │ │ movs r0, #7 │ │ - b.n d263a │ │ + b.n d264a │ │ adds r0, #5 │ │ - b.n d2722 │ │ + b.n d2732 │ │ lsls r0, r1, #3 │ │ - b.n d20b2 │ │ + b.n d20c2 │ │ lsls r0, r2, #11 │ │ - b.n d2916 │ │ + b.n d2926 │ │ movs r0, r0 │ │ - b.n d263e │ │ + b.n d264e │ │ movs r1, r0 │ │ - b.n d2744 │ │ + b.n d2754 │ │ movs r4, r0 │ │ cmp r2, #0 │ │ movs r0, r0 │ │ - b.n d2ce6 │ │ + b.n d2cf6 │ │ strh r7, [r0, #0] │ │ - b.n d28ea │ │ - add r0, pc, #20 @ (adr r0, d25c0 ) │ │ - b.n d28ee │ │ + b.n d28fa │ │ + add r0, pc, #20 @ (adr r0, d25d0 ) │ │ + b.n d28fe │ │ movs r4, r4 │ │ - b.n d1fc8 │ │ + b.n d1fd8 │ │ movs r0, r5 │ │ - b.n d1fcc │ │ + b.n d1fdc │ │ movs r4, r6 │ │ - b.n d20f4 │ │ + b.n d2104 │ │ movs r0, #8 │ │ - b.n d28fe │ │ + b.n d290e │ │ adds r0, #10 │ │ - b.n d2902 │ │ + b.n d2912 │ │ ands r4, r6 │ │ - b.n d2a5c │ │ + b.n d2a6c │ │ ands r0, r0 │ │ - b.n d20e4 │ │ + b.n d20f4 │ │ lsls r0, r2, #26 │ │ - b.n d25ce │ │ + b.n d25de │ │ movs r0, r3 │ │ - b.n d20ec │ │ + b.n d20fc │ │ movs r4, r1 │ │ - b.n d2916 │ │ + b.n d2926 │ │ lsls r5, r1, #20 │ │ add.w r0, r0, ip, asr #32 │ │ - b.n d2118 │ │ + b.n d2128 │ │ movs r0, #8 │ │ - b.n d2922 │ │ + b.n d2932 │ │ adds r0, #10 │ │ - b.n d2926 │ │ + b.n d2936 │ │ str r0, [r0, r1] │ │ - b.n d2a80 │ │ + b.n d2a90 │ │ str r0, [r0, r0] │ │ - b.n d2108 │ │ + b.n d2118 │ │ lsls r7, r0, #20 │ │ add.w r0, r0, r0, lsr #29 │ │ - b.n d2a8c │ │ + b.n d2a9c │ │ asrs r4, r0, #32 │ │ - b.n d293a │ │ + b.n d294a │ │ movs r7, r0 │ │ - b.n d293e │ │ + b.n d294e │ │ lsls r7, r5, #21 │ │ add.w r0, r0, r0, lsr #17 │ │ - b.n d2b20 │ │ + b.n d2b30 │ │ asrs r5, r0, #32 │ │ - b.n d294a │ │ + b.n d295a │ │ movs r4, r0 │ │ - b.n d294e │ │ + b.n d295e │ │ lsls r3, r5, #21 │ │ add.w r0, r0, ip, rrx │ │ - b.n d2150 │ │ + b.n d2160 │ │ asrs r0, r6, #32 │ │ - b.n d2b1a │ │ + b.n d2b2a │ │ lsls r0, r7, #2 │ │ - b.n d2b1e │ │ + b.n d2b2e │ │ movs r4, r3 │ │ - b.n d213c │ │ + b.n d214c │ │ movs r0, r1 │ │ - b.n d2b2e │ │ + b.n d2b3e │ │ movs r0, r6 │ │ - b.n d2144 │ │ + b.n d2154 │ │ movs r0, r1 │ │ - b.n d2b3c │ │ + b.n d2b4c │ │ asrs r0, r7, #32 │ │ - b.n d214c │ │ + b.n d215c │ │ movs r4, r5 │ │ - b.n d2150 │ │ + b.n d2160 │ │ movs r7, r0 │ │ and.w r0, r0, r0, lsr #1 │ │ - b.n d2b58 │ │ + b.n d2b68 │ │ asrs r0, r0, #1 │ │ - b.n d2ad8 │ │ - add r0, pc, #208 @ (adr r0, d2714 ) │ │ - b.n d2160 │ │ + b.n d2ae8 │ │ + add r0, pc, #208 @ (adr r0, d2724 ) │ │ + b.n d2170 │ │ lsls r5, r3, #21 │ │ @ instruction: 0xeb00a034 │ │ - b.n d2188 │ │ + b.n d2198 │ │ movs r1, r0 │ │ - b.n d2b3a │ │ + b.n d2b4a │ │ movs r0, r0 │ │ - b.n d2c40 │ │ + b.n d2c50 │ │ lsls r1, r0, #3 │ │ cmp r2, #0 │ │ movs r0, r6 │ │ - b.n d2198 │ │ + b.n d21a8 │ │ str r0, [r2, #4] │ │ - b.n d219c │ │ + b.n d21ac │ │ str r0, [sp, #336] @ 0x150 │ │ - b.n d21a0 │ │ + b.n d21b0 │ │ lsrs r0, r2 │ │ - b.n d29ea │ │ + b.n d29fa │ │ movs r4, r5 │ │ - b.n d21a8 │ │ + b.n d21b8 │ │ lsls r0, r2, #3 │ │ - b.n d29f2 │ │ + b.n d2a02 │ │ movs r0, #4 │ │ - b.n d2716 │ │ + b.n d2726 │ │ movs r0, #5 │ │ - b.n d281c │ │ + b.n d282c │ │ movs r0, #0 │ │ - b.n d2dbe │ │ + b.n d2dce │ │ movs r0, #1 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n d2d2a │ │ + b.n d2d3a │ │ str r1, [r0, r0] │ │ asrs r0, r4, #6 │ │ ands r0, r0 │ │ asrs r0, r4, #6 │ │ movs r4, r0 │ │ - b.n d2742 │ │ + b.n d2752 │ │ movs r5, r0 │ │ - b.n d284a │ │ + b.n d285a │ │ movs r0, r0 │ │ - b.n d2dda │ │ + b.n d2dea │ │ movs r1, r0 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n d2d42 │ │ + b.n d2d52 │ │ str r2, [r1, r0] │ │ asrs r0, r4, #6 │ │ ands r0, r1 │ │ asrs r0, r4, #6 │ │ movs r4, r0 │ │ - b.n d275a │ │ + b.n d276a │ │ movs r5, r0 │ │ - b.n d2864 │ │ + b.n d2874 │ │ @ instruction: 0xffe02aff │ │ adds r0, #80 @ 0x50 │ │ - b.n d20f0 │ │ + b.n d2100 │ │ strb r4, [r1, #1] │ │ - b.n d20f4 │ │ + b.n d2104 │ │ movs r4, r0 │ │ - b.n d2768 │ │ + b.n d2778 │ │ movs r5, r0 │ │ - b.n d2874 │ │ + b.n d2884 │ │ movs r2, r6 │ │ cmp r2, #0 │ │ movs r0, r5 │ │ - b.n d2104 │ │ + b.n d2114 │ │ asrs r4, r4, #32 │ │ - b.n d2108 │ │ + b.n d2118 │ │ movs r0, #4 │ │ - b.n d2776 │ │ + b.n d2786 │ │ movs r0, #5 │ │ - b.n d287c │ │ + b.n d288c │ │ movs r0, r6 │ │ cmp r2, #0 │ │ movs r0, #3 │ │ - b.n d278e │ │ - add r0, pc, #208 @ (adr r0, d27b4 ) │ │ - b.n d2200 │ │ + b.n d279e │ │ + add r0, pc, #208 @ (adr r0, d27c4 ) │ │ + b.n d2210 │ │ movs r0, #7 │ │ - b.n d289c │ │ - add r0, pc, #36 @ (adr r0, d2710 ) │ │ - b.n d2a2e │ │ + b.n d28ac │ │ + add r0, pc, #36 @ (adr r0, d2720 ) │ │ + b.n d2a3e │ │ movs r0, #0 │ │ - b.n d2e32 │ │ + b.n d2e42 │ │ strb r0, [r2, #0] │ │ - b.n d2210 │ │ + b.n d2220 │ │ movs r0, #1 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n d2da2 │ │ - add r0, pc, #28 @ (adr r0, d271c ) │ │ + b.n d2db2 │ │ + add r0, pc, #28 @ (adr r0, d272c ) │ │ asrs r0, r4, #6 │ │ strb r6, [r0, #0] │ │ - b.n d2a46 │ │ + b.n d2a56 │ │ str r3, [r0, #0] │ │ asrs r0, r4, #6 │ │ movs r0, #0 │ │ - b.n d27ba │ │ + b.n d27ca │ │ movs r0, #1 │ │ - b.n d28c6 │ │ + b.n d28d6 │ │ strh r0, [r4, #0] │ │ - b.n d2230 │ │ + b.n d2240 │ │ movs r0, #0 │ │ - b.n d2e5a │ │ + b.n d2e6a │ │ adds r0, #20 │ │ - b.n d2238 │ │ + b.n d2248 │ │ movs r0, #1 │ │ adds r3, #0 │ │ movs r0, r0 │ │ - b.n d2dca │ │ - add r0, pc, #4 @ (adr r0, d272c ) │ │ + b.n d2dda │ │ + add r0, pc, #4 @ (adr r0, d273c ) │ │ asrs r0, r4, #6 │ │ str r0, [r0, #0] │ │ asrs r0, r4, #6 │ │ ands r1, r0 │ │ - b.n d2bda │ │ + b.n d2bea │ │ str r0, [r0, r0] │ │ - b.n d2cc0 │ │ + b.n d2cd0 │ │ movs r6, r0 │ │ - b.n d27e2 │ │ + b.n d27f2 │ │ movs r2, r1 │ │ - b.n d28e8 │ │ + b.n d28f8 │ │ movs r7, r6 │ │ subs r2, #0 │ │ movs r0, r7 │ │ - b.n d2280 │ │ + b.n d2290 │ │ movs r0, #4 │ │ - b.n d2a8a │ │ + b.n d2a9a │ │ adds r0, #5 │ │ - b.n d2a8e │ │ + b.n d2a9e │ │ add r4, sp, #988 @ 0x3dc │ │ @ instruction: 0xebff0000 │ │ - b.n d2df6 │ │ + b.n d2e06 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ movs r0, #60 @ 0x3c │ │ - b.n d2298 │ │ + b.n d22a8 │ │ strh r0, [r0, #0] │ │ - b.n d2ea2 │ │ + b.n d2eb2 │ │ movs r4, r0 │ │ - b.n d228a │ │ + b.n d229a │ │ asrs r0, r5, #32 │ │ - b.n d228e │ │ + b.n d229e │ │ movs r0, r0 │ │ - b.n d27f0 │ │ + b.n d2800 │ │ movs r0, r5 │ │ - b.n d2276 │ │ + b.n d2286 │ │ movs r1, r0 │ │ - b.n d2e16 │ │ + b.n d2e26 │ │ strh r0, [r0, #0] │ │ - cbz r0, d27f2 │ │ + cbz r0, d2802 │ │ movs r0, r0 │ │ - b.n d2e2e │ │ + b.n d2e3e │ │ @ instruction: 0xffea0aff │ │ lsls r7, r6, #1 │ │ @ instruction: 0xea008000 │ │ - b.n d2aca │ │ + b.n d2ada │ │ movs r1, r0 │ │ - b.n d2e6e │ │ + b.n d2e7e │ │ lsls r7, r6, #1 │ │ lsrs r0, r0, #8 │ │ @ instruction: 0xfff8eaff │ │ lsls r0, r2, #1 │ │ - b.n d2c30 │ │ + b.n d2c40 │ │ asrs r4, r6, #32 │ │ - b.n d2c34 │ │ + b.n d2c44 │ │ @ instruction: 0xffa7eaff │ │ movs r0, #1 │ │ - b.n d2c46 │ │ + b.n d2c56 │ │ str r0, [r0, #0] │ │ - b.n d2d2c │ │ + b.n d2d3c │ │ movs r4, r0 │ │ - b.n d284e │ │ + b.n d285e │ │ asrs r5, r0, #32 │ │ - b.n d2934 │ │ + b.n d2944 │ │ movs r5, r0 │ │ - b.n d2c56 │ │ + b.n d2c66 │ │ movs r0, r0 │ │ - b.n d2d5c │ │ + b.n d2d6c │ │ movs r4, r6 │ │ subs r2, #0 │ │ movs r0, r5 │ │ - b.n d2c58 │ │ + b.n d2c68 │ │ lsls r0, r1, #1 │ │ - b.n d22e0 │ │ + b.n d22f0 │ │ movs r1, r0 │ │ - b.n d2c72 │ │ + b.n d2c82 │ │ movs r0, r5 │ │ - b.n d21e4 │ │ + b.n d21f4 │ │ movs r0, r1 │ │ - b.n d2f12 │ │ + b.n d2f22 │ │ asrs r4, r3, #32 │ │ - b.n d2310 │ │ + b.n d2320 │ │ lsls r4, r1, #1 │ │ - b.n d22f4 │ │ + b.n d2304 │ │ movs r0, r0 │ │ - b.n d2d68 │ │ + b.n d2d78 │ │ movs r4, r4 │ │ - b.n d21f8 │ │ + b.n d2208 │ │ movs r1, r2 │ │ - b.n d2f26 │ │ + b.n d2f36 │ │ movs r0, r0 │ │ - b.n d2304 │ │ + b.n d2314 │ │ lsls r0, r0, #1 │ │ - b.n d2d08 │ │ + b.n d2d18 │ │ movs r0, #72 @ 0x48 │ │ - b.n d2d0c │ │ + b.n d2d1c │ │ adds r0, #0 │ │ - b.n d2f36 │ │ - adds r7, #14 │ │ + b.n d2f46 │ │ + adds r7, #13 │ │ @ instruction: 0xebff8040 │ │ - b.n d2338 │ │ + b.n d2348 │ │ lsls r2, r6, #30 │ │ - b.n d2e12 │ │ + b.n d2e22 │ │ lsrs r7, r7, #31 │ │ - b.n d2ea4 │ │ + b.n d2eb4 │ │ movs r0, r0 │ │ - b.n d2aba │ │ + b.n d2aca │ │ movs r0, r0 │ │ asrs r0, r3, #13 │ │ lsls r4, r2, #1 │ │ subs r0, r0, r0 │ │ lsls r4, r0, #1 │ │ - b.n d23d0 │ │ + b.n d23e0 │ │ movs r0, #0 │ │ - b.n d28c2 │ │ + b.n d28d2 │ │ str r0, [r0, #0] │ │ - b.n d2da8 │ │ + b.n d2db8 │ │ movs r3, r3 │ │ and.w r0, r0, r2 │ │ - b.n d2cd2 │ │ + b.n d2ce2 │ │ movs r0, r0 │ │ - b.n d2dde │ │ + b.n d2dee │ │ lsls r4, r1, #1 │ │ subs r2, #0 │ │ movs r7, r0 │ │ - b.n d287e │ │ + b.n d288e │ │ asrs r1, r1, #32 │ │ - b.n d288a │ │ + b.n d289a │ │ movs r1, r0 │ │ - b.n d2b5a │ │ + b.n d2b6a │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ lsls r0, r2, #1 │ │ - b.n d2d5c │ │ + b.n d2d6c │ │ asrs r0, r0, #1 │ │ - b.n d2cdc │ │ + b.n d2cec │ │ lsls r5, r3, #19 │ │ add.w r0, r0, r4, lsr #32 │ │ - b.n d2388 │ │ + b.n d2398 │ │ asrs r0, r2, #32 │ │ - b.n d238c │ │ + b.n d239c │ │ strh r0, [r4, #0] │ │ - b.n d2390 │ │ + b.n d23a0 │ │ movs r0, r0 │ │ - b.n d28a6 │ │ + b.n d28b6 │ │ asrs r1, r0, #32 │ │ - b.n d28b2 │ │ + b.n d28c2 │ │ movs r1, r0 │ │ - b.n d2b82 │ │ + b.n d2b92 │ │ movs r2, r0 │ │ subs r0, r0, r0 │ │ lsls r0, r2, #1 │ │ - b.n d2d00 │ │ + b.n d2d10 │ │ asrs r4, r6, #32 │ │ - b.n d2d04 │ │ + b.n d2d14 │ │ lsls r3, r2, #19 │ │ add.w r0, r0, r8, asr #32 │ │ - b.n d22ac │ │ + b.n d22bc │ │ asrs r4, r4, #32 │ │ - b.n d22b0 │ │ + b.n d22c0 │ │ movs r0, r0 │ │ - b.n d28ca │ │ + b.n d28da │ │ asrs r1, r0, #32 │ │ - b.n d28d6 │ │ + b.n d28e6 │ │ movs r1, r0 │ │ - b.n d2ba6 │ │ + b.n d2bb6 │ │ vpmin.u32 , , │ │ movs r0, #1 │ │ - b.n d2d3a │ │ + b.n d2d4a │ │ str r0, [r0, #0] │ │ - b.n d2e26 │ │ + b.n d2e36 │ │ movs r0, r5 │ │ - b.n d23d0 │ │ + b.n d23e0 │ │ movs r0, r0 │ │ - b.n d293e │ │ + b.n d294e │ │ movs r4, r4 │ │ - b.n d23d8 │ │ + b.n d23e8 │ │ movs r0, r0 │ │ - b.n d2a4e │ │ + b.n d2a5e │ │ movs r4, r0 │ │ cmp r2, #0 │ │ movs r4, r7 │ │ - b.n d23e4 │ │ + b.n d23f4 │ │ asrs r0, r3, #32 │ │ - b.n d23e8 │ │ + b.n d23f8 │ │ movs r0, r5 │ │ - b.n d23d2 │ │ + b.n d23e2 │ │ movs r0, r0 │ │ - b.n d2b58 │ │ + b.n d2b68 │ │ movs r1, r4 │ │ add r2, sp, #0 │ │ movs r4, r3 │ │ - b.n d23f8 │ │ + b.n d2408 │ │ asrs r0, r1, #1 │ │ - b.n d2ddc │ │ + b.n d2dec │ │ strb r2, [r0, #0] │ │ - b.n d2c06 │ │ + b.n d2c16 │ │ movs r0, #0 │ │ - b.n d300a │ │ + b.n d301a │ │ adds r0, #12 │ │ - b.n d300e │ │ + b.n d301e │ │ @ instruction: 0xb7be │ │ @ instruction: 0xebff8000 │ │ - b.n d2c16 │ │ + b.n d2c26 │ │ lsls r2, r6, #30 │ │ - b.n d2eea │ │ + b.n d2efa │ │ lsrs r7, r7, #31 │ │ - b.n d2f7c │ │ + b.n d2f8c │ │ movs r0, r0 │ │ - b.n d2b92 │ │ + b.n d2ba2 │ │ str r4, [r6, #0] │ │ - b.n d2400 │ │ + b.n d2410 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n d302e │ │ + b.n d303e │ │ strh r7, [r0, #0] │ │ - b.n d2c32 │ │ + b.n d2c42 │ │ movs r4, r4 │ │ - b.n d230c │ │ + b.n d231c │ │ movs r0, r5 │ │ - b.n d2310 │ │ + b.n d2320 │ │ vpmin.u16 q15, q9, │ │ movs r0, r0 │ │ - b.n d2fb2 │ │ + b.n d2fc2 │ │ movs r7, r2 │ │ subs r0, r0, r0 │ │ lsls r4, r1, #1 │ │ - b.n d2444 │ │ + b.n d2454 │ │ movs r0, r1 │ │ - b.n d2fae │ │ + b.n d2fbe │ │ movs r2, r4 │ │ subs r0, r0, r0 │ │ lsls r0, r1, #1 │ │ - b.n d2450 │ │ + b.n d2460 │ │ movs r0, #6 │ │ - b.n d2c5a │ │ + b.n d2c6a │ │ strh r7, [r0, #0] │ │ - b.n d2c5e │ │ + b.n d2c6e │ │ lsls r0, r2, #3 │ │ - b.n d2ca2 │ │ + b.n d2cb2 │ │ str r1, [r0, #0] │ │ - b.n d2e46 │ │ + b.n d2e56 │ │ str r0, [r5, #0] │ │ - b.n d2340 │ │ - add r0, pc, #0 @ (adr r0, d292c ) │ │ - b.n d2e70 │ │ - movs r7, r0 │ │ - b.n d29de │ │ - movs r2, r0 │ │ - b.n d2aea │ │ - add r0, pc, #144 @ (adr r0, d29c8 ) │ │ - b.n d2350 │ │ + b.n d2350 │ │ + add r0, pc, #0 @ (adr r0, d293c ) │ │ + b.n d2e80 │ │ + movs r7, r0 │ │ + b.n d29ee │ │ + movs r2, r0 │ │ + b.n d2afa │ │ + add r0, pc, #144 @ (adr r0, d29d8 ) │ │ + b.n d2360 │ │ vpmin.u8 , q9, │ │ @ instruction: 0xffd1eaff │ │ movs r4, r1 │ │ - b.n d2480 │ │ + b.n d2490 │ │ strh r0, [r0, #0] │ │ - b.n d246a │ │ + b.n d247a │ │ movs r4, r0 │ │ - b.n d246e │ │ + b.n d247e │ │ movs r4, r6 │ │ - b.n d246c │ │ + b.n d247c │ │ movs r0, r0 │ │ - b.n d3096 │ │ + b.n d30a6 │ │ movs r4, r4 │ │ - b.n d2370 │ │ + b.n d2380 │ │ movs r0, r5 │ │ - b.n d2374 │ │ + b.n d2384 │ │ vpmin.u q7, , │ │ strh r0, [r0, #0] │ │ - b.n d30a6 │ │ + b.n d30b6 │ │ movs r0, r1 │ │ - b.n d2caa │ │ - beq.n d29a4 │ │ - b.n d2e04 │ │ + b.n d2cba │ │ + beq.n d29b4 │ │ + b.n d2e14 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r5, r6, r7, ip} │ │ - b.n d24b4 │ │ + b.n d24c4 │ │ lsls r4, r6, #30 │ │ - b.n d2f8a │ │ + b.n d2f9a │ │ lsrs r7, r7, #31 │ │ - b.n d301c │ │ + b.n d302c │ │ asrs r1, r0, #32 │ │ - b.n d2aa0 │ │ + b.n d2ab0 │ │ asrs r2, r3, #1 │ │ - b.n d2528 │ │ + b.n d2538 │ │ movs r0, r0 │ │ - b.n d302c │ │ + b.n d303c │ │ movs r2, r3 │ │ subs r0, r0, r0 │ │ strh r1, [r2, #0] │ │ - b.n d2e92 │ │ + b.n d2ea2 │ │ movs r0, r1 │ │ - b.n d2cd6 │ │ - beq.n d29d0 │ │ - b.n d2e30 │ │ + b.n d2ce6 │ │ + beq.n d29e0 │ │ + b.n d2e40 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r5, r7} │ │ - b.n d24e0 │ │ + b.n d24f0 │ │ strh r4, [r6, #60] @ 0x3c │ │ - b.n d2fb6 │ │ + b.n d2fc6 │ │ ldrh r7, [r7, #62] @ 0x3e │ │ - b.n d3048 │ │ + b.n d3058 │ │ movs r0, r0 │ │ - b.n d2acc │ │ + b.n d2adc │ │ lsls r2, r3, #1 │ │ - b.n d2552 │ │ + b.n d2562 │ │ movs r0, r0 │ │ - b.n d3056 │ │ + b.n d3066 │ │ @ instruction: 0xffea0aff │ │ asrs r0, r2, #2 │ │ - b.n d24fc │ │ + b.n d250c │ │ adds r0, #144 @ 0x90 │ │ - b.n d2500 │ │ + b.n d2510 │ │ lsls r0, r2, #2 │ │ - b.n d2504 │ │ + b.n d2514 │ │ asrs r1, r0, #32 │ │ - b.n d2ae8 │ │ + b.n d2af8 │ │ movs r0, #140 @ 0x8c │ │ - b.n d250c │ │ + b.n d251c │ │ adds r0, #3 │ │ - b.n d2af0 │ │ + b.n d2b00 │ │ movs r0, r0 │ │ - b.n d2af4 │ │ + b.n d2b04 │ │ movs r0, #2 │ │ - b.n d2af8 │ │ + b.n d2b08 │ │ lsls r1, r0, #4 │ │ stmia.w sp, {r0} │ │ - b.n d3122 │ │ + b.n d3132 │ │ movs r0, #8 │ │ - b.n d2500 │ │ + b.n d2510 │ │ movs r0, #28 │ │ - b.n d312a │ │ - movs r2, #14 │ │ + b.n d313a │ │ + movs r2, #13 │ │ @ instruction: 0xebff0008 │ │ - b.n d2d32 │ │ - beq.n d2a2c │ │ - b.n d2e8c │ │ + b.n d2d42 │ │ + beq.n d2a3c │ │ + b.n d2e9c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r5, r6, ip} │ │ - b.n d253c │ │ + b.n d254c │ │ strh r1, [r2, #0] │ │ - b.n d2f02 │ │ + b.n d2f12 │ │ adds r0, #96 @ 0x60 │ │ - b.n d2544 │ │ + b.n d2554 │ │ movs r1, r0 │ │ - b.n d314a │ │ + b.n d315a │ │ movs r0, #92 @ 0x5c │ │ - b.n d254c │ │ + b.n d255c │ │ asrs r1, r0, #32 │ │ - b.n d2b30 │ │ + b.n d2b40 │ │ strb r0, [r3, #1] │ │ - b.n d2554 │ │ + b.n d2564 │ │ adds r0, #3 │ │ - b.n d2b38 │ │ + b.n d2b48 │ │ movs r0, #2 │ │ - b.n d2b3c │ │ + b.n d2b4c │ │ lsls r4, r0, #4 │ │ stmia.w sp, {r1, r4, r9, sp} │ │ - b.n d3026 │ │ + b.n d3036 │ │ strb r7, [r0, #0] │ │ - b.n d2b48 │ │ + b.n d2b58 │ │ strb r0, [r1, #0] │ │ - b.n d2548 │ │ - movs r1, #253 @ 0xfd │ │ + b.n d2558 │ │ + movs r1, #252 @ 0xfc │ │ @ instruction: 0xebff0008 │ │ - b.n d2d76 │ │ - beq.n d2a70 │ │ - b.n d2ed0 │ │ + b.n d2d86 │ │ + beq.n d2a80 │ │ + b.n d2ee0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {pc} │ │ - b.n d2d82 │ │ + b.n d2d92 │ │ movs r0, r1 │ │ - b.n d2d86 │ │ - beq.n d2a80 │ │ - b.n d2ee0 │ │ - ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r5, r7, r9, sl, fp, ip, sp, pc} │ │ - movs r0, r0 │ │ - stmia r3!, {r0, r2, r3, r4, r5, r6} │ │ - vsra.u64 q14, , #13 │ │ - vabdl.u q13, d19, d5 │ │ - vsubw.u , , d3 │ │ - vqrdmlah.s , , d12[0] │ │ - movs r0, r0 │ │ - stmia r6!, {r2, r4, r5, r7} │ │ - vsra.u64 d28, d7, #13 │ │ - vcvt.u32.f32 q12, q9, #13 │ │ - vtbx.8 d26, {d3-d4}, d12 │ │ + b.n d2d96 │ │ + beq.n d2a90 │ │ + b.n d2ef0 │ │ + ldrh r0, [r6, #62] @ 0x3e │ │ + ldmia.w sp!, {r4, r5, r7, r9, sl, fp, ip, sp, pc} │ │ + movs r0, r0 │ │ + stmia r4!, {r0, r1, r2, r3, r4, r5, r6, r7} │ │ + @ instruction: 0xfff3c361 │ │ + @ instruction: 0xfff3a8b5 │ │ + @ instruction: 0xfff3b3e7 │ │ + @ instruction: 0xfff3bedc │ │ + movs r0, r0 │ │ + ldmia r0, {r0, r1, r4, r5} │ │ + vrsra.u32 d28, d9, #13 │ │ + vcvt.u32.f32 q12, q1, #13 │ │ + @ instruction: 0xfff3aa7c │ │ @ instruction: 0xfff348f0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n d2f98 │ │ + b.n d2fa8 │ │ str r0, [r0, r0] │ │ - b.n d2dc2 │ │ + b.n d2dd2 │ │ movs r0, r2 │ │ - b.n d25a6 │ │ + b.n d25b6 │ │ ands r1, r0 │ │ - b.n d2dca │ │ + b.n d2dda │ │ movs r0, r0 │ │ - b.n d312e │ │ + b.n d313e │ │ movs r7, r1 │ │ lsrs r0, r0, #8 │ │ asrs r7, r0, #32 │ │ - b.n d3256 │ │ + b.n d3266 │ │ str r0, [r0, #24] │ │ - b.n d2b9c │ │ + b.n d2bac │ │ strb r1, [r0, #0] │ │ - b.n d2f1e │ │ + b.n d2f2e │ │ movs r0, r3 │ │ - b.n d25cc │ │ + b.n d25dc │ │ movs r0, #6 │ │ - b.n d2a06 │ │ + b.n d2a16 │ │ adds r0, #4 │ │ - b.n d25ca │ │ + b.n d25da │ │ movs r4, r0 │ │ - b.n d2dee │ │ + b.n d2dfe │ │ add r4, sp, #124 @ 0x7c │ │ @ instruction: 0xebff0000 │ │ - b.n d3164 │ │ + b.n d3174 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ str r0, [r1, #0] │ │ - b.n d2f4a │ │ + b.n d2f5a │ │ strb r1, [r0, #0] │ │ - b.n d2f50 │ │ + b.n d2f60 │ │ movs r0, r0 │ │ - b.n d3166 │ │ + b.n d3176 │ │ @ instruction: 0xfff40aff │ │ movs r0, r0 │ │ - b.n d316e │ │ + b.n d317e │ │ movs r5, r1 │ │ subs r0, r0, r0 │ │ str r0, [r2, #12] │ │ - b.n d2e60 │ │ + b.n d2e70 │ │ str r0, [r1, r0] │ │ - b.n d2fe4 │ │ + b.n d2ff4 │ │ lsls r0, r2, #3 │ │ - b.n d2e68 │ │ + b.n d2e78 │ │ movs r0, r0 │ │ - b.n d2b8e │ │ + b.n d2b9e │ │ movs r1, r0 │ │ - b.n d2c94 │ │ + b.n d2ca4 │ │ movs r0, r1 │ │ cmp r2, #0 │ │ movs r4, r0 │ │ - b.n d2e2e │ │ + b.n d2e3e │ │ movs r0, #6 │ │ - b.n d2e32 │ │ + b.n d2e42 │ │ adds r0, #7 │ │ - b.n d2e36 │ │ + b.n d2e46 │ │ add r4, sp, #52 @ 0x34 │ │ @ instruction: 0xebff6001 │ │ - b.n d302a │ │ + b.n d303a │ │ strb r0, [r0, #0] │ │ - b.n d3050 │ │ + b.n d3060 │ │ movs r0, r0 │ │ - b.n d31a6 │ │ + b.n d31b6 │ │ @ instruction: 0xfff30aff │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {} │ │ - b.n d3252 │ │ + b.n d3262 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n d3038 │ │ - beq.n d2ae8 │ │ - b.n d2fbc │ │ + b.n d3048 │ │ + beq.n d2af8 │ │ + b.n d2fcc │ │ str r0, [r0, r0] │ │ - b.n d2e66 │ │ - add r0, pc, #0 @ (adr r0, d2b28 ) │ │ - b.n d2e6a │ │ + b.n d2e76 │ │ + add r0, pc, #0 @ (adr r0, d2b38 ) │ │ + b.n d2e7a │ │ lsls r0, r5, #4 │ │ - b.n d2698 │ │ + b.n d26a8 │ │ strh r1, [r0, #0] │ │ - b.n d2e72 │ │ + b.n d2e82 │ │ str r0, [r4, r0] │ │ - b.n d2650 │ │ + b.n d2660 │ │ strb r5, [r0, #0] │ │ - b.n d2e7a │ │ + b.n d2e8a │ │ str r4, [r1, #0] │ │ - b.n d2668 │ │ + b.n d2678 │ │ asrs r0, r1, #32 │ │ - b.n d26b0 │ │ + b.n d26c0 │ │ strb r4, [r3, #0] │ │ - b.n d2660 │ │ + b.n d2670 │ │ strb r4, [r0, #0] │ │ - b.n d2674 │ │ + b.n d2684 │ │ movs r0, r0 │ │ - b.n d2bf0 │ │ + b.n d2c00 │ │ movs r7, r0 │ │ - b.n d2cfe │ │ + b.n d2d0e │ │ movs r2, r2 │ │ cmp r2, #0 │ │ lsls r0, r1, #2 │ │ - b.n d2684 │ │ + b.n d2694 │ │ asrs r0, r2, #2 │ │ - b.n d2688 │ │ + b.n d2698 │ │ movs r0, #140 @ 0x8c │ │ - b.n d268c │ │ + b.n d269c │ │ adds r0, #148 @ 0x94 │ │ - b.n d2690 │ │ + b.n d26a0 │ │ strb r0, [r0, #0] │ │ - b.n d2c0c │ │ + b.n d2c1c │ │ movs r0, #2 │ │ - b.n d2d14 │ │ + b.n d2d24 │ │ lsls r3, r7, #1 │ │ subs r2, #0 │ │ movs r1, #192 @ 0xc0 │ │ - b.n d26aa │ │ + b.n d26ba │ │ movs r0, r0 │ │ - b.n d2bfc │ │ + b.n d2c0c │ │ movs r0, #0 │ │ - b.n d2ca2 │ │ + b.n d2cb2 │ │ lsls r7, r6, #1 │ │ lsrs r0, r0, #8 │ │ lsrs r0, r5, #10 │ │ - b.n d26c4 │ │ + b.n d26d4 │ │ movs r0, r0 │ │ - b.n d2ca8 │ │ + b.n d2cb8 │ │ asrs r2, r3, #1 │ │ - b.n d272e │ │ + b.n d273e │ │ movs r0, r0 │ │ - b.n d3352 │ │ + b.n d3362 │ │ movs r3, r0 │ │ - b.n d3238 │ │ + b.n d3248 │ │ lsls r2, r1, #10 │ │ cmp r2, #0 │ │ - beq.n d2bd4 │ │ - b.n d3034 │ │ + beq.n d2be4 │ │ + b.n d3044 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r6} │ │ movt pc, #149 @ 0x95 │ │ - b.n d30ba │ │ + b.n d30ca │ │ lsrs r5, r1, #10 │ │ orr.w sl, r0, #4620288 @ 0x468000 │ │ orr.w sl, r0, #4620288 @ 0x468000 │ │ orr.w sl, r0, #4620288 @ 0x468000 │ │ orr.w sl, r0, #4620288 @ 0x468000 │ │ orr.w sl, r0, #4620288 @ 0x468000 │ │ orr.w sl, r0, #4620288 @ 0x468000 │ │ orr.w sl, r0, #4685824 @ 0x478000 │ │ orr.w r0, r0, #1280 @ 0x500 │ │ - b.n d2702 │ │ - b.n d2bd0 │ │ - b.n d26fe │ │ + b.n d2712 │ │ + b.n d2be0 │ │ + b.n d270e │ │ movs r2, r0 │ │ - b.n d3292 │ │ + b.n d32a2 │ │ movs r3, r0 │ │ cmp r2, #0 │ │ strb r0, [r0, #0] │ │ - b.n d331e │ │ + b.n d332e │ │ asrs r1, r0, #32 │ │ - b.n d3322 │ │ + b.n d3332 │ │ movs r1, r0 │ │ - b.n d3326 │ │ + b.n d3336 │ │ movs r6, r3 │ │ @ instruction: 0xea00cf96 │ │ - b.n d30fe │ │ + b.n d310e │ │ movs r1, r0 │ │ - b.n d3332 │ │ + b.n d3342 │ │ str r0, [r0, r0] │ │ - b.n d3336 │ │ + b.n d3346 │ │ strb r0, [r0, #0] │ │ - b.n d333a │ │ + b.n d334a │ │ movs r4, r1 │ │ and.w r1, r0, r7, lsl #24 │ │ - b.n d2b3a │ │ + b.n d2b4a │ │ movs r1, r0 │ │ - b.n d2ea6 │ │ + b.n d2eb6 │ │ movs r1, r0 │ │ str r1, [sp, #640] @ 0x280 │ │ str r1, [r0, #0] │ │ - b.n d311a │ │ + b.n d312a │ │ str r7, [r0, #16] │ │ - b.n d2b2a │ │ + b.n d2b3a │ │ strb r0, [r0, #0] │ │ - b.n d3356 │ │ + b.n d3366 │ │ str r0, [r4, #8] │ │ - b.n d274e │ │ - b.n d2c1c │ │ - b.n d274a │ │ + b.n d275e │ │ + b.n d2c2c │ │ + b.n d275a │ │ asrs r1, r0, #32 │ │ - b.n d312c │ │ + b.n d313c │ │ ands r3, r0 │ │ - b.n d3130 │ │ + b.n d3140 │ │ movs r6, r1 │ │ - b.n d2ed2 │ │ + b.n d2ee2 │ │ str r1, [r0, r0] │ │ - b.n d2f6e │ │ + b.n d2f7e │ │ movs r2, r1 │ │ ldrh r0, [r0, #16] │ │ asrs r1, r0, #32 │ │ - b.n d3144 │ │ + b.n d3154 │ │ movs r7, r3 │ │ - b.n d32dc │ │ + b.n d32ec │ │ @ instruction: 0xffef0aff │ │ asrs r5, r0 │ │ - b.n d2d4e │ │ + b.n d2d5e │ │ str r0, [sp, #32] │ │ - b.n d276e │ │ + b.n d277e │ │ ands r4, r0 │ │ - b.n d2772 │ │ + b.n d2782 │ │ ands r1, r1 │ │ - b.n d2cd6 │ │ + b.n d2ce6 │ │ movs r1, r0 │ │ - b.n d32fa │ │ + b.n d330a │ │ @ instruction: 0xffe91aff │ │ strb r1, [r0, #0] │ │ - b.n d2f9a │ │ + b.n d2faa │ │ @ instruction: 0xffefeaff │ │ asrs r7, r0, #4 │ │ - b.n d2b9a │ │ + b.n d2baa │ │ asrs r1, r0, #32 │ │ - b.n d3168 │ │ + b.n d3178 │ │ str r7, [r0, #16] │ │ - b.n d2d7a │ │ + b.n d2d8a │ │ movs r7, r0 │ │ - b.n d2f0e │ │ + b.n d2f1e │ │ movs r1, r0 │ │ str r2, [sp, #540] @ 0x21c │ │ asrs r0, r3, #9 │ │ - b.n d2782 │ │ + b.n d2792 │ │ ldr r3, [r5, #40] @ 0x28 │ │ - b.n d328e │ │ + b.n d329e │ │ lsls r4, r2, #9 │ │ - b.n d278e │ │ + b.n d279e │ │ ldr r2, [r5, #40] @ 0x28 │ │ - b.n d3316 │ │ + b.n d3326 │ │ movs r0, r0 │ │ - b.n d27b6 │ │ + b.n d27c6 │ │ movs r1, r0 │ │ - b.n d332a │ │ + b.n d333a │ │ strb r0, [r2, #26] │ │ - b.n d2d90 │ │ + b.n d2da0 │ │ asrs r1, r4, #2 │ │ asrs r0, r4, #6 │ │ asrs r1, r0, #2 │ │ asrs r1, r0, #2 │ │ movs r1, r0 │ │ asrs r0, r2, #1 │ │ movs r2, r1 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #1 │ │ - b.n d27d6 │ │ + b.n d27e6 │ │ strb r2, [r0, #0] │ │ - b.n d2fe6 │ │ + b.n d2ff6 │ │ movs r0, #64 @ 0x40 │ │ - b.n d27de │ │ + b.n d27ee │ │ asrs r2, r6, #2 │ │ - b.n d3050 │ │ + b.n d3060 │ │ lsls r4, r2, #2 │ │ - b.n d27d6 │ │ + b.n d27e6 │ │ asrs r1, r0, #32 │ │ - b.n d2dbc │ │ + b.n d2dcc │ │ asrs r2, r0, #32 │ │ - b.n d31bc │ │ + b.n d31cc │ │ movs r0, r0 │ │ - b.n d2f60 │ │ + b.n d2f70 │ │ movs r0, r1 │ │ movs r5, #146 @ 0x92 │ │ lsls r0, r4, #6 │ │ movs r0, #131 @ 0x83 │ │ movs r1, r0 │ │ and.w r0, r0, r2, lsl #28 │ │ - b.n d300e │ │ + b.n d301e │ │ movs r3, r0 │ │ - b.n d3012 │ │ + b.n d3022 │ │ str r0, [sp, #384] @ 0x180 │ │ - b.n d31f0 │ │ + b.n d3200 │ │ ands r0, r0 │ │ - b.n d301a │ │ + b.n d302a │ │ movs r0, r5 │ │ - b.n d27ee │ │ + b.n d27fe │ │ movs r2, r1 │ │ - b.n d3022 │ │ + b.n d3032 │ │ asrs r0, r1, #32 │ │ - b.n d3026 │ │ + b.n d3036 │ │ movs r0, #9 │ │ - b.n d302a │ │ + b.n d303a │ │ lsls r0, r4, #18 │ │ add.w r0, r0, r0 │ │ - b.n d3392 │ │ + b.n d33a2 │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ str r0, [r4, r0] │ │ - b.n d2834 │ │ + b.n d2844 │ │ movs r1, r0 │ │ - b.n d33de │ │ + b.n d33ee │ │ lsls r0, r2, #7 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n d33a6 │ │ + b.n d33b6 │ │ lsls r3, r0, #8 │ │ subs r0, r0, r0 │ │ movs r4, r2 │ │ and.w r0, r0, r0, asr #20 │ │ - b.n d284c │ │ + b.n d285c │ │ movs r7, r0 │ │ - b.n d2fbe │ │ + b.n d2fce │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ asrs r0, r0, #32 │ │ - b.n d284e │ │ + b.n d285e │ │ movs r4, r0 │ │ - b.n d3062 │ │ + b.n d3072 │ │ movs r1, r0 │ │ - b.n d33c8 │ │ + b.n d33d8 │ │ adds r6, #145 @ 0x91 │ │ - b.n d2e2e │ │ + b.n d2e3e │ │ movs r0, #162 @ 0xa2 │ │ asrs r0, r4, #6 │ │ movs r0, #130 @ 0x82 │ │ asrs r2, r0, #2 │ │ asrs r2, r0, #32 │ │ asrs r1, r2, #1 │ │ lsls r7, r6, #6 │ │ subs r0, r0, r0 │ │ movs r4, #208 @ 0xd0 │ │ - b.n d30d2 │ │ + b.n d30e2 │ │ adds r0, #178 @ 0xb2 │ │ - b.n d30e8 │ │ + b.n d30f8 │ │ adds r0, #3 │ │ - b.n d2e54 │ │ + b.n d2e64 │ │ asrs r4, r2, #2 │ │ - b.n d286e │ │ + b.n d287e │ │ adds r0, #2 │ │ - b.n d3254 │ │ + b.n d3264 │ │ movs r1, r0 │ │ - b.n d2ff8 │ │ + b.n d3008 │ │ asrs r0, r1, #32 │ │ movs r5, #146 @ 0x92 │ │ asrs r1, r4, #6 │ │ movs r0, #135 @ 0x87 │ │ movs r1, r0 │ │ - b.n d2ffe │ │ + b.n d300e │ │ lsls r0, r6, #6 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n d289a │ │ + b.n d28aa │ │ asrs r0, r5, #32 │ │ - b.n d289a │ │ - add r0, pc, #144 @ (adr r0, d2dfc ) │ │ - b.n d2888 │ │ + b.n d28aa │ │ + add r0, pc, #144 @ (adr r0, d2e0c ) │ │ + b.n d2898 │ │ lsls r4, r2, #2 │ │ - b.n d2892 │ │ + b.n d28a2 │ │ strh r0, [r7, #0] │ │ - b.n d2890 │ │ + b.n d28a0 │ │ movs r0, r0 │ │ - b.n d301c │ │ + b.n d302c │ │ lsls r2, r7, #2 │ │ - bge.n d2d7e │ │ + bge.n d2d8e │ │ lsls r0, r7 │ │ - b.n d3292 │ │ + b.n d32a2 │ │ lsls r0, r4, #1 │ │ - b.n d32a0 │ │ + b.n d32b0 │ │ movs r0, #0 │ │ - b.n d34ca │ │ + b.n d34da │ │ adds r0, #3 │ │ - b.n d34ce │ │ + b.n d34de │ │ asrs r4, r0, #32 │ │ - b.n d30d2 │ │ + b.n d30e2 │ │ ldr r7, [sp, #4] │ │ @ instruction: 0xebff0064 │ │ - b.n d28d4 │ │ + b.n d28e4 │ │ asrs r2, r6, #30 │ │ - b.n d33ae │ │ + b.n d33be │ │ subs r7, r7, #7 │ │ - b.n d3440 │ │ + b.n d3450 │ │ movs r1, r0 │ │ - b.n d3046 │ │ + b.n d3056 │ │ lsls r3, r5, #2 │ │ subs r0, r0, r0 │ │ asrs r0, r0, #1 │ │ - b.n d28e2 │ │ + b.n d28f2 │ │ stmia r0!, {r3, r5} │ │ - b.n d28e2 │ │ + b.n d28f2 │ │ eors r4, r0 │ │ - b.n d28d0 │ │ + b.n d28e0 │ │ movs r0, #148 @ 0x94 │ │ - b.n d28dc │ │ + b.n d28ec │ │ movs r4, r1 │ │ - b.n d3062 │ │ + b.n d3072 │ │ lsls r6, r2, #2 │ │ cmp r2, #0 │ │ str r4, [r3, r1] │ │ - b.n d2968 │ │ + b.n d2978 │ │ asrs r7, r2, #32 │ │ - b.n d350a │ │ + b.n d351a │ │ movs r1, #12 │ │ - b.n d2ed0 │ │ + b.n d2ee0 │ │ strb r1, [r0, #0] │ │ - b.n d32ea │ │ + b.n d32fa │ │ adds r5, #50 @ 0x32 │ │ - b.n d2e6e │ │ + b.n d2e7e │ │ adds r0, #2 │ │ - b.n d3260 │ │ + b.n d3270 │ │ movs r7, r0 │ │ - b.n d3084 │ │ + b.n d3094 │ │ lsls r3, r2, #2 │ │ cmp r2, #0 │ │ lsls r0, r4, #2 │ │ - b.n d291a │ │ + b.n d292a │ │ movs r0, #0 │ │ - b.n d352a │ │ - b.n d2dee │ │ - b.n d352e │ │ + b.n d353a │ │ + b.n d2dfe │ │ + b.n d353e │ │ lsls r0, r1, #1 │ │ - b.n d290c │ │ + b.n d291c │ │ stmia r0!, {r4, r5} │ │ - b.n d2910 │ │ + b.n d2920 │ │ str r0, [r0, #0] │ │ - b.n d291a │ │ + b.n d292a │ │ str r4, [r1, #4] │ │ - b.n d2918 │ │ + b.n d2928 │ │ str r4, [r6, r0] │ │ - b.n d291c │ │ + b.n d292c │ │ asrs r6, r0 │ │ - b.n d2f06 │ │ + b.n d2f16 │ │ movs r1, #6 │ │ - b.n d2e8e │ │ + b.n d2e9e │ │ movs r4, r1 │ │ - b.n d3296 │ │ + b.n d32a6 │ │ movs r0, #44 @ 0x2c │ │ - b.n d292c │ │ + b.n d293c │ │ movs r0, r5 │ │ - b.n d2930 │ │ + b.n d2940 │ │ ands r4, r7 │ │ - b.n d2934 │ │ + b.n d2944 │ │ movs r3, r0 │ │ and.w r0, r0, r1, lsl #12 │ │ - b.n d3336 │ │ + b.n d3346 │ │ strh r0, [r7, #0] │ │ - b.n d2960 │ │ + b.n d2970 │ │ movs r7, r0 │ │ - b.n d30d0 │ │ + b.n d30e0 │ │ lsls r1, r0, #2 │ │ cmp r2, #0 │ │ movs r0, #3 │ │ - b.n d2f40 │ │ - add r0, pc, #648 @ (adr r0, d30bc ) │ │ - b.n d3176 │ │ + b.n d2f50 │ │ + add r0, pc, #648 @ (adr r0, d30cc ) │ │ + b.n d3186 │ │ movs r1, #10 │ │ - b.n d2f3c │ │ + b.n d2f4c │ │ strh r2, [r6, #40] @ 0x28 │ │ - b.n d2f5a │ │ + b.n d2f6a │ │ str r5, [sp, #200] @ 0xc8 │ │ - b.n d3182 │ │ + b.n d3192 │ │ movs r2, r0 │ │ - b.n d34f6 │ │ + b.n d3506 │ │ lsls r3, r0, #1 │ │ subs r2, #0 │ │ movs r1, #9 │ │ - b.n d2c76 │ │ + b.n d2c86 │ │ str r0, [r0, #0] │ │ - b.n d297a │ │ + b.n d298a │ │ movs r0, #6 │ │ - b.n d2eda │ │ + b.n d2eea │ │ movs r1, r1 │ │ - b.n d30fe │ │ + b.n d310e │ │ lsls r1, r0, #1 │ │ lsrs r0, r0, #8 │ │ lsls r0, r1, #1 │ │ - b.n d299c │ │ + b.n d29ac │ │ str r0, [r0, r0] │ │ - b.n d3338 │ │ + b.n d3348 │ │ movs r0, #3 │ │ - b.n d337c │ │ + b.n d338c │ │ str r4, [r0, #0] │ │ - b.n d31ae │ │ + b.n d31be │ │ asrs r1, r1, #4 │ │ - b.n d2f72 │ │ + b.n d2f82 │ │ lsls r4, r1, #1 │ │ - b.n d29b0 │ │ + b.n d29c0 │ │ ldrh r0, [r2, r6] │ │ cdp 0, 10, cr5, cr0, cr0, {2} │ │ - b.n d2998 │ │ + b.n d29a8 │ │ movs r0, r0 │ │ - b.n d3126 │ │ + b.n d3136 │ │ movs r4, r3 │ │ cmp r2, #0 │ │ stmia r0!, {r3, r5} │ │ - b.n d29c4 │ │ + b.n d29d4 │ │ movs r0, r0 │ │ - b.n d35ce │ │ + b.n d35de │ │ str r4, [r5, #0] │ │ - b.n d29cc │ │ + b.n d29dc │ │ str r1, [r1, r4] │ │ - b.n d2f16 │ │ + b.n d2f26 │ │ movs r0, #12 │ │ - b.n d339c │ │ + b.n d33ac │ │ ands r4, r1 │ │ - b.n d31de │ │ + b.n d31ee │ │ cmp r2, #133 @ 0x85 │ │ orn sl, r4, #18304 @ 0x4780 │ │ orn r8, r4, #466944 @ 0x72000 │ │ @ instruction: 0xf36228f0 │ │ @ instruction: 0xf3622222 │ │ @ instruction: 0xf3f62123 │ │ - blx 4c55d4 │ │ + blx 4c55e4 │ │ cdp 0, 1, cr0, cr2, cr0, {0} │ │ - b.n d357a │ │ + b.n d358a │ │ movs r4, r5 │ │ subs r0, r0, r0 │ │ ands r0, r2 │ │ - b.n d335e │ │ + b.n d336e │ │ movs r4, r0 │ │ - b.n d3362 │ │ + b.n d3372 │ │ str r0, [r2, #0] │ │ - b.n d33da │ │ + b.n d33ea │ │ movs r2, r0 │ │ - b.n d3172 │ │ + b.n d3182 │ │ stmia r0!, {r2} │ │ - b.n d3216 │ │ + b.n d3226 │ │ @ instruction: 0xffef8aff │ │ stmia r0!, {r4, r5} │ │ - b.n d2a18 │ │ + b.n d2a28 │ │ movs r0, #1 │ │ - b.n d3222 │ │ + b.n d3232 │ │ lsls r1, r1, #4 │ │ - b.n d31d2 │ │ + b.n d31e2 │ │ asrs r7, r2, #32 │ │ - b.n d362a │ │ + b.n d363a │ │ movs r5, r5 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, r1] │ │ - b.n d2a2c │ │ + b.n d2a3c │ │ str r4, [r1, #0] │ │ - b.n d33fe │ │ + b.n d340e │ │ asrs r2, r0, #32 │ │ - b.n d323a │ │ + b.n d324a │ │ lsls r5, r0, #4 │ │ - b.n d300a │ │ + b.n d301a │ │ lsrs r7, r7, #27 │ │ - b.n d3522 │ │ + b.n d3532 │ │ movs r4, r6 │ │ lsrs r0, r0, #8 │ │ lsls r5, r0, #4 │ │ - b.n d324a │ │ + b.n d325a │ │ movs r0, #12 │ │ - b.n d339a │ │ + b.n d33aa │ │ cmp r2, #128 @ 0x80 │ │ orn sl, r2, #18304 @ 0x4780 │ │ orn r0, r2, #548864 @ 0x86000 │ │ - b.n d2f9c │ │ + b.n d2fac │ │ asrs r0, r4, #32 │ │ - b.n d365e │ │ + b.n d366e │ │ cmp r0, #228 @ 0xe4 │ │ bfi r0, r2, #10, #4294967289 │ │ - b.n d3028 │ │ + b.n d3038 │ │ asrs r0, r0, #32 │ │ - b.n d36ea │ │ + b.n d36fa │ │ lsrs r0, r6, #3 │ │ @ instruction: 0xf3620220 │ │ @ instruction: 0xf3f60121 │ │ @ instruction: 0xf3f20b90 │ │ mrc 2, 0, lr, cr0, cr1, {0} │ │ - b.n d2f5e │ │ + b.n d2f6e │ │ movs r7, r1 │ │ subs r0, r0, r0 │ │ movs r0, #0 │ │ - b.n d3686 │ │ + b.n d3696 │ │ ands r4, r7 │ │ - b.n d2a84 │ │ - b.n d2f4e │ │ - b.n d368e │ │ + b.n d2a94 │ │ + b.n d2f5e │ │ + b.n d369e │ │ str r4, [r6, r0] │ │ - b.n d2a8c │ │ + b.n d2a9c │ │ asrs r7, r2, #32 │ │ - b.n d3696 │ │ + b.n d36a6 │ │ movs r6, r2 │ │ and.w r0, r0, ip, lsl #1 │ │ - b.n d2a98 │ │ + b.n d2aa8 │ │ movs r0, r0 │ │ - b.n d3602 │ │ + b.n d3612 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #8 │ │ - b.n d32aa │ │ + b.n d32ba │ │ movs r1, r2 │ │ and.w r0, r0, r0, lsl #8 │ │ - b.n d36b2 │ │ + b.n d36c2 │ │ movs r7, r1 │ │ and.w r0, r0, r8, lsl #1 │ │ - b.n d2ab4 │ │ + b.n d2ac4 │ │ stmia r0!, {r4, r5} │ │ - b.n d2ab8 │ │ + b.n d2ac8 │ │ str r6, [r0, #0] │ │ - b.n d3002 │ │ + b.n d3012 │ │ lsrs r6, r3, #28 │ │ - b.n d3264 │ │ + b.n d3274 │ │ movs r0, #0 │ │ - b.n d36ca │ │ + b.n d36da │ │ ands r4, r7 │ │ - b.n d2ac8 │ │ - b.n d2f92 │ │ - b.n d36d2 │ │ + b.n d2ad8 │ │ + b.n d2fa2 │ │ + b.n d36e2 │ │ lsls r0, r4, #2 │ │ - b.n d3242 │ │ + b.n d3252 │ │ str r4, [r6, r0] │ │ - b.n d2ad4 │ │ + b.n d2ae4 │ │ asrs r7, r2, #32 │ │ - b.n d36de │ │ + b.n d36ee │ │ movs r0, #8 │ │ asrs r0, r4, #6 │ │ movs r3, r0 │ │ and.w r0, r0, r0, lsl #8 │ │ - b.n d36ea │ │ + b.n d36fa │ │ ands r4, r7 │ │ - b.n d2ae8 │ │ - b.n d2fb2 │ │ - b.n d36f2 │ │ + b.n d2af8 │ │ + b.n d2fc2 │ │ + b.n d3702 │ │ str r4, [r6, r0] │ │ - b.n d2af0 │ │ + b.n d2b00 │ │ movs r2, r0 │ │ - b.n d3052 │ │ + b.n d3062 │ │ movs r2, r1 │ │ - b.n d325e │ │ + b.n d326e │ │ @ instruction: 0xff968aff │ │ strh r0, [r7, #0] │ │ - b.n d2b00 │ │ + b.n d2b10 │ │ movs r2, r3 │ │ cmp r2, #0 │ │ strb r1, [r0, #0] │ │ - b.n d3462 │ │ + b.n d3472 │ │ movs r7, r0 │ │ - b.n d3278 │ │ + b.n d3288 │ │ @ instruction: 0xff953aff │ │ movs r6, r2 │ │ and.w r0, r0, ip, ror #16 │ │ - b.n d2b18 │ │ - b.n d2fe2 │ │ - b.n d3722 │ │ + b.n d2b28 │ │ + b.n d2ff2 │ │ + b.n d3732 │ │ str r4, [r6, r0] │ │ - b.n d2b20 │ │ + b.n d2b30 │ │ asrs r0, r3, #32 │ │ - b.n d2b04 │ │ + b.n d2b14 │ │ asrs r7, r2, #32 │ │ - b.n d372e │ │ + b.n d373e │ │ lsls r1, r1, #4 │ │ - b.n d2e1e │ │ + b.n d2e2e │ │ movs r0, #0 │ │ - b.n d2b22 │ │ + b.n d2b32 │ │ movs r0, r0 │ │ - b.n d307e │ │ + b.n d308e │ │ movs r0, #64 @ 0x40 │ │ - b.n d2b38 │ │ + b.n d2b48 │ │ movs r2, r0 │ │ - b.n d32a2 │ │ + b.n d32b2 │ │ @ instruction: 0xffd70aff │ │ movs r0, r3 │ │ - b.n d2b44 │ │ + b.n d2b54 │ │ str r4, [r0, #0] │ │ - b.n d349a │ │ + b.n d34aa │ │ movs r0, #0 │ │ - b.n d3752 │ │ + b.n d3762 │ │ movs r0, r0 │ │ - b.n d32c2 │ │ + b.n d32d2 │ │ @ instruction: 0xfff41aff │ │ @ instruction: 0xffe5eaff │ │ asrs r4, r3, #1 │ │ - b.n d2bc4 │ │ + b.n d2bd4 │ │ movs r0, #23 │ │ - b.n d3766 │ │ + b.n d3776 │ │ lsls r4, r1, #4 │ │ - b.n d312e │ │ + b.n d313e │ │ str r1, [sp, #192] @ 0xc0 │ │ - b.n d336e │ │ + b.n d337e │ │ movs r0, r0 │ │ @ instruction: 0xea009532 │ │ - b.n d3376 │ │ + b.n d3386 │ │ asrs r4, r0, #1 │ │ - b.n d2b74 │ │ + b.n d2b84 │ │ movs r0, #1 │ │ - b.n d3550 │ │ + b.n d3560 │ │ lsls r0, r4, #1 │ │ - b.n d355c │ │ + b.n d356c │ │ adds r0, #3 │ │ - b.n d3786 │ │ + b.n d3796 │ │ ldr r6, [sp, #336] @ 0x150 │ │ @ instruction: 0xebff0064 │ │ - b.n d2b88 │ │ + b.n d2b98 │ │ asrs r2, r6, #30 │ │ - b.n d3662 │ │ - add r0, pc, #144 @ (adr r0, d30e4 ) │ │ - b.n d2b90 │ │ + b.n d3672 │ │ + add r0, pc, #144 @ (adr r0, d30f4 ) │ │ + b.n d2ba0 │ │ subs r7, r7, #7 │ │ - b.n d36f8 │ │ + b.n d3708 │ │ str r0, [r4, r0] │ │ - b.n d2b98 │ │ + b.n d2ba8 │ │ movs r0, r0 │ │ - b.n d3702 │ │ + b.n d3712 │ │ movs r1, r0 │ │ asrs r0, r2, #5 │ │ mcr2 10, 6, r1, cr11, cr15, {7} @ │ │ lsls r0, r0, #1 │ │ - b.n d2ba2 │ │ + b.n d2bb2 │ │ asrs r0, r0, #32 │ │ - b.n d37b2 │ │ + b.n d37c2 │ │ movs r0, #160 @ 0xa0 │ │ - b.n d2baa │ │ + b.n d2bba │ │ movs r0, #68 @ 0x44 │ │ - b.n d2b94 │ │ + b.n d2ba4 │ │ movs r0, r1 │ │ - b.n d2b9e │ │ + b.n d2bae │ │ str r0, [r0, #0] │ │ - b.n d2ba6 │ │ + b.n d2bb6 │ │ asrs r0, r4, #4 │ │ - b.n d3108 │ │ + b.n d3118 │ │ lsls r0, r4, #4 │ │ - b.n d33ca │ │ + b.n d33da │ │ asrs r0, r3, #32 │ │ - b.n d2ba8 │ │ + b.n d2bb8 │ │ movs r4, r2 │ │ - b.n d2bac │ │ + b.n d2bbc │ │ movs r4, r3 │ │ - b.n d2bd0 │ │ + b.n d2be0 │ │ movs r0, #208 @ 0xd0 │ │ - b.n d3424 │ │ + b.n d3434 │ │ lsls r0, r2, #3 │ │ - b.n d341e │ │ + b.n d342e │ │ strb r2, [r0, #0] │ │ - b.n d3142 │ │ + b.n d3152 │ │ asrs r3, r0, #32 │ │ - b.n d3248 │ │ + b.n d3258 │ │ lsls r6, r7, #2 │ │ subs r2, #0 │ │ add r8, sl │ │ - b.n d3442 │ │ + b.n d3452 │ │ movs r2, r0 │ │ - b.n d3132 │ │ + b.n d3142 │ │ asrs r2, r6, #2 │ │ - b.n d3460 │ │ + b.n d3470 │ │ strb r0, [r3, #0] │ │ - b.n d2bea │ │ + b.n d2bfa │ │ asrs r1, r0, #32 │ │ - b.n d31ca │ │ + b.n d31da │ │ str r4, [r2, r2] │ │ - b.n d2bea │ │ + b.n d2bfa │ │ asrs r2, r0, #32 │ │ - b.n d35c8 │ │ + b.n d35d8 │ │ str r0, [r0, #4] │ │ - b.n d2be4 │ │ + b.n d2bf4 │ │ movs r5, r0 │ │ - b.n d3370 │ │ + b.n d3380 │ │ asrs r0, r1, #32 │ │ movs r5, #148 @ 0x94 │ │ adds r0, #5 │ │ - b.n d3416 │ │ + b.n d3426 │ │ adds r1, #161 @ 0xa1 │ │ movs r0, #134 @ 0x86 │ │ asrs r0, r7, #4 │ │ - b.n d2c12 │ │ + b.n d2c22 │ │ asrs r0, r0, #32 │ │ - b.n d31e4 │ │ + b.n d31f4 │ │ movs r7, r0 │ │ - b.n d34a6 │ │ + b.n d34b6 │ │ movs r0, r0 │ │ - b.n d31f0 │ │ + b.n d3200 │ │ movs r1, r0 │ │ - b.n d31ee │ │ + b.n d31fe │ │ lsrs r7, r7, #9 │ │ add.w r0, r0, r0 │ │ - b.n d33a0 │ │ + b.n d33b0 │ │ str r4, [r7, r0] │ │ - b.n d2c14 │ │ + b.n d2c24 │ │ lsls r2, r1, #2 │ │ cmp r2, #0 │ │ asrs r7, r2, #32 │ │ - b.n d3842 │ │ + b.n d3852 │ │ eors r4, r3 │ │ - b.n d2cae │ │ + b.n d2cbe │ │ asrs r0, r0, #4 │ │ - b.n d320c │ │ - b.n d318c │ │ - b.n d2c48 │ │ + b.n d321c │ │ + b.n d319c │ │ + b.n d2c58 │ │ str r1, [r0, r0] │ │ - b.n d3612 │ │ + b.n d3622 │ │ asrs r1, r6, #16 │ │ - b.n d3196 │ │ + b.n d31a6 │ │ adds r0, #2 │ │ - b.n d359c │ │ + b.n d35ac │ │ asrs r0, r0, #32 │ │ - b.n d345e │ │ + b.n d346e │ │ movs r5, r0 │ │ - b.n d33c8 │ │ + b.n d33d8 │ │ lsls r1, r0, #2 │ │ cmp r2, #0 │ │ asrs r0, r0, #32 │ │ - b.n d386a │ │ + b.n d387a │ │ eors r4, r1 │ │ - b.n d2c48 │ │ + b.n d2c58 │ │ asrs r6, r1, #4 │ │ - b.n d31b4 │ │ + b.n d31c4 │ │ asrs r4, r5, #32 │ │ - b.n d2c50 │ │ + b.n d2c60 │ │ asrs r4, r0, #1 │ │ - b.n d2c74 │ │ + b.n d2c84 │ │ asrs r6, r1, #4 │ │ - b.n d3240 │ │ + b.n d3250 │ │ asrs r0, r1, #1 │ │ - b.n d2c5c │ │ + b.n d2c6c │ │ asrs r4, r1, #32 │ │ - b.n d35c8 │ │ + b.n d35d8 │ │ asrs r0, r5, #32 │ │ - b.n d2c64 │ │ + b.n d2c74 │ │ movs r3, r0 │ │ and.w r0, r0, r1, lsl #12 │ │ - b.n d3654 │ │ + b.n d3664 │ │ eors r4, r1 │ │ - b.n d2c90 │ │ + b.n d2ca0 │ │ movs r5, r0 │ │ - b.n d3400 │ │ + b.n d3410 │ │ lsls r3, r6, #1 │ │ cmp r2, #0 │ │ asrs r3, r0, #32 │ │ - b.n d326c │ │ + b.n d327c │ │ movs r0, #23 │ │ - b.n d38a6 │ │ + b.n d38b6 │ │ asrs r1, r4, #2 │ │ - b.n d34aa │ │ + b.n d34ba │ │ strb r1, [r0, #4] │ │ - b.n d3272 │ │ + b.n d3282 │ │ movs r0, #1 │ │ - b.n d38b2 │ │ + b.n d38c2 │ │ stmia r4!, {r0, r1, r2, r4, r5} │ │ - b.n d327a │ │ + b.n d328a │ │ movs r2, r0 │ │ - b.n d3832 │ │ + b.n d3842 │ │ lsls r2, r0, #1 │ │ subs r2, #0 │ │ movs r0, #72 @ 0x48 │ │ - b.n d2cbc │ │ + b.n d2ccc │ │ str r4, [sp, #220] @ 0xdc │ │ - b.n d34c6 │ │ + b.n d34d6 │ │ strb r1, [r1, #4] │ │ - b.n d2fae │ │ + b.n d2fbe │ │ str r0, [r0, #0] │ │ - b.n d2cb2 │ │ + b.n d2cc2 │ │ strb r6, [r0, #0] │ │ - b.n d3220 │ │ + b.n d3230 │ │ movs r1, r1 │ │ - b.n d3444 │ │ + b.n d3454 │ │ movs r5, r7 │ │ lsrs r0, r0, #8 │ │ movs r0, #0 │ │ - b.n d3670 │ │ + b.n d3680 │ │ movs r0, #52 @ 0x34 │ │ - b.n d2cbc │ │ + b.n d2ccc │ │ eors r0, r1 │ │ - b.n d2ce0 │ │ + b.n d2cf0 │ │ strb r3, [r0, #0] │ │ - b.n d36bc │ │ + b.n d36cc │ │ cmp r3, #144 @ 0x90 │ │ cdp 0, 10, cr2, cr0, cr4, {2} │ │ - b.n d2cec │ │ + b.n d2cfc │ │ movs r6, r1 │ │ - b.n d3464 │ │ + b.n d3474 │ │ str r1, [r1, #16] │ │ - b.n d32be │ │ + b.n d32ce │ │ str r0, [r6, #0] │ │ - b.n d2cd8 │ │ + b.n d2ce8 │ │ movs r3, r3 │ │ cmp r2, #0 │ │ - add r0, pc, #160 @ (adr r0, d3264 ) │ │ - b.n d2d00 │ │ + add r0, pc, #160 @ (adr r0, d3274 ) │ │ + b.n d2d10 │ │ movs r0, #0 │ │ - b.n d390a │ │ - b.n d3224 │ │ - b.n d2d08 │ │ + b.n d391a │ │ + b.n d3234 │ │ + b.n d2d18 │ │ asrs r1, r1 │ │ - b.n d3256 │ │ + b.n d3266 │ │ str r4, [r1, #0] │ │ - b.n d36e2 │ │ + b.n d36f2 │ │ strb r2, [r1, #0] │ │ - b.n d351a │ │ + b.n d352a │ │ cmp r2, #132 @ 0x84 │ │ orn sl, r7, #18304 @ 0x4780 │ │ orn r8, r7, #466944 @ 0x72000 │ │ @ instruction: 0xf36228f0 │ │ @ instruction: 0xf3622222 │ │ @ instruction: 0xf3f62123 │ │ mrs fp, PRIMASK_NS │ │ cdp 0, 1, cr0, cr2, cr0, {0} │ │ - b.n d38aa │ │ + b.n d38ba │ │ movs r0, r5 │ │ subs r0, r0, r0 │ │ strb r0, [r2, #0] │ │ - b.n d3696 │ │ + b.n d36a6 │ │ movs r0, #4 │ │ - b.n d369a │ │ - b.n d3228 │ │ - b.n d3726 │ │ - movs r6, r0 │ │ - b.n d34b2 │ │ - add r0, pc, #28 @ (adr r0, d322c ) │ │ - b.n d3552 │ │ + b.n d36aa │ │ + b.n d3238 │ │ + b.n d3736 │ │ + movs r6, r0 │ │ + b.n d34c2 │ │ + add r0, pc, #28 @ (adr r0, d323c ) │ │ + b.n d3562 │ │ @ instruction: 0xffef8aff │ │ - add r0, pc, #144 @ (adr r0, d32a8 ) │ │ - b.n d2d54 │ │ + add r0, pc, #144 @ (adr r0, d32b8 ) │ │ + b.n d2d64 │ │ lsls r1, r1, #4 │ │ - b.n d351a │ │ + b.n d352a │ │ movs r1, r5 │ │ lsrs r0, r0, #8 │ │ strh r0, [r7, #0] │ │ - b.n d2d60 │ │ + b.n d2d70 │ │ ands r4, r1 │ │ - b.n d3738 │ │ - b.n d32ac │ │ - b.n d2d68 │ │ + b.n d3748 │ │ + b.n d32bc │ │ + b.n d2d78 │ │ str r0, [r6, #0] │ │ - b.n d2d6c │ │ + b.n d2d7c │ │ strb r4, [r6, #0] │ │ - b.n d2d70 │ │ + b.n d2d80 │ │ movs r1, #7 │ │ - b.n d3342 │ │ + b.n d3352 │ │ lsrs r7, r7, #27 │ │ - b.n d3862 │ │ + b.n d3872 │ │ movs r5, r5 │ │ lsrs r0, r0, #8 │ │ movs r1, #7 │ │ - b.n d3586 │ │ + b.n d3596 │ │ strb r4, [r1, #0] │ │ - b.n d36d2 │ │ + b.n d36e2 │ │ cmp r2, #130 @ 0x82 │ │ orn sl, r7, #18304 @ 0x4780 │ │ orn r0, r7, #528 @ 0x210 │ │ - b.n d32e2 │ │ + b.n d32f2 │ │ str r0, [r4, #0] │ │ - b.n d399a │ │ + b.n d39aa │ │ cmp r0, #228 @ 0xe4 │ │ bfi r0, r2, #30, #4294967274 │ │ - b.n d336e │ │ + b.n d337e │ │ str r0, [r0, #0] │ │ - b.n d3a26 │ │ + b.n d3a36 │ │ lsrs r0, r6, #3 │ │ @ instruction: 0xf3620220 │ │ @ instruction: 0xf3f60121 │ │ @ instruction: 0xf3f22b90 │ │ mrc 7, 0, r8, cr0, cr6, {0} │ │ - b.n d329e │ │ + b.n d32ae │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ str r0, [r0, #0] │ │ - b.n d39c2 │ │ + b.n d39d2 │ │ strh r0, [r7, #0] │ │ - b.n d2dc0 │ │ + b.n d2dd0 │ │ movs r2, r2 │ │ and.w r0, r0, r0 │ │ - b.n d394a │ │ + b.n d395a │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ str r4, [r1, #0] │ │ - b.n d35d6 │ │ + b.n d35e6 │ │ movs r6, r1 │ │ and.w r0, r0, r0, lsl #24 │ │ - b.n d39de │ │ + b.n d39ee │ │ movs r4, r1 │ │ and.w r0, r0, r4, lsl #9 │ │ - b.n d2de0 │ │ - add r0, pc, #144 @ (adr r0, d3338 ) │ │ - b.n d2de4 │ │ + b.n d2df0 │ │ + add r0, pc, #144 @ (adr r0, d3348 ) │ │ + b.n d2df4 │ │ ands r6, r1 │ │ - b.n d3332 │ │ - b.n d3330 │ │ - b.n d2dec │ │ + b.n d3342 │ │ + b.n d3340 │ │ + b.n d2dfc │ │ cmp r7, #24 │ │ - b.n d3594 │ │ + b.n d35a4 │ │ str r0, [r0, #0] │ │ - b.n d39fa │ │ + b.n d3a0a │ │ strh r0, [r7, #0] │ │ - b.n d2df8 │ │ + b.n d2e08 │ │ lsls r2, r4, #2 │ │ - b.n d356a │ │ + b.n d357a │ │ str r4, [r1, #0] │ │ asrs r0, r4, #6 │ │ movs r2, r0 │ │ and.w r0, r0, r0, lsl #24 │ │ - b.n d3a0e │ │ + b.n d3a1e │ │ strh r0, [r7, #0] │ │ - b.n d2e0c │ │ - b.n d3354 │ │ - b.n d2e10 │ │ + b.n d2e1c │ │ + b.n d3364 │ │ + b.n d2e20 │ │ movs r0, #6 │ │ - b.n d335a │ │ + b.n d336a │ │ movs r1, r0 │ │ - b.n d3582 │ │ + b.n d3592 │ │ @ instruction: 0xff9a8aff │ │ movs r1, r2 │ │ cmp r2, #0 │ │ str r1, [r0, r0] │ │ - b.n d376c │ │ + b.n d377c │ │ eors r4, r1 │ │ - b.n d2e28 │ │ + b.n d2e38 │ │ movs r5, r0 │ │ - b.n d3598 │ │ + b.n d35a8 │ │ @ instruction: 0xff993aff │ │ movs r4, r1 │ │ and.w r1, r0, r9, lsl #8 │ │ - b.n d3126 │ │ + b.n d3136 │ │ strb r0, [r0, #0] │ │ - b.n d2e2a │ │ + b.n d2e3a │ │ str r4, [r6, #0] │ │ - b.n d2e40 │ │ + b.n d2e50 │ │ movs r0, #2 │ │ - b.n d3398 │ │ + b.n d33a8 │ │ movs r6, r0 │ │ - b.n d35b2 │ │ + b.n d35c2 │ │ @ instruction: 0xffdf0aff │ │ movs r0, #48 @ 0x30 │ │ - b.n d2e50 │ │ + b.n d2e60 │ │ ands r4, r0 │ │ - b.n d37a2 │ │ + b.n d37b2 │ │ str r0, [r0, #0] │ │ - b.n d3a5e │ │ + b.n d3a6e │ │ movs r2, r0 │ │ - b.n d35ca │ │ + b.n d35da │ │ @ instruction: 0xfff41aff │ │ @ instruction: 0xffeaeaff │ │ asrs r0, r0, #32 │ │ - b.n d366e │ │ + b.n d367e │ │ adds r0, #60 @ 0x3c │ │ - b.n d2e6c │ │ + b.n d2e7c │ │ movs r3, r0 │ │ - b.n d35d8 │ │ + b.n d35e8 │ │ movs r2, r1 │ │ ldr r2, [sp, #0] │ │ str r0, [r3, #0] │ │ - b.n d2e78 │ │ + b.n d2e88 │ │ movs r3, r0 │ │ - b.n d33c4 │ │ + b.n d33d4 │ │ strb r4, [r2, #0] │ │ - b.n d2e80 │ │ + b.n d2e90 │ │ movs r6, r0 │ │ - b.n d334a │ │ + b.n d335a │ │ movs r0, #3 │ │ - b.n d344e │ │ + b.n d345e │ │ movs r3, r0 │ │ - b.n d3712 │ │ + b.n d3722 │ │ movs r0, r0 │ │ - b.n d3464 │ │ + b.n d3474 │ │ movs r1, r0 │ │ - b.n d345a │ │ + b.n d346a │ │ movs r6, r0 │ │ - b.n d335e │ │ + b.n d336e │ │ adds r0, #3 │ │ - b.n d3462 │ │ + b.n d3472 │ │ movs r0, r0 │ │ and.w r0, r0, r1, lsl #8 │ │ - b.n d36aa │ │ + b.n d36ba │ │ movs r2, r1 │ │ - b.n d36ae │ │ + b.n d36be │ │ asrs r0, r1, #32 │ │ - b.n d36b2 │ │ + b.n d36c2 │ │ lsls r6, r7, #2 │ │ add.w r0, r0, r0 │ │ - b.n d3a1a │ │ + b.n d3a2a │ │ mcr2 10, 0, r1, cr6, cr15, {7} @ │ │ asrs r0, r4, #2 │ │ - b.n d2eb6 │ │ + b.n d2ec6 │ │ movs r0, r3 │ │ - b.n d2eb6 │ │ + b.n d2ec6 │ │ str r0, [r4, r0] │ │ - b.n d2ec4 │ │ + b.n d2ed4 │ │ str r0, [r0, #0] │ │ - b.n d2eb0 │ │ + b.n d2ec0 │ │ asrs r4, r0, #1 │ │ - b.n d2eac │ │ + b.n d2ebc │ │ movs r6, r0 │ │ - b.n d3636 │ │ + b.n d3646 │ │ vpmin.u , , │ │ movs r0, r0 │ │ - b.n d3ade │ │ - beq.n d33d8 │ │ - b.n d3838 │ │ + b.n d3aee │ │ + beq.n d33e8 │ │ + b.n d3848 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r4, r7, r9} │ │ - b.n d2ee8 │ │ + b.n d2ef8 │ │ movs r0, r0 │ │ - b.n d34cc │ │ + b.n d34dc │ │ asrs r2, r3, #1 │ │ - b.n d2f52 │ │ + b.n d2f62 │ │ movs r0, r0 │ │ - b.n d3b76 │ │ + b.n d3b86 │ │ movs r3, r0 │ │ - b.n d3a5c │ │ + b.n d3a6c │ │ ldc2l 10, cr3, [r6, #1020]! @ 0x3fc @ │ │ asrs r4, r0, #3 │ │ - b.n d2ef2 │ │ + b.n d2f02 │ │ movs r4, r2 │ │ - b.n d2ef6 │ │ + b.n d2f06 │ │ str r0, [r3, r0] │ │ - b.n d2efa │ │ + b.n d2f0a │ │ movs r0, #64 @ 0x40 │ │ - b.n d2ef0 │ │ + b.n d2f00 │ │ strb r4, [r6, #9] │ │ - b.n d2f10 │ │ + b.n d2f20 │ │ asrs r4, r6, #9 │ │ - b.n d2f14 │ │ + b.n d2f24 │ │ movs r0, #4 │ │ - b.n d2efe │ │ + b.n d2f0e │ │ strb r7, [r0, #0] │ │ - b.n d34fc │ │ + b.n d350c │ │ negs r4, r5 │ │ - b.n d2f20 │ │ + b.n d2f30 │ │ asrs r1, r0, #32 │ │ - b.n d3504 │ │ + b.n d3514 │ │ adds r2, #104 @ 0x68 │ │ - b.n d2f28 │ │ + b.n d2f38 │ │ lsls r1, r0, #12 │ │ - b.n d3a12 │ │ + b.n d3a22 │ │ ands r4, r0 │ │ - b.n d3510 │ │ + b.n d3520 │ │ lsls r1, r4, #1 │ │ @ instruction: 0xe98d3003 │ │ - b.n d3518 │ │ + b.n d3528 │ │ ands r7, r0 │ │ lsls r0, r4, #6 │ │ movs r3, r0 │ │ - b.n d3b42 │ │ + b.n d3b52 │ │ movs r4, #81 @ 0x51 │ │ - b.n d3a06 │ │ + b.n d3a16 │ │ ands r0, r0 │ │ - b.n d2f24 │ │ - subs r6, r0, #6 │ │ + b.n d2f34 │ │ + subs r5, r0, #6 │ │ @ instruction: 0xebff0000 │ │ - b.n d3bd2 │ │ - beq.n d344c │ │ - b.n d38ac │ │ + b.n d3be2 │ │ + beq.n d345c │ │ + b.n d38bc │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r1, r2, ip} │ │ - b.n d375e │ │ + b.n d376e │ │ movs r1, r0 │ │ - b.n d36c2 │ │ + b.n d36d2 │ │ mcr2 10, 2, r0, cr14, cr15, {7} @ │ │ movs r0, #96 @ 0x60 │ │ - b.n d3944 │ │ + b.n d3954 │ │ asrs r0, r5, #32 │ │ - b.n d2f3e │ │ + b.n d2f4e │ │ movs r2, r1 │ │ - b.n d3772 │ │ + b.n d3782 │ │ asrs r0, r1, #32 │ │ - b.n d3776 │ │ + b.n d3786 │ │ lsls r5, r1, #11 │ │ add.w r0, r0, r0, asr #20 │ │ - b.n d2f78 │ │ + b.n d2f88 │ │ movs r1, r0 │ │ - b.n d3b22 │ │ + b.n d3b32 │ │ mcr2 10, 1, r1, cr14, cr15, {7} @ │ │ adds r0, #4 │ │ - b.n d378a │ │ + b.n d379a │ │ eors r0, r4 │ │ - b.n d2f88 │ │ + b.n d2f98 │ │ movs r0, r0 │ │ - b.n d3afa │ │ + b.n d3b0a │ │ movs r7, r5 │ │ lsrs r0, r0, #8 │ │ str r0, [sp, #16] │ │ - b.n d396c │ │ + b.n d397c │ │ movs r0, r0 │ │ - b.n d3c1e │ │ + b.n d3c2e │ │ movs r1, r0 │ │ and.w r0, r0, r0 │ │ - b.n d3b0e │ │ + b.n d3b1e │ │ mcr2 10, 1, r0, cr5, cr15, {7} @ │ │ ands r1, r0 │ │ - b.n d38f6 │ │ + b.n d3906 │ │ asrs r4, r0, #4 │ │ - b.n d33a4 │ │ + b.n d33b4 │ │ movs r0, r0 │ │ - b.n d3b18 │ │ + b.n d3b28 │ │ @ instruction: 0xfff90aff │ │ movs r0, #64 @ 0x40 │ │ - b.n d2fb2 │ │ + b.n d2fc2 │ │ str r0, [r0, #0] │ │ - b.n d3bc2 │ │ + b.n d3bd2 │ │ lsls r4, r2, #2 │ │ - b.n d2faa │ │ + b.n d2fba │ │ asrs r0, r1, #32 │ │ - b.n d2fae │ │ + b.n d2fbe │ │ movs r0, #4 │ │ - b.n d2fbe │ │ + b.n d2fce │ │ asrs r1, r4, #4 │ │ - b.n d37d2 │ │ + b.n d37e2 │ │ lsls r1, r2, #18 │ │ - b.n d34d8 │ │ + b.n d34e8 │ │ movs r0, r0 │ │ - b.n d351e │ │ + b.n d352e │ │ movs r3, r0 │ │ - b.n d3740 │ │ + b.n d3750 │ │ adds r0, #1 │ │ adds r1, #160 @ 0xa0 │ │ movs r0, #3 │ │ - b.n d35a6 │ │ + b.n d35b6 │ │ movs r2, r1 │ │ - b.n d37ea │ │ + b.n d37fa │ │ asrs r0, r1, #32 │ │ - b.n d37ee │ │ + b.n d37fe │ │ lsls r7, r5, #1 │ │ add.w r0, r0, r0 │ │ - b.n d3b56 │ │ + b.n d3b66 │ │ ldc2 10, cr1, [r7, #1020]! @ 0x3fc @ │ │ asrs r0, r4, #2 │ │ - b.n d2ff2 │ │ + b.n d3002 │ │ movs r0, #24 │ │ - b.n d2ff2 │ │ + b.n d3002 │ │ asrs r0, r0, #32 │ │ - b.n d2fe8 │ │ + b.n d2ff8 │ │ movs r1, r0 │ │ - b.n d376e │ │ + b.n d377e │ │ ldc2 10, cr2, [r2, #1020]! @ 0x3fc @ │ │ movs r4, #208 @ 0xd0 │ │ - b.n d3866 │ │ + b.n d3876 │ │ str r1, [r0, #0] │ │ - b.n d39e2 │ │ + b.n d39f2 │ │ adds r0, #178 @ 0xb2 │ │ - b.n d3880 │ │ + b.n d3890 │ │ strb r4, [r0, #4] │ │ - b.n d3410 │ │ + b.n d3420 │ │ lsls r4, r2, #2 │ │ - b.n d3006 │ │ + b.n d3016 │ │ adds r0, #3 │ │ - b.n d35e8 │ │ + b.n d35f8 │ │ adds r0, #2 │ │ - b.n d39f0 │ │ + b.n d3a00 │ │ movs r0, r0 │ │ - b.n d3794 │ │ + b.n d37a4 │ │ adds r0, #0 │ │ - b.n d3832 │ │ + b.n d3842 │ │ adds r0, #8 │ │ movs r5, #146 @ 0x92 │ │ adds r1, #163 @ 0xa3 │ │ movs r0, #129 @ 0x81 │ │ asrs r4, r2, #32 │ │ - b.n d302e │ │ + b.n d303e │ │ movs r7, r0 │ │ - b.n d37ae │ │ + b.n d37be │ │ adds r0, #1 │ │ - b.n d358c │ │ + b.n d359c │ │ @ instruction: 0xffde3aff │ │ movs r0, r0 │ │ - b.n d3c4e │ │ + b.n d3c5e │ │ str r0, [r4, r0] │ │ - b.n d304c │ │ + b.n d305c │ │ @ instruction: 0xffd2eaff │ │ movs r0, r0 │ │ - b.n d3cda │ │ + b.n d3cea │ │ asrs r0, r7, #4 │ │ - b.n d305c │ │ + b.n d306c │ │ asrs r1, r0, #32 │ │ - b.n d3640 │ │ + b.n d3650 │ │ asrs r2, r3, #1 │ │ - b.n d30c8 │ │ + b.n d30d8 │ │ movs r0, r0 │ │ - b.n d3bcc │ │ + b.n d3bdc │ │ ldc2 10, cr0, [sl, #1020] @ 0x3fc @ │ │ asrs r0, r4, #2 │ │ - b.n d3066 │ │ - b.n d3534 │ │ - b.n d3c76 │ │ + b.n d3076 │ │ + b.n d3544 │ │ + b.n d3c86 │ │ adds r0, #136 @ 0x88 │ │ - b.n d3064 │ │ + b.n d3074 │ │ str r0, [r2, #8] │ │ - b.n d3068 │ │ + b.n d3078 │ │ strb r4, [r1, #2] │ │ - b.n d306c │ │ + b.n d307c │ │ movs r0, #148 @ 0x94 │ │ - b.n d3070 │ │ + b.n d3080 │ │ ands r3, r0 │ │ - b.n d35f6 │ │ + b.n d3606 │ │ stmia r0!, {} │ │ - b.n d3070 │ │ + b.n d3080 │ │ asrs r4, r3, #32 │ │ - b.n d308c │ │ + b.n d309c │ │ strb r7, [r0, #0] │ │ - b.n d36fa │ │ + b.n d370a │ │ strb r0, [r0, #0] │ │ - b.n d3c9a │ │ + b.n d3caa │ │ adds r0, #3 │ │ movs r0, #70 @ 0x46 │ │ strb r0, [r0, #7] │ │ movs r5, #154 @ 0x9a │ │ str r0, [r2, #0] │ │ - b.n d3096 │ │ + b.n d30a6 │ │ ands r0, r0 │ │ - b.n d308c │ │ + b.n d309c │ │ strb r3, [r0, #0] │ │ movs r0, #135 @ 0x87 │ │ strh r0, [r2, #6] │ │ - b.n d38fc │ │ + b.n d390c │ │ asrs r4, r0, #32 │ │ - b.n d3098 │ │ + b.n d30a8 │ │ adds r0, #8 │ │ - b.n d3622 │ │ + b.n d3632 │ │ asrs r1, r1, #32 │ │ - b.n d3720 │ │ + b.n d3730 │ │ asrs r0, r7, #4 │ │ movs r5, #154 @ 0x9a │ │ movs r0, #8 │ │ movs r0, #68 @ 0x44 │ │ ands r0, r0 │ │ - b.n d38ca │ │ - b.n d3590 │ │ + b.n d38da │ │ + b.n d35a0 │ │ movs r0, #129 @ 0x81 │ │ asrs r0, r1, #3 │ │ - b.n d30d0 │ │ + b.n d30e0 │ │ adds r0, #200 @ 0xc8 │ │ - b.n d30d4 │ │ + b.n d30e4 │ │ cmp r6, #71 @ 0x47 │ │ - b.n d3cda │ │ + b.n d3cea │ │ asrs r1, r0, #32 │ │ - b.n d36bc │ │ + b.n d36cc │ │ movs r0, r2 │ │ - b.n d30bc │ │ + b.n d30cc │ │ adds r0, #3 │ │ - b.n d36c4 │ │ + b.n d36d4 │ │ movs r1, r0 │ │ - b.n d3cea │ │ + b.n d3cfa │ │ asrs r0, r0, #1 │ │ stmia.w sp, {r3, ip, sp, lr} │ │ - b.n d30cc │ │ - b.n d35cc │ │ - b.n d30d0 │ │ - subs r3, r3, #4 │ │ + b.n d30dc │ │ + b.n d35dc │ │ + b.n d30e0 │ │ + subs r2, r3, #4 │ │ @ instruction: 0xebff0004 │ │ - b.n d38fe │ │ - beq.n d35f8 │ │ - b.n d3a58 │ │ + b.n d390e │ │ + beq.n d3608 │ │ + b.n d3a68 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r6, r7, ip} │ │ - b.n d30fa │ │ + b.n d310a │ │ adds r0, #160 @ 0xa0 │ │ - b.n d3102 │ │ + b.n d3112 │ │ movs r4, r2 │ │ - b.n d3102 │ │ + b.n d3112 │ │ strb r0, [r0, #1] │ │ - b.n d30f8 │ │ + b.n d3108 │ │ str r0, [r3, r0] │ │ - b.n d310a │ │ + b.n d311a │ │ str r0, [r0, #0] │ │ - b.n d3104 │ │ + b.n d3114 │ │ stmia r0!, {r4, r6} │ │ - b.n d3120 │ │ + b.n d3130 │ │ asrs r0, r2, #1 │ │ - b.n d3124 │ │ + b.n d3134 │ │ strb r4, [r0, #0] │ │ - b.n d3118 │ │ + b.n d3128 │ │ stmia r0!, {r2, r3} │ │ - b.n d370c │ │ + b.n d371c │ │ eors r0, r1 │ │ - b.n d3130 │ │ + b.n d3140 │ │ asrs r1, r0, #32 │ │ - b.n d3714 │ │ + b.n d3724 │ │ adds r0, #68 @ 0x44 │ │ - b.n d3138 │ │ + b.n d3148 │ │ lsls r1, r0, #12 │ │ - b.n d3c2c │ │ + b.n d3c3c │ │ ands r4, r0 │ │ - b.n d3720 │ │ + b.n d3730 │ │ movs r0, #4 │ │ - b.n d3120 │ │ + b.n d3130 │ │ ands r4, r1 │ │ lsls r0, r4, #6 │ │ movs r0, #8 │ │ - b.n d3b28 │ │ + b.n d3b38 │ │ lsls r1, r4, #1 │ │ stmia.w r2, {r0, r1, ip, sp} │ │ - b.n d3734 │ │ + b.n d3744 │ │ movs r3, r0 │ │ - b.n d3d5a │ │ + b.n d3d6a │ │ ands r0, r0 │ │ - b.n d3138 │ │ + b.n d3148 │ │ movs r4, #63 @ 0x3f │ │ - b.n d3c22 │ │ - subs r0, r0, #4 │ │ + b.n d3c32 │ │ + subs r7, r7, #3 │ │ @ instruction: 0xebff0000 │ │ - b.n d3dea │ │ - beq.n d3664 │ │ - b.n d3ac4 │ │ - ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r2, r6, r7, sl, fp, ip, sp, pc} │ │ - movs r0, r0 │ │ - str r5, [r3, #84] @ 0x54 │ │ - vcvt.f32.u32 q10, , #13 │ │ - @ instruction: 0xfff3babb │ │ - @ instruction: 0xfff35748 │ │ - vraddhn.i d27, , q8 │ │ - movs r0, r0 │ │ - str r5, [r5, #116] @ 0x74 │ │ - vmla.i , , d17[0] │ │ - vqdmulh.s , , d11[0] │ │ - @ instruction: 0xfff36dd6 │ │ - vsubw.u , , d28 │ │ + b.n d3dfa │ │ + beq.n d3674 │ │ + b.n d3ad4 │ │ + ldrh r0, [r6, #62] @ 0x3e │ │ + ldmia.w sp!, {r2, r4, r6, r7, sl, fp, ip, sp, pc} │ │ + movs r0, r0 │ │ + str r0, [r6, #96] @ 0x60 │ │ + @ instruction: 0xfff34e93 │ │ + vcvt.f16.u16 d27, d26, #13 │ │ + vrsubhn.i d21, , │ │ + vsri.64 d27, d16, #13 │ │ + movs r0, r0 │ │ + ldr r0, [r0, #4] │ │ + vaddl.u , d19, d19 │ │ + vqrdmlah.s , , d10[0] │ │ + @ instruction: 0xfff36eab │ │ + vrsra.u32 d27, d28, #13 │ │ movs r0, r0 │ │ - ldr r6, [pc, #676] @ (d3904 ) │ │ - @ instruction: 0xfff37ed2 │ │ + ldr r6, [pc, #940] @ (d3a1c ) │ │ + vcvt.f32.u32 d23, d1, #13 │ │ vsri.64 , q2, #13 │ │ - bmi.n d3612 │ │ - bmi.n d3614 │ │ - bmi.n d3616 │ │ - bmi.n d3618 │ │ - bmi.n d361a │ │ - ldr r7, [pc, #960] @ (d3a34 ) │ │ + bmi.n d3622 │ │ + bmi.n d3624 │ │ + bmi.n d3626 │ │ + bmi.n d3628 │ │ + bmi.n d362a │ │ + ldr r7, [pc, #960] @ (d3a44 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n d3b94 │ │ - beq.n d3704 │ │ - b.n d3b18 │ │ - add r0, pc, #0 @ (adr r0, d3680 ) │ │ - b.n d39c2 │ │ + b.n d3ba4 │ │ + beq.n d3714 │ │ + b.n d3b28 │ │ + add r0, pc, #0 @ (adr r0, d3690 ) │ │ + b.n d39d2 │ │ adds r0, #28 │ │ - b.n d31a0 │ │ + b.n d31b0 │ │ str r0, [r6, #16] │ │ - b.n d31fe │ │ + b.n d320e │ │ movs r0, #24 │ │ - b.n d31a8 │ │ + b.n d31b8 │ │ ands r2, r1 │ │ - b.n d39d2 │ │ + b.n d39e2 │ │ strh r4, [r2, #6] │ │ - b.n d3a2a │ │ - b.n d36a0 │ │ - b.n d30ce │ │ + b.n d3a3a │ │ + b.n d36b0 │ │ + b.n d30de │ │ movs r0, r0 │ │ - b.n d3d50 │ │ + b.n d3d60 │ │ adds r0, #8 │ │ - b.n d310a │ │ + b.n d311a │ │ movs r5, r2 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, r5] │ │ - b.n d31ca │ │ + b.n d31da │ │ movs r0, #6 │ │ - b.n d3754 │ │ + b.n d3764 │ │ movs r0, #8 │ │ - b.n d386e │ │ + b.n d387e │ │ movs r5, r0 │ │ cmp r2, #0 │ │ movs r1, #137 @ 0x89 │ │ - b.n d37c4 │ │ + b.n d37d4 │ │ stmia r0!, {r2} │ │ - b.n d30e2 │ │ + b.n d30f2 │ │ movs r0, #8 │ │ - b.n d30e6 │ │ + b.n d30f6 │ │ movs r0, #2 │ │ - b.n d3772 │ │ + b.n d3782 │ │ movs r0, #12 │ │ - b.n d387a │ │ + b.n d388a │ │ movs r5, r3 │ │ cmp r2, #0 │ │ strb r1, [r0, #0] │ │ - b.n d3b84 │ │ + b.n d3b94 │ │ strb r0, [r7, #4] │ │ - b.n d31d6 │ │ + b.n d31e6 │ │ adds r0, #6 │ │ movs r3, r4 │ │ movs r1, #135 @ 0x87 │ │ - b.n d3648 │ │ + b.n d3658 │ │ strb r0, [r1, #0] │ │ movs r6, r5 │ │ adds r0, #7 │ │ lsls r3, r2, #6 │ │ str r0, [sp, #16] │ │ - b.n d3214 │ │ + b.n d3224 │ │ movs r0, r3 │ │ subs r0, r0, r0 │ │ subs r7, #187 @ 0xbb │ │ - b.n d3c10 │ │ + b.n d3c20 │ │ lsrs r7, r5, #11 │ │ orn sl, r3, #6782976 @ 0x678000 │ │ orr.w r0, r4, #9699328 @ 0x940000 │ │ and.w r0, r0, r6, lsl #28 │ │ - b.n d37a8 │ │ + b.n d37b8 │ │ movs r0, #0 │ │ - b.n d3e46 │ │ + b.n d3e56 │ │ strb r0, [r1, #0] │ │ - b.n d38c6 │ │ + b.n d38d6 │ │ str r0, [sp, #0] │ │ - b.n d3e4e │ │ + b.n d3e5e │ │ lsls r5, r3, #2 │ │ cmp r2, #0 │ │ movs r0, #1 │ │ - b.n d3bc2 │ │ + b.n d3bd2 │ │ str r0, [sp, #0] │ │ - b.n d3caa │ │ + b.n d3cba │ │ strb r2, [r0, #0] │ │ - b.n d3764 │ │ + b.n d3774 │ │ str r1, [r1, #0] │ │ - b.n d377e │ │ + b.n d378e │ │ lsls r4, r0, #8 │ │ stmia.w sl, {r1, r2, ip, sp, lr} │ │ - b.n d3a58 │ │ + b.n d3a68 │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ cmp r7, #171 @ 0xab │ │ - b.n d3c50 │ │ + b.n d3c60 │ │ str r0, [sp, #56] @ 0x38 │ │ - b.n d3a76 │ │ + b.n d3a86 │ │ lsrs r7, r5, #11 │ │ orn r0, r2, #536576 @ 0x83000 │ │ - b.n d3a7e │ │ + b.n d3a8e │ │ lsrs r7, r1, #11 │ │ orr.w r0, r4, #8519680 @ 0x820000 │ │ and.w r0, r0, r1, lsl #8 │ │ - b.n d3bf6 │ │ + b.n d3c06 │ │ str r0, [sp, #0] │ │ - b.n d3cde │ │ + b.n d3cee │ │ lsls r4, r0, #8 │ │ stmia.w sl, {r0, r3, ip, sp} │ │ - b.n d3a7a │ │ + b.n d3a8a │ │ movs r0, #48 @ 0x30 │ │ - b.n d3274 │ │ + b.n d3284 │ │ str r0, [sp, #208] @ 0xd0 │ │ - b.n d3278 │ │ + b.n d3288 │ │ lsls r7, r0, #2 │ │ lsrs r0, r0, #8 │ │ strh r0, [r0, #0] │ │ - b.n d3aa6 │ │ + b.n d3ab6 │ │ lsls r0, r0, #1 │ │ - b.n d328a │ │ + b.n d329a │ │ lsls r0, r1, #1 │ │ - b.n d328e │ │ + b.n d329e │ │ str r4, [r1, #20] │ │ - b.n d3292 │ │ + b.n d32a2 │ │ adds r1, #72 @ 0x48 │ │ - b.n d3296 │ │ + b.n d32a6 │ │ stmia r1!, {r2, r3, r6} │ │ - b.n d329a │ │ + b.n d32aa │ │ str r0, [r1, r5] │ │ - b.n d329e │ │ + b.n d32ae │ │ strb r4, [r1, #0] │ │ - b.n d37ce │ │ + b.n d37de │ │ ands r5, r0 │ │ - b.n d37cc │ │ + b.n d37dc │ │ strb r7, [r0, #0] │ │ - b.n d3ab2 │ │ + b.n d3ac2 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ str r4, [r1, #0] │ │ - b.n d3ad2 │ │ + b.n d3ae2 │ │ adds r0, #5 │ │ - b.n d3ad6 │ │ - blx 4d4dd8 │ │ + b.n d3ae6 │ │ + blx 4d4de8 │ │ @ instruction: 0xfff5eaff │ │ movs r2, r0 │ │ - b.n d3848 │ │ + b.n d3858 │ │ movs r1, r1 │ │ - b.n d3952 │ │ + b.n d3962 │ │ lsls r7, r6, #1 │ │ subs r2, #0 │ │ lsrs r3, r3, #24 │ │ - b.n d3cbe │ │ + b.n d3cce │ │ adds r0, #9 │ │ - b.n d3af2 │ │ + b.n d3b02 │ │ str r1, [r0, #0] │ │ - b.n d3af6 │ │ + b.n d3b06 │ │ str r0, [r1, r0] │ │ - b.n d3afa │ │ + b.n d3b0a │ │ add r0, sp, #880 @ 0x370 │ │ @ instruction: 0xebff0000 │ │ - b.n d3e62 │ │ + b.n d3e72 │ │ movs r0, r6 │ │ subs r0, r0, r0 │ │ movs r0, r1 │ │ - b.n d3f0a │ │ + b.n d3f1a │ │ asrs r4, r0, #1 │ │ - b.n d32f8 │ │ + b.n d3308 │ │ adds r0, #28 │ │ - b.n d330c │ │ + b.n d331c │ │ strb r0, [r0, #0] │ │ - b.n d3f16 │ │ + b.n d3f26 │ │ movs r4, r5 │ │ - b.n d32f4 │ │ + b.n d3304 │ │ movs r0, r6 │ │ - b.n d3cf8 │ │ + b.n d3d08 │ │ movs r0, r5 │ │ - b.n d32fc │ │ + b.n d330c │ │ movs r4, r0 │ │ - b.n d3f26 │ │ + b.n d3f36 │ │ lsls r3, r0, #4 │ │ - b.n d38ea │ │ + b.n d38fa │ │ adds r0, #178 @ 0xb2 │ │ - b.n d3b90 │ │ + b.n d3ba0 │ │ movs r0, #160 @ 0xa0 │ │ - b.n d331c │ │ + b.n d332c │ │ asrs r4, r1, #32 │ │ - b.n d3318 │ │ + b.n d3328 │ │ str r0, [sp, #4] │ │ - b.n d3d00 │ │ + b.n d3d10 │ │ movs r4, r4 │ │ - b.n d3318 │ │ + b.n d3328 │ │ movs r1, r0 │ │ - b.n d3ab4 │ │ + b.n d3ac4 │ │ lsls r4, r1, #9 │ │ - b.n d3330 │ │ + b.n d3340 │ │ movs r0, #0 │ │ - b.n d332e │ │ + b.n d333e │ │ str r0, [sp, #8] │ │ movs r2, #131 @ 0x83 │ │ asrs r3, r0, #32 │ │ - b.n d3924 │ │ + b.n d3934 │ │ strb r0, [r4, #0] │ │ - b.n d3330 │ │ + b.n d3340 │ │ movs r0, r0 │ │ - b.n d391e │ │ + b.n d392e │ │ movs r1, r0 │ │ - b.n d3abe │ │ + b.n d3ace │ │ movs r3, r3 │ │ ldr r2, [sp, #0] │ │ adds r0, #16 │ │ - b.n d3e26 │ │ + b.n d3e36 │ │ lsls r0, r7, #2 │ │ - b.n d3d36 │ │ + b.n d3d46 │ │ asrs r0, r5, #32 │ │ - b.n d3d48 │ │ + b.n d3d58 │ │ movs r0, #32 │ │ - b.n d3d4c │ │ + b.n d3d5c │ │ adds r0, #1 │ │ - b.n d3eb6 │ │ + b.n d3ec6 │ │ hlt 0x0039 │ │ @ instruction: 0xebff0000 │ │ - b.n d3ede │ │ + b.n d3eee │ │ movs r1, r2 │ │ subs r0, r0, r0 │ │ movs r0, r4 │ │ - b.n d3380 │ │ + b.n d3390 │ │ lsls r0, r1 │ │ - b.n d3cde │ │ + b.n d3cee │ │ asrs r4, r4, #32 │ │ - b.n d3388 │ │ - lsls r7, r0, #27 │ │ - @ instruction: 0xfa0001d4 │ │ - b.n d3be2 │ │ + b.n d3398 │ │ + lsls r7, r6, #25 │ │ + @ instruction: 0xfb0001d4 │ │ + b.n d3bf2 │ │ lsls r0, r1, #2 │ │ ldmia.w r4, {r3, sp} │ │ - b.n d3386 │ │ + b.n d3396 │ │ str r4, [r1, r0] │ │ - b.n d338a │ │ + b.n d339a │ │ ands r0, r3 │ │ - b.n d33a0 │ │ + b.n d33b0 │ │ ands r4, r0 │ │ - b.n d396a │ │ + b.n d397a │ │ movs r4, r3 │ │ - b.n d33a8 │ │ + b.n d33b8 │ │ ands r4, r2 │ │ - b.n d337e │ │ + b.n d338e │ │ str r0, [sp, #0] │ │ - b.n d3978 │ │ + b.n d3988 │ │ asrs r3, r0, #32 │ │ - b.n d391e │ │ + b.n d392e │ │ movs r0, r0 │ │ - b.n d3fbe │ │ + b.n d3fce │ │ asrs r7, r0, #32 │ │ - b.n d3a2c │ │ + b.n d3a3c │ │ str r0, [sp, #96] @ 0x60 │ │ - b.n d3392 │ │ + b.n d33a2 │ │ movs r4, r3 │ │ cmp r2, #0 │ │ - beq.n d38c4 │ │ - b.n d3d24 │ │ + beq.n d38d4 │ │ + b.n d3d34 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, r2} │ │ - b.n d3bd6 │ │ + b.n d3be6 │ │ @ instruction: 0xfa7bebff │ │ asrs r0, r4, #2 │ │ - b.n d33c8 │ │ + b.n d33d8 │ │ movs r2, #76 @ 0x4c │ │ - b.n d33cc │ │ + b.n d33dc │ │ asrs r0, r0, #32 │ │ - b.n d33c8 │ │ + b.n d33d8 │ │ asrs r2, r0, #32 │ │ - b.n d39ac │ │ + b.n d39bc │ │ movs r1, r1 │ │ - b.n d3b50 │ │ + b.n d3b60 │ │ @ instruction: 0xffdb2aff │ │ movs r0, r0 │ │ - b.n d3f56 │ │ + b.n d3f66 │ │ @ instruction: 0xffd91aff │ │ lsls r0, r7 │ │ - b.n d3dca │ │ + b.n d3dda │ │ strb r4, [r4, #0] │ │ - b.n d3d58 │ │ + b.n d3d68 │ │ movs r7, r0 │ │ - b.n d3c06 │ │ + b.n d3c16 │ │ asrs r4, r0, #32 │ │ - b.n d3c0a │ │ + b.n d3c1a │ │ movs r0, #1 │ │ - b.n d400e │ │ + b.n d401e │ │ adds r0, #3 │ │ - b.n d4012 │ │ + b.n d4022 │ │ ldr r4, [sp, #196] @ 0xc4 │ │ @ instruction: 0xebff00a0 │ │ - b.n d3404 │ │ + b.n d3414 │ │ asrs r4, r1, #9 │ │ - b.n d3408 │ │ + b.n d3418 │ │ movs r0, r0 │ │ - b.n d3402 │ │ + b.n d3412 │ │ movs r1, r0 │ │ - b.n d39e6 │ │ + b.n d39f6 │ │ movs r1, r1 │ │ - b.n d3b8a │ │ + b.n d3b9a │ │ @ instruction: 0xffcc2aff │ │ movs r0, r4 │ │ - b.n d3328 │ │ + b.n d3338 │ │ movs r0, r0 │ │ - b.n d3f96 │ │ + b.n d3fa6 │ │ @ instruction: 0xfff10aff │ │ @ instruction: 0xffc8eaff │ │ lsls r0, r7, #3 │ │ - b.n d3440 │ │ + b.n d3450 │ │ movs r0, r0 │ │ - b.n d3a24 │ │ + b.n d3a34 │ │ asrs r2, r3, #1 │ │ - b.n d34aa │ │ + b.n d34ba │ │ movs r0, r0 │ │ - b.n d40ce │ │ + b.n d40de │ │ movs r3, r0 │ │ - b.n d3fb4 │ │ + b.n d3fc4 │ │ @ instruction: 0xffdc3aff │ │ lsls r4, r0, #3 │ │ - b.n d3446 │ │ + b.n d3456 │ │ str r3, [r0, #0] │ │ - b.n d39a2 │ │ + b.n d39b2 │ │ asrs r0, r4, #2 │ │ - b.n d3452 │ │ + b.n d3462 │ │ movs r3, #209 @ 0xd1 │ │ - b.n d3f26 │ │ + b.n d3f36 │ │ strb r0, [r7, #2] │ │ - b.n d345a │ │ + b.n d346a │ │ lsls r0, r0, #1 │ │ - b.n d344e │ │ - b.n d3930 │ │ - b.n d3454 │ │ + b.n d345e │ │ + b.n d3940 │ │ + b.n d3464 │ │ strb r6, [r0, #0] │ │ - b.n d3a44 │ │ + b.n d3a54 │ │ stmia r0!, {r2, r6, r7} │ │ - b.n d3478 │ │ + b.n d3488 │ │ asrs r4, r0, #3 │ │ - b.n d347c │ │ + b.n d348c │ │ movs r4, r0 │ │ - b.n d3462 │ │ + b.n d3472 │ │ stmia r0!, {r2, r3} │ │ - b.n d3a64 │ │ + b.n d3a74 │ │ str r4, [r7, r2] │ │ - b.n d3488 │ │ + b.n d3498 │ │ asrs r1, r0, #32 │ │ - b.n d3a6c │ │ + b.n d3a7c │ │ adds r0, #184 @ 0xb8 │ │ - b.n d3490 │ │ + b.n d34a0 │ │ lsls r1, r0, #12 │ │ - b.n d3f76 │ │ + b.n d3f86 │ │ str r5, [r0, r0] │ │ - b.n d3a78 │ │ + b.n d3a88 │ │ movs r0, r1 │ │ - b.n d3e78 │ │ + b.n d3e88 │ │ adds r0, #3 │ │ - b.n d3a80 │ │ + b.n d3a90 │ │ str r4, [r1, r0] │ │ lsls r0, r4, #6 │ │ tst r0, r2 │ │ stmia.w r0, {r0, r1} │ │ - b.n d40ae │ │ + b.n d40be │ │ lsls r0, r4, #2 │ │ - stmia.w sp, {r2, r3, r5, r9, sl, fp, ip} │ │ + stmia.w sp, {r0, r1, r3, r5, r9, sl, fp, ip} │ │ @ instruction: 0xebff0000 │ │ - b.n d413a │ │ - beq.n d39b4 │ │ - b.n d3e14 │ │ + b.n d414a │ │ + beq.n d39c4 │ │ + b.n d3e24 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {sp} │ │ - b.n d40c6 │ │ + b.n d40d6 │ │ str r0, [sp, #0] │ │ - b.n d40ca │ │ + b.n d40da │ │ lsls r0, r4, #1 │ │ - b.n d34cc │ │ + b.n d34dc │ │ movs r0, r0 │ │ - b.n d3ab0 │ │ + b.n d3ac0 │ │ asrs r2, r3, #1 │ │ - b.n d3536 │ │ + b.n d3546 │ │ lsls r5, r0, #31 │ │ - b.n d3faa │ │ + b.n d3fba │ │ lsrs r7, r7, #31 │ │ - b.n d403c │ │ + b.n d404c │ │ movs r0, r0 │ │ - b.n d4044 │ │ + b.n d4054 │ │ @ instruction: 0xffb80aff │ │ asrs r0, r1, #1 │ │ - b.n d34e8 │ │ + b.n d34f8 │ │ ands r0, r0 │ │ - b.n d3cee │ │ + b.n d3cfe │ │ adds r0, #68 @ 0x44 │ │ - b.n d34f0 │ │ + b.n d3500 │ │ movs r1, r0 │ │ - b.n d40f6 │ │ + b.n d4106 │ │ asrs r1, r0, #32 │ │ - b.n d3ad8 │ │ + b.n d3ae8 │ │ lsls r4, r0, #8 │ │ stmia.w sp, {r0, r1, ip, sp} │ │ - b.n d3ae0 │ │ + b.n d3af0 │ │ movs r3, #186 @ 0xba │ │ - b.n d3fc6 │ │ - subs r7, r2, #0 │ │ + b.n d3fd6 │ │ + subs r6, r2, #0 │ │ @ instruction: 0xebff0004 │ │ - b.n d3d0e │ │ - beq.n d3a08 │ │ - b.n d3e68 │ │ + b.n d3d1e │ │ + beq.n d3a18 │ │ + b.n d3e78 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {ip, sp, lr, pc} │ │ - b.n d401a │ │ - blx 4d401c │ │ - blx 4d4020 │ │ + b.n d402a │ │ + blx 4d402c │ │ + blx 4d4030 │ │ @ instruction: 0xffffffff │ │ @ instruction: 0xffffffff │ │ ... │ │ - add r6, sp, #752 @ 0x2f0 │ │ + add r6, sp, #816 @ 0x330 │ │ movs r0, r0 │ │ - ldr r2, [r3, #4] │ │ - vraddhn.i d28, , q3 │ │ - vqrdmlsh.s q13, , d8[0] │ │ + ldr r7, [r5, #16] │ │ + vmls.i q14, , d6[0] │ │ + vcvt.u32.f32 q13, q4, #13 │ │ movs r0, r0 │ │ - str r5, [r0, #32] │ │ - vtbx.8 d22, {d19}, d6 │ │ - @ instruction: 0xfff3b763 │ │ - vsra.u64 q11, q9, #13 │ │ + str r0, [r3, #44] @ 0x2c │ │ + @ instruction: 0xfff3699b │ │ + vtbx.8 d27, {d19}, d18 │ │ + vmlal.u q11, d19, d5[0] │ │ @ instruction: 0xfff34ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n d3f34 │ │ - beq.n d3a2c │ │ - b.n d3eb8 │ │ + b.n d3f44 │ │ + beq.n d3a3c │ │ + b.n d3ec8 │ │ str r0, [sp, #0] │ │ - b.n d3542 │ │ + b.n d3552 │ │ strh r0, [r0, #0] │ │ - b.n d4166 │ │ + b.n d4176 │ │ asrs r0, r0, #17 │ │ @ instruction: 0xe9907000 │ │ - b.n d416e │ │ + b.n d417e │ │ ands r2, r1 │ │ - b.n d3ae4 │ │ - b.n d3a44 │ │ - b.n d356c │ │ + b.n d3af4 │ │ + b.n d3a54 │ │ + b.n d357c │ │ ands r4, r1 │ │ - b.n d3be6 │ │ + b.n d3bf6 │ │ movs r2, r5 │ │ cmp r2, #0 │ │ str r0, [r2, r0] │ │ - b.n d3562 │ │ + b.n d3572 │ │ movs r0, r0 │ │ - b.n d40f0 │ │ + b.n d4100 │ │ movs r7, r4 │ │ lsrs r0, r0, #8 │ │ - b.n d3a7c │ │ - b.n d356e │ │ + b.n d3a8c │ │ + b.n d357e │ │ stmia r0!, {r2} │ │ - b.n d356c │ │ + b.n d357c │ │ stmia r0!, {r2} │ │ - b.n d4216 │ │ - b.n d3a58 │ │ - b.n d3574 │ │ + b.n d4226 │ │ + b.n d3a68 │ │ + b.n d3584 │ │ asrs r5, r0 │ │ - b.n d3a76 │ │ + b.n d3a86 │ │ strb r6, [r1, #0] │ │ - b.n d3da2 │ │ + b.n d3db2 │ │ strh r1, [r0, #0] │ │ - b.n d3f70 │ │ + b.n d3f80 │ │ ands r4, r0 │ │ - b.n d39d8 │ │ + b.n d39e8 │ │ str r0, [r5, r2] │ │ - b.n d3dae │ │ + b.n d3dbe │ │ asrs r4, r0, #32 │ │ - b.n d35a0 │ │ + b.n d35b0 │ │ ands r1, r1 │ │ - b.n d3b1e │ │ + b.n d3b2e │ │ asrs r6, r0, #32 │ │ - b.n d3c1c │ │ - b.n d3a8a │ │ + b.n d3c2c │ │ + b.n d3a9a │ │ adds r1, #160 @ 0xa0 │ │ movs r5, r0 │ │ - b.n d4132 │ │ + b.n d4142 │ │ @ instruction: 0xfff48aff │ │ movs r4, r0 │ │ - b.n d413a │ │ + b.n d414a │ │ movs r7, r0 │ │ subs r2, #0 │ │ lsrs r0, r2 │ │ - b.n d3e2e │ │ + b.n d3e3e │ │ asrs r0, r0, #32 │ │ - b.n d41d6 │ │ + b.n d41e6 │ │ strb r1, [r1, #0] │ │ - b.n d3b42 │ │ + b.n d3b52 │ │ strb r6, [r0, #0] │ │ - b.n d3c48 │ │ + b.n d3c58 │ │ asrs r0, r4, #32 │ │ ldmia.w sp, {r0, ip} │ │ adds r3, #0 │ │ - b.n d3daa │ │ - b.n d3bc6 │ │ + b.n d3dba │ │ + b.n d3bd6 │ │ movs r3, r0 │ │ and.w r0, r0, r0, lsl #16 │ │ - b.n d41f2 │ │ + b.n d4202 │ │ movs r2, r0 │ │ - b.n d4166 │ │ + b.n d4176 │ │ asrs r0, r4, #32 │ │ ldmia.w sp, {r0, r2} │ │ subs r2, #0 │ │ strh r0, [r0, #0] │ │ - b.n d35fe │ │ + b.n d360e │ │ ands r0, r0 │ │ - b.n d4206 │ │ + b.n d4216 │ │ asrs r4, r0, #32 │ │ - b.n d3606 │ │ + b.n d3616 │ │ strb r1, [r1, #0] │ │ - b.n d3b7e │ │ + b.n d3b8e │ │ asrs r6, r0, #32 │ │ - b.n d3c74 │ │ + b.n d3c84 │ │ ands r1, r0 │ │ adds r3, #0 │ │ asrs r4, r0, #6 │ │ - b.n d3bf6 │ │ - b.n d3aec │ │ - b.n d3614 │ │ + b.n d3c06 │ │ + b.n d3afc │ │ + b.n d3624 │ │ asrs r5, r0, #32 │ │ - b.n d3b64 │ │ + b.n d3b74 │ │ strh r0, [r0, #0] │ │ - b.n d4226 │ │ + b.n d4236 │ │ strb r1, [r0, #7] │ │ - b.n d3e2a │ │ + b.n d3e3a │ │ asrs r1, r1, #32 │ │ - b.n d3b92 │ │ + b.n d3ba2 │ │ lsls r1, r0, #4 │ │ stmia.w lr, {r1, r2, ip} │ │ - b.n d3c9c │ │ + b.n d3cac │ │ strb r0, [r1, #0] │ │ - b.n d3616 │ │ + b.n d3626 │ │ movs r7, r0 │ │ subs r2, #0 │ │ asrs r2, r1, #32 │ │ - b.n d3ba6 │ │ + b.n d3bb6 │ │ asrs r4, r1, #32 │ │ - b.n d3cac │ │ + b.n d3cbc │ │ movs r2, r0 │ │ cmp r2, #0 │ │ movs r1, r1 │ │ - b.n d3b92 │ │ + b.n d3ba2 │ │ movs r0, r0 │ │ - b.n d3c20 │ │ + b.n d3c30 │ │ movs r6, r4 │ │ @ instruction: 0xea008009 │ │ - b.n d3bae │ │ + b.n d3bbe │ │ strh r4, [r0, #0] │ │ - b.n d363a │ │ + b.n d364a │ │ ands r0, r2 │ │ - b.n d3642 │ │ + b.n d3652 │ │ movs r0, r0 │ │ - b.n d41ce │ │ + b.n d41de │ │ movs r2, r4 │ │ lsrs r0, r0, #8 │ │ stmia r0!, {r3, r4} │ │ - b.n d364e │ │ + b.n d365e │ │ str r4, [r0, r0] │ │ - b.n d42f2 │ │ + b.n d4302 │ │ movs r4, r1 │ │ - b.n d3e76 │ │ + b.n d3e86 │ │ strb r4, [r0, #4] │ │ - b.n d3b44 │ │ + b.n d3b54 │ │ asrs r0, r0, #32 │ │ - b.n d3e7e │ │ + b.n d3e8e │ │ strb r7, [r0, #0] │ │ - b.n d3aa4 │ │ + b.n d3ab4 │ │ str r4, [r0, #0] │ │ - b.n d3668 │ │ + b.n d3678 │ │ strb r2, [r0, #0] │ │ - b.n d3bf8 │ │ + b.n d3c08 │ │ strb r3, [r0, #0] │ │ - b.n d3cfa │ │ + b.n d3d0a │ │ str r1, [r0, #0] │ │ - b.n d405a │ │ + b.n d406a │ │ movs r1, r0 │ │ adds r1, #160 @ 0xa0 │ │ movs r5, r0 │ │ - b.n d4206 │ │ + b.n d4216 │ │ lsls r6, r4 │ │ - b.n d3e9e │ │ + b.n d3eae │ │ @ instruction: 0xfff48aff │ │ movs r4, r0 │ │ - b.n d4212 │ │ + b.n d4222 │ │ movs r6, r0 │ │ subs r2, #0 │ │ lsrs r0, r2 │ │ - b.n d3eee │ │ + b.n d3efe │ │ asrs r0, r0, #32 │ │ - b.n d42b2 │ │ + b.n d42c2 │ │ strb r2, [r0, #0] │ │ - b.n d3c1e │ │ + b.n d3c2e │ │ strb r3, [r0, #0] │ │ - b.n d3d24 │ │ + b.n d3d34 │ │ asrs r1, r0, #32 │ │ adds r3, #0 │ │ lsls r1, r0, #6 │ │ - b.n d3c82 │ │ + b.n d3c92 │ │ movs r2, r0 │ │ and.w r0, r0, r0, lsl #16 │ │ - b.n d42ca │ │ + b.n d42da │ │ movs r2, r0 │ │ - b.n d423a │ │ + b.n d424a │ │ movs r4, r0 │ │ subs r2, #0 │ │ str r0, [r2, #12] │ │ - b.n d3f16 │ │ + b.n d3f26 │ │ ands r0, r0 │ │ - b.n d42da │ │ + b.n d42ea │ │ asrs r2, r0, #32 │ │ - b.n d3c4a │ │ + b.n d3c5a │ │ asrs r3, r0, #32 │ │ - b.n d3d50 │ │ + b.n d3d60 │ │ ands r1, r0 │ │ adds r3, #0 │ │ lsls r4, r0, #6 │ │ - b.n d3caa │ │ + b.n d3cba │ │ movs r4, r1 │ │ - b.n d3c2e │ │ + b.n d3c3e │ │ lsls r0, r0, #7 │ │ - b.n d3cc2 │ │ + b.n d3cd2 │ │ movs r4, r0 │ │ - b.n d36d2 │ │ - beq.n d3bf0 │ │ - b.n d4050 │ │ + b.n d36e2 │ │ + beq.n d3c00 │ │ + b.n d4060 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r4, r6, r7, sl, ip, lr, pc} │ │ - bmi.n d3b6a │ │ - ldr r7, [pc, #960] @ (d3f84 ) │ │ + bmi.n d3b7a │ │ + ldr r7, [pc, #960] @ (d3f94 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n d40e4 │ │ - beq.n d3c24 │ │ - b.n d4068 │ │ + b.n d40f4 │ │ + beq.n d3c34 │ │ + b.n d4078 │ │ str r0, [sp, #0] │ │ - b.n d36f4 │ │ + b.n d3704 │ │ movs r0, r6 │ │ ldmia.w r9, {r3, ip, sp} │ │ - b.n d370c │ │ + b.n d371c │ │ str r4, [r1, #0] │ │ - b.n d3710 │ │ + b.n d3720 │ │ movs r0, #4 │ │ - b.n d3c88 │ │ + b.n d3c98 │ │ movs r0, #5 │ │ - b.n d3d92 │ │ + b.n d3da2 │ │ movs r7, r0 │ │ cmp r2, #0 │ │ str r4, [r0, #0] │ │ - b.n d40f0 │ │ + b.n d4100 │ │ subs r3, r3, #7 │ │ - b.n d4110 │ │ + b.n d4120 │ │ lsrs r7, r5, #11 │ │ orn r0, r1, #2097152 @ 0x200000 │ │ - b.n d433a │ │ + b.n d434a │ │ asrs r0, r0, #32 │ │ - b.n d370a │ │ + b.n d371a │ │ lsrs r7, r1, #11 │ │ - bl ff113c3a │ │ - b.n d409c │ │ + bl ff113c4a │ │ + b.n d40ac │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r5} │ │ - b.n d3728 │ │ + b.n d3738 │ │ movs r1, r0 │ │ - b.n d3f52 │ │ + b.n d3f62 │ │ strh r0, [r2, #0] │ │ - b.n d3748 │ │ + b.n d3758 │ │ movs r0, #4 │ │ - b.n d3ca0 │ │ + b.n d3cb0 │ │ strb r4, [r0, #0] │ │ - b.n d377e │ │ + b.n d378e │ │ stmia r0!, {r1} │ │ - b.n d3d32 │ │ + b.n d3d42 │ │ movs r0, #32 │ │ - b.n d363c │ │ + b.n d364c │ │ movs r4, r1 │ │ - b.n d3ed8 │ │ + b.n d3ee8 │ │ lsls r2, r5, #2 │ │ cmp r2, #0 │ │ movs r0, r0 │ │ - b.n d42e2 │ │ + b.n d42f2 │ │ lsls r1, r0, #1 │ │ lsrs r0, r0, #8 │ │ str r0, [r3, r0] │ │ - b.n d3754 │ │ + b.n d3764 │ │ movs r4, r1 │ │ - b.n d3758 │ │ + b.n d3768 │ │ str r0, [r1, r0] │ │ - b.n d3764 │ │ + b.n d3774 │ │ movs r0, r4 │ │ - b.n d367c │ │ + b.n d368c │ │ movs r0, #32 │ │ - b.n d3784 │ │ - b.n d3c4e │ │ - b.n d40d8 │ │ + b.n d3794 │ │ + b.n d3c5e │ │ + b.n d40e8 │ │ str r0, [r0, #0] │ │ - b.n d376c │ │ + b.n d377c │ │ str r0, [r0, #0] │ │ - b.n d3d60 │ │ + b.n d3d70 │ │ movs r4, r1 │ │ - b.n d3f16 │ │ + b.n d3f26 │ │ movs r0, r1 │ │ - b.n d4162 │ │ + b.n d4172 │ │ movs r0, r2 │ │ - b.n d377c │ │ + b.n d378c │ │ str r4, [r4, #0] │ │ - b.n d3780 │ │ + b.n d3790 │ │ ands r4, r3 │ │ - b.n d3784 │ │ + b.n d3794 │ │ adds r0, #4 │ │ - b.n d3788 │ │ + b.n d3798 │ │ movs r1, r7 │ │ cmp r2, #0 │ │ adds r0, #16 │ │ - b.n d37b0 │ │ + b.n d37c0 │ │ strh r7, [r0, #0] │ │ - b.n d3fba │ │ + b.n d3fca │ │ movs r4, r1 │ │ and.w r0, r0, r8, lsr #32 │ │ - b.n d37b4 │ │ + b.n d37c4 │ │ strh r6, [r1, #0] │ │ - b.n d3fc6 │ │ + b.n d3fd6 │ │ asrs r0, r3, #32 │ │ - b.n d37c4 │ │ - add r1, pc, #568 @ (adr r1, d3ec4 ) │ │ - b.n d3d8e │ │ + b.n d37d4 │ │ + add r1, pc, #568 @ (adr r1, d3ed4 ) │ │ + b.n d3d9e │ │ movs r4, r3 │ │ - b.n d37cc │ │ + b.n d37dc │ │ lsls r0, r2, #2 │ │ ldmia.w sl, {r0, lr} │ │ - b.n d41c2 │ │ + b.n d41d2 │ │ lsls r0, r6, #3 │ │ - b.n d4024 │ │ + b.n d4034 │ │ strb r0, [r0, #0] │ │ - b.n d41f0 │ │ + b.n d4200 │ │ movs r0, r0 │ │ - b.n d3d4e │ │ + b.n d3d5e │ │ movs r1, r0 │ │ - b.n d3e58 │ │ + b.n d3e68 │ │ lsls r0, r2, #2 │ │ stmia.w r2, {r0, r1, r2, r3, r4, r6} │ │ subs r2, #0 │ │ strb r1, [r0, #0] │ │ - b.n d4146 │ │ + b.n d4156 │ │ movs r5, r0 │ │ - b.n d3f6a │ │ + b.n d3f7a │ │ movs r1, r1 │ │ cmp r2, #0 │ │ ands r0, r3 │ │ - b.n d37f4 │ │ + b.n d3804 │ │ movs r5, r0 │ │ - b.n d3f74 │ │ + b.n d3f84 │ │ asrs r4, r0, #32 │ │ - b.n d400a │ │ + b.n d401a │ │ lsls r0, r1, #6 │ │ - b.n d3c30 │ │ + b.n d3c40 │ │ asrs r4, r0, #32 │ │ - b.n d37f4 │ │ + b.n d3804 │ │ lsls r5, r3, #1 │ │ lsrs r0, r0, #8 │ │ movs r4, r1 │ │ - b.n d3f88 │ │ + b.n d3f98 │ │ lsls r0, r3, #1 │ │ cmp r2, #0 │ │ - add r1, pc, #540 @ (adr r1, d3efc ) │ │ - b.n d3dea │ │ + add r1, pc, #540 @ (adr r1, d3f0c ) │ │ + b.n d3dfa │ │ movs r3, r2 │ │ and.w r0, r0, r6 │ │ - b.n d3f9a │ │ + b.n d3faa │ │ @ instruction: 0xffe33aff │ │ movs r4, r1 │ │ - b.n d3fa2 │ │ + b.n d3fb2 │ │ movs r0, r0 │ │ - b.n d44b6 │ │ + b.n d44c6 │ │ asrs r1, r0, #32 │ │ - b.n d44ba │ │ + b.n d44ca │ │ movs r4, r0 │ │ cmp r2, #0 │ │ movs r0, r4 │ │ - b.n d3738 │ │ + b.n d3748 │ │ asrs r0, r3, #32 │ │ - b.n d3838 │ │ + b.n d3848 │ │ movs r0, r0 │ │ - b.n d3d9a │ │ + b.n d3daa │ │ lsls r0, r0, #6 │ │ - b.n d3c70 │ │ + b.n d3c80 │ │ asrs r4, r0, #32 │ │ - b.n d3834 │ │ + b.n d3844 │ │ movs r4, r1 │ │ - b.n d3fc4 │ │ + b.n d3fd4 │ │ lsls r1, r1, #1 │ │ cmp r2, #0 │ │ movs r6, r0 │ │ - b.n d3fce │ │ + b.n d3fde │ │ lsls r0, r3, #1 │ │ lsrs r0, r0, #8 │ │ str r0, [r4, #0] │ │ - b.n d375c │ │ + b.n d376c │ │ ands r0, r3 │ │ - b.n d385c │ │ + b.n d386c │ │ str r6, [r0, #0] │ │ - b.n d3dbc │ │ - add r1, pc, #536 @ (adr r1, d3f48 ) │ │ - b.n d3e3a │ │ + b.n d3dcc │ │ + add r1, pc, #536 @ (adr r1, d3f58 ) │ │ + b.n d3e4a │ │ str r4, [r4, #0] │ │ - b.n d3870 │ │ + b.n d3880 │ │ strh r7, [r0, #0] │ │ - b.n d407a │ │ + b.n d408a │ │ @ instruction: 0xffd4eaff │ │ movs r0, #0 │ │ - b.n d4482 │ │ + b.n d4492 │ │ asrs r1, r0, #32 │ │ - b.n d4486 │ │ + b.n d4496 │ │ movs r0, #0 │ │ - b.n d384a │ │ + b.n d385a │ │ movs r0, r4 │ │ - b.n d3888 │ │ + b.n d3898 │ │ movs r6, r6 │ │ stmia.w r0, {r2, r3, r4, ip, lr, pc} │ │ - b.n d41ec │ │ + b.n d41fc │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r7, r8} │ │ - b.n d409e │ │ - b.n d406e │ │ - b.n d40a2 │ │ + b.n d40ae │ │ + b.n d407e │ │ + b.n d40b2 │ │ lsls r3, r0, #6 │ │ - b.n d3de6 │ │ + b.n d3df6 │ │ movs r0, r1 │ │ - b.n d3884 │ │ + b.n d3894 │ │ movs r1, r0 │ │ - b.n d4278 │ │ + b.n d4288 │ │ movs r4, r2 │ │ - b.n d388c │ │ + b.n d389c │ │ adds r0, #16 │ │ - b.n d38b0 │ │ - add r0, pc, #80 @ (adr r0, d3dc8 ) │ │ - b.n d38b4 │ │ + b.n d38c0 │ │ + add r0, pc, #80 @ (adr r0, d3dd8 ) │ │ + b.n d38c4 │ │ movs r3, r1 │ │ and.w r0, r0, lr, lsl #16 │ │ - b.n d3e8a │ │ + b.n d3e9a │ │ strb r0, [r1, #0] │ │ - b.n d420e │ │ + b.n d421e │ │ lsls r0, r2, #2 │ │ ldmia.w r7, {r3, sp, lr, pc} │ │ - b.n d422a │ │ + b.n d423a │ │ ands r1, r0 │ │ - b.n d42ba │ │ + b.n d42ca │ │ lsls r0, r6, #3 │ │ - b.n d411c │ │ + b.n d412c │ │ strb r0, [r0, #0] │ │ - b.n d42e8 │ │ + b.n d42f8 │ │ movs r0, r0 │ │ - b.n d3e46 │ │ + b.n d3e56 │ │ lsls r0, r2, #2 │ │ stmia.w r2, {r0} │ │ - b.n d3f54 │ │ + b.n d3f64 │ │ strb r0, [r1, #0] │ │ - b.n d40ea │ │ + b.n d40fa │ │ movs r0, r4 │ │ subs r2, #0 │ │ strh r1, [r0, #0] │ │ - b.n d4240 │ │ + b.n d4250 │ │ movs r5, r0 │ │ - b.n d4064 │ │ + b.n d4074 │ │ movs r0, r1 │ │ cmp r2, #0 │ │ ands r0, r3 │ │ - b.n d38f0 │ │ + b.n d3900 │ │ movs r7, r0 │ │ - b.n d4076 │ │ + b.n d4086 │ │ asrs r4, r0, #32 │ │ - b.n d4106 │ │ + b.n d4116 │ │ movs r6, r1 │ │ - b.n d3d2c │ │ + b.n d3d3c │ │ asrs r4, r0, #32 │ │ - b.n d38f0 │ │ + b.n d3900 │ │ movs r6, r3 │ │ lsrs r0, r0, #8 │ │ movs r4, r1 │ │ - b.n d4086 │ │ + b.n d4096 │ │ @ instruction: 0xffe83aff │ │ movs r0, r3 │ │ and.w r0, r0, r6 │ │ - b.n d4090 │ │ + b.n d40a0 │ │ movs r0, r6 │ │ subs r2, #0 │ │ movs r4, r1 │ │ - b.n d4098 │ │ + b.n d40a8 │ │ movs r0, r0 │ │ - b.n d45ae │ │ + b.n d45be │ │ asrs r1, r0, #32 │ │ - b.n d45b2 │ │ + b.n d45c2 │ │ movs r4, r0 │ │ cmp r2, #0 │ │ movs r0, r3 │ │ - b.n d392c │ │ + b.n d393c │ │ asrs r0, r1, #32 │ │ - b.n d3938 │ │ + b.n d3948 │ │ asrs r1, r0, #32 │ │ - b.n d3f02 │ │ + b.n d3f12 │ │ movs r6, r1 │ │ - b.n d3d68 │ │ + b.n d3d78 │ │ asrs r4, r0, #32 │ │ - b.n d392c │ │ + b.n d393c │ │ movs r4, r1 │ │ - b.n d40be │ │ + b.n d40ce │ │ movs r3, r1 │ │ cmp r2, #0 │ │ movs r7, r0 │ │ - b.n d40c2 │ │ + b.n d40d2 │ │ movs r2, r3 │ │ lsrs r0, r0, #8 │ │ str r0, [r4, #0] │ │ - b.n d3854 │ │ + b.n d3864 │ │ ands r0, r3 │ │ - b.n d3954 │ │ + b.n d3964 │ │ str r6, [r0, #0] │ │ - b.n d3eb6 │ │ + b.n d3ec6 │ │ strb r6, [r0, #6] │ │ - b.n d3f32 │ │ + b.n d3f42 │ │ str r4, [r4, #0] │ │ - b.n d3968 │ │ + b.n d3978 │ │ @ instruction: 0xffd4eaff │ │ movs r4, r1 │ │ - b.n d3970 │ │ + b.n d3980 │ │ strh r0, [r0, #0] │ │ - b.n d393a │ │ - beq.n d3e74 │ │ - b.n d42d4 │ │ + b.n d394a │ │ + beq.n d3e84 │ │ + b.n d42e4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {sp} │ │ - b.n d4186 │ │ + b.n d4196 │ │ adds r0, #1 │ │ - b.n d418a │ │ + b.n d419a │ │ movs r0, r3 │ │ and.w r0, r0, r0, lsr #28 │ │ - b.n d398c │ │ + b.n d399c │ │ movs r1, r0 │ │ - b.n d4376 │ │ - add r0, pc, #112 @ (adr r0, d3ec8 ) │ │ - b.n d3994 │ │ + b.n d4386 │ │ + add r0, pc, #112 @ (adr r0, d3ed8 ) │ │ + b.n d39a4 │ │ asrs r0, r0, #32 │ │ - b.n d43a0 │ │ + b.n d43b0 │ │ adds r0, #24 │ │ - b.n d399c │ │ - add r0, pc, #0 @ (adr r0, d3e64 ) │ │ - b.n d3974 │ │ + b.n d39ac │ │ + add r0, pc, #0 @ (adr r0, d3e74 ) │ │ + b.n d3984 │ │ adds r0, #4 │ │ - b.n d3978 │ │ + b.n d3988 │ │ adds r0, #32 │ │ - b.n d39a8 │ │ + b.n d39b8 │ │ movs r0, #12 │ │ - b.n d39ac │ │ + b.n d39bc │ │ lsls r0, r6, #3 │ │ - b.n d41fc │ │ + b.n d420c │ │ movs r1, r0 │ │ - b.n d4306 │ │ + b.n d4316 │ │ movs r0, r0 │ │ - b.n d3982 │ │ - beq.n d3eb8 │ │ - b.n d4318 │ │ + b.n d3992 │ │ + beq.n d3ec8 │ │ + b.n d4328 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, sp} │ │ - b.n d39c4 │ │ + b.n d39d4 │ │ lsls r0, r6, #3 │ │ - b.n d4214 │ │ + b.n d4224 │ │ asrs r0, r0, #32 │ │ - b.n d39cc │ │ + b.n d39dc │ │ str r0, [r0, r0] │ │ - b.n d399a │ │ + b.n d39aa │ │ movs r0, #32 │ │ - b.n d39d4 │ │ + b.n d39e4 │ │ movs r4, r0 │ │ - b.n d39d8 │ │ + b.n d39e8 │ │ lsls r0, r6, #3 │ │ - b.n d4226 │ │ - beq.n d3edc │ │ - b.n d433c │ │ + b.n d4236 │ │ + beq.n d3eec │ │ + b.n d434c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, r4, sp} │ │ - b.n d39e8 │ │ + b.n d39f8 │ │ adds r0, #24 │ │ - b.n d39ec │ │ + b.n d39fc │ │ strb r0, [r4, #0] │ │ - b.n d39f0 │ │ + b.n d3a00 │ │ asrs r0, r0, #32 │ │ - b.n d45fa │ │ + b.n d460a │ │ movs r1, r0 │ │ - b.n d45fe │ │ + b.n d460e │ │ lsls r0, r6, #3 │ │ - b.n d4250 │ │ + b.n d4260 │ │ movs r4, r1 │ │ - b.n d3a00 │ │ + b.n d3a10 │ │ asrs r0, r0, #32 │ │ - b.n d39ca │ │ + b.n d39da │ │ movs r0, r2 │ │ - b.n d3a08 │ │ + b.n d3a18 │ │ movs r0, #240 @ 0xf0 │ │ - b.n d4252 │ │ - beq.n d3f0c │ │ - b.n d436c │ │ + b.n d4262 │ │ + beq.n d3f1c │ │ + b.n d437c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, r2, sp, lr, pc} │ │ - b.n d421e │ │ + b.n d422e │ │ str r0, [r0, #0] │ │ - b.n d4222 │ │ + b.n d4232 │ │ movs r0, r0 │ │ - b.n d459e │ │ + b.n d45ae │ │ movs r7, r1 │ │ lsrs r0, r0, #8 │ │ movs r4, r1 │ │ - b.n d419c │ │ + b.n d41ac │ │ movs r7, r1 │ │ subs r0, r0, r0 │ │ movs r6, r0 │ │ - b.n d4236 │ │ + b.n d4246 │ │ movs r0, r0 │ │ - b.n d45aa │ │ + b.n d45ba │ │ str r6, [r1, #0] │ │ - b.n d423e │ │ + b.n d424e │ │ vpmin.u8 , q14, │ │ movs r0, #0 │ │ - b.n d4646 │ │ + b.n d4656 │ │ strb r1, [r0, #0] │ │ - b.n d46ca │ │ + b.n d46da │ │ movs r0, #0 │ │ - b.n d3a0e │ │ + b.n d3a1e │ │ asrs r0, r0, #32 │ │ - b.n d46d2 │ │ + b.n d46e2 │ │ movs r0, r4 │ │ - b.n d3a50 │ │ + b.n d3a60 │ │ lsls r0, r1, #1 │ │ stmia.w r0, {r3, ip} │ │ - b.n d3a1e │ │ + b.n d3a2e │ │ strb r4, [r1, #0] │ │ - b.n d3a22 │ │ - beq.n d3f5c │ │ - b.n d43bc │ │ + b.n d3a32 │ │ + beq.n d3f6c │ │ + b.n d43cc │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r5} │ │ - b.n d3a68 │ │ + b.n d3a78 │ │ vpmin.u32 q7, q15, │ │ movs r0, r3 │ │ - b.n d4454 │ │ + b.n d4464 │ │ lsrs r7, r5, #11 │ │ orn r0, r0, #8388608 @ 0x800000 │ │ - b.n d467e │ │ + b.n d468e │ │ movs r0, r0 │ │ - b.n d3a4e │ │ + b.n d3a5e │ │ movs r0, r4 │ │ - b.n d3a80 │ │ + b.n d3a90 │ │ lsrs r7, r1, #11 │ │ - bl ff113f82 │ │ - b.n d43e4 │ │ + bl ff113f92 │ │ + b.n d43f4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0} │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r1, r0 │ │ movs r0, r0 │ │ @@ -281088,1591 +280968,1575 @@ │ │ movs r0, r0 │ │ movs r1, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ @ instruction: 0xffffffff │ │ @ instruction: 0xfffeffff │ │ - ldr r7, [pc, #960] @ (d4334 ) │ │ + ldr r7, [pc, #960] @ (d4344 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n d4494 │ │ - beq.n d3ef4 │ │ - b.n d4418 │ │ + b.n d44a4 │ │ + beq.n d3f04 │ │ + b.n d4428 │ │ str r0, [r0, r0] │ │ - b.n d42c2 │ │ + b.n d42d2 │ │ ands r0, r0 │ │ - b.n d42c6 │ │ + b.n d42d6 │ │ lsls r0, r5, #4 │ │ - b.n d3af4 │ │ - add r0, pc, #4 @ (adr r0, d3f90 ) │ │ - b.n d42ce │ │ + b.n d3b04 │ │ + add r0, pc, #4 @ (adr r0, d3fa0 ) │ │ + b.n d42de │ │ movs r0, #28 │ │ - b.n d3aac │ │ + b.n d3abc │ │ strh r0, [r0, #0] │ │ - b.n d46d6 │ │ + b.n d46e6 │ │ strb r5, [r0, #0] │ │ - b.n d42da │ │ + b.n d42ea │ │ movs r0, #4 │ │ - b.n d3ac8 │ │ + b.n d3ad8 │ │ asrs r0, r1, #32 │ │ - b.n d3b10 │ │ + b.n d3b20 │ │ adds r0, #12 │ │ - b.n d3ad0 │ │ + b.n d3ae0 │ │ str r0, [r0, #0] │ │ - b.n d404c │ │ + b.n d405c │ │ str r0, [sp, #160] @ 0xa0 │ │ - b.n d3ae2 │ │ + b.n d3af2 │ │ movs r0, #2 │ │ - b.n d4158 │ │ + b.n d4168 │ │ str r0, [sp, #208] @ 0xd0 │ │ - b.n d3ad0 │ │ + b.n d3ae0 │ │ movs r1, #56 @ 0x38 │ │ movs r5, #148 @ 0x94 │ │ movs r0, r0 │ │ movs r0, #65 @ 0x41 │ │ subs r5, r2, #6 │ │ - b.n d44d6 │ │ + b.n d44e6 │ │ strh r0, [r0, #0] │ │ movs r0, #130 @ 0x82 │ │ movs r0, r6 │ │ - b.n d44e4 │ │ + b.n d44f4 │ │ movs r0, r1 │ │ - b.n d44ce │ │ + b.n d44de │ │ movs r0, #128 @ 0x80 │ │ - b.n d4712 │ │ + b.n d4722 │ │ strh r0, [r6, #0] │ │ - b.n d3af0 │ │ - lsls r3, r7, #18 │ │ - mla r0, r0, r0, r0 │ │ - b.n d468e │ │ + b.n d3b00 │ │ + lsls r4, r2, #12 │ │ + @ instruction: 0xfa000000 │ │ + b.n d469e │ │ movs r0, r0 │ │ asrs r1, r3, #13 │ │ lsls r7, r7, #2 │ │ lsrs r0, r0, #8 │ │ lsls r0, r0, #1 │ │ - b.n d3b12 │ │ + b.n d3b22 │ │ lsls r0, r2, #1 │ │ movt r0, #1808 @ 0x710 │ │ - b.n d3b0c │ │ + b.n d3b1c │ │ strb r4, [r3, #0] │ │ - b.n d3b30 │ │ + b.n d3b40 │ │ movs r0, #8 │ │ - b.n d3b1a │ │ + b.n d3b2a │ │ asrs r4, r2, #2 │ │ - b.n d3b1e │ │ + b.n d3b2e │ │ str r4, [r3, #4] │ │ - b.n d3ba2 │ │ + b.n d3bb2 │ │ movs r1, r0 │ │ - b.n d4746 │ │ + b.n d4756 │ │ ands r4, r1 │ │ - b.n d3b24 │ │ + b.n d3b34 │ │ asrs r2, r4 │ │ - b.n d410e │ │ + b.n d411e │ │ movs r7, r0 │ │ - b.n d4352 │ │ - add r0, pc, #96 @ (adr r0, d4074 ) │ │ - b.n d3b30 │ │ + b.n d4362 │ │ + add r0, pc, #96 @ (adr r0, d4084 ) │ │ + b.n d3b40 │ │ lsrs r5, r1, #10 │ │ - bne.w 1401c │ │ - b.n d4520 │ │ + bne.w 1402c │ │ + b.n d4530 │ │ asrs r0, r1, #32 │ │ - b.n d4362 │ │ + b.n d4372 │ │ lsrs r5, r1, #10 │ │ orr.w sl, r0, #4620288 @ 0x468000 │ │ orr.w sl, r0, #4620288 @ 0x468000 │ │ orr.w sl, r0, #4620288 @ 0x468000 │ │ orr.w sl, r0, #4620288 @ 0x468000 │ │ orr.w sl, r0, #4620288 @ 0x468000 │ │ orr.w sl, r0, #4685824 @ 0x478000 │ │ orr.w r0, r0, #8978432 @ 0x890000 │ │ - b.n d4152 │ │ + b.n d4162 │ │ movs r1, r0 │ │ - b.n d44c6 │ │ + b.n d44d6 │ │ str r4, [r2, r0] │ │ - b.n d3b64 │ │ - add r0, pc, #128 @ (adr r0, d40cc ) │ │ - b.n d3b68 │ │ + b.n d3b74 │ │ + add r0, pc, #128 @ (adr r0, d40dc ) │ │ + b.n d3b78 │ │ ands r4, r4 │ │ - b.n d3b6c │ │ + b.n d3b7c │ │ str r0, [r7, r0] │ │ - b.n d3b90 │ │ + b.n d3ba0 │ │ strb r4, [r5, #0] │ │ - b.n d3b74 │ │ + b.n d3b84 │ │ lsls r4, r4, #26 │ │ add.w r0, r0, r7, lsr #4 │ │ - b.n d47a2 │ │ + b.n d47b2 │ │ lsls r0, r0, #4 │ │ - b.n d4168 │ │ + b.n d4178 │ │ asrs r1, r0, #32 │ │ - b.n d47aa │ │ + b.n d47ba │ │ movs r0, #5 │ │ - b.n d43ae │ │ + b.n d43be │ │ lsls r0, r6, #24 │ │ - b.n d4174 │ │ + b.n d4184 │ │ movs r0, r5 │ │ - b.n d3b90 │ │ + b.n d3ba0 │ │ movs r0, r4 │ │ - b.n d4594 │ │ + b.n d45a4 │ │ asrs r0, r6, #32 │ │ - b.n d4598 │ │ + b.n d45a8 │ │ lsls r5, r4, #4 │ │ add.w r0, r0, r0, lsl #4 │ │ - b.n d43c6 │ │ + b.n d43d6 │ │ movs r0, r0 │ │ - b.n d47ca │ │ + b.n d47da │ │ movs r0, r0 │ │ - b.n d4730 │ │ + b.n d4740 │ │ lsls r2, r6, #3 │ │ lsrs r0, r0, #8 │ │ adds r0, #124 @ 0x7c │ │ - b.n d3bc4 │ │ + b.n d3bd4 │ │ asrs r4, r0, #32 │ │ - b.n d45a8 │ │ + b.n d45b8 │ │ movs r0, #31 │ │ - b.n d47de │ │ + b.n d47ee │ │ str r7, [r0, r0] │ │ - b.n d43e2 │ │ + b.n d43f2 │ │ movs r0, r0 │ │ - b.n d474c │ │ + b.n d475c │ │ adds r0, #0 │ │ - b.n d47ea │ │ + b.n d47fa │ │ lsls r6, r5, #2 │ │ subs r0, r0, r0 │ │ adds r0, #120 @ 0x78 │ │ - b.n d3bdc │ │ + b.n d3bec │ │ movs r0, #30 │ │ - b.n d47f6 │ │ + b.n d4806 │ │ movs r0, r0 │ │ - b.n d4760 │ │ + b.n d4770 │ │ adds r0, #0 │ │ - b.n d47fe │ │ + b.n d480e │ │ lsls r1, r5, #2 │ │ subs r0, r0, r0 │ │ adds r0, #116 @ 0x74 │ │ - b.n d3bf0 │ │ + b.n d3c00 │ │ movs r0, #29 │ │ - b.n d480a │ │ + b.n d481a │ │ movs r0, r0 │ │ - b.n d4774 │ │ + b.n d4784 │ │ adds r0, #0 │ │ - b.n d4812 │ │ + b.n d4822 │ │ lsls r4, r4, #2 │ │ subs r0, r0, r0 │ │ adds r0, #112 @ 0x70 │ │ - b.n d3c04 │ │ + b.n d3c14 │ │ movs r0, #28 │ │ - b.n d481e │ │ + b.n d482e │ │ movs r0, r0 │ │ - b.n d4788 │ │ + b.n d4798 │ │ adds r0, #0 │ │ - b.n d4826 │ │ + b.n d4836 │ │ lsls r7, r3, #2 │ │ subs r0, r0, r0 │ │ adds r0, #108 @ 0x6c │ │ - b.n d3c18 │ │ + b.n d3c28 │ │ movs r0, #27 │ │ - b.n d4832 │ │ + b.n d4842 │ │ movs r0, r0 │ │ - b.n d479c │ │ + b.n d47ac │ │ adds r0, #0 │ │ - b.n d483a │ │ + b.n d484a │ │ lsls r2, r3, #2 │ │ subs r0, r0, r0 │ │ adds r0, #104 @ 0x68 │ │ - b.n d3c2c │ │ + b.n d3c3c │ │ movs r0, #26 │ │ - b.n d4846 │ │ + b.n d4856 │ │ movs r0, r0 │ │ - b.n d47b0 │ │ + b.n d47c0 │ │ adds r0, #0 │ │ - b.n d484e │ │ + b.n d485e │ │ lsls r5, r2, #2 │ │ subs r0, r0, r0 │ │ adds r0, #100 @ 0x64 │ │ - b.n d3c40 │ │ + b.n d3c50 │ │ movs r0, #25 │ │ - b.n d485a │ │ + b.n d486a │ │ movs r0, r0 │ │ - b.n d47c4 │ │ + b.n d47d4 │ │ adds r0, #0 │ │ - b.n d4862 │ │ + b.n d4872 │ │ lsls r0, r2, #2 │ │ subs r0, r0, r0 │ │ adds r0, #96 @ 0x60 │ │ - b.n d3c54 │ │ + b.n d3c64 │ │ movs r0, #24 │ │ - b.n d486e │ │ + b.n d487e │ │ movs r0, r0 │ │ - b.n d47d8 │ │ + b.n d47e8 │ │ adds r0, #0 │ │ - b.n d4876 │ │ + b.n d4886 │ │ lsls r3, r1, #2 │ │ subs r0, r0, r0 │ │ adds r0, #92 @ 0x5c │ │ - b.n d3c68 │ │ + b.n d3c78 │ │ movs r0, #23 │ │ - b.n d4882 │ │ + b.n d4892 │ │ movs r0, r0 │ │ - b.n d47ec │ │ + b.n d47fc │ │ adds r0, #0 │ │ - b.n d488a │ │ + b.n d489a │ │ lsls r6, r0, #2 │ │ subs r0, r0, r0 │ │ adds r0, #88 @ 0x58 │ │ - b.n d3c7c │ │ + b.n d3c8c │ │ movs r0, #22 │ │ - b.n d4896 │ │ + b.n d48a6 │ │ movs r0, r0 │ │ - b.n d4800 │ │ + b.n d4810 │ │ adds r0, #0 │ │ - b.n d489e │ │ + b.n d48ae │ │ lsls r1, r0, #2 │ │ subs r0, r0, r0 │ │ adds r0, #84 @ 0x54 │ │ - b.n d3c90 │ │ + b.n d3ca0 │ │ movs r0, #21 │ │ - b.n d48aa │ │ + b.n d48ba │ │ movs r0, r0 │ │ - b.n d4814 │ │ + b.n d4824 │ │ adds r0, #0 │ │ - b.n d48b2 │ │ + b.n d48c2 │ │ lsls r4, r7, #1 │ │ subs r0, r0, r0 │ │ adds r0, #80 @ 0x50 │ │ - b.n d3ca4 │ │ + b.n d3cb4 │ │ movs r0, #20 │ │ - b.n d48be │ │ + b.n d48ce │ │ movs r0, r0 │ │ - b.n d4828 │ │ + b.n d4838 │ │ adds r0, #0 │ │ - b.n d48c6 │ │ + b.n d48d6 │ │ lsls r7, r6, #1 │ │ subs r0, r0, r0 │ │ adds r0, #76 @ 0x4c │ │ - b.n d3cb8 │ │ + b.n d3cc8 │ │ movs r0, #19 │ │ - b.n d48d2 │ │ + b.n d48e2 │ │ movs r0, r0 │ │ - b.n d483c │ │ + b.n d484c │ │ adds r0, #0 │ │ - b.n d48da │ │ + b.n d48ea │ │ lsls r2, r6, #1 │ │ subs r0, r0, r0 │ │ adds r0, #72 @ 0x48 │ │ - b.n d3ccc │ │ + b.n d3cdc │ │ movs r0, #18 │ │ - b.n d48e6 │ │ + b.n d48f6 │ │ movs r0, r0 │ │ - b.n d4850 │ │ + b.n d4860 │ │ adds r0, #0 │ │ - b.n d48ee │ │ + b.n d48fe │ │ lsls r5, r5, #1 │ │ subs r0, r0, r0 │ │ adds r0, #68 @ 0x44 │ │ - b.n d3ce0 │ │ + b.n d3cf0 │ │ movs r0, #17 │ │ - b.n d48fa │ │ + b.n d490a │ │ movs r0, r0 │ │ - b.n d4864 │ │ + b.n d4874 │ │ adds r0, #0 │ │ - b.n d4902 │ │ + b.n d4912 │ │ lsls r0, r5, #1 │ │ subs r0, r0, r0 │ │ adds r0, #64 @ 0x40 │ │ - b.n d3cf4 │ │ + b.n d3d04 │ │ movs r0, #16 │ │ - b.n d490e │ │ + b.n d491e │ │ movs r0, r0 │ │ - b.n d4878 │ │ + b.n d4888 │ │ adds r0, #0 │ │ - b.n d4916 │ │ + b.n d4926 │ │ lsls r3, r4, #1 │ │ subs r0, r0, r0 │ │ adds r0, #60 @ 0x3c │ │ - b.n d3d08 │ │ + b.n d3d18 │ │ movs r0, #15 │ │ - b.n d4922 │ │ + b.n d4932 │ │ movs r0, r0 │ │ - b.n d488c │ │ + b.n d489c │ │ adds r0, #0 │ │ - b.n d492a │ │ + b.n d493a │ │ lsls r6, r3, #1 │ │ subs r0, r0, r0 │ │ adds r0, #56 @ 0x38 │ │ - b.n d3d1c │ │ + b.n d3d2c │ │ movs r0, #14 │ │ - b.n d4936 │ │ + b.n d4946 │ │ movs r0, r0 │ │ - b.n d48a0 │ │ + b.n d48b0 │ │ adds r0, #0 │ │ - b.n d493e │ │ + b.n d494e │ │ lsls r1, r3, #1 │ │ subs r0, r0, r0 │ │ adds r0, #52 @ 0x34 │ │ - b.n d3d30 │ │ + b.n d3d40 │ │ movs r0, #13 │ │ - b.n d494a │ │ + b.n d495a │ │ movs r0, r0 │ │ - b.n d48b4 │ │ + b.n d48c4 │ │ adds r0, #0 │ │ - b.n d4952 │ │ + b.n d4962 │ │ lsls r4, r2, #1 │ │ subs r0, r0, r0 │ │ adds r0, #48 @ 0x30 │ │ - b.n d3d44 │ │ + b.n d3d54 │ │ movs r0, #12 │ │ - b.n d495e │ │ + b.n d496e │ │ movs r0, r0 │ │ - b.n d48c8 │ │ + b.n d48d8 │ │ adds r0, #0 │ │ - b.n d4966 │ │ + b.n d4976 │ │ lsls r7, r1, #1 │ │ subs r0, r0, r0 │ │ adds r0, #44 @ 0x2c │ │ - b.n d3d58 │ │ + b.n d3d68 │ │ movs r0, #11 │ │ - b.n d4972 │ │ + b.n d4982 │ │ movs r0, r0 │ │ - b.n d48dc │ │ + b.n d48ec │ │ adds r0, #0 │ │ - b.n d497a │ │ + b.n d498a │ │ lsls r2, r1, #1 │ │ subs r0, r0, r0 │ │ adds r0, #40 @ 0x28 │ │ - b.n d3d6c │ │ + b.n d3d7c │ │ movs r0, #10 │ │ - b.n d4986 │ │ + b.n d4996 │ │ movs r0, r0 │ │ - b.n d48f0 │ │ + b.n d4900 │ │ adds r0, #0 │ │ - b.n d498e │ │ + b.n d499e │ │ lsls r5, r0, #1 │ │ subs r0, r0, r0 │ │ adds r0, #36 @ 0x24 │ │ - b.n d3d80 │ │ + b.n d3d90 │ │ movs r0, #9 │ │ - b.n d499a │ │ + b.n d49aa │ │ movs r0, r0 │ │ - b.n d4904 │ │ + b.n d4914 │ │ adds r0, #0 │ │ - b.n d49a2 │ │ + b.n d49b2 │ │ lsls r0, r0, #1 │ │ subs r0, r0, r0 │ │ adds r0, #32 │ │ - b.n d3d94 │ │ + b.n d3da4 │ │ movs r0, #8 │ │ - b.n d49ae │ │ + b.n d49be │ │ movs r0, r0 │ │ - b.n d4918 │ │ + b.n d4928 │ │ adds r0, #0 │ │ - b.n d49b6 │ │ + b.n d49c6 │ │ movs r3, r7 │ │ subs r0, r0, r0 │ │ adds r0, #28 │ │ - b.n d3da8 │ │ + b.n d3db8 │ │ movs r0, #7 │ │ - b.n d49c2 │ │ + b.n d49d2 │ │ movs r0, r0 │ │ - b.n d492c │ │ + b.n d493c │ │ adds r0, #0 │ │ - b.n d49ca │ │ + b.n d49da │ │ movs r6, r6 │ │ subs r0, r0, r0 │ │ adds r0, #24 │ │ - b.n d3dbc │ │ + b.n d3dcc │ │ movs r0, #6 │ │ - b.n d49d6 │ │ + b.n d49e6 │ │ movs r0, r0 │ │ - b.n d4940 │ │ + b.n d4950 │ │ adds r0, #0 │ │ - b.n d49de │ │ + b.n d49ee │ │ movs r1, r6 │ │ subs r0, r0, r0 │ │ adds r0, #20 │ │ - b.n d3dd0 │ │ + b.n d3de0 │ │ movs r0, #5 │ │ - b.n d49ea │ │ + b.n d49fa │ │ movs r0, r0 │ │ - b.n d4954 │ │ + b.n d4964 │ │ adds r0, #0 │ │ - b.n d49f2 │ │ + b.n d4a02 │ │ movs r4, r5 │ │ subs r0, r0, r0 │ │ adds r0, #16 │ │ - b.n d3de4 │ │ + b.n d3df4 │ │ movs r0, #4 │ │ - b.n d49fe │ │ + b.n d4a0e │ │ movs r0, r0 │ │ - b.n d4968 │ │ + b.n d4978 │ │ adds r0, #0 │ │ - b.n d4a06 │ │ + b.n d4a16 │ │ movs r7, r4 │ │ subs r0, r0, r0 │ │ strb r4, [r1, #0] │ │ - b.n d3df8 │ │ + b.n d3e08 │ │ movs r0, #3 │ │ - b.n d4a12 │ │ + b.n d4a22 │ │ adds r0, #1 │ │ - b.n d4a16 │ │ + b.n d4a26 │ │ movs r0, r0 │ │ - b.n d4988 │ │ + b.n d4998 │ │ movs r1, r3 │ │ lsrs r0, r0, #8 │ │ str r4, [r3, r0] │ │ - b.n d3e1c │ │ + b.n d3e2c │ │ movs r0, r4 │ │ and.w r2, r0, r4 │ │ - b.n d3e28 │ │ + b.n d3e38 │ │ movs r0, r0 │ │ - b.n d440c │ │ + b.n d441c │ │ asrs r2, r3, #1 │ │ - b.n d3e92 │ │ + b.n d3ea2 │ │ lsls r5, r0, #31 │ │ - b.n d4906 │ │ + b.n d4916 │ │ lsrs r7, r7, #31 │ │ - b.n d4998 │ │ + b.n d49a8 │ │ movs r0, r0 │ │ - b.n d49a0 │ │ + b.n d49b0 │ │ lsls r6, r2, #1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r5, #7 │ │ - b.n d3e44 │ │ + b.n d3e54 │ │ ands r0, r0 │ │ - b.n d464a │ │ + b.n d465a │ │ adds r1, #232 @ 0xe8 │ │ - b.n d3e4c │ │ + b.n d3e5c │ │ movs r1, #232 @ 0xe8 │ │ - b.n d3e50 │ │ + b.n d3e60 │ │ asrs r1, r0, #32 │ │ - b.n d4434 │ │ + b.n d4444 │ │ strb r4, [r4, #7] │ │ - b.n d3e58 │ │ + b.n d3e68 │ │ adds r0, #3 │ │ - b.n d443c │ │ + b.n d444c │ │ movs r0, #2 │ │ - b.n d4440 │ │ + b.n d4450 │ │ movs r0, #0 │ │ - b.n d3e40 │ │ + b.n d3e50 │ │ strb r7, [r0, #0] │ │ - b.n d4448 │ │ + b.n d4458 │ │ lsls r1, r0, #2 │ │ @ instruction: 0xe98d0001 │ │ - b.n d4a72 │ │ + b.n d4a82 │ │ movs r2, #195 @ 0xc3 │ │ - b.n d4936 │ │ - subs r3, r7, r6 │ │ + b.n d4946 │ │ + subs r2, r7, r6 │ │ @ instruction: 0xebff0004 │ │ - b.n d467e │ │ - beq.n d4378 │ │ - b.n d47d8 │ │ + b.n d468e │ │ + beq.n d4388 │ │ + b.n d47e8 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, r4, ip, lr} │ │ - b.n d3e84 │ │ + b.n d3e94 │ │ movs r0, #2 │ │ - b.n d4a8e │ │ + b.n d4a9e │ │ strb r0, [r1, #0] │ │ - b.n d3e7c │ │ + b.n d3e8c │ │ movs r0, r0 │ │ - b.n d4a04 │ │ + b.n d4a14 │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ movs r0, #0 │ │ - b.n d3e80 │ │ + b.n d3e90 │ │ movs r0, r0 │ │ - b.n d4a06 │ │ + b.n d4a16 │ │ movs r0, #1 │ │ - b.n d4aa6 │ │ + b.n d4ab6 │ │ movs r6, r7 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n d4a14 │ │ + b.n d4a24 │ │ movs r0, #0 │ │ - b.n d3e7c │ │ + b.n d3e8c │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ adds r0, #0 │ │ - b.n d4aba │ │ + b.n d4aca │ │ asrs r0, r0, #32 │ │ - b.n d4abe │ │ + b.n d4ace │ │ movs r3, r3 │ │ and.w pc, r0, r6, lsr #1 │ │ - b.n d48a4 │ │ - ldr r3, [pc, #576] @ (d45c8 ) │ │ + b.n d48b4 │ │ + ldr r3, [pc, #576] @ (d45d8 ) │ │ vfms.f32 s0, s9, s31 │ │ orn r0, r0, #10223616 @ 0x9c0000 │ │ - b.n d4796 │ │ + b.n d47a6 │ │ adds r1, #4 │ │ - b.n d46d6 │ │ + b.n d46e6 │ │ str r0, [r2, #4] │ │ - blt.w 194aba │ │ + blt.w 194aca │ │ mcr 4, 5, sl, cr2, cr0, {4} │ │ - b.n d43f6 │ │ + b.n d4406 │ │ cmp r1, #224 @ 0xe0 │ │ @ instruction: 0xf2643b90 │ │ cdp 0, 10, cr3, cr4, cr0, {0} │ │ - b.n d46ee │ │ + b.n d46fe │ │ lsls r0, r2, #1 │ │ - blt.w 1548cc │ │ + blt.w 1548dc │ │ orn r0, r1, #135168 @ 0x21000 │ │ - b.n d4860 │ │ + b.n d4870 │ │ lsrs r2, r4, #7 │ │ @ instruction: 0xf26828e4 │ │ @ instruction: 0xf26268e6 │ │ - bl 33d3b8 │ │ + bl 33d3c8 │ │ subs r7, r7, r3 │ │ cmp r0, #167 @ 0xa7 │ │ @ instruction: 0xf2660000 │ │ - b.n d4676 │ │ + b.n d4686 │ │ lsrs r1, r4, #2 │ │ @ instruction: 0xf2601b90 │ │ vmov.32 r3, d18[1] │ │ vmov.32 r7, d18[0] │ │ vmov.32 r6, d16[1] │ │ cdp 0, 1, cr1, cr0, cr1, {0} │ │ - b.n d44f0 │ │ + b.n d4500 │ │ adds r0, #7 │ │ - b.n d44fa │ │ + b.n d450a │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, #0 │ │ - b.n d447a │ │ + b.n d448a │ │ lsls r0, r0, #4 │ │ - b.n d4504 │ │ + b.n d4514 │ │ movs r4, r0 │ │ - b.n d48fe │ │ + b.n d490e │ │ strb r4, [r0, #0] │ │ - b.n d3d22 │ │ + b.n d3d32 │ │ movs r0, #1 │ │ - b.n d48aa │ │ + b.n d48ba │ │ asrs r1, r0, #32 │ │ - b.n d4518 │ │ + b.n d4528 │ │ subs r2, #151 @ 0x97 │ │ - b.n d4454 │ │ - add r0, pc, #16 @ (adr r0, d4420 ) │ │ - b.n d4526 │ │ + b.n d4464 │ │ + add r0, pc, #16 @ (adr r0, d4430 ) │ │ + b.n d4536 │ │ @ instruction: 0xfff91aff │ │ movs r0, r3 │ │ - b.n d3f54 │ │ + b.n d3f64 │ │ movs r0, r5 │ │ - b.n d3f3e │ │ + b.n d3f4e │ │ movs r0, r0 │ │ - b.n d46c8 │ │ + b.n d46d8 │ │ movs r6, r2 │ │ subs r2, #0 │ │ movs r0, r2 │ │ - b.n d3f64 │ │ + b.n d3f74 │ │ movs r0, #20 │ │ - b.n d3f68 │ │ + b.n d3f78 │ │ movs r1, r1 │ │ ldmia.w r0, {r4, r6, r7, lr} │ │ - b.n d47ba │ │ + b.n d47ca │ │ movs r0, #0 │ │ - b.n d4b7a │ │ + b.n d4b8a │ │ strb r4, [r0, #0] │ │ - b.n d44de │ │ + b.n d44ee │ │ adds r0, #5 │ │ - b.n d45e8 │ │ + b.n d45f8 │ │ movs r0, #12 │ │ movs r5, #157 @ 0x9d │ │ movs r4, r0 │ │ movs r0, #64 @ 0x40 │ │ movs r1, #56 @ 0x38 │ │ movs r5, #146 @ 0x92 │ │ movs r0, #0 │ │ movs r0, #130 @ 0x82 │ │ movs r0, r0 │ │ - b.n d4c16 │ │ + b.n d4c26 │ │ movs r2, r0 │ │ - b.n d46fc │ │ + b.n d470c │ │ movs r0, r1 │ │ ldrh r0, [r0, #16] │ │ - beq.n d4498 │ │ - b.n d48f8 │ │ + beq.n d44a8 │ │ + b.n d4908 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {ip} │ │ - b.n d4baa │ │ + b.n d4bba │ │ adds r0, #0 │ │ - b.n d4bae │ │ + b.n d4bbe │ │ asrs r0, r0, #32 │ │ - b.n d3f7c │ │ + b.n d3f8c │ │ movs r0, r3 │ │ - b.n d3fb0 │ │ + b.n d3fc0 │ │ movs r0, r5 │ │ - b.n d3f9a │ │ + b.n d3faa │ │ movs r0, r0 │ │ - b.n d4724 │ │ + b.n d4734 │ │ @ instruction: 0xffe82aff │ │ lsls r4, r7, #1 │ │ - b.n d3fc4 │ │ + b.n d3fd4 │ │ movs r0, r0 │ │ - b.n d45a8 │ │ + b.n d45b8 │ │ asrs r2, r3, #1 │ │ - b.n d402e │ │ + b.n d403e │ │ lsls r5, r0, #31 │ │ - b.n d4aa2 │ │ + b.n d4ab2 │ │ lsrs r7, r7, #31 │ │ - b.n d4b34 │ │ + b.n d4b44 │ │ movs r0, r0 │ │ - b.n d4b3c │ │ + b.n d4b4c │ │ @ instruction: 0xffef0aff │ │ asrs r4, r4, #1 │ │ - b.n d3fe0 │ │ + b.n d3ff0 │ │ ands r0, r0 │ │ - b.n d47e6 │ │ + b.n d47f6 │ │ adds r0, #96 @ 0x60 │ │ - b.n d3fe8 │ │ + b.n d3ff8 │ │ movs r0, #96 @ 0x60 │ │ - b.n d3fec │ │ + b.n d3ffc │ │ asrs r1, r0, #32 │ │ - b.n d45d0 │ │ + b.n d45e0 │ │ strb r4, [r3, #1] │ │ - b.n d3ff4 │ │ + b.n d4004 │ │ adds r0, #3 │ │ - b.n d45d8 │ │ + b.n d45e8 │ │ movs r0, #2 │ │ - b.n d45dc │ │ + b.n d45ec │ │ movs r0, #0 │ │ - b.n d3fdc │ │ + b.n d3fec │ │ strb r7, [r0, #0] │ │ - b.n d45e4 │ │ + b.n d45f4 │ │ lsls r1, r0, #2 │ │ @ instruction: 0xe98d0001 │ │ - b.n d4c0e │ │ + b.n d4c1e │ │ movs r2, #223 @ 0xdf │ │ - b.n d4ad2 │ │ - subs r4, r2, r5 │ │ + b.n d4ae2 │ │ + subs r3, r2, r5 │ │ @ instruction: 0xebff0004 │ │ - b.n d481a │ │ - beq.n d4514 │ │ - b.n d4974 │ │ + b.n d482a │ │ + beq.n d4524 │ │ + b.n d4984 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {} │ │ movs r0, r0 │ │ movs r1, r0 │ │ movs r0, r0 │ │ movs r2, r0 │ │ movs r0, r0 │ │ movs r3, r0 │ │ movs r0, r0 │ │ - add r5, pc, #384 @ (adr r5, d4674 ) │ │ + add r5, pc, #448 @ (adr r5, d46c4 ) │ │ movs r0, r0 │ │ - ldr r6, [pc, #512] @ (d46f8 ) │ │ - @ instruction: 0xfff3a893 │ │ - vmlsl.u , d3, d30[0] │ │ - @ instruction: 0xfff3adab │ │ - @ instruction: 0xfff3a3c4 │ │ - movs r0, r0 │ │ - ldr r4, [pc, #912] @ (d489c ) │ │ - vqshlu.s64 q13, , #51 @ 0x33 │ │ - vsri.64 , q1, #13 │ │ - vshr.u64 , q14, #13 │ │ + ldr r5, [pc, #616] @ (d4770 ) │ │ + vshll.u32 q13, d5, #19 │ │ + vmlsl.u , d3, d14[0] │ │ + @ instruction: 0xfff3af2a │ │ + vrsra.u64 q13, q2, #13 │ │ + movs r0, r0 │ │ + ldr r3, [pc, #1016] @ (d4914 ) │ │ + vqrshrun.s64 d26, , #13 │ │ + vsri.64 d23, d18, #13 │ │ + vaddw.u , , d29 │ │ @ instruction: 0xfff34ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n d4a3c │ │ - beq.n d445c │ │ - b.n d49c0 │ │ - add r0, pc, #0 @ (adr r0, d4528 ) │ │ - b.n d486a │ │ + b.n d4a4c │ │ + beq.n d446c │ │ + b.n d49d0 │ │ + add r0, pc, #0 @ (adr r0, d4538 ) │ │ + b.n d487a │ │ movs r0, r1 │ │ - b.n d404e │ │ + b.n d405e │ │ strb r1, [r0, #0] │ │ - b.n d49b6 │ │ + b.n d49c6 │ │ ands r2, r0 │ │ - b.n d4876 │ │ + b.n d4886 │ │ strh r1, [r0, #0] │ │ - b.n d487a │ │ + b.n d488a │ │ movs r2, r0 │ │ - b.n d47de │ │ + b.n d47ee │ │ lsls r7, r3, #1 │ │ cmp r2, #0 │ │ str r0, [r0, #0] │ │ - b.n d4076 │ │ + b.n d4086 │ │ movs r2, r0 │ │ - b.n d4bf6 │ │ + b.n d4c06 │ │ lsls r7, r3, #1 │ │ subs r2, #0 │ │ movs r0, #208 @ 0xd0 │ │ - b.n d48e6 │ │ + b.n d48f6 │ │ movs r7, #147 @ 0x93 │ │ - b.n d459a │ │ + b.n d45aa │ │ asrs r4, r0, #32 │ │ - b.n d408a │ │ + b.n d409a │ │ movs r0, #0 │ │ - b.n d4078 │ │ + b.n d4088 │ │ movs r2, r0 │ │ - b.n d4804 │ │ + b.n d4814 │ │ lsls r1, r3, #1 │ │ ldr r2, [sp, #0] │ │ movs r0, r2 │ │ - b.n d4a84 │ │ + b.n d4a94 │ │ strb r0, [r1, #0] │ │ - b.n d4088 │ │ - add r0, pc, #16 @ (adr r0, d4580 ) │ │ - b.n d408c │ │ - add r0, pc, #48 @ (adr r0, d45a4 ) │ │ - b.n d4a76 │ │ + b.n d4098 │ │ + add r0, pc, #16 @ (adr r0, d4590 ) │ │ + b.n d409c │ │ + add r0, pc, #48 @ (adr r0, d45b4 ) │ │ + b.n d4a86 │ │ strb r1, [r0, #0] │ │ - b.n d4a06 │ │ + b.n d4a16 │ │ asrs r4, r0, #32 │ │ - b.n d493e │ │ + b.n d494e │ │ str r0, [r0, r0] │ │ - b.n d4cc2 │ │ + b.n d4cd2 │ │ str r0, [sp, #0] │ │ - b.n d4cc6 │ │ + b.n d4cd6 │ │ asrs r4, r1, #32 │ │ - b.n d40a4 │ │ + b.n d40b4 │ │ movs r5, r0 │ │ and.w r0, r0, r1, lsl #28 │ │ - b.n d4a24 │ │ + b.n d4a34 │ │ asrs r5, r0, #32 │ │ - b.n d46a4 │ │ + b.n d46b4 │ │ movs r0, r2 │ │ - b.n d4ab4 │ │ + b.n d4ac4 │ │ str r0, [sp, #644] @ 0x284 │ │ - b.n d48de │ │ + b.n d48ee │ │ movs r5, r0 │ │ - b.n d4850 │ │ + b.n d4860 │ │ lsls r2, r0, #1 │ │ subs r2, #0 │ │ asrs r0, r1, #32 │ │ - b.n d48ea │ │ + b.n d48fa │ │ movs r0, #136 @ 0x88 │ │ - b.n d4cee │ │ + b.n d4cfe │ │ str r0, [r0, #0] │ │ - b.n d48f2 │ │ - lsls r4, r0, #13 │ │ - mla r0, r0, r0, r0 │ │ - b.n d4c6c │ │ + b.n d4902 │ │ + lsls r5, r3, #6 │ │ + @ instruction: 0xfa000000 │ │ + b.n d4c7c │ │ movs r1, r5 │ │ lsrs r0, r0, #8 │ │ asrs r0, r3, #32 │ │ - b.n d40fc │ │ + b.n d410c │ │ movs r4, r0 │ │ - b.n d4868 │ │ + b.n d4878 │ │ @ instruction: 0xfff03aff │ │ movs r1, r1 │ │ - b.n d490e │ │ + b.n d491e │ │ movs r3, r0 │ │ and.w r0, r0, r8, lsr #8 │ │ - b.n d40f0 │ │ + b.n d4100 │ │ asrs r2, r0, #32 │ │ - b.n d491a │ │ + b.n d492a │ │ movs r4, r0 │ │ - b.n d4880 │ │ + b.n d4890 │ │ @ instruction: 0xffea3aff │ │ movs r0, #1 │ │ - b.n d4a68 │ │ + b.n d4a78 │ │ adds r1, #2 │ │ - b.n d451e │ │ + b.n d452e │ │ movs r0, r0 │ │ - b.n d4c94 │ │ + b.n d4ca4 │ │ @ instruction: 0xfff70aff │ │ movs r4, r0 │ │ - b.n d4898 │ │ + b.n d48a8 │ │ movs r7, r0 │ │ ldr r2, [sp, #0] │ │ movs r0, #12 │ │ - b.n d4138 │ │ + b.n d4148 │ │ asrs r2, r0, #32 │ │ - b.n d4704 │ │ + b.n d4714 │ │ movs r1, #1 │ │ - b.n d453a │ │ + b.n d454a │ │ movs r0, #1 │ │ - b.n d4b0e │ │ + b.n d4b1e │ │ movs r1, #1 │ │ - b.n d4522 │ │ + b.n d4532 │ │ asrs r0, r3, #32 │ │ - b.n d414c │ │ + b.n d415c │ │ movs r0, #1 │ │ - b.n d4a98 │ │ + b.n d4aa8 │ │ adds r1, #2 │ │ - b.n d454e │ │ + b.n d455e │ │ movs r1, r0 │ │ - b.n d4abe │ │ + b.n d4ace │ │ asrs r1, r0, #32 │ │ - b.n d4aa8 │ │ + b.n d4ab8 │ │ asrs r2, r0, #4 │ │ - b.n d453a │ │ + b.n d454a │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ asrs r0, r3, #32 │ │ - b.n d4168 │ │ + b.n d4178 │ │ movs r4, r0 │ │ - b.n d48d4 │ │ + b.n d48e4 │ │ @ instruction: 0xffea2aff │ │ @ instruction: 0xffd4eaff │ │ movs r0, r0 │ │ - b.n d4178 │ │ + b.n d4188 │ │ str r0, [r2, #0] │ │ - b.n d4b5c │ │ + b.n d4b6c │ │ asrs r0, r2, #32 │ │ - b.n d4180 │ │ + b.n d4190 │ │ movs r0, #20 │ │ - b.n d4184 │ │ + b.n d4194 │ │ lsls r1, r3, #2 │ │ - b.n d464e │ │ + b.n d465e │ │ asrs r1, r1, #32 │ │ - b.n d46d4 │ │ + b.n d46e4 │ │ asrs r0, r2, #32 │ │ - b.n d4170 │ │ + b.n d4180 │ │ asrs r0, r0, #32 │ │ - b.n d4d9a │ │ + b.n d4daa │ │ movs r0, r0 │ │ - b.n d4702 │ │ + b.n d4712 │ │ movs r1, r0 │ │ adds r1, #160 @ 0xa0 │ │ movs r4, r2 │ │ - b.n d4180 │ │ + b.n d4190 │ │ movs r4, r0 │ │ - b.n d41a4 │ │ + b.n d41b4 │ │ asrs r6, r0, #32 │ │ - b.n d49ae │ │ + b.n d49be │ │ movs r0, #8 │ │ - b.n d41ac │ │ + b.n d41bc │ │ @ instruction: 0xffa8ebff │ │ movs r0, r0 │ │ - b.n d4d1a │ │ + b.n d4d2a │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ movs r5, r0 │ │ - b.n d4934 │ │ + b.n d4944 │ │ lsls r2, r4, #1 │ │ ldr r2, [sp, #0] │ │ movs r7, r0 │ │ - b.n d493c │ │ + b.n d494c │ │ lsls r0, r4, #1 │ │ cmp r2, #0 │ │ strb r1, [r1, #0] │ │ - b.n d49d2 │ │ + b.n d49e2 │ │ movs r0, r0 │ │ and.w r0, r0, r1, lsl #20 │ │ - b.n d4bac │ │ + b.n d4bbc │ │ movs r7, r0 │ │ - b.n d47a8 │ │ + b.n d47b8 │ │ asrs r1, r0, #32 │ │ - b.n d4ba2 │ │ + b.n d4bb2 │ │ movs r0, r2 │ │ - b.n d4bc0 │ │ + b.n d4bd0 │ │ str r0, [sp, #644] @ 0x284 │ │ - b.n d49ea │ │ + b.n d49fa │ │ movs r5, r0 │ │ - b.n d495c │ │ + b.n d496c │ │ @ instruction: 0xffbc2aff │ │ str r0, [sp, #0] │ │ - b.n d4df6 │ │ + b.n d4e06 │ │ movs r1, r1 │ │ - b.n d49fa │ │ - beq.n d46f4 │ │ - b.n d4b54 │ │ + b.n d4a0a │ │ + beq.n d4704 │ │ + b.n d4b64 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, ip} │ │ - b.n d41fa │ │ + b.n d420a │ │ movs r4, r0 │ │ - b.n d4bcc │ │ + b.n d4bdc │ │ movs r0, r1 │ │ and.w r0, r0, ip, lsl #4 │ │ - b.n d4206 │ │ + b.n d4216 │ │ movs r0, #0 │ │ - b.n d4e16 │ │ + b.n d4e26 │ │ movs r4, r0 │ │ - b.n d4bdc │ │ + b.n d4bec │ │ movs r1, #4 │ │ - b.n d45e0 │ │ + b.n d45f0 │ │ ands r1, r0 │ │ - b.n d4b6a │ │ + b.n d4b7a │ │ adds r0, #8 │ │ - b.n d421a │ │ + b.n d422a │ │ movs r3, r0 │ │ - b.n d4992 │ │ + b.n d49a2 │ │ @ instruction: 0xfffa8aff │ │ strb r1, [r0, #0] │ │ - b.n d4b7a │ │ + b.n d4b8a │ │ str r0, [sp, #0] │ │ - b.n d4e36 │ │ + b.n d4e46 │ │ str r1, [sp, #28] │ │ - b.n d45fa │ │ + b.n d460a │ │ movs r0, #4 │ │ - b.n d422e │ │ + b.n d423e │ │ movs r1, r0 │ │ - b.n d4da6 │ │ + b.n d4db6 │ │ movs r1, r7 │ │ rev r0, r0 │ │ str r0, [r1, #0] │ │ - b.n d423a │ │ + b.n d424a │ │ movs r0, r0 │ │ - b.n d4dba │ │ + b.n d4dca │ │ @ instruction: 0xffe80aff │ │ movs r0, #208 @ 0xd0 │ │ - b.n d4aaa │ │ + b.n d4aba │ │ str r0, [r1, r0] │ │ - b.n d4a5a │ │ + b.n d4a6a │ │ movs r7, #147 @ 0x93 │ │ - b.n d477a │ │ + b.n d478a │ │ movs r0, #12 │ │ - b.n d404c │ │ + b.n d405c │ │ stmia r0!, {r2} │ │ - b.n d4ba8 │ │ + b.n d4bb8 │ │ movs r4, r1 │ │ and.w r1, r0, r2, lsl #8 │ │ - b.n d4838 │ │ + b.n d4848 │ │ adds r0, #4 │ │ - b.n d4156 │ │ + b.n d4166 │ │ adds r0, #1 │ │ - b.n d4bbc │ │ + b.n d4bcc │ │ adds r0, #4 │ │ - b.n d413e │ │ + b.n d414e │ │ movs r0, #208 @ 0xd0 │ │ - b.n d4ace │ │ + b.n d4ade │ │ adds r0, #14 │ │ - b.n d47c8 │ │ + b.n d47d8 │ │ movs r0, #1 │ │ - b.n d4bca │ │ + b.n d4bda │ │ movs r0, r0 │ │ - b.n d4df0 │ │ + b.n d4e00 │ │ movs r0, #240 @ 0xf0 │ │ - b.n d4ade │ │ + b.n d4aee │ │ movs r5, r4 │ │ - bge.n d4752 │ │ + bge.n d4762 │ │ str r0, [r1, #0] │ │ - b.n d4286 │ │ + b.n d4296 │ │ movs r0, r0 │ │ - b.n d4e06 │ │ + b.n d4e16 │ │ @ instruction: 0xffd50aff │ │ movs r0, r0 │ │ - b.n d4e06 │ │ + b.n d4e16 │ │ @ instruction: 0xffd30aff │ │ strb r1, [r0, #0] │ │ - b.n d4bf6 │ │ + b.n d4c06 │ │ adds r1, #7 │ │ - b.n d4698 │ │ + b.n d46a8 │ │ movs r0, r0 │ │ - b.n d4e18 │ │ + b.n d4e28 │ │ movs r4, r1 │ │ lsrs r0, r0, #8 │ │ movs r1, #4 │ │ - b.n d469c │ │ + b.n d46ac │ │ movs r0, #1 │ │ - b.n d4c82 │ │ + b.n d4c92 │ │ movs r1, #4 │ │ - b.n d4684 │ │ + b.n d4694 │ │ movs r0, #8 │ │ - b.n d42b6 │ │ + b.n d42c6 │ │ movs r4, r0 │ │ - b.n d4a2e │ │ + b.n d4a3e │ │ @ instruction: 0xffe69aff │ │ adds r0, #4 │ │ - b.n d4b52 │ │ + b.n d4b62 │ │ movs r0, #3 │ │ - b.n d489a │ │ + b.n d48aa │ │ adds r1, #2 │ │ - b.n d46c4 │ │ + b.n d46d4 │ │ adds r0, #1 │ │ - b.n d4ca4 │ │ + b.n d4cb4 │ │ adds r1, #2 │ │ - b.n d46ac │ │ + b.n d46bc │ │ movs r0, #8 │ │ - b.n d42d6 │ │ + b.n d42e6 │ │ @ instruction: 0xffdfeaff │ │ movs r7, r0 │ │ - b.n d4a56 │ │ + b.n d4a66 │ │ strb r0, [r1, #0] │ │ - b.n d42c2 │ │ + b.n d42d2 │ │ movs r0, r1 │ │ ldr r2, [sp, #0] │ │ adds r0, #4 │ │ - b.n d42ee │ │ + b.n d42fe │ │ ands r7, r0 │ │ - b.n d4afe │ │ + b.n d4b0e │ │ str r1, [sp, #24] │ │ - b.n d46da │ │ - b.n d47ca │ │ - b.n d4862 │ │ + b.n d46ea │ │ + b.n d47da │ │ + b.n d4872 │ │ movs r0, #0 │ │ - b.n d42fa │ │ + b.n d430a │ │ str r0, [r1, #0] │ │ - b.n d42fe │ │ + b.n d430e │ │ movs r0, r0 │ │ - b.n d4e7e │ │ + b.n d4e8e │ │ @ instruction: 0xffe11aff │ │ @ instruction: 0xffb6eaff │ │ str r7, [r0, #0] │ │ - b.n d4b1e │ │ + b.n d4b2e │ │ movs r0, r0 │ │ - b.n d4e8e │ │ + b.n d4e9e │ │ @ instruction: 0xffdd1aff │ │ @ instruction: 0xffb2eaff │ │ strb r1, [r0, #0] │ │ - b.n d4c76 │ │ + b.n d4c86 │ │ str r0, [sp, #4] │ │ - b.n d4f32 │ │ + b.n d4f42 │ │ movs r0, r0 │ │ - b.n d4ea4 │ │ + b.n d4eb4 │ │ @ instruction: 0xffae0aff │ │ asrs r3, r0, #32 │ │ - b.n d4fbe │ │ + b.n d4fce │ │ asrs r4, r0, #4 │ │ - b.n d4904 │ │ - lsls r1, r1, #4 │ │ - @ instruction: 0xfa000009 │ │ - b.n d4b4a │ │ - beq.n d4844 │ │ - b.n d4ca4 │ │ + b.n d4914 │ │ + lsls r0, r7, #9 │ │ + mla r0, r0, r9, r0 │ │ + b.n d4b5a │ │ + beq.n d4854 │ │ + b.n d4cb4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2} │ │ - b.n d4350 │ │ + b.n d4360 │ │ movs r0, #136 @ 0x88 │ │ - b.n d4f5a │ │ + b.n d4f6a │ │ asrs r0, r1, #32 │ │ - b.n d4358 │ │ + b.n d4368 │ │ movs r4, r1 │ │ - b.n d4342 │ │ + b.n d4352 │ │ lsls r1, r0, #4 │ │ - b.n d4926 │ │ + b.n d4936 │ │ asrs r0, r2, #32 │ │ - b.n d4d44 │ │ + b.n d4d54 │ │ str r0, [sp, #16] │ │ - b.n d432e │ │ + b.n d433e │ │ movs r0, r1 │ │ - b.n d4b72 │ │ - lsls r4, r4, #10 │ │ - mla r0, r0, r1, r9 │ │ - b.n d4f7a │ │ + b.n d4b82 │ │ + lsls r5, r7, #3 │ │ + @ instruction: 0xfa009001 │ │ + b.n d4f8a │ │ movs r1, r1 │ │ - b.n d4b7e │ │ - beq.n d4878 │ │ - b.n d4cd8 │ │ + b.n d4b8e │ │ + beq.n d4888 │ │ + b.n d4ce8 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n d4d68 │ │ - beq.n d4858 │ │ - b.n d4cec │ │ + b.n d4d78 │ │ + beq.n d4868 │ │ + b.n d4cfc │ │ str r0, [r0, r0] │ │ - b.n d4378 │ │ + b.n d4388 │ │ movs r0, r0 │ │ - b.n d4f04 │ │ + b.n d4f14 │ │ lsls r5, r6, #1 │ │ lsrs r0, r0, #8 │ │ str r2, [sp, #256] @ 0x100 │ │ - b.n d4382 │ │ + b.n d4392 │ │ strh r0, [r0, #0] │ │ - b.n d4ba6 │ │ + b.n d4bb6 │ │ ands r4, r0 │ │ - b.n d439c │ │ + b.n d43ac │ │ movs r0, r0 │ │ - b.n d4f16 │ │ + b.n d4f26 │ │ lsls r0, r6, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n d43a8 │ │ + b.n d43b8 │ │ str r2, [r0, #0] │ │ - b.n d4bba │ │ + b.n d4bca │ │ strb r1, [r0, #0] │ │ - b.n d4bbe │ │ + b.n d4bce │ │ movs r4, r0 │ │ - b.n d4b22 │ │ + b.n d4b32 │ │ movs r1, r1 │ │ - b.n d4bc6 │ │ + b.n d4bd6 │ │ lsls r0, r0, #1 │ │ subs r0, r0, r0 │ │ asrs r5, r0, #4 │ │ - b.n d47bc │ │ + b.n d47cc │ │ asrs r1, r6, #24 │ │ - b.n d4bd2 │ │ + b.n d4be2 │ │ strh r1, [r3, #50] @ 0x32 │ │ @ instruction: 0xebffa010 │ │ - b.n d4dac │ │ + b.n d4dbc │ │ movs r4, r0 │ │ - b.n d4b3e │ │ + b.n d4b4e │ │ lsls r4, r4, #1 │ │ ldrh r0, [r0, #16] │ │ movs r0, #128 @ 0x80 │ │ - b.n d49a6 │ │ + b.n d49b6 │ │ asrs r5, r0, #4 │ │ - b.n d47d8 │ │ + b.n d47e8 │ │ movs r1, #2 │ │ - b.n d49c2 │ │ + b.n d49d2 │ │ movs r0, #4 │ │ - b.n d43d6 │ │ + b.n d43e6 │ │ lsls r1, r6, #24 │ │ - b.n d4b5a │ │ + b.n d4b6a │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ asrs r1, r6, #24 │ │ - b.n d4bfe │ │ + b.n d4c0e │ │ movs r1, r0 │ │ - b.n d4b66 │ │ + b.n d4b76 │ │ asrs r0, r0, #32 │ │ - b.n d5006 │ │ + b.n d5016 │ │ movs r1, r0 │ │ adds r2, #128 @ 0x80 │ │ asrs r1, r0, #32 │ │ movs r3, #0 │ │ str r1, [r0, r0] │ │ - b.n d497c │ │ + b.n d498c │ │ @ instruction: 0xfff01aff │ │ lsls r6, r2, #1 │ │ @ instruction: 0xea00c000 │ │ - b.n d4c1e │ │ + b.n d4c2e │ │ asrs r0, r0, #2 │ │ - b.n d49e2 │ │ + b.n d49f2 │ │ movs r0, #10 │ │ - b.n d4c26 │ │ + b.n d4c36 │ │ movs r0, r0 │ │ - b.n d4404 │ │ + b.n d4414 │ │ asrs r1, r0, #4 │ │ - b.n d4852 │ │ + b.n d4862 │ │ ands r0, r1 │ │ - b.n d4424 │ │ + b.n d4434 │ │ movs r0, #8 │ │ - b.n d441a │ │ + b.n d442a │ │ lsls r0, r0, #1 │ │ - b.n d442a │ │ + b.n d443a │ │ ands r2, r0 │ │ - b.n d4986 │ │ + b.n d4996 │ │ ands r0, r1 │ │ - b.n d4414 │ │ + b.n d4424 │ │ ands r4, r1 │ │ - b.n d4c46 │ │ - add r0, pc, #132 @ (adr r0, d498c ) │ │ + b.n d4c56 │ │ + add r0, pc, #132 @ (adr r0, d499c ) │ │ @ instruction: 0xebff0000 │ │ - b.n d4448 │ │ + b.n d4458 │ │ stmia r0!, {r2} │ │ - b.n d4c52 │ │ + b.n d4c62 │ │ movs r1, r0 │ │ - b.n d4e16 │ │ + b.n d4e26 │ │ asrs r4, r0, #32 │ │ - b.n d444c │ │ + b.n d445c │ │ str r1, [r0, r0] │ │ - b.n d4dc8 │ │ + b.n d4dd8 │ │ movs r0, r4 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n d4bc6 │ │ + b.n d4bd6 │ │ movs r3, r6 │ │ ldrh r0, [r0, #16] │ │ asrs r0, r0, #2 │ │ - b.n d4a2e │ │ + b.n d4a3e │ │ movs r1, #1 │ │ - b.n d4a46 │ │ + b.n d4a56 │ │ asrs r4, r1, #2 │ │ - b.n d4a4e │ │ + b.n d4a5e │ │ asrs r1, r0, #4 │ │ - b.n d4a4e │ │ + b.n d4a5e │ │ asrs r5, r0 │ │ - b.n d486c │ │ + b.n d487c │ │ adds r0, #4 │ │ - b.n d4466 │ │ + b.n d4476 │ │ lsls r4, r6, #24 │ │ - b.n d4bec │ │ + b.n d4bfc │ │ movs r4, r1 │ │ cmp r2, #0 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr3, [r2, #48] @ 0x30 │ │ - b.n d4e56 │ │ + b.n d4e66 │ │ movs r0, #8 │ │ - b.n d447a │ │ + b.n d448a │ │ movs r1, r0 │ │ - b.n d4e5a │ │ + b.n d4e6a │ │ movs r0, #8 │ │ - b.n d4460 │ │ + b.n d4470 │ │ stmia r0!, {r0} │ │ - b.n d4e7a │ │ + b.n d4e8a │ │ lsrs r0, r0, #12 │ │ stcl 0, cr1, [r1, #48] @ 0x30 │ │ - b.n d4e6c │ │ + b.n d4e7c │ │ movs r0, #4 │ │ - b.n d44a0 │ │ + b.n d44b0 │ │ movs r2, r0 │ │ - b.n d4c12 │ │ + b.n d4c22 │ │ movs r0, #3 │ │ - b.n d4cb6 │ │ + b.n d4cc6 │ │ @ instruction: 0xffef9aff │ │ movs r6, r3 │ │ and.w r6, r0, r4, ror #4 │ │ - b.n d4cc2 │ │ + b.n d4cd2 │ │ movs r1, r0 │ │ - b.n d4c2c │ │ + b.n d4c3c │ │ @ instruction: 0xffe28aff │ │ @ instruction: 0xffd3eaff │ │ movs r1, r1 │ │ - b.n d4cd2 │ │ + b.n d4ce2 │ │ strh r4, [r6, #58] @ 0x3a │ │ @ instruction: 0xebff4004 │ │ - b.n d44cc │ │ + b.n d44dc │ │ lsls r0, r0, #9 │ │ - b.n d44ce │ │ + b.n d44de │ │ str r0, [r0, r0] │ │ - b.n d44d0 │ │ + b.n d44e0 │ │ @ instruction: 0xffb8eaff │ │ movs r0, #0 │ │ - b.n d4cea │ │ + b.n d4cfa │ │ movs r1, r0 │ │ - b.n d4c4e │ │ + b.n d4c5e │ │ movs r1, r0 │ │ ldr r2, [sp, #0] │ │ movs r2, r0 │ │ - b.n d4cf6 │ │ + b.n d4d06 │ │ movs r7, r1 │ │ and.w r0, r0, r2, lsl #6 │ │ - b.n d4ac2 │ │ + b.n d4ad2 │ │ movs r2, r0 │ │ - b.n d4d02 │ │ + b.n d4d12 │ │ movs r0, #140 @ 0x8c │ │ - b.n d4ade │ │ + b.n d4aee │ │ asrs r1, r0, #4 │ │ - b.n d4ade │ │ + b.n d4aee │ │ movs r1, #2 │ │ - b.n d4ae2 │ │ + b.n d4af2 │ │ lsrs r0, r0, #12 │ │ ldcl 0, cr0, [r1, #4] │ │ - b.n d4ed6 │ │ + b.n d4ee6 │ │ adds r0, #8 │ │ - b.n d44fc │ │ + b.n d450c │ │ asrs r4, r1, #32 │ │ - b.n d4ee0 │ │ + b.n d4ef0 │ │ adds r0, #8 │ │ - b.n d44e6 │ │ + b.n d44f6 │ │ stmia r0!, {r0} │ │ - b.n d4efe │ │ + b.n d4f0e │ │ lsrs r0, r0, #12 │ │ stcl 0, cr2, [r2, #48] @ 0x30 │ │ - b.n d4ef2 │ │ + b.n d4f02 │ │ adds r0, #4 │ │ - b.n d4524 │ │ + b.n d4534 │ │ movs r3, r0 │ │ - b.n d4c96 │ │ + b.n d4ca6 │ │ @ instruction: 0xfff49aff │ │ movs r0, #1 │ │ - b.n d4e96 │ │ + b.n d4ea6 │ │ asrs r0, r7, #32 │ │ - b.n d4540 │ │ + b.n d4550 │ │ movs r0, #0 │ │ - b.n d4518 │ │ + b.n d4528 │ │ movs r4, r1 │ │ - b.n d4a8a │ │ + b.n d4a9a │ │ movs r0, #4 │ │ - b.n d4520 │ │ + b.n d4530 │ │ movs r0, #140 @ 0x8c │ │ - b.n d4b2a │ │ + b.n d4b3a │ │ asrs r1, r0, #32 │ │ - b.n d4b34 │ │ + b.n d4b44 │ │ asrs r2, r0, #4 │ │ - b.n d496e │ │ + b.n d497e │ │ movs r0, #0 │ │ - b.n d51de │ │ + b.n d51ee │ │ asrs r1, r0, #32 │ │ - b.n d5162 │ │ + b.n d5172 │ │ movs r0, #4 │ │ - b.n d453a │ │ + b.n d454a │ │ asrs r0, r1, #32 │ │ - b.n d453e │ │ + b.n d454e │ │ asrs r4, r7, #8 │ │ - b.n d455e │ │ + b.n d456e │ │ movs r1, r0 │ │ - b.n d4b32 │ │ + b.n d4b42 │ │ lsls r4, r7, #8 │ │ - b.n d4546 │ │ - beq.n d4a70 │ │ - b.n d4ed0 │ │ + b.n d4556 │ │ + beq.n d4a80 │ │ + b.n d4ee0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r0, r1, r2, r7, r8, lr, pc} │ │ + ldmia.w sp!, {r0, r1, r2, r4, r5, r6, r8, lr, pc} │ │ @ instruction: 0xfff44bf0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n d4f64 │ │ - beq.n d4a7c │ │ - b.n d4ee8 │ │ + b.n d4f74 │ │ + beq.n d4a8c │ │ + b.n d4ef8 │ │ ands r0, r0 │ │ - b.n d4d92 │ │ + b.n d4da2 │ │ lsls r0, r2, #2 │ │ - b.n d457a │ │ + b.n d458a │ │ str r1, [r0, #0] │ │ - b.n d4d9a │ │ + b.n d4daa │ │ asrs r0, r0, #32 │ │ - b.n d519e │ │ + b.n d51ae │ │ asrs r0, r0, #32 │ │ - b.n d456a │ │ + b.n d457a │ │ str r2, [r0, r0] │ │ - b.n d4da6 │ │ + b.n d4db6 │ │ strb r4, [r0, #0] │ │ - b.n d458a │ │ - bl 53056a │ │ + b.n d459a │ │ + bl 53057a │ │ lsls r4, r1, #2 │ │ - b.n d4596 │ │ + b.n d45a6 │ │ strb r4, [r0, #0] │ │ - b.n d457e │ │ + b.n d458e │ │ movs r0, #1 │ │ - b.n d461a │ │ + b.n d462a │ │ asrs r2, r6, #1 │ │ - b.n d47dc │ │ + b.n d47ec │ │ movs r1, r0 │ │ - b.n d5164 │ │ + b.n d5174 │ │ movs r1, r3 │ │ - bge.n d4a86 │ │ + bge.n d4a96 │ │ asrs r0, r1, #2 │ │ - b.n d45b4 │ │ + b.n d45c4 │ │ lsls r4, r0, #1 │ │ - b.n d45ba │ │ + b.n d45ca │ │ asrs r0, r4, #32 │ │ - b.n d4f94 │ │ + b.n d4fa4 │ │ movs r0, #48 @ 0x30 │ │ - b.n d4f96 │ │ + b.n d4fa6 │ │ movs r5, r0 │ │ - b.n d4dda │ │ + b.n d4dea │ │ strh r7, [r4, #6] │ │ @ instruction: 0xebff0000 │ │ - b.n d5150 │ │ + b.n d5160 │ │ movs r0, r0 │ │ - b.n d45ae │ │ + b.n d45be │ │ movs r6, r1 │ │ subs r0, r0, r0 │ │ lsls r0, r2, #2 │ │ - b.n d45d8 │ │ + b.n d45e8 │ │ movs r4, r0 │ │ - b.n d45d2 │ │ - bl 5305b2 │ │ + b.n d45e2 │ │ + bl 5305c2 │ │ asrs r4, r0, #1 │ │ - b.n d45e6 │ │ + b.n d45f6 │ │ movs r0, #140 @ 0x8c │ │ - b.n d45e8 │ │ + b.n d45f8 │ │ movs r1, r0 │ │ - b.n d4fc2 │ │ + b.n d4fd2 │ │ movs r1, r0 │ │ - b.n d5166 │ │ + b.n d5176 │ │ asrs r0, r6, #32 │ │ - b.n d466c │ │ + b.n d467c │ │ movs r1, r0 │ │ str r3, [sp, #640] @ 0x280 │ │ movs r4, r0 │ │ - b.n d45da │ │ + b.n d45ea │ │ asrs r0, r0, #2 │ │ - b.n d51d8 │ │ + b.n d51e8 │ │ asrs r1, r0, #32 │ │ - b.n d465e │ │ + b.n d466e │ │ asrs r0, r2, #2 │ │ - b.n d4608 │ │ - bl 5305de │ │ + b.n d4618 │ │ + bl 5305ee │ │ movs r4, r0 │ │ - b.n d45e8 │ │ - beq.n d4b18 │ │ - b.n d4f80 │ │ + b.n d45f8 │ │ + beq.n d4b28 │ │ + b.n d4f90 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r2, r6} │ │ - b.n d461e │ │ + b.n d462e │ │ lsls r0, r6, #14 │ │ - b.n d4e96 │ │ + b.n d4ea6 │ │ adds r0, #128 @ 0x80 │ │ - b.n d51fa │ │ + b.n d520a │ │ movs r2, r0 │ │ - b.n d4da4 │ │ + b.n d4db4 │ │ @ instruction: 0xfff80aff │ │ adds r0, #132 @ 0x84 │ │ - b.n d4630 │ │ + b.n d4640 │ │ movs r0, r0 │ │ - b.n d51b0 │ │ + b.n d51c0 │ │ adds r1, #4 │ │ asrs r5, r2, #22 │ │ movs r6, r0 │ │ asrs r3, r2, #5 │ │ movs r3, r2 │ │ subs r0, r0, r0 │ │ movs r0, #252 @ 0xfc │ │ - b.n d4658 │ │ + b.n d4668 │ │ movs r0, #2 │ │ - b.n d4c3c │ │ + b.n d4c4c │ │ movs r0, #90 @ 0x5a │ │ - b.n d46c6 │ │ + b.n d46d6 │ │ movs r3, r0 │ │ - b.n d51ca │ │ + b.n d51da │ │ movs r7, r2 │ │ cmp r2, #0 │ │ lsls r0, r2, #2 │ │ - b.n d4658 │ │ + b.n d4668 │ │ movs r0, #127 @ 0x7f │ │ - b.n d5272 │ │ + b.n d5282 │ │ strb r1, [r0, #0] │ │ - b.n d5276 │ │ + b.n d5286 │ │ movs r4, r0 │ │ - b.n d465a │ │ - bl 53063a │ │ + b.n d466a │ │ + bl 53064a │ │ asrs r4, r1, #2 │ │ - b.n d466c │ │ + b.n d467c │ │ movs r1, r0 │ │ - b.n d5046 │ │ + b.n d5056 │ │ movs r1, r0 │ │ - b.n d51ea │ │ + b.n d51fa │ │ movs r0, #1 │ │ - b.n d46d0 │ │ + b.n d46e0 │ │ movs r7, r0 │ │ str r1, [sp, #640] @ 0x280 │ │ asrs r0, r2, #2 │ │ - b.n d4680 │ │ + b.n d4690 │ │ movs r4, r0 │ │ - b.n d4662 │ │ - bl 53065a │ │ + b.n d4672 │ │ + bl 53066a │ │ movs r4, r0 │ │ - b.n d4664 │ │ + b.n d4674 │ │ @ instruction: 0xffc7eaff │ │ asrs r0, r4, #2 │ │ - b.n d46a8 │ │ + b.n d46b8 │ │ asrs r1, r0, #32 │ │ - b.n d4c8c │ │ + b.n d4c9c │ │ asrs r2, r3, #1 │ │ - b.n d4714 │ │ + b.n d4724 │ │ movs r0, r0 │ │ - b.n d5218 │ │ + b.n d5228 │ │ movs r1, r3 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #31 │ │ - b.n d518e │ │ + b.n d519e │ │ lsrs r7, r7, #31 │ │ - b.n d5220 │ │ + b.n d5230 │ │ movs r0, r0 │ │ - b.n d468e │ │ + b.n d469e │ │ @ instruction: 0xffd6eaff │ │ stmia r0!, {r2, r3, r7} │ │ - b.n d46cc │ │ + b.n d46dc │ │ strb r7, [r7, #1] │ │ - b.n d4f94 │ │ - b.n d4b9c │ │ - b.n d46c2 │ │ + b.n d4fa4 │ │ + b.n d4bac │ │ + b.n d46d2 │ │ strh r0, [r2, #30] │ │ - b.n d4f26 │ │ + b.n d4f36 │ │ stmia r0!, {r2, r3} │ │ - b.n d4cbc │ │ + b.n d4ccc │ │ movs r0, #124 @ 0x7c │ │ - b.n d46e0 │ │ + b.n d46f0 │ │ lsrs r2, r0, #32 │ │ - b.n d51e2 │ │ + b.n d51f2 │ │ asrs r0, r7, #1 │ │ - b.n d46e8 │ │ + b.n d46f8 │ │ adds r0, #120 @ 0x78 │ │ - b.n d46ec │ │ + b.n d46fc │ │ movs r0, #2 │ │ - b.n d4cd0 │ │ + b.n d4ce0 │ │ movs r0, #12 │ │ lsls r0, r4, #6 │ │ asrs r1, r0, #32 │ │ - b.n d4cd8 │ │ + b.n d4ce8 │ │ adds r0, #3 │ │ - b.n d4cdc │ │ + b.n d4cec │ │ movs r4, r2 │ │ - b.n d46dc │ │ + b.n d46ec │ │ movs r0, #0 │ │ - b.n d46e0 │ │ + b.n d46f0 │ │ movs r3, r0 │ │ - b.n d530a │ │ + b.n d531a │ │ movs r0, #112 @ 0x70 │ │ - b.n d530e │ │ + b.n d531e │ │ strh r0, [r1, #0] │ │ - b.n d46ec │ │ + b.n d46fc │ │ str r0, [sp, #48] @ 0x30 │ │ - b.n d46f0 │ │ + b.n d4700 │ │ strb r0, [r2, #0] │ │ - b.n d46f4 │ │ - adds r2, r2, r6 │ │ + b.n d4704 │ │ + adds r1, r2, r6 │ │ @ instruction: 0xebffffd1 │ │ @ instruction: 0xeaff1028 │ │ - b.n d4724 │ │ + b.n d4734 │ │ movs r0, #127 @ 0x7f │ │ - b.n d4fee │ │ + b.n d4ffe │ │ str r0, [r2, #60] @ 0x3c │ │ - b.n d4f7a │ │ + b.n d4f8a │ │ adds r0, #32 │ │ - b.n d4730 │ │ + b.n d4740 │ │ asrs r1, r0, #32 │ │ - b.n d4d14 │ │ + b.n d4d24 │ │ lsls r5, r0, #3 │ │ stmia.w sp, {r0} │ │ - b.n d533e │ │ + b.n d534e │ │ adds r0, #3 │ │ - b.n d4d20 │ │ + b.n d4d30 │ │ movs r0, #105 @ 0x69 │ │ - b.n d5346 │ │ - adds r7, r0, r6 │ │ + b.n d5356 │ │ + adds r6, r0, r6 │ │ @ instruction: 0xebffffda │ │ - @ instruction: 0xeaff9ce0 │ │ + @ instruction: 0xeaff9cf0 │ │ movs r0, r0 │ │ - add r5, sp, #572 @ 0x23c │ │ - @ instruction: 0xfff39b3b │ │ - vcvt.u16.f16 d25, d16, #13 │ │ - movs r0, r0 │ │ - ldr r3, [sp, #880] @ 0x370 │ │ - vsra.u64 q10, q13, #13 │ │ - vqrdmulh.s q13, , d11[0] │ │ - @ instruction: 0xfff363e9 │ │ - vtbl.8 d18, {d3-d4}, d4 │ │ - bcc.n d4c3c │ │ - movs r2, #0 │ │ - subs r1, #4 │ │ - str.w r2, [r0], #4 │ │ - cmp r1, #3 │ │ - bhi.n d4c32 │ │ - adds r2, r0, r1 │ │ - cmp r0, r2 │ │ - it cs │ │ - bxcs lr │ │ - movs r2, #0 │ │ - strb.w r2, [r0], #1 │ │ - subs r1, #1 │ │ - bne.n d4c46 │ │ - bx lr │ │ - cmp r2, #4 │ │ + add r6, sp, #84 @ 0x54 │ │ + @ instruction: 0xfff39d05 │ │ + vqrdmulh.s , , d0[0] │ │ + movs r0, r0 │ │ + ldr r5, [sp, #664] @ 0x298 │ │ + vsra.u32 d20, d21, #13 │ │ + vcvt.f32.u32 q13, , #13 │ │ + vrsra.u32 d22, d8, #13 │ │ + vtbl.8 d18, {d3-d5}, d4 │ │ it cc │ │ - bcc.w d4c6a │ │ + bcc.w d4c56 │ │ ldr.w r3, [r1], #4 │ │ subs r2, #4 │ │ str.w r3, [r0], #4 │ │ cmp r2, #3 │ │ - bhi.n d4c58 │ │ - b.w d4c6a │ │ + bhi.n d4c44 │ │ + b.w d4c56 │ │ push {r4, r5, r6, lr} │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #20 │ │ cmp r2, #16 │ │ - bcc.n d4cca │ │ + bcc.n d4cb6 │ │ negs r3, r0 │ │ and.w r8, r3, #3 │ │ add.w lr, r0, r8 │ │ cmp r0, lr │ │ - bcs.n d4c96 │ │ + bcs.n d4c82 │ │ mov r3, r8 │ │ mov r6, r0 │ │ mov r5, r1 │ │ ldrb.w r4, [r5], #1 │ │ subs r3, #1 │ │ strb.w r4, [r6], #1 │ │ - bne.n d4c8a │ │ + bne.n d4c76 │ │ sub.w ip, r2, r8 │ │ add r1, r8 │ │ bic.w r2, ip, #3 │ │ ands.w r5, r1, #3 │ │ add.w r3, lr, r2 │ │ - bne.n d4ce6 │ │ + bne.n d4cd2 │ │ cmp lr, r3 │ │ - bcs.n d4cbc │ │ + bcs.n d4ca8 │ │ mov r4, r1 │ │ ldr.w r5, [r4], #4 │ │ str.w r5, [lr], #4 │ │ cmp lr, r3 │ │ - bcc.n d4cb0 │ │ + bcc.n d4c9c │ │ add r1, r2 │ │ and.w r2, ip, #3 │ │ adds r6, r3, r2 │ │ cmp r3, r6 │ │ - bcc.n d4cd2 │ │ - b.n d4cde │ │ + bcc.n d4cbe │ │ + b.n d4cca │ │ mov r3, r0 │ │ adds r6, r3, r2 │ │ cmp r3, r6 │ │ - bcs.n d4cde │ │ + bcs.n d4cca │ │ ldrb.w r6, [r1], #1 │ │ subs r2, #1 │ │ strb.w r6, [r3], #1 │ │ - bne.n d4cd2 │ │ + bne.n d4cbe │ │ add sp, #20 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, pc} │ │ mov.w fp, #0 │ │ rsb sl, r5, #4 │ │ add r6, sp, #16 │ │ str.w fp, [sp, #16] │ │ @@ -282691,49 +282555,49 @@ │ │ ldrhmi.w r4, [r1, fp] │ │ strhmi.w r4, [r8, fp] │ │ cmp r6, r3 │ │ ldr r6, [sp, #4] │ │ ldr r4, [sp, #16] │ │ rsb r8, r6, #0 │ │ str.w r8, [sp] │ │ - bcs.n d4d56 │ │ + bcs.n d4d42 │ │ and.w fp, r8, #24 │ │ ldr.w r8, [r9, #4]! │ │ lsrs r4, r6 │ │ add.w sl, lr, #4 │ │ lsl.w r6, r8, fp │ │ orrs r4, r6 │ │ ldr r6, [sp, #4] │ │ str.w r4, [lr], #8 │ │ mov r4, r8 │ │ cmp lr, r3 │ │ mov lr, sl │ │ - bcc.n d4d36 │ │ - b.n d4d5a │ │ + bcc.n d4d22 │ │ + b.n d4d46 │ │ mov sl, lr │ │ mov r8, r4 │ │ mov.w lr, #0 │ │ cmp r5, #1 │ │ strb.w lr, [sp, #12] │ │ strb.w lr, [sp, #10] │ │ - bne.n d4d74 │ │ + bne.n d4d60 │ │ add r5, sp, #12 │ │ mov.w fp, #0 │ │ movs r4, #0 │ │ - b.n d4d8a │ │ + b.n d4d76 │ │ ldrb.w r4, [r9, #5] │ │ add.w r5, sp, #10 │ │ ldrb.w lr, [r9, #4] │ │ strb.w lr, [sp, #12] │ │ mov.w fp, r4, lsl #8 │ │ movs r4, #2 │ │ lsls r6, r1, #31 │ │ - bne.n d4d92 │ │ + bne.n d4d7e │ │ movs r4, #0 │ │ - b.n d4da4 │ │ + b.n d4d90 │ │ add.w r6, r9, #4 │ │ ldrb r6, [r6, r4] │ │ strb r6, [r5, #0] │ │ ldrb.w r4, [sp, #10] │ │ ldrb.w lr, [sp, #12] │ │ lsls r4, r4, #16 │ │ orr.w r4, r4, fp │ │ @@ -282741,125 +282605,125 @@ │ │ orr.w r6, r4, lr │ │ ldr r4, [sp, #0] │ │ and.w r4, r4, #24 │ │ lsr.w r5, r8, r5 │ │ lsls r6, r4 │ │ orrs r6, r5 │ │ str.w r6, [sl] │ │ - b.n d4cbc │ │ + b.n d4ca8 │ │ push {r4, r5, r6, lr} │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #40 @ 0x28 │ │ subs r3, r0, r1 │ │ cmp r3, r2 │ │ - bcs.n d4e34 │ │ + bcs.n d4e20 │ │ adds r5, r1, r2 │ │ add.w fp, r0, r2 │ │ cmp r2, #16 │ │ - bcc.n d4e90 │ │ + bcc.n d4e7c │ │ and.w ip, fp, #3 │ │ bic.w lr, fp, #3 │ │ rsb r8, ip, #0 │ │ cmp lr, fp │ │ - bcs.n d4dfa │ │ + bcs.n d4de6 │ │ subs r4, r5, #1 │ │ mov r6, fp │ │ ldrb.w r3, [r4], #-1 │ │ strb.w r3, [r6, #-1]! │ │ cmp lr, r6 │ │ - bcc.n d4dee │ │ + bcc.n d4dda │ │ sub.w ip, r2, ip │ │ add r5, r8 │ │ bic.w r4, ip, #3 │ │ ands.w sl, r5, #3 │ │ sub.w r3, lr, r4 │ │ rsb r9, r4, #0 │ │ - bne.n d4ec4 │ │ + bne.n d4eb0 │ │ cmp r3, lr │ │ - bcs.n d4e26 │ │ + bcs.n d4e12 │ │ add r1, ip │ │ subs r1, #4 │ │ ldr.w r2, [r1], #-4 │ │ str.w r2, [lr, #-4]! │ │ cmp r3, lr │ │ - bcc.n d4e1a │ │ + bcc.n d4e06 │ │ add r5, r9 │ │ and.w r2, ip, #3 │ │ subs r1, r3, r2 │ │ cmp r1, r3 │ │ - bcc.n d4e98 │ │ - b.n d4ebc │ │ + bcc.n d4e84 │ │ + b.n d4ea8 │ │ cmp r2, #16 │ │ - bcc.n d4ea8 │ │ + bcc.n d4e94 │ │ negs r3, r0 │ │ and.w ip, r3, #3 │ │ add.w r8, r0, ip │ │ cmp r0, r8 │ │ - bcs.n d4e58 │ │ + bcs.n d4e44 │ │ mov r3, ip │ │ mov r5, r0 │ │ mov r4, r1 │ │ ldrb.w r6, [r4], #1 │ │ subs r3, #1 │ │ strb.w r6, [r5], #1 │ │ - bne.n d4e4c │ │ + bne.n d4e38 │ │ sub.w r2, r2, ip │ │ add.w lr, r1, ip │ │ bic.w r5, r2, #3 │ │ ands.w r4, lr, #3 │ │ add.w r3, r8, r5 │ │ - bne.n d4eea │ │ + bne.n d4ed6 │ │ cmp r8, r3 │ │ - bcs.n d4e80 │ │ + bcs.n d4e6c │ │ mov r1, lr │ │ ldr.w r6, [r1], #4 │ │ str.w r6, [r8], #4 │ │ cmp r8, r3 │ │ - bcc.n d4e74 │ │ + bcc.n d4e60 │ │ add.w r1, lr, r5 │ │ and.w r2, r2, #3 │ │ adds r6, r3, r2 │ │ cmp r3, r6 │ │ - bcc.n d4eb0 │ │ - b.n d4ebc │ │ + bcc.n d4e9c │ │ + b.n d4ea8 │ │ mov r3, fp │ │ subs r1, r3, r2 │ │ cmp r1, r3 │ │ - bcs.n d4ebc │ │ + bcs.n d4ea8 │ │ subs r2, r5, #1 │ │ ldrb.w r6, [r2], #-1 │ │ strb.w r6, [r3, #-1]! │ │ cmp r1, r3 │ │ - bcc.n d4e9a │ │ - b.n d4ebc │ │ + bcc.n d4e86 │ │ + b.n d4ea8 │ │ mov r3, r0 │ │ adds r6, r3, r2 │ │ cmp r3, r6 │ │ - bcs.n d4ebc │ │ + bcs.n d4ea8 │ │ ldrb.w r6, [r1], #1 │ │ subs r2, #1 │ │ strb.w r6, [r3], #1 │ │ - bne.n d4eb0 │ │ + bne.n d4e9c │ │ add sp, #40 @ 0x28 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, pc} │ │ sub.w r6, r5, sl │ │ movs r4, #0 │ │ str r6, [sp, #8] │ │ mov.w r6, sl, lsl #3 │ │ cmp.w sl, #1 │ │ strb.w r4, [sp, #24] │ │ strb.w r4, [sp, #22] │ │ str r6, [sp, #16] │ │ - bne.n d4f5c │ │ + bne.n d4f48 │ │ add r6, sp, #24 │ │ str r6, [sp, #12] │ │ movs r6, #0 │ │ str r6, [sp, #4] │ │ - b.n d4ff6 │ │ + b.n d4fe2 │ │ mov.w fp, #0 │ │ rsb r9, r4, #4 │ │ add r1, sp, #36 @ 0x24 │ │ str.w fp, [sp, #36] @ 0x24 │ │ add.w ip, r1, r4 │ │ movs.w r1, r9, lsl #31 │ │ ittt ne │ │ @@ -282873,66 +282737,66 @@ │ │ sub.w sl, lr, r4 │ │ add.w r6, r8, #4 │ │ ldr.w r9, [sp, #36] @ 0x24 │ │ lsls r1, r4, #3 │ │ cmp r6, r3 │ │ rsb r6, r1, #0 │ │ str r6, [sp, #16] │ │ - bcs.n d4f72 │ │ + bcs.n d4f5e │ │ and.w fp, r6, #24 │ │ ldr.w ip, [sl, #4]! │ │ lsr.w r6, r9, r1 │ │ mov r9, r1 │ │ lsl.w r1, ip, fp │ │ orrs r1, r6 │ │ add.w r6, r8, #4 │ │ str.w r1, [r8], #8 │ │ mov r1, r9 │ │ cmp r8, r3 │ │ mov r8, r6 │ │ mov r9, ip │ │ - bcc.n d4f38 │ │ - b.n d4f76 │ │ + bcc.n d4f24 │ │ + b.n d4f62 │ │ ldr r6, [sp, #8] │ │ ldrb r4, [r6, #0] │ │ ldrb r6, [r6, #1] │ │ str r6, [sp, #4] │ │ lsls r6, r5, #31 │ │ str r4, [sp, #12] │ │ strb.w r4, [sp, #24] │ │ - bne.n d4fee │ │ + bne.n d4fda │ │ movs r4, #0 │ │ - b.n d500a │ │ + b.n d4ff6 │ │ mov r6, r8 │ │ mov ip, r9 │ │ mov.w r8, #0 │ │ cmp r4, #1 │ │ strb.w r8, [sp, #28] │ │ strb.w r8, [sp, #26] │ │ - bne.n d4f92 │ │ + bne.n d4f7e │ │ add r4, sp, #28 │ │ str r4, [sp, #8] │ │ movs r4, #0 │ │ str r4, [sp, #12] │ │ str r4, [sp, #4] │ │ - b.n d4fac │ │ + b.n d4f98 │ │ ldrb.w r4, [sl, #5] │ │ ldrb.w r8, [sl, #4] │ │ strb.w r8, [sp, #28] │ │ lsls r4, r4, #8 │ │ str r4, [sp, #12] │ │ movs r4, #2 │ │ str r4, [sp, #4] │ │ add.w r4, sp, #26 │ │ str r4, [sp, #8] │ │ mov r9, r6 │ │ movs.w fp, lr, lsl #31 │ │ - bne.n d4fb8 │ │ + bne.n d4fa4 │ │ movs r4, #0 │ │ - b.n d4fce │ │ + b.n d4fba │ │ ldr r6, [sp, #4] │ │ add.w r4, sl, #4 │ │ ldrb r4, [r4, r6] │ │ ldr r6, [sp, #8] │ │ strb r4, [r6, #0] │ │ ldrb.w r4, [sp, #26] │ │ ldrb.w r8, [sp, #28] │ │ @@ -282942,15 +282806,15 @@ │ │ orrs r4, r1 │ │ ldr r1, [sp, #16] │ │ orr.w r4, r4, r8 │ │ and.w r1, r1, #24 │ │ lsl.w r1, r4, r1 │ │ orr.w r1, r1, ip │ │ str.w r1, [r9] │ │ - b.n d4e80 │ │ + b.n d4e6c │ │ add.w r4, sp, #22 │ │ str r4, [sp, #12] │ │ movs r4, #2 │ │ ldr r6, [sp, #8] │ │ ldrb r4, [r6, r4] │ │ ldr r6, [sp, #12] │ │ strb r4, [r6, #0] │ │ @@ -282965,15 +282829,15 @@ │ │ orrs r6, r4 │ │ adds r4, r3, #4 │ │ cmp r4, lr │ │ str r4, [sp, #12] │ │ ldr r4, [sp, #16] │ │ rsb r4, r4, #0 │ │ str r4, [sp, #4] │ │ - bcs.n d506a │ │ + bcs.n d5056 │ │ sub.w r2, r2, sl │ │ add r2, r1 │ │ ldr r1, [sp, #4] │ │ and.w r1, r1, #24 │ │ str r1, [sp, #8] │ │ ldr r4, [sp, #8] │ │ add.w r1, r2, r8 │ │ @@ -282986,18 +282850,18 @@ │ │ add.w r4, fp, r8 │ │ sub.w fp, fp, #4 │ │ add.w lr, fp, r8 │ │ str.w r6, [r4, #-4] │ │ mov r6, r1 │ │ ldr r4, [sp, #12] │ │ cmp r4, lr │ │ - bcc.n d5036 │ │ + bcc.n d5022 │ │ add r2, r8 │ │ str r2, [sp, #8] │ │ - b.n d506c │ │ + b.n d5058 │ │ mov r1, r6 │ │ add r2, sp, #32 │ │ movs r4, #0 │ │ add.w r8, r2, sl │ │ ldr r2, [sp, #8] │ │ str r4, [sp, #32] │ │ add r2, sl │ │ @@ -283016,59 +282880,96 @@ │ │ ldr r4, [sp, #16] │ │ lsrs r2, r4 │ │ ldr r4, [sp, #4] │ │ and.w r4, r4, #24 │ │ lsls r1, r4 │ │ orrs r1, r2 │ │ str.w r1, [lr, #-4] │ │ - b.n d4e26 │ │ + b.n d4e12 │ │ + b.w d4dae │ │ + cmp r2, #4 │ │ + it cc │ │ + bcc.w d4c56 │ │ + ldr.w r3, [r1], #4 │ │ + subs r2, #4 │ │ + str.w r3, [r0], #4 │ │ + cmp r2, #3 │ │ + bhi.n d50aa │ │ + b.w d4c56 │ │ + lsls r3, r2, #26 │ │ + itttt mi │ │ + andmi.w r0, r2, #31 │ │ + lsrmi.w r0, r1, r0 │ │ + movmi r1, #0 │ │ + bxmi lr │ │ + cmp r2, #0 │ │ + it eq │ │ + bxeq lr │ │ + and.w r3, r2, #31 │ │ + negs r2, r2 │ │ + and.w r2, r2, #31 │ │ + lsrs r0, r3 │ │ + lsl.w r2, r1, r2 │ │ + orrs r0, r2 │ │ + lsrs r1, r3 │ │ + bx lr │ │ + orrs.w r2, r0, r1 │ │ + ittt eq │ │ + vldreq d16, [pc, #120] @ d5168 │ │ + vmoveq r0, r1, d16 │ │ + bxeq lr │ │ push {r7, lr} │ │ - cmp r1, #16 │ │ - bcc.n d50f6 │ │ - negs r3, r0 │ │ - and.w ip, r3, #3 │ │ - add.w lr, r0, ip │ │ - cmp r0, lr │ │ - bcs.n d50d0 │ │ - mov r3, ip │ │ - strb.w r2, [r0], #1 │ │ - subs r3, #1 │ │ - bne.n d50c8 │ │ - sub.w r1, r1, ip │ │ - bic.w r0, r1, #3 │ │ - add r0, lr │ │ - cmp lr, r0 │ │ - bcs.n d50f2 │ │ - uxtb.w ip, r2 │ │ - mov.w r3, #16843009 @ 0x1010101 │ │ - mul.w r3, ip, r3 │ │ - str.w r3, [lr], #4 │ │ - cmp lr, r0 │ │ - bcc.n d50ea │ │ - and.w r1, r1, #3 │ │ - adds r3, r0, r1 │ │ - cmp r0, r3 │ │ - it cs │ │ - popcs {r7, pc} │ │ - strb.w r2, [r0], #1 │ │ - subs r1, #1 │ │ - bne.n d50fe │ │ - pop {r7, pc} │ │ + clz r2, r0 │ │ + cmp r1, #0 │ │ + add.w r2, r2, #32 │ │ + it ne │ │ + clzne r2, r1 │ │ + rsb r3, r2, #32 │ │ + lsls r1, r2 │ │ + lsr.w r3, r0, r3 │ │ + orrs r1, r3 │ │ + subs.w r3, r2, #32 │ │ + it pl │ │ + lslpl.w r1, r0, r3 │ │ + lsl.w r0, r0, r2 │ │ + it pl │ │ + movpl r0, #0 │ │ + lsrs r3, r0, #11 │ │ + orr.w lr, r3, r1, lsl #21 │ │ + lsls r0, r0, #21 │ │ + lsrs r1, r1, #11 │ │ + mvn.w ip, lr │ │ + and.w r3, ip, r0, lsr #31 │ │ + negs r3, r3 │ │ + sbc.w r0, r0, #0 │ │ + movw r3, #1086 @ 0x43e │ │ + subs r2, r3, r2 │ │ + adds.w r0, lr, r0, lsr #31 │ │ + add.w r1, r1, r2, lsl #20 │ │ + movw r2, #0 │ │ + movt r2, #65520 @ 0xfff0 │ │ + adcs r1, r2 │ │ + vmov d16, r0, r1 │ │ + ldmia.w sp!, {r7, lr} │ │ + vmov r0, r1, d16 │ │ + bx lr │ │ + nop │ │ + ... │ │ bic.w r2, r1, #2147483648 @ 0x80000000 │ │ movs r3, #0 │ │ movt r3, #16368 @ 0x3ff0 │ │ cmp r2, r3 │ │ - bcs.n d511c │ │ + bcs.n d5184 │ │ movs r0, #0 │ │ movs r1, #0 │ │ bx lr │ │ movs r3, #0 │ │ movt r3, #17376 @ 0x43e0 │ │ cmp r2, r3 │ │ - bcs.n d5170 │ │ + bcs.n d51d8 │ │ lsls r3, r2, #11 │ │ orr.w r3, r3, r0, lsr #21 │ │ lsls r0, r0, #11 │ │ orr.w ip, r3, #2147483648 @ 0x80000000 │ │ movs r3, #62 @ 0x3e │ │ sub.w r2, r3, r2, lsr #20 │ │ and.w r2, r2, #63 @ 0x3f │ │ @@ -283091,71 +282992,136 @@ │ │ movpl r0, r3 │ │ movpl r1, r2 │ │ bx lr │ │ movs r3, #0 │ │ subs r0, #1 │ │ movt r3, #32752 @ 0x7ff0 │ │ sbcs.w r0, r2, r3 │ │ - bcs.n d5116 │ │ + bcs.n d517e │ │ mvn.w r0, #2147483648 @ 0x80000000 │ │ eor.w r2, r0, r1, asr #31 │ │ mvn.w r0, r1, asr #31 │ │ mov r1, r2 │ │ bx lr │ │ + b.w d4dae │ │ + cmp r1, #4 │ │ + bcc.n d520a │ │ + movs r2, #0 │ │ + subs r1, #4 │ │ + str.w r2, [r0], #4 │ │ + cmp r1, #3 │ │ + bhi.n d5200 │ │ + adds r2, r0, r1 │ │ + cmp r0, r2 │ │ + it cs │ │ + bxcs lr │ │ + movs r2, #0 │ │ + strb.w r2, [r0], #1 │ │ + subs r1, #1 │ │ + bne.n d5214 │ │ + bx lr │ │ cmp r1, #4 │ │ - bcc.n d519e │ │ + bcc.n d522e │ │ movs r2, #0 │ │ subs r1, #4 │ │ str.w r2, [r0], #4 │ │ cmp r1, #3 │ │ - bhi.n d5194 │ │ + bhi.n d5224 │ │ adds r2, r0, r1 │ │ cmp r0, r2 │ │ it cs │ │ bxcs lr │ │ movs r2, #0 │ │ strb.w r2, [r0], #1 │ │ subs r1, #1 │ │ - bne.n d51a8 │ │ + bne.n d5238 │ │ bx lr │ │ + push {r7, lr} │ │ + cmp r1, #16 │ │ + bcc.n d5280 │ │ + negs r2, r0 │ │ + and.w ip, r2, #3 │ │ + add.w r2, r0, ip │ │ + cmp r0, r2 │ │ + bcs.n d5264 │ │ + mov.w lr, #0 │ │ + mov r3, ip │ │ + strb.w lr, [r0], #1 │ │ + subs r3, #1 │ │ + bne.n d525c │ │ + sub.w r1, r1, ip │ │ + bic.w r0, r1, #3 │ │ + add r0, r2 │ │ + cmp r2, r0 │ │ + bcs.n d527c │ │ + movs r3, #0 │ │ + str.w r3, [r2], #4 │ │ + cmp r2, r0 │ │ + bcc.n d5274 │ │ + and.w r1, r1, #3 │ │ + adds r2, r0, r1 │ │ + cmp r0, r2 │ │ + it cs │ │ + popcs {r7, pc} │ │ + movs r2, #0 │ │ + strb.w r2, [r0], #1 │ │ + subs r1, #1 │ │ + bne.n d528a │ │ + pop {r7, pc} │ │ + push {r7, lr} │ │ + cmp r1, #16 │ │ + bcc.n d52d8 │ │ + negs r3, r0 │ │ + and.w ip, r3, #3 │ │ + add.w lr, r0, ip │ │ + cmp r0, lr │ │ + bcs.n d52b2 │ │ + mov r3, ip │ │ + strb.w r2, [r0], #1 │ │ + subs r3, #1 │ │ + bne.n d52aa │ │ + sub.w r1, r1, ip │ │ + bic.w r0, r1, #3 │ │ + add r0, lr │ │ + cmp lr, r0 │ │ + bcs.n d52d4 │ │ + uxtb.w ip, r2 │ │ + mov.w r3, #16843009 @ 0x1010101 │ │ + mul.w r3, ip, r3 │ │ + str.w r3, [lr], #4 │ │ + cmp lr, r0 │ │ + bcc.n d52cc │ │ + and.w r1, r1, #3 │ │ + adds r3, r0, r1 │ │ + cmp r0, r3 │ │ + it cs │ │ + popcs {r7, pc} │ │ + strb.w r2, [r0], #1 │ │ + subs r1, #1 │ │ + bne.n d52e0 │ │ + pop {r7, pc} │ │ + b.w d4c56 │ │ cmp r1, #4 │ │ - bcc.n d51cc │ │ + bcc.n d5308 │ │ uxtb.w ip, r2 │ │ mov.w r3, #16843009 @ 0x1010101 │ │ mul.w r3, ip, r3 │ │ subs r1, #4 │ │ str.w r3, [r0], #4 │ │ cmp r1, #3 │ │ - bhi.n d51c2 │ │ + bhi.n d52fe │ │ adds r3, r0, r1 │ │ cmp r0, r3 │ │ it cs │ │ bxcs lr │ │ strb.w r2, [r0], #1 │ │ subs r1, #1 │ │ - bne.n d51d4 │ │ - bx lr │ │ - lsls r3, r2, #26 │ │ - itttt mi │ │ - andmi.w r0, r2, #31 │ │ - lsrmi.w r0, r1, r0 │ │ - movmi r1, #0 │ │ - bxmi lr │ │ - cmp r2, #0 │ │ - it eq │ │ - bxeq lr │ │ - and.w r3, r2, #31 │ │ - negs r2, r2 │ │ - and.w r2, r2, #31 │ │ - lsrs r0, r3 │ │ - lsl.w r2, r1, r2 │ │ - orrs r0, r2 │ │ - lsrs r1, r3 │ │ + bne.n d5310 │ │ bx lr │ │ - b.w d4dc2 │ │ + b.w d4dae │ │ lsls r3, r2, #26 │ │ itttt mi │ │ andmi.w r1, r2, #31 │ │ lslmi.w r1, r0, r1 │ │ movmi r0, #0 │ │ bxmi lr │ │ cmp r2, #0 │ │ @@ -283166,15 +283132,15 @@ │ │ and.w r2, r2, #31 │ │ lsls r1, r3 │ │ lsr.w r2, r0, r2 │ │ orrs r1, r2 │ │ lsls r0, r3 │ │ bx lr │ │ orrs.w r2, r0, r1 │ │ - beq.n d52be │ │ + beq.n d53ce │ │ push {r4, lr} │ │ eor.w r0, r0, r1, asr #31 │ │ eor.w r3, r1, r1, asr #31 │ │ subs.w lr, r0, r1, asr #31 │ │ clz r2, lr │ │ sbc.w r3, r3, r1, asr #31 │ │ adds r2, #32 │ │ @@ -283211,121 +283177,33 @@ │ │ orrs r1, r2 │ │ bx lr │ │ movs r0, #0 │ │ movs r2, #0 │ │ and.w r1, r1, #2147483648 @ 0x80000000 │ │ orrs r1, r2 │ │ bx lr │ │ - cmp r2, #4 │ │ - it cc │ │ - bcc.w d4c6a │ │ - ldr.w r3, [r1], #4 │ │ - subs r2, #4 │ │ - str.w r3, [r0], #4 │ │ - cmp r2, #3 │ │ - bhi.n d52d2 │ │ - b.w d4c6a │ │ - bmi.n d5290 │ │ - bmi.n d5292 │ │ - orrs.w r2, r0, r1 │ │ - ittt eq │ │ - vldreq d16, [pc, #120] @ d5368 │ │ - vmoveq r0, r1, d16 │ │ - bxeq lr │ │ - push {r7, lr} │ │ - clz r2, r0 │ │ - cmp r1, #0 │ │ - add.w r2, r2, #32 │ │ - it ne │ │ - clzne r2, r1 │ │ - rsb r3, r2, #32 │ │ - lsls r1, r2 │ │ - lsr.w r3, r0, r3 │ │ - orrs r1, r3 │ │ - subs.w r3, r2, #32 │ │ - it pl │ │ - lslpl.w r1, r0, r3 │ │ - lsl.w r0, r0, r2 │ │ - it pl │ │ - movpl r0, #0 │ │ - lsrs r3, r0, #11 │ │ - orr.w lr, r3, r1, lsl #21 │ │ - lsls r0, r0, #21 │ │ - lsrs r1, r1, #11 │ │ - mvn.w ip, lr │ │ - and.w r3, ip, r0, lsr #31 │ │ - negs r3, r3 │ │ - sbc.w r0, r0, #0 │ │ - movw r3, #1086 @ 0x43e │ │ - subs r2, r3, r2 │ │ - adds.w r0, lr, r0, lsr #31 │ │ - add.w r1, r1, r2, lsl #20 │ │ - movw r2, #0 │ │ - movt r2, #65520 @ 0xfff0 │ │ - adcs r1, r2 │ │ - vmov d16, r0, r1 │ │ - ldmia.w sp!, {r7, lr} │ │ - vmov r0, r1, d16 │ │ - bx lr │ │ - nop │ │ - ... │ │ - push {r7, lr} │ │ - cmp r1, #16 │ │ - bcc.n d53ae │ │ - negs r2, r0 │ │ - and.w ip, r2, #3 │ │ - add.w r2, r0, ip │ │ - cmp r0, r2 │ │ - bcs.n d5392 │ │ - mov.w lr, #0 │ │ - mov r3, ip │ │ - strb.w lr, [r0], #1 │ │ - subs r3, #1 │ │ - bne.n d538a │ │ - sub.w r1, r1, ip │ │ - bic.w r0, r1, #3 │ │ - add r0, r2 │ │ - cmp r2, r0 │ │ - bcs.n d53aa │ │ - movs r3, #0 │ │ - str.w r3, [r2], #4 │ │ - cmp r2, r0 │ │ - bcc.n d53a2 │ │ - and.w r1, r1, #3 │ │ - adds r2, r0, r1 │ │ - cmp r0, r2 │ │ - it cs │ │ - popcs {r7, pc} │ │ - movs r2, #0 │ │ - strb.w r2, [r0], #1 │ │ - subs r1, #1 │ │ - bne.n d53b8 │ │ - pop {r7, pc} │ │ - b.w d4dc2 │ │ - b.w d4c6a │ │ - b.w d4dc2 │ │ - bmi.n d537a │ │ + bmi.n d5386 │ │ push {r4, lr} │ │ sub sp, #16 │ │ add r4, sp, #8 │ │ str r4, [sp, #0] │ │ - bl d53e4 │ │ + bl d53f0 │ │ ldr r2, [sp, #8] │ │ ldr r3, [sp, #12] │ │ add sp, #16 │ │ pop {r4, pc} │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #24 │ │ mov ip, r0 │ │ add r0, sp, #8 │ │ strd r2, r3, [sp] │ │ mov r2, ip │ │ mov r3, r1 │ │ - bl d5416 │ │ + bl d5422 │ │ ldr.w ip, [r7, #8] │ │ ldrd r0, r1, [sp, #8] │ │ cmp.w ip, #0 │ │ itt ne │ │ ldrdne r3, r2, [sp, #16] │ │ strdne r3, r2, [ip] │ │ add sp, #24 │ │ @@ -283334,21 +283212,21 @@ │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ ldrd fp, r9, [r7, #8] │ │ mov sl, r0 │ │ cmp.w fp, #0 │ │ - beq.n d549e │ │ + beq.n d54aa │ │ cmp.w r9, #0 │ │ - bne.n d549e │ │ + bne.n d54aa │ │ cmp r3, #0 │ │ - beq.n d5520 │ │ + beq.n d552c │ │ cmp r3, fp │ │ - bcs.n d5530 │ │ + bcs.n d553c │ │ clz r0, r3 │ │ clz r1, fp │ │ subs r0, r1, r0 │ │ mov.w r5, #1 │ │ add.w r6, r0, #32 │ │ it eq │ │ moveq r6, #31 │ │ @@ -283361,32 +283239,32 @@ │ │ lslpl.w r0, fp, r1 │ │ lsl.w r1, fp, r6 │ │ and.w r6, r6, #31 │ │ it pl │ │ movpl r1, #0 │ │ lsl.w ip, r5, r6 │ │ movs r5, #0 │ │ - b.n d5488 │ │ + b.n d5494 │ │ movs.w r0, r0, lsr #1 │ │ mov.w ip, ip, lsr #1 │ │ mov.w r1, r1, rrx │ │ subs r6, r2, r1 │ │ sbc.w r4, r3, r0 │ │ cmp r4, #0 │ │ - bmi.n d547c │ │ + bmi.n d5488 │ │ orr.w r5, r5, ip │ │ - beq.n d554c │ │ + beq.n d5558 │ │ mov r2, r6 │ │ mov r3, r4 │ │ - b.n d547c │ │ + b.n d5488 │ │ subs.w r1, r2, fp │ │ mov.w r0, #0 │ │ sbcs.w r1, r3, r9 │ │ - bcc.n d5510 │ │ - cbz r3, d5510 │ │ + bcc.n d551c │ │ + cbz r3, d551c │ │ clz r0, r3 │ │ clz r1, r9 │ │ subs r0, r1, r0 │ │ and.w r1, r0, #63 @ 0x3f │ │ and.w r0, r0, #31 │ │ rsb r5, r1, #32 │ │ lsl.w r6, r9, r1 │ │ @@ -283397,1219 +283275,1221 @@ │ │ lslpl.w r5, fp, r6 │ │ lsl.w r6, fp, r1 │ │ mov.w r1, #1 │ │ it pl │ │ movpl r6, #0 │ │ lsls r1, r0 │ │ movs r0, #0 │ │ - b.n d54f6 │ │ + b.n d5502 │ │ movs.w r5, r5, lsr #1 │ │ mov.w r1, r1, lsr #1 │ │ mov.w r6, r6, rrx │ │ subs r4, r2, r6 │ │ sbcs.w ip, r3, r5 │ │ - bmi.n d54ea │ │ + bmi.n d54f6 │ │ orrs r0, r1 │ │ subs.w r2, r4, fp │ │ sbcs.w r2, ip, r9 │ │ - bcc.n d551a │ │ + bcc.n d5526 │ │ mov r2, r4 │ │ mov r3, ip │ │ - b.n d54ea │ │ + b.n d54f6 │ │ mov.w r8, #0 │ │ mov r4, r2 │ │ mov ip, r3 │ │ - b.n d5562 │ │ + b.n d556e │ │ mov.w r8, #0 │ │ - b.n d5562 │ │ + b.n d556e │ │ mov r0, r2 │ │ mov r1, fp │ │ mov r4, r2 │ │ - blx d5af0 │ │ + blx d5b00 │ │ mls r4, r0, fp, r4 │ │ - b.n d555a │ │ - bne.n d5572 │ │ + b.n d5566 │ │ + bne.n d557e │ │ mov r0, r2 │ │ mov r1, r3 │ │ mov r4, r2 │ │ mov r5, r3 │ │ - blx d5af0 │ │ + blx d5b00 │ │ mls r4, r0, r5, r4 │ │ mov.w ip, #0 │ │ mov.w r8, #1 │ │ - b.n d5562 │ │ + b.n d556e │ │ mov r0, r6 │ │ mov r1, fp │ │ - blx d5af0 │ │ + blx d5b00 │ │ mls r4, r0, fp, r6 │ │ orrs r0, r5 │ │ mov.w r8, #0 │ │ mov.w ip, #0 │ │ strd r0, r8, [sl] │ │ strd r4, ip, [sl, #8] │ │ add sp, #4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, r3 │ │ mov r1, fp │ │ mov r4, r2 │ │ mov r5, r3 │ │ - blx d5af0 │ │ + blx d5b00 │ │ mls ip, r0, fp, r5 │ │ mov r8, r0 │ │ cmp.w fp, #65536 @ 0x10000 │ │ - bcs.n d55bc │ │ + bcs.n d55c8 │ │ mov.w r0, ip, lsl #16 │ │ mov r1, fp │ │ orr.w r0, r0, r4, lsr #16 │ │ - blx d5af0 │ │ + blx d5b00 │ │ mov r6, r0 │ │ mul.w r0, r0, fp │ │ mov r1, fp │ │ rsb r0, r0, r4, lsr #16 │ │ pkhbt r9, r4, r0, lsl #16 │ │ mov r0, r9 │ │ - blx d5af0 │ │ + blx d5b00 │ │ mls r4, r0, fp, r9 │ │ orr.w r0, r0, r6, lsl #16 │ │ orr.w r8, r8, r6, lsr #16 │ │ - b.n d555e │ │ + b.n d556a │ │ subs.w r0, r4, fp │ │ sbcs.w r0, ip, r9 │ │ - bcs.n d55ca │ │ + bcs.n d55d6 │ │ movs r0, #0 │ │ - b.n d5562 │ │ + b.n d556e │ │ mov.w r0, r9, lsl #31 │ │ mov.w r2, fp, lsl #31 │ │ orr.w r0, r0, fp, lsr #1 │ │ mov.w r1, #2147483648 @ 0x80000000 │ │ movs r5, #0 │ │ - b.n d55ea │ │ + b.n d55f6 │ │ movs.w r0, r0, lsr #1 │ │ mov.w r1, r1, lsr #1 │ │ mov.w r2, r2, rrx │ │ subs r6, r4, r2 │ │ sbc.w r3, ip, r0 │ │ cmp r3, #0 │ │ - bmi.n d55de │ │ + bmi.n d55ea │ │ orr.w r5, r5, r1 │ │ - beq.n d5600 │ │ + beq.n d560c │ │ mov r4, r6 │ │ mov ip, r3 │ │ - b.n d55de │ │ + b.n d55ea │ │ mov r0, r6 │ │ mov r1, fp │ │ - blx d5af0 │ │ + blx d5b00 │ │ mls r4, r0, fp, r6 │ │ orrs r0, r5 │ │ - b.n d555e │ │ + b.n d556a │ │ push {lr} │ │ sub sp, #4 │ │ mov r2, sp │ │ - blx d590c │ │ + blx d591c │ │ ldr r1, [sp, #0] │ │ add sp, #4 │ │ pop {pc} │ │ + bmi.n d55d8 │ │ + bmi.n d55da │ │ lsls r0, r2 │ │ stmdb sp!, {r2, ip, sp, lr} │ │ - b.n d5b44 │ │ + b.n d5b54 │ │ ands r1, r0 │ │ - b.n d566e │ │ + b.n d567e │ │ cmp r7, #192 @ 0xc0 │ │ - b.n d5672 │ │ + b.n d5682 │ │ subs r7, #193 @ 0xc1 │ │ - b.n d5678 │ │ + b.n d5688 │ │ lsrs r0, r0, #31 │ │ - b.n d56be │ │ + b.n d56ce │ │ subs r1, r0, #7 │ │ - b.n d56c4 │ │ + b.n d56d4 │ │ lsls r3, r5, #4 │ │ add.w pc, r0, r4, lsl #3 │ │ - b.n d5686 │ │ + b.n d5696 │ │ lsrs r4, r0, #31 │ │ - b.n d56ca │ │ + b.n d56da │ │ strh r0, [r2, #4] │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, r9, fp, lr} │ │ stmdb sp!, {r3, ip, sp, lr} │ │ - b.n d5176 │ │ - bl 531156 │ │ + b.n d5186 │ │ + bl 531166 │ │ strh r0, [r7, #12] │ │ - b.n d519c │ │ + b.n d51ac │ │ str r0, [sp, #0] │ │ - b.n d59a2 │ │ + b.n d59b2 │ │ movs r0, r0 │ │ - b.n d5d14 │ │ + b.n d5d24 │ │ strh r0, [r1, #0] │ │ - b.n d5788 │ │ + b.n d5798 │ │ movs r0, r3 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n d51a2 │ │ + b.n d51b2 │ │ lsrs r6, r5, #17 │ │ add.w r0, r0, r0 │ │ - b.n d5d1a │ │ + b.n d5d2a │ │ movs r1, r5 │ │ lsrs r0, r0, #8 │ │ ands r4, r0 │ │ - b.n d51a2 │ │ + b.n d51b2 │ │ str r0, [r0, r0] │ │ - b.n d59c6 │ │ + b.n d59d6 │ │ movs r7, r0 │ │ - b.n d5932 │ │ + b.n d5942 │ │ movs r0, r7 │ │ cmp r2, #0 │ │ movs r1, r2 │ │ - b.n d5ba0 │ │ + b.n d5bb0 │ │ movs r7, r1 │ │ - b.n d5e16 │ │ + b.n d5e26 │ │ str r2, [r0, #0] │ │ - b.n d5b1a │ │ + b.n d5b2a │ │ movs r0, r1 │ │ - b.n d5dde │ │ + b.n d5dee │ │ asrs r6, r0, #4 │ │ - b.n d57a2 │ │ + b.n d57b2 │ │ movs r5, r0 │ │ - b.n d59e6 │ │ + b.n d59f6 │ │ lsrs r1, r6, #17 │ │ add.w r0, r0, r0 │ │ - b.n d5d4e │ │ + b.n d5d5e │ │ lsls r0, r3, #1 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, r0] │ │ - b.n d59f6 │ │ + b.n d5a06 │ │ lsls r4, r0, #4 │ │ - b.n d57ba │ │ + b.n d57ca │ │ asrs r4, r0, #32 │ │ - b.n d574a │ │ + b.n d575a │ │ movs r0, r1 │ │ - b.n d5bc2 │ │ + b.n d5bd2 │ │ movs r1, #1 │ │ - b.n d5a06 │ │ + b.n d5a16 │ │ asrs r0, r0, #32 │ │ - b.n d5e0a │ │ + b.n d5e1a │ │ lsrs r0, r0, #24 │ │ add.w r0, r0, r3, asr #32 │ │ and.w r1, r0, r4, lsl #5 │ │ - b.n d5214 │ │ + b.n d5224 │ │ movs r4, r1 │ │ - b.n d5bea │ │ + b.n d5bfa │ │ asrs r1, r0, #32 │ │ - b.n d57fc │ │ + b.n d580c │ │ lsrs r7, r7, #23 │ │ add.w r0, r0, r0, lsr #20 │ │ - b.n d5bf6 │ │ + b.n d5c06 │ │ movs r5, r0 │ │ - b.n d5a2a │ │ + b.n d5a3a │ │ lsrs r0, r7, #19 │ │ add.w r0, r0, r8, lsl #28 │ │ - b.n d5224 │ │ + b.n d5234 │ │ movs r0, r0 │ │ - b.n d5da4 │ │ + b.n d5db4 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ movs r0, r1 │ │ - b.n d522e │ │ + b.n d523e │ │ strb r1, [r0, #0] │ │ - b.n d5c02 │ │ + b.n d5c12 │ │ strb r0, [r1, #0] │ │ - b.n d5216 │ │ - bl 531206 │ │ + b.n d5226 │ │ + bl 531216 │ │ strb r0, [r1, #0] │ │ - b.n d5220 │ │ + b.n d5230 │ │ movs r5, r0 │ │ - b.n d5a52 │ │ + b.n d5a62 │ │ lsrs r2, r6, #19 │ │ add.w r0, r0, r4 │ │ - b.n d524a │ │ + b.n d525a │ │ lsrs r4, r0, #17 │ │ add.w r0, r0, r0 │ │ - b.n d5dc2 │ │ + b.n d5dd2 │ │ @ instruction: 0xffd51aff │ │ movs r1, r2 │ │ - b.n d5c38 │ │ + b.n d5c48 │ │ movs r7, r1 │ │ - b.n d5eae │ │ + b.n d5ebe │ │ str r2, [r0, #0] │ │ - b.n d5bb2 │ │ + b.n d5bc2 │ │ movs r0, r1 │ │ - b.n d5e76 │ │ + b.n d5e86 │ │ lsls r6, r0, #4 │ │ - b.n d583a │ │ - lsrs r4, r5, #16 │ │ + b.n d584a │ │ + lsrs r0, r6, #16 │ │ add.w r0, r0, r0 │ │ - b.n d5de2 │ │ + b.n d5df2 │ │ movs r0, r6 │ │ lsrs r0, r0, #8 │ │ str r0, [r0, r0] │ │ - b.n d5a8a │ │ + b.n d5a9a │ │ movs r0, r1 │ │ - b.n d5c4e │ │ + b.n d5c5e │ │ movs r1, #6 │ │ - b.n d5a92 │ │ + b.n d5aa2 │ │ asrs r0, r0, #32 │ │ - b.n d5e96 │ │ + b.n d5ea6 │ │ lsrs r5, r3, #23 │ │ add.w r0, r0, r1 │ │ - b.n d5e9e │ │ + b.n d5eae │ │ movs r0, r0 │ │ - b.n d526c │ │ + b.n d527c │ │ str r4, [r0, #0] │ │ - b.n d5270 │ │ + b.n d5280 │ │ asrs r5, r0, #32 │ │ - b.n d5aaa │ │ + b.n d5aba │ │ movs r4, r0 │ │ - b.n d529e │ │ + b.n d52ae │ │ lsrs r3, r6, #16 │ │ add.w r0, r0, r1 │ │ - b.n d5c04 │ │ + b.n d5c14 │ │ strb r0, [r0, #4] │ │ - b.n d5884 │ │ + b.n d5894 │ │ str r0, [r1, r0] │ │ - b.n d52ec │ │ + b.n d52fc │ │ movs r0, r0 │ │ - b.n d5e2c │ │ + b.n d5e3c │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r5, r0 │ │ - b.n d5aca │ │ + b.n d5ada │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r2, ip, lr} │ │ - b.n d52c4 │ │ + b.n d52d4 │ │ movs r4, r0 │ │ - b.n d5e40 │ │ + b.n d5e50 │ │ str r4, [r0, r0] │ │ str r3, [sp, #640] @ 0x280 │ │ movs r1, r0 │ │ - b.n d5c28 │ │ + b.n d5c38 │ │ movs r0, r0 │ │ - b.n d59cc │ │ + b.n d59dc │ │ movs r1, r3 │ │ subs r0, r0, r0 │ │ str r0, [r0, #0] │ │ - b.n d52dc │ │ + b.n d52ec │ │ ands r3, r0 │ │ - b.n d5cb8 │ │ + b.n d5cc8 │ │ movs r6, r0 │ │ - b.n d58ba │ │ - lsrs r6, r1, #16 │ │ + b.n d58ca │ │ + lsrs r2, r2, #16 │ │ add.w r0, r0, r0 │ │ - b.n d5e5a │ │ + b.n d5e6a │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ asrs r4, r0, #32 │ │ - b.n d58c2 │ │ + b.n d58d2 │ │ movs r0, #0 │ │ - b.n d5c90 │ │ + b.n d5ca0 │ │ str r2, [r0, r0] │ │ - b.n d57cc │ │ + b.n d57dc │ │ movs r4, r0 │ │ - b.n d51d8 │ │ + b.n d51e8 │ │ movs r5, r0 │ │ - b.n d5b12 │ │ + b.n d5b22 │ │ asrs r4, r1, #32 │ │ - b.n d5308 │ │ + b.n d5318 │ │ movs r0, r0 │ │ - b.n d5e7c │ │ + b.n d5e8c │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #6 │ │ - b.n d5b22 │ │ + b.n d5b32 │ │ lsrs r2, r0, #23 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n d52f8 │ │ + b.n d5308 │ │ movs r5, r0 │ │ - b.n d5b2e │ │ + b.n d5b3e │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {ip} │ │ - b.n d5f36 │ │ + b.n d5f46 │ │ movs r0, #6 │ │ - b.n d5b3a │ │ + b.n d5b4a │ │ lsrs r4, r6, #22 │ │ add.w r0, r0, r0, lsl #20 │ │ - b.n d5310 │ │ + b.n d5320 │ │ movs r5, r0 │ │ - b.n d5b46 │ │ + b.n d5b56 │ │ ldrh r0, [r6, #30] │ │ ldmia.w sp!, {r2, r3, r7, sl, fp} │ │ add.w ip, r0, fp, lsl #2 │ │ add.w ip, r0, sl, lsl #2 │ │ add.w ip, r0, r9, lsl #2 │ │ - @ instruction: 0xeb009254 │ │ + @ instruction: 0xeb009264 │ │ movs r0, r0 │ │ lsls r0, r6, #5 │ │ movs r0, r0 │ │ ands r0, r2 │ │ stmdb sp!, {r5, lr} │ │ - b.n d5368 │ │ + b.n d5378 │ │ ands r4, r0 │ │ - b.n d594c │ │ + b.n d595c │ │ movs r0, r0 │ │ - b.n d53da │ │ + b.n d53ea │ │ movs r1, r0 │ │ - b.n d5ed6 │ │ + b.n d5ee6 │ │ strh r0, [r2, #0] │ │ adds r5, r7, r2 │ │ movs r4, r0 │ │ - b.n d5366 │ │ + b.n d5376 │ │ lsrs r3, r0, #17 │ │ add.w r0, r0, r0 │ │ - b.n d5f86 │ │ + b.n d5f96 │ │ movs r0, r0 │ │ - b.n d53d2 │ │ + b.n d53e2 │ │ strh r0, [r2, #0] │ │ - ldmia.w sp!, {r4, r7, ip, pc} │ │ + ldmia.w sp!, {r5, r7, ip, pc} │ │ movs r0, r0 │ │ ands r0, r2 │ │ stmdb sp!, {r2, r5, lr} │ │ - b.n d5398 │ │ + b.n d53a8 │ │ asrs r4, r4, #32 │ │ - b.n d539c │ │ + b.n d53ac │ │ ands r4, r0 │ │ - b.n d5980 │ │ + b.n d5990 │ │ asrs r1, r0, #32 │ │ - b.n d5984 │ │ + b.n d5994 │ │ movs r4, r0 │ │ - b.n d5d72 │ │ + b.n d5d82 │ │ lsrs r4, r6, #16 │ │ add.w r0, r0, r0 │ │ - b.n d5f12 │ │ + b.n d5f22 │ │ movs r1, r0 │ │ lsls r0, r4, #14 │ │ movs r0, r0 │ │ lsls r4, r0, #23 │ │ strh r0, [r2, #0] │ │ lsrs r5, r7, #2 │ │ lsrs r7, r5, #17 │ │ - @ instruction: 0xeb00905c │ │ + @ instruction: 0xeb00906c │ │ movs r0, r0 │ │ movs r0, r4 │ │ movs r0, r0 │ │ eors r0, r6 │ │ stmdb sp!, {lr} │ │ - b.n d5bd2 │ │ + b.n d5be2 │ │ movs r0, r0 │ │ - b.n d53b6 │ │ + b.n d53c6 │ │ movs r0, r0 │ │ - b.n d5f3a │ │ + b.n d5f4a │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ asrs r4, r4, #1 │ │ - b.n d53e0 │ │ + b.n d53f0 │ │ movs r1, r0 │ │ - b.n d5d26 │ │ + b.n d5d36 │ │ movs r0, r0 │ │ - b.n d53b2 │ │ + b.n d53c2 │ │ asrs r1, r0, #32 │ │ - b.n d59cc │ │ + b.n d59dc │ │ movs r4, r0 │ │ - b.n d53d4 │ │ + b.n d53e4 │ │ asrs r4, r0, #32 │ │ - b.n d5bf6 │ │ + b.n d5c06 │ │ eors r0, r6 │ │ ldmia.w sp!, {r5, r6, r7, r8, r9, fp} │ │ and.w r0, r0, r4 │ │ - b.n d53ea │ │ + b.n d53fa │ │ movs r0, r0 │ │ - b.n d5f66 │ │ + b.n d5f76 │ │ movs r4, r1 │ │ lsrs r0, r0, #8 │ │ str r0, [r1, r0] │ │ - b.n d5dd6 │ │ + b.n d5de6 │ │ str r0, [r0, #0] │ │ - b.n d6012 │ │ + b.n d6022 │ │ movs r2, r0 │ │ and.w r0, r0, r1, lsl #24 │ │ - b.n d5de6 │ │ + b.n d5df6 │ │ movs r0, r0 │ │ - b.n d5b8a │ │ + b.n d5b9a │ │ movs r6, r0 │ │ cmp r2, #0 │ │ asrs r6, r0, #4 │ │ - b.n d5810 │ │ + b.n d5820 │ │ movs r0, r0 │ │ - b.n d5f8c │ │ + b.n d5f9c │ │ @ instruction: 0xfff90aff │ │ movs r4, r0 │ │ - b.n d5314 │ │ + b.n d5324 │ │ lsrs r2, r6, #14 │ │ add.w r0, r0, r4 │ │ - b.n d5422 │ │ + b.n d5432 │ │ @ instruction: 0xfff5eaff │ │ movs r4, r0 │ │ - b.n d5c42 │ │ + b.n d5c52 │ │ eors r0, r6 │ │ ldmia.w sp!, {r0, r2, r3, r5, r7, r8, r9, fp} │ │ - @ instruction: 0xea009010 │ │ + @ instruction: 0xea009020 │ │ movs r0, r0 │ │ movs r1, r0 │ │ - b.n d5fb4 │ │ + b.n d5fc4 │ │ lsls r3, r6, #1 │ │ subs r2, #0 │ │ lsls r7, r5, #1 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n d5bbe │ │ + b.n d5bce │ │ lsls r2, r5, #1 │ │ subs r2, #0 │ │ ldmia r7!, {r4} │ │ - b.n d5c04 │ │ + b.n d5c14 │ │ subs r7, #17 │ │ - b.n d5c08 │ │ + b.n d5c18 │ │ adds r0, #12 │ │ - b.n d59b4 │ │ + b.n d59c4 │ │ ldmia r5!, {r1, r2} │ │ - b.n d5e50 │ │ + b.n d5e60 │ │ stmia r1!, {r0, r1} │ │ - b.n d59ce │ │ + b.n d59de │ │ stmia r1!, {r0, r1, r7} │ │ - b.n d59d2 │ │ + b.n d59e2 │ │ adds r0, #0 │ │ - b.n d607e │ │ + b.n d608e │ │ vrhadd.u16 d14, d12, d31 │ │ lsrs r1, r0, #30 │ │ - b.n d5be6 │ │ + b.n d5bf6 │ │ adds r1, #2 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #30 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #28 │ │ - b.n d5bf2 │ │ + b.n d5c02 │ │ adds r1, #1 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #28 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #26 │ │ - b.n d5bfe │ │ + b.n d5c0e │ │ adds r2, #2 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #26 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #24 │ │ - b.n d5c0a │ │ + b.n d5c1a │ │ adds r2, #1 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #24 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #22 │ │ - b.n d5c16 │ │ + b.n d5c26 │ │ adds r3, #2 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #22 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #20 │ │ - b.n d5c22 │ │ + b.n d5c32 │ │ adds r3, #1 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #20 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #18 │ │ - b.n d5c2e │ │ + b.n d5c3e │ │ adds r4, #2 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #18 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #16 │ │ - b.n d5c3a │ │ + b.n d5c4a │ │ adds r4, #1 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #16 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #14 │ │ - b.n d5c46 │ │ + b.n d5c56 │ │ adds r5, #2 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #14 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #12 │ │ - b.n d5c52 │ │ + b.n d5c62 │ │ adds r5, #1 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #12 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #10 │ │ - b.n d5c5e │ │ + b.n d5c6e │ │ adds r6, #2 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #10 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #8 │ │ - b.n d5c6a │ │ + b.n d5c7a │ │ adds r6, #1 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #8 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #6 │ │ - b.n d5c76 │ │ + b.n d5c86 │ │ adds r7, #2 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #6 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #4 │ │ - b.n d5c82 │ │ + b.n d5c92 │ │ adds r7, #1 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #4 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #2 │ │ - b.n d5c8e │ │ + b.n d5c9e │ │ subs r0, #2 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #2 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #32 │ │ - b.n d5c9a │ │ + b.n d5caa │ │ subs r0, #1 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #32 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #30 │ │ - b.n d5ca6 │ │ + b.n d5cb6 │ │ subs r1, #2 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #30 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #28 │ │ - b.n d5cb2 │ │ + b.n d5cc2 │ │ subs r1, #1 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #28 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #26 │ │ - b.n d5cbe │ │ + b.n d5cce │ │ subs r2, #2 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #26 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #24 │ │ - b.n d5cca │ │ + b.n d5cda │ │ subs r2, #1 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #24 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #22 │ │ - b.n d5cd6 │ │ + b.n d5ce6 │ │ subs r3, #2 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #22 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #20 │ │ - b.n d5ce2 │ │ + b.n d5cf2 │ │ subs r3, #1 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #20 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #18 │ │ - b.n d5cee │ │ + b.n d5cfe │ │ subs r4, #2 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #18 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #16 │ │ - b.n d5cfa │ │ + b.n d5d0a │ │ subs r4, #1 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #16 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #14 │ │ - b.n d5d06 │ │ + b.n d5d16 │ │ adds r0, #128 @ 0x80 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #14 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #12 │ │ - b.n d5d12 │ │ + b.n d5d22 │ │ adds r0, #64 @ 0x40 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #12 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #10 │ │ - b.n d5d1e │ │ + b.n d5d2e │ │ adds r0, #32 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #10 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #8 │ │ - b.n d5d2a │ │ + b.n d5d3a │ │ adds r0, #16 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #8 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #6 │ │ - b.n d5d36 │ │ + b.n d5d46 │ │ adds r0, #8 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #6 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #4 │ │ - b.n d5d42 │ │ + b.n d5d52 │ │ adds r0, #4 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #4 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #2 │ │ - b.n d5d4e │ │ + b.n d5d5e │ │ adds r0, #2 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #2 │ │ movs r0, #64 @ 0x40 │ │ movs r1, r0 │ │ - b.n d5d5a │ │ + b.n d5d6a │ │ adds r0, #1 │ │ movs r2, #131 @ 0x83 │ │ movs r1, r0 │ │ movs r0, #64 @ 0x40 │ │ movs r0, r0 │ │ - b.n d55ca │ │ + b.n d55da │ │ movs r3, r0 │ │ - b.n d5e0a │ │ + b.n d5e1a │ │ vrhadd.u16 d14, d14, d31 │ │ movs r0, r0 │ │ - b.n d55d6 │ │ + b.n d55e6 │ │ movs r0, r0 │ │ - b.n d6216 │ │ + b.n d6226 │ │ vrhadd.u16 d14, d14, d31 │ │ adds r0, #0 │ │ - b.n d621e │ │ + b.n d622e │ │ adds r0, #0 │ │ - b.n d55e6 │ │ + b.n d55f6 │ │ vrhadd.u16 d14, d14, d31 │ │ movs r0, r0 │ │ - b.n d622a │ │ + b.n d623a │ │ @ instruction: 0xffffeaff │ │ vrhadd.u16 d14, d14, d31 │ │ movs r1, r0 │ │ - b.n d6198 │ │ + b.n d61a8 │ │ movs r3, r1 │ │ subs r2, #0 │ │ vrhadd.u16 d0, d14, d31 │ │ movs r1, r0 │ │ - b.n d5da2 │ │ + b.n d5db2 │ │ movs r0, r0 │ │ adds r3, #160 @ 0xa0 │ │ vrhadd.u16 d3, d14, d31 │ │ ldmia r7!, {r4} │ │ - b.n d5dec │ │ + b.n d5dfc │ │ subs r7, #17 │ │ - b.n d5df0 │ │ + b.n d5e00 │ │ adds r0, #12 │ │ - b.n d5b9c │ │ + b.n d5bac │ │ ldmia r6!, {r0, r3, r4} │ │ - b.n d6038 │ │ + b.n d6048 │ │ stmia r1!, {r0, r1} │ │ - b.n d5bb6 │ │ + b.n d5bc6 │ │ stmia r1!, {r0, r1, r7} │ │ - b.n d5bba │ │ + b.n d5bca │ │ adds r0, #0 │ │ - b.n d6266 │ │ + b.n d6276 │ │ vrhadd.u16 d14, d12, d31 │ │ movs r0, r0 │ │ - b.n d628e │ │ + b.n d629e │ │ lsls r0, r0 │ │ stmdb sp!, {r0, r2, r3, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ @ instruction: 0xebff8080 │ │ ldmia.w sp!, {r0, r7, r8, r9, sl, fp} │ │ - b.n d5dde │ │ + b.n d5dee │ │ adds r1, #2 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #30 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #28 │ │ - b.n d5dea │ │ + b.n d5dfa │ │ adds r1, #1 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #28 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #26 │ │ - b.n d5df6 │ │ + b.n d5e06 │ │ adds r2, #2 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #26 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #24 │ │ - b.n d5e02 │ │ + b.n d5e12 │ │ adds r2, #1 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #24 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #22 │ │ - b.n d5e0e │ │ + b.n d5e1e │ │ adds r3, #2 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #22 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #20 │ │ - b.n d5e1a │ │ + b.n d5e2a │ │ adds r3, #1 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #20 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #18 │ │ - b.n d5e26 │ │ + b.n d5e36 │ │ adds r4, #2 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #18 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #16 │ │ - b.n d5e32 │ │ + b.n d5e42 │ │ adds r4, #1 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #16 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #14 │ │ - b.n d5e3e │ │ + b.n d5e4e │ │ adds r5, #2 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #14 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #12 │ │ - b.n d5e4a │ │ + b.n d5e5a │ │ adds r5, #1 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #12 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #10 │ │ - b.n d5e56 │ │ + b.n d5e66 │ │ adds r6, #2 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #10 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #8 │ │ - b.n d5e62 │ │ + b.n d5e72 │ │ adds r6, #1 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #8 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #6 │ │ - b.n d5e6e │ │ + b.n d5e7e │ │ adds r7, #2 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #6 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #4 │ │ - b.n d5e7a │ │ + b.n d5e8a │ │ adds r7, #1 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #4 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #2 │ │ - b.n d5e86 │ │ + b.n d5e96 │ │ subs r0, #2 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #2 │ │ movs r0, #64 @ 0x40 │ │ lsrs r1, r0, #32 │ │ - b.n d5e92 │ │ + b.n d5ea2 │ │ subs r0, #1 │ │ movs r2, #131 @ 0x83 │ │ lsrs r1, r0, #32 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #30 │ │ - b.n d5e9e │ │ + b.n d5eae │ │ subs r1, #2 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #30 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #28 │ │ - b.n d5eaa │ │ + b.n d5eba │ │ subs r1, #1 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #28 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #26 │ │ - b.n d5eb6 │ │ + b.n d5ec6 │ │ subs r2, #2 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #26 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #24 │ │ - b.n d5ec2 │ │ + b.n d5ed2 │ │ subs r2, #1 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #24 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #22 │ │ - b.n d5ece │ │ + b.n d5ede │ │ subs r3, #2 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #22 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #20 │ │ - b.n d5eda │ │ + b.n d5eea │ │ subs r3, #1 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #20 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #18 │ │ - b.n d5ee6 │ │ + b.n d5ef6 │ │ subs r4, #2 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #18 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #16 │ │ - b.n d5ef2 │ │ + b.n d5f02 │ │ subs r4, #1 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #16 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #14 │ │ - b.n d5efe │ │ + b.n d5f0e │ │ adds r0, #128 @ 0x80 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #14 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #12 │ │ - b.n d5f0a │ │ + b.n d5f1a │ │ adds r0, #64 @ 0x40 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #12 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #10 │ │ - b.n d5f16 │ │ + b.n d5f26 │ │ adds r0, #32 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #10 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #8 │ │ - b.n d5f22 │ │ + b.n d5f32 │ │ adds r0, #16 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #8 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #6 │ │ - b.n d5f2e │ │ + b.n d5f3e │ │ adds r0, #8 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #6 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #4 │ │ - b.n d5f3a │ │ + b.n d5f4a │ │ adds r0, #4 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #4 │ │ movs r0, #64 @ 0x40 │ │ lsls r1, r0, #2 │ │ - b.n d5f46 │ │ + b.n d5f56 │ │ adds r0, #2 │ │ movs r2, #131 @ 0x83 │ │ lsls r1, r0, #2 │ │ movs r0, #64 @ 0x40 │ │ movs r1, r0 │ │ - b.n d5f52 │ │ + b.n d5f62 │ │ adds r0, #1 │ │ movs r2, #131 @ 0x83 │ │ movs r1, r0 │ │ movs r0, #64 @ 0x40 │ │ movs r3, r0 │ │ - b.n d5ffe │ │ + b.n d600e │ │ vrhadd.u16 d14, d14, d31 │ │ stmia r0!, {} │ │ - b.n d57e6 │ │ + b.n d57f6 │ │ movs r0, r0 │ │ - b.n d6382 │ │ + b.n d6392 │ │ movs r7, r0 │ │ - ldr r2, [pc, #0] @ (d5ccc ) │ │ + ldr r2, [pc, #0] @ (d5cdc ) │ │ adds r0, #1 │ │ - b.n d6412 │ │ + b.n d6422 │ │ adds r0, #0 │ │ - b.n d57d8 │ │ + b.n d57e8 │ │ adds r0, #4 │ │ - b.n d641a │ │ + b.n d642a │ │ asrs r7, r0, #32 │ │ - b.n d587e │ │ + b.n d588e │ │ movs r4, r0 │ │ - b.n d61e2 │ │ + b.n d61f2 │ │ asrs r1, r0, #4 │ │ - b.n d5dec │ │ + b.n d5dfc │ │ asrs r0, r0, #32 │ │ - b.n d57ee │ │ + b.n d57fe │ │ vrhadd.u16 d14, d14, d31 │ │ - ldr r0, [pc, #0] @ (d5cf0 ) │ │ + ldr r0, [pc, #0] @ (d5d00 ) │ │ stmdb sp!, {r0, r2, r3, ip, sp, pc} │ │ - b.n d6036 │ │ + b.n d6046 │ │ mrrc 7, 14, lr, ip, cr3 │ │ movs r0, r0 │ │ - b.n d63ba │ │ + b.n d63ca │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r3, r0 │ │ - b.n d63c2 │ │ + b.n d63d2 │ │ adds r0, #0 │ │ asrs r0, r4, #14 │ │ movs r1, r0 │ │ asrs r6, r3, #13 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ ldmia r0!, {r2, r3, r4, r6} │ │ - b.n d5ce4 │ │ + b.n d5cf4 │ │ adds r0, #4 │ │ - b.n d645a │ │ + b.n d646a │ │ adds r1, #12 │ │ - b.n d5e24 │ │ + b.n d5e34 │ │ stmia r0!, {r1} │ │ - b.n d6462 │ │ + b.n d6472 │ │ movs r1, r0 │ │ @ instruction: 0xea00c001 │ │ - b.n d646a │ │ + b.n d647a │ │ adds r0, #4 │ │ - b.n d646e │ │ + b.n d647e │ │ adds r0, #0 │ │ - b.n d5836 │ │ + b.n d5846 │ │ adds r0, #0 │ │ - b.n d6076 │ │ + b.n d6086 │ │ stmia r0!, {} │ │ - b.n d583c │ │ - ldr r0, [pc, #0] @ (d5d3c ) │ │ + b.n d584c │ │ + ldr r0, [pc, #0] @ (d5d4c ) │ │ ldmia.w sp!, {r0, r1} │ │ - b.n d6082 │ │ + b.n d6092 │ │ vrhadd.u16 d14, d14, d31 │ │ - ldr r7, [pc, #960] @ (d6108 ) │ │ + ldr r7, [pc, #960] @ (d6118 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n d6268 │ │ - beq.n d5d68 │ │ - b.n d61ec │ │ + b.n d6278 │ │ + beq.n d5d78 │ │ + b.n d61fc │ │ ands r0, r0 │ │ - b.n d6096 │ │ + b.n d60a6 │ │ movs r3, r0 │ │ - b.n d5ffe │ │ + b.n d600e │ │ asrs r4, r0, #32 │ │ - b.n d5878 │ │ + b.n d5888 │ │ lsls r7, r0, #5 │ │ cmp r2, #0 │ │ str r4, [r0, r0] │ │ - b.n d58a0 │ │ + b.n d58b0 │ │ str r0, [r1, #0] │ │ - b.n d6284 │ │ + b.n d6294 │ │ movs r0, r0 │ │ - b.n d64ae │ │ + b.n d64be │ │ strh r3, [r0, #0] │ │ - b.n d60b2 │ │ + b.n d60c2 │ │ str r0, [sp, #8] │ │ - b.n d60b6 │ │ + b.n d60c6 │ │ movs r0, r0 │ │ - b.n d5894 │ │ + b.n d58a4 │ │ movs r7, r0 │ │ and.w r0, r0, r0 │ │ - b.n d5e84 │ │ + b.n d5e94 │ │ movs r0, #4 │ │ - b.n d6286 │ │ + b.n d6296 │ │ movs r4, r0 │ │ - b.n d60ca │ │ + b.n d60da │ │ asrs r5, r1, #32 │ │ - b.n d64ce │ │ + b.n d64de │ │ movs r0, #8 │ │ - b.n d58ac │ │ + b.n d58bc │ │ lsls r6, r3, #19 │ │ add.w r0, r0, r8 │ │ - b.n d604c │ │ + b.n d605c │ │ lsls r4, r6, #4 │ │ cmp r2, #0 │ │ movs r3, r0 │ │ - b.n d61f4 │ │ + b.n d6204 │ │ strb r1, [r1, #0] │ │ - b.n d60e6 │ │ + b.n d60f6 │ │ movs r0, r0 │ │ - b.n d5eb4 │ │ + b.n d5ec4 │ │ str r0, [sp, #4] │ │ - b.n d62c0 │ │ + b.n d62d0 │ │ lsls r0, r2, #3 │ │ - b.n d6152 │ │ + b.n d6162 │ │ movs r0, r0 │ │ - b.n d6456 │ │ - add r0, pc, #448 @ (adr r0, d5f78 ) │ │ - b.n d5b98 │ │ + b.n d6466 │ │ + add r0, pc, #448 @ (adr r0, d5f88 ) │ │ + b.n d5ba8 │ │ movs r3, r1 │ │ - ldr r2, [pc, #0] @ (d5dbc ) │ │ + ldr r2, [pc, #0] @ (d5dcc ) │ │ movs r4, r0 │ │ - b.n d6102 │ │ + b.n d6112 │ │ asrs r5, r1, #32 │ │ - b.n d6506 │ │ + b.n d6516 │ │ movs r0, #6 │ │ - b.n d610a │ │ + b.n d611a │ │ lsls r2, r7, #18 │ │ add.w r0, r0, r8 │ │ - b.n d590c │ │ + b.n d591c │ │ asrs r2, r1, #4 │ │ - b.n d6116 │ │ + b.n d6126 │ │ lsls r0, r0, #1 │ │ - b.n d648e │ │ + b.n d649e │ │ @ instruction: 0xffe73aff │ │ asrs r4, r7, #3 │ │ - b.n d61e4 │ │ + b.n d61f4 │ │ movs r1, r0 │ │ - b.n d5e66 │ │ + b.n d5e76 │ │ movs r0, #4 │ │ - b.n d626a │ │ + b.n d627a │ │ @ instruction: 0xffe5eaff │ │ lsls r0, r0, #2 │ │ - b.n d6286 │ │ + b.n d6296 │ │ asrs r0, r4, #8 │ │ - b.n d6136 │ │ + b.n d6146 │ │ movs r1, r1 │ │ - b.n d653a │ │ + b.n d654a │ │ movs r5, r0 │ │ - b.n d64a0 │ │ + b.n d64b0 │ │ lsls r0, r5, #4 │ │ ldrh r0, [r0, #16] │ │ movs r0, #4 │ │ - b.n d6324 │ │ + b.n d6334 │ │ asrs r1, r0, #4 │ │ - b.n d5d2e │ │ - blx 4d6f10 │ │ + b.n d5d3e │ │ + blx 4d6f20 │ │ movs r0, r3 │ │ movs r0, r0 │ │ lsls r4, r4, #6 │ │ movs r0, r0 │ │ lsls r0, r0, #4 │ │ movs r0, r0 │ │ lsls r4, r5, #4 │ │ movs r0, r0 │ │ lsls r4, r3, #1 │ │ movs r0, r0 │ │ lsls r0, r3, #7 │ │ movs r0, r0 │ │ movs r0, r1 │ │ - b.n d60dc │ │ + b.n d60ec │ │ lsls r5, r3, #4 │ │ cmp r2, #0 │ │ asrs r3, r0, #32 │ │ - b.n d6284 │ │ + b.n d6294 │ │ movs r6, #10 │ │ - b.n d6176 │ │ + b.n d6186 │ │ movs r0, #114 @ 0x72 │ │ - b.n d5c38 │ │ + b.n d5c48 │ │ asrs r1, r0, #32 │ │ - b.n d5de8 │ │ + b.n d5df8 │ │ movs r2, #1 │ │ - b.n d6166 │ │ + b.n d6176 │ │ lsls r7, r2, #4 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n d618a │ │ + b.n d619a │ │ asrs r0, r0, #32 │ │ - b.n d658e │ │ + b.n d659e │ │ adds r0, #0 │ │ - b.n d6592 │ │ + b.n d65a2 │ │ lsls r6, r3, #6 │ │ add.w r0, r0, r8 │ │ - b.n d626e │ │ + b.n d627e │ │ asrs r0, r0, #32 │ │ - b.n d5998 │ │ + b.n d59a8 │ │ asrs r0, r4, #6 │ │ - b.n d6164 │ │ + b.n d6174 │ │ asrs r0, r0, #32 │ │ - b.n d5980 │ │ + b.n d5990 │ │ lsls r5, r1, #1 │ │ and.w r0, r0, lr, ror #7 │ │ - b.n d6282 │ │ + b.n d6292 │ │ lsls r0, r1, #3 │ │ - b.n d6514 │ │ + b.n d6524 │ │ lsls r3, r1, #4 │ │ subs r0, r0, r0 │ │ asrs r3, r0, #32 │ │ - b.n d62cc │ │ + b.n d62dc │ │ adds r0, #200 @ 0xc8 │ │ - b.n d6312 │ │ + b.n d6322 │ │ subs r7, #19 │ │ - b.n d6160 │ │ + b.n d6170 │ │ asrs r1, r0, #32 │ │ - b.n d5e30 │ │ + b.n d5e40 │ │ adds r2, #163 @ 0xa3 │ │ - b.n d61ca │ │ + b.n d61da │ │ movs r2, #33 @ 0x21 │ │ - b.n d61ce │ │ + b.n d61de │ │ str r3, [r0, #32] │ │ - b.n d6196 │ │ + b.n d61a6 │ │ asrs r7, r1, #32 │ │ - b.n d6298 │ │ + b.n d62a8 │ │ str r1, [r0, r0] │ │ - b.n d5fa6 │ │ + b.n d5fb6 │ │ movs r7, r3 │ │ - b.n d6548 │ │ + b.n d6558 │ │ lsls r0, r0, #4 │ │ ldrh r0, [r0, #16] │ │ movs r0, #8 │ │ - b.n d63c0 │ │ + b.n d63d0 │ │ movs r4, r0 │ │ - b.n d61ea │ │ + b.n d61fa │ │ asrs r5, r1, #32 │ │ - b.n d65ee │ │ + b.n d65fe │ │ lsls r1, r0, #18 │ │ add.w r0, r0, r0 │ │ - b.n d6556 │ │ + b.n d6566 │ │ movs r1, r7 │ │ subs r0, r0, r0 │ │ str r1, [r0, r0] │ │ - b.n d63c8 │ │ + b.n d63d8 │ │ movs r0, r1 │ │ - b.n d59fc │ │ + b.n d5a0c │ │ movs r0, r4 │ │ - b.n d6572 │ │ + b.n d6582 │ │ asrs r0, r0, #32 │ │ - b.n d620a │ │ + b.n d621a │ │ movs r0, #8 │ │ - b.n d57f0 │ │ + b.n d5800 │ │ asrs r0, r1, #32 │ │ - b.n d59ec │ │ + b.n d59fc │ │ movs r2, r6 │ │ lsrs r0, r0, #8 │ │ adds r0, #4 │ │ - b.n d59fa │ │ + b.n d5a0a │ │ adds r1, r0, #0 │ │ - b.n d63ea │ │ + b.n d63fa │ │ movs r4, r0 │ │ - b.n d6222 │ │ + b.n d6232 │ │ lsls r7, r2, #19 │ │ add.w r0, r0, r0 │ │ - b.n d658a │ │ + b.n d659a │ │ movs r4, r5 │ │ subs r0, r0, r0 │ │ str r1, [r0, #0] │ │ - b.n d63fe │ │ + b.n d640e │ │ movs r5, r0 │ │ - b.n d61a2 │ │ + b.n d61b2 │ │ @ instruction: 0xfff03aff │ │ movs r0, #8 │ │ - b.n d5a38 │ │ + b.n d5a48 │ │ movs r4, r0 │ │ - b.n d6242 │ │ + b.n d6252 │ │ asrs r5, r1, #32 │ │ - b.n d6646 │ │ + b.n d6656 │ │ lsls r1, r0, #18 │ │ add.w r0, r0, r4, asr #32 │ │ and.w r0, r0, r7 │ │ - b.n d6326 │ │ + b.n d6336 │ │ asrs r0, r4, #32 │ │ - b.n d6656 │ │ + b.n d6666 │ │ movs r0, #15 │ │ - b.n d66da │ │ + b.n d66ea │ │ adds r0, #0 │ │ - b.n d665e │ │ + b.n d666e │ │ movs r1, r2 │ │ - b.n d6026 │ │ + b.n d6036 │ │ asrs r0, r1, #32 │ │ - b.n d633a │ │ + b.n d634a │ │ movs r5, #129 @ 0x81 │ │ - b.n d622a │ │ + b.n d623a │ │ movs r4, r0 │ │ - b.n d626e │ │ + b.n d627e │ │ asrs r0, r0, #32 │ │ - b.n d6672 │ │ + b.n d6682 │ │ lsls r6, r4, #5 │ │ @ instruction: 0xeb00ff96 │ │ @ instruction: 0xeaff10b0 │ │ - b.n d63d2 │ │ + b.n d63e2 │ │ movs r7, r0 │ │ - b.n d65e4 │ │ + b.n d65f4 │ │ lsls r1, r5, #2 │ │ ldrh r0, [r0, #16] │ │ movs r0, #4 │ │ - b.n d6468 │ │ + b.n d6478 │ │ asrs r1, r0, #4 │ │ - b.n d5e72 │ │ - blx 4d7054 │ │ + b.n d5e82 │ │ + blx 4d7064 │ │ lsls r0, r4, #12 │ │ movs r0, r0 │ │ movs r0, r4 │ │ movs r0, r0 │ │ lsls r4, r7, #8 │ │ movs r0, r0 │ │ lsls r0, r0, #11 │ │ @@ -284619,2303 +284499,2303 @@ │ │ lsls r4, r2, #13 │ │ movs r0, r0 │ │ lsls r4, r2, #13 │ │ movs r0, r0 │ │ lsls r4, r2, #13 │ │ movs r0, r0 │ │ movs r0, r1 │ │ - b.n d6228 │ │ + b.n d6238 │ │ lsls r2, r1, #3 │ │ cmp r2, #0 │ │ movs r0, #4 │ │ - b.n d5ab8 │ │ + b.n d5ac8 │ │ asrs r3, r0, #32 │ │ - b.n d63d4 │ │ + b.n d63e4 │ │ movs r0, #1 │ │ - b.n d5f2a │ │ + b.n d5f3a │ │ asrs r1, r0, #32 │ │ - b.n d640e │ │ + b.n d641e │ │ movs r6, r1 │ │ - b.n d6630 │ │ + b.n d6640 │ │ lsls r4, r0, #3 │ │ ldrh r0, [r0, #16] │ │ movs r4, r0 │ │ - b.n d62d6 │ │ + b.n d62e6 │ │ asrs r0, r0, #32 │ │ - b.n d66da │ │ + b.n d66ea │ │ adds r0, #0 │ │ - b.n d66de │ │ + b.n d66ee │ │ lsls r3, r1, #5 │ │ @ instruction: 0xeb009002 │ │ - b.n d64b4 │ │ + b.n d64c4 │ │ str r4, [r0, r0] │ │ - b.n d5ae4 │ │ + b.n d5af4 │ │ str r0, [r1, #0] │ │ - b.n d64c8 │ │ + b.n d64d8 │ │ vpmin.u q15, q12, │ │ asrs r5, r1, #32 │ │ - b.n d63ca │ │ + b.n d63da │ │ movs r5, r1 │ │ - b.n d665c │ │ + b.n d666c │ │ lsls r1, r7, #2 │ │ lsrs r0, r0, #8 │ │ str r0, [r1, #0] │ │ - b.n d64dc │ │ + b.n d64ec │ │ asrs r7, r1, #32 │ │ - b.n d63da │ │ + b.n d63ea │ │ movs r4, r0 │ │ - b.n d630a │ │ + b.n d631a │ │ movs r0, #6 │ │ - b.n d630e │ │ + b.n d631e │ │ lsls r1, r7, #16 │ │ add.w r0, r0, r8, lsl #8 │ │ - b.n d5b10 │ │ + b.n d5b20 │ │ movs r4, r0 │ │ - b.n d631a │ │ + b.n d632a │ │ asrs r5, r1, #32 │ │ - b.n d671e │ │ + b.n d672e │ │ lsls r3, r1, #17 │ │ add.w r0, r0, r7, asr #1 │ │ and.w r0, r0, r8 │ │ - b.n d661e │ │ + b.n d662e │ │ lsls r5, r5, #2 │ │ subs r0, r0, r0 │ │ str r0, [r1, #0] │ │ - b.n d650c │ │ + b.n d651c │ │ movs r4, r0 │ │ - b.n d6336 │ │ + b.n d6346 │ │ asrs r5, r1, #32 │ │ - b.n d673a │ │ + b.n d674a │ │ movs r0, #6 │ │ - b.n d633e │ │ + b.n d634e │ │ lsls r5, r5, #16 │ │ add.w r0, r0, r0 │ │ - b.n d66a6 │ │ + b.n d66b6 │ │ lsls r6, r3, #1 │ │ subs r0, r0, r0 │ │ movs r0, r1 │ │ - b.n d5b48 │ │ + b.n d5b58 │ │ subs r2, r0, #5 │ │ - b.n d6752 │ │ + b.n d6762 │ │ movs r0, #208 @ 0xd0 │ │ - b.n d6396 │ │ + b.n d63a6 │ │ movs r0, r1 │ │ - b.n d651a │ │ + b.n d652a │ │ movs r0, r1 │ │ - b.n d5b38 │ │ + b.n d5b48 │ │ movs r4, r0 │ │ - b.n d6362 │ │ + b.n d6372 │ │ lsls r7, r0, #18 │ │ add.w r0, r0, r0 │ │ - b.n d66ca │ │ + b.n d66da │ │ lsls r5, r2, #1 │ │ subs r0, r0, r0 │ │ str r7, [r0, r0] │ │ - b.n d6466 │ │ + b.n d6476 │ │ @ instruction: 0xffe60aff │ │ movs r0, r1 │ │ - b.n d5b74 │ │ + b.n d5b84 │ │ asrs r1, r1, #4 │ │ - b.n d663e │ │ + b.n d664e │ │ movs r0, #208 @ 0xd0 │ │ - b.n d63c2 │ │ + b.n d63d2 │ │ movs r0, r1 │ │ - b.n d6546 │ │ + b.n d6556 │ │ movs r0, r1 │ │ - b.n d5b64 │ │ + b.n d5b74 │ │ movs r4, r0 │ │ - b.n d638e │ │ + b.n d639e │ │ lsls r4, r7, #17 │ │ add.w r0, r0, r0 │ │ - b.n d66f6 │ │ + b.n d6706 │ │ lsls r2, r1, #1 │ │ subs r0, r0, r0 │ │ strb r1, [r1, #0] │ │ - b.n d6568 │ │ + b.n d6578 │ │ movs r2, r1 │ │ - b.n d6710 │ │ + b.n d6720 │ │ @ instruction: 0xffda0aff │ │ movs r0, r1 │ │ - b.n d5ba4 │ │ + b.n d5bb4 │ │ asrs r2, r1, #4 │ │ - b.n d666e │ │ + b.n d667e │ │ movs r0, #208 @ 0xd0 │ │ - b.n d63f2 │ │ + b.n d6402 │ │ movs r0, r1 │ │ - b.n d6576 │ │ + b.n d6586 │ │ movs r0, r1 │ │ - b.n d5b94 │ │ + b.n d5ba4 │ │ movs r4, r0 │ │ - b.n d63be │ │ + b.n d63ce │ │ lsls r0, r6, #17 │ │ add.w r0, r0, r0 │ │ - b.n d6726 │ │ + b.n d6736 │ │ movs r6, r7 │ │ subs r0, r0, r0 │ │ movs r3, r1 │ │ - b.n d673c │ │ + b.n d674c │ │ @ instruction: 0xffcf0aff │ │ movs r0, r1 │ │ - b.n d5bd0 │ │ + b.n d5be0 │ │ asrs r3, r1, #4 │ │ - b.n d669a │ │ + b.n d66aa │ │ movs r0, #208 @ 0xd0 │ │ - b.n d641e │ │ + b.n d642e │ │ movs r0, r1 │ │ - b.n d65a2 │ │ + b.n d65b2 │ │ movs r0, r1 │ │ - b.n d5bc0 │ │ + b.n d5bd0 │ │ movs r4, r0 │ │ - b.n d63ea │ │ + b.n d63fa │ │ lsls r5, r4, #17 │ │ add.w r0, r0, r0 │ │ - b.n d6752 │ │ + b.n d6762 │ │ movs r3, r6 │ │ subs r0, r0, r0 │ │ movs r4, r1 │ │ - b.n d6768 │ │ + b.n d6778 │ │ @ instruction: 0xffc40aff │ │ movs r0, r1 │ │ - b.n d5bfc │ │ + b.n d5c0c │ │ subs r3, r0, #5 │ │ - b.n d6806 │ │ + b.n d6816 │ │ movs r0, #208 @ 0xd0 │ │ - b.n d644a │ │ + b.n d645a │ │ movs r0, r1 │ │ - b.n d65ce │ │ + b.n d65de │ │ movs r0, r1 │ │ - b.n d5bec │ │ + b.n d5bfc │ │ movs r4, r0 │ │ - b.n d6416 │ │ + b.n d6426 │ │ lsls r2, r3, #17 │ │ add.w r0, r0, r0 │ │ - b.n d677e │ │ + b.n d678e │ │ movs r0, r5 │ │ subs r0, r0, r0 │ │ movs r5, r1 │ │ - b.n d6794 │ │ + b.n d67a4 │ │ @ instruction: 0xffb90aff │ │ movs r0, r1 │ │ - b.n d5c28 │ │ + b.n d5c38 │ │ asrs r5, r1, #4 │ │ - b.n d66f2 │ │ + b.n d6702 │ │ movs r0, #208 @ 0xd0 │ │ - b.n d6476 │ │ + b.n d6486 │ │ movs r0, r1 │ │ - b.n d65fa │ │ + b.n d660a │ │ movs r0, r1 │ │ - b.n d5c18 │ │ + b.n d5c28 │ │ movs r4, r0 │ │ - b.n d6442 │ │ + b.n d6452 │ │ lsls r7, r1, #17 │ │ add.w r0, r0, r0 │ │ - b.n d67aa │ │ + b.n d67ba │ │ movs r5, r3 │ │ subs r0, r0, r0 │ │ movs r6, r1 │ │ - b.n d67c0 │ │ + b.n d67d0 │ │ @ instruction: 0xffae0aff │ │ movs r0, r1 │ │ - b.n d5c54 │ │ + b.n d5c64 │ │ asrs r6, r1, #4 │ │ - b.n d671e │ │ + b.n d672e │ │ movs r0, #208 @ 0xd0 │ │ - b.n d64a2 │ │ + b.n d64b2 │ │ movs r0, r1 │ │ - b.n d6626 │ │ + b.n d6636 │ │ movs r0, r1 │ │ - b.n d5c44 │ │ + b.n d5c54 │ │ movs r4, r0 │ │ - b.n d646e │ │ + b.n d647e │ │ lsls r4, r0, #17 │ │ add.w r0, r0, r0 │ │ - b.n d67d6 │ │ + b.n d67e6 │ │ movs r2, r2 │ │ subs r0, r0, r0 │ │ movs r7, r1 │ │ - b.n d67ec │ │ + b.n d67fc │ │ @ instruction: 0xffa30aff │ │ movs r0, r1 │ │ - b.n d5c80 │ │ + b.n d5c90 │ │ asrs r7, r1, #4 │ │ - b.n d674a │ │ + b.n d675a │ │ movs r0, #208 @ 0xd0 │ │ - b.n d64ce │ │ + b.n d64de │ │ movs r0, r1 │ │ - b.n d6652 │ │ + b.n d6662 │ │ movs r0, r1 │ │ - b.n d5c70 │ │ + b.n d5c80 │ │ movs r4, r0 │ │ - b.n d649a │ │ + b.n d64aa │ │ lsls r1, r7, #16 │ │ add.w r0, r0, r0 │ │ - b.n d6802 │ │ + b.n d6812 │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ @ instruction: 0xff99eaff │ │ str r0, [r1, #0] │ │ - b.n d6688 │ │ + b.n d6698 │ │ movs r4, r0 │ │ - b.n d64b2 │ │ + b.n d64c2 │ │ asrs r5, r1, #32 │ │ - b.n d68b6 │ │ + b.n d68c6 │ │ movs r0, #6 │ │ - b.n d64ba │ │ + b.n d64ca │ │ lsls r6, r1, #15 │ │ add.w r0, r0, r0 │ │ - b.n d6822 │ │ + b.n d6832 │ │ movs r0, r6 │ │ lsrs r0, r0, #8 │ │ str r4, [r0, r0] │ │ - b.n d5cc4 │ │ + b.n d5cd4 │ │ vpmin.u8 q7, , │ │ str r4, [r0, r0] │ │ - b.n d5ccc │ │ + b.n d5cdc │ │ str r0, [r0, #0] │ │ - b.n d68d6 │ │ + b.n d68e6 │ │ asrs r0, r0, #32 │ │ - b.n d68da │ │ + b.n d68ea │ │ movs r0, r1 │ │ - b.n d6450 │ │ + b.n d6460 │ │ lsls r0, r0, #1 │ │ cmp r2, #0 │ │ movs r0, #3 │ │ - b.n d65f8 │ │ + b.n d6608 │ │ str r0, [sp, #4] │ │ - b.n d66bc │ │ + b.n d66cc │ │ movs r0, #2 │ │ - b.n d62b8 │ │ + b.n d62c8 │ │ movs r0, #208 @ 0xd0 │ │ - b.n d6556 │ │ + b.n d6566 │ │ adds r0, #127 @ 0x7f │ │ - b.n d65ba │ │ + b.n d65ca │ │ movs r0, r0 │ │ - b.n d685e │ │ + b.n d686e │ │ str r3, [r2, #16] │ │ - b.n d64ca │ │ + b.n d64da │ │ asrs r7, r0, #32 │ │ - b.n d66c4 │ │ + b.n d66d4 │ │ @ instruction: 0xfff44aff │ │ strb r0, [r1, #0] │ │ - b.n d66e4 │ │ + b.n d66f4 │ │ movs r4, r0 │ │ - b.n d650e │ │ + b.n d651e │ │ asrs r5, r1, #32 │ │ - b.n d6912 │ │ + b.n d6922 │ │ movs r0, #7 │ │ - b.n d6516 │ │ + b.n d6526 │ │ lsls r7, r6, #14 │ │ add.w r0, r0, r8 │ │ - b.n d5d18 │ │ + b.n d5d28 │ │ lsls r6, r0, #4 │ │ - b.n d62e2 │ │ + b.n d62f2 │ │ str r7, [r0, #0] │ │ - b.n d6526 │ │ + b.n d6536 │ │ cmp r7, #129 @ 0x81 │ │ - b.n d66ea │ │ + b.n d66fa │ │ mcr2 10, 7, lr, cr5, cr15, {7} @ │ │ asrs r1, r0, #32 │ │ - b.n d67f2 │ │ + b.n d6802 │ │ movs r7, r0 │ │ - b.n d660a │ │ + b.n d661a │ │ asrs r0, r1, #32 │ │ - b.n d687a │ │ + b.n d688a │ │ movs r0, #1 │ │ - b.n d62fe │ │ + b.n d630e │ │ movs r4, r0 │ │ - b.n d6542 │ │ + b.n d6552 │ │ asrs r1, r0, #32 │ │ - b.n d6946 │ │ + b.n d6956 │ │ adds r0, #1 │ │ - b.n d694a │ │ + b.n d695a │ │ lsls r0, r6, #2 │ │ @ instruction: 0xeb00fee0 │ │ @ instruction: 0xeaff5004 │ │ - b.n d5d50 │ │ + b.n d5d60 │ │ movs r3, r0 │ │ - b.n d666c │ │ + b.n d667c │ │ adds r0, #1 │ │ - b.n d695e │ │ + b.n d696e │ │ movs r0, r0 │ │ - b.n d61cc │ │ + b.n d61dc │ │ asrs r0, r6, #3 │ │ - b.n d6626 │ │ + b.n d6636 │ │ movs r7, r1 │ │ - b.n d662a │ │ + b.n d663a │ │ lsls r1, r0, #24 │ │ - b.n d652e │ │ + b.n d653e │ │ asrs r1, r0, #32 │ │ - b.n d6972 │ │ + b.n d6982 │ │ movs r0, #1 │ │ - b.n d6736 │ │ + b.n d6746 │ │ movs r4, r0 │ │ - b.n d657a │ │ + b.n d658a │ │ lsls r4, r4, #2 │ │ @ instruction: 0xeb009002 │ │ - b.n d6750 │ │ + b.n d6760 │ │ str r0, [r1, #0] │ │ - b.n d6760 │ │ + b.n d6770 │ │ mrc2 10, 6, lr, cr2, cr15, {7} @ │ │ movs r0, #8 │ │ - b.n d5d88 │ │ + b.n d5d98 │ │ movs r4, r0 │ │ - b.n d6592 │ │ + b.n d65a2 │ │ asrs r5, r1, #32 │ │ - b.n d6996 │ │ + b.n d69a6 │ │ strb r4, [r0, #0] │ │ - b.n d5b7e │ │ + b.n d5b8e │ │ movs r0, #8 │ │ - b.n d5d78 │ │ + b.n d5d88 │ │ lsls r3, r5, #14 │ │ add.w r0, r0, r4 │ │ - b.n d65a6 │ │ + b.n d65b6 │ │ asrs r7, r1, #2 │ │ - b.n d69aa │ │ + b.n d69ba │ │ movs r0, #7 │ │ - b.n d65ae │ │ + b.n d65be │ │ vpmin.u16 q15, q13, │ │ asrs r0, r0, #32 │ │ - b.n d5db0 │ │ + b.n d5dc0 │ │ movs r0, r1 │ │ - b.n d69ba │ │ + b.n d69ca │ │ movs r1, r0 │ │ - b.n d68a0 │ │ + b.n d68b0 │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ movs r0, #8 │ │ - b.n d67a0 │ │ + b.n d67b0 │ │ movs r4, r0 │ │ - b.n d65ca │ │ + b.n d65da │ │ asrs r6, r1, #32 │ │ - b.n d69ce │ │ + b.n d69de │ │ lsls r1, r1, #14 │ │ add.w r0, r0, r8, lsl #8 │ │ - b.n d5dd0 │ │ + b.n d5de0 │ │ movs r4, r0 │ │ - b.n d65da │ │ + b.n d65ea │ │ asrs r7, r1, #32 │ │ - b.n d69de │ │ + b.n d69ee │ │ lsls r3, r3, #14 │ │ add.w r0, r0, r8 │ │ - b.n d69e6 │ │ - beq.n d62e0 │ │ - b.n d6740 │ │ + b.n d69f6 │ │ + beq.n d62f0 │ │ + b.n d6750 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r5, r6, sl, fp, lr} │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n d67d0 │ │ + b.n d67e0 │ │ ands r2, r0 │ │ - b.n d65fa │ │ + b.n d660a │ │ movs r0, #8 │ │ - b.n d5df4 │ │ + b.n d5e04 │ │ movs r5, r0 │ │ - b.n d6964 │ │ + b.n d6974 │ │ movs r0, r3 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n d696c │ │ + b.n d697c │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n d6974 │ │ + b.n d6984 │ │ movs r5, r4 │ │ subs r0, r0, r0 │ │ asrs r2, r0, #32 │ │ - b.n d6a1a │ │ + b.n d6a2a │ │ movs r7, r1 │ │ - b.n d6986 │ │ + b.n d6996 │ │ movs r4, r2 │ │ ldrh r0, [r0, #16] │ │ movs r0, r0 │ │ - b.n d698c │ │ + b.n d699c │ │ movs r2, r2 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #32 │ │ - b.n d662e │ │ + b.n d663e │ │ movs r3, r2 │ │ and.w r0, r0, r4, lsl #24 │ │ - b.n d6a7c │ │ + b.n d6a8c │ │ asrs r2, r0, #32 │ │ - b.n d6a3a │ │ + b.n d6a4a │ │ movs r1, r0 │ │ - b.n d69aa │ │ + b.n d69ba │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n d69ac │ │ + b.n d69bc │ │ movs r7, r1 │ │ subs r0, r0, r0 │ │ movs r7, r1 │ │ - b.n d69b6 │ │ + b.n d69c6 │ │ movs r0, r1 │ │ ldrh r0, [r0, #16] │ │ str r0, [r0, r0] │ │ - b.n d6656 │ │ + b.n d6666 │ │ str r2, [r0, #0] │ │ - b.n d665a │ │ + b.n d666a │ │ lsls r2, r7, #15 │ │ add.w r0, r0, r5 │ │ - b.n d6662 │ │ + b.n d6672 │ │ movs r0, #6 │ │ - b.n d6666 │ │ + b.n d6676 │ │ movs r1, r1 │ │ and.w r0, r0, r4, lsl #4 │ │ - b.n d6654 │ │ + b.n d6664 │ │ asrs r2, r0, #32 │ │ - b.n d6a72 │ │ + b.n d6a82 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n d667a │ │ + b.n d668a │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r0, r1, r2, r3, r7, ip} │ │ - b.n d6a82 │ │ + b.n d6a92 │ │ lsls r4, r3, #13 │ │ add.w r0, r0, r3 │ │ and.w r0, r0, pc, lsr #32 │ │ - b.n d69f6 │ │ + b.n d6a06 │ │ @ instruction: 0xfff88aff │ │ adds r1, r0, #0 │ │ - b.n d685e │ │ + b.n d686e │ │ lsls r4, r4, #14 │ │ add.w r0, r0, r0 │ │ - b.n d69fe │ │ + b.n d6a0e │ │ movs r1, r0 │ │ asrs r0, r0, #12 │ │ asrs r0, r0, #2 │ │ - b.n d66a6 │ │ + b.n d66b6 │ │ movs r1, r0 │ │ - b.n d66aa │ │ + b.n d66ba │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r4, r5, ip} │ │ - b.n d5eb0 │ │ + b.n d5ec0 │ │ movs r0, #48 @ 0x30 │ │ - b.n d5eb4 │ │ + b.n d5ec4 │ │ adds r0, #48 @ 0x30 │ │ - b.n d5eb8 │ │ + b.n d5ec8 │ │ asrs r1, r0, #32 │ │ - b.n d649c │ │ + b.n d64ac │ │ movs r4, r5 │ │ - b.n d5ec0 │ │ + b.n d5ed0 │ │ movs r0, #2 │ │ - b.n d64a4 │ │ + b.n d64b4 │ │ adds r0, #3 │ │ - b.n d64a8 │ │ + b.n d64b8 │ │ movs r0, r0 │ │ - b.n d62cc │ │ + b.n d62dc │ │ lsls r0, r5 │ │ - b.n d6892 │ │ + b.n d68a2 │ │ movs r4, r0 │ │ - b.n d66d6 │ │ + b.n d66e6 │ │ lsrs r5, r0, #10 │ │ add.w r0, r0, r4 │ │ - b.n d66de │ │ + b.n d66ee │ │ lsrs r7, r7, #9 │ │ add.w r9, r0, r6, asr #2 │ │ - add.w r4, r0, r3, ror #11 │ │ - vsli.32 , q14, #19 │ │ - @ instruction: 0xfff38ddd │ │ + add.w r5, r0, r5, ror #8 │ │ + vmlsl.u , d3, d9[0] │ │ + vcvt.u32.f32 q12, q6, #13 │ │ vrshr.u64 q11, q10, #13 │ │ movs r0, r0 │ │ - ldr r4, [pc, #448] @ (d6578 ) │ │ + ldr r4, [pc, #448] @ (d6588 ) │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n d68d8 │ │ + b.n d68e8 │ │ str r0, [r1, r0] │ │ - b.n d5ef8 │ │ + b.n d5f08 │ │ movs r5, r0 │ │ - b.n d6a68 │ │ + b.n d6a78 │ │ movs r2, r3 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n d6a70 │ │ + b.n d6a80 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n d6a78 │ │ + b.n d6a88 │ │ movs r3, r5 │ │ subs r0, r0, r0 │ │ asrs r2, r0, #32 │ │ - b.n d6b1e │ │ + b.n d6b2e │ │ movs r7, r1 │ │ - b.n d6a86 │ │ + b.n d6a96 │ │ movs r6, r2 │ │ ldrh r0, [r0, #16] │ │ movs r0, r0 │ │ - b.n d6a90 │ │ + b.n d6aa0 │ │ movs r4, r2 │ │ subs r0, r0, r0 │ │ adds r0, #0 │ │ - b.n d5f1c │ │ + b.n d5f2c │ │ asrs r2, r0, #32 │ │ - b.n d6736 │ │ + b.n d6746 │ │ movs r0, #3 │ │ - b.n d673a │ │ + b.n d674a │ │ movs r4, r2 │ │ and.w r0, r0, r4, lsl #24 │ │ - b.n d6b88 │ │ + b.n d6b98 │ │ asrs r2, r0, #32 │ │ - b.n d6b46 │ │ + b.n d6b56 │ │ movs r1, r0 │ │ - b.n d6ab6 │ │ + b.n d6ac6 │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n d6ab8 │ │ + b.n d6ac8 │ │ movs r0, r2 │ │ subs r0, r0, r0 │ │ movs r7, r1 │ │ - b.n d6abe │ │ + b.n d6ace │ │ movs r0, r1 │ │ ldrh r0, [r0, #16] │ │ ands r0, r0 │ │ - b.n d6762 │ │ + b.n d6772 │ │ str r2, [r0, #0] │ │ - b.n d6766 │ │ + b.n d6776 │ │ lsls r7, r6, #14 │ │ add.w r0, r0, r6, lsl #8 │ │ - b.n d676e │ │ + b.n d677e │ │ movs r4, r0 │ │ - b.n d6772 │ │ + b.n d6782 │ │ movs r2, r1 │ │ and.w r0, r0, r2, lsl #4 │ │ - b.n d6760 │ │ + b.n d6770 │ │ asrs r2, r0, #32 │ │ - b.n d6b7e │ │ + b.n d6b8e │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n d6786 │ │ + b.n d6796 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {sp} │ │ - b.n d5f78 │ │ + b.n d5f88 │ │ asrs r7, r1, #2 │ │ - b.n d6b92 │ │ + b.n d6ba2 │ │ lsls r6, r5, #12 │ │ add.w r0, r0, r6 │ │ and.w r0, r0, pc, lsr #32 │ │ - b.n d6b02 │ │ + b.n d6b12 │ │ @ instruction: 0xfff78aff │ │ lsrs r0, r2 │ │ - b.n d67f0 │ │ + b.n d6800 │ │ adds r1, r0, #0 │ │ - b.n d696e │ │ + b.n d697e │ │ adds r0, #5 │ │ - b.n d67ae │ │ + b.n d67be │ │ movs r0, #4 │ │ - b.n d67b2 │ │ + b.n d67c2 │ │ lsls r3, r6, #13 │ │ add.w r0, r0, r0 │ │ - b.n d6b1a │ │ + b.n d6b2a │ │ movs r1, r0 │ │ asrs r0, r0, #12 │ │ asrs r0, r0, #2 │ │ - b.n d67c2 │ │ + b.n d67d2 │ │ movs r1, r0 │ │ - b.n d67c6 │ │ + b.n d67d6 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r4, r5, ip} │ │ - b.n d5fcc │ │ + b.n d5fdc │ │ movs r0, #48 @ 0x30 │ │ - b.n d5fd0 │ │ + b.n d5fe0 │ │ adds r0, #48 @ 0x30 │ │ - b.n d5fd4 │ │ + b.n d5fe4 │ │ asrs r1, r0, #32 │ │ - b.n d65b8 │ │ + b.n d65c8 │ │ movs r4, r5 │ │ - b.n d5fdc │ │ + b.n d5fec │ │ movs r0, #2 │ │ - b.n d65c0 │ │ + b.n d65d0 │ │ adds r0, #3 │ │ - b.n d65c4 │ │ + b.n d65d4 │ │ movs r0, r0 │ │ - b.n d63e8 │ │ + b.n d63f8 │ │ lsls r0, r5 │ │ - b.n d69ae │ │ + b.n d69be │ │ movs r4, r0 │ │ - b.n d67f2 │ │ + b.n d6802 │ │ lsrs r6, r7, #8 │ │ add.w r0, r0, r4 │ │ - b.n d67fa │ │ + b.n d680a │ │ lsrs r0, r7, #8 │ │ add.w r9, r0, pc, lsr #1 │ │ - add.w r3, r0, r7, lsr #11 │ │ - vtbl.8 d18, {d3-d4}, d13 │ │ - vqdmulh.s q12, , d1[0] │ │ + add.w r4, r0, r9, lsr #8 │ │ + vtbx.8 d18, {d3}, d8 │ │ + vqrdmlah.s q12, , d0[0] │ │ vsra.u64 q11, q4, #13 │ │ movs r0, r0 │ │ - ldr r7, [pc, #960] @ (d6894 ) │ │ + ldr r7, [pc, #960] @ (d68a4 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n d69f4 │ │ - beq.n d6504 │ │ - b.n d6978 │ │ + b.n d6a04 │ │ + beq.n d6514 │ │ + b.n d6988 │ │ str r3, [r0, #0] │ │ - b.n d6822 │ │ + b.n d6832 │ │ strh r0, [r0, #0] │ │ - b.n d6826 │ │ + b.n d6836 │ │ movs r5, r0 │ │ - b.n d6b8c │ │ + b.n d6b9c │ │ lsls r0, r5, #3 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n d6b94 │ │ + b.n d6ba4 │ │ lsls r7, r6, #2 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n d6b9c │ │ + b.n d6bac │ │ lsls r7, r5, #4 │ │ subs r0, r0, r0 │ │ strb r2, [r0, #0] │ │ - b.n d6c42 │ │ + b.n d6c52 │ │ movs r0, r0 │ │ - b.n d6bb2 │ │ + b.n d6bc2 │ │ lsls r2, r5, #3 │ │ subs r0, r0, r0 │ │ ands r2, r0 │ │ - b.n d684e │ │ + b.n d685e │ │ movs r0, #16 │ │ - b.n d6a2c │ │ + b.n d6a3c │ │ movs r0, r1 │ │ - b.n d6856 │ │ + b.n d6866 │ │ asrs r5, r1, #32 │ │ - b.n d6c5a │ │ + b.n d6c6a │ │ lsls r6, r4, #11 │ │ add.w r0, r0, r0 │ │ - b.n d6bc2 │ │ + b.n d6bd2 │ │ lsls r3, r4, #3 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #32 │ │ - b.n d686a │ │ + b.n d687a │ │ movs r1, r0 │ │ - b.n d6b56 │ │ + b.n d6b66 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r2 │ │ - b.n d6070 │ │ + b.n d6080 │ │ asrs r0, r0, #32 │ │ - b.n d6c7a │ │ + b.n d6c8a │ │ movs r0, #4 │ │ - b.n d5e5e │ │ + b.n d5e6e │ │ movs r0, r2 │ │ - b.n d605c │ │ + b.n d606c │ │ movs r0, r1 │ │ - b.n d6886 │ │ + b.n d6896 │ │ lsls r1, r6, #11 │ │ add.w r0, r0, r4, lsl #4 │ │ - b.n d688e │ │ + b.n d689e │ │ movs r0, r0 │ │ - b.n d6bf2 │ │ + b.n d6c02 │ │ lsls r7, r2, #3 │ │ subs r0, r0, r0 │ │ movs r2, r0 │ │ - b.n d6b7c │ │ + b.n d6b8c │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r2 │ │ - b.n d609c │ │ + b.n d60ac │ │ asrs r1, r0, #32 │ │ - b.n d6ca6 │ │ + b.n d6cb6 │ │ movs r0, #4 │ │ - b.n d5e8a │ │ + b.n d5e9a │ │ movs r0, r2 │ │ - b.n d6088 │ │ + b.n d6098 │ │ movs r0, r1 │ │ - b.n d68b2 │ │ + b.n d68c2 │ │ lsls r6, r4, #11 │ │ add.w r0, r0, r4, lsl #4 │ │ - b.n d68ba │ │ + b.n d68ca │ │ movs r0, r0 │ │ - b.n d6c1e │ │ + b.n d6c2e │ │ lsls r4, r1, #3 │ │ subs r0, r0, r0 │ │ movs r4, r0 │ │ - b.n d6ba8 │ │ + b.n d6bb8 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r2 │ │ - b.n d60c8 │ │ + b.n d60d8 │ │ asrs r2, r0, #32 │ │ - b.n d6cd2 │ │ + b.n d6ce2 │ │ movs r0, #4 │ │ - b.n d5eb6 │ │ + b.n d5ec6 │ │ movs r0, r2 │ │ - b.n d60b4 │ │ + b.n d60c4 │ │ movs r0, r1 │ │ - b.n d68de │ │ + b.n d68ee │ │ lsls r3, r3, #11 │ │ add.w r0, r0, r4, lsl #4 │ │ - b.n d68e6 │ │ + b.n d68f6 │ │ movs r0, r0 │ │ - b.n d6c4a │ │ + b.n d6c5a │ │ lsls r1, r0, #3 │ │ subs r0, r0, r0 │ │ movs r0, r1 │ │ - b.n d6bd4 │ │ + b.n d6be4 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r2 │ │ - b.n d60f4 │ │ + b.n d6104 │ │ asrs r3, r0, #32 │ │ - b.n d6cfe │ │ + b.n d6d0e │ │ movs r0, #4 │ │ - b.n d5ee2 │ │ + b.n d5ef2 │ │ movs r0, r2 │ │ - b.n d60e0 │ │ + b.n d60f0 │ │ movs r0, r1 │ │ - b.n d690a │ │ + b.n d691a │ │ lsls r0, r2, #11 │ │ add.w r0, r0, r4, lsl #4 │ │ - b.n d6912 │ │ + b.n d6922 │ │ movs r0, r0 │ │ - b.n d6c76 │ │ + b.n d6c86 │ │ lsls r6, r6, #2 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n d6c00 │ │ + b.n d6c10 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r2 │ │ - b.n d6120 │ │ + b.n d6130 │ │ asrs r4, r0, #32 │ │ - b.n d6d2a │ │ + b.n d6d3a │ │ movs r0, #4 │ │ - b.n d5f0e │ │ + b.n d5f1e │ │ movs r0, r2 │ │ - b.n d610c │ │ + b.n d611c │ │ movs r0, r1 │ │ - b.n d6936 │ │ + b.n d6946 │ │ lsls r5, r0, #11 │ │ add.w r0, r0, r4, lsl #4 │ │ - b.n d693e │ │ + b.n d694e │ │ movs r0, r0 │ │ - b.n d6ca2 │ │ + b.n d6cb2 │ │ lsls r3, r5, #2 │ │ subs r0, r0, r0 │ │ movs r0, r4 │ │ - b.n d6c2c │ │ + b.n d6c3c │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r2 │ │ - b.n d614c │ │ + b.n d615c │ │ asrs r5, r0, #32 │ │ - b.n d6d56 │ │ + b.n d6d66 │ │ movs r0, #4 │ │ - b.n d5f3a │ │ + b.n d5f4a │ │ movs r0, r2 │ │ - b.n d6138 │ │ + b.n d6148 │ │ movs r0, r1 │ │ - b.n d6962 │ │ + b.n d6972 │ │ lsls r2, r7, #10 │ │ add.w r0, r0, r4, lsl #4 │ │ - b.n d696a │ │ + b.n d697a │ │ movs r0, r0 │ │ - b.n d6cce │ │ + b.n d6cde │ │ lsls r0, r4, #2 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #1 │ │ - b.n d6c58 │ │ + b.n d6c68 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r2 │ │ - b.n d6178 │ │ + b.n d6188 │ │ asrs r6, r0, #32 │ │ - b.n d6d82 │ │ + b.n d6d92 │ │ movs r0, #4 │ │ - b.n d5f66 │ │ + b.n d5f76 │ │ movs r0, r2 │ │ - b.n d6164 │ │ + b.n d6174 │ │ movs r0, r1 │ │ - b.n d698e │ │ + b.n d699e │ │ lsls r7, r5, #10 │ │ add.w r0, r0, r4, lsl #4 │ │ - b.n d6996 │ │ + b.n d69a6 │ │ movs r0, r0 │ │ - b.n d6cfa │ │ + b.n d6d0a │ │ lsls r5, r2, #2 │ │ subs r0, r0, r0 │ │ lsls r0, r0, #2 │ │ - b.n d6c84 │ │ + b.n d6c94 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r2 │ │ - b.n d61a4 │ │ + b.n d61b4 │ │ asrs r7, r0, #32 │ │ - b.n d6dae │ │ + b.n d6dbe │ │ movs r0, #4 │ │ - b.n d5f92 │ │ + b.n d5fa2 │ │ movs r0, r2 │ │ - b.n d6190 │ │ + b.n d61a0 │ │ movs r0, r1 │ │ - b.n d69ba │ │ + b.n d69ca │ │ lsls r4, r4, #10 │ │ add.w r0, r0, r4, lsl #4 │ │ - b.n d69c2 │ │ + b.n d69d2 │ │ movs r0, r0 │ │ - b.n d6d26 │ │ + b.n d6d36 │ │ lsls r2, r1, #2 │ │ subs r0, r0, r0 │ │ lsrs r1, r0, #16 │ │ - b.n d6cb0 │ │ + b.n d6cc0 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r2 │ │ - b.n d61d0 │ │ + b.n d61e0 │ │ asrs r0, r1, #32 │ │ - b.n d6dda │ │ + b.n d6dea │ │ movs r0, #4 │ │ - b.n d5fbe │ │ + b.n d5fce │ │ movs r0, r2 │ │ - b.n d61bc │ │ + b.n d61cc │ │ movs r0, r1 │ │ - b.n d69e6 │ │ + b.n d69f6 │ │ lsls r1, r3, #10 │ │ add.w r0, r0, r4, lsl #4 │ │ - b.n d69ee │ │ + b.n d69fe │ │ movs r0, r0 │ │ - b.n d6d52 │ │ + b.n d6d62 │ │ lsls r7, r7, #1 │ │ subs r0, r0, r0 │ │ lsrs r2, r0, #16 │ │ - b.n d6cdc │ │ + b.n d6cec │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r2 │ │ - b.n d61fc │ │ + b.n d620c │ │ asrs r1, r1, #32 │ │ - b.n d6e06 │ │ + b.n d6e16 │ │ movs r0, #4 │ │ - b.n d5fea │ │ + b.n d5ffa │ │ movs r0, r2 │ │ - b.n d61e8 │ │ + b.n d61f8 │ │ movs r0, r1 │ │ - b.n d6a12 │ │ + b.n d6a22 │ │ lsls r6, r1, #10 │ │ add.w r0, r0, r4, lsl #4 │ │ - b.n d6a1a │ │ + b.n d6a2a │ │ movs r0, r0 │ │ - b.n d6d7e │ │ + b.n d6d8e │ │ lsls r4, r6, #1 │ │ subs r0, r0, r0 │ │ lsrs r1, r0, #12 │ │ - b.n d6d08 │ │ + b.n d6d18 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r2 │ │ - b.n d6228 │ │ + b.n d6238 │ │ asrs r2, r1, #32 │ │ - b.n d6e32 │ │ + b.n d6e42 │ │ movs r0, #4 │ │ - b.n d6016 │ │ + b.n d6026 │ │ movs r0, r2 │ │ - b.n d6214 │ │ + b.n d6224 │ │ movs r0, r1 │ │ - b.n d6a3e │ │ + b.n d6a4e │ │ lsls r3, r0, #10 │ │ add.w r0, r0, r4, lsl #4 │ │ - b.n d6a46 │ │ + b.n d6a56 │ │ movs r0, r0 │ │ - b.n d6daa │ │ + b.n d6dba │ │ lsls r1, r5, #1 │ │ subs r0, r0, r0 │ │ lsrs r2, r0, #12 │ │ - b.n d6d34 │ │ + b.n d6d44 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r2 │ │ - b.n d6254 │ │ + b.n d6264 │ │ asrs r3, r1, #32 │ │ - b.n d6e5e │ │ + b.n d6e6e │ │ movs r0, #4 │ │ - b.n d6042 │ │ + b.n d6052 │ │ movs r0, r2 │ │ - b.n d6240 │ │ + b.n d6250 │ │ movs r0, r1 │ │ - b.n d6a6a │ │ + b.n d6a7a │ │ lsls r0, r7, #9 │ │ add.w r0, r0, r4, lsl #4 │ │ - b.n d6a72 │ │ + b.n d6a82 │ │ movs r0, r0 │ │ - b.n d6dd6 │ │ + b.n d6de6 │ │ lsls r6, r3, #1 │ │ subs r0, r0, r0 │ │ lsrs r1, r0, #8 │ │ - b.n d6d60 │ │ + b.n d6d70 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r2 │ │ - b.n d6280 │ │ + b.n d6290 │ │ asrs r4, r1, #32 │ │ - b.n d6e8a │ │ + b.n d6e9a │ │ movs r0, #4 │ │ - b.n d606e │ │ + b.n d607e │ │ movs r0, r2 │ │ - b.n d626c │ │ + b.n d627c │ │ movs r0, r1 │ │ - b.n d6a96 │ │ + b.n d6aa6 │ │ lsls r5, r5, #9 │ │ add.w r0, r0, r4, lsl #4 │ │ - b.n d6a9e │ │ + b.n d6aae │ │ movs r0, r0 │ │ - b.n d6e02 │ │ + b.n d6e12 │ │ lsls r3, r2, #1 │ │ subs r0, r0, r0 │ │ ldrh r2, [r0, r0] │ │ - b.n d6b8c │ │ + b.n d6b9c │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r2 │ │ - b.n d62ac │ │ + b.n d62bc │ │ asrs r5, r1, #32 │ │ - b.n d6eb6 │ │ + b.n d6ec6 │ │ movs r0, #4 │ │ - b.n d609a │ │ + b.n d60aa │ │ movs r0, r2 │ │ - b.n d6298 │ │ + b.n d62a8 │ │ movs r0, r1 │ │ - b.n d6ac2 │ │ + b.n d6ad2 │ │ lsls r2, r4, #9 │ │ add.w r0, r0, r4, lsl #4 │ │ - b.n d6aca │ │ + b.n d6ada │ │ movs r0, r0 │ │ - b.n d6e2e │ │ + b.n d6e3e │ │ lsls r0, r1, #1 │ │ subs r0, r0, r0 │ │ lsrs r1, r0, #4 │ │ - b.n d6db8 │ │ + b.n d6dc8 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r2 │ │ - b.n d62d8 │ │ + b.n d62e8 │ │ asrs r6, r1, #32 │ │ - b.n d6ee2 │ │ + b.n d6ef2 │ │ movs r0, #4 │ │ - b.n d60c6 │ │ + b.n d60d6 │ │ movs r0, r2 │ │ - b.n d62c4 │ │ + b.n d62d4 │ │ movs r0, r1 │ │ - b.n d6aee │ │ + b.n d6afe │ │ lsls r7, r2, #9 │ │ add.w r0, r0, r4, lsl #4 │ │ - b.n d6af6 │ │ + b.n d6b06 │ │ movs r0, r0 │ │ - b.n d6e5a │ │ + b.n d6e6a │ │ movs r5, r7 │ │ subs r0, r0, r0 │ │ lsrs r2, r0, #4 │ │ - b.n d6de4 │ │ + b.n d6df4 │ │ lsls r0, r6, #1 │ │ subs r0, r0, r0 │ │ strb r0, [r0, #0] │ │ - b.n d6f0a │ │ + b.n d6f1a │ │ movs r0, r0 │ │ - b.n d6e78 │ │ + b.n d6e88 │ │ movs r0, r7 │ │ subs r0, r0, r0 │ │ lsls r7, r6, #1 │ │ and.w r0, r0, r4 │ │ - b.n d6f66 │ │ + b.n d6f76 │ │ strb r2, [r0, #0] │ │ - b.n d6f1e │ │ + b.n d6f2e │ │ movs r1, r0 │ │ - b.n d6e82 │ │ + b.n d6e92 │ │ movs r3, r6 │ │ subs r0, r0, r0 │ │ ands r2, r0 │ │ - b.n d6b2a │ │ + b.n d6b3a │ │ movs r0, #12 │ │ - b.n d6d08 │ │ + b.n d6d18 │ │ movs r0, r1 │ │ - b.n d6b32 │ │ + b.n d6b42 │ │ asrs r5, r1, #32 │ │ - b.n d6f36 │ │ + b.n d6f46 │ │ lsls r7, r5, #8 │ │ add.w r0, r0, r0 │ │ - b.n d6e9e │ │ + b.n d6eae │ │ movs r4, r5 │ │ subs r0, r0, r0 │ │ lsls r4, r6, #1 │ │ - b.n d6604 │ │ + b.n d6614 │ │ movs r0, r0 │ │ - b.n d6eaa │ │ + b.n d6eba │ │ lsls r2, r1, #1 │ │ lsrs r0, r0, #8 │ │ ldr r4, [r4, r0] │ │ - b.n d6b52 │ │ + b.n d6b62 │ │ strb r4, [r6, #1] │ │ - b.n d6600 │ │ + b.n d6610 │ │ movs r1, r0 │ │ - b.n d6ec6 │ │ + b.n d6ed6 │ │ movs r2, r6 │ │ subs r0, r0, r0 │ │ movs r0, r2 │ │ - b.n d6f62 │ │ - add r0, pc, #64 @ (adr r0, d6864 ) │ │ - b.n d6cf0 │ │ + b.n d6f72 │ │ + add r0, pc, #64 @ (adr r0, d6874 ) │ │ + b.n d6d00 │ │ movs r5, r0 │ │ - b.n d6aca │ │ - add r0, pc, #0 @ (adr r0, d682c ) │ │ + b.n d6ada │ │ + add r0, pc, #0 @ (adr r0, d683c ) │ │ adds r3, #160 @ 0xa0 │ │ movs r4, r1 │ │ - b.n d636c │ │ + b.n d637c │ │ ands r7, r0 │ │ - b.n d6b76 │ │ + b.n d6b86 │ │ movs r0, r0 │ │ - b.n d6eee │ │ + b.n d6efe │ │ asrs r0, r0, #32 │ │ - b.n d6b7e │ │ + b.n d6b8e │ │ strb r0, [r1, #0] │ │ - b.n d6164 │ │ + b.n d6174 │ │ asrs r4, r1, #32 │ │ - b.n d6360 │ │ + b.n d6370 │ │ lsls r1, r0, #1 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n d636e │ │ + b.n d637e │ │ str r0, [sp, #32] │ │ - b.n d6b92 │ │ + b.n d6ba2 │ │ movs r4, r0 │ │ - b.n d6370 │ │ + b.n d6380 │ │ movs r0, r1 │ │ - b.n d6b9a │ │ + b.n d6baa │ │ lsls r2, r5, #10 │ │ add.w r0, r0, r4, lsl #12 │ │ - b.n d639c │ │ + b.n d63ac │ │ adds r1, r0, #0 │ │ - b.n d6f70 │ │ + b.n d6f80 │ │ movs r0, r1 │ │ - b.n d6baa │ │ + b.n d6bba │ │ movs r0, #7 │ │ - b.n d6bae │ │ + b.n d6bbe │ │ lsls r4, r6, #9 │ │ add.w r0, r0, r0 │ │ - b.n d6f16 │ │ + b.n d6f26 │ │ movs r5, r6 │ │ subs r0, r0, r0 │ │ str r1, [r0, r0] │ │ - b.n d6d88 │ │ - add r0, pc, #4 @ (adr r0, d6884 ) │ │ - b.n d6d16 │ │ + b.n d6d98 │ │ + add r0, pc, #4 @ (adr r0, d6894 ) │ │ + b.n d6d26 │ │ strb r4, [r0, #0] │ │ - b.n d6bc6 │ │ + b.n d6bd6 │ │ movs r4, r0 │ │ - b.n d6b34 │ │ + b.n d6b44 │ │ @ instruction: 0xffe73aff │ │ movs r1, r5 │ │ and.w r0, r0, r2 │ │ - b.n d6bc2 │ │ + b.n d6bd2 │ │ strb r2, [r0, #0] │ │ - b.n d6fda │ │ + b.n d6fea │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ movs r0, #8 │ │ - b.n d6dbc │ │ + b.n d6dcc │ │ movs r0, r1 │ │ - b.n d6be6 │ │ + b.n d6bf6 │ │ asrs r5, r1, #32 │ │ - b.n d6fea │ │ + b.n d6ffa │ │ lsls r2, r0, #8 │ │ add.w r0, r0, r0 │ │ - b.n d6f52 │ │ + b.n d6f62 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r7, r0 │ │ - b.n d6bfa │ │ - beq.n d68f4 │ │ - b.n d6d54 │ │ + b.n d6c0a │ │ + beq.n d6904 │ │ + b.n d6d64 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, sp} │ │ - b.n d6400 │ │ + b.n d6410 │ │ movs r0, r1 │ │ - b.n d6c0a │ │ + b.n d6c1a │ │ asrs r5, r1, #32 │ │ - b.n d700e │ │ + b.n d701e │ │ ands r4, r0 │ │ - b.n d61f6 │ │ + b.n d6206 │ │ movs r0, #8 │ │ - b.n d63f0 │ │ + b.n d6400 │ │ lsls r5, r1, #8 │ │ add.w r0, r0, r8 │ │ - b.n d6c1e │ │ + b.n d6c2e │ │ asrs r7, r1, #2 │ │ - b.n d7022 │ │ + b.n d7032 │ │ movs r0, #4 │ │ - b.n d6c26 │ │ + b.n d6c36 │ │ movs r0, r4 │ │ and.w r0, r0, r0, asr #32 │ │ - b.n d702e │ │ + b.n d703e │ │ ands r0, r4 │ │ - b.n d6dbc │ │ + b.n d6dcc │ │ movs r5, r0 │ │ - b.n d6b96 │ │ + b.n d6ba6 │ │ ands r0, r0 │ │ adds r3, #160 @ 0xa0 │ │ movs r4, r1 │ │ - b.n d6438 │ │ + b.n d6448 │ │ movs r0, r0 │ │ - b.n d6faa │ │ + b.n d6fba │ │ asrs r0, r0, #32 │ │ - b.n d6c46 │ │ + b.n d6c56 │ │ movs r0, #8 │ │ - b.n d622c │ │ + b.n d623c │ │ asrs r4, r1, #32 │ │ - b.n d6428 │ │ + b.n d6438 │ │ movs r7, r1 │ │ lsrs r0, r0, #8 │ │ adds r0, #4 │ │ - b.n d6436 │ │ + b.n d6446 │ │ adds r1, r0, #0 │ │ - b.n d7024 │ │ + b.n d7034 │ │ movs r0, r1 │ │ - b.n d6c5e │ │ + b.n d6c6e │ │ lsls r0, r1, #9 │ │ add.w r0, r0, r0 │ │ - b.n d6fc6 │ │ + b.n d6fd6 │ │ movs r1, r1 │ │ subs r0, r0, r0 │ │ str r1, [r0, r0] │ │ - b.n d6e38 │ │ + b.n d6e48 │ │ ands r1, r0 │ │ - b.n d6dba │ │ + b.n d6dca │ │ movs r7, r0 │ │ - b.n d6be0 │ │ + b.n d6bf0 │ │ @ instruction: 0xffef3aff │ │ movs r1, r0 │ │ - b.n d6fea │ │ + b.n d6ffa │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ movs r4, r1 │ │ - b.n d6480 │ │ + b.n d6490 │ │ movs r0, #4 │ │ - b.n d6e4a │ │ + b.n d6e5a │ │ movs r0, #12 │ │ - b.n d6468 │ │ + b.n d6478 │ │ movs r4, r0 │ │ and.w r0, r0, r2, lsl #28 │ │ - b.n d7096 │ │ + b.n d70a6 │ │ movs r7, r0 │ │ - b.n d6c9a │ │ - beq.n d6994 │ │ - b.n d6df4 │ │ + b.n d6caa │ │ + beq.n d69a4 │ │ + b.n d6e04 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, sp} │ │ - b.n d64a0 │ │ + b.n d64b0 │ │ movs r0, r1 │ │ - b.n d6caa │ │ + b.n d6cba │ │ asrs r5, r1, #32 │ │ - b.n d70ae │ │ + b.n d70be │ │ lsls r7, r4, #7 │ │ add.w r0, r0, r0 │ │ - b.n d7016 │ │ + b.n d7026 │ │ movs r1, r0 │ │ asrs r0, r0, #12 │ │ strb r0, [r0, #2] │ │ - b.n d6cbe │ │ + b.n d6cce │ │ movs r7, r0 │ │ - b.n d6cc2 │ │ - beq.n d69bc │ │ - b.n d6e1c │ │ + b.n d6cd2 │ │ + beq.n d69cc │ │ + b.n d6e2c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4} │ │ - b.n d64c8 │ │ + b.n d64d8 │ │ asrs r7, r1, #32 │ │ - b.n d70d2 │ │ + b.n d70e2 │ │ movs r0, #4 │ │ - b.n d62b6 │ │ + b.n d62c6 │ │ movs r0, r2 │ │ - b.n d64b4 │ │ + b.n d64c4 │ │ movs r0, r1 │ │ - b.n d6cde │ │ + b.n d6cee │ │ lsls r3, r3, #7 │ │ add.w r0, r0, r5, lsl #4 │ │ - b.n d6ca6 │ │ + b.n d6cb6 │ │ movs r0, r0 │ │ - b.n d704a │ │ + b.n d705a │ │ movs r1, r0 │ │ asrs r0, r0, #12 │ │ movs r0, r0 │ │ - b.n d7054 │ │ + b.n d7064 │ │ @ instruction: 0xfff01aff │ │ movs r0, #16 │ │ - b.n d64f4 │ │ + b.n d6504 │ │ @ instruction: 0xffe9eaff │ │ asrs r0, r6, #32 │ │ - b.n d6500 │ │ + b.n d6510 │ │ movs r0, #48 @ 0x30 │ │ - b.n d6504 │ │ + b.n d6514 │ │ adds r0, #48 @ 0x30 │ │ - b.n d6508 │ │ + b.n d6518 │ │ asrs r1, r0, #32 │ │ - b.n d6aec │ │ + b.n d6afc │ │ movs r4, r5 │ │ - b.n d6510 │ │ + b.n d6520 │ │ movs r0, #2 │ │ - b.n d6af4 │ │ + b.n d6b04 │ │ adds r0, #3 │ │ - b.n d6af8 │ │ + b.n d6b08 │ │ movs r0, r0 │ │ - b.n d691c │ │ + b.n d692c │ │ lsls r0, r5 │ │ - b.n d6ee2 │ │ + b.n d6ef2 │ │ movs r4, r0 │ │ - b.n d6d26 │ │ + b.n d6d36 │ │ lsrs r1, r6, #3 │ │ add.w r0, r0, r4 │ │ - b.n d6d2e │ │ + b.n d6d3e │ │ lsrs r3, r5, #3 │ │ add.w r8, r0, r2, lsr #32 │ │ - add.w lr, r0, r3, asr #6 │ │ - vshll.u32 , d4, #19 │ │ - vabdl.u q12, d19, d13 │ │ + add.w lr, r0, r5, asr #7 │ │ + vtbl.8 d25, {d3-d5}, d4 │ │ + vtbl.8 d24, {d3-d4}, d12 │ │ vmull.u , d19, d20 │ │ movs r0, r0 │ │ movs r1, r0 │ │ - b.n d6d4a │ │ + b.n d6d5a │ │ asrs r2, r0, #32 │ │ - b.n d6d4e │ │ + b.n d6d5e │ │ @ instruction: 0xffffeaff │ │ - ldr r7, [pc, #960] @ (d6dd4 ) │ │ + ldr r7, [pc, #960] @ (d6de4 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n d6f34 │ │ - beq.n d6a74 │ │ - b.n d6eb8 │ │ + b.n d6f44 │ │ + beq.n d6a84 │ │ + b.n d6ec8 │ │ str r0, [r0, r0] │ │ - b.n d6d62 │ │ + b.n d6d72 │ │ lsls r4, r1, #1 │ │ - b.n d6546 │ │ - add r0, pc, #4 @ (adr r0, d6a2c ) │ │ - b.n d6d6a │ │ + b.n d6556 │ │ + add r0, pc, #4 @ (adr r0, d6a3c ) │ │ + b.n d6d7a │ │ asrs r4, r0, #32 │ │ - b.n d6f48 │ │ + b.n d6f58 │ │ strh r3, [r0, #0] │ │ - b.n d65d2 │ │ + b.n d65e2 │ │ movs r2, r1 │ │ - b.n d6d76 │ │ + b.n d6d86 │ │ lsls r6, r3, #8 │ │ add.w r0, r0, r0 │ │ - b.n d70de │ │ + b.n d70ee │ │ lsls r0, r2, #1 │ │ - b.n d65ec │ │ + b.n d65fc │ │ strb r4, [r1, #0] │ │ - b.n d6580 │ │ + b.n d6590 │ │ strb r0, [r0, #0] │ │ asrs r0, r4, #14 │ │ movs r1, r0 │ │ - b.n d706e │ │ + b.n d707e │ │ lsls r3, r2, #1 │ │ subs r0, r0, r0 │ │ str r0, [r0, #0] │ │ - b.n d6584 │ │ + b.n d6594 │ │ movs r0, r0 │ │ - b.n d7106 │ │ + b.n d7116 │ │ lsls r0, r2, #1 │ │ lsrs r0, r0, #8 │ │ asrs r7, r1, #32 │ │ - b.n d6e72 │ │ + b.n d6e82 │ │ movs r1, r1 │ │ - b.n d71a6 │ │ + b.n d71b6 │ │ movs r3, r0 │ │ - b.n d710c │ │ + b.n d711c │ │ movs r2, r4 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n d7114 │ │ + b.n d7124 │ │ lsls r0, r1, #1 │ │ subs r0, r0, r0 │ │ strh r4, [r0, #0] │ │ - b.n d6f94 │ │ + b.n d6fa4 │ │ movs r3, r0 │ │ and.w r0, r0, r0, lsl #28 │ │ - b.n d6dc2 │ │ + b.n d6dd2 │ │ str r0, [r0, #0] │ │ - b.n d65b4 │ │ + b.n d65c4 │ │ movs r0, r0 │ │ - b.n d7136 │ │ + b.n d7146 │ │ lsls r4, r0, #1 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n d71d2 │ │ + b.n d71e2 │ │ str r0, [sp, #712] @ 0x2c8 │ │ - b.n d6e44 │ │ + b.n d6e54 │ │ movs r4, r0 │ │ - b.n d65b4 │ │ + b.n d65c4 │ │ movs r2, r1 │ │ - b.n d6dde │ │ + b.n d6dee │ │ asrs r7, r1, #32 │ │ - b.n d71e2 │ │ + b.n d71f2 │ │ movs r0, #8 │ │ - b.n d6de6 │ │ + b.n d6df6 │ │ eors r0, r1 │ │ - b.n d65d4 │ │ + b.n d65e4 │ │ lsls r2, r0, #6 │ │ add.w r0, r0, r1, lsl #4 │ │ - b.n d6ebe │ │ + b.n d6ece │ │ movs r4, r0 │ │ - b.n d6fc4 │ │ + b.n d6fd4 │ │ asrs r1, r3, #2 │ │ - b.n d6a3c │ │ + b.n d6a4c │ │ movs r2, r0 │ │ - b.n d7160 │ │ + b.n d7170 │ │ @ instruction: 0xffee3aff │ │ lsls r0, r0, #1 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #32 │ │ - b.n d6604 │ │ + b.n d6614 │ │ movs r0, #1 │ │ - b.n d7260 │ │ + b.n d7270 │ │ movs r0, #4 │ │ - b.n d6bd6 │ │ + b.n d6be6 │ │ strb r0, [r1, #0] │ │ - b.n d6fe4 │ │ + b.n d6ff4 │ │ asrs r1, r0, #32 │ │ - b.n d725c │ │ + b.n d726c │ │ movs r1, r0 │ │ - b.n d6d82 │ │ + b.n d6d92 │ │ @ instruction: 0xffe78aff │ │ subs r7, #254 @ 0xfe │ │ - b.n d7104 │ │ + b.n d7114 │ │ adds r0, #3 │ │ - b.n d6af6 │ │ + b.n d6b06 │ │ movs r0, #3 │ │ - b.n d6bf2 │ │ + b.n d6c02 │ │ movs r2, r0 │ │ - b.n d6d94 │ │ + b.n d6da4 │ │ @ instruction: 0xffe22aff │ │ movs r6, r3 │ │ @ instruction: 0xea008004 │ │ - b.n d7018 │ │ + b.n d7028 │ │ movs r3, r0 │ │ and.w r0, r0, r0, lsl #28 │ │ - b.n d6e46 │ │ + b.n d6e56 │ │ str r0, [r0, #0] │ │ - b.n d6638 │ │ + b.n d6648 │ │ movs r0, r0 │ │ - b.n d71ba │ │ + b.n d71ca │ │ movs r3, r4 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n d7256 │ │ + b.n d7266 │ │ asrs r7, r1, #32 │ │ - b.n d725a │ │ + b.n d726a │ │ movs r4, r0 │ │ - b.n d6638 │ │ + b.n d6648 │ │ movs r2, r1 │ │ - b.n d6e62 │ │ + b.n d6e72 │ │ movs r0, #8 │ │ - b.n d6e66 │ │ + b.n d6e76 │ │ eors r0, r1 │ │ - b.n d6654 │ │ + b.n d6664 │ │ str r0, [sp, #16] │ │ - b.n d665c │ │ + b.n d666c │ │ lsls r1, r4, #5 │ │ add.w r0, r0, r1, lsl #4 │ │ - b.n d6f42 │ │ + b.n d6f52 │ │ movs r0, r1 │ │ - b.n d7048 │ │ + b.n d7058 │ │ asrs r1, r3, #2 │ │ - b.n d6ac0 │ │ + b.n d6ad0 │ │ movs r2, r0 │ │ - b.n d71e4 │ │ + b.n d71f4 │ │ @ instruction: 0xffee3aff │ │ movs r7, r3 │ │ subs r0, r0, r0 │ │ asrs r4, r0, #32 │ │ - b.n d6688 │ │ + b.n d6698 │ │ movs r0, #1 │ │ - b.n d72e4 │ │ + b.n d72f4 │ │ movs r0, #2 │ │ - b.n d6c5e │ │ + b.n d6c6e │ │ strb r4, [r1, #0] │ │ - b.n d7068 │ │ + b.n d7078 │ │ asrs r1, r0, #32 │ │ - b.n d72e0 │ │ + b.n d72f0 │ │ movs r1, r0 │ │ - b.n d6e06 │ │ + b.n d6e16 │ │ @ instruction: 0xffe78aff │ │ adds r0, #1 │ │ - b.n d72f6 │ │ + b.n d7306 │ │ movs r0, #3 │ │ - b.n d6c72 │ │ + b.n d6c82 │ │ movs r2, r0 │ │ - b.n d6e14 │ │ + b.n d6e24 │ │ @ instruction: 0xffe32aff │ │ movs r0, r0 │ │ - b.n d669a │ │ + b.n d66aa │ │ asrs r0, r0, #2 │ │ - b.n d6ebe │ │ + b.n d6ece │ │ asrs r0, r2, #32 │ │ - b.n d6b3e │ │ + b.n d6b4e │ │ movs r6, r0 │ │ - b.n d72c6 │ │ + b.n d72d6 │ │ movs r1, r0 │ │ - b.n d726c │ │ + b.n d727c │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r2, r0 │ │ - b.n d7274 │ │ + b.n d7284 │ │ movs r2, r3 │ │ subs r0, r0, r0 │ │ movs r1, r1 │ │ - b.n d72da │ │ - beq.n d6bd4 │ │ - b.n d7034 │ │ + b.n d72ea │ │ + beq.n d6be4 │ │ + b.n d7044 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r1, r3} │ │ - b.n d6ee6 │ │ + b.n d6ef6 │ │ lsls r6, r7, #6 │ │ add.w r0, r0, r0, lsl #4 │ │ - b.n d6eee │ │ + b.n d6efe │ │ movs r1, r1 │ │ - b.n d72f2 │ │ + b.n d7302 │ │ movs r0, r0 │ │ - b.n d7258 │ │ + b.n d7268 │ │ movs r5, r0 │ │ lsls r0, r0, #12 │ │ movs r1, r0 │ │ - b.n d7260 │ │ + b.n d7270 │ │ movs r0, r1 │ │ lsls r0, r0, #12 │ │ - beq.n d6bfc │ │ - b.n d705c │ │ + beq.n d6c0c │ │ + b.n d706c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, r4, r5, r6, ip} │ │ - b.n d670c │ │ + b.n d671c │ │ movs r0, #120 @ 0x78 │ │ - b.n d6710 │ │ + b.n d6720 │ │ adds r0, #120 @ 0x78 │ │ - b.n d6714 │ │ + b.n d6724 │ │ asrs r1, r0, #32 │ │ - b.n d6cf8 │ │ + b.n d6d08 │ │ lsls r4, r6, #1 │ │ - b.n d671c │ │ + b.n d672c │ │ movs r0, #2 │ │ - b.n d6d00 │ │ + b.n d6d10 │ │ adds r0, #3 │ │ - b.n d6d04 │ │ + b.n d6d14 │ │ movs r0, r0 │ │ - b.n d6b28 │ │ + b.n d6b38 │ │ lsls r0, r5 │ │ - b.n d70ee │ │ + b.n d70fe │ │ movs r4, r0 │ │ - b.n d6f32 │ │ + b.n d6f42 │ │ lsrs r6, r5, #1 │ │ add.w r0, r0, r4 │ │ - b.n d6f3a │ │ + b.n d6f4a │ │ lsrs r0, r5, #1 │ │ add.w r7, r0, pc, lsl #2 │ │ add.w r0, r0, r0, ror #4 │ │ - b.n d6744 │ │ + b.n d6754 │ │ movs r0, #48 @ 0x30 │ │ - b.n d6748 │ │ + b.n d6758 │ │ adds r0, #48 @ 0x30 │ │ - b.n d674c │ │ + b.n d675c │ │ asrs r1, r0, #32 │ │ - b.n d6d30 │ │ + b.n d6d40 │ │ movs r4, r5 │ │ - b.n d6754 │ │ + b.n d6764 │ │ movs r0, #2 │ │ - b.n d6d38 │ │ + b.n d6d48 │ │ adds r0, #3 │ │ - b.n d6d3c │ │ + b.n d6d4c │ │ movs r0, r0 │ │ - b.n d6b60 │ │ + b.n d6b70 │ │ lsls r0, r5 │ │ - b.n d7126 │ │ + b.n d7136 │ │ movs r4, r0 │ │ - b.n d6f6a │ │ + b.n d6f7a │ │ lsrs r0, r4, #1 │ │ add.w r0, r0, r4 │ │ - b.n d6f72 │ │ + b.n d6f82 │ │ lsrs r2, r3, #1 │ │ add.w r7, r0, r1, lsl #2 │ │ - add.w ip, r0, pc, lsr #5 │ │ - @ instruction: 0xfff397e0 │ │ - vaddw.u q9, , d17 │ │ + add.w ip, r0, r1, asr #6 │ │ + vqshl.u64 , q0, #51 @ 0x33 │ │ + vshr.u64 q9, q6, #13 │ │ vtbx.8 d21, {d3-d5}, d16 │ │ movs r0, r0 │ │ - adds r7, r2, #2 │ │ - vqshrun.s64 d25, q4, #13 │ │ - @ instruction: 0xfff37e90 │ │ + adds r1, r3, #3 │ │ + vtbl.8 d25, {d3}, d8 │ │ + vshr.u32 q12, , #13 │ │ @ instruction: 0xfff35a98 │ │ movs r0, r0 │ │ movs r1, r0 │ │ - b.n d6f9e │ │ + b.n d6fae │ │ asrs r2, r0, #32 │ │ - b.n d6fa2 │ │ + b.n d6fb2 │ │ vpmin.u32 q15, q13, │ │ movs r1, r0 │ │ - b.n d6faa │ │ + b.n d6fba │ │ asrs r2, r0, #32 │ │ - b.n d6fae │ │ + b.n d6fbe │ │ vpmin.u32 q15, , │ │ - ldr r7, [pc, #960] @ (d7034 ) │ │ + ldr r7, [pc, #960] @ (d7044 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ - b.n d7194 │ │ - beq.n d6ce4 │ │ - b.n d7118 │ │ + b.n d71a4 │ │ + beq.n d6cf4 │ │ + b.n d7128 │ │ ands r1, r0 │ │ - b.n d6fc2 │ │ + b.n d6fd2 │ │ asrs r0, r0, #32 │ │ - b.n d6fc6 │ │ + b.n d6fd6 │ │ movs r4, r0 │ │ - b.n d6fca │ │ - add r0, pc, #12 @ (adr r0, d6c98 ) │ │ - b.n d6fce │ │ + b.n d6fda │ │ + add r0, pc, #12 @ (adr r0, d6ca8 ) │ │ + b.n d6fde │ │ str r2, [r0, r0] │ │ - b.n d6fd2 │ │ + b.n d6fe2 │ │ lsls r2, r2, #3 │ │ @ instruction: 0xeb008020 │ │ - b.n d7130 │ │ + b.n d7140 │ │ str r0, [sp, #32] │ │ - b.n d71b8 │ │ + b.n d71c8 │ │ str r1, [r0, #0] │ │ - b.n d73e2 │ │ + b.n d73f2 │ │ movs r0, r0 │ │ and.w r0, r0, r1, lsl #24 │ │ - b.n d7136 │ │ + b.n d7146 │ │ movs r1, r0 │ │ - b.n d70e2 │ │ + b.n d70f2 │ │ strb r1, [r0, #0] │ │ - b.n d73f2 │ │ + b.n d7402 │ │ strb r2, [r0, #0] │ │ asrs r0, r0, #12 │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n d736a │ │ + b.n d737a │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ movs r0, #16 │ │ - b.n d67f0 │ │ + b.n d6800 │ │ movs r4, r0 │ │ - b.n d700a │ │ + b.n d701a │ │ asrs r0, r0, #32 │ │ - b.n d748e │ │ + b.n d749e │ │ lsls r7, r1, #4 │ │ @ instruction: 0xeb00a000 │ │ - b.n d7416 │ │ + b.n d7426 │ │ movs r4, r0 │ │ - b.n d701a │ │ + b.n d702a │ │ asrs r1, r0, #32 │ │ - b.n d749e │ │ + b.n d74ae │ │ movs r0, #8 │ │ - b.n d7022 │ │ + b.n d7032 │ │ lsls r4, r6, #3 │ │ add.w r0, r0, r4 │ │ - b.n d702a │ │ + b.n d703a │ │ asrs r1, r1, #32 │ │ - b.n d702e │ │ + b.n d703e │ │ lsls r0, r6, #5 │ │ add.w r0, r0, r0 │ │ - b.n d7396 │ │ + b.n d73a6 │ │ movs r4, r4 │ │ subs r0, r0, r0 │ │ adds r0, #20 │ │ - b.n d6838 │ │ + b.n d6848 │ │ movs r0, r0 │ │ - b.n d73a8 │ │ + b.n d73b8 │ │ @ instruction: 0xffe70aff │ │ movs r0, r1 │ │ - b.n d6844 │ │ + b.n d6854 │ │ asrs r4, r3, #32 │ │ - b.n d6848 │ │ + b.n d6858 │ │ movs r0, #40 @ 0x28 │ │ - b.n d684c │ │ + b.n d685c │ │ lsls r0, r1, #1 │ │ - b.n d6820 │ │ + b.n d6830 │ │ movs r7, r0 │ │ - b.n d705a │ │ + b.n d706a │ │ movs r0, #76 @ 0x4c │ │ - b.n d6828 │ │ + b.n d6838 │ │ movs r0, #4 │ │ - b.n d7062 │ │ + b.n d7072 │ │ asrs r0, r2, #1 │ │ - b.n d6830 │ │ + b.n d6840 │ │ asrs r5, r0, #32 │ │ - b.n d706a │ │ + b.n d707a │ │ vrhadd.u d14, d3, d31 │ │ movs r0, r1 │ │ - b.n d73d2 │ │ + b.n d73e2 │ │ movs r1, r2 │ │ subs r0, r0, r0 │ │ movs r0, r4 │ │ - b.n d6770 │ │ + b.n d6780 │ │ asrs r0, r4, #32 │ │ - b.n d6868 │ │ + b.n d6878 │ │ movs r1, r0 │ │ - b.n d6fe2 │ │ + b.n d6ff2 │ │ @ instruction: 0xffd71aff │ │ asrs r4, r6, #1 │ │ - b.n d6888 │ │ + b.n d6898 │ │ movs r0, #116 @ 0x74 │ │ - b.n d688c │ │ + b.n d689c │ │ adds r0, #116 @ 0x74 │ │ - b.n d6890 │ │ + b.n d68a0 │ │ asrs r1, r0, #32 │ │ - b.n d6e74 │ │ + b.n d6e84 │ │ lsls r0, r6, #1 │ │ - b.n d6898 │ │ + b.n d68a8 │ │ movs r0, #2 │ │ - b.n d6e7c │ │ + b.n d6e8c │ │ adds r0, #3 │ │ - b.n d6e80 │ │ + b.n d6e90 │ │ movs r0, r0 │ │ - b.n d6ca4 │ │ + b.n d6cb4 │ │ lsls r0, r5 │ │ - b.n d726a │ │ + b.n d727a │ │ movs r4, r0 │ │ - b.n d70ae │ │ + b.n d70be │ │ lsrs r7, r1, #32 │ │ add.w r0, r0, r4 │ │ - b.n d70b6 │ │ + b.n d70c6 │ │ lsrs r1, r1, #32 │ │ add.w r7, r0, r0, rrx │ │ add.w r0, r0, r7 │ │ - b.n d7422 │ │ + b.n d7432 │ │ movs r3, r0 │ │ lsrs r0, r0, #8 │ │ movs r1, r1 │ │ - b.n d742a │ │ + b.n d743a │ │ movs r3, r1 │ │ lsrs r0, r0, #8 │ │ - beq.n d6dc8 │ │ - b.n d7228 │ │ + beq.n d6dd8 │ │ + b.n d7238 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, sp} │ │ - b.n d72b4 │ │ + b.n d72c4 │ │ movs r4, r0 │ │ - b.n d70de │ │ + b.n d70ee │ │ asrs r0, r0, #32 │ │ - b.n d7562 │ │ + b.n d7572 │ │ lsls r4, r0, #3 │ │ add.w r0, r0, r4 │ │ - b.n d68e4 │ │ + b.n d68f4 │ │ movs r0, r2 │ │ - b.n d68b8 │ │ + b.n d68c8 │ │ movs r4, r0 │ │ - b.n d70f2 │ │ + b.n d7102 │ │ lsls r4, r1, #5 │ │ @ instruction: 0xeb00d01c │ │ - b.n d7250 │ │ + b.n d7260 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r0, r1, r2, r3, r4, r8, r9, sl} │ │ - add.w fp, r0, fp, lsr #4 │ │ - vqshl.u64 d20, d24, #51 @ 0x33 │ │ - vrshr.u32 d22, d2, #13 │ │ + add.w fp, r0, sp, lsr #5 │ │ + vqshlu.s64 q10, , #51 @ 0x33 │ │ + vsubl.u q11, d19, d5 │ │ vqshrn.u64 d21, q6, #13 │ │ movs r0, r0 │ │ - ldr r4, [pc, #64] @ (d6e14 ) │ │ + ldr r4, [pc, #64] @ (d6e24 ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n d72f4 │ │ + b.n d7304 │ │ udf #46 @ 0x2e │ │ - b.n d7278 │ │ + b.n d7288 │ │ ands r0, r0 │ │ - b.n d7122 │ │ + b.n d7132 │ │ lsrs r6, r2, #29 │ │ - b.n d727c │ │ + b.n d728c │ │ lsls r1, r7, #24 │ │ add.w r0, r0, ip, lsl #12 │ │ - b.n d6916 │ │ + b.n d6926 │ │ movs r0, r0 │ │ - b.n d7498 │ │ + b.n d74a8 │ │ movs r5, r0 │ │ subs r0, r0, r0 │ │ lsrs r6, r2, #29 │ │ - b.n d7290 │ │ + b.n d72a0 │ │ asrs r0, r1, #32 │ │ - b.n d7318 │ │ + b.n d7328 │ │ movs r0, #4 │ │ - b.n d7142 │ │ + b.n d7152 │ │ adds r0, #1 │ │ - b.n d7546 │ │ + b.n d7556 │ │ @ instruction: 0xff99ebff │ │ movs r5, r0 │ │ and.w r0, r0, r4, lsr #32 │ │ - b.n d693a │ │ + b.n d694a │ │ asrs r0, r1, #32 │ │ - b.n d7330 │ │ + b.n d7340 │ │ movs r0, r0 │ │ - b.n d6934 │ │ + b.n d6944 │ │ lsrs r6, r2, #29 │ │ - b.n d72b4 │ │ + b.n d72c4 │ │ movs r0, #4 │ │ - b.n d7162 │ │ + b.n d7172 │ │ movs r1, r2 │ │ add.w r0, r0, r0, ror #4 │ │ - b.n d6968 │ │ + b.n d6978 │ │ movs r0, #48 @ 0x30 │ │ - b.n d696c │ │ + b.n d697c │ │ adds r0, #48 @ 0x30 │ │ - b.n d6970 │ │ + b.n d6980 │ │ asrs r1, r0, #32 │ │ - b.n d6f54 │ │ + b.n d6f64 │ │ movs r4, r5 │ │ - b.n d6978 │ │ + b.n d6988 │ │ movs r0, #2 │ │ - b.n d6f5c │ │ + b.n d6f6c │ │ adds r0, #3 │ │ - b.n d6f60 │ │ + b.n d6f70 │ │ movs r0, r0 │ │ - b.n d6d84 │ │ + b.n d6d94 │ │ lsls r0, r5 │ │ - b.n d734a │ │ + b.n d735a │ │ movs r4, r0 │ │ - b.n d718e │ │ + b.n d719e │ │ lsls r7, r2, #31 │ │ add.w r0, r0, r4 │ │ - b.n d7196 │ │ + b.n d71a6 │ │ lsls r1, r2, #31 │ │ add.w r6, r0, r8, ror #3 │ │ - add.w sl, r0, fp, ror #4 │ │ - vrsra.u32 d24, d10, #13 │ │ - vshll.u32 q9, d3, #19 │ │ + add.w sl, r0, sp, ror #5 │ │ + vsri.64 d24, d9, #13 │ │ + vtbx.8 d18, {d19-d21}, d22 │ │ vqshrun.s64 d21, q14, #13 │ │ movs r0, r0 │ │ - ldr r7, [pc, #448] @ (d7030 ) │ │ + ldr r7, [pc, #448] @ (d7040 ) │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n d7390 │ │ - beq.n d6ed8 │ │ - b.n d7314 │ │ + b.n d73a0 │ │ + beq.n d6ee8 │ │ + b.n d7324 │ │ strh r1, [r0, #0] │ │ - b.n d71be │ │ + b.n d71ce │ │ asrs r0, r0, #32 │ │ - b.n d71c2 │ │ + b.n d71d2 │ │ movs r0, r1 │ │ - b.n d71c6 │ │ + b.n d71d6 │ │ ands r3, r0 │ │ - b.n d71ca │ │ + b.n d71da │ │ str r2, [r0, r0] │ │ - b.n d71ce │ │ + b.n d71de │ │ lsls r3, r2, #1 │ │ add.w r0, r0, r8, lsl #4 │ │ - b.n d73b0 │ │ + b.n d73c0 │ │ movs r0, r1 │ │ - b.n d71da │ │ + b.n d71ea │ │ lsls r5, r0, #4 │ │ add.w r0, r0, r0 │ │ - b.n d7542 │ │ + b.n d7552 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ - beq.n d6ed8 │ │ - b.n d7340 │ │ + beq.n d6ee8 │ │ + b.n d7350 │ │ ldrh r0, [r6, #58] @ 0x3a │ │ ldmia.w sp!, {r3, ip, pc} │ │ - b.n d69e8 │ │ + b.n d69f8 │ │ str r0, [r1, #0] │ │ - b.n d73d0 │ │ + b.n d73e0 │ │ movs r6, r0 │ │ and.w r0, r0, r8 │ │ - b.n d71fe │ │ + b.n d720e │ │ lsls r1, r1, #4 │ │ add.w r0, r0, r8 │ │ - b.n d7206 │ │ + b.n d7216 │ │ asrs r6, r0, #32 │ │ - b.n d720a │ │ + b.n d721a │ │ lsls r1, r7, #3 │ │ add.w r0, r0, r0 │ │ - b.n d7572 │ │ + b.n d7582 │ │ @ instruction: 0xfff31aff │ │ movs r1, r0 │ │ - b.n d761a │ │ + b.n d762a │ │ asrs r2, r1, #32 │ │ - b.n d761e │ │ + b.n d762e │ │ movs r0, #5 │ │ - b.n d7222 │ │ + b.n d7232 │ │ adds r0, #5 │ │ - b.n d7226 │ │ + b.n d7236 │ │ strh r0, [r6, #6] │ │ - b.n d7284 │ │ + b.n d7294 │ │ vrhadd.u d14, d4, d31 │ │ movs r0, r0 │ │ - b.n d7592 │ │ + b.n d75a2 │ │ @ instruction: 0xffeb1aff │ │ adds r0, #20 │ │ - b.n d6a34 │ │ + b.n d6a44 │ │ movs r0, r0 │ │ - b.n d75a4 │ │ + b.n d75b4 │ │ @ instruction: 0xffef0aff │ │ movs r0, r1 │ │ - b.n d6a40 │ │ + b.n d6a50 │ │ asrs r4, r3, #32 │ │ - b.n d6a44 │ │ + b.n d6a54 │ │ movs r0, #40 @ 0x28 │ │ - b.n d6a48 │ │ + b.n d6a58 │ │ lsls r0, r1, #1 │ │ - b.n d6a1c │ │ + b.n d6a2c │ │ movs r1, r1 │ │ - b.n d7656 │ │ + b.n d7666 │ │ movs r0, #76 @ 0x4c │ │ - b.n d6a24 │ │ + b.n d6a34 │ │ movs r0, #8 │ │ - b.n d725e │ │ + b.n d726e │ │ asrs r0, r2, #1 │ │ - b.n d6a2c │ │ + b.n d6a3c │ │ asrs r5, r0, #32 │ │ - b.n d7266 │ │ + b.n d7276 │ │ vrhadd.u d14, d3, d31 │ │ movs r7, r0 │ │ - b.n d75ce │ │ + b.n d75de │ │ @ instruction: 0xffe10aff │ │ movs r0, r1 │ │ - b.n d75d6 │ │ + b.n d75e6 │ │ @ instruction: 0xffe10aff │ │ movs r5, r0 │ │ - b.n d75de │ │ + b.n d75ee │ │ @ instruction: 0xffd81aff │ │ movs r1, r0 │ │ - b.n d7686 │ │ + b.n d7696 │ │ asrs r2, r3, #32 │ │ - b.n d768a │ │ + b.n d769a │ │ movs r0, #5 │ │ - b.n d728e │ │ + b.n d729e │ │ adds r0, #5 │ │ - b.n d7292 │ │ + b.n d72a2 │ │ strh r0, [r6, #6] │ │ - b.n d72f0 │ │ + b.n d7300 │ │ vrhadd.u d14, d4, d31 │ │ - beq.n d6f8c │ │ - b.n d73f4 │ │ + beq.n d6f9c │ │ + b.n d7404 │ │ ldrh r0, [r6, #58] @ 0x3a │ │ ldmia.w sp!, {fp, lr} │ │ stmdb sp!, {r0, r2, r3, ip, sp, pc} │ │ - b.n d72aa │ │ - beq.n d6fbc │ │ - b.n d7408 │ │ + b.n d72ba │ │ + beq.n d6fcc │ │ + b.n d7418 │ │ asrs r5, r1, #32 │ │ - b.n d72b2 │ │ + b.n d72c2 │ │ lsls r7, r1, #3 │ │ add.w r0, r0, r8, lsl #4 │ │ - b.n d6ab4 │ │ + b.n d6ac4 │ │ movs r0, r0 │ │ - b.n d761e │ │ + b.n d762e │ │ asrs r0, r0, #32 │ │ asrs r0, r4, #14 │ │ movs r1, r0 │ │ - b.n d72c6 │ │ - beq.n d6f9e │ │ - b.n d72ca │ │ + b.n d72d6 │ │ + beq.n d6fae │ │ + b.n d72da │ │ ldrh r0, [r0, #0] │ │ ldmia.w sp!, {fp, lr} │ │ stmdb sp!, {r0, r2, r3, ip, sp, pc} │ │ - b.n d72d6 │ │ - beq.n d6fe8 │ │ - b.n d7434 │ │ + b.n d72e6 │ │ + beq.n d6ff8 │ │ + b.n d7444 │ │ asrs r5, r1, #32 │ │ - b.n d72de │ │ + b.n d72ee │ │ lsls r4, r0, #3 │ │ add.w r0, r0, r0, lsl #4 │ │ - b.n d6ae0 │ │ + b.n d6af0 │ │ movs r0, r0 │ │ - b.n d764a │ │ + b.n d765a │ │ asrs r0, r0, #32 │ │ asrs r0, r4, #14 │ │ movs r1, r0 │ │ - b.n d72f2 │ │ - beq.n d6fca │ │ - b.n d72f6 │ │ + b.n d7302 │ │ + beq.n d6fda │ │ + b.n d7306 │ │ ldrh r0, [r0, #0] │ │ ldmia.w sp!, {fp, lr} │ │ stmdb sp!, {r0, r2, r3, ip, sp, pc} │ │ - b.n d7302 │ │ + b.n d7312 │ │ movs r1, r0 │ │ - b.n d7306 │ │ + b.n d7316 │ │ lsls r6, r6, #2 │ │ add.w r0, r0, r9, lsl #4 │ │ - b.n d770e │ │ + b.n d771e │ │ movs r0, r0 │ │ - b.n d7672 │ │ + b.n d7682 │ │ asrs r5, r0, #32 │ │ lsls r0, r0, #12 │ │ movs r1, r0 │ │ - b.n d747a │ │ + b.n d748a │ │ movs r1, r0 │ │ asrs r0, r4, #6 │ │ ldrh r0, [r0, #0] │ │ ldmia.w sp!, {r4, r5, r6, sl, fp, lr} │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n d7504 │ │ - beq.n d700c │ │ - b.n d7488 │ │ + b.n d7514 │ │ + beq.n d701c │ │ + b.n d7498 │ │ ands r0, r0 │ │ - b.n d7332 │ │ + b.n d7342 │ │ lsls r0, r7, #2 │ │ - b.n d6b34 │ │ + b.n d6b44 │ │ adds r0, #184 @ 0xb8 │ │ - b.n d6b38 │ │ + b.n d6b48 │ │ str r0, [r0, #0] │ │ - b.n d773e │ │ + b.n d774e │ │ movs r0, r0 │ │ - b.n d7120 │ │ + b.n d7130 │ │ str r6, [r1, #4] │ │ - b.n d6b8e │ │ + b.n d6b9e │ │ adds r0, #3 │ │ - b.n d7128 │ │ + b.n d7138 │ │ movs r0, #8 │ │ - b.n d750e │ │ + b.n d751e │ │ str r4, [r7, #72] @ 0x48 │ │ - b.n d739a │ │ + b.n d73aa │ │ movs r0, r1 │ │ - b.n d751e │ │ + b.n d752e │ │ movs r0, #240 @ 0xf0 │ │ - b.n d73a2 │ │ + b.n d73b2 │ │ lsrs r5, r1, #8 │ │ orn sl, r1, #577536 @ 0x8d000 │ │ orn sl, r1, #36096 @ 0x8d00 │ │ orn sl, r1, #2288 @ 0x8f0 │ │ orn r1, r1, #2916352 @ 0x2c8000 │ │ - b.n d762e │ │ + b.n d763e │ │ lsrs r5, r1, #8 │ │ orr.w sl, r0, #577536 @ 0x8d000 │ │ orr.w sl, r0, #36096 @ 0x8d00 │ │ orr.w sl, r0, #2256 @ 0x8d0 │ │ orr.w r0, r0, #2048 @ 0x800 │ │ - b.n d6b42 │ │ + b.n d6b52 │ │ lsls r0, r2, #1 │ │ - b.n d754e │ │ - ldr.w pc, [r0], #255 │ │ + b.n d755e │ │ + ldr??.w pc, [r0], #255 │ │ lsls r4, r0, #1 │ │ - b.n d6b76 │ │ + b.n d6b86 │ │ str r1, [r0, r0] │ │ - b.n d77f2 │ │ + b.n d7802 │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ asrs r4, r1, #32 │ │ - b.n d7574 │ │ + b.n d7584 │ │ movs r5, r0 │ │ - b.n d739e │ │ + b.n d73ae │ │ str r4, [r1, #0] │ │ - b.n d6b7c │ │ + b.n d6b8c │ │ lsls r6, r4, #30 │ │ add.w r0, r0, ip, lsl #4 │ │ - b.n d6ba4 │ │ + b.n d6bb4 │ │ movs r0, r0 │ │ - b.n d770e │ │ + b.n d771e │ │ movs r4, r0 │ │ - b.n d6b8c │ │ + b.n d6b9c │ │ asrs r1, r0, #6 │ │ - b.n d73b6 │ │ + b.n d73c6 │ │ movs r0, r0 │ │ asrs r1, r2, #13 │ │ asrs r0, r1, #32 │ │ - b.n d6b98 │ │ + b.n d6ba8 │ │ movs r4, r0 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n d77c6 │ │ + b.n d77d6 │ │ lsls r0, r0, #6 │ │ - b.n d6c12 │ │ + b.n d6c22 │ │ movs r0, r0 │ │ - b.n d77ce │ │ - beq.n d70b0 │ │ - b.n d7528 │ │ + b.n d77de │ │ + beq.n d70c0 │ │ + b.n d7538 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r2, sp} │ │ - b.n d75b4 │ │ + b.n d75c4 │ │ movs r4, r0 │ │ - b.n d73de │ │ + b.n d73ee │ │ asrs r5, r0, #32 │ │ - b.n d73e2 │ │ + b.n d73f2 │ │ lsls r2, r4, #8 │ │ add.w r0, r0, r0 │ │ - b.n d774a │ │ + b.n d775a │ │ @ instruction: 0xfff40aff │ │ @ instruction: 0xfff5eaff │ │ strb r4, [r1, r5] │ │ movs r0, r0 │ │ - ldrb r0, [r1, #3] │ │ + ldrb r0, [r3, #3] │ │ movs r0, r0 │ │ - ldr r4, [pc, #448] @ (d727c ) │ │ + ldr r4, [pc, #448] @ (d728c ) │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n d75dc │ │ + b.n d75ec │ │ str r0, [r0, #0] │ │ - b.n d7406 │ │ + b.n d7416 │ │ movs r0, r0 │ │ - b.n d6bea │ │ + b.n d6bfa │ │ ands r2, r0 │ │ - b.n d740e │ │ + b.n d741e │ │ str r1, [r0, r0] │ │ - b.n d7412 │ │ + b.n d7422 │ │ movs r0, #8 │ │ - b.n d6bf6 │ │ + b.n d6c06 │ │ movs r6, r0 │ │ - b.n d741a │ │ + b.n d742a │ │ vrhadd.u d14, d2, d31 │ │ movs r0, r0 │ │ - b.n d7782 │ │ + b.n d7792 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n d6c16 │ │ + b.n d6c26 │ │ asrs r5, r0, #32 │ │ - b.n d742e │ │ + b.n d743e │ │ movs r0, #12 │ │ - b.n d6c12 │ │ + b.n d6c22 │ │ movs r6, r0 │ │ - b.n d7436 │ │ + b.n d7446 │ │ vrhadd.u d14, d2, d31 │ │ movs r0, r0 │ │ - b.n d6c06 │ │ + b.n d6c16 │ │ movs r0, r0 │ │ - b.n d7842 │ │ + b.n d7852 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r1, r4, r5, r6, r9, sl} │ │ - b.n d7726 │ │ + b.n d7736 │ │ lsrs r7, r7, #31 │ │ - b.n d77ac │ │ + b.n d77bc │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r4, r5, r6, sl, fp, lr} │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n d7634 │ │ - beq.n d716c │ │ - b.n d75b8 │ │ + b.n d7644 │ │ + beq.n d717c │ │ + b.n d75c8 │ │ ands r0, r0 │ │ - b.n d7462 │ │ + b.n d7472 │ │ movs r0, r0 │ │ - b.n d6c46 │ │ + b.n d6c56 │ │ str r2, [r0, #0] │ │ - b.n d746a │ │ + b.n d747a │ │ str r1, [r0, r0] │ │ - b.n d746e │ │ + b.n d747e │ │ movs r0, #8 │ │ - b.n d6c52 │ │ + b.n d6c62 │ │ movs r4, r0 │ │ - b.n d7476 │ │ + b.n d7486 │ │ vrhadd.u d14, d2, d31 │ │ movs r0, r0 │ │ - b.n d77de │ │ + b.n d77ee │ │ movs r2, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n d6c6e │ │ + b.n d6c7e │ │ asrs r5, r0, #32 │ │ - b.n d748a │ │ + b.n d749a │ │ movs r0, #6 │ │ - b.n d748e │ │ + b.n d749e │ │ adds r0, #16 │ │ - b.n d6c72 │ │ + b.n d6c82 │ │ movs r4, r0 │ │ - b.n d7496 │ │ + b.n d74a6 │ │ vrhadd.u d14, d3, d31 │ │ movs r0, r0 │ │ - b.n d789e │ │ + b.n d78ae │ │ movs r1, r0 │ │ - b.n d784c │ │ + b.n d785c │ │ movs r5, r0 │ │ lsrs r0, r0, #8 │ │ - beq.n d7188 │ │ - b.n d7600 │ │ + beq.n d7198 │ │ + b.n d7610 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r1, r4, r5, r6, r9, sl} │ │ - b.n d778e │ │ + b.n d779e │ │ lsrs r7, r7, #31 │ │ - b.n d7814 │ │ - beq.n d7198 │ │ - b.n d7610 │ │ + b.n d7824 │ │ + beq.n d71a8 │ │ + b.n d7620 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {} │ │ - b.n d6caa │ │ + b.n d6cba │ │ asrs r5, r1, #32 │ │ - b.n d74c6 │ │ + b.n d74d6 │ │ movs r0, #36 @ 0x24 │ │ - b.n d6caa │ │ + b.n d6cba │ │ movs r4, r0 │ │ - b.n d74ce │ │ + b.n d74de │ │ vrhadd.u d14, d2, d31 │ │ movs r0, r0 │ │ - b.n d6cbe │ │ + b.n d6cce │ │ asrs r0, r0, #32 │ │ - b.n d78da │ │ + b.n d78ea │ │ movs r0, #52 @ 0x34 │ │ - b.n d6cbe │ │ + b.n d6cce │ │ movs r4, r0 │ │ - b.n d74e2 │ │ + b.n d74f2 │ │ vrhadd.u d14, d2, d31 │ │ movs r0, r2 │ │ - b.n d6ce4 │ │ + b.n d6cf4 │ │ movs r0, r0 │ │ - b.n d784e │ │ + b.n d785e │ │ movs r3, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n d6cde │ │ + b.n d6cee │ │ asrs r1, r0, #32 │ │ - b.n d797a │ │ + b.n d798a │ │ movs r0, #12 │ │ - b.n d6cde │ │ + b.n d6cee │ │ movs r4, r0 │ │ - b.n d7502 │ │ + b.n d7512 │ │ vrhadd.u d14, d2, d31 │ │ asrs r0, r0, #32 │ │ - b.n d6cf2 │ │ + b.n d6d02 │ │ movs r0, #16 │ │ - b.n d6d08 │ │ + b.n d6d18 │ │ adds r0, #16 │ │ - b.n d6cf4 │ │ + b.n d6d04 │ │ movs r0, #0 │ │ - b.n d72da │ │ + b.n d72ea │ │ movs r4, r0 │ │ - b.n d751a │ │ + b.n d752a │ │ asrs r1, r0, #32 │ │ - b.n d799e │ │ + b.n d79ae │ │ vrhadd.u d14, d3, d31 │ │ movs r0, r0 │ │ - b.n d7926 │ │ - beq.n d7208 │ │ - b.n d7680 │ │ + b.n d7936 │ │ + beq.n d7218 │ │ + b.n d7690 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r4, r5, r6, sl, fp, lr} │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n d7710 │ │ + b.n d7720 │ │ str r0, [r0, #0] │ │ - b.n d753a │ │ + b.n d754a │ │ movs r0, r0 │ │ - b.n d6d1e │ │ + b.n d6d2e │ │ ands r2, r0 │ │ - b.n d7542 │ │ + b.n d7552 │ │ str r1, [r0, r0] │ │ - b.n d7546 │ │ + b.n d7556 │ │ movs r0, #20 │ │ - b.n d6d2a │ │ + b.n d6d3a │ │ movs r6, r0 │ │ - b.n d754e │ │ + b.n d755e │ │ vrhadd.u d14, d2, d31 │ │ movs r0, r0 │ │ - b.n d78b6 │ │ + b.n d78c6 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n d6d4a │ │ + b.n d6d5a │ │ asrs r5, r0, #32 │ │ - b.n d7562 │ │ + b.n d7572 │ │ movs r0, #24 │ │ - b.n d6d46 │ │ + b.n d6d56 │ │ movs r6, r0 │ │ - b.n d756a │ │ + b.n d757a │ │ vrhadd.u d14, d2, d31 │ │ lsls r0, r6, #3 │ │ - b.n d75ba │ │ + b.n d75ca │ │ movs r0, r0 │ │ - b.n d7976 │ │ + b.n d7986 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r1, r4, r5, r6, r9, sl} │ │ - b.n d785a │ │ + b.n d786a │ │ lsrs r7, r7, #31 │ │ - b.n d78e0 │ │ + b.n d78f0 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r4, r5, r6, r7, r8, sl, fp, lr} │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n d7768 │ │ + b.n d7778 │ │ strb r0, [r0, #0] │ │ - b.n d7592 │ │ + b.n d75a2 │ │ movs r0, r0 │ │ - b.n d6d76 │ │ + b.n d6d86 │ │ str r2, [r0, r0] │ │ - b.n d759a │ │ + b.n d75aa │ │ strh r3, [r0, #0] │ │ - b.n d759e │ │ + b.n d75ae │ │ str r1, [r0, #0] │ │ - b.n d75a2 │ │ + b.n d75b2 │ │ movs r0, #20 │ │ - b.n d6d86 │ │ + b.n d6d96 │ │ movs r7, r0 │ │ - b.n d75aa │ │ + b.n d75ba │ │ vrhadd.u d14, d2, d31 │ │ movs r0, r0 │ │ - b.n d7912 │ │ + b.n d7922 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n d6da8 │ │ + b.n d6db8 │ │ asrs r6, r0, #32 │ │ - b.n d75be │ │ + b.n d75ce │ │ movs r0, #5 │ │ - b.n d75c2 │ │ + b.n d75d2 │ │ adds r0, #8 │ │ - b.n d75c6 │ │ + b.n d75d6 │ │ ands r4, r3 │ │ - b.n d6daa │ │ + b.n d6dba │ │ movs r7, r0 │ │ - b.n d75ce │ │ + b.n d75de │ │ vrhadd.u d14, d4, d31 │ │ movs r0, r0 │ │ - b.n d79d6 │ │ + b.n d79e6 │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {r1, r4, r5, r6, r9, sl} │ │ - b.n d78ba │ │ + b.n d78ca │ │ lsrs r7, r7, #31 │ │ - b.n d7940 │ │ + b.n d7950 │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {ip} │ │ - b.n d6dca │ │ + b.n d6dda │ │ movs r0, #32 │ │ - b.n d6dd0 │ │ + b.n d6de0 │ │ asrs r0, r0, #32 │ │ - b.n d79f2 │ │ + b.n d7a02 │ │ vrhadd.u16 d14, d2, d31 │ │ - ldr r4, [pc, #64] @ (d72f8 ) │ │ + ldr r4, [pc, #64] @ (d7308 ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n d77d8 │ │ + b.n d77e8 │ │ ands r1, r0 │ │ - b.n d7602 │ │ + b.n d7612 │ │ asrs r0, r0, #32 │ │ - b.n d6de6 │ │ + b.n d6df6 │ │ movs r0, #36 @ 0x24 │ │ - b.n d6dec │ │ + b.n d6dfc │ │ asrs r4, r0, #32 │ │ - b.n d760e │ │ + b.n d761e │ │ vrhadd.u d14, d2, d31 │ │ asrs r4, r0, #32 │ │ - b.n d6dfe │ │ + b.n d6e0e │ │ movs r0, r0 │ │ - b.n d7a1a │ │ + b.n d7a2a │ │ movs r0, r0 │ │ - b.n d7980 │ │ + b.n d7990 │ │ lsls r3, r5, #25 │ │ lsls r6, r1, #12 │ │ lsrs r7, r7, #31 │ │ lsls r7, r1, #13 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {fp, lr} │ │ stmdb sp!, {r0, r2, r3, ip, sp, pc} │ │ - b.n d7632 │ │ + b.n d7642 │ │ asrs r0, r0, #32 │ │ - b.n d6e16 │ │ + b.n d6e26 │ │ asrs r0, r5, #32 │ │ - b.n d6e1c │ │ + b.n d6e2c │ │ vrhadd.u d14, d1, d31 │ │ lsls r4, r6, #25 │ │ - b.n d791e │ │ + b.n d792e │ │ lsrs r7, r7, #31 │ │ - b.n d79a4 │ │ + b.n d79b4 │ │ ldrh r0, [r0, #0] │ │ ldmia.w sp!, {ip} │ │ - b.n d6e2e │ │ + b.n d6e3e │ │ asrs r4, r7, #32 │ │ - b.n d6e34 │ │ + b.n d6e44 │ │ vrhadd.u16 d14, d1, d31 │ │ vrhadd.u16 d14, d14, d31 │ │ vrhadd.u16 d14, d14, d31 │ │ asrs r2, r0, #32 │ │ - b.n d7824 │ │ + b.n d7834 │ │ movs r0, r0 │ │ - b.n d7a66 │ │ + b.n d7a76 │ │ movs r2, r2 │ │ - b.n d79cc │ │ + b.n d79dc │ │ movs r1, r0 │ │ adds r3, #0 │ │ vrhadd.u16 d14, d14, d31 │ │ movs r0, #2 │ │ - b.n d7838 │ │ + b.n d7848 │ │ movs r1, r2 │ │ - b.n d79de │ │ + b.n d79ee │ │ movs r5, r3 │ │ ldrh r0, [r0, #16] │ │ adds r0, #4 │ │ - b.n d7860 │ │ + b.n d7870 │ │ movs r1, #2 │ │ - b.n d726c │ │ - bfcsel 0, d744c , 4, eq │ │ + b.n d727c │ │ + bfcsel 0, d745c , 4, eq │ │ lsls r0, r1, #1 │ │ movs r0, r0 │ │ lsls r4, r2, #1 │ │ movs r0, r0 │ │ lsls r4, r5, #1 │ │ movs r0, r0 │ │ lsls r4, r5, #1 │ │ @@ -286945,84 +286825,84 @@ │ │ lsls r0, r1, #1 │ │ movs r0, r0 │ │ lsls r0, r4, #1 │ │ movs r0, r0 │ │ lsls r4, r2, #1 │ │ movs r0, r0 │ │ movs r4, r7 │ │ - b.n d7896 │ │ + b.n d78a6 │ │ movs r0, r0 │ │ - b.n d6eba │ │ + b.n d6eca │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r0, #1 │ │ - b.n d78a2 │ │ + b.n d78b2 │ │ movs r0, r0 │ │ - b.n d6ec6 │ │ + b.n d6ed6 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r0, #1 │ │ - b.n d78ae │ │ + b.n d78be │ │ movs r0, r0 │ │ - b.n d6ed2 │ │ + b.n d6ee2 │ │ vrhadd.u16 d14, d14, d31 │ │ movs r4, r1 │ │ - b.n d7a5c │ │ + b.n d7a6c │ │ movs r0, r1 │ │ str r2, [sp, #512] @ 0x200 │ │ lsls r1, r0, #4 │ │ str r0, [sp, #512] @ 0x200 │ │ movs r0, r0 │ │ str r5, [sp, #576] @ 0x240 │ │ vrhadd.u16 d9, d14, d31 │ │ - ldr r4, [pc, #64] @ (d740c ) │ │ + ldr r4, [pc, #64] @ (d741c ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n d78ec │ │ + b.n d78fc │ │ asrs r0, r6, #32 │ │ - b.n d6f14 │ │ + b.n d6f24 │ │ movs r0, #48 @ 0x30 │ │ - b.n d6f18 │ │ + b.n d6f28 │ │ adds r0, #48 @ 0x30 │ │ - b.n d6f1c │ │ + b.n d6f2c │ │ asrs r1, r0, #32 │ │ - b.n d7500 │ │ + b.n d7510 │ │ movs r4, r5 │ │ - b.n d6f24 │ │ + b.n d6f34 │ │ movs r0, #2 │ │ - b.n d7508 │ │ + b.n d7518 │ │ adds r0, #3 │ │ - b.n d750c │ │ + b.n d751c │ │ movs r0, r0 │ │ - b.n d7330 │ │ + b.n d7340 │ │ lsls r0, r5 │ │ - b.n d78f6 │ │ + b.n d7906 │ │ movs r4, r0 │ │ - b.n d773a │ │ + b.n d774a │ │ lsls r4, r5, #25 │ │ add.w r0, r0, r4 │ │ - b.n d7742 │ │ + b.n d7752 │ │ lsls r6, r4, #25 │ │ add.w r5, r0, sp, lsl #2 │ │ - add.w r4, r0, pc, lsl #6 │ │ - @ instruction: 0xfff345c0 │ │ - vsubl.u , d3, d30 │ │ + add.w r4, r0, r1, lsr #7 │ │ + vabal.u q10, d19, d16 │ │ + vrshr.u32 d21, d25, #13 │ │ vrshr.u64 d21, d0, #13 │ │ movs r0, r0 │ │ - ldr r4, [pc, #64] @ (d745c ) │ │ + ldr r4, [pc, #64] @ (d746c ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n d793c │ │ + b.n d794c │ │ adds r0, #2 │ │ - b.n d7928 │ │ + b.n d7938 │ │ movs r1, r2 │ │ - b.n d7ad0 │ │ + b.n d7ae0 │ │ movs r2, r3 │ │ ldrh r0, [r0, #16] │ │ ands r4, r0 │ │ - b.n d7950 │ │ + b.n d7960 │ │ adds r1, #3 │ │ - b.n d735e │ │ - blx 4da540 │ │ + b.n d736e │ │ + blx 4da550 │ │ lsls r0, r1, #1 │ │ movs r0, r0 │ │ lsls r0, r2, #1 │ │ movs r0, r0 │ │ lsls r0, r4, #1 │ │ movs r0, r0 │ │ lsls r0, r4, #1 │ │ @@ -287052,810 +286932,810 @@ │ │ lsls r0, r1, #1 │ │ movs r0, r0 │ │ lsls r0, r3, #1 │ │ movs r0, r0 │ │ lsls r0, r2, #1 │ │ movs r0, r0 │ │ movs r0, #60 @ 0x3c │ │ - b.n d6f86 │ │ + b.n d6f96 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r2, r6, sp} │ │ - b.n d6f8e │ │ + b.n d6f9e │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r6, sp} │ │ - b.n d6f96 │ │ + b.n d6fa6 │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r2, r3} │ │ - b.n d7b40 │ │ + b.n d7b50 │ │ movs r2, r0 │ │ ldrh r0, [r0, #16] │ │ movs r0, r1 │ │ - b.n d79a6 │ │ + b.n d79b6 │ │ movs r1, #1 │ │ - b.n d73aa │ │ + b.n d73ba │ │ ldrh r0, [r2, #32] │ │ ldmia.w sp!, {r0, r1, r2, r3, r7} │ │ - b.n d7b54 │ │ + b.n d7b64 │ │ movs r0, #72 @ 0x48 │ │ lsls r0, r0, #22 │ │ ldrh r0, [r2, #32] │ │ lsrs r5, r7, #2 │ │ asrs r0, r6, #32 │ │ - b.n d6ffc │ │ + b.n d700c │ │ movs r0, #48 @ 0x30 │ │ - b.n d7000 │ │ + b.n d7010 │ │ adds r0, #48 @ 0x30 │ │ - b.n d7004 │ │ + b.n d7014 │ │ asrs r1, r0, #32 │ │ - b.n d75e8 │ │ + b.n d75f8 │ │ movs r4, r5 │ │ - b.n d700c │ │ + b.n d701c │ │ movs r0, #2 │ │ - b.n d75f0 │ │ + b.n d7600 │ │ adds r0, #3 │ │ - b.n d75f4 │ │ + b.n d7604 │ │ movs r0, r0 │ │ - b.n d7418 │ │ + b.n d7428 │ │ lsls r0, r5 │ │ - b.n d79de │ │ + b.n d79ee │ │ movs r4, r0 │ │ - b.n d7822 │ │ + b.n d7832 │ │ lsls r2, r6, #24 │ │ add.w r0, r0, r4 │ │ - b.n d782a │ │ + b.n d783a │ │ lsls r4, r5, #24 │ │ add.w r5, r0, r3, lsr #1 │ │ - add.w r3, r0, r7, asr #6 │ │ - vqrdmlah.s , , d21[0] │ │ - @ instruction: 0xfff35146 │ │ + add.w r3, r0, r9, asr #7 │ │ + vshr.u32 d22, d5, #13 │ │ + vsra.u32 , , #13 │ │ vaddw.u , , d24 │ │ movs r0, r0 │ │ movs r7, r3 │ │ - b.n d7c88 │ │ + b.n d7c98 │ │ lsrs r1, r0, #16 │ │ - b.n d798a │ │ + b.n d799a │ │ lsrs r0, r2, #28 │ │ - b.n d77ec │ │ + b.n d77fc │ │ lsls r0, r4, #10 │ │ - b.n d7852 │ │ + b.n d7862 │ │ vrhadd.u16 d14, d14, d31 │ │ - ldr r0, [pc, #192] @ (d75d8 ) │ │ + ldr r0, [pc, #192] @ (d75e8 ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n d7a38 │ │ + b.n d7a48 │ │ movs r0, #15 │ │ - b.n d7ca4 │ │ + b.n d7cb4 │ │ lsrs r1, r2, #24 │ │ - b.n d7bca │ │ + b.n d7bda │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ lsrs r1, r0, #16 │ │ - b.n d7bd2 │ │ + b.n d7be2 │ │ movs r0, r5 │ │ subs r0, r0, r0 │ │ movs r0, #77 @ 0x4d │ │ - b.n d70d6 │ │ + b.n d70e6 │ │ movs r0, r0 │ │ - b.n d7bde │ │ + b.n d7bee │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ lsls r1, r0, #6 │ │ - b.n d7642 │ │ + b.n d7652 │ │ lsrs r3, r7, #25 │ │ - b.n d79c6 │ │ + b.n d79d6 │ │ lsls r0, r2, #3 │ │ - b.n d78ca │ │ + b.n d78da │ │ ldrh r0, [r6, #0] │ │ ldmia.w sp!, {r1, r2, r3, r6, sp} │ │ - b.n d70f2 │ │ + b.n d7102 │ │ movs r0, r0 │ │ - b.n d7bfa │ │ + b.n d7c0a │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ movs r0, #1 │ │ - b.n d7c9e │ │ + b.n d7cae │ │ ands r0, r0 │ │ - b.n d78a2 │ │ + b.n d78b2 │ │ movs r0, #78 @ 0x4e │ │ - b.n d70e6 │ │ + b.n d70f6 │ │ movs r0, #216 @ 0xd8 │ │ - b.n d7a6a │ │ + b.n d7a7a │ │ str r1, [r0, r0] │ │ - b.n d78ae │ │ + b.n d78be │ │ movs r2, r0 │ │ - b.n d78b2 │ │ + b.n d78c2 │ │ lsls r0, r4, #17 │ │ add.w r0, r0, r4 │ │ - b.n d78ba │ │ + b.n d78ca │ │ asrs r5, r0, #32 │ │ - b.n d78be │ │ + b.n d78ce │ │ lsls r1, r0, #6 │ │ - b.n d7682 │ │ + b.n d7692 │ │ asrs r0, r5, #30 │ │ - b.n d7b86 │ │ + b.n d7b96 │ │ movs r1, r0 │ │ - b.n d760a │ │ + b.n d761a │ │ lsls r0, r2, #3 │ │ - b.n d790e │ │ + b.n d791e │ │ ldrh r0, [r6, #0] │ │ ldmia.w sp!, {r0, lr} │ │ - b.n d78d6 │ │ + b.n d78e6 │ │ asrs r1, r0, #32 │ │ - b.n d7cda │ │ + b.n d7cea │ │ asrs r5, r1, #1 │ │ - b.n d711e │ │ + b.n d712e │ │ str r0, [r0, r0] │ │ - b.n d78e2 │ │ + b.n d78f2 │ │ asrs r4, r1, #1 │ │ - b.n d7146 │ │ + b.n d7156 │ │ lsls r0, r2, #1 │ │ - b.n d7aaa │ │ + b.n d7aba │ │ movs r0, r0 │ │ - b.n d7c50 │ │ + b.n d7c60 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ lsls r6, r1, #17 │ │ add.w r0, r0, r0 │ │ and.w r4, r0, sl, lsl #1 │ │ add.w r0, r0, r4, lsl #4 │ │ - b.n d7902 │ │ + b.n d7912 │ │ movs r5, r0 │ │ - b.n d7906 │ │ + b.n d7916 │ │ lsls r1, r0, #6 │ │ - b.n d76ca │ │ + b.n d76da │ │ lsrs r3, r7, #25 │ │ - b.n d7a4e │ │ + b.n d7a5e │ │ lsls r0, r2, #3 │ │ - b.n d7952 │ │ + b.n d7962 │ │ ldrh r0, [r6, #0] │ │ ldmia.w sp!, {r4, r5, ip} │ │ - b.n d7118 │ │ + b.n d7128 │ │ movs r0, #48 @ 0x30 │ │ - b.n d711c │ │ + b.n d712c │ │ adds r0, #48 @ 0x30 │ │ - b.n d7120 │ │ + b.n d7130 │ │ asrs r1, r0, #32 │ │ - b.n d7704 │ │ + b.n d7714 │ │ movs r4, r5 │ │ - b.n d7128 │ │ + b.n d7138 │ │ movs r0, #2 │ │ - b.n d770c │ │ + b.n d771c │ │ adds r0, #3 │ │ - b.n d7710 │ │ + b.n d7720 │ │ movs r0, r0 │ │ - b.n d7534 │ │ + b.n d7544 │ │ lsls r0, r5 │ │ - b.n d7afa │ │ + b.n d7b0a │ │ movs r4, r0 │ │ - b.n d793e │ │ + b.n d794e │ │ lsls r3, r5, #23 │ │ add.w r0, r0, r4 │ │ - b.n d7946 │ │ + b.n d7956 │ │ lsls r5, r4, #23 │ │ add.w r5, r0, ip │ │ - add.w r2, r0, fp, lsl #6 │ │ - vcvt.f32.u32 q8, , #13 │ │ - @ instruction: 0xfff37ddc │ │ + add.w r2, r0, sp, lsl #7 │ │ + @ instruction: 0xfff30eb9 │ │ + @ instruction: 0xfff37f02 │ │ vaddl.u , d19, d12 │ │ movs r0, r0 │ │ - ldr r0, [pc, #960] @ (d79e0 ) │ │ + ldr r0, [pc, #960] @ (d79f0 ) │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n d7b40 │ │ + b.n d7b50 │ │ ands r2, r0 │ │ - b.n d796a │ │ + b.n d797a │ │ movs r0, #15 │ │ - b.n d7db0 │ │ + b.n d7dc0 │ │ str r3, [r0, r0] │ │ - b.n d7972 │ │ + b.n d7982 │ │ lsrs r1, r2, #24 │ │ - b.n d7cda │ │ + b.n d7cea │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ lsrs r1, r0, #16 │ │ - b.n d7ce2 │ │ + b.n d7cf2 │ │ movs r0, r5 │ │ subs r0, r0, r0 │ │ movs r0, #77 @ 0x4d │ │ - b.n d71e6 │ │ + b.n d71f6 │ │ movs r0, r0 │ │ - b.n d7cee │ │ + b.n d7cfe │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ lsls r1, r0, #6 │ │ - b.n d7752 │ │ + b.n d7762 │ │ lsrs r3, r7, #25 │ │ - b.n d7ad6 │ │ + b.n d7ae6 │ │ lsrs r0, r6 │ │ - b.n d79da │ │ + b.n d79ea │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r1, r2, r3, r6, sp} │ │ - b.n d7202 │ │ + b.n d7212 │ │ movs r0, r0 │ │ - b.n d7d0a │ │ + b.n d7d1a │ │ movs r0, r1 │ │ subs r0, r0, r0 │ │ movs r0, #1 │ │ - b.n d7dae │ │ + b.n d7dbe │ │ str r0, [r0, #0] │ │ - b.n d79b2 │ │ + b.n d79c2 │ │ movs r0, #78 @ 0x4e │ │ - b.n d71f6 │ │ + b.n d7206 │ │ movs r0, #216 @ 0xd8 │ │ - b.n d7b7a │ │ + b.n d7b8a │ │ strb r1, [r0, #0] │ │ - b.n d79be │ │ + b.n d79ce │ │ movs r2, r0 │ │ - b.n d79c2 │ │ + b.n d79d2 │ │ lsls r4, r3, #16 │ │ add.w r0, r0, r6 │ │ - b.n d79ca │ │ + b.n d79da │ │ asrs r7, r0, #32 │ │ - b.n d79ce │ │ + b.n d79de │ │ lsls r1, r0, #6 │ │ - b.n d7792 │ │ + b.n d77a2 │ │ asrs r0, r5, #30 │ │ - b.n d7c96 │ │ + b.n d7ca6 │ │ movs r1, r0 │ │ - b.n d771a │ │ + b.n d772a │ │ lsrs r0, r6 │ │ - b.n d7a1e │ │ + b.n d7a2e │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r0, sp, lr} │ │ - b.n d79e6 │ │ + b.n d79f6 │ │ asrs r1, r0, #32 │ │ - b.n d7dea │ │ + b.n d7dfa │ │ asrs r5, r1, #1 │ │ - b.n d722e │ │ + b.n d723e │ │ strb r0, [r0, #0] │ │ - b.n d79f2 │ │ + b.n d7a02 │ │ asrs r4, r1, #1 │ │ - b.n d7256 │ │ + b.n d7266 │ │ lsls r0, r2, #1 │ │ - b.n d7bba │ │ + b.n d7bca │ │ movs r0, r0 │ │ - b.n d7d60 │ │ + b.n d7d70 │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ lsls r2, r1, #16 │ │ add.w r0, r0, r0 │ │ and.w r4, r0, r6 │ │ add.w r0, r0, r6, lsl #4 │ │ - b.n d7a12 │ │ + b.n d7a22 │ │ movs r7, r0 │ │ - b.n d7a16 │ │ + b.n d7a26 │ │ lsls r1, r0, #6 │ │ - b.n d77da │ │ + b.n d77ea │ │ lsrs r3, r7, #25 │ │ - b.n d7b5e │ │ + b.n d7b6e │ │ lsrs r0, r6 │ │ - b.n d7a62 │ │ + b.n d7a72 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r4, r5, ip} │ │ - b.n d7228 │ │ + b.n d7238 │ │ movs r0, #48 @ 0x30 │ │ - b.n d722c │ │ + b.n d723c │ │ adds r0, #48 @ 0x30 │ │ - b.n d7230 │ │ + b.n d7240 │ │ asrs r1, r0, #32 │ │ - b.n d7814 │ │ + b.n d7824 │ │ movs r4, r5 │ │ - b.n d7238 │ │ + b.n d7248 │ │ movs r0, #2 │ │ - b.n d781c │ │ + b.n d782c │ │ adds r0, #3 │ │ - b.n d7820 │ │ + b.n d7830 │ │ movs r0, r0 │ │ - b.n d7644 │ │ + b.n d7654 │ │ lsls r0, r5 │ │ - b.n d7c0a │ │ + b.n d7c1a │ │ movs r4, r0 │ │ - b.n d7a4e │ │ + b.n d7a5e │ │ lsls r7, r4, #22 │ │ add.w r0, r0, r4 │ │ - b.n d7a56 │ │ + b.n d7a66 │ │ lsls r1, r4, #22 │ │ add.w r4, r0, r8, lsl #3 │ │ - add.w r1, r0, fp, ror #5 │ │ - vtbl.8 d20, {d19-d21}, d26 │ │ - vqdmulh.s , , d12[0] │ │ + add.w r1, r0, sp, ror #6 │ │ + vtbx.8 d20, {d3-d5}, d28 │ │ + @ instruction: 0xfff37df2 │ │ vcvt.u32.f32 q10, q14, #13 │ │ movs r0, r0 │ │ - ldr r4, [pc, #448] @ (d78f0 ) │ │ + ldr r4, [pc, #448] @ (d7900 ) │ │ stmdb sp!, {r4, ip, sp, pc} │ │ - b.n d7c50 │ │ - beq.n d7748 │ │ - b.n d7bd4 │ │ + b.n d7c60 │ │ + beq.n d7758 │ │ + b.n d7be4 │ │ str r0, [r0, r0] │ │ - b.n d7a7e │ │ + b.n d7a8e │ │ lsls r0, r0, #6 │ │ - b.n d72e2 │ │ + b.n d72f2 │ │ ands r0, r0 │ │ - b.n d7e86 │ │ + b.n d7e96 │ │ movs r0, r0 │ │ - b.n d7dea │ │ + b.n d7dfa │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r4, r0 │ │ - b.n d7a92 │ │ - beq.n d7774 │ │ - b.n d7bec │ │ + b.n d7aa2 │ │ + beq.n d7784 │ │ + b.n d7bfc │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r3, r4, r5, r6, r8} │ │ - b.n d7288 │ │ + b.n d7298 │ │ movs r0, #4 │ │ - b.n d7c7c │ │ + b.n d7c8c │ │ asrs r5, r1, #32 │ │ - b.n d7aa6 │ │ + b.n d7ab6 │ │ ands r4, r0 │ │ - b.n d7284 │ │ + b.n d7294 │ │ ands r0, r0 │ │ - b.n d7288 │ │ + b.n d7298 │ │ ldr??.w lr, [r3], #255 │ │ asrs r0, r0, #32 │ │ - b.n d7ab6 │ │ + b.n d7ac6 │ │ movs r4, r1 │ │ ldmia.w sp, {r0, r2} │ │ - b.n d7abe │ │ + b.n d7ace │ │ ldr??.w lr, [r0], #255 │ │ str r0, [r1, #0] │ │ - b.n d7c26 │ │ + b.n d7c36 │ │ movs r7, r0 │ │ subs r0, r0, r0 │ │ movs r0, r0 │ │ - b.n d72b8 │ │ + b.n d72c8 │ │ asrs r1, r0, #32 │ │ - b.n d7ed2 │ │ + b.n d7ee2 │ │ movs r0, #52 @ 0x34 │ │ - b.n d72b6 │ │ + b.n d72c6 │ │ movs r5, r0 │ │ - b.n d7ada │ │ + b.n d7aea │ │ vrhadd.u d14, d2, d31 │ │ lsls r0, r0, #6 │ │ - b.n d734c │ │ + b.n d735c │ │ movs r0, r0 │ │ - b.n d7e46 │ │ + b.n d7e56 │ │ @ instruction: 0xffe81aff │ │ lsrs r6, r2, #28 │ │ - b.n d7a8c │ │ + b.n d7a9c │ │ cmp r0, r4 │ │ - b.n d7af2 │ │ + b.n d7b02 │ │ movs r4, r0 │ │ - b.n d7af6 │ │ - beq.n d77d8 │ │ - b.n d7c50 │ │ + b.n d7b06 │ │ + beq.n d77e8 │ │ + b.n d7c60 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ ldmia.w sp!, {r7, r8, sp} │ │ - b.n d7362 │ │ + b.n d7372 │ │ movs r0, r0 │ │ - b.n d7e6a │ │ + b.n d7e7a │ │ movs r6, r0 │ │ lsrs r0, r0, #8 │ │ lsls r0, r2, #1 │ │ movt r0, #0 │ │ - b.n d7f12 │ │ + b.n d7f22 │ │ movs r4, r4 │ │ - b.n d72d8 │ │ + b.n d72e8 │ │ lsrs r5, r1, #10 │ │ orr.w sl, r1, #4620288 @ 0x468000 │ │ orr.w r0, r1, #8388608 @ 0x800000 │ │ - b.n d72e4 │ │ + b.n d72f4 │ │ vrhadd.u16 d14, d14, d31 │ │ lsrs r6, r2, #29 │ │ - b.n d7cea │ │ + b.n d7cfa │ │ lsrs r5, r1, #10 │ │ orn sl, r0, #288768 @ 0x46800 │ │ orn fp, r0, #32768 @ 0x8000 │ │ vldr s1, [r0, #564] @ 0x234 │ │ orr.w sl, r1, #288768 @ 0x46800 │ │ orr.w fp, r1, #32768 @ 0x8000 │ │ stcl 15, cr15, [r1, #120] @ 0x78 │ │ - b.n d7a64 │ │ - ldr r4, [pc, #64] @ (d7848 ) │ │ + b.n d7a74 │ │ + ldr r4, [pc, #64] @ (d7858 ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n d7d28 │ │ + b.n d7d38 │ │ ands r0, r0 │ │ - b.n d7b52 │ │ + b.n d7b62 │ │ lsls r5, r1, #1 │ │ - b.n d73b6 │ │ + b.n d73c6 │ │ movs r0, r0 │ │ - b.n d7eba │ │ + b.n d7eca │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ asrs r4, r1, #1 │ │ - b.n d73ca │ │ + b.n d73da │ │ lsls r0, r2, #1 │ │ - b.n d7d2e │ │ + b.n d7d3e │ │ movs r0, r0 │ │ - b.n d7ecc │ │ + b.n d7edc │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ lsls r3, r4, #14 │ │ add.w r0, r0, lr, lsl #1 │ │ - b.n d73de │ │ + b.n d73ee │ │ movs r0, r0 │ │ - b.n d7eda │ │ + b.n d7eea │ │ movs r1, r0 │ │ lsrs r0, r0, #8 │ │ lsls r0, r3, #3 │ │ - b.n d7d4a │ │ + b.n d7d5a │ │ lsls r0, r4, #14 │ │ add.w r0, r0, r8 │ │ - b.n d7d52 │ │ - ldr r4, [pc, #64] @ (d788c ) │ │ + b.n d7d62 │ │ + ldr r4, [pc, #64] @ (d789c ) │ │ ldmia.w sp!, {r2, r4, r7, r8, r9} │ │ and.w r3, r0, r8, lsr #2 │ │ add.w r0, r0, lr, lsl #1 │ │ - b.n d7402 │ │ + b.n d7412 │ │ movs r0, r0 │ │ - b.n d7efe │ │ + b.n d7f0e │ │ @ instruction: 0xfff61aff │ │ @ instruction: 0xfff7eaff │ │ lsls r1, r0, #6 │ │ - b.n d740a │ │ + b.n d741a │ │ vrhadd.u16 d14, d14, d31 │ │ - ldr r0, [pc, #0] @ (d7870 ) │ │ + ldr r0, [pc, #0] @ (d7880 ) │ │ stmdb sp!, {r0, r2, r3, ip, sp, pc} │ │ - b.n d7bb6 │ │ + b.n d7bc6 │ │ asrs r0, r0, #32 │ │ - b.n d739a │ │ + b.n d73aa │ │ movs r0, #12 │ │ - b.n d73a0 │ │ + b.n d73b0 │ │ asrs r0, r0, #32 │ │ - b.n d8042 │ │ + b.n d8052 │ │ vrhadd.u d14, d2, d31 │ │ movs r0, r0 │ │ - b.n d7fca │ │ + b.n d7fda │ │ ldrh r0, [r0, #0] │ │ ldmia.w sp!, {r4, r5, fp, lr} │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n d7db0 │ │ - beq.n d78b8 │ │ - b.n d7d34 │ │ + b.n d7dc0 │ │ + beq.n d78c8 │ │ + b.n d7d44 │ │ ands r0, r0 │ │ - b.n d7bde │ │ + b.n d7bee │ │ movs r0, r0 │ │ - b.n d73c2 │ │ + b.n d73d2 │ │ str r1, [r0, r0] │ │ - b.n d7be6 │ │ + b.n d7bf6 │ │ asrs r0, r0, #32 │ │ - b.n d806a │ │ + b.n d807a │ │ movs r0, #12 │ │ - b.n d73ce │ │ + b.n d73de │ │ movs r4, r0 │ │ - b.n d7bf2 │ │ + b.n d7c02 │ │ vrhadd.u d14, d2, d31 │ │ movs r1, r0 │ │ - b.n d805a │ │ + b.n d806a │ │ movs r4, r1 │ │ lsrs r0, r0, #8 │ │ str r5, [r0, r0] │ │ - b.n d7942 │ │ + b.n d7952 │ │ asrs r0, r0, #32 │ │ - b.n d8006 │ │ + b.n d8016 │ │ asrs r4, r1, #32 │ │ - b.n d73e4 │ │ + b.n d73f4 │ │ asrs r4, r1, #32 │ │ - b.n d7de8 │ │ + b.n d7df8 │ │ movs r5, r0 │ │ - b.n d7c12 │ │ + b.n d7c22 │ │ lsls r2, r1, #22 │ │ add.w r0, r0, ip, lsl #4 │ │ - b.n d7414 │ │ + b.n d7424 │ │ movs r0, r0 │ │ - b.n d7f7e │ │ + b.n d7f8e │ │ movs r4, r0 │ │ - b.n d73fc │ │ + b.n d740c │ │ asrs r1, r0, #6 │ │ - b.n d7c26 │ │ + b.n d7c36 │ │ movs r0, r0 │ │ asrs r1, r2, #13 │ │ asrs r0, r1, #32 │ │ - b.n d7408 │ │ + b.n d7418 │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n d8036 │ │ + b.n d8046 │ │ lsls r0, r0, #6 │ │ - b.n d7482 │ │ - beq.n d790c │ │ - b.n d7d94 │ │ + b.n d7492 │ │ + beq.n d791c │ │ + b.n d7da4 │ │ ldrh r0, [r6, #0] │ │ ldmia.w sp!, {r2, sp} │ │ - b.n d7e20 │ │ + b.n d7e30 │ │ movs r4, r0 │ │ - b.n d7c4a │ │ + b.n d7c5a │ │ asrs r5, r0, #32 │ │ - b.n d7c4e │ │ + b.n d7c5e │ │ movs r7, r0 │ │ add.w r0, r0, r0 │ │ - b.n d7fb6 │ │ + b.n d7fc6 │ │ @ instruction: 0xfff50aff │ │ @ instruction: 0xfff6eaff │ │ movs r1, r0 │ │ - b.n d7c62 │ │ + b.n d7c72 │ │ lsls r5, r1, #2 │ │ and.w r0, r0, r1, lsl #4 │ │ - b.n d806a │ │ + b.n d807a │ │ asrs r4, r1, #1 │ │ - b.n d74ae │ │ + b.n d74be │ │ vrhadd.u16 d14, d14, d31 │ │ - ldr r5, [pc, #960] @ (d7cf4 ) │ │ + ldr r5, [pc, #960] @ (d7d04 ) │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n d7e54 │ │ + b.n d7e64 │ │ adds r0, #4 │ │ - b.n d7462 │ │ - b.n d7c86 │ │ - b.n d7ca2 │ │ + b.n d7472 │ │ + b.n d7c96 │ │ + b.n d7cb2 │ │ movs r3, r4 │ │ lsrs r0, r0, #8 │ │ strh r0, [r0, #0] │ │ - b.n d746e │ │ + b.n d747e │ │ str r0, [r0, #0] │ │ - b.n d808e │ │ + b.n d809e │ │ movs r0, #14 │ │ - b.n d7c92 │ │ + b.n d7ca2 │ │ strb r2, [r4, #2] │ │ - b.n d7a62 │ │ + b.n d7a72 │ │ adds r0, #8 │ │ - b.n d7c9a │ │ + b.n d7caa │ │ str r7, [r0, r6] │ │ - b.n d78c4 │ │ + b.n d78d4 │ │ asrs r1, r0 │ │ - b.n d7d6c │ │ + b.n d7d7c │ │ str r4, [r0, r2] │ │ - b.n d7c70 │ │ + b.n d7c80 │ │ adds r0, #3 │ │ - b.n d7a74 │ │ + b.n d7a84 │ │ str r2, [r4, r2] │ │ - b.n d7d2e │ │ + b.n d7d3e │ │ movs r1, r0 │ │ - b.n d7c18 │ │ + b.n d7c28 │ │ str r5, [r0, r0] │ │ - b.n d7a7a │ │ + b.n d7a8a │ │ str r2, [r4, r2] │ │ strh r0, [r4, #12] │ │ str r1, [r0, #0] │ │ str r2, [sp, #540] @ 0x21c │ │ movs r0, r0 │ │ - b.n d802c │ │ + b.n d803c │ │ movs r0, #5 │ │ - b.n d7cc6 │ │ + b.n d7cd6 │ │ @ instruction: 0xfff11aff │ │ asrs r0, r0, #32 │ │ - b.n d80ce │ │ + b.n d80de │ │ movs r0, r0 │ │ - b.n d803e │ │ + b.n d804e │ │ movs r5, r1 │ │ lsrs r0, r0, #8 │ │ movs r1, #134 @ 0x86 │ │ - b.n d7aaa │ │ + b.n d7aba │ │ stmia r0!, {} │ │ - b.n d815e │ │ + b.n d816e │ │ movs r6, r1 │ │ - b.n d7c4e │ │ + b.n d7c5e │ │ movs r4, r0 │ │ lsrs r0, r0, #8 │ │ adds r1, #134 @ 0x86 │ │ - b.n d7cea │ │ + b.n d7cfa │ │ adds r0, #3 │ │ - b.n d791e │ │ + b.n d792e │ │ strb r1, [r0, #4] │ │ - b.n d7db8 │ │ + b.n d7dc8 │ │ adds r0, #135 @ 0x87 │ │ - b.n d7cbc │ │ + b.n d7ccc │ │ stmia r0!, {r3} │ │ - b.n d7ac0 │ │ + b.n d7ad0 │ │ ands r0, r1 │ │ - b.n d7422 │ │ + b.n d7432 │ │ str r4, [r0, #0] │ │ - b.n d7ee6 │ │ + b.n d7ef6 │ │ adds r0, #0 │ │ asrs r6, r2, #22 │ │ movs r1, r0 │ │ asrs r3, r2, #13 │ │ movs r3, r0 │ │ subs r0, r0, r0 │ │ movs r1, r0 │ │ - b.n d7d12 │ │ + b.n d7d22 │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {} │ │ - b.n d811a │ │ + b.n d812a │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {} │ │ - b.n d8088 │ │ + b.n d8098 │ │ movs r3, r1 │ │ - ldr r2, [pc, #0] @ (d79e4 ) │ │ + ldr r2, [pc, #0] @ (d79f4 ) │ │ asrs r1, r0, #4 │ │ - b.n d7df0 │ │ + b.n d7e00 │ │ asrs r1, r0, #2 │ │ - b.n d7cf4 │ │ + b.n d7d04 │ │ str r6, [r0, #0] │ │ - b.n d7954 │ │ + b.n d7964 │ │ movs r1, r0 │ │ - b.n d80e2 │ │ + b.n d80f2 │ │ movs r0, r1 │ │ - bge.n d79fa │ │ + bge.n d7a0a │ │ str r7, [r0, r0] │ │ - b.n d75a0 │ │ + b.n d75b0 │ │ strb r1, [r0, #0] │ │ - b.n d7b0e │ │ + b.n d7b1e │ │ str r1, [r0, #16] │ │ - b.n d7e12 │ │ + b.n d7e22 │ │ str r5, [r0, r4] │ │ - b.n d7b0c │ │ - b.n d7b18 │ │ - b.n d7b1c │ │ + b.n d7b1c │ │ + b.n d7b28 │ │ + b.n d7b2c │ │ str r0, [r1, #0] │ │ - b.n d7f1c │ │ + b.n d7f2c │ │ movs r5, r1 │ │ and.w r0, r0, r6, lsl #4 │ │ - b.n d7d5a │ │ + b.n d7d6a │ │ str r3, [r0, #0] │ │ - b.n d7d5e │ │ + b.n d7d6e │ │ ldrb r6, [r2, r1] │ │ - b.n d79e8 │ │ + b.n d79f8 │ │ movs r2, r0 │ │ - b.n d80d0 │ │ + b.n d80e0 │ │ movs r6, r1 │ │ lsrs r0, r0, #8 │ │ movs r1, r0 │ │ - b.n d80d8 │ │ + b.n d80e8 │ │ movs r0, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ - b.n d80e0 │ │ + b.n d80f0 │ │ movs r7, r5 │ │ subs r0, r0, r0 │ │ - b.n d7c24 │ │ - b.n d757c │ │ + b.n d7c34 │ │ + b.n d758c │ │ str r4, [r0, #0] │ │ - b.n d7f44 │ │ + b.n d7f54 │ │ movs r0, r0 │ │ - b.n d80ec │ │ + b.n d80fc │ │ str r0, [r0, #0] │ │ orrs r0, r0 │ │ - b.n d7a68 │ │ - b.n d798c │ │ + b.n d7a78 │ │ + b.n d799c │ │ str r0, [r0, r0] │ │ - b.n d8192 │ │ + b.n d81a2 │ │ movs r5, r1 │ │ @ instruction: 0xea00e0d4 │ │ - b.n d7598 │ │ + b.n d75a8 │ │ str r0, [r0, r0] │ │ - b.n d819e │ │ - b.n d7a7c │ │ - b.n d79a0 │ │ + b.n d81ae │ │ + b.n d7a8c │ │ + b.n d79b0 │ │ movs r2, r0 │ │ @ instruction: 0xea00e0dc │ │ - b.n d75a8 │ │ + b.n d75b8 │ │ str r2, [r0, r0] │ │ - b.n d81ae │ │ - b.n d7a8c │ │ - b.n d79b0 │ │ + b.n d81be │ │ + b.n d7a9c │ │ + b.n d79c0 │ │ ldrb r6, [r2, #1] │ │ - b.n d7a44 │ │ + b.n d7a54 │ │ movs r1, r0 │ │ - b.n d8160 │ │ + b.n d8170 │ │ str r7, [r0, #16] │ │ - b.n d7b80 │ │ + b.n d7b90 │ │ str r4, [r0, #0] │ │ - b.n d7f8e │ │ + b.n d7f9e │ │ movs r1, r0 │ │ ldmia r2!, {} │ │ movs r0, r0 │ │ - b.n d8138 │ │ + b.n d8148 │ │ movs r4, r1 │ │ subs r0, r0, r0 │ │ strb r1, [r0, #4] │ │ - b.n d7e9a │ │ + b.n d7eaa │ │ asrs r0, r7, #5 │ │ - b.n d7596 │ │ + b.n d75a6 │ │ subs r3, r4, #6 │ │ - b.n d7da4 │ │ + b.n d7db4 │ │ asrs r4, r5, #5 │ │ - b.n d759e │ │ + b.n d75ae │ │ lsls r7, r0 │ │ - b.n d7daa │ │ + b.n d7dba │ │ asrs r1, r0, #32 │ │ - b.n d81e6 │ │ + b.n d81f6 │ │ movs r0, #2 │ │ - b.n d7bb2 │ │ + b.n d7bc2 │ │ movs r1, #88 @ 0x58 │ │ - b.n d75ae │ │ + b.n d75be │ │ stmia r1!, {r2, r3, r4, r6} │ │ - b.n d75b2 │ │ + b.n d75c2 │ │ str r0, [r4, #20] │ │ - b.n d75b6 │ │ - b.n d7d80 │ │ - b.n d75ba │ │ + b.n d75c6 │ │ + b.n d7d90 │ │ + b.n d75ca │ │ movs r1, r0 │ │ - b.n d7dfe │ │ + b.n d7e0e │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {r2, r7, ip} │ │ - b.n d7604 │ │ + b.n d7614 │ │ movs r0, #132 @ 0x84 │ │ - b.n d7608 │ │ + b.n d7618 │ │ adds r0, #132 @ 0x84 │ │ - b.n d760c │ │ + b.n d761c │ │ asrs r1, r0, #32 │ │ - b.n d7bf0 │ │ + b.n d7c00 │ │ lsls r0, r0, #2 │ │ - b.n d7614 │ │ + b.n d7624 │ │ movs r0, #2 │ │ - b.n d7bf8 │ │ + b.n d7c08 │ │ adds r0, #3 │ │ - b.n d7bfc │ │ + b.n d7c0c │ │ movs r0, r0 │ │ - b.n d7a20 │ │ + b.n d7a30 │ │ lsls r0, r5 │ │ - b.n d7fe6 │ │ + b.n d7ff6 │ │ movs r4, r0 │ │ - b.n d7e2a │ │ + b.n d7e3a │ │ lsls r0, r6, #18 │ │ add.w r0, r0, r4 │ │ - b.n d7e32 │ │ + b.n d7e42 │ │ lsls r2, r5, #18 │ │ add.w r3, r0, r1, lsr #3 │ │ add.w r0, r0, r8, ror #4 │ │ - b.n d763c │ │ + b.n d764c │ │ movs r0, #56 @ 0x38 │ │ - b.n d7640 │ │ + b.n d7650 │ │ adds r0, #56 @ 0x38 │ │ - b.n d7644 │ │ + b.n d7654 │ │ asrs r1, r0, #32 │ │ - b.n d7c28 │ │ + b.n d7c38 │ │ movs r4, r6 │ │ - b.n d764c │ │ + b.n d765c │ │ movs r0, #2 │ │ - b.n d7c30 │ │ + b.n d7c40 │ │ adds r0, #3 │ │ - b.n d7c34 │ │ + b.n d7c44 │ │ movs r0, r0 │ │ - b.n d7a58 │ │ + b.n d7a68 │ │ lsls r0, r5 │ │ - b.n d801e │ │ + b.n d802e │ │ movs r4, r0 │ │ - b.n d7e62 │ │ + b.n d7e72 │ │ lsls r2, r4, #18 │ │ add.w r0, r0, r4 │ │ - b.n d7e6a │ │ + b.n d7e7a │ │ lsls r4, r3, #18 │ │ add.w r3, r0, r3, lsl #3 │ │ add.w ip, r0, r8, asr #16 │ │ movs r0, r0 │ │ - ldr r4, [pc, #224] @ (d7c18 ) │ │ + ldr r4, [pc, #224] @ (d7c28 ) │ │ movs r0, r0 │ │ - lsrs r7, r4, #21 │ │ - vshr.u32 , q1, #13 │ │ - vdup.8 d19, d1[1] │ │ + lsrs r1, r5, #22 │ │ + @ instruction: 0xfff32fba │ │ + vtbx.8 d19, {d19-d22}, d17 │ │ vtbx.8 d20, {d3-d6}, d24 │ │ movs r0, r0 │ │ - ldr r4, [pc, #112] @ (d7bbc ) │ │ + ldr r4, [pc, #112] @ (d7bcc ) │ │ movs r0, r0 │ │ - lsrs r7, r3, #22 │ │ - vaddl.u , d19, d10 │ │ - vrsra.u32 d24, d6, #13 │ │ + lsrs r1, r4, #23 │ │ + @ instruction: 0xfff32ff2 │ │ + vrsra.u32 q12, q3, #13 │ │ vtbl.8 d20, {d19-d22}, d16 │ │ movs r0, r0 │ │ asrs r2, r0, #32 │ │ - b.n d8062 │ │ + b.n d8072 │ │ lsls r1, r4, #2 │ │ - b.n d7ea6 │ │ + b.n d7eb6 │ │ lsls r0, r2, #2 │ │ - b.n d820a │ │ + b.n d821a │ │ lsls r3, r2, #8 │ │ ldrh r0, [r0, #16] │ │ lsrs r4, r2, #1 │ │ - b.n d76b0 │ │ + b.n d76c0 │ │ movs r0, #8 │ │ - b.n d8094 │ │ + b.n d80a4 │ │ asrs r1, r0, #4 │ │ - b.n d7a9e │ │ + b.n d7aae │ │ movs r0, r0 │ │ - b.n d7c9c │ │ - blx 4d8c84 │ │ + b.n d7cac │ │ + blx 4d8c94 │ │ lsls r0, r1, #18 │ │ movs r0, r0 │ │ lsrs r4, r0, #1 │ │ movs r0, r0 │ │ lsls r0, r5, #25 │ │ movs r0, r0 │ │ lsls r0, r4, #24 │ │ @@ -288429,733 +288309,733 @@ │ │ lsls r4, r2, #18 │ │ movs r0, r0 │ │ lsls r0, r4, #18 │ │ movs r0, r0 │ │ lsls r0, r6, #20 │ │ movs r0, r0 │ │ lsls r0, r0, #15 │ │ - b.n d7b4c │ │ + b.n d7b5c │ │ movs r0, r0 │ │ - b.n d8130 │ │ + b.n d8140 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r4, #19 │ │ - b.n d7b58 │ │ + b.n d7b68 │ │ movs r0, r0 │ │ - b.n d813c │ │ + b.n d814c │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r3, #19 │ │ - b.n d7b64 │ │ + b.n d7b74 │ │ movs r0, r0 │ │ - b.n d8148 │ │ + b.n d8158 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r0, #19 │ │ - b.n d7b70 │ │ + b.n d7b80 │ │ movs r0, r0 │ │ - b.n d8154 │ │ + b.n d8164 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r1, #18 │ │ - b.n d7b7c │ │ + b.n d7b8c │ │ movs r0, r0 │ │ - b.n d8160 │ │ + b.n d8170 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r2, #18 │ │ - b.n d7b88 │ │ + b.n d7b98 │ │ movs r0, r0 │ │ - b.n d816c │ │ + b.n d817c │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r2, #18 │ │ - b.n d7b94 │ │ + b.n d7ba4 │ │ movs r0, r0 │ │ - b.n d8178 │ │ + b.n d8188 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r1, #16 │ │ - b.n d7ba0 │ │ + b.n d7bb0 │ │ movs r0, r0 │ │ - b.n d8184 │ │ + b.n d8194 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r3, #16 │ │ - b.n d7bac │ │ + b.n d7bbc │ │ movs r0, r0 │ │ - b.n d8190 │ │ + b.n d81a0 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r4, #16 │ │ - b.n d7bb8 │ │ + b.n d7bc8 │ │ movs r0, r0 │ │ - b.n d819c │ │ + b.n d81ac │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r1, #16 │ │ - b.n d7bc4 │ │ + b.n d7bd4 │ │ movs r0, r0 │ │ - b.n d81a8 │ │ + b.n d81b8 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r6, #15 │ │ - b.n d7bd0 │ │ + b.n d7be0 │ │ movs r0, r0 │ │ - b.n d81b4 │ │ + b.n d81c4 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r4, #14 │ │ - b.n d7bdc │ │ + b.n d7bec │ │ movs r0, r0 │ │ - b.n d81c0 │ │ + b.n d81d0 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r6, #14 │ │ - b.n d7be8 │ │ + b.n d7bf8 │ │ movs r0, r0 │ │ - b.n d81cc │ │ + b.n d81dc │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r1, #17 │ │ - b.n d7bf4 │ │ + b.n d7c04 │ │ movs r0, r0 │ │ - b.n d81d8 │ │ + b.n d81e8 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r2, #14 │ │ - b.n d7c00 │ │ + b.n d7c10 │ │ movs r0, r0 │ │ - b.n d81e4 │ │ + b.n d81f4 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r0, #14 │ │ - b.n d7c0c │ │ + b.n d7c1c │ │ movs r0, r0 │ │ - b.n d81f0 │ │ + b.n d8200 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r1, #13 │ │ - b.n d7c18 │ │ + b.n d7c28 │ │ movs r0, r0 │ │ - b.n d81fc │ │ + b.n d820c │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r1, #14 │ │ - b.n d7c24 │ │ + b.n d7c34 │ │ movs r0, r0 │ │ - b.n d8208 │ │ + b.n d8218 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r6, #15 │ │ - b.n d7c30 │ │ + b.n d7c40 │ │ movs r0, r0 │ │ - b.n d8214 │ │ + b.n d8224 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r1, #12 │ │ - b.n d7c3c │ │ + b.n d7c4c │ │ movs r0, r0 │ │ - b.n d8220 │ │ + b.n d8230 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r6, #14 │ │ - b.n d7c48 │ │ + b.n d7c58 │ │ movs r0, r0 │ │ - b.n d822c │ │ + b.n d823c │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r2, #11 │ │ - b.n d7c54 │ │ + b.n d7c64 │ │ movs r0, r0 │ │ - b.n d8238 │ │ + b.n d8248 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r4, #12 │ │ - b.n d7c60 │ │ + b.n d7c70 │ │ movs r0, r0 │ │ - b.n d8244 │ │ + b.n d8254 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r4, #11 │ │ - b.n d7c6c │ │ + b.n d7c7c │ │ movs r0, r0 │ │ - b.n d8250 │ │ + b.n d8260 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r7, #10 │ │ - b.n d7c78 │ │ + b.n d7c88 │ │ movs r0, r0 │ │ - b.n d825c │ │ + b.n d826c │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r6, #14 │ │ - b.n d7c84 │ │ + b.n d7c94 │ │ movs r0, r0 │ │ - b.n d8268 │ │ + b.n d8278 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r2, #11 │ │ - b.n d7c90 │ │ + b.n d7ca0 │ │ movs r0, r0 │ │ - b.n d8274 │ │ + b.n d8284 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r7, #10 │ │ - b.n d7c9c │ │ + b.n d7cac │ │ movs r0, r0 │ │ - b.n d8280 │ │ + b.n d8290 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r6, #9 │ │ - b.n d7ca8 │ │ + b.n d7cb8 │ │ movs r0, r0 │ │ - b.n d828c │ │ + b.n d829c │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r5, #11 │ │ - b.n d7cb4 │ │ + b.n d7cc4 │ │ movs r0, r0 │ │ - b.n d8298 │ │ + b.n d82a8 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r5, #9 │ │ - b.n d7cc0 │ │ + b.n d7cd0 │ │ movs r0, r0 │ │ - b.n d82a4 │ │ + b.n d82b4 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r4, #10 │ │ - b.n d7ccc │ │ + b.n d7cdc │ │ movs r0, r0 │ │ - b.n d82b0 │ │ + b.n d82c0 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r1, #9 │ │ - b.n d7cd8 │ │ + b.n d7ce8 │ │ movs r0, r0 │ │ - b.n d82bc │ │ + b.n d82cc │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r6, #8 │ │ - b.n d7ce4 │ │ + b.n d7cf4 │ │ movs r0, r0 │ │ - b.n d82c8 │ │ + b.n d82d8 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r5, #8 │ │ - b.n d7cf0 │ │ + b.n d7d00 │ │ movs r0, r0 │ │ - b.n d82d4 │ │ + b.n d82e4 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r2, #12 │ │ - b.n d7cfc │ │ + b.n d7d0c │ │ movs r0, r0 │ │ - b.n d82e0 │ │ + b.n d82f0 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r5, #9 │ │ - b.n d7d08 │ │ + b.n d7d18 │ │ movs r0, r0 │ │ - b.n d82ec │ │ + b.n d82fc │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r4, #9 │ │ - b.n d7d14 │ │ + b.n d7d24 │ │ movs r0, r0 │ │ - b.n d82f8 │ │ + b.n d8308 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r6, #8 │ │ - b.n d7d20 │ │ + b.n d7d30 │ │ movs r0, r0 │ │ - b.n d8304 │ │ + b.n d8314 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r4, #7 │ │ - b.n d7d2c │ │ + b.n d7d3c │ │ movs r0, r0 │ │ - b.n d8310 │ │ + b.n d8320 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r7, #7 │ │ - b.n d7d38 │ │ + b.n d7d48 │ │ movs r0, r0 │ │ - b.n d831c │ │ + b.n d832c │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r0, #8 │ │ - b.n d7d44 │ │ + b.n d7d54 │ │ movs r0, r0 │ │ - b.n d8328 │ │ + b.n d8338 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r3, #7 │ │ - b.n d7d50 │ │ + b.n d7d60 │ │ movs r0, r0 │ │ - b.n d8334 │ │ + b.n d8344 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r0, #9 │ │ - b.n d7d5c │ │ + b.n d7d6c │ │ movs r0, r0 │ │ - b.n d8340 │ │ + b.n d8350 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r1, #9 │ │ - b.n d7d68 │ │ + b.n d7d78 │ │ movs r0, r0 │ │ - b.n d834c │ │ + b.n d835c │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r1, #9 │ │ - b.n d7d74 │ │ + b.n d7d84 │ │ movs r0, r0 │ │ - b.n d8358 │ │ + b.n d8368 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r3, #7 │ │ - b.n d7d80 │ │ + b.n d7d90 │ │ movs r0, r0 │ │ - b.n d8364 │ │ + b.n d8374 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r5, #8 │ │ - b.n d7d8c │ │ + b.n d7d9c │ │ movs r0, r0 │ │ - b.n d8370 │ │ + b.n d8380 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r7, #7 │ │ - b.n d7d98 │ │ + b.n d7da8 │ │ movs r0, r0 │ │ - b.n d837c │ │ + b.n d838c │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r6, #8 │ │ - b.n d7da4 │ │ + b.n d7db4 │ │ movs r0, r0 │ │ - b.n d8388 │ │ + b.n d8398 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r0, #7 │ │ - b.n d7db0 │ │ + b.n d7dc0 │ │ movs r0, r0 │ │ - b.n d8394 │ │ + b.n d83a4 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r5, #9 │ │ - b.n d7dbc │ │ + b.n d7dcc │ │ movs r0, r0 │ │ - b.n d83a0 │ │ + b.n d83b0 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r6, #5 │ │ - b.n d7dc8 │ │ + b.n d7dd8 │ │ movs r0, r0 │ │ - b.n d83ac │ │ + b.n d83bc │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r5, #5 │ │ - b.n d7dd4 │ │ + b.n d7de4 │ │ movs r0, r0 │ │ - b.n d83b8 │ │ + b.n d83c8 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r4, #6 │ │ - b.n d7de0 │ │ + b.n d7df0 │ │ movs r0, r0 │ │ - b.n d83c4 │ │ + b.n d83d4 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r3, #4 │ │ - b.n d7dec │ │ + b.n d7dfc │ │ movs r0, r0 │ │ - b.n d83d0 │ │ + b.n d83e0 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r4, #7 │ │ - b.n d7df8 │ │ + b.n d7e08 │ │ movs r0, r0 │ │ - b.n d83dc │ │ + b.n d83ec │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r7, #4 │ │ - b.n d7e04 │ │ + b.n d7e14 │ │ movs r0, r0 │ │ - b.n d83e8 │ │ + b.n d83f8 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r2, #6 │ │ - b.n d7e10 │ │ + b.n d7e20 │ │ movs r0, r0 │ │ - b.n d83f4 │ │ + b.n d8404 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r1, #7 │ │ - b.n d7e1c │ │ + b.n d7e2c │ │ movs r0, r0 │ │ - b.n d8400 │ │ + b.n d8410 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r1, #7 │ │ - b.n d7e28 │ │ + b.n d7e38 │ │ movs r0, r0 │ │ - b.n d840c │ │ + b.n d841c │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r0, #7 │ │ - b.n d7e34 │ │ + b.n d7e44 │ │ movs r0, r0 │ │ - b.n d8418 │ │ + b.n d8428 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r3, #7 │ │ - b.n d7e40 │ │ + b.n d7e50 │ │ movs r0, r0 │ │ - b.n d8424 │ │ + b.n d8434 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r0, #4 │ │ - b.n d7e4c │ │ + b.n d7e5c │ │ movs r0, r0 │ │ - b.n d8430 │ │ + b.n d8440 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r1, #6 │ │ - b.n d7e58 │ │ + b.n d7e68 │ │ movs r0, r0 │ │ - b.n d843c │ │ + b.n d844c │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r3, #6 │ │ - b.n d7e64 │ │ + b.n d7e74 │ │ movs r0, r0 │ │ - b.n d8448 │ │ + b.n d8458 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r7, #3 │ │ - b.n d7e70 │ │ + b.n d7e80 │ │ movs r0, r0 │ │ - b.n d8454 │ │ + b.n d8464 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r2, #5 │ │ - b.n d7e7c │ │ + b.n d7e8c │ │ movs r0, r0 │ │ - b.n d8460 │ │ + b.n d8470 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r0, #4 │ │ - b.n d7e88 │ │ + b.n d7e98 │ │ movs r0, r0 │ │ - b.n d846c │ │ + b.n d847c │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r4, #4 │ │ - b.n d7e94 │ │ + b.n d7ea4 │ │ movs r0, r0 │ │ - b.n d8478 │ │ + b.n d8488 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r5, #5 │ │ - b.n d7ea0 │ │ + b.n d7eb0 │ │ movs r0, r0 │ │ - b.n d8484 │ │ + b.n d8494 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r0, #5 │ │ - b.n d7eac │ │ + b.n d7ebc │ │ movs r0, r0 │ │ - b.n d8490 │ │ + b.n d84a0 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r2, #5 │ │ - b.n d7eb8 │ │ + b.n d7ec8 │ │ movs r0, r0 │ │ - b.n d849c │ │ + b.n d84ac │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r0, #4 │ │ - b.n d7ec4 │ │ + b.n d7ed4 │ │ movs r0, r0 │ │ - b.n d84a8 │ │ + b.n d84b8 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r4, #4 │ │ - b.n d7ed0 │ │ + b.n d7ee0 │ │ movs r0, r0 │ │ - b.n d84b4 │ │ + b.n d84c4 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r7, #4 │ │ - b.n d7edc │ │ + b.n d7eec │ │ movs r0, r0 │ │ - b.n d84c0 │ │ + b.n d84d0 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r0, #4 │ │ - b.n d7ee8 │ │ + b.n d7ef8 │ │ movs r0, r0 │ │ - b.n d84cc │ │ + b.n d84dc │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r0, r7, #4 │ │ - b.n d7ef4 │ │ + b.n d7f04 │ │ movs r0, r0 │ │ - b.n d84d8 │ │ + b.n d84e8 │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r0, #5 │ │ - b.n d7f00 │ │ + b.n d7f10 │ │ movs r0, r0 │ │ - b.n d84e4 │ │ + b.n d84f4 │ │ vrhadd.u16 d14, d14, d31 │ │ - subs r6, r4, r1 │ │ - vsubw.u q10, , d3 │ │ - vtbx.8 d20, {d19-d21}, d18 │ │ - vtbl.8 d18, {d19-d20}, d10 │ │ - @ instruction: 0xfff31cbf │ │ - vrshr.u32 d23, d19, #13 │ │ - @ instruction: 0xfff32ebe │ │ - vqshrun.s64 d19, q4, #13 │ │ - vrsra.u32 q8, q6, #13 │ │ - vqdmulh.s , , d22[0] │ │ - vcvt.f16.u16 , , #13 │ │ - vqshl.u32 d21, d13, #19 │ │ - vsri.64 q10, q13, #13 │ │ - @ instruction: 0xfff36ef4 │ │ - vtbl.8 d17, {d3-d4}, d13 │ │ - vtbl.8 d20, {d3}, d29 │ │ - vqshlu.s32 d19, d17, #19 │ │ - vmla.i q9, , d1[0] │ │ - vtbx.8 d21, {d19-d22}, d24 │ │ - vaddl.u , d19, d24 │ │ - vraddhn.i d17, , │ │ - vraddhn.i d17, , q4 │ │ - vaddw.u , , d22 │ │ - vcvt.f16.u16 d22, d31, #13 │ │ - vsli.32 q10, , #19 │ │ - vtbl.8 d23, {d3-d6}, d0 │ │ - vsri.32 d18, d14, #13 │ │ - vqshlu.s64 d16, d23, #51 @ 0x33 │ │ - vqshrn.u64 d17, , #13 │ │ - @ instruction: 0xfff34dfd │ │ - @ instruction: 0xfff3154b │ │ - @ instruction: 0xfff33a95 │ │ - vsubw.u q9, , d14 │ │ - vabal.u , d3, d21 │ │ - @ instruction: 0xfff30d0b │ │ - vmlsl.u , d19, d0[0] │ │ - vcvt.u32.f32 d20, d5, #13 │ │ - vtbl.8 d17, {d3-d6}, d1 │ │ - vqrdmlah.s q10, , d21[0] │ │ - vabdl.u , d3, d0 │ │ - vraddhn.i d22, , │ │ - vsli.32 q9, q1, #19 │ │ - vrshr.u64 , , #13 │ │ - vqrshrn.u64 d18, , #13 │ │ - @ instruction: 0xfff3614c │ │ - @ instruction: 0xfff37adf │ │ - vsra.u64 q12, , #13 │ │ - vrsubhn.i d19, , q8 │ │ - vrsra.u32 d22, d16, #13 │ │ - vcvt.f16.u16 q10, , #13 │ │ - vsubl.u , d19, d31 │ │ - @ instruction: 0xfff32af9 │ │ - @ instruction: 0xfff35c93 │ │ - vmlal.u , d3, d22[0] │ │ - vaddw.u , , d8 │ │ - @ instruction: 0xfff31895 │ │ - vrsra.u32 d17, d2, #13 │ │ - @ instruction: 0xfff35b52 │ │ - vrsubhn.i d23, , │ │ - vmlal.u , d3, d17[0] │ │ - vshr.u64 , , #13 │ │ - @ instruction: 0xfff33ebf │ │ - vqshl.u32 q8, , #19 │ │ - @ instruction: 0xfff37b13 │ │ - @ instruction: 0xfff34fa4 │ │ - @ instruction: 0xfff37adb │ │ - vshr.u64 d24, d3, #13 │ │ - vqshl.u64 , , #51 @ 0x33 │ │ - @ instruction: 0xfff31eac │ │ - vqshl.u64 q10, , #51 @ 0x33 │ │ - vqrdmulh.s q11, , d10[0] │ │ - vmlsl.u , d3, d4[0] │ │ - vrsra.u32 , , #13 │ │ - vaddw.u , , d3 │ │ - vshr.u64 d16, d31, #13 │ │ - @ instruction: 0xfff32b50 │ │ - vsri.64 q10, q10, #13 │ │ - vrshr.u32 d18, d20, #13 │ │ - vtbx.8 d17, {d3}, d13 │ │ - @ instruction: 0xfff31545 │ │ - @ instruction: 0xfff35fdf │ │ + subs r7, r2, r2 │ │ + vsubw.u q10, , d14 │ │ + @ instruction: 0xfff34af7 │ │ + @ instruction: 0xfff328f2 │ │ + @ instruction: 0xfff31d84 │ │ + vrsra.u32 , , #13 │ │ + vqrdmulh.s q9, , d29[0] │ │ + vqshl.u64 , q12, #51 @ 0x33 │ │ + vrsra.u64 d16, d14, #13 │ │ + @ instruction: 0xfff31dab │ │ + vcvt.u16.f16 d17, d14, #13 │ │ + @ instruction: 0xfff357ea │ │ + vabal.u q10, d3, d5 │ │ + vshr.u32 , , #13 │ │ + vtbx.8 d17, {d19-d20}, d16 │ │ + vtbx.8 d20, {d3}, d2 │ │ + vqshlu.s32 d19, d1, #19 │ │ + vsra.u32 d18, d6, #13 │ │ + vqdmulh.s , , d12[0] │ │ + vqrdmlsh.s q8, , d2[0] │ │ + vsri.32 d17, d18, #13 │ │ + vsri.64 d17, d25, #13 │ │ + vmlal.u , d19, d12[0] │ │ + vqrdmulh.s q11, , d1[0] │ │ + @ instruction: 0xfff34568 │ │ + vtbx.8 d23, {d3-d6}, d0 │ │ + vmls.i q9, , d5[0] │ │ + vqshlu.s64 q8, , #51 @ 0x33 │ │ + vtbl.8 d17, {d3-d5}, d8 │ │ + vcvt.f32.u32 q10, q8, #13 │ │ + vsli.32 , q14, #19 │ │ + vtbx.8 d19, {d19-d21}, d10 │ │ + vrsra.u32 d18, d21, #13 │ │ + vsli.64 , q12, #51 @ 0x33 │ │ + vdup.8 q8, d6[1] │ │ + vabdl.u , d19, d13 │ │ + @ instruction: 0xfff34f88 │ │ + @ instruction: 0xfff31bd4 │ │ + @ instruction: 0xfff34ed8 │ │ + @ instruction: 0xfff357cd │ │ + vqshlu.s32 q11, , #19 │ │ + vsli.32 q9, , #19 │ │ + vraddhn.i d21, , │ │ + @ instruction: 0xfff328b9 │ │ + vsra.u64 q11, , #13 │ │ + @ instruction: 0xfff37b1f │ │ + @ instruction: 0xfff381c3 │ │ + vrsubhn.i d19, , q0 │ │ + vrsra.u64 d22, d21, #13 │ │ + vqdmulh.s q10, , d12[0] │ │ + vmlal.u , d19, d16[0] │ │ + vtbx.8 d18, {d3-d5}, d17 │ │ + vcvt.u16.f16 , , #13 │ │ + vaddw.u , , d21 │ │ + vsubl.u , d19, d7 │ │ + vtbx.8 d17, {d3-d4}, d24 │ │ + @ instruction: 0xfff31343 │ │ + vcvt.f16.u16 d21, d22, #13 │ │ + vrsubhn.i d23, , │ │ + vrshr.u64 d17, d2, #13 │ │ + vsubl.u , d3, d9 │ │ + @ instruction: 0xfff33e81 │ │ + vqshl.u64 d16, d29, #51 @ 0x33 │ │ + @ instruction: 0xfff37b53 │ │ + vshr.u32 d21, d7, #13 │ │ + @ instruction: 0xfff37b1b │ │ + vaddl.u q12, d19, d3 │ │ + vqshl.u64 , , #51 @ 0x33 │ │ + @ instruction: 0xfff31f81 │ │ + vtbl.8 d20, {d3}, d10 │ │ + vqrdmlah.s q11, , d12[0] │ │ + vrsubhn.i d19, , q10 │ │ + vsubw.u , , d26 │ │ + vshr.u64 d17, d13, #13 │ │ + vaddw.u q8, , d1 │ │ + @ instruction: 0xfff32ab8 │ │ + vsri.64 q10, , #13 │ │ + vsubw.u q9, , d9 │ │ + vtbl.8 d17, {d3-d4}, d16 │ │ + vsli.32 , q11, #19 │ │ + vmla.i q11, , d20[0] │ │ vcvt.f16.u16 d20, d0, #13 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n d8a30 │ │ + b.n d8a40 │ │ asrs r0, r6, #32 │ │ - b.n d8058 │ │ + b.n d8068 │ │ movs r0, #48 @ 0x30 │ │ - b.n d805c │ │ + b.n d806c │ │ adds r0, #48 @ 0x30 │ │ - b.n d8060 │ │ + b.n d8070 │ │ asrs r1, r0, #32 │ │ - b.n d8644 │ │ + b.n d8654 │ │ movs r4, r5 │ │ - b.n d8068 │ │ + b.n d8078 │ │ movs r0, #2 │ │ - b.n d864c │ │ + b.n d865c │ │ adds r0, #3 │ │ - b.n d8650 │ │ + b.n d8660 │ │ movs r0, r0 │ │ - b.n d8474 │ │ + b.n d8484 │ │ lsls r0, r5 │ │ - b.n d8a3a │ │ + b.n d8a4a │ │ movs r4, r0 │ │ - b.n d887e │ │ + b.n d888e │ │ lsls r3, r3, #8 │ │ add.w r0, r0, r4 │ │ - b.n d8886 │ │ + b.n d8896 │ │ lsls r5, r2, #8 │ │ add.w r1, r0, ip, rrx │ │ - add.w r3, r0, fp, lsl #1 │ │ - vrshr.u32 d19, d0, #13 │ │ - @ instruction: 0xfff32afd │ │ + add.w r3, r0, sp, lsl #2 │ │ + vsra.u64 , q8, #13 │ │ + vtbl.8 d18, {d3-d5}, d28 │ │ @ instruction: 0xfff3414c │ │ movs r0, r0 │ │ - ldr r4, [pc, #64] @ (d85a0 ) │ │ + ldr r4, [pc, #64] @ (d85b0 ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ - b.n d8a80 │ │ + b.n d8a90 │ │ asrs r0, r6, #32 │ │ - b.n d80a8 │ │ + b.n d80b8 │ │ movs r0, #48 @ 0x30 │ │ - b.n d80ac │ │ + b.n d80bc │ │ adds r0, #48 @ 0x30 │ │ - b.n d80b0 │ │ + b.n d80c0 │ │ asrs r1, r0, #32 │ │ - b.n d8694 │ │ + b.n d86a4 │ │ movs r4, r5 │ │ - b.n d80b8 │ │ + b.n d80c8 │ │ movs r0, #2 │ │ - b.n d869c │ │ + b.n d86ac │ │ adds r0, #3 │ │ - b.n d86a0 │ │ + b.n d86b0 │ │ movs r0, r0 │ │ - b.n d84c4 │ │ + b.n d84d4 │ │ lsls r0, r5 │ │ - b.n d8a8a │ │ + b.n d8a9a │ │ movs r4, r0 │ │ - b.n d88ce │ │ + b.n d88de │ │ lsls r7, r0, #8 │ │ add.w r0, r0, r4 │ │ - b.n d88d6 │ │ + b.n d88e6 │ │ lsls r1, r0, #8 │ │ add.w r1, r0, r8, asr #32 │ │ - add.w r2, r0, fp, ror #3 │ │ - @ instruction: 0xfff318f4 │ │ - vsra.u64 q11, , #13 │ │ + add.w r3, r0, sp, rrx │ │ + @ instruction: 0xfff319b9 │ │ + @ instruction: 0xfff363c9 │ │ vshr.u64 q10, q14, #13 │ │ movs r0, r0 │ │ - ldr r5, [pc, #960] @ (d8970 ) │ │ + ldr r5, [pc, #960] @ (d8980 ) │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ - b.n d8ad0 │ │ + b.n d8ae0 │ │ svc 214 @ 0xd6 │ │ - b.n d8a54 │ │ + b.n d8a64 │ │ str r0, [r0, #8] │ │ - b.n d8ad8 │ │ + b.n d8ae8 │ │ str r0, [r0, r0] │ │ - b.n d8902 │ │ + b.n d8912 │ │ ands r1, r0 │ │ - b.n d8906 │ │ + b.n d8916 │ │ movs r6, r0 │ │ - b.n d890a │ │ + b.n d891a │ │ lsls r0, r0, #1 │ │ add.w lr, r0, sl, lsr #28 │ │ - b.n d8a68 │ │ + b.n d8a78 │ │ asrs r6, r0, #32 │ │ - b.n d8916 │ │ + b.n d8926 │ │ movs r7, r0 │ │ - b.n d891a │ │ + b.n d892a │ │ @ instruction: 0xfa80ebff │ │ lsls r0, r2, #1 │ │ movt r0, #40 @ 0x28 │ │ - b.n d8b00 │ │ + b.n d8b10 │ │ movs r0, r1 │ │ - b.n d8aea │ │ + b.n d8afa │ │ asrs r5, r1, #32 │ │ - b.n d892e │ │ + b.n d893e │ │ lsrs r5, r1, #11 │ │ orr.w sl, r0, #6717440 @ 0x668000 │ │ orr.w sl, r0, #6717440 @ 0x668000 │ │ orr.w sl, r0, #6717440 @ 0x668000 │ │ orr.w sl, r0, #6782976 @ 0x678000 │ │ orr.w lr, r0, #13959168 @ 0xd50000 │ │ - b.n d8c0e │ │ + b.n d8c1e │ │ lsls r7, r2, #1 │ │ - b.n d8c8a │ │ + b.n d8c9a │ │ movs r4, r5 │ │ - b.n d8128 │ │ + b.n d8138 │ │ lsrs r3, r0, #17 │ │ - b.n d8c1a │ │ + b.n d8c2a │ │ lsls r6, r1, #29 │ │ - b.n d8c9e │ │ + b.n d8cae │ │ movs r0, r5 │ │ - b.n d8134 │ │ + b.n d8144 │ │ movs r7, r0 │ │ - b.n d895e │ │ + b.n d896e │ │ @ instruction: 0xfb24ebff │ │ movs r0, r0 │ │ - b.n d8cc6 │ │ + b.n d8cd6 │ │ movs r2, r0 │ │ lsrs r0, r0, #8 │ │ movs r5, r0 │ │ - b.n d8d6e │ │ - beq.n d8660 │ │ - b.n d8ac8 │ │ + b.n d8d7e │ │ + beq.n d8670 │ │ + b.n d8ad8 │ │ ldrh r0, [r6, #46] @ 0x2e │ │ ldmia.w sp!, {r3, r5, sp, lr} │ │ - b.n d8b54 │ │ + b.n d8b64 │ │ strh r5, [r1, #0] │ │ - b.n d897e │ │ + b.n d898e │ │ adds r0, #12 │ │ - b.n d817c │ │ + b.n d818c │ │ movs r0, r0 │ │ - b.n d8180 │ │ + b.n d8190 │ │ asrs r4, r2, #32 │ │ - b.n d8184 │ │ + b.n d8194 │ │ movs r0, r0 │ │ - b.n d8cf4 │ │ + b.n d8d04 │ │ movs r0, #32 │ │ - b.n d818c │ │ + b.n d819c │ │ movs r0, #116 @ 0x74 │ │ - b.n d8170 │ │ + b.n d8180 │ │ lsls r0, r6, #1 │ │ - b.n d8174 │ │ + b.n d8184 │ │ asrs r0, r7, #1 │ │ - b.n d8178 │ │ + b.n d8188 │ │ @ instruction: 0xfff10aff │ │ movs r0, r1 │ │ - b.n d8da6 │ │ + b.n d8db6 │ │ asrs r6, r0, #32 │ │ - b.n d89aa │ │ + b.n d89ba │ │ movs r0, #7 │ │ - b.n d89ae │ │ + b.n d89be │ │ vrhadd.u d14, d3, d31 │ │ movs r0, r1 │ │ - b.n d8d16 │ │ + b.n d8d26 │ │ @ instruction: 0xffeb1aff │ │ movs r7, r0 │ │ - b.n d89be │ │ + b.n d89ce │ │ asrs r4, r0, #32 │ │ - b.n d89c2 │ │ + b.n d89d2 │ │ vrhadd.u d14, d5, d31 │ │ movs r0, r0 │ │ - b.n d8d2a │ │ + b.n d8d3a │ │ @ instruction: 0xffe71aff │ │ movs r7, r0 │ │ - b.n d89d2 │ │ + b.n d89e2 │ │ asrs r0, r1, #32 │ │ - b.n d89d6 │ │ + b.n d89e6 │ │ @ instruction: 0xfb06ebff │ │ movs r0, r0 │ │ - b.n d8d3e │ │ + b.n d8d4e │ │ @ instruction: 0xffe60aff │ │ @ instruction: 0xffe0eaff │ │ - b.n d86a8 │ │ - b.n d89ea │ │ + b.n d86b8 │ │ + b.n d89fa │ │ subs r7, r7, #7 │ │ ldmia.w lr, {r2, r4, r5, ip, lr, pc} │ │ - b.n d81ee │ │ - b.n d872c │ │ - b.n d81f2 │ │ + b.n d81fe │ │ + b.n d873c │ │ + b.n d8202 │ │ vrhadd.u16 d14, d14, d31 │ │ lsrs r0, r4, #12 │ │ ldc 15, cr15, [r0], {30} │ │ - b.n d8920 │ │ + b.n d8930 │ │ lsrs r0, r4, #12 │ │ ldc 15, cr15, [r0], {30} │ │ - b.n d8928 │ │ + b.n d8938 │ │ lsrs r0, r4, #12 │ │ ldcl 15, cr15, [r0], {30} │ │ - b.n d8930 │ │ + b.n d8940 │ │ subs r7, r7, #7 │ │ stmia.w r0, {r2, r4, r5, ip, lr, pc} │ │ - b.n d81da │ │ - b.n d874c │ │ - b.n d81de │ │ - b.n d8758 │ │ - b.n d81e2 │ │ + b.n d81ea │ │ + b.n d875c │ │ + b.n d81ee │ │ + b.n d8768 │ │ + b.n d81f2 │ │ movs r0, r0 │ │ - b.n d8e26 │ │ + b.n d8e36 │ │ vrhadd.u16 d14, d14, d31 │ │ lsrs r0, r4, #12 │ │ stc 15, cr15, [r0], {30} │ │ - b.n d8950 │ │ + b.n d8960 │ │ lsrs r0, r4, #12 │ │ stc 15, cr15, [r0], {30} │ │ - b.n d8958 │ │ + b.n d8968 │ │ lsrs r0, r4, #12 │ │ stcl 15, cr15, [r0], {30} │ │ - b.n d8960 │ │ + b.n d8970 │ │ movw ip, #196 @ 0xc4 │ │ movt ip, #0 │ │ add ip, pc │ │ bx ip │ │ movw ip, #168 @ 0xa8 │ │ movt ip, #0 │ │ add ip, pc │ │ bx ip │ │ movw ip, #284 @ 0x11c │ │ movt ip, #0 │ │ add ip, pc │ │ bx ip │ │ - movw ip, #192 @ 0xc0 │ │ + movw ip, #208 @ 0xd0 │ │ movt ip, #0 │ │ add ip, pc │ │ bx ip │ │ movw ip, #308 @ 0x134 │ │ movt ip, #0 │ │ add ip, pc │ │ bx ip │ │ - movw ip, #17084 @ 0x42bc │ │ + movw ip, #17080 @ 0x42b8 │ │ movt ip, #65532 @ 0xfffc │ │ add ip, pc │ │ bx ip │ │ movw ip, #65032 @ 0xfe08 │ │ movt ip, #65535 @ 0xffff │ │ add ip, pc │ │ bx ip │ │ movw ip, #64940 @ 0xfdac │ │ movt ip, #65535 @ 0xffff │ │ add ip, pc │ │ bx ip │ │ - ldmia r4, {r0, r1, r2, r4, r6} │ │ - b.n d8d7e │ │ + ldmia r3, {r0, r1, r3, r5, r6} │ │ + b.n d8d8e │ │ ldmia r7, {r0, r1, r2, r3, r4, r5, r6, r7} │ │ - b.n d8e08 │ │ + b.n d8e18 │ │ stmia r0!, {r0, r1, r2, r3} │ │ - b.n d8886 │ │ + b.n d8896 │ │ vrhadd.u16 d14, d12, d31 │ ├── objdump --line-numbers --disassemble --demangle --reloc --no-show-raw-insn --section=.plt {} │ │ @@ -1,13 +1,13 @@ │ │ │ │ │ │ │ │ Disassembly of section .plt: │ │ │ │ -000d8770 <.plt>: │ │ +000d8780 <.plt>: │ │ push {lr} @ (str lr, [sp, #-4]!) │ │ add lr, pc, #0, 12 │ │ add lr, lr, #12288 @ 0x3000 │ │ ldr pc, [lr, #3872]! @ 0xf20 │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ ├── readelf --wide --decompress --hex-dump=.data.rel.ro {} │ │ @@ -1,620 +1,620 @@ │ │ │ │ Hex dump of section '.data.rel.ro': │ │ - 0x000d9f10 109f0d00 731f0300 20000000 08000000 ....s... ....... │ │ - 0x000d9f20 e1360200 d8fa0000 55000000 b2010000 .6......U....... │ │ - 0x000d9f30 0e000000 00000000 38000000 08000000 ........8....... │ │ - 0x000d9f40 71360200 00000000 10000000 08000000 q6.............. │ │ - 0x000d9f50 99350200 28d90000 23000000 11000000 .5..(...#....... │ │ - 0x000d9f60 2a000000 28d90000 23000000 14000000 *...(...#....... │ │ - 0x000d9f70 18000000 eccf0000 61000000 bb020000 ........a....... │ │ - 0x000d9f80 25000000 eccf0000 61000000 bb020000 %.......a....... │ │ - 0x000d9f90 3c000000 eccf0000 61000000 bd020000 <.......a....... │ │ - 0x000d9fa0 22000000 47fe0000 50000000 91010000 "...G...P....... │ │ - 0x000d9fb0 2d000000 f1ab0000 51000000 f3000000 -.......Q....... │ │ - 0x000d9fc0 43000000 43ac0000 51000000 a8000000 C...C...Q....... │ │ - 0x000d9fd0 2b000000 43ac0000 51000000 af000000 +...C...Q....... │ │ - 0x000d9fe0 2d000000 43ac0000 51000000 c5000000 -...C...Q....... │ │ - 0x000d9ff0 26000000 43ac0000 51000000 c7000000 &...C...Q....... │ │ - 0x000da000 27000000 43ac0000 51000000 c7000000 '...C...Q....... │ │ - 0x000da010 49000000 43ac0000 51000000 c8000000 I...C...Q....... │ │ - 0x000da020 47000000 43ac0000 51000000 cc000000 G...C...Q....... │ │ - 0x000da030 27000000 43ac0000 51000000 cc000000 '...C...Q....... │ │ - 0x000da040 49000000 43ac0000 51000000 cd000000 I...C...Q....... │ │ - 0x000da050 47000000 84f50000 52000000 61010000 G.......R...a... │ │ - 0x000da060 2a000000 84f50000 52000000 63010000 *.......R...c... │ │ - 0x000da070 37000000 771b0300 0c000000 04000000 7...w........... │ │ - 0x000da080 8b290300 dd280300 09750200 00000000 .)...(...u...... │ │ - 0x000da090 00000000 01000000 c9280300 f5180300 .........(...... │ │ - 0x000da0a0 08000000 04000000 f53f0300 35eb0600 .........?..5... │ │ - 0x000da0b0 08000000 04000000 81eb0600 df1a0300 ................ │ │ - 0x000da0c0 0c000000 04000000 f53f0300 051e0300 .........?...... │ │ - 0x000da0d0 10000000 04000000 09340300 151e0300 .........4...... │ │ - 0x000da0e0 10000000 04000000 3d340300 05890900 ........=4...... │ │ - 0x000da0f0 08000000 04000000 81eb0600 00000000 ................ │ │ - 0x000da100 00000000 01000000 f5330300 d17f0500 .........3...... │ │ - 0x000da110 04000000 04000000 6d5c0700 72810000 ........m\..r... │ │ - 0x000da120 2f000000 26000000 12000000 00000000 /...&........... │ │ - 0x000da130 18000000 08000000 f1f60200 57b70000 ............W... │ │ - 0x000da140 21000000 57000000 26000000 57b70000 !...W...&...W... │ │ - 0x000da150 21000000 5a000000 35000000 59190300 !...Z...5...Y... │ │ - 0x000da160 10000000 08000000 39f40200 57b70000 ........9...W... │ │ - 0x000da170 21000000 74000000 38000000 15190300 !...t...8....... │ │ - 0x000da180 18000000 08000000 01ca0200 57b70000 ............W... │ │ - 0x000da190 21000000 86000000 2f000000 57b70000 !......./...W... │ │ - 0x000da1a0 21000000 a4000000 2f000000 57b70000 !......./...W... │ │ - 0x000da1b0 21000000 12000000 18000000 00000000 !............... │ │ - 0x000da1c0 04000000 04000000 6d8f0200 00000000 ........m....... │ │ - 0x000da1d0 08000000 04000000 01cd0200 00000000 ................ │ │ - 0x000da1e0 10000000 08000000 cdcb0200 d5170300 ................ │ │ - 0x000da1f0 28000000 08000000 25950200 00000000 (.......%....... │ │ - 0x000da200 08000000 04000000 f5f50200 00000000 ................ │ │ - 0x000da210 08000000 04000000 65cc0200 00000000 ........e....... │ │ - 0x000da220 0c000000 04000000 6d940200 00000000 ........m....... │ │ - 0x000da230 10000000 04000000 19a60200 00000000 ................ │ │ - 0x000da240 14000000 04000000 1dee0200 19180300 ................ │ │ - 0x000da250 20000000 08000000 89ce0200 00000000 ............... │ │ - 0x000da260 10000000 08000000 b1940200 19180300 ................ │ │ - 0x000da270 20000000 08000000 8ff60200 27180300 ...........'... │ │ - 0x000da280 20000000 08000000 5dc20200 00000000 .......]....... │ │ - 0x000da290 10000000 08000000 85ed0200 27180300 ............'... │ │ - 0x000da2a0 20000000 08000000 01c10200 00000000 ............... │ │ - 0x000da2b0 08000000 04000000 c5a50200 00000000 ................ │ │ - 0x000da2c0 08000000 04000000 79c00200 44c60000 ........y...D... │ │ - 0x000da2d0 22000000 06000000 2e000000 00000000 "............... │ │ - 0x000da2e0 20000000 08000000 218f0200 0b180300 .......!....... │ │ - 0x000da2f0 18000000 08000000 edc30200 00000000 ................ │ │ - 0x000da300 18000000 08000000 5df60200 00000000 ........]....... │ │ - 0x000da310 28000000 08000000 3f760200 00000000 (.......?v...... │ │ - 0x000da320 20000000 08000000 1bcc0200 00000000 ............... │ │ - 0x000da330 0c000000 04000000 f9770200 00000000 .........w...... │ │ - 0x000da340 10000000 04000000 a5a60200 00000000 ................ │ │ - 0x000da350 18000000 04000000 e9ce0200 4cd90000 ............L... │ │ - 0x000da360 23000000 c8000000 38000000 8cab0000 #.......8....... │ │ - 0x000da370 24000000 71010000 01000000 8cab0000 $...q........... │ │ - 0x000da380 24000000 70010000 01000000 8cab0000 $...p........... │ │ - 0x000da390 24000000 6f010000 01000000 8cab0000 $...o........... │ │ - 0x000da3a0 24000000 6e010000 01000000 58a20000 $...n.......X... │ │ - 0x000da3b0 26000000 2c000000 25000000 58a20000 &...,...%...X... │ │ - 0x000da3c0 26000000 2c000000 2e000000 58a20000 &...,.......X... │ │ - 0x000da3d0 26000000 2d000000 25000000 58a20000 &...-...%...X... │ │ - 0x000da3e0 26000000 2e000000 33000000 58a20000 &.......3...X... │ │ - 0x000da3f0 26000000 2e000000 3c000000 00000000 &.......<....... │ │ - 0x000da400 04000000 04000000 79ed0200 00000000 ........y....... │ │ - 0x000da410 0c000000 04000000 19750200 58a20000 .........u..X... │ │ - 0x000da420 26000000 a7000000 27000000 58a20000 &.......'...X... │ │ - 0x000da430 26000000 a7000000 30000000 aba60000 &.......0....... │ │ - 0x000da440 50000000 bc000000 01000000 fb200100 P............ .. │ │ - 0x000da450 3c000000 eccf0000 61000000 88010000 <.......a....... │ │ - 0x000da460 15000000 eccf0000 61000000 a9010000 ........a....... │ │ - 0x000da470 24000000 eccf0000 61000000 a9010000 $.......a....... │ │ - 0x000da480 3b000000 eccf0000 61000000 b1010000 ;.......a....... │ │ - 0x000da490 22000000 00000000 0c000000 04000000 "............... │ │ - 0x000da4a0 a5750200 51660300 00000000 0c000000 .u..Qf.......... │ │ - 0x000da4b0 04000000 29760200 d9660300 00000000 ....)v...f...... │ │ - 0x000da4c0 0c000000 04000000 0fa60200 f1660300 .............f.. │ │ - 0x000da4d0 28d90000 23000000 3c000000 1e000000 (...#...<....... │ │ - 0x000da4e0 28d90000 23000000 3f000000 28000000 (...#...?...(... │ │ - 0x000da4f0 58a20000 26000000 be000000 3d000000 X...&.......=... │ │ - 0x000da500 58a20000 26000000 c2000000 09000000 X...&........... │ │ - 0x000da510 58a20000 26000000 7d000000 25000000 X...&...}...%... │ │ - 0x000da520 7f840000 22000000 f6000000 27000000 ....".......'... │ │ - 0x000da530 67c60000 27000000 3c000000 23000000 g...'...<...#... │ │ - 0x000da540 67c60000 27000000 46000000 23000000 g...'...F...#... │ │ - 0x000da550 67c60000 27000000 56000000 2c000000 g...'...V...,... │ │ - 0x000da560 4cd90000 23000000 c1000000 27000000 L...#.......'... │ │ - 0x000da570 00000000 08000000 08000000 b1c30200 ................ │ │ - 0x000da580 8d280300 8d280300 05df0000 27000000 .(...(......'... │ │ - 0x000da590 a6000000 24000000 00000000 00000000 ....$........... │ │ - 0x000da5a0 01000000 fde10300 11e20300 0c000000 ................ │ │ - 0x000da5b0 04000000 1fe20300 5de20300 11e30300 ........]....... │ │ - 0x000da5c0 b2fe0000 48000000 8a020000 0e000000 ....H........... │ │ - 0x000da5d0 e38d0000 48000000 9f010000 3f000000 ....H.......?... │ │ - 0x000da5e0 e38d0000 48000000 a0010000 33000000 ....H.......3... │ │ - 0x000da5f0 9eed0000 50000000 1c000000 05000000 ....P........... │ │ - 0x000da600 c1bb0000 4b000000 7e0b0000 26000000 ....K...~...&... │ │ - 0x000da610 c1bb0000 4b000000 870b0000 1a000000 ....K........... │ │ - 0x000da620 00000000 0c000000 04000000 2d0a0400 ............-... │ │ - 0x000da630 a10b0400 ed0b0400 e9c70000 4f000000 ............O... │ │ - 0x000da640 66060000 15000000 e9c70000 4f000000 f...........O... │ │ - 0x000da650 94060000 15000000 e9c70000 4f000000 ............O... │ │ - 0x000da660 95060000 15000000 e9c70000 4f000000 ............O... │ │ - 0x000da670 73050000 28000000 e9c70000 4f000000 s...(.......O... │ │ - 0x000da680 73050000 12000000 05960000 5f000000 s..........._... │ │ - 0x000da690 5c030000 05000000 b89b0000 55000000 \...........U... │ │ - 0x000da6a0 0a000000 2b000000 b89b0000 55000000 ....+.......U... │ │ - 0x000da6b0 1a000000 36000000 00000000 04000000 ....6........... │ │ - 0x000da6c0 04000000 11100400 2c8e0000 4d000000 ........,...M... │ │ - 0x000da6d0 e1000000 05000000 2c8e0000 4d000000 ........,...M... │ │ - 0x000da6e0 e9000000 05000000 95880000 4d000000 ............M... │ │ - 0x000da6f0 8b000000 23000000 95880000 4d000000 ....#.......M... │ │ - 0x000da700 84000000 2b000000 a2840000 2a000000 ....+.......*... │ │ - 0x000da710 aa010000 11000000 a2840000 2a000000 ............*... │ │ - 0x000da720 c3010000 34000000 eda50000 2a000000 ....4.......*... │ │ - 0x000da730 25000000 28000000 8ad40000 5f000000 %...(......._... │ │ - 0x000da740 a1000000 24000000 00000000 00000000 ....$........... │ │ - 0x000da750 01000000 21f60500 01cb0000 56000000 ....!.......V... │ │ - 0x000da760 a2040000 22000000 01cb0000 56000000 ....".......V... │ │ - 0x000da770 98040000 26000000 b4620100 1c000000 ....&....b...... │ │ - 0x000da780 00000000 08000000 04000000 1d4f0700 .............O.. │ │ - 0x000da790 18a60000 5f000000 69000000 2b000000 ...._...i...+... │ │ - 0x000da7a0 18a60000 5f000000 04010000 2b000000 ...._.......+... │ │ - 0x000da7b0 18a60000 5f000000 df000000 2f000000 ...._......./... │ │ - 0x000da7c0 58cb0000 66000000 15010000 43000000 X...f.......C... │ │ - 0x000da7d0 bfcb0000 66000000 67010000 2b000000 ....f...g...+... │ │ - 0x000da7e0 bfcb0000 66000000 c1000000 36000000 ....f.......6... │ │ - 0x000da7f0 bfcb0000 66000000 ba000000 36000000 ....f.......6... │ │ - 0x000da800 bfcb0000 66000000 17010000 2b000000 ....f.......+... │ │ - 0x000da810 bfcb0000 66000000 ca000000 2b000000 ....f.......+... │ │ - 0x000da820 bfcb0000 66000000 d1000000 2d000000 ....f.......-... │ │ - 0x000da830 04620100 04000000 54620100 04000000 .b......Tb...... │ │ - 0x000da840 ec620100 03000000 ef620100 05000000 .b.......b...... │ │ - 0x000da850 74630100 08000000 14620100 04000000 tc.......b...... │ │ - 0x000da860 9c630100 06000000 a2630100 06000000 .c.......c...... │ │ - 0x000da870 a8630100 06000000 3c630100 08000000 .c.........O... │ │ - 0x000db130 b1ab0000 2f000000 31010000 12000000 ..../...1....... │ │ - 0x000db140 b1ab0000 2f000000 c9000000 2b000000 ..../.......+... │ │ - 0x000db150 b1ab0000 2f000000 3b000000 45000000 ..../...;...E... │ │ - 0x000db160 b1ab0000 2f000000 0f010000 1a000000 ..../........... │ │ - 0x000db170 78a60000 32000000 68000000 2c000000 x...2...h...,... │ │ - 0x000db180 bdc60000 22000000 fe000000 36000000 ....".......6... │ │ - 0x000db190 b50c0600 10000000 04000000 df0c0600 ................ │ │ - 0x000db1a0 7d120600 98000000 08000000 a5120600 }............... │ │ - 0x000db1b0 00000000 10000000 08000000 89110600 ................ │ │ - 0x000db1c0 05190600 20000000 08000000 25190600 .... .......%... │ │ - 0x000db1d0 00000000 18000000 08000000 21180600 ............!... │ │ - 0x000db1e0 bdc60000 22000000 55000000 25000000 ...."...U...%... │ │ - 0x000db1f0 bdc60000 22000000 42010000 2e000000 ...."...B....... │ │ - 0x000db200 7d210600 18000000 08000000 9d210600 }!...........!.. │ │ - 0x000db210 00000000 10000000 08000000 fd200600 ............. .. │ │ - 0x000db220 bdc60000 22000000 35000000 2a000000 ...."...5...*... │ │ - 0x000db230 bdc60000 22000000 de000000 3a000000 ....".......:... │ │ - 0x000db240 00000000 0c000000 04000000 cdd40600 ................ │ │ - 0x000db250 19d50600 00000000 0c000000 04000000 ................ │ │ - 0x000db260 69140600 75140600 e3c10000 55000000 i...u.......U... │ │ - 0x000db270 29050000 19000000 aba60000 50000000 )...........P... │ │ - 0x000db280 4c010000 01000000 e8f90000 39000000 L...........9... │ │ - 0x000db290 20000000 09000000 e8f90000 39000000 ...........9... │ │ - 0x000db2a0 2a000000 13000000 ebc60000 30000000 *...........0... │ │ - 0x000db2b0 6b060000 1a000000 ebc60000 30000000 k...........0... │ │ - 0x000db2c0 6b060000 36000000 ebc60000 30000000 k...6.......0... │ │ - 0x000db2d0 5e060000 28000000 ebc60000 30000000 ^...(.......0... │ │ - 0x000db2e0 73070000 3e000000 ebc60000 30000000 s...>.......0... │ │ - 0x000db2f0 d9070000 4d000000 ebc60000 30000000 ....M.......0... │ │ - 0x000db300 3c060000 2d000000 ebc60000 30000000 <...-.......0... │ │ - 0x000db310 3c060000 19000000 ebc60000 30000000 <...........0... │ │ - 0x000db320 84060000 20000000 ebc60000 30000000 .... .......0... │ │ - 0x000db330 11020000 28000000 ebc60000 30000000 ....(.......0... │ │ - 0x000db340 86020000 1d000000 ebc60000 30000000 ............0... │ │ - 0x000db350 22040000 14000000 ebc60000 30000000 "...........0... │ │ - 0x000db360 23040000 12000000 ebc60000 30000000 #...........0... │ │ - 0x000db370 36040000 0d000000 ebc60000 30000000 6...........0... │ │ - 0x000db380 37040000 0d000000 ebc60000 30000000 7...........0... │ │ - 0x000db390 39040000 22000000 ebc60000 30000000 9...".......0... │ │ - 0x000db3a0 3a040000 26000000 ebc60000 30000000 :...&.......0... │ │ - 0x000db3b0 3b040000 26000000 ebc60000 30000000 ;...&.......0... │ │ - 0x000db3c0 44040000 23000000 ebc60000 30000000 D...#.......0... │ │ - 0x000db3d0 44040000 0e000000 ebc60000 30000000 D...........0... │ │ - 0x000db3e0 46040000 0d000000 ebc60000 30000000 F...........0... │ │ - 0x000db3f0 47040000 0d000000 ebc60000 30000000 G...........0... │ │ - 0x000db400 48040000 22000000 ebc60000 30000000 H...".......0... │ │ - 0x000db410 48040000 0d000000 ebc60000 30000000 H...........0... │ │ - 0x000db420 4c040000 0d000000 ebc60000 30000000 L...........0... │ │ - 0x000db430 4d040000 0d000000 ebc60000 30000000 M...........0... │ │ - 0x000db440 4e040000 22000000 ebc60000 30000000 N...".......0... │ │ - 0x000db450 4e040000 0d000000 ebc60000 30000000 N...........0... │ │ - 0x000db460 4f040000 26000000 ebc60000 30000000 O...&.......0... │ │ - 0x000db470 4f040000 0d000000 ebc60000 30000000 O...........0... │ │ - 0x000db480 2c040000 17000000 4ed00000 59000000 ,.......N...Y... │ │ - 0x000db490 a1000000 36000000 4ed00000 59000000 ....6...N...Y... │ │ - 0x000db4a0 9b000000 09000000 22fa0000 4e000000 ........"...N... │ │ - 0x000db4b0 1c000000 05000000 1a8f0000 2a000000 ............*... │ │ - 0x000db4c0 1e010000 31000000 1a8f0000 2a000000 ....1.......*... │ │ - 0x000db4d0 34010000 47000000 1a8f0000 2a000000 4...G.......*... │ │ - 0x000db4e0 31010000 16000000 1a8f0000 2a000000 1...........*... │ │ - 0x000db4f0 5c010000 1a000000 1a8f0000 2a000000 \...........*... │ │ - 0x000db500 8f000000 18000000 1a8f0000 2a000000 ............*... │ │ - 0x000db510 8a000000 0d000000 1a8f0000 2a000000 ............*... │ │ - 0x000db520 bf010000 1f000000 1a8f0000 2a000000 ............*... │ │ - 0x000db530 1e020000 1e000000 1a8f0000 2a000000 ............*... │ │ - 0x000db540 23020000 22000000 1a8f0000 2a000000 #...".......*... │ │ - 0x000db550 24020000 25000000 1a8f0000 2a000000 $...%.......*... │ │ - 0x000db560 d4030000 2d000000 1a8f0000 2a000000 ....-.......*... │ │ - 0x000db570 ed040000 2d000000 1a8f0000 2a000000 ....-.......*... │ │ - 0x000db580 87020000 11000000 1a8f0000 2a000000 ............*... │ │ - 0x000db590 32000000 13000000 1a8f0000 2a000000 2...........*... │ │ - 0x000db5a0 2f000000 13000000 1a8f0000 2a000000 /...........*... │ │ - 0x000db5b0 2b000000 13000000 1a8f0000 2a000000 +...........*... │ │ - 0x000db5c0 4b000000 0e000000 1a8f0000 2a000000 K...........*... │ │ - 0x000db5d0 5a000000 28000000 b8e30000 2e000000 Z...(........... │ │ - 0x000db5e0 66000000 1c000000 b8e30000 2e000000 f............... │ │ - 0x000db5f0 3d000000 0b000000 b8e30000 2e000000 =............... │ │ - 0x000db600 3a000000 0b000000 b8e30000 2e000000 :............... │ │ - 0x000db610 36000000 0b000000 8bdf0000 2b000000 6...........+... │ │ - 0x000db620 62000000 1b000000 8bdf0000 2b000000 b...........+... │ │ - 0x000db630 69000000 13000000 69bc0000 50000000 i.......i...P... │ │ - 0x000db640 a6000000 05000000 00000000 00000000 ................ │ │ - 0x000db650 01000000 191d0700 00000000 00000000 ................ │ │ - 0x000db660 01000000 094f0700 00000000 00000000 .....O.......... │ │ - 0x000db670 01000000 79390700 00000000 01000000 ....y9.......... │ │ - 0x000db680 01000000 ed4d0700 00000000 0c000000 .....M.......... │ │ - 0x000db690 04000000 cb4e0700 294e0700 f94e0700 .....N..)N...N.. │ │ - 0x000db6a0 8bdf0000 2b000000 53010000 1e000000 ....+...S....... │ │ - 0x000db6b0 b8e30000 2e000000 6f000000 27000000 ........o...'... │ │ - 0x000db6c0 b8e30000 2e000000 70000000 1d000000 ........p....... │ │ - 0x000db6d0 b8e30000 2e000000 72000000 21000000 ........r...!... │ │ - 0x000db6e0 b8e30000 2e000000 72000000 48000000 ........r...H... │ │ - 0x000db6f0 b8e30000 2e000000 73000000 1a000000 ........s....... │ │ - 0x000db700 b8e30000 2e000000 74000000 19000000 ........t....... │ │ - 0x000db710 b8e30000 2e000000 7e000000 1d000000 ........~....... │ │ - 0x000db720 b8e30000 2e000000 b4000000 26000000 ............&... │ │ - 0x000db730 b8e30000 2e000000 b5000000 21000000 ............!... │ │ - 0x000db740 b8e30000 2e000000 8a000000 49000000 ............I... │ │ - 0x000db750 b8e30000 2e000000 8b000000 1f000000 ................ │ │ - 0x000db760 b8e30000 2e000000 8b000000 2f000000 ............/... │ │ - 0x000db770 b8e30000 2e000000 9d000000 35000000 ............5... │ │ - 0x000db780 b8e30000 2e000000 82000000 2c000000 ............,... │ │ - 0x000db790 b8e30000 2e000000 84000000 25000000 ............%... │ │ - 0x000db7a0 b8e30000 2e000000 87000000 25000000 ............%... │ │ - 0x000db7b0 a8d00000 5a000000 24090000 12000000 ....Z...$....... │ │ - 0x000db7c0 1af40000 58000000 b3010000 1a000000 ....X........... │ │ - 0x000db7d0 1af40000 58000000 00020000 13000000 ....X........... │ │ - 0x000db7e0 1af40000 58000000 05020000 33000000 ....X.......3... │ │ - 0x000db7f0 1af40000 58000000 09020000 3e000000 ....X.......>... │ │ - 0x000db800 1af40000 58000000 0f020000 3a000000 ....X.......:... │ │ - 0x000db810 1af40000 58000000 ab010000 3d000000 ....X.......=... │ │ - 0x000db820 1af40000 58000000 a6010000 45000000 ....X.......E... │ │ - 0x000db830 fca60000 59000000 f7010000 21000000 ....Y.......!... │ │ - 0x000db840 fca60000 59000000 fb010000 0c000000 ....Y........... │ │ - 0x000db850 fca60000 59000000 02020000 21000000 ....Y.......!... │ │ - 0x000db860 fca60000 59000000 0b020000 2a000000 ....Y.......*... │ │ - 0x000db870 fca60000 59000000 0f020000 2c000000 ....Y.......,... │ │ - 0x000db880 fca60000 59000000 14020000 09000000 ....Y........... │ │ - 0x000db890 771b0300 0c000000 04000000 c55f0700 w............_.. │ │ - 0x000db8a0 fd5f0700 a5600700 b7df0000 4b000000 ._...`......K... │ │ - 0x000db8b0 660b0000 0e000000 e9c70000 4f000000 f...........O... │ │ - 0x000db8c0 3b060000 14000000 e9c70000 4f000000 ;...........O... │ │ - 0x000db8d0 3b060000 21000000 e9c70000 4f000000 ;...!.......O... │ │ - 0x000db8e0 2f060000 14000000 e9c70000 4f000000 /...........O... │ │ - 0x000db8f0 2f060000 21000000 00000000 00000000 /...!........... │ │ - 0x000db900 01000000 c9280300 1af40000 58000000 .....(......X... │ │ - 0x000db910 5c020000 13000000 1af40000 58000000 \...........X... │ │ - 0x000db920 6e020000 19000000 e9c70000 4f000000 n...........O... │ │ - 0x000db930 bc040000 24000000 a0b00000 50000000 ....$.......P... │ │ - 0x000db940 18000000 28000000 45da0000 64000000 ....(...E...d... │ │ - 0x000db950 67010000 30000000 71fa0000 66000000 g...0...q...f... │ │ - 0x000db960 56010000 49000000 73f40000 6a000000 V...I...s...j... │ │ - 0x000db970 fe000000 1e000000 f7880000 6a000000 ............j... │ │ - 0x000db980 30000000 1d000000 f7880000 6a000000 0...........j... │ │ - 0x000db990 1f000000 11000000 71fa0000 66000000 ........q...f... │ │ - 0x000db9a0 a9010000 2b000000 458f0000 6c000000 ....+...E...l... │ │ - 0x000db9b0 30000000 1a000000 1e870100 22000000 0..........."... │ │ - 0x000db9c0 15000000 02000000 b8b90d00 03d10000 ................ │ │ - 0x000db9d0 49000000 88020000 11000000 452a0900 I...........E*.. │ │ - 0x000db9e0 0c000000 04000000 a12a0900 6d2b0900 .........*..m+.. │ │ - 0x000db9f0 b52c0900 452a0900 0c000000 04000000 .,..E*.......... │ │ - 0x000dba00 05320900 f5320900 89330900 96870100 .2...2...3...... │ │ - 0x000dba10 1b000000 25000000 02000000 0cba0d00 ....%........... │ │ - 0x000dba20 03d10000 49000000 41020000 1f000000 ....I...A....... │ │ - 0x000dba30 03d10000 49000000 b2010000 31000000 ....I.......1... │ │ - 0x000dba40 b1870100 1c000000 17000000 00000000 ................ │ │ - 0x000dba50 02000000 40ba0d00 03d10000 49000000 ....@.......I... │ │ - 0x000dba60 59070000 24000000 03d10000 49000000 Y...$.......I... │ │ - 0x000dba70 5a060000 0d000000 babc0000 58000000 Z...........X... │ │ - 0x000dba80 1f000000 0d000000 03d10000 49000000 ............I... │ │ - 0x000dba90 58060000 20000000 00000000 04000000 X... ........... │ │ - 0x000dbaa0 04000000 57390900 5f390900 5f390900 ....W9.._9.._9.. │ │ - 0x000dbab0 00000000 04000000 04000000 67390900 ............g9.. │ │ - 0x000dbac0 6f390900 6f390900 94c70000 54000000 o9..o9......T... │ │ - 0x000dbad0 b2000000 0d000000 ca8b0100 2e000000 ................ │ │ - 0x000dbae0 29000000 f88b0100 11000000 15000000 )............... │ │ - 0x000dbaf0 27f50000 54000000 8f000000 44000000 '...T.......D... │ │ - 0x000dbb00 27f50000 54000000 91000000 3a000000 '...T.......:... │ │ - 0x000dbb10 8bf10000 58000000 8f000000 0d000000 ....X........... │ │ - 0x000dbb20 8bf10000 58000000 0e010000 09000000 ....X........... │ │ - 0x000dbb30 7ea70000 53000000 9d000000 0a000000 ~...S........... │ │ - 0x000dbb40 7ea70000 53000000 7e000000 1a000000 ~...S...~....... │ │ - 0x000dbb50 7ea70000 53000000 6b000000 23000000 ~...S...k...#... │ │ - 0x000dbb60 6f8c0100 12000000 14000000 ead40000 o............... │ │ - 0x000dbb70 52000000 53000000 15000000 ead40000 R...S........... │ │ - 0x000dbb80 52000000 3a000000 09000000 ead40000 R...:........... │ │ - 0x000dbb90 52000000 3c000000 0d000000 818c0100 R...<........... │ │ - 0x000dbba0 2a000000 14000000 02000000 9cbb0d00 *............... │ │ - 0x000dbbb0 dd3d0900 10000000 04000000 e1240900 .=...........$.. │ │ - 0x000dbbc0 45250900 00000000 1c000000 04000000 E%.............. │ │ - 0x000dbbd0 d17e0700 d57e0700 92cc0000 47000000 .~...~......G... │ │ - 0x000dbbe0 1e030000 27000000 92cc0000 47000000 ....'.......G... │ │ - 0x000dbbf0 05030000 26000000 92cc0000 47000000 ....&.......G... │ │ - 0x000dbc00 03030000 2c000000 92cc0000 47000000 ....,.......G... │ │ - 0x000dbc10 12030000 27000000 92cc0000 47000000 ....'.......G... │ │ - 0x000dbc20 68010000 0d000000 62d50000 4d000000 h.......b...M... │ │ - 0x000dbc30 49020000 20000000 6aa30000 4c000000 I... ...j...L... │ │ - 0x000dbc40 db000000 31000000 00000000 00000000 ....1........... │ │ - 0x000dbc50 01000000 c52c0900 ef2c0900 232d0900 .....,...,..#-.. │ │ - 0x000dbc60 272d0900 2d2d0900 b52d0900 b9720700 '-..--...-...r.. │ │ - 0x000dbc70 b6ea0000 4c000000 26000000 0d000000 ....L...&....... │ │ - 0x000dbc80 b89e0000 4f000000 19020000 19000000 ....O........... │ │ - 0x000dbc90 4dff0000 51000000 3b010000 09000000 M...Q...;....... │ │ - 0x000dbca0 aada0000 4c000000 16010000 2e000000 ....L........... │ │ - 0x000dbcb0 053f0900 0c000000 04000000 3d3f0900 .?..........=?.. │ │ - 0x000dbcc0 853f0900 45400900 00000000 08000000 .?..E@.......... │ │ - 0x000dbcd0 04000000 55400900 65400900 8d400900 ....U@..e@...@.. │ │ - 0x000dbce0 99400900 dd3d0900 10000000 04000000 .@...=.......... │ │ - 0x000dbcf0 eb3d0900 113e0900 a53e0900 013f0900 .=...>...>...?.. │ │ - 0x000dbd00 e9c70000 4f000000 e4050000 14000000 ....O........... │ │ - 0x000dbd10 e9c70000 4f000000 e4050000 21000000 ....O.......!... │ │ - 0x000dbd20 e9c70000 4f000000 d8050000 21000000 ....O.......!... │ │ - 0x000dbd30 62890000 4d000000 2c010000 42000000 b...M...,...B... │ │ - 0x000dbd40 def40000 48000000 c9000000 12000000 ....H........... │ │ - 0x000dbd50 03e00000 5f000000 4a000000 1f000000 ...._...J....... │ │ - 0x000dbd60 03e00000 5f000000 44000000 17000000 ...._...D....... │ │ - 0x000dbd70 df770700 08000000 04000000 ed480900 .w...........H.. │ │ - 0x000dbd80 e5420900 10000000 04000000 f5420900 .B...........B.. │ │ - 0x000dbd90 00000000 04000000 04000000 bd5c0900 .............\.. │ │ - 0x000dbda0 8ad40000 5f000000 58020000 30000000 ...._...X...0... │ │ - 0x000dbdb0 8ad40000 5f000000 c6000000 27000000 ...._.......'... │ │ - 0x000dbdc0 f31e0900 0c000000 04000000 45de0300 ............E... │ │ - 0x000dbdd0 f31e0900 0c000000 04000000 39de0300 ............9... │ │ - 0x000dbde0 45de0300 c0bd0d00 391f0900 011f0900 E.......9....... │ │ - 0x000dbdf0 2d1f0900 391f0900 3d1f0900 d2a70000 -...9...=....... │ │ - 0x000dbe00 28000000 e6060000 1e000000 d2a70000 (............... │ │ - 0x000dbe10 28000000 b4060000 12000000 d2a70000 (............... │ │ - 0x000dbe20 28000000 b2030000 1c000000 19db0000 (............... │ │ - 0x000dbe30 50000000 36020000 01000000 d2a70000 P...6........... │ │ - 0x000dbe40 28000000 1c030000 29000000 39c80000 (.......)...9... │ │ - 0x000dbe50 29000000 14010000 24000000 e9c70000 ).......$....... │ │ - 0x000dbe60 4f000000 68040000 24000000 92cc0000 O...h...$....... │ │ - 0x000dbe70 47000000 9c030000 2f000000 92cc0000 G......./....... │ │ - 0x000dbe80 47000000 94030000 2f000000 92cc0000 G......./....... │ │ - 0x000dbe90 47000000 88030000 2b000000 92cc0000 G.......+....... │ │ - 0x000dbea0 47000000 a0030000 31000000 e9c70000 G.......1....... │ │ - 0x000dbeb0 4f000000 cd010000 37000000 00000000 O.......7....... │ │ - 0x000dbec0 08000000 04000000 99330900 fba70000 .........3...... │ │ - 0x000dbed0 6a000000 6d000000 0d000000 ace70000 j...m........... │ │ - 0x000dbee0 47000000 ad010000 21000000 92cc0000 G.......!....... │ │ - 0x000dbef0 47000000 ce030000 2f000000 92cc0000 G......./....... │ │ - 0x000dbf00 47000000 c7030000 2f000000 92cc0000 G......./....... │ │ - 0x000dbf10 47000000 bc030000 2b000000 92cc0000 G.......+....... │ │ - 0x000dbf20 47000000 d2030000 27000000 053f0900 G.......'....?.. │ │ - 0x000dbf30 0c000000 04000000 133f0900 e7e30000 .........?...... │ │ - 0x000dbf40 27000000 b9000000 25000000 e7e30000 '.......%....... │ │ - 0x000dbf50 27000000 b2010000 14000000 e7e30000 '............... │ │ - 0x000dbf60 27000000 c5010000 18000000 0f9c0000 '............... │ │ - 0x000dbf70 2b000000 62010000 29000000 0f9c0000 +...b...)....... │ │ - 0x000dbf80 2b000000 cd000000 33000000 d8fa0000 +.......3....... │ │ - 0x000dbf90 55000000 09030000 0a000000 d8fa0000 U............... │ │ - 0x000dbfa0 55000000 f4020000 1a000000 d8fa0000 U............... │ │ - 0x000dbfb0 55000000 4f010000 12000000 f1ab0000 U...O........... │ │ - 0x000dbfc0 51000000 c8010000 2a000000 f1ab0000 Q.......*....... │ │ - 0x000dbfd0 51000000 ca010000 39000000 43ac0000 Q.......9...C... │ │ - 0x000dbfe0 51000000 1f010000 2b000000 43ac0000 Q.......+...C... │ │ - 0x000dbff0 51000000 86000000 3a000000 43ac0000 Q.......:...C... │ │ - 0x000dc000 51000000 7e000000 41000000 43ac0000 Q...~...A...C... │ │ - 0x000dc010 51000000 ed000000 2b000000 43ac0000 Q.......+...C... │ │ - 0x000dc020 51000000 09010000 26000000 43ac0000 Q.......&...C... │ │ - 0x000dc030 51000000 0b010000 27000000 43ac0000 Q.......'...C... │ │ - 0x000dc040 51000000 0b010000 4b000000 43ac0000 Q.......K...C... │ │ - 0x000dc050 51000000 0f010000 27000000 43ac0000 Q.......'...C... │ │ - 0x000dc060 51000000 0f010000 4b000000 43ac0000 Q.......K...C... │ │ - 0x000dc070 51000000 15010000 40000000 84f50000 Q.......@....... │ │ - 0x000dc080 52000000 95010000 2a000000 84f50000 R.......*....... │ │ - 0x000dc090 52000000 97010000 39000000 66a80000 R.......9...f... │ │ - 0x000dc0a0 52000000 5c000000 2b000000 66a80000 R...\...+...f... │ │ - 0x000dc0b0 52000000 3a000000 28000000 66a80000 R...:...(...f... │ │ - 0x000dc0c0 52000000 bc000000 2b000000 66a80000 R.......+...f... │ │ - 0x000dc0d0 52000000 a2000000 2b000000 66a80000 R.......+...f... │ │ - 0x000dc0e0 52000000 ad000000 2f000000 66a80000 R......./...f... │ │ - 0x000dc0f0 52000000 99000000 2b000000 0fe40000 R.......+....... │ │ - 0x000dc100 54000000 30000000 1e000000 b89e0000 T...0........... │ │ - 0x000dc110 4f000000 df010000 19000000 b5670900 O............g.. │ │ - 0x000dc120 18000000 04000000 7b680900 05890900 ........{h...... │ │ - 0x000dc130 08000000 04000000 81eb0600 05890900 ................ │ │ - 0x000dc140 08000000 04000000 81eb0600 05890900 ................ │ │ - 0x000dc150 08000000 04000000 81eb0600 31670900 ............1g.. │ │ - 0x000dc160 08000000 04000000 ed480900 05890900 .........H...... │ │ - 0x000dc170 08000000 04000000 81eb0600 9fff0000 ................ │ │ - 0x000dc180 63000000 23050000 35000000 9fff0000 c...#...5....... │ │ - 0x000dc190 63000000 09050000 22000000 9fff0000 c......."....... │ │ - 0x000dc1a0 63000000 75070000 36000000 9fff0000 c...u...6....... │ │ - 0x000dc1b0 63000000 5b070000 22000000 54720100 c...[..."...Tr.. │ │ - 0x000dc1c0 20620100 44620100 75720100 4f720100 b..Db..ur..Or.. │ │ - 0x000dc1d0 72720100 00000000 ce730100 5f720100 rr.......s.._r.. │ │ - 0x000dc1e0 6d720100 00000000 59720100 67720100 mr......Yr..gr.. │ │ - 0x000dc1f0 74620100 18620100 79720100 00000000 tb...b..yr...... │ │ - 0x000dc200 00000000 56720100 64720100 52720100 ....Vr..dr..Rr.. │ │ - 0x000dc210 7a720100 00000000 5c720100 6a720100 zr......\r..jr.. │ │ - 0x000dc220 78720100 86730100 8b730100 97730100 xr...s...s...s.. │ │ - 0x000dc230 a2730100 fc610100 50290100 e6870100 .s...a..P)...... │ │ - 0x000dc240 f7870100 40290100 80290100 09880100 ....@)...)...... │ │ - 0x000dc250 1c880100 2e880100 3b880100 49880100 ........;...I... │ │ - 0x000dc260 5e880100 6a880100 75880100 8a880100 ^...j...u....... │ │ - 0x000dc270 9f880100 ae880100 bc880100 cf880100 ................ │ │ - 0x000dc280 f5880100 2d890100 46890100 5d890100 ....-...F...]... │ │ - 0x000dc290 69890100 72890100 e0290100 7c890100 i...r....)..|... │ │ - 0x000dc2a0 93890100 a1890100 af890100 bc890100 ................ │ │ - 0x000dc2b0 54630100 d0890100 eb890100 90290100 Tc...........).. │ │ - 0x000dc2c0 f9890100 0f8a0100 248a0100 2f8a0100 ........$.../... │ │ - 0x000dc2d0 458a0100 528a0100 5d8a0100 688a0100 E...R...]...h... │ │ - 0x000dc2e0 04630100 d0290100 70910100 81910100 .c...)..p....... │ │ - 0x000dc2f0 90910100 9f910100 b1910100 c2910100 ................ │ │ - 0x000dc300 ce910100 f0290100 d7910100 e2910100 .....).......... │ │ - 0x000dc310 ec910100 a4900100 f9910100 06920100 ................ │ │ - 0x000dc320 12920100 23920100 35920100 43920100 ....#...5...C... │ │ - 0x000dc330 59920100 65920100 0c630100 70920100 Y...e....c..p... │ │ - 0x000dc340 79920100 84920100 8f920100 9c920100 y............... │ │ - 0x000dc350 a8920100 b4920100 44630100 c6920100 ........Dc...... │ │ - 0x000dc360 d4920100 e0920100 ef920100 02930100 ................ │ │ - 0x000dc370 0d930100 18930100 25930100 30930100 ........%...0... │ │ - 0x000dc380 3a930100 3f930100 04630100 d0290100 :...?....c...).. │ │ - 0x000dc390 70910100 81910100 90910100 9f910100 p............... │ │ - 0x000dc3a0 b1910100 c2910100 ce910100 f0290100 .............).. │ │ - 0x000dc3b0 d7910100 e2910100 ec910100 a4900100 ................ │ │ - 0x000dc3c0 f9910100 06920100 12920100 23920100 ............#... │ │ - 0x000dc3d0 35920100 43920100 59920100 65920100 5...C...Y...e... │ │ - 0x000dc3e0 0c630100 70920100 79920100 84920100 .c..p...y....... │ │ - 0x000dc3f0 8f920100 9c920100 a8920100 b4920100 ................ │ │ - 0x000dc400 44630100 c6920100 d4920100 e0920100 Dc.............. │ │ - 0x000dc410 ef920100 02930100 0d930100 18930100 ................ │ │ - 0x000dc420 25930100 30930100 3a930100 3f930100 %...0...:...?... │ │ - 0x000dc430 04630100 d0290100 70910100 81910100 .c...)..p....... │ │ - 0x000dc440 90910100 9f910100 b1910100 c2910100 ................ │ │ - 0x000dc450 ce910100 f0290100 d7910100 e2910100 .....).......... │ │ - 0x000dc460 ec910100 a4900100 f9910100 06920100 ................ │ │ - 0x000dc470 12920100 23920100 35920100 43920100 ....#...5...C... │ │ - 0x000dc480 59920100 65920100 0c630100 70920100 Y...e....c..p... │ │ - 0x000dc490 79920100 84920100 8f920100 9c920100 y............... │ │ - 0x000dc4a0 a8920100 b4920100 44630100 c6920100 ........Dc...... │ │ - 0x000dc4b0 d4920100 e0920100 ef920100 02930100 ................ │ │ - 0x000dc4c0 0d930100 18930100 25930100 30930100 ........%...0... │ │ - 0x000dc4d0 3a930100 3f930100 a1db0000 77fb0000 :...?.......w... │ │ - 0x000dc4e0 52000100 eaf50000 10f60000 95e00000 R............... │ │ - 0x000dc4f0 cddb0000 15ba0000 78bd0000 ba890000 ........x....... │ │ - 0x000dc500 00000000 65b10000 adbd0000 46ba0000 ....e.......F... │ │ - 0x000dc510 04860000 c8e00000 7f000100 25990000 ............%... │ │ - 0x000dc520 3ac30000 a9e40000 a4c30000 b28f0000 :............... │ │ - 0x000dc530 00000d00 00000000 0e9c0000 40e10000 ............@... │ │ - 0x000dc540 0e9c0000 0e9c0000 548a0000 820b0200 ........T....... │ │ - 0x000dc550 00000000 00000000 14730d00 18730d00 .........s...s.. │ │ - 0x000dc560 1c730d00 30730d00 18740d00 00750d00 .s..0s...t...u.. │ │ - 0x000dc570 14750d00 1c760d00 2c770d00 bc770d00 .u...v..,w...w.. │ │ - 0x000dc580 04780d00 64780d00 6c780d00 8c780d00 .x..dx..lx...x.. │ │ - 0x000dc590 1c790d00 24790d00 .y..$y.. │ │ + 0x000d9f20 209f0d00 00000000 38000000 08000000 .......8....... │ │ + 0x000d9f30 cd350200 28fb0000 55000000 b2010000 .5..(...U....... │ │ + 0x000d9f40 0e000000 00000000 10000000 08000000 ................ │ │ + 0x000d9f50 3d360200 3f200300 20000000 08000000 =6..? .. ....... │ │ + 0x000d9f60 15370200 05da0000 23000000 11000000 .7......#....... │ │ + 0x000d9f70 2a000000 05da0000 23000000 14000000 *.......#....... │ │ + 0x000d9f80 18000000 6fd00000 61000000 bb020000 ....o...a....... │ │ + 0x000d9f90 25000000 6fd00000 61000000 bb020000 %...o...a....... │ │ + 0x000d9fa0 3c000000 6fd00000 61000000 bd020000 <...o...a....... │ │ + 0x000d9fb0 22000000 27f50000 50000000 91010000 "...'...P....... │ │ + 0x000d9fc0 2d000000 29b50000 51000000 f3000000 -...)...Q....... │ │ + 0x000d9fd0 43000000 ece50000 51000000 a8000000 C.......Q....... │ │ + 0x000d9fe0 2b000000 ece50000 51000000 af000000 +.......Q....... │ │ + 0x000d9ff0 2d000000 ece50000 51000000 c5000000 -.......Q....... │ │ + 0x000da000 26000000 ece50000 51000000 c7000000 &.......Q....... │ │ + 0x000da010 27000000 ece50000 51000000 c7000000 '.......Q....... │ │ + 0x000da020 49000000 ece50000 51000000 c8000000 I.......Q....... │ │ + 0x000da030 47000000 ece50000 51000000 cc000000 G.......Q....... │ │ + 0x000da040 27000000 ece50000 51000000 cc000000 '.......Q....... │ │ + 0x000da050 49000000 ece50000 51000000 cd000000 I.......Q....... │ │ + 0x000da060 47000000 3ad20000 52000000 61010000 G...:...R...a... │ │ + 0x000da070 2a000000 3ad20000 52000000 63010000 *...:...R...c... │ │ + 0x000da080 37000000 431c0300 0c000000 04000000 7...C........... │ │ + 0x000da090 5b2a0300 ad290300 3d750200 c1190300 [*...)..=u...... │ │ + 0x000da0a0 08000000 04000000 bd410300 00000000 .........A...... │ │ + 0x000da0b0 00000000 01000000 99290300 e1810500 .........)...... │ │ + 0x000da0c0 04000000 04000000 d55c0700 e11e0300 .........\...... │ │ + 0x000da0d0 10000000 04000000 05360300 00000000 .........6...... │ │ + 0x000da0e0 00000000 01000000 bd350300 1dec0600 .........5...... │ │ + 0x000da0f0 08000000 04000000 dd8d0900 ab1b0300 ................ │ │ + 0x000da100 0c000000 04000000 bd410300 d11e0300 .........A...... │ │ + 0x000da110 10000000 04000000 d1350300 dd880900 .........5...... │ │ + 0x000da120 08000000 04000000 dd8d0900 72810000 ............r... │ │ + 0x000da130 2f000000 26000000 12000000 00000000 /...&........... │ │ + 0x000da140 18000000 08000000 d9c90200 47b70000 ............G... │ │ + 0x000da150 21000000 57000000 26000000 47b70000 !...W...&...G... │ │ + 0x000da160 21000000 5a000000 35000000 e1190300 !...Z...5....... │ │ + 0x000da170 18000000 08000000 ad010300 47b70000 ............G... │ │ + 0x000da180 21000000 74000000 38000000 251a0300 !...t...8...%... │ │ + 0x000da190 10000000 08000000 890d0300 47b70000 ............G... │ │ + 0x000da1a0 21000000 86000000 2f000000 47b70000 !......./...G... │ │ + 0x000da1b0 21000000 a4000000 2f000000 47b70000 !......./...G... │ │ + 0x000da1c0 21000000 12000000 18000000 00000000 !............... │ │ + 0x000da1d0 04000000 04000000 adfc0200 00000000 ................ │ │ + 0x000da1e0 08000000 04000000 190b0300 00000000 ................ │ │ + 0x000da1f0 10000000 08000000 a9b10200 a1180300 ................ │ │ + 0x000da200 28000000 08000000 0dec0200 00000000 (............... │ │ + 0x000da210 08000000 04000000 8d090300 00000000 ................ │ │ + 0x000da220 08000000 04000000 a10c0300 00000000 ................ │ │ + 0x000da230 0c000000 04000000 8fc90200 00000000 ................ │ │ + 0x000da240 10000000 04000000 45920200 00000000 ........E....... │ │ + 0x000da250 14000000 04000000 5de30200 e5180300 ........]....... │ │ + 0x000da260 20000000 08000000 abeb0200 00000000 ............... │ │ + 0x000da270 10000000 08000000 d1910200 e5180300 ................ │ │ + 0x000da280 20000000 08000000 e5750200 f3180300 ........u...... │ │ + 0x000da290 20000000 08000000 01ea0200 00000000 ............... │ │ + 0x000da2a0 10000000 08000000 4d750200 f3180300 ........Mu...... │ │ + 0x000da2b0 20000000 08000000 4f0f0300 00000000 .......O....... │ │ + 0x000da2c0 08000000 04000000 61eb0200 00000000 ........a....... │ │ + 0x000da2d0 08000000 04000000 79e90200 5fc60000 ........y..._... │ │ + 0x000da2e0 22000000 06000000 2e000000 00000000 "............... │ │ + 0x000da2f0 20000000 08000000 cf920200 d7180300 ............... │ │ + 0x000da300 18000000 08000000 79030300 00000000 ........y....... │ │ + 0x000da310 18000000 08000000 5dc90200 00000000 ........]....... │ │ + 0x000da320 28000000 08000000 19900200 00000000 (............... │ │ + 0x000da330 20000000 08000000 3d0d0300 00000000 .......=....... │ │ + 0x000da340 0c000000 04000000 f9b10200 00000000 ................ │ │ + 0x000da350 10000000 04000000 45760200 00000000 ........Ev...... │ │ + 0x000da360 18000000 04000000 19930200 29da0000 ............)... │ │ + 0x000da370 23000000 c8000000 38000000 04ab0000 #.......8....... │ │ + 0x000da380 24000000 71010000 01000000 04ab0000 $...q........... │ │ + 0x000da390 24000000 70010000 01000000 04ab0000 $...p........... │ │ + 0x000da3a0 24000000 6f010000 01000000 04ab0000 $...o........... │ │ + 0x000da3b0 24000000 6e010000 01000000 3da30000 $...n.......=... │ │ + 0x000da3c0 26000000 2c000000 25000000 3da30000 &...,...%...=... │ │ + 0x000da3d0 26000000 2c000000 2e000000 3da30000 &...,.......=... │ │ + 0x000da3e0 26000000 2d000000 25000000 3da30000 &...-...%...=... │ │ + 0x000da3f0 26000000 2e000000 33000000 3da30000 &.......3...=... │ │ + 0x000da400 26000000 2e000000 3c000000 00000000 &.......<....... │ │ + 0x000da410 04000000 04000000 55eb0200 00000000 ........U....... │ │ + 0x000da420 0c000000 04000000 790a0300 3da30000 ........y...=... │ │ + 0x000da430 26000000 a7000000 27000000 3da30000 &.......'...=... │ │ + 0x000da440 26000000 a7000000 30000000 e2a60000 &.......0....... │ │ + 0x000da450 50000000 bc000000 01000000 fb200100 P............ .. │ │ + 0x000da460 3c000000 6fd00000 61000000 88010000 <...o...a....... │ │ + 0x000da470 15000000 6fd00000 61000000 a9010000 ....o...a....... │ │ + 0x000da480 24000000 6fd00000 61000000 a9010000 $...o...a....... │ │ + 0x000da490 3b000000 6fd00000 61000000 b1010000 ;...o...a....... │ │ + 0x000da4a0 22000000 00000000 0c000000 04000000 "............... │ │ + 0x000da4b0 f5090300 59690300 00000000 0c000000 ....Yi.......... │ │ + 0x000da4c0 04000000 450f0300 e1690300 00000000 ....E....i...... │ │ + 0x000da4d0 0c000000 04000000 030b0300 196f0300 .............o.. │ │ + 0x000da4e0 05da0000 23000000 3c000000 1e000000 ....#...<....... │ │ + 0x000da4f0 05da0000 23000000 3f000000 28000000 ....#...?...(... │ │ + 0x000da500 3da30000 26000000 be000000 3d000000 =...&.......=... │ │ + 0x000da510 3da30000 26000000 c2000000 09000000 =...&........... │ │ + 0x000da520 3da30000 26000000 7d000000 25000000 =...&...}...%... │ │ + 0x000da530 d1840000 22000000 f6000000 27000000 ....".......'... │ │ + 0x000da540 82c60000 27000000 3c000000 23000000 ....'...<...#... │ │ + 0x000da550 82c60000 27000000 46000000 23000000 ....'...F...#... │ │ + 0x000da560 82c60000 27000000 56000000 2c000000 ....'...V...,... │ │ + 0x000da570 29da0000 23000000 c1000000 27000000 )...#.......'... │ │ + 0x000da580 00000000 08000000 08000000 21c90200 ............!... │ │ + 0x000da590 5d290300 5d290300 f9df0000 27000000 ])..])......'... │ │ + 0x000da5a0 a6000000 24000000 00000000 00000000 ....$........... │ │ + 0x000da5b0 01000000 05e50300 19e50300 0c000000 ................ │ │ + 0x000da5c0 04000000 27e50300 65e50300 19e60300 ....'...e....... │ │ + 0x000da5d0 2e8d0000 48000000 8a020000 0e000000 ....H........... │ │ + 0x000da5e0 06bc0000 48000000 9f010000 3f000000 ....H.......?... │ │ + 0x000da5f0 06bc0000 48000000 a0010000 33000000 ....H.......3... │ │ + 0x000da600 778d0000 50000000 1c000000 05000000 w...P........... │ │ + 0x000da610 4fbc0000 4b000000 7e0b0000 26000000 O...K...~...&... │ │ + 0x000da620 4fbc0000 4b000000 870b0000 1a000000 O...K........... │ │ + 0x000da630 00000000 0c000000 04000000 350d0400 ............5... │ │ + 0x000da640 a90e0400 f50e0400 27920000 4f000000 ........'...O... │ │ + 0x000da650 66060000 15000000 27920000 4f000000 f.......'...O... │ │ + 0x000da660 94060000 15000000 27920000 4f000000 ........'...O... │ │ + 0x000da670 95060000 15000000 27920000 4f000000 ........'...O... │ │ + 0x000da680 73050000 28000000 27920000 4f000000 s...(...'...O... │ │ + 0x000da690 73050000 12000000 609f0000 5f000000 s.......`..._... │ │ + 0x000da6a0 5c030000 05000000 46960000 55000000 \.......F...U... │ │ + 0x000da6b0 0a000000 2b000000 46960000 55000000 ....+...F...U... │ │ + 0x000da6c0 1a000000 36000000 00000000 04000000 ....6........... │ │ + 0x000da6d0 04000000 19130400 b1fe0000 4d000000 ............M... │ │ + 0x000da6e0 e1000000 05000000 b1fe0000 4d000000 ............M... │ │ + 0x000da6f0 e9000000 05000000 fffe0000 4d000000 ............M... │ │ + 0x000da700 8b000000 23000000 fffe0000 4d000000 ....#.......M... │ │ + 0x000da710 84000000 2b000000 f4840000 2a000000 ....+.......*... │ │ + 0x000da720 aa010000 11000000 f4840000 2a000000 ............*... │ │ + 0x000da730 c3010000 34000000 24a60000 2a000000 ....4...$...*... │ │ + 0x000da740 25000000 28000000 22db0000 5f000000 %...(..."..._... │ │ + 0x000da750 a1000000 24000000 00000000 00000000 ....$........... │ │ + 0x000da760 01000000 11f70500 26cb0000 56000000 ........&...V... │ │ + 0x000da770 a2040000 22000000 26cb0000 56000000 ...."...&...V... │ │ + 0x000da780 98040000 26000000 b4620100 1c000000 ....&....b...... │ │ + 0x000da790 00000000 08000000 04000000 d14f0700 .............O.. │ │ + 0x000da7a0 4fa60000 5f000000 69000000 2b000000 O..._...i...+... │ │ + 0x000da7b0 4fa60000 5f000000 04010000 2b000000 O..._.......+... │ │ + 0x000da7c0 4fa60000 5f000000 df000000 2f000000 O..._......./... │ │ + 0x000da7d0 7dcb0000 66000000 15010000 43000000 }...f.......C... │ │ + 0x000da7e0 e4cb0000 66000000 67010000 2b000000 ....f...g...+... │ │ + 0x000da7f0 e4cb0000 66000000 c1000000 36000000 ....f.......6... │ │ + 0x000da800 e4cb0000 66000000 ba000000 36000000 ....f.......6... │ │ + 0x000da810 e4cb0000 66000000 17010000 2b000000 ....f.......+... │ │ + 0x000da820 e4cb0000 66000000 ca000000 2b000000 ....f.......+... │ │ + 0x000da830 e4cb0000 66000000 d1000000 2d000000 ....f.......-... │ │ + 0x000da840 04620100 04000000 54620100 04000000 .b......Tb...... │ │ + 0x000da850 ec620100 03000000 ef620100 05000000 .b.......b...... │ │ + 0x000da860 74630100 08000000 14620100 04000000 tc.......b...... │ │ + 0x000da870 9c630100 06000000 a2630100 06000000 .c.......c...... │ │ + 0x000da880 a8630100 06000000 3c630100 08000000 .c.........O... │ │ + 0x000db140 29ab0000 2f000000 31010000 12000000 ).../...1....... │ │ + 0x000db150 29ab0000 2f000000 c9000000 2b000000 ).../.......+... │ │ + 0x000db160 29ab0000 2f000000 3b000000 45000000 ).../...;...E... │ │ + 0x000db170 29ab0000 2f000000 0f010000 1a000000 ).../........... │ │ + 0x000db180 afa60000 32000000 68000000 2c000000 ....2...h...,... │ │ + 0x000db190 d8c60000 22000000 fe000000 36000000 ....".......6... │ │ + 0x000db1a0 9d0d0600 10000000 04000000 c70d0600 ................ │ │ + 0x000db1b0 65130600 98000000 08000000 8d130600 e............... │ │ + 0x000db1c0 00000000 10000000 08000000 71120600 ............q... │ │ + 0x000db1d0 ed190600 20000000 08000000 0d1a0600 .... ........... │ │ + 0x000db1e0 00000000 18000000 08000000 09190600 ................ │ │ + 0x000db1f0 d8c60000 22000000 55000000 25000000 ...."...U...%... │ │ + 0x000db200 d8c60000 22000000 42010000 2e000000 ...."...B....... │ │ + 0x000db210 65220600 18000000 08000000 85220600 e"...........".. │ │ + 0x000db220 00000000 10000000 08000000 e5210600 .............!.. │ │ + 0x000db230 d8c60000 22000000 35000000 2a000000 ...."...5...*... │ │ + 0x000db240 d8c60000 22000000 de000000 3a000000 ....".......:... │ │ + 0x000db250 00000000 0c000000 04000000 b5d50600 ................ │ │ + 0x000db260 01d60600 00000000 0c000000 04000000 ................ │ │ + 0x000db270 51150600 5d150600 b5c10000 55000000 Q...].......U... │ │ + 0x000db280 29050000 19000000 e2a60000 50000000 )...........P... │ │ + 0x000db290 4c010000 01000000 35fa0000 39000000 L.......5...9... │ │ + 0x000db2a0 20000000 09000000 35fa0000 39000000 .......5...9... │ │ + 0x000db2b0 2a000000 13000000 06c70000 30000000 *...........0... │ │ + 0x000db2c0 6b060000 1a000000 06c70000 30000000 k...........0... │ │ + 0x000db2d0 6b060000 36000000 06c70000 30000000 k...6.......0... │ │ + 0x000db2e0 5e060000 28000000 06c70000 30000000 ^...(.......0... │ │ + 0x000db2f0 73070000 3e000000 06c70000 30000000 s...>.......0... │ │ + 0x000db300 d9070000 4d000000 06c70000 30000000 ....M.......0... │ │ + 0x000db310 3c060000 2d000000 06c70000 30000000 <...-.......0... │ │ + 0x000db320 3c060000 19000000 06c70000 30000000 <...........0... │ │ + 0x000db330 84060000 20000000 06c70000 30000000 .... .......0... │ │ + 0x000db340 11020000 28000000 06c70000 30000000 ....(.......0... │ │ + 0x000db350 86020000 1d000000 06c70000 30000000 ............0... │ │ + 0x000db360 22040000 14000000 06c70000 30000000 "...........0... │ │ + 0x000db370 23040000 12000000 06c70000 30000000 #...........0... │ │ + 0x000db380 36040000 0d000000 06c70000 30000000 6...........0... │ │ + 0x000db390 37040000 0d000000 06c70000 30000000 7...........0... │ │ + 0x000db3a0 39040000 22000000 06c70000 30000000 9...".......0... │ │ + 0x000db3b0 3a040000 26000000 06c70000 30000000 :...&.......0... │ │ + 0x000db3c0 3b040000 26000000 06c70000 30000000 ;...&.......0... │ │ + 0x000db3d0 44040000 23000000 06c70000 30000000 D...#.......0... │ │ + 0x000db3e0 44040000 0e000000 06c70000 30000000 D...........0... │ │ + 0x000db3f0 46040000 0d000000 06c70000 30000000 F...........0... │ │ + 0x000db400 47040000 0d000000 06c70000 30000000 G...........0... │ │ + 0x000db410 48040000 22000000 06c70000 30000000 H...".......0... │ │ + 0x000db420 48040000 0d000000 06c70000 30000000 H...........0... │ │ + 0x000db430 4c040000 0d000000 06c70000 30000000 L...........0... │ │ + 0x000db440 4d040000 0d000000 06c70000 30000000 M...........0... │ │ + 0x000db450 4e040000 22000000 06c70000 30000000 N...".......0... │ │ + 0x000db460 4e040000 0d000000 06c70000 30000000 N...........0... │ │ + 0x000db470 4f040000 26000000 06c70000 30000000 O...&.......0... │ │ + 0x000db480 4f040000 0d000000 06c70000 30000000 O...........0... │ │ + 0x000db490 2c040000 17000000 d1d00000 59000000 ,...........Y... │ │ + 0x000db4a0 a1000000 36000000 d1d00000 59000000 ....6.......Y... │ │ + 0x000db4b0 9b000000 09000000 d0b40000 4e000000 ............N... │ │ + 0x000db4c0 1c000000 05000000 b18e0000 2a000000 ............*... │ │ + 0x000db4d0 1e010000 31000000 b18e0000 2a000000 ....1.......*... │ │ + 0x000db4e0 31010000 16000000 b18e0000 2a000000 1...........*... │ │ + 0x000db4f0 34010000 47000000 b18e0000 2a000000 4...G.......*... │ │ + 0x000db500 5c010000 1a000000 b18e0000 2a000000 \...........*... │ │ + 0x000db510 8f000000 18000000 b18e0000 2a000000 ............*... │ │ + 0x000db520 8a000000 0d000000 b18e0000 2a000000 ............*... │ │ + 0x000db530 bf010000 1f000000 b18e0000 2a000000 ............*... │ │ + 0x000db540 1e020000 1e000000 b18e0000 2a000000 ............*... │ │ + 0x000db550 23020000 22000000 b18e0000 2a000000 #...".......*... │ │ + 0x000db560 24020000 25000000 b18e0000 2a000000 $...%.......*... │ │ + 0x000db570 d4030000 2d000000 b18e0000 2a000000 ....-.......*... │ │ + 0x000db580 ed040000 2d000000 b18e0000 2a000000 ....-.......*... │ │ + 0x000db590 87020000 11000000 b18e0000 2a000000 ............*... │ │ + 0x000db5a0 32000000 13000000 b18e0000 2a000000 2...........*... │ │ + 0x000db5b0 2f000000 13000000 b18e0000 2a000000 /...........*... │ │ + 0x000db5c0 2b000000 13000000 b18e0000 2a000000 +...........*... │ │ + 0x000db5d0 4b000000 0e000000 b18e0000 2a000000 K...........*... │ │ + 0x000db5e0 5a000000 28000000 4de40000 2e000000 Z...(...M....... │ │ + 0x000db5f0 66000000 1c000000 4de40000 2e000000 f.......M....... │ │ + 0x000db600 3d000000 0b000000 4de40000 2e000000 =.......M....... │ │ + 0x000db610 3a000000 0b000000 4de40000 2e000000 :.......M....... │ │ + 0x000db620 36000000 0b000000 7fe00000 2b000000 6...........+... │ │ + 0x000db630 62000000 1b000000 7fe00000 2b000000 b...........+... │ │ + 0x000db640 69000000 13000000 7ce40000 50000000 i.......|...P... │ │ + 0x000db650 a6000000 05000000 00000000 00000000 ................ │ │ + 0x000db660 01000000 bd4f0700 00000000 00000000 .....O.......... │ │ + 0x000db670 01000000 cd1d0700 00000000 01000000 ................ │ │ + 0x000db680 01000000 a14e0700 00000000 00000000 .....N.......... │ │ + 0x000db690 01000000 2d3a0700 00000000 0c000000 ....-:.......... │ │ + 0x000db6a0 04000000 7f4f0700 dd4e0700 ad4f0700 .....O...N...O.. │ │ + 0x000db6b0 7fe00000 2b000000 53010000 1e000000 ....+...S....... │ │ + 0x000db6c0 4de40000 2e000000 6f000000 27000000 M.......o...'... │ │ + 0x000db6d0 4de40000 2e000000 70000000 1d000000 M.......p....... │ │ + 0x000db6e0 4de40000 2e000000 72000000 21000000 M.......r...!... │ │ + 0x000db6f0 4de40000 2e000000 72000000 48000000 M.......r...H... │ │ + 0x000db700 4de40000 2e000000 73000000 1a000000 M.......s....... │ │ + 0x000db710 4de40000 2e000000 74000000 19000000 M.......t....... │ │ + 0x000db720 4de40000 2e000000 7e000000 1d000000 M.......~....... │ │ + 0x000db730 4de40000 2e000000 b4000000 26000000 M...........&... │ │ + 0x000db740 4de40000 2e000000 b5000000 21000000 M...........!... │ │ + 0x000db750 4de40000 2e000000 8a000000 49000000 M...........I... │ │ + 0x000db760 4de40000 2e000000 8b000000 1f000000 M............... │ │ + 0x000db770 4de40000 2e000000 8b000000 2f000000 M.........../... │ │ + 0x000db780 4de40000 2e000000 9d000000 35000000 M...........5... │ │ + 0x000db790 4de40000 2e000000 82000000 2c000000 M...........,... │ │ + 0x000db7a0 4de40000 2e000000 84000000 25000000 M...........%... │ │ + 0x000db7b0 4de40000 2e000000 87000000 25000000 M...........%... │ │ + 0x000db7c0 2bd10000 5a000000 24090000 12000000 +...Z...$....... │ │ + 0x000db7d0 a1f50000 58000000 b3010000 1a000000 ....X........... │ │ + 0x000db7e0 a1f50000 58000000 00020000 13000000 ....X........... │ │ + 0x000db7f0 a1f50000 58000000 05020000 33000000 ....X.......3... │ │ + 0x000db800 a1f50000 58000000 09020000 3e000000 ....X.......>... │ │ + 0x000db810 a1f50000 58000000 0f020000 3a000000 ....X.......:... │ │ + 0x000db820 a1f50000 58000000 ab010000 3d000000 ....X.......=... │ │ + 0x000db830 a1f50000 58000000 a6010000 45000000 ....X.......E... │ │ + 0x000db840 33a70000 59000000 f7010000 21000000 3...Y.......!... │ │ + 0x000db850 33a70000 59000000 fb010000 0c000000 3...Y........... │ │ + 0x000db860 33a70000 59000000 02020000 21000000 3...Y.......!... │ │ + 0x000db870 33a70000 59000000 0b020000 2a000000 3...Y.......*... │ │ + 0x000db880 33a70000 59000000 0f020000 2c000000 3...Y.......,... │ │ + 0x000db890 33a70000 59000000 14020000 09000000 3...Y........... │ │ + 0x000db8a0 431c0300 0c000000 04000000 2d600700 C...........-`.. │ │ + 0x000db8b0 65600700 0d610700 6ffa0000 4b000000 e`...a..o...K... │ │ + 0x000db8c0 660b0000 0e000000 27920000 4f000000 f.......'...O... │ │ + 0x000db8d0 3b060000 14000000 27920000 4f000000 ;.......'...O... │ │ + 0x000db8e0 3b060000 21000000 27920000 4f000000 ;...!...'...O... │ │ + 0x000db8f0 2f060000 14000000 27920000 4f000000 /.......'...O... │ │ + 0x000db900 2f060000 21000000 00000000 00000000 /...!........... │ │ + 0x000db910 01000000 99290300 a1f50000 58000000 .....)......X... │ │ + 0x000db920 5c020000 13000000 a1f50000 58000000 \...........X... │ │ + 0x000db930 6e020000 19000000 27920000 4f000000 n.......'...O... │ │ + 0x000db940 bc040000 24000000 cde40000 50000000 ....$.......P... │ │ + 0x000db950 18000000 28000000 82db0000 64000000 ....(.......d... │ │ + 0x000db960 67010000 30000000 afc70000 66000000 g...0.......f... │ │ + 0x000db970 56010000 49000000 95910000 6a000000 V...I.......j... │ │ + 0x000db980 fe000000 1e000000 69ab0000 6a000000 ........i...j... │ │ + 0x000db990 30000000 1d000000 69ab0000 6a000000 0.......i...j... │ │ + 0x000db9a0 1f000000 11000000 afc70000 66000000 ............f... │ │ + 0x000db9b0 a9010000 2b000000 bbfa0000 6c000000 ....+.......l... │ │ + 0x000db9c0 30000000 1a000000 1e870100 22000000 0..........."... │ │ + 0x000db9d0 15000000 02000000 c8b90d00 b12a0900 .............*.. │ │ + 0x000db9e0 0c000000 04000000 71320900 61330900 ........q2..a3.. │ │ + 0x000db9f0 f5330900 9bbc0000 49000000 88020000 .3......I....... │ │ + 0x000dba00 11000000 b12a0900 0c000000 04000000 .....*.......... │ │ + 0x000dba10 0d2b0900 d92b0900 212d0900 96870100 .+...+..!-...... │ │ + 0x000dba20 1b000000 25000000 02000000 1cba0d00 ....%........... │ │ + 0x000dba30 9bbc0000 49000000 41020000 1f000000 ....I...A....... │ │ + 0x000dba40 9bbc0000 49000000 b2010000 31000000 ....I.......1... │ │ + 0x000dba50 b1870100 1c000000 17000000 00000000 ................ │ │ + 0x000dba60 02000000 50ba0d00 9bbc0000 49000000 ....P.......I... │ │ + 0x000dba70 59070000 24000000 9bbc0000 49000000 Y...$.......I... │ │ + 0x000dba80 5a060000 0d000000 1ee50000 58000000 Z...........X... │ │ + 0x000dba90 1f000000 0d000000 9bbc0000 49000000 ............I... │ │ + 0x000dbaa0 58060000 20000000 00000000 04000000 X... ........... │ │ + 0x000dbab0 04000000 c3390900 cb390900 cb390900 .....9...9...9.. │ │ + 0x000dbac0 00000000 04000000 04000000 d3390900 .............9.. │ │ + 0x000dbad0 db390900 db390900 e7db0000 54000000 .9...9......T... │ │ + 0x000dbae0 b2000000 0d000000 ca8b0100 2e000000 ................ │ │ + 0x000dbaf0 29000000 f88b0100 11000000 15000000 )............... │ │ + 0x000dbb00 e6b90000 54000000 8f000000 44000000 ....T.......D... │ │ + 0x000dbb10 e6b90000 54000000 91000000 3a000000 ....T.......:... │ │ + 0x000dbb20 e4960000 58000000 8f000000 0d000000 ....X........... │ │ + 0x000dbb30 e4960000 58000000 0e010000 09000000 ....X........... │ │ + 0x000dbb40 86d10000 53000000 9d000000 0a000000 ....S........... │ │ + 0x000dbb50 86d10000 53000000 7e000000 1a000000 ....S...~....... │ │ + 0x000dbb60 86d10000 53000000 6b000000 23000000 ....S...k...#... │ │ + 0x000dbb70 6f8c0100 12000000 14000000 3d970000 o...........=... │ │ + 0x000dbb80 52000000 56000000 15000000 3d970000 R...V.......=... │ │ + 0x000dbb90 52000000 3d000000 09000000 3d970000 R...=.......=... │ │ + 0x000dbba0 52000000 3f000000 0d000000 818c0100 R...?........... │ │ + 0x000dbbb0 2a000000 14000000 02000000 acbb0d00 *............... │ │ + 0x000dbbc0 493e0900 10000000 04000000 4d250900 I>..........M%.. │ │ + 0x000dbbd0 b1250900 00000000 1c000000 04000000 .%.............. │ │ + 0x000dbbe0 397f0700 3d7f0700 16c80000 47000000 9...=.......G... │ │ + 0x000dbbf0 1e030000 27000000 16c80000 47000000 ....'.......G... │ │ + 0x000dbc00 05030000 26000000 16c80000 47000000 ....&.......G... │ │ + 0x000dbc10 03030000 2c000000 16c80000 47000000 ....,.......G... │ │ + 0x000dbc20 12030000 27000000 16c80000 47000000 ....'.......G... │ │ + 0x000dbc30 68010000 0d000000 efd50000 4d000000 h...........M... │ │ + 0x000dbc40 49020000 20000000 abe00000 4c000000 I... .......L... │ │ + 0x000dbc50 db000000 31000000 00000000 00000000 ....1........... │ │ + 0x000dbc60 01000000 312d0900 5b2d0900 8f2d0900 ....1-..[-...-.. │ │ + 0x000dbc70 932d0900 992d0900 212e0900 21730700 .-...-..!...!s.. │ │ + 0x000dbc80 77e50000 4c000000 26000000 0d000000 w...L...&....... │ │ + 0x000dbc90 88d60000 4f000000 19020000 19000000 ....O........... │ │ + 0x000dbca0 fe810000 51000000 3b010000 09000000 ....Q...;....... │ │ + 0x000dbcb0 86e90000 4c000000 16010000 2e000000 ....L........... │ │ + 0x000dbcc0 713f0900 0c000000 04000000 a93f0900 q?...........?.. │ │ + 0x000dbcd0 f13f0900 b1400900 00000000 08000000 .?...@.......... │ │ + 0x000dbce0 04000000 c1400900 d1400900 f9400900 .....@...@...@.. │ │ + 0x000dbcf0 05410900 493e0900 10000000 04000000 .A..I>.......... │ │ + 0x000dbd00 573e0900 7d3e0900 113f0900 6d3f0900 W>..}>...?..m?.. │ │ + 0x000dbd10 27920000 4f000000 e4050000 14000000 '...O........... │ │ + 0x000dbd20 27920000 4f000000 e4050000 21000000 '...O.......!... │ │ + 0x000dbd30 27920000 4f000000 d8050000 21000000 '...O.......!... │ │ + 0x000dbd40 29f00000 4d000000 2c010000 42000000 )...M...,...B... │ │ + 0x000dbd50 0bc20000 48000000 c9000000 12000000 ....H........... │ │ + 0x000dbd60 dad10000 5f000000 4a000000 1f000000 ...._...J....... │ │ + 0x000dbd70 dad10000 5f000000 44000000 17000000 ...._...D....... │ │ + 0x000dbd80 51430900 10000000 04000000 61430900 QC..........aC.. │ │ + 0x000dbd90 47780700 08000000 04000000 59490900 Gx..........YI.. │ │ + 0x000dbda0 00000000 04000000 04000000 295d0900 ............)].. │ │ + 0x000dbdb0 22db0000 5f000000 58020000 30000000 "..._...X...0... │ │ + 0x000dbdc0 22db0000 5f000000 c6000000 27000000 "..._.......'... │ │ + 0x000dbdd0 5f1f0900 0c000000 04000000 4de10300 _...........M... │ │ + 0x000dbde0 5f1f0900 0c000000 04000000 41e10300 _...........A... │ │ + 0x000dbdf0 4de10300 d0bd0d00 a51f0900 6d1f0900 M...........m... │ │ + 0x000dbe00 991f0900 a51f0900 a91f0900 b5a70000 ................ │ │ + 0x000dbe10 28000000 e6060000 1e000000 b5a70000 (............... │ │ + 0x000dbe20 28000000 b4060000 12000000 b5a70000 (............... │ │ + 0x000dbe30 28000000 b2030000 1c000000 17cd0000 (............... │ │ + 0x000dbe40 50000000 36020000 01000000 b5a70000 P...6........... │ │ + 0x000dbe50 28000000 1c030000 29000000 5ec80000 (.......)...^... │ │ + 0x000dbe60 29000000 14010000 24000000 27920000 ).......$...'... │ │ + 0x000dbe70 4f000000 68040000 24000000 16c80000 O...h...$....... │ │ + 0x000dbe80 47000000 9c030000 2f000000 16c80000 G......./....... │ │ + 0x000dbe90 47000000 94030000 2f000000 16c80000 G......./....... │ │ + 0x000dbea0 47000000 88030000 2b000000 16c80000 G.......+....... │ │ + 0x000dbeb0 47000000 a0030000 31000000 27920000 G.......1...'... │ │ + 0x000dbec0 4f000000 cd010000 37000000 00000000 O.......7....... │ │ + 0x000dbed0 08000000 04000000 05340900 02f60000 .........4...... │ │ + 0x000dbee0 6a000000 6d000000 0d000000 9c9c0000 j...m........... │ │ + 0x000dbef0 47000000 ad010000 21000000 16c80000 G.......!....... │ │ + 0x000dbf00 47000000 ce030000 2f000000 16c80000 G......./....... │ │ + 0x000dbf10 47000000 c7030000 2f000000 16c80000 G......./....... │ │ + 0x000dbf20 47000000 bc030000 2b000000 16c80000 G.......+....... │ │ + 0x000dbf30 47000000 d2030000 27000000 713f0900 G.......'...q?.. │ │ + 0x000dbf40 0c000000 04000000 7f3f0900 c4e50000 .........?...... │ │ + 0x000dbf50 27000000 b9000000 25000000 c4e50000 '.......%....... │ │ + 0x000dbf60 27000000 b2010000 14000000 c4e50000 '............... │ │ + 0x000dbf70 27000000 c5010000 18000000 e49c0000 '............... │ │ + 0x000dbf80 2b000000 62010000 29000000 e49c0000 +...b...)....... │ │ + 0x000dbf90 2b000000 cd000000 33000000 28fb0000 +.......3...(... │ │ + 0x000dbfa0 55000000 09030000 0a000000 28fb0000 U...........(... │ │ + 0x000dbfb0 55000000 f4020000 1a000000 28fb0000 U...........(... │ │ + 0x000dbfc0 55000000 4f010000 12000000 29b50000 U...O.......)... │ │ + 0x000dbfd0 51000000 c8010000 2a000000 29b50000 Q.......*...)... │ │ + 0x000dbfe0 51000000 ca010000 39000000 ece50000 Q.......9....... │ │ + 0x000dbff0 51000000 1f010000 2b000000 ece50000 Q.......+....... │ │ + 0x000dc000 51000000 86000000 3a000000 ece50000 Q.......:....... │ │ + 0x000dc010 51000000 7e000000 41000000 ece50000 Q...~...A....... │ │ + 0x000dc020 51000000 ed000000 2b000000 ece50000 Q.......+....... │ │ + 0x000dc030 51000000 09010000 26000000 ece50000 Q.......&....... │ │ + 0x000dc040 51000000 0b010000 27000000 ece50000 Q.......'....... │ │ + 0x000dc050 51000000 0b010000 4b000000 ece50000 Q.......K....... │ │ + 0x000dc060 51000000 0f010000 27000000 ece50000 Q.......'....... │ │ + 0x000dc070 51000000 0f010000 4b000000 ece50000 Q.......K....... │ │ + 0x000dc080 51000000 15010000 40000000 3ad20000 Q.......@...:... │ │ + 0x000dc090 52000000 95010000 2a000000 3ad20000 R.......*...:... │ │ + 0x000dc0a0 52000000 97010000 39000000 dea70000 R.......9....... │ │ + 0x000dc0b0 52000000 5c000000 2b000000 dea70000 R...\...+....... │ │ + 0x000dc0c0 52000000 3a000000 28000000 dea70000 R...:...(....... │ │ + 0x000dc0d0 52000000 bc000000 2b000000 dea70000 R.......+....... │ │ + 0x000dc0e0 52000000 a2000000 2b000000 dea70000 R.......+....... │ │ + 0x000dc0f0 52000000 ad000000 2f000000 dea70000 R......./....... │ │ + 0x000dc100 52000000 99000000 2b000000 68cd0000 R.......+...h... │ │ + 0x000dc110 54000000 30000000 1e000000 88d60000 T...0........... │ │ + 0x000dc120 4f000000 df010000 19000000 21680900 O...........!h.. │ │ + 0x000dc130 18000000 04000000 e7680900 dd880900 .........h...... │ │ + 0x000dc140 08000000 04000000 dd8d0900 dd880900 ................ │ │ + 0x000dc150 08000000 04000000 dd8d0900 9d670900 .............g.. │ │ + 0x000dc160 08000000 04000000 59490900 dd880900 ........YI...... │ │ + 0x000dc170 08000000 04000000 dd8d0900 dd880900 ................ │ │ + 0x000dc180 08000000 04000000 dd8d0900 9fff0000 ................ │ │ + 0x000dc190 63000000 23050000 35000000 9fff0000 c...#...5....... │ │ + 0x000dc1a0 63000000 09050000 22000000 9fff0000 c......."....... │ │ + 0x000dc1b0 63000000 75070000 36000000 9fff0000 c...u...6....... │ │ + 0x000dc1c0 63000000 5b070000 22000000 53720100 c...[..."...Sr.. │ │ + 0x000dc1d0 20620100 44620100 74720100 4e720100 b..Db..tr..Nr.. │ │ + 0x000dc1e0 71720100 00000000 cd730100 5e720100 qr.......s..^r.. │ │ + 0x000dc1f0 6c720100 00000000 58720100 66720100 lr......Xr..fr.. │ │ + 0x000dc200 74620100 18620100 78720100 00000000 tb...b..xr...... │ │ + 0x000dc210 00000000 55720100 63720100 51720100 ....Ur..cr..Qr.. │ │ + 0x000dc220 79720100 00000000 5b720100 69720100 yr......[r..ir.. │ │ + 0x000dc230 77720100 85730100 8a730100 96730100 wr...s...s...s.. │ │ + 0x000dc240 a1730100 fc610100 50290100 e6870100 .s...a..P)...... │ │ + 0x000dc250 f7870100 40290100 80290100 09880100 ....@)...)...... │ │ + 0x000dc260 1c880100 2e880100 3b880100 49880100 ........;...I... │ │ + 0x000dc270 5e880100 6a880100 75880100 8a880100 ^...j...u....... │ │ + 0x000dc280 9f880100 ae880100 bc880100 cf880100 ................ │ │ + 0x000dc290 f5880100 2d890100 46890100 5d890100 ....-...F...]... │ │ + 0x000dc2a0 69890100 72890100 e0290100 7c890100 i...r....)..|... │ │ + 0x000dc2b0 93890100 a1890100 af890100 bc890100 ................ │ │ + 0x000dc2c0 54630100 d0890100 eb890100 90290100 Tc...........).. │ │ + 0x000dc2d0 f9890100 0f8a0100 248a0100 2f8a0100 ........$.../... │ │ + 0x000dc2e0 458a0100 528a0100 5d8a0100 688a0100 E...R...]...h... │ │ + 0x000dc2f0 04630100 d0290100 70910100 81910100 .c...)..p....... │ │ + 0x000dc300 90910100 9f910100 b1910100 c2910100 ................ │ │ + 0x000dc310 ce910100 f0290100 d7910100 e2910100 .....).......... │ │ + 0x000dc320 ec910100 a4900100 f9910100 06920100 ................ │ │ + 0x000dc330 12920100 23920100 35920100 43920100 ....#...5...C... │ │ + 0x000dc340 59920100 65920100 0c630100 70920100 Y...e....c..p... │ │ + 0x000dc350 79920100 84920100 8f920100 9c920100 y............... │ │ + 0x000dc360 a8920100 b4920100 44630100 c6920100 ........Dc...... │ │ + 0x000dc370 d4920100 e0920100 ef920100 02930100 ................ │ │ + 0x000dc380 0d930100 18930100 25930100 30930100 ........%...0... │ │ + 0x000dc390 3a930100 3f930100 04630100 d0290100 :...?....c...).. │ │ + 0x000dc3a0 70910100 81910100 90910100 9f910100 p............... │ │ + 0x000dc3b0 b1910100 c2910100 ce910100 f0290100 .............).. │ │ + 0x000dc3c0 d7910100 e2910100 ec910100 a4900100 ................ │ │ + 0x000dc3d0 f9910100 06920100 12920100 23920100 ............#... │ │ + 0x000dc3e0 35920100 43920100 59920100 65920100 5...C...Y...e... │ │ + 0x000dc3f0 0c630100 70920100 79920100 84920100 .c..p...y....... │ │ + 0x000dc400 8f920100 9c920100 a8920100 b4920100 ................ │ │ + 0x000dc410 44630100 c6920100 d4920100 e0920100 Dc.............. │ │ + 0x000dc420 ef920100 02930100 0d930100 18930100 ................ │ │ + 0x000dc430 25930100 30930100 3a930100 3f930100 %...0...:...?... │ │ + 0x000dc440 04630100 d0290100 70910100 81910100 .c...)..p....... │ │ + 0x000dc450 90910100 9f910100 b1910100 c2910100 ................ │ │ + 0x000dc460 ce910100 f0290100 d7910100 e2910100 .....).......... │ │ + 0x000dc470 ec910100 a4900100 f9910100 06920100 ................ │ │ + 0x000dc480 12920100 23920100 35920100 43920100 ....#...5...C... │ │ + 0x000dc490 59920100 65920100 0c630100 70920100 Y...e....c..p... │ │ + 0x000dc4a0 79920100 84920100 8f920100 9c920100 y............... │ │ + 0x000dc4b0 a8920100 b4920100 44630100 c6920100 ........Dc...... │ │ + 0x000dc4c0 d4920100 e0920100 ef920100 02930100 ................ │ │ + 0x000dc4d0 0d930100 18930100 25930100 30930100 ........%...0... │ │ + 0x000dc4e0 3a930100 3f930100 95dc0000 c7fb0000 :...?........... │ │ + 0x000dc4f0 52000100 80f60000 a6f60000 2ae10000 R...........*... │ │ + 0x000dc500 c1dc0000 5aba0000 4abd0000 05890000 ....Z...J....... │ │ + 0x000dc510 00000000 b4b00000 7fbd0000 8bba0000 ................ │ │ + 0x000dc520 56860000 5de10000 7f000100 089a0000 V...]........... │ │ + 0x000dc530 55c30000 83e60000 bfc30000 dc8e0000 U............... │ │ + 0x000dc540 00000d00 00000000 9b9c0000 d5e10000 ................ │ │ + 0x000dc550 9b9c0000 9b9c0000 9f890000 820b0200 ................ │ │ + 0x000dc560 00000000 00000000 24730d00 28730d00 ........$s..(s.. │ │ + 0x000dc570 2c730d00 40730d00 28740d00 10750d00 ,s..@s..(t...u.. │ │ + 0x000dc580 24750d00 2c760d00 3c770d00 cc770d00 $u..,v..