--- /home/fdroid/fdroiddata/tmp/com.arxlibertatis_7.apk +++ /home/fdroid/fdroiddata/tmp/sigcp_com.arxlibertatis_7.apk ├── /usr/lib/android-sdk/build-tools/debian/apksigner verify --verbose --print-certs {} │┄ error from `/usr/lib/android-sdk/build-tools/debian/apksigner verify --verbose --print-certs {}` (b): │┄ DOES NOT VERIFY │┄ ERROR: APK Signature Scheme v3 signer #1: APK integrity check failed. CHUNKED_SHA256 digest mismatch. Expected: <2f33f72532c6a93f9118a698bd8794ce68796b0ccc52b5f54858b765326e0b9a>, actual: │┄ ERROR: APK Signature Scheme v3 signer #1: APK integrity check failed. VERITY_CHUNKED_SHA256 digest mismatch. Expected: , actual: │ @@ -1,16 +0,0 @@ │ -Verifies │ -Verified using v1 scheme (JAR signing): false │ -Verified using v2 scheme (APK Signature Scheme v2): true │ -Verified using v3 scheme (APK Signature Scheme v3): true │ -Verified using v4 scheme (APK Signature Scheme v4): false │ -Verified for SourceStamp: false │ -Number of signers: 1 │ -Signer #1 certificate DN: CN=FDroid, OU=FDroid, O=fdroid.org, L=ORG, ST=ORG, C=UK │ -Signer #1 certificate SHA-256 digest: fdbfe4d72f30cf47c3ad4ec73e7c23636c212f332754c6a091d8e868e537b94a │ -Signer #1 certificate SHA-1 digest: 3d5feabc9f20ae7bc95686999925539ea95d0252 │ -Signer #1 certificate MD5 digest: f2835da8d0130b13c3556caf103da8a7 │ -Signer #1 key algorithm: RSA │ -Signer #1 key size (bits): 2048 │ -Signer #1 public key SHA-256 digest: e39bc5e41e800dda676797f7e5d70fd21f90779dcbe12a1588d4dd78740880d0 │ -Signer #1 public key SHA-1 digest: ffebb41e152546a46c716493edcc7b84c771dfb9 │ -Signer #1 public key MD5 digest: f867855cc987d9830531b0fa9c65b3b9 ├── zipinfo -v {} │ @@ -202,15 +202,15 @@ │ version of encoding software: 0.0 │ minimum file system compatibility required: MS-DOS, OS/2 or NT FAT │ minimum software version required to extract: 0.0 │ compression method: none (stored) │ file security status: not encrypted │ extended local header: no │ file last modified on (DOS date/time): 1981 Jan 1 01:01:02 │ - 32-bit CRC value (hex): 3f56f2e3 │ + 32-bit CRC value (hex): 94956c86 │ compressed size: 1270120 bytes │ uncompressed size: 1270120 bytes │ length of filename: 22 characters │ length of extra field: 0 bytes │ length of file comment: 0 characters │ disk number on which file begins: disk 1 │ apparent file type: binary │ @@ -412,15 +412,15 @@ │ version of encoding software: 0.0 │ minimum file system compatibility required: MS-DOS, OS/2 or NT FAT │ minimum software version required to extract: 0.0 │ compression method: none (stored) │ file security status: not encrypted │ extended local header: no │ file last modified on (DOS date/time): 1981 Jan 1 01:01:02 │ - 32-bit CRC value (hex): 476e7573 │ + 32-bit CRC value (hex): 4b3d0e86 │ compressed size: 983868 bytes │ uncompressed size: 983868 bytes │ length of filename: 24 characters │ length of extra field: 0 bytes │ length of file comment: 0 characters │ disk number on which file begins: disk 1 │ apparent file type: binary │ @@ -622,15 +622,15 @@ │ version of encoding software: 0.0 │ minimum file system compatibility required: MS-DOS, OS/2 or NT FAT │ minimum software version required to extract: 0.0 │ compression method: none (stored) │ file security status: not encrypted │ extended local header: no │ file last modified on (DOS date/time): 1981 Jan 1 01:01:02 │ - 32-bit CRC value (hex): dfe007ba │ + 32-bit CRC value (hex): 11b0ff8c │ compressed size: 1499020 bytes │ uncompressed size: 1499020 bytes │ length of filename: 16 characters │ length of extra field: 0 bytes │ length of file comment: 0 characters │ disk number on which file begins: disk 1 │ apparent file type: binary │ @@ -832,15 +832,15 @@ │ version of encoding software: 0.0 │ minimum file system compatibility required: MS-DOS, OS/2 or NT FAT │ minimum software version required to extract: 0.0 │ compression method: none (stored) │ file security status: not encrypted │ extended local header: no │ file last modified on (DOS date/time): 1981 Jan 1 01:01:02 │ - 32-bit CRC value (hex): 2662bce9 │ + 32-bit CRC value (hex): 0d4cd079 │ compressed size: 1362208 bytes │ uncompressed size: 1362208 bytes │ length of filename: 19 characters │ length of extra field: 0 bytes │ length of file comment: 0 characters │ disk number on which file begins: disk 1 │ apparent file type: binary ├── lib/armeabi-v7a/libGL.so │┄ File has been modified after NT_GNU_BUILD_ID has been applied. │ ├── readelf --wide --notes {} │ │ @@ -1,8 +1,8 @@ │ │ │ │ Displaying notes found in: .note.android.ident │ │ Owner Data size Description │ │ Android 0x00000084 NT_VERSION (version) description data: 18 00 00 00 72 32 37 63 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 31 32 34 37 39 30 31 38 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 │ │ │ │ Displaying notes found in: .note.gnu.build-id │ │ Owner Data size Description │ │ - GNU 0x00000014 NT_GNU_BUILD_ID (unique build ID bitstring) Build ID: 37a53f4fbf2d2f313e6448fd241f0d0dd91b9f8d │ │ + GNU 0x00000014 NT_GNU_BUILD_ID (unique build ID bitstring) Build ID: bfb53cbe0cd42ad0ecf5ece3a56eb11f04239d6c │ ├── strings --all --bytes=8 {} │ │ @@ -1617,15 +1617,14 @@ │ │ gl4es_FragDepthTemp │ │ , 0., 0.) │ │ Invalid texture instruction │ │ Invalid texture ID (ID too big) │ │ gl4es_glBlendFunc │ │ glGenBuffers │ │ /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/buffers.c │ │ -Dec 8 2024 │ │ GL_TEXTURE_1D │ │ GL_TEXTURE_CUBE_MAP_NEGATIVE_Z │ │ GL_RGBA4 │ │ GL_ALPHA16F │ │ GL_UNSIGNED_SHORT_4_4_4_4_REV │ │ GL_WRITE_ONLY │ │ GL_TEXTURE9 │ │ @@ -2077,14 +2076,15 @@ │ │ No param given │ │ Too many operands │ │ gl4es_glBlendEquation │ │ warning, %s line %d function %s: gles_glClientActiveTexture is NULL │ │ glCreateShader │ │ warning, %s line %d function %s: gles_glBindBuffer is NULL │ │ v%d.%d.%d built on %s %s │ │ +Dec 10 2024 │ │ GL_READ_FRAMEBUFFER │ │ GL_RGB16F │ │ GL_TRIANGLE_STRIP │ │ GL_TEXTURE_GEN_Q │ │ GL_LIGHT0 │ │ GL_SHADER_TYPE │ │ GL_SUBTRACT │ │ @@ -2845,15 +2845,14 @@ │ │ ) / exp2(floor(log2(abs( │ │ gl_ModelViewProjectionMatrixInverse │ │ Not a valid single param │ │ Cannot redeclare variable │ │ Cannot alias to inexistant variable │ │ Invalid texture sampler (shouldn't happen here) │ │ warning, %s line %d function %s: egl_eglGetProcAddress is NULL │ │ -19:08:55 │ │ GL_RENDERBUFFER │ │ GL_RGB32F │ │ GL_RGB10_A2 │ │ GL_UNSIGNED_INT_8_8_8_8 │ │ GL_STATIC_DRAW │ │ GL_STREAM_DRAW │ │ GL_TEXTURE0 │ │ @@ -3186,14 +3185,15 @@ │ │ Unknown option │ │ gl4es_glBlendColor │ │ glBlendEquationSeparateOES │ │ glClientActiveTexture │ │ gl4es_blitTexture_gles2 │ │ glUseProgram │ │ glBufferSubData │ │ +20:41:14 │ │ GL_INVALID_ENUM │ │ GL_DEPTH_STENCIL │ │ GL_REPEAT │ │ GL_LINEAR_ATTENUATION │ │ GL_BLEND │ │ GL_SCISSOR_TEST │ │ GL_DELETE_STATUS │ ├── readelf --wide --decompress --string-dump=.rodata {} │ │ @@ -399,505 +399,505 @@ │ │ [ 244d] %s[%d] │ │ [ 2454] , 0., 0.) │ │ [ 245e] Invalid texture instruction │ │ [ 247a] Invalid texture ID (ID too big) │ │ [ 249a] gl4es_glBlendFunc │ │ [ 24ac] glGenBuffers │ │ [ 24b9] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/buffers.c │ │ - [ 2509] Dec 8 2024 │ │ - [ 2515] GL_TEXTURE_1D │ │ - [ 2523] GL_TEXTURE_CUBE_MAP_NEGATIVE_Z │ │ - [ 2542] GL_RGBA4 │ │ - [ 254b] GL_ALPHA16F │ │ - [ 2557] GL_UNSIGNED_SHORT_4_4_4_4_REV │ │ - [ 2575] GL_WRITE_ONLY │ │ - [ 2583] GL_TEXTURE9 │ │ - [ 258f] GL_TEXTURE12 │ │ - [ 259c] GL_TEXTURE15 │ │ - [ 25a9] GL_PROJECTION │ │ - [ 25b7] GL_MAX_TEXTURE_IMAGE_UNITS │ │ - [ 25d2] GL_MAX_PROGRAM_TEX_INSTRUCTIONS_ARB │ │ - [ 25f6] GL_PROGRAM_TEX_INSTRUCTIONS_ARB │ │ - [ 2616] EGL_BAD_ALLOC │ │ - [ 2624] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/fog.c │ │ - [ 2670] LIBGL: FPE ARB Vertex program compile failed: ARB source is\n │ │ + [ 2509] GL_TEXTURE_1D │ │ + [ 2517] GL_TEXTURE_CUBE_MAP_NEGATIVE_Z │ │ + [ 2536] GL_RGBA4 │ │ + [ 253f] GL_ALPHA16F │ │ + [ 254b] GL_UNSIGNED_SHORT_4_4_4_4_REV │ │ + [ 2569] GL_WRITE_ONLY │ │ + [ 2577] GL_TEXTURE9 │ │ + [ 2583] GL_TEXTURE12 │ │ + [ 2590] GL_TEXTURE15 │ │ + [ 259d] GL_PROJECTION │ │ + [ 25ab] GL_MAX_TEXTURE_IMAGE_UNITS │ │ + [ 25c6] GL_MAX_PROGRAM_TEX_INSTRUCTIONS_ARB │ │ + [ 25ea] GL_PROGRAM_TEX_INSTRUCTIONS_ARB │ │ + [ 260a] EGL_BAD_ALLOC │ │ + [ 2618] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/fog.c │ │ + [ 2664] LIBGL: FPE ARB Vertex program compile failed: ARB source is\n │ │ %s\n │ │ =======\n │ │ GLSL source is\n │ │ %s\n │ │ Error is: %s\n │ │ - [ 26d7] _gl4es_ClipPlane[ │ │ - [ 26e9] _gl4es_Vertex_ProgramLocal_ │ │ - [ 2705] _gl4es_SamplerCube_ │ │ - [ 2719] .specular │ │ - [ 2723] 0123456789ABCDEF │ │ - [ 2734] // ** Vertex Shader **\n │ │ + [ 26cb] _gl4es_ClipPlane[ │ │ + [ 26dd] _gl4es_Vertex_ProgramLocal_ │ │ + [ 26f9] _gl4es_SamplerCube_ │ │ + [ 270d] .specular │ │ + [ 2717] 0123456789ABCDEF │ │ + [ 2728] // ** Vertex Shader **\n │ │ // ligthting=%d (twosided=%d, separate=%d, color_material=%d)\n │ │ // secondary=%d, planes=%s\n │ │ // point=%d%s\n │ │ - [ 27b3] uniform _gl4es_LightProducts _gl4es_FrontLightProduct_%d;\n │ │ - [ 27ee] + │ │ - [ 27f0] %s = min(%s.a, 1.0-%s.a);\n │ │ - [ 280c] %s.rgb = %s.rgb;\n │ │ - [ 281f] attribute lowp vec4 _gl4es_Color;\n │ │ - [ 2842] glGenFramebuffersOES │ │ - [ 2857] glGetFramebufferAttachmentParameteriv │ │ - [ 287d] gl4es_glClearBufferuiv │ │ - [ 2894] glDrawTexi │ │ - [ 289f] glIsTexture │ │ - [ 28ab] glLightModelf │ │ - [ 28b9] glPointSizePointerOES │ │ - [ 28cf] glReleaseShaderCompiler │ │ - [ 28e7] glRotatex │ │ - [ 28f1] glScissor │ │ - [ 28fb] glUniform2i │ │ - [ 2907] glVertexAttrib1fv │ │ - [ 2919] glRenderbufferStorageMultisample │ │ - [ 293a] glBindRenderbufferEXT │ │ - [ 2950] glRasterPos2b │ │ - [ 295e] glRasterPos4b │ │ - [ 296c] glWindowPos3b │ │ - [ 297a] glMultiTexCoord4b │ │ - [ 298c] glRasterPos2dv │ │ - [ 299b] glVertex2dv │ │ - [ 29a7] glTexCoord4dv │ │ - [ 29b5] glMultiTexCoord1dvEXT │ │ - [ 29cb] glRasterPos2i │ │ - [ 29d9] glColor4s │ │ - [ 29e3] glMultiTexCoord3svEXT │ │ - [ 29f9] glIndexubv │ │ - [ 2a04] glWindowPos3ub │ │ - [ 2a13] glTexCoord4ubv │ │ - [ 2a22] glMultiTexCoord1ubARB │ │ - [ 2a38] glMultiTexCoord2ubvARB │ │ - [ 2a4f] glTexCoord2uiv │ │ - [ 2a5e] glColor3us │ │ - [ 2a69] glMultiTexCoord3usEXT │ │ - [ 2a7f] glRasterPos4fv │ │ - [ 2a8e] glMultiTexCoord3fARB │ │ - [ 2aa3] glBlendFuncSeparateARB │ │ - [ 2aba] glBlendFuncSeparateiEXT │ │ - [ 2ad2] glEvalPoint1 │ │ - [ 2adf] glGetMapdv │ │ - [ 2aea] glRects │ │ - [ 2af2] glRectiv │ │ - [ 2afb] glClearIndex │ │ - [ 2b08] glMatrixRotated │ │ - [ 2b18] glCompressedTextureImage3D │ │ - [ 2b33] glGetCompressedMultiTexImage │ │ - [ 2b50] glMatrixOrthoEXT │ │ - [ 2b61] glTextureSubImage1DEXT │ │ - [ 2b78] glMultiTexCoordPointerEXT │ │ - [ 2b92] glEnableIndexedEXT │ │ - [ 2ba5] glGetCompressedMultiTexImageEXT │ │ - [ 2bc5] glQueryCounter │ │ - [ 2bd4] glVertexAttrib1dARB │ │ - [ 2be8] glVertexAttrib4uivARB │ │ - [ 2bfe] glUniform3fARB │ │ - [ 2c0d] glUniform4fvARB │ │ - [ 2c1d] glShaderSourceEXT │ │ - [ 2c2f] glUniform4iEXT │ │ - [ 2c3e] glProgramUniform4ivEXT │ │ - [ 2c55] GL_EXT_blend_func_separate │ │ - [ 2c71] GL_EXT_blend_subtract │ │ - [ 2c88] gl4es_glColor4f │ │ - [ 2c98] gl4es_glFlush │ │ - [ 2ca6] stacktrace will be printed on crash\n │ │ - [ 2ccb] LIBGL_BLITFB0 │ │ - [ 2cd9] LIBGL_BLENDCOLOR │ │ - [ 2cea] Expose limited NPOT extension\n │ │ - [ 2d09] LIBGL_NODOWNSAMPLING │ │ - [ 2d1e] Don't use VAO cache\n │ │ - [ 2d33] Default wrap mode is GL_CLAMP_TO_EDGE\n │ │ - [ 2d5a] LIBGL_SHADERNOGLES │ │ - [ 2d6d] .gl4es.psa-highp │ │ - [ 2d7e] LIBGL_EGL │ │ - [ 2d88] so.2 │ │ - [ 2d8d] Error with ARB->GLSL conversion │ │ - [ 2dad] define │ │ - [ 2db4] warning, %s line %d function %s: gles_glGetProgramBinary is NULL\n │ │ - [ 2df6] gl4es_glScissor │ │ - [ 2e06] _gl4es_MultiTexCoord12 │ │ - [ 2e1d] mat4 │ │ - [ 2e22] gl_TextureMatrix_4 │ │ - [ 2e35] attribute %s %s %s;\n │ │ - [ 2e4a] gl_FogFragCoord │ │ - [ 2e5a] _gl4es_TexCoord_%d │ │ - [ 2e6d] uniform %s%s %s[%d];\n │ │ - [ 2e83] mediump │ │ - [ 2e8c] _gl4es_LightModelParameters │ │ - [ 2ea8] _gl4es_LightSource │ │ - [ 2ebb] gl_Fog │ │ - [ 2ec2] gl_MaxTextureCoords │ │ - [ 2ed6] _gl4es_%s_ProgramEnv │ │ - [ 2eeb] gl4es_glStencilOp │ │ - [ 2efd] warning, %s line %d function %s: gles_glTexEnvx is NULL\n │ │ - [ 2f36] Blend Subtract is in core, and so used\n │ │ - [ 2f5e] GL_EXT_frag_depth │ │ - [ 2f71] + │ │ - [ 2f75] gl_VertexAttrib_%s │ │ - [ 2f88] front │ │ - [ 2f8e] material │ │ - [ 2f97] %s[%s].%s │ │ - [ 2fa1] modelview │ │ - [ 2fab] Addresses are only allowed in vertex shaders │ │ - [ 2fd8] Too many arguments │ │ - [ 2feb] warning, %s line %d function %s: gles_glGenBuffers is NULL\n │ │ - [ 3027] GL_INVALID_OPERATION │ │ - [ 303c] GL_TEXTURE_CUBE_MAP_POSITIVE_X │ │ - [ 305b] GL_R │ │ - [ 3060] GL_RGBA16F │ │ - [ 306b] GL_LIGHT2 │ │ - [ 3075] GL_SPOT_EXPONENT │ │ - [ 3086] GL_BOOL_VEC4 │ │ - [ 3093] GL_SAMPLER_CUBE │ │ - [ 30a3] GL_DOT3_RGBA │ │ - [ 30b0] GL_ALPHA_SCALE │ │ - [ 30bf] EGL_BAD_CONFIG │ │ - [ 30ce] glDrawElementsCommon │ │ - [ 30e3] source of fragment shader is \n │ │ + [ 27a7] uniform _gl4es_LightProducts _gl4es_FrontLightProduct_%d;\n │ │ + [ 27e2] + │ │ + [ 27e4] %s = min(%s.a, 1.0-%s.a);\n │ │ + [ 2800] %s.rgb = %s.rgb;\n │ │ + [ 2813] attribute lowp vec4 _gl4es_Color;\n │ │ + [ 2836] glGenFramebuffersOES │ │ + [ 284b] glGetFramebufferAttachmentParameteriv │ │ + [ 2871] gl4es_glClearBufferuiv │ │ + [ 2888] glDrawTexi │ │ + [ 2893] glIsTexture │ │ + [ 289f] glLightModelf │ │ + [ 28ad] glPointSizePointerOES │ │ + [ 28c3] glReleaseShaderCompiler │ │ + [ 28db] glRotatex │ │ + [ 28e5] glScissor │ │ + [ 28ef] glUniform2i │ │ + [ 28fb] glVertexAttrib1fv │ │ + [ 290d] glRenderbufferStorageMultisample │ │ + [ 292e] glBindRenderbufferEXT │ │ + [ 2944] glRasterPos2b │ │ + [ 2952] glRasterPos4b │ │ + [ 2960] glWindowPos3b │ │ + [ 296e] glMultiTexCoord4b │ │ + [ 2980] glRasterPos2dv │ │ + [ 298f] glVertex2dv │ │ + [ 299b] glTexCoord4dv │ │ + [ 29a9] glMultiTexCoord1dvEXT │ │ + [ 29bf] glRasterPos2i │ │ + [ 29cd] glColor4s │ │ + [ 29d7] glMultiTexCoord3svEXT │ │ + [ 29ed] glIndexubv │ │ + [ 29f8] glWindowPos3ub │ │ + [ 2a07] glTexCoord4ubv │ │ + [ 2a16] glMultiTexCoord1ubARB │ │ + [ 2a2c] glMultiTexCoord2ubvARB │ │ + [ 2a43] glTexCoord2uiv │ │ + [ 2a52] glColor3us │ │ + [ 2a5d] glMultiTexCoord3usEXT │ │ + [ 2a73] glRasterPos4fv │ │ + [ 2a82] glMultiTexCoord3fARB │ │ + [ 2a97] glBlendFuncSeparateARB │ │ + [ 2aae] glBlendFuncSeparateiEXT │ │ + [ 2ac6] glEvalPoint1 │ │ + [ 2ad3] glGetMapdv │ │ + [ 2ade] glRects │ │ + [ 2ae6] glRectiv │ │ + [ 2aef] glClearIndex │ │ + [ 2afc] glMatrixRotated │ │ + [ 2b0c] glCompressedTextureImage3D │ │ + [ 2b27] glGetCompressedMultiTexImage │ │ + [ 2b44] glMatrixOrthoEXT │ │ + [ 2b55] glTextureSubImage1DEXT │ │ + [ 2b6c] glMultiTexCoordPointerEXT │ │ + [ 2b86] glEnableIndexedEXT │ │ + [ 2b99] glGetCompressedMultiTexImageEXT │ │ + [ 2bb9] glQueryCounter │ │ + [ 2bc8] glVertexAttrib1dARB │ │ + [ 2bdc] glVertexAttrib4uivARB │ │ + [ 2bf2] glUniform3fARB │ │ + [ 2c01] glUniform4fvARB │ │ + [ 2c11] glShaderSourceEXT │ │ + [ 2c23] glUniform4iEXT │ │ + [ 2c32] glProgramUniform4ivEXT │ │ + [ 2c49] GL_EXT_blend_func_separate │ │ + [ 2c65] GL_EXT_blend_subtract │ │ + [ 2c7c] gl4es_glColor4f │ │ + [ 2c8c] gl4es_glFlush │ │ + [ 2c9a] stacktrace will be printed on crash\n │ │ + [ 2cbf] LIBGL_BLITFB0 │ │ + [ 2ccd] LIBGL_BLENDCOLOR │ │ + [ 2cde] Expose limited NPOT extension\n │ │ + [ 2cfd] LIBGL_NODOWNSAMPLING │ │ + [ 2d12] Don't use VAO cache\n │ │ + [ 2d27] Default wrap mode is GL_CLAMP_TO_EDGE\n │ │ + [ 2d4e] LIBGL_SHADERNOGLES │ │ + [ 2d61] .gl4es.psa-highp │ │ + [ 2d72] LIBGL_EGL │ │ + [ 2d7c] so.2 │ │ + [ 2d81] Error with ARB->GLSL conversion │ │ + [ 2da1] define │ │ + [ 2da8] warning, %s line %d function %s: gles_glGetProgramBinary is NULL\n │ │ + [ 2dea] gl4es_glScissor │ │ + [ 2dfa] _gl4es_MultiTexCoord12 │ │ + [ 2e11] mat4 │ │ + [ 2e16] gl_TextureMatrix_4 │ │ + [ 2e29] attribute %s %s %s;\n │ │ + [ 2e3e] gl_FogFragCoord │ │ + [ 2e4e] _gl4es_TexCoord_%d │ │ + [ 2e61] uniform %s%s %s[%d];\n │ │ + [ 2e77] mediump │ │ + [ 2e80] _gl4es_LightModelParameters │ │ + [ 2e9c] _gl4es_LightSource │ │ + [ 2eaf] gl_Fog │ │ + [ 2eb6] gl_MaxTextureCoords │ │ + [ 2eca] _gl4es_%s_ProgramEnv │ │ + [ 2edf] gl4es_glStencilOp │ │ + [ 2ef1] warning, %s line %d function %s: gles_glTexEnvx is NULL\n │ │ + [ 2f2a] Blend Subtract is in core, and so used\n │ │ + [ 2f52] GL_EXT_frag_depth │ │ + [ 2f65] + │ │ + [ 2f69] gl_VertexAttrib_%s │ │ + [ 2f7c] front │ │ + [ 2f82] material │ │ + [ 2f8b] %s[%s].%s │ │ + [ 2f95] modelview │ │ + [ 2f9f] Addresses are only allowed in vertex shaders │ │ + [ 2fcc] Too many arguments │ │ + [ 2fdf] warning, %s line %d function %s: gles_glGenBuffers is NULL\n │ │ + [ 301b] GL_INVALID_OPERATION │ │ + [ 3030] GL_TEXTURE_CUBE_MAP_POSITIVE_X │ │ + [ 304f] GL_R │ │ + [ 3054] GL_RGBA16F │ │ + [ 305f] GL_LIGHT2 │ │ + [ 3069] GL_SPOT_EXPONENT │ │ + [ 307a] GL_BOOL_VEC4 │ │ + [ 3087] GL_SAMPLER_CUBE │ │ + [ 3097] GL_DOT3_RGBA │ │ + [ 30a4] GL_ALPHA_SCALE │ │ + [ 30b3] EGL_BAD_CONFIG │ │ + [ 30c2] glDrawElementsCommon │ │ + [ 30d7] source of fragment shader is \n │ │ %s\n │ │ Error is: %s\n │ │ - [ 3113] wb │ │ - [ 3116] Color = %s;\n │ │ - [ 3123] back_aa = %s.xyz * _gl4es_LightSource_%d.ambient.xyz;\n │ │ - [ 315a] ss = (nVP>0. && lVP>0.)?(%s%d.specular.xyz):vec3(0.);\n │ │ - [ 3191] uniform vec4 _gl4es_ObjectPlane%c_%d;\n │ │ - [ 31b8] Arg%d.rgb = %s.rgb;\n │ │ - [ 31cd] %s = _gl4es_BlendColor;\n │ │ - [ 31e7] %s = _gl4es_BlendColor.a;\n │ │ - [ 3203] %s.a = min(%s.a, 1.0-%s.a);\n │ │ - [ 3221] glDeleteFramebuffers │ │ - [ 3236] glClearDepthx │ │ - [ 3244] glDeleteProgram │ │ - [ 3254] glGetPointerv │ │ - [ 3262] glIsBuffer │ │ - [ 326d] glLineWidthx │ │ - [ 327a] glShaderBinary │ │ - [ 3289] glMapBuffer │ │ - [ 3295] glUnmapBuffer │ │ - [ 32a3] glUnmapNamedBuffer │ │ - [ 32b6] glRenderbufferStorageARB │ │ - [ 32cf] glIsRenderbufferARB │ │ - [ 32e3] glClearBufferfv │ │ - [ 32f3] glGetPointervEXT │ │ - [ 3304] glColor3bv │ │ - [ 330f] glTexCoord3bv │ │ - [ 331d] glMultiTexCoord1b │ │ - [ 332f] glMultiTexCoord3bv │ │ - [ 3342] glColor3iv │ │ - [ 334d] glTexCoord4iv │ │ - [ 335b] glMultiTexCoord3iEXT │ │ - [ 3370] glIndexs │ │ - [ 3379] glMultiTexCoord3sARB │ │ - [ 338e] glIndexub │ │ - [ 3398] glMultiTexCoord1ubvARB │ │ - [ 33af] glRasterPos2us │ │ - [ 33be] glTexCoord4us │ │ - [ 33cc] glRasterPos4f │ │ - [ 33da] glMultiTexCoord1fv │ │ - [ 33ed] glMultTransposeMatrixf │ │ - [ 3404] glAccum │ │ - [ 340c] glGetPixelMapfv │ │ - [ 341c] glMultiDrawElementsEXT │ │ - [ 3433] glMatrixTranslated │ │ - [ 3446] glGetMultiTexEnvfv │ │ - [ 3459] glCompressedMultiTexImage2D │ │ - [ 3475] glCompressedMultiTexImage1D │ │ - [ 3491] glMatrixRotatedEXT │ │ - [ 34a4] glMatrixScaledEXT │ │ - [ 34b6] glMultiTexImage2DEXT │ │ - [ 34cb] glSampleCoverageARB │ │ - [ 34df] glVertexAttrib4NbvARB │ │ - [ 34f5] glProgramUniformMatrix2fv │ │ - [ 350f] glIsProgramEXT │ │ - [ 351e] glUniform4fEXT │ │ - [ 352d] glProgramUniform3ivEXT │ │ - [ 3544] glDrawElementsInstancedBaseVertexEXT │ │ - [ 3569] glSamplerParameterIiv │ │ - [ 357f] glGetSamplerParameterIiv │ │ - [ 3598] GL_EXT_blend_equation_separate │ │ - [ 35b8] ptitSeb │ │ - [ 35c0] GL4ES wrapper │ │ - [ 35ce] warning, %s line %d function %s: gles_glColor4f is NULL\n │ │ - [ 3607] warning, %s line %d function %s: gles_glAlphaFunc is NULL\n │ │ - [ 3642] free_framebuffer │ │ - [ 3653] Main FBO has no alpha channel\n │ │ - [ 3672] LIBGL_NODEPTHTEX │ │ - [ 3683] Texture shrink, mode 9 selected (advertise 8192 max texture size, but >4096 are quadshrinked and > 512 are shrinked), but not for empty textures\n │ │ - [ 3715] LIBGL_POTFRAMEBUFFER │ │ - [ 372a] LIBGL_BATCH │ │ - [ 3736] Vertex │ │ - [ 373f] LIBGL_GLXNATIVE │ │ - [ 374f] Don't use PrecompiledShaderArchive\n │ │ - [ 3773] ARX_DATA_PATH │ │ - [ 3781] /opt/vc/lib/ │ │ - [ 378e] Error with GLSL->GLSL:ES conversion │ │ - [ 37b2] No Shader support with current backend │ │ - [ 37d9] gl_TextureMatrix_1 │ │ - [ 37ec] gl_FogParameters │ │ - [ 37fd] _gl4es_EyePlaneQ │ │ - [ 380e] struct gl_MaterialParameters\n │ │ + [ 3107] wb │ │ + [ 310a] Color = %s;\n │ │ + [ 3117] back_aa = %s.xyz * _gl4es_LightSource_%d.ambient.xyz;\n │ │ + [ 314e] ss = (nVP>0. && lVP>0.)?(%s%d.specular.xyz):vec3(0.);\n │ │ + [ 3185] uniform vec4 _gl4es_ObjectPlane%c_%d;\n │ │ + [ 31ac] Arg%d.rgb = %s.rgb;\n │ │ + [ 31c1] %s = _gl4es_BlendColor;\n │ │ + [ 31db] %s = _gl4es_BlendColor.a;\n │ │ + [ 31f7] %s.a = min(%s.a, 1.0-%s.a);\n │ │ + [ 3215] glDeleteFramebuffers │ │ + [ 322a] glClearDepthx │ │ + [ 3238] glDeleteProgram │ │ + [ 3248] glGetPointerv │ │ + [ 3256] glIsBuffer │ │ + [ 3261] glLineWidthx │ │ + [ 326e] glShaderBinary │ │ + [ 327d] glMapBuffer │ │ + [ 3289] glUnmapBuffer │ │ + [ 3297] glUnmapNamedBuffer │ │ + [ 32aa] glRenderbufferStorageARB │ │ + [ 32c3] glIsRenderbufferARB │ │ + [ 32d7] glClearBufferfv │ │ + [ 32e7] glGetPointervEXT │ │ + [ 32f8] glColor3bv │ │ + [ 3303] glTexCoord3bv │ │ + [ 3311] glMultiTexCoord1b │ │ + [ 3323] glMultiTexCoord3bv │ │ + [ 3336] glColor3iv │ │ + [ 3341] glTexCoord4iv │ │ + [ 334f] glMultiTexCoord3iEXT │ │ + [ 3364] glIndexs │ │ + [ 336d] glMultiTexCoord3sARB │ │ + [ 3382] glIndexub │ │ + [ 338c] glMultiTexCoord1ubvARB │ │ + [ 33a3] glRasterPos2us │ │ + [ 33b2] glTexCoord4us │ │ + [ 33c0] glRasterPos4f │ │ + [ 33ce] glMultiTexCoord1fv │ │ + [ 33e1] glMultTransposeMatrixf │ │ + [ 33f8] glAccum │ │ + [ 3400] glGetPixelMapfv │ │ + [ 3410] glMultiDrawElementsEXT │ │ + [ 3427] glMatrixTranslated │ │ + [ 343a] glGetMultiTexEnvfv │ │ + [ 344d] glCompressedMultiTexImage2D │ │ + [ 3469] glCompressedMultiTexImage1D │ │ + [ 3485] glMatrixRotatedEXT │ │ + [ 3498] glMatrixScaledEXT │ │ + [ 34aa] glMultiTexImage2DEXT │ │ + [ 34bf] glSampleCoverageARB │ │ + [ 34d3] glVertexAttrib4NbvARB │ │ + [ 34e9] glProgramUniformMatrix2fv │ │ + [ 3503] glIsProgramEXT │ │ + [ 3512] glUniform4fEXT │ │ + [ 3521] glProgramUniform3ivEXT │ │ + [ 3538] glDrawElementsInstancedBaseVertexEXT │ │ + [ 355d] glSamplerParameterIiv │ │ + [ 3573] glGetSamplerParameterIiv │ │ + [ 358c] GL_EXT_blend_equation_separate │ │ + [ 35ac] ptitSeb │ │ + [ 35b4] GL4ES wrapper │ │ + [ 35c2] warning, %s line %d function %s: gles_glColor4f is NULL\n │ │ + [ 35fb] warning, %s line %d function %s: gles_glAlphaFunc is NULL\n │ │ + [ 3636] free_framebuffer │ │ + [ 3647] Main FBO has no alpha channel\n │ │ + [ 3666] LIBGL_NODEPTHTEX │ │ + [ 3677] Texture shrink, mode 9 selected (advertise 8192 max texture size, but >4096 are quadshrinked and > 512 are shrinked), but not for empty textures\n │ │ + [ 3709] LIBGL_POTFRAMEBUFFER │ │ + [ 371e] LIBGL_BATCH │ │ + [ 372a] Vertex │ │ + [ 3733] LIBGL_GLXNATIVE │ │ + [ 3743] Don't use PrecompiledShaderArchive\n │ │ + [ 3767] ARX_DATA_PATH │ │ + [ 3775] /opt/vc/lib/ │ │ + [ 3782] Error with GLSL->GLSL:ES conversion │ │ + [ 37a6] No Shader support with current backend │ │ + [ 37cd] gl_TextureMatrix_1 │ │ + [ 37e0] gl_FogParameters │ │ + [ 37f1] _gl4es_EyePlaneQ │ │ + [ 3802] struct gl_MaterialParameters\n │ │ {\n │ │ vec4 emission;\n │ │ vec4 ambient;\n │ │ vec4 diffuse;\n │ │ vec4 specular;\n │ │ float shininess;\n │ │ };\n │ │ uniform gl_MaterialParameters gl_FrontMaterial;\n │ │ uniform gl_MaterialParameters gl_BackMaterial;\n │ │ - [ 38ea] uniform vec4 gl_EyePlaneR[gl_MaxTextureCoords];\n │ │ - [ 391b] uniform vec4 gl_EyePlaneQ[gl_MaxTextureCoords];\n │ │ - [ 394c] gl4es_glBindTexture │ │ - [ 3960] warning, %s line %d function %s: gles_glPointParameterxv is NULL\n │ │ - [ 39a2] warning, %s line %d function %s: gles_glTexParameterxv is NULL\n │ │ - [ 39e2] glColorTable │ │ - [ 39ef] GetHardwareExtensions │ │ - [ 3a05] warning, %s line %d function %s: egl_eglDestroySurface is NULL\n │ │ - [ 3a45] FBO are in core, and so used\n │ │ - [ 3a63] , │ │ - [ 3a66] ), 1.) │ │ - [ 3a6d] , 0.0), ( │ │ - [ 3a77] lightprod │ │ - [ 3a81] local │ │ - [ 3a87] OPTION │ │ - [ 3a8e] Unknown error │ │ - [ 3a9c] Unknown error (unintended fallthrough?) │ │ - [ 3ac4] glBlendEquationSeparate │ │ - [ 3adc] glShaderSource │ │ - [ 3aeb] Failed to produce blit vertex shader.\n │ │ + [ 38de] uniform vec4 gl_EyePlaneR[gl_MaxTextureCoords];\n │ │ + [ 390f] uniform vec4 gl_EyePlaneQ[gl_MaxTextureCoords];\n │ │ + [ 3940] gl4es_glBindTexture │ │ + [ 3954] warning, %s line %d function %s: gles_glPointParameterxv is NULL\n │ │ + [ 3996] warning, %s line %d function %s: gles_glTexParameterxv is NULL\n │ │ + [ 39d6] glColorTable │ │ + [ 39e3] GetHardwareExtensions │ │ + [ 39f9] warning, %s line %d function %s: egl_eglDestroySurface is NULL\n │ │ + [ 3a39] FBO are in core, and so used\n │ │ + [ 3a57] , │ │ + [ 3a5a] ), 1.) │ │ + [ 3a61] , 0.0), ( │ │ + [ 3a6b] lightprod │ │ + [ 3a75] local │ │ + [ 3a7b] OPTION │ │ + [ 3a82] Unknown error │ │ + [ 3a90] Unknown error (unintended fallthrough?) │ │ + [ 3ab8] glBlendEquationSeparate │ │ + [ 3ad0] glShaderSource │ │ + [ 3adf] Failed to produce blit vertex shader.\n │ │ %s │ │ - [ 3b14] gl4es_glBufferData │ │ - [ 3b27] unboundBuffers │ │ - [ 3b36] GL_RGB │ │ - [ 3b3d] GL_ALPHA │ │ - [ 3b46] GL_LUMINANCE16 │ │ - [ 3b55] GL_COLOR_ATTACHMENT1 │ │ - [ 3b6a] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/debug.c │ │ - [ 3bb8] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/depth.c │ │ - [ 3c06] custom:\n │ │ - [ 3c0f] LIBGL: FPE Custom Program link failed: %s\n │ │ - [ 3c3a] glEnableClientState │ │ - [ 3c4e] .sizeMax │ │ - [ 3c57] texture2D │ │ - [ 3c61] aa = %s.xyz * _gl4es_LightSource_%d.ambient.xyz;\n │ │ - [ 3c93] %s = (_gl4es_TextureMatrix_%d * %s);\n │ │ - [ 3cb9] FogSrc = vertex.z;\n │ │ - [ 3ccd] // Fog On: mode=%X, source=%X\n │ │ - [ 3cec] //Blend: src=%d/%d, dst=%d/%d, eq=%d/%d\n │ │ - [ 3d15] glGenFramebuffers │ │ - [ 3d27] gl4es_glGenerateMipmap │ │ - [ 3d3e] glFogCoordPointer │ │ - [ 3d50] glStencilFunc │ │ - [ 3d5e] glStencilMaskSeparate │ │ - [ 3d74] glUniform2iv │ │ - [ 3d81] glGetNamedBufferPointervEXT │ │ - [ 3d9d] glDeleteFramebuffersEXT │ │ - [ 3db5] glFramebufferTexture2DEXT │ │ - [ 3dcf] glFramebufferRenderbufferEXT │ │ - [ 3dec] glDeleteFramebuffersARB │ │ - [ 3e04] glClearBufferuiv │ │ - [ 3e15] glArrayElementEXT │ │ - [ 3e27] glSecondaryColor3bvEXT │ │ - [ 3e3e] glMultiTexCoord2dv │ │ - [ 3e51] glMultiTexCoord4ivEXT │ │ - [ 3e67] glMultiTexCoord2svARB │ │ - [ 3e7d] glMultiTexCoord3ubv │ │ - [ 3e91] glVertex3ui │ │ - [ 3e9d] glTexCoord3uiv │ │ - [ 3eac] glMultiTexCoord2uiv │ │ - [ 3ec0] glMultiTexCoord2uivARB │ │ - [ 3ed7] glIndexusv │ │ - [ 3ee2] glVertex2us │ │ - [ 3eee] glMultiTexCoord1usv │ │ - [ 3f02] glRasterPos3fv │ │ - [ 3f11] glWindowPos2f │ │ - [ 3f1f] glVertex3fv │ │ - [ 3f2b] glVertex4fv │ │ - [ 3f37] glDrawRangeElementsEXT │ │ - [ 3f4e] glPushName │ │ - [ 3f59] glTexSubImage3D │ │ - [ 3f69] GL4ES stub: %s\n │ │ - [ 3f79] glFeedbackBuffer │ │ - [ 3f8a] glMatrixFrustum │ │ - [ 3f9a] glMultiTexImage2D │ │ - [ 3fac] glCopyMultiTexImage1D │ │ - [ 3fc2] glEnableClientStateIndexed │ │ - [ 3fdd] glCompressedMultiTexSubImage1D │ │ - [ 3ffc] glCopyTextureImage1DEXT │ │ - [ 4014] glMultiTexImage1DEXT │ │ - [ 4029] glDisableVertexArrayEXT │ │ - [ 4041] glGetQueryObjectuiv │ │ - [ 4055] glVertexAttrib4Niv │ │ - [ 4068] glVertexAttrib2dARB │ │ - [ 407c] glVertexAttrib4ubvARB │ │ - [ 4092] glCompileShaderARB │ │ - [ 40a5] glProgramUniform2f │ │ - [ 40b8] glUniform2fvEXT │ │ - [ 40c8] glUniform2iEXT │ │ - [ 40d7] glVertexAttrib3fvEXT │ │ - [ 40ec] glVertexAttrib4fEXT │ │ - [ 4100] glIsProgramARB │ │ - [ 410f] 1.10 via gl4es │ │ - [ 411e] gl4es_glAlphaFunc │ │ - [ 4130] warning, %s line %d function %s: gles_glClear is NULL\n │ │ - [ 4167] Initialising gl4es\n │ │ - [ 417b] LIBGL_DRMCARD │ │ - [ 4189] Export GL_ARB_vertex_array_bgra extension\n │ │ - [ 41b4] NPOT texture handled in hardware\n │ │ - [ 41d6] warning, %s line %d function %s: gles_glLightModelfv is NULL\n │ │ - [ 4214] warning, %s line %d function %s: gles_glMaterialfv is NULL\n │ │ - [ 4250] LIBGL: Unsupported source data type: %s\n │ │ - [ 4279] glProgramBinaryOES │ │ - [ 428c] gl4es_glViewport │ │ - [ 429d] gl_MultiTexCoord7 │ │ - [ 42af] _gl4es_TModelViewMatrix │ │ - [ 42c7] gl_TextureMatrix_3 │ │ - [ 42da] _gl4es_TextureMatrix_12 │ │ - [ 42f2] _gl4es_TextureMatrix │ │ - [ 4308] //precision │ │ - [ 4314] textureCubeLodEXT │ │ - [ 4326] _gl4es_texture2DProjGrad │ │ - [ 433f] textureCubeGradEXT │ │ - [ 4352] transpose^I │ │ - [ 435d] gl_BackLightModelProduct │ │ - [ 4376] warning, %s line %d function %s: gles_glClearStencil is NULL\n │ │ - [ 43b4] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/texgen.c │ │ - [ 4403] warning, %s line %d function %s: gles_glCompressedTexSubImage2D is NULL\n │ │ - [ 444c] gl4es_glClearColor │ │ - [ 445f] warning, %s line %d function %s: gles_glFogxv is NULL\n │ │ - [ 4496] gl4es_glFogxv │ │ - [ 44a4] gl4es_glLightModelx │ │ - [ 44b8] and used\n │ │ - [ 44c3] : │ │ - [ 44c8] if (( │ │ - [ 44ce] gl_ModelViewMatrixTranspose │ │ - [ 44ea] 0.0 │ │ - [ 44ee] Invalid value (implicit param?) │ │ - [ 450e] glBlendEquationOES │ │ - [ 4521] GL_TEXTURE_CUBE_MAP_NEGATIVE_X │ │ - [ 4540] GL_TEXTURE_CUBE_MAP_POSITIVE_Z │ │ - [ 455f] GL_RGB5_A1 │ │ - [ 456a] GL_DOUBLE │ │ - [ 4574] GL_COLOR_ATTACHMENT2 │ │ - [ 4589] GL_EYE_LINEAR │ │ - [ 4597] GL_ACTIVE_UNIFORMS │ │ - [ 45aa] GL_NUM_PROGRAM_BINARY_FORMATS │ │ - [ 45c8] gl4es_glDepthRangef │ │ - [ 45dc] warning, %s line %d function %s: gles_glEnableClientState is NULL\n │ │ - [ 461f] warning, %s line %d function %s: gles_glDisableClientState is NULL\n │ │ - [ 4663] fpe_glDrawElementsInstanced │ │ - [ 467f] samplerStreamIMG │ │ - [ 4690] vec4(0.0) │ │ - [ 469a] uniform highp vec4 _gl4es_ClipPlane_%d;\n │ │ - [ 46c3] // light %d on, light_direction=%d, light_cutoff180=%d\n │ │ - [ 46fb] // end of light %d\n │ │ - [ 470f] npot adjusted │ │ - [ 471d] lowp float %s;\n │ │ - [ 472d] %s.rgb = vec3(0.0);\n │ │ - [ 4743] %s.a = %s.a;\n │ │ - [ 4752] glFramebufferRenderbufferOES │ │ - [ 476f] glGetShaderPrecisionFormat │ │ - [ 478a] glGetVertexAttribPointerv │ │ - [ 47a4] glProgramBinary │ │ - [ 47b4] glVertexAttrib2f │ │ - [ 47c5] glColorMaskIndexedEXT │ │ - [ 47db] glVertex4dv │ │ - [ 47e7] glMultiTexCoord3i │ │ - [ 47f9] glMultiTexCoord1iARB │ │ - [ 480e] glWindowPos3sv │ │ - [ 481d] glTexCoord2s │ │ - [ 482a] glMultiTexCoord2sEXT │ │ - [ 483f] glMultiTexCoord4sARB │ │ - [ 4854] glSecondaryColor3ub │ │ - [ 4868] glNormal3ub │ │ - [ 4874] glVertex3ub │ │ - [ 4880] glWindowPos2uiv │ │ - [ 4890] glTexCoord2us │ │ - [ 489e] glRasterPos2fv │ │ - [ 48ad] glBlendFuncSeparatei │ │ - [ 48c2] glGenLists │ │ - [ 48cd] glListBase │ │ - [ 48d8] glLoadName │ │ - [ 48e3] glMapGrid2f │ │ - [ 48ef] glCompressedTexImage3DEXT │ │ - [ 4909] glMultiTexEnvfv │ │ - [ 4919] glCompressedTextureImage1D │ │ - [ 4934] glGetTextureLevelParameterfvEXT │ │ - [ 4954] glVertexAttrib2sEXT │ │ - [ 4968] glVertexAttrib2d │ │ - [ 4979] glVertexAttrib3d │ │ - [ 498a] glVertexAttrib1svEXT │ │ - [ 499f] glVertexAttrib1dvARB │ │ - [ 49b4] glVertexAttrib3fvARB │ │ - [ 49c9] glProgramUniform1iv │ │ - [ 49dd] glGetProgramivEXT │ │ - [ 49ef] glVertexAttrib1fEXT │ │ - [ 4a03] glProgramUniform1fvEXT │ │ - [ 4a1a] glDrawElementsInstancedBaseVertex │ │ - [ 4a3c] glUniformMatrix4x2fv │ │ - [ 4a51] glProgramEnvParameter4fARB │ │ - [ 4a6c] glProgramLocalParameters4fvEXT │ │ - [ 4a8b] glGetSamplerParameterIuiv │ │ - [ 4aa5] warning, %s line %d function %s: gles_glGetString is NULL\n │ │ - [ 4ae0] gl4es_glGetIntegerv │ │ - [ 4af4] Texture shrink, mode 3 selected (only > 256 /2 )\n │ │ - [ 4b26] Texture shrink, mode 5 selected (every > 256 is downscaled to 256 ), but not for empty textures\n │ │ - [ 4b87] Expose GL_ARB_texture_non_power_of_two extension\n │ │ - [ 4bb9] No downsampling of DXTc textures\n │ │ - [ 4bdb] LIBGL_FORCENPOT │ │ - [ 4beb] Trying to batch subsequent glDrawXXXX of size between %d and %d vertices\n │ │ - [ 4c35] glX Will NOT try to recycle EGL Surface\n │ │ - [ 4c5e] LIBGL_SKIPTEXCOPIES │ │ - [ 4c72] gl4es_glMaterialfv │ │ - [ 4c85] warning, %s line %d function %s: gles_glPointParameterfv is NULL\n │ │ - [ 4cc7] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/pointsprite.c │ │ - [ 4d1b] pushViewport │ │ - [ 4d28] _gl4es_ModelViewMatrix │ │ - [ 4d3f] _gl4es_ITModelViewProjectionMatrix │ │ - [ 4d62] gl_TextureMatrix_5 │ │ - [ 4d75] (FPEShader generated) │ │ - [ 4d8c] mediump │ │ - [ 4d94] gl_LightSourceParameters │ │ - [ 4dad] _gl4es_FrontLightProduct │ │ - [ 4dc6] gl_NormalScale │ │ - [ 4dd5] _gl4es_MaxTextureCoords │ │ - [ 4ded] Fragment │ │ - [ 4df6] vec4 _gl4es_texture2DGrad(sampler2D sampler, vec2 coord, vec2 dPdx, vec2 dPdy) {\n │ │ + [ 3b08] gl4es_glBufferData │ │ + [ 3b1b] unboundBuffers │ │ + [ 3b2a] GL_RGB │ │ + [ 3b31] GL_ALPHA │ │ + [ 3b3a] GL_LUMINANCE16 │ │ + [ 3b49] GL_COLOR_ATTACHMENT1 │ │ + [ 3b5e] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/debug.c │ │ + [ 3bac] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/depth.c │ │ + [ 3bfa] custom:\n │ │ + [ 3c03] LIBGL: FPE Custom Program link failed: %s\n │ │ + [ 3c2e] glEnableClientState │ │ + [ 3c42] .sizeMax │ │ + [ 3c4b] texture2D │ │ + [ 3c55] aa = %s.xyz * _gl4es_LightSource_%d.ambient.xyz;\n │ │ + [ 3c87] %s = (_gl4es_TextureMatrix_%d * %s);\n │ │ + [ 3cad] FogSrc = vertex.z;\n │ │ + [ 3cc1] // Fog On: mode=%X, source=%X\n │ │ + [ 3ce0] //Blend: src=%d/%d, dst=%d/%d, eq=%d/%d\n │ │ + [ 3d09] glGenFramebuffers │ │ + [ 3d1b] gl4es_glGenerateMipmap │ │ + [ 3d32] glFogCoordPointer │ │ + [ 3d44] glStencilFunc │ │ + [ 3d52] glStencilMaskSeparate │ │ + [ 3d68] glUniform2iv │ │ + [ 3d75] glGetNamedBufferPointervEXT │ │ + [ 3d91] glDeleteFramebuffersEXT │ │ + [ 3da9] glFramebufferTexture2DEXT │ │ + [ 3dc3] glFramebufferRenderbufferEXT │ │ + [ 3de0] glDeleteFramebuffersARB │ │ + [ 3df8] glClearBufferuiv │ │ + [ 3e09] glArrayElementEXT │ │ + [ 3e1b] glSecondaryColor3bvEXT │ │ + [ 3e32] glMultiTexCoord2dv │ │ + [ 3e45] glMultiTexCoord4ivEXT │ │ + [ 3e5b] glMultiTexCoord2svARB │ │ + [ 3e71] glMultiTexCoord3ubv │ │ + [ 3e85] glVertex3ui │ │ + [ 3e91] glTexCoord3uiv │ │ + [ 3ea0] glMultiTexCoord2uiv │ │ + [ 3eb4] glMultiTexCoord2uivARB │ │ + [ 3ecb] glIndexusv │ │ + [ 3ed6] glVertex2us │ │ + [ 3ee2] glMultiTexCoord1usv │ │ + [ 3ef6] glRasterPos3fv │ │ + [ 3f05] glWindowPos2f │ │ + [ 3f13] glVertex3fv │ │ + [ 3f1f] glVertex4fv │ │ + [ 3f2b] glDrawRangeElementsEXT │ │ + [ 3f42] glPushName │ │ + [ 3f4d] glTexSubImage3D │ │ + [ 3f5d] GL4ES stub: %s\n │ │ + [ 3f6d] glFeedbackBuffer │ │ + [ 3f7e] glMatrixFrustum │ │ + [ 3f8e] glMultiTexImage2D │ │ + [ 3fa0] glCopyMultiTexImage1D │ │ + [ 3fb6] glEnableClientStateIndexed │ │ + [ 3fd1] glCompressedMultiTexSubImage1D │ │ + [ 3ff0] glCopyTextureImage1DEXT │ │ + [ 4008] glMultiTexImage1DEXT │ │ + [ 401d] glDisableVertexArrayEXT │ │ + [ 4035] glGetQueryObjectuiv │ │ + [ 4049] glVertexAttrib4Niv │ │ + [ 405c] glVertexAttrib2dARB │ │ + [ 4070] glVertexAttrib4ubvARB │ │ + [ 4086] glCompileShaderARB │ │ + [ 4099] glProgramUniform2f │ │ + [ 40ac] glUniform2fvEXT │ │ + [ 40bc] glUniform2iEXT │ │ + [ 40cb] glVertexAttrib3fvEXT │ │ + [ 40e0] glVertexAttrib4fEXT │ │ + [ 40f4] glIsProgramARB │ │ + [ 4103] 1.10 via gl4es │ │ + [ 4112] gl4es_glAlphaFunc │ │ + [ 4124] warning, %s line %d function %s: gles_glClear is NULL\n │ │ + [ 415b] Initialising gl4es\n │ │ + [ 416f] LIBGL_DRMCARD │ │ + [ 417d] Export GL_ARB_vertex_array_bgra extension\n │ │ + [ 41a8] NPOT texture handled in hardware\n │ │ + [ 41ca] warning, %s line %d function %s: gles_glLightModelfv is NULL\n │ │ + [ 4208] warning, %s line %d function %s: gles_glMaterialfv is NULL\n │ │ + [ 4244] LIBGL: Unsupported source data type: %s\n │ │ + [ 426d] glProgramBinaryOES │ │ + [ 4280] gl4es_glViewport │ │ + [ 4291] gl_MultiTexCoord7 │ │ + [ 42a3] _gl4es_TModelViewMatrix │ │ + [ 42bb] gl_TextureMatrix_3 │ │ + [ 42ce] _gl4es_TextureMatrix_12 │ │ + [ 42e6] _gl4es_TextureMatrix │ │ + [ 42fc] //precision │ │ + [ 4308] textureCubeLodEXT │ │ + [ 431a] _gl4es_texture2DProjGrad │ │ + [ 4333] textureCubeGradEXT │ │ + [ 4346] transpose^I │ │ + [ 4351] gl_BackLightModelProduct │ │ + [ 436a] warning, %s line %d function %s: gles_glClearStencil is NULL\n │ │ + [ 43a8] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/texgen.c │ │ + [ 43f7] warning, %s line %d function %s: gles_glCompressedTexSubImage2D is NULL\n │ │ + [ 4440] gl4es_glClearColor │ │ + [ 4453] warning, %s line %d function %s: gles_glFogxv is NULL\n │ │ + [ 448a] gl4es_glFogxv │ │ + [ 4498] gl4es_glLightModelx │ │ + [ 44ac] and used\n │ │ + [ 44b7] : │ │ + [ 44bc] if (( │ │ + [ 44c2] gl_ModelViewMatrixTranspose │ │ + [ 44de] 0.0 │ │ + [ 44e2] Invalid value (implicit param?) │ │ + [ 4502] glBlendEquationOES │ │ + [ 4515] GL_TEXTURE_CUBE_MAP_NEGATIVE_X │ │ + [ 4534] GL_TEXTURE_CUBE_MAP_POSITIVE_Z │ │ + [ 4553] GL_RGB5_A1 │ │ + [ 455e] GL_DOUBLE │ │ + [ 4568] GL_COLOR_ATTACHMENT2 │ │ + [ 457d] GL_EYE_LINEAR │ │ + [ 458b] GL_ACTIVE_UNIFORMS │ │ + [ 459e] GL_NUM_PROGRAM_BINARY_FORMATS │ │ + [ 45bc] gl4es_glDepthRangef │ │ + [ 45d0] warning, %s line %d function %s: gles_glEnableClientState is NULL\n │ │ + [ 4613] warning, %s line %d function %s: gles_glDisableClientState is NULL\n │ │ + [ 4657] fpe_glDrawElementsInstanced │ │ + [ 4673] samplerStreamIMG │ │ + [ 4684] vec4(0.0) │ │ + [ 468e] uniform highp vec4 _gl4es_ClipPlane_%d;\n │ │ + [ 46b7] // light %d on, light_direction=%d, light_cutoff180=%d\n │ │ + [ 46ef] // end of light %d\n │ │ + [ 4703] npot adjusted │ │ + [ 4711] lowp float %s;\n │ │ + [ 4721] %s.rgb = vec3(0.0);\n │ │ + [ 4737] %s.a = %s.a;\n │ │ + [ 4746] glFramebufferRenderbufferOES │ │ + [ 4763] glGetShaderPrecisionFormat │ │ + [ 477e] glGetVertexAttribPointerv │ │ + [ 4798] glProgramBinary │ │ + [ 47a8] glVertexAttrib2f │ │ + [ 47b9] glColorMaskIndexedEXT │ │ + [ 47cf] glVertex4dv │ │ + [ 47db] glMultiTexCoord3i │ │ + [ 47ed] glMultiTexCoord1iARB │ │ + [ 4802] glWindowPos3sv │ │ + [ 4811] glTexCoord2s │ │ + [ 481e] glMultiTexCoord2sEXT │ │ + [ 4833] glMultiTexCoord4sARB │ │ + [ 4848] glSecondaryColor3ub │ │ + [ 485c] glNormal3ub │ │ + [ 4868] glVertex3ub │ │ + [ 4874] glWindowPos2uiv │ │ + [ 4884] glTexCoord2us │ │ + [ 4892] glRasterPos2fv │ │ + [ 48a1] glBlendFuncSeparatei │ │ + [ 48b6] glGenLists │ │ + [ 48c1] glListBase │ │ + [ 48cc] glLoadName │ │ + [ 48d7] glMapGrid2f │ │ + [ 48e3] glCompressedTexImage3DEXT │ │ + [ 48fd] glMultiTexEnvfv │ │ + [ 490d] glCompressedTextureImage1D │ │ + [ 4928] glGetTextureLevelParameterfvEXT │ │ + [ 4948] glVertexAttrib2sEXT │ │ + [ 495c] glVertexAttrib2d │ │ + [ 496d] glVertexAttrib3d │ │ + [ 497e] glVertexAttrib1svEXT │ │ + [ 4993] glVertexAttrib1dvARB │ │ + [ 49a8] glVertexAttrib3fvARB │ │ + [ 49bd] glProgramUniform1iv │ │ + [ 49d1] glGetProgramivEXT │ │ + [ 49e3] glVertexAttrib1fEXT │ │ + [ 49f7] glProgramUniform1fvEXT │ │ + [ 4a0e] glDrawElementsInstancedBaseVertex │ │ + [ 4a30] glUniformMatrix4x2fv │ │ + [ 4a45] glProgramEnvParameter4fARB │ │ + [ 4a60] glProgramLocalParameters4fvEXT │ │ + [ 4a7f] glGetSamplerParameterIuiv │ │ + [ 4a99] warning, %s line %d function %s: gles_glGetString is NULL\n │ │ + [ 4ad4] gl4es_glGetIntegerv │ │ + [ 4ae8] Texture shrink, mode 3 selected (only > 256 /2 )\n │ │ + [ 4b1a] Texture shrink, mode 5 selected (every > 256 is downscaled to 256 ), but not for empty textures\n │ │ + [ 4b7b] Expose GL_ARB_texture_non_power_of_two extension\n │ │ + [ 4bad] No downsampling of DXTc textures\n │ │ + [ 4bcf] LIBGL_FORCENPOT │ │ + [ 4bdf] Trying to batch subsequent glDrawXXXX of size between %d and %d vertices\n │ │ + [ 4c29] glX Will NOT try to recycle EGL Surface\n │ │ + [ 4c52] LIBGL_SKIPTEXCOPIES │ │ + [ 4c66] gl4es_glMaterialfv │ │ + [ 4c79] warning, %s line %d function %s: gles_glPointParameterfv is NULL\n │ │ + [ 4cbb] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/pointsprite.c │ │ + [ 4d0f] pushViewport │ │ + [ 4d1c] _gl4es_ModelViewMatrix │ │ + [ 4d33] _gl4es_ITModelViewProjectionMatrix │ │ + [ 4d56] gl_TextureMatrix_5 │ │ + [ 4d69] (FPEShader generated) │ │ + [ 4d80] mediump │ │ + [ 4d88] gl_LightSourceParameters │ │ + [ 4da1] _gl4es_FrontLightProduct │ │ + [ 4dba] gl_NormalScale │ │ + [ 4dc9] _gl4es_MaxTextureCoords │ │ + [ 4de1] Fragment │ │ + [ 4dea] vec4 _gl4es_texture2DGrad(sampler2D sampler, vec2 coord, vec2 dPdx, vec2 dPdy) {\n │ │ return texture2D(sampler, coord);\n │ │ }\n │ │ - [ 4e6d] LIBGL: Warning, unknown Internalformat (%s)\n │ │ - [ 4e9a] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/texture.c │ │ - [ 4eea] LIBGL: swizzle error: (%s, %s -> %s, %s)\n │ │ - [ 4f14] warning, %s line %d function %s: gles_glReadPixels is NULL\n │ │ - [ 4f50] warning, %s line %d function %s: gles_glFrustumx is NULL\n │ │ - [ 4f8a] warning, %s line %d function %s: gles_glGetFixedv is NULL\n │ │ - [ 4fc5] warning, %s line %d function %s: gles_glGetTexEnvxv is NULL\n │ │ - [ 5002] gl4es_glLineWidth │ │ - [ 5014] gl4es_glMaterialx │ │ - [ 5026] gl4es_glPolygonOffsetx │ │ - [ 503d] gl4es_glTexEnvxv │ │ - [ 504e] eglBindAPI │ │ - [ 5059] eglDestroyContext │ │ - [ 506b] warning, %s line %d function %s: egl_eglQueryString is NULL\n │ │ - [ 50a8] #version 300 es │ │ - [ 50bb] . │ │ - [ 50bd] .x = int(floor( │ │ - [ 50cd] secondary │ │ - [ 50d7] gl_FrontMaterial │ │ - [ 50e8] gl_ProgramEnv │ │ - [ 50f6] Invalid state │ │ - [ 5104] No param given │ │ - [ 5113] Too many operands │ │ - [ 5125] gl4es_glBlendEquation │ │ - [ 513b] warning, %s line %d function %s: gles_glClientActiveTexture is NULL\n │ │ - [ 5180] glCreateShader │ │ - [ 518f] warning, %s line %d function %s: gles_glBindBuffer is NULL\n │ │ - [ 51cb] v%d.%d.%d built on %s %s\n │ │ + [ 4e61] LIBGL: Warning, unknown Internalformat (%s)\n │ │ + [ 4e8e] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/texture.c │ │ + [ 4ede] LIBGL: swizzle error: (%s, %s -> %s, %s)\n │ │ + [ 4f08] warning, %s line %d function %s: gles_glReadPixels is NULL\n │ │ + [ 4f44] warning, %s line %d function %s: gles_glFrustumx is NULL\n │ │ + [ 4f7e] warning, %s line %d function %s: gles_glGetFixedv is NULL\n │ │ + [ 4fb9] warning, %s line %d function %s: gles_glGetTexEnvxv is NULL\n │ │ + [ 4ff6] gl4es_glLineWidth │ │ + [ 5008] gl4es_glMaterialx │ │ + [ 501a] gl4es_glPolygonOffsetx │ │ + [ 5031] gl4es_glTexEnvxv │ │ + [ 5042] eglBindAPI │ │ + [ 504d] eglDestroyContext │ │ + [ 505f] warning, %s line %d function %s: egl_eglQueryString is NULL\n │ │ + [ 509c] #version 300 es │ │ + [ 50af] . │ │ + [ 50b1] .x = int(floor( │ │ + [ 50c1] secondary │ │ + [ 50cb] gl_FrontMaterial │ │ + [ 50dc] gl_ProgramEnv │ │ + [ 50ea] Invalid state │ │ + [ 50f8] No param given │ │ + [ 5107] Too many operands │ │ + [ 5119] gl4es_glBlendEquation │ │ + [ 512f] warning, %s line %d function %s: gles_glClientActiveTexture is NULL\n │ │ + [ 5174] glCreateShader │ │ + [ 5183] warning, %s line %d function %s: gles_glBindBuffer is NULL\n │ │ + [ 51bf] v%d.%d.%d built on %s %s\n │ │ + [ 51d9] Dec 10 2024 │ │ [ 51e5] GL_READ_FRAMEBUFFER │ │ [ 51f9] GL_RGB16F │ │ [ 5203] GL_TRIANGLE_STRIP │ │ [ 5215] GL_TEXTURE_GEN_Q │ │ [ 5226] GL_LIGHT0 │ │ [ 5230] GL_SHADER_TYPE │ │ [ 523f] GL_SUBTRACT │ │ @@ -1723,384 +1723,384 @@ │ │ [ 9eb1] gl_ModelViewProjectionMatrixInverse │ │ [ 9ed5] Not a valid single param │ │ [ 9eee] Cannot redeclare variable │ │ [ 9f08] Cannot alias to inexistant variable │ │ [ 9f2c] Invalid texture sampler (shouldn't happen here) │ │ [ 9f5c] LIBGL │ │ [ 9f62] warning, %s line %d function %s: egl_eglGetProcAddress is NULL\n │ │ - [ 9fa2] 19:08:55 │ │ - [ 9fab] GL_RENDERBUFFER │ │ - [ 9fbb] GL_RGB32F │ │ - [ 9fc5] GL_RGB10_A2 │ │ - [ 9fd1] GL_UNSIGNED_INT_8_8_8_8 │ │ - [ 9fe9] GL_STATIC_DRAW │ │ - [ 9ff8] GL_STREAM_DRAW │ │ - [ a007] GL_TEXTURE0 │ │ - [ a013] GL_TEXTURE_WRAP_S │ │ - [ a025] GL_TEXTURE_GEN_T │ │ - [ a036] GL_INT_VEC4 │ │ - [ a042] GL_COORD_REPLACE │ │ - [ a053] GL_MODULATE │ │ - [ a05f] GL_ADD_SIGNED │ │ - [ a06d] GL_RGB_SCALE │ │ - [ a07a] gl4es_glDepthFunc │ │ - [ a08c] LIBGL: FPE Program link failed: source of vertex shader is\n │ │ + [ 9fa2] GL_RENDERBUFFER │ │ + [ 9fb2] GL_RGB32F │ │ + [ 9fbc] GL_RGB10_A2 │ │ + [ 9fc8] GL_UNSIGNED_INT_8_8_8_8 │ │ + [ 9fe0] GL_STATIC_DRAW │ │ + [ 9fef] GL_STREAM_DRAW │ │ + [ 9ffe] GL_TEXTURE0 │ │ + [ a00a] GL_TEXTURE_WRAP_S │ │ + [ a01c] GL_TEXTURE_GEN_T │ │ + [ a02d] GL_INT_VEC4 │ │ + [ a039] GL_COORD_REPLACE │ │ + [ a04a] GL_MODULATE │ │ + [ a056] GL_ADD_SIGNED │ │ + [ a064] GL_RGB_SCALE │ │ + [ a071] gl4es_glDepthFunc │ │ + [ a083] LIBGL: FPE Program link failed: source of vertex shader is\n │ │ %s\n │ │ _gl4es_Sampler3D_ │ │ - [ a0de] .sizeMin │ │ - [ a0e7] Color += %s*gl_LightModel.ambient;\n │ │ - [ a10b] BackColor += %s*gl_LightModel.ambient;\n │ │ - [ a133] hi = normalize(VP + normalize(-vertex.xyz));\n │ │ - [ a161] tmp_tcoor.%c=dot(gl_Vertex, _gl4es_ObjectPlane%c_%d);\n │ │ - [ a198] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/framebuffers.c │ │ - [ a1ed] glTexParameteri │ │ - [ a1fd] deleteMainFBO │ │ - [ a20b] glClearColor │ │ - [ a218] glIsShader │ │ - [ a223] glGenBuffersARB │ │ - [ a233] glMapNamedBufferEXT │ │ - [ a247] glBlitFramebufferEXT │ │ - [ a25c] glIsFramebufferARB │ │ - [ a26f] glTexCoord1b │ │ - [ a27c] glMultiTexCoord4bv │ │ - [ a28f] glMultiTexCoord4bvARB │ │ - [ a2a5] glWindowPos2dv │ │ - [ a2b4] glVertex2iv │ │ - [ a2c0] glTexCoord2iv │ │ - [ a2ce] glMultiTexCoord4iv │ │ - [ a2e1] glRasterPos2s │ │ - [ a2ef] glTexCoord2ubv │ │ - [ a2fe] glMultiTexCoord1ub │ │ - [ a311] glMultiTexCoord1ubEXT │ │ - [ a327] glSecondaryColor3ui │ │ - [ a33b] glNormal3uiv │ │ - [ a348] glMultiTexCoord1uiEXT │ │ - [ a35e] glColor4us │ │ - [ a369] glTexCoord4usv │ │ - [ a378] glMultiTexCoord2us │ │ - [ a38b] glTexCoord2f │ │ - [ a398] glMultiTexCoord4fEXT │ │ - [ a3ad] glEdgeFlag │ │ - [ a3b8] glEvalCoord1f │ │ - [ a3c6] glFogiv │ │ - [ a3ce] glPopAttrib │ │ - [ a3da] glPushAttrib │ │ - [ a3e7] glCompressedTexSubImage1DEXT │ │ - [ a404] glIndexMask │ │ - [ a410] glEnableIndexed │ │ - [ a420] glMatrixLoaddEXT │ │ - [ a431] glMatrixMultfEXT │ │ - [ a442] glMatrixFrustumEXT │ │ - [ a455] glVertexAttrib2fARB │ │ - [ a469] glAttachObjectARB │ │ - [ a47b] glGetUniformLocationEXT │ │ - [ a493] glGetVertexAttribfvEXT │ │ - [ a4aa] glDrawElementsBaseVertexEXT │ │ - [ a4c6] glClampColorEXT │ │ - [ a4d6] GL_ARB_texture_rg │ │ - [ a4e9] GL_ARB_fragment_shader GL_ARB_vertex_shader GL_ARB_shader_objects GL_ARB_shading_language_100 GL_ATI_texture_env_combine3 GL_ATIX_texture_env_route GL_NV_texture_env_combine4 GL_NV_fog_distance GL_ARB_draw_instanced GL_ARB_instanced_arrays │ │ - [ a5da] gl4es_glColorMask │ │ - [ a5ec] Warning, GBM not compiled in, cannot use LIBGL_DRMCARD\n │ │ - [ a624] Texture shrink, mode 2 selected (only > 512 /2 )\n │ │ - [ a656] LIBGL_BLENDHACK │ │ - [ a666] Don't avoid 16bits textures\n │ │ - [ a683] Avoid 24bits textures\n │ │ - [ a69a] Not exposing ARB Program extensions\n │ │ - [ a6bf] LIBGL_NOCLEAN │ │ - [ a6cd] P6 %d %d %d\n │ │ - [ a6da] gl4es_glGetProgramBinary │ │ - [ a6f3] _gl4es_MultiTexCoord3 │ │ - [ a709] gl_MultiTexCoord14 │ │ - [ a71c] #version │ │ - [ a725] _gl4es_FogFragCoord │ │ - [ a739] _gl4es_LightModelProducts │ │ - [ a753] _gl4es_ObjectPlaneQ │ │ - [ a767] gl_MaxTextureUnits │ │ - [ a77a] varying lowp vec4 _gl4es_BackColor;\n │ │ - [ a79f] gl_TexCoord[ │ │ - [ a7ac] uniform vec4 gl_ObjectPlaneQ[gl_MaxTextureCoords];\n │ │ - [ a7e0] gl4es_glTexImage2D │ │ - [ a7f3] LIBGL: Warning, Depth/stencil texture resized and with data\n │ │ - [ a830] warning, %s line %d function %s: gles_glDrawTexi is NULL\n │ │ - [ a86a] warning, %s line %d function %s: gles_glGetClipPlanex is NULL\n │ │ - [ a8a9] gl4es_glGetTexParameterxv │ │ - [ a8c3] warning, %s line %d function %s: egl_eglMakeCurrent is NULL\n │ │ - [ a900] Full │ │ - [ a905] GL_EXT_draw_buffers │ │ - [ a91a] CubeMap are in core, and so used\n │ │ - [ a93c] EGL_KHR_gl_colorspace │ │ - [ a952] = │ │ - [ a956] ( │ │ - [ a958] 1.0 / │ │ - [ a95f] vec4(gl_Normal, 1.) │ │ - [ a973] gl_TexCoord[%s] │ │ - [ a983] ambient │ │ - [ a98b] matrix │ │ - [ a992] gl_ProjectionMatrix │ │ - [ a9a6] RECT │ │ - [ a9ab] glBlendFuncSeparate │ │ - [ a9bf] Failed to produce blit fragment shader.\n │ │ + [ a0d5] .sizeMin │ │ + [ a0de] Color += %s*gl_LightModel.ambient;\n │ │ + [ a102] BackColor += %s*gl_LightModel.ambient;\n │ │ + [ a12a] hi = normalize(VP + normalize(-vertex.xyz));\n │ │ + [ a158] tmp_tcoor.%c=dot(gl_Vertex, _gl4es_ObjectPlane%c_%d);\n │ │ + [ a18f] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/framebuffers.c │ │ + [ a1e4] glTexParameteri │ │ + [ a1f4] deleteMainFBO │ │ + [ a202] glClearColor │ │ + [ a20f] glIsShader │ │ + [ a21a] glGenBuffersARB │ │ + [ a22a] glMapNamedBufferEXT │ │ + [ a23e] glBlitFramebufferEXT │ │ + [ a253] glIsFramebufferARB │ │ + [ a266] glTexCoord1b │ │ + [ a273] glMultiTexCoord4bv │ │ + [ a286] glMultiTexCoord4bvARB │ │ + [ a29c] glWindowPos2dv │ │ + [ a2ab] glVertex2iv │ │ + [ a2b7] glTexCoord2iv │ │ + [ a2c5] glMultiTexCoord4iv │ │ + [ a2d8] glRasterPos2s │ │ + [ a2e6] glTexCoord2ubv │ │ + [ a2f5] glMultiTexCoord1ub │ │ + [ a308] glMultiTexCoord1ubEXT │ │ + [ a31e] glSecondaryColor3ui │ │ + [ a332] glNormal3uiv │ │ + [ a33f] glMultiTexCoord1uiEXT │ │ + [ a355] glColor4us │ │ + [ a360] glTexCoord4usv │ │ + [ a36f] glMultiTexCoord2us │ │ + [ a382] glTexCoord2f │ │ + [ a38f] glMultiTexCoord4fEXT │ │ + [ a3a4] glEdgeFlag │ │ + [ a3af] glEvalCoord1f │ │ + [ a3bd] glFogiv │ │ + [ a3c5] glPopAttrib │ │ + [ a3d1] glPushAttrib │ │ + [ a3de] glCompressedTexSubImage1DEXT │ │ + [ a3fb] glIndexMask │ │ + [ a407] glEnableIndexed │ │ + [ a417] glMatrixLoaddEXT │ │ + [ a428] glMatrixMultfEXT │ │ + [ a439] glMatrixFrustumEXT │ │ + [ a44c] glVertexAttrib2fARB │ │ + [ a460] glAttachObjectARB │ │ + [ a472] glGetUniformLocationEXT │ │ + [ a48a] glGetVertexAttribfvEXT │ │ + [ a4a1] glDrawElementsBaseVertexEXT │ │ + [ a4bd] glClampColorEXT │ │ + [ a4cd] GL_ARB_texture_rg │ │ + [ a4e0] GL_ARB_fragment_shader GL_ARB_vertex_shader GL_ARB_shader_objects GL_ARB_shading_language_100 GL_ATI_texture_env_combine3 GL_ATIX_texture_env_route GL_NV_texture_env_combine4 GL_NV_fog_distance GL_ARB_draw_instanced GL_ARB_instanced_arrays │ │ + [ a5d1] gl4es_glColorMask │ │ + [ a5e3] Warning, GBM not compiled in, cannot use LIBGL_DRMCARD\n │ │ + [ a61b] Texture shrink, mode 2 selected (only > 512 /2 )\n │ │ + [ a64d] LIBGL_BLENDHACK │ │ + [ a65d] Don't avoid 16bits textures\n │ │ + [ a67a] Avoid 24bits textures\n │ │ + [ a691] Not exposing ARB Program extensions\n │ │ + [ a6b6] LIBGL_NOCLEAN │ │ + [ a6c4] P6 %d %d %d\n │ │ + [ a6d1] gl4es_glGetProgramBinary │ │ + [ a6ea] _gl4es_MultiTexCoord3 │ │ + [ a700] gl_MultiTexCoord14 │ │ + [ a713] #version │ │ + [ a71c] _gl4es_FogFragCoord │ │ + [ a730] _gl4es_LightModelProducts │ │ + [ a74a] _gl4es_ObjectPlaneQ │ │ + [ a75e] gl_MaxTextureUnits │ │ + [ a771] varying lowp vec4 _gl4es_BackColor;\n │ │ + [ a796] gl_TexCoord[ │ │ + [ a7a3] uniform vec4 gl_ObjectPlaneQ[gl_MaxTextureCoords];\n │ │ + [ a7d7] gl4es_glTexImage2D │ │ + [ a7ea] LIBGL: Warning, Depth/stencil texture resized and with data\n │ │ + [ a827] warning, %s line %d function %s: gles_glDrawTexi is NULL\n │ │ + [ a861] warning, %s line %d function %s: gles_glGetClipPlanex is NULL\n │ │ + [ a8a0] gl4es_glGetTexParameterxv │ │ + [ a8ba] warning, %s line %d function %s: egl_eglMakeCurrent is NULL\n │ │ + [ a8f7] Full │ │ + [ a8fc] GL_EXT_draw_buffers │ │ + [ a911] CubeMap are in core, and so used\n │ │ + [ a933] EGL_KHR_gl_colorspace │ │ + [ a949] = │ │ + [ a94d] ( │ │ + [ a94f] 1.0 / │ │ + [ a956] vec4(gl_Normal, 1.) │ │ + [ a96a] gl_TexCoord[%s] │ │ + [ a97a] ambient │ │ + [ a982] matrix │ │ + [ a989] gl_ProjectionMatrix │ │ + [ a99d] RECT │ │ + [ a9a2] glBlendFuncSeparate │ │ + [ a9b6] Failed to produce blit fragment shader.\n │ │ %s │ │ - [ a9ea] warning, %s line %d function %s: gles_glActiveTexture is NULL\n │ │ - [ aa29] GL_LUMINANCE32F │ │ - [ aa39] GL_COLOR_ATTACHMENT3 │ │ - [ aa4e] GL_TEXTURE13 │ │ - [ aa5b] GL_NORMAL_MAP │ │ - [ aa69] GL_TEXTURE │ │ - [ aa74] GL_LIGHT5 │ │ - [ aa7e] GL_LIGHT6 │ │ - [ aa88] GL_PROGRAM_ADDRESS_REGISTERS_ARB │ │ - [ aaa9] double: not implemented\n │ │ - [ aac2] glVertexAttrib4fv │ │ - [ aad4] glFramebufferTexture2DOES │ │ - [ aaee] _shininess │ │ - [ aaf9] rb │ │ - [ aafc] uniform _gl4es_LightProducts _gl4es_BackLightProduct_%d;\n │ │ - [ ab36] Arg%d = %s;\n │ │ - [ ab43] if (floor(fColor.a*255.) %s _gl4es_AlphaRef) discard;\n │ │ - [ ab7a] %s.a = 0.0;\n │ │ - [ ab88] main │ │ - [ ab8d] glFramebufferRenderbuffer │ │ - [ aba7] glGetUniformiv │ │ - [ abb6] glHint │ │ - [ abbd] glTexGenfv │ │ - [ abc8] glValidateProgram │ │ - [ abda] glIsTextureEXT │ │ - [ abe9] glMapBufferARB │ │ - [ abf8] glCopyBufferSubData │ │ - [ ac0c] glFramebufferTexture3DARB │ │ - [ ac26] glDrawBuffers │ │ - [ ac34] glClearNamedFramebufferuiv │ │ - [ ac4f] glSecondaryColor3dvEXT │ │ - [ ac66] glMultiTexCoord2dvARB │ │ - [ ac7c] glSecondaryColor3iEXT │ │ - [ ac92] glMultiTexCoord1ivARB │ │ - [ aca8] glMultiTexCoord4svEXT │ │ - [ acbe] glMultiTexCoord1sARB │ │ - [ acd3] glTexCoord4ub │ │ - [ ace1] glVertex3uiv │ │ - [ acee] glTexCoord2ui │ │ - [ acfc] glVertex2usv │ │ - [ ad09] glTexCoord3usv │ │ - [ ad18] glTexCoord3fv │ │ - [ ad26] glTexCoord3f │ │ - [ ad33] glMultiTexCoord2fvEXT │ │ - [ ad49] glBlendFuncARB │ │ - [ ad58] glEvalCoord2fv │ │ - [ ad67] glFogCoordd │ │ - [ ad73] glGetDoublev │ │ - [ ad80] glLightModeliv │ │ - [ ad8f] glMap2f │ │ - [ ad97] glCompressedTexSubImage1D │ │ - [ adb1] glPixelStoref │ │ - [ adbf] glSelectBuffer │ │ - [ adce] glPointParameteriv │ │ - [ ade1] glGetMultiTexEnviv │ │ - [ adf4] glClientAttribDefaultEXT │ │ - [ ae0d] glCompressedTextureSubImage3DEXT │ │ - [ ae2e] glCompressedMultiTexImage3DEXT │ │ - [ ae4d] glMatrixLoadTransposefEXT │ │ - [ ae67] glVertexAttrib4usv │ │ - [ ae7a] glVertexAttrib4iv │ │ - [ ae8c] glGetAttribLocationARB │ │ - [ aea3] glGetVertexAttribfvARB │ │ - [ aeba] glUniform2iARB │ │ - [ aec9] glGetObjectParameterfvARB │ │ - [ aee3] glGetUniformivARB │ │ - [ aef5] glProgramUniform2iv │ │ - [ af09] glProgramUniform1fEXT │ │ - [ af1f] glProgramUniform3fEXT │ │ - [ af35] glUniformMatrix2x4fv │ │ - [ af4a] glProgramLocalParameter4dvARB │ │ - [ af68] glBindSampler │ │ - [ af76] glGetSamplerParameterfv │ │ - [ af8e] LIBGL_FPS │ │ - [ af98] Texture shrink, mode 4 selected (only > 256 /2, >=1024 /4 )\n │ │ - [ afd5] Texture shrink, mode 7 selected (only > 512 /2 ), but not for empty textures\n │ │ - [ b023] LIBGL_NOLUMALPHA │ │ - [ b034] GL_LUMINANCE_ALPHA hardware support disabled\n │ │ - [ b062] LIBGL_FASTMATH │ │ - [ b071] Don't expose fake glQueries functions\n │ │ - [ b098] Force 16bits textures\n │ │ - [ b0af] LIBGL_BLITFULLSCREEN │ │ - [ b0c4] Force normals to be normalized on FPE shaders\n │ │ - [ b0f3] LIBGL: quarter_pixel Unsupported target data type: %s\n │ │ - [ b12a] gl4es_glPointParameterfv │ │ - [ b143] version │ │ - [ b14b] warning, %s line %d function %s: gles_glScissor is NULL\n │ │ - [ b184] _gl4es_Normal │ │ - [ b192] gl_TextureMatrix_10 │ │ - [ b1a6] texture2DProjLod │ │ - [ b1b7] gl_TextureMatrix[%d] │ │ - [ b1cc] gl_LightModelProducts │ │ - [ b1e2] _gl4es_MaterialParameters │ │ - [ b1fc] gl_TextureEnvColor │ │ - [ b20f] _gl4es_EyePlaneS │ │ - [ b220] gl_ObjectPlaneS │ │ - [ b230] _gl4es_%s_ProgramEnv_%d │ │ - [ b248] struct gl_FogParameters {\n │ │ + [ a9e1] warning, %s line %d function %s: gles_glActiveTexture is NULL\n │ │ + [ aa20] GL_LUMINANCE32F │ │ + [ aa30] GL_COLOR_ATTACHMENT3 │ │ + [ aa45] GL_TEXTURE13 │ │ + [ aa52] GL_NORMAL_MAP │ │ + [ aa60] GL_TEXTURE │ │ + [ aa6b] GL_LIGHT5 │ │ + [ aa75] GL_LIGHT6 │ │ + [ aa7f] GL_PROGRAM_ADDRESS_REGISTERS_ARB │ │ + [ aaa0] double: not implemented\n │ │ + [ aab9] glVertexAttrib4fv │ │ + [ aacb] glFramebufferTexture2DOES │ │ + [ aae5] _shininess │ │ + [ aaf0] rb │ │ + [ aaf3] uniform _gl4es_LightProducts _gl4es_BackLightProduct_%d;\n │ │ + [ ab2d] Arg%d = %s;\n │ │ + [ ab3a] if (floor(fColor.a*255.) %s _gl4es_AlphaRef) discard;\n │ │ + [ ab71] %s.a = 0.0;\n │ │ + [ ab7f] main │ │ + [ ab84] glFramebufferRenderbuffer │ │ + [ ab9e] glGetUniformiv │ │ + [ abad] glHint │ │ + [ abb4] glTexGenfv │ │ + [ abbf] glValidateProgram │ │ + [ abd1] glIsTextureEXT │ │ + [ abe0] glMapBufferARB │ │ + [ abef] glCopyBufferSubData │ │ + [ ac03] glFramebufferTexture3DARB │ │ + [ ac1d] glDrawBuffers │ │ + [ ac2b] glClearNamedFramebufferuiv │ │ + [ ac46] glSecondaryColor3dvEXT │ │ + [ ac5d] glMultiTexCoord2dvARB │ │ + [ ac73] glSecondaryColor3iEXT │ │ + [ ac89] glMultiTexCoord1ivARB │ │ + [ ac9f] glMultiTexCoord4svEXT │ │ + [ acb5] glMultiTexCoord1sARB │ │ + [ acca] glTexCoord4ub │ │ + [ acd8] glVertex3uiv │ │ + [ ace5] glTexCoord2ui │ │ + [ acf3] glVertex2usv │ │ + [ ad00] glTexCoord3usv │ │ + [ ad0f] glTexCoord3fv │ │ + [ ad1d] glTexCoord3f │ │ + [ ad2a] glMultiTexCoord2fvEXT │ │ + [ ad40] glBlendFuncARB │ │ + [ ad4f] glEvalCoord2fv │ │ + [ ad5e] glFogCoordd │ │ + [ ad6a] glGetDoublev │ │ + [ ad77] glLightModeliv │ │ + [ ad86] glMap2f │ │ + [ ad8e] glCompressedTexSubImage1D │ │ + [ ada8] glPixelStoref │ │ + [ adb6] glSelectBuffer │ │ + [ adc5] glPointParameteriv │ │ + [ add8] glGetMultiTexEnviv │ │ + [ adeb] glClientAttribDefaultEXT │ │ + [ ae04] glCompressedTextureSubImage3DEXT │ │ + [ ae25] glCompressedMultiTexImage3DEXT │ │ + [ ae44] glMatrixLoadTransposefEXT │ │ + [ ae5e] glVertexAttrib4usv │ │ + [ ae71] glVertexAttrib4iv │ │ + [ ae83] glGetAttribLocationARB │ │ + [ ae9a] glGetVertexAttribfvARB │ │ + [ aeb1] glUniform2iARB │ │ + [ aec0] glGetObjectParameterfvARB │ │ + [ aeda] glGetUniformivARB │ │ + [ aeec] glProgramUniform2iv │ │ + [ af00] glProgramUniform1fEXT │ │ + [ af16] glProgramUniform3fEXT │ │ + [ af2c] glUniformMatrix2x4fv │ │ + [ af41] glProgramLocalParameter4dvARB │ │ + [ af5f] glBindSampler │ │ + [ af6d] glGetSamplerParameterfv │ │ + [ af85] LIBGL_FPS │ │ + [ af8f] Texture shrink, mode 4 selected (only > 256 /2, >=1024 /4 )\n │ │ + [ afcc] Texture shrink, mode 7 selected (only > 512 /2 ), but not for empty textures\n │ │ + [ b01a] LIBGL_NOLUMALPHA │ │ + [ b02b] GL_LUMINANCE_ALPHA hardware support disabled\n │ │ + [ b059] LIBGL_FASTMATH │ │ + [ b068] Don't expose fake glQueries functions\n │ │ + [ b08f] Force 16bits textures\n │ │ + [ b0a6] LIBGL_BLITFULLSCREEN │ │ + [ b0bb] Force normals to be normalized on FPE shaders\n │ │ + [ b0ea] LIBGL: quarter_pixel Unsupported target data type: %s\n │ │ + [ b121] gl4es_glPointParameterfv │ │ + [ b13a] version │ │ + [ b142] warning, %s line %d function %s: gles_glScissor is NULL\n │ │ + [ b17b] _gl4es_Normal │ │ + [ b189] gl_TextureMatrix_10 │ │ + [ b19d] texture2DProjLod │ │ + [ b1ae] gl_TextureMatrix[%d] │ │ + [ b1c3] gl_LightModelProducts │ │ + [ b1d9] _gl4es_MaterialParameters │ │ + [ b1f3] gl_TextureEnvColor │ │ + [ b206] _gl4es_EyePlaneS │ │ + [ b217] gl_ObjectPlaneS │ │ + [ b227] _gl4es_%s_ProgramEnv_%d │ │ + [ b23f] struct gl_FogParameters {\n │ │ lowp vec4 color;\n │ │ mediump float density;\n │ │ highp float start;\n │ │ highp float end;\n │ │ highp float scale;\n │ │ };\n │ │ uniform gl_FogParameters gl_Fog;\n │ │ - [ b2fa] uniform samplerCube _gl4es_SamplerCube_ │ │ - [ b322] gl4es_glStencilMaskSeparate │ │ - [ b33e] gl4es_glRotatex │ │ - [ b34e] GL_OES_blend_func_separate │ │ - [ b36a] PointSprite are in core, and so used\n │ │ - [ b390] Blend Function and Equation Separation is in core, and so used\n │ │ - [ b3d0] GL_OES_mapbuffer │ │ - [ b3e2] GL_AOS4_texture_format_RGB332 │ │ - [ b400] !!ARBvp1.0 │ │ - [ b40b] x │ │ - [ b40d] cos( │ │ - [ b412] .xyz, │ │ - [ b419] vec4(1., │ │ - [ b423] ), exp2( │ │ - [ b42c] < 0.) || ( │ │ - [ b438] gl_Color │ │ - [ b441] emission │ │ - [ b44a] GL_RGBA32F │ │ - [ b455] GL_TEXTURE_WIDTH │ │ - [ b466] GL_TEXTURE_INTERNAL_FORMAT │ │ - [ b481] GL_DEPTH_ATTACHMENT │ │ - [ b495] GL_TEXTURE7 │ │ - [ b4a1] GL_POLYGON │ │ - [ b4ac] GL_POSITION │ │ - [ b4b8] GL_FLOAT_MAT4 │ │ - [ b4c6] GL_OPERAND0_RGB │ │ - [ b4d6] GL_ONE_MINUS_SRC_COLOR │ │ - [ b4ed] GL_MAX_PROGRAM_NATIVE_TEMPORARIES_ARB │ │ - [ b513] glDepthMask │ │ - [ b51f] LIBGL: FPE ARB Program link failed: %s\n │ │ - [ b547] vec2 │ │ - [ b54c] vec3 │ │ - [ b551] uniform highp mat4 _gl4es_TextureMatrix_%d;\n │ │ - [ b57e] clippedvertex_%d = dot(vertex, _gl4es_ClipPlane_%d);\n │ │ - [ b5b4] if(spot<_gl4es_LightSource_%d.spotCosCutoff) spot=0.0; else spot=pow(spot, _gl4es_LightSource_%d.spotExponent);\n │ │ - [ b625] // texture %d active: %X %s %s\n │ │ - [ b645] fColor *= texColor%d;\n │ │ - [ b65c] fColor.rgb = mix(fColor.rgb, _gl4es_TextureEnvColor_%d.rgb, texColor%d.rgb);\n │ │ - [ b6aa] fColor.rgb *= _gl4es_TexEnvRGBScale_%d;\n │ │ - [ b6d3] fColor.rgb += (%s).rgb;\n │ │ - [ b6ec] %s.a = dstblend.a*%s.a - srcblend.a*%s.a;\n │ │ - [ b717] %s.a = min(%s.a ,%s.a);\n │ │ - [ b730] glIsFramebuffer │ │ - [ b740] gl4es_glNamedFramebufferDrawBuffers │ │ - [ b764] glClipPlanef │ │ - [ b771] glGetTexEnviv │ │ - [ b77f] glLightModelx │ │ - [ b78d] glNormal3f │ │ - [ b798] glPixelStorei │ │ - [ b7a6] glTexEnvf │ │ - [ b7b0] glUniformMatrix3fv │ │ - [ b7c3] glAreTexturesResidentEXT │ │ - [ b7dc] glIsVertexArrayEXT │ │ - [ b7ef] glGenRenderbuffersEXT │ │ - [ b805] glGenFramebuffersARB │ │ - [ b81a] glGetRenderbufferParameterivARB │ │ - [ b83a] glClearNamedFramebufferfvEXT │ │ - [ b857] glSecondaryColor3b │ │ - [ b86a] glRasterPos3bv │ │ - [ b879] glWindowPos3dv │ │ - [ b888] glTexCoord3dv │ │ - [ b896] glMultiTexCoord3dEXT │ │ - [ b8ab] glSecondaryColor3ivEXT │ │ - [ b8c2] glTexCoord3iv │ │ - [ b8d0] glMultiTexCoord4svARB │ │ - [ b8e6] glMultiTexCoord4uiEXT │ │ - [ b8fc] glVertex4us │ │ - [ b908] glMultiTexCoord2usv │ │ - [ b91c] glMultiTexCoord1usvARB │ │ - [ b933] glBlendColorARB │ │ - [ b943] glEvalMesh2 │ │ - [ b94f] glGetMapfv │ │ - [ b95a] glRectf │ │ - [ b962] glSecondaryColorPointerEXT │ │ - [ b97d] glCompressedTexImage1DEXT │ │ - [ b997] glCopyTexImage1D │ │ - [ b9a8] glTextureSubImage2D │ │ - [ b9bc] glCompressedTextureImage2D │ │ - [ b9d7] glCopyTextureSubImage3DEXT │ │ - [ b9f2] glMultiTexParameteriEXT │ │ - [ ba0a] glMultiTexParameterfvEXT │ │ - [ ba23] glCompressedTextureImage1DEXT │ │ - [ ba41] glGetQueryObjectivARB │ │ - [ ba57] glVertexAttrib4svEXT │ │ - [ ba6c] glVertexAttrib4ubvEXT │ │ - [ ba82] glVertexAttrib4Nuiv │ │ - [ ba96] glProgramUniform1f │ │ - [ baa9] glCreateShaderEXT │ │ - [ babb] glValidateProgramEXT │ │ - [ bad0] glDrawElementsInstancedEXT │ │ - [ baeb] gl4es_scratch_vertex │ │ - [ bb00] using framebuffer + fbo\n │ │ - [ bb19] Float and Half-Float texture support disabled\n │ │ - [ bb48] LIBGL_RECYCLEFBO │ │ - [ bb59] ignore MipMap\n │ │ - [ bb68] Stub/non present functions are printed │ │ - [ bb8f] Override version string with "%s" (should be in the form of "1.x")\n │ │ - [ bbd3] Use of VBO disabled\n │ │ - [ bbe8] LIBGL_COMMENTS │ │ - [ bbf7] gl4es_glMultMatrixf │ │ - [ bc0b] %g │ │ - [ bc0e] _gl4es_MultiTexCoord6 │ │ - [ bc24] gl_MultiTexCoord8 │ │ - [ bc36] _gl4es_IModelViewMatrix │ │ - [ bc4e] gl_TextureMatrix_7 │ │ - [ bc61] gl_TextureMatrix_8 │ │ - [ bc74] gl_NormalMatrix │ │ - [ bc84] dFdx( │ │ - [ bc8a] float dFdx(float p) {return 0.0001;}\n │ │ + [ b2f1] uniform samplerCube _gl4es_SamplerCube_ │ │ + [ b319] gl4es_glStencilMaskSeparate │ │ + [ b335] gl4es_glRotatex │ │ + [ b345] GL_OES_blend_func_separate │ │ + [ b361] PointSprite are in core, and so used\n │ │ + [ b387] Blend Function and Equation Separation is in core, and so used\n │ │ + [ b3c7] GL_OES_mapbuffer │ │ + [ b3d9] GL_AOS4_texture_format_RGB332 │ │ + [ b3f7] !!ARBvp1.0 │ │ + [ b402] x │ │ + [ b404] cos( │ │ + [ b409] .xyz, │ │ + [ b410] vec4(1., │ │ + [ b41a] ), exp2( │ │ + [ b423] < 0.) || ( │ │ + [ b42f] gl_Color │ │ + [ b438] emission │ │ + [ b441] GL_RGBA32F │ │ + [ b44c] GL_TEXTURE_WIDTH │ │ + [ b45d] GL_TEXTURE_INTERNAL_FORMAT │ │ + [ b478] GL_DEPTH_ATTACHMENT │ │ + [ b48c] GL_TEXTURE7 │ │ + [ b498] GL_POLYGON │ │ + [ b4a3] GL_POSITION │ │ + [ b4af] GL_FLOAT_MAT4 │ │ + [ b4bd] GL_OPERAND0_RGB │ │ + [ b4cd] GL_ONE_MINUS_SRC_COLOR │ │ + [ b4e4] GL_MAX_PROGRAM_NATIVE_TEMPORARIES_ARB │ │ + [ b50a] glDepthMask │ │ + [ b516] LIBGL: FPE ARB Program link failed: %s\n │ │ + [ b53e] vec2 │ │ + [ b543] vec3 │ │ + [ b548] uniform highp mat4 _gl4es_TextureMatrix_%d;\n │ │ + [ b575] clippedvertex_%d = dot(vertex, _gl4es_ClipPlane_%d);\n │ │ + [ b5ab] if(spot<_gl4es_LightSource_%d.spotCosCutoff) spot=0.0; else spot=pow(spot, _gl4es_LightSource_%d.spotExponent);\n │ │ + [ b61c] // texture %d active: %X %s %s\n │ │ + [ b63c] fColor *= texColor%d;\n │ │ + [ b653] fColor.rgb = mix(fColor.rgb, _gl4es_TextureEnvColor_%d.rgb, texColor%d.rgb);\n │ │ + [ b6a1] fColor.rgb *= _gl4es_TexEnvRGBScale_%d;\n │ │ + [ b6ca] fColor.rgb += (%s).rgb;\n │ │ + [ b6e3] %s.a = dstblend.a*%s.a - srcblend.a*%s.a;\n │ │ + [ b70e] %s.a = min(%s.a ,%s.a);\n │ │ + [ b727] glIsFramebuffer │ │ + [ b737] gl4es_glNamedFramebufferDrawBuffers │ │ + [ b75b] glClipPlanef │ │ + [ b768] glGetTexEnviv │ │ + [ b776] glLightModelx │ │ + [ b784] glNormal3f │ │ + [ b78f] glPixelStorei │ │ + [ b79d] glTexEnvf │ │ + [ b7a7] glUniformMatrix3fv │ │ + [ b7ba] glAreTexturesResidentEXT │ │ + [ b7d3] glIsVertexArrayEXT │ │ + [ b7e6] glGenRenderbuffersEXT │ │ + [ b7fc] glGenFramebuffersARB │ │ + [ b811] glGetRenderbufferParameterivARB │ │ + [ b831] glClearNamedFramebufferfvEXT │ │ + [ b84e] glSecondaryColor3b │ │ + [ b861] glRasterPos3bv │ │ + [ b870] glWindowPos3dv │ │ + [ b87f] glTexCoord3dv │ │ + [ b88d] glMultiTexCoord3dEXT │ │ + [ b8a2] glSecondaryColor3ivEXT │ │ + [ b8b9] glTexCoord3iv │ │ + [ b8c7] glMultiTexCoord4svARB │ │ + [ b8dd] glMultiTexCoord4uiEXT │ │ + [ b8f3] glVertex4us │ │ + [ b8ff] glMultiTexCoord2usv │ │ + [ b913] glMultiTexCoord1usvARB │ │ + [ b92a] glBlendColorARB │ │ + [ b93a] glEvalMesh2 │ │ + [ b946] glGetMapfv │ │ + [ b951] glRectf │ │ + [ b959] glSecondaryColorPointerEXT │ │ + [ b974] glCompressedTexImage1DEXT │ │ + [ b98e] glCopyTexImage1D │ │ + [ b99f] glTextureSubImage2D │ │ + [ b9b3] glCompressedTextureImage2D │ │ + [ b9ce] glCopyTextureSubImage3DEXT │ │ + [ b9e9] glMultiTexParameteriEXT │ │ + [ ba01] glMultiTexParameterfvEXT │ │ + [ ba1a] glCompressedTextureImage1DEXT │ │ + [ ba38] glGetQueryObjectivARB │ │ + [ ba4e] glVertexAttrib4svEXT │ │ + [ ba63] glVertexAttrib4ubvEXT │ │ + [ ba79] glVertexAttrib4Nuiv │ │ + [ ba8d] glProgramUniform1f │ │ + [ baa0] glCreateShaderEXT │ │ + [ bab2] glValidateProgramEXT │ │ + [ bac7] glDrawElementsInstancedEXT │ │ + [ bae2] gl4es_scratch_vertex │ │ + [ baf7] using framebuffer + fbo\n │ │ + [ bb10] Float and Half-Float texture support disabled\n │ │ + [ bb3f] LIBGL_RECYCLEFBO │ │ + [ bb50] ignore MipMap\n │ │ + [ bb5f] Stub/non present functions are printed │ │ + [ bb86] Override version string with "%s" (should be in the form of "1.x")\n │ │ + [ bbca] Use of VBO disabled\n │ │ + [ bbdf] LIBGL_COMMENTS │ │ + [ bbee] gl4es_glMultMatrixf │ │ + [ bc02] %g │ │ + [ bc05] _gl4es_MultiTexCoord6 │ │ + [ bc1b] gl_MultiTexCoord8 │ │ + [ bc2d] _gl4es_IModelViewMatrix │ │ + [ bc45] gl_TextureMatrix_7 │ │ + [ bc58] gl_TextureMatrix_8 │ │ + [ bc6b] gl_NormalMatrix │ │ + [ bc7b] dFdx( │ │ + [ bc81] float dFdx(float p) {return 0.0001;}\n │ │ vec2 dFdx(vec2 p) {return vec2(0.0001);}\n │ │ vec3 dFdx(vec3 p) {return vec3(0.0001);}\n │ │ float dFdy(float p) {return 0.0001;}\n │ │ vec2 dFdy(vec2 p) {return vec2(0.0001);}\n │ │ vec3 dFdy(vec3 p) {return vec3(0.0001);}\n │ │ float fwidth(float p) {return abs(dFdx(p))+abs(dFdy(p));}\n │ │ vec2 fwidth(vec2 p) {return abs(dFdx(p))+abs(dFdy(p));}\n │ │ vec3 fwidth(vec3 p) {return abs(dFdx(p))+abs(dFdy(p));}\n │ │ - [ be23] pow ( │ │ - [ be29] uniform vec4 %s;\n │ │ - [ be3b] #version 100\n │ │ + [ be1a] pow ( │ │ + [ be20] uniform vec4 %s;\n │ │ + [ be32] #version 100\n │ │ %sprecision %s float;\n │ │ precision %s int;\n │ │ - [ be71] vec4 _gl4es_texture2DLod(sampler2D sampler, vec2 coord, float lod) {\n │ │ + [ be68] vec4 _gl4es_texture2DLod(sampler2D sampler, vec2 coord, float lod) {\n │ │ return texture2D(sampler, coord);\n │ │ }\n │ │ - [ bedc] varying lowp vec4 _gl4es_FrontSecondaryColor;\n │ │ - [ bf0b] gl4es_glPixelStorei │ │ - [ bf1f] warning, %s line %d function %s: gles_glClearDepthx is NULL\n │ │ - [ bf5c] warning, %s line %d function %s: gles_glScalex is NULL\n │ │ - [ bf94] gl4es_glTexEnvx │ │ - [ bfa4] EGL_KHR_image_pixmap │ │ - [ bfb9] EGLImage from Pixmap supported\n │ │ - [ bfd9] #version 120\n │ │ + [ bed3] varying lowp vec4 _gl4es_FrontSecondaryColor;\n │ │ + [ bf02] gl4es_glPixelStorei │ │ + [ bf16] warning, %s line %d function %s: gles_glClearDepthx is NULL\n │ │ + [ bf53] warning, %s line %d function %s: gles_glScalex is NULL\n │ │ + [ bf8b] gl4es_glTexEnvx │ │ + [ bf9b] EGL_KHR_image_pixmap │ │ + [ bfb0] EGLImage from Pixmap supported\n │ │ + [ bfd0] #version 120\n │ │ void main() {\n │ │ - [ bff6] Invalid instruction in vertex shader │ │ - [ c01b] , -180., 180.)) : 0.0, 1.0) │ │ - [ c037] min( │ │ - [ c03c] ) ? 1. : 0., ( │ │ - [ c04b] _ │ │ - [ c04d] gl4es_FogFragCoordTemp │ │ - [ c064] light │ │ - [ c06a] gl_ProgramLocal │ │ - [ c07a] Invalid relative addressing (not a declared address) │ │ - [ c0af] Invalid swizzle │ │ - [ c0bf] ARB_precision_hint_fastest │ │ - [ c0da] Unknown option │ │ - [ c0e9] gl4es_glBlendColor │ │ - [ c0fc] glBlendEquationSeparateOES │ │ - [ c117] glClientActiveTexture │ │ - [ c12d] gl4es_blitTexture_gles2 │ │ - [ c145] glUseProgram │ │ - [ c152] glBufferSubData │ │ + [ bfed] Invalid instruction in vertex shader │ │ + [ c012] , -180., 180.)) : 0.0, 1.0) │ │ + [ c02e] min( │ │ + [ c033] ) ? 1. : 0., ( │ │ + [ c042] _ │ │ + [ c044] gl4es_FogFragCoordTemp │ │ + [ c05b] light │ │ + [ c061] gl_ProgramLocal │ │ + [ c071] Invalid relative addressing (not a declared address) │ │ + [ c0a6] Invalid swizzle │ │ + [ c0b6] ARB_precision_hint_fastest │ │ + [ c0d1] Unknown option │ │ + [ c0e0] gl4es_glBlendColor │ │ + [ c0f3] glBlendEquationSeparateOES │ │ + [ c10e] glClientActiveTexture │ │ + [ c124] gl4es_blitTexture_gles2 │ │ + [ c13c] glUseProgram │ │ + [ c149] glBufferSubData │ │ + [ c159] 20:41:14 │ │ [ c162] GL_INVALID_ENUM │ │ [ c172] GL_RGB8 │ │ [ c17a] GL_DEPTH_STENCIL │ │ [ c18b] GL_REPEAT │ │ [ c195] GL_LINEAR_ATTENUATION │ │ [ c1ab] GL_BLEND │ │ [ c1b4] GL_SCISSOR_TEST │ ├── objdump --line-numbers --disassemble --demangle --reloc --no-show-raw-insn --section=.text {} │ │ @@ -258,25 +258,25 @@ │ │ stmdacs r0, {r0, r1, r2, r3, r5, r7, sl, fp, ip, sp, lr, pc} │ │ svcge 0x003ff47f │ │ stmdage r2, {r0, r2, r4, r8, fp, lr} │ │ ldrbtmi r2, [r9], #-514 @ 0xfffffdfe │ │ stc2 0, cr15, [r6], #104 @ 0x68 │ │ @ instruction: 0xf47f2800 │ │ smlaldx sl, r2, r6, pc @ │ │ - @ instruction: 0xffff2438 │ │ + @ instruction: 0xffff242f │ │ andeq r3, ip, r8, lsr #5 │ │ @ instruction: 0xfffed449 │ │ @ instruction: 0xfffed41b │ │ @ instruction: 0xfffeeb8c │ │ @ instruction: 0xffffe46a │ │ @ instruction: 0xfffe6e88 │ │ - @ instruction: 0xffff2ec3 │ │ + @ instruction: 0xffff2eba │ │ @ instruction: 0xffff7a01 │ │ - @ instruction: 0xfffebf1a │ │ - @ instruction: 0xfffebe6e │ │ + @ instruction: 0xfffebf0e │ │ + @ instruction: 0xfffebe62 │ │ @ instruction: 0xfffee90b │ │ @ instruction: 0xffff8f55 │ │ @ instruction: 0xffffa35c │ │ @ instruction: 0xffff8f2f │ │ @ instruction: 0xfffec794 │ │ @ instruction: 0xfffef198 │ │ @ instruction: 0xfffe90bf │ │ @@ -535,15 +535,15 @@ │ │ stmdaeq r1, {r3, r8, ip, sp, lr, pc} │ │ @ instruction: 0xd3b24580 │ │ svclt 0x0000e6c7 │ │ andeq r2, ip, r4, lsr #29 │ │ @ instruction: 0xffffd96c │ │ @ instruction: 0xffff67f0 │ │ @ instruction: 0xffff8cdd │ │ - @ instruction: 0xffff13d2 │ │ + @ instruction: 0xffff13c9 │ │ @ instruction: 0xfffedac8 │ │ @ instruction: 0xffff53bf │ │ @ instruction: 0xfffefd7c │ │ @ instruction: 0xffff47d9 │ │ @ instruction: 0xffff0741 │ │ @ instruction: 0xfffed9a2 │ │ @ instruction: 0xffff073b │ │ @@ -836,26 +836,26 @@ │ │ stccs 0, cr15, [r5], #64 @ 0x40 │ │ stclne 0, cr0, [pc, #148] @ 2e504 │ │ stclne 13, cr1, [ip, #840] @ 0x348 │ │ @ instruction: 0xfffe67aa │ │ @ instruction: 0xfffe678a │ │ @ instruction: 0xfffe738d │ │ @ instruction: 0xfffe6752 │ │ - @ instruction: 0xffff26e8 │ │ + @ instruction: 0xffff26df │ │ @ instruction: 0xfffe670e │ │ @ instruction: 0xfffed6db │ │ @ instruction: 0xffff039d │ │ @ instruction: 0xfffed5c4 │ │ @ instruction: 0xffff38f6 │ │ - @ instruction: 0xfffeb5cd │ │ - @ instruction: 0xffff18f9 │ │ + @ instruction: 0xfffeb5c1 │ │ + @ instruction: 0xffff18f0 │ │ @ instruction: 0xffff0279 │ │ @ instruction: 0xfffed4a0 │ │ @ instruction: 0xffff37d2 │ │ - @ instruction: 0xfffeb4a9 │ │ + @ instruction: 0xfffeb49d │ │ ldrbtmi r4, [r9], #-2534 @ 0xfffff61a │ │ stclt 0, cr15, [fp, #12]! │ │ @ instruction: 0xf0402900 │ │ lfmvs f0, 1, [r9], {27} │ │ @ instruction: 0xf0402900 │ │ bvs 168f0d4 │ │ @ instruction: 0xf0002900 │ │ @@ -1079,27 +1079,27 @@ │ │ ldrbhi pc, [r8, #-2] @ │ │ andcs r6, r9, #2162688 @ 0x210000 │ │ stmdbcs r0, {r1, sp, lr} │ │ addshi pc, ip, #2 │ │ @ instruction: 0xf0bf4608 │ │ @ instruction: 0xf002eb6e │ │ svclt 0x0000ba97 │ │ - @ instruction: 0xffff1795 │ │ + @ instruction: 0xffff178c │ │ @ instruction: 0xfffed391 │ │ @ instruction: 0xfffe6316 │ │ @ instruction: 0xffff005b │ │ @ instruction: 0xfffed282 │ │ @ instruction: 0xffff35b4 │ │ - @ instruction: 0xfffeb28b │ │ - @ instruction: 0xffff15b7 │ │ + @ instruction: 0xfffeb27f │ │ + @ instruction: 0xffff15ae │ │ @ instruction: 0xfffeff33 │ │ @ instruction: 0xfffed15a │ │ @ instruction: 0xffff348c │ │ - @ instruction: 0xfffeb163 │ │ - @ instruction: 0xffff148f │ │ + @ instruction: 0xfffeb157 │ │ + @ instruction: 0xffff1486 │ │ bcs 498f0 │ │ strhi pc, [r5], #0 │ │ andcs r6, r9, #2162688 @ 0x210000 │ │ stmdbcs r0, {r1, sp, lr} │ │ @ instruction: 0x4608bf1c │ │ bl 116ab98 │ │ ldrbtmi r4, [r8], #-2282 @ 0xfffff716 │ │ @@ -1335,31 +1335,31 @@ │ │ stmdbcs r0, {r1, sp, lr} │ │ @ instruction: 0x4608bf1c │ │ ldmdb r2!, {r0, r1, r2, r3, r4, r5, r7, ip, sp, lr, pc}^ │ │ ldrbtmi r4, [r8], #-2068 @ 0xfffff7ec │ │ ldcllt 0, cr15, [r5], {0} │ │ @ instruction: 0xfffe5fe4 │ │ @ instruction: 0xffff5dfd │ │ - @ instruction: 0xffff1f2c │ │ + @ instruction: 0xffff1f23 │ │ @ instruction: 0xfffefca5 │ │ @ instruction: 0xfffececc │ │ @ instruction: 0xffff31fe │ │ - @ instruction: 0xfffeaed5 │ │ - @ instruction: 0xffff1201 │ │ + @ instruction: 0xfffeaec9 │ │ + @ instruction: 0xffff11f8 │ │ @ instruction: 0xfffe5e18 │ │ @ instruction: 0xfffece97 │ │ - @ instruction: 0xffff1d96 │ │ + @ instruction: 0xffff1d8d │ │ @ instruction: 0xfffe5dc2 │ │ @ instruction: 0xfffe5da2 │ │ @ instruction: 0xfffefaeb │ │ @ instruction: 0xfffecd12 │ │ @ instruction: 0xffff3044 │ │ - @ instruction: 0xfffead1b │ │ - @ instruction: 0xffff1047 │ │ - @ instruction: 0xffff1c14 │ │ + @ instruction: 0xfffead0f │ │ + @ instruction: 0xffff103e │ │ + @ instruction: 0xffff1c0b │ │ @ instruction: 0xfffe5c40 │ │ stmdbcs r0, {r0, r3, r4, r6, r7, r8, sl, fp, sp, lr} │ │ orrhi pc, r9, #0 │ │ ldmvs r2, {r1, r3, r4, r7, fp, sp, lr}^ │ │ vpmax.s8 d2, d0, d7 │ │ strcs r8, [r1], -r6, lsl #6 │ │ vpmax.s8 d15, d2, d6 │ │ @@ -1543,26 +1543,26 @@ │ │ bne 735800 │ │ ldrbtmi r4, [r9], #-2320 @ 0xfffff6f0 │ │ blt 72af8c │ │ @ instruction: 0xffff5a11 │ │ @ instruction: 0xfffe5b84 │ │ @ instruction: 0xfffe5b64 │ │ @ instruction: 0xfffe5b44 │ │ - @ instruction: 0xffff1ada │ │ + @ instruction: 0xffff1ad1 │ │ @ instruction: 0xfffe5b06 │ │ @ instruction: 0xfffe5ae6 │ │ @ instruction: 0xfffe5ac6 │ │ - @ instruction: 0xffff1a5c │ │ + @ instruction: 0xffff1a53 │ │ @ instruction: 0xffff58c1 │ │ - @ instruction: 0xffff19f2 │ │ + @ instruction: 0xffff19e9 │ │ @ instruction: 0xfffef775 │ │ @ instruction: 0xfffec99c │ │ @ instruction: 0xffff2cce │ │ - @ instruction: 0xfffea9a5 │ │ - @ instruction: 0xffff0cd1 │ │ + @ instruction: 0xfffea999 │ │ + @ instruction: 0xffff0cc8 │ │ stmdbcs r0, {r0, r3, r4, sl, fp, sp, lr} │ │ stmiage fp!, {r0, r1, r2, r3, r4, r5, sl, ip, sp, lr, pc} │ │ ldmvs r2, {r1, r3, r4, r7, fp, sp, lr}^ │ │ vpmax.s8 d2, d0, d7 │ │ strcs r8, [r1], -r4, asr #8 │ │ vpmax.s8 d15, d2, d6 │ │ svceq 0x00d0f012 │ │ @@ -1822,16 +1822,16 @@ │ │ @ instruction: 0x4608bf1c │ │ stc 0, cr15, [r6, #760]! @ 0x2f8 │ │ ldrbtmi r4, [r8], #-2067 @ 0xfffff7ed │ │ svclt 0x0000e109 │ │ @ instruction: 0xfffef5fd │ │ @ instruction: 0xfffec824 │ │ @ instruction: 0xffff2b56 │ │ - @ instruction: 0xfffea82d │ │ - @ instruction: 0xffff0b59 │ │ + @ instruction: 0xfffea821 │ │ + @ instruction: 0xffff0b50 │ │ @ instruction: 0xffff55b1 │ │ @ instruction: 0xfffec768 │ │ @ instruction: 0xffff5557 │ │ @ instruction: 0xfffebad7 │ │ @ instruction: 0xffff54e9 │ │ @ instruction: 0xffff54a5 │ │ @ instruction: 0xffff5465 │ │ @@ -2087,19 +2087,19 @@ │ │ @ instruction: 0xffff5135 │ │ @ instruction: 0xfffe52b0 │ │ @ instruction: 0xfffe5292 │ │ @ instruction: 0xfffe5270 │ │ @ instruction: 0xffff5093 │ │ @ instruction: 0xffff504f │ │ @ instruction: 0xfffe51d2 │ │ - @ instruction: 0xfffe9629 │ │ + @ instruction: 0xfffe961d │ │ @ instruction: 0xfffec198 │ │ @ instruction: 0xffff24ca │ │ - @ instruction: 0xfffea1a9 │ │ - @ instruction: 0xffff04c7 │ │ + @ instruction: 0xfffea19d │ │ + @ instruction: 0xffff04be │ │ @ instruction: 0xfffe50e6 │ │ @ instruction: 0xffff4f0d │ │ stmdbcs r0, {r0, r3, r4, r6, r9, fp, sp, lr} │ │ mrcge 4, 6, APSR_nzcv, cr5, cr15, {1} │ │ ldmvs r2, {r1, r3, r4, r7, fp, sp, lr}^ │ │ @ instruction: 0xf63f2a07 │ │ @ instruction: 0x2601aeb2 │ │ @@ -2340,27 +2340,27 @@ │ │ eoreq r1, fp, r2, ror #28 │ │ strhne r1, [r2, #28] │ │ svclt 0x000011b9 │ │ @ instruction: 0xfffec034 │ │ @ instruction: 0xfffeed49 │ │ @ instruction: 0xfffebf70 │ │ @ instruction: 0xffff22a2 │ │ - @ instruction: 0xfffe9f79 │ │ - @ instruction: 0xffff02a5 │ │ + @ instruction: 0xfffe9f6d │ │ + @ instruction: 0xffff029c │ │ @ instruction: 0xffff4d2b │ │ @ instruction: 0xfffe724e │ │ @ instruction: 0xfffeebf3 │ │ @ instruction: 0xfffebe1a │ │ @ instruction: 0xffff214c │ │ - @ instruction: 0xfffe9e23 │ │ - @ instruction: 0xffff014f │ │ + @ instruction: 0xfffe9e17 │ │ + @ instruction: 0xffff0146 │ │ @ instruction: 0xfffeeb05 │ │ @ instruction: 0xfffebd2c │ │ @ instruction: 0xffff205e │ │ - @ instruction: 0xfffe9d35 │ │ + @ instruction: 0xfffe9d29 │ │ ldrbtmi r4, [r9], #-2504 @ 0xfffff638 │ │ ldmiblt r5, {r1, ip, sp, lr, pc} │ │ andcs r6, r9, #2162688 @ 0x210000 │ │ stmdbcs r0, {r1, sp, lr} │ │ @ instruction: 0x4608bf1c │ │ stmdb sl!, {r1, r2, r3, r4, r5, r7, ip, sp, lr, pc}^ │ │ ldrbtmi r4, [r8], #-2243 @ 0xfffff73d │ │ @@ -2554,31 +2554,31 @@ │ │ subshi pc, r1, r2, lsl #4 │ │ @ instruction: 0xf010e8df │ │ andeq r1, r5, r6, asr #27 │ │ subne r1, r6, r3, asr #32 │ │ ldmdbmi r2, {r6, ip} │ │ @ instruction: 0xf0024479 │ │ svclt 0x0000b83f │ │ - @ instruction: 0xffff0011 │ │ + @ instruction: 0xffff0008 │ │ @ instruction: 0xfffeea36 │ │ @ instruction: 0xfffee9b1 │ │ @ instruction: 0xfffebbd8 │ │ @ instruction: 0xffff1f0a │ │ - @ instruction: 0xfffe9be1 │ │ - @ instruction: 0xfffeff0d │ │ + @ instruction: 0xfffe9bd5 │ │ + @ instruction: 0xfffeff04 │ │ @ instruction: 0xfffee889 │ │ @ instruction: 0xfffebab0 │ │ @ instruction: 0xffff1de2 │ │ - @ instruction: 0xfffe9ab9 │ │ - @ instruction: 0xfffefde5 │ │ + @ instruction: 0xfffe9aad │ │ + @ instruction: 0xfffefddc │ │ @ instruction: 0xfffee79b │ │ @ instruction: 0xfffeb9c2 │ │ @ instruction: 0xffff1cf4 │ │ - @ instruction: 0xfffe99cb │ │ - @ instruction: 0xfffefcf7 │ │ + @ instruction: 0xfffe99bf │ │ + @ instruction: 0xfffefcee │ │ @ instruction: 0xb16a699a │ │ addsmi r6, r6, #1540096 @ 0x178000 │ │ stmdbge r3!, {r0, r1, r2, r3, r4, r5, r7, sl, ip, sp, lr, pc}^ │ │ teqlt lr, lr @ │ │ @ instruction: 0xf4bf42b2 │ │ bvs 6da530 │ │ adcsmi r3, r2, #4096 @ 0x1000 │ │ @@ -2781,26 +2781,26 @@ │ │ svceq 0x001d0005 │ │ cdpeq 15, 15, cr0, cr12, cr3, {1} │ │ ldrbtmi r4, [r9], #-2319 @ 0xfffff6f1 │ │ svclt 0x001cf001 │ │ @ instruction: 0xfffee64b │ │ @ instruction: 0xfffeb872 │ │ @ instruction: 0xffff1ba4 │ │ - @ instruction: 0xfffe987b │ │ - @ instruction: 0xfffefba7 │ │ + @ instruction: 0xfffe986f │ │ + @ instruction: 0xfffefb9e │ │ @ instruction: 0xfffee523 │ │ @ instruction: 0xfffeb74a │ │ @ instruction: 0xffff1a7c │ │ - @ instruction: 0xfffe9753 │ │ - @ instruction: 0xfffefa7f │ │ + @ instruction: 0xfffe9747 │ │ + @ instruction: 0xfffefa76 │ │ @ instruction: 0xfffee419 │ │ @ instruction: 0xfffeb640 │ │ @ instruction: 0xffff1972 │ │ - @ instruction: 0xfffe9649 │ │ - @ instruction: 0xfffef975 │ │ + @ instruction: 0xfffe963d │ │ + @ instruction: 0xfffef96c │ │ @ instruction: 0xb16a699a │ │ addsmi r6, r6, #1540096 @ 0x178000 │ │ stmdage sp, {r0, r1, r2, r3, r4, r5, r7, sl, ip, sp, lr, pc} │ │ teqlt lr, lr @ │ │ @ instruction: 0xf4bf42b2 │ │ bvs 6da350 │ │ adcsmi r3, r2, #4096 @ 0x1000 │ │ @@ -2996,26 +2996,26 @@ │ │ mrceq 14, 2, r0, cr2, cr4, {1} │ │ ldmdbmi r0, {r1, r2, r4, r9, sl, fp} │ │ @ instruction: 0xf0014479 │ │ svclt 0x0000be4b │ │ @ instruction: 0xfffee2d3 │ │ @ instruction: 0xfffeb4fa │ │ @ instruction: 0xffff182c │ │ - @ instruction: 0xfffe9503 │ │ - @ instruction: 0xfffef82f │ │ + @ instruction: 0xfffe94f7 │ │ + @ instruction: 0xfffef826 │ │ @ instruction: 0xfffee1c9 │ │ @ instruction: 0xfffeb3f0 │ │ @ instruction: 0xffff1722 │ │ - @ instruction: 0xfffe93f9 │ │ - @ instruction: 0xfffef725 │ │ + @ instruction: 0xfffe93ed │ │ + @ instruction: 0xfffef71c │ │ @ instruction: 0xfffee0bf │ │ @ instruction: 0xfffeb2e6 │ │ @ instruction: 0xffff1618 │ │ - @ instruction: 0xfffe92ef │ │ - @ instruction: 0xfffef61b │ │ + @ instruction: 0xfffe92e3 │ │ + @ instruction: 0xfffef612 │ │ @ instruction: 0xb16a699a │ │ addsmi r6, r6, #1540096 @ 0x178000 │ │ svcge 0x000df4be │ │ teqlt lr, lr @ │ │ @ instruction: 0xf4be42b2 │ │ bvs 6dc2ac │ │ adcsmi r3, r2, #4096 @ 0x1000 │ │ @@ -3215,26 +3215,26 @@ │ │ ldceq 0, cr0, [r3], #20 │ │ stceq 12, cr0, [r0], {185} @ 0xb9 │ │ ldrbtmi r4, [r9], #-2319 @ 0xfffff6f1 │ │ ldclt 0, cr15, [r2], #4 │ │ @ instruction: 0xfffedf77 │ │ @ instruction: 0xfffeb19e │ │ @ instruction: 0xffff14d0 │ │ - @ instruction: 0xfffe91a7 │ │ - @ instruction: 0xfffef4d3 │ │ + @ instruction: 0xfffe919b │ │ + @ instruction: 0xfffef4ca │ │ @ instruction: 0xfffede5b │ │ @ instruction: 0xfffeb082 │ │ @ instruction: 0xffff13b4 │ │ - @ instruction: 0xfffe908b │ │ - @ instruction: 0xfffef3b7 │ │ + @ instruction: 0xfffe907f │ │ + @ instruction: 0xfffef3ae │ │ @ instruction: 0xfffedd51 │ │ @ instruction: 0xfffeaf78 │ │ @ instruction: 0xffff12aa │ │ - @ instruction: 0xfffe8f81 │ │ - @ instruction: 0xfffef2ad │ │ + @ instruction: 0xfffe8f75 │ │ + @ instruction: 0xfffef2a4 │ │ @ instruction: 0xb16a699a │ │ addsmi r6, r6, #1540096 @ 0x178000 │ │ cfldrsge mvf15, [fp, #760]! @ 0x2f8 │ │ teqlt lr, lr @ │ │ @ instruction: 0xf4be42b2 │ │ bvs 6dc0d0 │ │ adcsmi r3, r2, #4096 @ 0x1000 │ │ @@ -3469,21 +3469,21 @@ │ │ @ instruction: 0x4608bf1c │ │ stmia r8, {r0, r2, r3, r4, r5, r7, ip, sp, lr, pc}^ │ │ ldrbtmi r4, [r8], #-2063 @ 0xfffff7f1 │ │ stclt 7, cr15, [fp], #-1016 @ 0xfffffc08 │ │ @ instruction: 0xfffedc0b │ │ @ instruction: 0xfffeae32 │ │ @ instruction: 0xffff1164 │ │ - @ instruction: 0xfffe8e3b │ │ - @ instruction: 0xfffef167 │ │ + @ instruction: 0xfffe8e2f │ │ + @ instruction: 0xfffef15e │ │ @ instruction: 0xfffedaab │ │ @ instruction: 0xfffeacd2 │ │ @ instruction: 0xffff1004 │ │ - @ instruction: 0xfffe8cdb │ │ - @ instruction: 0xfffef007 │ │ + @ instruction: 0xfffe8ccf │ │ + @ instruction: 0xfffeeffe │ │ @ instruction: 0xfffeac41 │ │ @ instruction: 0xfffeabe9 │ │ @ instruction: 0xfffeabb9 │ │ @ instruction: 0xfffeab5f │ │ @ instruction: 0xfffed8f2 │ │ @ instruction: 0xb16a699a │ │ addsmi r6, r6, #1540096 @ 0x178000 │ │ @@ -3753,19 +3753,19 @@ │ │ @ instruction: 0xfffed6bc │ │ @ instruction: 0xfffed6a4 │ │ @ instruction: 0xfffed68c │ │ @ instruction: 0xfffecb9e │ │ @ instruction: 0xfffed62f │ │ @ instruction: 0xfffea856 │ │ @ instruction: 0xffff0b88 │ │ - @ instruction: 0xfffe8869 │ │ + @ instruction: 0xfffe885d │ │ @ instruction: 0xfffea7e4 │ │ @ instruction: 0xffff0b16 │ │ - @ instruction: 0xfffe87f5 │ │ - @ instruction: 0xfffeeb21 │ │ + @ instruction: 0xfffe87e9 │ │ + @ instruction: 0xfffeeb18 │ │ @ instruction: 0xfffed546 │ │ @ instruction: 0xfffed51c │ │ @ instruction: 0xfffed506 │ │ @ instruction: 0xfffea729 │ │ andcs r4, r1, #3719168 @ 0x38c000 │ │ @ instruction: 0x4605461e │ │ @ instruction: 0xf0174479 │ │ @@ -3993,32 +3993,32 @@ │ │ @ instruction: 0xff80f016 │ │ @ instruction: 0xf0402800 │ │ @ instruction: 0xf7fd8172 │ │ svclt 0x0000bad8 │ │ @ instruction: 0xfffed40d │ │ @ instruction: 0xfffea634 │ │ @ instruction: 0xffff0966 │ │ - @ instruction: 0xfffe863d │ │ - @ instruction: 0xfffee969 │ │ + @ instruction: 0xfffe8631 │ │ + @ instruction: 0xfffee960 │ │ @ instruction: 0xfffed361 │ │ @ instruction: 0xfffea588 │ │ @ instruction: 0xffff08ba │ │ - @ instruction: 0xfffe8591 │ │ - @ instruction: 0xfffee8bd │ │ + @ instruction: 0xfffe8585 │ │ + @ instruction: 0xfffee8b4 │ │ @ instruction: 0xfffed2e2 │ │ @ instruction: 0xfffed29d │ │ @ instruction: 0xfffea4c4 │ │ @ instruction: 0xffff07f6 │ │ - @ instruction: 0xfffe84cd │ │ - @ instruction: 0xfffee7f9 │ │ + @ instruction: 0xfffe84c1 │ │ + @ instruction: 0xfffee7f0 │ │ @ instruction: 0xfffed1f1 │ │ @ instruction: 0xfffea418 │ │ @ instruction: 0xffff074c │ │ - @ instruction: 0xfffe8425 │ │ - @ instruction: 0xfffee753 │ │ + @ instruction: 0xfffe8419 │ │ + @ instruction: 0xfffee74a │ │ @ instruction: 0xffff3e98 │ │ @ instruction: 0xffff5501 │ │ @ instruction: 0xffff3e70 │ │ @ instruction: 0xffff3e5a │ │ @ instruction: 0xffff54c3 │ │ @ instruction: 0xffff3e32 │ │ @ instruction: 0xffff549b │ │ @@ -4239,27 +4239,27 @@ │ │ @ instruction: 0xf0bcbf18 │ │ stmdami r1!, {r1, r2, r6, r7, r9, fp, sp, lr, pc} │ │ @ instruction: 0xf7fd4478 │ │ svclt 0x0000be28 │ │ @ instruction: 0xfffed003 │ │ @ instruction: 0xfffea22a │ │ @ instruction: 0xffff055c │ │ - @ instruction: 0xfffe8233 │ │ - @ instruction: 0xfffee55f │ │ + @ instruction: 0xfffe8227 │ │ + @ instruction: 0xfffee556 │ │ @ instruction: 0xfffecf74 │ │ @ instruction: 0xfffecf31 │ │ @ instruction: 0xfffea158 │ │ @ instruction: 0xffff048a │ │ - @ instruction: 0xfffe8161 │ │ - @ instruction: 0xfffee48d │ │ + @ instruction: 0xfffe8155 │ │ + @ instruction: 0xfffee484 │ │ @ instruction: 0xfffece87 │ │ @ instruction: 0xfffea0b2 │ │ @ instruction: 0xffff03ec │ │ - @ instruction: 0xfffe80c7 │ │ - @ instruction: 0xfffee3f7 │ │ + @ instruction: 0xfffe80bb │ │ + @ instruction: 0xfffee3ee │ │ @ instruction: 0xffff3b3c │ │ @ instruction: 0xffff51a5 │ │ @ instruction: 0xffff3b14 │ │ @ instruction: 0xffff3afe │ │ @ instruction: 0xffff5167 │ │ @ instruction: 0xffff3ad6 │ │ @ instruction: 0xffff513f │ │ @@ -4504,41 +4504,41 @@ │ │ blge ffcaefb8 │ │ bllt 16efdbc │ │ ldrbtmi r4, [r9], #-2346 @ 0xfffff6d6 │ │ stmdbmi sl!, {r4, r5, r9, sl, sp, lr, pc} │ │ @ instruction: 0xe62d4479 │ │ ldrbtmi r4, [r9], #-2345 @ 0xfffff6d7 │ │ svclt 0x0000e62a │ │ - @ instruction: 0xfffee225 │ │ - @ instruction: 0xfffee230 │ │ + @ instruction: 0xfffee21c │ │ + @ instruction: 0xfffee227 │ │ @ instruction: 0xfffe9e3c │ │ @ instruction: 0xffff016e │ │ - @ instruction: 0xfffe7e4d │ │ - @ instruction: 0xfffee169 │ │ + @ instruction: 0xfffe7e41 │ │ + @ instruction: 0xfffee160 │ │ @ instruction: 0xffff38ae │ │ @ instruction: 0xffff389c │ │ @ instruction: 0xffff4f05 │ │ @ instruction: 0xffff3874 │ │ @ instruction: 0xffff4edd │ │ @ instruction: 0xffff384c │ │ @ instruction: 0xffff4eb5 │ │ @ instruction: 0xffff3824 │ │ @ instruction: 0xffff4e8d │ │ @ instruction: 0xfffecab1 │ │ @ instruction: 0xfffe9cd8 │ │ @ instruction: 0xffff000a │ │ - @ instruction: 0xfffe7ce1 │ │ - @ instruction: 0xfffee00d │ │ + @ instruction: 0xfffe7cd5 │ │ + @ instruction: 0xfffee004 │ │ @ instruction: 0xffff3752 │ │ @ instruction: 0xffff4dbb │ │ @ instruction: 0xffff372a │ │ @ instruction: 0xffff4d93 │ │ @ instruction: 0xffff3702 │ │ @ instruction: 0xffff4d6b │ │ - @ instruction: 0xfffedf7b │ │ + @ instruction: 0xfffedf72 │ │ @ instruction: 0xfffea73e │ │ @ instruction: 0xfffea726 │ │ @ instruction: 0xffff3692 │ │ @ instruction: 0xffff367c │ │ @ instruction: 0xffff3666 │ │ @ instruction: 0xffff3654 │ │ @ instruction: 0xffff4cbd │ │ @@ -4751,52 +4751,52 @@ │ │ @ instruction: 0xffff5693 │ │ @ instruction: 0xffff4c19 │ │ @ instruction: 0xffff34a6 │ │ @ instruction: 0xffff3492 │ │ @ instruction: 0xffff565d │ │ @ instruction: 0xffff4be3 │ │ @ instruction: 0xffff69a7 │ │ - @ instruction: 0xfffedcfb │ │ + @ instruction: 0xfffedcf2 │ │ @ instruction: 0xffff5623 │ │ @ instruction: 0xffff4ba9 │ │ @ instruction: 0xffff5617 │ │ @ instruction: 0xffff6967 │ │ - @ instruction: 0xfffedcbb │ │ + @ instruction: 0xfffedcb2 │ │ @ instruction: 0xffff4b6f │ │ @ instruction: 0xffff6933 │ │ - @ instruction: 0xfffedc87 │ │ + @ instruction: 0xfffedc7e │ │ @ instruction: 0xffff55af │ │ @ instruction: 0xffff4b35 │ │ @ instruction: 0xffff68f9 │ │ - @ instruction: 0xfffedc4d │ │ + @ instruction: 0xfffedc44 │ │ @ instruction: 0xffff5575 │ │ @ instruction: 0xffff4afb │ │ @ instruction: 0xffff68bf │ │ - @ instruction: 0xfffedc13 │ │ + @ instruction: 0xfffedc0a │ │ @ instruction: 0xffff5539 │ │ @ instruction: 0xffff4abf │ │ @ instruction: 0xffff6883 │ │ - @ instruction: 0xfffedbd7 │ │ + @ instruction: 0xfffedbce │ │ @ instruction: 0xffff54fd │ │ @ instruction: 0xffff4a83 │ │ @ instruction: 0xffff6847 │ │ - @ instruction: 0xfffedb9b │ │ + @ instruction: 0xfffedb92 │ │ @ instruction: 0xffff54c1 │ │ @ instruction: 0xffff4a47 │ │ @ instruction: 0xffff54b5 │ │ @ instruction: 0xffff54af │ │ @ instruction: 0xffff67ff │ │ - @ instruction: 0xfffedb53 │ │ + @ instruction: 0xfffedb4a │ │ @ instruction: 0xffff5479 │ │ @ instruction: 0xffff49ff │ │ @ instruction: 0xffff49f9 │ │ @ instruction: 0xffff67bd │ │ - @ instruction: 0xfffedb11 │ │ + @ instruction: 0xfffedb08 │ │ @ instruction: 0xffff678d │ │ - @ instruction: 0xfffedae1 │ │ + @ instruction: 0xfffedad8 │ │ @ instruction: 0xffff5407 │ │ @ instruction: 0xffff498d │ │ ldrbtmi r4, [r9], #-2490 @ 0xfffff646 │ │ ldmibmi sl!, {r1, r3, r4, r5, sp, lr, pc} │ │ @ instruction: 0x46284479 │ │ @ instruction: 0xf0162201 │ │ stmdacs r0, {r0, r1, r2, r3, r5, r8, fp, ip, sp, lr, pc} │ │ @@ -4983,58 +4983,58 @@ │ │ tsteq ip, pc, lsl #4 @ │ │ @ instruction: 0xf010e8d1 │ │ @ instruction: 0xffff5327 │ │ @ instruction: 0xffff6677 │ │ rsbeq r0, r6, r8, asr #20 │ │ strbteq r0, [fp], #1253 @ 0x4e5 │ │ svclt 0x000004e8 │ │ - @ instruction: 0xfffed9cb │ │ + @ instruction: 0xfffed9c2 │ │ @ instruction: 0xffff487d │ │ @ instruction: 0xffff4877 │ │ @ instruction: 0xffff52e5 │ │ @ instruction: 0xffff6635 │ │ - @ instruction: 0xfffed989 │ │ + @ instruction: 0xfffed980 │ │ @ instruction: 0xffff6605 │ │ - @ instruction: 0xfffed959 │ │ + @ instruction: 0xfffed950 │ │ @ instruction: 0xffff480b │ │ @ instruction: 0xffff5279 │ │ @ instruction: 0xffff65c9 │ │ - @ instruction: 0xfffed91d │ │ + @ instruction: 0xfffed914 │ │ @ instruction: 0xffff47cf │ │ @ instruction: 0xffff523d │ │ @ instruction: 0xffff658d │ │ - @ instruction: 0xfffed8e1 │ │ + @ instruction: 0xfffed8d8 │ │ @ instruction: 0xffff4793 │ │ @ instruction: 0xffff6557 │ │ - @ instruction: 0xfffed8ab │ │ + @ instruction: 0xfffed8a2 │ │ @ instruction: 0xffff51d1 │ │ @ instruction: 0xffff4757 │ │ @ instruction: 0xffff651b │ │ - @ instruction: 0xfffed86f │ │ + @ instruction: 0xfffed866 │ │ @ instruction: 0xffff5195 │ │ @ instruction: 0xffff471b │ │ @ instruction: 0xffff64df │ │ - @ instruction: 0xfffed833 │ │ + @ instruction: 0xfffed82a │ │ @ instruction: 0xffff5159 │ │ @ instruction: 0xffff46df │ │ @ instruction: 0xffff64a3 │ │ - @ instruction: 0xfffed7f7 │ │ + @ instruction: 0xfffed7ee │ │ @ instruction: 0xffff511d │ │ @ instruction: 0xffff46a3 │ │ @ instruction: 0xffff6467 │ │ - @ instruction: 0xfffed7bb │ │ + @ instruction: 0xfffed7b2 │ │ @ instruction: 0xffff50e1 │ │ @ instruction: 0xffff4667 │ │ @ instruction: 0xffff642b │ │ - @ instruction: 0xfffed77f │ │ + @ instruction: 0xfffed776 │ │ @ instruction: 0xffff50a5 │ │ @ instruction: 0xffff462b │ │ @ instruction: 0xffff5099 │ │ @ instruction: 0xffff63e9 │ │ - @ instruction: 0xfffed73d │ │ + @ instruction: 0xfffed734 │ │ @ instruction: 0xffff45ef │ │ @ instruction: 0xffff63b3 │ │ ldrbtmi r4, [r9], #-2501 @ 0xfffff63b │ │ stclt 0, cr15, [r3], {0} │ │ ldrbtmi r4, [r9], #-2500 @ 0xfffff63c │ │ stmibmi r4, {r2, sp, lr, pc}^ │ │ and r4, r1, r9, ror r4 │ │ @@ -5227,60 +5227,60 @@ │ │ ldc2l 0, cr15, [ip, #84] @ 0x54 │ │ @ instruction: 0xf47f2800 │ │ ldmibvs r0!, {r0, r1, r5, r9, fp, sp, pc} │ │ vadd.i8 d2, d0, d4 │ │ vqshl.s8 d8, d31, d31 │ │ ldm r1, {r3, r4, r8}^ │ │ svclt 0x0000f010 │ │ - @ instruction: 0xfffed641 │ │ + @ instruction: 0xfffed638 │ │ @ instruction: 0xffff4f67 │ │ @ instruction: 0xffff44ed │ │ @ instruction: 0xffff62b1 │ │ mlseq r3, r4, lr, r1 │ │ strteq r0, [pc], #1196 @ 32938 │ │ svclt 0x000004b2 │ │ - @ instruction: 0xfffed605 │ │ + @ instruction: 0xfffed5fc │ │ @ instruction: 0xffff4f2b │ │ @ instruction: 0xffff44b1 │ │ @ instruction: 0xffff4f1f │ │ @ instruction: 0xffff626f │ │ - @ instruction: 0xfffed5c3 │ │ + @ instruction: 0xfffed5ba │ │ @ instruction: 0xffff4475 │ │ @ instruction: 0xffff6239 │ │ - @ instruction: 0xfffed58d │ │ + @ instruction: 0xfffed584 │ │ @ instruction: 0xffff443f │ │ @ instruction: 0xffff4ead │ │ @ instruction: 0xffff61fd │ │ - @ instruction: 0xfffed551 │ │ + @ instruction: 0xfffed548 │ │ @ instruction: 0xffff4e77 │ │ @ instruction: 0xffff43fd │ │ @ instruction: 0xffff61c1 │ │ - @ instruction: 0xfffed515 │ │ + @ instruction: 0xfffed50c │ │ @ instruction: 0xffff4e3b │ │ @ instruction: 0xffff43c1 │ │ @ instruction: 0xffff6185 │ │ - @ instruction: 0xfffed4d9 │ │ + @ instruction: 0xfffed4d0 │ │ @ instruction: 0xffff438b │ │ - @ instruction: 0xfffed4dc │ │ + @ instruction: 0xfffed4d3 │ │ @ instruction: 0xfffe90e8 │ │ @ instruction: 0xfffef41a │ │ - @ instruction: 0xfffe70f9 │ │ - @ instruction: 0xfffed415 │ │ + @ instruction: 0xfffe70ed │ │ + @ instruction: 0xfffed40c │ │ @ instruction: 0xffff42c7 │ │ @ instruction: 0xffff4d35 │ │ @ instruction: 0xffff4d2f │ │ @ instruction: 0xffff4d29 │ │ @ instruction: 0xffff6079 │ │ - @ instruction: 0xfffed3cd │ │ + @ instruction: 0xfffed3c4 │ │ @ instruction: 0xffff427f │ │ @ instruction: 0xffff6043 │ │ - @ instruction: 0xfffed397 │ │ + @ instruction: 0xfffed38e │ │ @ instruction: 0xffff4249 │ │ @ instruction: 0xffff600d │ │ - @ instruction: 0xfffed361 │ │ + @ instruction: 0xfffed358 │ │ @ instruction: 0xffff4c87 │ │ @ instruction: 0xffff420d │ │ @ instruction: 0xffff5fd1 │ │ ldrbtmi r4, [r9], #-2489 @ 0xfffff647 │ │ marlt acc0, pc, sp │ │ ldrbtmi r4, [r9], #-2488 @ 0xfffff648 │ │ ldmibmi r8!, {r2, sp, lr, pc} │ │ @@ -5462,65 +5462,65 @@ │ │ ldrbteq r0, [r1], #1262 @ 0x4ee │ │ ldrbtmi r4, [r9], #-2359 @ 0xfffff6c9 │ │ stcllt 0, cr15, [sl] │ │ stmdacs r3, {r0, fp, ip, sp} │ │ stclge 6, cr15, [r3, #-252]! @ 0xffffff04 │ │ tsteq r0, pc, lsl #4 @ │ │ @ instruction: 0xf010e8d1 │ │ - @ instruction: 0xfffed265 │ │ + @ instruction: 0xfffed25c │ │ @ instruction: 0xffff4b8b │ │ @ instruction: 0xffff4111 │ │ ldrtne r0, [r9], #-102 @ 0xffffff9a │ │ strbne r1, [r1], #-1085 @ 0xfffffbc3 │ │ @ instruction: 0xffff5ed5 │ │ - @ instruction: 0xfffed229 │ │ + @ instruction: 0xfffed220 │ │ @ instruction: 0xffff40db │ │ @ instruction: 0xffff4b49 │ │ @ instruction: 0xffff5e99 │ │ - @ instruction: 0xfffed1ed │ │ + @ instruction: 0xfffed1e4 │ │ @ instruction: 0xffff409f │ │ @ instruction: 0xffff4b0d │ │ @ instruction: 0xffff4093 │ │ @ instruction: 0xffff4b01 │ │ @ instruction: 0xffff4087 │ │ @ instruction: 0xffff4af5 │ │ @ instruction: 0xffff4aef │ │ @ instruction: 0xffff5e3f │ │ - @ instruction: 0xfffed193 │ │ + @ instruction: 0xfffed18a │ │ @ instruction: 0xffff5e0f │ │ - @ instruction: 0xfffed163 │ │ + @ instruction: 0xfffed15a │ │ @ instruction: 0xffff5ddf │ │ - @ instruction: 0xfffed133 │ │ + @ instruction: 0xfffed12a │ │ @ instruction: 0xffff3fe5 │ │ @ instruction: 0xffff3fdf │ │ @ instruction: 0xffff4a4d │ │ @ instruction: 0xffff4a47 │ │ @ instruction: 0xffff5d97 │ │ - @ instruction: 0xfffed0eb │ │ + @ instruction: 0xfffed0e2 │ │ @ instruction: 0xffff5d67 │ │ - @ instruction: 0xfffed0bb │ │ + @ instruction: 0xfffed0b2 │ │ @ instruction: 0xffff3f6d │ │ @ instruction: 0xffff5d31 │ │ - @ instruction: 0xfffed085 │ │ + @ instruction: 0xfffed07c │ │ @ instruction: 0xffff3f37 │ │ @ instruction: 0xffff49a5 │ │ @ instruction: 0xffff5cf5 │ │ - @ instruction: 0xfffed049 │ │ + @ instruction: 0xfffed040 │ │ @ instruction: 0xffff496f │ │ @ instruction: 0xffff3ef5 │ │ @ instruction: 0xffff5cb9 │ │ - @ instruction: 0xfffed00d │ │ + @ instruction: 0xfffed004 │ │ @ instruction: 0xffff4933 │ │ @ instruction: 0xffff3eb9 │ │ @ instruction: 0xffff5c7d │ │ - @ instruction: 0xfffecfd1 │ │ + @ instruction: 0xfffecfc8 │ │ @ instruction: 0xffff48f7 │ │ @ instruction: 0xffff3e7d │ │ @ instruction: 0xffff5c41 │ │ - @ instruction: 0xfffecf95 │ │ + @ instruction: 0xfffecf8c │ │ ldrbtmi r4, [r9], #-2488 @ 0xfffff648 │ │ ldmibmi r8!, {r1, r2, r3, r5, r6, r7, sl, sp, lr, pc} │ │ and r4, r4, r9, ror r4 │ │ ldrbtmi r4, [r9], #-2487 @ 0xfffff649 │ │ ldmibmi r7!, {r0, sp, lr, pc} │ │ @ instruction: 0x46284479 │ │ @ instruction: 0xf0152201 │ │ @@ -5698,63 +5698,63 @@ │ │ @ instruction: 0x069f069c │ │ ldmdbmi r5!, {r1, r5, r7, r9, sl} │ │ @ instruction: 0xf0004479 │ │ ldmdbmi r4!, {r2, r3, r4, r7, r9, sl, fp, ip, sp, pc} │ │ rsb r4, fp, r9, ror r4 │ │ ldrbtmi r4, [r9], #-2355 @ 0xfffff6cd │ │ svclt 0x0000e068 │ │ - @ instruction: 0xfffeceb1 │ │ + @ instruction: 0xfffecea8 │ │ @ instruction: 0xffff3d65 │ │ @ instruction: 0xffff47d3 │ │ @ instruction: 0xffff5b23 │ │ - @ instruction: 0xfffece77 │ │ + @ instruction: 0xfffece6e │ │ @ instruction: 0xffff479d │ │ @ instruction: 0xffff3d23 │ │ @ instruction: 0xffff5ae7 │ │ - @ instruction: 0xfffece3b │ │ + @ instruction: 0xfffece32 │ │ @ instruction: 0xffff3ced │ │ @ instruction: 0xffff5ab1 │ │ @ instruction: 0xffff4755 │ │ - @ instruction: 0xfffecdff │ │ + @ instruction: 0xfffecdf6 │ │ @ instruction: 0xffff4725 │ │ @ instruction: 0xffff3cab │ │ @ instruction: 0xffff5a6f │ │ - @ instruction: 0xfffecdc3 │ │ + @ instruction: 0xfffecdba │ │ @ instruction: 0xffff46e9 │ │ @ instruction: 0xffff3c6f │ │ @ instruction: 0xffff5a33 │ │ - @ instruction: 0xfffecd87 │ │ + @ instruction: 0xfffecd7e │ │ @ instruction: 0xffff46ad │ │ @ instruction: 0xffff3c33 │ │ @ instruction: 0xffff59f7 │ │ - @ instruction: 0xfffecd4b │ │ + @ instruction: 0xfffecd42 │ │ @ instruction: 0xffff3bfd │ │ @ instruction: 0xffff466b │ │ @ instruction: 0xffff59bb │ │ - @ instruction: 0xfffecd0f │ │ + @ instruction: 0xfffecd06 │ │ @ instruction: 0xffff3bc1 │ │ @ instruction: 0xffff462f │ │ @ instruction: 0xffff597f │ │ - @ instruction: 0xfffeccd3 │ │ + @ instruction: 0xfffeccca │ │ @ instruction: 0xffff45f9 │ │ @ instruction: 0xffff3b7f │ │ @ instruction: 0xffff5943 │ │ - @ instruction: 0xfffecc97 │ │ + @ instruction: 0xfffecc8e │ │ @ instruction: 0xffff45bd │ │ @ instruction: 0xffff3b43 │ │ @ instruction: 0xffff5907 │ │ - @ instruction: 0xfffecc5b │ │ + @ instruction: 0xfffecc52 │ │ @ instruction: 0xffff3b0d │ │ @ instruction: 0xffff58d1 │ │ @ instruction: 0xffff4575 │ │ - @ instruction: 0xfffecc1f │ │ + @ instruction: 0xfffecc16 │ │ @ instruction: 0xffff3ad1 │ │ @ instruction: 0xffff5895 │ │ @ instruction: 0xffff4539 │ │ - @ instruction: 0xfffecbe3 │ │ + @ instruction: 0xfffecbda │ │ @ instruction: 0xffff3a95 │ │ @ instruction: 0xffff4503 │ │ ldrbtmi r4, [r9], #-2487 @ 0xfffff649 │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @ instruction: 0xf9b6f015 │ │ @ instruction: 0xf47e2800 │ │ bvs c5dffc │ │ @@ -5934,60 +5934,60 @@ │ │ beq 18b3424 │ │ beq 1a35dac │ │ ldrbtmi r4, [r9], #-2353 @ 0xfffff6cf │ │ blt 18ef424 │ │ ldrbtmi r4, [r9], #-2352 @ 0xfffff6d0 │ │ svclt 0x0000e062 │ │ @ instruction: 0xffff5785 │ │ - @ instruction: 0xfffecad9 │ │ + @ instruction: 0xfffecad0 │ │ @ instruction: 0xffff43fb │ │ @ instruction: 0xffff3977 │ │ @ instruction: 0xffff573b │ │ - @ instruction: 0xfffeca8f │ │ + @ instruction: 0xfffeca86 │ │ @ instruction: 0xffff3941 │ │ @ instruction: 0xffff43af │ │ @ instruction: 0xffff56ff │ │ - @ instruction: 0xfffeca53 │ │ + @ instruction: 0xfffeca4a │ │ @ instruction: 0xffff3905 │ │ @ instruction: 0xffff56c9 │ │ @ instruction: 0xffff436d │ │ - @ instruction: 0xfffeca17 │ │ + @ instruction: 0xfffeca0e │ │ @ instruction: 0xffff38c9 │ │ @ instruction: 0xffff4337 │ │ @ instruction: 0xffff5687 │ │ - @ instruction: 0xfffec9db │ │ + @ instruction: 0xfffec9d2 │ │ @ instruction: 0xffff388d │ │ @ instruction: 0xffff5651 │ │ @ instruction: 0xffff42f5 │ │ - @ instruction: 0xfffec99f │ │ + @ instruction: 0xfffec996 │ │ @ instruction: 0xffff42c5 │ │ @ instruction: 0xffff384b │ │ @ instruction: 0xffff560f │ │ - @ instruction: 0xfffec963 │ │ + @ instruction: 0xfffec95a │ │ @ instruction: 0xffff3815 │ │ @ instruction: 0xffff55d9 │ │ @ instruction: 0xffff427d │ │ - @ instruction: 0xfffec927 │ │ + @ instruction: 0xfffec91e │ │ @ instruction: 0xffff37d9 │ │ @ instruction: 0xffff4247 │ │ @ instruction: 0xffff37cd │ │ @ instruction: 0xffff423b │ │ @ instruction: 0xffff37c1 │ │ @ instruction: 0xffff422f │ │ @ instruction: 0xffff4229 │ │ @ instruction: 0xffff4223 │ │ @ instruction: 0xffff5573 │ │ - @ instruction: 0xfffec8c7 │ │ + @ instruction: 0xfffec8be │ │ @ instruction: 0xffff5543 │ │ - @ instruction: 0xfffec897 │ │ + @ instruction: 0xfffec88e │ │ @ instruction: 0xffff5513 │ │ - @ instruction: 0xfffec867 │ │ + @ instruction: 0xfffec85e │ │ @ instruction: 0xffff3719 │ │ @ instruction: 0xffff54dd │ │ - @ instruction: 0xfffec831 │ │ + @ instruction: 0xfffec828 │ │ @ instruction: 0xffff36e3 │ │ ldrbtmi r4, [r9], #-2495 @ 0xfffff641 │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @ instruction: 0xffe6f014 │ │ @ instruction: 0xf0462800 │ │ bvs c545cc │ │ stmdacs r3, {r0, fp, ip, sp} │ │ @@ -6174,53 +6174,53 @@ │ │ stmdacs r0, {r0, r1, r2, r4, r5, r6, r9, sl, fp, ip, sp, lr, pc} │ │ mrcge 4, 4, APSR_nzcv, cr12, cr13, {3} │ │ stmdbmi ip!, {r0, r1, r3, r4, r7, r8, r9, sl, sp, lr, pc} │ │ subs r4, fp, r9, ror r4 │ │ ldrbtmi r4, [r9], #-2347 @ 0xfffff6d5 │ │ svclt 0x0000e058 │ │ @ instruction: 0xffff53e5 │ │ - @ instruction: 0xfffec739 │ │ + @ instruction: 0xfffec730 │ │ @ instruction: 0xffff35eb │ │ @ instruction: 0xffff53af │ │ @ instruction: 0xffff4053 │ │ - @ instruction: 0xfffec6fd │ │ + @ instruction: 0xfffec6f4 │ │ @ instruction: 0xffff35af │ │ @ instruction: 0xffff5373 │ │ @ instruction: 0xffff4017 │ │ - @ instruction: 0xfffec6c1 │ │ + @ instruction: 0xfffec6b8 │ │ @ instruction: 0xffff3fe7 │ │ @ instruction: 0xffff356d │ │ @ instruction: 0xffff5331 │ │ - @ instruction: 0xfffec685 │ │ + @ instruction: 0xfffec67c │ │ @ instruction: 0xffff3537 │ │ @ instruction: 0xffff52fb │ │ @ instruction: 0xffff3f9f │ │ - @ instruction: 0xfffec649 │ │ + @ instruction: 0xfffec640 │ │ @ instruction: 0xffff3f6f │ │ @ instruction: 0xffff34f5 │ │ @ instruction: 0xffff52b9 │ │ - @ instruction: 0xfffec60d │ │ + @ instruction: 0xfffec604 │ │ @ instruction: 0xffff34bf │ │ @ instruction: 0xffff5283 │ │ @ instruction: 0xffff3f27 │ │ - @ instruction: 0xfffec5d1 │ │ + @ instruction: 0xfffec5c8 │ │ @ instruction: 0xffff3483 │ │ @ instruction: 0xffff5247 │ │ @ instruction: 0xffff3eeb │ │ - @ instruction: 0xfffec595 │ │ + @ instruction: 0xfffec58c │ │ @ instruction: 0xffff3447 │ │ @ instruction: 0xffff520b │ │ @ instruction: 0xffff3eaf │ │ - @ instruction: 0xfffebab2 │ │ + @ instruction: 0xfffebaa9 │ │ @ instruction: 0xfffedaf8 │ │ - @ instruction: 0xfffeba96 │ │ + @ instruction: 0xfffeba8d │ │ @ instruction: 0xfffe817a │ │ @ instruction: 0xfffee4ac │ │ - @ instruction: 0xfffe617d │ │ - @ instruction: 0xfffec48b │ │ + @ instruction: 0xfffe6171 │ │ + @ instruction: 0xfffec482 │ │ @ instruction: 0xffff1bd0 │ │ @ instruction: 0xffff3329 │ │ @ instruction: 0xffff50ed │ │ ldrbtmi r4, [r9], #-2530 @ 0xfffff61e │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ mrc2 0, 0, pc, cr0, cr4, {0} │ │ @ instruction: 0xf47d2800 │ │ @@ -6444,48 +6444,48 @@ │ │ ldceq 0, cr0, [fp, #-16] │ │ stcleq 13, cr0, [r4, #-120]! @ 0xffffff88 │ │ ldrbtmi r4, [r9], #-2341 @ 0xfffff6db │ │ ldcllt 0, cr15, [lr, #-4] │ │ ldrbtmi r4, [r9], #-2340 @ 0xfffff6dc │ │ svclt 0x0000e04d │ │ @ instruction: 0xffff3ce3 │ │ - @ instruction: 0xfffeb8e6 │ │ + @ instruction: 0xfffeb8dd │ │ @ instruction: 0xfffed92c │ │ @ instruction: 0xfffe803a │ │ @ instruction: 0xfffe7fa6 │ │ @ instruction: 0xfffee2d8 │ │ - @ instruction: 0xfffe5fa9 │ │ - @ instruction: 0xfffec2b7 │ │ + @ instruction: 0xfffe5f9d │ │ + @ instruction: 0xfffec2ae │ │ @ instruction: 0xffff19fc │ │ @ instruction: 0xffff3155 │ │ @ instruction: 0xffff4f19 │ │ @ instruction: 0xffff3bbd │ │ - @ instruction: 0xfffeb7c0 │ │ + @ instruction: 0xfffeb7b7 │ │ @ instruction: 0xfffed806 │ │ @ instruction: 0xffff02ae │ │ @ instruction: 0xfffe7e80 │ │ @ instruction: 0xfffee1b2 │ │ - @ instruction: 0xfffe5e91 │ │ - @ instruction: 0xfffec1af │ │ + @ instruction: 0xfffe5e85 │ │ + @ instruction: 0xfffec1a6 │ │ @ instruction: 0xffff18f4 │ │ @ instruction: 0xffff4e17 │ │ @ instruction: 0xffff3047 │ │ @ instruction: 0xffff3ab5 │ │ - @ instruction: 0xfffeb6b8 │ │ + @ instruction: 0xfffeb6af │ │ @ instruction: 0xfffed6fe │ │ @ instruction: 0xfffee10a │ │ @ instruction: 0xfffe7d78 │ │ @ instruction: 0xfffee0aa │ │ - @ instruction: 0xfffe5d7b │ │ - @ instruction: 0xfffec089 │ │ + @ instruction: 0xfffe5d6f │ │ + @ instruction: 0xfffec080 │ │ @ instruction: 0xffff17ce │ │ @ instruction: 0xffff2f27 │ │ @ instruction: 0xffff3995 │ │ @ instruction: 0xffff4ce5 │ │ - @ instruction: 0xfffec039 │ │ + @ instruction: 0xfffec030 │ │ @ instruction: 0xffff2eeb │ │ ldrbtmi r4, [r9], #-2516 @ 0xfffff62c │ │ ldmibmi r4, {r0, sp, lr, pc}^ │ │ @ instruction: 0x46284479 │ │ @ instruction: 0xf0142201 │ │ stmdacs r0, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, fp, ip, sp, lr, pc} │ │ svcge 0x005ef47d │ │ @@ -6694,48 +6694,48 @@ │ │ ldmdbmi r1!, {r4, ip, sp, lr, pc} │ │ stclne 0, cr0, [r7], #-20 @ 0xffffffec │ │ stclne 12, cr1, [sp], #-424 @ 0xfffffe58 │ │ ldrbtmi r4, [r9], #-2340 @ 0xfffff6dc │ │ stcllt 0, cr15, [r6], #-12 │ │ @ instruction: 0xffff4c1d │ │ @ instruction: 0xffff38c1 │ │ - @ instruction: 0xfffebf6b │ │ + @ instruction: 0xfffebf62 │ │ @ instruction: 0xffff2e1d │ │ @ instruction: 0xffff4be1 │ │ @ instruction: 0xffff3885 │ │ - @ instruction: 0xfffebf2f │ │ + @ instruction: 0xfffebf26 │ │ @ instruction: 0xffff2de1 │ │ @ instruction: 0xffff4ba5 │ │ @ instruction: 0xffff3849 │ │ - @ instruction: 0xfffebef3 │ │ - @ instruction: 0xfffe5b8f │ │ - @ instruction: 0xfffebebb │ │ + @ instruction: 0xfffebeea │ │ + @ instruction: 0xfffe5b83 │ │ + @ instruction: 0xfffebeb2 │ │ @ instruction: 0xffff2d6d │ │ @ instruction: 0xffff4b31 │ │ @ instruction: 0xffff37d5 │ │ - @ instruction: 0xfffeb3d8 │ │ + @ instruction: 0xfffeb3cf │ │ @ instruction: 0xfffed41e │ │ @ instruction: 0xfffee909 │ │ @ instruction: 0xfffe7a98 │ │ @ instruction: 0xfffeddca │ │ - @ instruction: 0xfffe5a9b │ │ - @ instruction: 0xfffebda9 │ │ + @ instruction: 0xfffe5a8f │ │ + @ instruction: 0xfffebda0 │ │ @ instruction: 0xffff14ee │ │ @ instruction: 0xffff2c47 │ │ @ instruction: 0xffff4a0b │ │ @ instruction: 0xffff36af │ │ - @ instruction: 0xfffeb2b2 │ │ + @ instruction: 0xfffeb2a9 │ │ @ instruction: 0xfffed2f8 │ │ @ instruction: 0xfffe7984 │ │ @ instruction: 0xfffedcb6 │ │ - @ instruction: 0xfffe598b │ │ - @ instruction: 0xfffebc99 │ │ + @ instruction: 0xfffe597f │ │ + @ instruction: 0xfffebc90 │ │ @ instruction: 0xffff13de │ │ - @ instruction: 0xfffe5921 │ │ - @ instruction: 0xfffebc4d │ │ + @ instruction: 0xfffe5915 │ │ + @ instruction: 0xfffebc44 │ │ ldrbtmi r4, [r9], #-2513 @ 0xfffff62f │ │ bllt 1c72094 │ │ ldrbtmi r4, [r9], #-2512 @ 0xfffff630 │ │ bllt 1b7209c │ │ ldrbtmi r4, [r9], #-2511 @ 0xfffff631 │ │ bllt 1a720a4 │ │ ldrbtmi r4, [r9], #-2510 @ 0xfffff632 │ │ @@ -6944,47 +6944,47 @@ │ │ ldr sl, [fp, sp, lsr #23] │ │ @ instruction: 0xffff4839 │ │ @ instruction: 0xffff2a67 │ │ @ instruction: 0xffff34d3 │ │ @ instruction: 0xffff2a57 │ │ @ instruction: 0xffff34c5 │ │ @ instruction: 0xffff4815 │ │ - @ instruction: 0xfffebb69 │ │ + @ instruction: 0xfffebb60 │ │ @ instruction: 0xffff2a1b │ │ @ instruction: 0xffff47df │ │ @ instruction: 0xffff3483 │ │ - @ instruction: 0xfffebb2d │ │ + @ instruction: 0xfffebb24 │ │ @ instruction: 0xffff29df │ │ @ instruction: 0xffff47a3 │ │ @ instruction: 0xffff3447 │ │ - @ instruction: 0xfffebaf1 │ │ - @ instruction: 0xfffebac5 │ │ + @ instruction: 0xfffebae8 │ │ + @ instruction: 0xfffebabc │ │ @ instruction: 0xffff120a │ │ @ instruction: 0xffff2961 │ │ @ instruction: 0xffff4725 │ │ @ instruction: 0xffff33c9 │ │ - @ instruction: 0xfffeba73 │ │ + @ instruction: 0xfffeba6a │ │ @ instruction: 0xffff2925 │ │ @ instruction: 0xffff46e9 │ │ @ instruction: 0xffff338d │ │ @ instruction: 0xfffe6164 │ │ @ instruction: 0xfffe766e │ │ @ instruction: 0xfffed9a0 │ │ - @ instruction: 0xfffe567f │ │ - @ instruction: 0xfffeb99d │ │ + @ instruction: 0xfffe5673 │ │ + @ instruction: 0xfffeb994 │ │ @ instruction: 0xffff10e2 │ │ @ instruction: 0xffff4605 │ │ @ instruction: 0xffff32a9 │ │ @ instruction: 0xffff282f │ │ - @ instruction: 0xfffeaea6 │ │ + @ instruction: 0xfffeae9d │ │ @ instruction: 0xfffeceec │ │ @ instruction: 0xfffe7578 │ │ @ instruction: 0xfffed8aa │ │ - @ instruction: 0xfffe557b │ │ - @ instruction: 0xfffeb889 │ │ + @ instruction: 0xfffe556f │ │ + @ instruction: 0xfffeb880 │ │ @ instruction: 0xffff0fce │ │ svceq 0x0000f1b8 │ │ @ instruction: 0x81aff009 │ │ strtmi r4, [r8], -r6, lsr #19 │ │ ldrbtmi r2, [r9], #-513 @ 0xfffffdff │ │ @ instruction: 0xf818f014 │ │ @ instruction: 0xf47d2800 │ │ @@ -7147,41 +7147,41 @@ │ │ ldrbtmi r2, [r9], #-513 @ 0xfffffdff │ │ mrc2 0, 6, pc, cr10, cr3, {0} │ │ @ instruction: 0xf47d2800 │ │ str sl, [sp, r0, ror #17]! │ │ ldrbtmi r4, [r9], #-2334 @ 0xfffff6e2 │ │ ldmdbmi lr, {r6, sp, lr, pc} │ │ eors r4, sp, r9, ror r4 │ │ - @ instruction: 0xfffe5471 │ │ - @ instruction: 0xfffeb79d │ │ + @ instruction: 0xfffe5465 │ │ + @ instruction: 0xfffeb794 │ │ @ instruction: 0xffff264f │ │ @ instruction: 0xffff4413 │ │ @ instruction: 0xffff30b7 │ │ - @ instruction: 0xfffeacba │ │ + @ instruction: 0xfffeacb1 │ │ @ instruction: 0xfffecd00 │ │ - @ instruction: 0xfffec377 │ │ + @ instruction: 0xfffec36e │ │ @ instruction: 0xfffe737a │ │ @ instruction: 0xfffed6ac │ │ - @ instruction: 0xfffe537d │ │ - @ instruction: 0xfffeb68b │ │ + @ instruction: 0xfffe5371 │ │ + @ instruction: 0xfffeb682 │ │ @ instruction: 0xffff0dd0 │ │ @ instruction: 0xffff2529 │ │ @ instruction: 0xffff42ed │ │ @ instruction: 0xffff2f91 │ │ - @ instruction: 0xfffeab94 │ │ + @ instruction: 0xfffeab8b │ │ @ instruction: 0xfffecbda │ │ @ instruction: 0xffff24d5 │ │ - @ instruction: 0xfffeab5a │ │ + @ instruction: 0xfffeab51 │ │ @ instruction: 0xffff428f │ │ @ instruction: 0xffff00d5 │ │ @ instruction: 0xfffea059 │ │ @ instruction: 0xfffe721c │ │ @ instruction: 0xfffed54e │ │ - @ instruction: 0xfffe5225 │ │ - @ instruction: 0xfffeb551 │ │ + @ instruction: 0xfffe5219 │ │ + @ instruction: 0xfffeb548 │ │ @ instruction: 0xffff0c96 │ │ @ instruction: 0xffff23ef │ │ @ instruction: 0xffff41b3 │ │ ldrbtmi r4, [r9], #-2523 @ 0xfffff625 │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ mcr2 0, 4, pc, cr14, cr3, {0} @ │ │ @ instruction: 0xf47d2800 │ │ @@ -7398,47 +7398,47 @@ │ │ blvs 1c56074 │ │ stmdacs r3, {r0, fp, ip, sp} │ │ teqhi r7, r2, lsl #4 @ │ │ @ instruction: 0xf010e8df │ │ ldmibne r6!, {r3, r6}^ │ │ ldmibne lr!, {r1, r3, r4, r5, r6, r7, r8, fp, ip}^ │ │ @ instruction: 0xffff2ddf │ │ - @ instruction: 0xfffea9e2 │ │ + @ instruction: 0xfffea9d9 │ │ @ instruction: 0xfffeca28 │ │ @ instruction: 0xfffe70b4 │ │ @ instruction: 0xfffed3e6 │ │ - @ instruction: 0xfffe50bb │ │ - @ instruction: 0xfffeb3c9 │ │ + @ instruction: 0xfffe50af │ │ + @ instruction: 0xfffeb3c0 │ │ @ instruction: 0xffff0b0e │ │ - @ instruction: 0xfffe5051 │ │ - @ instruction: 0xfffeb37d │ │ + @ instruction: 0xfffe5045 │ │ + @ instruction: 0xfffeb374 │ │ @ instruction: 0xffff222f │ │ @ instruction: 0xffff3ff3 │ │ @ instruction: 0xffff2c97 │ │ - @ instruction: 0xfffea89a │ │ + @ instruction: 0xfffea891 │ │ @ instruction: 0xfffec8e0 │ │ @ instruction: 0xffff21db │ │ - @ instruction: 0xfffea860 │ │ + @ instruction: 0xfffea857 │ │ @ instruction: 0xffff3f95 │ │ @ instruction: 0xfffefddb │ │ @ instruction: 0xfffe9d5f │ │ @ instruction: 0xfffe6f22 │ │ @ instruction: 0xfffed254 │ │ - @ instruction: 0xfffe4f2b │ │ - @ instruction: 0xfffeb257 │ │ + @ instruction: 0xfffe4f1f │ │ + @ instruction: 0xfffeb24e │ │ @ instruction: 0xffff099c │ │ @ instruction: 0xffff20f5 │ │ @ instruction: 0xffff3eb9 │ │ @ instruction: 0xffff2b5d │ │ - @ instruction: 0xfffea760 │ │ + @ instruction: 0xfffea757 │ │ @ instruction: 0xfffec7a6 │ │ - @ instruction: 0xfffeb1fb │ │ + @ instruction: 0xfffeb1f2 │ │ @ instruction: 0xfffe6e14 │ │ @ instruction: 0xfffed146 │ │ - @ instruction: 0xfffe4e25 │ │ + @ instruction: 0xfffe4e19 │ │ ldrbtmi r4, [r9], #-2525 @ 0xfffff623 │ │ stmialt r2!, {r1, ip, sp, lr, pc}^ │ │ @ instruction: 0x462849dc │ │ ldrbtmi r2, [r9], #-513 @ 0xfffffdff │ │ stc2 0, cr15, [lr], {19} │ │ @ instruction: 0xf0452800 │ │ @ instruction: 0xe76580dc │ │ @@ -7653,47 +7653,47 @@ │ │ stmdbmi r7!, {r3, r6, r7, r9, sp, lr, pc} │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @ instruction: 0xf0134479 │ │ stmdacs r0, {r0, r1, r5, r6, r7, r9, fp, ip, sp, lr, pc} │ │ cfstrdge mvd15, [r6, #-496] @ 0xfffffe10 │ │ stmdbmi r3!, {r0, r1, r3, r5, r7, r8, r9, sl, sp, lr, pc} │ │ sub r4, sl, r9, ror r4 │ │ - @ instruction: 0xfffeb0b9 │ │ + @ instruction: 0xfffeb0b0 │ │ @ instruction: 0xffff07fe │ │ @ instruction: 0xffff3d21 │ │ @ instruction: 0xffff3d1b │ │ @ instruction: 0xffff1f4b │ │ @ instruction: 0xffff29b9 │ │ - @ instruction: 0xfffea5bc │ │ + @ instruction: 0xfffea5b3 │ │ @ instruction: 0xfffec602 │ │ @ instruction: 0xfffe6c8e │ │ @ instruction: 0xfffecfc0 │ │ - @ instruction: 0xfffe4c95 │ │ - @ instruction: 0xfffeafa3 │ │ + @ instruction: 0xfffe4c89 │ │ + @ instruction: 0xfffeaf9a │ │ @ instruction: 0xffff06e8 │ │ - @ instruction: 0xfffe4c2b │ │ - @ instruction: 0xfffeaf57 │ │ + @ instruction: 0xfffe4c1f │ │ + @ instruction: 0xfffeaf4e │ │ @ instruction: 0xffff1e09 │ │ @ instruction: 0xffff2877 │ │ - @ instruction: 0xfffea47a │ │ + @ instruction: 0xfffea471 │ │ @ instruction: 0xfffec4c0 │ │ @ instruction: 0xfffe074b │ │ @ instruction: 0xfffe6b3a │ │ @ instruction: 0xfffece6c │ │ - @ instruction: 0xfffe4b3d │ │ - @ instruction: 0xfffeae4b │ │ + @ instruction: 0xfffe4b31 │ │ + @ instruction: 0xfffeae42 │ │ @ instruction: 0xffff0590 │ │ @ instruction: 0xffff1ce9 │ │ @ instruction: 0xffff3aad │ │ @ instruction: 0xffff2751 │ │ @ instruction: 0xfffe5528 │ │ @ instruction: 0xfffe6a32 │ │ @ instruction: 0xfffecd64 │ │ - @ instruction: 0xfffe4a43 │ │ - @ instruction: 0xfffead61 │ │ + @ instruction: 0xfffe4a37 │ │ + @ instruction: 0xfffead58 │ │ @ instruction: 0xffff04a8 │ │ @ instruction: 0xffff1c01 │ │ ldrbtmi r4, [r9], #-2510 @ 0xfffff632 │ │ stmibmi lr, {r0, sp, lr, pc}^ │ │ @ instruction: 0x46284479 │ │ @ instruction: 0xf0132201 │ │ stmdacs r0, {r0, r2, r3, r7, r9, fp, ip, sp, lr, pc} │ │ @@ -7897,50 +7897,50 @@ │ │ ldrbtmi r4, [r9], #-2345 @ 0xfffff6d7 │ │ ldmdalt r9!, {r0, ip, sp, lr, pc} │ │ ldrbtmi r4, [r9], #-2344 @ 0xfffff6d8 │ │ stmdbmi r8!, {r2, r4, r6, sp, lr, pc} │ │ subs r4, r1, r9, ror r4 │ │ @ instruction: 0xffff3939 │ │ @ instruction: 0xffff25dd │ │ - @ instruction: 0xfffea1e0 │ │ + @ instruction: 0xfffea1d7 │ │ @ instruction: 0xfffec226 │ │ @ instruction: 0xfffe1c83 │ │ @ instruction: 0xfffe68a0 │ │ @ instruction: 0xfffecbd2 │ │ - @ instruction: 0xfffe48a9 │ │ - @ instruction: 0xfffeabd5 │ │ + @ instruction: 0xfffe489d │ │ + @ instruction: 0xfffeabcc │ │ @ instruction: 0xffff031a │ │ @ instruction: 0xffff1a73 │ │ @ instruction: 0xffff3837 │ │ @ instruction: 0xffff24db │ │ - @ instruction: 0xfffea0de │ │ + @ instruction: 0xfffea0d5 │ │ @ instruction: 0xfffec124 │ │ @ instruction: 0xffff1a1f │ │ - @ instruction: 0xfffea0a4 │ │ + @ instruction: 0xfffea09b │ │ @ instruction: 0xffff37d9 │ │ @ instruction: 0xfffef61f │ │ @ instruction: 0xfffdf79e │ │ @ instruction: 0xfffe675c │ │ @ instruction: 0xfffeca8e │ │ - @ instruction: 0xfffe4765 │ │ - @ instruction: 0xfffeaa91 │ │ + @ instruction: 0xfffe4759 │ │ + @ instruction: 0xfffeaa88 │ │ @ instruction: 0xffff01d6 │ │ @ instruction: 0xffff192f │ │ @ instruction: 0xffff36f3 │ │ @ instruction: 0xffff2385 │ │ - @ instruction: 0xfffeaa33 │ │ - @ instruction: 0xfffeaa05 │ │ + @ instruction: 0xfffeaa2a │ │ + @ instruction: 0xfffea9fc │ │ @ instruction: 0xffff18b7 │ │ @ instruction: 0xffff367b │ │ @ instruction: 0xffff231f │ │ - @ instruction: 0xfffea9c9 │ │ + @ instruction: 0xfffea9c0 │ │ @ instruction: 0xffff187b │ │ @ instruction: 0xffff363f │ │ @ instruction: 0xffff22e3 │ │ - @ instruction: 0xfffea98d │ │ + @ instruction: 0xfffea984 │ │ @ instruction: 0xffff183f │ │ @ instruction: 0xffff3603 │ │ ldrbtmi r4, [r9], #-2486 @ 0xfffff64a │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @ instruction: 0xf8a2f013 │ │ @ instruction: 0xf47c2800 │ │ bvs c60728 │ │ @@ -8119,44 +8119,44 @@ │ │ stmdbmi r3!, {r0, r2, r3, r8, fp} │ │ @ instruction: 0xf0014479 │ │ stmdbmi r2!, {r0, r3, r8, fp, ip, sp, pc} │ │ sub r4, r7, r9, ror r4 │ │ ldrbtmi r4, [r9], #-2337 @ 0xfffff6df │ │ svclt 0x0000e044 │ │ @ instruction: 0xffff2207 │ │ - @ instruction: 0xfffea8b1 │ │ + @ instruction: 0xfffea8a8 │ │ @ instruction: 0xffff21d7 │ │ @ instruction: 0xffff175d │ │ @ instruction: 0xffff3521 │ │ - @ instruction: 0xfffea875 │ │ - @ instruction: 0xfffea847 │ │ - @ instruction: 0xfffea819 │ │ - @ instruction: 0xfffea7eb │ │ - @ instruction: 0xfffea7e3 │ │ - @ instruction: 0xfffea7cd │ │ + @ instruction: 0xfffea86c │ │ + @ instruction: 0xfffea83e │ │ + @ instruction: 0xfffea810 │ │ + @ instruction: 0xfffea7e2 │ │ + @ instruction: 0xfffea7da │ │ + @ instruction: 0xfffea7c4 │ │ @ instruction: 0xffff1679 │ │ @ instruction: 0xfffe63e4 │ │ @ instruction: 0xfffec716 │ │ - @ instruction: 0xfffe43f5 │ │ - @ instruction: 0xfffea713 │ │ + @ instruction: 0xfffe43e9 │ │ + @ instruction: 0xfffea70a │ │ @ instruction: 0xffff15c5 │ │ @ instruction: 0xffff3387 │ │ @ instruction: 0xffff2029 │ │ - @ instruction: 0xfffe4397 │ │ - @ instruction: 0xfffea6c3 │ │ - @ instruction: 0xfffe435f │ │ - @ instruction: 0xfffea68b │ │ + @ instruction: 0xfffe438b │ │ + @ instruction: 0xfffea6ba │ │ + @ instruction: 0xfffe4353 │ │ + @ instruction: 0xfffea682 │ │ @ instruction: 0xffff153d │ │ @ instruction: 0xffff3301 │ │ @ instruction: 0xffff1fa5 │ │ - @ instruction: 0xfffea64f │ │ + @ instruction: 0xfffea646 │ │ @ instruction: 0xffff1501 │ │ @ instruction: 0xffff32c5 │ │ @ instruction: 0xffff1f69 │ │ - @ instruction: 0xfffea613 │ │ + @ instruction: 0xfffea60a │ │ @ instruction: 0xffff14c5 │ │ @ instruction: 0xffff3289 │ │ ldrbtmi r4, [r9], #-2521 @ 0xfffff627 │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ mrc2 0, 7, pc, cr2, cr2, {0} │ │ @ instruction: 0xf47c2800 │ │ ldmibmi r6, {r0, r2, r3, r4, r5, r9, fp, sp, pc}^ │ │ @@ -8370,53 +8370,53 @@ │ │ stc2l 0, cr15, [lr, #-72] @ 0xffffffb8 │ │ @ instruction: 0xf47c2800 │ │ @ instruction: 0xf04fa916 │ │ @ instruction: 0xf04f0901 │ │ @ instruction: 0xf04f0800 │ │ rsb r0, r0, r1, lsl #20 │ │ @ instruction: 0xffff1ea7 │ │ - @ instruction: 0xfffe9aaa │ │ + @ instruction: 0xfffe9aa1 │ │ @ instruction: 0xfffebaf0 │ │ @ instruction: 0xfffebaf9 │ │ @ instruction: 0xfffe064b │ │ @ instruction: 0xffff31a5 │ │ @ instruction: 0xfffe063a │ │ @ instruction: 0xfffe8f85 │ │ @ instruction: 0xfffe5550 │ │ @ instruction: 0xffff41ac │ │ @ instruction: 0xfffec446 │ │ @ instruction: 0xfffec43a │ │ @ instruction: 0xffff1325 │ │ @ instruction: 0xffff30e9 │ │ @ instruction: 0xffff1d8d │ │ - @ instruction: 0xfffe9990 │ │ + @ instruction: 0xfffe9987 │ │ @ instruction: 0xfffeb9d6 │ │ @ instruction: 0xfffeb9df │ │ @ instruction: 0xfffe0531 │ │ @ instruction: 0xffff308b │ │ @ instruction: 0xfffe0520 │ │ @ instruction: 0xfffe8e6b │ │ - @ instruction: 0xfffe9904 │ │ + @ instruction: 0xfffe98fb │ │ @ instruction: 0xffff4092 │ │ @ instruction: 0xfffec32c │ │ @ instruction: 0xfffec320 │ │ @ instruction: 0xffff120b │ │ @ instruction: 0xffff2fcf │ │ @ instruction: 0xffff1c73 │ │ @ instruction: 0xfffec2f5 │ │ @ instruction: 0xfffeedbc │ │ - @ instruction: 0xfffe3faf │ │ - @ instruction: 0xfffea2db │ │ + @ instruction: 0xfffe3fa3 │ │ + @ instruction: 0xfffea2d2 │ │ @ instruction: 0xffff118d │ │ @ instruction: 0xffff2f51 │ │ @ instruction: 0xffff1bf5 │ │ - @ instruction: 0xfffe97f8 │ │ + @ instruction: 0xfffe97ef │ │ @ instruction: 0xfffeb83e │ │ @ instruction: 0xffff1123 │ │ - @ instruction: 0xfffe9798 │ │ + @ instruction: 0xfffe978f │ │ @ instruction: 0xffff2eb3 │ │ strtmi r4, [r8], -pc, asr #19 │ │ ldrbtmi r2, [r9], #-517 @ 0xfffffdfb │ │ stc2l 0, cr15, [ip], #72 @ 0x48 │ │ @ instruction: 0xf47c2800 │ │ @ instruction: 0xf04fa8b4 │ │ @ instruction: 0xf04f0a01 │ │ @@ -8619,38 +8619,38 @@ │ │ stmdami r0!, {r4, r7, fp, sp, lr, pc} │ │ @ instruction: 0xf7f94478 │ │ ldmdbmi pc, {r1, r4, r5, r6, r7, r8, r9, fp, ip, sp, pc} @ │ │ sub r4, r1, r9, ror r4 │ │ ldrbtmi r4, [r9], #-2334 @ 0xfffff6e2 │ │ svclt 0x0000e03e │ │ @ instruction: 0xfffeec3b │ │ - @ instruction: 0xfffe9696 │ │ + @ instruction: 0xfffe968d │ │ @ instruction: 0xfffe5d72 │ │ @ instruction: 0xfffec0a4 │ │ - @ instruction: 0xfffe3d83 │ │ - @ instruction: 0xfffea097 │ │ + @ instruction: 0xfffe3d77 │ │ + @ instruction: 0xfffea08e │ │ @ instruction: 0xfffe5ccc │ │ @ instruction: 0xfffebffe │ │ - @ instruction: 0xfffe3cdd │ │ - @ instruction: 0xfffe9ffb │ │ + @ instruction: 0xfffe3cd1 │ │ + @ instruction: 0xfffe9ff2 │ │ @ instruction: 0xffff0ead │ │ @ instruction: 0xffff2c71 │ │ @ instruction: 0xffff1915 │ │ - @ instruction: 0xfffe9518 │ │ + @ instruction: 0xfffe950f │ │ @ instruction: 0xfffeb55e │ │ @ instruction: 0xfffe7070 │ │ @ instruction: 0xfffe5bd8 │ │ @ instruction: 0xfffebf0a │ │ - @ instruction: 0xfffe3bdb │ │ - @ instruction: 0xfffe9ee9 │ │ + @ instruction: 0xfffe3bcf │ │ + @ instruction: 0xfffe9ee0 │ │ @ instruction: 0xfffef62e │ │ @ instruction: 0xffff0d87 │ │ @ instruction: 0xffff2b4b │ │ @ instruction: 0xffff17ef │ │ - @ instruction: 0xfffe93f2 │ │ + @ instruction: 0xfffe93e9 │ │ @ instruction: 0xfffeb438 │ │ @ instruction: 0xfffeb441 │ │ @ instruction: 0xfffdff91 │ │ @ instruction: 0xffff2aeb │ │ @ instruction: 0xfffdff80 │ │ ldrbtmi r4, [r9], #-2505 @ 0xfffff637 │ │ andcs r4, r2, #40, 12 @ 0x2800000 │ │ @@ -8851,48 +8851,48 @@ │ │ subsle r2, r3, r0, lsl #16 │ │ stmdacs r0, {r4, r5, r6, r7, r8, fp, sp, lr} │ │ bvs c6a304 │ │ subsle r2, r5, r0, lsl #16 │ │ ldrbtmi r4, [r9], #-2341 @ 0xfffff6db │ │ svclt 0x0000e054 │ │ @ instruction: 0xfffe8851 │ │ - @ instruction: 0xfffe92ea │ │ + @ instruction: 0xfffe92e1 │ │ @ instruction: 0xffff3a78 │ │ @ instruction: 0xfffebd10 │ │ @ instruction: 0xfffebd04 │ │ @ instruction: 0xfffef482 │ │ @ instruction: 0xffff0aed │ │ @ instruction: 0xffff0bc9 │ │ @ instruction: 0xffff298d │ │ @ instruction: 0xffff1631 │ │ - @ instruction: 0xfffe9cdb │ │ + @ instruction: 0xfffe9cd2 │ │ @ instruction: 0xffff1601 │ │ @ instruction: 0xffff0b87 │ │ @ instruction: 0xffff294b │ │ - @ instruction: 0xfffe9c9f │ │ - @ instruction: 0xfffe9c85 │ │ - @ instruction: 0xfffe9c6b │ │ - @ instruction: 0xfffe3907 │ │ - @ instruction: 0xfffe9c33 │ │ - @ instruction: 0xfffe38cf │ │ - @ instruction: 0xfffe9bfb │ │ - @ instruction: 0xfffe9bcf │ │ - @ instruction: 0xfffe9ba3 │ │ + @ instruction: 0xfffe9c96 │ │ + @ instruction: 0xfffe9c7c │ │ + @ instruction: 0xfffe9c62 │ │ + @ instruction: 0xfffe38fb │ │ + @ instruction: 0xfffe9c2a │ │ + @ instruction: 0xfffe38c3 │ │ + @ instruction: 0xfffe9bf2 │ │ + @ instruction: 0xfffe9bc6 │ │ + @ instruction: 0xfffe9b9a │ │ @ instruction: 0xffff2840 │ │ @ instruction: 0xffff282a │ │ @ instruction: 0xffff0a29 │ │ @ instruction: 0xffff27ed │ │ @ instruction: 0xffff1491 │ │ - @ instruction: 0xfffe9b3b │ │ - @ instruction: 0xfffe9b0f │ │ + @ instruction: 0xfffe9b32 │ │ + @ instruction: 0xfffe9b06 │ │ @ instruction: 0xffff27ac │ │ @ instruction: 0xffff09ab │ │ @ instruction: 0xffff276f │ │ @ instruction: 0xffff1413 │ │ - @ instruction: 0xfffe9016 │ │ + @ instruction: 0xfffe900d │ │ @ instruction: 0xfffeb05c │ │ @ instruction: 0xffff0951 │ │ strtmi r4, [r8], -pc, asr #19 │ │ ldrbtmi r2, [r9], #-513 @ 0xfffffdff │ │ stmibmi lr, {r1, r2, sp, lr, pc}^ │ │ and r4, r1, r9, ror r4 │ │ ldrbtmi r4, [r9], #-2509 @ 0xfffff633 │ │ @@ -9095,52 +9095,52 @@ │ │ @ instruction: 0xf0114479 │ │ stmdacs r0, {r0, r1, r5, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ blge ffaf376c │ │ stmdbmi sl!, {r0, r4, r5, r7, r8, r9, sl, sp, lr, pc} │ │ subs r4, r7, r9, ror r4 │ │ ldrbtmi r4, [r9], #-2345 @ 0xfffff6d7 │ │ svclt 0x0000e054 │ │ - @ instruction: 0xfffe8f40 │ │ + @ instruction: 0xfffe8f37 │ │ @ instruction: 0xffff2675 │ │ @ instruction: 0xfffee4bb │ │ @ instruction: 0xfffe619b │ │ @ instruction: 0xfffe5602 │ │ @ instruction: 0xfffeb934 │ │ - @ instruction: 0xfffe3613 │ │ - @ instruction: 0xfffe993f │ │ + @ instruction: 0xfffe3607 │ │ + @ instruction: 0xfffe9936 │ │ @ instruction: 0xfffef084 │ │ @ instruction: 0xffff07dd │ │ @ instruction: 0xffff25a1 │ │ @ instruction: 0xffff1245 │ │ - @ instruction: 0xfffe8e48 │ │ + @ instruction: 0xfffe8e3f │ │ @ instruction: 0xfffeae8e │ │ - @ instruction: 0xfffe8e2c │ │ + @ instruction: 0xfffe8e23 │ │ @ instruction: 0xffff077f │ │ - @ instruction: 0xfffe8e04 │ │ + @ instruction: 0xfffe8dfb │ │ @ instruction: 0xffff2539 │ │ @ instruction: 0xfffee37f │ │ @ instruction: 0xfffe77f8 │ │ @ instruction: 0xfffe54c4 │ │ @ instruction: 0xfffeb7f6 │ │ - @ instruction: 0xfffe34d5 │ │ - @ instruction: 0xfffe9801 │ │ + @ instruction: 0xfffe34c9 │ │ + @ instruction: 0xfffe97f8 │ │ @ instruction: 0xffff06b3 │ │ @ instruction: 0xffff2477 │ │ @ instruction: 0xffff111b │ │ - @ instruction: 0xfffe8d1e │ │ + @ instruction: 0xfffe8d15 │ │ @ instruction: 0xfffead64 │ │ @ instruction: 0xffff065f │ │ - @ instruction: 0xfffe8ce4 │ │ + @ instruction: 0xfffe8cdb │ │ @ instruction: 0xffff2419 │ │ @ instruction: 0xfffee25f │ │ @ instruction: 0xfffdefbc │ │ @ instruction: 0xfffe53a6 │ │ @ instruction: 0xfffeb6d8 │ │ - @ instruction: 0xfffe33b7 │ │ - @ instruction: 0xfffe96e3 │ │ + @ instruction: 0xfffe33ab │ │ + @ instruction: 0xfffe96da │ │ @ instruction: 0xfffeee28 │ │ @ instruction: 0xffff0581 │ │ @ instruction: 0xffff2345 │ │ ldrbtmi r4, [r9], #-2474 @ 0xfffff656 │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @ instruction: 0xff40f011 │ │ @ instruction: 0xf47b2800 │ │ @@ -9308,44 +9308,44 @@ │ │ ldrne r1, [r6, #1427] @ 0x593 │ │ ldrbtmi r4, [r9], #-2338 @ 0xfffff6de │ │ ldclt 0, cr15, [r0, #8] │ │ ldrbtmi r4, [r9], #-2337 @ 0xfffff6df │ │ stmdbmi r1!, {r1, r2, r6, sp, lr, pc} │ │ sub r4, r3, r9, ror r4 │ │ @ instruction: 0xffff0f43 │ │ - @ instruction: 0xfffe8b46 │ │ + @ instruction: 0xfffe8b3d │ │ @ instruction: 0xfffeab8c │ │ @ instruction: 0xffff0487 │ │ - @ instruction: 0xfffe8b0c │ │ + @ instruction: 0xfffe8b03 │ │ @ instruction: 0xffff2241 │ │ @ instruction: 0xfffee087 │ │ - @ instruction: 0xfffe8aec │ │ + @ instruction: 0xfffe8ae3 │ │ @ instruction: 0xfffe51ce │ │ @ instruction: 0xfffeb500 │ │ - @ instruction: 0xfffe31df │ │ - @ instruction: 0xfffe950b │ │ + @ instruction: 0xfffe31d3 │ │ + @ instruction: 0xfffe9502 │ │ @ instruction: 0xfffeec50 │ │ @ instruction: 0xfffeec3c │ │ @ instruction: 0xfffeec28 │ │ @ instruction: 0xffff037f │ │ @ instruction: 0xffff2143 │ │ @ instruction: 0xffff0dd5 │ │ - @ instruction: 0xfffe9483 │ │ - @ instruction: 0xfffe3121 │ │ - @ instruction: 0xfffe944d │ │ + @ instruction: 0xfffe947a │ │ + @ instruction: 0xfffe3115 │ │ + @ instruction: 0xfffe9444 │ │ @ instruction: 0xffff02ff │ │ @ instruction: 0xffff20c3 │ │ @ instruction: 0xffff0d67 │ │ - @ instruction: 0xfffe9411 │ │ + @ instruction: 0xfffe9408 │ │ @ instruction: 0xffff02c3 │ │ @ instruction: 0xffff0d31 │ │ @ instruction: 0xffff2081 │ │ - @ instruction: 0xfffe93d5 │ │ - @ instruction: 0xfffe93a9 │ │ - @ instruction: 0xfffe937d │ │ + @ instruction: 0xfffe93cc │ │ + @ instruction: 0xfffe93a0 │ │ + @ instruction: 0xfffe9374 │ │ @ instruction: 0xffff022f │ │ @ instruction: 0xffff1ff3 │ │ ldrbtmi r4, [r9], #-2514 @ 0xfffff62e │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ stc2 0, cr15, [r8, #68]! @ 0x44 │ │ @ instruction: 0xf47b2800 │ │ stmibmi pc, {r0, r1, r2, r3, r9, fp, sp, pc}^ @ │ │ @@ -9555,38 +9555,38 @@ │ │ ldrbtmi r4, [r9], #-2334 @ 0xfffff6e2 │ │ ldmdbmi lr, {r6, sp, lr, pc} │ │ eors r4, sp, r9, ror r4 │ │ @ instruction: 0xffff0c13 │ │ @ instruction: 0xfffe02c9 │ │ @ instruction: 0xfffe4efe │ │ @ instruction: 0xfffeb230 │ │ - @ instruction: 0xfffe2f0f │ │ - @ instruction: 0xfffe923b │ │ + @ instruction: 0xfffe2f03 │ │ + @ instruction: 0xfffe9232 │ │ @ instruction: 0xfffee980 │ │ @ instruction: 0xffff00d9 │ │ @ instruction: 0xffff1e9d │ │ @ instruction: 0xffff0b41 │ │ @ instruction: 0xfffea7a7 │ │ @ instruction: 0xfffe4e2c │ │ @ instruction: 0xfffeb15e │ │ - @ instruction: 0xfffe2e3d │ │ - @ instruction: 0xfffe9169 │ │ + @ instruction: 0xfffe2e31 │ │ + @ instruction: 0xfffe9160 │ │ @ instruction: 0xfffee8ae │ │ - @ instruction: 0xfffe914d │ │ - @ instruction: 0xfffe1795 │ │ + @ instruction: 0xfffe9144 │ │ + @ instruction: 0xfffe1789 │ │ @ instruction: 0xfffe4d60 │ │ @ instruction: 0xfffeb092 │ │ - @ instruction: 0xfffe2d71 │ │ - @ instruction: 0xfffe908f │ │ - @ instruction: 0xfffe906b │ │ - @ instruction: 0xfffe9047 │ │ - @ instruction: 0xfffe9019 │ │ - @ instruction: 0xfffe8ff5 │ │ - @ instruction: 0xfffe8fd1 │ │ - @ instruction: 0xfffe8fad │ │ + @ instruction: 0xfffe2d65 │ │ + @ instruction: 0xfffe9086 │ │ + @ instruction: 0xfffe9062 │ │ + @ instruction: 0xfffe903e │ │ + @ instruction: 0xfffe9010 │ │ + @ instruction: 0xfffe8fec │ │ + @ instruction: 0xfffe8fc8 │ │ + @ instruction: 0xfffe8fa4 │ │ @ instruction: 0xfffefe5f │ │ @ instruction: 0xffff1c23 │ │ ldrbtmi r4, [r9], #-2506 @ 0xfffff636 │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ blx ff1f2d7a │ │ @ instruction: 0xf47b2800 │ │ bvs c60d70 │ │ @@ -9785,45 +9785,45 @@ │ │ stmdaeq ip, {r0, r3, r6, fp}^ │ │ ldrbtmi r4, [r9], #-2339 @ 0xfffff6dd │ │ stmdalt r6, {r0, ip, sp, lr, pc}^ │ │ ldrbtmi r4, [r9], #-2338 @ 0xfffff6de │ │ stmdbmi r2!, {r3, r6, sp, lr, pc} │ │ sub r4, r5, r9, ror r4 │ │ @ instruction: 0xffff084f │ │ - @ instruction: 0xfffe8ef9 │ │ + @ instruction: 0xfffe8ef0 │ │ @ instruction: 0xfffefdab │ │ @ instruction: 0xfffe4b9a │ │ @ instruction: 0xfffe4b08 │ │ @ instruction: 0xfffeae3a │ │ - @ instruction: 0xfffe2b19 │ │ - @ instruction: 0xfffe8e35 │ │ - @ instruction: 0xfffe8e1b │ │ + @ instruction: 0xfffe2b0d │ │ + @ instruction: 0xfffe8e2c │ │ + @ instruction: 0xfffe8e12 │ │ @ instruction: 0xfffefccf │ │ @ instruction: 0xffff1a93 │ │ @ instruction: 0xffff0725 │ │ - @ instruction: 0xfffe832c │ │ + @ instruction: 0xfffe8323 │ │ @ instruction: 0xfffea372 │ │ @ instruction: 0xffff1a5f │ │ @ instruction: 0xfffe49e2 │ │ @ instruction: 0xfffead14 │ │ - @ instruction: 0xfffe29f3 │ │ - @ instruction: 0xfffe8d1f │ │ + @ instruction: 0xfffe29e7 │ │ + @ instruction: 0xfffe8d16 │ │ @ instruction: 0xfffee464 │ │ @ instruction: 0xfffefbbd │ │ @ instruction: 0xffff1981 │ │ @ instruction: 0xffff0625 │ │ @ instruction: 0xffff365c │ │ @ instruction: 0xfffe490e │ │ @ instruction: 0xfffeac40 │ │ - @ instruction: 0xfffe291f │ │ - @ instruction: 0xfffe8c3d │ │ + @ instruction: 0xfffe2913 │ │ + @ instruction: 0xfffe8c34 │ │ @ instruction: 0xfffefaef │ │ @ instruction: 0xffff18b1 │ │ @ instruction: 0xffff0553 │ │ - @ instruction: 0xfffe8c09 │ │ + @ instruction: 0xfffe8c00 │ │ @ instruction: 0xfffefabb │ │ @ instruction: 0xffff187f │ │ ldrbtmi r4, [r9], #-2525 @ 0xfffff623 │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @ instruction: 0xf9ecf011 │ │ @ instruction: 0xf47a2800 │ │ ldmibmi ip, {r2, r4, r5, r7, r8, sl, fp, sp, pc}^ │ │ @@ -10043,54 +10043,54 @@ │ │ stmdacs r3, {r0, fp, ip, sp} │ │ ldrbhi pc, [r9, #517] @ 0x205 @ │ │ tsteq r8, pc, lsl #4 @ │ │ @ instruction: 0xf010e8d1 │ │ @ instruction: 0xffff049b │ │ stclcs 0, cr0, [r6, #344] @ 0x158 │ │ stclcs 13, cr2, [ip, #804] @ 0x324 │ │ - @ instruction: 0xfffe809e │ │ + @ instruction: 0xfffe8095 │ │ @ instruction: 0xfffea0e4 │ │ @ instruction: 0xfffef9df │ │ - @ instruction: 0xfffe8064 │ │ + @ instruction: 0xfffe805b │ │ @ instruction: 0xffff1799 │ │ @ instruction: 0xfffed5df │ │ - @ instruction: 0xfffe8af9 │ │ + @ instruction: 0xfffe8af0 │ │ @ instruction: 0xfffe4726 │ │ @ instruction: 0xfffeaa58 │ │ - @ instruction: 0xfffe2737 │ │ - @ instruction: 0xfffe8a63 │ │ + @ instruction: 0xfffe272b │ │ + @ instruction: 0xfffe8a5a │ │ @ instruction: 0xfffee1a8 │ │ @ instruction: 0xfffef901 │ │ @ instruction: 0xffff16c5 │ │ @ instruction: 0xffff0369 │ │ - @ instruction: 0xfffe7f6c │ │ + @ instruction: 0xfffe7f63 │ │ @ instruction: 0xfffe9fb2 │ │ @ instruction: 0xfffef8ad │ │ - @ instruction: 0xfffe7f32 │ │ + @ instruction: 0xfffe7f29 │ │ @ instruction: 0xffff1667 │ │ @ instruction: 0xfffed4ad │ │ @ instruction: 0xffff3341 │ │ @ instruction: 0xfffe45f0 │ │ @ instruction: 0xfffea922 │ │ - @ instruction: 0xfffe2601 │ │ - @ instruction: 0xfffe892d │ │ + @ instruction: 0xfffe25f5 │ │ + @ instruction: 0xfffe8924 │ │ @ instruction: 0xfffee072 │ │ @ instruction: 0xfffee05e │ │ @ instruction: 0xfffee048 │ │ @ instruction: 0xfffef7a1 │ │ @ instruction: 0xffff1565 │ │ @ instruction: 0xffff0209 │ │ @ instruction: 0xffff154d │ │ @ instruction: 0xfffef763 │ │ @ instruction: 0xffff1527 │ │ @ instruction: 0xffff01cb │ │ @ instruction: 0xfffebe10 │ │ @ instruction: 0xfffe44b4 │ │ @ instruction: 0xfffea7e6 │ │ - @ instruction: 0xfffe24c5 │ │ + @ instruction: 0xfffe24b9 │ │ ldrbtmi r4, [r9], #-2499 @ 0xfffff63d │ │ ldcllt 0, cr15, [r4, #-20]! @ 0xffffffec │ │ strdcc r6, [r1], -r0 │ │ ldrhi pc, [r3], #-0 │ │ @ instruction: 0xf04f6a70 │ │ stmiavs r1, {r0, r1, r2, r3, r4, r5, r6, r7, r9, ip, sp}^ │ │ svclt 0x000c2907 │ │ @@ -10279,49 +10279,49 @@ │ │ vadd.i8 d2, d2, d3 │ │ ldm pc, {r1, r2, r3, r5, r6, r8, r9, pc}^ @ │ │ andeq pc, r4, r0, lsl r0 @ │ │ cmnne r0, #1946157057 @ 0x74000001 │ │ stmdbmi r4!, {r0, r1, r5, r6, r8, r9, ip} │ │ @ instruction: 0xf0024479 │ │ svclt 0x0000bb5d │ │ - @ instruction: 0xfffe8749 │ │ + @ instruction: 0xfffe8740 │ │ @ instruction: 0xfffe437c │ │ @ instruction: 0xfffea6ae │ │ - @ instruction: 0xfffe238d │ │ - @ instruction: 0xfffe86b9 │ │ - @ instruction: 0xfffe869f │ │ - @ instruction: 0xfffe8683 │ │ - @ instruction: 0xfffe8669 │ │ - @ instruction: 0xfffe864f │ │ - @ instruction: 0xfffe8635 │ │ - @ instruction: 0xfffe8611 │ │ - @ instruction: 0xfffe85ed │ │ + @ instruction: 0xfffe2381 │ │ + @ instruction: 0xfffe86b0 │ │ + @ instruction: 0xfffe8696 │ │ + @ instruction: 0xfffe867a │ │ + @ instruction: 0xfffe8660 │ │ + @ instruction: 0xfffe8646 │ │ + @ instruction: 0xfffe862c │ │ + @ instruction: 0xfffe8608 │ │ + @ instruction: 0xfffe85e4 │ │ @ instruction: 0xfffef49f │ │ @ instruction: 0xffff1261 │ │ @ instruction: 0xfffeff03 │ │ @ instruction: 0xfffef487 │ │ @ instruction: 0xffff1249 │ │ @ instruction: 0xfffefeeb │ │ - @ instruction: 0xfffe8599 │ │ + @ instruction: 0xfffe8590 │ │ @ instruction: 0xfffef44b │ │ @ instruction: 0xffff120f │ │ @ instruction: 0xfffefeb3 │ │ - @ instruction: 0xfffe7ab6 │ │ + @ instruction: 0xfffe7aad │ │ @ instruction: 0xfffe9afc │ │ @ instruction: 0xfffef3f7 │ │ - @ instruction: 0xfffe7a7c │ │ + @ instruction: 0xfffe7a73 │ │ @ instruction: 0xffff11b1 │ │ @ instruction: 0xfffecff7 │ │ @ instruction: 0xfffe2c29 │ │ @ instruction: 0xfffe413e │ │ @ instruction: 0xfffea470 │ │ - @ instruction: 0xfffe214f │ │ - @ instruction: 0xfffe847b │ │ + @ instruction: 0xfffe2143 │ │ + @ instruction: 0xfffe8472 │ │ @ instruction: 0xfffedbc0 │ │ - @ instruction: 0xfffe8443 │ │ + @ instruction: 0xfffe843a │ │ @ instruction: 0xf0062800 │ │ blvs c5982c │ │ stmdacs r3, {r0, fp, ip, sp} │ │ teqhi r7, #536870912 @ 0x20000000 @ │ │ @ instruction: 0xf010e8df │ │ @ instruction: 0x13260004 │ │ @ instruction: 0x132c1329 │ │ @@ -10498,57 +10498,57 @@ │ │ stmdalt sp, {r1, ip, sp, lr, pc} │ │ @ instruction: 0x46284930 │ │ ldrbtmi r2, [r9], #-513 @ 0xfffffdff │ │ stc2 0, cr15, [r8], #64 @ 0x40 │ │ @ instruction: 0xf4792800 │ │ @ instruction: 0xf7feacec │ │ svclt 0x0000bfd9 │ │ - @ instruction: 0xfffe8391 │ │ + @ instruction: 0xfffe8388 │ │ @ instruction: 0xfffef243 │ │ @ instruction: 0xffff1007 │ │ @ instruction: 0xfffefcab │ │ - @ instruction: 0xfffe8355 │ │ - @ instruction: 0xfffe8339 │ │ - @ instruction: 0xfffe831d │ │ + @ instruction: 0xfffe834c │ │ + @ instruction: 0xfffe8330 │ │ + @ instruction: 0xfffe8314 │ │ @ instruction: 0xffff0fc5 │ │ @ instruction: 0xffff0fbd │ │ @ instruction: 0xfffef1bf │ │ @ instruction: 0xffff0f81 │ │ @ instruction: 0xfffefc23 │ │ - @ instruction: 0xfffe82d9 │ │ + @ instruction: 0xfffe82d0 │ │ @ instruction: 0xffff0f81 │ │ @ instruction: 0xfffef183 │ │ @ instruction: 0xffff0f47 │ │ @ instruction: 0xfffefbeb │ │ - @ instruction: 0xfffe8289 │ │ + @ instruction: 0xfffe8280 │ │ @ instruction: 0xfffef13b │ │ @ instruction: 0xffff0eff │ │ @ instruction: 0xfffefba3 │ │ - @ instruction: 0xfffe8241 │ │ + @ instruction: 0xfffe8238 │ │ @ instruction: 0xfffef0e9 │ │ @ instruction: 0xffff0ead │ │ @ instruction: 0xfffefb51 │ │ - @ instruction: 0xfffe81fb │ │ + @ instruction: 0xfffe81f2 │ │ @ instruction: 0xfffef0ad │ │ @ instruction: 0xffff0e71 │ │ @ instruction: 0xfffefb15 │ │ - @ instruction: 0xfffe81bf │ │ + @ instruction: 0xfffe81b6 │ │ @ instruction: 0xfffef071 │ │ @ instruction: 0xffff0e35 │ │ @ instruction: 0xfffefad9 │ │ - @ instruction: 0xfffe8183 │ │ + @ instruction: 0xfffe817a │ │ @ instruction: 0xfffef035 │ │ @ instruction: 0xffff0df9 │ │ @ instruction: 0xfffefa9d │ │ - @ instruction: 0xfffe8147 │ │ + @ instruction: 0xfffe813e │ │ @ instruction: 0xfffeeff9 │ │ @ instruction: 0xffff0dbd │ │ @ instruction: 0xfffefa61 │ │ - @ instruction: 0xfffe810b │ │ - @ instruction: 0xfffe80ed │ │ + @ instruction: 0xfffe8102 │ │ + @ instruction: 0xfffe80e4 │ │ @ instruction: 0xfffed832 │ │ ldrbtmi r4, [r9], #-2503 @ 0xfffff639 │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ mcrr2 0, 1, pc, r4, cr0 @ │ │ @ instruction: 0xf4792800 │ │ stmibmi r4, {r2, r8, fp, sp, pc}^ │ │ andcs r4, fp, #40, 12 @ 0x2800000 │ │ @@ -10743,53 +10743,53 @@ │ │ @ instruction: 0x07360733 │ │ ldrbtmi r4, [r9], #-2347 @ 0xfffff6d5 │ │ svclt 0x0030f000 │ │ ldrbtmi r4, [r9], #-2346 @ 0xfffff6d6 │ │ stmdbmi sl!, {r3, r4, r6, sp, lr, pc} │ │ subs r4, r5, r9, ror r4 │ │ @ instruction: 0xffff0ca1 │ │ - @ instruction: 0xfffe8028 │ │ + @ instruction: 0xfffe801f │ │ @ instruction: 0xfffe3c34 │ │ @ instruction: 0xfffe9f66 │ │ - @ instruction: 0xfffe1c45 │ │ - @ instruction: 0xfffe7f55 │ │ - @ instruction: 0xfffe7f31 │ │ + @ instruction: 0xfffe1c39 │ │ + @ instruction: 0xfffe7f4c │ │ + @ instruction: 0xfffe7f28 │ │ @ instruction: 0xfffed676 │ │ @ instruction: 0xfffed660 │ │ - @ instruction: 0xfffe7ee9 │ │ - @ instruction: 0xfffe7ecd │ │ + @ instruction: 0xfffe7ee0 │ │ + @ instruction: 0xfffe7ec4 │ │ @ instruction: 0xfffde010 │ │ @ instruction: 0xfffde00a │ │ @ instruction: 0xfffeed73 │ │ @ instruction: 0xffff0b37 │ │ @ instruction: 0xfffef7db │ │ - @ instruction: 0xfffe7e79 │ │ + @ instruction: 0xfffe7e70 │ │ @ instruction: 0xfffeed2b │ │ @ instruction: 0xffff0aef │ │ @ instruction: 0xfffef793 │ │ - @ instruction: 0xfffe7e3d │ │ + @ instruction: 0xfffe7e34 │ │ @ instruction: 0xfffeecef │ │ @ instruction: 0xffff0ab3 │ │ @ instruction: 0xfffef757 │ │ - @ instruction: 0xfffe7df5 │ │ + @ instruction: 0xfffe7dec │ │ @ instruction: 0xfffeeca7 │ │ @ instruction: 0xffff0a6b │ │ @ instruction: 0xfffef70f │ │ - @ instruction: 0xfffe7dad │ │ + @ instruction: 0xfffe7da4 │ │ @ instruction: 0xfffeec5f │ │ @ instruction: 0xffff0a23 │ │ @ instruction: 0xfffef6c7 │ │ - @ instruction: 0xfffe7d65 │ │ + @ instruction: 0xfffe7d5c │ │ @ instruction: 0xfffeec17 │ │ @ instruction: 0xffff09d9 │ │ @ instruction: 0xfffef67b │ │ @ instruction: 0xfffeebff │ │ @ instruction: 0xffff09c3 │ │ @ instruction: 0xfffef667 │ │ - @ instruction: 0xfffe7d11 │ │ + @ instruction: 0xfffe7d08 │ │ @ instruction: 0xfffeebc3 │ │ @ instruction: 0xffff0987 │ │ ldrbtmi r4, [r9], #-2498 @ 0xfffff63e │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ blx 1874040 │ │ @ instruction: 0xf4792800 │ │ blvs 1ce3704 │ │ @@ -10980,54 +10980,54 @@ │ │ strhi pc, [ip], #-521 @ 0xfffffdf7 │ │ @ instruction: 0xf010e8df │ │ blmi ffd38304 │ │ @ instruction: 0x4c014bf7 │ │ ldrbtmi r4, [r9], #-2345 @ 0xfffff6d7 │ │ bllt ffcb4324 │ │ @ instruction: 0xfffef583 │ │ - @ instruction: 0xfffe7c2d │ │ + @ instruction: 0xfffe7c24 │ │ @ instruction: 0xfffeeadf │ │ @ instruction: 0xffff08a3 │ │ @ instruction: 0xfffef547 │ │ - @ instruction: 0xfffe7bf1 │ │ + @ instruction: 0xfffe7be8 │ │ @ instruction: 0xfffddd34 │ │ @ instruction: 0xfffeea9b │ │ @ instruction: 0xffff085d │ │ @ instruction: 0xfffef4ff │ │ @ instruction: 0xfffeea83 │ │ @ instruction: 0xffff0847 │ │ @ instruction: 0xfffef4eb │ │ - @ instruction: 0xfffe7b8d │ │ + @ instruction: 0xfffe7b84 │ │ @ instruction: 0xfffeea3f │ │ @ instruction: 0xffff0803 │ │ @ instruction: 0xfffef4a7 │ │ - @ instruction: 0xfffe7b51 │ │ + @ instruction: 0xfffe7b48 │ │ @ instruction: 0xfffed296 │ │ @ instruction: 0xfffee9ed │ │ @ instruction: 0xffff07b1 │ │ @ instruction: 0xfffef455 │ │ - @ instruction: 0xfffe7aff │ │ + @ instruction: 0xfffe7af6 │ │ @ instruction: 0xfffee9b1 │ │ @ instruction: 0xffff0775 │ │ @ instruction: 0xfffef419 │ │ - @ instruction: 0xfffe7ac3 │ │ - @ instruction: 0xfffe7aa7 │ │ + @ instruction: 0xfffe7aba │ │ + @ instruction: 0xfffe7a9e │ │ @ instruction: 0xfffee95b │ │ @ instruction: 0xffff071f │ │ @ instruction: 0xfffef3c3 │ │ - @ instruction: 0xfffe7a6d │ │ - @ instruction: 0xfffe7a4f │ │ - @ instruction: 0xfffe7a35 │ │ + @ instruction: 0xfffe7a64 │ │ + @ instruction: 0xfffe7a46 │ │ + @ instruction: 0xfffe7a2c │ │ @ instruction: 0xfffe64c9 │ │ - @ instruction: 0xfffe8657 │ │ - @ instruction: 0xfffe0047 │ │ + @ instruction: 0xfffe864e │ │ + @ instruction: 0xfffe003b │ │ @ instruction: 0xfffe361c │ │ @ instruction: 0xfffe994e │ │ - @ instruction: 0xfffe1625 │ │ - @ instruction: 0xfffe7951 │ │ + @ instruction: 0xfffe1619 │ │ + @ instruction: 0xfffe7948 │ │ ldrbtmi r4, [r9], #-2507 @ 0xfffff635 │ │ andcs r4, r2, #40, 12 @ 0x2800000 │ │ @ instruction: 0xf888f010 │ │ @ instruction: 0xf4792800 │ │ stmibmi r8, {r0, r1, r2, r5, r6, r7, r8, r9, fp, sp, pc}^ │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @ instruction: 0xf0104479 │ │ @@ -11225,52 +11225,52 @@ │ │ bvs ff0388c0 │ │ stmdacs r3, {r0, fp, ip, sp} │ │ strhi pc, [r0, -r1, lsl #4]! │ │ @ instruction: 0xf010e8df │ │ svceq 0x000f0058 │ │ svceq 0x00150f12 │ │ @ instruction: 0xfffe6341 │ │ - @ instruction: 0xfffe84cf │ │ - @ instruction: 0xfffdfebf │ │ + @ instruction: 0xfffe84c6 │ │ + @ instruction: 0xfffdfeb3 │ │ @ instruction: 0xfffe3494 │ │ @ instruction: 0xfffe97c6 │ │ - @ instruction: 0xfffe149d │ │ - @ instruction: 0xfffe77c9 │ │ + @ instruction: 0xfffe1491 │ │ + @ instruction: 0xfffe77c0 │ │ @ instruction: 0xfffee67b │ │ @ instruction: 0xffff043f │ │ @ instruction: 0xfffef0e3 │ │ - @ instruction: 0xfffe778d │ │ + @ instruction: 0xfffe7784 │ │ @ instruction: 0xfffee63f │ │ @ instruction: 0xffff0403 │ │ @ instruction: 0xfffef0a7 │ │ - @ instruction: 0xfffe7751 │ │ + @ instruction: 0xfffe7748 │ │ @ instruction: 0xfffee603 │ │ @ instruction: 0xffff03c7 │ │ @ instruction: 0xfffef06b │ │ - @ instruction: 0xfffe770d │ │ + @ instruction: 0xfffe7704 │ │ @ instruction: 0xfffee5bf │ │ @ instruction: 0xffff0383 │ │ @ instruction: 0xfffef027 │ │ - @ instruction: 0xfffe76d1 │ │ + @ instruction: 0xfffe76c8 │ │ @ instruction: 0xfffee583 │ │ @ instruction: 0xffff0347 │ │ @ instruction: 0xfffeefeb │ │ - @ instruction: 0xfffe768d │ │ + @ instruction: 0xfffe7684 │ │ @ instruction: 0xfffee53f │ │ @ instruction: 0xffff0303 │ │ @ instruction: 0xfffeefa7 │ │ - @ instruction: 0xfffe7649 │ │ + @ instruction: 0xfffe7640 │ │ @ instruction: 0xfffee4fb │ │ @ instruction: 0xffff02bf │ │ @ instruction: 0xfffeef63 │ │ - @ instruction: 0xfffe7605 │ │ + @ instruction: 0xfffe75fc │ │ @ instruction: 0xfffee4b7 │ │ @ instruction: 0xffff027b │ │ @ instruction: 0xfffeef1f │ │ - @ instruction: 0xfffe75bd │ │ + @ instruction: 0xfffe75b4 │ │ @ instruction: 0xfffee46f │ │ @ instruction: 0xffff0233 │ │ @ instruction: 0xfffeeed7 │ │ ldrbtmi r4, [r9], #-2504 @ 0xfffff638 │ │ cdplt 0, 11, cr15, cr11, cr1, {0} │ │ ldrbtmi r4, [r9], #-2505 @ 0xfffff637 │ │ andcs r4, r2, #40, 12 @ 0x2800000 │ │ @@ -11467,60 +11467,60 @@ │ │ ldmdbmi r3!, {r1, r2, r4, r5, sl, ip} │ │ @ instruction: 0xf0024479 │ │ blvs c67b50 │ │ stmdbcs r3, {r0, r6, r9, sl, fp, ip} │ │ ldrbhi pc, [r1], #-514 @ 0xfffffdfe @ │ │ andeq pc, r8, pc, lsl #4 │ │ @ instruction: 0xf011e8d0 │ │ - @ instruction: 0xfffe74cd │ │ + @ instruction: 0xfffe74c4 │ │ ldrtne r0, [sp], #-92 @ 0xffffffa4 │ │ strbne r1, [r3], #-1088 @ 0xfffffbc0 │ │ @ instruction: 0xfffe5f61 │ │ - @ instruction: 0xfffe80ef │ │ - @ instruction: 0xfffdfadf │ │ + @ instruction: 0xfffe80e6 │ │ + @ instruction: 0xfffdfad3 │ │ @ instruction: 0xfffe30b4 │ │ @ instruction: 0xfffe93e6 │ │ - @ instruction: 0xfffe10bd │ │ - @ instruction: 0xfffe73e9 │ │ + @ instruction: 0xfffe10b1 │ │ + @ instruction: 0xfffe73e0 │ │ @ instruction: 0xfffee29b │ │ @ instruction: 0xffff005f │ │ @ instruction: 0xfffeed03 │ │ - @ instruction: 0xfffe73a5 │ │ + @ instruction: 0xfffe739c │ │ @ instruction: 0xfffee257 │ │ @ instruction: 0xffff001b │ │ @ instruction: 0xfffeecbf │ │ - @ instruction: 0xfffe7361 │ │ + @ instruction: 0xfffe7358 │ │ @ instruction: 0xfffee213 │ │ @ instruction: 0xfffeffd5 │ │ @ instruction: 0xfffeec77 │ │ @ instruction: 0xfffee1fb │ │ @ instruction: 0xfffeffbf │ │ @ instruction: 0xfffeec63 │ │ - @ instruction: 0xfffe730d │ │ + @ instruction: 0xfffe7304 │ │ @ instruction: 0xfffee1bf │ │ @ instruction: 0xfffeff83 │ │ @ instruction: 0xfffeec27 │ │ - @ instruction: 0xfffe72d1 │ │ + @ instruction: 0xfffe72c8 │ │ @ instruction: 0xfffee183 │ │ @ instruction: 0xfffeff47 │ │ @ instruction: 0xfffeebeb │ │ - @ instruction: 0xfffe7295 │ │ + @ instruction: 0xfffe728c │ │ @ instruction: 0xfffee147 │ │ @ instruction: 0xfffeff0b │ │ @ instruction: 0xfffeebaf │ │ - @ instruction: 0xfffe7259 │ │ + @ instruction: 0xfffe7250 │ │ @ instruction: 0xfffee10b │ │ @ instruction: 0xfffefecf │ │ @ instruction: 0xfffeeb73 │ │ - @ instruction: 0xfffe721d │ │ + @ instruction: 0xfffe7214 │ │ @ instruction: 0xfffee0cf │ │ @ instruction: 0xfffefe93 │ │ @ instruction: 0xfffeeb37 │ │ - @ instruction: 0xfffe71e1 │ │ - @ instruction: 0xfffe71c3 │ │ + @ instruction: 0xfffe71d8 │ │ + @ instruction: 0xfffe71ba │ │ ldrbtmi r4, [r9], #-2490 @ 0xfffff646 │ │ bllt ff9b4b68 │ │ ldrbtmi r4, [r9], #-2489 @ 0xfffff647 │ │ ldmibmi r9!, {r2, sp, lr, pc} │ │ and r4, r1, r9, ror r4 │ │ ldrbtmi r4, [r9], #-2488 @ 0xfffff648 │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @@ -11700,63 +11700,63 @@ │ │ stmdacs r3, {r0, fp, ip, sp} │ │ ldrbhi pc, [r0, -r0, lsl #4] @ │ │ @ instruction: 0xf010e8df │ │ ldreq r0, [pc, -r4]! │ │ strbeq r0, [r5, -r2, asr #14] │ │ ldrbtmi r4, [r9], #-2353 @ 0xfffff6cf │ │ svclt 0x003ff000 │ │ - @ instruction: 0xfffe70f1 │ │ + @ instruction: 0xfffe70e8 │ │ @ instruction: 0xfffedfa3 │ │ @ instruction: 0xfffefd67 │ │ @ instruction: 0xfffeea0b │ │ - @ instruction: 0xfffe70b5 │ │ + @ instruction: 0xfffe70ac │ │ @ instruction: 0xfffedf67 │ │ @ instruction: 0xfffefd2b │ │ @ instruction: 0xfffee9cf │ │ - @ instruction: 0xfffe7079 │ │ + @ instruction: 0xfffe7070 │ │ @ instruction: 0xfffedf2b │ │ @ instruction: 0xfffefcef │ │ @ instruction: 0xfffee993 │ │ - @ instruction: 0xfffe703d │ │ + @ instruction: 0xfffe7034 │ │ @ instruction: 0xfffedeef │ │ @ instruction: 0xfffefcb3 │ │ @ instruction: 0xfffee957 │ │ - @ instruction: 0xfffe6ff5 │ │ + @ instruction: 0xfffe6fec │ │ @ instruction: 0xfffedea7 │ │ @ instruction: 0xfffefc6b │ │ @ instruction: 0xfffee90f │ │ - @ instruction: 0xfffe6fb1 │ │ + @ instruction: 0xfffe6fa8 │ │ @ instruction: 0xfffede63 │ │ @ instruction: 0xfffefc27 │ │ @ instruction: 0xfffee8cb │ │ - @ instruction: 0xfffe6f75 │ │ + @ instruction: 0xfffe6f6c │ │ @ instruction: 0xfffede27 │ │ @ instruction: 0xfffefbeb │ │ @ instruction: 0xfffee88f │ │ - @ instruction: 0xfffe6f39 │ │ + @ instruction: 0xfffe6f30 │ │ @ instruction: 0xfffeddeb │ │ @ instruction: 0xfffefbaf │ │ @ instruction: 0xfffee853 │ │ - @ instruction: 0xfffe6efd │ │ + @ instruction: 0xfffe6ef4 │ │ @ instruction: 0xfffeddaf │ │ @ instruction: 0xfffefb73 │ │ @ instruction: 0xfffee817 │ │ - @ instruction: 0xfffe6ec1 │ │ + @ instruction: 0xfffe6eb8 │ │ @ instruction: 0xfffedd73 │ │ @ instruction: 0xfffefb37 │ │ @ instruction: 0xfffee7db │ │ - @ instruction: 0xfffe6e85 │ │ + @ instruction: 0xfffe6e7c │ │ @ instruction: 0xfffedd37 │ │ @ instruction: 0xfffefafb │ │ @ instruction: 0xfffee79f │ │ - @ instruction: 0xfffe6e49 │ │ + @ instruction: 0xfffe6e40 │ │ @ instruction: 0xfffedcfb │ │ @ instruction: 0xfffefabf │ │ @ instruction: 0xfffee763 │ │ - @ instruction: 0xfffe6e0d │ │ + @ instruction: 0xfffe6e04 │ │ vmovne.8 d1[1], r6 │ │ vmla.i8 d2, d2, d3 │ │ ldm pc, {r0, r1, r2, r4, r6, r7, r8, r9, pc}^ @ │ │ andeq pc, r4, r1, lsl r0 @ │ │ bicne r1, r8, #335544323 @ 0x14000003 │ │ ldmibmi r3, {r0, r1, r3, r6, r7, r8, r9, ip}^ │ │ @ instruction: 0xf0024479 │ │ @@ -11966,42 +11966,42 @@ │ │ @ instruction: 0xf0002800 │ │ stmdavs r0!, {r0, r1, r3, r5, r6, r7, r9, sl, pc} │ │ @ instruction: 0xf7f8602e │ │ stmdbmi pc!, {r1, r2, r3, r4, r5, r6, r8, sl, fp, ip, sp, pc} @ │ │ rsb r4, r1, r9, ror r4 │ │ ldrbtmi r4, [r9], #-2350 @ 0xfffff6d2 │ │ svclt 0x0000e05e │ │ - @ instruction: 0xfffe6d2b │ │ + @ instruction: 0xfffe6d22 │ │ @ instruction: 0xfffedbdd │ │ @ instruction: 0xfffef9a1 │ │ @ instruction: 0xfffee645 │ │ @ instruction: 0xfffeb7d9 │ │ @ instruction: 0xfffe292e │ │ @ instruction: 0xfffe8c60 │ │ - @ instruction: 0xfffe093f │ │ - @ instruction: 0xfffe6c6b │ │ - @ instruction: 0xfffe6c4f │ │ + @ instruction: 0xfffe0933 │ │ + @ instruction: 0xfffe6c62 │ │ + @ instruction: 0xfffe6c46 │ │ @ instruction: 0xfffedb01 │ │ @ instruction: 0xfffef8c5 │ │ @ instruction: 0xfffee569 │ │ - @ instruction: 0xfffe6c07 │ │ + @ instruction: 0xfffe6bfe │ │ @ instruction: 0xfffedab5 │ │ @ instruction: 0xfffed9b7 │ │ @ instruction: 0xfffef859 │ │ @ instruction: 0xfffed991 │ │ @ instruction: 0xfffee4dd │ │ @ instruction: 0xfffed96b │ │ - @ instruction: 0xfffe6b73 │ │ + @ instruction: 0xfffe6b6a │ │ @ instruction: 0xfffed92b │ │ - @ instruction: 0xfffe6b4d │ │ + @ instruction: 0xfffe6b44 │ │ @ instruction: 0xfffeccfe │ │ @ instruction: 0xfffed9d5 │ │ @ instruction: 0xfffef799 │ │ @ instruction: 0xfffee43d │ │ - @ instruction: 0xfffe6ae7 │ │ + @ instruction: 0xfffe6ade │ │ @ instruction: 0xfffed999 │ │ @ instruction: 0xfffef75d │ │ @ instruction: 0xfffee401 │ │ @ instruction: 0xfffe8a83 │ │ @ instruction: 0xfffec1f4 │ │ @ instruction: 0xfffed945 │ │ @ instruction: 0xfffef709 │ │ @@ -12206,59 +12206,59 @@ │ │ mrrceq 12, 5, r0, ip, cr9 │ │ ldrbtmi r4, [r9], #-2353 @ 0xfffff6cf │ │ mrrclt 0, 0, pc, r5, cr1 @ │ │ ldrbtmi r4, [r9], #-2352 @ 0xfffff6d0 │ │ ldmdbmi r0!, {r2, r5, r6, sp, lr, pc} │ │ rsb r4, r1, r9, ror r4 │ │ @ instruction: 0xfffee253 │ │ - @ instruction: 0xfffe68f1 │ │ + @ instruction: 0xfffe68e8 │ │ @ instruction: 0xfffed7a3 │ │ @ instruction: 0xfffef567 │ │ @ instruction: 0xfffee20b │ │ - @ instruction: 0xfffe68a9 │ │ + @ instruction: 0xfffe68a0 │ │ @ instruction: 0xfffed75b │ │ @ instruction: 0xfffef51f │ │ @ instruction: 0xfffee1c3 │ │ - @ instruction: 0xfffe686d │ │ + @ instruction: 0xfffe6864 │ │ @ instruction: 0xfffed71f │ │ @ instruction: 0xfffef4e3 │ │ @ instruction: 0xfffee187 │ │ - @ instruction: 0xfffe6831 │ │ + @ instruction: 0xfffe6828 │ │ @ instruction: 0xfffed6e3 │ │ @ instruction: 0xfffef4a7 │ │ @ instruction: 0xfffee14b │ │ - @ instruction: 0xfffe67ed │ │ + @ instruction: 0xfffe67e4 │ │ @ instruction: 0xfffed69f │ │ @ instruction: 0xfffef463 │ │ @ instruction: 0xfffee107 │ │ - @ instruction: 0xfffe67a9 │ │ + @ instruction: 0xfffe67a0 │ │ @ instruction: 0xfffed65b │ │ @ instruction: 0xfffef41f │ │ @ instruction: 0xfffee0c3 │ │ - @ instruction: 0xfffe676d │ │ + @ instruction: 0xfffe6764 │ │ @ instruction: 0xfffed61f │ │ @ instruction: 0xfffef3e3 │ │ @ instruction: 0xfffee087 │ │ - @ instruction: 0xfffe6731 │ │ + @ instruction: 0xfffe6728 │ │ @ instruction: 0xfffed5e3 │ │ @ instruction: 0xfffef3a7 │ │ @ instruction: 0xfffee04b │ │ - @ instruction: 0xfffe66f5 │ │ + @ instruction: 0xfffe66ec │ │ @ instruction: 0xfffed5a7 │ │ @ instruction: 0xfffef36b │ │ @ instruction: 0xfffee00f │ │ - @ instruction: 0xfffe66ad │ │ + @ instruction: 0xfffe66a4 │ │ @ instruction: 0xfffed55f │ │ @ instruction: 0xfffef323 │ │ @ instruction: 0xfffedfc7 │ │ - @ instruction: 0xfffe6671 │ │ + @ instruction: 0xfffe6668 │ │ @ instruction: 0xfffed523 │ │ @ instruction: 0xfffef2e7 │ │ @ instruction: 0xfffedf8b │ │ - @ instruction: 0xfffe6635 │ │ + @ instruction: 0xfffe662c │ │ @ instruction: 0xfffed4e7 │ │ @ instruction: 0xfffef2ab │ │ ldrbtmi r4, [r9], #-2494 @ 0xfffff642 │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ cdp2 0, 14, cr15, cr6, cr14, {0} │ │ @ instruction: 0xf4772800 │ │ ldmibvs r0!, {r1, r2, r3, r4, r5, r8, r9, sl, fp, sp, pc}^ │ │ @@ -12445,59 +12445,59 @@ │ │ stmdbeq fp!, {r3, r5, r6, r8, fp}^ │ │ ldrbtmi r4, [r9], #-2353 @ 0xfffff6cf │ │ stmdblt r5!, {r0, ip, sp, lr, pc}^ │ │ ldrbtmi r4, [r9], #-2352 @ 0xfffff6d0 │ │ ldmdbmi r0!, {r2, r5, r6, sp, lr, pc} │ │ rsb r4, r1, r9, ror r4 │ │ @ instruction: 0xfffede8f │ │ - @ instruction: 0xfffe652d │ │ + @ instruction: 0xfffe6524 │ │ @ instruction: 0xfffed3df │ │ @ instruction: 0xfffef1a3 │ │ @ instruction: 0xfffede47 │ │ - @ instruction: 0xfffe64e5 │ │ + @ instruction: 0xfffe64dc │ │ @ instruction: 0xfffed397 │ │ @ instruction: 0xfffef15b │ │ @ instruction: 0xfffeddff │ │ - @ instruction: 0xfffe649d │ │ + @ instruction: 0xfffe6494 │ │ @ instruction: 0xfffed34f │ │ @ instruction: 0xfffef113 │ │ @ instruction: 0xfffeddb7 │ │ - @ instruction: 0xfffe6459 │ │ + @ instruction: 0xfffe6450 │ │ @ instruction: 0xfffed30b │ │ @ instruction: 0xfffef0cf │ │ @ instruction: 0xfffedd73 │ │ - @ instruction: 0xfffe641d │ │ + @ instruction: 0xfffe6414 │ │ @ instruction: 0xfffed2cf │ │ @ instruction: 0xfffef093 │ │ @ instruction: 0xfffedd37 │ │ - @ instruction: 0xfffe63e1 │ │ + @ instruction: 0xfffe63d8 │ │ @ instruction: 0xfffed293 │ │ @ instruction: 0xfffef057 │ │ @ instruction: 0xfffedcfb │ │ - @ instruction: 0xfffe63a5 │ │ + @ instruction: 0xfffe639c │ │ @ instruction: 0xfffed257 │ │ @ instruction: 0xfffef01b │ │ @ instruction: 0xfffedcbf │ │ - @ instruction: 0xfffe6369 │ │ + @ instruction: 0xfffe6360 │ │ @ instruction: 0xfffed21b │ │ @ instruction: 0xfffeefdf │ │ @ instruction: 0xfffedc83 │ │ - @ instruction: 0xfffe632d │ │ + @ instruction: 0xfffe6324 │ │ @ instruction: 0xfffed1df │ │ @ instruction: 0xfffeefa3 │ │ @ instruction: 0xfffedc47 │ │ - @ instruction: 0xfffe62f1 │ │ + @ instruction: 0xfffe62e8 │ │ @ instruction: 0xfffed1a3 │ │ @ instruction: 0xfffeef67 │ │ @ instruction: 0xfffedc0b │ │ - @ instruction: 0xfffe62b5 │ │ + @ instruction: 0xfffe62ac │ │ @ instruction: 0xfffed167 │ │ @ instruction: 0xfffeef2b │ │ @ instruction: 0xfffedbcf │ │ - @ instruction: 0xfffe6279 │ │ + @ instruction: 0xfffe6270 │ │ @ instruction: 0xfffed12b │ │ @ instruction: 0xfffeeeef │ │ ldrbtmi r4, [r9], #-2497 @ 0xfffff63f │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ stc2 0, cr15, [r8, #-56] @ 0xffffffc8 │ │ @ instruction: 0xf4772800 │ │ blvs fec65038 │ │ @@ -12687,55 +12687,55 @@ │ │ bvs c64c8c │ │ stmdacs r3, {r0, fp, ip, sp} │ │ ldrthi pc, [pc], #-515 @ 39da0 @ │ │ @ instruction: 0xf010e8df │ │ ldmdbeq r5!, {r3, r5, r6}^ │ │ ldmdbeq sp!, {r0, r3, r4, r5, r6, r8, fp}^ │ │ @ instruction: 0xfffedad3 │ │ - @ instruction: 0xfffe617d │ │ + @ instruction: 0xfffe6174 │ │ @ instruction: 0xfffed02f │ │ @ instruction: 0xfffeedf3 │ │ @ instruction: 0xfffeda97 │ │ - @ instruction: 0xfffe6141 │ │ - @ instruction: 0xfffe6127 │ │ + @ instruction: 0xfffe6138 │ │ + @ instruction: 0xfffe611e │ │ @ instruction: 0xfffecfd9 │ │ @ instruction: 0xfffeed9d │ │ @ instruction: 0xfffeda41 │ │ - @ instruction: 0xfffe60e3 │ │ + @ instruction: 0xfffe60da │ │ @ instruction: 0xfffecf95 │ │ @ instruction: 0xfffeed59 │ │ @ instruction: 0xfffed9fd │ │ - @ instruction: 0xfffe60a7 │ │ + @ instruction: 0xfffe609e │ │ @ instruction: 0xfffecf59 │ │ @ instruction: 0xfffeed1d │ │ @ instruction: 0xfffed9c1 │ │ - @ instruction: 0xfffe606b │ │ + @ instruction: 0xfffe6062 │ │ @ instruction: 0xfffecf1d │ │ @ instruction: 0xfffeece1 │ │ @ instruction: 0xfffed985 │ │ - @ instruction: 0xfffe602f │ │ + @ instruction: 0xfffe6026 │ │ @ instruction: 0xfffecee1 │ │ @ instruction: 0xfffeeca3 │ │ @ instruction: 0xfffed945 │ │ @ instruction: 0xfffecec9 │ │ @ instruction: 0xfffeec8d │ │ @ instruction: 0xfffed931 │ │ - @ instruction: 0xfffe5fdb │ │ + @ instruction: 0xfffe5fd2 │ │ @ instruction: 0xfffece8d │ │ @ instruction: 0xfffeec51 │ │ @ instruction: 0xfffed8f5 │ │ - @ instruction: 0xfffe5f9f │ │ + @ instruction: 0xfffe5f96 │ │ @ instruction: 0xfffece51 │ │ @ instruction: 0xfffeec15 │ │ @ instruction: 0xfffed8b9 │ │ - @ instruction: 0xfffe5f63 │ │ + @ instruction: 0xfffe5f5a │ │ @ instruction: 0xfffece15 │ │ @ instruction: 0xfffeebd9 │ │ @ instruction: 0xfffed87d │ │ - @ instruction: 0xfffe5f1b │ │ + @ instruction: 0xfffe5f12 │ │ @ instruction: 0xfffecdcd │ │ @ instruction: 0xfffeeb91 │ │ @ instruction: 0xfffed835 │ │ @ instruction: 0xfffe7ebb │ │ @ instruction: 0xfffeccaf │ │ @ instruction: 0xfffecd8b │ │ @ instruction: 0xfffeeb4f │ │ @@ -12935,57 +12935,57 @@ │ │ @ instruction: 0xf9a4f00e │ │ @ instruction: 0xf4762800 │ │ @ instruction: 0xf7fdae64 │ │ ldmdbmi r0!, {r0, r1, r3, r5, r6, r8, sl, fp, ip, sp, pc} │ │ rsb r4, r3, r9, ror r4 │ │ ldrbtmi r4, [r9], #-2351 @ 0xfffff6d1 │ │ svclt 0x0000e060 │ │ - @ instruction: 0xfffe5dd5 │ │ + @ instruction: 0xfffe5dcc │ │ @ instruction: 0xfffecc87 │ │ @ instruction: 0xfffeea4b │ │ @ instruction: 0xfffed6ef │ │ - @ instruction: 0xfffe5d99 │ │ + @ instruction: 0xfffe5d90 │ │ @ instruction: 0xfffecc4b │ │ @ instruction: 0xfffeea0f │ │ @ instruction: 0xfffed6b3 │ │ - @ instruction: 0xfffe5d55 │ │ + @ instruction: 0xfffe5d4c │ │ @ instruction: 0xfffecc07 │ │ @ instruction: 0xfffee9cb │ │ @ instruction: 0xfffed66f │ │ - @ instruction: 0xfffe5d11 │ │ + @ instruction: 0xfffe5d08 │ │ @ instruction: 0xfffeb44e │ │ @ instruction: 0xfffecba1 │ │ @ instruction: 0xfffee965 │ │ @ instruction: 0xfffed609 │ │ - @ instruction: 0xfffe5cb3 │ │ + @ instruction: 0xfffe5caa │ │ @ instruction: 0xfffecb65 │ │ @ instruction: 0xfffee929 │ │ @ instruction: 0xfffed5cd │ │ - @ instruction: 0xfffe5c77 │ │ + @ instruction: 0xfffe5c6e │ │ @ instruction: 0xfffecb29 │ │ @ instruction: 0xfffee8ed │ │ @ instruction: 0xfffed591 │ │ - @ instruction: 0xfffe5c3b │ │ + @ instruction: 0xfffe5c32 │ │ @ instruction: 0xfffea6ca │ │ @ instruction: 0xfffea6b8 │ │ @ instruction: 0xfffecac1 │ │ @ instruction: 0xfffee885 │ │ @ instruction: 0xfffed529 │ │ - @ instruction: 0xfffe5bd3 │ │ + @ instruction: 0xfffe5bca │ │ @ instruction: 0xfffeca85 │ │ @ instruction: 0xfffee849 │ │ @ instruction: 0xfffed4ed │ │ - @ instruction: 0xfffe5b97 │ │ + @ instruction: 0xfffe5b8e │ │ @ instruction: 0xfffeca45 │ │ @ instruction: 0xfffec947 │ │ @ instruction: 0xfffee7e9 │ │ @ instruction: 0xfffec921 │ │ @ instruction: 0xfffed46d │ │ @ instruction: 0xfffec8fb │ │ - @ instruction: 0xfffe5b03 │ │ + @ instruction: 0xfffe5afa │ │ @ instruction: 0xfffec8bb │ │ @ instruction: 0xfffeb22a │ │ @ instruction: 0xfffec981 │ │ @ instruction: 0xfffee745 │ │ ldrbtmi r4, [r9], #-2502 @ 0xfffff63a │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @ instruction: 0xf934f00e │ │ @@ -13182,51 +13182,51 @@ │ │ stmdacc r1, {r4, r5, r7, r8, r9, fp, sp, lr} │ │ vadd.i8 d2, d1, d3 │ │ ldm pc, {r1, r3, r5, r6, r7, pc}^ @ │ │ subseq pc, r7, r0, lsl r0 @ │ │ ldmeq ip, {r0, r3, r4, r6, r7, fp}^ │ │ svclt 0x000008df │ │ @ instruction: 0xfffed32b │ │ - @ instruction: 0xfffe59d5 │ │ + @ instruction: 0xfffe59cc │ │ @ instruction: 0xfffec887 │ │ @ instruction: 0xfffee64b │ │ @ instruction: 0xfffed2ef │ │ - @ instruction: 0xfffe5999 │ │ + @ instruction: 0xfffe5990 │ │ @ instruction: 0xfffec84b │ │ @ instruction: 0xfffee60f │ │ @ instruction: 0xfffed2b3 │ │ - @ instruction: 0xfffe595d │ │ + @ instruction: 0xfffe5954 │ │ @ instruction: 0xfffec80f │ │ @ instruction: 0xfffee5d3 │ │ @ instruction: 0xfffed277 │ │ - @ instruction: 0xfffe5919 │ │ + @ instruction: 0xfffe5910 │ │ @ instruction: 0xfffec7cb │ │ @ instruction: 0xfffee58f │ │ @ instruction: 0xfffed233 │ │ - @ instruction: 0xfffe58d5 │ │ + @ instruction: 0xfffe58cc │ │ @ instruction: 0xfffec787 │ │ @ instruction: 0xfffee54b │ │ @ instruction: 0xfffed1ef │ │ - @ instruction: 0xfffe5891 │ │ + @ instruction: 0xfffe5888 │ │ @ instruction: 0xfffec743 │ │ @ instruction: 0xfffee507 │ │ @ instruction: 0xfffed1ab │ │ - @ instruction: 0xfffe584d │ │ + @ instruction: 0xfffe5844 │ │ @ instruction: 0xfffe1480 │ │ @ instruction: 0xfffe77b2 │ │ - @ instruction: 0xfffdf491 │ │ - @ instruction: 0xfffe57af │ │ + @ instruction: 0xfffdf485 │ │ + @ instruction: 0xfffe57a6 │ │ @ instruction: 0xfffec661 │ │ @ instruction: 0xfffee425 │ │ @ instruction: 0xfffed0c9 │ │ - @ instruction: 0xfffe5767 │ │ + @ instruction: 0xfffe575e │ │ @ instruction: 0xfffec619 │ │ @ instruction: 0xfffee3dd │ │ @ instruction: 0xfffed081 │ │ - @ instruction: 0xfffe571f │ │ + @ instruction: 0xfffe5716 │ │ @ instruction: 0xfffec5d1 │ │ @ instruction: 0xfffee395 │ │ @ instruction: 0xfffed039 │ │ ldrbtmi r4, [r9], #-2495 @ 0xfffff641 │ │ stmlt r6, {r0, ip, sp, lr, pc} │ │ ldrbtmi r4, [r9], #-2494 @ 0xfffff642 │ │ ldmibmi lr!, {r2, sp, lr, pc} │ │ @@ -13414,60 +13414,60 @@ │ │ vadd.i8 d2, d6, d3 │ │ ldm pc, {r1, r2, pc}^ @ │ │ andeq pc, r4, r0, lsl r0 @ │ │ ldclcc 12, cr3, [r1], {205} @ 0xcd │ │ stmdbmi pc!, {r0, r2, r4, r6, r7, sl, fp, ip, sp} @ │ │ @ instruction: 0xf0054479 │ │ svclt 0x0000bff5 │ │ - @ instruction: 0xfffe563d │ │ + @ instruction: 0xfffe5634 │ │ @ instruction: 0xfffec4ef │ │ @ instruction: 0xfffee2b3 │ │ @ instruction: 0xfffecf57 │ │ - @ instruction: 0xfffe5601 │ │ + @ instruction: 0xfffe55f8 │ │ @ instruction: 0xfffec4b3 │ │ @ instruction: 0xfffee277 │ │ @ instruction: 0xfffecf1b │ │ - @ instruction: 0xfffe55c5 │ │ + @ instruction: 0xfffe55bc │ │ @ instruction: 0xfffec477 │ │ @ instruction: 0xfffee23b │ │ @ instruction: 0xfffecedf │ │ - @ instruction: 0xfffe5589 │ │ + @ instruction: 0xfffe5580 │ │ @ instruction: 0xfffec43b │ │ @ instruction: 0xfffee1ff │ │ @ instruction: 0xfffecea3 │ │ - @ instruction: 0xfffe554d │ │ + @ instruction: 0xfffe5544 │ │ @ instruction: 0xfffec3ff │ │ @ instruction: 0xfffee1c3 │ │ @ instruction: 0xfffece67 │ │ - @ instruction: 0xfffe5511 │ │ + @ instruction: 0xfffe5508 │ │ @ instruction: 0xfffec3c3 │ │ @ instruction: 0xfffee185 │ │ @ instruction: 0xfffece27 │ │ @ instruction: 0xfffec3ab │ │ @ instruction: 0xfffee16f │ │ @ instruction: 0xfffece13 │ │ - @ instruction: 0xfffe54b1 │ │ + @ instruction: 0xfffe54a8 │ │ @ instruction: 0xfffec363 │ │ @ instruction: 0xfffee127 │ │ @ instruction: 0xfffecdcb │ │ - @ instruction: 0xfffe5475 │ │ + @ instruction: 0xfffe546c │ │ @ instruction: 0xfffeabba │ │ @ instruction: 0xfffec311 │ │ @ instruction: 0xfffee0d3 │ │ @ instruction: 0xfffecd75 │ │ @ instruction: 0xfffec2f9 │ │ @ instruction: 0xfffee0bd │ │ @ instruction: 0xfffecd61 │ │ - @ instruction: 0xfffe540b │ │ - @ instruction: 0xfffe5403 │ │ - @ instruction: 0xfffe601e │ │ + @ instruction: 0xfffe5402 │ │ + @ instruction: 0xfffe53fa │ │ + @ instruction: 0xfffe6015 │ │ @ instruction: 0xfffe101a │ │ @ instruction: 0xfffe734c │ │ - @ instruction: 0xfffdf02b │ │ - @ instruction: 0xfffe5347 │ │ + @ instruction: 0xfffdf01f │ │ + @ instruction: 0xfffe533e │ │ ldrbtmi r4, [r9], #-2515 @ 0xfffff62d │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ ldc2l 0, cr15, [r8, #-52]! @ 0xffffffcc │ │ @ instruction: 0xf4772800 │ │ ldmibmi r0, {r1, r3, r4, r6, r9, fp, sp, pc}^ │ │ andcs r4, lr, #40, 12 @ 0x2800000 │ │ @ instruction: 0xf00d4479 │ │ @@ -13672,24 +13672,24 @@ │ │ smuadeq r1, r0, r0 │ │ streq r0, [r7, -r4, lsl #14] │ │ ldmdbmi r5!, {r1, r3, r8, r9, sl} │ │ @ instruction: 0xf0004479 │ │ ldmdbmi r4!, {r0, r4, r6, r9, sl, fp, ip, sp, pc} │ │ @ instruction: 0xf0004479 │ │ svclt 0x0000be4d │ │ - @ instruction: 0xfffe5285 │ │ - @ instruction: 0xfffe5ea0 │ │ + @ instruction: 0xfffe527c │ │ + @ instruction: 0xfffe5e97 │ │ @ instruction: 0xfffe0e9c │ │ @ instruction: 0xfffe71ce │ │ - @ instruction: 0xfffdeead │ │ - @ instruction: 0xfffe51c9 │ │ + @ instruction: 0xfffdeea1 │ │ + @ instruction: 0xfffe51c0 │ │ @ instruction: 0xfffec07b │ │ @ instruction: 0xfffede3f │ │ @ instruction: 0xfffecae3 │ │ - @ instruction: 0xfffe518d │ │ + @ instruction: 0xfffe5184 │ │ @ instruction: 0xfffec03f │ │ @ instruction: 0xfffede01 │ │ @ instruction: 0xfffecaa3 │ │ @ instruction: 0xfffec027 │ │ @ instruction: 0xfffeddeb │ │ @ instruction: 0xfffeca8f │ │ @ instruction: 0xfffe7111 │ │ @@ -13698,34 +13698,34 @@ │ │ @ instruction: 0xfffedd97 │ │ @ instruction: 0xfffeca3b │ │ @ instruction: 0xfffe70bd │ │ @ instruction: 0xfffea82e │ │ @ instruction: 0xfffebf7f │ │ @ instruction: 0xfffedd43 │ │ @ instruction: 0xfffec9e7 │ │ - @ instruction: 0xfffe5091 │ │ + @ instruction: 0xfffe5088 │ │ @ instruction: 0xfffebf43 │ │ @ instruction: 0xfffedd07 │ │ @ instruction: 0xfffec9ab │ │ - @ instruction: 0xfffe5055 │ │ + @ instruction: 0xfffe504c │ │ @ instruction: 0xfffebf09 │ │ @ instruction: 0xfffedccd │ │ @ instruction: 0xfffec971 │ │ - @ instruction: 0xfffe501b │ │ + @ instruction: 0xfffe5012 │ │ @ instruction: 0xfffebecd │ │ @ instruction: 0xfffedc8f │ │ @ instruction: 0xfffec931 │ │ @ instruction: 0xfffebeb5 │ │ @ instruction: 0xfffedc79 │ │ @ instruction: 0xfffec91d │ │ - @ instruction: 0xfffe4fbf │ │ + @ instruction: 0xfffe4fb6 │ │ @ instruction: 0xfffebe71 │ │ @ instruction: 0xfffedc35 │ │ @ instruction: 0xfffec8d9 │ │ - @ instruction: 0xfffe4f83 │ │ + @ instruction: 0xfffe4f7a │ │ @ instruction: 0xfffebe35 │ │ @ instruction: 0xfffedbf9 │ │ @ instruction: 0xfffec89d │ │ @ instruction: 0xfffebe01 │ │ @ instruction: 0xfffedbc3 │ │ ldrbtmi r4, [r9], #-2499 @ 0xfffff63d │ │ stcllt 0, cr15, [r2] │ │ @@ -13923,65 +13923,65 @@ │ │ rsbs r4, r7, r9, ror r4 │ │ ldrbtmi r4, [r9], #-2361 @ 0xfffff6c7 │ │ svclt 0x0000e074 │ │ @ instruction: 0xfffec797 │ │ @ instruction: 0xfffebd1b │ │ @ instruction: 0xfffedadf │ │ @ instruction: 0xfffec783 │ │ - @ instruction: 0xfffe4e29 │ │ + @ instruction: 0xfffe4e20 │ │ @ instruction: 0xfffebcd1 │ │ @ instruction: 0xfffeda95 │ │ @ instruction: 0xfffec739 │ │ - @ instruction: 0xfffe4dd7 │ │ + @ instruction: 0xfffe4dce │ │ @ instruction: 0xfffebc89 │ │ @ instruction: 0xfffeda4d │ │ @ instruction: 0xfffec6f1 │ │ - @ instruction: 0xfffe4d9b │ │ + @ instruction: 0xfffe4d92 │ │ @ instruction: 0xfffebc4d │ │ @ instruction: 0xfffeda11 │ │ @ instruction: 0xfffec6b5 │ │ @ instruction: 0xfffebc19 │ │ @ instruction: 0xfffed9dd │ │ @ instruction: 0xfffec681 │ │ - @ instruction: 0xfffe4d2b │ │ + @ instruction: 0xfffe4d22 │ │ @ instruction: 0xfffebbdd │ │ @ instruction: 0xfffed9a1 │ │ @ instruction: 0xfffec645 │ │ - @ instruction: 0xfffe4cef │ │ + @ instruction: 0xfffe4ce6 │ │ @ instruction: 0xfffebba1 │ │ @ instruction: 0xfffed963 │ │ @ instruction: 0xfffec605 │ │ @ instruction: 0xfffebb89 │ │ @ instruction: 0xfffed94d │ │ @ instruction: 0xfffec5f1 │ │ - @ instruction: 0xfffe4c9b │ │ + @ instruction: 0xfffe4c92 │ │ @ instruction: 0xfffebb4d │ │ @ instruction: 0xfffed90f │ │ @ instruction: 0xfffec5b1 │ │ @ instruction: 0xfffebb35 │ │ @ instruction: 0xfffed8f7 │ │ @ instruction: 0xfffec599 │ │ @ instruction: 0xfffebb1d │ │ @ instruction: 0xfffed8df │ │ @ instruction: 0xfffec581 │ │ @ instruction: 0xfffebb05 │ │ @ instruction: 0xfffed8c9 │ │ @ instruction: 0xfffec56d │ │ - @ instruction: 0xfffe4c0b │ │ + @ instruction: 0xfffe4c02 │ │ @ instruction: 0xfffebabd │ │ @ instruction: 0xfffed881 │ │ @ instruction: 0xfffec525 │ │ - @ instruction: 0xfffe4bc3 │ │ + @ instruction: 0xfffe4bba │ │ @ instruction: 0xfffeba75 │ │ @ instruction: 0xfffed837 │ │ @ instruction: 0xfffec4d9 │ │ @ instruction: 0xfffeba5d │ │ @ instruction: 0xfffed821 │ │ @ instruction: 0xfffec4c5 │ │ - @ instruction: 0xfffe4b6f │ │ + @ instruction: 0xfffe4b66 │ │ @ instruction: 0xfffeba21 │ │ @ instruction: 0xfffed7e5 │ │ ldrbtmi r4, [r9], #-2506 @ 0xfffff636 │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @ instruction: 0xf970f00d │ │ @ instruction: 0xf4762800 │ │ bvs c65958 │ │ @@ -14180,65 +14180,65 @@ │ │ bleq febbe394 │ │ ldrbtmi r4, [r9], #-2359 @ 0xfffff6c9 │ │ ldmdblt r0!, {r1, ip, sp, lr, pc}^ │ │ ldrbtmi r4, [r9], #-2358 @ 0xfffff6ca │ │ ldmdbmi r6!, {r4, r5, r6, sp, lr, pc} │ │ rsb r4, sp, r9, ror r4 │ │ @ instruction: 0xfffec3a3 │ │ - @ instruction: 0xfffe4a4d │ │ + @ instruction: 0xfffe4a44 │ │ @ instruction: 0xfffeb8ff │ │ @ instruction: 0xfffed6c1 │ │ @ instruction: 0xfffec363 │ │ @ instruction: 0xfffeb8e7 │ │ @ instruction: 0xfffed6ab │ │ @ instruction: 0xfffec34f │ │ @ instruction: 0xfffeb8c5 │ │ @ instruction: 0xfffed687 │ │ @ instruction: 0xfffec329 │ │ @ instruction: 0xfffeb8ad │ │ @ instruction: 0xfffed671 │ │ @ instruction: 0xfffec315 │ │ - @ instruction: 0xfffe49b7 │ │ + @ instruction: 0xfffe49ae │ │ @ instruction: 0xfffeb869 │ │ @ instruction: 0xfffed62d │ │ @ instruction: 0xfffec2d1 │ │ - @ instruction: 0xfffe4973 │ │ + @ instruction: 0xfffe496a │ │ @ instruction: 0xfffeb825 │ │ @ instruction: 0xfffed5e9 │ │ @ instruction: 0xfffec28d │ │ - @ instruction: 0xfffe4937 │ │ + @ instruction: 0xfffe492e │ │ @ instruction: 0xfffeb7e9 │ │ @ instruction: 0xfffed5ad │ │ @ instruction: 0xfffec251 │ │ - @ instruction: 0xfffe48fb │ │ + @ instruction: 0xfffe48f2 │ │ @ instruction: 0xfffeb7ad │ │ @ instruction: 0xfffed571 │ │ @ instruction: 0xfffec215 │ │ - @ instruction: 0xfffe48bf │ │ + @ instruction: 0xfffe48b6 │ │ @ instruction: 0xfffeb771 │ │ @ instruction: 0xfffed535 │ │ @ instruction: 0xfffec1d9 │ │ - @ instruction: 0xfffe4883 │ │ + @ instruction: 0xfffe487a │ │ @ instruction: 0xfffeb731 │ │ @ instruction: 0xfffeb62f │ │ @ instruction: 0xfffed4d1 │ │ @ instruction: 0xfffeb605 │ │ @ instruction: 0xfffec151 │ │ @ instruction: 0xfffeb5db │ │ @ instruction: 0xfffeb6b7 │ │ @ instruction: 0xfffed47b │ │ @ instruction: 0xfffec11f │ │ - @ instruction: 0xfffe47bd │ │ + @ instruction: 0xfffe47b4 │ │ @ instruction: 0xfffeb66f │ │ @ instruction: 0xfffed431 │ │ @ instruction: 0xfffec0d3 │ │ @ instruction: 0xfffeb657 │ │ @ instruction: 0xfffed41b │ │ @ instruction: 0xfffec0bf │ │ - @ instruction: 0xfffe475d │ │ + @ instruction: 0xfffe4754 │ │ @ instruction: 0xfffeb60f │ │ @ instruction: 0xfffed3d3 │ │ ldrbtmi r4, [r9], #-2502 @ 0xfffff63a │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @ instruction: 0xff6ef00c │ │ @ instruction: 0xf4762800 │ │ bvs c66120 │ │ @@ -14433,53 +14433,53 @@ │ │ stmdbmi pc!, {r0, r4, sl, fp, ip, sp, pc} @ │ │ @ instruction: 0xf7fd4479 │ │ stmdbmi lr!, {r0, r2, r3, sl, fp, ip, sp, pc} │ │ subs r4, pc, r9, ror r4 @ │ │ ldrbtmi r4, [r9], #-2349 @ 0xfffff6d3 │ │ svclt 0x0000e05c │ │ @ instruction: 0xfffebf9f │ │ - @ instruction: 0xfffe463d │ │ + @ instruction: 0xfffe4634 │ │ @ instruction: 0xfffeb4ef │ │ @ instruction: 0xfffed2b3 │ │ @ instruction: 0xfffebf57 │ │ - @ instruction: 0xfffe45f5 │ │ + @ instruction: 0xfffe45ec │ │ @ instruction: 0xfffeb4a7 │ │ @ instruction: 0xfffed26b │ │ @ instruction: 0xfffebf0f │ │ - @ instruction: 0xfffe45b1 │ │ + @ instruction: 0xfffe45a8 │ │ @ instruction: 0xfffeb463 │ │ @ instruction: 0xfffed227 │ │ @ instruction: 0xfffebecb │ │ - @ instruction: 0xfffe4575 │ │ - @ instruction: 0xfffe455b │ │ - @ instruction: 0xfffe4541 │ │ + @ instruction: 0xfffe456c │ │ + @ instruction: 0xfffe4552 │ │ + @ instruction: 0xfffe4538 │ │ @ instruction: 0xfffeb3f3 │ │ @ instruction: 0xfffed1b7 │ │ @ instruction: 0xfffebe5b │ │ - @ instruction: 0xfffe4505 │ │ + @ instruction: 0xfffe44fc │ │ @ instruction: 0xfffeb3b7 │ │ @ instruction: 0xfffed17b │ │ @ instruction: 0xfffebe1f │ │ - @ instruction: 0xfffe44c9 │ │ + @ instruction: 0xfffe44c0 │ │ @ instruction: 0xfffeb37b │ │ @ instruction: 0xfffed13f │ │ @ instruction: 0xfffebde3 │ │ - @ instruction: 0xfffe448d │ │ + @ instruction: 0xfffe4484 │ │ @ instruction: 0xfffeb33f │ │ @ instruction: 0xfffed103 │ │ @ instruction: 0xfffebda7 │ │ - @ instruction: 0xfffe4451 │ │ + @ instruction: 0xfffe4448 │ │ @ instruction: 0xfffeb303 │ │ @ instruction: 0xfffed0b9 │ │ @ instruction: 0xfffebd5d │ │ - @ instruction: 0xfffdca71 │ │ + @ instruction: 0xfffdca65 │ │ @ instruction: 0xfffe0046 │ │ @ instruction: 0xfffe6378 │ │ - @ instruction: 0xfffde057 │ │ - @ instruction: 0xfffe4383 │ │ + @ instruction: 0xfffde04b │ │ + @ instruction: 0xfffe437a │ │ @ instruction: 0xfffeb235 │ │ @ instruction: 0xfffecff7 │ │ @ instruction: 0xfffebc99 │ │ @ instruction: 0xfffeb21d │ │ @ instruction: 0xfffecfe1 │ │ ldrbtmi r4, [r9], #-2509 @ 0xfffff633 │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @@ -14687,52 +14687,52 @@ │ │ rsb r4, r3, r9, ror r4 │ │ ldrbtmi r4, [r9], #-2351 @ 0xfffff6d1 │ │ svclt 0x0000e060 │ │ @ instruction: 0xfffebbcf │ │ @ instruction: 0xfffea452 │ │ @ instruction: 0xfffdfeaa │ │ @ instruction: 0xfffe61dc │ │ - @ instruction: 0xfffddebb │ │ - @ instruction: 0xfffe41cf │ │ + @ instruction: 0xfffddeaf │ │ + @ instruction: 0xfffe41c6 │ │ @ instruction: 0xfffe9914 │ │ @ instruction: 0xfffeb06d │ │ @ instruction: 0xfffece31 │ │ @ instruction: 0xfffebad5 │ │ - @ instruction: 0xfffe417f │ │ + @ instruction: 0xfffe4176 │ │ @ instruction: 0xfffeb031 │ │ @ instruction: 0xfffecdf5 │ │ @ instruction: 0xfffeba99 │ │ - @ instruction: 0xfffe414d │ │ + @ instruction: 0xfffe4144 │ │ @ instruction: 0xfffeb001 │ │ @ instruction: 0xfffecdc5 │ │ @ instruction: 0xfffeba69 │ │ @ instruction: 0xfffe08ef │ │ @ instruction: 0xfffeaee7 │ │ @ instruction: 0xfffe9852 │ │ @ instruction: 0xfffe8b86 │ │ @ instruction: 0xfffe089d │ │ @ instruction: 0xfffe8b64 │ │ @ instruction: 0xfffeaf6d │ │ @ instruction: 0xfffecd31 │ │ @ instruction: 0xfffeb9d5 │ │ - @ instruction: 0xfffe407f │ │ + @ instruction: 0xfffe4076 │ │ @ instruction: 0xfffeaf31 │ │ @ instruction: 0xfffeccf5 │ │ @ instruction: 0xfffeb999 │ │ - @ instruction: 0xfffe4043 │ │ + @ instruction: 0xfffe403a │ │ @ instruction: 0xfffe8ad6 │ │ @ instruction: 0xfffe8ac0 │ │ @ instruction: 0xfffeaec9 │ │ @ instruction: 0xfffecc8d │ │ @ instruction: 0xfffeb931 │ │ - @ instruction: 0xfffe3fd3 │ │ + @ instruction: 0xfffe3fca │ │ @ instruction: 0xfffeae85 │ │ @ instruction: 0xfffecc49 │ │ @ instruction: 0xfffeb8ed │ │ - @ instruction: 0xfffe3f97 │ │ + @ instruction: 0xfffe3f8e │ │ @ instruction: 0xfffeae49 │ │ @ instruction: 0xfffecc0b │ │ @ instruction: 0xfffeb8ad │ │ @ instruction: 0xfffeae31 │ │ @ instruction: 0xfffecbf5 │ │ ldrbtmi r4, [r9], #-2515 @ 0xfffff62d │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @@ -14943,19 +14943,19 @@ │ │ stmdacc r1, {r4, r5, r6, r7, sl, fp, sp, lr} │ │ vadd.i8 d2, d1, d3 │ │ ldm pc, {r0, r3, r5, r7, r8, pc}^ @ │ │ rsbeq pc, r9, r0, lsl r0 @ │ │ stmibeq r1, {r1, r2, r3, r5, r6, r8, fp} │ │ svclt 0x00000994 │ │ @ instruction: 0xfffeb7db │ │ - @ instruction: 0xfffe3e79 │ │ + @ instruction: 0xfffe3e70 │ │ @ instruction: 0xfffead2b │ │ @ instruction: 0xfffecaef │ │ @ instruction: 0xfffeb793 │ │ - @ instruction: 0xfffe3e3d │ │ + @ instruction: 0xfffe3e34 │ │ @ instruction: 0xfffeacef │ │ @ instruction: 0xfffecab1 │ │ @ instruction: 0xfffeb753 │ │ @ instruction: 0xfffeacd7 │ │ @ instruction: 0xfffeca99 │ │ @ instruction: 0xfffeb73b │ │ @ instruction: 0xfffeacbf │ │ @@ -14963,42 +14963,42 @@ │ │ @ instruction: 0xfffeb723 │ │ @ instruction: 0xfffeaca7 │ │ @ instruction: 0xfffeca69 │ │ @ instruction: 0xfffeb70b │ │ @ instruction: 0xfffeac8f │ │ @ instruction: 0xfffeca53 │ │ @ instruction: 0xfffeb6f7 │ │ - @ instruction: 0xfffe3d99 │ │ + @ instruction: 0xfffe3d90 │ │ @ instruction: 0xfffeac4b │ │ @ instruction: 0xfffeca0f │ │ @ instruction: 0xfffeb6b3 │ │ - @ instruction: 0xfffe3d55 │ │ + @ instruction: 0xfffe3d4c │ │ @ instruction: 0xfffe949a │ │ @ instruction: 0xfffeabf1 │ │ @ instruction: 0xfffec9b5 │ │ @ instruction: 0xfffeb659 │ │ - @ instruction: 0xfffe3d03 │ │ + @ instruction: 0xfffe3cfa │ │ @ instruction: 0xfffeabb5 │ │ @ instruction: 0xfffec977 │ │ @ instruction: 0xfffeb619 │ │ @ instruction: 0xfffeab9d │ │ @ instruction: 0xfffec961 │ │ @ instruction: 0xfffeb605 │ │ - @ instruction: 0xfffe3cc8 │ │ + @ instruction: 0xfffe3cbf │ │ @ instruction: 0xfffeaa7d │ │ @ instruction: 0xfffeaa47 │ │ @ instruction: 0xfffeaa1f │ │ @ instruction: 0xfffe938e │ │ @ instruction: 0xfffea9f7 │ │ @ instruction: 0xfffdf87a │ │ @ instruction: 0xfffea9cd │ │ @ instruction: 0xfffea9a7 │ │ @ instruction: 0xfffe5b84 │ │ @ instruction: 0xfffea981 │ │ - @ instruction: 0xfffdd847 │ │ + @ instruction: 0xfffdd83b │ │ @ instruction: 0xfffea953 │ │ strtmi r4, [r8], -r7, asr #19 │ │ ldrbtmi r2, [r9], #-513 @ 0xfffffdff │ │ @ instruction: 0xf980f00c │ │ @ instruction: 0xf0012800 │ │ stmdavs r0!, {r0, r2, r4, r5, r8, pc} │ │ eorvs r2, r9, r9, lsl #2 │ │ @@ -15192,62 +15192,62 @@ │ │ bge 1579690 │ │ stmdacc r1, {r4, r5, r8, r9, fp, sp, lr} │ │ vadd.i8 d2, d2, d3 │ │ ldm pc, {r4, r6, r7, r8, pc}^ @ │ │ rsbeq pc, fp, r0, lsl r0 @ │ │ ldrbeq r0, [r7, #-1395]! @ 0xfffffa8d │ │ svclt 0x0000057b │ │ - @ instruction: 0xfffe3a91 │ │ + @ instruction: 0xfffe3a88 │ │ @ instruction: 0xfffea849 │ │ @ instruction: 0xfffea925 │ │ @ instruction: 0xfffec6e7 │ │ @ instruction: 0xfffeb389 │ │ @ instruction: 0xfffea90d │ │ @ instruction: 0xfffec6d1 │ │ @ instruction: 0xfffeb375 │ │ - @ instruction: 0xfffe3a17 │ │ + @ instruction: 0xfffe3a0e │ │ @ instruction: 0xfffea8c9 │ │ @ instruction: 0xfffec68d │ │ @ instruction: 0xfffeb331 │ │ - @ instruction: 0xfffe39d3 │ │ + @ instruction: 0xfffe39ca │ │ @ instruction: 0xfffea885 │ │ @ instruction: 0xfffec649 │ │ @ instruction: 0xfffeb2ed │ │ - @ instruction: 0xfffe398f │ │ + @ instruction: 0xfffe3986 │ │ @ instruction: 0xfffea841 │ │ @ instruction: 0xfffec605 │ │ @ instruction: 0xfffeb2a9 │ │ - @ instruction: 0xfffe394b │ │ + @ instruction: 0xfffe3942 │ │ @ instruction: 0xfffea7fd │ │ @ instruction: 0xfffec5c1 │ │ @ instruction: 0xfffeb265 │ │ - @ instruction: 0xfffe390f │ │ + @ instruction: 0xfffe3906 │ │ @ instruction: 0xfffea7c1 │ │ @ instruction: 0xfffec585 │ │ @ instruction: 0xfffeb229 │ │ - @ instruction: 0xfffe38c7 │ │ + @ instruction: 0xfffe38be │ │ @ instruction: 0xfffea779 │ │ @ instruction: 0xfffec53d │ │ @ instruction: 0xfffeb1e1 │ │ - @ instruction: 0xfffe387f │ │ + @ instruction: 0xfffe3876 │ │ @ instruction: 0xfffea731 │ │ @ instruction: 0xfffec4f3 │ │ @ instruction: 0xfffeb195 │ │ @ instruction: 0xfffea719 │ │ @ instruction: 0xfffec4dd │ │ @ instruction: 0xfffeb181 │ │ - @ instruction: 0xfffe382b │ │ + @ instruction: 0xfffe3822 │ │ @ instruction: 0xfffea6dd │ │ @ instruction: 0xfffec4a1 │ │ @ instruction: 0xfffeb145 │ │ - @ instruction: 0xfffe37ef │ │ + @ instruction: 0xfffe37e6 │ │ @ instruction: 0xfffea6a1 │ │ @ instruction: 0xfffec465 │ │ @ instruction: 0xfffeb109 │ │ - @ instruction: 0xfffe37b3 │ │ + @ instruction: 0xfffe37aa │ │ @ instruction: 0xfffea665 │ │ @ instruction: 0xfffec429 │ │ @ instruction: 0xfffeb0cd │ │ ldrbtmi r4, [r9], #-2521 @ 0xfffff627 │ │ ldmdblt r8, {r1, ip, sp, lr, pc}^ │ │ ldrbtmi r4, [r9], #-2520 @ 0xfffff628 │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @@ -15461,36 +15461,36 @@ │ │ bleq b3c900 │ │ bleq cbf5b0 │ │ ldrbtmi r4, [r9], #-2370 @ 0xfffff6be │ │ cdplt 0, 10, cr15, cr5, cr1, {0} │ │ ldrbtmi r4, [r9], #-2369 @ 0xfffff6bf │ │ stmdbmi r1, {r1, r2, r7, sp, lr, pc}^ │ │ add r4, r3, r9, ror r4 │ │ - @ instruction: 0xfffe36a9 │ │ - @ instruction: 0xfffe36a1 │ │ + @ instruction: 0xfffe36a0 │ │ + @ instruction: 0xfffe3698 │ │ @ instruction: 0xfffe9860 │ │ @ instruction: 0xfffdf2b8 │ │ @ instruction: 0xfffe55ea │ │ - @ instruction: 0xfffdd2c9 │ │ - @ instruction: 0xfffe35e5 │ │ + @ instruction: 0xfffdd2bd │ │ + @ instruction: 0xfffe35dc │ │ @ instruction: 0xfffea497 │ │ @ instruction: 0xfffec25b │ │ @ instruction: 0xfffeaeff │ │ - @ instruction: 0xfffe35a9 │ │ + @ instruction: 0xfffe35a0 │ │ @ instruction: 0xfffea45b │ │ @ instruction: 0xfffec21d │ │ @ instruction: 0xfffeaebf │ │ @ instruction: 0xfffea443 │ │ @ instruction: 0xfffec207 │ │ @ instruction: 0xfffeaeab │ │ - @ instruction: 0xfffe3549 │ │ + @ instruction: 0xfffe3540 │ │ @ instruction: 0xfffea3fb │ │ @ instruction: 0xfffec1bf │ │ @ instruction: 0xfffeae63 │ │ - @ instruction: 0xfffe350d │ │ + @ instruction: 0xfffe3504 │ │ @ instruction: 0xfffea3bf │ │ @ instruction: 0xfffec183 │ │ @ instruction: 0xfffeae27 │ │ @ instruction: 0xfffea3ad │ │ @ instruction: 0xfffec16f │ │ @ instruction: 0xfffeae11 │ │ @ instruction: 0xfffea395 │ │ @@ -15498,15 +15498,15 @@ │ │ @ instruction: 0xfffeadf9 │ │ @ instruction: 0xfffea37d │ │ @ instruction: 0xfffec13f │ │ @ instruction: 0xfffeade1 │ │ @ instruction: 0xfffea365 │ │ @ instruction: 0xfffec129 │ │ @ instruction: 0xfffeadcd │ │ - @ instruction: 0xfffe346f │ │ + @ instruction: 0xfffe3466 │ │ @ instruction: 0xfffea321 │ │ @ instruction: 0xfffec0e5 │ │ @ instruction: 0xfffead89 │ │ @ instruction: 0xfffdfc0b │ │ @ instruction: 0xfffe8b80 │ │ @ instruction: 0xfffe7eba │ │ @ instruction: 0xfffea2d1 │ │ @@ -15523,15 +15523,15 @@ │ │ @ instruction: 0xfffeace3 │ │ @ instruction: 0xfffea267 │ │ @ instruction: 0xfffec029 │ │ @ instruction: 0xfffeaccb │ │ @ instruction: 0xfffea24f │ │ @ instruction: 0xfffec013 │ │ @ instruction: 0xfffeacb7 │ │ - @ instruction: 0xfffe3355 │ │ + @ instruction: 0xfffe334c │ │ @ instruction: 0xfffea207 │ │ @ instruction: 0xfffebfcb │ │ ldrbtmi r4, [r9], #-2501 @ 0xfffff63b │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ ldc2l 0, cr15, [r4, #-44] @ 0xffffffd4 │ │ @ instruction: 0xf4742800 │ │ bvs c688ac │ │ @@ -15725,34 +15725,34 @@ │ │ @ instruction: 0xf4742800 │ │ @ instruction: 0xf7fbaf39 │ │ ldmdbmi r4!, {r0, r4, r5, r6, r8, r9, fp, ip, sp, pc} │ │ rsb r4, fp, r9, ror r4 │ │ ldrbtmi r4, [r9], #-2355 @ 0xfffff6cd │ │ svclt 0x0000e068 │ │ @ instruction: 0xfffeab6b │ │ - @ instruction: 0xfffe3209 │ │ + @ instruction: 0xfffe3200 │ │ @ instruction: 0xfffea0bb │ │ @ instruction: 0xfffebe7f │ │ @ instruction: 0xfffeab23 │ │ - @ instruction: 0xfffe31cd │ │ + @ instruction: 0xfffe31c4 │ │ @ instruction: 0xfffea07f │ │ @ instruction: 0xfffebe43 │ │ @ instruction: 0xfffeaae7 │ │ - @ instruction: 0xfffe3189 │ │ + @ instruction: 0xfffe3180 │ │ @ instruction: 0xfffea03b │ │ @ instruction: 0xfffebdff │ │ @ instruction: 0xfffeaaa3 │ │ - @ instruction: 0xfffe3145 │ │ + @ instruction: 0xfffe313c │ │ @ instruction: 0xfffe9ff7 │ │ - @ instruction: 0xfffdb77f │ │ + @ instruction: 0xfffdb773 │ │ @ instruction: 0xfffded54 │ │ @ instruction: 0xfffe5086 │ │ - @ instruction: 0xfffdcd65 │ │ - @ instruction: 0xfffe3081 │ │ - @ instruction: 0xfffe3067 │ │ + @ instruction: 0xfffdcd59 │ │ + @ instruction: 0xfffe3078 │ │ + @ instruction: 0xfffe305e │ │ @ instruction: 0xfffe9f1b │ │ @ instruction: 0xfffebcdd │ │ @ instruction: 0xfffea97f │ │ @ instruction: 0xfffe9f03 │ │ @ instruction: 0xfffebcc5 │ │ @ instruction: 0xfffea967 │ │ @ instruction: 0xfffe9eeb │ │ @@ -15767,15 +15767,15 @@ │ │ @ instruction: 0xfffe9ea3 │ │ @ instruction: 0xfffebc65 │ │ @ instruction: 0xfffea907 │ │ @ instruction: 0xfffe871e │ │ @ instruction: 0xfffe9e75 │ │ @ instruction: 0xfffebc39 │ │ @ instruction: 0xfffea8dd │ │ - @ instruction: 0xfffe2f7f │ │ + @ instruction: 0xfffe2f76 │ │ @ instruction: 0xfffe9e31 │ │ @ instruction: 0xfffebbf3 │ │ @ instruction: 0xfffea895 │ │ @ instruction: 0xfffe86ac │ │ @ instruction: 0xfffe8696 │ │ @ instruction: 0xfffe9ded │ │ @ instruction: 0xfffebbb1 │ │ @@ -16002,54 +16002,54 @@ │ │ strtmi r4, [r8], -lr, lsr #18 │ │ ldrbtmi r2, [r9], #-513 @ 0xfffffdff │ │ @ instruction: 0xf9aaf00b │ │ @ instruction: 0xf4742800 │ │ @ instruction: 0xf7fdac0d │ │ svclt 0x0000bb7e │ │ @ instruction: 0xfffea787 │ │ - @ instruction: 0xfffe2e4a │ │ + @ instruction: 0xfffe2e41 │ │ @ instruction: 0xfffdea72 │ │ @ instruction: 0xfffe4da4 │ │ - @ instruction: 0xfffdca7b │ │ - @ instruction: 0xfffe2da7 │ │ + @ instruction: 0xfffdca6f │ │ + @ instruction: 0xfffe2d9e │ │ @ instruction: 0xfffe84ec │ │ @ instruction: 0xfffe9c45 │ │ @ instruction: 0xfffeba09 │ │ @ instruction: 0xfffea6ad │ │ - @ instruction: 0xfffdb3c1 │ │ + @ instruction: 0xfffdb3b5 │ │ @ instruction: 0xfffde998 │ │ @ instruction: 0xfffe4cca │ │ - @ instruction: 0xfffdc9a1 │ │ - @ instruction: 0xfffe2ccd │ │ + @ instruction: 0xfffdc995 │ │ + @ instruction: 0xfffe2cc4 │ │ @ instruction: 0xfffe8412 │ │ @ instruction: 0xfffe9b6b │ │ @ instruction: 0xfffeb92d │ │ @ instruction: 0xfffea5cf │ │ @ instruction: 0xfffe9b53 │ │ @ instruction: 0xfffeb915 │ │ @ instruction: 0xfffea5b7 │ │ @ instruction: 0xfffe9b3b │ │ @ instruction: 0xfffeb8fd │ │ @ instruction: 0xfffea59f │ │ @ instruction: 0xfffe9b23 │ │ @ instruction: 0xfffeb8e7 │ │ @ instruction: 0xfffea58b │ │ - @ instruction: 0xfffe2c5f │ │ + @ instruction: 0xfffe2c56 │ │ @ instruction: 0xfffde874 │ │ @ instruction: 0xfffe4ba6 │ │ - @ instruction: 0xfffdc885 │ │ - @ instruction: 0xfffe2bb1 │ │ + @ instruction: 0xfffdc879 │ │ + @ instruction: 0xfffe2ba8 │ │ @ instruction: 0xfffe9a63 │ │ @ instruction: 0xfffeb827 │ │ @ instruction: 0xfffea4cb │ │ @ instruction: 0xfffe160a │ │ @ instruction: 0xfffde7b4 │ │ @ instruction: 0xfffe4ae6 │ │ - @ instruction: 0xfffdc7c5 │ │ - @ instruction: 0xfffe2af1 │ │ + @ instruction: 0xfffdc7b9 │ │ + @ instruction: 0xfffe2ae8 │ │ @ instruction: 0xfffe8236 │ │ @ instruction: 0x462849d1 │ │ ldrbtmi r2, [r9], #-513 @ 0xfffffdff │ │ @ instruction: 0xf94af00b │ │ @ instruction: 0xf4742800 │ │ @ instruction: 0xf7fdae2c │ │ stmibmi sp, {r0, r2, r3, r4, r6, r7, r8, r9, fp, ip, sp, pc}^ │ │ @@ -16266,40 +16266,40 @@ │ │ @ instruction: 0xfffe8110 │ │ @ instruction: 0xfffe9867 │ │ @ instruction: 0xfffeb62b │ │ @ instruction: 0xfffea2cf │ │ @ instruction: 0xfffdd9ef │ │ @ instruction: 0xfffde5ba │ │ @ instruction: 0xfffe48ec │ │ - @ instruction: 0xfffdc5c3 │ │ - @ instruction: 0xfffe28ef │ │ + @ instruction: 0xfffdc5b7 │ │ + @ instruction: 0xfffe28e6 │ │ @ instruction: 0xfffe8034 │ │ @ instruction: 0xfffe978d │ │ @ instruction: 0xfffeb551 │ │ @ instruction: 0xfffea1f5 │ │ - @ instruction: 0xfffe2893 │ │ + @ instruction: 0xfffe288a │ │ @ instruction: 0xfffe9741 │ │ @ instruction: 0xfffe9643 │ │ @ instruction: 0xfffeb4e5 │ │ @ instruction: 0xfffe961d │ │ @ instruction: 0xfffea169 │ │ @ instruction: 0xfffe95f7 │ │ - @ instruction: 0xfffe27f9 │ │ + @ instruction: 0xfffe27f0 │ │ @ instruction: 0xfffe95b1 │ │ @ instruction: 0xfffe968d │ │ @ instruction: 0xfffeb451 │ │ @ instruction: 0xfffea0f5 │ │ - @ instruction: 0xfffe2797 │ │ + @ instruction: 0xfffe278e │ │ @ instruction: 0xfffe9649 │ │ @ instruction: 0xfffeb40d │ │ @ instruction: 0xfffea0b1 │ │ - @ instruction: 0xfffe2753 │ │ - @ instruction: 0xfffe2731 │ │ + @ instruction: 0xfffe274a │ │ + @ instruction: 0xfffe2728 │ │ @ instruction: 0xfffe94e9 │ │ - @ instruction: 0xfffe26f7 │ │ + @ instruction: 0xfffe26ee │ │ @ instruction: 0xfffe95a9 │ │ @ instruction: 0xfffeb36d │ │ ldrbtmi r4, [r9], #-2508 @ 0xfffff634 │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @ instruction: 0xff54f00a │ │ @ instruction: 0xf4732800 │ │ stmibmi r9, {r0, r3, r4, r5, r6, r8, r9, sl, fp, sp, pc}^ │ │ @@ -16503,41 +16503,41 @@ │ │ stmdbmi r0!, {r0, r1, r2, r7, fp} │ │ @ instruction: 0xf0014479 │ │ svclt 0x0000b881 │ │ @ instruction: 0xfffe9f6b │ │ @ instruction: 0xfffde2e6 │ │ @ instruction: 0xfffde256 │ │ @ instruction: 0xfffe4588 │ │ - @ instruction: 0xfffdc25d │ │ - @ instruction: 0xfffe256f │ │ + @ instruction: 0xfffdc251 │ │ + @ instruction: 0xfffe2566 │ │ @ instruction: 0xfffe7cb4 │ │ - @ instruction: 0xfffdc1f7 │ │ - @ instruction: 0xfffe2523 │ │ - @ instruction: 0xfffe24fd │ │ - @ instruction: 0xfffe24d9 │ │ - @ instruction: 0xfffe24bd │ │ + @ instruction: 0xfffdc1eb │ │ + @ instruction: 0xfffe251a │ │ + @ instruction: 0xfffe24f4 │ │ + @ instruction: 0xfffe24d0 │ │ + @ instruction: 0xfffe24b4 │ │ @ instruction: 0xfffe936f │ │ @ instruction: 0xfffeb131 │ │ @ instruction: 0xfffe9dd3 │ │ @ instruction: 0xfffe9357 │ │ @ instruction: 0xfffeb119 │ │ @ instruction: 0xfffe9dbb │ │ @ instruction: 0xfffe933f │ │ @ instruction: 0xfffeb103 │ │ @ instruction: 0xfffe9da7 │ │ - @ instruction: 0xfffd9fc9 │ │ + @ instruction: 0xfffd9fbd │ │ @ instruction: 0xfffde092 │ │ @ instruction: 0xfffe43c4 │ │ - @ instruction: 0xfffdc099 │ │ - @ instruction: 0xfffe23ab │ │ + @ instruction: 0xfffdc08d │ │ + @ instruction: 0xfffe23a2 │ │ @ instruction: 0xfffe7af0 │ │ - @ instruction: 0xfffdc033 │ │ - @ instruction: 0xfffe235f │ │ - @ instruction: 0xfffe2337 │ │ - @ instruction: 0xfffe2313 │ │ + @ instruction: 0xfffdc027 │ │ + @ instruction: 0xfffe2356 │ │ + @ instruction: 0xfffe232e │ │ + @ instruction: 0xfffe230a │ │ stmdbcs r3, {r0, r6, r9, sl, fp, ip} │ │ adchi pc, ip, r1, lsl #4 │ │ @ instruction: 0xf011e8df │ │ ldmeq sl, {r2} │ │ stmiaeq r0!, {r0, r2, r3, r4, r7, fp} │ │ ldrbtmi r4, [r9], #-2503 @ 0xfffff639 │ │ ldmlt sl, {r0, ip, sp, lr, pc} │ │ @@ -16735,44 +16735,44 @@ │ │ stmdbmi r3!, {r0, r1, r3, r4, r5, r6, r7, r9, sl} │ │ @ instruction: 0xf0004479 │ │ mcrne 14, 2, fp, cr1, cr5, {7} │ │ vmla.i8 d2, d0, d3 │ │ vabd.s8 d8, d31, d19 │ │ ldm r0, {r4}^ │ │ svclt 0x0000f011 │ │ - @ instruction: 0xfffe2279 │ │ + @ instruction: 0xfffe2270 │ │ @ instruction: 0xfffe912b │ │ @ instruction: 0x078f003d │ │ @ instruction: 0x07950792 │ │ @ instruction: 0xfffeaeef │ │ @ instruction: 0xfffe9b93 │ │ @ instruction: 0xfffddf19 │ │ @ instruction: 0xfffdde7e │ │ @ instruction: 0xfffe41b0 │ │ - @ instruction: 0xfffdbe85 │ │ - @ instruction: 0xfffe2197 │ │ + @ instruction: 0xfffdbe79 │ │ + @ instruction: 0xfffe218e │ │ @ instruction: 0xfffe78de │ │ - @ instruction: 0xfffdbe21 │ │ - @ instruction: 0xfffe214d │ │ - @ instruction: 0xfffe2127 │ │ - @ instruction: 0xfffe2103 │ │ - @ instruction: 0xfffe20e7 │ │ + @ instruction: 0xfffdbe15 │ │ + @ instruction: 0xfffe2144 │ │ + @ instruction: 0xfffe211e │ │ + @ instruction: 0xfffe20fa │ │ + @ instruction: 0xfffe20de │ │ @ instruction: 0xfffe8f99 │ │ @ instruction: 0xfffead5d │ │ @ instruction: 0xfffe9a01 │ │ @ instruction: 0xfffddd7c │ │ @ instruction: 0xfffddcec │ │ @ instruction: 0xfffe401e │ │ - @ instruction: 0xfffdbcf3 │ │ - @ instruction: 0xfffe2005 │ │ + @ instruction: 0xfffdbce7 │ │ + @ instruction: 0xfffe1ffc │ │ @ instruction: 0xfffe774c │ │ - @ instruction: 0xfffdbc8f │ │ - @ instruction: 0xfffe1fbb │ │ - @ instruction: 0xfffe1f95 │ │ - @ instruction: 0xfffe1f73 │ │ + @ instruction: 0xfffdbc83 │ │ + @ instruction: 0xfffe1fb2 │ │ + @ instruction: 0xfffe1f8c │ │ + @ instruction: 0xfffe1f6a │ │ ldrbtmi r4, [r9], #-2493 @ 0xfffff643 │ │ svclt 0x0056f000 │ │ ldrbtmi r4, [r9], #-2492 @ 0xfffff644 │ │ ldmibmi ip!, {r1, r4, r9, sp, lr, pc} │ │ and r4, pc, #2030043136 @ 0x79000000 │ │ ldrbtmi r4, [r9], #-2491 @ 0xfffff645 │ │ ldmibmi fp!, {r2, r3, r9, sp, lr, pc} │ │ @@ -16955,15 +16955,15 @@ │ │ beq fe6c0aa4 │ │ ldmdbmi lr!, {r0, r2, r3, r4, r7, r9, fp} │ │ @ instruction: 0xf0014479 │ │ ldmdbmi sp!, {r0, r1, r2, r4, r7, r9, fp, ip, sp, pc} │ │ rsbs r4, sp, r9, ror r4 │ │ ldrbtmi r4, [r9], #-2364 @ 0xfffff6c4 │ │ svclt 0x0000e07a │ │ - @ instruction: 0xfffe1ee1 │ │ + @ instruction: 0xfffe1ed8 │ │ @ instruction: 0xfffe8d93 │ │ @ instruction: 0xfffeab57 │ │ @ instruction: 0xfffe97fb │ │ @ instruction: 0xfffe8d81 │ │ @ instruction: 0xfffeab45 │ │ @ instruction: 0xfffe97e9 │ │ @ instruction: 0xfffe8d6f │ │ @@ -16971,56 +16971,56 @@ │ │ @ instruction: 0xfffe97d7 │ │ @ instruction: 0xfffe8d4d │ │ @ instruction: 0xfffeab11 │ │ @ instruction: 0xfffe97b5 │ │ @ instruction: 0xfffe8d3b │ │ @ instruction: 0xfffeaaff │ │ @ instruction: 0xfffe97a3 │ │ - @ instruction: 0xfffe1e4d │ │ + @ instruction: 0xfffe1e44 │ │ @ instruction: 0xfffe8cff │ │ @ instruction: 0xfffeaac3 │ │ @ instruction: 0xfffe9767 │ │ - @ instruction: 0xfffe1e11 │ │ + @ instruction: 0xfffe1e08 │ │ @ instruction: 0xfffe8cc3 │ │ @ instruction: 0xfffeaa87 │ │ @ instruction: 0xfffe972b │ │ - @ instruction: 0xfffe1dd5 │ │ + @ instruction: 0xfffe1dcc │ │ @ instruction: 0xfffe8c87 │ │ @ instruction: 0xfffeaa4b │ │ @ instruction: 0xfffe96ef │ │ - @ instruction: 0xfffe1d99 │ │ + @ instruction: 0xfffe1d90 │ │ @ instruction: 0xfffe8c4b │ │ @ instruction: 0xfffeaa0f │ │ @ instruction: 0xfffe96b3 │ │ - @ instruction: 0xfffe1d55 │ │ + @ instruction: 0xfffe1d4c │ │ @ instruction: 0xfffe8c07 │ │ @ instruction: 0xfffea9cb │ │ @ instruction: 0xfffe966f │ │ - @ instruction: 0xfffe1d0d │ │ + @ instruction: 0xfffe1d04 │ │ @ instruction: 0xfffe8bbf │ │ @ instruction: 0xfffea983 │ │ @ instruction: 0xfffe9627 │ │ @ instruction: 0xfffe8bad │ │ @ instruction: 0xfffea96f │ │ @ instruction: 0xfffe9611 │ │ @ instruction: 0xfffe8b95 │ │ @ instruction: 0xfffea957 │ │ @ instruction: 0xfffe95f9 │ │ @ instruction: 0xfffe8b7d │ │ @ instruction: 0xfffea941 │ │ @ instruction: 0xfffe95e5 │ │ - @ instruction: 0xfffe1c8f │ │ + @ instruction: 0xfffe1c86 │ │ @ instruction: 0xfffe8b41 │ │ @ instruction: 0xfffea905 │ │ @ instruction: 0xfffe95a9 │ │ - @ instruction: 0xfffe1c47 │ │ + @ instruction: 0xfffe1c3e │ │ @ instruction: 0xfffe8af9 │ │ @ instruction: 0xfffea8bd │ │ @ instruction: 0xfffe9561 │ │ - @ instruction: 0xfffe1bff │ │ + @ instruction: 0xfffe1bf6 │ │ @ instruction: 0xfffe8ab1 │ │ @ instruction: 0xfffea875 │ │ ldrbtmi r4, [r9], #-2501 @ 0xfffff63b │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @ instruction: 0xf9b2f00a │ │ @ instruction: 0xf4732800 │ │ ldmibvs r0!, {r0, r2, r3, r5, r6, r7, r8, r9, fp, sp, pc} │ │ @@ -17214,58 +17214,58 @@ │ │ ldrbtmi r4, [r9], #-2354 @ 0xfffff6ce │ │ stclt 0, cr15, [r8] │ │ ldrbtmi r4, [r9], #-2353 @ 0xfffff6cf │ │ stclt 0, cr15, [r4] │ │ ldrbtmi r4, [r9], #-2352 @ 0xfffff6d0 │ │ stclt 0, cr15, [r0] │ │ @ instruction: 0xfffe9427 │ │ - @ instruction: 0xfffe1ac5 │ │ + @ instruction: 0xfffe1abc │ │ @ instruction: 0xfffe8977 │ │ @ instruction: 0xfffea73b │ │ @ instruction: 0xfffe93df │ │ @ instruction: 0xfffe8955 │ │ @ instruction: 0xfffea719 │ │ @ instruction: 0xfffe93bd │ │ @ instruction: 0xfffe8933 │ │ @ instruction: 0xfffea6f7 │ │ @ instruction: 0xfffe939b │ │ - @ instruction: 0xfffe1a45 │ │ + @ instruction: 0xfffe1a3c │ │ @ instruction: 0xfffe88f7 │ │ @ instruction: 0xfffea6bb │ │ @ instruction: 0xfffe935f │ │ - @ instruction: 0xfffe1a09 │ │ + @ instruction: 0xfffe1a00 │ │ @ instruction: 0xfffe88bb │ │ @ instruction: 0xfffea67f │ │ @ instruction: 0xfffe9323 │ │ - @ instruction: 0xfffe19cd │ │ + @ instruction: 0xfffe19c4 │ │ @ instruction: 0xfffe887f │ │ @ instruction: 0xfffea643 │ │ @ instruction: 0xfffe92e7 │ │ - @ instruction: 0xfffe1989 │ │ + @ instruction: 0xfffe1980 │ │ @ instruction: 0xfffe883b │ │ @ instruction: 0xfffea5ff │ │ @ instruction: 0xfffe92a3 │ │ - @ instruction: 0xfffe1947 │ │ + @ instruction: 0xfffe193e │ │ @ instruction: 0xfffe87f9 │ │ @ instruction: 0xfffea5bd │ │ @ instruction: 0xfffe9261 │ │ @ instruction: 0xfffde0e3 │ │ @ instruction: 0xfffe7058 │ │ @ instruction: 0xfffe638e │ │ @ instruction: 0xfffe702a │ │ @ instruction: 0xfffe7014 │ │ - @ instruction: 0xfffe189b │ │ - @ instruction: 0xfffe187d │ │ + @ instruction: 0xfffe1892 │ │ + @ instruction: 0xfffe1874 │ │ @ instruction: 0xfffe6fc2 │ │ @ instruction: 0xfffe918d │ │ @ instruction: 0xfffe8711 │ │ @ instruction: 0xfffea4d5 │ │ @ instruction: 0xfffe9179 │ │ - @ instruction: 0xfffe181f │ │ - @ instruction: 0xfffe1801 │ │ + @ instruction: 0xfffe1816 │ │ + @ instruction: 0xfffe17f8 │ │ @ instruction: 0xfffe86b3 │ │ @ instruction: 0xfffea475 │ │ @ instruction: 0xfffe9117 │ │ strtmi r4, [r8], -fp, lsr #19 │ │ ldrbtmi r2, [r9], #-513 @ 0xfffffdff │ │ @ instruction: 0xffc6f009 │ │ stmdavs r0!, {r3, r7, r8, r9, ip, sp, pc} │ │ @@ -17439,37 +17439,37 @@ │ │ eors r4, pc, r9, ror r4 @ │ │ @ instruction: 0xfffe85d7 │ │ @ instruction: 0xfffe84d9 │ │ @ instruction: 0xfffea37b │ │ @ instruction: 0xfffe84b3 │ │ @ instruction: 0xfffe8fff │ │ @ instruction: 0xfffe848d │ │ - @ instruction: 0xfffe1695 │ │ + @ instruction: 0xfffe168c │ │ @ instruction: 0xfffe844d │ │ @ instruction: 0xfffe8529 │ │ @ instruction: 0xfffea2eb │ │ @ instruction: 0xfffe8f8d │ │ @ instruction: 0xfffe8511 │ │ @ instruction: 0xfffea2d5 │ │ @ instruction: 0xfffe8f79 │ │ - @ instruction: 0xfffe161b │ │ + @ instruction: 0xfffe1612 │ │ @ instruction: 0xfffe84cd │ │ @ instruction: 0xfffea291 │ │ @ instruction: 0xfffe8f35 │ │ - @ instruction: 0xfffd9c49 │ │ + @ instruction: 0xfffd9c3d │ │ @ instruction: 0xfffdd220 │ │ @ instruction: 0xfffe3552 │ │ - @ instruction: 0xfffdb227 │ │ - @ instruction: 0xfffe1539 │ │ + @ instruction: 0xfffdb21b │ │ + @ instruction: 0xfffe1530 │ │ @ instruction: 0xfffe6c7e │ │ - @ instruction: 0xfffdb1c1 │ │ - @ instruction: 0xfffe14ed │ │ - @ instruction: 0xfffe14c5 │ │ - @ instruction: 0xfffe14a1 │ │ - @ instruction: 0xfffe1485 │ │ + @ instruction: 0xfffdb1b5 │ │ + @ instruction: 0xfffe14e4 │ │ + @ instruction: 0xfffe14bc │ │ + @ instruction: 0xfffe1498 │ │ + @ instruction: 0xfffe147c │ │ @ instruction: 0xfffe8337 │ │ @ instruction: 0xfffea0fb │ │ ldrbtmi r4, [r9], #-2501 @ 0xfffff63b │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ cdp2 0, 3, cr15, cr0, cr9, {0} │ │ @ instruction: 0xf4732800 │ │ stmibmi r2, {r0, r1, r2, r3, r4, r5, r6, fp, sp, pc}^ │ │ @@ -17663,48 +17663,48 @@ │ │ ldclvs 15, cr10, [r0], #108 @ 0x6c │ │ stmdacs r3, {r0, fp, ip, sp} │ │ ldrhi pc, [r1], -r0, lsl #4 │ │ @ instruction: 0xf010e8df │ │ @ instruction: 0x06000050 │ │ streq r0, [r6], -r3, lsl #12 │ │ @ instruction: 0xfffe8d23 │ │ - @ instruction: 0xfffd9a37 │ │ + @ instruction: 0xfffd9a2b │ │ @ instruction: 0xfffdd00e │ │ @ instruction: 0xfffe3340 │ │ - @ instruction: 0xfffdb015 │ │ - @ instruction: 0xfffe1327 │ │ + @ instruction: 0xfffdb009 │ │ + @ instruction: 0xfffe131e │ │ @ instruction: 0xfffe6a6c │ │ - @ instruction: 0xfffdafaf │ │ - @ instruction: 0xfffe12db │ │ - @ instruction: 0xfffe12b5 │ │ - @ instruction: 0xfffe1291 │ │ - @ instruction: 0xfffe1275 │ │ + @ instruction: 0xfffdafa3 │ │ + @ instruction: 0xfffe12d2 │ │ + @ instruction: 0xfffe12ac │ │ + @ instruction: 0xfffe1288 │ │ + @ instruction: 0xfffe126c │ │ @ instruction: 0xfffe8127 │ │ @ instruction: 0xfffe9ee9 │ │ @ instruction: 0xfffe8b8b │ │ @ instruction: 0xfffe810f │ │ @ instruction: 0xfffe9ed3 │ │ @ instruction: 0xfffe8b77 │ │ - @ instruction: 0xfffe1221 │ │ + @ instruction: 0xfffe1218 │ │ @ instruction: 0xfffe80d3 │ │ @ instruction: 0xfffe9e97 │ │ @ instruction: 0xfffe8b3b │ │ - @ instruction: 0xfffe11dd │ │ + @ instruction: 0xfffe11d4 │ │ @ instruction: 0xfffe808f │ │ @ instruction: 0xfffe9e53 │ │ @ instruction: 0xfffe8af7 │ │ - @ instruction: 0xfffe1199 │ │ + @ instruction: 0xfffe1190 │ │ @ instruction: 0xfffe804b │ │ @ instruction: 0xfffe9e0f │ │ @ instruction: 0xfffe8ab3 │ │ - @ instruction: 0xfffe1155 │ │ + @ instruction: 0xfffe114c │ │ @ instruction: 0xfffe8007 │ │ @ instruction: 0xfffe9dcb │ │ @ instruction: 0xfffe8a6f │ │ - @ instruction: 0xfffe1119 │ │ + @ instruction: 0xfffe1110 │ │ @ instruction: 0xfffe7fcb │ │ @ instruction: 0xfffe9d8f │ │ @ instruction: 0xfffe8a33 │ │ ldrbtmi r4, [r9], #-2486 @ 0xfffff64a │ │ ldclt 0, cr15, [r4] │ │ ldrbtmi r4, [r9], #-2485 @ 0xfffff64b │ │ ldmibmi r5!, {r2, sp, lr, pc} │ │ @@ -17883,61 +17883,61 @@ │ │ streq r0, [pc, r5] │ │ @ instruction: 0x07950792 │ │ ldrbtmi r4, [r9], #-2354 @ 0xfffff6ce │ │ svclt 0x008ef000 │ │ ldrbtmi r4, [r9], #-2353 @ 0xfffff6cf │ │ ldmdbmi r1!, {r1, r2, r5, r6, sp, lr, pc} │ │ rsb r4, r3, r9, ror r4 │ │ - @ instruction: 0xfffe1045 │ │ + @ instruction: 0xfffe103c │ │ @ instruction: 0xfffe7ef7 │ │ @ instruction: 0xfffe9cbb │ │ @ instruction: 0xfffe895f │ │ - @ instruction: 0xfffe1009 │ │ + @ instruction: 0xfffe1000 │ │ @ instruction: 0xfffe7ebb │ │ @ instruction: 0xfffe9c7f │ │ @ instruction: 0xfffe8923 │ │ - @ instruction: 0xfffe0fcd │ │ + @ instruction: 0xfffe0fc4 │ │ @ instruction: 0xfffe7e7f │ │ @ instruction: 0xfffe9c43 │ │ @ instruction: 0xfffe88e7 │ │ - @ instruction: 0xfffe0f91 │ │ + @ instruction: 0xfffe0f88 │ │ @ instruction: 0xfffe7e43 │ │ @ instruction: 0xfffe9c07 │ │ @ instruction: 0xfffe88ab │ │ - @ instruction: 0xfffe0f55 │ │ + @ instruction: 0xfffe0f4c │ │ @ instruction: 0xfffe7e07 │ │ @ instruction: 0xfffe9bcb │ │ @ instruction: 0xfffe886f │ │ - @ instruction: 0xfffe0f19 │ │ + @ instruction: 0xfffe0f10 │ │ @ instruction: 0xfffe665e │ │ - @ instruction: 0xfffe0ee5 │ │ + @ instruction: 0xfffe0edc │ │ @ instruction: 0xfffe7d97 │ │ @ instruction: 0xfffe9b5b │ │ @ instruction: 0xfffe87ff │ │ - @ instruction: 0xfffe0ea9 │ │ + @ instruction: 0xfffe0ea0 │ │ @ instruction: 0xfffe7d5b │ │ @ instruction: 0xfffe9b1f │ │ @ instruction: 0xfffe87c3 │ │ - @ instruction: 0xfffe0e6d │ │ + @ instruction: 0xfffe0e64 │ │ @ instruction: 0xfffe7d1f │ │ @ instruction: 0xfffe9ae3 │ │ @ instruction: 0xfffe8787 │ │ - @ instruction: 0xfffe0e31 │ │ + @ instruction: 0xfffe0e28 │ │ @ instruction: 0xfffe7ce3 │ │ @ instruction: 0xfffe9aa7 │ │ @ instruction: 0xfffe874b │ │ - @ instruction: 0xfffe0df5 │ │ + @ instruction: 0xfffe0dec │ │ @ instruction: 0xfffe7ca7 │ │ @ instruction: 0xfffe9a6b │ │ @ instruction: 0xfffe870f │ │ - @ instruction: 0xfffe0db9 │ │ + @ instruction: 0xfffe0db0 │ │ @ instruction: 0xfffe7c6b │ │ @ instruction: 0xfffe9a2f │ │ @ instruction: 0xfffe86d3 │ │ - @ instruction: 0xfffe0d7d │ │ + @ instruction: 0xfffe0d74 │ │ @ instruction: 0xfffe7c2f │ │ @ instruction: 0xfffe99f3 │ │ ldrbtmi r4, [r9], #-2506 @ 0xfffff636 │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ blx fe27afd4 │ │ @ instruction: 0xf4722800 │ │ stmibmi r7, {r2, r5, r6, r9, sl, fp, sp, pc}^ │ │ @@ -18136,48 +18136,48 @@ │ │ stmdbmi r7!, {r3, r8, r9, sl} │ │ @ instruction: 0xf0004479 │ │ stmdbmi r6!, {r1, r8, r9, sl, fp, ip, sp, pc} │ │ sub r4, pc, r9, ror r4 @ │ │ ldrbtmi r4, [r9], #-2341 @ 0xfffff6db │ │ svclt 0x0000e04c │ │ @ instruction: 0xfffe85d3 │ │ - @ instruction: 0xfffd92e7 │ │ + @ instruction: 0xfffd92db │ │ @ instruction: 0xfffdc8be │ │ @ instruction: 0xfffe2bf0 │ │ - @ instruction: 0xfffda8c5 │ │ - @ instruction: 0xfffe0bd7 │ │ + @ instruction: 0xfffda8b9 │ │ + @ instruction: 0xfffe0bce │ │ @ instruction: 0xfffe631c │ │ - @ instruction: 0xfffda85f │ │ - @ instruction: 0xfffe0b8b │ │ - @ instruction: 0xfffe0b63 │ │ - @ instruction: 0xfffe0b3f │ │ - @ instruction: 0xfffe0b25 │ │ + @ instruction: 0xfffda853 │ │ + @ instruction: 0xfffe0b82 │ │ + @ instruction: 0xfffe0b5a │ │ + @ instruction: 0xfffe0b36 │ │ + @ instruction: 0xfffe0b1c │ │ @ instruction: 0xfffe79d3 │ │ @ instruction: 0xfffe78d5 │ │ @ instruction: 0xfffe9777 │ │ @ instruction: 0xfffe78af │ │ @ instruction: 0xfffe83fb │ │ @ instruction: 0xfffe7889 │ │ - @ instruction: 0xfffe0a91 │ │ + @ instruction: 0xfffe0a88 │ │ @ instruction: 0xfffe7849 │ │ @ instruction: 0xfffe7925 │ │ @ instruction: 0xfffe96e7 │ │ @ instruction: 0xfffe8389 │ │ @ instruction: 0xfffe790d │ │ @ instruction: 0xfffe96d1 │ │ @ instruction: 0xfffe8375 │ │ - @ instruction: 0xfffe0a13 │ │ + @ instruction: 0xfffe0a0a │ │ @ instruction: 0xfffe78c5 │ │ @ instruction: 0xfffe9689 │ │ @ instruction: 0xfffe832d │ │ - @ instruction: 0xfffe09cb │ │ + @ instruction: 0xfffe09c2 │ │ @ instruction: 0xfffe787d │ │ @ instruction: 0xfffe9641 │ │ @ instruction: 0xfffe82e5 │ │ - @ instruction: 0xfffe098f │ │ + @ instruction: 0xfffe0986 │ │ @ instruction: 0xfffe7841 │ │ @ instruction: 0xfffe9605 │ │ ldrbtmi r4, [r9], #-2503 @ 0xfffff639 │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @ instruction: 0xf8a8f009 │ │ @ instruction: 0xf4722800 │ │ ldcvs 8, cr10, [r1, #-820]! @ 0xfffffccc │ │ @@ -18373,55 +18373,55 @@ │ │ strbeq r0, [sp], -sl, asr #12 │ │ ldrbtmi r4, [r9], #-2349 @ 0xfffff6d3 │ │ cdplt 0, 4, cr15, cr7, cr0, {0} │ │ ldrbtmi r4, [r9], #-2348 @ 0xfffff6d4 │ │ stmdbmi ip!, {r2, r3, r4, r6, sp, lr, pc} │ │ subs r4, r9, r9, ror r4 │ │ @ instruction: 0xfffe8213 │ │ - @ instruction: 0xfffe08bd │ │ + @ instruction: 0xfffe08b4 │ │ @ instruction: 0xfffe776f │ │ @ instruction: 0xfffe9533 │ │ @ instruction: 0xfffe81d7 │ │ @ instruction: 0xfffdd061 │ │ @ instruction: 0xfffe5fd0 │ │ - @ instruction: 0xfffda513 │ │ - @ instruction: 0xfffe083f │ │ + @ instruction: 0xfffda507 │ │ + @ instruction: 0xfffe0836 │ │ @ instruction: 0xfffe76f1 │ │ @ instruction: 0xfffe94b5 │ │ @ instruction: 0xfffe8159 │ │ - @ instruction: 0xfffe07f7 │ │ + @ instruction: 0xfffe07ee │ │ @ instruction: 0xfffe76a5 │ │ @ instruction: 0xfffe75a7 │ │ @ instruction: 0xfffe9449 │ │ @ instruction: 0xfffe7581 │ │ @ instruction: 0xfffe80cd │ │ @ instruction: 0xfffe755b │ │ - @ instruction: 0xfffe0763 │ │ + @ instruction: 0xfffe075a │ │ @ instruction: 0xfffe751b │ │ - @ instruction: 0xfffe0729 │ │ + @ instruction: 0xfffe0720 │ │ @ instruction: 0xfffe75db │ │ @ instruction: 0xfffe939f │ │ @ instruction: 0xfffe8043 │ │ - @ instruction: 0xfffe06e1 │ │ + @ instruction: 0xfffe06d8 │ │ @ instruction: 0xfffe7593 │ │ @ instruction: 0xfffe9357 │ │ @ instruction: 0xfffe7ffb │ │ - @ instruction: 0xfffe0699 │ │ + @ instruction: 0xfffe0690 │ │ @ instruction: 0xfffe754b │ │ @ instruction: 0xfffe930f │ │ @ instruction: 0xfffe7fb3 │ │ - @ instruction: 0xfffe0651 │ │ + @ instruction: 0xfffe0648 │ │ @ instruction: 0xfffe7503 │ │ @ instruction: 0xfffe92c7 │ │ @ instruction: 0xfffe7f6b │ │ - @ instruction: 0xfffe0615 │ │ + @ instruction: 0xfffe060c │ │ @ instruction: 0xfffe74c7 │ │ @ instruction: 0xfffe928b │ │ @ instruction: 0xfffe7f2f │ │ - @ instruction: 0xfffe05d9 │ │ + @ instruction: 0xfffe05d0 │ │ @ instruction: 0xfffe748b │ │ @ instruction: 0xfffe924f │ │ ldrbtmi r4, [r9], #-2502 @ 0xfffff63a │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ cdp2 0, 12, cr15, cr0, cr8, {0} │ │ @ instruction: 0xf4712800 │ │ ldclvs 15, cr10, [r0], #96 @ 0x60 │ │ @@ -18616,57 +18616,57 @@ │ │ strbhi pc, [r8, #-514] @ 0xfffffdfe @ │ │ @ instruction: 0xf010e8df │ │ strbeq r0, [sp, #4] │ │ strbeq r0, [r6], -r2, asr #12 │ │ ldrbtmi r4, [r9], #-2348 @ 0xfffff6d4 │ │ ldclt 0, cr15, [r7, #-8]! │ │ @ instruction: 0xfffe7e43 │ │ - @ instruction: 0xfffe04ed │ │ + @ instruction: 0xfffe04e4 │ │ @ instruction: 0xfffe739f │ │ @ instruction: 0xfffe9163 │ │ @ instruction: 0xfffe7e07 │ │ - @ instruction: 0xfffe04b1 │ │ + @ instruction: 0xfffe04a8 │ │ @ instruction: 0xfffe7363 │ │ @ instruction: 0xfffe9127 │ │ @ instruction: 0xfffe7dcb │ │ - @ instruction: 0xfffe0475 │ │ - @ instruction: 0xfffe046d │ │ - @ instruction: 0xfffd950f │ │ + @ instruction: 0xfffe046c │ │ + @ instruction: 0xfffe0464 │ │ + @ instruction: 0xfffd9503 │ │ @ instruction: 0xfffdc084 │ │ @ instruction: 0xfffe23b6 │ │ - @ instruction: 0xfffda095 │ │ - @ instruction: 0xfffe03b3 │ │ + @ instruction: 0xfffda089 │ │ + @ instruction: 0xfffe03aa │ │ @ instruction: 0xfffe7265 │ │ @ instruction: 0xfffe9029 │ │ @ instruction: 0xfffe7ccd │ │ - @ instruction: 0xfffe0377 │ │ + @ instruction: 0xfffe036e │ │ @ instruction: 0xfffe7229 │ │ @ instruction: 0xfffe8fed │ │ @ instruction: 0xfffe7c91 │ │ - @ instruction: 0xfffe033b │ │ + @ instruction: 0xfffe0332 │ │ @ instruction: 0xfffe71ed │ │ @ instruction: 0xfffe8fa3 │ │ @ instruction: 0xfffe7c47 │ │ - @ instruction: 0xfffe02f1 │ │ + @ instruction: 0xfffe02e8 │ │ @ instruction: 0xfffe71a3 │ │ @ instruction: 0xfffe8f67 │ │ @ instruction: 0xfffe7c0b │ │ - @ instruction: 0xfffe02b5 │ │ + @ instruction: 0xfffe02ac │ │ @ instruction: 0xfffe7167 │ │ @ instruction: 0xfffe8f2b │ │ @ instruction: 0xfffe7bcf │ │ - @ instruction: 0xfffe0279 │ │ + @ instruction: 0xfffe0270 │ │ @ instruction: 0xfffe712b │ │ @ instruction: 0xfffe8eef │ │ @ instruction: 0xfffe7b93 │ │ - @ instruction: 0xfffe023d │ │ + @ instruction: 0xfffe0234 │ │ @ instruction: 0xfffe70ef │ │ @ instruction: 0xfffe8eb3 │ │ @ instruction: 0xfffe7b57 │ │ - @ instruction: 0xfffe0201 │ │ + @ instruction: 0xfffe01f8 │ │ ldrbtmi r4, [r9], #-2499 @ 0xfffff63d │ │ stmibmi r3, {r2, sp, lr, pc}^ │ │ and r4, r1, r9, ror r4 │ │ ldrbtmi r4, [r9], #-2498 @ 0xfffff63e │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ ldc2l 0, cr15, [r4], {8} │ │ @ instruction: 0xf4722800 │ │ @@ -18861,60 +18861,60 @@ │ │ svclt 0x0000f010 │ │ @ instruction: 0xfffe7003 │ │ @ instruction: 0xfffe8dc7 │ │ @ instruction: 0xfffe7a6b │ │ strhteq r1, [pc], #-104 │ │ ldmdaeq r0!, {r0, r2, r3, r5, r6, fp}^ │ │ svclt 0x00000873 │ │ - @ instruction: 0xfffe0109 │ │ + @ instruction: 0xfffe0100 │ │ @ instruction: 0xfffe6fbb │ │ @ instruction: 0xfffe8d7f │ │ @ instruction: 0xfffe7a23 │ │ - @ instruction: 0xfffe00cd │ │ + @ instruction: 0xfffe00c4 │ │ @ instruction: 0xfffe6f7f │ │ @ instruction: 0xfffe8d43 │ │ @ instruction: 0xfffe79e7 │ │ - @ instruction: 0xfffe0091 │ │ + @ instruction: 0xfffe0088 │ │ @ instruction: 0xfffe6f43 │ │ @ instruction: 0xfffe8d07 │ │ @ instruction: 0xfffe79ab │ │ - @ instruction: 0xfffe004d │ │ + @ instruction: 0xfffe0044 │ │ @ instruction: 0xfffe6eff │ │ @ instruction: 0xfffe8cc3 │ │ @ instruction: 0xfffe7967 │ │ - @ instruction: 0xfffe0009 │ │ + @ instruction: 0xfffe0000 │ │ @ instruction: 0xfffe6ebb │ │ @ instruction: 0xfffe8c7f │ │ @ instruction: 0xfffe7923 │ │ - @ instruction: 0xfffdffcd │ │ + @ instruction: 0xfffdffc4 │ │ @ instruction: 0xfffe6e7f │ │ @ instruction: 0xfffe8c43 │ │ @ instruction: 0xfffe78e7 │ │ - @ instruction: 0xfffdff91 │ │ + @ instruction: 0xfffdff88 │ │ @ instruction: 0xfffe6e43 │ │ @ instruction: 0xfffe8c07 │ │ @ instruction: 0xfffe78ab │ │ - @ instruction: 0xfffdff55 │ │ - @ instruction: 0xfffdff4d │ │ + @ instruction: 0xfffdff4c │ │ + @ instruction: 0xfffdff44 │ │ @ instruction: 0xfffe6e01 │ │ @ instruction: 0xfffe8bc5 │ │ @ instruction: 0xfffe7869 │ │ @ instruction: 0xfffde996 │ │ @ instruction: 0xfffe6dd7 │ │ @ instruction: 0xfffe8b9b │ │ @ instruction: 0xfffe783f │ │ - @ instruction: 0xfffdfee9 │ │ + @ instruction: 0xfffdfee0 │ │ @ instruction: 0xfffe6d9b │ │ @ instruction: 0xfffe8b5f │ │ @ instruction: 0xfffe7803 │ │ - @ instruction: 0xfffdfead │ │ + @ instruction: 0xfffdfea4 │ │ @ instruction: 0xfffe6d5f │ │ @ instruction: 0xfffe8b23 │ │ @ instruction: 0xfffe77c7 │ │ - @ instruction: 0xfffdfe71 │ │ + @ instruction: 0xfffdfe68 │ │ @ instruction: 0xfffe6d23 │ │ @ instruction: 0xfffe8ae7 │ │ @ instruction: 0xfffe778b │ │ ldrbtmi r4, [r9], #-2505 @ 0xfffff637 │ │ stmdalt r2, {r0, ip, sp, lr, pc} │ │ ldrbtmi r4, [r9], #-2504 @ 0xfffff638 │ │ stmibmi r8, {r2, sp, lr, pc}^ │ │ @@ -19112,56 +19112,56 @@ │ │ strbhi pc, [r7, #-0] @ │ │ tstcs r9, r0, lsr #16 │ │ stmdacs r0, {r0, r3, r5, sp, lr} │ │ cfldrsge mvf15, [r1], #196 @ 0xc4 │ │ cdp 0, 8, cr15, cr12, cr13, {5} │ │ ldrbtmi r4, [r8], #-2094 @ 0xfffff7d2 │ │ stmiblt pc!, {r0, r1, r2, r3, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^ @ │ │ - @ instruction: 0xfffdfd5d │ │ + @ instruction: 0xfffdfd54 │ │ @ instruction: 0xfffe6c0f │ │ @ instruction: 0xfffe89d3 │ │ @ instruction: 0xfffe7677 │ │ - @ instruction: 0xfffdfd19 │ │ + @ instruction: 0xfffdfd10 │ │ @ instruction: 0xfffe6bc7 │ │ @ instruction: 0xfffe6ac9 │ │ @ instruction: 0xfffe896b │ │ @ instruction: 0xfffe6aa3 │ │ @ instruction: 0xfffe75ef │ │ @ instruction: 0xfffe6a7d │ │ - @ instruction: 0xfffdfc85 │ │ + @ instruction: 0xfffdfc7c │ │ @ instruction: 0xfffe6a3d │ │ @ instruction: 0xfffe6b19 │ │ @ instruction: 0xfffe88dd │ │ @ instruction: 0xfffe7581 │ │ - @ instruction: 0xfffdfc23 │ │ + @ instruction: 0xfffdfc1a │ │ @ instruction: 0xfffe6ad5 │ │ @ instruction: 0xfffe8899 │ │ @ instruction: 0xfffe753d │ │ - @ instruction: 0xfffdfbdf │ │ + @ instruction: 0xfffdfbd6 │ │ @ instruction: 0xfffe6a91 │ │ @ instruction: 0xfffe8855 │ │ @ instruction: 0xfffe74f9 │ │ - @ instruction: 0xfffdfb9b │ │ + @ instruction: 0xfffdfb92 │ │ @ instruction: 0xfffe6a4d │ │ @ instruction: 0xfffe8811 │ │ @ instruction: 0xfffe74b5 │ │ - @ instruction: 0xfffdfb5f │ │ + @ instruction: 0xfffdfb56 │ │ @ instruction: 0xfffe6a11 │ │ @ instruction: 0xfffe87d5 │ │ @ instruction: 0xfffe7479 │ │ - @ instruction: 0xfffdfb23 │ │ - @ instruction: 0xfffdfb09 │ │ + @ instruction: 0xfffdfb1a │ │ + @ instruction: 0xfffdfb00 │ │ @ instruction: 0xfffe69bb │ │ @ instruction: 0xfffe877f │ │ @ instruction: 0xfffe7423 │ │ - @ instruction: 0xfffdfacd │ │ + @ instruction: 0xfffdfac4 │ │ @ instruction: 0xfffe697f │ │ @ instruction: 0xfffe8743 │ │ @ instruction: 0xfffe73e7 │ │ - @ instruction: 0xfffdfa91 │ │ + @ instruction: 0xfffdfa88 │ │ @ instruction: 0xfffe693f │ │ @ instruction: 0xfffe683d │ │ @ instruction: 0xfffe86df │ │ @ instruction: 0xfffe6813 │ │ strtmi r4, [r8], -r5, asr #19 │ │ ldrbtmi r2, [r9], #-513 @ 0xfffffdff │ │ @ instruction: 0xf8f4f008 │ │ @@ -19361,58 +19361,58 @@ │ │ @ instruction: 0xf0014479 │ │ svclt 0x0000bf6e │ │ @ instruction: 0xfffe72a7 │ │ @ instruction: 0xfffe6731 │ │ @ instruction: 0xfffe680d │ │ @ instruction: 0xfffe85d1 │ │ @ instruction: 0xfffe7275 │ │ - @ instruction: 0xfffdf91f │ │ + @ instruction: 0xfffdf916 │ │ @ instruction: 0xfffe67d1 │ │ @ instruction: 0xfffe8595 │ │ @ instruction: 0xfffe7239 │ │ - @ instruction: 0xfffdf8e3 │ │ + @ instruction: 0xfffdf8da │ │ @ instruction: 0xfffe6795 │ │ @ instruction: 0xfffe8559 │ │ @ instruction: 0xfffe71fd │ │ - @ instruction: 0xfffdf8a7 │ │ + @ instruction: 0xfffdf89e │ │ @ instruction: 0xfffe6759 │ │ @ instruction: 0xfffe851d │ │ @ instruction: 0xfffe71c1 │ │ - @ instruction: 0xfffdf86b │ │ + @ instruction: 0xfffdf862 │ │ @ instruction: 0xfffe671d │ │ @ instruction: 0xfffe84e1 │ │ @ instruction: 0xfffe7185 │ │ - @ instruction: 0xfffdf82f │ │ + @ instruction: 0xfffdf826 │ │ @ instruction: 0xfffe66e1 │ │ @ instruction: 0xfffe84a5 │ │ @ instruction: 0xfffe7149 │ │ - @ instruction: 0xfffdf7eb │ │ + @ instruction: 0xfffdf7e2 │ │ @ instruction: 0xfffe669d │ │ @ instruction: 0xfffe8461 │ │ @ instruction: 0xfffe7105 │ │ - @ instruction: 0xfffdf7af │ │ + @ instruction: 0xfffdf7a6 │ │ @ instruction: 0xfffe6661 │ │ @ instruction: 0xfffe8425 │ │ @ instruction: 0xfffe70c9 │ │ - @ instruction: 0xfffdf773 │ │ + @ instruction: 0xfffdf76a │ │ @ instruction: 0xfffe6625 │ │ @ instruction: 0xfffe83e9 │ │ @ instruction: 0xfffe708d │ │ - @ instruction: 0xfffdf737 │ │ + @ instruction: 0xfffdf72e │ │ @ instruction: 0xfffe65e9 │ │ @ instruction: 0xfffe83ad │ │ @ instruction: 0xfffe7051 │ │ - @ instruction: 0xfffdf6fb │ │ + @ instruction: 0xfffdf6f2 │ │ @ instruction: 0xfffe65ad │ │ @ instruction: 0xfffe836f │ │ @ instruction: 0xfffe7011 │ │ @ instruction: 0xfffe6595 │ │ @ instruction: 0xfffe8359 │ │ @ instruction: 0xfffe6ffd │ │ - @ instruction: 0xfffdf6a7 │ │ + @ instruction: 0xfffdf69e │ │ @ instruction: 0xfffe6559 │ │ @ instruction: 0xfffe831b │ │ @ instruction: 0xfffe6fbd │ │ @ instruction: 0xfffe6541 │ │ @ instruction: 0xfffe8303 │ │ @ instruction: 0xfffe6fa5 │ │ @ instruction: 0xfffe6529 │ │ @@ -19605,59 +19605,59 @@ │ │ ldrbtmi r4, [r9], #-2354 @ 0xfffff6ce │ │ cdplt 0, 8, cr15, cr3, cr3, {0} │ │ @ instruction: 0xfffe8209 │ │ @ instruction: 0xfffe6eab │ │ @ instruction: 0xfffe642f │ │ @ instruction: 0xfffe81f3 │ │ @ instruction: 0xfffe6e97 │ │ - @ instruction: 0xfffdf535 │ │ + @ instruction: 0xfffdf52c │ │ @ instruction: 0xfffe63e7 │ │ @ instruction: 0xfffe81ab │ │ @ instruction: 0xfffe6e4f │ │ - @ instruction: 0xfffdf4ed │ │ + @ instruction: 0xfffdf4e4 │ │ @ instruction: 0xfffe639f │ │ @ instruction: 0xfffe8161 │ │ @ instruction: 0xfffe6e03 │ │ @ instruction: 0xfffe6387 │ │ @ instruction: 0xfffe814b │ │ @ instruction: 0xfffe6def │ │ - @ instruction: 0xfffdf499 │ │ + @ instruction: 0xfffdf490 │ │ @ instruction: 0xfffe634b │ │ @ instruction: 0xfffe810d │ │ @ instruction: 0xfffe6daf │ │ @ instruction: 0xfffe6333 │ │ @ instruction: 0xfffe80f5 │ │ @ instruction: 0xfffe6d97 │ │ @ instruction: 0xfffe631b │ │ @ instruction: 0xfffe80dd │ │ @ instruction: 0xfffe6d7f │ │ @ instruction: 0xfffe6303 │ │ @ instruction: 0xfffe80c7 │ │ @ instruction: 0xfffe6d6b │ │ - @ instruction: 0xfffdf415 │ │ + @ instruction: 0xfffdf40c │ │ @ instruction: 0xfffe62c7 │ │ @ instruction: 0xfffe808b │ │ @ instruction: 0xfffe6d2f │ │ - @ instruction: 0xfffdf3d9 │ │ + @ instruction: 0xfffdf3d0 │ │ @ instruction: 0xfffe628b │ │ @ instruction: 0xfffe804d │ │ @ instruction: 0xfffe6cef │ │ @ instruction: 0xfffe6273 │ │ @ instruction: 0xfffe8037 │ │ @ instruction: 0xfffe6cdb │ │ - @ instruction: 0xfffdf379 │ │ + @ instruction: 0xfffdf370 │ │ @ instruction: 0xfffe622b │ │ @ instruction: 0xfffe7fed │ │ @ instruction: 0xfffe6c8f │ │ @ instruction: 0xfffe6213 │ │ @ instruction: 0xfffe6205 │ │ @ instruction: 0xfffdaf70 │ │ @ instruction: 0xfffe12a2 │ │ - @ instruction: 0xfffd8f81 │ │ - @ instruction: 0xfffdf29d │ │ + @ instruction: 0xfffd8f75 │ │ + @ instruction: 0xfffdf294 │ │ ldrbtmi r4, [r9], #-2514 @ 0xfffff62e │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ ldc2 0, cr15, [ip, #-28] @ 0xffffffe4 │ │ @ instruction: 0xf4712800 │ │ ldmibmi r1, {r1, r2, r3, r4, r5, r6, r7, r8, fp, sp, pc}^ │ │ andcs r4, r4, #40, 12 @ 0x2800000 │ │ @ instruction: 0xf0074479 │ │ @@ -19867,45 +19867,45 @@ │ │ @ instruction: 0xf010e8d1 │ │ @ instruction: 0xfffe6087 │ │ ldrbeq r0, [r2, #-80] @ 0xffffffb0 │ │ ldrbeq r0, [sl, #-1366] @ 0xfffffaaa │ │ @ instruction: 0xfffe9b32 │ │ @ instruction: 0xfffdade4 │ │ @ instruction: 0xfffe1116 │ │ - @ instruction: 0xfffd8df5 │ │ - @ instruction: 0xfffdf111 │ │ + @ instruction: 0xfffd8de9 │ │ + @ instruction: 0xfffdf108 │ │ @ instruction: 0xfffe5fc3 │ │ @ instruction: 0xfffe7d87 │ │ @ instruction: 0xfffe6a2b │ │ - @ instruction: 0xfffdf0c9 │ │ + @ instruction: 0xfffdf0c0 │ │ @ instruction: 0xfffe5f7b │ │ @ instruction: 0xfffe7d3f │ │ @ instruction: 0xfffe69e3 │ │ - @ instruction: 0xfffdf081 │ │ + @ instruction: 0xfffdf078 │ │ @ instruction: 0xfffe5f33 │ │ @ instruction: 0xfffe7cf7 │ │ @ instruction: 0xfffe699b │ │ - @ instruction: 0xfffdf039 │ │ + @ instruction: 0xfffdf030 │ │ @ instruction: 0xfffe5ee7 │ │ @ instruction: 0xfffe5de9 │ │ @ instruction: 0xfffe7c8b │ │ @ instruction: 0xfffe5dc3 │ │ @ instruction: 0xfffe690f │ │ @ instruction: 0xfffe5d9d │ │ @ instruction: 0xfffe5e81 │ │ @ instruction: 0xfffe5d77 │ │ @ instruction: 0xfffe46e0 │ │ @ instruction: 0xfffe5d49 │ │ - @ instruction: 0xfffd8c0f │ │ + @ instruction: 0xfffd8c03 │ │ @ instruction: 0xfffe5d1b │ │ - @ instruction: 0xfffdef25 │ │ + @ instruction: 0xfffdef1c │ │ @ instruction: 0xfffe5dcb │ │ @ instruction: 0xfffe7b81 │ │ @ instruction: 0xfffe6817 │ │ - @ instruction: 0xfffdeec1 │ │ + @ instruction: 0xfffdeeb8 │ │ @ instruction: 0xfffe5d6b │ │ @ instruction: 0xfffe7b2f │ │ @ instruction: 0xfffe67d3 │ │ ldrbtmi r4, [r9], #-2504 @ 0xfffff638 │ │ cdplt 0, 4, cr15, cr15, cr1, {0} │ │ ldrbtmi r4, [r9], #-2503 @ 0xfffff639 │ │ stmibmi r7, {r2, sp, lr, pc}^ │ │ @@ -20102,55 +20102,55 @@ │ │ strbeq r0, [pc, #-1356] @ 40c28 │ │ ldrbtmi r4, [r9], #-2349 @ 0xfffff6d3 │ │ stcllt 0, cr15, [r9, #-0] │ │ ldrbtmi r4, [r9], #-2348 @ 0xfffff6d4 │ │ stmdblt sp, {r0, ip, sp, lr, pc}^ │ │ ldrbtmi r4, [r9], #-2347 @ 0xfffff6d5 │ │ stmdblt r9, {r0, ip, sp, lr, pc}^ │ │ - @ instruction: 0xfffdede1 │ │ + @ instruction: 0xfffdedd8 │ │ @ instruction: 0xfffe5c93 │ │ @ instruction: 0xfffe7a57 │ │ @ instruction: 0xfffe66fb │ │ - @ instruction: 0xfffdeda5 │ │ + @ instruction: 0xfffded9c │ │ @ instruction: 0xfffe5c57 │ │ @ instruction: 0xfffe7a1b │ │ @ instruction: 0xfffe66bf │ │ - @ instruction: 0xfffded69 │ │ + @ instruction: 0xfffded60 │ │ @ instruction: 0xfffe5c1b │ │ @ instruction: 0xfffe79df │ │ @ instruction: 0xfffe6683 │ │ - @ instruction: 0xfffded2d │ │ + @ instruction: 0xfffded24 │ │ @ instruction: 0xfffe5bdf │ │ @ instruction: 0xfffe79a3 │ │ @ instruction: 0xfffe6647 │ │ - @ instruction: 0xfffdecf1 │ │ + @ instruction: 0xfffdece8 │ │ @ instruction: 0xfffe5ba3 │ │ @ instruction: 0xfffe7967 │ │ @ instruction: 0xfffe660b │ │ - @ instruction: 0xfffdecb5 │ │ + @ instruction: 0xfffdecac │ │ @ instruction: 0xfffe5b67 │ │ @ instruction: 0xfffe792b │ │ @ instruction: 0xfffe65cf │ │ - @ instruction: 0xfffd67f1 │ │ + @ instruction: 0xfffd67e5 │ │ @ instruction: 0xfffda8ba │ │ @ instruction: 0xfffe0bec │ │ - @ instruction: 0xfffd88c1 │ │ - @ instruction: 0xfffdebd1 │ │ + @ instruction: 0xfffd88b5 │ │ + @ instruction: 0xfffdebc8 │ │ @ instruction: 0xfffe4316 │ │ - @ instruction: 0xfffd8859 │ │ - @ instruction: 0xfffdeb85 │ │ - @ instruction: 0xfffdeb59 │ │ + @ instruction: 0xfffd884d │ │ + @ instruction: 0xfffdeb7c │ │ + @ instruction: 0xfffdeb50 │ │ @ instruction: 0xfffe5a0b │ │ @ instruction: 0xfffe77cf │ │ @ instruction: 0xfffe6473 │ │ - @ instruction: 0xfffdeb11 │ │ + @ instruction: 0xfffdeb08 │ │ @ instruction: 0xfffe59c3 │ │ @ instruction: 0xfffe7787 │ │ @ instruction: 0xfffe642b │ │ - @ instruction: 0xfffdead5 │ │ + @ instruction: 0xfffdeacc │ │ @ instruction: 0xfffe5987 │ │ @ instruction: 0xfffe7749 │ │ ldrbtmi r4, [r9], #-2513 @ 0xfffff62f │ │ stmialt pc!, {r0, ip, sp, lr, pc}^ @ │ │ ldrbtmi r4, [r9], #-2512 @ 0xfffff630 │ │ ldmdblt r3, {r0, ip, sp, lr, pc} │ │ ldrbtmi r4, [r9], #-2511 @ 0xfffff631 │ │ @@ -20365,50 +20365,50 @@ │ │ @ instruction: 0xfffe6327 │ │ @ instruction: 0xfffe58ab │ │ @ instruction: 0xfffe766d │ │ @ instruction: 0xfffe630f │ │ @ instruction: 0xfffe5893 │ │ @ instruction: 0xfffe7657 │ │ @ instruction: 0xfffe62fb │ │ - @ instruction: 0xfffde99d │ │ + @ instruction: 0xfffde994 │ │ @ instruction: 0xfffe584f │ │ @ instruction: 0xfffe7613 │ │ @ instruction: 0xfffe62b7 │ │ - @ instruction: 0xfffde959 │ │ + @ instruction: 0xfffde950 │ │ @ instruction: 0xfffe580b │ │ @ instruction: 0xfffe75cf │ │ @ instruction: 0xfffe6273 │ │ @ instruction: 0xfffe57f9 │ │ @ instruction: 0xfffe75bb │ │ @ instruction: 0xfffe625d │ │ @ instruction: 0xfffe57e1 │ │ @ instruction: 0xfffe75a5 │ │ @ instruction: 0xfffe6249 │ │ - @ instruction: 0xfffde8f3 │ │ + @ instruction: 0xfffde8ea │ │ @ instruction: 0xfffe57a1 │ │ @ instruction: 0xfffe7557 │ │ @ instruction: 0xfffe61ed │ │ - @ instruction: 0xfffde897 │ │ + @ instruction: 0xfffde88e │ │ @ instruction: 0xfffe573f │ │ @ instruction: 0xfffe7503 │ │ @ instruction: 0xfffe61a7 │ │ @ instruction: 0xfffe0829 │ │ @ instruction: 0xfffe3f9e │ │ @ instruction: 0xfffe32d4 │ │ @ instruction: 0xfffe56e1 │ │ @ instruction: 0xfffe74a5 │ │ @ instruction: 0xfffe6149 │ │ - @ instruction: 0xfffd78bd │ │ + @ instruction: 0xfffd78b1 │ │ @ instruction: 0xfffda434 │ │ @ instruction: 0xfffe0766 │ │ - @ instruction: 0xfffd8445 │ │ - @ instruction: 0xfffde759 │ │ + @ instruction: 0xfffd8439 │ │ + @ instruction: 0xfffde750 │ │ @ instruction: 0xfffe3e9e │ │ - @ instruction: 0xfffde729 │ │ - @ instruction: 0xfffde70d │ │ + @ instruction: 0xfffde720 │ │ + @ instruction: 0xfffde704 │ │ @ instruction: 0xfffe55bf │ │ @ instruction: 0xfffe7383 │ │ @ instruction: 0xfffe6027 │ │ ldrbtmi r4, [r9], #-2510 @ 0xfffff632 │ │ cdplt 0, 13, cr15, cr8, cr0, {0} │ │ ldrbtmi r4, [r9], #-2509 @ 0xfffff633 │ │ stmibmi sp, {r0, r2, r3, r4, r6, r7, r9, sp, lr, pc}^ │ │ @@ -20611,61 +20611,61 @@ │ │ @ instruction: 0xf0064479 │ │ stmdacs r0, {r0, r1, r3, r5, r7, r8, sl, fp, ip, sp, lr, pc} │ │ ldmge ip, {r0, r3, r4, r5, r6, sl, ip, sp, lr, pc}^ │ │ ldrbtmi r4, [r9], #-2368 @ 0xfffff6c0 │ │ stmdblt sp, {r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^ │ │ ldrbtmi r4, [r9], #-2367 @ 0xfffff6c1 │ │ svclt 0x0000e083 │ │ - @ instruction: 0xfffde605 │ │ + @ instruction: 0xfffde5fc │ │ @ instruction: 0xfffe54b7 │ │ @ instruction: 0xfffe727b │ │ @ instruction: 0xfffe5f1f │ │ @ instruction: 0xfffe54a5 │ │ @ instruction: 0xfffe7269 │ │ @ instruction: 0xfffe5f0d │ │ - @ instruction: 0xfffde5af │ │ + @ instruction: 0xfffde5a6 │ │ @ instruction: 0xfffe5461 │ │ @ instruction: 0xfffe7225 │ │ @ instruction: 0xfffe5ec9 │ │ - @ instruction: 0xfffde56b │ │ + @ instruction: 0xfffde562 │ │ @ instruction: 0xfffe541d │ │ @ instruction: 0xfffe71e1 │ │ @ instruction: 0xfffe5e85 │ │ - @ instruction: 0xfffde527 │ │ + @ instruction: 0xfffde51e │ │ @ instruction: 0xfffe53d9 │ │ @ instruction: 0xfffe719b │ │ @ instruction: 0xfffe5e3d │ │ @ instruction: 0xfffe53c1 │ │ @ instruction: 0xfffe7185 │ │ @ instruction: 0xfffe5e29 │ │ - @ instruction: 0xfffde4d3 │ │ - @ instruction: 0xfffde4af │ │ + @ instruction: 0xfffde4ca │ │ + @ instruction: 0xfffde4a6 │ │ @ instruction: 0xfffe5361 │ │ @ instruction: 0xfffe7125 │ │ @ instruction: 0xfffe5dc9 │ │ - @ instruction: 0xfffde473 │ │ + @ instruction: 0xfffde46a │ │ @ instruction: 0xfffe5325 │ │ @ instruction: 0xfffe70e9 │ │ @ instruction: 0xfffe5d8d │ │ - @ instruction: 0xfffde437 │ │ + @ instruction: 0xfffde42e │ │ @ instruction: 0xfffe52e9 │ │ @ instruction: 0xfffe70ad │ │ @ instruction: 0xfffe5d51 │ │ - @ instruction: 0xfffde3fb │ │ + @ instruction: 0xfffde3f2 │ │ @ instruction: 0xfffe3b40 │ │ @ instruction: 0xfffe5297 │ │ @ instruction: 0xfffe7059 │ │ @ instruction: 0xfffe5cfb │ │ @ instruction: 0xfffe527f │ │ @ instruction: 0xfffe7041 │ │ @ instruction: 0xfffe5ce3 │ │ @ instruction: 0xfffe5267 │ │ @ instruction: 0xfffe702b │ │ @ instruction: 0xfffe5ccf │ │ - @ instruction: 0xfffde371 │ │ + @ instruction: 0xfffde368 │ │ @ instruction: 0xfffe5223 │ │ @ instruction: 0xfffe6fe5 │ │ @ instruction: 0xfffe5c87 │ │ @ instruction: 0xfffe520b │ │ @ instruction: 0xfffe6fcd │ │ @ instruction: 0xfffe5c6f │ │ @ instruction: 0xfffe51f3 │ │ @@ -20890,41 +20890,41 @@ │ │ @ instruction: 0xfffe5af5 │ │ @ instruction: 0xfffe0177 │ │ @ instruction: 0xfffe38ec │ │ @ instruction: 0xfffe2c1e │ │ @ instruction: 0xfffe502b │ │ @ instruction: 0xfffe6def │ │ @ instruction: 0xfffe5a81 │ │ - @ instruction: 0xfffde127 │ │ + @ instruction: 0xfffde11e │ │ @ instruction: 0xfffe4fd9 │ │ @ instruction: 0xfffe6d9d │ │ @ instruction: 0xfffe5a41 │ │ - @ instruction: 0xfffde0e3 │ │ + @ instruction: 0xfffde0da │ │ @ instruction: 0xfffe4f95 │ │ @ instruction: 0xfffe6d59 │ │ @ instruction: 0xfffe59fd │ │ - @ instruction: 0xfffde09b │ │ + @ instruction: 0xfffde092 │ │ @ instruction: 0xfffe4f4d │ │ @ instruction: 0xfffe6d11 │ │ @ instruction: 0xfffe59b5 │ │ - @ instruction: 0xfffde053 │ │ + @ instruction: 0xfffde04a │ │ @ instruction: 0xfffe4f05 │ │ @ instruction: 0xfffe6cc9 │ │ @ instruction: 0xfffe596d │ │ @ instruction: 0xfffdffef │ │ @ instruction: 0xfffe3764 │ │ @ instruction: 0xfffe2a9a │ │ @ instruction: 0xfffe4ea3 │ │ @ instruction: 0xfffd86de │ │ @ instruction: 0xfffd9c00 │ │ @ instruction: 0xfffdff32 │ │ - @ instruction: 0xfffd7c11 │ │ - @ instruction: 0xfffddf21 │ │ - @ instruction: 0xfffddf03 │ │ - @ instruction: 0xfffddee5 │ │ + @ instruction: 0xfffd7c05 │ │ + @ instruction: 0xfffddf18 │ │ + @ instruction: 0xfffddefa │ │ + @ instruction: 0xfffddedc │ │ @ instruction: 0xfffe4d97 │ │ @ instruction: 0xfffe6b59 │ │ @ instruction: 0xfffe57fb │ │ @ instruction: 0xfffe4d7f │ │ @ instruction: 0xfffe6b43 │ │ @ instruction: 0xfffe57e7 │ │ ldrbtmi r4, [r9], #-2505 @ 0xfffff637 │ │ @@ -21125,24 +21125,24 @@ │ │ strbeq r0, [sp], #1226 @ 0x4ca │ │ ldmdbmi r7!, {r4, r6, r7, sl} │ │ @ instruction: 0xf0004479 │ │ ldmdbmi r6!, {r1, r3, r6, r7, sl, fp, ip, sp, pc} │ │ rsb r4, pc, r9, ror r4 @ │ │ ldrbtmi r4, [r9], #-2357 @ 0xfffff6cb │ │ svclt 0x0000e06c │ │ - @ instruction: 0xfffddde9 │ │ - @ instruction: 0xfffdddcd │ │ + @ instruction: 0xfffddde0 │ │ + @ instruction: 0xfffdddc4 │ │ @ instruction: 0xfffe4c7f │ │ @ instruction: 0xfffe6a43 │ │ @ instruction: 0xfffe56e7 │ │ - @ instruction: 0xfffddd8d │ │ + @ instruction: 0xfffddd84 │ │ @ instruction: 0xfffe4c3f │ │ @ instruction: 0xfffe6a03 │ │ @ instruction: 0xfffe56a7 │ │ - @ instruction: 0xfffddd5d │ │ + @ instruction: 0xfffddd54 │ │ @ instruction: 0xfffe4c0f │ │ @ instruction: 0xfffe69d3 │ │ @ instruction: 0xfffe5677 │ │ @ instruction: 0xfffe4bfd │ │ @ instruction: 0xfffe69c1 │ │ @ instruction: 0xfffe5665 │ │ @ instruction: 0xfffe4beb │ │ @@ -21156,34 +21156,34 @@ │ │ @ instruction: 0xfffe5625 │ │ @ instruction: 0xfffe4ba9 │ │ @ instruction: 0xfffe696b │ │ @ instruction: 0xfffe560d │ │ @ instruction: 0xfffe4b8d │ │ @ instruction: 0xfffe6943 │ │ @ instruction: 0xfffe55d9 │ │ - @ instruction: 0xfffddc83 │ │ + @ instruction: 0xfffddc7a │ │ @ instruction: 0xfffe4a3b │ │ @ instruction: 0xfffe4b17 │ │ @ instruction: 0xfffe68d9 │ │ @ instruction: 0xfffe557b │ │ @ instruction: 0xfffe4aff │ │ @ instruction: 0xfffe68c3 │ │ @ instruction: 0xfffe5567 │ │ - @ instruction: 0xfffddc05 │ │ + @ instruction: 0xfffddbfc │ │ @ instruction: 0xfffe6881 │ │ - @ instruction: 0xfffd623f │ │ + @ instruction: 0xfffd6233 │ │ @ instruction: 0xfffd9814 │ │ @ instruction: 0xfffdfb46 │ │ - @ instruction: 0xfffd7825 │ │ - @ instruction: 0xfffddb35 │ │ - @ instruction: 0xfffddb19 │ │ + @ instruction: 0xfffd7819 │ │ + @ instruction: 0xfffddb2c │ │ + @ instruction: 0xfffddb10 │ │ @ instruction: 0xfffe49cd │ │ @ instruction: 0xfffe6791 │ │ @ instruction: 0xfffe5435 │ │ - @ instruction: 0xfffddad7 │ │ + @ instruction: 0xfffddace │ │ @ instruction: 0xfffe4989 │ │ @ instruction: 0xfffe674d │ │ ldrbtmi r4, [r9], #-2520 @ 0xfffff628 │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @ instruction: 0xf92cf006 │ │ vld2.8 {d18-d19}, [pc], r0 │ │ bvs c6c7b4 │ │ @@ -21398,35 +21398,35 @@ │ │ stmdacs r3, {r0, fp, ip, sp} │ │ strbthi pc, [pc], #-512 @ 425b8 @ │ │ tsteq r8, pc, lsl #4 @ │ │ @ instruction: 0xf010e8d1 │ │ @ instruction: 0xfffe531b │ │ mvnseq r0, #110 @ 0x6e │ │ strbteq r0, [r2], #-1014 @ 0xfffffc0a │ │ - @ instruction: 0xfffdd9bd │ │ + @ instruction: 0xfffdd9b4 │ │ @ instruction: 0xfffe486f │ │ @ instruction: 0xfffe6631 │ │ @ instruction: 0xfffe52d3 │ │ @ instruction: 0xfffe4857 │ │ @ instruction: 0xfffe6619 │ │ @ instruction: 0xfffe52bb │ │ @ instruction: 0xfffe483f │ │ @ instruction: 0xfffe6603 │ │ @ instruction: 0xfffe52a7 │ │ - @ instruction: 0xfffd5fbe │ │ - @ instruction: 0xfffd75f9 │ │ - @ instruction: 0xfffdd925 │ │ + @ instruction: 0xfffd5fb2 │ │ + @ instruction: 0xfffd75ed │ │ + @ instruction: 0xfffdd91c │ │ @ instruction: 0xfffe47d7 │ │ @ instruction: 0xfffe659b │ │ @ instruction: 0xfffe523f │ │ @ instruction: 0xfffe6591 │ │ @ instruction: 0xfffd9528 │ │ @ instruction: 0xfffdf85a │ │ - @ instruction: 0xfffd7539 │ │ - @ instruction: 0xfffdd865 │ │ + @ instruction: 0xfffd752d │ │ + @ instruction: 0xfffdd85c │ │ @ instruction: 0xfffe4717 │ │ @ instruction: 0xfffe64db │ │ @ instruction: 0xfffe517f │ │ @ instruction: 0xfffe46f5 │ │ @ instruction: 0xfffe64b9 │ │ @ instruction: 0xfffe515d │ │ @ instruction: 0xfffe2f66 │ │ @@ -21445,16 +21445,16 @@ │ │ @ instruction: 0xfffe63d5 │ │ @ instruction: 0xfffe5077 │ │ @ instruction: 0xfffe2e8e │ │ @ instruction: 0xfffe2e78 │ │ @ instruction: 0xfffe45cf │ │ @ instruction: 0xfffe6393 │ │ @ instruction: 0xfffe5037 │ │ - @ instruction: 0xfffdd6e1 │ │ - @ instruction: 0xfffdd6c7 │ │ + @ instruction: 0xfffdd6d8 │ │ + @ instruction: 0xfffdd6be │ │ @ instruction: 0xfffe457b │ │ @ instruction: 0xfffe633f │ │ @ instruction: 0xfffe4fe3 │ │ ldrbtmi r4, [r9], #-2503 @ 0xfffff639 │ │ bllt ffcfe6a4 │ │ strtmi r4, [r8], -r6, asr #19 │ │ ldrbtmi r2, [r9], #-513 @ 0xfffffdff │ │ @@ -21650,15 +21650,15 @@ │ │ orrseq r0, r1, #4 │ │ orrseq r0, r7, #148, 6 @ 0x50000002 │ │ ldrbtmi r4, [r9], #-2366 @ 0xfffff6c2 │ │ bllt fe4be9b0 │ │ ldrbtmi r4, [r9], #-2365 @ 0xfffff6c3 │ │ ldmdbmi sp!, {r1, r2, r3, r4, r5, r6, sp, lr, pc} │ │ rsbs r4, fp, r9, ror r4 │ │ - @ instruction: 0xfffdd5ad │ │ + @ instruction: 0xfffdd5a4 │ │ @ instruction: 0xfffe445b │ │ @ instruction: 0xfffe435d │ │ @ instruction: 0xfffe61ff │ │ @ instruction: 0xfffe4337 │ │ @ instruction: 0xfffe4e83 │ │ @ instruction: 0xfffe4311 │ │ @ instruction: 0xfffe1fca │ │ @@ -21668,55 +21668,55 @@ │ │ @ instruction: 0xfffe4e27 │ │ @ instruction: 0xfffe43ab │ │ @ instruction: 0xfffe616d │ │ @ instruction: 0xfffe4e0f │ │ @ instruction: 0xfffe4393 │ │ @ instruction: 0xfffe6157 │ │ @ instruction: 0xfffe4dfb │ │ - @ instruction: 0xfffdd4a5 │ │ + @ instruction: 0xfffdd49c │ │ @ instruction: 0xfffe4359 │ │ @ instruction: 0xfffe611d │ │ @ instruction: 0xfffe4dc1 │ │ - @ instruction: 0xfffdd46b │ │ + @ instruction: 0xfffdd462 │ │ @ instruction: 0xfffe431f │ │ @ instruction: 0xfffe60e3 │ │ @ instruction: 0xfffe4d87 │ │ - @ instruction: 0xfffdd425 │ │ + @ instruction: 0xfffdd41c │ │ @ instruction: 0xfffe42d7 │ │ @ instruction: 0xfffe609b │ │ @ instruction: 0xfffe4d3f │ │ @ instruction: 0xfffe42c5 │ │ @ instruction: 0xfffe6089 │ │ @ instruction: 0xfffe4d2d │ │ @ instruction: 0xfffe42a5 │ │ @ instruction: 0xfffe6069 │ │ @ instruction: 0xfffe4d0d │ │ - @ instruction: 0xfffdd3b7 │ │ + @ instruction: 0xfffdd3ae │ │ @ instruction: 0xfffe426b │ │ @ instruction: 0xfffe602f │ │ @ instruction: 0xfffe4cd3 │ │ - @ instruction: 0xfffdd37d │ │ + @ instruction: 0xfffdd374 │ │ @ instruction: 0xfffe4231 │ │ @ instruction: 0xfffe5ff3 │ │ @ instruction: 0xfffe4c95 │ │ @ instruction: 0xfffe4219 │ │ @ instruction: 0xfffe5fdd │ │ @ instruction: 0xfffe4c81 │ │ - @ instruction: 0xfffdd32b │ │ + @ instruction: 0xfffdd322 │ │ @ instruction: 0xfffe41dd │ │ @ instruction: 0xfffe5fa1 │ │ @ instruction: 0xfffe4c45 │ │ @ instruction: 0xfffe41cb │ │ @ instruction: 0xfffe5f8f │ │ @ instruction: 0xfffe4c33 │ │ - @ instruction: 0xfffdd2dd │ │ + @ instruction: 0xfffdd2d4 │ │ @ instruction: 0xfffe418f │ │ @ instruction: 0xfffe5f53 │ │ @ instruction: 0xfffe4bf7 │ │ - @ instruction: 0xfffdd2a1 │ │ + @ instruction: 0xfffdd298 │ │ @ instruction: 0xfffe4153 │ │ @ instruction: 0xfffe5f17 │ │ ldrbtmi r4, [r9], #-2496 @ 0xfffff640 │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ stc2 0, cr15, [r2, #-20] @ 0xffffffec │ │ vld2.8 {d18-d19}, [pc], r0 │ │ ldmibvs r0!, {r1, r2, r3, r4, r6, r7, fp, sp, pc} │ │ @@ -21905,15 +21905,15 @@ │ │ ldmdbmi r6!, {r0, r1, r5, r6, r8, r9, sl, fp, ip, sp, pc} │ │ @ instruction: 0xf7fe4479 │ │ ldmdbmi r5!, {r0, r1, r2, r3, r4, r6, r8, r9, sl, fp, ip, sp, pc} │ │ rsb r4, sp, r9, ror r4 │ │ ldrbtmi r4, [r9], #-2356 @ 0xfffff6cc │ │ svclt 0x0000e06a │ │ @ instruction: 0xfffe4ac7 │ │ - @ instruction: 0xfffdd169 │ │ + @ instruction: 0xfffdd160 │ │ @ instruction: 0xfffe28ae │ │ @ instruction: 0xfffe4005 │ │ @ instruction: 0xfffe5dc9 │ │ @ instruction: 0xfffe4a6d │ │ @ instruction: 0xfffd98ef │ │ @ instruction: 0xfffe2864 │ │ @ instruction: 0xfffe1b96 │ │ @@ -21922,40 +21922,40 @@ │ │ @ instruction: 0xfffe4a0b │ │ @ instruction: 0xfffd988d │ │ @ instruction: 0xfffe2802 │ │ @ instruction: 0xfffe1b34 │ │ @ instruction: 0xfffe3f41 │ │ @ instruction: 0xfffe5d05 │ │ @ instruction: 0xfffe49a9 │ │ - @ instruction: 0xfffdd053 │ │ + @ instruction: 0xfffdd04a │ │ @ instruction: 0xfffe3f07 │ │ @ instruction: 0xfffe5ccb │ │ @ instruction: 0xfffe496f │ │ - @ instruction: 0xfffdd019 │ │ + @ instruction: 0xfffdd010 │ │ @ instruction: 0xfffe275e │ │ @ instruction: 0xfffe3eb5 │ │ @ instruction: 0xfffe5c79 │ │ @ instruction: 0xfffe491d │ │ - @ instruction: 0xfffdcfc7 │ │ + @ instruction: 0xfffdcfbe │ │ @ instruction: 0xfffe3e7b │ │ @ instruction: 0xfffe5c3f │ │ @ instruction: 0xfffe48e3 │ │ - @ instruction: 0xfffdcf8d │ │ + @ instruction: 0xfffdcf84 │ │ @ instruction: 0xfffe3e3f │ │ @ instruction: 0xfffe5c03 │ │ @ instruction: 0xfffe48a7 │ │ - @ instruction: 0xfffdcf51 │ │ + @ instruction: 0xfffdcf48 │ │ @ instruction: 0xfffe3e03 │ │ @ instruction: 0xfffe5bc7 │ │ @ instruction: 0xfffe486b │ │ - @ instruction: 0xfffdcf15 │ │ + @ instruction: 0xfffdcf0c │ │ @ instruction: 0xfffe3dc9 │ │ @ instruction: 0xfffe5b8d │ │ @ instruction: 0xfffe4831 │ │ - @ instruction: 0xfffdcedb │ │ + @ instruction: 0xfffdced2 │ │ @ instruction: 0xfffe3d8d │ │ @ instruction: 0xfffe5b4f │ │ @ instruction: 0xfffe47f1 │ │ @ instruction: 0xfffe3d75 │ │ @ instruction: 0xfffe5b37 │ │ @ instruction: 0xfffe47d9 │ │ @ instruction: 0xfffe3d5d │ │ @@ -22148,47 +22148,47 @@ │ │ sbceq r0, r8, #1342177292 @ 0x5000000c │ │ ldrbtmi r4, [r9], #-2341 @ 0xfffff6db │ │ stmdbmi r5!, {r1, r6, r7, r9, sp, lr, pc} │ │ sub r4, sp, r9, ror r4 │ │ ldrbtmi r4, [r9], #-2340 @ 0xfffff6dc │ │ svclt 0x0000e04a │ │ @ instruction: 0xfffe46f3 │ │ - @ instruction: 0xfffd5407 │ │ + @ instruction: 0xfffd53fb │ │ @ instruction: 0xfffd89de │ │ @ instruction: 0xfffded10 │ │ - @ instruction: 0xfffd69e5 │ │ - @ instruction: 0xfffdccf3 │ │ + @ instruction: 0xfffd69d9 │ │ + @ instruction: 0xfffdccea │ │ @ instruction: 0xfffe243a │ │ - @ instruction: 0xfffd697d │ │ - @ instruction: 0xfffdcca9 │ │ - @ instruction: 0xfffdcc83 │ │ - @ instruction: 0xfffdcc61 │ │ - @ instruction: 0xfffdcc45 │ │ - @ instruction: 0xfffdcc27 │ │ + @ instruction: 0xfffd6971 │ │ + @ instruction: 0xfffdcca0 │ │ + @ instruction: 0xfffdcc7a │ │ + @ instruction: 0xfffdcc58 │ │ + @ instruction: 0xfffdcc3c │ │ + @ instruction: 0xfffdcc1e │ │ @ instruction: 0xfffe236c │ │ @ instruction: 0xfffe3ac3 │ │ @ instruction: 0xfffe5887 │ │ @ instruction: 0xfffe452b │ │ - @ instruction: 0xfffdcbc9 │ │ + @ instruction: 0xfffdcbc0 │ │ @ instruction: 0xfffe3a7b │ │ @ instruction: 0xfffe583f │ │ @ instruction: 0xfffe44e3 │ │ - @ instruction: 0xfffdcb8d │ │ + @ instruction: 0xfffdcb84 │ │ @ instruction: 0xfffe3a41 │ │ @ instruction: 0xfffe5805 │ │ @ instruction: 0xfffe44a9 │ │ - @ instruction: 0xfffdcb53 │ │ + @ instruction: 0xfffdcb4a │ │ @ instruction: 0xfffe3a07 │ │ @ instruction: 0xfffe57cb │ │ @ instruction: 0xfffe446f │ │ - @ instruction: 0xfffdcb19 │ │ + @ instruction: 0xfffdcb10 │ │ @ instruction: 0xfffe39cb │ │ @ instruction: 0xfffe578f │ │ @ instruction: 0xfffe4433 │ │ - @ instruction: 0xfffdcadd │ │ + @ instruction: 0xfffdcad4 │ │ @ instruction: 0xfffe3991 │ │ @ instruction: 0xfffe5755 │ │ ldrbtmi r4, [r9], #-2497 @ 0xfffff63f │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @ instruction: 0xf952f005 │ │ vld2.8 {d18-d19}, [lr], r0 │ │ blvs c6e72c │ │ @@ -22378,62 +22378,62 @@ │ │ rsbseq r0, r5, fp │ │ ldrbtmi r4, [r9], #-2356 @ 0xfffff6cc │ │ ldmdbmi r4!, {r1, r2, r3, r5, r6, sp, lr, pc} │ │ rsb r4, fp, r9, ror r4 │ │ ldrbtmi r4, [r9], #-2355 @ 0xfffff6cd │ │ svclt 0x0000e068 │ │ @ instruction: 0xfffe4367 │ │ - @ instruction: 0xfffdca11 │ │ + @ instruction: 0xfffdca08 │ │ @ instruction: 0xfffe38c5 │ │ @ instruction: 0xfffe5689 │ │ @ instruction: 0xfffe432d │ │ - @ instruction: 0xfffdc9d7 │ │ + @ instruction: 0xfffdc9ce │ │ @ instruction: 0xfffe3889 │ │ @ instruction: 0xfffe564d │ │ @ instruction: 0xfffe42f1 │ │ @ instruction: 0xfffe3877 │ │ @ instruction: 0xfffe563b │ │ @ instruction: 0xfffe42df │ │ @ instruction: 0xfffe3865 │ │ @ instruction: 0xfffe5627 │ │ @ instruction: 0xfffe42c9 │ │ @ instruction: 0xfffe384d │ │ @ instruction: 0xfffe5611 │ │ @ instruction: 0xfffe42b5 │ │ - @ instruction: 0xfffdc95f │ │ + @ instruction: 0xfffdc956 │ │ @ instruction: 0xfffe3811 │ │ @ instruction: 0xfffe55d5 │ │ @ instruction: 0xfffe4279 │ │ - @ instruction: 0xfffdc913 │ │ - @ instruction: 0xfffdc8f7 │ │ + @ instruction: 0xfffdc90a │ │ + @ instruction: 0xfffdc8ee │ │ @ instruction: 0xfffe37a9 │ │ @ instruction: 0xfffe556d │ │ @ instruction: 0xfffe4211 │ │ - @ instruction: 0xfffdc8bb │ │ + @ instruction: 0xfffdc8b2 │ │ @ instruction: 0xfffe376d │ │ @ instruction: 0xfffe5531 │ │ @ instruction: 0xfffe41d5 │ │ @ instruction: 0xfffe375b │ │ @ instruction: 0xfffe551f │ │ @ instruction: 0xfffe41c3 │ │ - @ instruction: 0xfffdc86d │ │ + @ instruction: 0xfffdc864 │ │ @ instruction: 0xfffe3721 │ │ @ instruction: 0xfffe54e5 │ │ @ instruction: 0xfffe4189 │ │ - @ instruction: 0xfffdc82b │ │ - @ instruction: 0xfffdc823 │ │ + @ instruction: 0xfffdc822 │ │ + @ instruction: 0xfffdc81a │ │ @ instruction: 0xfffdfd92 │ │ @ instruction: 0xfffe35a3 │ │ @ instruction: 0xfffe367f │ │ @ instruction: 0xfffe5443 │ │ @ instruction: 0xfffe40e7 │ │ @ instruction: 0xfffd8f69 │ │ @ instruction: 0xfffe1edc │ │ - @ instruction: 0xfffd6419 │ │ - @ instruction: 0xfffdc745 │ │ + @ instruction: 0xfffd640d │ │ + @ instruction: 0xfffdc73c │ │ @ instruction: 0xfffe35f9 │ │ @ instruction: 0xfffe53bd │ │ ldrbtmi r4, [r9], #-2506 @ 0xfffff636 │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @ instruction: 0xff68f004 │ │ vld2.8 {d18-d19}, [lr], r0 │ │ ldmibvs r0!, {r3, r4, r6, r8, r9, fp, sp, pc} │ │ @@ -22635,50 +22635,50 @@ │ │ vqsub.s8 q4, , │ │ ldm r1, {r2, r3, r8}^ │ │ svclt 0x0000f010 │ │ @ instruction: 0xfffe3f93 │ │ ldrsbeq r0, [r9], #-125 @ 0xffffff83 │ │ sbceq r0, r3, #192, 4 │ │ svclt 0x000002c6 │ │ - @ instruction: 0xfffdc63d │ │ + @ instruction: 0xfffdc634 │ │ @ instruction: 0xfffe34f1 │ │ @ instruction: 0xfffe52b5 │ │ @ instruction: 0xfffe3f59 │ │ @ instruction: 0xfffddbbb │ │ @ instruction: 0xfffe3f1b │ │ @ instruction: 0xfffdfb75 │ │ @ instruction: 0xfffddba1 │ │ @ instruction: 0xfffd8d8b │ │ @ instruction: 0xfffe1cfe │ │ - @ instruction: 0xfffd623b │ │ - @ instruction: 0xfffdc567 │ │ + @ instruction: 0xfffd622f │ │ + @ instruction: 0xfffdc55e │ │ @ instruction: 0xfffe341b │ │ @ instruction: 0xfffe51df │ │ @ instruction: 0xfffe3e83 │ │ - @ instruction: 0xfffdc52d │ │ + @ instruction: 0xfffdc524 │ │ @ instruction: 0xfffe33df │ │ @ instruction: 0xfffe51a3 │ │ @ instruction: 0xfffe3e47 │ │ - @ instruction: 0xfffdc4e9 │ │ + @ instruction: 0xfffdc4e0 │ │ @ instruction: 0xfffe339b │ │ @ instruction: 0xfffe515f │ │ @ instruction: 0xfffe3e03 │ │ - @ instruction: 0xfffdc4ad │ │ + @ instruction: 0xfffdc4a4 │ │ @ instruction: 0xfffe3361 │ │ @ instruction: 0xfffe5125 │ │ @ instruction: 0xfffe3dc9 │ │ @ instruction: 0xfffdda2b │ │ @ instruction: 0xfffe3d8b │ │ @ instruction: 0xfffdf9e5 │ │ @ instruction: 0xfffdda11 │ │ - @ instruction: 0xfffd4a8d │ │ + @ instruction: 0xfffd4a81 │ │ @ instruction: 0xfffd8064 │ │ @ instruction: 0xfffde396 │ │ - @ instruction: 0xfffd6075 │ │ - @ instruction: 0xfffdc385 │ │ + @ instruction: 0xfffd6069 │ │ + @ instruction: 0xfffdc37c │ │ @ instruction: 0xfffe1aca │ │ @ instruction: 0xfffe3223 │ │ @ instruction: 0xfffe4fe7 │ │ @ instruction: 0xfffe3c8b │ │ ldrbtmi r4, [r9], #-2504 @ 0xfffff638 │ │ stmibmi r8, {r0, r1, r3, r5, r6, r9, sp, lr, pc}^ │ │ @ instruction: 0xf0004479 │ │ @@ -22876,66 +22876,66 @@ │ │ @ instruction: 0x06f506f2 │ │ ldmdbmi r8!, {r3, r4, r5, r6, r7, r9, sl} │ │ @ instruction: 0xf0014479 │ │ ldmdbmi r7!, {r0, r1, r4, r5, fp, ip, sp, pc} │ │ rsbs r4, r1, r9, ror r4 │ │ ldrbtmi r4, [r9], #-2358 @ 0xfffff6ca │ │ svclt 0x0000e06e │ │ - @ instruction: 0xfffdc289 │ │ + @ instruction: 0xfffdc280 │ │ @ instruction: 0xfffe313d │ │ @ instruction: 0xfffe4eff │ │ @ instruction: 0xfffe3ba1 │ │ - @ instruction: 0xfffdc259 │ │ + @ instruction: 0xfffdc250 │ │ @ instruction: 0xfffe310d │ │ @ instruction: 0xfffe4ecf │ │ @ instruction: 0xfffe3b71 │ │ @ instruction: 0xfffe30f5 │ │ @ instruction: 0xfffe4eb9 │ │ @ instruction: 0xfffe3b5d │ │ - @ instruction: 0xfffdc207 │ │ + @ instruction: 0xfffdc1fe │ │ @ instruction: 0xfffe30bb │ │ @ instruction: 0xfffe4e7f │ │ @ instruction: 0xfffe3b23 │ │ - @ instruction: 0xfffdc1cd │ │ + @ instruction: 0xfffdc1c4 │ │ @ instruction: 0xfffe3081 │ │ @ instruction: 0xfffe4e45 │ │ @ instruction: 0xfffe3ae9 │ │ - @ instruction: 0xfffdc193 │ │ + @ instruction: 0xfffdc18a │ │ @ instruction: 0xfffe3047 │ │ @ instruction: 0xfffe4e0b │ │ @ instruction: 0xfffe3aaf │ │ - @ instruction: 0xfffdc14d │ │ + @ instruction: 0xfffdc144 │ │ @ instruction: 0xfffe2fff │ │ @ instruction: 0xfffe4dc3 │ │ @ instruction: 0xfffe3a67 │ │ @ instruction: 0xfffe2fed │ │ @ instruction: 0xfffe4db1 │ │ @ instruction: 0xfffe3a55 │ │ - @ instruction: 0xfffdc0ff │ │ + @ instruction: 0xfffdc0f6 │ │ @ instruction: 0xfffe2fb3 │ │ @ instruction: 0xfffe4d77 │ │ @ instruction: 0xfffe3a1b │ │ @ instruction: 0xfffe2fa1 │ │ @ instruction: 0xfffe4d63 │ │ @ instruction: 0xfffe3a05 │ │ @ instruction: 0xfffe2f89 │ │ @ instruction: 0xfffe4d4d │ │ @ instruction: 0xfffe39f1 │ │ - @ instruction: 0xfffdc08f │ │ + @ instruction: 0xfffdc086 │ │ @ instruction: 0xfffe2f41 │ │ @ instruction: 0xfffe4d05 │ │ @ instruction: 0xfffe39a9 │ │ - @ instruction: 0xfffdc053 │ │ + @ instruction: 0xfffdc04a │ │ @ instruction: 0xfffe2f03 │ │ @ instruction: 0xfffe2ef1 │ │ - @ instruction: 0xfffdcc52 │ │ + @ instruction: 0xfffdcc49 │ │ @ instruction: 0xfffd7c4e │ │ @ instruction: 0xfffddf80 │ │ - @ instruction: 0xfffd5c5f │ │ - @ instruction: 0xfffdbf7b │ │ + @ instruction: 0xfffd5c53 │ │ + @ instruction: 0xfffdbf72 │ │ @ instruction: 0xfffe2e2d │ │ @ instruction: 0xfffe4bf1 │ │ ldrbtmi r4, [r9], #-2502 @ 0xfffff63a │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ blx 1f7fdda │ │ @ instruction: 0xf4752800 │ │ ldmibvs r0!, {r1, r3, r6, r7, r8, r9, sl, fp, sp, pc} │ │ @@ -23130,57 +23130,57 @@ │ │ @ instruction: 0xf9fef004 │ │ @ instruction: 0xf4712800 │ │ ldr sl, [lr, -lr, lsr #30] │ │ ldrbtmi r4, [r9], #-2351 @ 0xfffff6d1 │ │ stmdbmi pc!, {r1, r5, r6, sp, lr, pc} @ │ │ subs r4, pc, r9, ror r4 @ │ │ @ instruction: 0xfffe37bb │ │ - @ instruction: 0xfffdbe65 │ │ + @ instruction: 0xfffdbe5c │ │ @ instruction: 0xfffe2d19 │ │ @ instruction: 0xfffe4add │ │ @ instruction: 0xfffe3781 │ │ - @ instruction: 0xfffdbe23 │ │ + @ instruction: 0xfffdbe1a │ │ @ instruction: 0xfffe2cd7 │ │ @ instruction: 0xfffe4a9b │ │ @ instruction: 0xfffe373f │ │ - @ instruction: 0xfffdbde9 │ │ + @ instruction: 0xfffdbde0 │ │ @ instruction: 0xfffe2c9b │ │ @ instruction: 0xfffe4a5f │ │ @ instruction: 0xfffe3703 │ │ @ instruction: 0xfffe085e │ │ @ instruction: 0xfffe2c75 │ │ @ instruction: 0xfffe4a39 │ │ @ instruction: 0xfffe36dd │ │ - @ instruction: 0xfffdbd87 │ │ + @ instruction: 0xfffdbd7e │ │ @ instruction: 0xfffe2c39 │ │ @ instruction: 0xfffe49fd │ │ @ instruction: 0xfffe36a1 │ │ @ instruction: 0xfffdf2da │ │ @ instruction: 0xfffd7982 │ │ @ instruction: 0xfffddcb4 │ │ - @ instruction: 0xfffd5993 │ │ - @ instruction: 0xfffdbca3 │ │ + @ instruction: 0xfffd5987 │ │ + @ instruction: 0xfffdbc9a │ │ @ instruction: 0xfffe35c9 │ │ @ instruction: 0xfffe2b4f │ │ @ instruction: 0xfffe4913 │ │ @ instruction: 0xfffe35b7 │ │ - @ instruction: 0xfffdbc59 │ │ + @ instruction: 0xfffdbc50 │ │ @ instruction: 0xfffe2b0d │ │ @ instruction: 0xfffe48d1 │ │ @ instruction: 0xfffe3575 │ │ - @ instruction: 0xfffdbc1f │ │ - @ instruction: 0xfffdbc05 │ │ - @ instruction: 0xfffdbbeb │ │ + @ instruction: 0xfffdbc16 │ │ + @ instruction: 0xfffdbbfc │ │ + @ instruction: 0xfffdbbe2 │ │ @ instruction: 0xfffe2a9f │ │ @ instruction: 0xfffe4861 │ │ @ instruction: 0xfffe3503 │ │ @ instruction: 0xfffe2a87 │ │ @ instruction: 0xfffe484b │ │ @ instruction: 0xfffe34ef │ │ - @ instruction: 0xfffdbb99 │ │ + @ instruction: 0xfffdbb90 │ │ @ instruction: 0xfffe12de │ │ @ instruction: 0xfffe2a37 │ │ @ instruction: 0xfffe47fb │ │ ldrbtmi r4, [r9], #-2504 @ 0xfffff638 │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @ instruction: 0xf990f004 │ │ vld2.8 {d18-d19}, [sp], r0 │ │ @@ -23378,41 +23378,41 @@ │ │ ldrbtmi r4, [r9], #-2366 @ 0xfffff6c2 │ │ ldmdbmi lr!, {r0, r3, r9, sp, lr, pc} │ │ add r4, r1, r9, ror r4 │ │ ldrbtmi r4, [r9], #-2365 @ 0xfffff6c3 │ │ ldmdbmi sp!, {r1, r2, r3, r4, r5, r6, sp, lr, pc} │ │ rsbs r4, fp, r9, ror r4 │ │ @ instruction: 0xfffe33e3 │ │ - @ instruction: 0xfffdba8d │ │ + @ instruction: 0xfffdba84 │ │ @ instruction: 0xfffe2941 │ │ @ instruction: 0xfffe4705 │ │ @ instruction: 0xfffe33a9 │ │ @ instruction: 0xfffe11c2 │ │ @ instruction: 0xfffe2919 │ │ @ instruction: 0xfffe46dd │ │ @ instruction: 0xfffe3381 │ │ @ instruction: 0xfffe2907 │ │ @ instruction: 0xfffe46cb │ │ @ instruction: 0xfffe336f │ │ - @ instruction: 0xfffdba19 │ │ + @ instruction: 0xfffdba10 │ │ @ instruction: 0xfffe28cd │ │ @ instruction: 0xfffe4691 │ │ @ instruction: 0xfffe3335 │ │ @ instruction: 0xfffe332f │ │ @ instruction: 0xfffd765c │ │ @ instruction: 0xfffdd98e │ │ - @ instruction: 0xfffd566d │ │ - @ instruction: 0xfffdb989 │ │ + @ instruction: 0xfffd5661 │ │ + @ instruction: 0xfffdb980 │ │ @ instruction: 0xfffe283b │ │ @ instruction: 0xfffe45fd │ │ @ instruction: 0xfffe329f │ │ @ instruction: 0xfffe2823 │ │ @ instruction: 0xfffe45e7 │ │ @ instruction: 0xfffe328b │ │ - @ instruction: 0xfffdb929 │ │ + @ instruction: 0xfffdb920 │ │ @ instruction: 0xfffe27dd │ │ @ instruction: 0xfffe45a1 │ │ @ instruction: 0xfffe3245 │ │ @ instruction: 0xfffe03a0 │ │ @ instruction: 0xfffe27a9 │ │ @ instruction: 0xfffe456d │ │ @ instruction: 0xfffe3211 │ │ @@ -23429,21 +23429,21 @@ │ │ @ instruction: 0xfffe271d │ │ @ instruction: 0xfffe44df │ │ @ instruction: 0xfffe3181 │ │ @ instruction: 0xfffe2705 │ │ @ instruction: 0xfffe44c9 │ │ @ instruction: 0xfffe316d │ │ @ instruction: 0xfffd1061 │ │ - @ instruction: 0xfffd54bf │ │ - @ instruction: 0xfffdb7eb │ │ + @ instruction: 0xfffd54b3 │ │ + @ instruction: 0xfffdb7e2 │ │ @ instruction: 0xfffe269f │ │ @ instruction: 0xfffe4463 │ │ @ instruction: 0xfffe3107 │ │ - @ instruction: 0xfffdb7a9 │ │ - @ instruction: 0xfffdb7a3 │ │ + @ instruction: 0xfffdb7a0 │ │ + @ instruction: 0xfffdb79a │ │ @ instruction: 0xfffe2657 │ │ @ instruction: 0xfffe441b │ │ ldrbtmi r4, [r9], #-2515 @ 0xfffff62d │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @ instruction: 0xff84f003 │ │ vld2.8 {d18-d19}, [sp], r0 │ │ ldmibmi r0, {r2, r4, r5, r6, r8, r9, fp, sp, pc}^ │ │ @@ -23653,53 +23653,53 @@ │ │ stmdacs r0, {r0, r3, r5, r6, r7, r8, sl, fp, ip, sp, lr, pc} │ │ stmdavs r0!, {r4, r5, r6, ip, lr, pc} │ │ @ instruction: 0xf7ed602e │ │ svclt 0x0000ba50 │ │ @ instruction: 0xfffe2fcb │ │ @ instruction: 0xfffd7e4d │ │ @ instruction: 0xfffe0dc0 │ │ - @ instruction: 0xfffd5303 │ │ - @ instruction: 0xfffdb62f │ │ + @ instruction: 0xfffd52f7 │ │ + @ instruction: 0xfffdb626 │ │ @ instruction: 0xfffe24e3 │ │ @ instruction: 0xfffe42a7 │ │ @ instruction: 0xfffe2f4b │ │ - @ instruction: 0xfffdb5f5 │ │ + @ instruction: 0xfffdb5ec │ │ @ instruction: 0xfffe0d3c │ │ @ instruction: 0xfffe2493 │ │ @ instruction: 0xfffe4257 │ │ @ instruction: 0xfffe2efb │ │ - @ instruction: 0xfffdb5a5 │ │ + @ instruction: 0xfffdb59c │ │ @ instruction: 0xfffe2459 │ │ @ instruction: 0xfffe421d │ │ @ instruction: 0xfffe2ec1 │ │ - @ instruction: 0xfffdc1ae │ │ + @ instruction: 0xfffdc1a5 │ │ @ instruction: 0xfffd71ac │ │ @ instruction: 0xfffdd4de │ │ - @ instruction: 0xfffd51bd │ │ - @ instruction: 0xfffdb4d9 │ │ + @ instruction: 0xfffd51b1 │ │ + @ instruction: 0xfffdb4d0 │ │ @ instruction: 0xfffe0c1e │ │ @ instruction: 0xfffe2377 │ │ @ instruction: 0xfffe4139 │ │ @ instruction: 0xfffe2ddb │ │ @ instruction: 0xfffe235f │ │ @ instruction: 0xfffe4123 │ │ @ instruction: 0xfffe2dc7 │ │ - @ instruction: 0xfffdb493 │ │ + @ instruction: 0xfffdb48a │ │ @ instruction: 0xfffe2347 │ │ @ instruction: 0xfffe410b │ │ @ instruction: 0xfffe2daf │ │ - @ instruction: 0xfffdc07b │ │ + @ instruction: 0xfffdc072 │ │ @ instruction: 0xfffe0ba8 │ │ - @ instruction: 0xfffd50eb │ │ - @ instruction: 0xfffdb417 │ │ + @ instruction: 0xfffd50df │ │ + @ instruction: 0xfffdb40e │ │ @ instruction: 0xfffe22cb │ │ @ instruction: 0xfffe408f │ │ @ instruction: 0xfffe2d33 │ │ @ instruction: 0xfffdfe8a │ │ - @ instruction: 0xfffdb3dd │ │ + @ instruction: 0xfffdb3d4 │ │ @ instruction: 0xfffe2291 │ │ @ instruction: 0xfffe4055 │ │ @ instruction: 0xfffe2cf9 │ │ @ instruction: 0xfffe227f │ │ @ instruction: 0xfffe4043 │ │ @ instruction: 0xfffe2ce7 │ │ @ instruction: 0xfffdfe42 │ │ @@ -23881,52 +23881,52 @@ │ │ @ instruction: 0xfffe3ecb │ │ @ instruction: 0xfffe2b6f │ │ @ instruction: 0xfffe20f5 │ │ @ instruction: 0xfffe3eb9 │ │ @ instruction: 0xfffe2b5d │ │ @ instruction: 0xfffd79df │ │ @ instruction: 0xfffe0956 │ │ - @ instruction: 0xfffd4e99 │ │ - @ instruction: 0xfffdb1c5 │ │ + @ instruction: 0xfffd4e8d │ │ + @ instruction: 0xfffdb1bc │ │ @ instruction: 0xfffe3e43 │ │ - @ instruction: 0xfffdb1a5 │ │ + @ instruction: 0xfffdb19c │ │ @ instruction: 0xfffe2059 │ │ @ instruction: 0xfffe3e1d │ │ @ instruction: 0xfffe2ac1 │ │ - @ instruction: 0xfffdb177 │ │ - @ instruction: 0xfffdb15d │ │ + @ instruction: 0xfffdb16e │ │ + @ instruction: 0xfffdb154 │ │ @ instruction: 0xfffe200d │ │ @ instruction: 0xfffe3dcd │ │ @ instruction: 0xfffe2a6d │ │ @ instruction: 0xfffe1ff3 │ │ - @ instruction: 0xfffdb11f │ │ + @ instruction: 0xfffdb116 │ │ @ instruction: 0xfffe1fd3 │ │ @ instruction: 0xfffe3d97 │ │ @ instruction: 0xfffe2a3b │ │ @ instruction: 0xfffe1fc1 │ │ @ instruction: 0xfffe3d85 │ │ @ instruction: 0xfffe2a29 │ │ - @ instruction: 0xfffdb0d3 │ │ + @ instruction: 0xfffdb0ca │ │ @ instruction: 0xfffe1f87 │ │ @ instruction: 0xfffe3d4b │ │ @ instruction: 0xfffe29ef │ │ - @ instruction: 0xfffdb099 │ │ + @ instruction: 0xfffdb090 │ │ @ instruction: 0xfffe3d17 │ │ - @ instruction: 0xfffdb079 │ │ + @ instruction: 0xfffdb070 │ │ @ instruction: 0xfffe1f2d │ │ @ instruction: 0xfffe3cf1 │ │ @ instruction: 0xfffe2995 │ │ @ instruction: 0xfffe1f1b │ │ @ instruction: 0xfffe3cdf │ │ @ instruction: 0xfffe2983 │ │ - @ instruction: 0xfffdb02d │ │ + @ instruction: 0xfffdb024 │ │ @ instruction: 0xfffe1ee1 │ │ @ instruction: 0xfffe3ca5 │ │ @ instruction: 0xfffe2949 │ │ - @ instruction: 0xfffdaff3 │ │ + @ instruction: 0xfffdafea │ │ @ instruction: 0xfffe1ea7 │ │ @ instruction: 0xfffe3c6b │ │ ldrbtmi r4, [r9], #-2521 @ 0xfffff627 │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ blx ff000d52 │ │ vld2.8 {d18-d19}, [sp], r0 │ │ ldmibmi r6, {r5, r7, fp, sp, pc}^ │ │ @@ -24144,49 +24144,49 @@ │ │ stmdbmi sl!, {r3, r4, r6, sp, lr, pc} │ │ subs r4, r5, r9, ror r4 │ │ @ instruction: 0xfffe283f │ │ @ instruction: 0xfffe5876 │ │ @ instruction: 0xfffe0634 │ │ @ instruction: 0xfffd6b18 │ │ @ instruction: 0xfffdce4a │ │ - @ instruction: 0xfffd4b29 │ │ - @ instruction: 0xfffdae45 │ │ + @ instruction: 0xfffd4b1d │ │ + @ instruction: 0xfffdae3c │ │ @ instruction: 0xfffe1cf9 │ │ @ instruction: 0xfffe3abd │ │ @ instruction: 0xfffe2761 │ │ @ instruction: 0xfffe1ce7 │ │ @ instruction: 0xfffe3aab │ │ @ instruction: 0xfffe2747 │ │ @ instruction: 0xfffe0fce │ │ @ instruction: 0xfffe1c9f │ │ @ instruction: 0xfffe3a63 │ │ @ instruction: 0xfffe2707 │ │ @ instruction: 0xfffe0f8e │ │ @ instruction: 0xfffe04fc │ │ @ instruction: 0xfffd69e0 │ │ @ instruction: 0xfffdcd12 │ │ - @ instruction: 0xfffd49f1 │ │ - @ instruction: 0xfffdad0d │ │ + @ instruction: 0xfffd49e5 │ │ + @ instruction: 0xfffdad04 │ │ @ instruction: 0xfffe1bc1 │ │ @ instruction: 0xfffe3985 │ │ @ instruction: 0xfffe2629 │ │ - @ instruction: 0xfffdacd3 │ │ + @ instruction: 0xfffdacca │ │ @ instruction: 0xfffe1b87 │ │ @ instruction: 0xfffe394b │ │ @ instruction: 0xfffe25ef │ │ - @ instruction: 0xfffdac99 │ │ + @ instruction: 0xfffdac90 │ │ @ instruction: 0xfffe1b4d │ │ @ instruction: 0xfffe3911 │ │ @ instruction: 0xfffe25b5 │ │ @ instruction: 0xfffe1b33 │ │ @ instruction: 0xfffe03aa │ │ @ instruction: 0xfffd688e │ │ @ instruction: 0xfffdcbc0 │ │ - @ instruction: 0xfffd489f │ │ - @ instruction: 0xfffdabbb │ │ + @ instruction: 0xfffd4893 │ │ + @ instruction: 0xfffdabb2 │ │ @ instruction: 0xfffe1a6f │ │ @ instruction: 0xfffe3833 │ │ ldrbtmi r4, [r9], #-2493 @ 0xfffff643 │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @ instruction: 0xf9b6f003 │ │ vld2.8 {d18-d19}, [ip], r0 │ │ ldmibvs r0!, {r1, r3, r4, r5, r6, r7, r8, fp, sp, pc}^ │ │ @@ -24372,60 +24372,60 @@ │ │ rsbhi pc, r3, #0, 4 │ │ @ instruction: 0xf010e8df │ │ mvnseq r0, r4 │ │ subseq r0, r8, #-2147483586 @ 0x8000003e │ │ ldrbtmi r4, [r9], #-2351 @ 0xfffff6d1 │ │ svclt 0x0000e252 │ │ @ instruction: 0xfffe242f │ │ - @ instruction: 0xfffdaad9 │ │ + @ instruction: 0xfffdaad0 │ │ @ instruction: 0xfffe198d │ │ @ instruction: 0xfffe3751 │ │ @ instruction: 0xfffe23f5 │ │ - @ instruction: 0xfffdaa9f │ │ + @ instruction: 0xfffdaa96 │ │ @ instruction: 0xfffe371d │ │ - @ instruction: 0xfffdaa7f │ │ + @ instruction: 0xfffdaa76 │ │ @ instruction: 0xfffe1933 │ │ @ instruction: 0xfffe36f7 │ │ @ instruction: 0xfffe239b │ │ @ instruction: 0xfffe01ae │ │ @ instruction: 0xfffe18fb │ │ - @ instruction: 0xfffdaa27 │ │ + @ instruction: 0xfffdaa1e │ │ @ instruction: 0xfffe18db │ │ @ instruction: 0xfffe369f │ │ @ instruction: 0xfffe2343 │ │ @ instruction: 0xfffe18c9 │ │ @ instruction: 0xfffe368d │ │ @ instruction: 0xfffe2331 │ │ - @ instruction: 0xfffda9db │ │ + @ instruction: 0xfffda9d2 │ │ @ instruction: 0xfffe188f │ │ @ instruction: 0xfffe3653 │ │ @ instruction: 0xfffe22f7 │ │ - @ instruction: 0xfffda9a1 │ │ + @ instruction: 0xfffda998 │ │ @ instruction: 0xfffe361f │ │ - @ instruction: 0xfffda981 │ │ + @ instruction: 0xfffda978 │ │ @ instruction: 0xfffe1835 │ │ @ instruction: 0xfffe35f9 │ │ @ instruction: 0xfffe229d │ │ @ instruction: 0xfffe1823 │ │ @ instruction: 0xfffe35e7 │ │ @ instruction: 0xfffe228b │ │ - @ instruction: 0xfffda935 │ │ + @ instruction: 0xfffda92c │ │ @ instruction: 0xfffe17e9 │ │ @ instruction: 0xfffe35ad │ │ @ instruction: 0xfffe2251 │ │ - @ instruction: 0xfffda8fb │ │ + @ instruction: 0xfffda8f2 │ │ @ instruction: 0xfffe17af │ │ @ instruction: 0xfffe3573 │ │ @ instruction: 0xfffe2217 │ │ - @ instruction: 0xfffdb504 │ │ + @ instruction: 0xfffdb4fb │ │ @ instruction: 0xfffe000c │ │ @ instruction: 0xfffd64f0 │ │ @ instruction: 0xfffdc822 │ │ - @ instruction: 0xfffd4501 │ │ - @ instruction: 0xfffda811 │ │ + @ instruction: 0xfffd44f5 │ │ + @ instruction: 0xfffda808 │ │ @ instruction: 0xf04f6800 │ │ stmdavs r1, {r0, r1, r2, r3, r4, r5, r6, r7, r9, ip, sp} │ │ @ instruction: 0xf0024628 │ │ stmdacs r0, {r0, r1, r3, r4, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ cfstrsge mvf15, [fp, #-448] @ 0xfffffe40 │ │ bicslt r6, r0, r0, ror ip │ │ strtmi r4, [r8], -r5, asr #19 │ │ @@ -24624,52 +24624,52 @@ │ │ ldrbtmi r4, [r9], #-2350 @ 0xfffff6d2 │ │ stmdbmi lr!, {r1, r5, r6, sp, lr, pc} │ │ subs r4, pc, r9, ror r4 @ │ │ ldrbtmi r4, [r9], #-2349 @ 0xfffff6d3 │ │ svclt 0x0000e05c │ │ @ instruction: 0xfffd639a │ │ @ instruction: 0xfffdc6cc │ │ - @ instruction: 0xfffd43ab │ │ - @ instruction: 0xfffda6bb │ │ + @ instruction: 0xfffd439f │ │ + @ instruction: 0xfffda6b2 │ │ @ instruction: 0xfffe156f │ │ @ instruction: 0xfffe3333 │ │ @ instruction: 0xfffe1fd7 │ │ - @ instruction: 0xfffd374b │ │ + @ instruction: 0xfffd373f │ │ @ instruction: 0xfffdfdcc │ │ @ instruction: 0xfffd62b0 │ │ @ instruction: 0xfffdc5e2 │ │ - @ instruction: 0xfffd42c1 │ │ - @ instruction: 0xfffda5dd │ │ + @ instruction: 0xfffd42b5 │ │ + @ instruction: 0xfffda5d4 │ │ @ instruction: 0xfffe1491 │ │ @ instruction: 0xfffe3255 │ │ @ instruction: 0xfffe1ef9 │ │ @ instruction: 0xfffdf054 │ │ @ instruction: 0xfffe146d │ │ @ instruction: 0xfffe3231 │ │ @ instruction: 0xfffe1ed5 │ │ @ instruction: 0xfffdf030 │ │ @ instruction: 0xfffe1447 │ │ @ instruction: 0xfffe320b │ │ @ instruction: 0xfffe1eaf │ │ - @ instruction: 0xfffdb19c │ │ + @ instruction: 0xfffdb193 │ │ @ instruction: 0xfffdfca4 │ │ @ instruction: 0xfffd6188 │ │ @ instruction: 0xfffdc4ba │ │ - @ instruction: 0xfffd4199 │ │ - @ instruction: 0xfffda4a9 │ │ + @ instruction: 0xfffd418d │ │ + @ instruction: 0xfffda4a0 │ │ @ instruction: 0xfffe135d │ │ @ instruction: 0xfffe3121 │ │ @ instruction: 0xfffe1dc5 │ │ @ instruction: 0xfffdef20 │ │ @ instruction: 0xfffe1329 │ │ @ instruction: 0xfffe30ed │ │ @ instruction: 0xfffe1d91 │ │ @ instruction: 0xfffdeeec │ │ @ instruction: 0xfffe1d77 │ │ - @ instruction: 0xfffda443 │ │ + @ instruction: 0xfffda43a │ │ @ instruction: 0xfffe12f7 │ │ @ instruction: 0xfffe30bb │ │ @ instruction: 0xfffe1d5f │ │ @ instruction: 0xfffe12e5 │ │ @ instruction: 0xfffe30a9 │ │ ldrbtmi r4, [r9], #-2503 @ 0xfffff639 │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @@ -24872,51 +24872,51 @@ │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ rsb r4, r4, r9, ror r4 │ │ @ instruction: 0xfffe1c97 │ │ @ instruction: 0xfffe4cce │ │ @ instruction: 0xfffdfa8c │ │ @ instruction: 0xfffd5f70 │ │ @ instruction: 0xfffdc2a2 │ │ - @ instruction: 0xfffd3f81 │ │ - @ instruction: 0xfffda291 │ │ - @ instruction: 0xfffda271 │ │ - @ instruction: 0xfffda253 │ │ + @ instruction: 0xfffd3f75 │ │ + @ instruction: 0xfffda288 │ │ + @ instruction: 0xfffda268 │ │ + @ instruction: 0xfffda24a │ │ @ instruction: 0xfffe1103 │ │ @ instruction: 0xfffe2ec3 │ │ @ instruction: 0xfffe1b63 │ │ @ instruction: 0xfffe10e9 │ │ - @ instruction: 0xfffda215 │ │ + @ instruction: 0xfffda20c │ │ @ instruction: 0xfffe10c9 │ │ @ instruction: 0xfffe2e8d │ │ @ instruction: 0xfffe1b31 │ │ @ instruction: 0xfffe1b2b │ │ - @ instruction: 0xfffda1f7 │ │ + @ instruction: 0xfffda1ee │ │ @ instruction: 0xfffe10ab │ │ @ instruction: 0xfffe2e6f │ │ @ instruction: 0xfffe1b13 │ │ @ instruction: 0xfffe1099 │ │ @ instruction: 0xfffe2e5d │ │ @ instruction: 0xfffe1b01 │ │ @ instruction: 0xfffe107f │ │ @ instruction: 0xfffdf8f6 │ │ @ instruction: 0xfffd5dda │ │ @ instruction: 0xfffdc10c │ │ - @ instruction: 0xfffd3deb │ │ - @ instruction: 0xfffda0fb │ │ + @ instruction: 0xfffd3ddf │ │ + @ instruction: 0xfffda0f2 │ │ @ instruction: 0xfffe1a23 │ │ - @ instruction: 0xfffda0ef │ │ + @ instruction: 0xfffda0e6 │ │ @ instruction: 0xfffe0fa3 │ │ @ instruction: 0xfffe2d67 │ │ @ instruction: 0xfffe1a0b │ │ @ instruction: 0xfffe0f91 │ │ @ instruction: 0xfffe2d55 │ │ @ instruction: 0xfffe19f9 │ │ @ instruction: 0xfffd5125 │ │ - @ instruction: 0xfffd3d4b │ │ - @ instruction: 0xfffda077 │ │ + @ instruction: 0xfffd3d3f │ │ + @ instruction: 0xfffda06e │ │ @ instruction: 0xfffe0f27 │ │ @ instruction: 0xfffe2ce7 │ │ @ instruction: 0xfffe1987 │ │ @ instruction: 0xfffe0f09 │ │ strtmi r4, [r8], -r9, asr #19 │ │ ldrbtmi r2, [r9], #-513 @ 0xfffffdff │ │ stmibmi r8, {r0, r1, sp, lr, pc}^ │ │ @@ -25117,57 +25117,57 @@ │ │ biceq pc, r7, r0, lsl r0 @ │ │ tsteq fp, r5 │ │ @ instruction: 0x0121011e │ │ ldrbtmi r4, [r9], #-2349 @ 0xfffff6d3 │ │ svclt 0x0000e11a │ │ @ instruction: 0xfffe2c11 │ │ @ instruction: 0xfffe18b1 │ │ - @ instruction: 0xfffd3029 │ │ + @ instruction: 0xfffd301d │ │ @ instruction: 0xfffdf6aa │ │ @ instruction: 0xfffe0df7 │ │ @ instruction: 0xfffe2bbb │ │ @ instruction: 0xfffe185f │ │ @ instruction: 0xfffdd4a0 │ │ @ instruction: 0xfffdf654 │ │ @ instruction: 0xfffd5b38 │ │ @ instruction: 0xfffdbe6a │ │ - @ instruction: 0xfffd3b49 │ │ - @ instruction: 0xfffd9e69 │ │ + @ instruction: 0xfffd3b3d │ │ + @ instruction: 0xfffd9e60 │ │ @ instruction: 0xfffe1791 │ │ - @ instruction: 0xfffd9e5d │ │ + @ instruction: 0xfffd9e54 │ │ @ instruction: 0xfffe0d11 │ │ @ instruction: 0xfffe2ad5 │ │ @ instruction: 0xfffe1779 │ │ @ instruction: 0xfffe0cff │ │ @ instruction: 0xfffe2ac3 │ │ @ instruction: 0xfffe1767 │ │ @ instruction: 0xfffd4e93 │ │ - @ instruction: 0xfffd3ab9 │ │ - @ instruction: 0xfffd9de5 │ │ + @ instruction: 0xfffd3aad │ │ + @ instruction: 0xfffd9ddc │ │ @ instruction: 0xfffe0c99 │ │ @ instruction: 0xfffe2a5d │ │ @ instruction: 0xfffe1701 │ │ - @ instruction: 0xfffd9dab │ │ + @ instruction: 0xfffd9da2 │ │ @ instruction: 0xfffd59f2 │ │ @ instruction: 0xfffdbd24 │ │ - @ instruction: 0xfffd3a03 │ │ - @ instruction: 0xfffd9d13 │ │ + @ instruction: 0xfffd39f7 │ │ + @ instruction: 0xfffd9d0a │ │ @ instruction: 0xfffe2991 │ │ - @ instruction: 0xfffd9cf7 │ │ + @ instruction: 0xfffd9cee │ │ @ instruction: 0xfffe0bab │ │ @ instruction: 0xfffe296f │ │ @ instruction: 0xfffe1613 │ │ @ instruction: 0xfffe0b99 │ │ @ instruction: 0xfffe295d │ │ @ instruction: 0xfffe1601 │ │ - @ instruction: 0xfffd9cab │ │ + @ instruction: 0xfffd9ca2 │ │ @ instruction: 0xfffe0b5f │ │ @ instruction: 0xfffe2923 │ │ @ instruction: 0xfffe15c7 │ │ - @ instruction: 0xfffd9c71 │ │ + @ instruction: 0xfffd9c68 │ │ stmdacc r1, {r4, r5, r7, r8, fp, sp, lr} │ │ vadd.i8 d2, d0, d3 │ │ ldm pc, {r4, r5, r6, r7, pc}^ @ │ │ andeq pc, r4, r0, lsl r0 @ │ │ sbcseq r0, r1, ip, asr #1 │ │ ldmibmi r2!, {r1, r2, r4, r6, r7} │ │ andcs r4, r1, #40, 12 @ 0x2800000 │ │ @@ -25344,53 +25344,53 @@ │ │ cfldrsge mvf15, [r7, #428] @ 0x1ac │ │ strtmi r4, [r8], -pc, lsr #18 │ │ ldrbtmi r2, [r9], #-514 @ 0xfffffdfe │ │ @ instruction: 0xf8acf002 │ │ vld2.8 {d18-d19}, [fp], r0 │ │ @ instruction: 0xf7e9ad8e │ │ svclt 0x0000b943 │ │ - @ instruction: 0xfffd9b9b │ │ - @ instruction: 0xfffd9b81 │ │ + @ instruction: 0xfffd9b92 │ │ + @ instruction: 0xfffd9b78 │ │ @ instruction: 0xfffe0a31 │ │ @ instruction: 0xfffe27f1 │ │ @ instruction: 0xfffe1491 │ │ @ instruction: 0xfffe0a17 │ │ @ instruction: 0xfffe27db │ │ @ instruction: 0xfffe147f │ │ @ instruction: 0xfffdfd06 │ │ @ instruction: 0xfffdf274 │ │ @ instruction: 0xfffd5758 │ │ @ instruction: 0xfffdba8a │ │ - @ instruction: 0xfffd3769 │ │ - @ instruction: 0xfffd9a85 │ │ + @ instruction: 0xfffd375d │ │ + @ instruction: 0xfffd9a7c │ │ @ instruction: 0xfffe0939 │ │ @ instruction: 0xfffe26fd │ │ @ instruction: 0xfffe13a1 │ │ - @ instruction: 0xfffd9a4b │ │ + @ instruction: 0xfffd9a42 │ │ @ instruction: 0xfffe08ff │ │ @ instruction: 0xfffe26c3 │ │ @ instruction: 0xfffe1367 │ │ - @ instruction: 0xfffd9a15 │ │ + @ instruction: 0xfffd9a0c │ │ @ instruction: 0xfffe08c5 │ │ @ instruction: 0xfffe2685 │ │ @ instruction: 0xfffe1325 │ │ @ instruction: 0xfffe08a7 │ │ @ instruction: 0xfffe2667 │ │ @ instruction: 0xfffe1307 │ │ @ instruction: 0xfffdcf44 │ │ @ instruction: 0xfffdf0f8 │ │ @ instruction: 0xfffe260b │ │ - @ instruction: 0xfffd9969 │ │ + @ instruction: 0xfffd9960 │ │ @ instruction: 0xfffe0819 │ │ @ instruction: 0xfffe25d9 │ │ @ instruction: 0xfffe1279 │ │ @ instruction: 0xfffe07ff │ │ @ instruction: 0xfffe25c3 │ │ @ instruction: 0xfffe1267 │ │ - @ instruction: 0xfffd9911 │ │ + @ instruction: 0xfffd9908 │ │ @ instruction: 0xfffe07c5 │ │ @ instruction: 0xfffe2589 │ │ @ instruction: 0xfffe122d │ │ @ instruction: 0xfffde384 │ │ @ instruction: 0xf04f6800 │ │ stmdavs r1, {r0, r1, r2, r3, r4, r5, r6, r7, r9, ip, sp} │ │ @ instruction: 0xf0024628 │ │ @@ -25587,43 +25587,43 @@ │ │ @ instruction: 0xf47c2800 │ │ bvs 1c721b8 │ │ stmdbcs r7, {r0, r6, r7, fp, sp, lr} │ │ addshi pc, r9, r0, asr #32 │ │ adds r6, r7, r0, lsl #18 │ │ @ instruction: 0xfffd5476 │ │ @ instruction: 0xfffdb7a8 │ │ - @ instruction: 0xfffd3487 │ │ - @ instruction: 0xfffd979f │ │ + @ instruction: 0xfffd347b │ │ + @ instruction: 0xfffd9796 │ │ @ instruction: 0xfffe064f │ │ @ instruction: 0xfffe240f │ │ @ instruction: 0xfffe10af │ │ - @ instruction: 0xfffd2827 │ │ + @ instruction: 0xfffd281b │ │ @ instruction: 0xfffdeea8 │ │ @ instruction: 0xfffe05f7 │ │ @ instruction: 0xfffe23bb │ │ @ instruction: 0xfffe105f │ │ @ instruction: 0xfffde1ba │ │ - @ instruction: 0xfffd9701 │ │ - @ instruction: 0xfffd96e7 │ │ + @ instruction: 0xfffd96f8 │ │ + @ instruction: 0xfffd96de │ │ @ instruction: 0xfffe0597 │ │ @ instruction: 0xfffe2357 │ │ @ instruction: 0xfffe0ff7 │ │ @ instruction: 0xfffd5310 │ │ @ instruction: 0xfffdb642 │ │ - @ instruction: 0xfffd3321 │ │ - @ instruction: 0xfffd9641 │ │ + @ instruction: 0xfffd3315 │ │ + @ instruction: 0xfffd9638 │ │ @ instruction: 0xfffe04f1 │ │ @ instruction: 0xfffe22b1 │ │ @ instruction: 0xfffe0f51 │ │ @ instruction: 0xfffe04d3 │ │ @ instruction: 0xfffe2293 │ │ @ instruction: 0xfffe0f33 │ │ @ instruction: 0xfffdf7ba │ │ @ instruction: 0xfffe2255 │ │ - @ instruction: 0xfffd95b9 │ │ + @ instruction: 0xfffd95b0 │ │ @ instruction: 0xfffe0469 │ │ @ instruction: 0xfffe2229 │ │ @ instruction: 0xfffe0ec9 │ │ @ instruction: 0xfffdecdc │ │ @ instruction: 0xfffe0425 │ │ @ instruction: 0xfffe21e5 │ │ @ instruction: 0xfffe0e85 │ │ @@ -25831,48 +25831,48 @@ │ │ vadd.i8 d2, d0, d3 │ │ ldm pc, {r0, r2, r6, r7, pc}^ @ │ │ blge 102b00 │ │ stmdbmi r4!, {r1, r2, r3, r5, r7, r8, ip, sp, pc} │ │ adcs r4, r6, r9, ror r4 │ │ @ instruction: 0xfffd50be │ │ @ instruction: 0xfffdb3f0 │ │ - @ instruction: 0xfffd30cf │ │ - @ instruction: 0xfffd93e9 │ │ + @ instruction: 0xfffd30c3 │ │ + @ instruction: 0xfffd93e0 │ │ @ instruction: 0xfffd5030 │ │ @ instruction: 0xfffdb362 │ │ - @ instruction: 0xfffd3041 │ │ - @ instruction: 0xfffd9357 │ │ - @ instruction: 0xfffd933f │ │ - @ instruction: 0xfffd9329 │ │ + @ instruction: 0xfffd3035 │ │ + @ instruction: 0xfffd934e │ │ + @ instruction: 0xfffd9336 │ │ + @ instruction: 0xfffd9320 │ │ @ instruction: 0xfffe01dd │ │ @ instruction: 0xfffe1f9d │ │ @ instruction: 0xfffe0c25 │ │ @ instruction: 0xfffe0c11 │ │ - @ instruction: 0xfffd92d9 │ │ + @ instruction: 0xfffd92d0 │ │ @ instruction: 0xfffe0189 │ │ @ instruction: 0xfffe1f49 │ │ @ instruction: 0xfffe0be9 │ │ @ instruction: 0xfffe016b │ │ @ instruction: 0xfffe1f2b │ │ @ instruction: 0xfffe0bcb │ │ @ instruction: 0xfffdf456 │ │ @ instruction: 0xfffe0127 │ │ @ instruction: 0xfffe1eeb │ │ @ instruction: 0xfffe0b8f │ │ @ instruction: 0xfffe0115 │ │ @ instruction: 0xfffe1ed9 │ │ @ instruction: 0xfffe0b7d │ │ - @ instruction: 0xfffd22f1 │ │ + @ instruction: 0xfffd22e5 │ │ @ instruction: 0xfffde972 │ │ @ instruction: 0xfffd4e56 │ │ @ instruction: 0xfffdb188 │ │ - @ instruction: 0xfffd2e67 │ │ - @ instruction: 0xfffd9183 │ │ + @ instruction: 0xfffd2e5b │ │ + @ instruction: 0xfffd917a │ │ @ instruction: 0xfffde8c4 │ │ - @ instruction: 0xfffd9147 │ │ + @ instruction: 0xfffd913e │ │ stmdacs r3, {r0, fp, ip, sp} │ │ rsbshi pc, r2, r0, lsl #4 │ │ @ instruction: 0xf000e8df │ │ strbvs r6, [r4, -r2, lsl #2]! │ │ ldrbtmi r4, [r9], #-2501 @ 0xfffff63b │ │ stmibmi r5, {r0, r1, r5, r6, sp, lr, pc}^ │ │ rsb r4, r0, r9, ror r4 │ │ @@ -26067,53 +26067,53 @@ │ │ strtmi r4, [r8], -ip, lsr #18 │ │ ldrbtmi r2, [r9], #-513 @ 0xfffffdff │ │ stmdbmi fp!, {r1, r2, r3, r5, r7, sp, lr, pc} │ │ rsb r4, r1, r9, ror r4 │ │ ldrbtmi r4, [r9], #-2346 @ 0xfffff6d6 │ │ stmdbmi sl!, {r1, r2, r3, r4, r6, sp, lr, pc} │ │ subs r4, fp, r9, ror r4 │ │ - @ instruction: 0xfffd90a1 │ │ + @ instruction: 0xfffd9098 │ │ @ instruction: 0xfffdff55 │ │ @ instruction: 0xfffe1d19 │ │ @ instruction: 0xfffe09bd │ │ @ instruction: 0xfffd4cd6 │ │ @ instruction: 0xfffdb008 │ │ - @ instruction: 0xfffd2ce7 │ │ - @ instruction: 0xfffd8ffb │ │ + @ instruction: 0xfffd2cdb │ │ + @ instruction: 0xfffd8ff2 │ │ @ instruction: 0xfffdfeaf │ │ @ instruction: 0xfffe1c73 │ │ @ instruction: 0xfffe0917 │ │ @ instruction: 0xfffdfe9d │ │ @ instruction: 0xfffe1c61 │ │ @ instruction: 0xfffe0905 │ │ @ instruction: 0xfffdc53e │ │ @ instruction: 0xfffde6f2 │ │ @ instruction: 0xfffd4bd6 │ │ @ instruction: 0xfffdaf08 │ │ - @ instruction: 0xfffd2be7 │ │ - @ instruction: 0xfffd8f03 │ │ + @ instruction: 0xfffd2bdb │ │ + @ instruction: 0xfffd8efa │ │ @ instruction: 0xfffe0827 │ │ - @ instruction: 0xfffd8eef │ │ + @ instruction: 0xfffd8ee6 │ │ @ instruction: 0xfffdfd9f │ │ @ instruction: 0xfffe1b5f │ │ @ instruction: 0xfffe07ff │ │ @ instruction: 0xfffdfd81 │ │ @ instruction: 0xfffe1b41 │ │ @ instruction: 0xfffe07e1 │ │ - @ instruction: 0xfffd1f59 │ │ + @ instruction: 0xfffd1f4d │ │ @ instruction: 0xfffde5da │ │ - @ instruction: 0xfffd8e5d │ │ - @ instruction: 0xfffd8e47 │ │ + @ instruction: 0xfffd8e54 │ │ + @ instruction: 0xfffd8e3e │ │ @ instruction: 0xfffdfcfb │ │ @ instruction: 0xfffe1abf │ │ @ instruction: 0xfffe0763 │ │ @ instruction: 0xfffd4a7c │ │ @ instruction: 0xfffdadae │ │ - @ instruction: 0xfffd2a8d │ │ - @ instruction: 0xfffd8da1 │ │ + @ instruction: 0xfffd2a81 │ │ + @ instruction: 0xfffd8d98 │ │ @ instruction: 0xfffdfc55 │ │ @ instruction: 0xfffe1a19 │ │ @ instruction: 0xfffe06bd │ │ ldrbtmi r4, [r9], #-2491 @ 0xfffff645 │ │ ldmibmi fp!, {r2, sp, lr, pc} │ │ and r4, r1, r9, ror r4 │ │ ldrbtmi r4, [r9], #-2490 @ 0xfffff646 │ │ @@ -26323,48 +26323,48 @@ │ │ mcrrlt 7, 14, pc, r9, cr10 @ │ │ ldrbtmi r4, [r9], #-2348 @ 0xfffff6d4 │ │ bllt 1005268 │ │ @ instruction: 0xfffe05cf │ │ @ instruction: 0xfffdfb05 │ │ @ instruction: 0xfffe18c5 │ │ @ instruction: 0xfffe055b │ │ - @ instruction: 0xfffd8c8d │ │ + @ instruction: 0xfffd8c84 │ │ @ instruction: 0xfffdfb3d │ │ @ instruction: 0xfffe18fd │ │ @ instruction: 0xfffe0583 │ │ @ instruction: 0xfffde362 │ │ @ instruction: 0xfffd4846 │ │ @ instruction: 0xfffdab78 │ │ - @ instruction: 0xfffd2857 │ │ - @ instruction: 0xfffd8b63 │ │ + @ instruction: 0xfffd284b │ │ + @ instruction: 0xfffd8b5a │ │ @ instruction: 0xfffdf9f1 │ │ @ instruction: 0xfffe17b5 │ │ @ instruction: 0xfffe0459 │ │ - @ instruction: 0xfffd8b4f │ │ + @ instruction: 0xfffd8b46 │ │ @ instruction: 0xfffdf9df │ │ @ instruction: 0xfffe17a3 │ │ @ instruction: 0xfffe0447 │ │ - @ instruction: 0xfffd8b79 │ │ + @ instruction: 0xfffd8b70 │ │ @ instruction: 0xfffdfa03 │ │ @ instruction: 0xfffe17c7 │ │ @ instruction: 0xfffe046b │ │ - @ instruction: 0xfffd1bbb │ │ + @ instruction: 0xfffd1baf │ │ @ instruction: 0xfffde23c │ │ @ instruction: 0xfffd4720 │ │ @ instruction: 0xfffdaa52 │ │ - @ instruction: 0xfffd2731 │ │ - @ instruction: 0xfffd8a3d │ │ + @ instruction: 0xfffd2725 │ │ + @ instruction: 0xfffd8a34 │ │ @ instruction: 0xfffdf8cb │ │ @ instruction: 0xfffe168f │ │ @ instruction: 0xfffe0333 │ │ - @ instruction: 0xfffd8a29 │ │ + @ instruction: 0xfffd8a20 │ │ @ instruction: 0xfffdf8b9 │ │ @ instruction: 0xfffe167d │ │ @ instruction: 0xfffe030f │ │ - @ instruction: 0xfffd8a53 │ │ + @ instruction: 0xfffd8a4a │ │ @ instruction: 0xfffdf8dd │ │ @ instruction: 0xfffe16a1 │ │ @ instruction: 0xfffe0345 │ │ @ instruction: 0xfffd5191 │ │ @ instruction: 0xfffde106 │ │ @ instruction: 0xfffdd43c │ │ svcge 0x0003b5f0 │ │ @@ -28044,15 +28044,15 @@ │ │ @ instruction: 0xfffdeb06 │ │ @ instruction: 0xfffdbc79 │ │ @ instruction: 0xfffdd371 │ │ @ instruction: 0xfffd8744 │ │ @ instruction: 0xfffdc8ed │ │ @ instruction: 0xfffcbdce │ │ @ instruction: 0xfffd5be8 │ │ - @ instruction: 0xfffcec53 │ │ + @ instruction: 0xfffcec47 │ │ @ instruction: 0xfffce0ff │ │ @ instruction: 0xfffd8666 │ │ @ instruction: 0xfffcbd02 │ │ @ instruction: 0xfffdc801 │ │ @ instruction: 0xfffdbb4d │ │ @ instruction: 0xfffd4fe1 │ │ @ instruction: 0xfffd4fb7 │ │ @@ -28233,23 +28233,23 @@ │ │ svc 0x005af0a4 │ │ @ instruction: 0xf1054601 │ │ @ instruction: 0xf7fe0010 │ │ stmiavs r0!, {r0, r1, r2, r9, fp, ip, sp, lr, pc}^ │ │ bicvs r2, r1, r8, lsl #2 │ │ @ instruction: 0xf85d2000 │ │ @ instruction: 0xbdf08b04 │ │ - @ instruction: 0xfffd645d │ │ - @ instruction: 0xfffd6bfe │ │ + @ instruction: 0xfffd6454 │ │ + @ instruction: 0xfffd6bf5 │ │ @ instruction: 0xfffd850e │ │ - @ instruction: 0xfffd0bef │ │ + @ instruction: 0xfffd0be3 │ │ @ instruction: 0xfffdc689 │ │ @ instruction: 0xfffdcf36 │ │ @ instruction: 0xfffd1342 │ │ @ instruction: 0xfffcc473 │ │ - @ instruction: 0xfffd62f1 │ │ + @ instruction: 0xfffd62e8 │ │ @ instruction: 0xfffd1dea │ │ @ instruction: 0xfffdc4b4 │ │ strlt fp, [r0, #129] @ 0x81 │ │ addlt r4, r3, pc, ror #12 │ │ @ instruction: 0x469460bb │ │ stmdbmi sp, {r1, r3, r9, sl, lr} │ │ ldrbtmi r4, [r9], #-1635 @ 0xfffff99d │ │ @@ -28499,15 +28499,15 @@ │ │ svclt 0x0000e0cd │ │ @ instruction: 0xfffcdb24 │ │ @ instruction: 0xfffdb597 │ │ @ instruction: 0xfffd8072 │ │ @ instruction: 0xfffdc21b │ │ @ instruction: 0xfffd11c3 │ │ @ instruction: 0xfffcb6ec │ │ - @ instruction: 0xfffd5ed1 │ │ + @ instruction: 0xfffd5ec8 │ │ @ instruction: 0xfffd7ed6 │ │ @ instruction: 0xfffda967 │ │ @ instruction: 0xfffcd911 │ │ @ instruction: 0xfffdd79e │ │ @ instruction: 0xf0a44628 │ │ ldmmi pc!, {r1, r2, r5, r8, sl, fp, sp, lr, pc} @ │ │ ldrbtmi r6, [r8], #-2277 @ 0xfffff71b │ │ @@ -28682,27 +28682,27 @@ │ │ stmiavs r0!, {r0, r1, r3, r7, r9, sl, fp, ip, sp, lr, pc}^ │ │ @ instruction: 0xe77e2115 │ │ @ instruction: 0xf0a44628 │ │ stmdami fp, {r2, r3, r6, r7, r8, r9, fp, sp, lr, pc} │ │ ldrbtmi r6, [r8], #-2277 @ 0xfffff71b │ │ svclt 0x0000e5ec │ │ @ instruction: 0xfffde86d │ │ - @ instruction: 0xfffce344 │ │ + @ instruction: 0xfffce338 │ │ @ instruction: 0xfffde8bf │ │ @ instruction: 0xfffd7bdc │ │ - @ instruction: 0xfffd02c1 │ │ + @ instruction: 0xfffd02b5 │ │ @ instruction: 0xfffdd4d0 │ │ @ instruction: 0xfffd249e │ │ @ instruction: 0xfffdc718 │ │ @ instruction: 0xfffd7ace │ │ @ instruction: 0xfffdc6b4 │ │ - @ instruction: 0xfffd01b3 │ │ + @ instruction: 0xfffd01a7 │ │ @ instruction: 0xfffd21c3 │ │ @ instruction: 0xfffd7d7a │ │ - @ instruction: 0xfffd735f │ │ + @ instruction: 0xfffd7356 │ │ @ instruction: 0xfffdd5f9 │ │ @ instruction: 0xfffd1762 │ │ @ instruction: 0xfffdd68d │ │ svcge 0x0003b5f0 │ │ svceq 0x0000e92d │ │ strmi fp, [r5], -fp, asr #1 │ │ stcleq 8, cr15, [ip], #-892 @ 0xfffffc84 │ │ @@ -29159,31 +29159,31 @@ │ │ @ instruction: 0xf0a44479 │ │ strmi lr, [r6], -r6, asr #16 │ │ @ instruction: 0xf0a44620 │ │ mcrcs 8, 0, lr, cr0, cr2, {0} │ │ rsbshi pc, r5, #64 @ 0x40 │ │ ldrcs r4, [r2, #-3608] @ 0xfffff1e8 │ │ adcs r4, lr, #2113929216 @ 0x7e000000 │ │ - @ instruction: 0xfffcdc34 │ │ - @ instruction: 0xfffd6cfa │ │ + @ instruction: 0xfffcdc28 │ │ + @ instruction: 0xfffd6cf1 │ │ @ instruction: 0xfffdab83 │ │ - @ instruction: 0xfffce6ed │ │ - @ instruction: 0xfffd55ef │ │ - @ instruction: 0xfffcdbdf │ │ + @ instruction: 0xfffce6e1 │ │ + @ instruction: 0xfffd55e6 │ │ + @ instruction: 0xfffcdbd3 │ │ @ instruction: 0xfffdc24b │ │ @ instruction: 0xfffcc1e0 │ │ @ instruction: 0xfffd75d7 │ │ @ instruction: 0xfffd1d09 │ │ @ instruction: 0xfffe0942 │ │ - @ instruction: 0xfffce611 │ │ + @ instruction: 0xfffce605 │ │ @ instruction: 0xfffd2f6a │ │ - @ instruction: 0xfffcd9b6 │ │ + @ instruction: 0xfffcd9aa │ │ @ instruction: 0xfffd1b0e │ │ - @ instruction: 0xfffcfae3 │ │ - @ instruction: 0xfffd5337 │ │ + @ instruction: 0xfffcfad7 │ │ + @ instruction: 0xfffd532e │ │ @ instruction: 0xfffdb55c │ │ @ instruction: 0xfffda884 │ │ @ instruction: 0xfffda869 │ │ @ instruction: 0xfffdb52e │ │ @ instruction: 0xfffd880e │ │ @ instruction: 0xfffdb51a │ │ @ instruction: 0xfffd7318 │ │ @@ -29473,34 +29473,34 @@ │ │ stmibmi r6!, {r0, r1, sp, lr, pc}^ │ │ andcs sl, r5, #8, 16 @ 0x80000 │ │ @ instruction: 0xf7fe4479 │ │ @ instruction: 0xb3b8f86b │ │ @ instruction: 0xf0a3980f │ │ @ instruction: 0x2600ed9a │ │ svclt 0x0000e039 │ │ - @ instruction: 0xfffd5147 │ │ + @ instruction: 0xfffd513e │ │ @ instruction: 0xfffda6bc │ │ - @ instruction: 0xfffcd72c │ │ + @ instruction: 0xfffcd720 │ │ @ instruction: 0xfffd1882 │ │ @ instruction: 0xfffda676 │ │ @ instruction: 0xfffd910a │ │ - @ instruction: 0xfffcd678 │ │ + @ instruction: 0xfffcd66c │ │ @ instruction: 0xfffd17d0 │ │ @ instruction: 0xfffda5e1 │ │ - @ instruction: 0xfffcf799 │ │ + @ instruction: 0xfffcf78d │ │ @ instruction: 0xfffe0448 │ │ - @ instruction: 0xfffd5005 │ │ + @ instruction: 0xfffd4ffc │ │ @ instruction: 0xfffdb22e │ │ @ instruction: 0xfffda55a │ │ - @ instruction: 0xfffd5a99 │ │ + @ instruction: 0xfffd5a90 │ │ @ instruction: 0xfffd1755 │ │ @ instruction: 0xfffd8fc7 │ │ @ instruction: 0xfffd8fa4 │ │ @ instruction: 0xfffdf6cd │ │ - @ instruction: 0xfffcea6c │ │ + @ instruction: 0xfffcea60 │ │ @ instruction: 0xfffcbafd │ │ @ instruction: 0xfffd09fd │ │ @ instruction: 0xfffda44e │ │ @ instruction: 0xfffcb1c9 │ │ muleq sl, r6, r2 │ │ tstcs r4, r2 │ │ stc 0, cr15, [r8, #652] @ 0x28c │ │ @@ -29706,18 +29706,18 @@ │ │ @ instruction: 0xfffd14af │ │ @ instruction: 0xfffda1d5 │ │ @ instruction: 0xfffdd8c9 │ │ @ instruction: 0xfffd8bec │ │ @ instruction: 0xfffd6beb │ │ @ instruction: 0xfffd0689 │ │ @ instruction: 0xfffcadfd │ │ - @ instruction: 0xfffd4ac7 │ │ + @ instruction: 0xfffd4abe │ │ @ instruction: 0xfffdacf0 │ │ @ instruction: 0xfffda01c │ │ - @ instruction: 0xfffcd085 │ │ + @ instruction: 0xfffcd079 │ │ svceq 0x0001f1b9 │ │ @ instruction: 0xf1a0d14b │ │ stmdbcs r4, {r0, r1, r2, r4, r5, r6, r8} │ │ stmdacc r1!, {r1, r3, r8, r9, ip, lr, pc}^ │ │ stmdale r4, {r0, r4, fp, sp}^ │ │ blx 92bc8 │ │ mrscs pc, (UNDEF: 67) @ │ │ @@ -29984,23 +29984,23 @@ │ │ @ instruction: 0xfffd89c2 │ │ @ instruction: 0xfffd69c1 │ │ @ instruction: 0xfffcac73 │ │ @ instruction: 0xfffdc2d2 │ │ @ instruction: 0xfffdb4c7 │ │ @ instruction: 0xfffd7d5b │ │ @ instruction: 0xfffd6895 │ │ - @ instruction: 0xfffcef60 │ │ + @ instruction: 0xfffcef54 │ │ @ instruction: 0xfffcb3c4 │ │ @ instruction: 0xfffd3ccf │ │ - @ instruction: 0xfffd5e64 │ │ + @ instruction: 0xfffd5e5b │ │ @ instruction: 0xfffdd497 │ │ @ instruction: 0xfffd87ba │ │ @ instruction: 0xfffd67b9 │ │ @ instruction: 0xfffd2295 │ │ - @ instruction: 0xfffd4744 │ │ + @ instruction: 0xfffd473b │ │ @ instruction: 0xfffd21b9 │ │ @ instruction: 0xfffd7b35 │ │ @ instruction: 0xf43f2900 │ │ stmdacs ip!, {r0, r2, r3, r4, r8, sl, fp, sp, pc} │ │ @ instruction: 0xf1a0d056 │ │ stmdbcs r4, {r0, r1, r2, r4, r5, r6, r8} │ │ stmdacc r1!, {r1, r3, r8, r9, ip, lr, pc}^ │ │ @@ -30252,15 +30252,15 @@ │ │ @ instruction: 0x461a0b30 │ │ and sp, r3, #244, 2 @ 0x3d │ │ ldrcs r4, [r7], -ip, lsl #16 │ │ eors r4, r8, r8, ror r4 │ │ @ instruction: 0xfffdd235 │ │ @ instruction: 0xfffd855c │ │ @ instruction: 0xfffd655f │ │ - @ instruction: 0xfffce032 │ │ + @ instruction: 0xfffce026 │ │ @ instruction: 0xfffdec7b │ │ @ instruction: 0xfffdec8d │ │ @ instruction: 0xfffd2eec │ │ @ instruction: 0xfffd1f57 │ │ @ instruction: 0xfffdc753 │ │ @ instruction: 0xfffcbdd9 │ │ @ instruction: 0xfffd1d6f │ │ @@ -30785,20 +30785,20 @@ │ │ orrseq r0, r2, #123 @ 0x7b │ │ orrseq r0, r2, #1207959554 @ 0x48000002 │ │ cmneq sl, #34 @ 0x22 │ │ orrseq r0, r2, #1207959554 @ 0x48000002 │ │ orrseq r0, r2, #1207959554 @ 0x48000002 │ │ mulseq r0, r2, r3 │ │ svclt 0x0000e64c │ │ - @ instruction: 0xfffccd25 │ │ + @ instruction: 0xfffccd19 │ │ @ instruction: 0xfffde3d8 │ │ @ instruction: 0xfffc9f0f │ │ @ instruction: 0xfffd25ce │ │ - @ instruction: 0xfffccc76 │ │ - @ instruction: 0xfffccc36 │ │ + @ instruction: 0xfffccc6a │ │ + @ instruction: 0xfffccc2a │ │ @ instruction: 0xfffdd221 │ │ @ instruction: 0xfffd2fb8 │ │ stmdbcs r1, {r0, r6, sl, fp, sp, lr} │ │ strbthi pc, [ip], #0 @ │ │ stclt 0, cr15, [r0] │ │ andvs r2, r1, r5, lsl #2 │ │ @ instruction: 0x460ce632 │ │ @@ -30985,18 +30985,18 @@ │ │ @ instruction: 0xf8dbbcd5 │ │ andcs r1, r9, #0 │ │ stmdbcs r0, {r1, sp, lr} │ │ @ instruction: 0x4608bf1c │ │ stmib sl, {r1, r5, r7, ip, sp, lr, pc}^ │ │ ldrbtmi r4, [r8], #-2057 @ 0xfffff7f7 │ │ ldclt 7, cr15, [r8], #1020 @ 0x3fc │ │ - @ instruction: 0xfffd504d │ │ + @ instruction: 0xfffd5044 │ │ @ instruction: 0xfffd14a6 │ │ @ instruction: 0xfffca52c │ │ - @ instruction: 0xfffd5022 │ │ + @ instruction: 0xfffd5019 │ │ @ instruction: 0xfffdbc8a │ │ @ instruction: 0xfffd9a78 │ │ @ instruction: 0xfffdc584 │ │ @ instruction: 0xfffc8ef7 │ │ @ instruction: 0xfffd08be │ │ svclt 0x001f2c00 │ │ tsteq r1, r0, lsr #32 @ │ │ @@ -31303,15 +31303,15 @@ │ │ @ instruction: 0xf7fb68c0 │ │ @ instruction: 0x2100fe96 │ │ tsteq r0, r4, asr #19 │ │ blt 120a080 │ │ @ instruction: 0xfffd54bd │ │ @ instruction: 0xfffcaf10 │ │ @ instruction: 0xfffdcb14 │ │ - @ instruction: 0xfffd33d4 │ │ + @ instruction: 0xfffd33cb │ │ muleq sl, r8, r5 │ │ andeq r5, sl, lr, ror #10 │ │ stmdbcs r1, {r0, r6, sl, fp, sp, lr} │ │ asrhi pc, r0, #32 @ │ │ @ instruction: 0x46046819 │ │ ldrdeq pc, [r4], #128 @ 0x80 @ │ │ stmdavs r9, {r0, r2, r9, fp, sp, pc} │ │ @@ -31419,15 +31419,15 @@ │ │ @ instruction: 0xfffcfa27 │ │ @ instruction: 0xfffd04c4 │ │ @ instruction: 0xfffd0452 │ │ @ instruction: 0xfffd720c │ │ @ instruction: 0xfffd1bec │ │ @ instruction: 0xfffdbe08 │ │ @ instruction: 0xfffce227 │ │ - @ instruction: 0xfffcb63d │ │ + @ instruction: 0xfffcb631 │ │ @ instruction: 0xfffc870b │ │ @ instruction: 0xfffdb37c │ │ @ instruction: 0xfffd24f4 │ │ stmdbcs r2, {r0, r6, sl, fp, sp, lr} │ │ adcshi pc, r6, r0, asr #32 │ │ strbvs r2, [r1], #-256 @ 0xffffff00 │ │ andvs r2, r1, r3, lsl #2 │ │ @@ -31690,18 +31690,18 @@ │ │ svclt 0x0042f7fe │ │ stmdbcs r2, {r0, r6, sl, fp, sp, lr} │ │ @ instruction: 0x81adf000 │ │ vmls.i8 d18, d0, d10 │ │ @ instruction: 0xe1a8816e │ │ @ instruction: 0xfffcea30 │ │ @ instruction: 0xfffd6362 │ │ - @ instruction: 0xfffcd53e │ │ + @ instruction: 0xfffcd532 │ │ @ instruction: 0xfffd17eb │ │ @ instruction: 0xfffd9a1c │ │ - @ instruction: 0xfffd4406 │ │ + @ instruction: 0xfffd43fd │ │ @ instruction: 0xfffca74a │ │ @ instruction: 0xfffd2097 │ │ svcne 0x004a6c41 │ │ vpmax.s8 d2, d0, d6 │ │ vand d8, d31, d4 │ │ ldm pc, {r1, r2, r8, r9}^ @ │ │ andseq pc, sp, r2, lsl r0 @ │ │ @@ -31912,25 +31912,25 @@ │ │ @ instruction: 0xf7fe4478 │ │ stmibvs r1!, {r0, r2, r7, r8, sl, fp, ip, sp, pc} │ │ eoreq pc, r0, r1, asr r8 @ │ │ @ instruction: 0xf8c84631 │ │ andcs r0, r2, r0 │ │ svclt 0x0000e480 │ │ @ instruction: 0xfffcf2ad │ │ - @ instruction: 0xfffcc640 │ │ + @ instruction: 0xfffcc634 │ │ @ instruction: 0xfffcf27d │ │ - @ instruction: 0xfffcc610 │ │ - @ instruction: 0xfffcd19e │ │ + @ instruction: 0xfffcc604 │ │ + @ instruction: 0xfffcd192 │ │ @ instruction: 0xfffca3ef │ │ @ instruction: 0xfffca3e8 │ │ @ instruction: 0xfffd4978 │ │ @ instruction: 0xfffd737a │ │ @ instruction: 0xfffcefe5 │ │ @ instruction: 0xfffd1253 │ │ - @ instruction: 0xfffccf3e │ │ + @ instruction: 0xfffccf32 │ │ stmibeq sl, {r0, r8, r9, fp, sp, lr, pc} │ │ @ instruction: 0xf859460c │ │ strbmi r8, [r0], -r0, asr #30 │ │ stc 0, cr15, [r2], {161} @ 0xa1 │ │ andne lr, r2, #212, 18 @ 0x350000 │ │ bne 105da98 │ │ strbmi r1, [r0], -r1, asr #24 │ │ @@ -32166,15 +32166,15 @@ │ │ @ instruction: 0xf1a27842 │ │ blcs 68db7c │ │ sbchi pc, r4, r0, lsl #4 │ │ ldreq pc, [r4], -pc, lsl #4 │ │ ldm r6, {r2, r9, sp}^ │ │ svclt 0x0000f013 │ │ @ instruction: 0xfffd02a3 │ │ - @ instruction: 0xfffcc26a │ │ + @ instruction: 0xfffcc25e │ │ @ instruction: 0xfffce21f │ │ eoreq r0, pc, r4, lsr r0 @ │ │ @ instruction: 0x01240124 │ │ @ instruction: 0x01240124 │ │ @ instruction: 0x01240031 │ │ @ instruction: 0x01240124 │ │ @ instruction: 0x01240124 │ │ @@ -32185,15 +32185,15 @@ │ │ @ instruction: 0x01240124 │ │ eorseq r0, r3, r4, lsr r0 │ │ eoreq r0, pc, r1, lsr r0 @ │ │ @ instruction: 0xfffd92e1 │ │ @ instruction: 0xfffd9fb9 │ │ @ instruction: 0xfffdb2c5 │ │ @ instruction: 0xfffdccd6 │ │ - @ instruction: 0xfffcb56a │ │ + @ instruction: 0xfffcb55e │ │ @ instruction: 0xfffd79de │ │ andeq r4, sl, sl, ror #14 │ │ and r2, r2, r3, lsl #4 │ │ and r2, r0, r2, lsl #4 │ │ strbvs r2, [sl], #513 @ 0x201 │ │ @ instruction: 0xf1a27882 │ │ blcs 68dbfc │ │ @@ -32349,19 +32349,19 @@ │ │ ldrdeq pc, [r0], -fp │ │ @ instruction: 0xf8ca2109 │ │ stmdacs r0, {ip} │ │ @ instruction: 0xf0a0bf18 │ │ ldr lr, [r8, r4, lsr #30] │ │ @ instruction: 0xfffd90a4 │ │ andeq r4, sl, r6, lsr #14 │ │ - @ instruction: 0xfffca93e │ │ + @ instruction: 0xfffca932 │ │ @ instruction: 0xfffd1824 │ │ @ instruction: 0xfffc9c8a │ │ - @ instruction: 0xfffd3883 │ │ - @ instruction: 0xfffcc961 │ │ + @ instruction: 0xfffd387a │ │ + @ instruction: 0xfffcc955 │ │ svcge 0x0003b5f0 │ │ svceq 0x0000e92d │ │ stmib sp, {r0, r2, r5, r7, ip, sp, pc}^ │ │ stmdacs r0, {r3, r8, r9, sp} │ │ @ instruction: 0x4604bf1e │ │ stmdacs r0, {r3, r4, r5, r6, r8, fp, sp, lr} │ │ stmdaeq r0, {r0, r1, r2, r3, r6, ip, sp, lr, pc} │ │ @@ -39315,15 +39315,15 @@ │ │ @ instruction: 0xfffd5f07 │ │ vclt.s d30, d6, #0 │ │ movs r1, r1 │ │ b.n 54054 │ │ movs r1, r1 │ │ add r4, sp, #576 @ 0x240 │ │ @ instruction: 0xfffc5ef5 │ │ - vcvt.f32.u32 d28, d3, #3 │ │ + @ instruction: 0xfffdce0a │ │ vsra.u64 q15, , #4 │ │ movs r1, r1 │ │ adds r6, r6, r5 │ │ movs r2, r1 │ │ nop {11} │ │ movs r1, r1 │ │ b.n 53f7c │ │ @@ -39674,15 +39674,15 @@ │ │ asrs r4, r0, #30 │ │ movs r2, r1 │ │ pop {r2, r6, r7, pc} │ │ movs r1, r1 │ │ svc 204 @ 0xcc │ │ movs r1, r1 │ │ ldr r5, [r5, #124] @ 0x7c │ │ - vsri.64 d27, d7, #4 │ │ + vclz.i d27, d14 │ │ @ instruction: 0xfffcdfb4 │ │ movs r1, r1 │ │ asrs r4, r1, #20 │ │ movs r2, r1 │ │ svc 36 @ 0x24 │ │ movs r1, r1 │ │ movs r4, #6 │ │ @@ -40245,15 +40245,15 @@ │ │ vtbx.8 d29, {d12-d13}, d23 │ │ movs r1, r1 │ │ @ instruction: 0xb718 │ │ movs r1, r1 │ │ bls.n 545a0 │ │ movs r1, r1 │ │ ldr r1, [r0, #20] │ │ - vqrdmulh.s q13, q14, d27[0] │ │ + vqrdmulh.s q13, q14, d18[0] │ │ vtbl.8 d29, {d12-d13}, d24 │ │ movs r1, r1 │ │ @ instruction: 0xb6be │ │ movs r1, r1 │ │ @ instruction: 0xb6ae │ │ movs r1, r1 │ │ @ instruction: 0xb690 │ │ @@ -40732,19 +40732,19 @@ │ │ movs r1, r1 │ │ lsrs r0, r0, #13 │ │ movs r2, r1 │ │ cbz r0, 54a30 │ │ movs r1, r1 │ │ bcc.n 5493c │ │ movs r1, r1 │ │ - itee ge │ │ - vtbxge.8 d19, {d12-d13}, d20 │ │ - vrsralt.u32 , q9, #4 │ │ + ittet ge │ │ + vqrshrnge.u64 d19, q4, #4 │ │ + vrsrage.u32 , q9, #4 │ │ movlt r1, r1 │ │ - bcc.n 5492c │ │ + bcc.n 5492c @ unpredictable │ │ movs r1, r1 │ │ │ │ 00054a24 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ ldr r6, [pc, #528] @ (54c40 ) │ │ @@ -40982,26 +40982,26 @@ │ │ vqrdmlah.s q10, , d15[0] │ │ vcle.s d29, d14, #0 │ │ movs r1, r1 │ │ bne.n 54bb8 │ │ movs r1, r1 │ │ ldr r3, [sp, #896] @ 0x380 │ │ vqrdmlah.s q10, q6, d5[0] │ │ - @ instruction: 0xfffd4d9f │ │ + @ instruction: 0xfffd4d93 │ │ vrev16. , │ │ movs r1, r1 │ │ bne.n 54d44 │ │ movs r1, r1 │ │ lsrs r6, r1, #3 │ │ movs r2, r1 │ │ add r7, sp, #48 @ 0x30 │ │ movs r1, r1 │ │ bne.n 54d10 │ │ movs r1, r1 │ │ - adcs r4, r1 │ │ + adcs r0, r0 │ │ vcvt.u16.f16 , , #4 │ │ vsli.64 , q8, #61 @ 0x3d │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8-d15} │ │ sub.w sp, sp, #680 @ 0x2a8 │ │ @@ -41315,15 +41315,15 @@ │ │ movs r1, r1 │ │ beq.n 54f08 │ │ movs r1, r1 │ │ lsls r2, r5, #29 │ │ movs r2, r1 │ │ @ instruction: 0xfa66fffc │ │ @ instruction: 0xfa58fffc │ │ - add r4, pc, #664 @ (adr r4, 5522c ) │ │ + add r4, pc, #628 @ (adr r4, 55208 ) │ │ @ instruction: 0xfffcefa0 │ │ @ instruction: 0xfffc8ef4 │ │ vrev32. d29, d8 │ │ movs r1, r1 │ │ beq.n 5508c │ │ movs r1, r1 │ │ lsls r6, r3, #28 │ │ @@ -41354,15 +41354,15 @@ │ │ movs r1, r1 │ │ ldmia r6, {r1, r3, r5, r6} │ │ movs r1, r1 │ │ ldmia r6, {r1, r2, r3, r4, r6} │ │ movs r1, r1 │ │ lsls r6, r0, #23 │ │ movs r2, r1 │ │ - rev16 r5, r1 │ │ + rev16 r4, r0 │ │ vqrdmlah.s q14, q6, d30[0] │ │ movs r1, r1 │ │ ldmia r6, {r1, r5, r6} │ │ movs r1, r1 │ │ lsls r6, r2, #22 │ │ movs r2, r1 │ │ ldrh r7, [r4, #40] @ 0x28 │ │ @@ -41715,16 +41715,16 @@ │ │ add r0, pc │ │ blx r1 │ │ b.n 5544c │ │ ldr r0, [r6, #0] │ │ cmp r0, #0 │ │ bne.w 55462 │ │ b.n 55450 │ │ - cbnz r5, 55374 │ │ - vqrshrn.u64 d20, , #4 │ │ + cbnz r4, 55372 │ │ + vtbx.8 d20, {d12-d13}, d9 │ │ @ instruction: 0xfffcecfe │ │ @ instruction: 0xfffc0e00 │ │ @ instruction: 0xfffccc94 │ │ movs r1, r1 │ │ add r2, sp, #152 @ 0x98 │ │ movs r1, r1 │ │ ldmia r4, {r3, r4, r5, r6} │ │ @@ -41738,22 +41738,22 @@ │ │ movs r1, r1 │ │ lsls r6, r3, #14 │ │ movs r2, r1 │ │ cmp r6, #61 @ 0x3d │ │ vtbl.8 d24, {d13-d16}, d23 │ │ vpadal.s d31, d30 │ │ @ instruction: 0xfffcebd6 │ │ - vqshrun.s64 d27, , #4 │ │ + vqshrun.s64 d27, q1, #4 │ │ vdup.32 d28, d16[1] │ │ movs r1, r1 │ │ ldmia r4, {r2, r4} │ │ movs r1, r1 │ │ lsls r6, r7, #12 │ │ movs r2, r1 │ │ - ldr r0, [pc, #184] @ (5546c ) │ │ + ldr r0, [pc, #136] @ (5543c ) │ │ vtbx.8 d20, {d12}, d15 │ │ vcle.f , q12, #0 │ │ vtbx.8 d30, {d12-d15}, d26 │ │ vdup.32 q8, d28[1] │ │ @ instruction: 0xfffccb93 │ │ movs r1, r1 │ │ ldmia r3!, {r2, r7} │ │ @@ -42137,22 +42137,22 @@ │ │ vtbx.8 d16, {d28-d29}, d10 │ │ vaddw.u q8, q14, d28 │ │ movs r2, r1 │ │ lsls r4, r3, #6 │ │ movs r2, r1 │ │ cdp2 0, 14, cr0, cr2, cr9, {0} │ │ @ instruction: 0xeb2cfffc │ │ - mvns r6, r0 │ │ + bics r2, r7 │ │ vqneg.s d28, d12 │ │ movs r1, r1 │ │ stmia r7!, {r1, r7} │ │ movs r1, r1 │ │ cdp2 0, 10, cr0, cr10, cr9, {0} │ │ - cmp r4, #250 @ 0xfa │ │ - @ instruction: 0xfffc2cf2 │ │ + cmp r4, #238 @ 0xee │ │ + vqdmulh.s q9, q14, d22[0] │ │ vqabs.s q14, q10 │ │ movs r1, r1 │ │ stmia r7!, {r3, r4, r6} │ │ movs r1, r1 │ │ cdp2 0, 7, cr0, cr6, cr9, {0} │ │ bl 1b87d8 │ │ bl 1b07dc │ │ @@ -42550,40 +42550,40 @@ │ │ stmia r5!, {r2, r3, r4, r6} │ │ movs r1, r1 │ │ mcrr2 0, 0, r0, r2, cr9 │ │ adds r0, r5, #4 │ │ vcvt.u16.f16 d17, d10, #3 │ │ vcge.s , , #0 │ │ vsri.32 q15, q12, #3 │ │ - vshr.u64 d27, d29, #4 │ │ + vshr.u64 d27, d20, #4 │ │ vabal.u q14, d12, d16 │ │ movs r1, r1 │ │ stmia r5!, {r2, r4} │ │ movs r1, r1 │ │ @ instruction: 0xfbf20009 │ │ adcs r5, r7 │ │ vsra.u32 q10, , #3 │ │ vsri.64 q14, q9, #3 │ │ movs r1, r1 │ │ stmia r4!, {r1, r2, r5, r6, r7} │ │ movs r1, r1 │ │ @ instruction: 0xfbbc0009 │ │ - add sp, #468 @ 0x1d4 │ │ - vrev64. , │ │ + add sp, #432 @ 0x1b0 │ │ + vrev64. , q10 │ │ @ instruction: 0xfffc6f26 │ │ vsri.32 d28, d20, #3 │ │ movs r1, r1 │ │ stmia r4!, {r3, r5} │ │ movs r1, r1 │ │ @ instruction: 0xfaf20009 │ │ cmp r7, #219 @ 0xdb │ │ vqshl.u32 d30, d20, #29 │ │ @ instruction: 0xfffceb90 │ │ vqabs.s , │ │ - @ instruction: 0xfffb3b5f │ │ + @ instruction: 0xfffb3b53 │ │ @ instruction: 0xfffcfc94 │ │ movs r1, r1 │ │ stc2 0, cr0, [sl], {9} │ │ vst1.8 {d16[0]}, [lr], r9 │ │ b.n 55864 │ │ vqshlu.s32 d30, d0, #28 │ │ vtbx.8 d30, {d12-d14}, d28 │ │ @@ -42871,31 +42871,31 @@ │ │ b.n 55f70 │ │ ldr r0, [r6, #0] │ │ b.n 55f72 │ │ nop │ │ cmp r5, #111 @ 0x6f │ │ vneg.f d20, d0 │ │ vrev32. q15, q4 │ │ - @ instruction: 0xfffcad0d │ │ + @ instruction: 0xfffcad04 │ │ vqshlu.s32 d31, d28, #28 │ │ movs r1, r1 │ │ ldr r6, [sp, #704] @ 0x2c0 │ │ movs r1, r1 │ │ - str r5, [sp, #436] @ 0x1b4 │ │ + str r5, [sp, #400] @ 0x190 │ │ @ instruction: 0xfffc6e8c │ │ vshr.u64 q14, q8, #3 │ │ movs r1, r1 │ │ stmia r0!, {r1, r2, r5, r6, r7} │ │ movs r1, r1 │ │ @ instruction: 0xf7ae0009 │ │ cmp r4, #155 @ 0x9b │ │ vmull.u q9, d29, d15 │ │ vrsubhn.i d20, , q8 │ │ vqrdmlsh.s , q14, d24[0] │ │ - vdup.32 d26, d29[1] │ │ + vdup.32 d26, d20[1] │ │ vsli.32 , q7, #28 │ │ movs r1, r1 │ │ ldr r5, [sp, #840] @ 0x348 │ │ movs r1, r1 │ │ bkpt 0x00a9 │ │ vtbl.8 d22, {d12-d13}, d30 │ │ vshr.u32 d28, d12, #3 │ │ @@ -42903,20 +42903,20 @@ │ │ stmia r0!, {r1, r4} │ │ movs r1, r1 │ │ @ instruction: 0xf6d20009 │ │ cmp r3, #191 @ 0xbf │ │ @ instruction: 0xfffd2bb3 │ │ vcle.f q10, q2, #0 │ │ @ instruction: 0xfffcdf0c │ │ - @ instruction: 0xfffcab51 │ │ + vtbx.8 d26, {d12-d15}, d8 │ │ vclz.i d31, d0 │ │ movs r1, r1 │ │ ldr r4, [sp, #976] @ 0x3d0 │ │ movs r1, r1 │ │ - movs r4, #221 @ 0xdd │ │ + movs r4, #209 @ 0xd1 │ │ vtbl.8 d22, {d12-d15}, d30 │ │ vtbx.8 d20, {d29-d30}, d10 │ │ add r1, pc │ │ blx edff0 │ │ str r0, [r6, #0] │ │ cbnz r0, 55f88 │ │ ldr r0, [pc, #800] @ (56298 ) │ │ @@ -43215,15 +43215,15 @@ │ │ itet cc @ unpredictable │ │ movcc r1, r1 │ │ @ instruction: 0xf5ee0009 │ │ cmpcc r2, #217 @ 0xd9 │ │ vtbx.8 d18, {d13-d15}, d11 │ │ vsri.32 q10, q5, #3 │ │ @ instruction: 0xfffcdda2 │ │ - vtbx.8 d26, {d28-d29}, d23 │ │ + @ instruction: 0xfffca9de │ │ vrsra.u32 d31, d6, #4 │ │ movs r1, r1 │ │ ldr r3, [sp, #552] @ 0x228 │ │ movs r1, r1 │ │ ldr r5, [pc, #672] @ (56550 ) │ │ @ instruction: 0xfffc59ff │ │ @ instruction: 0xfffcf546 │ │ @@ -44349,15 +44349,15 @@ │ │ movs r1, r1 │ │ mrc2 15, 3, pc, cr2, cr12, {7} │ │ mrc2 15, 2, pc, cr14, cr12, {7} │ │ sub sp, #280 @ 0x118 │ │ movs r1, r1 │ │ sub sp, #376 @ 0x178 │ │ movs r1, r1 │ │ - cmp r3, #191 @ 0xbf │ │ + cmp r3, #179 @ 0xb3 │ │ vqrdmlah.s , q14, d23[0] │ │ vdup.8 d20, d19[5] │ │ vsri.32 q15, q8, #4 │ │ movs r1, r1 │ │ b.n 56790 │ │ movs r1, r1 │ │ add sp, #392 @ 0x188 │ │ @@ -44789,45 +44789,45 @@ │ │ movs r1, r1 │ │ b.n 56c6c │ │ movs r1, r1 │ │ b.n 56c78 │ │ movs r1, r1 │ │ stc2l 15, cr15, [lr], #1004 @ 0x3ec │ │ @ instruction: 0xfbc4fffb │ │ - lsls r1, r6, #27 │ │ + lsls r5, r4, #27 │ │ @ instruction: 0xfffcfbbd │ │ - vrshr.u32 d17, d6, #5 │ │ + vcvtp.s32.f32 d17, d10 │ │ vqdmulh.s q13, q14, d18[0] │ │ movs r1, r1 │ │ add r4, sp, #864 @ 0x360 │ │ movs r1, r1 │ │ b.n 579a0 │ │ movs r1, r1 │ │ b.n 579b4 │ │ movs r1, r1 │ │ stcl 15, cr15, [r1, #-1004]! @ 0xfffffc14 │ │ ldcl 15, cr15, [r5, #-1004] @ 0xfffffc14 │ │ ldr r0, [pc, #444] @ (574c0 ) │ │ vtbx.8 d31, {d12-d15}, d27 │ │ - vcvtn.u32.f32 , q2 │ │ + vsra.u64 d17, d24, #5 │ │ vmull.u q13, d28, d16 │ │ movs r1, r1 │ │ b.n 57934 │ │ movs r1, r1 │ │ b.n 57948 │ │ movs r1, r1 │ │ @ instruction: 0xfa9cfffc │ │ @ instruction: 0xfa86fffc │ │ add r4, sp, #392 @ 0x188 │ │ movs r1, r1 │ │ add r4, sp, #480 @ 0x1e0 │ │ movs r1, r1 │ │ - movs r7, #239 @ 0xef │ │ + movs r7, #227 @ 0xe3 │ │ @ instruction: 0xfffcfb17 │ │ - vsra.u32 , q8, #5 │ │ + vcvtn.s32.f32 , q10 │ │ vtbx.8 d24, {d28}, d10 │ │ movs r1, r1 │ │ ldr r0, [sp, #64] @ 0x40 │ │ movs r1, r1 │ │ cmp r0, #0 │ │ it eq │ │ bxeq lr │ │ @@ -45372,15 +45372,15 @@ │ │ movs r1, r1 │ │ str r0, [r5, #96] @ 0x60 │ │ vqshlu.s32 d22, d12, #28 │ │ vqshl.u32 d19, d21, #28 │ │ vqshlu.s32 , , #28 │ │ @ instruction: 0xfffbbbdb │ │ vsli.64 d31, d14, #60 @ 0x3c │ │ - vcvta.u32.f32 q8, │ │ + vshr.u64 d16, d31, #5 │ │ vsli.64 d31, d7, #60 @ 0x3c │ │ vrecpe.f32 d26, d19 │ │ vqshlu.s64 q13, q2, #60 @ 0x3c │ │ movs r1, r1 │ │ add r6, pc, #808 @ (adr r6, 57ba8 ) │ │ movs r1, r1 │ │ ble.n 578e4 │ │ @@ -45400,15 +45400,15 @@ │ │ movs r1, r1 │ │ bl ffcce8a4 │ │ bl ffcbe8a8 │ │ add r6, pc, #360 @ (adr r6, 57a1c ) │ │ movs r1, r1 │ │ add r6, pc, #424 @ (adr r6, 57a60 ) │ │ movs r1, r1 │ │ - movs r1, #205 @ 0xcd │ │ + movs r1, #193 @ 0xc1 │ │ vsri.64 , , #4 │ │ vrsqrte.u32 d26, d1 │ │ vcls.s d24, d12 │ │ movs r1, r1 │ │ str r3, [sp, #328] @ 0x148 │ │ movs r1, r1 │ │ │ │ @@ -45666,30 +45666,30 @@ │ │ movs r1, r1 │ │ bge.n 57b18 │ │ movs r1, r1 │ │ add r4, pc, #584 @ (adr r4, 57d74 ) │ │ movs r1, r1 │ │ bge.n 57af4 │ │ movs r1, r1 │ │ - ldrh r0, [r5, #60] @ 0x3c │ │ - vqrdmlsh.s q12, q6, d24[0] │ │ + ldrh r7, [r3, #60] @ 0x3c │ │ + vcvt.u32.f32 q12, , #4 │ │ vtbl.8 d20, {d12-d14}, d16 │ │ vpaddl.u d31, d23 │ │ vqshl.u64 , , #59 @ 0x3b │ │ @ instruction: 0xfffca3e4 │ │ movs r1, r1 │ │ bge.n 57bb4 │ │ movs r1, r1 │ │ bl 210b48 │ │ bl 1feb4c │ │ add r3, pc, #672 @ (adr r3, 57df8 ) │ │ movs r1, r1 │ │ add r3, pc, #752 @ (adr r3, 57e4c ) │ │ movs r1, r1 │ │ - subs r3, r1, #4 │ │ + subs r7, r7, #3 │ │ vrshr.u32 d31, d19, #4 │ │ vcvt.s32.f32 , │ │ Address 0x57b66 is out of bounds. │ │ │ │ │ │ 00057b68 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -45888,30 +45888,30 @@ │ │ movs r1, r1 │ │ bhi.n 57de4 │ │ movs r1, r1 │ │ add r1, pc, #1008 @ (adr r1, 5813c ) │ │ movs r1, r1 │ │ bhi.n 57dec │ │ movs r1, r1 │ │ - ldrh r4, [r2, #40] @ 0x28 │ │ - @ instruction: 0xfffc8cfe │ │ + ldrh r3, [r1, #40] @ 0x28 │ │ + @ instruction: 0xfffc8cf5 │ │ vqneg.s q10, q1 │ │ vrev64. , │ │ @ instruction: 0xfffb1db7 │ │ vsra.u64 d26, d28, #3 │ │ movs r1, r1 │ │ bhi.n 57d6c │ │ movs r1, r1 │ │ @ instruction: 0xef84fffc │ │ vrsqrts.f16 , q10, q14 │ │ add r1, pc, #544 @ (adr r1, 57f98 ) │ │ movs r1, r1 │ │ add r1, pc, #608 @ (adr r1, 57fdc ) │ │ movs r1, r1 │ │ - adds r3, r3, #3 │ │ + adds r7, r1, #3 │ │ vrev64. d31, d3 │ │ vqrdmulh.s , , d27[0] │ │ Address 0x57d86 is out of bounds. │ │ │ │ │ │ 00057d88 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -47081,16 +47081,16 @@ │ │ movs r1, r1 │ │ str r7, [sp, #96] @ 0x60 │ │ movs r1, r1 │ │ ldmia r5!, {r1, r2, r6} │ │ movs r1, r1 │ │ ldmia r5!, {r1, r2, r3, r6} │ │ movs r1, r1 │ │ - strh r4, [r2, #16] │ │ - @ instruction: 0xfffc81e0 │ │ + strh r3, [r1, #16] │ │ + vsra.u64 q12, , #4 │ │ vmull.u , d28, d20 │ │ vsli.32 d30, d17, #28 │ │ vqshl.u32 d29, d28, #27 │ │ vqshlu.s64 d25, d22, #60 @ 0x3c │ │ movs r1, r1 │ │ ldmia r4, {r1, r2, r4, r6, r7} │ │ movs r1, r1 │ │ @@ -47098,27 +47098,27 @@ │ │ movs r1, r1 │ │ b.n 581c8 │ │ vsri.32 q15, q1, #4 │ │ vqshlu.s32 , q15, #28 │ │ movs r1, r1 │ │ str r6, [sp, #568] @ 0x238 │ │ movs r1, r1 │ │ - asrs r1, r7, #6 │ │ + asrs r5, r5, #6 │ │ vclz.i q15, │ │ vcvt.f32.u32 , q14 │ │ vpadal.s d25, d20 │ │ movs r1, r1 │ │ str r6, [sp, #104] @ 0x68 │ │ movs r1, r1 │ │ ldmia r4, {r3, r4, r5} │ │ movs r1, r1 │ │ ldmia r4!, {r6} │ │ movs r1, r1 │ │ - strh r6, [r0, #8] │ │ - vshr.u64 q12, q13, #4 │ │ + strh r5, [r7, #6] │ │ + vshr.u64 q12, , #4 │ │ @ instruction: 0xfffc3bbe │ │ vcls.s q15, │ │ vqshlu.s32 , q3, #27 │ │ Address 0x5893e is out of bounds. │ │ │ │ │ │ 00058940 : │ │ @@ -47423,16 +47423,16 @@ │ │ movs r1, r1 │ │ str r4, [sp, #128] @ 0x80 │ │ movs r1, r1 │ │ ldmia r2, {r1, r2, r4, r5} │ │ movs r1, r1 │ │ ldmia r2, {r1, r2, r3, r4, r5} │ │ movs r1, r1 │ │ - ldrb r4, [r0, #28] │ │ - vqrdmlah.s , q14, d30[0] │ │ + ldrb r3, [r7, #27] │ │ + vqrdmlah.s , q14, d21[0] │ │ @ instruction: 0xfffc39b2 │ │ vrshr.u32 d30, d31, #4 │ │ vcvt.u16.f16 d27, d12, #5 │ │ vrsra.u64 , q6, #4 │ │ movs r1, r1 │ │ ldmia r1!, {r2, r5, r6, r7} │ │ movs r1, r1 │ │ @@ -47440,41 +47440,41 @@ │ │ movs r1, r1 │ │ b.n 58f1c │ │ vrev16. q15, q8 │ │ vsubw.u , q14, d20 │ │ movs r1, r1 │ │ str r3, [sp, #720] @ 0x2d0 │ │ movs r1, r1 │ │ - lsrs r7, r0, #27 │ │ + lsrs r3, r7, #26 │ │ @ instruction: 0xfffce1ef │ │ vqdmulh.s , , d12[0] │ │ @ instruction: 0xfffc934e │ │ movs r1, r1 │ │ ldmia r1, {r1, r4, r6} │ │ movs r1, r1 │ │ str r3, [sp, #256] @ 0x100 │ │ movs r1, r1 │ │ ldmia r1, {r1, r4, r6} │ │ movs r1, r1 │ │ - ldrb r0, [r3, #24] │ │ - @ instruction: 0xfffc7e0c │ │ + ldrb r7, [r1, #24] │ │ + @ instruction: 0xfffc7e03 │ │ @ instruction: 0xfffc38d0 │ │ vsra.u32 q15, , #4 │ │ vcvt.f16.u16 d27, d26, #5 │ │ vsubw.u , q6, d10 │ │ movs r1, r1 │ │ ldmia r1, {r1, r2, r3} │ │ movs r1, r1 │ │ b.n 58da8 │ │ vrev32. d30, d2 │ │ vrshr.u64 , q3, #4 │ │ movs r1, r1 │ │ str r2, [sp, #920] @ 0x398 │ │ movs r1, r1 │ │ - lsrs r1, r5, #23 │ │ + lsrs r5, r3, #23 │ │ vsra.u32 d30, d1, #4 │ │ vtbx.8 d27, {d27-d30}, d30 │ │ Address 0x58c9a is out of bounds. │ │ │ │ │ │ 00058c9c : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -48026,16 +48026,16 @@ │ │ movs r1, r1 │ │ ldrh r4, [r3, #42] @ 0x2a │ │ movs r1, r1 │ │ stmia r3!, {r1, r4, r6} │ │ movs r1, r1 │ │ stmia r3!, {r1, r3, r4, r6} │ │ movs r1, r1 │ │ - ldrb r0, [r4, #0] │ │ - vqshl.u64 , q8, #60 @ 0x3c │ │ + ldrb r7, [r2, #0] │ │ + vqneg.s , │ │ vrshr.u64 d19, d20, #4 │ │ vtbx.8 d29, {d12-d15}, d1 │ │ vsri.32 , q1, #5 │ │ Address 0x59206 is out of bounds. │ │ │ │ │ │ 00059208 : │ │ @@ -48289,16 +48289,16 @@ │ │ movs r1, r1 │ │ ldrh r2, [r5, #24] │ │ movs r1, r1 │ │ stmia r1!, {r3, r4} │ │ movs r1, r1 │ │ stmia r1!, {r5} │ │ movs r1, r1 │ │ - strb r6, [r4, #23] │ │ - @ instruction: 0xfffc75c4 │ │ + strb r5, [r3, #23] │ │ + vsli.64 d23, d27, #60 @ 0x3c │ │ vrev32. d19, d8 │ │ vqshrn.u64 d29, , #4 │ │ vqrdmlah.s , , d21[0] │ │ @ instruction: 0xfffcbea4 │ │ movs r1, r1 │ │ stmia r0!, {r2, r3, r4} │ │ movs r1, r1 │ │ @@ -48382,15 +48382,15 @@ │ │ movs r1, r1 │ │ bvc.n 59480 │ │ vqshl.u64 d29, d12, #60 @ 0x3c │ │ vshll.u32 q12, d0, #28 │ │ movs r1, r1 │ │ ldrh r2, [r4, #16] │ │ movs r1, r1 │ │ - lsls r3, r0, #20 │ │ + lsls r7, r6, #19 │ │ vtbl.8 d29, {d12}, d27 │ │ @ instruction: 0xfffb2fd9 │ │ @ instruction: 0xfffcbdd0 │ │ movs r1, r1 │ │ ldrh r0, [r3, #14] │ │ movs r1, r1 │ │ push {r4, r6, r7, lr} │ │ @@ -48481,17 +48481,17 @@ │ │ movpl r1, r1 │ │ bvs.n 595b4 @ unpredictable │ │ vpadalmi.u , q2 │ │ vtbx.8 d24, {d12-d13}, d8 │ │ movs r1, r1 │ │ ldrh r2, [r3, #10] │ │ movs r1, r1 │ │ - lsls r3, r5, #16 │ │ + lsls r7, r3, #16 │ │ vqshl.u32 , , #28 │ │ - @ instruction: 0xfffbedbf │ │ + @ instruction: 0xfffbedb3 │ │ vqshrn.u64 d24, q7, #5 │ │ movs r1, r1 │ │ ldrh r0, [r0, #8] │ │ movs r1, r1 │ │ bmi.n 595d4 │ │ bmi.n 595d6 │ │ bmi.n 595d8 │ │ @@ -51388,47 +51388,47 @@ │ │ bx lr │ │ ldr r5, [sp, #276] @ 0x114 │ │ vcvtm.s32.f32 d27, d8 │ │ @ instruction: 0xfffcee08 │ │ vcvta.s32.f32 , q4 │ │ vqrdmulh.s q15, q14, d19[0] │ │ vtbx.8 d31, {d11-d12}, d30 │ │ - vtbx.8 d19, {d28-d30}, d29 │ │ - vcvt.u32.f32 q10, , #4 │ │ + vtbx.8 d19, {d28-d30}, d20 │ │ + vqrdmlsh.s q10, q6, d30[0] │ │ @ instruction: 0xfffc2fd9 │ │ @ instruction: 0xfffc9b1e │ │ vqdmulh.s q8, q14, d18[0] │ │ vcvt.u32.f32 d27, d20, #4 │ │ vaddw.u , q14, d6 │ │ @ instruction: 0xfffb9bd5 │ │ - vsri.64 d20, d9, #5 │ │ + vsri.64 d20, d0, #5 │ │ vsli.32 d24, d15, #28 │ │ @ instruction: 0xfffc8fdf │ │ vsra.u32 d27, d21, #4 │ │ vdup.32 d30, d26[1] │ │ @ instruction: 0xfffc5b38 │ │ vqabs.s q14, q5 │ │ @ instruction: 0xfffc8f21 │ │ vdup.32 q8, d10[1] │ │ vdup.32 d16, d25[1] │ │ @ instruction: 0xfffcbdd1 │ │ vtbl.8 d21, {d12-d15}, d10 │ │ vsri.64 d24, d10, #4 │ │ - @ instruction: 0xfffc4da6 │ │ + @ instruction: 0xfffc4d9d │ │ @ instruction: 0xfffc1eb1 │ │ @ instruction: 0xfffcaffe │ │ vshr.u32 d27, d12, #5 │ │ vqrdmulh.s q11, q14, d22[0] │ │ vtbl.8 d30, {d12-d15}, d7 │ │ - @ instruction: 0xfffb4d9d │ │ + @ instruction: 0xfffb4d94 │ │ vqrshrun.s64 d23, , #4 │ │ - vcls.s , │ │ - vcvt.f32.u32 , q15, #5 │ │ + vsri.32 , , #4 │ │ + vcvt.f32.u32 , q9, #5 │ │ vcvt.f32.s32 q13, q4 │ │ - vrsra.u32 d20, d23, #5 │ │ + vcvtm.s32.f32 d20, d30 │ │ vrev64. , q5 │ │ @ instruction: 0xfffc48fd │ │ add r0, pc │ │ bx lr │ │ ldr r0, [pc, #1012] @ (5b3e4 ) │ │ add r0, pc │ │ bx lr │ │ @@ -51936,171 +51936,171 @@ │ │ nop │ │ ldr r0, [sp, #752] @ 0x2f0 │ │ @ instruction: 0xfffc59f7 │ │ @ instruction: 0xfffccfa3 │ │ vqneg.s d23, d22 │ │ @ instruction: 0xfffca548 │ │ vsli.64 d28, d27, #59 @ 0x3b │ │ - @ instruction: 0xfffcd364 │ │ + vrsra.u32 , q4, #4 │ │ vshll.u32 , d12, #27 │ │ - vrsra.u32 , , #4 │ │ + vrsra.u32 , , #4 │ │ vcvt.f16.u16 d27, d25, #5 │ │ vsri.32 d26, d8, #4 │ │ - @ instruction: 0xfffcdda7 │ │ - @ instruction: 0xfffbc89d │ │ + @ instruction: 0xfffcdd9b │ │ + @ instruction: 0xfffbc891 │ │ @ instruction: 0xfffb9998 │ │ vcvtp.u32.f32 q11, │ │ @ instruction: 0xfffc2c92 │ │ vclz.i , q2 │ │ vtbx.8 d29, {d11-d13}, d11 │ │ - vtbx.8 d28, {d12}, d28 │ │ + vtbx.8 d28, {d12}, d16 │ │ vrsqrte.u32 d31, d14 │ │ @ instruction: 0xfffb599e │ │ vmull.u q9, d28, d15 │ │ vtbl.8 d29, {d12-d14}, d17 │ │ @ instruction: 0xfffce9f8 │ │ vtbx.8 d25, {d11-d12}, d20 │ │ vrsqrte.f32 , q4 │ │ @ instruction: 0xfffcfd89 │ │ vcvt.s32.f32 d23, d19 │ │ vsri.32 , q0, #4 │ │ vrsra.u64 q13, q7, #5 │ │ @ instruction: 0xfffca3e6 │ │ vcvt.u16.f16 q12, q11, #4 │ │ - vqneg.s , q4 │ │ + vqshl.u64 d19, d31, #60 @ 0x3c │ │ vsli.32 d26, d20, #28 │ │ @ instruction: 0xfffbae8d │ │ vrsqrte.f32 d28, d27 │ │ vcvt.f16.u16 , q6, #4 │ │ - vdup.32 d20, d28[1] │ │ + vdup.32 d20, d19[1] │ │ vabal.u q13, d12, d8 │ │ @ instruction: 0xfffbe9f4 │ │ vtbl.8 d30, {d12-d14}, d1 │ │ vsli.32 , , #28 │ │ vcls.s d17, d7 │ │ @ instruction: 0xfffcbb9b │ │ @ instruction: 0xfffcae26 │ │ - vqshl.u64 q14, q10, #59 @ 0x3b │ │ + vcvt.u32.f32 q14, q12 │ │ vrecpe.f32 d31, d25 │ │ vtbx.8 d22, {d28-d31}, d16 │ │ vrsra.u64 , , #4 │ │ vtbx.8 d25, {d12}, d12 │ │ vqshrn.u64 d16, q12, #5 │ │ @ instruction: 0xfffc6bbf │ │ @ instruction: 0xfffcbb54 │ │ vaddw.u q12, q14, d23 │ │ vcvt.f16.u16 , , #4 │ │ - vcvt.f16.u16 , q9, #4 │ │ + vdup.32 , d22[1] │ │ vqshlu.s64 , , #59 @ 0x3b │ │ vtbx.8 d18, {d28-d31}, d11 │ │ vrshr.u64 q13, q4, #4 │ │ @ instruction: 0xfffc98b4 │ │ vqrshrun.s64 d21, q6, #5 │ │ vdup.32 q12, d31[1] │ │ vqrshrn.u64 d30, , #4 │ │ vsra.u32 d24, d0, #4 │ │ - vqshlu.s64 d19, d7, #60 @ 0x3c │ │ + vpadal.u d19, d14 │ │ vsubw.u q13, q6, d23 │ │ vtbl.8 d29, {d12-d13}, d7 │ │ vrsra.u64 d17, d7, #4 │ │ vdup.32 , d3[1] │ │ vsra.u32 d24, d15, #4 │ │ @ instruction: 0xfffcbb9c │ │ @ instruction: 0xfffca3c9 │ │ - vqshlu.s32 , , #27 │ │ + vcvt.f32.s32 , q13 │ │ vtbx.8 d29, {d12}, d7 │ │ vqrdmulh.s q13, q6, d0[0] │ │ @ instruction: 0xfffbbab5 │ │ vshr.u64 q11, , #4 │ │ vqrshrun.s64 d29, q7, #4 │ │ vshr.u64 q11, q14, #4 │ │ - @ instruction: 0xfffcdbd7 │ │ + vtbx.8 d29, {d28-d31}, d11 │ │ vshr.u64 d24, d18, #5 │ │ - vsra.u64 d29, d18, #4 │ │ + vaddw.u , q14, d22 │ │ @ instruction: 0xfffb6b5e │ │ vqshlu.s32 d25, d16, #28 │ │ vcvt.u16.f16 d26, d20, #4 │ │ @ instruction: 0xfffcacf0 │ │ - @ instruction: 0xfffbbb90 │ │ + vtbl.8 d27, {d27-d30}, d4 │ │ vcvtp.s32.f32 , │ │ vrecpe.f32 , │ │ vpaddl.u , q11 │ │ vtbl.8 d25, {d12}, d9 │ │ - vtbx.8 d20, {d27-d29}, d5 │ │ + @ instruction: 0xfffb4abc │ │ vqshlu.s32 d25, d3, #28 │ │ vqshrun.s64 d25, q0, #4 │ │ @ instruction: 0xfffbacd6 │ │ @ instruction: 0xfffbfbd2 │ │ vrshr.u64 , q15, #5 │ │ vrshr.u32 , , #4 │ │ vcvt.f32.s32 d25, d31 │ │ vsri.32 q14, q1, #4 │ │ - vpadal.s , │ │ + vqshlu.s32 , q7, #28 │ │ vsubw.u q13, q6, d19 │ │ - @ instruction: 0xfffb4ab4 │ │ + vtbl.8 d20, {d27-d29}, d27 │ │ @ instruction: 0xfffcacd6 │ │ - vtbl.8 d29, {d11-d14}, d18 │ │ + @ instruction: 0xfffbdb16 │ │ vsri.32 d28, d4, #5 │ │ - vtbl.8 d27, {d12-d15}, d29 │ │ + vtbl.8 d27, {d12-d15}, d17 │ │ vcvta.u32.f32 d24, d27 │ │ @ instruction: 0xfffc8bdb │ │ vtbx.8 d18, {d28-d30}, d6 │ │ - vsli.32 , , #28 │ │ + vsli.32 , q8, #28 │ │ vrshr.u64 d17, d16, #4 │ │ - @ instruction: 0xfffcbafd │ │ + @ instruction: 0xfffcbaf1 │ │ vqshrun.s64 d16, , #5 │ │ vqneg.s q15, │ │ vrshr.u32 d17, d13, #5 │ │ @ instruction: 0xfffcccd9 │ │ - @ instruction: 0xfffcdb3e │ │ + @ instruction: 0xfffcdb32 │ │ vrshr.u64 d17, d2, #5 │ │ vtbl.8 d17, {d12-d15}, d23 │ │ - @ instruction: 0xfffc35c4 │ │ + vsli.64 d19, d27, #60 @ 0x3c │ │ vqdmulh.s q13, q14, d23[0] │ │ vqshlu.s64 , q8, #60 @ 0x3c │ │ - @ instruction: 0xfffc3f99 │ │ - @ instruction: 0xfffcbb3c │ │ + @ instruction: 0xfffc3f90 │ │ + @ instruction: 0xfffcbb30 │ │ vrshr.u32 , q9, #5 │ │ vcvtn.s32.f32 q13, │ │ vsri.64 , , #4 │ │ @ instruction: 0xfffc7ff3 │ │ vtbl.8 d30, {d12}, d10 │ │ vpaddl.u d31, d20 │ │ - @ instruction: 0xfffbbaf7 │ │ + vtbx.8 d27, {d27-d29}, d27 │ │ @ instruction: 0xfffb2998 │ │ - vsli.32 d19, d27, #28 │ │ + vsli.32 d19, d18, #28 │ │ vtbl.8 d27, {d12-d14}, d28 │ │ vsri.64 d23, d31, #4 │ │ vqshl.u32 d30, d11, #28 │ │ vdup.8 q13, d18[5] │ │ vcvt.u32.f32 d29, d4 │ │ vsri.32 d23, d29, #4 │ │ - vcvt.u32.f32 , q4, #4 │ │ + vqrdmlsh.s , q6, d15[0] │ │ vqdmulh.s q14, q14, d13[0] │ │ @ instruction: 0xfffc8ab9 │ │ @ instruction: 0xfffc8afb │ │ vtbl.8 d17, {d28-d30}, d24 │ │ - vtbx.8 d27, {d12-d14}, d31 │ │ + vtbx.8 d27, {d12-d14}, d19 │ │ vqshlu.s64 , q11, #59 @ 0x3b │ │ vrshr.u64 d28, d10, #5 │ │ - vsri.64 , q1, #4 │ │ + vclz.i , │ │ vrev32. q13, q0 │ │ vclz.i , │ │ @ instruction: 0xfffc29d9 │ │ vrev64. d24, d17 │ │ @ instruction: 0xfffc8af3 │ │ @ instruction: 0xfffc69bf │ │ vrshr.u32 d31, d17, #4 │ │ vtbx.8 d27, {d27-d28}, d3 │ │ vrev32. q13, │ │ vqshlu.s64 d25, d28, #60 @ 0x3c │ │ @ instruction: 0xfffb8a5f │ │ @ instruction: 0xfffc5f2a │ │ vqshlu.s32 , , #28 │ │ - vcls.s , │ │ + vcls.s , q11 │ │ vtbx.8 d26, {d28-d31}, d24 │ │ vrsqrte.f32 , q3 │ │ vrshr.u32 q14, , #5 │ │ vqshl.u32 d30, d24, #28 │ │ vsri.32 d25, d9, #4 │ │ vsra.u64 q13, , #4 │ │ vtbx.8 d20, {d27}, d1 │ │ @@ -52492,67 +52492,67 @@ │ │ nop │ │ ldr r7, [sp, #744] @ 0x2e8 │ │ vcvtm.u32.f32 d21, d12 │ │ @ instruction: 0xfffca8d8 │ │ vrecpe.u32 q8, │ │ vqshl.u64 d31, d10, #60 @ 0x3c │ │ vqrdmlsh.s , , d6[0] │ │ - vqshl.u32 , q14, #27 │ │ + vqshl.u32 , q8, #27 │ │ vcvt.s32.f32 , q12 │ │ - vdup.8 d19, d2[5] │ │ + @ instruction: 0xfffb3bf9 │ │ vpadal.u d27, d22 │ │ @ instruction: 0xfffcee9a │ │ vcvt.f32.u32 q8, q10, #5 │ │ vcls.s q15, q3 │ │ @ instruction: 0xfffca89d │ │ - vpadal.s d20, d21 │ │ + vqshlu.s32 d20, d12, #28 │ │ vrsra.u32 d21, d9, #4 │ │ @ instruction: 0xfffcc8b6 │ │ vsubw.u , q14, d24 │ │ vrsra.u64 q8, , #4 │ │ vcvt.u32.f32 , q2, #4 │ │ @ instruction: 0xfffc9ed4 │ │ vcvtm.u32.f32 q8, │ │ vcvt.u32.f32 d30, d1, #4 │ │ vrev16. , │ │ @ instruction: 0xfffcd34a │ │ vabal.u q12, d12, d6 │ │ - @ instruction: 0xfffcbff1 │ │ - vrecpe.u32 d27, d1 │ │ + vqrdmlsh.s , q14, d21[0] │ │ + vrsra.u64 , , #5 │ │ vtbx.8 d25, {d27-d30}, d21 │ │ @ instruction: 0xfffc0d08 │ │ - vshr.u64 d28, d12, #4 │ │ - vsli.32 , , #27 │ │ + vshr.u64 d28, d0, #4 │ │ + vsli.32 , , #27 │ │ vcvt.f16.u16 q15, , #5 │ │ - vrsqrte.f32 d27, d9 │ │ - @ instruction: 0xfffbbfbf │ │ - vsra.u64 d28, d16, #5 │ │ - vsri.64 q10, q2, #5 │ │ + vsli.32 , , #27 │ │ + @ instruction: 0xfffbbfb3 │ │ + vcvtn.u32.f32 d28, d20 │ │ + vrsqrte.u32 q10, │ │ vqrdmlah.s , q6, d16[0] │ │ vrshr.u64 d30, d14, #4 │ │ @ instruction: 0xfffcec90 │ │ @ instruction: 0xfffb7afd │ │ vcls.s d30, d15 │ │ vpaddl.u , q9 │ │ vtbx.8 d23, {d12-d15}, d1 │ │ vsubw.u q8, q6, d4 │ │ @ instruction: 0xfffc7b37 │ │ vcvt.u16.f16 , , #4 │ │ vcvtp.s32.f32 , q4 │ │ vdup.8 , d2[5] │ │ vrev16. , │ │ - vpadal.u , │ │ + vqshlu.s64 , , #60 @ 0x3c │ │ vqshlu.s32 d22, d7, #27 │ │ vdup.32 d21, d8[1] │ │ vsli.32 d27, d3, #28 │ │ vcvt.u32.f32 d27, d11, #4 │ │ - vpadal.u d27, d25 │ │ + vqshlu.s64 d27, d13, #60 @ 0x3c │ │ vcvtp.u32.f32 , │ │ - vpadal.u , q4 │ │ - @ instruction: 0xfffb2edb │ │ + vqshlu.s64 d27, d28, #60 @ 0x3c │ │ + @ instruction: 0xfffb2ed2 │ │ vshr.u64 q8, q15, #4 │ │ vrsra.u64 d22, d19, #4 │ │ @ instruction: 0xfffcb347 │ │ vsli.64 q13, q4, #60 @ 0x3c │ │ vrev32. , q5 │ │ vrev16. d21, d1 │ │ vtbx.8 d23, {d28-d30}, d27 │ │ @@ -52560,60 +52560,60 @@ │ │ vabal.u , d28, d10 │ │ vcvtn.s32.f32 d25, d15 │ │ vcvt.s32.f32 d26, d10 │ │ vsra.u32 q15, , #4 │ │ vrsra.u64 , q13, #5 │ │ vsri.32 d18, d3, #4 │ │ vrsra.u64 , q12, #4 │ │ - vsri.32 q10, , #4 │ │ + vcls.s q10, q15 │ │ vshr.u64 d25, d3, #4 │ │ vcvta.u32.f32 , q1 │ │ vcvtp.s32.f32 q8, q14 │ │ - vabal.u , d28, d29 │ │ - @ instruction: 0xfffb3adf │ │ - vcvt.u32.f32 d18, d7, #4 │ │ + vabal.u , d28, d17 │ │ + @ instruction: 0xfffb3ad6 │ │ + @ instruction: 0xfffc2f0e │ │ vshll.u32 , d9, #28 │ │ vrev16. d30, d13 │ │ - vsli.32 d27, d9, #27 │ │ + vrecpe.f32 d27, d13 │ │ @ instruction: 0xfffb9c9b │ │ vcvt.u32.f32 d22, d1, #5 │ │ vcvt.f16.u16 q15, , #4 │ │ vsra.u64 q8, , #5 │ │ vrev16. , q10 │ │ vcvt.u16.f16 d27, d12, #4 │ │ - vqrdmlsh.s , q14, d9[0] │ │ + @ instruction: 0xfffcbfbd │ │ @ instruction: 0xfffb7a54 │ │ @ instruction: 0xfffcbdb6 │ │ - vqrshrn.u64 d19, q15, #4 │ │ - vtbl.8 d19, {d28-d29}, d2 │ │ + vqrshrn.u64 d19, , #4 │ │ + vqrshrn.u64 d19, , #4 │ │ vpadal.s q14, │ │ @ instruction: 0xfffcbd9c │ │ vqshlu.s64 d26, d25, #60 @ 0x3c │ │ - vsri.32 q10, q1, #5 │ │ + vrecpe.u32 q10, │ │ vcls.s q9, q13 │ │ - vqrdmlsh.s , q14, d7[0] │ │ + @ instruction: 0xfffcbfbb │ │ vcvt.f32.u32 d26, d3 │ │ vpaddl.s d16, d23 │ │ vrev32. , │ │ vrev64. d25, d17 │ │ vsra.u64 d25, d17, #4 │ │ vrecpe.f32 d27, d2 │ │ @ instruction: 0xfffc7b36 │ │ vsli.64 q12, q12, #60 @ 0x3c │ │ vqrdmulh.s q15, q14, d13[0] │ │ vtbl.8 d28, {d11}, d0 │ │ vsli.32 d18, d8, #28 │ │ - vrev64. d19, d5 │ │ + @ instruction: 0xfffc2ffc │ │ @ instruction: 0xfffc51c3 │ │ - vshr.u64 d19, d19, #4 │ │ + vrev32. d19, d26 │ │ vqrdmulh.s q15, q6, d13[0] │ │ - vcvtn.s32.f32 d28, d15 │ │ + vcvtn.s32.f32 d28, d3 │ │ vrshr.u64 d25, d11, #5 │ │ vcvt.f32.u32 , q1, #5 │ │ - vrecpe.u32 q10, q0 │ │ + vsri.32 d20, d23, #5 │ │ @ instruction: 0xfffcedb6 │ │ vrshr.u64 q15, , #5 │ │ vpaddl.s q15, q6 │ │ vcvt.f32.u32 q12, │ │ vqshrun.s64 d28, q15, #4 │ │ vqabs.s d24, d10 │ │ vabal.u q11, d28, d3 │ │ @@ -52722,15 +52722,15 @@ │ │ subs r7, #0 │ │ movs r1, r1 │ │ ldr r0, [sp, #776] @ 0x308 │ │ movs r1, r1 │ │ movs r1, #110 @ 0x6e │ │ vrev16. q9, q8 │ │ vcvt.u32.f32 d31, d28, #4 │ │ - vqshl.u32 q14, q14, #27 │ │ + vqshl.u32 q14, q8, #27 │ │ vcvtm.u32.f32 d26, d22 │ │ vpaddl.u q11, │ │ movs r1, r1 │ │ adds r6, #210 @ 0xd2 │ │ movs r1, r1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ @@ -56304,16 +56304,16 @@ │ │ strb r2, [r2, #13] │ │ movs r1, r1 │ │ strb r0, [r3, #13] │ │ movs r1, r1 │ │ ldmia r4!, {r1, r2, r3, r5, r6, r7} │ │ vmull.u q14, d27, d2 │ │ vtbx.8 d18, {d11}, d28 │ │ - vpaddl.s d26, d0 │ │ - vcvt.f32.u32 q8, q0 │ │ + vsra.u64 q13, q10, #4 │ │ + vqshlu.s64 d16, d23, #59 @ 0x3b │ │ Address 0x5e292 is out of bounds. │ │ │ │ │ │ 0005e294 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -56490,18 +56490,18 @@ │ │ movs r1, r1 │ │ cmn r4, r3 │ │ movs r1, r1 │ │ strb r6, [r1, #6] │ │ movs r1, r1 │ │ strb r4, [r2, #6] │ │ movs r1, r1 │ │ - subs r3, r3, r0 │ │ - vtbl.8 d17, {d28-d29}, d31 │ │ + subs r2, r2, r0 │ │ + vtbl.8 d17, {d28-d29}, d22 │ │ vqshlu.s64 , , #60 @ 0x3c │ │ - vshr.u32 d26, d28, #5 │ │ + vshr.u32 d26, d16, #5 │ │ vtbx.8 d30, {d11-d13}, d16 │ │ Address 0x5e456 is out of bounds. │ │ │ │ │ │ 0005e458 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ @@ -56706,16 +56706,16 @@ │ │ ldr r2, [r4, #116] @ 0x74 │ │ movs r1, r1 │ │ ldr r2, [r5, #116] @ 0x74 │ │ movs r1, r1 │ │ ldr r0, [r2, #116] @ 0x74 │ │ vqrdmlah.s q11, q14, d20[0] │ │ vtbx.8 d23, {d28-d29}, d27 │ │ - vcvt.f32.u32 d25, d6, #5 │ │ - vtbl.8 d26, {d11}, d20 │ │ + @ instruction: 0xfffb9e0a │ │ + vqshrun.s64 d26, q4, #5 │ │ Address 0x5e686 is out of bounds. │ │ │ │ │ │ 0005e688 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -56878,15 +56878,15 @@ │ │ ldr r0, [r6, #88] @ 0x58 │ │ movs r1, r1 │ │ ldr r0, [r7, #88] @ 0x58 │ │ movs r1, r1 │ │ ldr r7, [r0, #116] @ 0x74 │ │ @ instruction: 0xfffb6edf │ │ @ instruction: 0xfffb2bbc │ │ - vdup.32 , d24[1] │ │ + vcvt.f16.u16 , q6, #4 │ │ vtbx.8 d23, {d11}, d19 │ │ Address 0x5e832 is out of bounds. │ │ │ │ │ │ 0005e834 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ @@ -65066,30 +65066,30 @@ │ │ rsbs r0, ip, r8 │ │ rsb r0, sl, r8 │ │ subs r5, r6, r7 │ │ @ instruction: 0xfffbebb8 │ │ movs r0, r1 │ │ subs r4, r6, r0 │ │ vsubw.u , q14, d18 │ │ - vcvt.f32.u32 , q15, #5 │ │ + vcvt.f32.u32 , q9, #5 │ │ vtbl.8 d30, {d27-d30}, d16 │ │ movs r0, r1 │ │ subs r0, r1, r0 │ │ movs r1, r1 │ │ subs r0, r2, r0 │ │ movs r1, r1 │ │ add r1, pc, #660 @ (adr r1, 63fcc ) │ │ @ instruction: 0xfffbeb78 │ │ movs r0, r1 │ │ add r1, pc, #588 @ (adr r1, 63f8c ) │ │ vtbx.8 d30, {d11-d14}, d22 │ │ movs r0, r1 │ │ lsrs r6, r2, #18 │ │ @ instruction: 0xfffc9348 │ │ - @ instruction: 0xfffb3e24 │ │ + vcvt.f32.u32 d19, d8, #5 │ │ vtbx.8 d30, {d11-d14}, d14 │ │ movs r0, r1 │ │ adds r6, r5, r6 │ │ movs r1, r1 │ │ adds r6, r6, r6 │ │ movs r1, r1 │ │ lsrs r6, r5, #23 │ │ @@ -65101,30 +65101,30 @@ │ │ adds.w r0, lr, r8 │ │ add.w r0, ip, r8 │ │ lsrs r2, r0, #23 │ │ @ instruction: 0xfffceafa │ │ movs r0, r1 │ │ adds r4, r4, r6 │ │ vrshr.u64 , q2, #4 │ │ - @ instruction: 0xfffb3db0 │ │ + @ instruction: 0xfffb3da4 │ │ vtbx.8 d30, {d27-d29}, d18 │ │ movs r0, r1 │ │ adds r2, r7, r4 │ │ movs r1, r1 │ │ adds r2, r0, r5 │ │ movs r1, r1 │ │ mvns r5, r4 │ │ @ instruction: 0xfffceaba │ │ movs r0, r1 │ │ mvns r3, r2 │ │ vtbl.8 d30, {d28-d30}, d24 │ │ movs r0, r1 │ │ movs r2, #220 @ 0xdc │ │ vrshr.u32 , q13, #5 │ │ - vcvt.u16.f16 , q3, #5 │ │ + vqrdmulh.s , , d10[0] │ │ @ instruction: 0xfffbea90 │ │ movs r0, r1 │ │ adds r0, r4, r3 │ │ movs r1, r1 │ │ adds r0, r5, r3 │ │ movs r1, r1 │ │ adds r1, #185 @ 0xb9 │ │ @@ -65136,30 +65136,30 @@ │ │ orn r0, r0, r8 │ │ orr.w r0, lr, r8 │ │ adds r1, #141 @ 0x8d │ │ vshll.u32 q15, d28, #28 │ │ movs r0, r1 │ │ ldmia r6, {r0, r2, r4, r5, r6} │ │ vcvtp.s32.f32 d25, d6 │ │ - vqdmulh.s , , d18[0] │ │ + @ instruction: 0xfffb3cd6 │ │ vtbl.8 d30, {d11-d13}, d20 │ │ movs r0, r1 │ │ adds r4, r5, r1 │ │ movs r1, r1 │ │ adds r4, r6, r1 │ │ movs r1, r1 │ │ strb r6, [r6, #3] │ │ @ instruction: 0xfffbe9fc │ │ movs r0, r1 │ │ strb r4, [r4, #3] │ │ vtbx.8 d30, {d27-d28}, d26 │ │ movs r0, r1 │ │ ldrb r5, [r0, #20] │ │ vcvtn.u32.f32 d25, d28 │ │ - vmull.u , d27, d8 │ │ + vcvt.f16.u16 , q14, #5 │ │ @ instruction: 0xfffbe9d8 │ │ movs r0, r1 │ │ strd r0, r0, [sl, #32] │ │ strd r0, r0, [r6, #32] │ │ adds r2, r0, r0 │ │ movs r1, r1 │ │ adds r2, r1, r0 │ │ @@ -65522,26 +65522,26 @@ │ │ str r0, [sp, #8] │ │ str.w r8, [sp, #56] @ 0x38 │ │ b.n 64268 │ │ nop │ │ ldr r3, [pc, #600] @ (64424 ) │ │ @ instruction: 0xfffcde03 │ │ vqrdmlsh.s q12, , d18[0] │ │ - @ instruction: 0xfffb3abe │ │ + @ instruction: 0xfffb3ab2 │ │ vtbl.8 d30, {d11}, d14 │ │ movs r0, r1 │ │ asrs r6, r0, #25 │ │ movs r1, r1 │ │ asrs r6, r1, #25 │ │ movs r1, r1 │ │ ldrb r3, [r6, #13] │ │ vtbx.8 d23, {d11-d14}, d19 │ │ vqrdmlah.s , , d15[0] │ │ @ instruction: 0xfffb8f8a │ │ - vtbx.8 d19, {d11-d13}, d22 │ │ + @ instruction: 0xfffb3a5a │ │ vqshl.u64 d30, d30, #59 @ 0x3b │ │ movs r0, r1 │ │ b.n 64174 │ │ movs r0, r1 │ │ asrs r2, r5, #23 │ │ movs r1, r1 │ │ asrs r6, r5, #23 │ │ @@ -66011,15 +66011,15 @@ │ │ b.n 646cc │ │ ldr r0, [sp, #64] @ 0x40 │ │ ldr r0, [r0, #0] │ │ cbnz r0, 646e6 │ │ b.n 646d2 │ │ lsls r0, r7, #17 │ │ vcls.s q8, q12 │ │ - @ instruction: 0xfffcaeb4 │ │ + @ instruction: 0xfffcaeab │ │ vrsqrte.u32 d20, d29 │ │ vclz.i q9, │ │ vqshrn.u64 d20, , #4 │ │ add r1, pc │ │ blx edff0 │ │ ldr r1, [sp, #64] @ 0x40 │ │ str r0, [r1, #0] │ │ @@ -66057,22 +66057,22 @@ │ │ add sp, #92 @ 0x5c │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ b.w d4594 │ │ subs r1, r6, r1 │ │ vclz.i q8, q5 │ │ vqrshrun.s64 d24, q14, #5 │ │ - vrsra.u32 , q4, #5 │ │ + vcvtm.s32.f32 , q6 │ │ vshr.u32 d30, d6, #5 │ │ movs r0, r1 │ │ b.n 647c4 │ │ movs r0, r1 │ │ lsls r2, r4, #4 │ │ vshr.u64 q8, q15, #4 │ │ - vtbx.8 d26, {d12-d15}, d10 │ │ + vtbx.8 d26, {d12-d15}, d1 │ │ vcvtn.s32.f32 q10, │ │ vaddw.u q9, q14, d3 │ │ Address 0x64752 is out of bounds. │ │ │ │ │ │ 00064754 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -77632,32 +77632,32 @@ │ │ mov r0, r4 │ │ bl 95738 │ │ b.n 6c242 │ │ ldr r0, [pc, #624] @ (6c848 ) │ │ movs r0, r1 │ │ subs r0, #106 @ 0x6a │ │ movs r0, r1 │ │ - adds r0, #17 │ │ + adds r0, #8 │ │ vtbx.8 d19, {d11}, d4 │ │ movs r0, r1 │ │ - cmp r7, #235 @ 0xeb │ │ + cmp r7, #226 @ 0xe2 │ │ vqrdmulh.s q12, , d18[0] │ │ movs r0, r1 │ │ movs r2, #172 @ 0xac │ │ vtbx.8 d30, {d11-d13}, d21 │ │ vcvt.f32.s32 d22, d16 │ │ vcvt.f32.u32 , q0 │ │ movs r0, r1 │ │ - cmp r6, #103 @ 0x67 │ │ + cmp r6, #94 @ 0x5e │ │ vqshl.u64 d19, d18, #59 @ 0x3b │ │ movs r0, r1 │ │ - cmp r7, #89 @ 0x59 │ │ + cmp r7, #80 @ 0x50 │ │ vcvt.f32.u32 , q12 │ │ movs r0, r1 │ │ - cmp r6, #143 @ 0x8f │ │ + cmp r6, #134 @ 0x86 │ │ vcvt.f32.u32 q10, q2 │ │ movs r0, r1 │ │ │ │ 0006c614 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -77903,18 +77903,18 @@ │ │ b.n 6ce6a │ │ ldrh r4, [r0, #36] @ 0x24 │ │ movs r0, r1 │ │ add r6, sl │ │ movs r0, r1 │ │ adds r3, #78 @ 0x4e │ │ movs r0, r1 │ │ - cmp r2, #245 @ 0xf5 │ │ + cmp r2, #236 @ 0xec │ │ vcvtm.s32.f32 d19, d22 │ │ movs r0, r1 │ │ - cmp r2, #205 @ 0xcd │ │ + cmp r2, #196 @ 0xc4 │ │ vtbl.8 d22, {d11}, d17 │ │ movw r2, #5126 @ 0x1406 │ │ cmp r1, r2 │ │ bne.n 6ca36 │ │ vldr s4, [r4, #28] │ │ vldr s0, [r4, #12] │ │ vsub.f32 s4, s18, s4 │ │ @@ -78283,18 +78283,18 @@ │ │ add r1, sp, #64 @ 0x40 │ │ str r4, [sp, #8] │ │ bl e9d40 │ │ b.n 6d116 │ │ nop │ │ adds r0, #248 @ 0xf8 │ │ movs r0, r1 │ │ - cmp r0, #159 @ 0x9f │ │ + cmp r0, #150 @ 0x96 │ │ vcvta.u32.f32 , q7 │ │ movs r0, r1 │ │ - cmp r0, #117 @ 0x75 │ │ + cmp r0, #108 @ 0x6c │ │ vcvt.f32.u32 d30, d1, #5 │ │ cmp r2, #16 │ │ ldr r5, [r4, #24] │ │ vmov r3, s0 │ │ ldr r1, [r4, #8] │ │ ldrd r4, r0, [r4, #40] @ 0x28 │ │ strd r1, r5, [sp] │ │ @@ -78855,15 +78855,15 @@ │ │ ldr r0, [r0, r1] │ │ mov.w r1, #1065353216 @ 0x3f800000 │ │ str r1, [r0, #12] │ │ b.n 6d1d8 │ │ nop │ │ cmp r0, #72 @ 0x48 │ │ movs r0, r1 │ │ - subs r7, r5, #7 │ │ + subs r6, r4, #7 │ │ vtbl.8 d19, {d27}, d18 │ │ movs r0, r1 │ │ │ │ 0006d5d4 : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #132] @ (6d660 ) │ │ @@ -80831,15 +80831,15 @@ │ │ movs r0, r1 │ │ stmia r4!, {r2, r3, r5} │ │ vcvt.f16.u16 , q5, #6 │ │ movs r0, r1 │ │ subs r4, #124 @ 0x7c │ │ movs r0, r1 │ │ cmp r1, #45 @ 0x2d │ │ - vrecpe.u32 d24, d8 │ │ + vrsra.u64 q12, q14, #5 │ │ @ instruction: 0xfffa834e │ │ @ instruction: 0xfffb3cbc │ │ movs r0, r1 │ │ │ │ 0006eaac : │ │ push {r7, lr} │ │ mov r7, sp │ │ @@ -81966,36 +81966,36 @@ │ │ movs r0, r1 │ │ adds r2, #2 │ │ movs r0, r1 │ │ ldrsh r0, [r1, r7] │ │ movs r0, r1 │ │ ldrsh r4, [r1, r7] │ │ movs r0, r1 │ │ - ldrh r2, [r7, #58] @ 0x3a │ │ - vqrdmlsh.s q12, q5, d10[0] │ │ + ldrh r6, [r5, #58] @ 0x3a │ │ + vcvt.u32.f32 d24, d30, #6 │ │ vzip.32 d19, d16 │ │ movs r0, r1 │ │ adds r1, #184 @ 0xb8 │ │ movs r0, r1 │ │ - ldr r0, [sp, #824] @ 0x338 │ │ + ldr r0, [sp, #776] @ 0x308 │ │ vtbx.8 d23, {d10}, d26 │ │ vrsra.u32 d19, d12, #5 │ │ vcvtn.u32.f32 d19, d2 │ │ movs r0, r1 │ │ ldrsh r2, [r0, r5] │ │ movs r0, r1 │ │ ldrsh r6, [r0, r5] │ │ movs r0, r1 │ │ ldrsh r6, [r6, r7] │ │ vqrdmlsh.s , , d18[0] │ │ vsra.u32 d19, d30, #5 │ │ movs r0, r1 │ │ adds r1, #86 @ 0x56 │ │ movs r0, r1 │ │ - ldr r0, [sp, #668] @ 0x29c │ │ + ldr r0, [sp, #620] @ 0x26c │ │ vtbl.8 d23, {d10}, d0 │ │ vrshr.u64 d19, d18, #5 │ │ vcvtn.s32.f32 d19, d10 │ │ movs r0, r1 │ │ adds r1, #12 │ │ movs r0, r1 │ │ ldrb r6, [r3, r6] │ │ @@ -82634,20 +82634,20 @@ │ │ movs r0, r1 │ │ ldr r6, [pc, #952] @ (7008c ) │ │ vqrdmlah.s q10, , d22[0] │ │ @ instruction: 0xfffb2d06 │ │ movs r0, r1 │ │ cmp r4, #250 @ 0xfa │ │ movs r0, r1 │ │ - strh.w pc, [r8, #4090] @ 0xffa │ │ - strh.w pc, [r0, #4090] @ 0xffa │ │ + pld [pc, #4090] @ 70cde │ │ + pld [r7, #4090] @ 0xffa │ │ cmp r4, #218 @ 0xda │ │ movs r0, r1 │ │ - lsrs r7, r7, #27 │ │ - @ instruction: 0xfffb0ef7 │ │ + lsrs r6, r6, #27 │ │ + vqrdmlah.s q8, , d30[0] │ │ vmull.u q9, d27, d30 │ │ movs r0, r1 │ │ ldr r4, [r1, r0] │ │ movs r0, r1 │ │ ldrsb r6, [r5, r2] │ │ movs r0, r1 │ │ ldr r0, [r4, #4] │ │ @@ -83874,15 +83874,15 @@ │ │ ldr.w fp, [sp, #112] @ 0x70 │ │ ldr.w r8, [sp, #100] @ 0x64 │ │ ldr r2, [sp, #60] @ 0x3c │ │ b.n 70a80 │ │ subs r6, r4, #7 │ │ movs r0, r1 │ │ b.n 70b7c │ │ - vqshl.u64 d22, d30, #58 @ 0x3a │ │ + vqshl.u64 d22, d18, #58 @ 0x3a │ │ vqrdmlsh.s , q5, d30[0] │ │ movs r0, r1 │ │ b.n 70ab0 │ │ sha256su0.32 , │ │ vshr.u64 q9, q9, #6 │ │ vcvt.u32.f32 , q3, #5 │ │ movs r0, r1 │ │ @@ -83897,16 +83897,16 @@ │ │ svc 2 │ │ vsri.64 , q12, #6 │ │ @ instruction: 0xfffadef4 │ │ @ instruction: 0xfffa9e0c │ │ vqrdmulh.s , , d6[0] │ │ movs r0, r1 │ │ udf #118 @ 0x76 │ │ - @ instruction: 0xfffadfa4 │ │ - @ instruction: 0xfffa6fdb │ │ + @ instruction: 0xfffadf9b │ │ + vqrdmlsh.s q11, q13, d15[0] │ │ vqrdmlah.s , q5, d8[0] │ │ vtbx.8 d18, {d10-d12}, d17 │ │ @ instruction: 0xfffbde28 │ │ vrinta.f32 d26, d0 │ │ vmla.i , q5, d15[0] │ │ lsrs r0, r0, #24 │ │ ldr r0, [r1, #24] │ │ @@ -84307,20 +84307,20 @@ │ │ movs r0, r1 │ │ bgt.n 70ec4 │ │ vzip.32 , │ │ vdup.8 d29, d0[5] │ │ vrintx.f32 , │ │ vtbl.8 d17, {d11-d13}, d26 │ │ movs r0, r1 │ │ - strb r4, [r4, #30] │ │ + strb r0, [r3, #30] │ │ vqshl.u32 d16, d6, #26 │ │ vqrdmlah.s , , d4[0] │ │ vtbl.8 d17, {d26-d29}, d24 │ │ vtbx.8 d29, {d27-d29}, d14 │ │ - vtrn.32 d31, d15 │ │ + vtrn.32 d31, d6 │ │ @ instruction: 0xfffa8e9f │ │ @ instruction: 0xfffafe8a │ │ @ instruction: 0xfffa1b74 │ │ vcvt.f32.u32 q12, , #5 │ │ @ instruction: 0xfffada90 │ │ vqrdmlah.s q12, q5, d0[0] │ │ vtbx.8 d17, {d11-d12}, d28 │ │ @@ -84659,15 +84659,15 @@ │ │ movne r6, lr │ │ ldr r2, [sp, #112] @ 0x70 │ │ cmp r6, lr │ │ bne.n 71278 │ │ movs r0, #0 │ │ b.n 71288 │ │ bhi.n 712f4 │ │ - vrinta.f32 d23, d3 │ │ + vsri.64 , , #6 │ │ vqshl.u64 , q1, #58 @ 0x3a │ │ movs r0, r1 │ │ bvs.n 712e8 │ │ vcvt.u16.f16 d27, d20, #6 │ │ vqshrun.s64 d22, q0, #6 │ │ cbz r0, 7126e │ │ ldr r0, [r2, #4] │ │ @@ -85230,15 +85230,15 @@ │ │ ldmia r7, {r5, r6, r7} │ │ vsli.64 , q11, #58 @ 0x3a │ │ vdup.8 d17, d31[5] │ │ @ instruction: 0xfffb0f93 │ │ movs r0, r1 │ │ lsrs r6, r5, #29 │ │ movs r0, r1 │ │ - blt.n 718a0 │ │ + blt.n 7188e │ │ vtbl.8 d20, {d10-d11}, d2 │ │ add r1, pc │ │ blx edff0 │ │ b.n 71868 │ │ nop │ │ strh r0, [r3, #24] │ │ vtbl.8 d20, {d10-d11}, d1 │ │ @@ -87399,15 +87399,15 @@ │ │ movs r7, r0 │ │ subs r6, #52 @ 0x34 │ │ vcvta.u32.f32 d31, d16 │ │ movs r7, r0 │ │ subs r6, #34 @ 0x22 │ │ vcvta.u32.f32 d31, d8 │ │ movs r7, r0 │ │ - ldr r1, [r0, #56] @ 0x38 │ │ + ldr r5, [r6, #52] @ 0x34 │ │ @ instruction: 0xfffa3ea9 │ │ vtbx.8 d24, {d26-d29}, d21 │ │ vshr.u32 , q0, #6 │ │ movs r7, r0 │ │ add.w r2, r1, r5, lsl #2 │ │ vldr s0, [r2] │ │ b.n 73080 │ │ @@ -87946,15 +87946,15 @@ │ │ subs r4, r1, #5 │ │ movs r0, r1 │ │ adds r6, #208 @ 0xd0 │ │ vcvt.f32.u32 , q0 │ │ vtbl.8 d30, {d11-d12}, d28 │ │ movs r7, r0 │ │ ldmdb ip!, {r0, r1, r2} │ │ - str r7, [r4, #64] @ 0x40 │ │ + str r3, [r3, #64] @ 0x40 │ │ vrint?.f32 , │ │ vrintx.f32 d24, d11 │ │ @ instruction: 0xfffae8fc │ │ movs r7, r0 │ │ bpl.n 736f8 │ │ movs r7, r0 │ │ push {r4, r5, r6, r7, lr} │ │ @@ -88285,16 +88285,16 @@ │ │ vshr.u32 d31, d12, #6 │ │ movs r7, r0 │ │ ands.w r0, r0, #7 │ │ adds r4, r6, #6 │ │ movs r0, r1 │ │ adds r4, r7, #6 │ │ movs r0, r1 │ │ - cbnz r2, 73a68 │ │ - vtbx.8 d27, {d26-d29}, d26 │ │ + cbnz r1, 73a66 │ │ + vtbx.8 d27, {d26-d29}, d17 │ │ vrint?.f32 d25, d12 │ │ vtbx.8 d17, {d11-d14}, d2 │ │ movs r0, r1 │ │ stmia r3!, {r1, r2, r4, r5, r6} │ │ movs r7, r0 │ │ lsls r4, r0, #8 │ │ subs r4, #1 │ │ @@ -88786,24 +88786,24 @@ │ │ movs r0, r1 │ │ adds r2, r7, r3 │ │ movs r0, r1 │ │ subs r7, r2, r2 │ │ vtbl.8 d17, {d26-d28}, d7 │ │ vtbx.8 d17, {d26}, d8 │ │ vcvtn.u32.f32 , q0 │ │ - vcvtp.u32.f32 d21, d23 │ │ + vrshr.u64 d21, d11, #5 │ │ @ instruction: 0xfffaeb14 │ │ movs r7, r0 │ │ add.w r0, r8, r7 │ │ adds r4, r3, r2 │ │ movs r0, r1 │ │ adds r4, r4, r2 │ │ movs r0, r1 │ │ - @ instruction: 0xb6da │ │ - vqshlu.s64 , q1, #58 @ 0x3a │ │ + @ instruction: 0xb6d1 │ │ + vrintm.f32 , │ │ vqshlu.s32 d17, d24, #26 │ │ movs r0, r1 │ │ str r0, [sp, #752] @ 0x2f0 │ │ vcvtp.s32.f32 d30, d24 │ │ movs r7, r0 │ │ adds r6, r0, r0 │ │ movs r0, r1 │ │ @@ -88820,15 +88820,15 @@ │ │ movs r0, r1 │ │ cmp r7, #76 @ 0x4c │ │ vsra.u64 d30, d24, #5 │ │ movs r7, r0 │ │ cmp r7, #58 @ 0x3a │ │ vcvtn.u32.f32 d30, d22 │ │ movs r7, r0 │ │ - ldrb r1, [r4, r2] │ │ + ldrb r5, [r2, r2] │ │ vqrdmlsh.s q9, q13, d9[0] │ │ @ instruction: 0xfffa7d05 │ │ vsra.u32 q15, q10, #6 │ │ movs r7, r0 │ │ pop {r2, r4, r5, r6, pc} │ │ movs r7, r0 │ │ lsls r4, r0, #8 │ │ @@ -89104,15 +89104,15 @@ │ │ subs r1, r1, r0 │ │ str r1, [sp, #32] │ │ movs r0, #0 │ │ b.n 73d6c │ │ ldmia r6, {r3, r4, r6, r7} │ │ movs r7, r0 │ │ cmp r2, #120 @ 0x78 │ │ - vcvt.u32.f32 , │ │ + vqshl.u64 , , #59 @ 0x3b │ │ vtbl.8 d18, {d10-d13}, d11 │ │ vtbx.8 d23, {d10}, d7 │ │ @ instruction: 0xfffac8d0 │ │ movs r7, r0 │ │ ldrh r4, [r0, #32] │ │ vtbl.8 d20, {d10}, d8 │ │ mov.w r1, #5632 @ 0x1600 │ │ @@ -89809,16 +89809,16 @@ │ │ b.n 74774 │ │ b.n 74c40 │ │ movs r7, r0 │ │ lsrs r4, r2, #27 │ │ movs r0, r1 │ │ lsrs r6, r3, #27 │ │ movs r0, r1 │ │ - stmia r3!, {r0, r2, r7} │ │ - vrsra.u32 q14, , #6 │ │ + stmia r3!, {r2, r3, r4, r5, r6} │ │ + vrsra.u32 q14, q9, #6 │ │ vsra.u32 q15, q3, #6 │ │ movs r7, r0 │ │ lsrs r4, r1, #18 │ │ movs r0, r1 │ │ b.n 74b90 │ │ movs r7, r0 │ │ push {r1, r2, r4, r5, r7} │ │ @@ -90290,19 +90290,19 @@ │ │ vsra.u32 d18, d14, #6 │ │ vcvtn.u32.f32 q12, │ │ vrsra.u64 d17, d7, #6 │ │ vtbx.8 d21, {d26-d27}, d30 │ │ vsra.u64 , , #5 │ │ vtbx.8 d21, {d26-d27}, d14 │ │ vtbx.8 d18, {d11-d12}, d26 │ │ - vsri.32 d26, d27, #5 │ │ + vsri.32 d26, d18, #5 │ │ @ instruction: 0xfffafbb8 │ │ vshr.u32 d29, d1, #6 │ │ vcvt.u16.f16 , , #6 │ │ - vcvtn.s32.f32 q9, │ │ + vsra.u32 q9, , #5 │ │ vtbx.8 d31, {d10-d13}, d4 │ │ @ instruction: 0xfffaacb4 │ │ movs r7, r0 │ │ subs r4, #253 @ 0xfd │ │ vtbx.8 d20, {d27-d28}, d23 │ │ mov r0, r6 │ │ movs r2, #18 │ │ @@ -90643,15 +90643,15 @@ │ │ rsb r0, r5, r5, lsl #4 │ │ add.w r0, r4, r0, lsl #2 │ │ add.w r0, r0, #640 @ 0x280 │ │ b.w 75e52 │ │ nop │ │ bls.n 751e2 │ │ vqrdmlah.s q14, q13, d13[0] │ │ - vshr.u32 d18, d5, #6 │ │ + vaddl.u q9, d10, d9 │ │ vcvt.f16.u16 d31, d27, #6 │ │ vqshrun.s64 d21, q1, #7 │ │ @ instruction: 0xfffb4cbb │ │ vrsqrte.u32 q15, │ │ vqshl.u32 d16, d31, #26 │ │ @ instruction: 0xfffa3bd2 │ │ vcvta.u32.f32 , │ │ @@ -90660,36 +90660,36 @@ │ │ @ instruction: 0xfffabbd7 │ │ vshr.u64 d17, d17, #6 │ │ @ instruction: 0xfffb4bd3 │ │ vshr.u64 , , #6 │ │ vdup.16 d20, d0[2] │ │ @ instruction: 0xfffb6bb0 │ │ vrinta.f32 , q11 │ │ - @ instruction: 0xfffa1ef3 │ │ + vqrdmlah.s , q13, d23[0] │ │ @ instruction: 0xfffaf8f6 │ │ vsli.32 d16, d23, #26 │ │ @ instruction: 0xfffb6b70 │ │ @ instruction: 0xfffac348 │ │ vqshlu.s32 d18, d16, #26 │ │ vqrdmlsh.s q8, , d30[0] │ │ - vqrshrun.s64 d25, q4, #5 │ │ - vcvt.f32.u32 , , #6 │ │ + vtbx.8 d25, {d11}, d15 │ │ + vcvt.f32.u32 , , #6 │ │ vtbl.8 d22, {d10-d13}, d0 │ │ - vcvt.f32.u32 d17, d27, #6 │ │ + @ instruction: 0xfffa1e2f │ │ vtbl.8 d31, {d10}, d18 │ │ @ instruction: 0xfffaedd2 │ │ vqrshrn.u64 d26, q13, #6 │ │ movs r7, r0 │ │ vst4. {d31[0],d33[0],d35[0],d37[0]}, [pc :256], r9 │ │ - add r1, pc, #576 @ (adr r1, 75540 ) │ │ + add r1, pc, #540 @ (adr r1, 7551c ) │ │ vtbl.8 d26, {d10-d11}, d18 │ │ movs r7, r0 │ │ - adds r7, r3, #5 │ │ + adds r3, r2, #5 │ │ vqrdmlsh.s , q13, d28[0] │ │ - vqshlu.s64 , q6, #58 @ 0x3a │ │ + vqshlu.s64 , , #58 @ 0x3a │ │ @ instruction: 0xfffa734c │ │ @ instruction: 0xfffa7df0 │ │ ldrb r1, [r6, #24] │ │ subs r0, #48 @ 0x30 │ │ subs r1, #48 @ 0x30 │ │ cmp r1, #10 │ │ add.w r2, r0, r0, lsl #2 │ │ @@ -91091,15 +91091,15 @@ │ │ vqdmulh.s q8, , d30[0] │ │ vmull.u q9, d26, d31 │ │ vmull.u q8, d27, d18 │ │ vdup.16 q9, d19[2] │ │ vcvt.f16.u16 q8, q3, #5 │ │ vqshlu.s32 d26, d28, #26 │ │ movs r7, r0 │ │ - cmp r7, #188 @ 0xbc │ │ + cmp r7, #176 @ 0xb0 │ │ vtrn.32 , │ │ vmla.i , q5, d22[0] │ │ @ instruction: 0xfffadef9 │ │ vshr.u32 d23, d10, #6 │ │ @ instruction: 0xfffadead │ │ vqrdmlsh.s q11, q13, d14[0] │ │ vqrdmlah.s , q5, d17[0] │ │ @@ -92377,15 +92377,15 @@ │ │ nop │ │ stmia r4!, {r1, r3, r4} │ │ movs r7, r0 │ │ stmia r4!, {r2, r4} │ │ movs r7, r0 │ │ add r7, pc, #24 @ (adr r7, 76508 ) │ │ movs r7, r0 │ │ - ldrh r1, [r2, #60] @ 0x3c │ │ + ldrh r0, [r1, #60] @ 0x3c │ │ vtbx.8 d22, {d26-d29}, d10 │ │ @ instruction: 0xfffbee02 │ │ movs r7, r0 │ │ ldr r1, [pc, #960] @ (768c0 ) │ │ vqshlu.s64 q13, q10, #58 @ 0x3a │ │ movs r7, r0 │ │ push {r4, r5, r6, r7, lr} │ │ @@ -92687,15 +92687,15 @@ │ │ b.n 766c0 │ │ stmia r0!, {r1, r2, r5, r6, r7} │ │ movs r7, r0 │ │ stmia r0!, {r5, r6, r7} │ │ movs r7, r0 │ │ add r3, pc, #848 @ (adr r3, 76b60 ) │ │ movs r7, r0 │ │ - asrs r3, r6, #9 │ │ + asrs r7, r4, #9 │ │ vtbl.8 d22, {d26}, d22 │ │ vcvtp.u32.f32 q13, q1 │ │ movs r7, r0 │ │ @ instruction: 0xead00007 │ │ subs r7, #68 @ 0x44 │ │ vrsra.u64 d26, d28, #5 │ │ movs r7, r0 │ │ @@ -93435,15 +93435,15 @@ │ │ movs r7, r0 │ │ add r4, pc, #752 @ (adr r4, 772b8 ) │ │ vtbl.8 d27, {d10}, d6 │ │ movs r7, r0 │ │ ldrsb r5, [r7, r0] │ │ vqshrun.s64 d27, q0, #6 │ │ movs r7, r0 │ │ - subs r6, r1, #5 │ │ + subs r2, r0, #5 │ │ vqshrun.s64 d19, , #6 │ │ vdup.8 , d23[5] │ │ vtrn.32 d27, d1 │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #12 │ │ str r3, [r7, #8] │ │ @@ -94119,24 +94119,24 @@ │ │ nop │ │ ldr r4, [pc, #584] @ (7795c ) │ │ vtbx.8 d26, {d11}, d4 │ │ movs r7, r0 │ │ svc 80 @ 0x50 │ │ movs r7, r0 │ │ movs r7, #237 @ 0xed │ │ - @ instruction: 0xfffafbb9 │ │ + vtbl.8 d31, {d26-d29}, d29 │ │ vcge.f32 d27, d28, #0 │ │ movs r7, r0 │ │ push {r4, r5, r7, lr} │ │ movs r7, r0 │ │ @ instruction: 0xfa4afffa │ │ - @ instruction: 0xfb70fff9 │ │ + @ instruction: 0xfb64fff9 │ │ b.n 7784e │ │ @ instruction: 0xfffa3ade │ │ - vtbl.8 d17, {d27}, d8 │ │ + vqrshrun.s64 d17, q14, #5 │ │ @ instruction: 0xfffaea99 │ │ @ instruction: 0xfff99e23 │ │ ldr r0, [sp, #56] @ 0x38 │ │ lsrs r0, r0, #28 │ │ str r0, [sp, #96] @ 0x60 │ │ ldr r0, [sp, #88] @ 0x58 │ │ cmp r0, #0 │ │ @@ -94458,15 +94458,15 @@ │ │ vqshl.u32 , q2, #26 │ │ @ instruction: 0xfffa9bbd │ │ vqrdmulh.s , q5, d12[0] │ │ vtbx.8 d20, {d11-d14}, d22 │ │ @ instruction: 0xfffb3e82 │ │ vsri.64 d20, d10, #5 │ │ vrecpe.u32 , │ │ - vrinta.f32 , │ │ + vsli.32 , , #26 │ │ vceq.i32 d31, d9, #0 │ │ lsrs r2, r0, #4 │ │ ldr r1, [sp, #124] @ 0x7c │ │ ldr r0, [sp, #132] @ 0x84 │ │ adds r4, #1 │ │ ldr r0, [r0, #8] │ │ cmp r4, r0 │ │ @@ -94877,28 +94877,28 @@ │ │ blt.n 77f98 │ │ ldr r5, [pc, #60] @ (77f24 ) │ │ add.w fp, sp, #1248 @ 0x4e0 │ │ movs r4, #0 │ │ add r5, pc │ │ b.n 77f40 │ │ nop │ │ - strb r6, [r5, #30] │ │ + strb r5, [r4, #30] │ │ vrint?.f32 d20, d2 │ │ vcvtn.s32.f32 d20, d12 │ │ vqrshrun.s64 d20, q3, #5 │ │ vsra.u32 , , #5 │ │ vuzp.32 , │ │ vrsra.u64 d16, d20, #6 │ │ @ instruction: 0xfffb28b4 │ │ @ instruction: 0xfffa8e28 │ │ vsli.64 , q1, #58 @ 0x3a │ │ movs r7, r0 │ │ - ldrb r5, [r4, #29] │ │ + ldrb r4, [r3, #29] │ │ vsra.u32 q10, q5, #6 │ │ - vqrdmlah.s , , d12[0] │ │ + vqrdmlah.s , , d3[0] │ │ vqshlu.s32 q10, q0, #26 │ │ mov r1, fp │ │ blx ee290 │ │ ldr r0, [sp, #132] @ 0x84 │ │ ldr r1, [sp, #140] @ 0x8c │ │ ldr r0, [r0, #16] │ │ str.w sl, [r1] │ │ @@ -95688,15 +95688,15 @@ │ │ vst1.8 {d18-d19}, [r0], r2 │ │ vst1.8 {d20-d21}, [r0] │ │ b.n 788ba │ │ adds r4, #198 @ 0xc6 │ │ vtbx.8 d30, {d11-d13}, d31 │ │ vzip.32 q9, q10 │ │ vrsra.u32 d18, d14, #6 │ │ - vtbx.8 d23, {d11}, d16 │ │ + vqrshrun.s64 d23, , #5 │ │ @ instruction: 0xfffa59f5 │ │ vshr.u32 d25, d17, #6 │ │ vrintm.f32 q8, q1 │ │ vtbx.8 d21, {d11-d12}, d31 │ │ vsra.u32 d20, d13, #6 │ │ vtbx.8 d27, {d10-d12}, d5 │ │ @ instruction: 0xfffa58dd │ │ @@ -95704,17 +95704,17 @@ │ │ vtrn.32 d18, d18 │ │ vsra.u64 q9, q0, #6 │ │ vrsqrte.f32 q8, q13 │ │ vshr.u32 q10, , #5 │ │ vtbl.8 d27, {d26-d27}, d7 │ │ vaddl.u q10, d10, d6 │ │ vshr.u32 , q10, #5 │ │ - vrshr.u64 , q12, #5 │ │ + vcvtp.u32.f32 , q14 │ │ vqshrn.u64 d20, q11, #7 │ │ - vrshr.u32 d22, d5, #6 │ │ + vmovn.i64 d22, q6 │ │ vcvt.f32.u32 , q2, #6 │ │ vtbx.8 d20, {d27-d29}, d20 │ │ add.w r4, sp, #1248 @ 0x4e0 │ │ add r3, sp, #612 @ 0x264 │ │ mov.w r1, #1024 @ 0x400 │ │ add r2, pc │ │ mov r0, r4 │ │ @@ -96044,16 +96044,16 @@ │ │ str r4, [sp, #136] @ 0x88 │ │ cmp r1, #0 │ │ it ne │ │ movne r0, r1 │ │ str r0, [sp, #116] @ 0x74 │ │ b.n 78bea │ │ nop │ │ - str r3, [r2, #16] │ │ - vshr.u64 q11, , #6 │ │ + str r2, [r1, #16] │ │ + vtrn.32 q11, q7 │ │ vqshrun.s64 d18, q4, #6 │ │ vqshl.u32 q9, q7, #27 │ │ @ instruction: 0xfffb2e24 │ │ vrecpe.u32 , q8 │ │ vtbl.8 d19, {d11-d12}, d12 │ │ @ instruction: 0xfffb3bd0 │ │ vcvtm.u32.f32 , q0 │ │ @@ -96417,25 +96417,25 @@ │ │ blx ee290 │ │ ldr r0, [sp, #128] @ 0x80 │ │ str.w r4, [fp] │ │ cmp r0, #0 │ │ bne.n 7901a │ │ b.n 7903e │ │ nop │ │ - lsls r3, r5, #11 │ │ + lsls r7, r3, #11 │ │ vqrdmlah.s , q13, d25[0] │ │ @ instruction: 0xfffa2ffa │ │ vrshr.u64 q10, , #5 │ │ vsra.u32 , q13, #6 │ │ vsri.64 d19, d26, #5 │ │ vcvta.u32.f32 d30, d23 │ │ vtrn.32 q9, │ │ - vcvt.u32.f32 q11, q7, #6 │ │ + vcvt.u32.f32 q11, , #6 │ │ vqrdmlsh.s q9, q5, d4[0] │ │ - vsli.32 , , #27 │ │ + vsli.32 , , #27 │ │ @ instruction: 0xfff94ad2 │ │ mov r0, r8 │ │ mov.w r1, #1024 @ 0x400 │ │ mov r3, sl │ │ add r2, pc │ │ bl 76fe0 │ │ mov r0, r8 │ │ @@ -96744,25 +96744,25 @@ │ │ add r3, sp, #252 @ 0xfc │ │ mov r0, r8 │ │ mov.w r1, #1024 @ 0x400 │ │ add r2, pc │ │ str.w sl, [sp] │ │ b.n 79356 │ │ lsrs r0, r2 │ │ - vtbl.8 d30, {d10-d11}, d25 │ │ + vqshrn.u64 d30, , #6 │ │ vcge.s32 d20, d3, #0 │ │ vqrdmlah.s q13, q13, d10[0] │ │ vrsra.u64 q12, q12, #6 │ │ @ instruction: 0xfffa3fd5 │ │ @ instruction: 0xfffaae20 │ │ vcvt.u32.f32 q15, , #6 │ │ - vrintp.f32 d21, d15 │ │ + vrintp.f32 d21, d6 │ │ @ instruction: 0xfffa1d81 │ │ @ instruction: 0xfffa1eb8 │ │ - vcvt.s32.f32 d30, d8 │ │ + vqshlu.s64 q15, q14, #59 @ 0x3b │ │ vcvt.f32.u32 q14, q13, #7 │ │ @ instruction: 0xfff9cd9a │ │ @ instruction: 0xfffa4a9b │ │ add r0, sp, #252 @ 0xfc │ │ strd r0, sl, [sp] │ │ mov r0, r8 │ │ add r2, pc │ │ @@ -96988,15 +96988,15 @@ │ │ @ instruction: 0xb611 │ │ vdup.16 q9, d6[2] │ │ vshll.u32 q9, d30, #27 │ │ vcvt.f32.s32 q9, q3 │ │ vqrdmlah.s q9, , d4[0] │ │ vqshlu.s32 q9, q9, #27 │ │ vcvtp.u32.f32 d18, d6 │ │ - vtbx.8 d31, {d27-d28}, d13 │ │ + vtbx.8 d31, {d27-d28}, d1 │ │ vtbl.8 d20, {d9-d12}, d2 │ │ ldr r0, [sp, #112] @ 0x70 │ │ add r3, pc │ │ cbz r0, 7960c │ │ b.n 795e4 │ │ nop │ │ asrs r6, r0, #7 │ │ @@ -97821,16 +97821,16 @@ │ │ add r1, pc │ │ blx ee1f0 │ │ str.w r5, [fp] │ │ b.n 79fac │ │ nop │ │ adds r4, #152 @ 0x98 │ │ @ instruction: 0xfffb7999 │ │ - vshll.i32 q11, d19, #32 │ │ - vrintn.f32 d31, d11 │ │ + vrsra.u32 d22, d10, #6 │ │ + vrsra.u64 , , #6 │ │ @ instruction: 0xfff90b97 │ │ @ instruction: 0xfffb2992 │ │ vrintx.f32 d17, d18 │ │ vcvtp.u32.f32 d19, d18 │ │ vcvtp.u32.f32 d19, d18 │ │ vcvtp.s32.f32 , │ │ vsra.u64 d18, d18, #6 │ │ @@ -98194,26 +98194,26 @@ │ │ add.w r0, r0, #1 │ │ bne.n 7a2a2 │ │ b.n 7a31e │ │ adds r0, #172 @ 0xac │ │ @ instruction: 0xfffbfcf8 │ │ vshr.u64 d19, d2, #6 │ │ vshr.u64 d19, d2, #5 │ │ - @ instruction: 0xfffb4a5d │ │ + @ instruction: 0xfffb4a54 │ │ vmla.i , q5, d18[0] │ │ vdup.8 q15, d0[5] │ │ @ instruction: 0xfffa3e88 │ │ vcvt.f32.u32 d23, d17, #6 │ │ vaddl.u , d10, d2 │ │ vcvt.f16.u16 d22, d14, #5 │ │ vshr.u64 , , #6 │ │ @ instruction: 0xfffa2fb6 │ │ vsri.32 , q7, #5 │ │ @ instruction: 0xfffaab18 │ │ - vcgt.f32 d30, d29, #0 │ │ + vcgt.f32 d30, d17, #0 │ │ vsri.32 d23, d23, #7 │ │ sha256su0.32 , │ │ vqmovun.s64 d21, q15 │ │ movs r7, r0 │ │ strb r7, [r2, #15] │ │ vqshlu.s64 d16, d27, #58 @ 0x3a │ │ @ instruction: 0xfffb2fa0 │ │ @@ -98597,22 +98597,22 @@ │ │ b.n 7a39e │ │ asrs r4, r7, #9 │ │ vcvt.u16.f16 d17, d0, #5 │ │ vsli.64 d24, d6, #59 @ 0x3b │ │ movs r7, r0 │ │ pop {r1, r2, r4, r5, r6, pc} │ │ vrshr.u32 d27, d4, #7 │ │ - vsli.64 , , #58 @ 0x3a │ │ - vsli.64 d29, d25, #57 @ 0x39 │ │ + vrintz.f32 , │ │ + vcle.f32 d29, d29, #0 │ │ vcle.s32 , q6, #0 │ │ - vrinta.f32 , │ │ + vrinta.f32 , │ │ vrsra.u64 q12, q9, #7 │ │ movs r7, r0 │ │ sub sp, #8 │ │ - @ instruction: 0xfffadef5 │ │ + vqrdmlah.s , q13, d25[0] │ │ @ instruction: 0xfff9bad8 │ │ vtrn.32 , q13 │ │ vrsra.u64 q11, q3, #6 │ │ movs r7, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -99175,15 +99175,15 @@ │ │ mov fp, r1 │ │ b.n 7ada6 │ │ nop │ │ asrs r2, r0, #8 │ │ vcvtm.s32.f32 d17, d30 │ │ vsra.u32 , q3, #5 │ │ movs r7, r0 │ │ - stmia r4!, {r0, r1, r2, r5, r6, r7} │ │ + stmia r4!, {r0, r1, r3, r4, r6, r7} │ │ @ instruction: 0xfff97dda │ │ movs r7, r0 │ │ ldrb r6, [r3, #27] │ │ movs r7, r0 │ │ lsls r4, r1, #20 │ │ vsli.32 q8, q5, #26 │ │ vqshl.u32 d17, d24, #27 │ │ @@ -99593,15 +99593,15 @@ │ │ movs r7, r0 │ │ strh r7, [r0, #46] @ 0x2e │ │ vzip.32 , │ │ @ instruction: 0xfffaed8f │ │ vceq.f32 d17, d0, #0 │ │ @ instruction: 0xfffb08da │ │ @ instruction: 0xfffb8e86 │ │ - vcvt.u32.f32 d27, d12, #6 │ │ + vcvt.u32.f32 d27, d0, #6 │ │ @ instruction: 0xfff9ea5b │ │ vclt.f32 q10, q4, #0 │ │ blx ee250 │ │ ldr r6, [sp, #236] @ 0xec │ │ add.w r2, r0, #16 │ │ ldr r1, [r6, #0] │ │ cmp r2, r1 │ │ @@ -100062,24 +100062,24 @@ │ │ vaddl.u q10, d10, d0 │ │ movs r7, r0 │ │ strh r1, [r5, #8] │ │ @ instruction: 0xfffa6a93 │ │ @ instruction: 0xfffa0b78 │ │ vqrdmlsh.s , , d22[0] │ │ movs r7, r0 │ │ - subs r7, #31 │ │ + subs r7, #22 │ │ vrintm.f32 d30, d29 │ │ - vcgt.f32 q15, , #0 │ │ + vsri.32 d30, d21, #7 │ │ vsri.32 d23, d4, #7 │ │ - vrsra.u64 , q1, #6 │ │ + sha256su0.32 , │ │ vrint?.f32 , │ │ vzip.32 q13, q2 │ │ - @ instruction: 0xfff949d3 │ │ + vtbx.8 d20, {d25-d26}, d10 │ │ @ instruction: 0xfffa0b7a │ │ - @ instruction: 0xfffbcf0f │ │ + @ instruction: 0xfffbcf03 │ │ vtbx.8 d16, {d25-d28}, d30 │ │ vcvtp.s32.f32 , │ │ movs r0, #83 @ 0x53 │ │ movt r0, #99 @ 0x63 │ │ str.w r0, [sp, #251] @ 0xfb │ │ movw r0, #28486 @ 0x6f46 │ │ movt r0, #21351 @ 0x5367 │ │ @@ -100430,38 +100430,38 @@ │ │ nop │ │ stmia r0!, {r0, r2, r3, r5} │ │ @ instruction: 0xfffaeefa │ │ vmull.u , d25, d28 │ │ movs r7, r0 │ │ mrc 15, 4, APSR_nzcv, cr10, cr9, {7} │ │ vmaxnm.f32 , q11, q13 │ │ - ldmia r5!, {r1, r4} │ │ + ldmia r5!, {r1, r2} │ │ vqshlu.s32 , , #25 │ │ vrintn.f32 , │ │ - vrintm.f32 , │ │ + vqshlu.s64 , , #58 @ 0x3a │ │ @ instruction: 0xfff97bfc │ │ vqshl.u64 d31, d1, #58 @ 0x3a │ │ - vcle.f32 , , #0 │ │ - vrsubhn.i d27, , q10 │ │ + vsli.64 , , #57 @ 0x39 │ │ + vqshlu.s64 d27, d8, #57 @ 0x39 │ │ vtbl.8 d21, {d25-d27}, d4 │ │ @ instruction: 0xfffabd91 │ │ @ instruction: 0xfffa9cf0 │ │ @ instruction: 0xfffa5a72 │ │ vcvt.u16.f16 , , #6 │ │ vrsra.u32 d29, d12, #6 │ │ @ instruction: 0xfffabd81 │ │ vrintx.f32 q11, │ │ vqrdmulh.s , q5, d17[0] │ │ - vrintm.f32 d27, d6 │ │ - vshr.u32 q14, , #7 │ │ + vqshlu.s32 , q13, #26 │ │ + vcgt.s32 q14, , #0 │ │ vrsra.u32 d29, d12, #7 │ │ vrintm.f32 d31, d28 │ │ vneg.f32 q13, │ │ vcge.f32 d22, d19, #0 │ │ - vrint?.f32 , q8 │ │ + vqshlu.s32 , q2, #26 │ │ vcvt.u16.f16 d25, d21, #7 │ │ vshll.u32 , d10, #25 │ │ vqrdmlsh.s q12, q13, d14[0] │ │ vrintm.f32 d31, d0 │ │ vqshl.u64 d26, d5, #57 @ 0x39 │ │ vsra.u64 d25, d11, #7 │ │ vcvt.f16.u16 d16, d19, #7 │ │ @@ -100769,32 +100769,32 @@ │ │ b.n 7be50 │ │ push {r1, r2} │ │ vmovn.i64 d29, q14 │ │ vrintm.f32 d28, d30 │ │ vtbl.8 d21, {d10-d11}, d16 │ │ vqshlu.s64 d26, d0, #58 @ 0x3a │ │ vqshrn.u64 d21, q3, #7 │ │ - @ instruction: 0xfffabf09 │ │ + @ instruction: 0xfffabefd │ │ @ instruction: 0xfff979f8 │ │ vrintm.f32 d28, d12 │ │ vdup.16 d27, d13[2] │ │ vsli.64 q13, q3, #58 @ 0x3a │ │ vtbx.8 d27, {d9-d12}, d27 │ │ - vrsra.u32 , , #6 │ │ - vrsra.u32 , , #7 │ │ + vrsra.u32 , , #6 │ │ + vabs.s32 , │ │ vsli.32 q14, , #25 │ │ - @ instruction: 0xfffabe09 │ │ + @ instruction: 0xfffabdfd │ │ vqshl.u64 , q3, #57 @ 0x39 │ │ vtbx.8 d27, {d26-d28}, d19 │ │ vqmovn.u64 d27, q1 │ │ vtrn.32 d30, d4 │ │ vrinta.f32 q13, q12 │ │ vceq.f32 q13, q9, #0 │ │ vtbx.8 d27, {d25-d27}, d3 │ │ - vqshl.u32 , q3, #26 │ │ + vrint?.f32 , │ │ vtbl.8 d30, {d26-d29}, d23 │ │ vrshr.u64 d27, d10, #6 │ │ vqshl.u64 d21, d14, #58 @ 0x3a │ │ vtbl.8 d27, {d26-d28}, d25 │ │ vsra.u64 d22, d18, #6 │ │ vrintx.f32 d26, d19 │ │ @ instruction: 0xfffafcf4 │ │ @@ -101405,21 +101405,21 @@ │ │ mov.w fp, #17 │ │ str r0, [sp, #136] @ 0x88 │ │ ldr r0, [sp, #120] @ 0x78 │ │ b.n 7c4c6 │ │ nop │ │ str r6, [r5, #112] @ 0x70 │ │ movs r7, r0 │ │ - subs r4, #42 @ 0x2a │ │ + subs r4, #33 @ 0x21 │ │ vrsra.u32 d30, d15, #6 │ │ @ instruction: 0xfff99e0b │ │ vsli.32 d22, d23, #26 │ │ vqmovn.s64 d16, │ │ vqmovun.s64 d30, │ │ - @ instruction: 0xfff93af1 │ │ + vtbx.8 d19, {d25-d27}, d24 │ │ vtbl.8 d25, {d10-d13}, d21 │ │ cmp.w fp, #17 │ │ beq.n 7c482 │ │ ldr r0, [sp, #120] @ 0x78 │ │ sub.w r2, r0, #17 │ │ clz r2, r2 │ │ lsrs r2, r2, #5 │ │ @@ -101801,20 +101801,20 @@ │ │ movs r7, r0 │ │ str r0, [r2, #12] │ │ movs r7, r0 │ │ b.n 7cae4 │ │ vtbl.8 d25, {d26-d28}, d24 │ │ @ instruction: 0xfffa2cfa │ │ movs r7, r0 │ │ - cbz r2, 7c8d8 │ │ + uxtb r6, r6 │ │ vcvt.u32.f32 q12, q8, #7 │ │ vrint?.f32 , │ │ vtbx.8 d30, {d26}, d30 │ │ vceq.i32 q11, , #0 │ │ - @ instruction: 0xfffa2b9c │ │ + @ instruction: 0xfffa2b93 │ │ @ instruction: 0xfffaefdc │ │ vrint?.f32 q10, q4 │ │ blx ee250 │ │ ldr r1, [r6, #0] │ │ add.w r2, r0, #24 │ │ cmp r2, r1 │ │ ble.n 7c8d4 │ │ @@ -102810,15 +102810,15 @@ │ │ ldr r2, [pc, #480] @ (7d57c ) │ │ add r2, pc │ │ b.n 7d3b4 │ │ nop │ │ bl 1ba398 │ │ @ instruction: 0xeff8fffa │ │ strh r3, [r0, #44] @ 0x2c │ │ - vcvt.u16.f16 q9, q15, #7 │ │ + vcvt.u16.f16 q9, , #7 │ │ @ instruction: 0xfffa4a70 │ │ add r2, pc │ │ ldr r3, [pc, #460] @ (7d584 ) │ │ ldr r0, [pc, #464] @ (7d588 ) │ │ add r3, pc │ │ add r0, pc │ │ strd r3, r0, [sp] │ │ @@ -102966,16 +102966,16 @@ │ │ vsra.u32 d20, d14, #6 │ │ vshll.u32 , d28, #26 │ │ @ instruction: 0xfffa0bd3 │ │ vshr.u64 q10, q14, #6 │ │ vrintn.f32 d26, d9 │ │ vrsra.u32 q12, , #6 │ │ vtbl.8 d27, {d26-d27}, d25 │ │ - vtbl.8 d18, {d26-d29}, d16 │ │ - @ instruction: 0xfffa2bb9 │ │ + @ instruction: 0xfffa2b97 │ │ + @ instruction: 0xfffa2bb0 │ │ vrintn.f32 d26, d16 │ │ vshr.u32 q10, q3, #6 │ │ @ instruction: 0xfffaa363 │ │ @ instruction: 0xfffa0a9c │ │ vqrshrun.s64 d30, q4, #6 │ │ vrintz.f32 d19, d2 │ │ movs r7, r0 │ │ @@ -103349,15 +103349,15 @@ │ │ mov fp, r0 │ │ str r6, [r4, #0] │ │ b.n 7d8d4 │ │ strh r2, [r6, r6] │ │ movs r7, r0 │ │ strh r4, [r2, r6] │ │ movs r7, r0 │ │ - adds r4, r4, #7 │ │ + adds r3, r3, #7 │ │ vqshlu.s32 q10, q4, #26 │ │ blx ee250 │ │ ldr r3, [sp, #28] │ │ adds r2, r0, #2 │ │ ldr r1, [r3, #0] │ │ cmp r2, r1 │ │ ble.n 7d96a │ │ @@ -103390,21 +103390,21 @@ │ │ adds r4, #206 @ 0xce │ │ movs r7, r0 │ │ bge.n 7da80 │ │ vsra.u32 , q0, #7 │ │ @ instruction: 0xfffa8b94 │ │ vsri.64 d18, d6, #7 │ │ movs r7, r0 │ │ - @ instruction: 0xb858 │ │ + @ instruction: 0xb84c │ │ vtbx.8 d24, {d9-d11}, d25 │ │ - vqshrn.u64 d25, , #7 │ │ + vtbl.8 d25, {d9-d10}, d7 │ │ @ instruction: 0xfff98a78 │ │ vceq.i32 , q13, #0 │ │ movs r7, r0 │ │ - subs r4, r1, r7 │ │ + subs r3, r0, r7 │ │ vuzp.32 d21, d6 │ │ vshr.u64 , q12, #6 │ │ vrintp.f32 q15, q3 │ │ vrsra.u32 , , #6 │ │ vsli.32 d30, d24, #25 │ │ vrintn.f32 q14, q0 │ │ vcvt.f32.u32 d23, d28, #6 │ │ @@ -103672,24 +103672,24 @@ │ │ b.n 7dcca │ │ mov r6, r5 │ │ b.n 7dcfa │ │ ldr r7, [pc, #360] @ (7de04 ) │ │ movs r7, r0 │ │ ldr r7, [pc, #240] @ (7dd90 ) │ │ movs r7, r0 │ │ - adds r0, r0, r6 │ │ + adds r7, r6, r5 │ │ vrshr.u64 d30, d18, #6 │ │ @ instruction: 0xfffa1ff8 │ │ movs r7, r0 │ │ strh r7, [r2, #46] @ 0x2e │ │ vabs.s32 d16, d23 │ │ vqrdmlsh.s q12, q5, d1[0] │ │ vcvt.u16.f16 d20, d2, #6 │ │ movs r7, r0 │ │ - asrs r4, r6, #29 │ │ + asrs r3, r5, #29 │ │ vmull.u q10, d26, d30 │ │ @ instruction: 0xfffa4c9e │ │ vaddl.u q9, d10, d0 │ │ ldr r1, [pc, #956] @ (7e088 ) │ │ mov r2, r4 │ │ ldr r6, [pc, #956] @ (7e08c ) │ │ cmp r0, #0 │ │ @@ -104086,15 +104086,15 @@ │ │ lsls r5, r4, #2 │ │ lsls r4, r2, #3 │ │ lsls r1, r1, #2 │ │ nop │ │ bgt.n 7e130 │ │ vrsra.u64 , q10, #6 │ │ vzip.32 d22, d20 │ │ - vrshr.u32 d25, d26, #6 │ │ + vmovn.i64 d25, q15 │ │ vcvt.u16.f16 , , #7 │ │ vsra.u64 d30, d12, #7 │ │ vqshlu.s32 q15, q7, #26 │ │ vtbx.8 d20, {d10-d12}, d28 │ │ movs r7, r0 │ │ subs r4, #144 @ 0x90 │ │ movs r7, r0 │ │ @@ -104105,15 +104105,15 @@ │ │ stmia r6!, {r2, r3, r4, r5, r7} │ │ vmlsl.u q15, d25, d5[0] │ │ @ instruction: 0xfff96a7b │ │ vshll.u32 q11, d1, #26 │ │ vrint?.f32 q14, q4 │ │ vqrdmlah.s q12, , d3[0] │ │ @ instruction: 0xfffaac9f │ │ - vcvt.u32.f32 d26, d21, #6 │ │ + @ instruction: 0xfffaaf29 │ │ vtbx.8 d20, {d25-d27}, d4 │ │ add r2, pc │ │ b.n 7e272 │ │ strd r2, sl, [sp, #28] │ │ mov r0, r8 │ │ ldr r2, [pc, #776] @ (7e424 ) │ │ mov.w r1, #1024 @ 0x400 │ │ @@ -104445,43 +104445,43 @@ │ │ lsls r3, r3, #1 │ │ ldr r2, [pc, #688] @ (7e6cc ) │ │ add r2, pc │ │ b.n 7e58c │ │ nop │ │ strh r4, [r4, r7] │ │ vcvt.u32.f32 q14, , #6 │ │ - @ instruction: 0xfff9add3 │ │ - @ instruction: 0xfff98e8c │ │ + vqrdmulh.s q13, , d7[0] │ │ + @ instruction: 0xfff98e80 │ │ vsli.32 , , #25 │ │ vsri.64 , q6, #6 │ │ vrinta.f32 , │ │ vtbl.8 d26, {d10-d13}, d10 │ │ vrinta.f32 , │ │ @ instruction: 0xfffa3cbd │ │ - vcvt.f32.u32 q12, q13, #6 │ │ - vtbx.8 d25, {d9}, d15 │ │ + vqrdmlah.s q12, q5, d30[0] │ │ + vtbx.8 d25, {d9}, d3 │ │ @ instruction: 0xfff9ab10 │ │ @ instruction: 0xfffacea0 │ │ @ instruction: 0xfff97fb5 │ │ @ instruction: 0xfff93c99 │ │ - vcvt.f32.u32 q12, q3, #6 │ │ + vqrdmlah.s q12, q5, d10[0] │ │ vceq.f32 d23, d29, #0 │ │ vneg.f32 q11, q3 │ │ vcvt.f32.u32 q14, q12, #6 │ │ @ instruction: 0xfff97f8d │ │ @ instruction: 0xfff96993 │ │ vcgt.f32 d30, d27, #0 │ │ vceq.f32 d23, d5, #0 │ │ vsri.64 , , #7 │ │ vqshl.u64 d22, d12, #58 @ 0x3a │ │ @ instruction: 0xfffa8cb2 │ │ @ instruction: 0xfffaaad8 │ │ vcvt.u32.f32 , q5, #6 │ │ vcvt.u32.f32 d23, d30, #6 │ │ - vqshl.u64 d25, d27, #57 @ 0x39 │ │ + vneg.f32 d25, d31 │ │ vcvt.f32.u32 d28, d21, #7 │ │ vrshr.u64 d21, d10, #7 │ │ @ instruction: 0xfffa9f2e │ │ vrintx.f32 d25, d31 │ │ @ instruction: 0xfffa7e8e │ │ vcgt.f32 d25, d19, #0 │ │ vtbl.8 d18, {d10}, d4 │ │ @@ -104675,27 +104675,27 @@ │ │ addw sp, sp, #1188 @ 0x4a4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ blx ee280 │ │ nop │ │ adds r0, #110 @ 0x6e │ │ movs r7, r0 │ │ - asrs r4, r2, #32 │ │ + asrs r3, r1, #32 │ │ vrintn.f32 q14, │ │ - vcvt.f16.u16 d26, d11, #6 │ │ + vdup.16 d26, d15[2] │ │ @ instruction: 0xfff97e26 │ │ - vcvt.f16.u16 d26, d5, #7 │ │ + vdup.8 d26, d9[4] │ │ vneg.s32 d25, d1 │ │ @ instruction: 0xfffa7e20 │ │ @ instruction: 0xfff98b58 │ │ vtbl.8 d24, {d26-d29}, d0 │ │ vtbx.8 d27, {d10-d11}, d2 │ │ vcvt.f32.u32 d25, d21, #6 │ │ @ instruction: 0xfffa9369 │ │ - vrintm.f32 , │ │ + vqshlu.s64 d25, d27, #58 @ 0x3a │ │ vneg.s32 d25, d17 │ │ @ instruction: 0xfffa3a76 │ │ vsra.u64 d23, d24, #6 │ │ vqmovn.s64 d25, │ │ vzip.32 d25, d19 │ │ @ instruction: 0xfffa7cdf │ │ vqshl.u64 d29, d27, #57 @ 0x39 │ │ @@ -104704,16 +104704,16 @@ │ │ @ instruction: 0xfffaf99a │ │ vrshr.u32 d25, d27, #7 │ │ vtbx.8 d26, {d10}, d10 │ │ @ instruction: 0xfffaf9df │ │ vrshr.u32 d25, d9, #7 │ │ vuzp.32 , │ │ vqshl.u64 q13, , #58 @ 0x3a │ │ - @ instruction: 0xfffa19b4 │ │ - vtbx.8 d17, {d26-d27}, d15 │ │ + vtbl.8 d17, {d26-d27}, d27 │ │ + vtbx.8 d17, {d26-d27}, d6 │ │ vrshr.u32 d25, d20, #6 │ │ vzip.32 d25, d13 │ │ @ instruction: 0xfffade90 │ │ vrintn.f32 d18, d14 │ │ movs r7, r0 │ │ cmn r6, r4 │ │ movs r7, r0 │ │ @@ -105416,15 +105416,15 @@ │ │ add r3, sp, #708 @ 0x2c4 │ │ @ instruction: 0xfffaab9f │ │ @ instruction: 0xfffa3b10 │ │ movs r7, r0 │ │ subs r3, #34 @ 0x22 │ │ movs r7, r0 │ │ ldrsh.w pc, [r4, #249]! │ │ - @ instruction: 0xfb68fff9 │ │ + @ instruction: 0xfb5ffff9 │ │ strb r4, [r4, #13] │ │ @ instruction: 0xfffa3afb │ │ movs r7, r0 │ │ subs r2, #236 @ 0xec │ │ movs r7, r0 │ │ str r2, [r5, #96] @ 0x60 │ │ movs r7, r0 │ │ @@ -105539,15 +105539,15 @@ │ │ add r2, sp, #636 @ 0x27c │ │ vtbl.8 d26, {d26-d28}, d13 │ │ vtbl.8 d19, {d10-d12}, d10 │ │ movs r7, r0 │ │ subs r2, #28 │ │ movs r7, r0 │ │ strh.w pc, [r2, #249]! │ │ - @ instruction: 0xfa56fff9 │ │ + @ instruction: 0xfa4dfff9 │ │ add r6, sp, #264 @ 0x108 │ │ @ instruction: 0xfff939f5 │ │ movs r7, r0 │ │ subs r1, #230 @ 0xe6 │ │ movs r7, r0 │ │ str r0, [r3, #80] @ 0x50 │ │ movs r7, r0 │ │ @@ -105737,26 +105737,26 @@ │ │ add r1, sp, #636 @ 0x27c │ │ vtbl.8 d26, {d26-d27}, d13 │ │ vqshrn.u64 d19, q3, #6 │ │ movs r7, r0 │ │ subs r1, #40 @ 0x28 │ │ movs r7, r0 │ │ bl fffa21b2 │ │ - ldr??.w pc, [r6, #249]! │ │ + @ instruction: 0xf94dfff9 │ │ subs r3, r3, r7 │ │ vtbl.8 d19, {d10-d11}, d1 │ │ movs r7, r0 │ │ str r4, [r3, #64] @ 0x40 │ │ movs r7, r0 │ │ lsrs r4, r3, #9 │ │ movs r7, r0 │ │ subs r0, #216 @ 0xd8 │ │ movs r7, r0 │ │ - ldrb r0, [r2, #31] │ │ - vsri.64 d25, d9, #7 │ │ + ldrb r4, [r0, #31] │ │ + vcge.f32 d25, d13, #0 │ │ vtbx.8 d19, {d25}, d0 │ │ movs r7, r0 │ │ str r0, [r4, #28] │ │ movs r7, r0 │ │ subs r0, #102 @ 0x66 │ │ movs r7, r0 │ │ adds r0, r3, r4 │ │ @@ -106253,28 +106253,28 @@ │ │ add r4, pc, #92 @ (adr r4, 7f718 ) │ │ vrsra.u64 q13, , #6 │ │ vrsra.u32 , q9, #6 │ │ movs r7, r0 │ │ adds r3, #132 @ 0x84 │ │ movs r7, r0 │ │ bl 1f26be │ │ - bl 4266c2 │ │ + bl 41d6c2 │ │ strh r6, [r6, r7] │ │ vrsra.u32 , , #6 │ │ movs r7, r0 │ │ adds r3, #78 @ 0x4e │ │ movs r7, r0 │ │ ldrsh r0, [r5, r1] │ │ movs r7, r0 │ │ lsls r0, r5, #18 │ │ movs r7, r0 │ │ adds r3, #48 @ 0x30 │ │ movs r7, r0 │ │ str r0, [r3, #12] │ │ - vrsra.u64 q12, , #7 │ │ + vneg.s32 q12, │ │ Address 0x7f6ee is out of bounds. │ │ │ │ │ │ 0007f6f0 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ @@ -106421,26 +106421,26 @@ │ │ add r2, pc, #868 @ (adr r2, 7fba8 ) │ │ vqmovn.u64 d26, │ │ vqmovun.s64 d19, q12 │ │ movs r7, r0 │ │ adds r2, #122 @ 0x7a │ │ movs r7, r0 │ │ bl dc846 │ │ - bl 31084a │ │ + bl 30784a │ │ b.n 7f820 │ │ vrshr.u32 , , #7 │ │ movs r7, r0 │ │ ldrb r6, [r2, r5] │ │ movs r7, r0 │ │ lsls r6, r2, #14 │ │ movs r7, r0 │ │ adds r2, #42 @ 0x2a │ │ movs r7, r0 │ │ ldr r0, [pc, #428] @ (7fa1c ) │ │ - vrintp.f32 q8, q15 │ │ + vrintp.f32 q8, │ │ vrshr.u32 d19, d2, #6 │ │ movs r7, r0 │ │ ldrh r0, [r3, r4] │ │ movs r7, r0 │ │ │ │ 0007f87c : │ │ push {r4, r5, r7, lr} │ │ @@ -106578,15 +106578,15 @@ │ │ add r1, pc, #164 @ (adr r1, 7fa48 ) │ │ vsra.u32 d26, d5, #6 │ │ vtrn.32 , q0 │ │ movs r7, r0 │ │ adds r0, #214 @ 0xd6 │ │ movs r7, r0 │ │ mcr 15, 5, pc, cr6, cr9, {7} @ │ │ - bl 15a9aa │ │ + bl 1519aa │ │ add r7, sp, #124 @ 0x7c │ │ vtrn.32 d19, d19 │ │ movs r7, r0 │ │ ldrh r2, [r3, r6] │ │ movs r7, r0 │ │ lsls r0, r3, #7 │ │ movs r7, r0 │ │ @@ -106941,15 +106941,15 @@ │ │ cmp r7, #112 @ 0x70 │ │ movs r7, r0 │ │ ldrh r6, [r6, r1] │ │ movs r7, r0 │ │ ldr r7, [sp, #644] @ 0x284 │ │ vcvt.u32.f32 d25, d27, #6 │ │ @ instruction: 0xfffaecd4 │ │ - @ instruction: 0xfff9ef08 │ │ + @ instruction: 0xfff9eeff │ │ vceq.f32 d20, d20, #0 │ │ vqrdmlah.s q9, q13, d19[0] │ │ movs r7, r0 │ │ ldr r6, [r1, r7] │ │ movs r7, r0 │ │ movs r6, r1 │ │ movs r7, r0 │ │ @@ -106966,15 +106966,15 @@ │ │ cmp r6, #150 @ 0x96 │ │ movs r7, r0 │ │ ldr r4, [r2, r6] │ │ movs r7, r0 │ │ str r3, [r5, #104] @ 0x68 │ │ vqshlu.s64 d22, d13, #58 @ 0x3a │ │ vqdmulh.s q13, q13, d22[0] │ │ - vcvt.f32.u32 q15, q15, #6 │ │ + vcvt.f32.u32 q15, , #6 │ │ vsri.64 d20, d10, #7 │ │ vcvt.u16.f16 d18, d18, #6 │ │ movs r7, r0 │ │ cmp r5, #50 @ 0x32 │ │ movs r7, r0 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ @@ -107095,15 +107095,15 @@ │ │ ldr r4, [sp, #292] @ 0x124 │ │ vcvt.f16.u16 d25, d23, #6 │ │ vdup.16 d18, d4[2] │ │ movs r7, r0 │ │ cmp r4, #22 │ │ movs r7, r0 │ │ strd pc, pc, [sl, #996] @ 0x3e4 │ │ - @ instruction: 0xebfefff9 │ │ + @ instruction: 0xebf5fff9 │ │ tst r2, r6 │ │ vtbx.8 d18, {d26-d29}, d29 │ │ movs r7, r0 │ │ ldrsb r4, [r0, r3] │ │ movs r7, r0 │ │ stc2 0, cr0, [r4, #-24] @ 0xffffffe8 │ │ cmp r3, #196 @ 0xc4 │ │ @@ -107235,15 +107235,15 @@ │ │ ldr r3, [sp, #4] │ │ vtbx.8 d25, {d26-d28}, d31 │ │ vtbx.8 d18, {d26-d28}, d8 │ │ movs r7, r0 │ │ cmp r2, #218 @ 0xda │ │ movs r7, r0 │ │ stmia.w r2, {r0, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc} │ │ - @ instruction: 0xeab6fff9 │ │ + @ instruction: 0xeaadfff9 │ │ subs r2, r5, #6 │ │ @ instruction: 0xfffa2ab1 │ │ movs r7, r0 │ │ strb r4, [r7, r5] │ │ movs r7, r0 │ │ @ instruction: 0xfbbc0006 │ │ cmp r2, #136 @ 0x88 │ │ @@ -107702,78 +107702,78 @@ │ │ cmp r0, #188 @ 0xbc │ │ movs r7, r0 │ │ strh r2, [r1, r6] │ │ movs r7, r0 │ │ ldr r0, [sp, #724] @ 0x2d4 │ │ vtbl.8 d25, {d26}, d23 │ │ vqshlu.s32 d30, d30, #26 │ │ - vqrshrun.s64 d30, q9, #7 │ │ + vtbx.8 d30, {d9}, d25 │ │ @ instruction: 0xfff93eb4 │ │ vtbl.8 d18, {d26}, d5 │ │ movs r7, r0 │ │ strh r0, [r7, r4] │ │ movs r7, r0 │ │ ldr??.w r0, [r8, r6] │ │ cmp r0, #92 @ 0x5c │ │ movs r7, r0 │ │ - bl 1ff45e │ │ + bl 1f645e │ │ ldr r1, [sp, #856] @ 0x358 │ │ vtbx.8 d18, {d9}, d4 │ │ movs r7, r0 │ │ cmp r0, #78 @ 0x4e │ │ movs r7, r0 │ │ strh r2, [r7, r3] │ │ movs r7, r0 │ │ cmp r0, #56 @ 0x38 │ │ movs r7, r0 │ │ strh r6, [r7, r3] │ │ movs r7, r0 │ │ strb r0, [r1, r6] │ │ vsli.32 , q13, #25 │ │ vrsubhn.i d26, , q4 │ │ - vrintp.f32 q15, q11 │ │ + vqshl.u64 q15, , #58 @ 0x3a │ │ @ instruction: 0xfff93e28 │ │ vtbl.8 d18, {d10}, d8 │ │ movs r7, r0 │ │ strh r4, [r5, r2] │ │ movs r7, r0 │ │ movs r7, #242 @ 0xf2 │ │ movs r7, r0 │ │ strh r0, [r6, r2] │ │ movs r7, r0 │ │ bge.n 80550 │ │ vtbx.8 d29, {d9-d11}, d4 │ │ vcle.s32 q13, q8, #0 │ │ - vqshl.u64 d30, d8, #57 @ 0x39 │ │ + vneg.f32 d30, d15 │ │ @ instruction: 0xfff93dda │ │ vrintp.f32 q9, q1 │ │ movs r7, r0 │ │ strh r6, [r3, r1] │ │ movs r7, r0 │ │ movs r7, #172 @ 0xac │ │ movs r7, r0 │ │ strh r2, [r4, r1] │ │ movs r7, r0 │ │ cmp r6, fp │ │ vsli.32 q10, q0, #26 │ │ - @ instruction: 0xfffaef9e │ │ - vabs.f32 q15, q5 │ │ + @ instruction: 0xfffaef95 │ │ + vabs.f32 q15, │ │ @ instruction: 0xfff93d8c │ │ vqshl.u32 q9, q14, #26 │ │ movs r7, r0 │ │ strh r0, [r2, r0] │ │ movs r7, r0 │ │ movs r7, #102 @ 0x66 │ │ movs r7, r0 │ │ strh r4, [r2, r0] │ │ movs r7, r0 │ │ - b.n 803de │ │ - vabs.f32 q15, │ │ + b.n 803cc │ │ + vqshl.u32 q15, q7, #25 │ │ vcvt.f32.u32 q14, , #7 │ │ - vqshlu.s64 q15, q14, #57 @ 0x39 │ │ + vqshlu.s64 q15, , #57 @ 0x39 │ │ vcvt.u16.f16 d19, d30, #7 │ │ vqrdmlsh.s q10, q13, d0[0] │ │ movs r7, r0 │ │ @ instruction: 0xf7cc0006 │ │ ldr r7, [pc, #312] @ (80648 ) │ │ movs r7, r0 │ │ movs r0, r0 │ │ @@ -109478,15 +109478,15 @@ │ │ strh r7, [r3, #30] │ │ sha256su0.32 q12, │ │ sha256su0.32 , q13 │ │ movs r7, r0 │ │ asrs r4, r7, #15 │ │ movs r7, r0 │ │ bne.n 817f8 │ │ - vrsra.u64 d29, d4, #7 │ │ + vneg.s32 d29, d11 │ │ vcgt.s32 , , #0 │ │ vrsra.u64 , , #7 │ │ movs r7, r0 │ │ asrs r4, r0, #15 │ │ movs r7, r0 │ │ subs r6, #86 @ 0x56 │ │ movs r7, r0 │ │ @@ -109687,15 +109687,15 @@ │ │ asrs r0, r2, #12 │ │ movs r7, r0 │ │ subs r5, #50 @ 0x32 │ │ movs r7, r0 │ │ strh r5, [r3, #18] │ │ vqmovun.s64 d24, │ │ vqrdmlsh.s q14, q13, d22[0] │ │ - vrshr.u32 d29, d10, #7 │ │ + vrshr.u32 d29, d1, #7 │ │ vtbx.8 d20, {d9-d11}, d10 │ │ vrshr.u64 , , #6 │ │ movs r7, r0 │ │ subs r4, #224 @ 0xe0 │ │ movs r7, r0 │ │ b.n 81f80 │ │ movs r6, r0 │ │ @@ -110073,15 +110073,15 @@ │ │ asrs r0, r1, #3 │ │ movs r7, r0 │ │ subs r3, #50 @ 0x32 │ │ movs r7, r0 │ │ strh r5, [r3, #2] │ │ vmla.i q12, q5, d15[0] │ │ vqrdmulh.s q14, q13, d22[0] │ │ - vshr.u32 d29, d10, #7 │ │ + vshr.u32 d29, d1, #7 │ │ vtbl.8 d20, {d9}, d30 │ │ vshr.u64 d17, d1, #6 │ │ movs r7, r0 │ │ subs r2, #228 @ 0xe4 │ │ movs r7, r0 │ │ b.n 81ee8 │ │ movs r6, r0 │ │ @@ -110096,15 +110096,15 @@ │ │ asrs r0, r0, #1 │ │ movs r7, r0 │ │ subs r2, #158 @ 0x9e │ │ movs r7, r0 │ │ ldrb r1, [r1, #31] │ │ @ instruction: 0xfffa7fbb │ │ vcvt.u16.f16 q14, q1, #6 │ │ - @ instruction: 0xfff9cf86 │ │ + vcvt.u32.f32 q14, , #7 │ │ vqshl.u64 d20, d10, #57 @ 0x39 │ │ vaddl.u , d10, d9 │ │ movs r7, r0 │ │ b.n 81e08 │ │ movs r6, r0 │ │ lsrs r2, r4, #31 │ │ movs r7, r0 │ │ @@ -110117,15 +110117,15 @@ │ │ lsrs r0, r0, #31 │ │ movs r7, r0 │ │ subs r2, #18 │ │ movs r7, r0 │ │ ldrb r5, [r7, #28] │ │ @ instruction: 0xfffa7f2f │ │ vqdmulh.s q14, q13, d6[0] │ │ - @ instruction: 0xfff9cefa │ │ + @ instruction: 0xfff9cef1 │ │ vabs.f32 d20, d14 │ │ @ instruction: 0xfffa0f89 │ │ movs r7, r0 │ │ b.n 81d28 │ │ movs r6, r0 │ │ lsrs r2, r4, #29 │ │ movs r7, r0 │ │ @@ -110439,15 +110439,15 @@ │ │ movweq r6, #32856 @ 0x8058 │ │ b.n 81be6 │ │ nop │ │ lsrs r4, r2, #18 │ │ movs r7, r0 │ │ ldrb r7, [r7, #15] │ │ @ instruction: 0xfffac996 │ │ - vtbx.8 d28, {d25-d28}, d10 │ │ + vtbx.8 d28, {d25-d28}, d1 │ │ vrsra.u64 q10, q7, #7 │ │ vdup.16 q8, d21[2] │ │ movs r7, r0 │ │ lsrs r6, r2, #17 │ │ movs r7, r0 │ │ lsrs r0, r0, #17 │ │ movs r7, r0 │ │ @@ -110459,40 +110459,40 @@ │ │ movs r7, r0 │ │ cmp r1, #62 @ 0x3e │ │ vtbl.8 d18, {d10-d11}, d28 │ │ @ instruction: 0xfffa0bdc │ │ movs r7, r0 │ │ lsrs r6, r5, #15 │ │ movs r7, r0 │ │ - bcc.n 82148 │ │ - vtbl.8 d28, {d9-d12}, d18 │ │ + bcc.n 82136 │ │ + @ instruction: 0xfff9cb19 │ │ vrsra.u32 d20, d22, #7 │ │ vtbx.8 d16, {d26-d29}, d12 │ │ movs r7, r0 │ │ adds r5, #242 @ 0xf2 │ │ movs r7, r0 │ │ pop {r2, r4, r7, pc} │ │ @ instruction: 0xfff9bd82 │ │ @ instruction: 0xfff90b94 │ │ movs r7, r0 │ │ lsrs r6, r4, #14 │ │ movs r7, r0 │ │ strh r2, [r3, #40] @ 0x28 │ │ - @ instruction: 0xfff9cad2 │ │ + vtbx.8 d28, {d25-d27}, d9 │ │ sha1h.32 q10, q11 │ │ vtbl.8 d16, {d26-d29}, d4 │ │ movs r7, r0 │ │ lsrs r2, r7, #13 │ │ movs r7, r0 │ │ adds r5, #158 @ 0x9e │ │ movs r7, r0 │ │ subs r0, #40 @ 0x28 │ │ vqshrun.s64 d19, q5, #7 │ │ vtbl.8 d24, {d9-d10}, d24 │ │ - vtbl.8 d28, {d26-d28}, d6 │ │ + @ instruction: 0xfffaca7d │ │ vrshr.u64 d20, d10, #7 │ │ @ instruction: 0xfffa0b14 │ │ movs r7, r0 │ │ lsrs r6, r7, #11 │ │ movs r7, r0 │ │ lsrs r6, r0, #11 │ │ movs r7, r0 │ │ @@ -110855,57 +110855,57 @@ │ │ ldrb r5, [r1, #3] │ │ @ instruction: 0xfffa08f6 │ │ movs r7, r0 │ │ ldrb r3, [r7, #2] │ │ vtbx.8 d16, {d26}, d20 │ │ movs r7, r0 │ │ stmia r6!, {r1, r2, r3, r6} │ │ - vtbl.8 d28, {d25}, d2 │ │ + vqrshrun.s64 d28, , #7 │ │ vcvt.f16.u16 , , #7 │ │ vabs.s32 , q7 │ │ movs r7, r0 │ │ lsrs r6, r5, #2 │ │ movs r7, r0 │ │ - ldr r6, [r2, #96] @ 0x60 │ │ - vclt.s32 , , #0 │ │ + ldr r2, [r1, #96] @ 0x60 │ │ + vrshr.u32 d29, d30, #7 │ │ @ instruction: 0xfff90896 │ │ movs r7, r0 │ │ bls.n 824fc │ │ movs r6, r0 │ │ adds r3, #32 │ │ movs r7, r0 │ │ ldrb r3, [r1, #1] │ │ vtbl.8 d16, {d26}, d0 │ │ movs r7, r0 │ │ ldrb r1, [r7, #0] │ │ vtbx.8 d16, {d10}, d30 │ │ movs r7, r0 │ │ stmia r5!, {r2, r3, r6, r7} │ │ - vtbl.8 d28, {d9}, d0 │ │ + vqshl.u64 q14, , #57 @ 0x39 │ │ @ instruction: 0xfff97bf7 │ │ sha1h.32 , q5 │ │ movs r7, r0 │ │ lsrs r4, r6, #32 │ │ movs r7, r0 │ │ ldr r5, [pc, #272] @ (8257c ) │ │ - @ instruction: 0xfffa4e8b │ │ + vcvt.f32.u32 q10, , #6 │ │ vqshrun.s64 d16, q6, #7 │ │ movs r7, r0 │ │ adds r2, #146 @ 0x92 │ │ movs r7, r0 │ │ adds r2, #152 @ 0x98 │ │ movs r7, r0 │ │ subs r7, #175 @ 0xaf │ │ vtbl.8 d16, {d10}, d0 │ │ movs r7, r0 │ │ subs r7, #157 @ 0x9d │ │ vrintp.f32 q8, q15 │ │ movs r7, r0 │ │ strh r0, [r4, #46] @ 0x2e │ │ - vqshl.u32 q14, q12, #26 │ │ + vrint?.f32 q14, │ │ vtbx.8 d23, {d9-d12}, d31 │ │ vclt.f32 , q4, #0 │ │ str r0, [r4, r0] │ │ cmp r8, r0 │ │ bne.n 824aa │ │ ldr.w r0, [r9, #8] │ │ cmp r0, #0 │ │ @@ -111327,15 +111327,15 @@ │ │ lsls r2, r5, #13 │ │ movs r7, r0 │ │ cmp r5, #224 @ 0xe0 │ │ movs r7, r0 │ │ strb r3, [r1, #12] │ │ vrshr.u64 , , #6 │ │ vshr.u64 d28, d4, #6 │ │ - sha1h.32 q14, q4 │ │ + vrshr.u64 d28, d31, #7 │ │ @ instruction: 0xfff99f9a │ │ vrsra.u32 d16, d19, #7 │ │ movs r7, r0 │ │ lsls r2, r4, #12 │ │ movs r7, r0 │ │ cmp r5, #134 @ 0x86 │ │ movs r7, r0 │ │ @@ -111621,16 +111621,16 @@ │ │ ldr r1, [r6, #124] @ 0x7c │ │ @ instruction: 0xfffa6fdf │ │ vtrn.32 d16, d8 │ │ movs r7, r0 │ │ lsls r2, r3, #2 │ │ movs r7, r0 │ │ pop {r1, r4, r5, r6, pc} │ │ - @ instruction: 0xfff9bfa6 │ │ - @ instruction: 0xfff95b33 │ │ + @ instruction: 0xfff9bf9d │ │ + vtbl.8 d21, {d9-d12}, d23 │ │ vshr.u32 q8, , #7 │ │ movs r7, r0 │ │ beq.n 82b3c │ │ movs r6, r0 │ │ cmp r2, #104 @ 0x68 │ │ movs r7, r0 │ │ lsls r0, r1, #1 │ │ @@ -111991,25 +111991,25 @@ │ │ movs r6, r0 │ │ cdp2 0, 9, cr0, cr6, cr6, {0} │ │ cmp r0, #160 @ 0xa0 │ │ movs r7, r0 │ │ ldr r3, [r1, #92] @ 0x5c │ │ @ instruction: 0xfffa6dbd │ │ @ instruction: 0xfffabb54 │ │ - @ instruction: 0xfff9bd88 │ │ + vcvt.u16.f16 , , #7 │ │ @ instruction: 0xfff9fcd4 │ │ vcvt.f32.u32 , , #7 │ │ movs r6, r0 │ │ cmp r0, #78 @ 0x4e │ │ movs r7, r0 │ │ ldmia r6!, {r1, r2, r3, r7} │ │ movs r6, r0 │ │ cdp2 0, 3, cr0, cr6, cr6, {0} │ │ cmn r6, r0 │ │ - vrintn.f32 d20, d13 │ │ + vrintn.f32 d20, d1 │ │ vcvt.f32.u32 d31, d14, #7 │ │ movs r6, r0 │ │ movs r6, #20 │ │ movs r7, r0 │ │ ldmia r6!, {r1, r2, r3, r4} │ │ movs r6, r0 │ │ bgt.n 82eec │ │ @@ -112125,15 +112125,15 @@ │ │ movs r7, r0 │ │ ldr r1, [r2, #36] @ 0x24 │ │ vshll.u32 q11, d31, #26 │ │ vtbl.8 d31, {d10-d13}, d0 │ │ movs r6, r0 │ │ smlabb r0, r2, r6, r0 │ │ @ instruction: 0xb7d2 │ │ - vtbl.8 d27, {d9-d11}, d6 │ │ + @ instruction: 0xfff9b9fd │ │ vtbx.8 d23, {d25}, d16 │ │ vtbx.8 d31, {d26-d28}, d25 │ │ movs r6, r0 │ │ @ instruction: 0xfada0006 │ │ movs r4, #200 @ 0xc8 │ │ movs r7, r0 │ │ ldmia r3, {r3} │ │ @@ -112365,38 +112365,38 @@ │ │ movs r6, r0 │ │ @ instruction: 0xfa180006 │ │ movs r4, #10 │ │ movs r7, r0 │ │ ldr r5, [r6, #16] │ │ vtbl.8 d22, {d10-d11}, d23 │ │ vqshlu.s64 d27, d30, #58 @ 0x3a │ │ - @ instruction: 0xfff9b8f2 │ │ - vqrshrn.u64 d27, , #7 │ │ + vtbx.8 d27, {d25}, d25 │ │ + vtbx.8 d27, {d9-d10}, d12 │ │ vtbx.8 d31, {d25-d26}, d17 │ │ movs r6, r0 │ │ movs r3, #190 @ 0xbe │ │ movs r7, r0 │ │ ldmia r1!, {r3, r4, r5, r6, r7} │ │ movs r6, r0 │ │ ldrsh.w r0, [r8, #6] │ │ movs r6, #40 @ 0x28 │ │ - vtbx.8 d20, {d9-d10}, d1 │ │ + vqshrn.u64 d20, , #7 │ │ vtbl.8 d31, {d25-d26}, d16 │ │ movs r6, r0 │ │ vld1.8 {d0[0]}, [sl], r6 │ │ movs r3, #128 @ 0x80 │ │ movs r7, r0 │ │ ldr r3, [r5, #8] │ │ @ instruction: 0xfffa6899 │ │ vqrshrn.u64 d31, q9, #6 │ │ movs r6, r0 │ │ vst1.8 {d0[0]}, [r4], r6 │ │ @ instruction: 0xb62c │ │ - vtbx.8 d27, {d9}, d16 │ │ - vtbx.8 d27, {d25}, d3 │ │ + vqrshrun.s64 d27, , #7 │ │ + @ instruction: 0xfff9b8ba │ │ vqrshrn.u64 d31, , #7 │ │ movs r6, r0 │ │ ldmia r1!, {r3, r5, r6} │ │ movs r6, r0 │ │ ldrsh.w r0, [r4, r6] │ │ lsrs r1, r5, #26 │ │ vrint?.f32 , q8 │ │ @@ -112407,16 +112407,16 @@ │ │ movs r7, r0 │ │ adds r7, r1, r2 │ │ vqrshrun.s64 d17, , #6 │ │ @ instruction: 0xfffaf8f0 │ │ movs r6, r0 │ │ vst4.8 {d0-d3}, [r2], r6 │ │ bge.n 833ee │ │ - vqshl.u64 , q3, #57 @ 0x39 │ │ - vqshrun.s64 d27, , #7 │ │ + vneg.f32 , │ │ + vqshrun.s64 d27, q8, #7 │ │ @ instruction: 0xfff9f8be │ │ movs r6, r0 │ │ strh.w r0, [r6, #6] │ │ ldrb.w r0, [sl, #6] │ │ str??.w r0, [lr, r6] │ │ │ │ 00083318 : │ │ @@ -112923,25 +112923,25 @@ │ │ movs r7, r0 │ │ str r7, [r3, #44] @ 0x2c │ │ vqmovn.s64 d22, │ │ vrsra.u64 d31, d2, #6 │ │ movs r6, r0 │ │ usat16 r0, #6, r4 │ │ add sp, #224 @ 0xe0 │ │ - vclt.s32 , q14, #0 │ │ + vclt.s32 , , #0 │ │ vshll.u32 , d19, #25 │ │ vrsra.u32 , , #7 │ │ movs r6, r0 │ │ bfi r0, ip, #0, #7 │ │ adds r6, r5, #4 │ │ movs r7, r0 │ │ @ instruction: 0xf35a0006 │ │ subs r7, r1, #7 │ │ vshll.u32 q10, d31, #25 │ │ - vmovn.i64 d27, q15 │ │ + vmovn.i64 d27, │ │ @ instruction: 0xfff999f5 │ │ @ instruction: 0xfff91af0 │ │ movs r7, r0 │ │ subs r2, r1, r6 │ │ movs r7, r0 │ │ │ │ 0008387c : │ │ @@ -113173,26 +113173,26 @@ │ │ movs r7, r0 │ │ str r5, [r7, #0] │ │ vaddl.u q11, d10, d27 │ │ vuzp.32 d31, d20 │ │ movs r6, r0 │ │ @ instruction: 0xf1360006 │ │ add r5, sp, #760 @ 0x2f8 │ │ - @ instruction: 0xfff9aff2 │ │ - vsli.64 d28, d8, #57 @ 0x39 │ │ + vqrdmlsh.s q13, , d25[0] │ │ + vcle.f32 d28, d15, #0 │ │ vceq.i32 d31, d11, #0 │ │ movs r6, r0 │ │ @ instruction: 0xf0fc0006 │ │ subs r2, r6, r2 │ │ movs r7, r0 │ │ @ instruction: 0xf0ea0006 │ │ adds r3, r2, #5 │ │ vneg.f32 q10, │ │ - @ instruction: 0xfffaafb2 │ │ - vsli.32 q14, q4, #25 │ │ + @ instruction: 0xfffaafa9 │ │ + vceq.f32 q14, , #0 │ │ Address 0x83aea is out of bounds. │ │ │ │ │ │ 00083aec : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -113414,27 +113414,27 @@ │ │ movhi r7, r0 │ │ ldrsh r7, [r6, r1] │ │ @ instruction: 0xfffa5dfb │ │ @ instruction: 0xfffaef00 │ │ movs r6, r0 │ │ vhadd.s16 d0, d0, d6 │ │ add r3, sp, #568 @ 0x238 │ │ - vqrdmulh.s q13, , d2[0] │ │ + @ instruction: 0xfff9adb9 │ │ vcgt.f32 q8, q11, #0 │ │ vqrdmlah.s q15, q13, d25[0] │ │ movs r6, r0 │ │ adds r0, r1, r2 │ │ movs r7, r0 │ │ cdp 0, 12, cr0, cr14, cr6, {0} │ │ subs r3, r5, r4 │ │ vqrdmlah.s q15, , d0[0] │ │ movs r6, r0 │ │ cdp 0, 11, cr0, cr8, cr6, {0} │ │ cmp pc, r1 │ │ - vcvt.u16.f16 q13, q15, #6 │ │ + vcvt.u16.f16 q13, , #6 │ │ vcgt.f32 d16, d18, #0 │ │ @ instruction: 0xfffaee94 │ │ movs r6, r0 │ │ cdp 0, 1, cr0, cr6, cr6, {0} │ │ ldmia r6!, {r1, r4, r5, r7} │ │ movs r6, r0 │ │ │ │ @@ -113648,28 +113648,28 @@ │ │ movs r7, r0 │ │ ldrh r3, [r5, r7] │ │ @ instruction: 0xfffa5bb5 │ │ vqdmulh.s q15, q13, d6[0] │ │ movs r6, r0 │ │ ldcl 0, cr0, [r6], {6} │ │ add r1, sp, #288 @ 0x120 │ │ - @ instruction: 0xfff9ab7c │ │ - vrshr.u32 , , #7 │ │ + @ instruction: 0xfff9ab73 │ │ + vrshr.u32 , , #7 │ │ vmull.u q15, d25, d31 │ │ movs r6, r0 │ │ asrs r2, r0, #25 │ │ movs r7, r0 │ │ ldc 0, cr0, [r4], {6} │ │ adds r5, r4, r3 │ │ vmull.u q15, d25, d6 │ │ movs r6, r0 │ │ ldcl 0, cr0, [lr], #-24 @ 0xffffffe8 │ │ muls r1, r1 │ │ - @ instruction: 0xfffaab38 │ │ - vrshr.u32 d19, d11, #7 │ │ + vtbl.8 d26, {d10-d13}, d31 │ │ + vclt.s32 d19, d15, #0 │ │ vcvt.f16.u16 q15, q5, #7 │ │ movs r6, r0 │ │ rsbs r0, lr, r6 │ │ ldmia r3!, {r2, r6} │ │ movs r6, r0 │ │ │ │ 00083fbc : │ │ @@ -113880,27 +113880,27 @@ │ │ movs r7, r0 │ │ ldr r3, [r4, r6] │ │ vqshrn.u64 d21, , #6 │ │ vshll.u32 q15, d26, #26 │ │ movs r6, r0 │ │ orr.w r0, sl, r6 │ │ add r6, pc, #704 @ (adr r6, 84480 ) │ │ - vtbx.8 d26, {d25}, d20 │ │ + @ instruction: 0xfff9a8db │ │ vceq.i32 d20, d30, #0 │ │ vtbl.8 d30, {d10-d12}, d19 │ │ movs r6, r0 │ │ asrs r2, r5, #14 │ │ movs r7, r0 │ │ and.w r0, r8, r6 │ │ asrs r5, r1, #25 │ │ @ instruction: 0xfff9e9fa │ │ movs r6, r0 │ │ ldrd r0, r0, [r2, #24]! │ │ lsls r1, r6 │ │ - vtbl.8 d26, {d26}, d16 │ │ + @ instruction: 0xfffaa897 │ │ vcge.s32 q10, q13, #0 │ │ vtbx.8 d30, {d26-d27}, d14 │ │ movs r6, r0 │ │ @ instruction: 0xe9920006 │ │ ldmia r1!, {r2, r4, r6, r7} │ │ movs r6, r0 │ │ │ │ @@ -114303,15 +114303,15 @@ │ │ ldr r1, [pc, #16] @ (845dc ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ beq.w 8ebc0 │ │ b.n 845e0 │ │ nop │ │ - subs r5, #62 @ 0x3e │ │ + subs r5, #50 @ 0x32 │ │ vceq.f32 d27, d16, #0 │ │ movs r6, r0 │ │ str r1, [sp, #660] @ 0x294 │ │ mov r0, r4 │ │ ldr r1, [pc, #20] @ (845fc ) │ │ add r1, pc │ │ blx edf80 │ │ @@ -114333,15 +114333,15 @@ │ │ ldr r1, [pc, #16] @ (84624 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ beq.w 8ebcc │ │ b.n 84628 │ │ nop │ │ - add r3, sp, #884 @ 0x374 │ │ + add r3, sp, #848 @ 0x350 │ │ vsri.64 , q0, #7 │ │ movs r6, r0 │ │ str r1, [sp, #652] @ 0x28c │ │ mov r0, r4 │ │ ldr r1, [pc, #20] @ (84644 ) │ │ add r1, pc │ │ blx edf80 │ │ @@ -114363,15 +114363,15 @@ │ │ ldr r1, [pc, #16] @ (8466c ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ beq.w 8ebd8 │ │ b.n 84670 │ │ nop │ │ - stmia r3!, {r2, r3, r4, r5} │ │ + stmia r3!, {r0, r1, r4, r5} │ │ vsri.64 , q10, #7 │ │ movs r6, r0 │ │ str r1, [sp, #644] @ 0x284 │ │ mov r0, r4 │ │ ldr r1, [pc, #20] @ (8468c ) │ │ add r1, pc │ │ blx edf80 │ │ @@ -114398,15 +114398,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8ebee │ │ b.n 846c4 │ │ nop │ │ - add r3, pc, #604 @ (adr r3, 84920 ) │ │ + add r3, pc, #568 @ (adr r3, 848fc ) │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8ebf8 │ │ b.n 846dc │ │ @@ -114425,15 +114425,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8ec0c │ │ b.n 8470c │ │ nop │ │ - adds r3, #122 @ 0x7a │ │ + adds r3, #110 @ 0x6e │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8ec16 │ │ b.n 84724 │ │ @@ -114447,26 +114447,26 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #636] @ 0x27c │ │ beq.w 8ec20 │ │ b.n 84748 │ │ nop │ │ - stmia r2!, {r0, r1, r3, r5} │ │ + stmia r2!, {r1, r5} │ │ vqshlu.s32 d27, d22, #25 │ │ movs r6, r0 │ │ ldr r1, [pc, #16] @ (8475c ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8ec26 │ │ b.n 84760 │ │ nop │ │ - @ instruction: 0xb854 │ │ + @ instruction: 0xb84b │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8ec30 │ │ b.n 84778 │ │ @@ -114609,15 +114609,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #612] @ 0x264 │ │ beq.w 8ec94 │ │ b.n 848e0 │ │ nop │ │ - str r4, [r7, r3] │ │ + str r0, [r6, r3] │ │ vmlsl.u , d25, d2[0] │ │ movs r6, r0 │ │ ldr r1, [pc, #16] @ (848f4 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ @@ -114648,30 +114648,30 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #604] @ 0x25c │ │ beq.w 8ecaa │ │ b.n 84940 │ │ nop │ │ - adds r1, #61 @ 0x3d │ │ + adds r1, #49 @ 0x31 │ │ vqshlu.s64 d27, d2, #57 @ 0x39 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8495c ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (84960 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #600] @ 0x258 │ │ beq.w 8ecb0 │ │ b.n 84964 │ │ nop │ │ - adds r1, #60 @ 0x3c │ │ + adds r1, #48 @ 0x30 │ │ vclt.f32 , q11, #0 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (84980 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (84984 ) │ │ @@ -114728,15 +114728,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8ecd2 │ │ b.n 84a00 │ │ nop │ │ - cbz r3, 84a58 │ │ + cbz r2, 84a56 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8ecdc │ │ b.n 84a18 │ │ @@ -114836,15 +114836,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8ed2a │ │ b.n 84b14 │ │ nop │ │ - movs r5, #208 @ 0xd0 │ │ + movs r5, #196 @ 0xc4 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8ed34 │ │ b.n 84b2c │ │ @@ -114854,15 +114854,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8ed3e │ │ b.n 84b44 │ │ nop │ │ - subs r1, #70 @ 0x46 │ │ + subs r1, #58 @ 0x3a │ │ vtbl.8 d20, {d9-d10}, d6 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (84b64 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ @@ -114900,15 +114900,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #568] @ 0x238 │ │ beq.w 8ed62 │ │ b.n 84bbc │ │ nop │ │ - subs r1, #222 @ 0xde │ │ + subs r1, #210 @ 0xd2 │ │ vcge.f32 , q11, #0 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (84bd8 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (84bdc ) │ │ @@ -114981,15 +114981,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #556] @ 0x22c │ │ beq.w 8ed9c │ │ b.n 84c88 │ │ nop │ │ - add r7, pc, #388 @ (adr r7, 84e08 ) │ │ + add r7, pc, #352 @ (adr r7, 84de4 ) │ │ vabs.s32 , q13 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (84ca4 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (84ca8 ) │ │ @@ -115053,15 +115053,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #540] @ 0x21c │ │ beq.w 8edcc │ │ b.n 84d3c │ │ nop │ │ - subs r0, #53 @ 0x35 │ │ + subs r0, #41 @ 0x29 │ │ vrshr.u64 d27, d2, #7 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (84d58 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (84d5c ) │ │ @@ -115242,15 +115242,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #348] @ 0x15c │ │ beq.w 8ee3e │ │ b.n 84f10 │ │ nop │ │ - movs r1, #163 @ 0xa3 │ │ + movs r1, #151 @ 0x97 │ │ vshr.u64 , q15, #7 │ │ movs r6, r0 │ │ ldr r1, [pc, #16] @ (84f24 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ @@ -115302,15 +115302,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #264] @ 0x108 │ │ beq.w 8ee76 │ │ b.n 84fac │ │ nop │ │ - cmp r3, #4 │ │ + cmp r2, #248 @ 0xf8 │ │ vqrdmlah.s q13, , d18[0] │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (84fc8 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (84fcc ) │ │ @@ -115392,15 +115392,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #312] @ 0x138 │ │ beq.w 8ee9a │ │ b.n 85084 │ │ nop │ │ - subs r7, #71 @ 0x47 │ │ + subs r7, #59 @ 0x3b │ │ vcgt.s32 , q11, #0 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (850a0 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (850a4 ) │ │ @@ -115451,15 +115451,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8eec0 │ │ b.n 85114 │ │ nop │ │ - add r6, sp, #692 @ 0x2b4 │ │ + add r6, sp, #656 @ 0x290 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8eeca │ │ b.n 8512c │ │ @@ -115530,30 +115530,30 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #496] @ 0x1f0 │ │ beq.w 8eefe │ │ b.n 851e0 │ │ nop │ │ - add r2, pc, #140 @ (adr r2, 85268 ) │ │ + add r2, pc, #104 @ (adr r2, 85244 ) │ │ @ instruction: 0xfff9af26 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (851fc ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (85200 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #492] @ 0x1ec │ │ beq.w 8ef04 │ │ b.n 85204 │ │ nop │ │ - subs r5, #226 @ 0xe2 │ │ + subs r5, #214 @ 0xd6 │ │ @ instruction: 0xfff9af06 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (85220 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (85224 ) │ │ @@ -115586,28 +115586,28 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8ef16 │ │ b.n 85264 │ │ nop │ │ - add r1, pc, #648 @ (adr r1, 854ec ) │ │ + add r1, pc, #612 @ (adr r1, 854c8 ) │ │ vtbl.8 d20, {d9-d10}, d6 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (85284 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #248] @ 0xf8 │ │ beq.w 8ef20 │ │ b.n 85288 │ │ nop │ │ - cmp r0, #54 @ 0x36 │ │ + cmp r0, #42 @ 0x2a │ │ vtbx.8 d26, {d25}, d26 │ │ movs r6, r0 │ │ ldr r1, [pc, #16] @ (8529c ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ @@ -115623,15 +115623,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #336] @ 0x150 │ │ beq.w 8ef30 │ │ b.n 852c4 │ │ nop │ │ - add r4, sp, #800 @ 0x320 │ │ + add r4, sp, #764 @ 0x2fc │ │ vcvt.u16.f16 d26, d2, #7 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (852e0 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (852e4 ) │ │ @@ -115668,41 +115668,41 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #300] @ 0x12c │ │ beq.w 8ef42 │ │ b.n 85330 │ │ nop │ │ - str r7, [sp, #272] @ 0x110 │ │ + str r7, [sp, #236] @ 0xec │ │ vqrdmulh.s q13, , d30[0] │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8534c ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (85350 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #240] @ 0xf0 │ │ beq.w 8ef48 │ │ b.n 85354 │ │ nop │ │ - adds r7, r4, #6 │ │ + adds r3, r3, #6 │ │ vqrdmulh.s q13, , d14[0] │ │ movs r6, r0 │ │ ldr r1, [pc, #16] @ (85368 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8ef4e │ │ b.n 8536c │ │ nop │ │ - adds r7, r1, #6 │ │ + adds r3, r0, #6 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8ef58 │ │ b.n 85384 │ │ @@ -115712,15 +115712,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8ef62 │ │ b.n 8539c │ │ nop │ │ - add r4, sp, #204 @ 0xcc │ │ + add r4, sp, #168 @ 0xa8 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8ef6c │ │ b.n 853b4 │ │ @@ -115775,15 +115775,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f09e │ │ b.n 85444 │ │ nop │ │ - movs r6, #121 @ 0x79 │ │ + movs r6, #109 @ 0x6d │ │ vtbl.8 d20, {d9-d10}, d6 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (85464 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ @@ -115952,15 +115952,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f138 │ │ b.n 8560c │ │ nop │ │ - add r1, sp, #836 @ 0x344 │ │ + add r1, sp, #800 @ 0x320 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f142 │ │ b.n 85624 │ │ @@ -116003,15 +116003,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f166 │ │ b.n 85690 │ │ nop │ │ - add r1, sp, #352 @ 0x160 │ │ + add r1, sp, #316 @ 0x13c │ │ vtbl.8 d20, {d9-d10}, d6 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (856b0 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ @@ -116069,15 +116069,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f19a │ │ b.n 85738 │ │ nop │ │ - adds r1, r2, r7 │ │ + adds r5, r0, r7 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f1a4 │ │ b.n 85750 │ │ @@ -116124,15 +116124,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #512] @ 0x200 │ │ beq.w 8f1c8 │ │ b.n 857c8 │ │ nop │ │ - subs r0, #56 @ 0x38 │ │ + subs r0, #44 @ 0x2c │ │ vtbx.8 d26, {d25-d26}, d18 │ │ movs r6, r0 │ │ ldr r1, [pc, #16] @ (857dc ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ @@ -116157,15 +116157,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #296] @ 0x128 │ │ beq.w 8f1e2 │ │ b.n 8581c │ │ nop │ │ - adds r7, r1, r4 │ │ + adds r3, r0, r4 │ │ @ instruction: 0xfff9a996 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (85838 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8583c ) │ │ @@ -116192,15 +116192,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f1f8 │ │ b.n 85870 │ │ nop │ │ - adds r7, r0, r3 │ │ + adds r3, r7, r2 │ │ vtbl.8 d20, {d9-d10}, d6 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (85890 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ @@ -116243,15 +116243,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f226 │ │ b.n 858f4 │ │ nop │ │ - adds r5, r1, r1 │ │ + adds r1, r0, r1 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f230 │ │ b.n 8590c │ │ @@ -116265,41 +116265,41 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #292] @ 0x124 │ │ beq.w 8f23a │ │ b.n 85930 │ │ nop │ │ - movs r1, #166 @ 0xa6 │ │ + movs r1, #154 @ 0x9a │ │ @ instruction: 0xfff9a89e │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8594c ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (85950 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #480] @ 0x1e0 │ │ beq.w 8f240 │ │ b.n 85954 │ │ nop │ │ - cmp r1, #228 @ 0xe4 │ │ + cmp r1, #216 @ 0xd8 │ │ vqshlu.s32 q13, q1, #25 │ │ movs r6, r0 │ │ ldr r1, [pc, #16] @ (85968 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f246 │ │ b.n 8596c │ │ nop │ │ - cmp r4, #52 @ 0x34 │ │ + cmp r4, #40 @ 0x28 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f250 │ │ b.n 85984 │ │ @@ -116322,15 +116322,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #268] @ 0x10c │ │ beq.w 8f264 │ │ b.n 859c0 │ │ nop │ │ - cmp r3, #250 @ 0xfa │ │ + cmp r3, #238 @ 0xee │ │ vqshrun.s64 d26, q7, #7 │ │ movs r6, r0 │ │ ldr r1, [pc, #16] @ (859d4 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ @@ -116366,15 +116366,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f284 │ │ b.n 85a2c │ │ nop │ │ - add r5, pc, #808 @ (adr r5, 85d54 ) │ │ + add r5, pc, #772 @ (adr r5, 85d30 ) │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f28e │ │ b.n 85a44 │ │ @@ -116420,15 +116420,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f2c0 │ │ b.n 85abc │ │ nop │ │ - ldr r1, [sp, #324] @ 0x144 │ │ + ldr r1, [sp, #288] @ 0x120 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f2ca │ │ b.n 85ad4 │ │ @@ -116465,15 +116465,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f2f2 │ │ b.n 85b34 │ │ nop │ │ - ldrh r1, [r1, #56] @ 0x38 │ │ + ldrh r0, [r0, #56] @ 0x38 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f2fc │ │ b.n 85b4c │ │ @@ -116622,30 +116622,30 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #452] @ 0x1c4 │ │ beq.w 8f35c │ │ b.n 85cc0 │ │ nop │ │ - asrs r7, r2, #18 │ │ + asrs r3, r1, #18 │ │ vsli.32 q13, q3, #25 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (85cdc ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (85ce0 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #448] @ 0x1c0 │ │ beq.w 8f362 │ │ b.n 85ce4 │ │ nop │ │ - cmp r0, #236 @ 0xec │ │ + cmp r0, #224 @ 0xe0 │ │ vsli.32 d26, d22, #25 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (85d00 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (85d04 ) │ │ @@ -116787,15 +116787,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #408] @ 0x198 │ │ beq.w 8f39e │ │ b.n 85e4c │ │ nop │ │ - add r1, pc, #768 @ (adr r1, 86148 ) │ │ + add r1, pc, #732 @ (adr r1, 86124 ) │ │ vrsra.u64 q13, q11, #7 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (85e68 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (85e6c ) │ │ @@ -116817,30 +116817,30 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #288] @ 0x120 │ │ beq.w 8f3aa │ │ b.n 85e94 │ │ nop │ │ - add r3, sp, #52 @ 0x34 │ │ + add r3, sp, #16 │ │ vrsra.u64 d26, d22, #7 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (85eb0 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (85eb4 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #400] @ 0x190 │ │ beq.w 8f3b0 │ │ b.n 85eb8 │ │ nop │ │ - str r5, [sp, #432] @ 0x1b0 │ │ + str r5, [sp, #396] @ 0x18c │ │ vrsra.u64 d26, d6, #7 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (85ed4 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (85ed8 ) │ │ @@ -116862,30 +116862,30 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #392] @ 0x188 │ │ beq.w 8f3bc │ │ b.n 85f00 │ │ nop │ │ - asrs r3, r4, #9 │ │ + asrs r7, r2, #9 │ │ vrsra.u32 q13, q3, #7 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (85f1c ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (85f20 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #388] @ 0x184 │ │ beq.w 8f3c2 │ │ b.n 85f24 │ │ nop │ │ - adds r0, #236 @ 0xec │ │ + adds r0, #224 @ 0xe0 │ │ vrsra.u32 d26, d22, #7 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (85f40 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (85f44 ) │ │ @@ -116952,15 +116952,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #368] @ 0x170 │ │ beq.w 8f3e0 │ │ b.n 85fd8 │ │ nop │ │ - str r3, [sp, #280] @ 0x118 │ │ + str r3, [sp, #244] @ 0xf4 │ │ vrshr.u64 d26, d6, #7 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (85ff4 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (85ff8 ) │ │ @@ -117038,24 +117038,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #240] @ 0xf0 │ │ beq.w 917e6 │ │ b.n 860b0 │ │ - str r3, [sp, #488] @ 0x1e8 │ │ + str r3, [sp, #452] @ 0x1c4 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f406 │ │ b.n 860c8 │ │ nop │ │ - ldr r7, [sp, #300] @ 0x12c │ │ + ldr r7, [sp, #264] @ 0x108 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f410 │ │ b.n 860e0 │ │ @@ -117110,15 +117110,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #544] @ 0x220 │ │ beq.w 917e6 │ │ b.n 86170 │ │ - ldrh r3, [r0, #8] │ │ + ldrh r2, [r7, #6] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #248] @ 0xf8 │ │ beq.w 917e6 │ │ @@ -117155,40 +117155,40 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #548] @ 0x224 │ │ beq.w 8f420 │ │ b.n 861e8 │ │ nop │ │ - adds r5, r7, r3 │ │ + adds r1, r6, r3 │ │ @ instruction: 0xfff99996 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (86204 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (86208 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr.w sl, [r1] │ │ beq.w 8f426 │ │ b.n 8620c │ │ nop │ │ - adds r5, r4, r3 │ │ + adds r1, r3, r3 │ │ vqrshrn.u64 d25, q13, #7 │ │ movs r6, r0 │ │ ldr r1, [pc, #16] @ (86220 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #548] @ 0x224 │ │ beq.w 917e6 │ │ b.n 86224 │ │ - str r2, [sp, #84] @ 0x54 │ │ + str r2, [sp, #48] @ 0x30 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, sl │ │ beq.w 917e6 │ │ @@ -117233,15 +117233,15 @@ │ │ ldr r1, [pc, #20] @ (862b0 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr.w sl, [r1] │ │ beq.w 8f432 │ │ b.n 862b4 │ │ nop │ │ - str r1, [sp, #640] @ 0x280 │ │ + str r1, [sp, #604] @ 0x25c │ │ @ instruction: 0xfff998f2 │ │ movs r6, r0 │ │ ldr r1, [pc, #16] @ (862c8 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ @@ -117334,15 +117334,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #644] @ 0x284 │ │ beq.w 8f574 │ │ b.n 863b0 │ │ nop │ │ - asrs r7, r1, #29 │ │ + asrs r3, r0, #29 │ │ vqshl.u64 , q5, #57 @ 0x39 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (863cc ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (863d0 ) │ │ @@ -117402,15 +117402,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #648] @ 0x288 │ │ beq.w 917e6 │ │ b.n 86458 │ │ - strh r3, [r5, #48] @ 0x30 │ │ + strh r2, [r4, #48] @ 0x30 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #644] @ 0x284 │ │ beq.w 917e6 │ │ @@ -117429,15 +117429,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #588] @ 0x24c │ │ beq.w 917e6 │ │ b.n 864a0 │ │ - movs r1, #49 @ 0x31 │ │ + movs r1, #37 @ 0x25 │ │ vtbl.8 d20, {d9-d10}, d6 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (864c0 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ @@ -117560,15 +117560,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #648] @ 0x288 │ │ beq.w 917e6 │ │ b.n 865f0 │ │ - ldr r2, [sp, #240] @ 0xf0 │ │ + ldr r2, [sp, #204] @ 0xcc │ │ vtbl.8 d20, {d9}, d4 │ │ add r0, pc │ │ ldr r0, [r0, #0] │ │ str r0, [sp, #648] @ 0x288 │ │ ldr r0, [r0, #52] @ 0x34 │ │ cmp r0, #0 │ │ beq.w 86c20 │ │ @@ -117628,15 +117628,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #608] @ 0x260 │ │ beq.w 8f5c8 │ │ b.n 86698 │ │ nop │ │ - lsrs r5, r3, #11 │ │ + lsrs r1, r2, #11 │ │ vtbx.8 d25, {d9-d10}, d26 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (866b4 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (866b8 ) │ │ @@ -117663,15 +117663,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f5da │ │ b.n 866ec │ │ nop │ │ - subs r1, r0, #4 │ │ + subs r5, r6, #3 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f5e0 │ │ b.n 86704 │ │ @@ -117699,15 +117699,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f5f2 │ │ b.n 8674c │ │ nop │ │ - subs r1, r7, #2 │ │ + subs r5, r5, #2 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f5f8 │ │ b.n 86764 │ │ @@ -117726,24 +117726,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f604 │ │ b.n 86794 │ │ nop │ │ - ldr r0, [sp, #684] @ 0x2ac │ │ + ldr r0, [sp, #648] @ 0x288 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f60a │ │ b.n 867ac │ │ nop │ │ - subs r3, r6, #1 │ │ + subs r7, r4, #1 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f610 │ │ b.n 867c4 │ │ @@ -117771,15 +117771,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f622 │ │ b.n 8680c │ │ nop │ │ - lsrs r6, r7, #5 │ │ + lsrs r2, r6, #5 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f628 │ │ b.n 86824 │ │ @@ -117825,42 +117825,42 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f646 │ │ b.n 8689c │ │ nop │ │ - strh r3, [r7, #14] │ │ + strh r2, [r6, #14] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #540] @ 0x21c │ │ beq.w 917e6 │ │ b.n 868b4 │ │ - str r7, [sp, #644] @ 0x284 │ │ + str r7, [sp, #608] @ 0x260 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #604] @ 0x25c │ │ beq.w 917e6 │ │ b.n 868cc │ │ - adds r0, r6, #5 │ │ + adds r4, r4, #5 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #336] @ 0x150 │ │ beq.w 917e6 │ │ b.n 868e4 │ │ - strh r0, [r1, #14] │ │ + strh r7, [r7, #12] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #640] @ 0x280 │ │ beq.w 917e6 │ │ @@ -117897,15 +117897,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #588] @ 0x24c │ │ beq.w 917e6 │ │ b.n 8695c │ │ - ldrh r0, [r0, #24] │ │ + ldrh r7, [r6, #22] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #536] @ 0x218 │ │ beq.w 917e6 │ │ @@ -117933,15 +117933,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #332] @ 0x14c │ │ beq.w 917e6 │ │ b.n 869bc │ │ - asrs r2, r1, #5 │ │ + asrs r6, r7, #4 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #608] @ 0x260 │ │ beq.w 917e6 │ │ @@ -117960,15 +117960,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #340] @ 0x154 │ │ beq.w 917e6 │ │ b.n 86a04 │ │ - asrs r3, r3, #4 │ │ + asrs r7, r1, #4 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #532] @ 0x214 │ │ beq.w 917e6 │ │ @@ -117987,15 +117987,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #344] @ 0x158 │ │ beq.w 917e6 │ │ b.n 86a4c │ │ - str r6, [sp, #120] @ 0x78 │ │ + str r6, [sp, #84] @ 0x54 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #672] @ 0x2a0 │ │ beq.w 917e6 │ │ @@ -118017,15 +118017,15 @@ │ │ ldr r1, [pc, #20] @ (86a9c ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr.w r8, [r1] │ │ beq.w 8f64c │ │ b.n 86aa0 │ │ nop │ │ - ldrh r2, [r4, #14] │ │ + ldrh r1, [r3, #14] │ │ vsli.32 , q15, #25 │ │ movs r6, r0 │ │ ldr r1, [pc, #16] @ (86ab4 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ @@ -118046,24 +118046,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f65c │ │ b.n 86ae8 │ │ nop │ │ - subs r4, r5, r5 │ │ + subs r0, r4, r5 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f666 │ │ b.n 86b00 │ │ nop │ │ - asrs r3, r6, #32 │ │ + asrs r7, r4, #32 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f670 │ │ b.n 86b18 │ │ @@ -118091,15 +118091,15 @@ │ │ ldr r1, [pc, #20] @ (86b5c ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr.w sl, [r1] │ │ beq.w 8f680 │ │ b.n 86b60 │ │ nop │ │ - ldrh r0, [r6, #8] │ │ + ldrh r7, [r4, #8] │ │ vsri.64 , q3, #7 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (86b7c ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (86b80 ) │ │ @@ -118148,15 +118148,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, fp │ │ beq.w 917e6 │ │ b.n 86bf0 │ │ - str r4, [sp, #616] @ 0x268 │ │ + str r4, [sp, #580] @ 0x244 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, r8 │ │ beq.w 917e6 │ │ @@ -118166,28 +118166,28 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f692 │ │ b.n 86c20 │ │ nop │ │ - movs r3, #245 @ 0xf5 │ │ + movs r3, #233 @ 0xe9 │ │ vtbl.8 d20, {d9-d10}, d6 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (86c40 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #608] @ 0x260 │ │ beq.w 8f69c │ │ b.n 86c44 │ │ nop │ │ - subs r5, r5, r0 │ │ + subs r1, r4, r0 │ │ vclt.f32 , q1, #0 │ │ movs r6, r0 │ │ ldr r1, [pc, #16] @ (86c58 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ @@ -118281,15 +118281,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #264] @ 0x108 │ │ beq.w 917e6 │ │ b.n 86d4c │ │ - lsrs r7, r6, #23 │ │ + lsrs r3, r5, #23 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f6ae │ │ b.n 86d64 │ │ @@ -118344,15 +118344,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f6ea │ │ b.n 86df4 │ │ nop │ │ - lsrs r0, r4, #21 │ │ + lsrs r4, r2, #21 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f6f4 │ │ b.n 86e0c │ │ @@ -118397,26 +118397,26 @@ │ │ ldr r1, [pc, #20] @ (86e80 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr.w sl, [r1] │ │ beq.w 8f718 │ │ b.n 86e84 │ │ nop │ │ - str r2, [sp, #188] @ 0xbc │ │ + str r2, [sp, #152] @ 0x98 │ │ vsri.32 d25, d26, #7 │ │ movs r6, r0 │ │ ldr r1, [pc, #16] @ (86e98 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, r8 │ │ beq.w 917e6 │ │ b.n 86e9c │ │ - asrs r3, r3, #31 │ │ + asrs r7, r1, #31 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, sl │ │ beq.w 917e6 │ │ @@ -118471,24 +118471,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f750 │ │ b.n 86f44 │ │ nop │ │ - lsls r4, r3, #9 │ │ + lsls r0, r2, #9 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f75a │ │ b.n 86f5c │ │ nop │ │ - str r1, [sp, #376] @ 0x178 │ │ + str r1, [sp, #340] @ 0x154 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f764 │ │ b.n 86f74 │ │ @@ -118507,15 +118507,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f778 │ │ b.n 86fa4 │ │ nop │ │ - lsls r2, r1, #8 │ │ + lsls r6, r7, #7 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f782 │ │ b.n 86fbc │ │ @@ -118543,15 +118543,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f7a0 │ │ b.n 87004 │ │ nop │ │ - lsls r0, r7, #6 │ │ + lsls r4, r5, #6 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f7aa │ │ b.n 8701c │ │ @@ -118615,15 +118615,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f7f0 │ │ b.n 870c4 │ │ nop │ │ - ldrb r3, [r7, #7] │ │ + ldrb r2, [r6, #7] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f7fa │ │ b.n 870dc │ │ @@ -118642,15 +118642,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f80e │ │ b.n 8710c │ │ nop │ │ - lsrs r3, r2, #9 │ │ + lsrs r7, r0, #9 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f818 │ │ b.n 87124 │ │ @@ -118696,15 +118696,15 @@ │ │ ldr r1, [pc, #20] @ (87198 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr.w sl, [r1] │ │ beq.w 8f83c │ │ b.n 8719c │ │ nop │ │ - lsrs r5, r3, #7 │ │ + lsrs r1, r2, #7 │ │ vsra.u64 d25, d10, #7 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (871b8 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (871bc ) │ │ @@ -118739,15 +118739,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #672] @ 0x2a0 │ │ beq.w 8f84e │ │ b.n 87208 │ │ nop │ │ - lsrs r3, r0, #6 │ │ + lsrs r7, r6, #5 │ │ vsra.u32 d25, d26, #7 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (87224 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (87228 ) │ │ @@ -118769,30 +118769,30 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #640] @ 0x280 │ │ beq.w 8f85a │ │ b.n 87250 │ │ nop │ │ - ldrb r0, [r1, #2] │ │ + ldrb r7, [r7, #1] │ │ vshr.u64 , q13, #7 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8726c ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (87270 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #632] @ 0x278 │ │ beq.w 8f860 │ │ b.n 87274 │ │ nop │ │ - vminnm.f32 , q9, q12 │ │ + vmaxnm.f16 , q11, q12 │ │ str r0, [sp, #872] @ 0x368 │ │ movs r6, r0 │ │ ldr r1, [pc, #16] @ (87288 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ @@ -118921,15 +118921,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #640] @ 0x280 │ │ beq.w 917e6 │ │ b.n 873dc │ │ - strb r3, [r0, #28] │ │ + strb r2, [r7, #27] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #632] @ 0x278 │ │ beq.w 917e6 │ │ @@ -119003,15 +119003,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, r8 │ │ beq.w 917e6 │ │ b.n 874b4 │ │ - ldrb r3, [r5, #31] │ │ + ldrb r2, [r4, #31] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, sl │ │ beq.w 917e6 │ │ @@ -119057,15 +119057,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f8f2 │ │ b.n 87544 │ │ nop │ │ - ldc2 15, cr15, [r8], {248} @ 0xf8 │ │ + stc2 15, cr15, [ip], {248} @ 0xf8 │ │ ldr r1, [pc, #16] @ (87558 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f8fc │ │ b.n 8755c │ │ @@ -119111,15 +119111,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f92e │ │ b.n 875d4 │ │ nop │ │ - strb r1, [r4, #20] │ │ + strb r0, [r3, #20] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f938 │ │ b.n 875ec │ │ @@ -119129,15 +119129,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f942 │ │ b.n 87604 │ │ nop │ │ - ldrh r5, [r0, #22] │ │ + ldrh r4, [r7, #20] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f94c │ │ b.n 8761c │ │ @@ -119147,15 +119147,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f956 │ │ b.n 87634 │ │ nop │ │ - udiv pc, r7, r8 │ │ + @ instruction: 0xfbabfff8 │ │ ldr r1, [pc, #16] @ (87648 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f960 │ │ b.n 8764c │ │ @@ -119183,15 +119183,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f97e │ │ b.n 87694 │ │ nop │ │ - adds r7, r2, r6 │ │ + adds r3, r1, r6 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f988 │ │ b.n 876ac │ │ @@ -119237,15 +119237,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f9ba │ │ b.n 87724 │ │ nop │ │ - ldrh r4, [r6, #12] │ │ + ldrh r3, [r5, #12] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f9c4 │ │ b.n 8773c │ │ @@ -119255,15 +119255,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f9ce │ │ b.n 87754 │ │ nop │ │ - @ instruction: 0xfaa3fff8 │ │ + @ instruction: 0xfa97fff8 │ │ ldr r1, [pc, #16] @ (87768 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8f9d8 │ │ b.n 8776c │ │ @@ -119305,15 +119305,15 @@ │ │ ldr r1, [pc, #20] @ (877d4 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr.w fp, [r1] │ │ beq.w 8f9ee │ │ b.n 877d8 │ │ nop │ │ - lsrs r2, r0, #27 │ │ + lsrs r6, r6, #26 │ │ vdup.8 d24, d10[4] │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (877f4 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (877f8 ) │ │ @@ -119390,15 +119390,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fa12 │ │ b.n 878a4 │ │ nop │ │ - @ instruction: 0xf961fff8 │ │ + ldr??.w pc, [r5, #248]! │ │ ldr r1, [pc, #16] @ (878b8 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fa18 │ │ b.n 878bc │ │ @@ -119435,15 +119435,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fa30 │ │ b.n 8791c │ │ nop │ │ - strh r2, [r1, #62] @ 0x3e │ │ + strh r1, [r0, #62] @ 0x3e │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fa36 │ │ b.n 87934 │ │ @@ -119480,15 +119480,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, fp │ │ beq.w 917e6 │ │ b.n 87994 │ │ - ldrb r2, [r4, #12] │ │ + ldrb r1, [r3, #12] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, r8 │ │ beq.w 917e6 │ │ @@ -119534,15 +119534,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fa42 │ │ b.n 87a24 │ │ nop │ │ - lsls r6, r5, #5 │ │ + lsls r2, r4, #5 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fb7c │ │ b.n 87a3c │ │ @@ -119598,24 +119598,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, r8 │ │ beq.w 917e6 │ │ b.n 87acc │ │ - strh r7, [r5, #48] @ 0x30 │ │ + strh r6, [r4, #48] @ 0x30 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, sl │ │ beq.w 917e6 │ │ b.n 87ae4 │ │ - ldrb r0, [r5, #7] │ │ + ldrb r7, [r3, #7] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fba6 │ │ b.n 87afc │ │ @@ -119661,15 +119661,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fbd8 │ │ b.n 87b74 │ │ nop │ │ - bl fff2fb64 │ │ + bl fff23b64 │ │ ldr r1, [pc, #16] @ (87b88 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fbe2 │ │ b.n 87b8c │ │ @@ -119742,15 +119742,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fc32 │ │ b.n 87c4c │ │ nop │ │ - ldr r0, [r7, #104] @ 0x68 │ │ + ldr r7, [r5, #104] @ 0x68 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fc3c │ │ b.n 87c64 │ │ @@ -119814,15 +119814,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fc82 │ │ b.n 87d0c │ │ nop │ │ - ldr r4, [r0, #96] @ 0x60 │ │ + ldr r3, [r7, #92] @ 0x5c │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fc8c │ │ b.n 87d24 │ │ @@ -119832,15 +119832,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fc96 │ │ b.n 87d3c │ │ nop │ │ - strh r6, [r2, #30] │ │ + strh r5, [r1, #30] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fca0 │ │ b.n 87d54 │ │ @@ -119850,15 +119850,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fcaa │ │ b.n 87d6c │ │ nop │ │ - mrc2 15, 1, pc, cr1, cr8, {7} │ │ + mcr2 15, 1, pc, cr5, cr8, {7} @ │ │ ldr r1, [pc, #16] @ (87d80 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fcb4 │ │ b.n 87d84 │ │ @@ -119944,30 +119944,30 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #644] @ 0x284 │ │ beq.w 8fcdc │ │ b.n 87e5c │ │ nop │ │ - asrs r7, r4, #7 │ │ + asrs r3, r3, #7 │ │ vqshlu.s32 d24, d26, #25 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (87e78 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (87e7c ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #640] @ 0x280 │ │ beq.w 8fce2 │ │ b.n 87e80 │ │ nop │ │ - ldr r2, [r5, #72] @ 0x48 │ │ + ldr r1, [r4, #72] @ 0x48 │ │ vqshlu.s32 d24, d10, #25 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (87e9c ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (87ea0 ) │ │ @@ -120030,24 +120030,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fd0c │ │ b.n 87f34 │ │ nop │ │ - ldc2l 15, cr15, [r7], #-992 @ 0xfffffc20 │ │ + stc2l 15, cr15, [fp], #-992 @ 0xfffffc20 │ │ ldr r1, [pc, #16] @ (87f48 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fd12 │ │ b.n 87f4c │ │ nop │ │ - lsls r5, r2, #29 │ │ + lsls r1, r1, #29 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fd18 │ │ b.n 87f64 │ │ @@ -120057,24 +120057,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #548] @ 0x224 │ │ beq.w 917e6 │ │ b.n 87f7c │ │ - strb r6, [r4, #21] │ │ + strb r5, [r3, #21] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, sl │ │ beq.w 917e6 │ │ b.n 87f94 │ │ - asrs r5, r6, #2 │ │ + asrs r1, r5, #2 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, fp │ │ beq.w 917e6 │ │ @@ -120156,15 +120156,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fd3c │ │ b.n 88084 │ │ nop │ │ - bl 22e074 │ │ + bl 222074 │ │ ldr r1, [pc, #24] @ (880a0 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (880a4 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ @@ -120220,15 +120220,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fd5c │ │ b.n 8812c │ │ nop │ │ - @ instruction: 0xfa94fff8 │ │ + @ instruction: 0xfa88fff8 │ │ ldr r1, [pc, #16] @ (88140 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fd66 │ │ b.n 88144 │ │ @@ -120256,15 +120256,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fd84 │ │ b.n 8818c │ │ nop │ │ - ldr r5, [r4, #24] │ │ + ldr r4, [r3, #24] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fd8e │ │ b.n 881a4 │ │ @@ -120319,15 +120319,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fdca │ │ b.n 88234 │ │ nop │ │ - lsrs r2, r5, #24 │ │ + lsrs r6, r3, #24 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fdd4 │ │ b.n 8824c │ │ @@ -120418,15 +120418,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fe38 │ │ b.n 8833c │ │ nop │ │ - lsrs r1, r6, #20 │ │ + lsrs r5, r4, #20 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fe42 │ │ b.n 88354 │ │ @@ -120607,24 +120607,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8feac │ │ b.n 8851c │ │ nop │ │ - lsrs r6, r3, #13 │ │ + lsrs r2, r2, #13 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8feb2 │ │ b.n 88534 │ │ nop │ │ - ldcl 15, cr15, [pc], #992 @ 88914 │ │ + ldcl 15, cr15, [r3], #992 @ 0x3e0 │ │ ldr r1, [pc, #16] @ (88548 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8feb8 │ │ b.n 8854c │ │ @@ -120634,15 +120634,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8febe │ │ b.n 88564 │ │ nop │ │ - ldr r4, [r2, #120] @ 0x78 │ │ + ldr r3, [r1, #120] @ 0x78 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fec4 │ │ b.n 8857c │ │ @@ -120661,24 +120661,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, sl │ │ beq.w 917e6 │ │ b.n 885ac │ │ - ldr r2, [r4, #116] @ 0x74 │ │ + ldr r1, [r3, #116] @ 0x74 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, fp │ │ beq.w 917e6 │ │ b.n 885c4 │ │ - lsls r3, r6, #3 │ │ + lsls r7, r4, #3 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, r8 │ │ beq.w 917e6 │ │ @@ -120697,33 +120697,33 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #644] @ 0x284 │ │ beq.w 917e6 │ │ b.n 8860c │ │ - bl ffe465fc │ │ + bl ffe3a5fc │ │ ldr r1, [pc, #16] @ (88620 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #640] @ 0x280 │ │ beq.w 917e6 │ │ b.n 88624 │ │ - ldrb r4, [r7, #11] │ │ + ldrb r3, [r6, #11] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #632] @ 0x278 │ │ beq.w 917e6 │ │ b.n 8863c │ │ - lsrs r3, r2, #9 │ │ + lsrs r7, r0, #9 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8feca │ │ b.n 88654 │ │ @@ -120768,15 +120768,15 @@ │ │ ldr r1, [pc, #20] @ (886c8 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr.w sl, [r1] │ │ beq.w 8feee │ │ b.n 886cc │ │ nop │ │ - lsrs r4, r4, #7 │ │ + lsrs r0, r3, #7 │ │ @ instruction: 0xfff97e8e │ │ movs r6, r0 │ │ ldr r1, [pc, #16] @ (886e0 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ @@ -120797,24 +120797,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fef4 │ │ b.n 88714 │ │ nop │ │ - @ instruction: 0xeb35fff8 │ │ + @ instruction: 0xeb29fff8 │ │ ldr r1, [pc, #16] @ (88728 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8fefe │ │ b.n 8872c │ │ nop │ │ - bl ffd3b71c │ │ + bl ffd2f71c │ │ ldr r1, [pc, #16] @ (88740 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8ff08 │ │ b.n 88744 │ │ @@ -120824,15 +120824,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8ff12 │ │ b.n 8875c │ │ nop │ │ - lsrs r4, r3, #5 │ │ + lsrs r0, r2, #5 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 8ff1c │ │ b.n 88774 │ │ @@ -120914,15 +120914,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 900b4 │ │ b.n 8884c │ │ nop │ │ - @ instruction: 0xea08fff8 │ │ + ldrd pc, pc, [ip, #992]! @ 0x3e0 │ │ ldr r1, [pc, #16] @ (88860 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 900be │ │ b.n 88864 │ │ @@ -120950,15 +120950,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 900dc │ │ b.n 888ac │ │ nop │ │ - lsrs r0, r3, #32 │ │ + lsrs r4, r1, #32 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 900e6 │ │ b.n 888c4 │ │ @@ -120995,15 +120995,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 9010e │ │ b.n 88924 │ │ nop │ │ - str r3, [r3, #32] │ │ + str r2, [r2, #32] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90118 │ │ b.n 8893c │ │ @@ -121031,24 +121031,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90136 │ │ b.n 88984 │ │ nop │ │ - @ instruction: 0xe8dffff8 │ │ + @ instruction: 0xe8d3fff8 │ │ ldr r1, [pc, #16] @ (88998 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90140 │ │ b.n 8899c │ │ nop │ │ - ldr r7, [r0, #56] @ 0x38 │ │ + ldr r6, [r7, #52] @ 0x34 │ │ vtbl.8 d20, {d9-d10}, d6 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (889bc ) │ │ cmp r0, #0 │ │ add r1, pc │ │ @@ -121067,15 +121067,15 @@ │ │ ldr r1, [pc, #20] @ (889e0 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr.w sl, [r1] │ │ beq.w 90150 │ │ b.n 889e4 │ │ nop │ │ - str r6, [r6, #20] │ │ + str r5, [r5, #20] │ │ vtbx.8 d23, {d25-d28}, d30 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (88a00 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (88a04 ) │ │ @@ -121110,15 +121110,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #672] @ 0x2a0 │ │ beq.w 90162 │ │ b.n 88a50 │ │ nop │ │ - stc2 15, cr15, [r9], {248} @ 0xf8 │ │ + ldc2l 15, cr15, [sp], #-992 @ 0xfffffc20 │ │ ldrb r6, [r1, #14] │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (88a6c ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (88a70 ) │ │ @@ -121175,15 +121175,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90180 │ │ b.n 88aec │ │ nop │ │ - str r5, [r6, #4] │ │ + str r4, [r5, #4] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90186 │ │ b.n 88b04 │ │ @@ -121238,33 +121238,33 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #548] @ 0x224 │ │ beq.w 917e6 │ │ b.n 88b94 │ │ - bl ddb84 │ │ + bl d1b84 │ │ ldr r1, [pc, #16] @ (88ba8 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, sl │ │ beq.w 917e6 │ │ b.n 88bac │ │ - b.n 88938 │ │ + b.n 88920 │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, fp │ │ beq.w 917e6 │ │ b.n 88bc4 │ │ - b.n 8894c │ │ + b.n 88934 │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, r8 │ │ beq.w 917e6 │ │ @@ -121363,15 +121363,15 @@ │ │ ldr r1, [pc, #20] @ (88ce0 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr.w sl, [r1] │ │ beq.w 901d8 │ │ b.n 88ce4 │ │ nop │ │ - ldrsh r7, [r3, r2] │ │ + ldrsh r6, [r2, r2] │ │ vqshrn.u64 d23, q7, #7 │ │ movs r6, r0 │ │ ldr r1, [pc, #16] @ (88cf8 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ @@ -121410,15 +121410,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 901f2 │ │ b.n 88d5c │ │ nop │ │ - ldrsh r7, [r5, r0] │ │ + ldrsh r6, [r4, r0] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 901fc │ │ b.n 88d74 │ │ @@ -121482,15 +121482,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90242 │ │ b.n 88e1c │ │ nop │ │ - lsls r4, r6, #10 │ │ + lsls r0, r5, #10 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 9024c │ │ b.n 88e34 │ │ @@ -121536,24 +121536,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 9027e │ │ b.n 88eac │ │ nop │ │ - str r5, [r0, #104] @ 0x68 │ │ + str r4, [r7, #100] @ 0x64 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90288 │ │ b.n 88ec4 │ │ nop │ │ - pld [sp, #248]! │ │ + pld [r1, #248]! │ │ ldr r1, [pc, #16] @ (88ed8 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90292 │ │ b.n 88edc │ │ @@ -121590,33 +121590,33 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 902ba │ │ b.n 88f3c │ │ nop │ │ - b.n 89602 │ │ + b.n 895ea │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 902c4 │ │ b.n 88f54 │ │ nop │ │ - str r2, [r5, #92] @ 0x5c │ │ + str r1, [r4, #92] @ 0x5c │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 902ce │ │ b.n 88f6c │ │ nop │ │ - bl af5c │ │ + bl ffffef5c │ │ ldr r1, [pc, #16] @ (88f80 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 902d8 │ │ b.n 88f84 │ │ @@ -121676,15 +121676,15 @@ │ │ ldr r1, [pc, #20] @ (8901c ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr.w fp, [r1] │ │ beq.w 90302 │ │ b.n 89020 │ │ nop │ │ - bl fff7200c │ │ + bl fff6600c │ │ strb r6, [r3, #25] │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8903c ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (89040 ) │ │ @@ -121770,15 +121770,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 9032c │ │ b.n 89104 │ │ nop │ │ - ldrh r4, [r2, r2] │ │ + ldrh r3, [r1, r2] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90332 │ │ b.n 8911c │ │ @@ -121824,15 +121824,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90350 │ │ b.n 89194 │ │ nop │ │ - ldr r2, [r4, #120] @ 0x78 │ │ + ldr r1, [r3, #120] @ 0x78 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #548] @ 0x224 │ │ beq.w 917e6 │ │ @@ -121851,15 +121851,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, fp │ │ beq.w 917e6 │ │ b.n 891dc │ │ - bl ffdbe1cc │ │ + bl ffdb21cc │ │ ldr r1, [pc, #16] @ (891f0 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, r8 │ │ beq.w 917e6 │ │ @@ -121914,15 +121914,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90360 │ │ b.n 89284 │ │ nop │ │ - b.n 892d8 │ │ + b.n 892c0 │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 9036a │ │ b.n 8929c │ │ @@ -121932,15 +121932,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90374 │ │ b.n 892b4 │ │ nop │ │ - ldr r2, [r7, r3] │ │ + ldr r1, [r6, r3] │ │ vtbl.8 d20, {d9-d10}, d6 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (892d4 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ @@ -121987,15 +121987,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 9038a │ │ b.n 89344 │ │ nop │ │ - bl 46d334 │ │ + bl 461334 │ │ ldr r1, [pc, #16] @ (89358 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90394 │ │ b.n 8935c │ │ @@ -122032,15 +122032,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 903bc │ │ b.n 893bc │ │ nop │ │ - strex pc, pc, [r3, #992] @ 0x3e0 │ │ + @ instruction: 0xe837fff8 │ │ ldr r1, [pc, #16] @ (893d0 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 903c6 │ │ b.n 893d4 │ │ @@ -122113,24 +122113,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90416 │ │ b.n 89494 │ │ nop │ │ - str r0, [r7, #8] │ │ + str r7, [r5, #8] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90420 │ │ b.n 894ac │ │ nop │ │ - bl 31049c │ │ + bl 30449c │ │ ldr r1, [pc, #16] @ (894c0 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 9042a │ │ b.n 894c4 │ │ @@ -122158,15 +122158,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90448 │ │ b.n 8950c │ │ nop │ │ - ldr r0, [r0, #68] @ 0x44 │ │ + ldr r7, [r6, #64] @ 0x40 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90452 │ │ b.n 89524 │ │ @@ -122194,24 +122194,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90470 │ │ b.n 8956c │ │ nop │ │ - @ instruction: 0xfb74fff8 │ │ + @ instruction: 0xfb68fff8 │ │ ldr r1, [pc, #16] @ (89580 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 9047a │ │ b.n 89584 │ │ nop │ │ - ldrsh r5, [r2, r7] │ │ + ldrsh r4, [r1, r7] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90484 │ │ b.n 8959c │ │ @@ -122221,37 +122221,37 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 9048e │ │ b.n 895b4 │ │ nop │ │ - ldrsb r5, [r0, r0] │ │ + strb r4, [r7, r7] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90498 │ │ b.n 895cc │ │ nop │ │ - b.n 89250 │ │ + b.n 89238 │ │ vtbl.8 d20, {d8-d9}, d6 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (895ec ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #548] @ 0x224 │ │ beq.w 904a2 │ │ b.n 895f0 │ │ nop │ │ - bl 1e45dc │ │ + bl 1d85dc │ │ strb r6, [r5, #4] │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8960c ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (89610 ) │ │ @@ -122271,29 +122271,29 @@ │ │ ldr r1, [pc, #20] @ (89634 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr.w fp, [r1] │ │ beq.w 905ec │ │ b.n 89638 │ │ nop │ │ - ldr r4, [r5, #48] @ 0x30 │ │ + ldr r3, [r4, #48] @ 0x30 │ │ vcge.s32 , q15, #0 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (89654 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (89658 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr.w r8, [r1] │ │ beq.w 905f2 │ │ b.n 8965c │ │ nop │ │ - strb r0, [r7, r5] │ │ + strb r7, [r5, r5] │ │ vcge.s32 , q7, #0 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (89678 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8967c ) │ │ @@ -122401,15 +122401,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 9062e │ │ b.n 8977c │ │ nop │ │ - blt.n 897f6 │ │ + blt.n 897de │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90634 │ │ b.n 89794 │ │ @@ -122428,15 +122428,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #548] @ 0x224 │ │ beq.w 917e6 │ │ b.n 897c4 │ │ - ldr r0, [r5, #24] │ │ + ldr r7, [r3, #24] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, sl │ │ beq.w 917e6 │ │ @@ -122600,15 +122600,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90688 │ │ b.n 8998c │ │ nop │ │ - bl fffec97c │ │ + bl fffe097c │ │ ldr r1, [pc, #16] @ (899a0 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90692 │ │ b.n 899a4 │ │ @@ -122618,15 +122618,15 @@ │ │ movmi r0, r4 │ │ addpl r1, pc │ │ blxpl edf80 │ │ cmp r0, #0 │ │ beq.w 9069c │ │ b.n 899bc │ │ nop │ │ - ldc 15, cr15, [r6, #992] @ 0x3e0 │ │ + stc 15, cr15, [sl, #992] @ 0x3e0 │ │ ldr r1, [pc, #16] @ (899d0 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 906a6 │ │ b.n 899d4 │ │ @@ -122636,24 +122636,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 906b0 │ │ b.n 899ec │ │ nop │ │ - bhi.n 899b2 │ │ + bhi.n 8999a │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 906ba │ │ b.n 89a04 │ │ nop │ │ - b.n 89e34 │ │ + b.n 89e1c │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 906c4 │ │ b.n 89a1c │ │ @@ -122663,15 +122663,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 906ce │ │ b.n 89a34 │ │ nop │ │ - stc 15, cr15, [sp, #-992]! @ 0xfffffc20 │ │ + stc 15, cr15, [r1, #-992]! @ 0xfffffc20 │ │ ldr r1, [pc, #16] @ (89a48 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 906d8 │ │ b.n 89a4c │ │ @@ -122708,15 +122708,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90700 │ │ b.n 89aac │ │ nop │ │ - stcl 15, cr15, [r3], {248} @ 0xf8 │ │ + ldc 15, cr15, [r7], #992 @ 0x3e0 │ │ ldr r1, [pc, #16] @ (89ac0 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 9070a │ │ b.n 89ac4 │ │ @@ -122726,15 +122726,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90714 │ │ b.n 89adc │ │ nop │ │ - ldc 15, cr15, [pc], {248} @ 0xf8 │ │ + ldc 15, cr15, [r3], {248} @ 0xf8 │ │ ldr r1, [pc, #16] @ (89af0 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 9071e │ │ b.n 89af4 │ │ @@ -122771,33 +122771,33 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90746 │ │ b.n 89b54 │ │ nop │ │ - str r7, [r0, r2] │ │ + str r6, [r7, r1] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90750 │ │ b.n 89b6c │ │ nop │ │ - ldr r4, [r7, r7] │ │ + ldr r3, [r6, r7] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 9075a │ │ b.n 89b84 │ │ nop │ │ - ldr r2, [r6, r7] │ │ + ldr r1, [r5, r7] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90764 │ │ b.n 89b9c │ │ @@ -122820,15 +122820,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #548] @ 0x224 │ │ beq.w 90778 │ │ b.n 89bd8 │ │ nop │ │ - b.n 89c90 │ │ + b.n 89c78 │ │ vtbx.8 d22, {d24-d27}, d2 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (89bf4 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (89bf8 ) │ │ @@ -122936,15 +122936,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 907ae │ │ b.n 89cf8 │ │ nop │ │ - ldr r3, [r1, r2] │ │ + ldr r2, [r0, r2] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 907b4 │ │ b.n 89d10 │ │ @@ -122981,15 +122981,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 907cc │ │ b.n 89d70 │ │ nop │ │ - ldr r6, [pc, #480] @ (89f50 ) │ │ + ldr r6, [pc, #444] @ (89f2c ) │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #548] @ 0x224 │ │ beq.w 917e6 │ │ @@ -123035,15 +123035,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #644] @ 0x284 │ │ beq.w 917e6 │ │ b.n 89e00 │ │ - bmi.n 89dbc │ │ + bmi.n 89da4 │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #640] @ 0x280 │ │ beq.w 917e6 │ │ @@ -123164,15 +123164,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #668] @ 0x29c │ │ beq.w 917e6 │ │ b.n 89f50 │ │ - str r3, [r6, #32] │ │ + str r2, [r5, #32] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 907fe │ │ b.n 89f68 │ │ @@ -123200,15 +123200,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #656] @ 0x290 │ │ beq.w 917e6 │ │ b.n 89fb0 │ │ - strb r1, [r5, r7] │ │ + strb r0, [r4, r7] │ │ vtbl.8 d25, {d25}, d18 │ │ ldr r0, [r0, #28] │ │ cmp r0, #0 │ │ beq.n 8a03c │ │ ldr r1, [pc, #16] @ (89fcc ) │ │ mov r0, r4 │ │ add r1, pc │ │ @@ -123276,38 +123276,38 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #652] @ 0x28c │ │ beq.w 917e6 │ │ b.n 8a074 │ │ - bcs.n 8a172 │ │ + bcs.n 8a15a │ │ vtbl.8 d20, {d8-d9}, d6 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8a094 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr.w r8, [r1] │ │ beq.w 90822 │ │ b.n 8a098 │ │ nop │ │ - bl fc084 │ │ + bl f0084 │ │ str r6, [r4, #112] @ 0x70 │ │ movs r6, r0 │ │ ldr r1, [pc, #16] @ (8a0ac ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90828 │ │ b.n 8a0b0 │ │ nop │ │ - bcs.n 8a164 │ │ + bcs.n 8a14c │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, r8 │ │ beq.w 917e6 │ │ @@ -123439,24 +123439,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, r8 │ │ beq.w 917e6 │ │ b.n 8a224 │ │ - b.n 89cea │ │ + b.n 89cd2 │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90894 │ │ b.n 8a23c │ │ nop │ │ - ldr r1, [pc, #772] @ (8a540 ) │ │ + ldr r1, [pc, #736] @ (8a51c ) │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 9089e │ │ b.n 8a254 │ │ @@ -123484,15 +123484,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 908bc │ │ b.n 8a29c │ │ nop │ │ - ldr r1, [pc, #432] @ (8a44c ) │ │ + ldr r1, [pc, #396] @ (8a428 ) │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 908c6 │ │ b.n 8a2b4 │ │ @@ -123538,15 +123538,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 908f8 │ │ b.n 8a32c │ │ nop │ │ - strh r4, [r7, r1] │ │ + strh r3, [r6, r1] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90902 │ │ b.n 8a344 │ │ @@ -123556,24 +123556,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 9090c │ │ b.n 8a35c │ │ nop │ │ - ldrsh r7, [r6, r0] │ │ + ldrsh r6, [r5, r0] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90916 │ │ b.n 8a374 │ │ nop │ │ - ldmia r7, {r1, r2, r3, r5, r7} │ │ + ldmia r7, {r1, r5, r7} │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90920 │ │ b.n 8a38c │ │ @@ -123587,15 +123587,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #664] @ 0x298 │ │ beq.w 9092a │ │ b.n 8a3b0 │ │ nop │ │ - strh r3, [r2, r0] │ │ + strh r2, [r1, r0] │ │ vtbl.8 d21, {d25-d28}, d30 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8a3cc ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8a3d0 ) │ │ @@ -123622,15 +123622,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90940 │ │ b.n 8a404 │ │ nop │ │ - ldr r0, [pc, #72] @ (8a44c ) │ │ + ldr r0, [pc, #36] @ (8a428 ) │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 9094a │ │ b.n 8a41c │ │ @@ -123640,42 +123640,42 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90954 │ │ b.n 8a434 │ │ nop │ │ - ldcl 15, cr15, [lr], {248} @ 0xf8 │ │ + ldcl 15, cr15, [r2], {248} @ 0xf8 │ │ ldr r1, [pc, #16] @ (8a448 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 9095e │ │ b.n 8a44c │ │ nop │ │ - str r7, [r6, r5] │ │ + str r6, [r5, r5] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90968 │ │ b.n 8a464 │ │ nop │ │ - ldmia r6, {r0, r1, r3, r6, r7} │ │ + ldmia r6!, {r0, r1, r2, r3, r4, r5, r7} │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90972 │ │ b.n 8a47c │ │ nop │ │ - ldrb r3, [r4, r4] │ │ + ldrb r2, [r3, r4] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 9097c │ │ b.n 8a494 │ │ @@ -123766,15 +123766,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 909e0 │ │ b.n 8a584 │ │ nop │ │ - str r4, [r1, r1] │ │ + str r3, [r0, r1] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 909ea │ │ b.n 8a59c │ │ @@ -123784,15 +123784,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 909f4 │ │ b.n 8a5b4 │ │ nop │ │ - @ instruction: 0xeb69fff8 │ │ + @ instruction: 0xeb5dfff8 │ │ ldr r1, [pc, #16] @ (8a5c8 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 909fe │ │ b.n 8a5cc │ │ @@ -123802,15 +123802,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90a08 │ │ b.n 8a5e4 │ │ nop │ │ - @ instruction: 0xeb44fff8 │ │ + @ instruction: 0xeb38fff8 │ │ ldr r1, [pc, #16] @ (8a5f8 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90a12 │ │ b.n 8a5fc │ │ @@ -123847,15 +123847,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90b84 │ │ b.n 8a65c │ │ nop │ │ - ldr r7, [pc, #524] @ (8a868 ) │ │ + ldr r7, [pc, #488] @ (8a844 ) │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90b8e │ │ b.n 8a674 │ │ @@ -123883,15 +123883,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90bac │ │ b.n 8a6bc │ │ nop │ │ - @ instruction: 0xea77fff8 │ │ + @ instruction: 0xea6bfff8 │ │ ldr r1, [pc, #16] @ (8a6d0 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90bb6 │ │ b.n 8a6d4 │ │ @@ -123982,15 +123982,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90c1a │ │ b.n 8a7c4 │ │ nop │ │ - add r2, fp │ │ + add r1, sl │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90c24 │ │ b.n 8a7dc │ │ @@ -124009,15 +124009,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90c38 │ │ b.n 8a80c │ │ nop │ │ - add r6, r3 │ │ + add r5, r2 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90c42 │ │ b.n 8a824 │ │ @@ -124027,15 +124027,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90c4c │ │ b.n 8a83c │ │ nop │ │ - svc 98 @ 0x62 │ │ + svc 86 @ 0x56 │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90c56 │ │ b.n 8a854 │ │ @@ -124054,15 +124054,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90c6a │ │ b.n 8a884 │ │ nop │ │ - ldr r6, [r4, r4] │ │ + ldr r5, [r3, r4] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90c74 │ │ b.n 8a89c │ │ @@ -124072,15 +124072,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90c7e │ │ b.n 8a8b4 │ │ nop │ │ - ldmia r2, {r1, r2, r7} │ │ + ldmia r2!, {r1, r3, r4, r5, r6} │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90c88 │ │ b.n 8a8cc │ │ @@ -124099,15 +124099,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90c9c │ │ b.n 8a8fc │ │ nop │ │ - ldmia r2, {r1, r2, r6} │ │ + ldmia r2!, {r1, r3, r4, r5} │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90ca6 │ │ b.n 8a914 │ │ @@ -124158,15 +124158,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, r8 │ │ beq.w 917e6 │ │ b.n 8a998 │ │ - ldr r2, [r3, r0] │ │ + ldr r1, [r2, r0] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90cd4 │ │ b.n 8a9b0 │ │ @@ -124238,15 +124238,15 @@ │ │ ldr r1, [pc, #20] @ (8aa6c ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr.w r9, [r1] │ │ beq.w 90d16 │ │ b.n 8aa70 │ │ nop │ │ - ble.n 8aaf6 │ │ + ble.n 8aade │ │ vsubw.u , q12, d22 │ │ movs r6, r0 │ │ ldr r1, [pc, #16] @ (8aa84 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ @@ -124284,15 +124284,15 @@ │ │ ldr r1, [pc, #20] @ (8aae4 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr.w fp, [r1] │ │ beq.w 90d22 │ │ b.n 8aae8 │ │ nop │ │ - ldr r3, [pc, #44] @ (8ab10 ) │ │ + ldr r3, [pc, #8] @ (8aaec ) │ │ vabs.s32 , q5 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8ab04 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8ab08 ) │ │ @@ -124356,33 +124356,33 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90d46 │ │ b.n 8ab9c │ │ nop │ │ - ldrsb r1, [r6, r0] │ │ + ldrsb r0, [r5, r0] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90d4c │ │ b.n 8abb4 │ │ nop │ │ - lsls r3, r0 │ │ + eors r2, r7 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90d52 │ │ b.n 8abcc │ │ nop │ │ - b.n 8a6b2 │ │ + b.n 8a69a │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90d58 │ │ b.n 8abe4 │ │ @@ -124464,15 +124464,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90d64 │ │ b.n 8acbc │ │ nop │ │ - strb r3, [r5, r4] │ │ + strb r2, [r4, r4] │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90d6e │ │ b.n 8acd4 │ │ @@ -124554,24 +124554,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90dc8 │ │ b.n 8adac │ │ nop │ │ - ldmia r6!, {r0, r4, r7} │ │ + ldmia r6!, {r0, r2, r7} │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90dd2 │ │ b.n 8adc4 │ │ nop │ │ - ldmia r6!, {r4, r7} │ │ + ldmia r6!, {r2, r7} │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90de4 │ │ b.n 8addc │ │ @@ -124608,15 +124608,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90e1c │ │ b.n 8ae3c │ │ nop │ │ - bls.n 8ad56 │ │ + bls.n 8ad3e │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90e2e │ │ b.n 8ae54 │ │ @@ -124644,15 +124644,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90e4c │ │ b.n 8ae9c │ │ nop │ │ - ldmia r5!, {r6, r7} │ │ + ldmia r5, {r2, r4, r5, r7} │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90e56 │ │ b.n 8aeb4 │ │ @@ -124725,15 +124725,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90eb6 │ │ b.n 8af74 │ │ nop │ │ - mov sp, r1 │ │ + mov ip, r0 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90ec0 │ │ b.n 8af8c │ │ @@ -124743,15 +124743,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90ed2 │ │ b.n 8afa4 │ │ nop │ │ - mov r3, sp │ │ + mov r2, ip │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #276] @ 0x114 │ │ beq.w 917e6 │ │ @@ -124761,15 +124761,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #272] @ 0x110 │ │ beq.w 917e6 │ │ b.n 8afd4 │ │ - ldmia r4, {r3, r4, r7} │ │ + ldmia r4!, {r2, r3, r7} │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90ee4 │ │ b.n 8afec │ │ @@ -124779,15 +124779,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90eee │ │ b.n 8b004 │ │ nop │ │ - mov r2, r3 │ │ + mov r1, r2 │ │ vtbl.8 d25, {d25}, d18 │ │ ldr.w r0, [r0, #152] @ 0x98 │ │ str r0, [sp, #0] │ │ cmp r0, #2 │ │ blt.n 8b088 │ │ ldr r1, [pc, #16] @ (8b024 ) │ │ mov r0, r4 │ │ @@ -124838,15 +124838,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90ef8 │ │ b.n 8b0a0 │ │ nop │ │ - stmia r2!, {r0, r1, r3, r5, r7} │ │ + stmia r2!, {r0, r1, r2, r3, r4, r7} │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90f0a │ │ b.n 8b0b8 │ │ @@ -124856,15 +124856,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 90f1c │ │ b.n 8b0d0 │ │ nop │ │ - subs r3, #132 @ 0x84 │ │ + subs r3, #123 @ 0x7b │ │ vtbl.8 d20, {d9-d10}, d6 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8b0f0 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ @@ -124985,15 +124985,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #656] @ 0x290 │ │ beq.w 90f5e │ │ b.n 8b214 │ │ nop │ │ - stmia r1!, {r4, r6} │ │ + stmia r1!, {r2, r6} │ │ @ instruction: 0xfff849d2 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8b230 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8b234 ) │ │ @@ -125045,15 +125045,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #640] @ 0x280 │ │ beq.w 90f76 │ │ b.n 8b2a4 │ │ nop │ │ - ldmia r1, {r0, r1, r3, r5, r6, r7} │ │ + ldmia r1, {r0, r1, r2, r3, r4, r6, r7} │ │ vqrshrn.u64 d20, q1, #8 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8b2c0 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8b2c4 ) │ │ @@ -125075,15 +125075,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #632] @ 0x278 │ │ beq.w 910b0 │ │ b.n 8b2ec │ │ nop │ │ - bmi.n 8b2dc │ │ + bmi.n 8b2c4 │ │ vqshrn.u64 d20, q1, #8 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8b308 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8b30c ) │ │ @@ -125225,15 +125225,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #560] @ 0x230 │ │ beq.w 910d8 │ │ b.n 8b454 │ │ nop │ │ - ldr r5, [pc, #704] @ (8b710 ) │ │ + ldr r5, [pc, #668] @ (8b6ec ) │ │ vneg.f32 q10, q9 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8b470 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8b474 ) │ │ @@ -125465,15 +125465,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #272] @ 0x110 │ │ beq.w 91118 │ │ b.n 8b694 │ │ nop │ │ - bge.n 8b632 │ │ + bge.n 8b61a │ │ vsli.64 q10, q15, #56 @ 0x38 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8b6b0 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8b6b4 ) │ │ @@ -125600,30 +125600,30 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #236] @ 0xec │ │ beq.w 9113c │ │ b.n 8b7d8 │ │ nop │ │ - stmia r4!, {r1, r3, r6, r7} │ │ + stmia r4!, {r1, r2, r3, r4, r5, r7} │ │ vsri.64 q10, q7, #8 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8b7f4 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8b7f8 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #232] @ 0xe8 │ │ beq.w 91140 │ │ b.n 8b7fc │ │ nop │ │ - subs r6, #65 @ 0x41 │ │ + subs r6, #56 @ 0x38 │ │ vsri.64 d20, d30, #7 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8b818 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8b81c ) │ │ @@ -125750,15 +125750,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #196] @ 0xc4 │ │ beq.w 91164 │ │ b.n 8b940 │ │ nop │ │ - ldmia r6!, {r1, r2, r4, r5, r7} │ │ + ldmia r6!, {r1, r3, r5, r7} │ │ vrsra.u64 d20, d14, #8 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8b95c ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8b960 ) │ │ @@ -125795,15 +125795,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #184] @ 0xb8 │ │ beq.w 91170 │ │ b.n 8b9ac │ │ nop │ │ - ldmia r6, {r2, r3, r4, r6} │ │ + ldmia r6, {r4, r6} │ │ vrsra.u32 d20, d30, #8 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8b9c8 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8b9cc ) │ │ @@ -125975,15 +125975,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #136] @ 0x88 │ │ beq.w 911a0 │ │ b.n 8bb5c │ │ nop │ │ - ldmia r4!, {r1, r6, r7} │ │ + ldmia r4, {r1, r2, r4, r5, r7} │ │ vsra.u64 q10, q5, #8 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8bb78 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8bb7c ) │ │ @@ -126170,15 +126170,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #84] @ 0x54 │ │ beq.w 911d4 │ │ b.n 8bd30 │ │ nop │ │ - cmp r7, #60 @ 0x3c │ │ + cmp r7, #51 @ 0x33 │ │ vshr.u32 d20, d18, #7 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8bd4c ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8bd50 ) │ │ @@ -126215,45 +126215,45 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #72] @ 0x48 │ │ beq.w 911e0 │ │ b.n 8bd9c │ │ nop │ │ - push {r3, r4, r6, r7, lr} │ │ + push {r2, r3, r6, r7, lr} │ │ vqrdmlah.s , q12, d14[0] │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8bdb8 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8bdbc ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #68] @ 0x44 │ │ beq.w 911e4 │ │ b.n 8bdc0 │ │ nop │ │ - add r0, fp │ │ + add r7, r9 │ │ @ instruction: 0xfff93eae │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8bddc ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8bde0 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #64] @ 0x40 │ │ beq.w 911e8 │ │ b.n 8bde4 │ │ nop │ │ - bcc.n 8bd02 │ │ + bcc.n 8bcea │ │ @ instruction: 0xfff83e8e │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8be00 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8be04 ) │ │ @@ -126335,30 +126335,30 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #40] @ 0x28 │ │ beq.w 91200 │ │ b.n 8bebc │ │ nop │ │ - pop {r0, r3, r4, r5, r6, r7, pc} │ │ + pop {r0, r2, r3, r5, r6, r7, pc} │ │ vqrdmlah.s , q4, d18[0] │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8bed8 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8bedc ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #36] @ 0x24 │ │ beq.w 91204 │ │ b.n 8bee0 │ │ nop │ │ - pop {r0, r4, r5, r6, r7, pc} │ │ + pop {r0, r2, r5, r6, r7, pc} │ │ vqrdmlah.s , q4, d2[0] │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8befc ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8bf00 ) │ │ @@ -126395,30 +126395,30 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #24] │ │ beq.w 91210 │ │ b.n 8bf4c │ │ nop │ │ - ldmia r0, {r0, r2, r3, r5, r6, r7} │ │ + ldmia r0, {r0, r5, r6, r7} │ │ vqrdmulh.s , q12, d18[0] │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8bf68 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8bf6c ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #20] │ │ beq.w 91214 │ │ b.n 8bf70 │ │ nop │ │ - push {r0, r1, r2, r3, r4} │ │ + push {r0, r1, r4} │ │ vqrdmulh.s , q12, d2[0] │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8bf8c ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8bf90 ) │ │ @@ -126481,15 +126481,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #548] @ 0x224 │ │ beq.w 917e6 │ │ b.n 8c018 │ │ - adds r6, #44 @ 0x2c │ │ + adds r6, #35 @ 0x23 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, sl │ │ beq.w 917e6 │ │ @@ -126508,24 +126508,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, r8 │ │ beq.w 917e6 │ │ b.n 8c060 │ │ - cmp r4, #16 │ │ + cmp r4, #7 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, r9 │ │ beq.w 917e6 │ │ b.n 8c078 │ │ - cmp r4, #9 │ │ + cmp r4, #0 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #668] @ 0x29c │ │ beq.w 917e6 │ │ @@ -126553,15 +126553,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #656] @ 0x290 │ │ beq.w 917e6 │ │ b.n 8c0d8 │ │ - pop {r0, r3} │ │ + cbnz r5, 8c156 │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #652] @ 0x28c │ │ beq.w 917e6 │ │ @@ -126571,15 +126571,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #648] @ 0x288 │ │ beq.w 917e6 │ │ b.n 8c108 │ │ - cbnz r4, 8c182 │ │ + cbnz r0, 8c180 │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #644] @ 0x284 │ │ beq.w 917e6 │ │ @@ -126598,24 +126598,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #636] @ 0x27c │ │ beq.w 917e6 │ │ b.n 8c150 │ │ - sxtb r0, r2 │ │ + sxtb r4, r0 │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #632] @ 0x278 │ │ beq.w 917e6 │ │ b.n 8c168 │ │ - cmp r3, #42 @ 0x2a │ │ + cmp r3, #33 @ 0x21 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #624] @ 0x270 │ │ beq.w 917e6 │ │ @@ -126688,15 +126688,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #564] @ 0x234 │ │ beq.w 917e6 │ │ b.n 8c240 │ │ - cbz r1, 8c25c │ │ + cbz r5, 8c258 │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #560] @ 0x230 │ │ beq.w 917e6 │ │ @@ -126706,15 +126706,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #556] @ 0x22c │ │ beq.w 917e6 │ │ b.n 8c270 │ │ - stmia r5!, {r2, r3, r4, r6, r7} │ │ + stmia r5!, {r4, r6, r7} │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #552] @ 0x228 │ │ beq.w 917e6 │ │ @@ -126769,15 +126769,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #356] @ 0x164 │ │ beq.w 917e6 │ │ b.n 8c318 │ │ - ldmia r6, {r2, r3, r5, r6} │ │ + ldmia r6, {r5, r6} │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #352] @ 0x160 │ │ beq.w 917e6 │ │ @@ -126805,15 +126805,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #340] @ 0x154 │ │ beq.w 917e6 │ │ b.n 8c378 │ │ - subs r6, #175 @ 0xaf │ │ + subs r6, #166 @ 0xa6 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #336] @ 0x150 │ │ beq.w 917e6 │ │ @@ -126823,15 +126823,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #332] @ 0x14c │ │ beq.w 917e6 │ │ b.n 8c3a8 │ │ - add sp, #128 @ 0x80 │ │ + add sp, #80 @ 0x50 │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #276] @ 0x114 │ │ beq.w 917e6 │ │ @@ -126967,15 +126967,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #216] @ 0xd8 │ │ beq.w 917e6 │ │ b.n 8c528 │ │ - subs r5, #26 │ │ + subs r5, #17 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #212] @ 0xd4 │ │ beq.w 917e6 │ │ @@ -126994,33 +126994,33 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #204] @ 0xcc │ │ beq.w 917e6 │ │ b.n 8c570 │ │ - subs r4, #234 @ 0xea │ │ + subs r4, #225 @ 0xe1 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #200] @ 0xc8 │ │ beq.w 917e6 │ │ b.n 8c588 │ │ - stmia r2!, {r2, r3, r4, r6, r7} │ │ + stmia r2!, {r4, r6, r7} │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #196] @ 0xc4 │ │ beq.w 917e6 │ │ b.n 8c5a0 │ │ - @ instruction: 0xb766 │ │ + @ instruction: 0xb75a │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #192] @ 0xc0 │ │ beq.w 917e6 │ │ @@ -127192,15 +127192,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #116] @ 0x74 │ │ beq.w 917e6 │ │ b.n 8c780 │ │ - stmia r0!, {r0, r3, r4, r5, r6, r7} │ │ + stmia r0!, {r0, r2, r3, r5, r6, r7} │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #112] @ 0x70 │ │ beq.w 917e6 │ │ @@ -127264,15 +127264,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #84] @ 0x54 │ │ beq.w 917e6 │ │ b.n 8c840 │ │ - add r3, sp, #648 @ 0x288 │ │ + add r3, sp, #600 @ 0x258 │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #80] @ 0x50 │ │ beq.w 917e6 │ │ @@ -127309,24 +127309,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #64] @ 0x40 │ │ beq.w 917e6 │ │ b.n 8c8b8 │ │ - subs r1, #187 @ 0xbb │ │ + subs r1, #178 @ 0xb2 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #60] @ 0x3c │ │ beq.w 917e6 │ │ b.n 8c8d0 │ │ - cmp r5, #141 @ 0x8d │ │ + cmp r5, #132 @ 0x84 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #56] @ 0x38 │ │ beq.w 917e6 │ │ @@ -127354,15 +127354,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #44] @ 0x2c │ │ beq.w 917e6 │ │ b.n 8c930 │ │ - cmp r5, #78 @ 0x4e │ │ + cmp r5, #69 @ 0x45 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #40] @ 0x28 │ │ beq.w 917e6 │ │ @@ -127408,24 +127408,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #20] │ │ beq.w 917e6 │ │ b.n 8c9c0 │ │ - add r2, sp, #212 @ 0xd4 │ │ + add r2, sp, #164 @ 0xa4 │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #16] │ │ beq.w 917e6 │ │ b.n 8c9d8 │ │ - cmp r4, #197 @ 0xc5 │ │ + cmp r4, #188 @ 0xbc │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #12] │ │ beq.w 917e6 │ │ @@ -127561,30 +127561,30 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #656] @ 0x290 │ │ beq.w 91244 │ │ b.n 8cb48 │ │ nop │ │ - pop {r0, r2, r4, r6, pc} │ │ + pop {r0, r3, r6, pc} │ │ @ instruction: 0xfff83daa │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8cb64 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8cb68 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #652] @ 0x28c │ │ beq.w 91248 │ │ b.n 8cb6c │ │ nop │ │ - add r0, sp, #724 @ 0x2d4 │ │ + add r0, sp, #676 @ 0x2a4 │ │ @ instruction: 0xfff83d8a │ │ movs r6, r0 │ │ ldr r1, [pc, #16] @ (8cb80 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ @@ -127659,15 +127659,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #660] @ 0x294 │ │ beq.w 917e6 │ │ b.n 8cc44 │ │ - adds r6, #77 @ 0x4d │ │ + adds r6, #68 @ 0x44 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #656] @ 0x290 │ │ beq.w 917e6 │ │ @@ -127686,15 +127686,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #280] @ 0x118 │ │ beq.w 917e6 │ │ b.n 8cc8c │ │ - sub sp, #60 @ 0x3c │ │ + sub sp, #12 │ │ vtbl.8 d20, {d8-d9}, d6 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8ccac ) │ │ cmp r0, #0 │ │ add r1, pc │ │ @@ -127764,15 +127764,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 91270 │ │ b.n 8cd4c │ │ nop │ │ - stmia r4!, {r3, r4, r6} │ │ + stmia r4!, {r2, r3, r6} │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 91274 │ │ b.n 8cd64 │ │ @@ -127810,30 +127810,30 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #608] @ 0x260 │ │ beq.w 91280 │ │ b.n 8cdc4 │ │ nop │ │ - stmia r4!, {} │ │ + stmia r3!, {r2, r4, r5, r6, r7} │ │ @ instruction: 0xfff83b52 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8cde0 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8cde4 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #632] @ 0x278 │ │ beq.w 91284 │ │ b.n 8cde8 │ │ nop │ │ - stmia r3!, {r0, r2, r3, r5, r6, r7} │ │ + stmia r3!, {r0, r5, r6, r7} │ │ @ instruction: 0xfff83b32 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8ce04 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8ce08 ) │ │ @@ -127947,15 +127947,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 912ac │ │ b.n 8cf14 │ │ nop │ │ - stmia r2!, {r1, r2, r6, r7} │ │ + stmia r2!, {r1, r3, r4, r5, r7} │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 912b0 │ │ b.n 8cf2c │ │ @@ -127974,15 +127974,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 912b8 │ │ b.n 8cf5c │ │ nop │ │ - adds r3, #75 @ 0x4b │ │ + adds r3, #66 @ 0x42 │ │ vtbl.8 d20, {d9-d10}, d6 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8cf7c ) │ │ cmp r0, #0 │ │ add r1, pc │ │ @@ -128148,15 +128148,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 912f0 │ │ b.n 8d10c │ │ nop │ │ - adds r1, #176 @ 0xb0 │ │ + adds r1, #167 @ 0xa7 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 912f4 │ │ b.n 8d124 │ │ @@ -128179,15 +128179,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #548] @ 0x224 │ │ beq.w 912fc │ │ b.n 8d160 │ │ nop │ │ - movs r5, #99 @ 0x63 │ │ + movs r5, #90 @ 0x5a │ │ vqshl.u64 , q9, #57 @ 0x39 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8d17c ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8d180 ) │ │ @@ -128250,15 +128250,15 @@ │ │ ldr r1, [pc, #20] @ (8d210 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr.w sl, [r1] │ │ beq.w 91314 │ │ b.n 8d214 │ │ nop │ │ - movs r4, #194 @ 0xc2 │ │ + movs r4, #185 @ 0xb9 │ │ vabs.f32 , q5 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8d230 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8d234 ) │ │ @@ -128278,30 +128278,30 @@ │ │ ldr r1, [pc, #20] @ (8d258 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr.w r8, [r1] │ │ beq.w 9131c │ │ b.n 8d25c │ │ nop │ │ - @ instruction: 0xb655 │ │ + @ instruction: 0xb649 │ │ vqabs.s32 d19, d10 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8d278 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8d27c ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #544] @ 0x220 │ │ beq.w 91320 │ │ b.n 8d280 │ │ nop │ │ - adds r0, #94 @ 0x5e │ │ + adds r0, #85 @ 0x55 │ │ vmlsl.u , d25, d26[0] │ │ movs r6, r0 │ │ ldr r1, [pc, #16] @ (8d294 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ @@ -128422,24 +128422,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #588] @ 0x24c │ │ beq.w 917e6 │ │ b.n 8d3d0 │ │ - add r0, pc, #336 @ (adr r0, 8d520 ) │ │ + add r0, pc, #288 @ (adr r0, 8d4f0 ) │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 91348 │ │ b.n 8d3e8 │ │ nop │ │ - adds r5, r7, r2 │ │ + adds r4, r6, r2 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #656] @ 0x290 │ │ beq.w 917e6 │ │ @@ -128449,15 +128449,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #608] @ 0x260 │ │ beq.w 917e6 │ │ b.n 8d418 │ │ - push {r5, r7} │ │ + push {r2, r4, r7} │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 9134c │ │ b.n 8d430 │ │ @@ -128530,15 +128530,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #556] @ 0x22c │ │ beq.w 917e6 │ │ b.n 8d4f0 │ │ - pop {r0, r1, r2, r3, r4, r5, r6, r7} │ │ + pop {r0, r1, r4, r5, r6, r7} │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 91358 │ │ b.n 8d508 │ │ @@ -128566,15 +128566,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 9135c │ │ b.n 8d550 │ │ nop │ │ - pop {r2, r4, r5, r7} │ │ + pop {r3, r5, r7} │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #652] @ 0x28c │ │ beq.w 917e6 │ │ @@ -128638,15 +128638,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #568] @ 0x238 │ │ beq.w 917e6 │ │ b.n 8d610 │ │ - uxth r4, r7 │ │ + uxth r0, r6 │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #548] @ 0x224 │ │ beq.w 917e6 │ │ @@ -128656,24 +128656,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, r9 │ │ beq.w 917e6 │ │ b.n 8d640 │ │ - ldr r5, [sp, #992] @ 0x3e0 │ │ + ldr r5, [sp, #944] @ 0x3b0 │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #604] @ 0x25c │ │ beq.w 917e6 │ │ b.n 8d658 │ │ - add r6, pc, #860 @ (adr r6, 8d9b4 ) │ │ + add r6, pc, #812 @ (adr r6, 8d984 ) │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #552] @ 0x228 │ │ beq.w 917e6 │ │ @@ -128764,24 +128764,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 91370 │ │ b.n 8d760 │ │ nop │ │ - subs r4, r7, #5 │ │ + subs r3, r6, #5 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 91374 │ │ b.n 8d778 │ │ nop │ │ - subs r3, r7, #5 │ │ + subs r2, r6, #5 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 91378 │ │ b.n 8d790 │ │ @@ -128845,15 +128845,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 913a4 │ │ b.n 8d838 │ │ nop │ │ - sub sp, #168 @ 0xa8 │ │ + sub sp, #120 @ 0x78 │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 913a8 │ │ b.n 8d850 │ │ @@ -128863,15 +128863,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 913b0 │ │ b.n 8d868 │ │ nop │ │ - asrs r1, r2, #17 │ │ + asrs r0, r1, #17 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #284] @ 0x11c │ │ beq.w 917e6 │ │ @@ -128917,15 +128917,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 913cc │ │ b.n 8d8f8 │ │ nop │ │ - ldr r3, [sp, #344] @ 0x158 │ │ + ldr r3, [sp, #296] @ 0x128 │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 913d0 │ │ b.n 8d910 │ │ @@ -128944,15 +128944,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 913d8 │ │ b.n 8d940 │ │ nop │ │ - adds r2, r1, #7 │ │ + adds r1, r0, #7 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 913dc │ │ b.n 8d958 │ │ @@ -128998,15 +128998,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 913f0 │ │ b.n 8d9d0 │ │ nop │ │ - ldr r2, [sp, #564] @ 0x234 │ │ + ldr r2, [sp, #516] @ 0x204 │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 913f4 │ │ b.n 8d9e8 │ │ @@ -129070,15 +129070,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 91410 │ │ b.n 8da90 │ │ nop │ │ - adds r1, r1, #2 │ │ + adds r0, r0, #2 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 91418 │ │ b.n 8daa8 │ │ @@ -129133,15 +129133,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 9143c │ │ b.n 8db38 │ │ nop │ │ - subs r3, r7, r7 │ │ + subs r2, r6, r7 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 91440 │ │ b.n 8db50 │ │ @@ -129154,29 +129154,29 @@ │ │ ldr r1, [pc, #20] @ (8db70 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr.w r8, [r1] │ │ beq.w 91444 │ │ b.n 8db74 │ │ nop │ │ - movs r7, #126 @ 0x7e │ │ + movs r7, #117 @ 0x75 │ │ @ instruction: 0xfff92e2e │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8db90 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8db94 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr.w r9, [r1] │ │ beq.w 91448 │ │ b.n 8db98 │ │ nop │ │ - add r5, sp, #420 @ 0x1a4 │ │ + add r5, sp, #372 @ 0x174 │ │ @ instruction: 0xfff82e0e │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8dbb4 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8dbb8 ) │ │ @@ -129331,30 +129331,30 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #636] @ 0x27c │ │ beq.w 91474 │ │ b.n 8dd24 │ │ nop │ │ - push {r0, lr} │ │ + push {r0, r2, r4, r5, r6, r7} │ │ vmull.u q9, d24, d30 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8dd40 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8dd44 ) │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #632] @ 0x278 │ │ beq.w 91478 │ │ b.n 8dd48 │ │ nop │ │ - subs r1, r1, r0 │ │ + subs r0, r0, r0 │ │ vmull.u q9, d25, d14 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8dd64 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8dd68 ) │ │ @@ -129391,15 +129391,15 @@ │ │ cmp r0, #0 │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ str r1, [sp, #608] @ 0x260 │ │ beq.w 91484 │ │ b.n 8ddb4 │ │ nop │ │ - ldr r7, [sp, #628] @ 0x274 │ │ + ldr r7, [sp, #580] @ 0x244 │ │ vmull.u q9, d8, d30 │ │ movs r6, r0 │ │ ldr r1, [pc, #24] @ (8ddd0 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ ldr r1, [pc, #20] @ (8ddd4 ) │ │ @@ -129468,15 +129468,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #612] @ 0x264 │ │ beq.w 917e6 │ │ b.n 8de74 │ │ - movs r4, #133 @ 0x85 │ │ + movs r4, #124 @ 0x7c │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #600] @ 0x258 │ │ beq.w 917e6 │ │ @@ -129549,15 +129549,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #320] @ 0x140 │ │ beq.w 917e6 │ │ b.n 8df4c │ │ - uxtb r1, r4 │ │ + uxtb r5, r2 │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #316] @ 0x13c │ │ beq.w 917e6 │ │ @@ -129594,15 +129594,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #504] @ 0x1f8 │ │ beq.w 917e6 │ │ b.n 8dfc4 │ │ - lsrs r7, r0, #20 │ │ + lsrs r6, r7, #19 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #500] @ 0x1f4 │ │ beq.w 917e6 │ │ @@ -129630,15 +129630,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #488] @ 0x1e8 │ │ beq.w 917e6 │ │ b.n 8e024 │ │ - lsrs r7, r7, #18 │ │ + lsrs r6, r6, #18 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #484] @ 0x1e4 │ │ beq.w 917e6 │ │ @@ -129648,15 +129648,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #304] @ 0x130 │ │ beq.w 917e6 │ │ b.n 8e054 │ │ - ldr r5, [sp, #44] @ 0x2c │ │ + ldr r4, [sp, #1020] @ 0x3fc │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #300] @ 0x12c │ │ beq.w 917e6 │ │ @@ -129684,15 +129684,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #480] @ 0x1e0 │ │ beq.w 917e6 │ │ b.n 8e0b4 │ │ - str r3, [sp, #740] @ 0x2e4 │ │ + str r3, [sp, #692] @ 0x2b4 │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #476] @ 0x1dc │ │ beq.w 917e6 │ │ @@ -129738,24 +129738,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #456] @ 0x1c8 │ │ beq.w 917e6 │ │ b.n 8e144 │ │ - add r7, pc, #784 @ (adr r7, 8e454 ) │ │ + add r7, pc, #736 @ (adr r7, 8e424 ) │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #452] @ 0x1c4 │ │ beq.w 917e6 │ │ b.n 8e15c │ │ - add r7, pc, #752 @ (adr r7, 8e44c ) │ │ + add r7, pc, #704 @ (adr r7, 8e41c ) │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #448] @ 0x1c0 │ │ beq.w 917e6 │ │ @@ -129801,15 +129801,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #428] @ 0x1ac │ │ beq.w 917e6 │ │ b.n 8e1ec │ │ - ldr r3, [sp, #520] @ 0x208 │ │ + ldr r3, [sp, #472] @ 0x1d8 │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #424] @ 0x1a8 │ │ beq.w 917e6 │ │ @@ -129819,15 +129819,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #420] @ 0x1a4 │ │ beq.w 917e6 │ │ b.n 8e21c │ │ - str r2, [sp, #396] @ 0x18c │ │ + str r2, [sp, #348] @ 0x15c │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #416] @ 0x1a0 │ │ beq.w 917e6 │ │ @@ -129873,24 +129873,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #400] @ 0x190 │ │ beq.w 917e6 │ │ b.n 8e2ac │ │ - movs r0, #95 @ 0x5f │ │ + movs r0, #86 @ 0x56 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #396] @ 0x18c │ │ beq.w 917e6 │ │ b.n 8e2c4 │ │ - add r7, sp, #492 @ 0x1ec │ │ + add r7, sp, #444 @ 0x1bc │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #392] @ 0x188 │ │ beq.w 917e6 │ │ @@ -129927,24 +129927,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #376] @ 0x178 │ │ beq.w 917e6 │ │ b.n 8e33c │ │ - add r5, pc, #940 @ (adr r5, 8e6e8 ) │ │ + add r5, pc, #892 @ (adr r5, 8e6b8 ) │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #372] @ 0x174 │ │ beq.w 917e6 │ │ b.n 8e354 │ │ - add r5, pc, #928 @ (adr r5, 8e6f4 ) │ │ + add r5, pc, #880 @ (adr r5, 8e6c4 ) │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #368] @ 0x170 │ │ beq.w 917e6 │ │ @@ -129963,15 +129963,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, r8 │ │ beq.w 917e6 │ │ b.n 8e39c │ │ - asrs r5, r7, #14 │ │ + asrs r4, r6, #14 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, r9 │ │ beq.w 917e6 │ │ @@ -129981,15 +129981,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, sl │ │ beq.w 917e6 │ │ b.n 8e3cc │ │ - asrs r3, r4, #14 │ │ + asrs r2, r3, #14 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, fp │ │ beq.w 917e6 │ │ @@ -130035,15 +130035,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #652] @ 0x28c │ │ beq.w 917e6 │ │ b.n 8e45c │ │ - add r5, sp, #988 @ 0x3dc │ │ + add r5, sp, #940 @ 0x3ac │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #648] @ 0x288 │ │ beq.w 917e6 │ │ @@ -130089,24 +130089,24 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #624] @ 0x270 │ │ beq.w 917e6 │ │ b.n 8e4ec │ │ - ldr r0, [sp, #580] @ 0x244 │ │ + ldr r0, [sp, #532] @ 0x214 │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #620] @ 0x26c │ │ beq.w 917e6 │ │ b.n 8e504 │ │ - ldrh r2, [r1, #60] @ 0x3c │ │ + ldrh r6, [r7, #58] @ 0x3a │ │ vtbl.8 d20, {d8-d9}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ ldr r0, [sp, #608] @ 0x260 │ │ beq.w 917e6 │ │ @@ -130183,15 +130183,15 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ beq.w 9149c │ │ b.n 8e5e4 │ │ nop │ │ - lsls r6, r2, #28 │ │ + lsls r5, r1, #28 │ │ vtbl.8 d20, {d9-d10}, d4 │ │ mov r0, r4 │ │ add r1, pc │ │ blx edf80 │ │ cmp r0, #0 │ │ mov r0, r5 │ │ beq.w 917e6 │ │ @@ -130641,74 +130641,74 @@ │ │ vqshl.u64 , q14, #57 @ 0x39 │ │ movs r6, r0 │ │ ldrh r0, [r2, #28] │ │ @ instruction: 0xfff98b99 │ │ vqrdmlsh.s , , d23[0] │ │ vneg.f32 , q4 │ │ movs r6, r0 │ │ - adds r4, r4, #0 │ │ + adds r3, r3, #0 │ │ @ instruction: 0xfff99df0 │ │ - vtbx.8 d26, {d9-d12}, d12 │ │ + vtbx.8 d26, {d9-d12}, d0 │ │ vqshl.u64 d17, d4, #56 @ 0x38 │ │ movs r6, r0 │ │ - str r6, [sp, #384] @ 0x180 │ │ + str r6, [sp, #336] @ 0x150 │ │ vtbl.8 d27, {d8-d10}, d8 │ │ vtbx.8 d22, {d8}, d28 │ │ vpaddl.u32 d18, d12 │ │ movs r6, r0 │ │ subs r2, #89 @ 0x59 │ │ vqrshrun.s64 d22, q6, #7 │ │ vrev32.32 d19, d3 │ │ vtbl.8 d27, {d9-d10}, d4 │ │ - @ instruction: 0xfff90fd7 │ │ - vtbx.8 d26, {d25-d27}, d14 │ │ + vqrdmlsh.s q8, , d14[0] │ │ + vtbx.8 d26, {d25-d27}, d2 │ │ vrshr.u64 d23, d11, #8 │ │ vtbl.8 d26, {d8-d9}, d19 │ │ vqshlu.s32 q11, q0, #25 │ │ vsli.64 d20, d31, #57 @ 0x39 │ │ vqshlu.s32 d22, d31, #25 │ │ vqrdmlah.s , , d7[0] │ │ vsra.u64 q9, q2, #7 │ │ movs r6, r0 │ │ - lsls r2, r4, #19 │ │ + lsls r1, r3, #19 │ │ vdup.8 , d13[4] │ │ vsli.64 q11, q15, #57 @ 0x39 │ │ vmull.u , d25, d25 │ │ @ instruction: 0xfff9a898 │ │ vabs.f32 q11, │ │ vaddw.u q15, q12, d27 │ │ - @ instruction: 0xfff8a9f3 │ │ + vtbx.8 d26, {d24-d25}, d23 │ │ vaddw.u q15, q12, d23 │ │ vsri.64 q10, q15, #8 │ │ - @ instruction: 0xfff90ebc │ │ + @ instruction: 0xfff90eb3 │ │ @ instruction: 0xfff938f0 │ │ vsra.u64 d25, d27, #7 │ │ @ instruction: 0xfff9cb5e │ │ vmull.u , d8, d13 │ │ vqshl.u64 q13, , #57 @ 0x39 │ │ vqshl.u32 , , #25 │ │ vsra.u32 d23, d16, #7 │ │ vmull.u q15, d8, d28 │ │ - vqrdmlsh.s , q12, d18[0] │ │ + @ instruction: 0xfff89fd6 │ │ vpadal.u32 d22, d14 │ │ - vtbl.8 d26, {d8-d9}, d30 │ │ + vtbl.8 d26, {d8-d9}, d18 │ │ vsli.64 q9, q4, #56 @ 0x38 │ │ - @ instruction: 0xfff90e0a │ │ + @ instruction: 0xfff90e01 │ │ vcge.s32 q15, , #0 │ │ @ instruction: 0xfff888b8 │ │ vcgt.s32 d28, d12, #0 │ │ @ instruction: 0xfff8ca9c │ │ @ instruction: 0xfff84ed5 │ │ vcle.s32 d28, d16, #0 │ │ - vrsra.u64 d25, d11, #7 │ │ + vneg.s32 d25, d15 │ │ vsli.64 q11, , #56 @ 0x38 │ │ - @ instruction: 0xfff80d88 │ │ + vcvt.u16.f16 q8, , #8 │ │ @ instruction: 0xfff97b1e │ │ - vrsra.u32 , , #8 │ │ - vtbx.8 d26, {d8}, d29 │ │ + @ instruction: 0xfff89365 │ │ + vtbx.8 d26, {d8}, d17 │ │ @ instruction: 0xfff848fe │ │ add r0, pc │ │ ldr r0, [r0, #0] │ │ b.w 917e6 │ │ ldr r0, [pc, #1012] @ (8ef7c ) │ │ add r0, pc │ │ ldr r0, [r0, #0] │ │ @@ -135329,65 +135329,65 @@ │ │ add r1, pc │ │ blx edfe0 │ │ ldr r0, [pc, #220] @ (918c0 ) │ │ add r0, pc │ │ add.w sp, sp, #676 @ 0x2a4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - strb r3, [r5, #3] │ │ - vabal.u q11, d24, d4 │ │ + strb r7, [r3, #3] │ │ + vsli.32 q11, q12, #24 │ │ vcvt.u16.f16 q9, , #8 │ │ - vshr.u64 , , #1 │ │ + vmla.i , , d13[0] │ │ vcvt.f16.u16 q9, , #8 │ │ vqrdmulh.s q9, , d27[0] │ │ - vmla.i , , d7[0] │ │ + vshr.u64 d23, d27, #1 │ │ vpadal.u32 , q9 │ │ vcvt.u16.f16 q9, , #8 │ │ - vshr.u64 d23, d21, #1 │ │ - vrev32.32 , │ │ + vaddl.u , d31, d25 │ │ + vshr.u64 d23, d23, #8 │ │ vqrdmulh.s q9, q4, d7[0] │ │ - vaddl.u , d31, d19 │ │ + vshr.u64 d23, d7, #1 │ │ @ instruction: 0xfff84cd6 │ │ vcvt.u16.f16 d18, d21, #8 │ │ - vshr.u64 d23, d1, #1 │ │ + vaddl.u , d31, d5 │ │ vpaddl.s32 d20, d16 │ │ @ instruction: 0xfff82d23 │ │ - vshr.u32 , , #1 │ │ + vshr.u32 , , #1 │ │ vcvt.u32.f32 , q8, #8 │ │ vcvt.u16.f16 d18, d1, #7 │ │ - vmla.i , , d29[0] │ │ - vqrdmlah.s , q12, d1[0] │ │ + vmla.i , , d17[0] │ │ + @ instruction: 0xfff8deb8 │ │ @ instruction: 0xfff82cff │ │ - vshr.u32 , , #1 │ │ - vtbx.8 d21, {d24-d27}, d27 │ │ + vmla.i , , d15[0] │ │ + @ instruction: 0xfff85bdf │ │ vqdmulh.s q9, q12, d29[0] │ │ - vmla.i , , d9[0] │ │ + vshr.u32 d23, d29, #1 │ │ vtbx.8 d23, {d8}, d5 │ │ @ instruction: 0xfff92cdb │ │ - vshr.u32 d23, d23, #1 │ │ - vsri.64 , q0, #8 │ │ + vaddl.u , d15, d27 │ │ + vclz.i32 , │ │ vqdmulh.s q9, q12, d9[0] │ │ - vaddl.u , d15, d21 │ │ + vshr.u32 d23, d9, #1 │ │ vshr.u32 q8, , #8 │ │ @ instruction: 0xfff92cb7 │ │ - vshr.u32 d23, d3, #1 │ │ + vaddl.u , d15, d7 │ │ @ instruction: 0xfff888fa │ │ vmull.u q9, d25, d21 │ │ - vaddl.u , d15, d1 │ │ - vqrdmlsh.s , q12, d11[0] │ │ + @ instruction: 0xffff6ff5 │ │ + vqrdmlsh.s , q12, d2[0] │ │ @ instruction: 0xfff82c93 │ │ - vqrdmlsh.s q11, , d31[0] │ │ - vtbx.8 d23, {d24-d26}, d0 │ │ + vqrdmlsh.s q11, , d19[0] │ │ + @ instruction: 0xfff87ab4 │ │ vmull.u q9, d24, d1 │ │ vqrdmlah.s q9, , d17[0] │ │ - @ instruction: 0xffff6fdd │ │ + @ instruction: 0xffff6fd1 │ │ vpaddl.u32 d20, d11 │ │ vqdmulh.s q9, q4, d31[0] │ │ @ instruction: 0xffff2ed1 │ │ - vqrdmlsh.s q11, , d11[0] │ │ + @ instruction: 0xffff6fbf │ │ vqshrn.u64 d23, , #8 │ │ vcvt.f16.u16 q9, , #7 │ │ vmls.i , , d22[0] │ │ movs r5, r0 │ │ orn r0, r2, #8716288 @ 0x850000 │ │ orrs.w r0, lr, #8716288 @ 0x850000 │ │ orrs.w r0, sl, #8716288 @ 0x850000 │ │ @@ -135978,37 +135978,37 @@ │ │ vcvt.u32.f32 d21, d4, #7 │ │ vcge.f32 q12, , #0 │ │ vtbl.8 d27, {d25-d26}, d18 │ │ @ instruction: 0xfff8df06 │ │ movs r5, r0 │ │ cmp r0, #152 @ 0x98 │ │ vclt.s32 , , #0 │ │ - vcle.s32 d22, d30, #0 │ │ - vqrshrun.s64 d21, , #8 │ │ - vtbx.8 d21, {d8}, d19 │ │ + vcle.s32 d22, d18, #0 │ │ + vtbx.8 d21, {d8}, d13 │ │ + vqrshrun.s64 d21, , #8 │ │ vcvt.u32.f32 q12, , #8 │ │ @ instruction: 0xfff968dd │ │ vtbl.8 d25, {d9}, d6 │ │ @ instruction: 0xfff8ae0d │ │ vtbx.8 d31, {d8-d11}, d26 │ │ vsli.32 d16, d17, #24 │ │ @ instruction: 0xfff98f0a │ │ - vshr.u32 d29, d28, #7 │ │ + vshr.u32 d29, d19, #7 │ │ vclz.i32 d23, d14 │ │ vqrdmlah.s q12, , d19[0] │ │ vqshrn.u64 d20, q12, #7 │ │ vtbl.8 d20, {d9-d10}, d27 │ │ vshr.u32 , , #7 │ │ vsri.32 d23, d0, #7 │ │ vqrdmlah.s q12, , d21[0] │ │ vcgt.f32 d23, d2, #0 │ │ vcgt.f32 q8, q3, #0 │ │ vsri.64 d28, d29, #7 │ │ vmull.u , d24, d22 │ │ - vqrdmlsh.s q14, q4, d1[0] │ │ + vcvt.u32.f32 d28, d24, #8 │ │ vclz.i32 d21, d6 │ │ vrsubhn.i d18, , q9 │ │ Address 0x91f4a is out of bounds. │ │ │ │ │ │ 00091f4c : │ │ push {r4, r5, r7, lr} │ │ @@ -136142,29 +136142,29 @@ │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ bx r1 │ │ adds r3, #82 @ 0x52 │ │ movs r6, r0 │ │ adds r3, #56 @ 0x38 │ │ movs r6, r0 │ │ ldrb r7, [r7, #14] │ │ - @ instruction: 0xfff86995 │ │ + vtbl.8 d22, {d24-d25}, d9 │ │ vqshlu.s64 q10, q3, #56 @ 0x38 │ │ - vcvt.f32.u32 , q7, #7 │ │ - @ instruction: 0xfff85e28 │ │ + vcvt.f32.u32 , q1, #7 │ │ + vcvt.f32.u32 d21, d12, #8 │ │ @ instruction: 0xfff80b32 │ │ movs r6, r0 │ │ lsrs r0, r5, #12 │ │ movs r6, r0 │ │ adds r4, #166 @ 0xa6 │ │ movs r6, r0 │ │ adds r4, #172 @ 0xac │ │ movs r6, r0 │ │ bl ffda909c │ │ bl ffd7d0a0 │ │ - strb r3, [r0, #10] │ │ + strb r7, [r6, #9] │ │ vshr.u64 , , #8 │ │ vclt.f32 q10, , #0 │ │ @ instruction: 0xfff97b3b │ │ @ instruction: 0xfff87b31 │ │ vtbx.8 d23, {d8-d11}, d1 │ │ vsli.64 , q0, #56 @ 0x38 │ │ add r7, sp, #8 │ │ @@ -138612,15 +138612,15 @@ │ │ movs r0, r0 │ │ movs r0, r0 │ │ ldr r7, [pc, #0] @ (93784 ) │ │ bvs.n 93728 │ │ movs r5, r0 │ │ lsls r6, r5, #18 │ │ @ instruction: 0xfff95d0b │ │ - @ instruction: 0xfff95ef2 │ │ + vqrdmlah.s , , d22[0] │ │ vcvt.f32.u32 , q9, #8 │ │ movs r6, r0 │ │ @ instruction: 0xf62e0005 │ │ @ instruction: 0xf5200005 │ │ and.w r0, r4, #8716288 @ 0x850000 │ │ @ instruction: 0xf3d00005 │ │ bvs.n 937e0 │ │ @@ -141340,17 +141340,17 @@ │ │ movs r5, r0 │ │ lsls r4, r2, #11 │ │ movs r6, r0 │ │ lsls r6, r0, #11 │ │ movs r6, r0 │ │ asrs r6, r4, #32 │ │ @ instruction: 0xfff90ebe │ │ - @ instruction: 0xfff92a7e │ │ + @ instruction: 0xfff92a72 │ │ vpadal.s32 q8, q10 │ │ - vceq.i32 d18, d28, #0 │ │ + vceq.i32 d18, d16, #0 │ │ @ instruction: 0xfff8ad28 │ │ movs r5, r0 │ │ │ │ 00095438 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ @@ -141610,16 +141610,16 @@ │ │ movs r5, r0 │ │ bvs.n 9567c │ │ movs r5, r0 │ │ movs r0, r4 │ │ movs r6, r0 │ │ movs r4, r3 │ │ movs r6, r0 │ │ - add r3, sp, #100 @ 0x64 │ │ - vtbl.8 d26, {d24-d25}, d15 │ │ + add r3, sp, #64 @ 0x40 │ │ + vtbl.8 d26, {d24-d25}, d6 │ │ vqdmulh.s q12, q4, d0[0] │ │ vrsra.u64 d16, d4, #8 │ │ @ instruction: 0xfff92f0f │ │ vtbl.8 d26, {d25-d27}, d14 │ │ movs r5, r0 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ @@ -141822,16 +141822,16 @@ │ │ movs r5, r0 │ │ bcc.n 958a0 │ │ movs r5, r0 │ │ bcc.n 958a0 │ │ movs r5, r0 │ │ ldc2 0, cr0, [r8, #-20] @ 0xffffffec │ │ ldc2 0, cr0, [ip, #-20] @ 0xffffffec │ │ - add r0, sp, #100 @ 0x64 │ │ - vqshlu.s64 q13, , #56 @ 0x38 │ │ + add r0, sp, #64 @ 0x40 │ │ + vqshlu.s64 q13, q11, #56 @ 0x38 │ │ @ instruction: 0xfff889ba │ │ vrev16.32 d16, d14 │ │ @ instruction: 0xfff97cd9 │ │ vqshl.u32 q13, q14, #24 │ │ movs r5, r0 │ │ │ │ 00095920 : │ │ @@ -142125,15 +142125,15 @@ │ │ movs r5, r0 │ │ beq.n 95b50 │ │ movs r5, r0 │ │ vld1.8 {d16[0]}, [r0], r5 │ │ vld1.8 {d16[0]}, [r6], r5 │ │ lsls r0, r1, #29 │ │ vclt.f32 q8, q8, #0 │ │ - vclt.s32 d18, d24, #0 │ │ + vrshr.u32 d18, d12, #7 │ │ @ instruction: 0xfff8fe0e │ │ vsubw.u q11, q12, d23 │ │ vcls.s32 q13, q4 │ │ movs r5, r0 │ │ │ │ 00095c20 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -143672,16 +143672,16 @@ │ │ b.w 56db0 │ │ ite pl │ │ movpl r5, r0 │ │ itet cc @ unpredictable │ │ movcc r5, r0 │ │ strdcs r0, r0, [ip], #-20 │ │ ldrdcc r0, r0, [r4], #-20 │ │ - ldr r5, [sp, #232] @ 0xe8 │ │ - @ instruction: 0xfff89d2e │ │ + ldr r5, [sp, #196] @ 0xc4 │ │ + @ instruction: 0xfff89d25 │ │ vqshl.u64 , q9, #56 @ 0x38 │ │ vcvt.u16.f16 q15, q14, #8 │ │ vabal.u , d24, d24 │ │ vsli.64 , q8, #56 @ 0x38 │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ ldr r1, [pc, #396] @ (96eb8 ) │ │ @@ -143868,43 +143868,43 @@ │ │ bl 208eba │ │ bkpt 0x004e │ │ movs r5, r0 │ │ bkpt 0x0060 │ │ movs r5, r0 │ │ ldr r4, [pc, #532] @ (970ec ) │ │ vcvt.f16.u16 q15, q15, #8 │ │ - vsli.64 d25, d17, #56 @ 0x38 │ │ + vabal.u , d24, d24 │ │ vcvt.f32.u32 d27, d30, #8 │ │ movs r5, r0 │ │ b.n 96d4c │ │ movs r5, r0 │ │ vmaxnm.f16 , q9, │ │ vmaxnm.f32 , q8, │ │ bkpt 0x0008 │ │ movs r5, r0 │ │ bkpt 0x001a │ │ movs r5, r0 │ │ - lsrs r7, r4, #9 │ │ + lsrs r3, r3, #9 │ │ vcvt.f16.u16 d30, d16, #8 │ │ - @ instruction: 0xfff89563 │ │ + vsli.32 , q5, #24 │ │ vsri.64 q15, q4, #8 │ │ movs r5, r0 │ │ pop {r2, r4, r6, r7, pc} │ │ movs r5, r0 │ │ sub sp, #280 @ 0x118 │ │ movs r5, r0 │ │ b.n 96c78 │ │ movs r5, r0 │ │ mrc2 15, 1, pc, cr6, cr8, {7} │ │ mcr2 15, 1, pc, cr4, cr8, {7} @ │ │ sub sp, #64 @ 0x40 │ │ movs r5, r0 │ │ sub sp, #136 @ 0x88 │ │ movs r5, r0 │ │ - cmp r3, #139 @ 0x8b │ │ + cmp r3, #127 @ 0x7f │ │ @ instruction: 0xfff8feb3 │ │ vtbx.8 d20, {d23-d26}, d31 │ │ vshr.u32 , q5, #8 │ │ movs r5, r0 │ │ pop {r1, r2, r4, pc} │ │ movs r5, r0 │ │ │ │ @@ -145796,15 +145796,15 @@ │ │ movs r5, r0 │ │ bcs.n 98238 │ │ movs r5, r0 │ │ cmp r6, #182 @ 0xb6 │ │ @ instruction: 0xfff82ea8 │ │ vtbx.8 d26, {d24-d27}, d5 │ │ vqneg.s32 , q0 │ │ - vpaddl.u32 d31, d16 │ │ + vrshr.u64 d31, d4, #8 │ │ vcvta.s16.f16 , q11 │ │ movs r5, r0 │ │ │ │ 000982dc : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -146380,17 +146380,17 @@ │ │ movs r5, r0 │ │ adds r5, #154 @ 0x9a │ │ vclz.i32 , q9 │ │ vrsra.u64 q13, q0, #8 │ │ movs r5, r0 │ │ add r3, pc, #912 @ (adr r3, 98be4 ) │ │ movs r5, r0 │ │ - bl fff0c846 │ │ + bl fff00846 │ │ bcs.n 9889c │ │ - vaddw.u q8, q12, d6 │ │ + vsra.u32 q8, q13, #8 │ │ vsubw.u q13, q12, d28 │ │ movs r5, r0 │ │ ldrb r0, [r5, #0] │ │ movs r5, r0 │ │ add r4, pc, #184 @ (adr r4, 98924 ) │ │ movs r5, r0 │ │ │ │ @@ -146742,15 +146742,15 @@ │ │ movs r5, r0 │ │ ldmia r2!, {r1, r3, r5} │ │ movs r5, r0 │ │ asrs r5, r1, #13 │ │ vpaddl.u32 d17, d9 │ │ vsri.64 d28, d20, #8 │ │ vcvt.f32.u32 q14, q12, #9 │ │ - vrshr.u64 d22, d10, #8 │ │ + vrshr.u64 d22, d1, #8 │ │ Address 0x98bca is out of bounds. │ │ │ │ │ │ 00098bcc : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -146886,15 +146886,15 @@ │ │ movs r5, r0 │ │ ldmia r0!, {r2, r7} │ │ movs r5, r0 │ │ ldmia r0!, {r2, r3, r7} │ │ movs r5, r0 │ │ strh r7, [r6, #2] │ │ vshr.u32 d24, d5, #8 │ │ - @ instruction: 0xfff8fcba │ │ + vmull.u , d24, d30 │ │ vcvt.u16.f16 d28, d30, #9 │ │ @ instruction: 0xfff8cd8a │ │ Address 0x98d2e is out of bounds. │ │ │ │ │ │ 00098d30 : │ │ ldr r2, [pc, #52] @ (98d68 ) │ │ @@ -148604,24 +148604,24 @@ │ │ @ instruction: 0xb6da │ │ movs r5, r0 │ │ ldrb r4, [r3, r4] │ │ movs r5, r0 │ │ push {r2, r3, r4, r5, r7} │ │ movs r5, r0 │ │ cbnz r0, 99fd4 │ │ - vdup.8 , d29[3] │ │ + vdup.8 , d17[3] │ │ @ instruction: 0xfff75cfe │ │ movs r5, r0 │ │ ldr r1, [pc, #640] @ (9a24c ) │ │ vpadal.s32 , q13 │ │ movs r5, r0 │ │ sdiv pc, r5, r8 │ │ @ instruction: 0xfb6dfff8 │ │ strb r2, [r2, #3] │ │ - @ instruction: 0xfff8dfde │ │ + @ instruction: 0xfff8dfd2 │ │ vqrshrn.u64 d22, q8, #9 │ │ blx edf20 │ │ ldr r0, [r6, #16] │ │ blx edf20 │ │ ldr r0, [r6, #24] │ │ blx edf20 │ │ mov r0, r6 │ │ @@ -149320,15 +149320,15 @@ │ │ add r5, sp, #304 @ 0x130 │ │ movs r5, r0 │ │ strh r4, [r1, r6] │ │ movs r5, r0 │ │ add r2, sp, #1008 @ 0x3f0 │ │ movs r5, r0 │ │ add r7, sp, #752 @ 0x2f0 │ │ - vrshr.u64 , , #9 │ │ + vcvtp.u16.f16 , │ │ vsli.64 , q8, #55 @ 0x37 │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ mov.w r0, #4294967295 @ 0xffffffff │ │ movs r1, #0 │ │ bl 98d70 │ │ ldr r4, [pc, #144] @ (9a894 ) │ │ @@ -149719,16 +149719,16 @@ │ │ movs r5, r0 │ │ add r3, sp, #512 @ 0x200 │ │ movs r5, r0 │ │ add r1, sp, #472 @ 0x1d8 │ │ movs r5, r0 │ │ add r3, sp, #512 @ 0x200 │ │ movs r5, r0 │ │ - ldr r2, [pc, #680] @ (9ae48 ) │ │ - @ instruction: 0xfff84a9a │ │ + ldr r2, [pc, #644] @ (9ae24 ) │ │ + @ instruction: 0xfff84a91 │ │ vcvt.f16.u16 d29, d11, #8 │ │ vtbx.8 d30, {d8}, d12 │ │ vshr.u32 q8, q10, #8 │ │ vshr.u64 , q3, #8 │ │ movs r5, r0 │ │ add r0, sp, #496 @ 0x1f0 │ │ movs r5, r0 │ │ @@ -150084,45 +150084,45 @@ │ │ movs r5, r0 │ │ ldrsh r6, [r6, r0] │ │ movs r5, r0 │ │ add r6, pc, #336 @ (adr r6, 9b044 ) │ │ movs r5, r0 │ │ strb r1, [r6, #22] │ │ vtbl.8 d18, {d24-d25}, d11 │ │ - @ instruction: 0xfff8dcf5 │ │ - vqrdmulh.s q15, , d7[0] │ │ - vcvta.u16.f16 d28, d3 │ │ - @ instruction: 0xfff73b1a │ │ + vqdmulh.s , q12, d25[0] │ │ + vcvt.u16.f16 d30, d27, #9 │ │ + vcvt.u16.f16 q15, , #9 │ │ + @ instruction: 0xfff75cd1 │ │ vsra.u64 d26, d10, #8 │ │ @ instruction: 0xfff8d8db │ │ vqshl.u64 , , #56 @ 0x38 │ │ - vqshl.u64 q14, q5, #56 @ 0x38 │ │ + vqneg.s32 q14, q7 │ │ vcvtp.u16.f16 d22, d28 │ │ vqdmulh.s , q12, d5[0] │ │ - vsli.64 , q12, #55 @ 0x37 │ │ + vrsqrte.f16 , │ │ vsubw.u q13, q4, d15 │ │ - vcvt.u16.f16 d28, d23 │ │ + vqshl.u64 d28, d11, #55 @ 0x37 │ │ @ instruction: 0xfff7cd89 │ │ - vtbx.8 d20, {d8-d10}, d8 │ │ + vshll.u32 q10, d31, #24 │ │ @ instruction: 0xfff8cd88 │ │ vqshl.u32 d25, d24, #24 │ │ vqrshrun.s64 d18, q10, #8 │ │ vtbl.8 d18, {d24}, d8 │ │ vqdmulh.s , q12, d18[0] │ │ vmull.u , d8, d29 │ │ - vshr.u64 d29, d5, #9 │ │ + vcvta.u16.f16 d29, d9 │ │ vrecpe.u16 d30, d5 │ │ vrsra.u32 d31, d25, #8 │ │ vrsra.u64 d30, d6, #9 │ │ vqshlu.s64 d16, d10, #56 @ 0x38 │ │ vtbl.8 d31, {d24-d27}, d16 │ │ - vshr.u32 d29, d14, #9 │ │ + vshr.u32 d29, d2, #9 │ │ vqshlu.s32 q8, q14, #23 │ │ - vtbl.8 d29, {d8-d11}, d5 │ │ - vqrdmlsh.s , , d24[0] │ │ + @ instruction: 0xfff8daf9 │ │ + vcvt.u32.f32 , , #9 │ │ vshr.u64 , q11, #8 │ │ vabal.u q9, d8, d0 │ │ ldr r0, [pc, #628] @ (9b1f4 ) │ │ add r0, pc │ │ blx ee010 │ │ cbz r0, 9afa0 │ │ blx ee020 │ │ @@ -150377,41 +150377,41 @@ │ │ add r0, pc │ │ blx edfe0 │ │ b.n 9afce │ │ nop │ │ str r5, [sp, #412] @ 0x19c │ │ vabal.u q8, d24, d29 │ │ vrshr.u64 d23, d6, #8 │ │ - vrsra.u64 d21, d5, #8 │ │ - vsubw.u , q12, d22 │ │ + vsubw.u , q12, d12 │ │ + vrsra.u64 d21, d13, #8 │ │ @ instruction: 0xfff80fdd │ │ vrshr.u32 d30, d12, #8 │ │ vqshlu.s32 d18, d20, #24 │ │ @ instruction: 0xfff80543 │ │ vsra.u32 d31, d10, #8 │ │ vsli.32 , , #23 │ │ vtbl.8 d26, {d7-d9}, d0 │ │ vrev32.32 , q11 │ │ vcvta.s16.f16 , │ │ vsra.u32 q15, , #8 │ │ vtbx.8 d24, {d8}, d7 │ │ - vqneg.s32 d20, d9 │ │ - vqneg.s32 d20, d6 │ │ - @ instruction: 0xfff83d9c │ │ + vqneg.s32 d20, d0 │ │ + vqshl.u32 q10, , #24 │ │ + @ instruction: 0xfff83d93 │ │ vsri.64 , , #8 │ │ - vrsra.u64 q14, , #8 │ │ + vrsra.u64 q14, , #8 │ │ vtbl.8 d28, {d7-d9}, d9 │ │ vshll.u32 q14, d12, #24 │ │ vcvt.f32.u32 , , #8 │ │ vsli.32 d18, d3, #24 │ │ - vrshr.u32 d21, d18, #8 │ │ + vpaddl.s32 d21, d25 │ │ vsubw.u , q12, d13 │ │ - vqshrun.s64 d29, , #8 │ │ + vtbl.8 d29, {d8}, d27 │ │ @ instruction: 0xfff70eb9 │ │ - vrshr.u32 d21, d13, #8 │ │ + vrshr.u32 d21, d4, #8 │ │ @ instruction: 0xfff85e2c │ │ vmull.u , d24, d21 │ │ vtbl.8 d26, {d24}, d28 │ │ @ instruction: 0xfff7f8d6 │ │ lsls r4, r5, #2 │ │ movw r4, #26215 @ 0x6667 │ │ movt r4, #26214 @ 0x6666 │ │ @@ -150723,46 +150723,46 @@ │ │ nop │ │ str r4, [r1, #92] @ 0x5c │ │ vqshl.u32 , , #24 │ │ vtbl.8 d20, {d7}, d20 │ │ movs r5, r0 │ │ add r7, pc, #864 @ (adr r7, 9b8f8 ) │ │ @ instruction: 0xfff8ee0f │ │ - vsli.64 d20, d12, #56 @ 0x38 │ │ + vsli.64 d20, d3, #56 @ 0x38 │ │ @ instruction: 0xfff82368 │ │ vtbx.8 d17, {d8-d10}, d14 │ │ vcgt.s32 d19, d9, #0 │ │ - vsra.u64 q14, q1, #8 │ │ - vshr.u32 q15, , #9 │ │ + @ instruction: 0xfff8c1c6 │ │ + vcvta.s16.f16 q15, │ │ @ instruction: 0xfff72fd4 │ │ - vabal.u q10, d8, d21 │ │ - vsra.u64 d28, d21, #8 │ │ - vcvta.s16.f16 q15, │ │ + vsli.32 d20, d12, #24 │ │ + vaddw.u q14, q12, d25 │ │ + vcvta.s16.f16 q15, │ │ @ instruction: 0xfff7de87 │ │ vqabs.s32 d26, d26 │ │ vcvt.u16.f16 d28, d14 │ │ - vsra.u32 q14, q10, #8 │ │ + vrev16.32 q14, q12 │ │ vcvtp.u16.f16 d18, d24 │ │ vrshr.u64 d27, d26, #8 │ │ vqshl.u64 , , #56 @ 0x38 │ │ @ instruction: 0xfff8ecf0 │ │ vpaddl.s32 d16, d6 │ │ vqrdmulh.s q11, q12, d24[0] │ │ vqshlu.s32 q13, , #24 │ │ vsli.64 , , #56 @ 0x38 │ │ - vtbl.8 d19, {d7-d9}, d8 │ │ + @ instruction: 0xfff739ff │ │ vqneg.s32 d31, d7 │ │ @ instruction: 0xfff82e9a │ │ vshr.u32 d25, d28, #8 │ │ vpadal.s32 d26, d31 │ │ - vrsra.u64 q10, q4, #9 │ │ - vtbx.8 d28, {d8-d10}, d7 │ │ + vcvtm.u16.f16 q10, │ │ + vshll.u32 q14, d27, #24 │ │ vqrshrn.u64 d25, q10, #9 │ │ - vqrdmlah.s , q12, d29[0] │ │ - vsri.64 d29, d4, #9 │ │ + vqrdmlah.s , q12, d17[0] │ │ + vrsqrte.u16 d29, d8 │ │ vrecpe.f16 , │ │ vqshrun.s64 d22, q8, #8 │ │ movs r1, #2 │ │ str.w r1, [r6, #148] @ 0x94 │ │ cmp r0, #0 │ │ bne.w 9b4e6 │ │ ldr r0, [pc, #752] @ (9b920 ) │ │ @@ -151054,47 +151054,47 @@ │ │ cmp r1, #0 │ │ bne.n 9b9b6 │ │ ldr r0, [pc, #148] @ (9b9ac ) │ │ add r0, pc │ │ blx edfe0 │ │ b.n 9b9b6 │ │ nop │ │ - subs r0, #143 @ 0x8f │ │ + subs r0, #134 @ 0x86 │ │ @ instruction: 0xfff82d22 │ │ vcvt.f16.u16 q11, q3, #8 │ │ - vtbl.8 d28, {d8-d9}, d10 │ │ + @ instruction: 0xfff8c8fe │ │ vcvt.u16.f16 , │ │ - vcvt.u16.f16 , , #8 │ │ + vcvt.u16.f16 , , #8 │ │ vtbl.8 d16, {d23-d24}, d29 │ │ @ instruction: 0xfff8db7a │ │ - vcvt.u16.f16 d20, d15, #8 │ │ + vcvt.u16.f16 d20, d6, #8 │ │ vcvt.f32.u32 d24, d24, #8 │ │ @ instruction: 0xfff8a34b │ │ - vcvt.f16.u16 q10, , #8 │ │ + vqdmulh.s q10, q4, d26[0] │ │ vsubw.u q13, q12, d13 │ │ @ instruction: 0xfff78dab │ │ @ instruction: 0xfff88df1 │ │ vsri.64 , q3, #8 │ │ vrsra.u32 , , #8 │ │ @ instruction: 0xfff8dab1 │ │ vrsra.u32 d26, d29, #8 │ │ vqrdmlah.s , q12, d19[0] │ │ vpadal.u32 , q0 │ │ vqrshrun.s64 d25, , #8 │ │ @ instruction: 0xfff7cdfc │ │ @ instruction: 0xfff82b70 │ │ - vrev32.32 d20, d19 │ │ + vshr.u64 d20, d10, #8 │ │ vsri.32 d31, d10, #8 │ │ - @ instruction: 0xfff84bba │ │ + @ instruction: 0xfff84bb1 │ │ @ instruction: 0xfff8d9fd │ │ vsra.u64 , , #8 │ │ - vqshlu.s32 d19, d22, #23 │ │ + vcvt.f16.s16 d19, d29 │ │ vtbx.8 d22, {d8-d10}, d3 │ │ vcvt.f32.u32 d26, d24, #8 │ │ - @ instruction: 0xfff8bc91 │ │ + vmull.u , d24, d5 │ │ @ instruction: 0xfff71dd3 │ │ vtbx.8 d18, {d24-d26}, d18 │ │ vrev64.32 d24, d15 │ │ vrev64.32 d18, d0 │ │ str.w r0, [r6, #204] @ 0xcc │ │ ldr r0, [pc, #796] @ (9bcd4 ) │ │ add r0, pc │ │ @@ -151389,20 +151389,20 @@ │ │ add r0, pc │ │ vmov r2, r3, d16 │ │ blx edfe0 │ │ b.w 9ac44 │ │ nop │ │ cbnz r7, 9bcda │ │ vpadal.u32 q8, q3 │ │ - @ instruction: 0xfff8bbbc │ │ + @ instruction: 0xfff8bbb0 │ │ vqshlu.s32 d21, d12, #23 │ │ vcvt.u16.f16 d26, d16, #8 │ │ vtbl.8 d29, {d24}, d15 │ │ vqshl.u32 d30, d21, #24 │ │ - vqrdmlah.s , q12, d14[0] │ │ + vqrdmlah.s , q12, d5[0] │ │ vcvt.f32.u32 d21, d23, #8 │ │ vrev64.32 d18, d0 │ │ str.w r0, [r9, #284] @ 0x11c │ │ b.w 9ac44 │ │ ldr r0, [pc, #300] @ (9be30 ) │ │ add r0, pc │ │ blx edfe0 │ │ @@ -151483,43 +151483,43 @@ │ │ blx edfe0 │ │ b.w 9b094 │ │ nop │ │ add r0, pc, #628 @ (adr r0, 9c05c ) │ │ @ instruction: 0xfff7fbb3 │ │ vtbl.8 d26, {d23}, d0 │ │ vcvt.u16.f16 , │ │ - vshr.u64 , q4, #9 │ │ - @ instruction: 0xfff8d5e4 │ │ - @ instruction: 0xfff73a74 │ │ - vqshlu.s32 d29, d30, #24 │ │ + vcvta.u16.f16 , │ │ + vsli.64 , q4, #56 @ 0x38 │ │ + vtbx.8 d19, {d7-d9}, d27 │ │ + vqshlu.s32 d29, d18, #24 │ │ vcvtp.s16.f16 q8, │ │ - vtbx.8 d19, {d8-d10}, d17 │ │ + @ instruction: 0xfff83a58 │ │ @ instruction: 0xfff82562 │ │ - vrev32.32 q14, │ │ + vshr.u64 q14, , #8 │ │ @ instruction: 0xfff77e8e │ │ - vclz.i32 d28, d26 │ │ + vsri.64 d28, d14, #8 │ │ vsra.u64 , , #9 │ │ @ instruction: 0xfff86d80 │ │ - vcls.s32 d19, d11 │ │ + vcls.s32 d19, d2 │ │ vtbl.8 d28, {d8-d11}, d26 │ │ vsli.64 d25, d14, #56 @ 0x38 │ │ - vcvt.s16.f16 , │ │ + vcvt.s16.f16 , │ │ vcvt.u16.f16 d27, d2 │ │ - vcls.s32 d28, d7 │ │ + vrsra.u64 q14, , #8 │ │ vrecpe.f16 , │ │ vcvtp.u16.f16 d23, d23 │ │ vqrdmlsh.s , q4, d22[0] │ │ vtbl.8 d28, {d24-d26}, d2 │ │ vsri.32 d21, d26, #8 │ │ - vsubw.u q14, q12, d9 │ │ - vcvtm.u16.f16 d28, d1 │ │ + vrsra.u32 q14, , #8 │ │ + vrsra.u32 q14, , #9 │ │ @ instruction: 0xfff7ee20 │ │ - vtbx.8 d27, {d7-d8}, d15 │ │ + vtbx.8 d27, {d7-d8}, d3 │ │ vsri.32 d21, d10, #9 │ │ - vtbl.8 d29, {d8}, d18 │ │ + vqshrun.s64 d29, q3, #8 │ │ @ instruction: 0xfff70e80 │ │ vpaddl.s32 , q7 │ │ vqshlu.s32 d29, d6, #24 │ │ vabal.u , d24, d0 │ │ mov r7, sp │ │ sub sp, #16 │ │ ldr r0, [pc, #60] @ (9beb8 ) │ │ @@ -151836,16 +151836,16 @@ │ │ movs r5, r0 │ │ str r3, [sp, #136] @ 0x88 │ │ movs r5, r0 │ │ str r3, [sp, #712] @ 0x2c8 │ │ movs r5, r0 │ │ str r3, [sp, #736] @ 0x2e0 │ │ movs r5, r0 │ │ - add r7, sp, #860 @ 0x35c │ │ - @ instruction: 0xfff7afb3 │ │ + add r7, sp, #812 @ 0x32c │ │ + @ instruction: 0xfff7afa7 │ │ vtbx.8 d25, {d23-d24}, d26 │ │ vcvt.u32.f32 d20, d4, #8 │ │ vqshl.u32 d21, d31, #24 │ │ vcvt.f32.u32 , q2, #8 │ │ movs r5, r0 │ │ ldr r1, [pc, #136] @ (9c24c ) │ │ movs r5, r0 │ │ @@ -152199,15 +152199,15 @@ │ │ movs r5, r0 │ │ ldrh r2, [r0, #62] @ 0x3e │ │ movs r5, r0 │ │ ldrh r6, [r0, #62] @ 0x3e │ │ movs r5, r0 │ │ str r4, [r7, r0] │ │ vrev64.32 d21, d20 │ │ - vsri.64 q14, q7, #8 │ │ + vsri.64 q14, q1, #8 │ │ vtbl.8 d20, {d7-d10}, d24 │ │ vqshlu.s32 d25, d23, #24 │ │ vtbx.8 d19, {d8-d10}, d22 │ │ movs r5, r0 │ │ │ │ 0009c594 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -153103,17 +153103,17 @@ │ │ movs r5, r0 │ │ str??.w pc, [r2, #247]! │ │ strh.w pc, [ip, #247]! │ │ strh r2, [r2, #42] @ 0x2a │ │ movs r5, r0 │ │ strh r2, [r4, #42] @ 0x2a │ │ movs r5, r0 │ │ - cbnz r2, 9cfba │ │ + cbnz r6, 9cfb6 │ │ vsra.u32 q10, q11, #9 │ │ - @ instruction: 0xfff8c5c4 │ │ + vsli.64 d28, d24, #56 @ 0x38 │ │ vdup.8 q9, d14[3] │ │ movs r5, r0 │ │ adds r0, #190 @ 0xbe │ │ movs r5, r0 │ │ strh r4, [r5, #42] @ 0x2a │ │ movs r5, r0 │ │ strh r2, [r6, #40] @ 0x28 │ │ @@ -162716,15 +162716,15 @@ │ │ movs r5, r0 │ │ asrs r2, r0, #5 │ │ vqrdmulh.s , q4, d0[0] │ │ movs r5, r0 │ │ asrs r2, r5, #1 │ │ @ instruction: 0xfff81d2e │ │ movs r5, r0 │ │ - hlt 0x0034 │ │ + hlt 0x002b │ │ vcvt.u32.f32 , q14, #9 │ │ vtbl.8 d22, {d7-d9}, d24 │ │ vqneg.s32 d16, d11 │ │ mov.w r9, #1 │ │ it pl │ │ bicpl.w r9, r9, r1 │ │ lsls r3, r1, #29 │ │ @@ -163216,15 +163216,15 @@ │ │ b.n a3f3c │ │ movs r5, #4 │ │ movs r5, r0 │ │ movs r4, #248 @ 0xf8 │ │ movs r5, r0 │ │ lsrs r6, r0, #12 │ │ vtbl.8 d16, {d8-d10}, d24 │ │ - vsri.32 , q11, #8 │ │ + vcls.s32 , │ │ vtbx.8 d20, {d7-d9}, d31 │ │ vtbl.8 d18, {d24-d26}, d31 │ │ vrev64.32 , │ │ lsrs r3, r0, #12 │ │ movs r0, #1 │ │ bl d4e90 │ │ ldr r1, [sp, #136] @ 0x88 │ │ @@ -163881,16 +163881,16 @@ │ │ vtbx.8 d17, {d7-d9}, d9 │ │ @ instruction: 0xfff70fb6 │ │ movs r5, r0 │ │ lsrs r4, r7, #30 │ │ movs r5, r0 │ │ lsrs r0, r6, #30 │ │ movs r5, r0 │ │ - stmia r4!, {r1, r2, r3, r4, r6, r7} │ │ - vsri.64 q14, q3, #9 │ │ + stmia r4!, {r0, r2, r4, r6, r7} │ │ + vrsqrte.u16 q14, │ │ vcvt.f16.s16 , │ │ strb r4, [r7, #3] │ │ add.w lr, sp, #32 │ │ movt r0, #32767 @ 0x7fff │ │ add r1, sp, #312 @ 0x138 │ │ and.w r0, r0, fp │ │ vld1.64 {d16-d17}, [lr :128] │ │ @@ -164245,23 +164245,23 @@ │ │ movs r4, r0 │ │ movs r4, #62 @ 0x3e │ │ vpadal.u32 d29, d26 │ │ movs r4, r0 │ │ movs r4, #44 @ 0x2c │ │ vqshlu.s64 d29, d6, #56 @ 0x38 │ │ movs r4, r0 │ │ - str r1, [r2, r6] │ │ + str r5, [r0, r6] │ │ vsri.64 d18, d25, #9 │ │ vsra.u64 , , #9 │ │ vcvt.f16.s16 , q12 │ │ movs r4, r0 │ │ movs r3, #164 @ 0xa4 │ │ vqshlu.s32 d29, d0, #24 │ │ movs r4, r0 │ │ - str r3, [r1, r4] │ │ + str r7, [r7, r3] │ │ vsri.32 d18, d19, #9 │ │ vcvtn.s16.f16 , │ │ vsli.64 , q5, #55 @ 0x37 │ │ movs r4, r0 │ │ ldr r1, [pc, #856] @ (a4d50 ) │ │ add r1, pc │ │ blx edff0 │ │ @@ -164572,28 +164572,28 @@ │ │ mov.w r0, #3008 @ 0xbc0 │ │ bl 67c3c │ │ b.n a4d90 │ │ nop │ │ movs r2, #86 @ 0x56 │ │ vclz.i32 , q1 │ │ movs r4, r0 │ │ - ldr r7, [pc, #756] @ (a5050 ) │ │ + ldr r7, [pc, #708] @ (a5020 ) │ │ vcvtp.u16.f16 q9, │ │ vcvta.s16.f16 d23, d17 │ │ vsri.64 d29, d4, #9 │ │ movs r4, r0 │ │ lsrs r2, r5, #32 │ │ movs r5, r0 │ │ @ instruction: 0xfb2afff7 │ │ lsrs r6, r0, #32 │ │ movs r5, r0 │ │ @ instruction: 0xfb18fff7 │ │ lsls r4, r6, #31 │ │ movs r5, r0 │ │ - add r5, pc, #392 @ (adr r5, a4f08 ) │ │ + add r5, pc, #356 @ (adr r5, a4ee4 ) │ │ vtbl.8 d24, {d7-d9}, d26 │ │ vsri.64 , q3, #9 │ │ vcls.s32 , │ │ str r4, [r7, #0] │ │ bl 68fdc │ │ ldr r0, [sp, #100] @ 0x64 │ │ cmp r0, #0 │ │ @@ -164889,27 +164889,27 @@ │ │ blx ee280 │ │ nop │ │ adds r2, r7, #5 │ │ vqrdmlsh.s q14, q12, d22[0] │ │ movs r4, r0 │ │ beq.n a5034 │ │ movs r4, r0 │ │ - ldr r2, [pc, #900] @ (a542c ) │ │ + ldr r2, [pc, #852] @ (a53fc ) │ │ @ instruction: 0xfff71e09 │ │ vtbx.8 d22, {d7-d10}, d5 │ │ @ instruction: 0xfff7cfb8 │ │ movs r4, r0 │ │ lsls r0, r1, #20 │ │ movs r5, r0 │ │ adds r2, r5, #7 │ │ vshr.u32 , q3, #8 │ │ movs r4, r0 │ │ beq.n a506c │ │ movs r4, r0 │ │ - ldr r3, [pc, #324] @ (a520c ) │ │ + ldr r3, [pc, #276] @ (a51dc ) │ │ vcvt.f32.u32 , , #9 │ │ @ instruction: 0xfff76bb5 │ │ vcvta.s16.f16 d29, d24 │ │ movs r4, r0 │ │ rev r0, r2 │ │ movs r4, r0 │ │ push {r4, r5, r6, r7, lr} │ │ @@ -166670,15 +166670,15 @@ │ │ vcvt.u16.f16 , q7 │ │ movs r4, r0 │ │ subs r6, #12 │ │ vshr.u32 , q4, #9 │ │ movs r4, r0 │ │ subs r6, #8 │ │ @ instruction: 0xfff7acda │ │ - vsra.u64 , q2, #9 │ │ + vcvtn.u16.f16 , q4 │ │ @ instruction: 0xfff7ca5b │ │ vqshl.u32 , q9, #23 │ │ vcvt.f32.u32 q15, q5, #9 │ │ movs r4, r0 │ │ push {r0, r2, r6} │ │ vsli.64 q13, q15, #55 @ 0x37 │ │ movs r4, r0 │ │ @@ -166783,15 +166783,15 @@ │ │ movs r4, r0 │ │ setend be │ │ movs r4, r0 │ │ vhadd.s16 d16, d2, d4 │ │ strb r7, [r4, #7] │ │ @ instruction: 0xfff7eb90 │ │ vzip.16 q8, q7 │ │ - vrev64.32 , q1 │ │ + vshr.u32 d17, d22, #8 │ │ vqshlu.s32 d27, d30, #23 │ │ movs r4, r0 │ │ str r5, [sp, #424] @ 0x1a8 │ │ movs r4, r0 │ │ strb r2, [r4, #7] │ │ @ instruction: 0xfff7eb5c │ │ vsra.u64 d16, d10, #10 │ │ @@ -169123,28 +169123,28 @@ │ │ vrecpe.u16 d21, d30 │ │ vqshl.u32 , q2, #23 │ │ movs r4, r0 │ │ bvc.n a7f44 │ │ movs r4, r0 │ │ movs r3, #254 @ 0xfe │ │ @ instruction: 0xfff84346 │ │ - vqshlu.s32 q12, , #23 │ │ + vqshlu.s32 q12, q11, #23 │ │ vqshl.u32 d29, d28, #23 │ │ movs r4, r0 │ │ bvs.n a7e58 │ │ movs r4, r0 │ │ bls.n a7f42 │ │ vtbx.8 d29, {d7-d8}, d9 │ │ vcvt.s16.f16 d29, d0 │ │ movs r4, r0 │ │ bvc.n a7ec0 │ │ movs r4, r0 │ │ ldr r5, [pc, #136] @ (a7f20 ) │ │ vcvtp.u16.f16 q10, q13 │ │ - vcvt.f16.s16 d24, d19 │ │ + vqshlu.s32 d24, d10, #23 │ │ vqshlu.s64 d29, d30, #55 @ 0x37 │ │ movs r4, r0 │ │ bvs.n a7e5c │ │ movs r4, r0 │ │ │ │ 000a7ea8 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -170503,16 +170503,16 @@ │ │ ldmiaeq.w sp!, {r8, r9, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx ee280 │ │ stmia r5!, {r4, r5} │ │ movs r4, r0 │ │ ldrb r6, [r7, #19] │ │ movs r4, r0 │ │ - b.n a8cbe │ │ - vmla.i , q3, d14[0] │ │ + b.n a8ca6 │ │ + vmla.i , q3, d2[0] │ │ vcvt.u32.f32 , , #10 │ │ vtbx.8 d23, {d23-d25}, d10 │ │ movs r4, r0 │ │ │ │ 000a8fe4 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ @@ -174621,15 +174621,15 @@ │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ subs r4, #0 │ │ strh r1, [r0, #4] │ │ subs r3, #128 @ 0x80 │ │ cmp r6, #204 @ 0xcc │ │ - vsra.u64 d29, d30, #9 │ │ + vsra.u64 d29, d18, #9 │ │ vtrn.16 d16, d0 │ │ adds r7, #128 @ 0x80 │ │ movs r1, #8 │ │ subs r5, #4 │ │ lsrs r1, r4, #32 │ │ subs r4, #130 @ 0x82 │ │ ldrh r1, [r1, #4] │ │ @@ -184619,15 +184619,15 @@ │ │ movs r0, r0 │ │ movs r0, r0 │ │ b.n b3708 │ │ eors r7, r5 │ │ movs r0, r0 │ │ negs r4, r7 │ │ cbz r4, b3734 │ │ - vshll.i16 q14, d25, #16 │ │ + vshll.i16 q14, d16, #16 │ │ vsubw.u , q11, d16 │ │ movs r3, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #36 @ 0x24 │ │ mov fp, r1 │ │ @@ -184817,15 +184817,15 @@ │ │ ldmiaeq.w sp!, {r8, r9, sl} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx ee280 │ │ nop │ │ bcs.n b394c │ │ movs r3, r0 │ │ subs r4, #181 @ 0xb5 │ │ - vqshlu.s32 d27, d27, #23 │ │ + vqshlu.s32 d27, d18, #23 │ │ vzip.16 d29, d14 │ │ movs r3, r0 │ │ sub sp, #4 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #12 │ │ ldr r4, [pc, #60] @ (b3964 ) │ │ @@ -185070,16 +185070,16 @@ │ │ movs r4, r0 │ │ adds r4, r7, #1 │ │ movs r4, r0 │ │ subs r4, r6, r2 │ │ movs r4, r0 │ │ subs r6, r6, r2 │ │ movs r4, r0 │ │ - stmia r5!, {r1, r3, r7} │ │ - vrintn.f16 q14, q12 │ │ + stmia r5!, {r0, r7} │ │ + vsri.32 q14, , #10 │ │ Address 0xb3b9a is out of bounds. │ │ │ │ │ │ 000b3b9c : │ │ vmov s0, r1 │ │ vcvt.f32.s32 s0, s0 │ │ vmov r1, s0 │ │ @@ -185513,17 +185513,17 @@ │ │ movs r4, r0 │ │ asrs r6, r0, #21 │ │ movs r4, r0 │ │ asrs r2, r1, #21 │ │ movs r4, r0 │ │ bpl.n b3fb6 │ │ vsli.64 d29, d23, #54 @ 0x36 │ │ - vsli.32 d21, d1, #22 │ │ - vsli.32 , , #22 │ │ - @ instruction: 0xfff6b9b2 │ │ + vrinta.f16 d21, d5 │ │ + vrinta.f16 , │ │ + vtbl.8 d27, {d22-d23}, d25 │ │ @ instruction: 0xfff6bffa │ │ movs r3, r0 │ │ │ │ 000b402c : │ │ ldr r1, [pc, #208] @ (b4100 ) │ │ vmov s0, r0 │ │ add r1, pc │ │ @@ -185629,15 +185629,15 @@ │ │ asrs r0, r4, #16 │ │ movs r4, r0 │ │ asrs r6, r4, #16 │ │ movs r4, r0 │ │ ldr r4, [r3, #4] │ │ vtbl.8 d22, {d7}, d30 │ │ vtbl.8 d19, {d23-d25}, d21 │ │ - vsri.32 d21, d11, #9 │ │ + vrecpe.u16 d21, d15 │ │ vrshr.u32 d21, d13, #10 │ │ @ instruction: 0xfff7beda │ │ movs r3, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ vpush {d8} │ │ @@ -187163,25 +187163,25 @@ │ │ ldrb.w r3, [r2], #1 │ │ rsb r0, r0, r0, lsl #5 │ │ add r0, r1 │ │ cmp r3, #0 │ │ mov r1, r3 │ │ bne.n b504a │ │ b.n b52fc │ │ - @ instruction: 0xb753 │ │ + @ instruction: 0xb74a │ │ vsri.64 d30, d17, #10 │ │ vcvt.f32.u32 q8, , #10 │ │ vqshrun.s64 d31, , #9 │ │ vrsra.u64 , q15, #10 │ │ vsri.64 d21, d15, #10 │ │ vcvt.u16.f16 , q12 │ │ vrintn.f16 d21, d5 │ │ @ instruction: 0xfff6ebd2 │ │ - vqshrun.s64 d18, , #10 │ │ - vtbl.8 d26, {d22-d25}, d17 │ │ + vqshrun.s64 d18, , #10 │ │ + @ instruction: 0xfff6ab98 │ │ @ instruction: 0xfff6ca97 │ │ vqrdmulh.s q8, q3, d0[0] │ │ vtbx.8 d23, {d22-d25}, d8 │ │ vqrdmulh.s , q3, d15[0] │ │ vtbl.8 d16, {d23-d26}, d17 │ │ vqmovun.s32 d21, q2 │ │ vcvt.f16.u16 d19, d14 │ │ @@ -190191,16 +190191,16 @@ │ │ movs r3, r0 │ │ b.n b7088 │ │ movs r3, r0 │ │ b.n b6c8c │ │ movs r3, r0 │ │ b.n b6ca0 │ │ movs r3, r0 │ │ - lsrs r6, r7, #13 │ │ - vtbl.8 d16, {d6-d9}, d24 │ │ + lsrs r2, r6, #13 │ │ + @ instruction: 0xfff60b1c │ │ vqshl.u32 d30, d30, #22 │ │ movs r3, r0 │ │ b.n b700c │ │ movs r3, r0 │ │ │ │ 000b7124 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -192258,15 +192258,15 @@ │ │ movs r3, r0 │ │ beq.n b8634 │ │ movs r3, r0 │ │ bcs.n b8454 │ │ movs r3, r0 │ │ bcs.n b863c │ │ movs r3, r0 │ │ - lsls r1, r5, #25 │ │ + lsls r5, r3, #25 │ │ vrshr.u32 d30, d2, #10 │ │ vabs.f16 , │ │ vqshlu.s32 q9, , #22 │ │ vrshr.u32 , q4, #10 │ │ movs r3, r0 │ │ bcs.n b85fc │ │ movs r3, r0 │ │ @@ -193523,15 +193523,15 @@ │ │ stmia r6!, {r3, r6} │ │ movs r3, r0 │ │ @ instruction: 0xeb89fff6 │ │ stmia r6!, {r1, r3, r4, r5} │ │ movs r3, r0 │ │ stmia r5!, {r1, r3, r4, r5, r6, r7} │ │ movs r3, r0 │ │ - b.n b8c1c │ │ + b.n b8c04 │ │ @ instruction: 0xfff5eb1f │ │ vqshrun.s64 d24, , #10 │ │ vcvt.f16.f32 d28, q15 │ │ movs r3, r0 │ │ stmia r6!, {r2, r5} │ │ movs r3, r0 │ │ stmia r3!, {r1, r2, r4, r5, r6, r7} │ │ @@ -193776,27 +193776,27 @@ │ │ vcvt.s16.f16 d16, d5 │ │ vrsra.u64 q14, q8, #9 │ │ movs r3, r0 │ │ stmia r4!, {r1, r2} │ │ movs r3, r0 │ │ strb r2, [r2, r2] │ │ @ instruction: 0xfff6e8bd │ │ - vdup.16 d21, d6[1] │ │ + @ instruction: 0xfff65bfd │ │ @ instruction: 0xfff6c3c5 │ │ movs r3, r0 │ │ stmia r3!, {r1, r2, r4, r5, r7} │ │ movs r3, r0 │ │ stmia r1!, {r2, r4, r5, r6} │ │ movs r3, r0 │ │ stmia r3!, {r1, r5, r7} │ │ movs r3, r0 │ │ stlexd r6, pc, pc, [pc] @ │ │ - b.n b9914 │ │ + b.n b98fc │ │ vtbx.8 d30, {d5}, d19 │ │ - vtbl.8 d21, {d22-d25}, d28 │ │ + vtbl.8 d21, {d22-d25}, d19 │ │ Address 0xb9406 is out of bounds. │ │ │ │ │ │ 000b9408 : │ │ push {r7, lr} │ │ mov r7, sp │ │ mov ip, r2 │ │ @@ -194775,16 +194775,16 @@ │ │ movs r3, r0 │ │ hlt 0x0028 │ │ movs r3, r0 │ │ @ instruction: 0xb83c │ │ movs r3, r0 │ │ @ instruction: 0xb844 │ │ movs r3, r0 │ │ - ldrsb r0, [r0, r6] │ │ - vrint?.f16 , q4 │ │ + ldrsb r7, [r6, r5] │ │ + vqshl.u32 d21, d31, #22 │ │ vtbx.8 d27, {d6-d8}, d8 │ │ movs r3, r0 │ │ hlt 0x0000 │ │ movs r3, r0 │ │ hlt 0x0004 │ │ movs r3, r0 │ │ rev16 r2, r7 │ │ @@ -197456,15 +197456,15 @@ │ │ movs r3, r0 │ │ ldr r4, [sp, #552] @ 0x228 │ │ movs r3, r0 │ │ ldrh r6, [r2, #6] │ │ vqshrun.s64 d24, q10, #10 │ │ @ instruction: 0xfff68c90 │ │ vtbx.8 d25, {d6}, d25 │ │ - vsra.u64 , q0, #11 │ │ + vcle.s16 , q2, #0 │ │ Address 0xbb95e is out of bounds. │ │ │ │ │ │ 000bb960 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -197672,19 +197672,19 @@ │ │ movs r3, r0 │ │ ldr r5, [sp, #16] │ │ movs r3, r0 │ │ ldr r2, [sp, #312] @ 0x138 │ │ movs r3, r0 │ │ ldr r2, [sp, #344] @ 0x158 │ │ movs r3, r0 │ │ - @ instruction: 0xb6b9 │ │ - vqshlu.s32 d27, d7, #21 │ │ - vcvt.f32.u32 , , #11 │ │ + @ instruction: 0xb6ad │ │ + vclt.f16 d27, d11, #0 │ │ + vcvt.f32.u32 , q3, #11 │ │ vqshlu.s32 d25, d21, #22 │ │ - vtbl.8 d27, {d5-d8}, d6 │ │ + @ instruction: 0xfff5bafa │ │ Address 0xbbb92 is out of bounds. │ │ │ │ │ │ 000bbb94 : │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ vpush {d8-d9} │ │ @@ -205593,16 +205593,16 @@ │ │ movs r3, r0 │ │ mov lr, r3 │ │ movs r3, r0 │ │ mvns r6, r0 │ │ movs r3, r0 │ │ mvns r6, r1 │ │ movs r3, r0 │ │ - ldrh r2, [r0, #6] │ │ - vqrshrun.s64 d24, q9, #11 │ │ + ldrh r6, [r6, #4] │ │ + vtbx.8 d24, {d5}, d22 │ │ vclt.f16 d20, d20, #0 │ │ movs r3, r0 │ │ mov r6, lr │ │ movs r3, r0 │ │ sbcs r4, r2 │ │ movs r3, r0 │ │ mov r4, r2 │ │ @@ -206447,16 +206447,16 @@ │ │ movs r3, r0 │ │ subs r6, #8 │ │ movs r3, r0 │ │ subs r3, #8 │ │ movs r3, r0 │ │ subs r3, #16 │ │ movs r3, r0 │ │ - ldr r0, [r4, #20] │ │ - vtbl.8 d22, {d5-d6}, d2 │ │ + ldr r4, [r2, #20] │ │ + @ instruction: 0xfff568f6 │ │ @ instruction: 0xfff53d80 │ │ movs r3, r0 │ │ subs r5, #146 @ 0x92 │ │ movs r3, r0 │ │ ldr r2, [r1, #72] @ 0x48 │ │ vcvt.u16.f16 d19, d28, #10 │ │ movs r3, r0 │ │ @@ -206882,16 +206882,16 @@ │ │ pop {r4, r5, r6, r7, pc} │ │ subs r2, #68 @ 0x44 │ │ movs r3, r0 │ │ adds r7, #60 @ 0x3c │ │ movs r3, r0 │ │ adds r7, #68 @ 0x44 │ │ movs r3, r0 │ │ - str r4, [r2, #88] @ 0x58 │ │ - vcle.f16 d22, d2, #0 │ │ + str r0, [r1, #88] @ 0x58 │ │ + vsli.32 q11, q11, #21 │ │ vtbl.8 d19, {d5-d7}, d10 │ │ movs r3, r0 │ │ subs r2, #28 │ │ movs r3, r0 │ │ adds r4, #250 @ 0xfa │ │ movs r3, r0 │ │ subs r0, #250 @ 0xfa │ │ @@ -207246,15 +207246,15 @@ │ │ movs r3, r0 │ │ str r5, [r6, #124] @ 0x7c │ │ vqshl.u64 d22, d1, #54 @ 0x36 │ │ vsli.32 , q15, #22 │ │ movs r3, r0 │ │ adds r5, #198 @ 0xc6 │ │ movs r3, r0 │ │ - ldrb r0, [r5, r6] │ │ + ldrb r4, [r3, r6] │ │ Address 0xc228a is out of bounds. │ │ │ │ │ │ 000c228c : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -207552,16 +207552,16 @@ │ │ nop │ │ adds r3, #50 @ 0x32 │ │ movs r3, r0 │ │ adds r0, #18 │ │ movs r3, r0 │ │ adds r0, #14 │ │ movs r3, r0 │ │ - ldr r7, [r5, #44] @ 0x2c │ │ - vtbl.8 d22, {d21-d23}, d29 │ │ + ldr r3, [r4, #44] @ 0x2c │ │ + vtbl.8 d22, {d21-d23}, d17 │ │ vrshr.u64 d19, d20, #11 │ │ movs r3, r0 │ │ adds r2, #252 @ 0xfc │ │ movs r3, r0 │ │ cmp r5, #208 @ 0xd0 │ │ movs r3, r0 │ │ cmp r5, #134 @ 0x86 │ │ @@ -207654,16 +207654,16 @@ │ │ pop {r4, r5, r6, r7, pc} │ │ adds r2, #76 @ 0x4c │ │ movs r3, r0 │ │ cmp r7, #36 @ 0x24 │ │ movs r3, r0 │ │ cmp r7, #32 │ │ movs r3, r0 │ │ - strb r4, [r1, r4] │ │ - vcge.f16 , q4, #0 │ │ + strb r0, [r0, r4] │ │ + vsri.64 d21, d28, #11 │ │ vcle.s16 , q6, #0 │ │ movs r3, r0 │ │ adds r2, #22 │ │ movs r3, r0 │ │ cmp r4, #222 @ 0xde │ │ movs r3, r0 │ │ cmp r4, #150 @ 0x96 │ │ @@ -207735,16 +207735,16 @@ │ │ pop {r7, pc} │ │ adds r1, #114 @ 0x72 │ │ movs r3, r0 │ │ cmp r6, #66 @ 0x42 │ │ movs r3, r0 │ │ cmp r6, #74 @ 0x4a │ │ movs r3, r0 │ │ - ldr r2, [pc, #564] @ (c2928 ) │ │ - @ instruction: 0xfff54a59 │ │ + ldr r2, [pc, #516] @ (c28f8 ) │ │ + vtbx.8 d20, {d5-d7}, d13 │ │ vsra.u32 d19, d6, #11 │ │ movs r3, r0 │ │ adds r1, #74 @ 0x4a │ │ movs r3, r0 │ │ cmp r4, #20 │ │ movs r3, r0 │ │ cmp r3, #224 @ 0xe0 │ │ @@ -208129,27 +208129,27 @@ │ │ @ instruction: 0xfff53fde │ │ vqrshrun.s64 d25, q4, #11 │ │ @ instruction: 0xfff62b18 │ │ movs r3, r0 │ │ strb r7, [r5, #14] │ │ @ instruction: 0xfff5bfd2 │ │ vmull.u , d21, d17 │ │ - vqrdmulh.s q11, , d23[0] │ │ + @ instruction: 0xfff56ddb │ │ vabs.f16 d16, d0 │ │ vrintm.f16 q8, q13 │ │ - vshll.i16 q11, d11, #16 │ │ + vrshr.u64 q11, , #10 │ │ vqshl.u32 , q15, #21 │ │ movs r3, r0 │ │ bcs.n c2bd8 │ │ movs r2, r0 │ │ - ldr r2, [r7, #80] @ 0x50 │ │ - vqrdmulh.s , , d1[0] │ │ + ldr r6, [r5, #80] @ 0x50 │ │ + @ instruction: 0xfff5ddb8 │ │ vrshr.u64 d23, d25, #11 │ │ vcvt.u16.f16 d23, d18, #11 │ │ - vqshlu.s32 q14, q4, #21 │ │ + vclt.f16 q14, , #0 │ │ vabs.s16 , │ │ vrsra.u32 d21, d15, #10 │ │ vsra.u64 d23, d9, #10 │ │ vshr.u32 , q1, #11 │ │ vmla.i , q3, d13[0] │ │ @ instruction: 0xfff6eef4 │ │ vsra.u64 d19, d9, #11 │ │ @@ -208486,38 +208486,38 @@ │ │ cmp r0, #0 │ │ beq.n c2ed8 │ │ subs r4, #1 │ │ add.w r0, r0, #1 │ │ bne.n c2e3c │ │ b.n c2eda │ │ str.w pc, [r3, #245]! │ │ - bls.n c2d60 │ │ + bls.n c2f4e │ │ vrsubhn.i d18, , q3 │ │ vshr.u64 , , #11 │ │ @ instruction: 0xfff6ac90 │ │ - vqrshrn.u64 d29, q7, #11 │ │ + vqrshrn.u64 d29, , #11 │ │ vcge.s16 d19, d21, #0 │ │ vqrdmlah.s q8, q11, d5[0] │ │ vrint?.f16 , │ │ - @ instruction: 0xfff5da5d │ │ + @ instruction: 0xfff5da54 │ │ vcle.s16 q12, , #0 │ │ vtbx.8 d18, {d6}, d3 │ │ @ instruction: 0xfff5abd7 │ │ @ instruction: 0xfff55ab4 │ │ - vtbx.8 d29, {d22-d25}, d17 │ │ + @ instruction: 0xfff6dbd8 │ │ vsli.32 d18, d24, #21 │ │ vmlal.u q9, d21, d27[0] │ │ vrinta.f16 d30, d10 │ │ vqshlu.s32 q10, q9, #21 │ │ vqshlu.s64 d22, d19, #54 @ 0x36 │ │ @ instruction: 0xfff659d0 │ │ @ instruction: 0xfff6aaf3 │ │ vcvt.u32.f32 d20, d31, #11 │ │ vrsra.u32 q15, , #10 │ │ - vdup.8 q14, d14[2] │ │ + vdup.8 q14, d5[2] │ │ vqrdmlah.s q9, , d8[0] │ │ vqrshrn.u64 d21, , #10 │ │ vrintm.f16 , q3 │ │ vtbx.8 d30, {d5-d8}, d26 │ │ vsli.64 d31, d14, #53 @ 0x35 │ │ vrshr.u64 q15, , #11 │ │ vmlal.u q15, d21, d13[0] │ │ @@ -208813,17 +208813,17 @@ │ │ bcc.n c317e │ │ subs r1, #10 │ │ cmp r1, #52 @ 0x34 │ │ bhi.w c3472 │ │ addw r2, pc, #28 │ │ movs r0, #2 │ │ tbh [r2, r1, lsl #1] │ │ - bvc.n c3142 │ │ - vtbx.8 d28, {d21-d23}, d26 │ │ - @ instruction: 0xfff5cadc │ │ + bvc.n c3130 │ │ + vtbx.8 d28, {d21-d23}, d17 │ │ + @ instruction: 0xfff5cad3 │ │ @ instruction: 0xfff57e8a │ │ vrintm.f16 , q3 │ │ vsra.u32 d16, d13, #10 │ │ lsls r1, r4, #5 │ │ lsls r1, r4, #5 │ │ lsls r5, r3, #4 │ │ lsls r1, r4, #5 │ │ @@ -208875,31 +208875,31 @@ │ │ lsls r5, r3, #4 │ │ lsls r1, r4, #5 │ │ lsls r5, r3, #4 │ │ nop │ │ bl ffd4c21e │ │ cmp r5, #0 │ │ vqdmulh.s q9, q11, d18[0] │ │ - vtbx.8 d21, {d22-d25}, d8 │ │ + @ instruction: 0xfff65bbc │ │ vqdmulh.s q9, , d14[0] │ │ vsra.u64 , q15, #10 │ │ vtbl.8 d26, {d21}, d10 │ │ vabs.f16 d21, d17 │ │ vqshl.u32 d21, d3, #22 │ │ @ instruction: 0xfff6436a │ │ @ instruction: 0xfff67b1c │ │ - vsli.64 q11, q9, #53 @ 0x35 │ │ + vcle.f16 q11, q11, #0 │ │ vcgt.f16 d27, d28, #0 │ │ vsri.32 d27, d14, #11 │ │ @ instruction: 0xfff5e8d5 │ │ - vtbx.8 d21, {d21-d23}, d22 │ │ + @ instruction: 0xfff55ada │ │ vcvt.u32.f32 , q14, #11 │ │ vtbx.8 d30, {d6}, d28 │ │ vtbx.8 d30, {d5}, d14 │ │ - @ instruction: 0xfff55a99 │ │ + vtbl.8 d21, {d21-d23}, d13 │ │ vqshrun.s64 d30, q13, #11 │ │ vtbl.8 d18, {d21-d24}, d1 │ │ vtbl.8 d30, {d22}, d11 │ │ vqshl.u32 q15, q12, #21 │ │ sub.w r0, r1, #48 @ 0x30 │ │ cmp r0, #10 │ │ bcs.w c33ee │ │ @@ -209485,30 +209485,30 @@ │ │ @ instruction: 0xfa95fff5 │ │ add r7, sp, #1012 @ 0x3f4 │ │ vsli.64 d16, d16, #53 @ 0x35 │ │ vrsra.u32 q13, , #10 │ │ vrshr.u64 d21, d17, #11 │ │ @ instruction: 0xfff6befa │ │ movs r2, r0 │ │ - adcs r1, r4 │ │ + adcs r5, r2 │ │ vmull.u , d21, d1 │ │ vsra.u32 d19, d23, #11 │ │ vsra.u32 , q6, #11 │ │ vsli.64 q9, , #53 @ 0x35 │ │ movs r3, r0 │ │ - stmia r6!, {r2, r3} │ │ + stmia r6!, {r0, r1} │ │ @ instruction: 0xfff5ed27 │ │ vtbx.8 d20, {d5}, d7 │ │ - vsli.64 q14, q3, #54 @ 0x36 │ │ + vrintz.f16 q14, │ │ vtbl.8 d20, {d5}, d29 │ │ vqshlu.s64 d20, d0, #54 @ 0x36 │ │ vqshl.u64 d20, d25, #54 @ 0x36 │ │ vsra.u32 d26, d11, #10 │ │ vabs.f16 d18, d14 │ │ - vqshrun.s64 d27, q15, #10 │ │ + vqshrun.s64 d27, , #10 │ │ vqshlu.s64 d18, d14, #53 @ 0x35 │ │ vsra.u64 d30, d16, #10 │ │ vdup.8 d17, d7[2] │ │ @ instruction: 0xfff6acd3 │ │ vshll.u32 q11, d17, #21 │ │ movs r0, #1 │ │ str r0, [r1, #4] │ │ @@ -209868,33 +209868,33 @@ │ │ add.w r0, r0, #1 │ │ bne.n c3b98 │ │ b.n c3c06 │ │ nop │ │ adds r2, #236 @ 0xec │ │ vtbx.8 d17, {d6-d9}, d27 │ │ vrshr.u64 , q1, #10 │ │ - vcvt.f32.u32 q14, q10, #10 │ │ + vqrdmlah.s q14, q3, d27[0] │ │ vclt.s16 , q8, #0 │ │ vrintm.f16 , │ │ vshr.u32 q12, , #10 │ │ vrshr.u32 , q15, #11 │ │ vqrdmlsh.s , , d19[0] │ │ vtbl.8 d17, {d21}, d16 │ │ - @ instruction: 0xfff53d2a │ │ + vcvt.u16.f16 d19, d14, #11 │ │ vcle.s16 , , #0 │ │ - @ instruction: 0xfff53cbc │ │ - vsli.64 d27, d5, #53 @ 0x35 │ │ + @ instruction: 0xfff53cb0 │ │ + vcle.f16 d27, d12, #0 │ │ vtbl.8 d26, {d5-d8}, d7 │ │ - vcle.f16 , , #0 │ │ - vsli.64 , , #53 @ 0x35 │ │ + vsli.64 , q7, #53 @ 0x35 │ │ + vsli.64 , q0, #53 @ 0x35 │ │ vrshr.u32 q9, q1, #11 │ │ vrintm.f16 q11, q11 │ │ - @ instruction: 0xfff53b96 │ │ + vtbl.8 d19, {d21-d24}, d10 │ │ @ instruction: 0xfff54cf1 │ │ - @ instruction: 0xfff63b7e │ │ + @ instruction: 0xfff63b72 │ │ vcgt.s16 d18, d0, #0 │ │ add.w r5, r6, #60 @ 0x3c │ │ add.w r3, r6, #52 @ 0x34 │ │ mov r2, r9 │ │ cmp r0, #0 │ │ mov r1, r5 │ │ it eq │ │ @@ -210308,33 +210308,33 @@ │ │ movs r0, r0 │ │ movs r2, r0 │ │ movs r0, r0 │ │ movs r3, r0 │ │ movs r0, r0 │ │ strh r4, [r3, #36] @ 0x24 │ │ @ instruction: 0xfff549f4 │ │ - vqrdmlah.s q10, q3, d18[0] │ │ + vcvt.f32.u32 q10, q3, #10 │ │ vtbx.8 d18, {d21-d22}, d27 │ │ vsri.64 d29, d25, #11 │ │ @ instruction: 0xfff5dbf3 │ │ vcgt.f16 q12, q7, #0 │ │ vsri.32 d24, d30, #11 │ │ vqrdmulh.s q11, , d7[0] │ │ @ instruction: 0xfff56dbf │ │ vcle.f16 d19, d21, #0 │ │ vsli.64 d19, d13, #54 @ 0x36 │ │ vsli.32 d19, d9, #22 │ │ vsli.32 d19, d1, #22 │ │ - @ instruction: 0xfff6bb31 │ │ + vtbl.8 d27, {d6-d9}, d24 │ │ vqrdmlah.s q11, , d24[0] │ │ vrintn.f16 , │ │ vtbl.8 d27, {d6}, d4 │ │ movs r2, r0 │ │ ldr r5, [r4, #52] @ 0x34 │ │ - vmlsl.u , d21, d21[0] │ │ + vqshlu.s64 , , #53 @ 0x35 │ │ @ instruction: 0xfff5f8d6 │ │ stmia r0!, {r3, r4} │ │ mov lr, r5 │ │ ldr.w r5, [ip] │ │ cmp r5, #0 │ │ mov.w r5, #0 │ │ it eq │ │ @@ -210683,39 +210683,39 @@ │ │ cbz r0, c4444 │ │ subs r4, #1 │ │ add.w r0, r0, #1 │ │ bne.n c43c2 │ │ b.n c4446 │ │ ldr r7, [r1, #40] @ 0x28 │ │ vtbx.8 d29, {d21}, d5 │ │ - vsli.64 d19, d19, #53 @ 0x35 │ │ + vcle.f16 d19, d23, #0 │ │ vsubl.u , d21, d5 │ │ @ instruction: 0xfff61f0f │ │ movs r3, r0 │ │ adds r2, #81 @ 0x51 │ │ vshr.u64 d22, d18, #10 │ │ vrshr.u32 , , #11 │ │ @ instruction: 0xfff61e8b │ │ movs r3, r0 │ │ - strh r0, [r7, r6] │ │ + strh r4, [r5, r6] │ │ vceq.f16 d18, d1, #0 │ │ vmlsl.u q9, d21, d12[0] │ │ - vabs.s16 , q3 │ │ + vrsra.u32 d21, d26, #11 │ │ vceq.i16 d21, d24, #0 │ │ @ instruction: 0xfff65fbf │ │ vtbl.8 d22, {d6-d9}, d16 │ │ vrsra.u64 d23, d16, #10 │ │ vcvt.u32.f32 , , #11 │ │ - @ instruction: 0xfff633c4 │ │ - vqshlu.s64 , q12, #53 @ 0x35 │ │ + vrsra.u64 d19, d24, #10 │ │ + vmlsl.u , d21, d31[0] │ │ vshr.u32 , , #11 │ │ - vqrshrun.s64 d20, , #10 │ │ + vtbx.8 d20, {d6}, d21 │ │ vqshlu.s64 , q4, #53 @ 0x35 │ │ - vrsubhn.i d27, , q1 │ │ - vtbx.8 d26, {d21-d24}, d29 │ │ + vqshlu.s32 , , #21 │ │ + vtbx.8 d26, {d21-d24}, d20 │ │ vsri.32 d18, d14, #11 │ │ vsubw.u q8, q11, d31 │ │ vuzp.16 d17, d29 │ │ vcgt.s16 d18, d0, #0 │ │ ldr r5, [pc, #848] @ (c4798 ) │ │ add.w r3, r6, #52 @ 0x34 │ │ ldr r2, [r6, #48] @ 0x30 │ │ @@ -211058,50 +211058,50 @@ │ │ bne.n c4782 │ │ b.n c485a │ │ nop │ │ bvs.n c46b0 │ │ vrsra.u32 d18, d22, #11 │ │ vrinta.f16 d29, d11 │ │ vqshlu.s64 d22, d26, #53 @ 0x35 │ │ - vsri.32 , , #11 │ │ + vsri.32 , , #11 │ │ vceq.i16 d22, d26, #0 │ │ - @ instruction: 0xfff63b76 │ │ + vtbx.8 d19, {d6-d9}, d26 │ │ vneg.f16 d17, d14 │ │ - vsli.32 d27, d12, #22 │ │ + vsli.32 d27, d3, #22 │ │ vrshr.u32 d18, d7, #11 │ │ vclt.s16 d18, d5, #0 │ │ - vcle.s16 , q1, #0 │ │ + vsra.u64 d19, d22, #11 │ │ @ instruction: 0xfff56896 │ │ vtbl.8 d22, {d22}, d4 │ │ @ instruction: 0xfff6e9f7 │ │ vqrdmlah.s q9, , d3[0] │ │ vcvt.f32.u32 d18, d17, #10 │ │ vcvt.f16.f32 d21, │ │ - vclt.f16 d20, d27, #0 │ │ - vqshlu.s32 d20, d9, #21 │ │ + vqshlu.s32 d20, d15, #21 │ │ + vclt.f16 d20, d13, #0 │ │ @ instruction: 0xfff52894 │ │ vzip.16 q8, │ │ vzip.16 d16, d31 │ │ - vmla.i , q3, d7[0] │ │ + vshr.u32 d21, d27, #10 │ │ @ instruction: 0xfff50f2b │ │ vcvt.u32.f32 d16, d9, #11 │ │ vdup.8 q8, d8[2] │ │ - vabs.s16 , │ │ - vrsra.u32 d21, d19, #11 │ │ + vrsra.u32 d21, d25, #11 │ │ + vabs.s16 d21, d23 │ │ vsli.32 q8, q2, #21 │ │ @ instruction: 0xfff55fde │ │ vqrdmlsh.s , q11, d12[0] │ │ vrintp.f16 d29, d19 │ │ vtbx.8 d21, {d21-d24}, d26 │ │ vsli.32 q11, q9, #21 │ │ @ instruction: 0xfff55b90 │ │ vsra.u32 q9, , #11 │ │ - @ instruction: 0xfff64f8c │ │ + @ instruction: 0xfff64f80 │ │ vneg.f16 d22, d10 │ │ - @ instruction: 0xfff64f2e │ │ + @ instruction: 0xfff64f22 │ │ vsra.u64 d30, d25, #11 │ │ @ instruction: 0xfff59e09 │ │ vsli.64 d17, d22, #53 @ 0x35 │ │ vqrdmulh.s , q11, d30[0] │ │ vsli.32 , q4, #21 │ │ vcvt.bf16.f32 d29, │ │ @ instruction: 0xfff59d8d │ │ @@ -211462,31 +211462,31 @@ │ │ vcvt.u32.f32 d24, d31, #10 │ │ @ instruction: 0xfff54df0 │ │ vqrdmlah.s , q3, d20[0] │ │ vqmovn.s32 d17, q0 │ │ @ instruction: 0xfff58ed3 │ │ vqrdmlah.s q12, , d1[0] │ │ vrshr.u32 , , #11 │ │ - vrintm.f16 d19, d10 │ │ - vqrdmulh.s q9, , d13[0] │ │ + vqshlu.s32 , q15, #22 │ │ + vqrdmulh.s q9, , d1[0] │ │ vqrdmlah.s q12, , d31[0] │ │ - vcge.s16 d27, d22, #0 │ │ - vqshlu.s32 d19, d2, #21 │ │ + vshr.u64 d27, d13, #11 │ │ + vclt.f16 d19, d6, #0 │ │ vrsra.u64 d22, d26, #11 │ │ - @ instruction: 0xfff62cd3 │ │ - vqdmulh.s q9, , d1[0] │ │ + vqdmulh.s q9, q11, d7[0] │ │ + @ instruction: 0xfff52cb5 │ │ vrsubhn.i d28, , q15 │ │ - @ instruction: 0xfff5aff4 │ │ + vqrdmlsh.s q13, , d27[0] │ │ vqshrun.s64 d21, , #11 │ │ - @ instruction: 0xfff6af96 │ │ + @ instruction: 0xfff6af8d │ │ @ instruction: 0xfff5cefa │ │ vrsra.u32 d22, d23, #11 │ │ vrintp.f16 , │ │ vrshr.u64 q11, , #10 │ │ - vcvt.u32.f32 d26, d27, #10 │ │ + vcvt.u32.f32 d26, d18, #10 │ │ vcle.s16 d19, d2, #0 │ │ vtbl.8 d25, {d6-d8}, d0 │ │ vceq.i16 d19, d20, #0 │ │ vqshlu.s32 d23, d31, #22 │ │ vceq.i16 d17, d29, #0 │ │ vaddl.u q9, d6, d0 │ │ ldr r5, [pc, #896] @ (c4fcc ) │ │ @@ -211845,45 +211845,45 @@ │ │ adds r0, #1 │ │ movs r1, #10 │ │ blx ee0e0 │ │ cmp r0, #0 │ │ it ne │ │ addne r0, #1 │ │ b.w c5936 │ │ - adds r4, #210 @ 0xd2 │ │ + adds r4, #198 @ 0xc6 │ │ vshr.u32 d17, d21, #11 │ │ vtbx.8 d17, {d6-d9}, d21 │ │ vshll.i16 q8, d16, #16 │ │ - vsri.64 d19, d7, #10 │ │ + vrintx.f16 d19, d11 │ │ vmlal.u q8, d21, d2[0] │ │ - @ instruction: 0xfff6334b │ │ - vqrdmulh.s q13, , d18[0] │ │ + vrsra.u32 d19, d31, #10 │ │ + vcvt.u16.f16 q13, , #11 │ │ vclt.s16 q15, q5, #0 │ │ - @ instruction: 0xfff5ad04 │ │ + @ instruction: 0xfff5acfb │ │ vqrdmlsh.s q8, , d24[0] │ │ @ instruction: 0xfff60ea3 │ │ @ instruction: 0xfff5ed26 │ │ vqrdmlah.s q8, , d5[0] │ │ vcvt.u32.f32 d16, d0, #11 │ │ vcvt.u32.f32 d16, d8, #10 │ │ vqdmulh.s q15, q11, d30[0] │ │ @ instruction: 0xfff50eba │ │ vrshr.u64 d28, d31, #10 │ │ vceq.f16 q9, , #0 │ │ - vsra.u32 q13, q12, #10 │ │ + vuzp.16 q13, │ │ vceq.f16 d18, d15, #0 │ │ - vshr.u64 q13, , #10 │ │ - vshr.u64 q13, , #11 │ │ + vtrn.16 q13, q12 │ │ + vshr.u64 q13, q8, #11 │ │ @ instruction: 0xfff52f03 │ │ - vshr.u64 d26, d15, #10 │ │ + vshr.u64 d26, d6, #10 │ │ vcvt.u16.f16 d16, d3, #11 │ │ - vneg.f16 q9, q14 │ │ + vneg.f16 q9, q8 │ │ @ instruction: 0xfff52ebe │ │ - vqshl.u64 d18, d2, #54 @ 0x36 │ │ - vrsubhn.i d20, , │ │ + vrintp.f16 d18, d6 │ │ + vqshlu.s64 d20, d7, #53 @ 0x35 │ │ vtbx.8 d21, {d21-d24}, d17 │ │ vcgt.s16 d18, d0, #0 │ │ ldr r5, [pc, #880] @ (c53c0 ) │ │ add.w r3, r6, #52 @ 0x34 │ │ ldr r2, [r6, #48] @ 0x30 │ │ cmp r0, #0 │ │ add r5, pc │ │ @@ -212224,37 +212224,37 @@ │ │ str.w r8, [r6, #48] @ 0x30 │ │ ldr.w r9, [r6, #16] │ │ b.n c54b6 │ │ nop │ │ lsrs r0, r3, #15 │ │ @ instruction: 0xfff55ad7 │ │ vdup.8 q10, d26[2] │ │ - vtbl.8 d20, {d22}, d12 │ │ - vqrshrun.s64 d20, q14, #11 │ │ - vtbx.8 d20, {d5}, d24 │ │ - vsli.32 d20, d15, #21 │ │ + vtbl.8 d20, {d22}, d0 │ │ + vqrshrun.s64 d20, q8, #11 │ │ + vqrshrun.s64 d20, q6, #11 │ │ + vsli.32 d20, d3, #21 │ │ vmlal.u , d21, d11[0] │ │ @ instruction: 0xfff51b71 │ │ - vtbl.8 d20, {d5}, d6 │ │ - vtbx.8 d26, {d5-d6}, d8 │ │ - vsli.32 d27, d27, #21 │ │ - vsri.32 d20, d31, #11 │ │ + vqshl.u64 q10, q13, #53 @ 0x35 │ │ + vqshrn.u64 d26, , #11 │ │ + vsli.32 d27, d18, #21 │ │ + vsri.32 d20, d19, #11 │ │ vcle.s16 , , #0 │ │ - vceq.f16 d18, d18, #0 │ │ + vsli.32 d18, d6, #21 │ │ vshr.u32 d16, d10, #11 │ │ - vqshlu.s64 d20, d28, #53 @ 0x35 │ │ - vclt.f16 d27, d30, #0 │ │ - vqshlu.s32 d27, d14, #21 │ │ - vclt.f16 d27, d10, #0 │ │ - vrsra.u32 d20, d31, #11 │ │ + vqshlu.s64 d20, d16, #53 @ 0x35 │ │ + vclt.f16 d27, d21, #0 │ │ + vqshlu.s32 d27, d5, #21 │ │ + vclt.f16 d27, d1, #0 │ │ + vrsra.u32 d20, d19, #11 │ │ vcge.s16 , , #0 │ │ @ instruction: 0xfff51991 │ │ - vcle.f16 d27, d24, #0 │ │ + vsli.64 d27, d15, #53 @ 0x35 │ │ vcvt.f16.u16 , q4, #11 │ │ - vrsra.u32 , , #11 │ │ + vrsra.u32 , q1, #11 │ │ @ instruction: 0xfff548dd │ │ add.w r4, r6, #420 @ 0x1a4 │ │ ldr r3, [pc, #884] @ (c57a4 ) │ │ movs r1, #60 @ 0x3c │ │ ldr r2, [pc, #884] @ (c57a8 ) │ │ add r0, pc │ │ ldr r5, [r6, #40] @ 0x28 │ │ @@ -212600,19 +212600,19 @@ │ │ add r0, pc │ │ str r0, [r6, #32] │ │ ldr r0, [pc, #560] @ (c59c8 ) │ │ str r4, [r6, #40] @ 0x28 │ │ add r0, pc │ │ str r0, [r6, #28] │ │ b.n c5812 │ │ - rors r5, r6 │ │ + rors r1, r5 │ │ @ instruction: 0xfff5cf9f │ │ vmlal.u , d21, d21[0] │ │ @ instruction: 0xfff6fdd0 │ │ - vrsra.u64 , q14, #12 │ │ + vrsra.u64 , , #12 │ │ vqshl.u32 d23, d4, #21 │ │ vclt.s16 d19, d25, #0 │ │ vqshlu.s64 , q14, #54 @ 0x36 │ │ vcle.s16 q9, q10, #0 │ │ @ instruction: 0xfff64d91 │ │ vdup.16 d27, d22[1] │ │ @ instruction: 0xfff5bb90 │ │ @@ -212784,28 +212784,28 @@ │ │ add.w r3, r6, #52 @ 0x34 │ │ add r1, pc │ │ bl c8fb0 │ │ str r0, [r6, #48] @ 0x30 │ │ b.w c5094 │ │ nop │ │ lsls r0, r6, #11 │ │ - @ instruction: 0xfff59a5e │ │ + @ instruction: 0xfff59a55 │ │ vneg.f16 d31, d23 │ │ @ instruction: 0xfff58ef9 │ │ vshr.u32 , , #11 │ │ vqrdmlah.s q12, q11, d17[0] │ │ - vclt.s16 , q10, #0 │ │ + vrshr.u32 , , #11 │ │ vtbx.8 d20, {d21-d24}, d5 │ │ vsri.32 q15, q10, #10 │ │ vmlsl.u , d21, d21[0] │ │ vcvt.u32.f32 q9, , #10 │ │ vrintm.f16 , │ │ - vqshl.u64 d17, d21, #54 @ 0x36 │ │ + vrintp.f16 d17, d25 │ │ @ instruction: 0xfff54add │ │ - vrsra.u64 d26, d12, #10 │ │ + vrsra.u64 d26, d3, #10 │ │ vtbl.8 d31, {d21-d22}, d16 │ │ vtbl.8 d31, {d20-d21}, d12 │ │ @ instruction: 0xfff45546 │ │ vtbx.8 d27, {d6}, d11 │ │ vqshrun.s64 d27, , #11 │ │ vrshr.u32 , , #11 │ │ @ instruction: 0xfff58ea8 │ │ @@ -213023,29 +213023,29 @@ │ │ subs r1, #7 │ │ vtbx.8 d25, {d6}, d4 │ │ movs r2, r0 │ │ ldrsb r4, [r1, r1] │ │ vsra.u32 d23, d3, #11 │ │ vcgt.f16 d29, d6, #0 │ │ vclt.f16 d27, d29, #0 │ │ - vsri.64 d25, d13, #11 │ │ + vsri.64 d25, d4, #11 │ │ @ instruction: 0xfff57d22 │ │ vtbx.8 d17, {d5}, d21 │ │ - vtbl.8 d26, {d22-d23}, d14 │ │ + vtbl.8 d26, {d22-d23}, d5 │ │ @ instruction: 0xfff5def2 │ │ vshr.u32 d21, d14, #11 │ │ vqrdmlah.s , , d28[0] │ │ @ instruction: 0xfff5def4 │ │ @ instruction: 0xfff5bdda │ │ - @ instruction: 0xfff51b32 │ │ + vtbl.8 d17, {d5-d8}, d22 │ │ vrsra.u32 , q10, #11 │ │ vtbx.8 d21, {d5-d8}, d3 │ │ vqshlu.s64 d20, d1, #53 @ 0x35 │ │ vabs.s16 , │ │ - vcvt.f32.u32 , q8, #11 │ │ + vqrdmlah.s , , d23[0] │ │ vclt.s16 d21, d3, #0 │ │ vsli.64 , q8, #54 @ 0x36 │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ mov r8, r0 │ │ ldr r0, [pc, #188] @ (c5cf0 ) │ │ movw r9, #65532 @ 0xfffc │ │ @@ -213327,29 +213327,29 @@ │ │ adds r6, #81 @ 0x51 │ │ vrinta.f16 , q3 │ │ movs r2, r0 │ │ strh r6, [r2, r6] │ │ vcvt.f32.u32 q11, , #11 │ │ vsra.u32 , q0, #11 │ │ vrsra.u32 , , #11 │ │ - vcle.s16 , , #0 │ │ + vsra.u64 , q5, #11 │ │ vtbx.8 d23, {d5-d7}, d22 │ │ vcle.f16 d17, d23, #0 │ │ - vrintm.f16 q13, q7 │ │ + vrintm.f16 q13, │ │ vcvt.f16.u16 d29, d16, #11 │ │ vcvt.u16.f16 q10, q6, #11 │ │ vdup.8 d29, d26[2] │ │ vcvt.f16.u16 d29, d18, #11 │ │ @ instruction: 0xfff5bb18 │ │ - vqrshrun.s64 d17, q8, #11 │ │ + vtbx.8 d17, {d5}, d20 │ │ vshr.u64 d29, d18, #11 │ │ vtbl.8 d21, {d21}, d1 │ │ vneg.s16 q10, │ │ vshr.u64 d29, d15, #11 │ │ - vtbl.8 d25, {d21-d24}, d24 │ │ + @ instruction: 0xfff59b9f │ │ vcvt.u32.f32 d20, d25, #11 │ │ @ instruction: 0xfff608fe │ │ vtbl.8 d31, {d5-d6}, d7 │ │ movs r2, r0 │ │ │ │ 000c5f38 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -216266,27 +216266,27 @@ │ │ vqshrn.u64 d17, , #10 │ │ @ instruction: 0xfff6df24 │ │ movs r2, r0 │ │ svc 60 @ 0x3c │ │ movs r2, r0 │ │ str r0, [r4, #104] @ 0x68 │ │ vsra.u64 q9, q10, #11 │ │ - @ instruction: 0xfff67a5c │ │ + @ instruction: 0xfff67a53 │ │ @ instruction: 0xfff5df01 │ │ movs r2, r0 │ │ udf #242 @ 0xf2 │ │ movs r2, r0 │ │ bcc.n c8160 │ │ movs r2, r0 │ │ ldrb r0, [r1, #7] │ │ movs r2, r0 │ │ udf #208 @ 0xd0 │ │ movs r2, r0 │ │ str r3, [r1, #68] @ 0x44 │ │ - vcgt.f16 q8, q6, #0 │ │ + vcgt.f16 q8, q0, #0 │ │ Address 0xc8256 is out of bounds. │ │ │ │ │ │ 000c8258 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -216488,16 +216488,16 @@ │ │ movs r2, r0 │ │ ble.n c8510 │ │ movs r2, r0 │ │ bne.n c8430 │ │ movs r2, r0 │ │ bne.n c8444 │ │ movs r2, r0 │ │ - lsls r0, r7, #10 │ │ - vclt.s16 d16, d14, #0 │ │ + lsls r4, r5, #10 │ │ + vclt.s16 d16, d2, #0 │ │ vcvt.f32.u32 , q7, #11 │ │ vqrdmlsh.s , , d18[0] │ │ vqshrun.s64 d25, , #10 │ │ Address 0xc846a is out of bounds. │ │ │ │ │ │ 000c846c : │ │ @@ -217046,15 +217046,15 @@ │ │ movs r2, r0 │ │ ldmia r4, {r1, r2, r3, r4, r5, r7} │ │ movs r2, r0 │ │ asrs r0, r0, #22 │ │ vsri.64 , q2, #10 │ │ vshr.u64 d21, d21, #10 │ │ vtbl.8 d17, {d5-d7}, d20 │ │ - vcvt.f32.u32 q15, , #10 │ │ + vqrdmlah.s q15, q3, d9[0] │ │ Address 0xc89aa is out of bounds. │ │ │ │ │ │ 000c89ac : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -217554,15 +217554,15 @@ │ │ movs r2, r0 │ │ stmia r7!, {r3, r4, r5, r7} │ │ movs r2, r0 │ │ stmia r7!, {r2, r3, r4, r5, r7} │ │ movs r2, r0 │ │ str r1, [sp, #804] @ 0x324 │ │ vsra.u32 d25, d15, #11 │ │ - vqrdmulh.s , , d20[0] │ │ + @ instruction: 0xfff5fdd8 │ │ vabal.u , d4, d20 │ │ vtbx.8 d29, {d6-d8}, d10 │ │ vsli.64 , q8, #53 @ 0x35 │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #12 │ │ mov fp, r0 │ │ @@ -220411,29 +220411,29 @@ │ │ movs r2, r0 │ │ uxtb r2, r7 │ │ movs r2, r0 │ │ add r6, pc, #976 @ (adr r6, cb2d4 ) │ │ movs r2, r0 │ │ add r6, pc, #992 @ (adr r6, cb2e8 ) │ │ movs r2, r0 │ │ - strh r2, [r2, r0] │ │ - vsra.u64 , q13, #11 │ │ + strh r1, [r1, r0] │ │ + vsra.u64 , , #11 │ │ vneg.s16 d27, d26 │ │ movs r2, r0 │ │ add r6, pc, #696 @ (adr r6, cb1d0 ) │ │ movs r2, r0 │ │ add r6, pc, #712 @ (adr r6, cb1e4 ) │ │ movs r2, r0 │ │ ldr r1, [sp, #696] @ 0x2b8 │ │ @ instruction: 0xfff5999c │ │ vabs.s16 , q12 │ │ movs r2, r0 │ │ cbz r6, caf8a │ │ movs r2, r0 │ │ - mvns r0, r4 │ │ + mvns r7, r2 │ │ @ instruction: 0xfff5d9d9 │ │ vshll.u32 , d9, #21 │ │ vabs.s16 d27, d16 │ │ movs r2, r0 │ │ │ │ 000caf3c : │ │ vmov s0, r2 │ │ @@ -220664,15 +220664,15 @@ │ │ movs r2, r0 │ │ str r6, [sp, #960] @ 0x3c0 │ │ vmlsl.u , d21, d16[0] │ │ vshr.u64 d27, d16, #11 │ │ movs r2, r0 │ │ sub sp, #256 @ 0x100 │ │ movs r2, r0 │ │ - asrs r2, r5 │ │ + asrs r1, r4 │ │ vabs.f16 d29, d19 │ │ vabs.f16 , │ │ vshr.u32 , q13, #11 │ │ movs r2, r0 │ │ │ │ 000cb18c : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -223550,72 +223550,72 @@ │ │ ldr r0, [pc, #744] @ (cd61c ) │ │ add r0, pc │ │ ldr r0, [r0, #0] │ │ b.n cd40e │ │ nop │ │ ldmia r2, {r0, r1, r2} │ │ vqshl.u64 d17, d14, #53 @ 0x35 │ │ - vtbx.8 d27, {d21-d24}, d30 │ │ + vtbx.8 d27, {d21-d24}, d18 │ │ vpaddl.s16 d31, d23 │ │ vrev32.16 , │ │ movs r2, r0 │ │ strh r4, [r3, #36] @ 0x24 │ │ movs r2, r0 │ │ str r0, [sp, #824] @ 0x338 │ │ movs r2, r0 │ │ str r0, [sp, #776] @ 0x308 │ │ movs r2, r0 │ │ add r3, pc, #820 @ (adr r3, cd694 ) │ │ vmlsl.u q15, d21, d3[0] │ │ - vtbl.8 d27, {d20-d23}, d30 │ │ + vtbl.8 d27, {d20-d23}, d18 │ │ @ instruction: 0xfff4f1e7 │ │ vrev32.16 d25, d28 │ │ movs r2, r0 │ │ str r0, [sp, #608] @ 0x260 │ │ movs r2, r0 │ │ strh r6, [r3, #34] @ 0x22 │ │ movs r2, r0 │ │ ldmia r1!, {r0, r3, r7} │ │ vqrshrn.u64 d28, , #11 │ │ vqshl.u32 d17, d4, #21 │ │ - vtbx.8 d27, {d5-d8}, d20 │ │ + @ instruction: 0xfff5bb58 │ │ vsra.u64 d31, d13, #12 │ │ vrev64.16 , │ │ movs r2, r0 │ │ str r0, [sp, #304] @ 0x130 │ │ movs r2, r0 │ │ strh r3, [r3, #8] │ │ vshr.u32 d25, d30, #11 │ │ movs r2, r0 │ │ str r0, [sp, #216] @ 0xd8 │ │ movs r2, r0 │ │ strh r1, [r1, #8] │ │ - vtbl.8 d27, {d5-d8}, d20 │ │ + @ instruction: 0xfff5bb18 │ │ vsra.u32 , , #12 │ │ vrev64.16 d25, d26 │ │ movs r2, r0 │ │ str r0, [sp, #128] @ 0x80 │ │ movs r2, r0 │ │ strh r6, [r2, #30] │ │ movs r2, r0 │ │ @ instruction: 0xb8d6 │ │ vtbx.8 d27, {d21}, d10 │ │ @ instruction: 0xfff54b39 │ │ - @ instruction: 0xfff5badc │ │ + @ instruction: 0xfff5bad0 │ │ vsra.u32 d31, d5, #12 │ │ vaddw.u q12, q10, d6 │ │ movs r2, r0 │ │ ldrh r6, [r5, #60] @ 0x3c │ │ movs r2, r0 │ │ strh r6, [r1, #26] │ │ movs r2, r0 │ │ lsls r6, r0, #1 │ │ vtbx.8 d28, {d5}, d25 │ │ vclt.f16 d17, d0, #0 │ │ - @ instruction: 0xfff5ba50 │ │ + vtbx.8 d27, {d5-d7}, d4 │ │ vrev32.16 d31, d9 │ │ vcvt.u32.f32 d24, d11, #12 │ │ movs r2, r0 │ │ ldrh r4, [r1, #56] @ 0x38 │ │ movs r2, r0 │ │ strh r6, [r6, #22] │ │ movs r2, r0 │ │ @@ -223761,55 +223761,55 @@ │ │ vpop {d8-d9} │ │ add sp, #4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ b.w d44bc │ │ blx ee280 │ │ b.n ccfae │ │ - vshll.u32 , d0, #20 │ │ + vtbl.8 d27, {d4-d6}, d4 │ │ vrev64.16 , │ │ vqrdmlah.s q12, q10, d22[0] │ │ movs r2, r0 │ │ cmp r0, #254 @ 0xfe │ │ movs r2, r0 │ │ ldrh r6, [r1, #54] @ 0x36 │ │ movs r2, r0 │ │ strh r4, [r7, #20] │ │ movs r2, r0 │ │ stmia r7!, {r0, r1, r2, r5, r6, r7} │ │ vqshl.u64 q14, , #53 @ 0x35 │ │ vsli.32 , q9, #21 │ │ - vtbx.8 d27, {d21-d22}, d2 │ │ + @ instruction: 0xfff5b9b6 │ │ @ instruction: 0xfff4effb │ │ @ instruction: 0xfff48e99 │ │ movs r2, r0 │ │ strh r4, [r5, #18] │ │ movs r2, r0 │ │ ldrh r6, [r7, #50] @ 0x32 │ │ movs r2, r0 │ │ ldrb r5, [r6, #29] │ │ vcvt.f32.u32 q12, q8, #11 │ │ movs r2, r0 │ │ ldrh r0, [r5, #50] @ 0x32 │ │ movs r2, r0 │ │ ldrb r3, [r4, #29] │ │ - vqrshrn.u64 d27, q15, #11 │ │ + vqrshrn.u64 d27, q9, #11 │ │ @ instruction: 0xfff4efb7 │ │ vcvt.f32.u32 q12, q6, #12 │ │ movs r2, r0 │ │ ldrh r2, [r2, #50] @ 0x32 │ │ movs r2, r0 │ │ strh r4, [r4, #16] │ │ movs r2, r0 │ │ strh r4, [r5, #16] │ │ movs r2, r0 │ │ @ instruction: 0xb72c │ │ vabs.f16 d27, d16 │ │ vtbl.8 d20, {d21-d22}, d15 │ │ - vqshrn.u64 d27, q9, #11 │ │ + vtbl.8 d27, {d5-d6}, d22 │ │ vqrdmlsh.s q15, q2, d27[0] │ │ @ instruction: 0xfff47fdc │ │ movs r2, r0 │ │ ldrh r4, [r3, #46] @ 0x2e │ │ movs r2, r0 │ │ strh r4, [r3, #12] │ │ movs r2, r0 │ │ @@ -223818,15 +223818,15 @@ │ │ mrc2 15, 4, pc, cr8, cr4, {7} │ │ stc2 15, cr15, [r8, #-976]! @ 0xfffffc30 │ │ ldrh r0, [r7, #32] │ │ movs r2, r0 │ │ ldrh r0, [r1, #34] @ 0x22 │ │ movs r2, r0 │ │ ldmia r4, {r1, r3, r4, r5, r6, r7} │ │ - vqshl.u32 d27, d26, #21 │ │ + vabs.f16 d27, d30 │ │ vcvt.u16.f16 q15, , #12 │ │ @ instruction: 0xfff48bdc │ │ movs r2, r0 │ │ ldrh r2, [r0, #32] │ │ movs r2, r0 │ │ adds r5, #72 @ 0x48 │ │ movs r2, r0 │ │ @@ -223834,15 +223834,15 @@ │ │ movs r2, r0 │ │ stc2l 15, cr15, [r2, #976] @ 0x3d0 │ │ ldrh r2, [r7, #38] @ 0x26 │ │ movs r2, r0 │ │ ldrh r0, [r2, #46] @ 0x2e │ │ movs r2, r0 │ │ ldmia r5!, {r2, r4, r7} │ │ - vqshl.u64 , q2, #53 @ 0x35 │ │ + vneg.f16 , q4 │ │ @ instruction: 0xfff4ee0d │ │ vmull.u q12, d20, d16 │ │ movs r2, r0 │ │ ldrh r4, [r0, #38] @ 0x26 │ │ movs r2, r0 │ │ adds r6, #0 │ │ movs r2, r0 │ │ @@ -223978,15 +223978,15 @@ │ │ ldrb r0, [r3, #25] │ │ movs r2, r0 │ │ ldrb r0, [r4, #25] │ │ movs r2, r0 │ │ b.n cde72 │ │ vrsra.u32 q15, , #12 │ │ vpadal.u16 q11, │ │ - vceq.f16 , q10, #0 │ │ + vsli.32 , q4, #21 │ │ @ instruction: 0xfff47b7f │ │ vsri.32 q9, q5, #11 │ │ movs r2, r0 │ │ ldrb r0, [r2, #16] │ │ movs r2, r0 │ │ ldrb r6, [r5, #15] │ │ movs r2, r0 │ │ @@ -223999,15 +223999,15 @@ │ │ strh r1, [r2, #2] │ │ vshr.u32 d24, d29, #11 │ │ vtbl.8 d24, {d5-d7}, d14 │ │ movs r2, r0 │ │ ldrh r0, [r4, #16] │ │ movs r2, r0 │ │ bl ffce678c │ │ - push {r3, r4, r6, r7} │ │ + push {r2, r3, r6, r7} │ │ @ instruction: 0xfff47af3 │ │ vtbx.8 d24, {d21-d22}, d18 │ │ movs r2, r0 │ │ ldrh r2, [r2, #14] │ │ movs r2, r0 │ │ │ │ 000cd7b4 : │ │ @@ -224513,15 +224513,15 @@ │ │ add r2, pc │ │ blx edfd0 │ │ movw r0, #6408 @ 0x1908 │ │ mov r2, r4 │ │ str r0, [r5, #0] │ │ b.n cdc48 │ │ lsrs r6, r6, #10 │ │ - vtbx.8 d27, {d21-d22}, d5 │ │ + @ instruction: 0xfff5b9b9 │ │ vqrdmlah.s , q10, d4[0] │ │ movs r2, r0 │ │ subs r0, r1, #1 │ │ movs r2, r0 │ │ subs r6, r5, #3 │ │ movs r2, r0 │ │ strb r0, [r7, #27] │ │ @@ -225241,42 +225241,42 @@ │ │ strb r6, [r4, #22] │ │ vqrdmlsh.s , q2, d0[0] │ │ movs r2, r0 │ │ strb r4, [r5, #21] │ │ @ instruction: 0xfff47f2e │ │ movs r2, r0 │ │ stmia r6!, {r1, r2, r4, r5, r6} │ │ - vsri.64 , q3, #11 │ │ - vcvt.f32.u32 d16, d10, #12 │ │ + vcge.f16 , q5, #0 │ │ + vcvt.f32.u32 d16, d1, #12 │ │ vcvt.u32.f32 d23, d14, #11 │ │ movs r2, r0 │ │ strb r6, [r4, #10] │ │ movs r2, r0 │ │ ldmia r6, {r0, r2, r3, r4, r6, r7} │ │ @ instruction: 0xfff47efa │ │ movs r2, r0 │ │ ldmia r6, {r0, r1, r3, r6, r7} │ │ vqrdmlah.s , q10, d24[0] │ │ movs r2, r0 │ │ @ instruction: 0xe990fff4 │ │ - push {r3, r7} │ │ - vqrdmulh.s q8, q10, d12[0] │ │ + push {r2, r3, r4, r5, r6} │ │ + vqrdmulh.s q8, q10, d3[0] │ │ @ instruction: 0xfff57ed8 │ │ movs r2, r0 │ │ strb r0, [r3, #9] │ │ movs r2, r0 │ │ - lsls r1, r7, #30 │ │ + lsls r0, r6, #30 │ │ @ instruction: 0xfff57eb4 │ │ movs r2, r0 │ │ - lsls r7, r4, #30 │ │ + lsls r6, r3, #30 │ │ @ instruction: 0xfff57ea2 │ │ movs r2, r0 │ │ mrc 15, 5, APSR_nzcv, cr1, cr4, {7} │ │ - push {r1, r3, r4, r5} │ │ - vcvt.u16.f16 q8, q15, #12 │ │ + push {r1, r2, r3, r5} │ │ + vcvt.u16.f16 q8, , #12 │ │ vshr.u32 d23, d6, #11 │ │ movs r2, r0 │ │ ldr r4, [r6, #120] @ 0x78 │ │ movs r2, r0 │ │ asrs r4, r6, #31 │ │ movs r2, r0 │ │ bl 295476 │ │ @@ -225598,15 +225598,15 @@ │ │ movweq r1, #33189 @ 0x81a5 │ │ bl 81958 │ │ movw r0, #36161 @ 0x8d41 │ │ movs r1, #0 │ │ bl 81764 │ │ b.n ce81a │ │ lsls r6, r3, #10 │ │ - @ instruction: 0xfff50b33 │ │ + vtbl.8 d16, {d5-d8}, d26 │ │ vcle.f16 , q15, #0 │ │ movs r2, r0 │ │ @ instruction: 0xfad5ffff │ │ ldr r0, [pc, #852] @ (ceb50 ) │ │ mov r3, r6 │ │ ldrd r2, r1, [r4, #40] @ 0x28 │ │ add r0, pc │ │ @@ -228358,19 +228358,19 @@ │ │ @ instruction: 0xf6f20001 │ │ ldr??.w r0, [ip, #1] │ │ vld1.8 {d0[0]}, [r0], r1 │ │ vst1.8 {d0[0]}, [r2], r1 │ │ str r2, [r6, r3] │ │ movs r2, r0 │ │ b.n cfef0 │ │ - vsri.64 d25, d18, #12 │ │ + vclz.i16 d25, d22 │ │ vrsra.u64 d30, d18, #12 │ │ vtbx.8 d18, {d20-d23}, d0 │ │ vcgt.f16 q15, q14, #0 │ │ - vrsra.u64 , q10, #12 │ │ + @ instruction: 0xfff493e8 │ │ vqshl.u64 q8, q12, #52 @ 0x34 │ │ movs r2, r0 │ │ │ │ 000d04b4 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -228704,28 +228704,28 @@ │ │ add r2, sp, #292 @ 0x124 │ │ @ instruction: 0xfff45a76 │ │ movs r2, r0 │ │ add r2, sp, #220 @ 0xdc │ │ vtbx.8 d21, {d4-d6}, d20 │ │ movs r2, r0 │ │ stmia r4!, {r2, r3, r4, r5, r6, r7} │ │ - @ instruction: 0xfff48ff4 │ │ + vqrdmlsh.s q12, q10, d24[0] │ │ @ instruction: 0xfff4bb56 │ │ @ instruction: 0xfff45a54 │ │ movs r2, r0 │ │ ldr r5, [pc, #784] @ (d0b18 ) │ │ movs r2, r0 │ │ - b.n d0e56 │ │ + b.n d0e44 │ │ vshll.u32 , d16, #20 │ │ movs r2, r0 │ │ - b.n d0e3a │ │ + b.n d0e28 │ │ vshll.u32 , d14, #20 │ │ movs r2, r0 │ │ ldmia r2, {r0, r2, r3, r4} │ │ - @ instruction: 0xfff48fa6 │ │ + @ instruction: 0xfff48f9a │ │ vtbl.8 d27, {d4-d7}, d8 │ │ vtbl.8 d20, {d4-d7}, d22 │ │ movs r2, r0 │ │ ldr r1, [sp, #68] @ 0x44 │ │ cmp r1, #0 │ │ ittt ne │ │ ldrne r1, [sp, #52] @ 0x34 │ │ @@ -231302,15 +231302,15 @@ │ │ popeq {r4, r5, r6, r7, pc} │ │ blx ee280 │ │ rors r0, r5 │ │ movs r2, r0 │ │ strh r6, [r6, #56] @ 0x38 │ │ vsra.u64 q10, q3, #12 │ │ movs r2, r0 │ │ - ldr r1, [r7, #72] @ 0x48 │ │ + ldr r5, [r5, #72] @ 0x48 │ │ vsli.32 d16, d27, #20 │ │ vdup.8 q12, d0[2] │ │ @ instruction: 0xfff4bf00 │ │ nop │ │ nop │ │ nop │ │ movs r5, r0 │ │ @@ -232832,15 +232832,15 @@ │ │ vtbl.8 d26, {d4-d6}, d12 │ │ @ instruction: 0xfff42efe │ │ movs r2, r0 │ │ cmp r7, #16 │ │ movs r2, r0 │ │ strb r6, [r4, #6] │ │ vabal.u , d20, d27 │ │ - vcvt.u32.f32 d20, d0, #11 │ │ + @ instruction: 0xfff54f04 │ │ vqrdmlah.s q9, q10, d12[0] │ │ movs r2, r0 │ │ │ │ 000d333c : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -233417,15 +233417,15 @@ │ │ movs r2, r0 │ │ adds r0, r6, #7 │ │ movs r2, r0 │ │ adds r4, r5, #7 │ │ movs r2, r0 │ │ asrs r0, r5, #3 │ │ vshr.u64 , q3, #11 │ │ - vtbl.8 d27, {d5-d8}, d16 │ │ + @ instruction: 0xfff5bb17 │ │ vsra.u32 d21, d9, #12 │ │ vsra.u32 , , #11 │ │ vtbl.8 d17, {d21-d24}, d12 │ │ movs r2, r0 │ │ cmp r2, #94 @ 0x5e │ │ movs r2, r0 │ │ adds r2, r6, #5 │ │ @@ -233439,15 +233439,15 @@ │ │ ldr r2, [r3, #72] @ 0x48 │ │ vshr.u64 d21, d15, #12 │ │ vtbx.8 d22, {d21-d24}, d0 │ │ @ instruction: 0xfff51c90 │ │ movs r2, r0 │ │ lsrs r4, r1, #30 │ │ vcvt.u32.f32 q8, q13, #11 │ │ - vtbx.8 d27, {d21-d22}, d4 │ │ + @ instruction: 0xfff5b9bb │ │ @ instruction: 0xfff44fbd │ │ @ instruction: 0xfff52ffd │ │ vtbl.8 d18, {d5-d6}, d2 │ │ movs r2, r0 │ │ │ │ 000d3938 : │ │ push {r7, lr} │ │ @@ -234786,17 +234786,17 @@ │ │ movs r2, r0 │ │ subs r6, r6, r5 │ │ movs r2, r0 │ │ lsrs r0, r2, #26 │ │ movs r2, r0 │ │ lsrs r6, r2, #26 │ │ movs r2, r0 │ │ - stmia r3!, {r0, r5} │ │ - vpaddl.u16 q14, │ │ - vpaddl.u16 , │ │ + stmia r3!, {r3, r4} │ │ + vrshr.u64 q14, q4, #12 │ │ + vpaddl.u16 , │ │ vsra.u64 d20, d7, #12 │ │ @ instruction: 0xfff5cab2 │ │ vtbl.8 d27, {d4-d5}, d14 │ │ movs r1, r0 │ │ │ │ 000d46f4 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -234957,19 +234957,19 @@ │ │ movs r2, r0 │ │ lsrs r2, r4, #22 │ │ movs r2, r0 │ │ subs r0, r7, r1 │ │ movs r2, r0 │ │ lsrs r6, r4, #22 │ │ movs r2, r0 │ │ - @ instruction: 0xb8b2 │ │ - vtbl.8 d27, {d20}, d20 │ │ + @ instruction: 0xb8a9 │ │ + @ instruction: 0xfff4b89b │ │ @ instruction: 0xfff4e898 │ │ vshr.u64 q10, , #12 │ │ - @ instruction: 0xfff5bfff │ │ + @ instruction: 0xfff5bff6 │ │ @ instruction: 0xfff40b54 │ │ movs r2, r0 │ │ adds r0, r2, r5 │ │ movs r2, r0 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r1, [pc, #124] @ (d4920 ) │ │ @@ -235037,15 +235037,15 @@ │ │ movs r2, r0 │ │ vmaxnm.f32 , q11, q10 │ │ mrc2 15, 7, pc, cr4, cr4, {7} │ │ adds r4, r0, r3 │ │ movs r2, r0 │ │ adds r6, r2, r3 │ │ movs r2, r0 │ │ - add r1, sp, #248 @ 0xf8 │ │ + add r1, sp, #212 @ 0xd4 │ │ vcvt.u32.f32 d19, d23, #12 │ │ vcvt.u32.f32 , , #11 │ │ vtbl.8 d16, {d21-d22}, d28 │ │ movs r2, r0 │ │ adds r0, r1, r2 │ │ movs r2, r0 │ │ push {r4, r5, r6, r7, lr} │ │ @@ -235380,25 +235380,25 @@ │ │ movs r2, r0 │ │ adds r6, r5, r0 │ │ movs r2, r0 │ │ lsrs r4, r0, #13 │ │ movs r2, r0 │ │ mcr2 15, 2, pc, cr0, cr4, {7} @ │ │ mrc2 15, 1, pc, cr2, cr4, {7} │ │ - add r0, sp, #512 @ 0x200 │ │ + add r0, sp, #476 @ 0x1dc │ │ vcvt.f32.u32 , , #12 │ │ vsri.64 q11, , #11 │ │ vqshl.u64 , q15, #53 @ 0x35 │ │ movs r2, r0 │ │ asrs r4, r6, #31 │ │ movs r2, r0 │ │ lsrs r2, r7, #11 │ │ movs r2, r0 │ │ - add r0, pc, #364 @ (adr r0, d4e08 ) │ │ - vrev64.16 q13, │ │ + add r0, pc, #328 @ (adr r0, d4de4 ) │ │ + vrev64.16 q13, q2 │ │ vqshl.u32 q12, , #20 │ │ @ instruction: 0xfff43e2f │ │ vcge.f16 d22, d29, #0 │ │ vqshl.u64 d17, d26, #53 @ 0x35 │ │ movs r2, r0 │ │ asrs r0, r5, #30 │ │ movs r2, r0 │ │ @@ -236034,27 +236034,27 @@ │ │ movs r2, r0 │ │ lsls r4, r1, #20 │ │ movs r2, r0 │ │ lsls r4, r2, #20 │ │ movs r2, r0 │ │ pld [r0, #244]! │ │ strb.w pc, [r0, #244]! │ │ - add r2, pc, #304 @ (adr r2, d53e8 ) │ │ + add r2, pc, #268 @ (adr r2, d53c4 ) │ │ vtbx.8 d19, {d4}, d5 │ │ vsubl.u , d21, d9 │ │ vsra.u64 , q13, #12 │ │ movs r2, r0 │ │ lsls r6, r7, #18 │ │ movs r2, r0 │ │ asrs r4, r4, #7 │ │ movs r2, r0 │ │ lsls r2, r0, #19 │ │ movs r2, r0 │ │ - ldr r2, [sp, #140] @ 0x8c │ │ - vshll.u32 , d5, #20 │ │ + ldr r2, [sp, #104] @ 0x68 │ │ + vtbl.8 d25, {d4-d6}, d12 │ │ vrev16.16 d24, d19 │ │ vqshl.u64 , , #52 @ 0x34 │ │ vrshr.u32 d23, d27, #11 │ │ vrshr.u32 q8, q8, #12 │ │ movs r2, r0 │ │ lsls r2, r5, #6 │ │ movs r2, r0 │ │ @@ -236635,15 +236635,15 @@ │ │ movs r2, r0 │ │ lsrs r2, r0, #13 │ │ movs r2, r0 │ │ stc2l 0, cr0, [ip, #4] │ │ ldc2l 0, cr0, [r4, #4] │ │ ldmia r0, {r0, r1} │ │ vqshl.u64 q14, , #52 @ 0x34 │ │ - vshr.u32 d20, d8, #12 │ │ + vrev64.16 d20, d12 │ │ vrev64.16 d22, d2 │ │ vrsra.u64 d17, d26, #12 │ │ vpaddl.u16 q13, q14 │ │ movs r1, r0 │ │ vst4. {d31[0],d33[0],d35[0],d37[0]}, [r4 :256], r4 │ │ cbz r6, d5914 │ │ movs r1, r0 │ │ @@ -238830,16 +238830,16 @@ │ │ vsri.64 d17, d22, #11 │ │ vcge.f16 d31, d30, #0 │ │ movs r1, r0 │ │ b.n d6cc8 │ │ movs r1, r0 │ │ b.n d6cdc │ │ movs r1, r0 │ │ - asrs r2, r6, #31 │ │ - vqneg.s16 , q13 │ │ + asrs r6, r4, #31 │ │ + vqshl.u64 , q7, #52 @ 0x34 │ │ vsri.32 , q14, #12 │ │ movs r1, r0 │ │ eor.w r0, r0, #8454144 @ 0x810000 │ │ b.n d6c74 │ │ movs r1, r0 │ │ b.n d6c88 │ │ movs r1, r0 │ │ @@ -239092,16 +239092,16 @@ │ │ @ instruction: 0xfff5fedd │ │ @ instruction: 0xfffff1e8 │ │ movs r1, r0 │ │ b.n d69a0 │ │ movs r1, r0 │ │ b.n d69b4 │ │ movs r1, r0 │ │ - ldr r0, [sp, #916] @ 0x394 │ │ - vtbl.8 d25, {d20}, d11 │ │ + ldr r0, [sp, #880] @ 0x370 │ │ + vtbl.8 d25, {d20}, d2 │ │ vrev16.16 , q10 │ │ movs r1, r0 │ │ sbcs.w r0, r6, #1 │ │ ldr r1, [sp, #384] @ 0x180 │ │ movs r1, r0 │ │ │ │ 000d7170 : │ │ @@ -239336,16 +239336,16 @@ │ │ vqrdmlah.s , , d15[0] │ │ @ instruction: 0xffffef82 │ │ movs r1, r0 │ │ b.n d7730 │ │ movs r1, r0 │ │ b.n d7744 │ │ movs r1, r0 │ │ - str r6, [sp, #476] @ 0x1dc │ │ - vqshlu.s32 d25, d13, #20 │ │ + str r6, [sp, #440] @ 0x1b8 │ │ + vqshlu.s32 d25, d4, #20 │ │ @ instruction: 0xfff4eefe │ │ movs r1, r0 │ │ vhadd.s16 d0, d0, d1 │ │ str r6, [sp, #968] @ 0x3c8 │ │ movs r1, r0 │ │ │ │ 000d73dc : │ │ @@ -239583,16 +239583,16 @@ │ │ vqrdmlah.s , , d11[0] │ │ vcvt.u16.f16 d30, d6, #1 │ │ movs r1, r0 │ │ svc 66 @ 0x42 │ │ movs r1, r0 │ │ svc 74 @ 0x4a │ │ movs r1, r0 │ │ - str r4, [sp, #12] │ │ - vsubw.u , q10, d25 │ │ + str r3, [sp, #1000] @ 0x3e8 │ │ + vsubw.u , q10, d16 │ │ @ instruction: 0xfff4ec92 │ │ movs r1, r0 │ │ stc 0, cr0, [r4], #4 │ │ str r4, [sp, #504] @ 0x1f8 │ │ movs r1, r0 │ │ │ │ 000d7650 : │ │ @@ -239833,16 +239833,16 @@ │ │ vqrdmlah.s , , d3[0] │ │ @ instruction: 0xffffea9e │ │ movs r1, r0 │ │ bgt.n d783c │ │ movs r1, r0 │ │ bgt.n d7850 │ │ movs r1, r0 │ │ - str r1, [sp, #524] @ 0x20c │ │ - vrev16.16 d25, d25 │ │ + str r1, [sp, #488] @ 0x1e8 │ │ + vrev16.16 d25, d16 │ │ vshll.u32 q15, d10, #20 │ │ movs r1, r0 │ │ bic.w r0, ip, r1 │ │ str r1, [sp, #1016] @ 0x3f8 │ │ movs r1, r0 │ │ │ │ 000d78d0 : │ │ @@ -240069,16 +240069,16 @@ │ │ vqrdmlah.s , , d21[0] │ │ vqrshrun.s64 d30, q4, #1 │ │ movs r1, r0 │ │ bge.n d7be8 │ │ movs r1, r0 │ │ bge.n d7bfc │ │ movs r1, r0 │ │ - ldrh r5, [r6, #56] @ 0x38 │ │ - @ instruction: 0xfff48edb │ │ + ldrh r4, [r5, #56] @ 0x38 │ │ + @ instruction: 0xfff48ed2 │ │ vqshl.u64 q15, q2, #52 @ 0x34 │ │ movs r1, r0 │ │ b.n d7ae0 │ │ movs r1, r0 │ │ ldrh r0, [r6, #60] @ 0x3c │ │ movs r1, r0 │ │ │ │ @@ -240309,16 +240309,16 @@ │ │ @ instruction: 0xfff5fed9 │ │ vrsubhn.i d30, , q4 │ │ movs r1, r0 │ │ bhi.n d7d90 │ │ movs r1, r0 │ │ bhi.n d7da4 │ │ movs r1, r0 │ │ - ldrh r5, [r3, #38] @ 0x26 │ │ - vmull.u q12, d20, d3 │ │ + ldrh r4, [r2, #38] @ 0x26 │ │ + vcvt.f16.u16 q12, q13, #12 │ │ vabal.u q15, d20, d4 │ │ movs r1, r0 │ │ b.n d7898 │ │ movs r1, r0 │ │ ldrh r0, [r3, #42] @ 0x2a │ │ movs r1, r0 │ │ │ │ @@ -240550,16 +240550,16 @@ │ │ @ instruction: 0xfff5fedb │ │ vrsra.u64 d30, d22, #1 │ │ movs r1, r0 │ │ bpl.n d7f34 │ │ movs r1, r0 │ │ bpl.n d7f48 │ │ movs r1, r0 │ │ - ldrh r3, [r0, #20] │ │ - vtbl.8 d24, {d4-d6}, d25 │ │ + ldrh r2, [r7, #18] │ │ + vtbl.8 d24, {d4-d6}, d16 │ │ vrsra.u32 d30, d18, #12 │ │ movs r1, r0 │ │ b.n d864c │ │ movs r1, r0 │ │ ldrh r6, [r7, #22] │ │ movs r1, r0 │ │ │ │ @@ -240796,16 +240796,16 @@ │ │ vqrdmlah.s , , d15[0] │ │ vsra.u32 q15, q5, #1 │ │ movs r1, r0 │ │ bcc.n d82d4 │ │ movs r1, r0 │ │ bcc.n d82e8 │ │ movs r1, r0 │ │ - ldrh r7, [r3, #0] │ │ - vqneg.s16 q12, │ │ + ldrh r6, [r2, #0] │ │ + vqshl.u64 d24, d26, #52 @ 0x34 │ │ vshr.u64 q15, q2, #12 │ │ movs r1, r0 │ │ b.n d83f8 │ │ movs r1, r0 │ │ ldrh r0, [r3, #4] │ │ movs r1, r0 │ │ │ │ @@ -241030,16 +241030,16 @@ │ │ vcvt.f32.u32 , , #11 │ │ vqrdmlsh.s , , d10[0] │ │ movs r1, r0 │ │ bne.n d84e8 │ │ movs r1, r0 │ │ bne.n d84f8 │ │ movs r1, r0 │ │ - strh r1, [r0, #48] @ 0x30 │ │ - @ instruction: 0xfff48563 │ │ + strh r0, [r7, #46] @ 0x2e │ │ + vsli.32 q12, q5, #20 │ │ vcvt.f32.u32 , q14, #12 │ │ movs r1, r0 │ │ udf #142 @ 0x8e │ │ movs r1, r0 │ │ │ │ 000d8474 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -241262,16 +241262,16 @@ │ │ vcvt.f32.u32 , , #11 │ │ @ instruction: 0xffffdd0e │ │ movs r1, r0 │ │ ldmia r7!, {} │ │ movs r1, r0 │ │ ldmia r7!, {r1, r2} │ │ movs r1, r0 │ │ - strh r5, [r7, #28] │ │ - vrsra.u32 d24, d15, #12 │ │ + strh r4, [r6, #28] │ │ + vrsra.u32 d24, d6, #12 │ │ vdup.32 , d0[0] │ │ movs r1, r0 │ │ bgt.n d875c │ │ movs r1, r0 │ │ │ │ 000d86b8 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -241494,16 +241494,16 @@ │ │ vcvt.f32.u32 , , #11 │ │ @ instruction: 0xffffdad2 │ │ movs r1, r0 │ │ ldmia r4, {r2, r3, r4, r5, r7} │ │ movs r1, r0 │ │ ldmia r4!, {r1, r6, r7} │ │ movs r1, r0 │ │ - strh r1, [r7, #10] │ │ - vshr.u64 q12, , #12 │ │ + strh r0, [r6, #10] │ │ + vshr.u64 q12, q1, #12 │ │ vtbl.8 d29, {d4-d6}, d4 │ │ movs r1, r0 │ │ bge.n d8928 │ │ movs r1, r0 │ │ │ │ 000d88fc : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -241726,16 +241726,16 @@ │ │ vcvt.f32.u32 , , #11 │ │ @ instruction: 0xffffd896 │ │ movs r1, r0 │ │ ldmia r2!, {r3, r4, r5, r6} │ │ movs r1, r0 │ │ ldmia r2, {r1, r2, r3, r4, r5, r6} │ │ movs r1, r0 │ │ - ldrb r5, [r6, #28] │ │ - @ instruction: 0xfff47e97 │ │ + ldrb r4, [r5, #28] │ │ + @ instruction: 0xfff47e8e │ │ vqneg.s16 , q4 │ │ movs r1, r0 │ │ bvc.n d8af4 │ │ movs r1, r0 │ │ │ │ 000d8b40 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -241958,16 +241958,16 @@ │ │ vcvt.f32.u32 , , #11 │ │ vqshlu.s32 , q5, #31 │ │ movs r1, r0 │ │ ldmia r0!, {r2, r4, r5} │ │ movs r1, r0 │ │ ldmia r0!, {r1, r3, r4, r5} │ │ movs r1, r0 │ │ - ldrb r1, [r6, #19] │ │ - vcvt.f16.u16 , , #12 │ │ + ldrb r0, [r5, #19] │ │ + vdup.32 , d10[0] │ │ vabal.u , d20, d12 │ │ movs r1, r0 │ │ bpl.n d8cc0 │ │ movs r1, r0 │ │ │ │ 000d8d84 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -242190,16 +242190,16 @@ │ │ vcvt.f32.u32 , , #11 │ │ vsri.32 d29, d14, #1 │ │ movs r1, r0 │ │ stmia r5!, {r4, r5, r6, r7} │ │ movs r1, r0 │ │ stmia r5!, {r1, r2, r4, r5, r6, r7} │ │ movs r1, r0 │ │ - ldrb r5, [r5, #10] │ │ - vtbl.8 d23, {d4-d6}, d15 │ │ + ldrb r4, [r4, #10] │ │ + vtbl.8 d23, {d4-d6}, d6 │ │ vrsra.u32 , q0, #12 │ │ movs r1, r0 │ │ bcc.n d908c │ │ movs r1, r0 │ │ │ │ 000d8fc8 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -242422,16 +242422,16 @@ │ │ vcvt.f32.u32 , , #11 │ │ @ instruction: 0xffffd1e2 │ │ movs r1, r0 │ │ stmia r3!, {r2, r3, r5, r7} │ │ movs r1, r0 │ │ stmia r3!, {r1, r4, r5, r7} │ │ movs r1, r0 │ │ - ldrb r1, [r5, #1] │ │ - vqneg.s16 , │ │ + ldrb r0, [r4, #1] │ │ + vqneg.s16 , q1 │ │ vsra.u32 d29, d4, #12 │ │ movs r1, r0 │ │ bne.n d9258 │ │ movs r1, r0 │ │ │ │ 000d920c : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -242654,16 +242654,16 @@ │ │ vcvt.f32.u32 , , #11 │ │ @ instruction: 0xffffcfa6 │ │ movs r1, r0 │ │ stmia r1!, {r3, r5, r6} │ │ movs r1, r0 │ │ stmia r1!, {r1, r2, r3, r5, r6} │ │ movs r1, r0 │ │ - strb r5, [r4, #24] │ │ - vabal.u , d20, d7 │ │ + strb r4, [r3, #24] │ │ + vsli.32 , q15, #20 │ │ @ instruction: 0xfff4ced8 │ │ movs r1, r0 │ │ ldmia r6, {r1, r3, r5, r6, r7} │ │ movs r1, r0 │ │ │ │ 000d9450 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -242885,16 +242885,16 @@ │ │ vqrdmlah.s , , d23[0] │ │ @ instruction: 0xffffcd28 │ │ movs r1, r0 │ │ bkpt 0x00e4 │ │ movs r1, r0 │ │ bkpt 0x00ea │ │ movs r1, r0 │ │ - strb r3, [r4, #14] │ │ - @ instruction: 0xfff47349 │ │ + strb r2, [r3, #14] │ │ + @ instruction: 0xfff47340 │ │ vmull.u q14, d20, d16 │ │ movs r1, r0 │ │ ldmia r4, {r2, r4, r5, r7} │ │ movs r1, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -243406,16 +243406,16 @@ │ │ vcge.f16 d29, d3, #0 │ │ vqshrun.s64 d28, q3, #1 │ │ movs r1, r0 │ │ cbnz r2, d9be6 │ │ movs r1, r0 │ │ cbnz r0, d9bec │ │ movs r1, r0 │ │ - ldr r1, [r1, #104] @ 0x68 │ │ - @ instruction: 0xfff46e2d │ │ + ldr r0, [r0, #104] @ 0x68 │ │ + @ instruction: 0xfff46e24 │ │ vqneg.s16 d28, d14 │ │ movs r1, r0 │ │ stmia r7!, {r1, r5, r7} │ │ movs r1, r0 │ │ ldr r2, [r0, #112] @ 0x70 │ │ movs r1, r0 │ │ │ │ @@ -243654,16 +243654,16 @@ │ │ vsri.32 , , #11 │ │ vsli.64 d28, d16, #63 @ 0x3f │ │ movs r1, r0 │ │ @ instruction: 0xb75c │ │ movs r1, r0 │ │ @ instruction: 0xb762 │ │ movs r1, r0 │ │ - ldr r3, [r3, #64] @ 0x40 │ │ - @ instruction: 0xfff46bbf │ │ + ldr r2, [r2, #64] @ 0x40 │ │ + @ instruction: 0xfff46bb6 │ │ vabal.u q14, d4, d24 │ │ movs r1, r0 │ │ stmia r5!, {r2, r3, r4, r5} │ │ movs r1, r0 │ │ ldr r4, [r2, #72] @ 0x48 │ │ movs r1, r0 │ │ │ │ @@ -243905,16 +243905,16 @@ │ │ vcgt.f16 , , #0 │ │ @ instruction: 0xffffc340 │ │ movs r1, r0 │ │ push {r2, r5, r6, r7} │ │ movs r1, r0 │ │ push {r1, r3, r5, r6, r7} │ │ movs r1, r0 │ │ - ldr r3, [r4, #24] │ │ - vtbx.8 d22, {d4-d5}, d7 │ │ + ldr r2, [r3, #24] │ │ + vqshrn.u64 d22, q15, #12 │ │ vrshr.u64 d28, d24, #12 │ │ movs r1, r0 │ │ stmia r2!, {r2, r3, r6, r7} │ │ movs r1, r0 │ │ ldr r4, [r3, #32] │ │ movs r1, r0 │ │ │ │ @@ -244159,16 +244159,16 @@ │ │ vcgt.f16 , , #0 │ │ vmla.i q14, , d4[0] │ │ movs r1, r0 │ │ sxtb r0, r4 │ │ movs r1, r0 │ │ sxtb r6, r4 │ │ movs r1, r0 │ │ - str r7, [r3, #112] @ 0x70 │ │ - vpadal.u16 q11, │ │ + str r6, [r2, #112] @ 0x70 │ │ + vqshlu.s64 d22, d26, #52 @ 0x34 │ │ vshr.u32 d28, d28, #12 │ │ movs r1, r0 │ │ stmia r0!, {r4, r6} │ │ movs r1, r0 │ │ str r0, [r3, #120] @ 0x78 │ │ movs r1, r0 │ │ │ │ @@ -244397,16 +244397,16 @@ │ │ vsri.32 , , #11 │ │ vcvt.f32.u32 , q13, #1 │ │ movs r1, r0 │ │ add sp, #56 @ 0x38 │ │ movs r1, r0 │ │ add sp, #80 @ 0x50 │ │ movs r1, r0 │ │ - str r5, [r1, #76] @ 0x4c │ │ - vsri.32 q11, , #12 │ │ + str r4, [r0, #76] @ 0x4c │ │ + vcls.s16 q11, q12 │ │ @ instruction: 0xfff4bdf2 │ │ movs r1, r0 │ │ bkpt 0x0006 │ │ movs r1, r0 │ │ str r6, [r0, #84] @ 0x54 │ │ movs r1, r0 │ │ │ │ @@ -244637,16 +244637,16 @@ │ │ vsri.32 , , #11 │ │ vdup.8 d27, d30[7] │ │ movs r1, r0 │ │ add r5, sp, #744 @ 0x2e8 │ │ movs r1, r0 │ │ add r5, sp, #768 @ 0x300 │ │ movs r1, r0 │ │ - str r1, [r7, #36] @ 0x24 │ │ - vrshr.u32 d22, d13, #12 │ │ + str r0, [r6, #36] @ 0x24 │ │ + vrshr.u32 d22, d4, #12 │ │ vtbl.8 d27, {d20-d23}, d22 │ │ movs r1, r0 │ │ cbnz r2, da83e │ │ movs r1, r0 │ │ str r2, [r6, #44] @ 0x2c │ │ movs r1, r0 │ │ │ │ @@ -244879,16 +244879,16 @@ │ │ vsri.32 , , #11 │ │ @ instruction: 0xffffb9de │ │ movs r1, r0 │ │ add r3, sp, #392 @ 0x188 │ │ movs r1, r0 │ │ add r3, sp, #416 @ 0x1a0 │ │ movs r1, r0 │ │ - str r1, [r4, #0] │ │ - vqrdmlsh.s , q10, d5[0] │ │ + str r0, [r3, #0] │ │ + @ instruction: 0xfff45fbc │ │ vqrshrn.u64 d27, q3, #12 │ │ movs r1, r0 │ │ cbnz r2, daa42 │ │ movs r1, r0 │ │ str r2, [r3, #8] │ │ movs r1, r0 │ │ │ │ @@ -245120,16 +245120,16 @@ │ │ vsri.32 , , #11 │ │ vabdl.u , d31, d14 │ │ movs r1, r0 │ │ add r1, sp, #40 @ 0x28 │ │ movs r1, r0 │ │ add r1, sp, #64 @ 0x40 │ │ movs r1, r0 │ │ - ldrb r1, [r1, r7] │ │ - vqrdmulh.s , q2, d27[0] │ │ + ldrb r0, [r0, r7] │ │ + vqrdmulh.s , q2, d18[0] │ │ vqabs.s16 d27, d4 │ │ movs r1, r0 │ │ @ instruction: 0xb718 │ │ movs r1, r0 │ │ ldrsh r0, [r0, r1] │ │ movs r1, r0 │ │ │ │ @@ -245348,16 +245348,16 @@ │ │ vcge.f16 d29, d15, #0 │ │ @ instruction: 0xffffb540 │ │ movs r1, r0 │ │ add r6, pc, #720 @ (adr r6, db17c ) │ │ movs r1, r0 │ │ add r6, pc, #744 @ (adr r6, db198 ) │ │ movs r1, r0 │ │ - ldrh r3, [r6, r5] │ │ - @ instruction: 0xfff45b17 │ │ + ldrh r2, [r5, r5] │ │ + vtbl.8 d21, {d4-d7}, d14 │ │ vsri.64 d27, d24, #12 │ │ movs r1, r0 │ │ push {r2, r3, r6, r7} │ │ movs r1, r0 │ │ │ │ 000daec0 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -245574,16 +245574,16 @@ │ │ vsri.64 d29, d11, #11 │ │ vrsra.u32 d27, d0, #1 │ │ movs r1, r0 │ │ add r4, pc, #496 @ (adr r4, db2d4 ) │ │ movs r1, r0 │ │ add r4, pc, #520 @ (adr r4, db2f0 ) │ │ movs r1, r0 │ │ - ldr r3, [r7, r4] │ │ - @ instruction: 0xfff458df │ │ + ldr r2, [r6, r4] │ │ + @ instruction: 0xfff458d6 │ │ vpaddl.u16 d27, d8 │ │ movs r1, r0 │ │ uxth r4, r3 │ │ movs r1, r0 │ │ │ │ 000db0f8 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -245800,16 +245800,16 @@ │ │ vcge.f16 d29, d23, #0 │ │ vmla.i , , d16[0] │ │ movs r1, r0 │ │ add r2, pc, #272 @ (adr r2, db42c ) │ │ movs r1, r0 │ │ add r2, pc, #296 @ (adr r2, db448 ) │ │ movs r1, r0 │ │ - ldrsb r3, [r0, r4] │ │ - vpadal.u16 d21, d23 │ │ + ldrsb r2, [r7, r3] │ │ + vqshlu.s64 d21, d14, #52 @ 0x34 │ │ vshr.u32 , q4, #12 │ │ movs r1, r0 │ │ add sp, #432 @ 0x1b0 │ │ movs r1, r0 │ │ │ │ 000db330 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -246026,16 +246026,16 @@ │ │ vsri.64 d29, d19, #11 │ │ @ instruction: 0xffffaeb0 │ │ movs r1, r0 │ │ add r0, pc, #48 @ (adr r0, db584 ) │ │ movs r1, r0 │ │ add r0, pc, #72 @ (adr r0, db5a0 ) │ │ movs r1, r0 │ │ - strb r3, [r1, r3] │ │ - vcls.s16 , │ │ + strb r2, [r0, r3] │ │ + vcls.s16 , q11 │ │ @ instruction: 0xfff4ae28 │ │ movs r1, r0 │ │ add r6, sp, #240 @ 0xf0 │ │ movs r1, r0 │ │ │ │ 000db568 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -246252,16 +246252,16 @@ │ │ vsri.64 d29, d31, #11 │ │ vmull.u q13, d31, d0 │ │ movs r1, r0 │ │ ldr r5, [sp, #848] @ 0x350 │ │ movs r1, r0 │ │ ldr r5, [sp, #872] @ 0x368 │ │ movs r1, r0 │ │ - strh r3, [r2, r2] │ │ - vrshr.u32 d21, d23, #12 │ │ + strh r2, [r1, r2] │ │ + vpaddl.s16 d21, d30 │ │ @ instruction: 0xfff4abf8 │ │ movs r1, r0 │ │ add r4, sp, #48 @ 0x30 │ │ movs r1, r0 │ │ │ │ 000db7a0 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -246478,16 +246478,16 @@ │ │ vcge.f16 , , #0 │ │ @ instruction: 0xffffaa50 │ │ movs r1, r0 │ │ ldr r3, [sp, #624] @ 0x270 │ │ movs r1, r0 │ │ ldr r3, [sp, #648] @ 0x288 │ │ movs r1, r0 │ │ - str r3, [r3, r1] │ │ - @ instruction: 0xfff44fff │ │ + str r2, [r2, r1] │ │ + @ instruction: 0xfff44ff6 │ │ vtbx.8 d26, {d20-d21}, d8 │ │ movs r1, r0 │ │ add r1, sp, #880 @ 0x370 │ │ movs r1, r0 │ │ │ │ 000db9d8 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -246704,16 +246704,16 @@ │ │ vsri.64 , , #11 │ │ vtbl.8 d26, {d15}, d16 │ │ movs r1, r0 │ │ ldr r1, [sp, #400] @ 0x190 │ │ movs r1, r0 │ │ ldr r1, [sp, #424] @ 0x1a8 │ │ movs r1, r0 │ │ - ldr r6, [pc, #140] @ (dbc90 ) │ │ - vqrdmulh.s q10, q10, d7[0] │ │ + ldr r6, [pc, #104] @ (dbc6c ) │ │ + @ instruction: 0xfff44dbe │ │ vqshl.u64 d26, d8, #52 @ 0x34 │ │ movs r1, r0 │ │ add r7, pc, #688 @ (adr r7, dbec0 ) │ │ movs r1, r0 │ │ │ │ 000dbc10 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -246930,16 +246930,16 @@ │ │ vcge.f16 , , #0 │ │ vsli.64 q13, q8, #63 @ 0x3f │ │ movs r1, r0 │ │ str r7, [sp, #176] @ 0xb0 │ │ movs r1, r0 │ │ str r7, [sp, #200] @ 0xc8 │ │ movs r1, r0 │ │ - ldr r3, [pc, #940] @ (dc1e8 ) │ │ - vtbl.8 d20, {d20-d23}, d15 │ │ + ldr r3, [pc, #904] @ (dc1c4 ) │ │ + vtbl.8 d20, {d20-d23}, d6 │ │ @ instruction: 0xfff4a568 │ │ movs r1, r0 │ │ add r5, pc, #496 @ (adr r5, dc038 ) │ │ movs r1, r0 │ │ │ │ 000dbe48 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -247161,16 +247161,16 @@ │ │ vcge.f16 , , #0 │ │ vrsra.u64 d26, d28, #1 │ │ movs r1, r0 │ │ str r4, [sp, #960] @ 0x3c0 │ │ movs r1, r0 │ │ str r4, [sp, #984] @ 0x3d8 │ │ movs r1, r0 │ │ - ldr r1, [pc, #700] @ (dc33c ) │ │ - vtbx.8 d20, {d4-d5}, d13 │ │ + ldr r1, [pc, #664] @ (dc318 ) │ │ + vtbx.8 d20, {d4-d5}, d4 │ │ vsubw.u q13, q2, d30 │ │ movs r1, r0 │ │ add r3, pc, #264 @ (adr r3, dc194 ) │ │ movs r1, r0 │ │ │ │ 000dc08c : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -247392,16 +247392,16 @@ │ │ vqrdmlah.s , , d23[0] │ │ vaddw.u q13, , d4 │ │ movs r1, r0 │ │ str r2, [sp, #672] @ 0x2a0 │ │ movs r1, r0 │ │ str r2, [sp, #696] @ 0x2b8 │ │ movs r1, r0 │ │ - bx ip │ │ - vqabs.s16 d20, d13 │ │ + bx fp │ │ + vqabs.s16 d20, d4 │ │ vshr.u64 q13, q14, #12 │ │ movs r1, r0 │ │ add r1, pc, #64 @ (adr r1, dc30c ) │ │ movs r1, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -247631,16 +247631,16 @@ │ │ movs r1, r0 │ │ ldr r7, [sp, #272] @ 0x110 │ │ movs r1, r0 │ │ str r0, [sp, #352] @ 0x160 │ │ movs r1, r0 │ │ str r0, [sp, #384] @ 0x180 │ │ movs r1, r0 │ │ - subs r3, #132 @ 0x84 │ │ - @ instruction: 0xfff43b3e │ │ + subs r3, #123 @ 0x7b │ │ + @ instruction: 0xfff43b35 │ │ @ instruction: 0xfff49ed4 │ │ movs r1, r0 │ │ ldr r6, [sp, #928] @ 0x3a0 │ │ movs r1, r0 │ │ ldrh r2, [r2, #46] @ 0x2e │ │ movs r1, r0 │ │ │ │ @@ -247864,16 +247864,16 @@ │ │ vtbx.8 d31, {d5-d7}, d11 │ │ @ instruction: 0xffff9cf4 │ │ movs r1, r0 │ │ ldrh r0, [r2, #48] @ 0x30 │ │ movs r1, r0 │ │ ldrh r6, [r2, #48] @ 0x30 │ │ movs r1, r0 │ │ - cmn r7, r1 │ │ - vpaddl.s16 q10, │ │ + cmn r6, r0 │ │ + vpaddl.s16 q10, q10 │ │ vdup.32 , d22[0] │ │ movs r1, r0 │ │ ldr r4, [sp, #488] @ 0x1e8 │ │ movs r1, r0 │ │ │ │ 000dc76c : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -248095,16 +248095,16 @@ │ │ vqrdmlah.s , , d23[0] │ │ @ instruction: 0xffff9abc │ │ movs r1, r0 │ │ ldrh r0, [r1, #30] │ │ movs r1, r0 │ │ ldrh r6, [r1, #30] │ │ movs r1, r0 │ │ - lsls r7, r0 │ │ - vrev64.16 d20, d29 │ │ + eors r6, r7 │ │ + vrev64.16 d20, d20 │ │ vshll.u32 , d20, #20 │ │ movs r1, r0 │ │ ldr r2, [sp, #288] @ 0x120 │ │ movs r1, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -248557,16 +248557,16 @@ │ │ @ instruction: 0xfff5fa5f │ │ vmlsl.u , d15, d0[0] │ │ movs r1, r0 │ │ strh r4, [r0, #58] @ 0x3a │ │ movs r1, r0 │ │ strh r2, [r1, #58] @ 0x3a │ │ movs r1, r0 │ │ - subs r4, #3 │ │ - vtbl.8 d19, {d20-d23}, d17 │ │ + subs r3, #250 @ 0xfa │ │ + @ instruction: 0xfff43b98 │ │ vsli.64 d25, d18, #52 @ 0x34 │ │ movs r1, r0 │ │ str r5, [sp, #792] @ 0x318 │ │ movs r1, r0 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -261011,19 +261011,19 @@ │ │ movs r1, r0 │ │ asrs r2, r4, #1 │ │ movs r1, r0 │ │ lsls r2, r7, #4 │ │ movs r1, r0 │ │ lsls r4, r7, #4 │ │ movs r1, r0 │ │ - str r6, [sp, #740] @ 0x2e4 │ │ - vrsubhn.i d25, , │ │ + str r6, [sp, #704] @ 0x2c0 │ │ + vqshlu.s64 d25, d12, #51 @ 0x33 │ │ vcvt.u32.f32 d31, d17, #13 │ │ vcvt.f32.u32 d20, d31, #14 │ │ - vtbx.8 d19, {d19}, d0 │ │ + @ instruction: 0xfff338b4 │ │ @ instruction: 0xfff3febc │ │ movs r0, r0 │ │ strh r2, [r3, #20] │ │ vqrdmlah.s , q10, d3[0] │ │ Address 0xe5526 is out of bounds. │ │ │ │ │ │ @@ -261303,17 +261303,17 @@ │ │ pop {r4, r5, r6, r7, pc} │ │ lsrs r4, r7, #20 │ │ movs r1, r0 │ │ lsrs r2, r6, #20 │ │ movs r1, r0 │ │ ldc2l 0, cr0, [ip] │ │ cdp2 0, 0, cr0, cr4, cr0, {0} │ │ - movs r3, #174 @ 0xae │ │ - vsubw.u q9, , d16 │ │ - vshr.u32 , , #13 │ │ + movs r3, #162 @ 0xa2 │ │ + vrsra.u64 d18, d4, #13 │ │ + vmla.i , , d30[0] │ │ @ instruction: 0xfff34b1f │ │ vdup.8 , d9[1] │ │ @ instruction: 0xfff2fbb8 │ │ movs r0, r0 │ │ ldrb r0, [r7, #30] │ │ @ instruction: 0xfff4ff2d │ │ Address 0xe57ee is out of bounds. │ │ @@ -262162,15 +262162,15 @@ │ │ movs r1, r0 │ │ lsls r6, r3, #21 │ │ movs r1, r0 │ │ @ instruction: 0xf5fc0000 │ │ lsls r4, r1, #21 │ │ movs r1, r0 │ │ ldr r2, [r3, r5] │ │ - vsra.u64 d25, d6, #13 │ │ + vaddw.u , , d13 │ │ vsubw.u q10, , d29 │ │ vsra.u32 , , #13 │ │ @ instruction: 0xfff3f3c6 │ │ movs r0, r0 │ │ strb r0, [r7, #30] │ │ vqrdmlah.s , q10, d13[0] │ │ Address 0xe6026 is out of bounds. │ │ @@ -262450,17 +262450,17 @@ │ │ movs r1, r0 │ │ lsls r0, r0, #10 │ │ movs r1, r0 │ │ ssat r0, #1, sl │ │ @ instruction: 0xf3120000 │ │ add r3, sp, #20 │ │ @ instruction: 0xfff3aaf7 │ │ - vtbx.8 d18, {d19-d21}, d3 │ │ + @ instruction: 0xfff32ab7 │ │ vaddl.u q10, d3, d27 │ │ - @ instruction: 0xfff32af6 │ │ + vtbx.8 d18, {d19-d21}, d26 │ │ vmla.i , , d4[0] │ │ movs r0, r0 │ │ strb r2, [r0, #19] │ │ @ instruction: 0xfff4ff27 │ │ Address 0xe62e6 is out of bounds. │ │ │ │ │ │ @@ -262616,15 +262616,15 @@ │ │ movs r1, r0 │ │ lsls r0, r4, #4 │ │ movs r1, r0 │ │ sub.w r0, r2, #0 │ │ sub.w r0, r6, #0 │ │ cmp r9, r6 │ │ vabal.u q10, d20, d17 │ │ - vcls.s16 , q0 │ │ + vsri.32 d19, d20, #12 │ │ @ instruction: 0xfff33eb7 │ │ vsri.64 , q5, #13 │ │ vqrdmlsh.s q15, , d12[0] │ │ movs r0, r0 │ │ strb r4, [r6, #12] │ │ @ instruction: 0xfff4fef9 │ │ Address 0xe6482 is out of bounds. │ │ @@ -262900,15 +262900,15 @@ │ │ nop │ │ cdp2 0, 4, cr0, cr6, cr0, {0} │ │ cdp2 0, 3, cr0, cr12, cr0, {0} │ │ cdp 0, 10, cr0, cr14, cr0, {0} │ │ cdp 0, 11, cr0, cr6, cr0, {0} │ │ adds r7, #71 @ 0x47 │ │ vqshl.u32 d19, d25, #20 │ │ - @ instruction: 0xfff48a72 │ │ + vtbx.8 d24, {d4-d6}, d25 │ │ vtbx.8 d19, {d19-d22}, d15 │ │ @ instruction: 0xfff365e3 │ │ vdup.8 q15, d24[1] │ │ movs r0, r0 │ │ strb r6, [r4, #1] │ │ @ instruction: 0xfff4ff27 │ │ Address 0xe6742 is out of bounds. │ │ @@ -263042,15 +263042,15 @@ │ │ nop │ │ stc2l 0, cr0, [lr] │ │ stc2l 0, cr0, [r4] │ │ stcl 0, cr0, [lr, #-0] │ │ ldcl 0, cr0, [r6, #-0] │ │ strb r2, [r6, r4] │ │ vabal.u , d3, d20 │ │ - vshr.u32 d19, d18, #13 │ │ + vaddl.u , d3, d22 │ │ vtbx.8 d19, {d3-d5}, d31 │ │ @ instruction: 0xfff3c8d2 │ │ vtbl.8 d30, {d3-d6}, d8 │ │ movs r0, r0 │ │ ldr r6, [r0, #112] @ 0x70 │ │ @ instruction: 0xfff4ff27 │ │ Address 0xe68a2 is out of bounds. │ │ @@ -263483,15 +263483,15 @@ │ │ pop {r4, r5, r6, r7, pc} │ │ str.w r0, [r2] │ │ ldrh.w r0, [r8] │ │ stmdb sl, {} │ │ ldmdb r2, {} │ │ movs r1, #231 @ 0xe7 │ │ vsra.u64 q9, , #12 │ │ - vdup.32 d18, d25[0] │ │ + vcvt.f16.u16 d18, d13, #12 │ │ vrsubhn.i d19, , │ │ vrshr.u64 q10, q3, #13 │ │ vpadal.u16 q15, q2 │ │ movs r0, r0 │ │ ldr r6, [r7, #40] @ 0x28 │ │ vcvt.u32.f32 d31, d11, #12 │ │ Address 0xe6cf2 is out of bounds. │ │ @@ -263634,15 +263634,15 @@ │ │ movs r0, r0 │ │ b.n e6d88 │ │ movs r0, r0 │ │ ldr r0, [r0, r7] │ │ @ instruction: 0xfff359b2 │ │ vsubw.u q14, , d6 │ │ vsri.64 d19, d27, #13 │ │ - vrsra.u64 d24, d9, #13 │ │ + vrsra.u64 d24, d0, #13 │ │ vsli.32 q15, q2, #19 │ │ movs r0, r0 │ │ ldr r6, [r1, #20] │ │ vcvt.u32.f32 d31, d11, #12 │ │ Address 0xe6e62 is out of bounds. │ │ │ │ │ │ @@ -263774,19 +263774,19 @@ │ │ nop │ │ @ instruction: 0xf5f60000 │ │ @ instruction: 0xf5ec0000 │ │ b.n e6bfc │ │ movs r0, r0 │ │ b.n e6c10 │ │ movs r0, r0 │ │ - str r1, [sp, #164] @ 0xa4 │ │ - vsra.u32 d25, d11, #13 │ │ + str r1, [sp, #128] @ 0x80 │ │ + vsra.u32 d25, d2, #13 │ │ vabal.u q8, d19, d14 │ │ @ instruction: 0xfff4334f │ │ - @ instruction: 0xfff31e28 │ │ + vcvt.f32.u32 d17, d12, #13 │ │ @ instruction: 0xfff3e3e8 │ │ movs r0, r0 │ │ str r6, [r4, #124] @ 0x7c │ │ @ instruction: 0xfff4ff27 │ │ Address 0xe6fc2 is out of bounds. │ │ │ │ │ │ @@ -264372,15 +264372,15 @@ │ │ movs r0, r0 │ │ b.n e7684 │ │ movs r0, r0 │ │ cmp r1, #63 @ 0x3f │ │ vtbl.8 d18, {d4-d5}, d31 │ │ vtbx.8 d19, {d4-d6}, d28 │ │ @ instruction: 0xfff42da9 │ │ - @ instruction: 0xfff323e0 │ │ + vrsra.u64 q9, q2, #13 │ │ vcvt.f32.u32 d29, d22, #13 │ │ movs r0, r0 │ │ str r0, [r6, #32] │ │ vcvt.u32.f32 d31, d1, #12 │ │ Address 0xe757a is out of bounds. │ │ │ │ │ │ @@ -264510,16 +264510,16 @@ │ │ nop │ │ vhadd.s8 d0, d8, d0 │ │ cdp 0, 15, cr0, cr14, cr0, {0} │ │ svc 24 │ │ movs r0, r0 │ │ svc 32 │ │ movs r0, r0 │ │ - lsls r1, r0, #20 │ │ - vsri.64 q8, , #13 │ │ + lsls r5, r6, #19 │ │ + vmls.i q8, , d23[0] │ │ vshr.u32 d27, d7, #13 │ │ vcvt.f16.u16 d18, d25, #13 │ │ vmlsl.u q15, d19, d11[0] │ │ @ instruction: 0xfff2dcd2 │ │ movs r0, r0 │ │ str r2, [r2, #12] │ │ @ instruction: 0xfff4ff2b │ │ @@ -264805,15 +264805,15 @@ │ │ movs r0, r0 │ │ bgt.n e7a48 │ │ movs r0, r0 │ │ vminnm.f16 , q15, │ │ vminnm.f16 , q8, │ │ ldr r0, [sp, #892] @ 0x37c │ │ vqrshrn.u64 d18, , #13 │ │ - vqrdmlsh.s , , d4[0] │ │ + @ instruction: 0xfff31fb8 │ │ vshll.u32 , d4, #19 │ │ movs r0, r0 │ │ ldrsh r6, [r1, r0] │ │ vcvt.u32.f32 d31, d11, #12 │ │ Address 0xe79a2 is out of bounds. │ │ │ │ │ │ @@ -265866,15 +265866,15 @@ │ │ movs r0, r0 │ │ bcs.n e83f8 │ │ movs r0, r0 │ │ bcs.n e840c │ │ movs r0, r0 │ │ movs r6, #85 @ 0x55 │ │ vpadal.s16 q9, │ │ - vqrdmlah.s , q10, d20[0] │ │ + @ instruction: 0xfff4fed8 │ │ vqrdmlsh.s , q1, d11[0] │ │ vqrshrn.u64 d20, , #13 │ │ vqrdmlsh.s q14, , d20[0] │ │ movs r0, r0 │ │ strh r2, [r4, r7] │ │ @ instruction: 0xfff4ff27 │ │ Address 0xe83c6 is out of bounds. │ │ @@ -266015,16 +266015,16 @@ │ │ movs r0, r0 │ │ b.n e8708 │ │ movs r0, r0 │ │ beq.n e84a0 │ │ movs r0, r0 │ │ beq.n e84b4 │ │ movs r0, r0 │ │ - ldcl 15, cr15, [fp], #968 @ 0x3c8 │ │ - stcl 15, cr15, [sp], #968 @ 0x3c8 │ │ + stcl 15, cr15, [pc], #968 @ e88e4 │ │ + stcl 15, cr15, [r1], #968 @ 0x3c8 │ │ add r2, pc, #4 @ (adr r2, e8528 ) │ │ vqrdmulh.s , , d23[0] │ │ vtbl.8 d29, {d19}, d20 │ │ @ instruction: 0xfff2ce80 │ │ movs r0, r0 │ │ strh r2, [r7, r1] │ │ vcvt.u32.f32 d31, d11, #12 │ │ @@ -266473,15 +266473,15 @@ │ │ movs r0, r0 │ │ ldmia r4, {r1, r2, r4, r5, r6} │ │ movs r0, r0 │ │ movs r0, #184 @ 0xb8 │ │ vrev32.16 d18, d26 │ │ vpaddl.s16 d21, d31 │ │ vtbl.8 d17, {d19-d20}, d15 │ │ - vqrdmlsh.s q8, , d26[0] │ │ + @ instruction: 0xfff30fde │ │ vtbl.8 d28, {d3-d5}, d24 │ │ movs r0, r0 │ │ ldr r6, [pc, #152] @ (e8a18 ) │ │ @ instruction: 0xfff4ff27 │ │ Address 0xe8982 is out of bounds. │ │ │ │ │ │ @@ -266623,19 +266623,19 @@ │ │ movs r0, r0 │ │ blt.n e8b8c │ │ movs r0, r0 │ │ ldmia r3, {r3} │ │ movs r0, r0 │ │ ldmia r3!, {r4} │ │ movs r0, r0 │ │ - b.n e89b2 │ │ - vqshl.u32 q15, , #18 │ │ + b.n e899a │ │ + vqshl.u32 q15, , #18 │ │ @ instruction: 0xfff2a746 │ │ vtbl.8 d17, {d3}, d25 │ │ - vsra.u64 d23, d12, #13 │ │ + vsra.u64 d23, d3, #13 │ │ vtbx.8 d28, {d19}, d2 │ │ movs r0, r0 │ │ ldr r4, [pc, #736] @ (e8dd4 ) │ │ vcvt.u32.f32 d31, d9, #12 │ │ Address 0xe8af6 is out of bounds. │ │ │ │ │ │ @@ -266923,15 +266923,15 @@ │ │ movs r0, r0 │ │ ldmia r0!, {r1, r4, r5} │ │ movs r0, r0 │ │ ldmia r0!, {r1, r3, r4, r5} │ │ movs r0, r0 │ │ push {r1, r5, r6} │ │ vsri.32 , q2, #13 │ │ - vtbx.8 d23, {d19-d21}, d24 │ │ + @ instruction: 0xfff37adf │ │ vsli.32 , , #19 │ │ @ instruction: 0xfff3b99e │ │ @ instruction: 0xfff3c5ec │ │ movs r0, r0 │ │ ldr r1, [pc, #920] @ (e9160 ) │ │ vcvt.u32.f32 d31, d11, #12 │ │ Address 0xe8dca is out of bounds. │ │ @@ -267074,17 +267074,17 @@ │ │ movs r0, r0 │ │ stmia r6!, {r1, r6, r7} │ │ movs r0, r0 │ │ stmia r6!, {r1, r3, r6, r7} │ │ movs r0, r0 │ │ asrs r6, r3, #32 │ │ vshr.u32 d17, d0, #13 │ │ - vqshrn.u64 d30, , #13 │ │ + vtbl.8 d30, {d3-d4}, d13 │ │ @ instruction: 0xfff213e3 │ │ - vtbl.8 d23, {d19-d20}, d28 │ │ + vtbl.8 d23, {d19-d20}, d19 │ │ vsri.32 q14, q14, #13 │ │ movs r0, r0 │ │ ldr r0, [pc, #472] @ (e9110 ) │ │ vcvt.u32.f32 d31, d11, #12 │ │ Address 0xe8f3a is out of bounds. │ │ │ │ │ │ @@ -267227,15 +267227,15 @@ │ │ movs r0, r0 │ │ stmia r5!, {r1, r3, r4, r6} │ │ movs r0, r0 │ │ ldr r1, [sp, #936] @ 0x3a8 │ │ @ instruction: 0xfff399dc │ │ @ instruction: 0xfff33cba │ │ vrshr.u32 , , #13 │ │ - vtbx.8 d16, {d19}, d21 │ │ + @ instruction: 0xfff308d9 │ │ vsubw.u q14, , d12 │ │ movs r0, r0 │ │ bx r0 │ │ vcvt.u32.f32 d31, d11, #12 │ │ Address 0xe90aa is out of bounds. │ │ │ │ │ │ @@ -267527,15 +267527,15 @@ │ │ movs r0, r0 │ │ stmia r2!, {r1, r4, r5, r6} │ │ movs r0, r0 │ │ stmia r2!, {r1, r3, r4, r5, r6} │ │ movs r0, r0 │ │ ldrb r1, [r1, #10] │ │ @ instruction: 0xfff37a7b │ │ - vqrdmlsh.s q15, , d30[0] │ │ + vqrdmlsh.s q15, , d18[0] │ │ @ instruction: 0xfff20f93 │ │ vtbl.8 d30, {d19-d22}, d30 │ │ vaddl.u q14, d3, d28 │ │ movs r0, r0 │ │ add r6, r4 │ │ vcvt.u32.f32 d31, d11, #12 │ │ Address 0xe938a is out of bounds. │ │ @@ -268033,15 +268033,15 @@ │ │ add r3, pc │ │ b.w ede98 │ │ nop │ │ revsh r6, r3 │ │ movs r0, r0 │ │ ldr r7, [pc, #672] @ (e9aa4 ) │ │ @ instruction: 0xfff31761 │ │ - vrsra.u64 , , #12 │ │ + @ instruction: 0xfff453ec │ │ Address 0xe980a is out of bounds. │ │ │ │ │ │ 000e980c : │ │ ldr r0, [pc, #28] @ (e982c ) │ │ add r0, pc │ │ ldr r0, [r0, #104] @ 0x68 │ │ @@ -268129,15 +268129,15 @@ │ │ add r3, pc │ │ b.w ede98 │ │ nop │ │ rev r6, r3 │ │ movs r0, r0 │ │ ldr r6, [pc, #928] @ (e9c64 ) │ │ vrsubhn.i d17, , │ │ - vtbx.8 d30, {d4-d5}, d26 │ │ + vqrshrn.u64 d30, q7, #12 │ │ Address 0xe98ca is out of bounds. │ │ │ │ │ │ 000e98cc : │ │ ldr r0, [pc, #28] @ (e98ec ) │ │ add r0, pc │ │ ldr r0, [r0, #104] @ 0x68 │ │ @@ -268153,15 +268153,15 @@ │ │ add r3, pc │ │ b.w ede98 │ │ nop │ │ cbnz r6, e992a │ │ movs r0, r0 │ │ ldr r6, [pc, #736] @ (e9bd4 ) │ │ vqshlu.s32 , , #19 │ │ - vrsra.u32 q15, q6, #12 │ │ + vrsra.u32 q15, q0, #12 │ │ Address 0xe98fa is out of bounds. │ │ │ │ │ │ 000e98fc : │ │ ldr r0, [pc, #28] @ (e991c ) │ │ add r0, pc │ │ ldr r0, [r0, #104] @ 0x68 │ │ @@ -268225,15 +268225,15 @@ │ │ add r3, pc │ │ b.w ede98 │ │ nop │ │ cbnz r6, e9996 │ │ movs r0, r0 │ │ ldr r6, [pc, #160] @ (e9a24 ) │ │ @ instruction: 0xfff315e1 │ │ - vpaddl.u16 , q6 │ │ + vpaddl.u16 , │ │ Address 0xe998a is out of bounds. │ │ │ │ │ │ 000e998c : │ │ ldr r0, [pc, #28] @ (e99ac ) │ │ add r0, pc │ │ ldr r0, [r0, #104] @ 0x68 │ │ @@ -268249,15 +268249,15 @@ │ │ add r3, pc │ │ b.w ede98 │ │ nop │ │ cbnz r6, e99ba │ │ movs r0, r0 │ │ ldr r5, [pc, #992] @ (e9d94 ) │ │ vsli.64 d17, d17, #51 @ 0x33 │ │ - @ instruction: 0xfff4d993 │ │ + vtbl.8 d29, {d20-d21}, d7 │ │ Address 0xe99ba is out of bounds. │ │ │ │ │ │ 000e99bc : │ │ ldr r0, [pc, #28] @ (e99dc ) │ │ add r0, pc │ │ ldr r0, [r0, #104] @ 0x68 │ │ @@ -268297,15 +268297,15 @@ │ │ add r3, pc │ │ b.w ede98 │ │ nop │ │ @ instruction: 0xb8ce │ │ movs r0, r0 │ │ ldr r5, [pc, #608] @ (e9c74 ) │ │ vsli.32 , , #19 │ │ - @ instruction: 0xfff4edb1 │ │ + @ instruction: 0xfff4eda5 │ │ Address 0xe9a1a is out of bounds. │ │ │ │ │ │ 000e9a1c : │ │ ldr r0, [pc, #28] @ (e9a3c ) │ │ add r0, pc │ │ ldr r0, [r0, #104] @ 0x68 │ │ @@ -271870,96 +271870,96 @@ │ │ movs r0, r0 │ │ subs r4, #108 @ 0x6c │ │ movs r0, r0 │ │ add r7, pc, #184 @ (adr r7, ec218 ) │ │ movs r0, r0 │ │ str r6, [sp, #144] @ 0x90 │ │ movs r0, r0 │ │ - bls.n ec134 │ │ - @ instruction: 0xfff2d9d6 │ │ + bls.n ec11c │ │ + vtbx.8 d29, {d18-d19}, d10 │ │ vshr.u64 d31, d6, #14 │ │ vrsra.u64 , , #13 │ │ - vrsra.u32 q14, , #13 │ │ + vrsra.u32 q14, , #13 │ │ vqshlu.s64 q13, q8, #50 @ 0x32 │ │ movs r0, r0 │ │ add r6, pc, #912 @ (adr r6, ec510 ) │ │ movs r0, r0 │ │ str r5, [sp, #840] @ 0x348 │ │ movs r0, r0 │ │ strb r3, [r4, #9] │ │ vrshr.u32 , , #13 │ │ vcvt.u16.f16 q8, , #13 │ │ vsubw.u , , d23 │ │ - vsubw.u q14, , d13 │ │ + vsubw.u q14, , d1 │ │ vrsubhn.i d26, q9, q11 │ │ movs r0, r0 │ │ add r6, pc, #616 @ (adr r6, ec408 ) │ │ movs r0, r0 │ │ str r5, [sp, #512] @ 0x200 │ │ movs r0, r0 │ │ bl 13c18e │ │ bl 12c192 │ │ str r3, [sp, #672] @ 0x2a0 │ │ vrsra.u32 , , #13 │ │ - vrshr.u64 d28, d27, #13 │ │ + vsubl.u q14, d19, d31 │ │ vqshlu.s32 q13, q5, #18 │ │ movs r0, r0 │ │ add r6, pc, #280 @ (adr r6, ec2d8 ) │ │ movs r0, r0 │ │ str r5, [sp, #192] @ 0xc0 │ │ movs r0, r0 │ │ strh r2, [r1, r0] │ │ vsra.u64 , q15, #13 │ │ vtbx.8 d26, {d19}, d10 │ │ vsubw.u , , d9 │ │ - vmlal.u q14, d3, d31[0] │ │ + vmlal.u q14, d3, d19[0] │ │ vqshlu.s32 d26, d8, #18 │ │ movs r0, r0 │ │ add r6, pc, #16 @ (adr r6, ec1f0 ) │ │ movs r0, r0 │ │ str r4, [sp, #920] @ 0x398 │ │ movs r0, r0 │ │ ldr??.w pc, [r1, #242]! │ │ str??.w pc, [r5, #242]! │ │ - stmia r2!, {r0, r1, r2, r3, r4, r5} │ │ + stmia r2!, {r0, r1, r4, r5} │ │ vrshr.u64 d25, d31, #14 │ │ - vsubl.u q14, d3, d21 │ │ + vrshr.u32 d28, d9, #13 │ │ vsli.64 q13, q3, #50 @ 0x32 │ │ movs r0, r0 │ │ add r5, pc, #776 @ (adr r5, ec508 ) │ │ movs r0, r0 │ │ str r4, [sp, #624] @ 0x270 │ │ movs r0, r0 │ │ - bhi.n ec2da │ │ - vqrshrun.s64 d29, , #14 │ │ + bhi.n ec2c2 │ │ + vqrshrun.s64 d29, , #14 │ │ vtbl.8 d29, {d2}, d4 │ │ vrshr.u32 , , #13 │ │ - vsra.u64 q14, , #13 │ │ + @ instruction: 0xfff3c1cf │ │ vsli.64 d26, d4, #50 @ 0x32 │ │ movs r0, r0 │ │ add r5, pc, #512 @ (adr r5, ec420 ) │ │ movs r0, r0 │ │ str r4, [sp, #328] @ 0x148 │ │ movs r0, r0 │ │ str r3, [sp, #32] │ │ vrshr.u64 , q14, #14 │ │ - vswp , │ │ + vswp , q8 │ │ vsubl.u , d3, d27 │ │ - vsra.u64 d28, d1, #13 │ │ + vaddw.u q14, , d5 │ │ vsli.32 q13, q1, #18 │ │ movs r0, r0 │ │ add r5, pc, #280 @ (adr r5, ec358 ) │ │ movs r0, r0 │ │ str r4, [sp, #16] │ │ movs r0, r0 │ │ lsls r0, r0, #10 │ │ vmlal.u q8, d3, d30[0] │ │ vsubl.u , d19, d17 │ │ vsra.u64 , , #14 │ │ - vsra.u32 d28, d27, #13 │ │ + vaddw.u q14, , d31 │ │ vabal.u q13, d2, d4 │ │ movs r0, r0 │ │ add r4, pc, #944 @ (adr r4, ec610 ) │ │ movs r0, r0 │ │ str r3, [sp, #696] @ 0x2b8 │ │ movs r0, r0 │ │ cbz r1, ec2ce │ │ @@ -272328,37 +272328,37 @@ │ │ b.n ec6bc │ │ ldr r0, [sp, #32] │ │ ldr r0, [r0, #0] │ │ b.n ec6c0 │ │ sxtb r5, r1 │ │ @ instruction: 0xfff3914d │ │ vswp , │ │ - @ instruction: 0xfff3bfa9 │ │ + @ instruction: 0xfff3bf9d │ │ vrsra.u32 q13, q13, #14 │ │ movs r0, r0 │ │ add r3, pc, #408 @ (adr r3, ec758 ) │ │ movs r0, r0 │ │ str r2, [sp, #128] @ 0x80 │ │ movs r0, r0 │ │ ldr r7, [r7, #104] @ 0x68 │ │ @ instruction: 0xfff36eb3 │ │ - vsli.64 , , #51 @ 0x33 │ │ + vsli.64 , , #51 @ 0x33 │ │ @ instruction: 0xfff28ff9 │ │ - vcvt.u32.f32 , , #13 │ │ + vcvt.u32.f32 , , #13 │ │ vrsra.u32 d26, d18, #14 │ │ movs r0, r0 │ │ add r3, pc, #160 @ (adr r3, ec680 ) │ │ movs r0, r0 │ │ str r1, [sp, #832] @ 0x340 │ │ movs r0, r0 │ │ str r1, [sp, #72] @ 0x48 │ │ vuzp.8 d25, d4 │ │ @ instruction: 0xfff29a5b │ │ @ instruction: 0xfff38fa9 │ │ - @ instruction: 0xfff3bf0f │ │ + @ instruction: 0xfff3bf03 │ │ vqrdmlah.s q14, q9, d18[0] │ │ @ instruction: 0xfff3f1e6 │ │ vmlsl.u q15, d18, d28[0] │ │ @ instruction: 0xfff2bf00 │ │ nop │ │ nop │ │ nop │ │ @@ -272420,17 +272420,17 @@ │ │ vmla.i q13, , d16[0] │ │ movs r0, r0 │ │ ldr r0, [sp, #624] @ 0x270 │ │ vrsubhn.i d19, , q7 │ │ movs r0, r0 │ │ ldrh r7, [r2, #54] @ 0x36 │ │ @ instruction: 0xfff24fdc │ │ - vcvt.u16.f16 q14, , #13 │ │ + vqrdmulh.s q14, , d29[0] │ │ vcvt.u16.f16 q12, , #14 │ │ - @ instruction: 0xfff3bcbf │ │ + @ instruction: 0xfff3bcb3 │ │ vtrn.8 d26, d28 │ │ movs r0, r0 │ │ add r0, pc, #640 @ (adr r0, ec92c ) │ │ movs r0, r0 │ │ ldrh r0, [r6, #56] @ 0x38 │ │ movs r0, r0 │ │ str r1, [sp, #904] @ 0x388 │ │ @@ -272746,79 +272746,79 @@ │ │ beq.w ecaa0 │ │ str.w r4, [r8, #40] @ 0x28 │ │ b.n ecab4 │ │ nop │ │ str r0, [sp, #800] @ 0x320 │ │ vmovn.i16 d23, q5 │ │ @ instruction: 0xfff38bf7 │ │ - @ instruction: 0xfff3bb5d │ │ + @ instruction: 0xfff3bb51 │ │ vcvt.u32.f32 , q1, #14 │ │ movs r0, r0 │ │ ldr r7, [sp, #280] @ 0x118 │ │ movs r0, r0 │ │ ldrh r0, [r2, #46] @ 0x2e │ │ movs r0, r0 │ │ ldr r2, [sp, #924] @ 0x39c │ │ @ instruction: 0xfff39ad9 │ │ vaddw.u q15, , d16 │ │ vtbl.8 d24, {d19-d22}, d23 │ │ - vtbl.8 d27, {d3-d6}, d13 │ │ + vtbl.8 d27, {d3-d6}, d1 │ │ vtbl.8 d29, {d18-d19}, d1 │ │ vqrdmulh.s , , d14[0] │ │ @ instruction: 0xfff30e22 │ │ vqrdmulh.s , , d3[0] │ │ @ instruction: 0xfff3fbba │ │ vqrdmlah.s , q9, d4[0] │ │ vsra.u32 q13, q12, #13 │ │ - @ instruction: 0xfff32996 │ │ + vtbl.8 d18, {d19-d20}, d13 │ │ vrsubhn.i d24, , │ │ vtbl.8 d22, {d19-d20}, d24 │ │ vrsubhn.i d24, , │ │ - vabal.u q14, d3, d18 │ │ + vsli.32 d28, d6, #19 │ │ vqdmulh.s , q9, d24[0] │ │ - vtbx.8 d18, {d3-d4}, d9 │ │ + vtbx.8 d18, {d3-d4}, d0 │ │ vtbx.8 d22, {d3-d4}, d22 │ │ - vtbl.8 d18, {d3-d4}, d31 │ │ - vmls.i q14, , d16[0] │ │ + vtbl.8 d18, {d3-d4}, d22 │ │ + vsri.64 q14, q2, #13 │ │ vqshl.u32 q15, , #18 │ │ vqshrn.u64 d22, q11, #13 │ │ @ instruction: 0xfff3e763 │ │ - vsri.64 d28, d16, #13 │ │ + vraddhn.i d28, , q10 │ │ vshr.u32 d31, d7, #14 │ │ vtbl.8 d22, {d2-d3}, d14 │ │ @ instruction: 0xfff3effb │ │ - vraddhn.i d28, q9, q4 │ │ + vsri.32 q14, q14, #14 │ │ vshr.u32 , q10, #14 │ │ vtbx.8 d22, {d19}, d24 │ │ vshr.u32 , q5, #13 │ │ @ instruction: 0xfff35fd6 │ │ vmls.i , , d4[0] │ │ vtbx.8 d22, {d18}, d2 │ │ vraddhn.i d25, , q13 │ │ - vsri.32 d28, d28, #14 │ │ + vsri.32 d28, d16, #14 │ │ @ instruction: 0xfff27bd8 │ │ @ instruction: 0xfff3689c │ │ @ instruction: 0xfff37bbe │ │ - vsri.32 d28, d6, #13 │ │ + vraddhn.i d28, , q5 │ │ vtbx.8 d24, {d2-d4}, d24 │ │ vqrshrun.s64 d22, q11, #13 │ │ vtbx.8 d24, {d3-d5}, d14 │ │ - vrsra.u64 q14, q8, #13 │ │ - vrshr.u32 , q14, #14 │ │ + @ instruction: 0xfff3c3e4 │ │ + vrshr.u32 , , #14 │ │ vqrshrun.s64 d22, q0, #13 │ │ - vmlal.u , d3, d18[0] │ │ - @ instruction: 0xfff3c3ca │ │ + vrshr.u32 , , #13 │ │ + vrsra.u64 d28, d30, #13 │ │ vcvt.u16.f16 d21, d29, #14 │ │ vtbl.8 d22, {d3}, d26 │ │ @ instruction: 0xfff35d23 │ │ - vsubw.u q14, , d20 │ │ + vrsra.u64 d28, d8, #13 │ │ vtbl.8 d29, {d18-d21}, d31 │ │ vqshl.u64 q11, q14, #51 @ 0x33 │ │ vtbl.8 d29, {d19-d22}, d13 │ │ - vrsra.u32 q14, q11, #13 │ │ + @ instruction: 0xfff3c36a │ │ vtbx.8 d20, {d18}, d12 │ │ add r0, pc │ │ blx edfe0 │ │ ldr r0, [r5, #0] │ │ str.w r4, [r8, #40] @ 0x28 │ │ cmp r0, #0 │ │ beq.w ed53c │ │ @@ -273144,87 +273144,87 @@ │ │ ldr r1, [pc, #296] @ (ecef0 ) │ │ ldr r2, [pc, #300] @ (ecef4 ) │ │ add r0, pc │ │ add r1, pc │ │ add r2, pc │ │ blx edfe0 │ │ b.n ecbc6 │ │ - @ instruction: 0xb7df │ │ - vuzp.8 d19, d30 │ │ + @ instruction: 0xb7d3 │ │ + vuzp.8 d19, d21 │ │ vrsubhn.i d22, , q0 │ │ - vsra.u32 d19, d4, #13 │ │ + vaddw.u , , d11 │ │ vqrdmulh.s , , d30[0] │ │ vcvt.f32.u32 d25, d24, #13 │ │ vqshlu.s32 q11, q5, #19 │ │ vcvt.f32.u32 d25, d14, #13 │ │ - vsra.u64 q14, q2, #13 │ │ + @ instruction: 0xfff3c1c8 │ │ vsra.u32 d30, d5, #14 │ │ vqshlu.s32 d22, d20, #18 │ │ vshr.u64 q15, , #13 │ │ - vzip.8 d28, d30 │ │ + vzip.8 d28, d18 │ │ @ instruction: 0xfff2cdb3 │ │ vrsubhn.i d22, , q7 │ │ @ instruction: 0xfff3cd99 │ │ - vaddw.u q14, , d8 │ │ + vsra.u32 q14, q14, #13 │ │ @ instruction: 0xfff27b3d │ │ @ instruction: 0xfff365e8 │ │ vtbl.8 d23, {d3-d6}, d19 │ │ - @ instruction: 0xfff3c162 │ │ + vsra.u32 q14, q3, #13 │ │ @ instruction: 0xfff21a7c │ │ @ instruction: 0xfff365c2 │ │ vtbx.8 d17, {d3-d5}, d18 │ │ @ instruction: 0xfff35cb0 │ │ vmla.i , , d27[0] │ │ vabal.u q11, d19, d10 │ │ vshr.u32 , , #13 │ │ - vaddw.u q14, , d4 │ │ + vshr.u64 q14, q12, #13 │ │ @ instruction: 0xfff2dfd8 │ │ @ instruction: 0xfff36564 │ │ @ instruction: 0xfff3dfbe │ │ - vshr.u64 q14, q7, #13 │ │ + vshr.u64 q14, q1, #13 │ │ vrsra.u64 d30, d8, #14 │ │ vsli.32 d22, d22, #19 │ │ vrsra.u32 q15, q15, #13 │ │ - vshr.u64 d28, d16, #13 │ │ + vaddl.u q14, d19, d20 │ │ vtbx.8 d17, {d18-d19}, d20 │ │ vsli.32 d22, d0, #19 │ │ vtbx.8 d17, {d19-d20}, d10 │ │ - vaddl.u q14, d19, d10 │ │ + vshr.u32 q14, q15, #13 │ │ vtbl.8 d25, {d2-d4}, d5 │ │ vmls.i q11, , d26[0] │ │ vtbx.8 d25, {d19-d20}, d27 │ │ @ instruction: 0xfff35bd8 │ │ vsra.u32 d22, d27, #13 │ │ vmls.i q11, , d4[0] │ │ vaddw.u q11, , d17 │ │ - vshr.u32 d28, d30, #13 │ │ - vcvt.u32.f32 q9, q7, #14 │ │ + vshr.u32 d28, d18, #13 │ │ + vcvt.u32.f32 q9, , #14 │ │ vsri.64 d22, d14, #13 │ │ - vqrdmlsh.s q9, , d4[0] │ │ + vcvt.u32.f32 d18, d27, #13 │ │ vtbl.8 d21, {d19-d22}, d12 │ │ vcvt.f16.u16 , , #13 │ │ vsri.32 q11, q12, #13 │ │ vcvt.f16.u16 , , #13 │ │ vtbx.8 d21, {d3-d6}, d22 │ │ vraddhn.i d22, , q1 │ │ vsri.32 q11, q1, #13 │ │ vmls.i q11, , d24[0] │ │ - vqrdmlsh.s , , d12[0] │ │ + vqrdmlsh.s , , d0[0] │ │ @ instruction: 0xfff20e04 │ │ vraddhn.i d22, , q14 │ │ vqrdmulh.s q8, , d26[0] │ │ - @ instruction: 0xfff3bfa6 │ │ + @ instruction: 0xfff3bf9a │ │ vtbl.8 d30, {d2-d5}, d18 │ │ vraddhn.i d22, q1, q3 │ │ vtbl.8 d30, {d3-d6}, d8 │ │ - @ instruction: 0xfff2bf80 │ │ + vcvt.u32.f32 , q10, #14 │ │ vcvt.f32.u32 q11, , #14 │ │ vsubw.u q11, , d30 │ │ vcvt.f32.u32 q11, , #13 │ │ - @ instruction: 0xfff3bf28 │ │ + vcvt.u32.f32 d27, d12, #13 │ │ @ instruction: 0xfff249d1 │ │ mov r0, r6 │ │ add r1, pc │ │ blx ee050 │ │ cbz r0, ecf1e │ │ ldr r0, [r5, #0] │ │ movs r1, #1 │ │ @@ -273547,61 +273547,61 @@ │ │ movs r0, #0 │ │ str.w r0, [r8, #136] @ 0x88 │ │ b.n ed310 │ │ nop │ │ bcc.n ed172 │ │ vqmovun.s16 d22, q9 │ │ vrsra.u32 , , #13 │ │ - @ instruction: 0xfff2bddc │ │ + @ instruction: 0xfff2bdd0 │ │ vrshr.u64 d20, d8, #14 │ │ vrshr.u32 d22, d20, #13 │ │ vrshr.u32 q10, q11, #13 │ │ - @ instruction: 0xfff3bdae │ │ + @ instruction: 0xfff3bda2 │ │ vraddhn.i d31, q1, q5 │ │ vmovn.i16 d22, q4 │ │ @ instruction: 0xfff3f3ec │ │ - @ instruction: 0xfff2bd82 │ │ + vcvt.u16.f16 , q11, #14 │ │ vrsubhn.i d25, q9, q14 │ │ movs r0, r0 │ │ str r6, [sp, #640] @ 0x280 │ │ movs r0, r0 │ │ strh r6, [r3, #40] @ 0x28 │ │ movs r0, r0 │ │ - ittte │ │ + iteee │ │ vtbl.8 d25, {d18-d21}, d7 │ │ @ instruction: 0xfff2dff2 │ │ - vabdl.u q13, d19, d28 │ │ + vabdlal.u q13, d19, d16 │ │ vsraal.u32 q11, q8, #14 │ │ - vqshl.u64 d26, d2, #51 @ 0x33 │ │ - vqdmulh.s , q9, d26[0] │ │ + vabdl.u q13, d19, d6 │ │ + @ instruction: 0xfff2bcde │ │ vzip.8 d20, d29 │ │ vtbl.8 d16, {d3-d6}, d22 │ │ vaddw.u q11, , d30 │ │ vtbl.8 d16, {d3-d6}, d12 │ │ - vmull.u , d19, d24 │ │ + @ instruction: 0xfff3bc9c │ │ vabal.u , d2, d4 │ │ vaddw.u q11, , d8 │ │ vmls.i , , d26[0] │ │ - vmull.u , d19, d2 │ │ + vcvt.f16.u16 , q11, #13 │ │ vqshlu.s32 d21, d5, #18 │ │ vmla.i q11, , d18[0] │ │ vsli.64 , , #51 @ 0x33 │ │ - vcvt.f16.u16 , q6, #13 │ │ + vcvt.f16.u16 , q0, #13 │ │ @ instruction: 0xfff26b9a │ │ vtbl.8 d25, {d19-d21}, d11 │ │ vtrn.8 d22, d14 │ │ vtbx.8 d25, {d3-d5}, d31 │ │ - vdup.16 d27, d8[0] │ │ + @ instruction: 0xfff2bbfc │ │ vsra.u64 d29, d9, #14 │ │ vswp d22, d23 │ │ @ instruction: 0xfff38b17 │ │ vtbx.8 d29, {d18-d19}, d3 │ │ vqrdmlsh.s , , d26[0] │ │ vtbl.8 d29, {d19-d20}, d17 │ │ - vtbx.8 d27, {d19-d21}, d20 │ │ + @ instruction: 0xfff3bad8 │ │ @ instruction: 0xfff2f8d8 │ │ asrs r0, r1, #2 │ │ cbz r1, ed310 │ │ ldr.w r0, [r9] │ │ cbnz r0, ed310 │ │ ldr r0, [pc, #840] @ (ed654 ) │ │ add r0, pc │ │ @@ -273907,46 +273907,46 @@ │ │ blx edfe0 │ │ b.w ecd8e │ │ ldr r0, [sp, #52] @ 0x34 │ │ cmp r0, #0 │ │ beq.w ecd8e │ │ b.n ed602 │ │ nop │ │ - movs r6, #104 @ 0x68 │ │ - vdup.8 d17, d4[1] │ │ + movs r6, #95 @ 0x5f │ │ + @ instruction: 0xfff31bfb │ │ vaddw.u , , d25 │ │ - vsra.u64 q13, q12, #13 │ │ - vqshlu.s32 d18, d28, #18 │ │ + @ instruction: 0xfff3a1ec │ │ + vqshlu.s32 d18, d19, #18 │ │ @ instruction: 0xfff3cf83 │ │ - @ instruction: 0xfff3b9df │ │ + @ instruction: 0xfff3b9d3 │ │ @ instruction: 0xfff29366 │ │ vtbx.8 d21, {d19-d22}, d0 │ │ vabal.u , d19, d7 │ │ - vqshl.u32 d27, d26, #18 │ │ + vabdl.u , d2, d30 │ │ vtbx.8 d24, {d18-d20}, d25 │ │ @ instruction: 0xfff389da │ │ vqrdmlsh.s q14, q1, d1[0] │ │ vtbx.8 d24, {d18-d19}, d20 │ │ vqrdmlsh.s q15, q9, d18[0] │ │ vcvt.f16.u16 , q2, #14 │ │ - vsli.32 d28, d10, #19 │ │ + vabal.u q14, d3, d14 │ │ @ instruction: 0xfff28992 │ │ @ instruction: 0xfff2f8d9 │ │ vsri.64 q14, , #14 │ │ vshll.u32 q13, d15, #19 │ │ vqshl.u32 q14, , #19 │ │ vqshl.u32 d28, d23, #18 │ │ vsri.64 q14, , #14 │ │ vqrdmlsh.s q15, , d15[0] │ │ vzip.8 d25, d28 │ │ movs r0, r0 │ │ - adds r4, r3, #4 │ │ + adds r3, r2, #4 │ │ vqshl.u64 , q8, #51 @ 0x33 │ │ - vrsra.u32 , q6, #14 │ │ - @ instruction: 0xfff33361 │ │ + vrsra.u32 , , #14 │ │ + vrsra.u32 , q4, #13 │ │ vrshr.u32 d23, d10, #13 │ │ @ instruction: 0xfff367c7 │ │ vrsubhn.i d25, , q8 │ │ vshr.u64 d29, d4, #14 │ │ vshr.u64 , q1, #13 │ │ movs r0, r0 │ │ str r0, [sp, #824] @ 0x338 │ │ @@ -274180,24 +274180,24 @@ │ │ movs r0, r0 │ │ ldrb r6, [r1, #23] │ │ movs r0, r0 │ │ ldrh r0, [r0, #60] @ 0x3c │ │ movs r0, r0 │ │ ldrb r6, [r1, #23] │ │ movs r0, r0 │ │ - stmia r2!, {r1, r6, r7} │ │ - vrshr.u64 d28, d26, #14 │ │ + stmia r2!, {r1, r2, r4, r5, r7} │ │ + vqmovn.s16 d28, q15 │ │ vqrdmlsh.s q12, q1, d20[0] │ │ movs r0, r0 │ │ ldrh r2, [r3, #58] @ 0x3a │ │ movs r0, r0 │ │ ldrb r0, [r4, #22] │ │ movs r0, r0 │ │ - add r3, sp, #960 @ 0x3c0 │ │ - vtbx.8 d26, {d18-d21}, d24 │ │ + add r3, sp, #912 @ 0x390 │ │ + @ instruction: 0xfff2abdc │ │ vcvt.u32.f32 d24, d30, #14 │ │ movs r0, r0 │ │ ldrh r2, [r6, #56] @ 0x38 │ │ movs r0, r0 │ │ ldrb r6, [r5, #21] │ │ movs r0, r0 │ │ strb r2, [r3, #1] │ │ @@ -274450,24 +274450,24 @@ │ │ movs r0, r0 │ │ ldrb r2, [r1, #13] │ │ movs r0, r0 │ │ ldrh r4, [r1, #38] @ 0x26 │ │ movs r0, r0 │ │ ldrb r2, [r1, #13] │ │ movs r0, r0 │ │ - stmia r0!, {r1, r2, r3, r4, r5} │ │ - vshr.u32 d28, d22, #14 │ │ + stmia r0!, {r1, r4, r5} │ │ + vswp d28, d26 │ │ @ instruction: 0xfff28cb0 │ │ movs r0, r0 │ │ ldrh r6, [r4, #36] @ 0x24 │ │ movs r0, r0 │ │ ldrb r4, [r3, #12] │ │ movs r0, r0 │ │ - add r1, sp, #432 @ 0x1b0 │ │ - vtbx.8 d26, {d2-d3}, d20 │ │ + add r1, sp, #384 @ 0x180 │ │ + vqrshrn.u64 d26, q4, #14 │ │ vmull.u q12, d18, d10 │ │ movs r0, r0 │ │ ldrh r6, [r7, #34] @ 0x22 │ │ movs r0, r0 │ │ ldrb r2, [r5, #11] │ │ movs r0, r0 │ │ ldr r6, [r2, #92] @ 0x5c │ │ @@ -274669,15 +274669,15 @@ │ │ add r4, pc │ │ add r1, pc │ │ mov r0, r4 │ │ blx ee0a0 │ │ mov r0, r4 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ - add r1, pc, #184 @ (adr r1, eddcc ) │ │ + add r1, pc, #136 @ (adr r1, edd9c ) │ │ vdup.16 , d27[0] │ │ vqrdmlah.s , , d20[0] │ │ movs r0, r0 │ │ ldrh r4, [r2, #22] │ │ movs r0, r0 │ │ ldrh r0, [r0, #22] │ │ movs r0, r0 │ │ @@ -274758,15 +274758,15 @@ │ │ add r4, pc │ │ add r1, pc │ │ mov r0, r4 │ │ blx ee0a0 │ │ mov r0, r4 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ - add r0, pc, #488 @ (adr r0, edfb0 ) │ │ + add r0, pc, #440 @ (adr r0, edf80 ) │ │ @ instruction: 0xfff2bbb7 │ │ @ instruction: 0xfff39db0 │ │ movs r0, r0 │ │ ldrh r0, [r4, #16] │ │ movs r0, r0 │ │ ldrh r4, [r1, #16] │ │ movs r0, r0 │ ├── readelf --wide --decompress --hex-dump=.data.rel.ro {} │ │ @@ -1,113 +1,113 @@ │ │ │ │ Hex dump of section '.data.rel.ro': │ │ 0x000ef320 20f30e00 469b0200 30800200 530a0200 ...F...0...S... │ │ - 0x000ef330 566e0100 22130200 ff780100 44800200 Vn.."....x..D... │ │ + 0x000ef330 4a6e0100 22130200 f3780100 44800200 Jn.."....x..D... │ │ 0x000ef340 c73e0200 e6480200 f6480200 34130200 .>...H...H..4... │ │ 0x000ef350 a0a60200 148b0200 048b0200 e45f0200 ............._.. │ │ - 0x000ef360 fadd0100 87fd0100 87fd0100 8cfd0100 ................ │ │ - 0x000ef370 87fd0100 a20b0200 ef760200 ef760200 .........v...v.. │ │ - 0x000ef380 e9ae0100 ef760200 04bc0100 97840100 .....v.......... │ │ - 0x000ef390 97840100 06140200 c1560100 97840100 .........V...... │ │ - 0x000ef3a0 97840100 97840100 06140200 c1560100 .............V.. │ │ + 0x000ef360 fadd0100 7efd0100 7efd0100 83fd0100 ....~...~....... │ │ + 0x000ef370 7efd0100 a20b0200 ef760200 ef760200 ~........v...v.. │ │ + 0x000ef380 e9ae0100 ef760200 04bc0100 8b840100 .....v.......... │ │ + 0x000ef390 8b840100 06140200 c1560100 8b840100 .........V...... │ │ + 0x000ef3a0 8b840100 8b840100 06140200 c1560100 .............V.. │ │ 0x000ef3b0 12bc0100 12bc0100 12bc0100 ffdd0100 ................ │ │ - 0x000ef3c0 bf8e0100 9e610200 7bde0100 a79d0100 .....a..{....... │ │ + 0x000ef3c0 b38e0100 9e610200 7bde0100 a79d0100 .....a..{....... │ │ 0x000ef3d0 08770200 85610100 4dd10100 f8a70200 .w...a..M....... │ │ - 0x000ef3e0 80610200 f8790100 5bde0100 16a60100 .a...y..[....... │ │ - 0x000ef3f0 060c0200 8d9c0200 759b0100 c17f0100 ........u....... │ │ + 0x000ef3e0 80610200 ec790100 5bde0100 16a60100 .a...y..[....... │ │ + 0x000ef3f0 060c0200 8d9c0200 759b0100 b57f0100 ........u....... │ │ 0x000ef400 885b0200 985b0200 00000000 cbdb0100 .[...[.......... │ │ 0x000ef410 51930200 fadd0100 dca50100 00000000 Q............... │ │ - 0x000ef420 78fc0100 a6b00100 fadd0100 78cb0100 x...........x... │ │ + 0x000ef420 6ffc0100 a6b00100 fadd0100 78cb0100 o...........x... │ │ 0x000ef430 03000000 cb540100 7dcb0100 fadd0100 .....T..}....... │ │ 0x000ef440 dca50100 08000000 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000000000014ca00 0000000000000008 R_X86_64_RELATIVE 13817 │ │ 000000000014ca08 0000000000000008 R_X86_64_RELATIVE 25f92 │ │ -000000000014ca10 0000000000000008 R_X86_64_RELATIVE 157c3 │ │ +000000000014ca10 0000000000000008 R_X86_64_RELATIVE 157b7 │ │ 000000000014ca20 0000000000000008 R_X86_64_RELATIVE 147eb │ │ -000000000014ca28 0000000000000008 R_X86_64_RELATIVE 16db7 │ │ -000000000014ca30 0000000000000008 R_X86_64_RELATIVE 157c3 │ │ -000000000014ca40 0000000000000008 R_X86_64_RELATIVE 1bda7 │ │ +000000000014ca28 0000000000000008 R_X86_64_RELATIVE 16dab │ │ +000000000014ca30 0000000000000008 R_X86_64_RELATIVE 157b7 │ │ +000000000014ca40 0000000000000008 R_X86_64_RELATIVE 1bd9e │ │ 000000000014ca48 0000000000000008 R_X86_64_RELATIVE 147ff │ │ -000000000014ca50 0000000000000008 R_X86_64_RELATIVE 157c3 │ │ +000000000014ca50 0000000000000008 R_X86_64_RELATIVE 157b7 │ │ 000000000014ca60 0000000000000008 R_X86_64_RELATIVE 247ac │ │ 000000000014ca68 0000000000000008 R_X86_64_RELATIVE 247c0 │ │ -000000000014ca70 0000000000000008 R_X86_64_RELATIVE 157c3 │ │ +000000000014ca70 0000000000000008 R_X86_64_RELATIVE 157b7 │ │ 000000000014ca80 0000000000000008 R_X86_64_RELATIVE 268d6 │ │ -000000000014ca88 0000000000000008 R_X86_64_RELATIVE 218d5 │ │ -000000000014ca90 0000000000000008 R_X86_64_RELATIVE 157c3 │ │ -000000000014caa0 0000000000000008 R_X86_64_RELATIVE 22704 │ │ +000000000014ca88 0000000000000008 R_X86_64_RELATIVE 218cc │ │ +000000000014ca90 0000000000000008 R_X86_64_RELATIVE 157b7 │ │ +000000000014caa0 0000000000000008 R_X86_64_RELATIVE 226fb │ │ 000000000014caa8 0000000000000008 R_X86_64_RELATIVE 281ec │ │ -000000000014cab0 0000000000000008 R_X86_64_RELATIVE 157c3 │ │ +000000000014cab0 0000000000000008 R_X86_64_RELATIVE 157b7 │ │ 000000000014cac0 0000000000000008 R_X86_64_RELATIVE 1875c │ │ 000000000014cac8 0000000000000008 R_X86_64_RELATIVE 29cb7 │ │ -000000000014cad0 0000000000000008 R_X86_64_RELATIVE 157c3 │ │ +000000000014cad0 0000000000000008 R_X86_64_RELATIVE 157b7 │ │ 000000000014cae0 0000000000000008 R_X86_64_RELATIVE 19d98 │ │ -000000000014cae8 0000000000000008 R_X86_64_RELATIVE 22489 │ │ -000000000014caf0 0000000000000008 R_X86_64_RELATIVE 157c3 │ │ -000000000014cb00 0000000000000008 R_X86_64_RELATIVE 1b210 │ │ -000000000014cb08 0000000000000008 R_X86_64_RELATIVE 16dcf │ │ -000000000014cb10 0000000000000008 R_X86_64_RELATIVE 157c3 │ │ -000000000014cb20 0000000000000008 R_X86_64_RELATIVE 1ec61 │ │ +000000000014cae8 0000000000000008 R_X86_64_RELATIVE 22480 │ │ +000000000014caf0 0000000000000008 R_X86_64_RELATIVE 157b7 │ │ +000000000014cb00 0000000000000008 R_X86_64_RELATIVE 1b207 │ │ +000000000014cb08 0000000000000008 R_X86_64_RELATIVE 16dc3 │ │ +000000000014cb10 0000000000000008 R_X86_64_RELATIVE 157b7 │ │ +000000000014cb20 0000000000000008 R_X86_64_RELATIVE 1ec58 │ │ 000000000014cb28 0000000000000008 R_X86_64_RELATIVE 1a615 │ │ 000000000014cb30 0000000000000008 R_X86_64_RELATIVE 18f3c │ │ 000000000014cb40 0000000000000008 R_X86_64_RELATIVE 274bc │ │ 000000000014cb48 0000000000000008 R_X86_64_RELATIVE 2610c │ │ 000000000014cb50 0000000000000008 R_X86_64_RELATIVE 14ca0 │ │ 000000000014cb58 0000000000000008 R_X86_64_RELATIVE 49490 │ │ 000000000014cb60 0000000000000008 R_X86_64_RELATIVE 49470 │ ├── readelf --wide --notes {} │ │ @@ -1,8 +1,8 @@ │ │ │ │ Displaying notes found in: .note.android.ident │ │ Owner Data size Description │ │ Android 0x00000084 NT_VERSION (version) description data: 18 00 00 00 72 32 37 63 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 31 32 34 37 39 30 31 38 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 │ │ │ │ Displaying notes found in: .note.gnu.build-id │ │ Owner Data size Description │ │ - GNU 0x00000014 NT_GNU_BUILD_ID (unique build ID bitstring) Build ID: 484c7b0448bf816e4f9560caf79e046baecf7226 │ │ + GNU 0x00000014 NT_GNU_BUILD_ID (unique build ID bitstring) Build ID: 13db90b8b750405423daa00894d9714b3c0ec72c │ ├── strings --all --bytes=8 {} │ │ @@ -1619,15 +1619,14 @@ │ │ gl4es_FragDepthTemp │ │ , 0., 0.) │ │ Invalid texture instruction │ │ Invalid texture ID (ID too big) │ │ gl4es_glBlendFunc │ │ glGenBuffers │ │ /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/buffers.c │ │ -Dec 8 2024 │ │ GL_TEXTURE_1D │ │ GL_TEXTURE_CUBE_MAP_NEGATIVE_Z │ │ GL_RGBA4 │ │ GL_ALPHA16F │ │ GL_UNSIGNED_SHORT_4_4_4_4_REV │ │ GL_WRITE_ONLY │ │ GL_TEXTURE9 │ │ @@ -2091,14 +2090,15 @@ │ │ No param given │ │ Too many operands │ │ gl4es_glBlendEquation │ │ warning, %s line %d function %s: gles_glClientActiveTexture is NULL │ │ glCreateShader │ │ warning, %s line %d function %s: gles_glBindBuffer is NULL │ │ v%d.%d.%d built on %s %s │ │ +Dec 10 2024 │ │ GL_READ_FRAMEBUFFER │ │ GL_RGB16F │ │ GL_TRIANGLE_STRIP │ │ GL_TEXTURE_GEN_Q │ │ GL_LIGHT0 │ │ GL_SHADER_TYPE │ │ GL_SUBTRACT │ │ @@ -2522,15 +2522,14 @@ │ │ gl_FogFragCoord = gl4es_FogFragCoordTemp.x; │ │ ), 0., 0.) │ │ Invalid texture sampler target │ │ Invalid token │ │ ARB_fog_exp │ │ warning, %s line %d function %s: gles_glBufferSubData is NULL │ │ realize_bufferIndex │ │ -19:10:48 │ │ GL_TEXTURE_RECTANGLE_ARB │ │ GL_TEXTURE_CUBE_MAP │ │ GL_PACK_ALIGNMENT │ │ GL_PACK_SKIP_PIXELS │ │ GL_TEXTURE_MAX_LEVEL │ │ GL_SRC1_RGB │ │ GL_CONSTANT │ │ @@ -3889,14 +3888,15 @@ │ │ scenecolor │ │ gl_FrontLightProduct │ │ Invalid param given │ │ warning, %s line %d function %s: gles_glDrawArrays is NULL │ │ glCompileShader │ │ glActiveTexture │ │ gl4es_glUnmapNamedBuffer │ │ +20:42:07 │ │ GL_TEXTURE_CUBE_MAP_POSITIVE_Y │ │ GL_RGBA8 │ │ GL_UNSIGNED_INT │ │ GL_UNSIGNED_INT_8_8_8_8_REV │ │ GL_ELEMENT_ARRAY_BUFFER │ │ GL_TEXTURE3 │ │ GL_MIRRORED_REPEAT_OES │ ├── readelf --wide --decompress --string-dump=.rodata {} │ │ @@ -410,516 +410,516 @@ │ │ [ 29d7] %s[%d] │ │ [ 29de] , 0., 0.) │ │ [ 29e8] Invalid texture instruction │ │ [ 2a04] Invalid texture ID (ID too big) │ │ [ 2a24] gl4es_glBlendFunc │ │ [ 2a36] glGenBuffers │ │ [ 2a43] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/buffers.c │ │ - [ 2a93] Dec 8 2024 │ │ - [ 2a9f] GL_TEXTURE_1D │ │ - [ 2aad] GL_TEXTURE_CUBE_MAP_NEGATIVE_Z │ │ - [ 2acc] GL_RGBA4 │ │ - [ 2ad5] GL_ALPHA16F │ │ - [ 2ae1] GL_UNSIGNED_SHORT_4_4_4_4_REV │ │ - [ 2aff] GL_WRITE_ONLY │ │ - [ 2b0d] GL_TEXTURE9 │ │ - [ 2b19] GL_TEXTURE12 │ │ - [ 2b26] GL_TEXTURE15 │ │ - [ 2b33] GL_PROJECTION │ │ - [ 2b41] GL_MAX_TEXTURE_IMAGE_UNITS │ │ - [ 2b5c] GL_MAX_PROGRAM_TEX_INSTRUCTIONS_ARB │ │ - [ 2b80] GL_PROGRAM_TEX_INSTRUCTIONS_ARB │ │ - [ 2ba0] EGL_BAD_ALLOC │ │ - [ 2bae] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/fog.c │ │ - [ 2bfa] LIBGL: FPE ARB Vertex program compile failed: ARB source is\n │ │ + [ 2a93] GL_TEXTURE_1D │ │ + [ 2aa1] GL_TEXTURE_CUBE_MAP_NEGATIVE_Z │ │ + [ 2ac0] GL_RGBA4 │ │ + [ 2ac9] GL_ALPHA16F │ │ + [ 2ad5] GL_UNSIGNED_SHORT_4_4_4_4_REV │ │ + [ 2af3] GL_WRITE_ONLY │ │ + [ 2b01] GL_TEXTURE9 │ │ + [ 2b0d] GL_TEXTURE12 │ │ + [ 2b1a] GL_TEXTURE15 │ │ + [ 2b27] GL_PROJECTION │ │ + [ 2b35] GL_MAX_TEXTURE_IMAGE_UNITS │ │ + [ 2b50] GL_MAX_PROGRAM_TEX_INSTRUCTIONS_ARB │ │ + [ 2b74] GL_PROGRAM_TEX_INSTRUCTIONS_ARB │ │ + [ 2b94] EGL_BAD_ALLOC │ │ + [ 2ba2] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/fog.c │ │ + [ 2bee] LIBGL: FPE ARB Vertex program compile failed: ARB source is\n │ │ %s\n │ │ =======\n │ │ GLSL source is\n │ │ %s\n │ │ Error is: %s\n │ │ - [ 2c61] _gl4es_ClipPlane[ │ │ - [ 2c73] _gl4es_Vertex_ProgramLocal_ │ │ - [ 2c8f] _gl4es_SamplerCube_ │ │ - [ 2ca3] .specular │ │ - [ 2cad] 0123456789ABCDEF │ │ - [ 2cbe] // ** Vertex Shader **\n │ │ + [ 2c55] _gl4es_ClipPlane[ │ │ + [ 2c67] _gl4es_Vertex_ProgramLocal_ │ │ + [ 2c83] _gl4es_SamplerCube_ │ │ + [ 2c97] .specular │ │ + [ 2ca1] 0123456789ABCDEF │ │ + [ 2cb2] // ** Vertex Shader **\n │ │ // ligthting=%d (twosided=%d, separate=%d, color_material=%d)\n │ │ // secondary=%d, planes=%s\n │ │ // point=%d%s\n │ │ - [ 2d3d] uniform _gl4es_LightProducts _gl4es_FrontLightProduct_%d;\n │ │ - [ 2d78] vec3 normal = normalize(gl_NormalMatrix * gl_Normal);\n │ │ - [ 2daf] + │ │ - [ 2db1] fColor.rgb = Arg0.rgb*Arg2.rgb + Arg1.rgb;\n │ │ - [ 2ddd] %s = min(%s.a, 1.0-%s.a);\n │ │ - [ 2df9] %s.rgb = %s.rgb;\n │ │ - [ 2e0c] attribute lowp vec4 _gl4es_Color;\n │ │ - [ 2e2f] glGenFramebuffersOES │ │ - [ 2e44] glGetFramebufferAttachmentParameteriv │ │ - [ 2e6a] gl4es_glClearBufferuiv │ │ - [ 2e81] glDrawTexi │ │ - [ 2e8c] glIsTexture │ │ - [ 2e98] glLightModelf │ │ - [ 2ea6] glPointSizePointerOES │ │ - [ 2ebc] glReleaseShaderCompiler │ │ - [ 2ed4] glRotatex │ │ - [ 2ede] glScissor │ │ - [ 2ee8] glUniform2i │ │ - [ 2ef4] glVertexAttrib1fv │ │ - [ 2f06] glRenderbufferStorageMultisample │ │ - [ 2f27] glBindRenderbufferEXT │ │ - [ 2f3d] glRasterPos2b │ │ - [ 2f4b] glRasterPos4b │ │ - [ 2f59] glWindowPos3b │ │ - [ 2f67] glMultiTexCoord4b │ │ - [ 2f79] glRasterPos2dv │ │ - [ 2f88] glVertex2dv │ │ - [ 2f94] glTexCoord4dv │ │ - [ 2fa2] glMultiTexCoord1dvEXT │ │ - [ 2fb8] glRasterPos2i │ │ - [ 2fc6] glColor4s │ │ - [ 2fd0] glMultiTexCoord3svEXT │ │ - [ 2fe6] glIndexubv │ │ - [ 2ff1] glWindowPos3ub │ │ - [ 3000] glTexCoord4ubv │ │ - [ 300f] glMultiTexCoord1ubARB │ │ - [ 3025] glMultiTexCoord2ubvARB │ │ - [ 303c] glTexCoord2uiv │ │ - [ 304b] glColor3us │ │ - [ 3056] glMultiTexCoord3usEXT │ │ - [ 306c] glRasterPos4fv │ │ - [ 307b] glMultiTexCoord3fARB │ │ - [ 3090] glBlendFuncSeparateARB │ │ - [ 30a7] glBlendFuncSeparateiEXT │ │ - [ 30bf] glEvalPoint1 │ │ - [ 30cc] glGetMapdv │ │ - [ 30d7] glRects │ │ - [ 30df] glRectiv │ │ - [ 30e8] glClearIndex │ │ - [ 30f5] glMatrixRotated │ │ - [ 3105] glCompressedTextureImage3D │ │ - [ 3120] glGetCompressedMultiTexImage │ │ - [ 313d] glMatrixOrthoEXT │ │ - [ 314e] glTextureSubImage1DEXT │ │ - [ 3165] glMultiTexCoordPointerEXT │ │ - [ 317f] glEnableIndexedEXT │ │ - [ 3192] glGetCompressedMultiTexImageEXT │ │ - [ 31b2] glQueryCounter │ │ - [ 31c1] glVertexAttrib1dARB │ │ - [ 31d5] glVertexAttrib4uivARB │ │ - [ 31eb] glUniform3fARB │ │ - [ 31fa] glUniform4fvARB │ │ - [ 320a] glShaderSourceEXT │ │ - [ 321c] glUniform4iEXT │ │ - [ 322b] glProgramUniform4ivEXT │ │ - [ 3242] GL_EXT_blend_func_separate │ │ - [ 325e] GL_EXT_blend_subtract │ │ - [ 3275] gl4es_glColor4f │ │ - [ 3285] gl4es_glFlush │ │ - [ 3293] stacktrace will be printed on crash\n │ │ - [ 32b8] LIBGL_BLITFB0 │ │ - [ 32c6] LIBGL_BLENDCOLOR │ │ - [ 32d7] Expose limited NPOT extension\n │ │ - [ 32f6] LIBGL_NODOWNSAMPLING │ │ - [ 330b] Don't use VAO cache\n │ │ - [ 3320] Default wrap mode is GL_CLAMP_TO_EDGE\n │ │ - [ 3347] LIBGL_SHADERNOGLES │ │ - [ 335a] .gl4es.psa-highp │ │ - [ 336b] LIBGL_EGL │ │ - [ 3375] so.2 │ │ - [ 337a] Error with ARB->GLSL conversion │ │ - [ 339a] warning, %s line %d function %s: gles_glGetProgramBinary is NULL\n │ │ - [ 33dc] gl4es_glScissor │ │ - [ 33ec] _gl4es_MultiTexCoord12 │ │ - [ 3403] mat4 │ │ - [ 3408] gl_TextureMatrix_4 │ │ - [ 341b] attribute %s %s %s;\n │ │ - [ 3430] gl_FogFragCoord │ │ - [ 3440] _gl4es_TexCoord_%d │ │ - [ 3453] uniform %s%s %s[%d];\n │ │ - [ 3469] mediump │ │ - [ 3472] _gl4es_LightModelParameters │ │ - [ 348e] _gl4es_LightSource │ │ - [ 34a1] gl_Fog │ │ - [ 34a8] gl_MaxTextureCoords │ │ - [ 34bc] _gl4es_%s_ProgramEnv │ │ - [ 34d1] gl4es_glStencilOp │ │ - [ 34e3] warning, %s line %d function %s: gles_glTexEnvx is NULL\n │ │ - [ 351c] Blend Subtract is in core, and so used\n │ │ - [ 3544] GL_EXT_frag_depth │ │ - [ 3557] + │ │ - [ 355b] gl_VertexAttrib_%s │ │ - [ 356e] front │ │ - [ 3574] material │ │ - [ 357d] %s[%s].%s │ │ - [ 3587] modelview │ │ - [ 3591] Addresses are only allowed in vertex shaders │ │ - [ 35be] Too many arguments │ │ - [ 35d1] warning, %s line %d function %s: gles_glGenBuffers is NULL\n │ │ - [ 360d] GL_INVALID_OPERATION │ │ - [ 3622] GL_TEXTURE_CUBE_MAP_POSITIVE_X │ │ - [ 3641] GL_R │ │ - [ 3646] GL_RGBA16F │ │ - [ 3651] GL_LIGHT2 │ │ - [ 365b] GL_SPOT_EXPONENT │ │ - [ 366c] GL_BOOL_VEC4 │ │ - [ 3679] GL_SAMPLER_CUBE │ │ - [ 3689] GL_DOT3_RGBA │ │ - [ 3696] GL_ALPHA_SCALE │ │ - [ 36a5] EGL_BAD_CONFIG │ │ - [ 36b4] glDrawElementsCommon │ │ - [ 36c9] source of fragment shader is \n │ │ + [ 2d31] uniform _gl4es_LightProducts _gl4es_FrontLightProduct_%d;\n │ │ + [ 2d6c] vec3 normal = normalize(gl_NormalMatrix * gl_Normal);\n │ │ + [ 2da3] + │ │ + [ 2da5] fColor.rgb = Arg0.rgb*Arg2.rgb + Arg1.rgb;\n │ │ + [ 2dd1] %s = min(%s.a, 1.0-%s.a);\n │ │ + [ 2ded] %s.rgb = %s.rgb;\n │ │ + [ 2e00] attribute lowp vec4 _gl4es_Color;\n │ │ + [ 2e23] glGenFramebuffersOES │ │ + [ 2e38] glGetFramebufferAttachmentParameteriv │ │ + [ 2e5e] gl4es_glClearBufferuiv │ │ + [ 2e75] glDrawTexi │ │ + [ 2e80] glIsTexture │ │ + [ 2e8c] glLightModelf │ │ + [ 2e9a] glPointSizePointerOES │ │ + [ 2eb0] glReleaseShaderCompiler │ │ + [ 2ec8] glRotatex │ │ + [ 2ed2] glScissor │ │ + [ 2edc] glUniform2i │ │ + [ 2ee8] glVertexAttrib1fv │ │ + [ 2efa] glRenderbufferStorageMultisample │ │ + [ 2f1b] glBindRenderbufferEXT │ │ + [ 2f31] glRasterPos2b │ │ + [ 2f3f] glRasterPos4b │ │ + [ 2f4d] glWindowPos3b │ │ + [ 2f5b] glMultiTexCoord4b │ │ + [ 2f6d] glRasterPos2dv │ │ + [ 2f7c] glVertex2dv │ │ + [ 2f88] glTexCoord4dv │ │ + [ 2f96] glMultiTexCoord1dvEXT │ │ + [ 2fac] glRasterPos2i │ │ + [ 2fba] glColor4s │ │ + [ 2fc4] glMultiTexCoord3svEXT │ │ + [ 2fda] glIndexubv │ │ + [ 2fe5] glWindowPos3ub │ │ + [ 2ff4] glTexCoord4ubv │ │ + [ 3003] glMultiTexCoord1ubARB │ │ + [ 3019] glMultiTexCoord2ubvARB │ │ + [ 3030] glTexCoord2uiv │ │ + [ 303f] glColor3us │ │ + [ 304a] glMultiTexCoord3usEXT │ │ + [ 3060] glRasterPos4fv │ │ + [ 306f] glMultiTexCoord3fARB │ │ + [ 3084] glBlendFuncSeparateARB │ │ + [ 309b] glBlendFuncSeparateiEXT │ │ + [ 30b3] glEvalPoint1 │ │ + [ 30c0] glGetMapdv │ │ + [ 30cb] glRects │ │ + [ 30d3] glRectiv │ │ + [ 30dc] glClearIndex │ │ + [ 30e9] glMatrixRotated │ │ + [ 30f9] glCompressedTextureImage3D │ │ + [ 3114] glGetCompressedMultiTexImage │ │ + [ 3131] glMatrixOrthoEXT │ │ + [ 3142] glTextureSubImage1DEXT │ │ + [ 3159] glMultiTexCoordPointerEXT │ │ + [ 3173] glEnableIndexedEXT │ │ + [ 3186] glGetCompressedMultiTexImageEXT │ │ + [ 31a6] glQueryCounter │ │ + [ 31b5] glVertexAttrib1dARB │ │ + [ 31c9] glVertexAttrib4uivARB │ │ + [ 31df] glUniform3fARB │ │ + [ 31ee] glUniform4fvARB │ │ + [ 31fe] glShaderSourceEXT │ │ + [ 3210] glUniform4iEXT │ │ + [ 321f] glProgramUniform4ivEXT │ │ + [ 3236] GL_EXT_blend_func_separate │ │ + [ 3252] GL_EXT_blend_subtract │ │ + [ 3269] gl4es_glColor4f │ │ + [ 3279] gl4es_glFlush │ │ + [ 3287] stacktrace will be printed on crash\n │ │ + [ 32ac] LIBGL_BLITFB0 │ │ + [ 32ba] LIBGL_BLENDCOLOR │ │ + [ 32cb] Expose limited NPOT extension\n │ │ + [ 32ea] LIBGL_NODOWNSAMPLING │ │ + [ 32ff] Don't use VAO cache\n │ │ + [ 3314] Default wrap mode is GL_CLAMP_TO_EDGE\n │ │ + [ 333b] LIBGL_SHADERNOGLES │ │ + [ 334e] .gl4es.psa-highp │ │ + [ 335f] LIBGL_EGL │ │ + [ 3369] so.2 │ │ + [ 336e] Error with ARB->GLSL conversion │ │ + [ 338e] warning, %s line %d function %s: gles_glGetProgramBinary is NULL\n │ │ + [ 33d0] gl4es_glScissor │ │ + [ 33e0] _gl4es_MultiTexCoord12 │ │ + [ 33f7] mat4 │ │ + [ 33fc] gl_TextureMatrix_4 │ │ + [ 340f] attribute %s %s %s;\n │ │ + [ 3424] gl_FogFragCoord │ │ + [ 3434] _gl4es_TexCoord_%d │ │ + [ 3447] uniform %s%s %s[%d];\n │ │ + [ 345d] mediump │ │ + [ 3466] _gl4es_LightModelParameters │ │ + [ 3482] _gl4es_LightSource │ │ + [ 3495] gl_Fog │ │ + [ 349c] gl_MaxTextureCoords │ │ + [ 34b0] _gl4es_%s_ProgramEnv │ │ + [ 34c5] gl4es_glStencilOp │ │ + [ 34d7] warning, %s line %d function %s: gles_glTexEnvx is NULL\n │ │ + [ 3510] Blend Subtract is in core, and so used\n │ │ + [ 3538] GL_EXT_frag_depth │ │ + [ 354b] + │ │ + [ 354f] gl_VertexAttrib_%s │ │ + [ 3562] front │ │ + [ 3568] material │ │ + [ 3571] %s[%s].%s │ │ + [ 357b] modelview │ │ + [ 3585] Addresses are only allowed in vertex shaders │ │ + [ 35b2] Too many arguments │ │ + [ 35c5] warning, %s line %d function %s: gles_glGenBuffers is NULL\n │ │ + [ 3601] GL_INVALID_OPERATION │ │ + [ 3616] GL_TEXTURE_CUBE_MAP_POSITIVE_X │ │ + [ 3635] GL_R │ │ + [ 363a] GL_RGBA16F │ │ + [ 3645] GL_LIGHT2 │ │ + [ 364f] GL_SPOT_EXPONENT │ │ + [ 3660] GL_BOOL_VEC4 │ │ + [ 366d] GL_SAMPLER_CUBE │ │ + [ 367d] GL_DOT3_RGBA │ │ + [ 368a] GL_ALPHA_SCALE │ │ + [ 3699] EGL_BAD_CONFIG │ │ + [ 36a8] glDrawElementsCommon │ │ + [ 36bd] source of fragment shader is \n │ │ %s\n │ │ Error is: %s\n │ │ - [ 36f9] wb │ │ - [ 36fc] uniform highp float _gl4es_FrontMaterial_shininess;\n │ │ - [ 3731] Color = %s;\n │ │ - [ 373e] BackColor = gl_BackLightModelProduct.sceneColor;\n │ │ - [ 3770] back_aa = %s.xyz * _gl4es_LightSource_%d.ambient.xyz;\n │ │ - [ 37a7] ss = (nVP>0. && lVP>0.)?(%s%d.specular.xyz):vec3(0.);\n │ │ - [ 37de] SecBackColor.rgb = clamp(SecBackColor.rgb, 0., 1.);\n │ │ - [ 3813] uniform vec4 _gl4es_ObjectPlane%c_%d;\n │ │ - [ 383a] Arg%d.rgb = %s.rgb;\n │ │ - [ 384f] fColor.rgb = mix(gl_Fog.color.rgb, fColor.rgb, FogF);\n │ │ - [ 3886] %s = _gl4es_BlendColor;\n │ │ - [ 38a0] %s = _gl4es_BlendColor.a;\n │ │ - [ 38bc] %s.a = min(%s.a, 1.0-%s.a);\n │ │ - [ 38da] glDeleteFramebuffers │ │ - [ 38ef] glClearDepthx │ │ - [ 38fd] glDeleteProgram │ │ - [ 390d] glGetPointerv │ │ - [ 391b] glIsBuffer │ │ - [ 3926] glLineWidthx │ │ - [ 3933] glShaderBinary │ │ - [ 3942] glMapBuffer │ │ - [ 394e] glUnmapBuffer │ │ - [ 395c] glUnmapNamedBuffer │ │ - [ 396f] glRenderbufferStorageARB │ │ - [ 3988] glIsRenderbufferARB │ │ - [ 399c] glClearBufferfv │ │ - [ 39ac] glGetPointervEXT │ │ - [ 39bd] glColor3bv │ │ - [ 39c8] glTexCoord3bv │ │ - [ 39d6] glMultiTexCoord1b │ │ - [ 39e8] glMultiTexCoord3bv │ │ - [ 39fb] glColor3iv │ │ - [ 3a06] glTexCoord4iv │ │ - [ 3a14] glMultiTexCoord3iEXT │ │ - [ 3a29] glIndexs │ │ - [ 3a32] glMultiTexCoord3sARB │ │ - [ 3a47] glIndexub │ │ - [ 3a51] glMultiTexCoord1ubvARB │ │ - [ 3a68] glRasterPos2us │ │ - [ 3a77] glTexCoord4us │ │ - [ 3a85] glRasterPos4f │ │ - [ 3a93] glMultiTexCoord1fv │ │ - [ 3aa6] glMultTransposeMatrixf │ │ - [ 3abd] glAccum │ │ - [ 3ac5] glGetPixelMapfv │ │ - [ 3ad5] glMultiDrawElementsEXT │ │ - [ 3aec] glMatrixTranslated │ │ - [ 3aff] glGetMultiTexEnvfv │ │ - [ 3b12] glCompressedMultiTexImage2D │ │ - [ 3b2e] glCompressedMultiTexImage1D │ │ - [ 3b4a] glMatrixRotatedEXT │ │ - [ 3b5d] glMatrixScaledEXT │ │ - [ 3b6f] glMultiTexImage2DEXT │ │ - [ 3b84] glSampleCoverageARB │ │ - [ 3b98] glVertexAttrib4NbvARB │ │ - [ 3bae] glProgramUniformMatrix2fv │ │ - [ 3bc8] glIsProgramEXT │ │ - [ 3bd7] glUniform4fEXT │ │ - [ 3be6] glProgramUniform3ivEXT │ │ - [ 3bfd] glDrawElementsInstancedBaseVertexEXT │ │ - [ 3c22] glSamplerParameterIiv │ │ - [ 3c38] glGetSamplerParameterIiv │ │ - [ 3c51] GL_EXT_blend_equation_separate │ │ - [ 3c71] ptitSeb │ │ - [ 3c79] GL4ES wrapper │ │ - [ 3c87] warning, %s line %d function %s: gles_glColor4f is NULL\n │ │ - [ 3cc0] warning, %s line %d function %s: gles_glAlphaFunc is NULL\n │ │ - [ 3cfb] free_framebuffer │ │ - [ 3d0c] Main FBO has no alpha channel\n │ │ - [ 3d2b] LIBGL_NODEPTHTEX │ │ - [ 3d3c] Texture shrink, mode 9 selected (advertise 8192 max texture size, but >4096 are quadshrinked and > 512 are shrinked), but not for empty textures\n │ │ - [ 3dce] LIBGL_POTFRAMEBUFFER │ │ - [ 3de3] LIBGL_BATCH │ │ - [ 3def] Vertex │ │ - [ 3df8] LIBGL_GLXNATIVE │ │ - [ 3e08] Don't use PrecompiledShaderArchive\n │ │ - [ 3e2c] ARX_DATA_PATH │ │ - [ 3e3a] /opt/vc/lib/ │ │ - [ 3e47] Error with GLSL->GLSL:ES conversion │ │ - [ 3e6b] No Shader support with current backend │ │ - [ 3e92] gl_TextureMatrix_1 │ │ - [ 3ea5] gl_FogParameters │ │ - [ 3eb6] _gl4es_EyePlaneQ │ │ - [ 3ec7] struct gl_MaterialParameters\n │ │ + [ 36ed] wb │ │ + [ 36f0] uniform highp float _gl4es_FrontMaterial_shininess;\n │ │ + [ 3725] Color = %s;\n │ │ + [ 3732] BackColor = gl_BackLightModelProduct.sceneColor;\n │ │ + [ 3764] back_aa = %s.xyz * _gl4es_LightSource_%d.ambient.xyz;\n │ │ + [ 379b] ss = (nVP>0. && lVP>0.)?(%s%d.specular.xyz):vec3(0.);\n │ │ + [ 37d2] SecBackColor.rgb = clamp(SecBackColor.rgb, 0., 1.);\n │ │ + [ 3807] uniform vec4 _gl4es_ObjectPlane%c_%d;\n │ │ + [ 382e] Arg%d.rgb = %s.rgb;\n │ │ + [ 3843] fColor.rgb = mix(gl_Fog.color.rgb, fColor.rgb, FogF);\n │ │ + [ 387a] %s = _gl4es_BlendColor;\n │ │ + [ 3894] %s = _gl4es_BlendColor.a;\n │ │ + [ 38b0] %s.a = min(%s.a, 1.0-%s.a);\n │ │ + [ 38ce] glDeleteFramebuffers │ │ + [ 38e3] glClearDepthx │ │ + [ 38f1] glDeleteProgram │ │ + [ 3901] glGetPointerv │ │ + [ 390f] glIsBuffer │ │ + [ 391a] glLineWidthx │ │ + [ 3927] glShaderBinary │ │ + [ 3936] glMapBuffer │ │ + [ 3942] glUnmapBuffer │ │ + [ 3950] glUnmapNamedBuffer │ │ + [ 3963] glRenderbufferStorageARB │ │ + [ 397c] glIsRenderbufferARB │ │ + [ 3990] glClearBufferfv │ │ + [ 39a0] glGetPointervEXT │ │ + [ 39b1] glColor3bv │ │ + [ 39bc] glTexCoord3bv │ │ + [ 39ca] glMultiTexCoord1b │ │ + [ 39dc] glMultiTexCoord3bv │ │ + [ 39ef] glColor3iv │ │ + [ 39fa] glTexCoord4iv │ │ + [ 3a08] glMultiTexCoord3iEXT │ │ + [ 3a1d] glIndexs │ │ + [ 3a26] glMultiTexCoord3sARB │ │ + [ 3a3b] glIndexub │ │ + [ 3a45] glMultiTexCoord1ubvARB │ │ + [ 3a5c] glRasterPos2us │ │ + [ 3a6b] glTexCoord4us │ │ + [ 3a79] glRasterPos4f │ │ + [ 3a87] glMultiTexCoord1fv │ │ + [ 3a9a] glMultTransposeMatrixf │ │ + [ 3ab1] glAccum │ │ + [ 3ab9] glGetPixelMapfv │ │ + [ 3ac9] glMultiDrawElementsEXT │ │ + [ 3ae0] glMatrixTranslated │ │ + [ 3af3] glGetMultiTexEnvfv │ │ + [ 3b06] glCompressedMultiTexImage2D │ │ + [ 3b22] glCompressedMultiTexImage1D │ │ + [ 3b3e] glMatrixRotatedEXT │ │ + [ 3b51] glMatrixScaledEXT │ │ + [ 3b63] glMultiTexImage2DEXT │ │ + [ 3b78] glSampleCoverageARB │ │ + [ 3b8c] glVertexAttrib4NbvARB │ │ + [ 3ba2] glProgramUniformMatrix2fv │ │ + [ 3bbc] glIsProgramEXT │ │ + [ 3bcb] glUniform4fEXT │ │ + [ 3bda] glProgramUniform3ivEXT │ │ + [ 3bf1] glDrawElementsInstancedBaseVertexEXT │ │ + [ 3c16] glSamplerParameterIiv │ │ + [ 3c2c] glGetSamplerParameterIiv │ │ + [ 3c45] GL_EXT_blend_equation_separate │ │ + [ 3c65] ptitSeb │ │ + [ 3c6d] GL4ES wrapper │ │ + [ 3c7b] warning, %s line %d function %s: gles_glColor4f is NULL\n │ │ + [ 3cb4] warning, %s line %d function %s: gles_glAlphaFunc is NULL\n │ │ + [ 3cef] free_framebuffer │ │ + [ 3d00] Main FBO has no alpha channel\n │ │ + [ 3d1f] LIBGL_NODEPTHTEX │ │ + [ 3d30] Texture shrink, mode 9 selected (advertise 8192 max texture size, but >4096 are quadshrinked and > 512 are shrinked), but not for empty textures\n │ │ + [ 3dc2] LIBGL_POTFRAMEBUFFER │ │ + [ 3dd7] LIBGL_BATCH │ │ + [ 3de3] Vertex │ │ + [ 3dec] LIBGL_GLXNATIVE │ │ + [ 3dfc] Don't use PrecompiledShaderArchive\n │ │ + [ 3e20] ARX_DATA_PATH │ │ + [ 3e2e] /opt/vc/lib/ │ │ + [ 3e3b] Error with GLSL->GLSL:ES conversion │ │ + [ 3e5f] No Shader support with current backend │ │ + [ 3e86] gl_TextureMatrix_1 │ │ + [ 3e99] gl_FogParameters │ │ + [ 3eaa] _gl4es_EyePlaneQ │ │ + [ 3ebb] struct gl_MaterialParameters\n │ │ {\n │ │ vec4 emission;\n │ │ vec4 ambient;\n │ │ vec4 diffuse;\n │ │ vec4 specular;\n │ │ float shininess;\n │ │ };\n │ │ uniform gl_MaterialParameters gl_FrontMaterial;\n │ │ uniform gl_MaterialParameters gl_BackMaterial;\n │ │ - [ 3fa3] uniform vec4 gl_EyePlaneR[gl_MaxTextureCoords];\n │ │ - [ 3fd4] uniform vec4 gl_EyePlaneQ[gl_MaxTextureCoords];\n │ │ - [ 4005] gl4es_glBindTexture │ │ - [ 4019] warning, %s line %d function %s: gles_glPointParameterxv is NULL\n │ │ - [ 405b] warning, %s line %d function %s: gles_glTexParameterxv is NULL\n │ │ - [ 409b] glColorTable │ │ - [ 40a8] GetHardwareExtensions │ │ - [ 40be] warning, %s line %d function %s: egl_eglDestroySurface is NULL\n │ │ - [ 40fe] FBO are in core, and so used\n │ │ - [ 411c] , │ │ - [ 411f] ), 1.) │ │ - [ 4126] , 0.0), ( │ │ - [ 4130] lightprod │ │ - [ 413a] local │ │ - [ 4140] OPTION │ │ - [ 4147] Unknown error │ │ - [ 4155] Unknown error (unintended fallthrough?) │ │ - [ 417d] glBlendEquationSeparate │ │ - [ 4195] glShaderSource │ │ - [ 41a4] Failed to produce blit vertex shader.\n │ │ + [ 3f97] uniform vec4 gl_EyePlaneR[gl_MaxTextureCoords];\n │ │ + [ 3fc8] uniform vec4 gl_EyePlaneQ[gl_MaxTextureCoords];\n │ │ + [ 3ff9] gl4es_glBindTexture │ │ + [ 400d] warning, %s line %d function %s: gles_glPointParameterxv is NULL\n │ │ + [ 404f] warning, %s line %d function %s: gles_glTexParameterxv is NULL\n │ │ + [ 408f] glColorTable │ │ + [ 409c] GetHardwareExtensions │ │ + [ 40b2] warning, %s line %d function %s: egl_eglDestroySurface is NULL\n │ │ + [ 40f2] FBO are in core, and so used\n │ │ + [ 4110] , │ │ + [ 4113] ), 1.) │ │ + [ 411a] , 0.0), ( │ │ + [ 4124] lightprod │ │ + [ 412e] local │ │ + [ 4134] OPTION │ │ + [ 413b] Unknown error │ │ + [ 4149] Unknown error (unintended fallthrough?) │ │ + [ 4171] glBlendEquationSeparate │ │ + [ 4189] glShaderSource │ │ + [ 4198] Failed to produce blit vertex shader.\n │ │ %s │ │ - [ 41cd] gl4es_glBufferData │ │ - [ 41e0] unboundBuffers │ │ - [ 41ef] GL_RGB │ │ - [ 41f6] GL_ALPHA │ │ - [ 41ff] GL_LUMINANCE16 │ │ - [ 420e] GL_COLOR_ATTACHMENT1 │ │ - [ 4223] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/debug.c │ │ - [ 4271] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/depth.c │ │ - [ 42bf] custom:\n │ │ - [ 42c8] LIBGL: FPE Custom Program link failed: %s\n │ │ - [ 42f3] glEnableClientState │ │ - [ 4307] .sizeMax │ │ - [ 4310] texture2D │ │ - [ 431a] aa = %s.xyz * _gl4es_LightSource_%d.ambient.xyz;\n │ │ - [ 434c] %s = (_gl4es_TextureMatrix_%d * %s);\n │ │ - [ 4372] FogSrc = vertex.z;\n │ │ - [ 4386] fColor = vec4(4.*((Arg0.r-0.5)*(Arg1.r-0.5)+(Arg0.g-0.5)*(Arg1.g-0.5)+(Arg0.b-0.5)*(Arg1.b-0.5)));\n │ │ - [ 43ea] // Fog On: mode=%X, source=%X\n │ │ - [ 4409] //Blend: src=%d/%d, dst=%d/%d, eq=%d/%d\n │ │ - [ 4432] glGenFramebuffers │ │ - [ 4444] gl4es_glGenerateMipmap │ │ - [ 445b] glFogCoordPointer │ │ - [ 446d] glStencilFunc │ │ - [ 447b] glStencilMaskSeparate │ │ - [ 4491] glUniform2iv │ │ - [ 449e] glGetNamedBufferPointervEXT │ │ - [ 44ba] glDeleteFramebuffersEXT │ │ - [ 44d2] glFramebufferTexture2DEXT │ │ - [ 44ec] glFramebufferRenderbufferEXT │ │ - [ 4509] glDeleteFramebuffersARB │ │ - [ 4521] glClearBufferuiv │ │ - [ 4532] glArrayElementEXT │ │ - [ 4544] glSecondaryColor3bvEXT │ │ - [ 455b] glMultiTexCoord2dv │ │ - [ 456e] glMultiTexCoord4ivEXT │ │ - [ 4584] glMultiTexCoord2svARB │ │ - [ 459a] glMultiTexCoord3ubv │ │ - [ 45ae] glVertex3ui │ │ - [ 45ba] glTexCoord3uiv │ │ - [ 45c9] glMultiTexCoord2uiv │ │ - [ 45dd] glMultiTexCoord2uivARB │ │ - [ 45f4] glIndexusv │ │ - [ 45ff] glVertex2us │ │ - [ 460b] glMultiTexCoord1usv │ │ - [ 461f] glRasterPos3fv │ │ - [ 462e] glWindowPos2f │ │ - [ 463c] glVertex3fv │ │ - [ 4648] glVertex4fv │ │ - [ 4654] glDrawRangeElementsEXT │ │ - [ 466b] glPushName │ │ - [ 4676] glTexSubImage3D │ │ - [ 4686] GL4ES stub: %s\n │ │ - [ 4696] glFeedbackBuffer │ │ - [ 46a7] glMatrixFrustum │ │ - [ 46b7] glMultiTexImage2D │ │ - [ 46c9] glCopyMultiTexImage1D │ │ - [ 46df] glEnableClientStateIndexed │ │ - [ 46fa] glCompressedMultiTexSubImage1D │ │ - [ 4719] glCopyTextureImage1DEXT │ │ - [ 4731] glMultiTexImage1DEXT │ │ - [ 4746] glDisableVertexArrayEXT │ │ - [ 475e] glGetQueryObjectuiv │ │ - [ 4772] glVertexAttrib4Niv │ │ - [ 4785] glVertexAttrib2dARB │ │ - [ 4799] glVertexAttrib4ubvARB │ │ - [ 47af] glCompileShaderARB │ │ - [ 47c2] glProgramUniform2f │ │ - [ 47d5] glUniform2fvEXT │ │ - [ 47e5] glUniform2iEXT │ │ - [ 47f4] glVertexAttrib3fvEXT │ │ - [ 4809] glVertexAttrib4fEXT │ │ - [ 481d] glIsProgramARB │ │ - [ 482c] 1.10 via gl4es │ │ - [ 483b] gl4es_glAlphaFunc │ │ - [ 484d] warning, %s line %d function %s: gles_glClear is NULL\n │ │ - [ 4884] Initialising gl4es\n │ │ - [ 4898] LIBGL_DRMCARD │ │ - [ 48a6] Export GL_ARB_vertex_array_bgra extension\n │ │ - [ 48d1] NPOT texture handled in hardware\n │ │ - [ 48f3] warning, %s line %d function %s: gles_glLightModelfv is NULL\n │ │ - [ 4931] warning, %s line %d function %s: gles_glMaterialfv is NULL\n │ │ - [ 496d] LIBGL: Unsupported source data type: %s\n │ │ - [ 4996] glProgramBinaryOES │ │ - [ 49a9] gl4es_glViewport │ │ - [ 49ba] gl_MultiTexCoord7 │ │ - [ 49cc] _gl4es_TModelViewMatrix │ │ - [ 49e4] gl_TextureMatrix_3 │ │ - [ 49f7] _gl4es_TextureMatrix_12 │ │ - [ 4a0f] _gl4es_TextureMatrix │ │ - [ 4a25] //precision │ │ - [ 4a31] textureCubeLodEXT │ │ - [ 4a43] _gl4es_texture2DProjGrad │ │ - [ 4a5c] textureCubeGradEXT │ │ - [ 4a6f] transpose^I │ │ - [ 4a7a] gl_BackLightModelProduct │ │ - [ 4a93] warning, %s line %d function %s: gles_glClearStencil is NULL\n │ │ - [ 4ad1] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/texgen.c │ │ - [ 4b20] warning, %s line %d function %s: gles_glCompressedTexSubImage2D is NULL\n │ │ - [ 4b69] gl4es_glClearColor │ │ - [ 4b7c] warning, %s line %d function %s: gles_glFogxv is NULL\n │ │ - [ 4bb3] gl4es_glFogxv │ │ - [ 4bc1] gl4es_glLightModelx │ │ - [ 4bd5] and used\n │ │ - [ 4be0] : │ │ - [ 4be5] if (( │ │ - [ 4beb] gl_ModelViewMatrixTranspose │ │ - [ 4c07] 0.0 │ │ - [ 4c0b] Invalid value (implicit param?) │ │ - [ 4c2b] glBlendEquationOES │ │ - [ 4c3e] GL_TEXTURE_CUBE_MAP_NEGATIVE_X │ │ - [ 4c5d] GL_TEXTURE_CUBE_MAP_POSITIVE_Z │ │ - [ 4c7c] GL_RGB5_A1 │ │ - [ 4c87] GL_DOUBLE │ │ - [ 4c91] GL_COLOR_ATTACHMENT2 │ │ - [ 4ca6] GL_EYE_LINEAR │ │ - [ 4cb4] GL_ACTIVE_UNIFORMS │ │ - [ 4cc7] GL_NUM_PROGRAM_BINARY_FORMATS │ │ - [ 4ce5] gl4es_glDepthRangef │ │ - [ 4cf9] warning, %s line %d function %s: gles_glEnableClientState is NULL\n │ │ - [ 4d3c] warning, %s line %d function %s: gles_glDisableClientState is NULL\n │ │ - [ 4d80] fpe_glDrawElementsInstanced │ │ - [ 4d9c] samplerStreamIMG │ │ - [ 4dad] vec4(0.0) │ │ - [ 4db7] uniform highp vec4 _gl4es_ClipPlane_%d;\n │ │ - [ 4de0] highp float att;\n │ │ - [ 4df2] // light %d on, light_direction=%d, light_cutoff180=%d\n │ │ - [ 4e2a] SecBackColor.rgb += att*(back_ss);\n │ │ - [ 4e4e] // end of light %d\n │ │ - [ 4e62] Color.rgb = clamp(Color.rgb, 0., 1.);\n │ │ - [ 4e89] npot adjusted │ │ - [ 4e97] fColor = Arg0;\n │ │ - [ 4ea7] fColor.a = Arg0.a*Arg1.a + Arg2.a*Arg3.a - 0.5;\n │ │ - [ 4ed8] lowp float %s;\n │ │ - [ 4ee8] %s.rgb = vec3(0.0);\n │ │ - [ 4efe] %s.a = %s.a;\n │ │ - [ 4f0d] glFramebufferRenderbufferOES │ │ - [ 4f2a] glGetShaderPrecisionFormat │ │ - [ 4f45] glGetVertexAttribPointerv │ │ - [ 4f5f] glProgramBinary │ │ - [ 4f6f] glVertexAttrib2f │ │ - [ 4f80] glColorMaskIndexedEXT │ │ - [ 4f96] glVertex4dv │ │ - [ 4fa2] glMultiTexCoord3i │ │ - [ 4fb4] glMultiTexCoord1iARB │ │ - [ 4fc9] glWindowPos3sv │ │ - [ 4fd8] glTexCoord2s │ │ - [ 4fe5] glMultiTexCoord2sEXT │ │ - [ 4ffa] glMultiTexCoord4sARB │ │ - [ 500f] glSecondaryColor3ub │ │ - [ 5023] glNormal3ub │ │ - [ 502f] glVertex3ub │ │ - [ 503b] glWindowPos2uiv │ │ - [ 504b] glTexCoord2us │ │ - [ 5059] glRasterPos2fv │ │ - [ 5068] glBlendFuncSeparatei │ │ - [ 507d] glGenLists │ │ - [ 5088] glListBase │ │ - [ 5093] glLoadName │ │ - [ 509e] glMapGrid2f │ │ - [ 50aa] glCompressedTexImage3DEXT │ │ - [ 50c4] glMultiTexEnvfv │ │ - [ 50d4] glCompressedTextureImage1D │ │ - [ 50ef] glGetTextureLevelParameterfvEXT │ │ - [ 510f] glVertexAttrib2sEXT │ │ - [ 5123] glVertexAttrib2d │ │ - [ 5134] glVertexAttrib3d │ │ - [ 5145] glVertexAttrib1svEXT │ │ - [ 515a] glVertexAttrib1dvARB │ │ - [ 516f] glVertexAttrib3fvARB │ │ - [ 5184] glProgramUniform1iv │ │ - [ 5198] glGetProgramivEXT │ │ - [ 51aa] glVertexAttrib1fEXT │ │ - [ 51be] glProgramUniform1fvEXT │ │ - [ 51d5] glDrawElementsInstancedBaseVertex │ │ - [ 51f7] glUniformMatrix4x2fv │ │ - [ 520c] glProgramEnvParameter4fARB │ │ - [ 5227] glProgramLocalParameters4fvEXT │ │ - [ 5246] glGetSamplerParameterIuiv │ │ - [ 5260] warning, %s line %d function %s: gles_glGetString is NULL\n │ │ - [ 529b] gl4es_glGetIntegerv │ │ - [ 52af] Texture shrink, mode 3 selected (only > 256 /2 )\n │ │ - [ 52e1] Texture shrink, mode 5 selected (every > 256 is downscaled to 256 ), but not for empty textures\n │ │ - [ 5342] Expose GL_ARB_texture_non_power_of_two extension\n │ │ - [ 5374] No downsampling of DXTc textures\n │ │ - [ 5396] LIBGL_FORCENPOT │ │ - [ 53a6] Trying to batch subsequent glDrawXXXX of size between %d and %d vertices\n │ │ - [ 53f0] glX Will NOT try to recycle EGL Surface\n │ │ - [ 5419] LIBGL_SKIPTEXCOPIES │ │ - [ 542d] gl4es_glMaterialfv │ │ - [ 5440] warning, %s line %d function %s: gles_glPointParameterfv is NULL\n │ │ - [ 5482] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/pointsprite.c │ │ - [ 54d6] pushViewport │ │ - [ 54e3] _gl4es_ModelViewMatrix │ │ - [ 54fa] _gl4es_ITModelViewProjectionMatrix │ │ - [ 551d] gl_TextureMatrix_5 │ │ - [ 5530] (FPEShader generated) │ │ - [ 5547] mediump │ │ - [ 554f] gl_LightSourceParameters │ │ - [ 5568] _gl4es_FrontLightProduct │ │ - [ 5581] gl_NormalScale │ │ - [ 5590] _gl4es_MaxTextureCoords │ │ - [ 55a8] Fragment │ │ - [ 55b1] vec4 _gl4es_texture2DGrad(sampler2D sampler, vec2 coord, vec2 dPdx, vec2 dPdy) {\n │ │ + [ 41c1] gl4es_glBufferData │ │ + [ 41d4] unboundBuffers │ │ + [ 41e3] GL_RGB │ │ + [ 41ea] GL_ALPHA │ │ + [ 41f3] GL_LUMINANCE16 │ │ + [ 4202] GL_COLOR_ATTACHMENT1 │ │ + [ 4217] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/debug.c │ │ + [ 4265] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/depth.c │ │ + [ 42b3] custom:\n │ │ + [ 42bc] LIBGL: FPE Custom Program link failed: %s\n │ │ + [ 42e7] glEnableClientState │ │ + [ 42fb] .sizeMax │ │ + [ 4304] texture2D │ │ + [ 430e] aa = %s.xyz * _gl4es_LightSource_%d.ambient.xyz;\n │ │ + [ 4340] %s = (_gl4es_TextureMatrix_%d * %s);\n │ │ + [ 4366] FogSrc = vertex.z;\n │ │ + [ 437a] fColor = vec4(4.*((Arg0.r-0.5)*(Arg1.r-0.5)+(Arg0.g-0.5)*(Arg1.g-0.5)+(Arg0.b-0.5)*(Arg1.b-0.5)));\n │ │ + [ 43de] // Fog On: mode=%X, source=%X\n │ │ + [ 43fd] //Blend: src=%d/%d, dst=%d/%d, eq=%d/%d\n │ │ + [ 4426] glGenFramebuffers │ │ + [ 4438] gl4es_glGenerateMipmap │ │ + [ 444f] glFogCoordPointer │ │ + [ 4461] glStencilFunc │ │ + [ 446f] glStencilMaskSeparate │ │ + [ 4485] glUniform2iv │ │ + [ 4492] glGetNamedBufferPointervEXT │ │ + [ 44ae] glDeleteFramebuffersEXT │ │ + [ 44c6] glFramebufferTexture2DEXT │ │ + [ 44e0] glFramebufferRenderbufferEXT │ │ + [ 44fd] glDeleteFramebuffersARB │ │ + [ 4515] glClearBufferuiv │ │ + [ 4526] glArrayElementEXT │ │ + [ 4538] glSecondaryColor3bvEXT │ │ + [ 454f] glMultiTexCoord2dv │ │ + [ 4562] glMultiTexCoord4ivEXT │ │ + [ 4578] glMultiTexCoord2svARB │ │ + [ 458e] glMultiTexCoord3ubv │ │ + [ 45a2] glVertex3ui │ │ + [ 45ae] glTexCoord3uiv │ │ + [ 45bd] glMultiTexCoord2uiv │ │ + [ 45d1] glMultiTexCoord2uivARB │ │ + [ 45e8] glIndexusv │ │ + [ 45f3] glVertex2us │ │ + [ 45ff] glMultiTexCoord1usv │ │ + [ 4613] glRasterPos3fv │ │ + [ 4622] glWindowPos2f │ │ + [ 4630] glVertex3fv │ │ + [ 463c] glVertex4fv │ │ + [ 4648] glDrawRangeElementsEXT │ │ + [ 465f] glPushName │ │ + [ 466a] glTexSubImage3D │ │ + [ 467a] GL4ES stub: %s\n │ │ + [ 468a] glFeedbackBuffer │ │ + [ 469b] glMatrixFrustum │ │ + [ 46ab] glMultiTexImage2D │ │ + [ 46bd] glCopyMultiTexImage1D │ │ + [ 46d3] glEnableClientStateIndexed │ │ + [ 46ee] glCompressedMultiTexSubImage1D │ │ + [ 470d] glCopyTextureImage1DEXT │ │ + [ 4725] glMultiTexImage1DEXT │ │ + [ 473a] glDisableVertexArrayEXT │ │ + [ 4752] glGetQueryObjectuiv │ │ + [ 4766] glVertexAttrib4Niv │ │ + [ 4779] glVertexAttrib2dARB │ │ + [ 478d] glVertexAttrib4ubvARB │ │ + [ 47a3] glCompileShaderARB │ │ + [ 47b6] glProgramUniform2f │ │ + [ 47c9] glUniform2fvEXT │ │ + [ 47d9] glUniform2iEXT │ │ + [ 47e8] glVertexAttrib3fvEXT │ │ + [ 47fd] glVertexAttrib4fEXT │ │ + [ 4811] glIsProgramARB │ │ + [ 4820] 1.10 via gl4es │ │ + [ 482f] gl4es_glAlphaFunc │ │ + [ 4841] warning, %s line %d function %s: gles_glClear is NULL\n │ │ + [ 4878] Initialising gl4es\n │ │ + [ 488c] LIBGL_DRMCARD │ │ + [ 489a] Export GL_ARB_vertex_array_bgra extension\n │ │ + [ 48c5] NPOT texture handled in hardware\n │ │ + [ 48e7] warning, %s line %d function %s: gles_glLightModelfv is NULL\n │ │ + [ 4925] warning, %s line %d function %s: gles_glMaterialfv is NULL\n │ │ + [ 4961] LIBGL: Unsupported source data type: %s\n │ │ + [ 498a] glProgramBinaryOES │ │ + [ 499d] gl4es_glViewport │ │ + [ 49ae] gl_MultiTexCoord7 │ │ + [ 49c0] _gl4es_TModelViewMatrix │ │ + [ 49d8] gl_TextureMatrix_3 │ │ + [ 49eb] _gl4es_TextureMatrix_12 │ │ + [ 4a03] _gl4es_TextureMatrix │ │ + [ 4a19] //precision │ │ + [ 4a25] textureCubeLodEXT │ │ + [ 4a37] _gl4es_texture2DProjGrad │ │ + [ 4a50] textureCubeGradEXT │ │ + [ 4a63] transpose^I │ │ + [ 4a6e] gl_BackLightModelProduct │ │ + [ 4a87] warning, %s line %d function %s: gles_glClearStencil is NULL\n │ │ + [ 4ac5] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/texgen.c │ │ + [ 4b14] warning, %s line %d function %s: gles_glCompressedTexSubImage2D is NULL\n │ │ + [ 4b5d] gl4es_glClearColor │ │ + [ 4b70] warning, %s line %d function %s: gles_glFogxv is NULL\n │ │ + [ 4ba7] gl4es_glFogxv │ │ + [ 4bb5] gl4es_glLightModelx │ │ + [ 4bc9] and used\n │ │ + [ 4bd4] : │ │ + [ 4bd9] if (( │ │ + [ 4bdf] gl_ModelViewMatrixTranspose │ │ + [ 4bfb] 0.0 │ │ + [ 4bff] Invalid value (implicit param?) │ │ + [ 4c1f] glBlendEquationOES │ │ + [ 4c32] GL_TEXTURE_CUBE_MAP_NEGATIVE_X │ │ + [ 4c51] GL_TEXTURE_CUBE_MAP_POSITIVE_Z │ │ + [ 4c70] GL_RGB5_A1 │ │ + [ 4c7b] GL_DOUBLE │ │ + [ 4c85] GL_COLOR_ATTACHMENT2 │ │ + [ 4c9a] GL_EYE_LINEAR │ │ + [ 4ca8] GL_ACTIVE_UNIFORMS │ │ + [ 4cbb] GL_NUM_PROGRAM_BINARY_FORMATS │ │ + [ 4cd9] gl4es_glDepthRangef │ │ + [ 4ced] warning, %s line %d function %s: gles_glEnableClientState is NULL\n │ │ + [ 4d30] warning, %s line %d function %s: gles_glDisableClientState is NULL\n │ │ + [ 4d74] fpe_glDrawElementsInstanced │ │ + [ 4d90] samplerStreamIMG │ │ + [ 4da1] vec4(0.0) │ │ + [ 4dab] uniform highp vec4 _gl4es_ClipPlane_%d;\n │ │ + [ 4dd4] highp float att;\n │ │ + [ 4de6] // light %d on, light_direction=%d, light_cutoff180=%d\n │ │ + [ 4e1e] SecBackColor.rgb += att*(back_ss);\n │ │ + [ 4e42] // end of light %d\n │ │ + [ 4e56] Color.rgb = clamp(Color.rgb, 0., 1.);\n │ │ + [ 4e7d] npot adjusted │ │ + [ 4e8b] fColor = Arg0;\n │ │ + [ 4e9b] fColor.a = Arg0.a*Arg1.a + Arg2.a*Arg3.a - 0.5;\n │ │ + [ 4ecc] lowp float %s;\n │ │ + [ 4edc] %s.rgb = vec3(0.0);\n │ │ + [ 4ef2] %s.a = %s.a;\n │ │ + [ 4f01] glFramebufferRenderbufferOES │ │ + [ 4f1e] glGetShaderPrecisionFormat │ │ + [ 4f39] glGetVertexAttribPointerv │ │ + [ 4f53] glProgramBinary │ │ + [ 4f63] glVertexAttrib2f │ │ + [ 4f74] glColorMaskIndexedEXT │ │ + [ 4f8a] glVertex4dv │ │ + [ 4f96] glMultiTexCoord3i │ │ + [ 4fa8] glMultiTexCoord1iARB │ │ + [ 4fbd] glWindowPos3sv │ │ + [ 4fcc] glTexCoord2s │ │ + [ 4fd9] glMultiTexCoord2sEXT │ │ + [ 4fee] glMultiTexCoord4sARB │ │ + [ 5003] glSecondaryColor3ub │ │ + [ 5017] glNormal3ub │ │ + [ 5023] glVertex3ub │ │ + [ 502f] glWindowPos2uiv │ │ + [ 503f] glTexCoord2us │ │ + [ 504d] glRasterPos2fv │ │ + [ 505c] glBlendFuncSeparatei │ │ + [ 5071] glGenLists │ │ + [ 507c] glListBase │ │ + [ 5087] glLoadName │ │ + [ 5092] glMapGrid2f │ │ + [ 509e] glCompressedTexImage3DEXT │ │ + [ 50b8] glMultiTexEnvfv │ │ + [ 50c8] glCompressedTextureImage1D │ │ + [ 50e3] glGetTextureLevelParameterfvEXT │ │ + [ 5103] glVertexAttrib2sEXT │ │ + [ 5117] glVertexAttrib2d │ │ + [ 5128] glVertexAttrib3d │ │ + [ 5139] glVertexAttrib1svEXT │ │ + [ 514e] glVertexAttrib1dvARB │ │ + [ 5163] glVertexAttrib3fvARB │ │ + [ 5178] glProgramUniform1iv │ │ + [ 518c] glGetProgramivEXT │ │ + [ 519e] glVertexAttrib1fEXT │ │ + [ 51b2] glProgramUniform1fvEXT │ │ + [ 51c9] glDrawElementsInstancedBaseVertex │ │ + [ 51eb] glUniformMatrix4x2fv │ │ + [ 5200] glProgramEnvParameter4fARB │ │ + [ 521b] glProgramLocalParameters4fvEXT │ │ + [ 523a] glGetSamplerParameterIuiv │ │ + [ 5254] warning, %s line %d function %s: gles_glGetString is NULL\n │ │ + [ 528f] gl4es_glGetIntegerv │ │ + [ 52a3] Texture shrink, mode 3 selected (only > 256 /2 )\n │ │ + [ 52d5] Texture shrink, mode 5 selected (every > 256 is downscaled to 256 ), but not for empty textures\n │ │ + [ 5336] Expose GL_ARB_texture_non_power_of_two extension\n │ │ + [ 5368] No downsampling of DXTc textures\n │ │ + [ 538a] LIBGL_FORCENPOT │ │ + [ 539a] Trying to batch subsequent glDrawXXXX of size between %d and %d vertices\n │ │ + [ 53e4] glX Will NOT try to recycle EGL Surface\n │ │ + [ 540d] LIBGL_SKIPTEXCOPIES │ │ + [ 5421] gl4es_glMaterialfv │ │ + [ 5434] warning, %s line %d function %s: gles_glPointParameterfv is NULL\n │ │ + [ 5476] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/pointsprite.c │ │ + [ 54ca] pushViewport │ │ + [ 54d7] _gl4es_ModelViewMatrix │ │ + [ 54ee] _gl4es_ITModelViewProjectionMatrix │ │ + [ 5511] gl_TextureMatrix_5 │ │ + [ 5524] (FPEShader generated) │ │ + [ 553b] mediump │ │ + [ 5543] gl_LightSourceParameters │ │ + [ 555c] _gl4es_FrontLightProduct │ │ + [ 5575] gl_NormalScale │ │ + [ 5584] _gl4es_MaxTextureCoords │ │ + [ 559c] Fragment │ │ + [ 55a5] vec4 _gl4es_texture2DGrad(sampler2D sampler, vec2 coord, vec2 dPdx, vec2 dPdy) {\n │ │ return texture2D(sampler, coord);\n │ │ }\n │ │ - [ 5628] LIBGL: Warning, unknown Internalformat (%s)\n │ │ - [ 5655] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/texture.c │ │ - [ 56a5] LIBGL: swizzle error: (%s, %s -> %s, %s)\n │ │ - [ 56cf] warning, %s line %d function %s: gles_glReadPixels is NULL\n │ │ - [ 570b] warning, %s line %d function %s: gles_glFrustumx is NULL\n │ │ - [ 5745] warning, %s line %d function %s: gles_glGetFixedv is NULL\n │ │ - [ 5780] warning, %s line %d function %s: gles_glGetTexEnvxv is NULL\n │ │ - [ 57bd] gl4es_glLineWidth │ │ - [ 57cf] gl4es_glMaterialx │ │ - [ 57e1] gl4es_glPolygonOffsetx │ │ - [ 57f8] gl4es_glTexEnvxv │ │ - [ 5809] eglBindAPI │ │ - [ 5814] eglDestroyContext │ │ - [ 5826] warning, %s line %d function %s: egl_eglQueryString is NULL\n │ │ - [ 5863] #version 300 es │ │ - [ 5876] . │ │ - [ 5878] .x = int(floor( │ │ - [ 5888] secondary │ │ - [ 5892] gl_FrontMaterial │ │ - [ 58a3] gl_ProgramEnv │ │ - [ 58b1] Invalid state │ │ - [ 58bf] No param given │ │ - [ 58ce] Too many operands │ │ - [ 58e0] gl4es_glBlendEquation │ │ - [ 58f6] warning, %s line %d function %s: gles_glClientActiveTexture is NULL\n │ │ - [ 593b] glCreateShader │ │ - [ 594a] warning, %s line %d function %s: gles_glBindBuffer is NULL\n │ │ - [ 5986] v%d.%d.%d built on %s %s\n │ │ + [ 561c] LIBGL: Warning, unknown Internalformat (%s)\n │ │ + [ 5649] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/texture.c │ │ + [ 5699] LIBGL: swizzle error: (%s, %s -> %s, %s)\n │ │ + [ 56c3] warning, %s line %d function %s: gles_glReadPixels is NULL\n │ │ + [ 56ff] warning, %s line %d function %s: gles_glFrustumx is NULL\n │ │ + [ 5739] warning, %s line %d function %s: gles_glGetFixedv is NULL\n │ │ + [ 5774] warning, %s line %d function %s: gles_glGetTexEnvxv is NULL\n │ │ + [ 57b1] gl4es_glLineWidth │ │ + [ 57c3] gl4es_glMaterialx │ │ + [ 57d5] gl4es_glPolygonOffsetx │ │ + [ 57ec] gl4es_glTexEnvxv │ │ + [ 57fd] eglBindAPI │ │ + [ 5808] eglDestroyContext │ │ + [ 581a] warning, %s line %d function %s: egl_eglQueryString is NULL\n │ │ + [ 5857] #version 300 es │ │ + [ 586a] . │ │ + [ 586c] .x = int(floor( │ │ + [ 587c] secondary │ │ + [ 5886] gl_FrontMaterial │ │ + [ 5897] gl_ProgramEnv │ │ + [ 58a5] Invalid state │ │ + [ 58b3] No param given │ │ + [ 58c2] Too many operands │ │ + [ 58d4] gl4es_glBlendEquation │ │ + [ 58ea] warning, %s line %d function %s: gles_glClientActiveTexture is NULL\n │ │ + [ 592f] glCreateShader │ │ + [ 593e] warning, %s line %d function %s: gles_glBindBuffer is NULL\n │ │ + [ 597a] v%d.%d.%d built on %s %s\n │ │ + [ 5994] Dec 10 2024 │ │ [ 59a0] GL_READ_FRAMEBUFFER │ │ [ 59b4] GL_RGB16F │ │ [ 59be] GL_TRIANGLE_STRIP │ │ [ 59d0] GL_TEXTURE_GEN_Q │ │ [ 59e1] GL_LIGHT0 │ │ [ 59eb] GL_SHADER_TYPE │ │ [ 59fa] GL_SUBTRACT │ │ @@ -1377,1494 +1377,1494 @@ │ │ [ 84ef] Invalid texture sampler target │ │ [ 850e] ALIAS │ │ [ 8514] OUTPUT │ │ [ 851b] Invalid token │ │ [ 8529] ARB_fog_exp │ │ [ 8535] warning, %s line %d function %s: gles_glBufferSubData is NULL\n │ │ [ 8574] realize_bufferIndex │ │ - [ 8588] 19:10:48 │ │ - [ 8591] GL_TEXTURE_RECTANGLE_ARB │ │ - [ 85aa] GL_TEXTURE_CUBE_MAP │ │ - [ 85be] GL_BGR │ │ - [ 85c5] GL_PACK_ALIGNMENT │ │ - [ 85d7] GL_PACK_SKIP_PIXELS │ │ - [ 85eb] GL_TEXTURE_MAX_LEVEL │ │ - [ 8600] GL_SRC1_RGB │ │ - [ 860c] GL_CONSTANT │ │ - [ 8618] GL_SRC2_ALPHA │ │ - [ 8626] GL_MAX_PROGRAM_ENV_PARAMETERS_ARB │ │ - [ 8648] _gl4es_ObjectPlane%c[ │ │ - [ 865e] _gl4es_Vertex_ProgramLocal[ │ │ - [ 867a] .spotDirection │ │ - [ 8689] .spotExponent │ │ - [ 8697] scale │ │ - [ 869d] vec4(1.0) │ │ - [ 86a7] gl_FrontColor = gl_Color;\n │ │ - [ 86c2] gl_BackMaterial.ambient │ │ - [ 86da] _gl4es_FrontMaterial_shininess │ │ - [ 86f9] tmp_tcoor │ │ - [ 8703] fColor.rgb += texColor%d.rgb;\n │ │ - [ 8722] fColor = texColor%d;\n │ │ - [ 8738] fColor = Arg0*Arg1 + Arg2*Arg3 - vec4(0.5);\n │ │ - [ 8765] fColor = clamp(fColor, 0., 1.);\n │ │ - [ 8786] %s.rgb = vec3(1.0);\n │ │ - [ 879c] if (floor(%s.a*255.) %s _gl4es_AlphaRef) discard;\n │ │ - [ 87d0] gl4es_glGenRenderbuffers │ │ - [ 87e9] gl4es_glDeleteRenderbuffers │ │ - [ 8805] glRenderbufferStorage │ │ - [ 881b] glFogCoordf │ │ - [ 8827] glGetTexParameterxv │ │ - [ 883b] glMaterialfv │ │ - [ 8848] glTranslatef │ │ - [ 8855] glFramebufferTexture1D │ │ - [ 886c] glRenderbufferStorageMultisampleEXT │ │ - [ 8890] glGetFramebufferAttachmentParameterivARB │ │ - [ 88b9] glWindowPos3bv │ │ - [ 88c8] glMultiTexCoord2bEXT │ │ - [ 88dd] glRasterPos4dv │ │ - [ 88ec] glVertex3dv │ │ - [ 88f8] glMultiTexCoord3d │ │ - [ 890a] glMultiTexCoord4dv │ │ - [ 891d] glIndexi │ │ - [ 8926] glWindowPos2iv │ │ - [ 8935] glVertex3iv │ │ - [ 8941] glMultiTexCoord1i │ │ - [ 8953] glMultiTexCoord3ivARB │ │ - [ 8969] glMultiTexCoord2s │ │ - [ 897b] glMultiTexCoord2sARB │ │ - [ 8990] glMultiTexCoord4ubvEXT │ │ - [ 89a7] glMultiTexCoord4ubARB │ │ - [ 89bd] glMultiTexCoord2uiARB │ │ - [ 89d3] glSecondaryColor3usvEXT │ │ - [ 89eb] glNormal3us │ │ - [ 89f7] glVertex4usv │ │ - [ 8a04] glSecondaryColor3fEXT │ │ - [ 8a1a] glLightModeli │ │ - [ 8a28] glMapGrid2d │ │ - [ 8a34] glDisableClientStatei │ │ - [ 8a4a] glGetBooleanIndexedv │ │ - [ 8a5f] glTextureParameterfvEXT │ │ - [ 8a77] glCopyTextureImage2DEXT │ │ - [ 8a8f] glDisableClientStateiEXT │ │ - [ 8aa8] glEnableVertexArrayAttribEXT │ │ - [ 8ac5] glGetPointerIndexedvEXT │ │ - [ 8add] glDeleteQueriesARB │ │ - [ 8af0] glVertexAttrib4dEXT │ │ - [ 8b04] glVertexAttrib3svEXT │ │ - [ 8b19] glVertexAttrib4bv │ │ - [ 8b2b] glUniform1fvARB │ │ - [ 8b3b] glDetachShaderEXT │ │ - [ 8b4d] glProgramUniform2fEXT │ │ - [ 8b63] glProgramBinaryEXT │ │ - [ 8b76] glProgramEnvParameter4dvARB │ │ - [ 8b92] glProgramEnvParameter4fvARB │ │ - [ 8bae] glDeleteSamplers │ │ - [ 8bbf] GL4ES GetProcAddress: %s not found.\n │ │ - [ 8be4] GL_ARB_point_sprite │ │ - [ 8bf9] Don't export Text Rectangle extension\n │ │ - [ 8c20] Not forcing NPOT support\n │ │ - [ 8c3a] LIBGL_FBOMAKECURRENT │ │ - [ 8c4f] Texture Copies will be skipped\n │ │ - [ 8c6f] warning, %s line %d function %s: gles_glLoadIdentity is NULL\n │ │ - [ 8cad] lowp │ │ - [ 8cb2] _gl4es_MultiTexCoord0 │ │ - [ 8cc8] _gl4es_ClipPlane │ │ - [ 8cd9] varying lowp vec4 _gl4es_BackSecondaryColor;\n │ │ - [ 8d07] gl_Sampler1D_ │ │ - [ 8d15] warning, %s line %d function %s: gles_glTexSubImage2D is NULL\n │ │ - [ 8d54] gl4es_glGetClipPlanex │ │ - [ 8d6a] gl4es_glPointParameterxv │ │ - [ 8d83] warning, %s line %d function %s: gles_glTexEnvxv is NULL\n │ │ - [ 8dbd] gl4es_glTranslatex │ │ - [ 8dd0] warning, %s line %d function %s: egl_eglInitialize is NULL\n │ │ - [ 8e0c] GLSL 120 supported and used\n │ │ - [ 8e2a] gl_Position = ftransform();\n │ │ - [ 8e47] mix( │ │ - [ 8e4c] row │ │ - [ 8e50] gl_TextureMatrix │ │ - [ 8e61] , 0.) │ │ - [ 8e67] vec4(%s, %s, %s, %s) │ │ - [ 8e7c] Failed to realloc (out of memory?) │ │ - [ 8e9f] ARB_precision_hint_nicest │ │ - [ 8eb9] Unsupported pixel data type: %s\n │ │ - [ 8eda] GL_UNSIGNED_SHORT │ │ - [ 8eec] GL_TEXTURE_HEIGHT │ │ - [ 8efe] GL_TEXTURE_BASE_LEVEL │ │ - [ 8f14] GL_PROGRAM_BINDING_ARB │ │ - [ 8f2b] GL_PROGRAM_NATIVE_ADDRESS_REGISTERS_ARB │ │ - [ 8f53] gl4es_glDepthMask │ │ - [ 8f65] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/drawing.c │ │ - [ 8fb5] glIsEnabled │ │ - [ 8fc1] LIBGL: Warning, sync uniform on father/son program with unknown uniform type %s\n │ │ - [ 9012] _gl4es_LightSource_ │ │ - [ 9026] _gl4es_FrontLightProduct[ │ │ - [ 9040] highp vec4 ambient;\n │ │ + [ 8588] GL_TEXTURE_RECTANGLE_ARB │ │ + [ 85a1] GL_TEXTURE_CUBE_MAP │ │ + [ 85b5] GL_BGR │ │ + [ 85bc] GL_PACK_ALIGNMENT │ │ + [ 85ce] GL_PACK_SKIP_PIXELS │ │ + [ 85e2] GL_TEXTURE_MAX_LEVEL │ │ + [ 85f7] GL_SRC1_RGB │ │ + [ 8603] GL_CONSTANT │ │ + [ 860f] GL_SRC2_ALPHA │ │ + [ 861d] GL_MAX_PROGRAM_ENV_PARAMETERS_ARB │ │ + [ 863f] _gl4es_ObjectPlane%c[ │ │ + [ 8655] _gl4es_Vertex_ProgramLocal[ │ │ + [ 8671] .spotDirection │ │ + [ 8680] .spotExponent │ │ + [ 868e] scale │ │ + [ 8694] vec4(1.0) │ │ + [ 869e] gl_FrontColor = gl_Color;\n │ │ + [ 86b9] gl_BackMaterial.ambient │ │ + [ 86d1] _gl4es_FrontMaterial_shininess │ │ + [ 86f0] tmp_tcoor │ │ + [ 86fa] fColor.rgb += texColor%d.rgb;\n │ │ + [ 8719] fColor = texColor%d;\n │ │ + [ 872f] fColor = Arg0*Arg1 + Arg2*Arg3 - vec4(0.5);\n │ │ + [ 875c] fColor = clamp(fColor, 0., 1.);\n │ │ + [ 877d] %s.rgb = vec3(1.0);\n │ │ + [ 8793] if (floor(%s.a*255.) %s _gl4es_AlphaRef) discard;\n │ │ + [ 87c7] gl4es_glGenRenderbuffers │ │ + [ 87e0] gl4es_glDeleteRenderbuffers │ │ + [ 87fc] glRenderbufferStorage │ │ + [ 8812] glFogCoordf │ │ + [ 881e] glGetTexParameterxv │ │ + [ 8832] glMaterialfv │ │ + [ 883f] glTranslatef │ │ + [ 884c] glFramebufferTexture1D │ │ + [ 8863] glRenderbufferStorageMultisampleEXT │ │ + [ 8887] glGetFramebufferAttachmentParameterivARB │ │ + [ 88b0] glWindowPos3bv │ │ + [ 88bf] glMultiTexCoord2bEXT │ │ + [ 88d4] glRasterPos4dv │ │ + [ 88e3] glVertex3dv │ │ + [ 88ef] glMultiTexCoord3d │ │ + [ 8901] glMultiTexCoord4dv │ │ + [ 8914] glIndexi │ │ + [ 891d] glWindowPos2iv │ │ + [ 892c] glVertex3iv │ │ + [ 8938] glMultiTexCoord1i │ │ + [ 894a] glMultiTexCoord3ivARB │ │ + [ 8960] glMultiTexCoord2s │ │ + [ 8972] glMultiTexCoord2sARB │ │ + [ 8987] glMultiTexCoord4ubvEXT │ │ + [ 899e] glMultiTexCoord4ubARB │ │ + [ 89b4] glMultiTexCoord2uiARB │ │ + [ 89ca] glSecondaryColor3usvEXT │ │ + [ 89e2] glNormal3us │ │ + [ 89ee] glVertex4usv │ │ + [ 89fb] glSecondaryColor3fEXT │ │ + [ 8a11] glLightModeli │ │ + [ 8a1f] glMapGrid2d │ │ + [ 8a2b] glDisableClientStatei │ │ + [ 8a41] glGetBooleanIndexedv │ │ + [ 8a56] glTextureParameterfvEXT │ │ + [ 8a6e] glCopyTextureImage2DEXT │ │ + [ 8a86] glDisableClientStateiEXT │ │ + [ 8a9f] glEnableVertexArrayAttribEXT │ │ + [ 8abc] glGetPointerIndexedvEXT │ │ + [ 8ad4] glDeleteQueriesARB │ │ + [ 8ae7] glVertexAttrib4dEXT │ │ + [ 8afb] glVertexAttrib3svEXT │ │ + [ 8b10] glVertexAttrib4bv │ │ + [ 8b22] glUniform1fvARB │ │ + [ 8b32] glDetachShaderEXT │ │ + [ 8b44] glProgramUniform2fEXT │ │ + [ 8b5a] glProgramBinaryEXT │ │ + [ 8b6d] glProgramEnvParameter4dvARB │ │ + [ 8b89] glProgramEnvParameter4fvARB │ │ + [ 8ba5] glDeleteSamplers │ │ + [ 8bb6] GL4ES GetProcAddress: %s not found.\n │ │ + [ 8bdb] GL_ARB_point_sprite │ │ + [ 8bf0] Don't export Text Rectangle extension\n │ │ + [ 8c17] Not forcing NPOT support\n │ │ + [ 8c31] LIBGL_FBOMAKECURRENT │ │ + [ 8c46] Texture Copies will be skipped\n │ │ + [ 8c66] warning, %s line %d function %s: gles_glLoadIdentity is NULL\n │ │ + [ 8ca4] lowp │ │ + [ 8ca9] _gl4es_MultiTexCoord0 │ │ + [ 8cbf] _gl4es_ClipPlane │ │ + [ 8cd0] varying lowp vec4 _gl4es_BackSecondaryColor;\n │ │ + [ 8cfe] gl_Sampler1D_ │ │ + [ 8d0c] warning, %s line %d function %s: gles_glTexSubImage2D is NULL\n │ │ + [ 8d4b] gl4es_glGetClipPlanex │ │ + [ 8d61] gl4es_glPointParameterxv │ │ + [ 8d7a] warning, %s line %d function %s: gles_glTexEnvxv is NULL\n │ │ + [ 8db4] gl4es_glTranslatex │ │ + [ 8dc7] warning, %s line %d function %s: egl_eglInitialize is NULL\n │ │ + [ 8e03] GLSL 120 supported and used\n │ │ + [ 8e21] gl_Position = ftransform();\n │ │ + [ 8e3e] mix( │ │ + [ 8e43] row │ │ + [ 8e47] gl_TextureMatrix │ │ + [ 8e58] , 0.) │ │ + [ 8e5e] vec4(%s, %s, %s, %s) │ │ + [ 8e73] Failed to realloc (out of memory?) │ │ + [ 8e96] ARB_precision_hint_nicest │ │ + [ 8eb0] Unsupported pixel data type: %s\n │ │ + [ 8ed1] GL_UNSIGNED_SHORT │ │ + [ 8ee3] GL_TEXTURE_HEIGHT │ │ + [ 8ef5] GL_TEXTURE_BASE_LEVEL │ │ + [ 8f0b] GL_PROGRAM_BINDING_ARB │ │ + [ 8f22] GL_PROGRAM_NATIVE_ADDRESS_REGISTERS_ARB │ │ + [ 8f4a] gl4es_glDepthMask │ │ + [ 8f5c] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/drawing.c │ │ + [ 8fac] glIsEnabled │ │ + [ 8fb8] LIBGL: Warning, sync uniform on father/son program with unknown uniform type %s\n │ │ + [ 9009] _gl4es_LightSource_ │ │ + [ 901d] _gl4es_FrontLightProduct[ │ │ + [ 9037] highp vec4 ambient;\n │ │ highp vec4 diffuse;\n │ │ - [ 906f] struct _gl4es_FPELightSourceParameters0\n │ │ + [ 9066] struct _gl4es_FPELightSourceParameters0\n │ │ {\n │ │ %s highp vec4 specular;\n │ │ highp vec4 position;\n │ │ highp vec3 spotDirection;\n │ │ highp float spotExponent;\n │ │ highp float spotCosCutoff;\n │ │ };\n │ │ - [ 9127] SecColor = gl_SecondaryColor;\n │ │ - [ 9146] BackColor = %s;\n │ │ - [ 9157] att = 1.0/(_gl4es_LightSource_%d.constantAttenuation + lVP*(_gl4es_LightSource_%d.linearAttenuation + _gl4es_LightSource_%d.quadraticAttenuation * lVP));\n │ │ - [ 91f2] aa = _gl4es_FrontLightProduct_%d.ambient.xyz;\n │ │ - [ 9221] nVP = dot(normal, VP);\n │ │ - [ 9239] Color.rgb += att*(aa+dd);\n │ │ - [ 9254] BackColor.rgb = clamp(BackColor.rgb, 0., 1.);\n │ │ - [ 9283] tmp_tcoor.xyz = reflect(normalize(vertex.xyz), normal);\n │ │ - [ 92bc] _gl4es_TexCoord_%d.xy *= _gl4es_TexAdjust_%d;\n │ │ - [ 92eb] fColor.rgb = Arg0.rgb*Arg2.rgb + Arg1.rgb*(vec3(1.)-Arg2.rgb);\n │ │ - [ 932b] fColor.a = Arg0.a + Arg1.a - 0.5;\n │ │ - [ 934e] < │ │ - [ 9350] warning, %s line %d function %s: gles_glTexParameteri is NULL\n │ │ - [ 938f] glGenRenderbuffers │ │ - [ 93a2] gl4es_glDrawBuffers │ │ - [ 93b6] glFogx │ │ - [ 93bd] glIsProgram │ │ - [ 93c9] glLoadMatrixf │ │ - [ 93d7] glMultiTexCoord4x │ │ - [ 93e9] glShadeModel │ │ - [ 93f6] glTexGeni │ │ - [ 9400] glUniform3f │ │ - [ 940c] glUniform4f │ │ - [ 9418] glBindBufferARB │ │ - [ 9428] glGenVertexArraysEXT │ │ - [ 943d] glCheckFramebufferStatusEXT │ │ - [ 9459] glGenRenderbuffersARB │ │ - [ 946f] glDrawBuffersARB │ │ - [ 9480] glClearBufferfi │ │ - [ 9490] glClearNamedFramebufferfi │ │ - [ 94aa] glIndexPointerEXT │ │ - [ 94bc] glTexCoord2bv │ │ - [ 94ca] glMultiTexCoord2bvARB │ │ - [ 94e0] glTexCoord1d │ │ - [ 94ed] glMultiTexCoord4dvARB │ │ - [ 9503] glRasterPos3i │ │ - [ 9511] glTexCoord1iv │ │ - [ 951f] glTexCoord1sv │ │ - [ 952d] glColor3ubv │ │ - [ 9539] glTexCoord2ub │ │ - [ 9547] glMultiTexCoord3ui │ │ - [ 955a] glMultiTexCoord1usEXT │ │ - [ 9570] glPointParameterfARB │ │ - [ 9585] glBlendEquationSeparateARB │ │ - [ 95a0] glEnd │ │ - [ 95a6] glGetCompressedTexImage │ │ - [ 95be] glColorMaterial │ │ - [ 95ce] glPointParameteri │ │ - [ 95e0] glMatrixMultd │ │ - [ 95ee] glMatrixOrtho │ │ - [ 95fc] glCopyTextureImage2D │ │ - [ 9611] glBindMultiTexture │ │ - [ 9624] glMultiTexCoordPointer │ │ - [ 963b] glMultiTexGend │ │ - [ 964a] glCopyMultiTexImage2D │ │ - [ 9660] glCompressedMultiTexSubImage3D │ │ - [ 967f] glTextureParameterivEXT │ │ - [ 9697] glCopyTextureSubImage2DEXT │ │ - [ 96b2] glMultiTexParameterfEXT │ │ - [ 96ca] glCompressedMultiTexSubImage1DEXT │ │ - [ 96ec] glVertexAttrib4sEXT │ │ - [ 9700] glVertexAttrib1sv │ │ - [ 9712] glVertexAttrib4NubARB │ │ - [ 9728] glDeleteObjectARB │ │ - [ 973a] glProgramUniform3i │ │ - [ 974d] glUniform1iEXT │ │ - [ 975c] glUniform3fvEXT │ │ - [ 976c] glUniform3iEXT │ │ - [ 977b] glGetProgramStringARB │ │ - [ 9791] GL_ARB_texture_non_power_of_two │ │ - [ 97b2] gl4es_glGetFloatv │ │ - [ 97c4] gl4es_glNormal3fv │ │ - [ 97d6] warning, %s line %d function %s: gles_glFinish is NULL\n │ │ - [ 980e] free_renderbuffer │ │ - [ 9820] LIBGL_NOBANNER │ │ - [ 982f] Ignore BGRA texture capability\n │ │ - [ 984f] LIBGL_NOTEXRECT │ │ - [ 985f] AutoMipMap forced\n │ │ - [ 9872] LIBGL_SILENTSTUB │ │ - [ 9883] No FastMath on this platform\n │ │ - [ 98a1] LIBGL_NOINTOVLHACK │ │ - [ 98b4] LIBGL_FBOUNBIND │ │ - [ 98c4] Default wrap mode is GL_CLAMP_TO_EDGE, enforced\n │ │ - [ 98f5] /home/vagrant/build/com.arxlibertatis/gl4es/src/main/jni/gl4es/src/gl/listdraw.c │ │ - [ 9946] LIBGL:loaded: %s\n │ │ - [ 9958] warning, %s line %d function %s: gles is NULL\n │ │ - [ 9987] wa